Merge remote-tracking branch 'origin/upstream/master'
Change-Id: I30938a5684e070401967b7d7d0498efbf7e2ec5b
diff --git a/.codecov.yml b/.codecov.yml
index 0e56d2b..93d42f7 100644
--- a/.codecov.yml
+++ b/.codecov.yml
@@ -5,7 +5,7 @@
ignore:
- "tests/*"
- - "third_party/*"
+ - "third_party/**/*"
comment:
layout: "diff, flags, files"
diff --git a/.gitignore b/.gitignore
index 2635a74..5bbdeab 100644
--- a/.gitignore
+++ b/.gitignore
@@ -8,6 +8,7 @@
*.o
*.lo
*.la
+*.ninja*
*.opendb
*.orig
*.pyc
@@ -25,13 +26,15 @@
aclocal.m4
autom4te.cache
build
+CMakeCache.txt
+CMakeFiles
+cmake_install.cmake
configure
config.log
config.status
doc/Doxyfile
doc/html
-etc/visual-studio/BundleArtifacts
-etc/visual-studio/Generated Files
+etc/cmake/openthread-config-generic.h
include/openthread-config.h
include/openthread-config.h.in
include/openthread-config-generic.h
diff --git a/.gn b/.gn
new file mode 100644
index 0000000..dfb5d4a
--- /dev/null
+++ b/.gn
@@ -0,0 +1 @@
+buildconfig = "//third_party/build_gn/BUILDCONFIG.gn"
diff --git a/.travis.yml b/.travis.yml
index f84aefb..52b05ec 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -30,7 +30,7 @@
python: "3.6"
sudo: required
-dist: xenial
+dist: bionic
before_install:
- travis_retry .travis/before_install.sh
@@ -53,6 +53,10 @@
os: linux
compiler: gcc
script: .travis/script.sh
+ - env: BUILD_TARGET="posix-app-ncp" VERBOSE=1 VIRTUAL_TIME=1
+ os: linux
+ compiler: gcc
+ script: .travis/script.sh
- env: BUILD_TARGET="posix-app-pty" VERBOSE=1 COVERAGE=1
os: linux
compiler: clang
@@ -61,10 +65,21 @@
os: linux
compiler: gcc
script: .travis/script.sh
+ - env: BUILD_TARGET="posix-app-migrate" VERBOSE=1 COVERAGE=1
+ os: linux
+ compiler: clang
+ script: .travis/script.sh
+ - env: BUILD_TARGET="posix-app-spi" VERBOSE=1 COVERAGE=1
+ os: linux
+ compiler: gcc
+ script: .travis/script.sh
- env: BUILD_TARGET="android-build" VERBOSE=1
os: linux
dist: trusty
- python: "2.7"
+ python: "2.7" # The old Android build system only supports python2
+ script: .travis/script.sh
+ - env: BUILD_TARGET="gn-build" VERBOSE=1
+ os: linux
script: .travis/script.sh
- env: BUILD_TARGET="posix-distcheck" VERBOSE=1 VIRTUAL_TIME=1
os: linux
@@ -73,12 +88,10 @@
- env: BUILD_TARGET="posix-32-bit" VERBOSE=1 VIRTUAL_TIME=1
os: linux
compiler: gcc
- python: "2.7"
script: .travis/script.sh
- env: BUILD_TARGET="posix-32-bit" VERBOSE=1 VIRTUAL_TIME=1 TIME_SYNC=1
os: linux
compiler: gcc
- python: "2.7"
script: .travis/script.sh
- env: BUILD_TARGET="posix-ncp" VERBOSE=1 VIRTUAL_TIME=1
os: linux
@@ -108,7 +121,13 @@
os: linux
compiler: gcc
script: .travis/script.sh
- - env: BUILD_TARGET="arm-gcc-8"
+# Disable Arm GCC 8 until slow compile bug is fixed:
+# https://github.com/openthread/openthread/issues/4053
+# - env: BUILD_TARGET="arm-gcc-8"
+# os: linux
+# compiler: gcc
+# script: .travis/script.sh
+ - env: BUILD_TARGET="arm-gcc-9"
os: linux
compiler: gcc
script: .travis/script.sh
@@ -117,8 +136,6 @@
compiler: gcc
addons:
apt:
- sources:
- - ubuntu-toolchain-r-test
packages:
- gcc-5
- g++-5
@@ -128,8 +145,6 @@
compiler: gcc
addons:
apt:
- sources:
- - ubuntu-toolchain-r-test
packages:
- gcc-6
- g++-6
@@ -139,8 +154,6 @@
compiler: gcc
addons:
apt:
- sources:
- - ubuntu-toolchain-r-test
packages:
- gcc-7
- g++-7
@@ -150,8 +163,6 @@
compiler: gcc
addons:
apt:
- sources:
- - ubuntu-toolchain-r-test
packages:
- gcc-8
- g++-8
@@ -162,7 +173,7 @@
addons:
apt:
sources:
- - ubuntu-toolchain-r-test
+ - sourceline: "ppa:ubuntu-toolchain-r/test"
packages:
- gcc-9
- g++-9
@@ -171,14 +182,13 @@
os: linux
compiler: gcc
script: .travis/script.sh
- - env: BUILD_TARGET="toranj-test-framework" VERBOSE=1
+ - env: BUILD_TARGET="toranj-test-framework" COVERAGE=1 VERBOSE=1
os: linux
compiler: gcc
script: .travis/script.sh
- - env: BUILD_TARGET="toranj-test-framework" VERBOSE=1 TORANJ_POSIX_APP_RCP_MODEL=1
+ - env: BUILD_TARGET="toranj-test-framework" COVERAGE=1 VERBOSE=1 TORANJ_POSIX_APP_RCP_MODEL=1
os: linux
compiler: gcc
- python: "2.7"
script: .travis/script.sh
- env: BUILD_TARGET="osx" VERBOSE=1
os: osx
@@ -189,9 +199,6 @@
os: linux
addons:
apt:
- sources:
- - llvm-toolchain-xenial-6.0
- - ubuntu-toolchain-r-test
packages:
- clang-format-6.0
script: .travis/check-pretty
diff --git a/.travis/before_install.sh b/.travis/before_install.sh
index f5e2ae1..510964e 100755
--- a/.travis/before_install.sh
+++ b/.travis/before_install.sh
@@ -39,9 +39,14 @@
cd /tmp || die
[ $TRAVIS_OS_NAME != linux ] || {
- (cd /etc/apt/sources.list.d && sudo rm -rf cassandra.list* couchdb.list* mongodb-3.4.list* rabbitmq_rabbitmq-server.list* chris-lea-redis-server.list* github_git-lfs.list*)
+ (cd /etc/apt/sources.list.d && sudo rm -rf cassandra.list* couchdb.list* mongodb-3.4.list* rabbitmq_rabbitmq-server.list* chris-lea-redis-server.list* github_git-lfs.list* pgdg.list)
sudo apt-get update || die
+ sudo apt-get install ninja-build
+
+ pip3 install --upgrade pip
+ pip3 install cmake
+
[ $BUILD_TARGET != posix-distcheck -a $BUILD_TARGET != posix-32-bit -a $BUILD_TARGET != posix-app-cli -a $BUILD_TARGET != posix-mtd -a $BUILD_TARGET != posix-ncp -a $BUILD_TARGET != posix-app-ncp ] || {
pip install --upgrade pip || die
pip install -r $TRAVIS_BUILD_DIR/tests/scripts/thread-cert/requirements.txt || die
@@ -61,6 +66,27 @@
) || die
}
+ [ $BUILD_TARGET != gn-build ] || {
+ # Install ninja
+ (
+ cd $HOME
+ wget -O ninja.zip https://chrome-infra-packages.appspot.com/dl/infra/ninja/linux-amd64/+/latest
+ unzip -o ninja.zip
+ chmod a+x ninja && mkdir -p bin && mv -f ninja bin/ && export PATH=${HOME}/bin:$PATH
+ ninja --version
+ ) || die
+
+
+ # Get latest gn
+ (
+ cd $HOME
+ wget -O gn.zip https://chrome-infra-packages.appspot.com/dl/gn/gn/linux-amd64/+/latest
+ unzip -o gn.zip
+ chmod a+x gn && mv -f gn bin/
+ gn --version
+ ) || die
+ }
+
[ $BUILD_TARGET != posix-app-pty ] || {
sudo apt-get install socat expect || die
JOBS=$(getconf _NPROCESSORS_ONLN)
@@ -78,6 +104,10 @@
) || die
}
+ [ $BUILD_TARGET != posix-app-migrate ] || {
+ sudo apt-get install expect || die
+ }
+
[ $BUILD_TARGET != arm-gcc-4 ] || {
sudo apt-get install lib32z1 || die
wget https://launchpad.net/gcc-arm-embedded/4.9/4.9-2015-q3-update/+download/gcc-arm-none-eabi-4_9-2015q3-20150921-linux.tar.bz2 || die
@@ -115,6 +145,13 @@
arm-none-eabi-gcc --version || die
}
+ [ $BUILD_TARGET != arm-gcc-9 ] || {
+ wget https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2019q4/RC2.1/gcc-arm-none-eabi-9-2019-q4-major-x86_64-linux.tar.bz2 || die
+ tar xjf gcc-arm-none-eabi-9-2019-q4-major-x86_64-linux.tar.bz2 || die
+ export PATH=/tmp/gcc-arm-none-eabi-9-2019-q4-major/bin:$PATH || die
+ arm-none-eabi-gcc --version || die
+ }
+
[ $BUILD_TARGET != posix-32-bit -a $BUILD_TARGET != posix-mtd ] || {
sudo apt-get install g++-multilib || die
}
diff --git a/.travis/check-gn-build b/.travis/check-gn-build
new file mode 100755
index 0000000..8e96783
--- /dev/null
+++ b/.travis/check-gn-build
@@ -0,0 +1,43 @@
+#!/bin/sh
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+#
+# Run this command on parent directory of openthread
+#
+
+set -e
+set -x
+
+main() {
+ gn gen gn-out
+ ninja -C gn-out
+ test -f gn-out/obj/lib-ot-core.a
+}
+
+main "$@"
diff --git a/.travis/check-ncp-rcp-migrate b/.travis/check-ncp-rcp-migrate
new file mode 100755
index 0000000..968a35a
--- /dev/null
+++ b/.travis/check-ncp-rcp-migrate
@@ -0,0 +1,142 @@
+#!/bin/bash
+#
+# Copyright (c) 2020, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+set -e
+set -x
+
+at_exit() {
+ EXIT_CODE=$?
+
+ killall expect || true
+ killall ot-cli-ftd || true
+ killall ot-cli || true
+ killall ot-rcp || true
+
+ exit $EXIT_CODE
+}
+
+build() {
+ make -f examples/Makefile-posix
+ make -f src/posix/Makefile-posix
+}
+
+check() {
+ trap at_exit INT TERM EXIT
+
+ rm -rf tmp/
+
+ PANID="0xc001"
+ EXT_PANID="0123456789abcdef"
+ NETWORK_NAME="OT_NCP_TO_RCP"
+ CHANNEL="20"
+ MASTER_KEY="0123456789abcdef0123456789abcdef"
+
+ echo "Step 1. Start NCP platform and form a PAN..."
+ RADIO_NCP_CMD="$(pwd)/$(ls output/*linux*/bin/ot-cli-ftd)"
+
+ expect <<EOF
+spawn ${RADIO_NCP_CMD} 1
+set timeout 2
+expect_after {
+ timeout { exit 1 }
+}
+send "panid ${PANID}\r\n"
+expect "Done"
+send "extpanid ${EXT_PANID}\r\n"
+expect "Done"
+send "networkname ${NETWORK_NAME}\r\n"
+expect "Done"
+send "channel ${CHANNEL}\r\n"
+expect "Done"
+send "masterkey ${MASTER_KEY}\r\n"
+expect "Done"
+send "ifconfig up\r\n"
+expect "Done"
+send "thread start\r\n"
+expect "Done"
+sleep 5
+send "state\r\n"
+expect "leader"
+expect "Done"
+send "exit\r\n"
+expect eof
+EOF
+
+ echo "Step 2. Start retrieving dataset from Radio..."
+ RADIO_NCP_PATH="$(pwd)/$(ls output/*linux*/bin/ot-ncp-ftd)"
+ "$(pwd)/$(ls output/posix/*linux*/bin/ot-ncp)" -n --radio-version --ncp-dataset -- ${RADIO_NCP_PATH} 1
+
+ echo "Step 3. Start posix app and check whether PAN dataset is the same..."
+ RADIO_RCP_PATH="$(pwd)/$(ls output/*linux*/bin/ot-rcp)"
+
+ OT_CLI_CMD="$(pwd)/$(ls output/posix/*linux*/bin/ot-cli) ${RADIO_RCP_PATH} 1"
+
+ expect <<EOF
+spawn ${OT_CLI_CMD}
+set timeout 2
+expect_after {
+ timeout { exit 1 }
+}
+send "panid\r\n"
+expect ${PANID}
+expect "Done"
+send "extpanid\r\n"
+expect ${EXT_PANID}
+expect "Done"
+send "networkname\r\n"
+expect ${NETWORK_NAME}
+expect "Done"
+send "channel\r\n"
+expect ${CHANNEL}
+expect "Done"
+send "masterkey\r\n"
+expect ${MASTER_KEY}
+expect "Done"
+send "exit\r\n"
+expect eof
+EOF
+
+ echo "Step 4. Start posix app and check whether it can get radio firmware version..."
+ RADIO_VERSION="$("$(pwd)/$(ls output/posix/*linux*/bin/ot-cli)" -n --radio-version --ncp-dataset -- ${RADIO_RCP_PATH} 1)" || true
+ test -n "{RADIO_VERSION}"
+}
+
+main() {
+ case "$1" in
+ check)
+ check
+ ;;
+ *)
+ build
+ check
+ ;;
+ esac
+}
+
+main "$@"
diff --git a/.travis/check-posix-app-pty b/.travis/check-posix-app-pty
index 5535948..2289547 100755
--- a/.travis/check-posix-app-pty
+++ b/.travis/check-posix-app-pty
@@ -80,6 +80,10 @@
OT_CLI_CMD="$(pwd)/$(ls output/posix/*linux*/bin/ot-cli) ${OT_NCP_PATH} ${CORE_PTY}"
fi
+ if [[ "${DAEMON}" = 1 ]]; then
+ sudo ${OT_CLI_CMD} panid 0xface | grep 'Done' || die 'failed to set panid with ot-ctl'
+ fi
+
sudo expect <<EOF > "${OT_OUTPUT}" &
spawn ${OT_CLI_CMD}
send "panid 0xface\r\n"
diff --git a/.travis/check-size b/.travis/check-size
index 69249ab..5ee7d88 100755
--- a/.travis/check-size
+++ b/.travis/check-size
@@ -60,7 +60,7 @@
make -f examples/Makefile-nrf52840 ${OPENTHREAD_FLAGS}
mv output/nrf52840 ../output/nrf52840-b
- git checkout ${MERGE_BASE_SHA}
+ git checkout -f ${MERGE_BASE_SHA}
git submodule update --init
# base branch
@@ -81,6 +81,15 @@
./size-report size ../output/nrf52840-a/bin/ot-ncp-mtd ../output/nrf52840-b/bin/ot-ncp-mtd
./size-report size ../output/nrf52840-a/bin/ot-rcp ../output/nrf52840-b/bin/ot-rcp
+ ./size-report size ../output/nrf52840-a/lib/libopenthread-cli-ftd.a ../output/nrf52840-b/lib/libopenthread-cli-ftd.a
+ ./size-report size ../output/nrf52840-a/lib/libopenthread-cli-mtd.a ../output/nrf52840-b/lib/libopenthread-cli-mtd.a
+ ./size-report size ../output/nrf52840-a/lib/libopenthread-ftd.a ../output/nrf52840-b/lib/libopenthread-ftd.a
+ ./size-report size ../output/nrf52840-a/lib/libopenthread-mtd.a ../output/nrf52840-b/lib/libopenthread-mtd.a
+ ./size-report size ../output/nrf52840-a/lib/libopenthread-ncp-ftd.a ../output/nrf52840-b/lib/libopenthread-ncp-ftd.a
+ ./size-report size ../output/nrf52840-a/lib/libopenthread-ncp-mtd.a ../output/nrf52840-b/lib/libopenthread-ncp-mtd.a
+ ./size-report size ../output/nrf52840-a/lib/libopenthread-rcp.a ../output/nrf52840-b/lib/libopenthread-rcp.a
+ ./size-report size ../output/nrf52840-a/lib/libopenthread-radio.a ../output/nrf52840-b/lib/libopenthread-radio.a
+
./size-report post
}
diff --git a/.travis/script.sh b/.travis/script.sh
index 5005a87..bd39ba2 100755
--- a/.travis/script.sh
+++ b/.travis/script.sh
@@ -59,6 +59,7 @@
-DOPENTHREAD_CONFIG_DIAG_ENABLE=1 \
-DOPENTHREAD_CONFIG_DNS_CLIENT_ENABLE=1 \
-DOPENTHREAD_CONFIG_ECDSA_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE=1 \
-DOPENTHREAD_CONFIG_LEGACY_ENABLE=1 \
-DOPENTHREAD_CONFIG_JAM_DETECTION_ENABLE=1 \
-DOPENTHREAD_CONFIG_JOINER_ENABLE=1 \
@@ -101,6 +102,10 @@
(cd .. && ${TRAVIS_BUILD_DIR}/.travis/check-android-build) || die
}
+[ $BUILD_TARGET != gn-build ] || {
+ (cd ${TRAVIS_BUILD_DIR} && .travis/check-gn-build) || die
+}
+
build_cc1352() {
git checkout -- . || die
git clean -xfd || die
@@ -115,6 +120,13 @@
build_cc2538() {
git checkout -- . || die
git clean -xfd || die
+ mkdir build && cd build || die
+ cmake -GNinja -DCMAKE_TOOLCHAIN_FILE=examples/platforms/cc2538/arm-none-eabi.cmake -DOT_PLATFORM=cc2538 .. || die
+ ninja || die
+ cd .. || die
+
+ git checkout -- . || die
+ git clean -xfd || die
./bootstrap || die
COMMISSIONER=1 JOINER=1 SLAAC=1 DHCP6_CLIENT=1 DHCP6_SERVER=1 DNS_CLIENT=1 make -f examples/Makefile-cc2538 || die
arm-none-eabi-size output/cc2538/bin/ot-cli-ftd || die
@@ -182,9 +194,51 @@
DISABLE_TRANSPORTS=1 make -f examples/Makefile-nrf52811 || die
}
+build_nrf52833() {
+ # Default OpenThread switches for nRF52833 platform
+ OPENTHREAD_FLAGS="BORDER_AGENT=1 BORDER_ROUTER=1 COAP=1 COAPS=1 COMMISSIONER=1 DHCP6_CLIENT=1 DHCP6_SERVER=1 DNS_CLIENT=1 ECDSA=1 FULL_LOGS=1 IP6_FRAGM=1 JOINER=1 LINK_RAW=1 MAC_FILTER=1 MTD_NETDIAG=1 SERVICE=1 SLAAC=1 SNTP_CLIENT=1 UDP_FORWARD=1"
+
+ # UART transport
+ git checkout -- . || die
+ git clean -xfd || die
+ ./bootstrap || die
+ make -f examples/Makefile-nrf52833 $OPENTHREAD_FLAGS || die
+ arm-none-eabi-size output/nrf52833/bin/ot-cli-ftd || die
+ arm-none-eabi-size output/nrf52833/bin/ot-cli-mtd || die
+ arm-none-eabi-size output/nrf52833/bin/ot-ncp-ftd || die
+ arm-none-eabi-size output/nrf52833/bin/ot-ncp-mtd || die
+ arm-none-eabi-size output/nrf52833/bin/ot-rcp || die
+
+ # USB transport
+ git checkout -- . || die
+ git clean -xfd || die
+ ./bootstrap || die
+ USB=1 make -f examples/Makefile-nrf52833 $OPENTHREAD_FLAGS || die
+ arm-none-eabi-size output/nrf52833/bin/ot-cli-ftd || die
+ arm-none-eabi-size output/nrf52833/bin/ot-cli-mtd || die
+ arm-none-eabi-size output/nrf52833/bin/ot-ncp-ftd || die
+ arm-none-eabi-size output/nrf52833/bin/ot-ncp-mtd || die
+ arm-none-eabi-size output/nrf52833/bin/ot-rcp || die
+
+ # SPI transport for NCP
+ git checkout -- . || die
+ git clean -xfd || die
+ ./bootstrap || die
+ NCP_SPI=1 make -f examples/Makefile-nrf52833 $OPENTHREAD_FLAGS || die
+ arm-none-eabi-size output/nrf52833/bin/ot-ncp-ftd || die
+ arm-none-eabi-size output/nrf52833/bin/ot-ncp-mtd || die
+ arm-none-eabi-size output/nrf52833/bin/ot-rcp || die
+
+ # Build without transport (no CLI or NCP applications)
+ git checkout -- . || die
+ git clean -xfd || die
+ ./bootstrap || die
+ DISABLE_TRANSPORTS=1 make -f examples/Makefile-nrf52833 $OPENTHREAD_FLAGS || die
+}
+
build_nrf52840() {
# Default OpenThread switches for nRF52840 platform
- OPENTHREAD_FLAGS="BORDER_AGENT=1 BORDER_ROUTER=1 COAP=1 COAPS=1 COMMISSIONER=1 SLAAC=1 DHCP6_CLIENT=1 DHCP6_SERVER=1 DNS_CLIENT=1 ECDSA=1 FULL_LOGS=1 JOINER=1 LINK_RAW=1 MAC_FILTER=1 MTD_NETDIAG=1 SERVICE=1 SNTP_CLIENT=1 UDP_FORWARD=1"
+ OPENTHREAD_FLAGS="BORDER_AGENT=1 BORDER_ROUTER=1 COAP=1 COAPS=1 COMMISSIONER=1 DEBUG=1 DHCP6_CLIENT=1 DHCP6_SERVER=1 DNS_CLIENT=1 ECDSA=1 FULL_LOGS=1 IP6_FRAGM=1 JOINER=1 LINK_RAW=1 MAC_FILTER=1 MTD_NETDIAG=1 SERVICE=1 SLAAC=1 SNTP_CLIENT=1 UDP_FORWARD=1"
# UART transport
git checkout -- . || die
@@ -222,6 +276,28 @@
git clean -xfd || die
./bootstrap || die
DISABLE_TRANSPORTS=1 make -f examples/Makefile-nrf52840 $OPENTHREAD_FLAGS || die
+
+ # Software cryptography
+ git checkout -- . || die
+ git clean -xfd || die
+ ./bootstrap || die
+ DISABLE_BUILTIN_MBEDTLS=0 make -f examples/Makefile-nrf52840 $OPENTHREAD_FLAGS || die
+ arm-none-eabi-size output/nrf52840/bin/ot-cli-ftd || die
+ arm-none-eabi-size output/nrf52840/bin/ot-cli-mtd || die
+ arm-none-eabi-size output/nrf52840/bin/ot-ncp-ftd || die
+ arm-none-eabi-size output/nrf52840/bin/ot-ncp-mtd || die
+ arm-none-eabi-size output/nrf52840/bin/ot-rcp || die
+
+ # Software cryptography with threading support
+ git checkout -- . || die
+ git clean -xfd || die
+ ./bootstrap || die
+ DISABLE_BUILTIN_MBEDTLS=0 MBEDTLS_THREADING=1 make -f examples/Makefile-nrf52840 $OPENTHREAD_FLAGS || die
+ arm-none-eabi-size output/nrf52840/bin/ot-cli-ftd || die
+ arm-none-eabi-size output/nrf52840/bin/ot-cli-mtd || die
+ arm-none-eabi-size output/nrf52840/bin/ot-ncp-ftd || die
+ arm-none-eabi-size output/nrf52840/bin/ot-ncp-mtd || die
+ arm-none-eabi-size output/nrf52840/bin/ot-rcp || die
}
build_qpg6095() {
@@ -258,6 +334,7 @@
build_cc2652
build_kw41z
build_nrf52811
+ build_nrf52833
build_nrf52840
build_qpg6095
build_samr21
@@ -272,6 +349,7 @@
build_cc2652
build_kw41z
build_nrf52811
+ build_nrf52833
build_nrf52840
build_qpg6095
build_samr21
@@ -286,6 +364,7 @@
build_cc2652
build_kw41z
build_nrf52811
+ build_nrf52833
build_nrf52840
build_qpg6095
build_samr21
@@ -300,6 +379,7 @@
build_cc2652
build_kw41z
build_nrf52811
+ build_nrf52833
build_nrf52840
build_qpg6095
build_samr21
@@ -314,6 +394,22 @@
build_cc2652
build_kw41z
build_nrf52811
+ build_nrf52833
+ build_nrf52840
+ build_qpg6095
+ build_samr21
+}
+
+[ $BUILD_TARGET != arm-gcc-9 ] || {
+ export PATH=/tmp/gcc-arm-none-eabi-9-2019-q4-major/bin:$PATH || die
+
+ build_cc1352
+ build_cc2538
+ build_cc2650
+ build_cc2652
+ build_kw41z
+ build_nrf52811
+ build_nrf52833
build_nrf52840
build_qpg6095
build_samr21
@@ -322,6 +418,13 @@
[ $BUILD_TARGET != posix ] || {
git checkout -- . || die
git clean -xfd || die
+ mkdir build && cd build || die
+ cmake -GNinja -DOT_PLATFORM=posix .. || die
+ ninja || die
+ cd .. || die
+
+ git checkout -- . || die
+ git clean -xfd || die
./bootstrap || die
CPPFLAGS=-DOPENTHREAD_CONFIG_LOG_LEVEL=OT_LOG_LEVEL_NONE make -f examples/Makefile-posix || die
@@ -330,6 +433,52 @@
./bootstrap || die
CPPFLAGS=-DOPENTHREAD_CONFIG_LOG_LEVEL=OT_LOG_LEVEL_DEBG make -f examples/Makefile-posix || die
+ export CPPFLAGS=" \
+ -DOPENTHREAD_CONFIG_ANNOUNCE_SENDER_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_BORDER_AGENT_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_CHANNEL_MANAGER_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_CHILD_SUPERVISION_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_COAP_API_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_COAP_SECURE_API_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_COMMISSIONER_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_DHCP6_SERVER_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_DIAG_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_DNS_CLIENT_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_ECDSA_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_IP6_SLAAC_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_LEGACY_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_MAC_BEACON_RSP_WHEN_JOINABLE_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_MLE_ATTACH_BACKOFF_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_MLE_STEERING_DATA_SET_OOB_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_MPL_DYNAMIC_INTERVAL_ENABLE \
+ -DOPENTHREAD_CONFIG_JAM_DETECTION_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_JOINER_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_LINK_RAW_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_MAC_FILTER_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_NCP_UART_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_PLATFORM_NETIF_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_PLATFORM_USEC_TIMER_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_REFERENCE_DEVICE_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_SNTP_CLIENT_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_SOFTWARE_ACK_TIMEOUT_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_SOFTWARE_CSMA_BACKOFF_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_SOFTWARE_ENERGY_SCAN_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_SOFTWARE_RETRANSMIT_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_TMF_NETWORK_DIAG_MTD_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_UDP_FORWARD_ENABLE=1"
+
+ git checkout -- . || die
+ git clean -xfd || die
+ ./bootstrap || die
+ make -f examples/Makefile-posix || die
+
export CPPFLAGS=" \
-DOPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE=1 \
-DOPENTHREAD_CONFIG_CHANNEL_MANAGER_ENABLE=1 \
@@ -350,6 +499,11 @@
git checkout -- . || die
git clean -xfd || die
./bootstrap || die
+ CPPFLAGS=-DOPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_ENABLE=1 make -f examples/Makefile-posix || die
+
+ git checkout -- . || die
+ git clean -xfd || die
+ ./bootstrap || die
./configure \
--enable-ncp \
--enable-ftd \
@@ -387,6 +541,22 @@
--enable-radio-only \
--with-examples=posix || die
make -j 8 || die
+
+ export CPPFLAGS=" \
+ -DOPENTHREAD_CONFIG_NCP_UART_ENABLE=1"
+
+ git checkout -- . || die
+ git clean -xfd || die
+ ./bootstrap || die
+ ./configure \
+ --enable-ncp \
+ --enable-ftd \
+ --enable-mtd \
+ --with-examples=posix \
+ --disable-docs \
+ --disable-tests \
+ --with-ncp-vendor-hook-source=./src/ncp/example_vendor_hook.cpp || die
+ make -j 8 || die
}
[ $BUILD_TARGET != posix-distcheck ] || {
@@ -412,10 +582,30 @@
}
[ $BUILD_TARGET != posix-app-pty ] || {
+ # check daemon mode
+ git checkout -- . || die
+ git clean -xfd || die
+ mkdir build && cd build || die
+ cmake -GNinja -DOT_PLATFORM=posix-host -DOT_DAEMON=ON .. || die
+ ninja || die
+ cd .. || die
+
+ git checkout -- . || die
+ git clean -xfd || die
+ mkdir build && cd build || die
+ cmake -GNinja -DOT_PLATFORM=posix-host .. || die
+ ninja || die
+ cd .. || die
+
./bootstrap
.travis/check-posix-app-pty || die
}
+[ $BUILD_TARGET != posix-app-migrate ] || {
+ ./bootstrap
+ .travis/check-ncp-rcp-migrate || die
+}
+
[ $BUILD_TARGET != posix-mtd ] || {
./bootstrap || die
REFERENCE_DEVICE=1 COVERAGE=1 CFLAGS=-m32 CXXFLAGS=-m32 LDFLAGS=-m32 USE_MTD=1 make -f examples/Makefile-posix check || die
@@ -436,13 +626,18 @@
REFERENCE_DEVICE=1 COVERAGE=1 PYTHONUNBUFFERED=1 OT_NCP_PATH="$(pwd)/$(ls output/posix/*/bin/ot-ncp)" RADIO_DEVICE="$(pwd)/$(ls output/*/bin/ot-rcp)" NODE_TYPE=ncp-sim make -f src/posix/Makefile-posix check || die
}
+[ $BUILD_TARGET != posix-app-spi ] || {
+ ./bootstrap || die
+ REFERENCE_DEVICE=1 READLINE=readline RCP_SPI=1 make -f src/posix/Makefile-posix || die
+}
+
[ $BUILD_TARGET != posix-ncp ] || {
./bootstrap || die
REFERENCE_DEVICE=1 COVERAGE=1 PYTHONUNBUFFERED=1 NODE_TYPE=ncp-sim make -f examples/Makefile-posix check || die
}
[ $BUILD_TARGET != toranj-test-framework ] || {
- ./tests/toranj/start.sh || die
+ top_builddir=$(pwd)/build/toranj ./tests/toranj/start.sh || die
}
[ $BUILD_TARGET != osx ] || {
diff --git a/AUTHORS b/AUTHORS
index eda2206..3c928c6 100644
--- a/AUTHORS
+++ b/AUTHORS
@@ -15,3 +15,4 @@
NXP Semiconductors
Synopsys, Inc.
Cascoda Limited
+Silicon Laboratories, Inc
diff --git a/Android.mk b/Android.mk
index 184c40f..2fddabf 100644
--- a/Android.mk
+++ b/Android.mk
@@ -30,8 +30,11 @@
OPENTHREAD_DEFAULT_VERSION := $(shell cat $(LOCAL_PATH)/.default-version)
OPENTHREAD_SOURCE_VERSION := $(shell git -C $(LOCAL_PATH) describe --always --match "[0-9].*" 2> /dev/null)
+OPENTHREAD_PROJECT_CFLAGS ?= -DOPENTHREAD_PROJECT_CORE_CONFIG_FILE=\"openthread-core-posix-config.h\"
OPENTHREAD_COMMON_FLAGS := \
+ -DOPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE=1 \
+ -DOPENTHREAD_CONFIG_MAC_FILTER_ENABLE=1 \
-DPACKAGE=\"openthread\" \
-DPACKAGE_BUGREPORT=\"openthread-devel@googlegroups.com\" \
-DPACKAGE_NAME=\"OPENTHREAD\" \
@@ -77,6 +80,7 @@
LOCAL_MODULE_TAGS := eng
LOCAL_C_INCLUDES := \
+ $(OPENTHREAD_PROJECT_INCLUDES) \
$(LOCAL_PATH)/include \
$(LOCAL_PATH)/src \
$(LOCAL_PATH)/src/cli \
@@ -95,7 +99,9 @@
-DOPENTHREAD_CONFIG_POSIX_APP_ENABLE_PTY_DEVICE=1 \
-DOPENTHREAD_FTD=1 \
-DOPENTHREAD_POSIX=1 \
+ -DOPENTHREAD_POSIX_RCP_UART_ENABLE=1 \
-DSPINEL_PLATFORM_HEADER=\"spinel_platform.h\" \
+ $(OPENTHREAD_PROJECT_CFLAGS) \
$(NULL)
LOCAL_CPPFLAGS := \
@@ -159,6 +165,7 @@
src/core/mac/mac.cpp \
src/core/mac/mac_filter.cpp \
src/core/mac/mac_frame.cpp \
+ src/core/mac/mac_types.cpp \
src/core/mac/sub_mac.cpp \
src/core/mac/sub_mac_callbacks.cpp \
src/core/meshcop/announce_begin_client.cpp \
@@ -220,9 +227,6 @@
src/core/utils/child_supervision.cpp \
src/core/utils/heap.cpp \
src/core/utils/jam_detector.cpp \
- src/core/utils/missing_strlcpy.c \
- src/core/utils/missing_strlcat.c \
- src/core/utils/missing_strnlen.c \
src/core/utils/parse_cmdline.cpp \
src/core/utils/slaac_address.cpp \
src/ncp/hdlc.cpp \
@@ -236,6 +240,7 @@
src/posix/platform/misc.c \
src/posix/platform/radio_spinel.cpp \
src/posix/platform/settings.cpp \
+ src/posix/platform/spi_interface.cpp \
src/posix/platform/system.c \
src/posix/platform/uart.c \
third_party/mbedtls/repo/library/md.c \
@@ -263,16 +268,9 @@
third_party/mbedtls/repo/library/ssl_tls.c \
third_party/mbedtls/repo/library/aes.c \
third_party/mbedtls/repo/library/ecp.c \
+ $(OPENTHREAD_PROJECT_SRC_FILES) \
$(NULL)
-include $(OT_EXTRA_BUILD_CONFIG)
-
-ifeq ($(filter -DOPENTHREAD_PROJECT_CORE_CONFIG_FILE=%,$(LOCAL_CFLAGS)),)
-LOCAL_CFLAGS += \
- -DOPENTHREAD_PROJECT_CORE_CONFIG_FILE=\"openthread-core-posix-config.h\" \
- $(NULL)
-endif
-
include $(BUILD_STATIC_LIBRARY)
include $(CLEAR_VARS)
@@ -281,6 +279,7 @@
LOCAL_MODULE_TAGS := eng
LOCAL_C_INCLUDES := \
+ $(OPENTHREAD_PROJECT_INCLUDES) \
$(LOCAL_PATH)/include \
$(LOCAL_PATH)/src \
$(LOCAL_PATH)/src/cli \
@@ -299,7 +298,9 @@
-DOPENTHREAD_FTD=1 \
-DOPENTHREAD_POSIX=1 \
-DOPENTHREAD_POSIX_APP_TYPE=2 \
+ -DOPENTHREAD_POSIX_RCP_UART_ENABLE=1 \
-DSPINEL_PLATFORM_HEADER=\"spinel_platform.h\" \
+ $(OPENTHREAD_PROJECT_CFLAGS) \
$(NULL)
LOCAL_CPPFLAGS := \
@@ -322,14 +323,6 @@
src/posix/main.c \
$(NULL)
-include $(OT_EXTRA_BUILD_CONFIG)
-
-ifeq ($(filter -DOPENTHREAD_PROJECT_CORE_CONFIG_FILE=%,$(LOCAL_CFLAGS)),)
-LOCAL_CFLAGS += \
- -DOPENTHREAD_PROJECT_CORE_CONFIG_FILE=\"openthread-core-posix-config.h\" \
- $(NULL)
-endif
-
LOCAL_STATIC_LIBRARIES = ot-core
include $(BUILD_EXECUTABLE)
@@ -339,6 +332,7 @@
LOCAL_MODULE_TAGS := eng
LOCAL_C_INCLUDES := \
+ $(OPENTHREAD_PROJECT_INCLUDES) \
$(LOCAL_PATH)/include \
$(LOCAL_PATH)/src \
$(LOCAL_PATH)/src/core \
@@ -356,7 +350,9 @@
-DOPENTHREAD_FTD=1 \
-DOPENTHREAD_POSIX=1 \
-DOPENTHREAD_POSIX_APP_TYPE=1 \
+ -DOPENTHREAD_POSIX_RCP_UART_ENABLE=1 \
-DSPINEL_PLATFORM_HEADER=\"spinel_platform.h\" \
+ $(OPENTHREAD_PROJECT_CFLAGS) \
$(NULL)
LOCAL_CPPFLAGS := \
@@ -377,13 +373,5 @@
src/posix/main.c \
$(NULL)
-include $(OT_EXTRA_BUILD_CONFIG)
-
-ifeq ($(filter -DOPENTHREAD_PROJECT_CORE_CONFIG_FILE=%,$(LOCAL_CFLAGS)),)
-LOCAL_CFLAGS += \
- -DOPENTHREAD_PROJECT_CORE_CONFIG_FILE=\"openthread-core-posix-config.h\" \
- $(NULL)
-endif
-
LOCAL_STATIC_LIBRARIES = ot-core
include $(BUILD_EXECUTABLE)
diff --git a/BUILD.gn b/BUILD.gn
new file mode 100644
index 0000000..a9dff17
--- /dev/null
+++ b/BUILD.gn
@@ -0,0 +1,218 @@
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+static_library("lib-ot-core") {
+
+ cflags_cc = [ "-Wno-non-virtual-dtor" ]
+
+ sources = [
+ "src/core/api/border_agent_api.cpp",
+ "src/core/api/border_router_api.cpp",
+ "src/core/api/channel_manager_api.cpp",
+ "src/core/api/channel_monitor_api.cpp",
+ "src/core/api/child_supervision_api.cpp",
+ "src/core/api/coap_api.cpp",
+ "src/core/api/coap_secure_api.cpp",
+ "src/core/api/commissioner_api.cpp",
+ "src/core/api/crypto_api.cpp",
+ "src/core/api/dataset_api.cpp",
+ "src/core/api/dataset_ftd_api.cpp",
+ "src/core/api/diags_api.cpp",
+ "src/core/api/dns_api.cpp",
+ "src/core/api/entropy_api.cpp",
+ "src/core/api/heap_api.cpp",
+ "src/core/api/icmp6_api.cpp",
+ "src/core/api/instance_api.cpp",
+ "src/core/api/ip6_api.cpp",
+ "src/core/api/jam_detection_api.cpp",
+ "src/core/api/joiner_api.cpp",
+ "src/core/api/link_api.cpp",
+ "src/core/api/link_raw_api.cpp",
+ "src/core/api/logging_api.cpp",
+ "src/core/api/message_api.cpp",
+ "src/core/api/netdata_api.cpp",
+ "src/core/api/network_time_api.cpp",
+ "src/core/api/random_crypto_api.cpp",
+ "src/core/api/random_noncrypto_api.cpp",
+ "src/core/api/server_api.cpp",
+ "src/core/api/sntp_api.cpp",
+ "src/core/api/tasklet_api.cpp",
+ "src/core/api/thread_api.cpp",
+ "src/core/api/thread_ftd_api.cpp",
+ "src/core/api/udp_api.cpp",
+ "src/core/coap/coap.cpp",
+ "src/core/coap/coap_message.cpp",
+ "src/core/coap/coap_secure.cpp",
+ "src/core/common/crc16.cpp",
+ "src/core/common/extension_example.cpp",
+ "src/core/common/instance.cpp",
+ "src/core/common/logging.cpp",
+ "src/core/common/message.cpp",
+ "src/core/common/notifier.cpp",
+ "src/core/common/random_manager.cpp",
+ "src/core/common/settings.cpp",
+ "src/core/common/string.cpp",
+ "src/core/common/tasklet.cpp",
+ "src/core/common/timer.cpp",
+ "src/core/common/tlvs.cpp",
+ "src/core/common/trickle_timer.cpp",
+ "src/core/crypto/aes_ccm.cpp",
+ "src/core/crypto/aes_ecb.cpp",
+ "src/core/crypto/ecdsa.cpp",
+ "src/core/crypto/hmac_sha256.cpp",
+ "src/core/crypto/mbedtls.cpp",
+ "src/core/crypto/pbkdf2_cmac.cpp",
+ "src/core/crypto/sha256.cpp",
+ "src/core/diags/factory_diags.cpp",
+ "src/core/mac/channel_mask.cpp",
+ "src/core/mac/data_poll_handler.cpp",
+ "src/core/mac/data_poll_sender.cpp",
+ "src/core/mac/link_raw.cpp",
+ "src/core/mac/mac.cpp",
+ "src/core/mac/mac_filter.cpp",
+ "src/core/mac/mac_frame.cpp",
+ "src/core/mac/mac_types.cpp",
+ "src/core/mac/sub_mac_callbacks.cpp",
+ "src/core/mac/sub_mac.cpp",
+ "src/core/meshcop/announce_begin_client.cpp",
+ "src/core/meshcop/border_agent.cpp",
+ "src/core/meshcop/commissioner.cpp",
+ "src/core/meshcop/dataset.cpp",
+ "src/core/meshcop/dataset_local.cpp",
+ "src/core/meshcop/dataset_manager.cpp",
+ "src/core/meshcop/dataset_manager_ftd.cpp",
+ "src/core/meshcop/dtls.cpp",
+ "src/core/meshcop/energy_scan_client.cpp",
+ "src/core/meshcop/joiner.cpp",
+ "src/core/meshcop/joiner_router.cpp",
+ "src/core/meshcop/leader.cpp",
+ "src/core/meshcop/meshcop.cpp",
+ "src/core/meshcop/meshcop_tlvs.cpp",
+ "src/core/meshcop/panid_query_client.cpp",
+ "src/core/meshcop/timestamp.cpp",
+ "src/core/net/dhcp6_client.cpp",
+ "src/core/net/dhcp6_server.cpp",
+ "src/core/net/dns_client.cpp",
+ "src/core/net/icmp6.cpp",
+ "src/core/net/ip6_address.cpp",
+ "src/core/net/ip6.cpp",
+ "src/core/net/ip6_filter.cpp",
+ "src/core/net/ip6_headers.cpp",
+ "src/core/net/ip6_mpl.cpp",
+ "src/core/net/netif.cpp",
+ "src/core/net/sntp_client.cpp",
+ "src/core/net/udp6.cpp",
+ "src/core/radio/radio_callbacks.cpp",
+ "src/core/radio/radio_platform.cpp",
+ "src/core/thread/address_resolver.cpp",
+ "src/core/thread/announce_begin_server.cpp",
+ "src/core/thread/announce_sender.cpp",
+ "src/core/thread/child_table.cpp",
+ "src/core/thread/device_mode.cpp",
+ "src/core/thread/energy_scan_server.cpp",
+ "src/core/thread/indirect_sender.cpp",
+ "src/core/thread/key_manager.cpp",
+ "src/core/thread/link_quality.cpp",
+ "src/core/thread/lowpan.cpp",
+ "src/core/thread/mesh_forwarder.cpp",
+ "src/core/thread/mesh_forwarder_ftd.cpp",
+ "src/core/thread/mesh_forwarder_mtd.cpp",
+ "src/core/thread/mle.cpp",
+ "src/core/thread/mle_router.cpp",
+ "src/core/thread/network_data.cpp",
+ "src/core/thread/network_data_leader.cpp",
+ "src/core/thread/network_data_leader_ftd.cpp",
+ "src/core/thread/network_data_local.cpp",
+ "src/core/thread/network_diagnostic.cpp",
+ "src/core/thread/panid_query_server.cpp",
+ "src/core/thread/router_table.cpp",
+ "src/core/thread/src_match_controller.cpp",
+ "src/core/thread/thread_netif.cpp",
+ "src/core/thread/time_sync_service.cpp",
+ "src/core/thread/topology.cpp",
+ "src/core/utils/channel_manager.cpp",
+ "src/core/utils/channel_monitor.cpp",
+ "src/core/utils/child_supervision.cpp",
+ "src/core/utils/heap.cpp",
+ "src/core/utils/jam_detector.cpp",
+ "src/core/utils/parse_cmdline.cpp",
+ "src/core/utils/slaac_address.cpp",
+ "src/ncp/hdlc.cpp",
+ "src/ncp/spinel.c",
+ "src/ncp/spinel_decoder.cpp",
+ "src/ncp/spinel_encoder.cpp",
+ "third_party/mbedtls/repo/library/md.c",
+ "third_party/mbedtls/repo/library/md_wrap.c",
+ "third_party/mbedtls/repo/library/memory_buffer_alloc.c",
+ "third_party/mbedtls/repo/library/platform.c",
+ "third_party/mbedtls/repo/library/platform_util.c",
+ "third_party/mbedtls/repo/library/sha256.c",
+ "third_party/mbedtls/repo/library/bignum.c",
+ "third_party/mbedtls/repo/library/ccm.c",
+ "third_party/mbedtls/repo/library/cipher.c",
+ "third_party/mbedtls/repo/library/cipher_wrap.c",
+ "third_party/mbedtls/repo/library/cmac.c",
+ "third_party/mbedtls/repo/library/ctr_drbg.c",
+ "third_party/mbedtls/repo/library/debug.c",
+ "third_party/mbedtls/repo/library/ecjpake.c",
+ "third_party/mbedtls/repo/library/ecp_curves.c",
+ "third_party/mbedtls/repo/library/entropy.c",
+ "third_party/mbedtls/repo/library/entropy_poll.c",
+ "third_party/mbedtls/repo/library/ssl_cookie.c",
+ "third_party/mbedtls/repo/library/ssl_ciphersuites.c",
+ "third_party/mbedtls/repo/library/ssl_cli.c",
+ "third_party/mbedtls/repo/library/ssl_srv.c",
+ "third_party/mbedtls/repo/library/ssl_ticket.c",
+ "third_party/mbedtls/repo/library/ssl_tls.c",
+ "third_party/mbedtls/repo/library/aes.c",
+ "third_party/mbedtls/repo/library/ecp.c"
+ ]
+
+ # Remove the example as it is not meant for compilation
+ sources -= [
+ "src/core/common/extension_example.cpp",
+ ]
+
+ include_dirs = [
+ "include",
+ "src",
+ "src/core",
+ "src/ncp",
+ "third_party",
+ "third_party/mbedtls",
+ "third_party/mbedtls/repo/include"
+ ]
+
+ defines = [
+ "MBEDTLS_CONFIG_FILE=\"mbedtls-config.h\"",
+ "OPENTHREAD_FTD=1",
+ "SPINEL_PLATFORM_HEADER=\"spinel_platform.h\"",
+ "OPENTHREAD_CONFIG_FILE=<openthread-config-android.h>",
+ "PACKAGE_NAME=\"OPENTHREAD-CORE\"",
+ "PACKAGE_VERSION=\"1.0.0\""
+ ]
+}
diff --git a/CMakeLists.txt b/CMakeLists.txt
new file mode 100644
index 0000000..e81b3fb
--- /dev/null
+++ b/CMakeLists.txt
@@ -0,0 +1,105 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+cmake_minimum_required(VERSION 3.13.1)
+project(openthread)
+
+option(OT_BUILD_EXECUTABLES "Build executables" ON)
+option(OT_BUILTIN_MBEDTLS "Enable builtin mbedTLS" ON)
+
+include("${PROJECT_SOURCE_DIR}/etc/cmake/checks.cmake")
+include("${PROJECT_SOURCE_DIR}/etc/cmake/options.cmake")
+include("${PROJECT_SOURCE_DIR}/etc/cmake/functions.cmake")
+
+file(READ .default-version OT_DEFAULT_VERSION)
+execute_process(
+ COMMAND bash "-c" "third_party/nlbuild-autotools/repo/scripts/mkversion -b ${OT_DEFAULT_VERSION}"
+ WORKING_DIRECTORY ${PROJECT_SOURCE_DIR}
+ OUTPUT_VARIABLE OT_VERSION OUTPUT_STRIP_TRAILING_WHITESPACE
+)
+message(STATUS "Version: ${OT_VERSION}")
+
+list(APPEND OT_PRIVATE_DEFINES
+ "PACKAGE_NAME=\"OPENTHREAD\""
+ "PACKAGE_VERSION=\"${OT_VERSION}\""
+)
+
+set(OT_PLATFORM "none" CACHE STRING "Target platform chosen by the user at configure time")
+
+ot_get_platforms(OT_EXAMPLE_PLATFORMS)
+set_property(CACHE OT_PLATFORM PROPERTY STRINGS ${OT_EXAMPLE_PLATFORMS})
+if(NOT OT_PLATFORM IN_LIST OT_EXAMPLE_PLATFORMS)
+ if(NOT OT_PLATFORM STREQUAL "posix-host")
+ message(FATAL_ERROR "Platform unknown: ${OT_PLATFORM}")
+ endif()
+endif()
+
+# OT_CONFIG allows users to specify the path to OpenThread project core
+# config header file. The default value of this parameter is empty string.
+# When not specified by user (value is ""), a platform cmake file may
+# choose to change this variable to provide its own core config header
+# file instead.
+
+set(OT_CONFIG "" CACHE STRING "OpenThread project-specific config header file chosen by user at configure time")
+
+list(APPEND OT_PUBLIC_INCLUDES ${PROJECT_BINARY_DIR}/etc/cmake)
+list(APPEND OT_PUBLIC_INCLUDES ${PROJECT_SOURCE_DIR}/etc/cmake)
+list(APPEND OT_PUBLIC_INCLUDES ${PROJECT_SOURCE_DIR}/include)
+
+if(OT_PLATFORM STREQUAL "posix-host")
+ list(APPEND OT_PRIVATE_INCLUDES ${PROJECT_SOURCE_DIR}/src/posix/platform)
+ add_subdirectory("${PROJECT_SOURCE_DIR}/src/posix/platform")
+elseif(NOT OT_PLATFORM MATCHES "none")
+ list(APPEND OT_PRIVATE_INCLUDES ${PROJECT_SOURCE_DIR}/examples/platforms/${OT_PLATFORM})
+ add_subdirectory("${PROJECT_SOURCE_DIR}/examples/platforms/${OT_PLATFORM}")
+endif()
+
+if(OT_CONFIG)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_PROJECT_CORE_CONFIG_FILE=\"${OT_CONFIG}\"")
+ message(STATUS "Project core config: \"${OT_CONFIG}\"")
+endif()
+
+list(APPEND OT_PRIVATE_DEFINES ${OT_PLATFORM_DEFINES})
+
+if(OT_BUILTIN_MBEDTLS)
+ list(APPEND OT_PRIVATE_INCLUDES ${PROJECT_SOURCE_DIR}/third_party/mbedtls)
+ list(APPEND OT_PRIVATE_INCLUDES ${PROJECT_SOURCE_DIR}/third_party/mbedtls/repo/include)
+
+ list(APPEND OT_PRIVATE_DEFINES
+ "MBEDTLS_CONFIG_FILE=\"mbedtls-config.h\""
+ )
+endif()
+
+if(OT_PLATFORM STREQUAL "posix-host")
+ add_subdirectory(src/posix)
+elseif(NOT OT_PLATFORM MATCHES "none")
+ add_subdirectory(examples)
+endif()
+
+add_subdirectory(src)
+add_subdirectory(third_party)
diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md
index 2196e2e..30cf327 100644
--- a/CONTRIBUTING.md
+++ b/CONTRIBUTING.md
@@ -51,12 +51,9 @@
### Contributor License Agreement (CLA)
-The OpenThread Project requires all contributors to sign a Contributor License Agreement ([individual](https://developers.google.com/open-source/cla/individual) or [corporate](https://developers.google.com/open-source/cla/corporate)) in order to protect contributors, users, and Google in issues of intellectual property.
+Contributions to this project must be accompanied by a Contributor License Agreement. You (or your employer) retain the copyright to your contribution; this simply gives us permission to use and redistribute your contributions as part of the project. Head over to <https://cla.developers.google.com/> to see your current agreements on file or to sign a new one.
-With each Pull Request, an automated check occurs to verify that you have signed the CLA. Make sure that you sign the CLA with the same email address associated with your commits (i.e. via the `user.email` Git config as described on GitHub's [Set up Git](https://help.github.com/articles/set-up-git/) page.
-
-NOTE: Only original source code from you and other people that have signed the CLA can be accepted into the repository. This policy does not apply to [third_party](https://github.com/openthread/openthread/tree/master/third_party).
-
+You generally only need to submit a CLA once, so if you've already submitted one (even if it was for a different project), you probably don't need to do it again.
### Submitting a Pull Request
diff --git a/STYLE_GUIDE.md b/STYLE_GUIDE.md
index 3e466bf..c988752 100644
--- a/STYLE_GUIDE.md
+++ b/STYLE_GUIDE.md
@@ -177,7 +177,7 @@
## Standards
-- OpenThread uses and enforces both Python 2 and Python 3. Support for Python 2 is a result of the fact that some current Linux distributions and Macs are still using 2.x as default.
+- OpenThread uses and enforces Python 3.
## Conventions and Best Practices
diff --git a/configure.ac b/configure.ac
index a48b45b..d9f51b8 100644
--- a/configure.ac
+++ b/configure.ac
@@ -170,12 +170,6 @@
then
AC_MSG_RESULT([yes])
AC_NO_EXECUTABLES
- # Here we guess conservative values for tests that require link checks
- # to test for these features. This will prevent these checks from
- # being performed later in the configuration process.
- ac_cv_func_strlcat=${ac_cv_func_strlcat-no}
- ac_cv_func_strlcpy=${ac_cv_func_strlcpy-no}
- ac_cv_func_strnlen=${ac_cv_func_strnlen-no}
else
AC_MSG_RESULT([no])
fi
@@ -222,6 +216,11 @@
AC_PATH_PROG(CMP, cmp)
+# Check for and initialize libtool
+
+LT_INIT
+AC_PROG_LIBTOOL
+
#
# Checks for specific compiler characteristics
#
@@ -232,8 +231,8 @@
# -Wall CC, CXX
#
-PROSPECTIVE_CFLAGS="-Wall -Wextra -Wshadow -Werror -std=c99 -pedantic-errors"
-PROSPECTIVE_CXXFLAGS="-Wall -Wextra -Wshadow -Werror -std=gnu++98 -Wno-c++14-compat -fno-exceptions"
+PROSPECTIVE_CFLAGS="-Wall -Wextra -Wshadow -Wundef -Werror -Wno-error=undef -std=c99 -pedantic-errors"
+PROSPECTIVE_CXXFLAGS="-Wall -Wextra -Wshadow -Wundef -Werror -Wno-error=undef -std=gnu++98 -Wno-c++14-compat -fno-exceptions"
AC_CACHE_CHECK([whether $CC is Clang],
[nl_cv_clang],
@@ -250,17 +249,60 @@
])
if test "${nl_cv_clang}" = "yes"; then
- PROSPECTIVE_CFLAGS="${PROSPECTIVE_CFLAGS} -Wconversion"
+ PROSPECTIVE_CFLAGS="${PROSPECTIVE_CFLAGS} -Wconversion -Wno-gnu-zero-variadic-macro-arguments"
PROSPECTIVE_CXXFLAGS="${PROSPECTIVE_CXXFLAGS} -Wconversion"
fi
-AX_CHECK_COMPILER_OPTIONS([C], ${PROSPECTIVE_CFLAGS})
-AX_CHECK_COMPILER_OPTIONS([C++], ${PROSPECTIVE_CXXFLAGS})
+function convert_warning_flags_to_positive() {
+ flags_to_check=""
+ warning_flag_backup=""
+ for option in ${1}; do
+ case "$option"
+ in
+ -Wno-*)
+ flags_to_check="${flags_to_check} -W${option##-Wno-}"
+ warning_flag_backup="${warning_flag_backup} ${option##-Wno-}";;
+ *)
+ flags_to_check="${flags_to_check} ${option}";;
+ esac
+ done
+}
-# Check for and initialize libtool
+function restore_negative_form_of_warning_flags() {
+ final_flags=${1}
+ for positive_option in ${warning_flag_backup}; do
+ final_flags=$(echo $ECHO_N $final_flags | $SED "s|-W${positive_option}|-Wno-${positive_option}|g")
+ done
+ unset flags_to_check
+ unset warning_flag_backup
+}
-LT_INIT
-AC_PROG_LIBTOOL
+function check_prospective_CFLAGS() {
+ if test "${nl_cv_clang}" = "yes"; then
+ AX_CHECK_COMPILER_OPTIONS([C], ${PROSPECTIVE_CFLAGS})
+ else
+ convert_warning_flags_to_positive "${PROSPECTIVE_CFLAGS}"
+ AX_CHECK_COMPILER_OPTIONS([C], ${flags_to_check})
+ restore_negative_form_of_warning_flags "${CFLAGS}"
+ CFLAGS=${final_flags}
+ unset final_flags
+ fi
+}
+
+function check_prospective_CXXFLAGS() {
+ if test "${nl_cv_clang}" = "yes"; then
+ AX_CHECK_COMPILER_OPTIONS([C++], ${PROSPECTIVE_CXXFLAGS})
+ else
+ convert_warning_flags_to_positive "${PROSPECTIVE_CXXFLAGS}"
+ AX_CHECK_COMPILER_OPTIONS([C++], ${flags_to_check})
+ restore_negative_form_of_warning_flags "${CXXFLAGS}"
+ CXXFLAGS=${final_flags}
+ unset final_flags
+ fi
+}
+
+check_prospective_CFLAGS
+check_prospective_CXXFLAGS
# Disable building shared libraries by default (can be enabled with --enable-shared)
@@ -322,7 +364,7 @@
if test "${enable_fuzz_targets}" = "no" ; then
PROSPECTIVE_CXXFLAGS="-fno-rtti"
- AX_CHECK_COMPILER_OPTIONS([C++], ${PROSPECTIVE_CXXFLAGS})
+ check_prospective_CXXFLAGS
fi
# Address Sanitizer
@@ -351,11 +393,11 @@
if test "${enable_address_sanitizer}" = "yes" ; then
PROSPECTIVE_CFLAGS="-fsanitize=address"
+ PROSPECTIVE_CXXFLAGS="-fsanitize=address"
# Check if the compilers support address sanitizer
- AX_CHECK_COMPILER_OPTIONS([C], ${PROSPECTIVE_CFLAGS})
- AX_CHECK_COMPILER_OPTIONS([C++], ${PROSPECTIVE_CFLAGS})
-
+ check_prospective_CFLAGS
+ check_prospective_CXXFLAGS
fi
#
@@ -405,14 +447,13 @@
fi
if test "$enable_builtin_mbedtls" = "yes"; then
- OPENTHREAD_CONFIG_ENABLE_BUILTIN_MBEDTLS=1
+ CPPFLAGS="${CPPFLAGS} -DOPENTHREAD_CONFIG_ENABLE_BUILTIN_MBEDTLS=1"
else
- OPENTHREAD_CONFIG_ENABLE_BUILTIN_MBEDTLS=0
+ CPPFLAGS="${CPPFLAGS} -DOPENTHREAD_CONFIG_ENABLE_BUILTIN_MBEDTLS=0"
fi
AC_MSG_CHECKING([whether mbed TLS should be enabled])
AC_MSG_RESULT(${enable_builtin_mbedtls})
-AC_DEFINE_UNQUOTED([OPENTHREAD_CONFIG_ENABLE_BUILTIN_MBEDTLS], [${OPENTHREAD_CONFIG_ENABLE_BUILTIN_MBEDTLS}], [Define to 1 if you want to enable support for bultin-mbedtls.])
AM_CONDITIONAL([OPENTHREAD_ENABLE_BUILTIN_MBEDTLS], [test "${enable_builtin_mbedtls}" = "yes"])
#
@@ -437,15 +478,13 @@
[enable_posix_app=no])
if test "$enable_posix_app" = "yes"; then
- OPENTHREAD_PLATFORM_POSIX_APP=1
+ CPPFLAGS="${CPPFLAGS} -DOPENTHREAD_PLATFORM_POSIX_APP=1"
else
- OPENTHREAD_PLATFORM_POSIX_APP=0
+ CPPFLAGS="${CPPFLAGS} -DOPENTHREAD_PLATFORM_POSIX_APP=0"
fi
AC_MSG_RESULT(${enable_posix_app})
-AC_SUBST(OPENTHREAD_PLATFORM_POSIX_APP)
AM_CONDITIONAL([OPENTHREAD_PLATFORM_POSIX_APP], [test "${enable_posix_app}" = "yes"])
-AC_DEFINE_UNQUOTED([OPENTHREAD_PLATFORM_POSIX_APP], [${OPENTHREAD_PLATFORM_POSIX_APP}], [Define to 1 to build posix application.])
#
# POSIX Daemon
@@ -469,15 +508,13 @@
[enable_posix_app_daemon=no])
if test "$enable_posix_app_daemon" = "yes"; then
- OPENTHREAD_ENABLE_POSIX_APP_DAEMON=1
+ CPPFLAGS="${CPPFLAGS} -DOPENTHREAD_ENABLE_POSIX_APP_DAEMON=1"
else
- OPENTHREAD_ENABLE_POSIX_APP_DAEMON=0
+ CPPFLAGS="${CPPFLAGS} -DOPENTHREAD_ENABLE_POSIX_APP_DAEMON=0"
fi
AC_MSG_RESULT(${enable_posix_app_daemon})
-AC_SUBST(OPENTHREAD_ENABLE_POSIX_APP_DAEMON)
AM_CONDITIONAL([OPENTHREAD_ENABLE_POSIX_APP_DAEMON], [test "${enable_posix_app_daemon}" = "yes"])
-AC_DEFINE_UNQUOTED([OPENTHREAD_ENABLE_POSIX_APP_DAEMON], [${OPENTHREAD_ENABLE_POSIX_APP_DAEMON}], [Define to 1 to build posix application in daemon mode.])
#
# FTD Library
@@ -629,12 +666,12 @@
AC_ARG_WITH(
[readline],
- [AS_HELP_STRING([--with-readline],[Specify the readline library (none|readline|edit) @<:@default=none@:>@.])],
+ [AS_HELP_STRING([--with-readline],[Specify the readline library (no|readline|edit) @<:@default=no@:>@.])],
[],
- [with_readline=none])
+ [with_readline=no])
case "${with_readline}" in
-"none")
+"no")
;;
"readline")
# Prefer GNU readline installed by Homebrew.
@@ -659,7 +696,7 @@
AC_ARG_WITH(
[vendor-extension],
- [AS_HELP_STRING([--with-vendor-extension=<VENDOR_EXT.CPP>],[Specify a C++ source file built as part of OpenThread core library. @<:@default=none@:>@.])],
+ [AS_HELP_STRING([--with-vendor-extension=<VENDOR_EXT.CPP>],[Specify a C++ source file built as part of OpenThread core library. @<:@default=no@:>@.])],
[
if test "${withval}" = "no"
then OPENTHREAD_ENABLE_VENDOR_EXTENSION=0
@@ -674,13 +711,13 @@
],
[
OPENTHREAD_ENABLE_VENDOR_EXTENSION=0
- with_vendor_extension=none
+ with_vendor_extension=no
])
+CPPFLAGS="${CPPFLAGS} -DOPENTHREAD_ENABLE_VENDOR_EXTENSION=${OPENTHREAD_ENABLE_VENDOR_EXTENSION}"
AC_MSG_CHECKING([for vendor extension])
-AC_MSG_RESULT(${OPENTHREAD_VENDOR_EXTENSION_SOURCE-none})
+AC_MSG_RESULT(${OPENTHREAD_VENDOR_EXTENSION_SOURCE-no})
AC_SUBST(OPENTHREAD_VENDOR_EXTENSION_SOURCE)
-AC_DEFINE_UNQUOTED([OPENTHREAD_ENABLE_VENDOR_EXTENSION],[${OPENTHREAD_ENABLE_VENDOR_EXTENSION}],[Define to 1 if using vendor extension])
AM_CONDITIONAL([OPENTHREAD_ENABLE_VENDOR_EXTENSION], [test "${OPENTHREAD_ENABLE_VENDOR_EXTENSION}" = "1"])
#
@@ -689,7 +726,7 @@
AC_ARG_WITH(
[ncp-vendor-hook-source],
- [AS_HELP_STRING([--with-ncp-vendor-hook-source=<VENDOR_HOOK.CPP>],[Specify a C++ file that implements the NCP vendor hook. @<:@default=none@:>@.])],
+ [AS_HELP_STRING([--with-ncp-vendor-hook-source=<VENDOR_HOOK.CPP>],[Specify a C++ file that implements the NCP vendor hook. @<:@default=no@:>@.])],
[
if test "${withval}" = "no"
then OPENTHREAD_ENABLE_NCP_VENDOR_HOOK=0
@@ -697,6 +734,7 @@
then AC_MSG_ERROR([Can't open ${withval} for --with-ncp-vendor-hook-source])
else
OPENTHREAD_ENABLE_NCP_VENDOR_HOOK=1
+ CPPFLAGS="${CPPFLAGS} -DOPENTHREAD_ENABLE_NCP_VENDOR_HOOK=1"
# Get the absolute path.
OPENTHREAD_NCP_VENDOR_HOOK_SOURCE=$(cd `dirname ${withval}` && pwd)/$(basename ${withval})
@@ -704,13 +742,12 @@
],
[
OPENTHREAD_ENABLE_NCP_VENDOR_HOOK=0
- with_ncp_vendor_hook_source=none
+ with_ncp_vendor_hook_source=no
])
AC_MSG_CHECKING([for NCP vendor hook source])
-AC_MSG_RESULT(${OPENTHREAD_NCP_VENDOR_HOOK_SOURCE-none})
+AC_MSG_RESULT(${OPENTHREAD_NCP_VENDOR_HOOK_SOURCE-no})
AC_SUBST(OPENTHREAD_NCP_VENDOR_HOOK_SOURCE)
-AC_DEFINE_UNQUOTED([OPENTHREAD_ENABLE_NCP_VENDOR_HOOK],[${OPENTHREAD_ENABLE_NCP_VENDOR_HOOK}],[Define to 1 if using NCP vendor hook])
AM_CONDITIONAL([OPENTHREAD_ENABLE_NCP_VENDOR_HOOK], [test "${OPENTHREAD_ENABLE_NCP_VENDOR_HOOK}" = "1"])
#
@@ -719,7 +756,7 @@
AC_ARG_WITH(
[ncp-spinel-encrypter-libs],
- [AS_HELP_STRING([--with-ncp-spinel-encrypter-libs=<LIBSPINEL_ENCRYPTER.A>],[Specify library files (absolute paths) implementing the NCP Spinel Encrypter. @<:@default=none@:>@.])],
+ [AS_HELP_STRING([--with-ncp-spinel-encrypter-libs=<LIBSPINEL_ENCRYPTER.A>],[Specify library files (absolute paths) implementing the NCP Spinel Encrypter. @<:@default=no@:>@.])],
[
if test "${withval}" = "no"
then OPENTHREAD_ENABLE_NCP_SPINEL_ENCRYPTER=0
@@ -730,13 +767,13 @@
],
[
OPENTHREAD_ENABLE_NCP_SPINEL_ENCRYPTER=0
- with_ncp_spinel_encrypter_libs=none
+ with_ncp_spinel_encrypter_libs=no
])
+CPPFLAGS="${CPPFLAGS} -DOPENTHREAD_ENABLE_NCP_SPINEL_ENCRYPTER=${OPENTHREAD_ENABLE_NCP_SPINEL_ENCRYPTER}"
AC_MSG_CHECKING([for NCP Spinel Encrypter])
-AC_MSG_RESULT(${OPENTHREAD_NCP_SPINEL_ENCRYPTER_LIBS-none})
+AC_MSG_RESULT(${OPENTHREAD_NCP_SPINEL_ENCRYPTER_LIBS-no})
AC_SUBST(OPENTHREAD_NCP_SPINEL_ENCRYPTER_LIBS)
-AC_DEFINE_UNQUOTED([OPENTHREAD_ENABLE_NCP_SPINEL_ENCRYPTER],[${OPENTHREAD_ENABLE_NCP_SPINEL_ENCRYPTER}],[Define to 1 if using NCP Spinel Encrypter])
AM_CONDITIONAL([OPENTHREAD_ENABLE_NCP_SPINEL_ENCRYPTER], [test "${OPENTHREAD_ENABLE_NCP_SPINEL_ENCRYPTER}" = "1"])
#
@@ -769,7 +806,7 @@
AC_ARG_WITH(
[custom-linker-file],
- [AS_HELP_STRING([--with-custom-linker-file=<linkerfile.ld>],[Specify custom linker file (absolute path). @<:@default=none@:>@.])],
+ [AS_HELP_STRING([--with-custom-linker-file=<linkerfile.ld>],[Specify custom linker file (absolute path). @<:@default=no@:>@.])],
[
with_custom_linker_file=yes
OPENTHREAD_CUSTOM_LINKER_FILE=${withval}
@@ -787,14 +824,14 @@
AC_ARG_WITH(examples,
[AS_HELP_STRING([--with-examples=TARGET],
- [Specify the examples from one of: none, posix, cc1352, cc2538, cc2650, cc2652, efr32mg12, efr32mg21, gp712, kw41z, nrf52811, nrf52840, qpg6095, samr21 @<:@default=none@:>@.])],
+ [Specify the examples from one of: no, posix, cc1352, cc2538, cc2650, cc2652, efr32mg12, efr32mg13, efr32mg21, gp712, kw41z, nrf52811, nrf52833, nrf52840, qpg6095, samr21 @<:@default=no@:>@.])],
[
case "${with_examples}" in
- none)
+ no)
;;
- posix|cc1352|cc2538|cc2650|cc2652|efr32mg12|efr32mg21|gp712|kw41z|nrf52811|nrf52840|qpg6095|samr21)
+ posix|cc1352|cc2538|cc2650|cc2652|efr32mg12|efr32mg13|efr32mg21|gp712|kw41z|nrf52811|nrf52833|nrf52840|qpg6095|samr21)
if test ${enable_posix_app} = "yes"; then
- AC_MSG_ERROR([--with-examples must be none when POSIX apps are enabled by --enable-posix-app])
+ AC_MSG_ERROR([--with-examples must be no when POSIX apps are enabled by --enable-posix-app])
fi
;;
*)
@@ -802,125 +839,32 @@
;;
esac
],
- [with_examples=none])
+ [with_examples=no])
-OPENTHREAD_ENABLE_EXAMPLES=${with_examples}
+AM_CONDITIONAL([OPENTHREAD_ENABLE_EXAMPLES], [test ${with_examples} != "no"])
-case ${with_examples} in
+AM_CONDITIONAL([OPENTHREAD_EXAMPLES_POSIX], [test "${with_examples}" = "posix"])
+AM_CONDITIONAL([OPENTHREAD_EXAMPLES_CC1352], [test "${with_examples}" = "cc1352"])
+AM_CONDITIONAL([OPENTHREAD_EXAMPLES_CC2538], [test "${with_examples}" = "cc2538"])
+AM_CONDITIONAL([OPENTHREAD_EXAMPLES_CC2650], [test "${with_examples}" = "cc2650"])
+AM_CONDITIONAL([OPENTHREAD_EXAMPLES_CC2652], [test "${with_examples}" = "cc2652"])
+AM_CONDITIONAL([OPENTHREAD_EXAMPLES_EFR32MG12], [test "${with_examples}" = "efr32mg12"])
+AM_CONDITIONAL([OPENTHREAD_EXAMPLES_EFR32MG13], [test "${with_examples}" = "efr32mg13"])
+AM_CONDITIONAL([OPENTHREAD_EXAMPLES_EFR32MG21], [test "${with_examples}" = "efr32mg21"])
+AM_CONDITIONAL([OPENTHREAD_EXAMPLES_GP712], [test "${with_examples}" = "gp712"])
+AM_CONDITIONAL([OPENTHREAD_EXAMPLES_KW41Z], [test "${with_examples}" = "kw41z"])
+AM_CONDITIONAL([OPENTHREAD_EXAMPLES_NRF52811], [test "${with_examples}" = "nrf52811"])
+AM_CONDITIONAL([OPENTHREAD_EXAMPLES_NRF52833], [test "${with_examples}" = "nrf52833"])
+AM_CONDITIONAL([OPENTHREAD_EXAMPLES_NRF52840], [test "${with_examples}" = "nrf52840"])
+AM_CONDITIONAL([OPENTHREAD_EXAMPLES_QPG6095], [test "${with_examples}" = "qpg6095"])
+AM_CONDITIONAL([OPENTHREAD_EXAMPLES_SAMR21], [test "${with_examples}" = "samr21"])
- posix)
- OPENTHREAD_EXAMPLES_POSIX=1
- AC_DEFINE_UNQUOTED([OPENTHREAD_EXAMPLES_POSIX],[${OPENTHREAD_EXAMPLES_POSIX}],[Define to 1 if you want to use posix examples])
- ;;
-
- cc1352)
- OPENTHREAD_EXAMPLES_CC1352=1
- AC_DEFINE_UNQUOTED([OPENTHREAD_EXAMPLES_CC1352],[${OPENTHREAD_EXAMPLES_CC1352}],[Define to 1 if you want to use cc1352 examples])
- ;;
-
- cc2538)
- OPENTHREAD_EXAMPLES_CC2538=1
- AC_DEFINE_UNQUOTED([OPENTHREAD_EXAMPLES_CC2538],[${OPENTHREAD_EXAMPLES_CC2538}],[Define to 1 if you want to use cc2538 examples])
- ;;
-
- cc2650)
- OPENTHREAD_EXAMPLES_CC2650=1
- AC_DEFINE_UNQUOTED([OPENTHREAD_EXAMPLES_CC2650],[${OPENTHREAD_EXAMPLES_CC2650}],[Define to 1 if you want to use cc2650 examples])
- ;;
-
- cc2652)
- OPENTHREAD_EXAMPLES_CC2652=1
- AC_DEFINE_UNQUOTED([OPENTHREAD_EXAMPLES_CC2652],[${OPENTHREAD_EXAMPLES_CC2652}],[Define to 1 if you want to use cc2652 examples])
- ;;
-
- efr32mg12)
- OPENTHREAD_EXAMPLES_EFR32MG12=1
- AC_DEFINE_UNQUOTED([OPENTHREAD_EXAMPLES_EFR32MG12],[${OPENTHREAD_EXAMPLES_EFR32MG12}],[Define to 1 if you want to use efr32mg12 examples])
- ;;
-
- efr32mg21)
- OPENTHREAD_EXAMPLES_EFR32MG21=1
- AC_DEFINE_UNQUOTED([OPENTHREAD_EXAMPLES_EFR32MG21],[${OPENTHREAD_EXAMPLES_EFR32MG21}],[Define to 1 if you want to use efr32mg21 examples])
- ;;
-
- gp712)
- OPENTHREAD_EXAMPLES_GP712=1
- AC_DEFINE_UNQUOTED([OPENTHREAD_EXAMPLES_GP712],[${OPENTHREAD_EXAMPLES_GP712}],[Define to 1 if you want to use gp712 examples])
- ;;
-
- kw41z)
- OPENTHREAD_EXAMPLES_KW41Z=1
- AC_DEFINE_UNQUOTED([OPENTHREAD_EXAMPLES_KW41Z],[${OPENTHREAD_EXAMPLES_KW41Z}],[Define to 1 if you want to use kw41z examples])
- ;;
-
- nrf52811)
- OPENTHREAD_EXAMPLES_NRF52811=1
- AC_DEFINE_UNQUOTED([OPENTHREAD_EXAMPLES_NRF52811],[${OPENTHREAD_EXAMPLES_NRF52811}],[Define to 1 if you want to use nrf52811 examples])
- ;;
-
- nrf52840)
- OPENTHREAD_EXAMPLES_NRF52840=1
- AC_DEFINE_UNQUOTED([OPENTHREAD_EXAMPLES_NRF52840],[${OPENTHREAD_EXAMPLES_NRF52840}],[Define to 1 if you want to use nrf52840 examples])
- ;;
-
- qpg6095)
- OPENTHREAD_EXAMPLES_QPG6095=1
- AC_DEFINE_UNQUOTED([OPENTHREAD_EXAMPLES_QPG6095],[${OPENTHREAD_EXAMPLES_QPG6095}],[Define to 1 if you want to use qpg6095 examples])
- ;;
-
- samr21)
- OPENTHREAD_EXAMPLES_SAMR21=1
- AC_DEFINE_UNQUOTED([OPENTHREAD_EXAMPLES_SAMR21],[${OPENTHREAD_EXAMPLES_SAMR21}],[Define to 1 if you want to use samr21 examples])
- ;;
-
-esac
+AM_COND_IF([OPENTHREAD_EXAMPLES_POSIX], CPPFLAGS="${CPPFLAGS} -DOPENTHREAD_EXAMPLES_POSIX=1", CPPFLAGS="${CPPFLAGS} -DOPENTHREAD_EXAMPLES_POSIX=0")
AC_MSG_CHECKING([whether to enable examples])
-AC_MSG_RESULT(${OPENTHREAD_EXAMPLES})
+AC_MSG_RESULT(${with_examples})
-AC_SUBST(OPENTHREAD_ENABLE_EXAMPLES)
-AM_CONDITIONAL([OPENTHREAD_ENABLE_EXAMPLES], [test ${with_examples} != "none"])
-AC_DEFINE_UNQUOTED([OPENTHREAD_ENABLE_EXAMPLES],[${OPENTHREAD_ENABLE_EXAMPLES}],[OpenThread examples])
-
-AC_SUBST(OPENTHREAD_EXAMPLES_POSIX)
-AM_CONDITIONAL([OPENTHREAD_EXAMPLES_POSIX], [test "${with_examples}" = "posix"])
-
-AC_SUBST(OPENTHREAD_EXAMPLES_CC1352)
-AM_CONDITIONAL([OPENTHREAD_EXAMPLES_CC1352], [test "${with_examples}" = "cc1352"])
-
-AC_SUBST(OPENTHREAD_EXAMPLES_CC2538)
-AM_CONDITIONAL([OPENTHREAD_EXAMPLES_CC2538], [test "${with_examples}" = "cc2538"])
-
-AC_SUBST(OPENTHREAD_EXAMPLES_CC2650)
-AM_CONDITIONAL([OPENTHREAD_EXAMPLES_CC2650], [test "${with_examples}" = "cc2650"])
-
-AC_SUBST(OPENTHREAD_EXAMPLES_CC2652)
-AM_CONDITIONAL([OPENTHREAD_EXAMPLES_CC2652], [test "${with_examples}" = "cc2652"])
-
-AC_SUBST(OPENTHREAD_EXAMPLES_EFR32MG12)
-AM_CONDITIONAL([OPENTHREAD_EXAMPLES_EFR32MG12], [test "${with_examples}" = "efr32mg12"])
-
-AC_SUBST(OPENTHREAD_EXAMPLES_EFR32MG21)
-AM_CONDITIONAL([OPENTHREAD_EXAMPLES_EFR32MG21], [test "${with_examples}" = "efr32mg21"])
-
-AC_SUBST(OPENTHREAD_EXAMPLES_GP712)
-AM_CONDITIONAL([OPENTHREAD_EXAMPLES_GP712], [test "${with_examples}" = "gp712"])
-
-AC_SUBST(OPENTHREAD_EXAMPLES_KW41Z)
-AM_CONDITIONAL([OPENTHREAD_EXAMPLES_KW41Z], [test "${with_examples}" = "kw41z"])
-
-AC_SUBST(OPENTHREAD_EXAMPLES_NRF52811)
-AM_CONDITIONAL([OPENTHREAD_EXAMPLES_NRF52811], [test "${with_examples}" = "nrf52811"])
-
-AC_SUBST(OPENTHREAD_EXAMPLES_NRF52840)
-AM_CONDITIONAL([OPENTHREAD_EXAMPLES_NRF52840], [test "${with_examples}" = "nrf52840"])
-
-AC_SUBST(OPENTHREAD_EXAMPLES_QPG6095)
-AM_CONDITIONAL([OPENTHREAD_EXAMPLES_QPG6095], [test "${with_examples}" = "qpg6095"])
-
-AC_SUBST(OPENTHREAD_EXAMPLES_SAMR21)
-AM_CONDITIONAL([OPENTHREAD_EXAMPLES_SAMR21], [test "${with_examples}" = "samr21"])
-
+AM_CONDITIONAL([OPENTHREAD_EXAMPLES_NRF528XX], [test OPENTHREAD_EXAMPLES_NRF52811 || test OPENTHREAD_EXAMPLES_NRF52833 || test OPENTHREAD_EXAMPLES_NRF52840])
#
# Tools
#
@@ -957,7 +901,7 @@
AM_CONDITIONAL(OPENTHREAD_BUILD_DOCS, [test "${nl_cv_build_docs}" = "yes"])
-AM_CONDITIONAL(OPENTHREAD_POSIX, [test "${OPENTHREAD_PLATFORM_POSIX_APP}" = "1" -o "${OPENTHREAD_EXAMPLES_POSIX}" = "1"])
+AM_CONDITIONAL(OPENTHREAD_POSIX, [test "${enable_posix_app}" = "yes" -o "${with_examples}" = "posix"])
#
# Checks for libraries and packages.
@@ -975,21 +919,6 @@
# Check for headers
#
-#---------------------------------------------------
-# Enable BSD Security Features
-# This enables strlcpy() and other friends in GNU land.
-# While the references below generally speak of: "glibc"
-# The ARM Embedded platform uses the nano instance of NEWLIB
-# Which greatly follows and mirrors glibc.
-# --------------------------------------------------
-#
-# References:
-# 1) http://stackoverflow.com/questions/29201515/what-does-d-default-source-do
-# 2) http://man7.org/linux/man-pages/man7/feature_test_macros.7.html
-#
-CFLAGS="${CFLAGS} -D_BSD_SOURCE=1 -D_DEFAULT_SOURCE=1"
-CXXFLAGS="${CXXFLAGS} -D_BSD_SOURCE=1 -D_DEFAULT_SOURCE=1"
-
OLD_CFLAGS="${CFLAGS}"
CFLAGS="${CFLAGS} -Wno-error=address"
AC_HEADER_STDBOOL
@@ -1000,13 +929,6 @@
AC_CHECK_HEADERS([string.h])
#
-# Missing Functions
-#
-AC_CHECK_FUNC([strlcpy], [AC_DEFINE([HAVE_STRLCPY], [1], [Define if strlcpy exists.])])
-AC_CHECK_FUNC([strlcat], [AC_DEFINE([HAVE_STRLCAT], [1], [Define if strlcat exists.])])
-AC_CHECK_FUNC([strnlen], [AC_DEFINE([HAVE_STRNLEN], [1], [Define if strnlen exists.])])
-
-#
# Check for types and structures
#
AC_TYPE_INT8_T
@@ -1074,11 +996,17 @@
examples/platforms/efr32mg12/sleepy-demo/Makefile
examples/platforms/efr32mg12/sleepy-demo/sleepy-demo-ftd/Makefile
examples/platforms/efr32mg12/sleepy-demo/sleepy-demo-mtd/Makefile
+examples/platforms/efr32mg13/Makefile
+examples/platforms/efr32mg13/sleepy-demo/Makefile
+examples/platforms/efr32mg13/sleepy-demo/sleepy-demo-ftd/Makefile
+examples/platforms/efr32mg13/sleepy-demo/sleepy-demo-mtd/Makefile
examples/platforms/efr32mg21/Makefile
+examples/platforms/efr32mg21/sleepy-demo/Makefile
+examples/platforms/efr32mg21/sleepy-demo/sleepy-demo-ftd/Makefile
+examples/platforms/efr32mg21/sleepy-demo/sleepy-demo-mtd/Makefile
examples/platforms/gp712/Makefile
examples/platforms/kw41z/Makefile
-examples/platforms/nrf52811/Makefile
-examples/platforms/nrf52840/Makefile
+examples/platforms/nrf528xx/Makefile
examples/platforms/qpg6095/Makefile
examples/platforms/samr21/Makefile
examples/platforms/posix/Makefile
diff --git a/doc/Makefile.am b/doc/Makefile.am
index dca8fed..66e8aa3 100644
--- a/doc/Makefile.am
+++ b/doc/Makefile.am
@@ -47,6 +47,7 @@
$(srcdir)/images/ot-contrib-synopsys.png \
$(srcdir)/images/ot-contrib-ti.png \
$(srcdir)/images/ot-contrib-zephyr.png \
+ $(srcdir)/ot_api_doc.h \
$(NULL)
#
@@ -77,6 +78,9 @@
if OPENTHREAD_BUILD_DOCS
+openthreaddir = $(includedir)/openthread
+dist_openthread_HEADERS = ot_api_doc.h
+
all-local: html/index.html
#
diff --git a/doc/ot_api_doc.h b/doc/ot_api_doc.h
new file mode 100644
index 0000000..bfec2cd
--- /dev/null
+++ b/doc/ot_api_doc.h
@@ -0,0 +1,164 @@
+/*
+ * Copyright (c) 2020, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * @brief
+ * This file defines the Doxygen group structure for OpenThread documentation.
+ */
+
+/**
+ * @defgroup api API
+ * @brief
+ * This module includes the application programming interface to the OpenThread stack.
+ *
+ * @{
+ *
+ * @defgroup api-error Error
+ *
+ * @defgroup api-execution Execution
+ *
+ * @{
+ *
+ * @defgroup api-instance Instance
+ * @defgroup api-tasklets Tasklets
+ *
+ * @}
+ *
+ * @defgroup api-net IPv6 Networking
+ * @{
+ *
+ * @defgroup api-dns DNSv6
+ * @defgroup api-icmp6 ICMPv6
+ * @defgroup api-ip6 IPv6
+ * @defgroup api-udp-group UDP
+ *
+ * @{
+ *
+ * @defgroup api-udp UDP
+ * @defgroup api-udp-forward UDP Forward
+ *
+ * @}
+ *
+ * @}
+ *
+ * @defgroup api-link Link
+ *
+ * @{
+ *
+ * @defgroup api-link-link Link
+ * @defgroup api-link-raw Raw Link
+ *
+ * @}
+ *
+ * @defgroup api-message Message
+ *
+ * @defgroup api-thread Thread
+ *
+ * @{
+ *
+ * @defgroup api-border-agent Border Agent
+ * @defgroup api-border-router Border Router
+ * @defgroup api-commissioner Commissioner
+ * @defgroup api-thread-general General
+ * @brief This module includes functions for all Thread roles.
+ * @defgroup api-joiner Joiner
+ * @defgroup api-thread-router Router/Leader
+ * @brief This module includes functions for Thread Routers and Leaders.
+ * @defgroup api-server Server
+ *
+ * @}
+ *
+ * @defgroup api-addons Add-Ons
+ *
+ * @{
+ *
+ * @defgroup api-channel-manager Channel Manager
+ * @defgroup api-channel-monitor Channel Monitoring
+ * @defgroup api-child-supervision Child Supervision
+ * @defgroup api-coap-group CoAP
+ *
+ * @{
+ *
+ * @defgroup api-coap CoAP
+ * @defgroup api-coap-secure CoAP Secure
+ *
+ * @}
+ *
+ * @defgroup api-cli Command Line Interface
+ * @defgroup api-crypto Crypto
+ * @defgroup api-entropy Entropy Source
+ * @defgroup api-factory-diagnostics Factory Diagnostics
+ * @defgroup api-heap Heap
+ * @defgroup api-jam-detection Jam Detection
+ * @defgroup api-logging Logging
+ * @defgroup api-ncp Network Co-Processor
+ * @defgroup api-network-time Network Time Synchronization
+ * @defgroup api-random-group Random Number Generator
+ *
+ * @{
+ *
+ * @defgroup api-random-crypto RNG Cryptographic
+ * @defgroup api-random-non-crypto RNG Non-cryptographic
+ *
+ * @}
+ *
+ * @defgroup api-sntp SNTP
+ *
+ * @}
+ *
+ * @}
+ *
+ */
+
+/**
+ * @defgroup platform Platform Abstraction
+ * @brief
+ * This module includes the platform abstraction used by the OpenThread stack.
+ *
+ * @{
+ *
+ * @defgroup plat-alarm Alarm
+ * @defgroup plat-ble BLE Host
+ * @defgroup plat-entropy Entropy
+ * @defgroup plat-factory-diagnostics Factory Diagnostics
+ * @defgroup plat-logging Logging
+ * @defgroup plat-memory Memory
+ * @defgroup plat-messagepool Message Pool
+ * @defgroup plat-misc Miscellaneous
+ * @defgroup plat-radio Radio
+ * @defgroup plat-settings Settings
+ * @defgroup plat-spi-slave SPI Slave
+ * @defgroup plat-time Time Service
+ * @defgroup plat-toolchain Toolchain
+ * @defgroup plat-uart UART
+ *
+ * @}
+ *
+ */
+
diff --git a/etc/cmake/checks.cmake b/etc/cmake/checks.cmake
new file mode 100644
index 0000000..ab7bb88
--- /dev/null
+++ b/etc/cmake/checks.cmake
@@ -0,0 +1,29 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+configure_file(${PROJECT_SOURCE_DIR}/etc/cmake/openthread-config-generic.h.in ${PROJECT_BINARY_DIR}/etc/cmake/openthread-config-generic.h)
diff --git a/etc/cmake/functions.cmake b/etc/cmake/functions.cmake
new file mode 100755
index 0000000..9caf9e8
--- /dev/null
+++ b/etc/cmake/functions.cmake
@@ -0,0 +1,41 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+# Get a list of the available platforms and output as a list to the 'arg_platforms' argument
+function(ot_get_platforms arg_platforms)
+ set(result "none")
+ set(platforms_dir "${PROJECT_SOURCE_DIR}/examples/platforms")
+ file(GLOB platforms RELATIVE "${platforms_dir}" "${platforms_dir}/*")
+ foreach(platform IN LISTS platforms)
+ if(IS_DIRECTORY "${platforms_dir}/${platform}")
+ list(APPEND result "${platform}")
+ endif()
+ endforeach()
+
+ set(${arg_platforms} "${result}" PARENT_SCOPE)
+endfunction()
diff --git a/etc/cmake/openthread-config-generic.h.in b/etc/cmake/openthread-config-generic.h.in
new file mode 100644
index 0000000..95c23b8
--- /dev/null
+++ b/etc/cmake/openthread-config-generic.h.in
@@ -0,0 +1,27 @@
+/*
+ * Copyright (c) 2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
diff --git a/etc/cmake/options.cmake b/etc/cmake/options.cmake
new file mode 100644
index 0000000..81b58a3
--- /dev/null
+++ b/etc/cmake/options.cmake
@@ -0,0 +1,203 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+option(OT_BIG_ENDIAN "host platform uses big-endian byte order")
+if(OT_BIG_ENDIAN)
+ list(APPEND OT_PRIVATE_DEFINES "BYTE_ORDER_BIG_ENDIAN=1")
+endif()
+
+option(OT_BORDER_AGENT "enable border agent support")
+if(OT_BORDER_AGENT)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_BORDER_AGENT_ENABLE=1")
+endif()
+
+option(OT_BORDER_ROUTER "enable border router support")
+if(OT_BORDER_ROUTER)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE=1")
+endif()
+
+option(OT_COAP "enable coap api support")
+if(OT_COAP)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_COAP_API_ENABLE=1")
+endif()
+
+option(OT_COAPS "enable secure coap api support")
+if(OT_COAPS)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_COAP_SECURE_API_ENABLE=1")
+endif()
+
+option(OT_COMMISSIONER "enable commissioner support")
+if(OT_COMMISSIONER)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_COMMISSIONER_ENABLE=1")
+endif()
+
+option(OT_CHANNEL_MANAGER "enable channel manager support")
+if(OT_CHANNEL_MANAGER)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_CHANNEL_MANAGER_ENABLE=1")
+endif()
+
+option(OT_CHANNEL_MONITOR "enable channel monitor support")
+if(OT_CHANNEL_MONITOR)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE=1")
+endif()
+
+option(OT_CHILD_SUPERVISION "enable child supervision support")
+if(OT_CHILD_SUPERVISION)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_CHILD_SUPERVISION_ENABLE=1")
+endif()
+
+option(OT_DHCP6_CLIENT "enable DHCP6 client support")
+if(OT_DHCP6_CLIENT)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE=1")
+endif()
+
+option(OT_DHCP6_SERVER "enable DHCP6 server support")
+if(OT_DHCP6_SERVER)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_DHCP6_SERVER_ENABLE=1")
+endif()
+
+option(OT_DIAGNOSTIC "enable diagnostic support")
+if(OT_DIAGNOSTIC)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_DIAG_ENABLE=1")
+endif()
+
+option(OT_DNS_CLIENT "enable DNS client support")
+if(OT_DNS_CLIENT)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_DNS_CLIENT_ENABLE=1")
+endif()
+
+option(OT_ECDSA "enable ECDSA support")
+if(OT_ECDSA)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_ECDSA_ENABLE=1")
+endif()
+
+option(OT_EXTERNAL_HEAP "enable external heap support")
+if(OT_EXTERNAL_HEAP)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_EXTERNAL_HEAP_ENABLE=1")
+endif()
+
+option(OT_IP6_FRAGM "enable ipv6 fragmentation support")
+if(OT_IP6_FRAGM)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE=1")
+endif()
+
+option(OT_JAM_DETECTION "enable jam detection support")
+if(OT_JAM_DETECTION)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE=1")
+endif()
+
+option(OT_JOINER "enable joiner support")
+if(OT_JOINER)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_JOINER_ENABLE=1")
+endif()
+
+option(OT_LEGACY "enable legacy network support")
+if(OT_LEGACY)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_LEGACY_ENABLE=1")
+endif()
+
+option(OT_LINK_RAW "enable link raw service")
+if(OT_LINK_RAW)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_LINK_RAW_ENABLE=1")
+endif()
+
+option(OT_MAC_FILTER "enable mac filter support")
+if(OT_MAC_FILTER)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_MAC_FILTER_ENABLE=1")
+endif()
+
+option(OT_MTD_NETDIAG "enable TMF network diagnostics on MTDs")
+if(OT_MTD_NETDIAG)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_TMF_NETWORK_DIAG_MTD_ENABLE=1")
+endif()
+
+option(OT_PLATFORM_UDP "enable platform UDP support")
+if(OT_PLATFORM_UDP)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_PLATFORM_UDP_ENABLE=1")
+endif()
+
+option(OT_REFERENCE_DEVICE "enable Thread Test Harness reference device support")
+if(OT_REFERENCE_DEVICE)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_REFERENCE_DEVICE_ENABLE=1")
+endif()
+
+option(OT_SERVICE "enable support for injecting Service entries into the Thread Network Data")
+if(OT_SERVICE)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE=1")
+endif()
+
+option(OT_SETTINGS_RAM "enable volatile-only storage of settings")
+if(OT_SETTINGS_RAM)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_SETTINGS_RAM=1")
+endif()
+
+option(OT_SLAAC "enable support for adding of auto-configured SLAAC addresses by OpenThread")
+if(OT_SLAAC)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_IP6_SLAAC_ENABLE=1")
+endif()
+
+option(OT_SNTP_CLIENT "enable SNTP Client support")
+if(OT_SNTP_CLIENT)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_SNTP_CLIENT_ENABLE=1")
+endif()
+
+option(OT_TIME_SYNC "enable the time synchronization service feature")
+if(OT_TIME_SYNC)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_TIME_SYNC_ENABLE=1")
+endif()
+
+option(OT_UDP_FORWARD "enable UDP forward support")
+if(OT_UDP_FORWARD)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_UDP_FORWARD_ENABLE=1")
+endif()
+
+option(OT_FULL_LOGS "enable full logs")
+if(OT_FULL_LOGS)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_LOG_LEVEL=OT_LOG_LEVEL_DEBG")
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_LOG_API=1")
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_LOG_ARP=1")
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_LOG_CLI=1")
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_LOG_COAP=1")
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_LOG_ICMP=1")
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_LOG_IP6=1")
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_LOG_MAC=1")
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_LOG_MEM=1")
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_LOG_MLE=1")
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_LOG_NETDATA=1")
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_LOG_NETDIAG=1")
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_LOG_PKT_DUMP=1")
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_LOG_PLATFORM=1")
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_LOG_PREPEND_LEVEL=1")
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_LOG_PREPEND_REGION=1")
+endif()
+
+if(OT_BUILTIN_MBEDTLS)
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_ENABLE_BUILTIN_MBEDTLS=1")
+else()
+ list(APPEND OT_PRIVATE_DEFINES "OPENTHREAD_CONFIG_ENABLE_BUILTIN_MBEDTLS=0")
+endif()
diff --git a/examples/CMakeLists.txt b/examples/CMakeLists.txt
new file mode 100644
index 0000000..928e58f
--- /dev/null
+++ b/examples/CMakeLists.txt
@@ -0,0 +1,33 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+add_subdirectory(platforms)
+
+if(OT_BUILD_EXECUTABLES)
+ add_subdirectory(apps)
+endif()
diff --git a/examples/Makefile-efr32mg12 b/examples/Makefile-efr32mg12
index 1ae1317..217b0f0 100644
--- a/examples/Makefile-efr32mg12
+++ b/examples/Makefile-efr32mg12
@@ -89,12 +89,12 @@
EFR32_MBEDTLS_CPPFLAGS += -DMBEDTLS_USER_CONFIG_FILE='\"efr32-mbedtls-config.h\"'
EFR32_MBEDTLS_CPPFLAGS += -D$(MCU)
EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/examples/platforms/efr32mg12/crypto
-EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.6/util/third_party/mbedtls/configs
-EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.6/platform/CMSIS/Include
-EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.6/util/third_party/mbedtls/sl_crypto/include
-EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.6/platform/Device/SiliconLabs/EFR32MG12P/Include
-EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.6/platform/emlib/inc
-EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.6/platform/radio/rail_lib/chip/efr32/efr32xg1x
+EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.7/util/third_party/mbedtls/configs
+EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.7/platform/CMSIS/Include
+EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.7/util/third_party/mbedtls/sl_crypto/include
+EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.7/platform/Device/SiliconLabs/EFR32MG12P/Include
+EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.7/platform/emlib/inc
+EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.7/platform/radio/rail_lib/chip/efr32/efr32xg1x
EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/mbedtls
EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/mbedtls/repo/include
EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/mbedtls/repo/include/mbedtls
@@ -112,12 +112,28 @@
-Os \
-g \
-I$(HAL_CONF_DIR) \
+ -D__START=main \
-D$(MCU) \
$(EFR32MG12_CONFIG_FILE_CPPFLAGS) \
$(NULL)
include $(dir $(abspath $(lastword $(MAKEFILE_LIST))))/common-switches.mk
+#
+# Platform-Specific switches
+#
+
+DMP ?= 0
+RADIODEBUG ?= 0
+
+ifeq ($(DMP),1)
+COMMONCFLAGS += -DRADIO_CONFIG_DMP_SUPPORT=1
+endif
+
+ifeq ($(RADIODEBUG),1)
+COMMONCFLAGS += -DRADIO_CONFIG_DEBUG_COUNTERS_SUPPORT=1
+endif
+
CPPFLAGS += \
$(COMMONCFLAGS) \
$(target_CPPFLAGS) \
diff --git a/examples/Makefile-efr32mg13 b/examples/Makefile-efr32mg13
new file mode 100644
index 0000000..bd2d951
--- /dev/null
+++ b/examples/Makefile-efr32mg13
@@ -0,0 +1,314 @@
+#
+# Copyright (c) 2020, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+.NOTPARALLEL:
+
+AR = arm-none-eabi-ar
+CCAS = arm-none-eabi-as
+CPP = arm-none-eabi-cpp
+CC = arm-none-eabi-gcc
+CXX = arm-none-eabi-g++
+LD = arm-none-eabi-ld
+STRIP = arm-none-eabi-strip
+NM = arm-none-eabi-nm
+RANLIB = arm-none-eabi-ranlib
+OBJCOPY = arm-none-eabi-objcopy
+
+BuildJobs ?= 10
+
+configure_OPTIONS = \
+ --enable-cli \
+ --enable-ftd \
+ --enable-mtd \
+ --enable-ncp \
+ --enable-radio-only \
+ --enable-linker-map \
+ --with-examples=efr32mg13 \
+ MBEDTLS_CPPFLAGS="$(EFR32_MBEDTLS_CPPFLAGS)" \
+ $(NULL)
+
+ifneq ($(DISABLE_BUILTIN_MBEDTLS), 1)
+configure_OPTIONS += MBEDTLS_CPPFLAGS="$(EFR32_MBEDTLS_CPPFLAGS)"
+endif
+
+TopSourceDir := $(dir $(shell readlink $(firstword $(MAKEFILE_LIST))))..
+AbsTopSourceDir := $(dir $(realpath $(firstword $(MAKEFILE_LIST))))..
+
+
+#
+# Differentiate between boards
+# - BRD4168A / SLWSTK6000B / MGM13P Module / 2.4GHz@19dBm
+#
+ifeq ($(BOARD),BRD4168A)
+MCU = EFR32MG13P732F512GM48
+else
+$(error Please provide a value for BOARD variable e.g BOARD=BRD4168A (currently supported BRD4168A))
+endif
+
+
+EFR32_MBEDTLS_CPPFLAGS = -DMBEDTLS_CONFIG_FILE='\"mbedtls-config.h\"'
+EFR32_MBEDTLS_CPPFLAGS += -DMBEDTLS_USER_CONFIG_FILE='\"efr32-mbedtls-config.h\"'
+EFR32_MBEDTLS_CPPFLAGS += -D$(MCU)
+EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/examples/platforms/efr32mg13/crypto
+EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.7/util/third_party/mbedtls/configs
+EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.7/platform/CMSIS/Include
+EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.7/util/third_party/mbedtls/sl_crypto/include
+EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.7/platform/Device/SiliconLabs/EFR32MG13P/Include
+EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.7/platform/emlib/inc
+EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.7/platform/radio/rail_lib/chip/efr32/efr32xg1x
+EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/mbedtls
+EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/mbedtls/repo/include
+EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/mbedtls/repo/include/mbedtls
+
+CONFIG_FILE_PATH = $(AbsTopSourceDir)/examples/platforms/efr32mg13/
+HAL_CONF_DIR = $(CONFIG_FILE_PATH)/$(shell echo $(BOARD) | tr A-Z a-z)
+
+EFR32MG13_CONFIG_FILE_CPPFLAGS = -DOPENTHREAD_PROJECT_CORE_CONFIG_FILE='\"openthread-core-efr32-config.h\"'
+EFR32MG13_CONFIG_FILE_CPPFLAGS += -DOPENTHREAD_CORE_CONFIG_PLATFORM_CHECK_FILE='\"openthread-core-efr32-config-check.h\"'
+EFR32MG13_CONFIG_FILE_CPPFLAGS += -I$(CONFIG_FILE_PATH)
+
+COMMONCFLAGS := \
+ -fdata-sections \
+ -ffunction-sections \
+ -Os \
+ -g \
+ -I$(HAL_CONF_DIR) \
+ -D__START=main \
+ -D$(MCU) \
+ $(EFR32MG13_CONFIG_FILE_CPPFLAGS) \
+ $(NULL)
+
+include $(dir $(abspath $(lastword $(MAKEFILE_LIST))))/common-switches.mk
+
+#
+# Platform-Specific switches
+#
+
+DMP ?= 0
+RADIODEBUG ?= 0
+
+ifeq ($(DMP),1)
+COMMONCFLAGS += -DRADIO_CONFIG_DMP_SUPPORT=1
+endif
+
+ifeq ($(RADIODEBUG),1)
+COMMONCFLAGS += -DRADIO_CONFIG_DEBUG_COUNTERS_SUPPORT=1
+endif
+
+CPPFLAGS += \
+ $(COMMONCFLAGS) \
+ $(target_CPPFLAGS) \
+ $(NULL)
+
+CFLAGS += \
+ $(COMMONCFLAGS) \
+ $(target_CFLAGS) \
+ $(NULL)
+
+CXXFLAGS += \
+ $(COMMONCFLAGS) \
+ $(target_CXXFLAGS) \
+ -fno-exceptions \
+ -fno-rtti \
+ $(NULL)
+
+LDFLAGS += \
+ $(COMMONCFLAGS) \
+ $(target_LDFLAGS) \
+ -nostartfiles \
+ -specs=nano.specs \
+ -specs=nosys.specs \
+ -Wl,--gc-sections \
+ $(NULL)
+
+ECHO := @echo
+MAKE := make
+MKDIR_P := mkdir -p
+LN_S := ln -s
+RM_F := rm -f
+
+INSTALL := /usr/bin/install
+INSTALLFLAGS := -p
+
+BuildPath = build
+TopBuildDir = $(BuildPath)
+AbsTopBuildDir = $(PWD)/$(TopBuildDir)
+
+ResultPath = output
+TopResultDir = $(ResultPath)
+AbsTopResultDir = $(PWD)/$(TopResultDir)
+
+TargetTuple = efr32mg13
+
+ARCHS = cortex-m4
+
+TopTargetLibDir = $(TopResultDir)/$(TargetTuple)/lib
+
+ifndef BuildJobs
+BuildJobs := $(shell getconf _NPROCESSORS_ONLN)
+endif
+JOBSFLAG := -j$(BuildJobs)
+
+#
+# configure-arch <arch>
+#
+# Configure OpenThread for the specified architecture.
+#
+# arch - The architecture to configure.
+#
+define configure-arch
+$(ECHO) " CONFIG $(TargetTuple)..."
+(cd $(BuildPath)/$(TargetTuple) && $(AbsTopSourceDir)/configure \
+INSTALL="$(INSTALL) $(INSTALLFLAGS)" \
+CPP="$(CPP)" CC="$(CC)" CXX="$(CXX)" OBJC="$(OBJC)" OBJCXX="$(OBJCXX)" AR="$(AR)" RANLIB="$(RANLIB)" NM="$(NM)" STRIP="$(STRIP)" CPPFLAGS="$(CPPFLAGS)" CFLAGS="$(CFLAGS)" CXXFLAGS="$(CXXFLAGS)" LDFLAGS="$(LDFLAGS)" \
+--host=arm-none-eabi \
+--prefix=/ \
+--exec-prefix=/$(TargetTuple) \
+$(configure_OPTIONS))
+endef # configure-arch
+
+#
+# build-arch <arch>
+#
+# Build the OpenThread intermediate build products for the specified
+# architecture.
+#
+# arch - The architecture to build.
+#
+define build-arch
+$(ECHO) " BUILD $(TargetTuple)"
+$(MAKE) $(JOBSFLAG) -C $(BuildPath)/$(TargetTuple) --no-print-directory \
+all
+endef # build-arch
+
+#
+# stage-arch <arch>
+#
+# Stage (install) the OpenThread final build products for the specified
+# architecture.
+#
+# arch - The architecture to stage.
+#
+define stage-arch
+$(ECHO) " STAGE $(TargetTuple)"
+$(MAKE) $(JOBSFLAG) -C $(BuildPath)/$(TargetTuple) --no-print-directory \
+DESTDIR=$(AbsTopResultDir) \
+install
+endef # stage-arch
+
+#
+# ARCH_template <arch>
+#
+# Define macros, targets and rules to configure, build, and stage the
+# OpenThread for a single architecture.
+#
+# arch - The architecture to instantiate the template for.
+#
+define ARCH_template
+CONFIGURE_TARGETS += configure-$(1)
+BUILD_TARGETS += do-build-$(1)
+STAGE_TARGETS += stage-$(1)
+BUILD_DIRS += $(BuildPath)/$(TargetTuple)
+DIRECTORIES += $(BuildPath)/$(TargetTuple)
+
+configure-$(1): target_CPPFLAGS=$($(1)_target_CPPFLAGS)
+configure-$(1): target_CFLAGS=$($(1)_target_CFLAGS)
+configure-$(1): target_CXXFLAGS=$($(1)_target_CXXFLAGS)
+configure-$(1): target_LDFLAGS=$($(1)_target_LDFLAGS)
+
+configure-$(1): $(BuildPath)/$(TargetTuple)/config.status
+
+$(BuildPath)/$(TargetTuple)/config.status: | $(BuildPath)/$(TargetTuple)
+ $$(call configure-arch,$(1))
+
+do-build-$(1): configure-$(1)
+
+do-build-$(1):
+ +$$(call build-arch,$(1))
+
+stage-$(1): do-build-$(1)
+
+stage-$(1): | $(TopResultDir)
+ $$(call stage-arch,$(1))
+
+$(1): stage-$(1)
+endef # ARCH_template
+
+.DEFAULT_GOAL := all
+
+all: stage
+
+#
+# cortex-m4
+#
+
+cortex-m4_target_ABI = cortex-m4
+cortex-m4_target_CPPFLAGS = -mcpu=cortex-m4 -mfloat-abi=soft -mthumb
+cortex-m4_target_CFLAGS = -mcpu=cortex-m4 -mfloat-abi=soft -mthumb
+cortex-m4_target_CXXFLAGS = -mcpu=cortex-m4 -mfloat-abi=soft -mthumb
+cortex-m4_target_LDFLAGS = -mcpu=cortex-m4 -mfloat-abi=soft -mthumb
+
+# Instantiate an architecture-specific build template for each target
+# architecture.
+
+$(foreach arch,$(ARCHS),$(eval $(call ARCH_template,$(arch))))
+
+#
+# Common / Finalization
+#
+
+configure: $(CONFIGURE_TARGETS)
+
+build: $(BUILD_TARGETS)
+
+stage: $(STAGE_TARGETS)
+
+DIRECTORIES = $(TopResultDir) $(TopResultDir)/$(TargetTuple)/lib $(BUILD_DIRS)
+
+CLEAN_DIRS = $(TopResultDir) $(BUILD_DIRS)
+
+all: stage
+
+$(DIRECTORIES):
+ $(ECHO) " MKDIR $@"
+ @$(MKDIR_P) "$@"
+
+clean:
+ $(ECHO) " CLEAN"
+ @$(RM_F) -r $(CLEAN_DIRS)
+
+help:
+ $(ECHO) "Simply type 'make -f $(firstword $(MAKEFILE_LIST))' to build OpenThread for the following "
+ $(ECHO) "architectures: "
+ $(ECHO) ""
+ $(ECHO) " $(ARCHS)"
+ $(ECHO) ""
+ $(ECHO) "To build only a particular architecture, specify: "
+ $(ECHO) ""
+ $(ECHO) " make -f $(firstword $(MAKEFILE_LIST)) <architecture>"
+ $(ECHO) ""
diff --git a/examples/Makefile-efr32mg21 b/examples/Makefile-efr32mg21
index 5ff23a8..20d23ee 100644
--- a/examples/Makefile-efr32mg21
+++ b/examples/Makefile-efr32mg21
@@ -74,13 +74,13 @@
EFR32_MBEDTLS_CPPFLAGS += -DMBEDTLS_USER_CONFIG_FILE='\"efr32-mbedtls-config.h\"'
EFR32_MBEDTLS_CPPFLAGS += -D$(MCU)
EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/examples/platforms/efr32mg21/crypto
-EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.6/util/third_party/mbedtls/configs
-EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.6/platform/CMSIS/Include
-EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.6/util/third_party/mbedtls/sl_crypto/include
-EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.6/platform/Device/SiliconLabs/EFR32MG21/Include
-EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.6/platform/emlib/inc
-EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.6/platform/radio/rail_lib/chip/efr32/efr32xg2x
-EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.6/hardware/kit/common/drivers
+EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.7/util/third_party/mbedtls/configs
+EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.7/platform/CMSIS/Include
+EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.7/util/third_party/mbedtls/sl_crypto/include
+EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.7/platform/Device/SiliconLabs/EFR32MG21/Include
+EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.7/platform/emlib/inc
+EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.7/platform/radio/rail_lib/chip/efr32/efr32xg2x
+EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/silabs/gecko_sdk_suite/v2.7/hardware/kit/common/drivers
EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/mbedtls
EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/mbedtls/repo/include
EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/mbedtls/repo/include/mbedtls
@@ -98,12 +98,28 @@
-Os \
-g \
-I$(HAL_CONF_DIR) \
+ -D__START=main \
-D$(MCU) \
$(EFR32MG21_CONFIG_FILE_CPPFLAGS) \
$(NULL)
include $(dir $(abspath $(lastword $(MAKEFILE_LIST))))/common-switches.mk
+#
+# Platform-Specific switches
+#
+
+DMP ?= 0
+RADIODEBUG ?= 0
+
+ifeq ($(DMP),1)
+COMMONCFLAGS += -DRADIO_CONFIG_DMP_SUPPORT=1
+endif
+
+ifeq ($(RADIODEBUG),1)
+COMMONCFLAGS += -DRADIO_CONFIG_DEBUG_COUNTERS_SUPPORT=1
+endif
+
CPPFLAGS += \
$(COMMONCFLAGS) \
$(target_CPPFLAGS) \
diff --git a/examples/Makefile-nrf52811 b/examples/Makefile-nrf52811
index 1a936c7..63e8920 100644
--- a/examples/Makefile-nrf52811
+++ b/examples/Makefile-nrf52811
@@ -39,7 +39,6 @@
RANLIB = arm-none-eabi-ranlib
OBJCOPY = arm-none-eabi-objcopy
-BuildJobs ?= 10
GCCVersion = $(shell expr `$(CC) -dumpversion | cut -f1 -d.`)
configure_OPTIONS = \
@@ -62,14 +61,14 @@
NRF52811_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/mbedtls/repo/include
NRF52811_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/mbedtls/repo/include/mbedtls
NRF52811_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/NordicSemiconductor/libraries/crypto
-NRF52811_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/NordicSemiconductor/libraries/nrf_cc310/include
+NRF52811_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/NordicSemiconductor/libraries/nrf_security/mbedtls_plat_config
NRF52811_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/NordicSemiconductor/nrfx/mdk
NRF52811_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/NordicSemiconductor/cmsis
NRF52811_MBEDTLS_CPPFLAGS += -DNRF52811_XXAA
NRF52811_CONFIG_FILE_CPPFLAGS = -DOPENTHREAD_PROJECT_CORE_CONFIG_FILE='\"openthread-core-nrf52811-config.h\"'
NRF52811_CONFIG_FILE_CPPFLAGS += -DOPENTHREAD_CORE_CONFIG_PLATFORM_CHECK_FILE='\"openthread-core-nrf52811-config-check.h\"'
-NRF52811_CONFIG_FILE_CPPFLAGS += -I$(AbsTopSourceDir)/examples/platforms/nrf52811/
+NRF52811_CONFIG_FILE_CPPFLAGS += -I$(AbsTopSourceDir)/examples/platforms/nrf528xx/nrf52811
COMMONCFLAGS := \
-fdata-sections \
diff --git a/examples/Makefile-nrf52833 b/examples/Makefile-nrf52833
new file mode 100644
index 0000000..b13286c
--- /dev/null
+++ b/examples/Makefile-nrf52833
@@ -0,0 +1,343 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+.NOTPARALLEL:
+
+AR = arm-none-eabi-ar
+CCAS = $(CCPREFIX) arm-none-eabi-gcc
+CPP = arm-none-eabi-cpp
+CC = $(CCPREFIX) arm-none-eabi-gcc
+CXX = $(CCPREFIX) arm-none-eabi-g++
+LD = arm-none-eabi-ld
+STRIP = arm-none-eabi-strip
+NM = arm-none-eabi-nm
+RANLIB = arm-none-eabi-ranlib
+OBJCOPY = arm-none-eabi-objcopy
+
+GCCVersion = $(shell expr `$(CC) -dumpversion | cut -f1 -d.`)
+
+configure_OPTIONS = \
+ --enable-ftd \
+ --enable-mtd \
+ --enable-linker-map \
+ --with-examples=nrf52833 \
+ MBEDTLS_CPPFLAGS="$(NRF52833_MBEDTLS_CPPFLAGS)" \
+ $(NULL)
+
+ifdef SRC_PATH
+configure_OPTIONS += --srcdir="$(SRC_PATH)"
+endif
+
+TopSourceDir := $(dir $(shell readlink $(firstword $(MAKEFILE_LIST))))..
+AbsTopSourceDir := $(dir $(realpath $(firstword $(MAKEFILE_LIST))))..
+
+NRF52833_MBEDTLS_CPPFLAGS = -DMBEDTLS_CONFIG_FILE='\"mbedtls-config.h\"'
+NRF52833_MBEDTLS_CPPFLAGS += -DMBEDTLS_USER_CONFIG_FILE='\"nrf52833-mbedtls-config.h\"'
+NRF52833_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/mbedtls
+NRF52833_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/mbedtls/repo/include
+NRF52833_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/mbedtls/repo/include/mbedtls
+NRF52833_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/NordicSemiconductor/libraries/crypto
+NRF52833_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/NordicSemiconductor/libraries/nrf_security/mbedtls_plat_config
+NRF52833_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/NordicSemiconductor/nrfx/mdk
+NRF52833_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/NordicSemiconductor/cmsis
+NRF52833_MBEDTLS_CPPFLAGS += -DNRF52833_XXAA
+
+NRF52833_CONFIG_FILE_CPPFLAGS = -DOPENTHREAD_PROJECT_CORE_CONFIG_FILE='\"openthread-core-nrf52833-config.h\"'
+NRF52833_CONFIG_FILE_CPPFLAGS += -DOPENTHREAD_CORE_CONFIG_PLATFORM_CHECK_FILE='\"openthread-core-nrf52833-config-check.h\"'
+NRF52833_CONFIG_FILE_CPPFLAGS += -I$(AbsTopSourceDir)/examples/platforms/nrf528xx/nrf52833
+
+COMMONCFLAGS := \
+ -fdata-sections \
+ -ffunction-sections \
+ -Os \
+ -g \
+ $(NRF52833_CONFIG_FILE_CPPFLAGS) \
+ $(NULL)
+
+include $(dir $(abspath $(lastword $(MAKEFILE_LIST))))/common-switches.mk
+
+ifeq ($(BOOTLOADER),1)
+$(info Warning: BOOTLOADER=1 switch is deprecated. Defaulting to BOOTLOADER=USB.)
+override BOOTLOADER = USB
+endif
+
+ifeq ($(BOOTLOADER),USB)
+configure_OPTIONS += --with-custom-linker-file=$(AbsTopSourceDir)/examples/platforms/nrf528xx/nrf52833/nrf52833_bootloader_usb.ld
+COMMONCFLAGS += -DAPP_USBD_NRF_DFU_TRIGGER_ENABLED=1
+endif
+
+ifeq ($(BOOTLOADER),UART)
+configure_OPTIONS += --with-custom-linker-file=$(AbsTopSourceDir)/examples/platforms/nrf528xx/nrf52833/nrf52833_bootloader_uart.ld
+endif
+
+ifeq ($(BOOTLOADER),BLE)
+configure_OPTIONS += --with-custom-linker-file=$(AbsTopSourceDir)/examples/platforms/nrf528xx/nrf52833/nrf52833_bootloader_ble.ld
+endif
+
+#
+# Select transport which CLI, NCP and RCP examples will use to communicate.
+# To disable all transports use the DISABLE_TRANSPORTS switch. This will disable
+# the build of all above examples.
+# If NCP_SPI switch is set, only NCP and RCP examples will be built.
+# Otherwise the user can select USB transport. If no transports were selected,
+# the default serial transport is UART.
+#
+ifndef DISABLE_TRANSPORTS
+configure_OPTIONS += --enable-ncp
+configure_OPTIONS += --enable-radio-only
+ifeq ($(NCP_SPI),1)
+COMMONCFLAGS += -DSPIS_AS_SERIAL_TRANSPORT=1
+COMMONCFLAGS += -DOPENTHREAD_CONFIG_NCP_SPI_ENABLE=1
+else
+COMMONCFLAGS += -DOPENTHREAD_CONFIG_NCP_UART_ENABLE=1
+configure_OPTIONS += --enable-cli
+ifeq ($(USB),1)
+COMMONCFLAGS += -DUSB_CDC_AS_SERIAL_TRANSPORT=1
+else
+COMMONCFLAGS += -DUART_AS_SERIAL_TRANSPORT=1
+endif # USB == 1
+endif # NCP_SPI == 1
+endif # DISABLE_TRANSPORTS
+
+NRF52833_MBEDTLS_CPPFLAGS += -DDISABLE_CC310=1
+
+ifeq ($(shell expr $(GCCVersion) \>= 7), 1)
+ COMMONCFLAGS += -Wno-expansion-to-defined
+endif
+
+CPPFLAGS += \
+ $(COMMONCFLAGS) \
+ $(target_CPPFLAGS) \
+ $(NULL)
+
+CFLAGS += \
+ $(COMMONCFLAGS) \
+ $(target_CFLAGS) \
+ $(NULL)
+
+CXXFLAGS += \
+ $(COMMONCFLAGS) \
+ $(target_CXXFLAGS) \
+ -fno-exceptions \
+ -fno-rtti \
+ $(NULL)
+
+LDFLAGS += \
+ $(COMMONCFLAGS) \
+ $(target_LDFLAGS) \
+ -specs=nano.specs \
+ -specs=nosys.specs \
+ -Wl,--gc-sections \
+ $(NULL)
+
+CCASFLAGS += \
+ $(COMMONCCASFLAGS) \
+ $(target_CCASFLAGS) \
+ -x \
+ assembler-with-cpp \
+ $(NULL)
+
+ECHO := @echo
+MAKE := make
+MKDIR_P := mkdir -p
+LN_S := ln -s
+RM_F := rm -f
+
+INSTALL := /usr/bin/install
+INSTALLFLAGS := -p
+
+BuildPath = build
+TopBuildDir = $(BuildPath)
+AbsTopBuildDir = $(PWD)/$(TopBuildDir)
+
+ResultPath = output
+TopResultDir = $(ResultPath)
+AbsTopResultDir = $(PWD)/$(TopResultDir)
+
+TargetTuple = nrf52833
+
+ARCHS = cortex-m4
+
+TopTargetLibDir = $(TopResultDir)/$(TargetTuple)/lib
+
+ifndef BuildJobs
+BuildJobs := $(shell getconf _NPROCESSORS_ONLN)
+endif
+JOBSFLAG := -j$(BuildJobs)
+
+#
+# configure-arch <arch>
+#
+# Configure OpenThread for the specified architecture.
+#
+# arch - The architecture to configure.
+#
+define configure-arch
+$(ECHO) " CONFIG $(TargetTuple)..."
+(cd $(BuildPath)/$(TargetTuple) && $(AbsTopSourceDir)/configure \
+INSTALL="$(INSTALL) $(INSTALLFLAGS)" \
+CPP="$(CPP)" CC="$(CC)" CXX="$(CXX)" CCAS="$(CCAS)" OBJC="$(OBJC)" OBJCXX="$(OBJCXX)" AR="$(AR)" RANLIB="$(RANLIB)" NM="$(NM)" STRIP="$(STRIP)" CPPFLAGS="$(CPPFLAGS)" CFLAGS="$(CFLAGS)" CXXFLAGS="$(CXXFLAGS)" CCASFLAGS="$(CCASFLAGS)" LDFLAGS="$(LDFLAGS)" \
+--host=arm-none-eabi \
+--prefix=/ \
+--exec-prefix=/$(TargetTuple) \
+$(configure_OPTIONS))
+endef # configure-arch
+
+#
+# build-arch <arch>
+#
+# Build the OpenThread intermediate build products for the specified
+# architecture.
+#
+# arch - The architecture to build.
+#
+define build-arch
+$(ECHO) " BUILD $(TargetTuple)"
+$(MAKE) $(JOBSFLAG) -C $(BuildPath)/$(TargetTuple) --no-print-directory \
+all
+endef # build-arch
+
+#
+# stage-arch <arch>
+#
+# Stage (install) the OpenThread final build products for the specified
+# architecture.
+#
+# arch - The architecture to stage.
+#
+define stage-arch
+$(ECHO) " STAGE $(TargetTuple)"
+$(MAKE) $(JOBSFLAG) -C $(BuildPath)/$(TargetTuple) --no-print-directory \
+DESTDIR=$(AbsTopResultDir) \
+install
+endef # stage-arch
+
+#
+# ARCH_template <arch>
+#
+# Define macros, targets and rules to configure, build, and stage the
+# OpenThread for a single architecture.
+#
+# arch - The architecture to instantiate the template for.
+#
+define ARCH_template
+CONFIGURE_TARGETS += configure-$(1)
+BUILD_TARGETS += do-build-$(1)
+STAGE_TARGETS += stage-$(1)
+BUILD_DIRS += $(BuildPath)/$(TargetTuple)
+DIRECTORIES += $(BuildPath)/$(TargetTuple)
+
+configure-$(1): target_CPPFLAGS=$($(1)_target_CPPFLAGS)
+configure-$(1): target_CFLAGS=$($(1)_target_CFLAGS)
+configure-$(1): target_CXXFLAGS=$($(1)_target_CXXFLAGS)
+configure-$(1): target_LDFLAGS=$($(1)_target_LDFLAGS)
+configure-$(1): target_CCASFLAGS=$($(1)_target_CCASFLAGS)
+
+configure-$(1): $(BuildPath)/$(TargetTuple)/config.status
+
+$(BuildPath)/$(TargetTuple)/config.status: | $(BuildPath)/$(TargetTuple)
+ $$(call configure-arch,$(1))
+
+do-build-$(1): configure-$(1)
+
+do-build-$(1):
+ +$$(call build-arch,$(1))
+
+stage-$(1): do-build-$(1)
+
+stage-$(1): | $(TopResultDir)
+ $$(call stage-arch,$(1))
+
+$(1): stage-$(1)
+endef # ARCH_template
+
+.DEFAULT_GOAL := all
+
+all: stage
+
+#
+# Cortex-m4
+#
+
+cortex-m4_target_ABI = cortex-m4
+cortex-m4_target_CPPFLAGS = -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb -mabi=aapcs
+cortex-m4_target_CFLAGS = -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb -mabi=aapcs
+cortex-m4_target_CXXFLAGS = -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb -mabi=aapcs
+cortex-m4_target_LDFLAGS = -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb -mabi=aapcs
+
+# Instantiate an architecture-specific build template for each target
+# architecture.
+
+$(foreach arch,$(ARCHS),$(eval $(call ARCH_template,$(arch))))
+
+#
+# Flashing / Debugging
+#
+
+TARGET_APP ?= ot-cli-ftd
+APP_FILE_NAME = $(TopResultDir)/$(TargetTuple)/bin/$(TARGET_APP)
+APP_FILE_HEX = $(TopResultDir)/$(TargetTuple)/bin/$(TARGET_APP).hex
+
+nrfjprog: $(APP_FILE_NAME)
+ arm-none-eabi-objcopy -O ihex $(<) $(APP_FILE_HEX)
+ nrfjprog -f NRF52 --sectorerase --reset --program $(APP_FILE_HEX)
+
+#
+# Common / Finalization
+#
+
+configure: $(CONFIGURE_TARGETS)
+
+build: $(BUILD_TARGETS)
+
+stage: $(STAGE_TARGETS)
+
+DIRECTORIES = $(TopResultDir) $(TopResultDir)/$(TargetTuple)/lib $(BUILD_DIRS)
+
+CLEAN_DIRS = $(TopResultDir) $(BUILD_DIRS)
+
+all: stage
+
+$(DIRECTORIES):
+ $(ECHO) " MKDIR $@"
+ @$(MKDIR_P) "$@"
+
+clean:
+ $(ECHO) " CLEAN"
+ @$(RM_F) -r $(CLEAN_DIRS)
+
+help:
+ $(ECHO) "Simply type 'make -f $(firstword $(MAKEFILE_LIST))' to build OpenThread for the following "
+ $(ECHO) "architectures: "
+ $(ECHO) ""
+ $(ECHO) " $(ARCHS)"
+ $(ECHO) ""
+ $(ECHO) "To build only a particular architecture, specify: "
+ $(ECHO) ""
+ $(ECHO) " make -f $(firstword $(MAKEFILE_LIST)) <architecture>"
+ $(ECHO) ""
diff --git a/examples/Makefile-nrf52840 b/examples/Makefile-nrf52840
index d7a3574..e0b1576 100644
--- a/examples/Makefile-nrf52840
+++ b/examples/Makefile-nrf52840
@@ -39,9 +39,16 @@
RANLIB = arm-none-eabi-ranlib
OBJCOPY = arm-none-eabi-objcopy
-BuildJobs ?= 10
GCCVersion = $(shell expr `$(CC) -dumpversion | cut -f1 -d.`)
+# Disable built-in mbedTLS by default allowing for nrf_security implementation with hardware acceleration.
+# When set to 0 built-in, software implementation would be used.
+DISABLE_BUILTIN_MBEDTLS ?= 1
+
+ifeq ($(DISABLE_CC310), 1)
+$(error DISABLE_CC310=1 is deprecated, please use DISABLE_BUILTIN_MBEDTLS=0)
+endif
+
configure_OPTIONS = \
--enable-ftd \
--enable-mtd \
@@ -49,10 +56,6 @@
--with-examples=nrf52840 \
$(NULL)
-ifneq ($(DISABLE_BUILTIN_MBEDTLS), 1)
-configure_OPTIONS += MBEDTLS_CPPFLAGS="$(NRF52840_MBEDTLS_CPPFLAGS)"
-endif
-
ifdef SRC_PATH
configure_OPTIONS += --srcdir="$(SRC_PATH)"
endif
@@ -60,20 +63,42 @@
TopSourceDir := $(dir $(shell readlink $(firstword $(MAKEFILE_LIST))))..
AbsTopSourceDir := $(dir $(realpath $(firstword $(MAKEFILE_LIST))))..
-NRF52840_MBEDTLS_CPPFLAGS = -DMBEDTLS_CONFIG_FILE='\"mbedtls-config.h\"'
NRF52840_MBEDTLS_CPPFLAGS += -DMBEDTLS_USER_CONFIG_FILE='\"nrf52840-mbedtls-config.h\"'
+NRF52840_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/NordicSemiconductor/libraries/nrf_security/mbedtls_plat_config
+
+ifeq ($(DISABLE_BUILTIN_MBEDTLS), 1)
+NRF52840_MBEDTLS_CPPFLAGS += -DMBEDTLS_CONFIG_FILE='\"nrf-config.h\"'
+NRF52840_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/NordicSemiconductor/libraries/nrf_security/include
+NRF52840_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/NordicSemiconductor/libraries/nrf_security/config
+NRF52840_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/include
+else
+NRF52840_MBEDTLS_CPPFLAGS += -DMBEDTLS_CONFIG_FILE='\"mbedtls-config.h\"'
NRF52840_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/mbedtls
NRF52840_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/mbedtls/repo/include
-NRF52840_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/mbedtls/repo/include/mbedtls
-NRF52840_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/NordicSemiconductor/libraries/crypto
-NRF52840_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/NordicSemiconductor/libraries/nrf_cc310/include
-NRF52840_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/NordicSemiconductor/nrfx/mdk
-NRF52840_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/NordicSemiconductor/cmsis
NRF52840_MBEDTLS_CPPFLAGS += -DNRF52840_XXAA
+endif
+
+ifeq ($(MBEDTLS_THREADING), 1)
+ifeq ($(DISABLE_BUILTIN_MBEDTLS), 1)
+$(error Cannot use MBEDTLS_THREADING with CC310 support. CC310 library comes with built-in threading support. To disable CC310 please use DISABLE_BUILTIN_MBEDTLS=0)
+else
+NRF52840_MBEDTLS_CPPFLAGS += -DMBEDTLS_THREADING_C
+NRF52840_MBEDTLS_CPPFLAGS += -DMBEDTLS_THREADING_ALT
+NRF52840_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/NordicSemiconductor/libraries/nrf_security/include/software-only-threading
+endif
+endif
+
+ifdef MBEDTLS_THREADING_MUTEX_DEF
+ifneq ($(MBEDTLS_THREADING), 1)
+$(error Cannot use MBEDTLS_THREADING_MUTEX_DEF without MBEDTLS_THREADING=1)
+else
+NRF52840_MBEDTLS_CPPFLAGS += -DMBEDTLS_THREADING_MUTEX_DEF='\"$(MBEDTLS_THREADING_MUTEX_DEF)\"'
+endif
+endif
NRF52840_CONFIG_FILE_CPPFLAGS = -DOPENTHREAD_PROJECT_CORE_CONFIG_FILE='\"openthread-core-nrf52840-config.h\"'
NRF52840_CONFIG_FILE_CPPFLAGS += -DOPENTHREAD_CORE_CONFIG_PLATFORM_CHECK_FILE='\"openthread-core-nrf52840-config-check.h\"'
-NRF52840_CONFIG_FILE_CPPFLAGS += -I$(AbsTopSourceDir)/examples/platforms/nrf52840/
+NRF52840_CONFIG_FILE_CPPFLAGS += -I$(AbsTopSourceDir)/examples/platforms/nrf528xx/nrf52840
COMMONCFLAGS := \
-fdata-sections \
@@ -85,11 +110,30 @@
include $(dir $(abspath $(lastword $(MAKEFILE_LIST))))/common-switches.mk
+ifeq ($(DISABLE_BUILTIN_MBEDTLS),1)
+COMMONCFLAGS += $(NRF52840_MBEDTLS_CPPFLAGS)
+else
+configure_OPTIONS += MBEDTLS_CPPFLAGS="$(NRF52840_MBEDTLS_CPPFLAGS)"
+endif
+
ifeq ($(BOOTLOADER),1)
-configure_OPTIONS += --with-custom-linker-file=$(AbsTopSourceDir)/examples/platforms/nrf52840/nrf52840_bootloader.ld
+$(info Warning: BOOTLOADER=1 switch is deprecated. Defaulting to BOOTLOADER=USB.)
+override BOOTLOADER = USB
+endif
+
+ifeq ($(BOOTLOADER),USB)
+configure_OPTIONS += --with-custom-linker-file=$(AbsTopSourceDir)/examples/platforms/nrf528xx/nrf52840/nrf52840_bootloader_usb.ld
COMMONCFLAGS += -DAPP_USBD_NRF_DFU_TRIGGER_ENABLED=1
endif
+ifeq ($(BOOTLOADER),UART)
+configure_OPTIONS += --with-custom-linker-file=$(AbsTopSourceDir)/examples/platforms/nrf528xx/nrf52840/nrf52840_bootloader_uart.ld
+endif
+
+ifeq ($(BOOTLOADER),BLE)
+configure_OPTIONS += --with-custom-linker-file=$(AbsTopSourceDir)/examples/platforms/nrf528xx/nrf52840/nrf52840_bootloader_ble.ld
+endif
+
#
# Select transport which CLI, NCP and RCP examples will use to communicate.
# To disable all transports use the DISABLE_TRANSPORTS switch. This will disable
@@ -115,19 +159,6 @@
endif # NCP_SPI == 1
endif # DISABLE_TRANSPORTS
-ifeq ($(DISABLE_CC310), 1)
-NRF52840_MBEDTLS_CPPFLAGS += -DDISABLE_CC310=1
-endif
-
-ifeq ($(MBEDTLS_THREADING), 1)
-NRF52840_MBEDTLS_CPPFLAGS += -DDISABLE_CC310=1
-NRF52840_MBEDTLS_CPPFLAGS += -DMBEDTLS_THREADING=1
-endif
-
-ifdef MBEDTLS_THREADING_MUTEX_DEF
-NRF52840_MBEDTLS_CPPFLAGS += -DMBEDTLS_THREADING_MUTEX_DEF='\"$(MBEDTLS_THREADING_MUTEX_DEF)\"'
-endif
-
ifeq ($(shell expr $(GCCVersion) \>= 7), 1)
COMMONCFLAGS += -Wno-expansion-to-defined
endif
diff --git a/examples/Makefile-posix b/examples/Makefile-posix
index 425e643..85b32ca 100644
--- a/examples/Makefile-posix
+++ b/examples/Makefile-posix
@@ -48,6 +48,7 @@
DIAGNOSTIC ?= 1
DNS_CLIENT ?= 1
ECDSA ?= 1
+IP6_FRAGM ?= 1
JAM_DETECTION ?= 1
JOINER ?= 1
LEGACY ?= 1
diff --git a/examples/apps/CMakeLists.txt b/examples/apps/CMakeLists.txt
new file mode 100644
index 0000000..8200d57
--- /dev/null
+++ b/examples/apps/CMakeLists.txt
@@ -0,0 +1,30 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+add_subdirectory(cli)
+add_subdirectory(ncp)
diff --git a/examples/apps/cli/CMakeLists.txt b/examples/apps/cli/CMakeLists.txt
new file mode 100644
index 0000000..dac2bc2
--- /dev/null
+++ b/examples/apps/cli/CMakeLists.txt
@@ -0,0 +1,61 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+add_executable(ot-cli-ftd
+ main.c
+)
+
+add_executable(ot-cli-mtd
+ main.c
+)
+
+set(COMMON_INCLUDES
+ ${OT_PUBLIC_INCLUDES}
+ ${OT_PRIVATE_INCLUDES}
+ ${PROJECT_SOURCE_DIR}/examples/platforms
+ ${PROJECT_SOURCE_DIR}/src/core
+)
+
+target_include_directories(ot-cli-ftd PRIVATE ${COMMON_INCLUDES})
+target_include_directories(ot-cli-mtd PRIVATE ${COMMON_INCLUDES})
+
+target_link_libraries(ot-cli-ftd
+ openthread-cli-ftd
+ ${OT_PLATFORM_LIB}
+ openthread-ftd
+ ${OT_PLATFORM_LIB}
+ mbedcrypto
+)
+
+target_link_libraries(ot-cli-mtd
+ openthread-cli-mtd
+ ${OT_PLATFORM_LIB}
+ openthread-mtd
+ ${OT_PLATFORM_LIB}
+ mbedcrypto
+)
diff --git a/examples/apps/cli/main.c b/examples/apps/cli/main.c
index 3579641..934b4a5 100644
--- a/examples/apps/cli/main.c
+++ b/examples/apps/cli/main.c
@@ -46,6 +46,10 @@
void __gcov_flush();
#endif
+#ifndef OPENTHREAD_ENABLE_COVERAGE
+#define OPENTHREAD_ENABLE_COVERAGE 0
+#endif
+
#if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE
void *otPlatCAlloc(size_t aNum, size_t aSize)
{
diff --git a/examples/apps/ncp/CMakeLists.txt b/examples/apps/ncp/CMakeLists.txt
new file mode 100644
index 0000000..5027850
--- /dev/null
+++ b/examples/apps/ncp/CMakeLists.txt
@@ -0,0 +1,73 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+add_executable(ot-ncp-ftd
+ main.c
+)
+
+add_executable(ot-ncp-mtd
+ main.c
+)
+
+add_executable(ot-rcp
+ main.c
+)
+
+set(COMMON_INCLUDES
+ ${OT_PUBLIC_INCLUDES}
+ ${OT_PRIVATE_INCLUDES}
+ ${PROJECT_SOURCE_DIR}/examples/platforms
+ ${PROJECT_SOURCE_DIR}/src/core
+)
+
+target_include_directories(ot-ncp-ftd PRIVATE ${COMMON_INCLUDES})
+target_include_directories(ot-ncp-mtd PRIVATE ${COMMON_INCLUDES})
+target_include_directories(ot-rcp PRIVATE ${COMMON_INCLUDES})
+
+target_link_libraries(ot-ncp-ftd
+ openthread-ncp-ftd
+ ${OT_PLATFORM_LIB}
+ openthread-ftd
+ ${OT_PLATFORM_LIB}
+ mbedcrypto
+)
+
+target_link_libraries(ot-ncp-mtd
+ openthread-ncp-mtd
+ ${OT_PLATFORM_LIB}
+ openthread-mtd
+ ${OT_PLATFORM_LIB}
+ mbedcrypto
+)
+
+target_link_libraries(ot-rcp
+ openthread-rcp
+ ${OT_PLATFORM_LIB}
+ openthread-radio
+ ${OT_PLATFORM_LIB}
+)
diff --git a/examples/apps/ncp/main.c b/examples/apps/ncp/main.c
index d982215..8fdd544 100644
--- a/examples/apps/ncp/main.c
+++ b/examples/apps/ncp/main.c
@@ -45,6 +45,10 @@
void __gcov_flush();
#endif
+#ifndef OPENTHREAD_ENABLE_COVERAGE
+#define OPENTHREAD_ENABLE_COVERAGE 0
+#endif
+
#if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE
void *otPlatCAlloc(size_t aNum, size_t aSize)
{
diff --git a/examples/common-switches.mk b/examples/common-switches.mk
index 7b79c9f..589f7cc 100644
--- a/examples/common-switches.mk
+++ b/examples/common-switches.mk
@@ -44,8 +44,10 @@
DIAGNOSTIC ?= 0
DISABLE_DOC ?= 0
DNS_CLIENT ?= 0
+DYNAMIC_LOG_LEVEL ?= 0
ECDSA ?= 0
EXTERNAL_HEAP ?= 0
+IP6_FRAGM ?= 0
JAM_DETECTION ?= 0
JOINER ?= 0
LEGACY ?= 0
@@ -130,6 +132,10 @@
COMMONCFLAGS += -DOPENTHREAD_CONFIG_DNS_CLIENT_ENABLE=1
endif
+ifeq ($(DYNAMIC_LOG_LEVEL),1)
+COMMONCFLAGS += -DOPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE=1
+endif
+
ifeq ($(ECDSA),1)
COMMONCFLAGS += -DOPENTHREAD_CONFIG_ECDSA_ENABLE=1
endif
@@ -138,6 +144,10 @@
COMMONCFLAGS += -DOPENTHREAD_CONFIG_HEAP_EXTERNAL_ENABLE=1
endif
+ifeq ($(IP6_FRAGM),1)
+COMMONCFLAGS += -DOPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE=1
+endif
+
ifeq ($(JAM_DETECTION),1)
COMMONCFLAGS += -DOPENTHREAD_CONFIG_JAM_DETECTION_ENABLE=1
endif
@@ -188,7 +198,7 @@
endif
ifeq ($(TIME_SYNC),1)
-COMMONCFLAGS += -DOPENTHREAD_CONFIG_TIME_SYNC_ENABLE=1 -DOPENTHREAD_MAC_CONFIG_HEADER_IE_SUPPORT=1
+COMMONCFLAGS += -DOPENTHREAD_CONFIG_TIME_SYNC_ENABLE=1 -DOPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT=1
endif
ifeq ($(UDP_FORWARD),1)
@@ -199,6 +209,10 @@
configure_OPTIONS += --disable-builtin-mbedtls
endif
+ifneq ($(BUILTIN_MBEDTLS_MANAGEMENT),)
+COMMONCFLAGS += -DOPENTHREAD_CONFIG_ENABLE_BUILTIN_MBEDTLS_MANAGEMENT=$(BUILTIN_MBEDTLS_MANAGEMENT)
+endif
+
ifeq ($(DISABLE_EXECUTABLE),1)
configure_OPTIONS += --enable-executable=no
endif
@@ -215,6 +229,8 @@
ifeq ($(SETTINGS_RAM),1)
COMMONCFLAGS += -DOPENTHREAD_SETTINGS_RAM=1
+else
+COMMONCFLAGS += -DOPENTHREAD_SETTINGS_RAM=0
endif
ifeq ($(FULL_LOGS),1)
diff --git a/examples/platforms/CMakeLists.txt b/examples/platforms/CMakeLists.txt
new file mode 100644
index 0000000..c384bb1
--- /dev/null
+++ b/examples/platforms/CMakeLists.txt
@@ -0,0 +1,29 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+add_subdirectory(utils)
diff --git a/examples/platforms/Makefile.am b/examples/platforms/Makefile.am
index 99d06c8..7bd3df3 100644
--- a/examples/platforms/Makefile.am
+++ b/examples/platforms/Makefile.am
@@ -36,11 +36,11 @@
cc2650 \
cc2652 \
efr32mg12 \
+ efr32mg13 \
efr32mg21 \
gp712 \
kw41z \
- nrf52811 \
- nrf52840 \
+ nrf528xx \
posix \
qpg6095 \
samr21 \
@@ -73,6 +73,10 @@
SUBDIRS += efr32mg12
endif
+if OPENTHREAD_EXAMPLES_EFR32MG13
+SUBDIRS += efr32mg13
+endif
+
if OPENTHREAD_EXAMPLES_EFR32MG21
SUBDIRS += efr32mg21
endif
@@ -85,12 +89,8 @@
SUBDIRS += kw41z
endif
-if OPENTHREAD_EXAMPLES_NRF52811
-SUBDIRS += nrf52811
-endif
-
-if OPENTHREAD_EXAMPLES_NRF52840
-SUBDIRS += nrf52840
+if OPENTHREAD_EXAMPLES_NRF528XX
+SUBDIRS += nrf528xx
endif
if OPENTHREAD_EXAMPLES_POSIX
@@ -117,11 +117,11 @@
cc2650 \
cc2652 \
efr32mg12 \
+ efr32mg13 \
efr32mg21 \
gp712 \
kw41z \
- nrf52811 \
- nrf52840 \
+ nrf528xx \
posix \
qpg6095 \
samr21 \
diff --git a/examples/platforms/Makefile.platform.am b/examples/platforms/Makefile.platform.am
index f3c3217..2fd657e 100644
--- a/examples/platforms/Makefile.platform.am
+++ b/examples/platforms/Makefile.platform.am
@@ -61,6 +61,10 @@
include $(top_srcdir)/examples/platforms/efr32mg12/Makefile.platform.am
endif
+if OPENTHREAD_EXAMPLES_EFR32MG13
+include $(top_srcdir)/examples/platforms/efr32mg13/Makefile.platform.am
+endif
+
if OPENTHREAD_EXAMPLES_EFR32MG21
include $(top_srcdir)/examples/platforms/efr32mg21/Makefile.platform.am
endif
@@ -74,11 +78,15 @@
endif
if OPENTHREAD_EXAMPLES_NRF52811
-include $(top_srcdir)/examples/platforms/nrf52811/Makefile.platform.am
+include $(top_srcdir)/examples/platforms/nrf528xx/nrf52811/Makefile.platform.am
+endif
+
+if OPENTHREAD_EXAMPLES_NRF52833
+include $(top_srcdir)/examples/platforms/nrf528xx/nrf52833/Makefile.platform.am
endif
if OPENTHREAD_EXAMPLES_NRF52840
-include $(top_srcdir)/examples/platforms/nrf52840/Makefile.platform.am
+include $(top_srcdir)/examples/platforms/nrf528xx/nrf52840/Makefile.platform.am
endif
if OPENTHREAD_EXAMPLES_QPG6095
diff --git a/examples/platforms/cc1352/radio.c b/examples/platforms/cc1352/radio.c
index 080072c..b401fa8 100644
--- a/examples/platforms/cc1352/radio.c
+++ b/examples/platforms/cc1352/radio.c
@@ -32,6 +32,7 @@
*
*/
+#include "openthread-core-config.h"
#include <openthread/config.h>
#include <assert.h>
@@ -1330,6 +1331,28 @@
/**
* Function documented in platform/radio.h
*/
+otError otPlatRadioGetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t *aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ OT_UNUSED_VARIABLE(aThreshold);
+
+ return OT_ERROR_NOT_IMPLEMENTED;
+}
+
+/**
+ * Function documented in platform/radio.h
+ */
+otError otPlatRadioSetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ OT_UNUSED_VARIABLE(aThreshold);
+
+ return OT_ERROR_NOT_IMPLEMENTED;
+}
+
+/**
+ * Function documented in platform/radio.h
+ */
otError otPlatRadioReceive(otInstance *aInstance, uint8_t aChannel)
{
OT_UNUSED_VARIABLE(aInstance);
@@ -1553,14 +1576,15 @@
{
OT_UNUSED_VARIABLE(aInstance);
- otError error = OT_ERROR_NONE;
- uint8_t idx = rfCoreFindExtSrcMatchIdx((uint64_t *)aExtAddress);
+ otError error = OT_ERROR_NONE;
+ uint64_t extAddress = *(uint64_t *)aExtAddress;
+ uint8_t idx = rfCoreFindExtSrcMatchIdx(&extAddress);
if (idx == CC1352_SRC_MATCH_NONE)
{
/* the entry does not exist already, add it */
otEXPECT_ACTION((idx = rfCoreFindEmptyExtSrcMatchIdx()) != CC1352_SRC_MATCH_NONE, error = OT_ERROR_NO_BUFS);
- sSrcMatchExtData.extAddrEnt[idx] = *((uint64_t *)aExtAddress);
+ sSrcMatchExtData.extAddrEnt[idx] = extAddress;
}
if (sReceiveCmd.status == ACTIVE || sReceiveCmd.status == IEEE_SUSPENDED)
@@ -1586,10 +1610,11 @@
{
OT_UNUSED_VARIABLE(aInstance);
- otError error = OT_ERROR_NONE;
- uint8_t idx;
+ otError error = OT_ERROR_NONE;
+ uint64_t extAddress = *(uint64_t *)aExtAddress;
+ uint8_t idx;
- otEXPECT_ACTION((idx = rfCoreFindExtSrcMatchIdx((uint64_t *)aExtAddress)) != CC1352_SRC_MATCH_NONE,
+ otEXPECT_ACTION((idx = rfCoreFindExtSrcMatchIdx(&extAddress)) != CC1352_SRC_MATCH_NONE,
error = OT_ERROR_NO_ADDRESS);
if (sReceiveCmd.status == ACTIVE || sReceiveCmd.status == IEEE_SUSPENDED)
diff --git a/examples/platforms/cc2538/CMakeLists.txt b/examples/platforms/cc2538/CMakeLists.txt
new file mode 100644
index 0000000..13ecedb
--- /dev/null
+++ b/examples/platforms/cc2538/CMakeLists.txt
@@ -0,0 +1,69 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+set(OT_PLATFORM_LIB "openthread-cc2538" PARENT_SCOPE)
+
+if(NOT OT_CONFIG)
+ set(OT_CONFIG "openthread-core-cc2538-config.h")
+ set(OT_CONFIG ${OT_CONFIG} PARENT_SCOPE)
+endif()
+
+list(APPEND OT_PLATFORM_DEFINES
+ "OPENTHREAD_CORE_CONFIG_PLATFORM_CHECK_FILE=\"openthread-core-cc2538-config-check.h\""
+ "OPENTHREAD_CONFIG_NCP_UART_ENABLE=1"
+)
+set(OT_PLATFORM_DEFINES ${OT_PLATFORM_DEFINES} PARENT_SCOPE)
+
+list(APPEND OT_PLATFORM_DEFINES "OPENTHREAD_PROJECT_CORE_CONFIG_FILE=\"${OT_CONFIG}\"")
+
+add_library(openthread-cc2538
+ alarm.c
+ diag.c
+ entropy.c
+ flash.c
+ misc.c
+ radio.c
+ startup-gcc.c
+ system.c
+ logging.c
+ uart.c
+ $<TARGET_OBJECTS:openthread-platform-utils>
+)
+
+target_link_libraries(openthread-cc2538 PRIVATE openthread-platform-utils)
+target_link_options(openthread-cc2538 PUBLIC -T${PROJECT_SOURCE_DIR}/examples/platforms/cc2538/cc2538.ld)
+target_link_options(openthread-cc2538 PUBLIC -Wl,-Map=$<TARGET_PROPERTY:NAME>.map)
+
+target_compile_definitions(openthread-cc2538 PUBLIC ${OT_PLATFORM_DEFINES})
+
+target_include_directories(openthread-cc2538 PRIVATE
+ ${OT_PUBLIC_INCLUDES}
+ ${OT_PRIVATE_INCLUDES}
+ ${PROJECT_SOURCE_DIR}/examples/platforms
+ ${PROJECT_SOURCE_DIR}/src/core
+)
diff --git a/examples/platforms/cc2538/arm-none-eabi.cmake b/examples/platforms/cc2538/arm-none-eabi.cmake
new file mode 100644
index 0000000..3dfbb5f
--- /dev/null
+++ b/examples/platforms/cc2538/arm-none-eabi.cmake
@@ -0,0 +1,52 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+set(CMAKE_SYSTEM_NAME Generic)
+set(CMAKE_SYSTEM_PROCESSOR ARM)
+
+set(CMAKE_C_COMPILER arm-none-eabi-gcc)
+set(CMAKE_CXX_COMPILER arm-none-eabi-g++)
+set(CMAKE_ASM_COMPILER arm-none-eabi-as)
+set(CMAKE_RANLIB arm-none-eabi-ranlib)
+
+set(COMMON_C_FLAGS "-mthumb -fno-builtin -Wall -fdata-sections -ffunction-sections -mabi=aapcs -mcpu=cortex-m3 -mfloat-abi=soft")
+
+set(CMAKE_C_FLAGS "${COMMON_C_FLAGS} -std=gnu99")
+set(CMAKE_CXX_FLAGS "${COMMON_C_FLAGS} -fno-exceptions -fno-rtti")
+set(CMAKE_ASM_FLAGS "${COMMON_C_FLAGS}")
+set(CMAKE_EXE_LINKER_FLAGS "${COMMON_C_FLAGS} -Wl,--gc-sections -specs=nano.specs -specs=nosys.specs -nostartfiles")
+
+set(CMAKE_C_FLAGS_DEBUG "-Og -g")
+set(CMAKE_CXX_FLAGS_DEBUG "-Og -g")
+set(CMAKE_ASM_FLAGS_DEBUG "-g")
+set(CMAKE_EXE_LINKER_FLAGS_DEBUG "")
+
+set(CMAKE_C_FLAGS_RELEASE "-Os")
+set(CMAKE_CXX_FLAGS_RELEASE "-Os")
+set(CMAKE_ASM_FLAGS_RELEASE "")
+set(CMAKE_EXE_LINKER_FLAGS_RELEASE "")
diff --git a/examples/platforms/cc2538/flash.c b/examples/platforms/cc2538/flash.c
index a57fa47..7454047 100644
--- a/examples/platforms/cc2538/flash.c
+++ b/examples/platforms/cc2538/flash.c
@@ -40,7 +40,6 @@
#include "rom-utility.h"
#include "utils/code_utils.h"
#include "utils/flash.h"
-#include "utils/wrap_string.h"
#define FLASH_CTRL_FCTL_BUSY 0x00000080
diff --git a/examples/platforms/cc2538/openthread-core-cc2538-config.h b/examples/platforms/cc2538/openthread-core-cc2538-config.h
index 5347d6e..ec7ef88 100644
--- a/examples/platforms/cc2538/openthread-core-cc2538-config.h
+++ b/examples/platforms/cc2538/openthread-core-cc2538-config.h
@@ -109,6 +109,20 @@
#define OPENTHREAD_CONFIG_NCP_UART_ENABLE 1
/**
+ * @def OPENTHREAD_CONFIG_CC2538_USE_RADIO_RX_INTERRUPT
+ *
+ * Enable support for using interrupt-driven radio reception. This allows
+ * for a single frame to be received whilst the CPU is busy processing some
+ * other code.
+ *
+ * To disable interrupts and just rely on polling, set this to 0.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_CC2538_USE_RADIO_RX_INTERRUPT
+#define OPENTHREAD_CONFIG_CC2538_USE_RADIO_RX_INTERRUPT 1
+#endif
+
+/**
* @def OPENTHREAD_CONFIG_CC2538_WITH_CC2592
*
* Enable support for the CC2592 range-extender front-end.
diff --git a/examples/platforms/cc2538/radio.c b/examples/platforms/cc2538/radio.c
index 8518298..9aff8f1 100644
--- a/examples/platforms/cc2538/radio.c
+++ b/examples/platforms/cc2538/radio.c
@@ -41,8 +41,6 @@
#include "common/logging.hpp"
#include "utils/code_utils.h"
-#define RFCORE_RXTX_INT (141)
-
#define RFCORE_XREG_RFIRQM0 0x4008868C // RF interrupt masks
#define RFCORE_XREG_RFIRQM1 0x40088690 // RF interrupt masks
#define RFCORE_XREG_RFERRM 0x40088694 // RF error interrupt mask
@@ -173,6 +171,13 @@
static otRadioState sState = OT_RADIO_STATE_DISABLED;
static bool sIsReceiverEnabled = false;
+#if OPENTHREAD_CONFIG_LOG_PLATFORM && OPENTHREAD_CONFIG_CC2538_USE_RADIO_RX_INTERRUPT
+// Debugging _and_ logging are enabled, so if there's a dropped frame
+// we'll need to store the length here as using snprintf from an interrupt
+// handler is not a good idea.
+static uint8_t sDroppedFrameLength = 0;
+#endif
+
void enableReceiver(void)
{
if (!sIsReceiverEnabled)
@@ -257,6 +262,21 @@
}
}
+static bool cc2538SrcMatchEnabled(void)
+{
+ return (HWREG(RFCORE_XREG_FRMCTRL1) & RFCORE_XREG_FRMCTRL1_PENDING_OR) == 0;
+}
+
+static bool cc2538GetSrcMatchFoundIntFlag(void)
+{
+ bool flag = (HWREG(RFCORE_SFR_RFIRQF0) & RFCORE_SFR_RFIRQF0_SRC_MATCH_FOUND) != 0;
+ if (flag)
+ {
+ HWREG(RFCORE_SFR_RFIRQF0) &= ~RFCORE_SFR_RFIRQF0_SRC_MATCH_FOUND;
+ }
+ return flag;
+}
+
void otPlatRadioGetIeeeEui64(otInstance *aInstance, uint8_t *aIeeeEui64)
{
OT_UNUSED_VARIABLE(aInstance);
@@ -327,10 +347,12 @@
sReceiveFrame.mLength = 0;
sReceiveFrame.mPsdu = sReceivePsdu;
- // Enable interrupts for RX/TX, interrupt 141.
- // That's NVIC index 5 bit 13.
- HWREG(NVIC_EN0 + (5 * 4)) = (1 << 13);
+#if OPENTHREAD_CONFIG_CC2538_USE_RADIO_RX_INTERRUPT
+ // Enable interrupts for RX/TX, interrupt 26.
+ // That's NVIC index 0 (26 >> 5) bit 26 (26 & 0x1f).
+ HWREG(NVIC_EN0 + (0 * 4)) = (1 << 26);
HWREG(RFCORE_XREG_RFIRQM0) |= RFCORE_XREG_RFIRQM0_RXPKTDONE;
+#endif
// enable clock
HWREG(SYS_CTRL_RCGCRFC) = SYS_CTRL_RCGCRFC_RFC0;
@@ -610,11 +632,16 @@
return OT_RADIO_CAPS_NONE;
}
+static bool cc2538RadioGetPromiscuous(void)
+{
+ return (HWREG(RFCORE_XREG_FRMFILT0) & RFCORE_XREG_FRMFILT0_FRAME_FILTER_EN) == 0;
+}
+
bool otPlatRadioGetPromiscuous(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
- return (HWREG(RFCORE_XREG_FRMFILT0) & RFCORE_XREG_FRMFILT0_FRAME_FILTER_EN) == 0;
+ return cc2538RadioGetPromiscuous();
}
static int8_t cc2538RadioGetRssiOffset(void)
@@ -649,12 +676,18 @@
}
}
-void readFrame(otInstance *aInstance)
+static void readFrame(void)
{
uint8_t length;
uint8_t crcCorr;
int i;
+ /*
+ * There is already a frame present in the buffer, return early so
+ * we do not overwrite it (hopefully we'll catch it on the next run).
+ */
+ otEXPECT(sReceiveFrame.mLength == 0);
+
otEXPECT(sState == OT_RADIO_STATE_RECEIVE || sState == OT_RADIO_STATE_TRANSMIT);
otEXPECT((HWREG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_FIFOP) != 0);
@@ -666,7 +699,7 @@
#error Time sync requires the timestamp of SFD rather than that of rx done!
#else
// Timestamp
- if (otPlatRadioGetPromiscuous(aInstance))
+ if (cc2538RadioGetPromiscuous())
#endif
{
// The current driver only supports milliseconds resolution.
@@ -686,14 +719,28 @@
{
sReceiveFrame.mLength = length;
sReceiveFrame.mInfo.mRxInfo.mLqi = crcCorr & CC2538_LQI_BIT_MASK;
+
+ if (length > IEEE802154_ACK_LENGTH)
+ {
+ // Set ACK FP flag for the received frame according to whether SRC_MATCH_FOUND was triggered just before
+ // if SRC MATCH is not enabled, SRC_MATCH_FOUND is not triggered and all ACK FP is always set
+ sReceiveFrame.mInfo.mRxInfo.mAckedWithFramePending =
+ cc2538SrcMatchEnabled() ? cc2538GetSrcMatchFoundIntFlag() : true;
+ }
}
else
{
// resets rxfifo
HWREG(RFCORE_SFR_RFST) = RFCORE_SFR_RFST_INSTR_FLUSHRX;
HWREG(RFCORE_SFR_RFST) = RFCORE_SFR_RFST_INSTR_FLUSHRX;
-
+#if OPENTHREAD_CONFIG_LOG_PLATFORM && OPENTHREAD_CONFIG_CC2538_USE_RADIO_RX_INTERRUPT
+ // Debugging _and_ logging are enabled, it may not be safe to do
+ // logging if we're in the interrupt context, so just stash the
+ // length and do the logging later.
+ sDroppedFrameLength = length;
+#else
otLogDebgPlat("Dropping %d received bytes (Invalid CRC)", length);
+#endif
}
// check for rxfifo overflow
@@ -710,14 +757,25 @@
void cc2538RadioProcess(otInstance *aInstance)
{
- readFrame(aInstance);
+#if OPENTHREAD_CONFIG_CC2538_USE_RADIO_RX_INTERRUPT
+ // Disable the receive interrupt so that sReceiveFrame doesn't get
+ // blatted by the interrupt handler while we're polling.
+ HWREG(RFCORE_XREG_RFIRQM0) &= ~RFCORE_XREG_RFIRQM0_RXPKTDONE;
+#endif
+
+ readFrame();
+
+#if OPENTHREAD_CONFIG_LOG_PLATFORM && OPENTHREAD_CONFIG_CC2538_USE_RADIO_RX_INTERRUPT
+ if (sDroppedFrameLength != 0)
+ {
+ otLogDebgPlat("Dropping %d received bytes (Invalid CRC)", sDroppedFrameLength);
+ sDroppedFrameLength = 0;
+ }
+#endif
if ((sState == OT_RADIO_STATE_RECEIVE && sReceiveFrame.mLength > 0) ||
(sState == OT_RADIO_STATE_TRANSMIT && sReceiveFrame.mLength > IEEE802154_ACK_LENGTH))
{
- // TODO Set this flag only when the packet is really acknowledged with frame pending set.
- // See https://github.com/openthread/openthread/pull/3785
- sReceiveFrame.mInfo.mRxInfo.mAckedWithFramePending = true;
#if OPENTHREAD_CONFIG_DIAG_ENABLE
if (otPlatDiagModeGet())
@@ -772,10 +830,30 @@
}
sReceiveFrame.mLength = 0;
+
+#if OPENTHREAD_CONFIG_CC2538_USE_RADIO_RX_INTERRUPT
+ // Turn the receive interrupt handler back on now the buffer is clear.
+ HWREG(RFCORE_XREG_RFIRQM0) |= RFCORE_XREG_RFIRQM0_RXPKTDONE;
+#endif
}
void RFCoreRxTxIntHandler(void)
{
+#if OPENTHREAD_CONFIG_CC2538_USE_RADIO_RX_INTERRUPT
+ if (HWREG(RFCORE_SFR_RFIRQF0) & RFCORE_SFR_RFIRQF0_RXPKTDONE)
+ {
+ readFrame();
+
+ if (sReceiveFrame.mLength > 0)
+ {
+ // A frame has been received, disable the interrupt handler
+ // until the main loop has dealt with this previous frame,
+ // otherwise we might overwrite it whilst it is being read.
+ HWREG(RFCORE_XREG_RFIRQM0) &= ~RFCORE_XREG_RFIRQM0_RXPKTDONE;
+ }
+ }
+#endif
+
HWREG(RFCORE_SFR_RFIRQF0) = 0;
}
@@ -1104,6 +1182,22 @@
return OT_ERROR_NONE;
}
+otError otPlatRadioGetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t *aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ OT_UNUSED_VARIABLE(aThreshold);
+
+ return OT_ERROR_NOT_IMPLEMENTED;
+}
+
+otError otPlatRadioSetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ OT_UNUSED_VARIABLE(aThreshold);
+
+ return OT_ERROR_NOT_IMPLEMENTED;
+}
+
int8_t otPlatRadioGetReceiveSensitivity(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
diff --git a/examples/platforms/cc2650/alarm.c b/examples/platforms/cc2650/alarm.c
index d1ae1bf..919787a 100644
--- a/examples/platforms/cc2650/alarm.c
+++ b/examples/platforms/cc2650/alarm.c
@@ -26,6 +26,8 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#include "openthread-core-config.h"
+
#include <driverlib/aon_rtc.h>
#include <stdbool.h>
#include <stdint.h>
diff --git a/examples/platforms/cc2650/diag.c b/examples/platforms/cc2650/diag.c
index 7d0a729..95973df 100644
--- a/examples/platforms/cc2650/diag.c
+++ b/examples/platforms/cc2650/diag.c
@@ -26,6 +26,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#include "openthread-core-config.h"
#include <openthread/config.h>
#include <stdbool.h>
diff --git a/examples/platforms/cc2650/radio.c b/examples/platforms/cc2650/radio.c
index d959475..6d3628d 100644
--- a/examples/platforms/cc2650/radio.c
+++ b/examples/platforms/cc2650/radio.c
@@ -26,6 +26,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#include "openthread-core-config.h"
#include <openthread/config.h>
#include "cc2650_radio.h"
@@ -1286,6 +1287,28 @@
/**
* Function documented in platform/radio.h
*/
+otError otPlatRadioGetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t *aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ OT_UNUSED_VARIABLE(aThreshold);
+
+ return OT_ERROR_NOT_IMPLEMENTED;
+}
+
+/**
+ * Function documented in platform/radio.h
+ */
+otError otPlatRadioSetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ OT_UNUSED_VARIABLE(aThreshold);
+
+ return OT_ERROR_NOT_IMPLEMENTED;
+}
+
+/**
+ * Function documented in platform/radio.h
+ */
otError otPlatRadioReceive(otInstance *aInstance, uint8_t aChannel)
{
OT_UNUSED_VARIABLE(aInstance);
@@ -1504,14 +1527,15 @@
{
OT_UNUSED_VARIABLE(aInstance);
- otError error = OT_ERROR_NONE;
- uint8_t idx = rfCoreFindExtSrcMatchIdx((uint64_t *)aExtAddress);
+ otError error = OT_ERROR_NONE;
+ uint64_t extAddress = *(uint64_t *)aExtAddress;
+ uint8_t idx = rfCoreFindExtSrcMatchIdx(&extAddress);
if (idx == CC2650_SRC_MATCH_NONE)
{
/* the entry does not exist already, add it */
otEXPECT_ACTION((idx = rfCoreFindEmptyExtSrcMatchIdx()) != CC2650_SRC_MATCH_NONE, error = OT_ERROR_NO_BUFS);
- sSrcMatchExtData.extAddrEnt[idx] = *((uint64_t *)aExtAddress);
+ sSrcMatchExtData.extAddrEnt[idx] = extAddress;
}
if (sReceiveCmd.status == ACTIVE || sReceiveCmd.status == IEEE_SUSPENDED)
@@ -1537,10 +1561,11 @@
{
OT_UNUSED_VARIABLE(aInstance);
- otError error = OT_ERROR_NONE;
- uint8_t idx;
+ otError error = OT_ERROR_NONE;
+ uint64_t extAddress = *(uint64_t *)aExtAddress;
+ uint8_t idx;
- otEXPECT_ACTION((idx = rfCoreFindExtSrcMatchIdx((uint64_t *)aExtAddress)) != CC2650_SRC_MATCH_NONE,
+ otEXPECT_ACTION((idx = rfCoreFindExtSrcMatchIdx(&extAddress)) != CC2650_SRC_MATCH_NONE,
error = OT_ERROR_NO_ADDRESS);
if (sReceiveCmd.status == ACTIVE || sReceiveCmd.status == IEEE_SUSPENDED)
diff --git a/examples/platforms/cc2652/radio.c b/examples/platforms/cc2652/radio.c
index 6555280..f6b4712 100644
--- a/examples/platforms/cc2652/radio.c
+++ b/examples/platforms/cc2652/radio.c
@@ -32,6 +32,7 @@
*
*/
+#include "openthread-core-config.h"
#include <openthread/config.h>
#include <assert.h>
@@ -1310,6 +1311,28 @@
/**
* Function documented in platform/radio.h
*/
+otError otPlatRadioGetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t *aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ OT_UNUSED_VARIABLE(aThreshold);
+
+ return OT_ERROR_NOT_IMPLEMENTED;
+}
+
+/**
+ * Function documented in platform/radio.h
+ */
+otError otPlatRadioSetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ OT_UNUSED_VARIABLE(aThreshold);
+
+ return OT_ERROR_NOT_IMPLEMENTED;
+}
+
+/**
+ * Function documented in platform/radio.h
+ */
otError otPlatRadioReceive(otInstance *aInstance, uint8_t aChannel)
{
OT_UNUSED_VARIABLE(aInstance);
@@ -1534,14 +1557,15 @@
{
OT_UNUSED_VARIABLE(aInstance);
- otError error = OT_ERROR_NONE;
- uint8_t idx = rfCoreFindExtSrcMatchIdx((uint64_t *)aExtAddress);
+ otError error = OT_ERROR_NONE;
+ uint64_t extAddress = *(uint64_t *)aExtAddress;
+ uint8_t idx = rfCoreFindExtSrcMatchIdx(&extAddress);
if (idx == CC2652_SRC_MATCH_NONE)
{
/* the entry does not exist already, add it */
otEXPECT_ACTION((idx = rfCoreFindEmptyExtSrcMatchIdx()) != CC2652_SRC_MATCH_NONE, error = OT_ERROR_NO_BUFS);
- sSrcMatchExtData.extAddrEnt[idx] = *((uint64_t *)aExtAddress);
+ sSrcMatchExtData.extAddrEnt[idx] = extAddress;
}
if (sReceiveCmd.status == ACTIVE || sReceiveCmd.status == IEEE_SUSPENDED)
@@ -1567,10 +1591,11 @@
{
OT_UNUSED_VARIABLE(aInstance);
- otError error = OT_ERROR_NONE;
- uint8_t idx;
+ otError error = OT_ERROR_NONE;
+ uint64_t extAddress = *(uint64_t *)aExtAddress;
+ uint8_t idx;
- otEXPECT_ACTION((idx = rfCoreFindExtSrcMatchIdx((uint64_t *)aExtAddress)) != CC2652_SRC_MATCH_NONE,
+ otEXPECT_ACTION((idx = rfCoreFindExtSrcMatchIdx(&extAddress)) != CC2652_SRC_MATCH_NONE,
error = OT_ERROR_NO_ADDRESS);
if (sReceiveCmd.status == ACTIVE || sReceiveCmd.status == IEEE_SUSPENDED)
diff --git a/examples/platforms/efr32mg12/Makefile.am b/examples/platforms/efr32mg12/Makefile.am
index 54b52da..62890aa 100644
--- a/examples/platforms/efr32mg12/Makefile.am
+++ b/examples/platforms/efr32mg12/Makefile.am
@@ -28,24 +28,26 @@
include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
-lib_LIBRARIES = libopenthread-efr32mg12.a
+lib_LIBRARIES = libopenthread-efr32mg12.a
# Do not enable -Wconversion for rail
-override CFLAGS := $(filter-out -Wconversion,$(CFLAGS))
-override CXXFLAGS := $(filter-out -Wconversion,$(CXXFLAGS))
+override CFLAGS := $(filter-out -Wconversion,$(CFLAGS))
+override CXXFLAGS := $(filter-out -Wconversion,$(CXXFLAGS))
# Do not enable -pedantic-errors for rail
-override CFLAGS := $(filter-out -pedantic-errors,$(CFLAGS))
-override CXXFLAGS := $(filter-out -pedantic-errors,$(CXXFLAGS))
+override CFLAGS := $(filter-out -pedantic-errors,$(CFLAGS))
+override CXXFLAGS := $(filter-out -pedantic-errors,$(CXXFLAGS))
-EFR32_BOARD_DIR = $(shell echo $(BOARD) | tr A-Z a-z)
+# Do not enable -Wundef for rail
+override CFLAGS := $(filter-out -Wundef,$(CFLAGS))
+override CXXFLAGS := $(filter-out -Wundef,$(CXXFLAGS))
-EFR32MG_SDK_SRCDIR = $(top_srcdir)/third_party/silabs/gecko_sdk_suite/v2.6
+EFR32_BOARD_DIR = $(shell echo $(BOARD) | tr A-Z a-z)
+
+SDK_SRC_DIR = $(top_srcdir)/third_party/silabs/gecko_sdk_suite/v2.7
libopenthread_efr32mg12_a_CPPFLAGS = \
- -D__START=main \
- -D__STARTUP_CLEAR_BSS \
- -DPLATFORM_HEADER=\"@top_builddir@/third_party/silabs/gecko_sdk_suite/v2.6/platform/base/hal/micro/cortexm3/compiler/gcc.h\" \
+ -DPLATFORM_HEADER=\"platform/base/hal/micro/cortexm3/compiler/gcc.h\" \
-DNVIC_CONFIG=\"platform/base/hal/micro/cortexm3/efm32/nvic-config.h\" \
-Wno-sign-compare \
-DCORTEXM3 \
@@ -53,39 +55,42 @@
-DMICRO=EMBER_MICRO_CORTEXM3_EFR32 \
-DCORTEXM3_EFM32_MICRO \
-DPLAT=EMBER_PLATFORM_CORTEXM3 \
- -I$(top_srcdir)/include \
-I$(top_srcdir)/examples/platforms \
-I$(top_srcdir)/examples/platforms/efr32mg12/$(EFR32_BOARD_DIR) \
+ -I$(top_srcdir)/include \
-I$(top_srcdir)/src/core \
-I$(top_srcdir)/third_party/silabs/rail_config \
- -I$(EFR32MG_SDK_SRCDIR) \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/common \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/chip/efr32 \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/protocol/ieee802154 \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/chip/efr32/rf/common/cortex \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/hal \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/hal/efr32 \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/plugin/pa-conversions \
- -I$(EFR32MG_SDK_SRCDIR)/hardware/kit/common/bsp \
- -I$(EFR32MG_SDK_SRCDIR)/hardware/kit/EFR32MG12_$(BOARD)/config \
- -I$(EFR32MG_SDK_SRCDIR)/platform/base/ \
- -I$(EFR32MG_SDK_SRCDIR)/platform/base/hal \
- -I$(EFR32MG_SDK_SRCDIR)/platform/base/hal/micro/cortexm3/efm32 \
- -I$(EFR32MG_SDK_SRCDIR)/platform/base/hal/micro/cortexm3/efm32/config \
- -I$(EFR32MG_SDK_SRCDIR)/platform/base/hal/plugin \
- -I$(EFR32MG_SDK_SRCDIR)/platform/CMSIS/Include \
- -I$(EFR32MG_SDK_SRCDIR)/platform/Device/SiliconLabs/EFR32MG12P/Include \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/common/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/gpiointerrupt/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/uartdrv/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/uartdrv/config \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/ustimer/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/dmadrv/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/dmadrv/config \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/rtcdrv/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emlib/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/halconfig/inc/hal-config \
- -I$(EFR32MG_SDK_SRCDIR)/util/plugin/plugin-common/fem-control \
+ -I$(SDK_SRC_DIR) \
+ -I$(SDK_SRC_DIR)/hardware/kit/common/bsp \
+ -I$(SDK_SRC_DIR)/hardware/kit/common/drivers \
+ -I$(SDK_SRC_DIR)/hardware/kit/EFR32MG12_$(BOARD)/config \
+ -I$(SDK_SRC_DIR)/platform/base/hal/micro/cortexm3/efm32 \
+ -I$(SDK_SRC_DIR)/platform/base/hal/micro/cortexm3/efm32/config \
+ -I$(SDK_SRC_DIR)/platform/common/inc \
+ -I$(SDK_SRC_DIR)/platform/CMSIS/Include \
+ -I$(SDK_SRC_DIR)/platform/Device/SiliconLabs/EFR32MG12P/Include \
+ -I$(SDK_SRC_DIR)/platform/emdrv/common/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/gpiointerrupt/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/uartdrv/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/uartdrv/config \
+ -I$(SDK_SRC_DIR)/platform/emdrv/ustimer/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/dmadrv/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/dmadrv/config \
+ -I$(SDK_SRC_DIR)/platform/emlib/inc \
+ -I$(SDK_SRC_DIR)/platform/halconfig/inc/hal-config \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32/efr32xg1x \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32/rf/common/cortex \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/common \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/hal \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/hal/efr32 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/protocol/ieee802154 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/plugin/pa-conversions \
+ -I$(SDK_SRC_DIR)/platform/service/mpu/inc \
+ -I$(SDK_SRC_DIR)/platform/service/sleeptimer/config \
+ -I$(SDK_SRC_DIR)/platform/service/sleeptimer/inc \
+ -I$(SDK_SRC_DIR)/util/plugin/plugin-common/fem-control \
+ -I$(SDK_SRC_DIR)/util/third_party/mbedtls/sl_crypto/include \
-Wno-unused-parameter \
-Wno-missing-field-initializers \
$(NULL)
@@ -122,7 +127,7 @@
$(PLATFORM_SOURCES) \
$(NULL)
-Dash = -
+Dash = -
libopenthread_efr32mg12_a_LIBADD = \
$(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o") \
$(shell find $(top_builddir)/third_party/jlink/SEGGER_RTT_V640/RTT $(Dash)type f $(Dash)name "*.o")
diff --git a/examples/platforms/efr32mg12/Makefile.platform.am b/examples/platforms/efr32mg12/Makefile.platform.am
index 15ee454..6ea5003 100644
--- a/examples/platforms/efr32mg12/Makefile.platform.am
+++ b/examples/platforms/efr32mg12/Makefile.platform.am
@@ -30,12 +30,19 @@
# efr32mg12 platform-specific Makefile
#
-LDADD_COMMON += \
+LIBRAIL = $(shell \
+if [ "$(DMP)" = "1" ]; then \
+ echo "librail_multiprotocol_efr32xg12_gcc_release.a"; \
+else \
+ echo "librail_efr32xg12_gcc_release.a"; \
+fi )
+
+LDADD_COMMON += \
$(top_builddir)/examples/platforms/efr32mg12/libopenthread-efr32mg12.a \
$(top_builddir)/third_party/silabs/libsilabs-efr32mg12-sdk.a \
- $(top_srcdir)/third_party/silabs/gecko_sdk_suite/v2.6/platform/radio/rail_lib/autogen/librail_release/librail_efr32xg12_gcc_release.a \
+ $(top_srcdir)/third_party/silabs/gecko_sdk_suite/v2.7/platform/radio/rail_lib/autogen/librail_release/$(LIBRAIL) \
$(NULL)
-LDFLAGS_COMMON += \
- -T $(top_srcdir)/third_party/silabs/gecko_sdk_suite/v2.6/platform/Device/SiliconLabs/EFR32MG12P/Source/GCC/efr32mg12p.ld \
+LDFLAGS_COMMON += \
+ -T $(top_srcdir)/third_party/silabs/gecko_sdk_suite/v2.7/platform/Device/SiliconLabs/EFR32MG12P/Source/GCC/efr32mg12p.ld \
$(NULL)
diff --git a/examples/platforms/efr32mg12/README.md b/examples/platforms/efr32mg12/README.md
index f8f659e..9f811c1 100644
--- a/examples/platforms/efr32mg12/README.md
+++ b/examples/platforms/efr32mg12/README.md
@@ -40,8 +40,8 @@
2. Install Flex (Gecko) SDK including RAIL Library from Simplicity Studio.
- Connect EFR32MG12P Wireless Starter Kit to Simplicity Studio.
- - Find Flex SDK v2.6 in the Software Update page and click Install.
- - Flex SDK v2.6 will be installed in the path: `/SimplicityStudio_v4/developer/sdks/gecko_sdk_suite`.
+ - Find Flex SDK v2.7 in the Software Update page and click Install.
+ - Flex SDK v2.7 will be installed in the path: `/SimplicityStudio_v4/developer/sdks/gecko_sdk_suite`.
For more information on configuring, building, and installing applications for the Wireless Gecko (EFR32)
portfolio using FLEX, see [Getting Started with the Silicon Labs Flex Software Development Kit for the
@@ -263,4 +263,4 @@
- gcc version 7.3.1
The EFR32 example has been verified with following Flex SDK/RAIL Library version:
- - Flex SDK version 2.6.0.0
+ - Flex SDK version 2.7.0.0
diff --git a/examples/platforms/efr32mg12/alarm.c b/examples/platforms/efr32mg12/alarm.c
index 204e4d0..ab0a5c6 100644
--- a/examples/platforms/efr32mg12/alarm.c
+++ b/examples/platforms/efr32mg12/alarm.c
@@ -47,61 +47,34 @@
#include "em_core.h"
#include "rail.h"
+#include "sl_sleeptimer.h"
#define XTAL_ACCURACY 200
-#define US_IN_MS 1000
-// Minimum duration of an alarm in milliseconds. Used to avoid setting the absolute
-// expiry time of an alarm to the current time or slightly in the past.
-#define TIMER_EPSILON_MS 1
+static sl_sleeptimer_timer_handle_t sl_handle;
+static uint32_t sAlarm = 0;
+static bool sIsRunning = false;
-// The longest Rail can set a timer is 53 minutes. Timers of a longer duration
-// must wake up before this and set another timer for the remainder. We currently
-// split long delays in 30 minute intervals using a value of 1800000.
-#define RAIL_TIMER_MAX_DELTA_MS 1800000
-
-static uint32_t sTimerHi = 0;
-static uint32_t sTimerLo = 0;
-static uint32_t sAlarmT0 = 0;
-static uint32_t sAlarmDt = 0;
-static bool sIsRunning = false;
-
-static void RAILCb_TimerExpired(RAIL_Handle_t aHandle)
+static void AlarmCallback(sl_sleeptimer_timer_handle_t *aHandle, void *aData)
{
otSysEventSignalPending();
}
void efr32AlarmInit(void)
{
-}
-
-uint64_t otPlatTimeGet(void)
-{
- uint32_t timer_lo;
- uint64_t timer_us;
-
- CORE_DECLARE_IRQ_STATE;
- CORE_ENTER_CRITICAL();
-
- timer_lo = RAIL_GetTime();
-
- if (timer_lo < sTimerLo)
- {
- sTimerHi++;
- }
-
- sTimerLo = timer_lo;
-
- timer_us = (((uint64_t)sTimerHi << 32) | sTimerLo);
-
- CORE_EXIT_CRITICAL();
-
- return timer_us;
+ memset(&sl_handle, 0, sizeof sl_handle);
}
uint32_t otPlatAlarmMilliGetNow(void)
{
- return otPlatTimeGet() / US_IN_MS;
+ uint64_t ticks;
+ uint64_t now;
+ sl_status_t status;
+
+ ticks = sl_sleeptimer_get_tick_count64();
+ status = sl_sleeptimer_tick64_to_ms(ticks, &now);
+ assert(status == SL_STATUS_OK);
+ return (uint32_t)now;
}
uint32_t otPlatTimeGetXtalAccuracy(void)
@@ -109,115 +82,54 @@
return XTAL_ACCURACY;
}
-void otPlatAlarmMilliStartAt(otInstance *aInstance, uint32_t t0, uint32_t dt)
+void otPlatAlarmMilliStartAt(otInstance *aInstance, uint32_t aT0, uint32_t aDt)
{
OT_UNUSED_VARIABLE(aInstance);
- uint32_t expires_microsec;
- RAIL_Status_t status;
+ sl_status_t status;
+ int32_t remaining;
+ uint32_t ticks;
- assert(gRailHandle != NULL);
+ sl_sleeptimer_stop_timer(&sl_handle);
- if (sIsRunning)
- {
- RAIL_CancelTimer(gRailHandle);
- }
-
- sAlarmT0 = t0;
- sAlarmDt = dt;
-
- if (dt > RAIL_TIMER_MAX_DELTA_MS)
- {
- dt = RAIL_TIMER_MAX_DELTA_MS;
- }
- else if (dt < TIMER_EPSILON_MS)
- {
- dt = TIMER_EPSILON_MS;
- }
-
- expires_microsec = (t0 + dt) * US_IN_MS;
- status = RAIL_SetTimer(gRailHandle, expires_microsec, RAIL_TIME_ABSOLUTE, RAILCb_TimerExpired);
-
- if (status != RAIL_STATUS_NO_ERROR)
- {
- // The RAIL timer could not be set due to expiration time being in the past with respect to RAIL's current
- // time which is in microseconds. We fallback to using a relative timer from the current time.
-
- expires_microsec = dt * US_IN_MS;
- status = RAIL_SetTimer(gRailHandle, expires_microsec, RAIL_TIME_DELAY, RAILCb_TimerExpired);
-
- if (status != RAIL_STATUS_NO_ERROR)
- {
- otLogCritPlat("Alarm start timer failed, status: %d, dt: %u, t0: %u, now: %u", status, dt, t0,
- otPlatAlarmMilliGetNow());
- assert(false);
- }
- }
-
+ sAlarm = aT0 + aDt;
+ remaining = (int32_t)(sAlarm - otPlatAlarmMilliGetNow());
sIsRunning = true;
+
+ if (remaining <= 0)
+ {
+ otSysEventSignalPending();
+ }
+ else
+ {
+ status = sl_sleeptimer_ms32_to_tick(remaining, &ticks);
+ assert(status == SL_STATUS_OK);
+
+ status = sl_sleeptimer_start_timer(&sl_handle, ticks, AlarmCallback, NULL, 0,
+ SL_SLEEPTIMER_NO_HIGH_PRECISION_HF_CLOCKS_REQUIRED_FLAG);
+ assert(status == SL_STATUS_OK);
+ }
}
void otPlatAlarmMilliStop(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
+ sl_sleeptimer_stop_timer(&sl_handle);
sIsRunning = false;
-
- assert(gRailHandle != NULL);
- RAIL_CancelTimer(gRailHandle);
}
void efr32AlarmProcess(otInstance *aInstance)
{
- uint32_t now;
- uint32_t new_expires_microsec;
- uint32_t dt;
- RAIL_Status_t status;
+ int32_t remaining;
- otEXPECT(sIsRunning);
-
- assert(gRailHandle != NULL);
-
- if (RAIL_IsTimerExpired(gRailHandle))
+ if (sIsRunning)
{
- sIsRunning = false;
+ remaining = (int32_t)(sAlarm - otPlatAlarmMilliGetNow());
- if (sAlarmDt > RAIL_TIMER_MAX_DELTA_MS)
+ if (remaining <= 0)
{
- // We split longer delays in two due to the maximum allowed timer in RAIL. Here we
- // re-arm the RAIL timer with the remaining part of the alarm.
+ sIsRunning = false;
- now = otPlatAlarmMilliGetNow();
- dt = (sAlarmT0 + sAlarmDt) - now;
-
- if (dt > RAIL_TIMER_MAX_DELTA_MS)
- {
- dt = RAIL_TIMER_MAX_DELTA_MS;
- }
- else if (dt < TIMER_EPSILON_MS)
- {
- dt = TIMER_EPSILON_MS;
- }
-
- new_expires_microsec = (now + dt) * US_IN_MS;
- status = RAIL_SetTimer(gRailHandle, new_expires_microsec, RAIL_TIME_ABSOLUTE, RAILCb_TimerExpired);
-
- if (status != RAIL_STATUS_NO_ERROR)
- {
- new_expires_microsec = dt * US_IN_MS;
- status = RAIL_SetTimer(gRailHandle, new_expires_microsec, RAIL_TIME_DELAY, RAILCb_TimerExpired);
-
- if (status != RAIL_STATUS_NO_ERROR)
- {
- otLogCritPlat("Alarm extend timer failed, status: %d, dt: %u, now: %u", status, dt,
- otPlatAlarmMilliGetNow());
- assert(false);
- }
- }
-
- sIsRunning = true;
- }
- else
- {
#if OPENTHREAD_CONFIG_DIAG_ENABLE
if (otPlatDiagModeGet())
{
@@ -230,6 +142,4 @@
}
}
}
-exit:
- return;
}
diff --git a/examples/platforms/efr32mg12/brd4161a/board_config.h b/examples/platforms/efr32mg12/brd4161a/board_config.h
index b8f86f6..fdcf413 100644
--- a/examples/platforms/efr32mg12/brd4161a/board_config.h
+++ b/examples/platforms/efr32mg12/brd4161a/board_config.h
@@ -35,6 +35,16 @@
#ifndef __BOARD_CONFIG_H__
#define __BOARD_CONFIG_H__
-#define RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT 1 ///< Dev board suppports OQPSK modulation in 2.4GHz band.
+#define RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT 1 /// Dev board suppports OQPSK modulation in 2.4GHz band.
+
+#ifndef RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+#define RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT 0 /// Set to 1 to enable debug counters in radio.c
+#endif
+
+#ifndef RADIO_CONFIG_DMP_SUPPORT
+#define RADIO_CONFIG_DMP_SUPPORT 0 /// Set to 1 to enable Dynamic Multi-Protocol support in radio.c
+#endif
+
+#define RADIO_CONFIG_PA_USES_DCDC 0 /// The PA(s) is(are) fed from VBAT
#endif // __BOARD_CONFIG_H__
diff --git a/examples/platforms/efr32mg12/brd4166a/board_config.h b/examples/platforms/efr32mg12/brd4166a/board_config.h
index b8f86f6..3e5ff29 100644
--- a/examples/platforms/efr32mg12/brd4166a/board_config.h
+++ b/examples/platforms/efr32mg12/brd4166a/board_config.h
@@ -35,6 +35,16 @@
#ifndef __BOARD_CONFIG_H__
#define __BOARD_CONFIG_H__
-#define RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT 1 ///< Dev board suppports OQPSK modulation in 2.4GHz band.
+#define RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT 1 /// Dev board suppports OQPSK modulation in 2.4GHz band.
+
+#ifndef RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+#define RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT 0 /// Set to 1 to enable debug counters in radio.c
+#endif
+
+#ifndef RADIO_CONFIG_DMP_SUPPORT
+#define RADIO_CONFIG_DMP_SUPPORT 0 /// Set to 1 to enable Dynamic Multi-Protocol support in radio.c
+#endif
+
+#define RADIO_CONFIG_PA_USES_DCDC 1 /// The PA(s) is(are) fed from the DCDC
#endif // __BOARD_CONFIG_H__
diff --git a/examples/platforms/efr32mg12/brd4166a/hal-config.h b/examples/platforms/efr32mg12/brd4166a/hal-config.h
index ea5bda6..60f5401 100644
--- a/examples/platforms/efr32mg12/brd4166a/hal-config.h
+++ b/examples/platforms/efr32mg12/brd4166a/hal-config.h
@@ -149,11 +149,11 @@
// $[LED]
#define BSP_LED_PRESENT (1)
-#define BSP_LED0_PIN (4)
-#define BSP_LED0_PORT (gpioPortF)
+#define BSP_LED0_PIN (8)
+#define BSP_LED0_PORT (gpioPortD)
-#define BSP_LED1_PIN (5)
-#define BSP_LED1_PORT (gpioPortF)
+#define BSP_LED1_PIN (9)
+#define BSP_LED1_PORT (gpioPortD)
#define HAL_LED_ENABLE { 0, 1 }
#define HAL_LED_COUNT (2)
diff --git a/examples/platforms/efr32mg12/brd4170a/board_config.h b/examples/platforms/efr32mg12/brd4170a/board_config.h
index b58b37c..9ec59c0 100644
--- a/examples/platforms/efr32mg12/brd4170a/board_config.h
+++ b/examples/platforms/efr32mg12/brd4170a/board_config.h
@@ -35,7 +35,17 @@
#ifndef __BOARD_CONFIG_H__
#define __BOARD_CONFIG_H__
-#define RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT 1 ///< Dev board suppports OQPSK modulation in 2.4GHz band.
-#define RADIO_CONFIG_915MHZ_OQPSK_SUPPORT 1 ///< Dev board suppports OQPSK modulation in 915MHz band.
+#define RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT 1 /// Dev board suppports OQPSK modulation in 2.4GHz band.
+#define RADIO_CONFIG_915MHZ_OQPSK_SUPPORT 1 /// Dev board suppports OQPSK modulation in 915MHz band.
+
+#ifndef RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+#define RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT 0 /// Set to 1 to enable debug counters in radio.c
+#endif
+
+#ifndef RADIO_CONFIG_DMP_SUPPORT
+#define RADIO_CONFIG_DMP_SUPPORT 0 /// Set to 1 to enable Dynamic Multi-Protocol support in radio.c
+#endif
+
+#define RADIO_CONFIG_PA_USES_DCDC 0 /// The PA(s) is(are) fed from VBAT
#endif // __BOARD_CONFIG_H__
diff --git a/examples/platforms/efr32mg12/brd4304a/board_config.h b/examples/platforms/efr32mg12/brd4304a/board_config.h
index b8f86f6..fdcf413 100644
--- a/examples/platforms/efr32mg12/brd4304a/board_config.h
+++ b/examples/platforms/efr32mg12/brd4304a/board_config.h
@@ -35,6 +35,16 @@
#ifndef __BOARD_CONFIG_H__
#define __BOARD_CONFIG_H__
-#define RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT 1 ///< Dev board suppports OQPSK modulation in 2.4GHz band.
+#define RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT 1 /// Dev board suppports OQPSK modulation in 2.4GHz band.
+
+#ifndef RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+#define RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT 0 /// Set to 1 to enable debug counters in radio.c
+#endif
+
+#ifndef RADIO_CONFIG_DMP_SUPPORT
+#define RADIO_CONFIG_DMP_SUPPORT 0 /// Set to 1 to enable Dynamic Multi-Protocol support in radio.c
+#endif
+
+#define RADIO_CONFIG_PA_USES_DCDC 0 /// The PA(s) is(are) fed from VBAT
#endif // __BOARD_CONFIG_H__
diff --git a/examples/platforms/efr32mg12/fem-control.c b/examples/platforms/efr32mg12/fem-control.c
index 790f9cb..5ee527e 100644
--- a/examples/platforms/efr32mg12/fem-control.c
+++ b/examples/platforms/efr32mg12/fem-control.c
@@ -29,5 +29,5 @@
#include "hal-config.h"
#if (HAL_FEM_ENABLE)
-#include "../../../third_party/silabs/gecko_sdk_suite/v2.6/util/plugin/plugin-common/fem-control/fem-control.c"
+#include "util/plugin/plugin-common/fem-control/fem-control.c"
#endif
diff --git a/examples/platforms/efr32mg12/openthread-core-efr32-config.h b/examples/platforms/efr32mg12/openthread-core-efr32-config.h
index c08a295..e34b165 100644
--- a/examples/platforms/efr32mg12/openthread-core-efr32-config.h
+++ b/examples/platforms/efr32mg12/openthread-core-efr32-config.h
@@ -53,7 +53,7 @@
* Define to 1 if you want to enable physical layer to support OQPSK modulation in 915MHz band.
*
*/
-#ifdef RADIO_CONFIG_915MHZ_OQPSK_SUPPORT
+#if RADIO_CONFIG_915MHZ_OQPSK_SUPPORT
#define OPENTHREAD_CONFIG_RADIO_915MHZ_OQPSK_SUPPORT 1
#else
#define OPENTHREAD_CONFIG_RADIO_915MHZ_OQPSK_SUPPORT 0
@@ -65,7 +65,7 @@
* Define to 1 if you want to enable physical layer to support OQPSK modulation in 2.4GHz band.
*
*/
-#ifdef RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT
+#if RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT
#define OPENTHREAD_CONFIG_RADIO_2P4GHZ_OQPSK_SUPPORT 1
#else
#define OPENTHREAD_CONFIG_RADIO_2P4GHZ_OQPSK_SUPPORT 0
@@ -93,7 +93,7 @@
* Define to 1 if you want to enable software CSMA-CA backoff logic.
*
*/
-#define OPENTHREAD_CONFIG_SOFTWARE_CSMA_BACKOFF_ENABLE 1
+#define OPENTHREAD_CONFIG_SOFTWARE_CSMA_BACKOFF_ENABLE 0
/**
* @def OPENTHREAD_CONFIG_SOFTWARE_ENERGY_SCAN_ENABLE
@@ -101,7 +101,7 @@
* Define to 1 if you want to enable software energy scanning logic.
*
*/
-#define OPENTHREAD_CONFIG_SOFTWARE_ENERGY_SCAN_ENABLE 1
+#define OPENTHREAD_CONFIG_SOFTWARE_ENERGY_SCAN_ENABLE 0
/**
* @def SETTINGS_CONFIG_BASE_ADDRESS
@@ -128,22 +128,6 @@
#define SETTINGS_CONFIG_PAGE_NUM 4
/**
- * @def RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM
- *
- * The number of short source address table entries.
- *
- */
-#define RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM 6
-
-/**
- * @def RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM
- *
- * The number of extended source address table entries.
- *
- */
-#define RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM 6
-
-/**
* @def OPENTHREAD_CONFIG_NCP_UART_ENABLE
*
* Define to 1 to enable NCP UART support.
diff --git a/examples/platforms/efr32mg12/platform-band.h b/examples/platforms/efr32mg12/platform-band.h
index f219c36..cba0a64 100644
--- a/examples/platforms/efr32mg12/platform-band.h
+++ b/examples/platforms/efr32mg12/platform-band.h
@@ -43,9 +43,44 @@
#define RAIL_TX_FIFO_SIZE (OT_RADIO_FRAME_MAX_SIZE + 1)
+#define RADIO_SCHEDULER_BACKGROUND_RX_PRIORITY 255
+#define RADIO_SCHEDULER_CHANNEL_SCAN_PRIORITY 255
+#define RADIO_SCHEDULER_CHANNEL_SLIP_TIME 500000UL
+#define RADIO_SCHEDULER_TX_PRIORITY 100
+#define RADIO_SCHEDULER_TX_SLIP_TIME 500000UL
+
+#define RADIO_TIMING_CSMA_OVERHEAD_US 500
+#define RADIO_TIMING_DEFAULT_BYTETIME_US 32 // only used if RAIL_GetBitRate returns 0
+#define RADIO_TIMING_DEFAULT_SYMBOLTIME_US 16 // only used if RAIL_GetSymbolRate returns 0
+
+typedef struct efr32RadioCounters
+{
+ uint64_t mRailPlatTxTriggered;
+ uint64_t mRailPlatRadioReceiveDoneCbCount;
+ uint64_t mRailPlatRadioEnergyScanDoneCbCount;
+ uint64_t mRailPlatRadioTxDoneCbCount;
+ uint64_t mRailTxStarted;
+ uint64_t mRailTxStartFailed;
+ uint64_t mRailEventConfigScheduled;
+ uint64_t mRailEventConfigUnScheduled;
+ uint64_t mRailEventPacketSent;
+ uint64_t mRailEventChannelBusy;
+ uint64_t mRailEventEnergyScanCompleted;
+ uint64_t mRailEventCalNeeded;
+ uint64_t mRailEventPacketReceived;
+ uint64_t mRailEventNoAck;
+ uint64_t mRailEventTxAbort;
+ uint64_t mRailEventSchedulerStatusError;
+ uint64_t mRailEventsSchedulerStatusTransmitBusy;
+ uint32_t mRailEventsSchedulerStatusLastStatus;
+} efr32RadioCounters;
+
typedef struct efr32CommonConfig
{
RAIL_Config_t mRailConfig;
+#if RADIO_CONFIG_DMP_SUPPORT
+ RAILSched_Config_t railSchedState;
+#endif
uint8_t
mRailTxFifo[RAIL_TX_FIFO_SIZE]; // must be 2 power between 64 and 4096, and bigger than OT_RADIO_FRAME_MAX_SIZE
} efr32CommonConfig;
diff --git a/examples/platforms/efr32mg12/radio.c b/examples/platforms/efr32mg12/radio.c
index 6460068..57a39d7 100644
--- a/examples/platforms/efr32mg12/radio.c
+++ b/examples/platforms/efr32mg12/radio.c
@@ -59,14 +59,19 @@
enum
{
- IEEE802154_MIN_LENGTH = 5,
- IEEE802154_MAX_LENGTH = 127,
- IEEE802154_ACK_LENGTH = 5,
- IEEE802154_FRAME_TYPE_MASK = 0x7,
- IEEE802154_FRAME_TYPE_ACK = 0x2,
- IEEE802154_FRAME_PENDING = 1 << 4,
- IEEE802154_ACK_REQUEST = 1 << 5,
- IEEE802154_DSN_OFFSET = 2,
+ IEEE802154_MIN_LENGTH = 5,
+ IEEE802154_MAX_LENGTH = 127,
+ IEEE802154_ACK_LENGTH = 5,
+
+ // FCF + DSN + dest PANID + dest addr + src PANID + src addr (without security header)
+ IEEE802154_MAX_MHR_LENGTH = 2 + 1 + 2 + 8 + 2 + 8,
+
+ IEEE802154_FRAME_TYPE_MASK = 0x7,
+ IEEE802154_FRAME_TYPE_ACK = 0x2,
+ IEEE802154_FRAME_TYPE_MAC_COMMAND = 0x3,
+ IEEE802154_ACK_REQUEST = 1 << 5,
+ IEEE802154_DSN_OFFSET = 2,
+ IEEE802154_FCF_OFFSET = 0,
};
enum
@@ -106,10 +111,25 @@
RAIL_Handle_t gRailHandle;
-static volatile bool sTransmitBusy = false;
-static bool sPromiscuous = false;
-static bool sIsSrcMatchEnabled = false;
-static otRadioState sState = OT_RADIO_STATE_DISABLED;
+static volatile bool sTransmitBusy = false;
+static bool sPromiscuous = false;
+static otRadioState sState = OT_RADIO_STATE_DISABLED;
+
+enum
+{
+ ACKED_WITH_FP_MATCH_LENGTH = 1 + IEEE802154_MAX_MHR_LENGTH, // PHR and MHR
+ ACKED_WITH_FP_SLOTS = 16, // maximum number of Data Request packets in the RX FIFO. Length should be a power of 2.
+};
+
+typedef struct efr32AckedWithFP
+{
+ uint8_t mLength;
+ uint8_t mPacket[ACKED_WITH_FP_MATCH_LENGTH];
+} efr32AckedWithFP;
+static bool sIsSrcMatchEnabled = false;
+static efr32AckedWithFP sAckedWithFPFifo[ACKED_WITH_FP_SLOTS];
+static uint32_t sAckedWithFPReadIndex;
+static volatile uint32_t sAckedWithFPWriteIndex;
static uint8_t sReceivePsdu[IEEE802154_MAX_LENGTH];
static otRadioFrame sReceiveFrame;
@@ -122,6 +142,10 @@
static efr32CommonConfig sCommonConfig;
static efr32BandConfig sBandConfigs[EFR32_NUM_BAND_CONFIGS];
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+static efr32RadioCounters sRailDebugCounters;
+#endif
+
static volatile energyScanStatus sEnergyScanStatus;
static volatile int8_t sEnergyScanResultDbm;
static energyScanMode sEnergyScanMode;
@@ -136,7 +160,7 @@
.ackConfig =
{
.enable = true,
- .ackTimeout = 894,
+ .ackTimeout = 864,
.rxTransitions =
{
.success = RAIL_RF_STATE_RX,
@@ -162,10 +186,16 @@
.isPanCoordinator = false,
};
+#if RADIO_CONFIG_PA_USES_DCDC
+RAIL_DECLARE_TX_POWER_DCDC_CURVES(piecewiseSegments, curvesSg, curves24Hp, curves24Lp);
+#else
RAIL_DECLARE_TX_POWER_VBAT_CURVES(piecewiseSegments, curvesSg, curves24Hp, curves24Lp);
+#endif
static int8_t sTxPowerDbm = OPENTHREAD_CONFIG_DEFAULT_TRANSMIT_POWER;
+static int8_t sCcaThresholdDbm = -75; // default -75dBm energy detect threshold
+
static efr32BandConfig *sCurrentBandConfig = NULL;
static RAIL_Handle_t efr32RailInit(efr32CommonConfig *aCommonConfig)
@@ -188,7 +218,12 @@
RAIL_EVENT_RX_PACKET_RECEIVED | //
RAIL_EVENT_RSSI_AVERAGE_DONE | //
RAIL_EVENT_IEEE802154_DATA_REQUEST_COMMAND | //
- RAIL_EVENT_CAL_NEEDED //
+ RAIL_EVENT_CAL_NEEDED | //
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ RAIL_EVENT_CONFIG_SCHEDULED | //
+ RAIL_EVENT_CONFIG_UNSCHEDULED | //
+#endif
+ RAIL_EVENT_SCHEDULER_STATUS //
);
assert(status == RAIL_STATUS_NO_ERROR);
@@ -222,7 +257,7 @@
assert(status == RAIL_STATUS_NO_ERROR);
}
-static void efr32RadioSetTxPower(uint8_t aPowerDbm)
+static void efr32RadioSetTxPower(int8_t aPowerDbm)
{
RAIL_Status_t status;
RAIL_TxPowerCurvesConfig_t txPowerCurvesConfig = {curves24Hp, curvesSg, curves24Lp, piecewiseSegments};
@@ -254,7 +289,11 @@
{
sCommonConfig.mRailConfig.eventsCallback = aEventCallback;
sCommonConfig.mRailConfig.protocol = NULL; // only used by Bluetooth stack
- sCommonConfig.mRailConfig.scheduler = NULL; // only needed for DMP
+#if RADIO_CONFIG_DMP_SUPPORT
+ sCommonConfig.mRailConfig.scheduler = &(sCommonConfig.railSchedState);
+#else
+ sCommonConfig.mRailConfig.scheduler = NULL; // only needed for DMP
+#endif
uint8_t index = 0;
@@ -271,6 +310,11 @@
sBandConfigs[index].mChannelMin = OT_RADIO_915MHZ_OQPSK_CHANNEL_MIN;
sBandConfigs[index].mChannelMax = OT_RADIO_915MHZ_OQPSK_CHANNEL_MAX;
#endif
+
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ memset(&sRailDebugCounters, 0x00, sizeof(efr32RadioCounters));
+#endif
+
gRailHandle = efr32RailInit(&sCommonConfig);
assert(gRailHandle != NULL);
efr32RailConfigLoad(&(sBandConfigs[0]));
@@ -301,6 +345,10 @@
sCurrentBandConfig = efr32RadioGetBandConfig(OPENTHREAD_CONFIG_DEFAULT_CHANNEL);
assert(sCurrentBandConfig != NULL);
+ memset(sAckedWithFPFifo, 0, sizeof(sAckedWithFPFifo));
+ sAckedWithFPWriteIndex = 0;
+ sAckedWithFPReadIndex = 0;
+
efr32RadioSetTxPower(sTxPowerDbm);
sEnergyScanStatus = ENERGY_SCAN_STATUS_IDLE;
@@ -343,7 +391,11 @@
sCurrentBandConfig = config;
}
- status = RAIL_StartAverageRssi(gRailHandle, aChannel, aAveragingTimeUs, NULL);
+ RAIL_SchedulerInfo_t scanSchedulerInfo = {.priority = RADIO_SCHEDULER_CHANNEL_SCAN_PRIORITY,
+ .slipTime = RADIO_SCHEDULER_CHANNEL_SLIP_TIME,
+ .transactionTime = aAveragingTimeUs};
+
+ status = RAIL_StartAverageRssi(gRailHandle, aChannel, aAveragingTimeUs, &scanSchedulerInfo);
otEXPECT_ACTION(status == RAIL_STATUS_NO_ERROR, error = OT_ERROR_FAILED);
exit:
@@ -376,11 +428,8 @@
utilsSoftSrcMatchSetPanId(aPanId);
- for (uint8_t i = 0; i < EFR32_NUM_BAND_CONFIGS; i++)
- {
- status = RAIL_IEEE802154_SetPanId(gRailHandle, aPanId, 0);
- assert(status == RAIL_STATUS_NO_ERROR);
- }
+ status = RAIL_IEEE802154_SetPanId(gRailHandle, aPanId, 0);
+ assert(status == RAIL_STATUS_NO_ERROR);
}
void otPlatRadioSetExtendedAddress(otInstance *aInstance, const otExtAddress *aAddress)
@@ -392,11 +441,8 @@
otLogInfoPlat("ExtAddr=%X%X%X%X%X%X%X%X", aAddress->m8[7], aAddress->m8[6], aAddress->m8[5], aAddress->m8[4],
aAddress->m8[3], aAddress->m8[2], aAddress->m8[1], aAddress->m8[0]);
- for (uint8_t i = 0; i < EFR32_NUM_BAND_CONFIGS; i++)
- {
- status = RAIL_IEEE802154_SetLongAddress(gRailHandle, (uint8_t *)aAddress->m8, 0);
- assert(status == RAIL_STATUS_NO_ERROR);
- }
+ status = RAIL_IEEE802154_SetLongAddress(gRailHandle, (uint8_t *)aAddress->m8, 0);
+ assert(status == RAIL_STATUS_NO_ERROR);
}
void otPlatRadioSetShortAddress(otInstance *aInstance, uint16_t aAddress)
@@ -407,11 +453,8 @@
otLogInfoPlat("ShortAddr=%X", aAddress);
- for (uint8_t i = 0; i < EFR32_NUM_BAND_CONFIGS; i++)
- {
- status = RAIL_IEEE802154_SetShortAddress(gRailHandle, aAddress, 0);
- assert(status == RAIL_STATUS_NO_ERROR);
- }
+ status = RAIL_IEEE802154_SetShortAddress(gRailHandle, aAddress, 0);
+ assert(status == RAIL_STATUS_NO_ERROR);
}
bool otPlatRadioIsEnabled(otInstance *aInstance)
@@ -480,7 +523,12 @@
sCurrentBandConfig = config;
}
- status = RAIL_StartRx(gRailHandle, aChannel, NULL);
+ RAIL_SchedulerInfo_t bgRxSchedulerInfo = {
+ .priority = RADIO_SCHEDULER_BACKGROUND_RX_PRIORITY,
+ // sliptime/transaction time is not used for bg rx
+ };
+
+ status = RAIL_StartRx(gRailHandle, aChannel, &bgRxSchedulerInfo);
otEXPECT_ACTION(status == RAIL_STATUS_NO_ERROR, error = OT_ERROR_FAILED);
otLogInfoPlat("State=OT_RADIO_STATE_RECEIVE", NULL);
@@ -500,6 +548,10 @@
RAIL_Status_t status;
uint8_t frameLength;
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailPlatTxTriggered++;
+#endif
+
assert(sTransmitBusy == false);
otEXPECT_ACTION((sState != OT_RADIO_STATE_DISABLED) && (sState != OT_RADIO_STATE_TRANSMIT),
@@ -519,33 +571,77 @@
sCurrentBandConfig = config;
}
- otEXPECT(aFrame->mLength >= IEEE802154_MIN_LENGTH && aFrame->mLength <= IEEE802154_MAX_LENGTH);
frameLength = (uint8_t)aFrame->mLength;
RAIL_WriteTxFifo(gRailHandle, &frameLength, sizeof frameLength, true);
RAIL_WriteTxFifo(gRailHandle, aFrame->mPsdu, frameLength - 2, false);
+ RAIL_SchedulerInfo_t txSchedulerInfo = {
+ .priority = RADIO_SCHEDULER_TX_PRIORITY,
+ .slipTime = RADIO_SCHEDULER_CHANNEL_SLIP_TIME,
+ .transactionTime = 0, // will be calculated later if DMP is used
+ };
+
if (aFrame->mPsdu[0] & IEEE802154_ACK_REQUEST)
{
txOptions |= RAIL_TX_OPTION_WAIT_FOR_ACK;
+
+#if RADIO_CONFIG_DMP_SUPPORT
+ // time we wait for ACK
+ if (RAIL_GetSymbolRate(gRailHandle) > 0)
+ {
+ txSchedulerInfo.transactionTime += 12 * 1e6 / RAIL_GetSymbolRate(gRailHandle);
+ }
+ else
+ {
+ txSchedulerInfo.transactionTime += 12 * RADIO_TIMING_DEFAULT_SYMBOLTIME_US;
+ }
+#endif
}
+#if RADIO_CONFIG_DMP_SUPPORT
+ // time needed for the frame itself
+ // 4B preamble, 1B SFD, 1B PHR is not counted in frameLength
+ if (RAIL_GetBitRate(gRailHandle) > 0)
+ {
+ txSchedulerInfo.transactionTime = (frameLength + 4 + 1 + 1) * 8 * 1e6 / RAIL_GetBitRate(gRailHandle);
+ }
+ else
+ { // assume 250kbps
+ txSchedulerInfo.transactionTime = (frameLength + 4 + 1 + 1) * RADIO_TIMING_DEFAULT_BYTETIME_US;
+ }
+#endif
+
if (aFrame->mInfo.mTxInfo.mCsmaCaEnabled)
{
- status = RAIL_StartCcaCsmaTx(gRailHandle, aFrame->mChannel, txOptions, &csmaConfig, NULL);
+#if RADIO_CONFIG_DMP_SUPPORT
+ // time needed for CSMA/CA
+ txSchedulerInfo.transactionTime += RADIO_TIMING_CSMA_OVERHEAD_US;
+#endif
+ csmaConfig.csmaTries = aFrame->mInfo.mTxInfo.mMaxCsmaBackoffs;
+ csmaConfig.ccaThreshold = sCcaThresholdDbm;
+
+ status = RAIL_StartCcaCsmaTx(gRailHandle, aFrame->mChannel, txOptions, &csmaConfig, &txSchedulerInfo);
}
else
{
- status = RAIL_StartTx(gRailHandle, aFrame->mChannel, txOptions, NULL);
+ status = RAIL_StartTx(gRailHandle, aFrame->mChannel, txOptions, &txSchedulerInfo);
}
if (status == RAIL_STATUS_NO_ERROR)
{
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailTxStarted++;
+#endif
otPlatRadioTxStarted(aInstance, aFrame);
}
else
{
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailTxStartFailed++;
+#endif
sTransmitError = OT_ERROR_CHANNEL_ACCESS_FAILURE;
sTransmitBusy = false;
+ otSysEventSignalPending();
}
exit:
@@ -599,11 +695,8 @@
sPromiscuous = aEnable;
- for (uint8_t i = 0; i < EFR32_NUM_BAND_CONFIGS; i++)
- {
- status = RAIL_IEEE802154_SetPromiscuousMode(gRailHandle, aEnable);
- assert(status == RAIL_STATUS_NO_ERROR);
- }
+ status = RAIL_IEEE802154_SetPromiscuousMode(gRailHandle, aEnable);
+ assert(status == RAIL_STATUS_NO_ERROR);
}
void otPlatRadioEnableSrcMatch(otInstance *aInstance, bool aEnable)
@@ -614,6 +707,74 @@
sIsSrcMatchEnabled = aEnable;
}
+static bool sAckedWithFPFifoIsFull(void)
+{
+ return (uint32_t)(sAckedWithFPWriteIndex - sAckedWithFPReadIndex) == otARRAY_LENGTH(sAckedWithFPFifo);
+}
+
+static bool sAckedWithFPFifoIsEmpty(void)
+{
+ return (uint32_t)(sAckedWithFPWriteIndex - sAckedWithFPReadIndex) == 0;
+}
+
+static efr32AckedWithFP *sAckedWithFPFifoGetWriteSlot(void)
+{
+ uint32_t idx = sAckedWithFPWriteIndex & (otARRAY_LENGTH(sAckedWithFPFifo) - 1);
+ return &sAckedWithFPFifo[idx];
+}
+
+static const efr32AckedWithFP *sAckedWithFPFifoGetReadSlot(void)
+{
+ uint32_t idx = sAckedWithFPReadIndex & (otARRAY_LENGTH(sAckedWithFPFifo) - 1);
+ return &sAckedWithFPFifo[idx];
+}
+
+static void insertIeee802154DataRequestCommand(RAIL_Handle_t aRailHandle)
+{
+ assert(!sAckedWithFPFifoIsFull());
+ efr32AckedWithFP *const slot = sAckedWithFPFifoGetWriteSlot();
+
+ RAIL_RxPacketInfo_t packetInfo;
+
+ RAIL_GetRxIncomingPacketInfo(aRailHandle, &packetInfo);
+ assert(packetInfo.packetBytes >= 4); // PHR + FCF + DSN
+
+ if (packetInfo.packetBytes > sizeof(slot->mPacket))
+ {
+ packetInfo.packetBytes = sizeof(slot->mPacket);
+ if (packetInfo.firstPortionBytes >= sizeof(slot->mPacket))
+ {
+ packetInfo.firstPortionBytes = sizeof(slot->mPacket);
+ packetInfo.lastPortionData = NULL;
+ }
+ }
+ slot->mLength = packetInfo.packetBytes;
+ RAIL_CopyRxPacket(slot->mPacket, &packetInfo);
+
+ ++sAckedWithFPWriteIndex;
+}
+
+static bool wasAckedWithFramePending(const uint8_t *aPsdu, uint8_t aPsduLength)
+{
+ bool ackedWithFramePending = false;
+ uint16_t fcf = aPsdu[IEEE802154_FCF_OFFSET] | (aPsdu[IEEE802154_FCF_OFFSET + 1] << 8);
+
+ otEXPECT((fcf & IEEE802154_FRAME_TYPE_MASK) == IEEE802154_FRAME_TYPE_MAC_COMMAND);
+
+ while (!(ackedWithFramePending || sAckedWithFPFifoIsEmpty()))
+ {
+ const efr32AckedWithFP *const slot = sAckedWithFPFifoGetReadSlot();
+ if ((slot->mPacket[0] == aPsduLength) && (memcmp(slot->mPacket + 1, aPsdu, slot->mLength - 1) == 0))
+ {
+ ackedWithFramePending = true;
+ }
+ ++sAckedWithFPReadIndex;
+ }
+
+exit:
+ return ackedWithFramePending;
+}
+
static void processNextRxPacket(otInstance *aInstance)
{
RAIL_RxPacketHandle_t packetHandle = RAIL_RX_PACKET_HANDLE_INVALID;
@@ -623,7 +784,9 @@
uint16_t length;
packetHandle = RAIL_GetRxPacketInfo(gRailHandle, RAIL_RX_PACKET_HANDLE_OLDEST, &packetInfo);
- otEXPECT_ACTION(packetInfo.packetStatus == RAIL_RX_PACKET_READY_SUCCESS,
+
+ otEXPECT_ACTION(packetHandle != RAIL_RX_PACKET_HANDLE_INVALID &&
+ packetInfo.packetStatus == RAIL_RX_PACKET_READY_SUCCESS,
packetHandle = RAIL_RX_PACKET_HANDLE_INVALID);
status = RAIL_GetRxPacketDetailsAlt(gRailHandle, packetHandle, &packetDetails);
@@ -631,11 +794,11 @@
length = packetInfo.packetBytes + 1;
- // check the length in recv packet info structure
- otEXPECT(length == packetInfo.firstPortionData[0]);
+ // check the length in recv packet info structure; RAIL should take care of this.
+ assert(length == packetInfo.firstPortionData[0]);
- // check the length validity of recv packet
- otEXPECT(length >= IEEE802154_MIN_LENGTH && length <= IEEE802154_MAX_LENGTH);
+ // check the length validity of recv packet; RAIL should take care of this.
+ assert(length >= IEEE802154_MIN_LENGTH && length <= IEEE802154_MAX_LENGTH);
otLogInfoPlat("Received data:%d", length);
@@ -646,9 +809,7 @@
packetInfo.packetBytes--;
// read packet
- memcpy(sReceiveFrame.mPsdu, packetInfo.firstPortionData, packetInfo.firstPortionBytes);
- memcpy(sReceiveFrame.mPsdu + packetInfo.firstPortionBytes, packetInfo.lastPortionData,
- packetInfo.packetBytes - packetInfo.firstPortionBytes);
+ RAIL_CopyRxPacket(sReceiveFrame.mPsdu, &packetInfo);
status = RAIL_ReleaseRxPacket(gRailHandle, packetHandle);
if (status == RAIL_STATUS_NO_ERROR)
@@ -663,6 +824,7 @@
assert((length == IEEE802154_ACK_LENGTH) &&
(sReceiveFrame.mPsdu[0] & IEEE802154_FRAME_TYPE_MASK) == IEEE802154_FRAME_TYPE_ACK);
+ RAIL_YieldRadio(gRailHandle);
sTransmitBusy = false;
if (sReceiveFrame.mPsdu[IEEE802154_DSN_OFFSET] == sTransmitFrame.mPsdu[IEEE802154_DSN_OFFSET])
@@ -676,20 +838,26 @@
}
else
{
- otEXPECT(length != IEEE802154_ACK_LENGTH);
+ // signal MAC layer for each received frame if promiscous is enabled
+ // otherwise only signal MAC layer for non-ACK frame
+ otEXPECT(sPromiscuous || (length != IEEE802154_ACK_LENGTH));
sReceiveError = OT_ERROR_NONE;
sReceiveFrame.mInfo.mRxInfo.mRssi = packetDetails.rssi;
sReceiveFrame.mInfo.mRxInfo.mLqi = packetDetails.lqi;
- // TODO: grab timestamp and handle conversion to msec/usec and RAIL_GetRxTimeSyncWordEndAlt
- // sReceiveFrame.mInfo.mRxInfo.mMsec = packetDetails.packetTime;
- // sReceiveFrame.mInfo.mRxInfo.mUsec = packetDetails.packetTime;
+ // Get the timestamp when the SFD was received
+ assert(packetDetails.timeReceived.timePosition != RAIL_PACKET_TIME_INVALID);
+ packetDetails.timeReceived.totalPacketBytes = length + 1;
- // TODO Set this flag only when the packet is really acknowledged with frame pending set.
- // See https://github.com/openthread/openthread/pull/3785
- sReceiveFrame.mInfo.mRxInfo.mAckedWithFramePending = true;
+ status = RAIL_GetRxTimeSyncWordEndAlt(gRailHandle, &packetDetails);
+ assert(status == RAIL_STATUS_NO_ERROR);
+ sReceiveFrame.mInfo.mRxInfo.mTimestamp = packetDetails.timeReceived.packetTime;
+
+ // Set this flag only when the packet is really acknowledged with frame pending set.
+ sReceiveFrame.mInfo.mRxInfo.mAckedWithFramePending =
+ wasAckedWithFramePending(sReceiveFrame.mPsdu, sReceiveFrame.mLength);
#if OPENTHREAD_CONFIG_DIAG_ENABLE
@@ -700,13 +868,11 @@
else
#endif
{
- // signal MAC layer for each received frame if promiscous is enabled
- // otherwise only signal MAC layer for non-ACK frame
- if (sPromiscuous || sReceiveFrame.mLength > IEEE802154_ACK_LENGTH)
- {
- otLogInfoPlat("Received %d bytes", sReceiveFrame.mLength);
- otPlatRadioReceiveDone(aInstance, &sReceiveFrame, sReceiveError);
- }
+ otLogInfoPlat("Received %d bytes", sReceiveFrame.mLength);
+ otPlatRadioReceiveDone(aInstance, &sReceiveFrame, sReceiveError);
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailPlatRadioReceiveDoneCbCount++;
+#endif
}
}
@@ -738,52 +904,84 @@
{
status = RAIL_IEEE802154_SetFramePending(aRailHandle);
assert(status == RAIL_STATUS_NO_ERROR);
+ insertIeee802154DataRequestCommand(aRailHandle);
}
}
else
{
status = RAIL_IEEE802154_SetFramePending(aRailHandle);
assert(status == RAIL_STATUS_NO_ERROR);
+ insertIeee802154DataRequestCommand(aRailHandle);
}
}
static void RAILCb_Generic(RAIL_Handle_t aRailHandle, RAIL_Events_t aEvents)
{
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ if (aEvents & RAIL_EVENT_CONFIG_SCHEDULED)
+ {
+ sRailDebugCounters.mRailEventConfigScheduled++;
+ }
+ if (aEvents & RAIL_EVENT_CONFIG_UNSCHEDULED)
+ {
+ sRailDebugCounters.mRailEventConfigUnScheduled++;
+ }
+#endif
if (aEvents & RAIL_EVENT_IEEE802154_DATA_REQUEST_COMMAND)
{
ieee802154DataRequestCommand(aRailHandle);
}
+
if (aEvents & RAIL_EVENTS_TX_COMPLETION)
{
if (aEvents & RAIL_EVENT_TX_PACKET_SENT)
{
if ((sTransmitFrame.mPsdu[0] & IEEE802154_ACK_REQUEST) == 0)
{
+ RAIL_YieldRadio(aRailHandle);
sTransmitError = OT_ERROR_NONE;
sTransmitBusy = false;
}
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailEventPacketSent++;
+#endif
}
else if (aEvents & RAIL_EVENT_TX_CHANNEL_BUSY)
{
+ RAIL_YieldRadio(aRailHandle);
sTransmitError = OT_ERROR_CHANNEL_ACCESS_FAILURE;
sTransmitBusy = false;
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailEventChannelBusy++;
+#endif
}
else
{
+ RAIL_YieldRadio(aRailHandle);
sTransmitError = OT_ERROR_ABORT;
sTransmitBusy = false;
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailEventTxAbort++;
+#endif
}
}
if (aEvents & RAIL_EVENT_RX_ACK_TIMEOUT)
{
+ RAIL_YieldRadio(aRailHandle);
sTransmitError = OT_ERROR_NO_ACK;
sTransmitBusy = false;
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailEventNoAck++;
+#endif
}
if (aEvents & RAIL_EVENT_RX_PACKET_RECEIVED)
{
RAIL_HoldRxPacket(aRailHandle);
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailEventPacketReceived++;
+#endif
}
if (aEvents & RAIL_EVENT_CAL_NEEDED)
@@ -792,11 +990,16 @@
status = RAIL_Calibrate(aRailHandle, NULL, RAIL_CAL_ALL_PENDING);
assert(status == RAIL_STATUS_NO_ERROR);
+
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailEventCalNeeded++;
+#endif
}
if (aEvents & RAIL_EVENT_RSSI_AVERAGE_DONE)
{
const int16_t energyScanResultQuarterDbm = RAIL_GetAverageRssi(aRailHandle);
+ RAIL_YieldRadio(aRailHandle);
sEnergyScanStatus = ENERGY_SCAN_STATUS_COMPLETED;
@@ -808,6 +1011,40 @@
{
sEnergyScanResultDbm = energyScanResultQuarterDbm / QUARTER_DBM_IN_DBM;
}
+
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailPlatRadioEnergyScanDoneCbCount++;
+#endif
+ }
+ if (aEvents & RAIL_EVENT_SCHEDULER_STATUS)
+ {
+ RAIL_SchedulerStatus_t status = RAIL_GetSchedulerStatus(aRailHandle);
+
+ assert(status != RAIL_SCHEDULER_STATUS_INTERNAL_ERROR);
+
+ if (status == RAIL_SCHEDULER_STATUS_CCA_CSMA_TX_FAIL || status == RAIL_SCHEDULER_STATUS_SINGLE_TX_FAIL ||
+ status == RAIL_SCHEDULER_STATUS_SCHEDULED_TX_FAIL ||
+ (status == RAIL_SCHEDULER_STATUS_SCHEDULE_FAIL && sTransmitBusy) ||
+ (status == RAIL_SCHEDULER_STATUS_EVENT_INTERRUPTED && sTransmitBusy))
+ {
+ sTransmitError = OT_ERROR_ABORT;
+ sTransmitBusy = false;
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailEventSchedulerStatusError++;
+#endif
+ }
+ else if (status == RAIL_SCHEDULER_STATUS_AVERAGE_RSSI_FAIL)
+ {
+ sEnergyScanStatus = ENERGY_SCAN_STATUS_COMPLETED;
+ sEnergyScanResultDbm = OT_RADIO_RSSI_INVALID;
+ }
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ else if (sTransmitBusy)
+ {
+ sRailDebugCounters.mRailEventsSchedulerStatusLastStatus = status;
+ sRailDebugCounters.mRailEventsSchedulerStatusTransmitBusy++;
+ }
+#endif
}
otSysEventSignalPending();
@@ -846,6 +1083,10 @@
otPlatRadioTxDone(aInstance, &sTransmitFrame, &sReceiveFrame, sTransmitError);
}
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailPlatRadioTxDoneCbCount++;
+#endif
+
otSysEventSignalPending();
}
else if (sEnergyScanMode == ENERGY_SCAN_MODE_ASYNC && sEnergyScanStatus == ENERGY_SCAN_STATUS_COMPLETED)
@@ -853,6 +1094,10 @@
sEnergyScanStatus = ENERGY_SCAN_STATUS_IDLE;
otPlatRadioEnergyScanDone(aInstance, sEnergyScanResultDbm);
otSysEventSignalPending();
+
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailEventEnergyScanCompleted++;
+#endif
}
processNextRxPacket(aInstance);
@@ -885,6 +1130,28 @@
return OT_ERROR_NONE;
}
+otError otPlatRadioGetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t *aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ otError error = OT_ERROR_NONE;
+ otEXPECT_ACTION(aThreshold != NULL, error = OT_ERROR_INVALID_ARGS);
+
+ *aThreshold = sCcaThresholdDbm;
+
+exit:
+ return error;
+}
+
+otError otPlatRadioSetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ sCcaThresholdDbm = aThreshold;
+
+ return OT_ERROR_NONE;
+}
+
int8_t otPlatRadioGetReceiveSensitivity(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
diff --git a/examples/platforms/efr32mg12/sleepy-demo/sleepy-demo-ftd/Makefile.am b/examples/platforms/efr32mg12/sleepy-demo/sleepy-demo-ftd/Makefile.am
index 0fe2690..91df591 100644
--- a/examples/platforms/efr32mg12/sleepy-demo/sleepy-demo-ftd/Makefile.am
+++ b/examples/platforms/efr32mg12/sleepy-demo/sleepy-demo-ftd/Makefile.am
@@ -29,128 +29,126 @@
include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
include $(top_srcdir)/examples/platforms/Makefile.platform.am
-override CFLAGS := $(filter-out -Wconversion,$(CFLAGS))
-override CXXFLAGS := $(filter-out -Wconversion,$(CXXFLAGS))
+override CFLAGS := $(filter-out -Wconversion,$(CFLAGS))
+override CXXFLAGS := $(filter-out -Wconversion,$(CXXFLAGS))
-EFR32_BOARD_DIR = $(shell echo $(BOARD) | tr A-Z a-z)
-EFR32MG_SDK_SRCDIR = $(top_srcdir)/third_party/silabs/gecko_sdk_suite/v2.6
+EFR32_BOARD_DIR = $(shell echo $(BOARD) | tr A-Z a-z)
+
+SDK_SRC_DIR = $(top_srcdir)/third_party/silabs/gecko_sdk_suite/v2.7
$(top_builddir)/examples/platforms/efr32mg12/libopenthread-efr32mg12.a:
(cd $(top_builddir)/examples/platforms/efr32mg12/ && $(MAKE) $(AM_MAKEFLAGS) libopenthread-efr32mg12.a )
-bin_PROGRAMS = \
+bin_PROGRAMS = \
$(NULL)
-CPPFLAGS_COMMON += \
- -I$(top_srcdir)/include \
- -I$(top_srcdir)/src/core \
- -I$(top_srcdir)/examples/platforms \
- -DPLATFORM_HEADER=\"@top_builddir@/third_party/silabs/gecko_sdk_suite/v2.6/platform/base/hal/micro/cortexm3/compiler/gcc.h\" \
+CPPFLAGS_COMMON += \
+ -DPLATFORM_HEADER=\"platform/base/hal/micro/cortexm3/compiler/gcc.h\" \
+ -DNVIC_CONFIG=\"platform/base/hal/micro/cortexm3/efm32/nvic-config.h\" \
-Wno-sign-compare \
-DCORTEXM3 \
- -D__START=main \
-DPHY=EMBER_PHY_RAIL \
-DMICRO=EMBER_MICRO_CORTEXM3_EFR32 \
-DCORTEXM3_EFM32_MICRO \
-DPLAT=EMBER_PLATFORM_CORTEXM3 \
- -D__STARTUP_CLEAR_BSS \
- -I$(top_srcdir)/include \
-I$(top_srcdir)/examples/platforms \
- -I$(top_srcdir)/examples/platforms/efr32/$(EFR32_BOARD_DIR) \
+ -I$(top_srcdir)/examples/platforms/efr32mg12/$(EFR32_BOARD_DIR) \
+ -I$(top_srcdir)/include \
-I$(top_srcdir)/src/core \
-I$(top_srcdir)/third_party/silabs/rail_config \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/common \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/chip/efr32 \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/protocol/ieee802154 \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/chip/efr32/rf/common/cortex \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/hal \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/hal/efr32 \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/plugin/pa-conversions \
- -I$(EFR32MG_SDK_SRCDIR)/hardware/kit/common/bsp \
- -I$(EFR32MG_SDK_SRCDIR)/hardware/kit/EFR32MG12_$(BOARD)/config \
- -I$(EFR32MG_SDK_SRCDIR)/platform/CMSIS/Include \
- -I$(EFR32MG_SDK_SRCDIR)/platform/base/ \
- -I$(EFR32MG_SDK_SRCDIR)/platform/Device/SiliconLabs/EFR32MG12P/Include \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/common/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/gpiointerrupt/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/uartdrv/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/uartdrv/config \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/ustimer/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/dmadrv/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/dmadrv/config \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/rtcdrv/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emlib/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/halconfig/inc/hal-config \
- -I$(EFR32MG_SDK_SRCDIR)/util/plugin/plugin-common/fem-control \
- -I$(EFR32MG_SDK_SRCDIR)/platform/base/hal/micro/cortexm3/efm32/config \
- -I$(EFR32MG_SDK_SRCDIR)/platform/base/hal/plugin \
- -I$(EFR32MG_SDK_SRCDIR)/protocol/thread \
- -I$(EFR32MG_SDK_SRCDIR)/platform/base/hal/micro/cortexm3/efm32 \
- -I$(EFR32MG_SDK_SRCDIR)/protocol/thread/stack \
- -I$(EFR32MG_SDK_SRCDIR)/platform/base/hal \
+ -I$(SDK_SRC_DIR)/hardware/kit/common/bsp \
+ -I$(SDK_SRC_DIR)/hardware/kit/common/drivers \
+ -I$(SDK_SRC_DIR)/hardware/kit/EFR32MG12_$(BOARD)/config \
+ -I$(SDK_SRC_DIR)/platform/base/hal/micro/cortexm3/efm32 \
+ -I$(SDK_SRC_DIR)/platform/base/hal/micro/cortexm3/efm32/config \
+ -I$(SDK_SRC_DIR)/platform/common/inc \
+ -I$(SDK_SRC_DIR)/platform/CMSIS/Include \
+ -I$(SDK_SRC_DIR)/platform/Device/SiliconLabs/EFR32MG12P/Include \
+ -I$(SDK_SRC_DIR)/platform/emdrv/common/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/gpiointerrupt/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/uartdrv/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/uartdrv/config \
+ -I$(SDK_SRC_DIR)/platform/emdrv/ustimer/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/dmadrv/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/dmadrv/config \
+ -I$(SDK_SRC_DIR)/platform/emlib/inc \
+ -I$(SDK_SRC_DIR)/platform/halconfig/inc/hal-config \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32/efr32xg1x \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32/rf/common/cortex \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/common \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/hal \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/hal/efr32 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/protocol/ieee802154 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/plugin/pa-conversions \
+ -I$(SDK_SRC_DIR)/platform/service/mpu/inc \
+ -I$(SDK_SRC_DIR)/platform/service/sleeptimer/config \
+ -I$(SDK_SRC_DIR)/platform/service/sleeptimer/inc \
+ -I$(SDK_SRC_DIR)/util/plugin/plugin-common/fem-control \
+ -I$(SDK_SRC_DIR)/util/third_party/mbedtls/sl_crypto/include \
-Wno-unused-parameter \
-Wno-missing-field-initializers \
$(NULL)
-LDADD_COMMON += \
+LDADD_COMMON += \
$(NULL)
-LDFLAGS_COMMON += \
+LDFLAGS_COMMON += \
$(NULL)
-LIBTOOLFLAGS_COMMON += \
+LIBTOOLFLAGS_COMMON += \
$(NULL)
-SOURCES_COMMON += \
- main.c \
+SOURCES_COMMON += \
+ main.c \
$(NULL)
if OPENTHREAD_ENABLE_BUILTIN_MBEDTLS
-LDADD_COMMON += \
- $(top_builddir)/third_party/mbedtls/libmbedcrypto.a \
+LDADD_COMMON += \
+ $(top_builddir)/third_party/mbedtls/libmbedcrypto.a \
$(NULL)
endif # OPENTHREAD_ENABLE_BUILTIN_MBEDTLS
if OPENTHREAD_ENABLE_EXECUTABLE
-bin_PROGRAMS += \
- sleepy-demo-ftd \
+bin_PROGRAMS += \
+ sleepy-demo-ftd \
$(NULL)
endif
-sleepy_demo_ftd_CPPFLAGS = \
- $(CPPFLAGS_COMMON) \
+sleepy_demo_ftd_CPPFLAGS = \
+ $(CPPFLAGS_COMMON) \
$(NULL)
-sleepy_demo_ftd_LDADD = \
- $(top_builddir)/src/cli/libopenthread-cli-ftd.a \
- $(top_builddir)/src/core/libopenthread-ftd.a \
- $(LDADD_COMMON) \
- $(top_builddir)/src/core/libopenthread-ftd.a \
- $(LDADD_COMMON) \
+sleepy_demo_ftd_LDADD = \
+ $(top_builddir)/src/cli/libopenthread-cli-ftd.a \
+ $(top_builddir)/src/core/libopenthread-ftd.a \
+ $(LDADD_COMMON) \
+ $(top_builddir)/src/core/libopenthread-ftd.a \
+ $(LDADD_COMMON) \
$(NULL)
-sleepy_demo_ftd_LDFLAGS = \
- $(LDFLAGS_COMMON) \
+sleepy_demo_ftd_LDFLAGS = \
+ $(LDFLAGS_COMMON) \
$(NULL)
-sleepy_demo_ftd_LIBTOOLFLAGS = \
- $(LIBTOOLFLAGS_COMMON) \
+sleepy_demo_ftd_LIBTOOLFLAGS = \
+ $(LIBTOOLFLAGS_COMMON) \
$(NULL)
-sleepy_demo_ftd_SOURCES = \
- $(SOURCES_COMMON) \
+sleepy_demo_ftd_SOURCES = \
+ $(SOURCES_COMMON) \
$(NULL)
if OPENTHREAD_ENABLE_LINKER_MAP
-sleepy_demo_ftd_LDFLAGS += -Wl,-Map=sleepy-demo-ftd.map
+sleepy_demo_ftd_LDFLAGS += -Wl,-Map=sleepy-demo-ftd.map
endif
if OPENTHREAD_BUILD_COVERAGE
-CPPFLAGS_COMMON += \
- -DOPENTHREAD_ENABLE_COVERAGE \
+CPPFLAGS_COMMON += \
+ -DOPENTHREAD_ENABLE_COVERAGE \
$(NULL)
-CLEANFILES = $(wildcard *.gcda *.gcno)
+CLEANFILES = $(wildcard *.gcda *.gcno)
endif # OPENTHREAD_BUILD_COVERAGE
include $(abs_top_nlbuild_autotools_dir)/automake/post.am
diff --git a/examples/platforms/efr32mg12/sleepy-demo/sleepy-demo-ftd/main.c b/examples/platforms/efr32mg12/sleepy-demo/sleepy-demo-ftd/main.c
index e7a792f..d6d7758 100644
--- a/examples/platforms/efr32mg12/sleepy-demo/sleepy-demo-ftd/main.c
+++ b/examples/platforms/efr32mg12/sleepy-demo/sleepy-demo-ftd/main.c
@@ -33,7 +33,6 @@
#include "hal-config.h"
#include "hal_common.h"
#include "openthread-system.h"
-#include "rtcdriver.h"
#include <assert.h>
#include <common/logging.hpp>
#include <openthread-core-config.h>
diff --git a/examples/platforms/efr32mg12/sleepy-demo/sleepy-demo-mtd/Makefile.am b/examples/platforms/efr32mg12/sleepy-demo/sleepy-demo-mtd/Makefile.am
index c9f9325..a3b7585 100644
--- a/examples/platforms/efr32mg12/sleepy-demo/sleepy-demo-mtd/Makefile.am
+++ b/examples/platforms/efr32mg12/sleepy-demo/sleepy-demo-mtd/Makefile.am
@@ -29,128 +29,126 @@
include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
include $(top_srcdir)/examples/platforms/Makefile.platform.am
-override CFLAGS := $(filter-out -Wconversion,$(CFLAGS))
-override CXXFLAGS := $(filter-out -Wconversion,$(CXXFLAGS))
+override CFLAGS := $(filter-out -Wconversion,$(CFLAGS))
+override CXXFLAGS := $(filter-out -Wconversion,$(CXXFLAGS))
-EFR32_BOARD_DIR = $(shell echo $(BOARD) | tr A-Z a-z)
-EFR32MG_SDK_SRCDIR = $(top_srcdir)/third_party/silabs/gecko_sdk_suite/v2.6
+EFR32_BOARD_DIR = $(shell echo $(BOARD) | tr A-Z a-z)
+
+SDK_SRC_DIR = $(top_srcdir)/third_party/silabs/gecko_sdk_suite/v2.7
$(top_builddir)/examples/platforms/efr32mg12/libopenthread-efr32mg12.a:
(cd $(top_builddir)/examples/platforms/efr32mg12/ && $(MAKE) $(AM_MAKEFLAGS) libopenthread-efr32mg12.a )
-bin_PROGRAMS = \
+bin_PROGRAMS = \
$(NULL)
-CPPFLAGS_COMMON += \
- -I$(top_srcdir)/include \
- -I$(top_srcdir)/src/core \
- -I$(top_srcdir)/examples/platforms \
- -DPLATFORM_HEADER=\"@top_builddir@/third_party/silabs/gecko_sdk_suite/v2.6/platform/base/hal/micro/cortexm3/compiler/gcc.h\" \
+CPPFLAGS_COMMON += \
+ -DPLATFORM_HEADER=\"platform/base/hal/micro/cortexm3/compiler/gcc.h\" \
+ -DNVIC_CONFIG=\"platform/base/hal/micro/cortexm3/efm32/nvic-config.h\" \
-Wno-sign-compare \
-DCORTEXM3 \
- -D__START=main \
-DPHY=EMBER_PHY_RAIL \
-DMICRO=EMBER_MICRO_CORTEXM3_EFR32 \
-DCORTEXM3_EFM32_MICRO \
-DPLAT=EMBER_PLATFORM_CORTEXM3 \
- -D__STARTUP_CLEAR_BSS \
- -I$(top_srcdir)/include \
-I$(top_srcdir)/examples/platforms \
- -I$(top_srcdir)/examples/platforms/efr32/$(EFR32_BOARD_DIR) \
+ -I$(top_srcdir)/examples/platforms/efr32mg12/$(EFR32_BOARD_DIR) \
+ -I$(top_srcdir)/include \
-I$(top_srcdir)/src/core \
-I$(top_srcdir)/third_party/silabs/rail_config \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/common \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/chip/efr32 \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/protocol/ieee802154 \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/chip/efr32/rf/common/cortex \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/hal \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/hal/efr32 \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/plugin/pa-conversions \
- -I$(EFR32MG_SDK_SRCDIR)/hardware/kit/common/bsp \
- -I$(EFR32MG_SDK_SRCDIR)/hardware/kit/EFR32MG12_$(BOARD)/config \
- -I$(EFR32MG_SDK_SRCDIR)/platform/CMSIS/Include \
- -I$(EFR32MG_SDK_SRCDIR)/platform/base/ \
- -I$(EFR32MG_SDK_SRCDIR)/platform/Device/SiliconLabs/EFR32MG12P/Include \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/common/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/gpiointerrupt/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/uartdrv/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/uartdrv/config \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/ustimer/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/dmadrv/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/dmadrv/config \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/rtcdrv/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emlib/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/halconfig/inc/hal-config \
- -I$(EFR32MG_SDK_SRCDIR)/util/plugin/plugin-common/fem-control \
- -I$(EFR32MG_SDK_SRCDIR)/platform/base/hal/micro/cortexm3/efm32/config \
- -I$(EFR32MG_SDK_SRCDIR)/platform/base/hal/plugin \
- -I$(EFR32MG_SDK_SRCDIR)/protocol/thread \
- -I$(EFR32MG_SDK_SRCDIR)/platform/base/hal/micro/cortexm3/efm32 \
- -I$(EFR32MG_SDK_SRCDIR)/protocol/thread/stack \
- -I$(EFR32MG_SDK_SRCDIR)/platform/base/hal \
+ -I$(SDK_SRC_DIR)/hardware/kit/common/bsp \
+ -I$(SDK_SRC_DIR)/hardware/kit/common/drivers \
+ -I$(SDK_SRC_DIR)/hardware/kit/EFR32MG12_$(BOARD)/config \
+ -I$(SDK_SRC_DIR)/platform/base/hal/micro/cortexm3/efm32 \
+ -I$(SDK_SRC_DIR)/platform/base/hal/micro/cortexm3/efm32/config \
+ -I$(SDK_SRC_DIR)/platform/common/inc \
+ -I$(SDK_SRC_DIR)/platform/CMSIS/Include \
+ -I$(SDK_SRC_DIR)/platform/Device/SiliconLabs/EFR32MG12P/Include \
+ -I$(SDK_SRC_DIR)/platform/emdrv/common/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/gpiointerrupt/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/uartdrv/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/uartdrv/config \
+ -I$(SDK_SRC_DIR)/platform/emdrv/ustimer/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/dmadrv/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/dmadrv/config \
+ -I$(SDK_SRC_DIR)/platform/emlib/inc \
+ -I$(SDK_SRC_DIR)/platform/halconfig/inc/hal-config \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32/efr32xg1x \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32/rf/common/cortex \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/common \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/hal \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/hal/efr32 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/protocol/ieee802154 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/plugin/pa-conversions \
+ -I$(SDK_SRC_DIR)/platform/service/mpu/inc \
+ -I$(SDK_SRC_DIR)/platform/service/sleeptimer/config \
+ -I$(SDK_SRC_DIR)/platform/service/sleeptimer/inc \
+ -I$(SDK_SRC_DIR)/util/plugin/plugin-common/fem-control \
+ -I$(SDK_SRC_DIR)/util/third_party/mbedtls/sl_crypto/include \
-Wno-unused-parameter \
-Wno-missing-field-initializers \
$(NULL)
-LDADD_COMMON += \
+LDADD_COMMON += \
$(NULL)
-LDFLAGS_COMMON += \
+LDFLAGS_COMMON += \
$(NULL)
-LIBTOOLFLAGS_COMMON += \
+LIBTOOLFLAGS_COMMON += \
$(NULL)
-SOURCES_COMMON += \
- main.c \
+SOURCES_COMMON += \
+ main.c \
$(NULL)
if OPENTHREAD_ENABLE_BUILTIN_MBEDTLS
-LDADD_COMMON += \
- $(top_builddir)/third_party/mbedtls/libmbedcrypto.a \
+LDADD_COMMON += \
+ $(top_builddir)/third_party/mbedtls/libmbedcrypto.a \
$(NULL)
endif # OPENTHREAD_ENABLE_BUILTIN_MBEDTLS
if OPENTHREAD_ENABLE_EXECUTABLE
-bin_PROGRAMS += \
- sleepy-demo-mtd \
+bin_PROGRAMS += \
+ sleepy-demo-mtd \
$(NULL)
endif
-sleepy_demo_mtd_CPPFLAGS = \
- $(CPPFLAGS_COMMON) \
+sleepy_demo_mtd_CPPFLAGS = \
+ $(CPPFLAGS_COMMON) \
$(NULL)
-sleepy_demo_mtd_LDADD = \
- $(top_builddir)/src/cli/libopenthread-cli-mtd.a \
- $(top_builddir)/src/core/libopenthread-mtd.a \
- $(LDADD_COMMON) \
- $(top_builddir)/src/core/libopenthread-mtd.a \
- $(LDADD_COMMON) \
+sleepy_demo_mtd_LDADD = \
+ $(top_builddir)/src/cli/libopenthread-cli-mtd.a \
+ $(top_builddir)/src/core/libopenthread-mtd.a \
+ $(LDADD_COMMON) \
+ $(top_builddir)/src/core/libopenthread-mtd.a \
+ $(LDADD_COMMON) \
$(NULL)
-sleepy_demo_mtd_LDFLAGS = \
- $(LDFLAGS_COMMON) \
+sleepy_demo_mtd_LDFLAGS = \
+ $(LDFLAGS_COMMON) \
$(NULL)
-sleepy_demo_mtd_LIBTOOLFLAGS = \
- $(LIBTOOLFLAGS_COMMON) \
+sleepy_demo_mtd_LIBTOOLFLAGS = \
+ $(LIBTOOLFLAGS_COMMON) \
$(NULL)
-sleepy_demo_mtd_SOURCES = \
- $(SOURCES_COMMON) \
+sleepy_demo_mtd_SOURCES = \
+ $(SOURCES_COMMON) \
$(NULL)
if OPENTHREAD_ENABLE_LINKER_MAP
-sleepy_demo_mtd_LDFLAGS += -Wl,-Map=sleepy-demo-mtd.map
+sleepy_demo_mtd_LDFLAGS += -Wl,-Map=sleepy-demo-mtd.map
endif
if OPENTHREAD_BUILD_COVERAGE
-CPPFLAGS_COMMON += \
- -DOPENTHREAD_ENABLE_COVERAGE \
+CPPFLAGS_COMMON += \
+ -DOPENTHREAD_ENABLE_COVERAGE \
$(NULL)
-CLEANFILES = $(wildcard *.gcda *.gcno)
+CLEANFILES = $(wildcard *.gcda *.gcno)
endif # OPENTHREAD_BUILD_COVERAGE
include $(abs_top_nlbuild_autotools_dir)/automake/post.am
diff --git a/examples/platforms/efr32mg12/sleepy-demo/sleepy-demo-mtd/main.c b/examples/platforms/efr32mg12/sleepy-demo/sleepy-demo-mtd/main.c
index f5d2378..26ef873 100644
--- a/examples/platforms/efr32mg12/sleepy-demo/sleepy-demo-mtd/main.c
+++ b/examples/platforms/efr32mg12/sleepy-demo/sleepy-demo-mtd/main.c
@@ -37,7 +37,6 @@
#include "hal_common.h"
#include "openthread-system.h"
#include "platform-efr32.h"
-#include "rtcdriver.h"
#include <common/logging.hpp>
#include <openthread-core-config.h>
#include <openthread/cli.h>
diff --git a/examples/platforms/efr32mg12/system.c b/examples/platforms/efr32mg12/system.c
index d51c464..73e4aca 100644
--- a/examples/platforms/efr32mg12/system.c
+++ b/examples/platforms/efr32mg12/system.c
@@ -32,23 +32,25 @@
* This file includes the platform-specific initializers.
*/
+#include <assert.h>
#include <string.h>
#include "openthread-system.h"
-#include <openthread/tasklet.h>
#include <openthread/platform/uart.h>
#include "common/logging.hpp"
#include "bsp.h"
#include "em_chip.h"
+#include "em_cmu.h"
#include "em_core.h"
#include "em_emu.h"
#include "em_system.h"
#include "hal-config.h"
#include "hal_common.h"
#include "rail.h"
-#include "rtcdriver.h"
+#include "sl_mpu.h"
+#include "sl_sleeptimer.h"
#include "openthread-core-efr32-config.h"
#include "platform-efr32.h"
@@ -70,6 +72,7 @@
{
OT_UNUSED_VARIABLE(argc);
OT_UNUSED_VARIABLE(argv);
+ sl_status_t status;
__disable_irq();
@@ -84,7 +87,13 @@
CHIP_Init();
halInitChipSpecific();
BSP_Init(BSP_INIT_BCC);
- RTCDRV_Init();
+
+ CMU_ClockSelectSet(cmuClock_LFE, cmuSelect_LFRCO);
+ CMU_ClockEnable(cmuClock_CORELE, true);
+ CMU_ClockEnable(cmuClock_RTCC, true);
+
+ status = sl_sleeptimer_init();
+ assert(status == SL_STATUS_OK);
#if (HAL_FEM_ENABLE)
initFem();
diff --git a/examples/platforms/efr32mg13/Makefile.am b/examples/platforms/efr32mg13/Makefile.am
new file mode 100644
index 0000000..d019a34
--- /dev/null
+++ b/examples/platforms/efr32mg13/Makefile.am
@@ -0,0 +1,147 @@
+#
+# Copyright (c) 2020, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
+
+lib_LIBRARIES = libopenthread-efr32mg13.a
+
+# Do not enable -Wconversion for rail
+override CFLAGS := $(filter-out -Wconversion,$(CFLAGS))
+override CXXFLAGS := $(filter-out -Wconversion,$(CXXFLAGS))
+
+# Do not enable -pedantic-errors for rail
+override CFLAGS := $(filter-out -pedantic-errors,$(CFLAGS))
+override CXXFLAGS := $(filter-out -pedantic-errors,$(CXXFLAGS))
+
+# Do not enable -Wundef for rail
+override CFLAGS := $(filter-out -Wundef,$(CFLAGS))
+override CXXFLAGS := $(filter-out -Wundef,$(CXXFLAGS))
+
+EFR32_BOARD_DIR = $(shell echo $(BOARD) | tr A-Z a-z)
+
+SDK_SRC_DIR = $(top_srcdir)/third_party/silabs/gecko_sdk_suite/v2.7
+
+libopenthread_efr32mg13_a_CPPFLAGS = \
+ -DPLATFORM_HEADER=\"platform/base/hal/micro/cortexm3/compiler/gcc.h\" \
+ -DNVIC_CONFIG=\"platform/base/hal/micro/cortexm3/efm32/nvic-config.h\" \
+ -Wno-sign-compare \
+ -DCORTEXM3 \
+ -DPHY=EMBER_PHY_RAIL \
+ -DMICRO=EMBER_MICRO_CORTEXM3_EFR32 \
+ -DCORTEXM3_EFM32_MICRO \
+ -DPLAT=EMBER_PLATFORM_CORTEXM3 \
+ -I$(top_srcdir)/examples/platforms \
+ -I$(top_srcdir)/examples/platforms/efr32mg13/$(EFR32_BOARD_DIR) \
+ -I$(top_srcdir)/include \
+ -I$(top_srcdir)/src/core \
+ -I$(top_srcdir)/third_party/silabs/rail_config \
+ -I$(SDK_SRC_DIR) \
+ -I$(SDK_SRC_DIR)/hardware/kit/common/bsp \
+ -I$(SDK_SRC_DIR)/hardware/kit/common/drivers \
+ -I$(SDK_SRC_DIR)/hardware/kit/EFR32MG13_$(BOARD)/config \
+ -I$(SDK_SRC_DIR)/platform/base/hal/micro/cortexm3/efm32 \
+ -I$(SDK_SRC_DIR)/platform/base/hal/micro/cortexm3/efm32/config \
+ -I$(SDK_SRC_DIR)/platform/common/inc \
+ -I$(SDK_SRC_DIR)/platform/CMSIS/Include \
+ -I$(SDK_SRC_DIR)/platform/Device/SiliconLabs/EFR32MG13P/Include \
+ -I$(SDK_SRC_DIR)/platform/emdrv/common/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/gpiointerrupt/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/uartdrv/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/uartdrv/config \
+ -I$(SDK_SRC_DIR)/platform/emdrv/ustimer/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/dmadrv/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/dmadrv/config \
+ -I$(SDK_SRC_DIR)/platform/emlib/inc \
+ -I$(SDK_SRC_DIR)/platform/halconfig/inc/hal-config \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32/efr32xg1x \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32/rf/common/cortex \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/common \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/hal \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/hal/efr32 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/protocol/ieee802154 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/plugin/pa-conversions \
+ -I$(SDK_SRC_DIR)/platform/service/mpu/inc \
+ -I$(SDK_SRC_DIR)/platform/service/sleeptimer/config \
+ -I$(SDK_SRC_DIR)/platform/service/sleeptimer/inc \
+ -I$(SDK_SRC_DIR)/util/plugin/plugin-common/fem-control \
+ -I$(SDK_SRC_DIR)/util/third_party/mbedtls/sl_crypto/include \
+ -Wno-unused-parameter \
+ -Wno-missing-field-initializers \
+ $(NULL)
+
+PLATFORM_SOURCES = \
+ alarm.c \
+ diag.c \
+ entropy.c \
+ fem-control.c \
+ flash.c \
+ logging.c \
+ misc.c \
+ openthread-core-efr32-config.h \
+ openthread-core-efr32-config-check.h \
+ platform-efr32.h \
+ platform-band.h \
+ radio.c \
+ rail_config.h \
+ startup-gcc.c \
+ system.c \
+ uart.c \
+ $(NULL)
+
+noinst_HEADERS = \
+ platform-efr32.h \
+ platform-band.h \
+ $(NULL)
+
+libopenthread_efr32mg13_a_SOURCES = \
+ $(PLATFORM_SOURCES) \
+ $(NULL)
+
+PRETTY_FILES = \
+ $(PLATFORM_SOURCES) \
+ $(NULL)
+
+Dash = -
+libopenthread_efr32mg13_a_LIBADD = \
+ $(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o") \
+ $(shell find $(top_builddir)/third_party/jlink/SEGGER_RTT_V640/RTT $(Dash)type f $(Dash)name "*.o")
+
+DIST_SUBDIRS = \
+ sleepy-demo \
+ $(NULL)
+
+SUBDIRS = \
+ sleepy-demo \
+ $(NULL)
+
+PRETTY_SUBDIRS = \
+ sleepy-demo \
+ $(NULL)
+
+include $(abs_top_nlbuild_autotools_dir)/automake/post.am
diff --git a/examples/platforms/efr32mg13/Makefile.platform.am b/examples/platforms/efr32mg13/Makefile.platform.am
new file mode 100644
index 0000000..c65e045
--- /dev/null
+++ b/examples/platforms/efr32mg13/Makefile.platform.am
@@ -0,0 +1,48 @@
+#
+# Copyright (c) 2020, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+#
+# efr32mg13 platform-specific Makefile
+#
+
+LIBRAIL = $(shell \
+if [ "$(DMP)" = "1" ]; then \
+ echo "librail_multiprotocol_efr32xg13_gcc_release.a"; \
+else \
+ echo "librail_efr32xg13_gcc_release.a"; \
+fi )
+
+LDADD_COMMON += \
+ $(top_builddir)/examples/platforms/efr32mg13/libopenthread-efr32mg13.a \
+ $(top_builddir)/third_party/silabs/libsilabs-efr32mg13-sdk.a \
+ $(top_srcdir)/third_party/silabs/gecko_sdk_suite/v2.7/platform/radio/rail_lib/autogen/librail_release/$(LIBRAIL) \
+ $(NULL)
+
+LDFLAGS_COMMON += \
+ -T $(top_srcdir)/third_party/silabs/gecko_sdk_suite/v2.7/platform/Device/SiliconLabs/EFR32MG13P/Source/GCC/efr32mg13p.ld \
+ $(NULL)
diff --git a/examples/platforms/efr32mg13/README.md b/examples/platforms/efr32mg13/README.md
new file mode 100644
index 0000000..9c756ea
--- /dev/null
+++ b/examples/platforms/efr32mg13/README.md
@@ -0,0 +1,260 @@
+# OpenThread on EFR32MG13 Example
+
+This directory contains example platform drivers for the [Silicon Labs EFR32MG13][efr32mg13]
+based on [EFR32™ Mighty Gecko Wireless Starter Kit][SLWSTK6000B].
+
+[efr32mg]: http://www.silabs.com/products/wireless/mesh-networking/efr32mg-mighty-gecko-zigbee-thread-soc
+[SLWSTK6000B]: http://www.silabs.com/products/development-tools/wireless/mesh-networking/mighty-gecko-starter-kit
+
+The example platform drivers are intended to present the minimal code
+necessary to support OpenThread. [EFR32MG13P SoC][efr32mg13p]
+has rich memory and peripheral resources which can support all OpenThread
+capabilities. See the "Run the example with EFR32MG13 boards" section below
+for an example using basic OpenThread capabilities.
+
+See [sleepy-demo/README.md](sleepy-demo/README.md) for instructions for an example that uses the low-energy
+modes of the EFR32MG13 when running as a Sleepy End Device.
+
+[efr32mg13p]: http://www.silabs.com/products/wireless/mesh-networking/efr32mg-mighty-gecko-zigbee-thread-soc/device.EFR32MG13P432F1024GL125
+
+## Toolchain
+
+Download and install the [GNU toolchain for ARM Cortex-M][gnu-toolchain].
+
+[gnu-toolchain]: https://developer.arm.com/open-source/gnu-toolchain/gnu-rm
+
+In a Bash terminal, follow these instructions to install the GNU toolchain and
+other dependencies.
+
+```bash
+$ cd <path-to-openthread>
+$ ./script/bootstrap
+```
+
+## Build Examples
+
+1. Download and install the [Simplicity Studio][simplicity_studio].
+
+[simplicity_studio]: http://www.silabs.com/products/development-tools/software/simplicity-studio
+
+2. Install Flex (Gecko) SDK including RAIL Library from Simplicity Studio.
+ - Connect EFR32MG13P Wireless Starter Kit to Simplicity Studio.
+ - Find Flex SDK v2.7 in the Software Update page and click Install.
+ - Flex SDK v2.7 will be installed in the path: `/SimplicityStudio_v4/developer/sdks/gecko_sdk_suite`.
+
+For more information on configuring, building, and installing applications for the Wireless Gecko (EFR32)
+portfolio using FLEX, see [Getting Started with the Silicon Labs Flex Software Development Kit for the
+Wireless Gecko (EFR32™) Portfolio][QSG138]. For more information
+on RAIL, see [Radio Abstraction Interface Layer][rail].
+
+[QSG138]: https://www.silabs.com/documents/public/quick-start-guides/qsg138-flex-efr32.pdf
+[rail]: http://www.silabs.com/products/development-tools/software/radio-abstraction-interface-layer-sdk
+
+3. Configure the path to Flex SDK source code.
+```bash
+$ cd <path-to-openthread>/third_party
+$ mkdir silabs
+$ cd <path-to-Simplicity-Studio>/developer/sdks
+$ cp -rf gecko_sdk_suite <path-to-openthread>/third_party/silabs/
+```
+
+Alternatively create a symbolic link to the Flex SDK source code.
+```bash
+$ cd <path-to-openthread>/third_party
+$ mkdir silabs
+$ ln -s <path-to-Simplicity-Studio>/developer/sdks/gecko_sdk_suite silabs/gecko_sdk_suite
+```
+
+4. Build OpenThread Firmware (CLI example) on EFR32 platform.
+```bash
+$ cd <path-to-openthread>
+$ ./bootstrap
+```
+For EFR32MG13™ Mighty Gecko Wireless Starter Kit:
+```bash
+$ make -f examples/Makefile-efr32mg13 BOARD=BRD4168A
+```
+
+After a successful build, the `elf` files are found in
+`<path-to-openthread>/output/efr32mg13/bin`.
+
+## Flash Binaries
+
+Compiled binaries may be flashed onto the EFR32 using [JLinkGDBServer][jlinkgdbserver].
+EFR32 Starter kit mainboard integrates an on-board SEGGER J-Link debugger.
+
+[jlinkgdbserver]: https://www.segger.com/jlink-gdb-server.html
+
+```bash
+$ cd <path-to-JLinkGDBServer>
+$ sudo ./JLinkGDBServer -if swd -device EFR32MG13PxxxF1024
+$ cd <path-to-openthread>/output/efr32/bin
+$ arm-none-eabi-gdb ot-cli-ftd
+$ (gdb) target remote 127.0.0.1:2331
+$ (gdb) load
+$ (gdb) monitor reset
+$ (gdb) c
+```
+
+Note: Support for the "EFR32MG13PxxxF1024" device was added to JLinkGDBServer V6.14d.
+
+Or
+Compiled binaries also may be flashed onto the specified EFR32 dev board using [J-Link Commander][j-link-commander].
+
+[j-link-commander]: https://www.segger.com/products/debug-probes/j-link/tools/j-link-commander/
+
+```bash
+$ cd <path-to-openthread>/output/efr32mg13/bin
+$ arm-none-eabi-objcopy -O ihex ot-cli-ftd ot-cli-ftd.hex
+$ JLinkExe -device EFR32MG13PxxxF1024 -speed 4000 -if SWD -autoconnect 1 -SelectEmuBySN <SerialNo>
+$ J-Link>loadfile ot-cli-ftd.hex
+$ J-Link>r
+$ J-Link>q
+```
+
+Note: SerialNo is J-Link serial number. Use the following command to get the serial number of the connected J-Link.
+
+```bash
+$ JLinkExe
+```
+
+Alternatively Simplicity Commander provides a graphical interface for J-Link Commander.
+
+```bash
+$ cd <path-to-openthread>/output/efr32mg13/bin
+$ arm-none-eabi-objcopy -O ihex ot-cli-ftd ot-cli-ftd.ihex
+$ <path-to-simplicity-studio>/developer/adapter_packs/commander/commander
+```
+
+In the J-Link Device drop-down list select the serial number of the device to flash. Click the Adapter Connect button.
+Esnure the Debug Interface drop-down list is set to SWD and click the Target Connect button.
+Click on the Flash icon on the left side of the window to switch to the flash page.
+In the Flash MCU pane enter the path of the ot-cli-ftd.s37 file or choose the file with the Browse... button.
+Click the Flash button located under the Browse... button.
+
+## Run the example with EFR32MG13 boards
+1. Flash two EFR32 boards with the `CLI example` firmware (as shown above).
+2. Open terminal to first device `/dev/ttyACM0` (serial port settings: 115200 8-N-1).
+ Type `help` for a list of commands.
+
+ ```bash
+ > help
+ help
+ channel
+ childtimeout
+ contextreusedelay
+ extaddr
+ extpanid
+ ipaddr
+ keysequence
+ leaderweight
+ masterkey
+ mode
+ netdataregister
+ networkidtimeout
+ networkname
+ panid
+ ping
+ prefix
+ releaserouterid
+ rloc16
+ route
+ routerupgradethreshold
+ scan
+ start
+ state
+ stop
+ whitelist
+ ```
+
+3. Start a Thread network as Leader.
+
+ ```bash
+ > dataset init new
+ Done
+ > dataset
+ Active Timestamp: 1
+ Channel: 13
+ Channel Mask: 07fff800
+ Ext PAN ID: d63e8e3e495ebbc3
+ Mesh Local Prefix: fd3d:b50b:f96d:722d/64
+ Master Key: dfd34f0f05cad978ec4e32b0413038ff
+ Network Name: OpenThread-8f28
+ PAN ID: 0x8f28
+ PSKc: c23a76e98f1a6483639b1ac1271e2e27
+ Security Policy: 0, onrcb
+ Done
+ > dataset commit active
+ Done
+ > ifconfig up
+ Done
+ > thread start
+ Done
+
+ wait a couple of seconds...
+
+ > state
+ leader
+ Done
+ ```
+
+4. Open terminal to second device `/dev/ttyACM1` (serial port settings: 115200 8-N-1)
+ and attach it to the Thread network as a Router.
+
+ ```bash
+ > dataset masterkey dfd34f0f05cad978ec4e32b0413038ff
+ Done
+ > dataset commit active
+ Done
+ > routerselectionjitter 1
+ Done
+ > ifconfig up
+ Done
+ > thread start
+ Done
+
+ wait a couple of seconds...
+
+ > state
+ router
+ Done
+ ```
+
+5. List all IPv6 addresses of Leader.
+
+ ```bash
+ > ipaddr
+ fd3d:b50b:f96d:722d:0:ff:fe00:fc00
+ fd3d:b50b:f96d:722d:0:ff:fe00:c00
+ fd3d:b50b:f96d:722d:7a73:bff6:9093:9117
+ fe80:0:0:0:6c41:9001:f3d6:4148
+ Done
+ ```
+
+6. Send an ICMPv6 ping to Leader's Mesh-EID IPv6 address.
+
+ ```bash
+ > ping fd3d:b50b:f96d:722d:7a73:bff6:9093:9117
+ 16 bytes from fd3d:b50b:f96d:722d:558:f56b:d688:799: icmp_seq=1 hlim=64 time=24ms
+ ```
+
+The above example demonstrates basic OpenThread capabilities. Enable more features/roles (e.g. commissioner,
+joiner, DHCPv6 Server/Client, etc.) by assigning compile-options before compiling.
+
+```bash
+$ cd <path-to-openthread>
+$ ./bootstrap
+$ make -f examples/Makefile-efr32mg13 COMMISSIONER=1 JOINER=1 DHCP6_CLIENT=1 DHCP6_SERVER=1
+```
+
+For a list of all available commands, visit [OpenThread CLI Reference README.md][CLI].
+
+[CLI]: https://github.com/openthread/openthread/blob/master/src/cli/README.md
+
+## Verification
+
+The following toolchain has been used for testing and verification:
+ - gcc version 7.3.1
+
+The EFR32 example has been verified with following Flex SDK/RAIL Library version:
+ - Flex SDK version 2.7.0.0
diff --git a/examples/platforms/efr32mg13/alarm.c b/examples/platforms/efr32mg13/alarm.c
new file mode 100644
index 0000000..71a39c0
--- /dev/null
+++ b/examples/platforms/efr32mg13/alarm.c
@@ -0,0 +1,145 @@
+/*
+ * Copyright (c) 2020, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file implements the OpenThread platform abstraction for the alarm.
+ *
+ */
+
+#include <assert.h>
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "openthread-system.h"
+#include <openthread/config.h>
+#include <openthread/platform/alarm-milli.h>
+#include <openthread/platform/diag.h>
+#include "common/logging.hpp"
+
+#include "platform-efr32.h"
+#include "utils/code_utils.h"
+
+#include "em_core.h"
+#include "rail.h"
+#include "sl_sleeptimer.h"
+
+#define XTAL_ACCURACY 200
+
+static sl_sleeptimer_timer_handle_t sl_handle;
+static uint32_t sAlarm = 0;
+static bool sIsRunning = false;
+
+static void AlarmCallback(sl_sleeptimer_timer_handle_t *aHandle, void *aData)
+{
+ otSysEventSignalPending();
+}
+
+void efr32AlarmInit(void)
+{
+ memset(&sl_handle, 0, sizeof sl_handle);
+}
+
+uint32_t otPlatAlarmMilliGetNow(void)
+{
+ uint64_t ticks;
+ uint64_t now;
+ sl_status_t status;
+
+ ticks = sl_sleeptimer_get_tick_count64();
+ status = sl_sleeptimer_tick64_to_ms(ticks, &now);
+ assert(status == SL_STATUS_OK);
+ return (uint32_t)now;
+}
+
+uint32_t otPlatTimeGetXtalAccuracy(void)
+{
+ return XTAL_ACCURACY;
+}
+
+void otPlatAlarmMilliStartAt(otInstance *aInstance, uint32_t aT0, uint32_t aDt)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ sl_status_t status;
+ int32_t remaining;
+ uint32_t ticks;
+
+ sl_sleeptimer_stop_timer(&sl_handle);
+
+ sAlarm = aT0 + aDt;
+ remaining = (int32_t)(sAlarm - otPlatAlarmMilliGetNow());
+ sIsRunning = true;
+
+ if (remaining <= 0)
+ {
+ otSysEventSignalPending();
+ }
+ else
+ {
+ status = sl_sleeptimer_ms32_to_tick(remaining, &ticks);
+ assert(status == SL_STATUS_OK);
+
+ status = sl_sleeptimer_start_timer(&sl_handle, ticks, AlarmCallback, NULL, 0,
+ SL_SLEEPTIMER_NO_HIGH_PRECISION_HF_CLOCKS_REQUIRED_FLAG);
+ assert(status == SL_STATUS_OK);
+ }
+}
+
+void otPlatAlarmMilliStop(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ sl_sleeptimer_stop_timer(&sl_handle);
+ sIsRunning = false;
+}
+
+void efr32AlarmProcess(otInstance *aInstance)
+{
+ int32_t remaining;
+
+ if (sIsRunning)
+ {
+ remaining = (int32_t)(sAlarm - otPlatAlarmMilliGetNow());
+
+ if (remaining <= 0)
+ {
+ sIsRunning = false;
+
+#if OPENTHREAD_CONFIG_DIAG_ENABLE
+ if (otPlatDiagModeGet())
+ {
+ otPlatDiagAlarmFired(aInstance);
+ }
+ else
+#endif
+ {
+ otPlatAlarmMilliFired(aInstance);
+ }
+ }
+ }
+}
diff --git a/examples/platforms/efr32mg13/brd4168a/board_config.h b/examples/platforms/efr32mg13/brd4168a/board_config.h
new file mode 100644
index 0000000..6cac36d
--- /dev/null
+++ b/examples/platforms/efr32mg13/brd4168a/board_config.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2020, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file includes dev borad compile-time configuration constants for efr32.
+ *
+ */
+
+#ifndef __BOARD_CONFIG_H__
+#define __BOARD_CONFIG_H__
+
+#define RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT 1 /// Dev board suppports OQPSK modulation in 2.4GHz band.
+
+#ifndef RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+#define RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT 0 /// Set to 1 to enable debug counters in radio.c
+#endif
+
+#ifndef RADIO_CONFIG_DMP_SUPPORT
+#define RADIO_CONFIG_DMP_SUPPORT 0 /// Set to 1 to enable Dynamic Multi-Protocol support in radio.c
+#endif
+
+#endif // __BOARD_CONFIG_H__
diff --git a/examples/platforms/efr32mg13/brd4168a/hal-config.h b/examples/platforms/efr32mg13/brd4168a/hal-config.h
new file mode 100644
index 0000000..d1b4be9
--- /dev/null
+++ b/examples/platforms/efr32mg13/brd4168a/hal-config.h
@@ -0,0 +1,445 @@
+#ifndef HAL_CONFIG_BOARD_H
+#define HAL_CONFIG_BOARD_H
+
+#include "em_device.h"
+#include "hal-config-types.h"
+
+// This file is auto-generated by Hardware Configurator in Simplicity Studio.
+// Any content between $[ and ]$ will be replaced whenever the file is regenerated.
+// Content outside these regions will be preserved.
+
+// $[ACMP0]
+// [ACMP0]$
+
+// $[ACMP1]
+// [ACMP1]$
+
+// $[ADC0]
+// [ADC0]$
+
+// $[ANTDIV]
+// [ANTDIV]$
+
+// $[BATTERYMON]
+
+// [BATTERYMON]$
+
+// $[BTL_BUTTON]
+
+#define BSP_BTL_BUTTON_PIN (6U)
+#define BSP_BTL_BUTTON_PORT (gpioPortF)
+
+// [BTL_BUTTON]$
+
+// $[BULBPWM]
+// [BULBPWM]$
+
+// $[BULBPWM_COLOR]
+// [BULBPWM_COLOR]$
+
+// $[BUTTON]
+#define BSP_BUTTON_PRESENT (1)
+
+#define BSP_BUTTON0_PIN (6U)
+#define BSP_BUTTON0_PORT (gpioPortF)
+
+#define BSP_BUTTON1_PIN (7U)
+#define BSP_BUTTON1_PORT (gpioPortF)
+
+#define BSP_BUTTON_COUNT (2U)
+#define BSP_BUTTON_INIT { { BSP_BUTTON0_PORT, BSP_BUTTON0_PIN }, { BSP_BUTTON1_PORT, BSP_BUTTON1_PIN } }
+#define BSP_BUTTON_GPIO_DOUT (HAL_GPIO_DOUT_LOW)
+#define BSP_BUTTON_GPIO_MODE (HAL_GPIO_MODE_INPUT)
+// [BUTTON]$
+
+// $[CMU]
+#define HAL_CLK_HFCLK_SOURCE (HAL_CLK_HFCLK_SOURCE_HFXO)
+#define HAL_CLK_LFECLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
+#define HAL_CLK_LFBCLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
+
+#define BSP_CLK_HFXO_PRESENT (1)
+#define BSP_CLK_HFXO_FREQ (38400000UL)
+#define BSP_CLK_HFXO_INIT CMU_HFXOINIT_DEFAULT
+#define BSP_CLK_HFXO_CTUNE (330)
+#define BSP_CLK_LFXO_PRESENT (1)
+#define BSP_CLK_LFXO_INIT CMU_LFXOINIT_DEFAULT
+#define BSP_CLK_LFXO_FREQ (32768U)
+#define BSP_CLK_LFXO_CTUNE (32U)
+// [CMU]$
+
+// $[COEX]
+// [COEX]$
+
+// $[CS5463]
+// [CS5463]$
+
+// $[CSEN]
+// [CSEN]$
+
+// $[DCDC]
+#define BSP_DCDC_PRESENT (1)
+
+#define BSP_DCDC_INIT EMU_DCDCINIT_DEFAULT
+// [DCDC]$
+
+// $[EMU]
+// [EMU]$
+
+// $[EXTFLASH]
+#define BSP_EXTFLASH_CS_PIN (4U)
+#define BSP_EXTFLASH_CS_PORT (gpioPortA)
+
+#define BSP_EXTFLASH_INTERNAL (0)
+#define BSP_EXTFLASH_USART (HAL_SPI_PORT_USART1)
+#define BSP_EXTFLASH_MOSI_PIN (6U)
+#define BSP_EXTFLASH_MOSI_PORT (gpioPortC)
+#define BSP_EXTFLASH_MOSI_LOC (11U)
+
+#define BSP_EXTFLASH_MISO_PIN (7U)
+#define BSP_EXTFLASH_MISO_PORT (gpioPortC)
+#define BSP_EXTFLASH_MISO_LOC (11U)
+
+#define BSP_EXTFLASH_CLK_PIN (8U)
+#define BSP_EXTFLASH_CLK_PORT (gpioPortC)
+#define BSP_EXTFLASH_CLK_LOC (11U)
+
+// [EXTFLASH]$
+
+// $[EZRADIOPRO]
+// [EZRADIOPRO]$
+
+// $[FEM]
+// [FEM]$
+
+// $[GPIO]
+#define PORTIO_GPIO_SWV_PIN (2U)
+#define PORTIO_GPIO_SWV_PORT (gpioPortF)
+#define PORTIO_GPIO_SWV_LOC (0U)
+
+#define BSP_TRACE_SWO_PIN (2U)
+#define BSP_TRACE_SWO_PORT (gpioPortF)
+#define BSP_TRACE_SWO_LOC (0U)
+
+// [GPIO]$
+
+// $[I2C0]
+#define PORTIO_I2C0_SCL_PIN (10U)
+#define PORTIO_I2C0_SCL_PORT (gpioPortC)
+#define PORTIO_I2C0_SCL_LOC (14U)
+
+#define PORTIO_I2C0_SDA_PIN (11U)
+#define PORTIO_I2C0_SDA_PORT (gpioPortC)
+#define PORTIO_I2C0_SDA_LOC (16U)
+
+#define BSP_I2C0_SCL_PIN (10U)
+#define BSP_I2C0_SCL_PORT (gpioPortC)
+#define BSP_I2C0_SCL_LOC (14U)
+
+#define BSP_I2C0_SDA_PIN (11U)
+#define BSP_I2C0_SDA_PORT (gpioPortC)
+#define BSP_I2C0_SDA_LOC (16U)
+
+// [I2C0]$
+
+// $[I2C1]
+// [I2C1]$
+
+// $[I2CSENSOR]
+
+#define BSP_I2CSENSOR_ENABLE_PIN (15U)
+#define BSP_I2CSENSOR_ENABLE_PORT (gpioPortD)
+
+#define BSP_I2CSENSOR_PERIPHERAL (HAL_I2C_PORT_I2C0)
+#define BSP_I2CSENSOR_SCL_PIN (10U)
+#define BSP_I2CSENSOR_SCL_PORT (gpioPortC)
+#define BSP_I2CSENSOR_SCL_LOC (14U)
+
+#define BSP_I2CSENSOR_SDA_PIN (11U)
+#define BSP_I2CSENSOR_SDA_PORT (gpioPortC)
+#define BSP_I2CSENSOR_SDA_LOC (16U)
+
+// [I2CSENSOR]$
+
+// $[IDAC0]
+// [IDAC0]$
+
+// $[IOEXP]
+// [IOEXP]$
+
+// $[LED]
+#define BSP_LED_PRESENT (1)
+
+#define BSP_LED0_PIN (4U)
+#define BSP_LED0_PORT (gpioPortF)
+
+#define BSP_LED1_PIN (5U)
+#define BSP_LED1_PORT (gpioPortF)
+
+#define BSP_LED_COUNT (2U)
+#define BSP_LED_INIT { { BSP_LED0_PORT, BSP_LED0_PIN }, { BSP_LED1_PORT, BSP_LED1_PIN } }
+#define BSP_LED_POLARITY (1)
+// [LED]$
+
+// $[LESENSE]
+// [LESENSE]$
+
+// $[LETIMER0]
+// [LETIMER0]$
+
+// $[LEUART0]
+// [LEUART0]$
+
+// $[LFXO]
+// [LFXO]$
+
+// $[MODEM]
+// [MODEM]$
+
+// $[PA]
+
+#define BSP_PA_VOLTAGE (3300U)
+// [PA]$
+
+// $[PCNT0]
+// [PCNT0]$
+
+// $[PORTIO]
+// [PORTIO]$
+
+// $[PRS]
+#define PORTIO_PRS_CH4_PIN (13U)
+#define PORTIO_PRS_CH4_PORT (gpioPortD)
+#define PORTIO_PRS_CH4_LOC (4U)
+
+// [PRS]$
+
+// $[PTI]
+#define PORTIO_PTI_DCLK_PIN (11U)
+#define PORTIO_PTI_DCLK_PORT (gpioPortB)
+#define PORTIO_PTI_DCLK_LOC (6U)
+
+#define PORTIO_PTI_DFRAME_PIN (13U)
+#define PORTIO_PTI_DFRAME_PORT (gpioPortB)
+#define PORTIO_PTI_DFRAME_LOC (6U)
+
+#define PORTIO_PTI_DOUT_PIN (12U)
+#define PORTIO_PTI_DOUT_PORT (gpioPortB)
+#define PORTIO_PTI_DOUT_LOC (6U)
+
+#define BSP_PTI_DFRAME_PIN (13U)
+#define BSP_PTI_DFRAME_PORT (gpioPortB)
+#define BSP_PTI_DFRAME_LOC (6U)
+
+#define BSP_PTI_DOUT_PIN (12U)
+#define BSP_PTI_DOUT_PORT (gpioPortB)
+#define BSP_PTI_DOUT_LOC (6U)
+
+// [PTI]$
+
+// $[PYD1698]
+// [PYD1698]$
+
+// $[SERIAL]
+#define BSP_SERIAL_APP_PORT (HAL_SERIAL_PORT_USART0)
+#define BSP_SERIAL_APP_TX_PIN (0U)
+#define BSP_SERIAL_APP_TX_PORT (gpioPortA)
+#define BSP_SERIAL_APP_TX_LOC (0U)
+
+#define BSP_SERIAL_APP_RX_PIN (1U)
+#define BSP_SERIAL_APP_RX_PORT (gpioPortA)
+#define BSP_SERIAL_APP_RX_LOC (0U)
+
+#define BSP_SERIAL_APP_CTS_PIN (2U)
+#define BSP_SERIAL_APP_CTS_PORT (gpioPortA)
+#define BSP_SERIAL_APP_CTS_LOC (30U)
+
+#define BSP_SERIAL_APP_RTS_PIN (3U)
+#define BSP_SERIAL_APP_RTS_PORT (gpioPortA)
+#define BSP_SERIAL_APP_RTS_LOC (30U)
+
+#define HAL_SERIAL_APP_RX_QUEUE_SIZE (128)
+#define HAL_SERIAL_APP_BAUD_RATE (115200)
+#define HAL_SERIAL_APP_RXSTOP (16)
+#define HAL_SERIAL_APP_RXSTART (16)
+#define HAL_SERIAL_APP_TX_QUEUE_SIZE (128)
+#define HAL_SERIAL_APP_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_HWUART)
+// [SERIAL]$
+
+// $[SPIDISPLAY]
+
+#define BSP_SPIDISPLAY_CS_PIN (14U)
+#define BSP_SPIDISPLAY_CS_PORT (gpioPortD)
+
+#define BSP_SPIDISPLAY_ENABLE_PIN (15U)
+#define BSP_SPIDISPLAY_ENABLE_PORT (gpioPortD)
+
+#define BSP_SPIDISPLAY_EXTCOMIN_PIN (13U)
+#define BSP_SPIDISPLAY_EXTCOMIN_PORT (gpioPortD)
+#define BSP_SPIDISPLAY_EXTCOMIN_LOC (4U)
+
+#define BSP_SPIDISPLAY_DISPLAY (HAL_DISPLAY_SHARP_LS013B7DH03)
+#define BSP_SPIDISPLAY_USART (HAL_SPI_PORT_USART1)
+#define BSP_SPIDISPLAY_EXTCOMIN_CHANNEL (4)
+#define BSP_SPIDISPLAY_MOSI_PIN (6U)
+#define BSP_SPIDISPLAY_MOSI_PORT (gpioPortC)
+#define BSP_SPIDISPLAY_MOSI_LOC (11U)
+
+#define BSP_SPIDISPLAY_MISO_PIN (7U)
+#define BSP_SPIDISPLAY_MISO_PORT (gpioPortC)
+#define BSP_SPIDISPLAY_MISO_LOC (11U)
+
+#define BSP_SPIDISPLAY_CLK_PIN (8U)
+#define BSP_SPIDISPLAY_CLK_PORT (gpioPortC)
+#define BSP_SPIDISPLAY_CLK_LOC (11U)
+
+// [SPIDISPLAY]$
+
+// $[SPINCP]
+#define BSP_SPINCP_NHOSTINT_PIN (6U)
+#define BSP_SPINCP_NHOSTINT_PORT (gpioPortF)
+
+#define BSP_SPINCP_NWAKE_PIN (7U)
+#define BSP_SPINCP_NWAKE_PORT (gpioPortF)
+
+#define BSP_SPINCP_USART_PORT (HAL_SPI_PORT_USART1)
+#define BSP_SPINCP_MOSI_PIN (6U)
+#define BSP_SPINCP_MOSI_PORT (gpioPortC)
+#define BSP_SPINCP_MOSI_LOC (11U)
+
+#define BSP_SPINCP_MISO_PIN (7U)
+#define BSP_SPINCP_MISO_PORT (gpioPortC)
+#define BSP_SPINCP_MISO_LOC (11U)
+
+#define BSP_SPINCP_CLK_PIN (8U)
+#define BSP_SPINCP_CLK_PORT (gpioPortC)
+#define BSP_SPINCP_CLK_LOC (11U)
+
+#define BSP_SPINCP_CS_PIN (9U)
+#define BSP_SPINCP_CS_PORT (gpioPortC)
+#define BSP_SPINCP_CS_LOC (11U)
+
+// [SPINCP]$
+
+// $[TIMER0]
+// [TIMER0]$
+
+// $[TIMER1]
+// [TIMER1]$
+
+// $[UARTNCP]
+#define BSP_UARTNCP_USART_PORT (HAL_SERIAL_PORT_USART0)
+#define BSP_UARTNCP_TX_PIN (0U)
+#define BSP_UARTNCP_TX_PORT (gpioPortA)
+#define BSP_UARTNCP_TX_LOC (0U)
+
+#define BSP_UARTNCP_RX_PIN (1U)
+#define BSP_UARTNCP_RX_PORT (gpioPortA)
+#define BSP_UARTNCP_RX_LOC (0U)
+
+#define BSP_UARTNCP_CTS_PIN (2U)
+#define BSP_UARTNCP_CTS_PORT (gpioPortA)
+#define BSP_UARTNCP_CTS_LOC (30U)
+
+#define BSP_UARTNCP_RTS_PIN (3U)
+#define BSP_UARTNCP_RTS_PORT (gpioPortA)
+#define BSP_UARTNCP_RTS_LOC (30U)
+
+// [UARTNCP]$
+
+// $[USART0]
+#define PORTIO_USART0_CTS_PIN (2U)
+#define PORTIO_USART0_CTS_PORT (gpioPortA)
+#define PORTIO_USART0_CTS_LOC (30U)
+
+#define PORTIO_USART0_RTS_PIN (3U)
+#define PORTIO_USART0_RTS_PORT (gpioPortA)
+#define PORTIO_USART0_RTS_LOC (30U)
+
+#define PORTIO_USART0_RX_PIN (1U)
+#define PORTIO_USART0_RX_PORT (gpioPortA)
+#define PORTIO_USART0_RX_LOC (0U)
+
+#define PORTIO_USART0_TX_PIN (0U)
+#define PORTIO_USART0_TX_PORT (gpioPortA)
+#define PORTIO_USART0_TX_LOC (0U)
+
+#define BSP_USART0_TX_PIN (0U)
+#define BSP_USART0_TX_PORT (gpioPortA)
+#define BSP_USART0_TX_LOC (0U)
+
+#define BSP_USART0_RX_PIN (1U)
+#define BSP_USART0_RX_PORT (gpioPortA)
+#define BSP_USART0_RX_LOC (0U)
+
+#define BSP_USART0_CTS_PIN (2U)
+#define BSP_USART0_CTS_PORT (gpioPortA)
+#define BSP_USART0_CTS_LOC (30U)
+
+#define BSP_USART0_RTS_PIN (3U)
+#define BSP_USART0_RTS_PORT (gpioPortA)
+#define BSP_USART0_RTS_LOC (30U)
+
+// [USART0]$
+
+// $[USART1]
+#define PORTIO_USART1_CLK_PIN (8U)
+#define PORTIO_USART1_CLK_PORT (gpioPortC)
+#define PORTIO_USART1_CLK_LOC (11U)
+
+#define PORTIO_USART1_CS_PIN (9U)
+#define PORTIO_USART1_CS_PORT (gpioPortC)
+#define PORTIO_USART1_CS_LOC (11U)
+
+#define PORTIO_USART1_RX_PIN (7U)
+#define PORTIO_USART1_RX_PORT (gpioPortC)
+#define PORTIO_USART1_RX_LOC (11U)
+
+#define PORTIO_USART1_TX_PIN (6U)
+#define PORTIO_USART1_TX_PORT (gpioPortC)
+#define PORTIO_USART1_TX_LOC (11U)
+
+#define BSP_USART1_MOSI_PIN (6U)
+#define BSP_USART1_MOSI_PORT (gpioPortC)
+#define BSP_USART1_MOSI_LOC (11U)
+
+#define BSP_USART1_MISO_PIN (7U)
+#define BSP_USART1_MISO_PORT (gpioPortC)
+#define BSP_USART1_MISO_LOC (11U)
+
+#define BSP_USART1_CLK_PIN (8U)
+#define BSP_USART1_CLK_PORT (gpioPortC)
+#define BSP_USART1_CLK_LOC (11U)
+
+#define BSP_USART1_CS_PIN (9U)
+#define BSP_USART1_CS_PORT (gpioPortC)
+#define BSP_USART1_CS_LOC (11U)
+
+// [USART1]$
+
+// $[USART2]
+// [USART2]$
+
+// $[VCOM]
+
+#define BSP_VCOM_ENABLE_PIN (5U)
+#define BSP_VCOM_ENABLE_PORT (gpioPortA)
+
+// [VCOM]$
+
+// $[VDAC0]
+// [VDAC0]$
+
+// $[VUART]
+// [VUART]$
+
+// $[WDOG]
+// [WDOG]$
+
+// $[WTIMER0]
+// [WTIMER0]$
+
+#if defined(_SILICON_LABS_MODULE)
+#include "sl_module.h"
+#endif
+
+#endif /* HAL_CONFIG_BOARD_H */
diff --git a/examples/platforms/efr32mg13/crypto/efr32-mbedtls-config.h b/examples/platforms/efr32mg13/crypto/efr32-mbedtls-config.h
new file mode 100644
index 0000000..ba70588
--- /dev/null
+++ b/examples/platforms/efr32mg13/crypto/efr32-mbedtls-config.h
@@ -0,0 +1,92 @@
+/*
+ * Copyright (c) 2020, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef EFR32_MBEDTLS_CONFIG_H
+#define EFR32_MBEDTLS_CONFIG_H
+
+#include "em_device.h"
+
+/**
+ * \def MBEDTLS_AES_ALT
+ *
+ * Enable hardware acceleration for the AES block cipher
+ *
+ * Module: sl_crypto/src/crypto_aes.c for devices with CRYPTO
+ * sl_crypto/src/aes_aes.c for devices with AES
+ *
+ * See MBEDTLS_AES_C for more information.
+ */
+#define MBEDTLS_AES_ALT
+
+/**
+ * \def MBEDTLS_ECP_INTERNAL_ALT
+ * \def ECP_SHORTWEIERSTRASS
+ * \def MBEDTLS_ECP_ADD_MIXED_ALT
+ * \def MBEDTLS_ECP_DOUBLE_JAC_ALT
+ * \def MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT
+ * \def MBEDTLS_ECP_NORMALIZE_JAC_ALT
+ *
+ * Enable hardware acceleration for the elliptic curve over GF(p) library.
+ *
+ * Module: sl_crypto/src/crypto_ecp.c
+ * Caller: library/ecp.c
+ *
+ * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_ECP_C and at least one
+ * MBEDTLS_ECP_DP_XXX_ENABLED and (CRYPTO_COUNT > 0)
+ */
+#if defined(CRYPTO_COUNT) && (CRYPTO_COUNT > 0)
+#define MBEDTLS_ECP_INTERNAL_ALT
+#define ECP_SHORTWEIERSTRASS
+#define MBEDTLS_ECP_ADD_MIXED_ALT
+#define MBEDTLS_ECP_DOUBLE_JAC_ALT
+#define MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT
+#define MBEDTLS_ECP_NORMALIZE_JAC_ALT
+#define MBEDTLS_ECP_RANDOMIZE_JAC_ALT
+#endif
+
+/**
+ * \def MBEDTLS_SHA256_ALT
+ *
+ * Enable hardware acceleration for the SHA-224 and SHA-256 cryptographic
+ * hash algorithms.
+ *
+ * Module: sl_crypto/src/crypto_sha.c
+ * Caller: library/entropy.c
+ * library/mbedtls_md.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ *
+ * Requires: MBEDTLS_SHA256_C and (CRYPTO_COUNT > 0)
+ * See MBEDTLS_SHA256_C for more information.
+ */
+#if defined(CRYPTO_COUNT) && (CRYPTO_COUNT > 0)
+//#define MBEDTLS_SHA256_ALT
+#endif
+
+#endif // EFR32_MBEDTLS_CONFIG_H
diff --git a/examples/platforms/efr32mg13/diag.c b/examples/platforms/efr32mg13/diag.c
new file mode 100644
index 0000000..c28ad6b
--- /dev/null
+++ b/examples/platforms/efr32mg13/diag.c
@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2020, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file implements the OpenThread platform abstraction for the diagnostics.
+ *
+ */
+
+#include <stdbool.h>
+#include <stdio.h>
+#include <string.h>
+#include <sys/time.h>
+
+#include <openthread/config.h>
+#include <openthread/platform/alarm-milli.h>
+#include <openthread/platform/radio.h>
+
+#include "platform-efr32.h"
+
+#if OPENTHREAD_CONFIG_DIAG_ENABLE
+
+/**
+ * Diagnostics mode variables.
+ *
+ */
+static bool sDiagMode = false;
+
+void otPlatDiagProcess(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ OT_UNUSED_VARIABLE(argc);
+
+ // Add more platform specific diagnostics features here.
+ snprintf(aOutput, aOutputMaxLen, "diag feature '%s' is not supported\r\n", argv[0]);
+}
+
+void otPlatDiagModeSet(bool aMode)
+{
+ sDiagMode = aMode;
+}
+
+bool otPlatDiagModeGet()
+{
+ return sDiagMode;
+}
+
+void otPlatDiagChannelSet(uint8_t aChannel)
+{
+ OT_UNUSED_VARIABLE(aChannel);
+}
+
+void otPlatDiagTxPowerSet(int8_t aTxPower)
+{
+ OT_UNUSED_VARIABLE(aTxPower);
+}
+
+void otPlatDiagRadioReceived(otInstance *aInstance, otRadioFrame *aFrame, otError aError)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ OT_UNUSED_VARIABLE(aFrame);
+ OT_UNUSED_VARIABLE(aError);
+}
+
+void otPlatDiagAlarmCallback(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+}
+
+#endif // #if OPENTHREAD_CONFIG_DIAG_ENABLE
diff --git a/examples/platforms/efr32mg13/entropy.c b/examples/platforms/efr32mg13/entropy.c
new file mode 100644
index 0000000..2b196bb
--- /dev/null
+++ b/examples/platforms/efr32mg13/entropy.c
@@ -0,0 +1,109 @@
+/*
+ * Copyright (c) 2020, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file implements an entropy source based on ADC.
+ *
+ */
+
+#include <openthread/platform/entropy.h>
+
+#include "utils/code_utils.h"
+
+#include "em_adc.h"
+#include "em_cmu.h"
+
+enum
+{
+ EFR32_ADC_REF_CLOCK = 7000000,
+};
+
+void efr32RandomInit(void)
+{
+ /* Enable ADC Clock */
+ CMU_ClockEnable(cmuClock_ADC0, true);
+ ADC_Init_TypeDef init = ADC_INIT_DEFAULT;
+ ADC_InitSingle_TypeDef singleInit = ADC_INITSINGLE_DEFAULT;
+
+ /* Initialize the ADC with the required values */
+ init.timebase = ADC_TimebaseCalc(0);
+ init.prescale = ADC_PrescaleCalc(EFR32_ADC_REF_CLOCK, 0);
+ ADC_Init(ADC0, &init);
+
+ /* Initialize for single conversion specific to RNG */
+ singleInit.reference = adcRefVEntropy;
+ singleInit.diff = true;
+ singleInit.posSel = adcPosSelVSS;
+ singleInit.negSel = adcNegSelVSS;
+ ADC_InitSingle(ADC0, &singleInit);
+
+ /* Set VINATT to maximum value and clear FIFO */
+ ADC0->SINGLECTRLX |= _ADC_SINGLECTRLX_VINATT_MASK;
+ ADC0->SINGLEFIFOCLEAR = ADC_SINGLEFIFOCLEAR_SINGLEFIFOCLEAR;
+}
+
+static uint32_t randomUint32Get(void)
+{
+ uint8_t tmp;
+ uint32_t random = 0;
+
+ for (int i = 0; i < 4; i++)
+ {
+ tmp = 0;
+
+ for (int j = 0; j < 3; j++)
+ {
+ ADC_Start(ADC0, adcStartSingle);
+
+ while ((ADC0->IF & ADC_IF_SINGLE) == 0)
+ ;
+
+ tmp |= ((ADC_DataSingleGet(ADC0) & 0x07) << (j * 3));
+ }
+
+ random |= (tmp & 0xff) << (i * 8);
+ }
+
+ return random;
+}
+
+otError otPlatEntropyGet(uint8_t *aOutput, uint16_t aOutputLength)
+{
+ otError error = OT_ERROR_NONE;
+
+ otEXPECT_ACTION(aOutput, error = OT_ERROR_INVALID_ARGS);
+
+ for (uint16_t length = 0; length < aOutputLength; length++)
+ {
+ aOutput[length] = (uint8_t)randomUint32Get();
+ }
+
+exit:
+ return error;
+}
diff --git a/examples/platforms/efr32mg13/fem-control.c b/examples/platforms/efr32mg13/fem-control.c
new file mode 100644
index 0000000..f66415c
--- /dev/null
+++ b/examples/platforms/efr32mg13/fem-control.c
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2020, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "hal-config.h"
+
+#if (HAL_FEM_ENABLE)
+#include "util/plugin/plugin-common/fem-control/fem-control.c"
+#endif
diff --git a/examples/platforms/efr32mg13/flash.c b/examples/platforms/efr32mg13/flash.c
new file mode 100644
index 0000000..b3cafff
--- /dev/null
+++ b/examples/platforms/efr32mg13/flash.c
@@ -0,0 +1,144 @@
+/*
+ * Copyright (c) 2020, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file implements the OpenThread platform abstraction for the non-volatile storage.
+ */
+
+#include <openthread-core-config.h>
+
+#include <openthread/config.h>
+#include <openthread/platform/alarm-milli.h>
+
+#include "utils/code_utils.h"
+#include "utils/flash.h"
+
+#include "em_msc.h"
+
+// clang-format off
+#define FLASH_DATA_END_ADDR (FLASH_BASE + FLASH_SIZE)
+#define FLASH_DATA_START_ADDR (FLASH_DATA_END_ADDR - (FLASH_PAGE_SIZE * SETTINGS_CONFIG_PAGE_NUM))
+// clang-format on
+
+static inline uint32_t mapAddress(uint32_t aAddress)
+{
+ return aAddress + FLASH_DATA_START_ADDR;
+}
+
+static otError returnTypeConvert(int32_t aStatus)
+{
+ otError error = OT_ERROR_NONE;
+
+ switch (aStatus)
+ {
+ case mscReturnOk:
+ error = OT_ERROR_NONE;
+ break;
+
+ case mscReturnInvalidAddr:
+ case mscReturnUnaligned:
+ error = OT_ERROR_INVALID_ARGS;
+ break;
+
+ default:
+ error = OT_ERROR_FAILED;
+ }
+
+ return error;
+}
+
+otError utilsFlashInit(void)
+{
+ MSC_Init();
+ return OT_ERROR_NONE;
+}
+
+uint32_t utilsFlashGetSize(void)
+{
+ return FLASH_DATA_END_ADDR - FLASH_DATA_START_ADDR;
+}
+
+otError utilsFlashErasePage(uint32_t aAddress)
+{
+ int32_t status;
+
+ status = MSC_ErasePage((uint32_t *)mapAddress(aAddress));
+
+ return returnTypeConvert(status);
+}
+
+otError utilsFlashStatusWait(uint32_t aTimeout)
+{
+ otError error = OT_ERROR_BUSY;
+ uint32_t start = otPlatAlarmMilliGetNow();
+
+ do
+ {
+ if (MSC->STATUS & MSC_STATUS_WDATAREADY)
+ {
+ error = OT_ERROR_NONE;
+ break;
+ }
+ } while (aTimeout && ((otPlatAlarmMilliGetNow() - start) < aTimeout));
+
+ return error;
+}
+
+uint32_t utilsFlashWrite(uint32_t aAddress, uint8_t *aData, uint32_t aSize)
+{
+ uint32_t rval = aSize;
+ int32_t status;
+
+ otEXPECT_ACTION(aData, rval = 0);
+ otEXPECT_ACTION(((aAddress + aSize) < utilsFlashGetSize()) && (!(aAddress & 3)) && (!(aSize & 3)), rval = 0);
+
+ status = MSC_WriteWord((uint32_t *)mapAddress(aAddress), aData, aSize);
+ otEXPECT_ACTION(returnTypeConvert(status) == OT_ERROR_NONE, rval = 0);
+
+exit:
+ return rval;
+}
+
+uint32_t utilsFlashRead(uint32_t aAddress, uint8_t *aData, uint32_t aSize)
+{
+ uint32_t rval = aSize;
+ uint32_t pAddress = mapAddress(aAddress);
+ uint8_t *byte = aData;
+
+ otEXPECT_ACTION(aData, rval = 0);
+ otEXPECT_ACTION((aAddress + aSize) < utilsFlashGetSize(), rval = 0);
+
+ while (aSize--)
+ {
+ *byte++ = (*(uint8_t *)(pAddress++));
+ }
+
+exit:
+ return rval;
+}
diff --git a/examples/platforms/efr32mg13/logging.c b/examples/platforms/efr32mg13/logging.c
new file mode 100644
index 0000000..ad873dd
--- /dev/null
+++ b/examples/platforms/efr32mg13/logging.c
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2016, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file logging.c
+ * Platform abstraction for the logging
+ *
+ */
+
+#include <openthread-core-config.h>
+#include <openthread/config.h>
+#include <openthread/platform/alarm-milli.h>
+#include <openthread/platform/logging.h>
+
+#include <utils/logging_rtt.h>
+
+#if (OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED) || \
+ (OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_NCP_SPINEL)
+void efr32LogInit(void)
+{
+ utilsLogRttInit();
+}
+
+void efr32LogDeinit(void)
+{
+ utilsLogRttDeinit();
+}
+
+OT_TOOL_WEAK void otPlatLog(otLogLevel aLogLevel, otLogRegion aLogRegion, const char *aFormat, ...)
+{
+ va_list ap;
+
+ va_start(ap, aFormat);
+
+ utilsLogRttOutput(aLogLevel, aLogRegion, aFormat, ap);
+
+ va_end(ap);
+}
+#endif
diff --git a/examples/platforms/efr32mg13/misc.c b/examples/platforms/efr32mg13/misc.c
new file mode 100644
index 0000000..4b2076f
--- /dev/null
+++ b/examples/platforms/efr32mg13/misc.c
@@ -0,0 +1,98 @@
+/*
+ * Copyright (c) 2020, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file implements the OpenThread platform abstraction for miscellaneous behaviors.
+ */
+
+#include <openthread/platform/misc.h>
+
+#include "em_rmu.h"
+#include "platform-efr32.h"
+
+static uint32_t sResetCause;
+
+void efr32MiscInit(void)
+{
+ // Read the cause of last reset.
+ sResetCause = RMU_ResetCauseGet();
+
+ // Clear the register, as the causes cumulate over resets.
+ RMU_ResetCauseClear();
+}
+
+void otPlatReset(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ NVIC_SystemReset();
+}
+
+otPlatResetReason otPlatGetResetReason(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ otPlatResetReason reason;
+
+ if (sResetCause & RMU_RSTCAUSE_PORST)
+ {
+ reason = OT_PLAT_RESET_REASON_POWER_ON;
+ }
+ else if (sResetCause & RMU_RSTCAUSE_SYSREQRST)
+ {
+ reason = OT_PLAT_RESET_REASON_SOFTWARE;
+ }
+ else if (sResetCause & RMU_RSTCAUSE_WDOGRST)
+ {
+ reason = OT_PLAT_RESET_REASON_WATCHDOG;
+ }
+ else if (sResetCause & RMU_RSTCAUSE_EXTRST)
+ {
+ reason = OT_PLAT_RESET_REASON_EXTERNAL;
+ }
+ else if (sResetCause & RMU_RSTCAUSE_LOCKUPRST)
+ {
+ reason = OT_PLAT_RESET_REASON_FAULT;
+ }
+ else if ((sResetCause & RMU_RSTCAUSE_AVDDBOD) || (sResetCause & RMU_RSTCAUSE_DECBOD) ||
+ (sResetCause & RMU_RSTCAUSE_DVDDBOD) || (sResetCause & RMU_RSTCAUSE_EM4RST))
+ {
+ reason = OT_PLAT_RESET_REASON_ASSERT;
+ }
+ else
+ {
+ reason = OT_PLAT_RESET_REASON_UNKNOWN;
+ }
+
+ return reason;
+}
+
+void otPlatWakeHost(void)
+{
+ // TODO: implement an operation to wake the host from sleep state.
+}
diff --git a/examples/platforms/efr32mg13/openthread-core-efr32-config-check.h b/examples/platforms/efr32mg13/openthread-core-efr32-config-check.h
new file mode 100644
index 0000000..a6bfb62
--- /dev/null
+++ b/examples/platforms/efr32mg13/openthread-core-efr32-config-check.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2020, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef OPENTHREAD_CORE_EFR32_CONFIG_CHECK_H_
+#define OPENTHREAD_CORE_EFR32_CONFIG_CHECK_H_
+
+#include "board_config.h"
+
+#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
+#error "Platform efr32mg13 doesn't support configuration option: OPENTHREAD_CONFIG_TIME_SYNC_ENABLE"
+#endif
+
+#ifndef RADIO_CONFIG_915MHZ_OQPSK_SUPPORT
+#if OPENTHREAD_CONFIG_RADIO_915MHZ_OQPSK_SUPPORT
+#error "Platform efr32mg13 not configured to support configuration option: OPENTHREAD_CONFIG_RADIO_915MHZ_OQPSK_SUPPORT"
+#endif
+#endif
+
+#endif /* OPENTHREAD_CORE_EFR32_CONFIG_CHECK_H_ */
diff --git a/examples/platforms/efr32mg13/openthread-core-efr32-config.h b/examples/platforms/efr32mg13/openthread-core-efr32-config.h
new file mode 100644
index 0000000..c7920f7
--- /dev/null
+++ b/examples/platforms/efr32mg13/openthread-core-efr32-config.h
@@ -0,0 +1,154 @@
+/*
+ * Copyright (c) 2020, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file includes efr32 compile-time configuration constants
+ * for OpenThread.
+ */
+
+#include "board_config.h"
+#include "em_msc.h"
+
+#ifndef OPENTHREAD_CORE_EFR32_CONFIG_H_
+#define OPENTHREAD_CORE_EFR32_CONFIG_H_
+
+/**
+ * @def OPENTHREAD_CONFIG_LOG_OUTPUT
+ *
+ * The efr32 platform provides an otPlatLog() function.
+ */
+#ifndef OPENTHREAD_CONFIG_LOG_OUTPUT /* allow command line override */
+#define OPENTHREAD_CONFIG_LOG_OUTPUT OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED
+#endif
+
+/*
+ * @def OPENTHREAD_CONFIG_RADIO_915MHZ_OQPSK_SUPPORT
+ *
+ * Define to 1 if you want to enable physical layer to support OQPSK modulation in 915MHz band.
+ *
+ */
+#ifdef RADIO_CONFIG_915MHZ_OQPSK_SUPPORT
+#define OPENTHREAD_CONFIG_RADIO_915MHZ_OQPSK_SUPPORT 1
+#else
+#define OPENTHREAD_CONFIG_RADIO_915MHZ_OQPSK_SUPPORT 0
+#endif
+
+/*
+ * @def OPENTHREAD_CONFIG_RADIO_2P4GHZ_OQPSK_SUPPORT
+ *
+ * Define to 1 if you want to enable physical layer to support OQPSK modulation in 2.4GHz band.
+ *
+ */
+#ifdef RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT
+#define OPENTHREAD_CONFIG_RADIO_2P4GHZ_OQPSK_SUPPORT 1
+#else
+#define OPENTHREAD_CONFIG_RADIO_2P4GHZ_OQPSK_SUPPORT 0
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_PLATFORM_INFO
+ *
+ * The platform-specific string to insert into the OpenThread version string.
+ *
+ */
+#define OPENTHREAD_CONFIG_PLATFORM_INFO "EFR32"
+
+/*
+ * @def OPENTHREAD_CONFIG_SOFTWARE_RETRANSMIT_ENABLE
+ *
+ * Define to 1 if you want to enable software retransmission logic.
+ *
+ */
+#define OPENTHREAD_CONFIG_SOFTWARE_RETRANSMIT_ENABLE 1
+
+/**
+ * @def OPENTHREAD_CONFIG_SOFTWARE_CSMA_BACKOFF_ENABLE
+ *
+ * Define to 1 if you want to enable software CSMA-CA backoff logic.
+ *
+ */
+#define OPENTHREAD_CONFIG_SOFTWARE_CSMA_BACKOFF_ENABLE 1
+
+/**
+ * @def OPENTHREAD_CONFIG_SOFTWARE_ENERGY_SCAN_ENABLE
+ *
+ * Define to 1 if you want to enable software energy scanning logic.
+ *
+ */
+#define OPENTHREAD_CONFIG_SOFTWARE_ENERGY_SCAN_ENABLE 1
+
+/**
+ * @def SETTINGS_CONFIG_BASE_ADDRESS
+ *
+ * The base address of settings.
+ *
+ */
+#define SETTINGS_CONFIG_BASE_ADDRESS 0
+
+/**
+ * @def SETTINGS_CONFIG_PAGE_SIZE
+ *
+ * The page size of settings.
+ *
+ */
+#define SETTINGS_CONFIG_PAGE_SIZE FLASH_PAGE_SIZE
+
+/**
+ * @def SETTINGS_CONFIG_PAGE_NUM
+ *
+ * The page number of settings.
+ *
+ */
+#define SETTINGS_CONFIG_PAGE_NUM 4
+
+/**
+ * @def RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM
+ *
+ * The number of short source address table entries.
+ *
+ */
+#define RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM 6
+
+/**
+ * @def RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM
+ *
+ * The number of extended source address table entries.
+ *
+ */
+#define RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM 6
+
+/**
+ * @def OPENTHREAD_CONFIG_NCP_UART_ENABLE
+ *
+ * Define to 1 to enable NCP UART support.
+ *
+ */
+#define OPENTHREAD_CONFIG_NCP_UART_ENABLE 1
+
+#endif // OPENTHREAD_CORE_EFR32_CONFIG_H_
diff --git a/examples/platforms/efr32mg13/platform-band.h b/examples/platforms/efr32mg13/platform-band.h
new file mode 100644
index 0000000..7c4d912
--- /dev/null
+++ b/examples/platforms/efr32mg13/platform-band.h
@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2020, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file defines the frequency band configuration structure for efr32.
+ *
+ */
+
+#ifndef PLATFORM_BAND_H_
+#define PLATFORM_BAND_H_
+
+#include <openthread/platform/radio.h>
+
+#include "rail.h"
+#include "rail_config.h"
+#include "rail_ieee802154.h"
+
+#define RAIL_TX_FIFO_SIZE (OT_RADIO_FRAME_MAX_SIZE + 1)
+
+#define RADIO_SCHEDULER_BACKGROUND_RX_PRIORITY 255
+#define RADIO_SCHEDULER_CHANNEL_SCAN_PRIORITY 255
+#define RADIO_SCHEDULER_CHANNEL_SLIP_TIME 500000UL
+#define RADIO_SCHEDULER_TX_PRIORITY 100
+#define RADIO_SCHEDULER_TX_SLIP_TIME 500000UL
+
+#define RADIO_TIMING_CSMA_OVERHEAD_US 500
+#define RADIO_TIMING_DEFAULT_BYTETIME_US 32 // only used if RAIL_GetBitRate returns 0
+#define RADIO_TIMING_DEFAULT_SYMBOLTIME_US 16 // only used if RAIL_GetSymbolRate returns 0
+
+typedef struct efr32RadioCounters
+{
+ uint64_t mRailPlatTxTriggered;
+ uint64_t mRailPlatRadioReceiveDoneCbCount;
+ uint64_t mRailPlatRadioEnergyScanDoneCbCount;
+ uint64_t mRailPlatRadioTxDoneCbCount;
+ uint64_t mRailTxStarted;
+ uint64_t mRailTxStartFailed;
+ uint64_t mRailEventConfigScheduled;
+ uint64_t mRailEventConfigUnScheduled;
+ uint64_t mRailEventPacketSent;
+ uint64_t mRailEventChannelBusy;
+ uint64_t mRailEventEnergyScanCompleted;
+ uint64_t mRailEventCalNeeded;
+ uint64_t mRailEventPacketReceived;
+ uint64_t mRailEventNoAck;
+ uint64_t mRailEventTxAbort;
+ uint64_t mRailEventSchedulerStatusError;
+ uint64_t mRailEventsSchedulerStatusTransmitBusy;
+ uint32_t mRailEventsSchedulerStatusLastStatus;
+} efr32RadioCounters;
+
+typedef struct efr32CommonConfig
+{
+ RAIL_Config_t mRailConfig;
+#if RADIO_CONFIG_DMP_SUPPORT
+ RAILSched_Config_t railSchedState;
+#endif
+ uint8_t
+ mRailTxFifo[RAIL_TX_FIFO_SIZE]; // must be 2 power between 64 and 4096, and bigger than OT_RADIO_FRAME_MAX_SIZE
+} efr32CommonConfig;
+
+typedef struct efr32BandConfig
+{
+ const RAIL_ChannelConfig_t *mChannelConfig;
+ uint8_t mChannelMin;
+ uint8_t mChannelMax;
+} efr32BandConfig;
+
+#endif // PLATFORM_BAND_H_
diff --git a/examples/platforms/efr32mg13/platform-efr32.h b/examples/platforms/efr32mg13/platform-efr32.h
new file mode 100644
index 0000000..5ec48e2
--- /dev/null
+++ b/examples/platforms/efr32mg13/platform-efr32.h
@@ -0,0 +1,138 @@
+/*
+ * Copyright (c) 2020, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file includes the platform-specific initializers.
+ *
+ */
+
+#ifndef PLATFORM_EFR32_H_
+#define PLATFORM_EFR32_H_
+
+#include <openthread/instance.h>
+
+#include "em_device.h"
+#include "em_system.h"
+
+#include "core_cm4.h"
+#include "rail.h"
+
+// Global OpenThread instance structure
+extern otInstance *sInstance;
+
+// Global reference to rail handle
+extern RAIL_Handle_t gRailHandle;
+
+/**
+ * This function initializes the alarm service used by OpenThread.
+ *
+ */
+void efr32AlarmInit(void);
+
+/**
+ * This function performs alarm driver processing.
+ *
+ * @param[in] aInstance The OpenThread instance structure.
+ *
+ */
+void efr32AlarmProcess(otInstance *aInstance);
+
+/**
+ * This function initializes the radio service used by OpenThead.
+ *
+ */
+void efr32RadioInit(void);
+
+/**
+ * This function deinitializes the radio service used by OpenThead.
+ *
+ */
+void efr32RadioDeinit(void);
+
+/**
+ * This function performs radio driver processing.
+ *
+ * @param[in] aInstance The OpenThread instance structure.
+ *
+ */
+void efr32RadioProcess(otInstance *aInstance);
+
+/**
+ * This function performs UART driver processing.
+ *
+ */
+void efr32UartProcess(void);
+
+/**
+ * Initialization of Misc module.
+ *
+ */
+void efr32MiscInit(void);
+
+/**
+ * Initialization of ADC module for random number generator.
+ *
+ */
+void efr32RandomInit(void);
+
+/**
+ * Initialization of Logger driver.
+ *
+ */
+void efr32LogInit(void);
+
+/**
+ * Deinitialization of Logger driver.
+ *
+ */
+void efr32LogDeinit(void);
+
+/**
+ * Registers the sleep callback handler. The callback is used to check that
+ * the application has no work pending and that it is safe to put the EFR32
+ * into a low energy sleep mode.
+ *
+ * The callback should return true if it is ok to enter sleep mode. Note
+ * that the callback itself is run with interrupts disabled and so should
+ * be kept as short as possible. Anny interrupt including those from timers
+ * will wake the EFR32 out of sleep mode.
+ *
+ * @param[in] aCallback Callback function.
+ *
+ */
+void efr32SetSleepCallback(bool (*aCallback)(void));
+
+/**
+ * Put the EFR32 into a low power mode. Before sleeping it will call a callback
+ * in the application registered with efr32SetSleepCallback to ensure that there
+ * is no outstanding work in the application to do.
+ */
+void efr32Sleep(void);
+
+#endif // PLATFORM_EFR32_H_
diff --git a/examples/platforms/efr32mg13/radio.c b/examples/platforms/efr32mg13/radio.c
new file mode 100644
index 0000000..c1e6cc2
--- /dev/null
+++ b/examples/platforms/efr32mg13/radio.c
@@ -0,0 +1,1062 @@
+/*
+ * Copyright (c) 2020, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file implements the OpenThread platform abstraction for radio communication.
+ *
+ */
+
+#include <assert.h>
+
+#include "openthread-system.h"
+#include <openthread/config.h>
+#include <openthread/platform/alarm-milli.h>
+#include <openthread/platform/diag.h>
+#include <openthread/platform/radio.h>
+
+#include "common/logging.hpp"
+#include "utils/code_utils.h"
+
+#include "utils/soft_source_match_table.h"
+
+#include "board_config.h"
+#include "em_cmu.h"
+#include "em_core.h"
+#include "em_system.h"
+#include "hal-config.h"
+#include "openthread-core-efr32-config.h"
+#include "pa_conversions_efr32.h"
+#include "platform-band.h"
+#include "rail.h"
+#include "rail_config.h"
+#include "rail_ieee802154.h"
+
+enum
+{
+ IEEE802154_MIN_LENGTH = 5,
+ IEEE802154_MAX_LENGTH = 127,
+ IEEE802154_ACK_LENGTH = 5,
+ IEEE802154_FRAME_TYPE_MASK = 0x7,
+ IEEE802154_FRAME_TYPE_ACK = 0x2,
+ IEEE802154_FRAME_PENDING = 1 << 4,
+ IEEE802154_ACK_REQUEST = 1 << 5,
+ IEEE802154_DSN_OFFSET = 2,
+};
+
+enum
+{
+ EFR32_RECEIVE_SENSITIVITY = -100, // dBm
+ EFR32_RSSI_AVERAGING_TIMEOUT = 300, // us
+};
+
+enum
+{
+ EFR32_SCHEDULER_SAMPLE_RSSI_PRIORITY = 10, // High priority
+ EFR32_SCHEDULER_TX_PRIORITY = 10, // High priority
+ EFR32_SCHEDULER_RX_PRIORITY = 20, // Low priority
+};
+
+enum
+{
+#if RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT && RADIO_CONFIG_915MHZ_OQPSK_SUPPORT
+ EFR32_NUM_BAND_CONFIGS = 2,
+#else
+ EFR32_NUM_BAND_CONFIGS = 1,
+#endif
+};
+
+typedef enum
+{
+ ENERGY_SCAN_STATUS_IDLE,
+ ENERGY_SCAN_STATUS_IN_PROGRESS,
+ ENERGY_SCAN_STATUS_COMPLETED
+} energyScanStatus;
+
+typedef enum
+{
+ ENERGY_SCAN_MODE_SYNC,
+ ENERGY_SCAN_MODE_ASYNC
+} energyScanMode;
+
+RAIL_Handle_t gRailHandle;
+
+static volatile bool sTransmitBusy = false;
+static bool sPromiscuous = false;
+static bool sIsSrcMatchEnabled = false;
+static otRadioState sState = OT_RADIO_STATE_DISABLED;
+
+static uint8_t sReceivePsdu[IEEE802154_MAX_LENGTH];
+static otRadioFrame sReceiveFrame;
+static otError sReceiveError;
+
+static otRadioFrame sTransmitFrame;
+static uint8_t sTransmitPsdu[IEEE802154_MAX_LENGTH];
+static volatile otError sTransmitError;
+
+static efr32CommonConfig sCommonConfig;
+static efr32BandConfig sBandConfigs[EFR32_NUM_BAND_CONFIGS];
+
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+static efr32RadioCounters sRailDebugCounters;
+#endif
+
+static volatile energyScanStatus sEnergyScanStatus;
+static volatile int8_t sEnergyScanResultDbm;
+static energyScanMode sEnergyScanMode;
+
+#define QUARTER_DBM_IN_DBM 4
+#define US_IN_MS 1000
+
+static void RAILCb_Generic(RAIL_Handle_t aRailHandle, RAIL_Events_t aEvents);
+
+static const RAIL_IEEE802154_Config_t sRailIeee802154Config = {
+ .addresses = NULL,
+ .ackConfig =
+ {
+ .enable = true,
+ .ackTimeout = 894,
+ .rxTransitions =
+ {
+ .success = RAIL_RF_STATE_RX,
+ .error = RAIL_RF_STATE_RX,
+ },
+ .txTransitions =
+ {
+ .success = RAIL_RF_STATE_RX,
+ .error = RAIL_RF_STATE_RX,
+ },
+ },
+ .timings =
+ {
+ .idleToRx = 100,
+ .txToRx = 192 - 10,
+ .idleToTx = 100,
+ .rxToTx = 192,
+ .rxSearchTimeout = 0,
+ .txToRxSearchTimeout = 0,
+ },
+ .framesMask = RAIL_IEEE802154_ACCEPT_STANDARD_FRAMES,
+ .promiscuousMode = false,
+ .isPanCoordinator = false,
+};
+
+RAIL_DECLARE_TX_POWER_VBAT_CURVES(piecewiseSegments, curvesSg, curves24Hp, curves24Lp);
+
+static int8_t sTxPowerDbm = OPENTHREAD_CONFIG_DEFAULT_TRANSMIT_POWER;
+
+static efr32BandConfig *sCurrentBandConfig = NULL;
+
+static RAIL_Handle_t efr32RailInit(efr32CommonConfig *aCommonConfig)
+{
+ RAIL_Status_t status;
+ RAIL_Handle_t handle;
+
+ handle = RAIL_Init(&aCommonConfig->mRailConfig, NULL);
+ assert(handle != NULL);
+
+ status = RAIL_ConfigCal(handle, RAIL_CAL_ALL);
+ assert(status == RAIL_STATUS_NO_ERROR);
+
+ status = RAIL_IEEE802154_Init(handle, &sRailIeee802154Config);
+ assert(status == RAIL_STATUS_NO_ERROR);
+
+ status = RAIL_ConfigEvents(handle, RAIL_EVENTS_ALL,
+ RAIL_EVENT_RX_ACK_TIMEOUT | //
+ RAIL_EVENTS_TX_COMPLETION | //
+ RAIL_EVENT_RX_PACKET_RECEIVED | //
+ RAIL_EVENT_RSSI_AVERAGE_DONE | //
+ RAIL_EVENT_IEEE802154_DATA_REQUEST_COMMAND | //
+ RAIL_EVENT_CAL_NEEDED | //
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ RAIL_EVENT_CONFIG_SCHEDULED | //
+ RAIL_EVENT_CONFIG_UNSCHEDULED | //
+#endif
+ RAIL_EVENT_SCHEDULER_STATUS //
+ );
+ assert(status == RAIL_STATUS_NO_ERROR);
+
+ uint16_t actualLenth = RAIL_SetTxFifo(handle, aCommonConfig->mRailTxFifo, 0, sizeof(aCommonConfig->mRailTxFifo));
+ assert(actualLenth == sizeof(aCommonConfig->mRailTxFifo));
+
+ return handle;
+}
+
+static void efr32RailConfigLoad(efr32BandConfig *aBandConfig)
+{
+ RAIL_Status_t status;
+#if HAL_PA_2P4_LOWPOWER == 1
+ RAIL_TxPowerConfig_t txPowerConfig = {RAIL_TX_POWER_MODE_2P4_LP, BSP_PA_VOLTAGE, 10};
+#else
+ RAIL_TxPowerConfig_t txPowerConfig = {RAIL_TX_POWER_MODE_2P4_HP, BSP_PA_VOLTAGE, 10};
+#endif
+ if (aBandConfig->mChannelConfig != NULL)
+ {
+ uint16_t firstChannel = RAIL_ConfigChannels(gRailHandle, aBandConfig->mChannelConfig, NULL);
+ assert(firstChannel == aBandConfig->mChannelMin);
+
+ txPowerConfig.mode = RAIL_TX_POWER_MODE_SUBGIG;
+ }
+ else
+ {
+ status = RAIL_IEEE802154_Config2p4GHzRadio(gRailHandle);
+ assert(status == RAIL_STATUS_NO_ERROR);
+ }
+ status = RAIL_ConfigTxPower(gRailHandle, &txPowerConfig);
+ assert(status == RAIL_STATUS_NO_ERROR);
+}
+
+static void efr32RadioSetTxPower(int8_t aPowerDbm)
+{
+ RAIL_Status_t status;
+ RAIL_TxPowerCurvesConfig_t txPowerCurvesConfig = {curves24Hp, curvesSg, curves24Lp, piecewiseSegments};
+
+ status = RAIL_InitTxPowerCurves(&txPowerCurvesConfig);
+ assert(status == RAIL_STATUS_NO_ERROR);
+
+ status = RAIL_SetTxPowerDbm(gRailHandle, ((RAIL_TxPower_t)aPowerDbm) * 10);
+ assert(status == RAIL_STATUS_NO_ERROR);
+}
+
+static efr32BandConfig *efr32RadioGetBandConfig(uint8_t aChannel)
+{
+ efr32BandConfig *config = NULL;
+
+ for (uint8_t i = 0; i < EFR32_NUM_BAND_CONFIGS; i++)
+ {
+ if ((sBandConfigs[i].mChannelMin <= aChannel) && (aChannel <= sBandConfigs[i].mChannelMax))
+ {
+ config = &sBandConfigs[i];
+ break;
+ }
+ }
+
+ return config;
+}
+
+static void efr32ConfigInit(void (*aEventCallback)(RAIL_Handle_t railHandle, RAIL_Events_t events))
+{
+ sCommonConfig.mRailConfig.eventsCallback = aEventCallback;
+ sCommonConfig.mRailConfig.protocol = NULL; // only used by Bluetooth stack
+#if RADIO_CONFIG_DMP_SUPPORT
+ sCommonConfig.mRailConfig.scheduler = &(sCommonConfig.railSchedState);
+#else
+ sCommonConfig.mRailConfig.scheduler = NULL; // only needed for DMP
+#endif
+
+ uint8_t index = 0;
+
+#if RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT
+ sBandConfigs[index].mChannelConfig = NULL;
+ sBandConfigs[index].mChannelMin = OT_RADIO_2P4GHZ_OQPSK_CHANNEL_MIN;
+ sBandConfigs[index].mChannelMax = OT_RADIO_2P4GHZ_OQPSK_CHANNEL_MAX;
+
+ index++;
+#endif
+
+#if RADIO_CONFIG_915MHZ_OQPSK_SUPPORT
+ sBandConfigs[index].mChannelConfig = channelConfigs[0];
+ sBandConfigs[index].mChannelMin = OT_RADIO_915MHZ_OQPSK_CHANNEL_MIN;
+ sBandConfigs[index].mChannelMax = OT_RADIO_915MHZ_OQPSK_CHANNEL_MAX;
+#endif
+
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ memset(&sRailDebugCounters, 0x00, sizeof(efr32RadioCounters));
+#endif
+
+ gRailHandle = efr32RailInit(&sCommonConfig);
+ assert(gRailHandle != NULL);
+ efr32RailConfigLoad(&(sBandConfigs[0]));
+}
+
+void efr32RadioInit(void)
+{
+ RAIL_Status_t status;
+
+ // check if RAIL_TX_FIFO_SIZE is power of two..
+ assert((RAIL_TX_FIFO_SIZE & (RAIL_TX_FIFO_SIZE - 1)) == 0);
+
+ // check the limits of the RAIL_TX_FIFO_SIZE.
+ assert((RAIL_TX_FIFO_SIZE >= 64) || (RAIL_TX_FIFO_SIZE <= 4096));
+
+ efr32ConfigInit(RAILCb_Generic);
+
+ CMU_ClockEnable(cmuClock_PRS, true);
+
+ status = RAIL_ConfigSleep(gRailHandle, RAIL_SLEEP_CONFIG_TIMERSYNC_ENABLED);
+ assert(status == RAIL_STATUS_NO_ERROR);
+
+ sReceiveFrame.mLength = 0;
+ sReceiveFrame.mPsdu = sReceivePsdu;
+ sTransmitFrame.mLength = 0;
+ sTransmitFrame.mPsdu = sTransmitPsdu;
+
+ sCurrentBandConfig = efr32RadioGetBandConfig(OPENTHREAD_CONFIG_DEFAULT_CHANNEL);
+ assert(sCurrentBandConfig != NULL);
+
+ efr32RadioSetTxPower(sTxPowerDbm);
+
+ sEnergyScanStatus = ENERGY_SCAN_STATUS_IDLE;
+ sTransmitError = OT_ERROR_NONE;
+ sTransmitBusy = false;
+
+ otLogInfoPlat("Initialized", NULL);
+}
+
+void efr32RadioDeinit(void)
+{
+ RAIL_Status_t status;
+
+ RAIL_Idle(gRailHandle, RAIL_IDLE_ABORT, true);
+ status = RAIL_ConfigEvents(gRailHandle, RAIL_EVENTS_ALL, 0);
+ assert(status == RAIL_STATUS_NO_ERROR);
+
+ sCurrentBandConfig = NULL;
+}
+
+static otError efr32StartEnergyScan(energyScanMode aMode, uint16_t aChannel, RAIL_Time_t aAveragingTimeUs)
+{
+ RAIL_Status_t status;
+ otError error = OT_ERROR_NONE;
+ efr32BandConfig *config = NULL;
+
+ otEXPECT_ACTION(sEnergyScanStatus == ENERGY_SCAN_STATUS_IDLE, error = OT_ERROR_BUSY);
+
+ sEnergyScanStatus = ENERGY_SCAN_STATUS_IN_PROGRESS;
+ sEnergyScanMode = aMode;
+
+ RAIL_Idle(gRailHandle, RAIL_IDLE, true);
+
+ config = efr32RadioGetBandConfig(aChannel);
+ otEXPECT_ACTION(config != NULL, error = OT_ERROR_INVALID_ARGS);
+
+ if (sCurrentBandConfig != config)
+ {
+ efr32RailConfigLoad(config);
+ sCurrentBandConfig = config;
+ }
+
+ RAIL_SchedulerInfo_t scanSchedulerInfo = {.priority = RADIO_SCHEDULER_CHANNEL_SCAN_PRIORITY,
+ .slipTime = RADIO_SCHEDULER_CHANNEL_SLIP_TIME,
+ .transactionTime = aAveragingTimeUs};
+
+ status = RAIL_StartAverageRssi(gRailHandle, aChannel, aAveragingTimeUs, &scanSchedulerInfo);
+ otEXPECT_ACTION(status == RAIL_STATUS_NO_ERROR, error = OT_ERROR_FAILED);
+
+exit:
+ return error;
+}
+
+void otPlatRadioGetIeeeEui64(otInstance *aInstance, uint8_t *aIeeeEui64)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ uint64_t eui64;
+ uint8_t *eui64Ptr = NULL;
+
+ eui64 = SYSTEM_GetUnique();
+ eui64Ptr = (uint8_t *)&eui64;
+
+ for (uint8_t i = 0; i < OT_EXT_ADDRESS_SIZE; i++)
+ {
+ aIeeeEui64[i] = eui64Ptr[(OT_EXT_ADDRESS_SIZE - 1) - i];
+ }
+}
+
+void otPlatRadioSetPanId(otInstance *aInstance, uint16_t aPanId)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ RAIL_Status_t status;
+
+ otLogInfoPlat("PANID=%X", aPanId);
+
+ utilsSoftSrcMatchSetPanId(aPanId);
+
+ for (uint8_t i = 0; i < EFR32_NUM_BAND_CONFIGS; i++)
+ {
+ status = RAIL_IEEE802154_SetPanId(gRailHandle, aPanId, 0);
+ assert(status == RAIL_STATUS_NO_ERROR);
+ }
+}
+
+void otPlatRadioSetExtendedAddress(otInstance *aInstance, const otExtAddress *aAddress)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ RAIL_Status_t status;
+
+ otLogInfoPlat("ExtAddr=%X%X%X%X%X%X%X%X", aAddress->m8[7], aAddress->m8[6], aAddress->m8[5], aAddress->m8[4],
+ aAddress->m8[3], aAddress->m8[2], aAddress->m8[1], aAddress->m8[0]);
+
+ for (uint8_t i = 0; i < EFR32_NUM_BAND_CONFIGS; i++)
+ {
+ status = RAIL_IEEE802154_SetLongAddress(gRailHandle, (uint8_t *)aAddress->m8, 0);
+ assert(status == RAIL_STATUS_NO_ERROR);
+ }
+}
+
+void otPlatRadioSetShortAddress(otInstance *aInstance, uint16_t aAddress)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ RAIL_Status_t status;
+
+ otLogInfoPlat("ShortAddr=%X", aAddress);
+
+ for (uint8_t i = 0; i < EFR32_NUM_BAND_CONFIGS; i++)
+ {
+ status = RAIL_IEEE802154_SetShortAddress(gRailHandle, aAddress, 0);
+ assert(status == RAIL_STATUS_NO_ERROR);
+ }
+}
+
+bool otPlatRadioIsEnabled(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ return (sState != OT_RADIO_STATE_DISABLED);
+}
+
+otError otPlatRadioEnable(otInstance *aInstance)
+{
+ otEXPECT(!otPlatRadioIsEnabled(aInstance));
+
+ otLogInfoPlat("State=OT_RADIO_STATE_SLEEP", NULL);
+ sState = OT_RADIO_STATE_SLEEP;
+
+exit:
+ return OT_ERROR_NONE;
+}
+
+otError otPlatRadioDisable(otInstance *aInstance)
+{
+ otEXPECT(otPlatRadioIsEnabled(aInstance));
+
+ otLogInfoPlat("State=OT_RADIO_STATE_DISABLED", NULL);
+ sState = OT_RADIO_STATE_DISABLED;
+
+exit:
+ return OT_ERROR_NONE;
+}
+
+otError otPlatRadioSleep(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ otError error = OT_ERROR_NONE;
+
+ otEXPECT_ACTION((sState != OT_RADIO_STATE_TRANSMIT) && (sState != OT_RADIO_STATE_DISABLED),
+ error = OT_ERROR_INVALID_STATE);
+
+ otLogInfoPlat("State=OT_RADIO_STATE_SLEEP", NULL);
+
+ RAIL_Idle(gRailHandle, RAIL_IDLE_ABORT, true); // abort packages under reception
+ sState = OT_RADIO_STATE_SLEEP;
+
+exit:
+ return error;
+}
+
+otError otPlatRadioReceive(otInstance *aInstance, uint8_t aChannel)
+{
+ otError error = OT_ERROR_NONE;
+ RAIL_Status_t status;
+ efr32BandConfig *config;
+
+ OT_UNUSED_VARIABLE(aInstance);
+ otEXPECT_ACTION(sState != OT_RADIO_STATE_DISABLED, error = OT_ERROR_INVALID_STATE);
+
+ config = efr32RadioGetBandConfig(aChannel);
+ otEXPECT_ACTION(config != NULL, error = OT_ERROR_INVALID_ARGS);
+
+ if (sCurrentBandConfig != config)
+ {
+ RAIL_Idle(gRailHandle, RAIL_IDLE_ABORT, true);
+ efr32RailConfigLoad(config);
+ sCurrentBandConfig = config;
+ }
+
+ RAIL_SchedulerInfo_t bgRxSchedulerInfo = {
+ .priority = RADIO_SCHEDULER_BACKGROUND_RX_PRIORITY,
+ // sliptime/transaction time is not used for bg rx
+ };
+
+ status = RAIL_StartRx(gRailHandle, aChannel, &bgRxSchedulerInfo);
+ otEXPECT_ACTION(status == RAIL_STATUS_NO_ERROR, error = OT_ERROR_FAILED);
+
+ otLogInfoPlat("State=OT_RADIO_STATE_RECEIVE", NULL);
+ sState = OT_RADIO_STATE_RECEIVE;
+ sReceiveFrame.mChannel = aChannel;
+
+exit:
+ return error;
+}
+
+otError otPlatRadioTransmit(otInstance *aInstance, otRadioFrame *aFrame)
+{
+ otError error = OT_ERROR_NONE;
+ RAIL_CsmaConfig_t csmaConfig = RAIL_CSMA_CONFIG_802_15_4_2003_2p4_GHz_OQPSK_CSMA;
+ RAIL_TxOptions_t txOptions = RAIL_TX_OPTIONS_DEFAULT;
+ efr32BandConfig * config;
+ RAIL_Status_t status;
+ uint8_t frameLength;
+
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailPlatTxTriggered++;
+#endif
+
+ assert(sTransmitBusy == false);
+
+ otEXPECT_ACTION((sState != OT_RADIO_STATE_DISABLED) && (sState != OT_RADIO_STATE_TRANSMIT),
+ error = OT_ERROR_INVALID_STATE);
+
+ config = efr32RadioGetBandConfig(aFrame->mChannel);
+ otEXPECT_ACTION(config != NULL, error = OT_ERROR_INVALID_ARGS);
+
+ sState = OT_RADIO_STATE_TRANSMIT;
+ sTransmitError = OT_ERROR_NONE;
+ sTransmitBusy = true;
+
+ if (sCurrentBandConfig != config)
+ {
+ RAIL_Idle(gRailHandle, RAIL_IDLE_ABORT, true);
+ efr32RailConfigLoad(config);
+ sCurrentBandConfig = config;
+ }
+
+ frameLength = (uint8_t)aFrame->mLength;
+ RAIL_WriteTxFifo(gRailHandle, &frameLength, sizeof frameLength, true);
+ RAIL_WriteTxFifo(gRailHandle, aFrame->mPsdu, frameLength - 2, false);
+
+ RAIL_SchedulerInfo_t txSchedulerInfo = {
+ .priority = RADIO_SCHEDULER_TX_PRIORITY,
+ .slipTime = RADIO_SCHEDULER_CHANNEL_SLIP_TIME,
+ .transactionTime = 0, // will be calculated later if DMP is used
+ };
+
+ if (aFrame->mPsdu[0] & IEEE802154_ACK_REQUEST)
+ {
+ txOptions |= RAIL_TX_OPTION_WAIT_FOR_ACK;
+
+#if RADIO_CONFIG_DMP_SUPPORT
+ // time we wait for ACK
+ if (RAIL_GetSymbolRate(gRailHandle) > 0)
+ {
+ txSchedulerInfo.transactionTime += 12 * 1e6 / RAIL_GetSymbolRate(gRailHandle);
+ }
+ else
+ {
+ txSchedulerInfo.transactionTime += 12 * RADIO_TIMING_DEFAULT_SYMBOLTIME_US;
+ }
+#endif
+ }
+
+#if RADIO_CONFIG_DMP_SUPPORT
+ // time needed for the frame itself
+ // 4B preamble, 1B SFD, 1B PHR is not counted in frameLength
+ if (RAIL_GetBitRate(gRailHandle) > 0)
+ {
+ txSchedulerInfo.transactionTime = (frameLength + 4 + 1 + 1) * 8 * 1e6 / RAIL_GetBitRate(gRailHandle);
+ }
+ else
+ { // assume 250kbps
+ txSchedulerInfo.transactionTime = (frameLength + 4 + 1 + 1) * RADIO_TIMING_DEFAULT_BYTETIME_US;
+ }
+#endif
+
+ if (aFrame->mInfo.mTxInfo.mCsmaCaEnabled)
+ {
+#if RADIO_CONFIG_DMP_SUPPORT
+ // time needed for CSMA/CA
+ txSchedulerInfo.transactionTime += RADIO_TIMING_CSMA_OVERHEAD_US;
+#endif
+ status = RAIL_StartCcaCsmaTx(gRailHandle, aFrame->mChannel, txOptions, &csmaConfig, &txSchedulerInfo);
+ }
+ else
+ {
+ status = RAIL_StartTx(gRailHandle, aFrame->mChannel, txOptions, &txSchedulerInfo);
+ }
+
+ if (status == RAIL_STATUS_NO_ERROR)
+ {
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailTxStarted++;
+#endif
+ otPlatRadioTxStarted(aInstance, aFrame);
+ }
+ else
+ {
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailTxStartFailed++;
+#endif
+ sTransmitError = OT_ERROR_CHANNEL_ACCESS_FAILURE;
+ sTransmitBusy = false;
+ }
+
+exit:
+ return error;
+}
+
+otRadioFrame *otPlatRadioGetTransmitBuffer(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ return &sTransmitFrame;
+}
+
+int8_t otPlatRadioGetRssi(otInstance *aInstance)
+{
+ int8_t rssi = OT_RADIO_RSSI_INVALID;
+ OT_UNUSED_VARIABLE(aInstance);
+
+ if ((RAIL_GetRadioState(gRailHandle) & RAIL_RF_STATE_RX))
+ {
+ int16_t railRssi = RAIL_RSSI_INVALID;
+ railRssi = RAIL_GetRssi(gRailHandle, true);
+ if (railRssi != RAIL_RSSI_INVALID)
+ {
+ rssi = railRssi / QUARTER_DBM_IN_DBM;
+ }
+ }
+
+ return rssi;
+}
+
+otRadioCaps otPlatRadioGetCaps(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ return OT_RADIO_CAPS_ACK_TIMEOUT | OT_RADIO_CAPS_CSMA_BACKOFF | OT_RADIO_CAPS_ENERGY_SCAN;
+}
+
+bool otPlatRadioGetPromiscuous(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ return sPromiscuous;
+}
+
+void otPlatRadioSetPromiscuous(otInstance *aInstance, bool aEnable)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ RAIL_Status_t status;
+
+ sPromiscuous = aEnable;
+
+ for (uint8_t i = 0; i < EFR32_NUM_BAND_CONFIGS; i++)
+ {
+ status = RAIL_IEEE802154_SetPromiscuousMode(gRailHandle, aEnable);
+ assert(status == RAIL_STATUS_NO_ERROR);
+ }
+}
+
+void otPlatRadioEnableSrcMatch(otInstance *aInstance, bool aEnable)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ // set Frame Pending bit for all outgoing ACKs if aEnable is false
+ sIsSrcMatchEnabled = aEnable;
+}
+
+static void processNextRxPacket(otInstance *aInstance)
+{
+ RAIL_RxPacketHandle_t packetHandle = RAIL_RX_PACKET_HANDLE_INVALID;
+ RAIL_RxPacketInfo_t packetInfo;
+ RAIL_RxPacketDetails_t packetDetails;
+ RAIL_Status_t status;
+ uint16_t length;
+
+ packetHandle = RAIL_GetRxPacketInfo(gRailHandle, RAIL_RX_PACKET_HANDLE_OLDEST, &packetInfo);
+
+ otEXPECT_ACTION(packetHandle != RAIL_RX_PACKET_HANDLE_INVALID &&
+ packetInfo.packetStatus == RAIL_RX_PACKET_READY_SUCCESS,
+ packetHandle = RAIL_RX_PACKET_HANDLE_INVALID);
+
+ status = RAIL_GetRxPacketDetailsAlt(gRailHandle, packetHandle, &packetDetails);
+ otEXPECT(status == RAIL_STATUS_NO_ERROR);
+
+ length = packetInfo.packetBytes + 1;
+
+ // check the length in recv packet info structure
+ otEXPECT(length == packetInfo.firstPortionData[0]);
+
+ // check the length validity of recv packet
+ otEXPECT(length >= IEEE802154_MIN_LENGTH && length <= IEEE802154_MAX_LENGTH);
+
+ otLogInfoPlat("Received data:%d", length);
+
+ // skip length byte
+ assert(packetInfo.firstPortionBytes > 0);
+ packetInfo.firstPortionData++;
+ packetInfo.firstPortionBytes--;
+ packetInfo.packetBytes--;
+
+ // read packet
+ memcpy(sReceiveFrame.mPsdu, packetInfo.firstPortionData, packetInfo.firstPortionBytes);
+ memcpy(sReceiveFrame.mPsdu + packetInfo.firstPortionBytes, packetInfo.lastPortionData,
+ packetInfo.packetBytes - packetInfo.firstPortionBytes);
+
+ status = RAIL_ReleaseRxPacket(gRailHandle, packetHandle);
+ if (status == RAIL_STATUS_NO_ERROR)
+ {
+ packetHandle = RAIL_RX_PACKET_HANDLE_INVALID;
+ }
+
+ sReceiveFrame.mLength = length;
+
+ if (packetDetails.isAck)
+ {
+ assert((length == IEEE802154_ACK_LENGTH) &&
+ (sReceiveFrame.mPsdu[0] & IEEE802154_FRAME_TYPE_MASK) == IEEE802154_FRAME_TYPE_ACK);
+
+ RAIL_YieldRadio(gRailHandle);
+ sTransmitBusy = false;
+
+ if (sReceiveFrame.mPsdu[IEEE802154_DSN_OFFSET] == sTransmitFrame.mPsdu[IEEE802154_DSN_OFFSET])
+ {
+ sTransmitError = OT_ERROR_NONE;
+ }
+ else
+ {
+ sTransmitError = OT_ERROR_NO_ACK;
+ }
+ }
+ else
+ {
+ otEXPECT(length != IEEE802154_ACK_LENGTH);
+
+ sReceiveError = OT_ERROR_NONE;
+
+ sReceiveFrame.mInfo.mRxInfo.mRssi = packetDetails.rssi;
+ sReceiveFrame.mInfo.mRxInfo.mLqi = packetDetails.lqi;
+
+ // TODO: grab timestamp and handle conversion to msec/usec and RAIL_GetRxTimeSyncWordEndAlt
+ // sReceiveFrame.mInfo.mRxInfo.mMsec = packetDetails.packetTime;
+ // sReceiveFrame.mInfo.mRxInfo.mUsec = packetDetails.packetTime;
+
+ // TODO Set this flag only when the packet is really acknowledged with frame pending set.
+ // See https://github.com/openthread/openthread/pull/3785
+ sReceiveFrame.mInfo.mRxInfo.mAckedWithFramePending = true;
+
+#if OPENTHREAD_CONFIG_DIAG_ENABLE
+
+ if (otPlatDiagModeGet())
+ {
+ otPlatDiagRadioReceiveDone(aInstance, &sReceiveFrame, sReceiveError);
+ }
+ else
+#endif
+ {
+ // signal MAC layer for each received frame if promiscous is enabled
+ // otherwise only signal MAC layer for non-ACK frame
+ if (sPromiscuous || sReceiveFrame.mLength > IEEE802154_ACK_LENGTH)
+ {
+ otLogInfoPlat("Received %d bytes", sReceiveFrame.mLength);
+ otPlatRadioReceiveDone(aInstance, &sReceiveFrame, sReceiveError);
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailPlatRadioReceiveDoneCbCount++;
+#endif
+ }
+ }
+ }
+
+ otSysEventSignalPending();
+
+exit:
+
+ if (packetHandle != RAIL_RX_PACKET_HANDLE_INVALID)
+ {
+ RAIL_ReleaseRxPacket(gRailHandle, packetHandle);
+ }
+}
+
+static void ieee802154DataRequestCommand(RAIL_Handle_t aRailHandle)
+{
+ RAIL_Status_t status;
+
+ if (sIsSrcMatchEnabled)
+ {
+ RAIL_IEEE802154_Address_t sourceAddress;
+
+ status = RAIL_IEEE802154_GetAddress(aRailHandle, &sourceAddress);
+ assert(status == RAIL_STATUS_NO_ERROR);
+
+ if ((sourceAddress.length == RAIL_IEEE802154_LongAddress &&
+ utilsSoftSrcMatchExtFindEntry((otExtAddress *)sourceAddress.longAddress) >= 0) ||
+ (sourceAddress.length == RAIL_IEEE802154_ShortAddress &&
+ utilsSoftSrcMatchShortFindEntry(sourceAddress.shortAddress) >= 0))
+ {
+ status = RAIL_IEEE802154_SetFramePending(aRailHandle);
+ assert(status == RAIL_STATUS_NO_ERROR);
+ }
+ }
+ else
+ {
+ status = RAIL_IEEE802154_SetFramePending(aRailHandle);
+ assert(status == RAIL_STATUS_NO_ERROR);
+ }
+}
+
+static void RAILCb_Generic(RAIL_Handle_t aRailHandle, RAIL_Events_t aEvents)
+{
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ if (aEvents & RAIL_EVENT_CONFIG_SCHEDULED)
+ {
+ sRailDebugCounters.mRailEventConfigScheduled++;
+ }
+ if (aEvents & RAIL_EVENT_CONFIG_UNSCHEDULED)
+ {
+ sRailDebugCounters.mRailEventConfigUnScheduled++;
+ }
+#endif
+ if (aEvents & RAIL_EVENT_IEEE802154_DATA_REQUEST_COMMAND)
+ {
+ ieee802154DataRequestCommand(aRailHandle);
+ }
+ if (aEvents & RAIL_EVENTS_TX_COMPLETION)
+ {
+ if (aEvents & RAIL_EVENT_TX_PACKET_SENT)
+ {
+ if ((sTransmitFrame.mPsdu[0] & IEEE802154_ACK_REQUEST) == 0)
+ {
+ RAIL_YieldRadio(aRailHandle);
+ sTransmitError = OT_ERROR_NONE;
+ sTransmitBusy = false;
+ }
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailEventPacketSent++;
+#endif
+ }
+ else if (aEvents & RAIL_EVENT_TX_CHANNEL_BUSY)
+ {
+ RAIL_YieldRadio(aRailHandle);
+ sTransmitError = OT_ERROR_CHANNEL_ACCESS_FAILURE;
+ sTransmitBusy = false;
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailEventChannelBusy++;
+#endif
+ }
+ else
+ {
+ RAIL_YieldRadio(aRailHandle);
+ sTransmitError = OT_ERROR_ABORT;
+ sTransmitBusy = false;
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailEventTxAbort++;
+#endif
+ }
+ }
+
+ if (aEvents & RAIL_EVENT_RX_ACK_TIMEOUT)
+ {
+ RAIL_YieldRadio(aRailHandle);
+ sTransmitError = OT_ERROR_NO_ACK;
+ sTransmitBusy = false;
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailEventNoAck++;
+#endif
+ }
+
+ if (aEvents & RAIL_EVENT_RX_PACKET_RECEIVED)
+ {
+ RAIL_HoldRxPacket(aRailHandle);
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailEventPacketReceived++;
+#endif
+ }
+
+ if (aEvents & RAIL_EVENT_CAL_NEEDED)
+ {
+ RAIL_Status_t status;
+
+ status = RAIL_Calibrate(aRailHandle, NULL, RAIL_CAL_ALL_PENDING);
+ assert(status == RAIL_STATUS_NO_ERROR);
+
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailEventCalNeeded++;
+#endif
+ }
+
+ if (aEvents & RAIL_EVENT_RSSI_AVERAGE_DONE)
+ {
+ const int16_t energyScanResultQuarterDbm = RAIL_GetAverageRssi(aRailHandle);
+ RAIL_YieldRadio(aRailHandle);
+
+ sEnergyScanStatus = ENERGY_SCAN_STATUS_COMPLETED;
+
+ if (energyScanResultQuarterDbm == RAIL_RSSI_INVALID)
+ {
+ sEnergyScanResultDbm = OT_RADIO_RSSI_INVALID;
+ }
+ else
+ {
+ sEnergyScanResultDbm = energyScanResultQuarterDbm / QUARTER_DBM_IN_DBM;
+ }
+
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailPlatRadioEnergyScanDoneCbCount++;
+#endif
+ }
+ if (aEvents & RAIL_EVENT_SCHEDULER_STATUS)
+ {
+ RAIL_SchedulerStatus_t status = RAIL_GetSchedulerStatus(aRailHandle);
+
+ assert(status != RAIL_SCHEDULER_STATUS_INTERNAL_ERROR);
+
+ if (status == RAIL_SCHEDULER_STATUS_CCA_CSMA_TX_FAIL || status == RAIL_SCHEDULER_STATUS_SINGLE_TX_FAIL ||
+ status == RAIL_SCHEDULER_STATUS_SCHEDULED_TX_FAIL ||
+ (status == RAIL_SCHEDULER_STATUS_SCHEDULE_FAIL && sTransmitBusy) ||
+ (status == RAIL_SCHEDULER_STATUS_EVENT_INTERRUPTED && sTransmitBusy))
+ {
+ sTransmitError = OT_ERROR_ABORT;
+ sTransmitBusy = false;
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailEventSchedulerStatusError++;
+#endif
+ }
+ else if (status == RAIL_SCHEDULER_STATUS_AVERAGE_RSSI_FAIL)
+ {
+ sEnergyScanStatus = ENERGY_SCAN_STATUS_COMPLETED;
+ sEnergyScanResultDbm = OT_RADIO_RSSI_INVALID;
+ }
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ else if (sTransmitBusy)
+ {
+ sRailDebugCounters.mRailEventsSchedulerStatusLastStatus = status;
+ sRailDebugCounters.mRailEventsSchedulerStatusTransmitBusy++;
+ }
+#endif
+ }
+
+ otSysEventSignalPending();
+}
+
+otError otPlatRadioEnergyScan(otInstance *aInstance, uint8_t aScanChannel, uint16_t aScanDuration)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ return efr32StartEnergyScan(ENERGY_SCAN_MODE_ASYNC, aScanChannel, (RAIL_Time_t)aScanDuration * US_IN_MS);
+}
+
+void efr32RadioProcess(otInstance *aInstance)
+{
+ if (sState == OT_RADIO_STATE_TRANSMIT && sTransmitBusy == false)
+ {
+ if (sTransmitError != OT_ERROR_NONE)
+ {
+ otLogDebgPlat("Transmit failed ErrorCode=%d", sTransmitError);
+ }
+
+ sState = OT_RADIO_STATE_RECEIVE;
+#if OPENTHREAD_CONFIG_DIAG_ENABLE
+ if (otPlatDiagModeGet())
+ {
+ otPlatDiagRadioTransmitDone(aInstance, &sTransmitFrame, sTransmitError);
+ }
+ else
+#endif
+ if (((sTransmitFrame.mPsdu[0] & IEEE802154_ACK_REQUEST) == 0) || (sTransmitError != OT_ERROR_NONE))
+ {
+ otPlatRadioTxDone(aInstance, &sTransmitFrame, NULL, sTransmitError);
+ }
+ else
+ {
+ otPlatRadioTxDone(aInstance, &sTransmitFrame, &sReceiveFrame, sTransmitError);
+ }
+
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailPlatRadioTxDoneCbCount++;
+#endif
+
+ otSysEventSignalPending();
+ }
+ else if (sEnergyScanMode == ENERGY_SCAN_MODE_ASYNC && sEnergyScanStatus == ENERGY_SCAN_STATUS_COMPLETED)
+ {
+ sEnergyScanStatus = ENERGY_SCAN_STATUS_IDLE;
+ otPlatRadioEnergyScanDone(aInstance, sEnergyScanResultDbm);
+ otSysEventSignalPending();
+
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailEventEnergyScanCompleted++;
+#endif
+ }
+
+ processNextRxPacket(aInstance);
+}
+
+otError otPlatRadioGetTransmitPower(otInstance *aInstance, int8_t *aPower)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ otError error = OT_ERROR_NONE;
+
+ otEXPECT_ACTION(aPower != NULL, error = OT_ERROR_INVALID_ARGS);
+ *aPower = sTxPowerDbm;
+
+exit:
+ return error;
+}
+
+otError otPlatRadioSetTransmitPower(otInstance *aInstance, int8_t aPower)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ RAIL_Status_t status;
+
+ status = RAIL_SetTxPowerDbm(gRailHandle, ((RAIL_TxPower_t)aPower) * 10);
+ assert(status == RAIL_STATUS_NO_ERROR);
+
+ sTxPowerDbm = aPower;
+
+ return OT_ERROR_NONE;
+}
+
+otError otPlatRadioGetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t *aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ OT_UNUSED_VARIABLE(aThreshold);
+
+ return OT_ERROR_NOT_IMPLEMENTED;
+}
+
+otError otPlatRadioSetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ OT_UNUSED_VARIABLE(aThreshold);
+
+ return OT_ERROR_NOT_IMPLEMENTED;
+}
+
+int8_t otPlatRadioGetReceiveSensitivity(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ return EFR32_RECEIVE_SENSITIVITY;
+}
diff --git a/examples/platforms/efr32mg13/rail_config.h b/examples/platforms/efr32mg13/rail_config.h
new file mode 100644
index 0000000..5a62825
--- /dev/null
+++ b/examples/platforms/efr32mg13/rail_config.h
@@ -0,0 +1,14 @@
+#ifndef __RAIL_CONFIG_H__
+#define __RAIL_CONFIG_H__
+
+#include "board_config.h"
+#include "rail_types.h"
+#include <stdint.h>
+
+#define RADIO_CONFIG_XTAL_FREQUENCY 38400000UL
+
+#if RADIO_CONFIG_915MHZ_OQPSK_SUPPORT
+extern const RAIL_ChannelConfig_t *channelConfigs[];
+#endif
+
+#endif // __RAIL_CONFIG_H__
diff --git a/examples/platforms/efr32mg13/sleepy-demo/Makefile.am b/examples/platforms/efr32mg13/sleepy-demo/Makefile.am
new file mode 100644
index 0000000..22cb725
--- /dev/null
+++ b/examples/platforms/efr32mg13/sleepy-demo/Makefile.am
@@ -0,0 +1,54 @@
+#
+# Copyright (c) 2020, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
+
+# Always package (e.g. for 'make dist') these subdirectories.
+
+DIST_SUBDIRS = \
+ sleepy-demo-mtd \
+ sleepy-demo-ftd \
+ $(NULL)
+
+# Always build (e.g. for 'make all') these subdirectories.
+
+SUBDIRS = \
+ $(NULL)
+
+if OPENTHREAD_ENABLE_EXECUTABLE
+SUBDIRS += sleepy-demo-mtd sleepy-demo-ftd
+endif
+
+# Always pretty (e.g. for 'make pretty') these subdirectories.
+
+PRETTY_SUBDIRS = \
+ sleepy-demo-mtd \
+ sleepy-demo-ftd \
+ $(NULL)
+
+include $(abs_top_nlbuild_autotools_dir)/automake/post.am
diff --git a/examples/platforms/efr32mg13/sleepy-demo/README.md b/examples/platforms/efr32mg13/sleepy-demo/README.md
new file mode 100644
index 0000000..7af6fe8
--- /dev/null
+++ b/examples/platforms/efr32mg13/sleepy-demo/README.md
@@ -0,0 +1,100 @@
+
+# EFR32MG13 Sleepy Demo Example
+
+The EFR32 Sleepy applications demonstrates Sleepy End Device behaviour using
+the EFR32's low power EM2 mode. The steps below will take you through the
+process of building and running the demo
+
+For setting up the build environment refer to [examples/platforms/efr32mg13/README.md](../README.md).
+
+
+## 1. Build
+
+```bash
+$ cd <path-to-openthread>
+$ ./bootstrap
+$ make -f examples/Makefile-efr32mg13 COMMISSIONER=1 JOINER=1 DHCP6_CLIENT=1 DHCP6_SERVER=1 BOARD=BRD4168A
+```
+
+Convert the resulting executables into S-Record format and append a s37 suffix.
+
+```bash
+$ cd output/efr32mg13/bin
+$ arm-none-eabi-objcopy -O srec sleepy-demo-mtd sleepy-demo-mtd.s37
+$ arm-none-eabi-objcopy -O srec sleepy-demo-ftd sleepy-demo-ftd.s37
+```
+
+In Silicon Labs Simplicity Studio flash one device with the sleepy-demo-mtd.s37
+image and the other device with the sleepy-demo-ftd.s37 image.
+
+For instructions on flashing firmware see [examples/platforms/efr32mg13/README.md](../README.md#flash-binaries)
+
+
+## 2. Starting nodes
+
+For demonstration purposes the network settings are hardcoded within the source files.
+The devices start Thread and form a network within a few seconds of powering on. In a real-life
+application the devices should implement and go through a commissioning process to create
+a network and add devices.
+
+When the sleepy-demo-ftd device is started in the CLI the user shall see:
+
+```
+sleepy-demo-ftd started
+sleepy-demo-ftd changed to leader
+```
+
+When the sleepy-demo-mtd device starts it joins the preconfigured Thread network
+before disabling Rx-On-Idle to become a Sleepy-End-Device.
+
+Use the command "child table" in the FTD console and observe the R flag of the child is 0.
+
+```
+> child table
+| ID | RLOC16 | Timeout | Age | LQ In | C_VN |R|S|D|N| Extended MAC |
++-----+--------+------------+------------+-------+------+-+-+-+-+------------------+
+| 1 | 0x8401 | 240 | 3 | 3 | 3 |0|1|0|0| 8e8582dbd78c243c |
+
+Done
+```
+
+
+## 3. Buttons on the MTD
+
+Pressing button 0 on the MTD toggles between operating as a Minimal End Device (MED) and
+a Sleepy End Device (SED) with the RX off when idle.
+
+Pressing button 1 on the MTD sends a multicast UDP message containing the
+string "mtd button". The FTD listens on the multicast address and will toggle
+LED 0 and display a message in the CLI showing "Message Received: mtd button".
+
+## 4. Buttons on the FTD
+
+Pressing either button 0 or 1 on the FTD will send a UDP message to the FTD containing the string
+"ftd button". The MTD must first send a multicast message by pressing the MTD's button 1 so that
+the FTD knows the address of the MTD to send messages to.
+
+This will toggle the state of LED0 on the MTD. If the MTD is operating as a sleepy end device then
+the MTD polls the parent every 5 seconds for messages and will update the LED state on the
+next poll.
+
+## 5. Monitoring power consumption of the MTD
+
+Open the Energy Profiler within Silicon Labs Simplicity Studio. Within the Quick Access menu
+select Start Energy Capture... and select the MTD device. When operating as a Sleepy End Device
+with no LEDs on the current should be under 20 microamps with occassional spikes during waking
+and polling the parent. With the LED on the MTD has a current consumption of approximately 1mA.
+
+When operating as a Minial End Device with the Rx on Idle observe that the current is in the order
+of 10ma.
+
+With further configuration of GPIOs and peripherals it is possible to reduce the sleepy current
+consumption further.
+
+## 6. Notes on sleeping, sleepy callback and interrupts
+
+To allow the EFR32 to enter sleepy mode the application must register a callback with efr32SetSleepCallback.
+The return value of callback is used to indicate that the application has no further work to do and that
+it is safe to go into a low power mode. The callback is called with interrupts disabled so should do
+the minimum required to check if it can sleep.
+
diff --git a/examples/platforms/efr32mg13/sleepy-demo/sleepy-demo-ftd/Makefile.am b/examples/platforms/efr32mg13/sleepy-demo/sleepy-demo-ftd/Makefile.am
new file mode 100644
index 0000000..10b31df
--- /dev/null
+++ b/examples/platforms/efr32mg13/sleepy-demo/sleepy-demo-ftd/Makefile.am
@@ -0,0 +1,154 @@
+#
+# Copyright (c) 2020, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
+include $(top_srcdir)/examples/platforms/Makefile.platform.am
+
+override CFLAGS := $(filter-out -Wconversion,$(CFLAGS))
+override CXXFLAGS := $(filter-out -Wconversion,$(CXXFLAGS))
+
+EFR32_BOARD_DIR = $(shell echo $(BOARD) | tr A-Z a-z)
+
+SDK_SRC_DIR = $(top_srcdir)/third_party/silabs/gecko_sdk_suite/v2.7
+
+$(top_builddir)/examples/platforms/efr32mg13/libopenthread-efr32mg13.a:
+ (cd $(top_builddir)/examples/platforms/efr32mg13/ && $(MAKE) $(AM_MAKEFLAGS) libopenthread-efr32mg13.a )
+
+bin_PROGRAMS = \
+ $(NULL)
+
+CPPFLAGS_COMMON += \
+ -DPLATFORM_HEADER=\"platform/base/hal/micro/cortexm3/compiler/gcc.h\" \
+ -DNVIC_CONFIG=\"platform/base/hal/micro/cortexm3/efm32/nvic-config.h\" \
+ -Wno-sign-compare \
+ -DCORTEXM3 \
+ -DPHY=EMBER_PHY_RAIL \
+ -DMICRO=EMBER_MICRO_CORTEXM3_EFR32 \
+ -DCORTEXM3_EFM32_MICRO \
+ -DPLAT=EMBER_PLATFORM_CORTEXM3 \
+ -I$(top_srcdir)/examples/platforms \
+ -I$(top_srcdir)/examples/platforms/efr32mg13/$(EFR32_BOARD_DIR) \
+ -I$(top_srcdir)/include \
+ -I$(top_srcdir)/src/core \
+ -I$(top_srcdir)/third_party/silabs/rail_config \
+ -I$(SDK_SRC_DIR)/hardware/kit/common/bsp \
+ -I$(SDK_SRC_DIR)/hardware/kit/common/drivers \
+ -I$(SDK_SRC_DIR)/hardware/kit/EFR32MG13_$(BOARD)/config \
+ -I$(SDK_SRC_DIR)/platform/base/hal/micro/cortexm3/efm32 \
+ -I$(SDK_SRC_DIR)/platform/base/hal/micro/cortexm3/efm32/config \
+ -I$(SDK_SRC_DIR)/platform/common/inc \
+ -I$(SDK_SRC_DIR)/platform/CMSIS/Include \
+ -I$(SDK_SRC_DIR)/platform/Device/SiliconLabs/EFR32MG13P/Include \
+ -I$(SDK_SRC_DIR)/platform/emdrv/common/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/gpiointerrupt/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/uartdrv/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/uartdrv/config \
+ -I$(SDK_SRC_DIR)/platform/emdrv/ustimer/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/dmadrv/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/dmadrv/config \
+ -I$(SDK_SRC_DIR)/platform/emlib/inc \
+ -I$(SDK_SRC_DIR)/platform/halconfig/inc/hal-config \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32/efr32xg1x \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32/rf/common/cortex \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/common \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/hal \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/hal/efr32 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/protocol/ieee802154 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/plugin/pa-conversions \
+ -I$(SDK_SRC_DIR)/platform/service/mpu/inc \
+ -I$(SDK_SRC_DIR)/platform/service/sleeptimer/config \
+ -I$(SDK_SRC_DIR)/platform/service/sleeptimer/inc \
+ -I$(SDK_SRC_DIR)/util/plugin/plugin-common/fem-control \
+ -I$(SDK_SRC_DIR)/util/third_party/mbedtls/sl_crypto/include \
+ -Wno-unused-parameter \
+ -Wno-missing-field-initializers \
+ $(NULL)
+
+LDADD_COMMON += \
+ $(NULL)
+
+LDFLAGS_COMMON += \
+ $(NULL)
+
+LIBTOOLFLAGS_COMMON += \
+ $(NULL)
+
+SOURCES_COMMON += \
+ main.c \
+ $(NULL)
+
+if OPENTHREAD_ENABLE_BUILTIN_MBEDTLS
+LDADD_COMMON += \
+ $(top_builddir)/third_party/mbedtls/libmbedcrypto.a \
+ $(NULL)
+endif # OPENTHREAD_ENABLE_BUILTIN_MBEDTLS
+
+if OPENTHREAD_ENABLE_EXECUTABLE
+bin_PROGRAMS += \
+ sleepy-demo-ftd \
+ $(NULL)
+endif
+
+sleepy_demo_ftd_CPPFLAGS = \
+ $(CPPFLAGS_COMMON) \
+ $(NULL)
+
+sleepy_demo_ftd_LDADD = \
+ $(top_builddir)/src/cli/libopenthread-cli-ftd.a \
+ $(top_builddir)/src/core/libopenthread-ftd.a \
+ $(LDADD_COMMON) \
+ $(top_builddir)/src/core/libopenthread-ftd.a \
+ $(LDADD_COMMON) \
+ $(NULL)
+
+sleepy_demo_ftd_LDFLAGS = \
+ $(LDFLAGS_COMMON) \
+ $(NULL)
+
+sleepy_demo_ftd_LIBTOOLFLAGS = \
+ $(LIBTOOLFLAGS_COMMON) \
+ $(NULL)
+
+sleepy_demo_ftd_SOURCES = \
+ $(SOURCES_COMMON) \
+ $(NULL)
+
+if OPENTHREAD_ENABLE_LINKER_MAP
+sleepy_demo_ftd_LDFLAGS += -Wl,-Map=sleepy-demo-ftd.map
+endif
+
+if OPENTHREAD_BUILD_COVERAGE
+CPPFLAGS_COMMON += \
+ -DOPENTHREAD_ENABLE_COVERAGE \
+ $(NULL)
+
+CLEANFILES = $(wildcard *.gcda *.gcno)
+endif # OPENTHREAD_BUILD_COVERAGE
+
+include $(abs_top_nlbuild_autotools_dir)/automake/post.am
diff --git a/examples/platforms/efr32mg13/sleepy-demo/sleepy-demo-ftd/main.c b/examples/platforms/efr32mg13/sleepy-demo/sleepy-demo-ftd/main.c
new file mode 100644
index 0000000..a6715b2
--- /dev/null
+++ b/examples/platforms/efr32mg13/sleepy-demo/sleepy-demo-ftd/main.c
@@ -0,0 +1,322 @@
+/*
+ * Copyright (c) 2020, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "bsp.h"
+#include "em_cmu.h"
+#include "em_emu.h"
+#include "gpiointerrupt.h"
+#include "hal-config.h"
+#include "hal_common.h"
+#include "openthread-system.h"
+#include <assert.h>
+#include <common/logging.hpp>
+#include <openthread-core-config.h>
+#include <string.h>
+#include <openthread/cli.h>
+#include <openthread/config.h>
+#include <openthread/dataset_ftd.h>
+#include <openthread/diag.h>
+#include <openthread/instance.h>
+#include <openthread/message.h>
+#include <openthread/tasklet.h>
+#include <openthread/thread.h>
+#include <openthread/udp.h>
+#include <openthread/platform/logging.h>
+
+// Constants
+#define MULTICAST_ADDR "ff03::1"
+#define MULTICAST_PORT 123
+#define RECV_PORT 234
+#define MTD_MESSAGE "mtd button"
+#define FTD_MESSAGE "ftd button"
+
+// Types
+typedef struct ButtonArray
+{
+ GPIO_Port_TypeDef port;
+ unsigned int pin;
+} ButtonArray_t;
+
+// Prototypes
+void setNetworkConfiguration(otInstance *aInstance);
+void handleNetifStateChanged(uint32_t aFlags, void *aContext);
+void gpioInit(void (*gpioCallback)(uint8_t pin));
+void buttonCallback(uint8_t pin);
+void initUdp(void);
+void applicationTick(void);
+void sFtdReceiveCallback(void *aContext, otMessage *aMessage, const otMessageInfo *aMessageInfo);
+
+// Variables
+static otInstance * instance;
+static otUdpSocket sFtdSocket;
+static bool sLedOn = false;
+static bool sHaveSwitchAddress = false;
+static otIp6Address sSwitchAddress;
+static bool sFtdButtonPressed = false;
+static const ButtonArray_t sButtonArray[BSP_BUTTON_COUNT] = BSP_BUTTON_INIT;
+
+void otTaskletsSignalPending(otInstance *aInstance)
+{
+ (void)aInstance;
+}
+
+int main(int argc, char *argv[])
+{
+ otSysInit(argc, argv);
+ gpioInit(buttonCallback);
+
+ instance = otInstanceInitSingle();
+ assert(instance);
+
+ otCliUartInit(instance);
+ otCliOutputFormat("sleepy-demo-ftd started\r\n");
+
+ setNetworkConfiguration(instance);
+ otSetStateChangedCallback(instance, handleNetifStateChanged, instance);
+ initUdp();
+
+ otIp6SetEnabled(instance, true);
+ otThreadSetEnabled(instance, true);
+
+ while (!otSysPseudoResetWasRequested())
+ {
+ otTaskletsProcess(instance);
+ otSysProcessDrivers(instance);
+ applicationTick();
+ }
+
+ otInstanceFinalize(instance);
+ return 0;
+}
+
+/*
+ * Provide, if required an "otPlatLog()" function
+ */
+#if OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_APP
+void otPlatLog(otLogLevel aLogLevel, otLogRegion aLogRegion, const char *aFormat, ...)
+{
+ OT_UNUSED_VARIABLE(aLogLevel);
+ OT_UNUSED_VARIABLE(aLogRegion);
+ OT_UNUSED_VARIABLE(aFormat);
+
+ va_list ap;
+ va_start(ap, aFormat);
+ otCliPlatLogv(aLogLevel, aLogRegion, aFormat, ap);
+ va_end(ap);
+}
+#endif
+
+/**
+ * Override default network settings, such as panid, so the devices can join a network
+ */
+void setNetworkConfiguration(otInstance *aInstance)
+{
+ static char aNetworkName[] = "SleepyEFR32";
+ otOperationalDataset aDataset;
+
+ memset(&aDataset, 0, sizeof(otOperationalDataset));
+
+ /*
+ * Fields that can be configured in otOperationDataset to override defaults:
+ * Network Name, Mesh Local Prefix, Extended PAN ID, PAN ID, Delay Timer,
+ * Channel, Channel Mask Page 0, Network Master Key, PSKc, Security Policy
+ */
+ aDataset.mActiveTimestamp = 1;
+ aDataset.mComponents.mIsActiveTimestampPresent = true;
+
+ /* Set Channel to 15 */
+ aDataset.mChannel = 15;
+ aDataset.mComponents.mIsChannelPresent = true;
+
+ /* Set Pan ID to 2222 */
+ aDataset.mPanId = (otPanId)0x2222;
+ aDataset.mComponents.mIsPanIdPresent = true;
+
+ /* Set Extended Pan ID to C0DE1AB5C0DE1AB5 */
+ uint8_t extPanId[OT_EXT_PAN_ID_SIZE] = {0xC0, 0xDE, 0x1A, 0xB5, 0xC0, 0xDE, 0x1A, 0xB5};
+ memcpy(aDataset.mExtendedPanId.m8, extPanId, sizeof(aDataset.mExtendedPanId));
+ aDataset.mComponents.mIsExtendedPanIdPresent = true;
+
+ /* Set master key to 1234C0DE1AB51234C0DE1AB51234C0DE */
+ uint8_t key[OT_MASTER_KEY_SIZE] = {0x12, 0x34, 0xC0, 0xDE, 0x1A, 0xB5, 0x12, 0x34, 0xC0, 0xDE, 0x1A, 0xB5};
+ memcpy(aDataset.mMasterKey.m8, key, sizeof(aDataset.mMasterKey));
+ aDataset.mComponents.mIsMasterKeyPresent = true;
+
+ /* Set Network Name to SleepyEFR32 */
+ size_t length = strlen(aNetworkName);
+ assert(length <= OT_NETWORK_NAME_MAX_SIZE);
+ memcpy(aDataset.mNetworkName.m8, aNetworkName, length);
+ aDataset.mComponents.mIsNetworkNamePresent = true;
+
+ otDatasetSetActive(aInstance, &aDataset);
+}
+
+void handleNetifStateChanged(uint32_t aFlags, void *aContext)
+{
+ if ((aFlags & OT_CHANGED_THREAD_ROLE) != 0)
+ {
+ otDeviceRole changedRole = otThreadGetDeviceRole(aContext);
+
+ switch (changedRole)
+ {
+ case OT_DEVICE_ROLE_LEADER:
+ otCliOutputFormat("sleepy-demo-ftd changed to leader\r\n");
+ break;
+ case OT_DEVICE_ROLE_ROUTER:
+ otCliOutputFormat("sleepy-demo-ftd changed to router\r\n");
+ break;
+
+ case OT_DEVICE_ROLE_CHILD:
+ break;
+
+ case OT_DEVICE_ROLE_DETACHED:
+ case OT_DEVICE_ROLE_DISABLED:
+ break;
+ }
+ }
+}
+
+void gpioInit(void (*callback)(uint8_t pin))
+{
+ // set up button GPIOs to input with pullups
+ for (int i = 0; i < BSP_BUTTON_COUNT; i++)
+ {
+ GPIO_PinModeSet(sButtonArray[i].port, sButtonArray[i].pin, gpioModeInputPull, 1);
+ }
+ // set up interrupt based callback function on falling edge
+ GPIOINT_Init();
+ GPIOINT_CallbackRegister(sButtonArray[0].pin, callback);
+ GPIOINT_CallbackRegister(sButtonArray[1].pin, callback);
+ GPIO_IntConfig(sButtonArray[0].port, sButtonArray[0].pin, false, true, true);
+ GPIO_IntConfig(sButtonArray[1].port, sButtonArray[1].pin, false, true, true);
+
+ BSP_LedsInit();
+ BSP_LedClear(0);
+ BSP_LedClear(1);
+}
+
+void initUdp(void)
+{
+ otError error;
+ otSockAddr sockaddr;
+
+ memset(&sockaddr, 0, sizeof(sockaddr));
+
+ otIp6AddressFromString(MULTICAST_ADDR, &sockaddr.mAddress);
+ sockaddr.mPort = MULTICAST_PORT;
+
+ error = otUdpOpen(instance, &sFtdSocket, sFtdReceiveCallback, NULL);
+ if (error != OT_ERROR_NONE)
+ {
+ otCliOutputFormat("FTD failed to open udp multicast\r\n");
+ return;
+ }
+
+ error = otUdpBind(&sFtdSocket, &sockaddr);
+ if (error != OT_ERROR_NONE)
+ {
+ otUdpClose(&sFtdSocket);
+ otCliOutputFormat("FTD failed to bind udp multicast\r\n");
+ return;
+ }
+}
+
+void buttonCallback(uint8_t pin)
+{
+ OT_UNUSED_VARIABLE(pin);
+ sFtdButtonPressed = true;
+}
+
+void applicationTick(void)
+{
+ otError error = 0;
+ otMessageInfo messageInfo;
+ otMessage * message = NULL;
+ char * payload = FTD_MESSAGE;
+
+ if (sFtdButtonPressed == true)
+ {
+ sFtdButtonPressed = false;
+
+ if (sHaveSwitchAddress)
+ {
+ memset(&messageInfo, 0, sizeof(messageInfo));
+ memcpy(&messageInfo.mPeerAddr, &sSwitchAddress, sizeof messageInfo.mPeerAddr);
+ messageInfo.mPeerPort = RECV_PORT;
+
+ message = otUdpNewMessage(instance, NULL);
+
+ if (message != NULL)
+ {
+ error = otMessageAppend(message, payload, (uint16_t)strlen(payload));
+
+ if (error == OT_ERROR_NONE)
+ {
+ error = otUdpSend(&sFtdSocket, message, &messageInfo);
+
+ if (error == OT_ERROR_NONE)
+ {
+ return;
+ }
+ }
+ }
+
+ if (message != NULL)
+ {
+ otMessageFree(message);
+ }
+ }
+ }
+}
+
+void sFtdReceiveCallback(void *aContext, otMessage *aMessage, const otMessageInfo *aMessageInfo)
+{
+ OT_UNUSED_VARIABLE(aContext);
+ OT_UNUSED_VARIABLE(aMessage);
+ OT_UNUSED_VARIABLE(aMessageInfo);
+ uint8_t buf[1500];
+ int length;
+
+ sLedOn = !sLedOn;
+
+ if (sLedOn)
+ {
+ BSP_LedSet(0);
+ }
+ else
+ {
+ BSP_LedClear(0);
+ }
+
+ length = otMessageRead(aMessage, otMessageGetOffset(aMessage), buf, sizeof(buf) - 1);
+ buf[length] = '\0';
+ otCliOutputFormat("Message Received: %s\r\n", buf);
+
+ sHaveSwitchAddress = true;
+ memcpy(&sSwitchAddress, &aMessageInfo->mPeerAddr, sizeof sSwitchAddress);
+}
diff --git a/examples/platforms/efr32mg13/sleepy-demo/sleepy-demo-mtd/Makefile.am b/examples/platforms/efr32mg13/sleepy-demo/sleepy-demo-mtd/Makefile.am
new file mode 100644
index 0000000..d3ad8ad
--- /dev/null
+++ b/examples/platforms/efr32mg13/sleepy-demo/sleepy-demo-mtd/Makefile.am
@@ -0,0 +1,154 @@
+#
+# Copyright (c) 2020, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
+include $(top_srcdir)/examples/platforms/Makefile.platform.am
+
+override CFLAGS := $(filter-out -Wconversion,$(CFLAGS))
+override CXXFLAGS := $(filter-out -Wconversion,$(CXXFLAGS))
+
+EFR32_BOARD_DIR = $(shell echo $(BOARD) | tr A-Z a-z)
+
+SDK_SRC_DIR = $(top_srcdir)/third_party/silabs/gecko_sdk_suite/v2.7
+
+$(top_builddir)/examples/platforms/efr32mg13/libopenthread-efr32mg13.a:
+ (cd $(top_builddir)/examples/platforms/efr32mg13/ && $(MAKE) $(AM_MAKEFLAGS) libopenthread-efr32mg13.a )
+
+bin_PROGRAMS = \
+ $(NULL)
+
+CPPFLAGS_COMMON += \
+ -DPLATFORM_HEADER=\"platform/base/hal/micro/cortexm3/compiler/gcc.h\" \
+ -DNVIC_CONFIG=\"platform/base/hal/micro/cortexm3/efm32/nvic-config.h\" \
+ -Wno-sign-compare \
+ -DCORTEXM3 \
+ -DPHY=EMBER_PHY_RAIL \
+ -DMICRO=EMBER_MICRO_CORTEXM3_EFR32 \
+ -DCORTEXM3_EFM32_MICRO \
+ -DPLAT=EMBER_PLATFORM_CORTEXM3 \
+ -I$(top_srcdir)/examples/platforms \
+ -I$(top_srcdir)/examples/platforms/efr32mg13/$(EFR32_BOARD_DIR) \
+ -I$(top_srcdir)/include \
+ -I$(top_srcdir)/src/core \
+ -I$(top_srcdir)/third_party/silabs/rail_config \
+ -I$(SDK_SRC_DIR)/hardware/kit/common/bsp \
+ -I$(SDK_SRC_DIR)/hardware/kit/common/drivers \
+ -I$(SDK_SRC_DIR)/hardware/kit/EFR32MG13_$(BOARD)/config \
+ -I$(SDK_SRC_DIR)/platform/base/hal/micro/cortexm3/efm32 \
+ -I$(SDK_SRC_DIR)/platform/base/hal/micro/cortexm3/efm32/config \
+ -I$(SDK_SRC_DIR)/platform/common/inc \
+ -I$(SDK_SRC_DIR)/platform/CMSIS/Include \
+ -I$(SDK_SRC_DIR)/platform/Device/SiliconLabs/EFR32MG13P/Include \
+ -I$(SDK_SRC_DIR)/platform/emdrv/common/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/gpiointerrupt/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/uartdrv/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/uartdrv/config \
+ -I$(SDK_SRC_DIR)/platform/emdrv/ustimer/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/dmadrv/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/dmadrv/config \
+ -I$(SDK_SRC_DIR)/platform/emlib/inc \
+ -I$(SDK_SRC_DIR)/platform/halconfig/inc/hal-config \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32/efr32xg1x \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32/rf/common/cortex \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/common \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/hal \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/hal/efr32 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/protocol/ieee802154 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/plugin/pa-conversions \
+ -I$(SDK_SRC_DIR)/platform/service/mpu/inc \
+ -I$(SDK_SRC_DIR)/platform/service/sleeptimer/config \
+ -I$(SDK_SRC_DIR)/platform/service/sleeptimer/inc \
+ -I$(SDK_SRC_DIR)/util/plugin/plugin-common/fem-control \
+ -I$(SDK_SRC_DIR)/util/third_party/mbedtls/sl_crypto/include \
+ -Wno-unused-parameter \
+ -Wno-missing-field-initializers \
+ $(NULL)
+
+LDADD_COMMON += \
+ $(NULL)
+
+LDFLAGS_COMMON += \
+ $(NULL)
+
+LIBTOOLFLAGS_COMMON += \
+ $(NULL)
+
+SOURCES_COMMON += \
+ main.c \
+ $(NULL)
+
+if OPENTHREAD_ENABLE_BUILTIN_MBEDTLS
+LDADD_COMMON += \
+ $(top_builddir)/third_party/mbedtls/libmbedcrypto.a \
+ $(NULL)
+endif # OPENTHREAD_ENABLE_BUILTIN_MBEDTLS
+
+if OPENTHREAD_ENABLE_EXECUTABLE
+bin_PROGRAMS += \
+ sleepy-demo-mtd \
+ $(NULL)
+endif
+
+sleepy_demo_mtd_CPPFLAGS = \
+ $(CPPFLAGS_COMMON) \
+ $(NULL)
+
+sleepy_demo_mtd_LDADD = \
+ $(top_builddir)/src/cli/libopenthread-cli-mtd.a \
+ $(top_builddir)/src/core/libopenthread-mtd.a \
+ $(LDADD_COMMON) \
+ $(top_builddir)/src/core/libopenthread-mtd.a \
+ $(LDADD_COMMON) \
+ $(NULL)
+
+sleepy_demo_mtd_LDFLAGS = \
+ $(LDFLAGS_COMMON) \
+ $(NULL)
+
+sleepy_demo_mtd_LIBTOOLFLAGS = \
+ $(LIBTOOLFLAGS_COMMON) \
+ $(NULL)
+
+sleepy_demo_mtd_SOURCES = \
+ $(SOURCES_COMMON) \
+ $(NULL)
+
+if OPENTHREAD_ENABLE_LINKER_MAP
+sleepy_demo_mtd_LDFLAGS += -Wl,-Map=sleepy-demo-mtd.map
+endif
+
+if OPENTHREAD_BUILD_COVERAGE
+CPPFLAGS_COMMON += \
+ -DOPENTHREAD_ENABLE_COVERAGE \
+ $(NULL)
+
+CLEANFILES = $(wildcard *.gcda *.gcno)
+endif # OPENTHREAD_BUILD_COVERAGE
+
+include $(abs_top_nlbuild_autotools_dir)/automake/post.am
diff --git a/examples/platforms/efr32mg13/sleepy-demo/sleepy-demo-mtd/main.c b/examples/platforms/efr32mg13/sleepy-demo/sleepy-demo-mtd/main.c
new file mode 100644
index 0000000..7037bc0
--- /dev/null
+++ b/examples/platforms/efr32mg13/sleepy-demo/sleepy-demo-mtd/main.c
@@ -0,0 +1,376 @@
+/*
+ * Copyright (c) 2020, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <assert.h>
+#include <string.h>
+
+#include "bsp.h"
+#include "em_cmu.h"
+#include "em_emu.h"
+#include "gpiointerrupt.h"
+#include "hal-config.h"
+#include "hal_common.h"
+#include "openthread-system.h"
+#include "platform-efr32.h"
+#include <common/logging.hpp>
+#include <openthread-core-config.h>
+#include <openthread/cli.h>
+#include <openthread/config.h>
+#include <openthread/dataset_ftd.h>
+#include <openthread/diag.h>
+#include <openthread/instance.h>
+#include <openthread/link.h>
+#include <openthread/message.h>
+#include <openthread/tasklet.h>
+#include <openthread/thread.h>
+#include <openthread/udp.h>
+#include <openthread/platform/logging.h>
+
+// Constants
+#define MULTICAST_ADDR "ff03::1"
+#define MULTICAST_PORT 123
+#define RECV_PORT 234
+#define SLEEPY_POLL_PERIOD_MS 5000
+#define MTD_MESSAGE "mtd button"
+#define FTD_MESSAGE "ftd button"
+
+// Types
+typedef struct ButtonArray
+{
+ GPIO_Port_TypeDef port;
+ unsigned int pin;
+} ButtonArray_t;
+
+// Prototypes
+bool sleepCb(void);
+void setNetworkConfiguration(otInstance *aInstance);
+void handleNetifStateChanged(uint32_t aFlags, void *aContext);
+void gpioInit(void (*gpioCallback)(uint8_t pin));
+void buttonCallback(uint8_t pin);
+void initUdp(void);
+void applicationTick(void);
+void mtdReceiveCallback(void *aContext, otMessage *aMessage, const otMessageInfo *aMessageInfo);
+
+// Variables
+static otInstance * instance;
+static otUdpSocket sMtdSocket;
+static otSockAddr sMulticastSockAddr;
+static const ButtonArray_t sButtonArray[BSP_BUTTON_COUNT] = BSP_BUTTON_INIT;
+static bool sButtonPressed = false;
+static bool sRxOnIdleButtonPressed = false;
+static bool sLedOn = false;
+static bool sAllowDeepSleep = false;
+static bool sTaskletsPendingSem = true;
+
+int main(int argc, char *argv[])
+{
+ otLinkModeConfig config;
+
+ otSysInit(argc, argv);
+ gpioInit(buttonCallback);
+
+ instance = otInstanceInitSingle();
+ assert(instance);
+
+ otCliUartInit(instance);
+
+ otLinkSetPollPeriod(instance, SLEEPY_POLL_PERIOD_MS);
+ setNetworkConfiguration(instance);
+ otSetStateChangedCallback(instance, handleNetifStateChanged, instance);
+
+ config.mRxOnWhenIdle = true;
+ config.mSecureDataRequests = true;
+ config.mDeviceType = 0;
+ config.mNetworkData = 0;
+ otThreadSetLinkMode(instance, config);
+
+ initUdp();
+ otIp6SetEnabled(instance, true);
+ otThreadSetEnabled(instance, true);
+ efr32SetSleepCallback(sleepCb);
+
+ while (!otSysPseudoResetWasRequested())
+ {
+ otTaskletsProcess(instance);
+ otSysProcessDrivers(instance);
+
+ applicationTick();
+
+ // Put the EFR32 into deep sleep if callback sleepCb permits.
+ efr32Sleep();
+ }
+
+ otInstanceFinalize(instance);
+ return 0;
+}
+
+/*
+ * Callback from efr32Sleep to indicate if it is ok to go into sleep mode.
+ * This runs with interrupts disabled.
+ */
+bool sleepCb(void)
+{
+ bool allow;
+ allow = (sAllowDeepSleep && !sTaskletsPendingSem);
+ sTaskletsPendingSem = false;
+ return allow;
+}
+
+void otTaskletsSignalPending(otInstance *aInstance)
+{
+ (void)aInstance;
+ sTaskletsPendingSem = true;
+}
+
+/*
+ * Override default network settings, such as panid, so the devices can join a network
+ */
+void setNetworkConfiguration(otInstance *aInstance)
+{
+ static char aNetworkName[] = "SleepyEFR32";
+ otOperationalDataset aDataset;
+
+ memset(&aDataset, 0, sizeof(otOperationalDataset));
+
+ /*
+ * Fields that can be configured in otOperationDataset to override defaults:
+ * Network Name, Mesh Local Prefix, Extended PAN ID, PAN ID, Delay Timer,
+ * Channel, Channel Mask Page 0, Network Master Key, PSKc, Security Policy
+ */
+ aDataset.mActiveTimestamp = 1;
+ aDataset.mComponents.mIsActiveTimestampPresent = true;
+
+ /* Set Channel to 15 */
+ aDataset.mChannel = 15;
+ aDataset.mComponents.mIsChannelPresent = true;
+
+ /* Set Pan ID to 2222 */
+ aDataset.mPanId = (otPanId)0x2222;
+ aDataset.mComponents.mIsPanIdPresent = true;
+
+ /* Set Extended Pan ID to C0DE1AB5C0DE1AB5 */
+ uint8_t extPanId[OT_EXT_PAN_ID_SIZE] = {0xC0, 0xDE, 0x1A, 0xB5, 0xC0, 0xDE, 0x1A, 0xB5};
+ memcpy(aDataset.mExtendedPanId.m8, extPanId, sizeof(aDataset.mExtendedPanId));
+ aDataset.mComponents.mIsExtendedPanIdPresent = true;
+
+ /* Set master key to 1234C0DE1AB51234C0DE1AB51234C0DE */
+ uint8_t key[OT_MASTER_KEY_SIZE] = {0x12, 0x34, 0xC0, 0xDE, 0x1A, 0xB5, 0x12, 0x34, 0xC0, 0xDE, 0x1A, 0xB5};
+ memcpy(aDataset.mMasterKey.m8, key, sizeof(aDataset.mMasterKey));
+ aDataset.mComponents.mIsMasterKeyPresent = true;
+
+ /* Set Network Name to SleepyEFR32 */
+ size_t length = strlen(aNetworkName);
+ assert(length <= OT_NETWORK_NAME_MAX_SIZE);
+ memcpy(aDataset.mNetworkName.m8, aNetworkName, length);
+ aDataset.mComponents.mIsNetworkNamePresent = true;
+
+ otDatasetSetActive(aInstance, &aDataset);
+}
+
+void handleNetifStateChanged(uint32_t aFlags, void *aContext)
+{
+ otLinkModeConfig config;
+
+ if ((aFlags & OT_CHANGED_THREAD_ROLE) != 0)
+ {
+ otDeviceRole changedRole = otThreadGetDeviceRole(aContext);
+
+ switch (changedRole)
+ {
+ case OT_DEVICE_ROLE_LEADER:
+ case OT_DEVICE_ROLE_ROUTER:
+ break;
+
+ case OT_DEVICE_ROLE_CHILD:
+ config.mRxOnWhenIdle = 0;
+ config.mSecureDataRequests = true;
+ config.mDeviceType = 0;
+ config.mNetworkData = 0;
+ otThreadSetLinkMode(instance, config);
+ sAllowDeepSleep = true;
+ break;
+
+ case OT_DEVICE_ROLE_DETACHED:
+ case OT_DEVICE_ROLE_DISABLED:
+ break;
+ }
+ }
+}
+
+/*
+ * Provide, if required an "otPlatLog()" function
+ */
+#if OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_APP
+void otPlatLog(otLogLevel aLogLevel, otLogRegion aLogRegion, const char *aFormat, ...)
+{
+ OT_UNUSED_VARIABLE(aLogLevel);
+ OT_UNUSED_VARIABLE(aLogRegion);
+ OT_UNUSED_VARIABLE(aFormat);
+
+ va_list ap;
+ va_start(ap, aFormat);
+ otCliPlatLogv(aLogLevel, aLogRegion, aFormat, ap);
+ va_end(ap);
+}
+#endif
+
+void gpioInit(void (*callback)(uint8_t pin))
+{
+ // set up button GPIOs to input with pullups
+ for (int i = 0; i < BSP_BUTTON_COUNT; i++)
+ {
+ GPIO_PinModeSet(sButtonArray[i].port, sButtonArray[i].pin, gpioModeInputPull, 1);
+ }
+ // set up interrupt based callback function on falling edge
+ GPIOINT_Init();
+ GPIOINT_CallbackRegister(sButtonArray[0].pin, callback);
+ GPIOINT_CallbackRegister(sButtonArray[1].pin, callback);
+ GPIO_IntConfig(sButtonArray[0].port, sButtonArray[0].pin, false, true, true);
+ GPIO_IntConfig(sButtonArray[1].port, sButtonArray[1].pin, false, true, true);
+
+ BSP_LedsInit();
+ BSP_LedClear(0);
+ BSP_LedClear(1);
+}
+
+void initUdp(void)
+{
+ otError error;
+ otSockAddr sockaddr;
+
+ memset(&sMulticastSockAddr, 0, sizeof sMulticastSockAddr);
+ otIp6AddressFromString(MULTICAST_ADDR, &sMulticastSockAddr.mAddress);
+ sMulticastSockAddr.mPort = MULTICAST_PORT;
+
+ memset(&sockaddr, 0, sizeof(sockaddr));
+ sockaddr.mPort = RECV_PORT;
+
+ error = otUdpOpen(instance, &sMtdSocket, mtdReceiveCallback, NULL);
+
+ if (error != OT_ERROR_NONE)
+ {
+ return;
+ }
+
+ error = otUdpBind(&sMtdSocket, &sockaddr);
+
+ if (error != OT_ERROR_NONE)
+ {
+ otUdpClose(&sMtdSocket);
+ return;
+ }
+}
+
+void buttonCallback(uint8_t pin)
+{
+ if ((pin & 0x01) == 0x01)
+ {
+ sButtonPressed = true;
+ }
+ else if ((pin & 0x01) == 0x00)
+ {
+ sRxOnIdleButtonPressed = true;
+ }
+}
+
+void applicationTick(void)
+{
+ otError error = 0;
+ otMessageInfo messageInfo;
+ otMessage * message = NULL;
+ char * payload = MTD_MESSAGE;
+ otLinkModeConfig config;
+
+ if (sRxOnIdleButtonPressed == true)
+ {
+ sRxOnIdleButtonPressed = false;
+ sAllowDeepSleep = !sAllowDeepSleep;
+ config.mRxOnWhenIdle = !sAllowDeepSleep;
+ config.mSecureDataRequests = true;
+ config.mDeviceType = 0;
+ config.mNetworkData = 0;
+ otThreadSetLinkMode(instance, config);
+ }
+
+ if (sButtonPressed == true)
+ {
+ sButtonPressed = false;
+
+ memset(&messageInfo, 0, sizeof(messageInfo));
+ memcpy(&messageInfo.mPeerAddr, &sMulticastSockAddr.mAddress, sizeof messageInfo.mPeerAddr);
+ messageInfo.mPeerPort = sMulticastSockAddr.mPort;
+
+ message = otUdpNewMessage(instance, NULL);
+
+ if (message != NULL)
+ {
+ error = otMessageAppend(message, payload, (uint16_t)strlen(payload));
+
+ if (error == OT_ERROR_NONE)
+ {
+ error = otUdpSend(&sMtdSocket, message, &messageInfo);
+
+ if (error == OT_ERROR_NONE)
+ {
+ return;
+ }
+ }
+ }
+
+ if (message != NULL)
+ {
+ otMessageFree(message);
+ }
+ }
+}
+
+void mtdReceiveCallback(void *aContext, otMessage *aMessage, const otMessageInfo *aMessageInfo)
+{
+ OT_UNUSED_VARIABLE(aContext);
+ OT_UNUSED_VARIABLE(aMessage);
+ OT_UNUSED_VARIABLE(aMessageInfo);
+ uint8_t buf[1500];
+ int length;
+
+ length = otMessageRead(aMessage, otMessageGetOffset(aMessage), buf, sizeof(buf) - 1);
+ buf[length] = '\0';
+
+ if (strcmp((char *)buf, FTD_MESSAGE) == 0)
+ {
+ sLedOn = !sLedOn;
+
+ if (sLedOn)
+ {
+ BSP_LedSet(0);
+ }
+ else
+ {
+ BSP_LedClear(0);
+ }
+ }
+}
diff --git a/examples/platforms/efr32mg13/startup-gcc.c b/examples/platforms/efr32mg13/startup-gcc.c
new file mode 100644
index 0000000..85c9e2a
--- /dev/null
+++ b/examples/platforms/efr32mg13/startup-gcc.c
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2020, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file implements gcc-specific startup code for the efr32.
+ */
+
+__extension__ typedef int __guard __attribute__((mode(__DI__)));
+
+int __cxa_guard_acquire(__guard *g)
+{
+ return !*(char *)(g);
+}
+
+void __cxa_guard_release(__guard *g)
+{
+ *(char *)g = 1;
+}
+
+void __cxa_guard_abort(__guard *g)
+{
+ (void)g;
+}
+
+void __cxa_pure_virtual(void)
+{
+ while (1)
+ ;
+}
diff --git a/examples/platforms/efr32mg13/system.c b/examples/platforms/efr32mg13/system.c
new file mode 100644
index 0000000..beac140
--- /dev/null
+++ b/examples/platforms/efr32mg13/system.c
@@ -0,0 +1,180 @@
+/*
+ * Copyright (c) 2020, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * @brief
+ * This file includes the platform-specific initializers.
+ */
+
+#include <assert.h>
+#include <string.h>
+
+#include "openthread-system.h"
+#include <openthread/platform/uart.h>
+
+#include "common/logging.hpp"
+
+#include "bsp.h"
+#include "em_chip.h"
+#include "em_cmu.h"
+#include "em_core.h"
+#include "em_emu.h"
+#include "em_system.h"
+#include "hal-config.h"
+#include "hal_common.h"
+#include "rail.h"
+#include "sl_mpu.h"
+#include "sl_sleeptimer.h"
+
+#include "openthread-core-efr32-config.h"
+#include "platform-efr32.h"
+
+#if (HAL_FEM_ENABLE)
+#include "fem-control.h"
+#endif
+
+#define USE_EFR32_LOG \
+ ((OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED) || \
+ (OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_NCP_SPINEL))
+
+void halInitChipSpecific(void);
+
+otInstance *sInstance;
+static bool (*sCanSleepCallback)(void);
+
+void otSysInit(int argc, char *argv[])
+{
+ OT_UNUSED_VARIABLE(argc);
+ OT_UNUSED_VARIABLE(argv);
+ sl_status_t status;
+
+ __disable_irq();
+
+#undef FIXED_EXCEPTION
+#define FIXED_EXCEPTION(vectorNumber, functionName, deviceIrqn, deviceIrqHandler)
+#define EXCEPTION(vectorNumber, functionName, deviceIrqn, deviceIrqHandler, priorityLevel, subpriority) \
+ NVIC_SetPriority(deviceIrqn, NVIC_EncodePriority(PRIGROUP_POSITION, priorityLevel, subpriority));
+#include NVIC_CONFIG
+#undef EXCEPTION
+
+ NVIC_SetPriorityGrouping(PRIGROUP_POSITION);
+ CHIP_Init();
+ halInitChipSpecific();
+ BSP_Init(BSP_INIT_BCC);
+
+ CMU_ClockSelectSet(cmuClock_LFE, cmuSelect_LFRCO);
+ CMU_ClockEnable(cmuClock_CORELE, true);
+ CMU_ClockEnable(cmuClock_RTCC, true);
+ status = sl_sleeptimer_init();
+ assert(status == SL_STATUS_OK);
+
+#if (HAL_FEM_ENABLE)
+ initFem();
+ wakeupFem();
+#endif
+
+ __enable_irq();
+
+#if USE_EFR32_LOG
+ efr32LogInit();
+#endif
+ efr32RadioInit();
+ efr32AlarmInit();
+ efr32MiscInit();
+ efr32RandomInit();
+}
+
+bool otSysPseudoResetWasRequested(void)
+{
+ return false;
+}
+
+void otSysDeinit(void)
+{
+ efr32RadioDeinit();
+
+#if USE_EFR32_LOG
+ efr32LogDeinit();
+#endif
+}
+
+void efr32SetSleepCallback(bool (*aCallback)(void))
+{
+ sCanSleepCallback = aCallback;
+}
+
+void efr32Sleep(void)
+{
+ bool canDeepSleep = false;
+ int wakeupProcessTime = 1000;
+ CORE_DECLARE_IRQ_STATE;
+
+ if (RAIL_Sleep(wakeupProcessTime, &canDeepSleep) == RAIL_STATUS_NO_ERROR)
+ {
+ if (canDeepSleep)
+ {
+ CORE_ENTER_ATOMIC();
+ if (sCanSleepCallback != NULL && sCanSleepCallback())
+ {
+ EMU_EnterEM2(true);
+ }
+ CORE_EXIT_ATOMIC();
+ // TODO OT will handle an interrupt here and it mustn't call any RAIL APIs
+
+ while (RAIL_Wake(0) != RAIL_STATUS_NO_ERROR)
+ {
+ }
+ }
+ else
+ {
+ CORE_ENTER_ATOMIC();
+ if (sCanSleepCallback != NULL && sCanSleepCallback())
+ {
+ EMU_EnterEM1();
+ }
+ CORE_EXIT_ATOMIC();
+ }
+ }
+}
+
+void otSysProcessDrivers(otInstance *aInstance)
+{
+ sInstance = aInstance;
+
+ // should sleep and wait for interrupts here
+
+ efr32UartProcess();
+ efr32RadioProcess(aInstance);
+ efr32AlarmProcess(aInstance);
+}
+
+__WEAK void otSysEventSignalPending(void)
+{
+ // Intentionally empty
+}
diff --git a/examples/platforms/efr32mg13/uart.c b/examples/platforms/efr32mg13/uart.c
new file mode 100644
index 0000000..f93f75f
--- /dev/null
+++ b/examples/platforms/efr32mg13/uart.c
@@ -0,0 +1,194 @@
+/*
+ * Copyright (c) 2020, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file implements the OpenThread platform abstraction for UART communication.
+ *
+ */
+
+#include <stddef.h>
+
+#include "openthread-system.h"
+#include <openthread/platform/uart.h>
+
+#include "utils/code_utils.h"
+
+#include "em_core.h"
+#include "uartdrv.h"
+
+#include "hal-config.h"
+
+enum
+{
+ kReceiveFifoSize = 128,
+};
+
+#define USART_INIT \
+ { \
+ USART0, /* USART port */ \
+ 115200, /* Baud rate */ \
+ BSP_SERIAL_APP_TX_LOC, /* USART Tx pin location number */ \
+ BSP_SERIAL_APP_RX_LOC, /* USART Rx pin location number */ \
+ (USART_Stopbits_TypeDef)USART_FRAME_STOPBITS_ONE, /* Stop bits */ \
+ (USART_Parity_TypeDef)USART_FRAME_PARITY_NONE, /* Parity */ \
+ (USART_OVS_TypeDef)USART_CTRL_OVS_X16, /* Oversampling mode*/ \
+ false, /* Majority vote disable */ \
+ HAL_SERIAL_APP_FLOW_CONTROL, /* Flow control */ \
+ BSP_SERIAL_APP_CTS_PORT, /* CTS port number */ \
+ BSP_SERIAL_APP_CTS_PIN, /* CTS pin number */ \
+ BSP_SERIAL_APP_RTS_PORT, /* RTS port number */ \
+ BSP_SERIAL_APP_RTS_PIN, /* RTS pin number */ \
+ (UARTDRV_Buffer_FifoQueue_t *)&sUartRxQueue, /* RX operation queue */ \
+ (UARTDRV_Buffer_FifoQueue_t *)&sUartTxQueue, /* TX operation queue */ \
+ BSP_SERIAL_APP_CTS_LOC, /* CTS location */ \
+ BSP_SERIAL_APP_RTS_LOC /* RTS location */ \
+ }
+
+DEFINE_BUF_QUEUE(EMDRV_UARTDRV_MAX_CONCURRENT_RX_BUFS, sUartRxQueue);
+DEFINE_BUF_QUEUE(EMDRV_UARTDRV_MAX_CONCURRENT_TX_BUFS, sUartTxQueue);
+
+static UARTDRV_HandleData_t sUartHandleData;
+static UARTDRV_Handle_t sUartHandle = &sUartHandleData;
+static uint8_t sReceiveBuffer[2];
+static const uint8_t * sTransmitBuffer = NULL;
+static volatile uint16_t sTransmitLength = 0;
+
+typedef struct ReceiveFifo_t
+{
+ // The data buffer
+ uint8_t mBuffer[kReceiveFifoSize];
+ // The offset of the first item written to the list.
+ volatile uint16_t mHead;
+ // The offset of the next item to be written to the list.
+ volatile uint16_t mTail;
+} ReceiveFifo_t;
+
+static ReceiveFifo_t sReceiveFifo;
+
+static void processReceive(void);
+
+static void receiveDone(UARTDRV_Handle_t aHandle, Ecode_t aStatus, uint8_t *aData, UARTDRV_Count_t aCount)
+{
+ // We can only write if incrementing mTail doesn't equal mHead
+ if (sReceiveFifo.mHead != (sReceiveFifo.mTail + 1) % kReceiveFifoSize)
+ {
+ sReceiveFifo.mBuffer[sReceiveFifo.mTail] = aData[0];
+ sReceiveFifo.mTail = (sReceiveFifo.mTail + 1) % kReceiveFifoSize;
+ }
+
+ UARTDRV_Receive(aHandle, aData, 1, receiveDone);
+ otSysEventSignalPending();
+}
+
+static void transmitDone(UARTDRV_Handle_t aHandle, Ecode_t aStatus, uint8_t *aData, UARTDRV_Count_t aCount)
+{
+ sTransmitLength = 0;
+ otSysEventSignalPending();
+}
+
+static void processReceive(void)
+{
+ // Copy tail to prevent multiple reads
+ uint16_t tail = sReceiveFifo.mTail;
+
+ // If the data wraps around, process the first part
+ if (sReceiveFifo.mHead > tail)
+ {
+ otPlatUartReceived(sReceiveFifo.mBuffer + sReceiveFifo.mHead, kReceiveFifoSize - sReceiveFifo.mHead);
+
+ // Reset the buffer mHead back to zero.
+ sReceiveFifo.mHead = 0;
+ }
+
+ // For any data remaining, process it
+ if (sReceiveFifo.mHead != tail)
+ {
+ otPlatUartReceived(sReceiveFifo.mBuffer + sReceiveFifo.mHead, tail - sReceiveFifo.mHead);
+
+ // Set mHead to the local tail we have cached
+ sReceiveFifo.mHead = tail;
+ }
+}
+
+otError otPlatUartFlush(void)
+{
+ return OT_ERROR_NOT_IMPLEMENTED;
+}
+
+static void processTransmit(void)
+{
+ if (sTransmitBuffer != NULL && sTransmitLength == 0)
+ {
+ sTransmitBuffer = NULL;
+ otPlatUartSendDone();
+ }
+}
+
+otError otPlatUartEnable(void)
+{
+ UARTDRV_Init_t uartInit = USART_INIT;
+
+ sReceiveFifo.mHead = 0;
+ sReceiveFifo.mTail = 0;
+
+ UARTDRV_Init(sUartHandle, &uartInit);
+
+ for (uint8_t i = 0; i < sizeof(sReceiveBuffer); i++)
+ {
+ UARTDRV_Receive(sUartHandle, &sReceiveBuffer[i], sizeof(sReceiveBuffer[i]), receiveDone);
+ }
+
+ return OT_ERROR_NONE;
+}
+
+otError otPlatUartDisable(void)
+{
+ return OT_ERROR_NOT_IMPLEMENTED;
+}
+
+otError otPlatUartSend(const uint8_t *aBuf, uint16_t aBufLength)
+{
+ otError error = OT_ERROR_NONE;
+
+ otEXPECT_ACTION(sTransmitBuffer == NULL, error = OT_ERROR_BUSY);
+
+ sTransmitBuffer = aBuf;
+ sTransmitLength = aBufLength;
+
+ UARTDRV_Transmit(sUartHandle, (uint8_t *)sTransmitBuffer, sTransmitLength, transmitDone);
+
+exit:
+ return error;
+}
+
+void efr32UartProcess(void)
+{
+ processReceive();
+ processTransmit();
+}
diff --git a/examples/platforms/efr32mg21/Makefile.am b/examples/platforms/efr32mg21/Makefile.am
index c84ee64..f11691b 100644
--- a/examples/platforms/efr32mg21/Makefile.am
+++ b/examples/platforms/efr32mg21/Makefile.am
@@ -28,51 +28,65 @@
include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
-lib_LIBRARIES = libopenthread-efr32mg21.a
+lib_LIBRARIES = libopenthread-efr32mg21.a
# Do not enable -Wconversion for rail
-override CFLAGS := $(filter-out -Wconversion,$(CFLAGS))
-override CXXFLAGS := $(filter-out -Wconversion,$(CXXFLAGS))
+override CFLAGS := $(filter-out -Wconversion,$(CFLAGS))
+override CXXFLAGS := $(filter-out -Wconversion,$(CXXFLAGS))
# Do not enable -pedantic-errors for rail
-override CFLAGS := $(filter-out -pedantic-errors,$(CFLAGS))
-override CXXFLAGS := $(filter-out -pedantic-errors,$(CXXFLAGS))
+override CFLAGS := $(filter-out -pedantic-errors,$(CFLAGS))
+override CXXFLAGS := $(filter-out -pedantic-errors,$(CXXFLAGS))
-EFR32_BOARD_DIR = $(shell echo $(BOARD) | tr A-Z a-z)
+# Do not enable -Wundef for rail
+override CFLAGS := $(filter-out -Wundef,$(CFLAGS))
+override CXXFLAGS := $(filter-out -Wundef,$(CXXFLAGS))
-EFR32MG_SDK_SRCDIR = $(top_srcdir)/third_party/silabs/gecko_sdk_suite/v2.6
+EFR32_BOARD_DIR = $(shell echo $(BOARD) | tr A-Z a-z)
+
+SDK_SRC_DIR = $(top_srcdir)/third_party/silabs/gecko_sdk_suite/v2.7
libopenthread_efr32mg21_a_CPPFLAGS = \
- -D__START=main \
- -D__STARTUP_CLEAR_BSS \
- -I$(top_srcdir)/include \
+ -DEFR32_SERIES2_CONFIG1_MICRO \
+ -DNVIC_CONFIG=\"platform/base/hal/micro/cortexm3/efm32/nvic-config.h\" \
+ -DPLATFORM_HEADER=\"platform/base/hal/micro/cortexm3/compiler/gcc.h\" \
+ -Wno-sign-compare \
-I$(top_srcdir)/examples/platforms \
-I$(top_srcdir)/examples/platforms/efr32mg21/$(EFR32_BOARD_DIR) \
+ -I$(top_srcdir)/include \
-I$(top_srcdir)/src/core \
-I$(top_srcdir)/third_party/silabs/rail_config \
- -I$(EFR32MG_SDK_SRCDIR) \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/common \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/chip/efr32 \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/protocol/ieee802154 \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/chip/efr32/rf/common/cortex \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/hal \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/hal/efr32 \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/plugin/pa-conversions \
- -I$(EFR32MG_SDK_SRCDIR)/hardware/kit/common/bsp \
- -I$(EFR32MG_SDK_SRCDIR)/hardware/kit/EFR32MG21_$(BOARD)/config \
- -I$(EFR32MG_SDK_SRCDIR)/platform/CMSIS/Include \
- -I$(EFR32MG_SDK_SRCDIR)/platform/Device/SiliconLabs/EFR32MG21/Include \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/common/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/gpiointerrupt/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/uartdrv/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/uartdrv/config \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/ustimer/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/dmadrv/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/dmadrv/config \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/rtcdrv/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emlib/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/halconfig/inc/hal-config \
- -I$(EFR32MG_SDK_SRCDIR)/util/plugin/plugin-common/fem-control \
+ -I$(SDK_SRC_DIR) \
+ -I$(SDK_SRC_DIR)/hardware/kit/common/bsp \
+ -I$(SDK_SRC_DIR)/hardware/kit/common/drivers \
+ -I$(SDK_SRC_DIR)/hardware/kit/EFR32MG21_$(BOARD)/config \
+ -I$(SDK_SRC_DIR)/platform/base/hal/micro/cortexm3/efm32 \
+ -I$(SDK_SRC_DIR)/platform/base/hal/micro/cortexm3/efm32/config \
+ -I$(SDK_SRC_DIR)/platform/common/inc \
+ -I$(SDK_SRC_DIR)/platform/CMSIS/Include \
+ -I$(SDK_SRC_DIR)/platform/Device/SiliconLabs/EFR32MG21P/Include \
+ -I$(SDK_SRC_DIR)/platform/emdrv/common/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/gpiointerrupt/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/uartdrv/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/uartdrv/config \
+ -I$(SDK_SRC_DIR)/platform/emdrv/ustimer/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/dmadrv/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/dmadrv/config \
+ -I$(SDK_SRC_DIR)/platform/emlib/inc \
+ -I$(SDK_SRC_DIR)/platform/halconfig/inc/hal-config \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32/efr32xg2x \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32/rf/common/cortex \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/common \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/hal \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/hal/efr32 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/protocol/ieee802154 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/plugin/pa-conversions \
+ -I$(SDK_SRC_DIR)/platform/service/mpu/inc \
+ -I$(SDK_SRC_DIR)/platform/service/sleeptimer/config \
+ -I$(SDK_SRC_DIR)/platform/service/sleeptimer/inc \
+ -I$(SDK_SRC_DIR)/util/plugin/plugin-common/fem-control \
+ -I$(SDK_SRC_DIR)/util/third_party/mbedtls/sl_crypto/include \
-Wno-unused-parameter \
-Wno-missing-field-initializers \
$(NULL)
@@ -86,8 +100,10 @@
logging.c \
misc.c \
openthread-core-efr32-config.h \
- openthread-core-efr32-config-check.h \
+ platform-efr32.h \
+ platform-band.h \
radio.c \
+ rail_config.h \
startup-gcc.c \
system.c \
uart.c \
@@ -104,12 +120,23 @@
PRETTY_FILES = \
$(PLATFORM_SOURCES) \
- $(noinst_HEADERS) \
$(NULL)
-Dash = -
+Dash = -
libopenthread_efr32mg21_a_LIBADD = \
$(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o") \
$(shell find $(top_builddir)/third_party/jlink/SEGGER_RTT_V640/RTT $(Dash)type f $(Dash)name "*.o")
+DIST_SUBDIRS = \
+ sleepy-demo \
+ $(NULL)
+
+SUBDIRS = \
+ sleepy-demo \
+ $(NULL)
+
+PRETTY_SUBDIRS = \
+ sleepy-demo \
+ $(NULL)
+
include $(abs_top_nlbuild_autotools_dir)/automake/post.am
diff --git a/examples/platforms/efr32mg21/Makefile.platform.am b/examples/platforms/efr32mg21/Makefile.platform.am
index a626d88..adcfac4 100644
--- a/examples/platforms/efr32mg21/Makefile.platform.am
+++ b/examples/platforms/efr32mg21/Makefile.platform.am
@@ -30,12 +30,19 @@
# efr32mg21 platform-specific Makefile
#
-LDADD_COMMON += \
+LIBRAIL = $(shell \
+if [ "$(DMP)" = "1" ]; then \
+ echo "librail_multiprotocol_efr32xg21_gcc_release.a"; \
+else \
+ echo "librail_efr32xg21_gcc_release.a"; \
+fi )
+
+LDADD_COMMON += \
$(top_builddir)/examples/platforms/efr32mg21/libopenthread-efr32mg21.a \
$(top_builddir)/third_party/silabs/libsilabs-efr32mg21-sdk.a \
- $(top_srcdir)/third_party/silabs/gecko_sdk_suite/v2.6/platform/radio/rail_lib/autogen/librail_release/librail_efr32xg21_gcc_release.a \
+ $(top_srcdir)/third_party/silabs/gecko_sdk_suite/v2.7/platform/radio/rail_lib/autogen/librail_release/$(LIBRAIL) \
$(NULL)
-LDFLAGS_COMMON += \
- -T $(top_srcdir)/third_party/silabs/gecko_sdk_suite/v2.6/platform/Device/SiliconLabs/EFR32MG21/Source/GCC/efr32mg21.ld \
+LDFLAGS_COMMON += \
+ -T $(top_srcdir)/third_party/silabs/gecko_sdk_suite/v2.7/platform/Device/SiliconLabs/EFR32MG21/Source/GCC/efr32mg21.ld \
$(NULL)
diff --git a/examples/platforms/efr32mg21/README.md b/examples/platforms/efr32mg21/README.md
index 718ca0a..07c21a1 100644
--- a/examples/platforms/efr32mg21/README.md
+++ b/examples/platforms/efr32mg21/README.md
@@ -36,8 +36,8 @@
2. Install Flex (Gecko) SDK including RAIL Library from Simplicity Studio.
- Connect EFR32MG21 Wireless Starter Kit to Simplicity Studio.
- - Find Flex SDK v2.6 in the Software Update page and click Install.
- - Flex SDK v2.6 will be installed in the path: `/SimplicityStudio_v4/developer/sdks/gecko_sdk_suite`.
+ - Find Flex SDK v2.7 in the Software Update page and click Install.
+ - Flex SDK v2.7 will be installed in the path: `/SimplicityStudio_v4/developer/sdks/gecko_sdk_suite`.
For more information on configuring, building, and installing applications for the Wireless Gecko (EFR32)
portfolio using FLEX, see [Getting Started with the Silicon Labs Flex Software Development Kit for the
@@ -72,7 +72,7 @@
core_cm33.h can be found at:
```
-<path-to-Simplicity-Studio>/developer/sdks/gecko_sdk_suite/v2.6/platform/CMSIS/Include
+<path-to-Simplicity-Studio>/developer/sdks/gecko_sdk_suite/v2.7/platform/CMSIS/Include
```
4. Build OpenThread Firmware (CLI example) on EFR32 platform.
@@ -213,4 +213,4 @@
- gcc version 7.3.1
The EFR32 example has been verified with following Flex SDK/RAIL Library version:
- - Flex SDK version 2.6.0.0
+ - Flex SDK version 2.7.0.0
diff --git a/examples/platforms/efr32mg21/alarm.c b/examples/platforms/efr32mg21/alarm.c
index 36b265f..4004498 100644
--- a/examples/platforms/efr32mg21/alarm.c
+++ b/examples/platforms/efr32mg21/alarm.c
@@ -32,58 +32,49 @@
*
*/
+#include <assert.h>
#include <stdbool.h>
#include <stdint.h>
+#include "openthread-system.h"
#include <openthread/config.h>
#include <openthread/platform/alarm-milli.h>
#include <openthread/platform/diag.h>
+#include "common/logging.hpp"
+#include "platform-efr32.h"
#include "utils/code_utils.h"
#include "em_core.h"
#include "rail.h"
+#include "sl_sleeptimer.h"
#define XTAL_ACCURACY 200
-#define US_IN_MS 1000
-static uint32_t sTimerHi = 0;
-static uint32_t sTimerLo = 0;
-static uint32_t sAlarmT0 = 0;
-static uint32_t sAlarmDt = 0;
-static bool sIsRunning = false;
+static sl_sleeptimer_timer_handle_t sl_handle;
+static uint32_t sAlarm = 0;
+static bool sIsRunning = false;
+
+static void AlarmCallback(sl_sleeptimer_timer_handle_t *aHandle, void *aData)
+{
+ otSysEventSignalPending();
+}
void efr32AlarmInit(void)
{
-}
-
-uint64_t otPlatTimeGet(void)
-{
- uint32_t timer_lo;
- uint64_t timer_us;
-
- CORE_DECLARE_IRQ_STATE;
- CORE_ENTER_CRITICAL();
-
- timer_lo = RAIL_GetTime();
-
- if (timer_lo < sTimerLo)
- {
- sTimerHi++;
- }
-
- sTimerLo = timer_lo;
-
- timer_us = (((uint64_t)sTimerHi << 32) | sTimerLo);
-
- CORE_EXIT_CRITICAL();
-
- return timer_us;
+ memset(&sl_handle, 0, sizeof sl_handle);
}
uint32_t otPlatAlarmMilliGetNow(void)
{
- return otPlatTimeGet() / US_IN_MS;
+ uint64_t ticks;
+ uint64_t now;
+ sl_status_t status;
+
+ ticks = sl_sleeptimer_get_tick_count64();
+ status = sl_sleeptimer_tick64_to_ms(ticks, &now);
+ assert(status == SL_STATUS_OK);
+ return (uint32_t)now;
}
uint32_t otPlatTimeGetXtalAccuracy(void)
@@ -91,62 +82,64 @@
return XTAL_ACCURACY;
}
-void otPlatAlarmMilliStartAt(otInstance *aInstance, uint32_t t0, uint32_t dt)
+void otPlatAlarmMilliStartAt(otInstance *aInstance, uint32_t aT0, uint32_t aDt)
{
OT_UNUSED_VARIABLE(aInstance);
+ sl_status_t status;
+ int32_t remaining;
+ uint32_t ticks;
- sAlarmT0 = t0;
- sAlarmDt = dt;
+ sl_sleeptimer_stop_timer(&sl_handle);
+
+ sAlarm = aT0 + aDt;
+ remaining = (int32_t)(sAlarm - otPlatAlarmMilliGetNow());
sIsRunning = true;
+
+ if (remaining <= 0)
+ {
+ otSysEventSignalPending();
+ }
+ else
+ {
+ status = sl_sleeptimer_ms32_to_tick(remaining, &ticks);
+ assert(status == SL_STATUS_OK);
+
+ status = sl_sleeptimer_start_timer(&sl_handle, ticks, AlarmCallback, NULL, 0,
+ SL_SLEEPTIMER_NO_HIGH_PRECISION_HF_CLOCKS_REQUIRED_FLAG);
+ assert(status == SL_STATUS_OK);
+ }
}
void otPlatAlarmMilliStop(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
+ sl_sleeptimer_stop_timer(&sl_handle);
sIsRunning = false;
}
void efr32AlarmProcess(otInstance *aInstance)
{
- uint32_t now = otPlatAlarmMilliGetNow();
- uint32_t expires;
- bool fire = false;
+ int32_t remaining;
- otEXPECT(sIsRunning);
-
- expires = sAlarmT0 + sAlarmDt;
-
- if (sAlarmT0 <= now)
+ if (sIsRunning)
{
- fire = (expires >= sAlarmT0 && expires <= now);
- }
- else
- {
- fire = (expires >= sAlarmT0 || expires <= now);
- }
+ remaining = (int32_t)(sAlarm - otPlatAlarmMilliGetNow());
- if (fire)
- {
- sIsRunning = false;
+ if (remaining <= 0)
+ {
+ sIsRunning = false;
#if OPENTHREAD_CONFIG_DIAG_ENABLE
-
- if (otPlatDiagModeGet())
- {
- otPlatDiagAlarmFired(aInstance);
- }
- else
+ if (otPlatDiagModeGet())
+ {
+ otPlatDiagAlarmFired(aInstance);
+ }
+ else
#endif
- {
- otPlatAlarmMilliFired(aInstance);
+ {
+ otPlatAlarmMilliFired(aInstance);
+ }
}
}
-
-exit:
- return;
-}
-
-void RAILCb_TimerExpired(void)
-{
}
diff --git a/examples/platforms/efr32mg21/brd4180a/board_config.h b/examples/platforms/efr32mg21/brd4180a/board_config.h
index 37521f0..ee009f6 100644
--- a/examples/platforms/efr32mg21/brd4180a/board_config.h
+++ b/examples/platforms/efr32mg21/brd4180a/board_config.h
@@ -35,6 +35,14 @@
#ifndef __BOARD_CONFIG_H__
#define __BOARD_CONFIG_H__
-#define RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT 1 ///< Dev board suppports OQPSK modulation in 2.4GHz band.
+#define RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT 1 /// Dev board suppports OQPSK modulation in 2.4GHz band.
+
+#ifndef RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+#define RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT 0 /// Set to 1 to enable debug counters in radio.c
+#endif
+
+#ifndef RADIO_CONFIG_DMP_SUPPORT
+#define RADIO_CONFIG_DMP_SUPPORT 0 /// Set to 1 to enable Dynamic Multi-Protocol support in radio.c
+#endif
#endif // __BOARD_CONFIG_H__
diff --git a/examples/platforms/efr32mg21/fem-control.c b/examples/platforms/efr32mg21/fem-control.c
index 463f5cd..e9093d1 100644
--- a/examples/platforms/efr32mg21/fem-control.c
+++ b/examples/platforms/efr32mg21/fem-control.c
@@ -29,5 +29,5 @@
#include "hal-config.h"
#if (HAL_FEM_ENABLE)
-#include "../../../third_party/silabs/gecko_sdk_suite/v2.6/util/plugin/plugin-common/fem-control/fem-control.c"
+#include "util/plugin/plugin-common/fem-control/fem-control.c"
#endif
diff --git a/examples/platforms/efr32mg21/openthread-core-efr32-config.h b/examples/platforms/efr32mg21/openthread-core-efr32-config.h
index 1cc9518..95bead1 100644
--- a/examples/platforms/efr32mg21/openthread-core-efr32-config.h
+++ b/examples/platforms/efr32mg21/openthread-core-efr32-config.h
@@ -62,7 +62,7 @@
* Define to 1 if you want to enable physical layer to support OQPSK modulation in 2.4GHz band.
*
*/
-#ifdef RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT
+#if RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT
#define OPENTHREAD_CONFIG_RADIO_2P4GHZ_OQPSK_SUPPORT 1
#else
#define OPENTHREAD_CONFIG_RADIO_2P4GHZ_OQPSK_SUPPORT 0
diff --git a/examples/platforms/efr32mg21/platform-band.h b/examples/platforms/efr32mg21/platform-band.h
index 9afdd02..fb82093 100644
--- a/examples/platforms/efr32mg21/platform-band.h
+++ b/examples/platforms/efr32mg21/platform-band.h
@@ -41,6 +41,40 @@
#include "rail_config.h"
#include "rail_ieee802154.h"
+#define RAIL_TX_FIFO_SIZE (OT_RADIO_FRAME_MAX_SIZE + 1)
+
+#define RADIO_SCHEDULER_BACKGROUND_RX_PRIORITY 255
+#define RADIO_SCHEDULER_CHANNEL_SCAN_PRIORITY 255
+#define RADIO_SCHEDULER_CHANNEL_SLIP_TIME 500000UL
+#define RADIO_SCHEDULER_TX_PRIORITY 100
+#define RADIO_SCHEDULER_TX_SLIP_TIME 500000UL
+
+#define RADIO_TIMING_CSMA_OVERHEAD_US 500
+#define RADIO_TIMING_DEFAULT_BYTETIME_US 32 // only used if RAIL_GetBitRate returns 0
+#define RADIO_TIMING_DEFAULT_SYMBOLTIME_US 16 // only used if RAIL_GetSymbolRate returns 0
+
+typedef struct efr32RadioCounters
+{
+ uint64_t mRailPlatTxTriggered;
+ uint64_t mRailPlatRadioReceiveDoneCbCount;
+ uint64_t mRailPlatRadioEnergyScanDoneCbCount;
+ uint64_t mRailPlatRadioTxDoneCbCount;
+ uint64_t mRailTxStarted;
+ uint64_t mRailTxStartFailed;
+ uint64_t mRailEventConfigScheduled;
+ uint64_t mRailEventConfigUnScheduled;
+ uint64_t mRailEventPacketSent;
+ uint64_t mRailEventChannelBusy;
+ uint64_t mRailEventEnergyScanCompleted;
+ uint64_t mRailEventCalNeeded;
+ uint64_t mRailEventPacketReceived;
+ uint64_t mRailEventNoAck;
+ uint64_t mRailEventTxAbort;
+ uint64_t mRailEventSchedulerStatusError;
+ uint64_t mRailEventsSchedulerStatusTransmitBusy;
+ uint32_t mRailEventsSchedulerStatusLastStatus;
+} efr32RadioCounters;
+
typedef struct efr32BandConfig
{
RAIL_Handle_t mRailHandle;
diff --git a/examples/platforms/efr32mg21/platform-efr32.h b/examples/platforms/efr32mg21/platform-efr32.h
index b3c0f18..0f62c47 100644
--- a/examples/platforms/efr32mg21/platform-efr32.h
+++ b/examples/platforms/efr32mg21/platform-efr32.h
@@ -41,10 +41,14 @@
#include "em_system.h"
#include "core_cm33.h"
+#include "rail.h"
// Global OpenThread instance structure
extern otInstance *sInstance;
+// Global reference to rail handle
+extern RAIL_Handle_t gRailHandle;
+
/**
* This function initializes the alarm service used by OpenThread.
*
@@ -109,4 +113,26 @@
*/
void efr32LogDeinit(void);
+/**
+ * Registers the sleep callback handler. The callback is used to check that
+ * the application has no work pending and that it is safe to put the EFR32
+ * into a low energy sleep mode.
+ *
+ * The callback should return true if it is ok to enter sleep mode. Note
+ * that the callback itself is run with interrupts disabled and so should
+ * be kept as short as possible. Anny interrupt including those from timers
+ * will wake the EFR32 out of sleep mode.
+ *
+ * @param[in] aCallback Callback function.
+ *
+ */
+void efr32SetSleepCallback(bool (*aCallback)(void), void (*aCallbackWake)(void));
+
+/**
+ * Put the EFR32 into a low power mode. Before sleeping it will call a callback
+ * in the application registered with efr32SetSleepCallback to ensure that there
+ * is no outstanding work in the application to do.
+ */
+void efr32Sleep(void);
+
#endif // PLATFORM_EFR32_H_
diff --git a/examples/platforms/efr32mg21/radio.c b/examples/platforms/efr32mg21/radio.c
index b2b34dc..badb76b 100644
--- a/examples/platforms/efr32mg21/radio.c
+++ b/examples/platforms/efr32mg21/radio.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017, The OpenThread Authors.
+ * Copyright (c) 2019, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -34,6 +34,7 @@
#include <assert.h>
+#include "openthread-system.h"
#include <openthread/config.h>
#include <openthread/platform/alarm-milli.h>
#include <openthread/platform/diag.h>
@@ -45,6 +46,7 @@
#include "utils/soft_source_match_table.h"
#include "board_config.h"
+#include "em_cmu.h"
#include "em_core.h"
#include "em_system.h"
#include "openthread-core-efr32-config.h"
@@ -98,6 +100,8 @@
ENERGY_SCAN_MODE_ASYNC
} energyScanMode;
+RAIL_Handle_t gRailHandle;
+
static volatile bool sTransmitBusy = false;
static bool sPromiscuous = false;
static bool sIsSrcMatchEnabled = false;
@@ -113,6 +117,10 @@
static efr32BandConfig sBandConfigs[EFR32_NUM_BAND_CONFIGS];
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+static efr32RadioCounters sRailDebugCounters;
+#endif
+
static volatile energyScanStatus sEnergyScanStatus;
static volatile int8_t sEnergyScanResultDbm;
static energyScanMode sEnergyScanMode;
@@ -197,27 +205,28 @@
status = RAIL_ConfigEvents(handle, RAIL_EVENTS_ALL,
RAIL_EVENT_RX_ACK_TIMEOUT | //
- RAIL_EVENT_TX_PACKET_SENT | //
+ RAIL_EVENTS_TX_COMPLETION | //
RAIL_EVENT_RX_PACKET_RECEIVED | //
RAIL_EVENT_RSSI_AVERAGE_DONE | //
- RAIL_EVENT_SCHEDULER_STATUS | //
- RAIL_EVENT_TX_CHANNEL_BUSY | //
- RAIL_EVENT_TX_ABORTED | //
- RAIL_EVENT_TX_BLOCKED | //
- RAIL_EVENT_TX_UNDERFLOW | //
RAIL_EVENT_IEEE802154_DATA_REQUEST_COMMAND | //
- RAIL_EVENT_CAL_NEEDED //
+ RAIL_EVENT_CAL_NEEDED | //
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ RAIL_EVENT_CONFIG_SCHEDULED | //
+ RAIL_EVENT_CONFIG_UNSCHEDULED | //
+#endif
+ RAIL_EVENT_SCHEDULER_STATUS //
);
assert(status == RAIL_STATUS_NO_ERROR);
- RAIL_SetTxFifo(handle, aBandConfig->mRailTxFifo, 0, sizeof(aBandConfig->mRailTxFifo));
+ uint16_t actualLength = RAIL_SetTxFifo(handle, aBandConfig->mRailTxFifo, 0, sizeof(aBandConfig->mRailTxFifo));
+ assert(actualLength == sizeof(aBandConfig->mRailTxFifo));
return handle;
}
static void efr32RadioSetTxPower(RAIL_Handle_t aRailHandle,
const RAIL_ChannelConfig_t *aChannelConfig,
- uint8_t aPowerDbm)
+ int8_t aPowerDbm)
{
RAIL_Status_t status;
const RAIL_TxPowerCurvesConfigAlt_t txPowerCurvesConfig = RAIL_DECLARE_TX_POWER_CURVES_CONFIG_ALT;
@@ -281,7 +290,11 @@
sTxBandConfig = sRxBandConfig;
efr32RadioSetTxPower(sTxBandConfig->mRailHandle, sTxBandConfig->mChannelConfig, sTxPowerDbm);
+ gRailHandle = sTxBandConfig->mRailHandle; // global handle for alarms.
+
sEnergyScanStatus = ENERGY_SCAN_STATUS_IDLE;
+ sTransmitError = OT_ERROR_NONE;
+ sTransmitBusy = false;
otLogInfoPlat("Initialized", NULL);
}
@@ -306,9 +319,8 @@
static otError efr32StartEnergyScan(energyScanMode aMode, uint16_t aChannel, RAIL_Time_t aAveragingTimeUs)
{
- RAIL_Status_t status;
- RAIL_SchedulerInfo_t schedulerInfo = {.priority = EFR32_SCHEDULER_SAMPLE_RSSI_PRIORITY};
- otError error = OT_ERROR_NONE;
+ RAIL_Status_t status;
+ otError error = OT_ERROR_NONE;
otEXPECT_ACTION(sEnergyScanStatus == ENERGY_SCAN_STATUS_IDLE, error = OT_ERROR_BUSY);
@@ -317,7 +329,11 @@
RAIL_Idle(sRxBandConfig->mRailHandle, RAIL_IDLE, true);
- status = RAIL_StartAverageRssi(sRxBandConfig->mRailHandle, aChannel, aAveragingTimeUs, &schedulerInfo);
+ RAIL_SchedulerInfo_t scanSchedulerInfo = {.priority = RADIO_SCHEDULER_CHANNEL_SCAN_PRIORITY,
+ .slipTime = RADIO_SCHEDULER_CHANNEL_SLIP_TIME,
+ .transactionTime = aAveragingTimeUs};
+
+ status = RAIL_StartAverageRssi(sRxBandConfig->mRailHandle, aChannel, aAveragingTimeUs, &scanSchedulerInfo);
otEXPECT_ACTION(status == RAIL_STATUS_NO_ERROR, error = OT_ERROR_FAILED);
exit:
@@ -427,12 +443,12 @@
error = OT_ERROR_INVALID_STATE);
otLogInfoPlat("State=OT_RADIO_STATE_SLEEP", NULL);
- sState = OT_RADIO_STATE_SLEEP;
for (uint8_t i = 0; i < EFR32_NUM_BAND_CONFIGS; i++)
{
RAIL_Idle(sBandConfigs[i].mRailHandle, RAIL_IDLE, true);
}
+ sState = OT_RADIO_STATE_SLEEP;
exit:
return error;
@@ -440,10 +456,9 @@
otError otPlatRadioReceive(otInstance *aInstance, uint8_t aChannel)
{
- otError error = OT_ERROR_NONE;
- RAIL_SchedulerInfo_t schedulerInfo = {.priority = EFR32_SCHEDULER_RX_PRIORITY};
- RAIL_Status_t status;
- efr32BandConfig * config;
+ otError error = OT_ERROR_NONE;
+ RAIL_Status_t status;
+ efr32BandConfig *config;
OT_UNUSED_VARIABLE(aInstance);
otEXPECT_ACTION(sState != OT_RADIO_STATE_DISABLED, error = OT_ERROR_INVALID_STATE);
@@ -457,7 +472,12 @@
sRxBandConfig = config;
}
- status = RAIL_StartRx(sRxBandConfig->mRailHandle, aChannel, &schedulerInfo);
+ RAIL_SchedulerInfo_t bgRxSchedulerInfo = {
+ .priority = RADIO_SCHEDULER_BACKGROUND_RX_PRIORITY,
+ // sliptime/transaction time is not used for bg rx
+ };
+
+ status = RAIL_StartRx(sRxBandConfig->mRailHandle, aChannel, &bgRxSchedulerInfo);
otEXPECT_ACTION(status == RAIL_STATUS_NO_ERROR, error = OT_ERROR_FAILED);
otLogInfoPlat("State=OT_RADIO_STATE_RECEIVE", NULL);
@@ -470,13 +490,18 @@
otError otPlatRadioTransmit(otInstance *aInstance, otRadioFrame *aFrame)
{
- otError error = OT_ERROR_NONE;
- RAIL_CsmaConfig_t csmaConfig = RAIL_CSMA_CONFIG_802_15_4_2003_2p4_GHz_OQPSK_CSMA;
- RAIL_TxOptions_t txOptions = RAIL_TX_OPTIONS_NONE;
- RAIL_SchedulerInfo_t schedulerInfo = {.priority = EFR32_SCHEDULER_TX_PRIORITY};
- efr32BandConfig * config;
- RAIL_Status_t status;
- uint8_t frameLength;
+ otError error = OT_ERROR_NONE;
+ RAIL_CsmaConfig_t csmaConfig = RAIL_CSMA_CONFIG_802_15_4_2003_2p4_GHz_OQPSK_CSMA;
+ RAIL_TxOptions_t txOptions = RAIL_TX_OPTIONS_NONE;
+ efr32BandConfig * config;
+ RAIL_Status_t status;
+ uint8_t frameLength;
+
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailPlatTxTriggered++;
+#endif
+
+ assert(sTransmitBusy == false);
otEXPECT_ACTION((sState != OT_RADIO_STATE_DISABLED) && (sState != OT_RADIO_STATE_TRANSMIT),
error = OT_ERROR_INVALID_STATE);
@@ -494,32 +519,72 @@
sTxBandConfig = config;
}
- otEXPECT(aFrame->mLength >= IEEE802154_MIN_LENGTH && aFrame->mLength <= IEEE802154_MAX_LENGTH);
frameLength = (uint8_t)aFrame->mLength;
RAIL_WriteTxFifo(sTxBandConfig->mRailHandle, &frameLength, sizeof frameLength, true);
RAIL_WriteTxFifo(sTxBandConfig->mRailHandle, aFrame->mPsdu, frameLength - 2, false);
+ RAIL_SchedulerInfo_t txSchedulerInfo = {
+ .priority = RADIO_SCHEDULER_TX_PRIORITY,
+ .slipTime = RADIO_SCHEDULER_CHANNEL_SLIP_TIME,
+ .transactionTime = 0, // will be calculated later if DMP is used
+ };
+
if (aFrame->mPsdu[0] & IEEE802154_ACK_REQUEST)
{
txOptions |= RAIL_TX_OPTION_WAIT_FOR_ACK;
+
+#if RADIO_CONFIG_DMP_SUPPORT
+ // time we wait for ACK
+ if (RAIL_GetSymbolRate(gRailHandle) > 0)
+ {
+ txSchedulerInfo.transactionTime += 12 * 1e6 / RAIL_GetSymbolRate(gRailHandle);
+ }
+ else
+ {
+ txSchedulerInfo.transactionTime += 12 * RADIO_TIMING_DEFAULT_SYMBOLTIME_US;
+ }
+#endif
}
+#if RADIO_CONFIG_DMP_SUPPORT
+ // time needed for the frame itself
+ // 4B preamble, 1B SFD, 1B PHR is not counted in frameLength
+ if (RAIL_GetBitRate(gRailHandle) > 0)
+ {
+ txSchedulerInfo.transactionTime = (frameLength + 4 + 1 + 1) * 8 * 1e6 / RAIL_GetBitRate(gRailHandle);
+ }
+ else
+ { // assume 250kbps
+ txSchedulerInfo.transactionTime = (frameLength + 4 + 1 + 1) * RADIO_TIMING_DEFAULT_BYTETIME_US;
+ }
+#endif
+
if (aFrame->mInfo.mTxInfo.mCsmaCaEnabled)
{
+#if RADIO_CONFIG_DMP_SUPPORT
+ // time needed for CSMA/CA
+ txSchedulerInfo.transactionTime += RADIO_TIMING_CSMA_OVERHEAD_US;
+#endif
status =
- RAIL_StartCcaCsmaTx(sTxBandConfig->mRailHandle, aFrame->mChannel, txOptions, &csmaConfig, &schedulerInfo);
+ RAIL_StartCcaCsmaTx(sTxBandConfig->mRailHandle, aFrame->mChannel, txOptions, &csmaConfig, &txSchedulerInfo);
}
else
{
- status = RAIL_StartTx(sTxBandConfig->mRailHandle, aFrame->mChannel, txOptions, &schedulerInfo);
+ status = RAIL_StartTx(sTxBandConfig->mRailHandle, aFrame->mChannel, txOptions, &txSchedulerInfo);
}
if (status == RAIL_STATUS_NO_ERROR)
{
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailTxStarted++;
+#endif
otPlatRadioTxStarted(aInstance, aFrame);
}
else
{
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailTxStartFailed++;
+#endif
sTransmitError = OT_ERROR_CHANNEL_ACCESS_FAILURE;
sTransmitBusy = false;
}
@@ -559,7 +624,6 @@
}
sEnergyScanStatus = ENERGY_SCAN_STATUS_IDLE;
-
exit:
return rssi;
}
@@ -610,7 +674,9 @@
uint16_t length;
packetHandle = RAIL_GetRxPacketInfo(aRailHandle, RAIL_RX_PACKET_HANDLE_OLDEST, &packetInfo);
- otEXPECT_ACTION(packetInfo.packetStatus == RAIL_RX_PACKET_READY_SUCCESS,
+
+ otEXPECT_ACTION(packetHandle != RAIL_RX_PACKET_HANDLE_INVALID &&
+ packetInfo.packetStatus == RAIL_RX_PACKET_READY_SUCCESS,
packetHandle = RAIL_RX_PACKET_HANDLE_INVALID);
packetDetails.timeReceived.timePosition = RAIL_PACKET_TIME_INVALID;
@@ -639,19 +705,20 @@
memcpy(sReceiveFrame.mPsdu + packetInfo.firstPortionBytes, packetInfo.lastPortionData,
packetInfo.packetBytes - packetInfo.firstPortionBytes);
- sReceiveFrame.mLength = length;
- sReceiveFrame.mInfo.mRxInfo.mRssi = packetDetails.rssi;
- sReceiveFrame.mInfo.mRxInfo.mLqi = packetDetails.lqi;
+ status = RAIL_ReleaseRxPacket(aRailHandle, packetHandle);
+ if (status == RAIL_STATUS_NO_ERROR)
+ {
+ packetHandle = RAIL_RX_PACKET_HANDLE_INVALID;
+ }
- // TODO: grab timestamp and handle conversion to msec/usec
- // sReceiveFrame.mInfo.mRxInfo.mMsec = packetDetails.packetTime;
- // sReceiveFrame.mInfo.mRxInfo.mUsec = packetDetails.packetTime;
+ sReceiveFrame.mLength = length;
if (packetDetails.isAck)
{
assert((length == IEEE802154_ACK_LENGTH) &&
(sReceiveFrame.mPsdu[0] & IEEE802154_FRAME_TYPE_MASK) == IEEE802154_FRAME_TYPE_ACK);
+ RAIL_YieldRadio(gRailHandle);
sTransmitBusy = false;
if (sReceiveFrame.mPsdu[IEEE802154_DSN_OFFSET] == sTransmitFrame.mPsdu[IEEE802154_DSN_OFFSET])
@@ -669,6 +736,17 @@
sReceiveError = OT_ERROR_NONE;
+ sReceiveFrame.mInfo.mRxInfo.mRssi = packetDetails.rssi;
+ sReceiveFrame.mInfo.mRxInfo.mLqi = packetDetails.lqi;
+
+ // TODO: grab timestamp and handle conversion to msec/usec and RAIL_GetRxTimeSyncWordEndAlt
+ // sReceiveFrame.mInfo.mRxInfo.mMsec = packetDetails.packetTime;
+ // sReceiveFrame.mInfo.mRxInfo.mUsec = packetDetails.packetTime;
+
+ // TODO Set this flag only when the packet is really acknowledged with frame pending set.
+ // See https://github.com/openthread/openthread/pull/3785
+ sReceiveFrame.mInfo.mRxInfo.mAckedWithFramePending = true;
+
#if OPENTHREAD_CONFIG_DIAG_ENABLE
if (otPlatDiagModeGet())
@@ -684,10 +762,15 @@
{
otLogInfoPlat("Received %d bytes", sReceiveFrame.mLength);
otPlatRadioReceiveDone(aInstance, &sReceiveFrame, sReceiveError);
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailPlatRadioReceiveDoneCbCount++;
+#endif
}
}
}
+ otSysEventSignalPending();
+
exit:
if (packetHandle != RAIL_RX_PACKET_HANDLE_INVALID)
@@ -725,50 +808,70 @@
static void RAILCb_Generic(RAIL_Handle_t aRailHandle, RAIL_Events_t aEvents)
{
- if (aEvents &
- (RAIL_EVENT_TX_ABORTED | RAIL_EVENT_TX_BLOCKED | RAIL_EVENT_TX_UNDERFLOW | RAIL_EVENT_SCHEDULER_STATUS))
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ if (aEvents & RAIL_EVENT_CONFIG_SCHEDULED)
{
- sTransmitError = OT_ERROR_ABORT;
- sTransmitBusy = false;
-
- RAIL_YieldRadio(aRailHandle);
+ sRailDebugCounters.mRailEventConfigScheduled++;
+ }
+ if (aEvents & RAIL_EVENT_CONFIG_UNSCHEDULED)
+ {
+ sRailDebugCounters.mRailEventConfigUnScheduled++;
+ }
+#endif
+ if (aEvents & RAIL_EVENT_IEEE802154_DATA_REQUEST_COMMAND)
+ {
+ ieee802154DataRequestCommand(aRailHandle);
+ }
+ if (aEvents & RAIL_EVENTS_TX_COMPLETION)
+ {
+ if (aEvents & RAIL_EVENT_TX_PACKET_SENT)
+ {
+ if ((sTransmitFrame.mPsdu[0] & IEEE802154_ACK_REQUEST) == 0)
+ {
+ RAIL_YieldRadio(aRailHandle);
+ sTransmitError = OT_ERROR_NONE;
+ sTransmitBusy = false;
+ }
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailEventPacketSent++;
+#endif
+ }
+ else if (aEvents & RAIL_EVENT_TX_CHANNEL_BUSY)
+ {
+ RAIL_YieldRadio(aRailHandle);
+ sTransmitError = OT_ERROR_CHANNEL_ACCESS_FAILURE;
+ sTransmitBusy = false;
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailEventChannelBusy++;
+#endif
+ }
+ else
+ {
+ RAIL_YieldRadio(aRailHandle);
+ sTransmitError = OT_ERROR_ABORT;
+ sTransmitBusy = false;
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailEventTxAbort++;
+#endif
+ }
}
if (aEvents & RAIL_EVENT_RX_ACK_TIMEOUT)
{
+ RAIL_YieldRadio(aRailHandle);
sTransmitError = OT_ERROR_NO_ACK;
sTransmitBusy = false;
-
- RAIL_YieldRadio(aRailHandle);
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailEventNoAck++;
+#endif
}
if (aEvents & RAIL_EVENT_RX_PACKET_RECEIVED)
{
RAIL_HoldRxPacket(aRailHandle);
- }
-
- if (aEvents & RAIL_EVENT_IEEE802154_DATA_REQUEST_COMMAND)
- {
- ieee802154DataRequestCommand(aRailHandle);
- }
-
- if (aEvents & RAIL_EVENT_TX_PACKET_SENT)
- {
- if ((sTransmitFrame.mPsdu[0] & IEEE802154_ACK_REQUEST) == 0)
- {
- sTransmitError = OT_ERROR_NONE;
- sTransmitBusy = false;
-
- RAIL_YieldRadio(aRailHandle);
- }
- }
-
- if (aEvents & RAIL_EVENT_TX_CHANNEL_BUSY)
- {
- sTransmitError = OT_ERROR_CHANNEL_ACCESS_FAILURE;
- sTransmitBusy = false;
-
- RAIL_YieldRadio(aRailHandle);
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailEventPacketReceived++;
+#endif
}
if (aEvents & RAIL_EVENT_CAL_NEEDED)
@@ -777,11 +880,16 @@
status = RAIL_Calibrate(aRailHandle, NULL, RAIL_CAL_ALL_PENDING);
assert(status == RAIL_STATUS_NO_ERROR);
+
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailEventCalNeeded++;
+#endif
}
if (aEvents & RAIL_EVENT_RSSI_AVERAGE_DONE)
{
const int16_t energyScanResultQuarterDbm = RAIL_GetAverageRssi(aRailHandle);
+ RAIL_YieldRadio(aRailHandle);
sEnergyScanStatus = ENERGY_SCAN_STATUS_COMPLETED;
@@ -794,8 +902,42 @@
sEnergyScanResultDbm = energyScanResultQuarterDbm / QUARTER_DBM_IN_DBM;
}
- RAIL_YieldRadio(aRailHandle);
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailPlatRadioEnergyScanDoneCbCount++;
+#endif
}
+ if (aEvents & RAIL_EVENT_SCHEDULER_STATUS)
+ {
+ RAIL_SchedulerStatus_t status = RAIL_GetSchedulerStatus(aRailHandle);
+
+ assert(status != RAIL_SCHEDULER_STATUS_INTERNAL_ERROR);
+
+ if (status == RAIL_SCHEDULER_STATUS_CCA_CSMA_TX_FAIL || status == RAIL_SCHEDULER_STATUS_SINGLE_TX_FAIL ||
+ status == RAIL_SCHEDULER_STATUS_SCHEDULED_TX_FAIL ||
+ (status == RAIL_SCHEDULER_STATUS_SCHEDULE_FAIL && sTransmitBusy) ||
+ (status == RAIL_SCHEDULER_STATUS_EVENT_INTERRUPTED && sTransmitBusy))
+ {
+ sTransmitError = OT_ERROR_ABORT;
+ sTransmitBusy = false;
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailEventSchedulerStatusError++;
+#endif
+ }
+ else if (status == RAIL_SCHEDULER_STATUS_AVERAGE_RSSI_FAIL)
+ {
+ sEnergyScanStatus = ENERGY_SCAN_STATUS_COMPLETED;
+ sEnergyScanResultDbm = OT_RADIO_RSSI_INVALID;
+ }
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ else if (sTransmitBusy)
+ {
+ sRailDebugCounters.mRailEventsSchedulerStatusLastStatus = status;
+ sRailDebugCounters.mRailEventsSchedulerStatusTransmitBusy++;
+ }
+#endif
+ }
+
+ otSysEventSignalPending();
}
otError otPlatRadioEnergyScan(otInstance *aInstance, uint8_t aScanChannel, uint16_t aScanDuration)
@@ -815,7 +957,6 @@
}
sState = OT_RADIO_STATE_RECEIVE;
-
#if OPENTHREAD_CONFIG_DIAG_ENABLE
if (otPlatDiagModeGet())
{
@@ -831,11 +972,22 @@
{
otPlatRadioTxDone(aInstance, &sTransmitFrame, &sReceiveFrame, sTransmitError);
}
+
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailPlatRadioTxDoneCbCount++;
+#endif
+
+ otSysEventSignalPending();
}
else if (sEnergyScanMode == ENERGY_SCAN_MODE_ASYNC && sEnergyScanStatus == ENERGY_SCAN_STATUS_COMPLETED)
{
sEnergyScanStatus = ENERGY_SCAN_STATUS_IDLE;
otPlatRadioEnergyScanDone(aInstance, sEnergyScanResultDbm);
+ otSysEventSignalPending();
+
+#if RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
+ sRailDebugCounters.mRailEventEnergyScanCompleted++;
+#endif
}
processNextRxPacket(aInstance, sRxBandConfig->mRailHandle);
@@ -871,6 +1023,22 @@
return OT_ERROR_NONE;
}
+otError otPlatRadioGetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t *aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ OT_UNUSED_VARIABLE(aThreshold);
+
+ return OT_ERROR_NOT_IMPLEMENTED;
+}
+
+otError otPlatRadioSetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ OT_UNUSED_VARIABLE(aThreshold);
+
+ return OT_ERROR_NOT_IMPLEMENTED;
+}
+
int8_t otPlatRadioGetReceiveSensitivity(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
diff --git a/examples/platforms/efr32mg21/rail_config.h b/examples/platforms/efr32mg21/rail_config.h
index c268b88..72c7c05 100644
--- a/examples/platforms/efr32mg21/rail_config.h
+++ b/examples/platforms/efr32mg21/rail_config.h
@@ -1,9 +1,9 @@
#ifndef __RAIL_CONFIG_H__
#define __RAIL_CONFIG_H__
-#include <stdint.h>
-#include "rail_types.h"
#include "board_config.h"
+#include "rail_types.h"
+#include <stdint.h>
#define RADIO_CONFIG_XTAL_FREQUENCY 38400000UL
diff --git a/examples/platforms/efr32mg21/sleepy-demo/Makefile.am b/examples/platforms/efr32mg21/sleepy-demo/Makefile.am
new file mode 100644
index 0000000..e9ff42f
--- /dev/null
+++ b/examples/platforms/efr32mg21/sleepy-demo/Makefile.am
@@ -0,0 +1,54 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
+
+# Always package (e.g. for 'make dist') these subdirectories.
+
+DIST_SUBDIRS = \
+ sleepy-demo-mtd \
+ sleepy-demo-ftd \
+ $(NULL)
+
+# Always build (e.g. for 'make all') these subdirectories.
+
+SUBDIRS = \
+ $(NULL)
+
+if OPENTHREAD_ENABLE_EXECUTABLE
+SUBDIRS += sleepy-demo-mtd sleepy-demo-ftd
+endif
+
+# Always pretty (e.g. for 'make pretty') these subdirectories.
+
+PRETTY_SUBDIRS = \
+ sleepy-demo-mtd \
+ sleepy-demo-ftd \
+ $(NULL)
+
+include $(abs_top_nlbuild_autotools_dir)/automake/post.am
diff --git a/examples/platforms/efr32mg21/sleepy-demo/README.md b/examples/platforms/efr32mg21/sleepy-demo/README.md
new file mode 100644
index 0000000..2e91c77
--- /dev/null
+++ b/examples/platforms/efr32mg21/sleepy-demo/README.md
@@ -0,0 +1,87 @@
+
+# EFR32MG21 Sleepy Demo Example
+
+The EFR32 Sleepy applications demonstrates Sleepy End Device behaviour using
+the EFR32's low power EM2 mode. The steps below will take you through the
+process of building and running the demo
+
+For setting up the build environment refer to [examples/platforms/efr32mg21/README.md](../README.md).
+
+
+## 1. Build
+
+```bash
+$ cd <path-to-openthread>
+$ ./bootstrap
+$ make -f examples/Makefile-efr32mg21 COMMISSIONER=1 JOINER=1 DHCP6_CLIENT=1 DHCP6_SERVER=1 BOARD=BRD4180A
+```
+
+Convert the resulting executables into S-Record format and append a s37 suffix.
+
+```bash
+$ cd output/efr32mg21/bin
+$ arm-none-eabi-objcopy -O srec sleepy-demo-mtd sleepy-demo-mtd.s37
+$ arm-none-eabi-objcopy -O srec sleepy-demo-ftd sleepy-demo-ftd.s37
+```
+
+In Silicon Labs Simplicity Studio flash one device with the sleepy-demo-mtd.s37
+image and the other device with the sleepy-demo-ftd.s37 image.
+
+For instructions on flashing firmware see [examples/platforms/efr32mg21/README.md](../README.md#flash-binaries)
+
+
+## 2. Starting nodes
+
+For demonstration purposes the network settings are hardcoded within the source files.
+The devices start Thread and form a network within a few seconds of powering on. In a real-life
+application the devices should implement and go through a commissioning process to create
+a network and add devices.
+
+When the sleepy-demo-ftd device is started in the CLI the user shall see:
+
+```
+sleepy-demo-ftd started
+sleepy-demo-ftd changed to leader
+```
+
+When the sleepy-demo-mtd device starts it joins the preconfigured Thread network
+before disabling Rx-On-Idle to become a Sleepy-End-Device.
+
+Use the command "child table" in the FTD console and observe the R flag of the child is 0.
+
+```
+> child table
+| ID | RLOC16 | Timeout | Age | LQ In | C_VN |R|S|D|N| Extended MAC |
++-----+--------+------------+------------+-------+------+-+-+-+-+------------------+
+| 1 | 0x8401 | 240 | 3 | 3 | 3 |0|1|0|0| 8e8582dbd78c243c |
+
+Done
+```
+
+
+## 3. MTD behaviour on wakeup
+
+MTD wakes up every 5 seconds and sends a multicast UDP message containing the
+string "mtd is awake". The FTD listens on the multicast address and will toggle
+LED 0 and display a message in the CLI showing "Message Received: mtd is awake".
+
+## 4. Monitoring power consumption of the MTD
+
+Open the Energy Profiler within Silicon Labs Simplicity Studio. Within the Quick Access menu
+select Start Energy Capture... and select the MTD device. When operating as a Sleepy End Device
+with no LEDs on the current should be under 20-80 microamps with occassional spikes during waking
+and polling the parent. With the LED on the MTD has a current consumption of approximately 1mA.
+
+When operating as a Minial End Device with the Rx on Idle observe that the current is in the order
+of 10ma.
+
+With further configuration of GPIOs and peripherals it is possible to reduce the sleepy current
+consumption further.
+
+## 5. Notes on sleeping, sleepy callback and interrupts
+
+To allow the EFR32 to enter sleepy mode the application must register a callback with efr32SetSleepCallback.
+The return value of callback is used to indicate that the application has no further work to do and that
+it is safe to go into a low power mode. The callback is called with interrupts disabled so should do
+the minimum required to check if it can sleep.
+
diff --git a/examples/platforms/efr32mg21/sleepy-demo/sleepy-demo-ftd/Makefile.am b/examples/platforms/efr32mg21/sleepy-demo/sleepy-demo-ftd/Makefile.am
new file mode 100644
index 0000000..9384967
--- /dev/null
+++ b/examples/platforms/efr32mg21/sleepy-demo/sleepy-demo-ftd/Makefile.am
@@ -0,0 +1,150 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
+include $(top_srcdir)/examples/platforms/Makefile.platform.am
+
+override CFLAGS := $(filter-out -Wconversion,$(CFLAGS))
+override CXXFLAGS := $(filter-out -Wconversion,$(CXXFLAGS))
+
+EFR32_BOARD_DIR = $(shell echo $(BOARD) | tr A-Z a-z)
+
+SDK_SRC_DIR = $(top_srcdir)/third_party/silabs/gecko_sdk_suite/v2.7
+
+$(top_builddir)/examples/platforms/efr32mg21/libopenthread-efr32mg21.a:
+ (cd $(top_builddir)/examples/platforms/efr32mg21/ && $(MAKE) $(AM_MAKEFLAGS) libopenthread-efr32mg21.a )
+
+bin_PROGRAMS = \
+ $(NULL)
+
+CPPFLAGS_COMMON += \
+ -DEFR32_SERIES2_CONFIG1_MICRO \
+ -DNVIC_CONFIG=\"platform/base/hal/micro/cortexm3/efm32/nvic-config.h\" \
+ -DPLATFORM_HEADER=\"platform/base/hal/micro/cortexm3/compiler/gcc.h\" \
+ -Wno-sign-compare \
+ -I$(top_srcdir)/examples/platforms \
+ -I$(top_srcdir)/examples/platforms/efr32mg21/$(EFR32_BOARD_DIR) \
+ -I$(top_srcdir)/include \
+ -I$(top_srcdir)/src/core \
+ -I$(top_srcdir)/third_party/silabs/rail_config \
+ -I$(SDK_SRC_DIR)/hardware/kit/common/bsp \
+ -I$(SDK_SRC_DIR)/hardware/kit/common/drivers \
+ -I$(SDK_SRC_DIR)/hardware/kit/EFR32MG21_$(BOARD)/config \
+ -I$(SDK_SRC_DIR)/platform/base/hal/micro/cortexm3/efm32 \
+ -I$(SDK_SRC_DIR)/platform/base/hal/micro/cortexm3/efm32/config \
+ -I$(SDK_SRC_DIR)/platform/common/inc \
+ -I$(SDK_SRC_DIR)/platform/CMSIS/Include \
+ -I$(SDK_SRC_DIR)/platform/Device/SiliconLabs/EFR32MG21P/Include \
+ -I$(SDK_SRC_DIR)/platform/emdrv/common/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/gpiointerrupt/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/uartdrv/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/uartdrv/config \
+ -I$(SDK_SRC_DIR)/platform/emdrv/ustimer/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/dmadrv/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/dmadrv/config \
+ -I$(SDK_SRC_DIR)/platform/emlib/inc \
+ -I$(SDK_SRC_DIR)/platform/halconfig/inc/hal-config \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32/efr32xg2x \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32/rf/common/cortex \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/common \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/hal \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/hal/efr32 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/protocol/ieee802154 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/plugin/pa-conversions \
+ -I$(SDK_SRC_DIR)/platform/service/mpu/inc \
+ -I$(SDK_SRC_DIR)/platform/service/sleeptimer/config \
+ -I$(SDK_SRC_DIR)/platform/service/sleeptimer/inc \
+ -I$(SDK_SRC_DIR)/util/plugin/plugin-common/fem-control \
+ -I$(SDK_SRC_DIR)/util/third_party/mbedtls/sl_crypto/include \
+ -Wno-unused-parameter \
+ -Wno-missing-field-initializers \
+ $(NULL)
+
+LDADD_COMMON += \
+ $(NULL)
+
+LDFLAGS_COMMON += \
+ $(NULL)
+
+LIBTOOLFLAGS_COMMON += \
+ $(NULL)
+
+SOURCES_COMMON += \
+ main.c \
+ $(NULL)
+
+if OPENTHREAD_ENABLE_BUILTIN_MBEDTLS
+LDADD_COMMON += \
+ $(top_builddir)/third_party/mbedtls/libmbedcrypto.a \
+ $(NULL)
+endif # OPENTHREAD_ENABLE_BUILTIN_MBEDTLS
+
+if OPENTHREAD_ENABLE_EXECUTABLE
+bin_PROGRAMS += \
+ sleepy-demo-ftd \
+ $(NULL)
+endif
+
+sleepy_demo_ftd_CPPFLAGS = \
+ $(CPPFLAGS_COMMON) \
+ $(NULL)
+
+sleepy_demo_ftd_LDADD = \
+ $(top_builddir)/src/cli/libopenthread-cli-ftd.a \
+ $(top_builddir)/src/core/libopenthread-ftd.a \
+ $(LDADD_COMMON) \
+ $(top_builddir)/src/core/libopenthread-ftd.a \
+ $(LDADD_COMMON) \
+ $(NULL)
+
+sleepy_demo_ftd_LDFLAGS = \
+ $(LDFLAGS_COMMON) \
+ $(NULL)
+
+sleepy_demo_ftd_LIBTOOLFLAGS = \
+ $(LIBTOOLFLAGS_COMMON) \
+ $(NULL)
+
+sleepy_demo_ftd_SOURCES = \
+ $(SOURCES_COMMON) \
+ $(NULL)
+
+if OPENTHREAD_ENABLE_LINKER_MAP
+sleepy_demo_ftd_LDFLAGS += -Wl,-Map=sleepy-demo-ftd.map
+endif
+
+if OPENTHREAD_BUILD_COVERAGE
+CPPFLAGS_COMMON += \
+ -DOPENTHREAD_ENABLE_COVERAGE \
+ $(NULL)
+
+CLEANFILES = $(wildcard *.gcda *.gcno)
+endif # OPENTHREAD_BUILD_COVERAGE
+
+include $(abs_top_nlbuild_autotools_dir)/automake/post.am
diff --git a/examples/platforms/efr32mg21/sleepy-demo/sleepy-demo-ftd/main.c b/examples/platforms/efr32mg21/sleepy-demo/sleepy-demo-ftd/main.c
new file mode 100644
index 0000000..b45e132
--- /dev/null
+++ b/examples/platforms/efr32mg21/sleepy-demo/sleepy-demo-ftd/main.c
@@ -0,0 +1,322 @@
+/*
+ * Copyright (c) 2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "bsp.h"
+#include "em_cmu.h"
+#include "em_emu.h"
+#include "gpiointerrupt.h"
+#include "hal-config-board.h"
+#include "hal_common.h"
+#include "openthread-system.h"
+#include <assert.h>
+#include <common/logging.hpp>
+#include <openthread-core-config.h>
+#include <string.h>
+#include <openthread/cli.h>
+#include <openthread/config.h>
+#include <openthread/dataset_ftd.h>
+#include <openthread/diag.h>
+#include <openthread/instance.h>
+#include <openthread/message.h>
+#include <openthread/tasklet.h>
+#include <openthread/thread.h>
+#include <openthread/udp.h>
+#include <openthread/platform/logging.h>
+
+// Constants
+#define MULTICAST_ADDR "ff03::1"
+#define MULTICAST_PORT 123
+#define RECV_PORT 234
+#define MTD_MESSAGE "mtd button"
+#define FTD_MESSAGE "ftd button"
+
+// Types
+typedef struct ButtonArray
+{
+ GPIO_Port_TypeDef port;
+ unsigned int pin;
+} ButtonArray_t;
+
+// Prototypes
+void setNetworkConfiguration(otInstance *aInstance);
+void handleNetifStateChanged(uint32_t aFlags, void *aContext);
+void gpioInit(void (*gpioCallback)(uint8_t pin));
+void buttonCallback(uint8_t pin);
+void initUdp(void);
+void applicationTick(void);
+void sFtdReceiveCallback(void *aContext, otMessage *aMessage, const otMessageInfo *aMessageInfo);
+
+// Variables
+static otInstance * instance;
+static otUdpSocket sFtdSocket;
+static bool sLedOn = false;
+static bool sHaveSwitchAddress = false;
+static otIp6Address sSwitchAddress;
+static bool sFtdButtonPressed = false;
+static const ButtonArray_t sButtonArray[BSP_BUTTON_COUNT] = BSP_BUTTON_INIT;
+
+void otTaskletsSignalPending(otInstance *aInstance)
+{
+ (void)aInstance;
+}
+
+int main(int argc, char *argv[])
+{
+ otSysInit(argc, argv);
+ gpioInit(buttonCallback);
+
+ instance = otInstanceInitSingle();
+ assert(instance);
+
+ otCliUartInit(instance);
+ otCliOutputFormat("sleepy-demo-ftd started\r\n");
+
+ setNetworkConfiguration(instance);
+ otSetStateChangedCallback(instance, handleNetifStateChanged, instance);
+ initUdp();
+
+ otIp6SetEnabled(instance, true);
+ otThreadSetEnabled(instance, true);
+
+ while (!otSysPseudoResetWasRequested())
+ {
+ otTaskletsProcess(instance);
+ otSysProcessDrivers(instance);
+ applicationTick();
+ }
+
+ otInstanceFinalize(instance);
+ return 0;
+}
+
+/*
+ * Provide, if required an "otPlatLog()" function
+ */
+#if OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_APP
+void otPlatLog(otLogLevel aLogLevel, otLogRegion aLogRegion, const char *aFormat, ...)
+{
+ OT_UNUSED_VARIABLE(aLogLevel);
+ OT_UNUSED_VARIABLE(aLogRegion);
+ OT_UNUSED_VARIABLE(aFormat);
+
+ va_list ap;
+ va_start(ap, aFormat);
+ otCliPlatLogv(aLogLevel, aLogRegion, aFormat, ap);
+ va_end(ap);
+}
+#endif
+
+/**
+ * Override default network settings, such as panid, so the devices can join a network
+ */
+void setNetworkConfiguration(otInstance *aInstance)
+{
+ static char aNetworkName[] = "SleepyEFR32";
+ otOperationalDataset aDataset;
+
+ memset(&aDataset, 0, sizeof(otOperationalDataset));
+
+ /*
+ * Fields that can be configured in otOperationDataset to override defaults:
+ * Network Name, Mesh Local Prefix, Extended PAN ID, PAN ID, Delay Timer,
+ * Channel, Channel Mask Page 0, Network Master Key, PSKc, Security Policy
+ */
+ aDataset.mActiveTimestamp = 1;
+ aDataset.mComponents.mIsActiveTimestampPresent = true;
+
+ /* Set Channel to 15 */
+ aDataset.mChannel = 15;
+ aDataset.mComponents.mIsChannelPresent = true;
+
+ /* Set Pan ID to 2222 */
+ aDataset.mPanId = (otPanId)0x2222;
+ aDataset.mComponents.mIsPanIdPresent = true;
+
+ /* Set Extended Pan ID to C0DE1AB5C0DE1AB5 */
+ uint8_t extPanId[OT_EXT_PAN_ID_SIZE] = {0xC0, 0xDE, 0x1A, 0xB5, 0xC0, 0xDE, 0x1A, 0xB5};
+ memcpy(aDataset.mExtendedPanId.m8, extPanId, sizeof(aDataset.mExtendedPanId));
+ aDataset.mComponents.mIsExtendedPanIdPresent = true;
+
+ /* Set master key to 1234C0DE1AB51234C0DE1AB51234C0DE */
+ uint8_t key[OT_MASTER_KEY_SIZE] = {0x12, 0x34, 0xC0, 0xDE, 0x1A, 0xB5, 0x12, 0x34, 0xC0, 0xDE, 0x1A, 0xB5};
+ memcpy(aDataset.mMasterKey.m8, key, sizeof(aDataset.mMasterKey));
+ aDataset.mComponents.mIsMasterKeyPresent = true;
+
+ /* Set Network Name to SleepyEFR32 */
+ size_t length = strlen(aNetworkName);
+ assert(length <= OT_NETWORK_NAME_MAX_SIZE);
+ memcpy(aDataset.mNetworkName.m8, aNetworkName, length);
+ aDataset.mComponents.mIsNetworkNamePresent = true;
+
+ otDatasetSetActive(aInstance, &aDataset);
+}
+
+void handleNetifStateChanged(uint32_t aFlags, void *aContext)
+{
+ if ((aFlags & OT_CHANGED_THREAD_ROLE) != 0)
+ {
+ otDeviceRole changedRole = otThreadGetDeviceRole(aContext);
+
+ switch (changedRole)
+ {
+ case OT_DEVICE_ROLE_LEADER:
+ otCliOutputFormat("sleepy-demo-ftd changed to leader\r\n");
+ break;
+ case OT_DEVICE_ROLE_ROUTER:
+ otCliOutputFormat("sleepy-demo-ftd changed to router\r\n");
+ break;
+
+ case OT_DEVICE_ROLE_CHILD:
+ break;
+
+ case OT_DEVICE_ROLE_DETACHED:
+ case OT_DEVICE_ROLE_DISABLED:
+ break;
+ }
+ }
+}
+
+void gpioInit(void (*callback)(uint8_t pin))
+{
+ // set up button GPIOs to input with pullups
+ for (int i = 0; i < BSP_BUTTON_COUNT; i++)
+ {
+ GPIO_PinModeSet(sButtonArray[i].port, sButtonArray[i].pin, gpioModeInputPull, 1);
+ }
+ // set up interrupt based callback function on falling edge
+ GPIOINT_Init();
+ GPIOINT_CallbackRegister(sButtonArray[0].pin, callback);
+ GPIOINT_CallbackRegister(sButtonArray[1].pin, callback);
+ GPIO_IntConfig(sButtonArray[0].port, sButtonArray[0].pin, false, true, true);
+ GPIO_IntConfig(sButtonArray[1].port, sButtonArray[1].pin, false, true, true);
+
+ BSP_LedsInit();
+ BSP_LedClear(0);
+ BSP_LedClear(1);
+}
+
+void initUdp(void)
+{
+ otError error;
+ otSockAddr sockaddr;
+
+ memset(&sockaddr, 0, sizeof(sockaddr));
+
+ otIp6AddressFromString(MULTICAST_ADDR, &sockaddr.mAddress);
+ sockaddr.mPort = MULTICAST_PORT;
+
+ error = otUdpOpen(instance, &sFtdSocket, sFtdReceiveCallback, NULL);
+ if (error != OT_ERROR_NONE)
+ {
+ otCliOutputFormat("FTD failed to open udp multicast\r\n");
+ return;
+ }
+
+ error = otUdpBind(&sFtdSocket, &sockaddr);
+ if (error != OT_ERROR_NONE)
+ {
+ otUdpClose(&sFtdSocket);
+ otCliOutputFormat("FTD failed to bind udp multicast\r\n");
+ return;
+ }
+}
+
+void buttonCallback(uint8_t pin)
+{
+ OT_UNUSED_VARIABLE(pin);
+ sFtdButtonPressed = true;
+}
+
+void applicationTick(void)
+{
+ otError error = 0;
+ otMessageInfo messageInfo;
+ otMessage * message = NULL;
+ char * payload = FTD_MESSAGE;
+
+ if (sFtdButtonPressed == true)
+ {
+ sFtdButtonPressed = false;
+
+ if (sHaveSwitchAddress)
+ {
+ memset(&messageInfo, 0, sizeof(messageInfo));
+ memcpy(&messageInfo.mPeerAddr, &sSwitchAddress, sizeof messageInfo.mPeerAddr);
+ messageInfo.mPeerPort = RECV_PORT;
+
+ message = otUdpNewMessage(instance, NULL);
+
+ if (message != NULL)
+ {
+ error = otMessageAppend(message, payload, (uint16_t)strlen(payload));
+
+ if (error == OT_ERROR_NONE)
+ {
+ error = otUdpSend(&sFtdSocket, message, &messageInfo);
+
+ if (error == OT_ERROR_NONE)
+ {
+ return;
+ }
+ }
+ }
+
+ if (message != NULL)
+ {
+ otMessageFree(message);
+ }
+ }
+ }
+}
+
+void sFtdReceiveCallback(void *aContext, otMessage *aMessage, const otMessageInfo *aMessageInfo)
+{
+ OT_UNUSED_VARIABLE(aContext);
+ OT_UNUSED_VARIABLE(aMessage);
+ OT_UNUSED_VARIABLE(aMessageInfo);
+ uint8_t buf[1500];
+ int length;
+
+ sLedOn = !sLedOn;
+
+ if (sLedOn)
+ {
+ BSP_LedSet(0);
+ }
+ else
+ {
+ BSP_LedClear(0);
+ }
+
+ length = otMessageRead(aMessage, otMessageGetOffset(aMessage), buf, sizeof(buf) - 1);
+ buf[length] = '\0';
+ otCliOutputFormat("Message Received: %s\r\n", buf);
+
+ sHaveSwitchAddress = true;
+ memcpy(&sSwitchAddress, &aMessageInfo->mPeerAddr, sizeof sSwitchAddress);
+}
diff --git a/examples/platforms/efr32mg21/sleepy-demo/sleepy-demo-mtd/Makefile.am b/examples/platforms/efr32mg21/sleepy-demo/sleepy-demo-mtd/Makefile.am
new file mode 100644
index 0000000..4903172
--- /dev/null
+++ b/examples/platforms/efr32mg21/sleepy-demo/sleepy-demo-mtd/Makefile.am
@@ -0,0 +1,150 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
+include $(top_srcdir)/examples/platforms/Makefile.platform.am
+
+override CFLAGS := $(filter-out -Wconversion,$(CFLAGS))
+override CXXFLAGS := $(filter-out -Wconversion,$(CXXFLAGS))
+
+EFR32_BOARD_DIR = $(shell echo $(BOARD) | tr A-Z a-z)
+
+SDK_SRC_DIR = $(top_srcdir)/third_party/silabs/gecko_sdk_suite/v2.7
+
+$(top_builddir)/examples/platforms/efr32mg21/libopenthread-efr32mg21.a:
+ (cd $(top_builddir)/examples/platforms/efr32mg21/ && $(MAKE) $(AM_MAKEFLAGS) libopenthread-efr32mg21.a )
+
+bin_PROGRAMS = \
+ $(NULL)
+
+CPPFLAGS_COMMON += \
+ -DEFR32_SERIES2_CONFIG1_MICRO \
+ -DNVIC_CONFIG=\"platform/base/hal/micro/cortexm3/efm32/nvic-config.h\" \
+ -DPLATFORM_HEADER=\"platform/base/hal/micro/cortexm3/compiler/gcc.h\" \
+ -Wno-sign-compare \
+ -I$(top_srcdir)/examples/platforms \
+ -I$(top_srcdir)/examples/platforms/efr32mg21/$(EFR32_BOARD_DIR) \
+ -I$(top_srcdir)/include \
+ -I$(top_srcdir)/src/core \
+ -I$(top_srcdir)/third_party/silabs/rail_config \
+ -I$(SDK_SRC_DIR)/hardware/kit/common/bsp \
+ -I$(SDK_SRC_DIR)/hardware/kit/common/drivers \
+ -I$(SDK_SRC_DIR)/hardware/kit/EFR32MG21_$(BOARD)/config \
+ -I$(SDK_SRC_DIR)/platform/base/hal/micro/cortexm3/efm32 \
+ -I$(SDK_SRC_DIR)/platform/base/hal/micro/cortexm3/efm32/config \
+ -I$(SDK_SRC_DIR)/platform/common/inc \
+ -I$(SDK_SRC_DIR)/platform/CMSIS/Include \
+ -I$(SDK_SRC_DIR)/platform/Device/SiliconLabs/EFR32MG21P/Include \
+ -I$(SDK_SRC_DIR)/platform/emdrv/common/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/gpiointerrupt/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/uartdrv/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/uartdrv/config \
+ -I$(SDK_SRC_DIR)/platform/emdrv/ustimer/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/dmadrv/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/dmadrv/config \
+ -I$(SDK_SRC_DIR)/platform/emlib/inc \
+ -I$(SDK_SRC_DIR)/platform/halconfig/inc/hal-config \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32/efr32xg2x \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32/rf/common/cortex \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/common \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/hal \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/hal/efr32 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/protocol/ieee802154 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/plugin/pa-conversions \
+ -I$(SDK_SRC_DIR)/platform/service/mpu/inc \
+ -I$(SDK_SRC_DIR)/platform/service/sleeptimer/config \
+ -I$(SDK_SRC_DIR)/platform/service/sleeptimer/inc \
+ -I$(SDK_SRC_DIR)/util/plugin/plugin-common/fem-control \
+ -I$(SDK_SRC_DIR)/util/third_party/mbedtls/sl_crypto/include \
+ -Wno-unused-parameter \
+ -Wno-missing-field-initializers \
+ $(NULL)
+
+LDADD_COMMON += \
+ $(NULL)
+
+LDFLAGS_COMMON += \
+ $(NULL)
+
+LIBTOOLFLAGS_COMMON += \
+ $(NULL)
+
+SOURCES_COMMON += \
+ main.c \
+ $(NULL)
+
+if OPENTHREAD_ENABLE_BUILTIN_MBEDTLS
+LDADD_COMMON += \
+ $(top_builddir)/third_party/mbedtls/libmbedcrypto.a \
+ $(NULL)
+endif # OPENTHREAD_ENABLE_BUILTIN_MBEDTLS
+
+if OPENTHREAD_ENABLE_EXECUTABLE
+bin_PROGRAMS += \
+ sleepy-demo-mtd \
+ $(NULL)
+endif
+
+sleepy_demo_mtd_CPPFLAGS = \
+ $(CPPFLAGS_COMMON) \
+ $(NULL)
+
+sleepy_demo_mtd_LDADD = \
+ $(top_builddir)/src/cli/libopenthread-cli-mtd.a \
+ $(top_builddir)/src/core/libopenthread-mtd.a \
+ $(LDADD_COMMON) \
+ $(top_builddir)/src/core/libopenthread-mtd.a \
+ $(LDADD_COMMON) \
+ $(NULL)
+
+sleepy_demo_mtd_LDFLAGS = \
+ $(LDFLAGS_COMMON) \
+ $(NULL)
+
+sleepy_demo_mtd_LIBTOOLFLAGS = \
+ $(LIBTOOLFLAGS_COMMON) \
+ $(NULL)
+
+sleepy_demo_mtd_SOURCES = \
+ $(SOURCES_COMMON) \
+ $(NULL)
+
+if OPENTHREAD_ENABLE_LINKER_MAP
+sleepy_demo_mtd_LDFLAGS += -Wl,-Map=sleepy-demo-mtd.map
+endif
+
+if OPENTHREAD_BUILD_COVERAGE
+CPPFLAGS_COMMON += \
+ -DOPENTHREAD_ENABLE_COVERAGE \
+ $(NULL)
+
+CLEANFILES = $(wildcard *.gcda *.gcno)
+endif # OPENTHREAD_BUILD_COVERAGE
+
+include $(abs_top_nlbuild_autotools_dir)/automake/post.am
diff --git a/examples/platforms/efr32mg21/sleepy-demo/sleepy-demo-mtd/main.c b/examples/platforms/efr32mg21/sleepy-demo/sleepy-demo-mtd/main.c
new file mode 100644
index 0000000..4c3e842
--- /dev/null
+++ b/examples/platforms/efr32mg21/sleepy-demo/sleepy-demo-mtd/main.c
@@ -0,0 +1,394 @@
+/*
+ * Copyright (c) 2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <assert.h>
+#include <string.h>
+
+#include "bsp.h"
+#include "em_cmu.h"
+#include "em_emu.h"
+#include "gpiointerrupt.h"
+#include "hal-config-board.h"
+#include "hal_common.h"
+#include "openthread-system.h"
+#include "platform-efr32.h"
+#include <common/logging.hpp>
+#include <openthread-core-config.h>
+#include <openthread/cli.h>
+#include <openthread/config.h>
+#include <openthread/dataset_ftd.h>
+#include <openthread/diag.h>
+#include <openthread/instance.h>
+#include <openthread/link.h>
+#include <openthread/message.h>
+#include <openthread/tasklet.h>
+#include <openthread/thread.h>
+#include <openthread/udp.h>
+#include <openthread/platform/alarm-milli.h>
+#include <openthread/platform/logging.h>
+
+// Constants
+#define MULTICAST_ADDR "ff03::1"
+#define MULTICAST_PORT 123
+#define RECV_PORT 234
+#define SLEEPY_POLL_PERIOD_MS 5000
+#define MTD_MESSAGE "mtd is awake"
+#define FTD_MESSAGE "ftd button"
+
+// Types
+typedef struct ButtonArray
+{
+ GPIO_Port_TypeDef port;
+ unsigned int pin;
+} ButtonArray_t;
+
+// Prototypes
+void deviceOutOfSleepCb(void);
+bool sleepCb(void);
+void setNetworkConfiguration(otInstance *aInstance);
+void handleNetifStateChanged(uint32_t aFlags, void *aContext);
+void gpioInit(void (*gpioCallback)(uint8_t pin));
+void buttonCallback(uint8_t pin);
+void initUdp(void);
+void applicationTick(void);
+void mtdReceiveCallback(void *aContext, otMessage *aMessage, const otMessageInfo *aMessageInfo);
+
+// Variables
+static otInstance * instance;
+static otUdpSocket sMtdSocket;
+static otSockAddr sMulticastSockAddr;
+static const ButtonArray_t sButtonArray[BSP_BUTTON_COUNT] = BSP_BUTTON_INIT;
+static bool sButtonPressed = false;
+static bool sRxOnIdleButtonPressed = false;
+static bool sLedOn = false;
+static bool sAllowDeepSleep = false;
+static bool sTaskletsPendingSem = true;
+
+int main(int argc, char *argv[])
+{
+ otLinkModeConfig config;
+
+ otSysInit(argc, argv);
+ gpioInit(buttonCallback);
+
+ instance = otInstanceInitSingle();
+ assert(instance);
+
+ otCliUartInit(instance);
+
+ otLinkSetPollPeriod(instance, SLEEPY_POLL_PERIOD_MS);
+ setNetworkConfiguration(instance);
+ otSetStateChangedCallback(instance, handleNetifStateChanged, instance);
+
+ config.mRxOnWhenIdle = true;
+ config.mSecureDataRequests = true;
+ config.mDeviceType = 0;
+ config.mNetworkData = 0;
+ otThreadSetLinkMode(instance, config);
+
+ initUdp();
+ otIp6SetEnabled(instance, true);
+ otThreadSetEnabled(instance, true);
+ efr32SetSleepCallback(sleepCb, deviceOutOfSleepCb);
+
+ while (!otSysPseudoResetWasRequested())
+ {
+ otTaskletsProcess(instance);
+ otSysProcessDrivers(instance);
+
+ applicationTick();
+
+ // Put the EFR32 into deep sleep if callback sleepCb permits.
+ efr32Sleep();
+ }
+
+ otInstanceFinalize(instance);
+ return 0;
+}
+
+void deviceOutOfSleepCb(void)
+{
+ static uint32_t udpPacketSendTimer = 0;
+
+ if (udpPacketSendTimer == 0)
+ {
+ udpPacketSendTimer = otPlatAlarmMilliGetNow();
+ }
+
+ if ((otPlatAlarmMilliGetNow() - udpPacketSendTimer) >= 5000)
+ {
+ sButtonPressed = true;
+ udpPacketSendTimer = 0;
+ }
+}
+
+/*
+ * Callback from efr32Sleep to indicate if it is ok to go into sleep mode.
+ * This runs with interrupts disabled.
+ */
+bool sleepCb(void)
+{
+ bool allow;
+ allow = (sAllowDeepSleep && !sTaskletsPendingSem);
+ sTaskletsPendingSem = false;
+ return allow;
+}
+
+void otTaskletsSignalPending(otInstance *aInstance)
+{
+ (void)aInstance;
+ sTaskletsPendingSem = true;
+}
+
+/*
+ * Override default network settings, such as panid, so the devices can join a network
+ */
+void setNetworkConfiguration(otInstance *aInstance)
+{
+ static char aNetworkName[] = "SleepyEFR32";
+ otOperationalDataset aDataset;
+
+ memset(&aDataset, 0, sizeof(otOperationalDataset));
+
+ /*
+ * Fields that can be configured in otOperationDataset to override defaults:
+ * Network Name, Mesh Local Prefix, Extended PAN ID, PAN ID, Delay Timer,
+ * Channel, Channel Mask Page 0, Network Master Key, PSKc, Security Policy
+ */
+ aDataset.mActiveTimestamp = 1;
+ aDataset.mComponents.mIsActiveTimestampPresent = true;
+
+ /* Set Channel to 15 */
+ aDataset.mChannel = 15;
+ aDataset.mComponents.mIsChannelPresent = true;
+
+ /* Set Pan ID to 2222 */
+ aDataset.mPanId = (otPanId)0x2222;
+ aDataset.mComponents.mIsPanIdPresent = true;
+
+ /* Set Extended Pan ID to C0DE1AB5C0DE1AB5 */
+ uint8_t extPanId[OT_EXT_PAN_ID_SIZE] = {0xC0, 0xDE, 0x1A, 0xB5, 0xC0, 0xDE, 0x1A, 0xB5};
+ memcpy(aDataset.mExtendedPanId.m8, extPanId, sizeof(aDataset.mExtendedPanId));
+ aDataset.mComponents.mIsExtendedPanIdPresent = true;
+
+ /* Set master key to 1234C0DE1AB51234C0DE1AB51234C0DE */
+ uint8_t key[OT_MASTER_KEY_SIZE] = {0x12, 0x34, 0xC0, 0xDE, 0x1A, 0xB5, 0x12, 0x34, 0xC0, 0xDE, 0x1A, 0xB5};
+ memcpy(aDataset.mMasterKey.m8, key, sizeof(aDataset.mMasterKey));
+ aDataset.mComponents.mIsMasterKeyPresent = true;
+
+ /* Set Network Name to SleepyEFR32 */
+ size_t length = strlen(aNetworkName);
+ assert(length <= OT_NETWORK_NAME_MAX_SIZE);
+ memcpy(aDataset.mNetworkName.m8, aNetworkName, length);
+ aDataset.mComponents.mIsNetworkNamePresent = true;
+
+ otDatasetSetActive(aInstance, &aDataset);
+}
+
+void handleNetifStateChanged(uint32_t aFlags, void *aContext)
+{
+ otLinkModeConfig config;
+
+ if ((aFlags & OT_CHANGED_THREAD_ROLE) != 0)
+ {
+ otDeviceRole changedRole = otThreadGetDeviceRole(aContext);
+
+ switch (changedRole)
+ {
+ case OT_DEVICE_ROLE_LEADER:
+ case OT_DEVICE_ROLE_ROUTER:
+ break;
+
+ case OT_DEVICE_ROLE_CHILD:
+ config.mRxOnWhenIdle = 0;
+ config.mSecureDataRequests = true;
+ config.mDeviceType = 0;
+ config.mNetworkData = 0;
+ otThreadSetLinkMode(instance, config);
+ sAllowDeepSleep = true;
+ break;
+
+ case OT_DEVICE_ROLE_DETACHED:
+ case OT_DEVICE_ROLE_DISABLED:
+ break;
+ }
+ }
+}
+
+/*
+ * Provide, if required an "otPlatLog()" function
+ */
+#if OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_APP
+void otPlatLog(otLogLevel aLogLevel, otLogRegion aLogRegion, const char *aFormat, ...)
+{
+ OT_UNUSED_VARIABLE(aLogLevel);
+ OT_UNUSED_VARIABLE(aLogRegion);
+ OT_UNUSED_VARIABLE(aFormat);
+
+ va_list ap;
+ va_start(ap, aFormat);
+ otCliPlatLogv(aLogLevel, aLogRegion, aFormat, ap);
+ va_end(ap);
+}
+#endif
+
+void gpioInit(void (*callback)(uint8_t pin))
+{
+ // set up button GPIOs to input with pullups
+ for (int i = 0; i < BSP_BUTTON_COUNT; i++)
+ {
+ GPIO_PinModeSet(sButtonArray[i].port, sButtonArray[i].pin, gpioModeInputPull, 1);
+ }
+ // set up interrupt based callback function on falling edge
+ GPIOINT_Init();
+ GPIOINT_CallbackRegister(sButtonArray[0].pin, callback);
+ GPIOINT_CallbackRegister(sButtonArray[1].pin, callback);
+ GPIO_IntConfig(sButtonArray[0].port, sButtonArray[0].pin, false, true, true);
+ GPIO_IntConfig(sButtonArray[1].port, sButtonArray[1].pin, false, true, true);
+
+ BSP_LedsInit();
+ BSP_LedClear(0);
+ BSP_LedClear(1);
+}
+
+void initUdp(void)
+{
+ otError error;
+ otSockAddr sockaddr;
+
+ memset(&sMulticastSockAddr, 0, sizeof sMulticastSockAddr);
+ otIp6AddressFromString(MULTICAST_ADDR, &sMulticastSockAddr.mAddress);
+ sMulticastSockAddr.mPort = MULTICAST_PORT;
+
+ memset(&sockaddr, 0, sizeof(sockaddr));
+ sockaddr.mPort = RECV_PORT;
+
+ error = otUdpOpen(instance, &sMtdSocket, mtdReceiveCallback, NULL);
+
+ if (error != OT_ERROR_NONE)
+ {
+ return;
+ }
+
+ error = otUdpBind(&sMtdSocket, &sockaddr);
+
+ if (error != OT_ERROR_NONE)
+ {
+ otUdpClose(&sMtdSocket);
+ return;
+ }
+}
+
+void buttonCallback(uint8_t pin)
+{
+ if ((pin & 0x01) == 0x01)
+ {
+ sButtonPressed = true;
+ }
+ else if ((pin & 0x01) == 0x00)
+ {
+ sRxOnIdleButtonPressed = true;
+ }
+}
+
+void applicationTick(void)
+{
+ otError error = 0;
+ otMessageInfo messageInfo;
+ otMessage * message = NULL;
+ char * payload = MTD_MESSAGE;
+ otLinkModeConfig config;
+
+ if (sRxOnIdleButtonPressed == true)
+ {
+ sRxOnIdleButtonPressed = false;
+ sAllowDeepSleep = !sAllowDeepSleep;
+ config.mRxOnWhenIdle = !sAllowDeepSleep;
+ config.mSecureDataRequests = true;
+ config.mDeviceType = 0;
+ config.mNetworkData = 0;
+ otThreadSetLinkMode(instance, config);
+ }
+
+ if (sButtonPressed == true)
+ {
+ sButtonPressed = false;
+
+ memset(&messageInfo, 0, sizeof(messageInfo));
+ memcpy(&messageInfo.mPeerAddr, &sMulticastSockAddr.mAddress, sizeof messageInfo.mPeerAddr);
+ messageInfo.mPeerPort = sMulticastSockAddr.mPort;
+
+ message = otUdpNewMessage(instance, NULL);
+
+ if (message != NULL)
+ {
+ error = otMessageAppend(message, payload, (uint16_t)strlen(payload));
+
+ if (error == OT_ERROR_NONE)
+ {
+ error = otUdpSend(&sMtdSocket, message, &messageInfo);
+
+ if (error == OT_ERROR_NONE)
+ {
+ return;
+ }
+ }
+ }
+
+ if (message != NULL)
+ {
+ otMessageFree(message);
+ }
+ }
+}
+
+void mtdReceiveCallback(void *aContext, otMessage *aMessage, const otMessageInfo *aMessageInfo)
+{
+ OT_UNUSED_VARIABLE(aContext);
+ OT_UNUSED_VARIABLE(aMessage);
+ OT_UNUSED_VARIABLE(aMessageInfo);
+ uint8_t buf[1500];
+ int length;
+
+ length = otMessageRead(aMessage, otMessageGetOffset(aMessage), buf, sizeof(buf) - 1);
+ buf[length] = '\0';
+
+ if (strcmp((char *)buf, FTD_MESSAGE) == 0)
+ {
+ sLedOn = !sLedOn;
+
+ if (sLedOn)
+ {
+ BSP_LedSet(0);
+ }
+ else
+ {
+ BSP_LedClear(0);
+ }
+ }
+}
diff --git a/examples/platforms/efr32mg21/system.c b/examples/platforms/efr32mg21/system.c
index 0fefb0c..ec5a37c 100644
--- a/examples/platforms/efr32mg21/system.c
+++ b/examples/platforms/efr32mg21/system.c
@@ -32,21 +32,29 @@
* This file includes the platform-specific initializers.
*/
+#include <assert.h>
#include <string.h>
+#include "openthread-system.h"
#include <openthread/platform/uart.h>
#include "common/logging.hpp"
#include "bsp.h"
#include "em_chip.h"
+#include "em_cmu.h"
+#include "em_core.h"
+#include "em_emu.h"
+#include "em_system.h"
+#include "hal-config.h"
#include "hal_common.h"
+#include "rail.h"
+#include "sl_mpu.h"
+#include "sl_sleeptimer.h"
#include "openthread-core-efr32-config.h"
#include "platform-efr32.h"
-#include "hal-config.h"
-
#if (HAL_FEM_ENABLE)
#include "fem-control.h"
#endif
@@ -58,23 +66,42 @@
void halInitChipSpecific(void);
otInstance *sInstance;
+static bool (*sCanSleepCallback)(void);
+static void (*sDeviceOutOfSleepCb)(void);
void otSysInit(int argc, char *argv[])
{
OT_UNUSED_VARIABLE(argc);
OT_UNUSED_VARIABLE(argv);
+ sl_status_t status;
+ __disable_irq();
+
+#undef FIXED_EXCEPTION
+#define FIXED_EXCEPTION(vectorNumber, functionName, deviceIrqn, deviceIrqHandler)
+#define EXCEPTION(vectorNumber, functionName, deviceIrqn, deviceIrqHandler, priorityLevel, subpriority) \
+ NVIC_SetPriority(deviceIrqn, NVIC_EncodePriority(PRIGROUP_POSITION - 1, priorityLevel, subpriority));
+#include NVIC_CONFIG
+#undef EXCEPTION
+
+ NVIC_SetPriorityGrouping(PRIGROUP_POSITION - 1);
CHIP_Init();
-
halInitChipSpecific();
-
BSP_Init(BSP_INIT_BCC);
+ CMU_OscillatorEnable(cmuOsc_LFRCO, true, true);
+ CMU_ClockEnable(cmuClock_RTCC, true);
+
+ status = sl_sleeptimer_init();
+ assert(status == SL_STATUS_OK);
+
#if (HAL_FEM_ENABLE)
initFem();
wakeupFem();
#endif
+ __enable_irq();
+
#if USE_EFR32_LOG
efr32LogInit();
#endif
@@ -97,6 +124,51 @@
#endif
}
+void efr32SetSleepCallback(bool (*aCallback)(void), void (*aCallbackWake)(void))
+{
+ sCanSleepCallback = aCallback;
+ sDeviceOutOfSleepCb = aCallbackWake;
+}
+
+void efr32Sleep(void)
+{
+ bool canDeepSleep = false;
+ int wakeupProcessTime = 1000;
+ CORE_DECLARE_IRQ_STATE;
+
+ if (RAIL_Sleep(wakeupProcessTime, &canDeepSleep) == RAIL_STATUS_NO_ERROR)
+ {
+ if (canDeepSleep)
+ {
+ CORE_ENTER_ATOMIC();
+ if (sCanSleepCallback != NULL && sCanSleepCallback())
+ {
+ EMU_EnterEM2(true);
+ }
+ CORE_EXIT_ATOMIC();
+ // TODO OT will handle an interrupt here and it mustn't call any RAIL APIs
+
+ while (RAIL_Wake(0) != RAIL_STATUS_NO_ERROR)
+ {
+ }
+
+ if (sDeviceOutOfSleepCb != NULL)
+ {
+ sDeviceOutOfSleepCb();
+ }
+ }
+ else
+ {
+ CORE_ENTER_ATOMIC();
+ if (sCanSleepCallback != NULL && sCanSleepCallback())
+ {
+ EMU_EnterEM1();
+ }
+ CORE_EXIT_ATOMIC();
+ }
+ }
+}
+
void otSysProcessDrivers(otInstance *aInstance)
{
sInstance = aInstance;
@@ -107,3 +179,8 @@
efr32RadioProcess(aInstance);
efr32AlarmProcess(aInstance);
}
+
+__WEAK void otSysEventSignalPending(void)
+{
+ // Intentionally empty
+}
diff --git a/examples/platforms/efr32mg21/uart.c b/examples/platforms/efr32mg21/uart.c
index ac71321..9d93a3b 100644
--- a/examples/platforms/efr32mg21/uart.c
+++ b/examples/platforms/efr32mg21/uart.c
@@ -34,6 +34,7 @@
#include <stddef.h>
+#include "openthread-system.h"
#include <openthread/platform/uart.h>
#include "utils/code_utils.h"
@@ -106,11 +107,13 @@
}
UARTDRV_Receive(aHandle, aData, 1, receiveDone);
+ otSysEventSignalPending();
}
static void transmitDone(UARTDRV_Handle_t aHandle, Ecode_t aStatus, uint8_t *aData, UARTDRV_Count_t aCount)
{
sTransmitLength = 0;
+ otSysEventSignalPending();
}
static void processReceive(void)
diff --git a/examples/platforms/gp712/radio.c b/examples/platforms/gp712/radio.c
index ff6031c..f10b5f8 100644
--- a/examples/platforms/gp712/radio.c
+++ b/examples/platforms/gp712/radio.c
@@ -350,6 +350,22 @@
return OT_ERROR_NOT_IMPLEMENTED;
}
+otError otPlatRadioGetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t *aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ OT_UNUSED_VARIABLE(aThreshold);
+
+ return OT_ERROR_NOT_IMPLEMENTED;
+}
+
+otError otPlatRadioSetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ OT_UNUSED_VARIABLE(aThreshold);
+
+ return OT_ERROR_NOT_IMPLEMENTED;
+}
+
int8_t otPlatRadioGetReceiveSensitivity(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
diff --git a/examples/platforms/kw41z/Makefile.am b/examples/platforms/kw41z/Makefile.am
index 4f3f7de..33d7ef4 100644
--- a/examples/platforms/kw41z/Makefile.am
+++ b/examples/platforms/kw41z/Makefile.am
@@ -30,6 +30,10 @@
lib_LIBRARIES = libopenthread-kw41z.a
+# Do not enable -Wundef for this platform
+override CFLAGS := $(filter-out -Wundef,$(CFLAGS))
+override CXXFLAGS := $(filter-out -Wundef,$(CXXFLAGS))
+
libopenthread_kw41z_a_CPPFLAGS = \
-DCPU_MKW41Z512VHT4 \
-I$(top_srcdir)/include \
diff --git a/examples/platforms/kw41z/radio.c b/examples/platforms/kw41z/radio.c
index db639cf..4baa443 100644
--- a/examples/platforms/kw41z/radio.c
+++ b/examples/platforms/kw41z/radio.c
@@ -515,6 +515,22 @@
return OT_ERROR_NONE;
}
+otError otPlatRadioGetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t *aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ OT_UNUSED_VARIABLE(aThreshold);
+
+ return OT_ERROR_NOT_IMPLEMENTED;
+}
+
+otError otPlatRadioSetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ OT_UNUSED_VARIABLE(aThreshold);
+
+ return OT_ERROR_NOT_IMPLEMENTED;
+}
+
int8_t otPlatRadioGetReceiveSensitivity(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
diff --git a/examples/platforms/nrf52811/DIAG.md b/examples/platforms/nrf52811/DIAG.md
deleted file mode 100644
index b2e7bc5..0000000
--- a/examples/platforms/nrf52811/DIAG.md
+++ /dev/null
@@ -1,154 +0,0 @@
-## Diagnostic module
-
-nRF52811 port extends [OpenThread Diagnostics Module][DIAG].
-
-New commands allow for more accurate low level radio testing.
-
-### New commands
- * [diag ccathreshold](#diag-ccathreshold)
- * [diag gpio](#diag-gpio)
- * [diag id](#diag-id)
- * [diag listen](#diag-listen)
- * [diag temp](#diag-temp)
- * [diag transmit](#diag-transmit)
-
-### Diagnostic radio packet
-[diag listen](#diag-listen) and [diag transmit](#diag-transmit) use radio frame payload specified below.
-
- ```c
- struct PlatformDiagMessage
- {
- const char mMessageDescriptor[11];
- uint8_t mChannel;
- int16_t mID;
- uint32_t mCnt;
- };
- ```
-
-`mMessageDescriptor` is a constant string `"DiagMessage"`.<br />
-`mChannel` contains the channel number on which the packet was transmitted.<br />
-`mID` contains the board ID set with the [diag id](#diag-id) command.<br />
-`mCnt` is a counter incremented every time the board transmits diagnostic radio packet.
-
-If the [listen mode](#diag-listen) is enabled and OpenThread was built with the`DEFAULT_LOGGING` flag, JSON string is printed every time a diagnostic radio packet is received.
-
-```JSON
- {"Frame":{
- "LocalChannel":"<listening board channel>",
- "RemoteChannel":"<mChannel>",
- "CNT":"<mCnt>",
- "LocalID":"<listening board ID>",
- "RemoteID":"<mID>",
- "RSSI":"<packet RSSI>"
- }}
-```
-
-### diag ccathreshold
-Get the current CCA threshold.
-
-### diag ccathreshold \<threshold\>
-Set the CCA threshold.
-
-Value range: 0 to 255.
-
-Default: `45`.
-
-### diag gpio
-Manage GPIO pins.
-
-### diag gpio \<pinnum\>
-Return the current value of the gpio.
-
-Note: \<pinnum\> is an integer that combines port and pin into a single,
-contiguous number space as follows:
-```
- pinnum = (port * 32) + pin
-```
-See also the [`NRF_GPIO_PIN_MAP`](../../../third_party/NordicSemiconductor/hal/nrf_gpio.h) macro.
-
-```bash
-> diag gpio 47
-gpio 47 = 0
-```
-
-### diag gpio out \<pinnum\>
-Set the given GPIO to the output mode.
-```bash
-> diag gpio out 47
-gpio 47: out
-```
-
-### diag gpio in \<pinnum\>
-Sets the given GPIO to the input mode with no pull variant.
-```bash
-> diag gpio in 47
-gpio 47: in no pull
-```
-
-### diag gpio set \<pinnum\>
-Sets the given output gpio to high.
-```bash
-> diag gpio set 47
-gpio 47 = 1
-```
-
-### diag gpio clr \<pinnum\>
-Sets the given output gpio to low.
-```bash
-> diag gpio clr 47
-gpio 47 = 0
-```
-
-### diag id
-Get board ID.
-
-### diag id \<id\>
-Set board ID.
-
-Value range: 0 to 32767.
-
-Default: `-1`.
-
-### diag listen
-Get the listen state.
-
-### diag listen \<listen\>
-Set the listen state.
-
-`0` disables the listen state.<br />
-`1` enables the listen state.
-
-By default, the listen state is disabled.
-
-### diag temp
-Get the temperature from the internal temperature sensor (in degrees Celsius).
-
-### diag transmit
-Get the message count and the interval between the messages that will be transmitted after `diag transmit start`.
-
-### diag transmit interval \<interval\>
-Set the interval in ms between the transmitted messages.
-
-Value range: 1 to 4294967295.
-
-Default: `1`.
-
-### diag transmit count \<count\>
-Set the number of messages to be transmitted.
-
-Value range: 1 to 2147483647<br />
-or<br />
-For continuous transmission: `-1`
-
-Default: `1`
-
-### diag transmit stop
-Stop the ongoing transmission regardless of the remaining number of messages to be sent.
-
-### diag transmit start
-Start transmiting messages with specified interval.
-
-### diag transmit carrier
-Start transmitting continuous carrier wave.
-
-[DIAG]: ./../../../src/core/diags/README.md
diff --git a/examples/platforms/nrf52811/Makefile.am b/examples/platforms/nrf52811/Makefile.am
deleted file mode 100644
index 543db89..0000000
--- a/examples/platforms/nrf52811/Makefile.am
+++ /dev/null
@@ -1,137 +0,0 @@
-#
-# Copyright (c) 2019, The OpenThread Authors.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# 1. Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# 3. Neither the name of the copyright holder nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
-# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-
-include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
-
-lib_LIBRARIES = \
- libopenthread-nrf52811.a \
- libopenthread-nrf52811-sdk.a \
- $(NULL)
-
-# Do not enable -pedantic-errors for nRF52811 driver library
-override CFLAGS := $(filter-out -pedantic-errors,$(CFLAGS))
-override CXXFLAGS := $(filter-out -pedantic-errors,$(CXXFLAGS))
-
-COMMONCPPFLAGS = \
- -DCONFIG_GPIO_AS_PINRESET \
- -DNRF52811_XXAA \
- -I$(top_srcdir)/include \
- -I$(top_srcdir)/examples/platforms \
- -I$(top_srcdir)/src/core \
- -I$(srcdir) \
- -I$(top_srcdir)/third_party/NordicSemiconductor \
- -I$(top_srcdir)/third_party/NordicSemiconductor/cmsis \
- -I$(top_srcdir)/third_party/NordicSemiconductor/dependencies \
- -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/clock \
- -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/common \
- -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio \
- -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/hal \
- -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/mac_features \
- -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/mac_features/ack_generator \
- -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/rsch \
- -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/rsch/raal \
- -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/power \
- -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/systick \
- -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/app_error \
- -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/atfifo \
- -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/atomic \
- -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/delay \
- -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/utf_converter \
- -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx \
- -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx/hal \
- -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx/drivers \
- -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx/drivers/include \
- -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx/mdk \
- -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx/soc \
- $(NULL)
-
-PLATFORM_COMMON_SOURCES = \
- alarm.c \
- diag.c \
- entropy.c \
- fem.c \
- flash.c \
- logging.c \
- misc.c \
- openthread-core-nrf52811-config.h \
- openthread-core-nrf52811-config-check.h \
- platform-config.h \
- platform-fem.h \
- platform-nrf5.h \
- radio.c \
- temp.c \
- spi-slave.c \
- system.c \
- uart.c \
- $(NULL)
-
-SINGLEPHY_SOURCES = \
- flash_nosd.c \
- $(NULL)
-
-SINGLEPHY_CPPFLAGS = \
- -DRAAL_SINGLE_PHY=1 \
- $(NULL)
-
-PLATFORM_SOURCES = \
- $(PLATFORM_COMMON_SOURCES) \
- $(NULL)
-
-libopenthread_nrf52811_a_CPPFLAGS = \
- $(COMMONCPPFLAGS) \
- $(SINGLEPHY_CPPFLAGS) \
- $(NULL)
-
-libopenthread_nrf52811_a_SOURCES = \
- $(PLATFORM_SOURCES) \
- $(SINGLEPHY_SOURCES) \
- $(NULL)
-
-libopenthread_nrf52811_sdk_a_CPPFLAGS = \
- $(COMMONCPPFLAGS) \
- $(SINGLEPHY_CPPFLAGS) \
- $(NULL)
-
-libopenthread_nrf52811_sdk_a_SOURCES = \
- $(PLATFORM_SOURCES) \
- $(SINGLEPHY_SOURCES) \
- $(NULL)
-
-PRETTY_FILES = \
- $(PLATFORM_COMMON_SOURCES) \
- $(NULL)
-Dash = -
-
-libopenthread_nrf52811_a_LIBADD = \
- $(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o") \
- $(shell find $(top_builddir)/third_party/jlink/SEGGER_RTT_V640/RTT $(Dash)type f $(Dash)name "*.o")
-
-libopenthread_nrf52811_sdk_a_LIBADD = \
- $(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o")
-
-include $(abs_top_nlbuild_autotools_dir)/automake/post.am
diff --git a/examples/platforms/nrf52811/Makefile.platform.am b/examples/platforms/nrf52811/Makefile.platform.am
deleted file mode 100644
index dbddb27..0000000
--- a/examples/platforms/nrf52811/Makefile.platform.am
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# Copyright (c) 2019, The OpenThread Authors.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# 1. Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# 3. Neither the name of the copyright holder nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
-# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-
-#
-# nrf52811 platform-specific Makefile
-#
-
-LDADD_COMMON += \
- $(top_builddir)/examples/platforms/nrf52811/libopenthread-nrf52811.a \
- $(top_builddir)/third_party/NordicSemiconductor/libnordicsemi-nrf52811-sdk.a \
- $(top_builddir)/third_party/NordicSemiconductor/libnordicsemi-nrf52811-radio-driver.a \
- $(NULL)
-
-if OPENTHREAD_ENABLE_CUSTOM_LINKER_FILE
-LDFLAGS_COMMON += \
- -T $(OPENTHREAD_CUSTOM_LINKER_FILE) \
- $(NULL)
-else
-LDFLAGS_COMMON += \
- -T $(top_srcdir)/examples/platforms/nrf52811/nrf52811.ld \
- $(NULL)
-endif
diff --git a/examples/platforms/nrf52811/README.md b/examples/platforms/nrf52811/README.md
deleted file mode 100644
index 046b987..0000000
--- a/examples/platforms/nrf52811/README.md
+++ /dev/null
@@ -1,359 +0,0 @@
-# OpenThread on nRF52811 Example
-
-This directory contains example platform drivers for [Nordic Semiconductor nRF52811 SoC][nRF52811].
-
-[nRF52811]: https://www.nordicsemi.com/Products/Low-power-short-range-wireless/nRF52811
-
-This SoC is meant to be used in the configuration that involves the Host Processor and the IEEE 802.15.4 radio.
-In this configuration, the full OpenThread stack is running on the Host Processor and the nRF52811 SoC acts as an IEEE 802.15.4 radio.
-The radio is running a minimal OpenThread implementation that allows for communication between the Host Processor and the nRF52811.
-In this architecture the nRF52811 SoC device is called RCP (Radio Co-Processor).
-
-The nRF52811 platform is currently under development.
-
-For the SoC capable to a run full OpenThread stack, see the [nRF52840 platform][nRF52840-page].
-
-[nRF52840-page]: ./../nrf52840/README.md
-
-## Emulation on nRF52840
-
-You can use examples for nRF52811 on nRF52840 without any changes in the generated binary files. This allows for easier testing in early stages of development.
-
-## Prerequisites
-
-Before you start building the examples, you must download and install the toolchain and the tools required for flashing and debugging.
-
-### Toolchain
-
-Download and install the [GNU toolchain for ARM Cortex-M][gnu-toolchain].
-
-[gnu-toolchain]: https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-rm
-
-To install the GNU toolchain and its dependencies, run the following commands in Bash:
-
-```bash
-$ cd <path-to-openthread>
-$ ./script/bootstrap
-```
-
-### Flashing and debugging tools
-
-[nRF5-Command-Line-Tools]: https://www.nordicsemi.com/Software-and-Tools/Development-Tools/nRF5-Command-Line-Tools
-
-Install the [nRF5 Command Line Tools][nRF5-Command-Line-Tools] to flash, debug, and make use of logging features on the nRF52811 DK with SEGGER J-Link.
-
-## Building the examples
-
-With this platform, you can build:
- - Limited version of CLI example (e.g. without Thread commissioning functionality)
- - RCP example that consists of two parts:
- - firmware that is flashed to the nRF52811 SoC
- - host executables to be executed on a POSIX platform in case of the RCP usage
-
-### Building host executables
-```bash
-$ cd <path-to-openthread>
-$ ./bootstrap
-$ make -f src/posix/Makefile-posix
-```
-
-After a successful build, executables can be found in
-`<path-to-openthread>/openthread/output/posix/<system-architecture>/bin`.
-It is recommended to copy them to `/usr/bin` for easier access.
-
-### Building the firmware with UART support
-
-To build the firmware using default UART RCP transport, run the following make commands:
-
-```bash
-$ cd <path-to-openthread>
-$ ./bootstrap
-$ make -f examples/Makefile-nrf52811
-```
-
-After a successful build, the `elf` files can be found in
-`<path-to-openthread>/output/nrf52811/bin`.
-You can convert them to hex using `arm-none-eabi-objcopy`:
-```bash
-$ arm-none-eabi-objcopy -O ihex ot-cli-mtd ot-cli-mtd.hex
-$ arm-none-eabi-objcopy -O ihex ot-rcp ot-rcp.hex
-```
-
-### Building the firmware with native SPI support
-
-You can build the libraries with support for the native SPI Slave.
-To do so, build the libraries with the following parameter:
-```
-$ make -f examples/Makefile-nrf52811 NCP_SPI=1
-```
-
-With this option enabled, the RCP example can communicate through SPI with wpantund (provided that the wpantund host supports SPI Master). To achieve this communication, choose the right SPI device in the wpantund configuration file, `/etc/wpantund.conf`. See the following example.
-
-
-```
-Config:NCP:SocketPath "system:/usr/bin/ot-ncp /usr/bin/spi-hdlc-adapter -- '--stdio -i /sys/class/gpio/gpio25 /dev/spidev0.1'"
-```
-
-In this example, [spi-hdlc-adapter][spi-hdlc-adapter] is a tool that you can use to communicate between RCP and wpantund over SPI. For this example, `spi-hdlc-adapter` is installed in `/usr/bin`.
-
-The default SPI Slave pin configuration for nRF52811 is defined in `examples/platforms/nrf52811/platform-config.h`.
-
-[spi-hdlc-adapter]: https://github.com/openthread/openthread/tree/master/tools/spi-hdlc-adapter
-
-### IEEE EUI-64 address
-
-When the Thread device is configured to obtain the Thread Network security credentials with either Thread Commissioning or an out-of-band method, the extended MAC address should be constructed out of the globally unique IEEE EUI-64.
-
-The IEEE EUI-64 address consists of two parts:
- - 24 bits of MA-L (MAC Address Block Large), formerly called OUI (Organizationally Unique Identifier)
- - 40-bit device unique identifier
-
-By default, the device uses Nordic Semiconductor's MA-L (f4-ce-36). You can modify it by overwriting the `OPENTHREAD_CONFIG_STACK_VENDOR_OUI` define, located in the `openthread-core-nrf52811-config.h` file. This value must be publicly registered by the IEEE Registration Authority.
-
-You can also provide the full IEEE EUI-64 address by providing a custom `otPlatRadioGetIeeeEui64` function. To do this, define the flag `OPENTHREAD_CONFIG_ENABLE_PLATFORM_EUI64_CUSTOM_SOURCE`.
-
-After the Thread Network security credentials have been successfully obtained, the device uses randomly generated extended MAC address.
-
-## Flashing binaries
-
-Once the examples and libraries are built, flash the compiled binaries onto nRF52811
-using `nrfjprog` that is part of the [nRFx Command Line Tools][nRF5-Command-Line-Tools].
-
-Run the following command:
-
-```bash
-$ nrfjprog -f nrf52 --chiperase --program output/nrf52811/bin/ot-cli-mtd.hex --reset
-```
-
-## Running the example
-
-To test the example:
-
-1. Prepare two boards.
-
-2. Flash one with the `CLI MTD Example` (ot-cli-mtd.hex, as shown above).
-
-3. Flash `RCP Example` (ot-rcp.hex) to the other board.
-
-4. Connect the RCP to the PC.
-
-5. Start the ot-cli host application and connect with the RCP.
- It is assumed that the default UART version of RCP is being used (make executed without the NCP-SPI=1 flag).
- On Linux system, call a port name, for example `/dev/ttyACM0` for the first connected development kit, and `/dev/ttyACM1` for the second one.
-
- ```bash
- $ /usr/bin/ot-cli /dev/ttyACM0 115200
- ```
-
- You are now connected with the CLI on the first board
-
-6. Use the following commands to form a network:
-
- ```bash
- > dataset init new
- Done
- > dataset
- Active Timestamp: 1
- Channel: 13
- Channel Mask: 07fff800
- Ext PAN ID: d63e8e3e495ebbc3
- Mesh Local Prefix: fd3d:b50b:f96d:722d/64
- Master Key: dfd34f0f05cad978ec4e32b0413038ff
- Network Name: OpenThread-8f28
- PAN ID: 0x8f28
- PSKc: c23a76e98f1a6483639b1ac1271e2e27
- Security Policy: 0, onrcb
- Done
- > dataset commit active
- Done
- > ifconfig up
- Done
- > thread start
- Done
- ```
-
- After a couple of seconds the node will become a Leader of the network.
-
- ```bash
- > state
- leader
- ```
-
-7. Open a terminal connection on the second board and attach a node to the network:
-
- a. Start a terminal emulator like screen.
-
- b. Connect to the used COM port with the following direct UART settings:
-
- * Baud rate: 115200
- * 8 data bits
- * 1 stop bit
- * No parity
- * HW flow control: RTS/CTS
- This allows you to view the raw UART output.
-
- c. Run the following command to connect to the second board.
-
- ```shell
- screen /dev/ttyACM1 115200
- ```
-
- You are now connected with the CLI on the second board
-
-8. Use the following commands to attach to the network on the second board:
-
- ```bash
- > dataset masterkey dfd34f0f05cad978ec4e32b0413038ff
- Done
- > dataset commit active
- Done
- > ifconfig up
- Done
- > thread start
- Done
- ```
-
- After a couple of seconds the second node will attach and become a Child.
-
- ```bash
- > state
- child
- ```
-
-9. List all IPv6 addresses of the first board.
-
- ```bash
- > ipaddr
- fd3d:b50b:f96d:722d:0:ff:fe00:fc00
- fd3d:b50b:f96d:722d:0:ff:fe00:c00
- fd3d:b50b:f96d:722d:7a73:bff6:9093:9117
- fe80:0:0:0:6c41:9001:f3d6:4148
- Done
- ```
-
-10. Choose one of them and send an ICMPv6 ping from the second board.
-
- ```bash
- > ping fd3d:b50b:f96d:722d:7a73:bff6:9093:9117
- 16 bytes from fd3d:b50b:f96d:722d:558:f56b:d688:799: icmp_seq=1 hlim=64 time=24ms
- ```
-
-For a list of all available commands, visit [OpenThread CLI Reference README.md][CLI].
-
-[CLI]: ./../../../src/cli/README.md
-
-## SEGGER J-Link tools
-
-SEGGER J-Link tools allow to debug and flash generated firmware using on-board debugger or external one.
-
-### Working with RTT logging
-
-By default, the OpenThread's logging module provides functions to output logging
-information over SEGGER's Real Time Transfer (RTT).
-
-You can set the desired log level by using the `OPENTHREAD_CONFIG_LOG_LEVEL` define.
-
-To enable the highest verbosity level, append `FULL_LOGS` flag to the `make` command:
-```
-$ make -f examples/Makefile-nrf52811 FULL_LOGS=1
-```
-
-#### Enable logging on Windows
-
-1. Connect the DK to your machine with a USB cable.
-2. Run `J-Link RTT Viewer`. The configuration window appears.
-3. From the Specify Target Device dropdown menu, select `NRF52810_XXAA`.
-4. From the Target Interface & Speed dropdown menu, select `SWD`.
-
-#### Enable logging on Linux
-
-1. Connect the DK to your machine with a USB cable.
-2. Run `JLinkExe` to connect to the target. For example:
-```
-JLinkExe -device NRF52810_XXAA -if SWD -speed 4000 -autoconnect 1 -SelectEmuBySN <SEGGER_ID> -RTTTelnetPort 19021
-```
-3. Run `JLinkRTTTelnet` to obtain the RTT logs from the connected device in a separate console. For example:
-```
-JLinkRTTClient -RTTTelnetPort 19021
-```
-
-### Mass Storage Device known issue
-
-Depending on your version, due to a known issue in SEGGER's J-Link firmware, you might experience data corruption or data drops if you use the serial port. You can avoid this issue by disabling the Mass Storage Device.
-
-#### Disabling the Mass Storage Device on Windows
-
-1. Connect the DK to your machine with a USB cable.
-2. Run `J-Link Commander`. The configuration window appears.
-3. From the Specify Target Device dropdown menu, select `NRF52810_XXAA`.
-4. From the Target Interface & Speed dropdown menu, select `SWD`.
-5. Run the following command:
-```
-MSDDisable
-```
-6. Power cycle the DK.
-
-#### Disabling the Mass Storage Device on Linux
-
-1. Connect the DK to your machine with a USB cable.
-2. Run `JLinkExe` to connect to the target. For example:
-```
-JLinkExe -device NRF52810_XXAA -if SWD -speed 4000 -autoconnect 1 -SelectEmuBySN <SEGGER_ID>
-```
-3. Run the following command:
-```
-MSDDisable
-```
-4. Power cycle the DK.
-
-### Hardware Flow Control detection
-
-By default, SEGGER J-Link automatically detects at runtime whether the target is using Hardware Flow Control (HWFC).
-
-The automatic HWFC detection is done by driving P0.07 (Clear to Send - CTS) from the interface MCU and evaluating the state of P0.05 (Request to Send - RTS) when the first data is sent or received. If the state of P0.05 (RTS) is high, it is assumed that HWFC is not used.
-
-To avoid potential race conditions, you can force HWFC and bypass the runtime auto-detection.
-
-#### Disabling the HWFC detection on Windows
-
-1. Connect the DK to your machine with a USB cable.
-2. Run `J-Link Commander`. The configuration window appears.
-3. From the Specify Target Device dropdown menu, select `NRF52810_XXAA`.
-4. From the Target Interface & Speed dropdown menu, select `SWD`.
-5. Run the following command:
-```
-SetHWFC Force
-```
-6. Power cycle the DK.
-
-#### Disabling the HWFC detection on Linux
-
-1. Connect the DK to your machine with a USB cable.
-2. Run `JLinkExe` to connect to the target. For example:
-```
-JLinkExe -device NRF52810_XXAA -if SWD -speed 4000 -autoconnect 1 -SelectEmuBySN <SEGGER_ID>
-```
-3. Run the following command:
-```
-SetHWFC Force
-```
-4. Power cycle the DK.
-
-You can find more details [here][J-Link-OB].
-
-[J-Link-OB]: https://wiki.segger.com/J-Link_OB_SAM3U_NordicSemi#Hardware_flow_control_support
-
-## Diagnostic module
-
-nRF52811 supports [OpenThread Diagnostics Module][DIAG], with some additional features.
-
-For more information, see [nRF Diag command reference][nRFDIAG].
-
-[DIAG]: ./../../../src/core/diags/README.md
-[nRFDIAG]: DIAG.md
-
-## Radio driver documentation
-
-The radio driver documentation includes *.uml state machines sequence diagrams that can be opened with [PlantUML][PlantUML-url].
-
-[PlantUML-url]: http://plantuml.com/
diff --git a/examples/platforms/nrf52811/alarm.c b/examples/platforms/nrf52811/alarm.c
deleted file mode 100644
index 6f2599c..0000000
--- a/examples/platforms/nrf52811/alarm.c
+++ /dev/null
@@ -1,690 +0,0 @@
-/*
- * Copyright (c) 2019, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This file implements the OpenThread platform abstraction for the alarm.
- *
- */
-
-#include <openthread-core-config.h>
-#include <openthread/config.h>
-
-#include <assert.h>
-#include <stdbool.h>
-#include <stdint.h>
-#include <string.h>
-
-#include <openthread/platform/alarm-micro.h>
-#include <openthread/platform/alarm-milli.h>
-#include <openthread/platform/diag.h>
-#include <openthread/platform/time.h>
-
-#include "openthread-system.h"
-
-#include "platform-config.h"
-#include "platform-nrf5.h"
-#include "cmsis/core_cmFunc.h"
-
-#include <drivers/clock/nrf_drv_clock.h>
-#include <drivers/radio/nrf_802154_utils.h>
-#include <drivers/radio/platform/lp_timer/nrf_802154_lp_timer.h>
-
-#include <hal/nrf_rtc.h>
-
-#include <openthread/config.h>
-
-// clang-format off
-#define RTC_FREQUENCY NRF_802154_RTC_FREQUENCY
-
-#define US_PER_MS 1000ULL
-#define US_PER_S NRF_802154_US_PER_S
-#define US_PER_OVERFLOW (512UL * NRF_802154_US_PER_S) ///< Time that has passed between overflow events. On full RTC speed, it occurs every 512 s.
-
-#define MS_PER_S 1000UL
-
-#define MIN_RTC_COMPARE_EVENT_TICKS 2 ///< Minimum number of RTC ticks delay that guarantees that RTC compare event will fire.
-#define MIN_RTC_COMPARE_EVENT_DT (MIN_RTC_COMPARE_EVENT_TICKS * NRF_802154_US_PER_TICK) ///< Minimum time delta from now before RTC compare event is guaranteed to fire.
-#define EPOCH_32BIT_US (1ULL << 32)
-#define EPOCH_FROM_TIME(time) ((time) & ((uint64_t)UINT32_MAX << 32))
-
-#define XTAL_ACCURACY 40 // The crystal used on nRF52840PDK has ±20ppm accuracy.
-// clang-format on
-
-typedef enum
-{
- kMsTimer,
- kUsTimer,
- k802154Timer,
- k802154Sync,
- kNumTimers
-} AlarmIndex;
-
-typedef struct
-{
- volatile bool mFireAlarm; ///< Information for processing function, that alarm should fire.
- uint64_t mTargetTime; ///< Alarm fire time (in millisecond for MsTimer, in microsecond for UsTimer)
-} AlarmData;
-
-typedef struct
-{
- uint32_t mChannelNumber;
- uint32_t mCompareEventMask;
- nrf_rtc_event_t mCompareEvent;
- nrf_rtc_int_t mCompareInt;
-} AlarmChannelData;
-
-static volatile uint32_t sOverflowCounter; ///< Counter of RTC overflowCounter, incremented by 2 on each OVERFLOW event.
-static volatile uint8_t sMutex; ///< Mutex for write access to @ref sOverflowCounter.
-static volatile uint64_t sTimeOffset = 0; ///< Time overflowCounter to keep track of current time (in millisecond).
-static volatile bool sEventPending; ///< Timer fired and upper layer should be notified.
-static AlarmData sTimerData[kNumTimers]; ///< Data of the timers.
-
-static const AlarmChannelData sChannelData[kNumTimers] = //
- { //
- [kMsTimer] =
- {
- .mChannelNumber = 0,
- .mCompareEventMask = RTC_EVTEN_COMPARE0_Msk,
- .mCompareEvent = NRF_RTC_EVENT_COMPARE_0,
- .mCompareInt = NRF_RTC_INT_COMPARE0_MASK,
- },
- [kUsTimer] =
- {
- .mChannelNumber = 1,
- .mCompareEventMask = RTC_EVTEN_COMPARE1_Msk,
- .mCompareEvent = NRF_RTC_EVENT_COMPARE_1,
- .mCompareInt = NRF_RTC_INT_COMPARE1_MASK,
- },
- [k802154Timer] =
- {
- .mChannelNumber = 2,
- .mCompareEventMask = RTC_EVTEN_COMPARE2_Msk,
- .mCompareEvent = NRF_RTC_EVENT_COMPARE_2,
- .mCompareInt = NRF_RTC_INT_COMPARE2_MASK,
- },
- [k802154Sync] = {
- .mChannelNumber = 3,
- .mCompareEventMask = RTC_EVTEN_COMPARE3_Msk,
- .mCompareEvent = NRF_RTC_EVENT_COMPARE_3,
- .mCompareInt = NRF_RTC_INT_COMPARE3_MASK,
- }};
-
-static inline bool MutexGet(void)
-{
- do
- {
- volatile uint8_t mutexValue = __LDREXB(&sMutex);
-
- if (mutexValue)
- {
- __CLREX();
- return false;
- }
- } while (__STREXB(1, &sMutex));
-
- // Disable OVERFLOW interrupt to prevent lock-up in interrupt context while mutex is locked from lower priority
- // context and OVERFLOW event flag is stil up.
- nrf_rtc_int_disable(RTC_INSTANCE, NRF_RTC_INT_OVERFLOW_MASK);
-
- __DMB();
-
- return true;
-}
-
-static inline void MutexRelease(void)
-{
- // Re-enable OVERFLOW interrupt.
- nrf_rtc_int_enable(RTC_INSTANCE, NRF_RTC_INT_OVERFLOW_MASK);
-
- __DMB();
- sMutex = 0;
-}
-
-static inline uint64_t TimeToTicks(uint64_t aTime, AlarmIndex aIndex)
-{
- if (aIndex == kMsTimer)
- {
- aTime *= US_PER_MS;
- }
-
- return NRF_802154_US_TO_RTC_TICKS(aTime);
-}
-
-static inline uint64_t TicksToTime(uint64_t aTicks, AlarmIndex aIndex)
-{
- uint64_t result = NRF_802154_RTC_TICKS_TO_US(aTicks);
-
- if (aIndex == kMsTimer)
- {
- result /= US_PER_MS;
- }
-
- return result;
-}
-
-static inline bool AlarmShallStrike(uint64_t aNow, AlarmIndex aIndex)
-{
- return aNow >= sTimerData[aIndex].mTargetTime;
-}
-
-static uint32_t GetOverflowCounter(void)
-{
- uint32_t overflowCounter;
-
- // Get mutual access for writing to sOverflowCounter variable.
- if (MutexGet())
- {
- bool increasing = false;
-
- // Check if interrupt was handled already.
- if (nrf_rtc_event_pending(RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW))
- {
- sOverflowCounter++;
- increasing = true;
-
- __DMB();
-
- // Mark that interrupt was handled.
- nrf_rtc_event_clear(RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW);
-
- // Result should be incremented. sOverflowCounter will be incremented after mutex is released.
- }
- else
- {
- // Either overflow handling is not needed OR we acquired the mutex just after it was released.
- // Overflow is handled after mutex is released, but it cannot be assured that sOverflowCounter
- // was incremented for the second time, so we increment the result here.
- }
-
- overflowCounter = (sOverflowCounter + 1) / 2;
-
- MutexRelease();
-
- if (increasing)
- {
- // It's virtually impossible that overflow event is pending again before next instruction is performed. It
- // is an error condition.
- assert(sOverflowCounter & 0x01);
-
- // Increment the counter for the second time, to allow instructions from other context get correct value of
- // the counter.
- sOverflowCounter++;
- }
- }
- else
- {
- // Failed to acquire mutex.
- if (nrf_rtc_event_pending(RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW) || (sOverflowCounter & 0x01))
- {
- // Lower priority context is currently incrementing sOverflowCounter variable.
- overflowCounter = (sOverflowCounter + 2) / 2;
- }
- else
- {
- // Lower priority context has already incremented sOverflowCounter variable or incrementing is not needed
- // now.
- overflowCounter = sOverflowCounter / 2;
- }
- }
-
- return overflowCounter;
-}
-
-static uint32_t GetRtcCounter(void)
-{
- return nrf_rtc_counter_get(RTC_INSTANCE);
-}
-
-static void GetOffsetAndCounter(uint32_t *aOffset, uint32_t *aCounter)
-{
- uint32_t offset1 = GetOverflowCounter();
-
- __DMB();
-
- uint32_t rtcValue1 = GetRtcCounter();
-
- __DMB();
-
- uint32_t offset2 = GetOverflowCounter();
-
- *aOffset = offset2;
- *aCounter = (offset1 == offset2) ? rtcValue1 : GetRtcCounter();
-}
-
-static uint64_t GetTime(uint32_t aOffset, uint32_t aCounter, AlarmIndex aIndex)
-{
- uint64_t result = (uint64_t)aOffset * US_PER_OVERFLOW + TicksToTime(aCounter, kUsTimer);
-
- if (aIndex == kMsTimer)
- {
- result /= US_PER_MS;
- }
-
- return result;
-}
-
-static uint64_t GetCurrentTime(AlarmIndex aIndex)
-{
- uint32_t offset;
- uint32_t rtc_counter;
-
- GetOffsetAndCounter(&offset, &rtc_counter);
-
- return GetTime(offset, rtc_counter, aIndex);
-}
-
-static void HandleCompareMatch(AlarmIndex aIndex, bool aSkipCheck)
-{
- nrf_rtc_event_clear(RTC_INSTANCE, sChannelData[aIndex].mCompareEvent);
-
- uint64_t now = GetCurrentTime(aIndex);
-
- // In case the target time was larger than single overflow,
- // we should only strike the timer on final compare event.
- if (aSkipCheck || AlarmShallStrike(now, aIndex))
- {
- nrf_rtc_event_disable(RTC_INSTANCE, sChannelData[aIndex].mCompareEventMask);
- nrf_rtc_int_disable(RTC_INSTANCE, sChannelData[aIndex].mCompareInt);
-
- switch (aIndex)
- {
- case k802154Timer:
- nrf_802154_lp_timer_fired();
- break;
-
- case k802154Sync:
- nrf_802154_lp_timer_synchronized();
- break;
-
- case kMsTimer:
- case kUsTimer:
- sTimerData[aIndex].mFireAlarm = true;
- sEventPending = true;
- otSysEventSignalPending();
- break;
-
- default:
- assert(false);
- }
- }
-}
-
-static uint64_t ConvertT0AndDtTo64BitTime(uint32_t aT0, uint32_t aDt, const uint64_t *aNow)
-{
- uint64_t now;
- now = *aNow;
-
- if (((uint32_t)now < aT0) && ((aT0 - (uint32_t)now) > (UINT32_MAX / 2)))
- {
- now -= EPOCH_32BIT_US;
- }
- else if (((uint32_t)now > aT0) && (((uint32_t)now) - aT0 > (UINT32_MAX / 2)))
- {
- now += EPOCH_32BIT_US;
- }
-
- return (EPOCH_FROM_TIME(now)) + aT0 + aDt;
-}
-
-static uint64_t RoundUpTimeToTimerTicksMultiply(uint64_t aTime, AlarmIndex aIndex)
-{
- uint64_t ticks = TimeToTicks(aTime, aIndex);
- uint64_t result = TicksToTime(ticks, aIndex);
- return result;
-}
-
-static void TimerStartAt(uint32_t aT0, uint32_t aDt, AlarmIndex aIndex, const uint64_t *aNow)
-{
- uint64_t targetCounter;
- uint64_t targetTime;
-
- nrf_rtc_int_disable(RTC_INSTANCE, sChannelData[aIndex].mCompareInt);
- nrf_rtc_event_enable(RTC_INSTANCE, sChannelData[aIndex].mCompareEventMask);
-
- targetTime = ConvertT0AndDtTo64BitTime(aT0, aDt, aNow);
- targetCounter = TimeToTicks(targetTime, aIndex) & RTC_CC_COMPARE_Msk;
-
- sTimerData[aIndex].mTargetTime = RoundUpTimeToTimerTicksMultiply(targetTime, aIndex);
-
- nrf_rtc_cc_set(RTC_INSTANCE, sChannelData[aIndex].mChannelNumber, targetCounter);
-}
-
-static void AlarmStartAt(uint32_t aT0, uint32_t aDt, AlarmIndex aIndex)
-{
- uint32_t offset;
- uint32_t rtc_value;
- uint64_t now;
- uint64_t now_rtc_protected;
-
- GetOffsetAndCounter(&offset, &rtc_value);
- now = GetTime(offset, rtc_value, aIndex);
-
- TimerStartAt(aT0, aDt, aIndex, &now);
-
- if (rtc_value != GetRtcCounter())
- {
- GetOffsetAndCounter(&offset, &rtc_value);
- }
-
- now_rtc_protected = GetTime(offset, rtc_value + MIN_RTC_COMPARE_EVENT_TICKS, aIndex);
-
- if (AlarmShallStrike(now_rtc_protected, aIndex))
- {
- HandleCompareMatch(aIndex, true);
-
- /**
- * Normally ISR sets event flag automatically.
- * Here we are calling HandleCompareMatch explicitly and no ISR will be fired.
- * To prevent possible permanent sleep on next WFE we have to set event flag.
- */
- __SEV();
- }
- else
- {
- nrf_rtc_int_enable(RTC_INSTANCE, sChannelData[aIndex].mCompareInt);
- }
-}
-
-static void TimerSyncStartAt(uint32_t aT0, uint32_t aDt, const uint64_t *aNow)
-{
- TimerStartAt(aT0, aDt, k802154Sync, aNow);
-
- nrf_rtc_int_enable(RTC_INSTANCE, sChannelData[k802154Sync].mCompareInt);
-}
-
-static void AlarmStop(AlarmIndex aIndex)
-{
- nrf_rtc_event_disable(RTC_INSTANCE, sChannelData[aIndex].mCompareEventMask);
- nrf_rtc_int_disable(RTC_INSTANCE, sChannelData[aIndex].mCompareInt);
- nrf_rtc_event_clear(RTC_INSTANCE, sChannelData[aIndex].mCompareEvent);
-
- sTimerData[aIndex].mFireAlarm = false;
-}
-
-void nrf5AlarmInit(void)
-{
- memset(sTimerData, 0, sizeof(sTimerData));
- sOverflowCounter = 0;
- sMutex = 0;
- sTimeOffset = 0;
-
- // Setup low frequency clock.
- nrf_drv_clock_lfclk_request(NULL);
-
- while (!nrf_drv_clock_lfclk_is_running())
- {
- }
-
- // Setup RTC timer.
- NVIC_SetPriority(RTC_IRQN, RTC_IRQ_PRIORITY);
- NVIC_ClearPendingIRQ(RTC_IRQN);
- NVIC_EnableIRQ(RTC_IRQN);
-
- nrf_rtc_prescaler_set(RTC_INSTANCE, 0);
-
- nrf_rtc_event_clear(RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW);
- nrf_rtc_event_enable(RTC_INSTANCE, RTC_EVTEN_OVRFLW_Msk);
- nrf_rtc_int_enable(RTC_INSTANCE, NRF_RTC_INT_OVERFLOW_MASK);
-
- for (uint32_t i = 0; i < kNumTimers; i++)
- {
- nrf_rtc_event_clear(RTC_INSTANCE, sChannelData[i].mCompareEvent);
- nrf_rtc_event_disable(RTC_INSTANCE, sChannelData[i].mCompareEventMask);
- nrf_rtc_int_disable(RTC_INSTANCE, sChannelData[i].mCompareInt);
- }
-
- nrf_rtc_task_trigger(RTC_INSTANCE, NRF_RTC_TASK_START);
-}
-
-void nrf5AlarmDeinit(void)
-{
- nrf_rtc_task_trigger(RTC_INSTANCE, NRF_RTC_TASK_STOP);
-
- for (uint32_t i = 0; i < kNumTimers; i++)
- {
- nrf_rtc_event_clear(RTC_INSTANCE, sChannelData[i].mCompareEvent);
- nrf_rtc_event_disable(RTC_INSTANCE, sChannelData[i].mCompareEventMask);
- nrf_rtc_int_disable(RTC_INSTANCE, sChannelData[i].mCompareInt);
- }
-
- nrf_rtc_int_disable(RTC_INSTANCE, NRF_RTC_INT_OVERFLOW_MASK);
- nrf_rtc_event_disable(RTC_INSTANCE, RTC_EVTEN_OVRFLW_Msk);
- nrf_rtc_event_clear(RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW);
-
- nrf_802154_lp_timer_sync_stop();
-
- NVIC_DisableIRQ(RTC_IRQN);
- NVIC_ClearPendingIRQ(RTC_IRQN);
- NVIC_SetPriority(RTC_IRQN, 0);
-
- nrf_drv_clock_lfclk_release();
-}
-
-void nrf5AlarmProcess(otInstance *aInstance)
-{
- do
- {
- sEventPending = false;
-
- if (sTimerData[kMsTimer].mFireAlarm)
- {
- sTimerData[kMsTimer].mFireAlarm = false;
-
-#if OPENTHREAD_CONFIG_DIAG_ENABLE
-
- if (otPlatDiagModeGet())
- {
- otPlatDiagAlarmFired(aInstance);
- }
- else
-#endif
- {
- otPlatAlarmMilliFired(aInstance);
- }
- }
-
- if (sTimerData[kUsTimer].mFireAlarm)
- {
- sTimerData[kUsTimer].mFireAlarm = false;
-
- otPlatAlarmMicroFired(aInstance);
- }
- } while (sEventPending);
-}
-
-inline uint64_t nrf5AlarmGetCurrentTime(void)
-{
- return GetCurrentTime(kUsTimer);
-}
-
-uint32_t otPlatAlarmMilliGetNow(void)
-{
- return (uint32_t)(nrf5AlarmGetCurrentTime() / US_PER_MS);
-}
-
-void otPlatAlarmMilliStartAt(otInstance *aInstance, uint32_t aT0, uint32_t aDt)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- AlarmStartAt(aT0, aDt, kMsTimer);
-}
-
-void otPlatAlarmMilliStop(otInstance *aInstance)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- AlarmStop(kMsTimer);
-}
-
-uint32_t otPlatAlarmMicroGetNow(void)
-{
- return (uint32_t)nrf5AlarmGetCurrentTime();
-}
-
-void otPlatAlarmMicroStartAt(otInstance *aInstance, uint32_t aT0, uint32_t aDt)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- AlarmStartAt(aT0, aDt, kUsTimer);
-}
-
-void otPlatAlarmMicroStop(otInstance *aInstance)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- AlarmStop(kUsTimer);
-}
-
-/**
- * Radio driver timer abstraction API
- */
-
-void nrf_802154_lp_timer_init(void)
-{
- // Intentionally empty
-}
-
-void nrf_802154_lp_timer_deinit(void)
-{
- // Intentionally empty
-}
-
-void nrf_802154_lp_timer_critical_section_enter(void)
-{
- nrf_rtc_int_disable(RTC_INSTANCE, sChannelData[k802154Timer].mCompareInt);
- __DSB();
- __ISB();
-}
-
-void nrf_802154_lp_timer_critical_section_exit(void)
-{
- nrf_rtc_int_enable(RTC_INSTANCE, sChannelData[k802154Timer].mCompareInt);
-}
-
-uint32_t nrf_802154_lp_timer_time_get(void)
-{
- return (uint32_t)nrf5AlarmGetCurrentTime();
-}
-
-uint32_t nrf_802154_lp_timer_granularity_get(void)
-{
- return NRF_802154_US_PER_TICK;
-}
-
-void nrf_802154_lp_timer_start(uint32_t t0, uint32_t dt)
-{
- AlarmStartAt(t0, dt, k802154Timer);
-}
-
-bool nrf_802154_lp_timer_is_running(void)
-{
- return nrf_rtc_int_is_enabled(RTC_INSTANCE, sChannelData[k802154Timer].mCompareInt);
-}
-
-void nrf_802154_lp_timer_stop(void)
-{
- AlarmStop(k802154Timer);
-}
-
-void nrf_802154_lp_timer_sync_start_now(void)
-{
- uint32_t counter;
- uint32_t offset;
- uint64_t now;
-
- do
- {
- GetOffsetAndCounter(&offset, &counter);
- now = GetTime(offset, counter, k802154Sync);
- TimerSyncStartAt((uint32_t)now, MIN_RTC_COMPARE_EVENT_DT, &now);
- } while (GetRtcCounter() != counter);
-}
-
-void nrf_802154_lp_timer_sync_start_at(uint32_t t0, uint32_t dt)
-{
- uint64_t now = GetCurrentTime(k802154Sync);
-
- TimerSyncStartAt(t0, dt, &now);
-}
-
-void nrf_802154_lp_timer_sync_stop(void)
-{
- AlarmStop(k802154Sync);
-}
-
-uint32_t nrf_802154_lp_timer_sync_event_get(void)
-{
- return (uint32_t)nrf_rtc_event_address_get(RTC_INSTANCE, sChannelData[k802154Sync].mCompareEvent);
-}
-
-uint32_t nrf_802154_lp_timer_sync_time_get(void)
-{
- return (uint32_t)sTimerData[k802154Sync].mTargetTime;
-}
-
-/**
- * RTC IRQ handler
- */
-
-void RTC_IRQ_HANDLER(void)
-{
- // Handle overflow.
- if (nrf_rtc_event_pending(RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW))
- {
- // Disable OVERFLOW interrupt to prevent lock-up in interrupt context while mutex is locked from lower priority
- // context and OVERFLOW event flag is stil up. OVERFLOW interrupt will be re-enabled when mutex is released -
- // either from this handler, or from lower priority context, that locked the mutex.
- nrf_rtc_int_disable(RTC_INSTANCE, NRF_RTC_INT_OVERFLOW_MASK);
-
- // Handle OVERFLOW event by reading current value of overflow counter.
- (void)GetOverflowCounter();
- }
-
- // Handle compare match.
- for (uint32_t i = 0; i < kNumTimers; i++)
- {
- if (nrf_rtc_int_is_enabled(RTC_INSTANCE, sChannelData[i].mCompareInt) &&
- nrf_rtc_event_pending(RTC_INSTANCE, sChannelData[i].mCompareEvent))
- {
- HandleCompareMatch((AlarmIndex)i, false);
- }
- }
-}
-
-#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
-uint64_t otPlatTimeGet(void)
-{
- return nrf5AlarmGetCurrentTime();
-}
-
-uint16_t otPlatTimeGetXtalAccuracy(void)
-{
- return XTAL_ACCURACY;
-}
-#endif // OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
diff --git a/examples/platforms/nrf52811/diag.c b/examples/platforms/nrf52811/diag.c
deleted file mode 100644
index 9401dd4..0000000
--- a/examples/platforms/nrf52811/diag.c
+++ /dev/null
@@ -1,493 +0,0 @@
-/*
- * Copyright (c) 2019, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <openthread-core-config.h>
-#include <openthread/config.h>
-
-#include <inttypes.h>
-#include <stdbool.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-
-#include "platform-nrf5.h"
-
-#include <hal/nrf_gpio.h>
-
-#include <openthread/cli.h>
-#include <openthread/platform/alarm-milli.h>
-#include <openthread/platform/diag.h>
-#include <openthread/platform/radio.h>
-#include <openthread/platform/toolchain.h>
-
-#include <common/logging.hpp>
-#include <drivers/radio/nrf_802154.h>
-#include <utils/code_utils.h>
-
-typedef enum
-{
- kDiagTransmitModeIdle,
- kDiagTransmitModePackets,
- kDiagTransmitModeCarrier
-} DiagTrasmitMode;
-
-struct PlatformDiagCommand
-{
- const char *mName;
- void (*mCommand)(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen);
-};
-
-struct PlatformDiagMessage
-{
- const char mMessageDescriptor[11];
- uint8_t mChannel;
- int16_t mID;
- uint32_t mCnt;
-};
-
-/**
- * Diagnostics mode variables.
- *
- */
-static bool sDiagMode = false;
-static bool sListen = false;
-static DiagTrasmitMode sTransmitMode = kDiagTransmitModeIdle;
-static uint8_t sChannel = 20;
-static int8_t sTxPower = 0;
-static uint32_t sTxPeriod = 1;
-static int32_t sTxCount = 0;
-static int32_t sTxRequestedCount = 1;
-static int16_t sID = -1;
-static struct PlatformDiagMessage sDiagMessage = {.mMessageDescriptor = "DiagMessage",
- .mChannel = 0,
- .mID = 0,
- .mCnt = 0};
-
-static otError parseLong(char *argv, long *aValue)
-{
- char *endptr;
- *aValue = strtol(argv, &endptr, 0);
- return (*endptr == '\0') ? OT_ERROR_NONE : OT_ERROR_PARSE;
-}
-
-static void appendErrorResult(otError aError, char *aOutput, size_t aOutputMaxLen)
-{
- if (aError != OT_ERROR_NONE)
- {
- snprintf(aOutput, aOutputMaxLen, "failed\r\nstatus %#x\r\n", aError);
- }
-}
-
-static bool startCarrierTransmision(void)
-{
- nrf_802154_channel_set(sChannel);
- nrf_802154_tx_power_set(sTxPower);
-
- return nrf_802154_continuous_carrier();
-}
-
-static void processListen(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- otError error = OT_ERROR_NONE;
-
- otEXPECT_ACTION(otPlatDiagModeGet(), error = OT_ERROR_INVALID_STATE);
-
- if (argc == 0)
- {
- snprintf(aOutput, aOutputMaxLen, "listen: %s\r\n", sListen == true ? "yes" : "no");
- }
- else
- {
- long value;
-
- error = parseLong(argv[0], &value);
- otEXPECT(error == OT_ERROR_NONE);
- sListen = (bool)(value);
- snprintf(aOutput, aOutputMaxLen, "set listen to %s\r\nstatus 0x%02x\r\n", sListen == true ? "yes" : "no",
- error);
- }
-
-exit:
- appendErrorResult(error, aOutput, aOutputMaxLen);
-}
-
-static void processID(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- otError error = OT_ERROR_NONE;
-
- otEXPECT_ACTION(otPlatDiagModeGet(), error = OT_ERROR_INVALID_STATE);
-
- if (argc == 0)
- {
- snprintf(aOutput, aOutputMaxLen, "ID: %" PRId16 "\r\n", sID);
- }
- else
- {
- long value;
-
- error = parseLong(argv[0], &value);
- otEXPECT(error == OT_ERROR_NONE);
- otEXPECT_ACTION(value >= 0, error = OT_ERROR_INVALID_ARGS);
- sID = (int16_t)(value);
- snprintf(aOutput, aOutputMaxLen, "set ID to %" PRId16 "\r\nstatus 0x%02x\r\n", sID, error);
- }
-
-exit:
- appendErrorResult(error, aOutput, aOutputMaxLen);
-}
-
-static void processTransmit(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen)
-{
- otError error = OT_ERROR_NONE;
-
- otEXPECT_ACTION(otPlatDiagModeGet(), error = OT_ERROR_INVALID_STATE);
-
- if (argc == 0)
- {
- snprintf(aOutput, aOutputMaxLen,
- "transmit will send %" PRId32 " diagnostic messages with %" PRIu32 " ms interval\r\nstatus 0x%02x\r\n",
- sTxRequestedCount, sTxPeriod, error);
- }
- else if (strcmp(argv[0], "stop") == 0)
- {
- otEXPECT_ACTION(sTransmitMode != kDiagTransmitModeIdle, error = OT_ERROR_INVALID_STATE);
-
- otPlatAlarmMilliStop(aInstance);
- snprintf(aOutput, aOutputMaxLen, "diagnostic message transmission is stopped\r\nstatus 0x%02x\r\n", error);
- sTransmitMode = kDiagTransmitModeIdle;
- otPlatRadioReceive(aInstance, sChannel);
- }
- else if (strcmp(argv[0], "start") == 0)
- {
- otEXPECT_ACTION(sTransmitMode == kDiagTransmitModeIdle, error = OT_ERROR_INVALID_STATE);
-
- otPlatAlarmMilliStop(aInstance);
- sTransmitMode = kDiagTransmitModePackets;
- sTxCount = sTxRequestedCount;
- uint32_t now = otPlatAlarmMilliGetNow();
- otPlatAlarmMilliStartAt(aInstance, now, sTxPeriod);
- snprintf(aOutput, aOutputMaxLen,
- "sending %" PRId32 " diagnostic messages with %" PRIu32 " ms interval\r\nstatus 0x%02x\r\n",
- sTxRequestedCount, sTxPeriod, error);
- }
- else if (strcmp(argv[0], "carrier") == 0)
- {
- otEXPECT_ACTION(sTransmitMode == kDiagTransmitModeIdle, error = OT_ERROR_INVALID_STATE);
-
- otEXPECT_ACTION(startCarrierTransmision(), error = OT_ERROR_FAILED);
-
- sTransmitMode = kDiagTransmitModeCarrier;
-
- snprintf(aOutput, aOutputMaxLen, "sending carrier on channel %d with tx power %d\r\nstatus 0x%02x\r\n",
- sChannel, sTxPower, error);
- }
- else if (strcmp(argv[0], "interval") == 0)
- {
- long value;
-
- otEXPECT_ACTION(argc == 2, error = OT_ERROR_INVALID_ARGS);
-
- error = parseLong(argv[1], &value);
- otEXPECT(error == OT_ERROR_NONE);
- otEXPECT_ACTION(value > 0, error = OT_ERROR_INVALID_ARGS);
- sTxPeriod = (uint32_t)(value);
- snprintf(aOutput, aOutputMaxLen, "set diagnostic messages interval to %" PRIu32 " ms\r\nstatus 0x%02x\r\n",
- sTxPeriod, error);
- }
- else if (strcmp(argv[0], "count") == 0)
- {
- long value;
-
- otEXPECT_ACTION(argc == 2, error = OT_ERROR_INVALID_ARGS);
-
- error = parseLong(argv[1], &value);
- otEXPECT(error == OT_ERROR_NONE);
- otEXPECT_ACTION((value > 0) || (value == -1), error = OT_ERROR_INVALID_ARGS);
- sTxRequestedCount = (uint32_t)(value);
- snprintf(aOutput, aOutputMaxLen, "set diagnostic messages count to %" PRId32 "\r\nstatus 0x%02x\r\n",
- sTxRequestedCount, error);
- }
- else
- {
- error = OT_ERROR_INVALID_ARGS;
- }
-
-exit:
- appendErrorResult(error, aOutput, aOutputMaxLen);
-}
-
-static void processGpio(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- long pinnum;
- otError error = OT_ERROR_NONE;
-
- otEXPECT_ACTION(otPlatDiagModeGet(), error = OT_ERROR_INVALID_STATE);
-
- if (argc == 1)
- {
- uint32_t value;
-
- error = parseLong(argv[0], &pinnum);
- otEXPECT(error == OT_ERROR_NONE);
-
- value = nrf_gpio_pin_read(pinnum);
-
- snprintf(aOutput, aOutputMaxLen, "gpio %d = %d\r\n", (uint8_t)pinnum, (uint8_t)value);
- }
- else if (strcmp(argv[0], "set") == 0)
- {
- otEXPECT_ACTION(argc == 2, error = OT_ERROR_INVALID_ARGS);
- error = parseLong(argv[1], &pinnum);
- otEXPECT(error == OT_ERROR_NONE);
-
- nrf_gpio_pin_set(pinnum);
-
- snprintf(aOutput, aOutputMaxLen, "gpio %d = 1\r\n", (uint8_t)pinnum);
- }
- else if (strcmp(argv[0], "clr") == 0)
- {
- otEXPECT_ACTION(argc == 2, error = OT_ERROR_INVALID_ARGS);
- error = parseLong(argv[1], &pinnum);
- otEXPECT(error == OT_ERROR_NONE);
-
- nrf_gpio_pin_clear(pinnum);
-
- snprintf(aOutput, aOutputMaxLen, "gpio %d = 0\r\n", (uint8_t)pinnum);
- }
- else if (strcmp(argv[0], "out") == 0)
- {
- otEXPECT_ACTION(argc == 2, error = OT_ERROR_INVALID_ARGS);
- error = parseLong(argv[1], &pinnum);
- otEXPECT(error == OT_ERROR_NONE);
-
- nrf_gpio_cfg_output(pinnum);
-
- snprintf(aOutput, aOutputMaxLen, "gpio %d: out\r\n", (uint8_t)pinnum);
- }
- else if (strcmp(argv[0], "in") == 0)
- {
- otEXPECT_ACTION(argc == 2, error = OT_ERROR_INVALID_ARGS);
- error = parseLong(argv[1], &pinnum);
- otEXPECT(error == OT_ERROR_NONE);
-
- nrf_gpio_cfg_input(pinnum, NRF_GPIO_PIN_NOPULL);
-
- snprintf(aOutput, aOutputMaxLen, "gpio %d: in no pull\r\n", (uint8_t)pinnum);
- }
- else
- {
- error = OT_ERROR_INVALID_ARGS;
- }
-
-exit:
- appendErrorResult(error, aOutput, aOutputMaxLen);
-}
-
-static void processTemp(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen)
-{
- OT_UNUSED_VARIABLE(aInstance);
- OT_UNUSED_VARIABLE(argv);
-
- otError error = OT_ERROR_NONE;
- int32_t temperature;
-
- otEXPECT_ACTION(otPlatDiagModeGet(), error = OT_ERROR_INVALID_STATE);
- otEXPECT_ACTION(argc == 0, error = OT_ERROR_INVALID_ARGS);
-
- temperature = nrf5TempGet();
-
- // Measurement resolution is 0.25 degrees Celsius
- // Convert the temperature measurement to a decimal value, in degrees Celsius
- snprintf(aOutput, aOutputMaxLen, "%" PRId32 ".%02" PRId32 "\r\n", temperature / 4, 25 * (temperature % 4));
-
-exit:
- appendErrorResult(error, aOutput, aOutputMaxLen);
-}
-
-static void processCcaThreshold(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- otError error = OT_ERROR_NONE;
- nrf_802154_cca_cfg_t ccaConfig;
-
- otEXPECT_ACTION(otPlatDiagModeGet(), error = OT_ERROR_INVALID_STATE);
-
- if (argc == 0)
- {
- nrf_802154_cca_cfg_get(&ccaConfig);
-
- snprintf(aOutput, aOutputMaxLen, "cca threshold: %u\r\n", ccaConfig.ed_threshold);
- }
- else
- {
- long value;
- error = parseLong(argv[0], &value);
- otEXPECT(error == OT_ERROR_NONE);
- otEXPECT_ACTION(value >= 0 && value <= 0xFF, error = OT_ERROR_INVALID_ARGS);
-
- memset(&ccaConfig, 0, sizeof(ccaConfig));
- ccaConfig.mode = NRF_RADIO_CCA_MODE_ED;
- ccaConfig.ed_threshold = (uint8_t)value;
-
- nrf_802154_cca_cfg_set(&ccaConfig);
- snprintf(aOutput, aOutputMaxLen, "set cca threshold to %u\r\nstatus 0x%02x\r\n", ccaConfig.ed_threshold, error);
- }
-
-exit:
- appendErrorResult(error, aOutput, aOutputMaxLen);
-}
-
-const struct PlatformDiagCommand sCommands[] = {
- {"ccathreshold", &processCcaThreshold},
- {"gpio", &processGpio},
- {"id", &processID},
- {"listen", &processListen},
- {"temp", &processTemp},
- {"transmit", &processTransmit},
-};
-
-void otPlatDiagProcess(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen)
-{
- size_t i;
-
- for (i = 0; i < otARRAY_LENGTH(sCommands); i++)
- {
- if (strcmp(argv[0], sCommands[i].mName) == 0)
- {
- sCommands[i].mCommand(aInstance, argc - 1, argc > 1 ? &argv[1] : NULL, aOutput, aOutputMaxLen);
- break;
- }
- }
-
- if (i == otARRAY_LENGTH(sCommands))
- {
- snprintf(aOutput, aOutputMaxLen, "diag feature '%s' is not supported\r\n", argv[0]);
- }
-}
-
-void otPlatDiagModeSet(bool aMode)
-{
- sDiagMode = aMode;
-
- if (!sDiagMode)
- {
- otPlatRadioReceive(NULL, sChannel);
- otPlatRadioSleep(NULL);
- }
- else
- {
- // Reinit
- sTransmitMode = kDiagTransmitModeIdle;
- }
-}
-
-bool otPlatDiagModeGet()
-{
- return sDiagMode;
-}
-
-void otPlatDiagChannelSet(uint8_t aChannel)
-{
- sChannel = aChannel;
-}
-
-void otPlatDiagTxPowerSet(int8_t aTxPower)
-{
- sTxPower = aTxPower;
-}
-
-void otPlatDiagRadioReceived(otInstance *aInstance, otRadioFrame *aFrame, otError aError)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- if (sListen && (aError == OT_ERROR_NONE))
- {
- if (aFrame->mLength == sizeof(struct PlatformDiagMessage))
- {
- struct PlatformDiagMessage *message = (struct PlatformDiagMessage *)aFrame->mPsdu;
-
- if (strncmp(message->mMessageDescriptor, "DiagMessage", 11) == 0)
- {
- otPlatLog(OT_LOG_LEVEL_DEBG, OT_LOG_REGION_PLATFORM,
- "{\"Frame\":{"
- "\"LocalChannel\":%u ,"
- "\"RemoteChannel\":%u,"
- "\"CNT\":%" PRIu32 ","
- "\"LocalID\":%" PRId16 ","
- "\"RemoteID\":%" PRId16 ","
- "\"RSSI\":%d"
- "}}\r\n",
- aFrame->mChannel, message->mChannel, message->mCnt, sID, message->mID,
- aFrame->mInfo.mRxInfo.mRssi);
- }
- }
- }
-}
-
-void otPlatDiagAlarmCallback(otInstance *aInstance)
-{
- if (sTransmitMode == kDiagTransmitModePackets)
- {
- if ((sTxCount > 0) || (sTxCount == -1))
- {
- otRadioFrame *sTxPacket = otPlatRadioGetTransmitBuffer(aInstance);
-
- sTxPacket->mLength = sizeof(struct PlatformDiagMessage);
- sTxPacket->mChannel = sChannel;
-
- sDiagMessage.mChannel = sTxPacket->mChannel;
- sDiagMessage.mID = sID;
-
- memcpy(sTxPacket->mPsdu, &sDiagMessage, sizeof(struct PlatformDiagMessage));
- otPlatRadioTransmit(aInstance, sTxPacket);
-
- sDiagMessage.mCnt++;
-
- if (sTxCount != -1)
- {
- sTxCount--;
- }
-
- uint32_t now = otPlatAlarmMilliGetNow();
- otPlatAlarmMilliStartAt(aInstance, now, sTxPeriod);
- }
- else
- {
- sTransmitMode = kDiagTransmitModeIdle;
- otPlatAlarmMilliStop(aInstance);
- otPlatLog(OT_LOG_LEVEL_DEBG, OT_LOG_REGION_PLATFORM, "Transmit done");
- }
- }
-}
diff --git a/examples/platforms/nrf52811/entropy.c b/examples/platforms/nrf52811/entropy.c
deleted file mode 100644
index 0099d32..0000000
--- a/examples/platforms/nrf52811/entropy.c
+++ /dev/null
@@ -1,212 +0,0 @@
-/*
- * Copyright (c) 2019, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This file implements an entropy source based on TRNG.
- *
- */
-
-#include <openthread/platform/entropy.h>
-
-#include <openthread-core-config.h>
-#include <openthread/config.h>
-
-#include <assert.h>
-#include <stdint.h>
-#include <stdlib.h>
-#include <string.h>
-
-#include <utils/code_utils.h>
-
-#include "platform-nrf5.h"
-
-#include <hal/nrf_rng.h>
-
-static uint8_t sBuffer[RNG_BUFFER_SIZE];
-static volatile uint32_t sReadPosition;
-static volatile uint32_t sWritePosition;
-static volatile bool sEntropyGetEntered;
-
-static inline uint32_t bufferCount(void)
-{
- uint32_t writePos = sWritePosition;
- return writePos - sReadPosition;
-}
-
-static inline bool bufferIsEmpty(void)
-{
- return (bufferCount() == 0);
-}
-
-static inline bool bufferIsUint32Ready(void)
-{
- return (bufferCount() >= 4);
-}
-
-static inline bool bufferIsFull(void)
-{
- return (bufferCount() >= RNG_BUFFER_SIZE);
-}
-
-static inline void bufferPut(uint8_t val)
-{
- if (!bufferIsFull())
- {
- sBuffer[(sWritePosition++) % RNG_BUFFER_SIZE] = val;
- }
-}
-
-static inline uint8_t bufferGet()
-{
- uint8_t retVal = 0;
-
- if (!bufferIsEmpty())
- {
- retVal = sBuffer[sReadPosition++ % RNG_BUFFER_SIZE];
- }
-
- return retVal;
-}
-
-static inline uint32_t bufferGetUint32()
-{
- uint32_t retVal = 0;
-
- if (bufferIsUint32Ready())
- {
- for (uint32_t i = 0; i < 4; i++)
- {
- retVal <<= 8;
- retVal |= bufferGet();
- }
- }
-
- return retVal;
-}
-
-static void generatorStart(void)
-{
- nrf_rng_event_clear(NRF_RNG_EVENT_VALRDY);
- nrf_rng_int_enable(NRF_RNG_INT_VALRDY_MASK);
- nrf_rng_task_trigger(NRF_RNG_TASK_START);
-}
-
-static void generatorStop(void)
-{
- nrf_rng_int_disable(NRF_RNG_INT_VALRDY_MASK);
- nrf_rng_task_trigger(NRF_RNG_TASK_STOP);
-}
-
-void RNG_IRQHandler(void)
-{
- if (nrf_rng_event_get(NRF_RNG_EVENT_VALRDY) && nrf_rng_int_get(NRF_RNG_INT_VALRDY_MASK))
- {
- nrf_rng_event_clear(NRF_RNG_EVENT_VALRDY);
-
- bufferPut(nrf_rng_random_value_get());
-
- if (bufferIsFull())
- {
- generatorStop();
- }
- }
-}
-
-void nrf5RandomInit(void)
-{
- uint32_t seed = 0;
-
- memset(sBuffer, 0, sizeof(sBuffer));
- sReadPosition = 0;
- sWritePosition = 0;
-
- NVIC_SetPriority(RNG_IRQn, RNG_IRQ_PRIORITY);
- NVIC_ClearPendingIRQ(RNG_IRQn);
- NVIC_EnableIRQ(RNG_IRQn);
-
- nrf_rng_error_correction_enable();
- nrf_rng_shorts_disable(NRF_RNG_SHORT_VALRDY_STOP_MASK);
- generatorStart();
-
- // Wait for the first randomized 4 bytes, to randomize software generator seed.
- while (!bufferIsUint32Ready())
- ;
-
- seed = bufferGetUint32();
-
- srand(seed);
-}
-
-void nrf5RandomDeinit(void)
-{
- generatorStop();
-
- NVIC_DisableIRQ(RNG_IRQn);
- NVIC_ClearPendingIRQ(RNG_IRQn);
- NVIC_SetPriority(RNG_IRQn, 0);
-}
-
-otError otPlatEntropyGet(uint8_t *aOutput, uint16_t aOutputLength)
-{
- otError error = OT_ERROR_NONE;
- uint8_t copyLength;
- uint16_t index = 0;
-
- assert(!sEntropyGetEntered);
- sEntropyGetEntered = true;
-
- otEXPECT_ACTION(aOutput && aOutputLength, error = OT_ERROR_INVALID_ARGS);
-
- do
- {
- copyLength = (uint8_t)bufferCount();
-
- if (copyLength > aOutputLength - index)
- {
- copyLength = aOutputLength - index;
- }
-
- if (copyLength > 0)
- {
- for (uint32_t i = 0; i < copyLength; i++)
- {
- aOutput[i + index] = bufferGet();
- }
-
- generatorStart();
-
- index += copyLength;
- }
- } while (index < aOutputLength);
-
-exit:
- sEntropyGetEntered = false;
-
- return error;
-}
diff --git a/examples/platforms/nrf52811/fem.c b/examples/platforms/nrf52811/fem.c
deleted file mode 100644
index 02b0fc2..0000000
--- a/examples/platforms/nrf52811/fem.c
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * Copyright (c) 2019, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This file implements the OpenThread FEM helper functions.
- *
- */
-
-#include <openthread-core-config.h>
-#include <openthread/config.h>
-
-#include <stdint.h>
-#include <string.h>
-
-#include "platform-fem.h"
-
-#define ENABLE_FEM 1
-#include <nrf_802154.h>
-
-void PlatformFemSetConfigParams(const PlatformFemConfigParams *aConfig)
-{
- nrf_802154_fem_control_cfg_t cfg;
-
- memset(&cfg, 0, sizeof(cfg));
-
- cfg.pa_cfg.enable = aConfig->mPaCfg.mEnable;
- cfg.pa_cfg.active_high = aConfig->mPaCfg.mActiveHigh;
- cfg.pa_cfg.gpio_pin = aConfig->mPaCfg.mGpioPin;
- cfg.lna_cfg.enable = aConfig->mLnaCfg.mEnable;
- cfg.lna_cfg.active_high = aConfig->mLnaCfg.mActiveHigh;
- cfg.lna_cfg.gpio_pin = aConfig->mLnaCfg.mGpioPin;
- cfg.ppi_ch_id_clr = aConfig->mPpiChIdClr;
- cfg.ppi_ch_id_set = aConfig->mPpiChIdSet;
- cfg.pa_gpiote_ch_id = aConfig->mGpiotePaChId;
- cfg.lna_gpiote_ch_id = aConfig->mGpioteLnaChId;
-
- nrf_802154_fem_control_cfg_set(&cfg);
-}
diff --git a/examples/platforms/nrf52811/flash.c b/examples/platforms/nrf52811/flash.c
deleted file mode 100644
index 7c12ab8..0000000
--- a/examples/platforms/nrf52811/flash.c
+++ /dev/null
@@ -1,156 +0,0 @@
-/*
- * Copyright (c) 2019, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <openthread-core-config.h>
-#include <openthread/config.h>
-
-#include <assert.h>
-#include <stdint.h>
-#include <string.h>
-
-#include <utils/code_utils.h>
-#include <utils/flash.h>
-#include <openthread/platform/alarm-milli.h>
-
-#include "platform-nrf5.h"
-
-#define FLASH_PAGE_ADDR_MASK 0xFFFFF000
-#define FLASH_PAGE_SIZE 4096
-
-static uint32_t sFlashDataStart;
-static uint32_t sFlashDataEnd;
-
-static inline uint32_t mapAddress(uint32_t aAddress)
-{
- return aAddress + sFlashDataStart;
-}
-
-otError utilsFlashInit(void)
-{
-#if defined(__CC_ARM)
- // Temporary solution for Keil compiler.
- uint32_t const bootloaderAddr = NRF_UICR->NRFFW[0];
- uint32_t const pageSize = NRF_FICR->CODEPAGESIZE;
- uint32_t const codeSize = NRF_FICR->CODESIZE;
-
- if (bootloaderAddr != 0xFFFFFFFF)
- {
- sFlashDataEnd = bootloaderAddr;
- }
- else
- {
- sFlashDataEnd = pageSize * codeSize;
- }
-
- sFlashDataStart = sFlashDataEnd - (pageSize * SETTINGS_CONFIG_PAGE_NUM);
-
-#elif defined(__GNUC__) || defined(__ICCARM__)
- extern uint32_t __start_ot_flash_data;
- extern uint32_t __stop_ot_flash_data;
-
- sFlashDataStart = (uint32_t)&__start_ot_flash_data;
- sFlashDataEnd = (uint32_t)&__stop_ot_flash_data;
-
-#endif
-
- // Just ensure that the start and end addresses are page-aligned.
- assert((sFlashDataStart % FLASH_PAGE_SIZE) == 0);
- assert((sFlashDataEnd % FLASH_PAGE_SIZE) == 0);
-
- return OT_ERROR_NONE;
-}
-
-uint32_t utilsFlashGetSize(void)
-{
- return sFlashDataEnd - sFlashDataStart;
-}
-
-otError utilsFlashErasePage(uint32_t aAddress)
-{
- otError error = OT_ERROR_NONE;
- otEXPECT_ACTION(aAddress < utilsFlashGetSize(), error = OT_ERROR_INVALID_ARGS);
-
- error = nrf5FlashPageErase(mapAddress(aAddress & FLASH_PAGE_ADDR_MASK));
-
-exit:
- return error;
-}
-
-otError utilsFlashStatusWait(uint32_t aTimeout)
-{
- otError error = OT_ERROR_BUSY;
-
- if (aTimeout == 0)
- {
- if (!nrf5FlashIsBusy())
- {
- error = OT_ERROR_NONE;
- }
- }
- else
- {
- uint32_t startTime = otPlatAlarmMilliGetNow();
-
- do
- {
- if (!nrf5FlashIsBusy())
- {
- error = OT_ERROR_NONE;
- break;
- }
- } while (otPlatAlarmMilliGetNow() - startTime < aTimeout);
- }
-
- return error;
-}
-
-uint32_t utilsFlashWrite(uint32_t aAddress, uint8_t *aData, uint32_t aSize)
-{
- uint32_t result = 0;
- otEXPECT(aData);
- otEXPECT(aAddress < utilsFlashGetSize());
- otEXPECT(aSize);
-
- result = nrf5FlashWrite(mapAddress(aAddress), aData, aSize);
-
-exit:
- return result;
-}
-
-uint32_t utilsFlashRead(uint32_t aAddress, uint8_t *aData, uint32_t aSize)
-{
- uint32_t result = 0;
- otEXPECT(aData);
- otEXPECT(aAddress < utilsFlashGetSize());
-
- memcpy(aData, (uint8_t *)mapAddress(aAddress), aSize);
- result = aSize;
-
-exit:
- return result;
-}
diff --git a/examples/platforms/nrf52811/flash_nosd.c b/examples/platforms/nrf52811/flash_nosd.c
deleted file mode 100644
index 561eb08..0000000
--- a/examples/platforms/nrf52811/flash_nosd.c
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * Copyright (c) 2019, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <openthread/config.h>
-#include <openthread-core-config.h>
-
-#include <stdint.h>
-#include <string.h>
-#include <assert.h>
-
-#include <utils/code_utils.h>
-#include <utils/flash.h>
-
-#include "hal/nrf_nvmc.h"
-#include "platform-nrf5.h"
-
-otError nrf5FlashPageErase(uint32_t aAddress)
-{
- nrf_nvmc_page_erase(aAddress);
-
- return OT_ERROR_NONE;
-}
-
-bool nrf5FlashIsBusy(void)
-{
- return NRF_NVMC->READY != NVMC_READY_READY_Ready;
-}
-
-uint32_t nrf5FlashWrite(uint32_t aAddress, const uint8_t *aData, uint32_t aSize)
-{
- nrf_nvmc_write_bytes(aAddress, aData, aSize);
- return aSize;
-}
diff --git a/examples/platforms/nrf52811/logging.c b/examples/platforms/nrf52811/logging.c
deleted file mode 100644
index eff9832..0000000
--- a/examples/platforms/nrf52811/logging.c
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * Copyright (c) 2018, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This file implements the OpenThread platform abstraction for logging.
- *
- */
-
-#include <openthread-core-config.h>
-#include <openthread/config.h>
-#include <openthread/platform/alarm-milli.h>
-#include <openthread/platform/logging.h>
-
-#include <utils/logging_rtt.h>
-
-#if (OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED) || \
- (OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_NCP_SPINEL)
-void nrf5LogInit(void)
-{
- utilsLogRttInit();
-}
-
-void nrf5LogDeinit(void)
-{
- utilsLogRttDeinit();
-}
-
-OT_TOOL_WEAK void otPlatLog(otLogLevel aLogLevel, otLogRegion aLogRegion, const char *aFormat, ...)
-{
- va_list ap;
-
- va_start(ap, aFormat);
-
- utilsLogRttOutput(aLogLevel, aLogRegion, aFormat, ap);
-
- va_end(ap);
-}
-#endif
diff --git a/examples/platforms/nrf52811/misc.c b/examples/platforms/nrf52811/misc.c
deleted file mode 100644
index 5d1641f..0000000
--- a/examples/platforms/nrf52811/misc.c
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * Copyright (c) 2019, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <openthread-core-config.h>
-#include <openthread/config.h>
-#include <openthread/platform/misc.h>
-
-#include <nrf.h>
-
-#include "platform-nrf5.h"
-
-static uint32_t sResetReason;
-
-bool gPlatformPseudoResetWasRequested;
-
-void nrf5MiscInit(void)
-{
- sResetReason = NRF_POWER->RESETREAS;
- NRF_POWER->RESETREAS = 0xFFFFFFFF;
-}
-
-void nrf5MiscDeinit(void)
-{
- // Intentionally empty.
-}
-
-void otPlatReset(otInstance *aInstance)
-{
- (void)aInstance;
-#if OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
- gPlatformPseudoResetWasRequested = true;
- sResetReason = POWER_RESETREAS_SREQ_Msk;
-#else // if OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
- NVIC_SystemReset();
-#endif // else OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
-}
-
-otPlatResetReason otPlatGetResetReason(otInstance *aInstance)
-{
- (void)aInstance;
- otPlatResetReason reason;
-
- if (sResetReason & POWER_RESETREAS_RESETPIN_Msk)
- {
- reason = OT_PLAT_RESET_REASON_EXTERNAL;
- }
- else if (sResetReason & POWER_RESETREAS_DOG_Msk)
- {
- reason = OT_PLAT_RESET_REASON_WATCHDOG;
- }
- else if (sResetReason & POWER_RESETREAS_SREQ_Msk)
- {
- reason = OT_PLAT_RESET_REASON_SOFTWARE;
- }
- else if (sResetReason & POWER_RESETREAS_LOCKUP_Msk)
- {
- reason = OT_PLAT_RESET_REASON_FAULT;
- }
- else if ((sResetReason & POWER_RESETREAS_OFF_Msk) || (sResetReason & POWER_RESETREAS_DIF_Msk))
- {
- reason = OT_PLAT_RESET_REASON_OTHER;
- }
- else
- {
- reason = OT_PLAT_RESET_REASON_POWER_ON;
- }
-
- return reason;
-}
-
-void otPlatWakeHost(void)
-{
- // TODO: implement an operation to wake the host from sleep state.
-}
diff --git a/examples/platforms/nrf52811/openthread-core-nrf52811-config.h b/examples/platforms/nrf52811/openthread-core-nrf52811-config.h
deleted file mode 100644
index 32c62fb..0000000
--- a/examples/platforms/nrf52811/openthread-core-nrf52811-config.h
+++ /dev/null
@@ -1,250 +0,0 @@
-/*
- * Copyright (c) 2019, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This file includes nrf52811 compile-time configuration constants
- * for OpenThread.
- */
-
-#ifndef OPENTHREAD_CORE_NRF52811_CONFIG_H_
-#define OPENTHREAD_CORE_NRF52811_CONFIG_H_
-
-/*
- * The GNU Autoconf system defines a PACKAGE macro which is the name
- * of the software package. This name collides with PACKAGE field in
- * the nRF52 Factory Information Configuration Registers (FICR)
- * structure.
- */
-#undef PACKAGE
-
-/**
- * @def OPENTHREAD_CONFIG_LOG_OUTPUT
- *
- * The nrf52811 platform provides an otPlatLog() function.
- */
-#ifndef OPENTHREAD_CONFIG_LOG_OUTPUT
-#define OPENTHREAD_CONFIG_LOG_OUTPUT OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_PLATFORM_INFO
- *
- * The platform-specific string to insert into the OpenThread version string.
- *
- */
-#define OPENTHREAD_CONFIG_PLATFORM_INFO "NRF52811"
-
-/**
- * @def OPENTHREAD_CONFIG_STACK_VENDOR_OUI
- *
- * The Organizationally Unique Identifier for the vendor.
- *
- */
-#ifndef OPENTHREAD_CONFIG_STACK_VENDOR_OUI
-#define OPENTHREAD_CONFIG_STACK_VENDOR_OUI 0xf4ce36
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_NUM_MESSAGE_BUFFERS
- *
- * The number of message buffers in the buffer pool.
- *
- */
-#ifndef OPENTHREAD_CONFIG_NUM_MESSAGE_BUFFERS
-#define OPENTHREAD_CONFIG_NUM_MESSAGE_BUFFERS 60
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_MAX_STATECHANGE_HANDLERS
- *
- * The maximum number of state-changed callback handlers (set using `otSetStateChangedCallback()`).
- *
- */
-#ifndef OPENTHREAD_CONFIG_MAX_STATECHANGE_HANDLERS
-#define OPENTHREAD_CONFIG_MAX_STATECHANGE_HANDLERS 3
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_TMF_ADDRESS_CACHE_ENTRIES
- *
- * The number of EID-to-RLOC cache entries.
- *
- */
-#ifndef OPENTHREAD_CONFIG_TMF_ADDRESS_CACHE_ENTRIES
-#define OPENTHREAD_CONFIG_TMF_ADDRESS_CACHE_ENTRIES 20
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_LOG_PREPREND_LEVEL
- *
- * Define to prepend the log level to all log messages
- *
- */
-#ifndef OPENTHREAD_CONFIG_LOG_PREPEND_LEVEL
-#define OPENTHREAD_CONFIG_LOG_PREPEND_LEVEL 0
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_SOFTWARE_ACK_TIMEOUT_ENABLE
- *
- * Define to 1 if you want to enable software ACK timeout logic.
- *
- */
-#ifndef OPENTHREAD_CONFIG_SOFTWARE_ACK_TIMEOUT_ENABLE
-#define OPENTHREAD_CONFIG_SOFTWARE_ACK_TIMEOUT_ENABLE 0
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_SOFTWARE_RETRANSMIT_ENABLE
- *
- * Define to 1 if you want to enable software retransmission logic.
- *
- */
-#ifndef OPENTHREAD_CONFIG_SOFTWARE_RETRANSMIT_ENABLE
-#define OPENTHREAD_CONFIG_SOFTWARE_RETRANSMIT_ENABLE 1
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_SOFTWARE_CSMA_BACKOFF_ENABLE
- *
- * Define to 1 if you want to enable software CSMA-CA backoff logic.
- *
- */
-#ifndef OPENTHREAD_CONFIG_SOFTWARE_CSMA_BACKOFF_ENABLE
-#define OPENTHREAD_CONFIG_SOFTWARE_CSMA_BACKOFF_ENABLE 0
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_PLATFORM_USEC_TIMER_ENABLE
- *
- * Define to 1 if you want to support microsecond timer in platform.
- *
- */
-#ifndef OPENTHREAD_CONFIG_PLATFORM_USEC_TIMER_ENABLE
-#define OPENTHREAD_CONFIG_PLATFORM_USEC_TIMER_ENABLE 1
-#endif
-
-/**
- * @def SETTINGS_CONFIG_BASE_ADDRESS
- *
- * The base address of settings.
- *
- */
-#ifndef SETTINGS_CONFIG_BASE_ADDRESS
-#define SETTINGS_CONFIG_BASE_ADDRESS 0
-#endif
-
-/**
- * @def SETTINGS_CONFIG_PAGE_SIZE
- *
- * The page size of settings.
- *
- */
-#ifndef SETTINGS_CONFIG_PAGE_SIZE
-#define SETTINGS_CONFIG_PAGE_SIZE 4096
-#endif
-
-/**
- * @def SETTINGS_CONFIG_PAGE_NUM
- *
- * The page number of settings.
- *
- */
-#ifndef SETTINGS_CONFIG_PAGE_NUM
-#define SETTINGS_CONFIG_PAGE_NUM 2
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE
- *
- * The size of heap buffer when DTLS is enabled.
- *
- */
-#ifndef OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE
-#define OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE (4096 * sizeof(void *))
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE_NO_DTLS
- *
- * The size of heap buffer when DTLS is disabled.
- *
- */
-#ifndef OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE_NO_DTLS
-#define OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE_NO_DTLS 2048
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
- *
- * Define as 1 to enable the time synchronization service feature.
- *
- */
-#ifndef OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
-#define OPENTHREAD_CONFIG_TIME_SYNC_ENABLE 0
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
- *
- * Define as 1 to support IEEE 802.15.4-2015 Header IE (Information Element) generation and parsing, it must be set
- * to support following features:
- * 1. Time synchronization service feature (i.e., OPENTHREAD_CONFIG_TIME_SYNC_ENABLE is set).
- *
- * @note If it's enabled, plaforms must support interrupt context and concurrent access AES.
- *
- */
-#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
-#define OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT 1
-#endif
-
-/**
- * @def NRF_MBEDTLS_AES_ALT_INTERRUPT_CONTEXT
- *
- * Define as 1 to enable AES usage in interrupt context and AES-256, by introducing a software AES under platform layer.
- *
- * @note This feature must be enabled to support AES-256 used by Commissioner and Joiner, and AES usage in interrupt
- * context used by Header IE related features.
- *
- */
-#if OPENTHREAD_CONFIG_COMMISSIONER_ENABLE || OPENTHREAD_CONFIG_JOINER_ENABLE || OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
-#define NRF_MBEDTLS_AES_ALT_INTERRUPT_CONTEXT 1
-#else
-#define NRF_MBEDTLS_AES_ALT_INTERRUPT_CONTEXT 0
-#endif
-
-/*
- * Suppress the ARMCC warning on unreachable statement,
- * e.g. break after assert(false) or ExitNow() macro.
- */
-#if defined(__CC_ARM)
-_Pragma("diag_suppress=111") _Pragma("diag_suppress=128")
-#endif
-
-#endif // OPENTHREAD_CORE_NRF52811_CONFIG_H_
diff --git a/examples/platforms/nrf52811/platform-config.h b/examples/platforms/nrf52811/platform-config.h
deleted file mode 100644
index b9816a3..0000000
--- a/examples/platforms/nrf52811/platform-config.h
+++ /dev/null
@@ -1,450 +0,0 @@
-/*
- * Copyright (c) 2019, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This file includes the platform-specific configuration.
- *
- */
-
-#ifndef PLATFORM_CONFIG_H_
-#define PLATFORM_CONFIG_H_
-
-#include "nrf.h"
-#include "nrf_peripherals.h"
-#include "drivers/clock/nrf_drv_clock.h"
-#include "hal/nrf_radio.h"
-#include "hal/nrf_uart.h"
-
-#include "openthread-core-config.h"
-#include <openthread/config.h>
-
-/*******************************************************************************
- * @section UART Driver Configuration.
- ******************************************************************************/
-
-/**
- * @def UART_INSTANCE
- *
- * UART Instance.
- *
- */
-#ifndef UART_INSTANCE
-#define UART_INSTANCE NRF_UART0
-#endif
-
-/**
- * @def UART_PARITY
- *
- * UART Parity configuration.
- *
- * @brief Possible values:
- * \ref NRF_UART_PARITY_EXCLUDED - Parity bit is not present.
- * \ref NRF_UART_PARITY_INCLUDED - Parity bit is present.
- *
- */
-#ifndef UART_PARITY
-#define UART_PARITY NRF_UART_PARITY_EXCLUDED
-#endif
-
-/**
- * @def UART_HWFC_ENABLED
- *
- * Enable UART Hardware Flow Control.
- *
- */
-#ifndef UART_HWFC_ENABLED
-#define UART_HWFC_ENABLED 1
-#endif
-
-/**
- * @def UART_BAUDRATE
- *
- * UART Baudrate.
- *
- * @brief Possible values:
- * \ref NRF_UART_BAUDRATE_1200 - 1200 baud.
- * \ref NRF_UART_BAUDRATE_2400 - 2400 baud.
- * \ref NRF_UART_BAUDRATE_4800 - 4800 baud.
- * \ref NRF_UART_BAUDRATE_9600 - 9600 baud.
- * \ref NRF_UART_BAUDRATE_14400 - 14400 baud.
- * \ref NRF_UART_BAUDRATE_19200 - 19200 baud.
- * \ref NRF_UART_BAUDRATE_28800 - 28800 baud.
- * \ref NRF_UART_BAUDRATE_38400 - 38400 baud.
- * \ref NRF_UART_BAUDRATE_57600 - 57600 baud.
- * \ref NRF_UART_BAUDRATE_76800 - 76800 baud.
- * \ref NRF_UART_BAUDRATE_115200 - 115200 baud.
- * \ref NRF_UART_BAUDRATE_230400 - 230400 baud.
- * \ref NRF_UART_BAUDRATE_250000 - 250000 baud.
- * \ref NRF_UART_BAUDRATE_460800 - 460800 baud.
- * \ref NRF_UART_BAUDRATE_921600 - 921600 baud.
- * \ref NRF_UART_BAUDRATE_1000000 - 1000000 baud.
- *
- */
-#ifndef UART_BAUDRATE
-#define UART_BAUDRATE NRF_UART_BAUDRATE_115200
-#endif
-
-/**
- * @def UART_IRQN
- *
- * UART Interrupt number.
- *
- */
-#ifndef UART_IRQN
-#define UART_IRQN UARTE0_UART0_IRQn
-#endif
-
-/**
- * @def UART_IRQ_PRIORITY
- *
- * UART Interrupt priority.
- *
- */
-#ifndef UART_IRQ_PRIORITY
-#define UART_IRQ_PRIORITY 6
-#endif
-
-/**
- * @def UART_RX_BUFFER_SIZE
- *
- * UART Receive buffer size.
- *
- */
-#ifndef UART_RX_BUFFER_SIZE
-#define UART_RX_BUFFER_SIZE 256
-#endif
-
-/**
- * @def UART_PIN_TX
- *
- * UART TX Pin.
- *
- */
-#ifndef UART_PIN_TX
-#define UART_PIN_TX 6
-#endif
-
-/**
- * @def UART_PIN_RX
- *
- * UART RX Pin.
- *
- */
-#ifndef UART_PIN_RX
-#define UART_PIN_RX 8
-#endif
-
-/**
- * @def UART_PIN_CTS
- *
- * UART CTS Pin.
- *
- */
-#ifndef UART_PIN_CTS
-#define UART_PIN_CTS 7
-#endif
-
-/**
- * @def UART_PIN_RTS
- *
- * UART RTS Pin.
- *
- */
-#ifndef UART_PIN_RTS
-#define UART_PIN_RTS 5
-#endif
-
-/*******************************************************************************
- * @section Alarm Driver Configuration.
- ******************************************************************************/
-
-/**
- * @def RTC_INSTANCE
- *
- * RTC Instance.
- *
- */
-#ifndef RTC_INSTANCE
-#define RTC_INSTANCE NRF_RTC0
-#endif
-
-/**
- * @def RTC_IRQ_HANDLER
- *
- * RTC interrupt handler name
- *
- */
-#ifndef RTC_IRQ_HANDLER
-#define RTC_IRQ_HANDLER RTC0_IRQHandler
-#endif
-
-/**
- * @def RTC_IRQN
- *
- * RTC Interrupt number.
- *
- */
-#ifndef RTC_IRQN
-#define RTC_IRQN RTC0_IRQn
-#endif
-
-/**
- * @def RTC_IRQ_PRIORITY
- *
- * RTC Interrupt priority.
- *
- */
-#ifndef RTC_IRQ_PRIORITY
-#define RTC_IRQ_PRIORITY 6
-#endif
-
-/*******************************************************************************
- * @section Random Number Generator Driver Configuration.
- ******************************************************************************/
-
-/**
- * @def RNG_BUFFER_SIZE
- *
- * True Random Number Generator buffer size.
- *
- */
-#ifndef RNG_BUFFER_SIZE
-#define RNG_BUFFER_SIZE 128
-#endif
-
-/**
- * @def RNG_IRQ_PRIORITY
- *
- * RNG Interrupt priority.
- *
- */
-#ifndef RNG_IRQ_PRIORITY
-#define RNG_IRQ_PRIORITY 6
-#endif
-
-/*******************************************************************************
- * @section SPI Slave configuration.
- ******************************************************************************/
-
-/**
- * @def SPIS Instance.
- */
-#ifndef SPIS_INSTANCE
-#define SPIS_INSTANCE 0
-#endif
-
-/**
- * @def SPIS mode.
- *
- * @brief Possible values:
- * \ref NRF_SPIS_MODE_0 - SCK active high, sample on leading edge of clock.
- * \ref NRF_SPIS_MODE_1 - SCK active high, sample on trailing edge of clock.
- * \ref NRF_SPIS_MODE_2 - SCK active low, sample on leading edge of clock.
- * \ref NRF_SPIS_MODE_3 - SCK active low, sample on trailing edge of clock.
- */
-#ifndef SPIS_MODE
-#define SPIS_MODE NRF_SPIS_MODE_0
-#endif
-
-/**
- * @def SPIS bit orders.
- *
- * @brief Possible values:
- * \ref NRF_SPIS_BIT_ORDER_MSB_FIRST - Most significant bit shifted out first.
- * \ref NRF_SPIS_BIT_ORDER_LSB_FIRST - Least significant bit shifted out first.
- */
-#ifndef SPIS_BIT_ORDER
-#define SPIS_BIT_ORDER NRF_SPIS_BIT_ORDER_MSB_FIRST
-#endif
-
-/**
- * @def SPIS Interrupt priority.
- */
-#ifndef SPIS_IRQ_PRIORITY
-#define SPIS_IRQ_PRIORITY 6
-#endif
-
-/**
- * @def SPIS MOSI Pin.
- */
-#ifndef SPIS_PIN_MOSI
-#define SPIS_PIN_MOSI 4
-#endif
-
-/**
- * @def SPIS MISO Pin.
- */
-#ifndef SPIS_PIN_MISO
-#define SPIS_PIN_MISO 28
-#endif
-
-/**
- * @def SPIS SCK Pin.
- */
-#ifndef SPIS_PIN_SCK
-#define SPIS_PIN_SCK 3
-#endif
-
-/**
- * @def SPIS CSN Pin.
- */
-#ifndef SPIS_PIN_CSN
-#define SPIS_PIN_CSN 29
-#endif
-
-/**
- * @def SPIS Host IRQ Pin.
- */
-#ifndef SPIS_PIN_HOST_IRQ
-#define SPIS_PIN_HOST_IRQ 30
-#endif
-
-/*******************************************************************************
- * @section Platform FEM Configuration
- ******************************************************************************/
-
-/**
- * @def PLATFORM_FEM_ENABLE_DEFAULT_CONFIG
- *
- * Enable default front end module configuration.
- *
- */
-#ifndef PLATFORM_FEM_ENABLE_DEFAULT_CONFIG
-#define PLATFORM_FEM_ENABLE_DEFAULT_CONFIG 0
-#endif
-
-/*******************************************************************************
- * @section Radio driver configuration.
- ******************************************************************************/
-
-/**
- * @def NRF_802154_PENDING_SHORT_ADDRESSES
- *
- * Number of slots containing short addresses of nodes for which pending data is stored.
- *
- */
-#ifndef NRF_802154_PENDING_SHORT_ADDRESSES
-#define NRF_802154_PENDING_SHORT_ADDRESSES OPENTHREAD_CONFIG_MLE_MAX_CHILDREN
-#endif
-
-/**
- * @def NRF_802154_PENDING_EXTENDED_ADDRESSES
- *
- * Number of slots containing extended addresses of nodes for which pending data is stored.
- *
- */
-#ifndef NRF_802154_PENDING_EXTENDED_ADDRESSES
-#define NRF_802154_PENDING_EXTENDED_ADDRESSES OPENTHREAD_CONFIG_MLE_MAX_CHILDREN
-#endif
-
-/**
- * @def NRF_802154_CSMA_CA_ENABLED
- *
- * If CSMA-CA procedure should be enabled by the driver. Disabling CSMA-CA procedure improves
- * driver performance.
- *
- */
-#ifndef NRF_802154_CSMA_CA_ENABLED
-#define NRF_802154_CSMA_CA_ENABLED 1
-#endif
-
-/**
- * @def NRF_802154_ACK_TIMEOUT_ENABLED
- *
- * If ACK timeout feature should be enabled in the driver.
- *
- */
-#ifndef NRF_802154_ACK_TIMEOUT_ENABLED
-#define NRF_802154_ACK_TIMEOUT_ENABLED 1
-#endif
-
-/**
- * @def NRF_802154_SWI_EGU_INSTANCE
- *
- * SWI EGU instance used by the driver to synchronize PPIs and for requests and notifications if
- * SWI is in use.
- *
- * @note This option is used by the core module regardless of the driver configuration.
- *
- */
-#ifndef NRF_802154_SWI_EGU_INSTANCE
-#define NRF_802154_SWI_EGU_INSTANCE NRF_EGU0
-#endif
-
-/**
- * @def NRF_802154_SWI_IRQ_HANDLER
- *
- * SWI EGU IRQ handler used by the driver for requests and notifications if SWI is in use.
- *
- * @note This option is used when the driver uses SWI to process requests and notifications.
- *
- */
-#ifndef NRF_802154_SWI_IRQ_HANDLER
-#define NRF_802154_SWI_IRQ_HANDLER SWI0_EGU0_IRQHandler
-#endif
-
-/**
- * @def NRF_802154_SWI_IRQN
- *
- * SWI EGU IRQ number used by the driver for requests and notifications if SWI is in use.
- *
- * @note This option is used when the driver uses SWI to process requests and notifications.
- *
- */
-#ifndef NRF_802154_SWI_IRQN
-#define NRF_802154_SWI_IRQN SWI0_EGU0_IRQn
-#endif
-
-/*******************************************************************************
- * @section Temperature sensor driver configuration.
- ******************************************************************************/
-
-/**
- * @def TEMP_MEASUREMENT_INTERVAL
- *
- * Interval of consecutive temperature measurements [s].
- *
- */
-#ifndef TEMP_MEASUREMENT_INTERVAL
-#define TEMP_MEASUREMENT_INTERVAL 30
-#endif
-
-/**
- * @def NRF_802154_TX_STARTED_NOTIFY_ENABLED
- *
- * If notification of started transmission should be enabled in the driver.
- *
- * @note This feature must be enabled to support Header IE related features.
- *
- */
-#ifndef NRF_802154_TX_STARTED_NOTIFY_ENABLED
-#define NRF_802154_TX_STARTED_NOTIFY_ENABLED 1
-#endif
-
-#endif // PLATFORM_CONFIG_H_
diff --git a/examples/platforms/nrf52811/platform-fem.h b/examples/platforms/nrf52811/platform-fem.h
deleted file mode 100644
index c444241..0000000
--- a/examples/platforms/nrf52811/platform-fem.h
+++ /dev/null
@@ -1,111 +0,0 @@
-/*
- * Copyright (c) 2017, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This file includes front end module platform-specific functions.
- *
- */
-
-#ifndef PLATFORM_FEM_H_
-#define PLATFORM_FEM_H_
-
-#include <stdint.h>
-
-// clang-format off
-
-#define PLATFORM_FEM_DEFAULT_PA_PIN 26 /**< Default Power Amplifier pin. */
-#define PLATFORM_FEM_DEFAULT_LNA_PIN 27 /**< Default Low Noise Amplifier pin. */
-#define PLATFORM_FEM_DEFAULT_SET_PPI_CHANNEL 15 /**< Default PPI channel for pin setting. */
-#define PLATFORM_FEM_DEFAULT_CLR_PPI_CHANNEL 16 /**< Default PPI channel for pin clearing. */
-#define PLATFORM_FEM_DEFAULT_TIMER_MATCH_PPI_GROUP 4 /**< Default PPI channel group used to disable timer match PPI. */
-#define PLATFORM_FEM_DEFAULT_RADIO_DISABLED_PPI_GROUP 5 /**< Default PPI channel group used to disable radio disabled PPI. */
-#define PLATFORM_FEM_DEFAULT_LNA_GPIOTE_CHANNEL 6 /**< Default LNA GPIOTE channel for FEM control. */
-#define PLATFORM_FEM_DEFAULT_PA_GPIOTE_CHANNEL 7 /**< Default PA GPIOTE channel for FEM control. */
-
-// clang-format on
-
-#define PLATFORM_FEM_DEFAULT_CONFIG \
- ((PlatformFemConfigParams){ \
- .mPaCfg = \
- { \
- .mEnable = 1, \
- .mActiveHigh = 1, \
- .mGpioPin = PLATFORM_FEM_DEFAULT_PA_PIN, \
- }, \
- .mLnaCfg = \
- { \
- .mEnable = 1, \
- .mActiveHigh = 1, \
- .mGpioPin = PLATFORM_FEM_DEFAULT_LNA_PIN, \
- }, \
- .mPpiChIdClr = PLATFORM_FEM_DEFAULT_CLR_PPI_CHANNEL, \
- .mPpiChIdSet = PLATFORM_FEM_DEFAULT_SET_PPI_CHANNEL, \
- .mGpiotePaChId = PLATFORM_FEM_DEFAULT_PA_GPIOTE_CHANNEL, \
- .mGpioteLnaChId = PLATFORM_FEM_DEFAULT_LNA_GPIOTE_CHANNEL, \
- })
-
-/**
- * @brief Configuration parameters for the PA and LNA.
- */
-typedef struct
-{
- uint8_t mEnable : 1; /**< Enable toggling for this amplifier */
- uint8_t mActiveHigh : 1; /**< Set the pin to be active high */
- uint8_t mGpioPin : 6; /**< The GPIO pin to toggle for this amplifier */
-} PlatformFemConfigPaLna;
-
-/**
- * @brief PA & LNA GPIO toggle configuration
- *
- * This option configures the nRF 802.15.4 radio driver to toggle pins when the radio
- * is active for use with a power amplifier and/or a low noise amplifier.
- *
- * Toggling the pins is achieved by using two PPI channels and a GPIOTE channel. The hardware channel IDs are provided
- * by the application and should be regarded as reserved as long as any PA/LNA toggling is enabled.
- *
- * @note Changing this configuration while the radio is in use may have undefined
- * consequences and must be avoided by the application.
- */
-typedef struct
-{
- PlatformFemConfigPaLna mPaCfg; /**< Power Amplifier configuration */
- PlatformFemConfigPaLna mLnaCfg; /**< Low Noise Amplifier configuration */
- uint8_t mPpiChIdSet; /**< PPI channel used for radio pin setting */
- uint8_t mPpiChIdClr; /**< PPI channel used for radio pin clearing */
- uint8_t mGpiotePaChId; /**< GPIOTE channel used for radio PA pin toggling */
- uint8_t mGpioteLnaChId; /**< GPIOTE channel used for radio LNA pin toggling */
-} PlatformFemConfigParams;
-
-/**
- * Function used to set parameters of FEM.
- *
- */
-void PlatformFemSetConfigParams(const PlatformFemConfigParams *aConfig);
-
-#endif // PLATFORM_FEM_H_
diff --git a/examples/platforms/nrf52811/platform-nrf5.h b/examples/platforms/nrf52811/platform-nrf5.h
deleted file mode 100644
index 3fc4a60..0000000
--- a/examples/platforms/nrf52811/platform-nrf5.h
+++ /dev/null
@@ -1,201 +0,0 @@
-/*
- * Copyright (c) 2019, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This file includes the platform-specific initializers.
- *
- */
-
-#ifndef PLATFORM_NRF5_H_
-#define PLATFORM_NRF5_H_
-
-#include <stdint.h>
-
-#include <openthread/instance.h>
-
-#include "platform-config.h"
-
-/**
- * Initialization of UART driver.
- *
- */
-void nrf5UartInit(void);
-
-/**
- * Deinitialization of UART driver.
- *
- */
-void nrf5UartDeinit(void);
-
-/**
- * This function performs UART driver processing.
- *
- */
-void nrf5UartProcess(void);
-
-/**
- * Initialization of Alarm driver.
- *
- */
-void nrf5AlarmInit(void);
-
-/**
- * Deinitialization of Alarm driver.
- *
- */
-void nrf5AlarmDeinit(void);
-
-/**
- * Function for processing Alarm.
- *
- */
-void nrf5AlarmProcess(otInstance *aInstance);
-
-/**
- * Function for geting current time in mircosecond.
- *
- */
-uint64_t nrf5AlarmGetCurrentTime(void);
-
-/**
- * Initialization of Random Number Generator.
- *
- */
-void nrf5RandomInit(void);
-
-/**
- * Deinitialization of Random Number Generator.
- *
- */
-void nrf5RandomDeinit(void);
-
-/**
- * Initialization of Logger driver.
- *
- */
-void nrf5LogInit(void);
-
-/**
- * Deinitialization of Logger driver.
- *
- */
-void nrf5LogDeinit(void);
-
-/**
- * Initialization of SPI Slave driver.
- *
- */
-void nrf5SpiSlaveInit(void);
-
-/**
- * Deinitialization of SPI Slave driver.
- *
- */
-void nrf5SpiSlaveDeinit(void);
-
-/**
- * Function for processing SPI Slave driver.
- */
-void nrf5SpiSlaveProcess(void);
-
-/**
- * Initialization of Misc module.
- *
- */
-void nrf5MiscInit(void);
-
-/**
- * Deinitialization of Misc module.
- *
- */
-void nrf5MiscDeinit(void);
-
-/**
- * Initialization of Radio driver.
- *
- */
-void nrf5RadioInit(void);
-
-/**
- * Deinitialization of Radio driver.
- *
- */
-void nrf5RadioDeinit(void);
-
-/**
- * Function for processing Radio.
- *
- */
-void nrf5RadioProcess(otInstance *aInstance);
-
-/**
- * Function for erasing page in flash.
- *
- */
-otError nrf5FlashPageErase(uint32_t aAddress);
-
-/**
- * Function for checking state of flash driver.
- *
- */
-bool nrf5FlashIsBusy(void);
-
-/**
- * Function for writing data into flash.
- *
- */
-uint32_t nrf5FlashWrite(uint32_t aAddress, const uint8_t *aData, uint32_t aSize);
-
-/**
- * Initialization of temperature controller.
- *
- */
-void nrf5TempInit(void);
-
-/**
- * Deinitialization of temperature controller.
- *
- */
-void nrf5TempDeinit(void);
-
-/**
- * Function for processing temperature controller.
- *
- */
-void nrf5TempProcess(void);
-
-/**
- * Function for measuring internal temperature.
- *
- * @return Temperature value measured.
- *
- */
-int32_t nrf5TempGet(void);
-
-#endif // PLATFORM_NRF5_H_
diff --git a/examples/platforms/nrf52811/radio.c b/examples/platforms/nrf52811/radio.c
deleted file mode 100644
index 6cf53b3..0000000
--- a/examples/platforms/nrf52811/radio.c
+++ /dev/null
@@ -1,887 +0,0 @@
-/*
- * Copyright (c) 2019, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This file implements the OpenThread platform abstraction for radio communication.
- *
- */
-
-#include <openthread-core-config.h>
-#include <openthread/config.h>
-
-#include <assert.h>
-#include <stdbool.h>
-#include <stddef.h>
-#include <stdint.h>
-#include <string.h>
-
-#include "utils/code_utils.h"
-
-#include <platform-config.h>
-#include <openthread/platform/alarm-micro.h>
-#include <openthread/platform/diag.h>
-#include <openthread/platform/logging.h>
-#include <openthread/platform/radio.h>
-#include <openthread/platform/time.h>
-
-#include "openthread-system.h"
-#include "platform-nrf5.h"
-
-#include <nrf.h>
-#include <nrf_802154.h>
-
-#include <openthread-core-config.h>
-#include <openthread/config.h>
-#include <openthread/random_noncrypto.h>
-
-// clang-format off
-
-#define SHORT_ADDRESS_SIZE 2 ///< Size of MAC short address.
-#define US_PER_MS 1000ULL ///< Microseconds in millisecond.
-
-#define ACK_REQUEST_OFFSET 1 ///< Byte containing Ack request bit (+1 for frame length byte).
-#define ACK_REQUEST_BIT (1 << 5) ///< Ack request bit.
-#define FRAME_PENDING_OFFSET 1 ///< Byte containing pending bit (+1 for frame length byte).
-#define FRAME_PENDING_BIT (1 << 4) ///< Frame Pending bit.
-
-// clang-format on
-
-enum
-{
- NRF52811_RECEIVE_SENSITIVITY = -100, // dBm
-};
-
-static bool sDisabled;
-
-static otError sReceiveError = OT_ERROR_NONE;
-static otRadioFrame sReceivedFrames[NRF_802154_RX_BUFFERS];
-static otRadioFrame sTransmitFrame;
-static uint8_t sTransmitPsdu[OT_RADIO_FRAME_MAX_SIZE + 1];
-
-#if OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
-static otRadioIeInfo sTransmitIeInfo;
-#endif
-static otInstance *sInstance = NULL;
-
-static otRadioFrame sAckFrame;
-static bool sAckedWithFramePending;
-
-static int8_t sDefaultTxPower;
-
-static uint32_t sEnergyDetectionTime;
-static uint8_t sEnergyDetectionChannel;
-static int8_t sEnergyDetected;
-
-typedef enum
-{
- kPendingEventSleep, // Requested to enter Sleep state.
- kPendingEventFrameTransmitted, // Transmitted frame and received ACK (if requested).
- kPendingEventChannelAccessFailure, // Failed to transmit frame (channel busy).
- kPendingEventInvalidOrNoAck, // Failed to transmit frame (received invalid or no ACK).
- kPendingEventReceiveFailed, // Failed to receive a valid frame.
- kPendingEventEnergyDetectionStart, // Requested to start Energy Detection procedure.
- kPendingEventEnergyDetected, // Energy Detection finished.
-} RadioPendingEvents;
-
-static uint32_t sPendingEvents;
-
-static void dataInit(void)
-{
- sDisabled = true;
-
- sTransmitFrame.mPsdu = sTransmitPsdu + 1;
-#if OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
- sTransmitFrame.mInfo.mTxInfo.mIeInfo = &sTransmitIeInfo;
-#endif
-
- sReceiveError = OT_ERROR_NONE;
-
- for (uint32_t i = 0; i < NRF_802154_RX_BUFFERS; i++)
- {
- sReceivedFrames[i].mPsdu = NULL;
- }
-
- memset(&sAckFrame, 0, sizeof(sAckFrame));
-}
-
-static void convertShortAddress(uint8_t *aTo, uint16_t aFrom)
-{
- aTo[0] = (uint8_t)aFrom;
- aTo[1] = (uint8_t)(aFrom >> 8);
-}
-
-static inline bool isPendingEventSet(RadioPendingEvents aEvent)
-{
- return sPendingEvents & (1UL << aEvent);
-}
-
-static void setPendingEvent(RadioPendingEvents aEvent)
-{
- volatile uint32_t pendingEvents;
- uint32_t bitToSet = 1UL << aEvent;
-
- do
- {
- pendingEvents = __LDREXW((unsigned long volatile *)&sPendingEvents);
- pendingEvents |= bitToSet;
- } while (__STREXW(pendingEvents, (unsigned long volatile *)&sPendingEvents));
-
- otSysEventSignalPending();
-}
-
-static void resetPendingEvent(RadioPendingEvents aEvent)
-{
- volatile uint32_t pendingEvents;
- uint32_t bitsToRemain = ~(1UL << aEvent);
-
- do
- {
- pendingEvents = __LDREXW((unsigned long volatile *)&sPendingEvents);
- pendingEvents &= bitsToRemain;
- } while (__STREXW(pendingEvents, (unsigned long volatile *)&sPendingEvents));
-}
-
-static inline void clearPendingEvents(void)
-{
- // Clear pending events that could cause race in the MAC layer.
- volatile uint32_t pendingEvents;
- uint32_t bitsToRemain = ~(0UL);
-
- bitsToRemain &= ~(1UL << kPendingEventSleep);
-
- do
- {
- pendingEvents = __LDREXW((unsigned long volatile *)&sPendingEvents);
- pendingEvents &= bitsToRemain;
- } while (__STREXW(pendingEvents, (unsigned long volatile *)&sPendingEvents));
-}
-
-#if !OPENTHREAD_CONFIG_ENABLE_PLATFORM_EUI64_CUSTOM_SOURCE
-void otPlatRadioGetIeeeEui64(otInstance *aInstance, uint8_t *aIeeeEui64)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- uint64_t factoryAddress;
- uint32_t index = 0;
-
- // Set the MAC Address Block Larger (MA-L) formerly called OUI.
- aIeeeEui64[index++] = (OPENTHREAD_CONFIG_STACK_VENDOR_OUI >> 16) & 0xff;
- aIeeeEui64[index++] = (OPENTHREAD_CONFIG_STACK_VENDOR_OUI >> 8) & 0xff;
- aIeeeEui64[index++] = OPENTHREAD_CONFIG_STACK_VENDOR_OUI & 0xff;
-
- // Use device identifier assigned during the production.
- factoryAddress = (uint64_t)NRF_FICR->DEVICEID[0] << 32;
- factoryAddress |= NRF_FICR->DEVICEID[1];
- memcpy(aIeeeEui64 + index, &factoryAddress, sizeof(factoryAddress) - index);
-}
-#endif // OPENTHREAD_CONFIG_ENABLE_PLATFORM_EUI64_CUSTOM_SOURCE
-
-void otPlatRadioSetPanId(otInstance *aInstance, uint16_t aPanId)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- uint8_t address[SHORT_ADDRESS_SIZE];
- convertShortAddress(address, aPanId);
-
- nrf_802154_pan_id_set(address);
-}
-
-void otPlatRadioSetExtendedAddress(otInstance *aInstance, const otExtAddress *aExtAddress)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- nrf_802154_extended_address_set(aExtAddress->m8);
-}
-
-void otPlatRadioSetShortAddress(otInstance *aInstance, uint16_t aShortAddress)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- uint8_t address[SHORT_ADDRESS_SIZE];
- convertShortAddress(address, aShortAddress);
-
- nrf_802154_short_address_set(address);
-}
-
-void nrf5RadioInit(void)
-{
- dataInit();
- nrf_802154_init();
-}
-
-void nrf5RadioDeinit(void)
-{
- nrf_802154_sleep();
- nrf_802154_deinit();
- sPendingEvents = 0;
-}
-
-otRadioState otPlatRadioGetState(otInstance *aInstance)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- if (sDisabled)
- {
- return OT_RADIO_STATE_DISABLED;
- }
-
- switch (nrf_802154_state_get())
- {
- case NRF_802154_STATE_SLEEP:
- return OT_RADIO_STATE_SLEEP;
-
- case NRF_802154_STATE_RECEIVE:
- case NRF_802154_STATE_ENERGY_DETECTION:
- return OT_RADIO_STATE_RECEIVE;
-
- case NRF_802154_STATE_TRANSMIT:
- case NRF_802154_STATE_CCA:
- case NRF_802154_STATE_CONTINUOUS_CARRIER:
- return OT_RADIO_STATE_TRANSMIT;
-
- default:
- assert(false); // Make sure driver returned valid state.
- }
-
- return OT_RADIO_STATE_RECEIVE; // It is the default state. Return it in case of unknown.
-}
-
-bool otPlatRadioIsEnabled(otInstance *aInstance)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- return !sDisabled;
-}
-
-otError otPlatRadioEnable(otInstance *aInstance)
-{
- otError error;
-
- sInstance = aInstance;
-
- if (sDisabled)
- {
- sDisabled = false;
- error = OT_ERROR_NONE;
- }
- else
- {
- error = OT_ERROR_INVALID_STATE;
- }
-
- return error;
-}
-
-otError otPlatRadioDisable(otInstance *aInstance)
-{
- otError error = OT_ERROR_NONE;
-
- otEXPECT(otPlatRadioIsEnabled(aInstance));
- otEXPECT_ACTION(otPlatRadioGetState(aInstance) == OT_RADIO_STATE_SLEEP || isPendingEventSet(kPendingEventSleep),
- error = OT_ERROR_INVALID_STATE);
-
- sDisabled = true;
-
-exit:
- return error;
-}
-
-otError otPlatRadioSleep(otInstance *aInstance)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- if (nrf_802154_sleep())
- {
- clearPendingEvents();
- }
- else
- {
- clearPendingEvents();
- setPendingEvent(kPendingEventSleep);
- }
-
- return OT_ERROR_NONE;
-}
-
-otError otPlatRadioReceive(otInstance *aInstance, uint8_t aChannel)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- bool result;
-
- nrf_802154_channel_set(aChannel);
- nrf_802154_tx_power_set(sDefaultTxPower);
- result = nrf_802154_receive();
- clearPendingEvents();
-
- return result ? OT_ERROR_NONE : OT_ERROR_INVALID_STATE;
-}
-
-otError otPlatRadioTransmit(otInstance *aInstance, otRadioFrame *aFrame)
-{
- bool result = true;
-
- aFrame->mPsdu[-1] = aFrame->mLength;
-
- nrf_802154_channel_set(aFrame->mChannel);
-
- if (aFrame->mInfo.mTxInfo.mCsmaCaEnabled)
- {
- nrf_802154_transmit_csma_ca_raw(&aFrame->mPsdu[-1]);
- }
- else
- {
- result = nrf_802154_transmit_raw(&aFrame->mPsdu[-1], false);
- }
-
- clearPendingEvents();
- otPlatRadioTxStarted(aInstance, aFrame);
-
- if (!result)
- {
- setPendingEvent(kPendingEventChannelAccessFailure);
- }
-
- return OT_ERROR_NONE;
-}
-
-otRadioFrame *otPlatRadioGetTransmitBuffer(otInstance *aInstance)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- return &sTransmitFrame;
-}
-
-int8_t otPlatRadioGetRssi(otInstance *aInstance)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- return nrf_802154_rssi_last_get();
-}
-
-otRadioCaps otPlatRadioGetCaps(otInstance *aInstance)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- return (otRadioCaps)(OT_RADIO_CAPS_ENERGY_SCAN | OT_RADIO_CAPS_ACK_TIMEOUT | OT_RADIO_CAPS_CSMA_BACKOFF);
-}
-
-bool otPlatRadioGetPromiscuous(otInstance *aInstance)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- return nrf_802154_promiscuous_get();
-}
-
-void otPlatRadioSetPromiscuous(otInstance *aInstance, bool aEnable)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- nrf_802154_promiscuous_set(aEnable);
-}
-
-void otPlatRadioEnableSrcMatch(otInstance *aInstance, bool aEnable)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- nrf_802154_auto_pending_bit_set(aEnable);
-}
-
-otError otPlatRadioAddSrcMatchShortEntry(otInstance *aInstance, const uint16_t aShortAddress)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- otError error;
-
- uint8_t shortAddress[SHORT_ADDRESS_SIZE];
- convertShortAddress(shortAddress, aShortAddress);
-
- if (nrf_802154_pending_bit_for_addr_set(shortAddress, false))
- {
- error = OT_ERROR_NONE;
- }
- else
- {
- error = OT_ERROR_NO_BUFS;
- }
-
- return error;
-}
-
-otError otPlatRadioAddSrcMatchExtEntry(otInstance *aInstance, const otExtAddress *aExtAddress)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- otError error;
-
- if (nrf_802154_pending_bit_for_addr_set(aExtAddress->m8, true))
- {
- error = OT_ERROR_NONE;
- }
- else
- {
- error = OT_ERROR_NO_BUFS;
- }
-
- return error;
-}
-
-otError otPlatRadioClearSrcMatchShortEntry(otInstance *aInstance, const uint16_t aShortAddress)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- otError error;
-
- uint8_t shortAddress[SHORT_ADDRESS_SIZE];
- convertShortAddress(shortAddress, aShortAddress);
-
- if (nrf_802154_pending_bit_for_addr_clear(shortAddress, false))
- {
- error = OT_ERROR_NONE;
- }
- else
- {
- error = OT_ERROR_NO_ADDRESS;
- }
-
- return error;
-}
-
-otError otPlatRadioClearSrcMatchExtEntry(otInstance *aInstance, const otExtAddress *aExtAddress)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- otError error;
-
- if (nrf_802154_pending_bit_for_addr_clear(aExtAddress->m8, true))
- {
- error = OT_ERROR_NONE;
- }
- else
- {
- error = OT_ERROR_NO_ADDRESS;
- }
-
- return error;
-}
-
-void otPlatRadioClearSrcMatchShortEntries(otInstance *aInstance)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- nrf_802154_pending_bit_for_addr_reset(false);
-}
-
-void otPlatRadioClearSrcMatchExtEntries(otInstance *aInstance)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- nrf_802154_pending_bit_for_addr_reset(true);
-}
-
-otError otPlatRadioEnergyScan(otInstance *aInstance, uint8_t aScanChannel, uint16_t aScanDuration)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- sEnergyDetectionTime = (uint32_t)aScanDuration * 1000UL;
- sEnergyDetectionChannel = aScanChannel;
-
- clearPendingEvents();
-
- nrf_802154_channel_set(aScanChannel);
-
- if (nrf_802154_energy_detection(sEnergyDetectionTime))
- {
- resetPendingEvent(kPendingEventEnergyDetectionStart);
- }
- else
- {
- setPendingEvent(kPendingEventEnergyDetectionStart);
- }
-
- return OT_ERROR_NONE;
-}
-
-otError otPlatRadioGetTransmitPower(otInstance *aInstance, int8_t *aPower)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- otError error = OT_ERROR_NONE;
-
- if (aPower == NULL)
- {
- error = OT_ERROR_INVALID_ARGS;
- }
- else
- {
- *aPower = sDefaultTxPower;
- }
-
- return error;
-}
-
-otError otPlatRadioSetTransmitPower(otInstance *aInstance, int8_t aPower)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- sDefaultTxPower = aPower;
- nrf_802154_tx_power_set(aPower);
-
- return OT_ERROR_NONE;
-}
-
-void nrf5RadioProcess(otInstance *aInstance)
-{
- bool isEventPending = false;
-
- for (uint32_t i = 0; i < NRF_802154_RX_BUFFERS; i++)
- {
- if (sReceivedFrames[i].mPsdu != NULL)
- {
-#if OPENTHREAD_CONFIG_DIAG_ENABLE
-
- if (otPlatDiagModeGet())
- {
- otPlatDiagRadioReceiveDone(aInstance, &sReceivedFrames[i], OT_ERROR_NONE);
- }
- else
-#endif
- {
- otPlatRadioReceiveDone(aInstance, &sReceivedFrames[i], OT_ERROR_NONE);
- }
-
- uint8_t *bufferAddress = &sReceivedFrames[i].mPsdu[-1];
- sReceivedFrames[i].mPsdu = NULL;
- nrf_802154_buffer_free_raw(bufferAddress);
- }
- }
-
- if (isPendingEventSet(kPendingEventFrameTransmitted))
- {
- resetPendingEvent(kPendingEventFrameTransmitted);
-
-#if OPENTHREAD_CONFIG_DIAG_ENABLE
-
- if (otPlatDiagModeGet())
- {
- otPlatDiagRadioTransmitDone(aInstance, &sTransmitFrame, OT_ERROR_NONE);
- }
- else
-#endif
- {
- otRadioFrame *ackPtr = (sAckFrame.mPsdu == NULL) ? NULL : &sAckFrame;
- otPlatRadioTxDone(aInstance, &sTransmitFrame, ackPtr, OT_ERROR_NONE);
- }
-
- if (sAckFrame.mPsdu != NULL)
- {
- nrf_802154_buffer_free_raw(sAckFrame.mPsdu - 1);
- sAckFrame.mPsdu = NULL;
- }
- }
-
- if (isPendingEventSet(kPendingEventChannelAccessFailure))
- {
- resetPendingEvent(kPendingEventChannelAccessFailure);
-
-#if OPENTHREAD_CONFIG_DIAG_ENABLE
-
- if (otPlatDiagModeGet())
- {
- otPlatDiagRadioTransmitDone(aInstance, &sTransmitFrame, OT_ERROR_CHANNEL_ACCESS_FAILURE);
- }
- else
-#endif
- {
- otPlatRadioTxDone(aInstance, &sTransmitFrame, NULL, OT_ERROR_CHANNEL_ACCESS_FAILURE);
- }
- }
-
- if (isPendingEventSet(kPendingEventInvalidOrNoAck))
- {
- resetPendingEvent(kPendingEventInvalidOrNoAck);
-
-#if OPENTHREAD_CONFIG_DIAG_ENABLE
-
- if (otPlatDiagModeGet())
- {
- otPlatDiagRadioTransmitDone(aInstance, &sTransmitFrame, OT_ERROR_NO_ACK);
- }
- else
-#endif
- {
- otPlatRadioTxDone(aInstance, &sTransmitFrame, NULL, OT_ERROR_NO_ACK);
- }
- }
-
- if (isPendingEventSet(kPendingEventReceiveFailed))
- {
- resetPendingEvent(kPendingEventReceiveFailed);
-
-#if OPENTHREAD_CONFIG_DIAG_ENABLE
-
- if (otPlatDiagModeGet())
- {
- otPlatDiagRadioReceiveDone(aInstance, NULL, sReceiveError);
- }
- else
-#endif
- {
- otPlatRadioReceiveDone(aInstance, NULL, sReceiveError);
- }
- }
-
- if (isPendingEventSet(kPendingEventEnergyDetected))
- {
- resetPendingEvent(kPendingEventEnergyDetected);
-
- otPlatRadioEnergyScanDone(aInstance, sEnergyDetected);
- }
-
- if (isPendingEventSet(kPendingEventSleep))
- {
- if (nrf_802154_sleep())
- {
- resetPendingEvent(kPendingEventSleep);
- }
- else
- {
- isEventPending = true;
- }
- }
-
- if (isPendingEventSet(kPendingEventEnergyDetectionStart))
- {
- nrf_802154_channel_set(sEnergyDetectionChannel);
-
- if (nrf_802154_energy_detection(sEnergyDetectionTime))
- {
- resetPendingEvent(kPendingEventEnergyDetectionStart);
- }
- else
- {
- isEventPending = true;
- }
- }
-
- if (isEventPending)
- {
- otSysEventSignalPending();
- }
-}
-
-void nrf_802154_received_timestamp_raw(uint8_t *p_data, int8_t power, uint8_t lqi, uint32_t time)
-{
- otRadioFrame *receivedFrame = NULL;
-
- for (uint32_t i = 0; i < NRF_802154_RX_BUFFERS; i++)
- {
- if (sReceivedFrames[i].mPsdu == NULL)
- {
- receivedFrame = &sReceivedFrames[i];
-
- memset(receivedFrame, 0, sizeof(*receivedFrame));
- break;
- }
- }
-
- assert(receivedFrame != NULL);
-
- receivedFrame->mPsdu = &p_data[1];
- receivedFrame->mLength = p_data[0];
- receivedFrame->mInfo.mRxInfo.mRssi = power;
- receivedFrame->mInfo.mRxInfo.mLqi = lqi;
- receivedFrame->mChannel = nrf_802154_channel_get();
-
- // Inform if this frame was acknowledged with frame pending set.
- if (p_data[ACK_REQUEST_OFFSET] & ACK_REQUEST_BIT)
- {
- receivedFrame->mInfo.mRxInfo.mAckedWithFramePending = sAckedWithFramePending;
- }
- else
- {
- receivedFrame->mInfo.mRxInfo.mAckedWithFramePending = false;
- }
-
- // Get the timestamp when the SFD was received.
-#if !NRF_802154_TX_STARTED_NOTIFY_ENABLED
-#error "NRF_802154_TX_STARTED_NOTIFY_ENABLED is required!"
-#endif
- uint32_t offset =
- (int32_t)otPlatAlarmMicroGetNow() - (int32_t)nrf_802154_first_symbol_timestamp_get(time, p_data[0]);
- receivedFrame->mInfo.mRxInfo.mTimestamp = nrf5AlarmGetCurrentTime() - offset;
-
- sAckedWithFramePending = false;
-
- otSysEventSignalPending();
-}
-
-void nrf_802154_receive_failed(nrf_802154_rx_error_t error)
-{
- switch (error)
- {
- case NRF_802154_RX_ERROR_INVALID_FRAME:
- case NRF_802154_RX_ERROR_DELAYED_TIMEOUT:
- sReceiveError = OT_ERROR_NO_FRAME_RECEIVED;
- break;
-
- case NRF_802154_RX_ERROR_INVALID_FCS:
- sReceiveError = OT_ERROR_FCS;
- break;
-
- case NRF_802154_RX_ERROR_INVALID_DEST_ADDR:
- sReceiveError = OT_ERROR_DESTINATION_ADDRESS_FILTERED;
- break;
-
- case NRF_802154_RX_ERROR_RUNTIME:
- case NRF_802154_RX_ERROR_TIMESLOT_ENDED:
- case NRF_802154_RX_ERROR_ABORTED:
- case NRF_802154_RX_ERROR_DELAYED_TIMESLOT_DENIED:
- case NRF_802154_RX_ERROR_INVALID_LENGTH:
- sReceiveError = OT_ERROR_FAILED;
- break;
-
- default:
- assert(false);
- }
-
- sAckedWithFramePending = false;
-
- setPendingEvent(kPendingEventReceiveFailed);
-}
-
-void nrf_802154_tx_ack_started(const uint8_t *p_data)
-{
- // Check if the frame pending bit is set in ACK frame.
- sAckedWithFramePending = p_data[FRAME_PENDING_OFFSET] & FRAME_PENDING_BIT;
-}
-
-void nrf_802154_transmitted_raw(const uint8_t *aFrame, uint8_t *aAckPsdu, int8_t aPower, uint8_t aLqi)
-{
- assert(aFrame == sTransmitPsdu);
-
- if (aAckPsdu == NULL)
- {
- sAckFrame.mPsdu = NULL;
- }
- else
- {
- sAckFrame.mPsdu = &aAckPsdu[1];
- sAckFrame.mLength = aAckPsdu[0];
- sAckFrame.mInfo.mRxInfo.mRssi = aPower;
- sAckFrame.mInfo.mRxInfo.mLqi = aLqi;
- sAckFrame.mChannel = nrf_802154_channel_get();
- }
-
- setPendingEvent(kPendingEventFrameTransmitted);
-}
-
-void nrf_802154_transmit_failed(const uint8_t *aFrame, nrf_802154_tx_error_t error)
-{
- assert(aFrame == sTransmitPsdu);
-
- switch (error)
- {
- case NRF_802154_TX_ERROR_BUSY_CHANNEL:
- case NRF_802154_TX_ERROR_TIMESLOT_ENDED:
- case NRF_802154_TX_ERROR_ABORTED:
- case NRF_802154_TX_ERROR_TIMESLOT_DENIED:
- setPendingEvent(kPendingEventChannelAccessFailure);
- break;
-
- case NRF_802154_TX_ERROR_INVALID_ACK:
- case NRF_802154_TX_ERROR_NO_ACK:
- case NRF_802154_TX_ERROR_NO_MEM:
- setPendingEvent(kPendingEventInvalidOrNoAck);
- break;
-
- default:
- assert(false);
- }
-}
-
-void nrf_802154_energy_detected(uint8_t result)
-{
- sEnergyDetected = nrf_802154_dbm_from_energy_level_calculate(result);
-
- setPendingEvent(kPendingEventEnergyDetected);
-}
-
-int8_t otPlatRadioGetReceiveSensitivity(otInstance *aInstance)
-{
- OT_UNUSED_VARIABLE(aInstance);
- return NRF52811_RECEIVE_SENSITIVITY;
-}
-
-#if OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
-void nrf_802154_tx_started(const uint8_t *aFrame)
-{
- bool notifyFrameUpdated = false;
- assert(aFrame == sTransmitPsdu);
-
-#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
- if (sTransmitFrame.mInfo.mTxInfo.mIeInfo->mTimeIeOffset != 0)
- {
- uint8_t *timeIe = sTransmitFrame.mPsdu + sTransmitFrame.mInfo.mTxInfo.mIeInfo->mTimeIeOffset;
- uint64_t time = otPlatTimeGet() + sTransmitFrame.mInfo.mTxInfo.mIeInfo->mNetworkTimeOffset;
-
- *timeIe = sTransmitFrame.mInfo.mTxInfo.mIeInfo->mTimeSyncSeq;
-
- *(++timeIe) = (uint8_t)(time & 0xff);
- for (uint8_t i = 1; i < sizeof(uint64_t); i++)
- {
- time = time >> 8;
- *(++timeIe) = (uint8_t)(time & 0xff);
- }
-
- notifyFrameUpdated = true;
- }
-#endif // OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
-
- if (notifyFrameUpdated)
- {
- otPlatRadioFrameUpdated(sInstance, &sTransmitFrame);
- }
-}
-#endif
-
-void nrf_802154_random_init(void)
-{
- // Intentionally empty
-}
-
-void nrf_802154_random_deinit(void)
-{
- // Intentionally empty
-}
-
-uint32_t nrf_802154_random_get(void)
-{
- return otRandomNonCryptoGetUint32();
-}
diff --git a/examples/platforms/nrf52811/system.c b/examples/platforms/nrf52811/system.c
deleted file mode 100644
index 6de0e06..0000000
--- a/examples/platforms/nrf52811/system.c
+++ /dev/null
@@ -1,142 +0,0 @@
-/*
- * Copyright (c) 2019, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This file includes the platform-specific initializers.
- *
- */
-
-#include <openthread-core-config.h>
-#include <openthread/config.h>
-
-#include <openthread/platform/logging.h>
-
-#include "openthread-system.h"
-#include "platform-fem.h"
-#include "platform-nrf5.h"
-#include <drivers/clock/nrf_drv_clock.h>
-#include <nrf.h>
-
-#include <openthread/config.h>
-
-extern bool gPlatformPseudoResetWasRequested;
-
-void __cxa_pure_virtual(void)
-{
- while (1)
- ;
-}
-
-void otSysInit(int argc, char *argv[])
-{
- if (gPlatformPseudoResetWasRequested)
- {
- otSysDeinit();
- }
-
- (void)argc;
- (void)argv;
-
-#if DCDC_ENABLE
- NRF_POWER->DCDCEN = 1;
-#endif
-
- nrf_drv_clock_init();
-
-#if (OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED) || \
- (OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_NCP_SPINEL)
- nrf5LogInit();
-#endif
- nrf5AlarmInit();
- nrf5RandomInit();
- if (!gPlatformPseudoResetWasRequested)
- {
-#if (UART_AS_SERIAL_TRANSPORT == 1)
- nrf5UartInit();
-#endif
- }
-
-#if (SPIS_AS_SERIAL_TRANSPORT == 1)
- nrf5SpiSlaveInit();
-#endif
- nrf5MiscInit();
- nrf5RadioInit();
- nrf5TempInit();
-
-#if PLATFORM_FEM_ENABLE_DEFAULT_CONFIG
- PlatformFemSetConfigParams(&PLATFORM_FEM_DEFAULT_CONFIG);
-#endif
-
- gPlatformPseudoResetWasRequested = false;
-}
-
-void otSysDeinit(void)
-{
- nrf5TempDeinit();
- nrf5RadioDeinit();
- nrf5MiscDeinit();
-#if (SPIS_AS_SERIAL_TRANSPORT == 1)
- nrf5SpiSlaveDeinit();
-#endif
- if (!gPlatformPseudoResetWasRequested)
- {
-#if (UART_AS_SERIAL_TRANSPORT == 1)
- nrf5UartDeinit();
-#endif
- }
- nrf5RandomDeinit();
- nrf5AlarmDeinit();
-#if (OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED) || \
- (OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_NCP_SPINEL)
- nrf5LogDeinit();
-#endif
-}
-
-bool otSysPseudoResetWasRequested(void)
-{
- return gPlatformPseudoResetWasRequested;
-}
-
-void otSysProcessDrivers(otInstance *aInstance)
-{
- nrf5RadioProcess(aInstance);
-#if (UART_AS_SERIAL_TRANSPORT == 1)
- nrf5UartProcess();
-#endif
-#if (SPIS_AS_SERIAL_TRANSPORT == 1)
- nrf5SpiSlaveProcess();
-#endif
- nrf5TempProcess();
- nrf5AlarmProcess(aInstance);
-}
-
-__WEAK void otSysEventSignalPending(void)
-{
- // Intentionally empty
-}
diff --git a/examples/platforms/nrf52811/temp.c b/examples/platforms/nrf52811/temp.c
deleted file mode 100644
index c990d62..0000000
--- a/examples/platforms/nrf52811/temp.c
+++ /dev/null
@@ -1,109 +0,0 @@
-/*
- * Copyright (c) 2019, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <limits.h>
-#include <stdint.h>
-#include <string.h>
-
-#include <hal/nrf_temp.h>
-#include <utils/code_utils.h>
-
-#include "platform-nrf5.h"
-#include <drivers/radio/platform/temperature/nrf_802154_temperature.h>
-
-#define US_PER_S 1000000ULL
-
-static uint64_t sLastReadTimestamp;
-static int32_t sTemperature;
-
-__STATIC_INLINE void dataReadyEventClear(void)
-{
- NRF_TEMP->EVENTS_DATARDY = 0;
- volatile uint32_t dummy = NRF_TEMP->EVENTS_DATARDY;
- (void)dummy;
-}
-
-void nrf5TempInit(void)
-{
- nrf_temp_init();
-
- NRF_TEMP->TASKS_START = 1;
-}
-
-void nrf5TempDeinit(void)
-{
- NRF_TEMP->TASKS_STOP = 1;
-}
-
-void nrf5TempProcess(void)
-{
- int32_t prevTemperature = sTemperature;
- uint64_t now;
-
- if (NRF_TEMP->EVENTS_DATARDY)
- {
- dataReadyEventClear();
-
- sTemperature = nrf_temp_read();
- }
-
- now = nrf5AlarmGetCurrentTime();
-
- if (now - sLastReadTimestamp > (TEMP_MEASUREMENT_INTERVAL * US_PER_S))
- {
- NRF_TEMP->TASKS_START = 1;
- sLastReadTimestamp = now;
- }
-
- if (prevTemperature != sTemperature)
- {
- nrf_802154_temperature_changed();
- }
-}
-
-int32_t nrf5TempGet(void)
-{
- // Provide temperature value in [0.25 C] unit.
- return sTemperature;
-}
-
-void nrf_802154_temperature_init(void)
-{
- // Intentionally empty
-}
-
-void nrf_802154_temperature_deinit(void)
-{
- // Intentionally empty
-}
-
-int8_t nrf_802154_temperature_get(void)
-{
- // Provide temperature value in [C].
- return (int8_t)(sTemperature / 4);
-}
diff --git a/examples/platforms/nrf52811/uart.c b/examples/platforms/nrf52811/uart.c
deleted file mode 100644
index 7338316..0000000
--- a/examples/platforms/nrf52811/uart.c
+++ /dev/null
@@ -1,338 +0,0 @@
-/*
- * Copyright (c) 2019, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This file implements the OpenThread platform abstraction for UART communication.
- *
- */
-
-#include <openthread-core-config.h>
-#include <openthread/config.h>
-
-#include <stddef.h>
-#include <stdint.h>
-
-#include <utils/code_utils.h>
-#include <openthread/platform/toolchain.h>
-#include <openthread/platform/uart.h>
-
-#include "openthread-system.h"
-
-#include "platform-nrf5.h"
-#include <drivers/clock/nrf_drv_clock.h>
-#include <hal/nrf_gpio.h>
-#include <hal/nrf_uart.h>
-
-#if (UART_AS_SERIAL_TRANSPORT == 1)
-
-bool sUartEnabled = false;
-
-/**
- * UART TX buffer variables.
- */
-static const uint8_t *sTransmitBuffer = NULL;
-static uint16_t sTransmitLength = 0;
-static bool sTransmitDone = 0;
-
-/**
- * UART RX ring buffer variables.
- */
-static uint8_t sReceiveBuffer[UART_RX_BUFFER_SIZE];
-static uint16_t sReceiveHead = 0;
-static uint16_t sReceiveTail = 0;
-
-/**
- * Function for checking if RX buffer is full.
- *
- * @retval true RX buffer is full.
- * @retval false RX buffer is not full.
- */
-static __INLINE bool isRxBufferFull()
-{
- uint16_t next = (sReceiveHead + 1) % UART_RX_BUFFER_SIZE;
- return (next == sReceiveTail);
-}
-
-/**
- * Function for checking if RX buffer is empty.
- *
- * @retval true RX buffer is empty.
- * @retval false RX buffer is not empty.
- */
-static __INLINE bool isRxBufferEmpty()
-{
- return (sReceiveHead == sReceiveTail);
-}
-
-/**
- * Function for notifying application about new bytes received.
- */
-static void processReceive(void)
-{
- // Set head position to not be changed during read procedure.
- uint16_t head = sReceiveHead;
-
- otEXPECT(isRxBufferEmpty() == false);
-
- // In case head roll back to the beginning of the buffer, notify about left
- // bytes from the end of the buffer.
- if (head < sReceiveTail)
- {
- otPlatUartReceived(&sReceiveBuffer[sReceiveTail], (UART_RX_BUFFER_SIZE - sReceiveTail));
- sReceiveTail = 0;
- }
-
- // Notify about received bytes.
- if (head > sReceiveTail)
- {
- otPlatUartReceived(&sReceiveBuffer[sReceiveTail], (head - sReceiveTail));
- sReceiveTail = head;
- }
-
-exit:
- return;
-}
-
-otError otPlatUartFlush(void)
-{
- return OT_ERROR_NOT_IMPLEMENTED;
-}
-
-/**
- * Function for notifying application about transmission being done.
- */
-static void processTransmit(void)
-{
- otEXPECT(sTransmitBuffer != NULL);
-
- if (sTransmitDone)
- {
- // Clear Transmition transaction and notify application.
- sTransmitBuffer = NULL;
- sTransmitLength = 0;
- sTransmitDone = false;
- otPlatUartSendDone();
- }
-
-exit:
- return;
-}
-
-void nrf5UartProcess(void)
-{
- processReceive();
- processTransmit();
-}
-
-void nrf5UartInit(void)
-{
- // Intentionally empty.
-}
-
-void nrf5UartDeinit(void)
-{
- if (sUartEnabled)
- {
- otPlatUartDisable();
- }
-}
-
-otError otPlatUartEnable(void)
-{
- otError error = OT_ERROR_NONE;
-
- otEXPECT_ACTION(sUartEnabled == false, error = OT_ERROR_ALREADY);
-
- // Set up TX and RX pins.
- nrf_gpio_pin_set(UART_PIN_TX);
- nrf_gpio_cfg_output(UART_PIN_TX);
- nrf_gpio_cfg_input(UART_PIN_RX, NRF_GPIO_PIN_NOPULL);
- nrf_uart_txrx_pins_set(UART_INSTANCE, UART_PIN_TX, UART_PIN_RX);
-
-#if (UART_HWFC_ENABLED == 1)
- // Set up CTS and RTS pins.
- nrf_gpio_cfg_input(UART_PIN_CTS, NRF_GPIO_PIN_NOPULL);
- nrf_gpio_pin_set(UART_PIN_RTS);
- nrf_gpio_cfg_output(UART_PIN_RTS);
- nrf_uart_hwfc_pins_set(UART_INSTANCE, UART_PIN_RTS, UART_PIN_CTS);
-
- nrf_uart_configure(UART_INSTANCE, UART_PARITY, NRF_UART_HWFC_ENABLED);
-#else
- nrf_uart_configure(UART_INSTANCE, UART_PARITY, NRF_UART_HWFC_DISABLED);
-#endif
-
- // Configure baudrate.
- nrf_uart_baudrate_set(UART_INSTANCE, UART_BAUDRATE);
-
- // Clear UART specific events.
- nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_TXDRDY);
- nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_ERROR);
- nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_RXDRDY);
-
- // Enable interrupts for TX.
- nrf_uart_int_enable(UART_INSTANCE, NRF_UART_INT_MASK_TXDRDY);
-
- // Enable interrupts for RX.
- nrf_uart_int_enable(UART_INSTANCE, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR);
-
- // Configure NVIC to handle UART interrupts.
- NVIC_SetPriority(UART_IRQN, UART_IRQ_PRIORITY);
- NVIC_ClearPendingIRQ(UART_IRQN);
- NVIC_EnableIRQ(UART_IRQN);
-
- // Start HFCLK
- nrf_drv_clock_hfclk_request(NULL);
-
- while (!nrf_drv_clock_hfclk_is_running())
- {
- }
-
- // Enable UART instance, and start RX on it.
- nrf_uart_enable(UART_INSTANCE);
- nrf_uart_task_trigger(UART_INSTANCE, NRF_UART_TASK_STARTRX);
-
- sUartEnabled = true;
-
-exit:
- return error;
-}
-
-otError otPlatUartDisable(void)
-{
- otError error = OT_ERROR_NONE;
-
- otEXPECT_ACTION(sUartEnabled == true, error = OT_ERROR_ALREADY);
-
- // Disable NVIC interrupt.
- NVIC_DisableIRQ(UART_IRQN);
- NVIC_ClearPendingIRQ(UART_IRQN);
- NVIC_SetPriority(UART_IRQN, 0);
-
- // Disable interrupts for TX.
- nrf_uart_int_disable(UART_INSTANCE, NRF_UART_INT_MASK_TXDRDY);
-
- // Disable interrupts for RX.
- nrf_uart_int_disable(UART_INSTANCE, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR);
-
- // Disable UART instance.
- nrf_uart_disable(UART_INSTANCE);
-
- // Release HF clock.
- nrf_drv_clock_hfclk_release();
-
- sUartEnabled = false;
-
-exit:
- return error;
-}
-
-otError otPlatUartSend(const uint8_t *aBuf, uint16_t aBufLength)
-{
- otError error = OT_ERROR_NONE;
-
- otEXPECT_ACTION(sTransmitBuffer == NULL, error = OT_ERROR_BUSY);
-
- // Set up transmit buffer and its size without counting first triggered byte.
- sTransmitBuffer = aBuf;
- sTransmitLength = aBufLength - 1;
-
- // Initiate Transmission process.
- nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_TXDRDY);
- nrf_uart_txd_set(UART_INSTANCE, *sTransmitBuffer++);
- nrf_uart_task_trigger(UART_INSTANCE, NRF_UART_TASK_STARTTX);
-
-exit:
- return error;
-}
-
-/**
- * Interrupt handler of UART0 peripherial.
- */
-void UARTE0_UART0_IRQHandler(void)
-{
- // Check if any error has been detected.
- if (nrf_uart_event_check(UART_INSTANCE, NRF_UART_EVENT_ERROR))
- {
- // Clear error event and ignore erronous byte in RXD register.
- nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_ERROR);
- nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_RXDRDY);
- }
- else if (nrf_uart_event_check(UART_INSTANCE, NRF_UART_EVENT_RXDRDY))
- {
- // Clear RXDRDY event.
- nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_RXDRDY);
-
- // Read byte from the UART buffer.
- uint8_t byte = nrf_uart_rxd_get(UART_INSTANCE);
-
- if (!isRxBufferFull())
- {
- sReceiveBuffer[sReceiveHead] = byte;
- sReceiveHead = (sReceiveHead + 1) % UART_RX_BUFFER_SIZE;
-
- otSysEventSignalPending();
- }
- }
-
- if (nrf_uart_event_check(UART_INSTANCE, NRF_UART_EVENT_TXDRDY))
- {
- // Clear TXDRDY event.
- nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_TXDRDY);
-
- // Send any more bytes if available or call application about TX done.
- if (sTransmitLength)
- {
- nrf_uart_txd_set(UART_INSTANCE, *sTransmitBuffer++);
- sTransmitLength--;
- }
- else
- {
- sTransmitDone = true;
- nrf_uart_task_trigger(UART_INSTANCE, NRF_UART_TASK_STOPTX);
-
- otSysEventSignalPending();
- }
- }
-}
-
-#endif // UART_AS_SERIAL_TRANSPORT == 1
-
-/**
- * The UART driver weak functions definition.
- *
- */
-OT_TOOL_WEAK void otPlatUartSendDone(void)
-{
-}
-
-OT_TOOL_WEAK void otPlatUartReceived(const uint8_t *aBuf, uint16_t aBufLength)
-{
- OT_UNUSED_VARIABLE(aBuf);
- OT_UNUSED_VARIABLE(aBufLength);
-}
diff --git a/examples/platforms/nrf52840/DIAG.md b/examples/platforms/nrf52840/DIAG.md
deleted file mode 100644
index 345abac..0000000
--- a/examples/platforms/nrf52840/DIAG.md
+++ /dev/null
@@ -1,154 +0,0 @@
-## Diagnostic module
-
-nRF52840 port extends [OpenThread Diagnostics Module][DIAG].
-
-New commands allow for more accurate low level radio testing.
-
-### New commands
- * [diag ccathreshold](#diag-ccathreshold)
- * [diag gpio](#diag-gpio)
- * [diag id](#diag-id)
- * [diag listen](#diag-listen)
- * [diag temp](#diag-temp)
- * [diag transmit](#diag-transmit)
-
-### Diagnostic radio packet
-[diag listen](#diag-listen) and [diag transmit](#diag-transmit) use radio frame payload specified below.
-
- ```c
- struct PlatformDiagMessage
- {
- const char mMessageDescriptor[11];
- uint8_t mChannel;
- int16_t mID;
- uint32_t mCnt;
- };
- ```
-
-`mMessageDescriptor` is a constant string `"DiagMessage"`.<br />
-`mChannel` contains the channel number on which the packet was transmitted.<br />
-`mID` contains the board ID set with the [diag id](#diag-id) command.<br />
-`mCnt` is a counter incremented every time the board transmits diagnostic radio packet.
-
-If the [listen mode](#diag-listen) is enabled and OpenThread was built with the`DEFAULT_LOGGING` flag, JSON string is printed every time a diagnostic radio packet is received.
-
-```JSON
- {"Frame":{
- "LocalChannel":"<listening board channel>",
- "RemoteChannel":"<mChannel>",
- "CNT":"<mCnt>",
- "LocalID":"<listening board ID>",
- "RemoteID":"<mID>",
- "RSSI":"<packet RSSI>"
- }}
-```
-
-### diag ccathreshold
-Get the current CCA threshold.
-
-### diag ccathreshold \<threshold\>
-Set the CCA threshold.
-
-Value range: 0 to 255.
-
-Default: `45`.
-
-### diag gpio
-Manage GPIO pins.
-
-### diag gpio \<pinnum\>
-Return the current value of the gpio.
-
-Note: \<pinnum\> is an integer that combines port and pin into a single,
-contiguous number space as follows:
-```
- pinnum = (port * 32) + pin
-```
-See also the [`NRF_GPIO_PIN_MAP`](../../../third_party/NordicSemiconductor/hal/nrf_gpio.h) macro.
-
-```bash
-> diag gpio 47
-gpio 47 = 0
-```
-
-### diag gpio out \<pinnum\>
-Set the given GPIO to the output mode.
-```bash
-> diag gpio out 47
-gpio 47: out
-```
-
-### diag gpio in \<pinnum\>
-Sets the given GPIO to the input mode with no pull variant.
-```bash
-> diag gpio in 47
-gpio 47: in no pull
-```
-
-### diag gpio set \<pinnum\>
-Sets the given output gpio to high.
-```bash
-> diag gpio set 47
-gpio 47 = 1
-```
-
-### diag gpio clr \<pinnum\>
-Sets the given output gpio to low.
-```bash
-> diag gpio clr 47
-gpio 47 = 0
-```
-
-### diag id
-Get board ID.
-
-### diag id \<id\>
-Set board ID.
-
-Value range: 0 to 32767.
-
-Default: `-1`.
-
-### diag listen
-Get the listen state.
-
-### diag listen \<listen\>
-Set the listen state.
-
-`0` disables the listen state.<br />
-`1` enables the listen state.
-
-By default, the listen state is disabled.
-
-### diag temp
-Get the temperature from the internal temperature sensor (in degrees Celsius).
-
-### diag transmit
-Get the message count and the interval between the messages that will be transmitted after `diag transmit start`.
-
-### diag transmit interval \<interval\>
-Set the interval in ms between the transmitted messages.
-
-Value range: 1 to 4294967295.
-
-Default: `1`.
-
-### diag transmit count \<count\>
-Set the number of messages to be transmitted.
-
-Value range: 1 to 2147483647<br />
-or<br />
-For continuous transmission: `-1`
-
-Default: `1`
-
-### diag transmit stop
-Stop the ongoing transmission regardless of the remaining number of messages to be sent.
-
-### diag transmit start
-Start transmiting messages with specified interval.
-
-### diag transmit carrier
-Start transmitting continuous carrier wave.
-
-[DIAG]: ./../../../src/core/diags/README.md
diff --git a/examples/platforms/nrf52840/Makefile.am b/examples/platforms/nrf52840/Makefile.am
deleted file mode 100644
index 49dcbed..0000000
--- a/examples/platforms/nrf52840/Makefile.am
+++ /dev/null
@@ -1,182 +0,0 @@
-#
-# Copyright (c) 2016-2017, The OpenThread Authors.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# 1. Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# 3. Neither the name of the copyright holder nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
-# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-
-include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
-
-lib_LIBRARIES = \
- libopenthread-nrf52840.a \
- libopenthread-nrf52840-sdk.a \
- libopenthread-nrf52840-softdevice-sdk.a \
- $(NULL)
-
-# Do not enable -pedantic-errors for nRF52840 driver library
-override CFLAGS := $(filter-out -pedantic-errors,$(CFLAGS))
-override CXXFLAGS := $(filter-out -pedantic-errors,$(CXXFLAGS))
-
-COMMONCPPFLAGS = \
- -DCONFIG_GPIO_AS_PINRESET \
- -DNRF52840_XXAA \
- -I$(top_srcdir)/include \
- -I$(top_srcdir)/examples/platforms \
- -I$(top_srcdir)/src/core \
- -I$(srcdir) \
- -I$(top_srcdir)/third_party/NordicSemiconductor \
- -I$(top_srcdir)/third_party/NordicSemiconductor/cmsis \
- -I$(top_srcdir)/third_party/NordicSemiconductor/dependencies \
- -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/clock \
- -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/common \
- -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio \
- -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/hal \
- -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/mac_features \
- -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/mac_features/ack_generator \
- -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/rsch \
- -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/rsch/raal \
- -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/power \
- -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/systick \
- -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/usbd \
- -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/app_error \
- -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/atfifo \
- -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/atomic \
- -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/delay \
- -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/usb \
- -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/usb/config \
- -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/usb/class/cdc \
- -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/usb/class/cdc/acm \
- -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/utf_converter \
- -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx \
- -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx/hal \
- -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx/drivers \
- -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx/drivers/include \
- -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx/mdk \
- -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx/soc \
- -I$(top_srcdir)/third_party/NordicSemiconductor/softdevice/s140/headers \
- -I$(top_srcdir)/third_party/NordicSemiconductor/softdevice/s140/headers/nrf52 \
- $(NULL)
-
-PLATFORM_COMMON_SOURCES = \
- alarm.c \
- diag.c \
- entropy.c \
- fem.c \
- flash.c \
- logging.c \
- misc.c \
- openthread-core-nrf52840-config.h \
- openthread-core-nrf52840-config-check.h \
- platform-config.h \
- platform-fem.h \
- platform-nrf5.h \
- radio.c \
- temp.c \
- spi-slave.c \
- system.c \
- uart.c \
- usb-cdc-uart.c \
- $(NULL)
-
-SINGLEPHY_SOURCES = \
- flash_nosd.c \
- $(NULL)
-
-SOFTDEVICE_SOURCES = \
- flash_sd.c \
- platform-softdevice.h \
- softdevice.c \
- softdevice.h \
- $(NULL)
-
-SOFTDEVICE_CPPFLAGS = \
- -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/rsch/raal/softdevice \
- -I$(top_srcdir)/third_party/NordicSemiconductor/softdevice/s140/headers \
- -DSOFTDEVICE_PRESENT \
- -DS140 \
- $(NULL)
-
-HWCRYPTO_SOURCES = \
- @top_builddir@/third_party/NordicSemiconductor/libraries/crypto/aes_alt.c \
- @top_builddir@/third_party/NordicSemiconductor/libraries/crypto/aes_alt_cc310.c \
- @top_builddir@/third_party/NordicSemiconductor/libraries/crypto/aes_alt_soft.c \
- @top_builddir@/third_party/NordicSemiconductor/libraries/crypto/cc310_mbedtls.c \
- @top_builddir@/third_party/NordicSemiconductor/libraries/crypto/ecp_alt_cc310.c \
- @top_builddir@/third_party/NordicSemiconductor/libraries/crypto/ecp_curves_alt.c \
- @top_builddir@/third_party/NordicSemiconductor/libraries/crypto/sha256_alt_cc310.c \
- $(NULL)
-
-PLATFORM_SOURCES = \
- $(PLATFORM_COMMON_SOURCES) \
- $(NULL)
-
-libopenthread_nrf52840_a_CPPFLAGS = \
- $(COMMONCPPFLAGS) \
- $(SINGLEPHY_CPPFLAGS) \
- $(NULL)
-
-libopenthread_nrf52840_a_SOURCES = \
- $(PLATFORM_SOURCES) \
- $(SINGLEPHY_SOURCES) \
- $(HWCRYPTO_SOURCES) \
- $(NULL)
-
-libopenthread_nrf52840_sdk_a_CPPFLAGS = \
- $(COMMONCPPFLAGS) \
- $(SINGLEPHY_CPPFLAGS) \
- $(NULL)
-
-libopenthread_nrf52840_sdk_a_SOURCES = \
- $(PLATFORM_SOURCES) \
- $(SINGLEPHY_SOURCES) \
- $(HWCRYPTO_SOURCES) \
- $(NULL)
-
-libopenthread_nrf52840_softdevice_sdk_a_CPPFLAGS = \
- $(COMMONCPPFLAGS) \
- $(SOFTDEVICE_CPPFLAGS) \
- $(NULL)
-
-libopenthread_nrf52840_softdevice_sdk_a_SOURCES = \
- $(PLATFORM_SOURCES) \
- $(SOFTDEVICE_SOURCES) \
- $(HWCRYPTO_SOURCES) \
- $(NULL)
-
-PRETTY_FILES = \
- $(PLATFORM_COMMON_SOURCES) \
- $(NULL)
-
-Dash = -
-
-libopenthread_nrf52840_a_LIBADD = \
- $(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o") \
- $(shell find $(top_builddir)/third_party/jlink/SEGGER_RTT_V640/RTT $(Dash)type f $(Dash)name "*.o")
-
-libopenthread_nrf52840_sdk_a_LIBADD = \
- $(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o")
-
-libopenthread_nrf52840_softdevice_sdk_a_LIBADD = \
- $(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o")
-include $(abs_top_nlbuild_autotools_dir)/automake/post.am
diff --git a/examples/platforms/nrf52840/Makefile.platform.am b/examples/platforms/nrf52840/Makefile.platform.am
deleted file mode 100644
index 325995c..0000000
--- a/examples/platforms/nrf52840/Makefile.platform.am
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# Copyright (c) 2017, The OpenThread Authors.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# 1. Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# 3. Neither the name of the copyright holder nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
-# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-
-#
-# nrf52840 platform-specific Makefile
-#
-
-LDADD_COMMON += \
- $(top_builddir)/examples/platforms/nrf52840/libopenthread-nrf52840.a \
- $(top_builddir)/third_party/NordicSemiconductor/libnordicsemi-nrf52840-sdk.a \
- $(top_builddir)/third_party/NordicSemiconductor/libnordicsemi-nrf52840-radio-driver.a \
- $(top_srcdir)/third_party/NordicSemiconductor/libraries/nrf_cc310/lib/libnrf_cc310_0.9.10.a \
- $(NULL)
-
-if OPENTHREAD_ENABLE_CUSTOM_LINKER_FILE
-LDFLAGS_COMMON += \
- -T $(OPENTHREAD_CUSTOM_LINKER_FILE) \
- $(NULL)
-else
-LDFLAGS_COMMON += \
- -T $(top_srcdir)/examples/platforms/nrf52840/nrf52840.ld \
- $(NULL)
-endif
diff --git a/examples/platforms/nrf52840/README.md b/examples/platforms/nrf52840/README.md
deleted file mode 100644
index 8b71dc0..0000000
--- a/examples/platforms/nrf52840/README.md
+++ /dev/null
@@ -1,435 +0,0 @@
-# OpenThread on nRF52840 Example
-
-<a href="http://threadgroup.org/technology/ourtechnology#certifiedproducts">
-<img src="https://cdn.rawgit.com/openthread/openthread/ab4c4e1e/doc/images/certified.svg" alt="Thread Certified Component" width="150px" align="right">
-</a>
-
-This directory contains example platform drivers for [Nordic Semiconductor nRF52840 SoC][nRF52840]. The OpenThread stack has been officially certified as a *Thread Certified Component* on this platform.
-
-[nRF52840]: https://www.nordicsemi.com/Products/Low-power-short-range-wireless/nRF52840
-
-To facilitate Thread products development with the nRF52840 platform, Nordic Semiconductor provides <i>nRF5 SDK for Thread and Zigbee</i>. See [Nordic Semiconductor's nRF5 SDK for Thread and Zigbee][nRF5-SDK-section] section for more details.
-
-[nRF5-SDK-section]: #nordic-semiconductors-nrf5-sdk-for-thread-and-zigbee
-
-## Prerequisites
-
-Before you start building the examples, you must download and install the toolchain and the tools required for flashing and debugging.
-
-### Toolchain
-
-Download and install the [GNU toolchain for ARM Cortex-M][gnu-toolchain].
-
-[gnu-toolchain]: https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-rm
-
-To install the GNU toolchain and its dependencies, run the following commands in Bash:
-
-```bash
-$ cd <path-to-openthread>
-$ ./script/bootstrap
-```
-
-### Flashing and debugging tools
-
-[nRF5-Command-Line-Tools]: https://www.nordicsemi.com/Software-and-Tools/Development-Tools/nRF5-Command-Line-Tools
-
-Install the [nRF5 Command Line Tools][nRF5-Command-Line-Tools] to flash, debug, and make use of logging features on the nRF52840 DK with SEGGER J-Link.
-
-## Building the examples
-
- To build the examples, run the following command in Bash:
-
-```bash
-$ cd <path-to-openthread>
-$ ./bootstrap
-$ make -f examples/Makefile-nrf52840
-```
-
-After a successful build, the `elf` files can be found in
-`<path-to-openthread>/output/nrf52840/bin`.
-You can convert them to hex using `arm-none-eabi-objcopy`:
-```bash
-$ arm-none-eabi-objcopy -O ihex ot-cli-ftd ot-cli-ftd.hex
-```
-
-### USB CDC ACM support
-
-You can build the libraries with support for the native USB CDC ACM as a serial transport.
-To do so, build the firmware with the following parameter:
-```
-$ make -f examples/Makefile-nrf52840 USB=1
-```
-
-Note that the USB CDC ACM serial transport is not supported with Engineering sample A of the nRF52840 chip.
-
-If you are using Windows 7 or earlier, you must load an additional USB CDC driver.
-The driver can be found in `third_party/NordicSemiconductor/libraries/usb/nordic_cdc_acm_example.inf`.
-
-### nRF52840 dongle support (PCA10059)
-
-You can build the libraries with support for the USB bootloader with USB DFU trigger support in PCA10059. As this dongle uses the native USB support, you must enable it as well.
-
-To build the libraries, run make with the following parameters:
-
-```
-$ make -f examples/Makefile-nrf52840 USB=1 BOOTLOADER=1
-```
-
-See [nRF52840 Dongle Programming][nrf52840-dongle-programming] for more details about how to use the USB bootloader.
-
-[nrf52840-dongle-programming]: https://infocenter.nordicsemi.com/topic/ug_nc_programmer/UG/nrf_connect_programmer/ncp_programming_dongle.html
-
-### Native SPI support
-
-You can build the libraries with support for native SPI Slave.
-To build the libraries, run make with the following parameter:
-
-```
-$ make -f examples/Makefile-nrf52840 NCP_SPI=1
-```
-
-With this option enabled, SPI communication between the NCP example and wpantund is possible
-(provided that the wpantund host supports SPI Master). To achieve that, an appropriate SPI device
-should be chosen in wpantund configuration file, `/etc/wpantund.conf`. You can find an example below.
-```
-Config:NCP:SocketPath "system:/usr/bin/spi-hdlc-adapter --gpio-int /sys/class/gpio/gpio25 /dev/spidev0.0"
-```
-
-In this example, [spi-hdlc-adapter][spi-hdlc-adapter] is a tool that you can use to communicate between NCP and wpantund over SPI. For this example, `spi-hdlc-adapter` is installed in `/usr/bin`.
-
-The default SPI Slave pin configuration for nRF52840 is defined in `examples/platforms/nrf52840/platform-config.h`.
-
-Note that the native SPI Slave support is not intended to be used with Engineering sample A of the nRF52840 chip due to
-single transfer size limitation.
-
-[spi-hdlc-adapter]: https://github.com/openthread/openthread/tree/master/tools/spi-hdlc-adapter
-
-### Optional prefix for compiler command
-
-You can prefix the compiler command using the CCPREFIX parameter. This speeds up the compilation when you use tools like [ccache][ccache-website]. Example usage:
-
-[ccache-website]: https://ccache.samba.org/
-
-```
-$ make -f examples/Makefile-nrf52840 USB=1 CCPREFIX=ccache
-```
-
-### Optional disabling of CryptoCell 310 support
-
-By default, mbedTLS library is built with support for CryptoCell 310 hardware acceleration of cryptographic operations used in OpenThread. You can disable CryptoCell 310 and use software cryptography instead by building OpenThread with the following parameter:
-```
-$ make -f examples/Makefile-nrf52840 DISABLE_CC310=1
-```
-
-### Optional mbedTLS threading support
-By default, mbedTLS library is built without support for multiple threads. You can enable this built-in support by building OpenThread with the following parameter:
-
-```
-$ make -f examples/Makefile-nrf52840 MBEDTLS_THREADING=1
-```
-
-The simple mutex definition is used as shown below:
-
-```
-typedef void * mbedtls_threading_mutex_t;
-```
-
-However, you can modify it, by providing a path to a header file with proper definition. To do that, build OpenThread with the following parameter:
-
-```
-$ make -f examples/Makefile-nrf52840 MBEDTLS_THREADING=1 MBEDTLS_THREADING_MUTEX_DEF="path_to_a_header_file_with_mutex_definition.h"
-```
-
-See [mbedTls Thread Safety and Multi Threading][mbedtls-thread-safety-and-multi-threading] for more details.
-
-Note that as a temporary limitation CryptoCell 310 hardware acceleration is disabled when using mbedTLS threading.
-
-[mbedtls-thread-safety-and-multi-threading]: https://tls.mbed.org/kb/development/thread-safety-and-multi-threading
-
-### IEEE EUI-64 address
-
-When the Thread device is configured to obtain the Thread Network security credentials with either Thread Commissioning or an out-of-band method, the extended MAC address should be constructed out of the globally unique IEEE EUI-64.
-
-The IEEE EUI-64 address consists of two parts:
- - 24 bits of MA-L (MAC Address Block Large), formerly called OUI (Organizationally Unique Identifier)
- - 40-bit device unique identifier
-
-By default, the device uses Nordic Semiconductor's MA-L (f4-ce-36). You can modify it by overwriting the `OPENTHREAD_CONFIG_STACK_VENDOR_OUI` define, located in the `openthread-core-nrf52840-config.h` file. This value must be publicly registered by the IEEE Registration Authority.
-
-You can also provide the full IEEE EUI-64 address by providing a custom `otPlatRadioGetIeeeEui64` function. To do this, define the flag `OPENTHREAD_CONFIG_ENABLE_PLATFORM_EUI64_CUSTOM_SOURCE`.
-
-After the Thread Network security credentials have been successfully obtained, the device uses randomly generated extended MAC address.
-
-## Flashing the binaries
-
-Flash the compiled binaries onto nRF52840 using `nrfjprog` which is
-part of the [nRF5 Command Line Tools][nRF5-Command-Line-Tools].
-
-```bash
-$ nrfjprog -f nrf52 --chiperase --program output/nrf52840/bin/ot-cli-ftd.hex --reset
-```
-
-## Running the example
-
-To test the example:
-
-1. Prepare two boards with the flashed `CLI Example` (as shown above). The CLI FTD example uses the direct UART connection.
-
-2. Open a terminal connection on two boards:
-
- a. Start a terminal emulator like screen.
-
- b. Connect to the used COM port with the following direct UART settings:
-
- * Baud rate: 115200
- * 8 data bits
- * 1 stop bit
- * No parity
- * HW flow control: RTS/CTS
- This allows you to view the raw UART output.
-
- On Linux system a port name should be called e.g. `/dev/ttyACM0` or `/dev/ttyACM1`.
-
- c. Run the following command to connect to a board.
-
- ```shell
- screen /dev/ttyACM0 115200
- ```
-
- Now you are connected with the CLI.
-
-3. Use the following commands to form a network on the first board.
-
- ```bash
- > dataset init new
- Done
- > dataset
- Active Timestamp: 1
- Channel: 13
- Channel Mask: 07fff800
- Ext PAN ID: d63e8e3e495ebbc3
- Mesh Local Prefix: fd3d:b50b:f96d:722d/64
- Master Key: dfd34f0f05cad978ec4e32b0413038ff
- Network Name: OpenThread-8f28
- PAN ID: 0x8f28
- PSKc: c23a76e98f1a6483639b1ac1271e2e27
- Security Policy: 0, onrcb
- Done
- > dataset commit active
- Done
- > ifconfig up
- Done
- > thread start
- Done
- ```
-
- After a couple of seconds the node will become a Leader of the network.
-
- ```bash
- > state
- leader
- ```
-
-4. Use the following commands to attach to the network on the second board.
-
- ```bash
- > dataset masterkey dfd34f0f05cad978ec4e32b0413038ff
- Done
- > dataset commit active
- Done
- > ifconfig up
- Done
- > thread start
- Done
- ```
-
- After a couple of seconds the second node will attach and become a Child.
-
- ```bash
- > state
- child
- ```
-
-5. List all IPv6 addresses of the first board.
-
- ```bash
- > ipaddr
- fd3d:b50b:f96d:722d:0:ff:fe00:fc00
- fd3d:b50b:f96d:722d:0:ff:fe00:c00
- fd3d:b50b:f96d:722d:7a73:bff6:9093:9117
- fe80:0:0:0:6c41:9001:f3d6:4148
- Done
- ```
-
-6. Choose one of them and send an ICMPv6 ping from the second board.
-
- ```bash
- > ping fd3d:b50b:f96d:722d:7a73:bff6:9093:9117
- 16 bytes from fd3d:b50b:f96d:722d:558:f56b:d688:799: icmp_seq=1 hlim=64 time=24ms
- ```
-
-For a list of all available commands, visit [OpenThread CLI Reference README.md][CLI].
-
-[CLI]: ./../../../src/cli/README.md
-
-## SEGGER J-Link tools
-
-SEGGER J-Link tools allow to debug and flash generated firmware using on-board debugger or external one.
-
-### Working with RTT logging
-
-By default, the OpenThread's logging module provides functions to output logging
-information over SEGGER's Real Time Transfer (RTT).
-
-You can set the desired log level by using the `OPENTHREAD_CONFIG_LOG_LEVEL` define.
-
-To enable the highest verbosity level, append `FULL_LOGS` flag to the `make` command:
-```
-$ make -f examples/Makefile-nrf52840 FULL_LOGS=1
-```
-
-#### Enable logging on Windows
-
-1. Connect the DK to your machine with a USB cable.
-2. Run `J-Link RTT Viewer`. The configuration window appears.
-3. From the Specify Target Device dropdown menu, select `NRF52840_XXAA`.
-4. From the Target Interface & Speed dropdown menu, select `SWD`.
-
-#### Enable logging on Linux
-
-1. Connect the DK to your machine with a USB cable.
-2. Run `JLinkExe` to connect to the target. For example:
-```
-JLinkExe -device NRF52840_XXAA -if SWD -speed 4000 -autoconnect 1 -SelectEmuBySN <SEGGER_ID> -RTTTelnetPort 19021
-```
-3. Run `JLinkRTTTelnet` to obtain the RTT logs from the connected device in a separate console. For example:
-```
-JLinkRTTClient -RTTTelnetPort 19021
-```
-
-### Mass Storage Device known issue
-
-Depending on your version, due to a known issue in SEGGER's J-Link firmware, you might experience data corruption or data drops if you use the serial port. You can avoid this issue by disabling the Mass Storage Device.
-
-#### Disabling the Mass Storage Device on Windows
-
-1. Connect the DK to your machine with a USB cable.
-2. Run `J-Link Commander`. The configuration window appears.
-3. From the Specify Target Device dropdown menu, select `NRF52840_XXAA`.
-4. From the Target Interface & Speed dropdown menu, select `SWD`.
-5. Run the following command:
-```
-MSDDisable
-```
-6. Power cycle the DK.
-
-#### Disabling the Mass Storage Device on Linux
-
-1. Connect the DK to your machine with a USB cable.
-2. Run `JLinkExe` to connect to the target. For example:
-```
-JLinkExe -device NRF52840_XXAA -if SWD -speed 4000 -autoconnect 1 -SelectEmuBySN <SEGGER_ID>
-```
-3. Run the following command:
-```
-MSDDisable
-```
-4. Power cycle the DK.
-
-### Hardware Flow Control detection
-
-By default, SEGGER J-Link automatically detects at runtime whether the target is using Hardware Flow Control (HWFC).
-
-The automatic HWFC detection is done by driving P0.07 (Clear to Send - CTS) from the interface MCU and evaluating the state of P0.05 (Request to Send - RTS) when the first data is sent or received. If the state of P0.05 (RTS) is high, it is assumed that HWFC is not used.
-
-To avoid potential race conditions, you can force HWFC and bypass the runtime auto-detection.
-
-#### Disabling the HWFC detection on Windows
-
-1. Connect the DK to your machine with a USB cable.
-2. Run `J-Link Commander`. The configuration window appears.
-3. From the Specify Target Device dropdown menu, select `NRF52840_XXAA`.
-4. From the Target Interface & Speed dropdown menu, select `SWD`.
-5. Run the following command:
-```
-SetHWFC Force
-```
-6. Power cycle the DK.
-
-#### Disabling the HWFC detection on Linux
-
-1. Connect the DK to your machine with a USB cable.
-2. Run `JLinkExe` to connect to the target. For example:
-```
-JLinkExe -device NRF52840_XXAA -if SWD -speed 4000 -autoconnect 1 -SelectEmuBySN <SEGGER_ID>
-```
-3. Run the following command:
-```
-SetHWFC Force
-```
-4. Power cycle the DK.
-
-You can find more details [here][J-Link-OB].
-
-[J-Link-OB]: https://wiki.segger.com/J-Link_OB_SAM3U_NordicSemi#Hardware_flow_control_support
-
-## Diagnostic module
-
-nRF52840 port extends [OpenThread Diagnostics Module][DIAG].
-
-You can read about all the features [here][nRFDIAG].
-
-[DIAG]: ./../../../src/core/diags/README.md
-[nRFDIAG]: DIAG.md
-
-## Radio driver documentation
-
-The radio driver comes with documentation that describes the operation of state
-machines in this module. To open the `*.uml` sequence diagrams, use [PlantUML][PlantUML-url].
-
-[PlantUML-url]: http://plantuml.com/
-
-## Verification
-
-The following development kits have been used for testing and verification:
- - PCA10056 1.0.0
- - PCA10059 1.0.0
- - PCA10068 0.5.0
-
-The following toolchains have been used for testing and verification:
- - GCC: GCC ARM Embedded 7.2018 q2 update
- - IAR: IAR Workbench 7.80.4
- - SES: SES 4.12
- - ARM: MDK-ARM version 5.25
-
- The following OpenThread commits have been verified with nRF52840 and nRF52811 examples by Nordic Semiconductor:
- - `2279ef6` - 23.05.2019 (the latest checked)
- - `23ff101` - 22.03.2019
- - `704511c` - 18.09.2018
- - `ec59d7e` - 06.04.2018
- - `a89eb88` - 16.11.2017
- - `6a15261` - 29.06.2017
- - `030efba` - 22.04.2017
- - `de48acf` - 02.03.2017
- - `50db58d` - 23.01.2017
-
-# Nordic Semiconductor's nRF5 SDK for Thread and Zigbee
-
-Use [nRF5 Software Development Kit (SDK) for Thread and Zigbee][nRF5-SDK-Thread-Zigbee] when developing Thread products with Nordic Semiconductor's advanced nRF52840 or nRF52811 SoCs.
-
-The <i>nRF5 SDK for Thread and Zigbee</i> includes:
- - a pre-built OpenThread stack for the Nordic nRF52840 and nRF52811 SoCs,
- - support for hardware-accelerated cryptographic operations using ARM® CryptoCell-310,
- - unique Thread/Bluetooth Low Energy dynamic multiprotocol solution which allows for concurrent operation of Thread and Bluetooth Low Energy utilizing OpenThread and SoftDevice (Nordic’s Bluetooth Low Energy stack) with accompanying example applications,
- - Thread/Bluetooth Low Energy switched multiprotocol solution with accompanying example applications,
- - unique support for DFU-over-Thread (Device Firmware Upgrade),
- - examples to demonstrate interactions between nodes performing different Thread roles with the use of OpenThread and CoAP, CoAP Secure or MQTT-SN protocols,
- - support for OpenThread Network Co-Processor (NCP) and Radio Co-Processor (RCP) using UART, USB or SPI transport protocol,
- - Border Router and cloud connectivity example (e.g. with Google Cloud Platform),
- - Thread native commissioning with NFC example,
- - example applications demonstrating the use of FreeRTOS with OpenThread,
- - support for IAR, Keil MDK-ARM and SEGGER Embedded Studio (SES) IDEs for OpenThread stack and all example applications,
- - range of PC tools including Thread Topology Monitor and nRF Sniffer for 802.15.4,
- - software modules inherited from the nRF5 SDK e.g. peripheral drivers, NFC libraries, Bluetooth Low Energy libraries etc.
-
-[nRF5-SDK-Thread-Zigbee]: https://www.nordicsemi.com/Software-and-Tools/Software/nRF5-SDK-for-Thread-and-Zigbee
diff --git a/examples/platforms/nrf52840/alarm.c b/examples/platforms/nrf52840/alarm.c
deleted file mode 100644
index 6d94ee6..0000000
--- a/examples/platforms/nrf52840/alarm.c
+++ /dev/null
@@ -1,690 +0,0 @@
-/*
- * Copyright (c) 2016, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This file implements the OpenThread platform abstraction for the alarm.
- *
- */
-
-#include <openthread-core-config.h>
-#include <openthread/config.h>
-
-#include <assert.h>
-#include <stdbool.h>
-#include <stdint.h>
-#include <string.h>
-
-#include <openthread/platform/alarm-micro.h>
-#include <openthread/platform/alarm-milli.h>
-#include <openthread/platform/diag.h>
-#include <openthread/platform/time.h>
-
-#include "openthread-system.h"
-
-#include "platform-config.h"
-#include "platform-nrf5.h"
-#include "cmsis/core_cmFunc.h"
-
-#include <drivers/clock/nrf_drv_clock.h>
-#include <drivers/radio/nrf_802154_utils.h>
-#include <drivers/radio/platform/lp_timer/nrf_802154_lp_timer.h>
-
-#include <hal/nrf_rtc.h>
-
-#include <openthread/config.h>
-
-// clang-format off
-#define RTC_FREQUENCY NRF_802154_RTC_FREQUENCY
-
-#define US_PER_MS 1000ULL
-#define US_PER_S NRF_802154_US_PER_S
-#define US_PER_OVERFLOW (512UL * NRF_802154_US_PER_S) ///< Time that has passed between overflow events. On full RTC speed, it occurs every 512 s.
-
-#define MS_PER_S 1000UL
-
-#define MIN_RTC_COMPARE_EVENT_TICKS 2 ///< Minimum number of RTC ticks delay that guarantees that RTC compare event will fire.
-#define MIN_RTC_COMPARE_EVENT_DT (MIN_RTC_COMPARE_EVENT_TICKS * NRF_802154_US_PER_TICK) ///< Minimum time delta from now before RTC compare event is guaranteed to fire.
-#define EPOCH_32BIT_US (1ULL << 32)
-#define EPOCH_FROM_TIME(time) ((time) & ((uint64_t)UINT32_MAX << 32))
-
-#define XTAL_ACCURACY 40 // The crystal used on nRF52840PDK has ±20ppm accuracy.
-// clang-format on
-
-typedef enum
-{
- kMsTimer,
- kUsTimer,
- k802154Timer,
- k802154Sync,
- kNumTimers
-} AlarmIndex;
-
-typedef struct
-{
- volatile bool mFireAlarm; ///< Information for processing function, that alarm should fire.
- uint64_t mTargetTime; ///< Alarm fire time (in millisecond for MsTimer, in microsecond for UsTimer)
-} AlarmData;
-
-typedef struct
-{
- uint32_t mChannelNumber;
- uint32_t mCompareEventMask;
- nrf_rtc_event_t mCompareEvent;
- nrf_rtc_int_t mCompareInt;
-} AlarmChannelData;
-
-static volatile uint32_t sOverflowCounter; ///< Counter of RTC overflowCounter, incremented by 2 on each OVERFLOW event.
-static volatile uint8_t sMutex; ///< Mutex for write access to @ref sOverflowCounter.
-static volatile uint64_t sTimeOffset = 0; ///< Time overflowCounter to keep track of current time (in millisecond).
-static volatile bool sEventPending; ///< Timer fired and upper layer should be notified.
-static AlarmData sTimerData[kNumTimers]; ///< Data of the timers.
-
-static const AlarmChannelData sChannelData[kNumTimers] = //
- { //
- [kMsTimer] =
- {
- .mChannelNumber = 0,
- .mCompareEventMask = RTC_EVTEN_COMPARE0_Msk,
- .mCompareEvent = NRF_RTC_EVENT_COMPARE_0,
- .mCompareInt = NRF_RTC_INT_COMPARE0_MASK,
- },
- [kUsTimer] =
- {
- .mChannelNumber = 1,
- .mCompareEventMask = RTC_EVTEN_COMPARE1_Msk,
- .mCompareEvent = NRF_RTC_EVENT_COMPARE_1,
- .mCompareInt = NRF_RTC_INT_COMPARE1_MASK,
- },
- [k802154Timer] =
- {
- .mChannelNumber = 2,
- .mCompareEventMask = RTC_EVTEN_COMPARE2_Msk,
- .mCompareEvent = NRF_RTC_EVENT_COMPARE_2,
- .mCompareInt = NRF_RTC_INT_COMPARE2_MASK,
- },
- [k802154Sync] = {
- .mChannelNumber = 3,
- .mCompareEventMask = RTC_EVTEN_COMPARE3_Msk,
- .mCompareEvent = NRF_RTC_EVENT_COMPARE_3,
- .mCompareInt = NRF_RTC_INT_COMPARE3_MASK,
- }};
-
-static inline bool MutexGet(void)
-{
- do
- {
- volatile uint8_t mutexValue = __LDREXB(&sMutex);
-
- if (mutexValue)
- {
- __CLREX();
- return false;
- }
- } while (__STREXB(1, &sMutex));
-
- // Disable OVERFLOW interrupt to prevent lock-up in interrupt context while mutex is locked from lower priority
- // context and OVERFLOW event flag is stil up.
- nrf_rtc_int_disable(RTC_INSTANCE, NRF_RTC_INT_OVERFLOW_MASK);
-
- __DMB();
-
- return true;
-}
-
-static inline void MutexRelease(void)
-{
- // Re-enable OVERFLOW interrupt.
- nrf_rtc_int_enable(RTC_INSTANCE, NRF_RTC_INT_OVERFLOW_MASK);
-
- __DMB();
- sMutex = 0;
-}
-
-static inline uint64_t TimeToTicks(uint64_t aTime, AlarmIndex aIndex)
-{
- if (aIndex == kMsTimer)
- {
- aTime *= US_PER_MS;
- }
-
- return NRF_802154_US_TO_RTC_TICKS(aTime);
-}
-
-static inline uint64_t TicksToTime(uint64_t aTicks, AlarmIndex aIndex)
-{
- uint64_t result = NRF_802154_RTC_TICKS_TO_US(aTicks);
-
- if (aIndex == kMsTimer)
- {
- result /= US_PER_MS;
- }
-
- return result;
-}
-
-static inline bool AlarmShallStrike(uint64_t aNow, AlarmIndex aIndex)
-{
- return aNow >= sTimerData[aIndex].mTargetTime;
-}
-
-static uint32_t GetOverflowCounter(void)
-{
- uint32_t overflowCounter;
-
- // Get mutual access for writing to sOverflowCounter variable.
- if (MutexGet())
- {
- bool increasing = false;
-
- // Check if interrupt was handled already.
- if (nrf_rtc_event_pending(RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW))
- {
- sOverflowCounter++;
- increasing = true;
-
- __DMB();
-
- // Mark that interrupt was handled.
- nrf_rtc_event_clear(RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW);
-
- // Result should be incremented. sOverflowCounter will be incremented after mutex is released.
- }
- else
- {
- // Either overflow handling is not needed OR we acquired the mutex just after it was released.
- // Overflow is handled after mutex is released, but it cannot be assured that sOverflowCounter
- // was incremented for the second time, so we increment the result here.
- }
-
- overflowCounter = (sOverflowCounter + 1) / 2;
-
- MutexRelease();
-
- if (increasing)
- {
- // It's virtually impossible that overflow event is pending again before next instruction is performed. It
- // is an error condition.
- assert(sOverflowCounter & 0x01);
-
- // Increment the counter for the second time, to allow instructions from other context get correct value of
- // the counter.
- sOverflowCounter++;
- }
- }
- else
- {
- // Failed to acquire mutex.
- if (nrf_rtc_event_pending(RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW) || (sOverflowCounter & 0x01))
- {
- // Lower priority context is currently incrementing sOverflowCounter variable.
- overflowCounter = (sOverflowCounter + 2) / 2;
- }
- else
- {
- // Lower priority context has already incremented sOverflowCounter variable or incrementing is not needed
- // now.
- overflowCounter = sOverflowCounter / 2;
- }
- }
-
- return overflowCounter;
-}
-
-static uint32_t GetRtcCounter(void)
-{
- return nrf_rtc_counter_get(RTC_INSTANCE);
-}
-
-static void GetOffsetAndCounter(uint32_t *aOffset, uint32_t *aCounter)
-{
- uint32_t offset1 = GetOverflowCounter();
-
- __DMB();
-
- uint32_t rtcValue1 = GetRtcCounter();
-
- __DMB();
-
- uint32_t offset2 = GetOverflowCounter();
-
- *aOffset = offset2;
- *aCounter = (offset1 == offset2) ? rtcValue1 : GetRtcCounter();
-}
-
-static uint64_t GetTime(uint32_t aOffset, uint32_t aCounter, AlarmIndex aIndex)
-{
- uint64_t result = (uint64_t)aOffset * US_PER_OVERFLOW + TicksToTime(aCounter, kUsTimer);
-
- if (aIndex == kMsTimer)
- {
- result /= US_PER_MS;
- }
-
- return result;
-}
-
-static uint64_t GetCurrentTime(AlarmIndex aIndex)
-{
- uint32_t offset;
- uint32_t rtc_counter;
-
- GetOffsetAndCounter(&offset, &rtc_counter);
-
- return GetTime(offset, rtc_counter, aIndex);
-}
-
-static void HandleCompareMatch(AlarmIndex aIndex, bool aSkipCheck)
-{
- nrf_rtc_event_clear(RTC_INSTANCE, sChannelData[aIndex].mCompareEvent);
-
- uint64_t now = GetCurrentTime(aIndex);
-
- // In case the target time was larger than single overflow,
- // we should only strike the timer on final compare event.
- if (aSkipCheck || AlarmShallStrike(now, aIndex))
- {
- nrf_rtc_event_disable(RTC_INSTANCE, sChannelData[aIndex].mCompareEventMask);
- nrf_rtc_int_disable(RTC_INSTANCE, sChannelData[aIndex].mCompareInt);
-
- switch (aIndex)
- {
- case k802154Timer:
- nrf_802154_lp_timer_fired();
- break;
-
- case k802154Sync:
- nrf_802154_lp_timer_synchronized();
- break;
-
- case kMsTimer:
- case kUsTimer:
- sTimerData[aIndex].mFireAlarm = true;
- sEventPending = true;
- otSysEventSignalPending();
- break;
-
- default:
- assert(false);
- }
- }
-}
-
-static uint64_t ConvertT0AndDtTo64BitTime(uint32_t aT0, uint32_t aDt, const uint64_t *aNow)
-{
- uint64_t now;
- now = *aNow;
-
- if (((uint32_t)now < aT0) && ((aT0 - (uint32_t)now) > (UINT32_MAX / 2)))
- {
- now -= EPOCH_32BIT_US;
- }
- else if (((uint32_t)now > aT0) && (((uint32_t)now) - aT0 > (UINT32_MAX / 2)))
- {
- now += EPOCH_32BIT_US;
- }
-
- return (EPOCH_FROM_TIME(now)) + aT0 + aDt;
-}
-
-static uint64_t RoundUpTimeToTimerTicksMultiply(uint64_t aTime, AlarmIndex aIndex)
-{
- uint64_t ticks = TimeToTicks(aTime, aIndex);
- uint64_t result = TicksToTime(ticks, aIndex);
- return result;
-}
-
-static void TimerStartAt(uint32_t aT0, uint32_t aDt, AlarmIndex aIndex, const uint64_t *aNow)
-{
- uint64_t targetCounter;
- uint64_t targetTime;
-
- nrf_rtc_int_disable(RTC_INSTANCE, sChannelData[aIndex].mCompareInt);
- nrf_rtc_event_enable(RTC_INSTANCE, sChannelData[aIndex].mCompareEventMask);
-
- targetTime = ConvertT0AndDtTo64BitTime(aT0, aDt, aNow);
- targetCounter = TimeToTicks(targetTime, aIndex) & RTC_CC_COMPARE_Msk;
-
- sTimerData[aIndex].mTargetTime = RoundUpTimeToTimerTicksMultiply(targetTime, aIndex);
-
- nrf_rtc_cc_set(RTC_INSTANCE, sChannelData[aIndex].mChannelNumber, targetCounter);
-}
-
-static void AlarmStartAt(uint32_t aT0, uint32_t aDt, AlarmIndex aIndex)
-{
- uint32_t offset;
- uint32_t rtc_value;
- uint64_t now;
- uint64_t now_rtc_protected;
-
- GetOffsetAndCounter(&offset, &rtc_value);
- now = GetTime(offset, rtc_value, aIndex);
-
- TimerStartAt(aT0, aDt, aIndex, &now);
-
- if (rtc_value != GetRtcCounter())
- {
- GetOffsetAndCounter(&offset, &rtc_value);
- }
-
- now_rtc_protected = GetTime(offset, rtc_value + MIN_RTC_COMPARE_EVENT_TICKS, aIndex);
-
- if (AlarmShallStrike(now_rtc_protected, aIndex))
- {
- HandleCompareMatch(aIndex, true);
-
- /**
- * Normally ISR sets event flag automatically.
- * Here we are calling HandleCompareMatch explicitly and no ISR will be fired.
- * To prevent possible permanent sleep on next WFE we have to set event flag.
- */
- __SEV();
- }
- else
- {
- nrf_rtc_int_enable(RTC_INSTANCE, sChannelData[aIndex].mCompareInt);
- }
-}
-
-static void TimerSyncStartAt(uint32_t aT0, uint32_t aDt, const uint64_t *aNow)
-{
- TimerStartAt(aT0, aDt, k802154Sync, aNow);
-
- nrf_rtc_int_enable(RTC_INSTANCE, sChannelData[k802154Sync].mCompareInt);
-}
-
-static void AlarmStop(AlarmIndex aIndex)
-{
- nrf_rtc_event_disable(RTC_INSTANCE, sChannelData[aIndex].mCompareEventMask);
- nrf_rtc_int_disable(RTC_INSTANCE, sChannelData[aIndex].mCompareInt);
- nrf_rtc_event_clear(RTC_INSTANCE, sChannelData[aIndex].mCompareEvent);
-
- sTimerData[aIndex].mFireAlarm = false;
-}
-
-void nrf5AlarmInit(void)
-{
- memset(sTimerData, 0, sizeof(sTimerData));
- sOverflowCounter = 0;
- sMutex = 0;
- sTimeOffset = 0;
-
- // Setup low frequency clock.
- nrf_drv_clock_lfclk_request(NULL);
-
- while (!nrf_drv_clock_lfclk_is_running())
- {
- }
-
- // Setup RTC timer.
- NVIC_SetPriority(RTC_IRQN, RTC_IRQ_PRIORITY);
- NVIC_ClearPendingIRQ(RTC_IRQN);
- NVIC_EnableIRQ(RTC_IRQN);
-
- nrf_rtc_prescaler_set(RTC_INSTANCE, 0);
-
- nrf_rtc_event_clear(RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW);
- nrf_rtc_event_enable(RTC_INSTANCE, RTC_EVTEN_OVRFLW_Msk);
- nrf_rtc_int_enable(RTC_INSTANCE, NRF_RTC_INT_OVERFLOW_MASK);
-
- for (uint32_t i = 0; i < kNumTimers; i++)
- {
- nrf_rtc_event_clear(RTC_INSTANCE, sChannelData[i].mCompareEvent);
- nrf_rtc_event_disable(RTC_INSTANCE, sChannelData[i].mCompareEventMask);
- nrf_rtc_int_disable(RTC_INSTANCE, sChannelData[i].mCompareInt);
- }
-
- nrf_rtc_task_trigger(RTC_INSTANCE, NRF_RTC_TASK_START);
-}
-
-void nrf5AlarmDeinit(void)
-{
- nrf_rtc_task_trigger(RTC_INSTANCE, NRF_RTC_TASK_STOP);
-
- for (uint32_t i = 0; i < kNumTimers; i++)
- {
- nrf_rtc_event_clear(RTC_INSTANCE, sChannelData[i].mCompareEvent);
- nrf_rtc_event_disable(RTC_INSTANCE, sChannelData[i].mCompareEventMask);
- nrf_rtc_int_disable(RTC_INSTANCE, sChannelData[i].mCompareInt);
- }
-
- nrf_rtc_int_disable(RTC_INSTANCE, NRF_RTC_INT_OVERFLOW_MASK);
- nrf_rtc_event_disable(RTC_INSTANCE, RTC_EVTEN_OVRFLW_Msk);
- nrf_rtc_event_clear(RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW);
-
- nrf_802154_lp_timer_sync_stop();
-
- NVIC_DisableIRQ(RTC_IRQN);
- NVIC_ClearPendingIRQ(RTC_IRQN);
- NVIC_SetPriority(RTC_IRQN, 0);
-
- nrf_drv_clock_lfclk_release();
-}
-
-void nrf5AlarmProcess(otInstance *aInstance)
-{
- do
- {
- sEventPending = false;
-
- if (sTimerData[kMsTimer].mFireAlarm)
- {
- sTimerData[kMsTimer].mFireAlarm = false;
-
-#if OPENTHREAD_CONFIG_DIAG_ENABLE
-
- if (otPlatDiagModeGet())
- {
- otPlatDiagAlarmFired(aInstance);
- }
- else
-#endif
- {
- otPlatAlarmMilliFired(aInstance);
- }
- }
-
- if (sTimerData[kUsTimer].mFireAlarm)
- {
- sTimerData[kUsTimer].mFireAlarm = false;
-
- otPlatAlarmMicroFired(aInstance);
- }
- } while (sEventPending);
-}
-
-inline uint64_t nrf5AlarmGetCurrentTime(void)
-{
- return GetCurrentTime(kUsTimer);
-}
-
-uint32_t otPlatAlarmMilliGetNow(void)
-{
- return (uint32_t)(nrf5AlarmGetCurrentTime() / US_PER_MS);
-}
-
-void otPlatAlarmMilliStartAt(otInstance *aInstance, uint32_t aT0, uint32_t aDt)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- AlarmStartAt(aT0, aDt, kMsTimer);
-}
-
-void otPlatAlarmMilliStop(otInstance *aInstance)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- AlarmStop(kMsTimer);
-}
-
-uint32_t otPlatAlarmMicroGetNow(void)
-{
- return (uint32_t)nrf5AlarmGetCurrentTime();
-}
-
-void otPlatAlarmMicroStartAt(otInstance *aInstance, uint32_t aT0, uint32_t aDt)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- AlarmStartAt(aT0, aDt, kUsTimer);
-}
-
-void otPlatAlarmMicroStop(otInstance *aInstance)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- AlarmStop(kUsTimer);
-}
-
-/**
- * Radio driver timer abstraction API
- */
-
-void nrf_802154_lp_timer_init(void)
-{
- // Intentionally empty
-}
-
-void nrf_802154_lp_timer_deinit(void)
-{
- // Intentionally empty
-}
-
-void nrf_802154_lp_timer_critical_section_enter(void)
-{
- nrf_rtc_int_disable(RTC_INSTANCE, sChannelData[k802154Timer].mCompareInt);
- __DSB();
- __ISB();
-}
-
-void nrf_802154_lp_timer_critical_section_exit(void)
-{
- nrf_rtc_int_enable(RTC_INSTANCE, sChannelData[k802154Timer].mCompareInt);
-}
-
-uint32_t nrf_802154_lp_timer_time_get(void)
-{
- return (uint32_t)nrf5AlarmGetCurrentTime();
-}
-
-uint32_t nrf_802154_lp_timer_granularity_get(void)
-{
- return NRF_802154_US_PER_TICK;
-}
-
-void nrf_802154_lp_timer_start(uint32_t t0, uint32_t dt)
-{
- AlarmStartAt(t0, dt, k802154Timer);
-}
-
-bool nrf_802154_lp_timer_is_running(void)
-{
- return nrf_rtc_int_is_enabled(RTC_INSTANCE, sChannelData[k802154Timer].mCompareInt);
-}
-
-void nrf_802154_lp_timer_stop(void)
-{
- AlarmStop(k802154Timer);
-}
-
-void nrf_802154_lp_timer_sync_start_now(void)
-{
- uint32_t counter;
- uint32_t offset;
- uint64_t now;
-
- do
- {
- GetOffsetAndCounter(&offset, &counter);
- now = GetTime(offset, counter, k802154Sync);
- TimerSyncStartAt((uint32_t)now, MIN_RTC_COMPARE_EVENT_DT, &now);
- } while (GetRtcCounter() != counter);
-}
-
-void nrf_802154_lp_timer_sync_start_at(uint32_t t0, uint32_t dt)
-{
- uint64_t now = GetCurrentTime(k802154Sync);
-
- TimerSyncStartAt(t0, dt, &now);
-}
-
-void nrf_802154_lp_timer_sync_stop(void)
-{
- AlarmStop(k802154Sync);
-}
-
-uint32_t nrf_802154_lp_timer_sync_event_get(void)
-{
- return (uint32_t)nrf_rtc_event_address_get(RTC_INSTANCE, sChannelData[k802154Sync].mCompareEvent);
-}
-
-uint32_t nrf_802154_lp_timer_sync_time_get(void)
-{
- return (uint32_t)sTimerData[k802154Sync].mTargetTime;
-}
-
-/**
- * RTC IRQ handler
- */
-
-void RTC_IRQ_HANDLER(void)
-{
- // Handle overflow.
- if (nrf_rtc_event_pending(RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW))
- {
- // Disable OVERFLOW interrupt to prevent lock-up in interrupt context while mutex is locked from lower priority
- // context and OVERFLOW event flag is stil up. OVERFLOW interrupt will be re-enabled when mutex is released -
- // either from this handler, or from lower priority context, that locked the mutex.
- nrf_rtc_int_disable(RTC_INSTANCE, NRF_RTC_INT_OVERFLOW_MASK);
-
- // Handle OVERFLOW event by reading current value of overflow counter.
- (void)GetOverflowCounter();
- }
-
- // Handle compare match.
- for (uint32_t i = 0; i < kNumTimers; i++)
- {
- if (nrf_rtc_int_is_enabled(RTC_INSTANCE, sChannelData[i].mCompareInt) &&
- nrf_rtc_event_pending(RTC_INSTANCE, sChannelData[i].mCompareEvent))
- {
- HandleCompareMatch((AlarmIndex)i, false);
- }
- }
-}
-
-#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
-uint64_t otPlatTimeGet(void)
-{
- return nrf5AlarmGetCurrentTime();
-}
-
-uint16_t otPlatTimeGetXtalAccuracy(void)
-{
- return XTAL_ACCURACY;
-}
-#endif // OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
diff --git a/examples/platforms/nrf52840/diag.c b/examples/platforms/nrf52840/diag.c
deleted file mode 100644
index e76aa1c..0000000
--- a/examples/platforms/nrf52840/diag.c
+++ /dev/null
@@ -1,493 +0,0 @@
-/*
- * Copyright (c) 2016, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <openthread-core-config.h>
-#include <openthread/config.h>
-
-#include <inttypes.h>
-#include <stdbool.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-
-#include "platform-nrf5.h"
-
-#include <hal/nrf_gpio.h>
-
-#include <openthread/cli.h>
-#include <openthread/platform/alarm-milli.h>
-#include <openthread/platform/diag.h>
-#include <openthread/platform/radio.h>
-#include <openthread/platform/toolchain.h>
-
-#include <common/logging.hpp>
-#include <drivers/radio/nrf_802154.h>
-#include <utils/code_utils.h>
-
-typedef enum
-{
- kDiagTransmitModeIdle,
- kDiagTransmitModePackets,
- kDiagTransmitModeCarrier
-} DiagTrasmitMode;
-
-struct PlatformDiagCommand
-{
- const char *mName;
- void (*mCommand)(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen);
-};
-
-struct PlatformDiagMessage
-{
- const char mMessageDescriptor[11];
- uint8_t mChannel;
- int16_t mID;
- uint32_t mCnt;
-};
-
-/**
- * Diagnostics mode variables.
- *
- */
-static bool sDiagMode = false;
-static bool sListen = false;
-static DiagTrasmitMode sTransmitMode = kDiagTransmitModeIdle;
-static uint8_t sChannel = 20;
-static int8_t sTxPower = 0;
-static uint32_t sTxPeriod = 1;
-static int32_t sTxCount = 0;
-static int32_t sTxRequestedCount = 1;
-static int16_t sID = -1;
-static struct PlatformDiagMessage sDiagMessage = {.mMessageDescriptor = "DiagMessage",
- .mChannel = 0,
- .mID = 0,
- .mCnt = 0};
-
-static otError parseLong(char *argv, long *aValue)
-{
- char *endptr;
- *aValue = strtol(argv, &endptr, 0);
- return (*endptr == '\0') ? OT_ERROR_NONE : OT_ERROR_PARSE;
-}
-
-static void appendErrorResult(otError aError, char *aOutput, size_t aOutputMaxLen)
-{
- if (aError != OT_ERROR_NONE)
- {
- snprintf(aOutput, aOutputMaxLen, "failed\r\nstatus %#x\r\n", aError);
- }
-}
-
-static bool startCarrierTransmision(void)
-{
- nrf_802154_channel_set(sChannel);
- nrf_802154_tx_power_set(sTxPower);
-
- return nrf_802154_continuous_carrier();
-}
-
-static void processListen(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- otError error = OT_ERROR_NONE;
-
- otEXPECT_ACTION(otPlatDiagModeGet(), error = OT_ERROR_INVALID_STATE);
-
- if (argc == 0)
- {
- snprintf(aOutput, aOutputMaxLen, "listen: %s\r\n", sListen == true ? "yes" : "no");
- }
- else
- {
- long value;
-
- error = parseLong(argv[0], &value);
- otEXPECT(error == OT_ERROR_NONE);
- sListen = (bool)(value);
- snprintf(aOutput, aOutputMaxLen, "set listen to %s\r\nstatus 0x%02x\r\n", sListen == true ? "yes" : "no",
- error);
- }
-
-exit:
- appendErrorResult(error, aOutput, aOutputMaxLen);
-}
-
-static void processID(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- otError error = OT_ERROR_NONE;
-
- otEXPECT_ACTION(otPlatDiagModeGet(), error = OT_ERROR_INVALID_STATE);
-
- if (argc == 0)
- {
- snprintf(aOutput, aOutputMaxLen, "ID: %" PRId16 "\r\n", sID);
- }
- else
- {
- long value;
-
- error = parseLong(argv[0], &value);
- otEXPECT(error == OT_ERROR_NONE);
- otEXPECT_ACTION(value >= 0, error = OT_ERROR_INVALID_ARGS);
- sID = (int16_t)(value);
- snprintf(aOutput, aOutputMaxLen, "set ID to %" PRId16 "\r\nstatus 0x%02x\r\n", sID, error);
- }
-
-exit:
- appendErrorResult(error, aOutput, aOutputMaxLen);
-}
-
-static void processTransmit(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen)
-{
- otError error = OT_ERROR_NONE;
-
- otEXPECT_ACTION(otPlatDiagModeGet(), error = OT_ERROR_INVALID_STATE);
-
- if (argc == 0)
- {
- snprintf(aOutput, aOutputMaxLen,
- "transmit will send %" PRId32 " diagnostic messages with %" PRIu32 " ms interval\r\nstatus 0x%02x\r\n",
- sTxRequestedCount, sTxPeriod, error);
- }
- else if (strcmp(argv[0], "stop") == 0)
- {
- otEXPECT_ACTION(sTransmitMode != kDiagTransmitModeIdle, error = OT_ERROR_INVALID_STATE);
-
- otPlatAlarmMilliStop(aInstance);
- snprintf(aOutput, aOutputMaxLen, "diagnostic message transmission is stopped\r\nstatus 0x%02x\r\n", error);
- sTransmitMode = kDiagTransmitModeIdle;
- otPlatRadioReceive(aInstance, sChannel);
- }
- else if (strcmp(argv[0], "start") == 0)
- {
- otEXPECT_ACTION(sTransmitMode == kDiagTransmitModeIdle, error = OT_ERROR_INVALID_STATE);
-
- otPlatAlarmMilliStop(aInstance);
- sTransmitMode = kDiagTransmitModePackets;
- sTxCount = sTxRequestedCount;
- uint32_t now = otPlatAlarmMilliGetNow();
- otPlatAlarmMilliStartAt(aInstance, now, sTxPeriod);
- snprintf(aOutput, aOutputMaxLen,
- "sending %" PRId32 " diagnostic messages with %" PRIu32 " ms interval\r\nstatus 0x%02x\r\n",
- sTxRequestedCount, sTxPeriod, error);
- }
- else if (strcmp(argv[0], "carrier") == 0)
- {
- otEXPECT_ACTION(sTransmitMode == kDiagTransmitModeIdle, error = OT_ERROR_INVALID_STATE);
-
- otEXPECT_ACTION(startCarrierTransmision(), error = OT_ERROR_FAILED);
-
- sTransmitMode = kDiagTransmitModeCarrier;
-
- snprintf(aOutput, aOutputMaxLen, "sending carrier on channel %d with tx power %d\r\nstatus 0x%02x\r\n",
- sChannel, sTxPower, error);
- }
- else if (strcmp(argv[0], "interval") == 0)
- {
- long value;
-
- otEXPECT_ACTION(argc == 2, error = OT_ERROR_INVALID_ARGS);
-
- error = parseLong(argv[1], &value);
- otEXPECT(error == OT_ERROR_NONE);
- otEXPECT_ACTION(value > 0, error = OT_ERROR_INVALID_ARGS);
- sTxPeriod = (uint32_t)(value);
- snprintf(aOutput, aOutputMaxLen, "set diagnostic messages interval to %" PRIu32 " ms\r\nstatus 0x%02x\r\n",
- sTxPeriod, error);
- }
- else if (strcmp(argv[0], "count") == 0)
- {
- long value;
-
- otEXPECT_ACTION(argc == 2, error = OT_ERROR_INVALID_ARGS);
-
- error = parseLong(argv[1], &value);
- otEXPECT(error == OT_ERROR_NONE);
- otEXPECT_ACTION((value > 0) || (value == -1), error = OT_ERROR_INVALID_ARGS);
- sTxRequestedCount = (uint32_t)(value);
- snprintf(aOutput, aOutputMaxLen, "set diagnostic messages count to %" PRId32 "\r\nstatus 0x%02x\r\n",
- sTxRequestedCount, error);
- }
- else
- {
- error = OT_ERROR_INVALID_ARGS;
- }
-
-exit:
- appendErrorResult(error, aOutput, aOutputMaxLen);
-}
-
-static void processGpio(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- long pinnum;
- otError error = OT_ERROR_NONE;
-
- otEXPECT_ACTION(otPlatDiagModeGet(), error = OT_ERROR_INVALID_STATE);
-
- if (argc == 1)
- {
- uint32_t value;
-
- error = parseLong(argv[0], &pinnum);
- otEXPECT(error == OT_ERROR_NONE);
-
- value = nrf_gpio_pin_read(pinnum);
-
- snprintf(aOutput, aOutputMaxLen, "gpio %d = %d\r\n", (uint8_t)pinnum, (uint8_t)value);
- }
- else if (strcmp(argv[0], "set") == 0)
- {
- otEXPECT_ACTION(argc == 2, error = OT_ERROR_INVALID_ARGS);
- error = parseLong(argv[1], &pinnum);
- otEXPECT(error == OT_ERROR_NONE);
-
- nrf_gpio_pin_set(pinnum);
-
- snprintf(aOutput, aOutputMaxLen, "gpio %d = 1\r\n", (uint8_t)pinnum);
- }
- else if (strcmp(argv[0], "clr") == 0)
- {
- otEXPECT_ACTION(argc == 2, error = OT_ERROR_INVALID_ARGS);
- error = parseLong(argv[1], &pinnum);
- otEXPECT(error == OT_ERROR_NONE);
-
- nrf_gpio_pin_clear(pinnum);
-
- snprintf(aOutput, aOutputMaxLen, "gpio %d = 0\r\n", (uint8_t)pinnum);
- }
- else if (strcmp(argv[0], "out") == 0)
- {
- otEXPECT_ACTION(argc == 2, error = OT_ERROR_INVALID_ARGS);
- error = parseLong(argv[1], &pinnum);
- otEXPECT(error == OT_ERROR_NONE);
-
- nrf_gpio_cfg_output(pinnum);
-
- snprintf(aOutput, aOutputMaxLen, "gpio %d: out\r\n", (uint8_t)pinnum);
- }
- else if (strcmp(argv[0], "in") == 0)
- {
- otEXPECT_ACTION(argc == 2, error = OT_ERROR_INVALID_ARGS);
- error = parseLong(argv[1], &pinnum);
- otEXPECT(error == OT_ERROR_NONE);
-
- nrf_gpio_cfg_input(pinnum, NRF_GPIO_PIN_NOPULL);
-
- snprintf(aOutput, aOutputMaxLen, "gpio %d: in no pull\r\n", (uint8_t)pinnum);
- }
- else
- {
- error = OT_ERROR_INVALID_ARGS;
- }
-
-exit:
- appendErrorResult(error, aOutput, aOutputMaxLen);
-}
-
-static void processTemp(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen)
-{
- OT_UNUSED_VARIABLE(aInstance);
- OT_UNUSED_VARIABLE(argv);
-
- otError error = OT_ERROR_NONE;
- int32_t temperature;
-
- otEXPECT_ACTION(otPlatDiagModeGet(), error = OT_ERROR_INVALID_STATE);
- otEXPECT_ACTION(argc == 0, error = OT_ERROR_INVALID_ARGS);
-
- temperature = nrf5TempGet();
-
- // Measurement resolution is 0.25 degrees Celsius
- // Convert the temperature measurement to a decimal value, in degrees Celsius
- snprintf(aOutput, aOutputMaxLen, "%" PRId32 ".%02" PRId32 "\r\n", temperature / 4, 25 * (temperature % 4));
-
-exit:
- appendErrorResult(error, aOutput, aOutputMaxLen);
-}
-
-static void processCcaThreshold(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- otError error = OT_ERROR_NONE;
- nrf_802154_cca_cfg_t ccaConfig;
-
- otEXPECT_ACTION(otPlatDiagModeGet(), error = OT_ERROR_INVALID_STATE);
-
- if (argc == 0)
- {
- nrf_802154_cca_cfg_get(&ccaConfig);
-
- snprintf(aOutput, aOutputMaxLen, "cca threshold: %u\r\n", ccaConfig.ed_threshold);
- }
- else
- {
- long value;
- error = parseLong(argv[0], &value);
- otEXPECT(error == OT_ERROR_NONE);
- otEXPECT_ACTION(value >= 0 && value <= 0xFF, error = OT_ERROR_INVALID_ARGS);
-
- memset(&ccaConfig, 0, sizeof(ccaConfig));
- ccaConfig.mode = NRF_RADIO_CCA_MODE_ED;
- ccaConfig.ed_threshold = (uint8_t)value;
-
- nrf_802154_cca_cfg_set(&ccaConfig);
- snprintf(aOutput, aOutputMaxLen, "set cca threshold to %u\r\nstatus 0x%02x\r\n", ccaConfig.ed_threshold, error);
- }
-
-exit:
- appendErrorResult(error, aOutput, aOutputMaxLen);
-}
-
-const struct PlatformDiagCommand sCommands[] = {
- {"ccathreshold", &processCcaThreshold},
- {"gpio", &processGpio},
- {"id", &processID},
- {"listen", &processListen},
- {"temp", &processTemp},
- {"transmit", &processTransmit},
-};
-
-void otPlatDiagProcess(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen)
-{
- size_t i;
-
- for (i = 0; i < otARRAY_LENGTH(sCommands); i++)
- {
- if (strcmp(argv[0], sCommands[i].mName) == 0)
- {
- sCommands[i].mCommand(aInstance, argc - 1, argc > 1 ? &argv[1] : NULL, aOutput, aOutputMaxLen);
- break;
- }
- }
-
- if (i == otARRAY_LENGTH(sCommands))
- {
- snprintf(aOutput, aOutputMaxLen, "diag feature '%s' is not supported\r\n", argv[0]);
- }
-}
-
-void otPlatDiagModeSet(bool aMode)
-{
- sDiagMode = aMode;
-
- if (!sDiagMode)
- {
- otPlatRadioReceive(NULL, sChannel);
- otPlatRadioSleep(NULL);
- }
- else
- {
- // Reinit
- sTransmitMode = kDiagTransmitModeIdle;
- }
-}
-
-bool otPlatDiagModeGet()
-{
- return sDiagMode;
-}
-
-void otPlatDiagChannelSet(uint8_t aChannel)
-{
- sChannel = aChannel;
-}
-
-void otPlatDiagTxPowerSet(int8_t aTxPower)
-{
- sTxPower = aTxPower;
-}
-
-void otPlatDiagRadioReceived(otInstance *aInstance, otRadioFrame *aFrame, otError aError)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- if (sListen && (aError == OT_ERROR_NONE))
- {
- if (aFrame->mLength == sizeof(struct PlatformDiagMessage))
- {
- struct PlatformDiagMessage *message = (struct PlatformDiagMessage *)aFrame->mPsdu;
-
- if (strncmp(message->mMessageDescriptor, "DiagMessage", 11) == 0)
- {
- otPlatLog(OT_LOG_LEVEL_DEBG, OT_LOG_REGION_PLATFORM,
- "{\"Frame\":{"
- "\"LocalChannel\":%u ,"
- "\"RemoteChannel\":%u,"
- "\"CNT\":%" PRIu32 ","
- "\"LocalID\":%" PRId16 ","
- "\"RemoteID\":%" PRId16 ","
- "\"RSSI\":%d"
- "}}\r\n",
- aFrame->mChannel, message->mChannel, message->mCnt, sID, message->mID,
- aFrame->mInfo.mRxInfo.mRssi);
- }
- }
- }
-}
-
-void otPlatDiagAlarmCallback(otInstance *aInstance)
-{
- if (sTransmitMode == kDiagTransmitModePackets)
- {
- if ((sTxCount > 0) || (sTxCount == -1))
- {
- otRadioFrame *sTxPacket = otPlatRadioGetTransmitBuffer(aInstance);
-
- sTxPacket->mLength = sizeof(struct PlatformDiagMessage);
- sTxPacket->mChannel = sChannel;
-
- sDiagMessage.mChannel = sTxPacket->mChannel;
- sDiagMessage.mID = sID;
-
- memcpy(sTxPacket->mPsdu, &sDiagMessage, sizeof(struct PlatformDiagMessage));
- otPlatRadioTransmit(aInstance, sTxPacket);
-
- sDiagMessage.mCnt++;
-
- if (sTxCount != -1)
- {
- sTxCount--;
- }
-
- uint32_t now = otPlatAlarmMilliGetNow();
- otPlatAlarmMilliStartAt(aInstance, now, sTxPeriod);
- }
- else
- {
- sTransmitMode = kDiagTransmitModeIdle;
- otPlatAlarmMilliStop(aInstance);
- otPlatLog(OT_LOG_LEVEL_DEBG, OT_LOG_REGION_PLATFORM, "Transmit done");
- }
- }
-}
diff --git a/examples/platforms/nrf52840/fem.c b/examples/platforms/nrf52840/fem.c
deleted file mode 100644
index da3002c..0000000
--- a/examples/platforms/nrf52840/fem.c
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * Copyright (c) 2017, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This file implements the OpenThread FEM helper functions.
- *
- */
-
-#include <openthread-core-config.h>
-#include <openthread/config.h>
-
-#include <stdint.h>
-#include <string.h>
-
-#include "platform-fem.h"
-
-#define ENABLE_FEM 1
-#include <nrf_802154.h>
-
-void PlatformFemSetConfigParams(const PlatformFemConfigParams *aConfig)
-{
- nrf_802154_fem_control_cfg_t cfg;
-
- memset(&cfg, 0, sizeof(cfg));
-
- cfg.pa_cfg.enable = aConfig->mPaCfg.mEnable;
- cfg.pa_cfg.active_high = aConfig->mPaCfg.mActiveHigh;
- cfg.pa_cfg.gpio_pin = aConfig->mPaCfg.mGpioPin;
- cfg.lna_cfg.enable = aConfig->mLnaCfg.mEnable;
- cfg.lna_cfg.active_high = aConfig->mLnaCfg.mActiveHigh;
- cfg.lna_cfg.gpio_pin = aConfig->mLnaCfg.mGpioPin;
- cfg.ppi_ch_id_clr = aConfig->mPpiChIdClr;
- cfg.ppi_ch_id_set = aConfig->mPpiChIdSet;
- cfg.pa_gpiote_ch_id = aConfig->mGpiotePaChId;
- cfg.lna_gpiote_ch_id = aConfig->mGpioteLnaChId;
-
- nrf_802154_fem_control_cfg_set(&cfg);
-}
diff --git a/examples/platforms/nrf52840/flash_nosd.c b/examples/platforms/nrf52840/flash_nosd.c
deleted file mode 100644
index 4e9b1f1..0000000
--- a/examples/platforms/nrf52840/flash_nosd.c
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * Copyright (c) 2017, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <openthread/config.h>
-#include <openthread-core-config.h>
-
-#include <stdint.h>
-#include <string.h>
-#include <assert.h>
-
-#include <utils/code_utils.h>
-#include <utils/flash.h>
-
-#include "hal/nrf_nvmc.h"
-#include "platform-nrf5.h"
-
-otError nrf5FlashPageErase(uint32_t aAddress)
-{
- nrf_nvmc_page_erase(aAddress);
-
- return OT_ERROR_NONE;
-}
-
-bool nrf5FlashIsBusy(void)
-{
- return NRF_NVMC->READY != NVMC_READY_READY_Ready;
-}
-
-uint32_t nrf5FlashWrite(uint32_t aAddress, const uint8_t *aData, uint32_t aSize)
-{
- nrf_nvmc_write_bytes(aAddress, aData, aSize);
- return aSize;
-}
diff --git a/examples/platforms/nrf52840/flash_sd.c b/examples/platforms/nrf52840/flash_sd.c
deleted file mode 100644
index 580b356..0000000
--- a/examples/platforms/nrf52840/flash_sd.c
+++ /dev/null
@@ -1,273 +0,0 @@
-/*
- * Copyright (c) 2017, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <openthread/config.h>
-#include <openthread-core-config.h>
-
-#include <stdint.h>
-#include <string.h>
-#include <assert.h>
-
-#include <openthread/platform/alarm-milli.h>
-
-#include <utils/code_utils.h>
-#include <utils/flash.h>
-
-#include "platform-nrf5.h"
-#include "softdevice.h"
-
-#define FLASH_PAGE_SIZE 4096
-#define FLASH_TIMEOUT 500
-
-typedef enum {
- FLASH_STATE_IDLE,
- FLASH_STATE_WAITING_FOR_IDLE,
- FLASH_STATE_PENDING,
- FLASH_STATE_COMPLETE_SUCCESS,
- FLASH_STATE_COMPLETE_FAILED
-} SdFlashState;
-
-static volatile SdFlashState sState;
-
-void nrf5SdSocFlashProcess(uint32_t aEvtId)
-{
- switch (aEvtId)
- {
- case NRF_EVT_FLASH_OPERATION_SUCCESS:
- switch (sState)
- {
- case FLASH_STATE_PENDING:
- sState = FLASH_STATE_COMPLETE_SUCCESS;
- break;
-
- case FLASH_STATE_WAITING_FOR_IDLE:
- sState = FLASH_STATE_IDLE;
- break;
-
- default:
- break;
- }
-
- break;
-
- case NRF_EVT_FLASH_OPERATION_ERROR:
- switch (sState)
- {
- case FLASH_STATE_PENDING:
- sState = FLASH_STATE_COMPLETE_FAILED;
- break;
-
- case FLASH_STATE_WAITING_FOR_IDLE:
- sState = FLASH_STATE_IDLE;
- break;
-
- default:
- break;
- }
-
- break;
-
- default:
- break;
- }
-}
-
-static void waitInState(SdFlashState state)
-{
- uint32_t startTime = otPlatAlarmMilliGetNow();
-
- do
- {
- nrf_sdh_evts_poll();
-
- if (sState != state)
- {
- break;
- }
- }
- while (otPlatAlarmMilliGetNow() - startTime < FLASH_TIMEOUT);
-}
-
-static otError sdFlashSingleWrite(uint32_t aAddress, const uint8_t *aData, uint32_t aSize)
-{
- uint32_t retval;
-
- nrf_sdh_suspend();
-
- do
- {
- sState = FLASH_STATE_PENDING;
-
- retval = sd_flash_write((uint32_t *)aAddress, (uint32_t *)aData, aSize);
-
- if (retval == NRF_SUCCESS)
- {
- break;
- }
- else if (retval == NRF_ERROR_BUSY)
- {
- sState = FLASH_STATE_WAITING_FOR_IDLE;
- }
- else
- {
- assert(false);
- }
-
- waitInState(FLASH_STATE_WAITING_FOR_IDLE);
-
- } while (retval == NRF_ERROR_BUSY);
-
- waitInState(FLASH_STATE_PENDING);
-
- if (sState != FLASH_STATE_COMPLETE_SUCCESS)
- {
- retval = NRF_ERROR_INTERNAL;
- }
-
- sState = FLASH_STATE_IDLE;
-
- nrf_sdh_resume();
-
- return nrf5SdErrorToOtError(retval);
-}
-
-otError nrf5FlashPageErase(uint32_t aAddress)
-{
- uint32_t retval;
-
- nrf_sdh_suspend();
-
- do
- {
- sState = FLASH_STATE_PENDING;
-
- retval = sd_flash_page_erase(aAddress / FLASH_PAGE_SIZE);
-
- if (retval == NRF_SUCCESS)
- {
- break;
- }
- else if (retval == NRF_ERROR_BUSY)
- {
- sState = FLASH_STATE_WAITING_FOR_IDLE;
- }
- else
- {
- assert(false);
- }
-
- waitInState(FLASH_STATE_WAITING_FOR_IDLE);
-
- } while (retval == NRF_ERROR_BUSY);
-
- waitInState(FLASH_STATE_PENDING);
-
- if (sState != FLASH_STATE_COMPLETE_SUCCESS)
- {
- retval = NRF_ERROR_INTERNAL;
- }
-
- sState = FLASH_STATE_IDLE;
-
- nrf_sdh_resume();
-
- return nrf5SdErrorToOtError(retval);
-}
-
-bool nrf5FlashIsBusy(void)
-{
- return sState != FLASH_STATE_IDLE;
-}
-
-uint32_t nrf5FlashWrite(uint32_t aAddress, const uint8_t *aData, uint32_t aSize)
-{
- otError error = OT_ERROR_NONE;
- uint32_t result = 0;
- uint32_t remainder = (aAddress % sizeof(uint32_t));
- uint32_t blockSize;
- uint32_t blockValue;
-
- otEXPECT(sState == FLASH_STATE_IDLE);
-
- // Check if @p aAddress is aligned to full word size. If not, make additional
- // flash write at the beginning.
- if (remainder)
- {
- blockSize = MIN((sizeof(uint32_t) - remainder), aSize);
- blockValue = 0xffffffff;
-
- memcpy((uint8_t *)&blockValue + remainder, aData, blockSize);
-
- error = sdFlashSingleWrite(aAddress - remainder,
- (uint8_t *)&blockValue,
- sizeof(blockValue) / sizeof(uint32_t));
-
- otEXPECT(error == OT_ERROR_NONE);
-
- aAddress += blockSize;
- aData += blockSize;
- aSize -= blockSize;
- result += blockSize;
- }
-
- otEXPECT(aSize);
-
- // Store the middle block of data.
- remainder = aSize % sizeof(uint32_t);
- blockSize = aSize - remainder;
-
- error = sdFlashSingleWrite(aAddress,
- aData,
- blockSize / sizeof(uint32_t));
-
- otEXPECT(error == OT_ERROR_NONE);
-
- aAddress += blockSize;
- aData += blockSize;
- aSize -= blockSize;
- result += blockSize;
-
- // Store any additional bytes that didn't fit into middle block.
- if (remainder)
- {
- blockValue = 0xffffffff;
-
- memcpy((uint8_t *)&blockValue, aData, remainder);
-
- error = sdFlashSingleWrite(aAddress,
- (uint8_t *)&blockValue,
- sizeof(blockValue) / sizeof(uint32_t));
-
- otEXPECT(error == OT_ERROR_NONE);
-
- result += remainder;
- }
-
-exit:
- return result;
-}
diff --git a/examples/platforms/nrf52840/misc.c b/examples/platforms/nrf52840/misc.c
deleted file mode 100644
index 4d57bf4..0000000
--- a/examples/platforms/nrf52840/misc.c
+++ /dev/null
@@ -1,122 +0,0 @@
-/*
- * Copyright (c) 2016, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <openthread-core-config.h>
-#include <openthread/config.h>
-#include <openthread/platform/misc.h>
-
-#include <nrf.h>
-
-#include "platform-nrf5.h"
-
-#if SOFTDEVICE_PRESENT
-#include "softdevice.h"
-#endif
-
-static uint32_t sResetReason;
-
-bool gPlatformPseudoResetWasRequested;
-
-__WEAK void nrf5CryptoInit(void)
-{
- // This function is defined as weak so it could be overridden with external implementation.
-}
-
-__WEAK void nrf5CryptoDeinit(void)
-{
- // This function is defined as weak so it could be overridden with external implementation.
-}
-
-void nrf5MiscInit(void)
-{
-#if SOFTDEVICE_PRESENT
- sd_power_reset_reason_get(&sResetReason);
- sd_power_reset_reason_clr(0xFFFFFFFF);
-#else
- sResetReason = NRF_POWER->RESETREAS;
- NRF_POWER->RESETREAS = 0xFFFFFFFF;
-#endif // SOFTDEVICE_PRESENT
-}
-
-void nrf5MiscDeinit(void)
-{
- // Intentionally empty.
-}
-
-void otPlatReset(otInstance *aInstance)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
-#if OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
- gPlatformPseudoResetWasRequested = true;
- sResetReason = POWER_RESETREAS_SREQ_Msk;
-#else // if OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
- NVIC_SystemReset();
-#endif // else OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
-}
-
-otPlatResetReason otPlatGetResetReason(otInstance *aInstance)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- otPlatResetReason reason;
-
- if (sResetReason & POWER_RESETREAS_RESETPIN_Msk)
- {
- reason = OT_PLAT_RESET_REASON_EXTERNAL;
- }
- else if (sResetReason & POWER_RESETREAS_DOG_Msk)
- {
- reason = OT_PLAT_RESET_REASON_WATCHDOG;
- }
- else if (sResetReason & POWER_RESETREAS_SREQ_Msk)
- {
- reason = OT_PLAT_RESET_REASON_SOFTWARE;
- }
- else if (sResetReason & POWER_RESETREAS_LOCKUP_Msk)
- {
- reason = OT_PLAT_RESET_REASON_FAULT;
- }
- else if ((sResetReason & POWER_RESETREAS_OFF_Msk) || (sResetReason & POWER_RESETREAS_LPCOMP_Msk) ||
- (sResetReason & POWER_RESETREAS_DIF_Msk) || (sResetReason & POWER_RESETREAS_NFC_Msk) ||
- (sResetReason & POWER_RESETREAS_VBUS_Msk))
- {
- reason = OT_PLAT_RESET_REASON_OTHER;
- }
- else
- {
- reason = OT_PLAT_RESET_REASON_POWER_ON;
- }
-
- return reason;
-}
-
-void otPlatWakeHost(void)
-{
- // TODO: implement an operation to wake the host from sleep state.
-}
diff --git a/examples/platforms/nrf52840/nrf52840_bootloader.ld b/examples/platforms/nrf52840/nrf52840_bootloader.ld
deleted file mode 100644
index 380a1a9..0000000
--- a/examples/platforms/nrf52840/nrf52840_bootloader.ld
+++ /dev/null
@@ -1,168 +0,0 @@
-/*
- * Copyright (c) 2018, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * GCC linker script for nRF52840 with USB bootloader.
- */
-
-SEARCH_DIR(.)
-GROUP(-lgcc -lc -lnosys)
-
-MEMORY
-{
- FLASH (rx) : ORIGIN = 0x00001000, LENGTH = 0xdf000
- RAM (rwx) : ORIGIN = 0x20000008, LENGTH = 0x3fff8
-}
-
-OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
-
-ENTRY(Reset_Handler)
-
-FLASH_PAGE_SIZE = 4096;
-FLASH_DATA_PAGES_USED = 4;
-
-SECTIONS
-{
- .text :
- {
- KEEP(*(.isr_vector))
- *(.text*)
-
- KEEP(*(.init))
- KEEP(*(.fini))
-
- /* .ctors */
- *crtbegin.o(.ctors)
- *crtbegin?.o(.ctors)
- *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
- *(SORT(.ctors.*))
- *(.ctors)
-
- /* .dtors */
- *crtbegin.o(.dtors)
- *crtbegin?.o(.dtors)
- *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
- *(SORT(.dtors.*))
- *(.dtors)
-
- *(.rodata*)
-
- KEEP(*(.eh_frame*))
- } > FLASH
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > FLASH
-
- __exidx_start = .;
- .ARM.exidx :
- {
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- } > FLASH
- __exidx_end = .;
-
- __etext = .;
-
- .data : AT (__etext)
- {
- __data_start__ = .;
- *(vtable)
- *(.data*)
-
- . = ALIGN(4);
- /* preinit data */
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP(*(.preinit_array))
- PROVIDE_HIDDEN (__preinit_array_end = .);
-
- . = ALIGN(4);
- /* init data */
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE_HIDDEN (__init_array_end = .);
-
-
- . = ALIGN(4);
- /* finit data */
- PROVIDE_HIDDEN (__fini_array_start = .);
- KEEP(*(SORT(.fini_array.*)))
- KEEP(*(.fini_array))
- PROVIDE_HIDDEN (__fini_array_end = .);
-
- KEEP(*(.jcr*))
- . = ALIGN(4);
- /* All data end */
- __data_end__ = .;
-
- } > RAM
-
- .bss :
- {
- . = ALIGN(4);
- __bss_start__ = .;
- *(.bss*)
- *(COMMON)
- . = ALIGN(4);
- __bss_end__ = .;
- } > RAM
-
- .heap (COPY):
- {
- __HeapBase = .;
- __end__ = .;
- PROVIDE(end = .);
- KEEP(*(.heap*))
- __HeapLimit = .;
- } > RAM
-
- /* .stack_dummy section doesn't contains any symbols. It is only
- * used for linker to calculate size of stack sections, and assign
- * values to stack symbols later */
- .stack_dummy (COPY):
- {
- KEEP(*(.stack*))
- } > RAM
-
- __stop_ot_flash_data = (ORIGIN(FLASH) + LENGTH(FLASH));
- __start_ot_flash_data = (__stop_ot_flash_data - (FLASH_PAGE_SIZE * FLASH_DATA_PAGES_USED));
-
- /* Assure that code does not overlap flash data area.*/
- ASSERT((__start_ot_flash_data >= __etext + SIZEOF(.data)), "Error: Code overlaps flash data area.")
-
- /* Set stack top to end of RAM, and stack limit move down by
- * size of stack_dummy section */
- __StackTop = ORIGIN(RAM) + LENGTH(RAM);
- __StackLimit = __StackTop - SIZEOF(.stack_dummy);
- PROVIDE(__stack = __StackTop);
-
- /* Check if data + heap + stack exceeds RAM limit */
- ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
-}
diff --git a/examples/platforms/nrf52840/openthread-core-nrf52840-config.h b/examples/platforms/nrf52840/openthread-core-nrf52840-config.h
deleted file mode 100644
index abb3b41..0000000
--- a/examples/platforms/nrf52840/openthread-core-nrf52840-config.h
+++ /dev/null
@@ -1,267 +0,0 @@
-/*
- * Copyright (c) 2016, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This file includes nrf52840 compile-time configuration constants
- * for OpenThread.
- */
-
-#ifndef OPENTHREAD_CORE_NRF52840_CONFIG_H_
-#define OPENTHREAD_CORE_NRF52840_CONFIG_H_
-
-/*
- * The GNU Autoconf system defines a PACKAGE macro which is the name
- * of the software package. This name collides with PACKAGE field in
- * the nRF52 Factory Information Configuration Registers (FICR)
- * structure.
- */
-#undef PACKAGE
-
-/**
- * @def OPENTHREAD_CONFIG_LOG_OUTPUT
- *
- * The nrf52840 platform provides an otPlatLog() function.
- */
-#ifndef OPENTHREAD_CONFIG_LOG_OUTPUT
-#define OPENTHREAD_CONFIG_LOG_OUTPUT OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_PLATFORM_INFO
- *
- * The platform-specific string to insert into the OpenThread version string.
- *
- */
-#ifndef OPENTHREAD_CONFIG_PLATFORM_INFO
-#define OPENTHREAD_CONFIG_PLATFORM_INFO "NRF52840"
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_STACK_VENDOR_OUI
- *
- * The Organizationally Unique Identifier for the vendor.
- *
- */
-#ifndef OPENTHREAD_CONFIG_STACK_VENDOR_OUI
-#define OPENTHREAD_CONFIG_STACK_VENDOR_OUI 0xf4ce36
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_MLE_MAX_CHILDREN
- *
- * The maximum number of children.
- *
- */
-#ifndef OPENTHREAD_CONFIG_MLE_MAX_CHILDREN
-#define OPENTHREAD_CONFIG_MLE_MAX_CHILDREN 32
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_NUM_MESSAGE_BUFFERS
- *
- * The number of message buffers in the buffer pool.
- *
- */
-#ifndef OPENTHREAD_CONFIG_NUM_MESSAGE_BUFFERS
-#define OPENTHREAD_CONFIG_NUM_MESSAGE_BUFFERS 160
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD
- *
- * The maximum number of supported IPv6 address registrations per child.
- *
- */
-#ifndef OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD
-#define OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD 6
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_MAX_STATECHANGE_HANDLERS
- *
- * The maximum number of state-changed callback handlers (set using `otSetStateChangedCallback()`).
- *
- */
-#ifndef OPENTHREAD_CONFIG_MAX_STATECHANGE_HANDLERS
-#define OPENTHREAD_CONFIG_MAX_STATECHANGE_HANDLERS 3
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_TMF_ADDRESS_CACHE_ENTRIES
- *
- * The number of EID-to-RLOC cache entries.
- *
- */
-#ifndef OPENTHREAD_CONFIG_TMF_ADDRESS_CACHE_ENTRIES
-#define OPENTHREAD_CONFIG_TMF_ADDRESS_CACHE_ENTRIES 32
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_LOG_PREPREND_LEVEL
- *
- * Define to prepend the log level to all log messages
- *
- */
-#ifndef OPENTHREAD_CONFIG_LOG_PREPEND_LEVEL
-#define OPENTHREAD_CONFIG_LOG_PREPEND_LEVEL 0
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_SOFTWARE_ACK_TIMEOUT_ENABLE
- *
- * Define to 1 if you want to enable software ACK timeout logic.
- *
- */
-#ifndef OPENTHREAD_CONFIG_SOFTWARE_ACK_TIMEOUT_ENABLE
-#define OPENTHREAD_CONFIG_SOFTWARE_ACK_TIMEOUT_ENABLE 0
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_SOFTWARE_RETRANSMIT_ENABLE
- *
- * Define to 1 if you want to enable software retransmission logic.
- *
- */
-#ifndef OPENTHREAD_CONFIG_SOFTWARE_RETRANSMIT_ENABLE
-#define OPENTHREAD_CONFIG_SOFTWARE_RETRANSMIT_ENABLE 1
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_SOFTWARE_CSMA_BACKOFF_ENABLE
- *
- * Define to 1 if you want to enable software CSMA-CA backoff logic.
- *
- */
-#ifndef OPENTHREAD_CONFIG_SOFTWARE_CSMA_BACKOFF_ENABLE
-#define OPENTHREAD_CONFIG_SOFTWARE_CSMA_BACKOFF_ENABLE 0
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_PLATFORM_USEC_TIMER_ENABLE
- *
- * Define to 1 if you want to support microsecond timer in platform.
- *
- */
-#ifndef OPENTHREAD_CONFIG_PLATFORM_USEC_TIMER_ENABLE
-#define OPENTHREAD_CONFIG_PLATFORM_USEC_TIMER_ENABLE 1
-#endif
-
-/**
- * @def SETTINGS_CONFIG_BASE_ADDRESS
- *
- * The base address of settings.
- *
- */
-#ifndef SETTINGS_CONFIG_BASE_ADDRESS
-#define SETTINGS_CONFIG_BASE_ADDRESS 0
-#endif
-
-/**
- * @def SETTINGS_CONFIG_PAGE_SIZE
- *
- * The page size of settings.
- *
- */
-#ifndef SETTINGS_CONFIG_PAGE_SIZE
-#define SETTINGS_CONFIG_PAGE_SIZE 4096
-#endif
-
-/**
- * @def SETTINGS_CONFIG_PAGE_NUM
- *
- * The page number of settings.
- *
- */
-#ifndef SETTINGS_CONFIG_PAGE_NUM
-#define SETTINGS_CONFIG_PAGE_NUM 4
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE
- *
- * The size of heap buffer when DTLS is enabled.
- *
- */
-#ifndef OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE
-#define OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE (4096 * sizeof(void *))
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE_NO_DTLS
- *
- * The size of heap buffer when DTLS is disabled.
- *
- */
-#ifndef OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE_NO_DTLS
-#define OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE_NO_DTLS 2048
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
- *
- * Define as 1 to enable the time synchronization service feature.
- *
- */
-#ifndef OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
-#define OPENTHREAD_CONFIG_TIME_SYNC_ENABLE 0
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_CLI_TX_BUFFER_SIZE
- *
- * The size of CLI message buffer in bytes
- *
- */
-#ifndef OPENTHREAD_CONFIG_CLI_UART_TX_BUFFER_SIZE
-#define OPENTHREAD_CONFIG_CLI_UART_TX_BUFFER_SIZE 2048
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
- *
- * Define as 1 to support IEEE 802.15.4-2015 Header IE (Information Element) generation and parsing, it must be set
- * to support following features:
- * 1. Time synchronization service feature (i.e., OPENTHREAD_CONFIG_TIME_SYNC_ENABLE is set).
- *
- * @note If it's enabled, plaforms must support interrupt context and concurrent access AES.
- *
- */
-#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
-#define OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT 1
-#endif
-
-/*
- * Suppress the ARMCC warning on unreachable statement,
- * e.g. break after assert(false) or ExitNow() macro.
- */
-#if defined(__CC_ARM)
-_Pragma("diag_suppress=111") _Pragma("diag_suppress=128")
-#endif
-
-#endif // OPENTHREAD_CORE_NRF52840_CONFIG_H_
diff --git a/examples/platforms/nrf52840/platform-config.h b/examples/platforms/nrf52840/platform-config.h
deleted file mode 100644
index 2c03707..0000000
--- a/examples/platforms/nrf52840/platform-config.h
+++ /dev/null
@@ -1,467 +0,0 @@
-/*
- * Copyright (c) 2016, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This file includes the platform-specific configuration.
- *
- */
-
-#ifndef PLATFORM_CONFIG_H_
-#define PLATFORM_CONFIG_H_
-
-#include "nrf.h"
-#include "nrf_peripherals.h"
-#include "drivers/clock/nrf_drv_clock.h"
-#include "hal/nrf_radio.h"
-#include "hal/nrf_uart.h"
-
-#include "openthread-core-config.h"
-#include <openthread/config.h>
-
-/*******************************************************************************
- * @section UART Driver Configuration.
- ******************************************************************************/
-
-/**
- * @def UART_INSTANCE
- *
- * UART Instance.
- *
- */
-#ifndef UART_INSTANCE
-#define UART_INSTANCE NRF_UART0
-#endif
-
-/**
- * @def UART_PARITY
- *
- * UART Parity configuration.
- *
- * @brief Possible values:
- * \ref NRF_UART_PARITY_EXCLUDED - Parity bit is not present.
- * \ref NRF_UART_PARITY_INCLUDED - Parity bit is present.
- *
- */
-#ifndef UART_PARITY
-#define UART_PARITY NRF_UART_PARITY_EXCLUDED
-#endif
-
-/**
- * @def UART_HWFC_ENABLED
- *
- * Enable UART Hardware Flow Control.
- *
- */
-#ifndef UART_HWFC_ENABLED
-#define UART_HWFC_ENABLED 1
-#endif
-
-/**
- * @def UART_BAUDRATE
- *
- * UART Baudrate.
- *
- * @brief Possible values:
- * \ref NRF_UART_BAUDRATE_1200 - 1200 baud.
- * \ref NRF_UART_BAUDRATE_2400 - 2400 baud.
- * \ref NRF_UART_BAUDRATE_4800 - 4800 baud.
- * \ref NRF_UART_BAUDRATE_9600 - 9600 baud.
- * \ref NRF_UART_BAUDRATE_14400 - 14400 baud.
- * \ref NRF_UART_BAUDRATE_19200 - 19200 baud.
- * \ref NRF_UART_BAUDRATE_28800 - 28800 baud.
- * \ref NRF_UART_BAUDRATE_38400 - 38400 baud.
- * \ref NRF_UART_BAUDRATE_57600 - 57600 baud.
- * \ref NRF_UART_BAUDRATE_76800 - 76800 baud.
- * \ref NRF_UART_BAUDRATE_115200 - 115200 baud.
- * \ref NRF_UART_BAUDRATE_230400 - 230400 baud.
- * \ref NRF_UART_BAUDRATE_250000 - 250000 baud.
- * \ref NRF_UART_BAUDRATE_460800 - 460800 baud.
- * \ref NRF_UART_BAUDRATE_921600 - 921600 baud.
- * \ref NRF_UART_BAUDRATE_1000000 - 1000000 baud.
- *
- */
-#ifndef UART_BAUDRATE
-#define UART_BAUDRATE NRF_UART_BAUDRATE_115200
-#endif
-
-/**
- * @def UART_IRQN
- *
- * UART Interrupt number.
- *
- */
-#ifndef UART_IRQN
-#define UART_IRQN UARTE0_UART0_IRQn
-#endif
-
-/**
- * @def UART_IRQ_PRIORITY
- *
- * UART Interrupt priority.
- *
- */
-#ifndef UART_IRQ_PRIORITY
-#define UART_IRQ_PRIORITY 6
-#endif
-
-/**
- * @def UART_RX_BUFFER_SIZE
- *
- * UART Receive buffer size.
- *
- */
-#ifndef UART_RX_BUFFER_SIZE
-#define UART_RX_BUFFER_SIZE 256
-#endif
-
-/**
- * @def UART_PIN_TX
- *
- * UART TX Pin.
- *
- */
-#ifndef UART_PIN_TX
-#define UART_PIN_TX 6
-#endif
-
-/**
- * @def UART_PIN_RX
- *
- * UART RX Pin.
- *
- */
-#ifndef UART_PIN_RX
-#define UART_PIN_RX 8
-#endif
-
-/**
- * @def UART_PIN_CTS
- *
- * UART CTS Pin.
- *
- */
-#ifndef UART_PIN_CTS
-#define UART_PIN_CTS 7
-#endif
-
-/**
- * @def UART_PIN_RTS
- *
- * UART RTS Pin.
- *
- */
-#ifndef UART_PIN_RTS
-#define UART_PIN_RTS 5
-#endif
-
-/*******************************************************************************
- * @section Alarm Driver Configuration.
- ******************************************************************************/
-
-/**
- * @def RTC_INSTANCE
- *
- * RTC Instance.
- *
- */
-#ifndef RTC_INSTANCE
-#define RTC_INSTANCE NRF_RTC2
-#endif
-
-/**
- * @def RTC_IRQ_HANDLER
- *
- * RTC interrupt handler name
- *
- */
-#ifndef RTC_IRQ_HANDLER
-#define RTC_IRQ_HANDLER RTC2_IRQHandler
-#endif
-
-/**
- * @def RTC_IRQN
- *
- * RTC Interrupt number.
- *
- */
-#ifndef RTC_IRQN
-#define RTC_IRQN RTC2_IRQn
-#endif
-
-/**
- * @def RTC_IRQ_PRIORITY
- *
- * RTC Interrupt priority.
- *
- */
-#ifndef RTC_IRQ_PRIORITY
-#define RTC_IRQ_PRIORITY 6
-#endif
-
-/*******************************************************************************
- * @section Random Number Generator Driver Configuration.
- ******************************************************************************/
-
-/**
- * @def RNG_BUFFER_SIZE
- *
- * True Random Number Generator buffer size.
- *
- */
-#ifndef RNG_BUFFER_SIZE
-#define RNG_BUFFER_SIZE 128
-#endif
-
-/**
- * @def RNG_IRQ_PRIORITY
- *
- * RNG Interrupt priority.
- *
- */
-#ifndef RNG_IRQ_PRIORITY
-#define RNG_IRQ_PRIORITY 6
-#endif
-
-/*******************************************************************************
- * @section SPI Slave configuration.
- ******************************************************************************/
-
-/**
- * @def SPIS Instance.
- */
-#ifndef SPIS_INSTANCE
-#define SPIS_INSTANCE 0
-#endif
-
-/**
- * @def SPIS mode.
- *
- * @brief Possible values:
- * \ref NRF_SPIS_MODE_0 - SCK active high, sample on leading edge of clock.
- * \ref NRF_SPIS_MODE_1 - SCK active high, sample on trailing edge of clock.
- * \ref NRF_SPIS_MODE_2 - SCK active low, sample on leading edge of clock.
- * \ref NRF_SPIS_MODE_3 - SCK active low, sample on trailing edge of clock.
- */
-#ifndef SPIS_MODE
-#define SPIS_MODE NRF_SPIS_MODE_0
-#endif
-
-/**
- * @def SPIS bit orders.
- *
- * @brief Possible values:
- * \ref NRF_SPIS_BIT_ORDER_MSB_FIRST - Most significant bit shifted out first.
- * \ref NRF_SPIS_BIT_ORDER_LSB_FIRST - Least significant bit shifted out first.
- */
-#ifndef SPIS_BIT_ORDER
-#define SPIS_BIT_ORDER NRF_SPIS_BIT_ORDER_MSB_FIRST
-#endif
-
-/**
- * @def SPIS Interrupt priority.
- */
-#ifndef SPIS_IRQ_PRIORITY
-#define SPIS_IRQ_PRIORITY 6
-#endif
-
-/**
- * @def SPIS MOSI Pin.
- */
-#ifndef SPIS_PIN_MOSI
-#define SPIS_PIN_MOSI 4
-#endif
-
-/**
- * @def SPIS MISO Pin.
- */
-#ifndef SPIS_PIN_MISO
-#define SPIS_PIN_MISO 28
-#endif
-
-/**
- * @def SPIS SCK Pin.
- */
-#ifndef SPIS_PIN_SCK
-#define SPIS_PIN_SCK 3
-#endif
-
-/**
- * @def SPIS CSN Pin.
- */
-#ifndef SPIS_PIN_CSN
-#define SPIS_PIN_CSN 29
-#endif
-
-/**
- * @def SPIS Host IRQ Pin.
- */
-#ifndef SPIS_PIN_HOST_IRQ
-#define SPIS_PIN_HOST_IRQ 30
-#endif
-
-/*******************************************************************************
- * @section USB driver configuration.
- ******************************************************************************/
-
-/**
- * @def USB_HOST_UART_CONFIG_DELAY_MS
- *
- * Delay after DTR gets asserted that we start send any queued data. This allows slow
- * Linux-based hosts to have enough time to configure their port for raw mode.
- *
- */
-#ifndef USB_HOST_UART_CONFIG_DELAY_MS
-#define USB_HOST_UART_CONFIG_DELAY_MS 10
-#endif
-
-/**
- * @def USB_CDC_AS_SERIAL_TRANSPORT
- *
- * Use USB CDC driver for serial communication.
- */
-#ifndef USB_CDC_AS_SERIAL_TRANSPORT
-#define USB_CDC_AS_SERIAL_TRANSPORT 0
-#endif
-
-/**
- * @def The USB interface to use for CDC ACM COMM.
- *
- * According to the USB Specification, interface numbers cannot have gaps. Tailor this value to adhere to this
- * limitation. Takes values between 0-255.
- */
-#ifndef USB_CDC_ACM_COMM_INTERFACE
-#define USB_CDC_ACM_COMM_INTERFACE 1
-#endif
-
-/**
- * @def The USB interface to use for CDC ACM DATA.
- *
- * According to the USB Specification, interface numbers cannot have gaps. Tailor this value to adhere to this
- * limitation. Takes values between 0-255.
- */
-#ifndef USB_CDC_ACM_DATA_INTERFACE
-#define USB_CDC_ACM_DATA_INTERFACE 2
-#endif
-
-/**
- * @def OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
- *
- * Reset the application, not the chip, when a software reset is requested.
- * via `otPlatReset()`.
- */
-#ifndef OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
-#define OPENTHREAD_PLATFORM_USE_PSEUDO_RESET USB_CDC_AS_SERIAL_TRANSPORT
-#endif
-
-/*******************************************************************************
- * @section Platform FEM Configuration
- ******************************************************************************/
-
-/**
- * @def PLATFORM_FEM_ENABLE_DEFAULT_CONFIG
- *
- * Enable default front end module configuration.
- *
- */
-#ifndef PLATFORM_FEM_ENABLE_DEFAULT_CONFIG
-#define PLATFORM_FEM_ENABLE_DEFAULT_CONFIG 0
-#endif
-
-/*******************************************************************************
- * @section Radio driver configuration.
- ******************************************************************************/
-
-/**
- * @def NRF_802154_PENDING_SHORT_ADDRESSES
- *
- * Number of slots containing short addresses of nodes for which pending data is stored.
- *
- */
-#ifndef NRF_802154_PENDING_SHORT_ADDRESSES
-#define NRF_802154_PENDING_SHORT_ADDRESSES OPENTHREAD_CONFIG_MLE_MAX_CHILDREN
-#endif
-
-/**
- * @def NRF_802154_PENDING_EXTENDED_ADDRESSES
- *
- * Number of slots containing extended addresses of nodes for which pending data is stored.
- *
- */
-#ifndef NRF_802154_PENDING_EXTENDED_ADDRESSES
-#define NRF_802154_PENDING_EXTENDED_ADDRESSES OPENTHREAD_CONFIG_MLE_MAX_CHILDREN
-#endif
-
-/**
- * @def NRF_802154_CSMA_CA_ENABLED
- *
- * If CSMA-CA procedure should be enabled by the driver. Disabling CSMA-CA procedure improves
- * driver performance.
- *
- */
-#ifndef NRF_802154_CSMA_CA_ENABLED
-#define NRF_802154_CSMA_CA_ENABLED 1
-#endif
-
-/**
- * @def NRF_802154_ACK_TIMEOUT_ENABLED
- *
- * If ACK timeout feature should be enabled in the driver.
- *
- */
-#ifndef NRF_802154_ACK_TIMEOUT_ENABLED
-#define NRF_802154_ACK_TIMEOUT_ENABLED 1
-#endif
-
-/*******************************************************************************
- * @section Temperature sensor driver configuration.
- ******************************************************************************/
-
-/**
- * @def TEMP_MEASUREMENT_INTERVAL
- *
- * Interval of consecutive temperature measurements [s].
- *
- */
-#ifndef TEMP_MEASUREMENT_INTERVAL
-#define TEMP_MEASUREMENT_INTERVAL 30
-#endif
-
-/**
- * @def NRF_802154_TX_STARTED_NOTIFY_ENABLED
- *
- * If notification of started transmission should be enabled in the driver.
- *
- * @note This feature must be enabled to support Header IE related features.
- *
- */
-#ifndef NRF_802154_TX_STARTED_NOTIFY_ENABLED
-#define NRF_802154_TX_STARTED_NOTIFY_ENABLED 1
-#endif
-
-#endif // PLATFORM_CONFIG_H_
diff --git a/examples/platforms/nrf52840/platform-fem.h b/examples/platforms/nrf52840/platform-fem.h
deleted file mode 100644
index c444241..0000000
--- a/examples/platforms/nrf52840/platform-fem.h
+++ /dev/null
@@ -1,111 +0,0 @@
-/*
- * Copyright (c) 2017, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This file includes front end module platform-specific functions.
- *
- */
-
-#ifndef PLATFORM_FEM_H_
-#define PLATFORM_FEM_H_
-
-#include <stdint.h>
-
-// clang-format off
-
-#define PLATFORM_FEM_DEFAULT_PA_PIN 26 /**< Default Power Amplifier pin. */
-#define PLATFORM_FEM_DEFAULT_LNA_PIN 27 /**< Default Low Noise Amplifier pin. */
-#define PLATFORM_FEM_DEFAULT_SET_PPI_CHANNEL 15 /**< Default PPI channel for pin setting. */
-#define PLATFORM_FEM_DEFAULT_CLR_PPI_CHANNEL 16 /**< Default PPI channel for pin clearing. */
-#define PLATFORM_FEM_DEFAULT_TIMER_MATCH_PPI_GROUP 4 /**< Default PPI channel group used to disable timer match PPI. */
-#define PLATFORM_FEM_DEFAULT_RADIO_DISABLED_PPI_GROUP 5 /**< Default PPI channel group used to disable radio disabled PPI. */
-#define PLATFORM_FEM_DEFAULT_LNA_GPIOTE_CHANNEL 6 /**< Default LNA GPIOTE channel for FEM control. */
-#define PLATFORM_FEM_DEFAULT_PA_GPIOTE_CHANNEL 7 /**< Default PA GPIOTE channel for FEM control. */
-
-// clang-format on
-
-#define PLATFORM_FEM_DEFAULT_CONFIG \
- ((PlatformFemConfigParams){ \
- .mPaCfg = \
- { \
- .mEnable = 1, \
- .mActiveHigh = 1, \
- .mGpioPin = PLATFORM_FEM_DEFAULT_PA_PIN, \
- }, \
- .mLnaCfg = \
- { \
- .mEnable = 1, \
- .mActiveHigh = 1, \
- .mGpioPin = PLATFORM_FEM_DEFAULT_LNA_PIN, \
- }, \
- .mPpiChIdClr = PLATFORM_FEM_DEFAULT_CLR_PPI_CHANNEL, \
- .mPpiChIdSet = PLATFORM_FEM_DEFAULT_SET_PPI_CHANNEL, \
- .mGpiotePaChId = PLATFORM_FEM_DEFAULT_PA_GPIOTE_CHANNEL, \
- .mGpioteLnaChId = PLATFORM_FEM_DEFAULT_LNA_GPIOTE_CHANNEL, \
- })
-
-/**
- * @brief Configuration parameters for the PA and LNA.
- */
-typedef struct
-{
- uint8_t mEnable : 1; /**< Enable toggling for this amplifier */
- uint8_t mActiveHigh : 1; /**< Set the pin to be active high */
- uint8_t mGpioPin : 6; /**< The GPIO pin to toggle for this amplifier */
-} PlatformFemConfigPaLna;
-
-/**
- * @brief PA & LNA GPIO toggle configuration
- *
- * This option configures the nRF 802.15.4 radio driver to toggle pins when the radio
- * is active for use with a power amplifier and/or a low noise amplifier.
- *
- * Toggling the pins is achieved by using two PPI channels and a GPIOTE channel. The hardware channel IDs are provided
- * by the application and should be regarded as reserved as long as any PA/LNA toggling is enabled.
- *
- * @note Changing this configuration while the radio is in use may have undefined
- * consequences and must be avoided by the application.
- */
-typedef struct
-{
- PlatformFemConfigPaLna mPaCfg; /**< Power Amplifier configuration */
- PlatformFemConfigPaLna mLnaCfg; /**< Low Noise Amplifier configuration */
- uint8_t mPpiChIdSet; /**< PPI channel used for radio pin setting */
- uint8_t mPpiChIdClr; /**< PPI channel used for radio pin clearing */
- uint8_t mGpiotePaChId; /**< GPIOTE channel used for radio PA pin toggling */
- uint8_t mGpioteLnaChId; /**< GPIOTE channel used for radio LNA pin toggling */
-} PlatformFemConfigParams;
-
-/**
- * Function used to set parameters of FEM.
- *
- */
-void PlatformFemSetConfigParams(const PlatformFemConfigParams *aConfig);
-
-#endif // PLATFORM_FEM_H_
diff --git a/examples/platforms/nrf52840/platform-nrf5.h b/examples/platforms/nrf52840/platform-nrf5.h
deleted file mode 100644
index afc0679..0000000
--- a/examples/platforms/nrf52840/platform-nrf5.h
+++ /dev/null
@@ -1,233 +0,0 @@
-/*
- * Copyright (c) 2016, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This file includes the platform-specific initializers.
- *
- */
-
-#ifndef PLATFORM_NRF5_H_
-#define PLATFORM_NRF5_H_
-
-#include <stdint.h>
-
-#include <openthread/instance.h>
-
-#include "platform-config.h"
-
-/**
- * Initialization of UART driver.
- *
- */
-void nrf5UartInit(void);
-
-/**
- * Deinitialization of UART driver.
- *
- */
-void nrf5UartDeinit(void);
-
-/**
- * Clear pending UART data.
- *
- */
-void nrf5UartClearPendingData(void);
-
-/**
- * This function performs UART driver processing.
- *
- */
-void nrf5UartProcess(void);
-
-/**
- * Initialization of Alarm driver.
- *
- */
-void nrf5AlarmInit(void);
-
-/**
- * Deinitialization of Alarm driver.
- *
- */
-void nrf5AlarmDeinit(void);
-
-/**
- * Function for processing Alarm.
- *
- */
-void nrf5AlarmProcess(otInstance *aInstance);
-
-/**
- * Function for geting current time in mircosecond.
- *
- */
-uint64_t nrf5AlarmGetCurrentTime(void);
-
-/**
- * Initialization of Random Number Generator.
- *
- */
-void nrf5RandomInit(void);
-
-/**
- * Deinitialization of Random Number Generator.
- *
- */
-void nrf5RandomDeinit(void);
-
-/**
- * Initialization of Logger driver.
- *
- */
-void nrf5LogInit(void);
-
-/**
- * Deinitialization of Logger driver.
- *
- */
-void nrf5LogDeinit(void);
-
-/**
- * Initialization of SPI Slave driver.
- *
- */
-void nrf5SpiSlaveInit(void);
-
-/**
- * Deinitialization of SPI Slave driver.
- *
- */
-void nrf5SpiSlaveDeinit(void);
-
-/**
- * Function for processing SPI Slave driver.
- */
-void nrf5SpiSlaveProcess(void);
-
-/**
- * Initialization of Misc module.
- *
- */
-void nrf5MiscInit(void);
-
-/**
- * Deinitialization of Misc module.
- *
- */
-void nrf5MiscDeinit(void);
-
-/**
- * Initialization of Radio driver.
- *
- */
-void nrf5RadioInit(void);
-
-/**
- * Deinitialization of Radio driver.
- *
- */
-void nrf5RadioDeinit(void);
-
-/**
- * Function for processing Radio.
- *
- */
-void nrf5RadioProcess(otInstance *aInstance);
-
-/**
- * Initialization of hardware crypto engine.
- *
- */
-void nrf5CryptoInit(void);
-
-/**
- * Deinitialization of hardware crypto engine.
- *
- */
-void nrf5CryptoDeinit(void);
-
-/**
- * Function for erasing page in flash.
- *
- */
-otError nrf5FlashPageErase(uint32_t aAddress);
-
-/**
- * Function for checking state of flash driver.
- *
- */
-bool nrf5FlashIsBusy(void);
-
-/**
- * Function for writing data into flash.
- *
- */
-uint32_t nrf5FlashWrite(uint32_t aAddress, const uint8_t *aData, uint32_t aSize);
-
-/**
- * Initialization of temperature controller.
- *
- */
-void nrf5TempInit(void);
-
-/**
- * Deinitialization of temperature controller.
- *
- */
-void nrf5TempDeinit(void);
-
-/**
- * Function for processing temperature controller.
- *
- */
-void nrf5TempProcess(void);
-
-/**
- * Function for measuring internal temperature.
- *
- * @return Temperature value measured.
- *
- */
-int32_t nrf5TempGet(void);
-
-#if SOFTDEVICE_PRESENT
-/**
- * Function for translating SoftDevice error into OpenThread's one.
- *
- */
-otError nrf5SdErrorToOtError(uint32_t aSdError);
-
-/**
- * Function for processing SoftDevice SoC events in flash module.
- *
- */
-void nrf5SdSocFlashProcess(uint32_t aEvtId);
-#endif // SOFTDEVICE_PRESENT
-
-#endif // PLATFORM_NRF5_H_
diff --git a/examples/platforms/nrf52840/platform-softdevice.h b/examples/platforms/nrf52840/platform-softdevice.h
deleted file mode 100644
index 21b33b0..0000000
--- a/examples/platforms/nrf52840/platform-softdevice.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/*
- * Copyright (c) 2017, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This file includes the SoftDevice platform-specific functions.
- *
- */
-
-#ifndef PLATFORM_SOFTDEVICE_H_
-#define PLATFORM_SOFTDEVICE_H_
-
-#include <stdint.h>
-
-/** @brief RAAL Softdevice default parameters. */
-#define PLATFORM_SOFTDEVICE_RAAL_TIMESLOT_DEFAULT_LENGTH 6400
-#define PLATFORM_SOFTDEVICE_RAAL_TIMESLOT_DEFAULT_ALLOC_ITERS 5
-#define PLATFORM_SOFTDEVICE_RAAL_TIMESLOT_DEFAULT_SAFE_MARGIN 126
-#define PLATFORM_SOFTDEVICE_RAAL_TIMESLOT_DEFAULT_TIMEOUT 6400
-#define PLATFORM_SOFTDEVICE_RAAL_TIMESLOT_DEFAULT_MAX_LENGTH 120000000
-#define PLATFORM_SOFTDEVICE_RAAL_DEFAULT_LF_CLK_ACCURACY_PPM 500
-
-/** @brief RAAL Softdevice configuration parameters. */
-typedef struct
-{
- uint32_t timeslotLength; /**< Timeslot length requested by the module in microseconds. */
- uint32_t timeslotTimeout; /**< Longest acceptable delay until the start of the requested timeslot in microseconds. */
- uint32_t timeslotMaxLength; /**< Maximum single timeslot length created by extension processing in microseconds. */
- uint16_t timeslotAllocIters; /**< Maximum number of iteration of dividing timeslot_length by factor of 2 performed by arbiter. */
- uint16_t timeslotSafeMargin; /**< Safe margin before timeslot is finished and nrf_raal_timeslot_ended should be called in microseconds. */
- uint16_t lfClkAccuracyPpm; /**< Clock accuracy in ppm unit. */
-} otSysSoftdeviceRaalConfigParams;
-
-/**
- * Function for processing SoftDevice SoC events.
- *
- */
-void otSysSoftdeviceSocEvtHandler(uint32_t aEvtId);
-
-/**
- * Function used to set non-default parameters of Softdevice RAAL.
- *
- */
-void otSysSoftdeviceRaalConfig(const otSysSoftdeviceRaalConfigParams *aConfig);
-
-#endif // PLATFORM_SOFTDEVICE_H_
diff --git a/examples/platforms/nrf52840/radio.c b/examples/platforms/nrf52840/radio.c
deleted file mode 100644
index 6867892..0000000
--- a/examples/platforms/nrf52840/radio.c
+++ /dev/null
@@ -1,888 +0,0 @@
-/*
- * Copyright (c) 2016, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This file implements the OpenThread platform abstraction for radio communication.
- *
- */
-
-#include <openthread-core-config.h>
-#include <openthread/config.h>
-
-#include <assert.h>
-#include <stdbool.h>
-#include <stddef.h>
-#include <stdint.h>
-#include <string.h>
-
-#include "utils/code_utils.h"
-
-#include <platform-config.h>
-#include <openthread/platform/alarm-micro.h>
-#include <openthread/platform/diag.h>
-#include <openthread/platform/logging.h>
-#include <openthread/platform/radio.h>
-#include <openthread/platform/time.h>
-
-#include "openthread-system.h"
-#include "platform-nrf5.h"
-
-#include <nrf.h>
-#include <nrf_802154.h>
-
-#include <openthread-core-config.h>
-#include <openthread/config.h>
-#include <openthread/random_noncrypto.h>
-
-// clang-format off
-
-#define SHORT_ADDRESS_SIZE 2 ///< Size of MAC short address.
-#define US_PER_MS 1000ULL ///< Microseconds in millisecond.
-
-#define ACK_REQUEST_OFFSET 1 ///< Byte containing Ack request bit (+1 for frame length byte).
-#define ACK_REQUEST_BIT (1 << 5) ///< Ack request bit.
-#define FRAME_PENDING_OFFSET 1 ///< Byte containing pending bit (+1 for frame length byte).
-#define FRAME_PENDING_BIT (1 << 4) ///< Frame Pending bit.
-
-// clang-format on
-
-enum
-{
- NRF52840_RECEIVE_SENSITIVITY = -100, // dBm
-};
-
-static bool sDisabled;
-
-static otError sReceiveError = OT_ERROR_NONE;
-static otRadioFrame sReceivedFrames[NRF_802154_RX_BUFFERS];
-static otRadioFrame sTransmitFrame;
-static uint8_t sTransmitPsdu[OT_RADIO_FRAME_MAX_SIZE + 1];
-
-#if OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
-static otRadioIeInfo sTransmitIeInfo;
-#endif
-static otInstance *sInstance = NULL;
-
-static otRadioFrame sAckFrame;
-static bool sAckedWithFramePending;
-
-static int8_t sDefaultTxPower;
-
-static uint32_t sEnergyDetectionTime;
-static uint8_t sEnergyDetectionChannel;
-static int8_t sEnergyDetected;
-
-typedef enum
-{
- kPendingEventSleep, // Requested to enter Sleep state.
- kPendingEventFrameTransmitted, // Transmitted frame and received ACK (if requested).
- kPendingEventChannelAccessFailure, // Failed to transmit frame (channel busy).
- kPendingEventInvalidOrNoAck, // Failed to transmit frame (received invalid or no ACK).
- kPendingEventReceiveFailed, // Failed to receive a valid frame.
- kPendingEventEnergyDetectionStart, // Requested to start Energy Detection procedure.
- kPendingEventEnergyDetected, // Energy Detection finished.
-} RadioPendingEvents;
-
-static uint32_t sPendingEvents;
-
-static void dataInit(void)
-{
- sDisabled = true;
-
- sTransmitFrame.mPsdu = sTransmitPsdu + 1;
-#if OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
- sTransmitFrame.mInfo.mTxInfo.mIeInfo = &sTransmitIeInfo;
-#endif
-
- sReceiveError = OT_ERROR_NONE;
-
- for (uint32_t i = 0; i < NRF_802154_RX_BUFFERS; i++)
- {
- sReceivedFrames[i].mPsdu = NULL;
- }
-
- memset(&sAckFrame, 0, sizeof(sAckFrame));
-}
-
-static void convertShortAddress(uint8_t *aTo, uint16_t aFrom)
-{
- aTo[0] = (uint8_t)aFrom;
- aTo[1] = (uint8_t)(aFrom >> 8);
-}
-
-static inline bool isPendingEventSet(RadioPendingEvents aEvent)
-{
- return sPendingEvents & (1UL << aEvent);
-}
-
-static void setPendingEvent(RadioPendingEvents aEvent)
-{
- volatile uint32_t pendingEvents;
- uint32_t bitToSet = 1UL << aEvent;
-
- do
- {
- pendingEvents = __LDREXW((unsigned long volatile *)&sPendingEvents);
- pendingEvents |= bitToSet;
- } while (__STREXW(pendingEvents, (unsigned long volatile *)&sPendingEvents));
-
- otSysEventSignalPending();
-}
-
-static void resetPendingEvent(RadioPendingEvents aEvent)
-{
- volatile uint32_t pendingEvents;
- uint32_t bitsToRemain = ~(1UL << aEvent);
-
- do
- {
- pendingEvents = __LDREXW((unsigned long volatile *)&sPendingEvents);
- pendingEvents &= bitsToRemain;
- } while (__STREXW(pendingEvents, (unsigned long volatile *)&sPendingEvents));
-}
-
-static inline void clearPendingEvents(void)
-{
- // Clear pending events that could cause race in the MAC layer.
- volatile uint32_t pendingEvents;
- uint32_t bitsToRemain = ~(0UL);
-
- bitsToRemain &= ~(1UL << kPendingEventSleep);
-
- do
- {
- pendingEvents = __LDREXW((unsigned long volatile *)&sPendingEvents);
- pendingEvents &= bitsToRemain;
- } while (__STREXW(pendingEvents, (unsigned long volatile *)&sPendingEvents));
-}
-
-#if !OPENTHREAD_CONFIG_ENABLE_PLATFORM_EUI64_CUSTOM_SOURCE
-void otPlatRadioGetIeeeEui64(otInstance *aInstance, uint8_t *aIeeeEui64)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- uint64_t factoryAddress;
- uint32_t index = 0;
-
- // Set the MAC Address Block Larger (MA-L) formerly called OUI.
- aIeeeEui64[index++] = (OPENTHREAD_CONFIG_STACK_VENDOR_OUI >> 16) & 0xff;
- aIeeeEui64[index++] = (OPENTHREAD_CONFIG_STACK_VENDOR_OUI >> 8) & 0xff;
- aIeeeEui64[index++] = OPENTHREAD_CONFIG_STACK_VENDOR_OUI & 0xff;
-
- // Use device identifier assigned during the production.
- factoryAddress = (uint64_t)NRF_FICR->DEVICEID[0] << 32;
- factoryAddress |= NRF_FICR->DEVICEID[1];
- memcpy(aIeeeEui64 + index, &factoryAddress, sizeof(factoryAddress) - index);
-}
-#endif // OPENTHREAD_CONFIG_ENABLE_PLATFORM_EUI64_CUSTOM_SOURCE
-
-void otPlatRadioSetPanId(otInstance *aInstance, uint16_t aPanId)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- uint8_t address[SHORT_ADDRESS_SIZE];
- convertShortAddress(address, aPanId);
-
- nrf_802154_pan_id_set(address);
-}
-
-void otPlatRadioSetExtendedAddress(otInstance *aInstance, const otExtAddress *aExtAddress)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- nrf_802154_extended_address_set(aExtAddress->m8);
-}
-
-void otPlatRadioSetShortAddress(otInstance *aInstance, uint16_t aShortAddress)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- uint8_t address[SHORT_ADDRESS_SIZE];
- convertShortAddress(address, aShortAddress);
-
- nrf_802154_short_address_set(address);
-}
-
-void nrf5RadioInit(void)
-{
- dataInit();
- nrf_802154_init();
-}
-
-void nrf5RadioDeinit(void)
-{
- nrf_802154_sleep();
- nrf_802154_deinit();
- sPendingEvents = 0;
-}
-
-otRadioState otPlatRadioGetState(otInstance *aInstance)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- if (sDisabled)
- {
- return OT_RADIO_STATE_DISABLED;
- }
-
- switch (nrf_802154_state_get())
- {
- case NRF_802154_STATE_SLEEP:
- return OT_RADIO_STATE_SLEEP;
-
- case NRF_802154_STATE_RECEIVE:
- case NRF_802154_STATE_ENERGY_DETECTION:
- return OT_RADIO_STATE_RECEIVE;
-
- case NRF_802154_STATE_TRANSMIT:
- case NRF_802154_STATE_CCA:
- case NRF_802154_STATE_CONTINUOUS_CARRIER:
- return OT_RADIO_STATE_TRANSMIT;
-
- default:
- assert(false); // Make sure driver returned valid state.
- }
-
- return OT_RADIO_STATE_RECEIVE; // It is the default state. Return it in case of unknown.
-}
-
-bool otPlatRadioIsEnabled(otInstance *aInstance)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- return !sDisabled;
-}
-
-otError otPlatRadioEnable(otInstance *aInstance)
-{
- otError error;
-
- sInstance = aInstance;
-
- if (sDisabled)
- {
- sDisabled = false;
- error = OT_ERROR_NONE;
- }
- else
- {
- error = OT_ERROR_INVALID_STATE;
- }
-
- return error;
-}
-
-otError otPlatRadioDisable(otInstance *aInstance)
-{
- otError error = OT_ERROR_NONE;
-
- otEXPECT(otPlatRadioIsEnabled(aInstance));
- otEXPECT_ACTION(otPlatRadioGetState(aInstance) == OT_RADIO_STATE_SLEEP || isPendingEventSet(kPendingEventSleep),
- error = OT_ERROR_INVALID_STATE);
-
- sDisabled = true;
-
-exit:
- return error;
-}
-
-otError otPlatRadioSleep(otInstance *aInstance)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- if (nrf_802154_sleep())
- {
- clearPendingEvents();
- }
- else
- {
- clearPendingEvents();
- setPendingEvent(kPendingEventSleep);
- }
-
- return OT_ERROR_NONE;
-}
-
-otError otPlatRadioReceive(otInstance *aInstance, uint8_t aChannel)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- bool result;
-
- nrf_802154_channel_set(aChannel);
- nrf_802154_tx_power_set(sDefaultTxPower);
- result = nrf_802154_receive();
- clearPendingEvents();
-
- return result ? OT_ERROR_NONE : OT_ERROR_INVALID_STATE;
-}
-
-otError otPlatRadioTransmit(otInstance *aInstance, otRadioFrame *aFrame)
-{
- bool result = true;
-
- aFrame->mPsdu[-1] = aFrame->mLength;
-
- nrf_802154_channel_set(aFrame->mChannel);
-
- if (aFrame->mInfo.mTxInfo.mCsmaCaEnabled)
- {
- nrf_802154_transmit_csma_ca_raw(&aFrame->mPsdu[-1]);
- }
- else
- {
- result = nrf_802154_transmit_raw(&aFrame->mPsdu[-1], false);
- }
-
- clearPendingEvents();
- otPlatRadioTxStarted(aInstance, aFrame);
-
- if (!result)
- {
- setPendingEvent(kPendingEventChannelAccessFailure);
- }
-
- return OT_ERROR_NONE;
-}
-
-otRadioFrame *otPlatRadioGetTransmitBuffer(otInstance *aInstance)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- return &sTransmitFrame;
-}
-
-int8_t otPlatRadioGetRssi(otInstance *aInstance)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- return nrf_802154_rssi_last_get();
-}
-
-otRadioCaps otPlatRadioGetCaps(otInstance *aInstance)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- return (otRadioCaps)(OT_RADIO_CAPS_ENERGY_SCAN | OT_RADIO_CAPS_ACK_TIMEOUT | OT_RADIO_CAPS_CSMA_BACKOFF);
-}
-
-bool otPlatRadioGetPromiscuous(otInstance *aInstance)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- return nrf_802154_promiscuous_get();
-}
-
-void otPlatRadioSetPromiscuous(otInstance *aInstance, bool aEnable)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- nrf_802154_promiscuous_set(aEnable);
-}
-
-void otPlatRadioEnableSrcMatch(otInstance *aInstance, bool aEnable)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- nrf_802154_auto_pending_bit_set(aEnable);
-}
-
-otError otPlatRadioAddSrcMatchShortEntry(otInstance *aInstance, const uint16_t aShortAddress)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- otError error;
-
- uint8_t shortAddress[SHORT_ADDRESS_SIZE];
- convertShortAddress(shortAddress, aShortAddress);
-
- if (nrf_802154_pending_bit_for_addr_set(shortAddress, false))
- {
- error = OT_ERROR_NONE;
- }
- else
- {
- error = OT_ERROR_NO_BUFS;
- }
-
- return error;
-}
-
-otError otPlatRadioAddSrcMatchExtEntry(otInstance *aInstance, const otExtAddress *aExtAddress)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- otError error;
-
- if (nrf_802154_pending_bit_for_addr_set(aExtAddress->m8, true))
- {
- error = OT_ERROR_NONE;
- }
- else
- {
- error = OT_ERROR_NO_BUFS;
- }
-
- return error;
-}
-
-otError otPlatRadioClearSrcMatchShortEntry(otInstance *aInstance, const uint16_t aShortAddress)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- otError error;
-
- uint8_t shortAddress[SHORT_ADDRESS_SIZE];
- convertShortAddress(shortAddress, aShortAddress);
-
- if (nrf_802154_pending_bit_for_addr_clear(shortAddress, false))
- {
- error = OT_ERROR_NONE;
- }
- else
- {
- error = OT_ERROR_NO_ADDRESS;
- }
-
- return error;
-}
-
-otError otPlatRadioClearSrcMatchExtEntry(otInstance *aInstance, const otExtAddress *aExtAddress)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- otError error;
-
- if (nrf_802154_pending_bit_for_addr_clear(aExtAddress->m8, true))
- {
- error = OT_ERROR_NONE;
- }
- else
- {
- error = OT_ERROR_NO_ADDRESS;
- }
-
- return error;
-}
-
-void otPlatRadioClearSrcMatchShortEntries(otInstance *aInstance)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- nrf_802154_pending_bit_for_addr_reset(false);
-}
-
-void otPlatRadioClearSrcMatchExtEntries(otInstance *aInstance)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- nrf_802154_pending_bit_for_addr_reset(true);
-}
-
-otError otPlatRadioEnergyScan(otInstance *aInstance, uint8_t aScanChannel, uint16_t aScanDuration)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- sEnergyDetectionTime = (uint32_t)aScanDuration * 1000UL;
- sEnergyDetectionChannel = aScanChannel;
-
- clearPendingEvents();
-
- nrf_802154_channel_set(aScanChannel);
-
- if (nrf_802154_energy_detection(sEnergyDetectionTime))
- {
- resetPendingEvent(kPendingEventEnergyDetectionStart);
- }
- else
- {
- setPendingEvent(kPendingEventEnergyDetectionStart);
- }
-
- return OT_ERROR_NONE;
-}
-
-otError otPlatRadioGetTransmitPower(otInstance *aInstance, int8_t *aPower)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- otError error = OT_ERROR_NONE;
-
- if (aPower == NULL)
- {
- error = OT_ERROR_INVALID_ARGS;
- }
- else
- {
- *aPower = sDefaultTxPower;
- }
-
- return error;
-}
-
-otError otPlatRadioSetTransmitPower(otInstance *aInstance, int8_t aPower)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- sDefaultTxPower = aPower;
- nrf_802154_tx_power_set(aPower);
-
- return OT_ERROR_NONE;
-}
-
-void nrf5RadioProcess(otInstance *aInstance)
-{
- bool isEventPending = false;
-
- for (uint32_t i = 0; i < NRF_802154_RX_BUFFERS; i++)
- {
- if (sReceivedFrames[i].mPsdu != NULL)
- {
-#if OPENTHREAD_CONFIG_DIAG_ENABLE
-
- if (otPlatDiagModeGet())
- {
- otPlatDiagRadioReceiveDone(aInstance, &sReceivedFrames[i], OT_ERROR_NONE);
- }
- else
-#endif
- {
- otPlatRadioReceiveDone(aInstance, &sReceivedFrames[i], OT_ERROR_NONE);
- }
-
- uint8_t *bufferAddress = &sReceivedFrames[i].mPsdu[-1];
- sReceivedFrames[i].mPsdu = NULL;
- nrf_802154_buffer_free_raw(bufferAddress);
- }
- }
-
- if (isPendingEventSet(kPendingEventFrameTransmitted))
- {
- resetPendingEvent(kPendingEventFrameTransmitted);
-
-#if OPENTHREAD_CONFIG_DIAG_ENABLE
-
- if (otPlatDiagModeGet())
- {
- otPlatDiagRadioTransmitDone(aInstance, &sTransmitFrame, OT_ERROR_NONE);
- }
- else
-#endif
- {
- otRadioFrame *ackPtr = (sAckFrame.mPsdu == NULL) ? NULL : &sAckFrame;
- otPlatRadioTxDone(aInstance, &sTransmitFrame, ackPtr, OT_ERROR_NONE);
- }
-
- if (sAckFrame.mPsdu != NULL)
- {
- nrf_802154_buffer_free_raw(sAckFrame.mPsdu - 1);
- sAckFrame.mPsdu = NULL;
- }
- }
-
- if (isPendingEventSet(kPendingEventChannelAccessFailure))
- {
- resetPendingEvent(kPendingEventChannelAccessFailure);
-
-#if OPENTHREAD_CONFIG_DIAG_ENABLE
-
- if (otPlatDiagModeGet())
- {
- otPlatDiagRadioTransmitDone(aInstance, &sTransmitFrame, OT_ERROR_CHANNEL_ACCESS_FAILURE);
- }
- else
-#endif
- {
- otPlatRadioTxDone(aInstance, &sTransmitFrame, NULL, OT_ERROR_CHANNEL_ACCESS_FAILURE);
- }
- }
-
- if (isPendingEventSet(kPendingEventInvalidOrNoAck))
- {
- resetPendingEvent(kPendingEventInvalidOrNoAck);
-
-#if OPENTHREAD_CONFIG_DIAG_ENABLE
-
- if (otPlatDiagModeGet())
- {
- otPlatDiagRadioTransmitDone(aInstance, &sTransmitFrame, OT_ERROR_NO_ACK);
- }
- else
-#endif
- {
- otPlatRadioTxDone(aInstance, &sTransmitFrame, NULL, OT_ERROR_NO_ACK);
- }
- }
-
- if (isPendingEventSet(kPendingEventReceiveFailed))
- {
- resetPendingEvent(kPendingEventReceiveFailed);
-
-#if OPENTHREAD_CONFIG_DIAG_ENABLE
-
- if (otPlatDiagModeGet())
- {
- otPlatDiagRadioReceiveDone(aInstance, NULL, sReceiveError);
- }
- else
-#endif
- {
- otPlatRadioReceiveDone(aInstance, NULL, sReceiveError);
- }
- }
-
- if (isPendingEventSet(kPendingEventEnergyDetected))
- {
- resetPendingEvent(kPendingEventEnergyDetected);
-
- otPlatRadioEnergyScanDone(aInstance, sEnergyDetected);
- }
-
- if (isPendingEventSet(kPendingEventSleep))
- {
- if (nrf_802154_sleep())
- {
- resetPendingEvent(kPendingEventSleep);
- }
- else
- {
- isEventPending = true;
- }
- }
-
- if (isPendingEventSet(kPendingEventEnergyDetectionStart))
- {
- nrf_802154_channel_set(sEnergyDetectionChannel);
-
- if (nrf_802154_energy_detection(sEnergyDetectionTime))
- {
- resetPendingEvent(kPendingEventEnergyDetectionStart);
- }
- else
- {
- isEventPending = true;
- }
- }
-
- if (isEventPending)
- {
- otSysEventSignalPending();
- }
-}
-
-void nrf_802154_received_timestamp_raw(uint8_t *p_data, int8_t power, uint8_t lqi, uint32_t time)
-{
- otRadioFrame *receivedFrame = NULL;
-
- for (uint32_t i = 0; i < NRF_802154_RX_BUFFERS; i++)
- {
- if (sReceivedFrames[i].mPsdu == NULL)
- {
- receivedFrame = &sReceivedFrames[i];
-
- memset(receivedFrame, 0, sizeof(*receivedFrame));
- break;
- }
- }
-
- assert(receivedFrame != NULL);
-
- receivedFrame->mPsdu = &p_data[1];
- receivedFrame->mLength = p_data[0];
- receivedFrame->mInfo.mRxInfo.mRssi = power;
- receivedFrame->mInfo.mRxInfo.mLqi = lqi;
- receivedFrame->mChannel = nrf_802154_channel_get();
-
- // Inform if this frame was acknowledged with frame pending set.
- if (p_data[ACK_REQUEST_OFFSET] & ACK_REQUEST_BIT)
- {
- receivedFrame->mInfo.mRxInfo.mAckedWithFramePending = sAckedWithFramePending;
- }
- else
- {
- receivedFrame->mInfo.mRxInfo.mAckedWithFramePending = false;
- }
-
- // Get the timestamp when the SFD was received.
-#if !NRF_802154_TX_STARTED_NOTIFY_ENABLED
-#error "NRF_802154_TX_STARTED_NOTIFY_ENABLED is required!"
-#endif
- uint32_t offset =
- (int32_t)otPlatAlarmMicroGetNow() - (int32_t)nrf_802154_first_symbol_timestamp_get(time, p_data[0]);
- receivedFrame->mInfo.mRxInfo.mTimestamp = nrf5AlarmGetCurrentTime() - offset;
-
- sAckedWithFramePending = false;
-
- otSysEventSignalPending();
-}
-
-void nrf_802154_receive_failed(nrf_802154_rx_error_t error)
-{
- switch (error)
- {
- case NRF_802154_RX_ERROR_INVALID_FRAME:
- case NRF_802154_RX_ERROR_DELAYED_TIMEOUT:
- sReceiveError = OT_ERROR_NO_FRAME_RECEIVED;
- break;
-
- case NRF_802154_RX_ERROR_INVALID_FCS:
- sReceiveError = OT_ERROR_FCS;
- break;
-
- case NRF_802154_RX_ERROR_INVALID_DEST_ADDR:
- sReceiveError = OT_ERROR_DESTINATION_ADDRESS_FILTERED;
- break;
-
- case NRF_802154_RX_ERROR_RUNTIME:
- case NRF_802154_RX_ERROR_TIMESLOT_ENDED:
- case NRF_802154_RX_ERROR_ABORTED:
- case NRF_802154_RX_ERROR_DELAYED_TIMESLOT_DENIED:
- case NRF_802154_RX_ERROR_INVALID_LENGTH:
- sReceiveError = OT_ERROR_FAILED;
- break;
-
- default:
- assert(false);
- }
-
- sAckedWithFramePending = false;
-
- setPendingEvent(kPendingEventReceiveFailed);
-}
-
-void nrf_802154_tx_ack_started(const uint8_t *p_data)
-{
- // Check if the frame pending bit is set in ACK frame.
- sAckedWithFramePending = p_data[FRAME_PENDING_OFFSET] & FRAME_PENDING_BIT;
-}
-
-void nrf_802154_transmitted_raw(const uint8_t *aFrame, uint8_t *aAckPsdu, int8_t aPower, uint8_t aLqi)
-{
- assert(aFrame == sTransmitPsdu);
-
- if (aAckPsdu == NULL)
- {
- sAckFrame.mPsdu = NULL;
- }
- else
- {
- sAckFrame.mPsdu = &aAckPsdu[1];
- sAckFrame.mLength = aAckPsdu[0];
- sAckFrame.mInfo.mRxInfo.mRssi = aPower;
- sAckFrame.mInfo.mRxInfo.mLqi = aLqi;
- sAckFrame.mChannel = nrf_802154_channel_get();
- }
-
- setPendingEvent(kPendingEventFrameTransmitted);
-}
-
-void nrf_802154_transmit_failed(const uint8_t *aFrame, nrf_802154_tx_error_t error)
-{
- assert(aFrame == sTransmitPsdu);
-
- switch (error)
- {
- case NRF_802154_TX_ERROR_BUSY_CHANNEL:
- case NRF_802154_TX_ERROR_TIMESLOT_ENDED:
- case NRF_802154_TX_ERROR_ABORTED:
- case NRF_802154_TX_ERROR_TIMESLOT_DENIED:
- setPendingEvent(kPendingEventChannelAccessFailure);
- break;
-
- case NRF_802154_TX_ERROR_INVALID_ACK:
- case NRF_802154_TX_ERROR_NO_ACK:
- case NRF_802154_TX_ERROR_NO_MEM:
- setPendingEvent(kPendingEventInvalidOrNoAck);
- break;
-
- default:
- assert(false);
- }
-}
-
-void nrf_802154_energy_detected(uint8_t result)
-{
- sEnergyDetected = nrf_802154_dbm_from_energy_level_calculate(result);
-
- setPendingEvent(kPendingEventEnergyDetected);
-}
-
-int8_t otPlatRadioGetReceiveSensitivity(otInstance *aInstance)
-{
- OT_UNUSED_VARIABLE(aInstance);
-
- return NRF52840_RECEIVE_SENSITIVITY;
-}
-
-#if OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
-void nrf_802154_tx_started(const uint8_t *aFrame)
-{
- bool notifyFrameUpdated = false;
- assert(aFrame == sTransmitPsdu);
-
-#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
- if (sTransmitFrame.mInfo.mTxInfo.mIeInfo->mTimeIeOffset != 0)
- {
- uint8_t *timeIe = sTransmitFrame.mPsdu + sTransmitFrame.mInfo.mTxInfo.mIeInfo->mTimeIeOffset;
- uint64_t time = otPlatTimeGet() + sTransmitFrame.mInfo.mTxInfo.mIeInfo->mNetworkTimeOffset;
-
- *timeIe = sTransmitFrame.mInfo.mTxInfo.mIeInfo->mTimeSyncSeq;
-
- *(++timeIe) = (uint8_t)(time & 0xff);
- for (uint8_t i = 1; i < sizeof(uint64_t); i++)
- {
- time = time >> 8;
- *(++timeIe) = (uint8_t)(time & 0xff);
- }
-
- notifyFrameUpdated = true;
- }
-#endif // OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
-
- if (notifyFrameUpdated)
- {
- otPlatRadioFrameUpdated(sInstance, &sTransmitFrame);
- }
-}
-#endif
-
-void nrf_802154_random_init(void)
-{
- // Intentionally empty
-}
-
-void nrf_802154_random_deinit(void)
-{
- // Intentionally empty
-}
-
-uint32_t nrf_802154_random_get(void)
-{
- return otRandomNonCryptoGetUint32();
-}
diff --git a/examples/platforms/nrf52840/softdevice.c b/examples/platforms/nrf52840/softdevice.c
deleted file mode 100644
index a4ab9a1..0000000
--- a/examples/platforms/nrf52840/softdevice.c
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * Copyright (c) 2017, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This file implements the OpenThread softdevice helper functions.
- *
- */
-
-#include <openthread/config.h>
-#include <openthread-core-config.h>
-
-#include <assert.h>
-#include <stddef.h>
-#include <stdint.h>
-#include <string.h>
-
-#include "softdevice.h"
-#include "platform-softdevice.h"
-#include "platform-nrf5.h"
-
-#include <nrf_raal_softdevice.h>
-
-otError nrf5SdErrorToOtError(uint32_t aSdError)
-{
- switch (aSdError)
- {
- case NRF_SUCCESS:
- return OT_ERROR_NONE;
- break;
-
- case NRF_ERROR_INVALID_STATE:
- case NRF_ERROR_BUSY:
- return OT_ERROR_INVALID_STATE;
- break;
-
- case NRF_ERROR_INVALID_PARAM:
- case NRF_ERROR_INVALID_ADDR:
- return OT_ERROR_INVALID_ARGS;
- break;
-
- case NRF_ERROR_NO_MEM:
- return OT_ERROR_NO_BUFS;
- break;
-
- case NRF_ERROR_NOT_FOUND:
- return OT_ERROR_NOT_FOUND;
- break;
-
- case NRF_ERROR_NOT_SUPPORTED:
- return OT_ERROR_NOT_IMPLEMENTED;
- break;
-
- default:
- return OT_ERROR_FAILED;
- break;
- }
-}
-
-void otSysSoftdeviceSocEvtHandler(uint32_t aEvtId)
-{
- nrf5SdSocFlashProcess(aEvtId);
- nrf_raal_softdevice_soc_evt_handler(aEvtId);
-}
-
-void otSysSoftdeviceRaalConfig(const otSysSoftdeviceRaalConfigParams *aConfig)
-{
- nrf_raal_softdevice_cfg_t cfg;
- memset(&cfg, 0, sizeof(cfg));
-
- cfg.timeslot_length = aConfig->timeslotLength;
- cfg.timeslot_timeout = aConfig->timeslotTimeout;
- cfg.timeslot_max_length = aConfig->timeslotMaxLength;
- cfg.timeslot_alloc_iters = aConfig->timeslotAllocIters;
- cfg.timeslot_safe_margin = aConfig->timeslotSafeMargin;
- cfg.lf_clk_accuracy_ppm = aConfig->lfClkAccuracyPpm;
-
- nrf_raal_softdevice_config(&cfg);
-}
diff --git a/examples/platforms/nrf52840/softdevice.h b/examples/platforms/nrf52840/softdevice.h
deleted file mode 100644
index 343a584..0000000
--- a/examples/platforms/nrf52840/softdevice.h
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- * Copyright (c) 2017, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This file includes the common SoftDevice headers.
- *
- */
-
-#ifndef SOFTDEVICE_H_
-#define SOFTDEVICE_H_
-
-#if defined(__GNUC__)
- _Pragma("GCC diagnostic push")
- _Pragma("GCC diagnostic ignored \"-Wreturn-type\"")
- _Pragma("GCC diagnostic ignored \"-Wunused-parameter\"")
- _Pragma("GCC diagnostic ignored \"-Wpedantic\"")
-#endif
-
-#include <nrf_svc.h>
-#include <nrf_sdm.h>
-#include <nrf_soc.h>
-#include <nrf_nvic.h>
-
-#if defined(__GNUC__)
- _Pragma("GCC diagnostic pop")
-#endif
-
-/*******************************************************************************
- * @section nRF SoftDevice Handler declarations.
- *
- * @note Definitions for below functions are placed in nRF5 SDK.
- ******************************************************************************/
-
-/**
- * @brief Function for stopping the incoming stack events.
- *
- * This function disables the SoftDevice interrupt. To resume polling for events,
- * call @ref nrf_sdh_resume.
- */
-void nrf_sdh_suspend(void);
-
-/**
- * @brief Function for resuming polling incoming events from the SoftDevice.
- */
-void nrf_sdh_resume(void);
-
-/**
- * @brief Function for polling stack events from the SoftDevice.
- *
- * The events are passed to the application using the registered event handlers.
- */
-void nrf_sdh_evts_poll(void);
-
-#endif // SOFTDEVICE_H_
diff --git a/examples/platforms/nrf52840/spi-slave.c b/examples/platforms/nrf52840/spi-slave.c
deleted file mode 100644
index 481b4b2..0000000
--- a/examples/platforms/nrf52840/spi-slave.c
+++ /dev/null
@@ -1,205 +0,0 @@
-/*
- * Copyright (c) 2019, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This file implements the OpenThread platform abstraction for SPIS communication.
- *
- */
-#include <assert.h>
-
-#include <utils/code_utils.h>
-#include <openthread/platform/spi-slave.h>
-
-#include <hal/nrf_gpio.h>
-#include <nrfx.h>
-#include <nrfx_spis.h>
-#include <platform-nrf5.h>
-
-#include "openthread-system.h"
-
-#if (SPIS_AS_SERIAL_TRANSPORT == 1)
-
-/**
- * SPI Slave transaction variables.
- */
-static void * sContext = NULL;
-static uint8_t * sOutputBuf = NULL;
-static uint16_t sOutputBufLen = 0;
-static uint8_t * sInputBuf = NULL;
-static uint16_t sInputBufLen = 0;
-static bool sRequestTransactionFlag = false;
-static bool sFurtherProcessingFlag = false;
-static otPlatSpiSlaveTransactionProcessCallback sProcessCallback = NULL;
-static otPlatSpiSlaveTransactionCompleteCallback sCompleteCallback = NULL;
-static const nrfx_spis_t sSpiSlaveInstance = NRFX_SPIS_INSTANCE(SPIS_INSTANCE);
-
-static void spisEventHandler(nrfx_spis_evt_t const *aEvent, void *aContext)
-{
- OT_UNUSED_VARIABLE(aContext);
-
- switch (aEvent->evt_type)
- {
- case NRFX_SPIS_BUFFERS_SET_DONE:
- if (sRequestTransactionFlag)
- {
- // Host IRQ pin is active low.
- nrf_gpio_pin_clear(SPIS_PIN_HOST_IRQ);
- }
- break;
-
- case NRFX_SPIS_XFER_DONE:
- // Ensure Host IRQ pin is set.
- nrf_gpio_pin_set(SPIS_PIN_HOST_IRQ);
-
- // Execute application callback.
- if (sCompleteCallback(sContext, sOutputBuf, sOutputBufLen, sInputBuf, sInputBufLen, aEvent->rx_amount))
- {
- // Further processing is required.
- sFurtherProcessingFlag = true;
-
- otSysEventSignalPending();
- }
- break;
-
- default:
- assert(false);
- break;
- }
-}
-
-void nrf5SpiSlaveInit(void)
-{
- // Intentionally empty.
-}
-
-void nrf5SpiSlaveDeinit(void)
-{
- sOutputBuf = NULL;
- sOutputBufLen = 0;
- sInputBuf = NULL;
- sInputBufLen = 0;
- sRequestTransactionFlag = false;
-
- otPlatSpiSlaveDisable();
-}
-
-void nrf5SpiSlaveProcess(void)
-{
- otEXPECT(sFurtherProcessingFlag == true);
-
- // Clear further processing flag.
- sFurtherProcessingFlag = false;
-
- // Perform any further processing if necessary.
- sProcessCallback(sContext);
-
-exit:
- return;
-}
-
-otError otPlatSpiSlaveEnable(otPlatSpiSlaveTransactionCompleteCallback aCompleteCallback,
- otPlatSpiSlaveTransactionProcessCallback aProcessCallback,
- void * aContext)
-{
- otError result = OT_ERROR_NONE;
- nrfx_err_t error = NRFX_SUCCESS;
- nrfx_spis_config_t config = NRFX_SPIS_DEFAULT_CONFIG;
-
- assert(aCompleteCallback != NULL);
- assert(aProcessCallback != NULL);
-
- // Check if SPI Slave interface is already enabled.
- otEXPECT_ACTION(sCompleteCallback == NULL, error = OT_ERROR_ALREADY);
-
- config.csn_pin = SPIS_PIN_CSN;
- config.miso_pin = SPIS_PIN_MISO;
- config.mosi_pin = SPIS_PIN_MOSI;
- config.sck_pin = SPIS_PIN_SCK;
- config.mode = SPIS_MODE;
- config.bit_order = SPIS_BIT_ORDER;
- config.irq_priority = SPIS_IRQ_PRIORITY;
-
- error = nrfx_spis_init(&sSpiSlaveInstance, &config, spisEventHandler, NULL);
- assert(error == NRFX_SUCCESS);
-
- // Set up Host IRQ pin.
- nrf_gpio_pin_set(SPIS_PIN_HOST_IRQ);
- nrf_gpio_cfg_output(SPIS_PIN_HOST_IRQ);
-
- // Set proper callback and context.
- sProcessCallback = aProcessCallback;
- sCompleteCallback = aCompleteCallback;
- sContext = aContext;
-
-exit:
- return result;
-}
-
-void otPlatSpiSlaveDisable(void)
-{
- nrfx_spis_uninit(&sSpiSlaveInstance);
-}
-
-otError otPlatSpiSlavePrepareTransaction(uint8_t *aOutputBuf,
- uint16_t aOutputBufLen,
- uint8_t *aInputBuf,
- uint16_t aInputBufLen,
- bool aRequestTransactionFlag)
-{
- otError result = OT_ERROR_NONE;
- nrfx_err_t error = NRFX_SUCCESS;
- nrf_spis_semstat_t semaphore_status = nrf_spis_semaphore_status_get(sSpiSlaveInstance.p_reg);
-
- assert(sCompleteCallback != NULL);
-
- otEXPECT_ACTION(((semaphore_status != NRF_SPIS_SEMSTAT_SPIS) && (semaphore_status != NRF_SPIS_SEMSTAT_CPUPENDING)),
- error = OT_ERROR_BUSY);
-
- if (aOutputBuf != NULL)
- {
- sOutputBuf = aOutputBuf;
- sOutputBufLen = aOutputBufLen;
- }
-
- if (aInputBuf != NULL)
- {
- sInputBuf = aInputBuf;
- sInputBufLen = aInputBufLen;
- }
-
- sRequestTransactionFlag = aRequestTransactionFlag;
-
- error = nrfx_spis_buffers_set(&sSpiSlaveInstance, sOutputBuf, sOutputBufLen, sInputBuf, sInputBufLen);
- assert(error == NRFX_SUCCESS);
-
-exit:
- return result;
-}
-
-#endif // SPIS_AS_SERIAL_TRANSPORT == 1
diff --git a/examples/platforms/nrf52840/system.c b/examples/platforms/nrf52840/system.c
deleted file mode 100644
index c1a1d30..0000000
--- a/examples/platforms/nrf52840/system.c
+++ /dev/null
@@ -1,151 +0,0 @@
-/*
- * Copyright (c) 2016, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This file includes the platform-specific initializers.
- *
- */
-
-#include <openthread-core-config.h>
-#include <openthread/config.h>
-
-#include <openthread/platform/logging.h>
-
-#include "openthread-system.h"
-#include "platform-fem.h"
-#include "platform-nrf5.h"
-#include <drivers/clock/nrf_drv_clock.h>
-#include <nrf.h>
-
-#include <openthread/config.h>
-
-extern bool gPlatformPseudoResetWasRequested;
-
-void __cxa_pure_virtual(void)
-{
- while (1)
- ;
-}
-
-void otSysInit(int argc, char *argv[])
-{
- OT_UNUSED_VARIABLE(argc);
- OT_UNUSED_VARIABLE(argv);
-
- if (gPlatformPseudoResetWasRequested)
- {
- otSysDeinit();
- }
-
-#if !SOFTDEVICE_PRESENT
- // Enable I-code cache
- NRF_NVMC->ICACHECNF = NVMC_ICACHECNF_CACHEEN_Enabled;
-#endif
-
- nrf_drv_clock_init();
-
-#if (OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED) || \
- (OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_NCP_SPINEL)
- nrf5LogInit();
-#endif
- nrf5AlarmInit();
- nrf5RandomInit();
- if (!gPlatformPseudoResetWasRequested)
- {
-#if ((UART_AS_SERIAL_TRANSPORT == 1) || (USB_CDC_AS_SERIAL_TRANSPORT == 1))
- nrf5UartInit();
-#endif
- nrf5CryptoInit();
- }
- else
- {
-#if ((UART_AS_SERIAL_TRANSPORT == 1) || (USB_CDC_AS_SERIAL_TRANSPORT == 1))
- nrf5UartClearPendingData();
-#endif
- }
-
-#if (SPIS_AS_SERIAL_TRANSPORT == 1)
- nrf5SpiSlaveInit();
-#endif
- nrf5MiscInit();
- nrf5RadioInit();
- nrf5TempInit();
-
-#if PLATFORM_FEM_ENABLE_DEFAULT_CONFIG
- PlatformFemSetConfigParams(&PLATFORM_FEM_DEFAULT_CONFIG);
-#endif
-
- gPlatformPseudoResetWasRequested = false;
-}
-
-void otSysDeinit(void)
-{
- nrf5TempDeinit();
- nrf5RadioDeinit();
- nrf5MiscDeinit();
-#if (SPIS_AS_SERIAL_TRANSPORT == 1)
- nrf5SpiSlaveDeinit();
-#endif
- if (!gPlatformPseudoResetWasRequested)
- {
- nrf5CryptoDeinit();
-#if ((UART_AS_SERIAL_TRANSPORT == 1) || (USB_CDC_AS_SERIAL_TRANSPORT == 1))
- nrf5UartDeinit();
-#endif
- }
- nrf5RandomDeinit();
- nrf5AlarmDeinit();
-#if (OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED) || \
- (OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_NCP_SPINEL)
- nrf5LogDeinit();
-#endif
-}
-
-bool otSysPseudoResetWasRequested(void)
-{
- return gPlatformPseudoResetWasRequested;
-}
-
-void otSysProcessDrivers(otInstance *aInstance)
-{
- nrf5RadioProcess(aInstance);
-#if ((UART_AS_SERIAL_TRANSPORT == 1) || (USB_CDC_AS_SERIAL_TRANSPORT == 1))
- nrf5UartProcess();
-#endif
- nrf5TempProcess();
-#if (SPIS_AS_SERIAL_TRANSPORT == 1)
- nrf5SpiSlaveProcess();
-#endif
- nrf5AlarmProcess(aInstance);
-}
-
-__WEAK void otSysEventSignalPending(void)
-{
- // Intentionally empty
-}
diff --git a/examples/platforms/nrf52840/uart.c b/examples/platforms/nrf52840/uart.c
deleted file mode 100644
index c9b1ff5..0000000
--- a/examples/platforms/nrf52840/uart.c
+++ /dev/null
@@ -1,343 +0,0 @@
-/*
- * Copyright (c) 2016, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This file implements the OpenThread platform abstraction for UART communication.
- *
- */
-
-#include <openthread-core-config.h>
-#include <openthread/config.h>
-
-#include <stddef.h>
-#include <stdint.h>
-
-#include <utils/code_utils.h>
-#include <openthread/platform/toolchain.h>
-#include <openthread/platform/uart.h>
-
-#include "openthread-system.h"
-
-#include "platform-nrf5.h"
-#include <drivers/clock/nrf_drv_clock.h>
-#include <hal/nrf_gpio.h>
-#include <hal/nrf_uart.h>
-
-#if (UART_AS_SERIAL_TRANSPORT == 1)
-
-bool sUartEnabled = false;
-
-/**
- * UART TX buffer variables.
- */
-static const uint8_t *sTransmitBuffer = NULL;
-static uint16_t sTransmitLength = 0;
-static bool sTransmitDone = 0;
-
-/**
- * UART RX ring buffer variables.
- */
-static uint8_t sReceiveBuffer[UART_RX_BUFFER_SIZE];
-static uint16_t sReceiveHead = 0;
-static uint16_t sReceiveTail = 0;
-
-/**
- * Function for checking if RX buffer is full.
- *
- * @retval true RX buffer is full.
- * @retval false RX buffer is not full.
- */
-static __INLINE bool isRxBufferFull()
-{
- uint16_t next = (sReceiveHead + 1) % UART_RX_BUFFER_SIZE;
- return (next == sReceiveTail);
-}
-
-/**
- * Function for checking if RX buffer is empty.
- *
- * @retval true RX buffer is empty.
- * @retval false RX buffer is not empty.
- */
-static __INLINE bool isRxBufferEmpty()
-{
- return (sReceiveHead == sReceiveTail);
-}
-
-/**
- * Function for notifying application about new bytes received.
- */
-static void processReceive(void)
-{
- // Set head position to not be changed during read procedure.
- uint16_t head = sReceiveHead;
-
- otEXPECT(isRxBufferEmpty() == false);
-
- // In case head roll back to the beginning of the buffer, notify about left
- // bytes from the end of the buffer.
- if (head < sReceiveTail)
- {
- otPlatUartReceived(&sReceiveBuffer[sReceiveTail], (UART_RX_BUFFER_SIZE - sReceiveTail));
- sReceiveTail = 0;
- }
-
- // Notify about received bytes.
- if (head > sReceiveTail)
- {
- otPlatUartReceived(&sReceiveBuffer[sReceiveTail], (head - sReceiveTail));
- sReceiveTail = head;
- }
-
-exit:
- return;
-}
-
-otError otPlatUartFlush(void)
-{
- return OT_ERROR_NOT_IMPLEMENTED;
-}
-
-/**
- * Function for notifying application about transmission being done.
- */
-static void processTransmit(void)
-{
- otEXPECT(sTransmitBuffer != NULL);
-
- if (sTransmitDone)
- {
- // Clear Transmition transaction and notify application.
- sTransmitBuffer = NULL;
- sTransmitLength = 0;
- sTransmitDone = false;
- otPlatUartSendDone();
- }
-
-exit:
- return;
-}
-
-void nrf5UartProcess(void)
-{
- processReceive();
- processTransmit();
-}
-
-void nrf5UartInit(void)
-{
- // Intentionally empty.
-}
-
-void nrf5UartClearPendingData(void)
-{
- // Intentionally empty.
-}
-
-void nrf5UartDeinit(void)
-{
- if (sUartEnabled)
- {
- otPlatUartDisable();
- }
-}
-
-otError otPlatUartEnable(void)
-{
- otError error = OT_ERROR_NONE;
-
- otEXPECT_ACTION(sUartEnabled == false, error = OT_ERROR_ALREADY);
-
- // Set up TX and RX pins.
- nrf_gpio_pin_set(UART_PIN_TX);
- nrf_gpio_cfg_output(UART_PIN_TX);
- nrf_gpio_cfg_input(UART_PIN_RX, NRF_GPIO_PIN_NOPULL);
- nrf_uart_txrx_pins_set(UART_INSTANCE, UART_PIN_TX, UART_PIN_RX);
-
-#if (UART_HWFC_ENABLED == 1)
- // Set up CTS and RTS pins.
- nrf_gpio_cfg_input(UART_PIN_CTS, NRF_GPIO_PIN_NOPULL);
- nrf_gpio_pin_set(UART_PIN_RTS);
- nrf_gpio_cfg_output(UART_PIN_RTS);
- nrf_uart_hwfc_pins_set(UART_INSTANCE, UART_PIN_RTS, UART_PIN_CTS);
-
- nrf_uart_configure(UART_INSTANCE, UART_PARITY, NRF_UART_HWFC_ENABLED);
-#else
- nrf_uart_configure(UART_INSTANCE, UART_PARITY, NRF_UART_HWFC_DISABLED);
-#endif
-
- // Configure baudrate.
- nrf_uart_baudrate_set(UART_INSTANCE, UART_BAUDRATE);
-
- // Clear UART specific events.
- nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_TXDRDY);
- nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_ERROR);
- nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_RXDRDY);
-
- // Enable interrupts for TX.
- nrf_uart_int_enable(UART_INSTANCE, NRF_UART_INT_MASK_TXDRDY);
-
- // Enable interrupts for RX.
- nrf_uart_int_enable(UART_INSTANCE, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR);
-
- // Configure NVIC to handle UART interrupts.
- NVIC_SetPriority(UART_IRQN, UART_IRQ_PRIORITY);
- NVIC_ClearPendingIRQ(UART_IRQN);
- NVIC_EnableIRQ(UART_IRQN);
-
- // Start HFCLK
- nrf_drv_clock_hfclk_request(NULL);
-
- while (!nrf_drv_clock_hfclk_is_running())
- {
- }
-
- // Enable UART instance, and start RX on it.
- nrf_uart_enable(UART_INSTANCE);
- nrf_uart_task_trigger(UART_INSTANCE, NRF_UART_TASK_STARTRX);
-
- sUartEnabled = true;
-
-exit:
- return error;
-}
-
-otError otPlatUartDisable(void)
-{
- otError error = OT_ERROR_NONE;
-
- otEXPECT_ACTION(sUartEnabled == true, error = OT_ERROR_ALREADY);
-
- // Disable NVIC interrupt.
- NVIC_DisableIRQ(UART_IRQN);
- NVIC_ClearPendingIRQ(UART_IRQN);
- NVIC_SetPriority(UART_IRQN, 0);
-
- // Disable interrupts for TX.
- nrf_uart_int_disable(UART_INSTANCE, NRF_UART_INT_MASK_TXDRDY);
-
- // Disable interrupts for RX.
- nrf_uart_int_disable(UART_INSTANCE, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR);
-
- // Disable UART instance.
- nrf_uart_disable(UART_INSTANCE);
-
- // Release HF clock.
- nrf_drv_clock_hfclk_release();
-
- sUartEnabled = false;
-
-exit:
- return error;
-}
-
-otError otPlatUartSend(const uint8_t *aBuf, uint16_t aBufLength)
-{
- otError error = OT_ERROR_NONE;
-
- otEXPECT_ACTION(sTransmitBuffer == NULL, error = OT_ERROR_BUSY);
-
- // Set up transmit buffer and its size without counting first triggered byte.
- sTransmitBuffer = aBuf;
- sTransmitLength = aBufLength - 1;
-
- // Initiate Transmission process.
- nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_TXDRDY);
- nrf_uart_txd_set(UART_INSTANCE, *sTransmitBuffer++);
- nrf_uart_task_trigger(UART_INSTANCE, NRF_UART_TASK_STARTTX);
-
-exit:
- return error;
-}
-
-/**
- * Interrupt handler of UART0 peripherial.
- */
-void UARTE0_UART0_IRQHandler(void)
-{
- // Check if any error has been detected.
- if (nrf_uart_event_check(UART_INSTANCE, NRF_UART_EVENT_ERROR))
- {
- // Clear error event and ignore erronous byte in RXD register.
- nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_ERROR);
- nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_RXDRDY);
- }
- else if (nrf_uart_event_check(UART_INSTANCE, NRF_UART_EVENT_RXDRDY))
- {
- // Clear RXDRDY event.
- nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_RXDRDY);
-
- // Read byte from the UART buffer.
- uint8_t byte = nrf_uart_rxd_get(UART_INSTANCE);
-
- if (!isRxBufferFull())
- {
- sReceiveBuffer[sReceiveHead] = byte;
- sReceiveHead = (sReceiveHead + 1) % UART_RX_BUFFER_SIZE;
-
- otSysEventSignalPending();
- }
- }
-
- if (nrf_uart_event_check(UART_INSTANCE, NRF_UART_EVENT_TXDRDY))
- {
- // Clear TXDRDY event.
- nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_TXDRDY);
-
- // Send any more bytes if available or call application about TX done.
- if (sTransmitLength)
- {
- nrf_uart_txd_set(UART_INSTANCE, *sTransmitBuffer++);
- sTransmitLength--;
- }
- else
- {
- sTransmitDone = true;
- nrf_uart_task_trigger(UART_INSTANCE, NRF_UART_TASK_STOPTX);
-
- otSysEventSignalPending();
- }
- }
-}
-
-#endif // UART_AS_SERIAL_TRANSPORT == 1
-
-/**
- * The UART driver weak functions definition.
- *
- */
-OT_TOOL_WEAK void otPlatUartSendDone(void)
-{
-}
-
-OT_TOOL_WEAK void otPlatUartReceived(const uint8_t *aBuf, uint16_t aBufLength)
-{
- OT_UNUSED_VARIABLE(aBuf);
- OT_UNUSED_VARIABLE(aBufLength);
-}
diff --git a/examples/platforms/nrf528xx/DIAG.md b/examples/platforms/nrf528xx/DIAG.md
new file mode 100644
index 0000000..b54448a
--- /dev/null
+++ b/examples/platforms/nrf528xx/DIAG.md
@@ -0,0 +1,154 @@
+## Diagnostic module
+
+nRF52811 and nRF52840 ports extend [OpenThread Diagnostics Module][DIAG].
+
+New commands allow for more accurate low level radio testing.
+
+### New commands
+ * [diag ccathreshold](#diag-ccathreshold)
+ * [diag gpio](#diag-gpio)
+ * [diag id](#diag-id)
+ * [diag listen](#diag-listen)
+ * [diag temp](#diag-temp)
+ * [diag transmit](#diag-transmit)
+
+### Diagnostic radio packet
+[diag listen](#diag-listen) and [diag transmit](#diag-transmit) use radio frame payload specified below.
+
+ ```c
+ struct PlatformDiagMessage
+ {
+ const char mMessageDescriptor[11];
+ uint8_t mChannel;
+ int16_t mID;
+ uint32_t mCnt;
+ };
+ ```
+
+`mMessageDescriptor` is a constant string `"DiagMessage"`.<br />
+`mChannel` contains the channel number on which the packet was transmitted.<br />
+`mID` contains the board ID set with the [diag id](#diag-id) command.<br />
+`mCnt` is a counter incremented every time the board transmits diagnostic radio packet.
+
+If the [listen mode](#diag-listen) is enabled and OpenThread was built with the`DEFAULT_LOGGING` flag, JSON string is printed every time a diagnostic radio packet is received.
+
+```JSON
+ {"Frame":{
+ "LocalChannel":"<listening board channel>",
+ "RemoteChannel":"<mChannel>",
+ "CNT":"<mCnt>",
+ "LocalID":"<listening board ID>",
+ "RemoteID":"<mID>",
+ "RSSI":"<packet RSSI>"
+ }}
+```
+
+### diag ccathreshold
+Get the current CCA threshold.
+
+### diag ccathreshold \<threshold\>
+Set the CCA threshold.
+
+Value range: 0 to 255.
+
+Default: `45`.
+
+### diag gpio
+Manage GPIO pins.
+
+### diag gpio \<pinnum\>
+Return the current value of the gpio.
+
+Note: \<pinnum\> is an integer that combines port and pin into a single,
+contiguous number space as follows:
+```
+ pinnum = (port * 32) + pin
+```
+See also the [`NRF_GPIO_PIN_MAP`](../../../third_party/NordicSemiconductor/hal/nrf_gpio.h) macro.
+
+```bash
+> diag gpio 47
+gpio 47 = 0
+```
+
+### diag gpio out \<pinnum\>
+Set the given GPIO to the output mode.
+```bash
+> diag gpio out 47
+gpio 47: out
+```
+
+### diag gpio in \<pinnum\>
+Sets the given GPIO to the input mode with no pull variant.
+```bash
+> diag gpio in 47
+gpio 47: in no pull
+```
+
+### diag gpio set \<pinnum\>
+Sets the given output gpio to high.
+```bash
+> diag gpio set 47
+gpio 47 = 1
+```
+
+### diag gpio clr \<pinnum\>
+Sets the given output gpio to low.
+```bash
+> diag gpio clr 47
+gpio 47 = 0
+```
+
+### diag id
+Get board ID.
+
+### diag id \<id\>
+Set board ID.
+
+Value range: 0 to 32767.
+
+Default: `-1`.
+
+### diag listen
+Get the listen state.
+
+### diag listen \<listen\>
+Set the listen state.
+
+`0` disables the listen state.<br />
+`1` enables the listen state.
+
+By default, the listen state is disabled.
+
+### diag temp
+Get the temperature from the internal temperature sensor (in degrees Celsius).
+
+### diag transmit
+Get the message count and the interval between the messages that will be transmitted after `diag transmit start`.
+
+### diag transmit interval \<interval\>
+Set the interval in ms between the transmitted messages.
+
+Value range: 1 to 4294967295.
+
+Default: `1`.
+
+### diag transmit count \<count\>
+Set the number of messages to be transmitted.
+
+Value range: 1 to 2147483647<br />
+or<br />
+For continuous transmission: `-1`
+
+Default: `1`
+
+### diag transmit stop
+Stop the ongoing transmission regardless of the remaining number of messages to be sent.
+
+### diag transmit start
+Start transmiting messages with specified interval.
+
+### diag transmit carrier
+Start transmitting continuous carrier wave.
+
+[DIAG]: ./../../../src/core/diags/README.md
diff --git a/examples/platforms/nrf528xx/Makefile.am b/examples/platforms/nrf528xx/Makefile.am
new file mode 100644
index 0000000..b726c17
--- /dev/null
+++ b/examples/platforms/nrf528xx/Makefile.am
@@ -0,0 +1,55 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+# Use automake includes since we cannot use SUBDIRS feature due to cleanup
+# errors - few targets may use the same source file but dependency file is
+# created only once which leads to errors when auto-generated Makefile tries
+# to remove .Po files that were already removed
+
+if OPENTHREAD_EXAMPLES_NRF52811
+include nrf52811/Makefile.am
+endif
+
+if OPENTHREAD_EXAMPLES_NRF52833
+include nrf52833/Makefile.am
+endif
+
+if OPENTHREAD_EXAMPLES_NRF52840
+include nrf52840/Makefile.am
+endif
+
+include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
+
+PRETTY_FILES = \
+ src/platform-fem.h \
+ src/platform-nrf5.h \
+ $(wildcard $(srcdir)/**/*.c) \
+ $(wildcard $(srcdir)/**/*.h) \
+ $(NULL)
+
+include $(abs_top_nlbuild_autotools_dir)/automake/post.am
diff --git a/examples/platforms/nrf528xx/README.md b/examples/platforms/nrf528xx/README.md
new file mode 100644
index 0000000..98715c7
--- /dev/null
+++ b/examples/platforms/nrf528xx/README.md
@@ -0,0 +1,16 @@
+# OpenThread on nRF528xx Example
+
+This directory contains example platform drivers for [Nordic Semiconductor nRF52840 SoC][nRF52840], [Nordic Semiconductor nRF52833 SoC][nRF52833] and [Nordic Semiconductor nRF52811 SoC][nRF52811].
+
+[nRF52840]: https://www.nordicsemi.com/Products/Low-power-short-range-wireless/nRF52840
+[nRF52833]: https://www.nordicsemi.com/Products/Low-power-short-range-wireless/nRF52833
+[nRF52811]: https://www.nordicsemi.com/Products/Low-power-short-range-wireless/nRF52811
+
+To learn more about building and running the examples please check:
+* [OpenThread on nRF52840 examples][nrf52840-page]
+* [OpenThread on nRF52833 examples][nrf52833-page]
+* [OpenThread on nRF52811 examples][nrf52811-page]
+
+[nrf52840-page]: ./nrf52840/README.md
+[nrf52833-page]: ./nrf52833/README.md
+[nrf52811-page]: ./nrf52811/README.md
\ No newline at end of file
diff --git a/examples/platforms/nrf528xx/nrf52811/Makefile.am b/examples/platforms/nrf528xx/nrf52811/Makefile.am
new file mode 100644
index 0000000..8011fc6
--- /dev/null
+++ b/examples/platforms/nrf528xx/nrf52811/Makefile.am
@@ -0,0 +1,136 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
+
+lib_LIBRARIES = \
+ libopenthread-nrf52811.a \
+ libopenthread-nrf52811-sdk.a \
+ $(NULL)
+
+# Do not enable -pedantic-errors for nRF52811 driver library
+override CFLAGS := $(filter-out -pedantic-errors,$(CFLAGS))
+override CXXFLAGS := $(filter-out -pedantic-errors,$(CXXFLAGS))
+
+# Do not enable -Wundef for nRF52811 driver library
+override CFLAGS := $(filter-out -Wundef,$(CFLAGS))
+override CXXFLAGS := $(filter-out -Wundef,$(CXXFLAGS))
+
+COMMONCPPFLAGS = \
+ -DCONFIG_GPIO_AS_PINRESET \
+ -DNRF52811_XXAA \
+ -I$(srcdir) \
+ -I$(top_srcdir)/include \
+ -I$(top_srcdir)/examples/platforms \
+ -I$(top_srcdir)/examples/platforms/nrf528xx/src \
+ -I$(top_srcdir)/src/core \
+ -I$(top_srcdir)/third_party/NordicSemiconductor \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/cmsis \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/dependencies \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/clock \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/common \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/hal \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/mac_features \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/fem/three_pin_gpio \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/mac_features/ack_generator \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/rsch \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/rsch/raal \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/power \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/systick \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/app_error \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/atfifo \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/atomic \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/block_dev \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/delay \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/utf_converter \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx/hal \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx/drivers \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx/drivers/include \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx/mdk \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx/soc \
+ $(NULL)
+
+PLATFORM_COMMON_SOURCES = \
+ src/alarm.c \
+ src/diag.c \
+ src/entropy.c \
+ src/fem.c \
+ src/flash.c \
+ src/logging.c \
+ src/misc.c \
+ src/radio.c \
+ src/spi-slave.c \
+ src/system.c \
+ src/temp.c \
+ src/uart.c \
+ $(NULL)
+
+SINGLEPHY_SOURCES = \
+ src/flash_nosd.c \
+ $(NULL)
+
+SINGLEPHY_CPPFLAGS = \
+ -DRAAL_SINGLE_PHY=1 \
+ $(NULL)
+
+PLATFORM_SOURCES = \
+ $(PLATFORM_COMMON_SOURCES) \
+ $(NULL)
+
+libopenthread_nrf52811_a_CPPFLAGS = \
+ $(COMMONCPPFLAGS) \
+ $(SINGLEPHY_CPPFLAGS) \
+ $(NULL)
+
+libopenthread_nrf52811_a_SOURCES = \
+ $(PLATFORM_SOURCES) \
+ $(SINGLEPHY_SOURCES) \
+ $(NULL)
+
+libopenthread_nrf52811_sdk_a_CPPFLAGS = \
+ $(COMMONCPPFLAGS) \
+ $(SINGLEPHY_CPPFLAGS) \
+ $(NULL)
+
+libopenthread_nrf52811_sdk_a_SOURCES = \
+ $(PLATFORM_SOURCES) \
+ $(SINGLEPHY_SOURCES) \
+ $(NULL)
+
+Dash = -
+
+libopenthread_nrf52811_a_LIBADD = \
+ $(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o") \
+ $(shell find $(top_builddir)/third_party/jlink/SEGGER_RTT_V640/RTT $(Dash)type f $(Dash)name "*.o")
+
+libopenthread_nrf52811_sdk_a_LIBADD = \
+ $(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o")
+
+include $(abs_top_nlbuild_autotools_dir)/automake/post.am
diff --git a/examples/platforms/nrf528xx/nrf52811/Makefile.platform.am b/examples/platforms/nrf528xx/nrf52811/Makefile.platform.am
new file mode 100644
index 0000000..f05f377
--- /dev/null
+++ b/examples/platforms/nrf528xx/nrf52811/Makefile.platform.am
@@ -0,0 +1,47 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+#
+# nrf52811 platform-specific Makefile
+#
+
+LDADD_COMMON += \
+ $(top_builddir)/examples/platforms/nrf528xx/libopenthread-nrf52811.a \
+ $(top_builddir)/third_party/NordicSemiconductor/libnordicsemi-nrf52811-sdk.a \
+ $(top_builddir)/third_party/NordicSemiconductor/libnordicsemi-nrf52811-radio-driver.a \
+ $(NULL)
+
+if OPENTHREAD_ENABLE_CUSTOM_LINKER_FILE
+LDFLAGS_COMMON += \
+ -T $(OPENTHREAD_CUSTOM_LINKER_FILE) \
+ $(NULL)
+else
+LDFLAGS_COMMON += \
+ -T $(top_srcdir)/examples/platforms/nrf528xx/nrf52811/nrf52811.ld \
+ $(NULL)
+endif
diff --git a/examples/platforms/nrf528xx/nrf52811/README.md b/examples/platforms/nrf528xx/nrf52811/README.md
new file mode 100644
index 0000000..d667022
--- /dev/null
+++ b/examples/platforms/nrf528xx/nrf52811/README.md
@@ -0,0 +1,359 @@
+# OpenThread on nRF52811 Example
+
+This directory contains example platform drivers for [Nordic Semiconductor nRF52811 SoC][nRF52811].
+
+[nRF52811]: https://www.nordicsemi.com/Products/Low-power-short-range-wireless/nRF52811
+
+This SoC is meant to be used in the configuration that involves the Host Processor and the IEEE 802.15.4 radio.
+In this configuration, the full OpenThread stack is running on the Host Processor and the nRF52811 SoC acts as an IEEE 802.15.4 radio.
+The radio is running a minimal OpenThread implementation that allows for communication between the Host Processor and the nRF52811.
+In this architecture the nRF52811 SoC device is called RCP (Radio Co-Processor).
+
+The nRF52811 platform is currently under development.
+
+For the SoC capable to a run full OpenThread stack, see the [nRF52840 platform][nRF52840-page].
+
+[nRF52840-page]: ./../nrf52840/README.md
+
+## Emulation on nRF52840
+
+You can use examples for nRF52811 on nRF52840 without any changes in the generated binary files. This allows for easier testing in early stages of development.
+
+## Prerequisites
+
+Before you start building the examples, you must download and install the toolchain and the tools required for flashing and debugging.
+
+### Toolchain
+
+Download and install the [GNU toolchain for ARM Cortex-M][gnu-toolchain].
+
+[gnu-toolchain]: https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-rm
+
+To install the GNU toolchain and its dependencies, run the following commands in Bash:
+
+```bash
+$ cd <path-to-openthread>
+$ ./script/bootstrap
+```
+
+### Flashing and debugging tools
+
+[nRF-Command-Line-Tools]: https://www.nordicsemi.com/Software-and-Tools/Development-Tools/nRF-Command-Line-Tools
+
+Install the [nRF Command Line Tools][nRF-Command-Line-Tools] to flash, debug, and make use of logging features on the nRF52811 DK with SEGGER J-Link.
+
+## Building the examples
+
+With this platform, you can build:
+ - Limited version of CLI example (e.g. without Thread commissioning functionality)
+ - RCP example that consists of two parts:
+ - firmware that is flashed to the nRF52811 SoC
+ - host executables to be executed on a POSIX platform in case of the RCP usage
+
+### Building host executables
+```bash
+$ cd <path-to-openthread>
+$ ./bootstrap
+$ make -f src/posix/Makefile-posix
+```
+
+After a successful build, executables can be found in
+`<path-to-openthread>/openthread/output/posix/<system-architecture>/bin`.
+It is recommended to copy them to `/usr/bin` for easier access.
+
+### Building the firmware with UART support
+
+To build the firmware using default UART RCP transport, run the following make commands:
+
+```bash
+$ cd <path-to-openthread>
+$ ./bootstrap
+$ make -f examples/Makefile-nrf52811
+```
+
+After a successful build, the `elf` files can be found in
+`<path-to-openthread>/output/nrf52811/bin`.
+You can convert them to hex using `arm-none-eabi-objcopy`:
+```bash
+$ arm-none-eabi-objcopy -O ihex ot-cli-mtd ot-cli-mtd.hex
+$ arm-none-eabi-objcopy -O ihex ot-rcp ot-rcp.hex
+```
+
+### Building the firmware with native SPI support
+
+You can build the libraries with support for the native SPI Slave.
+To do so, build the libraries with the following parameter:
+```
+$ make -f examples/Makefile-nrf52811 NCP_SPI=1
+```
+
+With this option enabled, the RCP example can communicate through SPI with wpantund (provided that the wpantund host supports SPI Master). To achieve this communication, choose the right SPI device in the wpantund configuration file, `/etc/wpantund.conf`. See the following example.
+
+
+```
+Config:NCP:SocketPath "system:/usr/bin/ot-ncp /usr/bin/spi-hdlc-adapter -- '--stdio -i /sys/class/gpio/gpio25 /dev/spidev0.1'"
+```
+
+In this example, [spi-hdlc-adapter][spi-hdlc-adapter] is a tool that you can use to communicate between RCP and wpantund over SPI. For this example, `spi-hdlc-adapter` is installed in `/usr/bin`.
+
+The default SPI Slave pin configuration for nRF52811 is defined in `examples/platforms/nrf52811/platform-config.h`.
+
+[spi-hdlc-adapter]: https://github.com/openthread/openthread/tree/master/tools/spi-hdlc-adapter
+
+### IEEE EUI-64 address
+
+When the Thread device is configured to obtain the Thread Network security credentials with either Thread Commissioning or an out-of-band method, the extended MAC address should be constructed out of the globally unique IEEE EUI-64.
+
+The IEEE EUI-64 address consists of two parts:
+ - 24 bits of MA-L (MAC Address Block Large), formerly called OUI (Organizationally Unique Identifier)
+ - 40-bit device unique identifier
+
+By default, the device uses Nordic Semiconductor's MA-L (f4-ce-36). You can modify it by overwriting the `OPENTHREAD_CONFIG_STACK_VENDOR_OUI` define, located in the `openthread-core-nrf52811-config.h` file. This value must be publicly registered by the IEEE Registration Authority.
+
+You can also provide the full IEEE EUI-64 address by providing a custom `otPlatRadioGetIeeeEui64` function. To do this, define the flag `OPENTHREAD_CONFIG_ENABLE_PLATFORM_EUI64_CUSTOM_SOURCE`.
+
+After the Thread Network security credentials have been successfully obtained, the device uses randomly generated extended MAC address.
+
+## Flashing binaries
+
+Once the examples and libraries are built, flash the compiled binaries onto nRF52811
+using `nrfjprog` that is part of the [nRF Command Line Tools][nRF-Command-Line-Tools].
+
+Run the following command:
+
+```bash
+$ nrfjprog -f nrf52 --chiperase --program output/nrf52811/bin/ot-cli-mtd.hex --reset
+```
+
+## Running the example
+
+To test the example:
+
+1. Prepare two boards.
+
+2. Flash one with the `CLI MTD Example` (ot-cli-mtd.hex, as shown above).
+
+3. Flash `RCP Example` (ot-rcp.hex) to the other board.
+
+4. Connect the RCP to the PC.
+
+5. Start the ot-cli host application and connect with the RCP.
+ It is assumed that the default UART version of RCP is being used (make executed without the NCP-SPI=1 flag).
+ On Linux system, call a port name, for example `/dev/ttyACM0` for the first connected development kit, and `/dev/ttyACM1` for the second one.
+
+ ```bash
+ $ /usr/bin/ot-cli /dev/ttyACM0 115200
+ ```
+
+ You are now connected with the CLI on the first board
+
+6. Use the following commands to form a network:
+
+ ```bash
+ > dataset init new
+ Done
+ > dataset
+ Active Timestamp: 1
+ Channel: 13
+ Channel Mask: 07fff800
+ Ext PAN ID: d63e8e3e495ebbc3
+ Mesh Local Prefix: fd3d:b50b:f96d:722d/64
+ Master Key: dfd34f0f05cad978ec4e32b0413038ff
+ Network Name: OpenThread-8f28
+ PAN ID: 0x8f28
+ PSKc: c23a76e98f1a6483639b1ac1271e2e27
+ Security Policy: 0, onrcb
+ Done
+ > dataset commit active
+ Done
+ > ifconfig up
+ Done
+ > thread start
+ Done
+ ```
+
+ After a couple of seconds the node will become a Leader of the network.
+
+ ```bash
+ > state
+ leader
+ ```
+
+7. Open a terminal connection on the second board and attach a node to the network:
+
+ a. Start a terminal emulator like screen.
+
+ b. Connect to the used COM port with the following direct UART settings:
+
+ * Baud rate: 115200
+ * 8 data bits
+ * 1 stop bit
+ * No parity
+ * HW flow control: RTS/CTS
+ This allows you to view the raw UART output.
+
+ c. Run the following command to connect to the second board.
+
+ ```shell
+ screen /dev/ttyACM1 115200
+ ```
+
+ You are now connected with the CLI on the second board
+
+8. Use the following commands to attach to the network on the second board:
+
+ ```bash
+ > dataset masterkey dfd34f0f05cad978ec4e32b0413038ff
+ Done
+ > dataset commit active
+ Done
+ > ifconfig up
+ Done
+ > thread start
+ Done
+ ```
+
+ After a couple of seconds the second node will attach and become a Child.
+
+ ```bash
+ > state
+ child
+ ```
+
+9. List all IPv6 addresses of the first board.
+
+ ```bash
+ > ipaddr
+ fd3d:b50b:f96d:722d:0:ff:fe00:fc00
+ fd3d:b50b:f96d:722d:0:ff:fe00:c00
+ fd3d:b50b:f96d:722d:7a73:bff6:9093:9117
+ fe80:0:0:0:6c41:9001:f3d6:4148
+ Done
+ ```
+
+10. Choose one of them and send an ICMPv6 ping from the second board.
+
+ ```bash
+ > ping fd3d:b50b:f96d:722d:7a73:bff6:9093:9117
+ 16 bytes from fd3d:b50b:f96d:722d:558:f56b:d688:799: icmp_seq=1 hlim=64 time=24ms
+ ```
+
+For a list of all available commands, visit [OpenThread CLI Reference README.md][CLI].
+
+[CLI]: ./../../../src/cli/README.md
+
+## SEGGER J-Link tools
+
+SEGGER J-Link tools allow to debug and flash generated firmware using on-board debugger or external one.
+
+### Working with RTT logging
+
+By default, the OpenThread's logging module provides functions to output logging
+information over SEGGER's Real Time Transfer (RTT).
+
+You can set the desired log level by using the `OPENTHREAD_CONFIG_LOG_LEVEL` define.
+
+To enable the highest verbosity level, append `FULL_LOGS` flag to the `make` command:
+```
+$ make -f examples/Makefile-nrf52811 FULL_LOGS=1
+```
+
+#### Enable logging on Windows
+
+1. Connect the DK to your machine with a USB cable.
+2. Run `J-Link RTT Viewer`. The configuration window appears.
+3. From the Specify Target Device dropdown menu, select `NRF52810_XXAA`.
+4. From the Target Interface & Speed dropdown menu, select `SWD`.
+
+#### Enable logging on Linux
+
+1. Connect the DK to your machine with a USB cable.
+2. Run `JLinkExe` to connect to the target. For example:
+```
+JLinkExe -device NRF52810_XXAA -if SWD -speed 4000 -autoconnect 1 -SelectEmuBySN <SEGGER_ID> -RTTTelnetPort 19021
+```
+3. Run `JLinkRTTTelnet` to obtain the RTT logs from the connected device in a separate console. For example:
+```
+JLinkRTTClient -RTTTelnetPort 19021
+```
+
+### Mass Storage Device known issue
+
+Depending on your version, due to a known issue in SEGGER's J-Link firmware, you might experience data corruption or data drops if you use the serial port. You can avoid this issue by disabling the Mass Storage Device.
+
+#### Disabling the Mass Storage Device on Windows
+
+1. Connect the DK to your machine with a USB cable.
+2. Run `J-Link Commander`. The configuration window appears.
+3. From the Specify Target Device dropdown menu, select `NRF52810_XXAA`.
+4. From the Target Interface & Speed dropdown menu, select `SWD`.
+5. Run the following command:
+```
+MSDDisable
+```
+6. Power cycle the DK.
+
+#### Disabling the Mass Storage Device on Linux
+
+1. Connect the DK to your machine with a USB cable.
+2. Run `JLinkExe` to connect to the target. For example:
+```
+JLinkExe -device NRF52810_XXAA -if SWD -speed 4000 -autoconnect 1 -SelectEmuBySN <SEGGER_ID>
+```
+3. Run the following command:
+```
+MSDDisable
+```
+4. Power cycle the DK.
+
+### Hardware Flow Control detection
+
+By default, SEGGER J-Link automatically detects at runtime whether the target is using Hardware Flow Control (HWFC).
+
+The automatic HWFC detection is done by driving P0.07 (Clear to Send - CTS) from the interface MCU and evaluating the state of P0.05 (Request to Send - RTS) when the first data is sent or received. If the state of P0.05 (RTS) is high, it is assumed that HWFC is not used.
+
+To avoid potential race conditions, you can force HWFC and bypass the runtime auto-detection.
+
+#### Disabling the HWFC detection on Windows
+
+1. Connect the DK to your machine with a USB cable.
+2. Run `J-Link Commander`. The configuration window appears.
+3. From the Specify Target Device dropdown menu, select `NRF52810_XXAA`.
+4. From the Target Interface & Speed dropdown menu, select `SWD`.
+5. Run the following command:
+```
+SetHWFC Force
+```
+6. Power cycle the DK.
+
+#### Disabling the HWFC detection on Linux
+
+1. Connect the DK to your machine with a USB cable.
+2. Run `JLinkExe` to connect to the target. For example:
+```
+JLinkExe -device NRF52810_XXAA -if SWD -speed 4000 -autoconnect 1 -SelectEmuBySN <SEGGER_ID>
+```
+3. Run the following command:
+```
+SetHWFC Force
+```
+4. Power cycle the DK.
+
+You can find more details [here][J-Link-OB].
+
+[J-Link-OB]: https://wiki.segger.com/J-Link_OB_SAM3U_NordicSemi#Hardware_flow_control_support
+
+## Diagnostic module
+
+nRF52811 supports [OpenThread Diagnostics Module][DIAG], with some additional features.
+
+For more information, see [nRF Diag command reference][nRFDIAG].
+
+[DIAG]: ./../../../src/core/diags/README.md
+[nRFDIAG]: ./../DIAG.md
+
+## Radio driver documentation
+
+The radio driver documentation includes *.uml state machines sequence diagrams that can be opened with [PlantUML][PlantUML-url].
+
+[PlantUML-url]: http://plantuml.com/
diff --git a/examples/platforms/nrf52811/nrf52811.ld b/examples/platforms/nrf528xx/nrf52811/nrf52811.ld
similarity index 100%
rename from examples/platforms/nrf52811/nrf52811.ld
rename to examples/platforms/nrf528xx/nrf52811/nrf52811.ld
diff --git a/examples/platforms/nrf52811/openthread-core-nrf52811-config-check.h b/examples/platforms/nrf528xx/nrf52811/openthread-core-nrf52811-config-check.h
similarity index 100%
rename from examples/platforms/nrf52811/openthread-core-nrf52811-config-check.h
rename to examples/platforms/nrf528xx/nrf52811/openthread-core-nrf52811-config-check.h
diff --git a/examples/platforms/nrf528xx/nrf52811/openthread-core-nrf52811-config.h b/examples/platforms/nrf528xx/nrf52811/openthread-core-nrf52811-config.h
new file mode 100644
index 0000000..8494fd0
--- /dev/null
+++ b/examples/platforms/nrf528xx/nrf52811/openthread-core-nrf52811-config.h
@@ -0,0 +1,255 @@
+/*
+ * Copyright (c) 2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file includes nrf52811 compile-time configuration constants
+ * for OpenThread.
+ */
+
+#ifndef OPENTHREAD_CORE_NRF52811_CONFIG_H_
+#define OPENTHREAD_CORE_NRF52811_CONFIG_H_
+
+/*
+ * The GNU Autoconf system defines a PACKAGE macro which is the name
+ * of the software package. This name collides with PACKAGE field in
+ * the nRF52 Factory Information Configuration Registers (FICR)
+ * structure.
+ */
+#undef PACKAGE
+
+/**
+ * @def OPENTHREAD_CONFIG_LOG_OUTPUT
+ *
+ * The nrf52811 platform provides an otPlatLog() function.
+ */
+#ifndef OPENTHREAD_CONFIG_LOG_OUTPUT
+#define OPENTHREAD_CONFIG_LOG_OUTPUT OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_PLATFORM_INFO
+ *
+ * The platform-specific string to insert into the OpenThread version string.
+ *
+ */
+#define OPENTHREAD_CONFIG_PLATFORM_INFO "NRF52811"
+
+/**
+ * @def OPENTHREAD_CONFIG_STACK_VENDOR_OUI
+ *
+ * The Organizationally Unique Identifier for the vendor.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_STACK_VENDOR_OUI
+#define OPENTHREAD_CONFIG_STACK_VENDOR_OUI 0xf4ce36
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_NUM_MESSAGE_BUFFERS
+ *
+ * The number of message buffers in the buffer pool.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_NUM_MESSAGE_BUFFERS
+#define OPENTHREAD_CONFIG_NUM_MESSAGE_BUFFERS 60
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_MAX_STATECHANGE_HANDLERS
+ *
+ * The maximum number of state-changed callback handlers (set using `otSetStateChangedCallback()`).
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_MAX_STATECHANGE_HANDLERS
+#define OPENTHREAD_CONFIG_MAX_STATECHANGE_HANDLERS 3
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_TMF_ADDRESS_CACHE_ENTRIES
+ *
+ * The number of EID-to-RLOC cache entries.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_TMF_ADDRESS_CACHE_ENTRIES
+#define OPENTHREAD_CONFIG_TMF_ADDRESS_CACHE_ENTRIES 20
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_LOG_PREPREND_LEVEL
+ *
+ * Define to prepend the log level to all log messages
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_LOG_PREPEND_LEVEL
+#define OPENTHREAD_CONFIG_LOG_PREPEND_LEVEL 0
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_SOFTWARE_ACK_TIMEOUT_ENABLE
+ *
+ * Define to 1 if you want to enable software ACK timeout logic.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_SOFTWARE_ACK_TIMEOUT_ENABLE
+#define OPENTHREAD_CONFIG_SOFTWARE_ACK_TIMEOUT_ENABLE 0
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_SOFTWARE_RETRANSMIT_ENABLE
+ *
+ * Define to 1 if you want to enable software retransmission logic.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_SOFTWARE_RETRANSMIT_ENABLE
+#define OPENTHREAD_CONFIG_SOFTWARE_RETRANSMIT_ENABLE 1
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_SOFTWARE_CSMA_BACKOFF_ENABLE
+ *
+ * Define to 1 if you want to enable software CSMA-CA backoff logic.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_SOFTWARE_CSMA_BACKOFF_ENABLE
+#define OPENTHREAD_CONFIG_SOFTWARE_CSMA_BACKOFF_ENABLE 0
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_PLATFORM_USEC_TIMER_ENABLE
+ *
+ * Define to 1 if you want to support microsecond timer in platform.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_PLATFORM_USEC_TIMER_ENABLE
+#define OPENTHREAD_CONFIG_PLATFORM_USEC_TIMER_ENABLE 1
+#endif
+
+/**
+ * @def SETTINGS_CONFIG_BASE_ADDRESS
+ *
+ * The base address of settings.
+ *
+ */
+#ifndef SETTINGS_CONFIG_BASE_ADDRESS
+#define SETTINGS_CONFIG_BASE_ADDRESS 0
+#endif
+
+/**
+ * @def SETTINGS_CONFIG_PAGE_SIZE
+ *
+ * The page size of settings.
+ *
+ */
+#ifndef SETTINGS_CONFIG_PAGE_SIZE
+#define SETTINGS_CONFIG_PAGE_SIZE 4096
+#endif
+
+/**
+ * @def SETTINGS_CONFIG_PAGE_NUM
+ *
+ * The page number of settings.
+ *
+ */
+#ifndef SETTINGS_CONFIG_PAGE_NUM
+#define SETTINGS_CONFIG_PAGE_NUM 2
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE
+ *
+ * The size of heap buffer when DTLS is enabled.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE
+#define OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE (4096 * sizeof(void *))
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE_NO_DTLS
+ *
+ * The size of heap buffer when DTLS is disabled.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE_NO_DTLS
+#define OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE_NO_DTLS 2048
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
+ *
+ * Define as 1 to enable the time synchronization service feature.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
+#define OPENTHREAD_CONFIG_TIME_SYNC_ENABLE 0
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
+ *
+ * Define as 1 to support IEEE 802.15.4-2015 Header IE (Information Element) generation and parsing, it must be set
+ * to support following features:
+ * 1. Time synchronization service feature (i.e., OPENTHREAD_CONFIG_TIME_SYNC_ENABLE is set).
+ *
+ * @note If it's enabled, plaforms must support interrupt context and concurrent access AES.
+ *
+ */
+#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
+#define OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT 1
+#endif
+
+/**
+ * @def RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM
+ *
+ * The number of short source address table entries.
+ *
+ */
+#ifndef RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM
+#define RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM 0
+#endif
+
+/**
+ * @def RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM
+ *
+ * The number of extended source address table entries.
+ *
+ */
+#ifndef RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM
+#define RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM 0
+#endif
+
+/*
+ * Suppress the ARMCC warning on unreachable statement,
+ * e.g. break after assert(false) or ExitNow() macro.
+ */
+#if defined(__CC_ARM)
+_Pragma("diag_suppress=111") _Pragma("diag_suppress=128")
+#endif
+
+#endif // OPENTHREAD_CORE_NRF52811_CONFIG_H_
diff --git a/examples/platforms/nrf528xx/nrf52811/platform-config.h b/examples/platforms/nrf528xx/nrf52811/platform-config.h
new file mode 100644
index 0000000..40ad62f
--- /dev/null
+++ b/examples/platforms/nrf528xx/nrf52811/platform-config.h
@@ -0,0 +1,413 @@
+/*
+ * Copyright (c) 2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file includes the platform-specific configuration.
+ *
+ */
+
+#ifndef PLATFORM_CONFIG_H_
+#define PLATFORM_CONFIG_H_
+
+#include "nrf.h"
+#include "nrf_peripherals.h"
+#include "drivers/clock/nrf_drv_clock.h"
+#include "hal/nrf_radio.h"
+#include "hal/nrf_uart.h"
+
+#include "openthread-core-config.h"
+#include <openthread/config.h>
+
+/*******************************************************************************
+ * @section UART Driver Configuration.
+ ******************************************************************************/
+
+/**
+ * @def UART_INSTANCE
+ *
+ * UART Instance.
+ *
+ */
+#ifndef UART_INSTANCE
+#define UART_INSTANCE NRF_UART0
+#endif
+
+/**
+ * @def UART_PARITY
+ *
+ * UART Parity configuration.
+ *
+ * @brief Possible values:
+ * \ref NRF_UART_PARITY_EXCLUDED - Parity bit is not present.
+ * \ref NRF_UART_PARITY_INCLUDED - Parity bit is present.
+ *
+ */
+#ifndef UART_PARITY
+#define UART_PARITY NRF_UART_PARITY_EXCLUDED
+#endif
+
+/**
+ * @def UART_HWFC_ENABLED
+ *
+ * Enable UART Hardware Flow Control.
+ *
+ */
+#ifndef UART_HWFC_ENABLED
+#define UART_HWFC_ENABLED 1
+#endif
+
+/**
+ * @def UART_BAUDRATE
+ *
+ * UART Baudrate.
+ *
+ * @brief Possible values:
+ * \ref NRF_UART_BAUDRATE_1200 - 1200 baud.
+ * \ref NRF_UART_BAUDRATE_2400 - 2400 baud.
+ * \ref NRF_UART_BAUDRATE_4800 - 4800 baud.
+ * \ref NRF_UART_BAUDRATE_9600 - 9600 baud.
+ * \ref NRF_UART_BAUDRATE_14400 - 14400 baud.
+ * \ref NRF_UART_BAUDRATE_19200 - 19200 baud.
+ * \ref NRF_UART_BAUDRATE_28800 - 28800 baud.
+ * \ref NRF_UART_BAUDRATE_38400 - 38400 baud.
+ * \ref NRF_UART_BAUDRATE_57600 - 57600 baud.
+ * \ref NRF_UART_BAUDRATE_76800 - 76800 baud.
+ * \ref NRF_UART_BAUDRATE_115200 - 115200 baud.
+ * \ref NRF_UART_BAUDRATE_230400 - 230400 baud.
+ * \ref NRF_UART_BAUDRATE_250000 - 250000 baud.
+ * \ref NRF_UART_BAUDRATE_460800 - 460800 baud.
+ * \ref NRF_UART_BAUDRATE_921600 - 921600 baud.
+ * \ref NRF_UART_BAUDRATE_1000000 - 1000000 baud.
+ *
+ */
+#ifndef UART_BAUDRATE
+#define UART_BAUDRATE NRF_UART_BAUDRATE_115200
+#endif
+
+/**
+ * @def UART_IRQN
+ *
+ * UART Interrupt number.
+ *
+ */
+#ifndef UART_IRQN
+#define UART_IRQN UARTE0_UART0_IRQn
+#endif
+
+/**
+ * @def UART_IRQ_PRIORITY
+ *
+ * UART Interrupt priority.
+ *
+ */
+#ifndef UART_IRQ_PRIORITY
+#define UART_IRQ_PRIORITY 6
+#endif
+
+/**
+ * @def UART_RX_BUFFER_SIZE
+ *
+ * UART Receive buffer size.
+ *
+ */
+#ifndef UART_RX_BUFFER_SIZE
+#define UART_RX_BUFFER_SIZE 256
+#endif
+
+/**
+ * @def UART_PIN_TX
+ *
+ * UART TX Pin.
+ *
+ */
+#ifndef UART_PIN_TX
+#define UART_PIN_TX 6
+#endif
+
+/**
+ * @def UART_PIN_RX
+ *
+ * UART RX Pin.
+ *
+ */
+#ifndef UART_PIN_RX
+#define UART_PIN_RX 8
+#endif
+
+/**
+ * @def UART_PIN_CTS
+ *
+ * UART CTS Pin.
+ *
+ */
+#ifndef UART_PIN_CTS
+#define UART_PIN_CTS 7
+#endif
+
+/**
+ * @def UART_PIN_RTS
+ *
+ * UART RTS Pin.
+ *
+ */
+#ifndef UART_PIN_RTS
+#define UART_PIN_RTS 5
+#endif
+
+/*******************************************************************************
+ * @section Alarm Driver Configuration.
+ ******************************************************************************/
+
+/**
+ * @def RTC_INSTANCE
+ *
+ * RTC Instance.
+ *
+ */
+#ifndef RTC_INSTANCE
+#define RTC_INSTANCE NRF_RTC0
+#endif
+
+/**
+ * @def RTC_IRQ_HANDLER
+ *
+ * RTC interrupt handler name
+ *
+ */
+#ifndef RTC_IRQ_HANDLER
+#define RTC_IRQ_HANDLER RTC0_IRQHandler
+#endif
+
+/**
+ * @def RTC_IRQN
+ *
+ * RTC Interrupt number.
+ *
+ */
+#ifndef RTC_IRQN
+#define RTC_IRQN RTC0_IRQn
+#endif
+
+/**
+ * @def RTC_IRQ_PRIORITY
+ *
+ * RTC Interrupt priority.
+ *
+ */
+#ifndef RTC_IRQ_PRIORITY
+#define RTC_IRQ_PRIORITY 6
+#endif
+
+/*******************************************************************************
+ * @section Random Number Generator Driver Configuration.
+ ******************************************************************************/
+
+/**
+ * @def RNG_BUFFER_SIZE
+ *
+ * True Random Number Generator buffer size.
+ *
+ */
+#ifndef RNG_BUFFER_SIZE
+#define RNG_BUFFER_SIZE 128
+#endif
+
+/**
+ * @def RNG_IRQ_PRIORITY
+ *
+ * RNG Interrupt priority.
+ *
+ */
+#ifndef RNG_IRQ_PRIORITY
+#define RNG_IRQ_PRIORITY 6
+#endif
+
+/*******************************************************************************
+ * @section SPI Slave configuration.
+ ******************************************************************************/
+
+/**
+ * @def SPIS Instance.
+ */
+#ifndef SPIS_INSTANCE
+#define SPIS_INSTANCE 0
+#endif
+
+/**
+ * @def SPIS mode.
+ *
+ * @brief Possible values:
+ * \ref NRF_SPIS_MODE_0 - SCK active high, sample on leading edge of clock.
+ * \ref NRF_SPIS_MODE_1 - SCK active high, sample on trailing edge of clock.
+ * \ref NRF_SPIS_MODE_2 - SCK active low, sample on leading edge of clock.
+ * \ref NRF_SPIS_MODE_3 - SCK active low, sample on trailing edge of clock.
+ */
+#ifndef SPIS_MODE
+#define SPIS_MODE NRF_SPIS_MODE_0
+#endif
+
+/**
+ * @def SPIS bit orders.
+ *
+ * @brief Possible values:
+ * \ref NRF_SPIS_BIT_ORDER_MSB_FIRST - Most significant bit shifted out first.
+ * \ref NRF_SPIS_BIT_ORDER_LSB_FIRST - Least significant bit shifted out first.
+ */
+#ifndef SPIS_BIT_ORDER
+#define SPIS_BIT_ORDER NRF_SPIS_BIT_ORDER_MSB_FIRST
+#endif
+
+/**
+ * @def SPIS Interrupt priority.
+ */
+#ifndef SPIS_IRQ_PRIORITY
+#define SPIS_IRQ_PRIORITY 6
+#endif
+
+/**
+ * @def SPIS MOSI Pin.
+ */
+#ifndef SPIS_PIN_MOSI
+#define SPIS_PIN_MOSI 4
+#endif
+
+/**
+ * @def SPIS MISO Pin.
+ */
+#ifndef SPIS_PIN_MISO
+#define SPIS_PIN_MISO 28
+#endif
+
+/**
+ * @def SPIS SCK Pin.
+ */
+#ifndef SPIS_PIN_SCK
+#define SPIS_PIN_SCK 3
+#endif
+
+/**
+ * @def SPIS CSN Pin.
+ */
+#ifndef SPIS_PIN_CSN
+#define SPIS_PIN_CSN 29
+#endif
+
+/**
+ * @def SPIS Host IRQ Pin.
+ */
+#ifndef SPIS_PIN_HOST_IRQ
+#define SPIS_PIN_HOST_IRQ 30
+#endif
+
+/*******************************************************************************
+ * @section Platform FEM Configuration
+ ******************************************************************************/
+
+/**
+ * @def PLATFORM_FEM_ENABLE_DEFAULT_CONFIG
+ *
+ * Enable default front end module configuration.
+ *
+ */
+#ifndef PLATFORM_FEM_ENABLE_DEFAULT_CONFIG
+#define PLATFORM_FEM_ENABLE_DEFAULT_CONFIG 0
+#endif
+
+/*******************************************************************************
+ * @section Radio driver configuration.
+ ******************************************************************************/
+
+/**
+ * @def NRF_802154_PENDING_SHORT_ADDRESSES
+ *
+ * Number of slots containing short addresses of nodes for which pending data is stored.
+ *
+ */
+#ifndef NRF_802154_PENDING_SHORT_ADDRESSES
+#define NRF_802154_PENDING_SHORT_ADDRESSES OPENTHREAD_CONFIG_MLE_MAX_CHILDREN
+#endif
+
+/**
+ * @def NRF_802154_PENDING_EXTENDED_ADDRESSES
+ *
+ * Number of slots containing extended addresses of nodes for which pending data is stored.
+ *
+ */
+#ifndef NRF_802154_PENDING_EXTENDED_ADDRESSES
+#define NRF_802154_PENDING_EXTENDED_ADDRESSES OPENTHREAD_CONFIG_MLE_MAX_CHILDREN
+#endif
+
+/**
+ * @def NRF_802154_CSMA_CA_ENABLED
+ *
+ * If CSMA-CA procedure should be enabled by the driver. Disabling CSMA-CA procedure improves
+ * driver performance.
+ *
+ */
+#ifndef NRF_802154_CSMA_CA_ENABLED
+#define NRF_802154_CSMA_CA_ENABLED 1
+#endif
+
+/**
+ * @def NRF_802154_ACK_TIMEOUT_ENABLED
+ *
+ * If ACK timeout feature should be enabled in the driver.
+ *
+ */
+#ifndef NRF_802154_ACK_TIMEOUT_ENABLED
+#define NRF_802154_ACK_TIMEOUT_ENABLED 1
+#endif
+
+/*******************************************************************************
+ * @section Temperature sensor driver configuration.
+ ******************************************************************************/
+
+/**
+ * @def TEMP_MEASUREMENT_INTERVAL
+ *
+ * Interval of consecutive temperature measurements [s].
+ *
+ */
+#ifndef TEMP_MEASUREMENT_INTERVAL
+#define TEMP_MEASUREMENT_INTERVAL 30
+#endif
+
+/**
+ * @def NRF_802154_TX_STARTED_NOTIFY_ENABLED
+ *
+ * If notification of started transmission should be enabled in the driver.
+ *
+ * @note This feature must be enabled to support Header IE related features.
+ *
+ */
+#ifndef NRF_802154_TX_STARTED_NOTIFY_ENABLED
+#define NRF_802154_TX_STARTED_NOTIFY_ENABLED 1
+#endif
+
+#endif // PLATFORM_CONFIG_H_
diff --git a/examples/platforms/nrf528xx/nrf52833/Makefile.am b/examples/platforms/nrf528xx/nrf52833/Makefile.am
new file mode 100644
index 0000000..ee34bdb
--- /dev/null
+++ b/examples/platforms/nrf528xx/nrf52833/Makefile.am
@@ -0,0 +1,166 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
+
+lib_LIBRARIES = \
+ libopenthread-nrf52833.a \
+ libopenthread-nrf52833-sdk.a \
+ libopenthread-nrf52833-softdevice-sdk.a \
+ $(NULL)
+
+# Do not enable -pedantic-errors for nRF52833 driver library
+override CFLAGS := $(filter-out -pedantic-errors,$(CFLAGS))
+override CXXFLAGS := $(filter-out -pedantic-errors,$(CXXFLAGS))
+
+# Do not enable -Wundef for nRF52833 driver library
+override CFLAGS := $(filter-out -Wundef,$(CFLAGS))
+override CXXFLAGS := $(filter-out -Wundef,$(CXXFLAGS))
+
+COMMONCPPFLAGS = \
+ -DCONFIG_GPIO_AS_PINRESET \
+ -DNRF52833_XXAA \
+ -I$(srcdir) \
+ -I$(top_srcdir)/include \
+ -I$(top_srcdir)/examples/platforms \
+ -I$(top_srcdir)/examples/platforms/nrf528xx/src \
+ -I$(top_srcdir)/src/core \
+ -I$(top_srcdir)/third_party/NordicSemiconductor \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/cmsis \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/dependencies \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/clock \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/common \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/fem/three_pin_gpio \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/hal \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/mac_features \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/mac_features/ack_generator \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/rsch \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/rsch/raal \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/power \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/systick \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/usbd \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/app_error \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/atfifo \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/atomic \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/block_dev \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/delay \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/usb \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/usb/config \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/usb/class/cdc \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/usb/class/cdc/acm \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/utf_converter \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx/hal \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx/drivers \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx/drivers/include \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx/mdk \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx/soc \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/softdevice/s140/headers \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/softdevice/s140/headers/nrf52 \
+ $(NULL)
+
+PLATFORM_COMMON_SOURCES = \
+ src/alarm.c \
+ src/diag.c \
+ src/entropy.c \
+ src/fem.c \
+ src/flash.c \
+ src/logging.c \
+ src/misc.c \
+ src/radio.c \
+ src/temp.c \
+ src/spi-slave.c \
+ src/system.c \
+ src/uart.c \
+ src/usb-cdc-uart.c \
+ $(NULL)
+
+SINGLEPHY_SOURCES = \
+ src/flash_nosd.c \
+ $(NULL)
+
+SOFTDEVICE_SOURCES = \
+ src/flash_sd.c \
+ src/softdevice.c \
+ $(NULL)
+
+SOFTDEVICE_CPPFLAGS = \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/rsch/raal/softdevice \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/softdevice/s140/headers \
+ -DSOFTDEVICE_PRESENT \
+ -DS140 \
+ $(NULL)
+
+PLATFORM_SOURCES = \
+ $(PLATFORM_COMMON_SOURCES) \
+ $(NULL)
+
+libopenthread_nrf52833_a_CPPFLAGS = \
+ $(COMMONCPPFLAGS) \
+ $(SINGLEPHY_CPPFLAGS) \
+ $(NULL)
+
+libopenthread_nrf52833_a_SOURCES = \
+ $(PLATFORM_SOURCES) \
+ $(SINGLEPHY_SOURCES) \
+ $(NULL)
+
+libopenthread_nrf52833_sdk_a_CPPFLAGS = \
+ $(COMMONCPPFLAGS) \
+ $(SINGLEPHY_CPPFLAGS) \
+ $(NULL)
+
+libopenthread_nrf52833_sdk_a_SOURCES = \
+ $(PLATFORM_SOURCES) \
+ $(SINGLEPHY_SOURCES) \
+ $(NULL)
+
+libopenthread_nrf52833_softdevice_sdk_a_CPPFLAGS = \
+ $(COMMONCPPFLAGS) \
+ $(SOFTDEVICE_CPPFLAGS) \
+ $(NULL)
+
+libopenthread_nrf52833_softdevice_sdk_a_SOURCES = \
+ $(PLATFORM_SOURCES) \
+ $(SOFTDEVICE_SOURCES) \
+ $(NULL)
+
+Dash = -
+
+libopenthread_nrf52833_a_LIBADD = \
+ $(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o") \
+ $(shell find $(top_builddir)/third_party/jlink/SEGGER_RTT_V640/RTT $(Dash)type f $(Dash)name "*.o")
+
+libopenthread_nrf52833_sdk_a_LIBADD = \
+ $(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o")
+
+libopenthread_nrf52833_softdevice_sdk_a_LIBADD = \
+ $(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o")
+
+include $(abs_top_nlbuild_autotools_dir)/automake/post.am
diff --git a/examples/platforms/nrf528xx/nrf52833/Makefile.platform.am b/examples/platforms/nrf528xx/nrf52833/Makefile.platform.am
new file mode 100644
index 0000000..ab0fc8d
--- /dev/null
+++ b/examples/platforms/nrf528xx/nrf52833/Makefile.platform.am
@@ -0,0 +1,47 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+#
+# nrf52833 platform-specific Makefile
+#
+
+LDADD_COMMON += \
+ $(top_builddir)/examples/platforms/nrf528xx/libopenthread-nrf52833.a \
+ $(top_builddir)/third_party/NordicSemiconductor/libnordicsemi-nrf52833-sdk.a \
+ $(top_builddir)/third_party/NordicSemiconductor/libnordicsemi-nrf52833-radio-driver.a \
+ $(NULL)
+
+if OPENTHREAD_ENABLE_CUSTOM_LINKER_FILE
+LDFLAGS_COMMON += \
+ -T $(OPENTHREAD_CUSTOM_LINKER_FILE) \
+ $(NULL)
+else
+LDFLAGS_COMMON += \
+ -T $(top_srcdir)/examples/platforms/nrf528xx/nrf52833/nrf52833.ld \
+ $(NULL)
+endif
diff --git a/examples/platforms/nrf528xx/nrf52833/README.md b/examples/platforms/nrf528xx/nrf52833/README.md
new file mode 100644
index 0000000..bd6bdd8
--- /dev/null
+++ b/examples/platforms/nrf528xx/nrf52833/README.md
@@ -0,0 +1,394 @@
+# OpenThread on nRF52833 Example
+
+This directory contains example platform drivers for [Nordic Semiconductor nRF52833 SoC][nRF52833].
+
+To facilitate Thread products development with the nRF52833 platform, Nordic Semiconductor provides <i>nRF5 SDK for Thread and Zigbee</i>. See [Nordic Semiconductor's nRF5 SDK for Thread and Zigbee][nRF5-SDK-section] section for more details.
+
+[nRF52833]: https://www.nordicsemi.com/Products/Low-power-short-range-wireless/nRF52833
+[nRF5-SDK-section]: #nordic-semiconductors-nrf5-sdk-for-thread-and-zigbee
+
+## Prerequisites
+
+Before you start building the examples, you must download and install the toolchain and the tools required for flashing and debugging.
+
+### Toolchain
+
+Download and install the [GNU toolchain for ARM Cortex-M][gnu-toolchain].
+
+[gnu-toolchain]: https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-rm
+
+To install the GNU toolchain and its dependencies, run the following commands in Bash:
+
+```bash
+$ cd <path-to-openthread>
+$ ./script/bootstrap
+```
+
+### Flashing and debugging tools
+
+[nRF5-Command-Line-Tools]: https://www.nordicsemi.com/Software-and-Tools/Development-Tools/nRF5-Command-Line-Tools
+
+Install the [nRF5 Command Line Tools][nRF5-Command-Line-Tools] to flash, debug, and make use of logging features on the nRF52833 DK with SEGGER J-Link.
+
+## Building the examples
+
+ To build the examples, run the following command in Bash:
+
+```bash
+$ cd <path-to-openthread>
+$ ./bootstrap
+$ make -f examples/Makefile-nrf52833
+```
+
+After a successful build, the `elf` files can be found in
+`<path-to-openthread>/output/nrf52833/bin`.
+You can convert them to hex using `arm-none-eabi-objcopy`:
+```bash
+$ arm-none-eabi-objcopy -O ihex ot-cli-ftd ot-cli-ftd.hex
+```
+
+### USB CDC ACM support
+
+You can build the libraries with support for the native USB CDC ACM as a serial transport.
+To do so, build the firmware with the following parameter:
+```
+$ make -f examples/Makefile-nrf52833 USB=1
+```
+
+Note that the USB CDC ACM serial transport is not supported with Engineering sample A of the nRF52833 chip.
+
+If you are using Windows 7 or earlier, you must load an additional USB CDC driver.
+The driver can be found in `third_party/NordicSemiconductor/libraries/usb/nordic_cdc_acm_example.inf`.
+
+### Bootloader support
+
+The examples support the following bootloaders for performing a Device Firmware Upgrade (DFU):
+* USB bootloader
+* UART bootloader
+* BLE bootloader
+
+The support for a particular bootloader can be enabled with the following switches:
+* USB: `BOOTLOADER=USB`
+* UART: `BOOTLOADER=UART`
+* BLE: `BOOTLOADER=BLE`
+
+### Native SPI support
+
+You can build the libraries with support for native SPI Slave.
+To build the libraries, run make with the following parameter:
+
+```
+$ make -f examples/Makefile-nrf52833 NCP_SPI=1
+```
+
+With this option enabled, SPI communication between the NCP example and wpantund is possible
+(provided that the wpantund host supports SPI Master). To achieve that, an appropriate SPI device
+should be chosen in wpantund configuration file, `/etc/wpantund.conf`. You can find an example below.
+```
+Config:NCP:SocketPath "system:/usr/bin/spi-hdlc-adapter --gpio-int /sys/class/gpio/gpio25 /dev/spidev0.0"
+```
+
+In this example, [spi-hdlc-adapter][spi-hdlc-adapter] is a tool that you can use to communicate between NCP and wpantund over SPI. For this example, `spi-hdlc-adapter` is installed in `/usr/bin`.
+
+The default SPI Slave pin configuration for nRF52833 is defined in `examples/platforms/nrf52833/platform-config.h`.
+
+Note that the native SPI Slave support is not intended to be used with Engineering sample A of the nRF52833 chip due to
+single transfer size limitation.
+
+[spi-hdlc-adapter]: https://github.com/openthread/openthread/tree/master/tools/spi-hdlc-adapter
+
+### Optional prefix for compiler command
+
+You can prefix the compiler command using the CCPREFIX parameter. This speeds up the compilation when you use tools like [ccache][ccache-website]. Example usage:
+
+[ccache-website]: https://ccache.samba.org/
+
+```
+$ make -f examples/Makefile-nrf52833 USB=1 CCPREFIX=ccache
+```
+### Optional mbedTLS threading support
+By default, mbedTLS library is built without support for multiple threads. You can enable this built-in support by building OpenThread with the following parameter:
+
+```
+$ make -f examples/Makefile-nrf52833 MBEDTLS_THREADING=1
+```
+
+The simple mutex definition is used as shown below:
+
+```
+typedef void * mbedtls_threading_mutex_t;
+```
+
+However, you can modify it, by providing a path to a header file with proper definition. To do that, build OpenThread with the following parameter:
+
+```
+$ make -f examples/Makefile-nrf52833 MBEDTLS_THREADING=1 MBEDTLS_THREADING_MUTEX_DEF="path_to_a_header_file_with_mutex_definition.h"
+```
+
+See [mbedTls Thread Safety and Multi Threading][mbedtls-thread-safety-and-multi-threading] for more details.
+
+[mbedtls-thread-safety-and-multi-threading]: https://tls.mbed.org/kb/development/thread-safety-and-multi-threading
+
+### IEEE EUI-64 address
+
+When the Thread device is configured to obtain the Thread Network security credentials with either Thread Commissioning or an out-of-band method, the extended MAC address should be constructed out of the globally unique IEEE EUI-64.
+
+The IEEE EUI-64 address consists of two parts:
+ - 24 bits of MA-L (MAC Address Block Large), formerly called OUI (Organizationally Unique Identifier)
+ - 40-bit device unique identifier
+
+By default, the device uses Nordic Semiconductor's MA-L (f4-ce-36). You can modify it by overwriting the `OPENTHREAD_CONFIG_STACK_VENDOR_OUI` define, located in the `openthread-core-nrf52833-config.h` file. This value must be publicly registered by the IEEE Registration Authority.
+
+You can also provide the full IEEE EUI-64 address by providing a custom `otPlatRadioGetIeeeEui64` function. To do this, define the flag `OPENTHREAD_CONFIG_ENABLE_PLATFORM_EUI64_CUSTOM_SOURCE`.
+
+After the Thread Network security credentials have been successfully obtained, the device uses randomly generated extended MAC address.
+
+## Flashing the binaries
+
+Flash the compiled binaries onto nRF52833 using `nrfjprog` which is
+part of the [nRF5 Command Line Tools][nRF5-Command-Line-Tools].
+
+```bash
+$ nrfjprog -f nrf52 --chiperase --program output/nrf52833/bin/ot-cli-ftd.hex --reset
+```
+
+## Running the example
+
+To test the example:
+
+1. Prepare two boards with the flashed `CLI Example` (as shown above). The CLI FTD example uses the direct UART connection.
+
+2. Open a terminal connection on two boards:
+
+ a. Start a terminal emulator like screen.
+
+ b. Connect to the used COM port with the following direct UART settings:
+
+ * Baud rate: 115200
+ * 8 data bits
+ * 1 stop bit
+ * No parity
+ * HW flow control: RTS/CTS
+ This allows you to view the raw UART output.
+
+ On Linux system a port name should be called e.g. `/dev/ttyACM0` or `/dev/ttyACM1`.
+
+ c. Run the following command to connect to a board.
+
+ ```shell
+ screen /dev/ttyACM0 115200
+ ```
+
+ Now you are connected with the CLI.
+
+3. Use the following commands to form a network on the first board.
+
+ ```bash
+ > dataset init new
+ Done
+ > dataset
+ Active Timestamp: 1
+ Channel: 13
+ Channel Mask: 07fff800
+ Ext PAN ID: d63e8e3e495ebbc3
+ Mesh Local Prefix: fd3d:b50b:f96d:722d/64
+ Master Key: dfd34f0f05cad978ec4e32b0413038ff
+ Network Name: OpenThread-8f28
+ PAN ID: 0x8f28
+ PSKc: c23a76e98f1a6483639b1ac1271e2e27
+ Security Policy: 0, onrcb
+ Done
+ > dataset commit active
+ Done
+ > ifconfig up
+ Done
+ > thread start
+ Done
+ ```
+
+ After a couple of seconds the node will become a Leader of the network.
+
+ ```bash
+ > state
+ leader
+ ```
+
+4. Use the following commands to attach to the network on the second board.
+
+ ```bash
+ > dataset masterkey dfd34f0f05cad978ec4e32b0413038ff
+ Done
+ > dataset commit active
+ Done
+ > ifconfig up
+ Done
+ > thread start
+ Done
+ ```
+
+ After a couple of seconds the second node will attach and become a Child.
+
+ ```bash
+ > state
+ child
+ ```
+
+5. List all IPv6 addresses of the first board.
+
+ ```bash
+ > ipaddr
+ fd3d:b50b:f96d:722d:0:ff:fe00:fc00
+ fd3d:b50b:f96d:722d:0:ff:fe00:c00
+ fd3d:b50b:f96d:722d:7a73:bff6:9093:9117
+ fe80:0:0:0:6c41:9001:f3d6:4148
+ Done
+ ```
+
+6. Choose one of them and send an ICMPv6 ping from the second board.
+
+ ```bash
+ > ping fd3d:b50b:f96d:722d:7a73:bff6:9093:9117
+ 16 bytes from fd3d:b50b:f96d:722d:558:f56b:d688:799: icmp_seq=1 hlim=64 time=24ms
+ ```
+
+For a list of all available commands, visit [OpenThread CLI Reference README.md][CLI].
+
+[CLI]: ./../../../src/cli/README.md
+
+## SEGGER J-Link tools
+
+SEGGER J-Link tools allow to debug and flash generated firmware using on-board debugger or external one.
+
+### Working with RTT logging
+
+By default, the OpenThread's logging module provides functions to output logging
+information over SEGGER's Real Time Transfer (RTT).
+
+You can set the desired log level by using the `OPENTHREAD_CONFIG_LOG_LEVEL` define.
+
+To enable the highest verbosity level, append `FULL_LOGS` flag to the `make` command:
+```
+$ make -f examples/Makefile-nrf52833 FULL_LOGS=1
+```
+
+#### Enable logging on Windows
+
+1. Connect the DK to your machine with a USB cable.
+2. Run `J-Link RTT Viewer`. The configuration window appears.
+3. From the Specify Target Device dropdown menu, select `NRF52833_XXAA`.
+4. From the Target Interface & Speed dropdown menu, select `SWD`.
+
+#### Enable logging on Linux
+
+1. Connect the DK to your machine with a USB cable.
+2. Run `JLinkExe` to connect to the target. For example:
+```
+JLinkExe -device NRF52833_XXAA -if SWD -speed 4000 -autoconnect 1 -SelectEmuBySN <SEGGER_ID> -RTTTelnetPort 19021
+```
+3. Run `JLinkRTTTelnet` to obtain the RTT logs from the connected device in a separate console. For example:
+```
+JLinkRTTClient -RTTTelnetPort 19021
+```
+
+### Mass Storage Device known issue
+
+Depending on your version, due to a known issue in SEGGER's J-Link firmware, you might experience data corruption or data drops if you use the serial port. You can avoid this issue by disabling the Mass Storage Device.
+
+#### Disabling the Mass Storage Device on Windows
+
+1. Connect the DK to your machine with a USB cable.
+2. Run `J-Link Commander`. The configuration window appears.
+3. From the Specify Target Device dropdown menu, select `NRF52833_XXAA`.
+4. From the Target Interface & Speed dropdown menu, select `SWD`.
+5. Run the following command:
+```
+MSDDisable
+```
+6. Power cycle the DK.
+
+#### Disabling the Mass Storage Device on Linux
+
+1. Connect the DK to your machine with a USB cable.
+2. Run `JLinkExe` to connect to the target. For example:
+```
+JLinkExe -device NRF52833_XXAA -if SWD -speed 4000 -autoconnect 1 -SelectEmuBySN <SEGGER_ID>
+```
+3. Run the following command:
+```
+MSDDisable
+```
+4. Power cycle the DK.
+
+### Hardware Flow Control detection
+
+By default, SEGGER J-Link automatically detects at runtime whether the target is using Hardware Flow Control (HWFC).
+
+The automatic HWFC detection is done by driving P0.07 (Clear to Send - CTS) from the interface MCU and evaluating the state of P0.05 (Request to Send - RTS) when the first data is sent or received. If the state of P0.05 (RTS) is high, it is assumed that HWFC is not used.
+
+To avoid potential race conditions, you can force HWFC and bypass the runtime auto-detection.
+
+#### Disabling the HWFC detection on Windows
+
+1. Connect the DK to your machine with a USB cable.
+2. Run `J-Link Commander`. The configuration window appears.
+3. From the Specify Target Device dropdown menu, select `NRF52833_XXAA`.
+4. From the Target Interface & Speed dropdown menu, select `SWD`.
+5. Run the following command:
+```
+SetHWFC Force
+```
+6. Power cycle the DK.
+
+#### Disabling the HWFC detection on Linux
+
+1. Connect the DK to your machine with a USB cable.
+2. Run `JLinkExe` to connect to the target. For example:
+```
+JLinkExe -device NRF52833_XXAA -if SWD -speed 4000 -autoconnect 1 -SelectEmuBySN <SEGGER_ID>
+```
+3. Run the following command:
+```
+SetHWFC Force
+```
+4. Power cycle the DK.
+
+You can find more details [here][J-Link-OB].
+
+[J-Link-OB]: https://wiki.segger.com/J-Link_OB_SAM3U_NordicSemi#Hardware_flow_control_support
+
+## Diagnostic module
+
+nRF52833 port extends [OpenThread Diagnostics Module][DIAG].
+
+You can read about all the features [here][nRFDIAG].
+
+[DIAG]: ./../../../src/core/diags/README.md
+[nRFDIAG]: ./../DIAG.md
+
+## Radio driver documentation
+
+The radio driver comes with documentation that describes the operation of state
+machines in this module. To open the `*.uml` sequence diagrams, use [PlantUML][PlantUML-url].
+
+[PlantUML-url]: http://plantuml.com/
+
+# Nordic Semiconductor's nRF5 SDK for Thread and Zigbee
+
+Use [nRF5 Software Development Kit (SDK) for Thread and Zigbee][nRF5-SDK-Thread-Zigbee] when developing Thread products with Nordic Semiconductor's advanced nRF52840, nRF52833 or nRF52811 SoCs.
+
+The <i>nRF5 SDK for Thread and Zigbee</i> includes:
+ - a pre-built OpenThread stack for the Nordic nRF52840, nRF52833 and nRF52811 SoCs,
+ - support for hardware-accelerated cryptographic operations using ARM® CryptoCell-310,
+ - unique Thread/Bluetooth Low Energy dynamic multiprotocol solution which allows for concurrent operation of Thread and Bluetooth Low Energy utilizing OpenThread and SoftDevice (Nordic’s Bluetooth Low Energy stack) with accompanying example applications,
+ - Thread/Bluetooth Low Energy switched multiprotocol solution with accompanying example applications,
+ - unique support for DFU-over-Thread (Device Firmware Upgrade),
+ - examples to demonstrate interactions between nodes performing different Thread roles with the use of OpenThread and CoAP, CoAP Secure or MQTT-SN protocols,
+ - support for OpenThread Network Co-Processor (NCP) and Radio Co-Processor (RCP) using UART, USB or SPI transport protocol,
+ - Border Router and cloud connectivity example (e.g. with Google Cloud Platform),
+ - Thread native commissioning with NFC example,
+ - example applications demonstrating the use of FreeRTOS with OpenThread,
+ - support for IAR, Keil MDK-ARM and SEGGER Embedded Studio (SES) IDEs for OpenThread stack and all example applications,
+ - range of PC tools including Thread Topology Monitor and nRF Sniffer for 802.15.4,
+ - software modules inherited from the nRF5 SDK e.g. peripheral drivers, NFC libraries, Bluetooth Low Energy libraries etc.
+
+[nRF5-SDK-Thread-Zigbee]: https://www.nordicsemi.com/Software-and-Tools/Software/nRF5-SDK-for-Thread-and-Zigbee
diff --git a/examples/platforms/nrf528xx/nrf52833/nrf52833.ld b/examples/platforms/nrf528xx/nrf52833/nrf52833.ld
new file mode 100644
index 0000000..88e85f7
--- /dev/null
+++ b/examples/platforms/nrf528xx/nrf52833/nrf52833.ld
@@ -0,0 +1,168 @@
+/*
+ * Copyright (c) 2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVEpR CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * GCC linker script for nRF52833.
+ */
+
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lnosys)
+
+MEMORY
+{
+ FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x80000
+ RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x20000
+}
+
+OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+
+ENTRY(Reset_Handler)
+
+FLASH_PAGE_SIZE = 4096;
+FLASH_DATA_PAGES_USED = 4;
+
+SECTIONS
+{
+ .text :
+ {
+ KEEP(*(.isr_vector))
+ *(.text*)
+
+ KEEP(*(.init))
+ KEEP(*(.fini))
+
+ /* .ctors */
+ *crtbegin.o(.ctors)
+ *crtbegin?.o(.ctors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+ *(SORT(.ctors.*))
+ *(.ctors)
+
+ /* .dtors */
+ *crtbegin.o(.dtors)
+ *crtbegin?.o(.dtors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ *(SORT(.dtors.*))
+ *(.dtors)
+
+ *(.rodata*)
+
+ KEEP(*(.eh_frame*))
+ } > FLASH
+
+ .ARM.extab :
+ {
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ } > FLASH
+
+ __exidx_start = .;
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ } > FLASH
+ __exidx_end = .;
+
+ __etext = .;
+
+ .data : AT (__etext)
+ {
+ __data_start__ = .;
+ *(vtable)
+ *(.data*)
+
+ . = ALIGN(4);
+ /* preinit data */
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP(*(.preinit_array))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+
+ . = ALIGN(4);
+ /* init data */
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array))
+ PROVIDE_HIDDEN (__init_array_end = .);
+
+
+ . = ALIGN(4);
+ /* finit data */
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP(*(SORT(.fini_array.*)))
+ KEEP(*(.fini_array))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+
+ KEEP(*(.jcr*))
+ . = ALIGN(4);
+ /* All data end */
+ __data_end__ = .;
+
+ } > RAM
+
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start__ = .;
+ *(.bss*)
+ *(COMMON)
+ . = ALIGN(4);
+ __bss_end__ = .;
+ } > RAM
+
+ .heap (COPY):
+ {
+ __HeapBase = .;
+ __end__ = .;
+ PROVIDE(end = .);
+ KEEP(*(.heap*))
+ __HeapLimit = .;
+ } > RAM
+
+ /* .stack_dummy section doesn't contains any symbols. It is only
+ * used for linker to calculate size of stack sections, and assign
+ * values to stack symbols later */
+ .stack_dummy (COPY):
+ {
+ KEEP(*(.stack*))
+ } > RAM
+
+ __stop_ot_flash_data = (ORIGIN(FLASH) + LENGTH(FLASH));
+ __start_ot_flash_data = (__stop_ot_flash_data - (FLASH_PAGE_SIZE * FLASH_DATA_PAGES_USED));
+
+ /* Assure that code does not overlap flash data area.*/
+ ASSERT((__start_ot_flash_data >= __etext + SIZEOF(.data)), "Error: Code overlaps flash data area.")
+
+ /* Set stack top to end of RAM, and stack limit move down by
+ * size of stack_dummy section */
+ __StackTop = ORIGIN(RAM) + LENGTH(RAM);
+ __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+ PROVIDE(__stack = __StackTop);
+
+ /* Check if data + heap + stack exceeds RAM limit */
+ ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/examples/platforms/nrf528xx/nrf52833/nrf52833_bootloader_ble.ld b/examples/platforms/nrf528xx/nrf52833/nrf52833_bootloader_ble.ld
new file mode 100644
index 0000000..0126016
--- /dev/null
+++ b/examples/platforms/nrf528xx/nrf52833/nrf52833_bootloader_ble.ld
@@ -0,0 +1,168 @@
+/*
+ * Copyright (c) 2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * GCC linker script for nRF52833 with BLE bootloader.
+ */
+
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lnosys)
+
+MEMORY
+{
+ FLASH (rx) : ORIGIN = 0x00026000, LENGTH = 0x52000
+ RAM (rwx) : ORIGIN = 0x20000008, LENGTH = 0x1fff8
+}
+
+OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+
+ENTRY(Reset_Handler)
+
+FLASH_PAGE_SIZE = 4096;
+FLASH_DATA_PAGES_USED = 4;
+
+SECTIONS
+{
+ .text :
+ {
+ KEEP(*(.isr_vector))
+ *(.text*)
+
+ KEEP(*(.init))
+ KEEP(*(.fini))
+
+ /* .ctors */
+ *crtbegin.o(.ctors)
+ *crtbegin?.o(.ctors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+ *(SORT(.ctors.*))
+ *(.ctors)
+
+ /* .dtors */
+ *crtbegin.o(.dtors)
+ *crtbegin?.o(.dtors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ *(SORT(.dtors.*))
+ *(.dtors)
+
+ *(.rodata*)
+
+ KEEP(*(.eh_frame*))
+ } > FLASH
+
+ .ARM.extab :
+ {
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ } > FLASH
+
+ __exidx_start = .;
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ } > FLASH
+ __exidx_end = .;
+
+ __etext = .;
+
+ .data : AT (__etext)
+ {
+ __data_start__ = .;
+ *(vtable)
+ *(.data*)
+
+ . = ALIGN(4);
+ /* preinit data */
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP(*(.preinit_array))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+
+ . = ALIGN(4);
+ /* init data */
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array))
+ PROVIDE_HIDDEN (__init_array_end = .);
+
+
+ . = ALIGN(4);
+ /* finit data */
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP(*(SORT(.fini_array.*)))
+ KEEP(*(.fini_array))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+
+ KEEP(*(.jcr*))
+ . = ALIGN(4);
+ /* All data end */
+ __data_end__ = .;
+
+ } > RAM
+
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start__ = .;
+ *(.bss*)
+ *(COMMON)
+ . = ALIGN(4);
+ __bss_end__ = .;
+ } > RAM
+
+ .heap (COPY):
+ {
+ __HeapBase = .;
+ __end__ = .;
+ PROVIDE(end = .);
+ KEEP(*(.heap*))
+ __HeapLimit = .;
+ } > RAM
+
+ /* .stack_dummy section doesn't contains any symbols. It is only
+ * used for linker to calculate size of stack sections, and assign
+ * values to stack symbols later */
+ .stack_dummy (COPY):
+ {
+ KEEP(*(.stack*))
+ } > RAM
+
+ __stop_ot_flash_data = (ORIGIN(FLASH) + LENGTH(FLASH));
+ __start_ot_flash_data = (__stop_ot_flash_data - (FLASH_PAGE_SIZE * FLASH_DATA_PAGES_USED));
+
+ /* Assure that code does not overlap flash data area.*/
+ ASSERT((__start_ot_flash_data >= __etext + SIZEOF(.data)), "Error: Code overlaps flash data area.")
+
+ /* Set stack top to end of RAM, and stack limit move down by
+ * size of stack_dummy section */
+ __StackTop = ORIGIN(RAM) + LENGTH(RAM);
+ __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+ PROVIDE(__stack = __StackTop);
+
+ /* Check if data + heap + stack exceeds RAM limit */
+ ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/examples/platforms/nrf528xx/nrf52833/nrf52833_bootloader_uart.ld b/examples/platforms/nrf528xx/nrf52833/nrf52833_bootloader_uart.ld
new file mode 100644
index 0000000..44ef3a9
--- /dev/null
+++ b/examples/platforms/nrf528xx/nrf52833/nrf52833_bootloader_uart.ld
@@ -0,0 +1,168 @@
+/*
+ * Copyright (c) 2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * GCC linker script for nRF52833 with UART bootloader.
+ */
+
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lnosys)
+
+MEMORY
+{
+ FLASH (rx) : ORIGIN = 0x00001000, LENGTH = 0x77000
+ RAM (rwx) : ORIGIN = 0x20000008, LENGTH = 0x1fff8
+}
+
+OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+
+ENTRY(Reset_Handler)
+
+FLASH_PAGE_SIZE = 4096;
+FLASH_DATA_PAGES_USED = 4;
+
+SECTIONS
+{
+ .text :
+ {
+ KEEP(*(.isr_vector))
+ *(.text*)
+
+ KEEP(*(.init))
+ KEEP(*(.fini))
+
+ /* .ctors */
+ *crtbegin.o(.ctors)
+ *crtbegin?.o(.ctors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+ *(SORT(.ctors.*))
+ *(.ctors)
+
+ /* .dtors */
+ *crtbegin.o(.dtors)
+ *crtbegin?.o(.dtors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ *(SORT(.dtors.*))
+ *(.dtors)
+
+ *(.rodata*)
+
+ KEEP(*(.eh_frame*))
+ } > FLASH
+
+ .ARM.extab :
+ {
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ } > FLASH
+
+ __exidx_start = .;
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ } > FLASH
+ __exidx_end = .;
+
+ __etext = .;
+
+ .data : AT (__etext)
+ {
+ __data_start__ = .;
+ *(vtable)
+ *(.data*)
+
+ . = ALIGN(4);
+ /* preinit data */
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP(*(.preinit_array))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+
+ . = ALIGN(4);
+ /* init data */
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array))
+ PROVIDE_HIDDEN (__init_array_end = .);
+
+
+ . = ALIGN(4);
+ /* finit data */
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP(*(SORT(.fini_array.*)))
+ KEEP(*(.fini_array))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+
+ KEEP(*(.jcr*))
+ . = ALIGN(4);
+ /* All data end */
+ __data_end__ = .;
+
+ } > RAM
+
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start__ = .;
+ *(.bss*)
+ *(COMMON)
+ . = ALIGN(4);
+ __bss_end__ = .;
+ } > RAM
+
+ .heap (COPY):
+ {
+ __HeapBase = .;
+ __end__ = .;
+ PROVIDE(end = .);
+ KEEP(*(.heap*))
+ __HeapLimit = .;
+ } > RAM
+
+ /* .stack_dummy section doesn't contains any symbols. It is only
+ * used for linker to calculate size of stack sections, and assign
+ * values to stack symbols later */
+ .stack_dummy (COPY):
+ {
+ KEEP(*(.stack*))
+ } > RAM
+
+ __stop_ot_flash_data = (ORIGIN(FLASH) + LENGTH(FLASH));
+ __start_ot_flash_data = (__stop_ot_flash_data - (FLASH_PAGE_SIZE * FLASH_DATA_PAGES_USED));
+
+ /* Assure that code does not overlap flash data area.*/
+ ASSERT((__start_ot_flash_data >= __etext + SIZEOF(.data)), "Error: Code overlaps flash data area.")
+
+ /* Set stack top to end of RAM, and stack limit move down by
+ * size of stack_dummy section */
+ __StackTop = ORIGIN(RAM) + LENGTH(RAM);
+ __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+ PROVIDE(__stack = __StackTop);
+
+ /* Check if data + heap + stack exceeds RAM limit */
+ ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/examples/platforms/nrf528xx/nrf52833/nrf52833_bootloader_usb.ld b/examples/platforms/nrf528xx/nrf52833/nrf52833_bootloader_usb.ld
new file mode 100644
index 0000000..dc4366c
--- /dev/null
+++ b/examples/platforms/nrf528xx/nrf52833/nrf52833_bootloader_usb.ld
@@ -0,0 +1,168 @@
+/*
+ * Copyright (c) 2018, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * GCC linker script for nRF52833 with USB bootloader.
+ */
+
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lnosys)
+
+MEMORY
+{
+ FLASH (rx) : ORIGIN = 0x00001000, LENGTH = 0x5f000
+ RAM (rwx) : ORIGIN = 0x20000008, LENGTH = 0x1fff8
+}
+
+OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+
+ENTRY(Reset_Handler)
+
+FLASH_PAGE_SIZE = 4096;
+FLASH_DATA_PAGES_USED = 4;
+
+SECTIONS
+{
+ .text :
+ {
+ KEEP(*(.isr_vector))
+ *(.text*)
+
+ KEEP(*(.init))
+ KEEP(*(.fini))
+
+ /* .ctors */
+ *crtbegin.o(.ctors)
+ *crtbegin?.o(.ctors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+ *(SORT(.ctors.*))
+ *(.ctors)
+
+ /* .dtors */
+ *crtbegin.o(.dtors)
+ *crtbegin?.o(.dtors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ *(SORT(.dtors.*))
+ *(.dtors)
+
+ *(.rodata*)
+
+ KEEP(*(.eh_frame*))
+ } > FLASH
+
+ .ARM.extab :
+ {
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ } > FLASH
+
+ __exidx_start = .;
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ } > FLASH
+ __exidx_end = .;
+
+ __etext = .;
+
+ .data : AT (__etext)
+ {
+ __data_start__ = .;
+ *(vtable)
+ *(.data*)
+
+ . = ALIGN(4);
+ /* preinit data */
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP(*(.preinit_array))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+
+ . = ALIGN(4);
+ /* init data */
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array))
+ PROVIDE_HIDDEN (__init_array_end = .);
+
+
+ . = ALIGN(4);
+ /* finit data */
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP(*(SORT(.fini_array.*)))
+ KEEP(*(.fini_array))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+
+ KEEP(*(.jcr*))
+ . = ALIGN(4);
+ /* All data end */
+ __data_end__ = .;
+
+ } > RAM
+
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start__ = .;
+ *(.bss*)
+ *(COMMON)
+ . = ALIGN(4);
+ __bss_end__ = .;
+ } > RAM
+
+ .heap (COPY):
+ {
+ __HeapBase = .;
+ __end__ = .;
+ PROVIDE(end = .);
+ KEEP(*(.heap*))
+ __HeapLimit = .;
+ } > RAM
+
+ /* .stack_dummy section doesn't contains any symbols. It is only
+ * used for linker to calculate size of stack sections, and assign
+ * values to stack symbols later */
+ .stack_dummy (COPY):
+ {
+ KEEP(*(.stack*))
+ } > RAM
+
+ __stop_ot_flash_data = (ORIGIN(FLASH) + LENGTH(FLASH));
+ __start_ot_flash_data = (__stop_ot_flash_data - (FLASH_PAGE_SIZE * FLASH_DATA_PAGES_USED));
+
+ /* Assure that code does not overlap flash data area.*/
+ ASSERT((__start_ot_flash_data >= __etext + SIZEOF(.data)), "Error: Code overlaps flash data area.")
+
+ /* Set stack top to end of RAM, and stack limit move down by
+ * size of stack_dummy section */
+ __StackTop = ORIGIN(RAM) + LENGTH(RAM);
+ __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+ PROVIDE(__stack = __StackTop);
+
+ /* Check if data + heap + stack exceeds RAM limit */
+ ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/examples/platforms/nrf528xx/nrf52833/openthread-core-nrf52833-config-check.h b/examples/platforms/nrf528xx/nrf52833/openthread-core-nrf52833-config-check.h
new file mode 100644
index 0000000..4151f07
--- /dev/null
+++ b/examples/platforms/nrf528xx/nrf52833/openthread-core-nrf52833-config-check.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef OPENTHREAD_CORE_NRF52833_CONFIG_CHECK_H_
+#define OPENTHREAD_CORE_NRF52833_CONFIG_CHECK_H_
+
+#if OPENTHREAD_CONFIG_RADIO_915MHZ_OQPSK_SUPPORT
+#error "Platform nrf52833 doesn't support configuration option: OPENTHREAD_CONFIG_RADIO_915MHZ_OQPSK_SUPPORT"
+#endif
+
+#endif /* OPENTHREAD_CORE_NRF52833_CONFIG_CHECK_H_ */
diff --git a/examples/platforms/nrf528xx/nrf52833/openthread-core-nrf52833-config.h b/examples/platforms/nrf528xx/nrf52833/openthread-core-nrf52833-config.h
new file mode 100644
index 0000000..29f4ce9
--- /dev/null
+++ b/examples/platforms/nrf528xx/nrf52833/openthread-core-nrf52833-config.h
@@ -0,0 +1,287 @@
+/*
+ * Copyright (c) 2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file includes nrf52833 compile-time configuration constants
+ * for OpenThread.
+ */
+
+#ifndef OPENTHREAD_CORE_NRF52833_CONFIG_H_
+#define OPENTHREAD_CORE_NRF52833_CONFIG_H_
+
+/*
+ * The GNU Autoconf system defines a PACKAGE macro which is the name
+ * of the software package. This name collides with PACKAGE field in
+ * the nRF52 Factory Information Configuration Registers (FICR)
+ * structure.
+ */
+#undef PACKAGE
+
+/**
+ * @def OPENTHREAD_CONFIG_LOG_OUTPUT
+ *
+ * The nrf52833 platform provides an otPlatLog() function.
+ */
+#ifndef OPENTHREAD_CONFIG_LOG_OUTPUT
+#define OPENTHREAD_CONFIG_LOG_OUTPUT OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_PLATFORM_INFO
+ *
+ * The platform-specific string to insert into the OpenThread version string.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_PLATFORM_INFO
+#define OPENTHREAD_CONFIG_PLATFORM_INFO "NRF52833"
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_STACK_VENDOR_OUI
+ *
+ * The Organizationally Unique Identifier for the vendor.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_STACK_VENDOR_OUI
+#define OPENTHREAD_CONFIG_STACK_VENDOR_OUI 0xf4ce36
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_MLE_MAX_CHILDREN
+ *
+ * The maximum number of children.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_MLE_MAX_CHILDREN
+#define OPENTHREAD_CONFIG_MLE_MAX_CHILDREN 32
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_NUM_MESSAGE_BUFFERS
+ *
+ * The number of message buffers in the buffer pool.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_NUM_MESSAGE_BUFFERS
+#define OPENTHREAD_CONFIG_NUM_MESSAGE_BUFFERS 160
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD
+ *
+ * The maximum number of supported IPv6 address registrations per child.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD
+#define OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD 6
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_MAX_STATECHANGE_HANDLERS
+ *
+ * The maximum number of state-changed callback handlers (set using `otSetStateChangedCallback()`).
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_MAX_STATECHANGE_HANDLERS
+#define OPENTHREAD_CONFIG_MAX_STATECHANGE_HANDLERS 3
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_TMF_ADDRESS_CACHE_ENTRIES
+ *
+ * The number of EID-to-RLOC cache entries.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_TMF_ADDRESS_CACHE_ENTRIES
+#define OPENTHREAD_CONFIG_TMF_ADDRESS_CACHE_ENTRIES 32
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_LOG_PREPREND_LEVEL
+ *
+ * Define to prepend the log level to all log messages
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_LOG_PREPEND_LEVEL
+#define OPENTHREAD_CONFIG_LOG_PREPEND_LEVEL 0
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_SOFTWARE_ACK_TIMEOUT_ENABLE
+ *
+ * Define to 1 if you want to enable software ACK timeout logic.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_SOFTWARE_ACK_TIMEOUT_ENABLE
+#define OPENTHREAD_CONFIG_SOFTWARE_ACK_TIMEOUT_ENABLE 0
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_SOFTWARE_RETRANSMIT_ENABLE
+ *
+ * Define to 1 if you want to enable software retransmission logic.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_SOFTWARE_RETRANSMIT_ENABLE
+#define OPENTHREAD_CONFIG_SOFTWARE_RETRANSMIT_ENABLE 1
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_SOFTWARE_CSMA_BACKOFF_ENABLE
+ *
+ * Define to 1 if you want to enable software CSMA-CA backoff logic.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_SOFTWARE_CSMA_BACKOFF_ENABLE
+#define OPENTHREAD_CONFIG_SOFTWARE_CSMA_BACKOFF_ENABLE 0
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_PLATFORM_USEC_TIMER_ENABLE
+ *
+ * Define to 1 if you want to support microsecond timer in platform.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_PLATFORM_USEC_TIMER_ENABLE
+#define OPENTHREAD_CONFIG_PLATFORM_USEC_TIMER_ENABLE 1
+#endif
+
+/**
+ * @def SETTINGS_CONFIG_BASE_ADDRESS
+ *
+ * The base address of settings.
+ *
+ */
+#ifndef SETTINGS_CONFIG_BASE_ADDRESS
+#define SETTINGS_CONFIG_BASE_ADDRESS 0
+#endif
+
+/**
+ * @def SETTINGS_CONFIG_PAGE_SIZE
+ *
+ * The page size of settings.
+ *
+ */
+#ifndef SETTINGS_CONFIG_PAGE_SIZE
+#define SETTINGS_CONFIG_PAGE_SIZE 4096
+#endif
+
+/**
+ * @def SETTINGS_CONFIG_PAGE_NUM
+ *
+ * The page number of settings.
+ *
+ */
+#ifndef SETTINGS_CONFIG_PAGE_NUM
+#define SETTINGS_CONFIG_PAGE_NUM 4
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE
+ *
+ * The size of heap buffer when DTLS is enabled.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE
+#define OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE (4096 * sizeof(void *))
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE_NO_DTLS
+ *
+ * The size of heap buffer when DTLS is disabled.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE_NO_DTLS
+#define OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE_NO_DTLS 2048
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
+ *
+ * Define as 1 to enable the time synchronization service feature.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
+#define OPENTHREAD_CONFIG_TIME_SYNC_ENABLE 0
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_CLI_TX_BUFFER_SIZE
+ *
+ * The size of CLI message buffer in bytes
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_CLI_UART_TX_BUFFER_SIZE
+#define OPENTHREAD_CONFIG_CLI_UART_TX_BUFFER_SIZE 2048
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
+ *
+ * Define as 1 to support IEEE 802.15.4-2015 Header IE (Information Element) generation and parsing, it must be set
+ * to support following features:
+ * 1. Time synchronization service feature (i.e., OPENTHREAD_CONFIG_TIME_SYNC_ENABLE is set).
+ *
+ * @note If it's enabled, plaforms must support interrupt context and concurrent access AES.
+ *
+ */
+#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
+#define OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT 1
+#endif
+
+/**
+ * @def RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM
+ *
+ * The number of short source address table entries.
+ *
+ */
+#ifndef RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM
+#define RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM 0
+#endif
+
+/**
+ * @def RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM
+ *
+ * The number of extended source address table entries.
+ *
+ */
+#ifndef RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM
+#define RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM 0
+#endif
+
+/*
+ * Suppress the ARMCC warning on unreachable statement,
+ * e.g. break after assert(false) or ExitNow() macro.
+ */
+#if defined(__CC_ARM)
+_Pragma("diag_suppress=111") _Pragma("diag_suppress=128")
+#endif
+
+#endif // OPENTHREAD_CORE_NRF52833_CONFIG_H_
diff --git a/examples/platforms/nrf528xx/nrf52833/platform-config.h b/examples/platforms/nrf528xx/nrf52833/platform-config.h
new file mode 100644
index 0000000..8dd54f4
--- /dev/null
+++ b/examples/platforms/nrf528xx/nrf52833/platform-config.h
@@ -0,0 +1,467 @@
+/*
+ * Copyright (c) 2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file includes the platform-specific configuration.
+ *
+ */
+
+#ifndef PLATFORM_CONFIG_H_
+#define PLATFORM_CONFIG_H_
+
+#include "nrf.h"
+#include "nrf_peripherals.h"
+#include "drivers/clock/nrf_drv_clock.h"
+#include "hal/nrf_radio.h"
+#include "hal/nrf_uart.h"
+
+#include "openthread-core-config.h"
+#include <openthread/config.h>
+
+/*******************************************************************************
+ * @section UART Driver Configuration.
+ ******************************************************************************/
+
+/**
+ * @def UART_INSTANCE
+ *
+ * UART Instance.
+ *
+ */
+#ifndef UART_INSTANCE
+#define UART_INSTANCE NRF_UART0
+#endif
+
+/**
+ * @def UART_PARITY
+ *
+ * UART Parity configuration.
+ *
+ * @brief Possible values:
+ * \ref NRF_UART_PARITY_EXCLUDED - Parity bit is not present.
+ * \ref NRF_UART_PARITY_INCLUDED - Parity bit is present.
+ *
+ */
+#ifndef UART_PARITY
+#define UART_PARITY NRF_UART_PARITY_EXCLUDED
+#endif
+
+/**
+ * @def UART_HWFC_ENABLED
+ *
+ * Enable UART Hardware Flow Control.
+ *
+ */
+#ifndef UART_HWFC_ENABLED
+#define UART_HWFC_ENABLED 1
+#endif
+
+/**
+ * @def UART_BAUDRATE
+ *
+ * UART Baudrate.
+ *
+ * @brief Possible values:
+ * \ref NRF_UART_BAUDRATE_1200 - 1200 baud.
+ * \ref NRF_UART_BAUDRATE_2400 - 2400 baud.
+ * \ref NRF_UART_BAUDRATE_4800 - 4800 baud.
+ * \ref NRF_UART_BAUDRATE_9600 - 9600 baud.
+ * \ref NRF_UART_BAUDRATE_14400 - 14400 baud.
+ * \ref NRF_UART_BAUDRATE_19200 - 19200 baud.
+ * \ref NRF_UART_BAUDRATE_28800 - 28800 baud.
+ * \ref NRF_UART_BAUDRATE_38400 - 38400 baud.
+ * \ref NRF_UART_BAUDRATE_57600 - 57600 baud.
+ * \ref NRF_UART_BAUDRATE_76800 - 76800 baud.
+ * \ref NRF_UART_BAUDRATE_115200 - 115200 baud.
+ * \ref NRF_UART_BAUDRATE_230400 - 230400 baud.
+ * \ref NRF_UART_BAUDRATE_250000 - 250000 baud.
+ * \ref NRF_UART_BAUDRATE_460800 - 460800 baud.
+ * \ref NRF_UART_BAUDRATE_921600 - 921600 baud.
+ * \ref NRF_UART_BAUDRATE_1000000 - 1000000 baud.
+ *
+ */
+#ifndef UART_BAUDRATE
+#define UART_BAUDRATE NRF_UART_BAUDRATE_115200
+#endif
+
+/**
+ * @def UART_IRQN
+ *
+ * UART Interrupt number.
+ *
+ */
+#ifndef UART_IRQN
+#define UART_IRQN UARTE0_UART0_IRQn
+#endif
+
+/**
+ * @def UART_IRQ_PRIORITY
+ *
+ * UART Interrupt priority.
+ *
+ */
+#ifndef UART_IRQ_PRIORITY
+#define UART_IRQ_PRIORITY 6
+#endif
+
+/**
+ * @def UART_RX_BUFFER_SIZE
+ *
+ * UART Receive buffer size.
+ *
+ */
+#ifndef UART_RX_BUFFER_SIZE
+#define UART_RX_BUFFER_SIZE 512
+#endif
+
+/**
+ * @def UART_PIN_TX
+ *
+ * UART TX Pin.
+ *
+ */
+#ifndef UART_PIN_TX
+#define UART_PIN_TX 6
+#endif
+
+/**
+ * @def UART_PIN_RX
+ *
+ * UART RX Pin.
+ *
+ */
+#ifndef UART_PIN_RX
+#define UART_PIN_RX 8
+#endif
+
+/**
+ * @def UART_PIN_CTS
+ *
+ * UART CTS Pin.
+ *
+ */
+#ifndef UART_PIN_CTS
+#define UART_PIN_CTS 7
+#endif
+
+/**
+ * @def UART_PIN_RTS
+ *
+ * UART RTS Pin.
+ *
+ */
+#ifndef UART_PIN_RTS
+#define UART_PIN_RTS 5
+#endif
+
+/*******************************************************************************
+ * @section Alarm Driver Configuration.
+ ******************************************************************************/
+
+/**
+ * @def RTC_INSTANCE
+ *
+ * RTC Instance.
+ *
+ */
+#ifndef RTC_INSTANCE
+#define RTC_INSTANCE NRF_RTC2
+#endif
+
+/**
+ * @def RTC_IRQ_HANDLER
+ *
+ * RTC interrupt handler name
+ *
+ */
+#ifndef RTC_IRQ_HANDLER
+#define RTC_IRQ_HANDLER RTC2_IRQHandler
+#endif
+
+/**
+ * @def RTC_IRQN
+ *
+ * RTC Interrupt number.
+ *
+ */
+#ifndef RTC_IRQN
+#define RTC_IRQN RTC2_IRQn
+#endif
+
+/**
+ * @def RTC_IRQ_PRIORITY
+ *
+ * RTC Interrupt priority.
+ *
+ */
+#ifndef RTC_IRQ_PRIORITY
+#define RTC_IRQ_PRIORITY 6
+#endif
+
+/*******************************************************************************
+ * @section Random Number Generator Driver Configuration.
+ ******************************************************************************/
+
+/**
+ * @def RNG_BUFFER_SIZE
+ *
+ * True Random Number Generator buffer size.
+ *
+ */
+#ifndef RNG_BUFFER_SIZE
+#define RNG_BUFFER_SIZE 128
+#endif
+
+/**
+ * @def RNG_IRQ_PRIORITY
+ *
+ * RNG Interrupt priority.
+ *
+ */
+#ifndef RNG_IRQ_PRIORITY
+#define RNG_IRQ_PRIORITY 6
+#endif
+
+/*******************************************************************************
+ * @section SPI Slave configuration.
+ ******************************************************************************/
+
+/**
+ * @def SPIS Instance.
+ */
+#ifndef SPIS_INSTANCE
+#define SPIS_INSTANCE 0
+#endif
+
+/**
+ * @def SPIS mode.
+ *
+ * @brief Possible values:
+ * \ref NRF_SPIS_MODE_0 - SCK active high, sample on leading edge of clock.
+ * \ref NRF_SPIS_MODE_1 - SCK active high, sample on trailing edge of clock.
+ * \ref NRF_SPIS_MODE_2 - SCK active low, sample on leading edge of clock.
+ * \ref NRF_SPIS_MODE_3 - SCK active low, sample on trailing edge of clock.
+ */
+#ifndef SPIS_MODE
+#define SPIS_MODE NRF_SPIS_MODE_0
+#endif
+
+/**
+ * @def SPIS bit orders.
+ *
+ * @brief Possible values:
+ * \ref NRF_SPIS_BIT_ORDER_MSB_FIRST - Most significant bit shifted out first.
+ * \ref NRF_SPIS_BIT_ORDER_LSB_FIRST - Least significant bit shifted out first.
+ */
+#ifndef SPIS_BIT_ORDER
+#define SPIS_BIT_ORDER NRF_SPIS_BIT_ORDER_MSB_FIRST
+#endif
+
+/**
+ * @def SPIS Interrupt priority.
+ */
+#ifndef SPIS_IRQ_PRIORITY
+#define SPIS_IRQ_PRIORITY 6
+#endif
+
+/**
+ * @def SPIS MOSI Pin.
+ */
+#ifndef SPIS_PIN_MOSI
+#define SPIS_PIN_MOSI 4
+#endif
+
+/**
+ * @def SPIS MISO Pin.
+ */
+#ifndef SPIS_PIN_MISO
+#define SPIS_PIN_MISO 28
+#endif
+
+/**
+ * @def SPIS SCK Pin.
+ */
+#ifndef SPIS_PIN_SCK
+#define SPIS_PIN_SCK 3
+#endif
+
+/**
+ * @def SPIS CSN Pin.
+ */
+#ifndef SPIS_PIN_CSN
+#define SPIS_PIN_CSN 29
+#endif
+
+/**
+ * @def SPIS Host IRQ Pin.
+ */
+#ifndef SPIS_PIN_HOST_IRQ
+#define SPIS_PIN_HOST_IRQ 30
+#endif
+
+/*******************************************************************************
+ * @section USB driver configuration.
+ ******************************************************************************/
+
+/**
+ * @def USB_HOST_UART_CONFIG_DELAY_MS
+ *
+ * Delay after DTR gets asserted that we start send any queued data. This allows slow
+ * Linux-based hosts to have enough time to configure their port for raw mode.
+ *
+ */
+#ifndef USB_HOST_UART_CONFIG_DELAY_MS
+#define USB_HOST_UART_CONFIG_DELAY_MS 10
+#endif
+
+/**
+ * @def USB_CDC_AS_SERIAL_TRANSPORT
+ *
+ * Use USB CDC driver for serial communication.
+ */
+#ifndef USB_CDC_AS_SERIAL_TRANSPORT
+#define USB_CDC_AS_SERIAL_TRANSPORT 0
+#endif
+
+/**
+ * @def The USB interface to use for CDC ACM COMM.
+ *
+ * According to the USB Specification, interface numbers cannot have gaps. Tailor this value to adhere to this
+ * limitation. Takes values between 0-255.
+ */
+#ifndef USB_CDC_ACM_COMM_INTERFACE
+#define USB_CDC_ACM_COMM_INTERFACE 1
+#endif
+
+/**
+ * @def The USB interface to use for CDC ACM DATA.
+ *
+ * According to the USB Specification, interface numbers cannot have gaps. Tailor this value to adhere to this
+ * limitation. Takes values between 0-255.
+ */
+#ifndef USB_CDC_ACM_DATA_INTERFACE
+#define USB_CDC_ACM_DATA_INTERFACE 2
+#endif
+
+/**
+ * @def OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
+ *
+ * Reset the application, not the chip, when a software reset is requested.
+ * via `otPlatReset()`.
+ */
+#ifndef OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
+#define OPENTHREAD_PLATFORM_USE_PSEUDO_RESET USB_CDC_AS_SERIAL_TRANSPORT
+#endif
+
+/*******************************************************************************
+ * @section Platform FEM Configuration
+ ******************************************************************************/
+
+/**
+ * @def PLATFORM_FEM_ENABLE_DEFAULT_CONFIG
+ *
+ * Enable default front end module configuration.
+ *
+ */
+#ifndef PLATFORM_FEM_ENABLE_DEFAULT_CONFIG
+#define PLATFORM_FEM_ENABLE_DEFAULT_CONFIG 0
+#endif
+
+/*******************************************************************************
+ * @section Radio driver configuration.
+ ******************************************************************************/
+
+/**
+ * @def NRF_802154_PENDING_SHORT_ADDRESSES
+ *
+ * Number of slots containing short addresses of nodes for which pending data is stored.
+ *
+ */
+#ifndef NRF_802154_PENDING_SHORT_ADDRESSES
+#define NRF_802154_PENDING_SHORT_ADDRESSES OPENTHREAD_CONFIG_MLE_MAX_CHILDREN
+#endif
+
+/**
+ * @def NRF_802154_PENDING_EXTENDED_ADDRESSES
+ *
+ * Number of slots containing extended addresses of nodes for which pending data is stored.
+ *
+ */
+#ifndef NRF_802154_PENDING_EXTENDED_ADDRESSES
+#define NRF_802154_PENDING_EXTENDED_ADDRESSES OPENTHREAD_CONFIG_MLE_MAX_CHILDREN
+#endif
+
+/**
+ * @def NRF_802154_CSMA_CA_ENABLED
+ *
+ * If CSMA-CA procedure should be enabled by the driver. Disabling CSMA-CA procedure improves
+ * driver performance.
+ *
+ */
+#ifndef NRF_802154_CSMA_CA_ENABLED
+#define NRF_802154_CSMA_CA_ENABLED 1
+#endif
+
+/**
+ * @def NRF_802154_ACK_TIMEOUT_ENABLED
+ *
+ * If ACK timeout feature should be enabled in the driver.
+ *
+ */
+#ifndef NRF_802154_ACK_TIMEOUT_ENABLED
+#define NRF_802154_ACK_TIMEOUT_ENABLED 1
+#endif
+
+/*******************************************************************************
+ * @section Temperature sensor driver configuration.
+ ******************************************************************************/
+
+/**
+ * @def TEMP_MEASUREMENT_INTERVAL
+ *
+ * Interval of consecutive temperature measurements [s].
+ *
+ */
+#ifndef TEMP_MEASUREMENT_INTERVAL
+#define TEMP_MEASUREMENT_INTERVAL 30
+#endif
+
+/**
+ * @def NRF_802154_TX_STARTED_NOTIFY_ENABLED
+ *
+ * If notification of started transmission should be enabled in the driver.
+ *
+ * @note This feature must be enabled to support Header IE related features.
+ *
+ */
+#ifndef NRF_802154_TX_STARTED_NOTIFY_ENABLED
+#define NRF_802154_TX_STARTED_NOTIFY_ENABLED 1
+#endif
+
+#endif // PLATFORM_CONFIG_H_
diff --git a/examples/platforms/nrf528xx/nrf52840/Makefile.am b/examples/platforms/nrf528xx/nrf52840/Makefile.am
new file mode 100644
index 0000000..6a06149
--- /dev/null
+++ b/examples/platforms/nrf528xx/nrf52840/Makefile.am
@@ -0,0 +1,168 @@
+#
+# Copyright (c) 2016-2017, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
+
+lib_LIBRARIES = \
+ libopenthread-nrf52840.a \
+ libopenthread-nrf52840-sdk.a \
+ libopenthread-nrf52840-softdevice-sdk.a \
+ $(NULL)
+
+# Do not enable -pedantic-errors for nRF52840 driver library
+override CFLAGS := $(filter-out -pedantic-errors,$(CFLAGS))
+override CXXFLAGS := $(filter-out -pedantic-errors,$(CXXFLAGS))
+
+# Do not enable -Wundef for nRF52840 driver library
+override CFLAGS := $(filter-out -Wundef,$(CFLAGS))
+override CXXFLAGS := $(filter-out -Wundef,$(CXXFLAGS))
+
+COMMONCPPFLAGS = \
+ -DCONFIG_GPIO_AS_PINRESET \
+ -DNRF52840_XXAA \
+ -I$(srcdir) \
+ -I$(top_srcdir)/include \
+ -I$(top_srcdir)/examples/platforms \
+ -I$(top_srcdir)/examples/platforms/nrf528xx/src \
+ -I$(top_srcdir)/src/core \
+ -I$(top_srcdir)/third_party/NordicSemiconductor \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/cmsis \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/dependencies \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/clock \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/common \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/fem/three_pin_gpio \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/hal \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/mac_features \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/mac_features/ack_generator \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/rsch \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/rsch/raal \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/power \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/systick \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/usbd \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/app_error \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/atfifo \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/atomic \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/block_dev \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/delay \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/usb \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/usb/config \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/usb/class/cdc \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/usb/class/cdc/acm \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/utf_converter \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx/hal \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx/drivers \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx/drivers/include \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx/mdk \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx/soc \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/softdevice/s140/headers \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/softdevice/s140/headers/nrf52 \
+ $(NULL)
+
+PLATFORM_COMMON_SOURCES = \
+ src/alarm.c \
+ src/diag.c \
+ src/entropy.c \
+ src/fem.c \
+ src/flash.c \
+ src/logging.c \
+ src/misc.c \
+ src/radio.c \
+ src/spi-slave.c \
+ src/system.c \
+ src/temp.c \
+ src/uart.c \
+ src/usb-cdc-uart.c \
+ $(NULL)
+
+SINGLEPHY_SOURCES = \
+ src/flash_nosd.c \
+ $(NULL)
+
+SOFTDEVICE_SOURCES = \
+ src/flash_sd.c \
+ src/softdevice.c \
+ src/softdevice.h \
+ $(NULL)
+
+SOFTDEVICE_CPPFLAGS = \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/rsch/raal/softdevice \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/softdevice/s140/headers \
+ -DSOFTDEVICE_PRESENT \
+ -DS140 \
+ $(NULL)
+
+PLATFORM_SOURCES = \
+ $(PLATFORM_COMMON_SOURCES) \
+ $(NULL)
+
+libopenthread_nrf52840_a_CPPFLAGS = \
+ $(COMMONCPPFLAGS) \
+ $(SINGLEPHY_CPPFLAGS) \
+ -DPLATFORM_OPENTHREAD_VANILLA \
+ $(NULL)
+
+libopenthread_nrf52840_a_SOURCES = \
+ $(PLATFORM_SOURCES) \
+ $(SINGLEPHY_SOURCES) \
+ $(NULL)
+
+libopenthread_nrf52840_sdk_a_CPPFLAGS = \
+ $(COMMONCPPFLAGS) \
+ $(SINGLEPHY_CPPFLAGS) \
+ $(NULL)
+
+libopenthread_nrf52840_sdk_a_SOURCES = \
+ $(PLATFORM_SOURCES) \
+ $(SINGLEPHY_SOURCES) \
+ $(NULL)
+
+libopenthread_nrf52840_softdevice_sdk_a_CPPFLAGS = \
+ $(COMMONCPPFLAGS) \
+ $(SOFTDEVICE_CPPFLAGS) \
+ $(NULL)
+
+libopenthread_nrf52840_softdevice_sdk_a_SOURCES = \
+ $(PLATFORM_SOURCES) \
+ $(SOFTDEVICE_SOURCES) \
+ $(NULL)
+
+Dash = -
+
+libopenthread_nrf52840_a_LIBADD = \
+ $(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o") \
+ $(shell find $(top_builddir)/third_party/jlink/SEGGER_RTT_V640/RTT $(Dash)type f $(Dash)name "*.o")
+
+libopenthread_nrf52840_sdk_a_LIBADD = \
+ $(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o")
+
+libopenthread_nrf52840_softdevice_sdk_a_LIBADD = \
+ $(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o")
+
+include $(abs_top_nlbuild_autotools_dir)/automake/post.am
diff --git a/examples/platforms/nrf528xx/nrf52840/Makefile.platform.am b/examples/platforms/nrf528xx/nrf52840/Makefile.platform.am
new file mode 100644
index 0000000..10c191a
--- /dev/null
+++ b/examples/platforms/nrf528xx/nrf52840/Makefile.platform.am
@@ -0,0 +1,61 @@
+#
+# Copyright (c) 2017, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+#
+# nrf52840 platform-specific Makefile
+#
+
+LDADD_COMMON += \
+ $(top_builddir)/examples/platforms/nrf528xx/libopenthread-nrf52840.a \
+ $(top_builddir)/third_party/NordicSemiconductor/libnordicsemi-nrf52840-sdk.a \
+ $(top_builddir)/third_party/NordicSemiconductor/libnordicsemi-nrf52840-radio-driver.a \
+ $(NULL)
+
+if !OPENTHREAD_ENABLE_BUILTIN_MBEDTLS
+LDADD_COMMON += \
+ $(top_srcdir)/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_glue.a \
+ $(top_srcdir)/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_glue_cc310.a \
+ $(top_srcdir)/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_glue_vanilla.a \
+ $(top_srcdir)/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_cc310_backend.a \
+ $(top_srcdir)/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_vanilla_backend.a \
+ $(top_srcdir)/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedtls_tls_vanilla.a \
+ $(top_srcdir)/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedtls_x509_vanilla.a \
+ $(top_srcdir)/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedtls_base_vanilla.a \
+ $(top_srcdir)/third_party/NordicSemiconductor/libraries/nrf_security/lib/libnrf_cc310_platform_0.9.1.a \
+ $(NULL)
+endif
+
+if OPENTHREAD_ENABLE_CUSTOM_LINKER_FILE
+LDFLAGS_COMMON += \
+ -T $(OPENTHREAD_CUSTOM_LINKER_FILE) \
+ $(NULL)
+else
+LDFLAGS_COMMON += \
+ -T $(top_srcdir)/examples/platforms/nrf528xx/nrf52840/nrf52840.ld \
+ $(NULL)
+endif
diff --git a/examples/platforms/nrf528xx/nrf52840/README.md b/examples/platforms/nrf528xx/nrf52840/README.md
new file mode 100644
index 0000000..1b6eca2
--- /dev/null
+++ b/examples/platforms/nrf528xx/nrf52840/README.md
@@ -0,0 +1,551 @@
+# OpenThread on nRF52840 Example
+
+<a href="http://threadgroup.org/technology/ourtechnology#certifiedproducts">
+<img src="https://cdn.rawgit.com/openthread/openthread/ab4c4e1e/doc/images/certified.svg" alt="Thread Certified Component" width="150px" align="right">
+</a>
+
+This directory contains example platform drivers for [Nordic Semiconductor nRF52840 SoC][nRF52840]. The OpenThread stack has been officially certified as a *Thread Certified Component* on this platform.
+
+[nRF52840]: https://www.nordicsemi.com/Products/Low-power-short-range-wireless/nRF52840
+
+To facilitate Thread products development with the nRF52840 platform, Nordic Semiconductor provides <i>nRF5 SDK for Thread and Zigbee</i>. See [Nordic Semiconductor's nRF5 SDK for Thread and Zigbee][nRF5-SDK-section] section for more details.
+
+[nRF5-SDK-section]: #nordic-semiconductors-nrf5-sdk-for-thread-and-zigbee
+
+## Prerequisites
+
+Before you start building the examples, you must download and install the toolchain and the tools required for flashing and debugging.
+
+### Toolchain
+
+Download and install the [GNU toolchain for ARM Cortex-M][gnu-toolchain].
+
+[gnu-toolchain]: https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-rm
+
+To install the GNU toolchain and its dependencies, run the following commands in Bash:
+
+```bash
+$ cd <path-to-openthread>
+$ ./script/bootstrap
+```
+
+### Flashing and debugging tools
+
+[nRF-Command-Line-Tools]: https://www.nordicsemi.com/Software-and-Tools/Development-Tools/nRF-Command-Line-Tools
+
+Install the [nRF Command Line Tools][nRF-Command-Line-Tools] to flash, debug, and make use of logging features on the nRF52840 DK with SEGGER J-Link.
+
+## Building the examples
+
+ To build the examples, run the following command in Bash:
+
+```bash
+$ cd <path-to-openthread>
+$ ./bootstrap
+$ make -f examples/Makefile-nrf52840
+```
+
+After a successful build, the `elf` files can be found in
+`<path-to-openthread>/output/nrf52840/bin`.
+You can convert them to hex using `arm-none-eabi-objcopy`:
+```bash
+$ arm-none-eabi-objcopy -O ihex ot-cli-ftd ot-cli-ftd.hex
+```
+
+### USB CDC ACM support
+
+You can build the libraries with support for the native USB CDC ACM as a serial transport.
+To do so, build the firmware with the following parameter:
+```
+$ make -f examples/Makefile-nrf52840 USB=1
+```
+
+Note that the USB CDC ACM serial transport is not supported with Engineering sample A of the nRF52840 chip.
+
+If you are using Windows 7 or earlier, you must load an additional USB CDC driver.
+The driver can be found in `third_party/NordicSemiconductor/libraries/usb/nordic_cdc_acm_example.inf`.
+
+### Bootloader support
+
+The examples support the following bootloaders for performing a Device Firmware Upgrade (DFU):
+* USB bootloader
+* UART bootloader
+* BLE bootloader
+
+The support for a particular bootloader can be enabled with the following switches:
+* USB: `BOOTLOADER=USB`
+* UART: `BOOTLOADER=UART`
+* BLE: `BOOTLOADER=BLE`
+
+### nRF52840 dongle support (PCA10059)
+
+You can build the libraries with support for the USB bootloader with USB DFU trigger support in PCA10059. As this dongle uses the native USB support, you must enable it as well.
+
+To build the libraries, run make with the following parameters:
+
+```
+$ make -f examples/Makefile-nrf52840 USB=1 BOOTLOADER=USB
+```
+
+See [nRF52840 Dongle Programming][nrf52840-dongle-programming] for more details about how to use the USB bootloader.
+
+[nrf52840-dongle-programming]: https://infocenter.nordicsemi.com/topic/ug_nc_programmer/UG/nrf_connect_programmer/ncp_programming_dongle.html
+
+### Native SPI support
+
+You can build the libraries with support for native SPI Slave.
+To build the libraries, run make with the following parameter:
+
+```
+$ make -f examples/Makefile-nrf52840 NCP_SPI=1
+```
+
+With this option enabled, SPI communication between the NCP example and wpantund is possible
+(provided that the wpantund host supports SPI Master). To achieve that, an appropriate SPI device
+should be chosen in wpantund configuration file, `/etc/wpantund.conf`. You can find an example below.
+```
+Config:NCP:SocketPath "system:/usr/bin/spi-hdlc-adapter --gpio-int /sys/class/gpio/gpio25 /dev/spidev0.0"
+```
+
+In this example, [spi-hdlc-adapter][spi-hdlc-adapter] is a tool that you can use to communicate between NCP and wpantund over SPI. For this example, `spi-hdlc-adapter` is installed in `/usr/bin`.
+
+The default SPI Slave pin configuration for nRF52840 is defined in `examples/platforms/nrf52840/platform-config.h`.
+
+Note that the native SPI Slave support is not intended to be used with Engineering sample A of the nRF52840 chip due to
+single transfer size limitation.
+
+[spi-hdlc-adapter]: https://github.com/openthread/openthread/tree/master/tools/spi-hdlc-adapter
+
+### Optional prefix for compiler command
+
+You can prefix the compiler command using the CCPREFIX parameter. This speeds up the compilation when you use tools like [ccache][ccache-website]. Example usage:
+
+[ccache-website]: https://ccache.samba.org/
+
+```
+$ make -f examples/Makefile-nrf52840 USB=1 CCPREFIX=ccache
+```
+
+### CryptoCell 310 support
+
+By default, OpenThread uses mbedTLS library with support for CryptoCell 310 hardware acceleration of cryptographic operations. When building the application, an explicit setup is needed (error checking omitted):
+```
+mbedtls_platform_set_calloc_free(calloc, free);
+mbedtls_platform_setup(NULL);
+```
+
+When building an external application with OpenThread libraries and CryptoCell 310 hardware acceleration, use the following configuration:
+- Crypto libraries:
+ - `third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_glue.a`
+ - `third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_glue_cc310.a`
+ - `third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_glue_vanilla.a`
+ - `third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_cc310_backend.a`
+ - `third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_vanilla_backend.a`
+ - `third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedtls_tls_vanilla.a`
+ - `third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedtls_x509_vanilla.a`
+ - `third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedtls_base_vanilla.a`
+ - `third_party/NordicSemiconductor/libraries/nrf_security/lib/libnrf_cc310_platform_0.9.1.a`
+- Include directories:
+ - `third_party/NordicSemiconductor/libraries/nrf_security/mbedtls_platform_config`
+ - `third_party/NordicSemiconductor/libraries/nrf_security/include`
+ - `third_party/NordicSemiconductor/libraries/nrf_security/config`
+ - `third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_platform/include`
+- Defines:
+ - `MBEDTLS_CONFIG_FILE` set to `"nrf-config.h"`
+ - `MBEDTLS_USER_CONFIG_FILE` set to `"nrf52840-mbedtls-config.h"`
+### Optional disabling of CryptoCell 310 support
+
+By default, OpenThread uses mbedTLS library with support for CryptoCell 310 hardware acceleration of cryptographic operations. You can disable CryptoCell 310 and use software cryptography instead by building OpenThread with the following parameter:
+```
+$ make -f examples/Makefile-nrf52840 DISABLE_BUILTIN_MBEDTLS=0 ...
+```
+
+When building an external application with OpenThread libraries and software cryptography, use the following configuration:
+- Crypto libraries:
+ - `output/nrf52840/lib/libmbedcrypto.a` (present after successful build)
+- Include directories:
+ - `third_party/NordicSemiconductor/libraries/nrf_security/mbedtls_platform_config`
+ - `third_party/mbedtls`
+ - `third_party/mbedtls/repo/include`
+- Defines:
+ - `MBEDTLS_CONFIG_FILE` set to `"mbedtls-config.h"`
+ - `MBEDTLS_USER_CONFIG_FILE` set to `"nrf52840-mbedtls-config.h"`
+
+### CryptoCell 310 abort mechanism
+
+The CryptoCell 310 platform implements an abort mechanism. By default, any fault in the CryptoCell 310 library results in the system reset. This behavior can be changed by a call to the `nrf_cc310_platform_set_abort()` function. This function must be called before `mbedtls_platform_setup`:
+```
+void nrf_cc310_platform_set_abort(
+ nrf_cc310_platform_abort_apis_t const * const apis)
+```
+
+### CryptoCell 310 RTOS support
+
+The hardware-accelerated mbedTLS library supports access from multiple threads. By default, simple blocking implementation of mutexes is used. The locking mechanism can be replaced by using the `nrf_cc310_platform_set_mutexes()` function. This function must be called before `mbedtls_platform_setup`:
+```
+void nrf_cc310_platform_set_mutexes(nrf_cc310_platform_mutex_apis_t const * const apis,
+ nrf_cc310_platform_mutexes_t const * const mutexes)
+```
+
+The sample implementation of mutexes for FreeRTOS and Zephyr operating systems can be found in `nrf_cc310_platform_mutex_freertos.c` and `nrf_cc310_platform_mutex_zephyr.c`. Both files implement the function `int nrf_cc310_platform_mutex_init(void)`. This function must be called before `mbedtls_platform_setup`.
+
+The sample implementation of the abort functionality for FreeRTOS and Zephyr operating systems can be found in `nrf_cc310_platform_abort_freertos.c` and `nrf_cc310_platform_abort_zephyr.c`. Both files implement the function `void nrf_cc310_platform_abort_init(void)`. This function must be called before `mbedtls_platform_setup`.
+
+The typical setup in the RTOS environment (error checking omitted) is as follows:
+```
+mbedtls_platform_set_calloc_free(calloc, free);
+nrf_cc310_platform_abort_init();
+nrf_cc310_platform_mutex_init();
+mbedtls_platform_setup(NULL);
+```
+
+When building an external application that uses RTOS with OpenThread libraries and the CryptoCell 310 hardware acceleration, use the following configuration:
+- Crypto libraries:
+ - `third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_glue.a`
+ - `third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_glue_cc310.a`
+ - `third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_glue_vanilla.a`
+ - `third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_cc310_backend.a`
+ - `third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_vanilla_backend.a`
+ - `third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedtls_tls_vanilla.a`
+ - `third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedtls_x509_vanilla.a`
+ - `third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedtls_base_vanilla.a`
+ - `third_party/NordicSemiconductor/libraries/nrf_security/lib/libnrf_cc310_platform_0.9.1.a`
+- Include directories:
+ - `third_party/NordicSemiconductor/libraries/nrf_security/mbedtls_platform_config`
+ - `third_party/NordicSemiconductor/libraries/nrf_security/include`
+ - `third_party/NordicSemiconductor/libraries/nrf_security/config`
+ - `third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_platform/include`
+- Defines:
+ - `MBEDTLS_CONFIG_FILE` set to `"nrf-config.h"`
+ - `MBEDTLS_USER_CONFIG_FILE` set to `"nrf52840-mbedtls-config.h"`
+- Sources:
+ - `nrf_cc310_platform_mutex_freertos.c` or `nrf_cc310_platform_mutex_zephyr.c` from `third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_platform/src`, depending on the RTOS used.
+ - `nrf_cc310_platform_abort_freertos.c` or `nrf_cc310_platform_abort_zephyr.c` from `third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_platform/src`, depending on the RTOS used.
+
+See [mbedTls Thread Safety and Multi Threading][mbedtls-thread-safety-and-multi-threading] for more details.
+
+### Optional software only mbedTLS threading support
+
+By default, the software-only mbedTLS library is built without support for multiple threads. You can enable this built-in support by building OpenThread with the following parameter:
+
+```
+$ make -f examples/Makefile-nrf52840 MBEDTLS_THREADING=1
+```
+
+The simple mutex definition is used as shown below:
+
+```
+typedef void * mbedtls_threading_mutex_t;
+```
+
+However, you can modify it, by providing a path to a header file with proper definition. To do that, build OpenThread with the following parameter:
+
+```
+$ make -f examples/Makefile-nrf52840 MBEDTLS_THREADING=1 MBEDTLS_THREADING_MUTEX_DEF="path_to_a_header_file_with_mutex_definition.h"
+```
+
+When building an external application that uses RTOS with OpenThread libraries and software cryptography, use the following configuration:
+- Crypto libraries:
+ - `output/nrf52840/lib/libmbedcrypto.a` (present after successful build)
+- Include directories:
+ - `third_party/NordicSemiconductor/libraries/nrf_security/mbedtls_platform_config`
+ - `third_party/mbedtls`
+ - `third_party/mbedtls/repo/include`
+ - `third_party/NordicSemiconductor/libraries/nrf_security/include/software-only-threading`
+- Defines:
+ - `MBEDTLS_CONFIG_FILE` set to `"mbedtls-config.h"`
+ - `MBEDTLS_USER_CONFIG_FILE` set to `"nrf52840-mbedtls-config.h"`
+ - `MBEDTLS_THREADING_C`
+ - `MBEDTLS_THREADING_ALT`
+
+See [mbedTls Thread Safety and Multi Threading][mbedtls-thread-safety-and-multi-threading] for more details.
+
+[mbedtls-thread-safety-and-multi-threading]: https://tls.mbed.org/kb/development/thread-safety-and-multi-threading
+
+### IEEE EUI-64 address
+
+When the Thread device is configured to obtain the Thread Network security credentials with either Thread Commissioning or an out-of-band method, the extended MAC address should be constructed out of the globally unique IEEE EUI-64.
+
+The IEEE EUI-64 address consists of two parts:
+ - 24 bits of MA-L (MAC Address Block Large), formerly called OUI (Organizationally Unique Identifier)
+ - 40-bit device unique identifier
+
+By default, the device uses Nordic Semiconductor's MA-L (f4-ce-36). You can modify it by overwriting the `OPENTHREAD_CONFIG_STACK_VENDOR_OUI` define, located in the `openthread-core-nrf52840-config.h` file. This value must be publicly registered by the IEEE Registration Authority.
+
+You can also provide the full IEEE EUI-64 address by providing a custom `otPlatRadioGetIeeeEui64` function. To do this, define the flag `OPENTHREAD_CONFIG_ENABLE_PLATFORM_EUI64_CUSTOM_SOURCE`.
+
+After the Thread Network security credentials have been successfully obtained, the device uses randomly generated extended MAC address.
+
+## Flashing the binaries
+
+Flash the compiled binaries onto nRF52840 using `nrfjprog` which is
+part of the [nRF Command Line Tools][nRF-Command-Line-Tools].
+
+```bash
+$ nrfjprog -f nrf52 --chiperase --program output/nrf52840/bin/ot-cli-ftd.hex --reset
+```
+
+## Running the example
+
+To test the example:
+
+1. Prepare two boards with the flashed `CLI Example` (as shown above). The CLI FTD example uses the direct UART connection.
+
+2. Open a terminal connection on two boards:
+
+ a. Start a terminal emulator like screen.
+
+ b. Connect to the used COM port with the following direct UART settings:
+
+ * Baud rate: 115200
+ * 8 data bits
+ * 1 stop bit
+ * No parity
+ * HW flow control: RTS/CTS
+ This allows you to view the raw UART output.
+
+ On Linux system a port name should be called e.g. `/dev/ttyACM0` or `/dev/ttyACM1`.
+
+ c. Run the following command to connect to a board.
+
+ ```shell
+ screen /dev/ttyACM0 115200
+ ```
+
+ Now you are connected with the CLI.
+
+3. Use the following commands to form a network on the first board.
+
+ ```bash
+ > dataset init new
+ Done
+ > dataset
+ Active Timestamp: 1
+ Channel: 13
+ Channel Mask: 07fff800
+ Ext PAN ID: d63e8e3e495ebbc3
+ Mesh Local Prefix: fd3d:b50b:f96d:722d/64
+ Master Key: dfd34f0f05cad978ec4e32b0413038ff
+ Network Name: OpenThread-8f28
+ PAN ID: 0x8f28
+ PSKc: c23a76e98f1a6483639b1ac1271e2e27
+ Security Policy: 0, onrcb
+ Done
+ > dataset commit active
+ Done
+ > ifconfig up
+ Done
+ > thread start
+ Done
+ ```
+
+ After a couple of seconds the node will become a Leader of the network.
+
+ ```bash
+ > state
+ leader
+ ```
+
+4. Use the following commands to attach to the network on the second board.
+
+ ```bash
+ > dataset masterkey dfd34f0f05cad978ec4e32b0413038ff
+ Done
+ > dataset commit active
+ Done
+ > ifconfig up
+ Done
+ > thread start
+ Done
+ ```
+
+ After a couple of seconds the second node will attach and become a Child.
+
+ ```bash
+ > state
+ child
+ ```
+
+5. List all IPv6 addresses of the first board.
+
+ ```bash
+ > ipaddr
+ fd3d:b50b:f96d:722d:0:ff:fe00:fc00
+ fd3d:b50b:f96d:722d:0:ff:fe00:c00
+ fd3d:b50b:f96d:722d:7a73:bff6:9093:9117
+ fe80:0:0:0:6c41:9001:f3d6:4148
+ Done
+ ```
+
+6. Choose one of them and send an ICMPv6 ping from the second board.
+
+ ```bash
+ > ping fd3d:b50b:f96d:722d:7a73:bff6:9093:9117
+ 16 bytes from fd3d:b50b:f96d:722d:558:f56b:d688:799: icmp_seq=1 hlim=64 time=24ms
+ ```
+
+For a list of all available commands, visit [OpenThread CLI Reference README.md][CLI].
+
+[CLI]: ./../../../src/cli/README.md
+
+## SEGGER J-Link tools
+
+SEGGER J-Link tools allow to debug and flash generated firmware using on-board debugger or external one.
+
+### Working with RTT logging
+
+By default, the OpenThread's logging module provides functions to output logging
+information over SEGGER's Real Time Transfer (RTT).
+
+You can set the desired log level by using the `OPENTHREAD_CONFIG_LOG_LEVEL` define.
+
+To enable the highest verbosity level, append `FULL_LOGS` flag to the `make` command:
+```
+$ make -f examples/Makefile-nrf52840 FULL_LOGS=1
+```
+
+#### Enable logging on Windows
+
+1. Connect the DK to your machine with a USB cable.
+2. Run `J-Link RTT Viewer`. The configuration window appears.
+3. From the Specify Target Device dropdown menu, select `NRF52840_XXAA`.
+4. From the Target Interface & Speed dropdown menu, select `SWD`.
+
+#### Enable logging on Linux
+
+1. Connect the DK to your machine with a USB cable.
+2. Run `JLinkExe` to connect to the target. For example:
+```
+JLinkExe -device NRF52840_XXAA -if SWD -speed 4000 -autoconnect 1 -SelectEmuBySN <SEGGER_ID> -RTTTelnetPort 19021
+```
+3. Run `JLinkRTTTelnet` to obtain the RTT logs from the connected device in a separate console. For example:
+```
+JLinkRTTClient -RTTTelnetPort 19021
+```
+
+### Mass Storage Device known issue
+
+Depending on your version, due to a known issue in SEGGER's J-Link firmware, you might experience data corruption or data drops if you use the serial port. You can avoid this issue by disabling the Mass Storage Device.
+
+#### Disabling the Mass Storage Device on Windows
+
+1. Connect the DK to your machine with a USB cable.
+2. Run `J-Link Commander`. The configuration window appears.
+3. From the Specify Target Device dropdown menu, select `NRF52840_XXAA`.
+4. From the Target Interface & Speed dropdown menu, select `SWD`.
+5. Run the following command:
+```
+MSDDisable
+```
+6. Power cycle the DK.
+
+#### Disabling the Mass Storage Device on Linux
+
+1. Connect the DK to your machine with a USB cable.
+2. Run `JLinkExe` to connect to the target. For example:
+```
+JLinkExe -device NRF52840_XXAA -if SWD -speed 4000 -autoconnect 1 -SelectEmuBySN <SEGGER_ID>
+```
+3. Run the following command:
+```
+MSDDisable
+```
+4. Power cycle the DK.
+
+### Hardware Flow Control detection
+
+By default, SEGGER J-Link automatically detects at runtime whether the target is using Hardware Flow Control (HWFC).
+
+The automatic HWFC detection is done by driving P0.07 (Clear to Send - CTS) from the interface MCU and evaluating the state of P0.05 (Request to Send - RTS) when the first data is sent or received. If the state of P0.05 (RTS) is high, it is assumed that HWFC is not used.
+
+To avoid potential race conditions, you can force HWFC and bypass the runtime auto-detection.
+
+#### Disabling the HWFC detection on Windows
+
+1. Connect the DK to your machine with a USB cable.
+2. Run `J-Link Commander`. The configuration window appears.
+3. From the Specify Target Device dropdown menu, select `NRF52840_XXAA`.
+4. From the Target Interface & Speed dropdown menu, select `SWD`.
+5. Run the following command:
+```
+SetHWFC Force
+```
+6. Power cycle the DK.
+
+#### Disabling the HWFC detection on Linux
+
+1. Connect the DK to your machine with a USB cable.
+2. Run `JLinkExe` to connect to the target. For example:
+```
+JLinkExe -device NRF52840_XXAA -if SWD -speed 4000 -autoconnect 1 -SelectEmuBySN <SEGGER_ID>
+```
+3. Run the following command:
+```
+SetHWFC Force
+```
+4. Power cycle the DK.
+
+You can find more details [here][J-Link-OB].
+
+[J-Link-OB]: https://wiki.segger.com/J-Link_OB_SAM3U_NordicSemi#Hardware_flow_control_support
+
+## Diagnostic module
+
+nRF52840 port extends [OpenThread Diagnostics Module][DIAG].
+
+You can read about all the features [here][nRFDIAG].
+
+[DIAG]: ./../../../src/core/diags/README.md
+[nRFDIAG]: ./../DIAG.md
+
+## Radio driver documentation
+
+The radio driver comes with documentation that describes the operation of state
+machines in this module. To open the `*.uml` sequence diagrams, use [PlantUML][PlantUML-url].
+
+[PlantUML-url]: http://plantuml.com/
+
+## Verification
+
+The following development kits have been used for testing and verification:
+ - PCA10056 1.0.0
+ - PCA10059 1.0.0
+ - PCA10068 0.5.0
+
+The following toolchains have been used for testing and verification:
+ - GCC: GCC ARM Embedded 7.2018 q2 update
+ - IAR: IAR Workbench 7.80.4
+ - SES: SES 4.12
+ - ARM: MDK-ARM version 5.25
+
+ The following OpenThread commits have been verified with nRF52840 and nRF52811 examples by Nordic Semiconductor:
+ - `2279ef6` - 23.05.2019 (the latest checked)
+ - `23ff101` - 22.03.2019
+ - `704511c` - 18.09.2018
+ - `ec59d7e` - 06.04.2018
+ - `a89eb88` - 16.11.2017
+ - `6a15261` - 29.06.2017
+ - `030efba` - 22.04.2017
+ - `de48acf` - 02.03.2017
+ - `50db58d` - 23.01.2017
+
+# Nordic Semiconductor's nRF5 SDK for Thread and Zigbee
+
+Use [nRF5 Software Development Kit (SDK) for Thread and Zigbee][nRF5-SDK-Thread-Zigbee] when developing Thread products with Nordic Semiconductor's advanced nRF52840, nRF52833 or nRF52811 SoCs.
+
+The <i>nRF5 SDK for Thread and Zigbee</i> includes:
+ - a pre-built OpenThread stack for the Nordic nRF52840 and nRF52811 SoCs,
+ - support for hardware-accelerated cryptographic operations using ARM® CryptoCell-310,
+ - unique Thread/Bluetooth Low Energy dynamic multiprotocol solution which allows for concurrent operation of Thread and Bluetooth Low Energy utilizing OpenThread and SoftDevice (Nordic’s Bluetooth Low Energy stack) with accompanying example applications,
+ - Thread/Bluetooth Low Energy switched multiprotocol solution with accompanying example applications,
+ - unique support for DFU-over-Thread (Device Firmware Upgrade),
+ - examples to demonstrate interactions between nodes performing different Thread roles with the use of OpenThread and CoAP, CoAP Secure or MQTT-SN protocols,
+ - support for OpenThread Network Co-Processor (NCP) and Radio Co-Processor (RCP) using UART, USB or SPI transport protocol,
+ - Border Router and cloud connectivity example (e.g. with Google Cloud Platform),
+ - Thread native commissioning with NFC example,
+ - example applications demonstrating the use of FreeRTOS with OpenThread,
+ - support for IAR, Keil MDK-ARM and SEGGER Embedded Studio (SES) IDEs for OpenThread stack and all example applications,
+ - range of PC tools including Thread Topology Monitor and nRF Sniffer for 802.15.4,
+ - software modules inherited from the nRF5 SDK e.g. peripheral drivers, NFC libraries, Bluetooth Low Energy libraries etc.
+
+[nRF5-SDK-Thread-Zigbee]: https://www.nordicsemi.com/Software-and-Tools/Software/nRF5-SDK-for-Thread-and-Zigbee
diff --git a/examples/platforms/nrf52840/nrf52840.ld b/examples/platforms/nrf528xx/nrf52840/nrf52840.ld
similarity index 100%
rename from examples/platforms/nrf52840/nrf52840.ld
rename to examples/platforms/nrf528xx/nrf52840/nrf52840.ld
diff --git a/examples/platforms/nrf528xx/nrf52840/nrf52840_bootloader_ble.ld b/examples/platforms/nrf528xx/nrf52840/nrf52840_bootloader_ble.ld
new file mode 100644
index 0000000..9c9c324
--- /dev/null
+++ b/examples/platforms/nrf528xx/nrf52840/nrf52840_bootloader_ble.ld
@@ -0,0 +1,168 @@
+/*
+ * Copyright (c) 2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * GCC linker script for nRF52840 with BLE bootloader.
+ */
+
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lnosys)
+
+MEMORY
+{
+ FLASH (rx) : ORIGIN = 0x00026000, LENGTH = 0xd2000
+ RAM (rwx) : ORIGIN = 0x20000008, LENGTH = 0x3fff8
+}
+
+OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+
+ENTRY(Reset_Handler)
+
+FLASH_PAGE_SIZE = 4096;
+FLASH_DATA_PAGES_USED = 4;
+
+SECTIONS
+{
+ .text :
+ {
+ KEEP(*(.isr_vector))
+ *(.text*)
+
+ KEEP(*(.init))
+ KEEP(*(.fini))
+
+ /* .ctors */
+ *crtbegin.o(.ctors)
+ *crtbegin?.o(.ctors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+ *(SORT(.ctors.*))
+ *(.ctors)
+
+ /* .dtors */
+ *crtbegin.o(.dtors)
+ *crtbegin?.o(.dtors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ *(SORT(.dtors.*))
+ *(.dtors)
+
+ *(.rodata*)
+
+ KEEP(*(.eh_frame*))
+ } > FLASH
+
+ .ARM.extab :
+ {
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ } > FLASH
+
+ __exidx_start = .;
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ } > FLASH
+ __exidx_end = .;
+
+ __etext = .;
+
+ .data : AT (__etext)
+ {
+ __data_start__ = .;
+ *(vtable)
+ *(.data*)
+
+ . = ALIGN(4);
+ /* preinit data */
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP(*(.preinit_array))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+
+ . = ALIGN(4);
+ /* init data */
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array))
+ PROVIDE_HIDDEN (__init_array_end = .);
+
+
+ . = ALIGN(4);
+ /* finit data */
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP(*(SORT(.fini_array.*)))
+ KEEP(*(.fini_array))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+
+ KEEP(*(.jcr*))
+ . = ALIGN(4);
+ /* All data end */
+ __data_end__ = .;
+
+ } > RAM
+
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start__ = .;
+ *(.bss*)
+ *(COMMON)
+ . = ALIGN(4);
+ __bss_end__ = .;
+ } > RAM
+
+ .heap (COPY):
+ {
+ __HeapBase = .;
+ __end__ = .;
+ PROVIDE(end = .);
+ KEEP(*(.heap*))
+ __HeapLimit = .;
+ } > RAM
+
+ /* .stack_dummy section doesn't contains any symbols. It is only
+ * used for linker to calculate size of stack sections, and assign
+ * values to stack symbols later */
+ .stack_dummy (COPY):
+ {
+ KEEP(*(.stack*))
+ } > RAM
+
+ __stop_ot_flash_data = (ORIGIN(FLASH) + LENGTH(FLASH));
+ __start_ot_flash_data = (__stop_ot_flash_data - (FLASH_PAGE_SIZE * FLASH_DATA_PAGES_USED));
+
+ /* Assure that code does not overlap flash data area.*/
+ ASSERT((__start_ot_flash_data >= __etext + SIZEOF(.data)), "Error: Code overlaps flash data area.")
+
+ /* Set stack top to end of RAM, and stack limit move down by
+ * size of stack_dummy section */
+ __StackTop = ORIGIN(RAM) + LENGTH(RAM);
+ __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+ PROVIDE(__stack = __StackTop);
+
+ /* Check if data + heap + stack exceeds RAM limit */
+ ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/examples/platforms/nrf528xx/nrf52840/nrf52840_bootloader_uart.ld b/examples/platforms/nrf528xx/nrf52840/nrf52840_bootloader_uart.ld
new file mode 100644
index 0000000..8532a83
--- /dev/null
+++ b/examples/platforms/nrf528xx/nrf52840/nrf52840_bootloader_uart.ld
@@ -0,0 +1,168 @@
+/*
+ * Copyright (c) 2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * GCC linker script for nRF52840 with UART bootloader.
+ */
+
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lnosys)
+
+MEMORY
+{
+ FLASH (rx) : ORIGIN = 0x00001000, LENGTH = 0xf7000
+ RAM (rwx) : ORIGIN = 0x20000008, LENGTH = 0x3fff8
+}
+
+OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+
+ENTRY(Reset_Handler)
+
+FLASH_PAGE_SIZE = 4096;
+FLASH_DATA_PAGES_USED = 4;
+
+SECTIONS
+{
+ .text :
+ {
+ KEEP(*(.isr_vector))
+ *(.text*)
+
+ KEEP(*(.init))
+ KEEP(*(.fini))
+
+ /* .ctors */
+ *crtbegin.o(.ctors)
+ *crtbegin?.o(.ctors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+ *(SORT(.ctors.*))
+ *(.ctors)
+
+ /* .dtors */
+ *crtbegin.o(.dtors)
+ *crtbegin?.o(.dtors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ *(SORT(.dtors.*))
+ *(.dtors)
+
+ *(.rodata*)
+
+ KEEP(*(.eh_frame*))
+ } > FLASH
+
+ .ARM.extab :
+ {
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ } > FLASH
+
+ __exidx_start = .;
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ } > FLASH
+ __exidx_end = .;
+
+ __etext = .;
+
+ .data : AT (__etext)
+ {
+ __data_start__ = .;
+ *(vtable)
+ *(.data*)
+
+ . = ALIGN(4);
+ /* preinit data */
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP(*(.preinit_array))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+
+ . = ALIGN(4);
+ /* init data */
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array))
+ PROVIDE_HIDDEN (__init_array_end = .);
+
+
+ . = ALIGN(4);
+ /* finit data */
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP(*(SORT(.fini_array.*)))
+ KEEP(*(.fini_array))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+
+ KEEP(*(.jcr*))
+ . = ALIGN(4);
+ /* All data end */
+ __data_end__ = .;
+
+ } > RAM
+
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start__ = .;
+ *(.bss*)
+ *(COMMON)
+ . = ALIGN(4);
+ __bss_end__ = .;
+ } > RAM
+
+ .heap (COPY):
+ {
+ __HeapBase = .;
+ __end__ = .;
+ PROVIDE(end = .);
+ KEEP(*(.heap*))
+ __HeapLimit = .;
+ } > RAM
+
+ /* .stack_dummy section doesn't contains any symbols. It is only
+ * used for linker to calculate size of stack sections, and assign
+ * values to stack symbols later */
+ .stack_dummy (COPY):
+ {
+ KEEP(*(.stack*))
+ } > RAM
+
+ __stop_ot_flash_data = (ORIGIN(FLASH) + LENGTH(FLASH));
+ __start_ot_flash_data = (__stop_ot_flash_data - (FLASH_PAGE_SIZE * FLASH_DATA_PAGES_USED));
+
+ /* Assure that code does not overlap flash data area.*/
+ ASSERT((__start_ot_flash_data >= __etext + SIZEOF(.data)), "Error: Code overlaps flash data area.")
+
+ /* Set stack top to end of RAM, and stack limit move down by
+ * size of stack_dummy section */
+ __StackTop = ORIGIN(RAM) + LENGTH(RAM);
+ __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+ PROVIDE(__stack = __StackTop);
+
+ /* Check if data + heap + stack exceeds RAM limit */
+ ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/examples/platforms/nrf528xx/nrf52840/nrf52840_bootloader_usb.ld b/examples/platforms/nrf528xx/nrf52840/nrf52840_bootloader_usb.ld
new file mode 100644
index 0000000..3348a4f
--- /dev/null
+++ b/examples/platforms/nrf528xx/nrf52840/nrf52840_bootloader_usb.ld
@@ -0,0 +1,168 @@
+/*
+ * Copyright (c) 2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * GCC linker script for nRF52840 with USB bootloader.
+ */
+
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lnosys)
+
+MEMORY
+{
+ FLASH (rx) : ORIGIN = 0x00001000, LENGTH = 0xdf000
+ RAM (rwx) : ORIGIN = 0x20000008, LENGTH = 0x3fff8
+}
+
+OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+
+ENTRY(Reset_Handler)
+
+FLASH_PAGE_SIZE = 4096;
+FLASH_DATA_PAGES_USED = 4;
+
+SECTIONS
+{
+ .text :
+ {
+ KEEP(*(.isr_vector))
+ *(.text*)
+
+ KEEP(*(.init))
+ KEEP(*(.fini))
+
+ /* .ctors */
+ *crtbegin.o(.ctors)
+ *crtbegin?.o(.ctors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+ *(SORT(.ctors.*))
+ *(.ctors)
+
+ /* .dtors */
+ *crtbegin.o(.dtors)
+ *crtbegin?.o(.dtors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ *(SORT(.dtors.*))
+ *(.dtors)
+
+ *(.rodata*)
+
+ KEEP(*(.eh_frame*))
+ } > FLASH
+
+ .ARM.extab :
+ {
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ } > FLASH
+
+ __exidx_start = .;
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ } > FLASH
+ __exidx_end = .;
+
+ __etext = .;
+
+ .data : AT (__etext)
+ {
+ __data_start__ = .;
+ *(vtable)
+ *(.data*)
+
+ . = ALIGN(4);
+ /* preinit data */
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP(*(.preinit_array))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+
+ . = ALIGN(4);
+ /* init data */
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array))
+ PROVIDE_HIDDEN (__init_array_end = .);
+
+
+ . = ALIGN(4);
+ /* finit data */
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP(*(SORT(.fini_array.*)))
+ KEEP(*(.fini_array))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+
+ KEEP(*(.jcr*))
+ . = ALIGN(4);
+ /* All data end */
+ __data_end__ = .;
+
+ } > RAM
+
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start__ = .;
+ *(.bss*)
+ *(COMMON)
+ . = ALIGN(4);
+ __bss_end__ = .;
+ } > RAM
+
+ .heap (COPY):
+ {
+ __HeapBase = .;
+ __end__ = .;
+ PROVIDE(end = .);
+ KEEP(*(.heap*))
+ __HeapLimit = .;
+ } > RAM
+
+ /* .stack_dummy section doesn't contains any symbols. It is only
+ * used for linker to calculate size of stack sections, and assign
+ * values to stack symbols later */
+ .stack_dummy (COPY):
+ {
+ KEEP(*(.stack*))
+ } > RAM
+
+ __stop_ot_flash_data = (ORIGIN(FLASH) + LENGTH(FLASH));
+ __start_ot_flash_data = (__stop_ot_flash_data - (FLASH_PAGE_SIZE * FLASH_DATA_PAGES_USED));
+
+ /* Assure that code does not overlap flash data area.*/
+ ASSERT((__start_ot_flash_data >= __etext + SIZEOF(.data)), "Error: Code overlaps flash data area.")
+
+ /* Set stack top to end of RAM, and stack limit move down by
+ * size of stack_dummy section */
+ __StackTop = ORIGIN(RAM) + LENGTH(RAM);
+ __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+ PROVIDE(__stack = __StackTop);
+
+ /* Check if data + heap + stack exceeds RAM limit */
+ ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/examples/platforms/nrf52840/openthread-core-nrf52840-config-check.h b/examples/platforms/nrf528xx/nrf52840/openthread-core-nrf52840-config-check.h
similarity index 100%
rename from examples/platforms/nrf52840/openthread-core-nrf52840-config-check.h
rename to examples/platforms/nrf528xx/nrf52840/openthread-core-nrf52840-config-check.h
diff --git a/examples/platforms/nrf528xx/nrf52840/openthread-core-nrf52840-config.h b/examples/platforms/nrf528xx/nrf52840/openthread-core-nrf52840-config.h
new file mode 100644
index 0000000..72ebe92
--- /dev/null
+++ b/examples/platforms/nrf528xx/nrf52840/openthread-core-nrf52840-config.h
@@ -0,0 +1,287 @@
+/*
+ * Copyright (c) 2016, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file includes nrf52840 compile-time configuration constants
+ * for OpenThread.
+ */
+
+#ifndef OPENTHREAD_CORE_NRF52840_CONFIG_H_
+#define OPENTHREAD_CORE_NRF52840_CONFIG_H_
+
+/*
+ * The GNU Autoconf system defines a PACKAGE macro which is the name
+ * of the software package. This name collides with PACKAGE field in
+ * the nRF52 Factory Information Configuration Registers (FICR)
+ * structure.
+ */
+#undef PACKAGE
+
+/**
+ * @def OPENTHREAD_CONFIG_LOG_OUTPUT
+ *
+ * The nrf52840 platform provides an otPlatLog() function.
+ */
+#ifndef OPENTHREAD_CONFIG_LOG_OUTPUT
+#define OPENTHREAD_CONFIG_LOG_OUTPUT OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_PLATFORM_INFO
+ *
+ * The platform-specific string to insert into the OpenThread version string.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_PLATFORM_INFO
+#define OPENTHREAD_CONFIG_PLATFORM_INFO "NRF52840"
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_STACK_VENDOR_OUI
+ *
+ * The Organizationally Unique Identifier for the vendor.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_STACK_VENDOR_OUI
+#define OPENTHREAD_CONFIG_STACK_VENDOR_OUI 0xf4ce36
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_MLE_MAX_CHILDREN
+ *
+ * The maximum number of children.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_MLE_MAX_CHILDREN
+#define OPENTHREAD_CONFIG_MLE_MAX_CHILDREN 32
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_NUM_MESSAGE_BUFFERS
+ *
+ * The number of message buffers in the buffer pool.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_NUM_MESSAGE_BUFFERS
+#define OPENTHREAD_CONFIG_NUM_MESSAGE_BUFFERS 160
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD
+ *
+ * The maximum number of supported IPv6 address registrations per child.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD
+#define OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD 6
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_MAX_STATECHANGE_HANDLERS
+ *
+ * The maximum number of state-changed callback handlers (set using `otSetStateChangedCallback()`).
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_MAX_STATECHANGE_HANDLERS
+#define OPENTHREAD_CONFIG_MAX_STATECHANGE_HANDLERS 3
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_TMF_ADDRESS_CACHE_ENTRIES
+ *
+ * The number of EID-to-RLOC cache entries.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_TMF_ADDRESS_CACHE_ENTRIES
+#define OPENTHREAD_CONFIG_TMF_ADDRESS_CACHE_ENTRIES 32
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_LOG_PREPREND_LEVEL
+ *
+ * Define to prepend the log level to all log messages
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_LOG_PREPEND_LEVEL
+#define OPENTHREAD_CONFIG_LOG_PREPEND_LEVEL 0
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_SOFTWARE_ACK_TIMEOUT_ENABLE
+ *
+ * Define to 1 if you want to enable software ACK timeout logic.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_SOFTWARE_ACK_TIMEOUT_ENABLE
+#define OPENTHREAD_CONFIG_SOFTWARE_ACK_TIMEOUT_ENABLE 0
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_SOFTWARE_RETRANSMIT_ENABLE
+ *
+ * Define to 1 if you want to enable software retransmission logic.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_SOFTWARE_RETRANSMIT_ENABLE
+#define OPENTHREAD_CONFIG_SOFTWARE_RETRANSMIT_ENABLE 1
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_SOFTWARE_CSMA_BACKOFF_ENABLE
+ *
+ * Define to 1 if you want to enable software CSMA-CA backoff logic.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_SOFTWARE_CSMA_BACKOFF_ENABLE
+#define OPENTHREAD_CONFIG_SOFTWARE_CSMA_BACKOFF_ENABLE 0
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_PLATFORM_USEC_TIMER_ENABLE
+ *
+ * Define to 1 if you want to support microsecond timer in platform.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_PLATFORM_USEC_TIMER_ENABLE
+#define OPENTHREAD_CONFIG_PLATFORM_USEC_TIMER_ENABLE 1
+#endif
+
+/**
+ * @def SETTINGS_CONFIG_BASE_ADDRESS
+ *
+ * The base address of settings.
+ *
+ */
+#ifndef SETTINGS_CONFIG_BASE_ADDRESS
+#define SETTINGS_CONFIG_BASE_ADDRESS 0
+#endif
+
+/**
+ * @def SETTINGS_CONFIG_PAGE_SIZE
+ *
+ * The page size of settings.
+ *
+ */
+#ifndef SETTINGS_CONFIG_PAGE_SIZE
+#define SETTINGS_CONFIG_PAGE_SIZE 4096
+#endif
+
+/**
+ * @def SETTINGS_CONFIG_PAGE_NUM
+ *
+ * The page number of settings.
+ *
+ */
+#ifndef SETTINGS_CONFIG_PAGE_NUM
+#define SETTINGS_CONFIG_PAGE_NUM 4
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE
+ *
+ * The size of heap buffer when DTLS is enabled.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE
+#define OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE (4096 * sizeof(void *))
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE_NO_DTLS
+ *
+ * The size of heap buffer when DTLS is disabled.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE_NO_DTLS
+#define OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE_NO_DTLS 2048
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
+ *
+ * Define as 1 to enable the time synchronization service feature.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
+#define OPENTHREAD_CONFIG_TIME_SYNC_ENABLE 0
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_CLI_TX_BUFFER_SIZE
+ *
+ * The size of CLI message buffer in bytes
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_CLI_UART_TX_BUFFER_SIZE
+#define OPENTHREAD_CONFIG_CLI_UART_TX_BUFFER_SIZE 2048
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
+ *
+ * Define as 1 to support IEEE 802.15.4-2015 Header IE (Information Element) generation and parsing, it must be set
+ * to support following features:
+ * 1. Time synchronization service feature (i.e., OPENTHREAD_CONFIG_TIME_SYNC_ENABLE is set).
+ *
+ * @note If it's enabled, plaforms must support interrupt context and concurrent access AES.
+ *
+ */
+#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
+#define OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT 1
+#endif
+
+/**
+ * @def RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM
+ *
+ * The number of short source address table entries.
+ *
+ */
+#ifndef RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM
+#define RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM 0
+#endif
+
+/**
+ * @def RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM
+ *
+ * The number of extended source address table entries.
+ *
+ */
+#ifndef RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM
+#define RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM 0
+#endif
+
+/*
+ * Suppress the ARMCC warning on unreachable statement,
+ * e.g. break after assert(false) or ExitNow() macro.
+ */
+#if defined(__CC_ARM)
+_Pragma("diag_suppress=111") _Pragma("diag_suppress=128")
+#endif
+
+#endif // OPENTHREAD_CORE_NRF52840_CONFIG_H_
diff --git a/examples/platforms/nrf528xx/nrf52840/platform-config.h b/examples/platforms/nrf528xx/nrf52840/platform-config.h
new file mode 100644
index 0000000..5eb8a47
--- /dev/null
+++ b/examples/platforms/nrf528xx/nrf52840/platform-config.h
@@ -0,0 +1,467 @@
+/*
+ * Copyright (c) 2016, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file includes the platform-specific configuration.
+ *
+ */
+
+#ifndef PLATFORM_CONFIG_H_
+#define PLATFORM_CONFIG_H_
+
+#include "nrf.h"
+#include "nrf_peripherals.h"
+#include "drivers/clock/nrf_drv_clock.h"
+#include "hal/nrf_radio.h"
+#include "hal/nrf_uart.h"
+
+#include "openthread-core-config.h"
+#include <openthread/config.h>
+
+/*******************************************************************************
+ * @section UART Driver Configuration.
+ ******************************************************************************/
+
+/**
+ * @def UART_INSTANCE
+ *
+ * UART Instance.
+ *
+ */
+#ifndef UART_INSTANCE
+#define UART_INSTANCE NRF_UART0
+#endif
+
+/**
+ * @def UART_PARITY
+ *
+ * UART Parity configuration.
+ *
+ * @brief Possible values:
+ * \ref NRF_UART_PARITY_EXCLUDED - Parity bit is not present.
+ * \ref NRF_UART_PARITY_INCLUDED - Parity bit is present.
+ *
+ */
+#ifndef UART_PARITY
+#define UART_PARITY NRF_UART_PARITY_EXCLUDED
+#endif
+
+/**
+ * @def UART_HWFC_ENABLED
+ *
+ * Enable UART Hardware Flow Control.
+ *
+ */
+#ifndef UART_HWFC_ENABLED
+#define UART_HWFC_ENABLED 1
+#endif
+
+/**
+ * @def UART_BAUDRATE
+ *
+ * UART Baudrate.
+ *
+ * @brief Possible values:
+ * \ref NRF_UART_BAUDRATE_1200 - 1200 baud.
+ * \ref NRF_UART_BAUDRATE_2400 - 2400 baud.
+ * \ref NRF_UART_BAUDRATE_4800 - 4800 baud.
+ * \ref NRF_UART_BAUDRATE_9600 - 9600 baud.
+ * \ref NRF_UART_BAUDRATE_14400 - 14400 baud.
+ * \ref NRF_UART_BAUDRATE_19200 - 19200 baud.
+ * \ref NRF_UART_BAUDRATE_28800 - 28800 baud.
+ * \ref NRF_UART_BAUDRATE_38400 - 38400 baud.
+ * \ref NRF_UART_BAUDRATE_57600 - 57600 baud.
+ * \ref NRF_UART_BAUDRATE_76800 - 76800 baud.
+ * \ref NRF_UART_BAUDRATE_115200 - 115200 baud.
+ * \ref NRF_UART_BAUDRATE_230400 - 230400 baud.
+ * \ref NRF_UART_BAUDRATE_250000 - 250000 baud.
+ * \ref NRF_UART_BAUDRATE_460800 - 460800 baud.
+ * \ref NRF_UART_BAUDRATE_921600 - 921600 baud.
+ * \ref NRF_UART_BAUDRATE_1000000 - 1000000 baud.
+ *
+ */
+#ifndef UART_BAUDRATE
+#define UART_BAUDRATE NRF_UART_BAUDRATE_115200
+#endif
+
+/**
+ * @def UART_IRQN
+ *
+ * UART Interrupt number.
+ *
+ */
+#ifndef UART_IRQN
+#define UART_IRQN UARTE0_UART0_IRQn
+#endif
+
+/**
+ * @def UART_IRQ_PRIORITY
+ *
+ * UART Interrupt priority.
+ *
+ */
+#ifndef UART_IRQ_PRIORITY
+#define UART_IRQ_PRIORITY 6
+#endif
+
+/**
+ * @def UART_RX_BUFFER_SIZE
+ *
+ * UART Receive buffer size.
+ *
+ */
+#ifndef UART_RX_BUFFER_SIZE
+#define UART_RX_BUFFER_SIZE 512
+#endif
+
+/**
+ * @def UART_PIN_TX
+ *
+ * UART TX Pin.
+ *
+ */
+#ifndef UART_PIN_TX
+#define UART_PIN_TX 6
+#endif
+
+/**
+ * @def UART_PIN_RX
+ *
+ * UART RX Pin.
+ *
+ */
+#ifndef UART_PIN_RX
+#define UART_PIN_RX 8
+#endif
+
+/**
+ * @def UART_PIN_CTS
+ *
+ * UART CTS Pin.
+ *
+ */
+#ifndef UART_PIN_CTS
+#define UART_PIN_CTS 7
+#endif
+
+/**
+ * @def UART_PIN_RTS
+ *
+ * UART RTS Pin.
+ *
+ */
+#ifndef UART_PIN_RTS
+#define UART_PIN_RTS 5
+#endif
+
+/*******************************************************************************
+ * @section Alarm Driver Configuration.
+ ******************************************************************************/
+
+/**
+ * @def RTC_INSTANCE
+ *
+ * RTC Instance.
+ *
+ */
+#ifndef RTC_INSTANCE
+#define RTC_INSTANCE NRF_RTC2
+#endif
+
+/**
+ * @def RTC_IRQ_HANDLER
+ *
+ * RTC interrupt handler name
+ *
+ */
+#ifndef RTC_IRQ_HANDLER
+#define RTC_IRQ_HANDLER RTC2_IRQHandler
+#endif
+
+/**
+ * @def RTC_IRQN
+ *
+ * RTC Interrupt number.
+ *
+ */
+#ifndef RTC_IRQN
+#define RTC_IRQN RTC2_IRQn
+#endif
+
+/**
+ * @def RTC_IRQ_PRIORITY
+ *
+ * RTC Interrupt priority.
+ *
+ */
+#ifndef RTC_IRQ_PRIORITY
+#define RTC_IRQ_PRIORITY 6
+#endif
+
+/*******************************************************************************
+ * @section Random Number Generator Driver Configuration.
+ ******************************************************************************/
+
+/**
+ * @def RNG_BUFFER_SIZE
+ *
+ * True Random Number Generator buffer size.
+ *
+ */
+#ifndef RNG_BUFFER_SIZE
+#define RNG_BUFFER_SIZE 128
+#endif
+
+/**
+ * @def RNG_IRQ_PRIORITY
+ *
+ * RNG Interrupt priority.
+ *
+ */
+#ifndef RNG_IRQ_PRIORITY
+#define RNG_IRQ_PRIORITY 6
+#endif
+
+/*******************************************************************************
+ * @section SPI Slave configuration.
+ ******************************************************************************/
+
+/**
+ * @def SPIS Instance.
+ */
+#ifndef SPIS_INSTANCE
+#define SPIS_INSTANCE 0
+#endif
+
+/**
+ * @def SPIS mode.
+ *
+ * @brief Possible values:
+ * \ref NRF_SPIS_MODE_0 - SCK active high, sample on leading edge of clock.
+ * \ref NRF_SPIS_MODE_1 - SCK active high, sample on trailing edge of clock.
+ * \ref NRF_SPIS_MODE_2 - SCK active low, sample on leading edge of clock.
+ * \ref NRF_SPIS_MODE_3 - SCK active low, sample on trailing edge of clock.
+ */
+#ifndef SPIS_MODE
+#define SPIS_MODE NRF_SPIS_MODE_0
+#endif
+
+/**
+ * @def SPIS bit orders.
+ *
+ * @brief Possible values:
+ * \ref NRF_SPIS_BIT_ORDER_MSB_FIRST - Most significant bit shifted out first.
+ * \ref NRF_SPIS_BIT_ORDER_LSB_FIRST - Least significant bit shifted out first.
+ */
+#ifndef SPIS_BIT_ORDER
+#define SPIS_BIT_ORDER NRF_SPIS_BIT_ORDER_MSB_FIRST
+#endif
+
+/**
+ * @def SPIS Interrupt priority.
+ */
+#ifndef SPIS_IRQ_PRIORITY
+#define SPIS_IRQ_PRIORITY 6
+#endif
+
+/**
+ * @def SPIS MOSI Pin.
+ */
+#ifndef SPIS_PIN_MOSI
+#define SPIS_PIN_MOSI 4
+#endif
+
+/**
+ * @def SPIS MISO Pin.
+ */
+#ifndef SPIS_PIN_MISO
+#define SPIS_PIN_MISO 28
+#endif
+
+/**
+ * @def SPIS SCK Pin.
+ */
+#ifndef SPIS_PIN_SCK
+#define SPIS_PIN_SCK 3
+#endif
+
+/**
+ * @def SPIS CSN Pin.
+ */
+#ifndef SPIS_PIN_CSN
+#define SPIS_PIN_CSN 29
+#endif
+
+/**
+ * @def SPIS Host IRQ Pin.
+ */
+#ifndef SPIS_PIN_HOST_IRQ
+#define SPIS_PIN_HOST_IRQ 30
+#endif
+
+/*******************************************************************************
+ * @section USB driver configuration.
+ ******************************************************************************/
+
+/**
+ * @def USB_HOST_UART_CONFIG_DELAY_MS
+ *
+ * Delay after DTR gets asserted that we start send any queued data. This allows slow
+ * Linux-based hosts to have enough time to configure their port for raw mode.
+ *
+ */
+#ifndef USB_HOST_UART_CONFIG_DELAY_MS
+#define USB_HOST_UART_CONFIG_DELAY_MS 10
+#endif
+
+/**
+ * @def USB_CDC_AS_SERIAL_TRANSPORT
+ *
+ * Use USB CDC driver for serial communication.
+ */
+#ifndef USB_CDC_AS_SERIAL_TRANSPORT
+#define USB_CDC_AS_SERIAL_TRANSPORT 0
+#endif
+
+/**
+ * @def The USB interface to use for CDC ACM COMM.
+ *
+ * According to the USB Specification, interface numbers cannot have gaps. Tailor this value to adhere to this
+ * limitation. Takes values between 0-255.
+ */
+#ifndef USB_CDC_ACM_COMM_INTERFACE
+#define USB_CDC_ACM_COMM_INTERFACE 1
+#endif
+
+/**
+ * @def The USB interface to use for CDC ACM DATA.
+ *
+ * According to the USB Specification, interface numbers cannot have gaps. Tailor this value to adhere to this
+ * limitation. Takes values between 0-255.
+ */
+#ifndef USB_CDC_ACM_DATA_INTERFACE
+#define USB_CDC_ACM_DATA_INTERFACE 2
+#endif
+
+/**
+ * @def OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
+ *
+ * Reset the application, not the chip, when a software reset is requested.
+ * via `otPlatReset()`.
+ */
+#ifndef OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
+#define OPENTHREAD_PLATFORM_USE_PSEUDO_RESET USB_CDC_AS_SERIAL_TRANSPORT
+#endif
+
+/*******************************************************************************
+ * @section Platform FEM Configuration
+ ******************************************************************************/
+
+/**
+ * @def PLATFORM_FEM_ENABLE_DEFAULT_CONFIG
+ *
+ * Enable default front end module configuration.
+ *
+ */
+#ifndef PLATFORM_FEM_ENABLE_DEFAULT_CONFIG
+#define PLATFORM_FEM_ENABLE_DEFAULT_CONFIG 0
+#endif
+
+/*******************************************************************************
+ * @section Radio driver configuration.
+ ******************************************************************************/
+
+/**
+ * @def NRF_802154_PENDING_SHORT_ADDRESSES
+ *
+ * Number of slots containing short addresses of nodes for which pending data is stored.
+ *
+ */
+#ifndef NRF_802154_PENDING_SHORT_ADDRESSES
+#define NRF_802154_PENDING_SHORT_ADDRESSES OPENTHREAD_CONFIG_MLE_MAX_CHILDREN
+#endif
+
+/**
+ * @def NRF_802154_PENDING_EXTENDED_ADDRESSES
+ *
+ * Number of slots containing extended addresses of nodes for which pending data is stored.
+ *
+ */
+#ifndef NRF_802154_PENDING_EXTENDED_ADDRESSES
+#define NRF_802154_PENDING_EXTENDED_ADDRESSES OPENTHREAD_CONFIG_MLE_MAX_CHILDREN
+#endif
+
+/**
+ * @def NRF_802154_CSMA_CA_ENABLED
+ *
+ * If CSMA-CA procedure should be enabled by the driver. Disabling CSMA-CA procedure improves
+ * driver performance.
+ *
+ */
+#ifndef NRF_802154_CSMA_CA_ENABLED
+#define NRF_802154_CSMA_CA_ENABLED 1
+#endif
+
+/**
+ * @def NRF_802154_ACK_TIMEOUT_ENABLED
+ *
+ * If ACK timeout feature should be enabled in the driver.
+ *
+ */
+#ifndef NRF_802154_ACK_TIMEOUT_ENABLED
+#define NRF_802154_ACK_TIMEOUT_ENABLED 1
+#endif
+
+/*******************************************************************************
+ * @section Temperature sensor driver configuration.
+ ******************************************************************************/
+
+/**
+ * @def TEMP_MEASUREMENT_INTERVAL
+ *
+ * Interval of consecutive temperature measurements [s].
+ *
+ */
+#ifndef TEMP_MEASUREMENT_INTERVAL
+#define TEMP_MEASUREMENT_INTERVAL 30
+#endif
+
+/**
+ * @def NRF_802154_TX_STARTED_NOTIFY_ENABLED
+ *
+ * If notification of started transmission should be enabled in the driver.
+ *
+ * @note This feature must be enabled to support Header IE related features.
+ *
+ */
+#ifndef NRF_802154_TX_STARTED_NOTIFY_ENABLED
+#define NRF_802154_TX_STARTED_NOTIFY_ENABLED 1
+#endif
+
+#endif // PLATFORM_CONFIG_H_
diff --git a/examples/platforms/nrf528xx/src/alarm.c b/examples/platforms/nrf528xx/src/alarm.c
new file mode 100644
index 0000000..3d60856
--- /dev/null
+++ b/examples/platforms/nrf528xx/src/alarm.c
@@ -0,0 +1,702 @@
+/*
+ * Copyright (c) 2016, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file implements the OpenThread platform abstraction for the alarm.
+ *
+ */
+
+#include <openthread-core-config.h>
+#include <openthread/config.h>
+
+#include <assert.h>
+#include <stdbool.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <openthread/platform/alarm-micro.h>
+#include <openthread/platform/alarm-milli.h>
+#include <openthread/platform/diag.h>
+#include <openthread/platform/time.h>
+
+#include "openthread-system.h"
+
+#include "platform-config.h"
+#include "platform-nrf5.h"
+#include "cmsis/core_cmFunc.h"
+
+#include <drivers/clock/nrf_drv_clock.h>
+#include <drivers/radio/nrf_802154_utils.h>
+#include <drivers/radio/platform/lp_timer/nrf_802154_lp_timer.h>
+
+#include <hal/nrf_rtc.h>
+
+#include <openthread/config.h>
+
+// clang-format off
+#define RTC_FREQUENCY NRF_802154_RTC_FREQUENCY
+
+#define US_PER_MS 1000ULL
+#define US_PER_S NRF_802154_US_PER_S
+#define US_PER_OVERFLOW (512UL * NRF_802154_US_PER_S) ///< Time that has passed between overflow events. On full RTC speed, it occurs every 512 s.
+
+#define RTC_COUNTER_BITS 24 ///< Number of bits in RTC COUNTER register.
+
+#define MS_PER_S 1000UL
+
+#define MIN_RTC_COMPARE_EVENT_TICKS 2 ///< Minimum number of RTC ticks delay that guarantees that RTC compare event will fire.
+#define MIN_RTC_COMPARE_EVENT_DT (MIN_RTC_COMPARE_EVENT_TICKS * NRF_802154_US_PER_TICK) ///< Minimum time delta from now before RTC compare event is guaranteed to fire.
+#define EPOCH_32BIT_US (1ULL << 32)
+#define EPOCH_FROM_TIME(time) ((time) & ((uint64_t)UINT32_MAX << 32))
+
+#define XTAL_ACCURACY 40 // The crystal used on nRF52840PDK has ±20ppm accuracy.
+// clang-format on
+
+typedef enum
+{
+ kMsTimer,
+ kUsTimer,
+ k802154Timer,
+ k802154Sync,
+ kNumTimers
+} AlarmIndex;
+
+typedef struct
+{
+ volatile bool mFireAlarm; ///< Information for processing function, that alarm should fire.
+ uint64_t mTargetTime; ///< Alarm fire time (in millisecond for MsTimer, in microsecond for UsTimer)
+} AlarmData;
+
+typedef struct
+{
+ uint32_t mChannelNumber;
+ uint32_t mCompareEventMask;
+ nrf_rtc_event_t mCompareEvent;
+ nrf_rtc_int_t mCompareInt;
+} AlarmChannelData;
+
+static volatile uint32_t sOverflowCounter; ///< Counter of RTC overflowCounter, incremented by 2 on each OVERFLOW event.
+static volatile uint8_t sMutex; ///< Mutex for write access to @ref sOverflowCounter.
+static volatile uint64_t sTimeOffset = 0; ///< Time overflowCounter to keep track of current time (in millisecond).
+static volatile bool sEventPending; ///< Timer fired and upper layer should be notified.
+static AlarmData sTimerData[kNumTimers]; ///< Data of the timers.
+
+static const AlarmChannelData sChannelData[kNumTimers] = //
+ { //
+ [kMsTimer] =
+ {
+ .mChannelNumber = 0,
+ .mCompareEventMask = RTC_EVTEN_COMPARE0_Msk,
+ .mCompareEvent = NRF_RTC_EVENT_COMPARE_0,
+ .mCompareInt = NRF_RTC_INT_COMPARE0_MASK,
+ },
+ [kUsTimer] =
+ {
+ .mChannelNumber = 1,
+ .mCompareEventMask = RTC_EVTEN_COMPARE1_Msk,
+ .mCompareEvent = NRF_RTC_EVENT_COMPARE_1,
+ .mCompareInt = NRF_RTC_INT_COMPARE1_MASK,
+ },
+ [k802154Timer] =
+ {
+ .mChannelNumber = 2,
+ .mCompareEventMask = RTC_EVTEN_COMPARE2_Msk,
+ .mCompareEvent = NRF_RTC_EVENT_COMPARE_2,
+ .mCompareInt = NRF_RTC_INT_COMPARE2_MASK,
+ },
+ [k802154Sync] = {
+ .mChannelNumber = 3,
+ .mCompareEventMask = RTC_EVTEN_COMPARE3_Msk,
+ .mCompareEvent = NRF_RTC_EVENT_COMPARE_3,
+ .mCompareInt = NRF_RTC_INT_COMPARE3_MASK,
+ }};
+
+static inline bool MutexGet(void)
+{
+ do
+ {
+ volatile uint8_t mutexValue = __LDREXB(&sMutex);
+
+ if (mutexValue)
+ {
+ __CLREX();
+ return false;
+ }
+ } while (__STREXB(1, &sMutex));
+
+ // Disable OVERFLOW interrupt to prevent lock-up in interrupt context while mutex is locked from lower priority
+ // context and OVERFLOW event flag is stil up.
+ nrf_rtc_int_disable(RTC_INSTANCE, NRF_RTC_INT_OVERFLOW_MASK);
+
+ __DMB();
+
+ return true;
+}
+
+static inline void MutexRelease(void)
+{
+ // Re-enable OVERFLOW interrupt.
+ nrf_rtc_int_enable(RTC_INSTANCE, NRF_RTC_INT_OVERFLOW_MASK);
+
+ __DMB();
+ sMutex = 0;
+}
+
+static inline uint64_t TimeToTicks(uint64_t aTime, AlarmIndex aIndex)
+{
+ if (aIndex == kMsTimer)
+ {
+ aTime *= US_PER_MS;
+ }
+
+ return NRF_802154_US_TO_RTC_TICKS(aTime);
+}
+
+static inline uint64_t TicksToTime(uint64_t aTicks, AlarmIndex aIndex)
+{
+ uint64_t result = NRF_802154_RTC_TICKS_TO_US(aTicks);
+
+ if (aIndex == kMsTimer)
+ {
+ result /= US_PER_MS;
+ }
+
+ return result;
+}
+
+static inline bool AlarmShallStrike(uint64_t aNow, AlarmIndex aIndex)
+{
+ return aNow >= sTimerData[aIndex].mTargetTime;
+}
+
+static uint32_t GetOverflowCounter(void)
+{
+ uint32_t overflowCounter;
+
+ // Get mutual access for writing to sOverflowCounter variable.
+ if (MutexGet())
+ {
+ bool increasing = false;
+
+ // Check if interrupt was handled already.
+ if (nrf_rtc_event_pending(RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW))
+ {
+ sOverflowCounter++;
+ increasing = true;
+
+ __DMB();
+
+ // Mark that interrupt was handled.
+ nrf_rtc_event_clear(RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW);
+
+ // Result should be incremented. sOverflowCounter will be incremented after mutex is released.
+ }
+ else
+ {
+ // Either overflow handling is not needed OR we acquired the mutex just after it was released.
+ // Overflow is handled after mutex is released, but it cannot be assured that sOverflowCounter
+ // was incremented for the second time, so we increment the result here.
+ }
+
+ overflowCounter = (sOverflowCounter + 1) / 2;
+
+ MutexRelease();
+
+ if (increasing)
+ {
+ // It's virtually impossible that overflow event is pending again before next instruction is performed. It
+ // is an error condition.
+ assert(sOverflowCounter & 0x01);
+
+ // Increment the counter for the second time, to allow instructions from other context get correct value of
+ // the counter.
+ sOverflowCounter++;
+ }
+ }
+ else
+ {
+ // Failed to acquire mutex.
+ if (nrf_rtc_event_pending(RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW) || (sOverflowCounter & 0x01))
+ {
+ // Lower priority context is currently incrementing sOverflowCounter variable.
+ overflowCounter = (sOverflowCounter + 2) / 2;
+ }
+ else
+ {
+ // Lower priority context has already incremented sOverflowCounter variable or incrementing is not needed
+ // now.
+ overflowCounter = sOverflowCounter / 2;
+ }
+ }
+
+ return overflowCounter;
+}
+
+static uint32_t GetRtcCounter(void)
+{
+ return nrf_rtc_counter_get(RTC_INSTANCE);
+}
+
+static void GetOffsetAndCounter(uint32_t *aOffset, uint32_t *aCounter)
+{
+ uint32_t offset1 = GetOverflowCounter();
+
+ __DMB();
+
+ uint32_t rtcValue1 = GetRtcCounter();
+
+ __DMB();
+
+ uint32_t offset2 = GetOverflowCounter();
+
+ *aOffset = offset2;
+ *aCounter = (offset1 == offset2) ? rtcValue1 : GetRtcCounter();
+}
+
+static uint64_t GetTime(uint32_t aOffset, uint32_t aCounter, AlarmIndex aIndex)
+{
+ uint64_t result = (uint64_t)aOffset * US_PER_OVERFLOW + TicksToTime(aCounter, kUsTimer);
+
+ if (aIndex == kMsTimer)
+ {
+ result /= US_PER_MS;
+ }
+
+ return result;
+}
+
+static uint64_t GetCurrentTime(AlarmIndex aIndex)
+{
+ uint32_t offset;
+ uint32_t rtc_counter;
+
+ GetOffsetAndCounter(&offset, &rtc_counter);
+
+ return GetTime(offset, rtc_counter, aIndex);
+}
+
+static void HandleCompareMatch(AlarmIndex aIndex, bool aSkipCheck)
+{
+ nrf_rtc_event_clear(RTC_INSTANCE, sChannelData[aIndex].mCompareEvent);
+
+ uint64_t now = GetCurrentTime(aIndex);
+
+ // In case the target time was larger than single overflow,
+ // we should only strike the timer on final compare event.
+ if (aSkipCheck || AlarmShallStrike(now, aIndex))
+ {
+ nrf_rtc_event_disable(RTC_INSTANCE, sChannelData[aIndex].mCompareEventMask);
+ nrf_rtc_int_disable(RTC_INSTANCE, sChannelData[aIndex].mCompareInt);
+
+ switch (aIndex)
+ {
+ case k802154Timer:
+ nrf_802154_lp_timer_fired();
+ break;
+
+ case k802154Sync:
+ nrf_802154_lp_timer_synchronized();
+ break;
+
+ case kMsTimer:
+ case kUsTimer:
+ sTimerData[aIndex].mFireAlarm = true;
+ sEventPending = true;
+ otSysEventSignalPending();
+ break;
+
+ default:
+ assert(false);
+ }
+ }
+}
+
+static uint64_t ConvertT0AndDtTo64BitTime(uint32_t aT0, uint32_t aDt, const uint64_t *aNow)
+{
+ uint64_t now;
+ now = *aNow;
+
+ if (((uint32_t)now < aT0) && ((aT0 - (uint32_t)now) > (UINT32_MAX / 2)))
+ {
+ now -= EPOCH_32BIT_US;
+ }
+ else if (((uint32_t)now > aT0) && (((uint32_t)now) - aT0 > (UINT32_MAX / 2)))
+ {
+ now += EPOCH_32BIT_US;
+ }
+
+ return (EPOCH_FROM_TIME(now)) + aT0 + aDt;
+}
+
+static uint64_t RoundUpTimeToTimerTicksMultiply(uint64_t aTime, AlarmIndex aIndex)
+{
+ uint64_t ticks = TimeToTicks(aTime, aIndex);
+ uint64_t result = TicksToTime(ticks, aIndex);
+ return result;
+}
+
+static void TimerStartAt(uint32_t aT0, uint32_t aDt, AlarmIndex aIndex, const uint64_t *aNow)
+{
+ uint64_t targetCounter;
+ uint64_t targetTime;
+
+ nrf_rtc_int_disable(RTC_INSTANCE, sChannelData[aIndex].mCompareInt);
+ nrf_rtc_event_enable(RTC_INSTANCE, sChannelData[aIndex].mCompareEventMask);
+
+ targetTime = ConvertT0AndDtTo64BitTime(aT0, aDt, aNow);
+ targetCounter = TimeToTicks(targetTime, aIndex) & RTC_CC_COMPARE_Msk;
+
+ sTimerData[aIndex].mTargetTime = RoundUpTimeToTimerTicksMultiply(targetTime, aIndex);
+
+ nrf_rtc_cc_set(RTC_INSTANCE, sChannelData[aIndex].mChannelNumber, targetCounter);
+}
+
+static void AlarmStartAt(uint32_t aT0, uint32_t aDt, AlarmIndex aIndex)
+{
+ uint32_t offset;
+ uint32_t rtc_value;
+ uint64_t now;
+ uint64_t now_rtc_protected;
+
+ GetOffsetAndCounter(&offset, &rtc_value);
+ now = GetTime(offset, rtc_value, aIndex);
+
+ TimerStartAt(aT0, aDt, aIndex, &now);
+
+ if (rtc_value != GetRtcCounter())
+ {
+ GetOffsetAndCounter(&offset, &rtc_value);
+ }
+
+ now_rtc_protected = GetTime(offset, rtc_value + MIN_RTC_COMPARE_EVENT_TICKS, aIndex);
+
+ if (AlarmShallStrike(now_rtc_protected, aIndex))
+ {
+ HandleCompareMatch(aIndex, true);
+
+ /**
+ * Normally ISR sets event flag automatically.
+ * Here we are calling HandleCompareMatch explicitly and no ISR will be fired.
+ * To prevent possible permanent sleep on next WFE we have to set event flag.
+ */
+ __SEV();
+ }
+ else
+ {
+ nrf_rtc_int_enable(RTC_INSTANCE, sChannelData[aIndex].mCompareInt);
+ }
+}
+
+static void TimerSyncStartAt(uint32_t aT0, uint32_t aDt, const uint64_t *aNow)
+{
+ TimerStartAt(aT0, aDt, k802154Sync, aNow);
+
+ nrf_rtc_int_enable(RTC_INSTANCE, sChannelData[k802154Sync].mCompareInt);
+}
+
+static void AlarmStop(AlarmIndex aIndex)
+{
+ nrf_rtc_event_disable(RTC_INSTANCE, sChannelData[aIndex].mCompareEventMask);
+ nrf_rtc_int_disable(RTC_INSTANCE, sChannelData[aIndex].mCompareInt);
+ nrf_rtc_event_clear(RTC_INSTANCE, sChannelData[aIndex].mCompareEvent);
+
+ sTimerData[aIndex].mFireAlarm = false;
+}
+
+void nrf5AlarmInit(void)
+{
+ memset(sTimerData, 0, sizeof(sTimerData));
+ sOverflowCounter = 0;
+ sMutex = 0;
+ sTimeOffset = 0;
+
+ // Setup low frequency clock.
+ nrf_drv_clock_lfclk_request(NULL);
+
+ while (!nrf_drv_clock_lfclk_is_running())
+ {
+ }
+
+ // Setup RTC timer.
+ NVIC_SetPriority(RTC_IRQN, RTC_IRQ_PRIORITY);
+ NVIC_ClearPendingIRQ(RTC_IRQN);
+ NVIC_EnableIRQ(RTC_IRQN);
+
+ nrf_rtc_prescaler_set(RTC_INSTANCE, 0);
+
+ nrf_rtc_event_clear(RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW);
+ nrf_rtc_event_enable(RTC_INSTANCE, RTC_EVTEN_OVRFLW_Msk);
+ nrf_rtc_int_enable(RTC_INSTANCE, NRF_RTC_INT_OVERFLOW_MASK);
+
+ for (uint32_t i = 0; i < kNumTimers; i++)
+ {
+ nrf_rtc_event_clear(RTC_INSTANCE, sChannelData[i].mCompareEvent);
+ nrf_rtc_event_disable(RTC_INSTANCE, sChannelData[i].mCompareEventMask);
+ nrf_rtc_int_disable(RTC_INSTANCE, sChannelData[i].mCompareInt);
+ }
+
+ nrf_rtc_task_trigger(RTC_INSTANCE, NRF_RTC_TASK_START);
+}
+
+void nrf5AlarmDeinit(void)
+{
+ nrf_rtc_task_trigger(RTC_INSTANCE, NRF_RTC_TASK_STOP);
+
+ for (uint32_t i = 0; i < kNumTimers; i++)
+ {
+ nrf_rtc_event_clear(RTC_INSTANCE, sChannelData[i].mCompareEvent);
+ nrf_rtc_event_disable(RTC_INSTANCE, sChannelData[i].mCompareEventMask);
+ nrf_rtc_int_disable(RTC_INSTANCE, sChannelData[i].mCompareInt);
+ }
+
+ nrf_rtc_int_disable(RTC_INSTANCE, NRF_RTC_INT_OVERFLOW_MASK);
+ nrf_rtc_event_disable(RTC_INSTANCE, RTC_EVTEN_OVRFLW_Msk);
+ nrf_rtc_event_clear(RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW);
+
+ nrf_802154_lp_timer_sync_stop();
+
+ NVIC_DisableIRQ(RTC_IRQN);
+ NVIC_ClearPendingIRQ(RTC_IRQN);
+ NVIC_SetPriority(RTC_IRQN, 0);
+
+ nrf_drv_clock_lfclk_release();
+}
+
+void nrf5AlarmProcess(otInstance *aInstance)
+{
+ do
+ {
+ sEventPending = false;
+
+ if (sTimerData[kMsTimer].mFireAlarm)
+ {
+ sTimerData[kMsTimer].mFireAlarm = false;
+
+#if OPENTHREAD_CONFIG_DIAG_ENABLE
+
+ if (otPlatDiagModeGet())
+ {
+ otPlatDiagAlarmFired(aInstance);
+ }
+ else
+#endif
+ {
+ otPlatAlarmMilliFired(aInstance);
+ }
+ }
+
+ if (sTimerData[kUsTimer].mFireAlarm)
+ {
+ sTimerData[kUsTimer].mFireAlarm = false;
+
+ otPlatAlarmMicroFired(aInstance);
+ }
+ } while (sEventPending);
+}
+
+inline uint64_t nrf5AlarmGetCurrentTime(void)
+{
+ return GetCurrentTime(kUsTimer);
+}
+
+uint64_t nrf5AlarmGetRawCounter(void)
+{
+ uint32_t offset = 0;
+ uint32_t counter = 0;
+
+ GetOffsetAndCounter(&offset, &counter);
+
+ return (((uint64_t)offset) << RTC_COUNTER_BITS) | counter;
+}
+
+uint32_t otPlatAlarmMilliGetNow(void)
+{
+ return (uint32_t)(nrf5AlarmGetCurrentTime() / US_PER_MS);
+}
+
+void otPlatAlarmMilliStartAt(otInstance *aInstance, uint32_t aT0, uint32_t aDt)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ AlarmStartAt(aT0, aDt, kMsTimer);
+}
+
+void otPlatAlarmMilliStop(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ AlarmStop(kMsTimer);
+}
+
+uint32_t otPlatAlarmMicroGetNow(void)
+{
+ return (uint32_t)nrf5AlarmGetCurrentTime();
+}
+
+void otPlatAlarmMicroStartAt(otInstance *aInstance, uint32_t aT0, uint32_t aDt)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ AlarmStartAt(aT0, aDt, kUsTimer);
+}
+
+void otPlatAlarmMicroStop(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ AlarmStop(kUsTimer);
+}
+
+/**
+ * Radio driver timer abstraction API
+ */
+
+void nrf_802154_lp_timer_init(void)
+{
+ // Intentionally empty
+}
+
+void nrf_802154_lp_timer_deinit(void)
+{
+ // Intentionally empty
+}
+
+void nrf_802154_lp_timer_critical_section_enter(void)
+{
+ nrf_rtc_int_disable(RTC_INSTANCE, sChannelData[k802154Timer].mCompareInt);
+ __DSB();
+ __ISB();
+}
+
+void nrf_802154_lp_timer_critical_section_exit(void)
+{
+ nrf_rtc_int_enable(RTC_INSTANCE, sChannelData[k802154Timer].mCompareInt);
+}
+
+uint32_t nrf_802154_lp_timer_time_get(void)
+{
+ return (uint32_t)nrf5AlarmGetCurrentTime();
+}
+
+uint32_t nrf_802154_lp_timer_granularity_get(void)
+{
+ return NRF_802154_US_PER_TICK;
+}
+
+void nrf_802154_lp_timer_start(uint32_t t0, uint32_t dt)
+{
+ AlarmStartAt(t0, dt, k802154Timer);
+}
+
+bool nrf_802154_lp_timer_is_running(void)
+{
+ return nrf_rtc_int_is_enabled(RTC_INSTANCE, sChannelData[k802154Timer].mCompareInt);
+}
+
+void nrf_802154_lp_timer_stop(void)
+{
+ AlarmStop(k802154Timer);
+}
+
+void nrf_802154_lp_timer_sync_start_now(void)
+{
+ uint32_t counter;
+ uint32_t offset;
+ uint64_t now;
+
+ do
+ {
+ GetOffsetAndCounter(&offset, &counter);
+ now = GetTime(offset, counter, k802154Sync);
+ TimerSyncStartAt((uint32_t)now, MIN_RTC_COMPARE_EVENT_DT, &now);
+ } while (GetRtcCounter() != counter);
+}
+
+void nrf_802154_lp_timer_sync_start_at(uint32_t t0, uint32_t dt)
+{
+ uint64_t now = GetCurrentTime(k802154Sync);
+
+ TimerSyncStartAt(t0, dt, &now);
+}
+
+void nrf_802154_lp_timer_sync_stop(void)
+{
+ AlarmStop(k802154Sync);
+}
+
+uint32_t nrf_802154_lp_timer_sync_event_get(void)
+{
+ return (uint32_t)nrf_rtc_event_address_get(RTC_INSTANCE, sChannelData[k802154Sync].mCompareEvent);
+}
+
+uint32_t nrf_802154_lp_timer_sync_time_get(void)
+{
+ return (uint32_t)sTimerData[k802154Sync].mTargetTime;
+}
+
+/**
+ * RTC IRQ handler
+ */
+
+void RTC_IRQ_HANDLER(void)
+{
+ // Handle overflow.
+ if (nrf_rtc_event_pending(RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW))
+ {
+ // Disable OVERFLOW interrupt to prevent lock-up in interrupt context while mutex is locked from lower priority
+ // context and OVERFLOW event flag is stil up. OVERFLOW interrupt will be re-enabled when mutex is released -
+ // either from this handler, or from lower priority context, that locked the mutex.
+ nrf_rtc_int_disable(RTC_INSTANCE, NRF_RTC_INT_OVERFLOW_MASK);
+
+ // Handle OVERFLOW event by reading current value of overflow counter.
+ (void)GetOverflowCounter();
+ }
+
+ // Handle compare match.
+ for (uint32_t i = 0; i < kNumTimers; i++)
+ {
+ if (nrf_rtc_int_is_enabled(RTC_INSTANCE, sChannelData[i].mCompareInt) &&
+ nrf_rtc_event_pending(RTC_INSTANCE, sChannelData[i].mCompareEvent))
+ {
+ HandleCompareMatch((AlarmIndex)i, false);
+ }
+ }
+}
+
+#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
+uint64_t otPlatTimeGet(void)
+{
+ return nrf5AlarmGetCurrentTime();
+}
+
+uint16_t otPlatTimeGetXtalAccuracy(void)
+{
+ return XTAL_ACCURACY;
+}
+#endif // OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
diff --git a/examples/platforms/nrf528xx/src/diag.c b/examples/platforms/nrf528xx/src/diag.c
new file mode 100644
index 0000000..7918f09
--- /dev/null
+++ b/examples/platforms/nrf528xx/src/diag.c
@@ -0,0 +1,506 @@
+/*
+ * Copyright (c) 2016, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <openthread-core-config.h>
+#include <openthread/config.h>
+
+#include <inttypes.h>
+#include <stdbool.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "platform-nrf5.h"
+
+#include <hal/nrf_gpio.h>
+
+#include <openthread/cli.h>
+#include <openthread/platform/alarm-milli.h>
+#include <openthread/platform/diag.h>
+#include <openthread/platform/radio.h>
+#include <openthread/platform/toolchain.h>
+
+#include <common/logging.hpp>
+#include <drivers/radio/nrf_802154.h>
+#include <utils/code_utils.h>
+
+typedef enum
+{
+ kDiagTransmitModeIdle,
+ kDiagTransmitModePackets,
+ kDiagTransmitModeCarrier
+} DiagTrasmitMode;
+
+struct PlatformDiagCommand
+{
+ const char *mName;
+ void (*mCommand)(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen);
+};
+
+struct PlatformDiagMessage
+{
+ const char mMessageDescriptor[11];
+ uint8_t mChannel;
+ int16_t mID;
+ uint32_t mCnt;
+};
+
+/**
+ * Diagnostics mode variables.
+ *
+ */
+static bool sDiagMode = false;
+static bool sListen = false;
+static DiagTrasmitMode sTransmitMode = kDiagTransmitModeIdle;
+static uint8_t sChannel = 20;
+static int8_t sTxPower = 0;
+static uint32_t sTxPeriod = 1;
+static int32_t sTxCount = 0;
+static int32_t sTxRequestedCount = 1;
+static int16_t sID = -1;
+static struct PlatformDiagMessage sDiagMessage = {.mMessageDescriptor = "DiagMessage",
+ .mChannel = 0,
+ .mID = 0,
+ .mCnt = 0};
+
+static otError parseLong(char *argv, long *aValue)
+{
+ char *endptr;
+ *aValue = strtol(argv, &endptr, 0);
+ return (*endptr == '\0') ? OT_ERROR_NONE : OT_ERROR_PARSE;
+}
+
+static void appendErrorResult(otError aError, char *aOutput, size_t aOutputMaxLen)
+{
+ if (aError != OT_ERROR_NONE)
+ {
+ snprintf(aOutput, aOutputMaxLen, "failed\r\nstatus %#x\r\n", aError);
+ }
+}
+
+static bool startCarrierTransmision(void)
+{
+ nrf_802154_channel_set(sChannel);
+ nrf_802154_tx_power_set(sTxPower);
+
+ return nrf_802154_continuous_carrier();
+}
+
+static void processListen(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ otError error = OT_ERROR_NONE;
+
+ otEXPECT_ACTION(otPlatDiagModeGet(), error = OT_ERROR_INVALID_STATE);
+
+ if (argc == 0)
+ {
+ snprintf(aOutput, aOutputMaxLen, "listen: %s\r\n", sListen == true ? "yes" : "no");
+ }
+ else
+ {
+ long value;
+
+ error = parseLong(argv[0], &value);
+ otEXPECT(error == OT_ERROR_NONE);
+ sListen = (bool)(value);
+ snprintf(aOutput, aOutputMaxLen, "set listen to %s\r\nstatus 0x%02x\r\n", sListen == true ? "yes" : "no",
+ error);
+ }
+
+exit:
+ appendErrorResult(error, aOutput, aOutputMaxLen);
+}
+
+static void processID(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ otError error = OT_ERROR_NONE;
+
+ otEXPECT_ACTION(otPlatDiagModeGet(), error = OT_ERROR_INVALID_STATE);
+
+ if (argc == 0)
+ {
+ snprintf(aOutput, aOutputMaxLen, "ID: %" PRId16 "\r\n", sID);
+ }
+ else
+ {
+ long value;
+
+ error = parseLong(argv[0], &value);
+ otEXPECT(error == OT_ERROR_NONE);
+ otEXPECT_ACTION(value >= 0, error = OT_ERROR_INVALID_ARGS);
+ sID = (int16_t)(value);
+ snprintf(aOutput, aOutputMaxLen, "set ID to %" PRId16 "\r\nstatus 0x%02x\r\n", sID, error);
+ }
+
+exit:
+ appendErrorResult(error, aOutput, aOutputMaxLen);
+}
+
+static void processTransmit(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen)
+{
+ otError error = OT_ERROR_NONE;
+
+ otEXPECT_ACTION(otPlatDiagModeGet(), error = OT_ERROR_INVALID_STATE);
+
+ if (argc == 0)
+ {
+ snprintf(aOutput, aOutputMaxLen,
+ "transmit will send %" PRId32 " diagnostic messages with %" PRIu32 " ms interval\r\nstatus 0x%02x\r\n",
+ sTxRequestedCount, sTxPeriod, error);
+ }
+ else if (strcmp(argv[0], "stop") == 0)
+ {
+ otEXPECT_ACTION(sTransmitMode != kDiagTransmitModeIdle, error = OT_ERROR_INVALID_STATE);
+
+ otPlatAlarmMilliStop(aInstance);
+ snprintf(aOutput, aOutputMaxLen, "diagnostic message transmission is stopped\r\nstatus 0x%02x\r\n", error);
+ sTransmitMode = kDiagTransmitModeIdle;
+ otPlatRadioReceive(aInstance, sChannel);
+ }
+ else if (strcmp(argv[0], "start") == 0)
+ {
+ otEXPECT_ACTION(sTransmitMode == kDiagTransmitModeIdle, error = OT_ERROR_INVALID_STATE);
+
+ otPlatAlarmMilliStop(aInstance);
+ sTransmitMode = kDiagTransmitModePackets;
+ sTxCount = sTxRequestedCount;
+ uint32_t now = otPlatAlarmMilliGetNow();
+ otPlatAlarmMilliStartAt(aInstance, now, sTxPeriod);
+ snprintf(aOutput, aOutputMaxLen,
+ "sending %" PRId32 " diagnostic messages with %" PRIu32 " ms interval\r\nstatus 0x%02x\r\n",
+ sTxRequestedCount, sTxPeriod, error);
+ }
+ else if (strcmp(argv[0], "carrier") == 0)
+ {
+ otEXPECT_ACTION(sTransmitMode == kDiagTransmitModeIdle, error = OT_ERROR_INVALID_STATE);
+
+ otEXPECT_ACTION(startCarrierTransmision(), error = OT_ERROR_FAILED);
+
+ sTransmitMode = kDiagTransmitModeCarrier;
+
+ snprintf(aOutput, aOutputMaxLen, "sending carrier on channel %d with tx power %d\r\nstatus 0x%02x\r\n",
+ sChannel, sTxPower, error);
+ }
+ else if (strcmp(argv[0], "interval") == 0)
+ {
+ long value;
+
+ otEXPECT_ACTION(argc == 2, error = OT_ERROR_INVALID_ARGS);
+
+ error = parseLong(argv[1], &value);
+ otEXPECT(error == OT_ERROR_NONE);
+ otEXPECT_ACTION(value > 0, error = OT_ERROR_INVALID_ARGS);
+ sTxPeriod = (uint32_t)(value);
+ snprintf(aOutput, aOutputMaxLen, "set diagnostic messages interval to %" PRIu32 " ms\r\nstatus 0x%02x\r\n",
+ sTxPeriod, error);
+ }
+ else if (strcmp(argv[0], "count") == 0)
+ {
+ long value;
+
+ otEXPECT_ACTION(argc == 2, error = OT_ERROR_INVALID_ARGS);
+
+ error = parseLong(argv[1], &value);
+ otEXPECT(error == OT_ERROR_NONE);
+ otEXPECT_ACTION((value > 0) || (value == -1), error = OT_ERROR_INVALID_ARGS);
+ sTxRequestedCount = (uint32_t)(value);
+ snprintf(aOutput, aOutputMaxLen, "set diagnostic messages count to %" PRId32 "\r\nstatus 0x%02x\r\n",
+ sTxRequestedCount, error);
+ }
+ else
+ {
+ error = OT_ERROR_INVALID_ARGS;
+ }
+
+exit:
+ appendErrorResult(error, aOutput, aOutputMaxLen);
+}
+
+static void processGpio(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ long pinnum;
+ otError error = OT_ERROR_NONE;
+
+ otEXPECT_ACTION(otPlatDiagModeGet(), error = OT_ERROR_INVALID_STATE);
+
+ if (argc == 1)
+ {
+ uint32_t value;
+ nrf_gpio_pin_dir_t pindir;
+
+ error = parseLong(argv[0], &pinnum);
+ otEXPECT(error == OT_ERROR_NONE);
+
+ pindir = nrf_gpio_pin_dir_get(pinnum);
+
+ if (pindir == NRF_GPIO_PIN_DIR_INPUT)
+ {
+ value = nrf_gpio_pin_read(pinnum);
+ }
+ else
+ {
+ value = nrf_gpio_pin_out_read(pinnum);
+ }
+
+ snprintf(aOutput, aOutputMaxLen, "gpio %d = %d\r\n", (uint8_t)pinnum, (uint8_t)value);
+ }
+ else if (strcmp(argv[0], "set") == 0)
+ {
+ otEXPECT_ACTION(argc == 2, error = OT_ERROR_INVALID_ARGS);
+ error = parseLong(argv[1], &pinnum);
+ otEXPECT(error == OT_ERROR_NONE);
+
+ nrf_gpio_pin_set(pinnum);
+
+ snprintf(aOutput, aOutputMaxLen, "gpio %d = 1\r\n", (uint8_t)pinnum);
+ }
+ else if (strcmp(argv[0], "clr") == 0)
+ {
+ otEXPECT_ACTION(argc == 2, error = OT_ERROR_INVALID_ARGS);
+ error = parseLong(argv[1], &pinnum);
+ otEXPECT(error == OT_ERROR_NONE);
+
+ nrf_gpio_pin_clear(pinnum);
+
+ snprintf(aOutput, aOutputMaxLen, "gpio %d = 0\r\n", (uint8_t)pinnum);
+ }
+ else if (strcmp(argv[0], "out") == 0)
+ {
+ otEXPECT_ACTION(argc == 2, error = OT_ERROR_INVALID_ARGS);
+ error = parseLong(argv[1], &pinnum);
+ otEXPECT(error == OT_ERROR_NONE);
+
+ nrf_gpio_cfg_output(pinnum);
+
+ snprintf(aOutput, aOutputMaxLen, "gpio %d: out\r\n", (uint8_t)pinnum);
+ }
+ else if (strcmp(argv[0], "in") == 0)
+ {
+ otEXPECT_ACTION(argc == 2, error = OT_ERROR_INVALID_ARGS);
+ error = parseLong(argv[1], &pinnum);
+ otEXPECT(error == OT_ERROR_NONE);
+
+ nrf_gpio_cfg_input(pinnum, NRF_GPIO_PIN_NOPULL);
+
+ snprintf(aOutput, aOutputMaxLen, "gpio %d: in no pull\r\n", (uint8_t)pinnum);
+ }
+ else
+ {
+ error = OT_ERROR_INVALID_ARGS;
+ }
+
+exit:
+ appendErrorResult(error, aOutput, aOutputMaxLen);
+}
+
+static void processTemp(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ OT_UNUSED_VARIABLE(argv);
+
+ otError error = OT_ERROR_NONE;
+ int32_t temperature;
+
+ otEXPECT_ACTION(otPlatDiagModeGet(), error = OT_ERROR_INVALID_STATE);
+ otEXPECT_ACTION(argc == 0, error = OT_ERROR_INVALID_ARGS);
+
+ temperature = nrf5TempGet();
+
+ // Measurement resolution is 0.25 degrees Celsius
+ // Convert the temperature measurement to a decimal value, in degrees Celsius
+ snprintf(aOutput, aOutputMaxLen, "%" PRId32 ".%02" PRId32 "\r\n", temperature / 4, 25 * (temperature % 4));
+
+exit:
+ appendErrorResult(error, aOutput, aOutputMaxLen);
+}
+
+static void processCcaThreshold(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ otError error = OT_ERROR_NONE;
+ nrf_802154_cca_cfg_t ccaConfig;
+
+ otEXPECT_ACTION(otPlatDiagModeGet(), error = OT_ERROR_INVALID_STATE);
+
+ if (argc == 0)
+ {
+ nrf_802154_cca_cfg_get(&ccaConfig);
+
+ snprintf(aOutput, aOutputMaxLen, "cca threshold: %u\r\n", ccaConfig.ed_threshold);
+ }
+ else
+ {
+ long value;
+ error = parseLong(argv[0], &value);
+ otEXPECT(error == OT_ERROR_NONE);
+ otEXPECT_ACTION(value >= 0 && value <= 0xFF, error = OT_ERROR_INVALID_ARGS);
+
+ memset(&ccaConfig, 0, sizeof(ccaConfig));
+ ccaConfig.mode = NRF_RADIO_CCA_MODE_ED;
+ ccaConfig.ed_threshold = (uint8_t)value;
+
+ nrf_802154_cca_cfg_set(&ccaConfig);
+ snprintf(aOutput, aOutputMaxLen, "set cca threshold to %u\r\nstatus 0x%02x\r\n", ccaConfig.ed_threshold, error);
+ }
+
+exit:
+ appendErrorResult(error, aOutput, aOutputMaxLen);
+}
+
+const struct PlatformDiagCommand sCommands[] = {
+ {"ccathreshold", &processCcaThreshold},
+ {"gpio", &processGpio},
+ {"id", &processID},
+ {"listen", &processListen},
+ {"temp", &processTemp},
+ {"transmit", &processTransmit},
+};
+
+void otPlatDiagProcess(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen)
+{
+ size_t i;
+
+ for (i = 0; i < otARRAY_LENGTH(sCommands); i++)
+ {
+ if (strcmp(argv[0], sCommands[i].mName) == 0)
+ {
+ sCommands[i].mCommand(aInstance, argc - 1, argc > 1 ? &argv[1] : NULL, aOutput, aOutputMaxLen);
+ break;
+ }
+ }
+
+ if (i == otARRAY_LENGTH(sCommands))
+ {
+ snprintf(aOutput, aOutputMaxLen, "diag feature '%s' is not supported\r\n", argv[0]);
+ }
+}
+
+void otPlatDiagModeSet(bool aMode)
+{
+ sDiagMode = aMode;
+
+ if (!sDiagMode)
+ {
+ otPlatRadioReceive(NULL, sChannel);
+ otPlatRadioSleep(NULL);
+
+ // Clear all remaining events before switching to MAC callbacks.
+ nrf5RadioClearPendingEvents();
+ }
+ else
+ {
+ // Reinit
+ sTransmitMode = kDiagTransmitModeIdle;
+ }
+}
+
+bool otPlatDiagModeGet()
+{
+ return sDiagMode;
+}
+
+void otPlatDiagChannelSet(uint8_t aChannel)
+{
+ sChannel = aChannel;
+}
+
+void otPlatDiagTxPowerSet(int8_t aTxPower)
+{
+ sTxPower = aTxPower;
+}
+
+void otPlatDiagRadioReceived(otInstance *aInstance, otRadioFrame *aFrame, otError aError)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ if (sListen && (aError == OT_ERROR_NONE))
+ {
+ if (aFrame->mLength == sizeof(struct PlatformDiagMessage))
+ {
+ struct PlatformDiagMessage *message = (struct PlatformDiagMessage *)aFrame->mPsdu;
+
+ if (strncmp(message->mMessageDescriptor, "DiagMessage", 11) == 0)
+ {
+ otPlatLog(OT_LOG_LEVEL_DEBG, OT_LOG_REGION_PLATFORM,
+ "{\"Frame\":{"
+ "\"LocalChannel\":%u ,"
+ "\"RemoteChannel\":%u,"
+ "\"CNT\":%" PRIu32 ","
+ "\"LocalID\":%" PRId16 ","
+ "\"RemoteID\":%" PRId16 ","
+ "\"RSSI\":%d"
+ "}}\r\n",
+ aFrame->mChannel, message->mChannel, message->mCnt, sID, message->mID,
+ aFrame->mInfo.mRxInfo.mRssi);
+ }
+ }
+ }
+}
+
+void otPlatDiagAlarmCallback(otInstance *aInstance)
+{
+ if (sTransmitMode == kDiagTransmitModePackets)
+ {
+ if ((sTxCount > 0) || (sTxCount == -1))
+ {
+ otRadioFrame *sTxPacket = otPlatRadioGetTransmitBuffer(aInstance);
+
+ sTxPacket->mLength = sizeof(struct PlatformDiagMessage);
+ sTxPacket->mChannel = sChannel;
+
+ sDiagMessage.mChannel = sTxPacket->mChannel;
+ sDiagMessage.mID = sID;
+
+ memcpy(sTxPacket->mPsdu, &sDiagMessage, sizeof(struct PlatformDiagMessage));
+ otPlatRadioTransmit(aInstance, sTxPacket);
+
+ sDiagMessage.mCnt++;
+
+ if (sTxCount != -1)
+ {
+ sTxCount--;
+ }
+
+ uint32_t now = otPlatAlarmMilliGetNow();
+ otPlatAlarmMilliStartAt(aInstance, now, sTxPeriod);
+ }
+ else
+ {
+ sTransmitMode = kDiagTransmitModeIdle;
+ otPlatAlarmMilliStop(aInstance);
+ otPlatLog(OT_LOG_LEVEL_DEBG, OT_LOG_REGION_PLATFORM, "Transmit done");
+ }
+ }
+}
diff --git a/examples/platforms/nrf52840/entropy.c b/examples/platforms/nrf528xx/src/entropy.c
similarity index 100%
rename from examples/platforms/nrf52840/entropy.c
rename to examples/platforms/nrf528xx/src/entropy.c
diff --git a/examples/platforms/nrf528xx/src/fem.c b/examples/platforms/nrf528xx/src/fem.c
new file mode 100644
index 0000000..2b4d2c1
--- /dev/null
+++ b/examples/platforms/nrf528xx/src/fem.c
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2017, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file implements the OpenThread FEM helper functions.
+ *
+ */
+
+#include <openthread-core-config.h>
+#include <openthread/config.h>
+
+#include <stdint.h>
+#include <string.h>
+
+#include "platform-fem.h"
+
+#define ENABLE_FEM 1
+#include <nrf_802154.h>
+
+void PlatformFemSetConfigParams(const PlatformFemConfigParams *aConfig)
+{
+ nrf_fem_interface_config_t cfg;
+
+ memset(&cfg, 0, sizeof(cfg));
+
+ cfg.fem_config.pa_time_gap_us = aConfig->mFemPhyCfg.mPaTimeGapUs;
+ cfg.fem_config.lna_time_gap_us = aConfig->mFemPhyCfg.mLnaTimeGapUs;
+ cfg.fem_config.pdn_settle_us = aConfig->mFemPhyCfg.mPdnSettleUs;
+ cfg.fem_config.trx_hold_us = aConfig->mFemPhyCfg.mTrxHoldUs;
+ cfg.fem_config.pa_gain_db = aConfig->mFemPhyCfg.mPaGainDb;
+ cfg.fem_config.lna_gain_db = aConfig->mFemPhyCfg.mLnaGainDb;
+ cfg.pa_pin_config.enable = aConfig->mPaCfg.mEnable;
+ cfg.pa_pin_config.active_high = aConfig->mPaCfg.mActiveHigh;
+ cfg.pa_pin_config.gpio_pin = aConfig->mPaCfg.mGpioPin;
+ cfg.pa_pin_config.gpiote_ch_id = aConfig->mPaCfg.mGpioteChId;
+ cfg.lna_pin_config.enable = aConfig->mLnaCfg.mEnable;
+ cfg.lna_pin_config.active_high = aConfig->mLnaCfg.mActiveHigh;
+ cfg.lna_pin_config.gpio_pin = aConfig->mLnaCfg.mGpioPin;
+ cfg.lna_pin_config.gpiote_ch_id = aConfig->mLnaCfg.mGpioteChId;
+ cfg.pdn_pin_config.enable = aConfig->mPdnCfg.mEnable;
+ cfg.pdn_pin_config.active_high = aConfig->mPdnCfg.mActiveHigh;
+ cfg.pdn_pin_config.gpio_pin = aConfig->mPdnCfg.mGpioPin;
+ cfg.pdn_pin_config.gpiote_ch_id = aConfig->mPdnCfg.mGpioteChId;
+ cfg.ppi_ch_id_clr = aConfig->mPpiChIdClr;
+ cfg.ppi_ch_id_set = aConfig->mPpiChIdSet;
+ cfg.ppi_ch_id_pdn = aConfig->mPpiChIdPdn;
+
+ nrf_fem_interface_configuration_set(&cfg);
+}
diff --git a/examples/platforms/nrf52840/flash.c b/examples/platforms/nrf528xx/src/flash.c
similarity index 100%
rename from examples/platforms/nrf52840/flash.c
rename to examples/platforms/nrf528xx/src/flash.c
diff --git a/examples/platforms/nrf528xx/src/flash_nosd.c b/examples/platforms/nrf528xx/src/flash_nosd.c
new file mode 100644
index 0000000..0be99d0
--- /dev/null
+++ b/examples/platforms/nrf528xx/src/flash_nosd.c
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2017, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <openthread-core-config.h>
+#include <openthread/config.h>
+
+#include <assert.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <utils/code_utils.h>
+#include <utils/flash.h>
+
+#include "platform-nrf5.h"
+#include "hal/nrf_nvmc.h"
+
+otError nrf5FlashPageErase(uint32_t aAddress)
+{
+ nrf_nvmc_page_erase(aAddress);
+
+ return OT_ERROR_NONE;
+}
+
+bool nrf5FlashIsBusy(void)
+{
+ return NRF_NVMC->READY != NVMC_READY_READY_Ready;
+}
+
+uint32_t nrf5FlashWrite(uint32_t aAddress, const uint8_t *aData, uint32_t aSize)
+{
+ nrf_nvmc_write_bytes(aAddress, aData, aSize);
+ return aSize;
+}
diff --git a/examples/platforms/nrf528xx/src/flash_sd.c b/examples/platforms/nrf528xx/src/flash_sd.c
new file mode 100644
index 0000000..50d31ab
--- /dev/null
+++ b/examples/platforms/nrf528xx/src/flash_sd.c
@@ -0,0 +1,267 @@
+/*
+ * Copyright (c) 2017, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <openthread-core-config.h>
+#include <openthread/config.h>
+
+#include <assert.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <openthread/platform/alarm-milli.h>
+
+#include <utils/code_utils.h>
+#include <utils/flash.h>
+
+#include "platform-nrf5.h"
+#include "softdevice.h"
+
+#define FLASH_PAGE_SIZE 4096
+#define FLASH_TIMEOUT 500
+
+typedef enum
+{
+ FLASH_STATE_IDLE,
+ FLASH_STATE_WAITING_FOR_IDLE,
+ FLASH_STATE_PENDING,
+ FLASH_STATE_COMPLETE_SUCCESS,
+ FLASH_STATE_COMPLETE_FAILED
+} SdFlashState;
+
+static volatile SdFlashState sState;
+
+void nrf5SdSocFlashProcess(uint32_t aEvtId)
+{
+ switch (aEvtId)
+ {
+ case NRF_EVT_FLASH_OPERATION_SUCCESS:
+ switch (sState)
+ {
+ case FLASH_STATE_PENDING:
+ sState = FLASH_STATE_COMPLETE_SUCCESS;
+ break;
+
+ case FLASH_STATE_WAITING_FOR_IDLE:
+ sState = FLASH_STATE_IDLE;
+ break;
+
+ default:
+ break;
+ }
+
+ break;
+
+ case NRF_EVT_FLASH_OPERATION_ERROR:
+ switch (sState)
+ {
+ case FLASH_STATE_PENDING:
+ sState = FLASH_STATE_COMPLETE_FAILED;
+ break;
+
+ case FLASH_STATE_WAITING_FOR_IDLE:
+ sState = FLASH_STATE_IDLE;
+ break;
+
+ default:
+ break;
+ }
+
+ break;
+
+ default:
+ break;
+ }
+}
+
+static void waitInState(SdFlashState state)
+{
+ uint32_t startTime = otPlatAlarmMilliGetNow();
+
+ do
+ {
+ nrf_sdh_evts_poll();
+
+ if (sState != state)
+ {
+ break;
+ }
+ } while (otPlatAlarmMilliGetNow() - startTime < FLASH_TIMEOUT);
+}
+
+static otError sdFlashSingleWrite(uint32_t aAddress, const uint8_t *aData, uint32_t aSize)
+{
+ uint32_t retval;
+
+ nrf_sdh_suspend();
+
+ do
+ {
+ sState = FLASH_STATE_PENDING;
+
+ retval = sd_flash_write((uint32_t *)aAddress, (uint32_t *)aData, aSize);
+
+ if (retval == NRF_SUCCESS)
+ {
+ break;
+ }
+ else if (retval == NRF_ERROR_BUSY)
+ {
+ sState = FLASH_STATE_WAITING_FOR_IDLE;
+ }
+ else
+ {
+ assert(false);
+ }
+
+ waitInState(FLASH_STATE_WAITING_FOR_IDLE);
+
+ } while (retval == NRF_ERROR_BUSY);
+
+ waitInState(FLASH_STATE_PENDING);
+
+ if (sState != FLASH_STATE_COMPLETE_SUCCESS)
+ {
+ retval = NRF_ERROR_INTERNAL;
+ }
+
+ sState = FLASH_STATE_IDLE;
+
+ nrf_sdh_resume();
+
+ return nrf5SdErrorToOtError(retval);
+}
+
+otError nrf5FlashPageErase(uint32_t aAddress)
+{
+ uint32_t retval;
+
+ nrf_sdh_suspend();
+
+ do
+ {
+ sState = FLASH_STATE_PENDING;
+
+ retval = sd_flash_page_erase(aAddress / FLASH_PAGE_SIZE);
+
+ if (retval == NRF_SUCCESS)
+ {
+ break;
+ }
+ else if (retval == NRF_ERROR_BUSY)
+ {
+ sState = FLASH_STATE_WAITING_FOR_IDLE;
+ }
+ else
+ {
+ assert(false);
+ }
+
+ waitInState(FLASH_STATE_WAITING_FOR_IDLE);
+
+ } while (retval == NRF_ERROR_BUSY);
+
+ waitInState(FLASH_STATE_PENDING);
+
+ if (sState != FLASH_STATE_COMPLETE_SUCCESS)
+ {
+ retval = NRF_ERROR_INTERNAL;
+ }
+
+ sState = FLASH_STATE_IDLE;
+
+ nrf_sdh_resume();
+
+ return nrf5SdErrorToOtError(retval);
+}
+
+bool nrf5FlashIsBusy(void)
+{
+ return sState != FLASH_STATE_IDLE;
+}
+
+uint32_t nrf5FlashWrite(uint32_t aAddress, const uint8_t *aData, uint32_t aSize)
+{
+ otError error = OT_ERROR_NONE;
+ uint32_t result = 0;
+ uint32_t remainder = (aAddress % sizeof(uint32_t));
+ uint32_t blockSize;
+ uint32_t blockValue;
+
+ otEXPECT(sState == FLASH_STATE_IDLE);
+
+ // Check if @p aAddress is aligned to full word size. If not, make additional
+ // flash write at the beginning.
+ if (remainder)
+ {
+ blockSize = MIN((sizeof(uint32_t) - remainder), aSize);
+ blockValue = 0xffffffff;
+
+ memcpy((uint8_t *)&blockValue + remainder, aData, blockSize);
+
+ error = sdFlashSingleWrite(aAddress - remainder, (uint8_t *)&blockValue, sizeof(blockValue) / sizeof(uint32_t));
+
+ otEXPECT(error == OT_ERROR_NONE);
+
+ aAddress += blockSize;
+ aData += blockSize;
+ aSize -= blockSize;
+ result += blockSize;
+ }
+
+ otEXPECT(aSize);
+
+ // Store the middle block of data.
+ remainder = aSize % sizeof(uint32_t);
+ blockSize = aSize - remainder;
+
+ error = sdFlashSingleWrite(aAddress, aData, blockSize / sizeof(uint32_t));
+
+ otEXPECT(error == OT_ERROR_NONE);
+
+ aAddress += blockSize;
+ aData += blockSize;
+ aSize -= blockSize;
+ result += blockSize;
+
+ // Store any additional bytes that didn't fit into middle block.
+ if (remainder)
+ {
+ blockValue = 0xffffffff;
+
+ memcpy((uint8_t *)&blockValue, aData, remainder);
+
+ error = sdFlashSingleWrite(aAddress, (uint8_t *)&blockValue, sizeof(blockValue) / sizeof(uint32_t));
+
+ otEXPECT(error == OT_ERROR_NONE);
+
+ result += remainder;
+ }
+
+exit:
+ return result;
+}
diff --git a/examples/platforms/nrf52840/logging.c b/examples/platforms/nrf528xx/src/logging.c
similarity index 100%
rename from examples/platforms/nrf52840/logging.c
rename to examples/platforms/nrf528xx/src/logging.c
diff --git a/examples/platforms/nrf528xx/src/misc.c b/examples/platforms/nrf528xx/src/misc.c
new file mode 100644
index 0000000..6858f2e
--- /dev/null
+++ b/examples/platforms/nrf528xx/src/misc.c
@@ -0,0 +1,129 @@
+/*
+ * Copyright (c) 2016, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <openthread-core-config.h>
+#include <openthread/config.h>
+#include <openthread/platform/misc.h>
+
+#include <nrf.h>
+
+#include "platform-nrf5.h"
+
+#if SOFTDEVICE_PRESENT
+#include "softdevice.h"
+#endif // SOFTDEVICE_PRESENT
+
+static uint32_t sResetReason;
+
+bool gPlatformPseudoResetWasRequested;
+
+#if NRF52840_XXAA
+__WEAK void nrf5CryptoInit(void)
+{
+ // This function is defined as weak so it could be overridden with external implementation.
+}
+
+__WEAK void nrf5CryptoDeinit(void)
+{
+ // This function is defined as weak so it could be overridden with external implementation.
+}
+#endif
+
+void nrf5MiscInit(void)
+{
+#if SOFTDEVICE_PRESENT
+ sd_power_reset_reason_get(&sResetReason);
+ sd_power_reset_reason_clr(0xFFFFFFFF);
+#else
+ sResetReason = NRF_POWER->RESETREAS;
+ NRF_POWER->RESETREAS = 0xFFFFFFFF;
+#endif // SOFTDEVICE_PRESENT
+}
+
+void nrf5MiscDeinit(void)
+{
+ // Intentionally empty.
+}
+
+void otPlatReset(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+#if OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
+ gPlatformPseudoResetWasRequested = true;
+ sResetReason = POWER_RESETREAS_SREQ_Msk;
+#else // if OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
+ NVIC_SystemReset();
+#endif // else OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
+}
+
+otPlatResetReason otPlatGetResetReason(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ otPlatResetReason reason;
+
+ if (sResetReason & POWER_RESETREAS_RESETPIN_Msk)
+ {
+ reason = OT_PLAT_RESET_REASON_EXTERNAL;
+ }
+ else if (sResetReason & POWER_RESETREAS_DOG_Msk)
+ {
+ reason = OT_PLAT_RESET_REASON_WATCHDOG;
+ }
+ else if (sResetReason & POWER_RESETREAS_SREQ_Msk)
+ {
+ reason = OT_PLAT_RESET_REASON_SOFTWARE;
+ }
+ else if (sResetReason & POWER_RESETREAS_LOCKUP_Msk)
+ {
+ reason = OT_PLAT_RESET_REASON_FAULT;
+ }
+ else if ((sResetReason & POWER_RESETREAS_OFF_Msk) || (sResetReason & POWER_RESETREAS_DIF_Msk))
+ {
+ reason = OT_PLAT_RESET_REASON_OTHER;
+ }
+#if NRF52840_XXAA
+ else if ((sResetReason & POWER_RESETREAS_LPCOMP_Msk) || (sResetReason & POWER_RESETREAS_NFC_Msk) ||
+ (sResetReason & POWER_RESETREAS_VBUS_Msk))
+ {
+ reason = OT_PLAT_RESET_REASON_OTHER;
+ }
+#endif // NRF52840_XXAA
+ else
+ {
+ reason = OT_PLAT_RESET_REASON_POWER_ON;
+ }
+
+ return reason;
+}
+
+void otPlatWakeHost(void)
+{
+ // TODO: implement an operation to wake the host from sleep state.
+}
diff --git a/examples/platforms/nrf528xx/src/platform-fem.h b/examples/platforms/nrf528xx/src/platform-fem.h
new file mode 100644
index 0000000..7a7cf44
--- /dev/null
+++ b/examples/platforms/nrf528xx/src/platform-fem.h
@@ -0,0 +1,159 @@
+/*
+ * Copyright (c) 2017, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file includes front end module platform-specific functions.
+ *
+ */
+
+#ifndef PLATFORM_FEM_H_
+#define PLATFORM_FEM_H_
+
+#include <stdint.h>
+
+// clang-format off
+
+/**
+ * @brief Configuration parameters for the Front End Module.
+ */
+#define PLATFORM_FEM_DEFAULT_PA_PIN 26 /**< Default Power Amplifier pin. */
+#define PLATFORM_FEM_DEFAULT_LNA_PIN 27 /**< Default Low Noise Amplifier pin. */
+#define PLATFORM_FEM_DEFAULT_PDN_PIN 28 /**< Default Power Down pin. */
+#define PLATFORM_FEM_DEFAULT_SET_PPI_CHANNEL 15 /**< Default PPI channel for pin setting. */
+#define PLATFORM_FEM_DEFAULT_CLR_PPI_CHANNEL 16 /**< Default PPI channel for pin clearing. */
+#define PLATFORM_FEM_DEFAULT_PDN_PPI_CHANNEL 14 /**< Default PPI channel for Power Down control. */
+#define PLATFORM_FEM_DEFAULT_TIMER_MATCH_PPI_GROUP 4 /**< Default PPI channel group used to disable timer match PPI. */
+#define PLATFORM_FEM_DEFAULT_RADIO_DISABLED_PPI_GROUP 5 /**< Default PPI channel group used to disable radio disabled PPI. */
+#define PLATFORM_FEM_DEFAULT_PA_GPIOTE_CHANNEL 6 /**< Default PA GPIOTE channel for FEM control. */
+#define PLATFORM_FEM_DEFAULT_LNA_GPIOTE_CHANNEL 7 /**< Default LNA GPIOTE channel for FEM control. */
+#define PLATFORM_FEM_DEFAULT_PDN_GPIOTE_CHANNEL 5 /**< Default PDN GPIOTE channel for FEM control. */
+
+/**
+ * @brief Configuration parameters for the Front End Module timings and gain.
+ */
+#define PLATFORM_FEM_PA_TIME_IN_ADVANCE_US 13 /**< Default time in microseconds when PA GPIO is activated before the radio is ready for transmission. */
+#define PLATFORM_FEM_LNA_TIME_IN_ADVANCE_US 13 /**< Default time in microseconds when LNA GPIO is activated before the radio is ready for reception. */
+#define PLATFORM_FEM_PDN_SETTLE_US 18 /**< Default the time between activating the PDN and asserting the RX_EN/TX_EN. */
+#define PLATFORM_FEM_TRX_HOLD_US 5 /**< Default the time between deasserting the RX_EN/TX_EN and deactivating PDN. */
+#define PLATFORM_FEM_PA_GAIN_DB 0 /**< Default PA gain. Ignored if the amplifier is not supporting this feature. */
+#define PLATFORM_FEM_LNA_GAIN_DB 0 /**< Default LNA gain. Ignored if the amplifier is not supporting this feature. */
+
+// clang-format on
+
+#define PLATFORM_FEM_DEFAULT_CONFIG \
+ ((PlatformFemConfigParams){ \
+ .mFemPhyCfg = \
+ { \
+ .mPaTimeGapUs = PLATFORM_FEM_PA_TIME_IN_ADVANCE_US, \
+ .mLnaTimeGapUs = PLATFORM_FEM_LNA_TIME_IN_ADVANCE_US, \
+ .mPdnSettleUs = PLATFORM_FEM_PDN_SETTLE_US, \
+ .mTrxHoldUs = PLATFORM_FEM_TRX_HOLD_US, \
+ .mPaGainDb = PLATFORM_FEM_PA_GAIN_DB, \
+ .mLnaGainDb = PLATFORM_FEM_LNA_GAIN_DB, \
+ }, \
+ .mPaCfg = \
+ { \
+ .mEnable = 1, \
+ .mActiveHigh = 1, \
+ .mGpioPin = PLATFORM_FEM_DEFAULT_PA_PIN, \
+ .mGpioteChId = PLATFORM_FEM_DEFAULT_PA_GPIOTE_CHANNEL, \
+ }, \
+ .mLnaCfg = \
+ { \
+ .mEnable = 1, \
+ .mActiveHigh = 1, \
+ .mGpioPin = PLATFORM_FEM_DEFAULT_LNA_PIN, \
+ .mGpioteChId = PLATFORM_FEM_DEFAULT_LNA_GPIOTE_CHANNEL, \
+ }, \
+ .mPdnCfg = \
+ { \
+ .mEnable = 1, \
+ .mActiveHigh = 1, \
+ .mGpioPin = PLATFORM_FEM_DEFAULT_PDN_PIN, \
+ .mGpioteChId = PLATFORM_FEM_DEFAULT_PDN_GPIOTE_CHANNEL, \
+ }, \
+ .mPpiChIdClr = PLATFORM_FEM_DEFAULT_CLR_PPI_CHANNEL, \
+ .mPpiChIdSet = PLATFORM_FEM_DEFAULT_SET_PPI_CHANNEL, \
+ .mPpiChIdPdn = PLATFORM_FEM_DEFAULT_PDN_PPI_CHANNEL, \
+ })
+
+/**
+ * @brief Configuration parameters for FEM PHY.
+ */
+typedef struct
+{
+ uint32_t mPaTimeGapUs;
+ uint32_t mLnaTimeGapUs;
+ uint32_t mPdnSettleUs;
+ uint32_t mTrxHoldUs;
+ uint8_t mPaGainDb;
+ uint8_t mLnaGainDb;
+} PlatformFemPhyConfig;
+
+/**
+ * @brief Configuration parameters for the PA and LNA.
+ */
+typedef struct
+{
+ uint8_t mEnable : 1; /**< Enable toggling for this amplifier */
+ uint8_t mActiveHigh : 1; /**< Set the pin to be active high */
+ uint8_t mGpioPin : 6; /**< The GPIO pin to toggle for this amplifier */
+ uint8_t mGpioteChId; /**< The GPIOTE Channel ID used for toggling pins */
+} PlatformFemPinConfig;
+
+/**
+ * @brief PA & LNA GPIO toggle configuration
+ *
+ * This option configures the nRF 802.15.4 radio driver to toggle pins when the radio
+ * is active for use with a power amplifier and/or a low noise amplifier.
+ *
+ * Toggling the pins is achieved by using two PPI channels and a GPIOTE channel. The hardware channel IDs are provided
+ * by the application and should be regarded as reserved as long as any PA/LNA toggling is enabled.
+ *
+ * @note Changing this configuration while the radio is in use may have undefined
+ * consequences and must be avoided by the application.
+ */
+typedef struct
+{
+ PlatformFemPhyConfig mFemPhyCfg; /**< Front End Module Physical layer configuration */
+ PlatformFemPinConfig mPaCfg; /**< Power Amplifier configuration */
+ PlatformFemPinConfig mLnaCfg; /**< Low Noise Amplifier configuration */
+ PlatformFemPinConfig mPdnCfg; /**< Power Down configuration */
+ uint8_t mPpiChIdSet; /**< PPI channel to be used for setting pins */
+ uint8_t mPpiChIdClr; /**< PPI channel to be used for clearing pins */
+ uint8_t mPpiChIdPdn; /**< PPI channel to handle PDN pin */
+} PlatformFemConfigParams;
+
+/**
+ * Function used to set parameters of FEM.
+ *
+ */
+void PlatformFemSetConfigParams(const PlatformFemConfigParams *aConfig);
+
+#endif // PLATFORM_FEM_H_
diff --git a/examples/platforms/nrf528xx/src/platform-nrf5.h b/examples/platforms/nrf528xx/src/platform-nrf5.h
new file mode 100644
index 0000000..4f4e3f7
--- /dev/null
+++ b/examples/platforms/nrf528xx/src/platform-nrf5.h
@@ -0,0 +1,245 @@
+/*
+ * Copyright (c) 2016, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file includes the platform-specific initializers.
+ *
+ */
+
+#ifndef PLATFORM_NRF5_H_
+#define PLATFORM_NRF5_H_
+
+#include <stdint.h>
+
+#include <openthread/instance.h>
+
+#include "platform-config.h"
+
+/**
+ * Initialization of UART driver.
+ *
+ */
+void nrf5UartInit(void);
+
+/**
+ * Deinitialization of UART driver.
+ *
+ */
+void nrf5UartDeinit(void);
+
+/**
+ * Clear pending UART data.
+ *
+ */
+void nrf5UartClearPendingData(void);
+
+/**
+ * This function performs UART driver processing.
+ *
+ */
+void nrf5UartProcess(void);
+
+/**
+ * Initialization of Alarm driver.
+ *
+ */
+void nrf5AlarmInit(void);
+
+/**
+ * Deinitialization of Alarm driver.
+ *
+ */
+void nrf5AlarmDeinit(void);
+
+/**
+ * Function for processing Alarm.
+ *
+ */
+void nrf5AlarmProcess(otInstance *aInstance);
+
+/**
+ * Function for geting current time in mircosecond.
+ *
+ */
+uint64_t nrf5AlarmGetCurrentTime(void);
+
+/**
+ * Function for getting raw counter value in RTC ticks.
+ *
+ */
+uint64_t nrf5AlarmGetRawCounter(void);
+
+/**
+ * Initialization of Random Number Generator.
+ *
+ */
+void nrf5RandomInit(void);
+
+/**
+ * Deinitialization of Random Number Generator.
+ *
+ */
+void nrf5RandomDeinit(void);
+
+/**
+ * Initialization of Logger driver.
+ *
+ */
+void nrf5LogInit(void);
+
+/**
+ * Deinitialization of Logger driver.
+ *
+ */
+void nrf5LogDeinit(void);
+
+/**
+ * Initialization of SPI Slave driver.
+ *
+ */
+void nrf5SpiSlaveInit(void);
+
+/**
+ * Deinitialization of SPI Slave driver.
+ *
+ */
+void nrf5SpiSlaveDeinit(void);
+
+/**
+ * Function for processing SPI Slave driver.
+ */
+void nrf5SpiSlaveProcess(void);
+
+/**
+ * Initialization of Misc module.
+ *
+ */
+void nrf5MiscInit(void);
+
+/**
+ * Deinitialization of Misc module.
+ *
+ */
+void nrf5MiscDeinit(void);
+
+/**
+ * Initialization of Radio driver.
+ *
+ */
+void nrf5RadioInit(void);
+
+/**
+ * Deinitialization of Radio driver.
+ *
+ */
+void nrf5RadioDeinit(void);
+
+/**
+ * Function for processing Radio.
+ *
+ */
+void nrf5RadioProcess(otInstance *aInstance);
+
+/**
+ * Function for clearing Radio driver pending events.
+ *
+ */
+void nrf5RadioClearPendingEvents(void);
+
+/**
+ * Initialization of hardware crypto engine.
+ *
+ */
+void nrf5CryptoInit(void);
+
+/**
+ * Deinitialization of hardware crypto engine.
+ *
+ */
+void nrf5CryptoDeinit(void);
+
+/**
+ * Function for erasing page in flash.
+ *
+ */
+otError nrf5FlashPageErase(uint32_t aAddress);
+
+/**
+ * Function for checking state of flash driver.
+ *
+ */
+bool nrf5FlashIsBusy(void);
+
+/**
+ * Function for writing data into flash.
+ *
+ */
+uint32_t nrf5FlashWrite(uint32_t aAddress, const uint8_t *aData, uint32_t aSize);
+
+/**
+ * Initialization of temperature controller.
+ *
+ */
+void nrf5TempInit(void);
+
+/**
+ * Deinitialization of temperature controller.
+ *
+ */
+void nrf5TempDeinit(void);
+
+/**
+ * Function for processing temperature controller.
+ *
+ */
+void nrf5TempProcess(void);
+
+/**
+ * Function for measuring internal temperature.
+ *
+ * @return Temperature value measured.
+ *
+ */
+int32_t nrf5TempGet(void);
+
+#if SOFTDEVICE_PRESENT
+/**
+ * Function for translating SoftDevice error into OpenThread's one.
+ *
+ */
+otError nrf5SdErrorToOtError(uint32_t aSdError);
+
+/**
+ * Function for processing SoftDevice SoC events in flash module.
+ *
+ */
+void nrf5SdSocFlashProcess(uint32_t aEvtId);
+#endif // SOFTDEVICE_PRESENT
+
+#endif // PLATFORM_NRF5_H_
diff --git a/examples/platforms/nrf528xx/src/platform-softdevice.h b/examples/platforms/nrf528xx/src/platform-softdevice.h
new file mode 100644
index 0000000..ba7429f
--- /dev/null
+++ b/examples/platforms/nrf528xx/src/platform-softdevice.h
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2017, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file includes the SoftDevice platform-specific functions.
+ *
+ */
+
+#ifndef PLATFORM_SOFTDEVICE_H_
+#define PLATFORM_SOFTDEVICE_H_
+
+#include <stdint.h>
+
+/** @brief RAAL Softdevice default parameters. */
+#define PLATFORM_SOFTDEVICE_RAAL_TIMESLOT_DEFAULT_LENGTH 6400
+#define PLATFORM_SOFTDEVICE_RAAL_TIMESLOT_DEFAULT_ALLOC_ITERS 5
+#define PLATFORM_SOFTDEVICE_RAAL_TIMESLOT_DEFAULT_SAFE_MARGIN 126
+#define PLATFORM_SOFTDEVICE_RAAL_TIMESLOT_DEFAULT_TIMEOUT 6400
+#define PLATFORM_SOFTDEVICE_RAAL_TIMESLOT_DEFAULT_MAX_LENGTH 120000000
+#define PLATFORM_SOFTDEVICE_RAAL_DEFAULT_LF_CLK_ACCURACY_PPM 500
+
+/** @brief RAAL Softdevice configuration parameters. */
+typedef struct
+{
+ uint32_t timeslotLength; /**< Timeslot length requested by the module in microseconds. */
+ uint32_t
+ timeslotTimeout; /**< Longest acceptable delay until the start of the requested timeslot in microseconds. */
+ uint32_t timeslotMaxLength; /**< Maximum single timeslot length created by extension processing in microseconds. */
+ uint16_t timeslotAllocIters; /**< Maximum number of iteration of dividing timeslot_length by factor of 2 performed
+ by arbiter. */
+ uint16_t timeslotSafeMargin; /**< Safe margin before timeslot is finished and nrf_raal_timeslot_ended should be
+ called in microseconds. */
+ uint16_t lfClkAccuracyPpm; /**< Clock accuracy in ppm unit. */
+} otSysSoftdeviceRaalConfigParams;
+
+/**
+ * Function for processing SoftDevice SoC events.
+ *
+ */
+void otSysSoftdeviceSocEvtHandler(uint32_t aEvtId);
+
+/**
+ * Function used to set non-default parameters of Softdevice RAAL.
+ *
+ */
+void otSysSoftdeviceRaalConfig(const otSysSoftdeviceRaalConfigParams *aConfig);
+
+#endif // PLATFORM_SOFTDEVICE_H_
diff --git a/examples/platforms/nrf528xx/src/radio.c b/examples/platforms/nrf528xx/src/radio.c
new file mode 100644
index 0000000..d97aaab
--- /dev/null
+++ b/examples/platforms/nrf528xx/src/radio.c
@@ -0,0 +1,964 @@
+/*
+ * Copyright (c) 2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file implements the OpenThread platform abstraction for radio communication.
+ *
+ */
+
+#include <openthread-core-config.h>
+#include <openthread/config.h>
+
+#include <assert.h>
+#include <stdbool.h>
+#include <stddef.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "utils/code_utils.h"
+#include "utils/mac_frame.h"
+
+#include <platform-config.h>
+#include <openthread/platform/alarm-micro.h>
+#include <openthread/platform/diag.h>
+#include <openthread/platform/logging.h>
+#include <openthread/platform/radio.h>
+#include <openthread/platform/time.h>
+
+#include "openthread-system.h"
+#include "platform-nrf5.h"
+
+#include <nrf.h>
+#include <nrf_802154.h>
+
+#include <openthread-core-config.h>
+#include <openthread/config.h>
+#include <openthread/random_noncrypto.h>
+
+// clang-format off
+
+#define SHORT_ADDRESS_SIZE 2 ///< Size of MAC short address.
+#define US_PER_MS 1000ULL ///< Microseconds in millisecond.
+
+#define ACK_REQUEST_OFFSET 1 ///< Byte containing Ack request bit (+1 for frame length byte).
+#define ACK_REQUEST_BIT (1 << 5) ///< Ack request bit.
+#define FRAME_PENDING_OFFSET 1 ///< Byte containing pending bit (+1 for frame length byte).
+#define FRAME_PENDING_BIT (1 << 4) ///< Frame Pending bit.
+
+#if defined(__ICCARM__)
+_Pragma("diag_suppress=Pe167")
+#endif
+
+enum
+{
+ NRF528XX_RECEIVE_SENSITIVITY = -100, // dBm
+ NRF528XX_MIN_CCA_ED_THRESHOLD = -94, // dBm
+};
+
+// clang-format on
+
+static bool sDisabled;
+
+static otError sReceiveError = OT_ERROR_NONE;
+static otRadioFrame sReceivedFrames[NRF_802154_RX_BUFFERS];
+static otRadioFrame sTransmitFrame;
+static uint8_t sTransmitPsdu[OT_RADIO_FRAME_MAX_SIZE + 1];
+
+#if OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
+static otExtAddress sExtAddress;
+static otRadioIeInfo sTransmitIeInfo;
+static otInstance * sInstance = NULL;
+#endif
+
+static otRadioFrame sAckFrame;
+static bool sAckedWithFramePending;
+
+static int8_t sDefaultTxPower;
+
+static uint32_t sEnergyDetectionTime;
+static uint8_t sEnergyDetectionChannel;
+static int8_t sEnergyDetected;
+
+typedef enum
+{
+ kPendingEventSleep, // Requested to enter Sleep state.
+ kPendingEventFrameTransmitted, // Transmitted frame and received ACK (if requested).
+ kPendingEventChannelAccessFailure, // Failed to transmit frame (channel busy).
+ kPendingEventInvalidOrNoAck, // Failed to transmit frame (received invalid or no ACK).
+ kPendingEventReceiveFailed, // Failed to receive a valid frame.
+ kPendingEventEnergyDetectionStart, // Requested to start Energy Detection procedure.
+ kPendingEventEnergyDetected, // Energy Detection finished.
+} RadioPendingEvents;
+
+static uint32_t sPendingEvents;
+
+static void dataInit(void)
+{
+ sDisabled = true;
+
+ sTransmitFrame.mPsdu = sTransmitPsdu + 1;
+#if OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
+ sTransmitFrame.mInfo.mTxInfo.mIeInfo = &sTransmitIeInfo;
+#endif
+
+ sReceiveError = OT_ERROR_NONE;
+
+ for (uint32_t i = 0; i < NRF_802154_RX_BUFFERS; i++)
+ {
+ sReceivedFrames[i].mPsdu = NULL;
+ }
+
+ memset(&sAckFrame, 0, sizeof(sAckFrame));
+}
+
+static void convertShortAddress(uint8_t *aTo, uint16_t aFrom)
+{
+ aTo[0] = (uint8_t)aFrom;
+ aTo[1] = (uint8_t)(aFrom >> 8);
+}
+
+static inline bool isPendingEventSet(RadioPendingEvents aEvent)
+{
+ return sPendingEvents & (1UL << aEvent);
+}
+
+static void setPendingEvent(RadioPendingEvents aEvent)
+{
+ volatile uint32_t pendingEvents;
+ uint32_t bitToSet = 1UL << aEvent;
+
+ do
+ {
+ pendingEvents = __LDREXW((uint32_t *)&sPendingEvents);
+ pendingEvents |= bitToSet;
+ } while (__STREXW(pendingEvents, (uint32_t *)&sPendingEvents));
+
+ otSysEventSignalPending();
+}
+
+static void resetPendingEvent(RadioPendingEvents aEvent)
+{
+ volatile uint32_t pendingEvents;
+ uint32_t bitsToRemain = ~(1UL << aEvent);
+
+ do
+ {
+ pendingEvents = __LDREXW((uint32_t *)&sPendingEvents);
+ pendingEvents &= bitsToRemain;
+ } while (__STREXW(pendingEvents, (uint32_t *)&sPendingEvents));
+}
+
+static inline void clearPendingEvents(void)
+{
+ // Clear pending events that could cause race in the MAC layer.
+ volatile uint32_t pendingEvents;
+ uint32_t bitsToRemain = ~(0UL);
+
+ bitsToRemain &= ~(1UL << kPendingEventSleep);
+
+ do
+ {
+ pendingEvents = __LDREXW((uint32_t *)&sPendingEvents);
+ pendingEvents &= bitsToRemain;
+ } while (__STREXW(pendingEvents, (uint32_t *)&sPendingEvents));
+}
+
+#if !OPENTHREAD_CONFIG_ENABLE_PLATFORM_EUI64_CUSTOM_SOURCE
+void otPlatRadioGetIeeeEui64(otInstance *aInstance, uint8_t *aIeeeEui64)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ uint64_t factoryAddress;
+ uint32_t index = 0;
+
+ // Set the MAC Address Block Larger (MA-L) formerly called OUI.
+ aIeeeEui64[index++] = (OPENTHREAD_CONFIG_STACK_VENDOR_OUI >> 16) & 0xff;
+ aIeeeEui64[index++] = (OPENTHREAD_CONFIG_STACK_VENDOR_OUI >> 8) & 0xff;
+ aIeeeEui64[index++] = OPENTHREAD_CONFIG_STACK_VENDOR_OUI & 0xff;
+
+ // Use device identifier assigned during the production.
+ factoryAddress = (uint64_t)NRF_FICR->DEVICEID[0] << 32;
+ factoryAddress |= NRF_FICR->DEVICEID[1];
+ memcpy(aIeeeEui64 + index, &factoryAddress, sizeof(factoryAddress) - index);
+}
+#endif // OPENTHREAD_CONFIG_ENABLE_PLATFORM_EUI64_CUSTOM_SOURCE
+
+void otPlatRadioSetPanId(otInstance *aInstance, uint16_t aPanId)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ uint8_t address[SHORT_ADDRESS_SIZE];
+ convertShortAddress(address, aPanId);
+
+ nrf_802154_pan_id_set(address);
+}
+
+void otPlatRadioSetExtendedAddress(otInstance *aInstance, const otExtAddress *aExtAddress)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+#if OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
+ for (size_t i = 0; i < sizeof(*aExtAddress); i++)
+ {
+ sExtAddress.m8[i] = aExtAddress->m8[sizeof(*aExtAddress) - 1 - i];
+ }
+#endif
+ nrf_802154_extended_address_set(aExtAddress->m8);
+}
+
+void otPlatRadioSetShortAddress(otInstance *aInstance, uint16_t aShortAddress)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ uint8_t address[SHORT_ADDRESS_SIZE];
+ convertShortAddress(address, aShortAddress);
+
+ nrf_802154_short_address_set(address);
+}
+
+void nrf5RadioInit(void)
+{
+ dataInit();
+ nrf_802154_init();
+}
+
+void nrf5RadioDeinit(void)
+{
+ nrf_802154_sleep();
+ nrf_802154_deinit();
+ sPendingEvents = 0;
+}
+
+void nrf5RadioClearPendingEvents(void)
+{
+ sPendingEvents = 0;
+
+ for (uint32_t i = 0; i < NRF_802154_RX_BUFFERS; i++)
+ {
+ if (sReceivedFrames[i].mPsdu != NULL)
+ {
+ uint8_t *bufferAddress = &sReceivedFrames[i].mPsdu[-1];
+ sReceivedFrames[i].mPsdu = NULL;
+ nrf_802154_buffer_free_raw(bufferAddress);
+ }
+ }
+}
+
+otRadioState otPlatRadioGetState(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ if (sDisabled)
+ {
+ return OT_RADIO_STATE_DISABLED;
+ }
+
+ switch (nrf_802154_state_get())
+ {
+ case NRF_802154_STATE_SLEEP:
+ return OT_RADIO_STATE_SLEEP;
+
+ case NRF_802154_STATE_RECEIVE:
+ case NRF_802154_STATE_ENERGY_DETECTION:
+ return OT_RADIO_STATE_RECEIVE;
+
+ case NRF_802154_STATE_TRANSMIT:
+ case NRF_802154_STATE_CCA:
+ case NRF_802154_STATE_CONTINUOUS_CARRIER:
+ return OT_RADIO_STATE_TRANSMIT;
+
+ default:
+ assert(false); // Make sure driver returned valid state.
+ }
+
+ return OT_RADIO_STATE_RECEIVE; // It is the default state. Return it in case of unknown.
+}
+
+bool otPlatRadioIsEnabled(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ return !sDisabled;
+}
+
+otError otPlatRadioEnable(otInstance *aInstance)
+{
+ otError error;
+
+#if !OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
+ OT_UNUSED_VARIABLE(aInstance);
+#else
+ sInstance = aInstance;
+#endif
+
+ if (sDisabled)
+ {
+ sDisabled = false;
+ error = OT_ERROR_NONE;
+ }
+ else
+ {
+ error = OT_ERROR_INVALID_STATE;
+ }
+
+ return error;
+}
+
+otError otPlatRadioDisable(otInstance *aInstance)
+{
+ otError error = OT_ERROR_NONE;
+
+ otEXPECT(otPlatRadioIsEnabled(aInstance));
+ otEXPECT_ACTION(otPlatRadioGetState(aInstance) == OT_RADIO_STATE_SLEEP || isPendingEventSet(kPendingEventSleep),
+ error = OT_ERROR_INVALID_STATE);
+
+ sDisabled = true;
+
+exit:
+ return error;
+}
+
+otError otPlatRadioSleep(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ if (nrf_802154_sleep())
+ {
+ clearPendingEvents();
+ }
+ else
+ {
+ clearPendingEvents();
+ setPendingEvent(kPendingEventSleep);
+ }
+
+ return OT_ERROR_NONE;
+}
+
+otError otPlatRadioReceive(otInstance *aInstance, uint8_t aChannel)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ bool result;
+
+ nrf_802154_channel_set(aChannel);
+ nrf_802154_tx_power_set(sDefaultTxPower);
+ result = nrf_802154_receive();
+ clearPendingEvents();
+
+ return result ? OT_ERROR_NONE : OT_ERROR_INVALID_STATE;
+}
+
+otError otPlatRadioTransmit(otInstance *aInstance, otRadioFrame *aFrame)
+{
+ bool result = true;
+
+ aFrame->mPsdu[-1] = aFrame->mLength;
+
+ nrf_802154_channel_set(aFrame->mChannel);
+
+ if (aFrame->mInfo.mTxInfo.mCsmaCaEnabled)
+ {
+ nrf_802154_transmit_csma_ca_raw(&aFrame->mPsdu[-1]);
+ }
+ else
+ {
+ result = nrf_802154_transmit_raw(&aFrame->mPsdu[-1], false);
+ }
+
+ clearPendingEvents();
+ otPlatRadioTxStarted(aInstance, aFrame);
+
+ if (!result)
+ {
+ setPendingEvent(kPendingEventChannelAccessFailure);
+ }
+
+ return OT_ERROR_NONE;
+}
+
+otRadioFrame *otPlatRadioGetTransmitBuffer(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ return &sTransmitFrame;
+}
+
+int8_t otPlatRadioGetRssi(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ return nrf_802154_rssi_last_get();
+}
+
+otRadioCaps otPlatRadioGetCaps(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ return (otRadioCaps)(OT_RADIO_CAPS_ENERGY_SCAN | OT_RADIO_CAPS_ACK_TIMEOUT | OT_RADIO_CAPS_CSMA_BACKOFF);
+}
+
+bool otPlatRadioGetPromiscuous(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ return nrf_802154_promiscuous_get();
+}
+
+void otPlatRadioSetPromiscuous(otInstance *aInstance, bool aEnable)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ nrf_802154_promiscuous_set(aEnable);
+}
+
+void otPlatRadioEnableSrcMatch(otInstance *aInstance, bool aEnable)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ nrf_802154_auto_pending_bit_set(aEnable);
+}
+
+otError otPlatRadioAddSrcMatchShortEntry(otInstance *aInstance, const uint16_t aShortAddress)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ otError error;
+
+ uint8_t shortAddress[SHORT_ADDRESS_SIZE];
+ convertShortAddress(shortAddress, aShortAddress);
+
+ if (nrf_802154_pending_bit_for_addr_set(shortAddress, false))
+ {
+ error = OT_ERROR_NONE;
+ }
+ else
+ {
+ error = OT_ERROR_NO_BUFS;
+ }
+
+ return error;
+}
+
+otError otPlatRadioAddSrcMatchExtEntry(otInstance *aInstance, const otExtAddress *aExtAddress)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ otError error;
+
+ if (nrf_802154_pending_bit_for_addr_set(aExtAddress->m8, true))
+ {
+ error = OT_ERROR_NONE;
+ }
+ else
+ {
+ error = OT_ERROR_NO_BUFS;
+ }
+
+ return error;
+}
+
+otError otPlatRadioClearSrcMatchShortEntry(otInstance *aInstance, const uint16_t aShortAddress)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ otError error;
+
+ uint8_t shortAddress[SHORT_ADDRESS_SIZE];
+ convertShortAddress(shortAddress, aShortAddress);
+
+ if (nrf_802154_pending_bit_for_addr_clear(shortAddress, false))
+ {
+ error = OT_ERROR_NONE;
+ }
+ else
+ {
+ error = OT_ERROR_NO_ADDRESS;
+ }
+
+ return error;
+}
+
+otError otPlatRadioClearSrcMatchExtEntry(otInstance *aInstance, const otExtAddress *aExtAddress)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ otError error;
+
+ if (nrf_802154_pending_bit_for_addr_clear(aExtAddress->m8, true))
+ {
+ error = OT_ERROR_NONE;
+ }
+ else
+ {
+ error = OT_ERROR_NO_ADDRESS;
+ }
+
+ return error;
+}
+
+void otPlatRadioClearSrcMatchShortEntries(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ nrf_802154_pending_bit_for_addr_reset(false);
+}
+
+void otPlatRadioClearSrcMatchExtEntries(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ nrf_802154_pending_bit_for_addr_reset(true);
+}
+
+otError otPlatRadioEnergyScan(otInstance *aInstance, uint8_t aScanChannel, uint16_t aScanDuration)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ sEnergyDetectionTime = (uint32_t)aScanDuration * 1000UL;
+ sEnergyDetectionChannel = aScanChannel;
+
+ clearPendingEvents();
+
+ nrf_802154_channel_set(aScanChannel);
+
+ if (nrf_802154_energy_detection(sEnergyDetectionTime))
+ {
+ resetPendingEvent(kPendingEventEnergyDetectionStart);
+ }
+ else
+ {
+ setPendingEvent(kPendingEventEnergyDetectionStart);
+ }
+
+ return OT_ERROR_NONE;
+}
+
+otError otPlatRadioGetTransmitPower(otInstance *aInstance, int8_t *aPower)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ otError error = OT_ERROR_NONE;
+
+ if (aPower == NULL)
+ {
+ error = OT_ERROR_INVALID_ARGS;
+ }
+ else
+ {
+ *aPower = nrf_802154_tx_power_get();
+ }
+
+ return error;
+}
+
+otError otPlatRadioSetTransmitPower(otInstance *aInstance, int8_t aPower)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ sDefaultTxPower = aPower;
+ nrf_802154_tx_power_set(aPower);
+
+ return OT_ERROR_NONE;
+}
+
+otError otPlatRadioGetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t *aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ otError error = OT_ERROR_NONE;
+ nrf_802154_cca_cfg_t ccaConfig;
+
+ if (aThreshold == NULL)
+ {
+ error = OT_ERROR_INVALID_ARGS;
+ }
+ else
+ {
+ nrf_802154_cca_cfg_get(&ccaConfig);
+ // The radio driver has no function to convert ED threshold to dBm
+ *aThreshold = (int8_t)ccaConfig.ed_threshold + NRF528XX_MIN_CCA_ED_THRESHOLD;
+ }
+
+ return error;
+}
+
+otError otPlatRadioSetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ otError error = OT_ERROR_NONE;
+ nrf_802154_cca_cfg_t ccaConfig;
+
+ // The minimum value of ED threshold for radio driver is -94 dBm
+ if (aThreshold < NRF528XX_MIN_CCA_ED_THRESHOLD)
+ {
+ error = OT_ERROR_INVALID_ARGS;
+ }
+ else
+ {
+ memset(&ccaConfig, 0, sizeof(ccaConfig));
+ ccaConfig.mode = NRF_RADIO_CCA_MODE_ED;
+ ccaConfig.ed_threshold = nrf_802154_ccaedthres_from_dbm_calculate(aThreshold);
+
+ nrf_802154_cca_cfg_set(&ccaConfig);
+ }
+
+ return error;
+}
+
+void nrf5RadioProcess(otInstance *aInstance)
+{
+ bool isEventPending = false;
+
+ for (uint32_t i = 0; i < NRF_802154_RX_BUFFERS; i++)
+ {
+ if (sReceivedFrames[i].mPsdu != NULL)
+ {
+#if OPENTHREAD_CONFIG_DIAG_ENABLE
+
+ if (otPlatDiagModeGet())
+ {
+ otPlatDiagRadioReceiveDone(aInstance, &sReceivedFrames[i], OT_ERROR_NONE);
+ }
+ else
+#endif
+ {
+ otPlatRadioReceiveDone(aInstance, &sReceivedFrames[i], OT_ERROR_NONE);
+ }
+
+ uint8_t *bufferAddress = &sReceivedFrames[i].mPsdu[-1];
+ sReceivedFrames[i].mPsdu = NULL;
+ nrf_802154_buffer_free_raw(bufferAddress);
+ }
+ }
+
+ if (isPendingEventSet(kPendingEventFrameTransmitted))
+ {
+ resetPendingEvent(kPendingEventFrameTransmitted);
+
+#if OPENTHREAD_CONFIG_DIAG_ENABLE
+
+ if (otPlatDiagModeGet())
+ {
+ otPlatDiagRadioTransmitDone(aInstance, &sTransmitFrame, OT_ERROR_NONE);
+ }
+ else
+#endif
+ {
+ otRadioFrame *ackPtr = (sAckFrame.mPsdu == NULL) ? NULL : &sAckFrame;
+ otPlatRadioTxDone(aInstance, &sTransmitFrame, ackPtr, OT_ERROR_NONE);
+ }
+
+ if (sAckFrame.mPsdu != NULL)
+ {
+ nrf_802154_buffer_free_raw(sAckFrame.mPsdu - 1);
+ sAckFrame.mPsdu = NULL;
+ }
+ }
+
+ if (isPendingEventSet(kPendingEventChannelAccessFailure))
+ {
+ resetPendingEvent(kPendingEventChannelAccessFailure);
+
+#if OPENTHREAD_CONFIG_DIAG_ENABLE
+
+ if (otPlatDiagModeGet())
+ {
+ otPlatDiagRadioTransmitDone(aInstance, &sTransmitFrame, OT_ERROR_CHANNEL_ACCESS_FAILURE);
+ }
+ else
+#endif
+ {
+ otPlatRadioTxDone(aInstance, &sTransmitFrame, NULL, OT_ERROR_CHANNEL_ACCESS_FAILURE);
+ }
+ }
+
+ if (isPendingEventSet(kPendingEventInvalidOrNoAck))
+ {
+ resetPendingEvent(kPendingEventInvalidOrNoAck);
+
+#if OPENTHREAD_CONFIG_DIAG_ENABLE
+
+ if (otPlatDiagModeGet())
+ {
+ otPlatDiagRadioTransmitDone(aInstance, &sTransmitFrame, OT_ERROR_NO_ACK);
+ }
+ else
+#endif
+ {
+ otPlatRadioTxDone(aInstance, &sTransmitFrame, NULL, OT_ERROR_NO_ACK);
+ }
+ }
+
+ if (isPendingEventSet(kPendingEventReceiveFailed))
+ {
+ resetPendingEvent(kPendingEventReceiveFailed);
+
+#if OPENTHREAD_CONFIG_DIAG_ENABLE
+
+ if (otPlatDiagModeGet())
+ {
+ otPlatDiagRadioReceiveDone(aInstance, NULL, sReceiveError);
+ }
+ else
+#endif
+ {
+ otPlatRadioReceiveDone(aInstance, NULL, sReceiveError);
+ }
+ }
+
+ if (isPendingEventSet(kPendingEventEnergyDetected))
+ {
+ resetPendingEvent(kPendingEventEnergyDetected);
+
+ otPlatRadioEnergyScanDone(aInstance, sEnergyDetected);
+ }
+
+ if (isPendingEventSet(kPendingEventSleep))
+ {
+ if (nrf_802154_sleep())
+ {
+ resetPendingEvent(kPendingEventSleep);
+ }
+ else
+ {
+ isEventPending = true;
+ }
+ }
+
+ if (isPendingEventSet(kPendingEventEnergyDetectionStart))
+ {
+ nrf_802154_channel_set(sEnergyDetectionChannel);
+
+ if (nrf_802154_energy_detection(sEnergyDetectionTime))
+ {
+ resetPendingEvent(kPendingEventEnergyDetectionStart);
+ }
+ else
+ {
+ isEventPending = true;
+ }
+ }
+
+ if (isEventPending)
+ {
+ otSysEventSignalPending();
+ }
+}
+
+void nrf_802154_received_timestamp_raw(uint8_t *p_data, int8_t power, uint8_t lqi, uint32_t time)
+{
+ otRadioFrame *receivedFrame = NULL;
+
+ for (uint32_t i = 0; i < NRF_802154_RX_BUFFERS; i++)
+ {
+ if (sReceivedFrames[i].mPsdu == NULL)
+ {
+ receivedFrame = &sReceivedFrames[i];
+
+ memset(receivedFrame, 0, sizeof(*receivedFrame));
+ break;
+ }
+ }
+
+ assert(receivedFrame != NULL);
+
+ receivedFrame->mPsdu = &p_data[1];
+ receivedFrame->mLength = p_data[0];
+ receivedFrame->mInfo.mRxInfo.mRssi = power;
+ receivedFrame->mInfo.mRxInfo.mLqi = lqi;
+ receivedFrame->mChannel = nrf_802154_channel_get();
+
+ // Inform if this frame was acknowledged with frame pending set.
+ if (p_data[ACK_REQUEST_OFFSET] & ACK_REQUEST_BIT)
+ {
+ receivedFrame->mInfo.mRxInfo.mAckedWithFramePending = sAckedWithFramePending;
+ }
+ else
+ {
+ receivedFrame->mInfo.mRxInfo.mAckedWithFramePending = false;
+ }
+
+ // Get the timestamp when the SFD was received.
+#if !NRF_802154_TX_STARTED_NOTIFY_ENABLED
+#error "NRF_802154_TX_STARTED_NOTIFY_ENABLED is required!"
+#endif
+ uint32_t offset =
+ (int32_t)otPlatAlarmMicroGetNow() - (int32_t)nrf_802154_first_symbol_timestamp_get(time, p_data[0]);
+ receivedFrame->mInfo.mRxInfo.mTimestamp = nrf5AlarmGetCurrentTime() - offset;
+
+ sAckedWithFramePending = false;
+
+ otSysEventSignalPending();
+}
+
+void nrf_802154_receive_failed(nrf_802154_rx_error_t error)
+{
+ switch (error)
+ {
+ case NRF_802154_RX_ERROR_INVALID_FRAME:
+ case NRF_802154_RX_ERROR_DELAYED_TIMEOUT:
+ sReceiveError = OT_ERROR_NO_FRAME_RECEIVED;
+ break;
+
+ case NRF_802154_RX_ERROR_INVALID_FCS:
+ sReceiveError = OT_ERROR_FCS;
+ break;
+
+ case NRF_802154_RX_ERROR_INVALID_DEST_ADDR:
+ sReceiveError = OT_ERROR_DESTINATION_ADDRESS_FILTERED;
+ break;
+
+ case NRF_802154_RX_ERROR_RUNTIME:
+ case NRF_802154_RX_ERROR_TIMESLOT_ENDED:
+ case NRF_802154_RX_ERROR_ABORTED:
+ case NRF_802154_RX_ERROR_DELAYED_TIMESLOT_DENIED:
+ case NRF_802154_RX_ERROR_INVALID_LENGTH:
+ sReceiveError = OT_ERROR_FAILED;
+ break;
+
+ default:
+ assert(false);
+ }
+
+ sAckedWithFramePending = false;
+
+ setPendingEvent(kPendingEventReceiveFailed);
+}
+
+void nrf_802154_tx_ack_started(const uint8_t *p_data)
+{
+ // Check if the frame pending bit is set in ACK frame.
+ sAckedWithFramePending = p_data[FRAME_PENDING_OFFSET] & FRAME_PENDING_BIT;
+}
+
+void nrf_802154_transmitted_raw(const uint8_t *aFrame, uint8_t *aAckPsdu, int8_t aPower, uint8_t aLqi)
+{
+ assert(aFrame == sTransmitPsdu);
+
+ if (aAckPsdu == NULL)
+ {
+ sAckFrame.mPsdu = NULL;
+ }
+ else
+ {
+ sAckFrame.mPsdu = &aAckPsdu[1];
+ sAckFrame.mLength = aAckPsdu[0];
+ sAckFrame.mInfo.mRxInfo.mRssi = aPower;
+ sAckFrame.mInfo.mRxInfo.mLqi = aLqi;
+ sAckFrame.mChannel = nrf_802154_channel_get();
+ }
+
+ setPendingEvent(kPendingEventFrameTransmitted);
+}
+
+void nrf_802154_transmit_failed(const uint8_t *aFrame, nrf_802154_tx_error_t error)
+{
+ assert(aFrame == sTransmitPsdu);
+
+ switch (error)
+ {
+ case NRF_802154_TX_ERROR_BUSY_CHANNEL:
+ case NRF_802154_TX_ERROR_TIMESLOT_ENDED:
+ case NRF_802154_TX_ERROR_ABORTED:
+ case NRF_802154_TX_ERROR_TIMESLOT_DENIED:
+ setPendingEvent(kPendingEventChannelAccessFailure);
+ break;
+
+ case NRF_802154_TX_ERROR_INVALID_ACK:
+ case NRF_802154_TX_ERROR_NO_ACK:
+ case NRF_802154_TX_ERROR_NO_MEM:
+ setPendingEvent(kPendingEventInvalidOrNoAck);
+ break;
+
+ default:
+ assert(false);
+ }
+}
+
+void nrf_802154_energy_detected(uint8_t result)
+{
+ sEnergyDetected = nrf_802154_dbm_from_energy_level_calculate(result);
+
+ setPendingEvent(kPendingEventEnergyDetected);
+}
+
+int8_t otPlatRadioGetReceiveSensitivity(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ return NRF528XX_RECEIVE_SENSITIVITY;
+}
+
+#if OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
+void nrf_802154_tx_started(const uint8_t *aFrame)
+{
+ bool notifyFrameUpdated = false;
+ assert(aFrame == sTransmitPsdu);
+
+#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
+ if (sTransmitFrame.mInfo.mTxInfo.mIeInfo->mTimeIeOffset != 0)
+ {
+ uint8_t *timeIe = sTransmitFrame.mPsdu + sTransmitFrame.mInfo.mTxInfo.mIeInfo->mTimeIeOffset;
+ uint64_t time = otPlatTimeGet() + sTransmitFrame.mInfo.mTxInfo.mIeInfo->mNetworkTimeOffset;
+
+ *timeIe = sTransmitFrame.mInfo.mTxInfo.mIeInfo->mTimeSyncSeq;
+
+ *(++timeIe) = (uint8_t)(time & 0xff);
+ for (uint8_t i = 1; i < sizeof(uint64_t); i++)
+ {
+ time = time >> 8;
+ *(++timeIe) = (uint8_t)(time & 0xff);
+ }
+
+ notifyFrameUpdated = true;
+ }
+#endif // OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
+
+ if (notifyFrameUpdated)
+ {
+ otMacFrameProcessTransmitAesCcm(&sTransmitFrame, &sExtAddress);
+ }
+}
+#endif
+
+void nrf_802154_random_init(void)
+{
+ // Intentionally empty
+}
+
+void nrf_802154_random_deinit(void)
+{
+ // Intentionally empty
+}
+
+uint32_t nrf_802154_random_get(void)
+{
+ return otRandomNonCryptoGetUint32();
+}
diff --git a/examples/platforms/nrf528xx/src/softdevice.c b/examples/platforms/nrf528xx/src/softdevice.c
new file mode 100644
index 0000000..4270001
--- /dev/null
+++ b/examples/platforms/nrf528xx/src/softdevice.c
@@ -0,0 +1,104 @@
+/*
+ * Copyright (c) 2017, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file implements the OpenThread softdevice helper functions.
+ *
+ */
+
+#include <openthread-core-config.h>
+#include <openthread/config.h>
+
+#include <assert.h>
+#include <stddef.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "platform-nrf5.h"
+#include "platform-softdevice.h"
+#include "softdevice.h"
+
+#include <nrf_raal_softdevice.h>
+
+otError nrf5SdErrorToOtError(uint32_t aSdError)
+{
+ switch (aSdError)
+ {
+ case NRF_SUCCESS:
+ return OT_ERROR_NONE;
+ break;
+
+ case NRF_ERROR_INVALID_STATE:
+ case NRF_ERROR_BUSY:
+ return OT_ERROR_INVALID_STATE;
+ break;
+
+ case NRF_ERROR_INVALID_PARAM:
+ case NRF_ERROR_INVALID_ADDR:
+ return OT_ERROR_INVALID_ARGS;
+ break;
+
+ case NRF_ERROR_NO_MEM:
+ return OT_ERROR_NO_BUFS;
+ break;
+
+ case NRF_ERROR_NOT_FOUND:
+ return OT_ERROR_NOT_FOUND;
+ break;
+
+ case NRF_ERROR_NOT_SUPPORTED:
+ return OT_ERROR_NOT_IMPLEMENTED;
+ break;
+
+ default:
+ return OT_ERROR_FAILED;
+ break;
+ }
+}
+
+void otSysSoftdeviceSocEvtHandler(uint32_t aEvtId)
+{
+ nrf5SdSocFlashProcess(aEvtId);
+ nrf_raal_softdevice_soc_evt_handler(aEvtId);
+}
+
+void otSysSoftdeviceRaalConfig(const otSysSoftdeviceRaalConfigParams *aConfig)
+{
+ nrf_raal_softdevice_cfg_t cfg;
+ memset(&cfg, 0, sizeof(cfg));
+
+ cfg.timeslot_length = aConfig->timeslotLength;
+ cfg.timeslot_timeout = aConfig->timeslotTimeout;
+ cfg.timeslot_max_length = aConfig->timeslotMaxLength;
+ cfg.timeslot_alloc_iters = aConfig->timeslotAllocIters;
+ cfg.timeslot_safe_margin = aConfig->timeslotSafeMargin;
+ cfg.lf_clk_accuracy_ppm = aConfig->lfClkAccuracyPpm;
+
+ nrf_raal_softdevice_config(&cfg);
+}
diff --git a/examples/platforms/nrf528xx/src/softdevice.h b/examples/platforms/nrf528xx/src/softdevice.h
new file mode 100644
index 0000000..234f45c
--- /dev/null
+++ b/examples/platforms/nrf528xx/src/softdevice.h
@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2017, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file includes the common SoftDevice headers.
+ *
+ */
+
+#ifndef SOFTDEVICE_H_
+#define SOFTDEVICE_H_
+
+// clang-format off
+#if defined(__GNUC__)
+ _Pragma("GCC diagnostic push")
+ _Pragma("GCC diagnostic ignored \"-Wreturn-type\"")
+ _Pragma("GCC diagnostic ignored \"-Wunused-parameter\"")
+ _Pragma("GCC diagnostic ignored \"-Wpedantic\"")
+#endif
+
+#include <nrf_svc.h>
+#include <nrf_sdm.h>
+#include <nrf_soc.h>
+#include <nrf_nvic.h>
+
+#if defined(__GNUC__)
+ _Pragma("GCC diagnostic pop")
+#endif
+
+/*******************************************************************************
+ * @section nRF SoftDevice Handler declarations.
+ *
+ * @note Definitions for below functions are placed in nRF5 SDK.
+ ******************************************************************************/
+
+/**
+ * @brief Function for stopping the incoming stack events.
+ *
+ * This function disables the SoftDevice interrupt. To resume polling for events,
+ * call @ref nrf_sdh_resume.
+ */
+void nrf_sdh_suspend(void);
+
+/**
+ * @brief Function for resuming polling incoming events from the SoftDevice.
+ */
+void nrf_sdh_resume(void);
+
+/**
+ * @brief Function for polling stack events from the SoftDevice.
+ *
+ * The events are passed to the application using the registered event handlers.
+ */
+void nrf_sdh_evts_poll(void);
+
+// clang-format on
+#endif // SOFTDEVICE_H_
diff --git a/examples/platforms/nrf52811/spi-slave.c b/examples/platforms/nrf528xx/src/spi-slave.c
similarity index 100%
rename from examples/platforms/nrf52811/spi-slave.c
rename to examples/platforms/nrf528xx/src/spi-slave.c
diff --git a/examples/platforms/nrf528xx/src/system.c b/examples/platforms/nrf528xx/src/system.c
new file mode 100644
index 0000000..61c7754
--- /dev/null
+++ b/examples/platforms/nrf528xx/src/system.c
@@ -0,0 +1,175 @@
+/*
+ * Copyright (c) 2016, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file includes the platform-specific initializers.
+ *
+ */
+
+#include <openthread-core-config.h>
+#include <openthread/config.h>
+
+#include <openthread/platform/logging.h>
+
+#include "openthread-system.h"
+#include "platform-fem.h"
+#include "platform-nrf5.h"
+#include <drivers/clock/nrf_drv_clock.h>
+#include <nrf.h>
+
+#include <openthread/config.h>
+
+#if !OPENTHREAD_CONFIG_ENABLE_BUILTIN_MBEDTLS_MANAGEMENT && PLATFORM_OPENTHREAD_VANILLA
+
+#include <mbedtls/platform.h>
+#include <mbedtls/threading.h>
+
+#include <openthread/heap.h>
+
+#endif
+
+extern bool gPlatformPseudoResetWasRequested;
+
+void __cxa_pure_virtual(void)
+{
+ while (1)
+ ;
+}
+
+void otSysInit(int argc, char *argv[])
+{
+ OT_UNUSED_VARIABLE(argc);
+ OT_UNUSED_VARIABLE(argv);
+
+ if (gPlatformPseudoResetWasRequested)
+ {
+ otSysDeinit();
+ }
+
+#if ((!SOFTDEVICE_PRESENT) && (NRF52840_XXAA))
+ // Enable I-code cache
+ NRF_NVMC->ICACHECNF = NVMC_ICACHECNF_CACHEEN_Enabled;
+#elif (DCDC_ENABLE)
+ NRF_POWER->DCDCEN = 1;
+#endif
+
+#if !OPENTHREAD_CONFIG_ENABLE_BUILTIN_MBEDTLS_MANAGEMENT && PLATFORM_OPENTHREAD_VANILLA
+ mbedtls_platform_set_calloc_free(otHeapCAlloc, otHeapFree);
+ mbedtls_platform_setup(NULL);
+#endif
+
+ nrf_drv_clock_init();
+
+#if (OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED) || \
+ (OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_NCP_SPINEL)
+ nrf5LogInit();
+#endif
+ nrf5AlarmInit();
+ nrf5RandomInit();
+ if (!gPlatformPseudoResetWasRequested)
+ {
+#if ((UART_AS_SERIAL_TRANSPORT == 1) || (USB_CDC_AS_SERIAL_TRANSPORT == 1))
+ nrf5UartInit();
+#endif
+#if NRF52840_XXAA
+ nrf5CryptoInit();
+#endif
+ }
+ else
+ {
+#if ((UART_AS_SERIAL_TRANSPORT == 1) || (USB_CDC_AS_SERIAL_TRANSPORT == 1))
+ nrf5UartClearPendingData();
+#endif
+ }
+
+#if (SPIS_AS_SERIAL_TRANSPORT == 1)
+ nrf5SpiSlaveInit();
+#endif
+ nrf5MiscInit();
+ nrf5RadioInit();
+ nrf5TempInit();
+
+#if PLATFORM_FEM_ENABLE_DEFAULT_CONFIG
+ PlatformFemSetConfigParams(&PLATFORM_FEM_DEFAULT_CONFIG);
+#endif
+
+ gPlatformPseudoResetWasRequested = false;
+}
+
+void otSysDeinit(void)
+{
+ nrf5TempDeinit();
+ nrf5RadioDeinit();
+ nrf5MiscDeinit();
+#if (SPIS_AS_SERIAL_TRANSPORT == 1)
+ nrf5SpiSlaveDeinit();
+#endif
+ if (!gPlatformPseudoResetWasRequested)
+ {
+#if NRF52840_XXAA
+ nrf5CryptoDeinit();
+#endif
+#if ((UART_AS_SERIAL_TRANSPORT == 1) || (USB_CDC_AS_SERIAL_TRANSPORT == 1))
+ nrf5UartDeinit();
+#endif
+ }
+ nrf5RandomDeinit();
+ nrf5AlarmDeinit();
+#if (OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED) || \
+ (OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_NCP_SPINEL)
+ nrf5LogDeinit();
+#endif
+
+#if !OPENTHREAD_CONFIG_ENABLE_BUILTIN_MBEDTLS_MANAGEMENT && PLATFORM_OPENTHREAD_VANILLA
+ mbedtls_platform_teardown(NULL);
+#endif
+}
+
+bool otSysPseudoResetWasRequested(void)
+{
+ return gPlatformPseudoResetWasRequested;
+}
+
+void otSysProcessDrivers(otInstance *aInstance)
+{
+ nrf5RadioProcess(aInstance);
+#if ((UART_AS_SERIAL_TRANSPORT == 1) || (USB_CDC_AS_SERIAL_TRANSPORT == 1))
+ nrf5UartProcess();
+#endif
+#if (SPIS_AS_SERIAL_TRANSPORT == 1)
+ nrf5SpiSlaveProcess();
+#endif
+ nrf5TempProcess();
+ nrf5AlarmProcess(aInstance);
+}
+
+__WEAK void otSysEventSignalPending(void)
+{
+ // Intentionally empty
+}
diff --git a/examples/platforms/nrf52840/temp.c b/examples/platforms/nrf528xx/src/temp.c
similarity index 100%
rename from examples/platforms/nrf52840/temp.c
rename to examples/platforms/nrf528xx/src/temp.c
diff --git a/examples/platforms/nrf528xx/src/uart.c b/examples/platforms/nrf528xx/src/uart.c
new file mode 100644
index 0000000..e4c3131
--- /dev/null
+++ b/examples/platforms/nrf528xx/src/uart.c
@@ -0,0 +1,341 @@
+/*
+ * Copyright (c) 2016, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file implements the OpenThread platform abstraction for UART communication.
+ *
+ */
+
+#include <openthread-core-config.h>
+#include <openthread/config.h>
+
+#include <stddef.h>
+#include <stdint.h>
+
+#include <utils/code_utils.h>
+#include <openthread/platform/toolchain.h>
+#include <openthread/platform/uart.h>
+
+#include "openthread-system.h"
+
+#include "platform-nrf5.h"
+#include <drivers/clock/nrf_drv_clock.h>
+#include <hal/nrf_gpio.h>
+#include <hal/nrf_uart.h>
+
+#if (UART_AS_SERIAL_TRANSPORT == 1)
+
+bool sUartEnabled = false;
+
+/**
+ * UART TX buffer variables.
+ */
+static const uint8_t *sTransmitBuffer = NULL;
+static uint16_t sTransmitLength = 0;
+static bool sTransmitDone = 0;
+
+/**
+ * UART RX ring buffer variables.
+ */
+static uint8_t sReceiveBuffer[UART_RX_BUFFER_SIZE];
+static uint16_t sReceiveHead = 0;
+static uint16_t sReceiveTail = 0;
+
+/**
+ * Function for checking if RX buffer is full.
+ *
+ * @retval true RX buffer is full.
+ * @retval false RX buffer is not full.
+ */
+static __INLINE bool isRxBufferFull()
+{
+ uint16_t next = (sReceiveHead + 1) % UART_RX_BUFFER_SIZE;
+ return (next == sReceiveTail);
+}
+
+/**
+ * Function for checking if RX buffer is empty.
+ *
+ * @retval true RX buffer is empty.
+ * @retval false RX buffer is not empty.
+ */
+static __INLINE bool isRxBufferEmpty()
+{
+ return (sReceiveHead == sReceiveTail);
+}
+
+/**
+ * Function for notifying application about new bytes received.
+ */
+static void processReceive(void)
+{
+ // Set head position to not be changed during read procedure.
+ uint16_t head = sReceiveHead;
+
+ otEXPECT(isRxBufferEmpty() == false);
+
+ // In case head roll back to the beginning of the buffer, notify about left
+ // bytes from the end of the buffer.
+ if (head < sReceiveTail)
+ {
+ otPlatUartReceived(&sReceiveBuffer[sReceiveTail], (UART_RX_BUFFER_SIZE - sReceiveTail));
+ sReceiveTail = 0;
+ }
+
+ // Notify about received bytes.
+ if (head > sReceiveTail)
+ {
+ otPlatUartReceived(&sReceiveBuffer[sReceiveTail], (head - sReceiveTail));
+ sReceiveTail = head;
+ }
+
+exit:
+ return;
+}
+
+otError otPlatUartFlush(void)
+{
+ return OT_ERROR_NOT_IMPLEMENTED;
+}
+
+/**
+ * Function for notifying application about transmission being done.
+ */
+static void processTransmit(void)
+{
+ otEXPECT(sTransmitBuffer != NULL);
+
+ if (sTransmitDone)
+ {
+ // Clear Transmition transaction and notify application.
+ sTransmitBuffer = NULL;
+ sTransmitLength = 0;
+ sTransmitDone = false;
+ otPlatUartSendDone();
+ }
+
+exit:
+ return;
+}
+
+void nrf5UartProcess(void)
+{
+ processReceive();
+ processTransmit();
+}
+
+void nrf5UartInit(void)
+{
+ // Intentionally empty.
+}
+
+void nrf5UartClearPendingData(void)
+{
+ // Intentionally empty.
+}
+
+void nrf5UartDeinit(void)
+{
+ if (sUartEnabled)
+ {
+ otPlatUartDisable();
+ }
+}
+
+otError otPlatUartEnable(void)
+{
+ otError error = OT_ERROR_NONE;
+
+ otEXPECT_ACTION(sUartEnabled == false, error = OT_ERROR_ALREADY);
+
+ // Set up TX and RX pins.
+ nrf_gpio_pin_set(UART_PIN_TX);
+ nrf_gpio_cfg_output(UART_PIN_TX);
+ nrf_gpio_cfg_input(UART_PIN_RX, NRF_GPIO_PIN_NOPULL);
+ nrf_uart_txrx_pins_set(UART_INSTANCE, UART_PIN_TX, UART_PIN_RX);
+
+#if (UART_HWFC_ENABLED == 1)
+ // Set up CTS and RTS pins.
+ nrf_gpio_cfg_input(UART_PIN_CTS, NRF_GPIO_PIN_NOPULL);
+ nrf_gpio_pin_set(UART_PIN_RTS);
+ nrf_gpio_cfg_output(UART_PIN_RTS);
+ nrf_uart_hwfc_pins_set(UART_INSTANCE, UART_PIN_RTS, UART_PIN_CTS);
+
+ nrf_uart_configure(UART_INSTANCE, UART_PARITY, NRF_UART_HWFC_ENABLED);
+#else
+ nrf_uart_configure(UART_INSTANCE, UART_PARITY, NRF_UART_HWFC_DISABLED);
+#endif
+
+ // Configure baudrate.
+ nrf_uart_baudrate_set(UART_INSTANCE, UART_BAUDRATE);
+
+ // Clear UART specific events.
+ nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_TXDRDY);
+ nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_ERROR);
+ nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_RXDRDY);
+
+ // Enable interrupts for TX.
+ nrf_uart_int_enable(UART_INSTANCE, NRF_UART_INT_MASK_TXDRDY);
+
+ // Enable interrupts for RX.
+ nrf_uart_int_enable(UART_INSTANCE, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR);
+
+ // Configure NVIC to handle UART interrupts.
+ NVIC_SetPriority(UART_IRQN, UART_IRQ_PRIORITY);
+ NVIC_ClearPendingIRQ(UART_IRQN);
+ NVIC_EnableIRQ(UART_IRQN);
+
+ // Start HFCLK
+ nrf_drv_clock_hfclk_request(NULL);
+
+ while (!nrf_drv_clock_hfclk_is_running())
+ {
+ }
+
+ // Enable UART instance, and start RX on it.
+ nrf_uart_enable(UART_INSTANCE);
+ nrf_uart_task_trigger(UART_INSTANCE, NRF_UART_TASK_STARTRX);
+
+ sUartEnabled = true;
+
+exit:
+ return error;
+}
+
+otError otPlatUartDisable(void)
+{
+ otError error = OT_ERROR_NONE;
+
+ otEXPECT_ACTION(sUartEnabled == true, error = OT_ERROR_ALREADY);
+
+ // Disable NVIC interrupt.
+ NVIC_DisableIRQ(UART_IRQN);
+ NVIC_ClearPendingIRQ(UART_IRQN);
+ NVIC_SetPriority(UART_IRQN, 0);
+
+ // Disable interrupts for TX.
+ nrf_uart_int_disable(UART_INSTANCE, NRF_UART_INT_MASK_TXDRDY);
+
+ // Disable interrupts for RX.
+ nrf_uart_int_disable(UART_INSTANCE, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR);
+
+ // Disable UART instance.
+ nrf_uart_disable(UART_INSTANCE);
+
+ // Release HF clock.
+ nrf_drv_clock_hfclk_release();
+
+ sUartEnabled = false;
+
+exit:
+ return error;
+}
+
+otError otPlatUartSend(const uint8_t *aBuf, uint16_t aBufLength)
+{
+ otError error = OT_ERROR_NONE;
+
+ otEXPECT_ACTION(sTransmitBuffer == NULL, error = OT_ERROR_BUSY);
+
+ // Set up transmit buffer and its size without counting first triggered byte.
+ sTransmitBuffer = aBuf;
+ sTransmitLength = aBufLength - 1;
+
+ // Initiate Transmission process.
+ nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_TXDRDY);
+ nrf_uart_txd_set(UART_INSTANCE, *sTransmitBuffer++);
+ nrf_uart_task_trigger(UART_INSTANCE, NRF_UART_TASK_STARTTX);
+
+exit:
+ return error;
+}
+
+/**
+ * Interrupt handler of UART0 peripherial.
+ */
+void UARTE0_UART0_IRQHandler(void)
+{
+ // Check if any error has been detected.
+ if (nrf_uart_event_check(UART_INSTANCE, NRF_UART_EVENT_ERROR))
+ {
+ nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_ERROR);
+ }
+ else if (nrf_uart_event_check(UART_INSTANCE, NRF_UART_EVENT_RXDRDY))
+ {
+ // Clear RXDRDY event.
+ nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_RXDRDY);
+
+ // Read byte from the UART buffer.
+ uint8_t byte = nrf_uart_rxd_get(UART_INSTANCE);
+
+ if (!isRxBufferFull())
+ {
+ sReceiveBuffer[sReceiveHead] = byte;
+ sReceiveHead = (sReceiveHead + 1) % UART_RX_BUFFER_SIZE;
+
+ otSysEventSignalPending();
+ }
+ }
+
+ if (nrf_uart_event_check(UART_INSTANCE, NRF_UART_EVENT_TXDRDY))
+ {
+ // Clear TXDRDY event.
+ nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_TXDRDY);
+
+ // Send any more bytes if available or call application about TX done.
+ if (sTransmitLength)
+ {
+ nrf_uart_txd_set(UART_INSTANCE, *sTransmitBuffer++);
+ sTransmitLength--;
+ }
+ else
+ {
+ sTransmitDone = true;
+ nrf_uart_task_trigger(UART_INSTANCE, NRF_UART_TASK_STOPTX);
+
+ otSysEventSignalPending();
+ }
+ }
+}
+
+#endif // UART_AS_SERIAL_TRANSPORT == 1
+
+/**
+ * The UART driver weak functions definition.
+ *
+ */
+OT_TOOL_WEAK void otPlatUartSendDone(void)
+{
+}
+
+OT_TOOL_WEAK void otPlatUartReceived(const uint8_t *aBuf, uint16_t aBufLength)
+{
+ OT_UNUSED_VARIABLE(aBuf);
+ OT_UNUSED_VARIABLE(aBufLength);
+}
diff --git a/examples/platforms/nrf52840/usb-cdc-uart.c b/examples/platforms/nrf528xx/src/usb-cdc-uart.c
similarity index 100%
rename from examples/platforms/nrf52840/usb-cdc-uart.c
rename to examples/platforms/nrf528xx/src/usb-cdc-uart.c
diff --git a/examples/platforms/posix/CMakeLists.txt b/examples/platforms/posix/CMakeLists.txt
new file mode 100644
index 0000000..b4d7229
--- /dev/null
+++ b/examples/platforms/posix/CMakeLists.txt
@@ -0,0 +1,75 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+set(OT_PLATFORM_LIB "openthread-posix" PARENT_SCOPE)
+
+if(NOT OT_CONFIG)
+ set(OT_CONFIG "openthread-core-posix-config.h")
+ set(OT_CONFIG ${OT_CONFIG} PARENT_SCOPE)
+endif()
+
+list(APPEND OT_PLATFORM_DEFINES
+ "OPENTHREAD_EXAMPLES_POSIX=1"
+ "OPENTHREAD_POSIX=1"
+ "OPENTHREAD_CONFIG_NCP_UART_ENABLE=1"
+)
+set(OT_PLATFORM_DEFINES ${OT_PLATFORM_DEFINES} PARENT_SCOPE)
+
+list(APPEND OT_PLATFORM_DEFINES "OPENTHREAD_PROJECT_CORE_CONFIG_FILE=\"${OT_CONFIG}\"")
+
+add_library(openthread-posix
+ alarm.c
+ diag.c
+ entropy.c
+ flash.c
+ logging.c
+ misc.c
+ radio.c
+ spi-stubs.c
+ system.c
+ uart-posix.c
+ sim/alarm-sim.c
+ sim/platform-sim.c
+ $<TARGET_OBJECTS:openthread-platform-utils>
+)
+
+find_library(LIBRT rt)
+if(LIBRT)
+ target_link_libraries(openthread-posix PRIVATE ${LIBRT})
+endif()
+
+target_link_libraries(openthread-posix PRIVATE openthread-platform-utils)
+
+target_compile_definitions(openthread-posix PUBLIC ${OT_PLATFORM_DEFINES})
+
+target_include_directories(openthread-posix PRIVATE
+ ${OT_PUBLIC_INCLUDES}
+ ${OT_PRIVATE_INCLUDES}
+ ${PROJECT_SOURCE_DIR}/examples/platforms
+ ${PROJECT_SOURCE_DIR}/src/core
+)
diff --git a/examples/platforms/posix/README.md b/examples/platforms/posix/README.md
index 24c6fe6..7f4bae0 100644
--- a/examples/platforms/posix/README.md
+++ b/examples/platforms/posix/README.md
@@ -4,16 +4,31 @@
## Build Examples
+### Build using autotools
+
```bash
$ cd <path-to-openthread>
$ ./bootstrap
$ make -f examples/Makefile-posix
```
-After a successful build, the `elf` files are found in
-`<path-to-openthread>/output/<platform>/bin`.
+After a successful build, the `elf` files are found in:
-##
+- `<path-to-openthread>/output/<platform>/bin`
+
+### Build using cmake/ninja
+
+```bash
+$ cd <path-to-openthread>
+$ mkdir build && cd build
+$ cmake -GNinja -DOT_PLATFORM=posix ..
+$ ninja
+```
+
+After a successful build, the `elf` files are found in:
+
+- `<path-to-openthread>/build/examples/apps/cli`
+- `<path-to-openthread>/build/examples/apps/ncp`
## Interact
diff --git a/examples/platforms/posix/alarm.c b/examples/platforms/posix/alarm.c
index ef6d61f..808b2e6 100644
--- a/examples/platforms/posix/alarm.c
+++ b/examples/platforms/posix/alarm.c
@@ -36,6 +36,10 @@
#include "utils/code_utils.h"
+#ifndef __linux__
+#define __linux__ 0
+#endif
+
// linux microsecond timer
#if __linux__
diff --git a/examples/platforms/posix/entropy.c b/examples/platforms/posix/entropy.c
index 676b1eb..815f113 100644
--- a/examples/platforms/posix/entropy.c
+++ b/examples/platforms/posix/entropy.c
@@ -41,6 +41,10 @@
#include "utils/code_utils.h"
+#ifndef __SANITIZE_ADDRESS__
+#define __SANITIZE_ADDRESS__ 0
+#endif
+
#if __SANITIZE_ADDRESS__ != 0
static uint32_t sState = 1;
diff --git a/examples/platforms/posix/openthread-core-posix-config.h b/examples/platforms/posix/openthread-core-posix-config.h
index 7d31848..465c69b 100644
--- a/examples/platforms/posix/openthread-core-posix-config.h
+++ b/examples/platforms/posix/openthread-core-posix-config.h
@@ -35,6 +35,10 @@
#ifndef OPENTHREAD_CORE_POSIX_CONFIG_H_
#define OPENTHREAD_CORE_POSIX_CONFIG_H_
+#ifndef OPENTHREAD_RADIO
+#define OPENTHREAD_RADIO 0
+#endif
+
/**
* @def OPENTHREAD_CONFIG_PLATFORM_INFO
*
@@ -128,12 +132,17 @@
#define CLI_COAP_SECURE_USE_COAP_DEFAULT_HANDLER 1
/**
- * @def OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_METRICS_ENABLE
+ * @def OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE
*
- * Define to 1 if you want to enable radio coexistence metrics implemented in platform.
+ * Define to 1 if you want to enable radio coexistence implemented in platform.
*
*/
-#ifndef OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_METRICS_ENABLE
-#define OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_METRICS_ENABLE 1
+#ifndef OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE
+#define OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE 1
#endif
+
+#ifndef OPENTHREAD_CONFIG_PARENT_SEARCH_ENABLE
+#define OPENTHREAD_CONFIG_PARENT_SEARCH_ENABLE 1
+#endif
+
#endif // OPENTHREAD_CORE_POSIX_CONFIG_H_
diff --git a/examples/platforms/posix/platform-config.h b/examples/platforms/posix/platform-config.h
index 080d086..d7fc98d 100644
--- a/examples/platforms/posix/platform-config.h
+++ b/examples/platforms/posix/platform-config.h
@@ -35,9 +35,49 @@
/**
* @def OPENTHREAD_POSIX_UART_BAUDRATE
*
- * This setting configures the baudrate of the UART.
+ * This setting configures the baud rate of the UART.
*
*/
#ifndef OPENTHREAD_POSIX_UART_BAUDRATE
#define OPENTHREAD_POSIX_UART_BAUDRATE B115200
#endif
+
+/**
+ * @def OPENTHREAD_POSIX_VIRTUAL_TIME
+ *
+ * This setting configures whether to use virtual time (used for simulation) in POSIX platform.
+ *
+ */
+#ifndef OPENTHREAD_POSIX_VIRTUAL_TIME
+#define OPENTHREAD_POSIX_VIRTUAL_TIME 0
+#endif
+
+/**
+ * @def OPENTHREAD_POSIX_VIRTUAL_TIME_UART
+ *
+ * This setting configures whether to use virtual time for UART.
+ *
+ */
+#ifndef OPENTHREAD_POSIX_VIRTUAL_TIME_UART
+#define OPENTHREAD_POSIX_VIRTUAL_TIME_UART 0
+#endif
+
+/**
+ * @def OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
+ *
+ * Define as 1 to enable pseudo-reset.
+ *
+ */
+#ifndef OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
+#define OPENTHREAD_PLATFORM_USE_PSEUDO_RESET 0
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_NCP_SPI_ENABLE
+ *
+ * Define as 1 to enable SPI NCP interface.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_NCP_SPI_ENABLE
+#define OPENTHREAD_CONFIG_NCP_SPI_ENABLE 0
+#endif
diff --git a/examples/platforms/posix/radio.c b/examples/platforms/posix/radio.c
index 31e20a3..5d1d6f4 100644
--- a/examples/platforms/posix/radio.c
+++ b/examples/platforms/posix/radio.c
@@ -28,6 +28,8 @@
#include "platform-posix.h"
+#include <errno.h>
+
#include <openthread/dataset.h>
#include <openthread/random_noncrypto.h>
#include <openthread/platform/alarm-micro.h>
@@ -37,56 +39,24 @@
#include <openthread/platform/time.h>
#include "utils/code_utils.h"
+#include "utils/mac_frame.h"
+#include "utils/soft_source_match_table.h"
// The IPv4 group for receiving packets of radio simulation
#define OT_RADIO_GROUP "224.0.0.116"
enum
{
- IEEE802154_MIN_LENGTH = 5,
- IEEE802154_MAX_LENGTH = 127,
IEEE802154_ACK_LENGTH = 5,
- IEEE802154_BROADCAST = 0xffff,
+ IEEE802154_FRAME_TYPE_ACK = 2 << 0,
- IEEE802154_FRAME_TYPE_ACK = 2 << 0,
- IEEE802154_FRAME_TYPE_MACCMD = 3 << 0,
- IEEE802154_FRAME_TYPE_MASK = 7 << 0,
-
- IEEE802154_SECURITY_ENABLED = 1 << 3,
- IEEE802154_FRAME_PENDING = 1 << 4,
- IEEE802154_ACK_REQUEST = 1 << 5,
- IEEE802154_PANID_COMPRESSION = 1 << 6,
-
- IEEE802154_DST_ADDR_NONE = 0 << 2,
- IEEE802154_DST_ADDR_SHORT = 2 << 2,
- IEEE802154_DST_ADDR_EXT = 3 << 2,
- IEEE802154_DST_ADDR_MASK = 3 << 2,
-
- IEEE802154_SRC_ADDR_NONE = 0 << 6,
- IEEE802154_SRC_ADDR_SHORT = 2 << 6,
- IEEE802154_SRC_ADDR_EXT = 3 << 6,
- IEEE802154_SRC_ADDR_MASK = 3 << 6,
-
- IEEE802154_DSN_OFFSET = 2,
- IEEE802154_DSTPAN_OFFSET = 3,
- IEEE802154_DSTADDR_OFFSET = 5,
-
- IEEE802154_SEC_LEVEL_MASK = 7 << 0,
-
- IEEE802154_KEY_ID_MODE_0 = 0 << 3,
- IEEE802154_KEY_ID_MODE_1 = 1 << 3,
- IEEE802154_KEY_ID_MODE_2 = 2 << 3,
- IEEE802154_KEY_ID_MODE_3 = 3 << 3,
- IEEE802154_KEY_ID_MODE_MASK = 3 << 3,
-
- IEEE802154_MACCMD_DATA_REQ = 4,
+ IEEE802154_FRAME_PENDING = 1 << 4,
};
enum
{
- POSIX_RECEIVE_SENSITIVITY = -100, // dBm
- POSIX_MAX_SRC_MATCH_ENTRIES = OPENTHREAD_CONFIG_MLE_MAX_CHILDREN,
+ POSIX_RECEIVE_SENSITIVITY = -100, // dBm
POSIX_HIGH_RSSI_SAMPLE = -30, // dBm
POSIX_LOW_RSSI_SAMPLE = -98, // dBm
@@ -100,6 +70,7 @@
static int sTxFd = -1;
static int sRxFd = -1;
static uint16_t sPortOffset = 0;
+static uint16_t sPort = 0;
#endif
enum
@@ -132,196 +103,56 @@
static otRadioIeInfo sTransmitIeInfo;
#endif
-static uint8_t sExtendedAddress[OT_EXT_ADDRESS_SIZE];
-static uint16_t sShortAddress;
-static uint16_t sPanid;
-static bool sPromiscuous = false;
-static bool sTxWait = false;
-static int8_t sTxPower = 0;
+static otExtAddress sExtAddress;
+static otShortAddress sShortAddress;
+static otPanId sPanid;
+static bool sPromiscuous = false;
+static bool sTxWait = false;
+static int8_t sTxPower = 0;
+static int8_t sCcaEdThresh = -74;
-static uint16_t sShortAddressMatchTableCount = 0;
-static uint16_t sExtAddressMatchTableCount = 0;
-static uint16_t sShortAddressMatchTable[POSIX_MAX_SRC_MATCH_ENTRIES];
-static otExtAddress sExtAddressMatchTable[POSIX_MAX_SRC_MATCH_ENTRIES];
-static bool sSrcMatchEnabled = false;
+static bool sSrcMatchEnabled = false;
-static bool findShortAddress(uint16_t aShortAddress)
+#if OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE
+static bool sRadioCoexEnabled = true;
+#endif
+
+static void ReverseExtAddress(otExtAddress *aReversed, const otExtAddress *aOrigin)
{
- uint8_t i;
-
- for (i = 0; i < sShortAddressMatchTableCount; ++i)
+ for (size_t i = 0; i < sizeof(*aReversed); i++)
{
- if (sShortAddressMatchTable[i] == aShortAddress)
- {
- break;
- }
+ aReversed->m8[i] = aOrigin->m8[sizeof(*aOrigin) - 1 - i];
}
-
- return i < sShortAddressMatchTableCount;
}
-static bool findExtAddress(const otExtAddress *aExtAddress)
+static bool isDataRequestAndHasFramePending(const otRadioFrame *aFrame)
{
- uint8_t i;
+ bool rval = false;
+ otMacAddress src;
- for (i = 0; i < sExtAddressMatchTableCount; ++i)
+ otEXPECT(otMacFrameIsDataRequest(aFrame));
+ otEXPECT_ACTION(sSrcMatchEnabled, rval = true);
+ otEXPECT(otMacFrameGetSrcAddr(aFrame, &src) == OT_ERROR_NONE);
+
+ switch (src.mType)
{
- if (!memcmp(&sExtAddressMatchTable[i], aExtAddress, sizeof(otExtAddress)))
- {
- break;
- }
+ case OT_MAC_ADDRESS_TYPE_SHORT:
+ rval = utilsSoftSrcMatchShortFindEntry(src.mAddress.mShortAddress) >= 0;
+ break;
+ case OT_MAC_ADDRESS_TYPE_EXTENDED:
+ {
+ otExtAddress extAddr;
+
+ ReverseExtAddress(&extAddr, &src.mAddress.mExtAddress);
+ rval = utilsSoftSrcMatchExtFindEntry(&extAddr) >= 0;
+ break;
}
-
- return i < sExtAddressMatchTableCount;
-}
-
-static inline bool isFrameTypeAck(const uint8_t *aFrame)
-{
- return (aFrame[0] & IEEE802154_FRAME_TYPE_MASK) == IEEE802154_FRAME_TYPE_ACK;
-}
-
-static inline bool isFrameTypeMacCmd(const uint8_t *aFrame)
-{
- return (aFrame[0] & IEEE802154_FRAME_TYPE_MASK) == IEEE802154_FRAME_TYPE_MACCMD;
-}
-
-static inline bool isSecurityEnabled(const uint8_t *aFrame)
-{
- return (aFrame[0] & IEEE802154_SECURITY_ENABLED) != 0;
-}
-
-static inline bool isAckRequested(const uint8_t *aFrame)
-{
- return (aFrame[0] & IEEE802154_ACK_REQUEST) != 0;
-}
-
-static inline bool isPanIdCompressed(const uint8_t *aFrame)
-{
- return (aFrame[0] & IEEE802154_PANID_COMPRESSION) != 0;
-}
-
-static inline bool isDataRequestAndHasFramePending(const uint8_t *aFrame)
-{
- const uint8_t *cur = aFrame;
- uint8_t securityControl;
- bool isDataRequest = false;
- bool hasFramePending = false;
-
- // FCF + DSN
- cur += 2 + 1;
-
- otEXPECT(isFrameTypeMacCmd(aFrame));
-
- // Destination PAN + Address
- switch (aFrame[1] & IEEE802154_DST_ADDR_MASK)
- {
- case IEEE802154_DST_ADDR_SHORT:
- cur += sizeof(otPanId) + sizeof(otShortAddress);
- break;
-
- case IEEE802154_DST_ADDR_EXT:
- cur += sizeof(otPanId) + sizeof(otExtAddress);
- break;
-
default:
- goto exit;
- }
-
- // Source PAN + Address
- switch (aFrame[1] & IEEE802154_SRC_ADDR_MASK)
- {
- case IEEE802154_SRC_ADDR_SHORT:
- if (!isPanIdCompressed(aFrame))
- {
- cur += sizeof(otPanId);
- }
-
- if (sSrcMatchEnabled)
- {
- hasFramePending = findShortAddress((uint16_t)(cur[1] << 8 | cur[0]));
- }
-
- cur += sizeof(otShortAddress);
break;
-
- case IEEE802154_SRC_ADDR_EXT:
- if (!isPanIdCompressed(aFrame))
- {
- cur += sizeof(otPanId);
- }
-
- if (sSrcMatchEnabled)
- {
- hasFramePending = findExtAddress((const otExtAddress *)cur);
- }
-
- cur += sizeof(otExtAddress);
- break;
-
- default:
- goto exit;
}
- // Security Control + Frame Counter + Key Identifier
- if (isSecurityEnabled(aFrame))
- {
- securityControl = *cur;
-
- if (securityControl & IEEE802154_SEC_LEVEL_MASK)
- {
- cur += 1 + 4;
- }
-
- switch (securityControl & IEEE802154_KEY_ID_MODE_MASK)
- {
- case IEEE802154_KEY_ID_MODE_0:
- cur += 0;
- break;
-
- case IEEE802154_KEY_ID_MODE_1:
- cur += 1;
- break;
-
- case IEEE802154_KEY_ID_MODE_2:
- cur += 5;
- break;
-
- case IEEE802154_KEY_ID_MODE_3:
- cur += 9;
- break;
- }
- }
-
- // Command ID
- isDataRequest = cur[0] == IEEE802154_MACCMD_DATA_REQ;
-
exit:
- return isDataRequest && hasFramePending;
-}
-
-static inline uint8_t getDsn(const uint8_t *aFrame)
-{
- return aFrame[IEEE802154_DSN_OFFSET];
-}
-
-static inline otPanId getDstPan(const uint8_t *aFrame)
-{
- return (otPanId)((aFrame[IEEE802154_DSTPAN_OFFSET + 1] << 8) | aFrame[IEEE802154_DSTPAN_OFFSET]);
-}
-
-static inline otShortAddress getShortAddress(const uint8_t *aFrame)
-{
- return (otShortAddress)((aFrame[IEEE802154_DSTADDR_OFFSET + 1] << 8) | aFrame[IEEE802154_DSTADDR_OFFSET]);
-}
-
-static inline void getExtAddress(const uint8_t *aFrame, otExtAddress *aAddress)
-{
- size_t i;
-
- for (i = 0; i < sizeof(otExtAddress); i++)
- {
- aAddress->m8[i] = aFrame[IEEE802154_DSTADDR_OFFSET + (sizeof(otExtAddress) - 1 - i)];
- }
+ return rval;
}
static uint16_t crc16_citt(uint16_t aFcs, uint8_t aByte)
@@ -366,24 +197,22 @@
aIeeeEui64[7] = gNodeId & 0xff;
}
-void otPlatRadioSetPanId(otInstance *aInstance, uint16_t aPanid)
+void otPlatRadioSetPanId(otInstance *aInstance, otPanId aPanid)
{
assert(aInstance != NULL);
sPanid = aPanid;
+ utilsSoftSrcMatchSetPanId(aPanid);
}
void otPlatRadioSetExtendedAddress(otInstance *aInstance, const otExtAddress *aExtAddress)
{
assert(aInstance != NULL);
- for (size_t i = 0; i < sizeof(sExtendedAddress); i++)
- {
- sExtendedAddress[i] = aExtAddress->m8[sizeof(sExtendedAddress) - 1 - i];
- }
+ ReverseExtAddress(&sExtAddress, aExtAddress);
}
-void otPlatRadioSetShortAddress(otInstance *aInstance, uint16_t aAddress)
+void otPlatRadioSetShortAddress(otInstance *aInstance, otShortAddress aAddress)
{
assert(aInstance != NULL);
@@ -408,8 +237,9 @@
otEXPECT_ACTION((fd = socket(AF_INET, SOCK_DGRAM, IPPROTO_UDP)) != -1, perror("socket(sTxFd)"));
+ sPort = (uint16_t)(9000 + sPortOffset + gNodeId);
sockaddr.sin_family = AF_INET;
- sockaddr.sin_port = htons((uint16_t)(9000 + sPortOffset + gNodeId));
+ sockaddr.sin_port = htons(sPort);
sockaddr.sin_addr.s_addr = inet_addr("127.0.0.1");
otEXPECT_ACTION(setsockopt(fd, IPPROTO_IP, IP_MULTICAST_IF, &sockaddr.sin_addr, sizeof(sockaddr.sin_addr)) != -1,
@@ -625,7 +455,7 @@
static void radioReceive(otInstance *aInstance)
{
bool isTxDone = false;
- bool isAck = isFrameTypeAck(sReceiveFrame.mPsdu);
+ bool isAck = otMacFrameIsAck(&sReceiveFrame);
otEXPECT(sReceiveFrame.mChannel == sReceiveMessage.mChannel);
otEXPECT(sState == OT_RADIO_STATE_RECEIVE || sState == OT_RADIO_STATE_TRANSMIT);
@@ -635,9 +465,9 @@
if (sTxWait)
{
- if (isAckRequested(sTransmitFrame.mPsdu))
+ if (otMacFrameIsAckRequested(&sTransmitFrame))
{
- isTxDone = isAck && getDsn(sReceiveFrame.mPsdu) == getDsn(sTransmitFrame.mPsdu);
+ isTxDone = isAck && otMacFrameGetSequence(&sReceiveFrame) == otMacFrameGetSequence(&sTransmitFrame);
}
#if OPENTHREAD_POSIX_VIRTUAL_TIME
// Simulate tx done when receiving the echo frame.
@@ -715,7 +545,7 @@
if (notifyFrameUpdated)
{
- otPlatRadioFrameUpdated(aInstance, &sTransmitFrame);
+ otMacFrameProcessTransmitAesCcm(&sTransmitFrame, &sExtAddress);
}
#endif // OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
@@ -726,7 +556,7 @@
radioTransmit(&sTransmitMessage, &sTransmitFrame);
#if OPENTHREAD_POSIX_VIRTUAL_TIME == 0
- sTxWait = isAckRequested(sTransmitFrame.mPsdu);
+ sTxWait = otMacFrameIsAckRequested(&sTransmitFrame);
if (!sTxWait)
{
@@ -813,17 +643,33 @@
#if OPENTHREAD_POSIX_VIRTUAL_TIME == 0
if (FD_ISSET(sRxFd, aReadFdSet))
{
- ssize_t rval = recvfrom(sRxFd, (char *)&sReceiveMessage, sizeof(sReceiveMessage), 0, NULL, NULL);
+ struct sockaddr_in sockaddr;
+ socklen_t len = sizeof(sockaddr);
+ ssize_t rval;
- if (rval < 0)
+ memset(&sockaddr, 0, sizeof(sockaddr));
+ rval =
+ recvfrom(sRxFd, (char *)&sReceiveMessage, sizeof(sReceiveMessage), 0, (struct sockaddr *)&sockaddr, &len);
+
+ if (rval > 0)
+ {
+ if (sockaddr.sin_port != htons(sPort))
+ {
+ sReceiveFrame.mLength = (uint16_t)(rval - 1);
+
+ radioReceive(aInstance);
+ }
+ }
+ else if (rval == 0)
+ {
+ // socket is closed, which should not happen
+ assert(false);
+ }
+ else if (errno != EINTR && errno != EAGAIN)
{
perror("recvfrom(sRxFd)");
exit(EXIT_FAILURE);
}
-
- sReceiveFrame.mLength = (uint8_t)(rval - 1);
-
- radioReceive(aInstance);
}
#endif
@@ -869,14 +715,14 @@
sAckFrame.mLength = IEEE802154_ACK_LENGTH;
sAckMessage.mPsdu[0] = IEEE802154_FRAME_TYPE_ACK;
- if (isDataRequestAndHasFramePending(sReceiveFrame.mPsdu))
+ if (isDataRequestAndHasFramePending(&sReceiveFrame))
{
sAckMessage.mPsdu[0] |= IEEE802154_FRAME_PENDING;
sReceiveFrame.mInfo.mRxInfo.mAckedWithFramePending = true;
}
sAckMessage.mPsdu[1] = 0;
- sAckMessage.mPsdu[2] = getDsn(sReceiveFrame.mPsdu);
+ sAckMessage.mPsdu[2] = otMacFrameGetSequence(&sReceiveFrame);
sAckMessage.mChannel = sReceiveFrame.mChannel;
@@ -886,45 +732,20 @@
void radioProcessFrame(otInstance *aInstance)
{
- otError error = OT_ERROR_NONE;
- otPanId dstpan;
- otShortAddress short_address;
- otExtAddress ext_address;
-
- otEXPECT_ACTION(sPromiscuous == false, error = OT_ERROR_NONE);
-
- switch (sReceiveFrame.mPsdu[1] & IEEE802154_DST_ADDR_MASK)
- {
- case IEEE802154_DST_ADDR_NONE:
- break;
-
- case IEEE802154_DST_ADDR_SHORT:
- dstpan = getDstPan(sReceiveFrame.mPsdu);
- short_address = getShortAddress(sReceiveFrame.mPsdu);
- otEXPECT_ACTION((dstpan == IEEE802154_BROADCAST || dstpan == sPanid) &&
- (short_address == IEEE802154_BROADCAST || short_address == sShortAddress),
- error = OT_ERROR_ABORT);
- break;
-
- case IEEE802154_DST_ADDR_EXT:
- dstpan = getDstPan(sReceiveFrame.mPsdu);
- getExtAddress(sReceiveFrame.mPsdu, &ext_address);
- otEXPECT_ACTION((dstpan == IEEE802154_BROADCAST || dstpan == sPanid) &&
- memcmp(&ext_address, sExtendedAddress, sizeof(ext_address)) == 0,
- error = OT_ERROR_ABORT);
- break;
-
- default:
- error = OT_ERROR_ABORT;
- goto exit;
- }
+ otError error = OT_ERROR_NONE;
sReceiveFrame.mInfo.mRxInfo.mRssi = -20;
sReceiveFrame.mInfo.mRxInfo.mLqi = OT_RADIO_LQI_NONE;
sReceiveFrame.mInfo.mRxInfo.mAckedWithFramePending = false;
+
+ otEXPECT(sPromiscuous == false);
+
+ otEXPECT_ACTION(otMacFrameDoesAddrMatch(&sReceiveFrame, sPanid, sShortAddress, &sExtAddress),
+ error = OT_ERROR_ABORT);
+
// generate acknowledgment
- if (isAckRequested(sReceiveFrame.mPsdu))
+ if (otMacFrameIsAckRequested(&sReceiveFrame))
{
radioSendAck();
}
@@ -953,103 +774,6 @@
sSrcMatchEnabled = aEnable;
}
-otError otPlatRadioAddSrcMatchShortEntry(otInstance *aInstance, uint16_t aShortAddress)
-{
- assert(aInstance != NULL);
-
- otError error = OT_ERROR_NONE;
- otEXPECT_ACTION(sShortAddressMatchTableCount < sizeof(sShortAddressMatchTable) / sizeof(uint16_t),
- error = OT_ERROR_NO_BUFS);
-
- for (uint8_t i = 0; i < sShortAddressMatchTableCount; ++i)
- {
- otEXPECT_ACTION(sShortAddressMatchTable[i] != aShortAddress, error = OT_ERROR_DUPLICATED);
- }
-
- sShortAddressMatchTable[sShortAddressMatchTableCount++] = aShortAddress;
-
-exit:
- return error;
-}
-
-otError otPlatRadioAddSrcMatchExtEntry(otInstance *aInstance, const otExtAddress *aExtAddress)
-{
- assert(aInstance != NULL);
-
- otError error = OT_ERROR_NONE;
-
- otEXPECT_ACTION(sExtAddressMatchTableCount < sizeof(sExtAddressMatchTable) / sizeof(otExtAddress),
- error = OT_ERROR_NO_BUFS);
-
- for (uint8_t i = 0; i < sExtAddressMatchTableCount; ++i)
- {
- otEXPECT_ACTION(memcmp(&sExtAddressMatchTable[i], aExtAddress, sizeof(otExtAddress)),
- error = OT_ERROR_DUPLICATED);
- }
-
- sExtAddressMatchTable[sExtAddressMatchTableCount++] = *aExtAddress;
-
-exit:
- return error;
-}
-
-otError otPlatRadioClearSrcMatchShortEntry(otInstance *aInstance, uint16_t aShortAddress)
-{
- assert(aInstance != NULL);
-
- otError error = OT_ERROR_NOT_FOUND;
- otEXPECT(sShortAddressMatchTableCount > 0);
-
- for (uint8_t i = 0; i < sShortAddressMatchTableCount; ++i)
- {
- if (sShortAddressMatchTable[i] == aShortAddress)
- {
- sShortAddressMatchTable[i] = sShortAddressMatchTable[--sShortAddressMatchTableCount];
- error = OT_ERROR_NONE;
- goto exit;
- }
- }
-
-exit:
- return error;
-}
-
-otError otPlatRadioClearSrcMatchExtEntry(otInstance *aInstance, const otExtAddress *aExtAddress)
-{
- assert(aInstance != NULL);
-
- otError error = OT_ERROR_NOT_FOUND;
-
- otEXPECT(sExtAddressMatchTableCount > 0);
-
- for (uint8_t i = 0; i < sExtAddressMatchTableCount; ++i)
- {
- if (!memcmp(&sExtAddressMatchTable[i], aExtAddress, sizeof(otExtAddress)))
- {
- sExtAddressMatchTable[i] = sExtAddressMatchTable[--sExtAddressMatchTableCount];
- error = OT_ERROR_NONE;
- goto exit;
- }
- }
-
-exit:
- return error;
-}
-
-void otPlatRadioClearSrcMatchShortEntries(otInstance *aInstance)
-{
- assert(aInstance != NULL);
-
- sShortAddressMatchTableCount = 0;
-}
-
-void otPlatRadioClearSrcMatchExtEntries(otInstance *aInstance)
-{
- assert(aInstance != NULL);
-
- sExtAddressMatchTableCount = 0;
-}
-
otError otPlatRadioEnergyScan(otInstance *aInstance, uint8_t aScanChannel, uint16_t aScanDuration)
{
assert(aInstance != NULL);
@@ -1077,6 +801,24 @@
return OT_ERROR_NONE;
}
+otError otPlatRadioGetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t *aThreshold)
+{
+ assert(aInstance != NULL);
+
+ *aThreshold = sCcaEdThresh;
+
+ return OT_ERROR_NONE;
+}
+
+otError otPlatRadioSetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t aThreshold)
+{
+ assert(aInstance != NULL);
+
+ sCcaEdThresh = aThreshold;
+
+ return OT_ERROR_NONE;
+}
+
int8_t otPlatRadioGetReceiveSensitivity(otInstance *aInstance)
{
assert(aInstance != NULL);
@@ -1084,7 +826,29 @@
return POSIX_RECEIVE_SENSITIVITY;
}
-#if OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_METRICS_ENABLE
+otRadioState otPlatRadioGetState(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ return sState;
+}
+
+#if OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE
+otError otPlatRadioSetCoexEnabled(otInstance *aInstance, bool aEnabled)
+{
+ assert(aInstance != NULL);
+
+ sRadioCoexEnabled = aEnabled;
+ return OT_ERROR_NONE;
+}
+
+bool otPlatRadioIsCoexEnabled(otInstance *aInstance)
+{
+ assert(aInstance != NULL);
+
+ return sRadioCoexEnabled;
+}
+
otError otPlatRadioGetCoexMetrics(otInstance *aInstance, otRadioCoexMetrics *aCoexMetrics)
{
otError error = OT_ERROR_NONE;
diff --git a/examples/platforms/qpg6095/logging.c b/examples/platforms/qpg6095/logging.c
index 264f6f5..de5ab3f 100644
--- a/examples/platforms/qpg6095/logging.c
+++ b/examples/platforms/qpg6095/logging.c
@@ -26,6 +26,8 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#include "openthread-core-config.h"
+
#include "platform_qorvo.h"
#include <ctype.h>
diff --git a/examples/platforms/qpg6095/radio.c b/examples/platforms/qpg6095/radio.c
index d6b7c25..61a82a2 100644
--- a/examples/platforms/qpg6095/radio.c
+++ b/examples/platforms/qpg6095/radio.c
@@ -33,6 +33,9 @@
*/
#include "radio_qorvo.h"
+
+#include <string.h>
+
#include <common/logging.hpp>
#include <openthread/platform/diag.h>
#include <openthread/platform/radio.h>
@@ -327,6 +330,20 @@
return OT_ERROR_NOT_IMPLEMENTED;
}
+otError otPlatRadioGetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t *aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ OT_UNUSED_VARIABLE(aThreshold);
+ return OT_ERROR_NOT_IMPLEMENTED;
+}
+
+otError otPlatRadioSetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ OT_UNUSED_VARIABLE(aThreshold);
+ return OT_ERROR_NOT_IMPLEMENTED;
+}
+
int8_t otPlatRadioGetReceiveSensitivity(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
diff --git a/examples/platforms/qpg6095/settings.cpp b/examples/platforms/qpg6095/settings.cpp
index 500e992..f4e4108 100644
--- a/examples/platforms/qpg6095/settings.cpp
+++ b/examples/platforms/qpg6095/settings.cpp
@@ -35,7 +35,6 @@
#include <openthread-core-config.h>
#include <stdbool.h>
-#include "common/settings.hpp"
#include "openthread/platform/settings.h"
#include <utils/code_utils.h>
diff --git a/examples/platforms/samr21/Makefile.am b/examples/platforms/samr21/Makefile.am
index 946af88..e5a21ac 100644
--- a/examples/platforms/samr21/Makefile.am
+++ b/examples/platforms/samr21/Makefile.am
@@ -33,6 +33,10 @@
override CFLAGS := $(filter-out -pedantic-errors,$(CFLAGS))
override CXXFLAGS := $(filter-out -pedantic-errors,$(CXXFLAGS))
+# Do not enable -Wundef for this platform
+override CFLAGS := $(filter-out -Wundef,$(CFLAGS))
+override CXXFLAGS := $(filter-out -Wundef,$(CXXFLAGS))
+
libopenthread_samr21_a_CPPFLAGS = \
-D ARM_MATH_CM0PLUS=true \
-D PHY_AT86RF233 \
diff --git a/examples/platforms/samr21/radio.c b/examples/platforms/samr21/radio.c
index 6a6f3a3..1f951e1 100644
--- a/examples/platforms/samr21/radio.c
+++ b/examples/platforms/samr21/radio.c
@@ -652,6 +652,22 @@
return OT_ERROR_NONE;
}
+otError otPlatRadioGetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t *aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ OT_UNUSED_VARIABLE(aThreshold);
+
+ return OT_ERROR_NOT_IMPLEMENTED;
+}
+
+otError otPlatRadioSetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ OT_UNUSED_VARIABLE(aThreshold);
+
+ return OT_ERROR_NOT_IMPLEMENTED;
+}
+
int8_t otPlatRadioGetReceiveSensitivity(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
diff --git a/examples/platforms/utils/CMakeLists.txt b/examples/platforms/utils/CMakeLists.txt
new file mode 100644
index 0000000..0526e37
--- /dev/null
+++ b/examples/platforms/utils/CMakeLists.txt
@@ -0,0 +1,53 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+add_library(openthread-platform-utils OBJECT
+ debug_uart.c
+ logging_rtt.c
+ mac_frame.cpp
+ settings_ram.c
+ settings_flash.c
+ soft_source_match_table.c
+)
+
+target_compile_definitions(openthread-platform-utils PRIVATE
+ ${OT_PRIVATE_DEFINES}
+)
+
+target_include_directories(openthread-platform-utils PRIVATE
+ ${OT_PUBLIC_INCLUDES}
+ ${OT_PRIVATE_INCLUDES}
+ ${PROJECT_SOURCE_DIR}/examples/platforms
+ ${PROJECT_SOURCE_DIR}/examples/platforms/utils
+ ${PROJECT_SOURCE_DIR}/src/core
+ ${PROJECT_SOURCE_DIR}/third_party/jlink/SEGGER_RTT_V640/RTT
+)
+
+# Provide a static library implementation of platform-utils for non-cmake platforms
+add_library(openthread-platform-utils-static $<TARGET_OBJECTS:openthread-platform-utils>)
+target_link_libraries(openthread-platform-utils-static PUBLIC openthread-platform-utils)
diff --git a/examples/platforms/utils/Makefile.am b/examples/platforms/utils/Makefile.am
index 62c2bea..aa29b83 100644
--- a/examples/platforms/utils/Makefile.am
+++ b/examples/platforms/utils/Makefile.am
@@ -43,6 +43,9 @@
flash.h \
logging_rtt.c \
logging_rtt.h \
+ mac_frame.cpp \
+ mac_frame.h \
+ settings.h \
settings_ram.c \
settings_flash.c \
soft_source_match_table.c \
diff --git a/examples/platforms/utils/logging_rtt.c b/examples/platforms/utils/logging_rtt.c
index ffd5bfd..242ad25 100644
--- a/examples/platforms/utils/logging_rtt.c
+++ b/examples/platforms/utils/logging_rtt.c
@@ -58,8 +58,11 @@
#define RTT_COLOR_CODE_CYAN ""
#endif // LOG_RTT_COLOR_ENABLE == 1
-static bool sLogInitialized = false;
+static bool sLogInitialized = false;
+
+#if LOG_RTT_BUFFER_INDEX != 0
static uint8_t sLogBuffer[LOG_RTT_BUFFER_SIZE];
+#endif
/**
* Function for getting color of a given level log.
@@ -119,8 +122,13 @@
void utilsLogRttInit(void)
{
+#if LOG_RTT_BUFFER_INDEX != 0
int res = SEGGER_RTT_ConfigUpBuffer(LOG_RTT_BUFFER_INDEX, LOG_RTT_BUFFER_NAME, sLogBuffer, LOG_RTT_BUFFER_SIZE,
SEGGER_RTT_MODE_NO_BLOCK_TRIM);
+#else
+ int res = SEGGER_RTT_SetFlagsUpBuffer(LOG_RTT_BUFFER_INDEX, SEGGER_RTT_MODE_NO_BLOCK_TRIM);
+#endif
+
otEXPECT(res >= 0);
sLogInitialized = true;
diff --git a/examples/platforms/utils/logging_rtt.h b/examples/platforms/utils/logging_rtt.h
index f761b5d..734766b 100644
--- a/examples/platforms/utils/logging_rtt.h
+++ b/examples/platforms/utils/logging_rtt.h
@@ -59,7 +59,8 @@
/**
* @def LOG_RTT_BUFFER_NAME
*
- * RTT's name.
+ * RTT's name. Only used if LOG_RTT_BUFFER_INDEX is not 0. Otherwise,
+ * the buffer name is fixed to "Terminal".
*
*/
#ifndef LOG_RTT_BUFFER_NAME
@@ -69,7 +70,9 @@
/**
* @def LOG_RTT_BUFFER_SIZE
*
- * LOG RTT's buffer size.
+ * LOG RTT's buffer size. Only used if LOG_RTT_BUFFER_INDEX is not 0. To
+ * configure buffer #0 size, check the BUFFER_SIZE_UP definition in
+ * SEGGER_RTT_Conf.h
*
*/
#ifndef LOG_RTT_BUFFER_SIZE
diff --git a/examples/platforms/utils/mac_frame.cpp b/examples/platforms/utils/mac_frame.cpp
new file mode 100644
index 0000000..276e38b
--- /dev/null
+++ b/examples/platforms/utils/mac_frame.cpp
@@ -0,0 +1,122 @@
+/*
+ * Copyright (c) 2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "mac_frame.h"
+
+#include "mac/mac_frame.hpp"
+
+using namespace ot;
+
+bool otMacFrameDoesAddrMatch(const otRadioFrame *aFrame,
+ otPanId aPanId,
+ otShortAddress aShortAddress,
+ const otExtAddress *aExtAddress)
+{
+ const Mac::Frame &frame = *static_cast<const Mac::Frame *>(aFrame);
+ bool rval = false;
+ Mac::Address dst;
+ Mac::PanId panid;
+
+ SuccessOrExit(frame.GetDstAddr(dst));
+
+ switch (dst.GetType())
+ {
+ case Mac::Address::kTypeShort:
+ SuccessOrExit(frame.GetDstPanId(panid));
+ rval = (panid == Mac::kPanIdBroadcast || panid == aPanId) &&
+ (dst.GetShort() == Mac::kShortAddrBroadcast || dst.GetShort() == aShortAddress);
+ break;
+
+ case Mac::Address::kTypeExtended:
+ SuccessOrExit(frame.GetDstPanId(panid));
+ rval = (panid == Mac::kPanIdBroadcast || panid == aPanId) &&
+ dst.GetExtended() == *static_cast<const Mac::ExtAddress *>(aExtAddress);
+ break;
+
+ case Mac::Address::kTypeNone:
+ rval = true;
+ break;
+ }
+
+exit:
+ return rval;
+}
+
+bool otMacFrameIsAck(const otRadioFrame *aFrame)
+{
+ return static_cast<const Mac::Frame *>(aFrame)->GetType() == Mac::Frame::kFcfFrameAck;
+}
+
+bool otMacFrameIsDataRequest(const otRadioFrame *aFrame)
+{
+ return static_cast<const Mac::Frame *>(aFrame)->IsDataRequestCommand();
+}
+
+bool otMacFrameIsAckRequested(const otRadioFrame *aFrame)
+{
+ return static_cast<const Mac::Frame *>(aFrame)->GetAckRequest();
+}
+
+otError otMacFrameGetSrcAddr(const otRadioFrame *aFrame, otMacAddress *aMacAddress)
+{
+ otError error;
+ Mac::Address address;
+
+ error = static_cast<const Mac::Frame *>(aFrame)->GetSrcAddr(address);
+ SuccessOrExit(error);
+
+ switch (address.GetType())
+ {
+ case Mac::Address::kTypeNone:
+ aMacAddress->mType = OT_MAC_ADDRESS_TYPE_NONE;
+ break;
+
+ case Mac::Address::kTypeShort:
+ aMacAddress->mType = OT_MAC_ADDRESS_TYPE_SHORT;
+ aMacAddress->mAddress.mShortAddress = address.GetShort();
+ break;
+
+ case Mac::Address::kTypeExtended:
+ aMacAddress->mType = OT_MAC_ADDRESS_TYPE_EXTENDED;
+ aMacAddress->mAddress.mExtAddress = address.GetExtended();
+ break;
+ }
+
+exit:
+ return error;
+}
+
+uint8_t otMacFrameGetSequence(const otRadioFrame *aFrame)
+{
+ return static_cast<const Mac::Frame *>(aFrame)->GetSequence();
+}
+
+void otMacFrameProcessTransmitAesCcm(otRadioFrame *aFrame, const otExtAddress *aExtAddress)
+{
+ static_cast<Mac::TxFrame *>(aFrame)->ProcessTransmitAesCcm(*static_cast<const Mac::ExtAddress *>(aExtAddress));
+}
diff --git a/examples/platforms/utils/mac_frame.h b/examples/platforms/utils/mac_frame.h
new file mode 100644
index 0000000..429a753
--- /dev/null
+++ b/examples/platforms/utils/mac_frame.h
@@ -0,0 +1,157 @@
+/*
+ * Copyright (c) 2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * @brief
+ * This file defines the mac frame interface for OpenThread platform radio drivers.
+ *
+ */
+
+#ifndef OPENTHREAD_UTILS_MAC_FRAME_H
+#define OPENTHREAD_UTILS_MAC_FRAME_H
+
+#include <openthread/platform/radio.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * This enumeration specifies the IEEE 802.15.4 Address type.
+ *
+ */
+typedef enum
+{
+ OT_MAC_ADDRESS_TYPE_NONE, ///< No address.
+ OT_MAC_ADDRESS_TYPE_SHORT, ///< IEEE 802.15.4 Short Address.
+ OT_MAC_ADDRESS_TYPE_EXTENDED, ///< IEEE 802.15.4 Extended Address.
+} otMacAddressType;
+
+/**
+ * This structure represents an IEEE 802.15.4 short or extended Address.
+ *
+ */
+typedef struct otMacAddress
+{
+ union
+ {
+ otShortAddress mShortAddress; ///< The IEEE 802.15.4 Short Address.
+ otExtAddress mExtAddress; ///< The IEEE 802.15.4 Extended Address.
+ } mAddress;
+
+ otMacAddressType mType; ///< The address type (short, extended, or none).
+} otMacAddress;
+
+/**
+ * Check if @p aFrame is an Ack frame.
+ *
+ * @param[in] aFrame A pointer to the frame.
+ *
+ * @retval true It is an ACK frame.
+ * @retval false It is not an ACK frame.
+ *
+ */
+bool otMacFrameIsAck(const otRadioFrame *aFrame);
+
+/**
+ * Check if @p aFrame is an Data Request Command.
+ *
+ * @param[in] aFrame A pointer to the frame.
+ *
+ * @retval true It is a Data Request Command frame.
+ * @retval false It is not a Data Request Command frame.
+ *
+ */
+bool otMacFrameIsDataRequest(const otRadioFrame *aFrame);
+
+/**
+ * Check if @p aFrame requests ACK.
+ *
+ * @param[in] aFrame A pointer to the frame.
+ *
+ * @retval true It requests ACK.
+ * @retval false It does not request ACK.
+ *
+ */
+bool otMacFrameIsAckRequested(const otRadioFrame *aFrame);
+
+/**
+ * Check if @p aFrame matches the @p aPandId and @p aShortAddress or @p aExtAddress.
+ *
+ * @param[in] aFrame A pointer to the frame.
+ * @param[in] aPanId The PAN id to match with.
+ * @param[in] aShortAddress The short address to match with.
+ * @param[in] aExtAddress The extended address to match with.
+ *
+ * @retval true It is a broadcast or matches with the PAN id and one of the addresses.
+ * @retval false It doesn't match.
+ *
+ */
+bool otMacFrameDoesAddrMatch(const otRadioFrame *aFrame,
+ otPanId aPanId,
+ otShortAddress aShortAddress,
+ const otExtAddress *aExtAddress);
+
+/**
+ * Get source MAC address.
+ *
+ * @param[in] aFrame A pointer to the frame.
+ * @param[out] aMacAddress A pointer to MAC address.
+ *
+ * @retval OT_ERROR_NONE Successfully got the source MAC address.
+ * @retval OT_ERROR_PARSE Failed to parse the source MAC address.
+ *
+ */
+otError otMacFrameGetSrcAddr(const otRadioFrame *aFrame, otMacAddress *aMacAddress);
+
+/**
+ * Get the sequence of @p aFrame.
+ *
+ * @param[in] aFrame A pointer to the frame.
+ *
+ * @returns The sequence of the frame.
+ *
+ */
+uint8_t otMacFrameGetSequence(const otRadioFrame *aFrame);
+
+/**
+ * This function performs AES CCM on the frame which is going to be sent.
+ *
+ * @param[in] aFrame A pointer to the MAC frame buffer that is going to be sent.
+ * @param[in] aExtAddress A pointer to the extended address, which will be used to generate nonce
+ * for AES CCM computation.
+ *
+ */
+void otMacFrameProcessTransmitAesCcm(otRadioFrame *aFrame, const otExtAddress *aExtAddress);
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+
+#endif // OPENTHREAD_UTILS_MAC_FRAME_H
diff --git a/examples/platforms/utils/settings.h b/examples/platforms/utils/settings.h
new file mode 100644
index 0000000..6cae2be
--- /dev/null
+++ b/examples/platforms/utils/settings.h
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2016-2020, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file defines the configuration options for platform abstraction of non-volatile storage of settings.
+ *
+ */
+
+#ifndef UTILS_SETTINGS_H_
+#define UTILS_SETTINGS_H_
+
+#include <openthread-core-config.h>
+
+/**
+ * @def SETTINGS_CONFIG_BASE_ADDRESS
+ *
+ * The base address of settings.
+ *
+ */
+#ifndef SETTINGS_CONFIG_BASE_ADDRESS
+#define SETTINGS_CONFIG_BASE_ADDRESS 0x39000
+#endif
+
+/**
+ * @def SETTINGS_CONFIG_PAGE_SIZE
+ *
+ * The page size of settings.
+ *
+ */
+#ifndef SETTINGS_CONFIG_PAGE_SIZE
+#define SETTINGS_CONFIG_PAGE_SIZE 0x800
+#endif
+
+/**
+ * @def SETTINGS_CONFIG_PAGE_NUM
+ *
+ * The page number of settings.
+ *
+ */
+#ifndef SETTINGS_CONFIG_PAGE_NUM
+#define SETTINGS_CONFIG_PAGE_NUM 2
+#endif
+
+/**
+ * @def OPENTHREAD_SETTINGS_RAM
+ *
+ * Define as 1 to enable saving the settings in RAM instead of flash.
+ *
+ */
+#ifndef OPENTHREAD_SETTINGS_RAM
+#define OPENTHREAD_SETTINGS_RAM 0
+#endif
+
+#endif // UTILS_SETTINGS_H_
diff --git a/examples/platforms/utils/settings_flash.c b/examples/platforms/utils/settings_flash.c
index 47c06e5..a75ea07 100644
--- a/examples/platforms/utils/settings_flash.c
+++ b/examples/platforms/utils/settings_flash.c
@@ -32,17 +32,17 @@
*
*/
+#include "settings.h"
+
#include <assert.h>
#include <stddef.h>
#include <stdlib.h>
-
-#include <openthread-core-config.h>
+#include <string.h>
#include <openthread/instance.h>
#include <openthread/platform/settings.h>
#include "utils/code_utils.h"
-#include "utils/wrap_string.h"
#include "flash.h"
@@ -67,36 +67,6 @@
uint16_t reserved;
} OT_TOOL_PACKED_END;
-/**
- * @def SETTINGS_CONFIG_BASE_ADDRESS
- *
- * The base address of settings.
- *
- */
-#ifndef SETTINGS_CONFIG_BASE_ADDRESS
-#define SETTINGS_CONFIG_BASE_ADDRESS 0x39000
-#endif // SETTINGS_CONFIG_BASE_ADDRESS
-
-/**
- * @def SETTINGS_CONFIG_PAGE_SIZE
- *
- * The page size of settings.
- *
- */
-#ifndef SETTINGS_CONFIG_PAGE_SIZE
-#define SETTINGS_CONFIG_PAGE_SIZE 0x800
-#endif // SETTINGS_CONFIG_PAGE_SIZE
-
-/**
- * @def SETTINGS_CONFIG_PAGE_NUM
- *
- * The page number of settings.
- *
- */
-#ifndef SETTINGS_CONFIG_PAGE_NUM
-#define SETTINGS_CONFIG_PAGE_NUM 2
-#endif // SETTINGS_CONFIG_PAGE_NUM
-
#if (SETTINGS_CONFIG_PAGE_NUM <= 1)
#error "Invalid value for `SETTINGS_CONFIG_PAGE_NUM` (should be >= 2)"
#endif
diff --git a/examples/platforms/utils/settings_ram.c b/examples/platforms/utils/settings_ram.c
index ed4d821..4ac9e2c 100644
--- a/examples/platforms/utils/settings_ram.c
+++ b/examples/platforms/utils/settings_ram.c
@@ -32,7 +32,7 @@
*
*/
-#include <openthread-core-config.h>
+#include "settings.h"
#include <assert.h>
#include <stddef.h>
@@ -63,6 +63,11 @@
sSettingsBufLength = 0;
}
+void otPlatSettingsDeinit(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+}
+
otError otPlatSettingsGet(otInstance *aInstance, uint16_t aKey, int aIndex, uint8_t *aValue, uint16_t *aValueLength)
{
OT_UNUSED_VARIABLE(aInstance);
diff --git a/examples/platforms/utils/soft_source_match_table.c b/examples/platforms/utils/soft_source_match_table.c
index af53a34..67fbdca 100644
--- a/examples/platforms/utils/soft_source_match_table.c
+++ b/examples/platforms/utils/soft_source_match_table.c
@@ -37,6 +37,7 @@
#include "utils/soft_source_match_table.h"
#include <stdlib.h>
+#include <string.h>
#include "common/logging.hpp"
#include "utils/code_utils.h"
@@ -59,12 +60,12 @@
static sSrcMatchShortEntry srcMatchShortEntry[RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM];
-int8_t utilsSoftSrcMatchShortFindEntry(const uint16_t aShortAddress)
+int16_t utilsSoftSrcMatchShortFindEntry(uint16_t aShortAddress)
{
- int8_t entry = -1;
+ int16_t entry = -1;
uint16_t checksum = aShortAddress + sPanId;
- for (uint8_t i = 0; i < RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM; i++)
+ for (int16_t i = 0; i < RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM; i++)
{
if (checksum == srcMatchShortEntry[i].checksum && srcMatchShortEntry[i].allocated)
{
@@ -76,11 +77,11 @@
return entry;
}
-static inline int8_t findSrcMatchShortAvailEntry(void)
+static int16_t findSrcMatchShortAvailEntry(void)
{
- int8_t entry = -1;
+ int16_t entry = -1;
- for (uint8_t i = 0; i < RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM; i++)
+ for (int16_t i = 0; i < RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM; i++)
{
if (!srcMatchShortEntry[i].allocated)
{
@@ -92,7 +93,7 @@
return entry;
}
-static inline void addToSrcMatchShortIndirect(uint8_t entry, const uint16_t aShortAddress)
+static inline void addToSrcMatchShortIndirect(uint16_t entry, uint16_t aShortAddress)
{
uint16_t checksum = aShortAddress + sPanId;
@@ -100,43 +101,43 @@
srcMatchShortEntry[entry].allocated = true;
}
-static inline void removeFromSrcMatchShortIndirect(uint8_t entry)
+static inline void removeFromSrcMatchShortIndirect(uint16_t entry)
{
srcMatchShortEntry[entry].allocated = false;
srcMatchShortEntry[entry].checksum = 0;
}
-otError otPlatRadioAddSrcMatchShortEntry(otInstance *aInstance, const uint16_t aShortAddress)
+otError otPlatRadioAddSrcMatchShortEntry(otInstance *aInstance, uint16_t aShortAddress)
{
OT_UNUSED_VARIABLE(aInstance);
otError error = OT_ERROR_NONE;
- int8_t entry = -1;
+ int16_t entry = -1;
entry = findSrcMatchShortAvailEntry();
otLogDebgPlat("Add ShortAddr entry: %d", entry);
otEXPECT_ACTION(entry >= 0 && entry < RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM, error = OT_ERROR_NO_BUFS);
- addToSrcMatchShortIndirect(entry, aShortAddress);
+ addToSrcMatchShortIndirect((uint16_t)entry, aShortAddress);
exit:
return error;
}
-otError otPlatRadioClearSrcMatchShortEntry(otInstance *aInstance, const uint16_t aShortAddress)
+otError otPlatRadioClearSrcMatchShortEntry(otInstance *aInstance, uint16_t aShortAddress)
{
OT_UNUSED_VARIABLE(aInstance);
otError error = OT_ERROR_NONE;
- int8_t entry = -1;
+ int16_t entry = -1;
entry = utilsSoftSrcMatchShortFindEntry(aShortAddress);
otLogDebgPlat("Clear ShortAddr entry: %d", entry);
otEXPECT_ACTION(entry >= 0 && entry < RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM, error = OT_ERROR_NO_ADDRESS);
- removeFromSrcMatchShortIndirect(entry);
+ removeFromSrcMatchShortIndirect((uint16_t)entry);
exit:
return error;
@@ -161,9 +162,9 @@
static sSrcMatchExtEntry srcMatchExtEntry[RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM];
-int8_t utilsSoftSrcMatchExtFindEntry(const otExtAddress *aExtAddress)
+int16_t utilsSoftSrcMatchExtFindEntry(const otExtAddress *aExtAddress)
{
- int8_t entry = -1;
+ int16_t entry = -1;
uint16_t checksum = sPanId;
checksum += (uint16_t)aExtAddress->m8[0] | (uint16_t)(aExtAddress->m8[1] << 8);
@@ -171,7 +172,7 @@
checksum += (uint16_t)aExtAddress->m8[4] | (uint16_t)(aExtAddress->m8[5] << 8);
checksum += (uint16_t)aExtAddress->m8[6] | (uint16_t)(aExtAddress->m8[7] << 8);
- for (uint8_t i = 0; i < RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM; i++)
+ for (int16_t i = 0; i < RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM; i++)
{
if (checksum == srcMatchExtEntry[i].checksum && srcMatchExtEntry[i].allocated)
{
@@ -183,11 +184,11 @@
return entry;
}
-static inline int8_t findSrcMatchExtAvailEntry(void)
+static int16_t findSrcMatchExtAvailEntry(void)
{
- int8_t entry = -1;
+ int16_t entry = -1;
- for (uint8_t i = 0; i < RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM; i++)
+ for (int16_t i = 0; i < RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM; i++)
{
if (!srcMatchExtEntry[i].allocated)
{
@@ -199,7 +200,7 @@
return entry;
}
-static inline void addToSrcMatchExtIndirect(uint8_t entry, const otExtAddress *aExtAddress)
+static inline void addToSrcMatchExtIndirect(uint16_t entry, const otExtAddress *aExtAddress)
{
uint16_t checksum = sPanId;
@@ -212,7 +213,7 @@
srcMatchExtEntry[entry].allocated = true;
}
-static inline void removeFromSrcMatchExtIndirect(uint8_t entry)
+static inline void removeFromSrcMatchExtIndirect(uint16_t entry)
{
srcMatchExtEntry[entry].allocated = false;
srcMatchExtEntry[entry].checksum = 0;
@@ -223,14 +224,14 @@
OT_UNUSED_VARIABLE(aInstance);
otError error = OT_ERROR_NONE;
- int8_t entry = -1;
+ int16_t entry = -1;
entry = findSrcMatchExtAvailEntry();
otLogDebgPlat("Add ExtAddr entry: %d", entry);
otEXPECT_ACTION(entry >= 0 && entry < RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM, error = OT_ERROR_NO_BUFS);
- addToSrcMatchExtIndirect(entry, aExtAddress);
+ addToSrcMatchExtIndirect((uint16_t)entry, aExtAddress);
exit:
return error;
@@ -241,14 +242,14 @@
OT_UNUSED_VARIABLE(aInstance);
otError error = OT_ERROR_NONE;
- int8_t entry = -1;
+ int16_t entry = -1;
entry = utilsSoftSrcMatchExtFindEntry(aExtAddress);
otLogDebgPlat("Clear ExtAddr entry: %d", entry);
otEXPECT_ACTION(entry >= 0 && entry < RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM, error = OT_ERROR_NO_ADDRESS);
- removeFromSrcMatchExtIndirect(entry);
+ removeFromSrcMatchExtIndirect((uint16_t)entry);
exit:
return error;
diff --git a/examples/platforms/utils/soft_source_match_table.h b/examples/platforms/utils/soft_source_match_table.h
index 4fcdedd..f34427a 100644
--- a/examples/platforms/utils/soft_source_match_table.h
+++ b/examples/platforms/utils/soft_source_match_table.h
@@ -46,11 +46,11 @@
#endif
#ifndef RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM
-#define RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM 0
+#define RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM OPENTHREAD_CONFIG_MLE_MAX_CHILDREN
#endif
#ifndef RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM
-#define RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM 0
+#define RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM OPENTHREAD_CONFIG_MLE_MAX_CHILDREN
#endif
#if RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM || RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM
@@ -58,11 +58,11 @@
#endif // RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM || RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM
#if RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM
-int8_t utilsSoftSrcMatchShortFindEntry(const uint16_t aShortAddress);
+int16_t utilsSoftSrcMatchShortFindEntry(uint16_t aShortAddress);
#endif // RADIO_CONFIG_SRC_MATCH_SHORT_ENTRY_NUM
#if RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM
-int8_t utilsSoftSrcMatchExtFindEntry(const otExtAddress *aExtAddress);
+int16_t utilsSoftSrcMatchExtFindEntry(const otExtAddress *aExtAddress);
#endif // RADIO_CONFIG_SRC_MATCH_EXT_ENTRY_NUM
#ifdef __cplusplus
diff --git a/include/openthread/channel_manager.h b/include/openthread/channel_manager.h
index 56342c1..b4ef6a9 100644
--- a/include/openthread/channel_manager.h
+++ b/include/openthread/channel_manager.h
@@ -127,8 +127,6 @@
*
* @retval OT_ERROR_NONE Channel selection finished successfully.
* @retval OT_ERROR_NOT_FOUND Supported channel mask is empty, therefore could not select a channel.
- * @retval OT_ERROR_INVALID_STATE Thread is not enabled or not enough data to select a new channel.
- * @retval OT_ERROR_DISABLED_FEATURE `ChannelMonitor` feature is disabled by build-time configuration options.
*
*/
otError otChannelManagerRequestChannelSelect(otInstance *aInstance, bool aSkipQualityCheck);
diff --git a/include/openthread/coap.h b/include/openthread/coap.h
index b6fd555..f02cb1b 100644
--- a/include/openthread/coap.h
+++ b/include/openthread/coap.h
@@ -150,6 +150,17 @@
} otCoapOption;
/**
+ * This structure acts as an iterator for CoAP options
+ *
+ */
+typedef struct otCoapOptionIterator
+{
+ const otMessage *mMessage; ///< CoAP message
+ otCoapOption mOption; ///< CoAP message option
+ uint16_t mNextOptionOffset; ///< Byte offset of next option
+} otCoapOptionIterator;
+
+/**
* CoAP Content Format codes. The full list is documented at
* https://www.iana.org/assignments/core-parameters/core-parameters.xhtml#content-formats
*/
@@ -343,6 +354,22 @@
void otCoapMessageInit(otMessage *aMessage, otCoapType aType, otCoapCode aCode);
/**
+ * This function initializes a response message.
+ *
+ * @note Both message ID and token are set according to @p aRequest.
+ *
+ * @param[inout] aResponse A pointer to the CoAP response message.
+ * @param[in] aRequest A pointer to the CoAP request message.
+ * @param[in] aType CoAP message type.
+ * @param[in] aCode CoAP message code.
+ *
+ * @retval OT_ERROR_NONE Successfully initialized the response message.
+ * @retval OT_ERROR_NO_BUFS Insufficient message buffers available to initialize the response message.
+ *
+ */
+otError otCoapMessageInitResponse(otMessage *aResponse, const otMessage *aRequest, otCoapType aType, otCoapCode aCode);
+
+/**
* This function sets the Token value and length in a header.
*
* @param[inout] aMessage A pointer to the CoAP message.
@@ -491,15 +518,6 @@
otError otCoapMessageSetPayloadMarker(otMessage *aMessage);
/**
- * This function sets the Message ID value.
- *
- * @param[in] aMessage A pointer to the CoAP message.
- * @param[in] aMessageId The Message ID value.
- *
- */
-void otCoapMessageSetMessageId(otMessage *aMessage, uint16_t aMessageId);
-
-/**
* This function returns the Type value.
*
* @param[in] aMessage A pointer to the CoAP message.
@@ -560,36 +578,48 @@
const uint8_t *otCoapMessageGetToken(const otMessage *aMessage);
/**
+ * This function initialises an iterator for the options in the given message.
+ *
+ * @param[inout] aIterator A pointer to the CoAP message option iterator.
+ * @param[in] aMessage A pointer to the CoAP message.
+ *
+ * @retval OT_ERROR_NONE Successfully initialised.
+ * @retval OT_ERROR_PARSE Message state is inconsistent.
+ *
+ */
+otError otCoapOptionIteratorInit(otCoapOptionIterator *aIterator, const otMessage *aMessage);
+
+/**
* This function returns a pointer to the first option.
*
- * @param[in] aMessage A pointer to the CoAP message.
+ * @param[inout] aIterator A pointer to the CoAP message option iterator.
*
* @returns A pointer to the first option. If no option is present NULL pointer is returned.
*
*/
-const otCoapOption *otCoapMessageGetFirstOption(otMessage *aMessage);
+const otCoapOption *otCoapOptionIteratorGetFirstOption(otCoapOptionIterator *aIterator);
/**
* This function returns a pointer to the next option.
*
- * @param[in] aMessage A pointer to the CoAP message.
+ * @param[inout] aIterator A pointer to the CoAP message option iterator.
*
* @returns A pointer to the next option. If no more options are present NULL pointer is returned.
*
*/
-const otCoapOption *otCoapMessageGetNextOption(otMessage *aMessage);
+const otCoapOption *otCoapOptionIteratorGetNextOption(otCoapOptionIterator *aIterator);
/**
* This function fills current option value into @p aValue.
*
- * @param[in] aMessage A pointer to the CoAP message.
- * @param[out] aValue A pointer to a buffer to receive the option value.
+ * @param[inout] aIterator A pointer to the CoAP message option iterator.
+ * @param[out] aValue A pointer to a buffer to receive the option value.
*
* @retval OT_ERROR_NONE Successfully filled value.
* @retval OT_ERROR_NOT_FOUND No current option.
*
*/
-otError otCoapMessageGetOptionValue(otMessage *aMessage, void *aValue);
+otError otCoapOptionIteratorGetOptionValue(otCoapOptionIterator *aIterator, void *aValue);
/**
* This function creates a new CoAP message.
diff --git a/include/openthread/coap_secure.h b/include/openthread/coap_secure.h
index ab12362..e939fe5 100644
--- a/include/openthread/coap_secure.h
+++ b/include/openthread/coap_secure.h
@@ -32,6 +32,9 @@
* This file defines the top-level functions for the OpenThread CoAP Secure implementation.
*
* @note
+ * The functions in this module require the build-time feature `OPENTHREAD_CONFIG_COAP_SECURE_API_ENABLE=1`.
+ *
+ * @note
* To enable cipher suite DTLS_PSK_WITH_AES_128_CCM_8, MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
* must be enabled in mbedtls-config.h
* To enable cipher suite DTLS_ECDHE_ECDSA_WITH_AES_128_CCM_8,
@@ -96,34 +99,34 @@
* This method sets the Pre-Shared Key (PSK) and cipher suite
* DTLS_PSK_WITH_AES_128_CCM_8.
*
+ * @note This function requires the build-time feature `MBEDTLS_KEY_EXCHANGE_PSK_ENABLED` to be enabled.
+ *
* @param[in] aInstance A pointer to an OpenThread instance.
* @param[in] aPsk A pointer to the PSK.
* @param[in] aPskLength The PSK length.
* @param[in] aPskIdentity The Identity Name for the PSK.
* @param[in] aPskIdLength The PSK Identity Length.
*
- * @retval OT_ERROR_NONE Successfully set the PSK.
- * @retval OT_ERROR_INVALID_ARGS The PSK is invalid.
- * @retval OT_ERROR_DISABLED_FEATURE Mbedtls config not enabled
- * MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
- *
*/
-otError otCoapSecureSetPsk(otInstance * aInstance,
- const uint8_t *aPsk,
- uint16_t aPskLength,
- const uint8_t *aPskIdentity,
- uint16_t aPskIdLength);
+void otCoapSecureSetPsk(otInstance * aInstance,
+ const uint8_t *aPsk,
+ uint16_t aPskLength,
+ const uint8_t *aPskIdentity,
+ uint16_t aPskIdLength);
/**
* This method returns the peer x509 certificate base64 encoded.
*
+ * @note This function requires the build-time feature `MBEDTLS_BASE64_C` to be enabled.
+ *
* @param[in] aInstance A pointer to an OpenThread instance.
* @param[out] aPeerCert A pointer to the base64 encoded certificate buffer.
* @param[out] aCertLength The length of the base64 encoded peer certificate.
* @param[in] aCertBufferSize The buffer size of aPeerCert.
*
- * @retval OT_ERROR_NONE Successfully get the peer certificate.
- * @retval OT_ERROR_DISABLED_FEATURE Mbedtls config not enabled MBEDTLS_BASE64_C.
+ * @retval OT_ERROR_INVALID_STATE Not connected yet.
+ * @retval OT_ERROR_NONE Successfully get the peer certificate.
+ * @retval OT_ERROR_NO_BUFS Can't allocate memory for certificate.
*
*/
otError otCoapSecureGetPeerCertificateBase64(otInstance * aInstance,
@@ -147,23 +150,20 @@
* This method sets the local device's X509 certificate with corresponding private key for
* DTLS session with DTLS_ECDHE_ECDSA_WITH_AES_128_CCM_8.
*
+ * @note This function requires `MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED=1`.
+ *
* @param[in] aInstance A pointer to an OpenThread instance.
* @param[in] aX509Cert A pointer to the PEM formatted X509 certificate.
* @param[in] aX509Length The length of certificate.
* @param[in] aPrivateKey A pointer to the PEM formatted private key.
* @param[in] aPrivateKeyLength The length of the private key.
*
- * @retval OT_ERROR_NONE Successfully set the x509 certificate
- * with his private key.
- * @retval OT_ERROR_DISABLED_FEATURE Mbedtls config not enabled
- * MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED.
- *
*/
-otError otCoapSecureSetCertificate(otInstance * aInstance,
- const uint8_t *aX509Cert,
- uint32_t aX509Length,
- const uint8_t *aPrivateKey,
- uint32_t aPrivateKeyLength);
+void otCoapSecureSetCertificate(otInstance * aInstance,
+ const uint8_t *aX509Cert,
+ uint32_t aX509Length,
+ const uint8_t *aPrivateKey,
+ uint32_t aPrivateKeyLength);
/**
* This method sets the trusted top level CAs. It is needed for validating the
@@ -171,16 +171,16 @@
*
* DTLS mode "ECDHE ECDSA with AES 128 CCM 8" for Application CoAPS.
*
+ * @note This function requires `MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED=1`.
+ *
* @param[in] aInstance A pointer to an OpenThread instance.
* @param[in] aX509CaCertificateChain A pointer to the PEM formatted X509 CA chain.
* @param[in] aX509CaCertChainLength The length of chain.
*
- * @retval OT_ERROR_NONE Successfully set the trusted top level CAs.
- *
*/
-otError otCoapSecureSetCaCertificateChain(otInstance * aInstance,
- const uint8_t *aX509CaCertificateChain,
- uint32_t aX509CaCertChainLength);
+void otCoapSecureSetCaCertificateChain(otInstance * aInstance,
+ const uint8_t *aX509CaCertificateChain,
+ uint32_t aX509CaCertChainLength);
/**
* This method initializes DTLS session with a peer.
diff --git a/include/openthread/commissioner.h b/include/openthread/commissioner.h
index 593eca2..169ac1e 100644
--- a/include/openthread/commissioner.h
+++ b/include/openthread/commissioner.h
@@ -81,6 +81,8 @@
#define OT_COMMISSIONING_PASSPHRASE_MIN_SIZE 6 ///< Minimum size of the Commissioning Passphrase
#define OT_COMMISSIONING_PASSPHRASE_MAX_SIZE 255 ///< Maximum size of the Commissioning Passphrase
+#define OT_PROVISIONING_URL_MAX_SIZE 64 ///< Max size (number of chars) in Provisioning URL string (excludes null char).
+
#define OT_STEERING_DATA_MAX_LENGTH 16 ///< Max steering data length (bytes)
/**
@@ -110,6 +112,21 @@
bool mIsJoinerUdpPortSet : 1; ///< TRUE if Joiner UDP Port is set, FALSE otherwise.
} otCommissioningDataset;
+#define OT_PSKD_MAX_SIZE 32 ///< Size of a Joiner PSKd (bytes)
+
+/**
+ * This structure represents a Joiner Info.
+ *
+ */
+typedef struct otJoinerInfo
+{
+ otExtAddress mEui64; ///< Joiner eui64
+ char mPsk[OT_PSKD_MAX_SIZE + 1]; ///< Joiner pskd
+ uint32_t mExpirationTime; ///< Joiner expiration time in msec
+
+ bool mAny : 1; /// TRUE if eui64 isn't set, FALSE otherwise.
+} otJoinerInfo;
+
/**
* This function pointer is called whenever the commissioner state changes.
*
@@ -166,12 +183,12 @@
*
* @param[in] aInstance A pointer to an OpenThread instance.
* @param[in] aEui64 A pointer to the Joiner's IEEE EUI-64 or NULL for any Joiner.
- * @param[in] aPSKd A pointer to the PSKd.
+ * @param[in] aPskd A pointer to the PSKd.
* @param[in] aTimeout A time after which a Joiner is automatically removed, in seconds.
*
* @retval OT_ERROR_NONE Successfully added the Joiner.
* @retval OT_ERROR_NO_BUFS No buffers available to add the Joiner.
- * @retval OT_ERROR_INVALID_ARGS @p aEui64 or @p aPSKd is invalid.
+ * @retval OT_ERROR_INVALID_ARGS @p aEui64 or @p aPskd is invalid.
* @retval OT_ERROR_INVALID_STATE The commissioner is not active.
*
* @note Only use this after successfully starting the Commissioner role with otCommissionerStart().
@@ -179,10 +196,23 @@
*/
otError otCommissionerAddJoiner(otInstance * aInstance,
const otExtAddress *aEui64,
- const char * aPSKd,
+ const char * aPskd,
uint32_t aTimeout);
/**
+ * This method get joiner info at aIterator position.
+ *
+ * @param[in] aInstance A pointer to instance.
+ * @param[inout] aIterator A pointer to the Joiner Info iterator context.
+ * @param[out] aJoiner A reference to Joiner info.
+ *
+ * @retval OT_ERROR_NONE Successfully get the Joiner info.
+ * @retval OT_ERROR_NOT_FOUND Not found next Joiner.
+ *
+ */
+otError otCommissionerGetNextJoinerInfo(otInstance *aInstance, uint16_t *aIterator, otJoinerInfo *aJoiner);
+
+/**
* This function removes a Joiner entry.
*
* @param[in] aInstance A pointer to an OpenThread instance.
@@ -202,23 +232,20 @@
* This function gets the Provisioning URL.
*
* @param[in] aInstance A pointer to an OpenThread instance.
- * @param[out] aLength A pointer to `uint16_t` to return the length (number of chars) in the URL string.
*
- * Note that the returned URL string buffer is not necessarily null-terminated.
- *
- * @returns A pointer to char buffer containing the URL string, or NULL if @p aLength is NULL.
+ * @returns A pointer to the URL string.
*
*/
-const char *otCommissionerGetProvisioningUrl(otInstance *aInstance, uint16_t *aLength);
+const char *otCommissionerGetProvisioningUrl(otInstance *aInstance);
/**
* This function sets the Provisioning URL.
*
* @param[in] aInstance A pointer to an OpenThread instance.
- * @param[in] aProvisioningUrl A pointer to the Provisioning URL (may be NULL).
+ * @param[in] aProvisioningUrl A pointer to the Provisioning URL (may be NULL to set as empty string).
*
* @retval OT_ERROR_NONE Successfully set the Provisioning URL.
- * @retval OT_ERROR_INVALID_ARGS @p aProvisioningUrl is invalid.
+ * @retval OT_ERROR_INVALID_ARGS @p aProvisioningUrl is invalid (too long).
*
*/
otError otCommissionerSetProvisioningUrl(otInstance *aInstance, const char *aProvisioningUrl);
@@ -376,25 +403,23 @@
otCommissionerState otCommissionerGetState(otInstance *aInstance);
/**
- * This method generates PSKc.
+ * This helper function generates PSKc from a given pass-phrase, network name, and extended PAN Id.
*
* PSKc is used to establish the Commissioner Session.
*
- * @param[in] aInstance A pointer to an OpenThread instance.
- * @param[in] aPassPhrase The commissioning passphrase.
+ * @param[in] aPassPhrase The commissioning pass-phrase.
* @param[in] aNetworkName The network name for PSKc computation.
- * @param[in] aExtPanId The extended pan id for PSKc computation.
- * @param[out] aPSKc A pointer to the generated PSKc.
+ * @param[in] aExtPanId The extended PAN ID for PSKc computation.
+ * @param[out] aPskc A pointer to variable to output the generated PSKc.
*
* @retval OT_ERROR_NONE Successfully generate PSKc.
* @retval OT_ERROR_INVALID_ARGS If any of the input arguments is invalid.
*
*/
-otError otCommissionerGeneratePSKc(otInstance * aInstance,
- const char * aPassPhrase,
+otError otCommissionerGeneratePskc(const char * aPassPhrase,
const char * aNetworkName,
const otExtendedPanId *aExtPanId,
- uint8_t * aPSKc);
+ otPskc * aPskc);
/**
* @}
diff --git a/include/openthread/dataset.h b/include/openthread/dataset.h
index 3ab8fa0..35a4f15 100644
--- a/include/openthread/dataset.h
+++ b/include/openthread/dataset.h
@@ -124,7 +124,7 @@
*
*/
OT_TOOL_PACKED_BEGIN
-struct otPSKc
+struct otPskc
{
uint8_t m8[OT_PSKC_MAX_SIZE]; ///< Byte values
} OT_TOOL_PACKED_END;
@@ -133,7 +133,7 @@
* This structure represents a PSKc.
*
*/
-typedef struct otPSKc otPSKc;
+typedef struct otPskc otPskc;
/**
* This structure represent Security Policy.
@@ -206,7 +206,7 @@
bool mIsDelayPresent : 1; ///< TRUE if Delay Timer is present, FALSE otherwise.
bool mIsPanIdPresent : 1; ///< TRUE if PAN ID is present, FALSE otherwise.
bool mIsChannelPresent : 1; ///< TRUE if Channel is present, FALSE otherwise.
- bool mIsPSKcPresent : 1; ///< TRUE if PSKc is present, FALSE otherwise.
+ bool mIsPskcPresent : 1; ///< TRUE if PSKc is present, FALSE otherwise.
bool mIsSecurityPolicyPresent : 1; ///< TRUE if Security Policy is present, FALSE otherwise.
bool mIsChannelMaskPresent : 1; ///< TRUE if Channel Mask is present, FALSE otherwise.
} otOperationalDatasetComponents;
@@ -228,7 +228,7 @@
uint32_t mDelay; ///< Delay Timer
otPanId mPanId; ///< PAN ID
uint16_t mChannel; ///< Channel
- otPSKc mPSKc; ///< PSKc
+ otPskc mPskc; ///< PSKc
otSecurityPolicy mSecurityPolicy; ///< Security Policy
otChannelMask mChannelMask; ///< Channel Mask
otOperationalDatasetComponents mComponents; ///< Specifies which components are set in the Dataset.
diff --git a/include/openthread/dns.h b/include/openthread/dns.h
index f38ca9b..a964781 100644
--- a/include/openthread/dns.h
+++ b/include/openthread/dns.h
@@ -85,11 +85,11 @@
* @retval OT_ERROR_FAILED A response was received but status code is different than success.
*
*/
-typedef void (*otDnsResponseHandler)(void * aContext,
- const char * aHostname,
- otIp6Address *aAddress,
- uint32_t aTtl,
- otError aResult);
+typedef void (*otDnsResponseHandler)(void * aContext,
+ const char * aHostname,
+ const otIp6Address *aAddress,
+ uint32_t aTtl,
+ otError aResult);
/**
* This function sends a DNS query for AAAA (IPv6) record.
diff --git a/include/openthread/error.h b/include/openthread/error.h
index 7057a01..e1019a2 100644
--- a/include/openthread/error.h
+++ b/include/openthread/error.h
@@ -42,127 +42,6 @@
#endif
/**
- * @defgroup api API
- * @brief
- * This module includes the application programming interface to the OpenThread stack.
- *
- * @{
- *
- * @defgroup api-error Error
- *
- * @defgroup api-execution Execution
- *
- * @{
- *
- * @defgroup api-instance Instance
- * @defgroup api-tasklets Tasklets
- *
- * @}
- *
- * @defgroup api-net IPv6 Networking
- * @{
- *
- * @defgroup api-dns DNSv6
- * @defgroup api-icmp6 ICMPv6
- * @defgroup api-ip6 IPv6
- * @defgroup api-udp-group UDP
- *
- * @{
- *
- * @defgroup api-udp UDP
- * @defgroup api-udp-forward UDP Forward
- *
- * @}
- *
- * @}
- *
- * @defgroup api-link Link
- *
- * @{
- *
- * @defgroup api-link-link Link
- * @defgroup api-link-raw Raw Link
- *
- * @}
- *
- * @defgroup api-message Message
- *
- * @defgroup api-thread Thread
- *
- * @{
- *
- * @defgroup api-border-agent Border Agent
- * @defgroup api-border-router Border Router
- * @defgroup api-commissioner Commissioner
- * @defgroup api-thread-general General
- * @brief This module includes functions for all Thread roles.
- * @defgroup api-joiner Joiner
- * @defgroup api-thread-router Router/Leader
- * @brief This module includes functions for Thread Routers and Leaders.
- * @defgroup api-server Server
- *
- * @}
- *
- * @defgroup api-addons Add-Ons
- *
- * @{
- *
- * @defgroup api-channel-manager Channel Manager
- * @defgroup api-channel-monitor Channel Monitoring
- * @defgroup api-child-supervision Child Supervision
- * @defgroup api-coap-group CoAP
- *
- * @{
- *
- * @defgroup api-coap CoAP
- * @defgroup api-coap-secure CoAP Secure
- *
- * @}
- *
- * @defgroup api-cli Command Line Interface
- * @defgroup api-crypto Crypto
- * @defgroup api-entropy Entropy Source
- * @defgroup api-factory-diagnostics Factory Diagnostics
- * @defgroup api-jam-detection Jam Detection
- * @defgroup api-logging Logging
- * @defgroup api-ncp Network Co-Processor
- * @defgroup api-network-time Network Time Synchronization
- * @defgroup api-random Random Number Generator
- * @defgroup api-sntp SNTP
- *
- * @}
- *
- * @}
- *
- */
-
-/**
- * @defgroup platform Platform Abstraction
- * @brief
- * This module includes the platform abstraction used by the OpenThread stack.
- *
- * @{
- *
- * @defgroup plat-alarm Alarm
- * @defgroup plat-ble BLE Host
- * @defgroup plat-entropy Entropy
- * @defgroup plat-factory-diagnostics Factory Diagnostics
- * @defgroup plat-logging Logging
- * @defgroup plat-memory Memory
- * @defgroup plat-messagepool Message Pool
- * @defgroup plat-misc Miscellaneous
- * @defgroup plat-radio Radio
- * @defgroup plat-settings Settings
- * @defgroup plat-spi-slave SPI Slave
- * @defgroup plat-time Time Service
- * @defgroup plat-toolchain Toolchain
- * @defgroup plat-uart UART
- *
- * @}
- *
- */
-
-/**
* @addtogroup api-error
*
* @brief
@@ -340,11 +219,6 @@
OT_ERROR_NOT_LOWPAN_DATA_FRAME = 32,
/**
- * A feature/functionality disabled by build-time configuration options.
- */
- OT_ERROR_DISABLED_FEATURE = 33,
-
- /**
* The link margin was too low.
*/
OT_ERROR_LINK_MARGIN_LOW = 34,
diff --git a/include/openthread/heap.h b/include/openthread/heap.h
index 6f2a4a8..ca93be3 100644
--- a/include/openthread/heap.h
+++ b/include/openthread/heap.h
@@ -72,6 +72,22 @@
*/
typedef void (*otHeapFreeFn)(void *aPointer);
+// This is a temporary API and would be removed after moving heap to platform.
+// TODO: Remove after moving heap to platform.
+/**
+ * @note This API is deprecated and use of it is discouraged.
+ *
+ */
+void *otHeapCAlloc(size_t aCount, size_t aSize);
+
+// This is a temporary API and would be removed after moving heap to platform.
+// TODO: Remove after moving heap to platform.
+/**
+ * @note This API is deprecated and use of it is discouraged.
+ *
+ */
+void otHeapFree(void *aPointer);
+
/**
* This function sets the external heap CAlloc and Free
* functions to be used by the OpenThread stack.
diff --git a/include/openthread/icmp6.h b/include/openthread/icmp6.h
index 7363e3a..d249f20 100644
--- a/include/openthread/icmp6.h
+++ b/include/openthread/icmp6.h
@@ -58,9 +58,11 @@
*/
typedef enum otIcmp6Type
{
- OT_ICMP6_TYPE_DST_UNREACH = 1, ///< Destination Unreachable
- OT_ICMP6_TYPE_ECHO_REQUEST = 128, ///< Echo Request
- OT_ICMP6_TYPE_ECHO_REPLY = 129, ///< Echo Reply
+ OT_ICMP6_TYPE_DST_UNREACH = 1, ///< Destination Unreachable
+ OT_ICMP6_TYPE_PACKET_TO_BIG = 2, ///< Packet To Big
+ OT_ICMP6_TYPE_TIME_EXCEEDED = 3, ///< Time Exceeded
+ OT_ICMP6_TYPE_ECHO_REQUEST = 128, ///< Echo Request
+ OT_ICMP6_TYPE_ECHO_REPLY = 129, ///< Echo Reply
} otIcmp6Type;
/**
@@ -70,6 +72,7 @@
typedef enum otIcmp6Code
{
OT_ICMP6_CODE_DST_UNREACH_NO_ROUTE = 0, ///< Destination Unreachable No Route
+ OT_ICMP6_CODE_FRAGM_REAS_TIME_EX = 1, ///< Fragment Reassembly Time Exceeded
} otIcmp6Code;
#define OT_ICMP6_HEADER_DATA_SIZE 4 ///< Size of an message specific data of ICMPv6 Header.
diff --git a/include/openthread/instance.h b/include/openthread/instance.h
index 0ae79ee..1657bf7 100644
--- a/include/openthread/instance.h
+++ b/include/openthread/instance.h
@@ -134,8 +134,8 @@
OT_CHANGED_THREAD_NETDATA = 1 << 9, ///< Thread Network Data changed
OT_CHANGED_THREAD_CHILD_ADDED = 1 << 10, ///< Child was added
OT_CHANGED_THREAD_CHILD_REMOVED = 1 << 11, ///< Child was removed
- OT_CHANGED_IP6_MULTICAST_SUBSRCRIBED = 1 << 12, ///< Subscribed to a IPv6 multicast address
- OT_CHANGED_IP6_MULTICAST_UNSUBSRCRIBED = 1 << 13, ///< Unsubscribed from a IPv6 multicast address
+ OT_CHANGED_IP6_MULTICAST_SUBSCRIBED = 1 << 12, ///< Subscribed to a IPv6 multicast address
+ OT_CHANGED_IP6_MULTICAST_UNSUBSCRIBED = 1 << 13, ///< Unsubscribed from a IPv6 multicast address
OT_CHANGED_THREAD_CHANNEL = 1 << 14, ///< Thread network channel changed
OT_CHANGED_THREAD_PANID = 1 << 15, ///< Thread network PAN Id changed
OT_CHANGED_THREAD_NETWORK_NAME = 1 << 16, ///< Thread network name changed
diff --git a/include/openthread/ip6.h b/include/openthread/ip6.h
index 8ef45c4..d20d38f 100644
--- a/include/openthread/ip6.h
+++ b/include/openthread/ip6.h
@@ -52,9 +52,10 @@
*
*/
-#define OT_IP6_PREFIX_SIZE 8 ///< Size of an IPv6 prefix (bytes)
-#define OT_IP6_IID_SIZE 8 ///< Size of an IPv6 Interface Identifier (bytes)
-#define OT_IP6_ADDRESS_SIZE 16 ///< Size of an IPv6 address (bytes)
+#define OT_IP6_PREFIX_SIZE 8 ///< Size of an IPv6 prefix (bytes)
+#define OT_IP6_PREFIX_BITSIZE (OT_IP6_PREFIX_SIZE * 8) ///< Size of an IPv6 prefix (bits)
+#define OT_IP6_IID_SIZE 8 ///< Size of an IPv6 Interface Identifier (bytes)
+#define OT_IP6_ADDRESS_SIZE 16 ///< Size of an IPv6 address (bytes)
/**
* @struct otIp6Address
@@ -139,13 +140,16 @@
*/
typedef struct otMessageInfo
{
- otIp6Address mSockAddr; ///< The local IPv6 address.
- otIp6Address mPeerAddr; ///< The peer IPv6 address.
- uint16_t mSockPort; ///< The local transport-layer port.
- uint16_t mPeerPort; ///< The peer transport-layer port.
- const void * mLinkInfo; ///< A pointer to link-specific information.
- uint8_t mHopLimit; ///< The IPv6 hop limit.
- bool mIsHostInterface : 1; ///< TRUE if packets sent/received via host interface, FALSE otherwise.
+ otIp6Address mSockAddr; ///< The local IPv6 address.
+ otIp6Address mPeerAddr; ///< The peer IPv6 address.
+ uint16_t mSockPort; ///< The local transport-layer port.
+ uint16_t mPeerPort; ///< The peer transport-layer port.
+ const void * mLinkInfo; ///< A pointer to link-specific information.
+ uint8_t mHopLimit; ///< The IPv6 Hop Limit value. Only applies if `mAllowZeroHopLimit` is FALSE.
+ ///< If `0`, IPv6 Hop Limit is default value `OPENTHREAD_CONFIG_IP6_HOP_LIMIT_DEFAULT`.
+ ///< Otherwise, specifies the IPv6 Hop Limit.
+ bool mIsHostInterface : 1; ///< TRUE if packets sent/received via host interface, FALSE otherwise.
+ bool mAllowZeroHopLimit : 1; ///< TRUE to allow IPv6 Hop Limit 0 in `mHopLimit`, FALSE otherwise.
} otMessageInfo;
/**
diff --git a/include/openthread/joiner.h b/include/openthread/joiner.h
index 9b287b6..13162cf 100644
--- a/include/openthread/joiner.h
+++ b/include/openthread/joiner.h
@@ -48,6 +48,9 @@
* @brief
* This module includes functions for the Thread Joiner role.
*
+ * @note
+ * The functions in this module require `OPENTHREAD_CONFIG_JOINER_ENABLE=1`.
+ *
* @{
*
*/
@@ -82,7 +85,7 @@
* This function enables the Thread Joiner role.
*
* @param[in] aInstance A pointer to an OpenThread instance.
- * @param[in] aPSKd A pointer to the PSKd.
+ * @param[in] aPskd A pointer to the PSKd.
* @param[in] aProvisioningUrl A pointer to the Provisioning URL (may be NULL).
* @param[in] aVendorName A pointer to the Vendor Name (may be NULL).
* @param[in] aVendorModel A pointer to the Vendor Model (may be NULL).
@@ -92,12 +95,11 @@
* @param[in] aContext A pointer to application-specific context.
*
* @retval OT_ERROR_NONE Successfully started the Commissioner role.
- * @retval OT_ERROR_INVALID_ARGS @p aPSKd or @p aProvisioningUrl is invalid.
- * @retval OT_ERROR_DISABLED_FEATURE The Joiner feature is not enabled in this build.
+ * @retval OT_ERROR_INVALID_ARGS @p aPskd or @p aProvisioningUrl is invalid.
*
*/
otError otJoinerStart(otInstance * aInstance,
- const char * aPSKd,
+ const char * aPskd,
const char * aProvisioningUrl,
const char * aVendorName,
const char * aVendorModel,
@@ -111,11 +113,8 @@
*
* @param[in] aInstance A pointer to an OpenThread instance.
*
- * @retval OT_ERROR_NONE Successfully disabled the Joiner role.
- * @retval OT_ERROR_DISABLED_FEATURE The Joiner feature is not enabled in this build.
- *
*/
-otError otJoinerStop(otInstance *aInstance);
+void otJoinerStop(otInstance *aInstance);
/**
* This function returns the Joiner State.
@@ -141,11 +140,8 @@
* @param[in] aInstance A pointer to the OpenThread instance.
* @param[out] aJoinerId A pointer to where the Joiner ID is placed.
*
- * @retval OT_ERROR_NONE Successfully retrieved the Joiner ID.
- * @retval OT_ERROR_DISABLED_FEATURE The Joiner feature is not enabled in this build.
- *
*/
-otError otJoinerGetId(otInstance *aInstance, otExtAddress *aJoinerId);
+void otJoinerGetId(otInstance *aInstance, otExtAddress *aJoinerId);
/**
* @}
diff --git a/include/openthread/link.h b/include/openthread/link.h
index c44fca4..98fff20 100644
--- a/include/openthread/link.h
+++ b/include/openthread/link.h
@@ -107,38 +107,264 @@
*/
typedef struct otMacCounters
{
- uint32_t mTxTotal; ///< The total number of transmissions.
- uint32_t mTxUnicast; ///< The total number of unicast transmissions.
- uint32_t mTxBroadcast; ///< The total number of broadcast transmissions.
- uint32_t mTxAckRequested; ///< The number of transmissions with ack request.
- uint32_t mTxAcked; ///< The number of transmissions that were acked.
- uint32_t mTxNoAckRequested; ///< The number of transmissions without ack request.
- uint32_t mTxData; ///< The number of transmitted data.
- uint32_t mTxDataPoll; ///< The number of transmitted data poll.
- uint32_t mTxBeacon; ///< The number of transmitted beacon.
- uint32_t mTxBeaconRequest; ///< The number of transmitted beacon request.
- uint32_t mTxOther; ///< The number of transmitted other types of frames.
- uint32_t mTxRetry; ///< The number of retransmission times.
- uint32_t mTxErrCca; ///< The number of CCA failure times.
- uint32_t mTxErrAbort; ///< The number of frame transmission failures due to abort error.
- uint32_t mTxErrBusyChannel; ///< The number of frames that were dropped due to a busy channel.
- uint32_t mRxTotal; ///< The total number of received packets.
- uint32_t mRxUnicast; ///< The total number of unicast packets received.
- uint32_t mRxBroadcast; ///< The total number of broadcast packets received.
- uint32_t mRxData; ///< The number of received data.
- uint32_t mRxDataPoll; ///< The number of received data poll.
- uint32_t mRxBeacon; ///< The number of received beacon.
- uint32_t mRxBeaconRequest; ///< The number of received beacon request.
- uint32_t mRxOther; ///< The number of received other types of frames.
- uint32_t mRxAddressFiltered; ///< The number of received packets filtered by address filter.
- uint32_t mRxDestAddrFiltered; ///< The number of received packets filtered by destination check.
- uint32_t mRxDuplicated; ///< The number of received duplicated packets.
- uint32_t mRxErrNoFrame; ///< The number of received packets with no or malformed content.
- uint32_t mRxErrUnknownNeighbor; ///< The number of received packets from unknown neighbor.
- uint32_t mRxErrInvalidSrcAddr; ///< The number of received packets whose source address is invalid.
- uint32_t mRxErrSec; ///< The number of received packets with security error.
- uint32_t mRxErrFcs; ///< The number of received packets with FCS error.
- uint32_t mRxErrOther; ///< The number of received packets with other error.
+ /**
+ * The total number of unique MAC frame transmission requests.
+ *
+ * Note that this counter is incremented for each MAC transmission request only by one,
+ * regardless of the amount of CCA failures, CSMA-CA attempts, or retransmissions.
+ *
+ * This incrementation rule applies to the following counters:
+ * @p mTxUnicast
+ * @p mTxBroadcast
+ * @p mTxAckRequested
+ * @p mTxNoAckRequested
+ * @p mTxData
+ * @p mTxDataPoll
+ * @p mTxBeacon
+ * @p mTxBeaconRequest
+ * @p mTxOther
+ * @p mTxErrAbort
+ * @p mTxErrBusyChannel
+ *
+ * The following equations are valid:
+ * @p mTxTotal = @p mTxUnicast + @p mTxBroadcast
+ * @p mTxTotal = @p mTxAckRequested + @p mTxNoAckRequested
+ * @p mTxTotal = @p mTxData + @p mTxDataPoll + @p mTxBeacon + @p mTxBeaconRequest + @p mTxOther
+ *
+ */
+ uint32_t mTxTotal;
+
+ /**
+ * The total number of unique unicast MAC frame transmission requests.
+ *
+ */
+ uint32_t mTxUnicast;
+
+ /**
+ * The total number of unique broadcast MAC frame transmission requests.
+ *
+ */
+ uint32_t mTxBroadcast;
+
+ /**
+ * The total number of unique MAC frame transmission requests with requested acknowledgment.
+ *
+ */
+ uint32_t mTxAckRequested;
+
+ /**
+ * The total number of unique MAC frame transmission requests that were acked.
+ *
+ */
+ uint32_t mTxAcked;
+
+ /**
+ * The total number of unique MAC frame transmission requests without requested acknowledgment.
+ *
+ */
+ uint32_t mTxNoAckRequested;
+
+ /**
+ * The total number of unique MAC Data frame transmission requests.
+ *
+ */
+ uint32_t mTxData;
+
+ /**
+ * The total number of unique MAC Data Poll frame transmission requests.
+ *
+ */
+ uint32_t mTxDataPoll;
+
+ /**
+ * The total number of unique MAC Beacon frame transmission requests.
+ *
+ */
+ uint32_t mTxBeacon;
+
+ /**
+ * The total number of unique MAC Beacon Request frame transmission requests.
+ *
+ */
+ uint32_t mTxBeaconRequest;
+
+ /**
+ * The total number of unique other MAC frame transmission requests.
+ *
+ * This counter is currently unused.
+ *
+ */
+ uint32_t mTxOther;
+
+ /**
+ * The total number of MAC retransmission attempts.
+ *
+ * Note that this counter is incremented by one for each retransmission attempt that may be
+ * triggered by lack of acknowledgement, CSMA/CA failure, or other type of transmission error.
+ * The @p mTxRetry counter is incremented both for unicast and broadcast MAC frames.
+ *
+ * Check the following configuration parameters to control the amount of retransmissions in the system:
+ * @sa OPENTHREAD_CONFIG_MAC_DEFAULT_MAX_FRAME_RETRIES_DIRECT
+ * @sa OPENTHREAD_CONFIG_MAC_DEFAULT_MAX_FRAME_RETRIES_INDIRECT
+ * @sa OPENTHREAD_CONFIG_MAC_TX_NUM_BCAST
+ * @sa OPENTHREAD_CONFIG_MAC_MAX_CSMA_BACKOFFS_DIRECT
+ * @sa OPENTHREAD_CONFIG_MAC_MAX_CSMA_BACKOFFS_INDIRECT
+ *
+ * Currently, this counter is invalid if the platform's radio driver capability includes
+ * @sa OT_RADIO_CAPS_TRANSMIT_RETRIES.
+ *
+ */
+ uint32_t mTxRetry;
+
+ /**
+ * The total number of unique MAC transmission packets that meet maximal retry limit for direct packets.
+ *
+ */
+ uint32_t mTxDirectMaxRetryExpiry;
+
+ /**
+ * The total number of unique MAC transmission packets that meet maximal retry limit for indirect packets.
+ *
+ */
+ uint32_t mTxIndirectMaxRetryExpiry;
+
+ /**
+ * The total number of CCA failures.
+ *
+ * The meaning of this counter can be different and it depends on the platform's radio driver capabilities.
+ *
+ * If @sa OT_RADIO_CAPS_CSMA_BACKOFF is enabled, this counter represents the total number of full CSMA/CA
+ * failed attempts and it is incremented by one also for each retransmission (in case of a CSMA/CA fail).
+ *
+ * If @sa OT_RADIO_CAPS_TRANSMIT_RETRIES is enabled, this counter represents the total number of full CSMA/CA
+ * failed attempts and it is incremented by one for each individual data frame request (regardless of the amount of
+ * retransmissions).
+ *
+ */
+ uint32_t mTxErrCca;
+
+ /**
+ * The total number of unique MAC transmission request failures cause by an abort error.
+ *
+ */
+ uint32_t mTxErrAbort;
+
+ /**
+ * The total number of unique MAC transmission requests failures caused by a busy channel (a CSMA/CA fail).
+ *
+ */
+ uint32_t mTxErrBusyChannel;
+
+ /**
+ * The total number of received frames.
+ *
+ * This counter counts all frames reported by the platform's radio driver, including frames
+ * that were dropped, for example because of an FCS error.
+ *
+ */
+ uint32_t mRxTotal;
+
+ /**
+ * The total number of unicast frames received.
+ *
+ */
+ uint32_t mRxUnicast;
+
+ /**
+ * The total number of broadcast frames received.
+ *
+ */
+ uint32_t mRxBroadcast;
+
+ /**
+ * The total number of MAC Data frames received.
+ *
+ */
+ uint32_t mRxData;
+
+ /**
+ * The total number of MAC Data Poll frames received.
+ *
+ */
+ uint32_t mRxDataPoll;
+
+ /**
+ * The total number of MAC Beacon frames received.
+ *
+ */
+ uint32_t mRxBeacon;
+
+ /**
+ * The total number of MAC Beacon Request frames received.
+ *
+ */
+ uint32_t mRxBeaconRequest;
+
+ /**
+ * The total number of other types of frames received.
+ *
+ */
+ uint32_t mRxOther;
+
+ /**
+ * The total number of frames dropped by MAC Filter module, for example received from blacklisted node.
+ *
+ */
+ uint32_t mRxAddressFiltered;
+
+ /**
+ * The total number of frames dropped by destination address check, for example received frame for other node.
+ *
+ */
+ uint32_t mRxDestAddrFiltered;
+
+ /**
+ * The total number of frames dropped due to duplication, that is when the frame has been already received.
+ *
+ * This counter may be incremented, for example when ACK frame generated by the receiver hasn't reached
+ * transmitter node which performed retransmission.
+ *
+ */
+ uint32_t mRxDuplicated;
+
+ /**
+ * The total number of frames dropped because of missing or malformed content.
+ *
+ */
+ uint32_t mRxErrNoFrame;
+
+ /**
+ * The total number of frames dropped due to unknown neighbor.
+ *
+ */
+ uint32_t mRxErrUnknownNeighbor;
+
+ /**
+ * The total number of frames dropped due to invalid source address.
+ *
+ */
+ uint32_t mRxErrInvalidSrcAddr;
+
+ /**
+ * The total number of frames dropped due to security error.
+ *
+ * This counter may be incremented, for example when lower than expected Frame Counter is used
+ * to encrypt the frame.
+ *
+ */
+ uint32_t mRxErrSec;
+
+ /**
+ * The total number of frames dropped due to invalid FCS.
+ *
+ */
+ uint32_t mRxErrFcs;
+
+ /**
+ * The total number of frames dropped due to other error.
+ *
+ */
+ uint32_t mRxErrOther;
} otMacCounters;
/**
@@ -425,13 +651,13 @@
* Set/clear user-specified/external data poll period for sleepy end device.
*
* @note This function updates only poll period of sleepy end device. To update child timeout the function
- * `otSetChildTimeout()` shall be called.
+ * `otThreadSetChildTimeout()` shall be called.
*
* @note Minimal non-zero value should be `OPENTHREAD_CONFIG_MAC_MINIMUM_POLL_PERIOD` (10ms).
* Or zero to clear user-specified poll period.
*
* @note User-specified value should be no more than the maximal value 0x3FFFFFF ((1 << 26) - 1) allowed,
- * otherwise it would be cilpped by the maximal value.
+ * otherwise it would be clipped by the maximal value.
*
* @param[in] aInstance A pointer to an OpenThread instance.
* @param[in] aPollPeriod data poll period in milliseconds.
@@ -455,6 +681,44 @@
otShortAddress otLinkGetShortAddress(otInstance *aInstance);
/**
+ * This method returns the maximum number of frame retries during direct transmission.
+ *
+ * @param[in] aInstance A pointer to an OpenThread instance.
+ *
+ * @returns The maximum number of retries during direct transmission.
+ *
+ */
+uint8_t otLinkGetMaxFrameRetriesDirect(otInstance *aInstance);
+
+/**
+ * This method sets the maximum number of frame retries during direct transmission.
+ *
+ * @param[in] aInstance A pointer to an OpenThread instance.
+ * @param[in] aMaxFrameRetriesDirect The maximum number of retries during direct transmission.
+ *
+ */
+void otLinkSetMaxFrameRetriesDirect(otInstance *aInstance, uint8_t aMaxFrameRetriesDirect);
+
+/**
+ * This method returns the maximum number of frame retries during indirect transmission.
+ *
+ * @param[in] aInstance A pointer to an OpenThread instance.
+ *
+ * @returns The maximum number of retries during indirect transmission.
+ *
+ */
+uint8_t otLinkGetMaxFrameRetriesIndirect(otInstance *aInstance);
+
+/**
+ * This method sets the maximum number of frame retries during indirect transmission.
+ *
+ * @param[in] aInstance A pointer to an OpenThread instance.
+ * @param[in] aMaxFrameRetriesIndirect The maximum number of retries during indirect transmission.
+ *
+ */
+void otLinkSetMaxFrameRetriesIndirect(otInstance *aInstance, uint8_t aMaxFrameRetriesIndirect);
+
+/**
* This function gets the address mode of MAC filter.
*
* @param[in] aInstance A pointer to an OpenThread instance.
@@ -704,6 +968,43 @@
int8_t otLinkConvertLinkQualityToRss(otInstance *aInstance, uint8_t aLinkQuality);
/**
+ * This method gets histogram of retries for a single direct packet until success.
+ *
+ * This function is valid when OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_ENABLE configuration is enabled.
+ *
+ * @param[in] aInstance A pointer to an OpenThread instance.
+ * @param[out] aNumberOfEntries A pointer to where the size of returned histogram array is placed.
+ *
+ * @returns A pointer to the histogram of retries (in a form of an array).
+ * The n-th element indicates that the packet has been sent with n-th retry.
+ */
+const uint32_t *otLinkGetTxDirectRetrySuccessHistogram(otInstance *aInstance, uint8_t *aNumberOfEntries);
+
+/**
+ * This method gets histogram of retries for a single indirect packet until success.
+ *
+ * This function is valid when OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_ENABLE configuration is enabled.
+ *
+ * @param[in] aInstance A pointer to an OpenThread instance.
+ * @param[out] aNumberOfEntries A pointer to where the size of returned histogram array is placed.
+ *
+ * @returns A pointer to the histogram of retries (in a form of an array).
+ * The n-th element indicates that the packet has been sent with n-th retry.
+ *
+ */
+const uint32_t *otLinkGetTxIndirectRetrySuccessHistogram(otInstance *aInstance, uint8_t *aNumberOfEntries);
+
+/**
+ * This method clears histogram statistics for direct and indirect transmissions.
+ *
+ * This function is valid when OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_ENABLE configuration is enabled.
+ *
+ * @param[in] aInstance A pointer to an OpenThread instance.
+ *
+ */
+void otLinkResetTxRetrySuccessHistogram(otInstance *aInstance);
+
+/**
* Get the MAC layer counters.
*
* @param[in] aInstance A pointer to an OpenThread instance.
@@ -714,6 +1015,14 @@
const otMacCounters *otLinkGetCounters(otInstance *aInstance);
/**
+ * Reset the MAC layer counters.
+ *
+ * @param[in] aInstance A pointer to an OpenThread instance.
+ *
+ */
+void otLinkResetCounters(otInstance *aInstance);
+
+/**
* This function pointer is called when an IEEE 802.15.4 frame is received.
*
* @note This callback is called after FCS processing and @p aFrame may not contain the actual FCS that was received.
diff --git a/include/openthread/logging.h b/include/openthread/logging.h
index c4dc2c9..1473a74 100644
--- a/include/openthread/logging.h
+++ b/include/openthread/logging.h
@@ -55,7 +55,7 @@
/**
* This function returns the current log level.
*
- * If dynamic log level feature `OPENTHREAD_CONFIG_ENABLE_DYNAMIC_LOG_LEVEL` is enabled, this function returns the
+ * If dynamic log level feature `OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE` is enabled, this function returns the
* currently set dynamic log level. Otherwise, this function returns the build-time configured log level.
*
* @returns The log level.
@@ -66,14 +66,12 @@
/**
* This function sets the log level.
*
+ * @note This function requires `OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE=1`.
+ *
* @param[in] aLogLevel The log level.
*
- * @retval OT_ERROR_NONE The log level was changed successfully.
- * @retval OT_ERROR_DISABLED_FEATURE The dynamic log level feature is not supported.
- * (see `OPENTHREAD_CONFIG_ENABLE_DYNAMIC_LOG_LEVEL` configuration option).
- *
*/
-otError otLoggingSetLevel(otLogLevel aLogLevel);
+void otLoggingSetLevel(otLogLevel aLogLevel);
/**
* @}
diff --git a/include/openthread/ncp.h b/include/openthread/ncp.h
index 98ef8b6..b5f07fe 100644
--- a/include/openthread/ncp.h
+++ b/include/openthread/ncp.h
@@ -122,12 +122,9 @@
* @param[in] aAllowPeekDelegate Delegate function pointer for peek operation.
* @param[in] aAllowPokeDelegate Delegate function pointer for poke operation.
*
- * @retval OT_ERROR_NONE Successfully registered delegate functions.
- * @retval OT_ERROR_DISABLED_FEATURE Peek/Poke feature is disabled (by a build-time configuration option).
- *
*/
-otError otNcpRegisterPeekPokeDelagates(otNcpDelegateAllowPeekPoke aAllowPeekDelegate,
- otNcpDelegateAllowPeekPoke aAllowPokeDelegate);
+void otNcpRegisterPeekPokeDelagates(otNcpDelegateAllowPeekPoke aAllowPeekDelegate,
+ otNcpDelegateAllowPeekPoke aAllowPokeDelegate);
//-----------------------------------------------------------------------------------------
// Legacy network APIs
diff --git a/include/openthread/netdata.h b/include/openthread/netdata.h
index 66c9f38..d1eb81d 100644
--- a/include/openthread/netdata.h
+++ b/include/openthread/netdata.h
@@ -157,8 +157,37 @@
OT_ROUTE_PREFERENCE_HIGH = 1, ///< High route preference.
} otRoutePreference;
+#define OT_SERVICE_DATA_MAX_SIZE 252 ///< Maximum size of Service Data in bytes.
+#define OT_SERVER_DATA_MAX_SIZE \
+ 248 ///< Maximum size of Server Data in bytes. This is theoretical limit, practical one is much lower.
+
/**
- * This method provides a full or stable copy of the Leader's Thread Network Data.
+ * This structure represents a Server configuration.
+ *
+ */
+typedef struct otServerConfig
+{
+ bool mStable : 1; ///< TRUE, if this configuration is considered Stable Network Data. FALSE, otherwise.
+ uint8_t mServerDataLength; ///< Length of server data.
+ uint8_t mServerData[OT_SERVER_DATA_MAX_SIZE]; ///< Server data bytes.
+ uint16_t mRloc16; ///< The Server RLOC16.
+} otServerConfig;
+
+/**
+ * This structure represents a Service configuration.
+ *
+ */
+typedef struct otServiceConfig
+{
+ uint8_t mServiceID; ///< Used to return service ID when iterating over the partition's Network Data.
+ uint32_t mEnterpriseNumber; ///< IANA Enterprise Number.
+ uint8_t mServiceDataLength; ///< Length of service data.
+ uint8_t mServiceData[OT_SERVICE_DATA_MAX_SIZE]; ///< Service data bytes.
+ otServerConfig mServerConfig; ///< The Server configuration.
+} otServiceConfig;
+
+/**
+ * This method provides a full or stable copy of the Parition's Thread Network Data.
*
* @param[in] aInstance A pointer to an OpenThread instance.
* @param[in] aStable TRUE when copying the stable version, FALSE when copying the full version.
@@ -200,6 +229,20 @@
otError otNetDataGetNextRoute(otInstance *aInstance, otNetworkDataIterator *aIterator, otExternalRouteConfig *aConfig);
/**
+ * This function gets the next service in the partition's Network Data.
+ *
+ * @param[in] aInstance A pointer to an OpenThread instance.
+ * @param[inout] aIterator A pointer to the Network Data iterator context. To get the first service entry
+ it should be set to OT_NETWORK_DATA_ITERATOR_INIT.
+ * @param[out] aConfig A pointer to where the service information will be placed.
+ *
+ * @retval OT_ERROR_NONE Successfully found the next service.
+ * @retval OT_ERROR_NOT_FOUND No subsequent service exists in the partition's Network Data.
+ *
+ */
+otError otNetDataGetNextService(otInstance *aInstance, otNetworkDataIterator *aIterator, otServiceConfig *aConfig);
+
+/**
* Get the Network Data Version.
*
* @param[in] aInstance A pointer to an OpenThread instance.
diff --git a/include/openthread/platform/debug_uart.h b/include/openthread/platform/debug_uart.h
index 237f8da..9a4f864 100644
--- a/include/openthread/platform/debug_uart.h
+++ b/include/openthread/platform/debug_uart.h
@@ -56,7 +56,7 @@
* intended to be present, or used in production system.
*/
-#if __cplusplus
+#ifdef __cplusplus
extern "C" {
#endif
@@ -188,7 +188,7 @@
*
*/
-#if __cplusplus
+#ifdef __cplusplus
} // extern "C"
#endif
diff --git a/include/openthread/platform/logging.h b/include/openthread/platform/logging.h
index df1c08e..68687ed 100644
--- a/include/openthread/platform/logging.h
+++ b/include/openthread/platform/logging.h
@@ -148,17 +148,6 @@
void otPlatLog(otLogLevel aLogLevel, otLogRegion aLogRegion, const char *aFormat, ...);
/**
- * This function outputs logs.
- *
- * @param[in] aLogLevel The log level.
- * @param[in] aLogRegion The log region.
- * @param[in] aFormat A pointer to the format string.
- * @param[in] ap va_list matching information for aFormat
- *
- */
-void otPlatLogv(otLogLevel aLogLevel, otLogRegion aLogRegion, const char *aFormat, va_list ap);
-
-/**
* @}
*
*/
diff --git a/include/openthread/platform/radio.h b/include/openthread/platform/radio.h
index 0829a62..f5c74c7 100644
--- a/include/openthread/platform/radio.h
+++ b/include/openthread/platform/radio.h
@@ -230,6 +230,7 @@
OT_RADIO_STATE_SLEEP = 1,
OT_RADIO_STATE_RECEIVE = 2,
OT_RADIO_STATE_TRANSMIT = 3,
+ OT_RADIO_STATE_INVALID = 255,
} otRadioState;
/**
@@ -382,6 +383,32 @@
otError otPlatRadioSetTransmitPower(otInstance *aInstance, int8_t aPower);
/**
+ * Get the radio's CCA ED threshold in dBm.
+ *
+ * @param[in] aInstance The OpenThread instance structure.
+ * @param[out] aThreshold The CCA ED threshold in dBm.
+ *
+ * @retval OT_ERROR_NONE Successfully retrieved the CCA ED threshold.
+ * @retval OT_ERROR_INVALID_ARGS @p aThreshold was NULL.
+ * @retval OT_ERROR_NOT_IMPLEMENTED CCA ED threshold configuration via dBm is not implemented.
+ *
+ */
+otError otPlatRadioGetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t *aThreshold);
+
+/**
+ * Set the radio's CCA ED threshold in dBm.
+ *
+ * @param[in] aInstance The OpenThread instance structure.
+ * @param[in] aThreshold The CCA ED threshold in dBm.
+ *
+ * @retval OT_ERROR_NONE Successfully set the transmit power.
+ * @retval OT_ERROR_INVALID_ARGS Given threshold is out of range.
+ * @retval OT_ERROR_NOT_IMPLEMENTED CCA ED threshold configuration via dBm is not implemented.
+ *
+ */
+otError otPlatRadioSetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t aThreshold);
+
+/**
* Get the status of promiscuous mode.
*
* @param[in] aInstance The OpenThread instance structure.
@@ -585,21 +612,6 @@
extern void otPlatDiagRadioTransmitDone(otInstance *aInstance, otRadioFrame *aFrame, otError aError);
/**
- * The radio driver calls this method to notify OpenThread to process transmit security for the frame,
- * this happens when the frame includes Header IE(s) that were updated before transmission.
- *
- * This function is used when feature `OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT` is enabled.
- *
- * @note This function can be called from interrupt context and it would only read/write data passed in
- * via @p aFrame, but would not read/write any state within OpenThread.
- *
- * @param[in] aInstance The OpenThread instance structure.
- * @param[in] aFrame The radio frame which needs to process transmit security.
- *
- */
-extern void otPlatRadioFrameUpdated(otInstance *aInstance, otRadioFrame *aFrame);
-
-/**
* Get the most recent RSSI measurement.
*
* @param[in] aInstance The OpenThread instance structure.
@@ -740,8 +752,36 @@
uint32_t otPlatRadioGetPreferredChannelMask(otInstance *aInstance);
/**
+ * Enable the radio coex.
+ *
+ * This function is used when feature OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE is enabled.
+ *
+ * @param[in] aInstance The OpenThread instance structure.
+ * @param[in] aEnabled TRUE to enable the radio coex, FALSE otherwise.
+ *
+ * @retval OT_ERROR_NONE Successfully enabled.
+ * @retval OT_ERROR_FAILED The radio coex could not be enabled.
+ *
+ */
+otError otPlatRadioSetCoexEnabled(otInstance *aInstance, bool aEnabled);
+
+/**
+ * Check whether radio coex is enabled or not.
+ *
+ * This function is used when feature OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE is enabled.
+ *
+ * @param[in] aInstance The OpenThread instance structure.
+ *
+ * @returns TRUE if the radio coex is enabled, FALSE otherwise.
+ *
+ */
+bool otPlatRadioIsCoexEnabled(otInstance *aInstance);
+
+/**
* Get the radio coexistence metrics.
*
+ * This function is used when feature OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE is enabled.
+ *
* @param[in] aInstance The OpenThread instance structure.
* @param[out] aCoexMetrics A pointer to the coexistence metrics structure.
*
diff --git a/include/openthread/platform/settings.h b/include/openthread/platform/settings.h
index c1cc8d2..4a4208a 100644
--- a/include/openthread/platform/settings.h
+++ b/include/openthread/platform/settings.h
@@ -161,7 +161,7 @@
* @param[in] aIndex The index of the value to be removed. If set to -1, all values for this aKey will be removed.
*
* @retval OT_ERROR_NONE The given key and index was found and removed successfully.
- * @retval OT_ERROR_NOT_FOUND The given key or index was not found in the setting store.
+ * @retval OT_ERROR_NOT_FOUND The given key or index was not found in the setting store.
* @retval OT_ERROR_NOT_IMPLEMENTED This function is not implemented on this platform.
*/
otError otPlatSettingsDelete(otInstance *aInstance, uint16_t aKey, int aIndex);
diff --git a/include/openthread/platform/toolchain.h b/include/openthread/platform/toolchain.h
index 9d1db93..7eea6a6 100644
--- a/include/openthread/platform/toolchain.h
+++ b/include/openthread/platform/toolchain.h
@@ -86,13 +86,6 @@
*/
/**
- * @def OT_TOOL_ALIGN
- *
- * Compiler-specific alignment modifier.
- *
- */
-
-/**
* @def OT_TOOL_WEAK
*
* Compiler-specific weak symbol modifier.
@@ -111,8 +104,6 @@
#define OT_TOOL_PACKED_END __attribute__((packed))
#define OT_TOOL_WEAK __attribute__((weak))
-#define OT_TOOL_ALIGN(X)
-
#elif defined(__ICCARM__) || defined(__ICC8051__)
// http://supp.iar.com/FilesPublic/UPDINFO/004916/arm/doc/EWARM_DevelopmentGuide.ENU.pdf
@@ -124,8 +115,6 @@
#define OT_TOOL_PACKED_END
#define OT_TOOL_WEAK __weak
-#define OT_TOOL_ALIGN(X)
-
#elif defined(__SDCC)
// Structures are packed by default in sdcc, as it primarily targets 8-bit MCUs.
@@ -135,8 +124,6 @@
#define OT_TOOL_PACKED_END
#define OT_TOOL_WEAK
-#define OT_TOOL_ALIGN(X)
-
#else
#error "Error: No valid Toolchain specified"
@@ -148,8 +135,6 @@
#define OT_TOOL_PACKED_END
#define OT_TOOL_WEAK
-#define OT_TOOL_ALIGN(X)
-
#endif
// =========== TOOLCHAIN SELECTION : END ===========
@@ -239,6 +224,10 @@
#define UINT8_MAX 0xff
#endif
+#ifndef UINT16_MAX
+#define UINT16_MAX 0xffff
+#endif
+
#endif
#endif
diff --git a/include/openthread/random_crypto.h b/include/openthread/random_crypto.h
index 42900ae..da4ba7b 100644
--- a/include/openthread/random_crypto.h
+++ b/include/openthread/random_crypto.h
@@ -45,7 +45,7 @@
#endif
/**
- * @addtogroup api-random
+ * @addtogroup api-random-crypto
*
* @brief
* This module includes functions that generates cryptographic random numbers.
diff --git a/include/openthread/random_noncrypto.h b/include/openthread/random_noncrypto.h
index 6b07cbc..40bb260 100644
--- a/include/openthread/random_noncrypto.h
+++ b/include/openthread/random_noncrypto.h
@@ -42,7 +42,7 @@
#endif
/**
- * @addtogroup api-random
+ * @addtogroup api-random-non-crypto
*
* @brief
* This module includes functions that generates non cryptographic random numbers.
diff --git a/include/openthread/server.h b/include/openthread/server.h
index 82fb455..05f3205 100644
--- a/include/openthread/server.h
+++ b/include/openthread/server.h
@@ -51,35 +51,6 @@
*
*/
-#define OT_SERVICE_DATA_MAX_SIZE 252 ///< Maximum size of Service Data in bytes.
-#define OT_SERVER_DATA_MAX_SIZE \
- 248 ///< Maximum size of Server Data in bytes. This is theoretical limit, practical one is much lower.
-
-/**
- * This structure represents a Server configuration.
- *
- */
-typedef struct otServerConfig
-{
- bool mStable : 1; ///< TRUE, if this configuration is considered Stable Network Data. FALSE, otherwise.
- uint8_t mServerDataLength; ///< Length of server data.
- uint8_t mServerData[OT_SERVER_DATA_MAX_SIZE]; ///< Server data bytes.
- uint16_t mRloc16; ///< The Server RLOC16.
-} otServerConfig;
-
-/**
- * This structure represents a Service configuration.
- *
- */
-typedef struct otServiceConfig
-{
- uint8_t mServiceID; ///< Used to return service ID when iterating over network data from leader.
- uint32_t mEnterpriseNumber; ///< IANA Enterprise Number.
- uint8_t mServiceDataLength; ///< Length of service data.
- uint8_t mServiceData[OT_SERVICE_DATA_MAX_SIZE]; ///< Service data bytes.
- otServerConfig mServerConfig; ///< The Server configuration.
-} otServiceConfig;
-
/**
* This method provides a full or stable copy of the local Thread Network Data.
*
@@ -143,20 +114,6 @@
otError otServerGetNextService(otInstance *aInstance, otNetworkDataIterator *aIterator, otServiceConfig *aConfig);
/**
- * This function gets the next service in the leader Network Data.
- *
- * @param[in] aInstance A pointer to an OpenThread instance.
- * @param[inout] aIterator A pointer to the Network Data iterator context. To get the first service entry
- it should be set to OT_NETWORK_DATA_ITERATOR_INIT.
- * @param[out] aConfig A pointer to where the service information will be placed.
- *
- * @retval OT_ERROR_NONE Successfully found the next service.
- * @retval OT_ERROR_NOT_FOUND No subsequent service exists in the leader Network Data.
- *
- */
-otError otServerGetNextLeaderService(otInstance *aInstance, otNetworkDataIterator *aIterator, otServiceConfig *aConfig);
-
-/**
* Immediately register the local network data with the Leader.
*
* @param[in] aInstance A pointer to an OpenThread instance.
diff --git a/include/openthread/thread.h b/include/openthread/thread.h
index 68bc20a..396d022 100644
--- a/include/openthread/thread.h
+++ b/include/openthread/thread.h
@@ -46,6 +46,9 @@
/**
* @addtogroup api-thread-general
*
+ * @note
+ * The functions in this module require `OPENTHREAD_FTD=1` or `OPENTHREAD_MTD=1`.
+ *
* @{
*
*/
@@ -71,7 +74,6 @@
/**
* This structure represents an MLE Link Mode configuration.
*/
-OT_TOOL_ALIGN(4)
typedef struct otLinkModeConfig
{
bool mRxOnWhenIdle : 1; ///< 1, if the sender has its receiver on when not transmitting. 0, otherwise.
@@ -83,9 +85,6 @@
/**
* This structure holds diagnostic information for a neighboring Thread node
*
- * `mFrameErrorRate` and `mMessageErrorRate` require `OPENTHREAD_CONFIG_ENABLE_TX_ERROR_RATE_TRACKING` feature to be
- * enabled.
- *
*/
typedef struct
{
@@ -127,7 +126,6 @@
* This structure holds diagnostic information for a Thread Router
*
*/
-OT_TOOL_ALIGN(4)
typedef struct
{
otExtAddress mExtAddress; ///< IEEE 802.15.4 Extended Address
@@ -214,6 +212,14 @@
otError otThreadSetEnabled(otInstance *aInstance, bool aEnabled);
/**
+ * This function gets the Thread protocol version.
+ *
+ * @returns the Thread protocol version.
+ *
+ */
+uint16_t otThreadGetVersion(void);
+
+/**
* This function indicates whether a node is the only router on the network.
*
* @param[in] aInstance A pointer to an OpenThread instance.
@@ -720,6 +726,14 @@
const otIpCounters *otThreadGetIp6Counters(otInstance *aInstance);
/**
+ * Reset the IPv6 counters.
+ *
+ * @param[in] aInstance A pointer to an OpenThread instance.
+ *
+ */
+void otThreadResetIp6Counters(otInstance *aInstance);
+
+/**
* Get the Thread MLE counters.
*
* @param[in] aInstance A pointer to an OpenThread instance.
@@ -753,13 +767,10 @@
* @param[in] aCallback A pointer to a function that is called upon receiving an MLE Parent Response message.
* @param[in] aContext A pointer to callback client-specific context.
*
- * @retval OT_ERROR_NONE On successful registration
- * @retval OT_ERROR_DISABLED_FEATURE If the feature is not supported
- *
*/
-otError otThreadRegisterParentResponseCallback(otInstance * aInstance,
- otThreadParentResponseCallback aCallback,
- void * aContext);
+void otThreadRegisterParentResponseCallback(otInstance * aInstance,
+ otThreadParentResponseCallback aCallback,
+ void * aContext);
/**
* @}
diff --git a/include/openthread/thread_ftd.h b/include/openthread/thread_ftd.h
index 5cdf4a0..3a59fe5 100644
--- a/include/openthread/thread_ftd.h
+++ b/include/openthread/thread_ftd.h
@@ -53,9 +53,6 @@
/**
* This structure holds diagnostic information for a Thread Child
*
- * `mFrameErrorRate` and `mMessageErrorRate` require `OPENTHREAD_CONFIG_ENABLE_TX_ERROR_RATE_TRACKING` feature to be
- * enabled.
- *
*/
typedef struct
{
@@ -123,24 +120,30 @@
otError otThreadSetMaxAllowedChildren(otInstance *aInstance, uint16_t aMaxChildren);
/**
- * This function indicates whether or not the Router Role is enabled.
+ * This method indicates whether or not the device is router-eligible.
*
* @param[in] aInstance A pointer to an OpenThread instance.
*
- * @retval TRUE If the Router Role is enabled.
- * @retval FALSE If the Router Role is not enabled.
+ * @retval TRUE If device is router-eligible.
+ * @retval FALSE If device is not router-eligible.
*
*/
-bool otThreadIsRouterRoleEnabled(otInstance *aInstance);
+bool otThreadIsRouterEligible(otInstance *aInstance);
/**
- * This function sets whether or not the Router Role is enabled.
+ * This function sets whether or not the device is router-eligible.
*
- * @param[in] aInstance A pointer to an OpenThread instance.
- * @param[in] aEnabled TRUE if the Router Role is enabled, FALSE otherwise.
+ * If @p aEligible is false and the device is currently operating as a router, this call will cause the device to
+ * detach and attempt to reattach as a child.
+ *
+ * @param[in] aInstance A pointer to an OpenThread instance.
+ * @param[in] aEligible TRUE to configure the device as router-eligible, FALSE otherwise.
+ *
+ * @retval OT_ERROR_NONE Successfully set the router-eligible configuration.
+ * @retval OT_ERROR_NOT_CAPABLE The device is not capable of becoming a router.
*
*/
-void otThreadSetRouterRoleEnabled(otInstance *aInstance, bool aEnabled);
+otError otThreadSetRouterEligible(otInstance *aInstance, bool aEligible);
/**
* Set the preferred Router Id.
@@ -232,8 +235,7 @@
* Set Steering data out of band.
*
* Configuration option `OPENTHREAD_CONFIG_MLE_STEERING_DATA_SET_OOB_ENABLE` should be set to enable setting of steering
- * data out of band. Otherwise calling this function does nothing and it returns `OT_ERROR_DISABLED_FEATURE`
- * error.
+ * data out of band.
*
* @param[in] aInstance A pointer to an OpenThread instance.
* @param[in] aExtAddress Address used to update the steering data.
@@ -241,11 +243,8 @@
* All 0xFFs to set steering data/bloom filter to accept/allow all.
* A specific EUI64 which is then added to current steering data/bloom filter.
*
- * @retval OT_ERROR_NONE Successfully set/updated the steering data.
- * @retval OT_ERROR_DISABLED_FEATURE Feature is disabled, not capable of setting steering data out of band.
- *
*/
-otError otThreadSetSteeringData(otInstance *aInstance, const otExtAddress *aExtAddress);
+void otThreadSetSteeringData(otInstance *aInstance, const otExtAddress *aExtAddress);
/**
* Get the CONTEXT_ID_REUSE_DELAY parameter used in the Leader role.
@@ -521,34 +520,34 @@
otError otThreadGetEidCacheEntry(otInstance *aInstance, uint8_t aIndex, otEidCacheEntry *aEntry);
/**
- * Get the thrPSKc.
+ * Get the Thread PSKc
*
* @param[in] aInstance A pointer to an OpenThread instance.
*
- * @returns A pointer to a buffer containing the thrPSKc.
+ * @returns A pointer to Thread PSKc
*
- * @sa otThreadSetPSKc
+ * @sa otThreadSetPskc
*
*/
-const otPSKc *otThreadGetPSKc(otInstance *aInstance);
+const otPskc *otThreadGetPskc(otInstance *aInstance);
/**
- * Set the thrPSKc.
+ * Set the Thread PSKc
*
* This function will only succeed when Thread protocols are disabled. A successful
* call to this function will also invalidate the Active and Pending Operational Datasets in
* non-volatile memory.
*
* @param[in] aInstance A pointer to an OpenThread instance.
- * @param[in] aPSKc A pointer to a buffer containing the thrPSKc.
+ * @param[in] aPskc A pointer to the new Thread PSKc.
*
- * @retval OT_ERROR_NONE Successfully set the thrPSKc.
+ * @retval OT_ERROR_NONE Successfully set the Thread PSKc.
* @retval OT_ERROR_INVALID_STATE Thread protocols are enabled.
*
- * @sa otThreadGetPSKc
+ * @sa otThreadGetPskc
*
*/
-otError otThreadSetPSKc(otInstance *aInstance, const otPSKc *aPSKc);
+otError otThreadSetPskc(otInstance *aInstance, const otPskc *aPskc);
/**
* Get the assigned parent priority.
diff --git a/script/bootstrap b/script/bootstrap
index 07b921c..1106e39 100755
--- a/script/bootstrap
+++ b/script/bootstrap
@@ -49,7 +49,7 @@
sudo apt-get -y install binutils-arm-none-eabi gcc-arm-none-eabi gdb-arm-none-eabi libnewlib-arm-none-eabi libstdc++-arm-none-eabi-newlib || die
else
# add gcc-arm-embedded ppa
- sudo add-apt-repository ppa:team-gcc-arm-embedded/ppa || die
+ sudo add-apt-repository ppa:team-gcc-arm-embedded/ppa -y || die
sudo apt-get update || die
sudo apt-get -y install gcc-arm-embedded || die
fi
@@ -74,8 +74,8 @@
brew install automake libtool
# add ARM toolchain
- brew tap PX4/homebrew-px4
- brew install gcc-arm-none-eabi
+ brew tap ArmMbed/homebrew-formulae
+ brew install arm-none-eabi-gcc
# check for gcc for posix examples
if ! which gcc; then
@@ -87,7 +87,7 @@
CLANG_FORMAT_VERSION="clang-format version 6.0"
which clang-format-6.0 || (which clang-format && (clang-format --version | grep -q "${CLANG_FORMAT_VERSION}")) || {
brew install llvm@6
- sudo ln -s "$(brew --repo)/opt/llvm@6/bin/clang-format" /usr/local/bin/clang-format-6.0
+ sudo ln -s "$(brew --prefix llvm@6)/bin/clang-format" /usr/local/bin/clang-format-6.0
}
}
diff --git a/script/make-pretty b/script/make-pretty
new file mode 100755
index 0000000..f254ee1
--- /dev/null
+++ b/script/make-pretty
@@ -0,0 +1,58 @@
+#!/bin/bash
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+set -e -x -o pipefail
+
+readonly TMP_DIR="/tmp/ot-make-pretty-$(date +%Y%m%d%H%M%S)"
+readonly SRC_DIR="$PWD"
+
+at_exit()
+{
+ EXIT_CODE=$?
+
+ [[ ! -d "${TMP_DIR}" ]] || rm -rf "${TMP_DIR}"
+ exit $EXIT_CODE
+}
+
+make_pretty()
+{
+ ./bootstrap
+ mkdir "${TMP_DIR}"
+ cd "${TMP_DIR}"
+ "${SRC_DIR}/configure"
+ make pretty
+}
+
+main()
+{
+ trap at_exit INT TERM EXIT
+ make_pretty
+}
+
+main "$@"
diff --git a/script/test b/script/test
index 7debd15..5fd6c44 100755
--- a/script/test
+++ b/script/test
@@ -54,7 +54,7 @@
do_cert() {
[[ ! -d tmp ]] || rm -rvf tmp
- PYTHONUNBUFFERED=1 python "$1"
+ PYTHONUNBUFFERED=1 "$1"
}
print_usage() {
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
new file mode 100644
index 0000000..71a6143
--- /dev/null
+++ b/src/CMakeLists.txt
@@ -0,0 +1,31 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+add_subdirectory(cli)
+add_subdirectory(core)
+add_subdirectory(ncp)
diff --git a/src/cli/CMakeLists.txt b/src/cli/CMakeLists.txt
new file mode 100644
index 0000000..33c9d9e
--- /dev/null
+++ b/src/cli/CMakeLists.txt
@@ -0,0 +1,65 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+add_library(openthread-cli-ftd)
+add_library(openthread-cli-mtd)
+
+target_compile_definitions(openthread-cli-ftd PRIVATE
+ ${OT_PRIVATE_DEFINES}
+ OPENTHREAD_FTD=1
+)
+
+target_compile_definitions(openthread-cli-mtd PRIVATE
+ ${OT_PRIVATE_DEFINES}
+ OPENTHREAD_MTD=1
+)
+
+set(COMMON_INCLUDES
+ ${OT_PRIVATE_INCLUDES}
+ ${PROJECT_SOURCE_DIR}/src
+ ${PROJECT_SOURCE_DIR}/src/core
+)
+
+set(COMMON_SOURCES
+ cli.cpp
+ cli_coap.cpp
+ cli_coap_secure.cpp
+ cli_commissioner.cpp
+ cli_console.cpp
+ cli_dataset.cpp
+ cli_joiner.cpp
+ cli_server.cpp
+ cli_uart.cpp
+ cli_udp.cpp
+)
+
+target_include_directories(openthread-cli-ftd PUBLIC ${OT_PUBLIC_INCLUDES} PRIVATE ${COMMON_INCLUDES})
+target_include_directories(openthread-cli-mtd PUBLIC ${OT_PUBLIC_INCLUDES} PRIVATE ${COMMON_INCLUDES})
+
+target_sources(openthread-cli-ftd PRIVATE ${COMMON_SOURCES})
+target_sources(openthread-cli-mtd PRIVATE ${COMMON_SOURCES})
diff --git a/src/cli/Makefile.am b/src/cli/Makefile.am
index a35b0c0..a39cebf 100644
--- a/src/cli/Makefile.am
+++ b/src/cli/Makefile.am
@@ -129,15 +129,23 @@
CPPFLAGS_COMMON += \
-DOPENTHREAD_POSIX=1 \
$(NULL)
+else
+CPPFLAGS_COMMON += \
+ -DOPENTHREAD_POSIX=0 \
+ $(NULL)
endif
libopenthread_cli_mtd_a_CPPFLAGS = \
-DOPENTHREAD_MTD=1 \
+ -DOPENTHREAD_FTD=0 \
+ -DOPENTHREAD_RADIO=0 \
$(CPPFLAGS_COMMON) \
$(NULL)
libopenthread_cli_ftd_a_CPPFLAGS = \
+ -DOPENTHREAD_MTD=0 \
-DOPENTHREAD_FTD=1 \
+ -DOPENTHREAD_RADIO=0 \
$(CPPFLAGS_COMMON) \
$(NULL)
diff --git a/src/cli/README.md b/src/cli/README.md
index d34ae33..98b54a4 100644
--- a/src/cli/README.md
+++ b/src/cli/README.md
@@ -39,6 +39,7 @@
* [leaderweight](#leaderweight)
* [linkquality](#linkquality-extaddr)
* [logfilename](#logfilename-filename)
+* [mac](#mac-retries-direct)
* [macfilter](#macfilter)
* [masterkey](#masterkey)
* [mode](#mode)
@@ -52,7 +53,7 @@
* [panid](#panid)
* [parent](#parent)
* [parentpriority](#parentpriority)
-* [ping](#ping-ipaddr-size-count-interval)
+* [ping](#ping-ipaddr-size-count-interval-hoplimit)
* [pollperiod](#pollperiod-pollperiod)
* [prefix](#prefix-add-prefix-pvdcsr-prf)
* [promiscuous](#promiscuous)
@@ -62,7 +63,7 @@
* [route](#route-add-prefix-s-prf)
* [router](#router-list)
* [routerdowngradethreshold](#routerdowngradethreshold)
-* [routerrole](#routerrole)
+* [routereligible](#routereligible)
* [routerselectionjitter](#routerselectionjitter)
* [routerupgradethreshold](#routerupgradethreshold)
* [scan](#scan-channel)
@@ -113,6 +114,26 @@
Done
```
+### channel preferred
+
+Get preferred channel mask.
+
+```bash
+> channel preferred
+0x7fff800
+Done
+```
+
+### channel supported
+
+Get supported channel mask.
+
+```bash
+> channel supported
+0x7fff800
+Done
+```
+
### child list
List attached Child IDs.
@@ -226,7 +247,7 @@
Get the supported counter names.
```bash
->counters
+> counters
mac
mle
Done
@@ -283,6 +304,17 @@
Done
```
+### counters \<countername\> reset
+
+Reset the counter value.
+
+```bash
+> counters mac reset
+Done
+> counters mle reset
+Done
+```
+
### networktime
Get the Thread network time and the time sync parameters.
@@ -905,17 +937,20 @@
Done
```
-### ping \<ipaddr\> [size] [count] [interval]
+### ping \<ipaddr\> [size] [count] [interval] [hoplimit]
Send an ICMPv6 Echo Request.
* size: The number of data bytes to be sent.
* count: The number of ICMPv6 Echo Requests to be sent.
* interval: The interval between two consecutive ICMPv6 Echo Requests in seconds. The value may have fractional form, for example `0.5`.
+* hoplimit: The hoplimit of ICMPv6 Echo Request to be sent.
```bash
> ping fdde:ad00:beef:0:558:f56b:d688:799
16 bytes from fdde:ad00:beef:0:558:f56b:d688:799: icmp_seq=1 hlim=64 time=28ms
+
+> ping ff05::1 100 1 1 1
```
### ping stop
@@ -1143,31 +1178,31 @@
Done
```
-### routerrole
+### routereligible
Indicates whether the router role is enabled or disabled.
```bash
-> routerrole
+> routereligible
Enabled
Done
```
-### routerrole enable
+### routereligible enable
Enable the router role.
```bash
-> routerrole enable
+> routereligible enable
Done
```
-### routerrole disable
+### routereligible disable
Disable the router role.
```bash
-> routerrole disable
+> routereligible disable
Done
```
@@ -1314,6 +1349,16 @@
Done
```
+### thread version
+
+Get the Thread Version number.
+
+```bash
+> thread version
+2
+Done
+```
+
### txpower
Get the transmit power in dBm.
@@ -1343,6 +1388,44 @@
Done
```
+### mac retries direct
+
+Get the number of direct TX retries on the MAC layer.
+
+```bash
+> mac retries direct
+3
+Done
+```
+
+### mac retries direct \<number\>
+
+Set the number of direct TX retries on the MAC layer.
+
+```bash
+> mac retries direct 5
+Done
+```
+
+### mac retries indirect
+
+Get the number of indirect TX retries on the MAC layer.
+
+```bash
+> mac retries indirect
+3
+Done
+```
+
+### mac retries indirect \<number\>
+
+Set the number of indirect TX retries on the MAC layer.
+
+```bash
+> mac retries indirect 5
+Done
+```
+
### macfilter
List the macfilter status, including address and received signal strength filter settings.
@@ -1516,6 +1599,8 @@
```bash
> service add 44970 foo bar
Done
+> netdataregister
+Done
> ipaddr
fdde:ad00:beef:0:0:ff:fe00:fc10
fdde:ad00:beef:0:0:ff:fe00:fc00
@@ -1532,6 +1617,14 @@
```bash
> service remove 44970 foo
Done
+> netdataregister
+Done
+> ipaddr
+fdde:ad00:beef:0:0:ff:fe00:fc00
+fdde:ad00:beef:0:0:ff:fe00:7c00
+fe80:0:0:0:1486:2f57:3c:6e10
+fdde:ad00:beef:0:8ca4:19ed:217a:eff9
+Done
```
[DIAG]:../../src/core/diags/README.md
diff --git a/src/cli/README_UDP.md b/src/cli/README_UDP.md
index 29fbc54..24592c1 100644
--- a/src/cli/README_UDP.md
+++ b/src/cli/README_UDP.md
@@ -113,8 +113,32 @@
```bash
> udp send fdde:ad00:beef:0:bb1:ebd6:ad10:f33 1234 hello
+Done
```
+### send \<ip\> \<port\> \<type\> \<value\>
+
+Send a few bytes over UDP.
+
+* ip: the IPv6 destination address.
+* port: the UDP destination port.
+* type: the type of the message:
+ * `-t`: text payload in the `value`, same as without specifying the type.
+ * `-s`: autogenerated payload with specified length indicated in the `value`.
+ * `-x`: binary data in hexadecimal representation in the `value`.
+
+
+```bash
+> udp send fdde:ad00:beef:0:bb1:ebd6:ad10:f33 1234 -t hello
+Done
+
+> udp send fdde:ad00:beef:0:bb1:ebd6:ad10:f33 1234 -x 68656c6c6f
+Done
+
+> udp send fdde:ad00:beef:0:bb1:ebd6:ad10:f33 1234 -s 800
+Done
+
+```
### send \<message\>
Send a UDP message on a connected socket.
@@ -123,4 +147,25 @@
```bash
> udp send hello
+Done
+```
+
+### send \<type\> \<value\>
+
+Send a few bytes over UDP.
+
+* type: the type of the message:
+ * `-t`: text payload in the `value`, same as without specifying the type.
+ * `-s`: autogenerated payload with specified length indicated in the `value`.
+ * `-x`: binary data in hexadecimal representation in the `value`.
+
+```bash
+> udp send -t hello
+Done
+
+> udp send -x 68656c6c6f
+Done
+
+> udp send -s 800
+Done
```
diff --git a/src/cli/cli.cpp b/src/cli/cli.cpp
index 7f71aef..d446bc3 100644
--- a/src/cli/cli.cpp
+++ b/src/cli/cli.cpp
@@ -37,11 +37,11 @@
#include <stdlib.h>
#include "mac/channel_mask.hpp"
#include "utils/parse_cmdline.hpp"
-#include "utils/wrap_string.h"
#include <openthread/icmp6.h>
#include <openthread/link.h>
#include <openthread/ncp.h>
+#include <openthread/netdata.h>
#include <openthread/thread.h>
#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
#include <openthread/network_time.h>
@@ -82,6 +82,7 @@
#include "cli_server.hpp"
#include "common/encoding.hpp"
+#include "common/string.hpp"
using ot::Encoding::BigEndian::HostSwap16;
using ot::Encoding::BigEndian::HostSwap32;
@@ -105,7 +106,7 @@
#if OPENTHREAD_CONFIG_COAP_SECURE_API_ENABLE
{"coaps", &Interpreter::ProcessCoapSecure},
#endif
-#if OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_METRICS_ENABLE
+#if OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE
{"coex", &Interpreter::ProcessCoexMetrics},
#endif
#if OPENTHREAD_CONFIG_COMMISSIONER_ENABLE && OPENTHREAD_FTD
@@ -155,6 +156,7 @@
{"leaderpartitionid", &Interpreter::ProcessLeaderPartitionId},
{"leaderweight", &Interpreter::ProcessLeaderWeight},
#endif
+ {"mac", &Interpreter::ProcessMac},
#if OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
{"macfilter", &Interpreter::ProcessMacFilter},
#endif
@@ -166,9 +168,7 @@
#if OPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE || OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
{"netdataregister", &Interpreter::ProcessNetworkDataRegister},
#endif
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
{"netdatashow", &Interpreter::ProcessNetworkDataShow},
-#endif
#if OPENTHREAD_FTD || OPENTHREAD_CONFIG_TMF_NETWORK_DIAG_MTD_ENABLE
{"networkdiagnostic", &Interpreter::ProcessNetworkDiagnostic},
#endif // OPENTHREAD_FTD || OPENTHREAD_CONFIG_TMF_NETWORK_DIAG_MTD_ENABLE
@@ -191,7 +191,7 @@
{"prefix", &Interpreter::ProcessPrefix},
#endif
#if OPENTHREAD_FTD
- {"pskc", &Interpreter::ProcessPSKc},
+ {"pskc", &Interpreter::ProcessPskc},
{"releaserouterid", &Interpreter::ProcessReleaseRouterId},
#endif
{"reset", &Interpreter::ProcessReset},
@@ -202,7 +202,7 @@
#if OPENTHREAD_FTD
{"router", &Interpreter::ProcessRouter},
{"routerdowngradethreshold", &Interpreter::ProcessRouterDowngradeThreshold},
- {"routerrole", &Interpreter::ProcessRouterRole},
+ {"routereligible", &Interpreter::ProcessRouterEligible},
{"routerselectionjitter", &Interpreter::ProcessRouterSelectionJitter},
{"routerupgradethreshold", &Interpreter::ProcessRouterUpgradeThreshold},
#endif
@@ -232,6 +232,9 @@
#if OPENTHREAD_CONFIG_DNS_CLIENT_ENABLE
, mResolvingInProgress(0)
#endif
+#if OPENTHREAD_CONFIG_SNTP_CLIENT_ENABLE
+ , mSntpQueryingInProgress(false)
+#endif
, mUdp(*this)
, mDataset(*this)
#if OPENTHREAD_CONFIG_COAP_API_ENABLE
@@ -261,16 +264,20 @@
#endif // OPENTHREAD_CONFIG_DNS_CLIENT_ENABLE
}
-int Interpreter::Hex2Bin(const char *aHex, uint8_t *aBin, uint16_t aBinLength)
+int Interpreter::Hex2Bin(const char *aHex, uint8_t *aBin, uint16_t aBinLength, bool aAllowTruncate)
{
size_t hexLength = strlen(aHex);
const char *hexEnd = aHex + hexLength;
uint8_t * cur = aBin;
uint8_t numChars = hexLength & 1;
uint8_t byte = 0;
+ int len = 0;
int rval;
- VerifyOrExit((hexLength + 1) / 2 <= aBinLength, rval = -1);
+ if (!aAllowTruncate)
+ {
+ VerifyOrExit((hexLength + 1) / 2 <= aBinLength, rval = -1);
+ }
while (aHex < hexEnd)
{
@@ -299,6 +306,12 @@
numChars = 0;
*cur++ = byte;
byte = 0;
+ len++;
+
+ if (len == aBinLength)
+ {
+ ExitNow(rval = len);
+ }
}
else
{
@@ -306,7 +319,7 @@
}
}
- rval = static_cast<int>(cur - aBin);
+ rval = len;
exit:
return rval;
@@ -450,6 +463,14 @@
{
mServer->OutputFormat("%d\r\n", otLinkGetChannel(mInstance));
}
+ else if (strcmp(argv[0], "supported") == 0)
+ {
+ mServer->OutputFormat("0x%x\r\n", otPlatRadioGetSupportedChannelMask(mInstance));
+ }
+ else if (strcmp(argv[0], "preferred") == 0)
+ {
+ mServer->OutputFormat("0x%x\r\n", otPlatRadioGetPreferredChannelMask(mInstance));
+ }
#if OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE
else if (strcmp(argv[0], "monitor") == 0)
{
@@ -524,12 +545,14 @@
SuccessOrExit(error = ParseLong(argv[2], value));
otChannelManagerRequestChannelChange(mInstance, static_cast<uint8_t>(value));
}
+#if OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE
else if (strcmp(argv[1], "select") == 0)
{
VerifyOrExit(argc > 2, error = OT_ERROR_INVALID_ARGS);
SuccessOrExit(error = ParseLong(argv[2], value));
error = otChannelManagerRequestChannelSelect(mInstance, (value != 0) ? true : false);
}
+#endif
else if (strcmp(argv[1], "auto") == 0)
{
VerifyOrExit(argc > 2, error = OT_ERROR_INVALID_ARGS);
@@ -784,43 +807,62 @@
#endif // OPENTHREAD_CONFIG_COAP_SECURE_API_ENABLE
-#if OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_METRICS_ENABLE
+#if OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE
void Interpreter::ProcessCoexMetrics(int argc, char *argv[])
{
- OT_UNUSED_VARIABLE(argc);
- OT_UNUSED_VARIABLE(argv);
+ otError error = OT_ERROR_NONE;
- otRadioCoexMetrics metrics;
- otError error = otPlatRadioGetCoexMetrics(mInstance, &metrics);
+ if (argc == 0)
+ {
+ mServer->OutputFormat("%s\r\n", otPlatRadioIsCoexEnabled(mInstance) ? "Enabled" : "Disabled");
+ }
+ else if (strcmp(argv[0], "enable") == 0)
+ {
+ error = otPlatRadioSetCoexEnabled(mInstance, true);
+ }
+ else if (strcmp(argv[0], "disable") == 0)
+ {
+ error = otPlatRadioSetCoexEnabled(mInstance, false);
+ }
+ else if (strcmp(argv[0], "metrics") == 0)
+ {
+ otRadioCoexMetrics metrics;
- SuccessOrExit(error);
+ SuccessOrExit(error = otPlatRadioGetCoexMetrics(mInstance, &metrics));
- mServer->OutputFormat("Stopped: %s\r\n", metrics.mStopped ? "true" : "false");
- mServer->OutputFormat("Grant Glitch: %u\r\n", metrics.mNumGrantGlitch);
- mServer->OutputFormat("Transmit metrics\r\n");
- mServer->OutputFormat(" Request: %u\r\n", metrics.mNumTxRequest);
- mServer->OutputFormat(" Grant Immediate: %u\r\n", metrics.mNumTxGrantImmediate);
- mServer->OutputFormat(" Grant Wait: %u\r\n", metrics.mNumTxGrantWait);
- mServer->OutputFormat(" Grant Wait Activated: %u\r\n", metrics.mNumTxGrantWaitActivated);
- mServer->OutputFormat(" Grant Wait Timeout: %u\r\n", metrics.mNumTxGrantWaitTimeout);
- mServer->OutputFormat(" Grant Deactivated During Request: %u\r\n", metrics.mNumTxGrantDeactivatedDuringRequest);
- mServer->OutputFormat(" Delayed Grant: %u\r\n", metrics.mNumTxDelayedGrant);
- mServer->OutputFormat(" Average Request To Grant Time: %u\r\n", metrics.mAvgTxRequestToGrantTime);
- mServer->OutputFormat("Receive metrics\r\n");
- mServer->OutputFormat(" Request: %u\r\n", metrics.mNumRxRequest);
- mServer->OutputFormat(" Grant Immediate: %u\r\n", metrics.mNumRxGrantImmediate);
- mServer->OutputFormat(" Grant Wait: %u\r\n", metrics.mNumRxGrantWait);
- mServer->OutputFormat(" Grant Wait Activated: %u\r\n", metrics.mNumRxGrantWaitActivated);
- mServer->OutputFormat(" Grant Wait Timeout: %u\r\n", metrics.mNumRxGrantWaitTimeout);
- mServer->OutputFormat(" Grant Deactivated During Request: %u\r\n", metrics.mNumRxGrantDeactivatedDuringRequest);
- mServer->OutputFormat(" Delayed Grant: %u\r\n", metrics.mNumRxDelayedGrant);
- mServer->OutputFormat(" Average Request To Grant Time: %u\r\n", metrics.mAvgRxRequestToGrantTime);
- mServer->OutputFormat(" Grant None: %u\r\n", metrics.mNumRxGrantNone);
+ mServer->OutputFormat("Stopped: %s\r\n", metrics.mStopped ? "true" : "false");
+ mServer->OutputFormat("Grant Glitch: %u\r\n", metrics.mNumGrantGlitch);
+ mServer->OutputFormat("Transmit metrics\r\n");
+ mServer->OutputFormat(" Request: %u\r\n", metrics.mNumTxRequest);
+ mServer->OutputFormat(" Grant Immediate: %u\r\n", metrics.mNumTxGrantImmediate);
+ mServer->OutputFormat(" Grant Wait: %u\r\n", metrics.mNumTxGrantWait);
+ mServer->OutputFormat(" Grant Wait Activated: %u\r\n", metrics.mNumTxGrantWaitActivated);
+ mServer->OutputFormat(" Grant Wait Timeout: %u\r\n", metrics.mNumTxGrantWaitTimeout);
+ mServer->OutputFormat(" Grant Deactivated During Request: %u\r\n",
+ metrics.mNumTxGrantDeactivatedDuringRequest);
+ mServer->OutputFormat(" Delayed Grant: %u\r\n", metrics.mNumTxDelayedGrant);
+ mServer->OutputFormat(" Average Request To Grant Time: %u\r\n", metrics.mAvgTxRequestToGrantTime);
+ mServer->OutputFormat("Receive metrics\r\n");
+ mServer->OutputFormat(" Request: %u\r\n", metrics.mNumRxRequest);
+ mServer->OutputFormat(" Grant Immediate: %u\r\n", metrics.mNumRxGrantImmediate);
+ mServer->OutputFormat(" Grant Wait: %u\r\n", metrics.mNumRxGrantWait);
+ mServer->OutputFormat(" Grant Wait Activated: %u\r\n", metrics.mNumRxGrantWaitActivated);
+ mServer->OutputFormat(" Grant Wait Timeout: %u\r\n", metrics.mNumRxGrantWaitTimeout);
+ mServer->OutputFormat(" Grant Deactivated During Request: %u\r\n",
+ metrics.mNumRxGrantDeactivatedDuringRequest);
+ mServer->OutputFormat(" Delayed Grant: %u\r\n", metrics.mNumRxDelayedGrant);
+ mServer->OutputFormat(" Average Request To Grant Time: %u\r\n", metrics.mAvgRxRequestToGrantTime);
+ mServer->OutputFormat(" Grant None: %u\r\n", metrics.mNumRxGrantNone);
+ }
+ else
+ {
+ ExitNow(error = OT_ERROR_INVALID_ARGS);
+ }
exit:
AppendResult(error);
}
-#endif // OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_METRICS_ENABLE
+#endif // OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE
#if OPENTHREAD_FTD
void Interpreter::ProcessContextIdReuseDelay(int argc, char *argv[])
@@ -852,9 +894,9 @@
mServer->OutputFormat("mac\r\n");
mServer->OutputFormat("mle\r\n");
}
- else if (argc == 1)
+ else if (strcmp(argv[0], "mac") == 0)
{
- if (strcmp(argv[0], "mac") == 0)
+ if (argc == 1)
{
const otMacCounters *macCounters = otLinkGetCounters(mInstance);
@@ -890,7 +932,18 @@
mServer->OutputFormat(" RxErrFcs: %d\r\n", macCounters->mRxErrFcs);
mServer->OutputFormat(" RxErrOther: %d\r\n", macCounters->mRxErrOther);
}
- else if (strcmp(argv[0], "mle") == 0)
+ else if ((argc == 2) && (strcmp(argv[0], "reset") == 0))
+ {
+ otLinkResetCounters(mInstance);
+ }
+ else
+ {
+ ExitNow(error = OT_ERROR_INVALID_ARGS);
+ }
+ }
+ else if (strcmp(argv[0], "mle") == 0)
+ {
+ if (argc == 1)
{
const otMleCounters *mleCounters = otThreadGetMleCounters(mInstance);
@@ -905,6 +958,10 @@
mleCounters->mBetterPartitionAttachAttempts);
mServer->OutputFormat("Parent Changes: %d\r\n", mleCounters->mParentChanges);
}
+ else if ((argc == 2) && (strcmp(argv[0], "reset") == 0))
+ {
+ otThreadResetMleCounters(mInstance);
+ }
else
{
ExitNow(error = OT_ERROR_INVALID_ARGS);
@@ -1024,23 +1081,26 @@
}
}
-void Interpreter::HandleDnsResponse(void * aContext,
- const char * aHostname,
- otIp6Address *aAddress,
- uint32_t aTtl,
- otError aResult)
+void Interpreter::HandleDnsResponse(void * aContext,
+ const char * aHostname,
+ const otIp6Address *aAddress,
+ uint32_t aTtl,
+ otError aResult)
{
- static_cast<Interpreter *>(aContext)->HandleDnsResponse(aHostname, *static_cast<Ip6::Address *>(aAddress), aTtl,
- aResult);
+ static_cast<Interpreter *>(aContext)->HandleDnsResponse(aHostname, static_cast<const Ip6::Address *>(aAddress),
+ aTtl, aResult);
}
-void Interpreter::HandleDnsResponse(const char *aHostname, Ip6::Address &aAddress, uint32_t aTtl, otError aResult)
+void Interpreter::HandleDnsResponse(const char *aHostname, const Ip6::Address *aAddress, uint32_t aTtl, otError aResult)
{
mServer->OutputFormat("DNS response for %s - ", aHostname);
if (aResult == OT_ERROR_NONE)
{
- OutputIp6Address(aAddress);
+ if (aAddress != NULL)
+ {
+ OutputIp6Address(*aAddress);
+ }
mServer->OutputFormat(" TTL: %d\r\n", aTtl);
}
else
@@ -1486,13 +1546,13 @@
#endif // OPENTHREAD_FTD
#if OPENTHREAD_FTD
-void Interpreter::ProcessPSKc(int argc, char *argv[])
+void Interpreter::ProcessPskc(int argc, char *argv[])
{
otError error = OT_ERROR_NONE;
if (argc == 0)
{
- const otPSKc *pskc = otThreadGetPSKc(mInstance);
+ const otPskc *pskc = otThreadGetPskc(mInstance);
for (int i = 0; i < OT_PSKC_MAX_SIZE; i++)
{
@@ -1503,10 +1563,10 @@
}
else
{
- otPSKc pskc;
+ otPskc pskc;
VerifyOrExit(Hex2Bin(argv[0], pskc.m8, sizeof(pskc)) == OT_PSKC_MAX_SIZE, error = OT_ERROR_PARSE);
- SuccessOrExit(error = otThreadSetPSKc(mInstance, &pskc));
+ SuccessOrExit(error = otThreadSetPskc(mInstance, &pskc));
}
exit:
@@ -1668,7 +1728,6 @@
}
#endif
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
void Interpreter::ProcessNetworkDataShow(int argc, char *argv[])
{
OT_UNUSED_VARIABLE(argc);
@@ -1687,6 +1746,7 @@
AppendResult(error);
}
+#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
void Interpreter::ProcessService(int argc, char *argv[])
{
otError error = OT_ERROR_NONE;
@@ -1945,7 +2005,7 @@
if (aMessage.Read(aMessage.GetOffset(), sizeof(uint32_t), ×tamp) >= static_cast<int>(sizeof(uint32_t)))
{
- mServer->OutputFormat(" time=%dms", TimerMilli::Elapsed(HostSwap32(timestamp)));
+ mServer->OutputFormat(" time=%dms", TimerMilli::GetNow().GetValue() - HostSwap32(timestamp));
}
mServer->OutputFormat("\r\n");
@@ -1979,6 +2039,7 @@
VerifyOrExit(!mPingTimer.IsRunning(), error = OT_ERROR_BUSY);
+ mMessageInfo = Ip6::MessageInfo();
SuccessOrExit(error = mMessageInfo.GetPeerAddr().FromString(argv[0]));
mLength = 8;
@@ -2001,10 +2062,20 @@
case 3:
SuccessOrExit(error = ParsePingInterval(argv[index], interval));
- VerifyOrExit(0 < interval && interval <= Timer::kMaxDt, error = OT_ERROR_INVALID_ARGS);
+ VerifyOrExit(0 < interval && interval <= Timer::kMaxDelay, error = OT_ERROR_INVALID_ARGS);
mInterval = interval;
break;
+ case 4:
+ SuccessOrExit(error = ParseLong(argv[index], value));
+ VerifyOrExit(0 <= value && value <= 255, error = OT_ERROR_INVALID_ARGS);
+ mMessageInfo.mHopLimit = static_cast<uint8_t>(value);
+ if (value == 0)
+ {
+ mMessageInfo.mAllowZeroHopLimit = true;
+ }
+ break;
+
default:
ExitNow(error = OT_ERROR_INVALID_ARGS);
}
@@ -2028,7 +2099,7 @@
void Interpreter::HandlePingTimer()
{
otError error = OT_ERROR_NONE;
- uint32_t timestamp = HostSwap32(TimerMilli::GetNow());
+ uint32_t timestamp = HostSwap32(TimerMilli::GetNow().GetValue());
otMessage * message;
const otMessageInfo *messageInfo = static_cast<const otMessageInfo *>(&mMessageInfo);
@@ -2706,13 +2777,13 @@
AppendResult(error);
}
-void Interpreter::ProcessRouterRole(int argc, char *argv[])
+void Interpreter::ProcessRouterEligible(int argc, char *argv[])
{
otError error = OT_ERROR_NONE;
if (argc == 0)
{
- if (otThreadIsRouterRoleEnabled(mInstance))
+ if (otThreadIsRouterEligible(mInstance))
{
mServer->OutputFormat("Enabled\r\n");
}
@@ -2723,11 +2794,11 @@
}
else if (strcmp(argv[0], "enable") == 0)
{
- otThreadSetRouterRoleEnabled(mInstance, true);
+ error = otThreadSetRouterEligible(mInstance, true);
}
else if (strcmp(argv[0], "disable") == 0)
{
- otThreadSetRouterRoleEnabled(mInstance, false);
+ error = otThreadSetRouterEligible(mInstance, false);
}
else
{
@@ -3056,6 +3127,10 @@
{
SuccessOrExit(error = otThreadSetEnabled(mInstance, false));
}
+ else if (strcmp(argv[0], "version") == 0)
+ {
+ mServer->OutputFormat("%u\r\n", otThreadGetVersion());
+ }
else
{
ExitNow(error = OT_ERROR_INVALID_ARGS);
@@ -3448,6 +3523,74 @@
#endif // OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
+void Interpreter::ProcessMac(int argc, char *argv[])
+{
+ otError error = OT_ERROR_NONE;
+
+ VerifyOrExit(argc > 0, error = OT_ERROR_INVALID_ARGS);
+
+ if (strcmp(argv[0], "retries") == 0)
+ {
+ error = ProcessMacRetries(argc - 1, argv + 1);
+ }
+ else
+ {
+ error = OT_ERROR_INVALID_ARGS;
+ }
+
+exit:
+ AppendResult(error);
+}
+
+otError Interpreter::ProcessMacRetries(int argc, char *argv[])
+{
+ otError error = OT_ERROR_NONE;
+
+ VerifyOrExit(argc > 0 && argc <= 2, error = OT_ERROR_INVALID_ARGS);
+
+ if (strcmp(argv[0], "direct") == 0)
+ {
+ if (argc == 1)
+ {
+ mServer->OutputFormat("%d\r\n", otLinkGetMaxFrameRetriesDirect(mInstance));
+ }
+ else
+ {
+ unsigned long value;
+
+ SuccessOrExit(error = ParseUnsignedLong(argv[1], value));
+ VerifyOrExit(value <= 0xff, error = OT_ERROR_INVALID_ARGS);
+
+ otLinkSetMaxFrameRetriesDirect(mInstance, static_cast<uint8_t>(value));
+ }
+ }
+#if OPENTHREAD_FTD
+ else if (strcmp(argv[0], "indirect") == 0)
+ {
+ if (argc == 1)
+ {
+ mServer->OutputFormat("%d\r\n", otLinkGetMaxFrameRetriesIndirect(mInstance));
+ }
+ else
+ {
+ unsigned long value;
+
+ SuccessOrExit(error = ParseUnsignedLong(argv[1], value));
+ VerifyOrExit(value <= 0xff, error = OT_ERROR_INVALID_ARGS);
+
+ otLinkSetMaxFrameRetriesIndirect(mInstance, static_cast<uint8_t>(value));
+ }
+ }
+#endif
+ else
+ {
+ error = OT_ERROR_INVALID_ARGS;
+ }
+
+exit:
+ return error;
+}
+
#if OPENTHREAD_CONFIG_DIAG_ENABLE
void Interpreter::ProcessDiag(int argc, char *argv[])
{
@@ -3468,7 +3611,7 @@
mServer = &aServer;
- VerifyOrExit(aBuf != NULL && strnlen(aBuf, aBufLength + 1) <= aBufLength);
+ VerifyOrExit(aBuf != NULL && StringLength(aBuf, aBufLength + 1) <= aBufLength);
VerifyOrExit(Utils::CmdLineParser::ParseCmd(aBuf, argc, argv, kMaxArgs) == OT_ERROR_NONE,
mServer->OutputFormat("Error: too many args (max %d)\r\n", kMaxArgs));
diff --git a/src/cli/cli.hpp b/src/cli/cli.hpp
index e831881..c7c465a 100644
--- a/src/cli/cli.hpp
+++ b/src/cli/cli.hpp
@@ -147,13 +147,16 @@
/**
* This method converts a hex string to binary.
*
- * @param[in] aHex A pointer to the hex string.
- * @param[out] aBin A pointer to where the binary representation is placed.
- * @param[in] aBinLength Maximum length of the binary representation.
+ * @param[in] aHex A pointer to the hex string.
+ * @param[out] aBin A pointer to where the binary representation is placed.
+ * @param[in] aBinLength Maximum length of the binary representation.
+ * @param[in] aAllowTruncate TRUE if @p aBinLength may be less than what is required
+ * to convert @p aHex to binary representation, FALSE otherwise.
+ *
*
* @returns The number of bytes in the binary representation.
*/
- static int Hex2Bin(const char *aHex, uint8_t *aBin, uint16_t aBinLength);
+ static int Hex2Bin(const char *aHex, uint8_t *aBin, uint16_t aBinLength, bool aAllowTruncate = false);
/**
* Write error code the CLI console
@@ -208,7 +211,7 @@
#if OPENTHREAD_CONFIG_COAP_SECURE_API_ENABLE
void ProcessCoapSecure(int argc, char *argv[]);
#endif // OPENTHREAD_CONFIG_COAP_API_ENABLE
-#if OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_METRICS_ENABLE
+#if OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE
void ProcessCoexMetrics(int argc, char *argv[]);
#endif
#if OPENTHREAD_CONFIG_COMMISSIONER_ENABLE && OPENTHREAD_FTD
@@ -269,8 +272,8 @@
#if OPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE || OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
void ProcessNetworkDataRegister(int argc, char *argv[]);
#endif
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
void ProcessNetworkDataShow(int argc, char *argv[]);
+#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
void ProcessService(int argc, char *argv[]);
#endif
#if OPENTHREAD_FTD || OPENTHREAD_CONFIG_TMF_NETWORK_DIAG_MTD_ENABLE
@@ -298,7 +301,7 @@
#endif
void ProcessPromiscuous(int argc, char *argv[]);
#if OPENTHREAD_FTD
- void ProcessPSKc(int argc, char *argv[]);
+ void ProcessPskc(int argc, char *argv[]);
void ProcessReleaseRouterId(int argc, char *argv[]);
#endif
void ProcessReset(int argc, char *argv[]);
@@ -311,7 +314,7 @@
#if OPENTHREAD_FTD
void ProcessRouter(int argc, char *argv[]);
void ProcessRouterDowngradeThreshold(int argc, char *argv[]);
- void ProcessRouterRole(int argc, char *argv[]);
+ void ProcessRouterEligible(int argc, char *argv[]);
void ProcessRouterSelectionJitter(int argc, char *argv[]);
void ProcessRouterUpgradeThreshold(int argc, char *argv[]);
#endif
@@ -333,6 +336,8 @@
otError ProcessMacFilterAddress(int argc, char *argv[]);
otError ProcessMacFilterRss(int argc, char *argv[]);
#endif // OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
+ void ProcessMac(int argc, char *argv[]);
+ otError ProcessMacRetries(int argc, char *argv[]);
static void HandleIcmpReceive(void * aContext,
otMessage * aMessage,
@@ -345,11 +350,11 @@
static void HandleDiagnosticGetResponse(otMessage *aMessage, const otMessageInfo *aMessageInfo, void *aContext);
#if OPENTHREAD_CONFIG_DNS_CLIENT_ENABLE
- static void HandleDnsResponse(void * aContext,
- const char * aHostname,
- otIp6Address *aAddress,
- uint32_t aTtl,
- otError aResult);
+ static void HandleDnsResponse(void * aContext,
+ const char * aHostname,
+ const otIp6Address *aAddress,
+ uint32_t aTtl,
+ otError aResult);
#endif
#if OPENTHREAD_CONFIG_SNTP_CLIENT_ENABLE
@@ -363,7 +368,7 @@
void HandleLinkPcapReceive(const otRadioFrame *aFrame, bool aIsTx);
void HandleDiagnosticGetResponse(Message &aMessage, const Ip6::MessageInfo &aMessageInfo);
#if OPENTHREAD_CONFIG_DNS_CLIENT_ENABLE
- void HandleDnsResponse(const char *aHostname, Ip6::Address &aAddress, uint32_t aTtl, otError aResult);
+ void HandleDnsResponse(const char *aHostname, const Ip6::Address *aAddress, uint32_t aTtl, otError aResult);
#endif
#if OPENTHREAD_CONFIG_SNTP_CLIENT_ENABLE
void HandleSntpResponse(uint64_t aTime, otError aResult);
diff --git a/src/cli/cli_coap.cpp b/src/cli/cli_coap.cpp
index 15128ae..cf9418a 100644
--- a/src/cli/cli_coap.cpp
+++ b/src/cli/cli_coap.cpp
@@ -107,7 +107,7 @@
mResource.mContext = this;
mResource.mHandler = &Coap::HandleRequest;
- strlcpy(mUriPath, argv[1], kMaxUriLength);
+ strncpy(mUriPath, argv[1], sizeof(mUriPath) - 1);
SuccessOrExit(error = otCoapAddResource(mInterpreter.mInstance, &mResource));
}
else
@@ -188,7 +188,7 @@
if (argc > 2)
{
VerifyOrExit(strlen(argv[2]) < kMaxUriLength, error = OT_ERROR_INVALID_ARGS);
- strlcpy(coapUri, argv[2], kMaxUriLength);
+ strncpy(coapUri, argv[2], sizeof(coapUri) - 1);
}
else
{
@@ -330,10 +330,8 @@
responseMessage = otCoapNewMessage(mInterpreter.mInstance, NULL);
VerifyOrExit(responseMessage != NULL, error = OT_ERROR_NO_BUFS);
- otCoapMessageInit(responseMessage, OT_COAP_TYPE_ACKNOWLEDGMENT, responseCode);
- otCoapMessageSetMessageId(responseMessage, otCoapMessageGetMessageId(aMessage));
- SuccessOrExit(error = otCoapMessageSetToken(responseMessage, otCoapMessageGetToken(aMessage),
- otCoapMessageGetTokenLength(aMessage)));
+ SuccessOrExit(
+ error = otCoapMessageInitResponse(responseMessage, aMessage, OT_COAP_TYPE_ACKNOWLEDGMENT, responseCode));
if (otCoapMessageGetCode(aMessage) == OT_COAP_CODE_GET)
{
diff --git a/src/cli/cli_coap_secure.cpp b/src/cli/cli_coap_secure.cpp
index d9ed1d5..3c14f7be 100644
--- a/src/cli/cli_coap_secure.cpp
+++ b/src/cli/cli_coap_secure.cpp
@@ -47,12 +47,17 @@
namespace Cli {
const struct CoapSecure::Command CoapSecure::sCommands[] = {
- {"help", &CoapSecure::ProcessHelp}, {"connect", &CoapSecure::ProcessConnect},
- {"delete", &CoapSecure::ProcessRequest}, {"disconnect", &CoapSecure::ProcessDisconnect},
- {"get", &CoapSecure::ProcessRequest}, {"post", &CoapSecure::ProcessRequest},
- {"psk", &CoapSecure::ProcessPsk}, {"put", &CoapSecure::ProcessRequest},
- {"resource", &CoapSecure::ProcessResource}, {"start", &CoapSecure::ProcessStart},
- {"stop", &CoapSecure::ProcessStop}, {"x509", &CoapSecure::ProcessX509},
+ {"help", &CoapSecure::ProcessHelp}, {"connect", &CoapSecure::ProcessConnect},
+ {"delete", &CoapSecure::ProcessRequest}, {"disconnect", &CoapSecure::ProcessDisconnect},
+ {"get", &CoapSecure::ProcessRequest}, {"post", &CoapSecure::ProcessRequest},
+ {"put", &CoapSecure::ProcessRequest}, {"resource", &CoapSecure::ProcessResource},
+ {"start", &CoapSecure::ProcessStart}, {"stop", &CoapSecure::ProcessStop},
+#ifdef MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+ {"psk", &CoapSecure::ProcessPsk},
+#endif
+#ifdef MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+ {"x509", &CoapSecure::ProcessX509},
+#endif
};
CoapSecure::CoapSecure(Interpreter &aInterpreter)
@@ -118,7 +123,7 @@
mResource.mContext = this;
mResource.mHandler = &CoapSecure::HandleRequest;
- strlcpy(mUriPath, argv[1], kMaxUriLength);
+ strncpy(mUriPath, argv[1], sizeof(mUriPath) - 1);
SuccessOrExit(error = otCoapSecureAddResource(mInterpreter.mInstance, &mResource));
}
else
@@ -242,7 +247,7 @@
// CoAP-URI
if (argc > (2 - indexShifter))
{
- strlcpy(coapUri, argv[2 - indexShifter], kMaxUriLength);
+ strncpy(coapUri, argv[2 - indexShifter], sizeof(coapUri) - 1);
}
// CoAP-Type
@@ -338,9 +343,10 @@
return OT_ERROR_NONE;
}
+#ifdef MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
otError CoapSecure::ProcessPsk(int argc, char *argv[])
{
- otError error;
+ otError error = OT_ERROR_NONE;
size_t length;
VerifyOrExit(argc > 2, error = OT_ERROR_INVALID_ARGS);
@@ -355,36 +361,31 @@
mPskIdLength = static_cast<uint8_t>(length);
memcpy(mPskId, argv[2], mPskIdLength);
- SuccessOrExit(error = otCoapSecureSetPsk(mInterpreter.mInstance, mPsk, mPskLength, mPskId, mPskIdLength));
+ otCoapSecureSetPsk(mInterpreter.mInstance, mPsk, mPskLength, mPskId, mPskIdLength);
mUseCertificate = false;
exit:
return error;
}
+#endif // MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+#ifdef MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
otError CoapSecure::ProcessX509(int argc, char *argv[])
{
OT_UNUSED_VARIABLE(argc);
OT_UNUSED_VARIABLE(argv);
-#ifdef MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
- otError error;
+ otCoapSecureSetCertificate(mInterpreter.mInstance, (const uint8_t *)OT_CLI_COAPS_X509_CERT,
+ sizeof(OT_CLI_COAPS_X509_CERT), (const uint8_t *)OT_CLI_COAPS_PRIV_KEY,
+ sizeof(OT_CLI_COAPS_PRIV_KEY));
- SuccessOrExit(error = otCoapSecureSetCertificate(
- mInterpreter.mInstance, (const uint8_t *)OT_CLI_COAPS_X509_CERT, sizeof(OT_CLI_COAPS_X509_CERT),
- (const uint8_t *)OT_CLI_COAPS_PRIV_KEY, sizeof(OT_CLI_COAPS_PRIV_KEY)));
-
- SuccessOrExit(error = otCoapSecureSetCaCertificateChain(mInterpreter.mInstance,
- (const uint8_t *)OT_CLI_COAPS_TRUSTED_ROOT_CERTIFICATE,
- sizeof(OT_CLI_COAPS_TRUSTED_ROOT_CERTIFICATE)));
+ otCoapSecureSetCaCertificateChain(mInterpreter.mInstance, (const uint8_t *)OT_CLI_COAPS_TRUSTED_ROOT_CERTIFICATE,
+ sizeof(OT_CLI_COAPS_TRUSTED_ROOT_CERTIFICATE));
mUseCertificate = true;
-exit:
- return error;
-#else
- return OT_ERROR_DISABLED_FEATURE;
-#endif
+ return OT_ERROR_NONE;
}
+#endif
otError CoapSecure::Process(int argc, char *argv[])
{
@@ -495,10 +496,8 @@
responseMessage = otCoapNewMessage(mInterpreter.mInstance, NULL);
VerifyOrExit(responseMessage != NULL, error = OT_ERROR_NO_BUFS);
- otCoapMessageInit(responseMessage, OT_COAP_TYPE_ACKNOWLEDGMENT, responseCode);
- otCoapMessageSetMessageId(responseMessage, otCoapMessageGetMessageId(aMessage));
- SuccessOrExit(error = otCoapMessageSetToken(responseMessage, otCoapMessageGetToken(aMessage),
- otCoapMessageGetTokenLength(aMessage)));
+ SuccessOrExit(
+ error = otCoapMessageInitResponse(responseMessage, aMessage, OT_COAP_TYPE_ACKNOWLEDGMENT, responseCode));
if (otCoapMessageGetCode(aMessage) == OT_COAP_CODE_GET)
{
@@ -561,8 +560,8 @@
void CoapSecure::DefaultHandler(otMessage *aMessage, const otMessageInfo *aMessageInfo)
{
- otError error = OT_ERROR_NONE;
- otMessage *responseMessage;
+ otError error = OT_ERROR_NONE;
+ otMessage *responseMessage = NULL;
if ((otCoapMessageGetType(aMessage) == OT_COAP_TYPE_CONFIRMABLE) ||
(otCoapMessageGetCode(aMessage) == OT_COAP_CODE_GET))
@@ -570,16 +569,17 @@
responseMessage = otCoapNewMessage(mInterpreter.mInstance, NULL);
VerifyOrExit(responseMessage != NULL, error = OT_ERROR_NO_BUFS);
- otCoapMessageInit(responseMessage, OT_COAP_TYPE_NON_CONFIRMABLE, OT_COAP_CODE_NOT_FOUND);
- otCoapMessageSetMessageId(responseMessage, otCoapMessageGetMessageId(aMessage));
- SuccessOrExit(error = otCoapMessageSetToken(responseMessage, otCoapMessageGetToken(aMessage),
- otCoapMessageGetTokenLength(aMessage)));
+ SuccessOrExit(error = otCoapMessageInitResponse(responseMessage, aMessage, OT_COAP_TYPE_NON_CONFIRMABLE,
+ OT_COAP_CODE_NOT_FOUND));
SuccessOrExit(error = otCoapSecureSendResponse(mInterpreter.mInstance, responseMessage, aMessageInfo));
}
exit:
- return;
+ if (error != OT_ERROR_NONE && responseMessage != NULL)
+ {
+ otMessageFree(responseMessage);
+ }
}
#endif // CLI_COAP_SECURE_USE_COAP_DEFAULT_HANDLER
diff --git a/src/cli/cli_coap_secure.hpp b/src/cli/cli_coap_secure.hpp
index c6ecec7..6d6b414 100644
--- a/src/cli/cli_coap_secure.hpp
+++ b/src/cli/cli_coap_secure.hpp
@@ -41,6 +41,10 @@
#include "coap/coap_message.hpp"
#include "coap/coap_secure.hpp"
+#ifndef CLI_COAP_SECURE_USE_COAP_DEFAULT_HANDLER
+#define CLI_COAP_SECURE_USE_COAP_DEFAULT_HANDLER 0
+#endif
+
namespace ot {
namespace Cli {
diff --git a/src/cli/cli_config.h b/src/cli/cli_config.h
index 2bb9111..cd77e2b 100644
--- a/src/cli/cli_config.h
+++ b/src/cli/cli_config.h
@@ -65,4 +65,14 @@
#define OPENTHREAD_CONFIG_CLI_UART_TX_BUFFER_SIZE 1024
#endif
+/**
+ * @def OPENTHREAD_CONFIG_UART_CLI_RAW
+ *
+ * TODO: complete.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_UART_CLI_RAW
+#define OPENTHREAD_CONFIG_UART_CLI_RAW 0
+#endif
+
#endif // CONFIG_CLI_H_
diff --git a/src/cli/cli_console.cpp b/src/cli/cli_console.cpp
index 4f90209..e2da74a 100644
--- a/src/cli/cli_console.cpp
+++ b/src/cli/cli_console.cpp
@@ -36,7 +36,6 @@
#include <stdarg.h>
#include <stdio.h>
#include <stdlib.h>
-#include "utils/wrap_string.h"
#include "cli/cli.hpp"
#include "common/instance.hpp"
@@ -45,7 +44,7 @@
namespace ot {
namespace Cli {
-static otDEFINE_ALIGNED_VAR(sCliConsoleRaw, sizeof(Console), uint64_t);
+static OT_DEFINE_ALIGNED_VAR(sCliConsoleRaw, sizeof(Console), uint64_t);
extern "C" void otCliConsoleInit(otInstance *aInstance, otCliConsoleOutputCallback aCallback, void *aContext)
{
diff --git a/src/cli/cli_dataset.cpp b/src/cli/cli_dataset.cpp
index b31a827..36bf134 100644
--- a/src/cli/cli_dataset.cpp
+++ b/src/cli/cli_dataset.cpp
@@ -35,7 +35,6 @@
#include <stdio.h>
#include <stdlib.h>
-#include "utils/wrap_string.h"
#include <openthread/dataset.h>
#include <openthread/dataset_ftd.h>
@@ -65,7 +64,7 @@
{"panid", &Dataset::ProcessPanId},
{"pending", &Dataset::ProcessPending},
{"pendingtimestamp", &Dataset::ProcessPendingTimestamp},
- {"pskc", &Dataset::ProcessPSKc},
+ {"pskc", &Dataset::ProcessPskc},
{"securitypolicy", &Dataset::ProcessSecurityPolicy},
};
@@ -141,10 +140,10 @@
mInterpreter.mServer->OutputFormat("PAN ID: 0x%04x\r\n", aDataset.mPanId);
}
- if (aDataset.mComponents.mIsPSKcPresent)
+ if (aDataset.mComponents.mIsPskcPresent)
{
mInterpreter.mServer->OutputFormat("PSKc: ");
- OutputBytes(aDataset.mPSKc.m8, sizeof(aDataset.mPSKc.m8));
+ OutputBytes(aDataset.mPskc.m8, sizeof(aDataset.mPskc.m8));
mInterpreter.mServer->OutputFormat("\r\n");
}
@@ -675,7 +674,7 @@
return error;
}
-otError Dataset::ProcessPSKc(int argc, char *argv[])
+otError Dataset::ProcessPskc(int argc, char *argv[])
{
otError error = OT_ERROR_NONE;
uint16_t length;
@@ -683,10 +682,10 @@
VerifyOrExit(argc > 0, error = OT_ERROR_INVALID_ARGS);
length = static_cast<uint16_t>((strlen(argv[0]) + 1) / 2);
VerifyOrExit(length <= OT_PSKC_MAX_SIZE, error = OT_ERROR_NO_BUFS);
- VerifyOrExit(Interpreter::Hex2Bin(argv[0], sDataset.mPSKc.m8 + OT_PSKC_MAX_SIZE - length, length) == length,
+ VerifyOrExit(Interpreter::Hex2Bin(argv[0], sDataset.mPskc.m8 + OT_PSKC_MAX_SIZE - length, length) == length,
error = OT_ERROR_PARSE);
- sDataset.mComponents.mIsPSKcPresent = true;
+ sDataset.mComponents.mIsPskcPresent = true;
exit:
return error;
diff --git a/src/cli/cli_dataset.hpp b/src/cli/cli_dataset.hpp
index 985b817..767933f 100644
--- a/src/cli/cli_dataset.hpp
+++ b/src/cli/cli_dataset.hpp
@@ -94,7 +94,7 @@
otError ProcessPendingTimestamp(int argc, char *argv[]);
otError ProcessMgmtSetCommand(int argc, char *argv[]);
otError ProcessMgmtGetCommand(int argc, char *argv[]);
- otError ProcessPSKc(int argc, char *argv[]);
+ otError ProcessPskc(int argc, char *argv[]);
otError ProcessSecurityPolicy(int argc, char *argv[]);
Interpreter &mInterpreter;
diff --git a/src/cli/cli_joiner.cpp b/src/cli/cli_joiner.cpp
index 1facdb8..9715551 100644
--- a/src/cli/cli_joiner.cpp
+++ b/src/cli/cli_joiner.cpp
@@ -63,19 +63,17 @@
otError Joiner::ProcessId(int argc, char *argv[])
{
- otError error;
- otExtAddress joinerId;
-
OT_UNUSED_VARIABLE(argc);
OT_UNUSED_VARIABLE(argv);
- SuccessOrExit(error = otJoinerGetId(mInterpreter.mInstance, &joinerId));
+ otExtAddress joinerId;
+
+ otJoinerGetId(mInterpreter.mInstance, &joinerId);
mInterpreter.OutputBytes(joinerId.m8, sizeof(joinerId));
mInterpreter.mServer->OutputFormat("\r\n");
-exit:
- return error;
+ return OT_ERROR_NONE;
}
otError Joiner::ProcessStart(int argc, char *argv[])
@@ -102,7 +100,9 @@
OT_UNUSED_VARIABLE(argc);
OT_UNUSED_VARIABLE(argv);
- return otJoinerStop(mInterpreter.mInstance);
+ otJoinerStop(mInterpreter.mInstance);
+
+ return OT_ERROR_NONE;
}
otError Joiner::Process(int argc, char *argv[])
diff --git a/src/cli/cli_uart.cpp b/src/cli/cli_uart.cpp
index 327150f..a574e22 100644
--- a/src/cli/cli_uart.cpp
+++ b/src/cli/cli_uart.cpp
@@ -36,6 +36,10 @@
#include <stdarg.h>
#include <stdio.h>
#include <stdlib.h>
+#if OPENTHREAD_POSIX
+#include <signal.h>
+#include <sys/types.h>
+#endif
#include <openthread/cli.h>
#include <openthread/platform/logging.h>
@@ -48,7 +52,6 @@
#include "common/new.hpp"
#include "common/tasklet.hpp"
#include "utils/static_assert.hpp"
-#include "utils/wrap_string.h"
#if OPENTHREAD_CONFIG_ENABLE_DEBUG_UART
#include <openthread/platform/debug_uart.h>
@@ -99,7 +102,7 @@
namespace ot {
namespace Cli {
-static otDEFINE_ALIGNED_VAR(sCliUartRaw, sizeof(Uart), uint64_t);
+static OT_DEFINE_ALIGNED_VAR(sCliUartRaw, sizeof(Uart), uint64_t);
extern "C" void otCliUartInit(otInstance *aInstance)
{
@@ -157,6 +160,10 @@
#if !OPENTHREAD_CONFIG_UART_CLI_RAW
#if OPENTHREAD_POSIX
+ case 0x03: // ASCII for Ctrl-C
+ kill(0, SIGINT);
+ break;
+
case 0x04: // ASCII for Ctrl-D
exit(EXIT_SUCCESS);
break;
diff --git a/src/cli/cli_udp.cpp b/src/cli/cli_udp.cpp
index 5dfff6d..ef28f66 100644
--- a/src/cli/cli_udp.cpp
+++ b/src/cli/cli_udp.cpp
@@ -134,19 +134,20 @@
otError UdpExample::ProcessSend(int argc, char *argv[])
{
- otError error;
+ otError error = OT_ERROR_NONE;
otMessageInfo messageInfo;
- otMessage * message = NULL;
- int curArg = 0;
+ otMessage * message = NULL;
+ int curArg = 0;
+ uint16_t payloadLength = 0;
+ PayloadType payloadType = kTypeText;
memset(&messageInfo, 0, sizeof(messageInfo));
- VerifyOrExit(argc == 1 || argc == 3, error = OT_ERROR_INVALID_ARGS);
+ VerifyOrExit(argc >= 1 && argc <= 4, error = OT_ERROR_INVALID_ARGS);
- if (argc == 3)
+ if (argc > 2)
{
long value;
-
error = otIp6AddressFromString(argv[curArg++], &messageInfo.mPeerAddr);
SuccessOrExit(error);
@@ -156,11 +157,66 @@
messageInfo.mPeerPort = static_cast<uint16_t>(value);
}
+ if (argc == 2 || argc == 4)
+ {
+ int typePos = curArg++;
+
+ if (strcmp(argv[typePos], "-s") == 0)
+ {
+ unsigned long value;
+ payloadType = kTypeAutoSize;
+ SuccessOrExit(error = Interpreter::ParseUnsignedLong(argv[curArg], value));
+ payloadLength = static_cast<uint16_t>(value);
+ }
+ else if (strcmp(argv[typePos], "-x") == 0)
+ {
+ payloadLength = static_cast<uint16_t>(strlen(argv[curArg]));
+ payloadType = kTypeHexString;
+ }
+ else if (strcmp(argv[typePos], "-t") == 0)
+ {
+ payloadType = kTypeText;
+ }
+ }
+
message = otUdpNewMessage(mInterpreter.mInstance, NULL);
VerifyOrExit(message != NULL, error = OT_ERROR_NO_BUFS);
- error = otMessageAppend(message, argv[curArg], static_cast<uint16_t>(strlen(argv[curArg])));
- SuccessOrExit(error);
+ switch (payloadType)
+ {
+ case kTypeText:
+ SuccessOrExit(error = otMessageAppend(message, argv[curArg], static_cast<uint16_t>(strlen(argv[curArg]))));
+ break;
+ case kTypeAutoSize:
+ SuccessOrExit(error = WriteCharToBuffer(message, payloadLength));
+ break;
+ case kTypeHexString:
+ {
+ uint8_t buf[50];
+ int16_t bufLen;
+ uint16_t conversionLength = 0;
+ const char *hexString = argv[curArg];
+
+ while (payloadLength > 0)
+ {
+ bufLen = static_cast<int16_t>(Interpreter::Hex2Bin(hexString, buf, sizeof(buf), true));
+
+ VerifyOrExit(bufLen > 0, error = OT_ERROR_INVALID_ARGS);
+
+ conversionLength = static_cast<uint16_t>(bufLen * 2);
+
+ if ((payloadLength & 0x01) != 0)
+ {
+ conversionLength -= 1;
+ }
+
+ hexString += conversionLength;
+ payloadLength -= conversionLength;
+ SuccessOrExit(error = otMessageAppend(message, buf, static_cast<uint16_t>(bufLen)));
+ }
+ break;
+ }
+ }
error = otUdpSend(&mSocket, message, &messageInfo);
@@ -174,6 +230,34 @@
return error;
}
+otError UdpExample::WriteCharToBuffer(otMessage *aMessage, uint16_t aMessageSize)
+{
+ otError error = OT_ERROR_NONE;
+ uint8_t character = 0x30; // 0
+
+ for (uint16_t index = 0; index < aMessageSize; index++)
+ {
+ SuccessOrExit(error = otMessageAppend(aMessage, &character, 1));
+ character++;
+
+ switch (character)
+ {
+ case 0x3A: // 9
+ character = 0x41; // A
+ break;
+ case 0x5B: // Z
+ character = 0x61; // a
+ break;
+ case 0x7B: // z
+ character = 0x30; // 0
+ break;
+ }
+ }
+
+exit:
+ return error;
+}
+
otError UdpExample::Process(int argc, char *argv[])
{
otError error = OT_ERROR_PARSE;
diff --git a/src/cli/cli_udp.hpp b/src/cli/cli_udp.hpp
index eeb1f33..1fc34a4 100644
--- a/src/cli/cli_udp.hpp
+++ b/src/cli/cli_udp.hpp
@@ -74,12 +74,20 @@
otError (UdpExample::*mCommand)(int argc, char *argv[]);
};
+ enum PayloadType
+ {
+ kTypeText = 0,
+ kTypeAutoSize = 1,
+ kTypeHexString = 2,
+ };
+
otError ProcessHelp(int argc, char *argv[]);
otError ProcessBind(int argc, char *argv[]);
otError ProcessClose(int argc, char *argv[]);
otError ProcessConnect(int argc, char *argv[]);
otError ProcessOpen(int argc, char *argv[]);
otError ProcessSend(int argc, char *argv[]);
+ otError WriteCharToBuffer(otMessage *aMessage, uint16_t aSize);
static void HandleUdpReceive(void *aContext, otMessage *aMessage, const otMessageInfo *aMessageInfo);
void HandleUdpReceive(otMessage *aMessage, const otMessageInfo *aMessageInfo);
diff --git a/src/core/CMakeLists.txt b/src/core/CMakeLists.txt
new file mode 100644
index 0000000..99c58cd
--- /dev/null
+++ b/src/core/CMakeLists.txt
@@ -0,0 +1,215 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+add_library(openthread-ftd)
+add_library(openthread-mtd)
+add_library(openthread-radio)
+
+target_compile_definitions(openthread-ftd PRIVATE
+ ${OT_PRIVATE_DEFINES}
+ OPENTHREAD_FTD=1
+)
+
+target_compile_definitions(openthread-mtd PRIVATE
+ ${OT_PRIVATE_DEFINES}
+ OPENTHREAD_MTD=1
+)
+
+target_compile_definitions(openthread-radio PRIVATE
+ ${OT_PRIVATE_DEFINES}
+ OPENTHREAD_RADIO=1
+)
+
+set(COMMON_INCLUDES
+ ${OT_PRIVATE_INCLUDES}
+ ${PROJECT_SOURCE_DIR}/src/core
+)
+
+set(COMMON_SOURCES
+ api/border_router_api.cpp
+ api/channel_manager_api.cpp
+ api/channel_monitor_api.cpp
+ api/child_supervision_api.cpp
+ api/coap_api.cpp
+ api/coap_secure_api.cpp
+ api/commissioner_api.cpp
+ api/crypto_api.cpp
+ api/dataset_api.cpp
+ api/dataset_ftd_api.cpp
+ api/diags_api.cpp
+ api/dns_api.cpp
+ api/entropy_api.cpp
+ api/heap_api.cpp
+ api/icmp6_api.cpp
+ api/instance_api.cpp
+ api/ip6_api.cpp
+ api/jam_detection_api.cpp
+ api/joiner_api.cpp
+ api/link_api.cpp
+ api/link_raw_api.cpp
+ api/logging_api.cpp
+ api/message_api.cpp
+ api/netdata_api.cpp
+ api/network_time_api.cpp
+ api/random_crypto_api.cpp
+ api/random_noncrypto_api.cpp
+ api/server_api.cpp
+ api/sntp_api.cpp
+ api/tasklet_api.cpp
+ api/thread_api.cpp
+ api/thread_ftd_api.cpp
+ api/udp_api.cpp
+ coap/coap.cpp
+ coap/coap_message.cpp
+ coap/coap_secure.cpp
+ common/crc16.cpp
+ common/instance.cpp
+ common/logging.cpp
+ common/message.cpp
+ common/notifier.cpp
+ common/random_manager.cpp
+ common/settings.cpp
+ common/string.cpp
+ common/tasklet.cpp
+ common/timer.cpp
+ common/tlvs.cpp
+ common/trickle_timer.cpp
+ crypto/aes_ccm.cpp
+ crypto/aes_ecb.cpp
+ crypto/ecdsa.cpp
+ crypto/hmac_sha256.cpp
+ crypto/mbedtls.cpp
+ crypto/pbkdf2_cmac.cpp
+ crypto/sha256.cpp
+ diags/factory_diags.cpp
+ mac/channel_mask.cpp
+ mac/data_poll_handler.cpp
+ mac/data_poll_sender.cpp
+ mac/link_raw.cpp
+ mac/mac.cpp
+ mac/mac_filter.cpp
+ mac/mac_frame.cpp
+ mac/mac_types.cpp
+ mac/sub_mac.cpp
+ mac/sub_mac_callbacks.cpp
+ meshcop/announce_begin_client.cpp
+ meshcop/border_agent.cpp
+ meshcop/commissioner.cpp
+ meshcop/dataset.cpp
+ meshcop/dataset_local.cpp
+ meshcop/dataset_manager.cpp
+ meshcop/dataset_manager_ftd.cpp
+ meshcop/dtls.cpp
+ meshcop/energy_scan_client.cpp
+ meshcop/joiner.cpp
+ meshcop/joiner_router.cpp
+ meshcop/leader.cpp
+ meshcop/meshcop.cpp
+ meshcop/meshcop_tlvs.cpp
+ meshcop/panid_query_client.cpp
+ meshcop/timestamp.cpp
+ net/dhcp6_client.cpp
+ net/dhcp6_server.cpp
+ net/dns_client.cpp
+ net/icmp6.cpp
+ net/ip6.cpp
+ net/ip6_address.cpp
+ net/ip6_filter.cpp
+ net/ip6_headers.cpp
+ net/ip6_mpl.cpp
+ net/netif.cpp
+ net/sntp_client.cpp
+ net/udp6.cpp
+ radio/radio_callbacks.cpp
+ radio/radio_platform.cpp
+ thread/address_resolver.cpp
+ thread/announce_begin_server.cpp
+ thread/announce_sender.cpp
+ thread/child_table.cpp
+ thread/device_mode.cpp
+ thread/energy_scan_server.cpp
+ thread/indirect_sender.cpp
+ thread/key_manager.cpp
+ thread/link_quality.cpp
+ thread/lowpan.cpp
+ thread/mesh_forwarder.cpp
+ thread/mesh_forwarder_ftd.cpp
+ thread/mesh_forwarder_mtd.cpp
+ thread/mle.cpp
+ thread/mle_router.cpp
+ thread/network_data.cpp
+ thread/network_data_leader.cpp
+ thread/network_data_leader_ftd.cpp
+ thread/network_data_local.cpp
+ thread/network_diagnostic.cpp
+ thread/panid_query_server.cpp
+ thread/router_table.cpp
+ thread/src_match_controller.cpp
+ thread/thread_netif.cpp
+ thread/time_sync_service.cpp
+ thread/topology.cpp
+ utils/channel_manager.cpp
+ utils/channel_monitor.cpp
+ utils/child_supervision.cpp
+ utils/heap.cpp
+ utils/jam_detector.cpp
+ utils/parse_cmdline.cpp
+ utils/slaac_address.cpp
+)
+
+target_include_directories(openthread-ftd PUBLIC ${OT_PUBLIC_INCLUDES} PRIVATE ${COMMON_INCLUDES})
+target_include_directories(openthread-mtd PUBLIC ${OT_PUBLIC_INCLUDES} PRIVATE ${COMMON_INCLUDES})
+target_include_directories(openthread-radio PUBLIC ${OT_PUBLIC_INCLUDES} PRIVATE ${COMMON_INCLUDES})
+
+target_sources(openthread-ftd PRIVATE ${COMMON_SOURCES})
+target_sources(openthread-mtd PRIVATE ${COMMON_SOURCES})
+
+target_sources(openthread-radio PRIVATE
+ api/diags_api.cpp
+ api/instance_api.cpp
+ api/link_raw_api.cpp
+ api/logging_api.cpp
+ api/random_noncrypto_api.cpp
+ api/tasklet_api.cpp
+ common/instance.cpp
+ common/logging.cpp
+ common/random_manager.cpp
+ common/string.cpp
+ common/tasklet.cpp
+ common/timer.cpp
+ diags/factory_diags.cpp
+ mac/link_raw.cpp
+ mac/mac_frame.cpp
+ mac/mac_types.cpp
+ mac/sub_mac.cpp
+ mac/sub_mac_callbacks.cpp
+ radio/radio_callbacks.cpp
+ radio/radio_platform.cpp
+ thread/link_quality.cpp
+ utils/parse_cmdline.cpp
+)
diff --git a/src/core/Makefile.am b/src/core/Makefile.am
index cfcf259..9a493ae 100644
--- a/src/core/Makefile.am
+++ b/src/core/Makefile.am
@@ -49,17 +49,23 @@
libopenthread_radio_a_CPPFLAGS = \
$(CPPFLAGS_COMMON) \
+ -DOPENTHREAD_MTD=0 \
+ -DOPENTHREAD_FTD=0 \
-DOPENTHREAD_RADIO=1 \
$(NULL)
libopenthread_ftd_a_CPPFLAGS = \
$(CPPFLAGS_COMMON) \
+ -DOPENTHREAD_MTD=0 \
-DOPENTHREAD_FTD=1 \
+ -DOPENTHREAD_RADIO=0 \
$(NULL)
libopenthread_mtd_a_CPPFLAGS = \
$(CPPFLAGS_COMMON) \
-DOPENTHREAD_MTD=1 \
+ -DOPENTHREAD_FTD=0 \
+ -DOPENTHREAD_RADIO=0 \
$(NULL)
#------------------------------------------------------
@@ -165,6 +171,7 @@
mac/mac.cpp \
mac/mac_filter.cpp \
mac/mac_frame.cpp \
+ mac/mac_types.cpp \
mac/sub_mac.cpp \
mac/sub_mac_callbacks.cpp \
meshcop/announce_begin_client.cpp \
@@ -228,9 +235,6 @@
utils/child_supervision.cpp \
utils/heap.cpp \
utils/jam_detector.cpp \
- utils/missing_strlcat.c \
- utils/missing_strlcpy.c \
- utils/missing_strnlen.c \
utils/parse_cmdline.cpp \
utils/slaac_address.cpp \
$(NULL)
@@ -241,6 +245,7 @@
libopenthread_radio_a_SOURCES = \
api/diags_api.cpp \
+ api/heap_api.cpp \
api/instance_api.cpp \
api/link_raw_api.cpp \
api/logging_api.cpp \
@@ -255,14 +260,12 @@
diags/factory_diags.cpp \
mac/link_raw.cpp \
mac/mac_frame.cpp \
+ mac/mac_types.cpp \
mac/sub_mac.cpp \
mac/sub_mac_callbacks.cpp \
radio/radio_callbacks.cpp \
radio/radio_platform.cpp \
thread/link_quality.cpp \
- utils/missing_strlcat.c \
- utils/missing_strlcpy.c \
- utils/missing_strnlen.c \
utils/parse_cmdline.cpp \
$(NULL)
@@ -307,6 +310,7 @@
common/encoding.hpp \
common/extension.hpp \
common/instance.hpp \
+ common/linked_list.hpp \
common/locator.hpp \
common/locator-getters.hpp \
common/logging.hpp \
@@ -318,6 +322,7 @@
common/settings.hpp \
common/string.hpp \
common/tasklet.hpp \
+ common/time.hpp \
common/timer.hpp \
common/tlvs.hpp \
common/trickle_timer.hpp \
@@ -361,6 +366,7 @@
mac/mac.hpp \
mac/mac_filter.hpp \
mac/mac_frame.hpp \
+ mac/mac_types.hpp \
mac/sub_mac.hpp \
meshcop/announce_begin_client.hpp \
meshcop/border_agent.hpp \
@@ -435,9 +441,6 @@
utils/parse_cmdline.hpp \
utils/slaac_address.hpp \
utils/static_assert.hpp \
- utils/wrap_stdbool.h \
- utils/wrap_stdint.h \
- utils/wrap_string.h \
$(NULL)
noinst_HEADERS = \
diff --git a/src/core/api/border_router_api.cpp b/src/core/api/border_router_api.cpp
index dd8dd2f..4dcaed8 100644
--- a/src/core/api/border_router_api.cpp
+++ b/src/core/api/border_router_api.cpp
@@ -37,6 +37,7 @@
#include <openthread/border_router.h>
+#include "common/debug.hpp"
#include "common/instance.hpp"
#include "common/locator-getters.hpp"
@@ -44,15 +45,11 @@
otError otBorderRouterGetNetData(otInstance *aInstance, bool aStable, uint8_t *aData, uint8_t *aDataLength)
{
- otError error = OT_ERROR_NONE;
Instance &instance = *static_cast<Instance *>(aInstance);
- VerifyOrExit(aData != NULL && aDataLength != NULL, error = OT_ERROR_INVALID_ARGS);
+ assert(aData != NULL && aDataLength != NULL);
- error = instance.Get<NetworkData::Local>().GetNetworkData(aStable, aData, *aDataLength);
-
-exit:
- return error;
+ return instance.Get<NetworkData::Local>().GetNetworkData(aStable, aData, *aDataLength);
}
otError otBorderRouterAddOnMeshPrefix(otInstance *aInstance, const otBorderRouterConfig *aConfig)
@@ -60,6 +57,8 @@
uint8_t flags = 0;
Instance &instance = *static_cast<Instance *>(aInstance);
+ assert(aConfig != NULL);
+
if (aConfig->mPreferred)
{
flags |= NetworkData::BorderRouterEntry::kPreferredFlag;
@@ -98,6 +97,8 @@
{
Instance &instance = *static_cast<Instance *>(aInstance);
+ assert(aPrefix != NULL);
+
return instance.Get<NetworkData::Local>().RemoveOnMeshPrefix(aPrefix->mPrefix.mFields.m8, aPrefix->mLength);
}
@@ -105,21 +106,19 @@
otNetworkDataIterator *aIterator,
otBorderRouterConfig * aConfig)
{
- otError error = OT_ERROR_NONE;
Instance &instance = *static_cast<Instance *>(aInstance);
- VerifyOrExit(aIterator && aConfig, error = OT_ERROR_INVALID_ARGS);
+ assert(aIterator != NULL && aConfig != NULL);
- error = instance.Get<NetworkData::Local>().GetNextOnMeshPrefix(aIterator, aConfig);
-
-exit:
- return error;
+ return instance.Get<NetworkData::Local>().GetNextOnMeshPrefix(*aIterator, *aConfig);
}
otError otBorderRouterAddRoute(otInstance *aInstance, const otExternalRouteConfig *aConfig)
{
Instance &instance = *static_cast<Instance *>(aInstance);
+ assert(aConfig != NULL);
+
return instance.Get<NetworkData::Local>().AddHasRoutePrefix(
aConfig->mPrefix.mPrefix.mFields.m8, aConfig->mPrefix.mLength, aConfig->mPreference, aConfig->mStable);
}
@@ -128,6 +127,8 @@
{
Instance &instance = *static_cast<Instance *>(aInstance);
+ assert(aPrefix != NULL);
+
return instance.Get<NetworkData::Local>().RemoveHasRoutePrefix(aPrefix->mPrefix.mFields.m8, aPrefix->mLength);
}
@@ -135,15 +136,11 @@
otNetworkDataIterator *aIterator,
otExternalRouteConfig *aConfig)
{
- otError error = OT_ERROR_NONE;
Instance &instance = *static_cast<Instance *>(aInstance);
- VerifyOrExit(aIterator && aConfig, error = OT_ERROR_INVALID_ARGS);
+ assert(aIterator != NULL && aConfig != NULL);
- error = instance.Get<NetworkData::Local>().GetNextExternalRoute(aIterator, aConfig);
-
-exit:
- return error;
+ return instance.Get<NetworkData::Local>().GetNextExternalRoute(*aIterator, *aConfig);
}
otError otBorderRouterRegister(otInstance *aInstance)
diff --git a/src/core/api/channel_manager_api.cpp b/src/core/api/channel_manager_api.cpp
index 5d2b503..5bb90ff 100644
--- a/src/core/api/channel_manager_api.cpp
+++ b/src/core/api/channel_manager_api.cpp
@@ -70,12 +70,14 @@
return instance.Get<Utils::ChannelManager>().SetDelay(aDelay);
}
+#if OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE
otError otChannelManagerRequestChannelSelect(otInstance *aInstance, bool aSkipQualityCheck)
{
Instance &instance = *static_cast<Instance *>(aInstance);
return instance.Get<Utils::ChannelManager>().RequestChannelSelect(aSkipQualityCheck);
}
+#endif
void otChannelManagerSetAutoChannelSelectionEnabled(otInstance *aInstance, bool aEnabled)
{
diff --git a/src/core/api/coap_api.cpp b/src/core/api/coap_api.cpp
index faf7c8d..3cd99ac 100644
--- a/src/core/api/coap_api.cpp
+++ b/src/core/api/coap_api.cpp
@@ -64,6 +64,17 @@
static_cast<Coap::Message *>(aMessage)->Init(aType, aCode);
}
+otError otCoapMessageInitResponse(otMessage *aResponse, const otMessage *aRequest, otCoapType aType, otCoapCode aCode)
+{
+ Coap::Message & response = *static_cast<Coap::Message *>(aResponse);
+ const Coap::Message &request = *static_cast<const Coap::Message *>(aRequest);
+
+ response.Init(aType, aCode);
+ response.SetMessageId(request.GetMessageId());
+
+ return response.SetToken(request.GetToken(), request.GetTokenLength());
+}
+
otError otCoapMessageSetToken(otMessage *aMessage, const uint8_t *aToken, uint8_t aTokenLength)
{
return static_cast<Coap::Message *>(aMessage)->SetToken(aToken, aTokenLength);
@@ -119,11 +130,6 @@
return static_cast<Coap::Message *>(aMessage)->SetPayloadMarker();
}
-void otCoapMessageSetMessageId(otMessage *aMessage, uint16_t aMessageId)
-{
- return static_cast<Coap::Message *>(aMessage)->SetMessageId(aMessageId);
-}
-
otCoapType otCoapMessageGetType(const otMessage *aMessage)
{
return static_cast<const Coap::Message *>(aMessage)->GetType();
@@ -154,19 +160,24 @@
return static_cast<const Coap::Message *>(aMessage)->GetToken();
}
-const otCoapOption *otCoapMessageGetFirstOption(otMessage *aMessage)
+otError otCoapOptionIteratorInit(otCoapOptionIterator *aIterator, const otMessage *aMessage)
{
- return static_cast<Coap::Message *>(aMessage)->GetFirstOption();
+ return static_cast<Coap::OptionIterator *>(aIterator)->Init(static_cast<const Coap::Message *>(aMessage));
}
-const otCoapOption *otCoapMessageGetNextOption(otMessage *aMessage)
+const otCoapOption *otCoapOptionIteratorGetFirstOption(otCoapOptionIterator *aIterator)
{
- return static_cast<Coap::Message *>(aMessage)->GetNextOption();
+ return static_cast<Coap::OptionIterator *>(aIterator)->GetFirstOption();
}
-otError otCoapMessageGetOptionValue(otMessage *aMessage, void *aValue)
+const otCoapOption *otCoapOptionIteratorGetNextOption(otCoapOptionIterator *aIterator)
{
- return static_cast<Coap::Message *>(aMessage)->GetOptionValue(aValue);
+ return static_cast<Coap::OptionIterator *>(aIterator)->GetNextOption();
+}
+
+otError otCoapOptionIteratorGetOptionValue(otCoapOptionIterator *aIterator, void *aValue)
+{
+ return static_cast<Coap::OptionIterator *>(aIterator)->GetOptionValue(aValue);
}
otError otCoapSendRequest(otInstance * aInstance,
diff --git a/src/core/api/coap_secure_api.cpp b/src/core/api/coap_secure_api.cpp
index c1a5811..76e4be8 100644
--- a/src/core/api/coap_secure_api.cpp
+++ b/src/core/api/coap_secure_api.cpp
@@ -52,98 +52,58 @@
return instance.GetApplicationCoapSecure().Start(aPort);
}
-otError otCoapSecureSetCertificate(otInstance * aInstance,
- const uint8_t *aX509Cert,
- uint32_t aX509Length,
- const uint8_t *aPrivateKey,
- uint32_t aPrivateKeyLength)
-{
#ifdef MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+void otCoapSecureSetCertificate(otInstance * aInstance,
+ const uint8_t *aX509Cert,
+ uint32_t aX509Length,
+ const uint8_t *aPrivateKey,
+ uint32_t aPrivateKeyLength)
+{
Instance &instance = *static_cast<Instance *>(aInstance);
- if (aX509Cert == NULL || aX509Length == 0 || aPrivateKey == NULL || aPrivateKeyLength == 0)
- {
- return OT_ERROR_INVALID_ARGS;
- }
+ assert(aX509Cert != NULL && aX509Length != 0 && aPrivateKey != NULL && aPrivateKeyLength != 0);
- return instance.GetApplicationCoapSecure().SetCertificate(aX509Cert, aX509Length, aPrivateKey, aPrivateKeyLength);
-#else
- OT_UNUSED_VARIABLE(aInstance);
- OT_UNUSED_VARIABLE(aX509Cert);
- OT_UNUSED_VARIABLE(aX509Length);
- OT_UNUSED_VARIABLE(aPrivateKey);
- OT_UNUSED_VARIABLE(aPrivateKeyLength);
-
- return OT_ERROR_DISABLED_FEATURE;
-#endif // MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+ instance.GetApplicationCoapSecure().SetCertificate(aX509Cert, aX509Length, aPrivateKey, aPrivateKeyLength);
}
-otError otCoapSecureSetCaCertificateChain(otInstance * aInstance,
- const uint8_t *aX509CaCertificateChain,
- uint32_t aX509CaCertChainLength)
+void otCoapSecureSetCaCertificateChain(otInstance * aInstance,
+ const uint8_t *aX509CaCertificateChain,
+ uint32_t aX509CaCertChainLength)
{
-#ifdef MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
Instance &instance = *static_cast<Instance *>(aInstance);
- if (aX509CaCertificateChain == NULL || aX509CaCertChainLength == 0)
- {
- return OT_ERROR_INVALID_ARGS;
- }
+ assert(aX509CaCertificateChain != NULL && aX509CaCertChainLength != 0);
- return instance.GetApplicationCoapSecure().SetCaCertificateChain(aX509CaCertificateChain, aX509CaCertChainLength);
-#else
- OT_UNUSED_VARIABLE(aInstance);
- OT_UNUSED_VARIABLE(aX509CaCertificateChain);
- OT_UNUSED_VARIABLE(aX509CaCertChainLength);
-
- return OT_ERROR_DISABLED_FEATURE;
-#endif // MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+ instance.GetApplicationCoapSecure().SetCaCertificateChain(aX509CaCertificateChain, aX509CaCertChainLength);
}
+#endif // MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
-otError otCoapSecureSetPsk(otInstance * aInstance,
- const uint8_t *aPsk,
- uint16_t aPskLength,
- const uint8_t *aPskIdentity,
- uint16_t aPskIdLength)
-{
#ifdef MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+void otCoapSecureSetPsk(otInstance * aInstance,
+ const uint8_t *aPsk,
+ uint16_t aPskLength,
+ const uint8_t *aPskIdentity,
+ uint16_t aPskIdLength)
+{
Instance &instance = *static_cast<Instance *>(aInstance);
- if (aPsk == NULL || aPskLength == 0 || aPskIdentity == NULL || aPskIdLength == 0)
- {
- return OT_ERROR_INVALID_ARGS;
- }
+ assert(aPsk != NULL && aPskLength != 0 && aPskIdentity != NULL && aPskIdLength != 0);
- return instance.GetApplicationCoapSecure().SetPreSharedKey(aPsk, aPskLength, aPskIdentity, aPskIdLength);
-#else
- OT_UNUSED_VARIABLE(aInstance);
- OT_UNUSED_VARIABLE(aPsk);
- OT_UNUSED_VARIABLE(aPskLength);
- OT_UNUSED_VARIABLE(aPskIdentity);
- OT_UNUSED_VARIABLE(aPskIdLength);
-
- return OT_ERROR_DISABLED_FEATURE;
-#endif // MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+ instance.GetApplicationCoapSecure().SetPreSharedKey(aPsk, aPskLength, aPskIdentity, aPskIdLength);
}
+#endif // MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+#ifdef MBEDTLS_BASE64_C
otError otCoapSecureGetPeerCertificateBase64(otInstance * aInstance,
unsigned char *aPeerCert,
size_t * aCertLength,
size_t aCertBufferSize)
{
-#ifdef MBEDTLS_BASE64_C
Instance &instance = *static_cast<Instance *>(aInstance);
return instance.GetApplicationCoapSecure().GetPeerCertificateBase64(aPeerCert, aCertLength, aCertBufferSize);
-#else
- OT_UNUSED_VARIABLE(aInstance);
- OT_UNUSED_VARIABLE(aPeerCert);
- OT_UNUSED_VARIABLE(aCertLength);
- OT_UNUSED_VARIABLE(aCertBufferSize);
-
- return OT_ERROR_DISABLED_FEATURE;
-#endif // MBEDTLS_BASE64_C
}
+#endif // MBEDTLS_BASE64_C
void otCoapSecureSetSslAuthMode(otInstance *aInstance, bool aVerifyPeerCertificate)
{
@@ -193,8 +153,8 @@
otError otCoapSecureSendRequest(otInstance * aInstance,
otMessage * aMessage,
- otCoapResponseHandler aHandler = NULL,
- void * aContext = NULL)
+ otCoapResponseHandler aHandler,
+ void * aContext)
{
Instance &instance = *static_cast<Instance *>(aInstance);
diff --git a/src/core/api/commissioner_api.cpp b/src/core/api/commissioner_api.cpp
index fa30a76..9e9f382 100644
--- a/src/core/api/commissioner_api.cpp
+++ b/src/core/api/commissioner_api.cpp
@@ -40,14 +40,14 @@
using namespace ot;
+#if OPENTHREAD_FTD && OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
otError otCommissionerStart(otInstance * aInstance,
otCommissionerStateCallback aStateCallback,
otCommissionerJoinerCallback aJoinerCallback,
void * aCallbackContext)
{
- otError error = OT_ERROR_DISABLED_FEATURE;
+ otError error;
-#if OPENTHREAD_FTD && OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
Instance &instance = *static_cast<Instance *>(aInstance);
#if OPENTHREAD_CONFIG_BORDER_AGENT_ENABLE
@@ -56,102 +56,57 @@
SuccessOrExit(error =
instance.Get<MeshCoP::Commissioner>().Start(aStateCallback, aJoinerCallback, aCallbackContext));
exit:
-#else
- OT_UNUSED_VARIABLE(aInstance);
- OT_UNUSED_VARIABLE(aStateCallback);
- OT_UNUSED_VARIABLE(aJoinerCallback);
- OT_UNUSED_VARIABLE(aCallbackContext);
-#endif
-
return error;
}
otError otCommissionerStop(otInstance *aInstance)
{
- OT_UNUSED_VARIABLE(aInstance);
-
- otError error = OT_ERROR_DISABLED_FEATURE;
-
-#if OPENTHREAD_FTD && OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
+ otError error;
Instance &instance = *static_cast<Instance *>(aInstance);
SuccessOrExit(error = instance.Get<MeshCoP::Commissioner>().Stop());
#if OPENTHREAD_CONFIG_BORDER_AGENT_ENABLE
SuccessOrExit(error = instance.Get<MeshCoP::BorderAgent>().Start());
#endif
+
exit:
-#endif
return error;
}
-otError otCommissionerAddJoiner(otInstance *aInstance, const otExtAddress *aEui64, const char *aPSKd, uint32_t aTimeout)
+otError otCommissionerAddJoiner(otInstance *aInstance, const otExtAddress *aEui64, const char *aPskd, uint32_t aTimeout)
{
- otError error = OT_ERROR_DISABLED_FEATURE;
-
-#if OPENTHREAD_FTD && OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
Instance &instance = *static_cast<Instance *>(aInstance);
- error =
- instance.Get<MeshCoP::Commissioner>().AddJoiner(static_cast<const Mac::ExtAddress *>(aEui64), aPSKd, aTimeout);
-#else
- OT_UNUSED_VARIABLE(aInstance);
- OT_UNUSED_VARIABLE(aEui64);
- OT_UNUSED_VARIABLE(aPSKd);
- OT_UNUSED_VARIABLE(aTimeout);
-#endif
+ return instance.Get<MeshCoP::Commissioner>().AddJoiner(static_cast<const Mac::ExtAddress *>(aEui64), aPskd,
+ aTimeout);
+}
- return error;
+otError otCommissionerGetNextJoinerInfo(otInstance *aInstance, uint16_t *aIterator, otJoinerInfo *aJoiner)
+{
+ Instance &instance = *static_cast<Instance *>(aInstance);
+
+ return instance.Get<MeshCoP::Commissioner>().GetNextJoinerInfo(*aIterator, *aJoiner);
}
otError otCommissionerRemoveJoiner(otInstance *aInstance, const otExtAddress *aEui64)
{
- otError error = OT_ERROR_DISABLED_FEATURE;
-
-#if OPENTHREAD_FTD && OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
Instance &instance = *static_cast<Instance *>(aInstance);
- error = instance.Get<MeshCoP::Commissioner>().RemoveJoiner(static_cast<const Mac::ExtAddress *>(aEui64), 0);
-#else
- OT_UNUSED_VARIABLE(aInstance);
- OT_UNUSED_VARIABLE(aEui64);
-#endif
-
- return error;
+ return instance.Get<MeshCoP::Commissioner>().RemoveJoiner(static_cast<const Mac::ExtAddress *>(aEui64), 0);
}
otError otCommissionerSetProvisioningUrl(otInstance *aInstance, const char *aProvisioningUrl)
{
- otError error = OT_ERROR_DISABLED_FEATURE;
-
-#if OPENTHREAD_FTD && OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
Instance &instance = *static_cast<Instance *>(aInstance);
- error = instance.Get<MeshCoP::Commissioner>().SetProvisioningUrl(aProvisioningUrl);
-#else
- OT_UNUSED_VARIABLE(aInstance);
- OT_UNUSED_VARIABLE(aProvisioningUrl);
-#endif
-
- return error;
+ return instance.Get<MeshCoP::Commissioner>().SetProvisioningUrl(aProvisioningUrl);
}
-const char *otCommissionerGetProvisioningUrl(otInstance *aInstance, uint16_t *aLength)
+const char *otCommissionerGetProvisioningUrl(otInstance *aInstance)
{
- const char *url = NULL;
-
-#if OPENTHREAD_FTD && OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
Instance &instance = *static_cast<Instance *>(aInstance);
- if (aLength != NULL)
- {
- url = instance.Get<MeshCoP::Commissioner>().GetProvisioningUrl(*aLength);
- }
-#else
- OT_UNUSED_VARIABLE(aInstance);
- OT_UNUSED_VARIABLE(aLength);
-#endif
-
- return url;
+ return instance.Get<MeshCoP::Commissioner>().GetProvisioningUrl();
}
otError otCommissionerAnnounceBegin(otInstance * aInstance,
@@ -160,22 +115,10 @@
uint16_t aPeriod,
const otIp6Address *aAddress)
{
- otError error = OT_ERROR_DISABLED_FEATURE;
-
-#if OPENTHREAD_FTD && OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
Instance &instance = *static_cast<Instance *>(aInstance);
- error = instance.Get<MeshCoP::Commissioner>().GetAnnounceBeginClient().SendRequest(
+ return instance.Get<MeshCoP::Commissioner>().GetAnnounceBeginClient().SendRequest(
aChannelMask, aCount, aPeriod, *static_cast<const Ip6::Address *>(aAddress));
-#else
- OT_UNUSED_VARIABLE(aInstance);
- OT_UNUSED_VARIABLE(aChannelMask);
- OT_UNUSED_VARIABLE(aCount);
- OT_UNUSED_VARIABLE(aPeriod);
- OT_UNUSED_VARIABLE(aAddress);
-#endif
-
- return error;
}
otError otCommissionerEnergyScan(otInstance * aInstance,
@@ -187,26 +130,11 @@
otCommissionerEnergyReportCallback aCallback,
void * aContext)
{
- otError error = OT_ERROR_DISABLED_FEATURE;
-
-#if OPENTHREAD_FTD && OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
Instance &instance = *static_cast<Instance *>(aInstance);
- error = instance.Get<MeshCoP::Commissioner>().GetEnergyScanClient().SendQuery(
+ return instance.Get<MeshCoP::Commissioner>().GetEnergyScanClient().SendQuery(
aChannelMask, aCount, aPeriod, aScanDuration, *static_cast<const Ip6::Address *>(aAddress), aCallback,
aContext);
-#else
- OT_UNUSED_VARIABLE(aInstance);
- OT_UNUSED_VARIABLE(aChannelMask);
- OT_UNUSED_VARIABLE(aCount);
- OT_UNUSED_VARIABLE(aPeriod);
- OT_UNUSED_VARIABLE(aScanDuration);
- OT_UNUSED_VARIABLE(aAddress);
- OT_UNUSED_VARIABLE(aCallback);
- OT_UNUSED_VARIABLE(aContext);
-#endif
-
- return error;
}
otError otCommissionerPanIdQuery(otInstance * aInstance,
@@ -216,40 +144,17 @@
otCommissionerPanIdConflictCallback aCallback,
void * aContext)
{
- otError error = OT_ERROR_DISABLED_FEATURE;
-
-#if OPENTHREAD_FTD && OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
Instance &instance = *static_cast<Instance *>(aInstance);
- error = instance.Get<MeshCoP::Commissioner>().GetPanIdQueryClient().SendQuery(
+ return instance.Get<MeshCoP::Commissioner>().GetPanIdQueryClient().SendQuery(
aPanId, aChannelMask, *static_cast<const Ip6::Address *>(aAddress), aCallback, aContext);
-#else
- OT_UNUSED_VARIABLE(aInstance);
- OT_UNUSED_VARIABLE(aPanId);
- OT_UNUSED_VARIABLE(aChannelMask);
- OT_UNUSED_VARIABLE(aAddress);
- OT_UNUSED_VARIABLE(aCallback);
- OT_UNUSED_VARIABLE(aContext);
-#endif
-
- return error;
}
otError otCommissionerSendMgmtGet(otInstance *aInstance, const uint8_t *aTlvs, uint8_t aLength)
{
- otError error = OT_ERROR_DISABLED_FEATURE;
-
-#if OPENTHREAD_FTD && OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
Instance &instance = *static_cast<Instance *>(aInstance);
- error = instance.Get<MeshCoP::Commissioner>().SendMgmtCommissionerGetRequest(aTlvs, aLength);
-#else
- OT_UNUSED_VARIABLE(aInstance);
- OT_UNUSED_VARIABLE(aTlvs);
- OT_UNUSED_VARIABLE(aLength);
-#endif
-
- return error;
+ return instance.Get<MeshCoP::Commissioner>().SendMgmtCommissionerGetRequest(aTlvs, aLength);
}
otError otCommissionerSendMgmtSet(otInstance * aInstance,
@@ -257,71 +162,31 @@
const uint8_t * aTlvs,
uint8_t aLength)
{
- otError error = OT_ERROR_DISABLED_FEATURE;
-
-#if OPENTHREAD_FTD && OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
Instance &instance = *static_cast<Instance *>(aInstance);
- error = instance.Get<MeshCoP::Commissioner>().SendMgmtCommissionerSetRequest(*aDataset, aTlvs, aLength);
-#else
- OT_UNUSED_VARIABLE(aInstance);
- OT_UNUSED_VARIABLE(aDataset);
- OT_UNUSED_VARIABLE(aTlvs);
- OT_UNUSED_VARIABLE(aLength);
-#endif
-
- return error;
+ return instance.Get<MeshCoP::Commissioner>().SendMgmtCommissionerSetRequest(*aDataset, aTlvs, aLength);
}
uint16_t otCommissionerGetSessionId(otInstance *aInstance)
{
- uint16_t sessionId = 0;
-
-#if OPENTHREAD_FTD && OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
Instance &instance = *static_cast<Instance *>(aInstance);
- sessionId = instance.Get<MeshCoP::Commissioner>().GetSessionId();
-#else
- OT_UNUSED_VARIABLE(aInstance);
-#endif
-
- return sessionId;
+ return instance.Get<MeshCoP::Commissioner>().GetSessionId();
}
otCommissionerState otCommissionerGetState(otInstance *aInstance)
{
- otCommissionerState state = OT_COMMISSIONER_STATE_DISABLED;
-
-#if OPENTHREAD_FTD && OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
Instance &instance = *static_cast<Instance *>(aInstance);
- state = instance.Get<MeshCoP::Commissioner>().GetState();
-#else
- OT_UNUSED_VARIABLE(aInstance);
-#endif
-
- return state;
+ return instance.Get<MeshCoP::Commissioner>().GetState();
}
-otError otCommissionerGeneratePSKc(otInstance * aInstance,
- const char * aPassPhrase,
+otError otCommissionerGeneratePskc(const char * aPassPhrase,
const char * aNetworkName,
const otExtendedPanId *aExtPanId,
- uint8_t * aPSKc)
+ otPskc * aPskc)
{
- OT_UNUSED_VARIABLE(aInstance);
-
- otError error = OT_ERROR_DISABLED_FEATURE;
-
-#if OPENTHREAD_FTD && OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
- error = MeshCoP::Commissioner::GeneratePSKc(aPassPhrase, aNetworkName, *aExtPanId, aPSKc);
-#else
- OT_UNUSED_VARIABLE(aInstance);
- OT_UNUSED_VARIABLE(aPassPhrase);
- OT_UNUSED_VARIABLE(aNetworkName);
- OT_UNUSED_VARIABLE(aExtPanId);
- OT_UNUSED_VARIABLE(aPSKc);
-#endif
-
- return error;
+ return MeshCoP::Commissioner::GeneratePskc(
+ aPassPhrase, aNetworkName, *static_cast<const Mac::ExtendedPanId *>(aExtPanId), *static_cast<Pskc *>(aPskc));
}
+#endif // OPENTHREAD_FTD && OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
diff --git a/src/core/api/dataset_api.cpp b/src/core/api/dataset_api.cpp
index 09bb304..463155d 100644
--- a/src/core/api/dataset_api.cpp
+++ b/src/core/api/dataset_api.cpp
@@ -37,70 +37,59 @@
#include "common/instance.hpp"
#include "common/locator-getters.hpp"
+#include "meshcop/dataset_manager.hpp"
using namespace ot;
bool otDatasetIsCommissioned(otInstance *aInstance)
{
otOperationalDataset dataset;
+ bool rval = false;
- otDatasetGetActive(aInstance, &dataset);
+ SuccessOrExit(otDatasetGetActive(aInstance, &dataset));
- return ((dataset.mComponents.mIsMasterKeyPresent) && (dataset.mComponents.mIsNetworkNamePresent) &&
+ rval = ((dataset.mComponents.mIsMasterKeyPresent) && (dataset.mComponents.mIsNetworkNamePresent) &&
(dataset.mComponents.mIsExtendedPanIdPresent) && (dataset.mComponents.mIsPanIdPresent) &&
(dataset.mComponents.mIsChannelPresent));
+
+exit:
+ return rval;
}
otError otDatasetGetActive(otInstance *aInstance, otOperationalDataset *aDataset)
{
- otError error = OT_ERROR_NONE;
Instance &instance = *static_cast<Instance *>(aInstance);
- VerifyOrExit(aDataset != NULL, error = OT_ERROR_INVALID_ARGS);
+ assert(aDataset != NULL);
- error = instance.Get<MeshCoP::ActiveDataset>().Read(*aDataset);
-
-exit:
- return error;
+ return instance.Get<MeshCoP::ActiveDataset>().Read(*aDataset);
}
otError otDatasetSetActive(otInstance *aInstance, const otOperationalDataset *aDataset)
{
- otError error;
Instance &instance = *static_cast<Instance *>(aInstance);
- VerifyOrExit(aDataset != NULL, error = OT_ERROR_INVALID_ARGS);
+ assert(aDataset != NULL);
- error = instance.Get<MeshCoP::ActiveDataset>().Save(*aDataset);
-
-exit:
- return error;
+ return instance.Get<MeshCoP::ActiveDataset>().Save(*aDataset);
}
otError otDatasetGetPending(otInstance *aInstance, otOperationalDataset *aDataset)
{
- otError error = OT_ERROR_NONE;
Instance &instance = *static_cast<Instance *>(aInstance);
- VerifyOrExit(aDataset != NULL, error = OT_ERROR_INVALID_ARGS);
+ assert(aDataset != NULL);
- error = instance.Get<MeshCoP::PendingDataset>().Read(*aDataset);
-
-exit:
- return error;
+ return instance.Get<MeshCoP::PendingDataset>().Read(*aDataset);
}
otError otDatasetSetPending(otInstance *aInstance, const otOperationalDataset *aDataset)
{
- otError error;
Instance &instance = *static_cast<Instance *>(aInstance);
- VerifyOrExit(aDataset != NULL, error = OT_ERROR_INVALID_ARGS);
+ assert(aDataset != NULL);
- error = instance.Get<MeshCoP::PendingDataset>().Save(*aDataset);
-
-exit:
- return error;
+ return instance.Get<MeshCoP::PendingDataset>().Save(*aDataset);
}
otError otDatasetSendMgmtActiveGet(otInstance * aInstance,
diff --git a/src/core/api/heap_api.cpp b/src/core/api/heap_api.cpp
index 670e1b4..3810960 100644
--- a/src/core/api/heap_api.cpp
+++ b/src/core/api/heap_api.cpp
@@ -37,7 +37,47 @@
#include "common/instance.hpp"
-#if OPENTHREAD_CONFIG_HEAP_EXTERNAL_ENABLE
+#if !OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE || OPENTHREAD_CONFIG_HEAP_EXTERNAL_ENABLE
+
+#if OPENTHREAD_RADIO
+
+void *otHeapCAlloc(size_t aCount, size_t aSize)
+{
+ OT_UNUSED_VARIABLE(aCount);
+ OT_UNUSED_VARIABLE(aSize);
+
+ // Should never get called!
+ assert(false);
+
+ // This function is reachable when asserts are disabled
+ OT_UNREACHABLE_CODE(return NULL;)
+}
+
+void otHeapFree(void *aPointer)
+{
+ OT_UNUSED_VARIABLE(aPointer);
+
+ // Should never get called!
+ assert(false);
+}
+
+#else // OPENTHREAD_RADIO
+
+void *otHeapCAlloc(size_t aCount, size_t aSize)
+{
+ return ot::Instance::Get().HeapCAlloc(aCount, aSize);
+}
+
+void otHeapFree(void *aPointer)
+{
+ ot::Instance::Get().HeapFree(aPointer);
+}
+
+#endif // OPENTHREAD_RADIO
+
+#endif // !OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE || OPENTHREAD_CONFIG_HEAP_EXTERNAL_ENABLE
+
+#if OPENTHREAD_CONFIG_HEAP_EXTERNAL_ENABLE && !OPENTHREAD_RADIO
void otHeapSetCAllocFree(otHeapCAllocFn aCAlloc, otHeapFreeFn aFree)
{
ot::Instance::HeapSetCAllocFree(aCAlloc, aFree);
diff --git a/src/core/api/ip6_api.cpp b/src/core/api/ip6_api.cpp
index 7219ae3..faa5088 100644
--- a/src/core/api/ip6_api.cpp
+++ b/src/core/api/ip6_api.cpp
@@ -237,14 +237,9 @@
uint8_t otIp6PrefixMatch(const otIp6Address *aFirst, const otIp6Address *aSecond)
{
- uint8_t rval;
+ assert(aFirst != NULL && aSecond != NULL);
- VerifyOrExit(aFirst != NULL && aSecond != NULL, rval = 0);
-
- rval = static_cast<const Ip6::Address *>(aFirst)->PrefixMatch(*static_cast<const Ip6::Address *>(aSecond));
-
-exit:
- return rval;
+ return static_cast<const Ip6::Address *>(aFirst)->PrefixMatch(*static_cast<const Ip6::Address *>(aSecond));
}
bool otIp6IsAddressUnspecified(const otIp6Address *aAddress)
diff --git a/src/core/api/joiner_api.cpp b/src/core/api/joiner_api.cpp
index cf39a83..c2e1c49 100644
--- a/src/core/api/joiner_api.cpp
+++ b/src/core/api/joiner_api.cpp
@@ -40,8 +40,9 @@
using namespace ot;
+#if OPENTHREAD_CONFIG_JOINER_ENABLE
otError otJoinerStart(otInstance * aInstance,
- const char * aPSKd,
+ const char * aPskd,
const char * aProvisioningUrl,
const char * aVendorName,
const char * aVendorModel,
@@ -50,72 +51,30 @@
otJoinerCallback aCallback,
void * aContext)
{
- otError error = OT_ERROR_DISABLED_FEATURE;
-#if OPENTHREAD_CONFIG_JOINER_ENABLE
Instance &instance = *static_cast<Instance *>(aInstance);
- error = instance.Get<MeshCoP::Joiner>().Start(aPSKd, aProvisioningUrl, aVendorName, aVendorModel, aVendorSwVersion,
- aVendorData, aCallback, aContext);
-#else
- OT_UNUSED_VARIABLE(aInstance);
- OT_UNUSED_VARIABLE(aPSKd);
- OT_UNUSED_VARIABLE(aProvisioningUrl);
- OT_UNUSED_VARIABLE(aVendorName);
- OT_UNUSED_VARIABLE(aVendorModel);
- OT_UNUSED_VARIABLE(aVendorSwVersion);
- OT_UNUSED_VARIABLE(aVendorData);
- OT_UNUSED_VARIABLE(aCallback);
- OT_UNUSED_VARIABLE(aContext);
-#endif
-
- return error;
+ return instance.Get<MeshCoP::Joiner>().Start(aPskd, aProvisioningUrl, aVendorName, aVendorModel, aVendorSwVersion,
+ aVendorData, aCallback, aContext);
}
-otError otJoinerStop(otInstance *aInstance)
+void otJoinerStop(otInstance *aInstance)
{
- otError error;
-
-#if OPENTHREAD_CONFIG_JOINER_ENABLE
Instance &instance = *static_cast<Instance *>(aInstance);
instance.Get<MeshCoP::Joiner>().Stop();
- error = OT_ERROR_NONE;
-#else
- OT_UNUSED_VARIABLE(aInstance);
- error = OT_ERROR_DISABLED_FEATURE;
-#endif
-
- return error;
}
otJoinerState otJoinerGetState(otInstance *aInstance)
{
- otJoinerState state = OT_JOINER_STATE_IDLE;
-
-#if OPENTHREAD_CONFIG_JOINER_ENABLE
Instance &instance = *static_cast<Instance *>(aInstance);
- state = instance.Get<MeshCoP::Joiner>().GetState();
-#else
- OT_UNUSED_VARIABLE(aInstance);
-#endif
-
- return state;
+ return instance.Get<MeshCoP::Joiner>().GetState();
}
-otError otJoinerGetId(otInstance *aInstance, otExtAddress *aJoinerId)
+void otJoinerGetId(otInstance *aInstance, otExtAddress *aJoinerId)
{
- otError error = OT_ERROR_DISABLED_FEATURE;
-
-#if OPENTHREAD_CONFIG_JOINER_ENABLE
Instance &instance = *static_cast<Instance *>(aInstance);
instance.Get<MeshCoP::Joiner>().GetJoinerId(*static_cast<Mac::ExtAddress *>(aJoinerId));
- error = OT_ERROR_NONE;
-#else
- OT_UNUSED_VARIABLE(aInstance);
- OT_UNUSED_VARIABLE(aJoinerId);
-#endif
-
- return error;
}
+#endif // OPENTHREAD_CONFIG_JOINER_ENABLE
diff --git a/src/core/api/link_api.cpp b/src/core/api/link_api.cpp
index b6783aa..970220d 100644
--- a/src/core/api/link_api.cpp
+++ b/src/core/api/link_api.cpp
@@ -42,9 +42,6 @@
using namespace ot;
-static void HandleActiveScanResult(Instance &aInstance, Mac::RxFrame *aFrame);
-static void HandleEnergyScanResult(Instance &aInstance, otEnergyScanResult *aResult);
-
uint8_t otLinkGetChannel(otInstance *aInstance)
{
Instance &instance = *static_cast<Instance *>(aInstance);
@@ -119,7 +116,7 @@
otError error = OT_ERROR_NONE;
Instance &instance = *static_cast<Instance *>(aInstance);
- VerifyOrExit(aExtAddress != NULL, error = OT_ERROR_INVALID_ARGS);
+ assert(aExtAddress != NULL);
VerifyOrExit(instance.Get<Mle::MleRouter>().GetRole() == OT_DEVICE_ROLE_DISABLED, error = OT_ERROR_INVALID_STATE);
instance.Get<Mac::Mac>().SetExtAddress(*static_cast<const Mac::ExtAddress *>(aExtAddress));
@@ -187,6 +184,38 @@
return instance.Get<Mac::Mac>().GetShortAddress();
}
+uint8_t otLinkGetMaxFrameRetriesDirect(otInstance *aInstance)
+{
+ Instance &instance = *static_cast<Instance *>(aInstance);
+
+ return instance.Get<Mac::Mac>().GetMaxFrameRetriesDirect();
+}
+
+void otLinkSetMaxFrameRetriesDirect(otInstance *aInstance, uint8_t aMaxFrameRetriesDirect)
+{
+ Instance &instance = *static_cast<Instance *>(aInstance);
+
+ instance.Get<Mac::Mac>().SetMaxFrameRetriesDirect(aMaxFrameRetriesDirect);
+}
+
+#if OPENTHREAD_FTD
+
+uint8_t otLinkGetMaxFrameRetriesIndirect(otInstance *aInstance)
+{
+ Instance &instance = *static_cast<Instance *>(aInstance);
+
+ return instance.Get<Mac::Mac>().GetMaxFrameRetriesIndirect();
+}
+
+void otLinkSetMaxFrameRetriesIndirect(otInstance *aInstance, uint8_t aMaxFrameRetriesIndirect)
+{
+ Instance &instance = *static_cast<Instance *>(aInstance);
+
+ instance.Get<Mac::Mac>().SetMaxFrameRetriesIndirect(aMaxFrameRetriesIndirect);
+}
+
+#endif // OPENTHREAD_FTD
+
#if OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
otMacFilterAddressMode otLinkFilterGetAddressMode(otInstance *aInstance)
@@ -205,28 +234,20 @@
otError otLinkFilterAddAddress(otInstance *aInstance, const otExtAddress *aExtAddress)
{
- otError error = OT_ERROR_NONE;
Instance &instance = *static_cast<Instance *>(aInstance);
- VerifyOrExit(aExtAddress != NULL, error = OT_ERROR_INVALID_ARGS);
+ assert(aExtAddress != NULL);
- error = instance.Get<Mac::Filter>().AddAddress(*static_cast<const Mac::ExtAddress *>(aExtAddress));
-
-exit:
- return error;
+ return instance.Get<Mac::Filter>().AddAddress(*static_cast<const Mac::ExtAddress *>(aExtAddress));
}
otError otLinkFilterRemoveAddress(otInstance *aInstance, const otExtAddress *aExtAddress)
{
- otError error = OT_ERROR_NONE;
Instance &instance = *static_cast<Instance *>(aInstance);
- VerifyOrExit(aExtAddress != NULL, error = OT_ERROR_INVALID_ARGS);
+ assert(aExtAddress != NULL);
- error = instance.Get<Mac::Filter>().RemoveAddress(*static_cast<const Mac::ExtAddress *>(aExtAddress));
-
-exit:
- return error;
+ return instance.Get<Mac::Filter>().RemoveAddress(*static_cast<const Mac::ExtAddress *>(aExtAddress));
}
void otLinkFilterClearAddresses(otInstance *aInstance)
@@ -238,15 +259,11 @@
otError otLinkFilterGetNextAddress(otInstance *aInstance, otMacFilterIterator *aIterator, otMacFilterEntry *aEntry)
{
- otError error = OT_ERROR_NONE;
Instance &instance = *static_cast<Instance *>(aInstance);
- VerifyOrExit(aIterator != NULL && aEntry != NULL, error = OT_ERROR_INVALID_ARGS);
+ assert(aIterator != NULL && aEntry != NULL);
- error = instance.Get<Mac::Filter>().GetNextAddress(*aIterator, *aEntry);
-
-exit:
- return error;
+ return instance.Get<Mac::Filter>().GetNextAddress(*aIterator, *aEntry);
}
otError otLinkFilterAddRssIn(otInstance *aInstance, const otExtAddress *aExtAddress, int8_t aRss)
@@ -272,15 +289,11 @@
otError otLinkFilterGetNextRssIn(otInstance *aInstance, otMacFilterIterator *aIterator, otMacFilterEntry *aEntry)
{
- otError error = OT_ERROR_NONE;
Instance &instance = *static_cast<Instance *>(aInstance);
- VerifyOrExit(aIterator != NULL && aEntry != NULL, error = OT_ERROR_INVALID_ARGS);
+ assert(aIterator != NULL && aEntry != NULL);
- error = instance.Get<Mac::Filter>().GetNextRssIn(*aIterator, *aEntry);
-
-exit:
- return error;
+ return instance.Get<Mac::Filter>().GetNextRssIn(*aIterator, *aEntry);
}
uint8_t otLinkConvertRssToLinkQuality(otInstance *aInstance, int8_t aRss)
@@ -299,6 +312,38 @@
#endif // OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
+#if OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_ENABLE
+const uint32_t *otLinkGetTxDirectRetrySuccessHistogram(otInstance *aInstance, uint8_t *aNumberOfEntries)
+{
+ Instance &instance = *static_cast<Instance *>(aInstance);
+
+ return instance.Get<Mac::Mac>().GetDirectRetrySuccessHistogram(*aNumberOfEntries);
+}
+
+const uint32_t *otLinkGetTxIndirectRetrySuccessHistogram(otInstance *aInstance, uint8_t *aNumberOfEntries)
+{
+ const uint32_t *histogram = NULL;
+
+#if OPENTHREAD_FTD
+ Instance &instance = *static_cast<Instance *>(aInstance);
+
+ histogram = instance.Get<Mac::Mac>().GetIndirectRetrySuccessHistogram(*aNumberOfEntries);
+#else
+ OT_UNUSED_VARIABLE(aInstance);
+ *aNumberOfEntries = 0;
+#endif
+
+ return histogram;
+}
+
+void otLinkResetTxRetrySuccessHistogram(otInstance *aInstance)
+{
+ Instance &instance = *static_cast<Instance *>(aInstance);
+
+ instance.Get<Mac::Mac>().ResetRetrySuccessHistogram();
+}
+#endif // OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_ENABLE
+
void otLinkSetPcapCallback(otInstance *aInstance, otLinkPcapCallback aPcapCallback, void *aCallbackContext)
{
Instance &instance = *static_cast<Instance *>(aInstance);
@@ -355,6 +400,13 @@
return &instance.Get<Mac::Mac>().GetCounters();
}
+void otLinkResetCounters(otInstance *aInstance)
+{
+ Instance &instance = *static_cast<Instance *>(aInstance);
+
+ instance.Get<Mac::Mac>().ResetCounters();
+}
+
otError otLinkActiveScan(otInstance * aInstance,
uint32_t aScanChannels,
uint16_t aScanDuration,
@@ -363,8 +415,7 @@
{
Instance &instance = *static_cast<Instance *>(aInstance);
- instance.RegisterActiveScanCallback(aCallback, aCallbackContext);
- return instance.Get<Mac::Mac>().ActiveScan(aScanChannels, aScanDuration, &HandleActiveScanResult);
+ return instance.Get<Mac::Mac>().ActiveScan(aScanChannels, aScanDuration, aCallback, aCallbackContext);
}
bool otLinkIsActiveScanInProgress(otInstance *aInstance)
@@ -374,21 +425,6 @@
return instance.Get<Mac::Mac>().IsActiveScanInProgress();
}
-void HandleActiveScanResult(Instance &aInstance, Mac::RxFrame *aFrame)
-{
- if (aFrame == NULL)
- {
- aInstance.InvokeActiveScanCallback(NULL);
- }
- else
- {
- otActiveScanResult result;
-
- aInstance.Get<Mac::Mac>().ConvertBeaconToActiveScanResult(aFrame, result);
- aInstance.InvokeActiveScanCallback(&result);
- }
-}
-
otError otLinkEnergyScan(otInstance * aInstance,
uint32_t aScanChannels,
uint16_t aScanDuration,
@@ -397,13 +433,7 @@
{
Instance &instance = *static_cast<Instance *>(aInstance);
- instance.RegisterEnergyScanCallback(aCallback, aCallbackContext);
- return instance.Get<Mac::Mac>().EnergyScan(aScanChannels, aScanDuration, &HandleEnergyScanResult);
-}
-
-void HandleEnergyScanResult(Instance &aInstance, otEnergyScanResult *aResult)
-{
- aInstance.InvokeEnergyScanCallback(aResult);
+ return instance.Get<Mac::Mac>().EnergyScan(aScanChannels, aScanDuration, aCallback, aCallbackContext);
}
bool otLinkIsEnergyScanInProgress(otInstance *aInstance)
diff --git a/src/core/api/link_raw_api.cpp b/src/core/api/link_raw_api.cpp
index ed8835f..bd2ec26 100644
--- a/src/core/api/link_raw_api.cpp
+++ b/src/core/api/link_raw_api.cpp
@@ -156,14 +156,14 @@
otError otLinkRawSrcMatchAddExtEntry(otInstance *aInstance, const otExtAddress *aExtAddress)
{
- Mac::Address address;
- otError error = OT_ERROR_NONE;
- Instance & instance = *static_cast<Instance *>(aInstance);
+ Mac::ExtAddress address;
+ otError error = OT_ERROR_NONE;
+ Instance & instance = *static_cast<Instance *>(aInstance);
VerifyOrExit(instance.Get<Mac::LinkRaw>().IsEnabled(), error = OT_ERROR_INVALID_STATE);
- address.SetExtended(aExtAddress->m8, /* aReverse */ true);
- error = instance.Get<Radio>().AddSrcMatchExtEntry(address.GetExtended());
+ address.Set(aExtAddress->m8, Mac::ExtAddress::kReverseByteOrder);
+ error = instance.Get<Radio>().AddSrcMatchExtEntry(address);
exit:
return error;
@@ -183,14 +183,14 @@
otError otLinkRawSrcMatchClearExtEntry(otInstance *aInstance, const otExtAddress *aExtAddress)
{
- Mac::Address address;
- otError error = OT_ERROR_NONE;
- Instance & instance = *static_cast<Instance *>(aInstance);
+ Mac::ExtAddress address;
+ otError error = OT_ERROR_NONE;
+ Instance & instance = *static_cast<Instance *>(aInstance);
VerifyOrExit(instance.Get<Mac::LinkRaw>().IsEnabled(), error = OT_ERROR_INVALID_STATE);
- address.SetExtended(aExtAddress->m8, /* aReverse */ true);
- error = instance.Get<Radio>().ClearSrcMatchExtEntry(address.GetExtended());
+ address.Set(aExtAddress->m8, Mac::ExtAddress::kReverseByteOrder);
+ error = instance.Get<Radio>().ClearSrcMatchExtEntry(address);
exit:
return error;
diff --git a/src/core/api/logging_api.cpp b/src/core/api/logging_api.cpp
index 31a88f5..6bad81e 100644
--- a/src/core/api/logging_api.cpp
+++ b/src/core/api/logging_api.cpp
@@ -40,30 +40,17 @@
using namespace ot;
otLogLevel otLoggingGetLevel(void)
-#if OPENTHREAD_CONFIG_ENABLE_DYNAMIC_LOG_LEVEL && !OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE
{
+#if OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE && !OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE
return Instance::Get().GetLogLevel();
-}
#else
-{
return static_cast<otLogLevel>(OPENTHREAD_CONFIG_LOG_LEVEL);
-}
#endif
+}
-otError otLoggingSetLevel(otLogLevel aLogLevel)
+#if OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE
+void otLoggingSetLevel(otLogLevel aLogLevel)
{
- OT_UNUSED_VARIABLE(aLogLevel);
-
- otError error = OT_ERROR_DISABLED_FEATURE;
-
-#if OPENTHREAD_CONFIG_ENABLE_DYNAMIC_LOG_LEVEL
-#if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE
-#warning "Dynamic log level is not supported along with multiple OT instance feature"
-#else
Instance::Get().SetLogLevel(aLogLevel);
- error = OT_ERROR_NONE;
-#endif
-#endif
-
- return error;
}
+#endif
diff --git a/src/core/api/netdata_api.cpp b/src/core/api/netdata_api.cpp
index fe30987..47c0b31 100644
--- a/src/core/api/netdata_api.cpp
+++ b/src/core/api/netdata_api.cpp
@@ -42,15 +42,11 @@
otError otNetDataGet(otInstance *aInstance, bool aStable, uint8_t *aData, uint8_t *aDataLength)
{
- otError error = OT_ERROR_NONE;
Instance &instance = *static_cast<Instance *>(aInstance);
- VerifyOrExit(aData != NULL && aDataLength != NULL, error = OT_ERROR_INVALID_ARGS);
+ assert(aData != NULL && aDataLength != NULL);
- error = instance.Get<NetworkData::Leader>().GetNetworkData(aStable, aData, *aDataLength);
-
-exit:
- return error;
+ return instance.Get<NetworkData::Leader>().GetNetworkData(aStable, aData, *aDataLength);
}
otError otNetDataGetNextOnMeshPrefix(otInstance * aInstance,
@@ -62,7 +58,7 @@
VerifyOrExit(aIterator && aConfig, error = OT_ERROR_INVALID_ARGS);
- error = instance.Get<NetworkData::Leader>().GetNextOnMeshPrefix(aIterator, aConfig);
+ error = instance.Get<NetworkData::Leader>().GetNextOnMeshPrefix(*aIterator, *aConfig);
exit:
return error;
@@ -75,7 +71,20 @@
VerifyOrExit(aIterator && aConfig, error = OT_ERROR_INVALID_ARGS);
- error = instance.Get<NetworkData::Leader>().GetNextExternalRoute(aIterator, aConfig);
+ error = instance.Get<NetworkData::Leader>().GetNextExternalRoute(*aIterator, *aConfig);
+
+exit:
+ return error;
+}
+
+otError otNetDataGetNextService(otInstance *aInstance, otNetworkDataIterator *aIterator, otServiceConfig *aConfig)
+{
+ otError error = OT_ERROR_NONE;
+ Instance &instance = *static_cast<Instance *>(aInstance);
+
+ VerifyOrExit(aIterator && aConfig, error = OT_ERROR_INVALID_ARGS);
+
+ error = instance.Get<NetworkData::Leader>().GetNextService(*aIterator, *aConfig);
exit:
return error;
diff --git a/src/core/api/server_api.cpp b/src/core/api/server_api.cpp
index a10edc2..4054bcc 100644
--- a/src/core/api/server_api.cpp
+++ b/src/core/api/server_api.cpp
@@ -44,15 +44,11 @@
otError otServerGetNetDataLocal(otInstance *aInstance, bool aStable, uint8_t *aData, uint8_t *aDataLength)
{
- otError error = OT_ERROR_NONE;
Instance &instance = *static_cast<Instance *>(aInstance);
- VerifyOrExit(aData != NULL && aDataLength != NULL, error = OT_ERROR_INVALID_ARGS);
+ assert(aData != NULL && aDataLength != NULL);
- error = instance.Get<NetworkData::Local>().GetNetworkData(aStable, aData, *aDataLength);
-
-exit:
- return error;
+ return instance.Get<NetworkData::Local>().GetNetworkData(aStable, aData, *aDataLength);
}
otError otServerAddService(otInstance *aInstance, const otServiceConfig *aConfig)
@@ -82,20 +78,7 @@
VerifyOrExit(aIterator && aConfig, error = OT_ERROR_INVALID_ARGS);
- error = instance.Get<NetworkData::Local>().GetNextService(aIterator, aConfig);
-
-exit:
- return error;
-}
-
-otError otServerGetNextLeaderService(otInstance *aInstance, otNetworkDataIterator *aIterator, otServiceConfig *aConfig)
-{
- otError error = OT_ERROR_NONE;
- Instance &instance = *static_cast<Instance *>(aInstance);
-
- VerifyOrExit(aIterator && aConfig, error = OT_ERROR_INVALID_ARGS);
-
- error = instance.Get<NetworkData::Leader>().GetNextService(aIterator, aConfig);
+ error = instance.Get<NetworkData::Local>().GetNextService(*aIterator, *aConfig);
exit:
return error;
diff --git a/src/core/api/thread_api.cpp b/src/core/api/thread_api.cpp
index 92bc5c5..4d53e4c 100644
--- a/src/core/api/thread_api.cpp
+++ b/src/core/api/thread_api.cpp
@@ -35,6 +35,7 @@
#include <openthread/thread.h>
+#include "common/debug.hpp"
#include "common/instance.hpp"
#include "common/locator-getters.hpp"
#include "common/logging.hpp"
@@ -42,6 +43,7 @@
using namespace ot;
+#if OPENTHREAD_FTD || OPENTHREAD_MTD
uint32_t otThreadGetChildTimeout(otInstance *aInstance)
{
Instance &instance = *static_cast<Instance *>(aInstance);
@@ -71,7 +73,7 @@
VerifyOrExit(instance.Get<Mle::MleRouter>().GetRole() == OT_DEVICE_ROLE_DISABLED, error = OT_ERROR_INVALID_STATE);
- instance.Get<Mac::Mac>().SetExtendedPanId(*aExtendedPanId);
+ instance.Get<Mac::Mac>().SetExtendedPanId(*static_cast<const Mac::ExtendedPanId *>(aExtendedPanId));
prefix.m8[0] = 0xfd;
memcpy(&prefix.m8[1], aExtendedPanId->m8, 5);
@@ -88,15 +90,11 @@
otError otThreadGetLeaderRloc(otInstance *aInstance, otIp6Address *aLeaderRloc)
{
- otError error;
Instance &instance = *static_cast<Instance *>(aInstance);
- VerifyOrExit(aLeaderRloc != NULL, error = OT_ERROR_INVALID_ARGS);
+ assert(aLeaderRloc != NULL);
- error = instance.Get<Mle::MleRouter>().GetLeaderAddress(*static_cast<Ip6::Address *>(aLeaderRloc));
-
-exit:
- return error;
+ return instance.Get<Mle::MleRouter>().GetLeaderAddress(*static_cast<Ip6::Address *>(aLeaderRloc));
}
otLinkModeConfig otThreadGetLinkMode(otInstance *aInstance)
@@ -128,10 +126,11 @@
otError error = OT_ERROR_NONE;
Instance &instance = *static_cast<Instance *>(aInstance);
- VerifyOrExit(aKey != NULL, error = OT_ERROR_INVALID_ARGS);
+ assert(aKey != NULL);
+
VerifyOrExit(instance.Get<Mle::MleRouter>().GetRole() == OT_DEVICE_ROLE_DISABLED, error = OT_ERROR_INVALID_STATE);
- error = instance.Get<KeyManager>().SetMasterKey(*aKey);
+ error = instance.Get<KeyManager>().SetMasterKey(*static_cast<const MasterKey *>(aKey));
instance.Get<MeshCoP::ActiveDataset>().Clear();
instance.Get<MeshCoP::PendingDataset>().Clear();
@@ -186,7 +185,7 @@
{
Instance &instance = *static_cast<Instance *>(aInstance);
- return instance.Get<Mac::Mac>().GetNetworkName();
+ return instance.Get<Mac::Mac>().GetNetworkName().GetAsCString();
}
otError otThreadSetNetworkName(otInstance *aInstance, const char *aNetworkName)
@@ -248,15 +247,11 @@
otError otThreadGetNextNeighborInfo(otInstance *aInstance, otNeighborInfoIterator *aIterator, otNeighborInfo *aInfo)
{
- otError error = OT_ERROR_NONE;
Instance &instance = *static_cast<Instance *>(aInstance);
- VerifyOrExit((aInfo != NULL) && (aIterator != NULL), error = OT_ERROR_INVALID_ARGS);
+ assert((aInfo != NULL) && (aIterator != NULL));
- error = instance.Get<Mle::MleRouter>().GetNextNeighborInfo(*aIterator, *aInfo);
-
-exit:
- return error;
+ return instance.Get<Mle::MleRouter>().GetNextNeighborInfo(*aIterator, *aInfo);
}
otDeviceRole otThreadGetDeviceRole(otInstance *aInstance)
@@ -268,15 +263,11 @@
otError otThreadGetLeaderData(otInstance *aInstance, otLeaderData *aLeaderData)
{
- otError error;
Instance &instance = *static_cast<Instance *>(aInstance);
- VerifyOrExit(aLeaderData != NULL, error = OT_ERROR_INVALID_ARGS);
+ assert(aLeaderData != NULL);
- error = instance.Get<Mle::MleRouter>().GetLeaderData(*aLeaderData);
-
-exit:
- return error;
+ return instance.Get<Mle::MleRouter>().GetLeaderData(*aLeaderData);
}
uint8_t otThreadGetLeaderRouterId(otInstance *aInstance)
@@ -309,25 +300,33 @@
otError otThreadGetParentInfo(otInstance *aInstance, otRouterInfo *aParentInfo)
{
- otError error = OT_ERROR_NONE;
Instance &instance = *static_cast<Instance *>(aInstance);
+ otError error = OT_ERROR_NONE;
Router * parent;
- VerifyOrExit(aParentInfo != NULL, error = OT_ERROR_INVALID_ARGS);
+ assert(aParentInfo != NULL);
- parent = instance.Get<Mle::MleRouter>().GetParent();
+ // Reference device needs get the original parent's info even after the node state changed.
+#if !OPENTHREAD_CONFIG_REFERENCE_DEVICE_ENABLE
+ VerifyOrExit(instance.Get<Mle::MleRouter>().GetRole() == OT_DEVICE_ROLE_CHILD, error = OT_ERROR_INVALID_STATE);
+#endif
+
+ parent = &instance.Get<Mle::MleRouter>().GetParent();
+
aParentInfo->mExtAddress = parent->GetExtAddress();
aParentInfo->mRloc16 = parent->GetRloc16();
- aParentInfo->mRouterId = Mle::Mle::GetRouterId(parent->GetRloc16());
+ aParentInfo->mRouterId = Mle::Mle::RouterIdFromRloc16(parent->GetRloc16());
aParentInfo->mNextHop = parent->GetNextHop();
aParentInfo->mPathCost = parent->GetCost();
aParentInfo->mLinkQualityIn = parent->GetLinkInfo().GetLinkQuality();
aParentInfo->mLinkQualityOut = parent->GetLinkQualityOut();
- aParentInfo->mAge = static_cast<uint8_t>(TimerMilli::MsecToSec(TimerMilli::Elapsed(parent->GetLastHeard())));
- aParentInfo->mAllocated = true;
- aParentInfo->mLinkEstablished = parent->GetState() == Neighbor::kStateValid;
+ aParentInfo->mAge = static_cast<uint8_t>(Time::MsecToSec(TimerMilli::GetNow() - parent->GetLastHeard()));
+ aParentInfo->mAllocated = true;
+ aParentInfo->mLinkEstablished = parent->IsStateValid();
+#if !OPENTHREAD_CONFIG_REFERENCE_DEVICE_ENABLE
exit:
+#endif
return error;
}
@@ -335,12 +334,10 @@
{
otError error = OT_ERROR_NONE;
Instance &instance = *static_cast<Instance *>(aInstance);
- Router * parent;
- VerifyOrExit(aParentRssi != NULL, error = OT_ERROR_INVALID_ARGS);
+ assert(aParentRssi != NULL);
- parent = instance.Get<Mle::MleRouter>().GetParent();
- *aParentRssi = parent->GetLinkInfo().GetAverageRss();
+ *aParentRssi = instance.Get<Mle::MleRouter>().GetParent().GetLinkInfo().GetAverageRss();
VerifyOrExit(*aParentRssi != OT_RADIO_RSSI_INVALID, error = OT_ERROR_FAILED);
@@ -352,12 +349,10 @@
{
otError error = OT_ERROR_NONE;
Instance &instance = *static_cast<Instance *>(aInstance);
- Router * parent;
- VerifyOrExit(aLastRssi != NULL, error = OT_ERROR_INVALID_ARGS);
+ assert(aLastRssi != NULL);
- parent = instance.Get<Mle::MleRouter>().GetParent();
- *aLastRssi = parent->GetLinkInfo().GetLastRss();
+ *aLastRssi = instance.Get<Mle::MleRouter>().GetParent().GetLinkInfo().GetLastRss();
VerifyOrExit(*aLastRssi != OT_RADIO_RSSI_INVALID, error = OT_ERROR_FAILED);
@@ -415,6 +410,11 @@
return error;
}
+uint16_t otThreadGetVersion(void)
+{
+ return OPENTHREAD_THREAD_VERSION;
+}
+
bool otThreadIsSingleton(otInstance *aInstance)
{
Instance &instance = *static_cast<Instance *>(aInstance);
@@ -450,6 +450,13 @@
return &instance.Get<MeshForwarder>().GetCounters();
}
+void otThreadResetIp6Counters(otInstance *aInstance)
+{
+ Instance &instance = *static_cast<Instance *>(aInstance);
+
+ instance.Get<MeshForwarder>().ResetCounters();
+}
+
const otMleCounters *otThreadGetMleCounters(otInstance *aInstance)
{
Instance &instance = *static_cast<Instance *>(aInstance);
@@ -464,21 +471,12 @@
instance.Get<Mle::MleRouter>().ResetCounters();
}
-otError otThreadRegisterParentResponseCallback(otInstance * aInstance,
- otThreadParentResponseCallback aCallback,
- void * aContext)
+void otThreadRegisterParentResponseCallback(otInstance * aInstance,
+ otThreadParentResponseCallback aCallback,
+ void * aContext)
{
-#if OPENTHREAD_FTD || OPENTHREAD_MTD
Instance &instance = *static_cast<Instance *>(aInstance);
instance.Get<Mle::MleRouter>().RegisterParentResponseStatsCallback(aCallback, aContext);
-
- return OT_ERROR_NONE;
-#else
- OT_UNUSED_VARIABLE(aInstance);
- OT_UNUSED_VARIABLE(aCallback);
- OT_UNUSED_VARIABLE(aContext);
-
- return OT_ERROR_DISABLED_FEATURE;
-#endif
}
+#endif // OPENTHREAD_FTD || OPENTHREAD_MTD
diff --git a/src/core/api/thread_ftd_api.cpp b/src/core/api/thread_ftd_api.cpp
index 130e64d..4746ed9 100644
--- a/src/core/api/thread_ftd_api.cpp
+++ b/src/core/api/thread_ftd_api.cpp
@@ -58,18 +58,18 @@
return instance.Get<ChildTable>().SetMaxChildrenAllowed(aMaxChildren);
}
-bool otThreadIsRouterRoleEnabled(otInstance *aInstance)
+bool otThreadIsRouterEligible(otInstance *aInstance)
{
Instance &instance = *static_cast<Instance *>(aInstance);
- return instance.Get<Mle::MleRouter>().IsRouterRoleEnabled();
+ return instance.Get<Mle::MleRouter>().IsRouterEligible();
}
-void otThreadSetRouterRoleEnabled(otInstance *aInstance, bool aEnabled)
+otError otThreadSetRouterEligible(otInstance *aInstance, bool aEligible)
{
Instance &instance = *static_cast<Instance *>(aInstance);
- instance.Get<Mle::MleRouter>().SetRouterRoleEnabled(aEnabled);
+ return instance.Get<Mle::MleRouter>().SetRouterEligible(aEligible);
}
otError otThreadSetPreferredRouterId(otInstance *aInstance, uint8_t aRouterId)
@@ -239,28 +239,20 @@
otError otThreadGetChildInfoById(otInstance *aInstance, uint16_t aChildId, otChildInfo *aChildInfo)
{
- otError error = OT_ERROR_NONE;
Instance &instance = *static_cast<Instance *>(aInstance);
- VerifyOrExit(aChildInfo != NULL, error = OT_ERROR_INVALID_ARGS);
+ assert(aChildInfo != NULL);
- error = instance.Get<Mle::MleRouter>().GetChildInfoById(aChildId, *aChildInfo);
-
-exit:
- return error;
+ return instance.Get<Mle::MleRouter>().GetChildInfoById(aChildId, *aChildInfo);
}
otError otThreadGetChildInfoByIndex(otInstance *aInstance, uint16_t aChildIndex, otChildInfo *aChildInfo)
{
- otError error = OT_ERROR_NONE;
Instance &instance = *static_cast<Instance *>(aInstance);
- VerifyOrExit(aChildInfo != NULL, error = OT_ERROR_INVALID_ARGS);
+ assert(aChildInfo != NULL);
- error = instance.Get<Mle::MleRouter>().GetChildInfoByIndex(aChildIndex, *aChildInfo);
-
-exit:
- return error;
+ return instance.Get<Mle::MleRouter>().GetChildInfoByIndex(aChildIndex, *aChildInfo);
}
otError otThreadGetChildNextIp6Address(otInstance * aInstance,
@@ -273,7 +265,7 @@
Child::Ip6AddressIterator iterator;
Ip6::Address * address;
- VerifyOrExit(aIterator != NULL && aAddress != NULL, error = OT_ERROR_INVALID_ARGS);
+ assert(aIterator != NULL && aAddress != NULL);
address = static_cast<Ip6::Address *>(aAddress);
iterator.Set(*aIterator);
@@ -301,62 +293,45 @@
otError otThreadGetRouterInfo(otInstance *aInstance, uint16_t aRouterId, otRouterInfo *aRouterInfo)
{
- otError error = OT_ERROR_NONE;
Instance &instance = *static_cast<Instance *>(aInstance);
- VerifyOrExit(aRouterInfo != NULL, error = OT_ERROR_INVALID_ARGS);
+ assert(aRouterInfo != NULL);
- error = instance.Get<RouterTable>().GetRouterInfo(aRouterId, *aRouterInfo);
-
-exit:
- return error;
+ return instance.Get<RouterTable>().GetRouterInfo(aRouterId, *aRouterInfo);
}
otError otThreadGetEidCacheEntry(otInstance *aInstance, uint8_t aIndex, otEidCacheEntry *aEntry)
{
- otError error;
Instance &instance = *static_cast<Instance *>(aInstance);
- VerifyOrExit(aEntry != NULL, error = OT_ERROR_INVALID_ARGS);
- error = instance.Get<AddressResolver>().GetEntry(aIndex, *aEntry);
-
-exit:
- return error;
+ assert(aEntry != NULL);
+ return instance.Get<AddressResolver>().GetEntry(aIndex, *aEntry);
}
-otError otThreadSetSteeringData(otInstance *aInstance, const otExtAddress *aExtAddress)
-{
- otError error;
-
#if OPENTHREAD_CONFIG_MLE_STEERING_DATA_SET_OOB_ENABLE
- Instance &instance = *static_cast<Instance *>(aInstance);
-
- error = instance.Get<Mle::MleRouter>().SetSteeringData(static_cast<const Mac::ExtAddress *>(aExtAddress));
-#else
- OT_UNUSED_VARIABLE(aInstance);
- OT_UNUSED_VARIABLE(aExtAddress);
-
- error = OT_ERROR_DISABLED_FEATURE;
-#endif
-
- return error;
-}
-
-const otPSKc *otThreadGetPSKc(otInstance *aInstance)
+void otThreadSetSteeringData(otInstance *aInstance, const otExtAddress *aExtAddress)
{
Instance &instance = *static_cast<Instance *>(aInstance);
- return &instance.Get<KeyManager>().GetPSKc();
+ instance.Get<Mle::MleRouter>().SetSteeringData(static_cast<const Mac::ExtAddress *>(aExtAddress));
+}
+#endif
+
+const otPskc *otThreadGetPskc(otInstance *aInstance)
+{
+ Instance &instance = *static_cast<Instance *>(aInstance);
+
+ return &instance.Get<KeyManager>().GetPskc();
}
-otError otThreadSetPSKc(otInstance *aInstance, const otPSKc *aPSKc)
+otError otThreadSetPskc(otInstance *aInstance, const otPskc *aPskc)
{
otError error = OT_ERROR_NONE;
Instance &instance = *static_cast<Instance *>(aInstance);
VerifyOrExit(instance.Get<Mle::MleRouter>().GetRole() == OT_DEVICE_ROLE_DISABLED, error = OT_ERROR_INVALID_STATE);
- instance.Get<KeyManager>().SetPSKc(*aPSKc);
+ instance.Get<KeyManager>().SetPskc(*static_cast<const Pskc *>(aPskc));
instance.Get<MeshCoP::ActiveDataset>().Clear();
instance.Get<MeshCoP::PendingDataset>().Clear();
diff --git a/src/core/coap/coap.cpp b/src/core/coap/coap.cpp
index 50c08c4..6bf5df2 100644
--- a/src/core/coap/coap.cpp
+++ b/src/core/coap/coap.cpp
@@ -49,7 +49,7 @@
CoapBase::CoapBase(Instance &aInstance, Sender aSender)
: InstanceLocator(aInstance)
, mRetransmissionTimer(aInstance, &Coap::HandleRetransmissionTimer, this)
- , mResources(NULL)
+ , mResources()
, mContext(NULL)
, mInterceptor(NULL)
, mResponsesQueue(aInstance)
@@ -81,40 +81,13 @@
otError CoapBase::AddResource(Resource &aResource)
{
- otError error = OT_ERROR_NONE;
-
- for (Resource *cur = mResources; cur; cur = cur->GetNext())
- {
- VerifyOrExit(cur != &aResource, error = OT_ERROR_ALREADY);
- }
-
- aResource.mNext = mResources;
- mResources = &aResource;
-
-exit:
- return error;
+ return mResources.Add(aResource);
}
void CoapBase::RemoveResource(Resource &aResource)
{
- if (mResources == &aResource)
- {
- mResources = aResource.GetNext();
- }
- else
- {
- for (Resource *cur = mResources; cur; cur = cur->GetNext())
- {
- if (cur->mNext == &aResource)
- {
- cur->mNext = aResource.mNext;
- ExitNow();
- }
- }
- }
-
-exit:
- aResource.mNext = NULL;
+ mResources.Remove(aResource);
+ aResource.SetNext(NULL);
}
void CoapBase::SetDefaultHandler(otCoapRequestHandler aHandler, void *aContext)
@@ -144,17 +117,17 @@
Message * storedCopy = NULL;
uint16_t copyLength = 0;
- if ((aMessage.GetType() == OT_COAP_TYPE_ACKNOWLEDGMENT || aMessage.GetType() == OT_COAP_TYPE_RESET) &&
- aMessage.GetCode() != OT_COAP_CODE_EMPTY)
+ switch (aMessage.GetType())
{
+ case OT_COAP_TYPE_ACKNOWLEDGMENT:
mResponsesQueue.EnqueueResponse(aMessage, aMessageInfo);
- }
-
- // Set Message Id if it was not already set.
- if (aMessage.GetMessageId() == 0 &&
- (aMessage.GetType() == OT_COAP_TYPE_CONFIRMABLE || aMessage.GetType() == OT_COAP_TYPE_NON_CONFIRMABLE))
- {
+ break;
+ case OT_COAP_TYPE_RESET:
+ assert(aMessage.GetCode() == OT_COAP_CODE_EMPTY);
+ break;
+ default:
aMessage.SetMessageId(mMessageId++);
+ break;
}
aMessage.Finish();
@@ -231,7 +204,6 @@
case OT_COAP_TYPE_NON_CONFIRMABLE:
message->Init(OT_COAP_TYPE_NON_CONFIRMABLE, aCode);
- message->SetMessageId(mMessageId++);
break;
default:
@@ -260,41 +232,34 @@
void CoapBase::HandleRetransmissionTimer(void)
{
- uint32_t now = TimerMilli::GetNow();
- uint32_t nextDelta = TimerMilli::kForeverDt;
+ TimeMilli now = TimerMilli::GetNow();
+ TimeMilli nextTime = now.GetDistantFuture();
CoapMetadata coapMetadata;
- Message * message = static_cast<Message *>(mPendingRequests.GetHead());
- Message * nextMessage = NULL;
+ Message * message;
+ Message * nextMessage;
Ip6::MessageInfo messageInfo;
- while (message != NULL)
+ for (message = static_cast<Message *>(mPendingRequests.GetHead()); message != NULL; message = nextMessage)
{
nextMessage = static_cast<Message *>(message->GetNext());
+
coapMetadata.ReadFrom(*message);
- if (coapMetadata.IsLater(now))
+ if (now >= coapMetadata.mNextTimerShot)
{
- uint32_t diff = TimerMilli::Elapsed(now, coapMetadata.mNextTimerShot);
- // Calculate the next delay and choose the lowest.
- if (diff < nextDelta)
+ if (!coapMetadata.mConfirmable || (coapMetadata.mRetransmissionCount >= kMaxRetransmit))
{
- nextDelta = diff;
+ // No expected response or acknowledgment.
+ FinalizeCoapTransaction(*message, coapMetadata, NULL, NULL, OT_ERROR_RESPONSE_TIMEOUT);
+ continue;
}
- }
- else if ((coapMetadata.mConfirmable) && (coapMetadata.mRetransmissionCount < kMaxRetransmit))
- {
+
// Increment retransmission counter and timer.
coapMetadata.mRetransmissionCount++;
coapMetadata.mRetransmissionTimeout *= 2;
coapMetadata.mNextTimerShot = now + coapMetadata.mRetransmissionTimeout;
coapMetadata.UpdateIn(*message);
- // Check if retransmission time is lower than current lowest.
- if (coapMetadata.mRetransmissionTimeout < nextDelta)
- {
- nextDelta = coapMetadata.mRetransmissionTimeout;
- }
-
// Retransmit
if (!coapMetadata.mAcknowledged)
{
@@ -305,18 +270,16 @@
SendCopy(*message, messageInfo);
}
}
- else
- {
- // No expected response or acknowledgment.
- FinalizeCoapTransaction(*message, coapMetadata, NULL, NULL, OT_ERROR_RESPONSE_TIMEOUT);
- }
- message = nextMessage;
+ if (nextTime > coapMetadata.mNextTimerShot)
+ {
+ nextTime = coapMetadata.mNextTimerShot;
+ }
}
- if (nextDelta != TimerMilli::kForeverDt)
+ if (nextTime < now.GetDistantFuture())
{
- mRetransmissionTimer.Start(nextDelta);
+ mRetransmissionTimer.FireAt(nextTime);
}
}
@@ -369,23 +332,7 @@
// Append the copy with retransmission data.
SuccessOrExit(error = aCoapMetadata.AppendTo(*messageCopy));
- // Setup the timer.
- if (mRetransmissionTimer.IsRunning())
- {
- uint32_t alarmFireTime;
-
- // If timer is already running, check if it should be restarted with earlier fire time.
- alarmFireTime = mRetransmissionTimer.GetFireTime();
-
- if (aCoapMetadata.IsEarlier(alarmFireTime))
- {
- mRetransmissionTimer.Start(aCoapMetadata.mRetransmissionTimeout);
- }
- }
- else
- {
- mRetransmissionTimer.Start(aCoapMetadata.mRetransmissionTimeout);
- }
+ mRetransmissionTimer.FireAtIfEarlier(aCoapMetadata.mNextTimerShot);
// Enqueue the message.
mPendingRequests.Enqueue(*messageCopy);
@@ -588,10 +535,11 @@
void CoapBase::ProcessReceivedRequest(Message &aMessage, const Ip6::MessageInfo &aMessageInfo)
{
- char uriPath[Resource::kMaxReceivedUriPath];
- char * curUriPath = uriPath;
- Message *cachedResponse = NULL;
- otError error = OT_ERROR_NOT_FOUND;
+ char uriPath[Resource::kMaxReceivedUriPath];
+ char * curUriPath = uriPath;
+ Message * cachedResponse = NULL;
+ otError error = OT_ERROR_NOT_FOUND;
+ OptionIterator iterator;
if (mInterceptor != NULL)
{
@@ -601,6 +549,7 @@
switch (mResponsesQueue.GetMatchedResponseCopy(aMessage, aMessageInfo, &cachedResponse))
{
case OT_ERROR_NONE:
+ cachedResponse->Finish();
error = Send(*cachedResponse, aMessageInfo);
// fall through
;
@@ -613,7 +562,8 @@
break;
}
- for (const otCoapOption *option = aMessage.GetFirstOption(); option != NULL; option = aMessage.GetNextOption())
+ SuccessOrExit(error = iterator.Init(&aMessage));
+ for (const otCoapOption *option = iterator.GetFirstOption(); option != NULL; option = iterator.GetNextOption())
{
switch (option->mNumber)
{
@@ -625,7 +575,7 @@
VerifyOrExit(option->mLength < sizeof(uriPath) - static_cast<size_t>(curUriPath + 1 - uriPath));
- aMessage.GetOptionValue(curUriPath);
+ iterator.GetOptionValue(curUriPath);
curUriPath += option->mLength;
break;
@@ -636,7 +586,7 @@
curUriPath[0] = '\0';
- for (const Resource *resource = mResources; resource; resource = resource->GetNext())
+ for (const Resource *resource = mResources.GetHead(); resource; resource = resource->GetNext())
{
if (strcmp(resource->mUriPath, uriPath) == 0)
{
@@ -656,7 +606,7 @@
if (error != OT_ERROR_NONE)
{
- otLogInfoCoapErr(error, "Failed to process request");
+ otLogInfoCoap("Failed to process request: %s", otThreadErrorToString(error));
if (error == OT_ERROR_NOT_FOUND && !aMessageInfo.GetSockAddr().IsMulticast())
{
@@ -681,10 +631,10 @@
mResponseHandler = aHandler;
mResponseContext = aContext;
mRetransmissionCount = 0;
- mRetransmissionTimeout = TimerMilli::SecToMsec(kAckTimeout);
+ mRetransmissionTimeout = Time::SecToMsec(kAckTimeout);
mRetransmissionTimeout += Random::NonCrypto::GetUint32InRange(
- 0, TimerMilli::SecToMsec(kAckTimeout) * kAckRandomFactorNumerator / kAckRandomFactorDenominator -
- TimerMilli::SecToMsec(kAckTimeout) + 1);
+ 0, Time::SecToMsec(kAckTimeout) * kAckRandomFactorNumerator / kAckRandomFactorDenominator -
+ Time::SecToMsec(kAckTimeout) + 1);
if (aConfirmable)
{
@@ -694,7 +644,7 @@
else
{
// Set overall response timeout.
- mNextTimerShot = TimerMilli::GetNow() + kMaxTransmitWait;
+ mNextTimerShot = TimerMilli::GetNow() + Time::SecToMsec(kMaxTransmitWait);
}
mAcknowledged = false;
@@ -711,14 +661,29 @@
const Ip6::MessageInfo &aMessageInfo,
Message ** aResponse)
{
- otError error = OT_ERROR_NOT_FOUND;
- Message * message;
- EnqueuedResponseHeader enqueuedResponseHeader;
- Ip6::MessageInfo messageInfo;
+ otError error = OT_ERROR_NONE;
+ const Message *cacheResponse;
- for (message = static_cast<Message *>(mQueue.GetHead()); message != NULL;
- message = static_cast<Message *>(message->GetNext()))
+ cacheResponse = FindMatchedResponse(aRequest, aMessageInfo);
+ VerifyOrExit(cacheResponse != NULL, error = OT_ERROR_NOT_FOUND);
+
+ *aResponse = cacheResponse->Clone(cacheResponse->GetLength() - sizeof(EnqueuedResponseHeader));
+ VerifyOrExit(*aResponse != NULL, error = OT_ERROR_NO_BUFS);
+
+exit:
+ return error;
+}
+
+const Message *ResponsesQueue::FindMatchedResponse(const Message &aRequest, const Ip6::MessageInfo &aMessageInfo) const
+{
+ Message *matchedResponse = NULL;
+
+ for (Message *message = static_cast<Message *>(mQueue.GetHead()); message != NULL;
+ message = static_cast<Message *>(message->GetNext()))
{
+ EnqueuedResponseHeader enqueuedResponseHeader;
+ Ip6::MessageInfo messageInfo;
+
enqueuedResponseHeader.ReadFrom(*message);
messageInfo = enqueuedResponseHeader.GetMessageInfo();
@@ -739,41 +704,23 @@
continue;
}
- VerifyOrExit((*aResponse = message->Clone(message->GetLength() - sizeof(EnqueuedResponseHeader))) != NULL,
- error = OT_ERROR_NO_BUFS);
-
- error = OT_ERROR_NONE;
- break;
+ ExitNow(matchedResponse = message);
}
exit:
- return error;
+ return matchedResponse;
}
void ResponsesQueue::EnqueueResponse(Message &aMessage, const Ip6::MessageInfo &aMessageInfo)
{
- otError error = OT_ERROR_NONE;
- Message * cachedResponse = NULL;
- Message * responseCopy = NULL;
+ otError error = OT_ERROR_NONE;
+ Message * responseCopy = NULL;
EnqueuedResponseHeader enqueuedResponseHeader(aMessageInfo);
uint16_t messageCount;
uint16_t bufferCount;
- switch (GetMatchedResponseCopy(aMessage, aMessageInfo, &cachedResponse))
- {
- case OT_ERROR_NOT_FOUND:
- break;
-
- case OT_ERROR_NONE:
- assert(cachedResponse != NULL);
- cachedResponse->Free();
-
- // fall through
-
- case OT_ERROR_NO_BUFS:
- default:
- ExitNow();
- }
+ // return success if matched response already exists in the cache
+ VerifyOrExit(FindMatchedResponse(aMessage, aMessageInfo) == NULL);
mQueue.GetInfo(messageCount, bufferCount);
@@ -789,7 +736,7 @@
if (!mTimer.IsRunning())
{
- mTimer.Start(TimerMilli::SecToMsec(kExchangeLifetime));
+ mTimer.Start(Time::SecToMsec(kExchangeLifetime));
}
exit:
@@ -837,7 +784,7 @@
{
enqueuedResponseHeader.ReadFrom(*message);
- if (enqueuedResponseHeader.IsEarlier(TimerMilli::GetNow()))
+ if (TimerMilli::GetNow() >= enqueuedResponseHeader.mDequeueTime)
{
DequeueResponse(*message);
}
@@ -851,9 +798,15 @@
uint32_t EnqueuedResponseHeader::GetRemainingTime(void) const
{
- int32_t remainingTime = static_cast<int32_t>(mDequeueTime - TimerMilli::GetNow());
+ TimeMilli now = TimerMilli::GetNow();
+ uint32_t remainingTime = 0;
- return remainingTime >= 0 ? static_cast<uint32_t>(remainingTime) : 0;
+ if (mDequeueTime > now)
+ {
+ remainingTime = mDequeueTime - now;
+ }
+
+ return remainingTime;
}
Coap::Coap(Instance &aInstance)
@@ -894,7 +847,7 @@
otError Coap::Send(ot::Message &aMessage, const Ip6::MessageInfo &aMessageInfo)
{
- return mSocket.SendTo(aMessage, aMessageInfo);
+ return mSocket.IsBound() ? mSocket.SendTo(aMessage, aMessageInfo) : OT_ERROR_INVALID_STATE;
}
} // namespace Coap
diff --git a/src/core/coap/coap.hpp b/src/core/coap/coap.hpp
index 9486f87..dc2f96a 100644
--- a/src/core/coap/coap.hpp
+++ b/src/core/coap/coap.hpp
@@ -35,6 +35,7 @@
#include "coap/coap_message.hpp"
#include "common/debug.hpp"
+#include "common/linked_list.hpp"
#include "common/locator.hpp"
#include "common/message.hpp"
#include "common/timer.hpp"
@@ -88,7 +89,6 @@
* This class implements metadata required for CoAP retransmission.
*
*/
-OT_TOOL_PACKED_BEGIN
class CoapMetadata
{
friend class CoapBase;
@@ -159,44 +159,24 @@
return aMessage.Write(aMessage.GetLength() - sizeof(*this), sizeof(*this), this);
}
- /**
- * This method checks if the message shall be sent before the given time.
- *
- * @param[in] aTime A time to compare.
- *
- * @retval TRUE If the message shall be sent before the given time.
- * @retval FALSE Otherwise.
- */
- bool IsEarlier(uint32_t aTime) const { return (static_cast<int32_t>(aTime - mNextTimerShot) >= 0); }
-
- /**
- * This method checks if the message shall be sent after the given time.
- *
- * @param[in] aTime A time to compare.
- *
- * @retval TRUE If the message shall be sent after the given time.
- * @retval FALSE Otherwise.
- */
- bool IsLater(uint32_t aTime) const { return (static_cast<int32_t>(aTime - mNextTimerShot) < 0); }
-
private:
Ip6::Address mSourceAddress; ///< IPv6 address of the message source.
Ip6::Address mDestinationAddress; ///< IPv6 address of the message destination.
uint16_t mDestinationPort; ///< UDP port of the message destination.
otCoapResponseHandler mResponseHandler; ///< A function pointer that is called on response reception.
void * mResponseContext; ///< A pointer to arbitrary context information.
- uint32_t mNextTimerShot; ///< Time when the timer should shoot for this message.
+ TimeMilli mNextTimerShot; ///< Time when the timer should shoot for this message.
uint32_t mRetransmissionTimeout; ///< Delay that is applied to next retransmission.
uint8_t mRetransmissionCount; ///< Number of retransmissions.
bool mAcknowledged : 1; ///< Information that request was acknowledged.
bool mConfirmable : 1; ///< Information that message is confirmable.
-} OT_TOOL_PACKED_END;
+};
/**
* This class implements CoAP resource handling.
*
*/
-class Resource : public otCoapResource
+class Resource : public otCoapResource, public LinkedListEntry<Resource>
{
friend class CoapBase;
@@ -222,17 +202,9 @@
}
/**
- * This method returns a pointer to the next resource.
- *
- * @returns A Pointer to the next resource.
- *
- */
- Resource *GetNext(void) const { return static_cast<Resource *>(mNext); }
-
- /**
* This method returns a pointer to the Uri-Path.
*
- * @returns A Pointer to the Uri-Path.
+ * @returns A pointer to the Uri-Path.
*
*/
const char *GetUriPath(void) const { return mUriPath; }
@@ -250,6 +222,8 @@
*/
class EnqueuedResponseHeader
{
+ friend class ResponsesQueue;
+
public:
/**
* Default constructor creating empty object.
@@ -268,13 +242,13 @@
*
*/
explicit EnqueuedResponseHeader(const Ip6::MessageInfo &aMessageInfo)
- : mDequeueTime(TimerMilli::GetNow() + TimerMilli::SecToMsec(kExchangeLifetime))
+ : mDequeueTime(TimerMilli::GetNow() + Time::SecToMsec(kExchangeLifetime))
, mMessageInfo(aMessageInfo)
{
}
/**
- * This method append metadata to the message.
+ * This method appends metadata to the message.
*
* @param[in] aMessage A reference to the message.
*
@@ -297,17 +271,6 @@
}
/**
- * This method checks if the message shall be sent before the given time.
- *
- * @param[in] aTime A time to compare.
- *
- * @retval TRUE If the message shall be sent before the given time.
- * @retval FALSE Otherwise.
- *
- */
- bool IsEarlier(uint32_t aTime) const { return (static_cast<int32_t>(aTime - mDequeueTime) >= 0); }
-
- /**
* This method returns number of milliseconds in which the message should be sent.
*
* @returns The number of milliseconds in which the message should be sent.
@@ -324,7 +287,7 @@
const Ip6::MessageInfo &GetMessageInfo(void) const { return mMessageInfo; }
private:
- uint32_t mDequeueTime;
+ TimeMilli mDequeueTime;
const Ip6::MessageInfo mMessageInfo;
};
@@ -344,10 +307,11 @@
explicit ResponsesQueue(Instance &aInstance);
/**
- * Add given response to the cache.
+ * This method adds a given response to the cache.
*
* If matching response (the same Message ID, source endpoint address and port) exists in the cache given
* response is not added.
+ *
* The CoAP response is copied before it is added to the cache.
*
* @param[in] aMessage The CoAP response to add to the cache.
@@ -357,23 +321,23 @@
void EnqueueResponse(Message &aMessage, const Ip6::MessageInfo &aMessageInfo);
/**
- * Remove the oldest response from the cache.
+ * This method removes the oldest response from the cache.
*
*/
void DequeueOldestResponse(void);
/**
- * Remove all responses from the cache.
+ * This method removes all responses from the cache.
*
*/
void DequeueAllResponses(void);
/**
- * Get a copy of CoAP response from the cache that matches given Message ID and source endpoint.
+ * This method gets a copy of CoAP response from the cache that matches a given Message ID and source endpoint.
*
* @param[in] aRequest The CoAP message containing Message ID.
* @param[in] aMessageInfo The message info containing source endpoint address and port.
- * @param[out] aResponse A pointer to a copy of a cached CoAP response matching given arguments.
+ * @param[out] aResponse A pointer to return a copy of a cached CoAP response matching given arguments.
*
* @retval OT_ERROR_NONE Matching response found and successfully created a copy.
* @retval OT_ERROR_NO_BUFS Matching response found but there is not sufficient buffer to create a copy.
@@ -383,7 +347,7 @@
otError GetMatchedResponseCopy(const Message &aRequest, const Ip6::MessageInfo &aMessageInfo, Message **aResponse);
/**
- * Get a reference to the cached CoAP responses queue.
+ * This method gets a reference to the cached CoAP responses queue.
*
* @returns A reference to the cached CoAP responses queue.
*
@@ -396,6 +360,18 @@
kMaxCachedResponses = OPENTHREAD_CONFIG_COAP_SERVER_MAX_CACHED_RESPONSES,
};
+ /**
+ * This method checks whether a CoAP response exists in the cache that matches a given Message ID and source
+ * endpoint.
+ *
+ * @param[in] aRequest The CoAP message containing Message ID.
+ * @param[in] aMessageInfo The message info containing source endpoint address and port.
+ *
+ * @returns A pointer to the matching cached response or NULL if not found.
+ *
+ */
+ const Message *FindMatchedResponse(const Message &aRequest, const Ip6::MessageInfo &aMessageInfo) const;
+
void DequeueResponse(Message &aMessage)
{
mQueue.Dequeue(aMessage);
@@ -432,7 +408,7 @@
typedef otError (*Sender)(CoapBase &aCoapBase, ot::Message &aMessage, const Ip6::MessageInfo &aMessageInfo);
/**
- * This function pointer is called before CoAP server processing a CoAP packets.
+ * This function pointer is called before CoAP server processing a CoAP message.
*
* @param[in] aMessage A reference to the message.
@ @param[in] aMessageInfo A reference to the message info associated with @p aMessage.
@@ -471,10 +447,11 @@
*/
void RemoveResource(Resource &aResource);
- /* This function sets the default handler for unhandled CoAP requests.
+ /* This method sets the default handler for unhandled CoAP requests.
*
* @param[in] aHandler A function pointer that shall be called when an unhandled request arrives.
* @param[in] aContext A pointer to arbitrary context information. May be NULL if not used.
+ *
*/
void SetDefaultHandler(otCoapRequestHandler aHandler, void *aContext);
@@ -640,7 +617,7 @@
*
* @param[in] aInstance A reference to the OpenThread instance.
* @param[in] aSender A function pointer to send CoAP message, which SHOULD be a static
- * member method of a descendent of this class.
+ * member method of a descendant of this class.
*
*/
explicit CoapBase(Instance &aInstance, Sender aSender);
@@ -694,7 +671,7 @@
uint16_t mMessageId;
TimerMilliContext mRetransmissionTimer;
- Resource *mResources;
+ LinkedList<Resource> mResources;
void * mContext;
Interceptor mInterceptor;
diff --git a/src/core/coap/coap_message.cpp b/src/core/coap/coap_message.cpp
index c8c3366..c1a54ea 100644
--- a/src/core/coap/coap_message.cpp
+++ b/src/core/coap/coap_message.cpp
@@ -45,7 +45,7 @@
void Message::Init(void)
{
- memset(&GetHelpData(), 0, sizeof(GetHelpData()));
+ GetHelpData().Clear();
SetVersion(kVersion1);
SetOffset(0);
GetHelpData().mHeaderLength = kMinHeaderLength;
@@ -207,121 +207,6 @@
return AppendStringOption(OT_COAP_OPTION_URI_QUERY, aUriQuery);
}
-const otCoapOption *Message::GetFirstOption(void)
-{
- const otCoapOption *option = NULL;
-
- memset(&GetHelpData().mOption, 0, sizeof(GetHelpData().mOption));
-
- VerifyOrExit(GetLength() - GetHelpData().mHeaderOffset >= GetOptionStart());
-
- GetHelpData().mNextOptionOffset = GetHelpData().mHeaderOffset + GetOptionStart();
-
- if (GetHelpData().mNextOptionOffset < GetLength())
- {
- option = GetNextOption();
- }
-
-exit:
- return option;
-}
-
-const otCoapOption *Message::GetNextOption(void)
-{
- otError error = OT_ERROR_NONE;
- uint16_t optionDelta;
- uint16_t optionLength;
- uint8_t buf[kMaxOptionHeaderSize];
- uint8_t * cur = buf + 1;
- otCoapOption *rval = NULL;
-
- VerifyOrExit(GetHelpData().mNextOptionOffset < GetLength(), error = OT_ERROR_NOT_FOUND);
-
- Read(GetHelpData().mNextOptionOffset, sizeof(buf), buf);
-
- optionDelta = buf[0] >> 4;
- optionLength = buf[0] & 0xf;
- GetHelpData().mNextOptionOffset += sizeof(uint8_t);
-
- if (optionDelta < kOption1ByteExtension)
- {
- // do nothing
- }
- else if (optionDelta == kOption1ByteExtension)
- {
- optionDelta = kOption1ByteExtensionOffset + cur[0];
- GetHelpData().mNextOptionOffset += sizeof(uint8_t);
- cur++;
- }
- else if (optionDelta == kOption2ByteExtension)
- {
- optionDelta = kOption2ByteExtensionOffset + static_cast<uint16_t>((cur[0] << 8) | cur[1]);
- GetHelpData().mNextOptionOffset += sizeof(uint16_t);
- cur += 2;
- }
- else
- {
- // RFC7252 (Section 3):
- // Reserved for payload marker.
- VerifyOrExit(optionLength == 0xf, error = OT_ERROR_PARSE);
-
- // The presence of a marker followed by a zero-length payload MUST be processed
- // as a message format error.
- VerifyOrExit(GetHelpData().mNextOptionOffset < GetLength(), error = OT_ERROR_PARSE);
-
- ExitNow(error = OT_ERROR_NOT_FOUND);
- }
-
- if (optionLength < kOption1ByteExtension)
- {
- // do nothing
- }
- else if (optionLength == kOption1ByteExtension)
- {
- optionLength = kOption1ByteExtensionOffset + cur[0];
- GetHelpData().mNextOptionOffset += sizeof(uint8_t);
- }
- else if (optionLength == kOption2ByteExtension)
- {
- optionLength = kOption2ByteExtensionOffset + static_cast<uint16_t>((cur[0] << 8) | cur[1]);
- GetHelpData().mNextOptionOffset += sizeof(uint16_t);
- }
- else
- {
- ExitNow(error = OT_ERROR_PARSE);
- }
-
- VerifyOrExit(optionLength <= GetLength() - GetHelpData().mNextOptionOffset, error = OT_ERROR_PARSE);
-
- rval = &GetHelpData().mOption;
- rval->mNumber += optionDelta;
- rval->mLength = optionLength;
-
- GetHelpData().mNextOptionOffset += optionLength;
-
-exit:
- if (error == OT_ERROR_PARSE)
- {
- GetHelpData().mNextOptionOffset = 0;
- }
-
- return rval;
-}
-
-otError Message::GetOptionValue(void *aValue) const
-{
- otError error = OT_ERROR_NONE;
- const otCoapOption &option = GetHelpData().mOption;
-
- VerifyOrExit(GetHelpData().mNextOptionOffset > 0, error = OT_ERROR_NOT_FOUND);
-
- VerifyOrExit(Read(GetHelpData().mNextOptionOffset - option.mLength, option.mLength, aValue) == option.mLength,
- error = OT_ERROR_PARSE);
-
-exit:
- return error;
-}
-
otError Message::SetPayloadMarker(void)
{
otError error = OT_ERROR_NONE;
@@ -340,23 +225,25 @@
otError Message::ParseHeader(void)
{
- otError error = OT_ERROR_NONE;
+ otError error = OT_ERROR_NONE;
+ OptionIterator iterator;
assert(mBuffer.mHead.mInfo.mReserved >=
sizeof(GetHelpData()) +
static_cast<size_t>((reinterpret_cast<uint8_t *>(&GetHelpData()) - mBuffer.mHead.mData)));
- memset(&GetHelpData(), 0, sizeof(GetHelpData()));
+ GetHelpData().Clear();
GetHelpData().mHeaderOffset = GetOffset();
Read(GetHelpData().mHeaderOffset, sizeof(GetHelpData().mHeader), &GetHelpData().mHeader);
- for (const otCoapOption *option = GetFirstOption(); option != NULL; option = GetNextOption())
+ SuccessOrExit(error = iterator.Init(this));
+ for (const otCoapOption *option = iterator.GetFirstOption(); option != NULL; option = iterator.GetNextOption())
{
}
- VerifyOrExit(GetHelpData().mNextOptionOffset > 0, error = OT_ERROR_PARSE);
- GetHelpData().mHeaderLength = GetHelpData().mNextOptionOffset - GetHelpData().mHeaderOffset;
+ VerifyOrExit(iterator.mNextOptionOffset > 0, error = OT_ERROR_PARSE);
+ GetHelpData().mHeaderLength = iterator.mNextOptionOffset - GetHelpData().mHeaderOffset;
MoveOffset(GetHelpData().mHeaderLength);
exit:
@@ -502,5 +389,141 @@
}
#endif // OPENTHREAD_CONFIG_COAP_API_ENABLE
+otError OptionIterator::Init(const Message *aMessage)
+{
+ otError err = OT_ERROR_NONE;
+
+ /*
+ * Check that:
+ * Length - Offset: the length of the payload
+ * is greater than:
+ * Start position of options
+ *
+ * → Check options start before the message ends, or bail ::Init with
+ * OT_ERROR_PARSE as the reason.
+ */
+ VerifyOrExit(aMessage->GetLength() - aMessage->GetHelpData().mHeaderOffset >= aMessage->GetOptionStart(),
+ err = OT_ERROR_PARSE);
+
+ mMessage = aMessage;
+ GetFirstOption();
+
+exit:
+ return err;
+}
+
+const otCoapOption *OptionIterator::GetFirstOption(void)
+{
+ const otCoapOption *option = NULL;
+ const Message & message = GetMessage();
+
+ ClearOption();
+
+ mNextOptionOffset = message.GetHelpData().mHeaderOffset + message.GetOptionStart();
+
+ if (mNextOptionOffset < message.GetLength())
+ {
+ option = GetNextOption();
+ }
+
+ return option;
+}
+
+const otCoapOption *OptionIterator::GetNextOption(void)
+{
+ otError error = OT_ERROR_NONE;
+ uint16_t optionDelta;
+ uint16_t optionLength;
+ uint8_t buf[Message::kMaxOptionHeaderSize];
+ uint8_t * cur = buf + 1;
+ otCoapOption * rval = NULL;
+ const Message &message = GetMessage();
+
+ VerifyOrExit(mNextOptionOffset < message.GetLength(), error = OT_ERROR_NOT_FOUND);
+
+ message.Read(mNextOptionOffset, sizeof(buf), buf);
+
+ optionDelta = buf[0] >> 4;
+ optionLength = buf[0] & 0xf;
+ mNextOptionOffset += sizeof(uint8_t);
+
+ if (optionDelta < Message::kOption1ByteExtension)
+ {
+ // do nothing
+ }
+ else if (optionDelta == Message::kOption1ByteExtension)
+ {
+ optionDelta = Message::kOption1ByteExtensionOffset + cur[0];
+ mNextOptionOffset += sizeof(uint8_t);
+ cur++;
+ }
+ else if (optionDelta == Message::kOption2ByteExtension)
+ {
+ optionDelta = Message::kOption2ByteExtensionOffset + static_cast<uint16_t>((cur[0] << 8) | cur[1]);
+ mNextOptionOffset += sizeof(uint16_t);
+ cur += 2;
+ }
+ else
+ {
+ // RFC7252 (Section 3):
+ // Reserved for payload marker.
+ VerifyOrExit(optionLength == 0xf, error = OT_ERROR_PARSE);
+
+ // The presence of a marker followed by a zero-length payload MUST be processed
+ // as a message format error.
+ VerifyOrExit(mNextOptionOffset < message.GetLength(), error = OT_ERROR_PARSE);
+
+ ExitNow(error = OT_ERROR_NOT_FOUND);
+ }
+
+ if (optionLength < Message::kOption1ByteExtension)
+ {
+ // do nothing
+ }
+ else if (optionLength == Message::kOption1ByteExtension)
+ {
+ optionLength = Message::kOption1ByteExtensionOffset + cur[0];
+ mNextOptionOffset += sizeof(uint8_t);
+ }
+ else if (optionLength == Message::kOption2ByteExtension)
+ {
+ optionLength = Message::kOption2ByteExtensionOffset + static_cast<uint16_t>((cur[0] << 8) | cur[1]);
+ mNextOptionOffset += sizeof(uint16_t);
+ }
+ else
+ {
+ ExitNow(error = OT_ERROR_PARSE);
+ }
+
+ VerifyOrExit(optionLength <= message.GetLength() - mNextOptionOffset, error = OT_ERROR_PARSE);
+
+ rval = &mOption;
+ rval->mNumber += optionDelta;
+ rval->mLength = optionLength;
+
+ mNextOptionOffset += optionLength;
+
+exit:
+ if (error == OT_ERROR_PARSE)
+ {
+ mNextOptionOffset = 0;
+ }
+
+ return rval;
+}
+
+otError OptionIterator::GetOptionValue(void *aValue) const
+{
+ otError error = OT_ERROR_NONE;
+
+ VerifyOrExit(mNextOptionOffset > 0, error = OT_ERROR_NOT_FOUND);
+
+ VerifyOrExit(GetMessage().Read(mNextOptionOffset - mOption.mLength, mOption.mLength, aValue) == mOption.mLength,
+ error = OT_ERROR_PARSE);
+
+exit:
+ return error;
+}
+
} // namespace Coap
} // namespace ot
diff --git a/src/core/coap/coap_message.hpp b/src/core/coap/coap_message.hpp
index d045d2f..f343100 100644
--- a/src/core/coap/coap_message.hpp
+++ b/src/core/coap/coap_message.hpp
@@ -36,8 +36,6 @@
#include "openthread-core-config.h"
-#include "utils/wrap_string.h"
-
#include <openthread/coap.h>
#include "common/code_utils.hpp"
@@ -67,12 +65,16 @@
*
*/
+class OptionIterator;
+
/**
* This class implements CoAP message generation and parsing.
*
*/
class Message : public ot::Message
{
+ friend class OptionIterator;
+
public:
enum
{
@@ -80,7 +82,7 @@
kMinHeaderLength = 4, ///< Minimum header length
kMaxHeaderLength = 512, ///< Maximum header length
kDefaultTokenLength = 2, ///< Default token length
- kTypeOffset = 4, ///< The type offset in the first byte of a coap header
+ kTypeOffset = 4, ///< The type offset in the first byte of a CoAP header
};
/**
@@ -257,9 +259,9 @@
otError SetToken(uint8_t aTokenLength);
/**
- * This method checks if Tokens in two CoAP headers are equal.
+ * This method checks if Tokens in two CoAP headers are equal.
*
- * @param[in] aMessage A header to compare.
+ * @param[in] aMessage A header to compare.
*
* @retval TRUE If two Tokens are equal.
* @retval FALSE If Tokens differ in length or value.
@@ -380,27 +382,6 @@
otError AppendUriQueryOption(const char *aUriQuery);
/**
- * This method returns a pointer to the first option.
- *
- */
- const otCoapOption *GetFirstOption(void);
-
- /**
- * This method returns a pointer to the next option.
- *
- */
- const otCoapOption *GetNextOption(void);
-
- /**
- * This function fills current option value into @p aValue.
- *
- * @retval OT_ERROR_NONE Successfully filled value.
- * @retval OT_ERROR_NOT_FOUND No more options, aIterator->mNextOptionOffset is set to offset of payload.
- *
- */
- otError GetOptionValue(void *aValue) const;
-
- /**
* This method adds Payload Marker indicating beginning of the payload to the CoAP header.
*
* It also set offset to the start of payload.
@@ -585,12 +566,12 @@
*/
struct HelpData
{
- Header mHeader;
- otCoapOption mOption;
- uint16_t mNextOptionOffset; ///< The byte offset for the next CoAP Option
- uint16_t mOptionLast;
- uint16_t mHeaderOffset; ///< The byte offset for the CoAP Header
- uint16_t mHeaderLength;
+ void Clear(void) { memset(this, 0, sizeof(*this)); }
+
+ Header mHeader;
+ uint16_t mOptionLast;
+ uint16_t mHeaderOffset; ///< The byte offset for the CoAP Header
+ uint16_t mHeaderLength;
};
const HelpData &GetHelpData(void) const
@@ -598,12 +579,52 @@
OT_STATIC_ASSERT(sizeof(mBuffer.mHead.mInfo) + sizeof(HelpData) + kHelpDataAlignment <= sizeof(mBuffer),
"Insufficient buffer size for CoAP processing!");
- return *static_cast<const HelpData *>(otALIGN(mBuffer.mHead.mData, kHelpDataAlignment));
+ return *static_cast<const HelpData *>(OT_ALIGN(mBuffer.mHead.mData, kHelpDataAlignment));
}
HelpData &GetHelpData(void) { return const_cast<HelpData &>(static_cast<const Message *>(this)->GetHelpData()); }
};
+class OptionIterator : public ::otCoapOptionIterator
+{
+public:
+ /**
+ * Initialise the state of the iterator to iterate over the given message.
+ *
+ * @retval OT_ERROR_NONE Successfully initialised
+ * @retval OT_ERROR_PARSE Message state is inconsistent
+ *
+ */
+ otError Init(const Message *aMessage);
+
+ /**
+ * This method returns a pointer to the first option.
+ *
+ * @returns A pointer to the first option. If no option is present NULL pointer is returned.
+ */
+ const otCoapOption *GetFirstOption(void);
+
+ /**
+ * This method returns a pointer to the next option.
+ *
+ * @returns A pointer to the next option. If no more options are present NULL pointer is returned.
+ */
+ const otCoapOption *GetNextOption(void);
+
+ /**
+ * This function fills current option value into @p aValue.
+ *
+ * @retval OT_ERROR_NONE Successfully filled value.
+ * @retval OT_ERROR_NOT_FOUND No more options, mNextOptionOffset is set to offset of payload.
+ *
+ */
+ otError GetOptionValue(void *aValue) const;
+
+private:
+ void ClearOption(void) { memset(&mOption, 0, sizeof(mOption)); }
+ const Message &GetMessage(void) const { return *static_cast<const Message *>(mMessage); }
+};
+
/**
* @}
*
diff --git a/src/core/coap/coap_secure.cpp b/src/core/coap/coap_secure.cpp
index 9901dce..ffdec6c 100644
--- a/src/core/coap/coap_secure.cpp
+++ b/src/core/coap/coap_secure.cpp
@@ -118,30 +118,20 @@
#if OPENTHREAD_CONFIG_COAP_SECURE_API_ENABLE
#ifdef MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
-otError CoapSecure::SetCertificate(const uint8_t *aX509Cert,
- uint32_t aX509Length,
- const uint8_t *aPrivateKey,
- uint32_t aPrivateKeyLength)
+void CoapSecure::SetCertificate(const uint8_t *aX509Cert,
+ uint32_t aX509Length,
+ const uint8_t *aPrivateKey,
+ uint32_t aPrivateKeyLength)
{
- return mDtls.SetCertificate(aX509Cert, aX509Length, aPrivateKey, aPrivateKeyLength);
+ mDtls.SetCertificate(aX509Cert, aX509Length, aPrivateKey, aPrivateKeyLength);
}
-otError CoapSecure::SetCaCertificateChain(const uint8_t *aX509CaCertificateChain, uint32_t aX509CaCertChainLength)
+void CoapSecure::SetCaCertificateChain(const uint8_t *aX509CaCertificateChain, uint32_t aX509CaCertChainLength)
{
- return mDtls.SetCaCertificateChain(aX509CaCertificateChain, aX509CaCertChainLength);
+ mDtls.SetCaCertificateChain(aX509CaCertificateChain, aX509CaCertChainLength);
}
#endif // MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
-#ifdef MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
-otError CoapSecure::SetPreSharedKey(const uint8_t *aPsk,
- uint16_t aPskLength,
- const uint8_t *aPskIdentity,
- uint16_t aPskIdLength)
-{
- return mDtls.SetPreSharedKey(aPsk, aPskLength, aPskIdentity, aPskIdLength);
-}
-#endif // MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
-
#ifdef MBEDTLS_BASE64_C
otError CoapSecure::GetPeerCertificateBase64(unsigned char *aPeerCert, size_t *aCertLength, size_t aCertBufferSize)
{
diff --git a/src/core/coap/coap_secure.hpp b/src/core/coap/coap_secure.hpp
index e32ea3c..65f62fc 100644
--- a/src/core/coap/coap_secure.hpp
+++ b/src/core/coap/coap_secure.hpp
@@ -151,7 +151,7 @@
/**
* This method sets the PSK.
*
- * @param[in] aPSK A pointer to the PSK.
+ * @param[in] aPsk A pointer to the PSK.
* @param[in] aPskLength The PSK length.
*
* @retval OT_ERROR_NONE Successfully set the PSK.
@@ -164,8 +164,8 @@
#ifdef MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
/**
- * This method sets the Pre-Shared Key (PSK) for DTLS sessions
- * identified by a PSK.
+ * This method sets the Pre-Shared Key (PSK) for DTLS sessions identified by a PSK.
+ *
* DTLS mode "TLS with AES 128 CCM 8" for Application CoAPS.
*
* @param[in] aPsk A pointer to the PSK.
@@ -173,13 +173,11 @@
* @param[in] aPskIdentity The Identity Name for the PSK.
* @param[in] aPskIdLength The PSK Identity Length.
*
- * @retval OT_ERROR_NONE Successfully set the PSK.
- *
*/
- otError SetPreSharedKey(const uint8_t *aPsk,
- uint16_t aPskLength,
- const uint8_t *aPskIdentity,
- uint16_t aPskIdLength);
+ void SetPreSharedKey(const uint8_t *aPsk, uint16_t aPskLength, const uint8_t *aPskIdentity, uint16_t aPskIdLength)
+ {
+ mDtls.SetPreSharedKey(aPsk, aPskLength, aPskIdentity, aPskIdLength);
+ }
#endif // MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
#ifdef MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
@@ -193,27 +191,22 @@
* @param[in] aPrivateKey A pointer to the PEM formatted private key.
* @param[in] aPrivateKeyLength The length of the private key.
*
- * @retval OT_ERROR_NONE Successfully set the x509 certificate with his private key.
- *
*/
- otError SetCertificate(const uint8_t *aX509Cert,
- uint32_t aX509Length,
- const uint8_t *aPrivateKey,
- uint32_t aPrivateKeyLength);
+ void SetCertificate(const uint8_t *aX509Cert,
+ uint32_t aX509Length,
+ const uint8_t *aPrivateKey,
+ uint32_t aPrivateKeyLength);
/**
- * This method sets the trusted top level CAs. It is needed for validate the
- * certificate of the peer.
+ * This method sets the trusted top level CAs. It is needed for validate the certificate of the peer.
*
* DTLS mode "ECDHE ECDSA with AES 128 CCM 8" for Application CoAPS.
*
* @param[in] aX509CaCertificateChain A pointer to the PEM formatted X509 CA chain.
* @param[in] aX509CaCertChainLength The length of chain.
*
- * @retval OT_ERROR_NONE Successfully set the trusted top level CAs.
- *
*/
- otError SetCaCertificateChain(const uint8_t *aX509CaCertificateChain, uint32_t aX509CaCertChainLength);
+ void SetCaCertificateChain(const uint8_t *aX509CaCertificateChain, uint32_t aX509CaCertChainLength);
#endif // MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
#ifdef MBEDTLS_BASE64_C
@@ -234,21 +227,19 @@
#endif // MBEDTLS_BASE64_C
/**
- * This method sets the connected callback to indicate, when
- * a Client connect to the CoAP Secure server.
+ * This method sets the connected callback to indicate, when a Client connect to the CoAP Secure server.
*
- * @param[in] aCallback A pointer to a function that will be called once DTLS connection is
- * established.
+ * @param[in] aCallback A pointer to a function that will be called once DTLS connection is established.
* @param[in] aContext A pointer to arbitrary context information.
*
*/
void SetClientConnectedCallback(ConnectedCallback aCallback, void *aContext);
/**
- * This method set the authentication mode for the coap secure connection.
- * Disable or enable the verification of peer certificate.
+ * This method sets the authentication mode for the CoAP secure connection. It disables or enables the verification
+ * of peer certificate.
*
- * @param[in] aVerifyPeerCertificate true, if the peer certificate should verify.
+ * @param[in] aVerifyPeerCertificate true, if the peer certificate should be verified
*
*/
void SetSslAuthMode(bool aVerifyPeerCertificate);
@@ -297,7 +288,6 @@
/**
* This method is used to pass UDP messages to the secure CoAP server.
- * It can be used when messages are received other way that via server's socket.
*
* @param[in] aMessage A reference to the received message.
* @param[in] aMessageInfo A reference to the message info associated with @p aMessage.
diff --git a/src/core/common/code_utils.hpp b/src/core/common/code_utils.hpp
index 2c32aca..3589b77 100644
--- a/src/core/common/code_utils.hpp
+++ b/src/core/common/code_utils.hpp
@@ -36,8 +36,9 @@
#include "openthread-core-config.h"
+#include <stdbool.h>
+
#include "utils/static_assert.hpp"
-#include "utils/wrap_stdbool.h"
/**
* This macro calculates the number of elements in an array.
@@ -71,21 +72,21 @@
* @returns The aligned pointer.
*
*/
-#define otALIGN(aPointer, aAlignment) \
+#define OT_ALIGN(aPointer, aAlignment) \
((void *)(((uintptr_t)(aPointer) + (aAlignment)-1UL) & ~((uintptr_t)(aAlignment)-1UL)))
// Calculates the aligned variable size.
-#define otALIGNED_VAR_SIZE(size, align_type) (((size) + (sizeof(align_type) - 1)) / sizeof(align_type))
+#define OT_ALIGNED_VAR_SIZE(size, align_type) (((size) + (sizeof(align_type) - 1)) / sizeof(align_type))
// Allocate the structure using "raw" storage.
-#define otDEFINE_ALIGNED_VAR(name, size, align_type) \
+#define OT_DEFINE_ALIGNED_VAR(name, size, align_type) \
align_type name[(((size) + (sizeof(align_type) - 1)) / sizeof(align_type))]
/**
* This macro checks for the specified status, which is expected to commonly be successful, and branches to the local
* label 'exit' if the status is unsuccessful.
*
- * @param[in] aStatus A scalar status to be evaluated against zero (0).
+ * @param[in] aStatus A scalar status to be evaluated against zero (0).
*
*/
#define SuccessOrExit(aStatus) \
@@ -101,8 +102,8 @@
* This macro checks for the specified condition, which is expected to commonly be true, and both executes @a ... and
* branches to the local label 'exit' if the condition is false.
*
- * @param[in] aCondition A Boolean expression to be evaluated.
- * @param[in] ... An expression or block to execute when the assertion fails.
+ * @param[in] aCondition A Boolean expression to be evaluated.
+ * @param[in] ... An expression or block to execute when the assertion fails.
*
*/
#define VerifyOrExit(aCondition, ...) \
diff --git a/src/core/common/debug.hpp b/src/core/common/debug.hpp
index 3ab0eb2..1c3f3d4 100644
--- a/src/core/common/debug.hpp
+++ b/src/core/common/debug.hpp
@@ -38,7 +38,6 @@
#include <ctype.h>
#include <stdio.h>
-#include "utils/wrap_string.h"
#if defined(OPENTHREAD_TARGET_DARWIN) || defined(OPENTHREAD_TARGET_LINUX)
@@ -56,6 +55,10 @@
#define FILE_NAME __FILE__
#endif
+#ifdef assert
+#undef assert
+#endif
+
#define assert(cond) \
do \
{ \
@@ -70,6 +73,10 @@
#else
+#ifdef assert
+#undef assert
+#endif
+
#define assert(cond) \
do \
{ \
diff --git a/src/core/common/encoding.hpp b/src/core/common/encoding.hpp
index 550246d..0d4ba72 100644
--- a/src/core/common/encoding.hpp
+++ b/src/core/common/encoding.hpp
@@ -36,6 +36,10 @@
#include "openthread-core-config.h"
+#ifndef BYTE_ORDER_BIG_ENDIAN
+#define BYTE_ORDER_BIG_ENDIAN 0
+#endif
+
#include <limits.h>
#include <stdint.h>
diff --git a/src/core/common/extension_example.cpp b/src/core/common/extension_example.cpp
index 82e8bc0..833b0ce 100644
--- a/src/core/common/extension_example.cpp
+++ b/src/core/common/extension_example.cpp
@@ -33,12 +33,12 @@
#include "openthread-core-config.h"
+#include <stdbool.h>
#include <stdint.h>
#include "common/code_utils.hpp"
#include "common/extension.hpp"
#include "common/new.hpp"
-#include "utils/wrap_stdbool.h"
namespace ot {
namespace Extension {
@@ -62,7 +62,7 @@
// `ExtensionBase` API
// ----------------------------------------------------------------------------
-static otDEFINE_ALIGNED_VAR(sExtensionRaw, sizeof(Extension), uint64_t);
+static OT_DEFINE_ALIGNED_VAR(sExtensionRaw, sizeof(Extension), uint64_t);
ExtensionBase &ExtensionBase::Init(Instance &aInstance)
{
diff --git a/src/core/common/instance.cpp b/src/core/common/instance.cpp
index ed9448d..90e9b9d 100644
--- a/src/core/common/instance.cpp
+++ b/src/core/common/instance.cpp
@@ -44,7 +44,7 @@
#if !OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE
// Define the raw storage used for OpenThread instance (in single-instance case).
-otDEFINE_ALIGNED_VAR(gInstanceRaw, sizeof(Instance), uint64_t);
+OT_DEFINE_ALIGNED_VAR(gInstanceRaw, sizeof(Instance), uint64_t);
#endif
@@ -77,10 +77,6 @@
, mNotifier(*this)
, mSettings(*this)
, mMessagePool(*this)
- , mActiveScanCallback(NULL)
- , mActiveScanCallbackContext(NULL)
- , mEnergyScanCallback(NULL)
- , mEnergyScanCallbackContext(NULL)
, mIp6(*this)
, mThreadNetif(*this)
#if OPENTHREAD_CONFIG_COAP_API_ENABLE
@@ -102,8 +98,8 @@
#if OPENTHREAD_RADIO || OPENTHREAD_CONFIG_LINK_RAW_ENABLE
, mLinkRaw(*this)
#endif
-#if OPENTHREAD_CONFIG_ENABLE_DYNAMIC_LOG_LEVEL
- , mLogLevel(static_cast<otLogLevel>(OPENTHREAD_CONFIG_INITIAL_LOG_LEVEL))
+#if OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE
+ , mLogLevel(static_cast<otLogLevel>(OPENTHREAD_CONFIG_LOG_LEVEL_INIT))
#endif
#if OPENTHREAD_ENABLE_VENDOR_EXTENSION
, mExtension(Extension::ExtensionBase::Init(*this))
@@ -229,33 +225,6 @@
return error;
}
-void Instance::RegisterActiveScanCallback(otHandleActiveScanResult aCallback, void *aContext)
-{
- mActiveScanCallback = aCallback;
- mActiveScanCallbackContext = aContext;
-}
-
-void Instance::InvokeActiveScanCallback(otActiveScanResult *aResult) const
-{
- if (mActiveScanCallback != NULL)
- {
- mActiveScanCallback(aResult, mActiveScanCallbackContext);
- }
-}
-
-void Instance::RegisterEnergyScanCallback(otHandleEnergyScanResult aCallback, void *aContext)
-{
- mEnergyScanCallback = aCallback;
- mEnergyScanCallbackContext = aContext;
-}
-
-void Instance::InvokeEnergyScanCallback(otEnergyScanResult *aResult) const
-{
- if (mEnergyScanCallback != NULL)
- {
- mEnergyScanCallback(aResult, mEnergyScanCallbackContext);
- }
-}
#endif // OPENTHREAD_MTD || OPENTHREAD_FTD
} // namespace ot
diff --git a/src/core/common/instance.hpp b/src/core/common/instance.hpp
index b522004..735eddd 100644
--- a/src/core/common/instance.hpp
+++ b/src/core/common/instance.hpp
@@ -36,16 +36,18 @@
#include "openthread-core-config.h"
+#include <stdbool.h>
#include <stdint.h>
-#include "utils/wrap_stdbool.h"
-
#include <openthread/error.h>
#include <openthread/heap.h>
#include <openthread/platform/logging.h>
#include "common/random_manager.hpp"
+#include "common/tasklet.hpp"
+#include "common/timer.hpp"
#include "diags/factory_diags.hpp"
+#include "radio/radio.hpp"
#if OPENTHREAD_RADIO || OPENTHREAD_CONFIG_LINK_RAW_ENABLE
#include "common/message.hpp"
@@ -166,7 +168,7 @@
*
*/
otLogLevel GetLogLevel(void) const
-#if OPENTHREAD_CONFIG_ENABLE_DYNAMIC_LOG_LEVEL
+#if OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE
{
return mLogLevel;
}
@@ -176,7 +178,7 @@
}
#endif
-#if OPENTHREAD_CONFIG_ENABLE_DYNAMIC_LOG_LEVEL
+#if OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE
/**
* This method sets the log level.
*
@@ -212,44 +214,6 @@
*/
otError ErasePersistentInfo(void);
- /**
- * This method registers the active scan callback.
- *
- * Subsequent calls to this method will overwrite the previous callback handler.
- *
- * @param[in] aCallback A pointer to the callback function pointer.
- * @param[in] aContext A pointer to application-specific context.
- *
- */
- void RegisterActiveScanCallback(otHandleActiveScanResult aCallback, void *aContext);
-
- /**
- * This method invokes the previously registered active scan callback with a given scan result.
- *
- * @param[in] aResult A pointer to active scan result.
- *
- */
- void InvokeActiveScanCallback(otActiveScanResult *aResult) const;
-
- /**
- * This method registers the energy scan callback.
- *
- * Subsequent calls to this method will overwrite the previous callback handler.
- *
- * @param[in] aCallback A pointer to the callback function pointer.
- * @param[in] aContext A pointer to application-specific context.
- *
- */
- void RegisterEnergyScanCallback(otHandleEnergyScanResult aCallback, void *aContext);
-
- /**
- * This method invokes the previously registered energy scan callback with a given result.
- *
- * @param[in] aResult A pointer to energy scan result.
- *
- */
- void InvokeEnergyScanCallback(otEnergyScanResult *aResult) const;
-
#if OPENTHREAD_CONFIG_HEAP_EXTERNAL_ENABLE
void HeapFree(void *aPointer)
{
@@ -273,6 +237,7 @@
#elif !OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE
void HeapFree(void *aPointer) { mHeap.Free(aPointer); }
void *HeapCAlloc(size_t aCount, size_t aSize) { return mHeap.CAlloc(aCount, aSize); }
+
/**
* This method returns a reference to the Heap object.
*
@@ -362,11 +327,6 @@
Settings mSettings;
MessagePool mMessagePool;
- otHandleActiveScanResult mActiveScanCallback;
- void * mActiveScanCallbackContext;
- otHandleEnergyScanResult mEnergyScanCallback;
- void * mEnergyScanCallbackContext;
-
Ip6::Ip6 mIp6;
ThreadNetif mThreadNetif;
@@ -395,7 +355,7 @@
Mac::LinkRaw mLinkRaw;
#endif // OPENTHREAD_RADIO || OPENTHREAD_CONFIG_LINK_RAW_ENABLE
-#if OPENTHREAD_CONFIG_ENABLE_DYNAMIC_LOG_LEVEL
+#if OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE
otLogLevel mLogLevel;
#endif
#if OPENTHREAD_ENABLE_VENDOR_EXTENSION
diff --git a/src/core/common/linked_list.hpp b/src/core/common/linked_list.hpp
new file mode 100644
index 0000000..2f65044
--- /dev/null
+++ b/src/core/common/linked_list.hpp
@@ -0,0 +1,383 @@
+/*
+ * Copyright (c) 2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file includes definitions for a generic singly linked list.
+ */
+
+#ifndef LINKED_LIST_HPP_
+#define LINKED_LIST_HPP_
+
+#include "openthread-core-config.h"
+
+#include <stdio.h>
+#include <openthread/error.h>
+
+namespace ot {
+
+/**
+ * @addtogroup core-linked-list
+ *
+ * @brief
+ * This module includes definitions for OpenThread Singly Linked List.
+ *
+ * @{
+ *
+ */
+
+/**
+ * This template class represents a linked list entry.
+ *
+ * This class provides methods to `GetNext()` and `SetNext()` in the linked list entry.
+ *
+ * Users of this class should follow CRTP-style inheritance, i.e., the `Type` class itself should publicly inherit
+ * from `LinkedListEntry<Type>`.
+ *
+ * The template type `Type` should contain a `mNext` member variable. The `mNext` should be of a type that can be
+ * down-casted to `Type` itself.
+ *
+ */
+template <class Type> class LinkedListEntry
+{
+public:
+ /**
+ * This method gets the next entry in the linked list.
+ *
+ * @returns A pointer to the next entry in the linked list or NULL if at the end of the list.
+ *
+ */
+ const Type *GetNext(void) const { return static_cast<const Type *>(static_cast<const Type *>(this)->mNext); }
+
+ /**
+ * This method gets the next entry in the linked list.
+ *
+ * @returns A pointer to the next entry in the linked list or NULL if at the end of the list.
+ *
+ */
+ Type *GetNext(void) { return static_cast<Type *>(static_cast<Type *>(this)->mNext); }
+
+ /**
+ * This method sets the next pointer on the entry.
+ *
+ * @param[in] aNext A pointer to the next entry.
+ *
+ */
+ void SetNext(Type *aNext) { static_cast<Type *>(this)->mNext = aNext; }
+};
+
+/**
+ * This template class represents a singly linked list.
+ *
+ * The template type `Type` should provide `GetNext()` and `SetNext()` methods (which can be realized by `Type`
+ * inheriting from `LinkedListEntry<Type>` class).
+ *
+ */
+template <typename Type> class LinkedList
+{
+public:
+ /**
+ * This constructor initializes the linked list.
+ *
+ */
+ LinkedList(void)
+ : mHead(NULL)
+ {
+ }
+
+ /**
+ * This method returns the entry at the head of the linked list
+ *
+ * @returns Pointer to the entry at the head of the linked list, or NULL if list is empty.
+ *
+ */
+ Type *GetHead(void) { return mHead; }
+
+ /**
+ * This method returns the entry at the head of the linked list.
+ *
+ * @returns Pointer to the entry at the head of the linked list, or NULL if list is empty.
+ *
+ */
+ const Type *GetHead(void) const { return mHead; }
+
+ /**
+ * This method sets the head of the linked list to a given entry.
+ *
+ * @param[in] aHead A pointer to an entry to set as the head of the linked list.
+ *
+ */
+ void SetHead(Type *aHead) { mHead = aHead; }
+
+ /**
+ * This method clears the linked list.
+ *
+ */
+ void Clear(void) { mHead = NULL; }
+
+ /**
+ * This method indicates whether the linked list is empty or not.
+ *
+ * @retval TRUE If the linked list is empty.
+ * @retval FALSE If the linked list is not empty.
+ *
+ */
+ bool IsEmpty(void) const { return (mHead == NULL); }
+
+ /**
+ * This method pushes an entry at the head of the linked list.
+ *
+ * @param[in] aEntry A reference to an entry to push at the head of linked list.
+ *
+ */
+ void Push(Type &aEntry)
+ {
+ aEntry.SetNext(mHead);
+ mHead = &aEntry;
+ }
+
+ /**
+ * This method pushes an entry after a given previous existing entry in the linked list.
+ *
+ * @param[in] aEntry A reference to an entry to push into the list.
+ * @param[in] aPrevEntry A reference to a previous entry (new entry @p aEntry will be pushed after this).
+ *
+ */
+ void PushAfter(Type &aEntry, Type &aPrevEntry)
+ {
+ aEntry.SetNext(aPrevEntry.GetNext());
+ aPrevEntry.SetNext(&aEntry);
+ }
+
+ /**
+ * This method pops an entry from head of the linked list.
+ *
+ * @note This method does not change the popped entry itself, i.e., the popped entry next pointer stays as before.
+ *
+ * @returns The entry that was popped if list is not empty, or NULL if list is empty.
+ *
+ */
+ Type *Pop(void)
+ {
+ Type *entry = mHead;
+
+ if (mHead != NULL)
+ {
+ mHead = mHead->GetNext();
+ }
+
+ return entry;
+ }
+
+ /**
+ * This method pops an entry after a given previous entry.
+ *
+ * @note This method does not change the popped entry itself, i.e., the popped entry next pointer stays as before.
+ *
+ * @param[in] aPrevEntry A reference to n previous entry (the entry after this will be popped).
+
+ * @returns The entry that was popped if list is not empty, or NULL if there is no entry after the given one.
+ *
+ */
+ Type *PopAfter(Type &aPrevEntry)
+ {
+ Type *entry = aPrevEntry.GetNext();
+
+ if (entry != NULL)
+ {
+ aPrevEntry.SetNext(entry->GetNext());
+ }
+
+ return entry;
+ }
+
+ /**
+ * This method indicates whether the linked list contains a given entry.
+ *
+ * @param[in] aEntry A reference to an entry.
+ *
+ * @retval TRUE The linked list contains @p aEntry.
+ * @retval FALSE The linked list does not contain @p aEntry.
+ *
+ */
+ bool Contains(Type &aEntry) const
+ {
+ bool contains = false;
+
+ for (Type *cur = mHead; cur != NULL; cur = cur->GetNext())
+ {
+ if (cur == &aEntry)
+ {
+ contains = true;
+ break;
+ }
+ }
+
+ return contains;
+ }
+
+ /**
+ * This method adds an entry (at the head of the linked list) if it is not already in the list.
+ *
+ * @param[in] aEntry A reference to an entry to add.
+ *
+ * @retval OT_ERROR_NONE The entry was successfully added at the head of the list.
+ * @retval OT_ERROR_ALREADY The entry is already in the list.
+ *
+ */
+ otError Add(Type &aEntry)
+ {
+ otError error = OT_ERROR_NONE;
+
+ if (Contains(aEntry))
+ {
+ error = OT_ERROR_ALREADY;
+ }
+ else
+ {
+ Push(aEntry);
+ }
+
+ return error;
+ }
+
+ /**
+ * This method removes an entry from the linked list.
+ *
+ * @note This method does not change the removed entry @p aEntry itself (it is `const`), i.e., the entry next
+ * pointer of @p aEntry stays as before.
+ *
+ * @param[in] aEntry A reference to an entry to remove.
+ *
+ * @retval OT_ERROR_NONE The entry was successfully removed from the list.
+ * @retval OT_ERROR_NOT_FOUND Could not find the entry in the list.
+ *
+ */
+ otError Remove(const Type &aEntry)
+ {
+ otError error = OT_ERROR_NOT_FOUND;
+
+ if (mHead == &aEntry)
+ {
+ Pop();
+ error = OT_ERROR_NONE;
+ }
+ else if (mHead != NULL)
+ {
+ for (Type *cur = mHead; cur->GetNext() != NULL; cur = cur->GetNext())
+ {
+ if (cur->GetNext() == &aEntry)
+ {
+ cur->SetNext(cur->GetNext()->GetNext());
+ error = OT_ERROR_NONE;
+ break;
+ }
+ }
+ }
+
+ return error;
+ }
+
+ /**
+ * This method searches within the linked list to find an entry and if found returns a pointer to previous entry.
+ *
+ * @param[in] aEntry A reference to an entry to find.
+ * @param[out] aPrevEntry A pointer to output previous entry on success (when @p aEntry is found is the list).
+ * @p aPrevEntry is set to NULL if the @p aEntry is head of the list. Otherwise it
+ * is updated to point to previous entry before @p aEntry in the list.
+ *
+ * @retval OT_ERROR_NONE The entry was found in the list and @p aPrevEntry was updated successfully.
+ * @retval OT_ERROR_NOT_FOUND The entry was not found in the list.
+ *
+ */
+ otError Find(const Type &aEntry, Type *&aPrevEntry) const
+ {
+ otError error = OT_ERROR_NOT_FOUND;
+
+ if (mHead == &aEntry)
+ {
+ aPrevEntry = NULL;
+ error = OT_ERROR_NONE;
+ }
+ else
+ {
+ for (Type *cur = mHead; cur->GetNext() != NULL; cur = cur->GetNext())
+ {
+ if (cur->GetNext() == &aEntry)
+ {
+ aPrevEntry = cur;
+ error = OT_ERROR_NONE;
+ break;
+ }
+ }
+ }
+
+ return error;
+ }
+
+ /**
+ * This method returns the tail of the linked list (i.e., the last entry in the list).
+ *
+ * @returns A pointer to tail entry in the linked list or NULL if list is empty.
+ *
+ */
+ const Type *GetTail(void) const
+ {
+ const Type *tail = mHead;
+
+ if (tail != NULL)
+ {
+ while (tail->GetNext() != NULL)
+ {
+ tail = tail->GetNext();
+ }
+ }
+
+ return tail;
+ }
+
+ /**
+ * This method returns the tail of the linked list (i.e., the last entry in the list).
+ *
+ * @returns A pointer to tail entry in the linked list or NULL if list is empty.
+ *
+ */
+ Type *GetTail(void) { return const_cast<Type *>(const_cast<const LinkedList<Type> *>(this)->GetTail()); }
+
+private:
+ Type *mHead;
+};
+
+/**
+ * @}
+ *
+ */
+
+} // namespace ot
+
+#endif // LINKED_LIST_HPP_
diff --git a/src/core/common/logging.cpp b/src/core/common/logging.cpp
index e91cbb4..9f1b551 100644
--- a/src/core/common/logging.cpp
+++ b/src/core/common/logging.cpp
@@ -156,157 +156,56 @@
}
#endif // OPENTHREAD_CONFIG_LOG_PKT_DUMP
+static const char *const sThreadErrorStrings[OT_NUM_ERRORS] = {
+ "OK", // OT_ERROR_NONE = 0
+ "Failed", // OT_ERROR_FAILED = 1
+ "Drop", // OT_ERROR_DROP = 2
+ "NoBufs", // OT_ERROR_NO_BUFS = 3
+ "NoRoute", // OT_ERROR_NO_ROUTE = 4
+ "Busy", // OT_ERROR_BUSY = 5
+ "Parse", // OT_ERROR_PARSE = 6
+ "InvalidArgs", // OT_ERROR_INVALID_ARGS = 7
+ "Security", // OT_ERROR_SECURITY = 8
+ "AddressQuery", // OT_ERROR_ADDRESS_QUERY = 9
+ "NoAddress", // OT_ERROR_NO_ADDRESS = 10
+ "Abort", // OT_ERROR_ABORT = 11
+ "NotImplemented", // OT_ERROR_NOT_IMPLEMENTED = 12
+ "InvalidState", // OT_ERROR_INVALID_STATE = 13
+ "NoAck", // OT_ERROR_NO_ACK = 14
+ "ChannelAccessFailure", // OT_ERROR_CHANNEL_ACCESS_FAILURE = 15
+ "Detached", // OT_ERROR_DETACHED = 16
+ "FcsErr", // OT_ERROR_FCS = 17
+ "NoFrameReceived", // OT_ERROR_NO_FRAME_RECEIVED = 18
+ "UnknownNeighbor", // OT_ERROR_UNKNOWN_NEIGHBOR = 19
+ "InvalidSourceAddress", // OT_ERROR_INVALID_SOURCE_ADDRESS = 20
+ "AddressFiltered", // OT_ERROR_ADDRESS_FILTERED = 21
+ "DestinationAddressFiltered", // OT_ERROR_DESTINATION_ADDRESS_FILTERED = 22
+ "NotFound", // OT_ERROR_NOT_FOUND = 23
+ "Already", // OT_ERROR_ALREADY = 24
+ "ReservedError25", // otError 25 is reserved
+ "Ipv6AddressCreationFailure", // OT_ERROR_IP6_ADDRESS_CREATION_FAILURE = 26
+ "NotCapable", // OT_ERROR_NOT_CAPABLE = 27
+ "ResponseTimeout", // OT_ERROR_RESPONSE_TIMEOUT = 28
+ "Duplicated", // OT_ERROR_DUPLICATED = 29
+ "ReassemblyTimeout", // OT_ERROR_REASSEMBLY_TIMEOUT = 30
+ "NotTmf", // OT_ERROR_NOT_TMF = 31
+ "NonLowpanDataFrame", // OT_ERROR_NOT_LOWPAN_DATA_FRAME = 32
+ "ReservedError33", // otError 33 is reserved
+ "LinkMarginLow", // OT_ERROR_LINK_MARGIN_LOW = 34
+};
+
const char *otThreadErrorToString(otError aError)
{
const char *retval;
- switch (aError)
+ if (aError < OT_ARRAY_LENGTH(sThreadErrorStrings))
{
- case OT_ERROR_NONE:
- retval = "OK";
- break;
-
- case OT_ERROR_FAILED:
- retval = "Failed";
- break;
-
- case OT_ERROR_DROP:
- retval = "Drop";
- break;
-
- case OT_ERROR_NO_BUFS:
- retval = "NoBufs";
- break;
-
- case OT_ERROR_NO_ROUTE:
- retval = "NoRoute";
- break;
-
- case OT_ERROR_BUSY:
- retval = "Busy";
- break;
-
- case OT_ERROR_PARSE:
- retval = "Parse";
- break;
-
- case OT_ERROR_INVALID_ARGS:
- retval = "InvalidArgs";
- break;
-
- case OT_ERROR_SECURITY:
- retval = "Security";
- break;
-
- case OT_ERROR_ADDRESS_QUERY:
- retval = "AddressQuery";
- break;
-
- case OT_ERROR_NO_ADDRESS:
- retval = "NoAddress";
- break;
-
- case OT_ERROR_ABORT:
- retval = "Abort";
- break;
-
- case OT_ERROR_NOT_IMPLEMENTED:
- retval = "NotImplemented";
- break;
-
- case OT_ERROR_INVALID_STATE:
- retval = "InvalidState";
- break;
-
- case OT_ERROR_NO_ACK:
- retval = "NoAck";
- break;
-
- case OT_ERROR_CHANNEL_ACCESS_FAILURE:
- retval = "ChannelAccessFailure";
- break;
-
- case OT_ERROR_DETACHED:
- retval = "Detached";
- break;
-
- case OT_ERROR_FCS:
- retval = "FcsErr";
- break;
-
- case OT_ERROR_NO_FRAME_RECEIVED:
- retval = "NoFrameReceived";
- break;
-
- case OT_ERROR_UNKNOWN_NEIGHBOR:
- retval = "UnknownNeighbor";
- break;
-
- case OT_ERROR_INVALID_SOURCE_ADDRESS:
- retval = "InvalidSourceAddress";
- break;
-
- case OT_ERROR_ADDRESS_FILTERED:
- retval = "AddressFiltered";
- break;
-
- case OT_ERROR_DESTINATION_ADDRESS_FILTERED:
- retval = "DestinationAddressFiltered";
- break;
-
- case OT_ERROR_NOT_FOUND:
- retval = "NotFound";
- break;
-
- case OT_ERROR_ALREADY:
- retval = "Already";
- break;
-
- case OT_ERROR_IP6_ADDRESS_CREATION_FAILURE:
- retval = "Ipv6AddressCreationFailure";
- break;
-
- case OT_ERROR_NOT_CAPABLE:
- retval = "NotCapable";
- break;
-
- case OT_ERROR_RESPONSE_TIMEOUT:
- retval = "ResponseTimeout";
- break;
-
- case OT_ERROR_DUPLICATED:
- retval = "Duplicated";
- break;
-
- case OT_ERROR_REASSEMBLY_TIMEOUT:
- retval = "ReassemblyTimeout";
- break;
-
- case OT_ERROR_NOT_TMF:
- retval = "NotTmf";
- break;
-
- case OT_ERROR_NOT_LOWPAN_DATA_FRAME:
- retval = "NonLowpanDataFrame";
- break;
-
- case OT_ERROR_DISABLED_FEATURE:
- retval = "DisabledFeature";
- break;
-
- case OT_ERROR_GENERIC:
- retval = "GenericError";
- break;
-
- case OT_ERROR_LINK_MARGIN_LOW:
- retval = "LinkMarginLow";
- break;
-
- default:
- retval = "UnknownErrorType";
- break;
+ retval = sThreadErrorStrings[aError];
}
-
+ else
+ {
+ retval = "UnknownErrorType";
+ }
return retval;
}
diff --git a/src/core/common/logging.hpp b/src/core/common/logging.hpp
index 4b19e56..d5d886c 100644
--- a/src/core/common/logging.hpp
+++ b/src/core/common/logging.hpp
@@ -38,7 +38,6 @@
#include <ctype.h>
#include <stdio.h>
-#include "utils/wrap_string.h"
#include <openthread/logging.h>
#include <openthread/platform/logging.h>
@@ -385,16 +384,12 @@
#if OPENTHREAD_CONFIG_LOG_MLE == 1
#define otLogCritMle(aFormat, ...) otLogCrit(OT_LOG_REGION_MLE, _OT_REGION_MLE_PREFIX aFormat, ##__VA_ARGS__)
#define otLogWarnMle(aFormat, ...) otLogWarn(OT_LOG_REGION_MLE, _OT_REGION_MLE_PREFIX aFormat, ##__VA_ARGS__)
-#define otLogWarnMleErr(aError, aFormat, ...) \
- otLogWarn(OT_LOG_REGION_MLE, _OT_REGION_MLE_PREFIX "Error %s: " aFormat, otThreadErrorToString(aError), \
- ##__VA_ARGS__)
#define otLogNoteMle(aFormat, ...) otLogNote(OT_LOG_REGION_MLE, _OT_REGION_MLE_PREFIX aFormat, ##__VA_ARGS__)
#define otLogInfoMle(aFormat, ...) otLogInfo(OT_LOG_REGION_MLE, _OT_REGION_MLE_PREFIX aFormat, ##__VA_ARGS__)
#define otLogDebgMle(aFormat, ...) otLogDebg(OT_LOG_REGION_MLE, _OT_REGION_MLE_PREFIX aFormat, ##__VA_ARGS__)
#else
#define otLogCritMle(aFormat, ...)
#define otLogWarnMle(aFormat, ...)
-#define otLogWarnMleErr(aError, aFormat, ...)
#define otLogNoteMle(aFormat, ...)
#define otLogInfoMle(aFormat, ...)
#define otLogDebgMle(aFormat, ...)
@@ -723,9 +718,6 @@
#define otLogNoteMac(aFormat, ...) otLogNote(OT_LOG_REGION_MAC, _OT_REGION_MAC_PREFIX aFormat, ##__VA_ARGS__)
#define otLogInfoMac(aFormat, ...) otLogInfo(OT_LOG_REGION_MAC, _OT_REGION_MAC_PREFIX aFormat, ##__VA_ARGS__)
#define otLogDebgMac(aFormat, ...) otLogDebg(OT_LOG_REGION_MAC, _OT_REGION_MAC_PREFIX aFormat, ##__VA_ARGS__)
-#define otLogDebgMacErr(aError, aFormat, ...) \
- otLogWarn(OT_LOG_REGION_MAC, _OT_REGION_MAC_PREFIX "Error %s: " aFormat, otThreadErrorToString(aError), \
- ##__VA_ARGS__)
#define otLogMac(aLogLevel, aFormat, ...) \
do \
{ \
@@ -742,7 +734,6 @@
#define otLogNoteMac(aFormat, ...)
#define otLogInfoMac(aFormat, ...)
#define otLogDebgMac(aFormat, ...)
-#define otLogDebgMacErr(aError, aFormat, ...)
#define otLogMac(aLogLevel, aFormat, ...)
#endif
@@ -801,15 +792,11 @@
#define otLogNoteCore(aFormat, ...) otLogNote(OT_LOG_REGION_CORE, _OT_REGION_CORE_PREFIX aFormat, ##__VA_ARGS__)
#define otLogInfoCore(aFormat, ...) otLogInfo(OT_LOG_REGION_CORE, _OT_REGION_CORE_PREFIX aFormat, ##__VA_ARGS__)
#define otLogDebgCore(aFormat, ...) otLogDebg(OT_LOG_REGION_CORE, _OT_REGION_CORE_PREFIX aFormat, ##__VA_ARGS__)
-#define otLogDebgCoreErr(aError, aFormat, ...) \
- otLogWarn(OT_LOG_REGION_CORE, _OT_REGION_CORE_PREFIX "Error %s: " aFormat, otThreadErrorToString(aError), \
- ##__VA_ARGS__)
#else
#define otLogCritCore(aFormat, ...)
#define otLogWarnCore(aFormat, ...)
#define otLogInfoCore(aFormat, ...)
#define otLogDebgCore(aFormat, ...)
-#define otLogDebgCoreErr(aError, aFormat, ...)
#endif
/**
@@ -929,16 +916,12 @@
#define otLogWarnUtil(aFormat, ...) otLogWarn(OT_LOG_REGION_UTIL, _OT_REGION_UTIL_PREFIX aFormat, ##__VA_ARGS__)
#define otLogNoteUtil(aFormat, ...) otLogNote(OT_LOG_REGION_UTIL, _OT_REGION_UTIL_PREFIX aFormat, ##__VA_ARGS__)
#define otLogInfoUtil(aFormat, ...) otLogInfo(OT_LOG_REGION_UTIL, _OT_REGION_UTIL_PREFIX aFormat, ##__VA_ARGS__)
-#define otLogInfoUtilErr(aError, aFormat, ...) \
- otLogInfo(OT_LOG_REGION_UTIL, _OT_REGION_CORE_PREFIX "Error %s: " aFormat, otThreadErrorToString(aError), \
- ##__VA_ARGS__)
#define otLogDebgUtil(aFormat, ...) otLogDebg(OT_LOG_REGION_UTIL, _OT_REGION_UTIL_PREFIX aFormat, ##__VA_ARGS__)
#else
#define otLogCritUtil(aFormat, ...)
#define otLogWarnUtil(aFormat, ...)
#define otLogNoteUtil(aFormat, ...)
#define otLogInfoUtil(aFormat, ...)
-#define otLogInfoUtilErr(aError, aFormat, ...)
#define otLogDebgUtil(aFormat, ...)
#endif
@@ -1082,15 +1065,12 @@
#define otLogWarnCli(aFormat, ...) otLogWarn(OT_LOG_REGION_CLI, _OT_REGION_CLI_PREFIX aFormat, ##__VA_ARGS__)
#define otLogNoteCli(aFormat, ...) otLogNote(OT_LOG_REGION_CLI, _OT_REGION_CLI_PREFIX aFormat, ##__VA_ARGS__)
#define otLogInfoCli(aFormat, ...) otLogInfo(OT_LOG_REGION_CLI, _OT_REGION_CLI_PREFIX aFormat, ##__VA_ARGS__)
-#define otLogInfoCliErr(aError, aFormat, ...) \
- otLogInfo(OT_LOG_REGION_CLI, "Error %s: " aFormat, otThreadErrorToString(aError), ##__VA_ARGS__)
#define otLogDebgCli(aFormat, ...) otLogDebg(OT_LOG_REGION_CLI, _OT_REGION_CLI_PREFIX aFormat, ##__VA_ARGS__)
#else
#define otLogCritCli(aFormat, ...)
#define otLogWarnCli(aFormat, ...)
#define otLogNoteCli(aFormat, ...)
#define otLogInfoCli(aFormat, ...)
-#define otLogInfoCliErr(aError, aFormat, ...)
#define otLogDebgCli(aFormat, ...)
#endif
@@ -1148,16 +1128,12 @@
#define otLogWarnCoap(aFormat, ...) otLogWarn(OT_LOG_REGION_COAP, _OT_REGION_COAP_PREFIX aFormat, ##__VA_ARGS__)
#define otLogNoteCoap(aFormat, ...) otLogNote(OT_LOG_REGION_COAP, _OT_REGION_COAP_PREFIX aFormat, ##__VA_ARGS__)
#define otLogInfoCoap(aFormat, ...) otLogInfo(OT_LOG_REGION_COAP, _OT_REGION_COAP_PREFIX aFormat, ##__VA_ARGS__)
-#define otLogInfoCoapErr(aError, aFormat, ...) \
- otLogInfo(OT_LOG_REGION_COAP, _OT_REGION_COAP_PREFIX "Error %s: " aFormat, otThreadErrorToString(aError), \
- ##__VA_ARGS__)
#define otLogDebgCoap(aFormat, ...) otLogDebg(OT_LOG_REGION_COAP, _OT_REGION_COAP_PREFIX aFormat, ##__VA_ARGS__)
#else
#define otLogCritCoap(aFormat, ...)
#define otLogWarnCoap(aFormat, ...)
#define otLogNoteCoap(aFormat, ...)
#define otLogInfoCoap(aFormat, ...)
-#define otLogInfoCoapErr(aError, aFormat, ...)
#define otLogDebgCoap(aFormat, ...)
#endif
@@ -1892,7 +1868,7 @@
#define _otLogFormatter(aLogLevel, aRegion, aFormat, ...) \
_otDynamicLog(aLogLevel, aRegion, aFormat OPENTHREAD_CONFIG_LOG_SUFFIX, ##__VA_ARGS__)
-#if OPENTHREAD_CONFIG_ENABLE_DYNAMIC_LOG_LEVEL == 1
+#if OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE == 1
/**
* Local/private macro to dynamically filter log level.
@@ -1904,15 +1880,16 @@
_otPlatLog(aLogLevel, aRegion, aFormat, ##__VA_ARGS__); \
} while (false)
-#else // OPENTHREAD_CONFIG_ENABLE_DYNAMIC_LOG_LEVEL
+#else // OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE
#define _otDynamicLog(aLogLevel, aRegion, aFormat, ...) _otPlatLog(aLogLevel, aRegion, aFormat, ##__VA_ARGS__)
-#endif // OPENTHREAD_CONFIG_ENABLE_DYNAMIC_LOG_LEVEL
+#endif // OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE
/**
- * `OPENTHREAD_CONFIG_PLAT_LOG_FUNCTION` is a configuration parameter (see `openthread-core-default-config.h`) which
- * specifies the function/macro to be used for logging in OpenThread. By default it is set to `otPlatLog()`.
+ * `OPENTHREAD_CONFIG_PLAT_LOG_FUNCTION` is a configuration parameter (see `config/logging.h`) which specifies the
+ * function/macro to be used for logging in OpenThread. By default it is set to `otPlatLog()`.
+ *
*/
#define _otPlatLog(aLogLevel, aRegion, aFormat, ...) \
OPENTHREAD_CONFIG_PLAT_LOG_FUNCTION(aLogLevel, aRegion, aFormat, ##__VA_ARGS__)
diff --git a/src/core/common/message.cpp b/src/core/common/message.cpp
index 7ebfef6..1990713 100644
--- a/src/core/common/message.cpp
+++ b/src/core/common/message.cpp
@@ -402,11 +402,6 @@
return error;
}
-otError Message::AppendTlv(const Tlv &aTlv)
-{
- return Append(&aTlv, aTlv.GetSize());
-}
-
otError Message::Prepend(const void *aBuf, uint16_t aLength)
{
otError error = OT_ERROR_NONE;
diff --git a/src/core/common/message.hpp b/src/core/common/message.hpp
index c7752eb..97f7c98 100644
--- a/src/core/common/message.hpp
+++ b/src/core/common/message.hpp
@@ -38,15 +38,13 @@
#include <stdint.h>
-#include "utils/wrap_string.h"
-
#include <openthread/message.h>
#include <openthread/platform/messagepool.h>
#include "common/code_utils.hpp"
+#include "common/encoding.hpp"
#include "common/locator.hpp"
-#include "common/tlvs.hpp"
-#include "mac/mac_frame.hpp"
+#include "mac/mac_types.hpp"
#include "thread/link_quality.hpp"
namespace ot {
@@ -88,10 +86,11 @@
PriorityQueue *mPriority; ///< Identifies the priority queue (if any) where this message is queued.
} mQueue; ///< Identifies the queue (if any) where this message is queued.
+ uint32_t mDatagramTag; ///< The datagram tag used for 6LoWPAN fragmentation or identification used for IPv6
+ ///< fragmentation.
uint16_t mReserved; ///< Number of header bytes reserved for the message.
uint16_t mLength; ///< Number of bytes within the message.
uint16_t mOffset; ///< A byte offset within the message.
- uint16_t mDatagramTag; ///< The datagram tag used for 6LoWPAN fragmentation.
RssAverager mRssAverager; ///< The averager maintaining the received signal strength (RSS) average.
uint8_t mChildMask[kChildMaskBytes]; ///< A bit-vector to indicate which sleepy children need to receive this.
@@ -401,19 +400,6 @@
otError Append(const void *aBuf, uint16_t aLength);
/**
- * This method appends a TLV to the end of the message.
- *
- * On success, this method grows the message by the size of the TLV.
- *
- * @param[in] aTlv A reference to a TLV.
- *
- * @retval OT_ERROR_NONE Successfully appended the TLV to the message.
- * @retval OT_ERROR_NO_BUFS Insufficient available buffers to grow the message.
- *
- */
- otError AppendTlv(const Tlv &aTlv);
-
- /**
* This method reads bytes from the message.
*
* @param[in] aOffset Byte offset within the message to begin reading.
@@ -477,12 +463,13 @@
Message *Clone(void) const { return Clone(GetLength()); }
/**
- * This method returns the datagram tag used for 6LoWPAN fragmentation.
+ * This method returns the datagram tag used for 6LoWPAN fragmentation or the identification used for IPv6
+ * fragmentation.
*
- * @returns The 6LoWPAN datagram tag.
+ * @returns The 6LoWPAN datagram tag or the IPv6 fragment identification.
*
*/
- uint16_t GetDatagramTag(void) const { return mBuffer.mHead.mInfo.mDatagramTag; }
+ uint32_t GetDatagramTag(void) const { return mBuffer.mHead.mInfo.mDatagramTag; }
/**
* This method sets the datagram tag used for 6LoWPAN fragmentation.
@@ -490,7 +477,7 @@
* @param[in] aTag The 6LoWPAN datagram tag.
*
*/
- void SetDatagramTag(uint16_t aTag) { mBuffer.mHead.mInfo.mDatagramTag = aTag; }
+ void SetDatagramTag(uint32_t aTag) { mBuffer.mHead.mInfo.mDatagramTag = aTag; }
/**
* This method returns whether or not the message forwarding is scheduled for the child.
diff --git a/src/core/common/notifier.cpp b/src/core/common/notifier.cpp
index a4cfc88..749f8cf 100644
--- a/src/core/common/notifier.cpp
+++ b/src/core/common/notifier.cpp
@@ -54,7 +54,7 @@
, mFlagsToSignal(0)
, mSignaledFlags(0)
, mTask(aInstance, &Notifier::HandleStateChanged, this)
- , mCallbacks(NULL)
+ , mCallbacks()
{
for (unsigned int i = 0; i < kMaxExternalHandlers; i++)
{
@@ -65,8 +65,7 @@
void Notifier::RegisterCallback(Callback &aCallback)
{
- aCallback.mNext = mCallbacks;
- mCallbacks = &aCallback;
+ mCallbacks.Push(aCallback);
}
otError Notifier::RegisterCallback(otStateChangedCallback aCallback, void *aContext)
@@ -151,7 +150,7 @@
LogChangedFlags(flags);
- for (Callback *callback = mCallbacks; callback != NULL; callback = callback->mNext)
+ for (Callback *callback = mCallbacks.GetHead(); callback != NULL; callback = callback->GetNext())
{
callback->Invoke(flags);
}
@@ -265,11 +264,11 @@
retval = "Child-";
break;
- case OT_CHANGED_IP6_MULTICAST_SUBSRCRIBED:
+ case OT_CHANGED_IP6_MULTICAST_SUBSCRIBED:
retval = "Ip6Mult+";
break;
- case OT_CHANGED_IP6_MULTICAST_UNSUBSRCRIBED:
+ case OT_CHANGED_IP6_MULTICAST_UNSUBSCRIBED:
retval = "Ip6Mult-";
break;
diff --git a/src/core/common/notifier.hpp b/src/core/common/notifier.hpp
index 580e866..65e98fd 100644
--- a/src/core/common/notifier.hpp
+++ b/src/core/common/notifier.hpp
@@ -36,13 +36,13 @@
#include "openthread-core-config.h"
+#include <stdbool.h>
#include <stdint.h>
-#include "utils/wrap_stdbool.h"
-
#include <openthread/instance.h>
#include <openthread/platform/toolchain.h>
+#include "common/linked_list.hpp"
#include "common/locator.hpp"
#include "common/tasklet.hpp"
@@ -80,9 +80,10 @@
* This class defines a `Notifier` callback instance.
*
*/
- class Callback : public OwnerLocator
+ class Callback : public OwnerLocator, public LinkedListEntry<Callback>
{
friend class Notifier;
+ friend class LinkedListEntry<Callback>;
public:
/**
@@ -177,6 +178,40 @@
*/
bool HasSignaled(otChangedFlags aFlags) const { return (mSignaledFlags & aFlags) == aFlags; }
+ /**
+ * This template method updates a variable of a type `Type` with a new value and signals the given changed flags.
+ *
+ * If the variable is already set to the same value, this method returns `OT_ERROR_ALREADY` and the changed flags
+ * is signaled using `SignalIfFirst()` (i.e. signal is scheduled only if the flag has not been signaled before).
+ *
+ * The template `Type` should support comparison operator `==` and assignment operator `=`.
+ *
+ * @param[inout] aVariable A reference to the variable to update.
+ * @param[in] aNewValue The new value.
+ * @param[in] aFlags The changed flags to signal.
+ *
+ * @retval OT_ERROR_NONE The variable was update successfully and @p aFlags was signaled.
+ * @retval OT_ERROR_ALREADY The variable was already set to the same value.
+ *
+ */
+ template <typename Type> otError Update(Type &aVariable, const Type &aNewValue, otChangedFlags aFlags)
+ {
+ otError error = OT_ERROR_NONE;
+
+ if (aVariable == aNewValue)
+ {
+ SignalIfFirst(aFlags);
+ error = OT_ERROR_ALREADY;
+ }
+ else
+ {
+ aVariable = aNewValue;
+ Signal(aFlags);
+ }
+
+ return error;
+ }
+
private:
enum
{
@@ -199,11 +234,11 @@
void LogChangedFlags(otChangedFlags aFlags) const;
const char *FlagToString(otChangedFlags aFlag) const;
- otChangedFlags mFlagsToSignal;
- otChangedFlags mSignaledFlags;
- Tasklet mTask;
- Callback * mCallbacks;
- ExternalCallback mExternalCallbacks[kMaxExternalHandlers];
+ otChangedFlags mFlagsToSignal;
+ otChangedFlags mSignaledFlags;
+ Tasklet mTask;
+ LinkedList<Callback> mCallbacks;
+ ExternalCallback mExternalCallbacks[kMaxExternalHandlers];
};
/**
diff --git a/src/core/common/random.hpp b/src/core/common/random.hpp
index 71c742d..3fadb92 100644
--- a/src/core/common/random.hpp
+++ b/src/core/common/random.hpp
@@ -36,11 +36,12 @@
#include "openthread-core-config.h"
+#include <stdint.h>
+
#include <openthread/error.h>
#include "common/debug.hpp"
#include "common/random_manager.hpp"
-#include "utils/wrap_stdint.h"
namespace ot {
namespace Random {
@@ -159,7 +160,7 @@
} // namespace NonCrypto
-#ifndef OPENTHREAD_RADIO
+#if !OPENTHREAD_RADIO
namespace Crypto {
diff --git a/src/core/common/random_manager.cpp b/src/core/common/random_manager.cpp
index d5962cd..128fe6a 100644
--- a/src/core/common/random_manager.cpp
+++ b/src/core/common/random_manager.cpp
@@ -35,7 +35,7 @@
#include <openthread/platform/entropy.h>
-#ifndef OPENTHREAD_RADIO
+#if !OPENTHREAD_RADIO
#include <mbedtls/entropy_poll.h>
#endif
@@ -49,7 +49,7 @@
uint16_t RandomManager::sInitCount = 0;
RandomManager::NonCryptoPrng RandomManager::sPrng;
-#ifndef OPENTHREAD_RADIO
+#if !OPENTHREAD_RADIO
RandomManager::Entropy RandomManager::sEntropy;
RandomManager::CryptoCtrDrbg RandomManager::sCtrDrbg;
#endif
@@ -63,19 +63,19 @@
VerifyOrExit(sInitCount == 0);
-#ifndef OPENTHREAD_RADIO
+#if !OPENTHREAD_RADIO
sEntropy.Init();
-#endif
+ sCtrDrbg.Init();
+ error = Random::Crypto::FillBuffer(reinterpret_cast<uint8_t *>(&seed), sizeof(seed));
+ assert(error == OT_ERROR_NONE);
+#else
error = otPlatEntropyGet(reinterpret_cast<uint8_t *>(&seed), sizeof(seed));
assert(error == OT_ERROR_NONE);
+#endif
sPrng.Init(seed);
-#ifndef OPENTHREAD_RADIO
- sCtrDrbg.Init();
-#endif
-
exit:
sInitCount++;
}
@@ -87,7 +87,7 @@
sInitCount--;
VerifyOrExit(sInitCount == 0);
-#ifndef OPENTHREAD_RADIO
+#if !OPENTHREAD_RADIO
sCtrDrbg.Deinit();
sEntropy.Deinit();
#endif
@@ -141,7 +141,7 @@
return mlcg;
}
-#ifndef OPENTHREAD_RADIO
+#if !OPENTHREAD_RADIO
//-------------------------------------------------------------------
// Entropy
@@ -149,8 +149,11 @@
void RandomManager::Entropy::Init(void)
{
mbedtls_entropy_init(&mEntropyContext);
+
+#ifndef OT_MBEDTLS_STRONG_DEFAULT_ENTROPY_PRESENT
mbedtls_entropy_add_source(&mEntropyContext, &RandomManager::Entropy::HandleMbedtlsEntropyPoll, NULL,
MBEDTLS_ENTROPY_MIN_HARDWARE, MBEDTLS_ENTROPY_SOURCE_STRONG);
+#endif // OT_MBEDTLS_STRONG_DEFAULT_ENTROPY_PRESENT
}
void RandomManager::Entropy::Deinit(void)
@@ -158,6 +161,8 @@
mbedtls_entropy_free(&mEntropyContext);
}
+#ifndef OT_MBEDTLS_STRONG_DEFAULT_ENTROPY_PRESENT
+
int RandomManager::Entropy::HandleMbedtlsEntropyPoll(void * aData,
unsigned char *aOutput,
size_t aInLen,
@@ -176,6 +181,8 @@
return rval;
}
+#endif // OT_MBEDTLS_STRONG_DEFAULT_ENTROPY_PRESENT
+
//-------------------------------------------------------------------
// CryptoCtrDrbg
@@ -196,6 +203,6 @@
mbedtls_ctr_drbg_random(&mCtrDrbg, static_cast<unsigned char *>(aBuffer), static_cast<size_t>(aSize)));
}
-#endif // #ifndef OPENTHREAD_RADIO
+#endif // #if !OPENTHREAD_RADIO
} // namespace ot
diff --git a/src/core/common/random_manager.hpp b/src/core/common/random_manager.hpp
index c2e78a3..ea11bdb 100644
--- a/src/core/common/random_manager.hpp
+++ b/src/core/common/random_manager.hpp
@@ -36,14 +36,18 @@
#include "openthread-core-config.h"
+#include <stdint.h>
#include <openthread/error.h>
-#ifndef OPENTHREAD_RADIO
+#if !OPENTHREAD_RADIO
#include <mbedtls/ctr_drbg.h>
#include <mbedtls/entropy.h>
#endif
-#include "utils/wrap_stdint.h"
+#if (!defined(MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES) && \
+ (!defined(MBEDTLS_NO_PLATFORM_ENTROPY) || defined(MBEDTLS_HAVEGE_C) || defined(MBEDTLS_ENTROPY_HARDWARE_ALT)))
+#define OT_MBEDTLS_STRONG_DEFAULT_ENTROPY_PRESENT
+#endif
namespace ot {
@@ -74,7 +78,7 @@
*/
static uint32_t NonCryptoGetUint32(void);
-#ifndef OPENTHREAD_RADIO
+#if !OPENTHREAD_RADIO
/**
* This static method returns the initialized mbedtls_entropy_context.
*
@@ -113,7 +117,7 @@
uint32_t mState;
};
-#ifndef OPENTHREAD_RADIO
+#if !OPENTHREAD_RADIO
class Entropy
{
public:
@@ -123,7 +127,9 @@
mbedtls_entropy_context *GetContext(void) { return &mEntropyContext; }
private:
+#ifndef OT_MBEDTLS_STRONG_DEFAULT_ENTROPY_PRESENT
static int HandleMbedtlsEntropyPoll(void *aData, unsigned char *aOutput, size_t aInLen, size_t *aOutLen);
+#endif // OT_MBEDTLS_STRONG_DEFAULT_ENTROPY_PRESENT
mbedtls_entropy_context mEntropyContext;
};
@@ -144,7 +150,7 @@
static uint16_t sInitCount;
static NonCryptoPrng sPrng;
-#ifndef OPENTHREAD_RADIO
+#if !OPENTHREAD_RADIO
static Entropy sEntropy;
static CryptoCtrDrbg sCtrDrbg;
#endif
diff --git a/src/core/common/settings.cpp b/src/core/common/settings.cpp
index 473cdc4..9956d91 100644
--- a/src/core/common/settings.cpp
+++ b/src/core/common/settings.cpp
@@ -35,8 +35,6 @@
#include <openthread/platform/settings.h>
-#include "utils/wrap_string.h"
-
#include "common/code_utils.hpp"
#include "common/instance.hpp"
#include "common/logging.hpp"
diff --git a/src/core/common/settings.hpp b/src/core/common/settings.hpp
index 8e9d282..ae9e406 100644
--- a/src/core/common/settings.hpp
+++ b/src/core/common/settings.hpp
@@ -37,8 +37,7 @@
#include "openthread-core-config.h"
#include "common/locator.hpp"
-#include "mac/mac_frame.hpp"
-#include "thread/mle.hpp"
+#include "mac/mac_types.hpp"
#if OPENTHREAD_CONFIG_IP6_SLAAC_ENABLE
#include "utils/slaac_address.hpp"
#endif
@@ -86,6 +85,12 @@
*/
struct NetworkInfo
{
+ /**
+ * This method clears the struct object (setting all the fields to zero).
+ *
+ */
+ void Clear(void) { memset(this, 0, sizeof(*this)); }
+
uint8_t mRole; ///< Current Thread role.
uint8_t mDeviceMode; ///< Device mode setting.
uint16_t mRloc16; ///< RLOC16
@@ -103,6 +108,12 @@
*/
struct ParentInfo
{
+ /**
+ * This method clears the struct object (setting all the fields to zero).
+ *
+ */
+ void Clear(void) { memset(this, 0, sizeof(*this)); }
+
Mac::ExtAddress mExtAddress; ///< Extended Address
};
@@ -112,13 +123,18 @@
*/
struct ChildInfo
{
+ /**
+ * This method clears the struct object (setting all the fields to zero).
+ *
+ */
+ void Clear(void) { memset(this, 0, sizeof(*this)); }
+
Mac::ExtAddress mExtAddress; ///< Extended Address
uint32_t mTimeout; ///< Timeout
uint16_t mRloc16; ///< RLOC16
uint8_t mMode; ///< The MLE device mode
};
-protected:
/**
* This enumeration defines the keys of settings.
*
@@ -134,6 +150,7 @@
kKeySlaacIidSecretKey = 0x0007, ///< Secret key used by SLAAC module for generating semantically opaque IID
};
+protected:
explicit SettingsBase(Instance &aInstance)
: InstanceLocator(aInstance)
{
diff --git a/src/core/common/string.cpp b/src/core/common/string.cpp
index c57c70b..f10e017 100644
--- a/src/core/common/string.cpp
+++ b/src/core/common/string.cpp
@@ -35,6 +35,18 @@
namespace ot {
+uint16_t StringLength(const char *aString, uint16_t aMaxLength)
+{
+ uint16_t ret;
+
+ for (ret = 0; (ret < aMaxLength) && (aString[ret] != 0); ret++)
+ {
+ // Empty loop.
+ }
+
+ return ret;
+}
+
otError StringBase::Write(char *aBuffer, uint16_t aSize, uint16_t &aLength, const char *aFormat, va_list aArgs)
{
otError error = OT_ERROR_NONE;
diff --git a/src/core/common/string.hpp b/src/core/common/string.hpp
index 99c587f..b7619bf 100644
--- a/src/core/common/string.hpp
+++ b/src/core/common/string.hpp
@@ -39,7 +39,6 @@
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
-#include "utils/wrap_string.h"
#include <openthread/error.h>
@@ -58,6 +57,17 @@
*/
/**
+ * This function returns the number of characters that precede the terminating NULL character.
+ *
+ * @param[in] aString A pointer to the string.
+ * @param[in] aMaxLength The maximum length in bytes.
+ *
+ * @returns The number of characters that precede the terminating NULL character or @p aMaxLength, whichever is smaller.
+ *
+ */
+uint16_t StringLength(const char *aString, uint16_t aMaxLength);
+
+/**
* This class defines the base class for `String`.
*
*/
diff --git a/src/core/common/tasklet.cpp b/src/core/common/tasklet.cpp
index abe607e..3481af9 100644
--- a/src/core/common/tasklet.cpp
+++ b/src/core/common/tasklet.cpp
@@ -51,77 +51,65 @@
otError Tasklet::Post(void)
{
- return Get<TaskletScheduler>().Post(*this);
-}
-
-TaskletScheduler::TaskletScheduler(void)
- : mHead(NULL)
- , mTail(NULL)
-{
-}
-
-otError TaskletScheduler::Post(Tasklet &aTasklet)
-{
otError error = OT_ERROR_NONE;
- VerifyOrExit(mTail != &aTasklet && aTasklet.mNext == NULL, error = OT_ERROR_ALREADY);
-
- VerifyOrExit(&aTasklet.Get<TaskletScheduler>() == this);
-
- if (mTail == NULL)
- {
- mHead = &aTasklet;
- mTail = &aTasklet;
- otTaskletsSignalPending(&aTasklet.GetInstance());
- }
- else
- {
- mTail->mNext = &aTasklet;
- mTail = &aTasklet;
- }
+ VerifyOrExit(!IsPosted(), error = OT_ERROR_ALREADY);
+ Get<TaskletScheduler>().PostTasklet(*this);
exit:
return error;
}
-Tasklet *TaskletScheduler::PopTasklet(void)
+TaskletScheduler::TaskletScheduler(void)
+ : mTail(NULL)
{
- Tasklet *task = mHead;
+}
- if (task != NULL)
+void TaskletScheduler::PostTasklet(Tasklet &aTasklet)
+{
+ // Tasklets are saved in a circular singly linked list.
+
+ if (mTail == NULL)
{
- mHead = mHead->mNext;
-
- if (mHead == NULL)
- {
- mTail = NULL;
- }
-
- task->mNext = NULL;
+ mTail = &aTasklet;
+ mTail->mNext = mTail;
+ otTaskletsSignalPending(&aTasklet.GetInstance());
}
-
- return task;
+ else
+ {
+ aTasklet.mNext = mTail->mNext;
+ mTail->mNext = &aTasklet;
+ mTail = &aTasklet;
+ }
}
void TaskletScheduler::ProcessQueuedTasklets(void)
{
Tasklet *tail = mTail;
- Tasklet *cur;
- while ((cur = PopTasklet()) != NULL)
+ // This method processes all tasklets queued when this is called. We
+ // keep a copy the current list and then clear the main list by
+ // setting `mTail` to NULL. A newly posted tasklet while processing
+ // the currently queued tasklets will then trigger a call to
+ // `otTaskletsSignalPending()`.
+
+ mTail = NULL;
+
+ while (tail != NULL)
{
- cur->RunTask();
+ Tasklet *tasklet = tail->mNext;
- // only process tasklets that were queued at the time this method was called
- if (cur == tail)
+ if (tasklet == tail)
{
- if (mHead != NULL)
- {
- otTaskletsSignalPending(&mHead->GetInstance());
- }
-
- break;
+ tail = NULL;
}
+ else
+ {
+ tail->mNext = tasklet->mNext;
+ }
+
+ tasklet->mNext = NULL;
+ tasklet->RunTask();
}
}
diff --git a/src/core/common/tasklet.hpp b/src/core/common/tasklet.hpp
index c98dbfd..f8fb8dd 100644
--- a/src/core/common/tasklet.hpp
+++ b/src/core/common/tasklet.hpp
@@ -84,11 +84,20 @@
Tasklet(Instance &aInstance, Handler aHandler, void *aOwner);
/**
- * This method puts the tasklet on the run queue.
+ * This method puts the tasklet on the tasklet scheduler run queue.
*
*/
otError Post(void);
+ /**
+ * This method indicates whether the tasklet is posted or not.
+ *
+ * @retval TRUE The tasklet is posted.
+ * @retval FALSE The tasklet is not posted.
+ *
+ */
+ bool IsPosted(void) const { return (mNext != NULL); }
+
private:
void RunTask(void) { mHandler(*this); }
@@ -140,6 +149,8 @@
*/
class TaskletScheduler
{
+ friend class Tasklet;
+
public:
/**
* This constructor initializes the object.
@@ -148,23 +159,13 @@
TaskletScheduler(void);
/**
- * This method enqueues a tasklet into the run queue.
- *
- * @param[in] aTasklet A reference to the tasklet to enqueue.
- *
- * @retval OT_ERROR_NONE Successfully enqueued the tasklet.
- * @retval OT_ERROR_ALREADY The tasklet was already enqueued.
- */
- otError Post(Tasklet &aTasklet);
-
- /**
* This method indicates whether or not there are tasklets pending.
*
* @retval TRUE If there are tasklets pending.
* @retval FALSE If there are no tasklets pending.
*
*/
- bool AreTaskletsPending(void) const { return mHead != NULL; }
+ bool AreTaskletsPending(void) const { return mTail != NULL; }
/**
* This method processes all tasklets queued when this is called.
@@ -173,9 +174,9 @@
void ProcessQueuedTasklets(void);
private:
- Tasklet *PopTasklet(void);
- Tasklet *mHead;
- Tasklet *mTail;
+ void PostTasklet(Tasklet &aTasklet);
+
+ Tasklet *mTail; // A circular singly linked-list
};
/**
diff --git a/src/core/common/time.hpp b/src/core/common/time.hpp
new file mode 100644
index 0000000..52ee41e
--- /dev/null
+++ b/src/core/common/time.hpp
@@ -0,0 +1,292 @@
+/*
+ * Copyright (c) 2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file includes definitions for time instance.
+ */
+
+#ifndef TIME_HPP_
+#define TIME_HPP_
+
+#include "openthread-core-config.h"
+
+#include <stddef.h>
+#include <stdint.h>
+
+namespace ot {
+
+/**
+ * @addtogroup core-timer
+ *
+ * @brief
+ * This module includes definitions for the time instance.
+ *
+ * @{
+ *
+ */
+
+/**
+ * This class represents a time instance.
+ *
+ */
+class Time
+{
+public:
+ /**
+ * This constant defines a maximum time duration ensured to be longer than any other duration.
+ *
+ */
+ static const uint32_t kMaxDuration = ~static_cast<uint32_t>(0UL);
+
+ /**
+ * This is the default constructor for a `Time` object.
+ *
+ */
+ Time(void) {}
+
+ /**
+ * This constructor initializes a `Time` object with a given value.
+ *
+ * @param[in] aValue The numeric time value to initialize the `Time` object.
+ *
+ */
+ explicit Time(uint32_t aValue) { SetValue(aValue); }
+
+ /**
+ * This method gets the numeric time value associated with the `Time` object.
+ *
+ * @returns The numeric `Time` value.
+ *
+ */
+ uint32_t GetValue(void) const { return mValue; }
+
+ /**
+ * This method sets the numeric time value.
+ *
+ * @param[in] aValue The numeric time value.
+ *
+ */
+ void SetValue(uint32_t aValue) { mValue = aValue; }
+
+ /**
+ * This method calculates the time duration between two `Time` instances.
+ *
+ * @note Expression `(t1 - t2)` returns the duration of the interval starting from `t2` and ending at `t1`. When
+ * calculating the duration, `t2 is assumed to be in the past relative to `t1`. The duration calculation correctly
+ * takes into account the wrapping of numeric value of `Time` instances. The returned value can span the entire
+ * range of the `uint32_t` type.
+ *
+ * @param[in] aOther A `Time` instance to subtract from.
+ *
+ * @returns The duration of interval from @p aOther to this `Time` object.
+ *
+ */
+ uint32_t operator-(const Time &aOther) const { return mValue - aOther.mValue; }
+
+ /**
+ * This method returns a new `Time` which is ahead of this `Time` object by a given duration.
+ *
+ * @param[in] aDuration A duration.
+ *
+ * @returns A new `Time` which is ahead of this object by @aDuration.
+ *
+ */
+ Time operator+(uint32_t aDuration) const { return Time(mValue + aDuration); }
+
+ /**
+ * This method returns a new `Time` which is behind this `Time` object by a given duration.
+ *
+ * @param[in] aDuration A duration.
+ *
+ * @returns A new `Time` which is behind this object by @aDuration.
+ *
+ */
+ Time operator-(uint32_t aDuration) const { return Time(mValue - aDuration); }
+
+ /**
+ * This method moves this `Time` object forward by a given duration.
+ *
+ * @param[in] aDuration A duration.
+ *
+ */
+ void operator+=(uint32_t aDuration) { mValue += aDuration; }
+
+ /**
+ * This method moves this `Time` object backward by a given duration.
+ *
+ * @param[in] aDuration A duration.
+ *
+ */
+ void operator-=(uint32_t aDuration) { mValue -= aDuration; }
+
+ /**
+ * This method indicates whether two `Time` instances are equal.
+ *
+ * @param[in] aOther A `Time` instance to compare with.
+ *
+ * @retval TRUE The two `Time` instances are equal.
+ * @retval FALSE The two `Time` instances are not equal.
+ *
+ */
+ bool operator==(const Time &aOther) const { return mValue == aOther.mValue; }
+
+ /**
+ * This method indicates whether two `Time` instance are not equal.
+ *
+ * @param[in] aOther A `Time` instance to compare with.
+ *
+ * @retval TRUE The two `Time` instances are not equal.
+ * @retval FALSE The two `Time` instances are equal.
+ *
+ */
+ bool operator!=(const Time &aOther) const { return !(*this == aOther); }
+
+ /**
+ * This method indicates whether this `Time` instance is strictly before another one.
+ *
+ * @note The comparison operators correctly take into account the wrapping of `Time` numeric value. For a given
+ * `Time` instance `t0`, any `Time` instance `t` where `(t - t0)` is less than half the range of `uint32_t` type
+ * is considered to be after `t0`, otherwise it is considered to be before 't0' (or equal to it). As an example
+ * to illustrate this model we can use clock hours: If we are at hour 12, hours 1 to 5 are considered to be
+ * after 12, and hours 6 to 11 are considered to be before 12.
+ *
+ * @param[in] aOther A `Time` instance to compare with.
+ *
+ * @retval TRUE This `Time` instance is strictly before @p aOther.
+ * @retval FALSE This `Time` instance is not strictly before @p aOther.
+ *
+ */
+ bool operator<(const Time &aOther) const { return ((mValue - aOther.mValue) & (1UL << 31)) != 0; }
+
+ /**
+ * This method indicates whether this `Time` instance is after or equal to another one.
+ *
+ * @param[in] aOther A `Time` instance to compare with.
+ *
+ * @retval TRUE This `Time` instance is after or equal to @p aOther.
+ * @retval FALSE This `Time` instance is not after or equal to @p aOther.
+ *
+ */
+ bool operator>=(const Time &aOther) const { return !(*this < aOther); }
+
+ /**
+ * This method indicates whether this `Time` instance is before or equal to another one.
+ *
+ * @param[in] aOther A `Time` instance to compare with.
+ *
+ * @retval TRUE This `Time` instance is before or equal to @p aOther.
+ * @retval FALSE This `Time` instance is not before or equal to @p aOther.
+ *
+ */
+ bool operator<=(const Time &aOther) const { return (aOther >= *this); }
+
+ /**
+ * This method indicates whether this `Time` instance is strictly after another one.
+ *
+ * @param[in] aOther A `Time` instance to compare with.
+ *
+ * @retval TRUE This `Time` instance is strictly after @p aOther.
+ * @retval FALSE This `Time` instance is not strictly after @p aOther.
+ *
+ */
+ bool operator>(const Time &aOther) const { return (aOther < *this); }
+
+ /**
+ * This method returns a new `Time` instance which is in distant future relative to current `Time` object.
+ *
+ * The returned distance future `Time` is guaranteed to be equal or after (as defined by comparison operator `<=`)
+ * any other `Time` which is after this `Time` object, i.e., for any `t` for which we have `*this <= t`, it is
+ * ensured that `t <= this->GetGetDistantFuture()`.
+ *
+ * @returns A new `Time` in distance future relative to current `Time` object.
+ *
+ */
+ Time GetDistantFuture(void) const { return Time(mValue + kDistantFuture); }
+
+ /**
+ * This method returns a new `Time` instance which is in distant past relative to current `Time` object.
+ *
+ * The returned distance past `Time` is guaranteed to be equal or before (as defined by comparison operator `>=`)
+ * any other `Time` which is before this `Time` object, i.e., for any `t` for which we have `*this >= t`, it is
+ * ensured that `t >= this->GetDistantPast()`.
+ *
+ * @returns A new `Time` in distance past relative to current `Time` object.
+ *
+ */
+ Time GetDistantPast(void) const { return Time(mValue - kDistantFuture); }
+
+ /**
+ * This static method converts a given number of seconds to milliseconds.
+ *
+ * @returns The number of milliseconds.
+ *
+ */
+ static uint32_t SecToMsec(uint32_t aSeconds) { return aSeconds * 1000u; }
+
+ /**
+ * This static method converts a given number of milliseconds to seconds.
+ *
+ * @returns The number of seconds.
+ *
+ */
+ static uint32_t MsecToSec(uint32_t aMilliseconds) { return aMilliseconds / 1000u; }
+
+private:
+ enum
+ {
+ kDistantFuture = (1UL << 31),
+ };
+
+ uint32_t mValue;
+};
+
+/**
+ * This type represents a time instance (millisecond time).
+ *
+ */
+typedef Time TimeMilli;
+
+#if OPENTHREAD_CONFIG_PLATFORM_USEC_TIMER_ENABLE
+
+/**
+ * This type represents a time instance (microsecond time).
+ *
+ */
+typedef Time TimeMicro;
+
+#endif // OPENTHREAD_CONFIG_PLATFORM_USEC_TIMER_ENABLE
+
+/**
+ * @}
+ *
+ */
+
+} // namespace ot
+
+#endif // TIME_HPP_
diff --git a/src/core/common/timer.cpp b/src/core/common/timer.cpp
index 4e50be1..3dda583 100644
--- a/src/core/common/timer.cpp
+++ b/src/core/common/timer.cpp
@@ -44,13 +44,13 @@
const TimerScheduler::AlarmApi TimerMilliScheduler::sAlarmMilliApi = {&otPlatAlarmMilliStartAt, &otPlatAlarmMilliStop,
&otPlatAlarmMilliGetNow};
-bool Timer::DoesFireBefore(const Timer &aSecondTimer, uint32_t aNow)
+bool Timer::DoesFireBefore(const Timer &aSecondTimer, Time aNow)
{
bool retval;
- bool isBeforeNow = TimerScheduler::IsStrictlyBefore(GetFireTime(), aNow);
+ bool isBeforeNow = (GetFireTime() < aNow);
// Check if one timer is before `now` and the other one is not.
- if (TimerScheduler::IsStrictlyBefore(aSecondTimer.GetFireTime(), aNow) != isBeforeNow)
+ if ((aSecondTimer.GetFireTime() < aNow) != isBeforeNow)
{
// One timer is before `now` and the other one is not, so if this timer's fire time is before `now` then
// the second fire time would be after `now` and this timer would fire before the second timer.
@@ -62,19 +62,37 @@
// Both timers are before `now` or both are after `now`. Either way the difference is guaranteed to be less
// than `kMaxDt` so we can safely compare the fire times directly.
- retval = TimerScheduler::IsStrictlyBefore(GetFireTime(), aSecondTimer.GetFireTime());
+ retval = GetFireTime() < aSecondTimer.GetFireTime();
}
return retval;
}
-void TimerMilli::StartAt(uint32_t aT0, uint32_t aDt)
+void TimerMilli::Start(uint32_t aDelay)
{
- assert(aDt <= kMaxDt);
- mFireTime = aT0 + aDt;
+ StartAt(GetNow(), aDelay);
+}
+
+void TimerMilli::StartAt(TimeMilli aStartTime, uint32_t aDelay)
+{
+ assert(aDelay <= kMaxDelay);
+ FireAt(aStartTime + aDelay);
+}
+
+void TimerMilli::FireAt(TimeMilli aFireTime)
+{
+ mFireTime = aFireTime;
Get<TimerMilliScheduler>().Add(*this);
}
+void TimerMilli::FireAtIfEarlier(TimeMilli aFireTime)
+{
+ if (!IsRunning() || (mFireTime > aFireTime))
+ {
+ FireAt(aFireTime);
+ }
+}
+
void TimerMilli::Stop(void)
{
Get<TimerMilliScheduler>().Remove(*this);
@@ -82,71 +100,45 @@
void TimerScheduler::Add(Timer &aTimer, const AlarmApi &aAlarmApi)
{
+ Timer *prev = NULL;
+ Time now(aAlarmApi.AlarmGetNow());
+
Remove(aTimer, aAlarmApi);
- if (mHead == NULL)
+ for (Timer *cur = mTimerList.GetHead(); cur; prev = cur, cur = cur->GetNext())
{
- mHead = &aTimer;
- aTimer.mNext = NULL;
+ if (aTimer.DoesFireBefore(*cur, now))
+ {
+ break;
+ }
+ }
+
+ if (prev == NULL)
+ {
+ mTimerList.Push(aTimer);
SetAlarm(aAlarmApi);
}
else
{
- Timer *prev = NULL;
- Timer *cur;
-
- for (cur = mHead; cur; cur = cur->mNext)
- {
- if (aTimer.DoesFireBefore(*cur, aAlarmApi.AlarmGetNow()))
- {
- if (prev)
- {
- aTimer.mNext = cur;
- prev->mNext = &aTimer;
- }
- else
- {
- aTimer.mNext = mHead;
- mHead = &aTimer;
- SetAlarm(aAlarmApi);
- }
-
- break;
- }
-
- prev = cur;
- }
-
- if (cur == NULL)
- {
- prev->mNext = &aTimer;
- aTimer.mNext = NULL;
- }
+ mTimerList.PushAfter(aTimer, *prev);
}
}
void TimerScheduler::Remove(Timer &aTimer, const AlarmApi &aAlarmApi)
{
- VerifyOrExit(aTimer.mNext != &aTimer);
+ VerifyOrExit(aTimer.IsRunning());
- if (mHead == &aTimer)
+ if (mTimerList.GetHead() == &aTimer)
{
- mHead = aTimer.mNext;
+ mTimerList.Pop();
SetAlarm(aAlarmApi);
}
else
{
- for (Timer *cur = mHead; cur; cur = cur->mNext)
- {
- if (cur->mNext == &aTimer)
- {
- cur->mNext = aTimer.mNext;
- break;
- }
- }
+ mTimerList.Remove(aTimer);
}
- aTimer.mNext = &aTimer;
+ aTimer.SetNext(&aTimer);
exit:
return;
@@ -154,51 +146,42 @@
void TimerScheduler::SetAlarm(const AlarmApi &aAlarmApi)
{
- if (mHead == NULL)
+ if (mTimerList.IsEmpty())
{
aAlarmApi.AlarmStop(&GetInstance());
}
else
{
- uint32_t now = aAlarmApi.AlarmGetNow();
- uint32_t remaining = IsStrictlyBefore(now, mHead->mFireTime) ? (mHead->mFireTime - now) : 0;
+ Timer * timer = mTimerList.GetHead();
+ Time now(aAlarmApi.AlarmGetNow());
+ uint32_t remaining;
- aAlarmApi.AlarmStartAt(&GetInstance(), now, remaining);
+ remaining = (now < timer->mFireTime) ? (timer->mFireTime - now) : 0;
+
+ aAlarmApi.AlarmStartAt(&GetInstance(), now.GetValue(), remaining);
}
}
void TimerScheduler::ProcessTimers(const AlarmApi &aAlarmApi)
{
- Timer *timer = mHead;
+ Timer *timer = mTimerList.GetHead();
if (timer)
{
- if (!IsStrictlyBefore(aAlarmApi.AlarmGetNow(), timer->mFireTime))
+ Time now(aAlarmApi.AlarmGetNow());
+
+ if (now >= timer->mFireTime)
{
- Remove(*timer, aAlarmApi);
+ Remove(*timer, aAlarmApi); // `Remove()` will `SetAlarm` for next timer if there is any.
timer->Fired();
- }
- else
- {
- SetAlarm(aAlarmApi);
+ ExitNow();
}
}
- else
- {
- SetAlarm(aAlarmApi);
- }
-}
-bool TimerScheduler::IsStrictlyBefore(uint32_t aTimeA, uint32_t aTimeB)
-{
- uint32_t diff = aTimeA - aTimeB;
+ SetAlarm(aAlarmApi);
- // Three cases:
- // 1) aTimeA is before aTimeB => Difference is negative (last bit of difference is set) => Returning true.
- // 2) aTimeA is same as aTimeB => Difference is zero (last bit of difference is clear) => Returning false.
- // 3) aTimeA is after aTimeB => Difference is positive (last bit of difference is clear) => Returning false.
-
- return ((diff & (1UL << 31)) != 0);
+exit:
+ return;
}
extern "C" void otPlatAlarmMilliFired(otInstance *aInstance)
@@ -215,11 +198,20 @@
#if OPENTHREAD_CONFIG_PLATFORM_USEC_TIMER_ENABLE
const TimerScheduler::AlarmApi TimerMicroScheduler::sAlarmMicroApi = {&otPlatAlarmMicroStartAt, &otPlatAlarmMicroStop,
&otPlatAlarmMicroGetNow};
-
-void TimerMicro::StartAt(uint32_t aT0, uint32_t aDt)
+void TimerMicro::Start(uint32_t aDelay)
{
- assert(aDt <= kMaxDt);
- mFireTime = aT0 + aDt;
+ StartAt(GetNow(), aDelay);
+}
+
+void TimerMicro::StartAt(TimeMicro aStartTime, uint32_t aDelay)
+{
+ assert(aDelay <= kMaxDelay);
+ FireAt(aStartTime + aDelay);
+}
+
+void TimerMicro::FireAt(TimeMicro aFireTime)
+{
+ mFireTime = aFireTime;
Get<TimerMicroScheduler>().Add(*this);
}
diff --git a/src/core/common/timer.hpp b/src/core/common/timer.hpp
index 3e000a3..1b899a9 100644
--- a/src/core/common/timer.hpp
+++ b/src/core/common/timer.hpp
@@ -43,8 +43,10 @@
#include <openthread/platform/alarm-milli.h>
#include "common/debug.hpp"
+#include "common/linked_list.hpp"
#include "common/locator.hpp"
#include "common/tasklet.hpp"
+#include "common/time.hpp"
namespace ot {
@@ -64,14 +66,17 @@
* This class implements a timer.
*
*/
-class Timer : public InstanceLocator, public OwnerLocator
+class Timer : public InstanceLocator, public OwnerLocator, public LinkedListEntry<Timer>
{
friend class TimerScheduler;
+ friend class LinkedListEntry<Timer>;
public:
- static const uint32_t kMaxDt =
- (1UL << 31) - 1; ///< Maximum permitted value for parameter `aDt` in `Start` and `StartAt` method.
- static const uint32_t kForeverDt = 0xffffffff; ///< The special forever `aDt` value.
+ /**
+ * This constant defines maximum delay allowed when starting a timer.
+ *
+ */
+ static const uint32_t kMaxDelay = (Time::kMaxDuration >> 1);
/**
* This function pointer is called when the timer expires.
@@ -93,7 +98,7 @@
: InstanceLocator(aInstance)
, OwnerLocator(aOwner)
, mHandler(aHandler)
- , mFireTime(0)
+ , mFireTime()
, mNext(this)
{
}
@@ -101,10 +106,10 @@
/**
* This method returns the fire time of the timer.
*
- * @returns The fire time in milliseconds.
+ * @returns The fire time.
*
*/
- uint32_t GetFireTime(void) const { return mFireTime; }
+ Time GetFireTime(void) const { return mFireTime; }
/**
* This method indicates whether or not the timer instance is running.
@@ -126,13 +131,13 @@
* @retval FALSE If the fire time of this timer object is the same or after aTimer's fire time.
*
*/
- bool DoesFireBefore(const Timer &aSecondTimer, uint32_t aNow);
+ bool DoesFireBefore(const Timer &aSecondTimer, Time aNow);
void Fired(void) { mHandler(*this); }
- Handler mHandler;
- uint32_t mFireTime;
- Timer * mNext;
+ Handler mHandler;
+ Time mFireTime;
+ Timer * mNext;
};
/**
@@ -156,23 +161,38 @@
}
/**
- * This method schedules the timer to fire a @p dt milliseconds from now.
+ * This method schedules the timer to fire after a given delay (in milliseconds) from now.
*
- * @param[in] aDt The expire time in milliseconds from now.
- * (aDt must be smaller than or equal to kMaxDt).
+ * @param[in] aDelay The delay in milliseconds. It must not be longer than `kMaxDelay`.
*
*/
- void Start(uint32_t aDt) { StartAt(GetNow(), aDt); }
+ void Start(uint32_t aDelay);
/**
- * This method schedules the timer to fire at @p aDt milliseconds from @p aT0.
+ * This method schedules the timer to fire after a given delay (in milliseconds) from a given start time.
*
- * @param[in] aT0 The start time in milliseconds.
- * @param[in] aDt The expire time in milliseconds from @p aT0.
- * (aDt must be smaller than or equal to kMaxDt).
+ * @param[in] aStartTime The start time.
+ * @param[in] aDelay The delay in milliseconds. It must not be longer than `kMaxDelay`.
*
*/
- void StartAt(uint32_t aT0, uint32_t aDt);
+ void StartAt(TimeMilli sStartTime, uint32_t aDelay);
+
+ /**
+ * This method schedules the timer to fire at a given fire time.
+ *
+ * @param[in] aFireTime The fire time.
+ *
+ */
+ void FireAt(TimeMilli aFireTime);
+
+ /**
+ * This method (re-)schedules the timer with a given a fire time only if the timer is not running or the new given
+ * fire time is earlier than the current fire time.
+ *
+ * @param[in] aFireTime The fire time.
+ *
+ */
+ void FireAtIfEarlier(TimeMilli aFireTime);
/**
* This method stops the timer.
@@ -181,68 +201,12 @@
void Stop(void);
/**
- * This static method returns the time diff in milliseconds between @p aStart and @p aEnd.
- *
- * @param[in] aStart The start time.
- * @param[in] aEnd The end time.
- *
- * @returns The time diff in milliseconds.
- *
- */
- static int32_t Diff(uint32_t aStart, uint32_t aEnd)
- {
- uint32_t diff = aEnd - aStart;
- return reinterpret_cast<int32_t &>(diff);
- }
-
- /**
- * This static method returns the time elapsed in milliseconds from @p aStart to @p aEnd.
- *
- * @note This method assumes @p aEnd is after @p aStart.
- *
- * @param[in] aStart The start time.
- * @param[in] aEnd The end time.
- *
- * @returns The elapsed time in milliseconds.
- *
- */
- static uint32_t Elapsed(uint32_t aStart, uint32_t aEnd) { return aEnd - aStart; }
-
- /**
- * This static method returns the time passed in milliseconds since @p aStart.
- *
- * @note This method assumes now is after @p aStart.
- *
- * @param[in] aStart The start time.
- *
- * @returns The elapsed time in milliseconds.
- *
- */
- static uint32_t Elapsed(uint32_t aStart) { return Elapsed(aStart, GetNow()); }
-
- /**
* This static method returns the current time in milliseconds.
*
* @returns The current time in milliseconds.
*
*/
- static uint32_t GetNow(void) { return otPlatAlarmMilliGetNow(); }
-
- /**
- * This static method returns the number of milliseconds given seconds.
- *
- * @returns The number of milliseconds.
- *
- */
- static uint32_t SecToMsec(uint32_t aSeconds) { return aSeconds * 1000u; }
-
- /**
- * This static method returns the number of seconds given milliseconds.
- *
- * @returns The number of seconds.
- *
- */
- static uint32_t MsecToSec(uint32_t aMilliseconds) { return aMilliseconds / 1000u; }
+ static TimeMilli GetNow(void) { return TimeMilli(otPlatAlarmMilliGetNow()); }
};
/**
@@ -291,22 +255,6 @@
{
friend class Timer;
-public:
- /**
- * This static method compares two times and indicates if the first time is strictly before (earlier) than the
- * second time.
- *
- * This method requires that the difference between the two given times to be smaller than kMaxDt.
- *
- * @param[in] aTimerA The first time for comparison.
- * @param[in] aTimerB The second time for comparison.
- *
- * @returns TRUE if aTimeA is before aTimeB.
- * @returns FALSE if aTimeA is same time or after aTimeB.
- *
- */
- static bool IsStrictlyBefore(uint32_t aTimeA, uint32_t aTimeB);
-
protected:
/**
* The Alarm APIs definition
@@ -327,7 +275,7 @@
*/
explicit TimerScheduler(Instance &aInstance)
: InstanceLocator(aInstance)
- , mHead(NULL)
+ , mTimerList()
{
}
@@ -365,7 +313,7 @@
*/
void SetAlarm(const AlarmApi &aAlarmApi);
- Timer *mHead;
+ LinkedList<Timer> mTimerList;
};
/**
@@ -436,23 +384,29 @@
}
/**
- * This method schedules the timer to fire a @p aDt microseconds from now.
+ * This method schedules the timer to fire after a given delay (in microseconds) from now.
*
- * @param[in] aDt The expire time in microseconds from now.
- * (aDt must be smaller than or equal to kMaxDt).
+ * @param[in] aDelay The delay in microseconds. It must not be be longer than `kMaxDelay`.
*
*/
- void Start(uint32_t aDt) { StartAt(GetNow(), aDt); }
+ void Start(uint32_t aDelay);
/**
- * This method schedules the timer to fire at @p aDt microseconds from @p aT0.
+ * This method schedules the timer to fire after a given delay (in microseconds) from a given start time.
*
- * @param[in] aT0 The start time in microseconds.
- * @param[in] aDt The expire time in microseconds from @p aT0.
- * (aDt must be smaller than or equal to kMaxDt).
+ * @param[in] aStartTime The start time.
+ * @param[in] aDelay The delay in microseconds. It must not be longer than `kMaxDelay`.
*
*/
- void StartAt(uint32_t aT0, uint32_t aDt);
+ void StartAt(TimeMicro aStartTime, uint32_t aDelay);
+
+ /**
+ * This method schedules the timer to fire at a given fire time.
+ *
+ * @param[in] aFireTime The fire time.
+ *
+ */
+ void FireAt(TimeMicro aFireTime);
/**
* This method stops the timer.
@@ -466,7 +420,7 @@
* @returns The current time in microseconds.
*
*/
- static uint32_t GetNow(void) { return otPlatAlarmMicroGetNow(); }
+ static TimeMicro GetNow(void) { return Time(otPlatAlarmMicroGetNow()); }
};
/**
diff --git a/src/core/common/tlvs.cpp b/src/core/common/tlvs.cpp
index 49ac454..3a79f33 100644
--- a/src/core/common/tlvs.cpp
+++ b/src/core/common/tlvs.cpp
@@ -34,24 +34,41 @@
#include "tlvs.hpp"
#include "common/code_utils.hpp"
+#include "common/debug.hpp"
#include "common/message.hpp"
namespace ot {
-otError Tlv::Get(const Message &aMessage, uint8_t aType, uint16_t aMaxLength, Tlv &aTlv)
+uint32_t Tlv::GetSize(void) const
{
- otError error = OT_ERROR_NOT_FOUND;
+ return IsExtended() ? sizeof(ExtendedTlv) + static_cast<const ExtendedTlv *>(this)->GetLength()
+ : sizeof(Tlv) + GetLength();
+}
+
+uint8_t *Tlv::GetValue(void)
+{
+ return reinterpret_cast<uint8_t *>(this) + (IsExtended() ? sizeof(ExtendedTlv) : sizeof(Tlv));
+}
+
+const uint8_t *Tlv::GetValue(void) const
+{
+ return reinterpret_cast<const uint8_t *>(this) + (IsExtended() ? sizeof(ExtendedTlv) : sizeof(Tlv));
+}
+
+otError Tlv::Get(const Message &aMessage, uint8_t aType, uint16_t aMaxSize, Tlv &aTlv)
+{
+ otError error;
uint16_t offset;
+ uint16_t size;
- SuccessOrExit(error = GetOffset(aMessage, aType, offset));
- aMessage.Read(offset, sizeof(Tlv), &aTlv);
+ SuccessOrExit(error = Find(aMessage, aType, &offset, &size, NULL));
- if (aMaxLength > sizeof(aTlv) + aTlv.GetLength())
+ if (aMaxSize > size)
{
- aMaxLength = sizeof(aTlv) + aTlv.GetLength();
+ aMaxSize = size;
}
- aMessage.Read(offset, aMaxLength, &aTlv);
+ aMessage.Read(offset, aMaxSize, &aTlv);
exit:
return error;
@@ -59,81 +76,102 @@
otError Tlv::GetOffset(const Message &aMessage, uint8_t aType, uint16_t &aOffset)
{
- otError error = OT_ERROR_NOT_FOUND;
- uint16_t offset = aMessage.GetOffset();
- uint16_t end = aMessage.GetLength();
- Tlv tlv;
+ return Find(aMessage, aType, &aOffset, NULL, NULL);
+}
- while (offset + sizeof(tlv) <= end)
+otError Tlv::GetValueOffset(const Message &aMessage, uint8_t aType, uint16_t &aValueOffset, uint16_t &aLength)
+{
+ otError error;
+ uint16_t offset;
+ uint16_t size;
+ bool isExtendedTlv;
+
+ SuccessOrExit(error = Find(aMessage, aType, &offset, &size, &isExtendedTlv));
+
+ if (!isExtendedTlv)
{
- uint32_t length = sizeof(tlv);
-
- aMessage.Read(offset, sizeof(tlv), &tlv);
-
- if (tlv.GetLength() != kExtendedLength)
- {
- length += tlv.GetLength();
- }
- else
- {
- uint16_t extLength;
-
- VerifyOrExit(sizeof(extLength) == aMessage.Read(offset + sizeof(tlv), sizeof(extLength), &extLength));
- length += sizeof(extLength) + HostSwap16(extLength);
- }
-
- VerifyOrExit(offset + length <= end);
-
- if (tlv.GetType() == aType)
- {
- aOffset = offset;
- ExitNow(error = OT_ERROR_NONE);
- }
-
- offset += static_cast<uint16_t>(length);
+ aValueOffset = offset + sizeof(Tlv);
+ aLength = size - sizeof(Tlv);
+ }
+ else
+ {
+ aValueOffset = offset + sizeof(ExtendedTlv);
+ aLength = size - sizeof(ExtendedTlv);
}
exit:
return error;
}
-otError Tlv::GetValueOffset(const Message &aMessage, uint8_t aType, uint16_t &aOffset, uint16_t &aLength)
+otError Tlv::Find(const Message &aMessage, uint8_t aType, uint16_t *aOffset, uint16_t *aSize, bool *aIsExtendedTlv)
{
- otError error = OT_ERROR_NOT_FOUND;
- uint16_t offset = aMessage.GetOffset();
- uint16_t end = aMessage.GetLength();
+ otError error = OT_ERROR_NOT_FOUND;
+ uint16_t offset = aMessage.GetOffset();
+ uint16_t remainingLen = aMessage.GetLength();
Tlv tlv;
+ uint32_t size;
- while (offset + sizeof(tlv) <= end)
+ VerifyOrExit(offset <= remainingLen);
+ remainingLen -= offset;
+
+ while (true)
{
- uint16_t length;
+ VerifyOrExit(sizeof(Tlv) <= remainingLen);
+ aMessage.Read(offset, sizeof(Tlv), &tlv);
- aMessage.Read(offset, sizeof(tlv), &tlv);
- offset += sizeof(tlv);
- length = tlv.GetLength();
-
- if (length == kExtendedLength)
+ if (tlv.mLength != kExtendedLength)
{
- VerifyOrExit(offset + sizeof(length) <= end);
- aMessage.Read(offset, sizeof(length), &length);
- offset += sizeof(length);
- length = HostSwap16(length);
+ size = tlv.GetSize();
+ }
+ else
+ {
+ ExtendedTlv extTlv;
+
+ VerifyOrExit(sizeof(ExtendedTlv) <= remainingLen);
+ aMessage.Read(offset, sizeof(ExtendedTlv), &extTlv);
+
+ VerifyOrExit(extTlv.GetLength() <= (remainingLen - sizeof(ExtendedTlv)));
+ size = extTlv.GetSize();
}
- VerifyOrExit(length <= end - offset);
+ VerifyOrExit(size <= remainingLen);
if (tlv.GetType() == aType)
{
- aOffset = offset;
- aLength = length;
- ExitNow(error = OT_ERROR_NONE);
+ if (aOffset != NULL)
+ {
+ *aOffset = offset;
+ }
+
+ if (aSize != NULL)
+ {
+ *aSize = static_cast<uint16_t>(size);
+ }
+
+ if (aIsExtendedTlv != NULL)
+ {
+ *aIsExtendedTlv = (tlv.mLength == kExtendedLength);
+ }
+
+ error = OT_ERROR_NONE;
+ ExitNow();
}
- offset += length;
+ offset += size;
+ remainingLen -= size;
}
exit:
return error;
}
+otError Tlv::AppendTo(Message &aMessage) const
+{
+ uint32_t size = GetSize();
+
+ assert(size <= UINT16_MAX);
+
+ return aMessage.Append(this, static_cast<uint16_t>(size));
+}
+
} // namespace ot
diff --git a/src/core/common/tlvs.hpp b/src/core/common/tlvs.hpp
index a0a42fc..0931929 100644
--- a/src/core/common/tlvs.hpp
+++ b/src/core/common/tlvs.hpp
@@ -36,8 +36,6 @@
#include "openthread-core-config.h"
-#include "utils/wrap_string.h"
-
#include <openthread/error.h>
#include <openthread/platform/toolchain.h>
@@ -59,6 +57,15 @@
{
public:
/**
+ * Length values.
+ *
+ */
+ enum
+ {
+ kBaseTlvMaxLength = 254, ///< The maximum length of the Base TLV format.
+ };
+
+ /**
* This method returns the Type value.
*
* @returns The Type value.
@@ -75,8 +82,21 @@
void SetType(uint8_t aType) { mType = aType; }
/**
+ * This method indicates whether the TLV is an Extended TLV.
+ *
+ * @retval TRUE If the TLV is an Extended TLV.
+ * @retval FALSE If the TLV is not an Extended TLV.
+ *
+ */
+ bool IsExtended(void) const { return (mLength == kExtendedLength); }
+
+ /**
* This method returns the Length value.
*
+ * @note This method should be used when TLV is not an Extended TLV, otherwise the returned length from this method
+ * would not be correct. When TLV is an Extended TLV, the TLV should be down-casted to the `ExtendedTlv` type and
+ * the `ExtendedTlv::GetLength()` should be used instead.
+ *
* @returns The Length value.
*
*/
@@ -91,65 +111,79 @@
void SetLength(uint8_t aLength) { mLength = aLength; }
/**
- * This method returns the total size including Type, Length, and Value fields.
+ * This method returns the TLV's total size (number of bytes) including Type, Length, and Value fields.
+ *
+ * This method correctly returns the TLV size independent of whether the TLV is an Extended TLV or not.
*
* @returns The total size include Type, Length, and Value fields.
*
*/
- uint16_t GetSize(void) const { return sizeof(Tlv) + mLength; }
+ uint32_t GetSize(void) const;
/**
* This method returns a pointer to the Value.
*
+ * This method can be used independent of whether the TLV is an Extended TLV or not.
+ *
* @returns A pointer to the value.
*
*/
- uint8_t *GetValue(void) { return reinterpret_cast<uint8_t *>(this) + sizeof(Tlv); }
+ uint8_t *GetValue(void);
/**
* This method returns a pointer to the Value.
*
+ * This method can be used independent of whether the TLV is an Extended TLV or not.
+ *
* @returns A pointer to the value.
*
*/
- const uint8_t *GetValue(void) const { return reinterpret_cast<const uint8_t *>(this) + sizeof(Tlv); }
+ const uint8_t *GetValue(void) const;
/**
* This method returns a pointer to the next TLV.
*
+ * This method correctly returns the next TLV independent of whether the current TLV is an Extended TLV or not.
+ *
* @returns A pointer to the next TLV.
*
*/
- Tlv *GetNext(void) { return reinterpret_cast<Tlv *>(reinterpret_cast<uint8_t *>(this) + sizeof(*this) + mLength); }
+ Tlv *GetNext(void) { return reinterpret_cast<Tlv *>(reinterpret_cast<uint8_t *>(this) + GetSize()); }
/**
* This method returns a pointer to the next TLV.
*
+ * This method correctly returns the next TLV independent of whether the current TLV is an Extended TLV or not.
+ *
* @returns A pointer to the next TLV.
*
*/
const Tlv *GetNext(void) const
{
- return reinterpret_cast<const Tlv *>(reinterpret_cast<const uint8_t *>(this) + sizeof(*this) + mLength);
+ return reinterpret_cast<const Tlv *>(reinterpret_cast<const uint8_t *>(this) + GetSize());
}
/**
* This static method reads the requested TLV out of @p aMessage.
*
+ * This method can be used independent of whether the read TLV (from message) is an Extended TLV or not.
+ *
* @param[in] aMessage A reference to the message.
* @param[in] aType The Type value to search for.
- * @param[in] aMaxLength Maximum number of bytes to read.
+ * @param[in] aMaxSize Maximum number of bytes to read.
* @param[out] aTlv A reference to the TLV that will be copied to.
*
* @retval OT_ERROR_NONE Successfully copied the TLV.
* @retval OT_ERROR_NOT_FOUND Could not find the TLV with Type @p aType.
*
*/
- static otError Get(const Message &aMessage, uint8_t aType, uint16_t aMaxLength, Tlv &aTlv);
+ static otError Get(const Message &aMessage, uint8_t aType, uint16_t aMaxSize, Tlv &aTlv);
/**
* This static method obtains the offset of a TLV within @p aMessage.
*
+ * This method can be used independent of whether the read TLV (from message) is an Extended TLV or not.
+ *
* @param[in] aMessage A reference to the message.
* @param[in] aType The Type value to search for.
* @param[out] aOffset A reference to the offset of the TLV.
@@ -163,6 +197,8 @@
/**
* This static method finds the offset and length of a given TLV type.
*
+ * This method can be used independent of whether the read TLV (from message) is an Extended TLV or not.
+ *
* @param[in] aMessage A reference to the message.
* @param[in] aType The Type value to search for.
* @param[out] aOffset The offset where the value starts.
@@ -174,17 +210,49 @@
*/
static otError GetValueOffset(const Message &aMessage, uint8_t aType, uint16_t &aOffset, uint16_t &aLength);
-protected:
/**
- * Length values.
+ * This method appends a TLV to the end of the message.
+ *
+ * On success, this method grows the message by the size of the TLV.
+ *
+ * @param[in] aMessage A reference to the message to append to.
+ *
+ * @retval OT_ERROR_NONE Successfully appended the TLV to the message.
+ * @retval OT_ERROR_NO_BUFS Insufficient available buffers to grow the message.
*
*/
+ otError AppendTo(Message &aMessage) const;
+
+protected:
enum
{
kExtendedLength = 255, ///< Extended Length value
};
private:
+ /**
+ * This private static method searches within a given message for TLV type and outputs the TLV offset, size and
+ * whether it is an Extended TLV.
+ *
+ * A NULL pointer can be used for output parameters @p aOffset, @p aSize, or @p aIsExtendedTlv if the parameter
+ * is not required.
+ *
+ * @param[in] aMessage A reference to the message to search within.
+ * @param[in] aType The TLV type to search for.
+ * @param[out] aOffset A pointer to a variable to output the offset to the start of the TLV.
+ * @param[out] aSize A pointer to a variable to output the size (total number of bytes) of the TLV.
+ * @param[out] aIsExtendedTlv A pointer to a boolean variable to output whether the found TLV is extended or not.
+ *
+ * @retval OT_ERROR_NONE Successfully found the TLV.
+ * @retval OT_ERROR_NOT_FOUND Could not find the TLV with Type @p aType.
+ *
+ */
+ static otError Find(const Message &aMessage,
+ uint8_t aType,
+ uint16_t * aOffset,
+ uint16_t * aSize,
+ bool * aIsExtendedTlv);
+
uint8_t mType;
uint8_t mLength;
} OT_TOOL_PACKED_END;
diff --git a/src/core/config/ip6.h b/src/core/config/ip6.h
index 4de1770..56320db 100644
--- a/src/core/config/ip6.h
+++ b/src/core/config/ip6.h
@@ -76,6 +76,38 @@
#endif
/**
+ * @def OPENTHREAD_CONFIG_ENABLE_IP6_FRAGMENTATION
+ *
+ * Define as 1 to enable IPv6 Fragmentation support.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE
+#define OPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE 0
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_IP6_MAX_ASSEMBLED_DATAGRAM
+ *
+ * This setting configures the max datagram length of a unfragmented IPv6 packet.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_IP6_MAX_ASSEMBLED_DATAGRAM
+#define OPENTHREAD_CONFIG_IP6_MAX_ASSEMBLED_DATAGRAM 2000
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_IP6_REASSEMBLY_TIMEOUT
+ *
+ * This setting configures the reassembly timeout for IPv6 in seconds.
+ *
+ * RFC 2460 \> 60 seconds
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_IP6_REASSEMBLY_TIMEOUT
+#define OPENTHREAD_CONFIG_IP6_REASSEMBLY_TIMEOUT 60
+#endif
+
+/**
* @def OPENTHREAD_CONFIG_IP6_SLAAC_ENABLE
*
* Define as 1 to enable support for adding of auto-configured SLAAC addresses by OpenThread.
diff --git a/src/core/config/link_quality.h b/src/core/config/link_quality.h
index c5f2bc4..f85c1a1 100644
--- a/src/core/config/link_quality.h
+++ b/src/core/config/link_quality.h
@@ -49,23 +49,8 @@
#endif
/**
- * @def OPENTHREAD_CONFIG_ENABLE_TX_ERROR_RATE_TRACKING
- *
- * Define as 1 to enable transmission error rate tracking (for both MAC frames and IPv6 messages).
- *
- * When enabled, OpenThread will track average error rate of MAC frame transmissions and IPv6 message error rate for
- * every neighbor.
- *
- */
-#ifndef OPENTHREAD_CONFIG_ENABLE_TX_ERROR_RATE_TRACKING
-#define OPENTHREAD_CONFIG_ENABLE_TX_ERROR_RATE_TRACKING 1
-#endif
-
-/**
* @def OPENTHREAD_CONFIG_FRAME_TX_ERR_RATE_AVERAGING_WINDOW
*
- * Applicable only if error rate tracking is enabled (i.e., `OPENTHREAD_CONFIG_ENABLE_TX_ERROR_RATE_TRACKING` is set).
- *
* OpenThread's MAC implementation maintains the average error rate of MAC frame transmissions per neighbor. This
* parameter specifies the window (in terms of number of frames/sample) over which the average error rate is maintained.
* Practically, the average value can be considered as the percentage of failed (no ack) MAC frame transmissions over
@@ -79,8 +64,6 @@
/**
* @def OPENTHREAD_CONFIG_IPV6_TX_ERR_RATE_AVERAGING_WINDOW
*
- * Applicable only if error rate tracking is enabled (i.e., `OPENTHREAD_CONFIG_ENABLE_TX_ERROR_RATE_TRACKING` is set).
- *
* OpenThread maintains the average error rate of IPv6 messages per neighbor. This parameter specifies the
* window (in terms of number of messages) over which the average error rate is maintained. Practically, the average
* value can be considered as the percentage of failed (no ack) messages over (approximately) last AVERAGING_WINDOW
diff --git a/src/core/config/logging.h b/src/core/config/logging.h
index b9f20d7..5a2bd8e 100644
--- a/src/core/config/logging.h
+++ b/src/core/config/logging.h
@@ -74,9 +74,8 @@
/**
* @def OPENTHREAD_CONFIG_LOG_LEVEL
*
- * The log level (used at compile time). If `OPENTHREAD_CONFIG_ENABLE_DYNAMIC_LOG_LEVEL`
- * is set, this defines the most verbose log level possible. See
- *`OPENTHREAD_CONFIG_INITIAL_LOG_LEVEL` to set the initial log level.
+ * The log level (used at compile time). If `OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE` is set, this defines the most
+ * verbose log level possible. See `OPENTHREAD_CONFIG_LOG_LEVEL_INIT` to set the initial log level.
*
*/
#ifndef OPENTHREAD_CONFIG_LOG_LEVEL
@@ -84,7 +83,7 @@
#endif
/**
- * @def OPENTHREAD_CONFIG_ENABLE_DYNAMIC_LOG_LEVEL
+ * @def OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE
*
* Define as 1 to enable dynamic log level control.
*
@@ -93,18 +92,18 @@
* decreasing the log level from the compile time value.
*
*/
-#ifndef OPENTHREAD_CONFIG_ENABLE_DYNAMIC_LOG_LEVEL
-#define OPENTHREAD_CONFIG_ENABLE_DYNAMIC_LOG_LEVEL 0
+#ifndef OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE
+#define OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE 0
#endif
/**
- * @def OPENTHREAD_CONFIG_INITIAL_LOG_LEVEL
+ * @def OPENTHREAD_CONFIG_LOG_LEVEL_INIT
*
* The initial log level used when OpenThread is initialized. See
- * `OPENTHREAD_CONFIG_ENABLE_DYNAMIC_LOG_LEVEL`.
+ * `OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE`.
*/
-#ifndef OPENTHREAD_CONFIG_INITIAL_LOG_LEVEL
-#define OPENTHREAD_CONFIG_INITIAL_LOG_LEVEL OPENTHREAD_CONFIG_LOG_LEVEL
+#ifndef OPENTHREAD_CONFIG_LOG_LEVEL_INIT
+#define OPENTHREAD_CONFIG_LOG_LEVEL_INIT OPENTHREAD_CONFIG_LOG_LEVEL
#endif
/**
diff --git a/src/core/config/mac.h b/src/core/config/mac.h
index f2cceee..bee1dea 100644
--- a/src/core/config/mac.h
+++ b/src/core/config/mac.h
@@ -35,6 +35,8 @@
#ifndef CONFIG_MAC_H_
#define CONFIG_MAC_H_
+#include "config/time_sync.h"
+
/**
* @def OPENTHREAD_CONFIG_MAC_MAX_CSMA_BACKOFFS_DIRECT
*
@@ -44,7 +46,7 @@
*
*/
#ifndef OPENTHREAD_CONFIG_MAC_MAX_CSMA_BACKOFFS_DIRECT
-#define OPENTHREAD_CONFIG_MAC_MAX_CSMA_BACKOFFS_DIRECT 32
+#define OPENTHREAD_CONFIG_MAC_MAX_CSMA_BACKOFFS_DIRECT 4
#endif
/**
@@ -60,27 +62,63 @@
#endif
/**
- * @def OPENTHREAD_CONFIG_MAC_MAX_FRAME_RETRIES_DIRECT
+ * @def OPENTHREAD_CONFIG_MAC_DEFAULT_MAX_FRAME_RETRIES_DIRECT
*
- * The maximum number of retries allowed after a transmission failure for direct transmissions.
+ * The default maximum number of retries allowed after a transmission failure for direct transmissions.
*
* Equivalent to macMaxFrameRetries, default value is 3.
*
*/
-#ifndef OPENTHREAD_CONFIG_MAC_MAX_FRAME_RETRIES_DIRECT
-#define OPENTHREAD_CONFIG_MAC_MAX_FRAME_RETRIES_DIRECT 3
+#ifndef OPENTHREAD_CONFIG_MAC_DEFAULT_MAX_FRAME_RETRIES_DIRECT
+#define OPENTHREAD_CONFIG_MAC_DEFAULT_MAX_FRAME_RETRIES_DIRECT 3
#endif
/**
- * @def OPENTHREAD_CONFIG_MAC_MAX_FRAME_RETRIES_INDIRECT
+ * @def OPENTHREAD_CONFIG_MAC_DEFAULT_MAX_FRAME_RETRIES_INDIRECT
*
- * The maximum number of retries allowed after a transmission failure for indirect transmissions.
+ * The default maximum number of retries allowed after a transmission failure for indirect transmissions.
*
* Equivalent to macMaxFrameRetries, default value is 0.
*
*/
-#ifndef OPENTHREAD_CONFIG_MAC_MAX_FRAME_RETRIES_INDIRECT
-#define OPENTHREAD_CONFIG_MAC_MAX_FRAME_RETRIES_INDIRECT 0
+#ifndef OPENTHREAD_CONFIG_MAC_DEFAULT_MAX_FRAME_RETRIES_INDIRECT
+#define OPENTHREAD_CONFIG_MAC_DEFAULT_MAX_FRAME_RETRIES_INDIRECT 0
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_ENABLE
+ *
+ * Define to 1 to enable MAC retry packets histogram analysis.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_ENABLE
+#define OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_ENABLE 0
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_MAX_SIZE_COUNT_DIRECT
+ *
+ * The default size of MAC histogram array for success message retry direct transmission.
+ *
+ * Default value is (OPENTHREAD_CONFIG_MAC_DEFAULT_MAX_FRAME_RETRIES_DIRECT + 1).
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_MAX_SIZE_COUNT_DIRECT
+#define OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_MAX_SIZE_COUNT_DIRECT \
+ (OPENTHREAD_CONFIG_MAC_DEFAULT_MAX_FRAME_RETRIES_DIRECT + 1)
+#endif
+
+/**
+ * @def OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_MAX_SIZE_COUNT_INDIRECT
+ *
+ * The default size of MAC histogram array for success message retry direct transmission.
+ *
+ * Default value is (OPENTHREAD_CONFIG_MAC_DEFAULT_MAX_FRAME_RETRIES_INDIRECT + 1).
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_MAX_SIZE_COUNT_INDIRECT
+#define OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_MAX_SIZE_COUNT_INDIRECT \
+ (OPENTHREAD_CONFIG_MAC_DEFAULT_MAX_FRAME_RETRIES_INDIRECT + 1)
#endif
/**
@@ -94,7 +132,7 @@
* Takes the place of macTransactionPersistenceTime. The time period is specified in units of IEEE 802.15.4 Data
* Request receptions, rather than being governed by macBeaconOrder.
*
- * @sa OPENTHREAD_CONFIG_MAC_MAX_FRAME_RETRIES_INDIRECT
+ * @sa OPENTHREAD_CONFIG_MAC_DEFAULT_MAX_FRAME_RETRIES_INDIRECT
*
*/
#ifndef OPENTHREAD_CONFIG_MAC_MAX_TX_ATTEMPTS_INDIRECT_POLLS
@@ -162,7 +200,7 @@
*
*/
#ifndef OPENTHREAD_CONFIG_MAC_JOIN_BEACON_VERSION
-#define OPENTHREAD_CONFIG_MAC_JOIN_BEACON_VERSION kProtocolVersion
+#define OPENTHREAD_CONFIG_MAC_JOIN_BEACON_VERSION OPENTHREAD_THREAD_VERSION
#endif
/**
diff --git a/src/core/config/openthread-core-config-check.h b/src/core/config/openthread-core-config-check.h
index 86bb5ba..c553356 100644
--- a/src/core/config/openthread-core-config-check.h
+++ b/src/core/config/openthread-core-config-check.h
@@ -42,6 +42,12 @@
#error "OPENTHREAD_ENABLE_DHCP6_MULTICAST_SOLICIT requires OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE to be also set."
#endif
+#if OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE
+#if OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE
+#error "Dynamic log level is not supported along with multiple OT instance feature"
+#endif
+#endif
+
/*
* Removed or replaced OPENTHREAD_CONFIG options.
*
@@ -430,4 +436,31 @@
"OPENTHREAD_CONFIG_INFORM_PREVIOUS_PARENT_ON_REATTACH was replaced by OPENTHREAD_CONFIG_MLE_INFORM_PREVIOUS_PARENT_ON_REATTACH."
#endif
+#ifdef OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_METRICS_ENABLE
+#error \
+ "OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_METRICS_ENABLE was replaced by OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE."
+#endif
+
+#ifdef OPENTHREAD_CONFIG_MAC_MAX_FRAME_RETRIES_DIRECT
+#error \
+ "OPENTHREAD_CONFIG_MAC_MAX_FRAME_RETRIES_DIRECT was replaced by OPENTHREAD_CONFIG_MAC_DEFAULT_MAX_FRAME_RETRIES_DIRECT."
+#endif
+
+#ifdef OPENTHREAD_CONFIG_MAC_MAX_FRAME_RETRIES_INDIRECT
+#error \
+ "OPENTHREAD_CONFIG_MAC_MAX_FRAME_RETRIES_INDIRECT was replaced by OPENTHREAD_CONFIG_MAC_DEFAULT_MAX_FRAME_RETRIES_INDIRECT."
+#endif
+
+#ifdef OPENTHREAD_CONFIG_ENABLE_TX_ERROR_RATE_TRACKING
+#error "OPENTHREAD_CONFIG_ENABLE_TX_ERROR_RATE_TRACKING was removed."
+#endif
+
+#ifdef OPENTHREAD_CONFIG_ENABLE_DYNAMIC_LOG_LEVEL
+#error "OPENTHREAD_CONFIG_ENABLE_DYNAMIC_LOG_LEVEL was replaced by OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE."
+#endif
+
+#ifdef OPENTHREAD_CONFIG_INITIAL_LOG_LEVEL
+#error "OPENTHREAD_CONFIG_INITIAL_LOG_LEVEL was replaced by OPENTHREAD_CONFIG_LOG_LEVEL_INIT."
+#endif
+
#endif // OPENTHREAD_CORE_CONFIG_CHECK_H_
diff --git a/src/core/config/openthread-core-default-config.h b/src/core/config/openthread-core-default-config.h
index 75c76a2..c55306d 100644
--- a/src/core/config/openthread-core-default-config.h
+++ b/src/core/config/openthread-core-default-config.h
@@ -6,7 +6,7 @@
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
- >* 2. Redistributions in binary form must reproduce the above copyright
+ * 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
@@ -35,6 +35,8 @@
#ifndef OPENTHREAD_CORE_DEFAULT_CONFIG_H_
#define OPENTHREAD_CORE_DEFAULT_CONFIG_H_
+#include "config/coap.h"
+
/**
* @def OPENTHREAD_CONFIG_STACK_VENDOR_OUI
*
@@ -76,26 +78,6 @@
#endif
/**
- * @def OPENTHREAD_CONFIG_BORDER_AGENT_ENABLE
- *
- * Define to 1 to enable the Border Agent service.
- *
- */
-#ifndef OPENTHREAD_CONFIG_BORDER_AGENT_ENABLE
-#define OPENTHREAD_CONFIG_BORDER_AGENT_ENABLE 0
-#endif
-
-/**
- * @def OPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE
- *
- * Define to 1 to enable the Border Router service.
- *
- */
-#ifndef OPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE
-#define OPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE 0
-#endif
-
-/**
* @def OPENTHREAD_CONFIG_ECDSA_ENABLE
*
* Define to 1 to enable ECDSA support.
@@ -261,6 +243,20 @@
#endif
/**
+ * @def OPENTHREAD_CONFIG_ENABLE_BUILTIN_MBEDTLS_MANAGEMENT
+ *
+ * Define as 1 to enable bultin mbedtls management.
+ *
+ * OPENTHREAD_CONFIG_ENABLE_BUILTIN_MBEDTLS_MANAGEMENT determines whether to manage mbedTLS memory
+ * allocation and debug config internally. If not configured, the default is to enable builtin
+ * management if builtin mbedtls is enabled and disable it otherwise.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_ENABLE_BUILTIN_MBEDTLS_MANAGEMENT
+#define OPENTHREAD_CONFIG_ENABLE_BUILTIN_MBEDTLS_MANAGEMENT OPENTHREAD_CONFIG_ENABLE_BUILTIN_MBEDTLS
+#endif
+
+/**
* @def OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE
*
* The size of heap buffer when DTLS is enabled.
@@ -270,7 +266,7 @@
#if OPENTHREAD_CONFIG_COAP_SECURE_API_ENABLE
#define OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE (3072 * sizeof(void *))
#else
-#define OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE (1536 * sizeof(void *))
+#define OPENTHREAD_CONFIG_HEAP_INTERNAL_SIZE (1568 * sizeof(void *))
#endif
#endif
@@ -285,6 +281,16 @@
#endif
/**
+ * @def OPENTHREAD_CONFIG_HEAP_EXTERNAL_ENABLE
+ *
+ * Enable the external heap.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_HEAP_EXTERNAL_ENABLE
+#define OPENTHREAD_CONFIG_HEAP_EXTERNAL_ENABLE 0
+#endif
+
+/**
* @def OPENTHREAD_CONFIG_DTLS_APPLICATION_DATA_MAX_LENGTH
*
* The size of dtls application data when the CoAP Secure API is enabled.
diff --git a/src/core/config/platform.h b/src/core/config/platform.h
index b45b166..35b8207 100644
--- a/src/core/config/platform.h
+++ b/src/core/config/platform.h
@@ -98,13 +98,13 @@
#endif
/**
- * @def OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_METRICS_ENABLE
+ * @def OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE
*
- * Define to 1 if you want to enable radio coexistence metrics implemented in platform.
+ * Define to 1 if you want to enable radio coexistence implemented in platform.
*
*/
-#ifndef OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_METRICS_ENABLE
-#define OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_METRICS_ENABLE 0
+#ifndef OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE
+#define OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE 0
#endif
#endif // CONFIG_PLATFORM_H_
diff --git a/src/core/crypto/mbedtls.cpp b/src/core/crypto/mbedtls.cpp
index c8dda75..a83d345 100644
--- a/src/core/crypto/mbedtls.cpp
+++ b/src/core/crypto/mbedtls.cpp
@@ -49,7 +49,7 @@
namespace ot {
namespace Crypto {
-#if !OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE && OPENTHREAD_CONFIG_ENABLE_BUILTIN_MBEDTLS
+#if !OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE && OPENTHREAD_CONFIG_ENABLE_BUILTIN_MBEDTLS_MANAGEMENT
static void *CAlloc(size_t aCount, size_t aSize)
{
@@ -61,17 +61,17 @@
Instance::Get().HeapFree(aPointer);
}
-#endif // !OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE && OPENTHREAD_CONFIG_ENABLE_BUILTIN_MBEDTLS
+#endif // !OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE && OPENTHREAD_CONFIG_ENABLE_BUILTIN_MBEDTLS_MANAGEMENT
MbedTls::MbedTls(void)
{
-#if !OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE && OPENTHREAD_CONFIG_ENABLE_BUILTIN_MBEDTLS
+#if !OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE && OPENTHREAD_CONFIG_ENABLE_BUILTIN_MBEDTLS_MANAGEMENT
#ifdef MBEDTLS_DEBUG_C
// mbedTLS's debug level is almost the same as OpenThread's
mbedtls_debug_set_threshold(OPENTHREAD_CONFIG_LOG_LEVEL);
#endif
mbedtls_platform_set_calloc_free(CAlloc, Free);
-#endif // !OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE && OPENTHREAD_CONFIG_ENABLE_BUILTIN_MBEDTLS
+#endif // !OPENTHREAD_CONFIG_MULTIPLE_INSTANCE_ENABLE && OPENTHREAD_CONFIG_ENABLE_BUILTIN_MBEDTLS_MANAGEMENT
}
otError MbedTls::MapError(int rval)
diff --git a/src/core/crypto/pbkdf2_cmac.cpp b/src/core/crypto/pbkdf2_cmac.cpp
index 992cbf8..ef14ee1 100644
--- a/src/core/crypto/pbkdf2_cmac.cpp
+++ b/src/core/crypto/pbkdf2_cmac.cpp
@@ -33,8 +33,9 @@
#include "pbkdf2_cmac.h"
+#include <string.h>
+
#include "common/debug.hpp"
-#include "utils/wrap_string.h"
#include <mbedtls/cmac.h>
diff --git a/src/core/crypto/pbkdf2_cmac.h b/src/core/crypto/pbkdf2_cmac.h
index 15cb60c..fffb5ba 100644
--- a/src/core/crypto/pbkdf2_cmac.h
+++ b/src/core/crypto/pbkdf2_cmac.h
@@ -37,10 +37,9 @@
#include "openthread-core-config.h"
+#include <stdbool.h>
#include <stdint.h>
-#include "utils/wrap_stdbool.h"
-
#ifdef __cplusplus
extern "C" {
#endif
diff --git a/src/core/diags/README.md b/src/core/diags/README.md
index 084d45f..879a25b 100644
--- a/src/core/diags/README.md
+++ b/src/core/diags/README.md
@@ -125,6 +125,15 @@
status 0x00
```
+### diag radio state
+
+Return the state of the radio.
+
+```bash
+> diag radio state
+sleep
+```
+
### diag stats
Print statistics during diagnostics mode.
diff --git a/src/core/diags/factory_diags.cpp b/src/core/diags/factory_diags.cpp
index 0297c01..b7f1798 100644
--- a/src/core/diags/factory_diags.cpp
+++ b/src/core/diags/factory_diags.cpp
@@ -44,7 +44,6 @@
#include "common/locator-getters.hpp"
#include "radio/radio.hpp"
#include "utils/parse_cmdline.hpp"
-#include "utils/wrap_string.h"
namespace ot {
namespace FactoryDiags {
@@ -138,7 +137,7 @@
, mTxLen(0)
, mRepeatActive(false)
{
- memset(&mStats, 0, sizeof(mStats));
+ mStats.Clear();
otPlatDiagChannelSet(mChannel);
otPlatDiagTxPowerSet(mTxPower);
@@ -272,7 +271,7 @@
SuccessOrExit(error = Get<Radio>().Receive(mChannel));
SuccessOrExit(error = Get<Radio>().SetTransmitPower(mTxPower));
otPlatDiagModeSet(true);
- memset(&mStats, 0, sizeof(mStats));
+ mStats.Clear();
snprintf(aOutput, aOutputMaxLen, "start diagnostics mode\r\nstatus 0x%02x\r\n", error);
exit:
@@ -287,7 +286,7 @@
if ((aArgCount == 1) && (strcmp(aArgVector[0], "clear") == 0))
{
- memset(&mStats, 0, sizeof(mStats));
+ mStats.Clear();
snprintf(aOutput, aOutputMaxLen, "stats cleared\r\n");
}
else
@@ -367,6 +366,35 @@
snprintf(aOutput, aOutputMaxLen, "set radio from sleep to receive on channel %d\r\nstatus 0x%02x\r\n", mChannel,
error);
}
+ else if (strcmp(aArgVector[0], "state") == 0)
+ {
+ otRadioState state = Get<Radio>().GetState();
+
+ error = OT_ERROR_NONE;
+
+ switch (state)
+ {
+ case OT_RADIO_STATE_DISABLED:
+ snprintf(aOutput, aOutputMaxLen, "disabled\r\n");
+ break;
+
+ case OT_RADIO_STATE_SLEEP:
+ snprintf(aOutput, aOutputMaxLen, "sleep\r\n");
+ break;
+
+ case OT_RADIO_STATE_RECEIVE:
+ snprintf(aOutput, aOutputMaxLen, "receive\r\n");
+ break;
+
+ case OT_RADIO_STATE_TRANSMIT:
+ snprintf(aOutput, aOutputMaxLen, "transmit\r\n");
+ break;
+
+ default:
+ snprintf(aOutput, aOutputMaxLen, "invalid\r\n");
+ break;
+ }
+ }
exit:
AppendErrorResult(error, aOutput, aOutputMaxLen);
@@ -423,13 +451,18 @@
if (mTxPackets > 1)
{
mTxPackets--;
- TransmitPacket();
+ }
+ else
+ {
+ ExitNow();
}
}
- else
- {
- TransmitPacket();
- }
+
+ VerifyOrExit(!mRepeatActive);
+ TransmitPacket();
+
+exit:
+ return;
}
#endif // OPENTHREAD_RADIO
@@ -462,7 +495,7 @@
char * argVector[kMaxArgs];
uint8_t argCount = 0;
- VerifyOrExit(strnlen(aString, kMaxCommandBuffer) < kMaxCommandBuffer, error = OT_ERROR_NO_BUFS);
+ VerifyOrExit(StringLength(aString, kMaxCommandBuffer) < kMaxCommandBuffer, error = OT_ERROR_NO_BUFS);
strcpy(buffer, aString);
error = ot::Utils::CmdLineParser::ParseCmd(buffer, argCount, argVector, kMaxArgs);
diff --git a/src/core/diags/factory_diags.hpp b/src/core/diags/factory_diags.hpp
index f10310c..56c3112 100644
--- a/src/core/diags/factory_diags.hpp
+++ b/src/core/diags/factory_diags.hpp
@@ -36,6 +36,8 @@
#include "openthread-core-config.h"
+#include <string.h>
+
#include <openthread/platform/radio.h>
#include "common/locator.hpp"
@@ -122,6 +124,8 @@
struct Stats
{
+ void Clear(void) { memset(this, 0, sizeof(*this)); }
+
uint32_t mReceivedPackets;
uint32_t mSentPackets;
int8_t mFirstRssi;
@@ -147,7 +151,7 @@
static const struct Command sCommands[];
#if !OPENTHREAD_RADIO
- struct Stats mStats;
+ Stats mStats;
otRadioFrame *mTxPacket;
uint32_t mTxPeriod;
diff --git a/src/core/mac/channel_mask.hpp b/src/core/mac/channel_mask.hpp
index 58b2cb7..2c7fc82 100644
--- a/src/core/mac/channel_mask.hpp
+++ b/src/core/mac/channel_mask.hpp
@@ -234,7 +234,7 @@
* @returns TRUE if the two masks are different, FALSE otherwise.
*
*/
- bool operator!=(const ChannelMask &aAnother) const { return (mMask != aAnother.mMask); }
+ bool operator!=(const ChannelMask &aAnother) const { return !(*this == aAnother); }
/**
* This method converts the channel mask into a human-readable string.
diff --git a/src/core/mac/data_poll_handler.cpp b/src/core/mac/data_poll_handler.cpp
index dc9d988..98978dc 100644
--- a/src/core/mac/data_poll_handler.cpp
+++ b/src/core/mac/data_poll_handler.cpp
@@ -79,7 +79,7 @@
void DataPollHandler::Clear(void)
{
- for (ChildTable::Iterator iter(GetInstance(), ChildTable::kInStateAnyExceptInvalid); !iter.IsDone(); iter++)
+ for (ChildTable::Iterator iter(GetInstance(), Child::kInStateAnyExceptInvalid); !iter.IsDone(); iter++)
{
Child &child = *iter.GetChild();
child.SetDataPollPending(false);
@@ -134,7 +134,7 @@
VerifyOrExit(Get<Mle::MleRouter>().GetRole() != OT_DEVICE_ROLE_DETACHED);
SuccessOrExit(aFrame.GetSrcAddr(macSource));
- child = Get<ChildTable>().FindChild(macSource, ChildTable::kInStateValidOrRestoring);
+ child = Get<ChildTable>().FindChild(macSource, Child::kInStateValidOrRestoring);
VerifyOrExit(child != NULL);
child->SetLastHeard(TimerMilli::GetNow());
@@ -154,8 +154,6 @@
ExitNow();
}
- VerifyOrExit(!Get<SourceMatchController>().IsEnabled() || (indirectMsgCount > 0));
-
if (mIndirectTxChild == NULL)
{
mIndirectTxChild = child;
@@ -252,7 +250,7 @@
ExitNow();
}
- if (aChild.GetIndirectTxAttempts() < kMaxPollTriggeredTxAttempts)
+ if ((aChild.GetIndirectTxAttempts() < kMaxPollTriggeredTxAttempts) && !aFrame.IsEmpty())
{
// We save the frame counter, key id, and data sequence number of
// current frame so we use the same values for the retransmission
@@ -291,7 +289,7 @@
void DataPollHandler::ProcessPendingPolls(void)
{
- for (ChildTable::Iterator iter(GetInstance(), ChildTable::kInStateValidOrRestoring); !iter.IsDone(); iter++)
+ for (ChildTable::Iterator iter(GetInstance(), Child::kInStateValidOrRestoring); !iter.IsDone(); iter++)
{
Child *child = iter.GetChild();
@@ -302,8 +300,7 @@
// Find the child with earliest poll receive time.
- if ((mIndirectTxChild == NULL) ||
- TimerScheduler::IsStrictlyBefore(child->GetLastHeard(), mIndirectTxChild->GetLastHeard()))
+ if ((mIndirectTxChild == NULL) || (child->GetLastHeard() < mIndirectTxChild->GetLastHeard()))
{
mIndirectTxChild = child;
}
diff --git a/src/core/mac/data_poll_sender.cpp b/src/core/mac/data_poll_sender.cpp
index 05d8840..e1395d1 100644
--- a/src/core/mac/data_poll_sender.cpp
+++ b/src/core/mac/data_poll_sender.cpp
@@ -62,6 +62,13 @@
{
}
+const Neighbor &DataPollSender::GetParent(void) const
+{
+ const Neighbor &parentCandidate = Get<Mle::MleRouter>().GetParentCandidate();
+
+ return parentCandidate.IsStateValid() ? parentCandidate : Get<Mle::MleRouter>().GetParent();
+}
+
otError DataPollSender::StartPolling(void)
{
otError error = OT_ERROR_NONE;
@@ -90,14 +97,12 @@
otError DataPollSender::SendDataPoll(void)
{
- otError error;
- Neighbor *parent;
+ otError error;
VerifyOrExit(mEnabled, error = OT_ERROR_INVALID_STATE);
VerifyOrExit(!Get<Mac::Mac>().GetRxOnWhenIdle(), error = OT_ERROR_INVALID_STATE);
- parent = Get<Mle::MleRouter>().GetParentCandidate();
- VerifyOrExit((parent != NULL) && parent->IsStateValidOrRestoring(), error = OT_ERROR_INVALID_STATE);
+ VerifyOrExit(GetParent().IsStateValidOrRestoring(), error = OT_ERROR_INVALID_STATE);
mTimer.Stop();
@@ -133,18 +138,20 @@
otError DataPollSender::GetPollDestinationAddress(Mac::Address &aDest) const
{
- otError error = OT_ERROR_NONE;
- Neighbor *parent = Get<Mle::MleRouter>().GetParentCandidate();
+ otError error = OT_ERROR_NONE;
+ const Neighbor &parent = GetParent();
- VerifyOrExit((parent != NULL) && parent->IsStateValidOrRestoring(), error = OT_ERROR_ABORT);
+ VerifyOrExit(parent.IsStateValidOrRestoring(), error = OT_ERROR_ABORT);
- if ((Get<Mac::Mac>().GetShortAddress() == Mac::kShortAddrInvalid) || (parent != Get<Mle::MleRouter>().GetParent()))
+ // Use extended address attaching to a new parent (i.e. parent is the parent candidate).
+ if ((Get<Mac::Mac>().GetShortAddress() == Mac::kShortAddrInvalid) ||
+ (&parent == &Get<Mle::MleRouter>().GetParentCandidate()))
{
- aDest.SetExtended(parent->GetExtAddress());
+ aDest.SetExtended(parent.GetExtAddress());
}
else
{
- aDest.SetShort(parent->GetRloc16());
+ aDest.SetShort(parent.GetRloc16());
}
exit:
@@ -182,15 +189,11 @@
uint32_t DataPollSender::GetKeepAlivePollPeriod(void) const
{
- uint32_t period = 0;
+ uint32_t period = GetDefaultPollPeriod();
if (mExternalPollPeriod != 0)
{
- period = mExternalPollPeriod;
- }
- else
- {
- period = GetDefaultPollPeriod();
+ UpdateIfLarger(period, mExternalPollPeriod);
}
return period;
@@ -203,10 +206,13 @@
VerifyOrExit(mEnabled);
- aFrame.GetDstAddr(macDest);
- Get<MeshForwarder>().UpdateNeighborOnSentFrame(aFrame, aError, macDest);
+ if (!aFrame.IsEmpty())
+ {
+ aFrame.GetDstAddr(macDest);
+ Get<MeshForwarder>().UpdateNeighborOnSentFrame(aFrame, aError, macDest);
+ }
- if (Get<Mle::MleRouter>().GetParentCandidate()->GetState() == Neighbor::kStateInvalid)
+ if (GetParent().IsStateInvalid())
{
StopPolling();
Get<Mle::MleRouter>().BecomeDetached();
@@ -390,8 +396,8 @@
void DataPollSender::ScheduleNextPoll(PollPeriodSelector aPollPeriodSelector)
{
- uint32_t now;
- uint32_t oldPeriod = mPollPeriod;
+ TimeMilli now;
+ uint32_t oldPeriod = mPollPeriod;
if (aPollPeriodSelector == kRecalculatePollPeriod)
{
@@ -412,7 +418,8 @@
// a switch to a shorter poll interval, the first data poll
// will not be sent too quickly (and possibly before the
// response is available/prepared on the parent node).
- if (TimerScheduler::IsStrictlyBefore(mTimerStartTime + mPollPeriod, now + kMinPollPeriod))
+
+ if (mTimerStartTime + mPollPeriod < now + kMinPollPeriod)
{
mTimer.StartAt(now, kMinPollPeriod);
}
@@ -430,47 +437,41 @@
}
}
+void DataPollSender::UpdateIfLarger(uint32_t &aPeriod, uint32_t aNewPeriod)
+{
+ if (aPeriod > aNewPeriod)
+ {
+ aPeriod = aNewPeriod;
+ }
+}
+
uint32_t DataPollSender::CalculatePollPeriod(void) const
{
- uint32_t period = 0;
+ uint32_t period = GetDefaultPollPeriod();
if (mAttachMode)
{
- period = kAttachDataPollPeriod;
+ UpdateIfLarger(period, kAttachDataPollPeriod);
}
if (mRetxMode)
{
- if ((period == 0) || (period > kRetxPollPeriod))
- {
- period = kRetxPollPeriod;
- }
+ UpdateIfLarger(period, kRetxPollPeriod);
}
if (mRemainingFastPolls != 0)
{
- if ((period == 0) || (period > kFastPollPeriod))
- {
- period = kFastPollPeriod;
- }
+ UpdateIfLarger(period, kFastPollPeriod);
}
if (mExternalPollPeriod != 0)
{
- if ((period == 0) || (period > mExternalPollPeriod))
- {
- period = mExternalPollPeriod;
- }
+ UpdateIfLarger(period, mExternalPollPeriod);
}
if (period == 0)
{
- period = GetDefaultPollPeriod();
-
- if (period == 0)
- {
- period = kMinPollPeriod;
- }
+ period = kMinPollPeriod;
}
return period;
@@ -483,7 +484,7 @@
uint32_t DataPollSender::GetDefaultPollPeriod(void) const
{
- return TimerMilli::SecToMsec(Get<Mle::MleRouter>().GetTimeout()) -
+ return Time::SecToMsec(Get<Mle::MleRouter>().GetTimeout()) -
static_cast<uint32_t>(kRetxPollPeriod) * kMaxPollRetxAttempts;
}
diff --git a/src/core/mac/data_poll_sender.hpp b/src/core/mac/data_poll_sender.hpp
index 1f3a3697..4d6dc40 100644
--- a/src/core/mac/data_poll_sender.hpp
+++ b/src/core/mac/data_poll_sender.hpp
@@ -40,6 +40,7 @@
#include "common/locator.hpp"
#include "common/timer.hpp"
#include "mac/mac_frame.hpp"
+#include "thread/topology.hpp"
namespace ot {
@@ -105,15 +106,16 @@
/**
* This method sets/clears a user-specified/external data poll period.
*
+ * Value of zero for `aPeriod` clears the user-specified poll period.
+ *
* If the user provides a non-zero poll period, the user value specifies the maximum period between data
* request transmissions. Note that OpenThread may send data request transmissions more frequently when expecting
- * a control-message from a parent or in case of data poll transmission failures or timeouts.
+ * a control-message from a parent or in case of data poll transmission failures or timeouts, or when the specified
+ * value is larger than the child timeout.
*
- * Minimal non-zero value should be `OPENTHREAD_CONFIG_MAC_MINIMUM_POLL_PERIOD` (10ms). Or zero to clear
- * user-specified poll period.
- *
- * User-specified value should be no more than the maximal value 0x3FFFFFF ((1 << 26) - 1) allowed, otherwise it
- * would be cilpped by the maximal value.
+ * A non-zero `aPeriod` should be larger than or equal to `OPENTHREAD_CONFIG_MAC_MINIMUM_POLL_PERIOD` (10ms) or
+ * this method returns `OT_ERROR_INVALID_ARGS`. If a non-zero `aPeriod` is larger than maximum value of
+ * `0x3FFFFFF ((1 << 26) - 1)`, it would be clipped to this value.
*
* @param[in] aPeriod The data poll period in milliseconds.
*
@@ -222,11 +224,25 @@
/**
* This method gets the maximum data polling period in use.
*
- * @returns the maximum data polling period in use.
+ * The maximum data poll period is determined based as the minimum of the user-specified poll interval and the
+ * default poll interval.
+ *
+ * @returns The maximum data polling period in use.
*
*/
uint32_t GetKeepAlivePollPeriod(void) const;
+ /**
+ * This method returns the default maximum poll period.
+ *
+ * The default poll period is determined based on the child timeout interval, ensuing the child would send data poll
+ * within the child's timeout.
+ *
+ * @returns The maximum default data polling interval (in msec).
+ *
+ */
+ uint32_t GetDefaultPollPeriod(void) const;
+
private:
enum // Poll period under different conditions (in milliseconds).
{
@@ -251,15 +267,16 @@
kRecalculatePollPeriod,
};
- void ScheduleNextPoll(PollPeriodSelector aPollPeriodSelector);
- uint32_t CalculatePollPeriod(void) const;
- static void HandlePollTimer(Timer &aTimer);
- uint32_t GetDefaultPollPeriod(void) const;
+ void ScheduleNextPoll(PollPeriodSelector aPollPeriodSelector);
+ uint32_t CalculatePollPeriod(void) const;
+ const Neighbor &GetParent(void) const;
+ static void HandlePollTimer(Timer &aTimer);
+ static void UpdateIfLarger(uint32_t &aPeriod, uint32_t aNewPeriod);
- uint32_t mTimerStartTime;
- uint32_t mPollPeriod;
- uint32_t mExternalPollPeriod : 26; //< In milliseconds.
- uint8_t mFastPollsUsers : 6; //< Number of callers which request fast polls.
+ TimeMilli mTimerStartTime;
+ uint32_t mPollPeriod;
+ uint32_t mExternalPollPeriod : 26; //< In milliseconds.
+ uint8_t mFastPollsUsers : 6; //< Number of callers which request fast polls.
TimerMilli mTimer;
diff --git a/src/core/mac/mac.cpp b/src/core/mac/mac.cpp
index 04cb73d..6c24620 100644
--- a/src/core/mac/mac.cpp
+++ b/src/core/mac/mac.cpp
@@ -34,7 +34,6 @@
#include "mac.hpp"
#include <stdio.h>
-#include "utils/wrap_string.h"
#include "common/code_utils.hpp"
#include "common/debug.hpp"
@@ -55,17 +54,18 @@
namespace ot {
namespace Mac {
-static const uint8_t sMode2Key[] = {0x78, 0x58, 0x16, 0x86, 0xfd, 0xb4, 0x58, 0x0f,
- 0xb0, 0x92, 0x54, 0x6a, 0xec, 0xbd, 0x15, 0x66};
+const uint8_t Mac::sMode2Key[] = {0x78, 0x58, 0x16, 0x86, 0xfd, 0xb4, 0x58, 0x0f,
+ 0xb0, 0x92, 0x54, 0x6a, 0xec, 0xbd, 0x15, 0x66};
-static const otExtAddress sMode2ExtAddress = {
+const otExtAddress Mac::sMode2ExtAddress = {
{0x35, 0x06, 0xfe, 0xb8, 0x23, 0xd4, 0x87, 0x12},
};
-static const otExtendedPanId sExtendedPanidInit = {
+const otExtendedPanId Mac::sExtendedPanidInit = {
{0xde, 0xad, 0x00, 0xbe, 0xef, 0x00, 0xca, 0xfe},
};
-static const char sNetworkNameInit[] = "OpenThread";
+
+const char Mac::sNetworkNameInit[] = "OpenThread";
Mac::Mac(Instance &aInstance)
: InstanceLocator(aInstance)
@@ -82,7 +82,9 @@
, mPendingWaitingForData(false)
, mShouldTxPollBeforeData(false)
, mRxOnWhenIdle(false)
+ , mPromiscuous(false)
, mBeaconsEnabled(false)
+ , mUsingTemporaryChannel(false)
#if OPENTHREAD_CONFIG_MAC_STAY_AWAKE_BETWEEN_FRAGMENTS
, mShouldDelaySleep(false)
, mDelayingSleep(false)
@@ -94,12 +96,17 @@
, mPanId(kPanIdBroadcast)
, mPanChannel(OPENTHREAD_CONFIG_DEFAULT_CHANNEL)
, mRadioChannel(OPENTHREAD_CONFIG_DEFAULT_CHANNEL)
- , mRadioChannelAcquisitionId(0)
, mSupportedChannelMask(Get<Radio>().GetSupportedChannelMask())
+ , mNetworkName()
, mScanChannel(Radio::kChannelMin)
, mScanDuration(0)
, mScanChannelMask()
- , mActiveScanHandler(NULL) /* Initialize `mActiveScanHandler` and `mEnergyScanHandler` union */
+ , mMaxFrameRetriesDirect(kDefaultMaxFrameRetriesDirect)
+#if OPENTHREAD_FTD
+ , mMaxFrameRetriesIndirect(kDefaultMaxFrameRetriesIndirect)
+#endif
+ , mActiveScanHandler(NULL) // Initialize `mActiveScanHandler` and `mEnergyScanHandler` union
+ , mScanHandlerContext(NULL)
, mSubMac(aInstance)
, mOperationTask(aInstance, &Mac::HandleOperationTask, this)
, mTimer(aInstance, &Mac::HandleTimer, this)
@@ -115,27 +122,27 @@
randomExtAddress.GenerateRandom();
mCcaSuccessRateTracker.Reset();
- memset(&mCounters, 0, sizeof(otMacCounters));
- memset(&mNetworkName, 0, sizeof(otNetworkName));
- memset(&mExtendedPanId, 0, sizeof(otExtendedPanId));
+ ResetCounters();
+ mExtendedPanId.Clear();
mSubMac.Enable();
- SetExtendedPanId(sExtendedPanidInit);
+ SetExtendedPanId(static_cast<const ExtendedPanId &>(sExtendedPanidInit));
SetNetworkName(sNetworkNameInit);
SetPanId(mPanId);
SetExtAddress(randomExtAddress);
SetShortAddress(GetShortAddress());
}
-otError Mac::ActiveScan(uint32_t aScanChannels, uint16_t aScanDuration, ActiveScanHandler aHandler)
+otError Mac::ActiveScan(uint32_t aScanChannels, uint16_t aScanDuration, ActiveScanHandler aHandler, void *aContext)
{
otError error = OT_ERROR_NONE;
VerifyOrExit(mEnabled, error = OT_ERROR_INVALID_STATE);
VerifyOrExit(!IsActiveScanInProgress() && !IsEnergyScanInProgress(), error = OT_ERROR_BUSY);
- mActiveScanHandler = aHandler;
+ mActiveScanHandler = aHandler;
+ mScanHandlerContext = aContext;
if (aScanDuration == 0)
{
@@ -148,14 +155,15 @@
return error;
}
-otError Mac::EnergyScan(uint32_t aScanChannels, uint16_t aScanDuration, EnergyScanHandler aHandler)
+otError Mac::EnergyScan(uint32_t aScanChannels, uint16_t aScanDuration, EnergyScanHandler aHandler, void *aContext)
{
otError error = OT_ERROR_NONE;
VerifyOrExit(mEnabled, error = OT_ERROR_INVALID_STATE);
VerifyOrExit(!IsActiveScanInProgress() && !IsEnergyScanInProgress(), error = OT_ERROR_BUSY);
- mEnergyScanHandler = aHandler;
+ mEnergyScanHandler = aHandler;
+ mScanHandlerContext = aContext;
Scan(kOperationEnergyScan, aScanChannels, aScanDuration);
@@ -205,15 +213,15 @@
return retval;
}
-otError Mac::ConvertBeaconToActiveScanResult(RxFrame *aBeaconFrame, otActiveScanResult &aResult)
+otError Mac::ConvertBeaconToActiveScanResult(const RxFrame *aBeaconFrame, ActiveScanResult &aResult)
{
- otError error = OT_ERROR_NONE;
- Address address;
- Beacon * beacon = NULL;
- BeaconPayload *beaconPayload = NULL;
- uint16_t payloadLength;
+ otError error = OT_ERROR_NONE;
+ Address address;
+ const Beacon * beacon = NULL;
+ const BeaconPayload *beaconPayload = NULL;
+ uint16_t payloadLength;
- memset(&aResult, 0, sizeof(otActiveScanResult));
+ memset(&aResult, 0, sizeof(ActiveScanResult));
VerifyOrExit(aBeaconFrame != NULL, error = OT_ERROR_INVALID_ARGS);
@@ -229,16 +237,16 @@
payloadLength = aBeaconFrame->GetPayloadLength();
- beacon = reinterpret_cast<Beacon *>(aBeaconFrame->GetPayload());
- beaconPayload = reinterpret_cast<BeaconPayload *>(beacon->GetPayload());
+ beacon = reinterpret_cast<const Beacon *>(aBeaconFrame->GetPayload());
+ beaconPayload = reinterpret_cast<const BeaconPayload *>(beacon->GetPayload());
if ((payloadLength >= (sizeof(*beacon) + sizeof(*beaconPayload))) && beacon->IsValid() && beaconPayload->IsValid())
{
aResult.mVersion = beaconPayload->GetProtocolVersion();
aResult.mIsJoinable = beaconPayload->IsJoiningPermitted();
aResult.mIsNative = beaconPayload->IsNative();
- memcpy(&aResult.mNetworkName, beaconPayload->GetNetworkName(), BeaconPayload::kNetworkNameSize);
- memcpy(&aResult.mExtendedPanId, beaconPayload->GetExtendedPanId(), BeaconPayload::kExtPanIdSize);
+ static_cast<NetworkName &>(aResult.mNetworkName).Set(beaconPayload->GetNetworkName());
+ aResult.mExtendedPanId = beaconPayload->GetExtendedPanId();
}
LogBeacon("Received", *beaconPayload);
@@ -270,11 +278,31 @@
{
mSubMac.SetPanId(mPanId);
FinishOperation();
- mActiveScanHandler(GetInstance(), NULL);
+ ReportActiveScanResult(NULL);
PerformNextOperation();
}
}
+void Mac::ReportActiveScanResult(const RxFrame *aBeaconFrame)
+{
+ VerifyOrExit(mActiveScanHandler != NULL);
+
+ if (aBeaconFrame == NULL)
+ {
+ mActiveScanHandler(NULL, mScanHandlerContext);
+ }
+ else
+ {
+ ActiveScanResult result;
+
+ SuccessOrExit(ConvertBeaconToActiveScanResult(aBeaconFrame, result));
+ mActiveScanHandler(&result, mScanHandlerContext);
+ }
+
+exit:
+ return;
+}
+
void Mac::PerformEnergyScan(void)
{
otError error = OT_ERROR_NONE;
@@ -300,22 +328,29 @@
if (error != OT_ERROR_NONE)
{
FinishOperation();
- mEnergyScanHandler(GetInstance(), NULL);
+
+ if (mEnergyScanHandler != NULL)
+ {
+ mEnergyScanHandler(NULL, mScanHandlerContext);
+ }
+
PerformNextOperation();
}
}
void Mac::ReportEnergyScanResult(int8_t aRssi)
{
- if (aRssi != kInvalidRssiValue)
- {
- otEnergyScanResult result;
+ EnergyScanResult result;
- result.mChannel = mScanChannel;
- result.mMaxRssi = aRssi;
+ VerifyOrExit((mEnergyScanHandler != NULL) && (aRssi != kInvalidRssiValue));
- mEnergyScanHandler(GetInstance(), &result);
- }
+ result.mChannel = mScanChannel;
+ result.mMaxRssi = aRssi;
+
+ mEnergyScanHandler(&result, mScanHandlerContext);
+
+exit:
+ return;
}
void Mac::EnergyScanDone(int8_t aEnergyScanMaxRssi)
@@ -368,13 +403,11 @@
VerifyOrExit(mSupportedChannelMask.ContainsChannel(aChannel), error = OT_ERROR_INVALID_ARGS);
- VerifyOrExit(mPanChannel != aChannel, Get<Notifier>().SignalIfFirst(OT_CHANGED_THREAD_CHANNEL));
+ SuccessOrExit(Get<Notifier>().Update(mPanChannel, aChannel, OT_CHANGED_THREAD_CHANNEL));
- mPanChannel = aChannel;
mCcaSuccessRateTracker.Reset();
- Get<Notifier>().Signal(OT_CHANGED_THREAD_CHANNEL);
- VerifyOrExit(!mRadioChannelAcquisitionId);
+ VerifyOrExit(!mUsingTemporaryChannel);
mRadioChannel = mPanChannel;
@@ -384,16 +417,14 @@
return error;
}
-otError Mac::SetRadioChannel(uint16_t aAcquisitionId, uint8_t aChannel)
+otError Mac::SetTemporaryChannel(uint8_t aChannel)
{
otError error = OT_ERROR_NONE;
VerifyOrExit(mSupportedChannelMask.ContainsChannel(aChannel), error = OT_ERROR_INVALID_ARGS);
- VerifyOrExit(mRadioChannelAcquisitionId && aAcquisitionId == mRadioChannelAcquisitionId,
- error = OT_ERROR_INVALID_STATE);
-
- mRadioChannel = aChannel;
+ mUsingTemporaryChannel = true;
+ mRadioChannel = aChannel;
UpdateIdleMode();
@@ -401,34 +432,14 @@
return error;
}
-otError Mac::AcquireRadioChannel(uint16_t *aAcquisitionId)
+void Mac::ClearTemporaryChannel(void)
{
- otError error = OT_ERROR_NONE;
-
- VerifyOrExit(aAcquisitionId != NULL, error = OT_ERROR_INVALID_ARGS);
- VerifyOrExit(!mRadioChannelAcquisitionId, error = OT_ERROR_INVALID_STATE);
-
- mRadioChannelAcquisitionId = Random::NonCrypto::GetUint16InRange(1, kMaxAcquisitionId);
-
- *aAcquisitionId = mRadioChannelAcquisitionId;
-
-exit:
- return error;
-}
-
-otError Mac::ReleaseRadioChannel(void)
-{
- otError error = OT_ERROR_NONE;
-
- VerifyOrExit(mRadioChannelAcquisitionId, error = OT_ERROR_INVALID_STATE);
-
- mRadioChannelAcquisitionId = 0;
- mRadioChannel = mPanChannel;
-
- UpdateIdleMode();
-
-exit:
- return error;
+ if (mUsingTemporaryChannel)
+ {
+ mUsingTemporaryChannel = false;
+ mRadioChannel = mPanChannel;
+ UpdateIdleMode();
+ }
}
void Mac::SetSupportedChannelMask(const ChannelMask &aMask)
@@ -436,26 +447,36 @@
ChannelMask newMask = aMask;
newMask.Intersect(ChannelMask(Get<Radio>().GetSupportedChannelMask()));
- VerifyOrExit(newMask != mSupportedChannelMask, Get<Notifier>().SignalIfFirst(OT_CHANGED_SUPPORTED_CHANNEL_MASK));
-
- mSupportedChannelMask = newMask;
- Get<Notifier>().Signal(OT_CHANGED_SUPPORTED_CHANNEL_MASK);
-
-exit:
- return;
+ Get<Notifier>().Update(mSupportedChannelMask, newMask, OT_CHANGED_SUPPORTED_CHANNEL_MASK);
}
-otError Mac::SetNetworkName(const char *aBuffer, uint8_t aLength)
+otError Mac::SetNetworkName(const char *aNameString)
{
- otError error = OT_ERROR_NONE;
- uint8_t newLen = static_cast<uint8_t>(strnlen(aBuffer, aLength));
+ // When setting Network Name from a string, we treat it as `Data`
+ // with `kMaxSize + 1` chars. `NetworkName::Set(data)` will look
+ // for null char in the data (within its given size) to calculate
+ // the name's length and ensure that the name fits in `kMaxSize`
+ // chars. The `+ 1` ensures that a `aNameString` with length
+ // longer than `kMaxSize` is correctly rejected (returning error
+ // `OT_ERROR_INVALID_ARGS`).
- VerifyOrExit(newLen <= OT_NETWORK_NAME_MAX_SIZE, error = OT_ERROR_INVALID_ARGS);
- VerifyOrExit(newLen != strlen(mNetworkName.m8) || memcmp(mNetworkName.m8, aBuffer, newLen) != 0,
- Get<Notifier>().SignalIfFirst(OT_CHANGED_THREAD_NETWORK_NAME));
+ NetworkName::Data data(aNameString, NetworkName::kMaxSize + 1);
- memcpy(mNetworkName.m8, aBuffer, newLen);
- mNetworkName.m8[newLen] = 0;
+ return SetNetworkName(data);
+}
+
+otError Mac::SetNetworkName(const NetworkName::Data &aName)
+{
+ otError error = mNetworkName.Set(aName);
+
+ if (error == OT_ERROR_ALREADY)
+ {
+ Get<Notifier>().SignalIfFirst(OT_CHANGED_THREAD_NETWORK_NAME);
+ error = OT_ERROR_NONE;
+ ExitNow();
+ }
+
+ SuccessOrExit(error);
Get<Notifier>().Signal(OT_CHANGED_THREAD_NETWORK_NAME);
exit:
@@ -464,25 +485,16 @@
void Mac::SetPanId(PanId aPanId)
{
- VerifyOrExit(mPanId != aPanId, Get<Notifier>().SignalIfFirst(OT_CHANGED_THREAD_PANID));
- mPanId = aPanId;
+ SuccessOrExit(Get<Notifier>().Update(mPanId, aPanId, OT_CHANGED_THREAD_PANID));
mSubMac.SetPanId(mPanId);
- Get<Notifier>().Signal(OT_CHANGED_THREAD_PANID);
exit:
return;
}
-void Mac::SetExtendedPanId(const otExtendedPanId &aExtendedPanId)
+void Mac::SetExtendedPanId(const ExtendedPanId &aExtendedPanId)
{
- VerifyOrExit(memcmp(mExtendedPanId.m8, aExtendedPanId.m8, sizeof(mExtendedPanId)) != 0,
- Get<Notifier>().SignalIfFirst(OT_CHANGED_THREAD_EXT_PANID));
-
- mExtendedPanId = aExtendedPanId;
- Get<Notifier>().Signal(OT_CHANGED_THREAD_EXT_PANID);
-
-exit:
- return;
+ Get<Notifier>().Update(mExtendedPanId, aExtendedPanId, OT_CHANGED_THREAD_EXT_PANID);
}
otError Mac::RequestDirectFrameTransmission(void)
@@ -722,6 +734,13 @@
{
mPendingTransmitDataDirect = false;
mOperation = kOperationTransmitDataDirect;
+
+ if (mPendingTransmitPoll)
+ {
+ // Ensure that a pending "transmit poll" operation request
+ // is prioritized over any future "transmit data" requests.
+ mShouldTxPollBeforeData = true;
+ }
}
if (mOperation != kOperationIdle)
@@ -815,7 +834,6 @@
void Mac::PrepareBeacon(TxFrame &aFrame)
{
- uint8_t numUnsecurePorts;
uint8_t beaconLength;
uint16_t fcf;
Beacon * beacon = NULL;
@@ -836,10 +854,7 @@
{
beaconPayload->Init();
- // set the Joining Permitted flag
- Get<Ip6::Filter>().GetUnsecurePorts(numUnsecurePorts);
-
- if (numUnsecurePorts)
+ if (IsJoinable())
{
beaconPayload->SetJoiningPermitted();
}
@@ -848,8 +863,8 @@
beaconPayload->ClearJoiningPermitted();
}
- beaconPayload->SetNetworkName(mNetworkName.m8);
- beaconPayload->SetExtendedPanId(mExtendedPanId.m8);
+ beaconPayload->SetNetworkName(mNetworkName.GetAsData());
+ beaconPayload->SetExtendedPanId(mExtendedPanId);
beaconLength += sizeof(*beaconPayload);
}
@@ -877,10 +892,7 @@
// false) but only if it is in joinable state (unsecure port
// list is not empty).
- uint8_t numUnsecurePorts;
-
- Get<Ip6::Filter>().GetUnsecurePorts(numUnsecurePorts);
- shouldSend = (numUnsecurePorts != 0);
+ shouldSend = IsJoinable();
}
#endif
@@ -888,29 +900,13 @@
return shouldSend;
}
-void Mac::ProcessTransmitAesCcm(TxFrame &aFrame, const ExtAddress *aExtAddress)
+bool Mac::IsJoinable(void) const
{
- uint32_t frameCounter = 0;
- uint8_t securityLevel;
- uint8_t nonce[KeyManager::kNonceSize];
- uint8_t tagLength;
- Crypto::AesCcm aesCcm;
- otError error;
+ uint8_t numUnsecurePorts;
- aFrame.GetSecurityLevel(securityLevel);
- aFrame.GetFrameCounter(frameCounter);
+ Get<Ip6::Filter>().GetUnsecurePorts(numUnsecurePorts);
- KeyManager::GenerateNonce(*aExtAddress, frameCounter, securityLevel, nonce);
-
- aesCcm.SetKey(aFrame.GetAesKey(), 16);
- tagLength = aFrame.GetFooterLength() - Frame::kFcsSize;
-
- error = aesCcm.Init(aFrame.GetHeaderLength(), aFrame.GetPayloadLength(), tagLength, nonce, sizeof(nonce));
- assert(error == OT_ERROR_NONE);
-
- aesCcm.Header(aFrame.GetHeader(), aFrame.GetHeaderLength());
- aesCcm.Payload(aFrame.GetPayload(), aFrame.GetPayload(), aFrame.GetPayloadLength(), true);
- aesCcm.Finalize(aFrame.GetFooter(), &tagLength);
+ return (numUnsecurePorts != 0);
}
void Mac::ProcessTransmitSecurity(TxFrame &aFrame, bool aProcessAesCcm)
@@ -975,7 +971,7 @@
if (aProcessAesCcm)
{
- ProcessTransmitAesCcm(aFrame, extAddress);
+ aFrame.ProcessTransmitAesCcm(*extAddress);
}
exit:
@@ -988,11 +984,9 @@
bool applyTransmitSecurity = true;
bool processTransmitAesCcm = true;
TxFrame &sendFrame = mSubMac.GetTransmitFrame();
-#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
- uint8_t timeIeOffset = 0;
-#endif
VerifyOrExit(mEnabled, error = OT_ERROR_ABORT);
+ sendFrame.SetIsARetransmission(false);
switch (mOperation)
{
@@ -1002,7 +996,7 @@
PrepareBeaconRequest(sendFrame);
sendFrame.SetSequence(0);
sendFrame.SetMaxCsmaBackoffs(kMaxCsmaBackoffsDirect);
- sendFrame.SetMaxFrameRetries(kMaxFrameRetriesDirect);
+ sendFrame.SetMaxFrameRetries(mMaxFrameRetriesDirect);
break;
case kOperationTransmitBeacon:
@@ -1010,7 +1004,7 @@
PrepareBeacon(sendFrame);
sendFrame.SetSequence(mBeaconSequence++);
sendFrame.SetMaxCsmaBackoffs(kMaxCsmaBackoffsDirect);
- sendFrame.SetMaxFrameRetries(kMaxFrameRetriesDirect);
+ sendFrame.SetMaxFrameRetries(mMaxFrameRetriesDirect);
break;
case kOperationTransmitPoll:
@@ -1018,13 +1012,13 @@
SuccessOrExit(error = PrepareDataRequest(sendFrame));
sendFrame.SetSequence(mDataSequence++);
sendFrame.SetMaxCsmaBackoffs(kMaxCsmaBackoffsDirect);
- sendFrame.SetMaxFrameRetries(kMaxFrameRetriesDirect);
+ sendFrame.SetMaxFrameRetries(mMaxFrameRetriesDirect);
break;
case kOperationTransmitDataDirect:
sendFrame.SetChannel(mRadioChannel);
sendFrame.SetMaxCsmaBackoffs(kMaxCsmaBackoffsDirect);
- sendFrame.SetMaxFrameRetries(kMaxFrameRetriesDirect);
+ sendFrame.SetMaxFrameRetries(mMaxFrameRetriesDirect);
SuccessOrExit(error = Get<MeshForwarder>().HandleFrameRequest(sendFrame));
sendFrame.SetSequence(mDataSequence++);
break;
@@ -1033,7 +1027,7 @@
case kOperationTransmitDataIndirect:
sendFrame.SetChannel(mRadioChannel);
sendFrame.SetMaxCsmaBackoffs(kMaxCsmaBackoffsIndirect);
- sendFrame.SetMaxFrameRetries(kMaxFrameRetriesIndirect);
+ sendFrame.SetMaxFrameRetries(mMaxFrameRetriesIndirect);
SuccessOrExit(error = Get<DataPollHandler>().HandleFrameRequest(sendFrame));
// If the frame is marked as a retransmission, then data sequence number is already set.
@@ -1055,21 +1049,23 @@
}
#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
- timeIeOffset = GetTimeIeOffset(sendFrame);
- sendFrame.SetTimeIeOffset(timeIeOffset);
-
- if (timeIeOffset != 0)
{
- // Transmit security will be processed after time IE content is updated.
- processTransmitAesCcm = false;
- sendFrame.SetTimeSyncSeq(Get<TimeSync>().GetTimeSyncSeq());
- sendFrame.SetNetworkTimeOffset(Get<TimeSync>().GetNetworkTimeOffset());
+ uint8_t timeIeOffset = GetTimeIeOffset(sendFrame);
+
+ sendFrame.SetTimeIeOffset(timeIeOffset);
+
+ if (timeIeOffset != 0)
+ {
+ // Transmit security will be processed after time IE content is updated.
+ processTransmitAesCcm = false;
+ sendFrame.SetTimeSyncSeq(Get<TimeSync>().GetTimeSyncSeq());
+ sendFrame.SetNetworkTimeOffset(Get<TimeSync>().GetNetworkTimeOffset());
+ }
}
#endif
if (applyTransmitSecurity)
{
- // Security Processing
ProcessTransmitSecurity(sendFrame, processTransmitAesCcm);
}
@@ -1089,6 +1085,13 @@
if (error != OT_ERROR_NONE)
{
+ // If the sendFrame could not be prepared and the tx is being
+ // aborted, we set the frame length to zero to mark it as empty.
+ // The empty frame helps differentiate between an aborted tx due
+ // to OpenThread itself not being able to prepare the frame, versus
+ // the radio platform aborting the tx operation.
+
+ sendFrame.SetLength(0);
HandleTransmitDone(sendFrame, NULL, OT_ERROR_ABORT);
}
}
@@ -1124,11 +1127,11 @@
Address dstAddr;
Neighbor *neighbor;
+ VerifyOrExit(!aFrame.IsEmpty());
+
aFrame.GetDstAddr(dstAddr);
neighbor = Get<Mle::MleRouter>().GetNeighbor(dstAddr);
-#if OPENTHREAD_CONFIG_ENABLE_TX_ERROR_RATE_TRACKING
-
// Record frame transmission success/failure state (for a neighbor).
if ((neighbor != NULL) && ackRequested)
@@ -1155,8 +1158,6 @@
}
}
-#endif // OPENTHREAD_CONFIG_ENABLE_TX_ERROR_RATE_TRACKING
-
// Log frame transmission failure.
if (aError != OT_ERROR_NONE)
@@ -1226,23 +1227,26 @@
void Mac::HandleTransmitDone(TxFrame &aFrame, RxFrame *aAckFrame, otError aError)
{
- Address dstAddr;
-
- // Determine whether to re-transmit a broadcast frame.
-
- aFrame.GetDstAddr(dstAddr);
-
- if (dstAddr.IsBroadcast())
+ if (!aFrame.IsEmpty())
{
- mBroadcastTransmitCount++;
+ Address dstAddr;
- if (mBroadcastTransmitCount < kTxNumBcast)
+ // Determine whether to re-transmit a broadcast frame.
+
+ aFrame.GetDstAddr(dstAddr);
+
+ if (dstAddr.IsBroadcast())
{
- mSubMac.Send();
- ExitNow();
- }
+ mBroadcastTransmitCount++;
- mBroadcastTransmitCount = 0;
+ if (mBroadcastTransmitCount < kTxNumBcast)
+ {
+ mSubMac.Send();
+ ExitNow();
+ }
+
+ mBroadcastTransmitCount = 0;
+ }
}
// Determine next action based on current operation.
@@ -1261,7 +1265,7 @@
break;
case kOperationTransmitPoll:
- assert(aFrame.GetAckRequest());
+ assert(aFrame.IsEmpty() || aFrame.GetAckRequest());
if ((aError == OT_ERROR_NONE) && (aAckFrame != NULL))
{
@@ -1284,6 +1288,18 @@
case kOperationTransmitDataDirect:
mCounters.mTxData++;
+
+ if (aError != OT_ERROR_NONE)
+ {
+ mCounters.mTxDirectMaxRetryExpiry++;
+ }
+#if OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_ENABLE
+ else if (mSubMac.GetTransmitRetries() < OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_MAX_SIZE_COUNT_DIRECT)
+ {
+ mRetryHistogram.mTxDirectRetrySuccess[mSubMac.GetTransmitRetries()]++;
+ }
+#endif
+
otDumpDebgMac("TX", aFrame.GetHeader(), aFrame.GetLength());
FinishOperation();
Get<MeshForwarder>().HandleSentFrame(aFrame, aError);
@@ -1293,6 +1309,18 @@
#if OPENTHREAD_FTD
case kOperationTransmitDataIndirect:
mCounters.mTxData++;
+
+ if (aError != OT_ERROR_NONE)
+ {
+ mCounters.mTxIndirectMaxRetryExpiry++;
+ }
+#if OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_ENABLE
+ else if (mSubMac.GetTransmitRetries() < OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_MAX_SIZE_COUNT_INDIRECT)
+ {
+ mRetryHistogram.mTxIndirectRetrySuccess[mSubMac.GetTransmitRetries()]++;
+ }
+#endif
+
otDumpDebgMac("TX", aFrame.GetHeader(), aFrame.GetLength());
FinishOperation();
Get<DataPollHandler>().HandleSentFrame(aFrame, aError);
@@ -1355,7 +1383,7 @@
otError Mac::ProcessReceiveSecurity(RxFrame &aFrame, const Address &aSrcAddr, Neighbor *aNeighbor)
{
KeyManager & keyManager = Get<KeyManager>();
- otError error = OT_ERROR_NONE;
+ otError error = OT_ERROR_SECURITY;
uint8_t securityLevel;
uint8_t keyIdMode;
uint32_t frameCounter;
@@ -1368,48 +1396,46 @@
const ExtAddress *extAddress;
Crypto::AesCcm aesCcm;
- VerifyOrExit(aFrame.GetSecurityEnabled());
+ VerifyOrExit(aFrame.GetSecurityEnabled(), error = OT_ERROR_NONE);
aFrame.GetSecurityLevel(securityLevel);
aFrame.GetFrameCounter(frameCounter);
- otLogDebgMac("Frame counter %u", frameCounter);
+ otLogDebgMac("Rx security - frame counter %u", frameCounter);
aFrame.GetKeyIdMode(keyIdMode);
switch (keyIdMode)
{
case Frame::kKeyIdMode0:
- VerifyOrExit((macKey = keyManager.GetKek()) != NULL, error = OT_ERROR_SECURITY);
+ macKey = keyManager.GetKek();
+ VerifyOrExit(macKey != NULL);
extAddress = &aSrcAddr.GetExtended();
break;
case Frame::kKeyIdMode1:
- VerifyOrExit(aNeighbor != NULL, error = OT_ERROR_SECURITY);
+ VerifyOrExit(aNeighbor != NULL);
aFrame.GetKeyId(keyid);
keyid--;
if (keyid == (keyManager.GetCurrentKeySequence() & 0x7f))
{
- // same key index
keySequence = keyManager.GetCurrentKeySequence();
macKey = keyManager.GetCurrentMacKey();
}
else if (keyid == ((keyManager.GetCurrentKeySequence() - 1) & 0x7f))
{
- // previous key index
keySequence = keyManager.GetCurrentKeySequence() - 1;
macKey = keyManager.GetTemporaryMacKey(keySequence);
}
else if (keyid == ((keyManager.GetCurrentKeySequence() + 1) & 0x7f))
{
- // next key index
keySequence = keyManager.GetCurrentKeySequence() + 1;
macKey = keyManager.GetTemporaryMacKey(keySequence);
}
else
{
- ExitNow(error = OT_ERROR_SECURITY);
+ ExitNow();
}
// If the frame is from a neighbor not in valid state (e.g., it is from a child being
@@ -1417,23 +1443,16 @@
// the tag/MIC. Such a frame is later filtered in `RxDoneTask` which only allows MAC
// Data Request frames from a child being restored.
- if (aNeighbor->GetState() == Neighbor::kStateValid)
+ if (aNeighbor->IsStateValid())
{
- if (keySequence < aNeighbor->GetKeySequence())
+ VerifyOrExit(keySequence >= aNeighbor->GetKeySequence());
+
+ if (keySequence == aNeighbor->GetKeySequence())
{
- ExitNow(error = OT_ERROR_SECURITY);
- }
- else if (keySequence == aNeighbor->GetKeySequence())
- {
- if ((frameCounter + 1) < aNeighbor->GetLinkFrameCounter())
- {
- ExitNow(error = OT_ERROR_SECURITY);
- }
- else if ((frameCounter + 1) == aNeighbor->GetLinkFrameCounter())
- {
- // drop duplicated frames
- ExitNow(error = OT_ERROR_DUPLICATED);
- }
+ // If frame counter is one off, then frame is a duplicate.
+ VerifyOrExit((frameCounter + 1) != aNeighbor->GetLinkFrameCounter(), error = OT_ERROR_DUPLICATED);
+
+ VerifyOrExit(frameCounter >= aNeighbor->GetLinkFrameCounter());
}
}
@@ -1447,7 +1466,7 @@
break;
default:
- ExitNow(error = OT_ERROR_SECURITY);
+ ExitNow();
break;
}
@@ -1456,24 +1475,23 @@
aesCcm.SetKey(macKey, 16);
- error = aesCcm.Init(aFrame.GetHeaderLength(), aFrame.GetPayloadLength(), tagLength, nonce, sizeof(nonce));
- VerifyOrExit(error == OT_ERROR_NONE, error = OT_ERROR_SECURITY);
+ SuccessOrExit(aesCcm.Init(aFrame.GetHeaderLength(), aFrame.GetPayloadLength(), tagLength, nonce, sizeof(nonce)));
aesCcm.Header(aFrame.GetHeader(), aFrame.GetHeaderLength());
#ifndef FUZZING_BUILD_MODE_UNSAFE_FOR_PRODUCTION
aesCcm.Payload(aFrame.GetPayload(), aFrame.GetPayload(), aFrame.GetPayloadLength(), false);
#else
- // for fuzz tests, execute AES but do not alter the payload
+ // For fuzz tests, execute AES but do not alter the payload
uint8_t fuzz[OT_RADIO_FRAME_MAX_SIZE];
aesCcm.Payload(fuzz, aFrame.GetPayload(), aFrame.GetPayloadLength(), false);
#endif
aesCcm.Finalize(tag, &tagLength);
#ifndef FUZZING_BUILD_MODE_UNSAFE_FOR_PRODUCTION
- VerifyOrExit(memcmp(tag, aFrame.GetFooter(), tagLength) == 0, error = OT_ERROR_SECURITY);
+ VerifyOrExit(memcmp(tag, aFrame.GetFooter(), tagLength) == 0);
#endif
- if ((keyIdMode == Frame::kKeyIdMode1) && (aNeighbor->GetState() == Neighbor::kStateValid))
+ if ((keyIdMode == Frame::kKeyIdMode1) && aNeighbor->IsStateValid())
{
if (aNeighbor->GetKeySequence() != keySequence)
{
@@ -1489,6 +1507,8 @@
}
}
+ error = OT_ERROR_NONE;
+
exit:
return error;
}
@@ -1500,13 +1520,10 @@
PanId panid;
Neighbor *neighbor;
otError error = aError;
-#if OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
- int8_t rssi = OT_MAC_FILTER_FIXED_RSS_DISABLED;
-#endif // OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
mCounters.mRxTotal++;
- VerifyOrExit(error == OT_ERROR_NONE);
+ SuccessOrExit(error);
VerifyOrExit(aFrame != NULL, error = OT_ERROR_NO_FRAME_RECEIVED);
VerifyOrExit(mEnabled, error = OT_ERROR_INVALID_STATE);
@@ -1554,52 +1571,49 @@
case Address::kTypeShort:
otLogDebgMac("Received frame from short address 0x%04x", srcaddr.GetShort());
- if (neighbor == NULL)
- {
- ExitNow(error = OT_ERROR_UNKNOWN_NEIGHBOR);
- }
+ VerifyOrExit(neighbor != NULL, error = OT_ERROR_UNKNOWN_NEIGHBOR);
srcaddr.SetExtended(neighbor->GetExtAddress());
- // fall through
+ // Fall through
case Address::kTypeExtended:
// Duplicate Address Protection
- if (srcaddr.GetExtended() == GetExtAddress())
- {
- ExitNow(error = OT_ERROR_INVALID_SOURCE_ADDRESS);
- }
+ VerifyOrExit(srcaddr.GetExtended() != GetExtAddress(), error = OT_ERROR_INVALID_SOURCE_ADDRESS);
#if OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
-
- // Source filter Processing. Check if filtered out by whitelist or blacklist.
- SuccessOrExit(error = mFilter.Apply(srcaddr.GetExtended(), rssi));
-
- // override with the rssi in setting
- if (rssi != OT_MAC_FILTER_FIXED_RSS_DISABLED)
{
- aFrame->SetRssi(rssi);
- }
+ int8_t fixedRss;
-#endif // OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
+ SuccessOrExit(error = mFilter.Apply(srcaddr.GetExtended(), fixedRss));
+
+ if (fixedRss != Filter::kFixedRssDisabled)
+ {
+ aFrame->SetRssi(fixedRss);
+
+ // Clear any previous link info to ensure the fixed RSSI
+ // value takes effect quickly.
+ if (neighbor != NULL)
+ {
+ neighbor->GetLinkInfo().Clear();
+ }
+ }
+ }
+#endif
break;
}
- // Increment counters
if (dstaddr.IsBroadcast())
{
- // Broadcast frame
mCounters.mRxBroadcast++;
}
else
{
- // Unicast frame
mCounters.mRxUnicast++;
}
- // Security Processing
error = ProcessReceiveSecurity(*aFrame, srcaddr, neighbor);
switch (error)
@@ -1634,16 +1648,6 @@
if (neighbor != NULL)
{
-#if OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
-
- // make assigned rssi to take effect quickly
- if (rssi != OT_MAC_FILTER_FIXED_RSS_DISABLED)
- {
- neighbor->GetLinkInfo().Clear();
- }
-
-#endif // OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
-
neighbor->GetLinkInfo().AddRss(GetNoiseFloor(), aFrame->GetRssi());
if (aFrame->GetSecurityEnabled())
@@ -1673,11 +1677,11 @@
if (aFrame->GetType() == Frame::kFcfFrameBeacon)
{
mCounters.mRxBeacon++;
- mActiveScanHandler(GetInstance(), aFrame);
+ ReportActiveScanResult(aFrame);
ExitNow();
}
- // Fall-through
+ // Fall through
case kOperationEnergyScan:
@@ -1836,11 +1840,43 @@
UpdateIdleMode();
}
-void Mac::ResetCounters(void)
+#if OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_ENABLE
+const uint32_t *Mac::GetDirectRetrySuccessHistogram(uint8_t &aNumberOfEntries)
{
- memset(&mCounters, 0, sizeof(mCounters));
+ if (mMaxFrameRetriesDirect >= OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_MAX_SIZE_COUNT_DIRECT)
+ {
+ aNumberOfEntries = OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_MAX_SIZE_COUNT_DIRECT;
+ }
+ else
+ {
+ aNumberOfEntries = mMaxFrameRetriesDirect + 1;
+ }
+
+ return mRetryHistogram.mTxDirectRetrySuccess;
}
+#if OPENTHREAD_FTD
+const uint32_t *Mac::GetIndirectRetrySuccessHistogram(uint8_t &aNumberOfEntries)
+{
+ if (mMaxFrameRetriesIndirect >= OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_MAX_SIZE_COUNT_INDIRECT)
+ {
+ aNumberOfEntries = OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_MAX_SIZE_COUNT_INDIRECT;
+ }
+ else
+ {
+ aNumberOfEntries = mMaxFrameRetriesIndirect + 1;
+ }
+
+ return mRetryHistogram.mTxIndirectRetrySuccess;
+}
+#endif
+
+void Mac::ResetRetrySuccessHistogram()
+{
+ memset(&mRetryHistogram, 0, sizeof(mRetryHistogram));
+}
+#endif // OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_ENABLE
+
int8_t Mac::GetNoiseFloor(void)
{
return Get<Radio>().GetReceiveSensitivity();
@@ -1974,7 +2010,7 @@
exit:
return offset;
}
-#endif // OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
+#endif
} // namespace Mac
} // namespace ot
diff --git a/src/core/mac/mac.hpp b/src/core/mac/mac.hpp
index 42e1585..24f3b11 100644
--- a/src/core/mac/mac.hpp
+++ b/src/core/mac/mac.hpp
@@ -45,6 +45,7 @@
#include "mac/channel_mask.hpp"
#include "mac/mac_filter.hpp"
#include "mac/mac_frame.hpp"
+#include "mac/mac_types.hpp"
#include "mac/sub_mac.hpp"
#include "thread/key_manager.hpp"
#include "thread/link_quality.hpp"
@@ -81,15 +82,41 @@
kMaxCsmaBackoffsIndirect =
OPENTHREAD_CONFIG_MAC_MAX_CSMA_BACKOFFS_INDIRECT, ///< macMaxCsmaBackoffs for indirect transmissions
- kMaxFrameRetriesDirect =
- OPENTHREAD_CONFIG_MAC_MAX_FRAME_RETRIES_DIRECT, ///< macMaxFrameRetries for direct transmissions
- kMaxFrameRetriesIndirect =
- OPENTHREAD_CONFIG_MAC_MAX_FRAME_RETRIES_INDIRECT, ///< macMaxFrameRetries for indirect transmissions
+ kDefaultMaxFrameRetriesDirect =
+ OPENTHREAD_CONFIG_MAC_DEFAULT_MAX_FRAME_RETRIES_DIRECT, ///< macDefaultMaxFrameRetries for direct transmissions
+ kDefaultMaxFrameRetriesIndirect =
+ OPENTHREAD_CONFIG_MAC_DEFAULT_MAX_FRAME_RETRIES_INDIRECT, ///< macDefaultMaxFrameRetries for indirect
+ ///< transmissions
kTxNumBcast = OPENTHREAD_CONFIG_MAC_TX_NUM_BCAST ///< Number of times each broadcast frame is transmitted
};
/**
+ * This type defines the function pointer called on receiving an IEEE 802.15.4 Beacon during an Active Scan.
+ *
+ */
+typedef otHandleActiveScanResult ActiveScanHandler;
+
+/**
+ * This type defines an Active Scan result.
+ *
+ */
+typedef otActiveScanResult ActiveScanResult;
+
+/**
+ * This type defines the function pointer which is called during an Energy Scan when the scan result for a channel is
+ * ready or when the scan completes.
+ *
+ */
+typedef otHandleEnergyScanResult EnergyScanHandler;
+
+/**
+ * This type defines an Energy Scan result.
+ *
+ */
+typedef otEnergyScanResult EnergyScanResult;
+
+/**
* This class implements the IEEE 802.15.4 MAC.
*
*/
@@ -107,51 +134,19 @@
explicit Mac(Instance &aInstance);
/**
- * This function pointer is called on receiving an IEEE 802.15.4 Beacon during an Active Scan.
- *
- * @param[in] aInstance A reference to the OpenThread instance.
- * @param[in] aBeaconFrame A pointer to the Beacon frame or NULL to indicate end of Active Scan operation.
- *
- */
- typedef void (*ActiveScanHandler)(Instance &aInstance, RxFrame *aBeaconFrame);
-
- /**
* This method starts an IEEE 802.15.4 Active Scan.
*
* @param[in] aScanChannels A bit vector indicating which channels to scan. Zero is mapped to all channels.
* @param[in] aScanDuration The time in milliseconds to spend scanning each channel. Zero duration maps to
* default value `kScanDurationDefault` = 300 ms.
* @param[in] aHandler A pointer to a function that is called on receiving an IEEE 802.15.4 Beacon.
+ * @param[in] aContext A pointer to an arbitrary context (used when invoking `aHandler` callback).
*
* @retval OT_ERROR_NONE Successfully scheduled the Active Scan request.
* @retval OT_ERROR_BUSY Could not schedule the scan (a scan is ongoing or scheduled).
*
*/
- otError ActiveScan(uint32_t aScanChannels, uint16_t aScanDuration, ActiveScanHandler aHandler);
-
- /**
- * This method converts a beacon frame to an active scan result of type `otActiveScanResult`.
- *
- * @param[in] aBeaconFrame A pointer to a beacon frame.
- * @param[out] aResult A reference to `otActiveScanResult` where the result is stored.
- *
- * @retval OT_ERROR_NONE Successfully converted the beacon into active scan result.
- * @retval OT_ERROR_INVALID_ARGS The @a aBeaconFrame was NULL.
- * @retval OT_ERROR_PARSE Failed parsing the beacon frame.
- *
- */
- otError ConvertBeaconToActiveScanResult(RxFrame *aBeaconFrame, otActiveScanResult &aResult);
-
- /**
- * This function pointer is called during an Energy Scan when the result for a channel is ready or the scan
- * completes.
- *
- * @param[in] aInstance A reference to the OpenThread instance.
- * @param[in] aResult A valid pointer to the energy scan result information or NULL when the energy scan
- * completes.
- *
- */
- typedef void (*EnergyScanHandler)(Instance &aInstance, otEnergyScanResult *aResult);
+ otError ActiveScan(uint32_t aScanChannels, uint16_t aScanDuration, ActiveScanHandler aHandler, void *aContext);
/**
* This method starts an IEEE 802.15.4 Energy Scan.
@@ -160,12 +155,13 @@
* @param[in] aScanDuration The time in milliseconds to spend scanning each channel. If the duration is set to
* zero, a single RSSI sample will be taken per channel.
* @param[in] aHandler A pointer to a function called to pass on scan result or indicate scan completion.
+ * @param[in] aContext A pointer to an arbitrary context (used when invoking @p aHandler callback).
*
* @retval OT_ERROR_NONE Accepted the Energy Scan request.
* @retval OT_ERROR_BUSY Could not start the energy scan.
*
*/
- otError EnergyScan(uint32_t aScanChannels, uint16_t aScanDuration, EnergyScanHandler aHandler);
+ otError EnergyScan(uint32_t aScanChannels, uint16_t aScanDuration, EnergyScanHandler aHandler, void *aContext);
/**
* This method indicates the energy scan for the current channel is complete.
@@ -306,46 +302,26 @@
otError SetPanChannel(uint8_t aChannel);
/**
- * This method returns the IEEE 802.15.4 Radio Channel.
+ * This method sets the temporary IEEE 802.15.4 radio channel.
*
- * @returns The IEEE 802.15.4 Radio Channel.
+ * This method allows user to temporarily change the radio channel and use a different channel (during receive)
+ * instead of the PAN channel (from `SetPanChannel()`). A call to `ClearTemporaryChannel()` would clear the
+ * temporary channel and adopt the PAN channel again. The `SetTemporaryChannel()` can be used multiple times in row
+ * (before a call to `ClearTemporaryChannel()`) to change the temporary channel.
*
- */
- uint8_t GetRadioChannel(void) const { return mRadioChannel; }
-
- /**
- * This method sets the IEEE 802.15.4 Radio Channel. It can only be called after successfully calling
- * `AcquireRadioChannel()`.
+ * @param[in] aChannel A IEEE 802.15.4 channel.
*
- * @param[in] aChannel The IEEE 802.15.4 Radio Channel.
- *
- * @retval OT_ERROR_NONE Successfully set the IEEE 802.15.4 Radio Channel.
+ * @retval OT_ERROR_NONE Successfully set the temporary channel
* @retval OT_ERROR_INVALID_ARGS The @p aChannel is not in the supported channel mask.
- * @retval OT_ERROR_INVALID_STATE The acquisition ID is incorrect.
*
*/
- otError SetRadioChannel(uint16_t aAcquisitionId, uint8_t aChannel);
+ otError SetTemporaryChannel(uint8_t aChannel);
/**
- * This method acquires external ownership of the Radio channel so that future calls to `SetRadioChannel)()` will
- * succeed.
- *
- * @param[out] aAcquisitionId The AcquisitionId that the caller should use when calling `SetRadioChannel()`.
- *
- * @retval OT_ERROR_NONE Successfully acquired permission to Set the Radio Channel.
- * @retval OT_ERROR_INVALID_STATE Failed to acquire permission as the radio Channel has already been acquired.
+ * This method clears the use of a previously set temporary channel and adopts the PAN channel.
*
*/
- otError AcquireRadioChannel(uint16_t *aAcquisitionId);
-
- /**
- * This method releases external ownership of the radio Channel that was acquired with `AcquireRadioChannel()`. The
- * channel will re-adopt the PAN Channel when this API is called.
- *
- * @retval OT_ERROR_NONE Successfully released the IEEE 802.15.4 Radio Channel.
- *
- */
- otError ReleaseRadioChannel(void);
+ void ClearTemporaryChannel(void);
/**
* This method returns the supported channel mask.
@@ -366,36 +342,32 @@
/**
* This method returns the IEEE 802.15.4 Network Name.
*
- * @returns A pointer to the IEEE 802.15.4 Network Name.
+ * @returns The IEEE 802.15.4 Network Name.
*
*/
- const char *GetNetworkName(void) const { return mNetworkName.m8; }
+ const NetworkName &GetNetworkName(void) const { return mNetworkName; }
/**
* This method sets the IEEE 802.15.4 Network Name.
*
- * @param[in] aNetworkName A pointer to the string. Must be null terminated.
+ * @param[in] aNameString A pointer to a string character array. Must be null terminated.
*
* @retval OT_ERROR_NONE Successfully set the IEEE 802.15.4 Network Name.
* @retval OT_ERROR_INVALID_ARGS Given name is too long.
*
*/
- otError SetNetworkName(const char *aNetworkName)
- {
- return SetNetworkName(aNetworkName, OT_NETWORK_NAME_MAX_SIZE + 1);
- }
+ otError SetNetworkName(const char *aNameString);
/**
* This method sets the IEEE 802.15.4 Network Name.
*
- * @param[in] aBuffer A pointer to the char buffer containing the name. Does not need to be null terminated.
- * @param[in] aLength Number of chars in the buffer.
+ * @param[in] aNameData A name data (pointer to char buffer and length).
*
* @retval OT_ERROR_NONE Successfully set the IEEE 802.15.4 Network Name.
* @retval OT_ERROR_INVALID_ARGS Given name is too long.
*
*/
- otError SetNetworkName(const char *aBuffer, uint8_t aLength);
+ otError SetNetworkName(const NetworkName::Data &aNameData);
/**
* This method returns the IEEE 802.15.4 PAN ID.
@@ -414,20 +386,57 @@
void SetPanId(PanId aPanId);
/**
- * This method returns the IEEE 802.15.4 Extended PAN ID.
+ * This method returns the IEEE 802.15.4 Extended PAN Identifier.
*
- * @returns A pointer to the IEEE 802.15.4 Extended PAN ID.
+ * @returns The IEEE 802.15.4 Extended PAN Identifier.
*
*/
- const otExtendedPanId &GetExtendedPanId(void) const { return mExtendedPanId; }
+ const ExtendedPanId &GetExtendedPanId(void) const { return mExtendedPanId; }
/**
- * This method sets the IEEE 802.15.4 Extended PAN ID.
+ * This method sets the IEEE 802.15.4 Extended PAN Identifier.
*
- * @param[in] aExtendedPanId The IEEE 802.15.4 Extended PAN ID.
+ * @param[in] aExtendedPanId The IEEE 802.15.4 Extended PAN Identifier.
*
*/
- void SetExtendedPanId(const otExtendedPanId &aExtendedPanId);
+ void SetExtendedPanId(const ExtendedPanId &aExtendedPanId);
+
+ /**
+ * This method returns the maximum number of frame retries during direct transmission.
+ *
+ * @returns The maximum number of retries during direct transmission.
+ *
+ */
+ uint8_t GetMaxFrameRetriesDirect(void) const { return mMaxFrameRetriesDirect; }
+
+ /**
+ * This method sets the maximum number of frame retries during direct transmission.
+ *
+ * @param[in] aMaxFrameRetriesDirect The maximum number of retries during direct transmission.
+ *
+ */
+ void SetMaxFrameRetriesDirect(uint8_t aMaxFrameRetriesDirect) { mMaxFrameRetriesDirect = aMaxFrameRetriesDirect; }
+
+#if OPENTHREAD_FTD
+ /**
+ * This method returns the maximum number of frame retries during indirect transmission.
+ *
+ * @returns The maximum number of retries during indirect transmission.
+ *
+ */
+ uint8_t GetMaxFrameRetriesIndirect(void) const { return mMaxFrameRetriesIndirect; }
+
+ /**
+ * This method sets the maximum number of frame retries during indirect transmission.
+ *
+ * @param[in] aMaxFrameRetriesIndirect The maximum number of retries during indirect transmission.
+ *
+ */
+ void SetMaxFrameRetriesIndirect(uint8_t aMaxFrameRetriesIndirect)
+ {
+ mMaxFrameRetriesIndirect = aMaxFrameRetriesIndirect;
+ }
+#endif
/**
* This method is called to handle a received frame.
@@ -552,7 +561,7 @@
* This method resets mac counters
*
*/
- void ResetCounters(void);
+ void ResetCounters(void) { memset(&mCounters, 0, sizeof(mCounters)); }
/**
* This method returns the MAC counter.
@@ -562,6 +571,38 @@
*/
otMacCounters &GetCounters(void) { return mCounters; }
+#if OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_ENABLE
+ /**
+ * This method returns the MAC retry histogram for direct transmission.
+ *
+ * @param[out] aNumberOfEntries A reference to where the size of returned histogram array is placed.
+ *
+ * @returns A pointer to the histogram of retries (in a form of an array).
+ * The n-th element indicates that the packet has been sent with n-th retry.
+ *
+ */
+ const uint32_t *GetDirectRetrySuccessHistogram(uint8_t &aNumberOfEntries);
+
+#if OPENTHREAD_FTD
+ /**
+ * This method returns the MAC retry histogram for indirect transmission.
+ *
+ * @param[out] aNumberOfEntries A reference to where the size of returned histogram array is placed.
+ *
+ * @returns A pointer to the histogram of retries (in a form of an array).
+ * The n-th element indicates that the packet has been sent with n-th retry.
+ *
+ */
+ const uint32_t *GetIndirectRetrySuccessHistogram(uint8_t &aNumberOfEntries);
+#endif
+
+ /**
+ * This method resets MAC retry histogram.
+ *
+ */
+ void ResetRetrySuccessHistogram(void);
+#endif // OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_ENABLE
+
/**
* This method returns the noise floor value (currently use the radio receive sensitivity value).
*
@@ -598,16 +639,6 @@
*/
bool IsEnabled(void) const { return mEnabled; }
- /**
- * This method performs AES CCM on the frame which is going to be sent.
- *
- * @param[in] aFrame A reference to the MAC frame buffer that is going to be sent.
- * @param[in] aExtAddress A pointer to the extended address, which will be used to generate nonce
- * for AES CCM computation.
- *
- */
- static void ProcessTransmitAesCcm(TxFrame &aFrame, const ExtAddress *aExtAddress);
-
private:
enum
{
@@ -631,6 +662,29 @@
kOperationTransmitOutOfBandFrame,
};
+#if OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_ENABLE
+ struct RetryHistogram
+ {
+ /**
+ * Histogram of number of retries for a single direct packet until success
+ * [0 retry: packet count, 1 retry: packet count, 2 retry : packet count ...
+ * until max retry limit: packet count]
+ *
+ * The size of the array is OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_MAX_SIZE_COUNT_DIRECT.
+ */
+ uint32_t mTxDirectRetrySuccess[OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_MAX_SIZE_COUNT_DIRECT];
+
+ /**
+ * Histogram of number of retries for a single indirect packet until success
+ * [0 retry: packet count, 1 retry: packet count, 2 retry : packet count ...
+ * until max retry limit: packet count]
+ *
+ * The size of the array is OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_MAX_SIZE_COUNT_INDIRECT.
+ */
+ uint32_t mTxIndirectRetrySuccess[OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_MAX_SIZE_COUNT_INDIRECT];
+ };
+#endif // OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_ENABLE
+
/**
* This method processes transmit security on the frame which is going to be sent.
*
@@ -653,9 +707,9 @@
void PrepareBeaconRequest(TxFrame &aFrame);
void PrepareBeacon(TxFrame &aFrame);
bool ShouldSendBeacon(void) const;
+ bool IsJoinable(void) const;
void BeginTransmit(void);
bool HandleMacCommand(RxFrame &aFrame);
- Frame * GetOperationFrame(void);
static void HandleTimer(Timer &aTimer);
void HandleTimer(void);
@@ -664,6 +718,8 @@
void Scan(Operation aScanOperation, uint32_t aScanChannels, uint16_t aScanDuration);
otError UpdateScanChannel(void);
void PerformActiveScan(void);
+ void ReportActiveScanResult(const RxFrame *aBeaconFrame);
+ otError ConvertBeaconToActiveScanResult(const RxFrame *aBeaconFrame, ActiveScanResult &aResult);
void PerformEnergyScan(void);
void ReportEnergyScanResult(int8_t aRssi);
@@ -677,6 +733,11 @@
static const char *OperationToString(Operation aOperation);
+ static const uint8_t sMode2Key[];
+ static const otExtAddress sMode2ExtAddress;
+ static const otExtendedPanId sExtendedPanidInit;
+ static const char sNetworkNameInit[];
+
bool mEnabled : 1;
bool mPendingActiveScan : 1;
bool mPendingEnergyScan : 1;
@@ -692,31 +753,38 @@
bool mRxOnWhenIdle : 1;
bool mPromiscuous : 1;
bool mBeaconsEnabled : 1;
+ bool mUsingTemporaryChannel : 1;
#if OPENTHREAD_CONFIG_MAC_STAY_AWAKE_BETWEEN_FRAGMENTS
bool mShouldDelaySleep : 1;
bool mDelayingSleep : 1;
#endif
- Operation mOperation;
- uint8_t mBeaconSequence;
- uint8_t mDataSequence;
- uint8_t mBroadcastTransmitCount;
- PanId mPanId;
- uint8_t mPanChannel;
- uint8_t mRadioChannel;
- uint16_t mRadioChannelAcquisitionId;
- ChannelMask mSupportedChannelMask;
- otExtendedPanId mExtendedPanId;
- otNetworkName mNetworkName;
- uint8_t mScanChannel;
- uint16_t mScanDuration;
- ChannelMask mScanChannelMask;
+ Operation mOperation;
+ uint8_t mBeaconSequence;
+ uint8_t mDataSequence;
+ uint8_t mBroadcastTransmitCount;
+ PanId mPanId;
+ uint8_t mPanChannel;
+ uint8_t mRadioChannel;
+ ChannelMask mSupportedChannelMask;
+ ExtendedPanId mExtendedPanId;
+ NetworkName mNetworkName;
+ uint8_t mScanChannel;
+ uint16_t mScanDuration;
+ ChannelMask mScanChannelMask;
+ uint8_t mMaxFrameRetriesDirect;
+#if OPENTHREAD_FTD
+ uint8_t mMaxFrameRetriesIndirect;
+#endif
+
union
{
ActiveScanHandler mActiveScanHandler;
EnergyScanHandler mEnergyScanHandler;
};
+ void *mScanHandlerContext;
+
SubMac mSubMac;
Tasklet mOperationTask;
TimerMilli mTimer;
@@ -725,6 +793,9 @@
uint32_t mKeyIdMode2FrameCounter;
SuccessRateTracker mCcaSuccessRateTracker;
uint16_t mCcaSampleCount;
+#if OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_ENABLE
+ RetryHistogram mRetryHistogram;
+#endif
#if OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
Filter mFilter;
diff --git a/src/core/mac/mac_filter.cpp b/src/core/mac/mac_filter.cpp
index de4e14a..82703c3 100644
--- a/src/core/mac/mac_filter.cpp
+++ b/src/core/mac/mac_filter.cpp
@@ -33,8 +33,6 @@
#include "mac_filter.hpp"
-#include "utils/wrap_string.h"
-
#include "common/code_utils.hpp"
#if OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
@@ -234,7 +232,7 @@
// Return the default RssIn at the end of list
if ((aIterator == OT_ARRAY_LENGTH(mFilterEntries)) && (mDefaultRssIn != kFixedRssDisabled))
{
- memset(&aEntry.mExtAddress, 0xff, OT_EXT_ADDRESS_SIZE);
+ static_cast<ExtAddress &>(aEntry.mExtAddress).Fill(0xff);
aEntry.mRssIn = mDefaultRssIn;
error = OT_ERROR_NONE;
aIterator++;
diff --git a/src/core/mac/mac_frame.cpp b/src/core/mac/mac_frame.cpp
index a6606f3..c475fa6 100644
--- a/src/core/mac/mac_frame.cpp
+++ b/src/core/mac/mac_frame.cpp
@@ -34,61 +34,15 @@
#include "mac_frame.hpp"
#include <stdio.h>
-#include "utils/wrap_string.h"
#include "common/code_utils.hpp"
#include "common/debug.hpp"
-#include "common/instance.hpp"
-#include "common/random.hpp"
+#include "crypto/aes_ccm.hpp"
+#include "thread/key_manager.hpp"
namespace ot {
namespace Mac {
-void ExtAddress::GenerateRandom(void)
-{
- Random::NonCrypto::FillBuffer(m8, sizeof(ExtAddress));
- SetGroup(false);
- SetLocal(true);
-}
-
-bool ExtAddress::operator==(const ExtAddress &aOther) const
-{
- return memcmp(m8, aOther.m8, sizeof(ExtAddress)) == 0;
-}
-
-bool ExtAddress::operator!=(const ExtAddress &aOther) const
-{
- return memcmp(m8, aOther.m8, sizeof(ExtAddress)) != 0;
-}
-
-ExtAddress::InfoString ExtAddress::ToString(void) const
-{
- return InfoString("%02x%02x%02x%02x%02x%02x%02x%02x", m8[0], m8[1], m8[2], m8[3], m8[4], m8[5], m8[6], m8[7]);
-}
-
-void Address::SetExtended(const uint8_t *aBuffer, bool aReverse)
-{
- mType = kTypeExtended;
-
- if (aReverse)
- {
- for (unsigned int i = 0; i < sizeof(ExtAddress); i++)
- {
- mShared.mExtAddress.m8[i] = aBuffer[sizeof(ExtAddress) - 1 - i];
- }
- }
- else
- {
- memcpy(mShared.mExtAddress.m8, aBuffer, sizeof(ExtAddress));
- }
-}
-
-Address::InfoString Address::ToString(void) const
-{
- return (mType == kTypeExtended) ? GetExtended().ToString()
- : (mType == kTypeNone ? InfoString("None") : InfoString("0x%04x", GetShort()));
-}
-
void Frame::InitMacHeader(uint16_t aFcf, uint8_t aSecurityControl)
{
uint8_t *bytes = GetPsdu();
@@ -275,7 +229,7 @@
break;
case kFcfDstAddrExt:
- aAddress.SetExtended(GetPsdu() + index, /* reverse */ true);
+ aAddress.SetExtended(GetPsdu() + index, ExtAddress::kReverseByteOrder);
break;
default:
@@ -295,16 +249,12 @@
void Frame::SetDstAddr(const ExtAddress &aExtAddress)
{
- uint8_t index = FindDstAddrIndex();
- uint8_t *buf = GetPsdu() + index;
+ uint8_t index = FindDstAddrIndex();
assert((GetFrameControlField() & kFcfDstAddrMask) == kFcfDstAddrExt);
assert(index != kInvalidIndex);
- for (unsigned int i = 0; i < sizeof(ExtAddress); i++)
- {
- buf[i] = aExtAddress.m8[sizeof(ExtAddress) - 1 - i];
- }
+ aExtAddress.CopyTo(GetPsdu() + index, ExtAddress::kReverseByteOrder);
}
void Frame::SetDstAddr(const Address &aAddress)
@@ -447,7 +397,7 @@
break;
case kFcfSrcAddrExt:
- aAddress.SetExtended(GetPsdu() + index, /* reverse */ true);
+ aAddress.SetExtended(GetPsdu() + index, ExtAddress::kReverseByteOrder);
break;
default:
@@ -471,16 +421,12 @@
void Frame::SetSrcAddr(const ExtAddress &aExtAddress)
{
- uint8_t index = FindSrcAddrIndex();
- uint8_t *buf = GetPsdu() + index;
+ uint8_t index = FindSrcAddrIndex();
assert((GetFrameControlField() & kFcfSrcAddrMask) == kFcfSrcAddrExt);
assert(index != kInvalidIndex);
- for (unsigned int i = 0; i < sizeof(aExtAddress); i++)
- {
- buf[i] = aExtAddress.m8[sizeof(aExtAddress) - 1 - i];
- }
+ aExtAddress.CopyTo(GetPsdu() + index, ExtAddress::kReverseByteOrder);
}
void Frame::SetSrcAddr(const Address &aAddress)
@@ -967,7 +913,7 @@
cur += aIeList[i].GetLength();
}
- SetPsduLength(GetPsduLength() + static_cast<uint8_t>(cur - base));
+ SetPsduLength(GetPsduLength() + static_cast<uint16_t>(cur - base));
exit:
return error;
@@ -1054,14 +1000,38 @@
#endif
}
-uint16_t Frame::GetMtu(void) const
+void TxFrame::ProcessTransmitAesCcm(const ExtAddress &aExtAddress)
{
- return kMTU;
-}
+#if OPENTHREAD_RADIO
+ OT_UNUSED_VARIABLE(aExtAddress);
+#else
+ uint32_t frameCounter = 0;
+ uint8_t securityLevel;
+ uint8_t nonce[KeyManager::kNonceSize];
+ uint8_t tagLength;
+ Crypto::AesCcm aesCcm;
+ otError error;
-uint16_t Frame::GetFcsSize(void) const
-{
- return kFcsSize;
+ VerifyOrExit(GetSecurityEnabled());
+
+ SuccessOrExit(error = GetSecurityLevel(securityLevel));
+ SuccessOrExit(error = GetFrameCounter(frameCounter));
+
+ KeyManager::GenerateNonce(aExtAddress, frameCounter, securityLevel, nonce);
+
+ aesCcm.SetKey(GetAesKey(), 16);
+ tagLength = GetFooterLength() - Frame::kFcsSize;
+
+ error = aesCcm.Init(GetHeaderLength(), GetPayloadLength(), tagLength, nonce, sizeof(nonce));
+ assert(error == OT_ERROR_NONE);
+
+ aesCcm.Header(GetHeader(), GetHeaderLength());
+ aesCcm.Payload(GetPayload(), GetPayload(), GetPayloadLength(), true);
+ aesCcm.Finalize(GetFooter(), &tagLength);
+
+exit:
+ return;
+#endif // OPENTHREAD_MTD || OPENTHREAD_FTD
}
// LCOV_EXCL_START
@@ -1131,15 +1101,13 @@
BeaconPayload::InfoString BeaconPayload::ToInfoString(void) const
{
- const uint8_t *xpanid = GetExtendedPanId();
- otNetworkName networkname;
+ NetworkName name;
- strlcpy(networkname.m8, GetNetworkName(), sizeof(networkname.m8));
+ name.Set(GetNetworkName());
- return InfoString("name:%s, xpanid:%02x%02x%02x%02x%02x%02x%02x%02x, id:%d ver:%d, joinable:%s, native:%s",
- networkname.m8, xpanid[0], xpanid[1], xpanid[2], xpanid[3], xpanid[4], xpanid[5], xpanid[6],
- xpanid[7], GetProtocolId(), GetProtocolVersion(), IsJoiningPermitted() ? "yes" : "no",
- IsNative() ? "yes" : "no");
+ return InfoString("name:%s, xpanid:%s, id:%d, ver:%d, joinable:%s, native:%s", name.GetAsCString(),
+ mExtendedPanId.ToString().AsCString(), GetProtocolId(), GetProtocolVersion(),
+ IsJoiningPermitted() ? "yes" : "no", IsNative() ? "yes" : "no");
}
#endif // #if (OPENTHREAD_CONFIG_LOG_LEVEL >= OT_LOG_LEVEL_NOTE) && (OPENTHREAD_CONFIG_LOG_MAC == 1)
diff --git a/src/core/mac/mac_frame.hpp b/src/core/mac/mac_frame.hpp
index fe1e950..aac2fad 100644
--- a/src/core/mac/mac_frame.hpp
+++ b/src/core/mac/mac_frame.hpp
@@ -39,13 +39,8 @@
#include <limits.h>
#include <stdint.h>
-#include "utils/wrap_string.h"
-
-#include <openthread/link.h>
-#include <openthread/platform/radio.h>
-
#include "common/encoding.hpp"
-#include "common/string.hpp"
+#include "mac/mac_types.hpp"
namespace ot {
@@ -58,332 +53,6 @@
*
*/
-enum
-{
- kShortAddrBroadcast = 0xffff,
- kShortAddrInvalid = 0xfffe,
- kPanIdBroadcast = 0xffff,
-};
-
-/**
- * This type represents the IEEE 802.15.4 PAN ID.
- *
- */
-typedef otPanId PanId;
-
-/**
- * This type represents the IEEE 802.15.4 Short Address.
- *
- */
-typedef otShortAddress ShortAddress;
-
-/**
- * This structure represents an IEEE 802.15.4 Extended Address.
- *
- */
-OT_TOOL_PACKED_BEGIN
-class ExtAddress : public otExtAddress
-{
-public:
- enum
- {
- kInfoStringSize = 17, // Max chars for the info string (`ToString()`).
- };
-
- /**
- * This type defines the fixed-length `String` object returned from `ToString()`.
- *
- */
- typedef String<kInfoStringSize> InfoString;
-
- /**
- * This method generates a random IEEE 802.15.4 Extended Address.
- *
- */
- void GenerateRandom(void);
-
- /**
- * This method indicates whether or not the Group bit is set.
- *
- * @retval TRUE If the group bit is set.
- * @retval FALSE If the group bit is not set.
- *
- */
- bool IsGroup(void) const { return (m8[0] & kGroupFlag) != 0; }
-
- /**
- * This method sets the Group bit.
- *
- * @param[in] aGroup TRUE if group address, FALSE otherwise.
- *
- */
- void SetGroup(bool aGroup)
- {
- if (aGroup)
- {
- m8[0] |= kGroupFlag;
- }
- else
- {
- m8[0] &= ~kGroupFlag;
- }
- }
-
- /**
- * This method toggles the Group bit.
- *
- */
- void ToggleGroup(void) { m8[0] ^= kGroupFlag; }
-
- /**
- * This method indicates whether or not the Local bit is set.
- *
- * @retval TRUE If the local bit is set.
- * @retval FALSE If the local bit is not set.
- *
- */
- bool IsLocal(void) const { return (m8[0] & kLocalFlag) != 0; }
-
- /**
- * This method sets the Local bit.
- *
- * @param[in] aLocal TRUE if locally administered, FALSE otherwise.
- *
- */
- void SetLocal(bool aLocal)
- {
- if (aLocal)
- {
- m8[0] |= kLocalFlag;
- }
- else
- {
- m8[0] &= ~kLocalFlag;
- }
- }
-
- /**
- * This method toggles the Local bit.
- *
- */
- void ToggleLocal(void) { m8[0] ^= kLocalFlag; }
-
- /**
- * This method evaluates whether or not the Extended Addresses match.
- *
- * @param[in] aOther The Extended Address to compare.
- *
- * @retval TRUE If the Extended Addresses match.
- * @retval FALSE If the Extended Addresses do not match.
- *
- */
- bool operator==(const ExtAddress &aOther) const;
-
- /**
- * This method evaluates whether or not the Extended Addresses match.
- *
- * @param[in] aOther The Extended Address to compare.
- *
- * @retval TRUE If the Extended Addresses do not match.
- * @retval FALSE If the Extended Addresses match.
- *
- */
- bool operator!=(const ExtAddress &aOther) const;
-
- /**
- * This method converts an address to a string.
- *
- * @returns An `InfoString` containing the string representation of the Extended Address.
- *
- */
- InfoString ToString(void) const;
-
-private:
- enum
- {
- kGroupFlag = 1 << 0,
- kLocalFlag = 1 << 1,
- };
-} OT_TOOL_PACKED_END;
-
-/**
- * This class represents an IEEE 802.15.4 Short or Extended Address.
- *
- */
-class Address
-{
-public:
- /**
- * This type defines the fixed-length `String` object returned from `ToString()`.
- *
- */
- typedef ExtAddress::InfoString InfoString;
-
- /**
- * This enumeration specifies the IEEE 802.15.4 Address type.
- *
- */
- enum Type
- {
- kTypeNone, ///< No address.
- kTypeShort, ///< IEEE 802.15.4 Short Address.
- kTypeExtended, ///< IEEE 802.15.4 Extended Address.
- };
-
- /**
- * This constructor initializes an Address.
- *
- */
- Address(void)
- : mType(kTypeNone)
- {
- }
-
- /**
- * This method gets the address type (Short Address, Extended Address, or none).
- *
- * @returns The address type.
- *
- */
- Type GetType(void) const { return mType; }
-
- /**
- * This method indicates whether or not there is an address.
- *
- * @returns TRUE if there is no address (i.e. address type is `kTypeNone`), FALSE otherwise.
- *
- */
- bool IsNone(void) const { return (mType == kTypeNone); }
-
- /**
- * This method indicates whether or not the Address is a Short Address.
- *
- * @returns TRUE if it is a Short Address, FALSE otherwise.
- *
- */
- bool IsShort(void) const { return (mType == kTypeShort); }
-
- /**
- * This method indicates whether or not the Address is an Extended Address.
- *
- * @returns TRUE if it is an Extended Address, FALSE otherwise.
- *
- */
- bool IsExtended(void) const { return (mType == kTypeExtended); }
-
- /**
- * This method gets the address as a Short Address.
- *
- * This method MUST be used only if the address type is Short Address.
- *
- * @returns The Short Address.
- *
- */
- ShortAddress GetShort(void) const { return mShared.mShortAddress; }
-
- /**
- * This method gets the address as an Extended Address.
- *
- * This method MUST be used only if the address type is Extended Address.
- *
- * @returns A constant reference to the Extended Address.
- *
- */
- const ExtAddress &GetExtended(void) const { return mShared.mExtAddress; }
-
- /**
- * This method gets the address as an Extended Address.
- *
- * This method MUST be used only if the address type is Extended Address.
- *
- * @returns A reference to the Extended Address.
- *
- */
- ExtAddress &GetExtended(void) { return mShared.mExtAddress; }
-
- /**
- * This method sets the address to none (i.e., clears the address).
- *
- * Address type will be updated to `kTypeNone`.
- *
- */
- void SetNone(void) { mType = kTypeNone; }
-
- /**
- * This method sets the address with a Short Address.
- *
- * The type is also updated to indicate that address is Short.
- *
- * @param[in] aShortAddress A Short Address
- *
- */
- void SetShort(ShortAddress aShortAddress)
- {
- mShared.mShortAddress = aShortAddress;
- mType = kTypeShort;
- }
-
- /**
- * This method sets the address with an Extended Address.
- *
- * The type is also updated to indicate that the address is Extended.
- *
- * @param[in] aExtAddress An Extended Address
- *
- */
- void SetExtended(const ExtAddress &aExtAddress)
- {
- mShared.mExtAddress = aExtAddress;
- mType = kTypeExtended;
- }
-
- /**
- * This method sets the address with an Extended Address given as byte array.
- *
- * The type is also updated to indicate that the address is Extended.
- *
- * @param[in] aBuffer Pointer to a array containing the Extended Address. `OT_EXT_ADDRESS_SIZE` bytes from buffer
- * are copied to form the Extended Address.
- * @param[in] aReverse If `true` then `OT_EXT_ADDRESS_SIZE` bytes from @p aBuffer are copied in reverse order,
- * otherwise they are copied as provided.
- *
- */
- void SetExtended(const uint8_t *aBuffer, bool aReverse);
-
- /**
- * This method indicates whether or not the address is a Short Broadcast Address.
- *
- * @returns TRUE if address is Short Broadcast Address, FALSE otherwise.
- *
- */
- bool IsBroadcast(void) const { return ((mType == kTypeShort) && (GetShort() == kShortAddrBroadcast)); }
-
- /**
- * This method indicates whether or not the address is a Short Invalid Address.
- *
- * @returns TRUE if address is Short Invalid Address, FALSE otherwise.
- *
- */
- bool IsShortAddrInvalid(void) const { return ((mType == kTypeShort) && (GetShort() == kShortAddrInvalid)); }
-
- /**
- * This method converts an address to a null-terminated string
- *
- * @returns A `String` representing the address.
- *
- */
- InfoString ToString(void) const;
-
-private:
- union
- {
- ShortAddress mShortAddress; ///< The IEEE 802.15.4 Short Address.
- ExtAddress mExtAddress; ///< The IEEE 802.15.4 Extended Address.
- } mShared;
-
- Type mType; ///< The address type (Short, Extended, or none).
-};
-
/**
* This class implements IEEE 802.15.4 IE (Information Element) generation and parsing.
*
@@ -575,7 +244,7 @@
public:
enum
{
- kMTU = 127,
+ kMtu = OT_RADIO_FRAME_MAX_SIZE,
kFcfSize = sizeof(uint16_t),
kDsnSize = sizeof(uint8_t),
kSecurityControlSize = sizeof(uint8_t),
@@ -657,6 +326,15 @@
typedef String<kInfoStringSize> InfoString;
/**
+ * This method indicates whether the frame is empty (no payload).
+ *
+ * @retval TRUE The frame is empty (no PSDU payload).
+ * @retval FALSE The frame is not empty.
+ *
+ */
+ bool IsEmpty(void) const { return (mLength == 0); }
+
+ /**
* This method initializes the MAC header.
*
* @param[in] aFcf The Frame Control field.
@@ -764,6 +442,7 @@
* @param[out] aPanId The Destination PAN Identifier.
*
* @retval OT_ERROR_NONE Successfully retrieved the Destination PAN Identifier.
+ * @retval OT_ERROR_PARSE Failed to parse the PAN Identifier.
*
*/
otError GetDstPanId(PanId &aPanId) const;
@@ -1184,7 +863,7 @@
* @returns The maximum transmission unit (MTU).
*
*/
- uint16_t GetMtu(void) const;
+ uint16_t GetMtu(void) const { return kMtu; }
/**
* This method returns the FCS size.
@@ -1192,7 +871,7 @@
* @returns This method returns the FCS size.
*
*/
- uint16_t GetFcsSize(void) const;
+ uint16_t GetFcsSize(void) const { return kFcsSize; }
/**
* This method returns information about the frame object as an `InfoString` object.
@@ -1414,6 +1093,14 @@
*/
void CopyFrom(const TxFrame &aFromFrame);
+ /**
+ * This method performs AES CCM on the frame which is going to be sent.
+ *
+ * @param[in] aExtAddress A reference to the extended address, which will be used to generate nonce
+ * for AES CCM computation.
+ *
+ */
+ void ProcessTransmitAesCcm(const ExtAddress &aExtAddress);
#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
/**
* This method sets the Time IE offset.
@@ -1444,6 +1131,7 @@
#endif // OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
};
+OT_TOOL_PACKED_BEGIN
class Beacon
{
public:
@@ -1477,13 +1165,21 @@
}
/**
- * This method returns the pointer to the beacon payload address.
+ * This method returns the pointer to the beacon payload.
*
- * @retval A pointer to the beacon payload address.
+ * @returns A pointer to the beacon payload.
*
*/
uint8_t *GetPayload(void) { return reinterpret_cast<uint8_t *>(this) + sizeof(*this); }
+ /**
+ * This method returns the pointer to the beacon payload.
+ *
+ * @returns A pointer to the beacon payload.
+ *
+ */
+ const uint8_t *GetPayload(void) const { return reinterpret_cast<const uint8_t *>(this) + sizeof(*this); }
+
private:
uint16_t mSuperframeSpec;
uint8_t mGtsSpec;
@@ -1500,10 +1196,8 @@
public:
enum
{
- kProtocolId = 3, ///< Thread Protocol ID.
- kNetworkNameSize = 16, ///< Size of Thread Network Name (bytes).
- kExtPanIdSize = 8, ///< Size of Thread Extended PAN ID.
- kInfoStringSize = 92, ///< Max chars for the info string (@sa ToInfoString()).
+ kProtocolId = 3, ///< Thread Protocol ID.
+ kInfoStringSize = 92, ///< Max chars for the info string (@sa ToInfoString()).
};
enum
@@ -1600,48 +1294,43 @@
{
mFlags |= kJoiningFlag;
-#if OPENTHREAD_CONFIG_MAC_JOIN_BEACON_VERSION != kProtocolVersion
+#if OPENTHREAD_CONFIG_MAC_JOIN_BEACON_VERSION != 2 // check against kProtocolVersion
mFlags &= ~kVersionMask;
mFlags |= OPENTHREAD_CONFIG_MAC_JOIN_BEACON_VERSION << kVersionOffset;
#endif
}
/**
- * This method returns a pointer to the Network Name field.
+ * This method gets the Network Name field.
*
- * @returns A pointer to the network name field.
+ * @returns The Network Name field as `NetworkName::Data`.
*
*/
- const char *GetNetworkName(void) const { return mNetworkName; }
+ NetworkName::Data GetNetworkName(void) const { return NetworkName::Data(mNetworkName, sizeof(mNetworkName)); }
/**
* This method sets the Network Name field.
*
- * @param[in] aNetworkName A pointer to the Network Name.
+ * @param[in] aNameData The Network Name (as a `NetworkName::Data`).
*
*/
- void SetNetworkName(const char *aNetworkName)
- {
- size_t length = strnlen(aNetworkName, sizeof(mNetworkName));
- memset(mNetworkName, 0, sizeof(mNetworkName));
- memcpy(mNetworkName, aNetworkName, length);
- }
+ void SetNetworkName(const NetworkName::Data &aNameData) { aNameData.CopyTo(mNetworkName, sizeof(mNetworkName)); }
/**
- * This method returns a pointer to the Extended PAN ID field.
+ * This method returns the Extended PAN ID field.
*
- * @returns A pointer to the Extended PAN ID field.
+ * @returns The Extended PAN ID field.
*
*/
- const uint8_t *GetExtendedPanId(void) const { return mExtendedPanId; }
+ const ExtendedPanId &GetExtendedPanId(void) const { return mExtendedPanId; }
/**
* This method sets the Extended PAN ID field.
*
- * @param[in] aExtPanId A pointer to the Extended PAN ID.
+ * @param[in] aExtPanId An Extended PAN ID.
*
*/
- void SetExtendedPanId(const uint8_t *aExtPanId) { memcpy(mExtendedPanId, aExtPanId, sizeof(mExtendedPanId)); }
+ void SetExtendedPanId(const ExtendedPanId &aExtPanId) { mExtendedPanId = aExtPanId; }
/**
* This method returns information about the Beacon as a `InfoString`.
@@ -1652,10 +1341,10 @@
InfoString ToInfoString(void) const;
private:
- uint8_t mProtocolId;
- uint8_t mFlags;
- char mNetworkName[kNetworkNameSize];
- uint8_t mExtendedPanId[kExtPanIdSize];
+ uint8_t mProtocolId;
+ uint8_t mFlags;
+ char mNetworkName[NetworkName::kMaxSize];
+ ExtendedPanId mExtendedPanId;
} OT_TOOL_PACKED_END;
/**
diff --git a/src/core/mac/mac_types.cpp b/src/core/mac/mac_types.cpp
new file mode 100644
index 0000000..c2ef352
--- /dev/null
+++ b/src/core/mac/mac_types.cpp
@@ -0,0 +1,149 @@
+/*
+ * Copyright (c) 2016-2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file implements MAC types such as Address, Extended PAN Identifier, Network Name, etc.
+ */
+
+#include "mac_types.hpp"
+
+#include <stdio.h>
+
+#include "common/code_utils.hpp"
+#include "common/random.hpp"
+#include "common/string.hpp"
+
+namespace ot {
+namespace Mac {
+
+PanId GenerateRandomPanId(void)
+{
+ PanId panId;
+
+ do
+ {
+ panId = Random::NonCrypto::GetUint16();
+ } while (panId == kPanIdBroadcast);
+
+ return panId;
+}
+
+void ExtAddress::GenerateRandom(void)
+{
+ Random::NonCrypto::FillBuffer(m8, sizeof(ExtAddress));
+ SetGroup(false);
+ SetLocal(true);
+}
+
+bool ExtAddress::operator==(const ExtAddress &aOther) const
+{
+ return memcmp(m8, aOther.m8, sizeof(ExtAddress)) == 0;
+}
+
+ExtAddress::InfoString ExtAddress::ToString(void) const
+{
+ return InfoString("%02x%02x%02x%02x%02x%02x%02x%02x", m8[0], m8[1], m8[2], m8[3], m8[4], m8[5], m8[6], m8[7]);
+}
+
+void ExtAddress::CopyAddress(uint8_t *aDst, const uint8_t *aSrc, CopyByteOrder aByteOrder)
+{
+ switch (aByteOrder)
+ {
+ case kNormalByteOrder:
+ memcpy(aDst, aSrc, sizeof(ExtAddress));
+ break;
+
+ case kReverseByteOrder:
+ aSrc += sizeof(ExtAddress) - 1;
+ for (uint8_t len = sizeof(ExtAddress); len > 0; len--)
+ {
+ *aDst++ = *aSrc--;
+ }
+ break;
+ }
+}
+
+Address::InfoString Address::ToString(void) const
+{
+ return (mType == kTypeExtended) ? GetExtended().ToString()
+ : (mType == kTypeNone ? InfoString("None") : InfoString("0x%04x", GetShort()));
+}
+
+bool ExtendedPanId::operator==(const ExtendedPanId &aOther) const
+{
+ return memcmp(m8, aOther.m8, sizeof(ExtendedPanId)) == 0;
+}
+
+ExtendedPanId::InfoString ExtendedPanId::ToString(void) const
+{
+ return InfoString("%02x%02x%02x%02x%02x%02x%02x%02x", m8[0], m8[1], m8[2], m8[3], m8[4], m8[5], m8[6], m8[7]);
+}
+
+uint8_t NetworkName::Data::CopyTo(char *aBuffer, uint8_t aMaxSize) const
+{
+ uint8_t len = GetLength();
+
+ memset(aBuffer, 0, aMaxSize);
+
+ if (len > aMaxSize)
+ {
+ len = aMaxSize;
+ }
+
+ memcpy(aBuffer, GetBuffer(), len);
+
+ return len;
+}
+
+NetworkName::Data NetworkName::GetAsData(void) const
+{
+ uint8_t len = static_cast<uint8_t>(StringLength(m8, kMaxSize + 1));
+
+ return Data(m8, len);
+}
+
+otError NetworkName::Set(const Data &aNameData)
+{
+ otError error = OT_ERROR_NONE;
+ uint8_t newLen = static_cast<uint8_t>(StringLength(aNameData.GetBuffer(), aNameData.GetLength()));
+
+ VerifyOrExit(newLen <= kMaxSize, error = OT_ERROR_INVALID_ARGS);
+
+ // Ensure the new name does not match the current one.
+ VerifyOrExit(memcmp(m8, aNameData.GetBuffer(), newLen) || (m8[newLen] != '\0'), error = OT_ERROR_ALREADY);
+
+ memcpy(m8, aNameData.GetBuffer(), newLen);
+ m8[newLen] = '\0';
+
+exit:
+ return error;
+}
+
+} // namespace Mac
+} // namespace ot
diff --git a/src/core/mac/mac_types.hpp b/src/core/mac/mac_types.hpp
new file mode 100644
index 0000000..cc6ed17
--- /dev/null
+++ b/src/core/mac/mac_types.hpp
@@ -0,0 +1,613 @@
+/*
+ * Copyright (c) 2016-2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file includes definitions for MAC types such as Address, Extended PAN Identifier, Network Name, etc.
+ */
+
+#ifndef MAC_TYPES_HPP_
+#define MAC_TYPES_HPP_
+
+#include "openthread-core-config.h"
+
+#include <stdint.h>
+#include <string.h>
+
+#include <openthread/link.h>
+
+#include "common/string.hpp"
+
+namespace ot {
+namespace Mac {
+
+/**
+ * @addtogroup core-mac
+ *
+ * @{
+ *
+ */
+
+enum
+{
+ kShortAddrBroadcast = 0xffff,
+ kShortAddrInvalid = 0xfffe,
+ kPanIdBroadcast = 0xffff,
+};
+
+/**
+ * This type represents the IEEE 802.15.4 PAN ID.
+ *
+ */
+typedef otPanId PanId;
+
+/**
+ * This type represents the IEEE 802.15.4 Short Address.
+ *
+ */
+typedef otShortAddress ShortAddress;
+
+/**
+ * This function generates a random IEEE 802.15.4 PAN ID.
+ *
+ * @returns A randomly generated IEEE 802.15.4 PAN ID (excluding `kPanIdBroadcast`).
+ *
+ */
+PanId GenerateRandomPanId(void);
+
+/**
+ * This structure represents an IEEE 802.15.4 Extended Address.
+ *
+ */
+OT_TOOL_PACKED_BEGIN
+class ExtAddress : public otExtAddress
+{
+public:
+ enum
+ {
+ kInfoStringSize = 17, // Max chars for the info string (`ToString()`).
+ };
+
+ /**
+ * This type defines the fixed-length `String` object returned from `ToString()`.
+ *
+ */
+ typedef String<kInfoStringSize> InfoString;
+
+ /**
+ * This enumeration type specifies the copy byte order when Extended Address is being copied to/from a buffer.
+ *
+ */
+ enum CopyByteOrder
+ {
+ kNormalByteOrder, // Copy address bytes in normal order (as provided in array buffer).
+ kReverseByteOrder, // Copy address bytes in reverse byte order.
+ };
+
+ /**
+ * This method clears the Extended Address (sets all bytes to zero).
+ *
+ */
+ void Clear(void) { Fill(0); }
+
+ /**
+ * This method fills all bytes of address with a given byte value.
+ *
+ * @param[in] aByte A byte value to fill address with.
+ *
+ */
+ void Fill(uint8_t aByte) { memset(this, aByte, sizeof(*this)); }
+
+ /**
+ * This method generates a random IEEE 802.15.4 Extended Address.
+ *
+ */
+ void GenerateRandom(void);
+
+ /**
+ * This method sets the Extended Address from a given byte array.
+ *
+ * @param[in] aBuffer Pointer to an array containing the Extended Address. `OT_EXT_ADDRESS_SIZE` bytes from
+ * buffer are copied to form the Extended Address.
+ * @param[in] aByteOrder The byte order to use when copying the address.
+ *
+ */
+ void Set(const uint8_t *aBuffer, CopyByteOrder aByteOrder = kNormalByteOrder)
+ {
+ CopyAddress(m8, aBuffer, aByteOrder);
+ }
+
+ /**
+ * This method indicates whether or not the Group bit is set.
+ *
+ * @retval TRUE If the group bit is set.
+ * @retval FALSE If the group bit is not set.
+ *
+ */
+ bool IsGroup(void) const { return (m8[0] & kGroupFlag) != 0; }
+
+ /**
+ * This method sets the Group bit.
+ *
+ * @param[in] aGroup TRUE if group address, FALSE otherwise.
+ *
+ */
+ void SetGroup(bool aGroup)
+ {
+ if (aGroup)
+ {
+ m8[0] |= kGroupFlag;
+ }
+ else
+ {
+ m8[0] &= ~kGroupFlag;
+ }
+ }
+
+ /**
+ * This method toggles the Group bit.
+ *
+ */
+ void ToggleGroup(void) { m8[0] ^= kGroupFlag; }
+
+ /**
+ * This method indicates whether or not the Local bit is set.
+ *
+ * @retval TRUE If the local bit is set.
+ * @retval FALSE If the local bit is not set.
+ *
+ */
+ bool IsLocal(void) const { return (m8[0] & kLocalFlag) != 0; }
+
+ /**
+ * This method sets the Local bit.
+ *
+ * @param[in] aLocal TRUE if locally administered, FALSE otherwise.
+ *
+ */
+ void SetLocal(bool aLocal)
+ {
+ if (aLocal)
+ {
+ m8[0] |= kLocalFlag;
+ }
+ else
+ {
+ m8[0] &= ~kLocalFlag;
+ }
+ }
+
+ /**
+ * This method toggles the Local bit.
+ *
+ */
+ void ToggleLocal(void) { m8[0] ^= kLocalFlag; }
+
+ /**
+ * This method copies the Extended Address into a given buffer.
+ *
+ * @param[out] aBuffer A pointer to a buffer to copy the Extended Address into.
+ * @param[in] aByteOrder The byte order to copy the address.
+ *
+ */
+ void CopyTo(uint8_t *aBuffer, CopyByteOrder aByteOrder = kNormalByteOrder) const
+ {
+ CopyAddress(aBuffer, m8, aByteOrder);
+ }
+
+ /**
+ * This method evaluates whether or not the Extended Addresses match.
+ *
+ * @param[in] aOther The Extended Address to compare.
+ *
+ * @retval TRUE If the Extended Addresses match.
+ * @retval FALSE If the Extended Addresses do not match.
+ *
+ */
+ bool operator==(const ExtAddress &aOther) const;
+
+ /**
+ * This method evaluates whether or not the Extended Addresses match.
+ *
+ * @param[in] aOther The Extended Address to compare.
+ *
+ * @retval TRUE If the Extended Addresses do not match.
+ * @retval FALSE If the Extended Addresses match.
+ *
+ */
+ bool operator!=(const ExtAddress &aOther) const { return !(*this == aOther); }
+
+ /**
+ * This method converts an address to a string.
+ *
+ * @returns An `InfoString` containing the string representation of the Extended Address.
+ *
+ */
+ InfoString ToString(void) const;
+
+private:
+ static void CopyAddress(uint8_t *aDst, const uint8_t *aSrc, CopyByteOrder aByteOrder);
+
+ enum
+ {
+ kGroupFlag = 1 << 0,
+ kLocalFlag = 1 << 1,
+ };
+} OT_TOOL_PACKED_END;
+
+/**
+ * This class represents an IEEE 802.15.4 Short or Extended Address.
+ *
+ */
+class Address
+{
+public:
+ /**
+ * This type defines the fixed-length `String` object returned from `ToString()`.
+ *
+ */
+ typedef ExtAddress::InfoString InfoString;
+
+ /**
+ * This enumeration specifies the IEEE 802.15.4 Address type.
+ *
+ */
+ enum Type
+ {
+ kTypeNone, ///< No address.
+ kTypeShort, ///< IEEE 802.15.4 Short Address.
+ kTypeExtended, ///< IEEE 802.15.4 Extended Address.
+ };
+
+ /**
+ * This constructor initializes an Address.
+ *
+ */
+ Address(void)
+ : mType(kTypeNone)
+ {
+ }
+
+ /**
+ * This method gets the address type (Short Address, Extended Address, or none).
+ *
+ * @returns The address type.
+ *
+ */
+ Type GetType(void) const { return mType; }
+
+ /**
+ * This method indicates whether or not there is an address.
+ *
+ * @returns TRUE if there is no address (i.e. address type is `kTypeNone`), FALSE otherwise.
+ *
+ */
+ bool IsNone(void) const { return (mType == kTypeNone); }
+
+ /**
+ * This method indicates whether or not the Address is a Short Address.
+ *
+ * @returns TRUE if it is a Short Address, FALSE otherwise.
+ *
+ */
+ bool IsShort(void) const { return (mType == kTypeShort); }
+
+ /**
+ * This method indicates whether or not the Address is an Extended Address.
+ *
+ * @returns TRUE if it is an Extended Address, FALSE otherwise.
+ *
+ */
+ bool IsExtended(void) const { return (mType == kTypeExtended); }
+
+ /**
+ * This method gets the address as a Short Address.
+ *
+ * This method MUST be used only if the address type is Short Address.
+ *
+ * @returns The Short Address.
+ *
+ */
+ ShortAddress GetShort(void) const { return mShared.mShortAddress; }
+
+ /**
+ * This method gets the address as an Extended Address.
+ *
+ * This method MUST be used only if the address type is Extended Address.
+ *
+ * @returns A constant reference to the Extended Address.
+ *
+ */
+ const ExtAddress &GetExtended(void) const { return mShared.mExtAddress; }
+
+ /**
+ * This method gets the address as an Extended Address.
+ *
+ * This method MUST be used only if the address type is Extended Address.
+ *
+ * @returns A reference to the Extended Address.
+ *
+ */
+ ExtAddress &GetExtended(void) { return mShared.mExtAddress; }
+
+ /**
+ * This method sets the address to none (i.e., clears the address).
+ *
+ * Address type will be updated to `kTypeNone`.
+ *
+ */
+ void SetNone(void) { mType = kTypeNone; }
+
+ /**
+ * This method sets the address with a Short Address.
+ *
+ * The type is also updated to indicate that address is Short.
+ *
+ * @param[in] aShortAddress A Short Address
+ *
+ */
+ void SetShort(ShortAddress aShortAddress)
+ {
+ mShared.mShortAddress = aShortAddress;
+ mType = kTypeShort;
+ }
+
+ /**
+ * This method sets the address with an Extended Address.
+ *
+ * The type is also updated to indicate that the address is Extended.
+ *
+ * @param[in] aExtAddress An Extended Address
+ *
+ */
+ void SetExtended(const ExtAddress &aExtAddress)
+ {
+ mShared.mExtAddress = aExtAddress;
+ mType = kTypeExtended;
+ }
+
+ /**
+ * This method sets the address with an Extended Address given as a byte array.
+ *
+ * The type is also updated to indicate that the address is Extended.
+ *
+ * @param[in] aBuffer Pointer to an array containing the Extended Address. `OT_EXT_ADDRESS_SIZE` bytes from
+ * buffer are copied to form the Extended Address.
+ * @param[in] aByteOrder The byte order to copy the address from @p aBuffer.
+ *
+ */
+ void SetExtended(const uint8_t *aBuffer, ExtAddress::CopyByteOrder aByteOrder = ExtAddress::kNormalByteOrder)
+ {
+ mShared.mExtAddress.Set(aBuffer, aByteOrder);
+ mType = kTypeExtended;
+ }
+
+ /**
+ * This method indicates whether or not the address is a Short Broadcast Address.
+ *
+ * @returns TRUE if address is Short Broadcast Address, FALSE otherwise.
+ *
+ */
+ bool IsBroadcast(void) const { return ((mType == kTypeShort) && (GetShort() == kShortAddrBroadcast)); }
+
+ /**
+ * This method indicates whether or not the address is a Short Invalid Address.
+ *
+ * @returns TRUE if address is Short Invalid Address, FALSE otherwise.
+ *
+ */
+ bool IsShortAddrInvalid(void) const { return ((mType == kTypeShort) && (GetShort() == kShortAddrInvalid)); }
+
+ /**
+ * This method converts an address to a null-terminated string
+ *
+ * @returns A `String` representing the address.
+ *
+ */
+ InfoString ToString(void) const;
+
+private:
+ union
+ {
+ ShortAddress mShortAddress; ///< The IEEE 802.15.4 Short Address.
+ ExtAddress mExtAddress; ///< The IEEE 802.15.4 Extended Address.
+ } mShared;
+
+ Type mType; ///< The address type (Short, Extended, or none).
+};
+
+/**
+ * This structure represents an IEEE 802.15.4 Extended PAN Identifier.
+ *
+ */
+OT_TOOL_PACKED_BEGIN
+class ExtendedPanId : public otExtendedPanId
+{
+public:
+ enum
+ {
+ kInfoStringSize = 17, // Max chars for the info string (`ToString()`).
+ };
+
+ /**
+ * This type defines the fixed-length `String` object returned from `ToString()`.
+ *
+ */
+ typedef String<kInfoStringSize> InfoString;
+
+ /**
+ * This method clears the Extended PAN Identifier (sets all bytes to zero).
+ *
+ */
+ void Clear(void) { memset(this, 0, sizeof(*this)); }
+
+ /**
+ * This method evaluates whether or not the Extended PAN Identifiers match.
+ *
+ * @param[in] aOther The Extended PAN Id to compare.
+ *
+ * @retval TRUE If the Extended PAN Identifiers match.
+ * @retval FALSE If the Extended PAN Identifiers do not match.
+ *
+ */
+ bool operator==(const ExtendedPanId &aOther) const;
+
+ /**
+ * This method evaluates whether or not the Extended PAN Identifiers match.
+ *
+ * @param[in] aOther The Extended PAN Id to compare.
+ *
+ * @retval TRUE If the Extended Addresses do not match.
+ * @retval FALSE If the Extended Addresses match.
+ *
+ */
+ bool operator!=(const ExtendedPanId &aOther) const { return !(*this == aOther); }
+
+ /**
+ * This method converts an address to a string.
+ *
+ * @returns An `InfoString` containing the string representation of the Extended PAN Identifier.
+ *
+ */
+ InfoString ToString(void) const;
+
+} OT_TOOL_PACKED_END;
+
+/**
+ * This structure represents an IEEE802.15.4 Network Name.
+ *
+ */
+class NetworkName : public otNetworkName
+{
+public:
+ enum
+ {
+ kMaxSize = OT_NETWORK_NAME_MAX_SIZE, // Maximum number of chars in Network Name (excludes null char).
+ };
+
+ /**
+ * This class represents an IEEE802.15.4 Network Name as Data (pointer to a char buffer along with a length).
+ *
+ * @note The char array does NOT need to be null terminated.
+ *
+ */
+ class Data
+ {
+ public:
+ /**
+ * This constructor initializes the Data object.
+ *
+ * @param[in] aBuffer A pointer to a `char` buffer (does not need to be null terminated).
+ * @param[in] aLength The length (number of chars) in the buffer.
+ *
+ */
+ Data(const char *aBuffer, uint8_t aLength)
+ : mBuffer(aBuffer)
+ , mLength(aLength)
+ {
+ }
+
+ /**
+ * This method returns the pointer to char buffer (not necessarily null terminated).
+ *
+ * @returns The pointer to the char buffer.
+ *
+ */
+ const char *GetBuffer(void) const { return mBuffer; }
+
+ /**
+ * This method returns the length (number of chars in buffer).
+ *
+ * @returns The name length.
+ *
+ */
+ uint8_t GetLength(void) const { return mLength; }
+
+ /**
+ * This method copies the name data into a given char buffer with a given size.
+ *
+ * The given buffer is cleared (`memset` to zero) before copying the Network Name into it. The copied string
+ * in @p aBuffer is NOT necessarily null terminated.
+ *
+ * @param[out] aBuffer A pointer to a buffer where to copy the Network Name into.
+ * @param[in] aMaxSize Size of @p aBuffer (maximum number of chars to write into @p aBuffer).
+ *
+ * @returns The actual number of chars copied into @p aBuffer.
+ *
+ */
+ uint8_t CopyTo(char *aBuffer, uint8_t aMaxSize) const;
+
+ private:
+ const char *mBuffer;
+ uint8_t mLength;
+ };
+
+ /**
+ * This constructor initializes the IEEE802.15.4 Network Name as an empty string.
+ *
+ */
+ NetworkName(void) { m8[0] = '\0'; }
+
+ /**
+ * This method gets the IEEE802.15.4 Network Name as a null terminated C string.
+ *
+ * @returns The Network Name as a null terminated C string array.
+ *
+ */
+ const char *GetAsCString(void) const { return m8; }
+
+ /**
+ * This method gets the IEEE802.15.4 Network Name as Data.
+ *
+ * @returns The Network Name as Data.
+ *
+ */
+ Data GetAsData(void) const;
+
+ /**
+ * This method sets the IEEE 802.15.4 Network Name.
+ *
+ * @param[in] aNameData A reference to name data.
+ *
+ * @retval OT_ERROR_NONE Successfully set the IEEE 802.15.4 Network Name.
+ * @retval OT_ERROR_ALREADY The name is already set to the same string.
+ * @retval OT_ERROR_INVALID_ARGS Given name is too long.
+ *
+ */
+ otError Set(const Data &aNameData);
+};
+
+/**
+ * @}
+ *
+ */
+
+} // namespace Mac
+} // namespace ot
+
+#endif // MAC_TYPES_HPP_
diff --git a/src/core/mac/sub_mac.cpp b/src/core/mac/sub_mac.cpp
index 5f19197..c5c05ac 100644
--- a/src/core/mac/sub_mac.cpp
+++ b/src/core/mac/sub_mac.cpp
@@ -61,7 +61,7 @@
, mPcapCallbackContext(NULL)
, mTimer(aInstance, &SubMac::HandleTimer, this)
{
- memset(mExtAddress.m8, 0, sizeof(mExtAddress));
+ mExtAddress.Clear();
}
otRadioCaps SubMac::GetCaps(void) const
@@ -109,13 +109,13 @@
void SubMac::SetExtAddress(const ExtAddress &aExtAddress)
{
- Address address;
+ ExtAddress address;
mExtAddress = aExtAddress;
// Reverse the byte order before setting on radio.
- address.SetExtended(aExtAddress.m8, /* aReverse */ true);
- Get<Radio>().SetExtendedAddress(address.GetExtended());
+ address.Set(aExtAddress.m8, ExtAddress::kReverseByteOrder);
+ Get<Radio>().SetExtendedAddress(address);
otLogDebgMac("RadioExtAddress: %s", mExtAddress.ToString().AsCString());
}
@@ -370,12 +370,11 @@
if (shouldRetx)
{
mTransmitRetries++;
+ aFrame.SetIsARetransmission(true);
StartCsmaBackoff();
ExitNow();
}
- mTransmitRetries = 0;
-
SetState(kStateReceive);
mCallbacks.TransmitDone(aFrame, aAckFrame, aError);
@@ -418,7 +417,7 @@
SetState(kStateEnergyScan);
mEnergyScanMaxRssi = kInvalidRssiValue;
- mEnergyScanEndTime = TimerMilli::GetNow() + aScanDuration;
+ mEnergyScanEndTime = TimerMilli::GetNow() + static_cast<uint32_t>(aScanDuration);
mTimer.Start(0);
}
else
@@ -442,7 +441,7 @@
}
}
- if (TimerMilliScheduler::IsStrictlyBefore(TimerMilli::GetNow(), mEnergyScanEndTime))
+ if (TimerMilli::GetNow() < mEnergyScanEndTime)
{
mTimer.StartAt(mTimer.GetFireTime(), kEnergyScanRssiSampleInterval);
}
@@ -558,13 +557,6 @@
return swEnergyScan;
}
-#if OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
-void SubMac::HandleFrameUpdated(TxFrame &aFrame)
-{
- mCallbacks.FrameUpdated(aFrame);
-}
-#endif
-
void SubMac::SetState(State aState)
{
if (mState != aState)
diff --git a/src/core/mac/sub_mac.hpp b/src/core/mac/sub_mac.hpp
index 53bac3a..6c08643 100644
--- a/src/core/mac/sub_mac.hpp
+++ b/src/core/mac/sub_mac.hpp
@@ -167,20 +167,6 @@
*
*/
void EnergyScanDone(int8_t aMaxRssi);
-
-#if OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
- /**
- * The method notifies user of `SubMac` to process transmit security for the frame, which happens when the
- * frame includes Header IE(s) that were updated before transmission.
- *
- * @note This function can be called from interrupt context and it would only read/write data passed in
- * via @p aFrame, but would not read/write any state within OpenThread.
- *
- * @param[in] aFrame The frame which needs to process transmit security.
- *
- */
- void FrameUpdated(TxFrame &aFrame);
-#endif
};
/**
@@ -325,6 +311,14 @@
otError Send(void);
/**
+ * This method gets the number of transmit retries of last transmit packet.
+ *
+ * @returns Number of transmit retries.
+ *
+ */
+ uint8_t GetTransmitRetries(void) const { return mTransmitRetries; }
+
+ /**
* This method gets the most recent RSSI measurement.
*
* @returns The RSSI in dBm when it is valid. `kInvalidRssiValue` when RSSI is invalid.
@@ -393,9 +387,6 @@
void HandleTransmitStarted(TxFrame &aFrame);
void HandleTransmitDone(TxFrame &aTxFrame, RxFrame *aAckFrame, otError aError);
void HandleEnergyScanDone(int8_t aMaxRssi);
-#if OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
- void HandleFrameUpdated(TxFrame &aFrame);
-#endif
static void HandleTimer(Timer &aTimer);
void HandleTimer(void);
@@ -411,7 +402,7 @@
ExtAddress mExtAddress;
bool mRxOnWhenBackoff;
int8_t mEnergyScanMaxRssi;
- uint32_t mEnergyScanEndTime;
+ TimeMilli mEnergyScanEndTime;
TxFrame & mTransmitFrame;
Callbacks mCallbacks;
otLinkPcapCallback mPcapCallback;
diff --git a/src/core/mac/sub_mac_callbacks.cpp b/src/core/mac/sub_mac_callbacks.cpp
index f6e3d09..1014594 100644
--- a/src/core/mac/sub_mac_callbacks.cpp
+++ b/src/core/mac/sub_mac_callbacks.cpp
@@ -104,22 +104,6 @@
}
}
-#if OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
-void SubMac::Callbacks::FrameUpdated(TxFrame &aFrame)
-{
- /**
- * This function will be called from interrupt context, it should only read/write data passed in
- * via @p aFrame, but should not read/write any state within OpenThread.
- *
- */
-
- if (aFrame.GetSecurityEnabled())
- {
- Get<Mac>().ProcessTransmitAesCcm(aFrame, &Get<Mac>().GetExtAddress());
- }
-}
-#endif
-
#elif OPENTHREAD_RADIO
void SubMac::Callbacks::ReceiveDone(RxFrame *aFrame, otError aError)
@@ -150,19 +134,6 @@
Get<LinkRaw>().InvokeEnergyScanDone(aMaxRssi);
}
-#if OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
-void SubMac::Callbacks::FrameUpdated(TxFrame &)
-{
- /**
- * This function will be called from interrupt context, it should only read/write data passed in
- * via @p aFrame, but should not read/write any state within OpenThread.
- *
- */
-
- // For now this functionality is not supported in Radio Only mode.
-}
-#endif
-
#endif // OPENTHREAD_RADIO
} // namespace Mac
diff --git a/src/core/meshcop/announce_begin_client.cpp b/src/core/meshcop/announce_begin_client.cpp
index 8a3ea4f..e12676c 100644
--- a/src/core/meshcop/announce_begin_client.cpp
+++ b/src/core/meshcop/announce_begin_client.cpp
@@ -77,19 +77,19 @@
sessionId.Init();
sessionId.SetCommissionerSessionId(Get<MeshCoP::Commissioner>().GetSessionId());
- SuccessOrExit(error = message->AppendTlv(sessionId));
+ SuccessOrExit(error = sessionId.AppendTo(*message));
channelMask.Init();
channelMask.SetChannelMask(aChannelMask);
- SuccessOrExit(error = message->AppendTlv(channelMask));
+ SuccessOrExit(error = channelMask.AppendTo(*message));
count.Init();
count.SetCount(aCount);
- SuccessOrExit(error = message->AppendTlv(count));
+ SuccessOrExit(error = count.AppendTo(*message));
period.Init();
period.SetPeriod(aPeriod);
- SuccessOrExit(error = message->AppendTlv(period));
+ SuccessOrExit(error = period.AppendTo(*message));
messageInfo.SetSockAddr(Get<Mle::MleRouter>().GetMeshLocal16());
messageInfo.SetPeerAddr(aAddress);
diff --git a/src/core/meshcop/border_agent.cpp b/src/core/meshcop/border_agent.cpp
index 501944c..f97ed5c 100644
--- a/src/core/meshcop/border_agent.cpp
+++ b/src/core/meshcop/border_agent.cpp
@@ -118,7 +118,10 @@
aMessage.Init(OT_COAP_TYPE_ACKNOWLEDGMENT, aCode);
}
- aMessage.SetMessageId(mSeparate ? 0 : mMessageId);
+ if (!mSeparate)
+ {
+ aMessage.SetMessageId(mMessageId);
+ }
return aMessage.SetToken(mToken, mTokenLength);
}
@@ -199,7 +202,11 @@
message->Init(OT_COAP_TYPE_ACKNOWLEDGMENT, CoapCodeFromError(aError));
}
- message->SetMessageId(aSeparate ? 0 : aRequest.GetMessageId());
+ if (!aSeparate)
+ {
+ message->SetMessageId(aRequest.GetMessageId());
+ }
+
SuccessOrExit(error = message->SetToken(aRequest.GetToken(), aRequest.GetTokenLength()));
SuccessOrExit(error = aCoapSecure.SendMessage(*message, aCoapSecure.GetPeerAddress()));
@@ -348,6 +355,7 @@
, mTimer(aInstance, HandleTimeout, this)
, mState(OT_BORDER_AGENT_STATE_STOPPED)
{
+ mCommissionerAloc.Clear();
mCommissionerAloc.mPrefixLength = 64;
mCommissionerAloc.mPreferred = true;
mCommissionerAloc.mValid = true;
@@ -436,7 +444,7 @@
tlv.Init();
tlv.SetAddress(aMessageInfo.GetPeerAddr());
- SuccessOrExit(error = message->AppendTlv(tlv));
+ SuccessOrExit(error = tlv.AppendTo(*message));
}
SuccessOrExit(error = Get<Coap::CoapSecure>().SendMessage(*message, Get<Coap::CoapSecure>().GetPeerAddress()));
@@ -652,7 +660,7 @@
VerifyOrExit(mState == OT_BORDER_AGENT_STATE_STOPPED, error = OT_ERROR_ALREADY);
SuccessOrExit(error = coaps.Start(kBorderAgentUdpPort));
- SuccessOrExit(error = coaps.SetPsk(Get<KeyManager>().GetPSKc().m8, OT_PSKC_MAX_SIZE));
+ SuccessOrExit(error = coaps.SetPsk(Get<KeyManager>().GetPskc().m8, OT_PSKC_MAX_SIZE));
coaps.SetConnectedCallback(HandleConnected, this);
coaps.AddResource(mActiveGet);
diff --git a/src/core/meshcop/commissioner.cpp b/src/core/meshcop/commissioner.cpp
index a22294c..06578bd 100644
--- a/src/core/meshcop/commissioner.cpp
+++ b/src/core/meshcop/commissioner.cpp
@@ -34,13 +34,13 @@
#include "commissioner.hpp"
#include <stdio.h>
-#include "utils/wrap_string.h"
#include "coap/coap_message.hpp"
#include "common/encoding.hpp"
#include "common/instance.hpp"
#include "common/locator-getters.hpp"
#include "common/logging.hpp"
+#include "common/string.hpp"
#include "crypto/pbkdf2_cmac.h"
#include "meshcop/joiner_router.hpp"
#include "meshcop/meshcop.hpp"
@@ -58,10 +58,11 @@
: InstanceLocator(aInstance)
, mJoinerPort(0)
, mJoinerRloc(0)
+ , mSessionId(0)
+ , mJoinerIndex(0)
+ , mTransmitAttempts(0)
, mJoinerExpirationTimer(aInstance, HandleJoinerExpirationTimer, this)
, mTimer(aInstance, HandleTimer, this)
- , mSessionId(0)
- , mTransmitAttempts(0)
, mRelayReceive(OT_URI_PATH_RELAY_RX, &Commissioner::HandleRelayReceive, this)
, mDatasetChanged(OT_URI_PATH_DATASET_CHANGED, &Commissioner::HandleDatasetChanged, this)
, mJoinerFinalize(OT_URI_PATH_JOINER_FINALIZE, &Commissioner::HandleJoinerFinalize, this)
@@ -75,18 +76,22 @@
{
memset(mJoiners, 0, sizeof(mJoiners));
+ mCommissionerAloc.Clear();
mCommissionerAloc.mPrefixLength = 64;
mCommissionerAloc.mPreferred = true;
mCommissionerAloc.mValid = true;
mCommissionerAloc.mScopeOverride = Ip6::Address::kRealmLocalScope;
mCommissionerAloc.mScopeOverrideValid = true;
- mProvisioningUrl.Init();
+
+ mProvisioningUrl[0] = '\0';
}
void Commissioner::SetState(otCommissionerState aState)
{
VerifyOrExit(mState != aState);
+ otLogInfoMeshCoP("Commissioner State: %s -> %s", StateToString(mState), StateToString(aState));
+
mState = aState;
if (mStateCallback)
@@ -132,8 +137,8 @@
event = aConnected ? OT_COMMISSIONER_JOINER_CONNECTED : OT_COMMISSIONER_JOINER_END;
- memcpy(&joinerId, mJoinerIid, sizeof(joinerId));
- joinerId.m8[0] ^= 0x2;
+ joinerId.Set(mJoinerIid);
+ joinerId.ToggleLocal();
SignalJoinerEvent(event, joinerId);
}
@@ -144,6 +149,7 @@
{
otError error = OT_ERROR_NONE;
+ VerifyOrExit(Get<Mle::MleRouter>().IsAttached(), error = OT_ERROR_INVALID_STATE);
VerifyOrExit(mState == OT_COMMISSIONER_STATE_DISABLED, error = OT_ERROR_INVALID_STATE);
SuccessOrExit(error = Get<Coap::CoapSecure>().Start(SendRelayTransmit, this));
@@ -175,7 +181,6 @@
mTransmitAttempts = 0;
mTimer.Stop();
- Get<Coap::CoapSecure>().Stop();
SetState(OT_COMMISSIONER_STATE_DISABLED);
@@ -204,21 +209,21 @@
steeringData.Init();
steeringData.Clear();
- for (size_t i = 0; i < OT_ARRAY_LENGTH(mJoiners); i++)
+ for (Joiner *joiner = &mJoiners[0]; joiner < OT_ARRAY_END(mJoiners); joiner++)
{
- if (!mJoiners[i].mValid)
+ if (!joiner->mValid)
{
continue;
}
- if (mJoiners[i].mAny)
+ if (joiner->mAny)
{
steeringData.SetLength(1);
steeringData.Set();
break;
}
- ComputeJoinerId(mJoiners[i].mEui64, joinerId);
+ ComputeJoinerId(joiner->mEui64, joinerId);
steeringData.ComputeBloomFilter(joinerId);
}
@@ -235,64 +240,83 @@
void Commissioner::ClearJoiners(void)
{
- for (size_t i = 0; i < OT_ARRAY_LENGTH(mJoiners); i++)
+ for (Joiner *joiner = &mJoiners[0]; joiner < OT_ARRAY_END(mJoiners); joiner++)
{
- mJoiners[i].mValid = false;
+ joiner->mValid = false;
}
SendCommissionerSet();
}
-otError Commissioner::AddJoiner(const Mac::ExtAddress *aEui64, const char *aPSKd, uint32_t aTimeout)
+otError Commissioner::AddJoiner(const Mac::ExtAddress *aEui64, const char *aPskd, uint32_t aTimeout)
{
otError error = OT_ERROR_NO_BUFS;
VerifyOrExit(mState == OT_COMMISSIONER_STATE_ACTIVE, error = OT_ERROR_INVALID_STATE);
- VerifyOrExit(strlen(aPSKd) <= Dtls::kPskMaxLength, error = OT_ERROR_INVALID_ARGS);
+ VerifyOrExit(StringLength(aPskd, Dtls::kPskMaxLength + 1) <= Dtls::kPskMaxLength, error = OT_ERROR_INVALID_ARGS);
+
RemoveJoiner(aEui64, 0); // remove immediately
- for (size_t i = 0; i < OT_ARRAY_LENGTH(mJoiners); i++)
+ for (Joiner *joiner = &mJoiners[0]; joiner < OT_ARRAY_END(mJoiners); joiner++)
{
- if (mJoiners[i].mValid)
+ if (joiner->mValid)
{
continue;
}
if (aEui64 != NULL)
{
- memcpy(&mJoiners[i].mEui64, aEui64, sizeof(mJoiners[i].mEui64));
- mJoiners[i].mAny = false;
+ joiner->mEui64 = *aEui64;
+ joiner->mAny = false;
}
else
{
- mJoiners[i].mAny = true;
+ joiner->mAny = true;
}
- (void)strlcpy(mJoiners[i].mPsk, aPSKd, sizeof(mJoiners[i].mPsk));
- mJoiners[i].mValid = true;
- mJoiners[i].mExpirationTime = TimerMilli::GetNow() + TimerMilli::SecToMsec(aTimeout);
+ strncpy(joiner->mPsk, aPskd, sizeof(joiner->mPsk) - 1);
+ joiner->mValid = true;
+ joiner->mExpirationTime = TimerMilli::GetNow() + Time::SecToMsec(aTimeout);
UpdateJoinerExpirationTimer();
SendCommissionerSet();
+ otLogInfoMeshCoP("Added Joiner (%s, %s)", (aEui64 != NULL) ? aEui64->ToString().AsCString() : "*", aPskd);
+
ExitNow(error = OT_ERROR_NONE);
}
exit:
- if (error == OT_ERROR_NONE)
+ return error;
+}
+
+otError Commissioner::GetNextJoinerInfo(uint16_t &aIterator, otJoinerInfo &aJoiner) const
+{
+ otError error = OT_ERROR_NONE;
+ size_t index;
+
+ for (index = aIterator; index < OT_ARRAY_LENGTH(mJoiners); index++)
{
- if (aEui64)
+ if (!mJoiners[index].mValid)
{
- otLogInfoMeshCoP("Added Joiner (%s, %s)", aEui64->ToString().AsCString(), aPSKd);
+ continue;
}
- else
- {
- otLogInfoMeshCoP("Added Joiner (*, %s)", aPSKd);
- }
+
+ memset(&aJoiner, 0, sizeof(aJoiner));
+
+ aJoiner.mAny = mJoiners[index].mAny;
+ aJoiner.mEui64 = mJoiners[index].mEui64;
+ strncpy(aJoiner.mPsk, mJoiners[index].mPsk, sizeof(aJoiner.mPsk) - 1);
+ aJoiner.mExpirationTime = mJoiners[index].mExpirationTime - TimerMilli::GetNow();
+ aIterator = static_cast<uint16_t>(index) + 1;
+ ExitNow();
}
+ error = OT_ERROR_NOT_FOUND;
+
+exit:
return error;
}
@@ -302,54 +326,46 @@
VerifyOrExit(mState == OT_COMMISSIONER_STATE_ACTIVE, error = OT_ERROR_INVALID_STATE);
- for (size_t i = 0; i < OT_ARRAY_LENGTH(mJoiners); i++)
+ for (Joiner *joiner = &mJoiners[0]; joiner < OT_ARRAY_END(mJoiners); joiner++)
{
- Mac::ExtAddress joinerId;
-
- if (!mJoiners[i].mValid)
+ if (!joiner->mValid)
{
continue;
}
if (aEui64 != NULL)
{
- if (memcmp(&mJoiners[i].mEui64, aEui64, sizeof(mJoiners[i].mEui64)))
+ if (joiner->mEui64 != *aEui64)
{
continue;
}
}
- else if (!mJoiners[i].mAny)
+ else if (!joiner->mAny)
{
continue;
}
if (aDelay > 0)
{
- uint32_t now = TimerMilli::GetNow();
+ TimeMilli now = TimerMilli::GetNow();
- if ((static_cast<int32_t>(mJoiners[i].mExpirationTime - now) > 0) &&
- (static_cast<uint32_t>(mJoiners[i].mExpirationTime - now) > TimerMilli::SecToMsec(aDelay)))
+ if ((joiner->mExpirationTime > now) && (joiner->mExpirationTime - now > Time::SecToMsec(aDelay)))
{
- mJoiners[i].mExpirationTime = now + TimerMilli::SecToMsec(aDelay);
+ joiner->mExpirationTime = now + Time::SecToMsec(aDelay);
UpdateJoinerExpirationTimer();
}
}
else
{
- mJoiners[i].mValid = false;
+ Mac::ExtAddress joinerId;
+
+ joiner->mValid = false;
UpdateJoinerExpirationTimer();
SendCommissionerSet();
- if (aEui64)
- {
- otLogInfoMeshCoP("Removed Joiner (%s)", aEui64->ToString().AsCString());
- }
- else
- {
- otLogInfoMeshCoP("Removed Joiner (*)");
- }
+ otLogInfoMeshCoP("Removed Joiner (%s)", (aEui64 != NULL) ? aEui64->ToString().AsCString() : "*");
- ComputeJoinerId(mJoiners[i].mEui64, joinerId);
+ ComputeJoinerId(joiner->mEui64, joinerId);
SignalJoinerEvent(OT_COMMISSIONER_JOINER_REMOVED, joinerId);
}
@@ -360,39 +376,28 @@
return error;
}
-const char *Commissioner::GetProvisioningUrl(uint16_t &aLength) const
-{
- aLength = mProvisioningUrl.GetLength();
-
- return mProvisioningUrl.GetProvisioningUrl();
-}
-
otError Commissioner::SetProvisioningUrl(const char *aProvisioningUrl)
{
otError error = OT_ERROR_NONE;
+ uint8_t len;
- if (aProvisioningUrl != NULL)
+ if (aProvisioningUrl == NULL)
{
- size_t len = strnlen(aProvisioningUrl, MeshCoP::ProvisioningUrlTlv::kMaxLength + 1);
- VerifyOrExit(len <= MeshCoP::ProvisioningUrlTlv::kMaxLength, error = OT_ERROR_INVALID_ARGS);
+ mProvisioningUrl[0] = '\0';
+ ExitNow();
}
- mProvisioningUrl.SetProvisioningUrl(aProvisioningUrl);
+ len = static_cast<uint8_t>(StringLength(aProvisioningUrl, sizeof(mProvisioningUrl)));
+
+ VerifyOrExit(len < sizeof(mProvisioningUrl), error = OT_ERROR_INVALID_ARGS);
+
+ memcpy(mProvisioningUrl, aProvisioningUrl, len);
+ mProvisioningUrl[len] = '\0';
exit:
return error;
}
-uint16_t Commissioner::GetSessionId(void) const
-{
- return mSessionId;
-}
-
-otCommissionerState Commissioner::GetState(void) const
-{
- return mState;
-}
-
void Commissioner::HandleTimer(Timer &aTimer)
{
aTimer.GetOwner<Commissioner>().HandleTimer();
@@ -422,20 +427,20 @@
void Commissioner::HandleJoinerExpirationTimer(void)
{
- uint32_t now = TimerMilli::GetNow();
+ TimeMilli now = TimerMilli::GetNow();
// Remove Joiners.
- for (size_t i = 0; i < OT_ARRAY_LENGTH(mJoiners); i++)
+ for (Joiner *joiner = &mJoiners[0]; joiner < OT_ARRAY_END(mJoiners); joiner++)
{
- if (!mJoiners[i].mValid)
+ if (!joiner->mValid)
{
continue;
}
- if (static_cast<int32_t>(now - mJoiners[i].mExpirationTime) >= 0)
+ if (now >= joiner->mExpirationTime)
{
otLogDebgMeshCoP("removing joiner due to timeout or successfully joined");
- RemoveJoiner(&mJoiners[i].mEui64, 0); // remove immediately
+ RemoveJoiner(&joiner->mEui64, 0); // remove immediately
}
}
@@ -444,32 +449,34 @@
void Commissioner::UpdateJoinerExpirationTimer(void)
{
- uint32_t now = TimerMilli::GetNow();
- uint32_t nextTimeout = TimerMilli::kForeverDt;
+ TimeMilli now = TimerMilli::GetNow();
+ uint32_t nextTimeout = TimeMilli::kMaxDuration;
// Check if timer should be set for next Joiner.
- for (size_t i = 0; i < OT_ARRAY_LENGTH(mJoiners); i++)
+ for (Joiner *joiner = &mJoiners[0]; joiner < OT_ARRAY_END(mJoiners); joiner++)
{
- int32_t diff;
+ uint32_t diff;
- if (!mJoiners[i].mValid)
+ if (!joiner->mValid)
{
continue;
}
- diff = TimerMilli::Diff(now, mJoiners[i].mExpirationTime);
- if (diff <= 0)
+ if (now >= joiner->mExpirationTime)
{
nextTimeout = 0;
break;
}
- else if (static_cast<uint32_t>(diff) < nextTimeout)
+
+ diff = joiner->mExpirationTime - now;
+
+ if (diff < nextTimeout)
{
- nextTimeout = static_cast<uint32_t>(diff);
+ nextTimeout = diff;
}
}
- if (nextTimeout != TimerMilli::kForeverDt)
+ if (nextTimeout != TimeMilli::kMaxDuration)
{
// Update the timer to the timeout of the next Joiner.
mJoinerExpirationTimer.Start(nextTimeout);
@@ -563,7 +570,7 @@
MeshCoP::BorderAgentLocatorTlv locator;
locator.Init();
locator.SetBorderAgentLocator(aDataset.mLocator);
- SuccessOrExit(error = message->AppendTlv(locator));
+ SuccessOrExit(error = locator.AppendTo(*message));
}
if (aDataset.mIsSessionIdSet)
@@ -571,7 +578,7 @@
MeshCoP::CommissionerSessionIdTlv sessionId;
sessionId.Init();
sessionId.SetCommissionerSessionId(aDataset.mSessionId);
- SuccessOrExit(error = message->AppendTlv(sessionId));
+ SuccessOrExit(error = sessionId.AppendTo(*message));
}
if (aDataset.mIsSteeringDataSet)
@@ -588,7 +595,7 @@
MeshCoP::JoinerUdpPortTlv joinerUdpPort;
joinerUdpPort.Init();
joinerUdpPort.SetUdpPort(aDataset.mJoinerUdpPort);
- SuccessOrExit(error = message->AppendTlv(joinerUdpPort));
+ SuccessOrExit(error = joinerUdpPort.AppendTo(*message));
}
if (aLength > 0)
@@ -659,7 +666,7 @@
commissionerId.Init();
commissionerId.SetCommissionerId("OpenThread Commissioner");
- SuccessOrExit(error = message->AppendTlv(commissionerId));
+ SuccessOrExit(error = commissionerId.AppendTo(*message));
SuccessOrExit(error = Get<Mle::MleRouter>().GetLeaderAloc(messageInfo.GetPeerAddr()));
messageInfo.SetPeerPort(kCoapUdpPort);
@@ -719,7 +726,7 @@
SetState(OT_COMMISSIONER_STATE_ACTIVE);
mTransmitAttempts = 0;
- mTimer.Start(TimerMilli::SecToMsec(kKeepAliveTimeout) / 2);
+ mTimer.Start(Time::SecToMsec(kKeepAliveTimeout) / 2);
exit:
@@ -731,7 +738,7 @@
}
else
{
- mTimer.Start(TimerMilli::SecToMsec(kPetitionRetryDelay));
+ mTimer.Start(Time::SecToMsec(kPetitionRetryDelay));
}
}
}
@@ -751,11 +758,11 @@
state.Init();
state.SetState(mState == OT_COMMISSIONER_STATE_ACTIVE ? StateTlv::kAccept : StateTlv::kReject);
- SuccessOrExit(error = message->AppendTlv(state));
+ SuccessOrExit(error = state.AppendTo(*message));
sessionId.Init();
sessionId.SetCommissionerSessionId(mSessionId);
- SuccessOrExit(error = message->AppendTlv(sessionId));
+ SuccessOrExit(error = sessionId.AppendTo(*message));
messageInfo.SetSockAddr(Get<Mle::MleRouter>().GetMeshLocal16());
SuccessOrExit(error = Get<Mle::MleRouter>().GetLeaderAloc(messageInfo.GetPeerAddr()));
@@ -803,7 +810,7 @@
VerifyOrExit(state.GetState() == StateTlv::kAccept, SetState(OT_COMMISSIONER_STATE_DISABLED));
- mTimer.Start(TimerMilli::SecToMsec(kKeepAliveTimeout) / 2);
+ mTimer.Start(Time::SecToMsec(kKeepAliveTimeout) / 2);
exit:
@@ -832,6 +839,7 @@
uint16_t offset;
uint16_t length;
bool enableJoiner = false;
+ Mac::ExtAddress receivedId;
Mac::ExtAddress joinerId;
VerifyOrExit(mState == OT_COMMISSIONER_STATE_ACTIVE, error = OT_ERROR_INVALID_STATE);
@@ -853,23 +861,25 @@
if (!Get<Coap::CoapSecure>().IsConnectionActive())
{
memcpy(mJoinerIid, joinerIid.GetIid(), sizeof(mJoinerIid));
- mJoinerIid[0] ^= 0x2;
- for (uint8_t i = 0; i < OT_ARRAY_LENGTH(mJoiners); i++)
+ receivedId.Set(mJoinerIid);
+ receivedId.ToggleLocal();
+
+ for (Joiner *joiner = &mJoiners[0]; joiner < OT_ARRAY_END(mJoiners); joiner++)
{
- if (!mJoiners[i].mValid)
+ if (!joiner->mValid)
{
continue;
}
- ComputeJoinerId(mJoiners[i].mEui64, joinerId);
+ ComputeJoinerId(joiner->mEui64, joinerId);
- if (mJoiners[i].mAny || !memcmp(&joinerId, mJoinerIid, sizeof(joinerId)))
+ if (joiner->mAny || (joinerId == receivedId))
{
- error = Get<Coap::CoapSecure>().SetPsk(reinterpret_cast<const uint8_t *>(mJoiners[i].mPsk),
- static_cast<uint8_t>(strlen(mJoiners[i].mPsk)));
+ error = Get<Coap::CoapSecure>().SetPsk(reinterpret_cast<const uint8_t *>(joiner->mPsk),
+ static_cast<uint8_t>(strlen(joiner->mPsk)));
SuccessOrExit(error);
- mJoinerIndex = i;
+ mJoinerIndex = static_cast<uint8_t>(joiner - mJoiners);
enableJoiner = true;
otLogInfoMeshCoP("found joiner, starting new session");
@@ -878,8 +888,6 @@
break;
}
}
-
- mJoinerIid[0] ^= 0x2;
}
else
{
@@ -945,9 +953,10 @@
if (Tlv::GetTlv(aMessage, Tlv::kProvisioningUrl, sizeof(provisioningUrl), provisioningUrl) == OT_ERROR_NONE)
{
- if (provisioningUrl.GetProvisioningUrlLength() != mProvisioningUrl.GetProvisioningUrlLength() ||
- memcmp(provisioningUrl.GetProvisioningUrl(), mProvisioningUrl.GetProvisioningUrl(),
- provisioningUrl.GetProvisioningUrlLength()) != 0)
+ uint8_t len = static_cast<uint8_t>(StringLength(mProvisioningUrl, sizeof(mProvisioningUrl)));
+
+ if ((provisioningUrl.GetProvisioningUrlLength() != len) ||
+ !memcmp(provisioningUrl.GetProvisioningUrl(), mProvisioningUrl, len))
{
state = StateTlv::kReject;
}
@@ -984,7 +993,7 @@
stateTlv.Init();
stateTlv.SetState(aState);
- SuccessOrExit(error = message->AppendTlv(stateTlv));
+ SuccessOrExit(error = stateTlv.AppendTo(*message));
joinerMessageInfo.SetPeerAddr(Get<Mle::MleRouter>().GetMeshLocal64());
joinerMessageInfo.GetPeerAddr().SetIid(mJoinerIid);
@@ -1000,8 +1009,8 @@
SuccessOrExit(error = Get<Coap::CoapSecure>().SendMessage(*message, joinerMessageInfo));
- memcpy(&joinerId, mJoinerIid, sizeof(joinerId));
- joinerId.m8[0] ^= 0x2;
+ joinerId.Set(mJoinerIid);
+ joinerId.ToggleLocal();
SignalJoinerEvent(OT_COMMISSIONER_JOINER_FINALIZE, joinerId);
if (!mJoiners[mJoinerIndex].mAny)
@@ -1046,22 +1055,22 @@
udpPort.Init();
udpPort.SetUdpPort(mJoinerPort);
- SuccessOrExit(error = message->AppendTlv(udpPort));
+ SuccessOrExit(error = udpPort.AppendTo(*message));
iid.Init();
iid.SetIid(mJoinerIid);
- SuccessOrExit(error = message->AppendTlv(iid));
+ SuccessOrExit(error = iid.AppendTo(*message));
rloc.Init();
rloc.SetJoinerRouterLocator(mJoinerRloc);
- SuccessOrExit(error = message->AppendTlv(rloc));
+ SuccessOrExit(error = rloc.AppendTo(*message));
if (aMessage.GetSubType() == Message::kSubTypeJoinerFinalizeResponse)
{
JoinerRouterKekTlv kek;
kek.Init();
kek.SetKek(Get<KeyManager>().GetKek());
- SuccessOrExit(error = message->AppendTlv(kek));
+ SuccessOrExit(error = kek.AppendTo(*message));
}
tlv.SetType(Tlv::kJoinerDtlsEncapsulation);
@@ -1089,37 +1098,73 @@
return error;
}
-otError Commissioner::GeneratePSKc(const char * aPassPhrase,
- const char * aNetworkName,
- const otExtendedPanId &aExtPanId,
- uint8_t * aPSKc)
+otError Commissioner::GeneratePskc(const char * aPassPhrase,
+ const char * aNetworkName,
+ const Mac::ExtendedPanId &aExtPanId,
+ Pskc & aPskc)
{
- otError error = OT_ERROR_NONE;
- const char *saltPrefix = "Thread";
- uint8_t salt[OT_PBKDF2_SALT_MAX_LEN];
- uint16_t saltLen = 0;
+ otError error = OT_ERROR_NONE;
+ const char saltPrefix[] = "Thread";
+ uint8_t salt[OT_PBKDF2_SALT_MAX_LEN];
+ uint16_t saltLen = 0;
+ uint16_t passphraseLen;
+ uint8_t networkNameLen;
- VerifyOrExit((strlen(aPassPhrase) >= OT_COMMISSIONING_PASSPHRASE_MIN_SIZE) &&
- (strlen(aPassPhrase) <= OT_COMMISSIONING_PASSPHRASE_MAX_SIZE),
+ passphraseLen = static_cast<uint16_t>(StringLength(aPassPhrase, OT_COMMISSIONING_PASSPHRASE_MAX_SIZE + 1));
+ networkNameLen = static_cast<uint8_t>(StringLength(aNetworkName, OT_NETWORK_NAME_MAX_SIZE + 1));
+
+ VerifyOrExit((passphraseLen >= OT_COMMISSIONING_PASSPHRASE_MIN_SIZE) &&
+ (passphraseLen <= OT_COMMISSIONING_PASSPHRASE_MAX_SIZE) &&
+ (networkNameLen <= OT_NETWORK_NAME_MAX_SIZE),
error = OT_ERROR_INVALID_ARGS);
memset(salt, 0, sizeof(salt));
- memcpy(salt, saltPrefix, strlen(saltPrefix));
- saltLen += static_cast<uint16_t>(strlen(saltPrefix));
+ memcpy(salt, saltPrefix, sizeof(saltPrefix) - 1);
+ saltLen += static_cast<uint16_t>(sizeof(saltPrefix) - 1);
memcpy(salt + saltLen, aExtPanId.m8, sizeof(aExtPanId));
saltLen += OT_EXT_PAN_ID_SIZE;
- memcpy(salt + saltLen, aNetworkName, strlen(aNetworkName));
- saltLen += static_cast<uint16_t>(strlen(aNetworkName));
+ memcpy(salt + saltLen, aNetworkName, networkNameLen);
+ saltLen += networkNameLen;
- otPbkdf2Cmac(reinterpret_cast<const uint8_t *>(aPassPhrase), static_cast<uint16_t>(strlen(aPassPhrase)),
- reinterpret_cast<const uint8_t *>(salt), saltLen, 16384, OT_PSKC_MAX_SIZE, aPSKc);
+ otPbkdf2Cmac(reinterpret_cast<const uint8_t *>(aPassPhrase), passphraseLen, reinterpret_cast<const uint8_t *>(salt),
+ saltLen, 16384, OT_PSKC_MAX_SIZE, aPskc.m8);
exit:
return error;
}
+// LCOV_EXCL_START
+
+#if (OPENTHREAD_CONFIG_LOG_LEVEL >= OT_LOG_LEVEL_INFO) && (OPENTHREAD_CONFIG_LOG_MLE == 1)
+
+const char *Commissioner::StateToString(otCommissionerState aState)
+{
+ const char *str = "Unknown";
+
+ switch (aState)
+ {
+ case OT_COMMISSIONER_STATE_DISABLED:
+ str = "disabled";
+ break;
+ case OT_COMMISSIONER_STATE_PETITION:
+ str = "petition";
+ break;
+ case OT_COMMISSIONER_STATE_ACTIVE:
+ str = "active";
+ break;
+ default:
+ break;
+ }
+
+ return str;
+}
+
+#endif // (OPENTHREAD_CONFIG_LOG_LEVEL >= OT_LOG_LEVEL_INFO) && (OPENTHREAD_CONFIG_LOG_MLE == 1)
+
+// LCOV_EXCL_STOP
+
} // namespace MeshCoP
} // namespace ot
diff --git a/src/core/meshcop/commissioner.hpp b/src/core/meshcop/commissioner.hpp
index 484087c..a59dc6e 100644
--- a/src/core/meshcop/commissioner.hpp
+++ b/src/core/meshcop/commissioner.hpp
@@ -42,12 +42,13 @@
#include "coap/coap_secure.hpp"
#include "common/locator.hpp"
#include "common/timer.hpp"
-#include "mac/mac_frame.hpp"
+#include "mac/mac_types.hpp"
#include "meshcop/announce_begin_client.hpp"
#include "meshcop/dtls.hpp"
#include "meshcop/energy_scan_client.hpp"
#include "meshcop/panid_query_client.hpp"
#include "net/udp6.hpp"
+#include "thread/key_manager.hpp"
#include "thread/mle.hpp"
namespace ot {
@@ -99,7 +100,7 @@
* This method adds a Joiner entry.
*
* @param[in] aEui64 A pointer to the Joiner's IEEE EUI-64 or NULL for any Joiner.
- * @param[in] aPSKd A pointer to the PSKd.
+ * @param[in] aPskd A pointer to the PSKd.
* @param[in] aTimeout A time after which a Joiner is automatically removed, in seconds.
*
* @retval OT_ERROR_NONE Successfully added the Joiner.
@@ -107,7 +108,19 @@
* @retval OT_ERROR_INVALID_STATE Commissioner service is not started.
*
*/
- otError AddJoiner(const Mac::ExtAddress *aEui64, const char *aPSKd, uint32_t aTimeout);
+ otError AddJoiner(const Mac::ExtAddress *aEui64, const char *aPskd, uint32_t aTimeout);
+
+ /**
+ * This method get joiner info at aIterator position.
+ *
+ * @param[inout] aIterator A iterator to the index of the joiner.
+ * @param[out] aJoiner A reference to Joiner info.
+ *
+ * @retval OT_ERROR_NONE Successfully get the Joiner info.
+ * @retval OT_ERROR_NOT_FOUND Not found next Joiner.
+ *
+ */
+ otError GetNextJoinerInfo(uint16_t &aIterator, otJoinerInfo &aJoiner) const;
/**
* This method removes a Joiner entry.
@@ -125,22 +138,18 @@
/**
* This method gets the Provisioning URL.
*
- * @param[out] aLength A reference to `uint16_t` to return the length (number of chars) in the URL string.
- *
- * Note that the returned URL string buffer is not necessarily null-terminated.
- *
* @returns A pointer to char buffer containing the URL string.
*
*/
- const char *GetProvisioningUrl(uint16_t &aLength) const;
+ const char *GetProvisioningUrl(void) const { return mProvisioningUrl; }
/**
* This method sets the Provisioning URL.
*
- * @param[in] aProvisioningUrl A pointer to the Provisioning URL (may be NULL).
+ * @param[in] aProvisioningUrl A pointer to the Provisioning URL (may be NULL to set URL to empty string).
*
- * @retval OT_ERROR_NONE Successfully added the Joiner.
- * @retval OT_ERROR_INVALID_ARGS @p aProvisioningUrl is invalid.
+ * @retval OT_ERROR_NONE Successfully set the Provisioning URL.
+ * @retval OT_ERROR_INVALID_ARGS @p aProvisioningUrl is invalid (too long).
*
*/
otError SetProvisioningUrl(const char *aProvisioningUrl);
@@ -151,7 +160,7 @@
* @returns The Commissioner Session ID.
*
*/
- uint16_t GetSessionId(void) const;
+ uint16_t GetSessionId(void) const { return mSessionId; }
/**
* This method indicates whether or not the Commissioner role is active.
@@ -171,7 +180,7 @@
* @retval OT_COMMISSIONER_STATE_ACTIVE Commissioner enabled.
*
*/
- otCommissionerState GetState(void) const;
+ otCommissionerState GetState(void) const { return mState; }
/**
* This method sends MGMT_COMMISSIONER_GET.
@@ -210,16 +219,16 @@
* @param[in] aPassPhrase The commissioning passphrase.
* @param[in] aNetworkName The network name for PSKc computation.
* @param[in] aExtPanId The extended pan id for PSKc computation.
- * @param[out] aPSKc A pointer to where the generated PSKc will be placed.
+ * @param[out] aPskc A reference to a PSKc where the generated PSKc will be placed.
*
* @retval OT_ERROR_NONE Successfully generate PSKc.
* @retval OT_ERROR_INVALID_ARGS If the length of passphrase is out of range.
*
*/
- static otError GeneratePSKc(const char * aPassPhrase,
- const char * aNetworkName,
- const otExtendedPanId &aExtPanId,
- uint8_t * aPSKc);
+ static otError GeneratePskc(const char * aPassPhrase,
+ const char * aNetworkName,
+ const Mac::ExtendedPanId &aExtPanId,
+ Pskc & aPskc);
/**
* This method returns a reference to the AnnounceBeginClient instance.
@@ -315,25 +324,26 @@
void SetState(otCommissionerState aState);
void SignalJoinerEvent(otCommissionerJoinerEvent aEvent, const Mac::ExtAddress &aJoinerId);
+ static const char *StateToString(otCommissionerState aState);
+
struct Joiner
{
Mac::ExtAddress mEui64;
- uint32_t mExpirationTime;
+ TimeMilli mExpirationTime;
char mPsk[Dtls::kPskMaxLength + 1];
bool mValid : 1;
bool mAny : 1;
};
Joiner mJoiners[OPENTHREAD_CONFIG_COMMISSIONER_MAX_JOINER_ENTRIES];
- uint8_t mJoinerIid[8];
+ uint8_t mJoinerIid[Ip6::Address::kInterfaceIdentifierSize];
uint16_t mJoinerPort;
uint16_t mJoinerRloc;
- uint8_t mJoinerIndex;
- TimerMilli mJoinerExpirationTimer;
-
- TimerMilli mTimer;
uint16_t mSessionId;
+ uint8_t mJoinerIndex;
uint8_t mTransmitAttempts;
+ TimerMilli mJoinerExpirationTimer;
+ TimerMilli mTimer;
Coap::Resource mRelayReceive;
Coap::Resource mDatasetChanged;
@@ -345,7 +355,7 @@
Ip6::NetifUnicastAddress mCommissionerAloc;
- ProvisioningUrlTlv mProvisioningUrl;
+ char mProvisioningUrl[OT_PROVISIONING_URL_MAX_SIZE + 1]; // + 1 is for null char at end of string.
otCommissionerStateCallback mStateCallback;
otCommissionerJoinerCallback mJoinerCallback;
diff --git a/src/core/meshcop/dataset.cpp b/src/core/meshcop/dataset.cpp
index 99dc216..b3adad1 100644
--- a/src/core/meshcop/dataset.cpp
+++ b/src/core/meshcop/dataset.cpp
@@ -40,6 +40,7 @@
#include "common/instance.hpp"
#include "common/locator-getters.hpp"
#include "common/logging.hpp"
+#include "mac/mac_types.hpp"
#include "meshcop/meshcop_tlvs.hpp"
#include "thread/mle_tlvs.hpp"
@@ -190,8 +191,7 @@
case Tlv::kNetworkName:
{
const NetworkNameTlv *tlv = static_cast<const NetworkNameTlv *>(cur);
- memcpy(aDataset.mNetworkName.m8, tlv->GetNetworkName(), tlv->GetLength());
- aDataset.mNetworkName.m8[tlv->GetLength()] = '\0';
+ static_cast<Mac::NetworkName &>(aDataset.mNetworkName).Set(tlv->GetNetworkName());
aDataset.mComponents.mIsNetworkNamePresent = true;
break;
}
@@ -212,11 +212,11 @@
break;
}
- case Tlv::kPSKc:
+ case Tlv::kPskc:
{
- const PSKcTlv *tlv = static_cast<const PSKcTlv *>(cur);
- aDataset.mPSKc = tlv->GetPSKc();
- aDataset.mComponents.mIsPSKcPresent = true;
+ const PskcTlv *tlv = static_cast<const PskcTlv *>(cur);
+ aDataset.mPskc = tlv->GetPskc();
+ aDataset.mComponents.mIsPskcPresent = true;
break;
}
@@ -303,7 +303,7 @@
{
MeshCoP::ExtendedPanIdTlv tlv;
tlv.Init();
- tlv.SetExtendedPanId(aDataset.mExtendedPanId);
+ tlv.SetExtendedPanId(static_cast<const Mac::ExtendedPanId &>(aDataset.mExtendedPanId));
Set(tlv);
}
@@ -319,7 +319,7 @@
{
MeshCoP::NetworkMasterKeyTlv tlv;
tlv.Init();
- tlv.SetNetworkMasterKey(aDataset.mMasterKey);
+ tlv.SetNetworkMasterKey(static_cast<const MasterKey &>(aDataset.mMasterKey));
Set(tlv);
}
@@ -327,7 +327,7 @@
{
MeshCoP::NetworkNameTlv tlv;
tlv.Init();
- tlv.SetNetworkName(aDataset.mNetworkName.m8);
+ tlv.SetNetworkName(static_cast<const Mac::NetworkName &>(aDataset.mNetworkName).GetAsData());
Set(tlv);
}
@@ -339,11 +339,11 @@
Set(tlv);
}
- if (aDataset.mComponents.mIsPSKcPresent)
+ if (aDataset.mComponents.mIsPskcPresent)
{
- MeshCoP::PSKcTlv tlv;
+ MeshCoP::PskcTlv tlv;
tlv.Init();
- tlv.SetPSKc(aDataset.mPSKc);
+ tlv.SetPskc(static_cast<const Pskc &>(aDataset.mPskc));
Set(tlv);
}
@@ -477,7 +477,7 @@
}
else if (cur->GetType() == Tlv::kDelayTimer)
{
- uint32_t elapsed = TimerMilli::Elapsed(mUpdateTime);
+ uint32_t elapsed = TimerMilli::GetNow() - mUpdateTime;
DelayTimerTlv delayTimer(static_cast<const DelayTimerTlv &>(*cur));
if (delayTimer.GetDelayTimer() > elapsed)
@@ -489,11 +489,11 @@
delayTimer.SetDelayTimer(0);
}
- SuccessOrExit(error = aMessage.AppendTlv(delayTimer));
+ SuccessOrExit(error = delayTimer.AppendTo(aMessage));
}
else
{
- SuccessOrExit(error = aMessage.AppendTlv(*cur));
+ SuccessOrExit(error = cur->AppendTo(aMessage));
}
cur = cur->GetNext();
@@ -555,7 +555,7 @@
case Tlv::kNetworkName:
{
const NetworkNameTlv *name = static_cast<const NetworkNameTlv *>(cur);
- mac.SetNetworkName(name->GetNetworkName(), name->GetLength());
+ mac.SetNetworkName(name->GetNetworkName());
break;
}
@@ -563,8 +563,7 @@
{
const NetworkMasterKeyTlv *key = static_cast<const NetworkMasterKeyTlv *>(cur);
- if (aIsMasterKeyUpdated &&
- memcmp(&key->GetNetworkMasterKey(), &keyManager.GetMasterKey(), OT_MASTER_KEY_SIZE))
+ if (aIsMasterKeyUpdated && (key->GetNetworkMasterKey() != keyManager.GetMasterKey()))
{
*aIsMasterKeyUpdated = true;
}
@@ -575,10 +574,10 @@
#if OPENTHREAD_FTD
- case Tlv::kPSKc:
+ case Tlv::kPskc:
{
- const PSKcTlv *pskc = static_cast<const PSKcTlv *>(cur);
- keyManager.SetPSKc(pskc->GetPSKc());
+ const PskcTlv *pskc = static_cast<const PskcTlv *>(cur);
+ keyManager.SetPskc(pskc->GetPskc());
break;
}
diff --git a/src/core/meshcop/dataset.hpp b/src/core/meshcop/dataset.hpp
index e4e4adf..5b43bfc 100644
--- a/src/core/meshcop/dataset.hpp
+++ b/src/core/meshcop/dataset.hpp
@@ -41,6 +41,7 @@
#include "common/locator.hpp"
#include "common/message.hpp"
+#include "common/timer.hpp"
#include "meshcop/meshcop_tlvs.hpp"
namespace ot {
@@ -139,7 +140,7 @@
* @returns The local time the dataset was last updated.
*
*/
- uint32_t GetUpdateTime(void) const { return mUpdateTime; }
+ TimeMilli GetUpdateTime(void) const { return mUpdateTime; }
/**
* This method returns a reference to the Timestamp.
@@ -242,7 +243,7 @@
void Remove(uint8_t *aStart, uint8_t aLength);
uint8_t mTlvs[kMaxSize]; ///< The Dataset buffer
- uint32_t mUpdateTime; ///< Local time last updated
+ TimeMilli mUpdateTime; ///< Local time last updated
uint16_t mLength; ///< The number of valid bytes in @var mTlvs
Tlv::Type mType; ///< Active or Pending
};
diff --git a/src/core/meshcop/dataset_local.cpp b/src/core/meshcop/dataset_local.cpp
index be12220..8530fc1 100644
--- a/src/core/meshcop/dataset_local.cpp
+++ b/src/core/meshcop/dataset_local.cpp
@@ -53,6 +53,7 @@
, mUpdateTime(0)
, mType(aType)
, mTimestampPresent(false)
+ , mSaved(false)
{
mTimestamp.Init();
}
@@ -107,7 +108,7 @@
delayTimer = static_cast<DelayTimerTlv *>(aDataset.Get(Tlv::kDelayTimer));
VerifyOrExit(delayTimer);
- elapsed = TimerMilli::Elapsed(mUpdateTime);
+ elapsed = TimerMilli::GetNow() - mUpdateTime;
if (delayTimer->GetDelayTimer() > elapsed)
{
diff --git a/src/core/meshcop/dataset_local.hpp b/src/core/meshcop/dataset_local.hpp
index 9e77c63..efc87cf 100644
--- a/src/core/meshcop/dataset_local.hpp
+++ b/src/core/meshcop/dataset_local.hpp
@@ -81,6 +81,15 @@
bool IsSaved(void) const { return mSaved; }
/**
+ * This method indicates whether an Active (Pending) Timestamp is present in the Active (Pending) Dataset.
+ *
+ * @retval TRUE if an Active/Pending Timestamp is present.
+ * @retval FALSE if an Active/Pending Timestamp is not present.
+ *
+ */
+ bool IsTimestampPresent(void) const { return mTimestampPresent; }
+
+ /**
* This method restores and retrieves the dataset from non-volatile memory.
*
* This method also sets the memory-cached timestamp for subsequent calls to `Compare()`.
@@ -121,7 +130,7 @@
* @returns The local time this dataset was last updated or restored.
*
*/
- uint32_t GetUpdateTime(void) const { return mUpdateTime; }
+ TimeMilli GetUpdateTime(void) const { return mUpdateTime; }
/**
* This method stores the dataset into non-volatile memory.
@@ -156,7 +165,7 @@
void SetTimestamp(const Dataset &aDataset);
Timestamp mTimestamp; ///< Active or Pending Timestamp
- uint32_t mUpdateTime; ///< Local time last updated
+ TimeMilli mUpdateTime; ///< Local time last updated
Tlv::Type mType; ///< Active or Pending
bool mTimestampPresent : 1; ///< Whether a timestamp is present
bool mSaved : 1; ///< Whether a dataset is saved in non-volatile
diff --git a/src/core/meshcop/dataset_manager.cpp b/src/core/meshcop/dataset_manager.cpp
index bb314a2..6053dda 100644
--- a/src/core/meshcop/dataset_manager.cpp
+++ b/src/core/meshcop/dataset_manager.cpp
@@ -364,7 +364,7 @@
if (cur->GetType() != Tlv::kNetworkMasterKey ||
(Get<KeyManager>().GetSecurityPolicyFlags() & OT_SECURITY_POLICY_OBTAIN_MASTER_KEY))
{
- SuccessOrExit(error = message->AppendTlv(*cur));
+ SuccessOrExit(error = cur->AppendTo(*message));
}
cur = cur->GetNext();
@@ -384,7 +384,7 @@
if ((tlv = dataset.Get(static_cast<Tlv::Type>(aTlvs[index]))) != NULL)
{
- SuccessOrExit(error = message->AppendTlv(*tlv));
+ SuccessOrExit(error = tlv->AppendTo(*message));
}
}
}
@@ -442,7 +442,7 @@
CommissionerSessionIdTlv sessionId;
sessionId.Init();
sessionId.SetCommissionerSessionId(Get<Commissioner>().GetSessionId());
- SuccessOrExit(error = message->AppendTlv(sessionId));
+ SuccessOrExit(error = sessionId.AppendTo(*message));
}
}
@@ -454,7 +454,7 @@
timestamp.Init();
static_cast<Timestamp *>(×tamp)->SetSeconds(aDataset.mActiveTimestamp);
static_cast<Timestamp *>(×tamp)->SetTicks(0);
- SuccessOrExit(error = message->AppendTlv(timestamp));
+ SuccessOrExit(error = timestamp.AppendTo(*message));
}
if (aDataset.mComponents.mIsPendingTimestampPresent)
@@ -463,31 +463,31 @@
timestamp.Init();
static_cast<Timestamp *>(×tamp)->SetSeconds(aDataset.mPendingTimestamp);
static_cast<Timestamp *>(×tamp)->SetTicks(0);
- SuccessOrExit(error = message->AppendTlv(timestamp));
+ SuccessOrExit(error = timestamp.AppendTo(*message));
}
if (aDataset.mComponents.mIsMasterKeyPresent)
{
NetworkMasterKeyTlv masterkey;
masterkey.Init();
- masterkey.SetNetworkMasterKey(aDataset.mMasterKey);
- SuccessOrExit(error = message->AppendTlv(masterkey));
+ masterkey.SetNetworkMasterKey(static_cast<const MasterKey &>(aDataset.mMasterKey));
+ SuccessOrExit(error = masterkey.AppendTo(*message));
}
if (aDataset.mComponents.mIsNetworkNamePresent)
{
NetworkNameTlv networkname;
networkname.Init();
- networkname.SetNetworkName(aDataset.mNetworkName.m8);
- SuccessOrExit(error = message->AppendTlv(networkname));
+ networkname.SetNetworkName(static_cast<const Mac::NetworkName &>(aDataset.mNetworkName).GetAsData());
+ SuccessOrExit(error = networkname.AppendTo(*message));
}
if (aDataset.mComponents.mIsExtendedPanIdPresent)
{
ExtendedPanIdTlv extpanid;
extpanid.Init();
- extpanid.SetExtendedPanId(aDataset.mExtendedPanId);
- SuccessOrExit(error = message->AppendTlv(extpanid));
+ extpanid.SetExtendedPanId(static_cast<const Mac::ExtendedPanId &>(aDataset.mExtendedPanId));
+ SuccessOrExit(error = extpanid.AppendTo(*message));
}
if (aDataset.mComponents.mIsMeshLocalPrefixPresent)
@@ -495,7 +495,7 @@
MeshLocalPrefixTlv localprefix;
localprefix.Init();
localprefix.SetMeshLocalPrefix(aDataset.mMeshLocalPrefix);
- SuccessOrExit(error = message->AppendTlv(localprefix));
+ SuccessOrExit(error = localprefix.AppendTo(*message));
}
if (aDataset.mComponents.mIsDelayPresent)
@@ -503,7 +503,7 @@
DelayTimerTlv delaytimer;
delaytimer.Init();
delaytimer.SetDelayTimer(aDataset.mDelay);
- SuccessOrExit(error = message->AppendTlv(delaytimer));
+ SuccessOrExit(error = delaytimer.AppendTo(*message));
}
if (aDataset.mComponents.mIsPanIdPresent)
@@ -511,7 +511,7 @@
PanIdTlv panid;
panid.Init();
panid.SetPanId(aDataset.mPanId);
- SuccessOrExit(error = message->AppendTlv(panid));
+ SuccessOrExit(error = panid.AppendTo(*message));
}
if (aDataset.mComponents.mIsChannelPresent)
@@ -519,7 +519,7 @@
ChannelTlv channel;
channel.Init();
channel.SetChannel(aDataset.mChannel);
- SuccessOrExit(error = message->AppendTlv(channel));
+ SuccessOrExit(error = channel.AppendTo(*message));
}
if (aDataset.mComponents.mIsChannelMaskPresent)
@@ -527,7 +527,24 @@
ChannelMaskTlv channelMask;
channelMask.Init();
channelMask.SetChannelMask(aDataset.mChannelMask);
- SuccessOrExit(error = message->AppendTlv(channelMask));
+ SuccessOrExit(error = channelMask.AppendTo(*message));
+ }
+
+ if (aDataset.mComponents.mIsPskcPresent)
+ {
+ PskcTlv pskc;
+ pskc.Init();
+ pskc.SetPskc(static_cast<const Pskc &>(aDataset.mPskc));
+ SuccessOrExit(error = pskc.AppendTo(*message));
+ }
+
+ if (aDataset.mComponents.mIsSecurityPolicyPresent)
+ {
+ SecurityPolicyTlv securityPolicy;
+ securityPolicy.Init();
+ securityPolicy.SetRotationTime(aDataset.mSecurityPolicy.mRotationTime);
+ securityPolicy.SetFlags(aDataset.mSecurityPolicy.mFlags);
+ SuccessOrExit(error = securityPolicy.AppendTo(*message));
}
if (aLength > 0)
@@ -617,9 +634,9 @@
datasetTlvs[length++] = Tlv::kChannel;
}
- if (aDatasetComponents.mIsPSKcPresent)
+ if (aDatasetComponents.mIsPskcPresent)
{
- datasetTlvs[length++] = Tlv::kPSKc;
+ datasetTlvs[length++] = Tlv::kPskc;
}
if (aDatasetComponents.mIsSecurityPolicyPresent)
@@ -800,9 +817,9 @@
uint32_t delay = delayTimer->GetDelayTimer();
// the Timer implementation does not support the full 32 bit range
- if (delay > Timer::kMaxDt)
+ if (delay > Timer::kMaxDelay)
{
- delay = Timer::kMaxDt;
+ delay = Timer::kMaxDelay;
}
mDelayTimer.StartAt(dataset.GetUpdateTime(), delay);
diff --git a/src/core/meshcop/dataset_manager.hpp b/src/core/meshcop/dataset_manager.hpp
index a991b74..cc0967a 100644
--- a/src/core/meshcop/dataset_manager.hpp
+++ b/src/core/meshcop/dataset_manager.hpp
@@ -391,7 +391,8 @@
/**
* This method generate a default Active Operational Dataset.
*
- * @retval OT_ERROR_NONE Successfully generated an Active Operational Dataset.
+ * @retval OT_ERROR_NONE Successfully generated an Active Operational Dataset.
+ * @retval OT_ERROR_ALREADY A valid Active Operational Dataset already exists.
* @retval OT_ERROR_INVALID_STATE Device is not currently attached to a network.
*
*/
diff --git a/src/core/meshcop/dataset_manager_ftd.cpp b/src/core/meshcop/dataset_manager_ftd.cpp
index dac5d20..0b72546 100644
--- a/src/core/meshcop/dataset_manager_ftd.cpp
+++ b/src/core/meshcop/dataset_manager_ftd.cpp
@@ -75,7 +75,7 @@
bool isUpdateFromCommissioner = false;
bool doesAffectConnectivity = false;
bool doesAffectMasterKey = false;
- StateTlv::State state = StateTlv::kAccept;
+ StateTlv::State state = StateTlv::kReject;
Dataset dataset(mLocal.GetType());
ActiveTimestampTlv activeTimestamp;
@@ -95,43 +95,43 @@
pendingTimestamp.SetLength(0);
sessionId.SetLength(0);
- VerifyOrExit(Get<Mle::MleRouter>().GetRole() == OT_DEVICE_ROLE_LEADER, state = StateTlv::kReject);
+ VerifyOrExit(Get<Mle::MleRouter>().GetRole() == OT_DEVICE_ROLE_LEADER);
// verify that TLV data size is less than maximum TLV value size
while (offset < aMessage.GetLength())
{
aMessage.Read(offset, sizeof(tlv), &tlv);
- VerifyOrExit(tlv.GetLength() <= Dataset::kMaxValueSize, state = StateTlv::kReject);
+ VerifyOrExit(tlv.GetLength() <= Dataset::kMaxValueSize);
offset += sizeof(tlv) + tlv.GetLength();
}
// verify that does not overflow dataset buffer
- VerifyOrExit((offset - aMessage.GetOffset()) <= Dataset::kMaxSize, state = StateTlv::kReject);
+ VerifyOrExit((offset - aMessage.GetOffset()) <= Dataset::kMaxSize);
type = (strcmp(mUriSet, OT_URI_PATH_ACTIVE_SET) == 0 ? Tlv::kActiveTimestamp : Tlv::kPendingTimestamp);
if (Tlv::GetTlv(aMessage, Tlv::kActiveTimestamp, sizeof(activeTimestamp), activeTimestamp) != OT_ERROR_NONE)
{
- ExitNow(state = StateTlv::kReject);
+ ExitNow();
}
- VerifyOrExit(activeTimestamp.IsValid(), state = StateTlv::kReject);
+ VerifyOrExit(activeTimestamp.IsValid());
if (Tlv::GetTlv(aMessage, Tlv::kPendingTimestamp, sizeof(pendingTimestamp), pendingTimestamp) == OT_ERROR_NONE)
{
- VerifyOrExit(pendingTimestamp.IsValid(), state = StateTlv::kReject);
+ VerifyOrExit(pendingTimestamp.IsValid());
}
// verify the request includes a timestamp that is ahead of the locally stored value
timestamp = (type == Tlv::kActiveTimestamp) ? static_cast<Timestamp *>(&activeTimestamp)
: static_cast<Timestamp *>(&pendingTimestamp);
- VerifyOrExit(mLocal.Compare(timestamp) > 0, state = StateTlv::kReject);
+ VerifyOrExit(mLocal.Compare(timestamp) > 0);
// check channel
if (Tlv::GetTlv(aMessage, Tlv::kChannel, sizeof(channel), channel) == OT_ERROR_NONE)
{
- VerifyOrExit(channel.IsValid(), state = StateTlv::kReject);
+ VerifyOrExit(channel.IsValid());
if (channel.GetChannel() != Get<Mac::Mac>().GetPanChannel())
{
@@ -157,8 +157,7 @@
// check network master key
if (Tlv::GetTlv(aMessage, Tlv::kNetworkMasterKey, sizeof(masterKey), masterKey) == OT_ERROR_NONE &&
- masterKey.IsValid() &&
- memcmp(&masterKey.GetNetworkMasterKey(), &Get<KeyManager>().GetMasterKey(), OT_MASTER_KEY_SIZE))
+ masterKey.IsValid() && (masterKey.GetNetworkMasterKey() != Get<KeyManager>().GetMasterKey()))
{
doesAffectConnectivity = true;
doesAffectMasterKey = true;
@@ -166,14 +165,12 @@
// check active timestamp rollback
if (type == Tlv::kPendingTimestamp &&
- (masterKey.GetLength() == 0 ||
- memcmp(&masterKey.GetNetworkMasterKey(), &Get<KeyManager>().GetMasterKey(), OT_MASTER_KEY_SIZE) == 0))
+ ((masterKey.GetLength() == 0) || (masterKey.GetNetworkMasterKey() == Get<KeyManager>().GetMasterKey())))
{
// no change to master key, active timestamp must be ahead
const Timestamp *localActiveTimestamp = Get<ActiveDataset>().GetTimestamp();
- VerifyOrExit(localActiveTimestamp == NULL || localActiveTimestamp->Compare(activeTimestamp) > 0,
- state = StateTlv::kReject);
+ VerifyOrExit(localActiveTimestamp == NULL || localActiveTimestamp->Compare(activeTimestamp) > 0);
}
// check commissioner session id
@@ -187,13 +184,11 @@
Get<NetworkData::Leader>().GetCommissioningDataSubTlv(Tlv::kCommissionerSessionId));
VerifyOrExit(sessionId.IsValid() && localId != NULL &&
- localId->GetCommissionerSessionId() == sessionId.GetCommissionerSessionId(),
- state = StateTlv::kReject);
+ localId->GetCommissionerSessionId() == sessionId.GetCommissionerSessionId());
}
// verify an MGMT_ACTIVE_SET.req from a Commissioner does not affect connectivity
- VerifyOrExit(!isUpdateFromCommissioner || type == Tlv::kPendingTimestamp || !doesAffectConnectivity,
- state = StateTlv::kReject);
+ VerifyOrExit(!isUpdateFromCommissioner || type == Tlv::kPendingTimestamp || !doesAffectConnectivity);
if (isUpdateFromCommissioner)
{
@@ -215,10 +210,10 @@
uint8_t value[Dataset::kMaxValueSize];
} OT_TOOL_PACKED_END data;
- aMessage.Read(offset, sizeof(Tlv), &data.tlv);
- VerifyOrExit(data.tlv.GetLength() <= sizeof(data.value), state = StateTlv::kReject);
+ VerifyOrExit(aMessage.Read(offset, sizeof(Tlv), &data.tlv) == sizeof(Tlv));
+ VerifyOrExit(data.tlv.GetLength() <= sizeof(data.value));
- aMessage.Read(offset + sizeof(Tlv), data.tlv.GetLength(), data.value);
+ VerifyOrExit(aMessage.Read(offset + sizeof(Tlv), data.tlv.GetLength(), data.value) == data.tlv.GetLength());
switch (data.tlv.GetType())
{
@@ -243,14 +238,14 @@
// fall through
default:
- VerifyOrExit(dataset.Set(data.tlv) == OT_ERROR_NONE, state = StateTlv::kReject);
+ SuccessOrExit(dataset.Set(data.tlv));
break;
}
offset += sizeof(Tlv) + data.tlv.GetLength();
}
- VerifyOrExit(Save(dataset) == OT_ERROR_NONE, state = StateTlv::kReject);
+ SuccessOrExit(Save(dataset));
Get<NetworkData::Leader>().IncrementVersion();
Get<NetworkData::Leader>().IncrementStableVersion();
}
@@ -259,19 +254,20 @@
Get<PendingDataset>().ApplyActiveDataset(activeTimestamp, aMessage);
}
+ state = StateTlv::kAccept;
+
// notify commissioner if update is from thread device
if (!isUpdateFromCommissioner)
{
- BorderAgentLocatorTlv *borderAgentLocator;
- Ip6::Address destination;
+ CommissionerSessionIdTlv *localSessionId;
+ Ip6::Address destination;
- borderAgentLocator = static_cast<BorderAgentLocatorTlv *>(
- Get<NetworkData::Leader>().GetCommissioningDataSubTlv(Tlv::kBorderAgentLocator));
- VerifyOrExit(borderAgentLocator != NULL);
+ localSessionId = static_cast<CommissionerSessionIdTlv *>(
+ Get<NetworkData::Leader>().GetCommissioningDataSubTlv(Tlv::kCommissionerSessionId));
+ VerifyOrExit(localSessionId != NULL);
- memset(&destination, 0, sizeof(destination));
- destination = Get<Mle::MleRouter>().GetMeshLocal16();
- destination.mFields.m16[7] = HostSwap16(borderAgentLocator->GetBorderAgentLocator());
+ SuccessOrExit(
+ Get<Mle::MleRouter>().GetCommissionerAloc(destination, localSessionId->GetCommissionerSessionId()));
Get<Leader>().SendDatasetChanged(destination);
}
@@ -283,7 +279,7 @@
SendSetResponse(aMessage, aMessageInfo, state);
}
- return state == StateTlv::kAccept ? OT_ERROR_NONE : OT_ERROR_DROP;
+ return (state == StateTlv::kAccept) ? OT_ERROR_NONE : OT_ERROR_DROP;
}
void DatasetManager::SendSetResponse(const Coap::Message & aRequest,
@@ -301,7 +297,7 @@
state.Init();
state.SetState(aState);
- SuccessOrExit(error = message->AppendTlv(state));
+ SuccessOrExit(error = state.AppendTo(*message));
SuccessOrExit(error = Get<Coap::Coap>().SendMessage(*message, aMessageInfo));
@@ -326,7 +322,7 @@
aDataset.mActiveTimestamp = 1;
SuccessOrExit(error = Random::Crypto::FillBuffer(aDataset.mMasterKey.m8, sizeof(aDataset.mMasterKey)));
- SuccessOrExit(error = Random::Crypto::FillBuffer(aDataset.mPSKc.m8, sizeof(aDataset.mPSKc)));
+ SuccessOrExit(error = static_cast<Pskc &>(aDataset.mPskc).GenerateRandom());
SuccessOrExit(error = Random::Crypto::FillBuffer(aDataset.mExtendedPanId.m8, sizeof(aDataset.mExtendedPanId)));
aDataset.mMeshLocalPrefix.m8[0] = 0xfd;
@@ -348,10 +344,7 @@
aDataset.mChannel = preferredChannels.ChooseRandomChannel();
aDataset.mChannelMask = supportedChannels.GetMask();
- do
- {
- aDataset.mPanId = Random::NonCrypto::GetUint16();
- } while (aDataset.mPanId == Mac::kPanIdBroadcast);
+ aDataset.mPanId = Mac::GenerateRandomPanId();
snprintf(aDataset.mNetworkName.m8, sizeof(aDataset.mNetworkName), "OpenThread-%04x", aDataset.mPanId);
@@ -362,7 +355,7 @@
aDataset.mComponents.mIsMeshLocalPrefixPresent = true;
aDataset.mComponents.mIsPanIdPresent = true;
aDataset.mComponents.mIsChannelPresent = true;
- aDataset.mComponents.mIsPSKcPresent = true;
+ aDataset.mComponents.mIsPskcPresent = true;
aDataset.mComponents.mIsSecurityPolicyPresent = true;
aDataset.mComponents.mIsChannelMaskPresent = true;
@@ -376,6 +369,7 @@
Dataset dataset(mLocal.GetType());
VerifyOrExit(Get<Mle::MleRouter>().IsAttached(), error = OT_ERROR_INVALID_STATE);
+ VerifyOrExit(!mLocal.IsTimestampPresent(), error = OT_ERROR_ALREADY);
mLocal.Read(dataset);
@@ -439,7 +433,7 @@
{
NetworkNameTlv tlv;
tlv.Init();
- tlv.SetNetworkName(Get<Mac::Mac>().GetNetworkName());
+ tlv.SetNetworkName(Get<Mac::Mac>().GetNetworkName().GetAsData());
dataset.Set(tlv);
}
@@ -453,24 +447,24 @@
}
// PSKc
- if (dataset.Get(Tlv::kPSKc) == NULL)
+ if (dataset.Get(Tlv::kPskc) == NULL)
{
- PSKcTlv tlv;
+ PskcTlv tlv;
tlv.Init();
- if (Get<KeyManager>().IsPSKcSet())
+ if (Get<KeyManager>().IsPskcSet())
{
// use configured PSKc
- tlv.SetPSKc(Get<KeyManager>().GetPSKc());
+ tlv.SetPskc(Get<KeyManager>().GetPskc());
}
else
{
// PSKc has not yet been configured, generate new PSKc at random
- otPSKc pskc;
+ Pskc pskc;
- SuccessOrExit(error = Random::Crypto::FillBuffer(pskc.m8, sizeof(pskc)));
- tlv.SetPSKc(pskc);
+ SuccessOrExit(error = pskc.GenerateRandom());
+ tlv.SetPskc(pskc);
}
dataset.Set(tlv);
diff --git a/src/core/meshcop/dtls.cpp b/src/core/meshcop/dtls.cpp
index eb3a1d8..4afb7de 100644
--- a/src/core/meshcop/dtls.cpp
+++ b/src/core/meshcop/dtls.cpp
@@ -451,13 +451,11 @@
#if OPENTHREAD_CONFIG_COAP_SECURE_API_ENABLE
#ifdef MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
-otError Dtls::SetCertificate(const uint8_t *aX509Certificate,
- uint32_t aX509CertLength,
- const uint8_t *aPrivateKey,
- uint32_t aPrivateKeyLength)
+void Dtls::SetCertificate(const uint8_t *aX509Certificate,
+ uint32_t aX509CertLength,
+ const uint8_t *aPrivateKey,
+ uint32_t aPrivateKeyLength)
{
- otError error = OT_ERROR_NONE;
-
assert(aX509CertLength > 0);
assert(aX509Certificate != NULL);
@@ -471,34 +469,23 @@
mCipherSuites[0] = MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CCM_8;
mCipherSuites[1] = 0;
-
- return error;
}
-otError Dtls::SetCaCertificateChain(const uint8_t *aX509CaCertificateChain, uint32_t aX509CaCertChainLength)
+void Dtls::SetCaCertificateChain(const uint8_t *aX509CaCertificateChain, uint32_t aX509CaCertChainLength)
{
- otError error = OT_ERROR_NONE;
-
assert(aX509CaCertChainLength > 0);
assert(aX509CaCertificateChain != NULL);
mCaChainSrc = aX509CaCertificateChain;
mCaChainLength = aX509CaCertChainLength;
-
- return error;
}
#endif // MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
#ifdef MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
-otError Dtls::SetPreSharedKey(const uint8_t *aPsk,
- uint16_t aPskLength,
- const uint8_t *aPskIdentity,
- uint16_t aPskIdLength)
+void Dtls::SetPreSharedKey(const uint8_t *aPsk, uint16_t aPskLength, const uint8_t *aPskIdentity, uint16_t aPskIdLength)
{
- otError error = OT_ERROR_NONE;
-
assert(aPsk != NULL);
assert(aPskIdentity != NULL);
assert(aPskLength > 0);
@@ -511,8 +498,6 @@
mCipherSuites[0] = MBEDTLS_TLS_PSK_WITH_AES_128_CCM_8;
mCipherSuites[1] = 0;
-
- return error;
}
#endif // MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
@@ -683,7 +668,7 @@
{
rval = 2;
}
- else if (static_cast<int32_t>(mTimerIntermediate - TimerMilli::GetNow()) <= 0)
+ else if (mTimerIntermediate <= TimerMilli::GetNow())
{
rval = 1;
}
diff --git a/src/core/meshcop/dtls.hpp b/src/core/meshcop/dtls.hpp
index f133eb0..7100a8f 100644
--- a/src/core/meshcop/dtls.hpp
+++ b/src/core/meshcop/dtls.hpp
@@ -239,7 +239,7 @@
/**
* This method sets the PSK.
*
- * @param[in] aPSK A pointer to the PSK.
+ * @param[in] aPsk A pointer to the PSK.
*
* @retval OT_ERROR_NONE Successfully set the PSK.
* @retval OT_ERROR_INVALID_ARGS The PSK is invalid.
@@ -263,15 +263,11 @@
* @retval OT_ERROR_NONE Successfully set the PSK.
*
*/
- otError SetPreSharedKey(const uint8_t *aPsk,
- uint16_t aPskLength,
- const uint8_t *aPskIdentity,
- uint16_t aPskIdLength);
+ void SetPreSharedKey(const uint8_t *aPsk, uint16_t aPskLength, const uint8_t *aPskIdentity, uint16_t aPskIdLength);
#endif // MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
#ifdef MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
-
/**
* This method sets a reference to the own x509 certificate with corresponding private key.
*
@@ -282,13 +278,11 @@
* @param[in] aPrivateKey A pointer to the PEM formatted private key.
* @param[in] aPrivateKeyLength The length of the private key.
*
- * @retval OT_ERROR_NONE Successfully set the x509 certificate with his private key.
- *
*/
- otError SetCertificate(const uint8_t *aX509Certificate,
- uint32_t aX509CertLength,
- const uint8_t *aPrivateKey,
- uint32_t aPrivateKeyLength);
+ void SetCertificate(const uint8_t *aX509Certificate,
+ uint32_t aX509CertLength,
+ const uint8_t *aPrivateKey,
+ uint32_t aPrivateKeyLength);
/**
* This method sets the trusted top level CAs. It is needed for validate the
@@ -299,11 +293,8 @@
* @param[in] aX509CaCertificateChain A pointer to the PEM formatted X509 CA chain.
* @param[in] aX509CaCertChainLength The length of chain.
*
- * @retval OT_ERROR_NONE Successfully set the trusted top level CAs.
- *
*/
- otError SetCaCertificateChain(const uint8_t *aX509CaCertificateChain, uint32_t aX509CaCertChainLength);
-
+ void SetCaCertificateChain(const uint8_t *aX509CaCertificateChain, uint32_t aX509CaCertChainLength);
#endif // MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
#ifdef MBEDTLS_BASE64_C
@@ -316,8 +307,9 @@
* @param[out] aCertLength The length of the base64 encoded peer certificate.
* @param[in] aCertBufferSize The buffer size of aPeerCert.
*
- * @retval OT_ERROR_NONE Successfully get the peer certificate.
- * @retval OT_ERROR_NO_BUFS Can't allocate memory for certificate.
+ * @retval OT_ERROR_INVALID_STATE Not connected yet.
+ * @retval OT_ERROR_NONE Successfully get the peer certificate.
+ * @retval OT_ERROR_NO_BUFS Can't allocate memory for certificate.
*
*/
otError GetPeerCertificateBase64(unsigned char *aPeerCert, size_t *aCertLength, size_t aCertBufferSize);
@@ -438,8 +430,6 @@
static void HandleUdpTransmit(Tasklet &aTasklet);
void HandleUdpTransmit(void);
- static int HandleMbedtlsEntropyPoll(void *aData, unsigned char *aOutput, size_t aInLen, size_t *aOutLen);
-
void Process(void);
State mState;
@@ -481,8 +471,8 @@
TimerMilliContext mTimer;
- uint32_t mTimerIntermediate;
- bool mTimerSet : 1;
+ TimeMilli mTimerIntermediate;
+ bool mTimerSet : 1;
bool mLayerTwoSecurity : 1;
diff --git a/src/core/meshcop/energy_scan_client.cpp b/src/core/meshcop/energy_scan_client.cpp
index 0d3bf6c..d4471e2 100644
--- a/src/core/meshcop/energy_scan_client.cpp
+++ b/src/core/meshcop/energy_scan_client.cpp
@@ -85,23 +85,23 @@
sessionId.Init();
sessionId.SetCommissionerSessionId(Get<MeshCoP::Commissioner>().GetSessionId());
- SuccessOrExit(error = message->AppendTlv(sessionId));
+ SuccessOrExit(error = sessionId.AppendTo(*message));
channelMask.Init();
channelMask.SetChannelMask(aChannelMask);
- SuccessOrExit(error = message->AppendTlv(channelMask));
+ SuccessOrExit(error = channelMask.AppendTo(*message));
count.Init();
count.SetCount(aCount);
- SuccessOrExit(error = message->AppendTlv(count));
+ SuccessOrExit(error = count.AppendTo(*message));
period.Init();
period.SetPeriod(aPeriod);
- SuccessOrExit(error = message->AppendTlv(period));
+ SuccessOrExit(error = period.AppendTo(*message));
scanDuration.Init();
scanDuration.SetScanDuration(aScanDuration);
- SuccessOrExit(error = message->AppendTlv(scanDuration));
+ SuccessOrExit(error = scanDuration.AppendTo(*message));
messageInfo.SetSockAddr(Get<Mle::MleRouter>().GetMeshLocal16());
messageInfo.SetPeerAddr(aAddress);
diff --git a/src/core/meshcop/joiner.cpp b/src/core/meshcop/joiner.cpp
index b82c352..0f62300 100644
--- a/src/core/meshcop/joiner.cpp
+++ b/src/core/meshcop/joiner.cpp
@@ -41,7 +41,6 @@
#include "common/instance.hpp"
#include "common/locator-getters.hpp"
#include "common/logging.hpp"
-#include "mac/mac_frame.hpp"
#include "meshcop/meshcop.hpp"
#include "radio/radio.hpp"
#include "thread/thread_netif.hpp"
@@ -85,7 +84,7 @@
return;
}
-otError Joiner::Start(const char * aPSKd,
+otError Joiner::Start(const char * aPskd,
const char * aProvisioningUrl,
const char * aVendorName,
const char * aVendorModel,
@@ -107,8 +106,8 @@
Get<Mle::MleRouter>().UpdateLinkLocalAddress();
SuccessOrExit(error = Get<Coap::CoapSecure>().Start(kJoinerUdpPort));
- SuccessOrExit(error = Get<Coap::CoapSecure>().SetPsk(reinterpret_cast<const uint8_t *>(aPSKd),
- static_cast<uint8_t>(strlen(aPSKd))));
+ SuccessOrExit(error = Get<Coap::CoapSecure>().SetPsk(reinterpret_cast<const uint8_t *>(aPskd),
+ static_cast<uint8_t>(strlen(aPskd))));
for (JoinerRouter *router = &mJoinerRouters[0]; router < OT_ARRAY_END(mJoinerRouters); router++)
{
@@ -164,11 +163,11 @@
case OT_JOINER_STATE_DISCOVER:
Get<Coap::CoapSecure>().Stop();
- FreeJoinerFinalizeMessage();
break;
}
SetState(OT_JOINER_STATE_IDLE);
+ FreeJoinerFinalizeMessage();
if (mCallback)
{
@@ -403,33 +402,33 @@
stateTlv.Init();
stateTlv.SetState(MeshCoP::StateTlv::kAccept);
- SuccessOrExit(error = mFinalizeMessage->AppendTlv(stateTlv));
+ SuccessOrExit(error = stateTlv.AppendTo(*mFinalizeMessage));
vendorNameTlv.Init();
vendorNameTlv.SetVendorName(aVendorName);
- SuccessOrExit(error = mFinalizeMessage->AppendTlv(vendorNameTlv));
+ SuccessOrExit(error = vendorNameTlv.AppendTo(*mFinalizeMessage));
vendorModelTlv.Init();
vendorModelTlv.SetVendorModel(aVendorModel);
- SuccessOrExit(error = mFinalizeMessage->AppendTlv(vendorModelTlv));
+ SuccessOrExit(error = vendorModelTlv.AppendTo(*mFinalizeMessage));
vendorSwVersionTlv.Init();
vendorSwVersionTlv.SetVendorSwVersion(aVendorSwVersion);
- SuccessOrExit(error = mFinalizeMessage->AppendTlv(vendorSwVersionTlv));
+ SuccessOrExit(error = vendorSwVersionTlv.AppendTo(*mFinalizeMessage));
vendorStackVersionTlv.Init();
vendorStackVersionTlv.SetOui(OPENTHREAD_CONFIG_STACK_VENDOR_OUI);
vendorStackVersionTlv.SetMajor(OPENTHREAD_CONFIG_STACK_VERSION_MAJOR);
vendorStackVersionTlv.SetMinor(OPENTHREAD_CONFIG_STACK_VERSION_MINOR);
vendorStackVersionTlv.SetRevision(OPENTHREAD_CONFIG_STACK_VERSION_REV);
- SuccessOrExit(error = mFinalizeMessage->AppendTlv(vendorStackVersionTlv));
+ SuccessOrExit(error = vendorStackVersionTlv.AppendTo(*mFinalizeMessage));
if (aVendorData != NULL)
{
VendorDataTlv vendorDataTlv;
vendorDataTlv.Init();
vendorDataTlv.SetVendorData(aVendorData);
- SuccessOrExit(error = mFinalizeMessage->AppendTlv(vendorDataTlv));
+ SuccessOrExit(error = vendorDataTlv.AppendTo(*mFinalizeMessage));
}
provisioningUrlTlv.Init();
@@ -437,7 +436,7 @@
if (provisioningUrlTlv.GetLength() > 0)
{
- SuccessOrExit(error = mFinalizeMessage->AppendTlv(provisioningUrlTlv));
+ SuccessOrExit(error = provisioningUrlTlv.AppendTo(*mFinalizeMessage));
}
exit:
@@ -451,11 +450,13 @@
void Joiner::FreeJoinerFinalizeMessage(void)
{
- if (mFinalizeMessage != NULL)
- {
- mFinalizeMessage->Free();
- mFinalizeMessage = NULL;
- }
+ VerifyOrExit(mState == OT_JOINER_STATE_IDLE && mFinalizeMessage != NULL);
+
+ mFinalizeMessage->Free();
+ mFinalizeMessage = NULL;
+
+exit:
+ return;
}
void Joiner::SendJoinerFinalize(void)
@@ -520,13 +521,9 @@
void Joiner::HandleJoinerEntrust(Coap::Message &aMessage, const Ip6::MessageInfo &aMessageInfo)
{
- otError error;
- NetworkMasterKeyTlv masterKey;
- MeshLocalPrefixTlv meshLocalPrefix;
- ExtendedPanIdTlv extendedPanId;
- NetworkNameTlv networkName;
- ActiveTimestampTlv activeTimestamp;
- NetworkKeySequenceTlv networkKeySeq;
+ otError error;
+ NetworkMasterKeyTlv masterKey;
+ otOperationalDataset dataset;
VerifyOrExit(mState == OT_JOINER_STATE_ENTRUST && aMessage.GetType() == OT_COAP_TYPE_CONFIRMABLE &&
aMessage.GetCode() == OT_COAP_CODE_POST,
@@ -538,26 +535,18 @@
SuccessOrExit(error = Tlv::GetTlv(aMessage, Tlv::kNetworkMasterKey, sizeof(masterKey), masterKey));
VerifyOrExit(masterKey.IsValid(), error = OT_ERROR_PARSE);
- SuccessOrExit(error = Tlv::GetTlv(aMessage, Tlv::kMeshLocalPrefix, sizeof(meshLocalPrefix), meshLocalPrefix));
- VerifyOrExit(meshLocalPrefix.IsValid(), error = OT_ERROR_PARSE);
+ memset(&dataset, 0, sizeof(dataset));
- SuccessOrExit(error = Tlv::GetTlv(aMessage, Tlv::kExtendedPanId, sizeof(extendedPanId), extendedPanId));
- VerifyOrExit(extendedPanId.IsValid(), error = OT_ERROR_PARSE);
+ dataset.mMasterKey = masterKey.GetNetworkMasterKey();
+ dataset.mComponents.mIsMasterKeyPresent = true;
- SuccessOrExit(error = Tlv::GetTlv(aMessage, Tlv::kNetworkName, sizeof(networkName), networkName));
+ dataset.mChannel = Get<Mac::Mac>().GetPanChannel();
+ dataset.mComponents.mIsChannelPresent = true;
- SuccessOrExit(error = Tlv::GetTlv(aMessage, Tlv::kActiveTimestamp, sizeof(activeTimestamp), activeTimestamp));
- VerifyOrExit(activeTimestamp.IsValid(), error = OT_ERROR_PARSE);
+ dataset.mPanId = Get<Mac::Mac>().GetPanId();
+ dataset.mComponents.mIsPanIdPresent = true;
- SuccessOrExit(error = Tlv::GetTlv(aMessage, Tlv::kNetworkKeySequence, sizeof(networkKeySeq), networkKeySeq));
- VerifyOrExit(networkKeySeq.IsValid(), error = OT_ERROR_PARSE);
-
- Get<KeyManager>().SetMasterKey(masterKey.GetNetworkMasterKey());
- Get<KeyManager>().SetCurrentKeySequence(networkKeySeq.GetNetworkKeySequence());
- Get<Mle::MleRouter>().SetMeshLocalPrefix(meshLocalPrefix.GetMeshLocalPrefix());
- Get<Mac::Mac>().SetExtendedPanId(extendedPanId.GetExtendedPanId());
-
- Get<Mac::Mac>().SetNetworkName(networkName.GetNetworkName(), networkName.GetNetworkNameLength());
+ Get<MeshCoP::ActiveDataset>().Save(dataset);
otLogInfoMeshCoP("Joiner successful!");
@@ -584,7 +573,7 @@
SuccessOrExit(error = message->SetDefaultResponseHeader(aRequest));
message->SetSubType(Message::kSubTypeJoinerEntrust);
- memset(&responseInfo.mSockAddr, 0, sizeof(responseInfo.mSockAddr));
+ responseInfo.GetSockAddr().Clear();
SuccessOrExit(error = Get<Coap::Coap>().SendMessage(*message, responseInfo));
SetState(OT_JOINER_STATE_JOINED);
diff --git a/src/core/meshcop/joiner.hpp b/src/core/meshcop/joiner.hpp
index 95bf036..168edb9 100644
--- a/src/core/meshcop/joiner.hpp
+++ b/src/core/meshcop/joiner.hpp
@@ -44,7 +44,7 @@
#include "common/locator.hpp"
#include "common/logging.hpp"
#include "common/message.hpp"
-#include "mac/mac_frame.hpp"
+#include "mac/mac_types.hpp"
#include "meshcop/dtls.hpp"
#include "meshcop/meshcop_tlvs.hpp"
@@ -66,7 +66,7 @@
/**
* This method starts the Joiner service.
*
- * @param[in] aPSKd A pointer to the PSKd.
+ * @param[in] aPskd A pointer to the PSKd.
* @param[in] aProvisioningUrl A pointer to the Provisioning URL (may be NULL).
* @param[in] aVendorName A pointer to the Vendor Name (may be NULL).
* @param[in] aVendorModel A pointer to the Vendor Model (may be NULL).
@@ -78,7 +78,7 @@
* @retval OT_ERROR_NONE Successfully started the Joiner service.
*
*/
- otError Start(const char * aPSKd,
+ otError Start(const char * aPskd,
const char * aProvisioningUrl,
const char * aVendorName,
const char * aVendorModel,
diff --git a/src/core/meshcop/joiner_router.cpp b/src/core/meshcop/joiner_router.cpp
index 2a88683..eb94394 100644
--- a/src/core/meshcop/joiner_router.cpp
+++ b/src/core/meshcop/joiner_router.cpp
@@ -76,12 +76,12 @@
VerifyOrExit(Get<Mle::MleRouter>().IsFullThreadDevice());
VerifyOrExit(aFlags & OT_CHANGED_THREAD_NETDATA);
- Get<Ip6::Filter>().RemoveUnsecurePort(mSocket.GetSockName().mPort);
-
if (Get<NetworkData::Leader>().IsJoiningEnabled())
{
Ip6::SockAddr sockaddr;
+ VerifyOrExit(!mSocket.IsBound());
+
sockaddr.mPort = GetJoinerUdpPort();
mSocket.Open(&JoinerRouter::HandleUdpReceive, this);
@@ -91,6 +91,8 @@
}
else
{
+ Get<Ip6::Filter>().RemoveUnsecurePort(mSocket.GetSockName().mPort);
+
mSocket.Close();
}
@@ -151,15 +153,15 @@
udpPort.Init();
udpPort.SetUdpPort(aMessageInfo.GetPeerPort());
- SuccessOrExit(error = message->AppendTlv(udpPort));
+ SuccessOrExit(error = udpPort.AppendTo(*message));
iid.Init();
iid.SetIid(aMessageInfo.GetPeerAddr().mFields.m8 + 8);
- SuccessOrExit(error = message->AppendTlv(iid));
+ SuccessOrExit(error = iid.AppendTo(*message));
rloc.Init();
rloc.SetJoinerRouterLocator(Get<Mle::MleRouter>().GetRloc16());
- SuccessOrExit(error = message->AppendTlv(rloc));
+ SuccessOrExit(error = rloc.AppendTo(*message));
tlv.SetType(Tlv::kJoinerDtlsEncapsulation);
tlv.SetLength(aMessage.GetLength() - aMessage.GetOffset());
@@ -220,23 +222,7 @@
VerifyOrExit((message = mSocket.NewMessage(0, &settings)) != NULL, error = OT_ERROR_NO_BUFS);
- while (length)
- {
- uint16_t copyLength = length;
- uint8_t tmp[16];
-
- if (copyLength >= sizeof(tmp))
- {
- copyLength = sizeof(tmp);
- }
-
- aMessage.Read(offset, copyLength, tmp);
- SuccessOrExit(error = message->Append(tmp, copyLength));
-
- offset += copyLength;
- length -= copyLength;
- }
-
+ SuccessOrExit(error = message->SetLength(length));
aMessage.CopyTo(offset, 0, length, *message);
messageInfo.mPeerAddr.mFields.m16[0] = HostSwap16(0xfe80);
@@ -284,69 +270,69 @@
masterKey.Init();
masterKey.SetNetworkMasterKey(Get<KeyManager>().GetMasterKey());
- SuccessOrExit(error = message->AppendTlv(masterKey));
+ SuccessOrExit(error = masterKey.AppendTo(*message));
meshLocalPrefix.Init();
meshLocalPrefix.SetMeshLocalPrefix(Get<Mle::MleRouter>().GetMeshLocalPrefix());
- SuccessOrExit(error = message->AppendTlv(meshLocalPrefix));
+ SuccessOrExit(error = meshLocalPrefix.AppendTo(*message));
extendedPanId.Init();
extendedPanId.SetExtendedPanId(Get<Mac::Mac>().GetExtendedPanId());
- SuccessOrExit(error = message->AppendTlv(extendedPanId));
+ SuccessOrExit(error = extendedPanId.AppendTo(*message));
networkName.Init();
- networkName.SetNetworkName(Get<Mac::Mac>().GetNetworkName());
- SuccessOrExit(error = message->AppendTlv(networkName));
+ networkName.SetNetworkName(Get<Mac::Mac>().GetNetworkName().GetAsData());
+ SuccessOrExit(error = networkName.AppendTo(*message));
Get<ActiveDataset>().Read(dataset);
if ((tlv = dataset.Get(Tlv::kActiveTimestamp)) != NULL)
{
- SuccessOrExit(error = message->AppendTlv(*tlv));
+ SuccessOrExit(error = tlv->AppendTo(*message));
}
else
{
ActiveTimestampTlv activeTimestamp;
activeTimestamp.Init();
- SuccessOrExit(error = message->AppendTlv(activeTimestamp));
+ SuccessOrExit(error = activeTimestamp.AppendTo(*message));
}
if ((tlv = dataset.Get(Tlv::kChannelMask)) != NULL)
{
- SuccessOrExit(error = message->AppendTlv(*tlv));
+ SuccessOrExit(error = tlv->AppendTo(*message));
}
else
{
ChannelMaskBaseTlv channelMask;
channelMask.Init();
- SuccessOrExit(error = message->AppendTlv(channelMask));
+ SuccessOrExit(error = channelMask.AppendTo(*message));
}
- if ((tlv = dataset.Get(Tlv::kPSKc)) != NULL)
+ if ((tlv = dataset.Get(Tlv::kPskc)) != NULL)
{
- SuccessOrExit(error = message->AppendTlv(*tlv));
+ SuccessOrExit(error = tlv->AppendTo(*message));
}
else
{
- PSKcTlv pskc;
+ PskcTlv pskc;
pskc.Init();
- SuccessOrExit(error = message->AppendTlv(pskc));
+ SuccessOrExit(error = pskc.AppendTo(*message));
}
if ((tlv = dataset.Get(Tlv::kSecurityPolicy)) != NULL)
{
- SuccessOrExit(error = message->AppendTlv(*tlv));
+ SuccessOrExit(error = tlv->AppendTo(*message));
}
else
{
SecurityPolicyTlv securityPolicy;
securityPolicy.Init();
- SuccessOrExit(error = message->AppendTlv(securityPolicy));
+ SuccessOrExit(error = securityPolicy.AppendTo(*message));
}
networkKeySequence.Init();
networkKeySequence.SetNetworkKeySequence(Get<KeyManager>().GetCurrentKeySequence());
- SuccessOrExit(error = message->AppendTlv(networkKeySequence));
+ SuccessOrExit(error = networkKeySequence.AppendTo(*message));
messageInfo = aMessageInfo;
messageInfo.SetPeerPort(kCoapUdpPort);
@@ -385,7 +371,6 @@
{
DelayedJoinEntHeader delayedJoinEnt;
Coap::Message * message = static_cast<Coap::Message *>(mDelayedJoinEnts.GetHead());
- uint32_t now = TimerMilli::GetNow();
Ip6::MessageInfo messageInfo;
VerifyOrExit(message != NULL);
@@ -397,9 +382,9 @@
VerifyOrExit(!mExpectJoinEntRsp ||
memcmp(Get<KeyManager>().GetKek(), delayedJoinEnt.GetKek(), KeyManager::kMaxKeyLength) == 0);
- if (delayedJoinEnt.IsLater(now))
+ if (TimerMilli::GetNow() < delayedJoinEnt.GetSendTime())
{
- mTimer.Start(delayedJoinEnt.GetSendTime() - now);
+ mTimer.FireAt(delayedJoinEnt.GetSendTime());
}
else
{
diff --git a/src/core/meshcop/joiner_router.hpp b/src/core/meshcop/joiner_router.hpp
index 52aafeb..c562c42 100644
--- a/src/core/meshcop/joiner_router.hpp
+++ b/src/core/meshcop/joiner_router.hpp
@@ -42,7 +42,7 @@
#include "common/message.hpp"
#include "common/notifier.hpp"
#include "common/timer.hpp"
-#include "mac/mac_frame.hpp"
+#include "mac/mac_types.hpp"
#include "meshcop/meshcop_tlvs.hpp"
#include "net/udp6.hpp"
#include "thread/key_manager.hpp"
@@ -135,7 +135,7 @@
* @param[in] aKek A pointer to the KEK.
*
*/
- void Init(uint32_t aSendTime, Ip6::MessageInfo &aMessageInfo, const uint8_t *aKek)
+ void Init(TimeMilli aSendTime, Ip6::MessageInfo &aMessageInfo, const uint8_t *aKek)
{
mSendTime = aSendTime;
mMessageInfo = aMessageInfo;
@@ -185,7 +185,7 @@
* @returns A time when the message shall be sent.
*
*/
- uint32_t GetSendTime(void) const { return mSendTime; }
+ TimeMilli GetSendTime(void) const { return mSendTime; }
/**
* This method returns a destination of the delayed message.
@@ -203,29 +203,9 @@
*/
const uint8_t *GetKek(void) const { return mKek; }
- /**
- * This method checks if the message shall be sent before the given time.
- *
- * @param[in] aTime A time to compare.
- *
- * @retval TRUE If the message shall be sent before the given time.
- * @retval FALSE Otherwise.
- */
- bool IsEarlier(uint32_t aTime) const { return (static_cast<int32_t>(aTime - mSendTime) > 0); }
-
- /**
- * This method checks if the message shall be sent after the given time.
- *
- * @param[in] aTime A time to compare.
- *
- * @retval TRUE If the message shall be sent after the given time.
- * @retval FALSE Otherwise.
- */
- bool IsLater(uint32_t aTime) const { return (static_cast<int32_t>(aTime - mSendTime) < 0); }
-
private:
Ip6::MessageInfo mMessageInfo; ///< Message info of the message to send.
- uint32_t mSendTime; ///< Time when the message shall be sent.
+ TimeMilli mSendTime; ///< Time when the message shall be sent.
uint8_t mKek[KeyManager::kMaxKeyLength]; ///< KEK used by MAC layer to encode this message.
};
diff --git a/src/core/meshcop/leader.cpp b/src/core/meshcop/leader.cpp
index fd5ba0e..29996ad 100644
--- a/src/core/meshcop/leader.cpp
+++ b/src/core/meshcop/leader.cpp
@@ -107,8 +107,13 @@
mCommissionerId = commissionerId;
+ if (mCommissionerId.GetLength() > CommissionerIdTlv::kMaxLength)
+ {
+ mCommissionerId.SetLength(CommissionerIdTlv::kMaxLength);
+ }
+
state = StateTlv::kAccept;
- mTimer.Start(TimerMilli::SecToMsec(kTimeoutLeaderPetition));
+ mTimer.Start(Time::SecToMsec(kTimeoutLeaderPetition));
exit:
SendPetitionResponse(aMessage, aMessageInfo, state);
@@ -130,18 +135,18 @@
state.Init();
state.SetState(aState);
- SuccessOrExit(error = message->AppendTlv(state));
+ SuccessOrExit(error = state.AppendTo(*message));
if (mTimer.IsRunning())
{
- SuccessOrExit(error = message->AppendTlv(mCommissionerId));
+ SuccessOrExit(error = mCommissionerId.AppendTo(*message));
}
if (aState == StateTlv::kAccept)
{
sessionId.Init();
sessionId.SetCommissionerSessionId(mSessionId);
- SuccessOrExit(error = message->AppendTlv(sessionId));
+ SuccessOrExit(error = sessionId.AppendTo(*message));
}
SuccessOrExit(error = Get<Coap::Coap>().SendMessage(*message, aMessageInfo));
@@ -202,7 +207,7 @@
}
responseState = StateTlv::kAccept;
- mTimer.Start(TimerMilli::SecToMsec(kTimeoutLeaderPetition));
+ mTimer.Start(Time::SecToMsec(kTimeoutLeaderPetition));
}
SendKeepAliveResponse(aMessage, aMessageInfo, responseState);
@@ -226,7 +231,7 @@
state.Init();
state.SetState(aState);
- SuccessOrExit(error = message->AppendTlv(state));
+ SuccessOrExit(error = state.AppendTo(*message));
SuccessOrExit(error = Get<Coap::Coap>().SendMessage(*message, aMessageInfo));
diff --git a/src/core/meshcop/meshcop.cpp b/src/core/meshcop/meshcop.cpp
index e6c8c68..f7c5f23 100644
--- a/src/core/meshcop/meshcop.cpp
+++ b/src/core/meshcop/meshcop.cpp
@@ -33,7 +33,7 @@
#include "common/locator-getters.hpp"
#include "crypto/sha256.hpp"
-#include "mac/mac_frame.hpp"
+#include "mac/mac_types.hpp"
#include "thread/thread_netif.hpp"
namespace ot {
diff --git a/src/core/meshcop/meshcop.hpp b/src/core/meshcop/meshcop.hpp
index c70178b..d39b79d 100644
--- a/src/core/meshcop/meshcop.hpp
+++ b/src/core/meshcop/meshcop.hpp
@@ -41,7 +41,7 @@
#include "coap/coap.hpp"
#include "common/message.hpp"
-#include "mac/mac_frame.hpp"
+#include "mac/mac_types.hpp"
namespace ot {
namespace MeshCoP {
diff --git a/src/core/meshcop/meshcop_tlvs.cpp b/src/core/meshcop/meshcop_tlvs.cpp
index c3dd064..51d3e73 100644
--- a/src/core/meshcop/meshcop_tlvs.cpp
+++ b/src/core/meshcop/meshcop_tlvs.cpp
@@ -64,8 +64,8 @@
rval = static_cast<const NetworkMasterKeyTlv &>(aTlv).IsValid();
break;
- case Tlv::kPSKc:
- rval = static_cast<const PSKcTlv &>(aTlv).IsValid();
+ case Tlv::kPskc:
+ rval = static_cast<const PskcTlv &>(aTlv).IsValid();
break;
case Tlv::kMeshLocalPrefix:
@@ -83,6 +83,26 @@
return rval;
}
+Mac::NetworkName::Data NetworkNameTlv::GetNetworkName(void) const
+{
+ uint8_t len = GetLength();
+
+ if (len > sizeof(mNetworkName))
+ {
+ len = sizeof(mNetworkName);
+ }
+
+ return Mac::NetworkName::Data(mNetworkName, len);
+}
+
+void NetworkNameTlv::SetNetworkName(const Mac::NetworkName::Data &aNameData)
+{
+ uint8_t len;
+
+ len = aNameData.CopyTo(mNetworkName, sizeof(mNetworkName));
+ SetLength(len);
+}
+
bool SteeringDataTlv::IsCleared(void) const
{
bool rval = true;
diff --git a/src/core/meshcop/meshcop_tlvs.hpp b/src/core/meshcop/meshcop_tlvs.hpp
index 4956a12..eb7c53a 100644
--- a/src/core/meshcop/meshcop_tlvs.hpp
+++ b/src/core/meshcop/meshcop_tlvs.hpp
@@ -37,8 +37,6 @@
#include "openthread-core-config.h"
-#include "utils/wrap_string.h"
-
#include <openthread/commissioner.h>
#include <openthread/dataset.h>
#include <openthread/platform/radio.h>
@@ -46,10 +44,13 @@
#include "common/crc16.hpp"
#include "common/encoding.hpp"
#include "common/message.hpp"
+#include "common/string.hpp"
#include "common/tlvs.hpp"
+#include "mac/mac_types.hpp"
#include "meshcop/timestamp.hpp"
#include "net/ip6_address.hpp"
#include "radio/radio.hpp"
+#include "thread/key_manager.hpp"
namespace ot {
namespace MeshCoP {
@@ -76,7 +77,7 @@
kPanId = OT_MESHCOP_TLV_PANID, ///< PAN ID TLV
kExtendedPanId = OT_MESHCOP_TLV_EXTPANID, ///< Extended PAN ID TLV
kNetworkName = OT_MESHCOP_TLV_NETWORKNAME, ///< Network Name TLV
- kPSKc = OT_MESHCOP_TLV_PSKC, ///< PSKc TLV
+ kPskc = OT_MESHCOP_TLV_PSKC, ///< PSKc TLV
kNetworkMasterKey = OT_MESHCOP_TLV_MASTERKEY, ///< Network Master Key TLV
kNetworkKeySequence = OT_MESHCOP_TLV_NETWORK_KEY_SEQUENCE, ///< Network Key Sequence TLV
kMeshLocalPrefix = OT_MESHCOP_TLV_MESHLOCALPREFIX, ///< Mesh Local Prefix TLV
@@ -361,18 +362,18 @@
* @returns The Extended PAN ID value.
*
*/
- const otExtendedPanId &GetExtendedPanId(void) const { return mExtendedPanId; }
+ const Mac::ExtendedPanId &GetExtendedPanId(void) const { return mExtendedPanId; }
/**
* This method sets the Extended PAN ID value.
*
- * @param[in] aExtendedPanId A pointer to the Extended PAN ID value.
+ * @param[in] aExtendedPanId An Extended PAN ID value.
*
*/
- void SetExtendedPanId(const otExtendedPanId &aExtendedPanId) { mExtendedPanId = aExtendedPanId; }
+ void SetExtendedPanId(const Mac::ExtendedPanId &aExtendedPanId) { mExtendedPanId = aExtendedPanId; }
private:
- otExtendedPanId mExtendedPanId;
+ Mac::ExtendedPanId mExtendedPanId;
} OT_TOOL_PACKED_END;
/**
@@ -403,39 +404,23 @@
bool IsValid(void) const { return true; }
/**
- * This method returns the Network Name length.
+ * This method gets the Network Name value.
*
- * @returns The Network Name length.
+ * @returns The Network Name value (as `NetworkName::Data`).
*
*/
- uint8_t GetNetworkNameLength(void) const
- {
- return GetLength() <= sizeof(mNetworkName) ? GetLength() : sizeof(mNetworkName);
- }
-
- /**
- * This method returns the Network Name value.
- *
- * @returns The Network Name value.
- *
- */
- const char *GetNetworkName(void) const { return mNetworkName; }
+ Mac::NetworkName::Data GetNetworkName(void) const;
/**
* This method sets the Network Name value.
*
- * @param[in] aNetworkName A pointer to the Network Name value.
+ * @param[in] aNameData A Network Name value (as `NetworkName::Data`).
*
*/
- void SetNetworkName(const char *aNetworkName)
- {
- size_t length = strnlen(aNetworkName, sizeof(mNetworkName));
- memcpy(mNetworkName, aNetworkName, length);
- SetLength(static_cast<uint8_t>(length));
- }
+ void SetNetworkName(const Mac::NetworkName::Data &aNameData);
private:
- char mNetworkName[OT_NETWORK_NAME_MAX_SIZE];
+ char mNetworkName[Mac::NetworkName::kMaxSize];
} OT_TOOL_PACKED_END;
/**
@@ -443,7 +428,7 @@
*
*/
OT_TOOL_PACKED_BEGIN
-class PSKcTlv : public Tlv
+class PskcTlv : public Tlv
{
public:
/**
@@ -452,7 +437,7 @@
*/
void Init(void)
{
- SetType(kPSKc);
+ SetType(kPskc);
SetLength(sizeof(*this) - sizeof(Tlv));
}
@@ -471,18 +456,18 @@
* @returns The PSKc value.
*
*/
- const otPSKc &GetPSKc(void) const { return mPSKc; }
+ const Pskc &GetPskc(void) const { return mPskc; }
/**
* This method sets the PSKc value.
*
- * @param[in] aPSKc A pointer to the PSKc value.
+ * @param[in] aPskc A pointer to the PSKc value.
*
*/
- void SetPSKc(const otPSKc &aPSKc) { mPSKc = aPSKc; }
+ void SetPskc(const Pskc &aPskc) { mPskc = aPskc; }
private:
- otPSKc mPSKc;
+ Pskc mPskc;
} OT_TOOL_PACKED_END;
/**
@@ -518,18 +503,18 @@
* @returns The Network Master Key value.
*
*/
- const otMasterKey &GetNetworkMasterKey(void) const { return mNetworkMasterKey; }
+ const MasterKey &GetNetworkMasterKey(void) const { return mNetworkMasterKey; }
/**
* This method sets the Network Master Key value.
*
- * @param[in] aNetworkMasterKey A pointer to the Network Master Key value.
+ * @param[in] aMasterKey The Network Master Key.
*
*/
- void SetNetworkMasterKey(const otMasterKey &aNetworkMasterKey) { mNetworkMasterKey = aNetworkMasterKey; }
+ void SetNetworkMasterKey(const MasterKey &aMasterKey) { mNetworkMasterKey = aMasterKey; }
private:
- otMasterKey mNetworkMasterKey;
+ MasterKey mNetworkMasterKey;
} OT_TOOL_PACKED_END;
/**
@@ -822,6 +807,11 @@
class CommissionerIdTlv : public Tlv
{
public:
+ enum
+ {
+ kMaxLength = 64, ///< maximum length (bytes)
+ };
+
/**
* This method initializes the TLV.
*
@@ -859,17 +849,12 @@
*/
void SetCommissionerId(const char *aCommissionerId)
{
- size_t length = strnlen(aCommissionerId, sizeof(mCommissionerId));
+ uint16_t length = StringLength(aCommissionerId, sizeof(mCommissionerId));
memcpy(mCommissionerId, aCommissionerId, length);
SetLength(static_cast<uint8_t>(length));
}
private:
- enum
- {
- kMaxLength = 64,
- };
-
char mCommissionerId[kMaxLength];
} OT_TOOL_PACKED_END;
@@ -1846,7 +1831,7 @@
public:
enum
{
- kMaxLength = 64, // Maximum number of chars in the Provisioning URL string.
+ kMaxLength = OT_PROVISIONING_URL_MAX_SIZE, // Maximum number of chars in the Provisioning URL string.
};
/**
@@ -1886,7 +1871,7 @@
*/
void SetProvisioningUrl(const char *aProvisioningUrl)
{
- size_t len = aProvisioningUrl ? strnlen(aProvisioningUrl, kMaxLength) : 0;
+ uint16_t len = aProvisioningUrl ? StringLength(aProvisioningUrl, kMaxLength) : 0;
SetLength(static_cast<uint8_t>(len));
@@ -1945,7 +1930,7 @@
*/
void SetVendorName(const char *aVendorName)
{
- size_t len = (aVendorName == NULL) ? 0 : strnlen(aVendorName, sizeof(mVendorName));
+ uint16_t len = (aVendorName == NULL) ? 0 : StringLength(aVendorName, sizeof(mVendorName));
SetLength(static_cast<uint8_t>(len));
@@ -2009,7 +1994,7 @@
*/
void SetVendorModel(const char *aVendorModel)
{
- size_t len = (aVendorModel == NULL) ? 0 : strnlen(aVendorModel, sizeof(mVendorModel));
+ uint16_t len = (aVendorModel == NULL) ? 0 : StringLength(aVendorModel, sizeof(mVendorModel));
SetLength(static_cast<uint8_t>(len));
@@ -2073,7 +2058,7 @@
*/
void SetVendorSwVersion(const char *aVendorSwVersion)
{
- size_t len = (aVendorSwVersion == NULL) ? 0 : strnlen(aVendorSwVersion, sizeof(mVendorSwVersion));
+ uint16_t len = (aVendorSwVersion == NULL) ? 0 : StringLength(aVendorSwVersion, sizeof(mVendorSwVersion));
SetLength(static_cast<uint8_t>(len));
@@ -2137,7 +2122,7 @@
*/
void SetVendorData(const char *aVendorData)
{
- size_t len = (aVendorData == NULL) ? 0 : strnlen(aVendorData, sizeof(mVendorData));
+ uint16_t len = (aVendorData == NULL) ? 0 : StringLength(aVendorData, sizeof(mVendorData));
SetLength(static_cast<uint8_t>(len));
diff --git a/src/core/meshcop/panid_query_client.cpp b/src/core/meshcop/panid_query_client.cpp
index 40c51cf..da76a42 100644
--- a/src/core/meshcop/panid_query_client.cpp
+++ b/src/core/meshcop/panid_query_client.cpp
@@ -80,15 +80,15 @@
sessionId.Init();
sessionId.SetCommissionerSessionId(Get<MeshCoP::Commissioner>().GetSessionId());
- SuccessOrExit(error = message->AppendTlv(sessionId));
+ SuccessOrExit(error = sessionId.AppendTo(*message));
channelMask.Init();
channelMask.SetChannelMask(aChannelMask);
- SuccessOrExit(error = message->AppendTlv(channelMask));
+ SuccessOrExit(error = channelMask.AppendTo(*message));
panId.Init();
panId.SetPanId(aPanId);
- SuccessOrExit(error = message->AppendTlv(panId));
+ SuccessOrExit(error = panId.AppendTo(*message));
messageInfo.SetSockAddr(Get<Mle::MleRouter>().GetMeshLocal16());
messageInfo.SetPeerAddr(aAddress);
diff --git a/src/core/meshcop/timestamp.cpp b/src/core/meshcop/timestamp.cpp
index 77fc989..47eef75 100644
--- a/src/core/meshcop/timestamp.cpp
+++ b/src/core/meshcop/timestamp.cpp
@@ -33,8 +33,6 @@
#include "timestamp.hpp"
-#include "utils/wrap_string.h"
-
namespace ot {
namespace MeshCoP {
diff --git a/src/core/net/dhcp6_client.cpp b/src/core/net/dhcp6_client.cpp
index a10e4c8..b39298b 100644
--- a/src/core/net/dhcp6_client.cpp
+++ b/src/core/net/dhcp6_client.cpp
@@ -61,18 +61,19 @@
memset(mIdentityAssociations, 0, sizeof(mIdentityAssociations));
}
-bool Dhcp6Client::MatchNetifAddressWithPrefix(const otNetifAddress &aNetifAddress, const otIp6Prefix &aIp6Prefix)
+bool Dhcp6Client::MatchNetifAddressWithPrefix(const Ip6::NetifUnicastAddress &aNetifAddress,
+ const otIp6Prefix & aIp6Prefix)
{
- return aIp6Prefix.mLength == aNetifAddress.mPrefixLength &&
- otIp6PrefixMatch(&aNetifAddress.mAddress, &aIp6Prefix.mPrefix) >= aIp6Prefix.mLength;
+ return (aIp6Prefix.mLength == aNetifAddress.mPrefixLength) &&
+ (aNetifAddress.GetAddress().PrefixMatch(aIp6Prefix.mPrefix) >= aIp6Prefix.mLength);
}
void Dhcp6Client::UpdateAddresses(void)
{
- bool found = false;
- bool newAgent = false;
- otNetworkDataIterator iterator;
- otBorderRouterConfig config;
+ bool found = false;
+ bool newAgent = false;
+ NetworkData::Iterator iterator;
+ NetworkData::OnMeshPrefixConfig config;
// remove addresses directly if prefix not valid in network data
for (uint8_t i = 0; i < OT_ARRAY_LENGTH(mIdentityAssociations); i++)
@@ -85,9 +86,9 @@
}
found = false;
- iterator = OT_NETWORK_DATA_ITERATOR_INIT;
+ iterator = NetworkData::kIteratorInit;
- while ((otNetDataGetNextOnMeshPrefix(&GetInstance(), &iterator, &config)) == OT_ERROR_NONE)
+ while (Get<NetworkData::Leader>().GetNextOnMeshPrefix(iterator, config) == OT_ERROR_NONE)
{
if (!config.mDhcp)
{
@@ -103,15 +104,15 @@
if (!found)
{
- Get<ThreadNetif>().RemoveUnicastAddress(*static_cast<Ip6::NetifUnicastAddress *>(&ia.mNetifAddress));
+ Get<ThreadNetif>().RemoveUnicastAddress(ia.mNetifAddress);
mIdentityAssociations[i].mStatus = kIaStatusInvalid;
}
}
// add IdentityAssociation for new configured prefix
- iterator = OT_NETWORK_DATA_ITERATOR_INIT;
+ iterator = NetworkData::kIteratorInit;
- while (otNetDataGetNextOnMeshPrefix(&GetInstance(), &iterator, &config) == OT_ERROR_NONE)
+ while (Get<NetworkData::Leader>().GetNextOnMeshPrefix(iterator, config) == OT_ERROR_NONE)
{
IdentityAssociation *ia = NULL;
@@ -204,7 +205,7 @@
mIdentityAssociationCurrent = &mIdentityAssociations[i];
- mTrickleTimer.Start(TimerMilli::SecToMsec(kTrickleTimerImin), TimerMilli::SecToMsec(kTrickleTimerImax),
+ mTrickleTimer.Start(Time::SecToMsec(kTrickleTimerImin), Time::SecToMsec(kTrickleTimerImax),
TrickleTimer::kModeNormal);
mTrickleTimer.IndicateInconsistent();
@@ -317,7 +318,7 @@
ElapsedTime option;
option.Init();
- option.SetElapsedTime(static_cast<uint16_t>(TimerMilli::MsecToSec(TimerMilli::Elapsed(mStartTime))));
+ option.SetElapsedTime(static_cast<uint16_t>(Time::MsecToSec(TimerMilli::GetNow() - mStartTime)));
return aMessage.Append(&option, sizeof(option));
}
@@ -584,7 +585,7 @@
continue;
}
- if (otIp6PrefixMatch(&ia.mNetifAddress.mAddress, &option.GetAddress()) >= ia.mNetifAddress.mPrefixLength)
+ if (ia.mNetifAddress.GetAddress().PrefixMatch(option.GetAddress()) >= ia.mNetifAddress.mPrefixLength)
{
mIdentityAssociations[i].mNetifAddress.mAddress = option.GetAddress();
mIdentityAssociations[i].mPreferredLifetime = option.GetPreferredLifetime();
@@ -592,7 +593,7 @@
mIdentityAssociations[i].mNetifAddress.mPreferred = option.GetPreferredLifetime() != 0;
mIdentityAssociations[i].mNetifAddress.mValid = option.GetValidLifetime() != 0;
mIdentityAssociations[i].mStatus = kIaStatusSolicitReplied;
- Get<ThreadNetif>().AddUnicastAddress(*static_cast<Ip6::NetifUnicastAddress *>(&ia.mNetifAddress));
+ Get<ThreadNetif>().AddUnicastAddress(ia.mNetifAddress);
break;
}
}
diff --git a/src/core/net/dhcp6_client.hpp b/src/core/net/dhcp6_client.hpp
index 7c7dca7..e38ca0d 100644
--- a/src/core/net/dhcp6_client.hpp
+++ b/src/core/net/dhcp6_client.hpp
@@ -41,8 +41,9 @@
#include "common/timer.hpp"
#include "common/trickle_timer.hpp"
#include "mac/mac.hpp"
-#include "mac/mac_frame.hpp"
+#include "mac/mac_types.hpp"
#include "net/dhcp6.hpp"
+#include "net/netif.hpp"
#include "net/udp6.hpp"
namespace ot {
@@ -87,11 +88,11 @@
*/
struct IdentityAssociation
{
- otNetifAddress mNetifAddress; ///< the NetifAddress
- uint32_t mPreferredLifetime; ///< The preferred lifetime.
- uint32_t mValidLifetime; ///< The valid lifetime.
- uint16_t mPrefixAgentRloc; ///< Rloc of Prefix Agent
- uint8_t mStatus; ///< Status of IdentityAssociation
+ Ip6::NetifUnicastAddress mNetifAddress; ///< the NetifAddress
+ uint32_t mPreferredLifetime; ///< The preferred lifetime.
+ uint32_t mValidLifetime; ///< The valid lifetime.
+ uint16_t mPrefixAgentRloc; ///< Rloc of Prefix Agent
+ uint8_t mStatus; ///< Status of IdentityAssociation
};
/**
@@ -120,7 +121,7 @@
void Start(void);
void Stop(void);
- static bool MatchNetifAddressWithPrefix(const otNetifAddress &aNetifAddress, const otIp6Prefix &aIp6Prefix);
+ static bool MatchNetifAddressWithPrefix(const Ip6::NetifUnicastAddress &aAddress, const otIp6Prefix &aIp6Prefix);
otError Solicit(uint16_t aRloc16);
@@ -154,8 +155,8 @@
TrickleTimer mTrickleTimer;
- uint8_t mTransactionId[kTransactionIdSize];
- uint32_t mStartTime;
+ uint8_t mTransactionId[kTransactionIdSize];
+ TimeMilli mStartTime;
IdentityAssociation mIdentityAssociations[OPENTHREAD_CONFIG_DHCP6_CLIENT_NUM_PREFIXES];
IdentityAssociation *mIdentityAssociationCurrent;
diff --git a/src/core/net/dhcp6_server.cpp b/src/core/net/dhcp6_server.cpp
index 29605b9..b8eadfb 100644
--- a/src/core/net/dhcp6_server.cpp
+++ b/src/core/net/dhcp6_server.cpp
@@ -57,11 +57,11 @@
otError Dhcp6Server::UpdateService(void)
{
- otError error = OT_ERROR_NONE;
- uint16_t rloc16 = Get<Mle::MleRouter>().GetRloc16();
- otNetworkDataIterator iterator;
- otBorderRouterConfig config;
- Lowpan::Context lowpanContext;
+ otError error = OT_ERROR_NONE;
+ uint16_t rloc16 = Get<Mle::MleRouter>().GetRloc16();
+ NetworkData::Iterator iterator;
+ NetworkData::OnMeshPrefixConfig config;
+ Lowpan::Context lowpanContext;
// remove dhcp agent aloc and prefix delegation
for (int i = 0; i < OPENTHREAD_CONFIG_DHCP6_SERVER_NUM_PREFIXES; i++)
@@ -73,9 +73,9 @@
continue;
}
- iterator = OT_NETWORK_DATA_ITERATOR_INIT;
+ iterator = NetworkData::kIteratorInit;
- while (Get<NetworkData::Leader>().GetNextOnMeshPrefix(&iterator, rloc16, &config) == OT_ERROR_NONE)
+ while (Get<NetworkData::Leader>().GetNextOnMeshPrefix(iterator, rloc16, config) == OT_ERROR_NONE)
{
if (!config.mDhcp)
{
@@ -100,9 +100,9 @@
}
// add dhcp agent aloc and prefix delegation
- iterator = OT_NETWORK_DATA_ITERATOR_INIT;
+ iterator = NetworkData::kIteratorInit;
- while (Get<NetworkData::Leader>().GetNextOnMeshPrefix(&iterator, rloc16, &config) == OT_ERROR_NONE)
+ while (Get<NetworkData::Leader>().GetNextOnMeshPrefix(iterator, rloc16, config) == OT_ERROR_NONE)
{
if (!config.mDhcp)
{
diff --git a/src/core/net/dhcp6_server.hpp b/src/core/net/dhcp6_server.hpp
index baa2c59..b2dc653 100644
--- a/src/core/net/dhcp6_server.hpp
+++ b/src/core/net/dhcp6_server.hpp
@@ -38,7 +38,7 @@
#include "common/locator.hpp"
#include "mac/mac.hpp"
-#include "mac/mac_frame.hpp"
+#include "mac/mac_types.hpp"
#include "net/dhcp6.hpp"
#include "net/udp6.hpp"
#include "thread/network_data_leader.hpp"
diff --git a/src/core/net/dns_client.cpp b/src/core/net/dns_client.cpp
index 7f91ac9..bb928ed 100644
--- a/src/core/net/dns_client.cpp
+++ b/src/core/net/dns_client.cpp
@@ -28,8 +28,6 @@
#include "dns_client.hpp"
-#include "utils/wrap_string.h"
-
#include "common/code_utils.hpp"
#include "common/debug.hpp"
#include "common/instance.hpp"
@@ -49,6 +47,30 @@
namespace ot {
namespace Dns {
+QueryMetadata::QueryMetadata(void)
+ : mHostname(NULL)
+ , mResponseHandler(NULL)
+ , mResponseContext(NULL)
+ , mTransmissionTime()
+ , mDestinationPort(0)
+ , mRetransmissionCount(0)
+{
+ mSourceAddress.Clear();
+ mDestinationAddress.Clear();
+}
+
+QueryMetadata::QueryMetadata(otDnsResponseHandler aHandler, void *aContext)
+ : mHostname(NULL)
+ , mResponseHandler(aHandler)
+ , mResponseContext(aContext)
+ , mTransmissionTime()
+ , mDestinationPort(0)
+ , mRetransmissionCount(0)
+{
+ mSourceAddress.Clear();
+ mDestinationAddress.Clear();
+}
+
Client::Client(Ip6::Netif &aNetif)
: mSocket(aNetif.Get<Ip6::Udp>())
, mMessageId(0)
@@ -160,9 +182,7 @@
Message *Client::CopyAndEnqueueMessage(const Message &aMessage, const QueryMetadata &aQueryMetadata)
{
otError error = OT_ERROR_NONE;
- uint32_t now = TimerMilli::GetNow();
Message *messageCopy = NULL;
- uint32_t nextTransmissionTime;
// Create a message copy for further retransmissions.
VerifyOrExit((messageCopy = aMessage.Clone()) != NULL, error = OT_ERROR_NO_BUFS);
@@ -171,21 +191,7 @@
SuccessOrExit(error = aQueryMetadata.AppendTo(*messageCopy));
mPendingQueries.Enqueue(*messageCopy);
- // Setup the timer.
- if (mRetransmissionTimer.IsRunning())
- {
- // If timer is already running, check if it should be restarted with earlier fire time.
- nextTransmissionTime = mRetransmissionTimer.GetFireTime();
-
- if (aQueryMetadata.IsEarlier(nextTransmissionTime))
- {
- mRetransmissionTimer.Start(aQueryMetadata.mTransmissionTime - now);
- }
- }
- else
- {
- mRetransmissionTimer.Start(aQueryMetadata.mTransmissionTime - now);
- }
+ mRetransmissionTimer.FireAtIfEarlier(aQueryMetadata.mTransmissionTime);
exit:
@@ -374,7 +380,7 @@
void Client::FinalizeDnsTransaction(Message & aQuery,
const QueryMetadata &aQueryMetadata,
- otIp6Address * aAddress,
+ const otIp6Address * aAddress,
uint32_t aTtl,
otError aResult)
{
@@ -394,45 +400,34 @@
void Client::HandleRetransmissionTimer(void)
{
- uint32_t now = TimerMilli::GetNow();
- uint32_t nextDelta = TimerMilli::kForeverDt;
+ TimeMilli now = TimerMilli::GetNow();
+ TimeMilli nextTime = now.GetDistantFuture();
QueryMetadata queryMetadata;
- Message * message = mPendingQueries.GetHead();
- Message * nextMessage = NULL;
+ Message * message;
+ Message * nextMessage;
Ip6::MessageInfo messageInfo;
- while (message != NULL)
+ for (message = mPendingQueries.GetHead(); message != NULL; message = nextMessage)
{
nextMessage = message->GetNext();
+
queryMetadata.ReadFrom(*message);
- if (queryMetadata.IsLater(now))
+ if (now >= queryMetadata.mTransmissionTime)
{
- uint32_t diff = TimerMilli::Elapsed(now, queryMetadata.mTransmissionTime);
-
- // Calculate the next delay and choose the lowest.
- if (diff < nextDelta)
+ if (queryMetadata.mRetransmissionCount >= kMaxRetransmit)
{
- nextDelta = diff;
+ // No expected response.
+ FinalizeDnsTransaction(*message, queryMetadata, NULL, 0, OT_ERROR_RESPONSE_TIMEOUT);
+
+ continue;
}
- }
- else if (queryMetadata.mRetransmissionCount < kMaxRetransmit)
- {
- uint32_t diff;
// Increment retransmission counter and timer.
queryMetadata.mRetransmissionCount++;
queryMetadata.mTransmissionTime = now + kResponseTimeout;
queryMetadata.UpdateIn(*message);
- diff = TimerMilli::Elapsed(now, queryMetadata.mTransmissionTime);
-
- // Check if retransmission time is lower than current lowest.
- if (diff < nextDelta)
- {
- nextDelta = queryMetadata.mTransmissionTime - now;
- }
-
// Retransmit
messageInfo.SetPeerAddr(queryMetadata.mDestinationAddress);
messageInfo.SetPeerPort(queryMetadata.mDestinationPort);
@@ -440,18 +435,16 @@
SendCopy(*message, messageInfo);
}
- else
- {
- // No expected response.
- FinalizeDnsTransaction(*message, queryMetadata, NULL, 0, OT_ERROR_RESPONSE_TIMEOUT);
- }
- message = nextMessage;
+ if (nextTime > queryMetadata.mTransmissionTime)
+ {
+ nextTime = queryMetadata.mTransmissionTime;
+ }
}
- if (nextDelta != TimerMilli::kForeverDt)
+ if (nextTime < now.GetDistantFuture())
{
- mRetransmissionTimer.Start(nextDelta);
+ mRetransmissionTimer.FireAt(nextTime);
}
}
diff --git a/src/core/net/dns_client.hpp b/src/core/net/dns_client.hpp
index 90bf75f..1156d77 100644
--- a/src/core/net/dns_client.hpp
+++ b/src/core/net/dns_client.hpp
@@ -51,7 +51,6 @@
* This class implements metadata required for DNS retransmission.
*
*/
-OT_TOOL_PACKED_BEGIN
class QueryMetadata
{
friend class Client;
@@ -61,7 +60,7 @@
* Default constructor for the object.
*
*/
- QueryMetadata(void) { memset(this, 0, sizeof(*this)); }
+ QueryMetadata(void);
/**
* This constructor initializes the object with specific values.
@@ -70,12 +69,7 @@
* @param[in] aContext Context for the handler function.
*
*/
- QueryMetadata(otDnsResponseHandler aHandler, void *aContext)
- {
- memset(this, 0, sizeof(*this));
- mResponseHandler = aHandler;
- mResponseContext = aContext;
- }
+ QueryMetadata(otDnsResponseHandler aHandler, void *aContext);
/**
* This method appends request data to the message.
@@ -114,36 +108,16 @@
return aMessage.Write(aMessage.GetLength() - sizeof(*this), sizeof(*this), this);
}
- /**
- * This method checks if the message shall be sent before the given time.
- *
- * @param[in] aTime A time to compare.
- *
- * @retval TRUE If the message shall be sent before the given time.
- * @retval FALSE Otherwise.
- */
- bool IsEarlier(uint32_t aTime) const { return (static_cast<int32_t>(aTime - mTransmissionTime) > 0); }
-
- /**
- * This method checks if the message shall be sent after the given time.
- *
- * @param[in] aTime A time to compare.
- *
- * @retval TRUE If the message shall be sent after the given time.
- * @retval FALSE Otherwise.
- */
- bool IsLater(uint32_t aTime) const { return (static_cast<int32_t>(aTime - mTransmissionTime) < 0); }
-
private:
const char * mHostname; ///< A hostname to be find.
otDnsResponseHandler mResponseHandler; ///< A function pointer that is called on response reception.
void * mResponseContext; ///< A pointer to arbitrary context information.
- uint32_t mTransmissionTime; ///< Time when the timer should shoot for this message.
+ TimeMilli mTransmissionTime; ///< Time when the timer should shoot for this message.
Ip6::Address mSourceAddress; ///< IPv6 address of the message source.
Ip6::Address mDestinationAddress; ///< IPv6 address of the message destination.
uint16_t mDestinationPort; ///< UDP port of the message destination.
uint8_t mRetransmissionCount; ///< Number of retransmissions.
-} OT_TOOL_PACKED_END;
+};
/**
* This class implements DNS client.
@@ -232,7 +206,7 @@
Message *FindRelatedQuery(const Header &aResponseHeader, QueryMetadata &aQueryMetadata);
void FinalizeDnsTransaction(Message & aQuery,
const QueryMetadata &aQueryMetadata,
- otIp6Address * aAddress,
+ const otIp6Address * aAddress,
uint32_t aTtl,
otError aResult);
diff --git a/src/core/net/dns_headers.hpp b/src/core/net/dns_headers.hpp
index 6d863b9..2c0128e 100644
--- a/src/core/net/dns_headers.hpp
+++ b/src/core/net/dns_headers.hpp
@@ -36,8 +36,6 @@
#include "openthread-core-config.h"
-#include "utils/wrap_string.h"
-
#include "common/encoding.hpp"
#include "common/message.hpp"
diff --git a/src/core/net/icmp6.cpp b/src/core/net/icmp6.cpp
index e4a981b..754000b 100644
--- a/src/core/net/icmp6.cpp
+++ b/src/core/net/icmp6.cpp
@@ -33,8 +33,6 @@
#include "icmp6.hpp"
-#include "utils/wrap_string.h"
-
#include "common/code_utils.hpp"
#include "common/debug.hpp"
#include "common/instance.hpp"
@@ -50,7 +48,7 @@
Icmp::Icmp(Instance &aInstance)
: InstanceLocator(aInstance)
- , mHandlers(NULL)
+ , mHandlers()
, mEchoSequence(1)
, mEchoMode(OT_ICMP6_ECHO_HANDLER_ALL)
{
@@ -63,21 +61,7 @@
otError Icmp::RegisterHandler(IcmpHandler &aHandler)
{
- otError error = OT_ERROR_NONE;
-
- for (IcmpHandler *cur = mHandlers; cur; cur = cur->GetNext())
- {
- if (cur == &aHandler)
- {
- ExitNow(error = OT_ERROR_ALREADY);
- }
- }
-
- aHandler.mNext = mHandlers;
- mHandlers = &aHandler;
-
-exit:
- return error;
+ return mHandlers.Add(aHandler);
}
otError Icmp::SendEchoRequest(Message &aMessage, const MessageInfo &aMessageInfo, uint16_t aIdentifier)
@@ -163,7 +147,7 @@
aMessage.MoveOffset(sizeof(icmp6Header));
- for (IcmpHandler *handler = mHandlers; handler; handler = handler->GetNext())
+ for (IcmpHandler *handler = mHandlers.GetHead(); handler; handler = handler->GetNext())
{
handler->HandleReceiveMessage(aMessage, aMessageInfo, icmp6Header);
}
diff --git a/src/core/net/icmp6.hpp b/src/core/net/icmp6.hpp
index 2fe5d84..100af7f 100644
--- a/src/core/net/icmp6.hpp
+++ b/src/core/net/icmp6.hpp
@@ -39,6 +39,7 @@
#include <openthread/icmp6.h>
#include "common/encoding.hpp"
+#include "common/linked_list.hpp"
#include "common/locator.hpp"
#include "net/ip6_headers.hpp"
@@ -83,9 +84,11 @@
*/
enum Type
{
- kTypeDstUnreach = OT_ICMP6_TYPE_DST_UNREACH, ///< Destination Unreachable
- kTypeEchoRequest = OT_ICMP6_TYPE_ECHO_REQUEST, ///< Echo Request
- kTypeEchoReply = OT_ICMP6_TYPE_ECHO_REPLY, ///< Echo Reply
+ kTypeDstUnreach = OT_ICMP6_TYPE_DST_UNREACH, ///< Destination Unreachable
+ kTypePacketToBig = OT_ICMP6_TYPE_PACKET_TO_BIG, ///< Packet To Big
+ kTypeTimeExceeded = OT_ICMP6_TYPE_TIME_EXCEEDED, ///< Time Exceeded
+ kTypeEchoRequest = OT_ICMP6_TYPE_ECHO_REQUEST, ///< Echo Request
+ kTypeEchoReply = OT_ICMP6_TYPE_ECHO_REPLY, ///< Echo Reply
};
/**
@@ -95,6 +98,7 @@
enum Code
{
kCodeDstUnreachNoRoute = OT_ICMP6_CODE_DST_UNREACH_NO_ROUTE, ///< Destination Unreachable No Route
+ kCodeFragmReasTimeEx = OT_ICMP6_CODE_FRAGM_REAS_TIME_EX, ///< Fragment Reassembly Time Exceeded
};
/**
@@ -198,7 +202,7 @@
* This class implements ICMPv6 message handlers.
*
*/
-class IcmpHandler : public otIcmp6Handler
+class IcmpHandler : public otIcmp6Handler, public LinkedListEntry<IcmpHandler>
{
friend class Icmp;
@@ -222,8 +226,6 @@
{
mReceiveCallback(mContext, &aMessage, &aMessageInfo, &aIcmp6Header);
}
-
- IcmpHandler *GetNext(void) { return static_cast<IcmpHandler *>(mNext); }
};
/**
@@ -344,7 +346,7 @@
private:
otError HandleEchoRequest(Message &aRequestMessage, const MessageInfo &aMessageInfo);
- IcmpHandler *mHandlers;
+ LinkedList<IcmpHandler> mHandlers;
uint16_t mEchoSequence;
otIcmp6EchoMode mEchoMode;
diff --git a/src/core/net/ip6.cpp b/src/core/net/ip6.cpp
index 894bd7e..303e03e 100644
--- a/src/core/net/ip6.cpp
+++ b/src/core/net/ip6.cpp
@@ -39,6 +39,7 @@
#include "common/locator-getters.hpp"
#include "common/logging.hpp"
#include "common/message.hpp"
+#include "common/random.hpp"
#include "net/icmp6.hpp"
#include "net/ip6_address.hpp"
#include "net/netif.hpp"
@@ -59,6 +60,9 @@
, mIcmp(aInstance)
, mUdp(aInstance)
, mMpl(aInstance)
+#if OPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE
+ , mTimer(aInstance, &Ip6::HandleTimer, this)
+#endif
{
}
@@ -170,7 +174,7 @@
uint16_t Ip6::ComputePseudoheaderChecksum(const Address &aSource,
const Address &aDestination,
uint16_t aLength,
- IpProto aProto)
+ uint8_t aProto)
{
uint16_t checksum;
@@ -223,7 +227,7 @@
MessageInfo messageInfo(aMessageInfo);
// Use IP-in-IP encapsulation (RFC2473) and ALL_MPL_FORWARDERS address.
- memset(&messageInfo.GetPeerAddr(), 0, sizeof(Address));
+ messageInfo.GetPeerAddr().Clear();
messageInfo.GetPeerAddr().mFields.m16[0] = HostSwap16(0xff03);
messageInfo.GetPeerAddr().mFields.m16[7] = HostSwap16(0x00fc);
@@ -444,7 +448,7 @@
mSendQueueTask.Post();
}
-otError Ip6::SendDatagram(Message &aMessage, MessageInfo &aMessageInfo, IpProto aIpProto)
+otError Ip6::SendDatagram(Message &aMessage, MessageInfo &aMessageInfo, uint8_t aIpProto)
{
otError error = OT_ERROR_NONE;
Header header;
@@ -456,7 +460,15 @@
header.SetDscp(PriorityToDscp(aMessage.GetPriority()));
header.SetPayloadLength(payloadLength);
header.SetNextHeader(aIpProto);
- header.SetHopLimit(aMessageInfo.mHopLimit ? aMessageInfo.mHopLimit : static_cast<uint8_t>(kDefaultHopLimit));
+
+ if (aMessageInfo.GetHopLimit() != 0 || aMessageInfo.ShouldAllowZeroHopLimit())
+ {
+ header.SetHopLimit(aMessageInfo.GetHopLimit());
+ }
+ else
+ {
+ header.SetHopLimit(static_cast<uint8_t>(kDefaultHopLimit));
+ }
if (aMessageInfo.GetSockAddr().IsUnspecified() || aMessageInfo.GetSockAddr().IsMulticast())
{
@@ -518,7 +530,14 @@
if (error == OT_ERROR_NONE)
{
- EnqueueDatagram(aMessage);
+ if (aMessage.GetLength() > kMaxDatagramLength)
+ {
+ error = FragmentDatagram(aMessage, aIpProto);
+ }
+ else
+ {
+ EnqueueDatagram(aMessage);
+ }
}
return error;
@@ -603,9 +622,302 @@
return error;
}
-otError Ip6::HandleFragment(Message &aMessage)
+#if OPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE
+otError Ip6::FragmentDatagram(Message &aMessage, uint8_t aIpProto)
{
otError error = OT_ERROR_NONE;
+ Header header;
+ FragmentHeader fragmentHeader;
+ Message * fragment = NULL;
+ uint16_t fragmentCnt = 0;
+ uint16_t payloadFragment = 0;
+ uint16_t offset = 0;
+ int assertValue = 0;
+
+ uint16_t maxPayloadFragment =
+ FragmentHeader::MakeDivisibleByEight(kMinimalMtu - aMessage.GetOffset() - sizeof(fragmentHeader));
+ uint16_t payloadLeft = aMessage.GetLength() - aMessage.GetOffset();
+
+ VerifyOrExit(aMessage.GetLength() <= kMaxAssembledDatagramLength, error = OT_ERROR_NO_BUFS);
+
+ VerifyOrExit(aMessage.Read(0, sizeof(header), &header) == sizeof(header), error = OT_ERROR_PARSE);
+ header.SetNextHeader(kProtoFragment);
+
+ fragmentHeader.Init();
+ fragmentHeader.SetIdentification(Random::NonCrypto::GetUint32());
+ fragmentHeader.SetNextHeader(aIpProto);
+ fragmentHeader.SetMoreFlag();
+
+ while (payloadLeft != 0)
+ {
+ if (payloadLeft < maxPayloadFragment)
+ {
+ fragmentHeader.ClearMoreFlag();
+
+ payloadFragment = payloadLeft;
+ payloadLeft = 0;
+
+ otLogDebgIp6("Last Fragment");
+ }
+ else
+ {
+ payloadLeft -= maxPayloadFragment;
+ payloadFragment = maxPayloadFragment;
+ }
+
+ offset = fragmentCnt * FragmentHeader::BytesToFragmentOffset(maxPayloadFragment);
+ fragmentHeader.SetOffset(offset);
+
+ VerifyOrExit((fragment = NewMessage(0)) != NULL, error = OT_ERROR_NO_BUFS);
+ SuccessOrExit(error = fragment->SetLength(aMessage.GetOffset() + sizeof(fragmentHeader) + payloadFragment));
+
+ header.SetPayloadLength(payloadFragment + sizeof(fragmentHeader));
+ assertValue = fragment->Write(0, sizeof(header), &header);
+ assert(assertValue == sizeof(header));
+
+ SuccessOrExit(error = fragment->SetOffset(aMessage.GetOffset()));
+ assertValue = fragment->Write(aMessage.GetOffset(), sizeof(fragmentHeader), &fragmentHeader);
+ assert(assertValue == sizeof(fragmentHeader));
+
+ VerifyOrExit(aMessage.CopyTo(aMessage.GetOffset() + FragmentHeader::FragmentOffsetToBytes(offset),
+ aMessage.GetOffset() + sizeof(fragmentHeader), payloadFragment,
+ *fragment) == static_cast<int>(payloadFragment),
+ error = OT_ERROR_NO_BUFS);
+
+ EnqueueDatagram(*fragment);
+
+ fragmentCnt++;
+ fragment = NULL;
+
+ otLogInfoIp6("Fragment %d with %d bytes sent", fragmentCnt, payloadFragment);
+ }
+ aMessage.Free();
+
+exit:
+
+ if (error == OT_ERROR_NO_BUFS)
+ {
+ otLogWarnIp6("No buffer for Ip6 fragmentation");
+ }
+
+ if (error != OT_ERROR_NONE && fragment != NULL)
+ {
+ fragment->Free();
+ }
+
+ return error;
+}
+
+otError Ip6::HandleFragment(Message &aMessage, Netif *aNetif, MessageInfo &aMessageInfo, bool aFromNcpHost)
+{
+ otError error = OT_ERROR_NONE;
+ Header header, headerBuffer;
+ FragmentHeader fragmentHeader;
+ Message * message = NULL;
+ uint16_t offset = 0;
+ uint16_t payloadFragment = 0;
+ int assertValue = 0;
+ bool isFragmented = true;
+
+ VerifyOrExit(aMessage.Read(0, sizeof(header), &header) == sizeof(header), error = OT_ERROR_PARSE);
+
+ VerifyOrExit(aMessage.Read(aMessage.GetOffset(), sizeof(fragmentHeader), &fragmentHeader) == sizeof(fragmentHeader),
+ error = OT_ERROR_PARSE);
+
+ if (fragmentHeader.GetOffset() == 0 && !fragmentHeader.IsMoreFlagSet())
+ {
+ isFragmented = false;
+ error = aMessage.MoveOffset(sizeof(fragmentHeader));
+
+ ExitNow();
+ }
+
+ for (message = mReassemblyList.GetHead(); message; message = message->GetNext())
+ {
+ VerifyOrExit(message->Read(0, sizeof(headerBuffer), &headerBuffer) == sizeof(headerBuffer),
+ error = OT_ERROR_PARSE);
+
+ if (message->GetDatagramTag() == fragmentHeader.GetIdentification() &&
+ headerBuffer.GetSource() == header.GetSource() && headerBuffer.GetDestination() == header.GetDestination())
+ {
+ break;
+ }
+ }
+
+ offset = FragmentHeader::FragmentOffsetToBytes(fragmentHeader.GetOffset());
+ payloadFragment = aMessage.GetLength() - aMessage.GetOffset() - sizeof(fragmentHeader);
+
+ if (message == NULL)
+ {
+ VerifyOrExit((message = NewMessage(0)) != NULL, error = OT_ERROR_NO_BUFS);
+ SuccessOrExit(error = message->SetLength(aMessage.GetOffset()));
+
+ message->SetTimeout(kIp6ReassemblyTimeout);
+ SuccessOrExit(error = message->SetOffset(0));
+ message->SetDatagramTag(fragmentHeader.GetIdentification());
+
+ // copying the non-fragmentable header to the fragmentation buffer
+ assertValue = aMessage.CopyTo(0, 0, aMessage.GetOffset(), *message);
+ assert(assertValue == aMessage.GetOffset());
+
+ if (!mTimer.IsRunning())
+ {
+ mTimer.Start(kStateUpdatePeriod);
+ }
+
+ mReassemblyList.Enqueue(*message);
+
+ otLogDebgIp6("start reassembly.");
+ }
+
+ otLogInfoIp6("Fragment with id %d received > %d bytes, offset %d", message->GetDatagramTag(), payloadFragment,
+ offset);
+
+ if (offset + payloadFragment + aMessage.GetOffset() > kMaxAssembledDatagramLength)
+ {
+ otLogWarnIp6("Package too large for fragment buffer");
+ ExitNow(error = OT_ERROR_NO_BUFS);
+ }
+
+ // increase message buffer if necessary
+ if (message->GetLength() < offset + payloadFragment + aMessage.GetOffset())
+ {
+ SuccessOrExit(error = message->SetLength(offset + payloadFragment + aMessage.GetOffset()));
+ }
+
+ // copy the fragment payload into the message buffer
+ assertValue = aMessage.CopyTo(aMessage.GetOffset() + sizeof(fragmentHeader), aMessage.GetOffset() + offset,
+ payloadFragment, *message);
+ assert(assertValue == static_cast<int>(payloadFragment));
+
+ // check if it is the last frame
+ if (!fragmentHeader.IsMoreFlagSet())
+ {
+ // use the offset value for the whole ip message length
+ SuccessOrExit(error = message->SetOffset(offset + payloadFragment + aMessage.GetOffset()));
+ }
+
+ if (message->GetOffset() >= message->GetLength())
+ {
+ // creates the header for the reassembled ipv6 package
+ VerifyOrExit(aMessage.Read(0, sizeof(header), &header) == sizeof(header), error = OT_ERROR_PARSE);
+ header.SetPayloadLength(message->GetLength() - sizeof(header));
+ header.SetNextHeader(fragmentHeader.GetNextHeader());
+ assertValue = message->Write(0, sizeof(header), &header);
+ assert(assertValue == sizeof(header));
+
+ otLogDebgIp6("Reassembly complete.");
+
+ mReassemblyList.Dequeue(*message);
+
+ error = HandleDatagram(*message, aNetif, aMessageInfo.mLinkInfo, aFromNcpHost);
+ }
+
+exit:
+ if (error != OT_ERROR_DROP && error != OT_ERROR_NONE && isFragmented)
+ {
+ if (message != NULL)
+ {
+ mReassemblyList.Dequeue(*message);
+ message->Free();
+ }
+ otLogWarnIp6("Reassembly failed: %s", otThreadErrorToString(error));
+ }
+ if (isFragmented)
+ {
+ // drop all fragments, the payload is stored in the fragment buffer
+ error = OT_ERROR_DROP;
+ }
+
+ return error;
+}
+
+void Ip6::CleanupFragmentationBuffer(void)
+{
+ for (Message *message = mReassemblyList.GetHead(); message;)
+ {
+ Message *next = message->GetNext();
+ mReassemblyList.Dequeue(*message);
+
+ message->Free();
+ message = next;
+ }
+}
+
+void Ip6::HandleTimer(Timer &aTimer)
+{
+ aTimer.GetOwner<Ip6>().HandleUpdateTimer();
+}
+
+void Ip6::HandleUpdateTimer(void)
+{
+ UpdateReassemblyList();
+
+ if (mReassemblyList.GetHead() != NULL)
+ {
+ mTimer.Start(kStateUpdatePeriod);
+ }
+}
+
+void Ip6::UpdateReassemblyList(void)
+{
+ Message *next;
+
+ for (Message *message = mReassemblyList.GetHead(); message; message = next)
+ {
+ next = message->GetNext();
+
+ if (message->GetTimeout() > 0)
+ {
+ message->DecrementTimeout();
+ }
+ else
+ {
+ otLogNoteIp6("Reassembly timeout.");
+ SendIcmpError(*message, IcmpHeader::kTypeTimeExceeded, IcmpHeader::kCodeFragmReasTimeEx);
+
+ mReassemblyList.Dequeue(*message);
+ message->Free();
+ }
+ }
+}
+
+otError Ip6::SendIcmpError(Message &aMessage, IcmpHeader::Type aIcmpType, IcmpHeader::Code aIcmpCode)
+{
+ otError error = OT_ERROR_NONE;
+ Header header;
+ MessageInfo messageInfo;
+
+ VerifyOrExit(aMessage.Read(0, sizeof(header), &header) == sizeof(header), error = OT_ERROR_PARSE);
+
+ messageInfo.SetPeerAddr(header.GetSource());
+ messageInfo.SetSockAddr(header.GetDestination());
+ messageInfo.SetHopLimit(header.GetHopLimit());
+ messageInfo.SetLinkInfo(NULL);
+
+ SuccessOrExit(error = mIcmp.SendError(aIcmpType, aIcmpCode, messageInfo, header));
+
+exit:
+ return error;
+}
+
+#else
+otError Ip6::FragmentDatagram(Message &aMessage, uint8_t aIpProto)
+{
+ OT_UNUSED_VARIABLE(aIpProto);
+
+ EnqueueDatagram(aMessage);
+
+ return OT_ERROR_NONE;
+}
+
+otError Ip6::HandleFragment(Message &aMessage, Netif *aNetif, MessageInfo &aMessageInfo, bool aFromNcpHost)
+{
+ OT_UNUSED_VARIABLE(aNetif);
+ OT_UNUSED_VARIABLE(aMessageInfo);
+ OT_UNUSED_VARIABLE(aFromNcpHost);
+
+ otError error = OT_ERROR_NONE;
FragmentHeader fragmentHeader;
VerifyOrExit(aMessage.Read(aMessage.GetOffset(), sizeof(fragmentHeader), &fragmentHeader) == sizeof(fragmentHeader),
@@ -618,12 +930,16 @@
exit:
return error;
}
+#endif // OPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE
-otError Ip6::HandleExtensionHeaders(Message &aMessage,
- Header & aHeader,
- uint8_t &aNextHeader,
- bool aForward,
- bool aReceive)
+otError Ip6::HandleExtensionHeaders(Message & aMessage,
+ Netif * aNetif,
+ MessageInfo &aMessageInfo,
+ Header & aHeader,
+ uint8_t & aNextHeader,
+ bool aForward,
+ bool aFromNcpHost,
+ bool aReceive)
{
otError error = OT_ERROR_NONE;
ExtensionHeader extHeader;
@@ -640,7 +956,7 @@
break;
case kProtoFragment:
- SuccessOrExit(error = HandleFragment(aMessage));
+ SuccessOrExit(error = HandleFragment(aMessage, aNetif, aMessageInfo, aFromNcpHost));
break;
case kProtoDstOpts:
@@ -672,7 +988,12 @@
switch (aIpProto)
{
case kProtoUdp:
- ExitNow(error = mUdp.HandleMessage(aMessage, aMessageInfo));
+ error = mUdp.HandleMessage(aMessage, aMessageInfo);
+ if (error == OT_ERROR_DROP)
+ {
+ otLogNoteIp6("Error UDP Checksum");
+ }
+ ExitNow();
case kProtoIcmp6:
ExitNow(error = mIcmp.HandleMessage(aMessage, aMessageInfo));
@@ -882,7 +1203,8 @@
// process IPv6 Extension Headers
nextHeader = static_cast<uint8_t>(header.GetNextHeader());
- SuccessOrExit(error = HandleExtensionHeaders(aMessage, header, nextHeader, forward, receive));
+ SuccessOrExit(error = HandleExtensionHeaders(aMessage, aNetif, messageInfo, header, nextHeader, forward,
+ aFromNcpHost, receive));
// process IPv6 Payload
if (receive)
@@ -985,20 +1307,16 @@
const NetifUnicastAddress *Ip6::SelectSourceAddress(MessageInfo &aMessageInfo)
{
- Address * destination = &aMessageInfo.GetPeerAddr();
- const NetifUnicastAddress *rvalAddr = NULL;
- const Address * candidateAddr;
- uint8_t rvalPrefixMatched = 0;
+ Address * destination = &aMessageInfo.GetPeerAddr();
uint8_t destinationScope = destination->GetScope();
+ const NetifUnicastAddress *rvalAddr = NULL;
+ uint8_t rvalPrefixMatched = 0;
for (const NetifUnicastAddress *addr = Get<ThreadNetif>().GetUnicastAddresses(); addr; addr = addr->GetNext())
{
- uint8_t overrideScope;
- uint8_t candidatePrefixMatched;
-
- candidateAddr = &addr->GetAddress();
- candidatePrefixMatched = destination->PrefixMatch(*candidateAddr);
- overrideScope = (candidatePrefixMatched >= addr->mPrefixLength) ? addr->GetScope() : destinationScope;
+ const Address *candidateAddr = &addr->GetAddress();
+ uint8_t candidatePrefixMatched;
+ uint8_t overrideScope;
if (candidateAddr->IsAnycastRoutingLocator())
{
@@ -1006,6 +1324,18 @@
continue;
}
+ candidatePrefixMatched = destination->PrefixMatch(*candidateAddr);
+
+ if (candidatePrefixMatched >= addr->mPrefixLength)
+ {
+ candidatePrefixMatched = addr->mPrefixLength;
+ overrideScope = addr->GetScope();
+ }
+ else
+ {
+ overrideScope = destinationScope;
+ }
+
if (rvalAddr == NULL)
{
// Rule 0: Prefer any address
@@ -1043,19 +1373,6 @@
continue;
}
}
- else if ((rvalAddr->GetScope() == Address::kRealmLocalScope) && (addr->GetScope() == Address::kRealmLocalScope))
- {
- // Additional rule: Prefer EID
- if (rvalAddr->GetAddress().IsRoutingLocator())
- {
- rvalAddr = addr;
- rvalPrefixMatched = candidatePrefixMatched;
- }
- else
- {
- continue;
- }
- }
else if (addr->mPreferred && !rvalAddr->mPreferred)
{
// Rule 3: Avoid deprecated addresses
@@ -1070,6 +1387,13 @@
rvalAddr = addr;
rvalPrefixMatched = candidatePrefixMatched;
}
+ else if ((candidatePrefixMatched == rvalPrefixMatched) &&
+ (destination->IsRoutingLocator() == candidateAddr->IsRoutingLocator()))
+ {
+ // Additional rule: Prefer RLOC source for RLOC destination, EID source for anything else
+ rvalAddr = addr;
+ rvalPrefixMatched = candidatePrefixMatched;
+ }
else
{
continue;
@@ -1104,7 +1428,7 @@
// LCOV_EXCL_START
-const char *Ip6::IpProtoToString(IpProto aIpProto)
+const char *Ip6::IpProtoToString(uint8_t aIpProto)
{
const char *retval;
diff --git a/src/core/net/ip6.hpp b/src/core/net/ip6.hpp
index 0272853..05d7aea 100644
--- a/src/core/net/ip6.hpp
+++ b/src/core/net/ip6.hpp
@@ -44,6 +44,7 @@
#include "common/encoding.hpp"
#include "common/locator.hpp"
#include "common/message.hpp"
+#include "common/timer.hpp"
#include "net/icmp6.hpp"
#include "net/ip6_address.hpp"
#include "net/ip6_headers.hpp"
@@ -104,8 +105,12 @@
public:
enum
{
- kDefaultHopLimit = OPENTHREAD_CONFIG_IP6_HOP_LIMIT_DEFAULT,
- kMaxDatagramLength = OPENTHREAD_CONFIG_IP6_MAX_DATAGRAM_LENGTH,
+ kDefaultHopLimit = OPENTHREAD_CONFIG_IP6_HOP_LIMIT_DEFAULT,
+ kMaxDatagramLength = OPENTHREAD_CONFIG_IP6_MAX_DATAGRAM_LENGTH,
+ kMaxAssembledDatagramLength = OPENTHREAD_CONFIG_IP6_MAX_ASSEMBLED_DATAGRAM,
+ kIp6ReassemblyTimeout = OPENTHREAD_CONFIG_IP6_REASSEMBLY_TIMEOUT,
+ kMinimalMtu = 1280,
+ kStateUpdatePeriod = 1000,
};
/**
@@ -177,7 +182,7 @@
* @retval OT_ERROR_NO_BUFS Insufficient available buffer to add the IPv6 headers.
*
*/
- otError SendDatagram(Message &aMessage, MessageInfo &aMessageInfo, IpProto aIpProto);
+ otError SendDatagram(Message &aMessage, MessageInfo &aMessageInfo, uint8_t aIpProto);
/**
* This method sends a raw IPv6 datagram with a fully formed IPv6 header.
@@ -245,7 +250,7 @@
static uint16_t ComputePseudoheaderChecksum(const Address &aSource,
const Address &aDestination,
uint16_t aLength,
- IpProto aProto);
+ uint8_t aProto);
/**
* This method registers a callback to provide received raw IPv6 datagrams.
@@ -327,7 +332,7 @@
* @returns The string representation of an IP protocol enumeration.
*
*/
- static const char *IpProtoToString(IpProto aIpProto);
+ static const char *IpProtoToString(uint8_t aIpProto);
private:
enum
@@ -344,12 +349,23 @@
const MessageInfo &aMessageInfo,
uint8_t aIpProto,
bool aFromNcpHost);
- otError HandleExtensionHeaders(Message &aMessage,
- Header & aHeader,
- uint8_t &aNextHeader,
- bool aForward,
- bool aReceive);
- otError HandleFragment(Message &aMessage);
+ otError HandleExtensionHeaders(Message & aMessage,
+ Netif * aNetif,
+ MessageInfo &aMessageInfo,
+ Header & aHeader,
+ uint8_t & aNextHeader,
+ bool aForward,
+ bool aFromNcpHost,
+ bool aReceive);
+ otError FragmentDatagram(Message &aMessage, uint8_t aIpProto);
+ otError HandleFragment(Message &aMessage, Netif *aNetif, MessageInfo &aMessageInfo, bool aFromNcpHost);
+#if OPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE
+ void CleanupFragmentationBuffer(void);
+ void HandleUpdateTimer(void);
+ void UpdateReassemblyList(void);
+ otError SendIcmpError(Message &aMessage, IcmpHeader::Type aIcmpType, IcmpHeader::Code aIcmpCode);
+ static void HandleTimer(Timer &aTimer);
+#endif
otError AddMplOption(Message &aMessage, Header &aHeader);
otError AddTunneledMplOption(Message &aMessage, Header &aHeader, MessageInfo &aMessageInfo);
otError InsertMplOption(Message &aMessage, Header &aHeader, MessageInfo &aMessageInfo);
@@ -370,6 +386,11 @@
Icmp mIcmp;
Udp mUdp;
Mpl mMpl;
+
+#if OPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE
+ TimerMilli mTimer;
+ MessageQueue mReassemblyList;
+#endif
};
/**
diff --git a/src/core/net/ip6_address.cpp b/src/core/net/ip6_address.cpp
index 57797a0..8e09810 100644
--- a/src/core/net/ip6_address.cpp
+++ b/src/core/net/ip6_address.cpp
@@ -34,12 +34,10 @@
#include "ip6_address.hpp"
#include <stdio.h>
-#include "utils/wrap_string.h"
#include "common/code_utils.hpp"
#include "common/encoding.hpp"
#include "common/instance.hpp"
-#include "mac/mac_frame.hpp"
using ot::Encoding::BigEndian::HostSwap16;
using ot::Encoding::BigEndian::HostSwap32;
@@ -64,12 +62,7 @@
bool Address::IsLinkLocal(void) const
{
- return (mFields.m8[0] == 0xfe) && ((mFields.m8[1] & 0xc0) == 0x80);
-}
-
-bool Address::IsMulticast(void) const
-{
- return mFields.m8[0] == 0xff;
+ return (mFields.m16[0] & HostSwap16(0xffc0)) == HostSwap16(0xfe80);
}
bool Address::IsLinkLocalMulticast(void) const
@@ -119,21 +112,20 @@
bool Address::IsRoutingLocator(void) const
{
- return (mFields.m16[4] == HostSwap16(0x0000) && mFields.m16[5] == HostSwap16(0x00ff) &&
- mFields.m16[6] == HostSwap16(0xfe00) && mFields.m8[14] < kAloc16Mask &&
- (mFields.m8[14] & kRloc16ReservedBitMask) == 0);
+ return (mFields.m32[2] == HostSwap32(0x000000ff) && mFields.m16[6] == HostSwap16(0xfe00) &&
+ mFields.m8[14] < kAloc16Mask && (mFields.m8[14] & kRloc16ReservedBitMask) == 0);
}
bool Address::IsAnycastRoutingLocator(void) const
{
- return (mFields.m16[4] == HostSwap16(0x0000) && mFields.m16[5] == HostSwap16(0x00ff) &&
- mFields.m16[6] == HostSwap16(0xfe00) && mFields.m8[14] == kAloc16Mask);
+ return (mFields.m32[2] == HostSwap32(0x000000ff) && mFields.m16[6] == HostSwap16(0xfe00) &&
+ mFields.m8[14] == kAloc16Mask);
}
bool Address::IsAnycastServiceLocator(void) const
{
- return IsAnycastRoutingLocator() && (mFields.m16[7] >= HostSwap16(Mle::kAloc16ServiceStart)) &&
- (mFields.m16[7] <= HostSwap16(Mle::kAloc16ServiceEnd));
+ return IsAnycastRoutingLocator() && (mFields.m8[15] >= (Mle::kAloc16ServiceStart & 0xff)) &&
+ (mFields.m8[15] <= (Mle::kAloc16ServiceEnd & 0xff));
}
bool Address::IsSubnetRouterAnycast(void) const
@@ -152,16 +144,6 @@
return IsSubnetRouterAnycast() || IsReservedSubnetAnycast() || IsAnycastRoutingLocator();
}
-const uint8_t *Address::GetIid(void) const
-{
- return mFields.m8 + kInterfaceIdentifierOffset;
-}
-
-uint8_t *Address::GetIid(void)
-{
- return mFields.m8 + kInterfaceIdentifierOffset;
-}
-
void Address::SetIid(const uint8_t *aIid)
{
memcpy(mFields.m8 + kInterfaceIdentifierOffset, aIid, kInterfaceIdentifierSize);
@@ -169,19 +151,22 @@
void Address::SetIid(const Mac::ExtAddress &aExtAddress)
{
- memcpy(mFields.m8 + kInterfaceIdentifierOffset, aExtAddress.m8, kInterfaceIdentifierSize);
- mFields.m8[kInterfaceIdentifierOffset] ^= 0x02;
+ Mac::ExtAddress addr;
+
+ addr = aExtAddress;
+ addr.ToggleLocal();
+ addr.CopyTo(mFields.m8 + kInterfaceIdentifierOffset);
}
void Address::ToExtAddress(Mac::ExtAddress &aExtAddress) const
{
- memcpy(aExtAddress.m8, mFields.m8 + kInterfaceIdentifierOffset, sizeof(aExtAddress.m8));
+ aExtAddress.Set(mFields.m8 + kInterfaceIdentifierOffset);
aExtAddress.ToggleLocal();
}
void Address::ToExtAddress(Mac::Address &aMacAddress) const
{
- aMacAddress.SetExtended(mFields.m8 + kInterfaceIdentifierOffset, /* reverse */ false);
+ aMacAddress.SetExtended(mFields.m8 + kInterfaceIdentifierOffset);
aMacAddress.GetExtended().ToggleLocal();
}
@@ -252,11 +237,6 @@
return memcmp(mFields.m8, aOther.mFields.m8, sizeof(mFields.m8)) == 0;
}
-bool Address::operator!=(const Address &aOther) const
-{
- return memcmp(mFields.m8, aOther.mFields.m8, sizeof(mFields.m8)) != 0;
-}
-
otError Address::FromString(const char *aBuf)
{
otError error = OT_ERROR_NONE;
@@ -271,7 +251,7 @@
char ch;
uint8_t d;
- memset(mFields.m8, 0, 16);
+ Clear();
dst--;
diff --git a/src/core/net/ip6_address.hpp b/src/core/net/ip6_address.hpp
index c8927c5..3b7a9ff 100644
--- a/src/core/net/ip6_address.hpp
+++ b/src/core/net/ip6_address.hpp
@@ -39,7 +39,7 @@
#include <stdint.h>
#include "common/string.hpp"
-#include "mac/mac_frame.hpp"
+#include "mac/mac_types.hpp"
namespace ot {
namespace Ip6 {
@@ -127,15 +127,6 @@
bool IsLoopback(void) const;
/**
- * This method indicates whether or not the IPv6 address scope is Interface-Local.
- *
- * @retval TRUE If the IPv6 address scope is Interface-Local.
- * @retval FALSE If the IPv6 address scope is not Interface-Local.
- *
- */
- bool IsInterfaceLocal(void) const;
-
- /**
* This method indicates whether or not the IPv6 address scope is Link-Local.
*
* @retval TRUE If the IPv6 address scope is Link-Local.
@@ -151,7 +142,7 @@
* @retval FALSE If the IPv6 address scope is not a multicast address.
*
*/
- bool IsMulticast(void) const;
+ bool IsMulticast(void) const { return mFields.m8[0] == 0xff; }
/**
* This method indicates whether or not the IPv6 address is a link-local multicast address.
@@ -285,7 +276,7 @@
* @returns A pointer to the Interface Identifier.
*
*/
- const uint8_t *GetIid(void) const;
+ const uint8_t *GetIid(void) const { return mFields.m8 + kInterfaceIdentifierOffset; }
/**
* This method returns a pointer to the Interface Identifier.
@@ -293,7 +284,7 @@
* @returns A pointer to the Interface Identifier.
*
*/
- uint8_t *GetIid(void);
+ uint8_t *GetIid(void) { return mFields.m8 + kInterfaceIdentifierOffset; }
/**
* This method sets the Interface Identifier.
@@ -365,7 +356,7 @@
* @retval FALSE If the IPv6 addresses do not differ.
*
*/
- bool operator!=(const Address &aOther) const;
+ bool operator!=(const Address &aOther) const { return !(*this == aOther); }
/**
* This method converts an IPv6 address string to binary.
diff --git a/src/core/net/ip6_headers.cpp b/src/core/net/ip6_headers.cpp
index 8270b42..02176b4 100644
--- a/src/core/net/ip6_headers.cpp
+++ b/src/core/net/ip6_headers.cpp
@@ -60,7 +60,11 @@
VerifyOrExit(IsVersion6(), ret = false);
// check Payload Length
+#if !OPENTHREAD_CONFIG_IP6_FRAGMENTATION_ENABLE
VerifyOrExit((sizeof(*this) + GetPayloadLength()) <= Ip6::kMaxDatagramLength, ret = false);
+#else
+ VerifyOrExit((sizeof(*this) + GetPayloadLength()) <= Ip6::kMaxAssembledDatagramLength, ret = false);
+#endif
exit:
return ret;
diff --git a/src/core/net/ip6_headers.hpp b/src/core/net/ip6_headers.hpp
index 058dacd..5a1f750 100644
--- a/src/core/net/ip6_headers.hpp
+++ b/src/core/net/ip6_headers.hpp
@@ -88,7 +88,7 @@
/**
* Internet Protocol Numbers
*/
-enum IpProto
+enum
{
kProtoHopOpts = 0, ///< IPv6 Hop-by-Hop Option
kProtoTcp = 6, ///< Transmission Control Protocol
@@ -241,7 +241,7 @@
* @returns The IPv6 Next Header value.
*
*/
- IpProto GetNextHeader(void) const { return static_cast<IpProto>(mNextHeader); }
+ uint8_t GetNextHeader(void) const { return mNextHeader; }
/**
* This method sets the IPv6 Next Header value.
@@ -249,7 +249,7 @@
* @param[in] aNextHeader The IPv6 Next Header value.
*
*/
- void SetNextHeader(IpProto aNextHeader) { mNextHeader = static_cast<uint8_t>(aNextHeader); }
+ void SetNextHeader(uint8_t aNextHeader) { mNextHeader = aNextHeader; }
/**
* This method returns the IPv6 Hop Limit value.
@@ -355,7 +355,7 @@
* @returns The IPv6 Next Header value.
*
*/
- IpProto GetNextHeader(void) const { return static_cast<IpProto>(mNextHeader); }
+ uint8_t GetNextHeader(void) const { return mNextHeader; }
/**
* This method sets the IPv6 Next Header value.
@@ -363,7 +363,7 @@
* @param[in] aNextHeader The IPv6 Next Header value.
*
*/
- void SetNextHeader(IpProto aNextHeader) { mNextHeader = static_cast<uint8_t>(aNextHeader); }
+ void SetNextHeader(uint8_t aNextHeader) { mNextHeader = aNextHeader; }
/**
* This method returns the IPv6 Header Extension Length value.
@@ -551,6 +551,7 @@
void Init(void)
{
mReserved = 0;
+ mOffsetMore = 0;
mIdentification = 0;
}
@@ -560,7 +561,7 @@
* @returns The IPv6 Next Header value.
*
*/
- IpProto GetNextHeader(void) const { return static_cast<IpProto>(mNextHeader); }
+ uint8_t GetNextHeader(void) const { return mNextHeader; }
/**
* This method sets the IPv6 Next Header value.
@@ -568,7 +569,7 @@
* @param[in] aNextHeader The IPv6 Next Header value.
*
*/
- void SetNextHeader(IpProto aNextHeader) { mNextHeader = static_cast<uint8_t>(aNextHeader); }
+ void SetNextHeader(uint8_t aNextHeader) { mNextHeader = aNextHeader; }
/**
* This method returns the Fragment Offset value.
@@ -610,6 +611,50 @@
*/
void SetMoreFlag(void) { mOffsetMore = HostSwap16(HostSwap16(mOffsetMore) | kMoreFlag); }
+ /**
+ * This method returns the frame identification.
+ *
+ * @returns The frame identification.
+ *
+ */
+ uint32_t GetIdentification(void) const { return mIdentification; }
+
+ /**
+ * This method sets the frame identification.
+ *
+ * @param[in] aIdentification The fragment identification value.
+ */
+ void SetIdentification(uint32_t aIdentification) { mIdentification = aIdentification; }
+
+ /**
+ * This method returns the next valid payload length for a fragment.
+ *
+ * @param[in] aLength The payload length to be validated for a fragment.
+ *
+ * @returns Valid IPv6 fragment payload length.
+ *
+ */
+ static inline uint16_t MakeDivisibleByEight(uint16_t aLength) { return aLength & 0xfff8; }
+
+ /**
+ * This method converts the fragment offset of 8-octet units into bytes.
+ *
+ * @param[in] aOffset The fragment offset in 8-octet units.
+ *
+ * @returns The fragment offset in bytes.
+ *
+ */
+ static inline uint16_t FragmentOffsetToBytes(uint16_t aOffset) { return static_cast<uint16_t>(aOffset << 3); }
+
+ /**
+ * This method converts a fragment offset in bytes into a fragment offset in 8-octet units.
+ *
+ * @param[in] aOffset The fragment offset in bytes.
+ *
+ * @returns The fragment offset in 8-octet units.
+ */
+ static inline uint16_t BytesToFragmentOffset(uint16_t aOffset) { return aOffset >> 3; }
+
private:
uint8_t mNextHeader;
uint8_t mReserved;
diff --git a/src/core/net/ip6_mpl.cpp b/src/core/net/ip6_mpl.cpp
index c04e1f5..c1073db 100644
--- a/src/core/net/ip6_mpl.cpp
+++ b/src/core/net/ip6_mpl.cpp
@@ -43,13 +43,13 @@
namespace ot {
namespace Ip6 {
-void MplBufferedMessageMetadata::GenerateNextTransmissionTime(uint32_t aCurrentTime, uint8_t aInterval)
+void MplBufferedMessageMetadata::GenerateNextTransmissionTime(TimeMilli aCurrentTime, uint8_t aInterval)
{
// Emulate Trickle timer behavior and set up the next retransmission within [0,I) range.
- uint8_t t = aInterval == 0 ? aInterval : Random::NonCrypto::GetUint8InRange(0, aInterval);
+ uint8_t t = (aInterval == 0) ? aInterval : Random::NonCrypto::GetUint8InRange(0, aInterval);
// Set transmission time at the beginning of the next interval.
- SetTransmissionTime(aCurrentTime + GetIntervalOffset() + t);
+ SetTransmissionTime(aCurrentTime + static_cast<uint32_t>(GetIntervalOffset() + t));
SetIntervalOffset(aInterval - t);
}
@@ -235,11 +235,9 @@
void Mpl::AddBufferedMessage(Message &aMessage, uint16_t aSeedId, uint8_t aSequence, bool aIsOutbound)
{
- uint32_t now = TimerMilli::GetNow();
otError error = OT_ERROR_NONE;
Message * messageCopy = NULL;
MplBufferedMessageMetadata messageMetadata;
- uint32_t nextTransmissionTime;
uint8_t hopLimit = 0;
#if OPENTHREAD_CONFIG_MPL_DYNAMIC_INTERVAL_ENABLE
@@ -262,27 +260,12 @@
messageMetadata.SetSeedId(aSeedId);
messageMetadata.SetSequence(aSequence);
messageMetadata.SetTransmissionCount(aIsOutbound ? 1 : 0);
- messageMetadata.GenerateNextTransmissionTime(now, interval);
+ messageMetadata.GenerateNextTransmissionTime(TimerMilli::GetNow(), interval);
- // Append the message with MplBufferedMessageMetadata and add it to the queue.
SuccessOrExit(error = messageMetadata.AppendTo(*messageCopy));
mBufferedMessageSet.Enqueue(*messageCopy);
- if (mRetransmissionTimer.IsRunning())
- {
- // If timer is already running, check if it should be restarted with earlier fire time.
- nextTransmissionTime = mRetransmissionTimer.GetFireTime();
-
- if (messageMetadata.IsEarlier(nextTransmissionTime))
- {
- mRetransmissionTimer.Start(messageMetadata.GetTransmissionTime() - now);
- }
- }
- else
- {
- // Otherwise just set the timer.
- mRetransmissionTimer.Start(messageMetadata.GetTransmissionTime() - now);
- }
+ mRetransmissionTimer.FireAtIfEarlier(messageMetadata.GetTransmissionTime());
exit:
@@ -333,26 +316,23 @@
void Mpl::HandleRetransmissionTimer(void)
{
- uint32_t now = TimerMilli::GetNow();
- uint32_t nextDelta = TimerMilli::kForeverDt;
+ TimeMilli now = TimerMilli::GetNow();
+ TimeMilli nextTime = now.GetDistantFuture();
MplBufferedMessageMetadata messageMetadata;
+ Message * message;
+ Message * nextMessage;
- Message *message = mBufferedMessageSet.GetHead();
- Message *nextMessage = NULL;
-
- while (message != NULL)
+ for (message = mBufferedMessageSet.GetHead(); message != NULL; message = nextMessage)
{
nextMessage = message->GetNext();
+
messageMetadata.ReadFrom(*message);
- if (messageMetadata.IsLater(now))
+ if (now < messageMetadata.GetTransmissionTime())
{
- uint32_t diff = TimerMilli::Elapsed(now, messageMetadata.GetTransmissionTime());
-
- // Calculate the next retransmission time and choose the lowest.
- if (diff < nextDelta)
+ if (nextTime > messageMetadata.GetTransmissionTime())
{
- nextDelta = diff;
+ nextTime = messageMetadata.GetTransmissionTime();
}
}
else
@@ -362,8 +342,6 @@
if (messageMetadata.GetTransmissionCount() < GetTimerExpirations())
{
- uint32_t diff;
-
Message *messageCopy = message->Clone(message->GetLength() - sizeof(MplBufferedMessageMetadata));
if (messageCopy != NULL)
@@ -379,12 +357,9 @@
messageMetadata.GenerateNextTransmissionTime(now, kDataMessageInterval);
messageMetadata.UpdateIn(*message);
- diff = TimerMilli::Elapsed(now, messageMetadata.GetTransmissionTime());
-
- // Check if retransmission time is lower than the current lowest one.
- if (diff < nextDelta)
+ if (nextTime > messageMetadata.GetTransmissionTime())
{
- nextDelta = diff;
+ nextTime = messageMetadata.GetTransmissionTime();
}
}
else
@@ -409,13 +384,11 @@
}
}
}
-
- message = nextMessage;
}
- if (nextDelta != TimerMilli::kForeverDt)
+ if (nextTime < now.GetDistantFuture())
{
- mRetransmissionTimer.Start(nextDelta);
+ mRetransmissionTimer.FireAt(nextTime);
}
}
diff --git a/src/core/net/ip6_mpl.hpp b/src/core/net/ip6_mpl.hpp
index 2764df8..adb4b25 100644
--- a/src/core/net/ip6_mpl.hpp
+++ b/src/core/net/ip6_mpl.hpp
@@ -247,7 +247,6 @@
* This class represents metadata required for MPL retransmissions.
*
*/
-OT_TOOL_PACKED_BEGIN
class MplBufferedMessageMetadata
{
public:
@@ -313,26 +312,6 @@
}
/**
- * This method checks if the message shall be sent before the given time.
- *
- * @param[in] aTime A time to compare.
- *
- * @retval TRUE If the message shall be sent before the given time.
- * @retval FALSE Otherwise.
- */
- bool IsEarlier(uint32_t aTime) const { return (static_cast<int32_t>(aTime - mTransmissionTime) > 0); }
-
- /**
- * This method checks if the message shall be sent after the given time.
- *
- * @param[in] aTime A time to compare.
- *
- * @retval TRUE If the message shall be sent after the given time.
- * @retval FALSE Otherwise.
- */
- bool IsLater(uint32_t aTime) const { return (static_cast<int32_t>(aTime - mTransmissionTime) < 0); }
-
- /**
* This method returns the MPL Seed Id value.
*
* @returns The MPL Seed Id value.
@@ -386,7 +365,7 @@
* @returns The transmission timestamp of the message.
*
*/
- uint32_t GetTransmissionTime(void) const { return mTransmissionTime; }
+ TimeMilli GetTransmissionTime(void) const { return mTransmissionTime; }
/**
* This method sets the transmission timestamp of the message.
@@ -394,7 +373,7 @@
* @param[in] aTransmissionTime The transmission timestamp of the message.
*
*/
- void SetTransmissionTime(uint32_t aTransmissionTime) { mTransmissionTime = aTransmissionTime; }
+ void SetTransmissionTime(TimeMilli aTransmissionTime) { mTransmissionTime = aTransmissionTime; }
/**
* This method returns the offset from the transmission time to the end of trickle interval.
@@ -418,15 +397,15 @@
* @param[in] aCurrentTime Current time (in milliseconds).
* @param[in] aInterval The current interval size (in milliseconds).
*/
- void GenerateNextTransmissionTime(uint32_t aCurrentTime, uint8_t aInterval);
+ void GenerateNextTransmissionTime(TimeMilli aCurrentTime, uint8_t aInterval);
private:
- uint16_t mSeedId;
- uint8_t mSequence;
- uint8_t mTransmissionCount;
- uint32_t mTransmissionTime;
- uint8_t mIntervalOffset;
-} OT_TOOL_PACKED_END;
+ uint16_t mSeedId;
+ uint8_t mSequence;
+ uint8_t mTransmissionCount;
+ TimeMilli mTransmissionTime;
+ uint8_t mIntervalOffset;
+};
/**
* This class implements MPL message processing.
diff --git a/src/core/net/netif.cpp b/src/core/net/netif.cpp
index 41d53bf..372b9d0 100644
--- a/src/core/net/netif.cpp
+++ b/src/core/net/netif.cpp
@@ -70,35 +70,33 @@
{{{0xff, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01}}},
&Netif::kRealmLocalAllNodesMulticastAddress};
-// "ff03:02"
+// "ff03::02"
const otNetifMulticastAddress Netif::kRealmLocalAllRoutersMulticastAddress = {
{{{0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02}}},
&Netif::kLinkLocalAllNodesMulticastAddress};
-// "ff02:02"
+// "ff02::02"
const otNetifMulticastAddress Netif::kLinkLocalAllRoutersMulticastAddress = {
{{{0xff, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02}}},
&Netif::kRealmLocalAllRoutersMulticastAddress};
Netif::Netif(Instance &aInstance)
: InstanceLocator(aInstance)
- , mUnicastAddresses(NULL)
- , mMulticastAddresses(NULL)
+ , mUnicastAddresses()
+ , mMulticastAddresses()
, mMulticastPromiscuous(false)
- , mNext(NULL)
, mAddressCallback(NULL)
, mAddressCallbackContext(NULL)
{
- for (size_t i = 0; i < OT_ARRAY_LENGTH(mExtUnicastAddresses); i++)
+ for (NetifUnicastAddress *entry = &mExtUnicastAddresses[0]; entry < OT_ARRAY_END(mExtUnicastAddresses); entry++)
{
- // To mark the address as unused/available, set the `mNext` to point back to itself.
- mExtUnicastAddresses[i].mNext = &mExtUnicastAddresses[i];
+ entry->MarkAsNotInUse();
}
- for (size_t i = 0; i < OT_ARRAY_LENGTH(mExtMulticastAddresses); i++)
+ for (NetifMulticastAddress *entry = &mExtMulticastAddresses[0]; entry < OT_ARRAY_END(mExtMulticastAddresses);
+ entry++)
{
- // To mark the address as unused/available, set the `mNext` to point back to itself.
- mExtMulticastAddresses[i].mNext = &mExtMulticastAddresses[i];
+ entry->MarkAsNotInUse();
}
}
@@ -106,7 +104,7 @@
{
bool rval = false;
- for (NetifMulticastAddress *cur = mMulticastAddresses; cur; cur = cur->GetNext())
+ for (const NetifMulticastAddress *cur = mMulticastAddresses.GetHead(); cur; cur = cur->GetNext())
{
if (cur->GetAddress() == aAddress)
{
@@ -118,146 +116,203 @@
return rval;
}
-void Netif::SubscribeAllNodesMulticast(void)
+otError Netif::SubscribeAllNodesMulticast(void)
{
- assert(mMulticastAddresses == NULL);
+ otError error = OT_ERROR_NONE;
+ NetifMulticastAddress *tail;
+ NetifMulticastAddress &linkLocalAllNodesAddress =
+ static_cast<NetifMulticastAddress &>(const_cast<otNetifMulticastAddress &>(kLinkLocalAllNodesMulticastAddress));
- mMulticastAddresses = static_cast<NetifMulticastAddress *>(
- const_cast<otNetifMulticastAddress *>(&kLinkLocalAllNodesMulticastAddress));
+ VerifyOrExit(!mMulticastAddresses.Contains(linkLocalAllNodesAddress), error = OT_ERROR_ALREADY);
- if (mAddressCallback != NULL)
+ // Append the fixed chain of three multicast addresses to the
+ // tail of the list:
+ //
+ // LinkLocalAll -> RealmLocalAll -> RealmLocalAllMpl.
+
+ tail = mMulticastAddresses.GetTail();
+
+ if (tail == NULL)
{
- for (const otNetifMulticastAddress *entry = &kLinkLocalAllNodesMulticastAddress; entry != NULL;
- entry = entry->mNext)
- {
- mAddressCallback(&entry->mAddress, kMulticastPrefixLength, true, mAddressCallbackContext);
- }
+ mMulticastAddresses.SetHead(&linkLocalAllNodesAddress);
+ }
+ else
+ {
+ tail->SetNext(&linkLocalAllNodesAddress);
}
- Get<Notifier>().Signal(OT_CHANGED_IP6_MULTICAST_SUBSRCRIBED);
+ Get<Notifier>().Signal(OT_CHANGED_IP6_MULTICAST_SUBSCRIBED);
+
+ VerifyOrExit(mAddressCallback != NULL);
+
+ for (const NetifMulticastAddress *entry = &linkLocalAllNodesAddress; entry; entry = entry->GetNext())
+ {
+ mAddressCallback(&entry->GetAddress(), kMulticastPrefixLength, /* IsAdded */ true, mAddressCallbackContext);
+ }
+
+exit:
+ return error;
}
-void Netif::UnsubscribeAllNodesMulticast(void)
+otError Netif::UnsubscribeAllNodesMulticast(void)
{
- assert(mMulticastAddresses == NULL || mMulticastAddresses == &kLinkLocalAllNodesMulticastAddress);
+ otError error = OT_ERROR_NONE;
+ NetifMulticastAddress * prev;
+ const NetifMulticastAddress &linkLocalAllNodesAddress =
+ static_cast<NetifMulticastAddress &>(const_cast<otNetifMulticastAddress &>(kLinkLocalAllNodesMulticastAddress));
- mMulticastAddresses = NULL;
+ // The tail of multicast address linked list contains the
+ // fixed addresses. Search if LinkLocalAll is present
+ // in the list and find entry before it.
+ //
+ // LinkLocalAll -> RealmLocalAll -> RealmLocalAllMpl.
- if (mAddressCallback != NULL)
+ SuccessOrExit(error = mMulticastAddresses.Find(linkLocalAllNodesAddress, prev));
+
+ // This method MUST be called after `UnsubscribeAllRoutersMulticast().
+ // Verify this by checking the chain at the end of the list only
+ // contains three entries and not the five fixed addresses (check that
+ // `prev` entry before `LinkLocalAll` is not `RealmLocalRouters`):
+ //
+ // LinkLocalAllRouters -> RealmLocalAllRouters -> LinkLocalAll
+ // -> RealmLocalAll -> RealmLocalAllMpl.
+
+ assert(prev != static_cast<NetifMulticastAddress *>(
+ const_cast<otNetifMulticastAddress *>(&kRealmLocalAllRoutersMulticastAddress)));
+
+ if (prev == NULL)
{
- for (const otNetifMulticastAddress *entry = &kLinkLocalAllNodesMulticastAddress; entry != NULL;
- entry = entry->mNext)
- {
- mAddressCallback(&entry->mAddress, kMulticastPrefixLength, false, mAddressCallbackContext);
- }
+ mMulticastAddresses.Clear();
+ }
+ else
+ {
+ prev->SetNext(NULL);
}
- Get<Notifier>().Signal(OT_CHANGED_IP6_MULTICAST_UNSUBSRCRIBED);
+ Get<Notifier>().Signal(OT_CHANGED_IP6_MULTICAST_UNSUBSCRIBED);
+
+ VerifyOrExit(mAddressCallback != NULL);
+
+ for (const NetifMulticastAddress *entry = &linkLocalAllNodesAddress; entry; entry = entry->GetNext())
+ {
+ mAddressCallback(&entry->GetAddress(), kMulticastPrefixLength, /* IsAdded */ false, mAddressCallbackContext);
+ }
+
+exit:
+ return error;
}
otError Netif::SubscribeAllRoutersMulticast(void)
{
- otError error = OT_ERROR_NONE;
+ otError error = OT_ERROR_NONE;
+ NetifMulticastAddress *prev;
+ NetifMulticastAddress &linkLocalAllRoutersAddress = static_cast<NetifMulticastAddress &>(
+ const_cast<otNetifMulticastAddress &>(kLinkLocalAllRoutersMulticastAddress));
+ NetifMulticastAddress &linkLocalAllNodesAddress =
+ static_cast<NetifMulticastAddress &>(const_cast<otNetifMulticastAddress &>(kLinkLocalAllNodesMulticastAddress));
+ NetifMulticastAddress &realmLocalAllRoutersAddress = static_cast<NetifMulticastAddress &>(
+ const_cast<otNetifMulticastAddress &>(kRealmLocalAllRoutersMulticastAddress));
- if (mMulticastAddresses == &kLinkLocalAllNodesMulticastAddress)
+ error = mMulticastAddresses.Find(linkLocalAllNodesAddress, prev);
+
+ // This method MUST be called after `SubscribeAllNodesMulticast()`
+ // Ensure that the `LinkLocalAll` was found on the list.
+
+ assert(error == OT_ERROR_NONE);
+
+ // The tail of multicast address linked list contains the
+ // fixed addresses. We either have a chain of five addresses
+ //
+ // LinkLocalAllRouters -> RealmLocalAllRouters ->
+ // LinkLocalAll -> RealmLocalAll -> RealmLocalAllMpl.
+ //
+ // or just the last three addresses
+ //
+ // LinkLocalAll -> RealmLocalAll -> RealmLocalAllMpl.
+ //
+ // If the previous entry behind `LinkLocalAll` is
+ // `RealmLocalAllRouters` then all five addresses are on
+ // the list already.
+
+ VerifyOrExit(prev != &realmLocalAllRoutersAddress, error = OT_ERROR_ALREADY);
+
+ if (prev == NULL)
{
- mMulticastAddresses = static_cast<NetifMulticastAddress *>(
- const_cast<otNetifMulticastAddress *>(&kLinkLocalAllRoutersMulticastAddress));
+ mMulticastAddresses.SetHead(&linkLocalAllRoutersAddress);
}
else
{
- for (NetifMulticastAddress *cur = mMulticastAddresses; cur; cur = cur->GetNext())
- {
- if (cur == &kLinkLocalAllRoutersMulticastAddress)
- {
- ExitNow(error = OT_ERROR_ALREADY);
- }
-
- if (cur->mNext == &kLinkLocalAllNodesMulticastAddress)
- {
- cur->mNext = &kLinkLocalAllRoutersMulticastAddress;
- break;
- }
- }
+ prev->SetNext(&linkLocalAllRoutersAddress);
}
- if (mAddressCallback != NULL)
+ Get<Notifier>().Signal(OT_CHANGED_IP6_MULTICAST_SUBSCRIBED);
+
+ VerifyOrExit(mAddressCallback != NULL);
+
+ for (const NetifMulticastAddress *entry = &linkLocalAllRoutersAddress; entry != &linkLocalAllNodesAddress;
+ entry = entry->GetNext())
{
- for (const otNetifMulticastAddress *entry = &kLinkLocalAllRoutersMulticastAddress;
- entry != &kLinkLocalAllNodesMulticastAddress; entry = entry->mNext)
- {
- mAddressCallback(&entry->mAddress, kMulticastPrefixLength, true, mAddressCallbackContext);
- }
+ mAddressCallback(&entry->GetAddress(), kMulticastPrefixLength, /* IsAdded */ true, mAddressCallbackContext);
}
- Get<Notifier>().Signal(OT_CHANGED_IP6_MULTICAST_SUBSRCRIBED);
-
exit:
return error;
}
otError Netif::UnsubscribeAllRoutersMulticast(void)
{
- otError error = OT_ERROR_NONE;
+ otError error;
+ NetifMulticastAddress *prev;
+ NetifMulticastAddress &linkLocalAllRoutersAddress = static_cast<NetifMulticastAddress &>(
+ const_cast<otNetifMulticastAddress &>(kLinkLocalAllRoutersMulticastAddress));
+ NetifMulticastAddress &linkLocalAllNodesAddress =
+ static_cast<NetifMulticastAddress &>(const_cast<otNetifMulticastAddress &>(kLinkLocalAllNodesMulticastAddress));
- if (mMulticastAddresses == &kLinkLocalAllRoutersMulticastAddress)
+ // The tail of multicast address linked list contains the
+ // fixed addresses. We check for the chain of five addresses:
+ //
+ // LinkLocalAllRouters -> RealmLocalAllRouters ->
+ // LinkLocalAll -> RealmLocalAll -> RealmLocalAllMpl.
+ //
+ // If found, we then replace the entry behind `LinkLocalAllRouters`
+ // to point to `LinkLocalAll` instead (so that tail contains the
+ // three fixed addresses at end of the chain).
+
+ SuccessOrExit(error = mMulticastAddresses.Find(linkLocalAllRoutersAddress, prev));
+
+ if (prev == NULL)
{
- mMulticastAddresses = static_cast<NetifMulticastAddress *>(
- const_cast<otNetifMulticastAddress *>(&kLinkLocalAllNodesMulticastAddress));
- ExitNow();
+ mMulticastAddresses.SetHead(&linkLocalAllNodesAddress);
+ }
+ else
+ {
+ prev->SetNext(&linkLocalAllNodesAddress);
}
- for (NetifMulticastAddress *cur = mMulticastAddresses; cur; cur = cur->GetNext())
- {
- if (cur->mNext == &kLinkLocalAllRoutersMulticastAddress)
- {
- cur->mNext = &kLinkLocalAllNodesMulticastAddress;
- ExitNow();
- }
- }
+ Get<Notifier>().Signal(OT_CHANGED_IP6_MULTICAST_UNSUBSCRIBED);
- error = OT_ERROR_NOT_FOUND;
+ VerifyOrExit(mAddressCallback != NULL);
+
+ for (const NetifMulticastAddress *entry = &linkLocalAllRoutersAddress; entry != &linkLocalAllNodesAddress;
+ entry = entry->GetNext())
+ {
+ mAddressCallback(&entry->GetAddress(), kMulticastPrefixLength, /* IsAdded */ false, mAddressCallbackContext);
+ }
exit:
-
- if (error != OT_ERROR_NOT_FOUND)
- {
- if (mAddressCallback != NULL)
- {
- for (const otNetifMulticastAddress *entry = &kLinkLocalAllRoutersMulticastAddress;
- entry != &kLinkLocalAllNodesMulticastAddress; entry = entry->mNext)
- {
- mAddressCallback(&entry->mAddress, kMulticastPrefixLength, false, mAddressCallbackContext);
- }
- }
-
- Get<Notifier>().Signal(OT_CHANGED_IP6_MULTICAST_UNSUBSRCRIBED);
- }
-
return error;
}
otError Netif::SubscribeMulticast(NetifMulticastAddress &aAddress)
{
- otError error = OT_ERROR_NONE;
+ otError error;
- for (NetifMulticastAddress *cur = mMulticastAddresses; cur; cur = cur->GetNext())
- {
- if (cur == &aAddress)
- {
- ExitNow(error = OT_ERROR_ALREADY);
- }
- }
+ SuccessOrExit(error = mMulticastAddresses.Add(aAddress));
- aAddress.mNext = mMulticastAddresses;
- mMulticastAddresses = &aAddress;
+ Get<Notifier>().Signal(OT_CHANGED_IP6_MULTICAST_SUBSCRIBED);
- if (mAddressCallback != NULL)
- {
- mAddressCallback(&aAddress.mAddress, kMulticastPrefixLength, true, mAddressCallbackContext);
- }
-
- Get<Notifier>().Signal(OT_CHANGED_IP6_MULTICAST_SUBSRCRIBED);
+ VerifyOrExit(mAddressCallback != NULL);
+ mAddressCallback(&aAddress.mAddress, kMulticastPrefixLength, /* IsAdded */ true, mAddressCallbackContext);
exit:
return error;
@@ -265,39 +320,16 @@
otError Netif::UnsubscribeMulticast(const NetifMulticastAddress &aAddress)
{
- otError error = OT_ERROR_NONE;
+ otError error;
- if (mMulticastAddresses == &aAddress)
- {
- mMulticastAddresses = mMulticastAddresses->GetNext();
- ExitNow();
- }
- else if (mMulticastAddresses != NULL)
- {
- for (NetifMulticastAddress *cur = mMulticastAddresses; cur->GetNext(); cur = cur->GetNext())
- {
- if (cur->mNext == &aAddress)
- {
- cur->mNext = aAddress.mNext;
- ExitNow();
- }
- }
- }
+ SuccessOrExit(error = mMulticastAddresses.Remove(aAddress));
- ExitNow(error = OT_ERROR_NOT_FOUND);
+ Get<Notifier>().Signal(OT_CHANGED_IP6_MULTICAST_UNSUBSCRIBED);
+
+ VerifyOrExit(mAddressCallback != NULL);
+ mAddressCallback(&aAddress.mAddress, kMulticastPrefixLength, /* IsAdded */ false, mAddressCallbackContext);
exit:
-
- if (error != OT_ERROR_NOT_FOUND)
- {
- if (mAddressCallback != NULL)
- {
- mAddressCallback(&aAddress.mAddress, kMulticastPrefixLength, false, mAddressCallbackContext);
- }
-
- Get<Notifier>().Signal(OT_CHANGED_IP6_MULTICAST_UNSUBSRCRIBED);
- }
-
return error;
}
@@ -308,13 +340,11 @@
VerifyOrExit(aIterator < num);
- // Find an available entry in the `mExtMulticastAddresses` array.
for (uint8_t i = aIterator; i < num; i++)
{
const NetifMulticastAddress &entry = mExtMulticastAddresses[i];
- // In an unused/available entry, `mNext` points back to the entry itself.
- if (entry.mNext != &entry)
+ if (entry.IsInUse())
{
aAddress = entry.GetAddress();
aIterator = i + 1;
@@ -330,32 +360,32 @@
{
otError error = OT_ERROR_NONE;
NetifMulticastAddress *entry;
- size_t num = OT_ARRAY_LENGTH(mExtMulticastAddresses);
+ NetifMulticastAddress &linkLocalAllRoutersAddress = static_cast<NetifMulticastAddress &>(
+ const_cast<otNetifMulticastAddress &>(kLinkLocalAllRoutersMulticastAddress));
- VerifyOrExit(mMulticastAddresses != NULL, error = OT_ERROR_INVALID_STATE);
+ // Check that the address is not one of the fixed addresses:
+ // LinkLocalAllRouters -> RealmLocalAllRouters -> LinkLocalAllNodes
+ // -> RealmLocalAllNodes -> RealmLocalAllMpl.
- if (IsMulticastSubscribed(aAddress))
+ for (const NetifMulticastAddress *cur = &linkLocalAllRoutersAddress; cur; cur = cur->GetNext())
{
- ExitNow(error = OT_ERROR_ALREADY);
+ VerifyOrExit(cur->GetAddress() != aAddress, error = OT_ERROR_INVALID_ARGS);
}
- // Find an available entry in the `mExtMulticastAddresses` array.
- for (entry = &mExtMulticastAddresses[0]; num > 0; num--, entry++)
+ VerifyOrExit(!IsMulticastSubscribed(aAddress), error = OT_ERROR_ALREADY);
+
+ for (entry = &mExtMulticastAddresses[0]; entry < OT_ARRAY_END(mExtMulticastAddresses); entry++)
{
- // In an unused/available entry, `mNext` points back to the entry itself.
- if (entry->mNext == entry)
+ if (!entry->IsInUse())
{
- break;
+ entry->mAddress = aAddress;
+ mMulticastAddresses.Push(*entry);
+ Get<Notifier>().Signal(OT_CHANGED_IP6_MULTICAST_SUBSCRIBED);
+ ExitNow();
}
}
- VerifyOrExit(num > 0, error = OT_ERROR_NO_BUFS);
-
- // Copy the address into the available entry and add it to linked-list.
- entry->mAddress = aAddress;
- entry->mNext = mMulticastAddresses;
- mMulticastAddresses = entry;
- Get<Notifier>().Signal(OT_CHANGED_IP6_MULTICAST_SUBSRCRIBED);
+ error = OT_ERROR_NO_BUFS;
exit:
return error;
@@ -366,22 +396,21 @@
otError error = OT_ERROR_NONE;
NetifMulticastAddress *entry;
NetifMulticastAddress *last = NULL;
- size_t num = OT_ARRAY_LENGTH(mExtMulticastAddresses);
- for (entry = mMulticastAddresses; entry; entry = entry->GetNext())
+ for (entry = mMulticastAddresses.GetHead(); entry; entry = entry->GetNext())
{
if (entry->GetAddress() == aAddress)
{
- VerifyOrExit((entry >= &mExtMulticastAddresses[0]) && (entry < &mExtMulticastAddresses[num]),
+ VerifyOrExit((entry >= &mExtMulticastAddresses[0]) && (entry < OT_ARRAY_END(mExtMulticastAddresses)),
error = OT_ERROR_INVALID_ARGS);
if (last)
{
- last->mNext = entry->GetNext();
+ mMulticastAddresses.PopAfter(*last);
}
else
{
- mMulticastAddresses = entry->GetNext();
+ mMulticastAddresses.Pop();
}
break;
@@ -392,10 +421,9 @@
VerifyOrExit(entry != NULL, error = OT_ERROR_NOT_FOUND);
- // To mark the address entry as unused/available, set the `mNext` pointer back to the entry itself.
- entry->mNext = entry;
+ entry->MarkAsNotInUse();
- Get<Notifier>().Signal(OT_CHANGED_IP6_MULTICAST_UNSUBSRCRIBED);
+ Get<Notifier>().Signal(OT_CHANGED_IP6_MULTICAST_UNSUBSCRIBED);
exit:
return error;
@@ -403,12 +431,10 @@
void Netif::UnsubscribeAllExternalMulticastAddresses(void)
{
- size_t num = OT_ARRAY_LENGTH(mExtMulticastAddresses);
-
- for (NetifMulticastAddress *entry = &mExtMulticastAddresses[0]; num > 0; num--, entry++)
+ for (NetifMulticastAddress *entry = &mExtMulticastAddresses[0]; entry < OT_ARRAY_END(mExtMulticastAddresses);
+ entry++)
{
- // In unused entries, the `mNext` points back to the entry itself.
- if (entry->mNext != entry)
+ if (entry->IsInUse())
{
UnsubscribeExternalMulticast(entry->GetAddress());
}
@@ -423,65 +449,31 @@
otError Netif::AddUnicastAddress(NetifUnicastAddress &aAddress)
{
- otError error = OT_ERROR_NONE;
+ otError error;
- for (NetifUnicastAddress *cur = mUnicastAddresses; cur; cur = cur->GetNext())
- {
- if (cur == &aAddress)
- {
- ExitNow(error = OT_ERROR_ALREADY);
- }
- }
-
- aAddress.mNext = mUnicastAddresses;
- mUnicastAddresses = &aAddress;
-
- if (mAddressCallback != NULL)
- {
- mAddressCallback(&aAddress.mAddress, aAddress.mPrefixLength, true, mAddressCallbackContext);
- }
+ SuccessOrExit(error = mUnicastAddresses.Add(aAddress));
Get<Notifier>().Signal(aAddress.mRloc ? OT_CHANGED_THREAD_RLOC_ADDED : OT_CHANGED_IP6_ADDRESS_ADDED);
+ VerifyOrExit(mAddressCallback != NULL);
+ mAddressCallback(&aAddress.mAddress, aAddress.mPrefixLength, /* IsAdded */ true, mAddressCallbackContext);
+
exit:
return error;
}
otError Netif::RemoveUnicastAddress(const NetifUnicastAddress &aAddress)
{
- otError error = OT_ERROR_NONE;
+ otError error;
- if (mUnicastAddresses == &aAddress)
- {
- mUnicastAddresses = mUnicastAddresses->GetNext();
- ExitNow();
- }
- else if (mUnicastAddresses != NULL)
- {
- for (NetifUnicastAddress *cur = mUnicastAddresses; cur->GetNext(); cur = cur->GetNext())
- {
- if (cur->mNext == &aAddress)
- {
- cur->mNext = aAddress.mNext;
- ExitNow();
- }
- }
- }
+ SuccessOrExit(error = mUnicastAddresses.Remove(aAddress));
- ExitNow(error = OT_ERROR_NOT_FOUND);
+ Get<Notifier>().Signal(aAddress.mRloc ? OT_CHANGED_THREAD_RLOC_REMOVED : OT_CHANGED_IP6_ADDRESS_REMOVED);
+
+ VerifyOrExit(mAddressCallback != NULL);
+ mAddressCallback(&aAddress.mAddress, aAddress.mPrefixLength, /* IsAdded */ false, mAddressCallbackContext);
exit:
-
- if (error != OT_ERROR_NOT_FOUND)
- {
- if (mAddressCallback != NULL)
- {
- mAddressCallback(&aAddress.mAddress, aAddress.mPrefixLength, false, mAddressCallbackContext);
- }
-
- Get<Notifier>().Signal(aAddress.mRloc ? OT_CHANGED_THREAD_RLOC_REMOVED : OT_CHANGED_IP6_ADDRESS_REMOVED);
- }
-
return error;
}
@@ -489,15 +481,14 @@
{
otError error = OT_ERROR_NONE;
NetifUnicastAddress *entry;
- size_t num = OT_ARRAY_LENGTH(mExtUnicastAddresses);
VerifyOrExit(!aAddress.GetAddress().IsLinkLocal(), error = OT_ERROR_INVALID_ARGS);
- for (entry = mUnicastAddresses; entry; entry = entry->GetNext())
+ for (entry = mUnicastAddresses.GetHead(); entry; entry = entry->GetNext())
{
if (entry->GetAddress() == aAddress.GetAddress())
{
- VerifyOrExit((entry >= &mExtUnicastAddresses[0]) && (entry < &mExtUnicastAddresses[num]),
+ VerifyOrExit((entry >= &mExtUnicastAddresses[0]) && (entry < OT_ARRAY_END(mExtUnicastAddresses)),
error = OT_ERROR_INVALID_ARGS);
entry->mPrefixLength = aAddress.mPrefixLength;
@@ -507,24 +498,18 @@
}
}
- // Find an available entry in the `mExtUnicastAddresses` array.
- for (entry = &mExtUnicastAddresses[0]; num > 0; num--, entry++)
+ for (entry = &mExtUnicastAddresses[0]; entry < OT_ARRAY_END(mExtUnicastAddresses); entry++)
{
- // In an unused/available entry, `mNext` points back to the entry itself.
- if (entry->mNext == entry)
+ if (!entry->IsInUse())
{
- break;
+ *entry = aAddress;
+ mUnicastAddresses.Push(*entry);
+ Get<Notifier>().Signal(OT_CHANGED_IP6_ADDRESS_ADDED);
+ ExitNow();
}
}
- VerifyOrExit(num > 0, error = OT_ERROR_NO_BUFS);
-
- // Copy the new address into the available entry and insert it in linked-list.
- *entry = aAddress;
- entry->mNext = mUnicastAddresses;
- mUnicastAddresses = entry;
-
- Get<Notifier>().Signal(OT_CHANGED_IP6_ADDRESS_ADDED);
+ error = OT_ERROR_NO_BUFS;
exit:
return error;
@@ -535,22 +520,21 @@
otError error = OT_ERROR_NONE;
NetifUnicastAddress *entry;
NetifUnicastAddress *last = NULL;
- size_t num = OT_ARRAY_LENGTH(mExtUnicastAddresses);
- for (entry = mUnicastAddresses; entry; entry = entry->GetNext())
+ for (entry = mUnicastAddresses.GetHead(); entry; entry = entry->GetNext())
{
if (entry->GetAddress() == aAddress)
{
- VerifyOrExit((entry >= &mExtUnicastAddresses[0]) && (entry < &mExtUnicastAddresses[num]),
+ VerifyOrExit((entry >= &mExtUnicastAddresses[0]) && (entry < OT_ARRAY_END(mExtUnicastAddresses)),
error = OT_ERROR_INVALID_ARGS);
if (last)
{
- last->mNext = entry->mNext;
+ mUnicastAddresses.PopAfter(*last);
}
else
{
- mUnicastAddresses = entry->GetNext();
+ mUnicastAddresses.Pop();
}
break;
@@ -561,8 +545,7 @@
VerifyOrExit(entry != NULL, error = OT_ERROR_NOT_FOUND);
- // To mark the address entry as unused/available, set the `mNext` pointer back to the entry itself.
- entry->mNext = entry;
+ entry->MarkAsNotInUse();
Get<Notifier>().Signal(OT_CHANGED_IP6_ADDRESS_REMOVED);
@@ -572,12 +555,9 @@
void Netif::RemoveAllExternalUnicastAddresses(void)
{
- size_t num = OT_ARRAY_LENGTH(mExtUnicastAddresses);
-
- for (NetifUnicastAddress *entry = &mExtUnicastAddresses[0]; num > 0; num--, entry++)
+ for (NetifUnicastAddress *entry = &mExtUnicastAddresses[0]; entry < OT_ARRAY_END(mExtUnicastAddresses); entry++)
{
- // In unused entries, the `mNext` points back to the entry itself.
- if (entry->mNext != entry)
+ if (entry->IsInUse())
{
RemoveExternalUnicastAddress(entry->GetAddress());
}
@@ -588,7 +568,7 @@
{
bool rval = false;
- for (const NetifUnicastAddress *cur = mUnicastAddresses; cur; cur = cur->GetNext())
+ for (const NetifUnicastAddress *cur = mUnicastAddresses.GetHead(); cur; cur = cur->GetNext())
{
if (cur->GetAddress() == aAddress)
{
diff --git a/src/core/net/netif.hpp b/src/core/net/netif.hpp
index f616119..1dd4f8e 100644
--- a/src/core/net/netif.hpp
+++ b/src/core/net/netif.hpp
@@ -36,10 +36,11 @@
#include "openthread-core-config.h"
+#include "common/linked_list.hpp"
#include "common/locator.hpp"
#include "common/message.hpp"
#include "common/tasklet.hpp"
-#include "mac/mac_frame.hpp"
+#include "mac/mac_types.hpp"
#include "net/ip6_address.hpp"
#include "net/socket.hpp"
@@ -59,35 +60,21 @@
*/
/**
- * This class represents an IPv6 Link Address.
- *
- */
-class LinkAddress
-{
-public:
- /**
- * Hardware types.
- *
- */
- enum HardwareType
- {
- kEui64 = 27,
- };
- HardwareType mType; ///< Link address type.
- uint8_t mLength; ///< Length of link address.
- Mac::ExtAddress mExtAddress; ///< Link address.
-};
-
-/**
* This class implements an IPv6 network interface unicast address.
*
*/
-class NetifUnicastAddress : public otNetifAddress
+class NetifUnicastAddress : public otNetifAddress, public LinkedListEntry<NetifUnicastAddress>
{
friend class Netif;
public:
/**
+ * This method clears the object (setting all fields to zero).
+ *
+ */
+ void Clear(void) { memset(this, 0, sizeof(*this)); }
+
+ /**
* This method returns the unicast address.
*
* @returns The unicast address.
@@ -114,33 +101,29 @@
return mScopeOverrideValid ? static_cast<uint8_t>(mScopeOverride) : GetAddress().GetScope();
}
- /**
- * This method returns the next unicast address assigned to the interface.
- *
- * @returns A pointer to the next unicast address.
- *
- */
- const NetifUnicastAddress *GetNext(void) const { return static_cast<const NetifUnicastAddress *>(mNext); }
-
- /**
- * This method returns the next unicast address assigned to the interface.
- *
- * @returns A pointer to the next unicast address.
- *
- */
- NetifUnicastAddress *GetNext(void) { return static_cast<NetifUnicastAddress *>(mNext); }
+private:
+ // In an unused/available entry (i.e., entry not present in a linked
+ // list), the next pointer is set to point back to the entry itself.
+ bool IsInUse(void) const { return GetNext() != this; }
+ void MarkAsNotInUse(void) { SetNext(this); }
};
/**
* This class implements an IPv6 network interface multicast address.
*
*/
-class NetifMulticastAddress : public otNetifMulticastAddress
+class NetifMulticastAddress : public otNetifMulticastAddress, public LinkedListEntry<NetifMulticastAddress>
{
friend class Netif;
public:
/**
+ * This method clears the object (setting all fields to zero).
+ *
+ */
+ void Clear(void) { memset(this, 0, sizeof(*this)); }
+
+ /**
* This method returns the multicast address.
*
* @returns The multicast address.
@@ -174,13 +157,19 @@
{
return static_cast<NetifMulticastAddress *>(const_cast<otNetifMulticastAddress *>(mNext));
}
+
+private:
+ // In an unused/available entry (i.e., entry not present in a linked
+ // list), the next pointer is set to point back to the entry itself.
+ bool IsInUse(void) const { return GetNext() != this; }
+ void MarkAsNotInUse(void) { mNext = this; }
};
/**
* This class implements an IPv6 network interface.
*
*/
-class Netif : public InstanceLocator
+class Netif : public InstanceLocator, public LinkedListEntry<Netif>
{
friend class Ip6;
@@ -194,13 +183,6 @@
Netif(Instance &aInstance);
/**
- * This method returns the next network interface in the list.
- *
- * @returns A pointer to the next network interface.
- */
- Netif *GetNext(void) const { return mNext; }
-
- /**
* This method registers a callback to notify internal IPv6 address changes.
*
* @param[in] aCallback A pointer to a function that is called when an IPv6 address is added or removed.
@@ -215,7 +197,7 @@
* @returns A pointer to the list of unicast addresses.
*
*/
- const NetifUnicastAddress *GetUnicastAddresses(void) const { return mUnicastAddresses; }
+ const NetifUnicastAddress *GetUnicastAddresses(void) const { return mUnicastAddresses.GetHead(); }
/**
* This method adds a unicast address to the network interface.
@@ -292,9 +274,11 @@
bool IsMulticastSubscribed(const Address &aAddress) const;
/**
- * This method subscribes the network interface to the link-local and realm-local all routers address.
+ * This method subscribes the network interface to the link-local and realm-local all routers addresses.
*
- * @retval OT_ERROR_NONE Successfully subscribed to the link-local and realm-local all routers address
+ * @note This method MUST be called after `SubscribeAllNodesMulticast()` or its behavior is undefined.
+ *
+ * @retval OT_ERROR_NONE Successfully subscribed to the link-local and realm-local all routers addresses.
* @retval OT_ERROR_ALREADY The multicast addresses are already subscribed.
*
*/
@@ -315,7 +299,7 @@
* @returns A pointer to the list of multicast addresses.
*
*/
- const NetifMulticastAddress *GetMulticastAddresses(void) const { return mMulticastAddresses; }
+ const NetifMulticastAddress *GetMulticastAddresses(void) const { return mMulticastAddresses.GetHead(); }
/**
* This method subscribes the network interface to a multicast address.
@@ -361,7 +345,6 @@
* @retval OT_ERROR_NONE Successfully subscribed to @p aAddress.
* @retval OT_ERROR_ALREADY The multicast address is already subscribed.
* @retval OT_ERROR_INVALID_ARGS The address indicated by @p aAddress is an internal multicast address.
- * @retval OT_ERROR_INVALID_STATE The Network Interface is not up.
* @retval OT_ERROR_NO_BUFS The maximum number of allowed external multicast addresses are already added.
*
*/
@@ -403,18 +386,26 @@
protected:
/**
- * This method subscribes the network interface to the realm-local all MPL forwarders, link-local and
- * realm-local all nodes address.
+ * This method subscribes the network interface to the realm-local all MPL forwarders, link-local, and realm-local
+ * all nodes address.
+ *
+ * @retval OT_ERROR_NONE Successfully subscribed to all addresses.
+ * @retval OT_ERROR_ALREADY The multicast addresses are already subscribed.
*
*/
- void SubscribeAllNodesMulticast(void);
+ otError SubscribeAllNodesMulticast(void);
/**
* This method unsubscribes the network interface from the realm-local all MPL forwarders, link-local and
* realm-local all nodes address.
*
+ * @note This method MUST be called after `UnsubscribeAllRoutersMulticast()` or its behavior is undefined
+ *
+ * @retval OT_ERROR_NONE Successfully unsubscribed from all addresses.
+ * @retval OT_ERROR_NOT_FOUND The multicast addresses were not found.
+ *
*/
- void UnsubscribeAllNodesMulticast(void);
+ otError UnsubscribeAllNodesMulticast(void);
private:
enum
@@ -422,10 +413,9 @@
kMulticastPrefixLength = 128, ///< Multicast prefix length used to notify internal address changes.
};
- NetifUnicastAddress * mUnicastAddresses;
- NetifMulticastAddress *mMulticastAddresses;
- bool mMulticastPromiscuous;
- Netif * mNext;
+ LinkedList<NetifUnicastAddress> mUnicastAddresses;
+ LinkedList<NetifMulticastAddress> mMulticastAddresses;
+ bool mMulticastPromiscuous;
otIp6AddressCallback mAddressCallback;
void * mAddressCallbackContext;
diff --git a/src/core/net/sntp_client.cpp b/src/core/net/sntp_client.cpp
index 4c9a9ba..0376f0b 100644
--- a/src/core/net/sntp_client.cpp
+++ b/src/core/net/sntp_client.cpp
@@ -28,8 +28,6 @@
#include "sntp_client.hpp"
-#include "utils/wrap_string.h"
-
#include "common/code_utils.hpp"
#include "common/debug.hpp"
#include "common/instance.hpp"
@@ -48,6 +46,49 @@
namespace ot {
namespace Sntp {
+Header::Header(void)
+ : mFlags(kNtpVersion << kVersionOffset | kModeClient << kModeOffset)
+ , mStratum(0)
+ , mPoll(0)
+ , mPrecision(0)
+ , mRootDelay(0)
+ , mRootDispersion(0)
+ , mReferenceId(0)
+ , mReferenceTimestampSeconds(0)
+ , mReferenceTimestampFraction(0)
+ , mOriginateTimestampSeconds(0)
+ , mOriginateTimestampFraction(0)
+ , mReceiveTimestampSeconds(0)
+ , mReceiveTimestampFraction(0)
+ , mTransmitTimestampSeconds(0)
+ , mTransmitTimestampFraction(0)
+{
+}
+
+QueryMetadata::QueryMetadata(void)
+ : mTransmitTimestamp(0)
+ , mResponseHandler(NULL)
+ , mResponseContext(NULL)
+ , mTransmissionTime(0)
+ , mDestinationPort(0)
+ , mRetransmissionCount(0)
+{
+ mSourceAddress.Clear();
+ mDestinationAddress.Clear();
+}
+
+QueryMetadata::QueryMetadata(otSntpResponseHandler aHandler, void *aContext)
+ : mTransmitTimestamp(0)
+ , mResponseHandler(aHandler)
+ , mResponseContext(aContext)
+ , mTransmissionTime(0)
+ , mDestinationPort(0)
+ , mRetransmissionCount(0)
+{
+ mSourceAddress.Clear();
+ mDestinationAddress.Clear();
+}
+
Client::Client(Ip6::Netif &aNetif)
: mSocket(aNetif.Get<Ip6::Udp>())
, mRetransmissionTimer(aNetif.GetInstance(), &Client::HandleRetransmissionTimer, this)
@@ -98,14 +139,14 @@
VerifyOrExit(aQuery->mMessageInfo != NULL, error = OT_ERROR_INVALID_ARGS);
// Originate timestamp is used only as a unique token.
- header.SetTransmitTimestampSeconds(TimerMilli::GetNow() / 1000 + kTimeAt1970);
+ header.SetTransmitTimestampSeconds(TimerMilli::GetNow().GetValue() / 1000 + kTimeAt1970);
VerifyOrExit((message = NewMessage(header)) != NULL, error = OT_ERROR_NO_BUFS);
messageInfo = static_cast<const Ip6::MessageInfo *>(aQuery->mMessageInfo);
queryMetadata.mTransmitTimestamp = header.GetTransmitTimestampSeconds();
- queryMetadata.mTransmissionTime = TimerMilli::GetNow() + kResponseTimeout;
+ queryMetadata.mTransmissionTime = TimerMilli::GetNow() + static_cast<uint32_t>(kResponseTimeout);
queryMetadata.mSourceAddress = messageInfo->GetSockAddr();
queryMetadata.mDestinationPort = messageInfo->GetPeerPort();
queryMetadata.mDestinationAddress = messageInfo->GetPeerAddr();
@@ -147,9 +188,7 @@
Message *Client::CopyAndEnqueueMessage(const Message &aMessage, const QueryMetadata &aQueryMetadata)
{
otError error = OT_ERROR_NONE;
- uint32_t now = TimerMilli::GetNow();
Message *messageCopy = NULL;
- uint32_t nextTransmissionTime;
// Create a message copy for further retransmissions.
VerifyOrExit((messageCopy = aMessage.Clone()) != NULL, error = OT_ERROR_NO_BUFS);
@@ -158,21 +197,7 @@
SuccessOrExit(error = aQueryMetadata.AppendTo(*messageCopy));
mPendingQueries.Enqueue(*messageCopy);
- // Setup the timer.
- if (mRetransmissionTimer.IsRunning())
- {
- // If timer is already running, check if it should be restarted with earlier fire time.
- nextTransmissionTime = mRetransmissionTimer.GetFireTime();
-
- if (aQueryMetadata.IsEarlier(nextTransmissionTime))
- {
- mRetransmissionTimer.Start(aQueryMetadata.mTransmissionTime - now);
- }
- }
- else
- {
- mRetransmissionTimer.Start(aQueryMetadata.mTransmissionTime - now);
- }
+ mRetransmissionTimer.FireAtIfEarlier(aQueryMetadata.mTransmissionTime);
exit:
@@ -268,45 +293,33 @@
void Client::HandleRetransmissionTimer(void)
{
- uint32_t now = TimerMilli::GetNow();
- uint32_t nextDelta = TimerMilli::kForeverDt;
+ TimeMilli now = TimerMilli::GetNow();
+ TimeMilli nextTime = now.GetDistantFuture();
QueryMetadata queryMetadata;
- Message * message = mPendingQueries.GetHead();
- Message * nextMessage = NULL;
+ Message * message;
+ Message * nextMessage;
Ip6::MessageInfo messageInfo;
- while (message != NULL)
+ for (message = mPendingQueries.GetHead(); message != NULL; message = nextMessage)
{
nextMessage = message->GetNext();
+
queryMetadata.ReadFrom(*message);
- if (queryMetadata.IsLater(now))
+ if (now >= queryMetadata.mTransmissionTime)
{
- uint32_t diff = TimerMilli::Elapsed(now, queryMetadata.mTransmissionTime);
-
- // Calculate the next delay and choose the lowest.
- if (diff < nextDelta)
+ if (queryMetadata.mRetransmissionCount >= kMaxRetransmit)
{
- nextDelta = diff;
+ // No expected response.
+ FinalizeSntpTransaction(*message, queryMetadata, 0, OT_ERROR_RESPONSE_TIMEOUT);
+ continue;
}
- }
- else if (queryMetadata.mRetransmissionCount < kMaxRetransmit)
- {
- uint32_t diff;
// Increment retransmission counter and timer.
queryMetadata.mRetransmissionCount++;
queryMetadata.mTransmissionTime = now + kResponseTimeout;
queryMetadata.UpdateIn(*message);
- diff = TimerMilli::Elapsed(now, queryMetadata.mTransmissionTime);
-
- // Check if retransmission time is lower than current lowest.
- if (diff < nextDelta)
- {
- nextDelta = diff;
- }
-
// Retransmit
messageInfo.SetPeerAddr(queryMetadata.mDestinationAddress);
messageInfo.SetPeerPort(queryMetadata.mDestinationPort);
@@ -314,18 +327,16 @@
SendCopy(*message, messageInfo);
}
- else
- {
- // No expected response.
- FinalizeSntpTransaction(*message, queryMetadata, 0, OT_ERROR_RESPONSE_TIMEOUT);
- }
- message = nextMessage;
+ if (nextTime > queryMetadata.mTransmissionTime)
+ {
+ nextTime = queryMetadata.mTransmissionTime;
+ }
}
- if (nextDelta != TimerMilli::kForeverDt)
+ if (nextTime < now.GetDistantFuture())
{
- mRetransmissionTimer.Start(nextDelta);
+ mRetransmissionTimer.FireAt(nextTime);
}
}
diff --git a/src/core/net/sntp_client.hpp b/src/core/net/sntp_client.hpp
index 7f05ac8..b5ed685 100644
--- a/src/core/net/sntp_client.hpp
+++ b/src/core/net/sntp_client.hpp
@@ -60,13 +60,7 @@
* Default constructor for SNTP Header.
*
*/
- Header(void)
- {
- memset(this, 0, sizeof(*this));
-
- // Set default value of flags field.
- SetFlags(kNtpVersion << kVersionOffset | kModeClient << kModeOffset);
- }
+ Header(void);
/**
* Defines supported SNTP modes.
@@ -421,7 +415,6 @@
* This class implements metadata required for SNTP retransmission.
*
*/
-OT_TOOL_PACKED_BEGIN
class QueryMetadata
{
friend class Client;
@@ -431,7 +424,7 @@
* Default constructor for the object.
*
*/
- QueryMetadata(void) { memset(this, 0, sizeof(*this)); }
+ QueryMetadata(void);
/**
* This constructor initializes the object with specific values.
@@ -440,12 +433,7 @@
* @param[in] aContext Context for the handler function.
*
*/
- QueryMetadata(otSntpResponseHandler aHandler, void *aContext)
- {
- memset(this, 0, sizeof(*this));
- mResponseHandler = aHandler;
- mResponseContext = aContext;
- }
+ QueryMetadata(otSntpResponseHandler aHandler, void *aContext);
/**
* This method appends request data to the message.
@@ -484,36 +472,16 @@
return aMessage.Write(aMessage.GetLength() - sizeof(*this), sizeof(*this), this);
}
- /**
- * This method checks if the message shall be sent before the given time.
- *
- * @param[in] aTime A time to compare.
- *
- * @retval TRUE If the message shall be sent before the given time.
- * @retval FALSE Otherwise.
- */
- bool IsEarlier(uint32_t aTime) const { return (static_cast<int32_t>(aTime - mTransmissionTime) > 0); }
-
- /**
- * This method checks if the message shall be sent after the given time.
- *
- * @param[in] aTime A time to compare.
- *
- * @retval TRUE If the message shall be sent after the given time.
- * @retval FALSE Otherwise.
- */
- bool IsLater(uint32_t aTime) const { return (static_cast<int32_t>(aTime - mTransmissionTime) < 0); }
-
private:
uint32_t mTransmitTimestamp; ///< Time at the client when the request departed for the server.
otSntpResponseHandler mResponseHandler; ///< A function pointer that is called on response reception.
void * mResponseContext; ///< A pointer to arbitrary context information.
- uint32_t mTransmissionTime; ///< Time when the timer should shoot for this message.
+ TimeMilli mTransmissionTime; ///< Time when the timer should shoot for this message.
Ip6::Address mSourceAddress; ///< IPv6 address of the message source.
Ip6::Address mDestinationAddress; ///< IPv6 address of the message destination.
uint16_t mDestinationPort; ///< UDP port of the message destination.
uint8_t mRetransmissionCount; ///< Number of retransmissions.
-} OT_TOOL_PACKED_END;
+};
/**
* This class implements SNTP client.
diff --git a/src/core/net/socket.hpp b/src/core/net/socket.hpp
index 8eee000..bbe0a82 100644
--- a/src/core/net/socket.hpp
+++ b/src/core/net/socket.hpp
@@ -67,6 +67,14 @@
* @returns A reference to the local socket address.
*
*/
+ Address &GetSockAddr(void) { return *static_cast<Address *>(&mSockAddr); }
+
+ /**
+ * This method returns a reference to the local socket address.
+ *
+ * @returns A reference to the local socket address.
+ *
+ */
const Address &GetSockAddr(void) const { return *static_cast<const Address *>(&mSockAddr); }
/**
@@ -175,6 +183,15 @@
bool IsHostInterface(void) const { return mIsHostInterface; }
/**
+ * This method indicates whether or not to apply hop limit 0.
+ *
+ * @retval TRUE if applying hop limit 0 when `mHopLimit` field is 0.
+ * @retval FALSE if applying default `OPENTHREAD_CONFIG_IP6_HOP_LIMIT_DEFAULT` when `mHopLimit` field is 0.
+ *
+ */
+ bool ShouldAllowZeroHopLimit(void) const { return mAllowZeroHopLimit; }
+
+ /**
* This method sets whether the peer is via the host interface.
*
* @param[in] aIsHost TRUE if the peer is via the host interface, FALSE otherwise.
@@ -194,7 +211,13 @@
* This constructor initializes the object.
*
*/
- SockAddr(void) { memset(this, 0, sizeof(*this)); }
+ SockAddr(void) { Clear(); }
+
+ /**
+ * This method clears the object (sets all fields to zero).
+ *
+ */
+ void Clear(void) { memset(this, 0, sizeof(*this)); }
/**
* This method returns a reference to the IPv6 address.
diff --git a/src/core/net/udp6.cpp b/src/core/net/udp6.cpp
index d583f5f..83b949b 100644
--- a/src/core/net/udp6.cpp
+++ b/src/core/net/udp6.cpp
@@ -54,6 +54,7 @@
#if OPENTHREAD_FTD
return aPort == ot::Mle::kUdpPort || aPort == aInstance.Get<MeshCoP::JoinerRouter>().GetJoinerUdpPort();
#else
+ OT_UNUSED_VARIABLE(aInstance);
return aPort == ot::Mle::kUdpPort;
#endif
}
@@ -74,8 +75,8 @@
{
otError error = OT_ERROR_NONE;
- memset(&mSockName, 0, sizeof(mSockName));
- memset(&mPeerName, 0, sizeof(mPeerName));
+ GetSockName().Clear();
+ GetPeerName().Clear();
mHandler = aHandler;
mContext = aContext;
@@ -141,8 +142,8 @@
#endif
Get<Udp>().RemoveSocket(*this);
- memset(&mSockName, 0, sizeof(mSockName));
- memset(&mPeerName, 0, sizeof(mPeerName));
+ GetSockName().Clear();
+ GetPeerName().Clear();
#if OPENTHREAD_CONFIG_PLATFORM_UDP_ENABLE
exit:
@@ -204,8 +205,8 @@
Udp::Udp(Instance &aInstance)
: InstanceLocator(aInstance)
, mEphemeralPort(kDynamicPortMin)
- , mReceivers(NULL)
- , mSockets(NULL)
+ , mReceivers()
+ , mSockets()
#if OPENTHREAD_CONFIG_UDP_FORWARD_ENABLE
, mUdpForwarderContext(NULL)
, mUdpForwarder(NULL)
@@ -215,86 +216,32 @@
otError Udp::AddReceiver(UdpReceiver &aReceiver)
{
- otError error = OT_ERROR_NONE;
-
- for (UdpReceiver *cur = mReceivers; cur; cur = cur->GetNext())
- {
- if (cur == &aReceiver)
- {
- ExitNow(error = OT_ERROR_ALREADY);
- }
- }
-
- aReceiver.SetNext(mReceivers);
- mReceivers = &aReceiver;
-
-exit:
- return error;
+ return mReceivers.Add(aReceiver);
}
otError Udp::RemoveReceiver(UdpReceiver &aReceiver)
{
- otError error = OT_ERROR_NOT_FOUND;
+ otError error;
- if (mReceivers == &aReceiver)
- {
- mReceivers = mReceivers->GetNext();
- aReceiver.SetNext(NULL);
- error = OT_ERROR_NONE;
- }
- else
- {
- for (UdpReceiver *handler = mReceivers; handler; handler = handler->GetNext())
- {
- if (handler->GetNext() == &aReceiver)
- {
- handler->SetNext(aReceiver.GetNext());
- aReceiver.SetNext(NULL);
- error = OT_ERROR_NONE;
- break;
- }
- }
- }
+ SuccessOrExit(error = mReceivers.Remove(aReceiver));
+ aReceiver.SetNext(NULL);
+exit:
return error;
}
void Udp::AddSocket(UdpSocket &aSocket)
{
- for (UdpSocket *cur = mSockets; cur; cur = cur->GetNext())
- {
- if (cur == &aSocket)
- {
- ExitNow();
- }
- }
-
- aSocket.SetNext(mSockets);
- mSockets = &aSocket;
-
-exit:
- return;
+ mSockets.Add(aSocket);
}
void Udp::RemoveSocket(UdpSocket &aSocket)
{
- if (mSockets == &aSocket)
- {
- mSockets = mSockets->GetNext();
- }
- else
- {
- for (UdpSocket *socket = mSockets; socket; socket = socket->GetNext())
- {
- if (socket->GetNext() == &aSocket)
- {
- socket->SetNext(aSocket.GetNext());
- break;
- }
- }
- }
-
+ SuccessOrExit(mSockets.Remove(aSocket));
aSocket.SetNext(NULL);
+
+exit:
+ return;
}
uint16_t Udp::GetEphemeralPort(void)
@@ -318,7 +265,7 @@
return Get<Ip6>().NewMessage(sizeof(UdpHeader) + aReserved, aSettings);
}
-otError Udp::SendDatagram(Message &aMessage, MessageInfo &aMessageInfo, IpProto aIpProto)
+otError Udp::SendDatagram(Message &aMessage, MessageInfo &aMessageInfo, uint8_t aIpProto)
{
otError error = OT_ERROR_NONE;
@@ -381,7 +328,7 @@
VerifyOrExit(IsMle(GetInstance(), aMessageInfo.mSockPort));
#endif
- for (UdpReceiver *receiver = mReceivers; receiver; receiver = receiver->GetNext())
+ for (UdpReceiver *receiver = mReceivers.GetHead(); receiver; receiver = receiver->GetNext())
{
VerifyOrExit(!receiver->HandleMessage(aMessage, aMessageInfo));
}
@@ -395,7 +342,7 @@
void Udp::HandlePayload(Message &aMessage, MessageInfo &aMessageInfo)
{
// find socket
- for (UdpSocket *socket = mSockets; socket; socket = socket->GetNext())
+ for (UdpSocket *socket = mSockets.GetHead(); socket; socket = socket->GetNext())
{
if (socket->GetSockName().mPort != aMessageInfo.GetSockPort())
{
diff --git a/src/core/net/udp6.hpp b/src/core/net/udp6.hpp
index 51402bf..645a42b 100644
--- a/src/core/net/udp6.hpp
+++ b/src/core/net/udp6.hpp
@@ -38,6 +38,7 @@
#include <openthread/udp.h>
+#include "common/linked_list.hpp"
#include "common/locator.hpp"
#include "net/ip6_headers.hpp"
@@ -60,7 +61,7 @@
* This class implements a UDP receiver.
*
*/
-class UdpReceiver : public otUdpReceiver
+class UdpReceiver : public otUdpReceiver, public LinkedListEntry<UdpReceiver>
{
friend class Udp;
@@ -80,9 +81,6 @@
}
private:
- UdpReceiver *GetNext(void) { return static_cast<UdpReceiver *>(mNext); }
- void SetNext(UdpReceiver *aReceiver) { mNext = static_cast<otUdpReceiver *>(aReceiver); }
-
bool HandleMessage(Message &aMessage, const MessageInfo &aMessageInfo)
{
return mHandler(mContext, &aMessage, &aMessageInfo);
@@ -93,7 +91,7 @@
* This class implements a UDP/IPv6 socket.
*
*/
-class UdpSocket : public otUdpSocket, public InstanceLocator
+class UdpSocket : public otUdpSocket, public InstanceLocator, public LinkedListEntry<UdpSocket>
{
friend class Udp;
@@ -202,9 +200,6 @@
SockAddr &GetPeerName(void) { return *static_cast<SockAddr *>(&mPeerName); }
private:
- UdpSocket *GetNext(void) { return static_cast<UdpSocket *>(mNext); }
- void SetNext(UdpSocket *socket) { mNext = static_cast<otUdpSocket *>(socket); }
-
void HandleUdpReceive(Message &aMessage, const MessageInfo &aMessageInfo)
{
mHandler(mContext, &aMessage, &aMessageInfo);
@@ -296,7 +291,7 @@
* @retval OT_ERROR_NO_BUFS Insufficient available buffer to add the IPv6 headers.
*
*/
- otError SendDatagram(Message &aMessage, MessageInfo &aMessageInfo, IpProto aIpProto);
+ otError SendDatagram(Message &aMessage, MessageInfo &aMessageInfo, uint8_t aIpProto);
/**
* This method handles a received UDP message.
@@ -329,7 +324,7 @@
void UpdateChecksum(Message &aMessage, uint16_t aChecksum);
#if OPENTHREAD_CONFIG_PLATFORM_UDP_ENABLE
- otUdpSocket *GetUdpSockets(void) { return mSockets; }
+ otUdpSocket *GetUdpSockets(void) { return mSockets.GetHead(); }
#endif
#if OPENTHREAD_CONFIG_UDP_FORWARD_ENABLE
@@ -354,9 +349,9 @@
kDynamicPortMax = 65535, ///< Service Name and Transport Protocol Port Number Registry
};
- uint16_t mEphemeralPort;
- UdpReceiver *mReceivers;
- UdpSocket * mSockets;
+ uint16_t mEphemeralPort;
+ LinkedList<UdpReceiver> mReceivers;
+ LinkedList<UdpSocket> mSockets;
#if OPENTHREAD_CONFIG_UDP_FORWARD_ENABLE
void * mUdpForwarderContext;
otUdpForwarder mUdpForwarder;
diff --git a/src/core/openthread-core-config.h b/src/core/openthread-core-config.h
index e670a79..2847187 100644
--- a/src/core/openthread-core-config.h
+++ b/src/core/openthread-core-config.h
@@ -42,6 +42,8 @@
#include OPENTHREAD_PROJECT_CORE_CONFIG_FILE
#endif
+#define OPENTHREAD_THREAD_VERSION (2)
+
#include "config/openthread-core-default-config.h"
#include "config/announce_sender.h"
@@ -71,6 +73,8 @@
#if OPENTHREAD_CONFIG_COAP_SECURE_API_ENABLE || OPENTHREAD_CONFIG_BORDER_AGENT_ENABLE || \
OPENTHREAD_CONFIG_COMMISSIONER_ENABLE || OPENTHREAD_CONFIG_JOINER_ENABLE
#define OPENTHREAD_CONFIG_DTLS_ENABLE 1
+#else
+#define OPENTHREAD_CONFIG_DTLS_ENABLE 0
#endif
#undef OPENTHREAD_CORE_CONFIG_H_IN
diff --git a/src/core/radio/radio.hpp b/src/core/radio/radio.hpp
index cad96ae..0b55167 100644
--- a/src/core/radio/radio.hpp
+++ b/src/core/radio/radio.hpp
@@ -147,22 +147,6 @@
*/
void HandleEnergyScanDone(int8_t aMaxRssi);
-#if OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
- /**
- * This callback method handles a "Frame Updated" event from radio platform.
- *
- * This is called to notify OpenThread to process transmit security for the frame, this happens when the frame
- * includes Header IE(s) that were updated before transmission. It is called from `otPlatRadioFrameUpdated()`.
- *
- * @note This method can be called from interrupt context and it would only read/write data passed in
- * via @p aFrame, but would not read/write any state within OpenThread.
- *
- * @param[in] aFrame The frame which needs to process transmit security.
- *
- */
- void HandleFrameUpdated(Mac::TxFrame &aFrame);
-#endif
-
#if OPENTHREAD_CONFIG_DIAG_ENABLE
/**
* This callback method handles a "Receive Done" event from radio platform when diagnostics mode is enabled.
@@ -289,6 +273,34 @@
otError SetTransmitPower(int8_t aPower) { return otPlatRadioSetTransmitPower(GetInstance(), aPower); }
/**
+ * This method gets the radio's CCA ED threshold in dBm.
+ *
+ * @param[in] aThreshold The CCA ED threshold in dBm.
+ *
+ * @retval OT_ERROR_NONE A reference to output the CCA ED threshold in dBm.
+ * @retval OT_ERROR_NOT_IMPLEMENTED CCA ED threshold configuration via dBm is not implemented.
+ *
+ */
+ otError GetCcaEnergyDetectThreshold(int8_t &aThreshold)
+ {
+ return otPlatRadioGetCcaEnergyDetectThreshold(GetInstance(), &aThreshold);
+ }
+
+ /**
+ * This method sets the radio's CCA ED threshold in dBm.
+ *
+ * @param[in] aThreshold The CCA ED threshold in dBm.
+ *
+ * @retval OT_ERROR_NONE Successfully set the CCA ED threshold.
+ * @retval OT_ERROR_NOT_IMPLEMENTED CCA ED threshold configuration via dBm is not implemented.
+ *
+ */
+ otError SetCcaEnergyDetectThreshold(int8_t aThreshold)
+ {
+ return otPlatRadioSetCcaEnergyDetectThreshold(GetInstance(), aThreshold);
+ }
+
+ /**
* This method gets the status of promiscuous mode.
*
* @retval TRUE Promiscuous mode is enabled.
@@ -306,6 +318,18 @@
void SetPromiscuous(bool aEnable) { otPlatRadioSetPromiscuous(GetInstance(), aEnable); }
/**
+ * This method returns the current state of the radio.
+ *
+ * This function is not required by OpenThread. It may be used for debugging and/or application-specific purposes.
+ *
+ * @note This function may be not implemented. In this case it always returns OT_RADIO_STATE_INVALID state.
+ *
+ * @return Current state of the radio.
+ *
+ */
+ otRadioState GetState(void) { return otPlatRadioGetState(GetInstance()); }
+
+ /**
* This method enables the radio.
*
* @retval OT_ERROR_NONE Successfully enabled.
diff --git a/src/core/radio/radio_callbacks.cpp b/src/core/radio/radio_callbacks.cpp
index 9352be4..c037061 100644
--- a/src/core/radio/radio_callbacks.cpp
+++ b/src/core/radio/radio_callbacks.cpp
@@ -58,13 +58,6 @@
Get<Mac::SubMac>().HandleEnergyScanDone(aMaxRssi);
}
-#if OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
-void Radio::Callbacks::HandleFrameUpdated(Mac::TxFrame &aFrame)
-{
- Get<Mac::SubMac>().HandleFrameUpdated(aFrame);
-}
-#endif
-
#if OPENTHREAD_CONFIG_DIAG_ENABLE
void Radio::Callbacks::HandleDiagsReceiveDone(Mac::RxFrame *aFrame, otError aError)
{
diff --git a/src/core/radio/radio_platform.cpp b/src/core/radio/radio_platform.cpp
index 9d978ec..014ece1 100644
--- a/src/core/radio/radio_platform.cpp
+++ b/src/core/radio/radio_platform.cpp
@@ -81,18 +81,6 @@
}
}
-#if OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
-extern "C" void otPlatRadioFrameUpdated(otInstance *aInstance, otRadioFrame *aFrame)
-{
- Instance *instance = static_cast<Instance *>(aInstance);
-
- if (instance->IsInitialized())
- {
- instance->Get<Radio::Callbacks>().HandleFrameUpdated(*static_cast<Mac::TxFrame *>(aFrame));
- }
-}
-#endif
-
#if OPENTHREAD_CONFIG_DIAG_ENABLE
extern "C" void otPlatDiagRadioReceiveDone(otInstance *aInstance, otRadioFrame *aFrame, otError aError)
{
@@ -129,3 +117,10 @@
OT_UNUSED_VARIABLE(aInstance);
return otGetVersionString();
}
+
+OT_TOOL_WEAK otRadioState otPlatRadioGetState(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+
+ return OT_RADIO_STATE_INVALID;
+}
diff --git a/src/core/thread/address_resolver.cpp b/src/core/thread/address_resolver.cpp
index fc8c917..11e2adc 100644
--- a/src/core/thread/address_resolver.cpp
+++ b/src/core/thread/address_resolver.cpp
@@ -42,7 +42,7 @@
#include "common/instance.hpp"
#include "common/locator-getters.hpp"
#include "common/logging.hpp"
-#include "mac/mac_frame.hpp"
+#include "mac/mac_types.hpp"
#include "thread/mesh_forwarder.hpp"
#include "thread/mle_router.hpp"
#include "thread/thread_netif.hpp"
@@ -84,7 +84,7 @@
otError error = OT_ERROR_NONE;
VerifyOrExit(aIndex < kCacheEntries, error = OT_ERROR_INVALID_ARGS);
- memcpy(&aEntry.mTarget, &mCache[aIndex].mTarget, sizeof(aEntry.mTarget));
+ aEntry.mTarget = mCache[aIndex].mTarget;
aEntry.mRloc16 = mCache[aIndex].mRloc16;
aEntry.mAge = mCache[aIndex].mAge;
aEntry.mValid = mCache[aIndex].mState == Cache::kStateCached;
@@ -97,7 +97,7 @@
{
for (int i = 0; i < kCacheEntries; i++)
{
- if (Mle::Mle::GetRouterId(mCache[i].mRloc16) == aRouterId)
+ if (Mle::Mle::RouterIdFromRloc16(mCache[i].mRloc16) == aRouterId)
{
InvalidateCacheEntry(mCache[i], kReasonRemovingRouterId);
}
@@ -115,6 +115,20 @@
}
}
+void AddressResolver::Remove(const Ip6::Address &aEid)
+{
+ for (int i = 0; i < kCacheEntries; i++)
+ {
+ if (mCache[i].mState == Cache::kStateInvalid || mCache[i].mTarget != aEid)
+ {
+ continue;
+ }
+
+ InvalidateCacheEntry(mCache[i], kReasonRemovingEid);
+ break;
+ }
+}
+
AddressResolver::Cache *AddressResolver::NewCacheEntry(void)
{
Cache *rval = NULL;
@@ -153,7 +167,7 @@
aEntry.mAge = 0;
}
-const char *AddressResolver::ConvertInvalidationReasonToString(InvalidationReason aReason)
+const char *AddressResolver::InvalidationReasonToString(InvalidationReason aReason)
{
const char *str = "";
@@ -174,6 +188,10 @@
case kReasonEvictingForNewEntry:
str = "evicting for new entry";
break;
+
+ case kReasonRemovingEid:
+ str = "removing eid";
+ break;
}
return str;
@@ -195,13 +213,13 @@
{
case Cache::kStateCached:
otLogNoteArp("Cache entry removed: %s, 0x%04x - %s", aEntry.mTarget.ToString().AsCString(), aEntry.mRloc16,
- ConvertInvalidationReasonToString(aReason));
+ InvalidationReasonToString(aReason));
break;
case Cache::kStateQuery:
otLogNoteArp("Cache entry (query mode) removed: %s, timeout:%d, retry:%d - %s",
aEntry.mTarget.ToString().AsCString(), aEntry.mTimeout, aEntry.mRetryTimeout,
- ConvertInvalidationReasonToString(aReason));
+ InvalidationReasonToString(aReason));
break;
default:
@@ -212,8 +230,10 @@
aEntry.mState = Cache::kStateInvalid;
}
-void AddressResolver::UpdateCacheEntry(const Ip6::Address &aEid, Mac::ShortAddress aRloc16)
+otError AddressResolver::UpdateCacheEntry(const Ip6::Address &aEid, Mac::ShortAddress aRloc16)
{
+ otError error = OT_ERROR_NOT_FOUND;
+
for (int i = 0; i < kCacheEntries; i++)
{
if (mCache[i].mState == Cache::kStateInvalid || mCache[i].mTarget != aEid)
@@ -240,11 +260,48 @@
otLogNoteArp("Cache entry updated (snoop): %s, 0x%04x", aEid.ToString().AsCString(), aRloc16);
}
- ExitNow();
+ error = OT_ERROR_NONE;
}
+ return error;
+}
+
+otError AddressResolver::AddCacheEntry(const Ip6::Address &aEid, Mac::ShortAddress aRloc16)
+{
+ otError error = OT_ERROR_NONE;
+ Cache * entry = NewCacheEntry();
+
+ VerifyOrExit(entry != NULL, error = OT_ERROR_NO_BUFS);
+
+ entry->mTarget = aEid;
+ entry->mRloc16 = aRloc16;
+ entry->mTimeout = 0;
+ entry->mFailures = 0;
+ entry->mState = Cache::kStateCached;
+
+ MarkCacheEntryAsUsed(*entry);
+
exit:
- return;
+ return error;
+}
+
+void AddressResolver::RestartAddressQueries(void)
+{
+ for (int i = 0; i < kCacheEntries; i++)
+ {
+ Cache &entry = mCache[i];
+
+ if (entry.mState != Cache::kStateQuery)
+ {
+ continue;
+ }
+
+ SendAddressQuery(entry.mTarget);
+
+ entry.mTimeout = kAddressQueryTimeout;
+ entry.mFailures = 0;
+ entry.mRetryTimeout = kAddressQueryInitialRetryDelay;
+ }
}
otError AddressResolver::Resolve(const Ip6::Address &aEid, uint16_t &aRloc16)
@@ -327,7 +384,7 @@
targetTlv.Init();
targetTlv.SetTarget(aEid);
- SuccessOrExit(error = message->AppendTlv(targetTlv));
+ SuccessOrExit(error = targetTlv.AppendTo(*message));
messageInfo.GetPeerAddr().mFields.m16[0] = HostSwap16(0xff03);
messageInfo.GetPeerAddr().mFields.m16[7] = HostSwap16(0x0002);
@@ -463,8 +520,8 @@
SuccessOrExit(error = message->AppendUriPathOptions(OT_URI_PATH_ADDRESS_ERROR));
SuccessOrExit(error = message->SetPayloadMarker());
- SuccessOrExit(error = message->AppendTlv(aTarget));
- SuccessOrExit(error = message->AppendTlv(aEid));
+ SuccessOrExit(error = aTarget.AppendTo(*message));
+ SuccessOrExit(error = aEid.AppendTo(*message));
if (aDestination == NULL)
{
@@ -473,7 +530,7 @@
}
else
{
- memcpy(&messageInfo.GetPeerAddr(), aDestination, sizeof(messageInfo.GetPeerAddr()));
+ messageInfo.SetPeerAddr(*aDestination);
}
messageInfo.SetSockAddr(Get<Mle::MleRouter>().GetMeshLocal16());
@@ -540,10 +597,10 @@
}
}
- memcpy(&macAddr, mlIidTlv.GetIid(), sizeof(macAddr));
- macAddr.m8[0] ^= 0x2;
+ macAddr.Set(mlIidTlv.GetIid());
+ macAddr.ToggleLocal();
- for (ChildTable::Iterator iter(GetInstance(), ChildTable::kInStateValid); !iter.IsDone(); iter++)
+ for (ChildTable::Iterator iter(GetInstance(), Child::kInStateValid); !iter.IsDone(); iter++)
{
Child &child = *iter.GetChild();
@@ -559,7 +616,7 @@
if (child.RemoveIp6Address(GetInstance(), targetTlv.GetTarget()) == OT_ERROR_NONE)
{
- memset(&destination, 0, sizeof(destination));
+ destination.Clear();
destination.mFields.m16[0] = HostSwap16(0xfe80);
destination.SetIid(child.GetExtAddress());
@@ -609,7 +666,7 @@
ExitNow();
}
- for (ChildTable::Iterator iter(GetInstance(), ChildTable::kInStateValid); !iter.IsDone(); iter++)
+ for (ChildTable::Iterator iter(GetInstance(), Child::kInStateValid); !iter.IsDone(); iter++)
{
Child &child = *iter.GetChild();
@@ -621,7 +678,7 @@
if (child.HasIp6Address(GetInstance(), targetTlv.GetTarget()))
{
mlIidTlv.SetIid(child.GetExtAddress());
- lastTransactionTimeTlv.SetTime(TimerMilli::Elapsed(child.GetLastHeard()));
+ lastTransactionTimeTlv.SetTime(TimerMilli::GetNow() - child.GetLastHeard());
SendAddressQueryResponse(targetTlv, mlIidTlv, &lastTransactionTimeTlv, aMessageInfo.GetPeerAddr());
ExitNow();
}
@@ -647,16 +704,16 @@
SuccessOrExit(error = message->AppendUriPathOptions(OT_URI_PATH_ADDRESS_NOTIFY));
SuccessOrExit(error = message->SetPayloadMarker());
- SuccessOrExit(error = message->AppendTlv(aTargetTlv));
- SuccessOrExit(error = message->AppendTlv(aMlEidTlv));
+ SuccessOrExit(error = aTargetTlv.AppendTo(*message));
+ SuccessOrExit(error = aMlEidTlv.AppendTo(*message));
rloc16Tlv.Init();
rloc16Tlv.SetRloc16(Get<Mle::MleRouter>().GetRloc16());
- SuccessOrExit(error = message->AppendTlv(rloc16Tlv));
+ SuccessOrExit(error = rloc16Tlv.AppendTo(*message));
if (aLastTransactionTimeTlv != NULL)
{
- SuccessOrExit(error = message->AppendTlv(*aLastTransactionTimeTlv));
+ SuccessOrExit(error = aLastTransactionTimeTlv->AppendTo(*message));
}
messageInfo.SetPeerAddr(aDestination);
diff --git a/src/core/thread/address_resolver.hpp b/src/core/thread/address_resolver.hpp
index dc83a01..0c3b5bf 100644
--- a/src/core/thread/address_resolver.hpp
+++ b/src/core/thread/address_resolver.hpp
@@ -103,13 +103,36 @@
void Remove(uint8_t aRouterId);
/**
- * This method updates an existing cache entry for the EID, if one exists.
+ * This method removes the cache entry for the EID.
*
- * @param[in] aEid A reference to the EID.
- * @param[in] aRloc16 The RLOC16 corresponding to @p aEid.
+ * @param[in] aEid A reference to the EID.
*
*/
- void UpdateCacheEntry(const Ip6::Address &aEid, Mac::ShortAddress aRloc16);
+ void Remove(const Ip6::Address &aEid);
+
+ /**
+ * This method updates an existing cache entry for the EID.
+ *
+ * @param[in] aEid A reference to the EID.
+ * @param[in] aRloc16 The RLOC16 corresponding to @p aEid.
+ *
+ * @retval OT_ERROR_NONE Successfully updates an existing cache entry.
+ * @retval OT_ERROR_NOT_FOUND No cache entry with @p aEid.
+ *
+ */
+ otError UpdateCacheEntry(const Ip6::Address &aEid, Mac::ShortAddress aRloc16);
+
+ /**
+ * This method adds one cache entry for the EID.
+ *
+ * @param[in] aEid A reference to the EID.
+ * @param[in] aRloc16 The RLOC16 corresponding to @p aEid.
+ *
+ * @retval OT_ERROR_NONE Successfully adds one cache entry.
+ * @retval OT_ERROR_NO_BUFS Insufficient buffer space available to add one cache entry.
+ *
+ */
+ otError AddCacheEntry(const Ip6::Address &aEid, Mac::ShortAddress aRloc16);
/**
* This method returns the RLOC16 for a given EID, or initiates an Address Query if the mapping is not known.
@@ -125,6 +148,14 @@
*/
otError Resolve(const Ip6::Address &aEid, Mac::ShortAddress &aRloc16);
+ /**
+ * This method restarts any ongoing address queries.
+ *
+ * Any existing address queries will be restarted as if they are being sent for the first time.
+ *
+ */
+ void RestartAddressQueries(void);
+
private:
enum
{
@@ -174,9 +205,10 @@
kReasonRemovingRloc16,
kReasonReceivedIcmpDstUnreachNoRoute,
kReasonEvictingForNewEntry,
+ kReasonRemovingEid,
};
- static const char *ConvertInvalidationReasonToString(InvalidationReason aReason);
+ static const char *InvalidationReasonToString(InvalidationReason aReason);
Cache *NewCacheEntry(void);
void MarkCacheEntryAsUsed(Cache &aEntry);
diff --git a/src/core/thread/announce_sender.cpp b/src/core/thread/announce_sender.cpp
index 4e5a27a..86837bd 100644
--- a/src/core/thread/announce_sender.cpp
+++ b/src/core/thread/announce_sender.cpp
@@ -134,13 +134,13 @@
{
case OT_DEVICE_ROLE_ROUTER:
case OT_DEVICE_ROLE_LEADER:
- period = kRouterTxInterval;
+ interval = kRouterTxInterval;
break;
case OT_DEVICE_ROLE_CHILD:
- if (mle.IsRouterRoleEnabled() && mle.IsRxOnWhenIdle())
+ if (mle.IsRouterEligible() && mle.IsRxOnWhenIdle())
{
- period = kReedTxInterval;
+ interval = kReedTxInterval;
break;
}
diff --git a/src/core/thread/child_table.cpp b/src/core/thread/child_table.cpp
index 5f4639b..e15281b 100644
--- a/src/core/thread/child_table.cpp
+++ b/src/core/thread/child_table.cpp
@@ -41,7 +41,7 @@
#if OPENTHREAD_FTD
-ChildTable::Iterator::Iterator(Instance &aInstance, StateFilter aFilter)
+ChildTable::Iterator::Iterator(Instance &aInstance, Child::StateFilter aFilter)
: InstanceLocator(aInstance)
, mFilter(aFilter)
, mStart(NULL)
@@ -50,7 +50,7 @@
Reset();
}
-ChildTable::Iterator::Iterator(Instance &aInstance, StateFilter aFilter, Child *aStartingChild)
+ChildTable::Iterator::Iterator(Instance &aInstance, Child::StateFilter aFilter, Child *aStartingChild)
: InstanceLocator(aInstance)
, mFilter(aFilter)
, mStart(aStartingChild)
@@ -68,7 +68,7 @@
mChild = mStart;
- if (!MatchesFilter(*mChild, mFilter))
+ if (!mChild->MatchesFilter(mFilter))
{
Advance();
}
@@ -92,7 +92,7 @@
}
VerifyOrExit(mChild != mStart, mChild = NULL);
- } while (!MatchesFilter(*mChild, mFilter));
+ } while (!mChild->MatchesFilter(mFilter));
exit:
return;
@@ -102,7 +102,15 @@
: InstanceLocator(aInstance)
, mMaxChildrenAllowed(kMaxChildren)
{
- memset(mChildren, 0, sizeof(mChildren));
+ Clear();
+}
+
+void ChildTable::Clear(void)
+{
+ for (Child *child = &mChildren[0]; child < OT_ARRAY_END(mChildren); child++)
+ {
+ child->Clear();
+ }
}
Child *ChildTable::GetChildAtIndex(uint16_t aChildIndex)
@@ -122,9 +130,9 @@
for (uint16_t num = mMaxChildrenAllowed; num != 0; num--, child++)
{
- if (child->GetState() == Child::kStateInvalid)
+ if (child->IsStateInvalid())
{
- memset(child, 0, sizeof(Child));
+ child->Clear();
ExitNow();
}
}
@@ -135,13 +143,13 @@
return child;
}
-Child *ChildTable::FindChild(uint16_t aRloc16, StateFilter aFilter)
+Child *ChildTable::FindChild(uint16_t aRloc16, Child::StateFilter aFilter)
{
Child *child = mChildren;
for (uint16_t num = mMaxChildrenAllowed; num != 0; num--, child++)
{
- if (MatchesFilter(*child, aFilter) && (child->GetRloc16() == aRloc16))
+ if (child->MatchesFilter(aFilter) && (child->GetRloc16() == aRloc16))
{
ExitNow();
}
@@ -153,13 +161,13 @@
return child;
}
-Child *ChildTable::FindChild(const Mac::ExtAddress &aAddress, StateFilter aFilter)
+Child *ChildTable::FindChild(const Mac::ExtAddress &aAddress, Child::StateFilter aFilter)
{
Child *child = mChildren;
for (uint16_t num = mMaxChildrenAllowed; num != 0; num--, child++)
{
- if (MatchesFilter(*child, aFilter) && (child->GetExtAddress() == aAddress))
+ if (child->MatchesFilter(aFilter) && (child->GetExtAddress() == aAddress))
{
ExitNow();
}
@@ -171,7 +179,7 @@
return child;
}
-Child *ChildTable::FindChild(const Mac::Address &aAddress, StateFilter aFilter)
+Child *ChildTable::FindChild(const Mac::Address &aAddress, Child::StateFilter aFilter)
{
Child *child = NULL;
@@ -192,14 +200,14 @@
return child;
}
-bool ChildTable::HasChildren(StateFilter aFilter) const
+bool ChildTable::HasChildren(Child::StateFilter aFilter) const
{
bool rval = false;
const Child *child = mChildren;
for (uint16_t num = mMaxChildrenAllowed; num != 0; num--, child++)
{
- if (MatchesFilter(*child, aFilter))
+ if (child->MatchesFilter(aFilter))
{
ExitNow(rval = true);
}
@@ -209,14 +217,14 @@
return rval;
}
-uint16_t ChildTable::GetNumChildren(StateFilter aFilter) const
+uint16_t ChildTable::GetNumChildren(Child::StateFilter aFilter) const
{
uint16_t numChildren = 0;
const Child *child = mChildren;
for (uint16_t num = mMaxChildrenAllowed; num != 0; num--, child++)
{
- if (MatchesFilter(*child, aFilter))
+ if (child->MatchesFilter(aFilter))
{
numChildren++;
}
@@ -230,7 +238,7 @@
otError error = OT_ERROR_NONE;
VerifyOrExit(aMaxChildren > 0 && aMaxChildren <= kMaxChildren, error = OT_ERROR_INVALID_ARGS);
- VerifyOrExit(!HasChildren(kInStateAnyExceptInvalid), error = OT_ERROR_INVALID_STATE);
+ VerifyOrExit(!HasChildren(Child::kInStateAnyExceptInvalid), error = OT_ERROR_INVALID_STATE);
mMaxChildrenAllowed = aMaxChildren;
@@ -238,40 +246,6 @@
return error;
}
-bool ChildTable::MatchesFilter(const Child &aChild, StateFilter aFilter)
-{
- bool rval = false;
-
- switch (aFilter)
- {
- case kInStateValid:
- rval = (aChild.GetState() == Child::kStateValid);
- break;
-
- case kInStateValidOrRestoring:
- rval = aChild.IsStateValidOrRestoring();
- break;
-
- case kInStateChildIdRequest:
- rval = (aChild.GetState() == Child::kStateChildIdRequest);
- break;
-
- case kInStateValidOrAttaching:
- rval = aChild.IsStateValidOrAttaching();
- break;
-
- case kInStateAnyExceptInvalid:
- rval = (aChild.GetState() != Child::kStateInvalid);
- break;
-
- case kInStateAnyExceptValidOrRestoring:
- rval = !aChild.IsStateValidOrRestoring();
- break;
- }
-
- return rval;
-}
-
#endif // OPENTHREAD_FTD
} // namespace ot
diff --git a/src/core/thread/child_table.hpp b/src/core/thread/child_table.hpp
index eaf2714..c091979 100644
--- a/src/core/thread/child_table.hpp
+++ b/src/core/thread/child_table.hpp
@@ -51,22 +51,6 @@
{
public:
/**
- * This enumeration defines child state filters used for finding a child or iterating through the child table.
- *
- * Each filter definition accepts a subset of `Child:State` values.
- *
- */
- enum StateFilter
- {
- kInStateValid, ///< Accept child only in `Child::kStateValid`.
- kInStateValidOrRestoring, ///< Accept child with `Child::IsStateValidOrRestoring()` being `true`.
- kInStateChildIdRequest, ///< Accept child only in `Child:kStateChildIdRequest`.
- kInStateValidOrAttaching, ///< Accept child with `Child::IsStateValidOrAttaching()` being `true`.
- kInStateAnyExceptInvalid, ///< Accept child in any state except `Child:kStateInvalid`.
- kInStateAnyExceptValidOrRestoring, ///< Accept child in any state except `Child::IsStateValidOrRestoring()`.
- };
-
- /**
* This class represents an iterator for iterating through the child entries in the child table.
*
*/
@@ -80,7 +64,7 @@
* @param[in] aFilter A child state filter.
*
*/
- Iterator(Instance &aInstance, StateFilter aFilter);
+ Iterator(Instance &aInstance, Child::StateFilter aFilter);
/**
* This constructor initializes an `Iterator` instance to start from a given child.
@@ -96,7 +80,7 @@
* @param[in] aStartingChild A pointer to a child. If non-NULL, the iterator starts from the given entry.
*
*/
- Iterator(Instance &aInstance, StateFilter aFilter, Child *aStartingChild);
+ Iterator(Instance &aInstance, Child::StateFilter aFilter, Child *aStartingChild);
/**
* This method resets the iterator to start over.
@@ -153,9 +137,9 @@
Child *GetChild(void) { return mChild; }
private:
- StateFilter mFilter;
- Child * mStart;
- Child * mChild;
+ Child::StateFilter mFilter;
+ Child * mStart;
+ Child * mChild;
};
/**
@@ -170,7 +154,7 @@
* This method clears the child table.
*
*/
- void Clear(void) { memset(mChildren, 0, sizeof(mChildren)); }
+ void Clear(void);
/**
* This method returns the child table index for a given `Child` instance.
@@ -212,7 +196,7 @@
* @returns A pointer to the `Child` entry if one is found, or `NULL` otherwise.
*
*/
- Child *FindChild(uint16_t aRloc16, StateFilter aFilter);
+ Child *FindChild(uint16_t aRloc16, Child::StateFilter aFilter);
/**
* This method searches the child table for a `Child` with a given extended address also matching a given state
@@ -224,7 +208,7 @@
* @returns A pointer to the `Child` entry if one is found, or `NULL` otherwise.
*
*/
- Child *FindChild(const Mac::ExtAddress &aAddress, StateFilter aFilter);
+ Child *FindChild(const Mac::ExtAddress &aAddress, Child::StateFilter aFilter);
/**
* This method searches the child table for a `Child` with a given address also matching a given state filter.
@@ -235,7 +219,7 @@
* @returns A pointer to the `Child` entry if one is found, or `NULL` otherwise.
*
*/
- Child *FindChild(const Mac::Address &aAddress, StateFilter aFilter);
+ Child *FindChild(const Mac::Address &aAddress, Child::StateFilter aFilter);
/**
* This method indicates whether the child table contains any child matching a given state filter.
@@ -245,7 +229,7 @@
* @returns TRUE if the table contains at least one child table matching the given filter, FALSE otherwise.
*
*/
- bool HasChildren(StateFilter aFilter) const;
+ bool HasChildren(Child::StateFilter aFilter) const;
/**
* This method returns the number of children in the child table matching a given state filter.
@@ -255,7 +239,7 @@
* @returns Number of children matching the given state filer.
*
*/
- uint16_t GetNumChildren(StateFilter aFilter) const;
+ uint16_t GetNumChildren(Child::StateFilter aFilter) const;
/**
* This method returns the maximum number of children that can be supported (build-time constant).
@@ -297,8 +281,6 @@
kMaxChildren = OPENTHREAD_CONFIG_MLE_MAX_CHILDREN,
};
- static bool MatchesFilter(const Child &aChild, StateFilter aFilter);
-
uint16_t mMaxChildrenAllowed;
Child mChildren[kMaxChildren];
};
@@ -310,20 +292,11 @@
class ChildTable : public InstanceLocator
{
public:
- enum StateFilter
- {
- kInStateValid,
- kInStateValidOrRestoring,
- kInStateChildIdRequest,
- kInStateValidOrAttaching,
- kInStateAnyExceptInvalid,
- };
-
class Iterator
{
public:
- Iterator(Instance &, StateFilter) {}
- Iterator(Instance &, StateFilter, Child *) {}
+ Iterator(Instance &, Child::StateFilter) {}
+ Iterator(Instance &, Child::StateFilter, Child *) {}
void Reset(void) {}
bool IsDone(void) const { return true; }
void Advance(void) {}
@@ -343,12 +316,12 @@
Child *GetNewChild(void) { return NULL; }
- Child *FindChild(uint16_t, StateFilter) { return NULL; }
- Child *FindChild(const Mac::ExtAddress &, StateFilter) { return NULL; }
- Child *FindChild(const Mac::Address &, StateFilter) { return NULL; }
+ Child *FindChild(uint16_t, Child::StateFilter) { return NULL; }
+ Child *FindChild(const Mac::ExtAddress &, Child::StateFilter) { return NULL; }
+ Child *FindChild(const Mac::Address &, Child::StateFilter) { return NULL; }
- bool HasChildren(StateFilter) const { return false; }
- uint16_t GetNumChildren(StateFilter) const { return 0; }
+ bool HasChildren(Child::StateFilter) const { return false; }
+ uint16_t GetNumChildren(Child::StateFilter) const { return 0; }
uint16_t GetMaxChildren(void) const { return 0; }
uint16_t GetMaxChildrenAllowed(void) const { return 0; }
otError SetMaxChildrenAllowed(uint16_t) { return OT_ERROR_INVALID_STATE; }
diff --git a/src/core/thread/device_mode.hpp b/src/core/thread/device_mode.hpp
index eb708ac..32507ac 100644
--- a/src/core/thread/device_mode.hpp
+++ b/src/core/thread/device_mode.hpp
@@ -36,10 +36,11 @@
#include "openthread-core-config.h"
+#include <stdint.h>
+
#include <openthread/thread.h>
#include "common/string.hpp"
-#include "utils/wrap_stdint.h"
namespace ot {
namespace Mle {
@@ -220,7 +221,7 @@
* @retval FALSE If the device modes are equal.
*
*/
- bool operator!=(const DeviceMode &aOther) const { return (mMode != aOther.mMode); }
+ bool operator!=(const DeviceMode &aOther) const { return !(*this == aOther); }
/**
* This method converts the device mode into a human-readable string.
diff --git a/src/core/thread/energy_scan_server.cpp b/src/core/thread/energy_scan_server.cpp
index 60bfa98..0f5e44a 100644
--- a/src/core/thread/energy_scan_server.cpp
+++ b/src/core/thread/energy_scan_server.cpp
@@ -123,7 +123,7 @@
{
// grab the lowest channel to scan
uint32_t channelMask = mChannelMaskCurrent & ~(mChannelMaskCurrent - 1);
- Get<Mac::Mac>().EnergyScan(channelMask, mScanDuration, HandleScanResult);
+ Get<Mac::Mac>().EnergyScan(channelMask, mScanDuration, HandleScanResult, this);
}
else
{
@@ -134,12 +134,12 @@
return;
}
-void EnergyScanServer::HandleScanResult(Instance &aInstance, otEnergyScanResult *aResult)
+void EnergyScanServer::HandleScanResult(Mac::EnergyScanResult *aResult, void *aContext)
{
- aInstance.Get<EnergyScanServer>().HandleScanResult(aResult);
+ static_cast<EnergyScanServer *>(aContext)->HandleScanResult(aResult);
}
-void EnergyScanServer::HandleScanResult(otEnergyScanResult *aResult)
+void EnergyScanServer::HandleScanResult(Mac::EnergyScanResult *aResult)
{
VerifyOrExit(mActive);
@@ -187,7 +187,7 @@
channelMask.Init();
channelMask.SetChannelMask(mChannelMask);
- SuccessOrExit(error = message->AppendTlv(channelMask));
+ SuccessOrExit(error = channelMask.AppendTo(*message));
energyList.Init();
energyList.SetLength(mScanResultsLength);
diff --git a/src/core/thread/energy_scan_server.hpp b/src/core/thread/energy_scan_server.hpp
index 0852b5d..c3f7a53 100644
--- a/src/core/thread/energy_scan_server.hpp
+++ b/src/core/thread/energy_scan_server.hpp
@@ -69,8 +69,8 @@
static void HandleRequest(void *aContext, otMessage *aMessage, const otMessageInfo *aMessageInfo);
void HandleRequest(Coap::Message &aMessage, const Ip6::MessageInfo &aMessageInfo);
- static void HandleScanResult(Instance &aInstance, otEnergyScanResult *aResult);
- void HandleScanResult(otEnergyScanResult *aResult);
+ static void HandleScanResult(Mac::EnergyScanResult *aResult, void *aContext);
+ void HandleScanResult(Mac::EnergyScanResult *aResult);
static void HandleTimer(Timer &aTimer);
void HandleTimer(void);
diff --git a/src/core/thread/indirect_sender.cpp b/src/core/thread/indirect_sender.cpp
index 5cdcd76..38428e9 100644
--- a/src/core/thread/indirect_sender.cpp
+++ b/src/core/thread/indirect_sender.cpp
@@ -72,7 +72,7 @@
{
VerifyOrExit(mEnabled);
- for (ChildTable::Iterator iter(GetInstance(), ChildTable::kInStateAnyExceptInvalid); !iter.IsDone(); iter++)
+ for (ChildTable::Iterator iter(GetInstance(), Child::kInStateAnyExceptInvalid); !iter.IsDone(); iter++)
{
iter.GetChild()->SetIndirectMessage(NULL);
mSourceMatchController.ResetMessageCount(*iter.GetChild());
@@ -165,7 +165,7 @@
void IndirectSender::HandleChildModeChange(Child &aChild, Mle::DeviceMode aOldMode)
{
- if (!aChild.IsRxOnWhenIdle() && (aChild.GetState() == Neighbor::kStateValid))
+ if (!aChild.IsRxOnWhenIdle() && (aChild.IsStateValid()))
{
SetChildUseShortAddress(aChild, true);
}
@@ -515,8 +515,11 @@
}
#endif
- aFrame.GetDstAddr(macDest);
- Get<MeshForwarder>().LogMessage(MeshForwarder::kMessageTransmit, *message, &macDest, txError);
+ if (!aFrame.IsEmpty())
+ {
+ aFrame.GetDstAddr(macDest);
+ Get<MeshForwarder>().LogMessage(MeshForwarder::kMessageTransmit, *message, &macDest, txError);
+ }
if (message->GetType() == Message::kTypeIp6)
{
@@ -554,8 +557,7 @@
void IndirectSender::ClearMessagesForRemovedChildren(void)
{
- for (ChildTable::Iterator iter(GetInstance(), ChildTable::kInStateAnyExceptValidOrRestoring); !iter.IsDone();
- iter++)
+ for (ChildTable::Iterator iter(GetInstance(), Child::kInStateAnyExceptValidOrRestoring); !iter.IsDone(); iter++)
{
if (iter.GetChild()->GetIndirectMessageCount() == 0)
{
diff --git a/src/core/thread/indirect_sender_frame_context.hpp b/src/core/thread/indirect_sender_frame_context.hpp
index 0526636..3d61dd7 100644
--- a/src/core/thread/indirect_sender_frame_context.hpp
+++ b/src/core/thread/indirect_sender_frame_context.hpp
@@ -36,7 +36,7 @@
#include "openthread-core-config.h"
-#include "utils/wrap_stdint.h"
+#include <stdint.h>
namespace ot {
diff --git a/src/core/thread/key_manager.cpp b/src/core/thread/key_manager.cpp
index 3367392..f8abc53 100644
--- a/src/core/thread/key_manager.cpp
+++ b/src/core/thread/key_manager.cpp
@@ -44,11 +44,11 @@
namespace ot {
-static const uint8_t kThreadString[] = {
+const uint8_t KeyManager::kThreadString[] = {
'T', 'h', 'r', 'e', 'a', 'd',
};
-static const otMasterKey kDefaultMasterKey = {{
+const otMasterKey KeyManager::kDefaultMasterKey = {{
0x00,
0x11,
0x22,
@@ -69,7 +69,6 @@
KeyManager::KeyManager(Instance &aInstance)
: InstanceLocator(aInstance)
- , mMasterKey(kDefaultMasterKey)
, mKeySequence(0)
, mMacFrameCounter(0)
, mMleFrameCounter(0)
@@ -82,9 +81,10 @@
, mKeyRotationTimer(aInstance, &KeyManager::HandleKeyRotationTimer, this)
, mKekFrameCounter(0)
, mSecurityPolicyFlags(0xff)
- , mIsPSKcSet(false)
+ , mIsPskcSet(false)
{
- memset(&mPSKc, 0, sizeof(mPSKc));
+ mMasterKey = static_cast<const MasterKey &>(kDefaultMasterKey);
+ mPskc.Clear();
ComputeKey(mKeySequence, mKey);
}
@@ -100,39 +100,29 @@
}
#if OPENTHREAD_MTD || OPENTHREAD_FTD
-void KeyManager::SetPSKc(const otPSKc &aPSKc)
+void KeyManager::SetPskc(const Pskc &aPskc)
{
- VerifyOrExit(memcmp(&mPSKc, &aPSKc, sizeof(mPSKc)) != 0, Get<Notifier>().SignalIfFirst(OT_CHANGED_PSKC));
- mPSKc = aPSKc;
- Get<Notifier>().Signal(OT_CHANGED_PSKC);
-
-exit:
- mIsPSKcSet = true;
+ Get<Notifier>().Update(mPskc, aPskc, OT_CHANGED_PSKC);
+ mIsPskcSet = true;
}
#endif // OPENTHREAD_MTD || OPENTHREAD_FTD
-const otMasterKey &KeyManager::GetMasterKey(void) const
-{
- return mMasterKey;
-}
-
-otError KeyManager::SetMasterKey(const otMasterKey &aKey)
+otError KeyManager::SetMasterKey(const MasterKey &aKey)
{
otError error = OT_ERROR_NONE;
- Router *routers;
+ Router *parent;
- VerifyOrExit(memcmp(&mMasterKey, &aKey, sizeof(mMasterKey)) != 0,
- Get<Notifier>().SignalIfFirst(OT_CHANGED_MASTER_KEY));
+ SuccessOrExit(
+ Get<Notifier>().Update(mMasterKey, aKey, OT_CHANGED_MASTER_KEY | OT_CHANGED_THREAD_KEY_SEQUENCE_COUNTER));
- mMasterKey = aKey;
mKeySequence = 0;
ComputeKey(mKeySequence, mKey);
// reset parent frame counters
- routers = Get<Mle::MleRouter>().GetParent();
- routers->SetKeySequence(0);
- routers->SetLinkFrameCounter(0);
- routers->SetMleFrameCounter(0);
+ parent = &Get<Mle::MleRouter>().GetParent();
+ parent->SetKeySequence(0);
+ parent->SetLinkFrameCounter(0);
+ parent->SetMleFrameCounter(0);
// reset router frame counters
for (RouterTable::Iterator iter(GetInstance()); !iter.IsDone(); iter++)
@@ -143,15 +133,13 @@
}
// reset child frame counters
- for (ChildTable::Iterator iter(GetInstance(), ChildTable::kInStateAnyExceptInvalid); !iter.IsDone(); iter++)
+ for (ChildTable::Iterator iter(GetInstance(), Child::kInStateAnyExceptInvalid); !iter.IsDone(); iter++)
{
iter.GetChild()->SetKeySequence(0);
iter.GetChild()->SetLinkFrameCounter(0);
iter.GetChild()->SetMleFrameCounter(0);
}
- Get<Notifier>().Signal(OT_CHANGED_THREAD_KEY_SEQUENCE_COUNTER | OT_CHANGED_MASTER_KEY);
-
exit:
return error;
}
@@ -174,11 +162,16 @@
{
VerifyOrExit(aKeySequence != mKeySequence, Get<Notifier>().SignalIfFirst(OT_CHANGED_THREAD_KEY_SEQUENCE_COUNTER));
- // Check if the guard timer has expired if key rotation is requested.
- if ((aKeySequence == (mKeySequence + 1)) && (mKeySwitchGuardTime != 0) && mKeyRotationTimer.IsRunning() &&
- mKeySwitchGuardEnabled)
+ if ((aKeySequence == (mKeySequence + 1)) && mKeyRotationTimer.IsRunning())
{
- VerifyOrExit(mHoursSinceKeyRotation >= mKeySwitchGuardTime);
+ if (mKeySwitchGuardEnabled)
+ {
+ // Check if the guard timer has expired if key rotation is requested.
+ VerifyOrExit(mHoursSinceKeyRotation >= mKeySwitchGuardTime);
+ StartKeyRotationTimer();
+ }
+
+ mKeySwitchGuardEnabled = true;
}
mKeySequence = aKeySequence;
@@ -187,12 +180,6 @@
mMacFrameCounter = 0;
mMleFrameCounter = 0;
- if (mKeyRotationTimer.IsRunning())
- {
- mKeySwitchGuardEnabled = true;
- StartKeyRotationTimer();
- }
-
Get<Notifier>().Signal(OT_CHANGED_THREAD_KEY_SEQUENCE_COUNTER);
exit:
@@ -251,13 +238,7 @@
void KeyManager::SetSecurityPolicyFlags(uint8_t aSecurityPolicyFlags)
{
- Notifier ¬ifier = Get<Notifier>();
-
- if (!notifier.HasSignaled(OT_CHANGED_SECURITY_POLICY) || (mSecurityPolicyFlags != aSecurityPolicyFlags))
- {
- mSecurityPolicyFlags = aSecurityPolicyFlags;
- notifier.Signal(OT_CHANGED_SECURITY_POLICY);
- }
+ Get<Notifier>().Update(mSecurityPolicyFlags, aSecurityPolicyFlags, OT_CHANGED_SECURITY_POLICY);
}
void KeyManager::StartKeyRotationTimer(void)
diff --git a/src/core/thread/key_manager.hpp b/src/core/thread/key_manager.hpp
index e6bc05e..c8dfa99 100644
--- a/src/core/thread/key_manager.hpp
+++ b/src/core/thread/key_manager.hpp
@@ -41,9 +41,10 @@
#include <openthread/dataset.h>
#include "common/locator.hpp"
+#include "common/random.hpp"
#include "common/timer.hpp"
#include "crypto/hmac_sha256.hpp"
-#include "mac/mac_frame.hpp"
+#include "mac/mac_types.hpp"
namespace ot {
@@ -56,6 +57,90 @@
* @{
*/
+/**
+ * This class represents a Thread Master Key.
+ *
+ */
+OT_TOOL_PACKED_BEGIN
+class MasterKey : public otMasterKey
+{
+public:
+ /**
+ * This method evaluates whether or not the Thread Master Keys match.
+ *
+ * @param[in] aOther The Thread Master Key to compare.
+ *
+ * @retval TRUE If the Thread Master Keys match.
+ * @retval FALSE If the Thread Master Keys do not match.
+ *
+ */
+ bool operator==(const MasterKey &aOther) const { return memcmp(m8, aOther.m8, sizeof(MasterKey)) == 0; }
+
+ /**
+ * This method evaluates whether or not the Thread Master Keys match.
+ *
+ * @param[in] aOther The Thread Master Key to compare.
+ *
+ * @retval TRUE If the Thread Master Keys do not match.
+ * @retval FALSE If the Thread Master Keys match.
+ *
+ */
+ bool operator!=(const MasterKey &aOther) const { return !(*this == aOther); }
+
+} OT_TOOL_PACKED_END;
+
+/**
+ * This class represents a Thread Pre-Shared Key for the Commissioner (PSKc).
+ *
+ */
+OT_TOOL_PACKED_BEGIN
+class Pskc : public otPskc
+{
+public:
+ /**
+ * This method clears the PSKc (sets all bytes to zero).
+ *
+ */
+ void Clear(void) { memset(this, 0, sizeof(*this)); }
+
+ /**
+ * This method evaluates whether or not the Thread PSKc values match.
+ *
+ * @param[in] aOther The Thread PSKc to compare.
+ *
+ * @retval TRUE If the Thread PSKc values match.
+ * @retval FALSE If the Thread PSKc values do not match.
+ *
+ */
+ bool operator==(const Pskc &aOther) const { return memcmp(m8, aOther.m8, sizeof(Pskc)) == 0; }
+
+ /**
+ * This method evaluates whether or not the Thread PSKc values match.
+ *
+ * @param[in] aOther The Thread PSKc to compare.
+ *
+ * @retval TRUE If the Thread PSKc values do not match.
+ * @retval FALSE If the Thread PSKc values match.
+ *
+ */
+ bool operator!=(const Pskc &aOther) const { return !(*this == aOther); }
+
+#if !OPENTHREAD_RADIO
+ /**
+ * This method generates a cryptographically secure random sequence to populate the Thread PSKc.
+ *
+ * @retval OT_ERROR_NONE Successfully generated a random Thread PSKc.
+ *
+ */
+ otError GenerateRandom(void) { return Random::Crypto::FillBuffer(m8, sizeof(Pskc)); }
+#endif
+
+} OT_TOOL_PACKED_END;
+
+/**
+ * This class defines Thread Key Manager.
+ *
+ */
class KeyManager : public InstanceLocator
{
public:
@@ -86,23 +171,23 @@
void Stop(void);
/**
- * This method returns a reference to the Thread Master Key
+ * This method returns the Thread Master Key.
*
- * @returns A reference to the Thread Master Key.
+ * @returns The Thread Master Key.
*
*/
- const otMasterKey &GetMasterKey(void) const;
+ const MasterKey &GetMasterKey(void) const { return mMasterKey; }
/**
* This method sets the Thread Master Key.
*
- * @param[in] aKey A reference to the Thread Master Key.
+ * @param[in] aKey A Thread Master Key.
*
* @retval OT_ERROR_NONE Successfully set the Thread Master Key.
* @retval OT_ERROR_INVALID_ARGS The @p aKeyLength value was invalid.
*
*/
- otError SetMasterKey(const otMasterKey &aKey);
+ otError SetMasterKey(const MasterKey &aKey);
#if OPENTHREAD_FTD || OPENTHREAD_MTD
/**
@@ -114,7 +199,7 @@
* @retval FALSE if the PSKc is not not configured.
*
*/
- bool IsPSKcSet(void) const { return mIsPSKcSet; }
+ bool IsPskcSet(void) const { return mIsPskcSet; }
/**
* This method returns a pointer to the PSKc.
@@ -122,15 +207,15 @@
* @returns A reference to the PSKc.
*
*/
- const otPSKc &GetPSKc(void) const { return mPSKc; }
+ const Pskc &GetPskc(void) const { return mPskc; }
/**
* This method sets the PSKc.
*
- * @param[in] aPSKc A reference to the PSKc.
+ * @param[in] aPskc A reference to the PSKc.
*
*/
- void SetPSKc(const otPSKc &aPSKc);
+ void SetPskc(const Pskc &aPskc);
#endif
/**
@@ -370,7 +455,10 @@
static void HandleKeyRotationTimer(Timer &aTimer);
void HandleKeyRotationTimer(void);
- otMasterKey mMasterKey;
+ static const uint8_t kThreadString[];
+ static const otMasterKey kDefaultMasterKey;
+
+ MasterKey mMasterKey;
uint32_t mKeySequence;
uint8_t mKey[Crypto::HmacSha256::kHashSize];
@@ -389,13 +477,13 @@
TimerMilli mKeyRotationTimer;
#if OPENTHREAD_MTD || OPENTHREAD_FTD
- otPSKc mPSKc;
+ Pskc mPskc;
#endif
uint8_t mKek[kMaxKeyLength];
uint32_t mKekFrameCounter;
uint8_t mSecurityPolicyFlags;
- bool mIsPSKcSet : 1;
+ bool mIsPskcSet : 1;
};
/**
diff --git a/src/core/thread/link_quality.cpp b/src/core/thread/link_quality.cpp
index c615b2c..90f246f 100644
--- a/src/core/thread/link_quality.cpp
+++ b/src/core/thread/link_quality.cpp
@@ -37,7 +37,6 @@
#include "common/code_utils.hpp"
#include "common/instance.hpp"
-#include "utils/wrap_string.h"
namespace ot {
@@ -146,10 +145,8 @@
SetLinkQuality(0);
mLastRss = OT_RADIO_RSSI_INVALID;
-#if OPENTHREAD_CONFIG_ENABLE_TX_ERROR_RATE_TRACKING
mFrameErrorRate.Reset();
mMessageErrorRate.Reset();
-#endif
}
void LinkQualityInfo::AddRss(int8_t aNoiseFloor, int8_t aRss)
diff --git a/src/core/thread/link_quality.hpp b/src/core/thread/link_quality.hpp
index d40cff0..7cb9395 100644
--- a/src/core/thread/link_quality.hpp
+++ b/src/core/thread/link_quality.hpp
@@ -306,8 +306,6 @@
*/
int8_t GetLastRss(void) const { return mLastRss; }
-#if OPENTHREAD_CONFIG_ENABLE_TX_ERROR_RATE_TRACKING
-
/**
* This method adds a MAC frame transmission status (success/failure) and updates the frame tx error rate.
*
@@ -358,8 +356,6 @@
*/
uint16_t GetMessageErrorRate(void) const { return mMessageErrorRate.GetFailureRate(); }
-#endif // OPENTHREAD_CONFIG_ENABLE_TX_ERROR_RATE_TRACKING
-
/**
* This method converts a received signal strength value to a link margin value.
*
@@ -436,10 +432,9 @@
RssAverager mRssAverager;
uint8_t mLinkQuality;
int8_t mLastRss;
-#if OPENTHREAD_CONFIG_ENABLE_TX_ERROR_RATE_TRACKING
+
SuccessRateTracker mFrameErrorRate;
SuccessRateTracker mMessageErrorRate;
-#endif
};
/**
diff --git a/src/core/thread/lowpan.cpp b/src/core/thread/lowpan.cpp
index a4c3bf5..75edcad 100644
--- a/src/core/thread/lowpan.cpp
+++ b/src/core/thread/lowpan.cpp
@@ -45,6 +45,7 @@
using ot::Encoding::BigEndian::HostSwap16;
using ot::Encoding::BigEndian::ReadUint16;
+using ot::Encoding::BigEndian::WriteUint16;
namespace ot {
namespace Lowpan {
@@ -616,7 +617,7 @@
return error;
}
-otError Lowpan::DispatchToNextHeader(uint8_t aDispatch, Ip6::IpProto &aNextHeader)
+otError Lowpan::DispatchToNextHeader(uint8_t aDispatch, uint8_t &aNextHeader)
{
otError error = OT_ERROR_NONE;
@@ -667,17 +668,16 @@
NetworkData::Leader &networkData = Get<NetworkData::Leader>();
otError error = OT_ERROR_PARSE;
const uint8_t * cur = aBuf;
- uint16_t remaining = aBufLength;
+ const uint8_t * end = aBuf + aBufLength;
uint16_t hcCtl;
Context srcContext, dstContext;
bool srcContextValid = true, dstContextValid = true;
- Ip6::IpProto nextHeader;
+ uint8_t nextHeader;
uint8_t * bytes;
- VerifyOrExit(remaining >= 2);
+ VerifyOrExit(cur + 2 <= end);
hcCtl = ReadUint16(cur);
cur += 2;
- remaining -= 2;
// check Dispatch bits
VerifyOrExit((hcCtl & kHcDispatchMask) == kHcDispatch);
@@ -688,7 +688,7 @@
if ((hcCtl & kHcContextId) != 0)
{
- VerifyOrExit(remaining >= 1);
+ VerifyOrExit(cur < end);
if (networkData.GetContext(cur[0] >> 4, srcContext) != OT_ERROR_NONE)
{
@@ -701,7 +701,6 @@
}
cur++;
- remaining--;
}
else
{
@@ -715,7 +714,7 @@
// Traffic Class and Flow Label
if ((hcCtl & kHcTrafficFlowMask) != kHcTrafficFlow)
{
- VerifyOrExit(remaining >= 1);
+ VerifyOrExit(cur < end);
bytes = reinterpret_cast<uint8_t *>(&aIp6Header);
bytes[1] |= (cur[0] & 0xc0) >> 2;
@@ -725,27 +724,24 @@
bytes[0] |= (cur[0] >> 2) & 0x0f;
bytes[1] |= (cur[0] << 6) & 0xc0;
cur++;
- remaining--;
}
if ((hcCtl & kHcFlowLabel) == 0)
{
- VerifyOrExit(remaining >= 3);
+ VerifyOrExit(cur + 3 <= end);
bytes[1] |= cur[0] & 0x0f;
bytes[2] |= cur[1];
bytes[3] |= cur[2];
cur += 3;
- remaining -= 3;
}
}
// Next Header
if ((hcCtl & kHcNextHeader) == 0)
{
- VerifyOrExit(remaining >= 1);
- aIp6Header.SetNextHeader(static_cast<Ip6::IpProto>(cur[0]));
+ VerifyOrExit(cur < end);
+ aIp6Header.SetNextHeader(cur[0]);
cur++;
- remaining--;
aCompressedNextHeader = false;
}
else
@@ -769,10 +765,9 @@
break;
default:
- VerifyOrExit(remaining >= 1);
+ VerifyOrExit(cur < end);
aIp6Header.SetHopLimit(cur[0]);
cur++;
- remaining--;
break;
}
@@ -782,28 +777,25 @@
case kHcSrcAddrMode0:
if ((hcCtl & kHcSrcAddrContext) == 0)
{
- VerifyOrExit(remaining >= sizeof(Ip6::Address));
+ VerifyOrExit(cur + sizeof(Ip6::Address) <= end);
memcpy(&aIp6Header.GetSource(), cur, sizeof(aIp6Header.GetSource()));
cur += sizeof(Ip6::Address);
- remaining -= sizeof(Ip6::Address);
}
break;
case kHcSrcAddrMode1:
- VerifyOrExit(remaining >= Ip6::Address::kInterfaceIdentifierSize);
+ VerifyOrExit(cur + Ip6::Address::kInterfaceIdentifierSize <= end);
aIp6Header.GetSource().SetIid(cur);
cur += Ip6::Address::kInterfaceIdentifierSize;
- remaining -= Ip6::Address::kInterfaceIdentifierSize;
break;
case kHcSrcAddrMode2:
- VerifyOrExit(remaining >= 2);
+ VerifyOrExit(cur + 2 <= end);
aIp6Header.GetSource().mFields.m8[11] = 0xff;
aIp6Header.GetSource().mFields.m8[12] = 0xfe;
memcpy(aIp6Header.GetSource().mFields.m8 + 14, cur, 2);
cur += 2;
- remaining -= 2;
break;
case kHcSrcAddrMode3:
@@ -832,26 +824,23 @@
{
case kHcDstAddrMode0:
VerifyOrExit((hcCtl & kHcDstAddrContext) == 0);
- VerifyOrExit(remaining >= sizeof(Ip6::Address));
+ VerifyOrExit(cur + sizeof(Ip6::Address) <= end);
memcpy(&aIp6Header.GetDestination(), cur, sizeof(aIp6Header.GetDestination()));
cur += sizeof(Ip6::Address);
- remaining -= sizeof(Ip6::Address);
break;
case kHcDstAddrMode1:
- VerifyOrExit(remaining >= Ip6::Address::kInterfaceIdentifierSize);
+ VerifyOrExit(cur + Ip6::Address::kInterfaceIdentifierSize <= end);
aIp6Header.GetDestination().SetIid(cur);
cur += Ip6::Address::kInterfaceIdentifierSize;
- remaining -= Ip6::Address::kInterfaceIdentifierSize;
break;
case kHcDstAddrMode2:
- VerifyOrExit(remaining >= 2);
+ VerifyOrExit(cur + 2 <= end);
aIp6Header.GetDestination().mFields.m8[11] = 0xff;
aIp6Header.GetDestination().mFields.m8[12] = 0xfe;
memcpy(aIp6Header.GetDestination().mFields.m8 + 14, cur, 2);
cur += 2;
- remaining -= 2;
break;
case kHcDstAddrMode3:
@@ -883,34 +872,30 @@
switch (hcCtl & kHcDstAddrModeMask)
{
case kHcDstAddrMode0:
- VerifyOrExit(remaining >= sizeof(Ip6::Address));
+ VerifyOrExit(cur + sizeof(Ip6::Address) <= end);
memcpy(aIp6Header.GetDestination().mFields.m8, cur, sizeof(Ip6::Address));
cur += sizeof(Ip6::Address);
- remaining -= sizeof(Ip6::Address);
break;
case kHcDstAddrMode1:
- VerifyOrExit(remaining >= 6);
+ VerifyOrExit(cur + 6 <= end);
aIp6Header.GetDestination().mFields.m8[1] = cur[0];
memcpy(aIp6Header.GetDestination().mFields.m8 + 11, cur + 1, 5);
cur += 6;
- remaining -= 6;
break;
case kHcDstAddrMode2:
- VerifyOrExit(remaining >= 4);
+ VerifyOrExit(cur + 4 <= end);
aIp6Header.GetDestination().mFields.m8[1] = cur[0];
memcpy(aIp6Header.GetDestination().mFields.m8 + 13, cur + 1, 3);
cur += 4;
- remaining -= 4;
break;
case kHcDstAddrMode3:
- VerifyOrExit(remaining >= 1);
+ VerifyOrExit(cur < end);
aIp6Header.GetDestination().mFields.m8[1] = 0x02;
aIp6Header.GetDestination().mFields.m8[15] = cur[0];
cur++;
- remaining--;
break;
}
}
@@ -919,7 +904,7 @@
switch (hcCtl & kHcDstAddrModeMask)
{
case 0:
- VerifyOrExit(remaining >= 6);
+ VerifyOrExit(cur + 6 <= end);
VerifyOrExit(dstContextValid);
aIp6Header.GetDestination().mFields.m8[1] = cur[0];
aIp6Header.GetDestination().mFields.m8[2] = cur[1];
@@ -927,7 +912,6 @@
memcpy(aIp6Header.GetDestination().mFields.m8 + 4, dstContext.mPrefix, 8);
memcpy(aIp6Header.GetDestination().mFields.m8 + 12, cur + 2, 4);
cur += 6;
- remaining -= 6;
break;
default:
@@ -938,7 +922,7 @@
if ((hcCtl & kHcNextHeader) != 0)
{
- VerifyOrExit(remaining >= 1);
+ VerifyOrExit(cur < end);
SuccessOrExit(DispatchToNextHeader(cur[0], nextHeader));
aIp6Header.SetNextHeader(nextHeader);
}
@@ -951,44 +935,41 @@
int Lowpan::DecompressExtensionHeader(Message &aMessage, const uint8_t *aBuf, uint16_t aBufLength)
{
- otError error = OT_ERROR_PARSE;
- const uint8_t * cur = aBuf;
- uint16_t remaining = aBufLength;
+ otError error = OT_ERROR_PARSE;
+ const uint8_t * cur = aBuf;
+ const uint8_t * end = aBuf + aBufLength;
uint8_t hdr[2];
uint8_t len;
- Ip6::IpProto nextHeader;
+ uint8_t nextHeader;
uint8_t ctl = cur[0];
uint8_t padLength;
Ip6::OptionPad1 optionPad1;
Ip6::OptionPadN optionPadN;
- VerifyOrExit(remaining >= 1);
+ VerifyOrExit(cur < end);
cur++;
- remaining--;
// next header
if (ctl & kExtHdrNextHeader)
{
- VerifyOrExit(remaining >= 1);
+ VerifyOrExit(cur < end);
len = cur[0];
cur++;
- remaining--;
- VerifyOrExit(remaining >= len);
+ VerifyOrExit(cur + len <= end);
SuccessOrExit(DispatchToNextHeader(cur[len], nextHeader));
hdr[0] = static_cast<uint8_t>(nextHeader);
}
else
{
- VerifyOrExit(remaining >= 2);
+ VerifyOrExit(cur + 2 <= end);
hdr[0] = cur[0];
len = cur[1];
cur += 2;
- remaining -= 2;
- VerifyOrExit(remaining >= len);
+ VerifyOrExit(cur + len <= end);
}
// length
@@ -1031,15 +1012,14 @@
int Lowpan::DecompressUdpHeader(Ip6::UdpHeader &aUdpHeader, const uint8_t *aBuf, uint16_t aBufLength)
{
- otError error = OT_ERROR_PARSE;
- const uint8_t *cur = aBuf;
- uint16_t remaining = aBufLength;
+ otError error = OT_ERROR_PARSE;
+ const uint8_t *cur = aBuf;
+ const uint8_t *end = aBuf + aBufLength;
uint8_t udpCtl;
- VerifyOrExit(remaining >= 1);
+ VerifyOrExit(cur < end);
udpCtl = cur[0];
cur++;
- remaining--;
VerifyOrExit((udpCtl & kUdpDispatchMask) == kUdpDispatch);
@@ -1049,35 +1029,31 @@
switch (udpCtl & kUdpPortMask)
{
case 0:
- VerifyOrExit(remaining >= 4);
+ VerifyOrExit(cur + 4 <= end);
aUdpHeader.SetSourcePort(ReadUint16(cur));
aUdpHeader.SetDestinationPort(ReadUint16(cur + 2));
cur += 4;
- remaining -= 4;
break;
case 1:
- VerifyOrExit(remaining >= 3);
+ VerifyOrExit(cur + 3 <= end);
aUdpHeader.SetSourcePort(ReadUint16(cur));
aUdpHeader.SetDestinationPort(0xf000 | cur[2]);
cur += 3;
- remaining -= 3;
break;
case 2:
- VerifyOrExit(remaining >= 3);
+ VerifyOrExit(cur + 3 <= end);
aUdpHeader.SetSourcePort(0xf000 | cur[0]);
aUdpHeader.SetDestinationPort(ReadUint16(cur + 1));
cur += 3;
- remaining -= 3;
break;
case 3:
- VerifyOrExit(remaining >= 1);
+ VerifyOrExit(cur < end);
aUdpHeader.SetSourcePort(0xf0b0 | (cur[0] >> 4));
aUdpHeader.SetDestinationPort(0xf0b0 | (cur[0] & 0xf));
- cur += 1;
- remaining -= 1;
+ cur++;
break;
}
@@ -1088,7 +1064,7 @@
}
else
{
- VerifyOrExit(remaining >= 2);
+ VerifyOrExit(cur + 2 <= end);
aUdpHeader.SetChecksum(ReadUint16(cur));
cur += 2;
}
@@ -1206,73 +1182,152 @@
return (error == OT_ERROR_NONE) ? static_cast<int>(compressedLength) : -1;
}
-otError MeshHeader::Init(const uint8_t *aFrame, uint16_t aFrameLength)
+//---------------------------------------------------------------------------------------------------------------------
+// MeshHeader
+
+void MeshHeader::Init(uint16_t aSource, uint16_t aDestination, uint8_t aHopsLeft)
{
- otError error = OT_ERROR_NONE;
+ mSource = aSource;
+ mDestination = aDestination;
+ mHopsLeft = aHopsLeft;
+}
- VerifyOrExit(aFrameLength >= 1, error = OT_ERROR_PARSE);
- mDispatchHopsLeft = *aFrame++;
- aFrameLength--;
+bool MeshHeader::IsMeshHeader(const uint8_t *aFrame, uint16_t aFrameLength)
+{
+ return (aFrameLength >= kMinHeaderLength) && ((*aFrame & kDispatchMask) == kDispatch);
+}
- if (IsDeepHopsLeftField())
+otError MeshHeader::ParseFrom(const uint8_t *aFrame, uint16_t aFrameLength, uint16_t &aHeaderLength)
+{
+ otError error = OT_ERROR_PARSE;
+ uint8_t dispatch;
+
+ VerifyOrExit(aFrameLength >= kMinHeaderLength);
+ dispatch = *aFrame++;
+
+ VerifyOrExit((dispatch & (kDispatchMask | kSourceShort | kDestShort)) == (kDispatch | kSourceShort | kDestShort));
+
+ mHopsLeft = (dispatch & kHopsLeftMask);
+
+ if (mHopsLeft == kDeepHopsLeft)
{
- VerifyOrExit(aFrameLength >= 1, error = OT_ERROR_PARSE);
- mDeepHopsLeft = *aFrame++;
- aFrameLength--;
+ VerifyOrExit(aFrameLength >= kDeepHopsHeaderLength);
+ mHopsLeft = *aFrame++;
+ aHeaderLength = kDeepHopsHeaderLength;
}
else
{
- mDeepHopsLeft = 0;
+ aHeaderLength = kMinHeaderLength;
}
- VerifyOrExit(aFrameLength >= sizeof(mAddress), error = OT_ERROR_PARSE);
- memcpy(&mAddress, aFrame, sizeof(mAddress));
+ mSource = ReadUint16(aFrame);
+ mDestination = ReadUint16(aFrame + 2);
+
+ error = OT_ERROR_NONE;
exit:
return error;
}
-otError MeshHeader::Init(const Message &aMessage)
+otError MeshHeader::ParseFrom(const Message &aMessage)
{
- otError error = OT_ERROR_NONE;
- uint16_t offset = 0;
- uint16_t bytesRead;
+ uint16_t headerLength;
- bytesRead = aMessage.Read(offset, sizeof(mDispatchHopsLeft), &mDispatchHopsLeft);
- VerifyOrExit(bytesRead == sizeof(mDispatchHopsLeft), error = OT_ERROR_PARSE);
- offset += bytesRead;
+ return ParseFrom(aMessage, headerLength);
+}
- if (IsDeepHopsLeftField())
+otError MeshHeader::ParseFrom(const Message &aMessage, uint16_t &aHeaderLength)
+{
+ uint8_t frame[kDeepHopsHeaderLength];
+ uint16_t frameLength;
+
+ frameLength = aMessage.Read(/* aOffset */ 0, sizeof(frame), frame);
+
+ return ParseFrom(frame, frameLength, aHeaderLength);
+}
+
+uint16_t MeshHeader::GetHeaderLength(void) const
+{
+ return (mHopsLeft >= kDeepHopsLeft) ? kDeepHopsHeaderLength : kMinHeaderLength;
+}
+
+void MeshHeader::DecrementHopsLeft(void)
+{
+ if (mHopsLeft > 0)
{
- bytesRead = aMessage.Read(offset, sizeof(mDeepHopsLeft), &mDeepHopsLeft);
- VerifyOrExit(bytesRead == sizeof(mDeepHopsLeft), error = OT_ERROR_PARSE);
- offset += bytesRead;
+ mHopsLeft--;
+ }
+}
+
+uint16_t MeshHeader::WriteTo(uint8_t *aFrame) const
+{
+ uint8_t *cur = aFrame;
+ uint8_t dispatch = (kDispatch | kSourceShort | kDestShort);
+
+ if (mHopsLeft < kDeepHopsLeft)
+ {
+ *cur++ = (dispatch | mHopsLeft);
}
else
{
- mDeepHopsLeft = 0;
+ *cur++ = (dispatch | kDeepHopsLeft);
+ *cur++ = mHopsLeft;
}
- bytesRead = aMessage.Read(offset, sizeof(mAddress), &mAddress);
- VerifyOrExit(bytesRead == sizeof(mAddress), error = OT_ERROR_PARSE);
+ WriteUint16(mSource, cur);
+ cur += sizeof(uint16_t);
-exit:
- return error;
+ WriteUint16(mDestination, cur);
+ cur += sizeof(uint16_t);
+
+ return static_cast<uint16_t>(cur - aFrame);
}
-otError FragmentHeader::Init(const uint8_t *aFrame, uint16_t aFrameLength)
+uint16_t MeshHeader::WriteTo(Message &aMessage, uint16_t aOffset) const
+{
+ uint8_t frame[kDeepHopsHeaderLength];
+ uint16_t headerLength;
+
+ headerLength = WriteTo(frame);
+ aMessage.Write(aOffset, headerLength, frame);
+
+ return headerLength;
+}
+
+//---------------------------------------------------------------------------------------------------------------------
+// FragmentHeader
+
+void FragmentHeader::Init(uint16_t aSize, uint16_t aTag, uint16_t aOffset)
+{
+ mSize = (aSize & kSizeMask);
+ mTag = aTag;
+ mOffset = (aOffset & kOffsetMask);
+}
+
+bool FragmentHeader::IsFragmentHeader(const uint8_t *aFrame, uint16_t aFrameLength)
+{
+ return (aFrameLength >= kFirstFragmentHeaderSize) && ((*aFrame & kDispatchMask) == kDispatch);
+}
+
+otError FragmentHeader::ParseFrom(const uint8_t *aFrame, uint16_t aFrameLength, uint16_t &aHeaderLength)
{
otError error = OT_ERROR_PARSE;
- VerifyOrExit(aFrameLength >= sizeof(mDispatchSize) + sizeof(mTag));
- memcpy(reinterpret_cast<uint8_t *>(&mDispatchSize), aFrame, sizeof(mDispatchSize) + sizeof(mTag));
- aFrame += sizeof(mDispatchSize) + sizeof(mTag);
- aFrameLength -= sizeof(mDispatchSize) + sizeof(mTag);
+ VerifyOrExit(IsFragmentHeader(aFrame, aFrameLength));
- if (IsOffsetPresent())
+ mSize = ReadUint16(aFrame + kSizeIndex) & kSizeMask;
+ mTag = ReadUint16(aFrame + kTagIndex);
+
+ if ((*aFrame & kOffsetFlag) == kOffsetFlag)
{
- VerifyOrExit(aFrameLength >= sizeof(mOffset));
- mOffset = *aFrame++;
+ VerifyOrExit(aFrameLength >= kSubsequentFragmentHeaderSize);
+ mOffset = aFrame[kOffsetIndex] * 8;
+ aHeaderLength = kSubsequentFragmentHeaderSize;
+ }
+ else
+ {
+ mOffset = 0;
+ aHeaderLength = kFirstFragmentHeaderSize;
}
error = OT_ERROR_NONE;
@@ -1281,29 +1336,33 @@
return error;
}
-otError FragmentHeader::Init(const Message &aMessage, uint16_t aOffset)
+otError FragmentHeader::ParseFrom(const Message &aMessage, uint16_t aOffset, uint16_t &aHeaderLength)
{
- otError error = OT_ERROR_NONE;
- uint16_t bytesRead;
+ uint8_t frame[kSubsequentFragmentHeaderSize];
+ uint16_t frameLength;
- bytesRead = aMessage.Read(aOffset, sizeof(mDispatchSize), reinterpret_cast<void *>(&mDispatchSize));
- VerifyOrExit(bytesRead == sizeof(mDispatchSize), error = OT_ERROR_PARSE);
- aOffset += bytesRead;
+ frameLength = aMessage.Read(aOffset, sizeof(frame), frame);
- VerifyOrExit(IsFragmentHeader(), error = OT_ERROR_PARSE);
+ return ParseFrom(frame, frameLength, aHeaderLength);
+}
- bytesRead = aMessage.Read(aOffset, sizeof(mTag), reinterpret_cast<void *>(&mTag));
- VerifyOrExit(bytesRead == sizeof(mTag), error = OT_ERROR_PARSE);
- aOffset += bytesRead;
+uint16_t FragmentHeader::WriteTo(uint8_t *aFrame) const
+{
+ uint8_t *cur = aFrame;
- if (IsOffsetPresent())
+ WriteUint16((kDispatch << 8) + mSize, cur);
+ cur += sizeof(uint16_t);
+
+ WriteUint16(mTag, cur);
+ cur += sizeof(uint16_t);
+
+ if (mOffset != 0)
{
- bytesRead = aMessage.Read(aOffset, sizeof(mOffset), &mOffset);
- VerifyOrExit(bytesRead == sizeof(mOffset), error = OT_ERROR_PARSE);
+ *aFrame |= kOffsetFlag;
+ *cur++ = static_cast<uint8_t>(mOffset >> 3);
}
-exit:
- return error;
+ return static_cast<uint16_t>(cur - aFrame);
}
} // namespace Lowpan
diff --git a/src/core/thread/lowpan.hpp b/src/core/thread/lowpan.hpp
index 13f4baf..8dd0a7e 100644
--- a/src/core/thread/lowpan.hpp
+++ b/src/core/thread/lowpan.hpp
@@ -39,7 +39,7 @@
#include "common/debug.hpp"
#include "common/locator.hpp"
#include "common/message.hpp"
-#include "mac/mac_frame.hpp"
+#include "mac/mac_types.hpp"
#include "net/ip6.hpp"
#include "net/ip6_address.hpp"
@@ -92,9 +92,9 @@
*
*/
BufferWriter(uint8_t *aBuf, uint16_t aLength)
+ : mWritePointer(aBuf)
+ , mEndPointer(aBuf + aLength)
{
- mWritePointer = aBuf;
- mRemainingLength = aLength;
}
/**
@@ -106,7 +106,7 @@
* @retval FALSE Insufficient buffer space to write the requested number of bytes.
*
*/
- bool CanWrite(uint8_t aLength) const { return mRemainingLength >= aLength; }
+ bool CanWrite(uint8_t aLength) const { return (mWritePointer + aLength) <= mEndPointer; }
/**
* This method returns the current write pointer value.
@@ -121,8 +121,8 @@
*
* @param[in] aLength Number of bytes to advance.
*
- * @retval TRUE Enough buffer space is available to advance the requested number of bytes.
- * @retval FALSE Insufficient buffer space to advance the requested number of bytes.
+ * @retval OT_ERROR_NONE Enough buffer space is available to advance the requested number of bytes.
+ * @retval OT_ERROR_NO_BUFS Insufficient buffer space to advance the requested number of bytes.
*
*/
otError Advance(uint8_t aLength)
@@ -130,9 +130,7 @@
otError error = OT_ERROR_NONE;
VerifyOrExit(CanWrite(aLength), error = OT_ERROR_NO_BUFS);
-
mWritePointer += aLength;
- mRemainingLength -= aLength;
exit:
return error;
@@ -154,7 +152,6 @@
VerifyOrExit(CanWrite(sizeof(aByte)), error = OT_ERROR_NO_BUFS);
*mWritePointer++ = aByte;
- mRemainingLength--;
exit:
return error;
@@ -178,7 +175,6 @@
memcpy(mWritePointer, aBuf, aLength);
mWritePointer += aLength;
- mRemainingLength -= aLength;
exit:
return error;
@@ -207,7 +203,6 @@
assert(rval == aLength);
mWritePointer += aLength;
- mRemainingLength -= aLength;
exit:
return error;
@@ -215,7 +210,7 @@
private:
uint8_t *mWritePointer;
- uint16_t mRemainingLength;
+ uint8_t *mEndPointer;
};
/**
@@ -379,7 +374,7 @@
int DecompressExtensionHeader(Message &aMessage, const uint8_t *aBuf, uint16_t aBufLength);
int DecompressUdpHeader(Message &aMessage, const uint8_t *aBuf, uint16_t aBufLength, uint16_t aDatagramLength);
- otError DispatchToNextHeader(uint8_t aDispatch, Ip6::IpProto &aNextHeader);
+ otError DispatchToNextHeader(uint8_t aDispatch, uint8_t &aNextHeader);
static void CopyContext(const Context &aContext, Ip6::Address &aAddress);
static otError ComputeIid(const Mac::Address &aMacAddr, const Context &aContext, Ip6::Address &aIpAddress);
@@ -389,7 +384,6 @@
* This class implements Mesh Header generation and processing.
*
*/
-OT_TOOL_PACKED_BEGIN
class MeshHeader
{
public:
@@ -399,74 +393,79 @@
};
/**
- * Default constructor for the object.
+ * This method initializes the Mesh Header with a given Mesh Source, Mesh Destination and Hops Left value.
+ *
+ * @param[in] aSource The Mesh Source address.
+ * @param[in] aDestination The Mesh Destination address.
+ * @param[in] aHopsLeft The Hops Left value.
*
*/
- MeshHeader(void) { memset(this, 0, sizeof(*this)); }
+ void Init(uint16_t aSource, uint16_t aDestination, uint8_t aHopsLeft);
/**
- * This method initializes the header.
+ * This static method indicates whether or not the header (in a given frame) is a Mesh Header.
*
- */
- void Init(void) { mDispatchHopsLeft = kDispatch | kSourceShort | kDestinationShort; }
-
- /**
- * This method initializes the mesh header from a frame @p aFrame.
- *
- * @param[in] aFrame The pointer to the frame.
- * @param[in] aFrameLength The length of the frame.
- *
- * @retval OT_ERROR_NONE Mesh Header initialized successfully.
- * @retval OT_ERROR_PARSE Mesh Header could not be parsed from @p aFrame.
- *
- */
- otError Init(const uint8_t *aFrame, uint16_t aFrameLength);
-
- /**
- * This method initializes the mesh header from a message object @p aMessage.
- *
- * @param[in] aMessage The message object.
- *
- * @retval OT_ERROR_NONE Mesh Header initialized successfully.
- * @retval OT_ERROR_PARSE Mesh Header could not be parsed from @p aMessage.
- *
- */
- otError Init(const Message &aMessage);
-
- /**
- * This method indicates whether or not the header is a Mesh Header.
+ * @note This method checks whether the first byte in header/frame (dispatch byte) matches the Mesh Header dispatch
+ * It does not fully parse and validate the Mesh Header. `ParseFrom()` method can be used to fully parse and
+ * validate the header.
*
* @retval TRUE If the header matches the Mesh Header dispatch value.
* @retval FALSE If the header does not match the Mesh Header dispatch value.
*
*/
- bool IsMeshHeader(void) const { return (mDispatchHopsLeft & kDispatchMask) == kDispatch; }
+ static bool IsMeshHeader(const uint8_t *aFrame, uint16_t aFrameLength);
/**
- * This method indicates whether or not the Mesh Header appears to be well-formed.
+ * This method parses the Mesh Header from a frame @p aFrame.
*
- * @retval TRUE If the header appears to be well-formed.
- * @retval FALSE If the header does not appear to be well-formed.
+ * @param[in] aFrame The pointer to the frame.
+ * @param[in] aFrameLength The length of the frame.
+ * @param[out] aHeaderLength A reference to a variable to output the parsed header length (on success).
+ *
+ * @retval OT_ERROR_NONE Mesh Header parsed successfully.
+ * @retval OT_ERROR_PARSE Mesh Header could not be parsed.
*
*/
- bool IsValid(void) const { return (mDispatchHopsLeft & kSourceShort) && (mDispatchHopsLeft & kDestinationShort); }
+ otError ParseFrom(const uint8_t *aFrame, uint16_t aFrameLength, uint16_t &aHeaderLength);
/**
- * This method indicates whether or not the header contains Deep Hops Left field.
+ * This method parses the Mesh Header from a given message.
*
- * @retval TRUE If the header does contain Deep Hops Left field.
- * @retval FALSE If the header does not contain Deep Hops Left field.
+ * @note The Mesh Header is read from offset zero within the @p aMessage.
+ *
+ * @param[in] aMessage The message to read from.
+ *
+ * @retval OT_ERROR_NONE Mesh Header parsed successfully.
+ * @retval OT_ERROR_PARSE Mesh Header could not be parsed.
*
*/
- bool IsDeepHopsLeftField(void) const { return (mDispatchHopsLeft & kHopsLeftMask) == kDeepHopsLeft; }
+ otError ParseFrom(const Message &aMessage);
/**
- * This static method returns the size of the Mesh Header in bytes.
+ * This method parses the Mesh Header from a given message.
*
- * @returns The size of the Mesh Header in bytes.
+ * @note The Mesh Header is read from offset zero within the @p aMessage.
+ *
+ * @param[in] aMessage The message to read from.
+ * @param[out] aHeaderLength A reference to a variable to output the parsed header length (on success).
+ *
+ * @retval OT_ERROR_NONE Mesh Header parsed successfully.
+ * @retval OT_ERROR_PARSE Mesh Header could not be parsed.
*
*/
- uint8_t GetHeaderLength(void) const { return sizeof(*this) - (IsDeepHopsLeftField() ? 0 : sizeof(mDeepHopsLeft)); }
+ otError ParseFrom(const Message &aMessage, uint16_t &aHeaderLength);
+
+ /**
+ * This method returns the the Mesh Header length when written to a frame.
+ *
+ * @note The returned value from this method gives the header length (number of bytes) when the header is written
+ * to a frame or message. This should not be used to determine the parsed length (number of bytes read) when the
+ * Mesh Header is parsed from a frame/message (using `ParseFrom()` methods).
+ *
+ * @returns The length of the Mesh Header (in bytes) when written to a frame.
+ *
+ */
+ uint16_t GetHeaderLength(void) const;
/**
* This method returns the Hops Left value.
@@ -474,29 +473,13 @@
* @returns The Hops Left value.
*
*/
- uint8_t GetHopsLeft(void) const
- {
- return IsDeepHopsLeftField() ? mDeepHopsLeft : mDispatchHopsLeft & kHopsLeftMask;
- }
+ uint8_t GetHopsLeft(void) const { return mHopsLeft; }
/**
- * This method sets the Hops Left value.
- *
- * @param[in] aHops The Hops Left value.
+ * This method decrements the Hops Left value (if it is not zero).
*
*/
- void SetHopsLeft(uint8_t aHops)
- {
- if (aHops < kDeepHopsLeft && !IsDeepHopsLeftField())
- {
- mDispatchHopsLeft = (mDispatchHopsLeft & ~kHopsLeftMask) | aHops;
- }
- else
- {
- mDispatchHopsLeft = (mDispatchHopsLeft & ~kHopsLeftMask) | kDeepHopsLeft;
- mDeepHopsLeft = aHops;
- }
- }
+ void DecrementHopsLeft(void);
/**
* This method returns the Mesh Source address.
@@ -504,15 +487,7 @@
* @returns The Mesh Source address.
*
*/
- uint16_t GetSource(void) const { return HostSwap16(mAddress.mSource); }
-
- /**
- * This method sets the Mesh Source address.
- *
- * @param[in] aSource The Mesh Source address.
- *
- */
- void SetSource(uint16_t aSource) { mAddress.mSource = HostSwap16(aSource); }
+ uint16_t GetSource(void) const { return mSource; }
/**
* This method returns the Mesh Destination address.
@@ -520,133 +495,126 @@
* @returns The Mesh Destination address.
*
*/
- uint16_t GetDestination(void) const { return HostSwap16(mAddress.mDestination); }
+ uint16_t GetDestination(void) const { return mDestination; }
/**
- * This method sets the Mesh Destination address.
+ * This method writes the Mesh Header into a given frame.
*
- * @param[in] aDestination The Mesh Destination address.
+ * @note This method expects the frame buffer to have enough space for the entire Mesh Header.
+ *
+ * @param[out] aFrame The pointer to the frame buffer to write to.
+ *
+ * @returns The header length (number of bytes written).
*
*/
- void SetDestination(uint16_t aDestination) { mAddress.mDestination = HostSwap16(aDestination); }
+ uint16_t WriteTo(uint8_t *aFrame) const;
/**
- * This method appends Mesh Header to the @p aFrame frame.
+ * This method writes the Mesh Header to a message at a given offset.
*
- * @param[in] aFrame The pointer to the frame.
+ * @note This method expects the @p aMessage length to be already set such that there is enough space for the
+ * entire Mesh Header to be written.
+ *
+ * @param[out] aMessage A message to write the Mesh Header into.
+ * @param[in] aOffset The offset at which to write the header.
+ *
+ * @returns The header length (number of bytes written).
*
*/
- void AppendTo(uint8_t *aFrame) const
- {
- *aFrame++ = mDispatchHopsLeft;
-
- if (IsDeepHopsLeftField())
- {
- *aFrame++ = mDeepHopsLeft;
- }
-
- memcpy(aFrame, &mAddress, sizeof(mAddress));
- }
+ uint16_t WriteTo(Message &aMessage, uint16_t aOffset) const;
private:
enum
{
- kDispatch = 2 << 6,
- kDispatchMask = 3 << 6,
- kHopsLeftMask = 0x0f,
- kSourceShort = 1 << 5,
- kDestinationShort = 1 << 4,
- kDeepHopsLeft = 0x0f
+ kDispatch = 2 << 6,
+ kDispatchMask = 3 << 6,
+ kHopsLeftMask = 0x0f,
+ kSourceShort = 1 << 5,
+ kDestShort = 1 << 4,
+ kDeepHopsLeft = 0x0f,
+ kMinHeaderLength = sizeof(uint8_t) + sizeof(uint16_t) + sizeof(uint16_t), // dispatch byte + src + dest
+ kDeepHopsHeaderLength = kMinHeaderLength + sizeof(uint8_t), // min header + deep hops
};
- uint8_t mDispatchHopsLeft;
- uint8_t mDeepHopsLeft;
- struct OT_TOOL_PACKED_FIELD
- {
- uint16_t mSource;
- uint16_t mDestination;
- } mAddress;
-} OT_TOOL_PACKED_END;
+ uint16_t mSource;
+ uint16_t mDestination;
+ uint8_t mHopsLeft;
+};
/**
* This class implements Fragment Header generation and parsing.
*
*/
-OT_TOOL_PACKED_BEGIN
class FragmentHeader
{
public:
enum
{
- kInitialHeaderSize = 4, ///< Initial fragment header size in octets.
- kSubsequentHeaderSize = 5, ///< Subsequent fragment header size in octets.
+ kFirstFragmentHeaderSize = 4, ///< First fragment header size in octets.
+ kSubsequentFragmentHeaderSize = 5, ///< Subsequent fragment header size in octets.
};
/**
- * This constructor initializes the Fragment Header.
+ * This method initializes the Fragment Header as a first fragment.
+ *
+ * A first fragment header starts at offset zero.
+ *
+ * @param[in] aSize The Datagram Size value.
+ * @param[in] aTage The Datagram Tag value.
*
*/
- FragmentHeader(void)
- {
- mDispatchSize = HostSwap16(kDispatch);
- mTag = 0;
- mOffset = 0;
- }
+ void InitFirstFragment(uint16_t aSize, uint16_t aTag) { Init(aSize, aTag, 0); }
/**
* This method initializes the Fragment Header.
*
- */
- void Init(void) { mDispatchSize = HostSwap16(kDispatch); }
-
- /**
- * This method initializes the fragment header from a frame @p aFrame.
+ * The @p aOffset value will be truncated to become a multiple of 8.
*
- * @param[in] aFrame The pointer to the frame.
- * @param[in] aFrameLength The length of the frame.
- *
- * @retval OT_ERROR_NONE Fragment Header initialized successfully.
- * @retval OT_ERROR_PARSE Fragment header could not be parsed from @p aFrame.
+ * @param[in] aSize The Datagram Size value.
+ * @param[in] aTage The Datagram Tag value.
+ * @param[in] aOffset The Datagram Offset value.
*
*/
- otError Init(const uint8_t *aFrame, uint16_t aFrameLength);
+ void Init(uint16_t aSize, uint16_t aTag, uint16_t aOffset);
/**
- * This method initializes the fragment header from a message @p aMessage.
+ * This static method indicates whether or not the header (in a given frame) is a Fragment Header.
*
- * @param[in] aMessage The message object.
- * @param[in] aOffset An offset into the message to read the header.
- *
- * @retval OT_ERROR_NONE Fragment Header initialized successfully.
- * @retval OT_ERROR_PARSE Fragment header could not be parsed from @p aMessage.
- *
- */
- otError Init(const Message &aMessage, uint16_t aOffset);
-
- /**
- * This method indicates whether or not the header is a Fragment Header.
+ * @note This method checks whether the frame has the minimum required length and that the first byte in
+ * header (dispatch byte) matches the Fragment Header dispatch value. It does not fully parse and validate the
+ * Fragment Header. `ParseFrom()` method can be used to fully parse and validate the header.
*
* @retval TRUE If the header matches the Fragment Header dispatch value.
* @retval FALSE If the header does not match the Fragment Header dispatch value.
*
*/
- bool IsFragmentHeader(void) const { return (HostSwap16(mDispatchSize) & kDispatchMask) == kDispatch; }
+ static bool IsFragmentHeader(const uint8_t *aFrame, uint16_t aFrameLength);
/**
- * This method returns the Fragment Header length.
+ * This method parses the Fragment Header from a frame @p aFrame.
*
- * @returns The Fragment Header length in bytes.
+ * @param[in] aFrame The pointer to the frame.
+ * @param[in] aFrameLength The length of the frame.
+ * @param[out] aHeaderLength A reference to a variable to output the parsed header length (on success).
+ *
+ * @retval OT_ERROR_NONE Fragment Header parsed successfully.
+ * @retval OT_ERROR_PARSE Fragment header could not be parsed from @p aFrame.
*
*/
- uint8_t GetHeaderLength(void) const { return IsOffsetPresent() ? sizeof(*this) : sizeof(*this) - sizeof(mOffset); }
+ otError ParseFrom(const uint8_t *aFrame, uint16_t aFrameLength, uint16_t &aHeaderLength);
/**
- * This method indicates whether or not the Offset field is present.
+ * This method parses the Fragment Header from a message.
*
- * @returns TRUE if the Offset field is present, FALSE otherwise.
+ * @param[in] aMessage The message to read from.
+ * @param[in] aOffset The offset within the message to start reading from.
+ * @param[out] aHeaderLength A reference to a variable to output the parsed header length (on success).
+ *
+ * @retval OT_ERROR_NONE Fragment Header parsed successfully.
+ * @retval OT_ERROR_PARSE Fragment header could not be parsed from @p aFrame.
*
*/
- bool IsOffsetPresent(void) const { return (HostSwap16(mDispatchSize) & kOffset) != 0; }
+ otError ParseFrom(const Message &aMessage, uint16_t aOffset, uint16_t &aHeaderLength);
/**
* This method returns the Datagram Size value.
@@ -654,18 +622,7 @@
* @returns The Datagram Size value.
*
*/
- uint16_t GetDatagramSize(void) const { return HostSwap16(mDispatchSize) & kSizeMask; }
-
- /**
- * This method sets the Datagram Size value.
- *
- * @param[in] aSize The Datagram Size value.
- *
- */
- void SetDatagramSize(uint16_t aSize)
- {
- mDispatchSize = HostSwap16((HostSwap16(mDispatchSize) & ~kSizeMask) | (aSize & kSizeMask));
- }
+ uint16_t GetDatagramSize(void) const { return mSize; }
/**
* This method returns the Datagram Tag value.
@@ -673,57 +630,47 @@
* @returns The Datagram Tag value.
*
*/
- uint16_t GetDatagramTag(void) const { return HostSwap16(mTag); }
-
- /**
- * This method sets the Datagram Tag value.
- *
- * @param[in] aTag The Datagram Tag value.
- *
- */
- void SetDatagramTag(uint16_t aTag) { mTag = HostSwap16(aTag); }
+ uint16_t GetDatagramTag(void) const { return mTag; }
/**
* This method returns the Datagram Offset value.
*
- * @returns The Datagram Offset value.
+ * The returned offset value is always multiple of 8.
+ *
+ * @returns The Datagram Offset value (multiple of 8).
*
*/
- uint16_t GetDatagramOffset(void) const { return IsOffsetPresent() ? static_cast<uint16_t>(mOffset) * 8 : 0; }
+ uint16_t GetDatagramOffset(void) const { return mOffset; }
/**
- * This method sets the Datagram Offset value.
+ * This method writes the Fragment Header into a given frame.
*
- * @param[in] aOffset The Datagram Offset value.
+ * @note This method expects the frame buffer to have enough space for the entire Fragment Header
+ *
+ * @param[out] aFrame The pointer to the frame buffer to write to.
+ *
+ * @returns The header length (number of bytes written).
*
*/
- void SetDatagramOffset(uint16_t aOffset)
- {
- if (aOffset == 0)
- {
- mDispatchSize = HostSwap16(HostSwap16(mDispatchSize) & ~kOffset);
- }
- else
- {
- mDispatchSize = HostSwap16(HostSwap16(mDispatchSize) | kOffset);
- mOffset = (aOffset >> 3) & kOffsetMask;
- }
- }
+ uint16_t WriteTo(uint8_t *aFrame) const;
private:
enum
{
- kDispatch = 3 << 14,
- kOffset = 1 << 13,
- kDispatchMask = 0xd800, ///< Accept FRAG1 and FRAGN only.
- kSizeMask = 0x7ff,
- kOffsetMask = 0xff,
+ kDispatch = 0xc0, // 0b1100_0000
+ kDispatchMask = 0xd8, // 0b1101_1000 which accepts first frag (0b1100_0xxx) and next frag (0b1110_0xxx).
+ kOffsetFlag = 1 << 5, // Dispatch flag to indicate first (no offset) vs. next (offset is present) fragment.
+ kSizeMask = 0x7ff, // 0b0111_1111_1111 (first 11 bits).
+ kOffsetMask = 0xfff8, // Clears the last 3 bits to ensure offset is a multiple of 8.
+ kSizeIndex = 0, // Start index of Size field in the Fragment Header byte sequence.
+ kTagIndex = 2, // Start index of Tag field in the Fragment Header byte sequence.
+ kOffsetIndex = 4, // Start index of Offset field in the Fragment Header byte sequence.
};
- uint16_t mDispatchSize;
+ uint16_t mSize;
uint16_t mTag;
- uint8_t mOffset;
-} OT_TOOL_PACKED_END;
+ uint16_t mOffset;
+};
/**
* @}
diff --git a/src/core/thread/mesh_forwarder.cpp b/src/core/thread/mesh_forwarder.cpp
index 5000bac..b4691f0 100644
--- a/src/core/thread/mesh_forwarder.cpp
+++ b/src/core/thread/mesh_forwarder.cpp
@@ -69,7 +69,6 @@
, mEnabled(false)
, mScanChannels(0)
, mScanChannel(0)
- , mMacRadioAcquisitionId(0)
, mRestorePanId(Mac::kPanIdBroadcast)
, mScanning(false)
#if OPENTHREAD_FTD
@@ -79,10 +78,7 @@
{
mFragTag = Random::NonCrypto::GetUint16();
- mIpCounters.mTxSuccess = 0;
- mIpCounters.mRxSuccess = 0;
- mIpCounters.mTxFailure = 0;
- mIpCounters.mRxFailure = 0;
+ ResetCounters();
#if OPENTHREAD_FTD
memset(mFragmentEntries, 0, sizeof(mFragmentEntries));
@@ -144,7 +140,7 @@
void MeshForwarder::RemoveMessage(Message &aMessage)
{
#if OPENTHREAD_FTD
- for (ChildTable::Iterator iter(GetInstance(), ChildTable::kInStateAnyExceptInvalid); !iter.IsDone(); iter++)
+ for (ChildTable::Iterator iter(GetInstance(), Child::kInStateAnyExceptInvalid); !iter.IsDone(); iter++)
{
IgnoreReturnValue(mIndirectSender.RemoveMessageFromSleepyChild(aMessage, *iter.GetChild()));
}
@@ -192,8 +188,6 @@
mScanChannel = Mac::ChannelMask::kChannelIteratorFirst;
mRestorePanId = Get<Mac::Mac>().GetPanId();
- SuccessOrExit(error = Get<Mac::Mac>().AcquireRadioChannel(&mMacRadioAcquisitionId));
-
mScanning = true;
if (mScanChannels.GetNextChannel(mScanChannel) != OT_ERROR_NONE)
@@ -289,13 +283,10 @@
VerifyOrExit(!ip6Header.GetSource().IsMulticast(), error = OT_ERROR_DROP);
- // 1. Choose correct MAC Source Address.
GetMacSourceAddress(ip6Header.GetSource(), mMacSource);
- // 2. Choose correct MAC Destination Address.
if (mle.GetRole() == OT_DEVICE_ROLE_DISABLED || mle.GetRole() == OT_DEVICE_ROLE_DETACHED)
{
- // Allow only for link-local unicasts and multicasts.
if (ip6Header.GetDestination().IsLinkLocal() || ip6Header.GetDestination().IsLinkLocalMulticast())
{
GetMacDestinationAddress(ip6Header.GetDestination(), mMacDest);
@@ -310,8 +301,10 @@
if (ip6Header.GetDestination().IsMulticast())
{
- // With the exception of MLE multicasts, a Thread End Device transmits multicasts,
- // as IEEE 802.15.4 unicasts to its parent.
+ // With the exception of MLE multicasts, an End Device
+ // transmits multicasts, as IEEE 802.15.4 unicasts to its
+ // parent.
+
if (mle.GetRole() == OT_DEVICE_ROLE_CHILD && !aMessage.IsSubTypeMle())
{
mMacDest.SetShort(mle.GetNextHop(Mac::kShortAddrBroadcast));
@@ -396,48 +389,6 @@
}
}
-otError MeshForwarder::GetMeshHeader(const uint8_t *&aFrame, uint16_t &aFrameLength, Lowpan::MeshHeader &aMeshHeader)
-{
- otError error;
-
- VerifyOrExit(aFrameLength >= 1 && reinterpret_cast<const Lowpan::MeshHeader *>(aFrame)->IsMeshHeader(),
- error = OT_ERROR_NOT_FOUND);
- SuccessOrExit(error = aMeshHeader.Init(aFrame, aFrameLength));
-
-exit:
- return error;
-}
-
-otError MeshForwarder::SkipMeshHeader(const uint8_t *&aFrame, uint16_t &aFrameLength)
-{
- otError error = OT_ERROR_NONE;
- Lowpan::MeshHeader meshHeader;
-
- VerifyOrExit(aFrameLength >= 1 && reinterpret_cast<const Lowpan::MeshHeader *>(aFrame)->IsMeshHeader());
-
- SuccessOrExit(error = meshHeader.Init(aFrame, aFrameLength));
- aFrame += meshHeader.GetHeaderLength();
- aFrameLength -= meshHeader.GetHeaderLength();
-
-exit:
- return error;
-}
-
-otError MeshForwarder::GetFragmentHeader(const uint8_t * aFrame,
- uint16_t aFrameLength,
- Lowpan::FragmentHeader &aFragmentHeader)
-{
- otError error = OT_ERROR_NONE;
-
- VerifyOrExit(aFrameLength >= 1 && reinterpret_cast<const Lowpan::FragmentHeader *>(aFrame)->IsFragmentHeader(),
- error = OT_ERROR_NOT_FOUND);
-
- SuccessOrExit(error = aFragmentHeader.Init(aFrame, aFrameLength));
-
-exit:
- return error;
-}
-
otError MeshForwarder::DecompressIp6Header(const uint8_t * aFrame,
uint16_t aFrameLength,
const Mac::Address &aMacSource,
@@ -449,16 +400,15 @@
otError error = OT_ERROR_NONE;
const uint8_t * start = aFrame;
Lowpan::FragmentHeader fragmentHeader;
+ uint16_t fragmentHeaderLength;
int headerLength;
- SuccessOrExit(error = SkipMeshHeader(aFrame, aFrameLength));
-
- if (GetFragmentHeader(aFrame, aFrameLength, fragmentHeader) == OT_ERROR_NONE)
+ if (fragmentHeader.ParseFrom(aFrame, aFrameLength, fragmentHeaderLength) == OT_ERROR_NONE)
{
- // only the first fragment header is followed by a LOWPAN_IPHC header
+ // Only the first fragment header is followed by a LOWPAN_IPHC header
VerifyOrExit(fragmentHeader.GetDatagramOffset() == 0, error = OT_ERROR_NOT_FOUND);
- aFrame += fragmentHeader.GetHeaderLength();
- aFrameLength -= fragmentHeader.GetHeaderLength();
+ aFrame += fragmentHeaderLength;
+ aFrameLength -= fragmentHeaderLength;
}
VerifyOrExit(aFrameLength >= 1 && Lowpan::Lowpan::IsLowpanHc(aFrame), error = OT_ERROR_NOT_FOUND);
@@ -486,7 +436,7 @@
case Message::kTypeIp6:
if (mSendMessage->GetSubType() == Message::kSubTypeMleDiscoverRequest)
{
- SuccessOrExit(error = Get<Mac::Mac>().SetRadioChannel(mMacRadioAcquisitionId, mScanChannel));
+ SuccessOrExit(error = Get<Mac::Mac>().SetTemporaryChannel(mScanChannel));
aFrame.SetChannel(mScanChannel);
@@ -496,14 +446,7 @@
// value.
if (mSendMessage->GetPanId() == Mac::kPanIdBroadcast && Get<Mac::Mac>().GetPanId() == Mac::kPanIdBroadcast)
{
- uint16_t panid;
-
- do
- {
- panid = Random::NonCrypto::GetUint16();
- } while (panid == Mac::kPanIdBroadcast);
-
- Get<Mac::Mac>().SetPanId(panid);
+ Get<Mac::Mac>().SetPanId(Mac::GenerateRandomPanId());
}
}
@@ -644,7 +587,8 @@
if (dstpan == Get<Mac::Mac>().GetPanId())
{
#if OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
- // Handle a special case in IEEE 802.15.4-2015, when Pan ID Compression is 0, but Src Pan ID is not present:
+ // Handle a special case in IEEE 802.15.4-2015, when PAN ID
+ // Compression is 0, but Src PAN ID is not present:
// Dest Address: Extended
// Src Address: Extended
// Dest Pan ID: Present
@@ -699,6 +643,7 @@
{
Mle::MleRouter & mle = Get<Mle::MleRouter>();
Lowpan::MeshHeader meshHeader;
+ uint16_t meshHeaderLength;
uint8_t hopsLeft;
if (mle.GetRole() == OT_DEVICE_ROLE_CHILD)
@@ -713,29 +658,26 @@
if (hopsLeft != Mle::kMaxRouteCost)
{
- hopsLeft += mle.GetLinkCost(Mle::Mle::GetRouterId(mle.GetNextHop(aMeshDest)));
+ hopsLeft += mle.GetLinkCost(Mle::Mle::RouterIdFromRloc16(mle.GetNextHop(aMeshDest)));
}
else
{
// In case there is no route to the destination router (only link).
- hopsLeft = mle.GetLinkCost(Mle::Mle::GetRouterId(aMeshDest));
+ hopsLeft = mle.GetLinkCost(Mle::Mle::RouterIdFromRloc16(aMeshDest));
}
}
- // The hopsLft field MUST be incremented by one if the destination RLOC16
- // is not that of an active Router.
+ // The hopsLft field MUST be incremented by one if the
+ // destination RLOC16 is not that of an active Router.
if (!Mle::Mle::IsActiveRouter(aMeshDest))
{
hopsLeft += 1;
}
- meshHeader.Init();
- meshHeader.SetHopsLeft(hopsLeft + Lowpan::MeshHeader::kAdditionalHopsLeft);
- meshHeader.SetSource(aMeshSource);
- meshHeader.SetDestination(aMeshDest);
- meshHeader.AppendTo(payload);
- payload += meshHeader.GetHeaderLength();
- headerLength += meshHeader.GetHeaderLength();
+ meshHeader.Init(aMeshSource, aMeshDest, hopsLeft + Lowpan::MeshHeader::kAdditionalHopsLeft);
+ meshHeaderLength = meshHeader.WriteTo(payload);
+ payload += meshHeaderLength;
+ headerLength += meshHeaderLength;
}
#endif
@@ -744,7 +686,7 @@
if (aMessage.GetOffset() == 0)
{
Lowpan::BufferWriter buffer(payload, aFrame.GetMaxPayloadLength() - headerLength -
- Lowpan::FragmentHeader::kInitialHeaderSize);
+ Lowpan::FragmentHeader::kFirstFragmentHeaderSize);
uint8_t hcLength;
Mac::Address meshSource, meshDest;
otError error;
@@ -756,8 +698,8 @@
}
else
{
- meshDest = aMacDest;
meshSource = aMacSource;
+ meshDest = aMacDest;
}
error = Get<Lowpan::Lowpan>().Compress(aMessage, meshSource, meshDest, buffer);
@@ -770,7 +712,7 @@
if (payloadLength > fragmentLength)
{
- Lowpan::FragmentHeader *fragmentHeader;
+ Lowpan::FragmentHeader fragmentHeader;
if ((!aMessage.IsLinkSecurityEnabled()) && aMessage.IsSubTypeMle())
{
@@ -792,16 +734,13 @@
aMessage.SetDatagramTag(mFragTag++);
}
- memmove(payload + Lowpan::FragmentHeader::kInitialHeaderSize, payload, hcLength);
+ memmove(payload + Lowpan::FragmentHeader::kFirstFragmentHeaderSize, payload, hcLength);
- fragmentHeader = reinterpret_cast<Lowpan::FragmentHeader *>(payload);
- fragmentHeader->Init();
- fragmentHeader->SetDatagramSize(aMessage.GetLength());
- fragmentHeader->SetDatagramTag(aMessage.GetDatagramTag());
- fragmentHeader->SetDatagramOffset(0);
+ fragmentHeader.InitFirstFragment(aMessage.GetLength(), static_cast<uint16_t>(aMessage.GetDatagramTag()));
+ fragmentHeader.WriteTo(payload);
- payload += fragmentHeader->GetHeaderLength();
- headerLength += fragmentHeader->GetHeaderLength();
+ payload += Lowpan::FragmentHeader::kFirstFragmentHeaderSize;
+ headerLength += Lowpan::FragmentHeader::kFirstFragmentHeaderSize;
payloadLength = (aFrame.GetMaxPayloadLength() - headerLength) & ~0x7;
}
@@ -809,26 +748,25 @@
// copy IPv6 Payload
aMessage.Read(aMessage.GetOffset(), payloadLength, payload);
- aFrame.SetPayloadLength(static_cast<uint8_t>(headerLength + payloadLength));
+ aFrame.SetPayloadLength(headerLength + payloadLength);
nextOffset = aMessage.GetOffset() + payloadLength;
aMessage.SetOffset(0);
}
else
{
- Lowpan::FragmentHeader *fragmentHeader;
+ Lowpan::FragmentHeader fragmentHeader;
+ uint16_t fragmentHeaderLength;
payloadLength = aMessage.GetLength() - aMessage.GetOffset();
// Write Fragment header
- fragmentHeader = reinterpret_cast<Lowpan::FragmentHeader *>(payload);
- fragmentHeader->Init();
- fragmentHeader->SetDatagramSize(aMessage.GetLength());
- fragmentHeader->SetDatagramTag(aMessage.GetDatagramTag());
- fragmentHeader->SetDatagramOffset(aMessage.GetOffset());
+ fragmentHeader.Init(aMessage.GetLength(), static_cast<uint16_t>(aMessage.GetDatagramTag()),
+ aMessage.GetOffset());
+ fragmentHeaderLength = fragmentHeader.WriteTo(payload);
- payload += fragmentHeader->GetHeaderLength();
- headerLength += fragmentHeader->GetHeaderLength();
+ payload += fragmentHeaderLength;
+ headerLength += fragmentHeaderLength;
fragmentLength = (aFrame.GetMaxPayloadLength() - headerLength) & ~0x7;
@@ -839,7 +777,7 @@
// Copy IPv6 Payload
aMessage.Read(aMessage.GetOffset(), payloadLength, payload);
- aFrame.SetPayloadLength(static_cast<uint8_t>(headerLength + payloadLength));
+ aFrame.SetPayloadLength(headerLength + payloadLength);
nextOffset = aMessage.GetOffset() + payloadLength;
}
@@ -897,8 +835,11 @@
VerifyOrExit(mEnabled);
- aFrame.GetDstAddr(macDest);
- neighbor = UpdateNeighborOnSentFrame(aFrame, aError, macDest);
+ if (!aFrame.IsEmpty())
+ {
+ aFrame.GetDstAddr(macDest);
+ neighbor = UpdateNeighborOnSentFrame(aFrame, aError, macDest);
+ }
VerifyOrExit(mSendMessage != NULL);
assert(mSendMessage->GetDirectTransmission());
@@ -1038,12 +979,7 @@
{
assert(mScanning);
- if (mMacRadioAcquisitionId)
- {
- Get<Mac::Mac>().ReleaseRadioChannel();
- mMacRadioAcquisitionId = 0;
- }
-
+ Get<Mac::Mac>().ClearTemporaryChannel();
Get<Mac::Mac>().SetPanId(mRestorePanId);
mScanning = false;
Get<Mle::MleRouter>().HandleDiscoverComplete();
@@ -1088,15 +1024,13 @@
switch (aFrame.GetType())
{
case Mac::Frame::kFcfFrameData:
- if (payloadLength >= sizeof(Lowpan::MeshHeader) &&
- reinterpret_cast<Lowpan::MeshHeader *>(payload)->IsMeshHeader())
+ if (Lowpan::MeshHeader::IsMeshHeader(payload, payloadLength))
{
#if OPENTHREAD_FTD
HandleMesh(payload, payloadLength, macSource, linkInfo);
#endif
}
- else if (payloadLength >= sizeof(Lowpan::FragmentHeader) &&
- reinterpret_cast<Lowpan::FragmentHeader *>(payload)->IsFragmentHeader())
+ else if (Lowpan::FragmentHeader::IsFragmentHeader(payload, payloadLength))
{
HandleFragment(payload, payloadLength, macSource, macDest, linkInfo);
}
@@ -1137,21 +1071,24 @@
{
otError error = OT_ERROR_NONE;
Lowpan::FragmentHeader fragmentHeader;
+ uint16_t fragmentHeaderLength;
Message * message = NULL;
- int headerLength;
// Check the fragment header
- VerifyOrExit(fragmentHeader.Init(aFrame, aFrameLength) == OT_ERROR_NONE, error = OT_ERROR_PARSE);
- aFrame += fragmentHeader.GetHeaderLength();
- aFrameLength -= fragmentHeader.GetHeaderLength();
+ SuccessOrExit(error = fragmentHeader.ParseFrom(aFrame, aFrameLength, fragmentHeaderLength));
+ aFrame += fragmentHeaderLength;
+ aFrameLength -= fragmentHeaderLength;
if (fragmentHeader.GetDatagramOffset() == 0)
{
uint8_t priority;
+ int headerLength;
SuccessOrExit(error = GetFramePriority(aFrame, aFrameLength, aMacSource, aMacDest, priority));
- VerifyOrExit((message = Get<MessagePool>().New(Message::kTypeIp6, 0, priority)) != NULL,
- error = OT_ERROR_NO_BUFS);
+
+ message = Get<MessagePool>().New(Message::kTypeIp6, 0, priority);
+ VerifyOrExit(message != NULL, error = OT_ERROR_NO_BUFS);
+
message->SetLinkSecurityEnabled(aLinkInfo.mLinkSecurity);
message->SetPanId(aLinkInfo.mPanId);
message->AddRss(aLinkInfo.mRss);
@@ -1172,8 +1109,6 @@
message->SetDatagramTag(fragmentHeader.GetDatagramTag());
message->SetTimeout(kReassemblyTimeout);
-
- // copy Fragment
message->Write(message->GetOffset(), aFrameLength, aFrame);
message->MoveOffset(aFrameLength);
@@ -1196,7 +1131,7 @@
mUpdateTimer.Start(kStateUpdatePeriod);
}
}
- else
+ else // Received frame is a "next fragment".
{
for (message = mReassemblyList.GetHead(); message; message = message->GetNext())
{
@@ -1217,17 +1152,13 @@
// message with a new tag. In either case, we can safely clear any
// remaining fragments stored in the reassembly list.
- if (!GetRxOnWhenIdle())
+ if (!GetRxOnWhenIdle() && (message == NULL) && aLinkInfo.mLinkSecurity)
{
- if ((message == NULL) && (aLinkInfo.mLinkSecurity))
- {
- ClearReassemblyList();
- }
+ ClearReassemblyList();
}
VerifyOrExit(message != NULL, error = OT_ERROR_DROP);
- // copy Fragment
message->Write(message->GetOffset(), aFrameLength, aFrame);
message->MoveOffset(aFrameLength);
message->AddRss(aLinkInfo.mRss);
diff --git a/src/core/thread/mesh_forwarder.hpp b/src/core/thread/mesh_forwarder.hpp
index 4516d19..772613a 100644
--- a/src/core/thread/mesh_forwarder.hpp
+++ b/src/core/thread/mesh_forwarder.hpp
@@ -297,6 +297,12 @@
*/
const otIpCounters &GetCounters(void) const { return mIpCounters; }
+ /**
+ * This method resets the IP level counters.
+ *
+ */
+ void ResetCounters(void) { memset(&mIpCounters, 0, sizeof(mIpCounters)); }
+
#if OPENTHREAD_FTD
/**
* This method returns a reference to the resolving queue.
@@ -339,8 +345,6 @@
const Mac::Address &aMeshSource,
const Mac::Address &aMeshDest);
- otError GetMeshHeader(const uint8_t *&aFrame, uint16_t &aFrameLength, Lowpan::MeshHeader &aMeshHeader);
- otError SkipMeshHeader(const uint8_t *&aFrame, uint16_t &aFrameLength);
otError DecompressIp6Header(const uint8_t * aFrame,
uint16_t aFrameLength,
const Mac::Address &aMacSource,
@@ -371,11 +375,6 @@
const Mac::Address & aMacSource,
const Mac::Address & aMacDest,
const otThreadLinkInfo &aLinkInfo);
-
- static otError GetFragmentHeader(const uint8_t * aFrame,
- uint16_t aFrameLength,
- Lowpan::FragmentHeader &aFragmentHeader);
-
uint16_t PrepareDataFrame(Mac::TxFrame & aFrame,
Message & aMessage,
const Mac::Address &aMacSource,
@@ -419,8 +418,8 @@
otError GetFragmentPriority(Lowpan::FragmentHeader &aFragmentHeader, uint16_t aSrcRloc16, uint8_t &aPriority);
otError GetForwardFramePriority(const uint8_t * aFrame,
uint16_t aFrameLength,
- const Mac::Address &aMacDest,
- const Mac::Address &aMacSource,
+ const Mac::Address &aMeshSource,
+ const Mac::Address &aMeshDest,
uint8_t & aPriority);
FragmentPriorityEntry *FindFragmentPriorityEntry(uint16_t aTag, uint16_t aSrcRloc16);
@@ -513,7 +512,6 @@
Mac::ChannelMask mScanChannels;
uint8_t mScanChannel;
- uint16_t mMacRadioAcquisitionId;
uint16_t mRestorePanId;
bool mScanning;
diff --git a/src/core/thread/mesh_forwarder_ftd.cpp b/src/core/thread/mesh_forwarder_ftd.cpp
index 46030e6..7bb0642 100644
--- a/src/core/thread/mesh_forwarder_ftd.cpp
+++ b/src/core/thread/mesh_forwarder_ftd.cpp
@@ -80,7 +80,7 @@
ip6Header.GetDestination() == mle.GetRealmLocalAllThreadNodesAddress())
{
// destined for all sleepy children
- for (ChildTable::Iterator iter(GetInstance(), ChildTable::kInStateValidOrRestoring); !iter.IsDone();
+ for (ChildTable::Iterator iter(GetInstance(), Child::kInStateValidOrRestoring); !iter.IsDone();
iter++)
{
Child &child = *iter.GetChild();
@@ -94,7 +94,7 @@
else
{
// destined for some sleepy children which subscribed the multicast address.
- for (ChildTable::Iterator iter(GetInstance(), ChildTable::kInStateValidOrRestoring); !iter.IsDone();
+ for (ChildTable::Iterator iter(GetInstance(), Child::kInStateValidOrRestoring); !iter.IsDone();
iter++)
{
Child &child = *iter.GetChild();
@@ -253,7 +253,7 @@
{
Lowpan::MeshHeader meshHeader;
- IgnoreReturnValue(meshHeader.Init(*message));
+ IgnoreReturnValue(meshHeader.ParseFrom(*message));
if (&aChild == static_cast<Child *>(mle.GetNeighbor(meshHeader.GetDestination())))
{
@@ -296,7 +296,7 @@
if (!(ip6Header.GetDestination().IsMulticast()))
{
- for (ChildTable::Iterator iter(GetInstance(), ChildTable::kInStateAnyExceptInvalid); !iter.IsDone(); iter++)
+ for (ChildTable::Iterator iter(GetInstance(), Child::kInStateAnyExceptInvalid); !iter.IsDone(); iter++)
{
IgnoreReturnValue(mIndirectSender.RemoveMessageFromSleepyChild(*message, *iter.GetChild()));
}
@@ -330,7 +330,7 @@
// write payload
assert(aMessage.GetLength() <= aFrame.GetMaxPayloadLength());
aMessage.Read(0, aMessage.GetLength(), aFrame.GetPayload());
- aFrame.SetPayloadLength(static_cast<uint8_t>(aMessage.GetLength()));
+ aFrame.SetPayloadLength(aMessage.GetLength());
mMessageNextOffset = aMessage.GetLength();
}
@@ -342,7 +342,7 @@
Neighbor * neighbor;
uint16_t nextHop;
- IgnoreReturnValue(meshHeader.Init(aMessage));
+ IgnoreReturnValue(meshHeader.ParseFrom(aMessage));
nextHop = Get<Mle::MleRouter>().GetNextHop(meshHeader.GetDestination());
@@ -380,7 +380,7 @@
if (mle.IsRoutingLocator(ip6Header.GetDestination()))
{
uint16_t rloc16 = HostSwap16(ip6Header.GetDestination().mFields.m16[7]);
- VerifyOrExit(mle.IsRouterIdValid(mle.GetRouterId(rloc16)), error = OT_ERROR_DROP);
+ VerifyOrExit(mle.IsRouterIdValid(Mle::Mle::RouterIdFromRloc16(rloc16)), error = OT_ERROR_DROP);
mMeshDest = rloc16;
}
else if (mle.IsAnycastLocator(ip6Header.GetDestination()))
@@ -389,14 +389,12 @@
if (aloc16 == Mle::kAloc16Leader)
{
- mMeshDest = Mle::Mle::GetRloc16(mle.GetLeaderId());
+ mMeshDest = Mle::Mle::Rloc16FromRouterId(mle.GetLeaderId());
}
else if ((aloc16 >= Mle::kAloc16CommissionerStart) && (aloc16 <= Mle::kAloc16CommissionerEnd))
{
SuccessOrExit(error = MeshCoP::GetBorderAgentRloc(Get<ThreadNetif>(), mMeshDest));
}
-
-#if OPENTHREAD_CONFIG_DHCP6_SERVER_ENABLE || OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE
else if (aloc16 <= Mle::kAloc16DhcpAgentEnd)
{
uint16_t agentRloc16;
@@ -405,28 +403,24 @@
static_cast<uint8_t>(aloc16 & Mle::kAloc16DhcpAgentMask), agentRloc16) == OT_ERROR_NONE),
error = OT_ERROR_DROP);
- routerId = Mle::Mle::GetRouterId(agentRloc16);
+ routerId = Mle::Mle::RouterIdFromRloc16(agentRloc16);
// if agent is active router or the child of the device
- if ((Mle::Mle::IsActiveRouter(agentRloc16)) || (Mle::Mle::GetRloc16(routerId) == mle.GetRloc16()))
+ if ((Mle::Mle::IsActiveRouter(agentRloc16)) || (Mle::Mle::Rloc16FromRouterId(routerId) == mle.GetRloc16()))
{
mMeshDest = agentRloc16;
}
else
{
// use the parent of the ED Agent as Dest
- mMeshDest = Mle::Mle::GetRloc16(routerId);
+ mMeshDest = Mle::Mle::Rloc16FromRouterId(routerId);
}
}
-
-#endif // OPENTHREAD_CONFIG_DHCP6_SERVER_ENABLE || OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
else if ((aloc16 >= Mle::kAloc16ServiceStart) && (aloc16 <= Mle::kAloc16ServiceEnd))
{
SuccessOrExit(error = GetDestinationRlocByServiceAloc(aloc16, mMeshDest));
}
-#endif
else
{
// TODO: support for Neighbor Discovery Agent ALOC
@@ -512,25 +506,25 @@
Mac::Address meshDest;
Mac::Address meshSource;
Lowpan::MeshHeader meshHeader;
-
- // Check the mesh header
- VerifyOrExit(meshHeader.Init(aFrame, aFrameLength) == OT_ERROR_NONE, error = OT_ERROR_PARSE);
+ uint16_t headerLength;
// Security Check: only process Mesh Header frames that had security enabled.
- VerifyOrExit(aLinkInfo.mLinkSecurity && meshHeader.IsValid(), error = OT_ERROR_SECURITY);
+ VerifyOrExit(aLinkInfo.mLinkSecurity, error = OT_ERROR_SECURITY);
+
+ SuccessOrExit(error = meshHeader.ParseFrom(aFrame, aFrameLength, headerLength));
meshSource.SetShort(meshHeader.GetSource());
meshDest.SetShort(meshHeader.GetDestination());
+ aFrame += headerLength;
+ aFrameLength -= headerLength;
+
UpdateRoutes(aFrame, aFrameLength, meshSource, meshDest);
if (meshDest.GetShort() == Get<Mac::Mac>().GetShortAddress() ||
Get<Mle::MleRouter>().IsMinimalChild(meshDest.GetShort()))
{
- aFrame += meshHeader.GetHeaderLength();
- aFrameLength -= meshHeader.GetHeaderLength();
-
- if (reinterpret_cast<Lowpan::FragmentHeader *>(aFrame)->IsFragmentHeader())
+ if (Lowpan::FragmentHeader::IsFragmentHeader(aFrame, aFrameLength))
{
HandleFragment(aFrame, aFrameLength, meshSource, meshDest, aLinkInfo);
}
@@ -545,20 +539,22 @@
}
else if (meshHeader.GetHopsLeft() > 0)
{
- uint8_t priority = kDefaultMsgPriority;
+ uint8_t priority = kDefaultMsgPriority;
+ uint16_t offset = 0;
Get<Mle::MleRouter>().ResolveRoutingLoops(aMacSource.GetShort(), meshDest.GetShort());
SuccessOrExit(error = CheckReachability(aFrame, aFrameLength, meshSource, meshDest));
- meshHeader.SetHopsLeft(meshHeader.GetHopsLeft() - 1);
- meshHeader.AppendTo(aFrame);
+ meshHeader.DecrementHopsLeft();
- GetForwardFramePriority(aFrame, aFrameLength, meshDest, meshSource, priority);
- VerifyOrExit((message = Get<MessagePool>().New(Message::kType6lowpan, priority)) != NULL,
- error = OT_ERROR_NO_BUFS);
- SuccessOrExit(error = message->SetLength(aFrameLength));
- message->Write(0, aFrameLength, aFrame);
+ GetForwardFramePriority(aFrame, aFrameLength, meshSource, meshDest, priority);
+ message = Get<MessagePool>().New(Message::kType6lowpan, priority);
+ VerifyOrExit(message != NULL, error = OT_ERROR_NO_BUFS);
+
+ SuccessOrExit(error = message->SetLength(meshHeader.GetHeaderLength() + aFrameLength));
+ offset += meshHeader.WriteTo(*message, offset);
+ message->Write(offset, aFrameLength, aFrame);
message->SetLinkSecurityEnabled(aLinkInfo.mLinkSecurity);
message->SetPanId(aLinkInfo.mPanId);
message->AddRss(aLinkInfo.mRss);
@@ -593,12 +589,32 @@
VerifyOrExit(!aMeshDest.IsBroadcast() && aMeshSource.IsShort());
SuccessOrExit(GetIp6Header(aFrame, aFrameLength, aMeshSource, aMeshDest, ip6Header));
- Get<AddressResolver>().UpdateCacheEntry(ip6Header.GetSource(), aMeshSource.GetShort());
+ if (!ip6Header.GetSource().IsRoutingLocator() && !ip6Header.GetSource().IsAnycastRoutingLocator() &&
+ Get<NetworkData::Leader>().IsOnMesh(ip6Header.GetSource()) /* only for on mesh address which may require AQ */)
+ {
+ if (Get<AddressResolver>().UpdateCacheEntry(ip6Header.GetSource(), aMeshSource.GetShort()) ==
+ OT_ERROR_NOT_FOUND)
+ {
+ // Thread 1.1 Specification 5.5.2.2: FTDs MAY add/update
+ // EID-to-RLOC Map Cache entries by inspecting packets
+ // being received. We exclude frames from an MTD child
+ // source and verify that the destination is the device
+ // itself or an MTD child of the device.
+
+ if (Get<Mle::MleRouter>().IsFullThreadDevice() &&
+ !Get<Mle::MleRouter>().IsMinimalChild(aMeshSource.GetShort()) &&
+ (aMeshDest.GetShort() == Get<Mac::Mac>().GetShortAddress() ||
+ Get<Mle::MleRouter>().IsMinimalChild(aMeshDest.GetShort())))
+ {
+ Get<AddressResolver>().AddCacheEntry(ip6Header.GetSource(), aMeshSource.GetShort());
+ }
+ }
+ }
neighbor = Get<Mle::MleRouter>().GetNeighbor(ip6Header.GetSource());
VerifyOrExit(neighbor != NULL && !neighbor->IsFullThreadDevice());
- if (Mle::Mle::GetRouterId(aMeshSource.GetShort()) != Mle::Mle::GetRouterId(Get<Mac::Mac>().GetShortAddress()))
+ if (!Mle::Mle::RouterIdMatch(aMeshSource.GetShort(), Get<Mac::Mac>().GetShortAddress()))
{
Get<Mle::MleRouter>().RemoveNeighbor(*neighbor);
}
@@ -611,13 +627,13 @@
{
bool shouldRun = false;
- for (size_t i = 0; i < OT_ARRAY_LENGTH(mFragmentEntries); i++)
+ for (FragmentPriorityEntry *entry = &mFragmentEntries[0]; entry < OT_ARRAY_END(mFragmentEntries); entry++)
{
- if (mFragmentEntries[i].GetLifetime() != 0)
+ if (entry->GetLifetime() != 0)
{
- mFragmentEntries[i].DecrementLifetime();
+ entry->DecrementLifetime();
- if (mFragmentEntries[i].GetLifetime() != 0)
+ if (entry->GetLifetime() != 0)
{
shouldRun = true;
}
@@ -666,33 +682,38 @@
FragmentPriorityEntry *MeshForwarder::FindFragmentPriorityEntry(uint16_t aTag, uint16_t aSrcRloc16)
{
- size_t i;
+ FragmentPriorityEntry *entry;
- for (i = 0; i < OT_ARRAY_LENGTH(mFragmentEntries); i++)
+ for (entry = &mFragmentEntries[0]; entry < OT_ARRAY_END(mFragmentEntries); entry++)
{
- if ((mFragmentEntries[i].GetLifetime() != 0) && (mFragmentEntries[i].GetDatagramTag() == aTag) &&
- (mFragmentEntries[i].GetSrcRloc16() == aSrcRloc16))
+ if ((entry->GetLifetime() != 0) && (entry->GetDatagramTag() == aTag) && (entry->GetSrcRloc16() == aSrcRloc16))
{
- break;
+ ExitNow();
}
}
- return (i >= OT_ARRAY_LENGTH(mFragmentEntries)) ? NULL : &mFragmentEntries[i];
+ entry = NULL;
+
+exit:
+ return entry;
}
FragmentPriorityEntry *MeshForwarder::GetUnusedFragmentPriorityEntry(void)
{
- size_t i;
+ FragmentPriorityEntry *entry;
- for (i = 0; i < OT_ARRAY_LENGTH(mFragmentEntries); i++)
+ for (entry = &mFragmentEntries[0]; entry < OT_ARRAY_END(mFragmentEntries); entry++)
{
- if (mFragmentEntries[i].GetLifetime() == 0)
+ if (entry->GetLifetime() == 0)
{
- break;
+ ExitNow();
}
}
- return (i >= OT_ARRAY_LENGTH(mFragmentEntries)) ? NULL : &mFragmentEntries[i];
+ entry = NULL;
+
+exit:
+ return entry;
}
otError MeshForwarder::GetFragmentPriority(Lowpan::FragmentHeader &aFragmentHeader,
@@ -702,8 +723,8 @@
otError error = OT_ERROR_NONE;
FragmentPriorityEntry *entry;
- VerifyOrExit((entry = FindFragmentPriorityEntry(aFragmentHeader.GetDatagramTag(), aSrcRloc16)) != NULL,
- error = OT_ERROR_NOT_FOUND);
+ entry = FindFragmentPriorityEntry(aFragmentHeader.GetDatagramTag(), aSrcRloc16);
+ VerifyOrExit(entry != NULL, error = OT_ERROR_NOT_FOUND);
aPriority = entry->GetPriority();
exit:
@@ -712,55 +733,50 @@
otError MeshForwarder::GetForwardFramePriority(const uint8_t * aFrame,
uint16_t aFrameLength,
- const Mac::Address &aMacDest,
- const Mac::Address &aMacSource,
+ const Mac::Address &aMeshSource,
+ const Mac::Address &aMeshDest,
uint8_t & aPriority)
{
otError error = OT_ERROR_NONE;
bool isFragment = false;
- Lowpan::MeshHeader meshHeader;
Lowpan::FragmentHeader fragmentHeader;
+ uint16_t fragmentHeaderLength;
- SuccessOrExit(error = GetMeshHeader(aFrame, aFrameLength, meshHeader));
- aFrame += meshHeader.GetHeaderLength();
- aFrameLength -= meshHeader.GetHeaderLength();
-
- if (GetFragmentHeader(aFrame, aFrameLength, fragmentHeader) == OT_ERROR_NONE)
+ if (fragmentHeader.ParseFrom(aFrame, aFrameLength, fragmentHeaderLength) == OT_ERROR_NONE)
{
isFragment = true;
- aFrame += fragmentHeader.GetHeaderLength();
- aFrameLength -= fragmentHeader.GetHeaderLength();
+ aFrame += fragmentHeaderLength;
+ aFrameLength -= fragmentHeaderLength;
if (fragmentHeader.GetDatagramOffset() > 0)
{
// Get priority from the pre-buffered info
- ExitNow(error = GetFragmentPriority(fragmentHeader, meshHeader.GetSource(), aPriority));
+ ExitNow(error = GetFragmentPriority(fragmentHeader, aMeshSource.GetShort(), aPriority));
}
}
// Get priority from IPv6 header or UDP destination port directly
- error = GetFramePriority(aFrame, aFrameLength, aMacSource, aMacDest, aPriority);
+ error = GetFramePriority(aFrame, aFrameLength, aMeshSource, aMeshDest, aPriority);
exit:
if (error != OT_ERROR_NONE)
{
- otLogNoteMac("Failed to get forwarded frame priority, error:%s, len:%d, dst:%s, src:%s",
- otThreadErrorToString(error), aFrameLength, aMacDest.ToString().AsCString(),
- aMacSource.ToString().AsCString());
+ otLogNoteMac("Failed to get forwarded frame priority, error:%s, len:%d, src:%d, dst:%s",
+ otThreadErrorToString(error), aFrameLength, aMeshSource.ToString().AsCString(),
+ aMeshDest.ToString().AsCString());
}
else if (isFragment)
{
- UpdateFragmentPriority(fragmentHeader, aFrameLength, meshHeader.GetSource(), aPriority);
+ UpdateFragmentPriority(fragmentHeader, aFrameLength, aMeshSource.GetShort(), aPriority);
}
return error;
}
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
otError MeshForwarder::GetDestinationRlocByServiceAloc(uint16_t aServiceAloc, uint16_t &aMeshDest)
{
otError error = OT_ERROR_NONE;
- uint8_t serviceId = Mle::Mle::GetServiceIdFromAloc(aServiceAloc);
+ uint8_t serviceId = Mle::Mle::ServiceIdFromAloc(aServiceAloc);
NetworkData::ServiceTlv *serviceTlv = Get<NetworkData::Leader>().FindServiceById(serviceId);
if (serviceTlv != NULL)
@@ -814,7 +830,6 @@
exit:
return error;
}
-#endif // OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
// LCOV_EXCL_START
@@ -834,19 +849,19 @@
bool shouldLogRss;
Lowpan::MeshHeader meshHeader;
Lowpan::FragmentHeader fragmentHeader;
+ uint16_t headerLength;
- SuccessOrExit(meshHeader.Init(aMessage));
- VerifyOrExit(meshHeader.IsMeshHeader());
+ SuccessOrExit(meshHeader.ParseFrom(aMessage, headerLength));
aMeshSource.SetShort(meshHeader.GetSource());
aMeshDest.SetShort(meshHeader.GetDestination());
- aOffset = meshHeader.GetHeaderLength();
+ aOffset = headerLength;
- if (fragmentHeader.Init(aMessage, aOffset) == OT_ERROR_NONE)
+ if (fragmentHeader.ParseFrom(aMessage, aOffset, headerLength) == OT_ERROR_NONE)
{
hasFragmentHeader = true;
- aOffset += fragmentHeader.GetHeaderLength();
+ aOffset += headerLength;
}
shouldLogRss = (aAction == kMessageReceive) || (aAction == kMessageReassemblyDrop);
diff --git a/src/core/thread/mle.cpp b/src/core/thread/mle.cpp
index cac8b44..715cf77 100644
--- a/src/core/thread/mle.cpp
+++ b/src/core/thread/mle.cpp
@@ -45,7 +45,6 @@
#include "common/random.hpp"
#include "common/settings.hpp"
#include "crypto/aes_ccm.hpp"
-#include "mac/mac_frame.hpp"
#include "meshcop/meshcop.hpp"
#include "meshcop/meshcop_tlvs.hpp"
#include "net/netif.hpp"
@@ -115,20 +114,15 @@
{
otMeshLocalPrefix meshLocalPrefix;
- memset(&mLeaderData, 0, sizeof(mLeaderData));
- memset(&mParentLeaderData, 0, sizeof(mParentLeaderData));
- memset(&mParent, 0, sizeof(mParent));
+ mLeaderData.Clear();
+ mParentLeaderData.Clear();
+ mParent.Clear();
memset(&mChildIdRequest, 0, sizeof(mChildIdRequest));
- memset(&mLinkLocal64, 0, sizeof(mLinkLocal64));
- memset(&mMeshLocal64, 0, sizeof(mMeshLocal64));
- memset(&mMeshLocal16, 0, sizeof(mMeshLocal16));
- memset(&mLinkLocalAllThreadNodes, 0, sizeof(mLinkLocalAllThreadNodes));
- memset(&mRealmLocalAllThreadNodes, 0, sizeof(mRealmLocalAllThreadNodes));
- memset(&mLeaderAloc, 0, sizeof(mLeaderAloc));
- memset(&mParentCandidate, 0, sizeof(mParentCandidate));
+ mParentCandidate.Clear();
ResetCounters();
// link-local 64
+ mLinkLocal64.Clear();
mLinkLocal64.GetAddress().mFields.m16[0] = HostSwap16(0xfe80);
mLinkLocal64.GetAddress().SetIid(Get<Mac::Mac>().GetExtAddress());
mLinkLocal64.mPrefixLength = 64;
@@ -136,6 +130,7 @@
mLinkLocal64.mValid = true;
// Leader Aloc
+ mLeaderAloc.Clear();
mLeaderAloc.mPrefixLength = 64;
mLeaderAloc.mPreferred = true;
mLeaderAloc.mValid = true;
@@ -147,8 +142,7 @@
// Service Alocs
for (size_t i = 0; i < OT_ARRAY_LENGTH(mServiceAlocs); i++)
{
- memset(&mServiceAlocs[i], 0, sizeof(mServiceAlocs[i]));
-
+ mServiceAlocs[i].Clear();
mServiceAlocs[i].mPrefixLength = 64;
mServiceAlocs[i].mPreferred = true;
mServiceAlocs[i].mValid = true;
@@ -166,6 +160,7 @@
meshLocalPrefix.m8[7] = 0x00;
// mesh-local 64
+ mMeshLocal64.Clear();
Random::NonCrypto::FillBuffer(mMeshLocal64.GetAddress().mFields.m8 + OT_IP6_PREFIX_SIZE,
OT_IP6_ADDRESS_SIZE - OT_IP6_PREFIX_SIZE);
@@ -176,6 +171,7 @@
mMeshLocal64.mScopeOverrideValid = true;
// mesh-local 16
+ mMeshLocal16.Clear();
mMeshLocal16.GetAddress().mFields.m16[4] = HostSwap16(0x0000);
mMeshLocal16.GetAddress().mFields.m16[5] = HostSwap16(0x00ff);
mMeshLocal16.GetAddress().mFields.m16[6] = HostSwap16(0xfe00);
@@ -190,11 +186,13 @@
Get<Ip6::Mpl>().SetMatchingAddress(mMeshLocal16.GetAddress());
// link-local all thread nodes
+ mLinkLocalAllThreadNodes.Clear();
mLinkLocalAllThreadNodes.GetAddress().mFields.m16[0] = HostSwap16(0xff32);
mLinkLocalAllThreadNodes.GetAddress().mFields.m16[6] = HostSwap16(0x0000);
mLinkLocalAllThreadNodes.GetAddress().mFields.m16[7] = HostSwap16(0x0001);
// realm-local all thread nodes
+ mRealmLocalAllThreadNodes.Clear();
mRealmLocalAllThreadNodes.GetAddress().mFields.m16[0] = HostSwap16(0xff33);
mRealmLocalAllThreadNodes.GetAddress().mFields.m16[6] = HostSwap16(0x0000);
mRealmLocalAllThreadNodes.GetAddress().mFields.m16[7] = HostSwap16(0x0001);
@@ -203,10 +201,6 @@
// `SetMeshLocalPrefix()` also adds the Mesh-Local EID and subscribes
// to the Link- and Realm-Local All Thread Nodes multicast addresses.
-
-#if OPENTHREAD_CONFIG_PARENT_SEARCH_ENABLE
- StartParentSearchTimer();
-#endif
}
otError Mle::Enable(void)
@@ -219,6 +213,9 @@
SuccessOrExit(error = mSocket.Open(&Mle::HandleUdpReceive, this));
SuccessOrExit(error = mSocket.Bind(sockaddr));
+#if OPENTHREAD_CONFIG_PARENT_SEARCH_ENABLE
+ StartParentSearchTimer();
+#endif
exit:
return error;
}
@@ -317,12 +314,11 @@
void Mle::SetRole(otDeviceRole aRole)
{
- VerifyOrExit(aRole != mRole, Get<Notifier>().SignalIfFirst(OT_CHANGED_THREAD_ROLE));
+ otDeviceRole oldRole = mRole;
- otLogNoteMle("Role %s -> %s", RoleToString(mRole), RoleToString(aRole));
+ SuccessOrExit(Get<Notifier>().Update(mRole, aRole, OT_CHANGED_THREAD_ROLE));
- mRole = aRole;
- Get<Notifier>().Signal(OT_CHANGED_THREAD_ROLE);
+ otLogNoteMle("Role %s -> %s", RoleToString(oldRole), RoleToString(mRole));
switch (mRole)
{
@@ -355,7 +351,7 @@
#endif
exit:
- return;
+ OT_UNUSED_VARIABLE(oldRole);
}
void Mle::SetAttachState(AttachState aState)
@@ -423,11 +419,11 @@
ExitNow();
}
- memset(&mParent, 0, sizeof(mParent));
+ mParent.Clear();
mParent.SetExtAddress(*static_cast<Mac::ExtAddress *>(&parentInfo.mExtAddress));
mParent.SetDeviceMode(DeviceMode(DeviceMode::kModeFullThreadDevice | DeviceMode::kModeRxOnWhenIdle |
DeviceMode::kModeFullNetworkData | DeviceMode::kModeSecureDataRequest));
- mParent.SetRloc16(GetRloc16(GetRouterId(networkInfo.mRloc16)));
+ mParent.SetRloc16(Rloc16FromRouterId(RouterIdFromRloc16(networkInfo.mRloc16)));
mParent.SetState(Neighbor::kStateRestored);
#if OPENTHREAD_CONFIG_MLE_INFORM_PREVIOUS_PARENT_ON_REATTACH
@@ -436,7 +432,7 @@
}
else
{
- Get<MleRouter>().SetRouterId(GetRouterId(GetRloc16()));
+ Get<MleRouter>().SetRouterId(RouterIdFromRloc16(GetRloc16()));
Get<MleRouter>().SetPreviousPartitionId(networkInfo.mPreviousPartitionId);
Get<MleRouter>().RestoreChildren();
}
@@ -450,7 +446,7 @@
otError error = OT_ERROR_NONE;
Settings::NetworkInfo networkInfo;
- memset(&networkInfo, 0, sizeof(networkInfo));
+ networkInfo.Clear();
if (IsAttached())
{
@@ -468,7 +464,7 @@
{
Settings::ParentInfo parentInfo;
- memset(&parentInfo, 0, sizeof(parentInfo));
+ parentInfo.Clear();
parentInfo.mExtAddress = mParent.GetExtAddress();
SuccessOrExit(error = Get<Settings>().SaveParentInfo(parentInfo));
@@ -560,12 +556,12 @@
discoveryRequest.Init();
discoveryRequest.SetVersion(kThreadVersion);
discoveryRequest.SetJoiner(aJoiner);
- SuccessOrExit(error = message->AppendTlv(discoveryRequest));
+ SuccessOrExit(error = discoveryRequest.AppendTo(*message));
tlv.SetLength(static_cast<uint8_t>(message->GetLength() - startOffset));
message->Write(startOffset - sizeof(tlv), sizeof(tlv), &tlv);
- memset(&destination, 0, sizeof(destination));
+ destination.Clear();
destination.mFields.m16[0] = HostSwap16(0xff02);
destination.mFields.m16[7] = HostSwap16(0x0002);
SuccessOrExit(error = SendMessage(*message, destination));
@@ -627,7 +623,7 @@
otError error = OT_ERROR_NONE;
VerifyOrExit(mRole != OT_DEVICE_ROLE_DISABLED, error = OT_ERROR_INVALID_STATE);
- VerifyOrExit(mAttachState == kAttachStateIdle, error = OT_ERROR_BUSY);
+ VerifyOrExit(!IsAttaching(), error = OT_ERROR_BUSY);
if (mReattachState == kReattachStart)
{
@@ -641,7 +637,7 @@
}
}
- ResetParentCandidate();
+ mParentCandidate.Clear();
SetAttachState(kAttachStateStart);
mParentRequestMode = aMode;
@@ -966,17 +962,27 @@
void Mle::SetRloc16(uint16_t aRloc16)
{
+ uint16_t oldRloc16 = GetRloc16();
+
+ if (aRloc16 != oldRloc16)
+ {
+ otLogNoteMle("RLOC16 %04x -> %04x", oldRloc16, aRloc16);
+ }
+
Get<ThreadNetif>().RemoveUnicastAddress(mMeshLocal16);
+ Get<Mac::Mac>().SetShortAddress(aRloc16);
+ Get<Ip6::Mpl>().SetSeedId(aRloc16);
+
if (aRloc16 != Mac::kShortAddrInvalid)
{
// mesh-local 16
mMeshLocal16.GetAddress().mFields.m16[7] = HostSwap16(aRloc16);
Get<ThreadNetif>().AddUnicastAddress(mMeshLocal16);
+#if OPENTHREAD_FTD
+ Get<AddressResolver>().RestartAddressQueries();
+#endif
}
-
- Get<Mac::Mac>().SetShortAddress(aRloc16);
- Get<Ip6::Mpl>().SetSeedId(aRloc16);
}
void Mle::SetLeaderData(uint32_t aPartitionId, uint8_t aWeighting, uint8_t aLeaderRouterId)
@@ -1007,7 +1013,7 @@
aAddress.mFields.m16[4] = HostSwap16(0x0000);
aAddress.mFields.m16[5] = HostSwap16(0x00ff);
aAddress.mFields.m16[6] = HostSwap16(0xfe00);
- aAddress.mFields.m16[7] = HostSwap16(GetRloc16(mLeaderData.GetLeaderRouterId()));
+ aAddress.mFields.m16[7] = HostSwap16(Rloc16FromRouterId(mLeaderData.GetLeaderRouterId()));
exit:
return error;
@@ -1026,7 +1032,6 @@
return error;
}
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
otError Mle::GetServiceAloc(uint8_t aServiceId, Ip6::Address &aAddress) const
{
otError error = OT_ERROR_NONE;
@@ -1037,12 +1042,11 @@
aAddress.mFields.m16[4] = HostSwap16(0x0000);
aAddress.mFields.m16[5] = HostSwap16(0x00ff);
aAddress.mFields.m16[6] = HostSwap16(0xfe00);
- aAddress.mFields.m16[7] = HostSwap16(GetServiceAlocFromId(aServiceId));
+ aAddress.mFields.m16[7] = HostSwap16(ServiceAlocFromId(aServiceId));
exit:
return error;
}
-#endif
otError Mle::AddLeaderAloc(void)
{
@@ -1128,7 +1132,7 @@
tlv.Init();
tlv.SetRloc16(GetRloc16());
- return aMessage.AppendTlv(tlv);
+ return tlv.AppendTo(aMessage);
}
otError Mle::AppendStatus(Message &aMessage, StatusTlv::Status aStatus)
@@ -1138,7 +1142,7 @@
tlv.Init();
tlv.SetStatus(aStatus);
- return aMessage.AppendTlv(tlv);
+ return tlv.AppendTo(aMessage);
}
otError Mle::AppendMode(Message &aMessage, DeviceMode aMode)
@@ -1148,7 +1152,7 @@
tlv.Init();
tlv.SetMode(aMode);
- return aMessage.AppendTlv(tlv);
+ return tlv.AppendTo(aMessage);
}
otError Mle::AppendTimeout(Message &aMessage, uint32_t aTimeout)
@@ -1158,7 +1162,7 @@
tlv.Init();
tlv.SetTimeout(aTimeout);
- return aMessage.AppendTlv(tlv);
+ return tlv.AppendTo(aMessage);
}
otError Mle::AppendChallenge(Message &aMessage, const uint8_t *aChallenge, uint8_t aChallengeLength)
@@ -1197,7 +1201,7 @@
tlv.Init();
tlv.SetFrameCounter(Get<KeyManager>().GetMacFrameCounter());
- return aMessage.AppendTlv(tlv);
+ return tlv.AppendTo(aMessage);
}
otError Mle::AppendMleFrameCounter(Message &aMessage)
@@ -1207,7 +1211,7 @@
tlv.Init();
tlv.SetFrameCounter(Get<KeyManager>().GetMleFrameCounter());
- return aMessage.AppendTlv(tlv);
+ return tlv.AppendTo(aMessage);
}
otError Mle::AppendAddress16(Message &aMessage, uint16_t aRloc16)
@@ -1217,7 +1221,7 @@
tlv.Init();
tlv.SetRloc16(aRloc16);
- return aMessage.AppendTlv(tlv);
+ return tlv.AppendTo(aMessage);
}
otError Mle::AppendLeaderData(Message &aMessage)
@@ -1226,7 +1230,7 @@
mLeaderData.SetDataVersion(Get<NetworkData::Leader>().GetVersion());
mLeaderData.SetStableDataVersion(Get<NetworkData::Leader>().GetStableVersion());
- return aMessage.AppendTlv(mLeaderData);
+ return mLeaderData.AppendTo(aMessage);
}
void Mle::FillNetworkDataTlv(NetworkDataTlv &aTlv, bool aStableOnly)
@@ -1248,7 +1252,7 @@
tlv.Init();
FillNetworkDataTlv(tlv, aStableOnly);
- error = aMessage.AppendTlv(tlv);
+ error = tlv.AppendTo(aMessage);
exit:
return error;
@@ -1276,7 +1280,7 @@
tlv.Init();
tlv.SetMask(aScanMask);
- return aMessage.AppendTlv(tlv);
+ return tlv.AppendTo(aMessage);
}
otError Mle::AppendLinkMargin(Message &aMessage, uint8_t aLinkMargin)
@@ -1286,7 +1290,7 @@
tlv.Init();
tlv.SetLinkMargin(aLinkMargin);
- return aMessage.AppendTlv(tlv);
+ return tlv.AppendTo(aMessage);
}
otError Mle::AppendVersion(Message &aMessage)
@@ -1296,7 +1300,7 @@
tlv.Init();
tlv.SetVersion(kThreadVersion);
- return aMessage.AppendTlv(tlv);
+ return tlv.AppendTo(aMessage);
}
bool Mle::HasUnregisteredAddress(void)
@@ -1336,7 +1340,6 @@
Tlv tlv;
AddressRegistrationEntry entry;
Lowpan::Context context;
- bool done = false;
uint8_t length = 0;
uint8_t counter = 0;
uint16_t startOffset = aMessage.GetLength();
@@ -1344,25 +1347,24 @@
tlv.SetType(Tlv::kAddressRegistration);
SuccessOrExit(error = aMessage.Append(&tlv, sizeof(tlv)));
+ // Prioritize ML-EID
+ entry.SetContextId(kMeshLocalPrefixContextId);
+ entry.SetIid(GetMeshLocal64().GetIid());
+ SuccessOrExit(error = aMessage.Append(&entry, entry.GetLength()));
+ length += entry.GetLength();
+
+ // Continue to append the other addresses if not `kAppendMeshLocalOnly` mode
+ VerifyOrExit(aMode != kAppendMeshLocalOnly);
+ counter++;
+
for (const Ip6::NetifUnicastAddress *addr = Get<ThreadNetif>().GetUnicastAddresses(); addr; addr = addr->GetNext())
{
if (addr->GetAddress().IsLinkLocal() || IsRoutingLocator(addr->GetAddress()) ||
- IsAnycastLocator(addr->GetAddress()))
+ IsAnycastLocator(addr->GetAddress()) || addr->GetAddress() == GetMeshLocal64())
{
continue;
}
- if (aMode == kAppendMeshLocalOnly)
- {
- if (addr->GetAddress() != GetMeshLocal64())
- {
- continue;
- }
-
- // Set `done` to `true` to exit after the address is appended.
- done = true;
- }
-
if (Get<NetworkData::Leader>().GetContext(addr->GetAddress(), context) == OT_ERROR_NONE)
{
// compressed entry
@@ -1380,7 +1382,7 @@
length += entry.GetLength();
counter++;
// only continue to append if there is available entry.
- VerifyOrExit(!done && (counter < OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER));
+ VerifyOrExit(counter < OPENTHREAD_CONFIG_MLE_IP_ADDRS_TO_REGISTER);
}
// For sleepy end device, register external multicast addresses to the parent for indirect transmission
@@ -1421,7 +1423,7 @@
tlv.Init();
- return aMessage.AppendTlv(tlv);
+ return tlv.AppendTo(aMessage);
}
otError Mle::AppendTimeParameter(Message &aMessage)
@@ -1432,7 +1434,7 @@
tlv.SetTimeSyncPeriod(Get<TimeSync>().GetTimeSyncPeriod());
tlv.SetXtalThreshold(Get<TimeSync>().GetXtalThreshold());
- return aMessage.AppendTlv(tlv);
+ return tlv.AppendTo(aMessage);
}
otError Mle::AppendXtalAccuracy(Message &aMessage)
@@ -1442,7 +1444,7 @@
tlv.Init();
tlv.SetXtalAccuracy(otPlatTimeGetXtalAccuracy());
- return aMessage.AppendTlv(tlv);
+ return tlv.AppendTo(aMessage);
}
#endif // OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
@@ -1457,7 +1459,7 @@
timestampTlv.Init();
*static_cast<MeshCoP::Timestamp *>(×tampTlv) = *timestamp;
- error = aMessage.AppendTlv(timestampTlv);
+ error = timestampTlv.AppendTo(aMessage);
exit:
return error;
@@ -1474,7 +1476,7 @@
timestampTlv.Init();
*static_cast<MeshCoP::Timestamp *>(×tampTlv) = *timestamp;
- error = aMessage.AppendTlv(timestampTlv);
+ error = timestampTlv.AppendTo(aMessage);
exit:
return error;
@@ -1523,7 +1525,7 @@
}
}
- if ((aFlags & (OT_CHANGED_IP6_MULTICAST_SUBSRCRIBED | OT_CHANGED_IP6_MULTICAST_UNSUBSRCRIBED)) != 0)
+ if ((aFlags & (OT_CHANGED_IP6_MULTICAST_SUBSCRIBED | OT_CHANGED_IP6_MULTICAST_UNSUBSCRIBED)) != 0)
{
if (mRole == OT_DEVICE_ROLE_CHILD && !IsFullThreadDevice() && !IsRxOnWhenIdle())
{
@@ -1588,7 +1590,7 @@
uint16_t serviceAloc = 0;
uint8_t serviceId = 0;
int i = 0;
- otNetworkDataIterator serviceIterator = OT_NETWORK_DATA_ITERATOR_INIT;
+ NetworkData::Iterator serviceIterator = NetworkData::kIteratorInit;
int serviceAlocsLength = OT_ARRAY_LENGTH(mServiceAlocs);
VerifyOrExit(mRole != OT_DEVICE_ROLE_DISABLED);
@@ -1599,7 +1601,7 @@
serviceAloc = HostSwap16(mServiceAlocs[i].GetAddress().mFields.m16[7]);
if ((serviceAloc != Mac::kShortAddrInvalid) &&
- (!Get<NetworkData::Leader>().ContainsService(Mle::GetServiceIdFromAloc(serviceAloc), rloc)))
+ (!Get<NetworkData::Leader>().ContainsService(Mle::ServiceIdFromAloc(serviceAloc), rloc)))
{
Get<ThreadNetif>().RemoveUnicastAddress(mServiceAlocs[i]);
mServiceAlocs[i].GetAddress().mFields.m16[7] = HostSwap16(Mac::kShortAddrInvalid);
@@ -1607,13 +1609,13 @@
}
// Now add any missing service alocs which should be there, if there is enough space in mServiceAlocs
- while (Get<NetworkData::Leader>().GetNextServiceId(&serviceIterator, rloc, &serviceId) == OT_ERROR_NONE)
+ while (Get<NetworkData::Leader>().GetNextServiceId(serviceIterator, rloc, serviceId) == OT_ERROR_NONE)
{
for (i = 0; i < serviceAlocsLength; i++)
{
serviceAloc = HostSwap16(mServiceAlocs[i].GetAddress().mFields.m16[7]);
- if ((serviceAloc != Mac::kShortAddrInvalid) && (Mle::GetServiceIdFromAloc(serviceAloc) == serviceId))
+ if ((serviceAloc != Mac::kShortAddrInvalid) && (Mle::ServiceIdFromAloc(serviceAloc) == serviceId))
{
break;
}
@@ -1675,7 +1677,7 @@
// parent.
if ((linkQuality == 3 || mAttachState != kAttachStateParentRequestRouter) &&
- mParentCandidate.GetState() == Neighbor::kStateParentResponse &&
+ mParentCandidate.IsStateParentResponse() &&
(mRole != OT_DEVICE_ROLE_CHILD || mReceivedResponseFromParent || mParentRequestMode == kAttachBetter) &&
SendChildIdRequest() == OT_ERROR_NONE)
{
@@ -1763,7 +1765,7 @@
case kAttachStateChildIdRequest:
SetAttachState(kAttachStateIdle);
- ResetParentCandidate();
+ mParentCandidate.Clear();
delay = Reattach();
break;
}
@@ -1883,22 +1885,22 @@
void Mle::HandleDelayedResponseTimer(void)
{
DelayedResponseHeader delayedResponse;
- uint32_t now = TimerMilli::GetNow();
- uint32_t nextDelay = TimerMilli::kForeverDt;
- Message * message = mDelayedResponses.GetHead();
- Message * nextMessage = NULL;
+ TimeMilli now = TimerMilli::GetNow();
+ TimeMilli nextSendTime = now.GetDistantFuture();
+ Message * message;
+ Message * nextMessage;
- while (message != NULL)
+ for (message = mDelayedResponses.GetHead(); message != NULL; message = nextMessage)
{
nextMessage = message->GetNext();
+
delayedResponse.ReadFrom(*message);
- if (delayedResponse.IsLater(now))
+ if (now < delayedResponse.GetSendTime())
{
- // Calculate the next delay and choose the lowest.
- if (delayedResponse.GetSendTime() - now < nextDelay)
+ if (nextSendTime > delayedResponse.GetSendTime())
{
- nextDelay = delayedResponse.GetSendTime() - now;
+ nextSendTime = delayedResponse.GetSendTime();
}
}
else
@@ -1914,7 +1916,7 @@
LogMleMessage("Send delayed message", delayedResponse.GetDestination());
// Here enters fast poll mode, as for Rx-Off-when-idle device, the enqueued msg should
- // be Mle Data Reqeuest.
+ // be Mle Data Request.
// Note: Finer-grade check (e.g. message subtype) might be required when deciding whether
// or not enters fast poll mode fast poll mode if there are other type of delayed message
// for Rx-Off-when-idle device.
@@ -1928,13 +1930,11 @@
message->Free();
}
}
-
- message = nextMessage;
}
- if (nextDelay != TimerMilli::kForeverDt)
+ if (nextSendTime < now.GetDistantFuture())
{
- mDelayedResponseTimer.Start(nextDelay);
+ mDelayedResponseTimer.FireAt(nextSendTime);
}
}
@@ -1968,7 +1968,7 @@
uint8_t scanMask = 0;
Ip6::Address destination;
- Random::NonCrypto::FillBuffer(mParentRequest.mChallenge, sizeof(mParentRequest.mChallenge));
+ Random::Crypto::FillBuffer(mParentRequest.mChallenge, sizeof(mParentRequest.mChallenge));
switch (aType)
{
@@ -1991,7 +1991,7 @@
SuccessOrExit(error = AppendTimeRequest(*message));
#endif
- memset(&destination, 0, sizeof(destination));
+ destination.Clear();
destination.mFields.m16[0] = HostSwap16(0xff02);
destination.mFields.m16[7] = HostSwap16(0x0002);
SuccessOrExit(error = SendMessage(*message, destination));
@@ -2076,7 +2076,7 @@
mParentCandidate.SetState(Neighbor::kStateValid);
- memset(&destination, 0, sizeof(destination));
+ destination.Clear();
destination.mFields.m16[0] = HostSwap16(0xfe80);
destination.SetIid(mParentCandidate.GetExtAddress());
SuccessOrExit(error = SendMessage(*message, destination));
@@ -2183,8 +2183,8 @@
if ((mRole == OT_DEVICE_ROLE_CHILD) && IsRxOnWhenIdle())
{
- interval = TimerMilli::SecToMsec(mTimeout) -
- static_cast<uint32_t>(kUnicastRetransmissionDelay) * kMaxChildKeepAliveAttempts;
+ interval =
+ Time::SecToMsec(mTimeout) - static_cast<uint32_t>(kUnicastRetransmissionDelay) * kMaxChildKeepAliveAttempts;
}
exit:
@@ -2222,7 +2222,7 @@
VerifyOrExit(mDataRequestAttempts < kMaxChildKeepAliveAttempts, BecomeDetached());
- memset(&destination, 0, sizeof(destination));
+ destination.Clear();
destination.mFields.m16[0] = HostSwap16(0xfe80);
destination.SetIid(mParent.GetExtAddress());
@@ -2295,7 +2295,7 @@
switch (mRole)
{
case OT_DEVICE_ROLE_DETACHED:
- Random::NonCrypto::FillBuffer(mParentRequest.mChallenge, sizeof(mParentRequest.mChallenge));
+ Random::Crypto::FillBuffer(mParentRequest.mChallenge, sizeof(mParentRequest.mChallenge));
SuccessOrExit(error = AppendChallenge(*message, mParentRequest.mChallenge, sizeof(mParentRequest.mChallenge)));
break;
@@ -2312,7 +2312,7 @@
break;
}
- memset(&destination, 0, sizeof(destination));
+ destination.Clear();
destination.mFields.m16[0] = HostSwap16(0xfe80);
destination.SetIid(mParent.GetExtAddress());
SuccessOrExit(error = SendMessage(*message, destination));
@@ -2359,6 +2359,10 @@
SuccessOrExit(error = AppendTimeout(*message, mTimeout));
break;
+ case Tlv::kStatus:
+ SuccessOrExit(error = AppendStatus(*message, StatusTlv::kError));
+ break;
+
case Tlv::kAddressRegistration:
if (!IsFullThreadDevice())
{
@@ -2387,7 +2391,7 @@
}
}
- memset(&destination, 0, sizeof(destination));
+ destination.Clear();
destination.mFields.m16[0] = HostSwap16(0xfe80);
destination.SetIid(mParent.GetExtAddress());
SuccessOrExit(error = SendMessage(*message, destination));
@@ -2413,7 +2417,7 @@
{
Ip6::Address destination;
- memset(&destination, 0, sizeof(destination));
+ destination.Clear();
destination.mFields.m16[0] = HostSwap16(0xff02);
destination.mFields.m16[7] = HostSwap16(0x0001);
@@ -2437,7 +2441,7 @@
channel.Init();
channel.SetChannel(Get<Mac::Mac>().GetPanChannel());
- SuccessOrExit(error = message->AppendTlv(channel));
+ SuccessOrExit(error = channel.AppendTo(*message));
if (aOrphanAnnounce)
{
@@ -2446,7 +2450,7 @@
activeTimestamp.SetTicks(0);
activeTimestamp.SetAuthoritative(true);
- SuccessOrExit(error = message->AppendTlv(activeTimestamp));
+ SuccessOrExit(error = activeTimestamp.AppendTo(*message));
}
else
{
@@ -2455,7 +2459,7 @@
panid.Init();
panid.SetPanId(Get<Mac::Mac>().GetPanId());
- SuccessOrExit(error = message->AppendTlv(panid));
+ SuccessOrExit(error = panid.AppendTo(*message));
SuccessOrExit(error = SendMessage(*message, aDestination));
otLogInfoMle("Send Announce on channel %d", aChannel);
@@ -2554,30 +2558,13 @@
otError Mle::AddDelayedResponse(Message &aMessage, const Ip6::Address &aDestination, uint16_t aDelay)
{
- otError error = OT_ERROR_NONE;
- uint32_t alarmFireTime;
- uint32_t sendTime = TimerMilli::GetNow() + aDelay;
+ otError error = OT_ERROR_NONE;
+ DelayedResponseHeader delayedResponse(TimerMilli::GetNow() + aDelay, aDestination);
- // Append the message with DelayedRespnoseHeader and add to the list.
- DelayedResponseHeader delayedResponse(sendTime, aDestination);
SuccessOrExit(error = delayedResponse.AppendTo(aMessage));
mDelayedResponses.Enqueue(aMessage);
- if (mDelayedResponseTimer.IsRunning())
- {
- // If timer is already running, check if it should be restarted with earlier fire time.
- alarmFireTime = mDelayedResponseTimer.GetFireTime();
-
- if (delayedResponse.IsEarlier(alarmFireTime))
- {
- mDelayedResponseTimer.Start(aDelay);
- }
- }
- else
- {
- // Otherwise just set the timer.
- mDelayedResponseTimer.Start(aDelay);
- }
+ mDelayedResponseTimer.FireAtIfEarlier(delayedResponse.GetSendTime());
exit:
return error;
@@ -2591,6 +2578,7 @@
void Mle::HandleUdpReceive(Message &aMessage, const Ip6::MessageInfo &aMessageInfo)
{
+ otError error = OT_ERROR_NONE;
Header header;
uint32_t keySequence;
const uint8_t * mleKey;
@@ -2607,11 +2595,13 @@
uint8_t command;
Neighbor * neighbor;
+ otLogDebgMle("Receive UDP message");
+
VerifyOrExit(aMessageInfo.GetLinkInfo() != NULL);
- VerifyOrExit(aMessageInfo.GetHopLimit() == kMleHopLimit);
+ VerifyOrExit(aMessageInfo.GetHopLimit() == kMleHopLimit, error = OT_ERROR_PARSE);
length = aMessage.Read(aMessage.GetOffset(), sizeof(header), &header);
- VerifyOrExit(header.IsValid() && header.GetLength() <= length);
+ VerifyOrExit(header.IsValid() && header.GetLength() <= length, error = OT_ERROR_PARSE);
if (header.GetSecuritySuite() == Header::kNoSecurity)
{
@@ -2634,7 +2624,8 @@
ExitNow();
}
- VerifyOrExit(mRole != OT_DEVICE_ROLE_DISABLED && header.GetSecuritySuite() == Header::k154Security);
+ VerifyOrExit(mRole != OT_DEVICE_ROLE_DISABLED, error = OT_ERROR_INVALID_STATE);
+ VerifyOrExit(header.GetSecuritySuite() == Header::k154Security, error = OT_ERROR_PARSE);
keySequence = header.GetKeyId();
@@ -2647,20 +2638,22 @@
mleKey = Get<KeyManager>().GetTemporaryMleKey(keySequence);
}
- VerifyOrExit(aMessage.GetOffset() + header.GetLength() + sizeof(messageTag) <= aMessage.GetLength());
+ VerifyOrExit(aMessage.GetOffset() + header.GetLength() + sizeof(messageTag) <= aMessage.GetLength(),
+ error = OT_ERROR_PARSE);
aMessage.MoveOffset(header.GetLength() - 1);
aMessage.Read(aMessage.GetLength() - sizeof(messageTag), sizeof(messageTag), messageTag);
- SuccessOrExit(aMessage.SetLength(aMessage.GetLength() - sizeof(messageTag)));
+ SuccessOrExit(error = aMessage.SetLength(aMessage.GetLength() - sizeof(messageTag)));
aMessageInfo.GetPeerAddr().ToExtAddress(macAddr);
frameCounter = header.GetFrameCounter();
KeyManager::GenerateNonce(macAddr, frameCounter, Mac::Frame::kSecEncMic32, nonce);
aesCcm.SetKey(mleKey, 16);
- SuccessOrExit(
- aesCcm.Init(sizeof(aMessageInfo.GetPeerAddr()) + sizeof(aMessageInfo.GetSockAddr()) + header.GetHeaderLength(),
- aMessage.GetLength() - aMessage.GetOffset(), sizeof(messageTag), nonce, sizeof(nonce)));
+ SuccessOrExit(error = aesCcm.Init(sizeof(aMessageInfo.GetPeerAddr()) + sizeof(aMessageInfo.GetSockAddr()) +
+ header.GetHeaderLength(),
+ aMessage.GetLength() - aMessage.GetOffset(), sizeof(messageTag), nonce,
+ sizeof(nonce)));
aesCcm.Header(&aMessageInfo.GetPeerAddr(), sizeof(aMessageInfo.GetPeerAddr()));
aesCcm.Header(&aMessageInfo.GetSockAddr(), sizeof(aMessageInfo.GetSockAddr()));
@@ -2681,7 +2674,7 @@
tagLength = sizeof(tag);
aesCcm.Finalize(tag, &tagLength);
#ifndef FUZZING_BUILD_MODE_UNSAFE_FOR_PRODUCTION
- VerifyOrExit(memcmp(messageTag, tag, sizeof(tag)) == 0);
+ VerifyOrExit(memcmp(messageTag, tag, sizeof(tag)) == 0, error = OT_ERROR_SECURITY);
#endif
if (keySequence > Get<KeyManager>().GetCurrentKeySequence())
@@ -2719,67 +2712,46 @@
break;
}
- if (neighbor != NULL && neighbor->GetState() == Neighbor::kStateValid)
+ if (neighbor != NULL && neighbor->IsStateValid())
{
if (keySequence == neighbor->GetKeySequence())
{
- if (frameCounter < neighbor->GetMleFrameCounter())
- {
- otLogDebgMle("mle frame reject 1");
- ExitNow();
- }
+ VerifyOrExit(frameCounter >= neighbor->GetMleFrameCounter(), error = OT_ERROR_DUPLICATED);
}
else
{
- if (keySequence <= neighbor->GetKeySequence())
- {
- otLogDebgMle("mle frame reject 2");
- ExitNow();
- }
-
+ VerifyOrExit(keySequence > neighbor->GetKeySequence(), error = OT_ERROR_DUPLICATED);
neighbor->SetKeySequence(keySequence);
neighbor->SetLinkFrameCounter(0);
}
neighbor->SetMleFrameCounter(frameCounter + 1);
}
- else
- {
- if (!(command == Header::kCommandLinkRequest || command == Header::kCommandLinkAccept ||
- command == Header::kCommandLinkAcceptAndRequest || command == Header::kCommandAdvertisement ||
- command == Header::kCommandParentRequest || command == Header::kCommandParentResponse ||
- command == Header::kCommandChildIdRequest || command == Header::kCommandChildUpdateRequest ||
- command == Header::kCommandChildUpdateResponse || command == Header::kCommandAnnounce))
- {
- otLogDebgMle("mle sequence unknown! %d", command);
- ExitNow();
- }
- }
switch (command)
{
case Header::kCommandLinkRequest:
- Get<MleRouter>().HandleLinkRequest(aMessage, aMessageInfo);
+ Get<MleRouter>().HandleLinkRequest(aMessage, aMessageInfo, neighbor);
break;
case Header::kCommandLinkAccept:
- Get<MleRouter>().HandleLinkAccept(aMessage, aMessageInfo, keySequence);
+ Get<MleRouter>().HandleLinkAccept(aMessage, aMessageInfo, keySequence, neighbor);
break;
case Header::kCommandLinkAcceptAndRequest:
- Get<MleRouter>().HandleLinkAcceptAndRequest(aMessage, aMessageInfo, keySequence);
+ Get<MleRouter>().HandleLinkAcceptAndRequest(aMessage, aMessageInfo, keySequence, neighbor);
break;
case Header::kCommandAdvertisement:
- HandleAdvertisement(aMessage, aMessageInfo);
+ HandleAdvertisement(aMessage, aMessageInfo, neighbor);
break;
case Header::kCommandDataRequest:
- Get<MleRouter>().HandleDataRequest(aMessage, aMessageInfo);
+ Get<MleRouter>().HandleDataRequest(aMessage, aMessageInfo, neighbor);
break;
case Header::kCommandDataResponse:
- HandleDataResponse(aMessage, aMessageInfo);
+ HandleDataResponse(aMessage, aMessageInfo, neighbor);
break;
case Header::kCommandParentRequest:
@@ -2795,7 +2767,7 @@
break;
case Header::kCommandChildIdResponse:
- HandleChildIdResponse(aMessage, aMessageInfo);
+ HandleChildIdResponse(aMessage, aMessageInfo, neighbor);
break;
case Header::kCommandChildUpdateRequest:
@@ -2805,7 +2777,7 @@
}
else
{
- HandleChildUpdateRequest(aMessage, aMessageInfo);
+ HandleChildUpdateRequest(aMessage, aMessageInfo, neighbor);
}
break;
@@ -2813,11 +2785,11 @@
case Header::kCommandChildUpdateResponse:
if (mRole == OT_DEVICE_ROLE_LEADER || mRole == OT_DEVICE_ROLE_ROUTER)
{
- Get<MleRouter>().HandleChildUpdateResponse(aMessage, aMessageInfo, keySequence);
+ Get<MleRouter>().HandleChildUpdateResponse(aMessage, aMessageInfo, keySequence, neighbor);
}
else
{
- HandleChildUpdateResponse(aMessage, aMessageInfo);
+ HandleChildUpdateResponse(aMessage, aMessageInfo, neighbor);
}
break;
@@ -2828,21 +2800,24 @@
#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
case Header::kCommandTimeSync:
- Get<MleRouter>().HandleTimeSync(aMessage, aMessageInfo);
+ Get<MleRouter>().HandleTimeSync(aMessage, aMessageInfo, neighbor);
break;
#endif
}
exit:
+
+ if (error != OT_ERROR_NONE)
+ {
+ otLogNoteMle("Failed to process UDP: %s", otThreadErrorToString(error));
+ }
+
return;
}
-otError Mle::HandleAdvertisement(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo)
+otError Mle::HandleAdvertisement(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo, Neighbor *aNeighbor)
{
otError error = OT_ERROR_NONE;
- Mac::ExtAddress macAddr;
- bool isNeighbor;
- Neighbor * neighbor;
SourceAddressTlv sourceAddress;
LeaderDataTlv leaderData;
RouteTlv route;
@@ -2859,38 +2834,27 @@
SuccessOrExit(error = Tlv::GetTlv(aMessage, Tlv::kLeaderData, sizeof(leaderData), leaderData));
VerifyOrExit(leaderData.IsValid(), error = OT_ERROR_PARSE);
- aMessageInfo.GetPeerAddr().ToExtAddress(macAddr);
-
if (mRole != OT_DEVICE_ROLE_DETACHED)
{
if (IsFullThreadDevice())
{
- SuccessOrExit(error = Get<MleRouter>().HandleAdvertisement(aMessage, aMessageInfo));
+ SuccessOrExit(error = Get<MleRouter>().HandleAdvertisement(aMessage, aMessageInfo, aNeighbor));
}
- else
+ else if ((aNeighbor == &mParent) && (mParent.GetRloc16() != sourceAddress.GetRloc16()))
{
// Remove stale parent.
- if (GetNeighbor(macAddr) == static_cast<Neighbor *>(&mParent) &&
- mParent.GetRloc16() != sourceAddress.GetRloc16())
- {
- BecomeDetached();
- }
+ BecomeDetached();
}
}
- isNeighbor = false;
-
switch (mRole)
{
case OT_DEVICE_ROLE_DISABLED:
case OT_DEVICE_ROLE_DETACHED:
- break;
+ ExitNow();
case OT_DEVICE_ROLE_CHILD:
- if (mParent.GetExtAddress() != macAddr)
- {
- break;
- }
+ VerifyOrExit(aNeighbor == &mParent);
if ((mParent.GetRloc16() == sourceAddress.GetRloc16()) &&
(leaderData.GetPartitionId() != mLeaderData.GetPartitionId() ||
@@ -2908,46 +2872,48 @@
mRetrieveNewNetworkData = true;
}
- isNeighbor = true;
mParent.SetLastHeard(TimerMilli::GetNow());
break;
case OT_DEVICE_ROLE_ROUTER:
case OT_DEVICE_ROLE_LEADER:
- if ((neighbor = Get<MleRouter>().GetNeighbor(macAddr)) != NULL && neighbor->GetState() == Neighbor::kStateValid)
- {
- isNeighbor = true;
- }
-
+ VerifyOrExit(aNeighbor && aNeighbor->IsStateValid());
break;
}
- if (isNeighbor)
+ if (mRetrieveNewNetworkData || IsNetworkDataNewer(leaderData))
{
- if (mRetrieveNewNetworkData ||
- (static_cast<int8_t>(leaderData.GetDataVersion() - Get<NetworkData::Leader>().GetVersion()) > 0))
- {
- delay = Random::NonCrypto::GetUint16InRange(0, kMleMaxResponseDelay);
- SendDataRequest(aMessageInfo.GetPeerAddr(), tlvs, sizeof(tlvs), delay);
- }
+ delay = Random::NonCrypto::GetUint16InRange(0, kMleMaxResponseDelay);
+ SendDataRequest(aMessageInfo.GetPeerAddr(), tlvs, sizeof(tlvs), delay);
}
+#if OPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE || OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
+ else
+ {
+ Get<NetworkData::Local>().SendServerDataNotification();
+ }
+#endif
exit:
+
+ if (error != OT_ERROR_NONE)
+ {
+ otLogWarnMle("Failed to process Advertisement: %s", otThreadErrorToString(error));
+ }
+
return error;
}
-otError Mle::HandleDataResponse(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo)
+otError Mle::HandleDataResponse(const Message & aMessage,
+ const Ip6::MessageInfo &aMessageInfo,
+ const Neighbor * aNeighbor)
{
otError error;
LogMleMessage("Receive Data Response", aMessageInfo.GetPeerAddr());
- error = HandleLeaderData(aMessage, aMessageInfo);
+ VerifyOrExit(aNeighbor && aNeighbor->IsStateValid(), error = OT_ERROR_SECURITY);
- if (error != OT_ERROR_NONE)
- {
- otLogWarnMleErr(error, "Failed to process Data Response");
- }
+ error = HandleLeaderData(aMessage, aMessageInfo);
if (mDataRequestState == kDataRequestNone && !IsRxOnWhenIdle())
{
@@ -2959,9 +2925,32 @@
IgnoreReturnValue(Get<DataPollSender>().StopFastPolls());
}
+exit:
+
+ if (error != OT_ERROR_NONE)
+ {
+ otLogWarnMle("Failed to process Data Response: %s", otThreadErrorToString(error));
+ }
+
return error;
}
+bool Mle::IsNetworkDataNewer(const LeaderDataTlv &aLeaderData)
+{
+ int8_t diff;
+
+ if (IsFullNetworkData())
+ {
+ diff = static_cast<int8_t>(aLeaderData.GetDataVersion() - Get<NetworkData::Leader>().GetVersion());
+ }
+ else
+ {
+ diff = static_cast<int8_t>(aLeaderData.GetStableDataVersion() - Get<NetworkData::Leader>().GetStableVersion());
+ }
+
+ return (diff > 0);
+}
+
otError Mle::HandleLeaderData(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo)
{
otError error = OT_ERROR_NONE;
@@ -2993,19 +2982,7 @@
}
else if (!mRetrieveNewNetworkData)
{
- int8_t diff;
-
- if (IsFullNetworkData())
- {
- diff = static_cast<int8_t>(leaderData.GetDataVersion() - Get<NetworkData::Leader>().GetVersion());
- }
- else
- {
- diff =
- static_cast<int8_t>(leaderData.GetStableDataVersion() - Get<NetworkData::Leader>().GetStableVersion());
- }
-
- VerifyOrExit(diff > 0);
+ VerifyOrExit(IsNetworkDataNewer(leaderData));
}
// Active Timestamp
@@ -3168,12 +3145,6 @@
return rval;
}
-void Mle::ResetParentCandidate(void)
-{
- memset(&mParentCandidate, 0, sizeof(mParentCandidate));
- mParentCandidate.SetState(Neighbor::kStateInvalid);
-}
-
otError Mle::HandleParentResponse(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo, uint32_t aKeySequence)
{
otError error = OT_ERROR_NONE;
@@ -3285,8 +3256,7 @@
// Continue to process the "ParentResponse" if it is from current
// parent candidate to update the challenge and frame counters.
- if ((mParentCandidate.GetState() == Neighbor::kStateParentResponse) &&
- (mParentCandidate.GetExtAddress() != extAddress))
+ if (mParentCandidate.IsStateParentResponse() && (mParentCandidate.GetExtAddress() != extAddress))
{
// if already have a candidate parent, only seek a better parent
@@ -3372,13 +3342,15 @@
if (error != OT_ERROR_NONE)
{
- otLogWarnMleErr(error, "Failed to process Parent Response");
+ otLogWarnMle("Failed to process Parent Response: %s", otThreadErrorToString(error));
}
return error;
}
-otError Mle::HandleChildIdResponse(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo)
+otError Mle::HandleChildIdResponse(const Message & aMessage,
+ const Ip6::MessageInfo &aMessageInfo,
+ const Neighbor * aNeighbor)
{
OT_UNUSED_VARIABLE(aMessageInfo);
@@ -3399,6 +3371,8 @@
LogMleMessage("Receive Child ID Response", aMessageInfo.GetPeerAddr(), sourceAddress.GetRloc16());
+ VerifyOrExit(aNeighbor && aNeighbor->IsStateValid(), error = OT_ERROR_SECURITY);
+
VerifyOrExit(mAttachState == kAttachStateChildIdRequest);
// Leader Data
@@ -3480,7 +3454,7 @@
}
mParent = mParentCandidate;
- ResetParentCandidate();
+ mParentCandidate.Clear();
mParent.SetRloc16(sourceAddress.GetRloc16());
@@ -3493,21 +3467,21 @@
if (error != OT_ERROR_NONE)
{
- otLogWarnMleErr(error, "Failed to process Child ID Response");
+ otLogWarnMle("Failed to process Child ID Response: %s", otThreadErrorToString(error));
}
return error;
}
-otError Mle::HandleChildUpdateRequest(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo)
+otError Mle::HandleChildUpdateRequest(const Message & aMessage,
+ const Ip6::MessageInfo &aMessageInfo,
+ Neighbor * aNeighbor)
{
- static const uint8_t kMaxResponseTlvs = 5;
+ static const uint8_t kMaxResponseTlvs = 6;
otError error = OT_ERROR_NONE;
- Mac::ExtAddress srcAddr;
SourceAddressTlv sourceAddress;
ChallengeTlv challenge;
- StatusTlv status;
TlvRequestTlv tlvRequest;
uint8_t tlvs[kMaxResponseTlvs] = {};
uint8_t numTlvs = 0;
@@ -3518,51 +3492,77 @@
LogMleMessage("Receive Child Update Request from parent", aMessageInfo.GetPeerAddr(), sourceAddress.GetRloc16());
- VerifyOrExit(mParent.GetRloc16() == sourceAddress.GetRloc16(), error = OT_ERROR_DROP);
-
- // Leader Data, Network Data, Active Timestamp, Pending Timestamp
- SuccessOrExit(error = HandleLeaderData(aMessage, aMessageInfo));
-
- // Status
- if (Tlv::GetTlv(aMessage, Tlv::kStatus, sizeof(status), status) == OT_ERROR_NONE)
- {
- VerifyOrExit(status.IsValid(), error = OT_ERROR_PARSE);
-
- aMessageInfo.GetPeerAddr().ToExtAddress(srcAddr);
- VerifyOrExit(mParent.GetExtAddress() == srcAddr, error = OT_ERROR_DROP);
-
- if (status.GetStatus() == StatusTlv::kError)
- {
- BecomeDetached();
- ExitNow();
- }
- }
-
- // TLV Request
- if (Tlv::GetTlv(aMessage, Tlv::kTlvRequest, sizeof(tlvRequest), tlvRequest) == OT_ERROR_NONE)
- {
- VerifyOrExit(tlvRequest.IsValid() && tlvRequest.GetLength() <= sizeof(tlvs), error = OT_ERROR_PARSE);
- memcpy(tlvs, tlvRequest.GetTlvs(), tlvRequest.GetLength());
- numTlvs += tlvRequest.GetLength();
- }
-
// Challenge
if (Tlv::GetTlv(aMessage, Tlv::kChallenge, sizeof(challenge), challenge) == OT_ERROR_NONE)
{
VerifyOrExit(challenge.IsValid(), error = OT_ERROR_PARSE);
- VerifyOrExit(static_cast<size_t>(numTlvs + 3) <= sizeof(tlvs), error = OT_ERROR_NO_BUFS);
tlvs[numTlvs++] = Tlv::kResponse;
tlvs[numTlvs++] = Tlv::kMleFrameCounter;
tlvs[numTlvs++] = Tlv::kLinkFrameCounter;
}
+ if (aNeighbor == &mParent)
+ {
+ StatusTlv status;
+
+ if (Tlv::GetTlv(aMessage, Tlv::kStatus, sizeof(status), status) == OT_ERROR_NONE)
+ {
+ VerifyOrExit(status.IsValid(), error = OT_ERROR_PARSE);
+
+ if (status.GetStatus() == StatusTlv::kError)
+ {
+ BecomeDetached();
+ ExitNow();
+ }
+ }
+
+ if (mParent.GetRloc16() != sourceAddress.GetRloc16())
+ {
+ BecomeDetached();
+ ExitNow();
+ }
+
+ // Leader Data, Network Data, Active Timestamp, Pending Timestamp
+ SuccessOrExit(error = HandleLeaderData(aMessage, aMessageInfo));
+ }
+ else
+ {
+ // this device is not a child of the Child Update Request source
+ tlvs[numTlvs++] = Tlv::kStatus;
+ }
+
+ // TLV Request
+ if (Tlv::GetTlv(aMessage, Tlv::kTlvRequest, sizeof(tlvRequest), tlvRequest) == OT_ERROR_NONE)
+ {
+ VerifyOrExit(tlvRequest.IsValid(), error = OT_ERROR_PARSE);
+
+ for (uint8_t i = 0; i < tlvRequest.GetLength(); i++)
+ {
+ if (numTlvs >= sizeof(tlvs))
+ {
+ otLogWarnMle("Failed to respond with TLVs: %d of %d", i, tlvRequest.GetLength());
+ break;
+ }
+
+ tlvs[numTlvs++] = tlvRequest.GetTlvs()[i];
+ }
+ }
+
SuccessOrExit(error = SendChildUpdateResponse(tlvs, numTlvs, challenge));
exit:
+
+ if (error != OT_ERROR_NONE)
+ {
+ otLogWarnMle("Failed to process Child Update Request from parent: %s", otThreadErrorToString(error));
+ }
+
return error;
}
-otError Mle::HandleChildUpdateResponse(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo)
+otError Mle::HandleChildUpdateResponse(const Message & aMessage,
+ const Ip6::MessageInfo &aMessageInfo,
+ const Neighbor * aNeighbor)
{
otError error = OT_ERROR_NONE;
StatusTlv status;
@@ -3575,6 +3575,25 @@
LogMleMessage("Receive Child Update Response from parent", aMessageInfo.GetPeerAddr());
+ switch (mRole)
+ {
+ case OT_DEVICE_ROLE_DETACHED:
+ VerifyOrExit(
+ (Tlv::GetTlv(aMessage, Tlv::kResponse, sizeof(response), response) == OT_ERROR_NONE) &&
+ (response.IsValid()) &&
+ (!memcmp(response.GetResponse(), mParentRequest.mChallenge, sizeof(mParentRequest.mChallenge))),
+ error = OT_ERROR_SECURITY);
+ break;
+
+ case OT_DEVICE_ROLE_CHILD:
+ VerifyOrExit((aNeighbor == &mParent) && mParent.IsStateValid(), error = OT_ERROR_SECURITY);
+ break;
+
+ default:
+ assert(false);
+ break;
+ }
+
// Status
if (Tlv::GetTlv(aMessage, Tlv::kStatus, sizeof(status), status) == OT_ERROR_NONE)
{
@@ -3587,22 +3606,9 @@
VerifyOrExit(mode.IsValid(), error = OT_ERROR_PARSE);
VerifyOrExit(mode.GetMode() == mDeviceMode, error = OT_ERROR_DROP);
- if (mChildUpdateRequestState == kChildUpdateRequestActive)
- {
- mChildUpdateAttempts = 0;
- mChildUpdateRequestState = kChildUpdateRequestNone;
- ScheduleMessageTransmissionTimer();
- }
-
switch (mRole)
{
case OT_DEVICE_ROLE_DETACHED:
- // Response
- SuccessOrExit(error = Tlv::GetTlv(aMessage, Tlv::kResponse, sizeof(response), response));
- VerifyOrExit(response.IsValid(), error = OT_ERROR_PARSE);
- VerifyOrExit(memcmp(response.GetResponse(), mParentRequest.mChallenge, sizeof(mParentRequest.mChallenge)) == 0,
- error = OT_ERROR_DROP);
-
SuccessOrExit(error =
Tlv::GetTlv(aMessage, Tlv::kLinkFrameCounter, sizeof(linkFrameCounter), linkFrameCounter));
VerifyOrExit(linkFrameCounter.IsValid(), error = OT_ERROR_PARSE);
@@ -3631,7 +3637,7 @@
SuccessOrExit(error = Tlv::GetTlv(aMessage, Tlv::kSourceAddress, sizeof(sourceAddress), sourceAddress));
VerifyOrExit(sourceAddress.IsValid(), error = OT_ERROR_PARSE);
- if (GetRouterId(sourceAddress.GetRloc16()) != GetRouterId(GetRloc16()))
+ if (RouterIdFromRloc16(sourceAddress.GetRloc16()) != RouterIdFromRloc16(GetRloc16()))
{
BecomeDetached();
ExitNow();
@@ -3666,9 +3672,18 @@
exit:
- if (error != OT_ERROR_NONE)
+ if (error == OT_ERROR_NONE)
{
- otLogWarnMleErr(error, "Failed to process Child Update Response");
+ if (mChildUpdateRequestState == kChildUpdateRequestActive)
+ {
+ mChildUpdateAttempts = 0;
+ mChildUpdateRequestState = kChildUpdateRequestNone;
+ ScheduleMessageTransmissionTimer();
+ }
+ }
+ else
+ {
+ otLogWarnMle("Failed to process Child Update Response: %s", otThreadErrorToString(error));
}
return error;
@@ -3741,6 +3756,12 @@
}
exit:
+
+ if (error != OT_ERROR_NONE)
+ {
+ otLogWarnMle("Failed to process Announce: %s", otThreadErrorToString(error));
+ }
+
return error;
}
@@ -3822,8 +3843,7 @@
case MeshCoP::Tlv::kNetworkName:
aMessage.Read(offset, sizeof(networkName), &networkName);
- memcpy(&result.mNetworkName, networkName.GetNetworkName(), networkName.GetNetworkNameLength());
- result.mNetworkName.m8[networkName.GetNetworkNameLength()] = '\0';
+ static_cast<Mac::NetworkName &>(result.mNetworkName).Set(networkName.GetNetworkName());
break;
case MeshCoP::Tlv::kSteeringData:
@@ -3863,7 +3883,7 @@
if (error != OT_ERROR_NONE)
{
- otLogWarnMleErr(error, "Failed to process Discovery Response");
+ otLogWarnMle("Failed to process Discovery Response: %s", otThreadErrorToString(error));
}
return error;
@@ -3873,11 +3893,11 @@
{
Neighbor *rval = NULL;
- if ((mParent.IsStateValidOrRestoring()) && (mParent.GetRloc16() == aAddress))
+ if (mParent.IsStateValidOrRestoring() && (mParent.GetRloc16() == aAddress))
{
rval = &mParent;
}
- else if ((mParentCandidate.GetState() == Neighbor::kStateValid) && (mParentCandidate.GetRloc16() == aAddress))
+ else if (mParentCandidate.IsStateValid() && (mParentCandidate.GetRloc16() == aAddress))
{
rval = &mParentCandidate;
}
@@ -3889,11 +3909,11 @@
{
Neighbor *rval = NULL;
- if ((mParent.IsStateValidOrRestoring()) && (mParent.GetExtAddress() == aAddress))
+ if (mParent.IsStateValidOrRestoring() && (mParent.GetExtAddress() == aAddress))
{
rval = &mParent;
}
- else if ((mParentCandidate.GetState() == Neighbor::kStateValid) && (mParentCandidate.GetExtAddress() == aAddress))
+ else if (mParentCandidate.IsStateValid() && (mParentCandidate.GetExtAddress() == aAddress))
{
rval = &mParentCandidate;
}
@@ -3925,8 +3945,7 @@
uint16_t Mle::GetNextHop(uint16_t aDestination) const
{
OT_UNUSED_VARIABLE(aDestination);
- return (mParent.GetState() == Neighbor::kStateValid) ? mParent.GetRloc16()
- : static_cast<uint16_t>(Mac::kShortAddrInvalid);
+ return (mParent.IsStateValid()) ? mParent.GetRloc16() : static_cast<uint16_t>(Mac::kShortAddrInvalid);
}
bool Mle::IsRoutingLocator(const Ip6::Address &aAddress) const
@@ -3947,27 +3966,6 @@
return aAddress.PrefixMatch(GetMeshLocal16()) >= Ip6::Address::kMeshLocalPrefixLength;
}
-Router *Mle::GetParent(void)
-{
- return &mParent;
-}
-
-Router *Mle::GetParentCandidate(void)
-{
- Router *rval;
-
- if (mParentCandidate.GetState() == Neighbor::kStateValid)
- {
- rval = &mParentCandidate;
- }
- else
- {
- rval = &mParent;
- }
-
- return rval;
-}
-
otError Mle::CheckReachability(uint16_t aMeshSource, uint16_t aMeshDest, Ip6::Header &aIp6Header)
{
otError error = OT_ERROR_DROP;
@@ -4019,7 +4017,7 @@
if (error != OT_ERROR_NONE)
{
- otLogWarnMle("Failed to inform previous parent, error:%s", otThreadErrorToString(error));
+ otLogWarnMle("Failed to inform previous parent: %s", otThreadErrorToString(error));
if (message != NULL)
{
@@ -4049,7 +4047,7 @@
// from `UpdateParentSearchState()`. We want to limit this to happen
// only once within a backoff interval.
- if (TimerMilli::Elapsed(mParentSearchBackoffCancelTime) >= kParentSearchBackoffInterval)
+ if (TimerMilli::GetNow() - mParentSearchBackoffCancelTime >= kParentSearchBackoffInterval)
{
mParentSearchBackoffWasCanceled = false;
otLogInfoMle("PeriodicParentSearch: Backoff cancellation is allowed on parent switch");
@@ -4060,7 +4058,7 @@
VerifyOrExit(mRole == OT_DEVICE_ROLE_CHILD);
- parentRss = GetParent()->GetLinkInfo().GetAverageRss();
+ parentRss = GetParent().GetLinkInfo().GetAverageRss();
otLogInfoMle("PeriodicParentSearch: Parent RSS %d", parentRss);
VerifyOrExit(parentRss != OT_RADIO_RSSI_INVALID);
diff --git a/src/core/thread/mle.hpp b/src/core/thread/mle.hpp
index 1376b0f..5dc4323 100644
--- a/src/core/thread/mle.hpp
+++ b/src/core/thread/mle.hpp
@@ -360,7 +360,6 @@
* This class implements functionality required for delaying MLE responses.
*
*/
-OT_TOOL_PACKED_BEGIN
class DelayedResponseHeader
{
public:
@@ -368,7 +367,12 @@
* Default constructor for the object.
*
*/
- DelayedResponseHeader(void) { memset(this, 0, sizeof(*this)); }
+ DelayedResponseHeader(void)
+ : mDestination()
+ , mSendTime(0)
+ {
+ mDestination.Clear();
+ }
/**
* This constructor initializes the object with specific values.
@@ -377,10 +381,10 @@
* @param[in] aDestination IPv6 address of the message destination.
*
*/
- DelayedResponseHeader(uint32_t aSendTime, const Ip6::Address &aDestination)
+ DelayedResponseHeader(TimeMilli aSendTime, const Ip6::Address &aDestination)
+ : mDestination(aDestination)
+ , mSendTime(aSendTime)
{
- mSendTime = aSendTime;
- mDestination = aDestination;
}
/**
@@ -426,7 +430,7 @@
* @returns A time when the message shall be sent.
*
*/
- uint32_t GetSendTime(void) const { return mSendTime; }
+ TimeMilli GetSendTime(void) const { return mSendTime; }
/**
* This method returns a destination of the delayed message.
@@ -436,30 +440,10 @@
*/
const Ip6::Address &GetDestination(void) const { return mDestination; }
- /**
- * This method checks if the message shall be sent before the given time.
- *
- * @param[in] aTime A time to compare.
- *
- * @retval TRUE If the message shall be sent before the given time.
- * @retval FALSE Otherwise.
- */
- bool IsEarlier(uint32_t aTime) { return (static_cast<int32_t>(aTime - mSendTime) > 0); }
-
- /**
- * This method checks if the message shall be sent after the given time.
- *
- * @param[in] aTime A time to compare.
- *
- * @retval TRUE If the message shall be sent after the given time.
- * @retval FALSE Otherwise.
- */
- bool IsLater(uint32_t aTime) { return (static_cast<int32_t>(aTime - mSendTime) < 0); }
-
private:
Ip6::Address mDestination; ///< IPv6 address of the message destination.
- uint32_t mSendTime; ///< Time when the message shall be sent.
-} OT_TOOL_PACKED_END;
+ TimeMilli mSendTime; ///< Time when the message shall be sent.
+};
/**
* This class implements MLE functionality required by the Thread EndDevices, Router, and Leader roles.
@@ -619,6 +603,19 @@
bool IsAttached(void) const;
/**
+ * This method indicates whether device is currently attaching or not.
+ *
+ * Note that an already attached device may also be in attaching state. Examples of this include a leader/router
+ * trying to attach to a better partition, or a child trying to find a better parent (when feature
+ * `OPENTHREAD_CONFIG_PARENT_SEARCH_ENABLE` is enabled).
+ *
+ * @retval TRUE Device is currently trying to attach.
+ * @retval FALSE Device is not in middle of attach process.
+ *
+ */
+ bool IsAttaching(void) const { return (mAttachState != kAttachStateIdle); }
+
+ /**
* This method returns the current Thread interface state.
*
* @returns The current Thread interface state.
@@ -750,23 +747,20 @@
}
/**
- * This method returns a pointer to the parent when operating in End Device mode.
+ * This method gets the parent when operating in End Device mode.
*
- * @returns A pointer to the parent.
+ * @returns A reference to the parent.
*
*/
- Router *GetParent(void);
+ Router &GetParent(void) { return mParent; }
/**
- * This method returns a pointer to the parent candidate or parent.
+ * This method get the parent candidate.
*
- * This method is useful when sending IEEE 802.15.4 Data Request frames while attempting to attach to a new parent.
- *
- * If attempting to attach to a new parent, this method returns the parent candidate.
- * If not attempting to attach, this method returns the parent.
+ * The parent candidate is valid when attempting to attach to a new parent.
*
*/
- Router *GetParentCandidate(void);
+ Router &GetParentCandidate(void) { return mParentCandidate; }
/**
* This method indicates whether or not an IPv6 address is an RLOC.
@@ -877,10 +871,9 @@
*/
otError GetCommissionerAloc(Ip6::Address &aAddress, uint16_t aSessionId) const
{
- return GetAlocAddress(aAddress, GetCommissionerAloc16FromId(aSessionId));
+ return GetAlocAddress(aAddress, CommissionerAloc16FromId(aSessionId));
}
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
/**
* This method retrieves the Service ALOC for given Service ID.
*
@@ -892,7 +885,6 @@
*
*/
otError GetServiceAloc(uint8_t aServiceId, Ip6::Address &aAddress) const;
-#endif
/**
* This method adds Leader's ALOC to its Thread interface.
@@ -924,24 +916,24 @@
otError GetLeaderData(otLeaderData &aLeaderData);
/**
- * This method returns the Child ID portion of an RLOC16.
+ * This method derives the Child ID from a given RLOC16.
*
* @param[in] aRloc16 The RLOC16 value.
*
* @returns The Child ID portion of an RLOC16.
*
*/
- static uint16_t GetChildId(uint16_t aRloc16) { return aRloc16 & kMaxChildId; }
+ static uint16_t ChildIdFromRloc16(uint16_t aRloc16) { return aRloc16 & kMaxChildId; }
/**
- * This method returns the Router ID portion of an RLOC16.
+ * This method derives the Router ID portion from a given RLOC16.
*
* @param[in] aRloc16 The RLOC16 value.
*
* @returns The Router ID portion of an RLOC16.
*
*/
- static uint8_t GetRouterId(uint16_t aRloc16) { return aRloc16 >> kRouterIdOffset; }
+ static uint8_t RouterIdFromRloc16(uint16_t aRloc16) { return aRloc16 >> kRouterIdOffset; }
/**
* This method returns whether the two RLOC16 have the same Router ID.
@@ -954,7 +946,7 @@
*/
static bool RouterIdMatch(uint16_t aRloc16A, uint16_t aRloc16B)
{
- return ((aRloc16A >> kRouterIdOffset) == (aRloc16B >> kRouterIdOffset));
+ return RouterIdFromRloc16(aRloc16A) == RouterIdFromRloc16(aRloc16B);
}
/**
@@ -965,10 +957,7 @@
* @returns The Service ID corresponding to given ALOC16.
*
*/
- static uint8_t GetServiceIdFromAloc(uint16_t aAloc16)
- {
- return static_cast<uint8_t>(aAloc16 - kAloc16ServiceStart);
- }
+ static uint8_t ServiceIdFromAloc(uint16_t aAloc16) { return static_cast<uint8_t>(aAloc16 - kAloc16ServiceStart); }
/**
* This method returns the Service Aloc corresponding to a Service ID.
@@ -978,7 +967,7 @@
* @returns The Service ALOC16 corresponding to given ID.
*
*/
- static uint16_t GetServiceAlocFromId(uint8_t aServiceId)
+ static uint16_t ServiceAlocFromId(uint8_t aServiceId)
{
return static_cast<uint16_t>(aServiceId + kAloc16ServiceStart);
}
@@ -991,20 +980,23 @@
* @returns The Commissioner ALOC16 corresponding to given ID.
*
*/
- static uint16_t GetCommissionerAloc16FromId(uint16_t aSessionId)
+ static uint16_t CommissionerAloc16FromId(uint16_t aSessionId)
{
return static_cast<uint16_t>((aSessionId & kAloc16CommissionerMask) + kAloc16CommissionerStart);
}
/**
- * This method returns the RLOC16 of a given Router ID.
+ * This method derives RLOC16 from a given Router ID.
*
* @param[in] aRouterId The Router ID value.
*
- * @returns The RLOC16 of the given Router ID.
+ * @returns The RLOC16 corresponding to the given Router ID.
*
*/
- static uint16_t GetRloc16(uint8_t aRouterId) { return static_cast<uint16_t>(aRouterId << kRouterIdOffset); }
+ static uint16_t Rloc16FromRouterId(uint8_t aRouterId)
+ {
+ return static_cast<uint16_t>(aRouterId << kRouterIdOffset);
+ }
/**
* This method indicates whether or not @p aRloc16 refers to an active router.
@@ -1015,7 +1007,7 @@
* @retval FALSE If @p aRloc16 does not refer to an active router.
*
*/
- static bool IsActiveRouter(uint16_t aRloc16) { return GetChildId(aRloc16) == 0; }
+ static bool IsActiveRouter(uint16_t aRloc16) { return ChildIdFromRloc16(aRloc16) == 0; }
/**
* This method fills the NetworkDataTlv.
@@ -1700,11 +1692,19 @@
void HandleUdpReceive(Message &aMessage, const Ip6::MessageInfo &aMessageInfo);
void ScheduleMessageTransmissionTimer(void);
- otError HandleAdvertisement(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo);
- otError HandleChildIdResponse(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo);
- otError HandleChildUpdateRequest(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo);
- otError HandleChildUpdateResponse(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo);
- otError HandleDataResponse(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo);
+ otError HandleAdvertisement(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo, Neighbor *aNeighbor);
+ otError HandleChildIdResponse(const Message & aMessage,
+ const Ip6::MessageInfo &aMessageInfo,
+ const Neighbor * aNeighbor);
+ otError HandleChildUpdateRequest(const Message & aMessage,
+ const Ip6::MessageInfo &aMessageInfo,
+ Neighbor * aNeighbor);
+ otError HandleChildUpdateResponse(const Message & aMessage,
+ const Ip6::MessageInfo &aMessageInfo,
+ const Neighbor * aNeighbor);
+ otError HandleDataResponse(const Message & aMessage,
+ const Ip6::MessageInfo &aMessageInfo,
+ const Neighbor * aNeighbor);
otError HandleParentResponse(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo, uint32_t aKeySequence);
otError HandleAnnounce(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo);
otError HandleDiscoveryResponse(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo);
@@ -1721,7 +1721,7 @@
uint32_t Reattach(void);
bool IsBetterParent(uint16_t aRloc16, uint8_t aLinkQuality, uint8_t aLinkMargin, ConnectivityTlv &aConnectivityTlv);
- void ResetParentCandidate(void);
+ bool IsNetworkDataNewer(const LeaderDataTlv &aLeaderData);
otError GetAlocAddress(Ip6::Address &aAddress, uint16_t aAloc16) const;
#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
@@ -1794,7 +1794,7 @@
bool mParentSearchIsInBackoff : 1;
bool mParentSearchBackoffWasCanceled : 1;
bool mParentSearchRecentlyDetached : 1;
- uint32_t mParentSearchBackoffCancelTime;
+ TimeMilli mParentSearchBackoffCancelTime;
TimerMilli mParentSearchTimer;
#endif
diff --git a/src/core/thread/mle_constants.hpp b/src/core/thread/mle_constants.hpp
index 2c2c71c..50a389c 100644
--- a/src/core/thread/mle_constants.hpp
+++ b/src/core/thread/mle_constants.hpp
@@ -57,24 +57,24 @@
*/
enum
{
- kThreadVersion = 2, ///< Thread Version
- kUdpPort = 19788, ///< MLE UDP Port
- kParentRequestRouterTimeout = 750, ///< Router Parent Request timeout
- kParentRequestDuplicateMargin = 50, ///< Margin for duplicate parent request
- kParentRequestReedTimeout = 1250, ///< Router and REEDs Parent Request timeout
- kAttachStartJitter = 50, ///< Maximum jitter time added to start of attach.
- kAnnounceProcessTimeout = 250, ///< Timeout after receiving Announcement before channel/pan-id change
- kAnnounceTimeout = 1400, ///< Total timeout used for sending Announcement messages
- kMinAnnounceDelay = 80, ///< Minimum delay between Announcement messages
- kParentResponseMaxDelayRouters = 500, ///< Maximum delay for response for Parent Request sent to routers only
- kParentResponseMaxDelayAll = 1000, ///< Maximum delay for response for Parent Request sent to all devices
- kUnicastRetransmissionDelay = 1000, ///< Base delay before retransmitting an MLE unicast.
- kChildUpdateRequestPendingDelay = 100, ///< Delay (in ms) for aggregating Child Update Request.
- kMaxTransmissionCount = 3, ///< Maximum number of times an MLE message may be transmitted.
- kMaxResponseDelay = 1000, ///< Maximum delay before responding to a multicast request
- kMaxChildIdRequestTimeout = 5000, ///< Maximum delay for receiving a Child ID Request
- kMaxChildUpdateResponseTimeout = 2000, ///< Maximum delay for receiving a Child Update Response
- kMaxLinkRequestTimeout = 2000, ///< Maximum delay for receiving a Link Accept
+ kThreadVersion = OPENTHREAD_THREAD_VERSION, ///< Thread Version
+ kUdpPort = 19788, ///< MLE UDP Port
+ kParentRequestRouterTimeout = 750, ///< Router Parent Request timeout
+ kParentRequestDuplicateMargin = 50, ///< Margin for duplicate parent request
+ kParentRequestReedTimeout = 1250, ///< Router and REEDs Parent Request timeout
+ kAttachStartJitter = 50, ///< Maximum jitter time added to start of attach.
+ kAnnounceProcessTimeout = 250, ///< Timeout after receiving Announcement before channel/pan-id change
+ kAnnounceTimeout = 1400, ///< Total timeout used for sending Announcement messages
+ kMinAnnounceDelay = 80, ///< Minimum delay between Announcement messages
+ kParentResponseMaxDelayRouters = 500, ///< Maximum delay for response for Parent Request sent to routers only
+ kParentResponseMaxDelayAll = 1000, ///< Maximum delay for response for Parent Request sent to all devices
+ kUnicastRetransmissionDelay = 1000, ///< Base delay before retransmitting an MLE unicast.
+ kChildUpdateRequestPendingDelay = 100, ///< Delay (in ms) for aggregating Child Update Request.
+ kMaxTransmissionCount = 3, ///< Maximum number of times an MLE message may be transmitted.
+ kMaxResponseDelay = 1000, ///< Maximum delay before responding to a multicast request
+ kMaxChildIdRequestTimeout = 5000, ///< Maximum delay for receiving a Child ID Request
+ kMaxChildUpdateResponseTimeout = 2000, ///< Maximum delay for receiving a Child Update Response
+ kMaxLinkRequestTimeout = 2000, ///< Maximum delay for receiving a Link Accept
kMinTimeoutKeepAlive = (((kMaxChildKeepAliveAttempts + 1) * kUnicastRetransmissionDelay) /
1000), ///< Minimum timeout(s) for keep alive
kMinTimeoutDataPoll = (OPENTHREAD_CONFIG_MAC_MINIMUM_POLL_PERIOD +
diff --git a/src/core/thread/mle_router.cpp b/src/core/thread/mle_router.cpp
index b90c664..f3cccb4 100644
--- a/src/core/thread/mle_router.cpp
+++ b/src/core/thread/mle_router.cpp
@@ -42,7 +42,7 @@
#include "common/logging.hpp"
#include "common/random.hpp"
#include "common/settings.hpp"
-#include "mac/mac_frame.hpp"
+#include "mac/mac_types.hpp"
#include "meshcop/meshcop.hpp"
#include "net/icmp6.hpp"
#include "thread/thread_netif.hpp"
@@ -71,7 +71,7 @@
, mRouterDowngradeThreshold(kRouterDowngradeThreshold)
, mLeaderWeight(kLeaderWeight)
, mFixedLeaderPartitionId(0)
- , mRouterRoleEnabled(true)
+ , mRouterEligible(true)
, mAddressSolicitPending(false)
, mPreviousPartitionIdRouter(0)
, mPreviousPartitionId(0)
@@ -97,14 +97,18 @@
mRouterTable.Clear();
}
-bool MleRouter::IsRouterRoleEnabled(void) const
+bool MleRouter::IsRouterEligible(void) const
{
- return mRouterRoleEnabled && IsFullThreadDevice();
+ return mRouterEligible && IsFullThreadDevice();
}
-void MleRouter::SetRouterRoleEnabled(bool aEnabled)
+otError MleRouter::SetRouterEligible(bool aEligible)
{
- mRouterRoleEnabled = aEnabled;
+ otError error = OT_ERROR_NONE;
+
+ VerifyOrExit(IsFullThreadDevice() || !aEligible, error = OT_ERROR_NOT_CAPABLE);
+
+ mRouterEligible = aEligible;
switch (mRole)
{
@@ -113,12 +117,12 @@
break;
case OT_DEVICE_ROLE_CHILD:
- Get<Mac::Mac>().SetBeaconEnabled(mRouterRoleEnabled);
+ Get<Mac::Mac>().SetBeaconEnabled(mRouterEligible);
break;
case OT_DEVICE_ROLE_ROUTER:
case OT_DEVICE_ROLE_LEADER:
- if (!mRouterRoleEnabled)
+ if (!mRouterEligible)
{
BecomeDetached();
}
@@ -126,10 +130,8 @@
break;
}
- if (IsRouterRoleEnabled() && IsAttached() && !mStateUpdateTimer.IsRunning())
- {
- mStateUpdateTimer.Start(kStateUpdatePeriod);
- }
+exit:
+ return error;
}
otError MleRouter::BecomeRouter(ThreadStatusTlv::Status aStatus)
@@ -138,7 +140,7 @@
VerifyOrExit(mRole != OT_DEVICE_ROLE_DISABLED, error = OT_ERROR_INVALID_STATE);
VerifyOrExit(mRole != OT_DEVICE_ROLE_ROUTER, error = OT_ERROR_NONE);
- VerifyOrExit(IsRouterRoleEnabled(), error = OT_ERROR_NOT_CAPABLE);
+ VerifyOrExit(IsRouterEligible(), error = OT_ERROR_NOT_CAPABLE);
otLogInfoMle("Attempt to become router");
@@ -175,7 +177,7 @@
VerifyOrExit(!Get<MeshCoP::ActiveDataset>().IsPartiallyComplete(), error = OT_ERROR_INVALID_STATE);
VerifyOrExit(mRole != OT_DEVICE_ROLE_DISABLED, error = OT_ERROR_INVALID_STATE);
VerifyOrExit(mRole != OT_DEVICE_ROLE_LEADER, error = OT_ERROR_NONE);
- VerifyOrExit(IsRouterRoleEnabled(), error = OT_ERROR_NOT_CAPABLE);
+ VerifyOrExit(IsRouterEligible(), error = OT_ERROR_NOT_CAPABLE);
mRouterTable.Clear();
@@ -195,7 +197,7 @@
Get<NetworkData::Leader>().Reset();
Get<MeshCoP::Leader>().SetEmptyCommissionerData();
- SetStateLeader(GetRloc16(leaderId));
+ SetStateLeader(Rloc16FromRouterId(leaderId));
exit:
return error;
@@ -228,7 +230,7 @@
StopLeader();
mStateUpdateTimer.Start(kStateUpdatePeriod);
- if (mRouterRoleEnabled)
+ if (mRouterEligible)
{
Get<Mac::Mac>().SetBeaconEnabled(true);
}
@@ -317,9 +319,9 @@
Get<Mac::Mac>().SetBeaconEnabled(true);
// remove children that do not have matching RLOC16
- for (ChildTable::Iterator iter(GetInstance(), ChildTable::kInStateValidOrRestoring); !iter.IsDone(); iter++)
+ for (ChildTable::Iterator iter(GetInstance(), Child::kInStateValidOrRestoring); !iter.IsDone(); iter++)
{
- if (GetRouterId(iter.GetChild()->GetRloc16()) != mRouterId)
+ if (RouterIdFromRloc16(iter.GetChild()->GetRloc16()) != mRouterId)
{
RemoveNeighbor(*iter.GetChild());
}
@@ -354,9 +356,9 @@
Get<AddressResolver>().Clear();
// remove children that do not have matching RLOC16
- for (ChildTable::Iterator iter(GetInstance(), ChildTable::kInStateValidOrRestoring); !iter.IsDone(); iter++)
+ for (ChildTable::Iterator iter(GetInstance(), Child::kInStateValidOrRestoring); !iter.IsDone(); iter++)
{
- if (GetRouterId(iter.GetChild()->GetRloc16()) != mRouterId)
+ if (RouterIdFromRloc16(iter.GetChild()->GetRloc16()) != mRouterId)
{
RemoveNeighbor(*iter.GetChild());
}
@@ -374,10 +376,7 @@
{
bool continueTrickle = true;
- if (!IsFullThreadDevice())
- {
- ExitNow(continueTrickle = false);
- }
+ VerifyOrExit(IsRouterEligible(), continueTrickle = false);
SendAdvertisement();
@@ -396,8 +395,8 @@
if (!mAdvertiseTimer.IsRunning())
{
- mAdvertiseTimer.Start(TimerMilli::SecToMsec(kAdvertiseIntervalMin),
- TimerMilli::SecToMsec(kAdvertiseIntervalMax), TrickleTimer::kModeNormal);
+ mAdvertiseTimer.Start(Time::SecToMsec(kAdvertiseIntervalMin), Time::SecToMsec(kAdvertiseIntervalMax),
+ TrickleTimer::kModeNormal);
}
mAdvertiseTimer.IndicateInconsistent();
@@ -417,7 +416,7 @@
// Without this suppression, a device may send an MLE Advertisement before receiving the MLE Child ID Response.
// The candidate parent then removes the attaching device because the Source Address TLV includes an RLOC16 that
// indicates a Router role (i.e. a Child ID equal to zero).
- VerifyOrExit(mAttachState == kAttachStateIdle);
+ VerifyOrExit(!IsAttaching());
// Suppress MLE Advertisements when transitioning to the router role.
//
@@ -446,7 +445,7 @@
break;
}
- memset(&destination, 0, sizeof(destination));
+ destination.Clear();
destination.mFields.m16[0] = HostSwap16(0xff02);
destination.mFields.m16[7] = HostSwap16(0x0001);
SuccessOrExit(error = SendMessage(*message, destination));
@@ -472,7 +471,7 @@
Message * message;
Ip6::Address destination;
- memset(&destination, 0, sizeof(destination));
+ destination.Clear();
VerifyOrExit((message = NewMleMessage()) != NULL, error = OT_ERROR_NO_BUFS);
SuccessOrExit(error = AppendHeader(*message, Header::kCommandLinkRequest));
@@ -495,7 +494,7 @@
case OT_DEVICE_ROLE_ROUTER:
case OT_DEVICE_ROLE_LEADER:
- if (aNeighbor == NULL || aNeighbor->GetState() != Neighbor::kStateValid)
+ if (aNeighbor == NULL || !aNeighbor->IsStateValid())
{
SuccessOrExit(error = AppendTlvRequest(*message, routerTlvs, sizeof(routerTlvs)));
}
@@ -515,7 +514,7 @@
if (aNeighbor == NULL)
{
- Random::NonCrypto::FillBuffer(mChallenge, sizeof(mChallenge));
+ Random::Crypto::FillBuffer(mChallenge, sizeof(mChallenge));
mChallengeTimeout = (((2 * kMaxResponseDelay) + kStateUpdatePeriod - 1) / kStateUpdatePeriod);
@@ -526,7 +525,7 @@
}
else
{
- if (aNeighbor->GetState() != Neighbor::kStateValid)
+ if (!aNeighbor->IsStateValid())
{
aNeighbor->GenerateChallenge();
SuccessOrExit(error = AppendChallenge(*message, aNeighbor->GetChallenge(), aNeighbor->GetChallengeSize()));
@@ -535,7 +534,7 @@
{
uint8_t challenge[ChallengeTlv::kMaxSize];
- Random::NonCrypto::FillBuffer(challenge, sizeof(challenge));
+ Random::Crypto::FillBuffer(challenge, sizeof(challenge));
SuccessOrExit(error = AppendChallenge(*message, challenge, sizeof(challenge)));
}
@@ -557,17 +556,15 @@
return error;
}
-otError MleRouter::HandleLinkRequest(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo)
+otError MleRouter::HandleLinkRequest(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo, Neighbor *aNeighbor)
{
otError error = OT_ERROR_NONE;
Neighbor * neighbor = NULL;
- Mac::ExtAddress macAddr;
ChallengeTlv challenge;
VersionTlv version;
LeaderDataTlv leaderData;
SourceAddressTlv sourceAddress;
TlvRequestTlv tlvRequest;
- uint16_t rloc16;
#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
TimeRequestTlv timeRequest;
#endif
@@ -576,9 +573,7 @@
VerifyOrExit(mRole == OT_DEVICE_ROLE_ROUTER || mRole == OT_DEVICE_ROLE_LEADER, error = OT_ERROR_INVALID_STATE);
- VerifyOrExit(mAttachState == kAttachStateIdle, error = OT_ERROR_INVALID_STATE);
-
- aMessageInfo.GetPeerAddr().ToExtAddress(macAddr);
+ VerifyOrExit(!IsAttaching(), error = OT_ERROR_INVALID_STATE);
// Challenge
SuccessOrExit(error = Tlv::GetTlv(aMessage, Tlv::kChallenge, sizeof(challenge), challenge));
@@ -598,25 +593,23 @@
// Source Address
if (Tlv::GetTlv(aMessage, Tlv::kSourceAddress, sizeof(sourceAddress), sourceAddress) == OT_ERROR_NONE)
{
+ uint16_t rloc16;
+
VerifyOrExit(sourceAddress.IsValid(), error = OT_ERROR_PARSE);
rloc16 = sourceAddress.GetRloc16();
- if ((neighbor = GetNeighbor(macAddr)) != NULL && neighbor->GetRloc16() != rloc16)
- {
- // remove stale neighbors
- RemoveNeighbor(*neighbor);
- neighbor = NULL;
- }
-
if (IsActiveRouter(rloc16))
{
- // source is a router
- neighbor = mRouterTable.GetRouter(GetRouterId(rloc16));
- VerifyOrExit(neighbor != NULL, error = OT_ERROR_PARSE);
- VerifyOrExit(neighbor->GetState() != Neighbor::kStateLinkRequest, error = OT_ERROR_ALREADY);
+ Mac::ExtAddress macAddr;
- if (neighbor->GetState() != Neighbor::kStateValid)
+ aMessageInfo.GetPeerAddr().ToExtAddress(macAddr);
+
+ neighbor = mRouterTable.GetRouter(RouterIdFromRloc16(rloc16));
+ VerifyOrExit(neighbor != NULL, error = OT_ERROR_PARSE);
+ VerifyOrExit(!neighbor->IsStateLinkRequest(), error = OT_ERROR_ALREADY);
+
+ if (!neighbor->IsStateValid())
{
const otThreadLinkInfo *linkInfo = static_cast<const otThreadLinkInfo *>(aMessageInfo.GetLinkInfo());
@@ -632,18 +625,13 @@
VerifyOrExit(neighbor->GetExtAddress() == macAddr);
}
}
- else
- {
- // source is not a router
- neighbor = NULL;
- }
}
else
{
// lack of source address indicates router coming out of reset
- VerifyOrExit((neighbor = GetNeighbor(macAddr)) != NULL && neighbor->GetState() == Neighbor::kStateValid &&
- IsActiveRouter(neighbor->GetRloc16()),
+ VerifyOrExit(aNeighbor && aNeighbor->IsStateValid() && IsActiveRouter(aNeighbor->GetRloc16()),
error = OT_ERROR_DROP);
+ neighbor = aNeighbor;
}
// TLV Request
@@ -688,9 +676,8 @@
Header::Command command;
uint8_t linkMargin;
- command = (aNeighbor == NULL || aNeighbor->GetState() == Neighbor::kStateValid)
- ? Header::kCommandLinkAccept
- : Header::kCommandLinkAcceptAndRequest;
+ command = (aNeighbor == NULL || aNeighbor->IsStateValid()) ? Header::kCommandLinkAccept
+ : Header::kCommandLinkAcceptAndRequest;
VerifyOrExit((message = NewMleMessage()) != NULL, error = OT_ERROR_NO_BUFS);
SuccessOrExit(error = AppendHeader(*message, command));
@@ -731,7 +718,7 @@
}
}
- if (aNeighbor != NULL && aNeighbor->GetState() != Neighbor::kStateValid)
+ if (aNeighbor != NULL && !aNeighbor->IsStateValid())
{
aNeighbor->GenerateChallenge();
@@ -774,21 +761,38 @@
otError MleRouter::HandleLinkAccept(const Message & aMessage,
const Ip6::MessageInfo &aMessageInfo,
- uint32_t aKeySequence)
+ uint32_t aKeySequence,
+ Neighbor * aNeighbor)
{
- return HandleLinkAccept(aMessage, aMessageInfo, aKeySequence, false);
+ otError error = HandleLinkAccept(aMessage, aMessageInfo, aKeySequence, aNeighbor, false);
+
+ if (error != OT_ERROR_NONE)
+ {
+ otLogWarnMle("Failed to process Link Accept: %s", otThreadErrorToString(error));
+ }
+
+ return error;
}
otError MleRouter::HandleLinkAcceptAndRequest(const Message & aMessage,
const Ip6::MessageInfo &aMessageInfo,
- uint32_t aKeySequence)
+ uint32_t aKeySequence,
+ Neighbor * aNeighbor)
{
- return HandleLinkAccept(aMessage, aMessageInfo, aKeySequence, true);
+ otError error = HandleLinkAccept(aMessage, aMessageInfo, aKeySequence, aNeighbor, true);
+
+ if (error != OT_ERROR_NONE)
+ {
+ otLogWarnMle("Failed to process Link Accept and Request: %s", otThreadErrorToString(error));
+ }
+
+ return error;
}
otError MleRouter::HandleLinkAccept(const Message & aMessage,
const Ip6::MessageInfo &aMessageInfo,
uint32_t aKeySequence,
+ Neighbor * aNeighbor,
bool aRequest)
{
static const uint8_t dataRequestTlvs[] = {Tlv::kNetworkData};
@@ -796,7 +800,6 @@
otError error = OT_ERROR_NONE;
const otThreadLinkInfo *linkInfo = static_cast<const otThreadLinkInfo *>(aMessageInfo.GetLinkInfo());
Router * router;
- Neighbor * neighbor;
Neighbor::State neighborState;
Mac::ExtAddress macAddr;
VersionTlv version;
@@ -809,10 +812,6 @@
RouteTlv route;
LeaderDataTlv leaderData;
LinkMarginTlv linkMargin;
- ChallengeTlv challenge;
- TlvRequestTlv tlvRequest;
-
- aMessageInfo.GetPeerAddr().ToExtAddress(macAddr);
// Source Address
SuccessOrExit(error = Tlv::GetTlv(aMessage, Tlv::kSourceAddress, sizeof(sourceAddress), sourceAddress));
@@ -827,20 +826,45 @@
LogMleMessage("Receive Link Accept", aMessageInfo.GetPeerAddr(), sourceAddress.GetRloc16());
}
- // Version
- SuccessOrExit(error = Tlv::GetTlv(aMessage, Tlv::kVersion, sizeof(version), version));
- VerifyOrExit(version.IsValid(), error = OT_ERROR_PARSE);
+ VerifyOrExit(IsActiveRouter(sourceAddress.GetRloc16()), error = OT_ERROR_PARSE);
+
+ routerId = RouterIdFromRloc16(sourceAddress.GetRloc16());
+ router = mRouterTable.GetRouter(routerId);
+ neighborState = (router != NULL) ? router->GetState() : Neighbor::kStateInvalid;
// Response
SuccessOrExit(error = Tlv::GetTlv(aMessage, Tlv::kResponse, sizeof(response), response));
VerifyOrExit(response.IsValid(), error = OT_ERROR_PARSE);
- // Remove stale neighbors
- if ((neighbor = GetNeighbor(macAddr)) != NULL && neighbor->GetRloc16() != sourceAddress.GetRloc16())
+ // verify response
+ switch (neighborState)
{
- RemoveNeighbor(*neighbor);
+ case Neighbor::kStateLinkRequest:
+ VerifyOrExit(memcmp(router->GetChallenge(), response.GetResponse(), router->GetChallengeSize()) == 0,
+ error = OT_ERROR_SECURITY);
+ break;
+
+ case Neighbor::kStateInvalid:
+ VerifyOrExit((mChallengeTimeout > 0) && (memcmp(mChallenge, response.GetResponse(), sizeof(mChallenge)) == 0),
+ error = OT_ERROR_SECURITY);
+
+ case Neighbor::kStateValid:
+ break;
+
+ default:
+ ExitNow(error = OT_ERROR_SECURITY);
}
+ // Remove stale neighbors
+ if (aNeighbor && aNeighbor->GetRloc16() != sourceAddress.GetRloc16())
+ {
+ RemoveNeighbor(*aNeighbor);
+ }
+
+ // Version
+ SuccessOrExit(error = Tlv::GetTlv(aMessage, Tlv::kVersion, sizeof(version), version));
+ VerifyOrExit(version.IsValid(), error = OT_ERROR_PARSE);
+
// Link-Layer Frame Counter
SuccessOrExit(error = Tlv::GetTlv(aMessage, Tlv::kLinkFrameCounter, sizeof(linkFrameCounter), linkFrameCounter));
VerifyOrExit(linkFrameCounter.IsValid(), error = OT_ERROR_PARSE);
@@ -869,32 +893,6 @@
linkMargin.SetLinkMargin(0);
}
- VerifyOrExit(IsActiveRouter(sourceAddress.GetRloc16()), error = OT_ERROR_PARSE);
-
- routerId = GetRouterId(sourceAddress.GetRloc16());
- router = mRouterTable.GetRouter(routerId);
- neighborState = (router != NULL) ? router->GetState() : Neighbor::kStateInvalid;
-
- // verify response
- switch (neighborState)
- {
- case Neighbor::kStateLinkRequest:
- VerifyOrExit(memcmp(router->GetChallenge(), response.GetResponse(), router->GetChallengeSize()) == 0,
- error = OT_ERROR_SECURITY);
- break;
-
- case Neighbor::kStateInvalid:
- VerifyOrExit((mChallengeTimeout > 0) && (memcmp(mChallenge, response.GetResponse(), sizeof(mChallenge)) == 0),
- error = OT_ERROR_SECURITY);
- break;
-
- case Neighbor::kStateValid:
- break;
-
- default:
- ExitNow(error = OT_ERROR_INVALID_STATE);
- }
-
switch (mRole)
{
case OT_DEVICE_ROLE_DISABLED:
@@ -920,7 +918,7 @@
router = mRouterTable.GetRouter(routerId);
VerifyOrExit(router != NULL);
- if (mLeaderData.GetLeaderRouterId() == GetRouterId(GetRloc16()))
+ if (mLeaderData.GetLeaderRouterId() == RouterIdFromRloc16(GetRloc16()))
{
SetStateLeader(GetRloc16());
}
@@ -974,6 +972,7 @@
}
// finish link synchronization
+ aMessageInfo.GetPeerAddr().ToExtAddress(macAddr);
router->SetExtAddress(macAddr);
router->SetRloc16(sourceAddress.GetRloc16());
router->SetLinkFrameCounter(linkFrameCounter.GetFrameCounter());
@@ -992,6 +991,9 @@
if (aRequest)
{
+ ChallengeTlv challenge;
+ TlvRequestTlv tlvRequest;
+
// Challenge
SuccessOrExit(error = Tlv::GetTlv(aMessage, Tlv::kChallenge, sizeof(challenge), challenge));
VerifyOrExit(challenge.IsValid(), error = OT_ERROR_PARSE);
@@ -1086,7 +1088,7 @@
{
bool rval = true;
- if (IsAttached() && IsFullThreadDevice())
+ if (IsAttached() && IsRouterEligible())
{
// not a singleton if any other routers exist
if (mRouterTable.GetActiveRouterCount() > 1)
@@ -1137,9 +1139,9 @@
}
// Check if 2 or more active routers
- for (uint8_t i = 0; i <= kMaxRouterId; i++)
+ for (uint8_t routerId = 0; routerId <= kMaxRouterId; routerId++)
{
- if (aRouteTlv.IsRouterIdSet(i) && (++count >= 2))
+ if (aRouteTlv.IsRouterIdSet(routerId) && (++count >= 2))
{
ExitNow(rval = false);
}
@@ -1149,7 +1151,9 @@
return rval;
}
-otError MleRouter::HandleAdvertisement(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo)
+otError MleRouter::HandleAdvertisement(const Message & aMessage,
+ const Ip6::MessageInfo &aMessageInfo,
+ Neighbor * aNeighbor)
{
otError error = OT_ERROR_NONE;
const otThreadLinkInfo *linkInfo = static_cast<const otThreadLinkInfo *>(aMessageInfo.GetLinkInfo());
@@ -1160,7 +1164,6 @@
RouteTlv route;
uint32_t partitionId;
Router * router;
- Neighbor * neighbor;
uint8_t routerId;
uint8_t routerCount;
@@ -1170,12 +1173,6 @@
SuccessOrExit(error = Tlv::GetTlv(aMessage, Tlv::kSourceAddress, sizeof(sourceAddress), sourceAddress));
VerifyOrExit(sourceAddress.IsValid(), error = OT_ERROR_PARSE);
- // Remove stale neighbors
- if ((neighbor = GetNeighbor(macAddr)) != NULL && neighbor->GetRloc16() != sourceAddress.GetRloc16())
- {
- RemoveNeighbor(*neighbor);
- }
-
// Leader Data
SuccessOrExit(error = Tlv::GetTlv(aMessage, Tlv::kLeaderData, sizeof(leaderData), leaderData));
VerifyOrExit(leaderData.IsValid(), error = OT_ERROR_PARSE);
@@ -1207,7 +1204,7 @@
error = OT_ERROR_DROP);
}
- if (mRole == OT_DEVICE_ROLE_CHILD && (mParent.GetExtAddress() == macAddr || !IsFullThreadDevice()))
+ if (mRole == OT_DEVICE_ROLE_CHILD && (aNeighbor == &mParent || !IsFullThreadDevice()))
{
ExitNow();
}
@@ -1226,6 +1223,8 @@
}
else if (leaderData.GetLeaderRouterId() != GetLeaderId())
{
+ VerifyOrExit(aNeighbor && aNeighbor->IsStateValid());
+
if (mRole != OT_DEVICE_ROLE_CHILD)
{
otLogInfoMle("Leader ID mismatch");
@@ -1237,13 +1236,13 @@
}
VerifyOrExit(IsActiveRouter(sourceAddress.GetRloc16()) && route.IsValid());
- routerId = GetRouterId(sourceAddress.GetRloc16());
+ routerId = RouterIdFromRloc16(sourceAddress.GetRloc16());
#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
Get<TimeSync>().HandleTimeSyncMessage(aMessage);
#endif
- if (IsFullThreadDevice() &&
+ if (IsFullThreadDevice() && (aNeighbor && aNeighbor->IsStateValid()) &&
((mRouterTable.GetActiveRouterCount() == 0) ||
(static_cast<int8_t>(route.GetRouterIdSequence() - mRouterTable.GetRouterIdSequence()) > 0)))
{
@@ -1264,7 +1263,7 @@
{
router = mRouterTable.GetRouter(routerId);
- if (router != NULL && router->GetState() == Neighbor::kStateValid)
+ if (router != NULL && router->IsStateValid())
{
processRouteTlv = true;
}
@@ -1291,18 +1290,11 @@
ExitNow();
case OT_DEVICE_ROLE_CHILD:
- router = (macAddr == mParent.GetExtAddress()) ? &mParent : mRouterTable.GetRouter(routerId);
- VerifyOrExit(router != NULL);
-
- if ((router->GetState() == Neighbor::kStateValid) && IsFullThreadDevice() &&
- (mRouterSelectionJitterTimeout == 0) && (mRouterTable.GetActiveRouterCount() < mRouterUpgradeThreshold))
+ if (aNeighbor == &mParent)
{
- mRouterSelectionJitterTimeout = 1 + Random::NonCrypto::GetUint8InRange(0, mRouterSelectionJitter);
- ExitNow();
- }
+ // MLE Advertisement from parent
+ router = &mParent;
- if (router == &mParent)
- {
if (mParent.GetRloc16() != sourceAddress.GetRloc16())
{
BecomeDetached();
@@ -1311,18 +1303,27 @@
if (IsFullThreadDevice())
{
- Router *leader = mRouterTable.GetLeader();
+ Router *leader;
+
+ if ((mRouterSelectionJitterTimeout == 0) &&
+ (mRouterTable.GetActiveRouterCount() < mRouterUpgradeThreshold))
+ {
+ mRouterSelectionJitterTimeout = 1 + Random::NonCrypto::GetUint8InRange(0, mRouterSelectionJitter);
+ ExitNow();
+ }
+
+ leader = mRouterTable.GetLeader();
if (leader != NULL)
{
- for (uint8_t i = 0, routeCount = 0; i <= kMaxRouterId; i++)
+ for (uint8_t id = 0, routeCount = 0; id <= kMaxRouterId; id++)
{
- if (!route.IsRouterIdSet(i))
+ if (!route.IsRouterIdSet(id))
{
continue;
}
- if (i != GetLeaderId())
+ if (id != GetLeaderId())
{
routeCount++;
continue;
@@ -1330,7 +1331,7 @@
if (route.GetRouteCost(routeCount) > 0)
{
- leader->SetNextHop(routerId);
+ leader->SetNextHop(id);
leader->SetCost(route.GetRouteCost(routeCount));
}
else
@@ -1344,18 +1345,24 @@
}
}
}
- else if (IsFullThreadDevice() && (router->GetState() != Neighbor::kStateValid) &&
- (router->GetState() != Neighbor::kStateLinkRequest) &&
- (mRouterTable.GetActiveLinkCount() < OPENTHREAD_CONFIG_MLE_CHILD_ROUTER_LINKS))
+ else
{
- router->SetExtAddress(macAddr);
- router->GetLinkInfo().Clear();
- router->GetLinkInfo().AddRss(Get<Mac::Mac>().GetNoiseFloor(), linkInfo->mRss);
- router->ResetLinkFailures();
- router->SetLastHeard(TimerMilli::GetNow());
- router->SetState(Neighbor::kStateLinkRequest);
- SendLinkRequest(router);
- ExitNow(error = OT_ERROR_NO_ROUTE);
+ // MLE Advertisement not from parent, but from some other neighboring router
+ router = mRouterTable.GetRouter(routerId);
+ VerifyOrExit(router != NULL);
+
+ if (IsFullThreadDevice() && !router->IsStateValid() && !router->IsStateLinkRequest() &&
+ (mRouterTable.GetActiveLinkCount() < OPENTHREAD_CONFIG_MLE_CHILD_ROUTER_LINKS))
+ {
+ router->SetExtAddress(macAddr);
+ router->GetLinkInfo().Clear();
+ router->GetLinkInfo().AddRss(Get<Mac::Mac>().GetNoiseFloor(), linkInfo->mRss);
+ router->ResetLinkFailures();
+ router->SetLastHeard(TimerMilli::GetNow());
+ router->SetState(Neighbor::kStateLinkRequest);
+ SendLinkRequest(router);
+ ExitNow(error = OT_ERROR_NO_ROUTE);
+ }
}
router->SetLastHeard(TimerMilli::GetNow());
@@ -1369,9 +1376,9 @@
// check current active router number
routerCount = 0;
- for (uint8_t i = 0; i <= kMaxRouterId; i++)
+ for (uint8_t id = 0; id <= kMaxRouterId; id++)
{
- if (route.IsRouterIdSet(i))
+ if (route.IsRouterIdSet(id))
{
routerCount++;
}
@@ -1390,8 +1397,8 @@
router = mRouterTable.GetRouter(routerId);
VerifyOrExit(router != NULL);
- // Send link request if no link to router
- if ((router->GetState() != Neighbor::kStateValid) && (router->GetState() != Neighbor::kStateLinkRequest) &&
+ // Send unicast link request if no link to router and no unicast/multicast link request in progress
+ if (!router->IsStateValid() && !router->IsStateLinkRequest() && (mChallengeTimeout == 0) &&
(linkMargin >= OPENTHREAD_CONFIG_MLE_LINK_REQUEST_MARGIN_MIN))
{
router->SetExtAddress(macAddr);
@@ -1410,133 +1417,107 @@
UpdateRoutes(route, routerId);
-#if OPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE || OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
- Get<NetworkData::Local>().SendServerDataNotification();
-#endif
-
exit:
+ if (aNeighbor && aNeighbor->GetRloc16() != sourceAddress.GetRloc16())
+ {
+ // Remove stale neighbors
+ RemoveNeighbor(*aNeighbor);
+ }
+
return error;
}
void MleRouter::UpdateRoutes(const RouteTlv &aRoute, uint8_t aRouterId)
{
Router *neighbor;
- uint8_t curCost;
- uint8_t newCost;
- uint8_t oldNextHop;
- uint8_t cost;
- uint8_t linkQuality;
- bool update;
- bool changed = false;
+ bool resetAdvInterval = false;
+ bool changed = false;
neighbor = mRouterTable.GetRouter(aRouterId);
VerifyOrExit(neighbor != NULL);
+ // update link quality out to neighbor
+ changed = UpdateLinkQualityOut(aRoute, *neighbor, resetAdvInterval);
+
// update routes
- do
+ for (uint8_t routerId = 0, routeCount = 0; routerId <= kMaxRouterId; routerId++)
{
- update = false;
+ Router *router;
+ Router *nextHop;
+ uint8_t oldNextHop;
+ uint8_t cost;
- for (uint8_t i = 0, routeCount = 0; i <= kMaxRouterId; i++)
+ if (!aRoute.IsRouterIdSet(routerId))
{
- Router *router;
- Router *nextHop;
-
- if (!aRoute.IsRouterIdSet(i))
- {
- continue;
- }
-
- router = mRouterTable.GetRouter(i);
-
- if (router == NULL)
- {
- routeCount++;
- continue;
- }
-
- if (router->GetRloc16() == GetRloc16())
- {
- linkQuality = aRoute.GetLinkQualityIn(routeCount);
-
- if (neighbor->GetLinkQualityOut() != linkQuality)
- {
- neighbor->SetLinkQualityOut(linkQuality);
- update = true;
- }
- }
- else
- {
- oldNextHop = router->GetNextHop();
- nextHop = mRouterTable.GetRouter(oldNextHop);
-
- if (router == neighbor)
- {
- cost = 0;
- }
- else
- {
- cost = aRoute.GetRouteCost(routeCount);
-
- if (cost == 0)
- {
- cost = kMaxRouteCost;
- }
- }
-
- if (nextHop == NULL || nextHop == neighbor)
- {
- // route has no next hop or next hop is neighbor (sender)
-
- if (router != neighbor)
- {
- if (cost + mRouterTable.GetLinkCost(*neighbor) <= kMaxRouteCost)
- {
- if (nextHop == NULL && mRouterTable.GetLinkCost(*router) >= kMaxRouteCost)
- {
- ResetAdvertiseInterval();
- }
-
- router->SetNextHop(aRouterId);
- router->SetCost(cost);
- changed = true;
- }
- else if (nextHop == neighbor)
- {
- if (mRouterTable.GetLinkCost(*router) >= kMaxRouteCost)
- {
- ResetAdvertiseInterval();
- }
-
- router->SetNextHop(kInvalidRouterId);
- router->SetCost(0);
- router->SetLastHeard(TimerMilli::GetNow());
- changed = true;
- }
- }
- }
- else
- {
- curCost = router->GetCost() + mRouterTable.GetLinkCost(*nextHop);
- newCost = cost + mRouterTable.GetLinkCost(*neighbor);
-
- if (newCost < curCost && router != neighbor)
- {
- router->SetNextHop(aRouterId);
- router->SetCost(cost);
- changed = true;
- }
- }
-
- update |= router->GetNextHop() != oldNextHop;
- }
-
- routeCount++;
+ continue;
}
- changed |= update;
+ router = mRouterTable.GetRouter(routerId);
- } while (update);
+ if (router == NULL || router->GetRloc16() == GetRloc16() || router == neighbor)
+ {
+ routeCount++;
+ continue;
+ }
+
+ oldNextHop = router->GetNextHop();
+ nextHop = mRouterTable.GetRouter(oldNextHop);
+
+ cost = aRoute.GetRouteCost(routeCount);
+
+ if (cost == 0)
+ {
+ cost = kMaxRouteCost;
+ }
+
+ if (nextHop == NULL || nextHop == neighbor)
+ {
+ // route has no next hop or next hop is neighbor (sender)
+
+ if (cost + mRouterTable.GetLinkCost(*neighbor) < kMaxRouteCost)
+ {
+ if (nextHop == NULL && mRouterTable.GetLinkCost(*router) >= kMaxRouteCost)
+ {
+ resetAdvInterval = true;
+ }
+
+ router->SetNextHop(aRouterId);
+ router->SetCost(cost);
+ changed = true;
+ }
+ else if (nextHop == neighbor)
+ {
+ if (mRouterTable.GetLinkCost(*router) >= kMaxRouteCost)
+ {
+ resetAdvInterval = true;
+ }
+
+ router->SetNextHop(kInvalidRouterId);
+ router->SetCost(0);
+ router->SetLastHeard(TimerMilli::GetNow());
+ changed = true;
+ }
+ }
+ else
+ {
+ uint8_t curCost = router->GetCost() + mRouterTable.GetLinkCost(*nextHop);
+ uint8_t newCost = cost + mRouterTable.GetLinkCost(*neighbor);
+
+ if (newCost < curCost)
+ {
+ router->SetNextHop(aRouterId);
+ router->SetCost(cost);
+ changed = true;
+ }
+ }
+
+ routeCount++;
+ }
+
+ if (resetAdvInterval)
+ {
+ ResetAdvertiseInterval();
+ }
#if (OPENTHREAD_CONFIG_LOG_MLE && (OPENTHREAD_CONFIG_LOG_LEVEL >= OT_LOG_LEVEL_INFO))
@@ -1547,17 +1528,58 @@
{
Router &router = *iter.GetRouter();
- otLogInfoMle(" %04x -> %04x, cost:%d %d, lqin:%d, lqout:%d", router.GetRloc16(),
- GetRloc16(router.GetNextHop()), router.GetCost(), mRouterTable.GetLinkCost(router),
- router.GetLinkInfo().GetLinkQuality(), router.GetLinkQualityOut());
+ otLogInfoMle(" %04x -> %04x, cost:%d %d, lqin:%d, lqout:%d, link:%s", router.GetRloc16(),
+ (router.GetNextHop() == kInvalidRouterId) ? 0xffff : Rloc16FromRouterId(router.GetNextHop()),
+ router.GetCost(), mRouterTable.GetLinkCost(router), router.GetLinkInfo().GetLinkQuality(),
+ router.GetLinkQualityOut(),
+ router.GetRloc16() == GetRloc16() ? "device" : (router.IsStateValid() ? "yes" : "no"));
}
+#else
+ OT_UNUSED_VARIABLE(changed);
#endif
exit:
return;
}
+bool MleRouter::UpdateLinkQualityOut(const RouteTlv &aRoute, Router &aNeighbor, bool &aResetAdvInterval)
+{
+ bool changed = false;
+ uint8_t linkQuality;
+ uint8_t myRouterId;
+ uint8_t myRouteCount;
+ uint8_t oldLinkCost;
+ Router *nextHop;
+
+ myRouterId = RouterIdFromRloc16(GetRloc16());
+ VerifyOrExit(aRoute.IsRouterIdSet(myRouterId));
+
+ myRouteCount = 0;
+ for (uint8_t routerId = 0; routerId < myRouterId; routerId++)
+ {
+ myRouteCount += aRoute.IsRouterIdSet(routerId);
+ }
+
+ linkQuality = aRoute.GetLinkQualityIn(myRouteCount);
+ VerifyOrExit(aNeighbor.GetLinkQualityOut() != linkQuality);
+
+ oldLinkCost = mRouterTable.GetLinkCost(aNeighbor);
+
+ aNeighbor.SetLinkQualityOut(linkQuality);
+ nextHop = mRouterTable.GetRouter(aNeighbor.GetNextHop());
+
+ // reset MLE advertisement timer if neighbor route cost changed to or from infinite
+ if (nextHop == NULL && (oldLinkCost >= kMaxRouteCost) != (mRouterTable.GetLinkCost(aNeighbor) >= kMaxRouteCost))
+ {
+ aResetAdvInterval = true;
+ }
+ changed = true;
+
+exit:
+ return changed;
+}
+
otError MleRouter::HandleParentRequest(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo)
{
otError error = OT_ERROR_NONE;
@@ -1574,12 +1596,12 @@
LogMleMessage("Receive Parent Request", aMessageInfo.GetPeerAddr());
- VerifyOrExit(IsRouterRoleEnabled(), error = OT_ERROR_INVALID_STATE);
+ VerifyOrExit(IsRouterEligible(), error = OT_ERROR_INVALID_STATE);
// A Router MUST NOT send an MLE Parent Response if:
// 0. It is detached or attempting to another partition
- VerifyOrExit((mRole != OT_DEVICE_ROLE_DETACHED) && (mAttachState == kAttachStateIdle), error = OT_ERROR_DROP);
+ VerifyOrExit((mRole != OT_DEVICE_ROLE_DETACHED) && !IsAttaching(), error = OT_ERROR_DROP);
// 1. It has no available Child capacity (if Max Child Count minus
// Child Count would be equal to zero)
@@ -1629,14 +1651,12 @@
SuccessOrExit(error = Tlv::GetTlv(aMessage, Tlv::kChallenge, sizeof(challenge), challenge));
VerifyOrExit(challenge.IsValid(), error = OT_ERROR_PARSE);
- child = mChildTable.FindChild(macAddr, ChildTable::kInStateAnyExceptInvalid);
+ child = mChildTable.FindChild(macAddr, Child::kInStateAnyExceptInvalid);
if (child == NULL)
{
VerifyOrExit((child = mChildTable.GetNewChild()) != NULL);
- memset(child, 0, sizeof(*child));
-
// MAC Address
child->SetExtAddress(macAddr);
child->GetLinkInfo().Clear();
@@ -1654,7 +1674,7 @@
}
#endif
}
- else if (TimerMilli::Elapsed(child->GetLastHeard()) < kParentRequestRouterTimeout - kParentRequestDuplicateMargin)
+ else if (TimerMilli::GetNow() - child->GetLastHeard() < kParentRequestRouterTimeout - kParentRequestDuplicateMargin)
{
ExitNow(error = OT_ERROR_DUPLICATED);
}
@@ -1662,12 +1682,18 @@
if (!child->IsStateValidOrRestoring())
{
child->SetLastHeard(TimerMilli::GetNow());
- child->SetTimeout(TimerMilli::MsecToSec(kMaxChildIdRequestTimeout));
+ child->SetTimeout(Time::MsecToSec(kMaxChildIdRequestTimeout));
}
SendParentResponse(child, challenge, !scanMask.IsEndDeviceFlagSet());
exit:
+
+ if (error != OT_ERROR_NONE)
+ {
+ otLogWarnMle("Failed to process Parent Request: %s", otThreadErrorToString(error));
+ }
+
return error;
}
@@ -1680,7 +1706,7 @@
{
bool routerStateUpdate = false;
- VerifyOrExit(IsRouterRoleEnabled());
+ VerifyOrExit(IsFullThreadDevice());
mStateUpdateTimer.Start(kStateUpdatePeriod);
@@ -1737,8 +1763,8 @@
{
SendAdvertisement();
- mAdvertiseTimer.Start(TimerMilli::SecToMsec(kReedAdvertiseInterval),
- TimerMilli::SecToMsec(kReedAdvertiseInterval + kReedAdvertiseJitter),
+ mAdvertiseTimer.Start(Time::SecToMsec(kReedAdvertiseInterval),
+ Time::SecToMsec(kReedAdvertiseInterval + kReedAdvertiseJitter),
TrickleTimer::kModePlainTimer);
}
@@ -1771,7 +1797,7 @@
}
// update children state
- for (ChildTable::Iterator iter(GetInstance(), ChildTable::kInStateAnyExceptInvalid); !iter.IsDone(); iter++)
+ for (ChildTable::Iterator iter(GetInstance(), Child::kInStateAnyExceptInvalid); !iter.IsDone(); iter++)
{
Child & child = *iter.GetChild();
uint32_t timeout = 0;
@@ -1786,7 +1812,7 @@
case Neighbor::kStateValid:
case Neighbor::kStateRestored:
case Neighbor::kStateChildUpdateRequest:
- timeout = TimerMilli::SecToMsec(child.GetTimeout());
+ timeout = Time::SecToMsec(child.GetTimeout());
break;
case Neighbor::kStateParentResponse:
@@ -1795,13 +1821,12 @@
break;
}
- if (TimerMilli::Elapsed(child.GetLastHeard()) >= timeout)
+ if (TimerMilli::GetNow() - child.GetLastHeard() >= timeout)
{
otLogInfoMle("Child timeout expired");
RemoveNeighbor(child);
}
- else if ((mRole == OT_DEVICE_ROLE_ROUTER || mRole == OT_DEVICE_ROLE_LEADER) &&
- (child.GetState() == Neighbor::kStateRestored))
+ else if ((mRole == OT_DEVICE_ROLE_ROUTER || mRole == OT_DEVICE_ROLE_LEADER) && child.IsStateRestored())
{
SendChildUpdateRequest(child);
}
@@ -1819,13 +1844,13 @@
continue;
}
- age = TimerMilli::Elapsed(router.GetLastHeard());
+ age = TimerMilli::GetNow() - router.GetLastHeard();
- if (router.GetState() == Neighbor::kStateValid)
+ if (router.IsStateValid())
{
#if OPENTHREAD_CONFIG_MLE_SEND_LINK_REQUEST_ON_ADV_TIMEOUT == 0
- if (age >= TimerMilli::SecToMsec(kMaxNeighborAge))
+ if (age >= Time::SecToMsec(kMaxNeighborAge))
{
otLogInfoMle("Router timeout expired");
RemoveNeighbor(router);
@@ -1834,9 +1859,9 @@
#else
- if (age >= TimerMilli::SecToMsec(kMaxNeighborAge))
+ if (age >= Time::SecToMsec(kMaxNeighborAge))
{
- if (age < TimerMilli::SecToMsec(kMaxNeighborAge) + kMaxTransmissionCount * kUnicastRetransmissionDelay)
+ if (age < Time::SecToMsec(kMaxNeighborAge) + kMaxTransmissionCount * kUnicastRetransmissionDelay)
{
otLogInfoMle("Router timeout expired");
SendLinkRequest(&router);
@@ -1850,7 +1875,7 @@
#endif
}
- else if (router.GetState() == Neighbor::kStateLinkRequest)
+ else if (router.IsStateLinkRequest())
{
if (age >= kMaxLinkRequestTimeout)
{
@@ -1863,8 +1888,7 @@
if (GetRole() == OT_DEVICE_ROLE_LEADER)
{
if (mRouterTable.GetRouter(router.GetNextHop()) == NULL &&
- mRouterTable.GetLinkCost(router) >= kMaxRouteCost &&
- age >= TimerMilli::SecToMsec(kMaxLeaderToRouterTimeout))
+ mRouterTable.GetLinkCost(router) >= kMaxRouteCost && age >= Time::SecToMsec(kMaxLeaderToRouterTimeout))
{
otLogInfoMle("Router ID timeout expired (no route)");
mRouterTable.Release(router.GetRouterId());
@@ -1919,7 +1943,7 @@
SuccessOrExit(error = AppendConnectivity(*message));
SuccessOrExit(error = AppendVersion(*message));
- memset(&destination, 0, sizeof(destination));
+ destination.Clear();
destination.mFields.m16[0] = HostSwap16(0xfe80);
destination.SetIid(aChild->GetExtAddress());
@@ -2026,7 +2050,7 @@
// table is timed out and then trying to register its globally unique
// IPv6 address as the new child.
- for (ChildTable::Iterator iter(GetInstance(), ChildTable::kInStateValidOrRestoring); !iter.IsDone(); iter++)
+ for (ChildTable::Iterator iter(GetInstance(), Child::kInStateValidOrRestoring); !iter.IsDone(); iter++)
{
if (iter.GetChild() == &aChild)
{
@@ -2035,6 +2059,9 @@
IgnoreReturnValue(iter.GetChild()->RemoveIp6Address(GetInstance(), address));
}
+
+ // Clear EID-to-RLOC cache for the unicast address registered by the child.
+ Get<AddressResolver>().Remove(address);
}
if (registeredCount == 0)
@@ -2075,7 +2102,7 @@
LogMleMessage("Receive Child ID Request", aMessageInfo.GetPeerAddr());
- VerifyOrExit(IsRouterRoleEnabled(), error = OT_ERROR_INVALID_STATE);
+ VerifyOrExit(IsRouterEligible(), error = OT_ERROR_INVALID_STATE);
// only process message when operating as a child, router, or leader
VerifyOrExit(IsAttached(), error = OT_ERROR_INVALID_STATE);
@@ -2083,7 +2110,7 @@
// Find Child
aMessageInfo.GetPeerAddr().ToExtAddress(macAddr);
- child = mChildTable.FindChild(macAddr, ChildTable::kInStateAnyExceptInvalid);
+ child = mChildTable.FindChild(macAddr, Child::kInStateAnyExceptInvalid);
VerifyOrExit(child != NULL, error = OT_ERROR_ALREADY);
// Response
@@ -2153,7 +2180,7 @@
RemoveNeighbor(*router);
}
- if (child->GetState() != Neighbor::kStateValid)
+ if (!child->IsStateValid())
{
child->SetState(Neighbor::kStateChildIdRequest);
}
@@ -2215,6 +2242,12 @@
}
exit:
+
+ if (error != OT_ERROR_NONE)
+ {
+ otLogWarnMle("Failed to process Child ID Request: %s", otThreadErrorToString(error));
+ }
+
return error;
}
@@ -2244,21 +2277,29 @@
SuccessOrExit(error = Tlv::GetTlv(aMessage, Tlv::kMode, sizeof(mode), mode));
VerifyOrExit(mode.IsValid(), error = OT_ERROR_PARSE);
+ // Challenge
+ challenge.SetLength(0);
+ if (Tlv::GetTlv(aMessage, Tlv::kChallenge, sizeof(challenge), challenge) == OT_ERROR_NONE)
+ {
+ VerifyOrExit(challenge.IsValid(), error = OT_ERROR_PARSE);
+ tlvs[tlvslength++] = Tlv::kResponse;
+ }
+
// Find Child
aMessageInfo.GetPeerAddr().ToExtAddress(macAddr);
- child = mChildTable.FindChild(macAddr, ChildTable::kInStateAnyExceptInvalid);
+ child = mChildTable.FindChild(macAddr, Child::kInStateAnyExceptInvalid);
tlvs[tlvslength++] = Tlv::kSourceAddress;
// Not proceed if the Child Update Request is from the peer which is not the device's child or
// which was the device's child but becomes invalid.
- if (child == NULL || child->GetState() == Neighbor::kStateInvalid)
+ if (child == NULL || child->IsStateInvalid())
{
// For invalid non-sleepy child, Send Child Update Response with status TLV (error)
if (mode.GetMode().IsRxOnWhenIdle())
{
tlvs[tlvslength++] = Tlv::kStatus;
- SendChildUpdateResponse(NULL, aMessageInfo, tlvs, tlvslength, NULL);
+ SendChildUpdateResponse(NULL, aMessageInfo, tlvs, tlvslength, challenge);
}
ExitNow();
@@ -2272,11 +2313,8 @@
// Parent MUST include Leader Data TLV in Child Update Response
tlvs[tlvslength++] = Tlv::kLeaderData;
- // Challenge
- if (Tlv::GetTlv(aMessage, Tlv::kChallenge, sizeof(challenge), challenge) == OT_ERROR_NONE)
+ if (challenge.IsValid())
{
- VerifyOrExit(challenge.IsValid(), error = OT_ERROR_PARSE);
- tlvs[tlvslength++] = Tlv::kResponse;
tlvs[tlvslength++] = Tlv::kMleFrameCounter;
tlvs[tlvslength++] = Tlv::kLinkFrameCounter;
}
@@ -2349,7 +2387,7 @@
SetChildStateToValid(*child);
child->SetKeySequence(aKeySequence);
}
- else if (child->GetState() == Neighbor::kStateValid)
+ else if (child->IsStateValid())
{
if (childDidChange)
{
@@ -2357,19 +2395,25 @@
}
}
- SendChildUpdateResponse(child, aMessageInfo, tlvs, tlvslength, &challenge);
+ SendChildUpdateResponse(child, aMessageInfo, tlvs, tlvslength, challenge);
exit:
+
+ if (error != OT_ERROR_NONE)
+ {
+ otLogWarnMle("Failed to process Child Update Request from child: %s", otThreadErrorToString(error));
+ }
+
return error;
}
otError MleRouter::HandleChildUpdateResponse(const Message & aMessage,
const Ip6::MessageInfo &aMessageInfo,
- uint32_t aKeySequence)
+ uint32_t aKeySequence,
+ Neighbor * aNeighbor)
{
otError error = OT_ERROR_NONE;
const otThreadLinkInfo *linkInfo = static_cast<const otThreadLinkInfo *>(aMessageInfo.GetLinkInfo());
- Mac::ExtAddress macAddr;
SourceAddressTlv sourceAddress;
TimeoutTlv timeout;
ResponseTlv response;
@@ -2380,17 +2424,28 @@
Child * child;
uint16_t addressRegistrationOffset = 0;
- // Find Child
- aMessageInfo.GetPeerAddr().ToExtAddress(macAddr);
-
- child = mChildTable.FindChild(macAddr, ChildTable::kInStateAnyExceptInvalid);
-
- if (child == NULL)
+ if ((aNeighbor == NULL) || IsActiveRouter(aNeighbor->GetRloc16()))
{
LogMleMessage("Receive Child Update Response from unknown child", aMessageInfo.GetPeerAddr());
ExitNow(error = OT_ERROR_NOT_FOUND);
}
+ child = static_cast<Child *>(aNeighbor);
+
+ // Response
+ if (Tlv::GetTlv(aMessage, Tlv::kResponse, sizeof(response), response) == OT_ERROR_NONE)
+ {
+ VerifyOrExit(response.IsValid() &&
+ memcmp(response.GetResponse(), child->GetChallenge(), child->GetChallengeSize()) == 0,
+ error = OT_ERROR_SECURITY);
+ }
+ else
+ {
+ VerifyOrExit(child->IsStateValid(), error = OT_ERROR_SECURITY);
+ }
+
+ LogMleMessage("Receive Child Update Response from child", aMessageInfo.GetPeerAddr(), child->GetRloc16());
+
// Source Address
if (Tlv::GetTlv(aMessage, Tlv::kSourceAddress, sizeof(sourceAddress), sourceAddress) == OT_ERROR_NONE)
{
@@ -2398,22 +2453,11 @@
if (child->GetRloc16() != sourceAddress.GetRloc16())
{
- LogMleMessage("Receive Child Update Response from unknown child", aMessageInfo.GetPeerAddr(),
- sourceAddress.GetRloc16());
- ExitNow(error = OT_ERROR_PARSE);
+ RemoveNeighbor(*child);
+ ExitNow();
}
}
- LogMleMessage("Receive Child Update Response from child", aMessageInfo.GetPeerAddr(), child->GetRloc16());
-
- // Response
- if (Tlv::GetTlv(aMessage, Tlv::kResponse, sizeof(response), response) == OT_ERROR_NONE)
- {
- VerifyOrExit(response.IsValid() &&
- memcmp(response.GetResponse(), child->GetChallenge(), child->GetChallengeSize()) == 0,
- error = OT_ERROR_SECURITY);
- }
-
// Status
if (Tlv::GetTlv(aMessage, Tlv::kStatus, sizeof(status), status) == OT_ERROR_NONE)
{
@@ -2474,10 +2518,18 @@
child->GetLinkInfo().AddRss(Get<Mac::Mac>().GetNoiseFloor(), linkInfo->mRss);
exit:
+
+ if (error != OT_ERROR_NONE)
+ {
+ otLogWarnMle("Failed to process Child Update Response from child: %s", otThreadErrorToString(error));
+ }
+
return error;
}
-otError MleRouter::HandleDataRequest(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo)
+otError MleRouter::HandleDataRequest(const Message & aMessage,
+ const Ip6::MessageInfo &aMessageInfo,
+ const Neighbor * aNeighbor)
{
otError error = OT_ERROR_NONE;
TlvRequestTlv tlvRequest;
@@ -2488,6 +2540,8 @@
LogMleMessage("Receive Data Request", aMessageInfo.GetPeerAddr());
+ VerifyOrExit(aNeighbor && aNeighbor->IsStateValid(), error = OT_ERROR_SECURITY);
+
// TLV Request
SuccessOrExit(error = Tlv::GetTlv(aMessage, Tlv::kTlvRequest, sizeof(tlvRequest), tlvRequest));
VerifyOrExit(tlvRequest.IsValid() && tlvRequest.GetLength() <= sizeof(tlvs), error = OT_ERROR_PARSE);
@@ -2525,6 +2579,12 @@
SendDataResponse(aMessageInfo.GetPeerAddr(), tlvs, numTlvs, 0);
exit:
+
+ if (error != OT_ERROR_NONE)
+ {
+ otLogWarnMle("Failed to process Data Request: %s", otThreadErrorToString(error));
+ }
+
return error;
}
@@ -2536,7 +2596,7 @@
VerifyOrExit(mRole == OT_DEVICE_ROLE_ROUTER || mRole == OT_DEVICE_ROLE_LEADER);
- memset(&destination, 0, sizeof(destination));
+ destination.Clear();
destination.mFields.m16[0] = HostSwap16(0xff02);
destination.mFields.m16[7] = HostSwap16(0x0001);
@@ -2554,7 +2614,7 @@
{
VerifyOrExit(mRole == OT_DEVICE_ROLE_ROUTER || mRole == OT_DEVICE_ROLE_LEADER);
- for (ChildTable::Iterator iter(GetInstance(), ChildTable::kInStateValid); !iter.IsDone(); iter++)
+ for (ChildTable::Iterator iter(GetInstance(), Child::kInStateValid); !iter.IsDone(); iter++)
{
Child & child = *iter.GetChild();
uint8_t version;
@@ -2586,14 +2646,13 @@
}
#if OPENTHREAD_CONFIG_MLE_STEERING_DATA_SET_OOB_ENABLE
-otError MleRouter::SetSteeringData(const Mac::ExtAddress *aExtAddress)
+void MleRouter::SetSteeringData(const Mac::ExtAddress *aExtAddress)
{
- otError error = OT_ERROR_NONE;
Mac::ExtAddress nullExtAddr;
Mac::ExtAddress allowAnyExtAddr;
- memset(nullExtAddr.m8, 0, sizeof(nullExtAddr.m8));
- memset(allowAnyExtAddr.m8, 0xFF, sizeof(allowAnyExtAddr.m8));
+ nullExtAddr.Clear();
+ allowAnyExtAddr.Fill(0xff);
mSteeringData.Init();
@@ -2617,8 +2676,6 @@
// compute Bloom Filter
mSteeringData.ComputeBloomFilter(joinerId);
}
-
- return error;
}
#endif // OPENTHREAD_CONFIG_MLE_STEERING_DATA_SET_OOB_ENABLE
@@ -2635,7 +2692,7 @@
LogMleMessage("Receive Discovery Request", aMessageInfo.GetPeerAddr());
// only Routers and REEDs respond
- VerifyOrExit(IsFullThreadDevice(), error = OT_ERROR_INVALID_STATE);
+ VerifyOrExit(IsRouterEligible(), error = OT_ERROR_INVALID_STATE);
// find MLE Discovery TLV
VerifyOrExit(Tlv::GetOffset(aMessage, Tlv::kDiscovery, offset) == OT_ERROR_NONE, error = OT_ERROR_PARSE);
@@ -2691,7 +2748,7 @@
if (error != OT_ERROR_NONE)
{
- otLogWarnMleErr(error, "Failed to process Discovery Request");
+ otLogWarnMle("Failed to process Discovery Request: %s", otThreadErrorToString(error));
}
return error;
@@ -2731,7 +2788,7 @@
commissionerUdpPort.Init();
commissionerUdpPort.SetUdpPort(MeshCoP::kBorderAgentUdpPort);
- SuccessOrExit(error = message->AppendTlv(commissionerUdpPort));
+ SuccessOrExit(error = commissionerUdpPort.AppendTo(*message));
discoveryResponse.SetNativeCommissioner(true);
}
@@ -2740,17 +2797,17 @@
discoveryResponse.SetNativeCommissioner(false);
}
- SuccessOrExit(error = message->AppendTlv(discoveryResponse));
+ SuccessOrExit(error = discoveryResponse.AppendTo(*message));
// Extended PAN ID TLV
extPanId.Init();
extPanId.SetExtendedPanId(Get<Mac::Mac>().GetExtendedPanId());
- SuccessOrExit(error = message->AppendTlv(extPanId));
+ SuccessOrExit(error = extPanId.AppendTo(*message));
// Network Name TLV
networkName.Init();
- networkName.SetNetworkName(Get<Mac::Mac>().GetNetworkName());
- SuccessOrExit(error = message->AppendTlv(networkName));
+ networkName.SetNetworkName(Get<Mac::Mac>().GetNetworkName().GetAsData());
+ SuccessOrExit(error = networkName.AppendTo(*message));
#if OPENTHREAD_CONFIG_MLE_STEERING_DATA_SET_OOB_ENABLE
@@ -2758,7 +2815,7 @@
// Otherwise use the one from commissioning data.
if (!mSteeringData.IsCleared())
{
- SuccessOrExit(error = message->AppendTlv(mSteeringData));
+ SuccessOrExit(error = mSteeringData.AppendTo(*message));
}
else
#endif // OPENTHREAD_CONFIG_MLE_STEERING_DATA_SET_OOB_ENABLE
@@ -2768,14 +2825,14 @@
if (steeringData != NULL)
{
- SuccessOrExit(error = message->AppendTlv(*steeringData));
+ SuccessOrExit(error = steeringData->AppendTo(*message));
}
}
// Joiner UDP Port TLV
joinerUdpPort.Init();
joinerUdpPort.SetUdpPort(Get<MeshCoP::JoinerRouter>().GetJoinerUdpPort());
- SuccessOrExit(error = message->AppendTlv(joinerUdpPort));
+ SuccessOrExit(error = joinerUdpPort.AppendTo(*message));
tlv.SetLength(static_cast<uint8_t>(message->GetLength() - startOffset));
message->Write(startOffset - sizeof(tlv), sizeof(tlv), &tlv);
@@ -2788,9 +2845,14 @@
exit:
- if (error != OT_ERROR_NONE && message != NULL)
+ if (error != OT_ERROR_NONE)
{
- message->Free();
+ otLogWarnMle("Failed to process Discovery Response: %s", otThreadErrorToString(error));
+
+ if (message != NULL)
+ {
+ message->Free();
+ }
}
return error;
@@ -2825,7 +2887,7 @@
rloc16 = Get<Mac::Mac>().GetShortAddress() | mNextChildId;
- } while (mChildTable.FindChild(rloc16, ChildTable::kInStateAnyExceptInvalid) != NULL);
+ } while (mChildTable.FindChild(rloc16, Child::kInStateAnyExceptInvalid) != NULL);
// allocate Child ID
aChild.SetRloc16(rloc16);
@@ -2877,7 +2939,7 @@
}
#endif
- memset(&destination, 0, sizeof(destination));
+ destination.Clear();
destination.mFields.m16[0] = HostSwap16(0xfe80);
destination.SetIid(aChild.GetExtAddress());
SuccessOrExit(error = SendMessage(*message, destination));
@@ -2932,14 +2994,14 @@
SuccessOrExit(error = AppendActiveTimestamp(*message));
SuccessOrExit(error = AppendPendingTimestamp(*message));
- if (aChild.GetState() != Neighbor::kStateValid)
+ if (!aChild.IsStateValid())
{
SuccessOrExit(error = AppendTlvRequest(*message, tlvs, sizeof(tlvs)));
aChild.GenerateChallenge();
SuccessOrExit(error = AppendChallenge(*message, aChild.GetChallenge(), aChild.GetChallengeSize()));
}
- memset(&destination, 0, sizeof(destination));
+ destination.Clear();
destination.mFields.m16[0] = HostSwap16(0xfe80);
destination.SetIid(aChild.GetExtAddress());
SuccessOrExit(error = SendMessage(*message, destination));
@@ -2966,7 +3028,7 @@
const Ip6::MessageInfo &aMessageInfo,
const uint8_t * aTlvs,
uint8_t aTlvsLength,
- const ChallengeTlv * aChallenge)
+ const ChallengeTlv & aChallenge)
{
otError error = OT_ERROR_NONE;
Message *message;
@@ -3001,7 +3063,7 @@
break;
case Tlv::kResponse:
- SuccessOrExit(error = AppendResponse(*message, aChallenge->GetChallenge(), aChallenge->GetLength()));
+ SuccessOrExit(error = AppendResponse(*message, aChallenge.GetChallenge(), aChallenge.GetChallengeLength()));
break;
case Tlv::kSourceAddress:
@@ -3116,7 +3178,7 @@
{
bool rval = false;
- if (GetRouterId(aRloc16) == GetRouterId(Get<Mac::Mac>().GetShortAddress()))
+ if (RouterIdFromRloc16(aRloc16) == RouterIdFromRloc16(Get<Mac::Mac>().GetShortAddress()))
{
Neighbor *neighbor;
@@ -3130,49 +3192,35 @@
void MleRouter::RemoveNeighbor(Neighbor &aNeighbor)
{
- switch (mRole)
+ if (&aNeighbor == &mParent)
{
- case OT_DEVICE_ROLE_DISABLED:
- case OT_DEVICE_ROLE_DETACHED:
- break;
-
- case OT_DEVICE_ROLE_CHILD:
- if (&aNeighbor == &mParent)
+ if (mRole == OT_DEVICE_ROLE_CHILD)
{
BecomeDetached();
}
-
- break;
-
- case OT_DEVICE_ROLE_ROUTER:
- case OT_DEVICE_ROLE_LEADER:
- if (!IsActiveRouter(aNeighbor.GetRloc16()))
+ }
+ else if (!IsActiveRouter(aNeighbor.GetRloc16()))
+ {
+ if (aNeighbor.IsStateValidOrRestoring())
{
- if (aNeighbor.IsStateValidOrRestoring())
- {
- Signal(OT_NEIGHBOR_TABLE_EVENT_CHILD_REMOVED, aNeighbor);
- }
-
- aNeighbor.SetState(Neighbor::kStateInvalid);
-
- Get<IndirectSender>().ClearAllMessagesForSleepyChild(static_cast<Child &>(aNeighbor));
- Get<NetworkData::Leader>().SendServerDataNotification(aNeighbor.GetRloc16());
-
- if (aNeighbor.IsFullThreadDevice())
- {
- // Clear all EID-to-RLOC entries associated with the child.
- Get<AddressResolver>().Remove(aNeighbor.GetRloc16());
- }
-
- RemoveStoredChild(aNeighbor.GetRloc16());
- }
- else if (aNeighbor.GetState() == Neighbor::kStateValid)
- {
- Signal(OT_NEIGHBOR_TABLE_EVENT_ROUTER_REMOVED, aNeighbor);
- mRouterTable.RemoveNeighbor(static_cast<Router &>(aNeighbor));
+ Signal(OT_NEIGHBOR_TABLE_EVENT_CHILD_REMOVED, aNeighbor);
}
- break;
+ Get<IndirectSender>().ClearAllMessagesForSleepyChild(static_cast<Child &>(aNeighbor));
+ Get<NetworkData::Leader>().SendServerDataNotification(aNeighbor.GetRloc16());
+
+ if (aNeighbor.IsFullThreadDevice())
+ {
+ // Clear all EID-to-RLOC entries associated with the child.
+ Get<AddressResolver>().Remove(aNeighbor.GetRloc16());
+ }
+
+ RemoveStoredChild(aNeighbor.GetRloc16());
+ }
+ else if (aNeighbor.IsStateValid())
+ {
+ Signal(OT_NEIGHBOR_TABLE_EVENT_ROUTER_REMOVED, aNeighbor);
+ mRouterTable.RemoveNeighbor(static_cast<Router &>(aNeighbor));
}
aNeighbor.GetLinkInfo().Clear();
@@ -3200,7 +3248,7 @@
case OT_DEVICE_ROLE_ROUTER:
case OT_DEVICE_ROLE_LEADER:
- rval = mChildTable.FindChild(aAddress, ChildTable::kInStateValidOrRestoring);
+ rval = mChildTable.FindChild(aAddress, Child::kInStateValidOrRestoring);
VerifyOrExit(rval == NULL);
rval = mRouterTable.GetNeighbor(aAddress);
@@ -3227,7 +3275,7 @@
case OT_DEVICE_ROLE_ROUTER:
case OT_DEVICE_ROLE_LEADER:
- rval = mChildTable.FindChild(aAddress, ChildTable::kInStateValidOrRestoring);
+ rval = mChildTable.FindChild(aAddress, Child::kInStateValidOrRestoring);
VerifyOrExit(rval == NULL);
rval = mRouterTable.GetNeighbor(aAddress);
@@ -3237,7 +3285,7 @@
ExitNow();
}
- if (mAttachState != kAttachStateIdle)
+ if (IsAttaching())
{
rval = Mle::GetNeighbor(aAddress);
}
@@ -3297,7 +3345,7 @@
context.mContextId = 0xff;
}
- for (ChildTable::Iterator iter(GetInstance(), ChildTable::kInStateValidOrRestoring); !iter.IsDone(); iter++)
+ for (ChildTable::Iterator iter(GetInstance(), Child::kInStateValidOrRestoring); !iter.IsDone(); iter++)
{
child = iter.GetChild();
@@ -3352,7 +3400,7 @@
uint16_t MleRouter::GetNextHop(uint16_t aDestination)
{
- uint8_t destinationId = GetRouterId(aDestination);
+ uint8_t destinationId = RouterIdFromRloc16(aDestination);
uint8_t routeCost;
uint8_t linkCost;
uint16_t rval = Mac::kShortAddrInvalid;
@@ -3379,13 +3427,13 @@
if ((routeCost + GetLinkCost(router->GetNextHop())) < linkCost)
{
nextHop = mRouterTable.GetRouter(router->GetNextHop());
- VerifyOrExit(nextHop != NULL && nextHop->GetState() != Neighbor::kStateInvalid);
+ VerifyOrExit(nextHop != NULL && !nextHop->IsStateInvalid());
- rval = GetRloc16(router->GetNextHop());
+ rval = Rloc16FromRouterId(router->GetNextHop());
}
else if (linkCost < kMaxRouteCost)
{
- rval = GetRloc16(destinationId);
+ rval = Rloc16FromRouterId(destinationId);
}
exit:
@@ -3394,14 +3442,14 @@
uint8_t MleRouter::GetCost(uint16_t aRloc16)
{
- uint8_t routerId = GetRouterId(aRloc16);
+ uint8_t routerId = RouterIdFromRloc16(aRloc16);
uint8_t cost = GetLinkCost(routerId);
Router *router = mRouterTable.GetRouter(routerId);
uint8_t routeCost;
VerifyOrExit(router != NULL && mRouterTable.GetRouter(router->GetNextHop()) != NULL);
- routeCost = GetRouteCost(aRloc16) + GetLinkCost(mRouterTable.GetRouter(routerId)->GetNextHop());
+ routeCost = GetRouteCost(aRloc16) + GetLinkCost(router->GetNextHop());
if (cost > routeCost)
{
@@ -3417,7 +3465,7 @@
uint8_t rval = kMaxRouteCost;
const Router *router;
- router = mRouterTable.GetRouter(GetRouterId(aRloc16));
+ router = mRouterTable.GetRouter(RouterIdFromRloc16(aRloc16));
VerifyOrExit(router != NULL && mRouterTable.GetRouter(router->GetNextHop()) != NULL);
rval = router->GetCost();
@@ -3453,11 +3501,11 @@
if ((aChildId & ~kMaxChildId) != 0)
{
- aChildId = GetChildId(aChildId);
+ aChildId = ChildIdFromRloc16(aChildId);
}
rloc16 = Get<Mac::Mac>().GetShortAddress() | aChildId;
- child = mChildTable.FindChild(rloc16, ChildTable::kInStateAnyExceptInvalid);
+ child = mChildTable.FindChild(rloc16, Child::kInStateAnyExceptInvalid);
VerifyOrExit(child != NULL, error = OT_ERROR_NOT_FOUND);
error = GetChildInfo(*child, aChildInfo);
@@ -3509,7 +3557,7 @@
const Settings::ChildInfo &childInfo = iter.GetChildInfo();
child = mChildTable.FindChild(*static_cast<const Mac::ExtAddress *>(&childInfo.mExtAddress),
- ChildTable::kInStateAnyExceptInvalid);
+ Child::kInStateAnyExceptInvalid);
if (child == NULL)
{
@@ -3520,7 +3568,7 @@
foundDuplicate = true;
}
- memset(child, 0, sizeof(*child));
+ child->Clear();
child->SetExtAddress(*static_cast<const Mac::ExtAddress *>(&childInfo.mExtAddress));
child->GetLinkInfo().Clear();
@@ -3570,7 +3618,7 @@
IgnoreReturnValue(RemoveStoredChild(aChild.GetRloc16()));
- memset(&childInfo, 0, sizeof(childInfo));
+ childInfo.Clear();
childInfo.mExtAddress = aChild.GetExtAddress();
childInfo.mTimeout = aChild.GetTimeout();
childInfo.mRloc16 = aChild.GetRloc16();
@@ -3585,7 +3633,7 @@
SuccessOrExit(error = Get<Settings>().DeleteChildInfo());
- for (ChildTable::Iterator iter(GetInstance(), ChildTable::kInStateAnyExceptInvalid); !iter.IsDone(); iter++)
+ for (ChildTable::Iterator iter(GetInstance(), Child::kInStateAnyExceptInvalid); !iter.IsDone(); iter++)
{
SuccessOrExit(error = StoreChild(*iter.GetChild()));
}
@@ -3604,23 +3652,19 @@
aChildInfo.mExtAddress = aChild.GetExtAddress();
aChildInfo.mTimeout = aChild.GetTimeout();
aChildInfo.mRloc16 = aChild.GetRloc16();
- aChildInfo.mChildId = GetChildId(aChild.GetRloc16());
+ aChildInfo.mChildId = ChildIdFromRloc16(aChild.GetRloc16());
aChildInfo.mNetworkDataVersion = aChild.GetNetworkDataVersion();
- aChildInfo.mAge = TimerMilli::MsecToSec(TimerMilli::Elapsed(aChild.GetLastHeard()));
+ aChildInfo.mAge = Time::MsecToSec(TimerMilli::GetNow() - aChild.GetLastHeard());
aChildInfo.mLinkQualityIn = aChild.GetLinkInfo().GetLinkQuality();
aChildInfo.mAverageRssi = aChild.GetLinkInfo().GetAverageRss();
aChildInfo.mLastRssi = aChild.GetLinkInfo().GetLastRss();
-
-#if OPENTHREAD_CONFIG_ENABLE_TX_ERROR_RATE_TRACKING
- aChildInfo.mFrameErrorRate = aChild.GetLinkInfo().GetFrameErrorRate();
- aChildInfo.mMessageErrorRate = aChild.GetLinkInfo().GetMessageErrorRate();
-#endif
-
- aChildInfo.mRxOnWhenIdle = aChild.IsRxOnWhenIdle();
- aChildInfo.mSecureDataRequest = aChild.IsSecureDataRequest();
- aChildInfo.mFullThreadDevice = aChild.IsFullThreadDevice();
- aChildInfo.mFullNetworkData = aChild.IsFullNetworkData();
- aChildInfo.mIsStateRestoring = aChild.IsStateRestoring();
+ aChildInfo.mFrameErrorRate = aChild.GetLinkInfo().GetFrameErrorRate();
+ aChildInfo.mMessageErrorRate = aChild.GetLinkInfo().GetMessageErrorRate();
+ aChildInfo.mRxOnWhenIdle = aChild.IsRxOnWhenIdle();
+ aChildInfo.mSecureDataRequest = aChild.IsSecureDataRequest();
+ aChildInfo.mFullThreadDevice = aChild.IsFullThreadDevice();
+ aChildInfo.mFullNetworkData = aChild.IsFullNetworkData();
+ aChildInfo.mIsStateRestoring = aChild.IsStateRestoring();
exit:
return error;
@@ -3628,18 +3672,16 @@
void MleRouter::GetNeighborInfo(Neighbor &aNeighbor, otNeighborInfo &aNeighInfo)
{
- aNeighInfo.mExtAddress = aNeighbor.GetExtAddress();
- aNeighInfo.mAge = TimerMilli::MsecToSec(TimerMilli::Elapsed(aNeighbor.GetLastHeard()));
- aNeighInfo.mRloc16 = aNeighbor.GetRloc16();
- aNeighInfo.mLinkFrameCounter = aNeighbor.GetLinkFrameCounter();
- aNeighInfo.mMleFrameCounter = aNeighbor.GetMleFrameCounter();
- aNeighInfo.mLinkQualityIn = aNeighbor.GetLinkInfo().GetLinkQuality();
- aNeighInfo.mAverageRssi = aNeighbor.GetLinkInfo().GetAverageRss();
- aNeighInfo.mLastRssi = aNeighbor.GetLinkInfo().GetLastRss();
-#if OPENTHREAD_CONFIG_ENABLE_TX_ERROR_RATE_TRACKING
- aNeighInfo.mFrameErrorRate = aNeighbor.GetLinkInfo().GetFrameErrorRate();
- aNeighInfo.mMessageErrorRate = aNeighbor.GetLinkInfo().GetMessageErrorRate();
-#endif
+ aNeighInfo.mExtAddress = aNeighbor.GetExtAddress();
+ aNeighInfo.mAge = Time::MsecToSec(TimerMilli::GetNow() - aNeighbor.GetLastHeard());
+ aNeighInfo.mRloc16 = aNeighbor.GetRloc16();
+ aNeighInfo.mLinkFrameCounter = aNeighbor.GetLinkFrameCounter();
+ aNeighInfo.mMleFrameCounter = aNeighbor.GetMleFrameCounter();
+ aNeighInfo.mLinkQualityIn = aNeighbor.GetLinkInfo().GetLinkQuality();
+ aNeighInfo.mAverageRssi = aNeighbor.GetLinkInfo().GetAverageRss();
+ aNeighInfo.mLastRssi = aNeighbor.GetLinkInfo().GetLastRss();
+ aNeighInfo.mFrameErrorRate = aNeighbor.GetLinkInfo().GetFrameErrorRate();
+ aNeighInfo.mMessageErrorRate = aNeighbor.GetLinkInfo().GetMessageErrorRate();
aNeighInfo.mRxOnWhenIdle = aNeighbor.IsRxOnWhenIdle();
aNeighInfo.mSecureDataRequest = aNeighbor.IsSecureDataRequest();
aNeighInfo.mFullThreadDevice = aNeighbor.IsFullThreadDevice();
@@ -3667,7 +3709,7 @@
break;
}
- if (child->GetState() == Neighbor::kStateValid)
+ if (child->IsStateValid())
{
neighbor = child;
aNeighInfo.mIsChild = true;
@@ -3686,7 +3728,7 @@
{
Router *router = mRouterTable.GetRouter(static_cast<uint8_t>(index));
- if (router != NULL && router->GetState() == Neighbor::kStateValid)
+ if (router != NULL && router->IsStateValid())
{
neighbor = router;
aNeighInfo.mIsChild = false;
@@ -3719,7 +3761,7 @@
}
// loop exists
- router = mRouterTable.GetRouter(GetRouterId(aDestRloc16));
+ router = mRouterTable.GetRouter(RouterIdFromRloc16(aDestRloc16));
VerifyOrExit(router != NULL);
// invalidate next hop
@@ -3755,10 +3797,10 @@
ExitNow();
}
}
- else if (GetRouterId(aMeshDest) == mRouterId)
+ else if (RouterIdFromRloc16(aMeshDest) == mRouterId)
{
// mesh destination is a child of this device
- if (mChildTable.FindChild(aMeshDest, ChildTable::kInStateValidOrRestoring))
+ if (mChildTable.FindChild(aMeshDest, Child::kInStateValidOrRestoring))
{
ExitNow();
}
@@ -3799,18 +3841,18 @@
macAddr64Tlv.Init();
macAddr64Tlv.SetMacAddr(Get<Mac::Mac>().GetExtAddress());
- SuccessOrExit(error = message->AppendTlv(macAddr64Tlv));
+ SuccessOrExit(error = macAddr64Tlv.AppendTo(*message));
if (IsRouterIdValid(mPreviousRouterId))
{
rlocTlv.Init();
- rlocTlv.SetRloc16(GetRloc16(mPreviousRouterId));
- SuccessOrExit(error = message->AppendTlv(rlocTlv));
+ rlocTlv.SetRloc16(Rloc16FromRouterId(mPreviousRouterId));
+ SuccessOrExit(error = rlocTlv.AppendTo(*message));
}
statusTlv.Init();
statusTlv.SetStatus(aStatus);
- SuccessOrExit(error = message->AppendTlv(statusTlv));
+ SuccessOrExit(error = statusTlv.AppendTo(*message));
#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
SuccessOrExit(error = AppendXtalAccuracy(*message));
@@ -3850,12 +3892,12 @@
SuccessOrExit(error = message->SetPayloadMarker());
rlocTlv.Init();
- rlocTlv.SetRloc16(GetRloc16(mRouterId));
- SuccessOrExit(error = message->AppendTlv(rlocTlv));
+ rlocTlv.SetRloc16(Rloc16FromRouterId(mRouterId));
+ SuccessOrExit(error = rlocTlv.AppendTo(*message));
macAddr64Tlv.Init();
macAddr64Tlv.SetMacAddr(Get<Mac::Mac>().GetExtAddress());
- SuccessOrExit(error = message->AppendTlv(macAddr64Tlv));
+ SuccessOrExit(error = macAddr64Tlv.AppendTo(*message));
messageInfo.SetSockAddr(GetMeshLocal16());
SuccessOrExit(error = GetLeaderAddress(messageInfo.GetPeerAddr()));
@@ -3924,25 +3966,15 @@
SuccessOrExit(ThreadTlv::GetTlv(*aMessage, ThreadTlv::kRloc16, sizeof(rlocTlv), rlocTlv));
VerifyOrExit(rlocTlv.IsValid());
- routerId = GetRouterId(rlocTlv.GetRloc16());
+ routerId = RouterIdFromRloc16(rlocTlv.GetRloc16());
SuccessOrExit(ThreadTlv::GetTlv(*aMessage, ThreadTlv::kRouterMask, sizeof(routerMaskTlv), routerMaskTlv));
VerifyOrExit(routerMaskTlv.IsValid());
- // if allocated routerId is different from previous routerId
- if (IsRouterIdValid(mPreviousRouterId) && routerId != mPreviousRouterId)
- {
- // reset children info if any
- if (HasChildren())
- {
- RemoveChildren();
- }
- }
-
// assign short address
SetRouterId(routerId);
- SetStateRouter(GetRloc16(mRouterId));
+ SetStateRouter(Rloc16FromRouterId(mRouterId));
mRouterTable.Clear();
mRouterTable.ProcessTlv(routerMaskTlv);
@@ -3967,14 +3999,14 @@
{
// Keep route path to the Leader reported by the parent before it is updated.
leader->SetCost(mParentLeaderCost);
- leader->SetNextHop(GetRouterId(mParent.GetRloc16()));
+ leader->SetNextHop(RouterIdFromRloc16(mParent.GetRloc16()));
}
// send link request
SendLinkRequest(NULL);
// send child id responses
- for (ChildTable::Iterator iter(GetInstance(), ChildTable::kInStateChildIdRequest); !iter.IsDone(); iter++)
+ for (ChildTable::Iterator iter(GetInstance(), Child::kInStateChildIdRequest); !iter.IsDone(); iter++)
{
SendChildIdResponse(*iter.GetChild());
}
@@ -4049,7 +4081,7 @@
if (ThreadTlv::GetTlv(aMessage, ThreadTlv::kRloc16, sizeof(rlocTlv), rlocTlv) == OT_ERROR_NONE)
{
VerifyOrExit(rlocTlv.IsValid(), error = OT_ERROR_PARSE);
- router = mRouterTable.Allocate(GetRouterId(rlocTlv.GetRloc16()));
+ router = mRouterTable.Allocate(RouterIdFromRloc16(rlocTlv.GetRloc16()));
}
// allocate new router id
@@ -4096,27 +4128,27 @@
statusTlv.Init();
statusTlv.SetStatus(aRouter == NULL ? statusTlv.kNoAddressAvailable : statusTlv.kSuccess);
- SuccessOrExit(error = message->AppendTlv(statusTlv));
+ SuccessOrExit(error = statusTlv.AppendTo(*message));
if (aRouter != NULL)
{
rlocTlv.Init();
rlocTlv.SetRloc16(aRouter->GetRloc16());
- SuccessOrExit(error = message->AppendTlv(rlocTlv));
+ SuccessOrExit(error = rlocTlv.AppendTo(*message));
routerMaskTlv.Init();
routerMaskTlv.SetIdSequence(mRouterTable.GetRouterIdSequence());
routerMaskTlv.ClearAssignedRouterIdMask();
- for (uint8_t i = 0; i <= kMaxRouterId; i++)
+ for (uint8_t routerId = 0; routerId <= kMaxRouterId; routerId++)
{
- if (mRouterTable.IsAllocated(i))
+ if (mRouterTable.IsAllocated(routerId))
{
- routerMaskTlv.SetAssignedRouterId(i);
+ routerMaskTlv.SetAssignedRouterId(routerId);
}
}
- SuccessOrExit(error = message->AppendTlv(routerMaskTlv));
+ SuccessOrExit(error = routerMaskTlv.AppendTo(*message));
}
SuccessOrExit(error = Get<Coap::Coap>().SendMessage(*message, aMessageInfo));
@@ -4154,7 +4186,7 @@
SuccessOrExit(ThreadTlv::GetTlv(aMessage, ThreadTlv::kExtMacAddress, sizeof(macAddr64Tlv), macAddr64Tlv));
VerifyOrExit(macAddr64Tlv.IsValid());
- routerId = GetRouterId(rlocTlv.GetRloc16());
+ routerId = RouterIdFromRloc16(rlocTlv.GetRloc16());
router = mRouterTable.GetRouter(routerId);
VerifyOrExit(router != NULL && router->GetExtAddress() == macAddr64Tlv.GetMacAddr());
@@ -4181,7 +4213,7 @@
}
else
{
- uint16_t numChildren = mChildTable.GetNumChildren(ChildTable::kInStateValid);
+ uint16_t numChildren = mChildTable.GetNumChildren(Child::kInStateValid);
uint16_t maxAllowed = mChildTable.GetMaxChildrenAllowed();
if ((maxAllowed - numChildren) < (maxAllowed / 3))
@@ -4261,7 +4293,7 @@
continue;
}
- if (router.GetState() != Neighbor::kStateValid)
+ if (!router.IsStateValid())
{
// skip non-neighbor routers
continue;
@@ -4303,7 +4335,7 @@
tlv.Init();
FillConnectivityTlv(tlv);
- return aMessage.AppendTlv(tlv);
+ return tlv.AppendTo(aMessage);
}
otError MleRouter::AppendChildAddresses(Message &aMessage, Child &aChild)
@@ -4343,16 +4375,8 @@
length += entry.GetLength();
}
- if (length > 0)
- {
- tlv.SetLength(length);
- aMessage.Write(startOffset, sizeof(tlv), &tlv);
- }
- else
- {
- // remove AddressRegistrationTlv if no address to be echoed back
- aMessage.SetLength(startOffset);
- }
+ tlv.SetLength(length);
+ aMessage.Write(startOffset, sizeof(tlv), &tlv);
exit:
return error;
@@ -4421,7 +4445,7 @@
tlv.Init();
FillRouteTlv(tlv);
- return aMessage.AppendTlv(tlv);
+ return tlv.AppendTo(aMessage);
}
otError MleRouter::AppendActiveDataset(Message &aMessage)
@@ -4443,7 +4467,7 @@
{
Router &router = *iter.GetRouter();
- if (router.GetState() != Neighbor::kStateValid)
+ if (!router.IsStateValid())
{
continue;
}
@@ -4483,7 +4507,7 @@
}
// check if neighbor is valid
- if (router.GetState() == Neighbor::kStateValid)
+ if (router.IsStateValid())
{
// if neighbor is just peer
if (router.GetRouterId() == aRouterId)
@@ -4537,7 +4561,7 @@
void MleRouter::SetChildStateToValid(Child &aChild)
{
- VerifyOrExit(aChild.GetState() != Neighbor::kStateValid);
+ VerifyOrExit(!aChild.IsStateValid());
aChild.SetState(Neighbor::kStateValid);
StoreChild(aChild);
@@ -4549,12 +4573,12 @@
bool MleRouter::HasChildren(void)
{
- return mChildTable.HasChildren(ChildTable::kInStateValidOrAttaching);
+ return mChildTable.HasChildren(Child::kInStateValidOrAttaching);
}
void MleRouter::RemoveChildren(void)
{
- for (ChildTable::Iterator iter(GetInstance(), ChildTable::kInStateValidOrRestoring); !iter.IsDone(); iter++)
+ for (ChildTable::Iterator iter(GetInstance(), Child::kInStateValidOrRestoring); !iter.IsDone(); iter++)
{
RemoveNeighbor(*iter.GetChild());
}
@@ -4567,7 +4591,7 @@
VerifyOrExit(routerCount > mRouterDowngradeThreshold);
- numChildren = mChildTable.GetNumChildren(ChildTable::kInStateValid);
+ numChildren = mChildTable.GetNumChildren(Child::kInStateValid);
return numChildren < (routerCount - mRouterDowngradeThreshold) * 3;
@@ -4594,7 +4618,7 @@
VerifyOrExit(mRole == OT_DEVICE_ROLE_ROUTER || mRole == OT_DEVICE_ROLE_LEADER, error = OT_ERROR_INVALID_STATE);
- for (ChildTable::Iterator iter(GetInstance(), ChildTable::kInStateValid); !iter.IsDone(); iter++)
+ for (ChildTable::Iterator iter(GetInstance(), Child::kInStateValid); !iter.IsDone(); iter++)
{
Child &child = *iter.GetChild();
@@ -4660,7 +4684,7 @@
{
bool rval = false;
- for (ChildTable::Iterator iter(GetInstance(), ChildTable::kInStateValidOrRestoring); !iter.IsDone(); iter++)
+ for (ChildTable::Iterator iter(GetInstance(), Child::kInStateValidOrRestoring); !iter.IsDone(); iter++)
{
Child &child = *iter.GetChild();
@@ -4686,11 +4710,16 @@
}
#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
-void MleRouter::HandleTimeSync(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo)
+void MleRouter::HandleTimeSync(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo, const Neighbor *aNeighbor)
{
LogMleMessage("Receive Time Sync", aMessageInfo.GetPeerAddr());
+ VerifyOrExit(aNeighbor && aNeighbor->IsStateValid());
+
Get<TimeSync>().HandleTimeSyncMessage(aMessage);
+
+exit:
+ return;
}
otError MleRouter::SendTimeSync(void)
@@ -4704,7 +4733,7 @@
message->SetTimeSync(true);
- memset(&destination, 0, sizeof(destination));
+ destination.Clear();
destination.mFields.m16[0] = HostSwap16(0xff02);
destination.mFields.m16[7] = HostSwap16(0x0001);
SuccessOrExit(error = SendMessage(*message, destination));
diff --git a/src/core/thread/mle_router_ftd.hpp b/src/core/thread/mle_router_ftd.hpp
index 556e929..bc10717 100644
--- a/src/core/thread/mle_router_ftd.hpp
+++ b/src/core/thread/mle_router_ftd.hpp
@@ -36,15 +36,13 @@
#include "openthread-core-config.h"
-#include "utils/wrap_string.h"
-
#include <openthread/thread_ftd.h>
#include "coap/coap.hpp"
#include "coap/coap_message.hpp"
#include "common/timer.hpp"
#include "common/trickle_timer.hpp"
-#include "mac/mac_frame.hpp"
+#include "mac/mac_types.hpp"
#include "meshcop/meshcop_tlvs.hpp"
#include "net/icmp6.hpp"
#include "net/udp6.hpp"
@@ -86,24 +84,27 @@
explicit MleRouter(Instance &aInstance);
/**
- * This method indicates whether or not the Router Role is enabled.
+ * This method indicates whether or not the device is router-eligible.
*
- * @retval true If the Router Role is enabled.
- * @retval false If the Router Role is not enabled.
+ * @retval true If device is router-eligible.
+ * @retval false If device is not router-eligible.
*
*/
- bool IsRouterRoleEnabled(void) const;
+ bool IsRouterEligible(void) const;
/**
- * This method sets whether or not the Router Role is enabled.
+ * This method sets whether or not the device is router-eligible.
*
- * If @p aEnable is false and the device is currently operating as a router, this call will cause the device to
+ * If @p aEligible is false and the device is currently operating as a router, this call will cause the device to
* detach and attempt to reattach as a child.
*
- * @param[in] aEnabled TRUE to enable the Router Role, FALSE otherwise.
+ * @param[in] aEligible TRUE to configure device router-eligible, FALSE otherwise.
+ *
+ * @retval OT_ERROR_NONE Successfully set the router-eligible configuration.
+ * @retval OT_ERROR_NOT_CAPABLE The device is not capable of becoming a router.
*
*/
- void SetRouterRoleEnabled(bool aEnabled);
+ otError SetRouterEligible(bool aEligible);
/**
* This method indicates whether a node is the only router on the network.
@@ -548,10 +549,8 @@
* All 0xFFs sets steering data to 0xFF
* Anything else is used to compute the bloom filter
*
- * @retval OT_ERROR_NONE Steering data was set
- *
*/
- otError SetSteeringData(const Mac::ExtAddress *aExtAddress);
+ void SetSteeringData(const Mac::ExtAddress *aExtAddress);
#endif // OPENTHREAD_CONFIG_MLE_STEERING_DATA_SET_OOB_ENABLE
/**
@@ -676,16 +675,21 @@
otError RefreshStoredChildren(void);
void HandleDetachStart(void);
otError HandleChildStart(AttachMode aMode);
- otError HandleLinkRequest(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo);
- otError HandleLinkAccept(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo, uint32_t aKeySequence);
+ otError HandleLinkRequest(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo, Neighbor *aNeighbor);
otError HandleLinkAccept(const Message & aMessage,
const Ip6::MessageInfo &aMessageInfo,
uint32_t aKeySequence,
+ Neighbor * aNeighbor);
+ otError HandleLinkAccept(const Message & aMessage,
+ const Ip6::MessageInfo &aMessageInfo,
+ uint32_t aKeySequence,
+ Neighbor * aNeighbor,
bool aRequest);
otError HandleLinkAcceptAndRequest(const Message & aMessage,
const Ip6::MessageInfo &aMessageInfo,
- uint32_t aKeySequence);
- otError HandleAdvertisement(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo);
+ uint32_t aKeySequence,
+ Neighbor * aNeighbor);
+ otError HandleAdvertisement(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo, Neighbor *);
otError HandleParentRequest(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo);
otError HandleChildIdRequest(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo, uint32_t aKeySequence);
otError HandleChildUpdateRequest(const Message & aMessage,
@@ -693,12 +697,13 @@
uint32_t aKeySequence);
otError HandleChildUpdateResponse(const Message & aMessage,
const Ip6::MessageInfo &aMessageInfo,
- uint32_t aKeySequence);
- otError HandleDataRequest(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo);
+ uint32_t aKeySequence,
+ Neighbor * aNeighbor);
+ otError HandleDataRequest(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo, const Neighbor *aNeighbor);
void HandleNetworkDataUpdateRouter(void);
otError HandleDiscoveryRequest(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo);
#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
- void HandleTimeSync(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo);
+ void HandleTimeSync(const Message &aMessage, const Ip6::MessageInfo &aMessageInfo, const Neighbor *aNeighbor);
#endif
otError ProcessRouteTlv(const RouteTlv &aRoute);
@@ -720,7 +725,7 @@
const Ip6::MessageInfo &aMessageInfo,
const uint8_t * aTlvs,
uint8_t aTlvsLength,
- const ChallengeTlv * aChallenge);
+ const ChallengeTlv & aChallenge);
otError SendDataResponse(const Ip6::Address &aDestination,
const uint8_t * aTlvs,
uint8_t aTlvsLength,
@@ -733,6 +738,7 @@
void SynchronizeChildNetworkData(void);
otError UpdateChildAddresses(const Message &aMessage, uint16_t aOffset, Child &aChild);
void UpdateRoutes(const RouteTlv &aRoute, uint8_t aRouterId);
+ bool UpdateLinkQualityOut(const RouteTlv &aRoute, Router &aNeighbor, bool &aResetAdvInterval);
static void HandleAddressSolicitResponse(void * aContext,
otMessage * aMessage,
@@ -779,7 +785,7 @@
uint8_t mRouterDowngradeThreshold;
uint8_t mLeaderWeight;
uint32_t mFixedLeaderPartitionId; ///< only for certification testing
- bool mRouterRoleEnabled : 1;
+ bool mRouterEligible : 1;
bool mAddressSolicitPending : 1;
uint8_t mRouterId;
diff --git a/src/core/thread/mle_router_mtd.hpp b/src/core/thread/mle_router_mtd.hpp
index 7f98eed..d0df826 100644
--- a/src/core/thread/mle_router_mtd.hpp
+++ b/src/core/thread/mle_router_mtd.hpp
@@ -36,8 +36,6 @@
#include "openthread-core-config.h"
-#include "utils/wrap_string.h"
-
#include "thread/child_table.hpp"
#include "thread/mle.hpp"
#include "thread/mle_tlvs.hpp"
@@ -60,7 +58,7 @@
{
}
- bool IsRouterRoleEnabled(void) const { return false; }
+ bool IsRouterEligible(void) const { return false; }
bool IsSingleton(void) const { return false; }
@@ -129,23 +127,32 @@
private:
void HandleDetachStart(void) {}
otError HandleChildStart(AttachMode) { return OT_ERROR_NONE; }
- otError HandleLinkRequest(const Message &, const Ip6::MessageInfo &) { return OT_ERROR_DROP; }
- otError HandleLinkAccept(const Message &, const Ip6::MessageInfo &, uint32_t) { return OT_ERROR_DROP; }
- otError HandleLinkAccept(const Message &, const Ip6::MessageInfo &, uint32_t, bool) { return OT_ERROR_DROP; }
- otError HandleLinkAcceptAndRequest(const Message &, const Ip6::MessageInfo &, uint32_t) { return OT_ERROR_DROP; }
- otError HandleAdvertisement(const Message &, const Ip6::MessageInfo &) { return OT_ERROR_DROP; }
+ otError HandleLinkRequest(const Message &, const Ip6::MessageInfo &, Neighbor *) { return OT_ERROR_DROP; }
+ otError HandleLinkAccept(const Message &, const Ip6::MessageInfo &, uint32_t, Neighbor *) { return OT_ERROR_DROP; }
+ otError HandleLinkAccept(const Message &, const Ip6::MessageInfo &, uint32_t, Neighbor *, bool)
+ {
+ return OT_ERROR_DROP;
+ }
+ otError HandleLinkAcceptAndRequest(const Message &, const Ip6::MessageInfo &, uint32_t, Neighbor *)
+ {
+ return OT_ERROR_DROP;
+ }
+ otError HandleAdvertisement(const Message &, const Ip6::MessageInfo &, Neighbor *) { return OT_ERROR_DROP; }
otError HandleParentRequest(const Message &, const Ip6::MessageInfo &) { return OT_ERROR_DROP; }
otError HandleChildIdRequest(const Message &, const Ip6::MessageInfo &, uint32_t) { return OT_ERROR_DROP; }
otError HandleChildUpdateRequest(const Message &, const Ip6::MessageInfo &, uint32_t) { return OT_ERROR_DROP; }
- otError HandleChildUpdateResponse(const Message &, const Ip6::MessageInfo &, uint32_t) { return OT_ERROR_DROP; }
- otError HandleDataRequest(const Message &, const Ip6::MessageInfo &) { return OT_ERROR_DROP; }
+ otError HandleChildUpdateResponse(const Message &, const Ip6::MessageInfo &, uint32_t, Neighbor *)
+ {
+ return OT_ERROR_DROP;
+ }
+ otError HandleDataRequest(const Message &, const Ip6::MessageInfo &, const Neighbor *) { return OT_ERROR_DROP; }
void HandleNetworkDataUpdateRouter(void) {}
otError HandleDiscoveryRequest(const Message &, const Ip6::MessageInfo &) { return OT_ERROR_DROP; }
void HandlePartitionChange(void) {}
void StopAdvertiseTimer(void) {}
otError ProcessRouteTlv(const RouteTlv &) { return OT_ERROR_NONE; }
#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
- otError HandleTimeSync(const Message &, const Ip6::MessageInfo &) { return OT_ERROR_DROP; }
+ otError HandleTimeSync(const Message &, const Ip6::MessageInfo &, const Neighbor *) { return OT_ERROR_DROP; }
#endif
ChildTable mChildTable;
diff --git a/src/core/thread/mle_tlvs.hpp b/src/core/thread/mle_tlvs.hpp
index e545821..102657e 100644
--- a/src/core/thread/mle_tlvs.hpp
+++ b/src/core/thread/mle_tlvs.hpp
@@ -36,8 +36,6 @@
#include "openthread-core-config.h"
-#include "utils/wrap_string.h"
-
#include "common/encoding.hpp"
#include "common/message.hpp"
#include "common/tlvs.hpp"
@@ -977,6 +975,12 @@
{
public:
/**
+ * This method clears the object (setting all fields to zero).
+ *
+ */
+ void Clear(void) { memset(this, 0, sizeof(*this)); }
+
+ /**
* This method initializes the TLV.
*
*/
diff --git a/src/core/thread/network_data.cpp b/src/core/thread/network_data.cpp
index 6273ca2..851e84b 100644
--- a/src/core/thread/network_data.cpp
+++ b/src/core/thread/network_data.cpp
@@ -39,7 +39,7 @@
#include "common/instance.hpp"
#include "common/locator-getters.hpp"
#include "common/logging.hpp"
-#include "mac/mac_frame.hpp"
+#include "mac/mac_types.hpp"
#include "thread/thread_netif.hpp"
#include "thread/thread_tlvs.hpp"
#include "thread/thread_uri_paths.hpp"
@@ -80,14 +80,12 @@
return error;
}
-otError NetworkData::GetNextOnMeshPrefix(otNetworkDataIterator *aIterator, otBorderRouterConfig *aConfig)
+otError NetworkData::GetNextOnMeshPrefix(Iterator &aIterator, OnMeshPrefixConfig &aConfig)
{
return GetNextOnMeshPrefix(aIterator, Mac::kShortAddrBroadcast, aConfig);
}
-otError NetworkData::GetNextOnMeshPrefix(otNetworkDataIterator *aIterator,
- uint16_t aRloc16,
- otBorderRouterConfig * aConfig)
+otError NetworkData::GetNextOnMeshPrefix(Iterator &aIterator, uint16_t aRloc16, OnMeshPrefixConfig &aConfig)
{
otError error = OT_ERROR_NOT_FOUND;
NetworkDataIterator iterator(aIterator);
@@ -131,18 +129,18 @@
{
BorderRouterEntry *borderRouterEntry = borderRouter->GetEntry(index);
- memset(aConfig, 0, sizeof(*aConfig));
- memcpy(&aConfig->mPrefix.mPrefix, prefix->GetPrefix(), BitVectorBytes(prefix->GetPrefixLength()));
- aConfig->mPrefix.mLength = prefix->GetPrefixLength();
- aConfig->mPreference = borderRouterEntry->GetPreference();
- aConfig->mPreferred = borderRouterEntry->IsPreferred();
- aConfig->mSlaac = borderRouterEntry->IsSlaac();
- aConfig->mDhcp = borderRouterEntry->IsDhcp();
- aConfig->mConfigure = borderRouterEntry->IsConfigure();
- aConfig->mDefaultRoute = borderRouterEntry->IsDefaultRoute();
- aConfig->mOnMesh = borderRouterEntry->IsOnMesh();
- aConfig->mStable = borderRouter->IsStable();
- aConfig->mRloc16 = borderRouterEntry->GetRloc();
+ memset(&aConfig, 0, sizeof(aConfig));
+ memcpy(&aConfig.mPrefix.mPrefix, prefix->GetPrefix(), BitVectorBytes(prefix->GetPrefixLength()));
+ aConfig.mPrefix.mLength = prefix->GetPrefixLength();
+ aConfig.mPreference = borderRouterEntry->GetPreference();
+ aConfig.mPreferred = borderRouterEntry->IsPreferred();
+ aConfig.mSlaac = borderRouterEntry->IsSlaac();
+ aConfig.mDhcp = borderRouterEntry->IsDhcp();
+ aConfig.mConfigure = borderRouterEntry->IsConfigure();
+ aConfig.mDefaultRoute = borderRouterEntry->IsDefaultRoute();
+ aConfig.mOnMesh = borderRouterEntry->IsOnMesh();
+ aConfig.mStable = borderRouter->IsStable();
+ aConfig.mRloc16 = borderRouterEntry->GetRloc();
iterator.SaveTlvOffset(cur, mTlvs);
iterator.SaveSubTlvOffset(subCur, prefix->GetSubTlvs());
@@ -158,14 +156,12 @@
return error;
}
-otError NetworkData::GetNextExternalRoute(otNetworkDataIterator *aIterator, otExternalRouteConfig *aConfig)
+otError NetworkData::GetNextExternalRoute(Iterator &aIterator, ExternalRouteConfig &aConfig)
{
return GetNextExternalRoute(aIterator, Mac::kShortAddrBroadcast, aConfig);
}
-otError NetworkData::GetNextExternalRoute(otNetworkDataIterator *aIterator,
- uint16_t aRloc16,
- otExternalRouteConfig *aConfig)
+otError NetworkData::GetNextExternalRoute(Iterator &aIterator, uint16_t aRloc16, ExternalRouteConfig &aConfig)
{
otError error = OT_ERROR_NOT_FOUND;
NetworkDataIterator iterator(aIterator);
@@ -210,13 +206,13 @@
{
HasRouteEntry *hasRouteEntry = hasRoute->GetEntry(index);
- memset(aConfig, 0, sizeof(*aConfig));
- memcpy(&aConfig->mPrefix.mPrefix, prefix->GetPrefix(), BitVectorBytes(prefix->GetPrefixLength()));
- aConfig->mPrefix.mLength = prefix->GetPrefixLength();
- aConfig->mPreference = hasRouteEntry->GetPreference();
- aConfig->mStable = hasRoute->IsStable();
- aConfig->mRloc16 = hasRouteEntry->GetRloc();
- aConfig->mNextHopIsThisDevice = (hasRouteEntry->GetRloc() == Get<Mle::MleRouter>().GetRloc16());
+ memset(&aConfig, 0, sizeof(aConfig));
+ memcpy(&aConfig.mPrefix.mPrefix, prefix->GetPrefix(), BitVectorBytes(prefix->GetPrefixLength()));
+ aConfig.mPrefix.mLength = prefix->GetPrefixLength();
+ aConfig.mPreference = hasRouteEntry->GetPreference();
+ aConfig.mStable = hasRoute->IsStable();
+ aConfig.mRloc16 = hasRouteEntry->GetRloc();
+ aConfig.mNextHopIsThisDevice = (hasRouteEntry->GetRloc() == Get<Mle::MleRouter>().GetRloc16());
iterator.SaveTlvOffset(cur, mTlvs);
iterator.SaveSubTlvOffset(subCur, prefix->GetSubTlvs());
@@ -232,13 +228,12 @@
return error;
}
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
-otError NetworkData::GetNextService(otNetworkDataIterator *aIterator, otServiceConfig *aConfig)
+otError NetworkData::GetNextService(Iterator &aIterator, ServiceConfig &aConfig)
{
return GetNextService(aIterator, Mac::kShortAddrBroadcast, aConfig);
}
-otError NetworkData::GetNextService(otNetworkDataIterator *aIterator, uint16_t aRloc16, otServiceConfig *aConfig)
+otError NetworkData::GetNextService(Iterator &aIterator, uint16_t aRloc16, ServiceConfig &aConfig)
{
otError error = OT_ERROR_NOT_FOUND;
NetworkDataIterator iterator(aIterator);
@@ -279,18 +274,18 @@
if ((aRloc16 == Mac::kShortAddrBroadcast) || (server->GetServer16() == aRloc16))
{
- memset(aConfig, 0, sizeof(*aConfig));
+ memset(&aConfig, 0, sizeof(aConfig));
- aConfig->mServiceID = service->GetServiceID();
- aConfig->mEnterpriseNumber = service->GetEnterpriseNumber();
- aConfig->mServiceDataLength = service->GetServiceDataLength();
+ aConfig.mServiceID = service->GetServiceID();
+ aConfig.mEnterpriseNumber = service->GetEnterpriseNumber();
+ aConfig.mServiceDataLength = service->GetServiceDataLength();
- memcpy(&aConfig->mServiceData, service->GetServiceData(), service->GetServiceDataLength());
+ memcpy(&aConfig.mServiceData, service->GetServiceData(), service->GetServiceDataLength());
- aConfig->mServerConfig.mStable = server->IsStable();
- aConfig->mServerConfig.mServerDataLength = server->GetServerDataLength();
- memcpy(&aConfig->mServerConfig.mServerData, server->GetServerData(), server->GetServerDataLength());
- aConfig->mServerConfig.mRloc16 = server->GetServer16();
+ aConfig.mServerConfig.mStable = server->IsStable();
+ aConfig.mServerConfig.mServerDataLength = server->GetServerDataLength();
+ memcpy(&aConfig.mServerConfig.mServerData, server->GetServerData(), server->GetServerDataLength());
+ aConfig.mServerConfig.mRloc16 = server->GetServer16();
if (subCur->GetNext() >= cur->GetNext())
{
@@ -312,7 +307,7 @@
return error;
}
-otError NetworkData::GetNextServiceId(otNetworkDataIterator *aIterator, uint16_t aRloc16, uint8_t *aServiceId)
+otError NetworkData::GetNextServiceId(Iterator &aIterator, uint16_t aRloc16, uint8_t &aServiceId)
{
otError error = OT_ERROR_NOT_FOUND;
NetworkDataIterator iterator(aIterator);
@@ -353,7 +348,7 @@
if ((aRloc16 == Mac::kShortAddrBroadcast) || (server->GetServer16() == aRloc16))
{
- *aServiceId = service->GetServiceID();
+ aServiceId = service->GetServiceID();
if (subCur->GetNext() >= cur->GetNext())
{
@@ -374,51 +369,20 @@
exit:
return error;
}
-#endif
bool NetworkData::ContainsOnMeshPrefixes(NetworkData &aCompare, uint16_t aRloc16)
{
- otNetworkDataIterator outerIterator = OT_NETWORK_DATA_ITERATOR_INIT;
- otBorderRouterConfig outerConfig;
- bool rval = true;
+ Iterator outerIterator = kIteratorInit;
+ OnMeshPrefixConfig outerConfig;
+ bool rval = true;
- while (aCompare.GetNextOnMeshPrefix(&outerIterator, aRloc16, &outerConfig) == OT_ERROR_NONE)
+ while (aCompare.GetNextOnMeshPrefix(outerIterator, aRloc16, outerConfig) == OT_ERROR_NONE)
{
- otNetworkDataIterator innerIterator = OT_NETWORK_DATA_ITERATOR_INIT;
- otBorderRouterConfig innerConfig;
- otError error;
+ Iterator innerIterator = kIteratorInit;
+ OnMeshPrefixConfig innerConfig;
+ otError error;
- while ((error = GetNextOnMeshPrefix(&innerIterator, aRloc16, &innerConfig)) == OT_ERROR_NONE)
- {
- if (memcmp(&outerConfig, &innerConfig, (sizeof(outerConfig) - sizeof(outerConfig.mRloc16))) == 0)
- {
- break;
- }
- }
-
- if (error != OT_ERROR_NONE)
- {
- ExitNow(rval = false);
- }
- }
-
-exit:
- return rval;
-}
-
-bool NetworkData::ContainsExternalRoutes(NetworkData &aCompare, uint16_t aRloc16)
-{
- otNetworkDataIterator outerIterator = OT_NETWORK_DATA_ITERATOR_INIT;
- otExternalRouteConfig outerConfig;
- bool rval = true;
-
- while (aCompare.GetNextExternalRoute(&outerIterator, aRloc16, &outerConfig) == OT_ERROR_NONE)
- {
- otNetworkDataIterator innerIterator = OT_NETWORK_DATA_ITERATOR_INIT;
- otExternalRouteConfig innerConfig;
- otError error;
-
- while ((error = GetNextExternalRoute(&innerIterator, aRloc16, &innerConfig)) == OT_ERROR_NONE)
+ while ((error = GetNextOnMeshPrefix(innerIterator, aRloc16, innerConfig)) == OT_ERROR_NONE)
{
if (memcmp(&outerConfig, &innerConfig, sizeof(outerConfig)) == 0)
{
@@ -436,20 +400,49 @@
return rval;
}
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
+bool NetworkData::ContainsExternalRoutes(NetworkData &aCompare, uint16_t aRloc16)
+{
+ Iterator outerIterator = kIteratorInit;
+ ExternalRouteConfig outerConfig;
+ bool rval = true;
+
+ while (aCompare.GetNextExternalRoute(outerIterator, aRloc16, outerConfig) == OT_ERROR_NONE)
+ {
+ Iterator innerIterator = kIteratorInit;
+ ExternalRouteConfig innerConfig;
+ otError error;
+
+ while ((error = GetNextExternalRoute(innerIterator, aRloc16, innerConfig)) == OT_ERROR_NONE)
+ {
+ if (memcmp(&outerConfig, &innerConfig, sizeof(outerConfig)) == 0)
+ {
+ break;
+ }
+ }
+
+ if (error != OT_ERROR_NONE)
+ {
+ ExitNow(rval = false);
+ }
+ }
+
+exit:
+ return rval;
+}
+
bool NetworkData::ContainsServices(NetworkData &aCompare, uint16_t aRloc16)
{
- otNetworkDataIterator outerIterator = OT_NETWORK_DATA_ITERATOR_INIT;
- otServiceConfig outerConfig;
- bool rval = true;
+ Iterator outerIterator = kIteratorInit;
+ ServiceConfig outerConfig;
+ bool rval = true;
- while (aCompare.GetNextService(&outerIterator, aRloc16, &outerConfig) == OT_ERROR_NONE)
+ while (aCompare.GetNextService(outerIterator, aRloc16, outerConfig) == OT_ERROR_NONE)
{
- otNetworkDataIterator innerIterator = OT_NETWORK_DATA_ITERATOR_INIT;
- otServiceConfig innerConfig;
- otError error;
+ Iterator innerIterator = kIteratorInit;
+ ServiceConfig innerConfig;
+ otError error;
- while ((error = GetNextService(&innerIterator, aRloc16, &innerConfig)) == OT_ERROR_NONE)
+ while ((error = GetNextService(innerIterator, aRloc16, innerConfig)) == OT_ERROR_NONE)
{
if ((outerConfig.mEnterpriseNumber == innerConfig.mEnterpriseNumber) &&
(outerConfig.mServiceDataLength == innerConfig.mServiceDataLength) &&
@@ -523,19 +516,16 @@
exit:
return rval;
}
-#endif
void NetworkData::RemoveTemporaryData(uint8_t *aData, uint8_t &aDataLength)
{
NetworkDataTlv *cur = reinterpret_cast<NetworkDataTlv *>(aData);
NetworkDataTlv *end;
PrefixTlv * prefix;
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
- ServiceTlv *service;
-#endif
- uint8_t length;
- uint8_t *dst;
- uint8_t *src;
+ ServiceTlv * service;
+ uint8_t length;
+ uint8_t * dst;
+ uint8_t * src;
while (1)
{
@@ -567,8 +557,6 @@
break;
}
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
-
case NetworkDataTlv::kTypeService:
{
service = static_cast<ServiceTlv *>(cur);
@@ -588,8 +576,6 @@
break;
}
-#endif
-
default:
{
// remove temporary tlv
@@ -705,7 +691,6 @@
}
}
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
void NetworkData::RemoveTemporaryData(uint8_t *aData, uint8_t &aDataLength, ServiceTlv &aService)
{
NetworkDataTlv *cur = aService.GetSubTlvs();
@@ -731,7 +716,7 @@
case NetworkDataTlv::kTypeServer:
{
server = static_cast<ServerTlv *>(cur);
- server->SetServer16(Mle::Mle::GetServiceAlocFromId(aService.GetServiceID()));
+ server->SetServer16(Mle::Mle::ServiceAlocFromId(aService.GetServiceID()));
break;
}
@@ -756,7 +741,6 @@
}
}
}
-#endif
BorderRouterTlv *NetworkData::FindBorderRouter(PrefixTlv &aPrefix)
{
@@ -932,7 +916,6 @@
return (rval >= aLength) ? rval : -1;
}
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
ServiceTlv *NetworkData::FindService(uint32_t aEnterpriseNumber,
const uint8_t *aServiceData,
uint8_t aServiceDataLength)
@@ -974,7 +957,6 @@
exit:
return compare;
}
-#endif
void NetworkData::Insert(uint8_t *aStart, uint8_t aLength)
{
@@ -996,7 +978,8 @@
Coap::Message * message = NULL;
Ip6::MessageInfo messageInfo;
- VerifyOrExit(!mLastAttemptWait || TimerMilli::Elapsed(mLastAttempt) < kDataResubmitDelay, error = OT_ERROR_ALREADY);
+ VerifyOrExit(!mLastAttemptWait || (TimerMilli::GetNow() - mLastAttempt < kDataResubmitDelay),
+ error = OT_ERROR_ALREADY);
VerifyOrExit((message = Get<Coap::Coap>().NewMessage()) != NULL, error = OT_ERROR_NO_BUFS);
@@ -1017,7 +1000,7 @@
ThreadRloc16Tlv rloc16Tlv;
rloc16Tlv.Init();
rloc16Tlv.SetRloc16(aRloc16);
- SuccessOrExit(error = message->AppendTlv(rloc16Tlv));
+ SuccessOrExit(error = rloc16Tlv.AppendTo(*message));
}
Get<Mle::MleRouter>().GetLeaderAloc(messageInfo.GetPeerAddr());
diff --git a/src/core/thread/network_data.hpp b/src/core/thread/network_data.hpp
index b5d2d36..f49fe5d 100644
--- a/src/core/thread/network_data.hpp
+++ b/src/core/thread/network_data.hpp
@@ -41,6 +41,7 @@
#include "coap/coap.hpp"
#include "common/locator.hpp"
+#include "common/timer.hpp"
#include "net/udp6.hpp"
#include "thread/lowpan.hpp"
#include "thread/mle_router.hpp"
@@ -83,6 +84,35 @@
*
*/
+enum
+{
+ kIteratorInit = OT_NETWORK_DATA_ITERATOR_INIT, ///< Initializer for `Iterator` type.
+};
+
+/**
+ * This type represents a Iterator used to iterate through Network Data info (e.g., see `GetNextOnMeshPrefix()`)
+ *
+ */
+typedef otNetworkDataIterator Iterator;
+
+/**
+ * This type represents an On Mesh Prefix (Border Router) configuration.
+ *
+ */
+typedef otBorderRouterConfig OnMeshPrefixConfig;
+
+/**
+ * This type represents an External Route configuration.
+ *
+ */
+typedef otExternalRouteConfig ExternalRouteConfig;
+
+/**
+ * This type represents a Service configuration.
+ *
+ */
+typedef otServiceConfig ServiceConfig;
+
/**
* This class implements Network Data processing.
*
@@ -92,7 +122,7 @@
public:
enum
{
- kMaxSize = 255, ///< Maximum size of Thread Network Data in bytes.
+ kMaxSize = 254, ///< Maximum size of Thread Network Data in bytes.
};
/**
@@ -137,92 +167,90 @@
/**
* This method provides the next On Mesh prefix in the Thread Network Data.
*
- * @param[inout] aIterator A pointer to the Network Data iterator context.
- * @param[out] aConfig A pointer to where the On Mesh Prefix information will be placed.
+ * @param[inout] aIterator A reference to the Network Data iterator.
+ * @param[out] aConfig A reference to a config variable where the On Mesh Prefix information will be placed.
*
* @retval OT_ERROR_NONE Successfully found the next On Mesh prefix.
* @retval OT_ERROR_NOT_FOUND No subsequent On Mesh prefix exists in the Thread Network Data.
*
*/
- otError GetNextOnMeshPrefix(otNetworkDataIterator *aIterator, otBorderRouterConfig *aConfig);
+ otError GetNextOnMeshPrefix(Iterator &aIterator, OnMeshPrefixConfig &aConfig);
/**
* This method provides the next On Mesh prefix in the Thread Network Data for a given RLOC16.
*
- * @param[inout] aIterator A pointer to the Network Data iterator context.
+ * @param[inout] aIterator A reference to the Network Data iterator.
* @param[in] aRloc16 The RLOC16 value.
- * @param[out] aConfig A pointer to where the On Mesh Prefix information will be placed.
+ * @param[out] aConfig A reference to a config variable where the On Mesh Prefix information will be placed.
*
* @retval OT_ERROR_NONE Successfully found the next On Mesh prefix.
* @retval OT_ERROR_NOT_FOUND No subsequent On Mesh prefix exists in the Thread Network Data.
*
*/
- otError GetNextOnMeshPrefix(otNetworkDataIterator *aIterator, uint16_t aRloc16, otBorderRouterConfig *aConfig);
+ otError GetNextOnMeshPrefix(Iterator &aIterator, uint16_t aRloc16, OnMeshPrefixConfig &aConfig);
/**
* This method provides the next external route in the Thread Network Data.
*
- * @param[inout] aIterator A pointer to the Network Data iterator context.
- * @param[out] aConfig A pointer to where the external route information will be placed.
+ * @param[inout] aIterator A reference to the Network Data iterator.
+ * @param[out] aConfig A reference to a config variable where the external route information will be placed.
*
* @retval OT_ERROR_NONE Successfully found the next external route.
* @retval OT_ERROR_NOT_FOUND No subsequent external route exists in the Thread Network Data.
*
*/
- otError GetNextExternalRoute(otNetworkDataIterator *aIterator, otExternalRouteConfig *aConfig);
+ otError GetNextExternalRoute(Iterator &aIterator, ExternalRouteConfig &aConfig);
/**
* This method provides the next external route in the Thread Network Data for a given RLOC16.
*
- * @param[inout] aIterator A pointer to the Network Data iterator context.
+ * @param[inout] aIterator A reference to the Network Data iterator.
* @param[in] aRloc16 The RLOC16 value.
- * @param[out] aConfig A pointer to where the external route information will be placed.
+ * @param[out] aConfig A reference to a config variable where the external route information will be placed.
*
* @retval OT_ERROR_NONE Successfully found the next external route.
* @retval OT_ERROR_NOT_FOUND No subsequent external route exists in the Thread Network Data.
*
*/
- otError GetNextExternalRoute(otNetworkDataIterator *aIterator, uint16_t aRloc16, otExternalRouteConfig *aConfig);
+ otError GetNextExternalRoute(Iterator &aIterator, uint16_t aRloc16, ExternalRouteConfig &aConfig);
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
/**
* This method provides the next service in the Thread Network Data.
*
- * @param[inout] aIterator A pointer to the Network Data iterator context.
- * @param[out] aConfig A pointer to where the service information will be placed.
+ * @param[inout] aIterator A reference to the Network Data iterator.
+ * @param[out] aConfig A reference to a config variable where the service information will be placed.
*
* @retval OT_ERROR_NONE Successfully found the next service.
* @retval OT_ERROR_NOT_FOUND No subsequent service exists in the Thread Network Data.
*
*/
- otError GetNextService(otNetworkDataIterator *aIterator, otServiceConfig *aConfig);
+ otError GetNextService(Iterator &aIterator, ServiceConfig &aConfig);
/**
* This method provides the next service in the Thread Network Data for a given RLOC16.
*
- * @param[inout] aIterator A pointer to the Network Data iterator context.
+ * @param[inout] aIterator A reference to the Network Data iterator.
* @param[in] aRloc16 The RLOC16 value.
- * @param[out] aConfig A pointer to where the service information will be placed.
+ * @param[out] aConfig A reference to a config variable where the service information will be placed.
*
* @retval OT_ERROR_NONE Successfully found the next service.
* @retval OT_ERROR_NOT_FOUND No subsequent service exists in the Thread Network Data.
*
*/
- otError GetNextService(otNetworkDataIterator *aIterator, uint16_t aRloc16, otServiceConfig *aConfig);
+ otError GetNextService(Iterator &aIterator, uint16_t aRloc16, ServiceConfig &aConfig);
/**
* This method provides the next service ID in the Thread Network Data for a given RLOC16.
*
- * @param[inout] aIterator A pointer to the Network Data iterator context.
+ * @param[inout] aIterator A reference to the Network Data iterator.
* @param[in] aRloc16 The RLOC16 value.
- * @param[out] aServiceID A pointer to where the service ID will be placed.
+ * @param[out] aServiceID A reference to variable where the service ID will be placed.
*
* @retval OT_ERROR_NONE Successfully found the next service.
* @retval OT_ERROR_NOT_FOUND No subsequent service exists in the Thread Network Data.
*
*/
- otError GetNextServiceId(otNetworkDataIterator *aIterator, uint16_t aRloc16, uint8_t *aServiceId);
-#endif
+ otError GetNextServiceId(Iterator &aIterator, uint16_t aRloc16, uint8_t &aServiceId);
/**
* This method indicates whether or not the Thread Network Data contains all of the on mesh prefix information
@@ -250,7 +278,6 @@
*/
bool ContainsExternalRoutes(NetworkData &aCompare, uint16_t aRloc16);
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
/**
* This method indicates whether or not the Thread Network Data contains all of the service information
* in @p aCompare associated with @p aRloc16.
@@ -276,7 +303,6 @@
*
*/
bool ContainsService(uint8_t aServiceId, uint16_t aRloc16);
-#endif
/**
* This method cancels the data resubmit delay timer.
@@ -361,7 +387,6 @@
*/
PrefixTlv *FindPrefix(const uint8_t *aPrefix, uint8_t aPrefixLength, uint8_t *aTlvs, uint8_t aTlvsLength);
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
/**
* This method returns a pointer to a matching Service TLV.
*
@@ -391,7 +416,6 @@
uint8_t aServiceDataLength,
uint8_t * aTlvs,
uint8_t aTlvsLength);
-#endif
/**
* This method inserts bytes into the Network Data.
@@ -432,7 +456,6 @@
*/
void RemoveTemporaryData(uint8_t *aData, uint8_t &aDataLength, PrefixTlv &aPrefix);
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
/**
* This method strips non-stable Sub-TLVs from a Service TLV.
*
@@ -443,7 +466,6 @@
*
*/
void RemoveTemporaryData(uint8_t *aData, uint8_t &aDataLength, ServiceTlv &aService);
-#endif
/**
* This method computes the number of IPv6 Prefix bits that match.
@@ -479,17 +501,9 @@
class NetworkDataIterator
{
- private:
- enum
- {
- kTlvPosition = 0,
- kSubTlvPosition = 1,
- kEntryPosition = 2,
- };
-
public:
- explicit NetworkDataIterator(otNetworkDataIterator *aIterator)
- : mIteratorBuffer(reinterpret_cast<uint8_t *>(aIterator))
+ explicit NetworkDataIterator(Iterator &aIterator)
+ : mIteratorBuffer(reinterpret_cast<uint8_t *>(&aIterator))
{
}
@@ -512,12 +526,19 @@
}
private:
+ enum
+ {
+ kTlvPosition = 0,
+ kSubTlvPosition = 1,
+ kEntryPosition = 2,
+ };
+
uint8_t *mIteratorBuffer;
};
const Type mType;
bool mLastAttemptWait;
- uint32_t mLastAttempt;
+ TimeMilli mLastAttempt;
};
} // namespace NetworkData
diff --git a/src/core/thread/network_data_leader.cpp b/src/core/thread/network_data_leader.cpp
index 2514752..f3c5fde 100644
--- a/src/core/thread/network_data_leader.cpp
+++ b/src/core/thread/network_data_leader.cpp
@@ -43,7 +43,7 @@
#include "common/message.hpp"
#include "common/random.hpp"
#include "common/timer.hpp"
-#include "mac/mac_frame.hpp"
+#include "mac/mac_types.hpp"
#include "thread/lowpan.hpp"
#include "thread/mle_router.hpp"
#include "thread/thread_netif.hpp"
@@ -163,7 +163,6 @@
return error;
}
-#if OPENTHREAD_CONFIG_DHCP6_SERVER_ENABLE || OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE
otError LeaderBase::GetRlocByContextId(uint8_t aContextId, uint16_t &aRloc16)
{
otError error = OT_ERROR_NOT_FOUND;
@@ -171,10 +170,10 @@
if ((GetContext(aContextId, lowpanContext)) == OT_ERROR_NONE)
{
- otNetworkDataIterator iterator = OT_NETWORK_DATA_ITERATOR_INIT;
- otBorderRouterConfig config;
+ Iterator iterator = kIteratorInit;
+ OnMeshPrefixConfig config;
- while (GetNextOnMeshPrefix(&iterator, &config) == OT_ERROR_NONE)
+ while (GetNextOnMeshPrefix(iterator, config) == OT_ERROR_NONE)
{
if (otIp6PrefixMatch(&(config.mPrefix.mPrefix), reinterpret_cast<const otIp6Address *>(
lowpanContext.mPrefix)) >= config.mPrefix.mLength)
@@ -188,7 +187,6 @@
exit:
return error;
}
-#endif // OPENTHREAD_CONFIG_DHCP6_SERVER_ENABLE || OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE
bool LeaderBase::IsOnMesh(const Ip6::Address &aAddress)
{
diff --git a/src/core/thread/network_data_leader.hpp b/src/core/thread/network_data_leader.hpp
index 61399f3..2d0b99a 100644
--- a/src/core/thread/network_data_leader.hpp
+++ b/src/core/thread/network_data_leader.hpp
@@ -217,7 +217,6 @@
*/
otError SetCommissioningData(const uint8_t *aValue, uint8_t aValueLength);
-#if OPENTHREAD_CONFIG_DHCP6_SERVER_ENABLE || OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE
/**
* This method gets the Rloc of Dhcp Agent of specified contextId.
*
@@ -229,7 +228,6 @@
*
*/
otError GetRlocByContextId(uint8_t aContextId, uint16_t &aRloc16);
-#endif // OPENTHREAD_CONFIG_DHCP6_SERVER_ENABLE || OPENTHREAD_CONFIG_DHCP6_CLIENT_ENABLE
protected:
uint8_t mStableVersion;
diff --git a/src/core/thread/network_data_leader_ftd.cpp b/src/core/thread/network_data_leader_ftd.cpp
index 7a862d5..77dc727 100644
--- a/src/core/thread/network_data_leader_ftd.cpp
+++ b/src/core/thread/network_data_leader_ftd.cpp
@@ -44,7 +44,7 @@
#include "common/logging.hpp"
#include "common/message.hpp"
#include "common/timer.hpp"
-#include "mac/mac_frame.hpp"
+#include "mac/mac_types.hpp"
#include "meshcop/meshcop.hpp"
#include "thread/lowpan.hpp"
#include "thread/mle_router.hpp"
@@ -286,32 +286,19 @@
void Leader::HandleCommissioningGet(Coap::Message &aMessage, const Ip6::MessageInfo &aMessageInfo)
{
- MeshCoP::Tlv tlv;
- uint16_t offset = aMessage.GetOffset();
- uint8_t tlvs[NetworkData::kMaxSize];
- uint8_t length = 0;
+ uint16_t length = 0;
+ uint16_t offset;
- while (offset < aMessage.GetLength())
- {
- aMessage.Read(offset, sizeof(tlv), &tlv);
+ SuccessOrExit(Tlv::GetValueOffset(aMessage, MeshCoP::Tlv::kGet, offset, length));
+ aMessage.SetOffset(offset);
- if (tlv.GetType() == MeshCoP::Tlv::kGet)
- {
- length = tlv.GetLength();
- aMessage.Read(offset + sizeof(MeshCoP::Tlv), length, tlvs);
- break;
- }
-
- offset += sizeof(tlv) + tlv.GetLength();
- }
-
- SendCommissioningGetResponse(aMessage, aMessageInfo, tlvs, length);
+exit:
+ SendCommissioningGetResponse(aMessage, length, aMessageInfo);
}
void Leader::SendCommissioningGetResponse(const Coap::Message & aRequest,
- const Ip6::MessageInfo &aMessageInfo,
- const uint8_t * aTlvs,
- uint8_t aLength)
+ uint16_t aLength,
+ const Ip6::MessageInfo &aMessageInfo)
{
otError error = OT_ERROR_NONE;
Coap::Message *message;
@@ -345,12 +332,16 @@
{
for (index = 0; index < aLength; index++)
{
+ uint8_t type;
+
+ aRequest.Read(aRequest.GetOffset() + index, sizeof(type), &type);
+
for (MeshCoP::Tlv *cur = reinterpret_cast<MeshCoP::Tlv *>(data);
cur < reinterpret_cast<MeshCoP::Tlv *>(data + length); cur = cur->GetNext())
{
- if (cur->GetType() == aTlvs[index])
+ if (cur->GetType() == type)
{
- SuccessOrExit(error = message->AppendTlv(*cur));
+ SuccessOrExit(error = cur->AppendTo(*message));
break;
}
}
@@ -390,7 +381,7 @@
state.Init();
state.SetState(aState);
- SuccessOrExit(error = message->AppendTlv(state));
+ SuccessOrExit(error = state.AppendTo(*message));
SuccessOrExit(error = Get<Coap::Coap>().SendMessage(*message, aMessageInfo));
@@ -440,10 +431,8 @@
HasRouteTlv * hasRoute;
BorderRouterEntry *borderRouterEntry;
HasRouteEntry * hasRouteEntry;
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
- ServiceTlv *service;
- ServerTlv * server;
-#endif
+ ServiceTlv * service;
+ ServerTlv * server;
while (cur < end)
{
@@ -529,8 +518,6 @@
}
break;
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
-
case NetworkDataTlv::kTypeService:
{
service = static_cast<ServiceTlv *>(cur);
@@ -582,8 +569,6 @@
break;
}
-#endif
-
default:
break;
}
@@ -600,9 +585,7 @@
bool rval = false;
NetworkDataTlv *cur = reinterpret_cast<NetworkDataTlv *>(aTlvs);
NetworkDataTlv *end = reinterpret_cast<NetworkDataTlv *>(aTlvs + aTlvsLength);
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
- ServiceTlv *service;
-#endif
+ ServiceTlv * service;
while (cur < end)
{
@@ -653,8 +636,6 @@
break;
}
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
-
case NetworkDataTlv::kTypeService:
service = static_cast<ServiceTlv *>(cur);
@@ -724,7 +705,6 @@
}
break;
-#endif
default:
break;
@@ -794,11 +774,6 @@
otError Leader::AddNetworkData(uint8_t *aTlvs, uint8_t aTlvsLength, uint8_t *aOldTlvs, uint8_t aOldTlvsLength)
{
-#if !OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
- OT_UNUSED_VARIABLE(aOldTlvs);
- OT_UNUSED_VARIABLE(aOldTlvsLength);
-#endif
-
otError error = OT_ERROR_NONE;
NetworkDataTlv *cur = reinterpret_cast<NetworkDataTlv *>(aTlvs);
NetworkDataTlv *end = reinterpret_cast<NetworkDataTlv *>(aTlvs + aTlvsLength);
@@ -814,13 +789,10 @@
otDumpDebgNetData("add prefix done", mTlvs, mLength);
break;
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
-
case NetworkDataTlv::kTypeService:
SuccessOrExit(error = AddService(*static_cast<ServiceTlv *>(cur), aOldTlvs, aOldTlvsLength));
otDumpDebgNetData("add service done", mTlvs, mLength);
break;
-#endif
default:
break;
@@ -870,7 +842,6 @@
return error;
}
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
otError Leader::AddService(ServiceTlv &aService, uint8_t *aOldTlvs, uint8_t aOldTlvsLength)
{
otError error = OT_ERROR_NONE;
@@ -901,7 +872,6 @@
exit:
return error;
}
-#endif
otError Leader::AddHasRoute(PrefixTlv &aPrefix, HasRouteTlv &aHasRoute)
{
@@ -965,7 +935,6 @@
return error;
}
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
otError Leader::AddServer(ServiceTlv &aService, ServerTlv &aServer, uint8_t *aOldTlvs, uint8_t aOldTlvsLength)
{
otError error = OT_ERROR_NONE;
@@ -1079,7 +1048,6 @@
exit:
return compare;
}
-#endif
otError Leader::AddBorderRouter(PrefixTlv &aPrefix, BorderRouterTlv &aBorderRouter)
{
@@ -1202,9 +1170,9 @@
{
mContextLastUsed[aContextId - kMinContextId] = TimerMilli::GetNow();
- if (mContextLastUsed[aContextId - kMinContextId] == 0)
+ if (mContextLastUsed[aContextId - kMinContextId].GetValue() == 0)
{
- mContextLastUsed[aContextId - kMinContextId] = 1;
+ mContextLastUsed[aContextId - kMinContextId].SetValue(1);
}
mTimer.Start(kStateUpdatePeriod);
@@ -1212,7 +1180,7 @@
void Leader::StopContextReuseTimer(uint8_t aContextId)
{
- mContextLastUsed[aContextId - kMinContextId] = 0;
+ mContextLastUsed[aContextId - kMinContextId].SetValue(0);
}
otError Leader::SendServerDataNotification(uint16_t aRloc16)
@@ -1236,9 +1204,7 @@
NetworkDataTlv *cur = reinterpret_cast<NetworkDataTlv *>(mTlvs);
NetworkDataTlv *end;
PrefixTlv * prefix;
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
- ServiceTlv *service;
-#endif
+ ServiceTlv * service;
while (1)
{
@@ -1266,8 +1232,6 @@
break;
}
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
-
case NetworkDataTlv::kTypeService:
{
service = static_cast<ServiceTlv *>(cur);
@@ -1284,8 +1248,6 @@
break;
}
-#endif
-
default:
break;
}
@@ -1361,7 +1323,6 @@
}
}
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
void Leader::RemoveRloc(ServiceTlv &aService, uint16_t aRloc16, MatchMode aMatchMode)
{
NetworkDataTlv *cur = aService.GetSubTlvs();
@@ -1400,7 +1361,6 @@
cur = cur->GetNext();
}
}
-#endif
void Leader::RemoveRloc(PrefixTlv &aPrefix, HasRouteTlv &aHasRoute, uint16_t aRloc16, MatchMode aMatchMode)
{
@@ -1568,12 +1528,12 @@
for (uint8_t i = 0; i < kNumContextIds; i++)
{
- if (mContextLastUsed[i] == 0)
+ if (mContextLastUsed[i].GetValue() == 0)
{
continue;
}
- if (TimerMilli::Elapsed(mContextLastUsed[i]) >= TimerMilli::SecToMsec(mContextIdReuseDelay))
+ if (TimerMilli::GetNow() - mContextLastUsed[i] >= Time::SecToMsec(mContextIdReuseDelay))
{
FreeContext(kMinContextId + i);
}
diff --git a/src/core/thread/network_data_leader_ftd.hpp b/src/core/thread/network_data_leader_ftd.hpp
index 72998b0..e86b46c 100644
--- a/src/core/thread/network_data_leader_ftd.hpp
+++ b/src/core/thread/network_data_leader_ftd.hpp
@@ -159,7 +159,6 @@
*/
void UpdateContextsAfterReset(void);
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
/**
* This method scans network data for given service ID and returns pointer to the respective TLV, if present.
*
@@ -168,7 +167,6 @@
*
*/
ServiceTlv *FindServiceById(uint8_t aServiceId);
-#endif
private:
static void HandleServerData(void *aContext, otMessage *aMessage, const otMessageInfo *aMessageInfo);
@@ -183,10 +181,8 @@
otError AddBorderRouter(PrefixTlv &aPrefix, BorderRouterTlv &aBorderRouter);
otError AddNetworkData(uint8_t *aTlvs, uint8_t aTlvsLength, uint8_t *aOldTlvs, uint8_t aOldTlvsLength);
otError AddPrefix(PrefixTlv &aPrefix);
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
otError AddServer(ServiceTlv &aService, ServerTlv &aServer, uint8_t *aOldTlvs, uint8_t aOldTlvsLength);
otError AddService(ServiceTlv &aService, uint8_t *aOldTlvs, uint8_t aOldTlvsLength);
-#endif
int AllocateContext(void);
void FreeContext(uint8_t aContextId);
@@ -200,9 +196,7 @@
void RemoveRloc(uint16_t aRloc16, MatchMode aMatchMode);
void RemoveRloc(PrefixTlv &aPrefix, uint16_t aRloc16, MatchMode aMatchMode);
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
void RemoveRloc(ServiceTlv &aService, uint16_t aRloc16, MatchMode aMatchMode);
-#endif
void RemoveRloc(PrefixTlv &aPrefix, HasRouteTlv &aHasRoute, uint16_t aRloc16, MatchMode aMatchMode);
void RemoveRloc(PrefixTlv &aPrefix, BorderRouterTlv &aBorderRouter, uint16_t aRloc16, MatchMode aMatchMode);
@@ -225,9 +219,8 @@
void HandleCommissioningGet(Coap::Message &aMessage, const Ip6::MessageInfo &aMessageInfo);
void SendCommissioningGetResponse(const Coap::Message & aRequest,
- const Ip6::MessageInfo &aMessageInfo,
- const uint8_t * aTlvs,
- uint8_t aLength);
+ uint16_t aLength,
+ const Ip6::MessageInfo &aMessageInfo);
void SendCommissioningSetResponse(const Coap::Message & aRequest,
const Ip6::MessageInfo & aMessageInfo,
MeshCoP::StateTlv::State aState);
@@ -245,7 +238,7 @@
};
uint16_t mContextUsed;
- uint32_t mContextLastUsed[kNumContextIds];
+ TimeMilli mContextLastUsed[kNumContextIds];
uint32_t mContextIdReuseDelay;
TimerMilli mTimer;
diff --git a/src/core/thread/network_data_local.cpp b/src/core/thread/network_data_local.cpp
index 6c965b3..852a4ab 100644
--- a/src/core/thread/network_data_local.cpp
+++ b/src/core/thread/network_data_local.cpp
@@ -38,7 +38,7 @@
#include "common/instance.hpp"
#include "common/locator-getters.hpp"
#include "common/logging.hpp"
-#include "mac/mac_frame.hpp"
+#include "mac/mac_types.hpp"
#include "thread/thread_netif.hpp"
#if OPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE || OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
@@ -52,6 +52,7 @@
{
}
+#if OPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE
otError Local::AddOnMeshPrefix(const uint8_t *aPrefix, uint8_t aPrefixLength, int8_t aPrf, uint8_t aFlags, bool aStable)
{
otError error = OT_ERROR_NONE;
@@ -175,6 +176,53 @@
return error;
}
+void Local::UpdateRloc(PrefixTlv &aPrefix)
+{
+ for (NetworkDataTlv *cur = aPrefix.GetSubTlvs(); cur < aPrefix.GetNext(); cur = cur->GetNext())
+ {
+ switch (cur->GetType())
+ {
+ case NetworkDataTlv::kTypeHasRoute:
+ UpdateRloc(*static_cast<HasRouteTlv *>(cur));
+ break;
+
+ case NetworkDataTlv::kTypeBorderRouter:
+ UpdateRloc(*static_cast<BorderRouterTlv *>(cur));
+ break;
+
+ default:
+ assert(false);
+ break;
+ }
+ }
+}
+
+void Local::UpdateRloc(HasRouteTlv &aHasRoute)
+{
+ HasRouteEntry *entry = aHasRoute.GetEntry(0);
+ entry->SetRloc(Get<Mle::MleRouter>().GetRloc16());
+}
+
+void Local::UpdateRloc(BorderRouterTlv &aBorderRouter)
+{
+ BorderRouterEntry *entry = aBorderRouter.GetEntry(0);
+ entry->SetRloc(Get<Mle::MleRouter>().GetRloc16());
+}
+
+bool Local::IsOnMeshPrefixConsistent(void)
+{
+ return (Get<Leader>().ContainsOnMeshPrefixes(*this, Get<Mle::MleRouter>().GetRloc16()) &&
+ ContainsOnMeshPrefixes(Get<Leader>(), Get<Mle::MleRouter>().GetRloc16()));
+}
+
+bool Local::IsExternalRouteConsistent(void)
+{
+ return (Get<Leader>().ContainsExternalRoutes(*this, Get<Mle::MleRouter>().GetRloc16()) &&
+ ContainsExternalRoutes(Get<Leader>(), Get<Mle::MleRouter>().GetRloc16()));
+}
+
+#endif // OPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE
+
#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
otError Local::AddService(uint32_t aEnterpriseNumber,
const uint8_t *aServiceData,
@@ -240,69 +288,7 @@
otDumpDebgNetData("remove service done", mTlvs, mLength);
return error;
}
-#endif
-void Local::UpdateRloc(void)
-{
- for (NetworkDataTlv *cur = reinterpret_cast<NetworkDataTlv *>(mTlvs);
- cur < reinterpret_cast<NetworkDataTlv *>(mTlvs + mLength); cur = cur->GetNext())
- {
- switch (cur->GetType())
- {
- case NetworkDataTlv::kTypePrefix:
- UpdateRloc(*static_cast<PrefixTlv *>(cur));
- break;
-
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
-
- case NetworkDataTlv::kTypeService:
- UpdateRloc(*static_cast<ServiceTlv *>(cur));
- break;
-#endif
-
- default:
- assert(false);
- break;
- }
- }
-
- ClearResubmitDelayTimer();
-}
-
-void Local::UpdateRloc(PrefixTlv &aPrefix)
-{
- for (NetworkDataTlv *cur = aPrefix.GetSubTlvs(); cur < aPrefix.GetNext(); cur = cur->GetNext())
- {
- switch (cur->GetType())
- {
- case NetworkDataTlv::kTypeHasRoute:
- UpdateRloc(*static_cast<HasRouteTlv *>(cur));
- break;
-
- case NetworkDataTlv::kTypeBorderRouter:
- UpdateRloc(*static_cast<BorderRouterTlv *>(cur));
- break;
-
- default:
- assert(false);
- break;
- }
- }
-}
-
-void Local::UpdateRloc(HasRouteTlv &aHasRoute)
-{
- HasRouteEntry *entry = aHasRoute.GetEntry(0);
- entry->SetRloc(Get<Mle::MleRouter>().GetRloc16());
-}
-
-void Local::UpdateRloc(BorderRouterTlv &aBorderRouter)
-{
- BorderRouterEntry *entry = aBorderRouter.GetEntry(0);
- entry->SetRloc(Get<Mle::MleRouter>().GetRloc16());
-}
-
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
void Local::UpdateRloc(ServiceTlv &aService)
{
for (NetworkDataTlv *cur = aService.GetSubTlvs(); cur < aService.GetNext(); cur = cur->GetNext())
@@ -324,38 +310,54 @@
{
aServer.SetServer16(Get<Mle::MleRouter>().GetRloc16());
}
-#endif
-bool Local::IsOnMeshPrefixConsistent(void)
-{
- return (Get<Leader>().ContainsOnMeshPrefixes(*this, Get<Mle::MleRouter>().GetRloc16()) &&
- ContainsOnMeshPrefixes(Get<Leader>(), Get<Mle::MleRouter>().GetRloc16()));
-}
-
-bool Local::IsExternalRouteConsistent(void)
-{
- return (Get<Leader>().ContainsExternalRoutes(*this, Get<Mle::MleRouter>().GetRloc16()) &&
- ContainsExternalRoutes(Get<Leader>(), Get<Mle::MleRouter>().GetRloc16()));
-}
-
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
bool Local::IsServiceConsistent(void)
{
return (Get<Leader>().ContainsServices(*this, Get<Mle::MleRouter>().GetRloc16()) &&
ContainsServices(Get<Leader>(), Get<Mle::MleRouter>().GetRloc16()));
}
+
+#endif // OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
+
+void Local::UpdateRloc(void)
+{
+ for (NetworkDataTlv *cur = reinterpret_cast<NetworkDataTlv *>(mTlvs);
+ cur < reinterpret_cast<NetworkDataTlv *>(mTlvs + mLength); cur = cur->GetNext())
+ {
+ switch (cur->GetType())
+ {
+#if OPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE
+ case NetworkDataTlv::kTypePrefix:
+ UpdateRloc(*static_cast<PrefixTlv *>(cur));
+ break;
#endif
+#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
+
+ case NetworkDataTlv::kTypeService:
+ UpdateRloc(*static_cast<ServiceTlv *>(cur));
+ break;
+#endif
+
+ default:
+ assert(false);
+ break;
+ }
+ }
+
+ ClearResubmitDelayTimer();
+}
+
otError Local::SendServerDataNotification(void)
{
- otError error = OT_ERROR_NONE;
- uint16_t rloc = Get<Mle::MleRouter>().GetRloc16();
+ otError error = OT_ERROR_NONE;
+ uint16_t rloc = Get<Mle::MleRouter>().GetRloc16();
+ bool isConsistent = true;
#if OPENTHREAD_FTD
// Don't send this Server Data Notification if the device is going to upgrade to Router
- if (Get<Mle::MleRouter>().IsFullThreadDevice() && Get<Mle::MleRouter>().IsRouterRoleEnabled() &&
- (Get<Mle::MleRouter>().GetRole() < OT_DEVICE_ROLE_ROUTER) &&
+ if (Get<Mle::MleRouter>().IsRouterEligible() && (Get<Mle::MleRouter>().GetRole() < OT_DEVICE_ROLE_ROUTER) &&
(Get<RouterTable>().GetActiveRouterCount() < Get<Mle::MleRouter>().GetRouterUpgradeThreshold()))
{
ExitNow(error = OT_ERROR_INVALID_STATE);
@@ -365,12 +367,14 @@
UpdateRloc();
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
- VerifyOrExit(!IsOnMeshPrefixConsistent() || !IsExternalRouteConsistent() || !IsServiceConsistent(),
- ClearResubmitDelayTimer());
-#else
- VerifyOrExit(!IsOnMeshPrefixConsistent() || !IsExternalRouteConsistent(), ClearResubmitDelayTimer());
+#if OPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE
+ isConsistent = isConsistent && IsOnMeshPrefixConsistent() && IsExternalRouteConsistent();
#endif
+#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
+ isConsistent = isConsistent && IsServiceConsistent();
+#endif
+
+ VerifyOrExit(!isConsistent, ClearResubmitDelayTimer());
if (mOldRloc == rloc)
{
diff --git a/src/core/thread/network_data_local.hpp b/src/core/thread/network_data_local.hpp
index 90c7434..08039c9 100644
--- a/src/core/thread/network_data_local.hpp
+++ b/src/core/thread/network_data_local.hpp
@@ -38,6 +38,8 @@
#include "thread/network_data.hpp"
+#if OPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE || OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
+
namespace ot {
/**
@@ -66,6 +68,7 @@
*/
explicit Local(Instance &aInstance);
+#if OPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE
/**
* This method adds a Border Router entry to the Thread Network Data.
*
@@ -119,6 +122,7 @@
*
*/
otError RemoveHasRoutePrefix(const uint8_t *aPrefix, uint8_t aPrefixLength);
+#endif // OPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE
#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
/**
@@ -167,17 +171,17 @@
private:
void UpdateRloc(void);
+#if OPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE
void UpdateRloc(PrefixTlv &aPrefix);
void UpdateRloc(HasRouteTlv &aHasRoute);
void UpdateRloc(BorderRouterTlv &aBorderRouter);
+ bool IsOnMeshPrefixConsistent(void);
+ bool IsExternalRouteConsistent(void);
+#endif
+
#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
void UpdateRloc(ServiceTlv &aService);
void UpdateRloc(ServerTlv &aServer);
-#endif
-
- bool IsOnMeshPrefixConsistent(void);
- bool IsExternalRouteConsistent(void);
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
bool IsServiceConsistent(void);
#endif
@@ -192,4 +196,6 @@
} // namespace ot
+#endif // OPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE || OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
+
#endif // NETWORK_DATA_LOCAL_HPP_
diff --git a/src/core/thread/network_data_tlvs.hpp b/src/core/thread/network_data_tlvs.hpp
index 8206722..7df17a6 100644
--- a/src/core/thread/network_data_tlvs.hpp
+++ b/src/core/thread/network_data_tlvs.hpp
@@ -36,8 +36,6 @@
#include "openthread-core-config.h"
-#include "utils/wrap_string.h"
-
#include "common/encoding.hpp"
#include "net/ip6_address.hpp"
diff --git a/src/core/thread/network_diagnostic.cpp b/src/core/thread/network_diagnostic.cpp
index 6dc5114..99afd38 100644
--- a/src/core/thread/network_diagnostic.cpp
+++ b/src/core/thread/network_diagnostic.cpp
@@ -41,7 +41,6 @@
#include "common/locator-getters.hpp"
#include "common/logging.hpp"
#include "mac/mac.hpp"
-#include "mac/mac_frame.hpp"
#include "net/netif.hpp"
#include "thread/mesh_forwarder.hpp"
#include "thread/mle_router.hpp"
@@ -147,21 +146,21 @@
otError aResult)
{
static_cast<NetworkDiagnostic *>(aContext)->HandleDiagnosticGetResponse(
- *static_cast<Coap::Message *>(aMessage), *static_cast<const Ip6::MessageInfo *>(aMessageInfo), aResult);
+ static_cast<Coap::Message *>(aMessage), static_cast<const Ip6::MessageInfo *>(aMessageInfo), aResult);
}
-void NetworkDiagnostic::HandleDiagnosticGetResponse(Coap::Message & aMessage,
- const Ip6::MessageInfo &aMessageInfo,
+void NetworkDiagnostic::HandleDiagnosticGetResponse(Coap::Message * aMessage,
+ const Ip6::MessageInfo *aMessageInfo,
otError aResult)
{
VerifyOrExit(aResult == OT_ERROR_NONE);
- VerifyOrExit(aMessage.GetCode() == OT_COAP_CODE_CHANGED);
+ VerifyOrExit(aMessage && aMessage->GetCode() == OT_COAP_CODE_CHANGED);
otLogInfoNetDiag("Received diagnostic get response");
if (mReceiveDiagnosticGetCallback)
{
- mReceiveDiagnosticGetCallback(&aMessage, &aMessageInfo, mReceiveDiagnosticGetCallbackContext);
+ mReceiveDiagnosticGetCallback(aMessage, aMessageInfo, mReceiveDiagnosticGetCallbackContext);
}
exit:
@@ -231,19 +230,25 @@
tlv.Init();
- count = Get<ChildTable>().GetNumChildren(ChildTable::kInStateValid);
+ count = Get<ChildTable>().GetNumChildren(Child::kInStateValid);
- if (count > (CHAR_BIT * sizeof(uint8_t) / sizeof(ChildTableEntry)))
+ // The length of the Child Table TLV may exceed the outgoing link's MTU (1280B).
+ // As a workaround we limit the number of entries in the Child Table TLV,
+ // also to avoid using extended TLV format. The issue is processed by the
+ // Thread Group (SPEC-894).
+ if (count > (Tlv::kBaseTlvMaxLength / sizeof(ChildTableEntry)))
{
- count = CHAR_BIT * sizeof(uint8_t) / sizeof(ChildTableEntry);
+ count = Tlv::kBaseTlvMaxLength / sizeof(ChildTableEntry);
}
tlv.SetLength(static_cast<uint8_t>(count * sizeof(ChildTableEntry)));
SuccessOrExit(error = aMessage.Append(&tlv, sizeof(ChildTableTlv)));
- for (ChildTable::Iterator iter(GetInstance(), ChildTable::kInStateValid); !iter.IsDone(); iter++)
+ for (ChildTable::Iterator iter(GetInstance(), Child::kInStateValid); !iter.IsDone(); iter++)
{
+ VerifyOrExit(count--);
+
Child &child = *iter.GetChild();
timeout = 0;
@@ -256,7 +261,7 @@
entry.SetReserved(0);
entry.SetTimeout(timeout + 4);
- entry.SetChildId(Mle::Mle::GetChildId(child.GetRloc16()));
+ entry.SetChildId(Mle::Mle::ChildIdFromRloc16(child.GetRloc16()));
entry.SetMode(child.GetDeviceMode());
SuccessOrExit(error = aMessage.Append(&entry, sizeof(ChildTableEntry)));
@@ -308,7 +313,7 @@
ExtMacAddressTlv tlv;
tlv.Init();
tlv.SetMacAddr(Get<Mac::Mac>().GetExtAddress());
- SuccessOrExit(error = aResponse.AppendTlv(tlv));
+ SuccessOrExit(error = tlv.AppendTo(aResponse));
break;
}
@@ -317,7 +322,7 @@
Address16Tlv tlv;
tlv.Init();
tlv.SetRloc16(Get<Mle::MleRouter>().GetRloc16());
- SuccessOrExit(error = aResponse.AppendTlv(tlv));
+ SuccessOrExit(error = tlv.AppendTo(aResponse));
break;
}
@@ -326,7 +331,7 @@
ModeTlv tlv;
tlv.Init();
tlv.SetMode(Get<Mle::MleRouter>().GetDeviceMode());
- SuccessOrExit(error = aResponse.AppendTlv(tlv));
+ SuccessOrExit(error = tlv.AppendTo(aResponse));
break;
}
@@ -336,8 +341,8 @@
{
TimeoutTlv tlv;
tlv.Init();
- tlv.SetTimeout(TimerMilli::MsecToSec(Get<DataPollSender>().GetKeepAlivePollPeriod()));
- SuccessOrExit(error = aResponse.AppendTlv(tlv));
+ tlv.SetTimeout(Get<Mle::MleRouter>().GetTimeout());
+ SuccessOrExit(error = tlv.AppendTo(aResponse));
}
break;
@@ -348,7 +353,7 @@
ConnectivityTlv tlv;
tlv.Init();
Get<Mle::MleRouter>().FillConnectivityTlv(reinterpret_cast<Mle::ConnectivityTlv &>(tlv));
- SuccessOrExit(error = aResponse.AppendTlv(tlv));
+ SuccessOrExit(error = tlv.AppendTo(aResponse));
break;
}
@@ -358,7 +363,7 @@
RouteTlv tlv;
tlv.Init();
Get<Mle::MleRouter>().FillRouteTlv(reinterpret_cast<Mle::RouteTlv &>(tlv));
- SuccessOrExit(error = aResponse.AppendTlv(tlv));
+ SuccessOrExit(error = tlv.AppendTo(aResponse));
break;
}
#endif
@@ -367,7 +372,7 @@
{
LeaderDataTlv tlv(reinterpret_cast<const LeaderDataTlv &>(Get<Mle::MleRouter>().GetLeaderDataTlv()));
tlv.Init();
- SuccessOrExit(error = aResponse.AppendTlv(tlv));
+ SuccessOrExit(error = tlv.AppendTo(aResponse));
break;
}
@@ -377,7 +382,7 @@
tlv.Init();
Get<Mle::MleRouter>().FillNetworkDataTlv((reinterpret_cast<Mle::NetworkDataTlv &>(tlv)), false);
- SuccessOrExit(error = aResponse.AppendTlv(tlv));
+ SuccessOrExit(error = tlv.AppendTo(aResponse));
break;
}
@@ -393,7 +398,7 @@
memset(&tlv, 0, sizeof(tlv));
tlv.Init();
FillMacCountersTlv(tlv);
- SuccessOrExit(error = aResponse.AppendTlv(tlv));
+ SuccessOrExit(error = tlv.AppendTo(aResponse));
break;
}
@@ -441,7 +446,7 @@
}
tlv.SetLength(length);
- SuccessOrExit(error = aResponse.AppendTlv(tlv));
+ SuccessOrExit(error = tlv.AppendTo(aResponse));
break;
}
@@ -454,7 +459,7 @@
MaxChildTimeoutTlv tlv;
tlv.Init();
tlv.SetTimeout(maxTimeout);
- SuccessOrExit(error = aResponse.AppendTlv(tlv));
+ SuccessOrExit(error = tlv.AppendTo(aResponse));
}
break;
diff --git a/src/core/thread/network_diagnostic.hpp b/src/core/thread/network_diagnostic.hpp
index 6b1a20c..4d0500c 100644
--- a/src/core/thread/network_diagnostic.hpp
+++ b/src/core/thread/network_diagnostic.hpp
@@ -114,7 +114,7 @@
otMessage * aMessage,
const otMessageInfo *aMessageInfo,
otError aResult);
- void HandleDiagnosticGetResponse(Coap::Message &aMessage, const Ip6::MessageInfo &aMessageInfo, otError aResult);
+ void HandleDiagnosticGetResponse(Coap::Message *aMessage, const Ip6::MessageInfo *aMessageInfo, otError aResult);
static void HandleDiagnosticGetAnswer(void *aContext, otMessage *aMessage, const otMessageInfo *aMessageInfo);
void HandleDiagnosticGetAnswer(Coap::Message &aMessage, const Ip6::MessageInfo &aMessageInfo);
diff --git a/src/core/thread/network_diagnostic_tlvs.hpp b/src/core/thread/network_diagnostic_tlvs.hpp
index 9c559cf..1dc0bcc 100644
--- a/src/core/thread/network_diagnostic_tlvs.hpp
+++ b/src/core/thread/network_diagnostic_tlvs.hpp
@@ -36,14 +36,11 @@
#include "openthread-core-config.h"
-#include "utils/wrap_string.h"
-
#include <openthread/thread.h>
#include "common/encoding.hpp"
#include "common/message.hpp"
#include "common/tlvs.hpp"
-#include "meshcop/meshcop_tlvs.hpp"
#include "net/ip6_address.hpp"
#include "radio/radio.hpp"
#include "thread/device_mode.hpp"
@@ -1348,6 +1345,26 @@
return *reinterpret_cast<ChildTableEntry *>(GetValue() + (aIndex * sizeof(ChildTableEntry)));
}
+ /**
+ * This method reads the Child Table entry at @p aIndex.
+ *
+ * @param[out] aEntry A reference to a ChildTableEntry.
+ * @param[in] aMessage A reference to the message.
+ * @param[in] aOffset The offset of the ChildTableTLV in aMessage.
+ * @param[in] aIndex The index into the Child Table list.
+ *
+ * @retval OT_ERROR_NOT_FOUND No such entry is found.
+ * @retval OT_ERROR_NONE Successfully read the entry.
+ */
+ otError ReadEntry(ChildTableEntry &aEntry, Message &aMessage, uint16_t aOffset, uint8_t aIndex) const
+ {
+ return (aIndex < GetNumEntries() &&
+ aMessage.Read(aOffset + sizeof(ChildTableTlv) + (aIndex * sizeof(ChildTableEntry)),
+ sizeof(ChildTableEntry), &aEntry) == sizeof(ChildTableEntry))
+ ? OT_ERROR_NONE
+ : OT_ERROR_INVALID_ARGS;
+ }
+
} OT_TOOL_PACKED_END;
/**
diff --git a/src/core/thread/panid_query_server.cpp b/src/core/thread/panid_query_server.cpp
index 0a1b368..15165ec 100644
--- a/src/core/thread/panid_query_server.cpp
+++ b/src/core/thread/panid_query_server.cpp
@@ -89,22 +89,18 @@
return;
}
-void PanIdQueryServer::HandleScanResult(Instance &aInstance, Mac::RxFrame *aFrame)
+void PanIdQueryServer::HandleScanResult(Mac::ActiveScanResult *aScanResult, void *aContext)
{
- aInstance.Get<PanIdQueryServer>().HandleScanResult(aFrame);
+ static_cast<PanIdQueryServer *>(aContext)->HandleScanResult(aScanResult);
}
-void PanIdQueryServer::HandleScanResult(Mac::RxFrame *aFrame)
+void PanIdQueryServer::HandleScanResult(Mac::ActiveScanResult *aScanResult)
{
- uint16_t panId;
-
- if (aFrame != NULL)
+ if (aScanResult != NULL)
{
- aFrame->GetSrcPanId(panId);
-
- if (panId == mPanId)
+ if (aScanResult->mPanId == mPanId)
{
- mChannelMask |= 1 << aFrame->GetChannel();
+ mChannelMask |= 1 << aScanResult->mChannel;
}
}
else if (mChannelMask != 0)
@@ -128,11 +124,11 @@
channelMask.Init();
channelMask.SetChannelMask(mChannelMask);
- SuccessOrExit(error = message->AppendTlv(channelMask));
+ SuccessOrExit(error = channelMask.AppendTo(*message));
panId.Init();
panId.SetPanId(mPanId);
- SuccessOrExit(error = message->AppendTlv(panId));
+ SuccessOrExit(error = panId.AppendTo(*message));
messageInfo.SetSockAddr(Get<Mle::MleRouter>().GetMeshLocal16());
messageInfo.SetPeerAddr(mCommissioner);
@@ -158,7 +154,7 @@
void PanIdQueryServer::HandleTimer(void)
{
- Get<Mac::Mac>().ActiveScan(mChannelMask, 0, HandleScanResult);
+ Get<Mac::Mac>().ActiveScan(mChannelMask, 0, HandleScanResult, this);
mChannelMask = 0;
}
diff --git a/src/core/thread/panid_query_server.hpp b/src/core/thread/panid_query_server.hpp
index 3213a3c..01b93a1 100644
--- a/src/core/thread/panid_query_server.hpp
+++ b/src/core/thread/panid_query_server.hpp
@@ -39,6 +39,7 @@
#include "coap/coap.hpp"
#include "common/locator.hpp"
#include "common/timer.hpp"
+#include "mac/mac.hpp"
#include "net/ip6_address.hpp"
#include "net/udp6.hpp"
@@ -66,8 +67,8 @@
static void HandleQuery(void *aContext, otMessage *aMessage, const otMessageInfo *aMessageInfo);
void HandleQuery(Coap::Message &aMessage, const Ip6::MessageInfo &aMessageInfo);
- static void HandleScanResult(Instance &aInstance, Mac::RxFrame *aFrame);
- void HandleScanResult(Mac::RxFrame *aFrame);
+ static void HandleScanResult(Mac::ActiveScanResult *aScanResult, void *aContext);
+ void HandleScanResult(Mac::ActiveScanResult *aScanResult);
static void HandleTimer(Timer &aTimer);
void HandleTimer(void);
diff --git a/src/core/thread/router_table.cpp b/src/core/thread/router_table.cpp
index 084cd3e..c4955d3 100644
--- a/src/core/thread/router_table.cpp
+++ b/src/core/thread/router_table.cpp
@@ -101,7 +101,7 @@
{
Router &router = mRouters[index];
- if (router.GetState() == Neighbor::kStateValid)
+ if (router.IsStateValid())
{
Get<Mle::MleRouter>().Signal(OT_NEIGHBOR_TABLE_EVENT_ROUTER_REMOVED, router);
}
@@ -183,8 +183,8 @@
if (router.GetRouterId() != routerId)
{
- memset(&router, 0, sizeof(router));
- router.SetRloc16(Mle::Mle::GetRloc16(routerId));
+ router.Clear();
+ router.SetRloc16(Mle::Mle::Rloc16FromRouterId(routerId));
router.SetNextHop(Mle::kInvalidRouterId);
}
}
@@ -194,7 +194,7 @@
for (uint8_t index = mActiveRouterCount; index < Mle::kMaxRouters; index++)
{
Router &router = mRouters[index];
- memset(&router, 0, sizeof(router));
+ router.Clear();
router.SetRloc16(0xffff);
}
}
@@ -267,7 +267,7 @@
otError RouterTable::Release(uint8_t aRouterId)
{
otError error = OT_ERROR_NONE;
- uint16_t rloc16 = Mle::Mle::GetRloc16(aRouterId);
+ uint16_t rloc16 = Mle::Mle::Rloc16FromRouterId(aRouterId);
assert(aRouterId <= Mle::kMaxRouterId);
@@ -335,7 +335,7 @@
for (const Router *router = GetFirstEntry(); router != NULL; router = GetNextEntry(router))
{
- if (router->GetState() == Neighbor::kStateValid)
+ if (router->IsStateValid())
{
activeLinks++;
}
@@ -352,7 +352,7 @@
for (router = GetFirstEntry(); router != NULL; router = GetNextEntry(router))
{
- if (router->GetState() == Neighbor::kStateValid && router->GetRloc16() == aRloc16)
+ if (router->IsStateValid() && router->GetRloc16() == aRloc16)
{
ExitNow();
}
@@ -370,7 +370,7 @@
for (router = GetFirstEntry(); router != NULL; router = GetNextEntry(router))
{
- if (router->GetState() == Neighbor::kStateValid && router->GetExtAddress() == aExtAddress)
+ if (router->IsStateValid() && router->GetExtAddress() == aExtAddress)
{
ExitNow();
}
@@ -383,7 +383,7 @@
const Router *RouterTable::GetRouter(uint8_t aRouterId) const
{
const Router *router = NULL;
- uint16_t rloc16 = Mle::Mle::GetRloc16(aRouterId);
+ uint16_t rloc16 = Mle::Mle::Rloc16FromRouterId(aRouterId);
for (router = GetFirstEntry(); router != NULL; router = GetNextEntry(router))
{
@@ -424,7 +424,7 @@
else
{
VerifyOrExit(Mle::Mle::IsActiveRouter(aRouterId), error = OT_ERROR_INVALID_ARGS);
- routerId = Mle::Mle::GetRouterId(aRouterId);
+ routerId = Mle::Mle::RouterIdFromRloc16(aRouterId);
VerifyOrExit(routerId <= Mle::kMaxRouterId, error = OT_ERROR_INVALID_ARGS);
}
@@ -433,15 +433,15 @@
memset(&aRouterInfo, 0, sizeof(aRouterInfo));
aRouterInfo.mRouterId = routerId;
- aRouterInfo.mRloc16 = Mle::Mle::GetRloc16(routerId);
+ aRouterInfo.mRloc16 = Mle::Mle::Rloc16FromRouterId(routerId);
aRouterInfo.mExtAddress = router->GetExtAddress();
aRouterInfo.mAllocated = true;
aRouterInfo.mNextHop = router->GetNextHop();
- aRouterInfo.mLinkEstablished = router->GetState() == Neighbor::kStateValid;
+ aRouterInfo.mLinkEstablished = router->IsStateValid();
aRouterInfo.mPathCost = router->GetCost();
aRouterInfo.mLinkQualityIn = router->GetLinkInfo().GetLinkQuality();
aRouterInfo.mLinkQualityOut = router->GetLinkQualityOut();
- aRouterInfo.mAge = static_cast<uint8_t>(TimerMilli::MsecToSec(TimerMilli::Elapsed(router->GetLastHeard())));
+ aRouterInfo.mAge = static_cast<uint8_t>(Time::MsecToSec(TimerMilli::GetNow() - router->GetLastHeard()));
exit:
return error;
@@ -454,8 +454,7 @@
uint32_t RouterTable::GetLeaderAge(void) const
{
- return (mActiveRouterCount > 0) ? TimerMilli::MsecToSec(TimerMilli::Elapsed(mRouterIdSequenceLastUpdated))
- : 0xffffffff;
+ return (mActiveRouterCount > 0) ? Time::MsecToSec(TimerMilli::GetNow() - mRouterIdSequenceLastUpdated) : 0xffffffff;
}
uint8_t RouterTable::GetNeighborCount(void) const
@@ -464,7 +463,7 @@
for (const Router *router = GetFirstEntry(); router != NULL; router = GetNextEntry(router))
{
- if (router->GetState() == Neighbor::kStateValid)
+ if (router->IsStateValid())
{
count++;
}
@@ -477,8 +476,7 @@
{
uint8_t rval = Mle::kMaxRouteCost;
- VerifyOrExit(aRouter.GetRloc16() != Get<Mle::MleRouter>().GetRloc16() &&
- aRouter.GetState() == Neighbor::kStateValid);
+ VerifyOrExit(aRouter.GetRloc16() != Get<Mle::MleRouter>().GetRloc16() && aRouter.IsStateValid());
rval = aRouter.GetLinkInfo().GetLinkQuality();
diff --git a/src/core/thread/router_table.hpp b/src/core/thread/router_table.hpp
index bd1fde0..d7bd251 100644
--- a/src/core/thread/router_table.hpp
+++ b/src/core/thread/router_table.hpp
@@ -31,7 +31,7 @@
#include "common/encoding.hpp"
#include "common/locator.hpp"
-#include "mac/mac_frame.hpp"
+#include "mac/mac_types.hpp"
#include "thread/mle_constants.hpp"
#include "thread/thread_tlvs.hpp"
#include "thread/topology.hpp"
@@ -290,7 +290,7 @@
* @returns The local time when the Router ID Sequence was last updated.
*
*/
- uint32_t GetRouterIdSequenceLastUpdated(void) const { return mRouterIdSequenceLastUpdated; }
+ TimeMilli GetRouterIdSequenceLastUpdated(void) const { return mRouterIdSequenceLastUpdated; }
/**
* This method returns the number of neighbor links.
@@ -356,7 +356,7 @@
Router mRouters[Mle::kMaxRouters];
RouterIdSet mAllocatedRouterIds;
uint8_t mRouterIdReuseDelay[Mle::kMaxRouterId + 1];
- uint32_t mRouterIdSequenceLastUpdated;
+ TimeMilli mRouterIdSequenceLastUpdated;
uint8_t mRouterIdSequence;
uint8_t mActiveRouterCount;
};
diff --git a/src/core/thread/src_match_controller.cpp b/src/core/thread/src_match_controller.cpp
index 0561b6e..c0226e4 100644
--- a/src/core/thread/src_match_controller.cpp
+++ b/src/core/thread/src_match_controller.cpp
@@ -38,7 +38,7 @@
#include "common/instance.hpp"
#include "common/locator-getters.hpp"
#include "common/logging.hpp"
-#include "mac/mac_frame.hpp"
+#include "mac/mac_types.hpp"
#include "radio/radio.hpp"
#include "thread/mesh_forwarder.hpp"
#include "thread/thread_netif.hpp"
@@ -153,10 +153,10 @@
}
else
{
- Mac::Address address;
+ Mac::ExtAddress address;
- address.SetExtended(aChild.GetExtAddress().m8, /* aReverse */ true);
- error = Get<Radio>().AddSrcMatchExtEntry(address.GetExtended());
+ address.Set(aChild.GetExtAddress().m8, Mac::ExtAddress::kReverseByteOrder);
+ error = Get<Radio>().AddSrcMatchExtEntry(address);
otLogDebgMac("SrcAddrMatch - Adding addr: %s -- %s (%d)", aChild.GetExtAddress().ToString().AsCString(),
otThreadErrorToString(error), error);
@@ -185,10 +185,10 @@
}
else
{
- Mac::Address address;
+ Mac::ExtAddress address;
- address.SetExtended(aChild.GetExtAddress().m8, /* aReverse */ true);
- error = Get<Radio>().ClearSrcMatchExtEntry(address.GetExtended());
+ address.Set(aChild.GetExtAddress().m8, Mac::ExtAddress::kReverseByteOrder);
+ error = Get<Radio>().ClearSrcMatchExtEntry(address);
otLogDebgMac("SrcAddrMatch - Clearing addr: %s -- %s (%d)", aChild.GetExtAddress().ToString().AsCString(),
otThreadErrorToString(error), error);
@@ -210,7 +210,7 @@
{
otError error = OT_ERROR_NONE;
- for (ChildTable::Iterator iter(GetInstance(), ChildTable::kInStateValidOrRestoring); !iter.IsDone(); iter++)
+ for (ChildTable::Iterator iter(GetInstance(), Child::kInStateValidOrRestoring); !iter.IsDone(); iter++)
{
if (iter.GetChild()->IsIndirectSourceMatchPending())
{
diff --git a/src/core/thread/thread_tlvs.hpp b/src/core/thread/thread_tlvs.hpp
index a4c7955..196677b 100644
--- a/src/core/thread/thread_tlvs.hpp
+++ b/src/core/thread/thread_tlvs.hpp
@@ -305,8 +305,11 @@
*/
void SetIid(const Mac::ExtAddress &aExtAddress)
{
- memcpy(mIid, aExtAddress.m8, sizeof(mIid));
- mIid[0] ^= 0x2;
+ Mac::ExtAddress addr;
+
+ addr = aExtAddress;
+ addr.ToggleLocal();
+ addr.CopyTo(mIid);
}
private:
diff --git a/src/core/thread/time_sync_service.cpp b/src/core/thread/time_sync_service.cpp
index db83e27..18b88b6 100644
--- a/src/core/thread/time_sync_service.cpp
+++ b/src/core/thread/time_sync_service.cpp
@@ -153,7 +153,7 @@
void TimeSync::ProcessTimeSync(void)
{
if (Get<Mle::MleRouter>().GetRole() == OT_DEVICE_ROLE_LEADER &&
- TimerMilli::Elapsed(mLastTimeSyncSent) > TimerMilli::SecToMsec(mTimeSyncPeriod))
+ (TimerMilli::GetNow() - mLastTimeSyncSent > Time::SecToMsec(mTimeSyncPeriod)))
{
IncrementTimeSyncSeq();
mTimeSyncRequired = true;
@@ -192,7 +192,7 @@
// Network time status will become OT_NETWORK_TIME_UNSYNCHRONIZED because no network time has yet been received
// on the new partition.
- mLastTimeSyncReceived = 0;
+ mLastTimeSyncReceived.SetValue(0);
stateChanged = true;
@@ -223,8 +223,8 @@
void TimeSync::CheckAndHandleChanges(bool aTimeUpdated)
{
otNetworkTimeStatus networkTimeStatus = OT_NETWORK_TIME_SYNCHRONIZED;
- const uint32_t resyncNeededThresholdMs = 2 * TimerMilli::SecToMsec(mTimeSyncPeriod);
- const uint32_t timeSyncLastSyncMs = TimerMilli::Elapsed(mLastTimeSyncReceived);
+ const uint32_t resyncNeededThresholdMs = 2 * Time::SecToMsec(mTimeSyncPeriod);
+ const uint32_t timeSyncLastSyncMs = TimerMilli::GetNow() - mLastTimeSyncReceived;
mTimer.Stop();
@@ -238,7 +238,7 @@
case OT_DEVICE_ROLE_CHILD:
case OT_DEVICE_ROLE_ROUTER:
- if (mLastTimeSyncReceived == 0)
+ if (mLastTimeSyncReceived.GetValue() == 0)
{
// Haven't yet received any time sync
networkTimeStatus = OT_NETWORK_TIME_UNSYNCHRONIZED;
diff --git a/src/core/thread/time_sync_service.hpp b/src/core/thread/time_sync_service.hpp
index b382b39..8563b34 100644
--- a/src/core/thread/time_sync_service.hpp
+++ b/src/core/thread/time_sync_service.hpp
@@ -209,10 +209,10 @@
uint16_t mTimeSyncPeriod; ///< The time synchronization period.
uint16_t mXtalThreshold; ///< The XTAL accuracy threshold for a device to become a Router, in PPM.
#if OPENTHREAD_FTD
- uint32_t mLastTimeSyncSent; ///< The time when the last time synchronization message was sent.
+ TimeMilli mLastTimeSyncSent; ///< The time when the last time synchronization message was sent.
#endif
- uint32_t mLastTimeSyncReceived; ///< The time when the last time synchronization message was received.
- int64_t mNetworkTimeOffset; ///< The time offset to the Thread Network time
+ TimeMilli mLastTimeSyncReceived; ///< The time when the last time synchronization message was received.
+ int64_t mNetworkTimeOffset; ///< The time offset to the Thread Network time
otNetworkTimeSyncCallbackFn
mTimeSyncCallback; ///< The callback to be called when time sync is handled or status updated.
void * mTimeSyncCallbackContext; ///< The context to be passed to callback.
diff --git a/src/core/thread/topology.cpp b/src/core/thread/topology.cpp
index 01a245f..fc7f6b1 100644
--- a/src/core/thread/topology.cpp
+++ b/src/core/thread/topology.cpp
@@ -41,12 +41,7 @@
namespace ot {
-void Neighbor::GenerateChallenge(void)
-{
- Random::NonCrypto::FillBuffer(mValidPending.mPending.mChallenge, sizeof(mValidPending.mPending.mChallenge));
-}
-
-bool Child::IsStateValidOrAttaching(void) const
+bool Neighbor::IsStateValidOrAttaching(void) const
{
bool rval = false;
@@ -69,6 +64,51 @@
return rval;
}
+bool Neighbor::MatchesFilter(StateFilter aFilter) const
+{
+ bool matches = false;
+
+ switch (aFilter)
+ {
+ case kInStateValid:
+ matches = IsStateValid();
+ break;
+
+ case kInStateValidOrRestoring:
+ matches = IsStateValidOrRestoring();
+ break;
+
+ case kInStateChildIdRequest:
+ matches = IsStateChildIdRequest();
+ break;
+
+ case kInStateValidOrAttaching:
+ matches = IsStateValidOrAttaching();
+ break;
+
+ case kInStateAnyExceptInvalid:
+ matches = !IsStateInvalid();
+ break;
+
+ case kInStateAnyExceptValidOrRestoring:
+ matches = !IsStateValidOrRestoring();
+ break;
+ }
+
+ return matches;
+}
+
+void Neighbor::GenerateChallenge(void)
+{
+ Random::Crypto::FillBuffer(mValidPending.mPending.mChallenge, sizeof(mValidPending.mPending.mChallenge));
+}
+
+void Child::Clear(void)
+{
+ memset(reinterpret_cast<void *>(this), 0, sizeof(Child));
+ SetState(kStateInvalid);
+}
+
void Child::ClearIp6Addresses(void)
{
memset(mMeshLocalIid, 0, sizeof(mMeshLocalIid));
@@ -237,7 +277,13 @@
void Child::GenerateChallenge(void)
{
- Random::NonCrypto::FillBuffer(mAttachChallenge, sizeof(mAttachChallenge));
+ Random::Crypto::FillBuffer(mAttachChallenge, sizeof(mAttachChallenge));
+}
+
+void Router::Clear(void)
+{
+ memset(reinterpret_cast<void *>(this), 0, sizeof(Router));
+ SetState(kStateInvalid);
}
} // namespace ot
diff --git a/src/core/thread/topology.hpp b/src/core/thread/topology.hpp
index 984e695..3512ec6 100644
--- a/src/core/thread/topology.hpp
+++ b/src/core/thread/topology.hpp
@@ -40,7 +40,8 @@
#include "common/message.hpp"
#include "common/random.hpp"
-#include "mac/mac_frame.hpp"
+#include "common/timer.hpp"
+#include "mac/mac_types.hpp"
#include "net/ip6.hpp"
#include "thread/device_mode.hpp"
#include "thread/indirect_sender.hpp"
@@ -75,6 +76,22 @@
};
/**
+ * This enumeration defines state filters used for finding a neighbor or iterating through the child/neighbor table.
+ *
+ * Each filter definition accepts a subset of `State` values.
+ *
+ */
+ enum StateFilter
+ {
+ kInStateValid, ///< Accept child only in `kStateValid`.
+ kInStateValidOrRestoring, ///< Accept child with `IsStateValidOrRestoring()` being `true`.
+ kInStateChildIdRequest, ///< Accept child only in `Child:kStateChildIdRequest`.
+ kInStateValidOrAttaching, ///< Accept child with `IsStateValidOrAttaching()` being `true`.
+ kInStateAnyExceptInvalid, ///< Accept child in any state except `kStateInvalid`.
+ kInStateAnyExceptValidOrRestoring, ///< Accept child in any state except `IsStateValidOrRestoring()`.
+ };
+
+ /**
* This method returns the current state.
*
* @returns The current state.
@@ -91,7 +108,39 @@
void SetState(State aState) { mState = static_cast<uint8_t>(aState); }
/**
- * This method indicates whether the neighbor/child is being restored.
+ * This method indicates whether the neighbor is in the Invalid state.
+ *
+ * @returns TRUE if the neighbor is in the Invalid state, FALSE otherwise.
+ *
+ */
+ bool IsStateInvalid(void) const { return (mState == kStateInvalid); }
+
+ /**
+ * This method indicates whether the neighbor is in the Child ID Request state.
+ *
+ * @returns TRUE if the neighbor is in the Child ID Request state, FALSE otherwise.
+ *
+ */
+ bool IsStateChildIdRequest(void) const { return (mState == kStateChildIdRequest); }
+
+ /**
+ * This method indicates whether the neighbor is in the Link Request state.
+ *
+ * @returns TRUE if the neighbor is in the Link Request state, FALSE otherwise.
+ *
+ */
+ bool IsStateLinkRequest(void) const { return (mState == kStateLinkRequest); }
+
+ /**
+ * This method indicates whether the neighbor is in the Parent Response state.
+ *
+ * @returns TRUE if the neighbor is in the Parent Response state, FALSE otherwise.
+ *
+ */
+ bool IsStateParentResponse(void) const { return (mState == kStateParentResponse); }
+
+ /**
+ * This method indicates whether the neighbor is being restored.
*
* @returns TRUE if the neighbor is being restored, FALSE otherwise.
*
@@ -99,9 +148,25 @@
bool IsStateRestoring(void) const { return (mState == kStateRestored) || (mState == kStateChildUpdateRequest); }
/**
- * This method indicates whether the neighbor/child is in valid state or if it is being restored.
+ * This method indicates whether the neighbor is in the Restored state.
*
- * When in these states messages can be sent to and/or received from the neighbor/child.
+ * @returns TRUE if the neighbor is in the Restored state, FALSE otherwise.
+ *
+ */
+ bool IsStateRestored(void) const { return (mState == kStateRestored); }
+
+ /**
+ * This method indicates whether the neighbor is valid (frame counters are synchronized).
+ *
+ * @returns TRUE if the neighbor is valid, FALSE otherwise.
+ *
+ */
+ bool IsStateValid(void) const { return (mState == kStateValid); }
+
+ /**
+ * This method indicates whether the neighbor is in valid state or if it is being restored.
+ *
+ * When in these states messages can be sent to and/or received from the neighbor.
*
* @returns TRUE if the neighbor is in valid, restored, or being restored states, FALSE otherwise.
*
@@ -109,6 +174,27 @@
bool IsStateValidOrRestoring(void) const { return (mState == kStateValid) || IsStateRestoring(); }
/**
+ * This method indicates if the neighbor state is valid, attaching, or restored.
+ *
+ * The states `kStateRestored`, `kStateChildIdRequest`, `kStateChildUpdateRequest`, `kStateValid`, and
+ * `kStateLinkRequest` are considered as valid, attaching, or restored.
+ *
+ * @returns TRUE if the neighbor state is valid, attaching, or restored, FALSE otherwise.
+ *
+ */
+ bool IsStateValidOrAttaching(void) const;
+
+ /**
+ * This method indicates whether neighbor state matches a given state filter.
+ *
+ * @param[in] aFilter A state filter (`StateFilter` enumeration) to match against.
+ *
+ * @returns TRUE if the neighbor state matches the filter, FALSE otherwise.
+ *
+ */
+ bool MatchesFilter(StateFilter aFilter) const;
+
+ /**
* This method gets the device mode flags.
*
* @returns The device mode flags.
@@ -168,14 +254,6 @@
* @returns A reference to the Extended Address.
*
*/
- Mac::ExtAddress &GetExtAddress(void) { return mMacAddr; }
-
- /**
- * This method returns the Extended Address.
- *
- * @returns A reference to the Extended Address.
- *
- */
const Mac::ExtAddress &GetExtAddress(void) const { return mMacAddr; }
/**
@@ -208,7 +286,7 @@
* @returns The last heard time.
*
*/
- uint32_t GetLastHeard(void) const { return mLastHeard; }
+ TimeMilli GetLastHeard(void) const { return mLastHeard; }
/**
* This method sets the last heard time.
@@ -216,7 +294,7 @@
* @param[in] aLastHeard The last heard time.
*
*/
- void SetLastHeard(uint32_t aLastHeard) { mLastHeard = aLastHeard; }
+ void SetLastHeard(TimeMilli aLastHeard) { mLastHeard = aLastHeard; }
/**
* This method gets the link frame counter value.
@@ -344,7 +422,7 @@
private:
Mac::ExtAddress mMacAddr; ///< The IEEE 802.15.4 Extended Address
- uint32_t mLastHeard; ///< Time when last heard.
+ TimeMilli mLastHeard; ///< Time when last heard.
union
{
struct
@@ -434,15 +512,10 @@
};
/**
- * This method indicates if the child state is valid or being attached or being restored.
- *
- * The states `kStateRestored`, `kStateChildIdRequest`, `kStateChildUpdateRequest`, `kStateValid`, (and
- * `kStateLinkRequest) are considered as attached or being restored.
- *
- * @returns TRUE if the child is attached or being restored.
+ * This method clears the child entry.
*
*/
- bool IsStateValidOrAttaching(void) const;
+ void Clear(void);
/**
* This method clears the IPv6 address list for the child.
@@ -654,6 +727,12 @@
{
public:
/**
+ * This method clears the router entry.
+ *
+ */
+ void Clear(void);
+
+ /**
* This method gets the router ID of the next hop to this router.
*
* @returns The router ID of the next hop to this router.
diff --git a/src/core/utils/channel_manager.cpp b/src/core/utils/channel_manager.cpp
index 02270e9..e543221 100644
--- a/src/core/utils/channel_manager.cpp
+++ b/src/core/utils/channel_manager.cpp
@@ -98,7 +98,7 @@
{
uint64_t pendingTimestamp = 0;
uint64_t pendingActiveTimestamp = 0;
- uint32_t delayInMs = TimerMilli::SecToMsec(static_cast<uint32_t>(mDelay));
+ uint32_t delayInMs = Time::SecToMsec(static_cast<uint32_t>(mDelay));
otOperationalDataset dataset;
otError error;
@@ -216,7 +216,7 @@
else
{
otLogInfoUtil("ChannelManager: %s error in dataset update (channel change %d), retry in %d sec",
- otThreadErrorToString(error), mChannel, TimerMilli::MsecToSec(kPendingDatasetTxRetryInterval));
+ otThreadErrorToString(error), mChannel, Time::MsecToSec(kPendingDatasetTxRetryInterval));
mTimer.Start(kPendingDatasetTxRetryInterval);
}
@@ -385,15 +385,6 @@
return error;
}
-
-#else // OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE
-
-otError ChannelManager::RequestChannelSelect(bool)
-{
- otLogInfoUtil("ChannelManager: ChannelMonitor feature is disabled - cannot select channel");
- return OT_ERROR_DISABLED_FEATURE;
-}
-
#endif // OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE
void ChannelManager::StartAutoSelectTimer(void)
@@ -402,7 +393,7 @@
if (mAutoSelectEnabled)
{
- mTimer.Start(TimerMilli::SecToMsec(mAutoSelectInterval));
+ mTimer.Start(Time::SecToMsec(mAutoSelectInterval));
}
else
{
@@ -428,14 +419,13 @@
otError error = OT_ERROR_NONE;
uint32_t prevInterval = mAutoSelectInterval;
- VerifyOrExit((aInterval != 0) && (aInterval <= TimerMilli::MsecToSec(Timer::kMaxDt)),
- error = OT_ERROR_INVALID_ARGS);
+ VerifyOrExit((aInterval != 0) && (aInterval <= Time::MsecToSec(Timer::kMaxDelay)), error = OT_ERROR_INVALID_ARGS);
mAutoSelectInterval = aInterval;
if (mAutoSelectEnabled && (mState == kStateIdle) && mTimer.IsRunning() && (prevInterval != aInterval))
{
- mTimer.StartAt(mTimer.GetFireTime() - TimerMilli::SecToMsec(prevInterval), TimerMilli::SecToMsec(aInterval));
+ mTimer.StartAt(mTimer.GetFireTime() - Time::SecToMsec(prevInterval), Time::SecToMsec(aInterval));
}
exit:
diff --git a/src/core/utils/channel_manager.hpp b/src/core/utils/channel_manager.hpp
index 28a84c8..534d485 100644
--- a/src/core/utils/channel_manager.hpp
+++ b/src/core/utils/channel_manager.hpp
@@ -155,7 +155,6 @@
* @retval OT_ERROR_NONE Channel selection finished successfully.
* @retval OT_ERROR_NOT_FOUND Supported channels is empty, therefore could not select a channel.
* @retval OT_ERROR_INVALID_STATE Thread is not enabled or not enough data to select new channel.
- * @retval OT_ERROR_DISABLED_FEATURE `ChannelMonitor` feature is disabled by build-time configuration options.
*
*/
otError RequestChannelSelect(bool aSkipQualityCheck);
diff --git a/src/core/utils/channel_monitor.cpp b/src/core/utils/channel_monitor.cpp
index a8b84ed..d769c02 100644
--- a/src/core/utils/channel_monitor.cpp
+++ b/src/core/utils/channel_monitor.cpp
@@ -119,17 +119,17 @@
void ChannelMonitor::HandleTimer(void)
{
- Get<Mac::Mac>().EnergyScan(mScanChannelMasks[mChannelMaskIndex], 0, &ChannelMonitor::HandleEnergyScanResult);
+ Get<Mac::Mac>().EnergyScan(mScanChannelMasks[mChannelMaskIndex], 0, &ChannelMonitor::HandleEnergyScanResult, this);
mTimer.StartAt(mTimer.GetFireTime(), Random::NonCrypto::AddJitter(kTimerInterval, kMaxJitterInterval));
}
-void ChannelMonitor::HandleEnergyScanResult(Instance &aInstance, otEnergyScanResult *aResult)
+void ChannelMonitor::HandleEnergyScanResult(Mac::EnergyScanResult *aResult, void *aContext)
{
- aInstance.Get<ChannelMonitor>().HandleEnergyScanResult(aResult);
+ static_cast<ChannelMonitor *>(aContext)->HandleEnergyScanResult(aResult);
}
-void ChannelMonitor::HandleEnergyScanResult(otEnergyScanResult *aResult)
+void ChannelMonitor::HandleEnergyScanResult(Mac::EnergyScanResult *aResult)
{
if (aResult == NULL)
{
diff --git a/src/core/utils/channel_monitor.hpp b/src/core/utils/channel_monitor.hpp
index 493a929..750c2d4 100644
--- a/src/core/utils/channel_monitor.hpp
+++ b/src/core/utils/channel_monitor.hpp
@@ -200,8 +200,8 @@
static void HandleTimer(Timer &aTimer);
void HandleTimer(void);
- static void HandleEnergyScanResult(Instance &aInstance, otEnergyScanResult *aResult);
- void HandleEnergyScanResult(otEnergyScanResult *aResult);
+ static void HandleEnergyScanResult(Mac::EnergyScanResult *aResult, void *aContext);
+ void HandleEnergyScanResult(Mac::EnergyScanResult *aResult);
void LogResults(void);
static const uint32_t mScanChannelMasks[kNumChannelMasks];
diff --git a/src/core/utils/child_supervision.cpp b/src/core/utils/child_supervision.cpp
index e25e7f9..5800a02 100644
--- a/src/core/utils/child_supervision.cpp
+++ b/src/core/utils/child_supervision.cpp
@@ -120,7 +120,7 @@
{
VerifyOrExit(mSupervisionInterval != 0);
- for (ChildTable::Iterator iter(GetInstance(), ChildTable::kInStateValid); !iter.IsDone(); iter++)
+ for (ChildTable::Iterator iter(GetInstance(), Child::kInStateValid); !iter.IsDone(); iter++)
{
Child &child = *iter.GetChild();
@@ -147,7 +147,7 @@
// "valid" child in the child table.
shouldRun = ((mSupervisionInterval != 0) && (Get<Mle::MleRouter>().GetRole() != OT_DEVICE_ROLE_DISABLED) &&
- Get<ChildTable>().HasChildren(ChildTable::kInStateValid));
+ Get<ChildTable>().HasChildren(Child::kInStateValid));
if (shouldRun && !mTimer.IsRunning())
{
@@ -209,7 +209,7 @@
// If listener is enabled and device is a child and it received a secure frame from its parent, restart the timer.
VerifyOrExit(mTimer.IsRunning() && aIsSecure && (Get<Mle::MleRouter>().GetRole() == OT_DEVICE_ROLE_CHILD) &&
- (Get<Mle::MleRouter>().GetNeighbor(aSourceAddress) == Get<Mle::MleRouter>().GetParent()));
+ (Get<Mle::MleRouter>().GetNeighbor(aSourceAddress) == &Get<Mle::MleRouter>().GetParent()));
RestartTimer();
@@ -222,7 +222,7 @@
if ((mTimeout != 0) && (Get<Mle::MleRouter>().GetRole() != OT_DEVICE_ROLE_DISABLED) &&
!Get<MeshForwarder>().GetRxOnWhenIdle())
{
- mTimer.Start(TimerMilli::SecToMsec(mTimeout));
+ mTimer.Start(Time::SecToMsec(mTimeout));
}
else
{
diff --git a/src/core/utils/child_supervision.hpp b/src/core/utils/child_supervision.hpp
index 5dd0796..9c6666b 100644
--- a/src/core/utils/child_supervision.hpp
+++ b/src/core/utils/child_supervision.hpp
@@ -43,7 +43,7 @@
#include "common/message.hpp"
#include "common/notifier.hpp"
#include "common/timer.hpp"
-#include "mac/mac_frame.hpp"
+#include "mac/mac_types.hpp"
#include "thread/topology.hpp"
namespace ot {
diff --git a/src/core/utils/jam_detector.cpp b/src/core/utils/jam_detector.cpp
index 545f109..7b31619 100644
--- a/src/core/utils/jam_detector.cpp
+++ b/src/core/utils/jam_detector.cpp
@@ -208,7 +208,7 @@
void JamDetector::UpdateHistory(bool aDidExceedThreshold)
{
- int32_t diff = TimerMilli::Diff(mCurSecondStartTime, TimerMilli::GetNow());
+ uint32_t interval = TimerMilli::GetNow() - mCurSecondStartTime;
// If the RSSI is ever below the threshold, update mAlwaysAboveThreshold
// for current second interval.
@@ -218,7 +218,8 @@
}
// If we reached end of current one second interval, update the history bitmap
- if (diff >= kOneSecondInterval)
+
+ if (interval >= kOneSecondInterval)
{
mHistoryBitmap <<= 1;
@@ -229,7 +230,7 @@
mAlwaysAboveThreshold = true;
- mCurSecondStartTime += (static_cast<uint32_t>(diff) / kOneSecondInterval) * kOneSecondInterval;
+ mCurSecondStartTime += (interval / kOneSecondInterval) * kOneSecondInterval;
UpdateJamState();
}
diff --git a/src/core/utils/jam_detector.hpp b/src/core/utils/jam_detector.hpp
index 987bfc8..a0ce15d 100644
--- a/src/core/utils/jam_detector.hpp
+++ b/src/core/utils/jam_detector.hpp
@@ -198,7 +198,7 @@
Notifier::Callback mNotifierCallback; // Notifier callback
TimerMilli mTimer; // RSSI sample timer
uint64_t mHistoryBitmap; // History bitmap, each bit correspond to 1 sec interval
- uint32_t mCurSecondStartTime; // Start time for current 1 sec interval
+ TimeMilli mCurSecondStartTime; // Start time for current 1 sec interval
uint16_t mSampleInterval; // Current sample interval
uint8_t mWindow : 6; // Window (in sec) to monitor jamming
uint8_t mBusyPeriod : 6; // BusyPeriod (in sec) with mWindow to alert jamming
diff --git a/src/core/utils/missing_strlcat.c b/src/core/utils/missing_strlcat.c
deleted file mode 100644
index 3e38192..0000000
--- a/src/core/utils/missing_strlcat.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * Copyright (c) 2016, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "utils/wrap_string.h"
-
-size_t missing_strlcat(char *dst, const char *src, size_t dstsize)
-{
- size_t len = strlen(dst);
-
- if (len < dstsize - 1)
- {
- return (len + strlcpy(dst + len, src, dstsize - len));
- }
-
- return len + strlen(src);
-}
diff --git a/src/core/utils/missing_strlcpy.c b/src/core/utils/missing_strlcpy.c
deleted file mode 100644
index 66ea1de..0000000
--- a/src/core/utils/missing_strlcpy.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * Copyright (c) 2016, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "utils/wrap_string.h"
-
-size_t missing_strlcpy(char *dst, const char *src, size_t dstsize)
-{
- const size_t slen = strlen(src);
-
- if (dstsize != 0)
- {
- dstsize--;
-
- if (slen < dstsize)
- {
- dstsize = slen;
- }
-
- if (dstsize != 0)
- {
- memcpy(dst, src, dstsize);
- }
-
- dst[dstsize] = 0;
- }
-
- return slen;
-}
diff --git a/src/core/utils/missing_strnlen.c b/src/core/utils/missing_strnlen.c
deleted file mode 100644
index 7245e14..0000000
--- a/src/core/utils/missing_strnlen.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * Copyright (c) 2016, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "utils/wrap_string.h"
-
-size_t missing_strnlen(const char *s, size_t maxlen)
-{
- size_t ret;
-
- for (ret = 0; (ret < maxlen) && (s[ret] != 0); ret++)
- {
- // Empty loop.
- }
-
- return ret;
-}
diff --git a/src/core/utils/slaac_address.cpp b/src/core/utils/slaac_address.cpp
index 2210e27..e86a115 100644
--- a/src/core/utils/slaac_address.cpp
+++ b/src/core/utils/slaac_address.cpp
@@ -33,8 +33,6 @@
#include "slaac_address.hpp"
-#include "utils/wrap_string.h"
-
#include "common/code_utils.hpp"
#include "common/instance.hpp"
#include "common/locator-getters.hpp"
@@ -142,17 +140,17 @@
void Slaac::Update(UpdateMode aMode)
{
- otNetworkDataIterator iterator;
- otBorderRouterConfig config;
- Ip6::NetifUnicastAddress *slaacAddr;
- bool found;
+ NetworkData::Iterator iterator;
+ NetworkData::OnMeshPrefixConfig config;
+ Ip6::NetifUnicastAddress * slaacAddr;
+ bool found;
if (aMode & kModeRemove)
{
// If enabled, remove any SLAAC addresses with no matching on-mesh prefix,
// otherwise (when disabled) remove all previously added SLAAC addresses.
- for (slaacAddr = &mAddresses[0]; slaacAddr < &mAddresses[OT_ARRAY_LENGTH(mAddresses)]; slaacAddr++)
+ for (slaacAddr = &mAddresses[0]; slaacAddr < OT_ARRAY_END(mAddresses); slaacAddr++)
{
if (!slaacAddr->mValid)
{
@@ -163,9 +161,9 @@
if (mEnabled)
{
- iterator = OT_NETWORK_DATA_ITERATOR_INIT;
+ iterator = NetworkData::kIteratorInit;
- while (Get<NetworkData::Leader>().GetNextOnMeshPrefix(&iterator, &config) == OT_ERROR_NONE)
+ while (Get<NetworkData::Leader>().GetNextOnMeshPrefix(iterator, config) == OT_ERROR_NONE)
{
otIp6Prefix &prefix = config.mPrefix;
@@ -192,9 +190,9 @@
{
// Generate and add SLAAC addresses for any newly added on-mesh prefixes.
- iterator = OT_NETWORK_DATA_ITERATOR_INIT;
+ iterator = NetworkData::kIteratorInit;
- while (Get<NetworkData::Leader>().GetNextOnMeshPrefix(&iterator, &config) == OT_ERROR_NONE)
+ while (Get<NetworkData::Leader>().GetNextOnMeshPrefix(iterator, config) == OT_ERROR_NONE)
{
otIp6Prefix &prefix = config.mPrefix;
@@ -220,14 +218,14 @@
{
bool added = false;
- for (slaacAddr = &mAddresses[0]; slaacAddr < &mAddresses[OT_ARRAY_LENGTH(mAddresses)]; slaacAddr++)
+ for (slaacAddr = &mAddresses[0]; slaacAddr < OT_ARRAY_END(mAddresses); slaacAddr++)
{
if (slaacAddr->mValid)
{
continue;
}
- memset(slaacAddr, 0, sizeof(*slaacAddr));
+ slaacAddr->Clear();
memcpy(&slaacAddr->mAddress, &prefix.mPrefix, BitVectorBytes(prefix.mLength));
slaacAddr->mPrefixLength = prefix.mLength;
diff --git a/src/core/utils/wrap_stdbool.h b/src/core/utils/wrap_stdbool.h
deleted file mode 100644
index 8317f85..0000000
--- a/src/core/utils/wrap_stdbool.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * Copyright (c) 2017, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * @file
- * This file is a wrapper for the standard "string.h" file
- * The purpose is add any missing function prototypes not
- * provided by a specific compiler.
- */
-
-#if !defined(WRAP_STDBOOL_H)
-#define WRAP_STDBOOL_H
-
-#include "openthread-core-config.h"
-
-#if HAVE_STDBOOL_H
-#include <stdbool.h>
-#else
-
-/* Supply our own */
-#if __cplusplus
-/* c++ has a built in bool */
-#else
-
-#if !defined(__bool_true_false_are_defined)
-#define __bool_true_false_are_defined 1
-#define false 0
-#define true 1
-
-typedef _Bool bool;
-
-#endif // bool defined
-
-#endif // __cplusplus
-
-#endif // HAVE_STDBOOL_H
-
-#endif // WRAP_STDBOOL_H
diff --git a/src/core/utils/wrap_stdint.h b/src/core/utils/wrap_stdint.h
deleted file mode 100644
index 102adfc..0000000
--- a/src/core/utils/wrap_stdint.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Copyright (c) 2016, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-#if !defined(WRAP_STDINT_H)
-#define WRAP_STDINT_H
-
-#include "openthread-core-config.h"
-
-/* use the compiler supplied solution */
-#include <stdint.h>
-
-#endif // WRAP_STDINT_H
diff --git a/src/core/utils/wrap_string.h b/src/core/utils/wrap_string.h
index c1d0470..915b618 100644
--- a/src/core/utils/wrap_string.h
+++ b/src/core/utils/wrap_string.h
@@ -49,25 +49,6 @@
/* Prototypes for our missing function replacements */
-/* See: https://www.freebsd.org/cgi/man.cgi?query=strlcpy */
-WRAP_EXTERN_C size_t missing_strlcpy(char *dst, const char *src, size_t dstsize);
-/* See: https://www.freebsd.org/cgi/man.cgi?query=strlcat */
-WRAP_EXTERN_C size_t missing_strlcat(char *dst, const char *src, size_t dstsize);
-/* See: https://www.freebsd.org/cgi/man.cgi?query=strnlen */
-WRAP_EXTERN_C size_t missing_strnlen(const char *s, size_t maxlen);
-
#undef WRAP_EXTERN_C
-#if (!HAVE_STRNLEN)
-#define strnlen(S, N) missing_strnlen(S, N)
-#endif
-
-#if (!HAVE_STRLCPY)
-#define strlcpy(D, S, N) missing_strlcpy(D, S, N)
-#endif
-
-#if (!HAVE_STRLCAT)
-#define strlcat(D, S, N) missing_strlcat(D, S, N)
-#endif
-
#endif // WRAP_STRING_H
diff --git a/src/ncp/CMakeLists.txt b/src/ncp/CMakeLists.txt
new file mode 100644
index 0000000..e45ffb0
--- /dev/null
+++ b/src/ncp/CMakeLists.txt
@@ -0,0 +1,79 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+add_library(openthread-ncp-ftd)
+add_library(openthread-ncp-mtd)
+add_library(openthread-rcp)
+
+target_compile_definitions(openthread-ncp-ftd PRIVATE
+ ${OT_PRIVATE_DEFINES}
+ OPENTHREAD_FTD=1
+ OPENTHREAD_CONFIG_NCP_UART_ENABLE=1
+)
+
+target_compile_definitions(openthread-ncp-mtd PRIVATE
+ ${OT_PRIVATE_DEFINES}
+ OPENTHREAD_MTD=1
+ OPENTHREAD_CONFIG_NCP_UART_ENABLE=1
+)
+
+target_compile_definitions(openthread-rcp PRIVATE
+ ${OT_PRIVATE_DEFINES}
+ OPENTHREAD_RADIO=1
+ OPENTHREAD_CONFIG_NCP_UART_ENABLE=1
+)
+
+set(COMMON_INCLUDES
+ ${OT_PRIVATE_INCLUDES}
+ ${PROJECT_SOURCE_DIR}/src
+ ${PROJECT_SOURCE_DIR}/src/core
+)
+
+set(COMMON_SOURCES
+ changed_props_set.cpp
+ hdlc.cpp
+ ncp_base.cpp
+ ncp_base_ftd.cpp
+ ncp_base_mtd.cpp
+ ncp_base_radio.cpp
+ ncp_base_dispatcher.cpp
+ ncp_buffer.cpp
+ ncp_spi.cpp
+ ncp_uart.cpp
+ spinel.c
+ spinel_decoder.cpp
+ spinel_encoder.cpp
+)
+
+target_include_directories(openthread-ncp-ftd PUBLIC ${OT_PUBLIC_INCLUDES} PRIVATE ${COMMON_INCLUDES})
+target_include_directories(openthread-ncp-mtd PUBLIC ${OT_PUBLIC_INCLUDES} PRIVATE ${COMMON_INCLUDES})
+target_include_directories(openthread-rcp PUBLIC ${OT_PUBLIC_INCLUDES} PRIVATE ${COMMON_INCLUDES})
+
+target_sources(openthread-ncp-ftd PRIVATE ${COMMON_SOURCES})
+target_sources(openthread-ncp-mtd PRIVATE ${COMMON_SOURCES})
+target_sources(openthread-rcp PRIVATE ${COMMON_SOURCES})
diff --git a/src/ncp/Makefile.am b/src/ncp/Makefile.am
index 0831f82..24e301b 100644
--- a/src/ncp/Makefile.am
+++ b/src/ncp/Makefile.am
@@ -59,17 +59,23 @@
$(NULL)
libopenthread_ncp_mtd_a_CPPFLAGS = \
+ -DOPENTHREAD_RADIO=0 \
+ -DOPENTHREAD_FTD=0 \
-DOPENTHREAD_MTD=1 \
$(COMMON_CPPFLAGS) \
$(NULL)
libopenthread_ncp_ftd_a_CPPFLAGS = \
+ -DOPENTHREAD_RADIO=0 \
-DOPENTHREAD_FTD=1 \
+ -DOPENTHREAD_MTD=0 \
$(COMMON_CPPFLAGS) \
$(NULL)
libopenthread_rcp_a_CPPFLAGS = \
-DOPENTHREAD_RADIO=1 \
+ -DOPENTHREAD_FTD=0 \
+ -DOPENTHREAD_MTD=0 \
$(COMMON_CPPFLAGS) \
$(NULL)
diff --git a/src/ncp/example_vendor_hook.cpp b/src/ncp/example_vendor_hook.cpp
index db0ae61..948c8f1 100644
--- a/src/ncp/example_vendor_hook.cpp
+++ b/src/ncp/example_vendor_hook.cpp
@@ -47,7 +47,7 @@
// TODO: Implement your command handlers here.
default:
- error = SendLastStatus(aHeader, SPINEL_STATUS_INVALID_COMMAND);
+ error = PrepareLastStatusResponse(aHeader, SPINEL_STATUS_INVALID_COMMAND);
}
return error;
@@ -119,4 +119,40 @@
} // namespace Ncp
} // namespace ot
-#endif
+//-------------------------------------------------------------------------------------------------------------------
+// When OPENTHREAD_ENABLE_NCP_VENDOR_HOOK is enabled, vendor code is
+// expected to provide the `otNcpInit()` function. The reason behind
+// this is to enable vendor code to define its own sub-class of
+// `NcpBase` or `NcpUart`/`NcpSpi`.
+//
+// Example below show how to add a vendor sub-class over `NcpUart`.
+
+#include "ncp_uart.hpp"
+#include "common/new.hpp"
+
+class NcpVendorUart : public ot::Ncp::NcpUart
+{
+public:
+ NcpVendorUart(ot::Instance *aInstance)
+ : ot::Ncp::NcpUart(aInstance)
+ {}
+
+ // Add public/private methods or member variables
+};
+
+static OT_DEFINE_ALIGNED_VAR(sNcpVendorRaw, sizeof(NcpVendorUart), uint64_t);
+
+extern "C" void otNcpInit(otInstance *aInstance)
+{
+ NcpVendorUart *ncpVendor = NULL;
+ ot::Instance * instance = static_cast<ot::Instance *>(aInstance);
+
+ ncpVendor = new (&sNcpVendorRaw) NcpVendorUart(instance);
+
+ if (ncpVendor == NULL || ncpVendor != ot::Ncp::NcpBase::GetNcpInstance())
+ {
+ assert(false);
+ }
+}
+
+#endif // #if OPENTHREAD_ENABLE_NCP_VENDOR_HOOK
diff --git a/src/ncp/hdlc.hpp b/src/ncp/hdlc.hpp
index c1f03c2..9e88af2 100644
--- a/src/ncp/hdlc.hpp
+++ b/src/ncp/hdlc.hpp
@@ -42,7 +42,6 @@
#include "common/code_utils.hpp"
#include "common/debug.hpp"
#include "common/encoding.hpp"
-#include "utils/wrap_string.h"
namespace ot {
diff --git a/src/ncp/ncp_base.cpp b/src/ncp/ncp_base.cpp
index 42bdd7d..bb91b56 100644
--- a/src/ncp/ncp_base.cpp
+++ b/src/ncp/ncp_base.cpp
@@ -132,10 +132,6 @@
ret = SPINEL_STATUS_ITEM_NOT_FOUND;
break;
- case OT_ERROR_DISABLED_FEATURE:
- ret = SPINEL_STATUS_INVALID_COMMAND_FOR_PROP;
- break;
-
default:
// Unknown error code. Wrap it as a Spinel status and return that.
ret = static_cast<spinel_status_t>(SPINEL_STATUS_STACK_NATIVE__BEGIN + static_cast<uint32_t>(aError));
@@ -252,6 +248,7 @@
, mRxSpinelOutOfOrderTidCounter(0)
, mTxSpinelFrameCounter(0)
, mDidInitialUpdates(false)
+ , mLogTimestampBase(0)
{
assert(mInstance != NULL);
@@ -300,6 +297,23 @@
return sNcpInstance;
}
+void NcpBase::ResetCounters(void)
+{
+ mFramingErrorCounter = 0;
+ mRxSpinelFrameCounter = 0;
+ mRxSpinelOutOfOrderTidCounter = 0;
+ mTxSpinelFrameCounter = 0;
+
+#if OPENTHREAD_MTD || OPENTHREAD_FTD
+ mInboundSecureIpFrameCounter = 0;
+ mInboundInsecureIpFrameCounter = 0;
+ mOutboundSecureIpFrameCounter = 0;
+ mOutboundInsecureIpFrameCounter = 0;
+ mDroppedOutboundIpFrameCounter = 0;
+ mDroppedInboundIpFrameCounter = 0;
+#endif
+}
+
// ----------------------------------------------------------------------------
// MARK: Serial Traffic Glue
// ----------------------------------------------------------------------------
@@ -617,6 +631,7 @@
SuccessOrExit(error = mEncoder.WriteUtf8(aLogString));
SuccessOrExit(error = mEncoder.WriteUint8(ConvertLogLevel(aLogLevel)));
SuccessOrExit(error = mEncoder.WriteUintPacked(ConvertLogRegion(aLogRegion)));
+ SuccessOrExit(error = mEncoder.WriteUint64(mLogTimestampBase + otPlatAlarmMilliGetNow()));
SuccessOrExit(error = mEncoder.EndFrame());
exit:
@@ -869,16 +884,13 @@
#if OPENTHREAD_MTD || OPENTHREAD_FTD
case SPINEL_CMD_NET_SAVE:
- error = CommandHandler_NET_SAVE(aHeader);
+ case SPINEL_CMD_NET_RECALL:
+ error = OT_ERROR_NOT_IMPLEMENTED;
break;
case SPINEL_CMD_NET_CLEAR:
error = CommandHandler_NET_CLEAR(aHeader);
break;
-
- case SPINEL_CMD_NET_RECALL:
- error = CommandHandler_NET_RECALL(aHeader);
- break;
#endif // OPENTHREAD_MTD || OPENTHREAD_FTD
default:
@@ -923,6 +935,9 @@
#endif
#if OPENTHREAD_FTD && OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
+ case SPINEL_PROP_MESHCOP_COMMISSIONER_GENERATE_PSKC:
+ ExitNow(aError = HandlePropertySet_SPINEL_PROP_MESHCOP_COMMISSIONER_GENERATE_PSKC(aHeader));
+
case SPINEL_PROP_THREAD_COMMISSIONER_ENABLED:
ExitNow(aError = HandlePropertySet_SPINEL_PROP_THREAD_COMMISSIONER_ENABLED(aHeader));
#endif
@@ -1793,9 +1808,7 @@
SuccessOrExit(error = mEncoder.WriteUintPacked(SPINEL_CAP_TIME_SYNC));
#endif
-#if OPENTHREAD_CONFIG_ENABLE_TX_ERROR_RATE_TRACKING
SuccessOrExit(error = mEncoder.WriteUintPacked(SPINEL_CAP_ERROR_RATE_TRACKING));
-#endif
#if OPENTHREAD_CONFIG_MLE_STEERING_DATA_SET_OOB_ENABLE
SuccessOrExit(error = mEncoder.WriteUintPacked(SPINEL_CAP_OOB_STEERING_DATA));
@@ -1805,6 +1818,14 @@
SuccessOrExit(error = mEncoder.WriteUintPacked(SPINEL_CAP_SLAAC));
#endif
+#if OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE
+ SuccessOrExit(error = mEncoder.WriteUintPacked(SPINEL_CAP_RADIO_COEX));
+#endif
+
+#if OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_ENABLE
+ SuccessOrExit(error = mEncoder.WriteUintPacked(SPINEL_CAP_MAC_RETRY_HISTOGRAM));
+#endif
+
#if OPENTHREAD_CONFIG_NCP_ENABLE_PEEK_POKE
SuccessOrExit(error = mEncoder.WriteUintPacked(SPINEL_CAP_PEEK_POKE));
#endif
@@ -1939,11 +1960,6 @@
return mEncoder.WriteUint8(SPINEL_MCU_POWER_STATE_ON);
}
-template <> otError NcpBase::HandlePropertySet<SPINEL_PROP_MCU_POWER_STATE>(void)
-{
- return OT_ERROR_DISABLED_FEATURE;
-}
-
#endif // OPENTHREAD_CONFIG_NCP_ENABLE_MCU_POWER_STATE_CONTROL
template <> otError NcpBase::HandlePropertyGet<SPINEL_PROP_POWER_STATE>(void)
@@ -2079,6 +2095,58 @@
return mEncoder.WriteInt8(otPlatRadioGetReceiveSensitivity(mInstance));
}
+template <> otError NcpBase::HandlePropertyGet<SPINEL_PROP_PHY_FREQ>(void)
+{
+ uint32_t freq_khz(0);
+ const uint8_t chan(otLinkGetChannel(mInstance));
+
+ if (chan == 0)
+ {
+ freq_khz = 868300;
+ }
+ else if (chan < 11)
+ {
+ freq_khz = 906000 - (2000 * 1) + 2000 * (chan);
+ }
+ else if (chan < 26)
+ {
+ freq_khz = 2405000 - (5000 * 11) + 5000 * (chan);
+ }
+
+ return mEncoder.WriteUint32(freq_khz);
+}
+
+template <> otError NcpBase::HandlePropertyGet<SPINEL_PROP_PHY_CCA_THRESHOLD>(void)
+{
+ int8_t threshold;
+ otError error = OT_ERROR_NONE;
+
+ error = otPlatRadioGetCcaEnergyDetectThreshold(mInstance, &threshold);
+
+ if (error == OT_ERROR_NONE)
+ {
+ error = mEncoder.WriteInt8(threshold);
+ }
+ else
+ {
+ error = mEncoder.OverwriteWithLastStatusError(ThreadErrorToSpinelStatus(error));
+ }
+
+ return error;
+}
+
+template <> otError NcpBase::HandlePropertySet<SPINEL_PROP_PHY_CCA_THRESHOLD>(void)
+{
+ int8_t threshold = 0;
+ otError error = OT_ERROR_NONE;
+
+ SuccessOrExit(error = mDecoder.ReadInt8(threshold));
+ error = otPlatRadioSetCcaEnergyDetectThreshold(mInstance, threshold);
+
+exit:
+ return error;
+}
+
template <> otError NcpBase::HandlePropertyGet<SPINEL_PROP_PHY_TX_POWER>(void)
{
int8_t power;
@@ -2139,11 +2207,12 @@
return mEncoder.WriteUint8(ConvertLogLevel(otLoggingGetLevel()));
}
+#if OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE
template <> otError NcpBase::HandlePropertySet<SPINEL_PROP_DEBUG_NCP_LOG_LEVEL>(void)
{
+ otError error;
uint8_t spinelNcpLogLevel = 0;
otLogLevel logLevel;
- otError error = OT_ERROR_NONE;
SuccessOrExit(error = mDecoder.ReadUint8(spinelNcpLogLevel));
@@ -2180,11 +2249,32 @@
break;
}
- error = otLoggingSetLevel(logLevel);
+ otLoggingSetLevel(logLevel);
exit:
return error;
}
+#endif // OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE
+
+template <> otError NcpBase::HandlePropertySet<SPINEL_PROP_DEBUG_LOG_TIMESTAMP_BASE>(void)
+{
+ uint64_t timestampBase = 0;
+ otError error = OT_ERROR_NONE;
+ uint32_t currentTime = otPlatAlarmMilliGetNow();
+
+ SuccessOrExit(error = mDecoder.ReadUint64(timestampBase));
+ VerifyOrExit(timestampBase >= currentTime, error = OT_ERROR_INVALID_ARGS);
+
+ mLogTimestampBase = timestampBase - currentTime;
+
+exit:
+ return error;
+}
+
+template <> otError NcpBase::HandlePropertyGet<SPINEL_PROP_DEBUG_LOG_TIMESTAMP_BASE>(void)
+{
+ return mEncoder.WriteUint64(mLogTimestampBase);
+}
template <> otError NcpBase::HandlePropertyGet<SPINEL_PROP_PHY_CHAN_SUPPORTED>(void)
{
@@ -2200,7 +2290,24 @@
return EncodeChannelMask(otPlatRadioGetPreferredChannelMask(mInstance));
}
-#if OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_METRICS_ENABLE
+#if OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE
+template <> otError NcpBase::HandlePropertySet<SPINEL_PROP_RADIO_COEX_ENABLE>(void)
+{
+ bool enabled;
+ otError error = OT_ERROR_NONE;
+
+ SuccessOrExit(error = mDecoder.ReadBool(enabled));
+ error = otPlatRadioSetCoexEnabled(mInstance, enabled);
+
+exit:
+ return error;
+}
+
+template <> otError NcpBase::HandlePropertyGet<SPINEL_PROP_RADIO_COEX_ENABLE>(void)
+{
+ return mEncoder.WriteBool(otPlatRadioIsCoexEnabled(mInstance));
+}
+
template <> otError NcpBase::HandlePropertyGet<SPINEL_PROP_RADIO_COEX_METRICS>(void)
{
otRadioCoexMetrics coexMetrics;
@@ -2208,7 +2315,7 @@
if (error != OT_ERROR_NONE)
{
- error = mEncoder.OverwriteWithLastStatusError(SPINEL_STATUS_INVALID_COMMAND_FOR_PROP);
+ error = mEncoder.OverwriteWithLastStatusError(ThreadErrorToSpinelStatus(error));
ExitNow();
}
@@ -2253,28 +2360,18 @@
// MARK: Peek/Poke delegate API
// ----------------------------------------------------------------------------
-otError otNcpRegisterPeekPokeDelagates(otNcpDelegateAllowPeekPoke aAllowPeekDelegate,
- otNcpDelegateAllowPeekPoke aAllowPokeDelegate)
-{
- OT_UNUSED_VARIABLE(aAllowPeekDelegate);
- OT_UNUSED_VARIABLE(aAllowPokeDelegate);
-
- otError error = OT_ERROR_NONE;
-
#if OPENTHREAD_CONFIG_NCP_ENABLE_PEEK_POKE
+void otNcpRegisterPeekPokeDelagates(otNcpDelegateAllowPeekPoke aAllowPeekDelegate,
+ otNcpDelegateAllowPeekPoke aAllowPokeDelegate)
+{
ot::Ncp::NcpBase *ncp = ot::Ncp::NcpBase::GetNcpInstance();
if (ncp != NULL)
{
ncp->RegisterPeekPokeDelagates(aAllowPeekDelegate, aAllowPokeDelegate);
}
-#else
- error = OT_ERROR_DISABLED_FEATURE;
-
-#endif // OPENTHREAD_CONFIG_NCP_ENABLE_PEEK_POKE
-
- return error;
}
+#endif // OPENTHREAD_CONFIG_NCP_ENABLE_PEEK_POKE
// ----------------------------------------------------------------------------
// MARK: Virtual Datastream I/O (Public API)
diff --git a/src/ncp/ncp_base.hpp b/src/ncp/ncp_base.hpp
index f640c21..b6bd875 100644
--- a/src/ncp/ncp_base.hpp
+++ b/src/ncp/ncp_base.hpp
@@ -121,9 +121,6 @@
* @param[in] aAllowPeekDelegate Delegate function pointer for peek operation.
* @param[in] aAllowPokeDelegate Delegate function pointer for poke operation.
*
- * @retval OT_ERROR_NONE Successfully registered delegate functions.
- * @retval OT_ERROR_DISABLED_FEATURE Peek/Poke feature is disabled (by a build-time configuration option).
- *
*/
void RegisterPeekPokeDelagates(otNcpDelegateAllowPeekPoke aAllowPeekDelegate,
otNcpDelegateAllowPeekPoke aAllowPokeDelegate);
@@ -205,14 +202,27 @@
uint32_t mPropKeyOrStatus : 24; ///< 3 bytes for either property key or spinel status.
};
+ struct HandlerEntry
+ {
+ spinel_prop_key_t mKey;
+ NcpBase::PropertyHandler mHandler;
+ };
+
NcpFrameBuffer::FrameTag GetLastOutboundFrameTag(void);
otError HandleCommand(uint8_t aHeader);
- PropertyHandler FindGetPropertyHandler(spinel_prop_key_t aKey);
- PropertyHandler FindSetPropertyHandler(spinel_prop_key_t aKey);
- PropertyHandler FindInsertPropertyHandler(spinel_prop_key_t aKey);
- PropertyHandler FindRemovePropertyHandler(spinel_prop_key_t aKey);
+#if __cplusplus >= 201103L
+ static constexpr bool AreHandlerEntriesSorted(const HandlerEntry *aHandlerEntries, size_t aSize);
+#endif
+
+ static PropertyHandler FindPropertyHandler(const HandlerEntry *aHandlerEntries,
+ size_t aSize,
+ spinel_prop_key_t aKey);
+ static PropertyHandler FindGetPropertyHandler(spinel_prop_key_t aKey);
+ static PropertyHandler FindSetPropertyHandler(spinel_prop_key_t aKey);
+ static PropertyHandler FindInsertPropertyHandler(spinel_prop_key_t aKey);
+ static PropertyHandler FindRemovePropertyHandler(spinel_prop_key_t aKey);
bool HandlePropertySetForSpecialProperties(uint8_t aHeader, spinel_prop_key_t aKey, otError &aError);
otError HandleCommandPropertySet(uint8_t aHeader, spinel_prop_key_t aKey);
@@ -355,9 +365,7 @@
otError CommandHandler_POKE(uint8_t aHeader);
#endif
#if OPENTHREAD_MTD || OPENTHREAD_FTD
- otError CommandHandler_NET_SAVE(uint8_t aHeader);
otError CommandHandler_NET_CLEAR(uint8_t aHeader);
- otError CommandHandler_NET_RECALL(uint8_t aHeader);
#endif
// ----------------------------------------------------------------------------
@@ -416,6 +424,7 @@
#endif
#if OPENTHREAD_FTD && OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
+ otError HandlePropertySet_SPINEL_PROP_MESHCOP_COMMISSIONER_GENERATE_PSKC(uint8_t aHeader);
otError HandlePropertySet_SPINEL_PROP_THREAD_COMMISSIONER_ENABLED(uint8_t aHeader);
#endif // OPENTHREAD_FTD
@@ -424,6 +433,8 @@
otError HandlePropertySet_SPINEL_PROP_STREAM_RAW(uint8_t aHeader);
#endif
+ void ResetCounters(void);
+
#if OPENTHREAD_CONFIG_LEGACY_ENABLE
void StartLegacy(void);
void StopLegacy(void);
@@ -595,6 +606,8 @@
uint32_t mTxSpinelFrameCounter; // Number of sent (outbound) spinel frames.
bool mDidInitialUpdates;
+
+ uint64_t mLogTimestampBase; // Timestamp base used for logging
};
} // namespace Ncp
diff --git a/src/ncp/ncp_base_dispatcher.cpp b/src/ncp/ncp_base_dispatcher.cpp
index 7eb7041..b5ccb44 100644
--- a/src/ncp/ncp_base_dispatcher.cpp
+++ b/src/ncp/ncp_base_dispatcher.cpp
@@ -35,1156 +35,617 @@
namespace ot {
namespace Ncp {
+#if __cplusplus >= 201103L
+constexpr bool NcpBase::AreHandlerEntriesSorted(const HandlerEntry *aHandlerEntries, size_t aSize)
+{
+ return aSize < 2 ? true
+ : ((aHandlerEntries[aSize - 1].mKey > aHandlerEntries[aSize - 2].mKey) &&
+ AreHandlerEntriesSorted(aHandlerEntries, aSize - 1));
+}
+
+#define OT_NCP_CONST constexpr
+#else
+#define OT_NCP_CONST const
+#endif
+
NcpBase::PropertyHandler NcpBase::FindGetPropertyHandler(spinel_prop_key_t aKey)
{
- NcpBase::PropertyHandler handler;
+#define OT_NCP_GET_HANDLER_ENTRY(aPropertyName) {aPropertyName, &NcpBase::HandlePropertyGet<aPropertyName>}
- switch (aKey)
- {
- // --------------------------------------------------------------------------
- // Common Properties (Get Handler)
-
- case SPINEL_PROP_CAPS:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CAPS>;
- break;
- case SPINEL_PROP_DEBUG_TEST_ASSERT:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_DEBUG_TEST_ASSERT>;
- break;
- case SPINEL_PROP_DEBUG_TEST_WATCHDOG:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_DEBUG_TEST_WATCHDOG>;
- break;
- case SPINEL_PROP_DEBUG_NCP_LOG_LEVEL:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_DEBUG_NCP_LOG_LEVEL>;
- break;
- case SPINEL_PROP_HWADDR:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_HWADDR>;
- break;
- case SPINEL_PROP_HOST_POWER_STATE:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_HOST_POWER_STATE>;
- break;
- case SPINEL_PROP_INTERFACE_COUNT:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_INTERFACE_COUNT>;
- break;
- case SPINEL_PROP_INTERFACE_TYPE:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_INTERFACE_TYPE>;
- break;
- case SPINEL_PROP_LAST_STATUS:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_LAST_STATUS>;
- break;
- case SPINEL_PROP_LOCK:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_LOCK>;
- break;
- case SPINEL_PROP_PHY_ENABLED:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_PHY_ENABLED>;
- break;
- case SPINEL_PROP_PHY_CHAN:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_PHY_CHAN>;
- break;
- case SPINEL_PROP_PHY_RSSI:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_PHY_RSSI>;
- break;
- case SPINEL_PROP_PHY_RX_SENSITIVITY:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_PHY_RX_SENSITIVITY>;
- break;
- case SPINEL_PROP_PHY_TX_POWER:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_PHY_TX_POWER>;
- break;
- case SPINEL_PROP_POWER_STATE:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_POWER_STATE>;
- break;
- case SPINEL_PROP_MCU_POWER_STATE:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_MCU_POWER_STATE>;
- break;
- case SPINEL_PROP_PROTOCOL_VERSION:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_PROTOCOL_VERSION>;
- break;
- case SPINEL_PROP_MAC_15_4_PANID:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_MAC_15_4_PANID>;
- break;
- case SPINEL_PROP_MAC_15_4_LADDR:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_MAC_15_4_LADDR>;
- break;
- case SPINEL_PROP_MAC_15_4_SADDR:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_MAC_15_4_SADDR>;
- break;
- case SPINEL_PROP_MAC_RAW_STREAM_ENABLED:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_MAC_RAW_STREAM_ENABLED>;
- break;
- case SPINEL_PROP_MAC_PROMISCUOUS_MODE:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_MAC_PROMISCUOUS_MODE>;
- break;
- case SPINEL_PROP_MAC_SCAN_STATE:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_MAC_SCAN_STATE>;
- break;
- case SPINEL_PROP_MAC_SCAN_MASK:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_MAC_SCAN_MASK>;
- break;
- case SPINEL_PROP_MAC_SCAN_PERIOD:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_MAC_SCAN_PERIOD>;
- break;
- case SPINEL_PROP_NCP_VERSION:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_NCP_VERSION>;
- break;
- case SPINEL_PROP_UNSOL_UPDATE_FILTER:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_UNSOL_UPDATE_FILTER>;
- break;
- case SPINEL_PROP_UNSOL_UPDATE_LIST:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_UNSOL_UPDATE_LIST>;
- break;
- case SPINEL_PROP_VENDOR_ID:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_VENDOR_ID>;
- break;
- case SPINEL_PROP_PHY_CHAN_SUPPORTED:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_PHY_CHAN_SUPPORTED>;
- break;
- case SPINEL_PROP_PHY_CHAN_PREFERRED:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_PHY_CHAN_PREFERRED>;
- break;
-#if OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_METRICS_ENABLE
- case SPINEL_PROP_RADIO_COEX_METRICS:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_RADIO_COEX_METRICS>;
- break;
-#endif
-
- // --------------------------------------------------------------------------
- // MTD (or FTD) Properties (Get Handler)
-
+ OT_NCP_CONST static HandlerEntry sHandlerEntries[] = {
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_LAST_STATUS),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_PROTOCOL_VERSION),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_NCP_VERSION),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_INTERFACE_TYPE),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_VENDOR_ID),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CAPS),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_INTERFACE_COUNT),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_POWER_STATE),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_HWADDR),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_LOCK),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_HOST_POWER_STATE),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_MCU_POWER_STATE),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_PHY_ENABLED),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_PHY_CHAN),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_PHY_CHAN_SUPPORTED),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_PHY_FREQ),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_PHY_CCA_THRESHOLD),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_PHY_TX_POWER),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_PHY_RSSI),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_PHY_RX_SENSITIVITY),
#if OPENTHREAD_MTD || OPENTHREAD_FTD
- case SPINEL_PROP_PHY_PCAP_ENABLED:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_PHY_PCAP_ENABLED>;
- break;
- case SPINEL_PROP_MAC_DATA_POLL_PERIOD:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_MAC_DATA_POLL_PERIOD>;
- break;
- case SPINEL_PROP_MAC_EXTENDED_ADDR:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_MAC_EXTENDED_ADDR>;
- break;
- case SPINEL_PROP_MAC_CCA_FAILURE_RATE:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_MAC_CCA_FAILURE_RATE>;
- break;
-#if OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
- case SPINEL_PROP_MAC_BLACKLIST:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_MAC_BLACKLIST>;
- break;
- case SPINEL_PROP_MAC_BLACKLIST_ENABLED:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_MAC_BLACKLIST_ENABLED>;
- break;
- case SPINEL_PROP_MAC_FIXED_RSS:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_MAC_FIXED_RSS>;
- break;
- case SPINEL_PROP_MAC_WHITELIST:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_MAC_WHITELIST>;
- break;
- case SPINEL_PROP_MAC_WHITELIST_ENABLED:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_MAC_WHITELIST_ENABLED>;
- break;
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_PHY_PCAP_ENABLED),
#endif
- case SPINEL_PROP_MSG_BUFFER_COUNTERS:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_MSG_BUFFER_COUNTERS>;
- break;
- case SPINEL_PROP_PHY_FREQ:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_PHY_FREQ>;
- break;
- case SPINEL_PROP_NET_IF_UP:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_NET_IF_UP>;
- break;
- case SPINEL_PROP_NET_KEY_SEQUENCE_COUNTER:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_NET_KEY_SEQUENCE_COUNTER>;
- break;
- case SPINEL_PROP_NET_KEY_SWITCH_GUARDTIME:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_NET_KEY_SWITCH_GUARDTIME>;
- break;
- case SPINEL_PROP_NET_MASTER_KEY:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_NET_MASTER_KEY>;
- break;
- case SPINEL_PROP_NET_NETWORK_NAME:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_NET_NETWORK_NAME>;
- break;
- case SPINEL_PROP_NET_PARTITION_ID:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_NET_PARTITION_ID>;
- break;
- case SPINEL_PROP_NET_REQUIRE_JOIN_EXISTING:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_NET_REQUIRE_JOIN_EXISTING>;
- break;
- case SPINEL_PROP_NET_ROLE:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_NET_ROLE>;
- break;
- case SPINEL_PROP_NET_SAVED:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_NET_SAVED>;
- break;
- case SPINEL_PROP_NET_STACK_UP:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_NET_STACK_UP>;
- break;
- case SPINEL_PROP_NET_XPANID:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_NET_XPANID>;
- break;
- case SPINEL_PROP_THREAD_ALLOW_LOCAL_NET_DATA_CHANGE:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_ALLOW_LOCAL_NET_DATA_CHANGE>;
- break;
- case SPINEL_PROP_THREAD_ASSISTING_PORTS:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_ASSISTING_PORTS>;
- break;
- case SPINEL_PROP_THREAD_CHILD_TIMEOUT:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_CHILD_TIMEOUT>;
- break;
- case SPINEL_PROP_THREAD_DISCOVERY_SCAN_JOINER_FLAG:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_DISCOVERY_SCAN_JOINER_FLAG>;
- break;
- case SPINEL_PROP_THREAD_DISCOVERY_SCAN_ENABLE_FILTERING:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_DISCOVERY_SCAN_ENABLE_FILTERING>;
- break;
- case SPINEL_PROP_THREAD_DISCOVERY_SCAN_PANID:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_DISCOVERY_SCAN_PANID>;
- break;
- case SPINEL_PROP_THREAD_LEADER_ADDR:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_LEADER_ADDR>;
- break;
- case SPINEL_PROP_THREAD_LEADER_NETWORK_DATA:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_LEADER_NETWORK_DATA>;
- break;
- case SPINEL_PROP_THREAD_LEADER_RID:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_LEADER_RID>;
- break;
- case SPINEL_PROP_THREAD_MODE:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_MODE>;
- break;
- case SPINEL_PROP_THREAD_NEIGHBOR_TABLE:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_NEIGHBOR_TABLE>;
- break;
-#if OPENTHREAD_CONFIG_ENABLE_TX_ERROR_RATE_TRACKING
- case SPINEL_PROP_THREAD_NEIGHBOR_TABLE_ERROR_RATES:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_NEIGHBOR_TABLE_ERROR_RATES>;
- break;
-#endif
- case SPINEL_PROP_THREAD_NETWORK_DATA_VERSION:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_NETWORK_DATA_VERSION>;
- break;
- case SPINEL_PROP_THREAD_OFF_MESH_ROUTES:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_OFF_MESH_ROUTES>;
- break;
- case SPINEL_PROP_THREAD_ON_MESH_NETS:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_ON_MESH_NETS>;
- break;
- case SPINEL_PROP_THREAD_PARENT:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_PARENT>;
- break;
- case SPINEL_PROP_THREAD_RLOC16:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_RLOC16>;
- break;
- case SPINEL_PROP_THREAD_RLOC16_DEBUG_PASSTHRU:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_RLOC16_DEBUG_PASSTHRU>;
- break;
- case SPINEL_PROP_THREAD_STABLE_LEADER_NETWORK_DATA:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_STABLE_LEADER_NETWORK_DATA>;
- break;
- case SPINEL_PROP_THREAD_STABLE_NETWORK_DATA_VERSION:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_STABLE_NETWORK_DATA_VERSION>;
- break;
-#if OPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE
- case SPINEL_PROP_THREAD_NETWORK_DATA:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_NETWORK_DATA>;
- break;
- case SPINEL_PROP_THREAD_STABLE_NETWORK_DATA:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_STABLE_NETWORK_DATA>;
- break;
-#endif
- case SPINEL_PROP_THREAD_ACTIVE_DATASET:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_ACTIVE_DATASET>;
- break;
- case SPINEL_PROP_THREAD_PENDING_DATASET:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_PENDING_DATASET>;
- break;
- case SPINEL_PROP_IPV6_ADDRESS_TABLE:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_IPV6_ADDRESS_TABLE>;
- break;
- case SPINEL_PROP_IPV6_ICMP_PING_OFFLOAD:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_IPV6_ICMP_PING_OFFLOAD>;
- break;
- case SPINEL_PROP_IPV6_ICMP_PING_OFFLOAD_MODE:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_IPV6_ICMP_PING_OFFLOAD_MODE>;
- break;
- case SPINEL_PROP_IPV6_LL_ADDR:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_IPV6_LL_ADDR>;
- break;
- case SPINEL_PROP_IPV6_ML_PREFIX:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_IPV6_ML_PREFIX>;
- break;
- case SPINEL_PROP_IPV6_ML_ADDR:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_IPV6_ML_ADDR>;
- break;
- case SPINEL_PROP_IPV6_MULTICAST_ADDRESS_TABLE:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_IPV6_MULTICAST_ADDRESS_TABLE>;
- break;
- case SPINEL_PROP_IPV6_ROUTE_TABLE:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_IPV6_ROUTE_TABLE>;
- break;
-#if OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE
- case SPINEL_PROP_JAM_DETECT_ENABLE:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_JAM_DETECT_ENABLE>;
- break;
- case SPINEL_PROP_JAM_DETECTED:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_JAM_DETECTED>;
- break;
- case SPINEL_PROP_JAM_DETECT_RSSI_THRESHOLD:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_JAM_DETECT_RSSI_THRESHOLD>;
- break;
- case SPINEL_PROP_JAM_DETECT_WINDOW:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_JAM_DETECT_WINDOW>;
- break;
- case SPINEL_PROP_JAM_DETECT_BUSY:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_JAM_DETECT_BUSY>;
- break;
- case SPINEL_PROP_JAM_DETECT_HISTORY_BITMAP:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_JAM_DETECT_HISTORY_BITMAP>;
- break;
-#endif
-#if OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE
- case SPINEL_PROP_CHANNEL_MONITOR_SAMPLE_INTERVAL:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CHANNEL_MONITOR_SAMPLE_INTERVAL>;
- break;
- case SPINEL_PROP_CHANNEL_MONITOR_RSSI_THRESHOLD:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CHANNEL_MONITOR_RSSI_THRESHOLD>;
- break;
- case SPINEL_PROP_CHANNEL_MONITOR_SAMPLE_WINDOW:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CHANNEL_MONITOR_SAMPLE_WINDOW>;
- break;
- case SPINEL_PROP_CHANNEL_MONITOR_SAMPLE_COUNT:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CHANNEL_MONITOR_SAMPLE_COUNT>;
- break;
- case SPINEL_PROP_CHANNEL_MONITOR_CHANNEL_OCCUPANCY:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CHANNEL_MONITOR_CHANNEL_OCCUPANCY>;
- break;
-#endif
-#if OPENTHREAD_CONFIG_LEGACY_ENABLE
- case SPINEL_PROP_NEST_LEGACY_ULA_PREFIX:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_NEST_LEGACY_ULA_PREFIX>;
- break;
- case SPINEL_PROP_NEST_LEGACY_LAST_NODE_JOINED:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_NEST_LEGACY_LAST_NODE_JOINED>;
- break;
-#endif
- // MAC counters
- case SPINEL_PROP_CNTR_TX_PKT_TOTAL:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_TX_PKT_TOTAL>;
- break;
- case SPINEL_PROP_CNTR_TX_PKT_ACK_REQ:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_TX_PKT_ACK_REQ>;
- break;
- case SPINEL_PROP_CNTR_TX_PKT_ACKED:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_TX_PKT_ACKED>;
- break;
- case SPINEL_PROP_CNTR_TX_PKT_NO_ACK_REQ:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_TX_PKT_NO_ACK_REQ>;
- break;
- case SPINEL_PROP_CNTR_TX_PKT_DATA:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_TX_PKT_DATA>;
- break;
- case SPINEL_PROP_CNTR_TX_PKT_DATA_POLL:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_TX_PKT_DATA_POLL>;
- break;
- case SPINEL_PROP_CNTR_TX_PKT_BEACON:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_TX_PKT_BEACON>;
- break;
- case SPINEL_PROP_CNTR_TX_PKT_BEACON_REQ:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_TX_PKT_BEACON_REQ>;
- break;
- case SPINEL_PROP_CNTR_TX_PKT_OTHER:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_TX_PKT_OTHER>;
- break;
- case SPINEL_PROP_CNTR_TX_PKT_RETRY:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_TX_PKT_RETRY>;
- break;
- case SPINEL_PROP_CNTR_TX_PKT_UNICAST:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_TX_PKT_UNICAST>;
- break;
- case SPINEL_PROP_CNTR_TX_PKT_BROADCAST:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_TX_PKT_BROADCAST>;
- break;
- case SPINEL_PROP_CNTR_TX_ERR_CCA:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_TX_ERR_CCA>;
- break;
- case SPINEL_PROP_CNTR_TX_ERR_ABORT:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_TX_ERR_ABORT>;
- break;
- case SPINEL_PROP_CNTR_RX_PKT_TOTAL:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_RX_PKT_TOTAL>;
- break;
- case SPINEL_PROP_CNTR_RX_PKT_DATA:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_RX_PKT_DATA>;
- break;
- case SPINEL_PROP_CNTR_RX_PKT_DATA_POLL:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_RX_PKT_DATA_POLL>;
- break;
- case SPINEL_PROP_CNTR_RX_PKT_BEACON:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_RX_PKT_BEACON>;
- break;
- case SPINEL_PROP_CNTR_RX_PKT_BEACON_REQ:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_RX_PKT_BEACON_REQ>;
- break;
- case SPINEL_PROP_CNTR_RX_PKT_OTHER:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_RX_PKT_OTHER>;
- break;
- case SPINEL_PROP_CNTR_RX_PKT_FILT_WL:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_RX_PKT_FILT_WL>;
- break;
- case SPINEL_PROP_CNTR_RX_PKT_FILT_DA:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_RX_PKT_FILT_DA>;
- break;
- case SPINEL_PROP_CNTR_RX_PKT_UNICAST:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_RX_PKT_UNICAST>;
- break;
- case SPINEL_PROP_CNTR_RX_PKT_BROADCAST:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_RX_PKT_BROADCAST>;
- break;
- case SPINEL_PROP_CNTR_RX_ERR_EMPTY:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_RX_ERR_EMPTY>;
- break;
- case SPINEL_PROP_CNTR_RX_ERR_UKWN_NBR:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_RX_ERR_UKWN_NBR>;
- break;
- case SPINEL_PROP_CNTR_RX_ERR_NVLD_SADDR:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_RX_ERR_NVLD_SADDR>;
- break;
- case SPINEL_PROP_CNTR_RX_ERR_SECURITY:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_RX_ERR_SECURITY>;
- break;
- case SPINEL_PROP_CNTR_RX_ERR_BAD_FCS:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_RX_ERR_BAD_FCS>;
- break;
- case SPINEL_PROP_CNTR_RX_ERR_OTHER:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_RX_ERR_OTHER>;
- break;
- case SPINEL_PROP_CNTR_RX_PKT_DUP:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_RX_PKT_DUP>;
- break;
- case SPINEL_PROP_CNTR_ALL_MAC_COUNTERS:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_ALL_MAC_COUNTERS>;
- break;
- case SPINEL_PROP_CNTR_MLE_COUNTERS:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_MLE_COUNTERS>;
- break;
- // NCP counters
- case SPINEL_PROP_CNTR_TX_IP_SEC_TOTAL:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_TX_IP_SEC_TOTAL>;
- break;
- case SPINEL_PROP_CNTR_TX_IP_INSEC_TOTAL:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_TX_IP_INSEC_TOTAL>;
- break;
- case SPINEL_PROP_CNTR_TX_IP_DROPPED:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_TX_IP_DROPPED>;
- break;
- case SPINEL_PROP_CNTR_RX_IP_SEC_TOTAL:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_RX_IP_SEC_TOTAL>;
- break;
- case SPINEL_PROP_CNTR_RX_IP_INSEC_TOTAL:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_RX_IP_INSEC_TOTAL>;
- break;
- case SPINEL_PROP_CNTR_RX_IP_DROPPED:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_RX_IP_DROPPED>;
- break;
- case SPINEL_PROP_CNTR_TX_SPINEL_TOTAL:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_TX_SPINEL_TOTAL>;
- break;
- case SPINEL_PROP_CNTR_RX_SPINEL_TOTAL:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_RX_SPINEL_TOTAL>;
- break;
- case SPINEL_PROP_CNTR_RX_SPINEL_ERR:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_RX_SPINEL_ERR>;
- break;
- // IP counters
- case SPINEL_PROP_CNTR_IP_TX_SUCCESS:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_IP_TX_SUCCESS>;
- break;
- case SPINEL_PROP_CNTR_IP_RX_SUCCESS:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_IP_RX_SUCCESS>;
- break;
- case SPINEL_PROP_CNTR_IP_TX_FAILURE:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_IP_TX_FAILURE>;
- break;
- case SPINEL_PROP_CNTR_IP_RX_FAILURE:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_IP_RX_FAILURE>;
- break;
-#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
- case SPINEL_PROP_THREAD_NETWORK_TIME:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_NETWORK_TIME>;
- break;
-#endif
-#if OPENTHREAD_CONFIG_CHILD_SUPERVISION_ENABLE
- case SPINEL_PROP_CHILD_SUPERVISION_CHECK_TIMEOUT:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CHILD_SUPERVISION_CHECK_TIMEOUT>;
- break;
-#endif
-#if OPENTHREAD_PLATFORM_POSIX_APP
- case SPINEL_PROP_RCP_VERSION:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_RCP_VERSION>;
- break;
-#endif
-#if OPENTHREAD_CONFIG_IP6_SLAAC_ENABLE
- case SPINEL_PROP_SLAAC_ENABLED:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_SLAAC_ENABLED>;
- break;
-#endif
-#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
- case SPINEL_PROP_SERVER_ALLOW_LOCAL_DATA_CHANGE:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_SERVER_ALLOW_LOCAL_DATA_CHANGE>;
- break;
- case SPINEL_PROP_SERVER_SERVICES:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_SERVER_SERVICES>;
- break;
- case SPINEL_PROP_SERVER_LEADER_SERVICES:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_SERVER_LEADER_SERVICES>;
- break;
-#endif
-#endif // OPENTHREAD_MTD || OPENTHREAD_FTD
-
- // --------------------------------------------------------------------------
- // FTD Only Properties (Get Handler)
-
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_PHY_CHAN_PREFERRED),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_MAC_SCAN_STATE),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_MAC_SCAN_MASK),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_MAC_SCAN_PERIOD),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_MAC_15_4_LADDR),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_MAC_15_4_SADDR),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_MAC_15_4_PANID),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_MAC_RAW_STREAM_ENABLED),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_MAC_PROMISCUOUS_MODE),
+#if OPENTHREAD_MTD || OPENTHREAD_FTD
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_MAC_DATA_POLL_PERIOD),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_NET_SAVED),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_NET_IF_UP),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_NET_STACK_UP),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_NET_ROLE),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_NET_NETWORK_NAME),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_NET_XPANID),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_NET_MASTER_KEY),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_NET_KEY_SEQUENCE_COUNTER),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_NET_PARTITION_ID),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_NET_REQUIRE_JOIN_EXISTING),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_NET_KEY_SWITCH_GUARDTIME),
#if OPENTHREAD_FTD
- case SPINEL_PROP_NET_PSKC:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_NET_PSKC>;
- break;
- case SPINEL_PROP_THREAD_LEADER_WEIGHT:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_LEADER_WEIGHT>;
- break;
- case SPINEL_PROP_THREAD_CHILD_TABLE:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_CHILD_TABLE>;
- break;
- case SPINEL_PROP_THREAD_CHILD_TABLE_ADDRESSES:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_CHILD_TABLE_ADDRESSES>;
- break;
- case SPINEL_PROP_THREAD_ROUTER_TABLE:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_ROUTER_TABLE>;
- break;
- case SPINEL_PROP_THREAD_LOCAL_LEADER_WEIGHT:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_LOCAL_LEADER_WEIGHT>;
- break;
- case SPINEL_PROP_THREAD_ROUTER_ROLE_ENABLED:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_ROUTER_ROLE_ENABLED>;
- break;
- case SPINEL_PROP_THREAD_CHILD_COUNT_MAX:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_CHILD_COUNT_MAX>;
- break;
- case SPINEL_PROP_THREAD_ROUTER_UPGRADE_THRESHOLD:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_ROUTER_UPGRADE_THRESHOLD>;
- break;
- case SPINEL_PROP_THREAD_ROUTER_DOWNGRADE_THRESHOLD:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_ROUTER_DOWNGRADE_THRESHOLD>;
- break;
- case SPINEL_PROP_THREAD_CONTEXT_REUSE_DELAY:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_CONTEXT_REUSE_DELAY>;
- break;
- case SPINEL_PROP_THREAD_NETWORK_ID_TIMEOUT:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_NETWORK_ID_TIMEOUT>;
- break;
- case SPINEL_PROP_THREAD_ROUTER_SELECTION_JITTER:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_ROUTER_SELECTION_JITTER>;
- break;
- case SPINEL_PROP_THREAD_PREFERRED_ROUTER_ID:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_PREFERRED_ROUTER_ID>;
- break;
- case SPINEL_PROP_THREAD_ADDRESS_CACHE_TABLE:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_ADDRESS_CACHE_TABLE>;
- break;
- case SPINEL_PROP_THREAD_NEW_DATASET:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_NEW_DATASET>;
- break;
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_NET_PSKC),
+#endif
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_LEADER_ADDR),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_PARENT),
+#if OPENTHREAD_FTD
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_CHILD_TABLE),
+#endif
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_LEADER_RID),
+#if OPENTHREAD_FTD
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_LEADER_WEIGHT),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_LOCAL_LEADER_WEIGHT),
+#endif
+#if OPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_NETWORK_DATA),
+#endif
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_NETWORK_DATA_VERSION),
+#if OPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_STABLE_NETWORK_DATA),
+#endif
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_STABLE_NETWORK_DATA_VERSION),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_ON_MESH_NETS),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_OFF_MESH_ROUTES),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_ASSISTING_PORTS),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_ALLOW_LOCAL_NET_DATA_CHANGE),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_MODE),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_IPV6_LL_ADDR),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_IPV6_ML_ADDR),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_IPV6_ML_PREFIX),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_IPV6_ADDRESS_TABLE),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_IPV6_ROUTE_TABLE),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_IPV6_ICMP_PING_OFFLOAD),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_IPV6_MULTICAST_ADDRESS_TABLE),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_IPV6_ICMP_PING_OFFLOAD_MODE),
+#if OPENTHREAD_FTD
#if OPENTHREAD_CONFIG_JOINER_ENABLE
- case SPINEL_PROP_MESHCOP_JOINER_STATE:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_MESHCOP_JOINER_STATE>;
- break;
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_MESHCOP_JOINER_STATE),
#endif
#if OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
- case SPINEL_PROP_MESHCOP_COMMISSIONER_STATE:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_MESHCOP_COMMISSIONER_STATE>;
- break;
- case SPINEL_PROP_MESHCOP_COMMISSIONER_PROVISIONING_URL:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_MESHCOP_COMMISSIONER_PROVISIONING_URL>;
- break;
- case SPINEL_PROP_MESHCOP_COMMISSIONER_SESSION_ID:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_MESHCOP_COMMISSIONER_SESSION_ID>;
- break;
- case SPINEL_PROP_THREAD_COMMISSIONER_ENABLED:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_COMMISSIONER_ENABLED>;
- break;
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_MESHCOP_COMMISSIONER_STATE),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_MESHCOP_COMMISSIONER_PROVISIONING_URL),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_MESHCOP_COMMISSIONER_SESSION_ID),
#endif
+#endif // OPENTHREAD_FTD
+#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_SERVER_ALLOW_LOCAL_DATA_CHANGE),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_SERVER_SERVICES),
+#endif
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_SERVER_LEADER_SERVICES),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_TX_PKT_TOTAL),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_TX_PKT_ACK_REQ),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_TX_PKT_ACKED),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_TX_PKT_NO_ACK_REQ),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_TX_PKT_DATA),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_TX_PKT_DATA_POLL),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_TX_PKT_BEACON),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_TX_PKT_BEACON_REQ),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_TX_PKT_OTHER),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_TX_PKT_RETRY),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_TX_ERR_CCA),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_TX_PKT_UNICAST),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_TX_PKT_BROADCAST),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_TX_ERR_ABORT),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_RX_PKT_TOTAL),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_RX_PKT_DATA),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_RX_PKT_DATA_POLL),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_RX_PKT_BEACON),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_RX_PKT_BEACON_REQ),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_RX_PKT_OTHER),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_RX_PKT_FILT_WL),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_RX_PKT_FILT_DA),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_RX_ERR_EMPTY),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_RX_ERR_UKWN_NBR),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_RX_ERR_NVLD_SADDR),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_RX_ERR_SECURITY),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_RX_ERR_BAD_FCS),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_RX_ERR_OTHER),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_RX_PKT_DUP),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_RX_PKT_UNICAST),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_RX_PKT_BROADCAST),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_TX_IP_SEC_TOTAL),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_TX_IP_INSEC_TOTAL),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_TX_IP_DROPPED),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_RX_IP_SEC_TOTAL),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_RX_IP_INSEC_TOTAL),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_RX_IP_DROPPED),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_TX_SPINEL_TOTAL),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_RX_SPINEL_TOTAL),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_RX_SPINEL_ERR),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_IP_TX_SUCCESS),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_IP_RX_SUCCESS),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_IP_TX_FAILURE),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_IP_RX_FAILURE),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_MSG_BUFFER_COUNTERS),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_ALL_MAC_COUNTERS),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_MLE_COUNTERS),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_ALL_IP_COUNTERS),
+#if OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_ENABLE
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CNTR_MAC_RETRY_HISTOGRAM),
+#endif
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_UNSOL_UPDATE_FILTER),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_UNSOL_UPDATE_LIST),
+#if OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_JAM_DETECT_ENABLE),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_JAM_DETECTED),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_JAM_DETECT_RSSI_THRESHOLD),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_JAM_DETECT_WINDOW),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_JAM_DETECT_BUSY),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_JAM_DETECT_HISTORY_BITMAP),
+#endif
+#if OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CHANNEL_MONITOR_SAMPLE_INTERVAL),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CHANNEL_MONITOR_RSSI_THRESHOLD),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CHANNEL_MONITOR_SAMPLE_WINDOW),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CHANNEL_MONITOR_SAMPLE_COUNT),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CHANNEL_MONITOR_CHANNEL_OCCUPANCY),
+#endif
+#endif // OPENTHREAD_MTD || OPENTHREAD_FTD
+#if OPENTHREAD_RADIO || OPENTHREAD_CONFIG_LINK_RAW_ENABLE
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_RADIO_CAPS),
+#endif
+#if OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_RADIO_COEX_METRICS),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_RADIO_COEX_ENABLE),
+#endif
+#if OPENTHREAD_MTD || OPENTHREAD_FTD
+#if OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_MAC_WHITELIST),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_MAC_WHITELIST_ENABLED),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_MAC_EXTENDED_ADDR),
+#endif
+#endif // OPENTHREAD_MTD || OPENTHREAD_FTD
+#if OPENTHREAD_RADIO || OPENTHREAD_CONFIG_LINK_RAW_ENABLE
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_MAC_SRC_MATCH_ENABLED),
+#endif
+#if OPENTHREAD_MTD || OPENTHREAD_FTD
+#if OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_MAC_BLACKLIST),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_MAC_BLACKLIST_ENABLED),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_MAC_FIXED_RSS),
+#endif
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_MAC_CCA_FAILURE_RATE),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_MAC_MAX_RETRY_NUMBER_DIRECT),
+#if OPENTHREAD_FTD
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_MAC_MAX_RETRY_NUMBER_INDIRECT),
+#endif
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_CHILD_TIMEOUT),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_RLOC16),
+#if OPENTHREAD_FTD
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_ROUTER_UPGRADE_THRESHOLD),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_CONTEXT_REUSE_DELAY),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_NETWORK_ID_TIMEOUT),
+#endif
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_RLOC16_DEBUG_PASSTHRU),
+#if OPENTHREAD_FTD
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_ROUTER_ROLE_ENABLED),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_ROUTER_DOWNGRADE_THRESHOLD),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_ROUTER_SELECTION_JITTER),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_PREFERRED_ROUTER_ID),
+#endif
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_NEIGHBOR_TABLE),
+#if OPENTHREAD_FTD
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_CHILD_COUNT_MAX),
+#endif
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_LEADER_NETWORK_DATA),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_STABLE_LEADER_NETWORK_DATA),
+#if OPENTHREAD_FTD
+#if OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_COMMISSIONER_ENABLED),
+#endif
+#endif
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_DISCOVERY_SCAN_JOINER_FLAG),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_DISCOVERY_SCAN_ENABLE_FILTERING),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_DISCOVERY_SCAN_PANID),
+#if OPENTHREAD_FTD
#if OPENTHREAD_CONFIG_MLE_STEERING_DATA_SET_OOB_ENABLE
- case SPINEL_PROP_THREAD_STEERING_DATA:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_STEERING_DATA>;
- break;
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_STEERING_DATA),
#endif
-#if OPENTHREAD_CONFIG_CHILD_SUPERVISION_ENABLE
- case SPINEL_PROP_CHILD_SUPERVISION_INTERVAL:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CHILD_SUPERVISION_INTERVAL>;
- break;
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_ROUTER_TABLE),
+#endif // OPENTHREAD_FTD
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_ACTIVE_DATASET),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_PENDING_DATASET),
+#if OPENTHREAD_FTD
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_CHILD_TABLE_ADDRESSES),
#endif
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_NEIGHBOR_TABLE_ERROR_RATES),
+#if OPENTHREAD_FTD
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_ADDRESS_CACHE_TABLE),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_NEW_DATASET),
#if OPENTHREAD_CONFIG_CHANNEL_MANAGER_ENABLE
- case SPINEL_PROP_CHANNEL_MANAGER_NEW_CHANNEL:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CHANNEL_MANAGER_NEW_CHANNEL>;
- break;
- case SPINEL_PROP_CHANNEL_MANAGER_DELAY:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CHANNEL_MANAGER_DELAY>;
- break;
- case SPINEL_PROP_CHANNEL_MANAGER_SUPPORTED_CHANNELS:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CHANNEL_MANAGER_SUPPORTED_CHANNELS>;
- break;
- case SPINEL_PROP_CHANNEL_MANAGER_FAVORED_CHANNELS:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CHANNEL_MANAGER_FAVORED_CHANNELS>;
- break;
- case SPINEL_PROP_CHANNEL_MANAGER_CHANNEL_SELECT:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CHANNEL_MANAGER_CHANNEL_SELECT>;
- break;
- case SPINEL_PROP_CHANNEL_MANAGER_AUTO_SELECT_ENABLED:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CHANNEL_MANAGER_AUTO_SELECT_ENABLED>;
- break;
- case SPINEL_PROP_CHANNEL_MANAGER_AUTO_SELECT_INTERVAL:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_CHANNEL_MANAGER_AUTO_SELECT_INTERVAL>;
- break;
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CHANNEL_MANAGER_NEW_CHANNEL),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CHANNEL_MANAGER_DELAY),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CHANNEL_MANAGER_SUPPORTED_CHANNELS),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CHANNEL_MANAGER_FAVORED_CHANNELS),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CHANNEL_MANAGER_CHANNEL_SELECT),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CHANNEL_MANAGER_AUTO_SELECT_ENABLED),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CHANNEL_MANAGER_AUTO_SELECT_INTERVAL),
#endif
#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
- case SPINEL_PROP_TIME_SYNC_PERIOD:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_TIME_SYNC_PERIOD>;
- break;
- case SPINEL_PROP_TIME_SYNC_XTAL_THRESHOLD:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_TIME_SYNC_XTAL_THRESHOLD>;
- break;
-#endif // OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_THREAD_NETWORK_TIME),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_TIME_SYNC_PERIOD),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_TIME_SYNC_XTAL_THRESHOLD),
+#endif
+#if OPENTHREAD_CONFIG_CHILD_SUPERVISION_ENABLE
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CHILD_SUPERVISION_INTERVAL),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_CHILD_SUPERVISION_CHECK_TIMEOUT),
+#endif
#endif // OPENTHREAD_FTD
+#if OPENTHREAD_PLATFORM_POSIX_APP
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_RCP_VERSION),
+#endif
+#if OPENTHREAD_CONFIG_IP6_SLAAC_ENABLE
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_SLAAC_ENABLED),
+#endif
+#if OPENTHREAD_CONFIG_LEGACY_ENABLE
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_NEST_LEGACY_ULA_PREFIX),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_NEST_LEGACY_LAST_NODE_JOINED),
+#endif
+#endif // OPENTHREAD_MTD || OPENTHREAD_FTD
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_DEBUG_TEST_ASSERT),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_DEBUG_NCP_LOG_LEVEL),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_DEBUG_TEST_WATCHDOG),
+ OT_NCP_GET_HANDLER_ENTRY(SPINEL_PROP_DEBUG_LOG_TIMESTAMP_BASE),
+ };
- // --------------------------------------------------------------------------
- // Raw Link or Radio Mode Properties (Get Handler)
+#undef OT_NCP_GET_HANDLER_ENTRY
-#if OPENTHREAD_RADIO || OPENTHREAD_CONFIG_LINK_RAW_ENABLE
- case SPINEL_PROP_RADIO_CAPS:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_RADIO_CAPS>;
- break;
- case SPINEL_PROP_MAC_SRC_MATCH_ENABLED:
- handler = &NcpBase::HandlePropertyGet<SPINEL_PROP_MAC_SRC_MATCH_ENABLED>;
- break;
+#if __cplusplus >= 201103L
+ static_assert(AreHandlerEntriesSorted(sHandlerEntries, OT_ARRAY_LENGTH(sHandlerEntries)),
+ "NCP property getter entries not sorted!");
#endif
- default:
- handler = NULL;
- }
-
- return handler;
+ return FindPropertyHandler(sHandlerEntries, OT_ARRAY_LENGTH(sHandlerEntries), aKey);
}
NcpBase::PropertyHandler NcpBase::FindSetPropertyHandler(spinel_prop_key_t aKey)
{
- NcpBase::PropertyHandler handler;
+#define OT_NCP_SET_HANDLER_ENTRY(aPropertyName) {aPropertyName, &NcpBase::HandlePropertySet<aPropertyName>}
- switch (aKey)
- {
- // --------------------------------------------------------------------------
- // Common Properties (Set Handler)
-
- case SPINEL_PROP_POWER_STATE:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_POWER_STATE>;
- break;
- case SPINEL_PROP_MCU_POWER_STATE:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_MCU_POWER_STATE>;
- break;
- case SPINEL_PROP_UNSOL_UPDATE_FILTER:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_UNSOL_UPDATE_FILTER>;
- break;
- case SPINEL_PROP_PHY_TX_POWER:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_PHY_TX_POWER>;
- break;
- case SPINEL_PROP_PHY_CHAN:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_PHY_CHAN>;
- break;
- case SPINEL_PROP_MAC_PROMISCUOUS_MODE:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_MAC_PROMISCUOUS_MODE>;
- break;
- case SPINEL_PROP_MAC_15_4_PANID:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_MAC_15_4_PANID>;
- break;
- case SPINEL_PROP_MAC_15_4_LADDR:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_MAC_15_4_LADDR>;
- break;
- case SPINEL_PROP_MAC_RAW_STREAM_ENABLED:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_MAC_RAW_STREAM_ENABLED>;
- break;
- case SPINEL_PROP_MAC_SCAN_MASK:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_MAC_SCAN_MASK>;
- break;
- case SPINEL_PROP_MAC_SCAN_STATE:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_MAC_SCAN_STATE>;
- break;
- case SPINEL_PROP_MAC_SCAN_PERIOD:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_MAC_SCAN_PERIOD>;
- break;
-
- // --------------------------------------------------------------------------
- // MTD (or FTD) Properties (Set Handler)
-
+ OT_NCP_CONST static HandlerEntry sHandlerEntries[] = {
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_POWER_STATE),
+#if OPENTHREAD_CONFIG_NCP_ENABLE_MCU_POWER_STATE_CONTROL
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MCU_POWER_STATE),
+#endif
+#if OPENTHREAD_RADIO || OPENTHREAD_CONFIG_LINK_RAW_ENABLE
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_PHY_ENABLED),
+#endif
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_PHY_CHAN),
#if OPENTHREAD_MTD || OPENTHREAD_FTD
- case SPINEL_PROP_PHY_PCAP_ENABLED:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_PHY_PCAP_ENABLED>;
- break;
- case SPINEL_PROP_PHY_CHAN_SUPPORTED:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_PHY_CHAN_SUPPORTED>;
- break;
- case SPINEL_PROP_MAC_DATA_POLL_PERIOD:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_MAC_DATA_POLL_PERIOD>;
- break;
- case SPINEL_PROP_NET_IF_UP:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_NET_IF_UP>;
- break;
- case SPINEL_PROP_NET_STACK_UP:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_NET_STACK_UP>;
- break;
- case SPINEL_PROP_NET_ROLE:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_NET_ROLE>;
- break;
- case SPINEL_PROP_NET_NETWORK_NAME:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_NET_NETWORK_NAME>;
- break;
- case SPINEL_PROP_NET_XPANID:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_NET_XPANID>;
- break;
- case SPINEL_PROP_NET_MASTER_KEY:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_NET_MASTER_KEY>;
- break;
- case SPINEL_PROP_NET_KEY_SEQUENCE_COUNTER:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_NET_KEY_SEQUENCE_COUNTER>;
- break;
- case SPINEL_PROP_NET_KEY_SWITCH_GUARDTIME:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_NET_KEY_SWITCH_GUARDTIME>;
- break;
- case SPINEL_PROP_THREAD_ASSISTING_PORTS:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_THREAD_ASSISTING_PORTS>;
- break;
- case SPINEL_PROP_STREAM_NET_INSECURE:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_STREAM_NET_INSECURE>;
- break;
- case SPINEL_PROP_STREAM_NET:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_STREAM_NET>;
- break;
- case SPINEL_PROP_IPV6_ML_PREFIX:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_IPV6_ML_PREFIX>;
- break;
- case SPINEL_PROP_IPV6_ICMP_PING_OFFLOAD:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_IPV6_ICMP_PING_OFFLOAD>;
- break;
- case SPINEL_PROP_IPV6_ICMP_PING_OFFLOAD_MODE:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_IPV6_ICMP_PING_OFFLOAD_MODE>;
- break;
- case SPINEL_PROP_THREAD_CHILD_TIMEOUT:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_THREAD_CHILD_TIMEOUT>;
- break;
-#if OPENTHREAD_CONFIG_JOINER_ENABLE
- case SPINEL_PROP_MESHCOP_JOINER_COMMISSIONING:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_MESHCOP_JOINER_COMMISSIONING>;
- break;
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_PHY_CHAN_SUPPORTED),
#endif
- case SPINEL_PROP_THREAD_RLOC16_DEBUG_PASSTHRU:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_THREAD_RLOC16_DEBUG_PASSTHRU>;
- break;
-#if OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
- case SPINEL_PROP_MAC_WHITELIST:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_MAC_WHITELIST>;
- break;
- case SPINEL_PROP_MAC_WHITELIST_ENABLED:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_MAC_WHITELIST_ENABLED>;
- break;
- case SPINEL_PROP_MAC_BLACKLIST:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_MAC_BLACKLIST>;
- break;
- case SPINEL_PROP_MAC_BLACKLIST_ENABLED:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_MAC_BLACKLIST_ENABLED>;
- break;
- case SPINEL_PROP_MAC_FIXED_RSS:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_MAC_FIXED_RSS>;
- break;
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_PHY_CCA_THRESHOLD),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_PHY_TX_POWER),
+#if OPENTHREAD_MTD || OPENTHREAD_FTD
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_PHY_PCAP_ENABLED),
#endif
- case SPINEL_PROP_THREAD_MODE:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_THREAD_MODE>;
- break;
- case SPINEL_PROP_NET_REQUIRE_JOIN_EXISTING:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_NET_REQUIRE_JOIN_EXISTING>;
- break;
- case SPINEL_PROP_DEBUG_NCP_LOG_LEVEL:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_DEBUG_NCP_LOG_LEVEL>;
- break;
- case SPINEL_PROP_THREAD_DISCOVERY_SCAN_JOINER_FLAG:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_THREAD_DISCOVERY_SCAN_JOINER_FLAG>;
- break;
- case SPINEL_PROP_THREAD_DISCOVERY_SCAN_ENABLE_FILTERING:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_THREAD_DISCOVERY_SCAN_ENABLE_FILTERING>;
- break;
- case SPINEL_PROP_THREAD_DISCOVERY_SCAN_PANID:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_THREAD_DISCOVERY_SCAN_PANID>;
- break;
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MAC_SCAN_STATE),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MAC_SCAN_MASK),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MAC_SCAN_PERIOD),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MAC_15_4_LADDR),
+#if OPENTHREAD_RADIO || OPENTHREAD_CONFIG_LINK_RAW_ENABLE
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MAC_15_4_SADDR),
+#endif
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MAC_15_4_PANID),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MAC_RAW_STREAM_ENABLED),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MAC_PROMISCUOUS_MODE),
+#if OPENTHREAD_MTD || OPENTHREAD_FTD
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MAC_DATA_POLL_PERIOD),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_NET_IF_UP),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_NET_STACK_UP),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_NET_ROLE),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_NET_NETWORK_NAME),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_NET_XPANID),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_NET_MASTER_KEY),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_NET_KEY_SEQUENCE_COUNTER),
+#if OPENTHREAD_FTD
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_NET_PARTITION_ID),
+#endif
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_NET_REQUIRE_JOIN_EXISTING),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_NET_KEY_SWITCH_GUARDTIME),
+#if OPENTHREAD_FTD
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_NET_PSKC),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_THREAD_LOCAL_LEADER_WEIGHT),
+#endif
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_THREAD_ASSISTING_PORTS),
#if OPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE
- case SPINEL_PROP_THREAD_ALLOW_LOCAL_NET_DATA_CHANGE:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_THREAD_ALLOW_LOCAL_NET_DATA_CHANGE>;
- break;
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_THREAD_ALLOW_LOCAL_NET_DATA_CHANGE),
#endif
-
- case SPINEL_PROP_THREAD_ACTIVE_DATASET:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_THREAD_ACTIVE_DATASET>;
- break;
- case SPINEL_PROP_THREAD_PENDING_DATASET:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_THREAD_PENDING_DATASET>;
- break;
- case SPINEL_PROP_THREAD_MGMT_SET_ACTIVE_DATASET:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_THREAD_MGMT_SET_ACTIVE_DATASET>;
- break;
- case SPINEL_PROP_THREAD_MGMT_SET_PENDING_DATASET:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_THREAD_MGMT_SET_PENDING_DATASET>;
- break;
- case SPINEL_PROP_THREAD_MGMT_GET_ACTIVE_DATASET:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_THREAD_MGMT_GET_ACTIVE_DATASET>;
- break;
- case SPINEL_PROP_THREAD_MGMT_GET_PENDING_DATASET:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_THREAD_MGMT_GET_PENDING_DATASET>;
- break;
-
-#if OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE
- case SPINEL_PROP_JAM_DETECT_ENABLE:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_JAM_DETECT_ENABLE>;
- break;
- case SPINEL_PROP_JAM_DETECT_RSSI_THRESHOLD:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_JAM_DETECT_RSSI_THRESHOLD>;
- break;
- case SPINEL_PROP_JAM_DETECT_WINDOW:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_JAM_DETECT_WINDOW>;
- break;
- case SPINEL_PROP_JAM_DETECT_BUSY:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_JAM_DETECT_BUSY>;
- break;
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_THREAD_MODE),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_IPV6_ML_PREFIX),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_IPV6_ICMP_PING_OFFLOAD),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_IPV6_ICMP_PING_OFFLOAD_MODE),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_STREAM_NET),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_STREAM_NET_INSECURE),
+#if OPENTHREAD_CONFIG_JOINER_ENABLE
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MESHCOP_JOINER_COMMISSIONING),
#endif
-#if OPENTHREAD_CONFIG_LEGACY_ENABLE
- case SPINEL_PROP_NEST_LEGACY_ULA_PREFIX:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_NEST_LEGACY_ULA_PREFIX>;
- break;
+#if OPENTHREAD_FTD
+#if OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MESHCOP_COMMISSIONER_STATE),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MESHCOP_COMMISSIONER_PROVISIONING_URL),
#endif
- case SPINEL_PROP_CNTR_RESET:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_CNTR_RESET>;
- break;
-#if OPENTHREAD_CONFIG_CHILD_SUPERVISION_ENABLE
- case SPINEL_PROP_CHILD_SUPERVISION_CHECK_TIMEOUT:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_CHILD_SUPERVISION_CHECK_TIMEOUT>;
- break;
-#endif
-#if OPENTHREAD_CONFIG_IP6_SLAAC_ENABLE
- case SPINEL_PROP_SLAAC_ENABLED:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_SLAAC_ENABLED>;
- break;
-#endif
+#endif // OPENTHREAD_FTD
#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
- case SPINEL_PROP_SERVER_ALLOW_LOCAL_DATA_CHANGE:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_SERVER_ALLOW_LOCAL_DATA_CHANGE>;
- break;
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_SERVER_ALLOW_LOCAL_DATA_CHANGE),
+#endif
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_CNTR_RESET),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_CNTR_ALL_MAC_COUNTERS),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_CNTR_MLE_COUNTERS),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_CNTR_ALL_IP_COUNTERS),
+#if OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_ENABLE
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_CNTR_MAC_RETRY_HISTOGRAM),
+#endif
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_UNSOL_UPDATE_FILTER),
+#if OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_JAM_DETECT_ENABLE),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_JAM_DETECT_RSSI_THRESHOLD),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_JAM_DETECT_WINDOW),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_JAM_DETECT_BUSY),
#endif
#endif // OPENTHREAD_MTD || OPENTHREAD_FTD
- // --------------------------------------------------------------------------
- // FTD Only Properties (Set Handler)
+#if OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_RADIO_COEX_ENABLE),
+#endif
-#if OPENTHREAD_FTD
- case SPINEL_PROP_NET_PSKC:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_NET_PSKC>;
- break;
- case SPINEL_PROP_NET_PARTITION_ID:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_NET_PARTITION_ID>;
- break;
- case SPINEL_PROP_THREAD_NETWORK_ID_TIMEOUT:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_THREAD_NETWORK_ID_TIMEOUT>;
- break;
- case SPINEL_PROP_THREAD_LOCAL_LEADER_WEIGHT:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_THREAD_LOCAL_LEADER_WEIGHT>;
- break;
- case SPINEL_PROP_THREAD_ROUTER_ROLE_ENABLED:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_THREAD_ROUTER_ROLE_ENABLED>;
- break;
- case SPINEL_PROP_THREAD_CHILD_COUNT_MAX:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_THREAD_CHILD_COUNT_MAX>;
- break;
- case SPINEL_PROP_THREAD_ROUTER_UPGRADE_THRESHOLD:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_THREAD_ROUTER_UPGRADE_THRESHOLD>;
- break;
- case SPINEL_PROP_THREAD_ROUTER_DOWNGRADE_THRESHOLD:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_THREAD_ROUTER_DOWNGRADE_THRESHOLD>;
- break;
- case SPINEL_PROP_THREAD_CONTEXT_REUSE_DELAY:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_THREAD_CONTEXT_REUSE_DELAY>;
- break;
- case SPINEL_PROP_THREAD_ROUTER_SELECTION_JITTER:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_THREAD_ROUTER_SELECTION_JITTER>;
- break;
- case SPINEL_PROP_THREAD_PREFERRED_ROUTER_ID:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_THREAD_PREFERRED_ROUTER_ID>;
- break;
-#if OPENTHREAD_CONFIG_MLE_STEERING_DATA_SET_OOB_ENABLE
- case SPINEL_PROP_THREAD_STEERING_DATA:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_THREAD_STEERING_DATA>;
- break;
+#if OPENTHREAD_MTD || OPENTHREAD_FTD
+#if OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MAC_WHITELIST),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MAC_WHITELIST_ENABLED),
#endif
-#if OPENTHREAD_CONFIG_UDP_FORWARD_ENABLE
- case SPINEL_PROP_THREAD_UDP_FORWARD_STREAM:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_THREAD_UDP_FORWARD_STREAM>;
- break;
-#endif
-#if OPENTHREAD_CONFIG_CHILD_SUPERVISION_ENABLE
- case SPINEL_PROP_CHILD_SUPERVISION_INTERVAL:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_CHILD_SUPERVISION_INTERVAL>;
- break;
-#endif
-#if OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
- case SPINEL_PROP_MESHCOP_COMMISSIONER_STATE:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_MESHCOP_COMMISSIONER_STATE>;
- break;
- case SPINEL_PROP_MESHCOP_COMMISSIONER_PROVISIONING_URL:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_MESHCOP_COMMISSIONER_PROVISIONING_URL>;
- break;
- case SPINEL_PROP_MESHCOP_COMMISSIONER_ANNOUNCE_BEGIN:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_MESHCOP_COMMISSIONER_ANNOUNCE_BEGIN>;
- break;
- case SPINEL_PROP_MESHCOP_COMMISSIONER_ENERGY_SCAN:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_MESHCOP_COMMISSIONER_ENERGY_SCAN>;
- break;
- case SPINEL_PROP_MESHCOP_COMMISSIONER_PAN_ID_QUERY:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_MESHCOP_COMMISSIONER_PAN_ID_QUERY>;
- break;
- case SPINEL_PROP_MESHCOP_COMMISSIONER_MGMT_GET:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_MESHCOP_COMMISSIONER_MGMT_GET>;
- break;
- case SPINEL_PROP_MESHCOP_COMMISSIONER_MGMT_SET:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_MESHCOP_COMMISSIONER_MGMT_SET>;
- break;
-#endif
-#if OPENTHREAD_CONFIG_CHANNEL_MANAGER_ENABLE
- case SPINEL_PROP_CHANNEL_MANAGER_NEW_CHANNEL:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_CHANNEL_MANAGER_NEW_CHANNEL>;
- break;
- case SPINEL_PROP_CHANNEL_MANAGER_DELAY:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_CHANNEL_MANAGER_DELAY>;
- break;
- case SPINEL_PROP_CHANNEL_MANAGER_SUPPORTED_CHANNELS:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_CHANNEL_MANAGER_SUPPORTED_CHANNELS>;
- break;
- case SPINEL_PROP_CHANNEL_MANAGER_FAVORED_CHANNELS:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_CHANNEL_MANAGER_FAVORED_CHANNELS>;
- break;
- case SPINEL_PROP_CHANNEL_MANAGER_CHANNEL_SELECT:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_CHANNEL_MANAGER_CHANNEL_SELECT>;
- break;
- case SPINEL_PROP_CHANNEL_MANAGER_AUTO_SELECT_ENABLED:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_CHANNEL_MANAGER_AUTO_SELECT_ENABLED>;
- break;
- case SPINEL_PROP_CHANNEL_MANAGER_AUTO_SELECT_INTERVAL:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_CHANNEL_MANAGER_AUTO_SELECT_INTERVAL>;
- break;
-#endif
-#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
- case SPINEL_PROP_TIME_SYNC_PERIOD:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_TIME_SYNC_PERIOD>;
- break;
- case SPINEL_PROP_TIME_SYNC_XTAL_THRESHOLD:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_TIME_SYNC_XTAL_THRESHOLD>;
- break;
-#endif
-#endif // #if OPENTHREAD_FTD
-
- // --------------------------------------------------------------------------
- // Raw Link API Properties (Set Handler)
+#endif // OPENTHREAD_MTD || OPENTHREAD_FTD
#if OPENTHREAD_RADIO || OPENTHREAD_CONFIG_LINK_RAW_ENABLE
- case SPINEL_PROP_MAC_15_4_SADDR:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_MAC_15_4_SADDR>;
- break;
- case SPINEL_PROP_MAC_SRC_MATCH_ENABLED:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_MAC_SRC_MATCH_ENABLED>;
- break;
- case SPINEL_PROP_MAC_SRC_MATCH_SHORT_ADDRESSES:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_MAC_SRC_MATCH_SHORT_ADDRESSES>;
- break;
- case SPINEL_PROP_MAC_SRC_MATCH_EXTENDED_ADDRESSES:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_MAC_SRC_MATCH_EXTENDED_ADDRESSES>;
- break;
- case SPINEL_PROP_PHY_ENABLED:
- handler = &NcpBase::HandlePropertySet<SPINEL_PROP_PHY_ENABLED>;
- break;
-#endif // #if OPENTHREAD_RADIO || OPENTHREAD_CONFIG_LINK_RAW_ENABLE
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MAC_SRC_MATCH_ENABLED),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MAC_SRC_MATCH_SHORT_ADDRESSES),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MAC_SRC_MATCH_EXTENDED_ADDRESSES),
+#endif
- default:
- handler = NULL;
- }
+#if OPENTHREAD_MTD || OPENTHREAD_FTD
+#if OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MAC_BLACKLIST),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MAC_BLACKLIST_ENABLED),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MAC_FIXED_RSS),
+#endif
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MAC_MAX_RETRY_NUMBER_DIRECT),
+#if OPENTHREAD_FTD
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MAC_MAX_RETRY_NUMBER_INDIRECT),
+#endif
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_THREAD_CHILD_TIMEOUT),
+#if OPENTHREAD_FTD
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_THREAD_ROUTER_UPGRADE_THRESHOLD),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_THREAD_CONTEXT_REUSE_DELAY),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_THREAD_NETWORK_ID_TIMEOUT),
+#endif
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_THREAD_RLOC16_DEBUG_PASSTHRU),
+#if OPENTHREAD_FTD
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_THREAD_ROUTER_ROLE_ENABLED),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_THREAD_ROUTER_DOWNGRADE_THRESHOLD),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_THREAD_ROUTER_SELECTION_JITTER),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_THREAD_PREFERRED_ROUTER_ID),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_THREAD_CHILD_COUNT_MAX),
+#endif
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_THREAD_DISCOVERY_SCAN_JOINER_FLAG),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_THREAD_DISCOVERY_SCAN_ENABLE_FILTERING),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_THREAD_DISCOVERY_SCAN_PANID),
+#if OPENTHREAD_FTD
+#if OPENTHREAD_CONFIG_MLE_STEERING_DATA_SET_OOB_ENABLE
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_THREAD_STEERING_DATA),
+#endif
+#endif
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_THREAD_ACTIVE_DATASET),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_THREAD_PENDING_DATASET),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_THREAD_MGMT_SET_ACTIVE_DATASET),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_THREAD_MGMT_SET_PENDING_DATASET),
+#if OPENTHREAD_CONFIG_UDP_FORWARD_ENABLE
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_THREAD_UDP_FORWARD_STREAM),
+#endif
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_THREAD_MGMT_GET_ACTIVE_DATASET),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_THREAD_MGMT_GET_PENDING_DATASET),
+#if OPENTHREAD_FTD
+#if OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MESHCOP_COMMISSIONER_ANNOUNCE_BEGIN),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MESHCOP_COMMISSIONER_ENERGY_SCAN),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MESHCOP_COMMISSIONER_PAN_ID_QUERY),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MESHCOP_COMMISSIONER_MGMT_GET),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_MESHCOP_COMMISSIONER_MGMT_SET),
+#endif
+#if OPENTHREAD_CONFIG_CHANNEL_MANAGER_ENABLE
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_CHANNEL_MANAGER_NEW_CHANNEL),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_CHANNEL_MANAGER_DELAY),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_CHANNEL_MANAGER_SUPPORTED_CHANNELS),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_CHANNEL_MANAGER_FAVORED_CHANNELS),
+#if OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_CHANNEL_MANAGER_CHANNEL_SELECT),
+#endif
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_CHANNEL_MANAGER_AUTO_SELECT_ENABLED),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_CHANNEL_MANAGER_AUTO_SELECT_INTERVAL),
+#endif // OPENTHREAD_CONFIG_CHANNEL_MANAGER_ENABLE
+#if OPENTHREAD_CONFIG_TIME_SYNC_ENABLE
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_TIME_SYNC_PERIOD),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_TIME_SYNC_XTAL_THRESHOLD),
+#endif
+#if OPENTHREAD_CONFIG_CHILD_SUPERVISION_ENABLE
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_CHILD_SUPERVISION_INTERVAL),
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_CHILD_SUPERVISION_CHECK_TIMEOUT),
+#endif
+#endif // OPENTHREAD_FTD
+#if OPENTHREAD_CONFIG_IP6_SLAAC_ENABLE
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_SLAAC_ENABLED),
+#endif
+#if OPENTHREAD_CONFIG_LEGACY_ENABLE
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_NEST_LEGACY_ULA_PREFIX),
+#endif
+#endif // OPENTHREAD_MTD || OPENTHREAD_FTD
+#if OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_DEBUG_NCP_LOG_LEVEL),
+#endif
+ OT_NCP_SET_HANDLER_ENTRY(SPINEL_PROP_DEBUG_LOG_TIMESTAMP_BASE),
+ };
- return handler;
+#undef OT_NCP_SET_HANDLER_ENTRY
+
+#if __cplusplus >= 201103L
+ static_assert(AreHandlerEntriesSorted(sHandlerEntries, OT_ARRAY_LENGTH(sHandlerEntries)),
+ "NCP property setter entries not sorted!");
+#endif
+
+ return FindPropertyHandler(sHandlerEntries, OT_ARRAY_LENGTH(sHandlerEntries), aKey);
}
NcpBase::PropertyHandler NcpBase::FindInsertPropertyHandler(spinel_prop_key_t aKey)
{
- NcpBase::PropertyHandler handler;
+#define OT_NCP_INSERT_HANDLER_ENTRY(aPropertyName) {aPropertyName, &NcpBase::HandlePropertyInsert<aPropertyName>}
- switch (aKey)
- {
- // --------------------------------------------------------------------------
- // Common Properties (Insert Handler)
-
- case SPINEL_PROP_UNSOL_UPDATE_FILTER:
- handler = &NcpBase::HandlePropertyInsert<SPINEL_PROP_UNSOL_UPDATE_FILTER>;
- break;
-
- // --------------------------------------------------------------------------
- // MTD (or FTD) Properties (Insert Handler)
-
+ OT_NCP_CONST static HandlerEntry sHandlerEntries[] = {
#if OPENTHREAD_MTD || OPENTHREAD_FTD
- case SPINEL_PROP_IPV6_ADDRESS_TABLE:
- handler = &NcpBase::HandlePropertyInsert<SPINEL_PROP_IPV6_ADDRESS_TABLE>;
- break;
- case SPINEL_PROP_IPV6_MULTICAST_ADDRESS_TABLE:
- handler = &NcpBase::HandlePropertyInsert<SPINEL_PROP_IPV6_MULTICAST_ADDRESS_TABLE>;
- break;
- case SPINEL_PROP_THREAD_ASSISTING_PORTS:
- handler = &NcpBase::HandlePropertyInsert<SPINEL_PROP_THREAD_ASSISTING_PORTS>;
- break;
#if OPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE
- case SPINEL_PROP_THREAD_OFF_MESH_ROUTES:
- handler = &NcpBase::HandlePropertyInsert<SPINEL_PROP_THREAD_OFF_MESH_ROUTES>;
- break;
- case SPINEL_PROP_THREAD_ON_MESH_NETS:
- handler = &NcpBase::HandlePropertyInsert<SPINEL_PROP_THREAD_ON_MESH_NETS>;
- break;
+ OT_NCP_INSERT_HANDLER_ENTRY(SPINEL_PROP_THREAD_ON_MESH_NETS),
+ OT_NCP_INSERT_HANDLER_ENTRY(SPINEL_PROP_THREAD_OFF_MESH_ROUTES),
#endif
-#if OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
- case SPINEL_PROP_MAC_WHITELIST:
- handler = &NcpBase::HandlePropertyInsert<SPINEL_PROP_MAC_WHITELIST>;
- break;
- case SPINEL_PROP_MAC_BLACKLIST:
- handler = &NcpBase::HandlePropertyInsert<SPINEL_PROP_MAC_BLACKLIST>;
- break;
- case SPINEL_PROP_MAC_FIXED_RSS:
- handler = &NcpBase::HandlePropertyInsert<SPINEL_PROP_MAC_FIXED_RSS>;
- break;
+ OT_NCP_INSERT_HANDLER_ENTRY(SPINEL_PROP_THREAD_ASSISTING_PORTS),
+ OT_NCP_INSERT_HANDLER_ENTRY(SPINEL_PROP_IPV6_ADDRESS_TABLE),
+ OT_NCP_INSERT_HANDLER_ENTRY(SPINEL_PROP_IPV6_MULTICAST_ADDRESS_TABLE),
+#if OPENTHREAD_FTD && OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
+ OT_NCP_INSERT_HANDLER_ENTRY(SPINEL_PROP_MESHCOP_COMMISSIONER_JOINERS),
#endif
#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
- case SPINEL_PROP_SERVER_SERVICES:
- handler = &NcpBase::HandlePropertyInsert<SPINEL_PROP_SERVER_SERVICES>;
- break;
+ OT_NCP_INSERT_HANDLER_ENTRY(SPINEL_PROP_SERVER_SERVICES),
#endif
-#endif // OPENTHREAD_MTD || OPENTHREAD_FTD
-
- // --------------------------------------------------------------------------
- // FTD Only Properties (Insert Handler)
-
-#if OPENTHREAD_FTD
-#if OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
- case SPINEL_PROP_MESHCOP_COMMISSIONER_JOINERS:
- handler = &NcpBase::HandlePropertyInsert<SPINEL_PROP_MESHCOP_COMMISSIONER_JOINERS>;
- break;
- case SPINEL_PROP_THREAD_JOINERS:
- handler = &NcpBase::HandlePropertyInsert<SPINEL_PROP_THREAD_JOINERS>;
- break;
+#endif // #if OPENTHREAD_MTD || OPENTHREAD_FTD
+ OT_NCP_INSERT_HANDLER_ENTRY(SPINEL_PROP_UNSOL_UPDATE_FILTER),
+#if (OPENTHREAD_MTD || OPENTHREAD_FTD) && OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
+ OT_NCP_INSERT_HANDLER_ENTRY(SPINEL_PROP_MAC_WHITELIST),
#endif
-#endif // OPENTHREAD_FTD
-
- // --------------------------------------------------------------------------
- // Raw Link API Properties (Insert Handler)
-
#if OPENTHREAD_RADIO || OPENTHREAD_CONFIG_LINK_RAW_ENABLE
- case SPINEL_PROP_MAC_SRC_MATCH_SHORT_ADDRESSES:
- handler = &NcpBase::HandlePropertyInsert<SPINEL_PROP_MAC_SRC_MATCH_SHORT_ADDRESSES>;
- break;
- case SPINEL_PROP_MAC_SRC_MATCH_EXTENDED_ADDRESSES:
- handler = &NcpBase::HandlePropertyInsert<SPINEL_PROP_MAC_SRC_MATCH_EXTENDED_ADDRESSES>;
- break;
+ OT_NCP_INSERT_HANDLER_ENTRY(SPINEL_PROP_MAC_SRC_MATCH_SHORT_ADDRESSES),
+ OT_NCP_INSERT_HANDLER_ENTRY(SPINEL_PROP_MAC_SRC_MATCH_EXTENDED_ADDRESSES),
+#endif
+#if (OPENTHREAD_MTD || OPENTHREAD_FTD) && OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
+ OT_NCP_INSERT_HANDLER_ENTRY(SPINEL_PROP_MAC_BLACKLIST),
+ OT_NCP_INSERT_HANDLER_ENTRY(SPINEL_PROP_MAC_FIXED_RSS),
+#endif
+#if OPENTHREAD_FTD && OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
+ OT_NCP_INSERT_HANDLER_ENTRY(SPINEL_PROP_THREAD_JOINERS),
+#endif
+ };
+
+#undef OT_NCP_INSERT_HANDLER_ENTRY
+
+#if __cplusplus >= 201103L
+ static_assert(AreHandlerEntriesSorted(sHandlerEntries, OT_ARRAY_LENGTH(sHandlerEntries)),
+ "NCP property setter entries not sorted!");
#endif
- default:
- handler = NULL;
- }
-
- return handler;
+ return FindPropertyHandler(sHandlerEntries, OT_ARRAY_LENGTH(sHandlerEntries), aKey);
}
NcpBase::PropertyHandler NcpBase::FindRemovePropertyHandler(spinel_prop_key_t aKey)
{
- NcpBase::PropertyHandler handler;
+#define OT_NCP_REMOVE_HANDLER_ENTRY(aPropertyName) {aPropertyName, &NcpBase::HandlePropertyRemove<aPropertyName>}
- switch (aKey)
- {
- // --------------------------------------------------------------------------
- // Common Properties (Remove Handler)
-
- case SPINEL_PROP_UNSOL_UPDATE_FILTER:
- handler = &NcpBase::HandlePropertyRemove<SPINEL_PROP_UNSOL_UPDATE_FILTER>;
- break;
-
- // --------------------------------------------------------------------------
- // MTD (or FTD) Properties (Remove Handler)
-
+ OT_NCP_CONST static HandlerEntry sHandlerEntries[] = {
#if OPENTHREAD_MTD || OPENTHREAD_FTD
- case SPINEL_PROP_IPV6_ADDRESS_TABLE:
- handler = &NcpBase::HandlePropertyRemove<SPINEL_PROP_IPV6_ADDRESS_TABLE>;
- break;
- case SPINEL_PROP_IPV6_MULTICAST_ADDRESS_TABLE:
- handler = &NcpBase::HandlePropertyRemove<SPINEL_PROP_IPV6_MULTICAST_ADDRESS_TABLE>;
- break;
#if OPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE
- case SPINEL_PROP_THREAD_OFF_MESH_ROUTES:
- handler = &NcpBase::HandlePropertyRemove<SPINEL_PROP_THREAD_OFF_MESH_ROUTES>;
- break;
- case SPINEL_PROP_THREAD_ON_MESH_NETS:
- handler = &NcpBase::HandlePropertyRemove<SPINEL_PROP_THREAD_ON_MESH_NETS>;
- break;
+ OT_NCP_REMOVE_HANDLER_ENTRY(SPINEL_PROP_THREAD_ON_MESH_NETS),
+ OT_NCP_REMOVE_HANDLER_ENTRY(SPINEL_PROP_THREAD_OFF_MESH_ROUTES),
#endif
- case SPINEL_PROP_THREAD_ASSISTING_PORTS:
- handler = &NcpBase::HandlePropertyRemove<SPINEL_PROP_THREAD_ASSISTING_PORTS>;
- break;
-#if OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
- case SPINEL_PROP_MAC_WHITELIST:
- handler = &NcpBase::HandlePropertyRemove<SPINEL_PROP_MAC_WHITELIST>;
- break;
- case SPINEL_PROP_MAC_BLACKLIST:
- handler = &NcpBase::HandlePropertyRemove<SPINEL_PROP_MAC_BLACKLIST>;
- break;
- case SPINEL_PROP_MAC_FIXED_RSS:
- handler = &NcpBase::HandlePropertyRemove<SPINEL_PROP_MAC_FIXED_RSS>;
- break;
+ OT_NCP_REMOVE_HANDLER_ENTRY(SPINEL_PROP_THREAD_ASSISTING_PORTS),
+ OT_NCP_REMOVE_HANDLER_ENTRY(SPINEL_PROP_IPV6_ADDRESS_TABLE),
+ OT_NCP_REMOVE_HANDLER_ENTRY(SPINEL_PROP_IPV6_MULTICAST_ADDRESS_TABLE),
+#if OPENTHREAD_FTD && OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
+ OT_NCP_REMOVE_HANDLER_ENTRY(SPINEL_PROP_MESHCOP_COMMISSIONER_JOINERS),
#endif
#if OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
- case SPINEL_PROP_SERVER_SERVICES:
- handler = &NcpBase::HandlePropertyRemove<SPINEL_PROP_SERVER_SERVICES>;
- break;
+ OT_NCP_REMOVE_HANDLER_ENTRY(SPINEL_PROP_SERVER_SERVICES),
#endif
-#endif // OPENTHREAD_MTD || OPENTHREAD_FTD
-
- // --------------------------------------------------------------------------
- // FTD Only Properties (Remove Handler)
-
-#if OPENTHREAD_FTD
- case SPINEL_PROP_THREAD_ACTIVE_ROUTER_IDS:
- handler = &NcpBase::HandlePropertyRemove<SPINEL_PROP_THREAD_ACTIVE_ROUTER_IDS>;
- break;
-#if OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
- case SPINEL_PROP_MESHCOP_COMMISSIONER_JOINERS:
- handler = &NcpBase::HandlePropertyRemove<SPINEL_PROP_MESHCOP_COMMISSIONER_JOINERS>;
- break;
+#endif // #if OPENTHREAD_MTD || OPENTHREAD_FTD
+ OT_NCP_REMOVE_HANDLER_ENTRY(SPINEL_PROP_UNSOL_UPDATE_FILTER),
+#if (OPENTHREAD_MTD || OPENTHREAD_FTD) && OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
+ OT_NCP_REMOVE_HANDLER_ENTRY(SPINEL_PROP_MAC_WHITELIST),
#endif
-#endif // OPENTHREAD_FTD
-
- // --------------------------------------------------------------------------
- // Raw Link API Properties (Remove Handler)
-
#if OPENTHREAD_RADIO || OPENTHREAD_CONFIG_LINK_RAW_ENABLE
- case SPINEL_PROP_MAC_SRC_MATCH_SHORT_ADDRESSES:
- handler = &NcpBase::HandlePropertyRemove<SPINEL_PROP_MAC_SRC_MATCH_SHORT_ADDRESSES>;
- break;
- case SPINEL_PROP_MAC_SRC_MATCH_EXTENDED_ADDRESSES:
- handler = &NcpBase::HandlePropertyRemove<SPINEL_PROP_MAC_SRC_MATCH_EXTENDED_ADDRESSES>;
- break;
+ OT_NCP_REMOVE_HANDLER_ENTRY(SPINEL_PROP_MAC_SRC_MATCH_SHORT_ADDRESSES),
+ OT_NCP_REMOVE_HANDLER_ENTRY(SPINEL_PROP_MAC_SRC_MATCH_EXTENDED_ADDRESSES),
+#endif
+#if (OPENTHREAD_MTD || OPENTHREAD_FTD) && OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
+ OT_NCP_REMOVE_HANDLER_ENTRY(SPINEL_PROP_MAC_BLACKLIST),
+ OT_NCP_REMOVE_HANDLER_ENTRY(SPINEL_PROP_MAC_FIXED_RSS),
+#endif
+#if OPENTHREAD_FTD
+ OT_NCP_REMOVE_HANDLER_ENTRY(SPINEL_PROP_THREAD_ACTIVE_ROUTER_IDS),
+#endif
+ };
+
+#undef OT_NCP_REMOVE_HANDLER_ENTRY
+
+#if __cplusplus >= 201103L
+ static_assert(AreHandlerEntriesSorted(sHandlerEntries, OT_ARRAY_LENGTH(sHandlerEntries)),
+ "NCP property setter entries not sorted!");
#endif
- default:
- handler = NULL;
+ return FindPropertyHandler(sHandlerEntries, OT_ARRAY_LENGTH(sHandlerEntries), aKey);
+}
+
+NcpBase::PropertyHandler NcpBase::FindPropertyHandler(const HandlerEntry *aHandlerEntries,
+ size_t aSize,
+ spinel_prop_key_t aKey)
+{
+ size_t l = 0;
+
+ assert(aSize > 0);
+
+ for (size_t r = aSize - 1; l < r;)
+ {
+ size_t m = (l + r) / 2;
+
+ if (aHandlerEntries[m].mKey < aKey)
+ {
+ l = m + 1;
+ }
+ else
+ {
+ r = m;
+ }
}
- return handler;
+ return aHandlerEntries[l].mKey == aKey ? aHandlerEntries[l].mHandler : NULL;
}
} // namespace Ncp
diff --git a/src/ncp/ncp_base_ftd.cpp b/src/ncp/ncp_base_ftd.cpp
index 152f763..dde5c9d 100644
--- a/src/ncp/ncp_base_ftd.cpp
+++ b/src/ncp/ncp_base_ftd.cpp
@@ -294,17 +294,34 @@
template <> otError NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_ROUTER_ROLE_ENABLED>(void)
{
- return mEncoder.WriteBool(otThreadIsRouterRoleEnabled(mInstance));
+ return mEncoder.WriteBool(otThreadIsRouterEligible(mInstance));
}
template <> otError NcpBase::HandlePropertySet<SPINEL_PROP_THREAD_ROUTER_ROLE_ENABLED>(void)
{
- bool enabled;
+ bool eligible;
otError error = OT_ERROR_NONE;
- SuccessOrExit(error = mDecoder.ReadBool(enabled));
+ SuccessOrExit(error = mDecoder.ReadBool(eligible));
- otThreadSetRouterRoleEnabled(mInstance, enabled);
+ error = otThreadSetRouterEligible(mInstance, eligible);
+
+exit:
+ return error;
+}
+
+template <> otError NcpBase::HandlePropertyGet<SPINEL_PROP_MAC_MAX_RETRY_NUMBER_INDIRECT>(void)
+{
+ return mEncoder.WriteUint8(otLinkGetMaxFrameRetriesIndirect(mInstance));
+}
+
+template <> otError NcpBase::HandlePropertySet<SPINEL_PROP_MAC_MAX_RETRY_NUMBER_INDIRECT>(void)
+{
+ uint8_t maxFrameRetriesIndirect;
+ otError error = OT_ERROR_NONE;
+
+ SuccessOrExit(error = mDecoder.ReadUint8(maxFrameRetriesIndirect));
+ otLinkSetMaxFrameRetriesIndirect(mInstance, maxFrameRetriesIndirect);
exit:
return error;
@@ -312,7 +329,7 @@
template <> otError NcpBase::HandlePropertyGet<SPINEL_PROP_NET_PSKC>(void)
{
- return mEncoder.WriteData(otThreadGetPSKc(mInstance)->m8, sizeof(spinel_net_pskc_t));
+ return mEncoder.WriteData(otThreadGetPskc(mInstance)->m8, sizeof(spinel_net_pskc_t));
}
template <> otError NcpBase::HandlePropertySet<SPINEL_PROP_NET_PSKC>(void)
@@ -325,7 +342,7 @@
VerifyOrExit(len == sizeof(spinel_net_pskc_t), error = OT_ERROR_PARSE);
- error = otThreadSetPSKc(mInstance, reinterpret_cast<const otPSKc *>(ptr));
+ error = otThreadSetPskc(mInstance, reinterpret_cast<const otPskc *>(ptr));
exit:
return error;
@@ -578,19 +595,7 @@
template <> otError NcpBase::HandlePropertyGet<SPINEL_PROP_MESHCOP_COMMISSIONER_PROVISIONING_URL>(void)
{
- otError error = OT_ERROR_NONE;
- uint16_t length = 0;
- const char *url = otCommissionerGetProvisioningUrl(mInstance, &length);
-
- if (url != NULL && length > 0)
- {
- SuccessOrExit(error = mEncoder.WriteData(reinterpret_cast<const uint8_t *>(url), length));
- }
-
- SuccessOrExit(error = mEncoder.WriteUint8(0));
-
-exit:
- return error;
+ return mEncoder.WriteUtf8(otCommissionerGetProvisioningUrl(mInstance));
}
template <> otError NcpBase::HandlePropertySet<SPINEL_PROP_MESHCOP_COMMISSIONER_PROVISIONING_URL>(void)
@@ -754,6 +759,32 @@
return error;
}
+otError NcpBase::HandlePropertySet_SPINEL_PROP_MESHCOP_COMMISSIONER_GENERATE_PSKC(uint8_t aHeader)
+{
+ otError error = OT_ERROR_NONE;
+ const char * passPhrase;
+ const char * networkName;
+ const uint8_t *extPanIdData;
+ uint16_t length;
+ otPskc pskc;
+
+ SuccessOrExit(error = mDecoder.ReadUtf8(passPhrase));
+ SuccessOrExit(error = mDecoder.ReadUtf8(networkName));
+ SuccessOrExit(error = mDecoder.ReadDataWithLen(extPanIdData, length));
+ VerifyOrExit(length == sizeof(spinel_net_xpanid_t), error = OT_ERROR_PARSE);
+
+ SuccessOrExit(error = otCommissionerGeneratePskc(passPhrase, networkName,
+ reinterpret_cast<const otExtendedPanId *>(extPanIdData), &pskc));
+
+ SuccessOrExit(
+ error = mEncoder.BeginFrame(aHeader, SPINEL_CMD_PROP_VALUE_IS, SPINEL_PROP_MESHCOP_COMMISSIONER_GENERATE_PSKC));
+ SuccessOrExit(error = mEncoder.WriteData(pskc.m8, sizeof(pskc)));
+ SuccessOrExit(error = mEncoder.EndFrame());
+
+exit:
+ return error;
+}
+
// SPINEL_PROP_THREAD_COMMISSIONER_ENABLED is replaced by SPINEL_PROP_MESHCOP_COMMISSIONER_STATE. Please use the new
// property. The old property/implementation remains for backward compatibility.
@@ -789,10 +820,10 @@
{
otError error = OT_ERROR_NONE;
const otExtAddress *eui64 = NULL;
- const char * aPSKd = NULL;
+ const char * pskd = NULL;
uint32_t joinerTimeout = 0;
- SuccessOrExit(error = mDecoder.ReadUtf8(aPSKd));
+ SuccessOrExit(error = mDecoder.ReadUtf8(pskd));
SuccessOrExit(error = mDecoder.ReadUint32(joinerTimeout));
if (mDecoder.ReadEui64(eui64) != OT_ERROR_NONE)
@@ -800,7 +831,7 @@
eui64 = NULL;
}
- error = otCommissionerAddJoiner(mInstance, eui64, aPSKd, joinerTimeout);
+ error = otCommissionerAddJoiner(mInstance, eui64, pskd, joinerTimeout);
exit:
return error;
@@ -833,7 +864,7 @@
SuccessOrExit(error = mDecoder.ReadEui64(mSteeringDataAddress));
- SuccessOrExit(error = otThreadSetSteeringData(mInstance, &mSteeringDataAddress));
+ otThreadSetSteeringData(mInstance, &mSteeringDataAddress);
exit:
return error;
diff --git a/src/ncp/ncp_base_mtd.cpp b/src/ncp/ncp_base_mtd.cpp
index 4926130..293dfc9 100644
--- a/src/ncp/ncp_base_mtd.cpp
+++ b/src/ncp/ncp_base_mtd.cpp
@@ -120,14 +120,13 @@
flags = SPINEL_ROUTE_PREFERENCE_LOW;
break;
- case OT_ROUTE_PREFERENCE_MED:
- flags = SPINEL_ROUTE_PREFERENCE_MEDIUM;
- break;
-
case OT_ROUTE_PREFERENCE_HIGH:
flags = SPINEL_ROUTE_PREFERENCE_HIGH;
break;
+ case OT_ROUTE_PREFERENCE_MED:
+ // fall through
+
default:
flags = SPINEL_ROUTE_PREFERENCE_MEDIUM;
break;
@@ -213,25 +212,21 @@
return mEncoder.WriteEui64(*otLinkGetExtendedAddress(mInstance));
}
-template <> otError NcpBase::HandlePropertyGet<SPINEL_PROP_PHY_FREQ>(void)
+template <> otError NcpBase::HandlePropertyGet<SPINEL_PROP_MAC_MAX_RETRY_NUMBER_DIRECT>(void)
{
- uint32_t freq_khz(0);
- const uint8_t chan(otLinkGetChannel(mInstance));
+ return mEncoder.WriteUint8(otLinkGetMaxFrameRetriesDirect(mInstance));
+}
- if (chan == 0)
- {
- freq_khz = 868300;
- }
- else if (chan < 11)
- {
- freq_khz = 906000 - (2000 * 1) + 2000 * (chan);
- }
- else if (chan < 26)
- {
- freq_khz = 2405000 - (5000 * 11) + 5000 * (chan);
- }
+template <> otError NcpBase::HandlePropertySet<SPINEL_PROP_MAC_MAX_RETRY_NUMBER_DIRECT>(void)
+{
+ uint8_t maxFrameRetriesDirect;
+ otError error = OT_ERROR_NONE;
- return mEncoder.WriteUint32(freq_khz);
+ SuccessOrExit(error = mDecoder.ReadUint8(maxFrameRetriesDirect));
+ otLinkSetMaxFrameRetriesDirect(mInstance, maxFrameRetriesDirect);
+
+exit:
+ return error;
}
template <> otError NcpBase::HandlePropertySet<SPINEL_PROP_PHY_CHAN_SUPPORTED>(void)
@@ -246,21 +241,11 @@
return error;
}
-otError NcpBase::CommandHandler_NET_SAVE(uint8_t aHeader)
-{
- return PrepareLastStatusResponse(aHeader, SPINEL_STATUS_UNIMPLEMENTED);
-}
-
otError NcpBase::CommandHandler_NET_CLEAR(uint8_t aHeader)
{
return PrepareLastStatusResponse(aHeader, ThreadErrorToSpinelStatus(otInstanceErasePersistentInfo(mInstance)));
}
-otError NcpBase::CommandHandler_NET_RECALL(uint8_t aHeader)
-{
- return PrepareLastStatusResponse(aHeader, SPINEL_STATUS_UNIMPLEMENTED);
-}
-
template <> otError NcpBase::HandlePropertyGet<SPINEL_PROP_NET_SAVED>(void)
{
return mEncoder.WriteBool(otDatasetIsCommissioned(mInstance));
@@ -614,8 +599,6 @@
return error;
}
-#if OPENTHREAD_CONFIG_ENABLE_TX_ERROR_RATE_TRACKING
-
template <> otError NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_NEIGHBOR_TABLE_ERROR_RATES>(void)
{
otError error = OT_ERROR_NONE;
@@ -640,8 +623,6 @@
return error;
}
-#endif // OPENTHREAD_CONFIG_ENABLE_TX_ERROR_RATE_TRACKING
-
template <> otError NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_ASSISTING_PORTS>(void)
{
otError error = OT_ERROR_NONE;
@@ -933,6 +914,7 @@
exit:
return error;
}
+#endif // OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
template <> otError NcpBase::HandlePropertyGet<SPINEL_PROP_SERVER_LEADER_SERVICES>(void)
{
@@ -940,7 +922,7 @@
otNetworkDataIterator iterator = OT_NETWORK_DATA_ITERATOR_INIT;
otServiceConfig cfg;
- while (otServerGetNextLeaderService(mInstance, &iterator, &cfg) == OT_ERROR_NONE)
+ while (otNetDataGetNextService(mInstance, &iterator, &cfg) == OT_ERROR_NONE)
{
SuccessOrExit(error = mEncoder.OpenStruct());
@@ -958,8 +940,6 @@
return error;
}
-#endif // OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
-
template <> otError NcpBase::HandlePropertyGet<SPINEL_PROP_THREAD_DISCOVERY_SCAN_JOINER_FLAG>(void)
{
return mEncoder.WriteBool(mDiscoveryScanJoinerFlag);
@@ -1043,8 +1023,8 @@
SuccessOrExit(mEncoder.OpenStruct());
SuccessOrExit(mEncoder.WriteUintPacked(SPINEL_PROP_IPV6_ML_PREFIX));
- SuccessOrExit(error = mEncoder.WriteIp6Address(addr)); // Mesh local prefix
- SuccessOrExit(error = mEncoder.WriteUint8(64)); // Prefix length (in bits)
+ SuccessOrExit(error = mEncoder.WriteIp6Address(addr)); // Mesh local prefix
+ SuccessOrExit(error = mEncoder.WriteUint8(OT_IP6_PREFIX_BITSIZE)); // Prefix length (in bits)
SuccessOrExit(mEncoder.CloseStruct());
}
@@ -1078,11 +1058,11 @@
SuccessOrExit(mEncoder.CloseStruct());
}
- if (aDataset.mComponents.mIsPSKcPresent)
+ if (aDataset.mComponents.mIsPskcPresent)
{
SuccessOrExit(mEncoder.OpenStruct());
SuccessOrExit(mEncoder.WriteUintPacked(SPINEL_PROP_NET_PSKC));
- SuccessOrExit(mEncoder.WriteData(aDataset.mPSKc.m8, sizeof(spinel_net_pskc_t)));
+ SuccessOrExit(mEncoder.WriteData(aDataset.mPskc.m8, sizeof(spinel_net_pskc_t)));
SuccessOrExit(mEncoder.CloseStruct());
}
@@ -1232,7 +1212,7 @@
SuccessOrExit(error = mDecoder.ReadIp6Address(addr));
SuccessOrExit(error = mDecoder.ReadUint8(prefixLen));
- VerifyOrExit(prefixLen == 64, error = OT_ERROR_INVALID_ARGS);
+ VerifyOrExit(prefixLen == OT_IP6_PREFIX_BITSIZE, error = OT_ERROR_INVALID_ARGS);
memcpy(aDataset.mMeshLocalPrefix.m8, addr, OT_MESH_LOCAL_PREFIX_SIZE);
}
@@ -1281,10 +1261,10 @@
SuccessOrExit(error = mDecoder.ReadData(psk, len));
VerifyOrExit(len == OT_PSKC_MAX_SIZE, error = OT_ERROR_INVALID_ARGS);
- memcpy(aDataset.mPSKc.m8, psk, OT_PSKC_MAX_SIZE);
+ memcpy(aDataset.mPskc.m8, psk, OT_PSKC_MAX_SIZE);
}
- aDataset.mComponents.mIsPSKcPresent = true;
+ aDataset.mComponents.mIsPskcPresent = true;
break;
case SPINEL_PROP_DATASET_SECURITY_POLICY:
@@ -1493,7 +1473,7 @@
if (action == false)
{
- error = otJoinerStop(mInstance);
+ otJoinerStop(mInstance);
ExitNow();
}
@@ -1566,8 +1546,8 @@
// Zero out the last 8 bytes.
memset(addr.mFields.m8 + 8, 0, 8);
- SuccessOrExit(error = mEncoder.WriteIp6Address(addr)); // Mesh local prefix
- SuccessOrExit(error = mEncoder.WriteUint8(64)); // Prefix length (in bits)
+ SuccessOrExit(error = mEncoder.WriteIp6Address(addr)); // Mesh local prefix
+ SuccessOrExit(error = mEncoder.WriteUint8(OT_IP6_PREFIX_BITSIZE)); // Prefix length (in bits)
exit:
return error;
@@ -1581,7 +1561,7 @@
SuccessOrExit(error = mDecoder.ReadIp6Address(meshLocalPrefix));
SuccessOrExit(error = mDecoder.ReadUint8(prefixLength));
- VerifyOrExit(prefixLength == 64, error = OT_ERROR_INVALID_ARGS);
+ VerifyOrExit(prefixLength == OT_IP6_PREFIX_BITSIZE, error = OT_ERROR_INVALID_ARGS);
error = otThreadSetMeshLocalPrefix(mInstance, reinterpret_cast<const otMeshLocalPrefix *>(meshLocalPrefix));
@@ -1968,18 +1948,8 @@
error = otIp6Send(mInstance, message);
- // `otIp6Send()` takes ownership of `message` (in both success or
- // failure cases). `message` is set to NULL so it is not freed at
- // exit.
- message = NULL;
-
exit:
- if (message != NULL)
- {
- otMessageFree(message);
- }
-
if (error == OT_ERROR_NONE)
{
mInboundSecureIpFrameCounter++;
@@ -2431,11 +2401,7 @@
otError error = OT_ERROR_NONE;
const otMacCounters *counters = otLinkGetCounters(mInstance);
- if (counters == NULL)
- {
- error = mEncoder.OverwriteWithLastStatusError(SPINEL_STATUS_INVALID_COMMAND_FOR_PROP);
- ExitNow();
- }
+ assert(counters != NULL);
// Encode Tx related counters
SuccessOrExit(error = mEncoder.OpenStruct());
@@ -2454,6 +2420,8 @@
SuccessOrExit(error = mEncoder.WriteUint32(counters->mTxErrCca));
SuccessOrExit(error = mEncoder.WriteUint32(counters->mTxErrAbort));
SuccessOrExit(error = mEncoder.WriteUint32(counters->mTxErrBusyChannel));
+ SuccessOrExit(error = mEncoder.WriteUint32(counters->mTxDirectMaxRetryExpiry));
+ SuccessOrExit(error = mEncoder.WriteUint32(counters->mTxIndirectMaxRetryExpiry));
SuccessOrExit(error = mEncoder.CloseStruct());
// Encode Rx related counters
@@ -2481,16 +2449,19 @@
return error;
}
+template <> otError NcpBase::HandlePropertySet<SPINEL_PROP_CNTR_ALL_MAC_COUNTERS>(void)
+{
+ otLinkResetCounters(mInstance);
+
+ return OT_ERROR_NONE;
+}
+
template <> otError NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_MLE_COUNTERS>(void)
{
otError error = OT_ERROR_NONE;
const otMleCounters *counters = otThreadGetMleCounters(mInstance);
- if (counters == NULL)
- {
- error = mEncoder.OverwriteWithLastStatusError(SPINEL_STATUS_INVALID_COMMAND_FOR_PROP);
- ExitNow();
- }
+ assert(counters != NULL);
SuccessOrExit(error = mEncoder.WriteUint16(counters->mDisabledRole));
SuccessOrExit(error = mEncoder.WriteUint16(counters->mDetachedRole));
@@ -2506,6 +2477,86 @@
return error;
}
+template <> otError NcpBase::HandlePropertySet<SPINEL_PROP_CNTR_MLE_COUNTERS>(void)
+{
+ otThreadResetMleCounters(mInstance);
+
+ return OT_ERROR_NONE;
+}
+
+template <> otError NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_ALL_IP_COUNTERS>(void)
+{
+ otError error = OT_ERROR_NONE;
+ const otIpCounters *counters = otThreadGetIp6Counters(mInstance);
+
+ assert(counters != NULL);
+
+ // Encode Tx related counters
+ SuccessOrExit(error = mEncoder.OpenStruct());
+ SuccessOrExit(error = mEncoder.WriteUint32(counters->mTxSuccess));
+ SuccessOrExit(error = mEncoder.WriteUint32(counters->mTxFailure));
+ SuccessOrExit(error = mEncoder.CloseStruct());
+
+ // Encode Rx related counters
+ SuccessOrExit(error = mEncoder.OpenStruct());
+ SuccessOrExit(error = mEncoder.WriteUint32(counters->mRxSuccess));
+ SuccessOrExit(error = mEncoder.WriteUint32(counters->mRxFailure));
+ SuccessOrExit(error = mEncoder.CloseStruct());
+
+exit:
+ return error;
+}
+
+#if OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_ENABLE
+template <> otError NcpBase::HandlePropertyGet<SPINEL_PROP_CNTR_MAC_RETRY_HISTOGRAM>(void)
+{
+ otError error = OT_ERROR_NONE;
+ const uint32_t *histogramDirect;
+ const uint32_t *histogramIndirect;
+ uint8_t histogramDirectEntries;
+ uint8_t histogramIndirectEntries;
+
+ histogramDirect = otLinkGetTxDirectRetrySuccessHistogram(mInstance, &histogramDirectEntries);
+ histogramIndirect = otLinkGetTxIndirectRetrySuccessHistogram(mInstance, &histogramIndirectEntries);
+
+ assert((histogramDirectEntries == 0) || (histogramDirect != NULL));
+ assert((histogramIndirectEntries == 0) || (histogramIndirect != NULL));
+
+ // Encode direct message retries histogram
+ SuccessOrExit(error = mEncoder.OpenStruct());
+ for (uint8_t i = 0; i < histogramDirectEntries; i++)
+ {
+ SuccessOrExit(error = mEncoder.WriteUint32(histogramDirect[i]));
+ }
+ SuccessOrExit(error = mEncoder.CloseStruct());
+
+ // Encode indirect message retries histogram
+ SuccessOrExit(error = mEncoder.OpenStruct());
+ for (uint8_t i = 0; i < histogramIndirectEntries; i++)
+ {
+ SuccessOrExit(error = mEncoder.WriteUint32(histogramIndirect[i]));
+ }
+ SuccessOrExit(error = mEncoder.CloseStruct());
+
+exit:
+ return error;
+}
+
+template <> otError NcpBase::HandlePropertySet<SPINEL_PROP_CNTR_MAC_RETRY_HISTOGRAM>(void)
+{
+ otLinkResetTxRetrySuccessHistogram(mInstance);
+
+ return OT_ERROR_NONE;
+}
+#endif // OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_ENABLE
+
+template <> otError NcpBase::HandlePropertySet<SPINEL_PROP_CNTR_ALL_IP_COUNTERS>(void)
+{
+ otThreadResetIp6Counters(mInstance);
+
+ return OT_ERROR_NONE;
+}
+
#if OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
template <> otError NcpBase::HandlePropertyGet<SPINEL_PROP_MAC_WHITELIST>(void)
@@ -2843,17 +2894,7 @@
error = otIp6Send(mInstance, message);
- // `otIp6Send()` takes ownership of `message` (in both success or
- // failure cases). `message` is set to NULL so it is not freed at
- // exit.
- message = NULL;
-
exit:
- if (message != NULL)
- {
- otMessageFree(message);
- }
-
if (error == OT_ERROR_NONE)
{
mInboundInsecureIpFrameCounter++;
@@ -2868,18 +2909,15 @@
template <> otError NcpBase::HandlePropertySet<SPINEL_PROP_CNTR_RESET>(void)
{
- uint8_t value = 0;
- otError error = OT_ERROR_NONE;
+ otLinkResetCounters(mInstance);
+#if OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_ENABLE
+ otLinkResetTxRetrySuccessHistogram(mInstance);
+#endif
+ otThreadResetIp6Counters(mInstance);
+ otThreadResetMleCounters(mInstance);
+ ResetCounters();
- SuccessOrExit(error = mDecoder.ReadUint8(value));
-
- VerifyOrExit(value == 1, error = OT_ERROR_INVALID_ARGS);
-
- // TODO: Implement counter reset!
- error = OT_ERROR_NOT_IMPLEMENTED;
-
-exit:
- return error;
+ return OT_ERROR_NONE;
}
template <> otError NcpBase::HandlePropertyInsert<SPINEL_PROP_THREAD_ASSISTING_PORTS>(void)
@@ -3613,8 +3651,8 @@
{OT_CHANGED_THREAD_NETDATA, SPINEL_PROP_THREAD_LEADER_NETWORK_DATA},
{OT_CHANGED_THREAD_CHILD_ADDED, SPINEL_PROP_THREAD_CHILD_TABLE},
{OT_CHANGED_THREAD_CHILD_REMOVED, SPINEL_PROP_THREAD_CHILD_TABLE},
- {OT_CHANGED_IP6_MULTICAST_SUBSRCRIBED, SPINEL_PROP_IPV6_MULTICAST_ADDRESS_TABLE},
- {OT_CHANGED_IP6_MULTICAST_UNSUBSRCRIBED, SPINEL_PROP_IPV6_MULTICAST_ADDRESS_TABLE},
+ {OT_CHANGED_IP6_MULTICAST_SUBSCRIBED, SPINEL_PROP_IPV6_MULTICAST_ADDRESS_TABLE},
+ {OT_CHANGED_IP6_MULTICAST_UNSUBSCRIBED, SPINEL_PROP_IPV6_MULTICAST_ADDRESS_TABLE},
{OT_CHANGED_THREAD_CHANNEL, SPINEL_PROP_PHY_CHAN},
{OT_CHANGED_THREAD_PANID, SPINEL_PROP_MAC_15_4_PANID},
{OT_CHANGED_THREAD_NETWORK_NAME, SPINEL_PROP_NET_NETWORK_NAME},
diff --git a/src/ncp/ncp_base_radio.cpp b/src/ncp/ncp_base_radio.cpp
index a6029b3..25d9120 100644
--- a/src/ncp/ncp_base_radio.cpp
+++ b/src/ncp/ncp_base_radio.cpp
@@ -371,7 +371,7 @@
// Set the default value for all optional parameters.
aFrame.mInfo.mTxInfo.mMaxCsmaBackoffs = OPENTHREAD_CONFIG_MAC_MAX_CSMA_BACKOFFS_DIRECT;
- aFrame.mInfo.mTxInfo.mMaxFrameRetries = OPENTHREAD_CONFIG_MAC_MAX_FRAME_RETRIES_DIRECT;
+ aFrame.mInfo.mTxInfo.mMaxFrameRetries = OPENTHREAD_CONFIG_MAC_DEFAULT_MAX_FRAME_RETRIES_DIRECT;
aFrame.mInfo.mTxInfo.mCsmaCaEnabled = true;
// All the next parameters are optional. Note that even if the
diff --git a/src/ncp/ncp_buffer.cpp b/src/ncp/ncp_buffer.cpp
index 6cd22fe..2a63f5b 100644
--- a/src/ncp/ncp_buffer.cpp
+++ b/src/ncp/ncp_buffer.cpp
@@ -34,7 +34,6 @@
#include "common/code_utils.hpp"
#include "common/debug.hpp"
-#include "utils/wrap_string.h"
namespace ot {
namespace Ncp {
diff --git a/src/ncp/ncp_config.h b/src/ncp/ncp_config.h
index 284923f..cc584c1 100644
--- a/src/ncp/ncp_config.h
+++ b/src/ncp/ncp_config.h
@@ -35,6 +35,10 @@
#ifndef CONFIG_NCP_H_
#define CONFIG_NCP_H_
+#ifndef OPENTHREAD_RADIO
+#define OPENTHREAD_RADIO 0
+#endif
+
/**
* @def OPENTHREAD_CONFIG_NCP_SPI_ENABLE
*
@@ -175,4 +179,14 @@
#define OPENTHREAD_CONFIG_NCP_ENABLE_MCU_POWER_STATE_CONTROL 0
#endif
+/**
+ * @def OPENTHREAD_ENABLE_NCP_VENDOR_HOOK
+ *
+ * TODO: complete.
+ *
+ */
+#ifndef OPENTHREAD_ENABLE_NCP_VENDOR_HOOK
+#define OPENTHREAD_ENABLE_NCP_VENDOR_HOOK 0
+#endif
+
#endif // CONFIG_NCP_H_
diff --git a/src/ncp/ncp_spi.cpp b/src/ncp/ncp_spi.cpp
index 3136479..d3b7829 100644
--- a/src/ncp/ncp_spi.cpp
+++ b/src/ncp/ncp_spi.cpp
@@ -60,7 +60,7 @@
#if OPENTHREAD_ENABLE_NCP_VENDOR_HOOK == 0
-static otDEFINE_ALIGNED_VAR(sNcpRaw, sizeof(NcpSpi), uint64_t);
+static OT_DEFINE_ALIGNED_VAR(sNcpRaw, sizeof(NcpSpi), uint64_t);
extern "C" void otNcpInit(otInstance *aInstance)
{
diff --git a/src/ncp/ncp_spi.hpp b/src/ncp/ncp_spi.hpp
index b2f5420..5018f29 100644
--- a/src/ncp/ncp_spi.hpp
+++ b/src/ncp/ncp_spi.hpp
@@ -164,6 +164,14 @@
bool IsValid(void) const { return ((mBuffer[kIndexFlagByte] & kFlagPatternMask) == kFlagPattern); }
/**
+ * This method indicates whether or not the "RST" bit is set.
+ *
+ * @returns TRUE if the "RST" bit is set, FALSE otherwise.
+ *
+ */
+ bool IsResetFlagSet(void) const { return ((mBuffer[kIndexFlagByte] & kFlagReset) == kFlagReset); }
+
+ /**
* This method sets the "flag byte" field in the SPI frame header.
*
* @param[in] aResetFlag The status of reset flag (TRUE to set the flag, FALSE to clear flag).
@@ -172,6 +180,14 @@
void SetHeaderFlagByte(bool aResetFlag) { mBuffer[kIndexFlagByte] = kFlagPattern | (aResetFlag ? kFlagReset : 0); }
/**
+ * This method gets the "flag byte" field in the SPI frame header.
+ *
+ * @returns The flag byte.
+ *
+ */
+ uint8_t GetHeaderFlagByte(void) const { return mBuffer[kIndexFlagByte]; }
+
+ /**
* This method sets the "accept len" field in the SPI frame header.
*
* "accept len" specifies number of bytes the sender of the SPI frame can receive.
diff --git a/src/ncp/ncp_uart.cpp b/src/ncp/ncp_uart.cpp
index 8c70c14..60f27f0 100644
--- a/src/ncp/ncp_uart.cpp
+++ b/src/ncp/ncp_uart.cpp
@@ -64,7 +64,7 @@
#if OPENTHREAD_ENABLE_NCP_VENDOR_HOOK == 0
-static otDEFINE_ALIGNED_VAR(sNcpRaw, sizeof(NcpUart), uint64_t);
+static OT_DEFINE_ALIGNED_VAR(sNcpRaw, sizeof(NcpUart), uint64_t);
extern "C" void otNcpInit(otInstance *aInstance)
{
diff --git a/src/ncp/ncp_uart.hpp b/src/ncp/ncp_uart.hpp
index e652c79..8e61e72 100644
--- a/src/ncp/ncp_uart.hpp
+++ b/src/ncp/ncp_uart.hpp
@@ -38,9 +38,9 @@
#include "ncp/hdlc.hpp"
#include "ncp/ncp_base.hpp"
-#if OPENTHREAD_CONFIG_NCP_SPI_ENABLENEL_ENCRYPTER
+#if OPENTHREAD_ENABLE_NCP_SPINEL_ENCRYPTER
#include "spinel_encrypter.hpp"
-#endif // OPENTHREAD_CONFIG_NCP_SPI_ENABLENEL_ENCRYPTER
+#endif // OPENTHREAD_ENABLE_NCP_SPINEL_ENCRYPTER
namespace ot {
namespace Ncp {
@@ -85,7 +85,7 @@
kFinalizingFrame, // Finalizing a frame.
};
-#if OPENTHREAD_CONFIG_NCP_SPI_ENABLENEL_ENCRYPTER
+#if OPENTHREAD_ENABLE_NCP_SPINEL_ENCRYPTER
/**
* Wraps NcpFrameBuffer allowing to read data through spinel encrypter.
* Creates additional buffers to allow transforming of the whole spinel frames.
@@ -112,7 +112,7 @@
size_t mDataBufferReadIndex;
size_t mOutputDataLength;
};
-#endif // OPENTHREAD_CONFIG_NCP_SPI_ENABLENEL_ENCRYPTER
+#endif // OPENTHREAD_ENABLE_NCP_SPINEL_ENCRYPTER
void EncodeAndSendToUart(void);
void HandleFrame(otError aError);
@@ -136,9 +136,9 @@
bool mUartSendImmediate;
Tasklet mUartSendTask;
-#if OPENTHREAD_CONFIG_NCP_SPI_ENABLENEL_ENCRYPTER
+#if OPENTHREAD_ENABLE_NCP_SPINEL_ENCRYPTER
NcpFrameBufferEncrypterReader mTxFrameBufferEncrypterReader;
-#endif // OPENTHREAD_CONFIG_NCP_SPI_ENABLENEL_ENCRYPTER
+#endif // OPENTHREAD_ENABLE_NCP_SPINEL_ENCRYPTER
};
} // namespace Ncp
diff --git a/src/ncp/spinel.c b/src/ncp/spinel.c
index 1b0184d..a041c66 100644
--- a/src/ncp/spinel.c
+++ b/src/ncp/spinel.c
@@ -84,6 +84,22 @@
#define ENOMEM 1
#endif
+#ifndef SPINEL_PLATFORM_SHOULD_LOG_ASSERTS
+#define SPINEL_PLATFORM_SHOULD_LOG_ASSERTS 0
+#endif
+
+#ifndef SPINEL_PLATFORM_DOESNT_IMPLEMENT_ERRNO_VAR
+#define SPINEL_PLATFORM_DOESNT_IMPLEMENT_ERRNO_VAR 0
+#endif
+
+#ifndef SPINEL_PLATFORM_DOESNT_IMPLEMENT_FPRINTF
+#define SPINEL_PLATFORM_DOESNT_IMPLEMENT_FPRINTF 0
+#endif
+
+#ifndef SPINEL_SELF_TEST
+#define SPINEL_SELF_TEST 0
+#endif
+
#if defined(errno) && SPINEL_PLATFORM_DOESNT_IMPLEMENT_ERRNO_VAR
#error "SPINEL_PLATFORM_DOESNT_IMPLEMENT_ERRNO_VAR is set but errno is already defined."
#endif
@@ -131,6 +147,20 @@
#define require(c, l) require_action(c, l, {})
#endif
+#ifndef strnlen
+size_t strnlen(const char *s, size_t maxlen)
+{
+ size_t ret;
+
+ for (ret = 0; (ret < maxlen) && (s[ret] != 0); ret++)
+ {
+ // Empty loop.
+ }
+
+ return ret;
+}
+#endif
+
typedef struct
{
va_list obj;
@@ -1116,7 +1146,7 @@
// LCOV_EXCL_START
-const char *spinel_command_to_cstr(unsigned int command)
+const char *spinel_command_to_cstr(spinel_command_t command)
{
const char *ret = "UNKNOWN";
@@ -1407,10 +1437,18 @@
ret = "CHANNEL_MONITOR_CHANNEL_OCCUPANCY";
break;
+ case SPINEL_PROP_RADIO_CAPS:
+ ret = "RADIO_CAPS";
+ break;
+
case SPINEL_PROP_RADIO_COEX_METRICS:
ret = "RADIO_COEX_METRICS";
break;
+ case SPINEL_PROP_RADIO_COEX_ENABLE:
+ ret = "RADIO_COEX_ENABLE";
+ break;
+
case SPINEL_PROP_MAC_SCAN_STATE:
ret = "MAC_SCAN_STATE";
break;
@@ -1495,6 +1533,14 @@
ret = "MAC_CCA_FAILURE_RATE";
break;
+ case SPINEL_PROP_MAC_MAX_RETRY_NUMBER_DIRECT:
+ ret = "MAC_MAX_RETRY_NUMBER_DIRECT";
+ break;
+
+ case SPINEL_PROP_MAC_MAX_RETRY_NUMBER_INDIRECT:
+ ret = "MAC_MAX_RETRY_NUMBER_INDIRECT";
+ break;
+
case SPINEL_PROP_NET_SAVED:
ret = "NET_SAVED";
break;
@@ -1871,6 +1917,10 @@
ret = "MESHCOP_COMMISSIONER_MGMT_SET";
break;
+ case SPINEL_PROP_MESHCOP_COMMISSIONER_GENERATE_PSKC:
+ ret = "MESHCOP_COMMISSIONER_GENERATE_PSKC";
+ break;
+
case SPINEL_PROP_CHANNEL_MANAGER_NEW_CHANNEL:
ret = "CHANNEL_MANAGER_NEW_CHANNEL";
break;
@@ -2159,6 +2209,14 @@
ret = "CNTR_MLE_COUNTERS";
break;
+ case SPINEL_PROP_CNTR_ALL_IP_COUNTERS:
+ ret = "CNTR_ALL_IP_COUNTERS";
+ break;
+
+ case SPINEL_PROP_CNTR_MAC_RETRY_HISTOGRAM:
+ ret = "CNTR_MAC_RETRY_HISTOGRAM";
+ break;
+
case SPINEL_PROP_NEST_STREAM_MFG:
ret = "NEST_STREAM_MFG";
break;
@@ -2219,7 +2277,7 @@
return ret;
}
-const char *spinel_mcu_power_state_to_cstr(spinel_mcu_power_state_t mcu_power_state)
+const char *spinel_mcu_power_state_to_cstr(uint8_t mcu_power_state)
{
const char *ret = "MCU_POWER_STATE_UNKNOWN";
@@ -2236,6 +2294,9 @@
case SPINEL_MCU_POWER_STATE_OFF:
ret = "MCU_POWER_STATE_OFF";
break;
+
+ default:
+ break;
}
return ret;
@@ -2402,7 +2463,7 @@
return ret;
}
-const char *spinel_capability_to_cstr(unsigned int capability)
+const char *spinel_capability_to_cstr(spinel_capability_t capability)
{
const char *ret = "UNKNOWN";
@@ -2576,6 +2637,14 @@
ret = "SLAAC";
break;
+ case SPINEL_CAP_RADIO_COEX:
+ ret = "RADIO_COEX";
+ break;
+
+ case SPINEL_CAP_MAC_RETRY_HISTOGRAM:
+ ret = "MAC_RETRY_HISTOGRAM";
+ break;
+
case SPINEL_CAP_ERROR_RATE_TRACKING:
ret = "ERROR_RATE_TRACKING";
break;
diff --git a/src/ncp/spinel.h b/src/ncp/spinel.h
index 3deb0a6..c96d792 100644
--- a/src/ncp/spinel.h
+++ b/src/ncp/spinel.h
@@ -374,7 +374,7 @@
extern "C" {
#endif
-typedef enum
+enum
{
SPINEL_STATUS_OK = 0, ///< Operation has completed successfully.
SPINEL_STATUS_FAILURE = 1, ///< Operation has failed for some undefined reason.
@@ -469,7 +469,9 @@
SPINEL_STATUS_EXPERIMENTAL__BEGIN = 2000000,
SPINEL_STATUS_EXPERIMENTAL__END = 2097152,
-} spinel_status_t;
+};
+
+typedef uint32_t spinel_status_t;
typedef enum
{
@@ -656,7 +658,6 @@
typedef int spinel_ssize_t;
typedef unsigned int spinel_size_t;
typedef uint8_t spinel_tid_t;
-typedef unsigned int spinel_cid_t;
enum
{
@@ -992,6 +993,8 @@
SPINEL_CMD_EXPERIMENTAL__END = 2097152,
};
+typedef uint32_t spinel_command_t;
+
enum
{
SPINEL_CAP_LOCK = 1,
@@ -1054,6 +1057,8 @@
SPINEL_CAP_CHILD_SUPERVISION = (SPINEL_CAP_OPENTHREAD__BEGIN + 8),
SPINEL_CAP_POSIX_APP = (SPINEL_CAP_OPENTHREAD__BEGIN + 9),
SPINEL_CAP_SLAAC = (SPINEL_CAP_OPENTHREAD__BEGIN + 10),
+ SPINEL_CAP_RADIO_COEX = (SPINEL_CAP_OPENTHREAD__BEGIN + 11),
+ SPINEL_CAP_MAC_RETRY_HISTOGRAM = (SPINEL_CAP_OPENTHREAD__BEGIN + 12),
SPINEL_CAP_OPENTHREAD__END = 640,
SPINEL_CAP_THREAD__BEGIN = 1024,
@@ -1078,6 +1083,8 @@
SPINEL_CAP_EXPERIMENTAL__END = 2097152,
};
+typedef uint32_t spinel_capability_t;
+
/**
* Property Keys
*
@@ -1105,7 +1112,7 @@
* Experimental | 2,000,000 - 2,097,151 | Experimental use only
*
*/
-typedef enum
+enum
{
/// Last Operation Status
/** Format: `i` - Read-only
@@ -1630,6 +1637,8 @@
/// All coex metrics related counters.
/** Format: t(LLLLLLLL)t(LLLLLLLLL)bL (Read-only)
*
+ * Required capability: SPINEL_CAP_RADIO_COEX
+ *
* The contents include two structures and two common variables, first structure corresponds to
* all transmit related coex counters, second structure provides the receive related counters.
*
@@ -1664,6 +1673,15 @@
*/
SPINEL_PROP_RADIO_COEX_METRICS = SPINEL_PROP_PHY_EXT__BEGIN + 12,
+ /// Radio Coex Enable
+ /** Format: `b`
+ *
+ * Required capability: SPINEL_CAP_RADIO_COEX
+ *
+ * Indicates if radio coex is enabled or disabled. Set to true to enable radio coex.
+ */
+ SPINEL_PROP_RADIO_COEX_ENABLE = SPINEL_PROP_PHY_EXT__BEGIN + 13,
+
SPINEL_PROP_PHY_EXT__END = 0x1300,
SPINEL_PROP_MAC__BEGIN = 0x30,
@@ -1915,6 +1933,23 @@
*/
SPINEL_PROP_MAC_CCA_FAILURE_RATE = SPINEL_PROP_MAC_EXT__BEGIN + 9,
+ /// MAC Max direct retry number
+ /** Format: `C`
+ *
+ * The maximum (user-specified) number of direct frame transmission retries.
+ *
+ */
+ SPINEL_PROP_MAC_MAX_RETRY_NUMBER_DIRECT = SPINEL_PROP_MAC_EXT__BEGIN + 10,
+
+ /// MAC Max indirect retry number
+ /** Format: `C`
+ * Required capability: `SPINEL_CAP_CONFIG_FTD`
+ *
+ * The maximum (user-specified) number of indirect frame transmission retries.
+ *
+ */
+ SPINEL_PROP_MAC_MAX_RETRY_NUMBER_INDIRECT = SPINEL_PROP_MAC_EXT__BEGIN + 11,
+
SPINEL_PROP_MAC_EXT__END = 0x1400,
SPINEL_PROP_NET__BEGIN = 0x40,
@@ -2956,6 +2991,7 @@
* `SPINEL_NCP_LOG_LEVEL_<level>`)
* `i`: OpenThread Log region (as per definition in enumeration
* `SPINEL_NCP_LOG_REGION_<region>).
+ * `X`: Log timestamp = <timestamp_base> + <current_time_ms>
*
*/
SPINEL_PROP_STREAM_LOG = SPINEL_PROP_STREAM__BEGIN + 4,
@@ -3179,6 +3215,29 @@
*/
SPINEL_PROP_MESHCOP_COMMISSIONER_MGMT_SET = SPINEL_PROP_MESHCOP_EXT__BEGIN + 6,
+ // Thread Commissioner Generate PSKc
+ /** Format: `UUd` - Write only
+ *
+ * Required capability: SPINEL_CAP_THREAD_COMMISSIONER
+ *
+ * Writing to this property allows user to generate PSKc from a given commissioning pass-phrase, network name,
+ * extended PAN Id.
+ *
+ * Written value format is:
+ *
+ * `U` : The commissioning pass-phrase.
+ * `U` : Network Name.
+ * `d` : Extended PAN ID.
+ *
+ * The response on success would be a `VALUE_IS` command with the PSKc with format below:
+ *
+ * `D` : The PSKc
+ *
+ * On a failure a `LAST_STATUS` is emitted with the error status.
+ *
+ */
+ SPINEL_PROP_MESHCOP_COMMISSIONER_GENERATE_PSKC = SPINEL_PROP_MESHCOP_EXT__BEGIN + 7,
+
SPINEL_PROP_MESHCOP_EXT__END = 0x1900,
SPINEL_PROP_OPENTHREAD__BEGIN = 0x1900,
@@ -3429,8 +3488,6 @@
*
* This property provides all services registered on the leader
*
- * Required capability: SPINEL_CAP_THREAD_SERVICE
- *
* Array of structures containing:
*
* `C`: Service ID
@@ -3502,10 +3559,12 @@
SPINEL_PROP_CNTR__BEGIN = 0x500,
- /// Counter reset behavior
- /** Format: `C`
- * Writing a '1' to this property will reset
- * all of the counters to zero. */
+ /// Counter reset
+ /** Format: Empty (Write only).
+ *
+ * Writing to this property (with any value) will reset all MAC, MLE, IP, and NCP counters to zero.
+ *
+ */
SPINEL_PROP_CNTR_RESET = SPINEL_PROP_CNTR__BEGIN + 0,
/// The total number of transmissions.
@@ -3710,7 +3769,7 @@
SPINEL_PROP_MSG_BUFFER_COUNTERS = SPINEL_PROP_CNTR__BEGIN + 400,
/// All MAC related counters.
- /** Format: t(A(L))t(A(L)) (Read-only)
+ /** Format: t(A(L))t(A(L))
*
* The contents include two structs, first one corresponds to
* all transmit related MAC counters, second one provides the
@@ -3718,46 +3777,52 @@
*
* The transmit structure includes:
*
- * 'L': TxTotal (The total number of transmissions).
- * 'L': TxUnicast (The total number of unicast transmissions).
- * 'L': TxBroadcast (The total number of broadcast transmissions).
- * 'L': TxAckRequested (The number of transmissions with ack request).
- * 'L': TxAcked (The number of transmissions that were acked).
- * 'L': TxNoAckRequested (The number of transmissions without ack request).
- * 'L': TxData (The number of transmitted data).
- * 'L': TxDataPoll (The number of transmitted data poll).
- * 'L': TxBeacon (The number of transmitted beacon).
- * 'L': TxBeaconRequest (The number of transmitted beacon request).
- * 'L': TxOther (The number of transmitted other types of frames).
- * 'L': TxRetry (The number of retransmission times).
- * 'L': TxErrCca (The number of CCA failure times).
- * 'L': TxErrAbort (The number of frame transmission failures due to abort error).
- * 'L': TxErrBusyChannel (The number of frames that were dropped due to a busy channel).
+ * 'L': TxTotal (The total number of transmissions).
+ * 'L': TxUnicast (The total number of unicast transmissions).
+ * 'L': TxBroadcast (The total number of broadcast transmissions).
+ * 'L': TxAckRequested (The number of transmissions with ack request).
+ * 'L': TxAcked (The number of transmissions that were acked).
+ * 'L': TxNoAckRequested (The number of transmissions without ack request).
+ * 'L': TxData (The number of transmitted data).
+ * 'L': TxDataPoll (The number of transmitted data poll).
+ * 'L': TxBeacon (The number of transmitted beacon).
+ * 'L': TxBeaconRequest (The number of transmitted beacon request).
+ * 'L': TxOther (The number of transmitted other types of frames).
+ * 'L': TxRetry (The number of retransmission times).
+ * 'L': TxErrCca (The number of CCA failure times).
+ * 'L': TxErrAbort (The number of frame transmission failures due to abort error).
+ * 'L': TxErrBusyChannel (The number of frames that were dropped due to a busy channel).
+ * 'L': TxDirectMaxRetryExpiry (The number of expired retransmission retries for direct message).
+ * 'L': TxIndirectMaxRetryExpiry (The number of expired retransmission retries for indirect message).
*
* The receive structure includes:
*
- * 'L': RxTotal (The total number of received packets).
- * 'L': RxUnicast (The total number of unicast packets received).
- * 'L': RxBroadcast (The total number of broadcast packets received).
- * 'L': RxData (The number of received data).
- * 'L': RxDataPoll (The number of received data poll).
- * 'L': RxBeacon (The number of received beacon).
- * 'L': RxBeaconRequest (The number of received beacon request).
- * 'L': RxOther (The number of received other types of frames).
- * 'L': RxAddressFiltered (The number of received packets filtered by address filter (whitelist or blacklist)).
- * 'L': RxDestAddrFiltered (The number of received packets filtered by destination check).
- * 'L': RxDuplicated (The number of received duplicated packets).
- * 'L': RxErrNoFrame (The number of received packets with no or malformed content).
- * 'L': RxErrUnknownNeighbor (The number of received packets from unknown neighbor).
- * 'L': RxErrInvalidSrcAddr (The number of received packets whose source address is invalid).
- * 'L': RxErrSec (The number of received packets with security error).
- * 'L': RxErrFcs (The number of received packets with FCS error).
- * 'L': RxErrOther (The number of received packets with other error).
+ * 'L': RxTotal (The total number of received packets).
+ * 'L': RxUnicast (The total number of unicast packets received).
+ * 'L': RxBroadcast (The total number of broadcast packets received).
+ * 'L': RxData (The number of received data).
+ * 'L': RxDataPoll (The number of received data poll).
+ * 'L': RxBeacon (The number of received beacon).
+ * 'L': RxBeaconRequest (The number of received beacon request).
+ * 'L': RxOther (The number of received other types of frames).
+ * 'L': RxAddressFiltered (The number of received packets filtered by address filter
+ * (whitelist or blacklist)).
+ * 'L': RxDestAddrFiltered (The number of received packets filtered by destination check).
+ * 'L': RxDuplicated (The number of received duplicated packets).
+ * 'L': RxErrNoFrame (The number of received packets with no or malformed content).
+ * 'L': RxErrUnknownNeighbor (The number of received packets from unknown neighbor).
+ * 'L': RxErrInvalidSrcAddr (The number of received packets whose source address is invalid).
+ * 'L': RxErrSec (The number of received packets with security error).
+ * 'L': RxErrFcs (The number of received packets with FCS error).
+ * 'L': RxErrOther (The number of received packets with other error).
+ *
+ * Writing to this property with any value would reset all MAC counters to zero.
+ *
*/
SPINEL_PROP_CNTR_ALL_MAC_COUNTERS = SPINEL_PROP_CNTR__BEGIN + 401,
/// Thread MLE counters.
- /** Format: `SSSSSSSSS` (Read-only)
+ /** Format: `SSSSSSSSS`
*
* 'S': DisabledRole (The number of times device entered OT_DEVICE_ROLE_DISABLED role).
* 'S': DetachedRole (The number of times device entered OT_DEVICE_ROLE_DETACHED role).
@@ -3769,9 +3834,60 @@
* 'S': BetterPartitionAttachAttempts (The number of attempts to attach to a better partition).
* 'S': ParentChanges (The number of times device changed its parents).
*
+ * Writing to this property with any value would reset all MLE counters to zero.
+ *
*/
SPINEL_PROP_CNTR_MLE_COUNTERS = SPINEL_PROP_CNTR__BEGIN + 402,
+ /// Thread IPv6 counters.
+ /** Format: `t(LL)t(LL)`
+ *
+ * The contents include two structs, first one corresponds to
+ * all transmit related MAC counters, second one provides the
+ * receive related counters.
+ *
+ * The transmit structure includes:
+ * 'L': TxSuccess (The number of IPv6 packets successfully transmitted).
+ * 'L': TxFailure (The number of IPv6 packets failed to transmit).
+ *
+ * The receive structure includes:
+ * 'L': RxSuccess (The number of IPv6 packets successfully received).
+ * 'L': RxFailure (The number of IPv6 packets failed to receive).
+ *
+ * Writing to this property with any value would reset all IPv6 counters to zero.
+ *
+ */
+ SPINEL_PROP_CNTR_ALL_IP_COUNTERS = SPINEL_PROP_CNTR__BEGIN + 403,
+
+ /// MAC retry histogram.
+ /** Format: t(A(L))t(A(L))
+ *
+ * Required capability: SPINEL_CAP_MAC_RETRY_HISTOGRAM
+ *
+ * The contents include two structs, first one is histogram which corresponds to retransmissions number of direct
+ * messages, second one provides the histogram of retransmissions for indirect messages.
+ *
+ * The first structure includes:
+ * 'L': DirectRetry[0] (The number of packets after 0 retry).
+ * 'L': DirectRetry[1] (The number of packets after 1 retry).
+ * ...
+ * 'L': DirectRetry[n] (The number of packets after n retry).
+ *
+ * The size of the array is OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_MAX_SIZE_COUNT_DIRECT.
+ *
+ * The second structure includes:
+ * 'L': IndirectRetry[0] (The number of packets after 0 retry).
+ * 'L': IndirectRetry[1] (The number of packets after 1 retry).
+ * ...
+ * 'L': IndirectRetry[m] (The number of packets after m retry).
+ *
+ * The size of the array is OPENTHREAD_CONFIG_MAC_RETRY_SUCCESS_HISTOGRAM_MAX_SIZE_COUNT_INDIRECT.
+ *
+ * Writing to this property with any value would reset MAC retry histogram.
+ *
+ */
+ SPINEL_PROP_CNTR_MAC_RETRY_HISTOGRAM = SPINEL_PROP_CNTR__BEGIN + 404,
+
SPINEL_PROP_CNTR__END = 0x800,
SPINEL_PROP_NEST__BEGIN = 0x3BC0,
@@ -3817,11 +3933,21 @@
*/
SPINEL_PROP_DEBUG_TEST_WATCHDOG = SPINEL_PROP_DEBUG__BEGIN + 2,
+ /// The NCP timestamp base
+ /** Format: X (write-only)
+ *
+ * This property controls the time base value that is used for logs timestamp field calulation.
+ *
+ */
+ SPINEL_PROP_DEBUG_LOG_TIMESTAMP_BASE = SPINEL_PROP_DEBUG__BEGIN + 3,
+
SPINEL_PROP_DEBUG__END = 0x4400,
SPINEL_PROP_EXPERIMENTAL__BEGIN = 2000000,
SPINEL_PROP_EXPERIMENTAL__END = 2097152,
-} spinel_prop_key_t;
+};
+
+typedef uint32_t spinel_prop_key_t;
// ----------------------------------------------------------------------------
@@ -3994,17 +4120,17 @@
// ----------------------------------------------------------------------------
-SPINEL_API_EXTERN const char *spinel_command_to_cstr(unsigned int command);
+SPINEL_API_EXTERN const char *spinel_command_to_cstr(spinel_command_t command);
SPINEL_API_EXTERN const char *spinel_prop_key_to_cstr(spinel_prop_key_t prop_key);
SPINEL_API_EXTERN const char *spinel_net_role_to_cstr(uint8_t net_role);
-SPINEL_API_EXTERN const char *spinel_mcu_power_state_to_cstr(spinel_mcu_power_state_t mcu_power_state);
+SPINEL_API_EXTERN const char *spinel_mcu_power_state_to_cstr(uint8_t mcu_power_state);
SPINEL_API_EXTERN const char *spinel_status_to_cstr(spinel_status_t status);
-SPINEL_API_EXTERN const char *spinel_capability_to_cstr(unsigned int capability);
+SPINEL_API_EXTERN const char *spinel_capability_to_cstr(spinel_capability_t capability);
// ----------------------------------------------------------------------------
diff --git a/src/ncp/spinel_decoder.cpp b/src/ncp/spinel_decoder.cpp
index 5535e68..43f1618 100644
--- a/src/ncp/spinel_decoder.cpp
+++ b/src/ncp/spinel_decoder.cpp
@@ -35,6 +35,7 @@
#include "spinel_decoder.hpp"
#include "common/code_utils.hpp"
+#include "common/string.hpp"
namespace ot {
namespace Ncp {
@@ -298,7 +299,7 @@
// Ensure there is at least one byte (for null character).
VerifyOrExit(mIndex + sizeof(uint8_t) <= mEnd, error = OT_ERROR_PARSE);
- len = strnlen(reinterpret_cast<const char *>(&mFrame[mIndex]), mEnd - mIndex);
+ len = StringLength(reinterpret_cast<const char *>(&mFrame[mIndex]), mEnd - mIndex);
VerifyOrExit(len < static_cast<uint16_t>(mEnd - mIndex), error = OT_ERROR_PARSE);
aUtf8 = reinterpret_cast<const char *>(&mFrame[mIndex]);
diff --git a/src/ncp/spinel_encoder.cpp b/src/ncp/spinel_encoder.cpp
index 91ab7c3..332a04b 100644
--- a/src/ncp/spinel_encoder.cpp
+++ b/src/ncp/spinel_encoder.cpp
@@ -32,6 +32,8 @@
#include "spinel_encoder.hpp"
+#include <string.h>
+
#include "common/code_utils.hpp"
namespace ot {
diff --git a/src/ncp/spinel_platform.h b/src/ncp/spinel_platform.h
index 1468d18..d0263cb 100644
--- a/src/ncp/spinel_platform.h
+++ b/src/ncp/spinel_platform.h
@@ -52,11 +52,10 @@
#include "openthread-core-config.h"
#include <stdarg.h>
+#include <stdbool.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
-
-#include "utils/wrap_stdbool.h"
-#include "utils/wrap_string.h"
+#include <string.h>
#endif // SPINEL_PLATFORM_OPENTHREAD_H_
diff --git a/src/posix/CMakeLists.txt b/src/posix/CMakeLists.txt
new file mode 100644
index 0000000..920584f
--- /dev/null
+++ b/src/posix/CMakeLists.txt
@@ -0,0 +1,98 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+set(COMMON_INCLUDES
+ ${OT_PUBLIC_INCLUDES}
+ ${OT_PRIVATE_INCLUDES}
+ ${PROJECT_SOURCE_DIR}/src/core
+ ${PROJECT_SOURCE_DIR}/src/posix/platform
+)
+
+if(OT_DAEMON)
+ add_executable(ot-daemon
+ main.c
+ )
+
+ target_include_directories(ot-daemon PRIVATE ${COMMON_INCLUDES})
+
+ target_compile_definitions(ot-daemon PRIVATE
+ OPENTHREAD_POSIX_APP_TYPE=2
+ )
+
+ target_link_libraries(ot-daemon PRIVATE
+ openthread-cli-ftd
+ ${OT_PLATFORM_LIB}
+ openthread-ftd
+ ${OT_PLATFORM_LIB}
+ openthread-ncp-ftd
+ mbedcrypto
+ )
+
+ add_executable(ot-ctl
+ client.c
+ )
+
+ target_include_directories(ot-ctl PRIVATE ${COMMON_INCLUDES})
+else()
+ add_executable(ot-cli
+ main.c
+ )
+
+ target_include_directories(ot-cli PRIVATE ${COMMON_INCLUDES})
+
+ target_compile_definitions(ot-cli PRIVATE
+ OPENTHREAD_POSIX_APP_TYPE=2
+ )
+
+ target_link_libraries(ot-cli
+ openthread-cli-ftd
+ ${OT_PLATFORM_LIB}
+ openthread-ftd
+ ${OT_PLATFORM_LIB}
+ mbedcrypto
+ openthread-ncp-ftd
+ )
+
+ add_executable(ot-ncp
+ main.c
+ )
+ target_include_directories(ot-ncp PRIVATE ${COMMON_INCLUDES})
+
+ target_compile_definitions(ot-ncp PRIVATE
+ OPENTHREAD_POSIX_APP_TYPE=1
+ )
+
+ target_link_libraries(ot-ncp
+ openthread-ncp-ftd
+ ${OT_PLATFORM_LIB}
+ openthread-ftd
+ ${OT_PLATFORM_LIB}
+ mbedcrypto
+ openthread-ncp-ftd
+ )
+endif()
diff --git a/src/posix/Makefile-posix b/src/posix/Makefile-posix
index e407163..2c9a4d7 100644
--- a/src/posix/Makefile-posix
+++ b/src/posix/Makefile-posix
@@ -48,7 +48,9 @@
DHCP6_SERVER ?= 1
DIAGNOSTIC ?= 1
DNS_CLIENT ?= 1
+DYNAMIC_LOG_LEVEL ?= 1
ECDSA ?= 1
+IP6_FRAGM ?= 1
JAM_DETECTION ?= 1
JOINER ?= 1
LEGACY ?= 1
@@ -100,6 +102,12 @@
configure_OPTIONS += --with-readline=$(READLINE)
endif
+ifeq ($(RCP_SPI),1)
+COMMONCFLAGS += -DOPENTHREAD_POSIX_RCP_SPI_ENABLE=1
+else
+COMMONCFLAGS += -DOPENTHREAD_POSIX_RCP_UART_ENABLE=1
+endif
+
ifeq ($(VIRTUAL_TIME),1)
COMMONCFLAGS += -DOPENTHREAD_POSIX_VIRTUAL_TIME=1
endif
diff --git a/src/posix/Makefile.am b/src/posix/Makefile.am
index 49f6055..896893e 100644
--- a/src/posix/Makefile.am
+++ b/src/posix/Makefile.am
@@ -51,7 +51,9 @@
-I$(top_srcdir)/src/core \
-I$(top_srcdir)/src/posix/platform \
-D_GNU_SOURCE \
- $(OPENTHREAD_TARGET_DEFINES) \
+ -DOPENTHREAD_FTD=1 \
+ -DOPENTHREAD_MTD=0 \
+ -DOPENTHREAD_RADIO=0 \
$(NULL)
LIBTOOLFLAGS_COMMON = --preserve-dup-deps
diff --git a/src/posix/client.c b/src/posix/client.c
index 538349d..a8a37f9 100644
--- a/src/posix/client.c
+++ b/src/posix/client.c
@@ -30,6 +30,23 @@
#include <openthread/platform/toolchain.h>
+#ifndef HAVE_LIBEDIT
+#define HAVE_LIBEDIT 0
+#endif
+
+#ifndef HAVE_LIBREADLINE
+#define HAVE_LIBREADLINE 0
+#endif
+
+#define OPENTHREAD_USE_READLINE (HAVE_LIBEDIT || HAVE_LIBREADLINE)
+
+#if HAVE_LIBEDIT
+#include <editline/readline.h>
+#elif HAVE_LIBREADLINE
+#include <readline/history.h>
+#include <readline/readline.h>
+#endif
+
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
@@ -38,18 +55,138 @@
#include <unistd.h>
#include "code_utils.h"
+#include "common/code_utils.hpp"
+
#include "platform-posix.h"
+static int sSessionFd = -1;
+
+#if OPENTHREAD_USE_READLINE
+static void InputCallback(char *aLine)
+{
+ if (aLine != NULL)
+ {
+ add_history(aLine);
+ dprintf(sSessionFd, "%s\n", aLine);
+ free(aLine);
+ }
+ else
+ {
+ exit(OT_EXIT_SUCCESS);
+ }
+}
+#endif // OPENTHREAD_USE_READLINE
+
+static bool FindDone(int *aDoneState, char aNowCharacter)
+{
+ switch (aNowCharacter)
+ {
+ case 'D':
+ *aDoneState = *aDoneState == 0 ? 1 : -1;
+ break;
+ case 'o':
+ *aDoneState = *aDoneState == 1 ? 2 : -1;
+ break;
+ case 'n':
+ *aDoneState = *aDoneState == 2 ? 3 : -1;
+ break;
+ case 'e':
+ *aDoneState = *aDoneState == 3 ? 4 : -1;
+ break;
+ case '\r':
+ case '\n':
+ if (*aDoneState == 4)
+ {
+ *aDoneState = 5;
+ }
+ else
+ {
+ *aDoneState = 0;
+ }
+ break;
+ default:
+ *aDoneState = -1;
+ break;
+ }
+
+ return *aDoneState == 5;
+}
+
+static bool FindError(int *aErrorState, char aNowCharacter)
+{
+ switch (aNowCharacter)
+ {
+ case 'E':
+ *aErrorState = *aErrorState == 0 ? 1 : -1;
+ break;
+ case 'r':
+ if (*aErrorState == 1 || *aErrorState == 2 || *aErrorState == 4)
+ {
+ (*aErrorState)++;
+ }
+ else
+ {
+ *aErrorState = -1;
+ }
+ break;
+ case 'o':
+ *aErrorState = *aErrorState == 3 ? 4 : -1;
+ break;
+ case ' ':
+ *aErrorState = *aErrorState == 5 ? 6 : -1;
+ break;
+ case '\r':
+ case '\n':
+ *aErrorState = 0;
+ break;
+ default:
+ *aErrorState = -1;
+ break;
+ }
+
+ return *aErrorState == 6;
+}
+
+static void SendBlockingCommand(int aArgc, char *aArgv[])
+{
+ char buffer[OPENTHREAD_CONFIG_DIAG_CMD_LINE_BUFFER_SIZE];
+ int doneState = 0;
+ int errorState = 0;
+
+ for (int i = 0; i < aArgc; i++)
+ {
+ otEXPECT_ACTION(write(sSessionFd, aArgv[i], strlen(aArgv[i])) >= 0, perror("Failed to send command"));
+ otEXPECT_ACTION(write(sSessionFd, " ", 1) >= 0, perror("Failed to send command"));
+ }
+ otEXPECT_ACTION(write(sSessionFd, "\n", 1) >= 0, perror("Failed to send command"));
+
+ while (true)
+ {
+ ssize_t rval = read(sSessionFd, buffer, sizeof(buffer));
+
+ otEXPECT(rval >= 0);
+ write(STDOUT_FILENO, buffer, rval);
+ for (ssize_t i = 0; i < rval; i++)
+ {
+ if (FindDone(&doneState, buffer[i]) || FindError(&errorState, buffer[i]))
+ {
+ otEXIT_NOW();
+ }
+ }
+ }
+exit:
+ return;
+}
+
int main(int argc, char *argv[])
{
OT_UNUSED_VARIABLE(argc);
OT_UNUSED_VARIABLE(argv);
int ret;
- int session = -1;
- session = socket(AF_UNIX, SOCK_STREAM, 0);
- otEXPECT_ACTION(session != -1, perror("socket"); ret = OT_EXIT_FAILURE);
+ sSessionFd = socket(AF_UNIX, SOCK_STREAM, 0);
+ otEXPECT_ACTION(sSessionFd != -1, perror("socket"); ret = OT_EXIT_FAILURE);
{
struct sockaddr_un sockname;
@@ -58,27 +195,40 @@
sockname.sun_family = AF_UNIX;
strncpy(sockname.sun_path, OPENTHREAD_POSIX_APP_SOCKET_NAME, sizeof(sockname.sun_path) - 1);
- ret = connect(session, (const struct sockaddr *)&sockname, sizeof(struct sockaddr_un));
+ ret = connect(sSessionFd, (const struct sockaddr *)&sockname, sizeof(struct sockaddr_un));
if (ret == -1)
{
fprintf(stderr, "OpenThread daemon is not running.\n");
otEXIT_NOW(ret = OT_EXIT_FAILURE);
}
+
+#if OPENTHREAD_USE_READLINE
+ rl_instream = stdin;
+ rl_outstream = stdout;
+ rl_inhibit_completion = true;
+ rl_callback_handler_install("> ", InputCallback);
+ rl_already_prompted = 1;
+#endif
+ }
+
+ if (argc > 1)
+ {
+ SendBlockingCommand(argc - 1, &argv[1]);
+ otEXIT_NOW(ret = 0);
}
while (1)
{
- char buffer[OPENTHREAD_CONFIG_DIAG_CMD_LINE_BUFFER_SIZE];
- fd_set readFdSet;
- int maxFd = STDIN_FILENO;
+ fd_set readFdSet;
+ char buffer[OPENTHREAD_CONFIG_DIAG_CMD_LINE_BUFFER_SIZE];
+ ssize_t rval;
+ int maxFd = sSessionFd > STDIN_FILENO ? sSessionFd : STDIN_FILENO;
FD_ZERO(&readFdSet);
FD_SET(STDIN_FILENO, &readFdSet);
- FD_SET(session, &readFdSet);
-
- maxFd = session > maxFd ? session : maxFd;
+ FD_SET(sSessionFd, &readFdSet);
ret = select(maxFd + 1, &readFdSet, NULL, NULL, NULL);
@@ -91,35 +241,40 @@
if (FD_ISSET(STDIN_FILENO, &readFdSet))
{
+#if OPENTHREAD_USE_READLINE
+ rl_callback_read_char();
+#else
otEXPECT_ACTION(fgets(buffer, sizeof(buffer), stdin) != NULL, ret = OT_EXIT_FAILURE);
- ret = (int)write(session, buffer, strlen(buffer));
- otEXPECT_ACTION(ret != -1, perror("write"); ret = OT_EXIT_FAILURE);
+ rval = write(sSessionFd, buffer, strlen(buffer));
+ otEXPECT_ACTION(rval != -1, perror("write"); ret = OT_EXIT_FAILURE);
+#endif
}
- if (FD_ISSET(session, &readFdSet))
+ if (FD_ISSET(sSessionFd, &readFdSet))
{
- ret = (int)read(session, buffer, sizeof(buffer));
- otEXPECT_ACTION(ret != -1, perror("read"); ret = OT_EXIT_FAILURE);
+ rval = read(sSessionFd, buffer, sizeof(buffer));
+ otEXPECT_ACTION(rval != -1, perror("read"); ret = OT_EXIT_FAILURE);
- if (ret == 0)
+ if (rval == 0)
{
- // daemon closed session
+ // daemon closed sSessionFd
otEXIT_NOW(ret = OT_EXIT_FAILURE);
}
else
{
- buffer[ret] = 0;
- printf("%s", buffer);
- fflush(stdout);
+ IgnoreReturnValue(write(STDOUT_FILENO, buffer, rval));
}
}
}
exit:
- if (session != -1)
+ if (sSessionFd != -1)
{
- close(session);
+#if OPENTHREAD_USE_READLINE
+ rl_callback_handler_remove();
+#endif
+ close(sSessionFd);
}
return ret;
diff --git a/src/posix/console_cli.c b/src/posix/console_cli.c
index b40844f..9f7d544 100644
--- a/src/posix/console_cli.c
+++ b/src/posix/console_cli.c
@@ -35,6 +35,14 @@
#include <string.h>
#include <unistd.h>
+#ifndef HAVE_LIBEDIT
+#define HAVE_LIBEDIT 0
+#endif
+
+#ifndef HAVE_LIBREADLINE
+#define HAVE_LIBREADLINE 0
+#endif
+
#if HAVE_LIBEDIT || HAVE_LIBREADLINE
#if HAVE_LIBEDIT
#include <editline/readline.h>
diff --git a/src/posix/main.c b/src/posix/main.c
index 142adff..144de83 100644
--- a/src/posix/main.c
+++ b/src/posix/main.c
@@ -42,36 +42,96 @@
#include <sys/prctl.h>
#endif
+#ifndef HAVE_LIBEDIT
+#define HAVE_LIBEDIT 0
+#endif
+
+#ifndef HAVE_LIBREADLINE
+#define HAVE_LIBREADLINE 0
+#endif
+
#define OPENTHREAD_POSIX_APP_TYPE_NCP 1
#define OPENTHREAD_POSIX_APP_TYPE_CLI 2
#include <openthread/diag.h>
+#include <openthread/logging.h>
#include <openthread/tasklet.h>
#include <openthread/platform/radio.h>
#if OPENTHREAD_POSIX_APP_TYPE == OPENTHREAD_POSIX_APP_TYPE_NCP
#include <openthread/ncp.h>
+#define OPENTHREAD_USE_CONSOLE 0
#elif OPENTHREAD_POSIX_APP_TYPE == OPENTHREAD_POSIX_APP_TYPE_CLI
#include <openthread/cli.h>
#if (HAVE_LIBEDIT || HAVE_LIBREADLINE) && !OPENTHREAD_ENABLE_POSIX_APP_DAEMON
#define OPENTHREAD_USE_CONSOLE 1
#include "console_cli.h"
+#else
+#define OPENTHREAD_USE_CONSOLE 0
#endif
#else
#error "Unknown posix app type!"
#endif
#include <openthread-system.h>
+#ifndef OPENTHREAD_ENABLE_COVERAGE
+#define OPENTHREAD_ENABLE_COVERAGE 0
+#endif
+
+typedef struct PosixConfig
+{
+ otPlatformConfig mPlatformConfig; ///< Platform configuration.
+ otLogLevel mLogLevel; ///< Debug level of logging.
+ bool mIsDryRun; ///< Dry run.
+ bool mPrintRadioVersion; ///< Whether to print radio firmware version.
+ bool mIsVerbose; ///< Whether to print log to stderr.
+} PosixConfig;
+
static jmp_buf gResetJump;
void __gcov_flush();
-static const struct option kOptions[] = {{"dry-run", no_argument, NULL, 'n'},
+/**
+ * This enumeration defines the argument return values.
+ *
+ */
+enum
+{
+ ARG_PRINT_RADIO_VERSION = 1001,
+ ARG_NO_RADIO_RESET = 1002,
+ ARG_RESTORE_NCP_DATASET = 1003,
+ ARG_SPI_GPIO_INT_DEV = 1011,
+ ARG_SPI_GPIO_INT_LINE = 1012,
+ ARG_SPI_GPIO_RESET_DEV = 1013,
+ ARG_SPI_GPIO_RESET_LINE = 1014,
+ ARG_SPI_MODE = 1015,
+ ARG_SPI_SPEED = 1016,
+ ARG_SPI_CS_DELAY = 1017,
+ ARG_SPI_RESET_DELAY = 1018,
+ ARG_SPI_ALIGN_ALLOWANCE = 1019,
+ ARG_SPI_SMALL_PACKET = 1020,
+};
+
+static const struct option kOptions[] = {{"debug-level", required_argument, NULL, 'd'},
+ {"dry-run", no_argument, NULL, 'n'},
{"help", no_argument, NULL, 'h'},
{"interface-name", required_argument, NULL, 'I'},
- {"no-reset", no_argument, NULL, 0},
- {"radio-version", no_argument, NULL, 0},
+ {"no-reset", no_argument, NULL, ARG_NO_RADIO_RESET},
+ {"radio-version", no_argument, NULL, ARG_PRINT_RADIO_VERSION},
+ {"ncp-dataset", no_argument, NULL, ARG_RESTORE_NCP_DATASET},
{"time-speed", required_argument, NULL, 's'},
{"verbose", no_argument, NULL, 'v'},
+#if OPENTHREAD_POSIX_RCP_SPI_ENABLE
+ {"gpio-int-dev", required_argument, NULL, ARG_SPI_GPIO_INT_DEV},
+ {"gpio-int-line", required_argument, NULL, ARG_SPI_GPIO_INT_LINE},
+ {"gpio-reset-dev", required_argument, NULL, ARG_SPI_GPIO_RESET_DEV},
+ {"gpio-reset-line", required_argument, NULL, ARG_SPI_GPIO_RESET_LINE},
+ {"spi-mode", required_argument, NULL, ARG_SPI_MODE},
+ {"spi-speed", required_argument, NULL, ARG_SPI_SPEED},
+ {"spi-cs-delay", required_argument, NULL, ARG_SPI_CS_DELAY},
+ {"spi-reset-delay", required_argument, NULL, ARG_SPI_RESET_DELAY},
+ {"spi-align-allowance", required_argument, NULL, ARG_SPI_ALIGN_ALLOWANCE},
+ {"spi-small-packet", required_argument, NULL, ARG_SPI_SMALL_PACKET},
+#endif
{0, 0, 0, 0}};
static void PrintUsage(const char *aProgramName, FILE *aStream, int aExitCode)
@@ -80,36 +140,62 @@
"Syntax:\n"
" %s [Options] NodeId|Device|Command [DeviceConfig|CommandArgs]\n"
"Options:\n"
- " -I --interface-name name Thread network interface name.\n"
- " -n --dry-run Just verify if arguments is valid and radio spinel is compatible.\n"
- " --no-reset Do not reset RCP on initialization\n"
- " --radio-version Print radio firmware version\n"
- " -s --time-speed factor Time speed up factor.\n"
- " -v --verbose Also log to stderr.\n"
- " -h --help Display this usage information.\n",
+ " -I --interface-name name Thread network interface name.\n"
+ " -d --debug-level Debug level of logging.\n"
+ " -n --dry-run Just verify if arguments is valid and radio spinel is compatible.\n"
+ " --no-reset Do not send Spinel reset command to RCP on initialization.\n"
+ " --radio-version Print radio firmware version.\n"
+ " --ncp-dataset Retrieve and save NCP dataset to file.\n"
+ " -s --time-speed factor Time speed up factor.\n"
+ " -v --verbose Also log to stderr.\n"
+#if OPENTHREAD_POSIX_RCP_SPI_ENABLE
+ " --gpio-int-dev[=gpio-device-path]\n"
+ " Specify a path to the Linux sysfs-exported GPIO device for the\n"
+ " `IÌ…NÌ…TÌ…` pin. If not specified, `SPI` interface will fall back to\n"
+ " polling, which is inefficient.\n"
+ " --gpio-int-line[=line-offset]\n"
+ " The offset index of `IÌ…NÌ…TÌ…` pin for the associated GPIO device.\n"
+ " If not specified, `SPI` interface will fall back to polling,\n"
+ " which is inefficient.\n"
+ " --gpio-reset-dev[=gpio-device-path]\n"
+ " Specify a path to the Linux sysfs-exported GPIO device for the\n"
+ " `RÌ…EÌ…SÌ…` pin.\n"
+ " --gpio-reset-line[=line-offset]"
+ " The offset index of `RÌ…EÌ…SÌ…` pin for the associated GPIO device.\n"
+ " --spi-mode[=mode] Specify the SPI mode to use (0-3).\n"
+ " --spi-speed[=hertz] Specify the SPI speed in hertz.\n"
+ " --spi-cs-delay[=usec] Specify the delay after CÌ…SÌ… assertion, in µsec.\n"
+ " --spi-reset-delay[=ms] Specify the delay after RÌ…EÌ…SÌ…EÌ…TÌ… assertion, in milliseconds.\n"
+ " --spi-align-allowance[=n] Specify the maximum number of 0xFF bytes to clip from start of\n"
+ " MISO frame. Max value is 16.\n"
+ " --spi-small-packet=[n] Specify the smallest packet we can receive in a single transaction.\n"
+ " (larger packets will require two transactions). Default value is 32.\n"
+#endif
+ " -h --help Display this usage information.\n",
aProgramName);
exit(aExitCode);
}
-static otInstance *InitInstance(int aArgCount, char *aArgVector[])
+static void ParseArg(int aArgCount, char *aArgVector[], PosixConfig *aConfig)
{
- otPlatformConfig config;
- otInstance * instance = NULL;
- bool isDryRun = false;
- bool printRadioVersion = false;
- bool isVerbose = false;
+ memset(aConfig, 0, sizeof(PosixConfig));
- memset(&config, 0, sizeof(config));
-
- config.mSpeedUpFactor = 1;
- config.mResetRadio = true;
+ aConfig->mPlatformConfig.mSpeedUpFactor = 1;
+ aConfig->mPlatformConfig.mResetRadio = true;
+ aConfig->mPlatformConfig.mSpiSpeed = OT_PLATFORM_CONFIG_SPI_DEFAULT_SPEED_HZ;
+ aConfig->mPlatformConfig.mSpiCsDelay = OT_PLATFORM_CONFIG_SPI_DEFAULT_CS_DELAY_US;
+ aConfig->mPlatformConfig.mSpiResetDelay = OT_PLATFORM_CONFIG_SPI_DEFAULT_RESET_DELAY_MS;
+ aConfig->mPlatformConfig.mSpiAlignAllowance = OT_PLATFORM_CONFIG_SPI_DEFAULT_ALIGN_ALLOWANCE;
+ aConfig->mPlatformConfig.mSpiSmallPacketSize = OT_PLATFORM_CONFIG_SPI_DEFAULT_SMALL_PACKET_SIZE;
+ aConfig->mPlatformConfig.mSpiMode = OT_PLATFORM_CONFIG_SPI_DEFAULT_MODE;
+ aConfig->mLogLevel = OT_LOG_LEVEL_CRIT;
optind = 1;
while (true)
{
int index = 0;
- int option = getopt_long(aArgCount, aArgVector, "hI:ns:v", kOptions, &index);
+ int option = getopt_long(aArgCount, aArgVector, "d:hI:ns:v", kOptions, &index);
if (option == -1)
{
@@ -118,21 +204,25 @@
switch (option)
{
+ case 'd':
+ aConfig->mLogLevel = (otLogLevel)atoi(optarg);
+ break;
case 'h':
PrintUsage(aArgVector[0], stdout, OT_EXIT_SUCCESS);
break;
case 'I':
- config.mInterfaceName = optarg;
+ aConfig->mPlatformConfig.mInterfaceName = optarg;
break;
case 'n':
- isDryRun = true;
+ aConfig->mIsDryRun = true;
break;
case 's':
{
- char *endptr = NULL;
- config.mSpeedUpFactor = (uint32_t)strtol(optarg, &endptr, 0);
+ char *endptr = NULL;
- if (*endptr != '\0' || config.mSpeedUpFactor == 0)
+ aConfig->mPlatformConfig.mSpeedUpFactor = (uint32_t)strtol(optarg, &endptr, 0);
+
+ if (*endptr != '\0' || aConfig->mPlatformConfig.mSpeedUpFactor == 0)
{
fprintf(stderr, "Invalid value for TimerSpeedUpFactor: %s\n", optarg);
exit(OT_EXIT_INVALID_ARGUMENTS);
@@ -140,19 +230,49 @@
break;
}
case 'v':
- isVerbose = true;
+ aConfig->mIsVerbose = true;
break;
-
- case 0:
- if (!strcmp(kOptions[index].name, "radio-version"))
- {
- printRadioVersion = true;
- }
- else if (!strcmp(kOptions[index].name, "no-reset"))
- {
- config.mResetRadio = false;
- }
+ case ARG_PRINT_RADIO_VERSION:
+ aConfig->mPrintRadioVersion = true;
break;
+ case ARG_NO_RADIO_RESET:
+ aConfig->mPlatformConfig.mResetRadio = false;
+ break;
+ case ARG_RESTORE_NCP_DATASET:
+ aConfig->mPlatformConfig.mRestoreDatasetFromNcp = true;
+ break;
+#if OPENTHREAD_POSIX_RCP_SPI_ENABLE
+ case ARG_SPI_GPIO_INT_DEV:
+ aConfig->mPlatformConfig.mSpiGpioIntDevice = optarg;
+ break;
+ case ARG_SPI_GPIO_INT_LINE:
+ aConfig->mPlatformConfig.mSpiGpioIntLine = (uint8_t)atoi(optarg);
+ break;
+ case ARG_SPI_GPIO_RESET_DEV:
+ aConfig->mPlatformConfig.mSpiGpioResetDevice = optarg;
+ break;
+ case ARG_SPI_GPIO_RESET_LINE:
+ aConfig->mPlatformConfig.mSpiGpioResetLine = (uint8_t)atoi(optarg);
+ break;
+ case ARG_SPI_MODE:
+ aConfig->mPlatformConfig.mSpiMode = (uint8_t)atoi(optarg);
+ break;
+ case ARG_SPI_SPEED:
+ aConfig->mPlatformConfig.mSpiSpeed = atoi(optarg);
+ break;
+ case ARG_SPI_CS_DELAY:
+ aConfig->mPlatformConfig.mSpiCsDelay = atoi(optarg);
+ break;
+ case ARG_SPI_RESET_DELAY:
+ aConfig->mPlatformConfig.mSpiResetDelay = atoi(optarg);
+ break;
+ case ARG_SPI_ALIGN_ALLOWANCE:
+ aConfig->mPlatformConfig.mSpiAlignAllowance = atoi(optarg);
+ break;
+ case ARG_SPI_SMALL_PACKET:
+ aConfig->mPlatformConfig.mSpiSmallPacketSize = atoi(optarg);
+ break;
+#endif // OPENTHREAD_POSIX_RCP_SPI_ENABLE
case '?':
PrintUsage(aArgVector[0], stderr, OT_EXIT_INVALID_ARGUMENTS);
break;
@@ -162,31 +282,38 @@
}
}
-#if OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED
- openlog(aArgVector[0], LOG_PID | (isVerbose ? LOG_PERROR : 0), LOG_DAEMON);
- setlogmask(setlogmask(0) & LOG_UPTO(LOG_DEBUG));
-#endif
-
if (optind >= aArgCount)
{
PrintUsage(aArgVector[0], stderr, OT_EXIT_INVALID_ARGUMENTS);
}
- config.mRadioFile = aArgVector[optind];
+ aConfig->mPlatformConfig.mRadioFile = aArgVector[optind];
if (optind + 1 < aArgCount)
{
- config.mRadioConfig = aArgVector[optind + 1];
+ aConfig->mPlatformConfig.mRadioConfig = aArgVector[optind + 1];
}
+}
- instance = otSysInit(&config);
+static otInstance *InitInstance(int aArgCount, char *aArgVector[])
+{
+ PosixConfig config;
+ otInstance *instance = NULL;
- if (printRadioVersion)
+ ParseArg(aArgCount, aArgVector, &config);
+
+ openlog(aArgVector[0], LOG_PID | (config.mIsVerbose ? LOG_PERROR : 0), LOG_DAEMON);
+ setlogmask(setlogmask(0) & LOG_UPTO(LOG_DEBUG));
+ otLoggingSetLevel(config.mLogLevel);
+
+ instance = otSysInit(&config.mPlatformConfig);
+
+ if (config.mPrintRadioVersion)
{
printf("%s\n", otPlatRadioGetVersionString(instance));
}
- if (isDryRun)
+ if (config.mIsDryRun)
{
exit(OT_EXIT_SUCCESS);
}
diff --git a/src/posix/platform/CMakeLists.txt b/src/posix/platform/CMakeLists.txt
new file mode 100644
index 0000000..6cdc73e
--- /dev/null
+++ b/src/posix/platform/CMakeLists.txt
@@ -0,0 +1,74 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+set(OT_PLATFORM_LIB "openthread-posix" PARENT_SCOPE)
+
+option(OT_DAEMON "Enable daemon mode" OFF)
+if(OT_DAEMON)
+ list(APPEND OT_PLATFORM_DEFINES "OPENTHREAD_ENABLE_POSIX_APP_DAEMON=1")
+endif()
+
+list(APPEND OT_PLATFORM_DEFINES
+ "OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE=1"
+ "OPENTHREAD_CONFIG_NCP_UART_ENABLE=1"
+ "OPENTHREAD_POSIX=1"
+ "OPENTHREAD_POSIX_RCP_UART_ENABLE=1"
+ "OPENTHREAD_PROJECT_CORE_CONFIG_FILE=\"openthread-core-posix-config.h\""
+)
+set(OT_PLATFORM_DEFINES ${OT_PLATFORM_DEFINES} PARENT_SCOPE)
+
+add_library(openthread-posix
+ alarm.c
+ entropy.c
+ hdlc_interface.cpp
+ logging.c
+ misc.c
+ netif.cpp
+ radio_spinel.cpp
+ settings.cpp
+ sim.c
+ spi_interface.cpp
+ system.c
+ uart.c
+ udp.cpp
+)
+
+target_link_libraries(openthread-posix PUBLIC
+ util
+)
+
+target_compile_definitions(openthread-posix PUBLIC ${OT_PLATFORM_DEFINES})
+
+target_include_directories(openthread-posix PRIVATE
+ ${OT_PUBLIC_INCLUDES}
+ ${OT_PRIVATE_INCLUDES}
+ ${PROJECT_SOURCE_DIR}/src
+ ${PROJECT_SOURCE_DIR}/src/core
+ ${PROJECT_SOURCE_DIR}/src/posix/platform
+ ${PROJECT_SOURCE_DIR}/third_party/mbedtls/repo/include
+)
diff --git a/src/posix/platform/Makefile.am b/src/posix/platform/Makefile.am
index fb23231..3d36340 100644
--- a/src/posix/platform/Makefile.am
+++ b/src/posix/platform/Makefile.am
@@ -36,7 +36,9 @@
-I$(top_srcdir)/src/core \
-I$(top_srcdir)/src/posix/platform \
-D_GNU_SOURCE \
- $(OPENTHREAD_TARGET_DEFINES) \
+ -DOPENTHREAD_FTD=1 \
+ -DOPENTHREAD_MTD=0 \
+ -DOPENTHREAD_RADIO=0 \
$(NULL)
libopenthread_posix_a_SOURCES = \
@@ -49,6 +51,7 @@
radio_spinel.cpp \
settings.cpp \
sim.c \
+ spi_interface.cpp \
system.c \
uart.c \
udp.cpp \
@@ -58,6 +61,7 @@
platform-posix.h \
hdlc_interface.hpp \
radio_spinel.hpp \
+ spinel_interface.hpp \
$(NULL)
openthread_HEADERS = \
@@ -70,6 +74,7 @@
PRETTY_FILES = \
$(libopenthread_posix_a_SOURCES) \
$(noinst_HEADERS) \
+ $(openthread_HEADERS) \
$(NULL)
if OPENTHREAD_BUILD_COVERAGE
@@ -81,6 +86,7 @@
test_settings_CPPFLAGS = \
-I$(top_srcdir)/include \
-I$(top_srcdir)/src/core \
+ -DOPENTHREAD_CONFIG_LOG_PLATFORM=0 \
-DSELF_TEST \
$(NULL)
diff --git a/src/posix/platform/entropy.c b/src/posix/platform/entropy.c
index 91093c6..b31b78c 100644
--- a/src/posix/platform/entropy.c
+++ b/src/posix/platform/entropy.c
@@ -44,6 +44,10 @@
#include <openthread/error.h>
+#ifndef __SANITIZE_ADDRESS__
+#define __SANITIZE_ADDRESS__ 0
+#endif
+
#if __SANITIZE_ADDRESS__ != 0
static uint32_t sState = 1;
diff --git a/src/posix/platform/hdlc_interface.cpp b/src/posix/platform/hdlc_interface.cpp
index ea61555..0b90864 100644
--- a/src/posix/platform/hdlc_interface.cpp
+++ b/src/posix/platform/hdlc_interface.cpp
@@ -40,7 +40,7 @@
#include <errno.h>
#include <fcntl.h>
#if OPENTHREAD_CONFIG_POSIX_APP_ENABLE_PTY_DEVICE
-#ifdef OPENTHREAD_TARGET_DARWIN
+#ifdef __APPLE__
#include <util.h>
#else
#include <pty.h>
@@ -119,42 +119,43 @@
#endif // __APPLE__
+#if OPENTHREAD_POSIX_RCP_UART_ENABLE
+
namespace ot {
namespace PosixApp {
-HdlcInterface::HdlcInterface(Callbacks &aCallbacks)
- : mCallbacks(aCallbacks)
+HdlcInterface::HdlcInterface(SpinelInterface::Callbacks &aCallback, SpinelInterface::RxFrameBuffer &aFrameBuffer)
+ : mCallbacks(aCallback)
+ , mRxFrameBuffer(aFrameBuffer)
, mSockFd(-1)
- , mIsDecoding(false)
- , mRxFrameBuffer()
- , mHdlcDecoder(mRxFrameBuffer, HandleHdlcFrame, this)
+ , mHdlcDecoder(aFrameBuffer, HandleHdlcFrame, this)
{
}
-otError HdlcInterface::Init(const char *aRadioFile, const char *aRadioConfig)
+otError HdlcInterface::Init(const otPlatformConfig &aPlatformConfig)
{
otError error = OT_ERROR_NONE;
struct stat st;
VerifyOrExit(mSockFd == -1, error = OT_ERROR_ALREADY);
- VerifyOrExit(stat(aRadioFile, &st) == 0, perror("stat ncp file failed"); error = OT_ERROR_INVALID_ARGS);
+ VerifyOrDie(stat(aPlatformConfig.mRadioFile, &st) == 0, OT_EXIT_INVALID_ARGUMENTS);
if (S_ISCHR(st.st_mode))
{
- mSockFd = OpenFile(aRadioFile, aRadioConfig);
+ mSockFd = OpenFile(aPlatformConfig.mRadioFile, aPlatformConfig.mRadioConfig);
VerifyOrExit(mSockFd != -1, error = OT_ERROR_INVALID_ARGS);
}
#if OPENTHREAD_CONFIG_POSIX_APP_ENABLE_PTY_DEVICE
else if (S_ISREG(st.st_mode))
{
- mSockFd = ForkPty(aRadioFile, aRadioConfig);
+ mSockFd = ForkPty(aPlatformConfig.mRadioFile, aPlatformConfig.mRadioConfig);
VerifyOrExit(mSockFd != -1, error = OT_ERROR_INVALID_ARGS);
}
#endif // OPENTHREAD_CONFIG_POSIX_APP_ENABLE_PTY_DEVICE
else
{
- otLogCritPlat("Radio file '%s' not supported", aRadioFile);
+ otLogCritPlat("Radio file '%s' not supported", aPlatformConfig.mRadioFile);
ExitNow(error = OT_ERROR_INVALID_ARGS);
}
@@ -199,9 +200,7 @@
void HdlcInterface::Decode(const uint8_t *aBuffer, uint16_t aLength)
{
- mIsDecoding = true;
mHdlcDecoder.Decode(aBuffer, aLength);
- mIsDecoding = false;
}
otError HdlcInterface::SendFrame(const uint8_t *aFrame, uint16_t aLength)
@@ -250,6 +249,95 @@
return error;
}
+otError HdlcInterface::WaitForFrame(const struct timeval &aTimeout)
+{
+ otError error = OT_ERROR_NONE;
+ struct timeval timeout = aTimeout;
+
+#if OPENTHREAD_POSIX_VIRTUAL_TIME
+ struct Event event;
+
+ platformSimSendSleepEvent(&timeout);
+ platformSimReceiveEvent(&event);
+
+ switch (event.mEvent)
+ {
+ case OT_SIM_EVENT_RADIO_SPINEL_WRITE:
+ Decode(event.mData, event.mDataLength);
+ break;
+
+ case OT_SIM_EVENT_ALARM_FIRED:
+ ExitNow(error = OT_ERROR_RESPONSE_TIMEOUT);
+ break;
+
+ default:
+ assert(false);
+ break;
+ }
+#else // OPENTHREAD_POSIX_VIRTUAL_TIME
+ fd_set read_fds;
+ fd_set error_fds;
+ int rval;
+
+ FD_ZERO(&read_fds);
+ FD_ZERO(&error_fds);
+ FD_SET(mSockFd, &read_fds);
+ FD_SET(mSockFd, &error_fds);
+
+ rval = select(mSockFd + 1, &read_fds, NULL, &error_fds, &timeout);
+
+ if (rval > 0)
+ {
+ if (FD_ISSET(mSockFd, &read_fds))
+ {
+ Read();
+ }
+ else if (FD_ISSET(mSockFd, &error_fds))
+ {
+ DieNowWithMessage("NCP error", OT_EXIT_FAILURE);
+ }
+ else
+ {
+ DieNow(OT_EXIT_FAILURE);
+ }
+ }
+ else if (rval == 0)
+ {
+ ExitNow(error = OT_ERROR_RESPONSE_TIMEOUT);
+ }
+ else if (errno != EINTR)
+ {
+ DieNowWithMessage("wait response", OT_EXIT_FAILURE);
+ }
+#endif // OPENTHREAD_POSIX_VIRTUAL_TIME
+
+exit:
+ return error;
+}
+
+void HdlcInterface::UpdateFdSet(fd_set &aReadFdSet, fd_set &aWriteFdSet, int &aMaxFd, struct timeval &aTimeout)
+{
+ OT_UNUSED_VARIABLE(aWriteFdSet);
+ OT_UNUSED_VARIABLE(aTimeout);
+
+ FD_SET(mSockFd, &aReadFdSet);
+
+ if (aMaxFd < mSockFd)
+ {
+ aMaxFd = mSockFd;
+ }
+}
+
+void HdlcInterface::Process(const fd_set &aReadFdSet, const fd_set &aWriteFdSet)
+{
+ OT_UNUSED_VARIABLE(aWriteFdSet);
+
+ if (FD_ISSET(mSockFd, &aReadFdSet))
+ {
+ Read();
+ }
+}
+
otError HdlcInterface::WaitForWritable(void)
{
otError error = OT_ERROR_NONE;
@@ -277,11 +365,11 @@
}
else if (FD_ISSET(mSockFd, &errorFds))
{
- DieNowWithMessage("socket error", OT_EXIT_FAILURE);
+ DieNow(OT_EXIT_FAILURE);
}
else
{
- DieNowWithMessage("select error", OT_EXIT_FAILURE);
+ assert(false);
}
}
else if ((rval < 0) && (errno != EINTR))
@@ -329,6 +417,7 @@
int speed = 115200;
int cstopb = 1;
char parity = 'N';
+ char flow = 'N';
VerifyOrExit((rval = tcgetattr(fd, &tios)) == 0);
@@ -336,10 +425,10 @@
tios.c_cflag = CS8 | HUPCL | CREAD | CLOCAL;
- // example: 115200N1
+ // example: 115200N1H
if (aConfig != NULL)
{
- sscanf(aConfig, "%u%c%d", &speed, &parity, &cstopb);
+ sscanf(aConfig, "%u%c%d%c", &speed, &parity, &cstopb, &flow);
}
switch (parity)
@@ -354,7 +443,6 @@
break;
default:
// not supported
- assert(false);
DieNow(OT_EXIT_INVALID_ARGUMENTS);
break;
}
@@ -368,7 +456,6 @@
tios.c_cflag |= CSTOPB;
break;
default:
- assert(false);
DieNow(OT_EXIT_INVALID_ARGUMENTS);
break;
}
@@ -456,7 +543,19 @@
break;
#endif
default:
- assert(false);
+ DieNow(OT_EXIT_INVALID_ARGUMENTS);
+ break;
+ }
+
+ switch (flow)
+ {
+ case 'N':
+ break;
+ case 'H':
+ tios.c_cflag |= CRTSCTS;
+ break;
+ default:
+ // not supported
DieNow(OT_EXIT_INVALID_ARGUMENTS);
break;
}
@@ -527,7 +626,7 @@
{
if (aError == OT_ERROR_NONE)
{
- mCallbacks.HandleReceivedFrame(*this);
+ mCallbacks.HandleReceivedFrame();
}
else
{
@@ -538,3 +637,4 @@
} // namespace PosixApp
} // namespace ot
+#endif // OPENTHREAD_POSIX_RCP_UART_ENABLE
diff --git a/src/posix/platform/hdlc_interface.hpp b/src/posix/platform/hdlc_interface.hpp
index c3416ee..14b321a 100644
--- a/src/posix/platform/hdlc_interface.hpp
+++ b/src/posix/platform/hdlc_interface.hpp
@@ -35,9 +35,11 @@
#define POSIX_APP_HDLC_INTERFACE_HPP_
#include "platform-config.h"
-
+#include "spinel_interface.hpp"
#include "ncp/hdlc.hpp"
+#if OPENTHREAD_POSIX_RCP_UART_ENABLE
+
namespace ot {
namespace PosixApp {
@@ -48,49 +50,14 @@
class HdlcInterface
{
public:
- enum
- {
- kMaxFrameSize = 2048, ///< Maximum frame size (number of bytes).
- kMaxWaitTime = 2000, ///< Maximum wait time in Milliseconds for socket to become writable (see `SendFrame`).
- };
-
- /**
- * This type defines a receive frame buffer to store received (and decoded) frame(s).
- *
- * @note The receive frame buffer is an `Hdlc::MultiFrameBuffer` and therefore it is capable of storing multiple
- * frames in a FIFO queue manner.
- *
- */
- typedef Hdlc::MultiFrameBuffer<kMaxFrameSize> RxFrameBuffer;
-
- /**
- * This class defines the callbacks provided by `HdlcInterfac` to its owner/user.
- *
- */
- class Callbacks
- {
- public:
- /**
- * This callback is invoked to notify owner/user of `HdlcInterface` of a received (and decoded) frame.
- *
- * The newly received frame is available in `RxFrameBuffer` from `HdlcInterface::GetRxFrameBuffer()`. The
- * user can read and process the frame. The callback is expected to either discard the new frame using
- * `RxFrameBuffer::DiscardFrame()` or save the frame using `RxFrameBuffer::SaveFrame()` to be read and
- * processed later.
- *
- * @param[in] aHdlcInterface A reference to the `HdlcInterface` object.
- *
- */
- void HandleReceivedFrame(HdlcInterface &aHdlcInterface);
- };
-
/**
* This constructor initializes the object.
*
- * @param[in] aCallback A reference to a `Callback` object.
+ * @param[in] aCallback A reference to a `Callback` object.
+ * @param[in] aFrameBuffer A reference to a `RxFrameBuffer` object.
*
*/
- explicit HdlcInterface(Callbacks &aCallbacks);
+ HdlcInterface(SpinelInterface::Callbacks &aCallback, SpinelInterface::RxFrameBuffer &aFrameBuffer);
/**
* This destructor deinitializes the object.
@@ -101,18 +68,16 @@
/**
* This method initializes the interface to the Radio Co-processor (RCP)
*
- * @note This method should be called before reading and sending frames to the interface.
+ * @note This method should be called before reading and sending spinel frames to the interface.
*
- *
- * @param[in] aRadioFile The path to either a UART device or an executable.
- * @param[in] aRadioConfig Parameters to be given to the device or executable.
+ * @param[in] aPlatformConfig Platform configuration structure.
*
* @retval OT_ERROR_NONE The interface is initialized successfully
* @retval OT_ERROR_ALREADY The interface is already initialized.
* @retval OT_ERROR_INVALID_ARGS The UART device or executable cannot be found or failed to open/run.
*
*/
- otError Init(const char *aRadioFile, const char *aRadioConfig);
+ otError Init(const otPlatformConfig &aPlatformConfig);
/**
* This method deinitializes the interface to the RCP.
@@ -121,63 +86,52 @@
void Deinit(void);
/**
- *
- * This method returns the socket file descriptor associated with the interface.
- *
- * @returns The associated socket file descriptor, or -1 if interface is not initializes.
- *
- */
- int GetSocket(void) const { return mSockFd; }
-
- /**
- * This method indicates whether the `HdclInterface` is currently decoding a received frame or not.
- *
- * @returns TRUE if currently decoding a received frame, FALSE otherwise.
- *
- */
- bool IsDecoding(void) const { return mIsDecoding; }
-
- /**
- * This method instructs `HdlcInterface` to read and decode data from radio over the socket.
- *
- * If a full HDLC frame is decoded while reading data, this method invokes the `HandleReceivedFrame()` (on the
- * `aCallback` object from constructor) to pass the received frame to be processed.
- *
- */
- void Read(void);
-
- /**
- * This method gets the `RxFrameBuffer`.
- *
- * The receive frame buffer is an `Hdlc::MultiFrameBuffer` and therefore it is capable of storing multiple
- * frames in a FIFO queue manner. The `RxFrameBuffer` contains the decoded received frames.
- *
- * Wen during `Read()` the `Callbacks::HandleReceivedFrame()` is invoked, the newly received decoded frame is
- * available in the receive frame buffer. The callback is expected to either process and then discard the frame
- * (using `RxFrameBuffer::DiscardFrame()` method) or save the frame (using `RxFrameBuffer::SaveFrame()` so that
- * it can be read later.
- *
- * @returns A reference to receive frame buffer containing newly received frame or previously saved frames.
- *
- */
- RxFrameBuffer &GetRxFrameBuffer(void) { return mRxFrameBuffer; }
-
- /**
- * This method encodes and sends a frame to Radio Co-processor (RCP) over the socket.
+ * This method encodes and sends a spinel frame to Radio Co-processor (RCP) over the socket.
*
* This is blocking call, i.e., if the socket is not writable, this method waits for it to become writable for
* up to `kMaxWaitTime` interval.
*
- * @param[in] aFrame A pointer to buffer containing the frame to send.
+ * @param[in] aFrame A pointer to buffer containing the spinel frame to send.
* @param[in] aLength The length (number of bytes) in the frame.
*
- * @retval OT_ERROR_NONE Successfully encoded and sent the frame.
+ * @retval OT_ERROR_NONE Successfully encoded and sent the spinel frame.
* @retval OT_ERROR_NO_BUFS Insufficient buffer space available to encode the frame.
* @retval OT_ERROR_FAILED Failed to send due to socket not becoming writable within `kMaxWaitTime`.
*
*/
otError SendFrame(const uint8_t *aFrame, uint16_t aLength);
+ /**
+ * This method waits for receiving part or all of spinel frame within specified interval.
+ *
+ * @param[in] aTimeout A reference to the timeout.
+ *
+ * @retval OT_ERROR_NONE Part or all of spinel frame is received.
+ * @retval OT_ERROR_RESPONSE_TIMEOUT No spinel frame is received within @p aTimeout.
+ *
+ */
+ otError WaitForFrame(const struct timeval &aTimeout);
+
+ /**
+ * This method updates the file descriptor sets with file descriptors used by the radio driver.
+ *
+ * @param[inout] aReadFdSet A reference to the read file descriptors.
+ * @param[inout] aWriteFdSet A reference to the write file descriptors.
+ * @param[inout] aMaxFd A reference to the max file descriptor.
+ * @param[inout] aTimeout A reference to the timeout.
+ *
+ */
+ void UpdateFdSet(fd_set &aReadFdSet, fd_set &aWriteFdSet, int &aMaxFd, struct timeval &aTimeout);
+
+ /**
+ * This method performs radio driver processing.
+ *
+ * @param[in] aReadFdSet A reference to the read file descriptors.
+ * @param[in] aWriteFdSet A reference to the write file descriptors.
+ *
+ */
+ void Process(const fd_set &aReadFdSet, const fd_set &aWriteFdSet);
+
#if OPENTHREAD_POSIX_VIRTUAL_TIME
/**
* This method process read data (decode the data).
@@ -194,6 +148,15 @@
private:
/**
+ * This method instructs `HdlcInterface` to read and decode data from radio over the socket.
+ *
+ * If a full HDLC frame is decoded while reading data, this method invokes the `HandleReceivedFrame()` (on the
+ * `aCallback` object from constructor) to pass the received frame to be processed.
+ *
+ */
+ void Read(void);
+
+ /**
* This method waits for the socket file descriptor associated with the HDLC interface to become writable within
* `kMaxWaitTime` interval.
*
@@ -238,14 +201,21 @@
static int ForkPty(const char *aCommand, const char *aArguments);
#endif
- Callbacks & mCallbacks;
+ enum
+ {
+ kMaxFrameSize = SpinelInterface::kMaxFrameSize,
+ kMaxWaitTime = 2000, ///< Maximum wait time in Milliseconds for socket to become writable (see `SendFrame`).
+ };
+
+ SpinelInterface::Callbacks & mCallbacks;
+ SpinelInterface::RxFrameBuffer &mRxFrameBuffer;
+
int mSockFd;
- bool mIsDecoding;
- RxFrameBuffer mRxFrameBuffer;
Hdlc::Decoder mHdlcDecoder;
};
} // namespace PosixApp
} // namespace ot
+#endif // OPENTHREAD_POSIX_RCP_UART_ENABLE
#endif // POSIX_APP_HDLC_INTERFACE_HPP_
diff --git a/src/posix/platform/netif.cpp b/src/posix/platform/netif.cpp
index a634d8c..c86a3fd 100644
--- a/src/posix/platform/netif.cpp
+++ b/src/posix/platform/netif.cpp
@@ -98,12 +98,24 @@
ifr6.ifr6_ifindex = static_cast<int>(sTunIndex);
ifr6.ifr6_prefixlen = aPrefixLength;
- VerifyOrExit(ioctl(sIpFd, (aIsAdded ? SIOCSIFADDR : SIOCDIFADDR), &ifr6) == 0, perror("ioctl");
- error = OT_ERROR_FAILED);
+ if (aIsAdded)
+ {
+ VerifyOrDie(ioctl(sIpFd, SIOCSIFADDR, &ifr6) == 0, OT_EXIT_ERROR_ERRNO);
+ }
+ else
+ {
+ VerifyOrExit(ioctl(sIpFd, SIOCDIFADDR, &ifr6) == 0, perror("ioctl"); error = OT_ERROR_FAILED);
+ }
exit:
- SuccessOrDie(error);
- otLogInfoPlat("%s: %s", __func__, otThreadErrorToString(error));
+ if (error != OT_ERROR_NONE)
+ {
+ otLogWarnPlat("%s: %s", __func__, otThreadErrorToString(error));
+ }
+ else
+ {
+ otLogInfoPlat("%s: %s", __func__, otThreadErrorToString(error));
+ }
}
static void UpdateMulticast(otInstance *aInstance, const otIp6Address &aAddress, bool aIsAdded)
@@ -398,13 +410,8 @@
VerifyOrExit(ioctl(sTunFd, TUNSETIFF, static_cast<void *>(&ifr)) == 0,
otLogCritPlat("Unable to configure tun device %s", OPENTHREAD_POSIX_TUN_DEVICE));
-#if defined(ARPHRD_6LOWPAN)
- VerifyOrExit(ioctl(sTunFd, TUNSETLINK, ARPHRD_6LOWPAN) == 0,
+ VerifyOrExit(ioctl(sTunFd, TUNSETLINK, ARPHRD_VOID) == 0,
otLogCritPlat("Unable to set link type of tun device %s", OPENTHREAD_POSIX_TUN_DEVICE));
-#else
- VerifyOrExit(ioctl(sTunFd, TUNSETLINK, ARPHRD_ETHER) == 0,
- otLogCritPlat("Unable to set link type of tun device %s", OPENTHREAD_POSIX_TUN_DEVICE));
-#endif
sTunIndex = if_nametoindex(ifr.ifr_name);
VerifyOrExit(sTunIndex > 0);
diff --git a/src/posix/platform/openthread-core-posix-config.h b/src/posix/platform/openthread-core-posix-config.h
index 908809a..9280cb2 100644
--- a/src/posix/platform/openthread-core-posix-config.h
+++ b/src/posix/platform/openthread-core-posix-config.h
@@ -35,6 +35,16 @@
#define OPENTHREAD_CORE_POSIX_CONFIG_H_
/**
+ * @def OPENTHREAD_CONFIG_LOG_PLATFORM
+ *
+ * Define to enable platform region logging.
+ *
+ */
+#ifndef OPENTHREAD_CONFIG_LOG_PLATFORM
+#define OPENTHREAD_CONFIG_LOG_PLATFORM 1
+#endif
+
+/**
* @def OPENTHREAD_CONFIG_PLATFORM_INFO
*
* The platform-specific string to insert into the OpenThread version string.
@@ -63,12 +73,12 @@
#define OPENTHREAD_CONFIG_NCP_UART_ENABLE 1
/**
- * @def OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_METRICS_ENABLE
+ * @def OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE
*
- * Define to 1 if you want to enable radio coexistence metrics implemented in platform.
+ * Define to 1 if you want to enable radio coexistence implemented in platform.
*
*/
-#ifndef OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_METRICS_ENABLE
-#define OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_METRICS_ENABLE 1
+#ifndef OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE
+#define OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE 1
#endif
#endif // OPENTHREAD_CORE_POSIX_CONFIG_H_
diff --git a/src/posix/platform/openthread-system.h b/src/posix/platform/openthread-system.h
index 3c1d797..e582cbf 100644
--- a/src/posix/platform/openthread-system.h
+++ b/src/posix/platform/openthread-system.h
@@ -85,17 +85,45 @@
};
/**
+ * This enumeration represents default parameters for the SPI interface.
+ *
+ */
+enum
+{
+ OT_PLATFORM_CONFIG_SPI_DEFAULT_MODE = 0, ///< Default SPI Mode: CPOL=0, CPHA=0.
+ OT_PLATFORM_CONFIG_SPI_DEFAULT_SPEED_HZ = 1000000, ///< Default SPI speed in hertz.
+ OT_PLATFORM_CONFIG_SPI_DEFAULT_CS_DELAY_US = 20, ///< Default delay after SPI CÌ…SÌ… assertion, in µsec.
+ OT_PLATFORM_CONFIG_SPI_DEFAULT_RESET_DELAY_MS = 0, ///< Default delay after RÌ…EÌ…SÌ…EÌ…TÌ… assertion, in miliseconds.
+ OT_PLATFORM_CONFIG_SPI_DEFAULT_ALIGN_ALLOWANCE =
+ 16, ///< Default maximum number of 0xFF bytes to clip from start of MISO frame.
+ OT_PLATFORM_CONFIG_SPI_DEFAULT_SMALL_PACKET_SIZE =
+ 32, ///< Default smallest SPI packet size we can receive in a single transaction.
+};
+
+/**
* This structure represents platform specific configurations.
*
*/
typedef struct otPlatformConfig
{
- uint64_t mNodeId; /// Unique node ID.
- const char *mInterfaceName; /// Thread network interface name.
- const char *mRadioFile; /// Radio file path.
- const char *mRadioConfig; /// Radio configurations.
- uint32_t mSpeedUpFactor; /// Speed up factor.
- bool mResetRadio; /// Whether to reset RCP when initializing.
+ uint64_t mNodeId; ///< Unique node ID.
+ uint32_t mSpeedUpFactor; ///< Speed up factor.
+ const char *mInterfaceName; ///< Thread network interface name.
+ const char *mRadioFile; ///< Radio file path.
+ const char *mRadioConfig; ///< Radio configurations.
+ bool mResetRadio; ///< Whether to reset RCP when initializing.
+ bool mRestoreDatasetFromNcp; ///< Whether to retrieve dataset from NCP and save to file.
+
+ char * mSpiGpioIntDevice; ///< Path to the Linux GPIO character device for the `IÌ…NÌ…TÌ…` pin.
+ char * mSpiGpioResetDevice; ///< Path to the Linux GPIO character device for the `RÌ…EÌ…SÌ…EÌ…TÌ…` pin.
+ uint8_t mSpiGpioIntLine; ///< Line index of the `IÌ…NÌ…TÌ…` pin for the associated GPIO character device.
+ uint8_t mSpiGpioResetLine; ///< Line index of the `RÌ…EÌ…SÌ…EÌ…TÌ…` pin for the associated GPIO character device.
+ uint8_t mSpiMode; ///< SPI mode to use (0-3).
+ uint32_t mSpiSpeed; ///< SPI speed in hertz.
+ uint32_t mSpiResetDelay; ///< The delay after RÌ…EÌ…SÌ…EÌ…TÌ… assertion, in miliseconds.
+ uint16_t mSpiCsDelay; ///< The delay after SPI CÌ…SÌ… assertion, in µsec.
+ uint8_t mSpiAlignAllowance; ///< Maximum number of 0xFF bytes to clip from start of MISO frame.
+ uint8_t mSpiSmallPacketSize; ///< Smallest SPI packet size we can receive in a single transaction.
} otPlatformConfig;
/**
@@ -104,7 +132,7 @@
* @note This function is not called by the OpenThread library. Instead, the system/RTOS should call this function
* when initialization of OpenThread's drivers is most appropriate.
*
- * @param[in] aPlatformConfig Argument vector.
+ * @param[in] aPlatformConfig Platform configuration structure.
*
* @returns A pointer to the OpenThread instance.
*
diff --git a/src/posix/platform/platform-config.h b/src/posix/platform/platform-config.h
index 98371b6..1508fc3 100644
--- a/src/posix/platform/platform-config.h
+++ b/src/posix/platform/platform-config.h
@@ -55,4 +55,14 @@
#define OPENTHREAD_POSIX_APP_SOCKET_BASENAME "/tmp/openthread"
#endif
+/**
+ * @def OPENTHREAD_POSIX_VIRTUAL_TIME
+ *
+ * This setting configures whether to use virtual time.
+ *
+ */
+#ifndef OPENTHREAD_POSIX_VIRTUAL_TIME
+#define OPENTHREAD_POSIX_VIRTUAL_TIME 0
+#endif
+
#endif // OPENTHREAD_PLATFORM_CONFIG_H_
diff --git a/src/posix/platform/platform-posix.h b/src/posix/platform/platform-posix.h
index 6893df1..d2a19cc 100644
--- a/src/posix/platform/platform-posix.h
+++ b/src/posix/platform/platform-posix.h
@@ -94,16 +94,14 @@
* @param[in] aExitCode The exit code.
*
*/
-#define VerifyOrDie(aCondition, aExitCode) \
- do \
- { \
- if (!(aCondition)) \
- { \
- fprintf(stderr, "exit(%d): %s line %d, %s\r\n", aExitCode, __func__, __LINE__, \
- otExitCodeToString(aExitCode)); \
- otLogCritPlat("exit(%d): %s line %d, %s", aExitCode, __func__, __LINE__, otExitCodeToString(aExitCode)); \
- exit(aExitCode); \
- } \
+#define VerifyOrDie(aCondition, aExitCode) \
+ do \
+ { \
+ if (!(aCondition)) \
+ { \
+ otLogCritPlat("%s() at %s:%d: %s", __func__, __FILE__, __LINE__, otExitCodeToString(aExitCode)); \
+ exit(aExitCode); \
+ } \
} while (false)
/**
@@ -113,19 +111,9 @@
* @param[in] aError An error code to be evaluated against OT_ERROR_NONE.
*
*/
-#define SuccessOrDie(aError) \
- do \
- { \
- if (aError != OT_ERROR_NONE) \
- { \
- uint8_t exitCode; \
- exitCode = (aError == OT_ERROR_INVALID_ARGS) ? OT_EXIT_INVALID_ARGUMENTS : OT_EXIT_FAILURE; \
- fprintf(stderr, "exit(%d): %s line %d, %s\r\n", exitCode, __func__, __LINE__, \
- otThreadErrorToString(aError)); \
- otLogCritPlat("exit(%d): %s line %d, %s", exitCode, __func__, __LINE__, otThreadErrorToString(aError)); \
- exit(exitCode); \
- } \
- } while (false)
+#define SuccessOrDie(aError) \
+ VerifyOrDie(aError == OT_ERROR_NONE, \
+ (aError == OT_ERROR_INVALID_ARGS ? OT_EXIT_INVALID_ARGUMENTS : OT_EXIT_FAILURE))
/**
* This macro unconditionally both records exit status and terminates the program.
@@ -204,15 +192,13 @@
/**
* This function initializes the radio service used by OpenThread.
*
- * @note Even when @p aReset is false, a reset event (i.e. a PROP_LAST_STATUS between
+ * @note Even when @p aPlatformConfig->mResetRadio is false, a reset event (i.e. a PROP_LAST_STATUS between
* [SPINEL_STATUS_RESET__BEGIN, SPINEL_STATUS_RESET__END]) is still expected from RCP.
*
- * @param[in] aRadioFile A pointer to the radio file.
- * @param[in] aRadioConfig A pointer to the radio config.
- * @param[in] aReset Whether to reset RCP when initializing.
+ * @param[in] aPlatformConfig Platform configuration structure.
*
*/
-void platformRadioInit(const char *aRadioFile, const char *aRadioConfig, bool aReset);
+void platformRadioInit(const otPlatformConfig *aPlatformConfig);
/**
* This function shuts down the radio service used by OpenThread.
@@ -382,15 +368,6 @@
void platformSimSendSleepEvent(const struct timeval *aTimeout);
/**
- * This function updates the file descriptor sets with file descriptors
- * used by radio spinel of virtual time simulation.
- *
- * @param[out] aTimeout A pointer to the timeout event to be updated.
- *
- */
-void platformSimRadioSpinelUpdate(struct timeval *atimeout);
-
-/**
* This function performs radio spinel processing of virtual time simulation.
*
* @param[in] aInstance A pointer to the OpenThread instance.
diff --git a/src/posix/platform/radio_spinel.cpp b/src/posix/platform/radio_spinel.cpp
index e024ebf..2f8048e 100644
--- a/src/posix/platform/radio_spinel.cpp
+++ b/src/posix/platform/radio_spinel.cpp
@@ -33,6 +33,7 @@
#include "openthread-core-config.h"
#include "platform-posix.h"
+#include "ncp/spinel_decoder.hpp"
#include "radio_spinel.hpp"
@@ -51,9 +52,15 @@
#include <common/code_utils.hpp>
#include <common/encoding.hpp>
#include <common/logging.hpp>
+#include <common/new.hpp>
+#include <common/settings.hpp>
+#include <meshcop/dataset.hpp>
+#include <meshcop/meshcop_tlvs.hpp>
+#include <openthread/dataset.h>
#include <openthread/platform/alarm-milli.h>
#include <openthread/platform/diag.h>
#include <openthread/platform/radio.h>
+#include <openthread/platform/settings.h>
#ifndef TX_WAIT_US
#define TX_WAIT_US (5 * US_PER_S)
@@ -149,14 +156,15 @@
}
}
-void HdlcInterface::Callbacks::HandleReceivedFrame(HdlcInterface &aInterface)
+void SpinelInterface::Callbacks::HandleReceivedFrame(void)
{
- static_cast<RadioSpinel *>(this)->HandleSpinelFrame(aInterface.GetRxFrameBuffer());
+ static_cast<RadioSpinel *>(this)->HandleReceivedFrame();
}
RadioSpinel::RadioSpinel(void)
: mInstance(NULL)
- , mHdlcInterface(*this)
+ , mRxFrameBuffer()
+ , mSpinelInterface(*this, mRxFrameBuffer)
, mCmdTidsInUse(0)
, mCmdNextTid(1)
, mTxRadioTid(0)
@@ -185,13 +193,14 @@
mVersion[0] = '\0';
}
-void RadioSpinel::Init(const char *aRadioFile, const char *aRadioConfig, bool aReset)
+void RadioSpinel::Init(const otPlatformConfig &aPlatformConfig)
{
otError error = OT_ERROR_NONE;
+ bool isRcp;
- SuccessOrExit(error = mHdlcInterface.Init(aRadioFile, aRadioConfig));
+ SuccessOrExit(error = mSpinelInterface.Init(aPlatformConfig));
- if (aReset)
+ if (aPlatformConfig.mResetRadio)
{
SuccessOrExit(error = SendReset());
}
@@ -200,14 +209,19 @@
VerifyOrExit(mIsReady, error = OT_ERROR_FAILED);
SuccessOrExit(error = CheckSpinelVersion());
- SuccessOrExit(error = CheckCapabilities());
- SuccessOrExit(error = CheckRadioCapabilities());
-
+ SuccessOrExit(error = CheckCapabilities(isRcp));
SuccessOrExit(error = Get(SPINEL_PROP_NCP_VERSION, SPINEL_DATATYPE_UTF8_S, mVersion, sizeof(mVersion)));
SuccessOrExit(error = Get(SPINEL_PROP_HWADDR, SPINEL_DATATYPE_UINT64_S, &gNodeId));
gNodeId = ot::Encoding::BigEndian::HostSwap64(gNodeId);
+ if (aPlatformConfig.mRestoreDatasetFromNcp && !isRcp)
+ {
+ DieNow((RestoreDatasetFromNcp() == OT_ERROR_NONE) ? OT_EXIT_SUCCESS : OT_EXIT_FAILURE);
+ }
+
+ SuccessOrExit(error = CheckRadioCapabilities());
+
mRxRadioFrame.mPsdu = mRxPsdu;
mTxRadioFrame.mPsdu = mTxPsdu;
mAckRadioFrame.mPsdu = mAckPsdu;
@@ -238,7 +252,7 @@
return error;
}
-otError RadioSpinel::CheckCapabilities(void)
+otError RadioSpinel::CheckCapabilities(bool &aIsRcp)
{
otError error = OT_ERROR_NONE;
uint8_t capsBuffer[kCapsBufferSize];
@@ -248,6 +262,8 @@
SuccessOrExit(error = Get(SPINEL_PROP_CAPS, SPINEL_DATATYPE_DATA_S, capsBuffer, &capsLength));
+ aIsRcp = false;
+
while (capsLength > 0)
{
unsigned int capability;
@@ -266,11 +282,16 @@
supportsRawRadio = true;
}
+ if (capability == SPINEL_CAP_CONFIG_RADIO)
+ {
+ aIsRcp = true;
+ }
+
capsData += unpacked;
capsLength -= static_cast<spinel_size_t>(unpacked);
}
- if (!supportsRawRadio)
+ if (!supportsRawRadio && aIsRcp)
{
otLogCritPlat("RCP capability list does not include support for radio/raw mode");
DieNow(OT_EXIT_RADIO_SPINEL_INCOMPATIBLE);
@@ -305,18 +326,37 @@
return error;
}
-void RadioSpinel::Deinit(void)
+otError RadioSpinel::RestoreDatasetFromNcp(void)
{
- mHdlcInterface.Deinit();
+ otError error = OT_ERROR_NONE;
+
+ otPlatSettingsInit(mInstance);
+
+ otLogInfoPlat("Trying to get saved dataset from NCP");
+ SuccessOrExit(
+ error = Get(SPINEL_PROP_THREAD_ACTIVE_DATASET, SPINEL_DATATYPE_VOID_S, &RadioSpinel::ThreadDatasetHandler));
+ SuccessOrExit(
+ error = Get(SPINEL_PROP_THREAD_PENDING_DATASET, SPINEL_DATATYPE_VOID_S, &RadioSpinel::ThreadDatasetHandler));
+
+exit:
+ otPlatSettingsDeinit(mInstance);
+ return error;
}
-void RadioSpinel::HandleSpinelFrame(HdlcInterface::RxFrameBuffer &aFrameBuffer)
+void RadioSpinel::Deinit(void)
+{
+ mSpinelInterface.Deinit();
+ // This allows implementing pseudo reset.
+ new (this) RadioSpinel();
+}
+
+void RadioSpinel::HandleReceivedFrame(void)
{
otError error = OT_ERROR_NONE;
uint8_t header;
spinel_ssize_t unpacked;
- unpacked = spinel_datatype_unpack(aFrameBuffer.GetFrame(), aFrameBuffer.GetLength(), "C", &header);
+ unpacked = spinel_datatype_unpack(mRxFrameBuffer.GetFrame(), mRxFrameBuffer.GetLength(), "C", &header);
VerifyOrExit(unpacked > 0 && (header & SPINEL_HEADER_FLAG) == SPINEL_HEADER_FLAG &&
SPINEL_HEADER_GET_IID(header) == 0,
@@ -324,23 +364,23 @@
if (SPINEL_HEADER_GET_TID(header) == 0)
{
- HandleNotification(aFrameBuffer);
+ HandleNotification(mRxFrameBuffer);
}
else
{
- HandleResponse(aFrameBuffer.GetFrame(), aFrameBuffer.GetLength());
- aFrameBuffer.DiscardFrame();
+ HandleResponse(mRxFrameBuffer.GetFrame(), mRxFrameBuffer.GetLength());
+ mRxFrameBuffer.DiscardFrame();
}
exit:
if (error != OT_ERROR_NONE)
{
- aFrameBuffer.DiscardFrame();
+ mRxFrameBuffer.DiscardFrame();
otLogWarnPlat("Error handling hdlc frame: %s", otThreadErrorToString(error));
}
}
-void RadioSpinel::HandleNotification(HdlcInterface::RxFrameBuffer &aFrameBuffer)
+void RadioSpinel::HandleNotification(SpinelInterface::RxFrameBuffer &aFrameBuffer)
{
spinel_prop_key_t key;
spinel_size_t len = 0;
@@ -453,6 +493,159 @@
LogIfFail("Error processing response", error);
}
+otError RadioSpinel::ThreadDatasetHandler(const uint8_t *aBuffer, uint16_t aLength)
+{
+ otError error = OT_ERROR_NONE;
+ otOperationalDataset opDataset;
+ bool isActive = ((mWaitingKey == SPINEL_PROP_THREAD_ACTIVE_DATASET) ? true : false);
+ Ncp::SpinelDecoder decoder;
+ MeshCoP::Dataset dataset(isActive ? MeshCoP::Tlv::kActiveTimestamp : MeshCoP::Tlv::kPendingTimestamp);
+
+ memset(&opDataset, 0, sizeof(otOperationalDataset));
+ decoder.Init(aBuffer, aLength);
+
+ while (!decoder.IsAllReadInStruct())
+ {
+ unsigned int propKey;
+
+ SuccessOrExit(error = decoder.OpenStruct());
+ SuccessOrExit(error = decoder.ReadUintPacked(propKey));
+
+ switch (static_cast<spinel_prop_key_t>(propKey))
+ {
+ case SPINEL_PROP_NET_MASTER_KEY:
+ {
+ const uint8_t *key;
+ uint16_t len;
+
+ SuccessOrExit(error = decoder.ReadData(key, len));
+ VerifyOrExit(len == OT_MASTER_KEY_SIZE, error = OT_ERROR_INVALID_ARGS);
+ memcpy(opDataset.mMasterKey.m8, key, len);
+ opDataset.mComponents.mIsMasterKeyPresent = true;
+ break;
+ }
+
+ case SPINEL_PROP_NET_NETWORK_NAME:
+ {
+ const char *name;
+ size_t len;
+
+ SuccessOrExit(error = decoder.ReadUtf8(name));
+ len = StringLength(name, OT_NETWORK_NAME_MAX_SIZE);
+ memcpy(opDataset.mNetworkName.m8, name, len);
+ opDataset.mNetworkName.m8[len] = '\0';
+ opDataset.mComponents.mIsNetworkNamePresent = true;
+ break;
+ }
+
+ case SPINEL_PROP_NET_XPANID:
+ {
+ const uint8_t *xpanid;
+ uint16_t len;
+
+ SuccessOrExit(error = decoder.ReadData(xpanid, len));
+ VerifyOrExit(len == OT_EXT_PAN_ID_SIZE, error = OT_ERROR_INVALID_ARGS);
+ memcpy(opDataset.mExtendedPanId.m8, xpanid, len);
+ opDataset.mComponents.mIsExtendedPanIdPresent = true;
+ break;
+ }
+
+ case SPINEL_PROP_IPV6_ML_PREFIX:
+ {
+ const otIp6Address *addr;
+ uint8_t prefixLen;
+
+ SuccessOrExit(error = decoder.ReadIp6Address(addr));
+ SuccessOrExit(error = decoder.ReadUint8(prefixLen));
+ VerifyOrExit(prefixLen == OT_IP6_PREFIX_BITSIZE, error = OT_ERROR_INVALID_ARGS);
+ memcpy(opDataset.mMeshLocalPrefix.m8, addr, OT_MESH_LOCAL_PREFIX_SIZE);
+ opDataset.mComponents.mIsMeshLocalPrefixPresent = true;
+ break;
+ }
+
+ case SPINEL_PROP_DATASET_DELAY_TIMER:
+ {
+ SuccessOrExit(error = decoder.ReadUint32(opDataset.mDelay));
+ opDataset.mComponents.mIsDelayPresent = true;
+ break;
+ }
+
+ case SPINEL_PROP_MAC_15_4_PANID:
+ {
+ SuccessOrExit(error = decoder.ReadUint16(opDataset.mPanId));
+ opDataset.mComponents.mIsPanIdPresent = true;
+ break;
+ }
+
+ case SPINEL_PROP_PHY_CHAN:
+ {
+ uint8_t channel;
+
+ SuccessOrExit(error = decoder.ReadUint8(channel));
+ opDataset.mChannel = channel;
+ opDataset.mComponents.mIsChannelPresent = true;
+ break;
+ }
+
+ case SPINEL_PROP_NET_PSKC:
+ {
+ const uint8_t *psk;
+ uint16_t len;
+
+ SuccessOrExit(error = decoder.ReadData(psk, len));
+ VerifyOrExit(len == OT_PSKC_MAX_SIZE, error = OT_ERROR_INVALID_ARGS);
+ memcpy(opDataset.mPskc.m8, psk, OT_PSKC_MAX_SIZE);
+ opDataset.mComponents.mIsPskcPresent = true;
+ break;
+ }
+
+ case SPINEL_PROP_DATASET_SECURITY_POLICY:
+ {
+ SuccessOrExit(error = decoder.ReadUint16(opDataset.mSecurityPolicy.mRotationTime));
+ SuccessOrExit(error = decoder.ReadUint8(opDataset.mSecurityPolicy.mFlags));
+ opDataset.mComponents.mIsSecurityPolicyPresent = true;
+ break;
+ }
+
+ case SPINEL_PROP_PHY_CHAN_SUPPORTED:
+ {
+ uint8_t channel;
+
+ opDataset.mChannelMask = 0;
+
+ while (!decoder.IsAllReadInStruct())
+ {
+ SuccessOrExit(error = decoder.ReadUint8(channel));
+ VerifyOrExit(channel <= 31, error = OT_ERROR_INVALID_ARGS);
+ opDataset.mChannelMask |= (1UL << channel);
+ }
+ opDataset.mComponents.mIsChannelMaskPresent = true;
+ break;
+ }
+
+ default:
+ break;
+ }
+
+ SuccessOrExit(error = decoder.CloseStruct());
+ }
+
+ /*
+ * Initially set Active Timestamp to 0. This is to allow the node to join the network
+ * yet retrieve the full Active Dataset from a neighboring device if one exists.
+ */
+ opDataset.mActiveTimestamp = 0;
+ opDataset.mComponents.mIsActiveTimestampPresent = true;
+
+ SuccessOrExit(error = dataset.Set(opDataset));
+ SuccessOrExit(error = otPlatSettingsSet(
+ mInstance, isActive ? SettingsBase::kKeyActiveDataset : SettingsBase::kKeyPendingDataset,
+ dataset.GetBytes(), dataset.GetSize()));
+
+exit:
+ return error;
+}
+
void RadioSpinel::HandleWaitingResponse(uint32_t aCommand,
spinel_prop_key_t aKey,
const uint8_t * aBuffer,
@@ -481,11 +674,22 @@
{
if (mPropertyFormat)
{
- spinel_ssize_t unpacked =
- spinel_datatype_vunpack_in_place(aBuffer, aLength, mPropertyFormat, mPropertyArgs);
+ if (static_cast<spinel_datatype_t>(mPropertyFormat[0]) == SPINEL_DATATYPE_VOID_C)
+ {
+ // reserved SPINEL_DATATYPE_VOID_C indicate caller want to parse the spinel response itself
+ ResponseHandler handler = va_arg(mPropertyArgs, ResponseHandler);
- VerifyOrExit(unpacked > 0, mError = OT_ERROR_PARSE);
- mError = OT_ERROR_NONE;
+ assert(handler != NULL);
+ mError = (this->*handler)(aBuffer, aLength);
+ }
+ else
+ {
+ spinel_ssize_t unpacked =
+ spinel_datatype_vunpack_in_place(aBuffer, aLength, mPropertyFormat, mPropertyArgs);
+
+ VerifyOrExit(unpacked > 0, mError = OT_ERROR_PARSE);
+ mError = OT_ERROR_NONE;
+ }
}
else
{
@@ -527,11 +731,11 @@
if (status >= SPINEL_STATUS_RESET__BEGIN && status <= SPINEL_STATUS_RESET__END)
{
- otLogCritPlat("RCP reset: %s", spinel_status_to_cstr(status));
- mIsReady = true;
-
// If RCP crashes/resets while radio was enabled, posix app exits.
VerifyOrDie(!IsEnabled(), OT_EXIT_RADIO_SPINEL_RESET);
+
+ otLogInfoPlat("RCP reset: %s", spinel_status_to_cstr(status));
+ mIsReady = true;
}
else
{
@@ -659,12 +863,12 @@
uint8_t *frame = NULL;
uint16_t length;
- while (mHdlcInterface.GetRxFrameBuffer().GetNextSavedFrame(frame, length) == OT_ERROR_NONE)
+ while (mRxFrameBuffer.GetNextSavedFrame(frame, length) == OT_ERROR_NONE)
{
HandleNotification(frame, length);
}
- mHdlcInterface.GetRxFrameBuffer().ClearSavedFrames();
+ mRxFrameBuffer.ClearSavedFrames();
}
void RadioSpinel::RadioReceive(void)
@@ -678,7 +882,6 @@
ExitNow();
case kStateReceive:
- case kStateTransmitPending:
case kStateTransmitting:
case kStateTransmitDone:
break;
@@ -700,22 +903,25 @@
return;
}
+void RadioSpinel::TransmitDone(otRadioFrame *aFrame, otRadioFrame *aAckFrame, otError aError)
+{
+#if OPENTHREAD_CONFIG_DIAG_ENABLE
+ if (otPlatDiagModeGet())
+ {
+ otPlatDiagRadioTransmitDone(mInstance, aFrame, aError);
+ }
+ else
+#endif
+ {
+ otPlatRadioTxDone(mInstance, aFrame, aAckFrame, aError);
+ }
+}
+
void RadioSpinel::UpdateFdSet(fd_set &aReadFdSet, fd_set &aWriteFdSet, int &aMaxFd, struct timeval &aTimeout)
{
- int sockFd = mHdlcInterface.GetSocket();
+ mSpinelInterface.UpdateFdSet(aReadFdSet, aWriteFdSet, aMaxFd, aTimeout);
- FD_SET(sockFd, &aReadFdSet);
-
- if (aMaxFd < sockFd)
- {
- aMaxFd = sockFd;
- }
-
- if (mState == kStateTransmitPending)
- {
- FD_SET(sockFd, &aWriteFdSet);
- }
- else if (mState == kStateTransmitting)
+ if (mState == kStateTransmitting)
{
uint64_t now = platformGetTime();
@@ -736,7 +942,7 @@
}
}
- if (mHdlcInterface.GetRxFrameBuffer().HasSavedFrame() || (mState == kStateTransmitDone))
+ if (mRxFrameBuffer.HasSavedFrame() || (mState == kStateTransmitDone))
{
aTimeout.tv_sec = 0;
aTimeout.tv_usec = 0;
@@ -745,15 +951,16 @@
void RadioSpinel::Process(const fd_set &aReadFdSet, const fd_set &aWriteFdSet)
{
- if (mHdlcInterface.GetRxFrameBuffer().HasSavedFrame())
+ if (mRxFrameBuffer.HasSavedFrame())
{
// Handle frames received and saved during `WaitResponse()`
ProcessFrameQueue();
}
- if (FD_ISSET(mHdlcInterface.GetSocket(), &aReadFdSet))
+ mSpinelInterface.Process(aReadFdSet, aWriteFdSet);
+
+ if (mRxFrameBuffer.HasSavedFrame())
{
- mHdlcInterface.Read();
ProcessFrameQueue();
}
@@ -762,30 +969,13 @@
mState = kStateReceive;
mTxRadioEndUs = UINT64_MAX;
-#if OPENTHREAD_CONFIG_DIAG_ENABLE
- if (otPlatDiagModeGet())
- {
- otPlatDiagRadioTransmitDone(mInstance, mTransmitFrame, mTxError);
- }
- else
-#endif
- {
- otPlatRadioTxDone(mInstance, mTransmitFrame, (mAckRadioFrame.mLength != 0) ? &mAckRadioFrame : NULL,
- mTxError);
- }
+ TransmitDone(mTransmitFrame, (mAckRadioFrame.mLength != 0) ? &mAckRadioFrame : NULL, mTxError);
}
else if (mState == kStateTransmitting && platformGetTime() >= mTxRadioEndUs)
{
+ // Frame has been successfully passed to radio, but no `TransmitDone` event received within TX_WAIT_US.
DieNowWithMessage("radio tx timeout", OT_EXIT_FAILURE);
}
-
- if (FD_ISSET(mHdlcInterface.GetSocket(), &aWriteFdSet))
- {
- if (mState == kStateTransmitPending)
- {
- RadioTransmit();
- }
- }
}
otError RadioSpinel::SetPromiscuous(bool aEnable)
@@ -883,6 +1073,14 @@
return error;
}
+otError RadioSpinel::GetCcaEnergyDetectThreshold(int8_t &aThreshold)
+{
+ otError error = Get(SPINEL_PROP_PHY_CCA_THRESHOLD, SPINEL_DATATYPE_INT8_S, &aThreshold);
+
+ LogIfFail("Get CCA ED threshold failed", error);
+ return error;
+}
+
int8_t RadioSpinel::GetRssi(void)
{
int8_t rssi = OT_RADIO_RSSI_INVALID;
@@ -892,7 +1090,21 @@
return rssi;
}
-#if OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_METRICS_ENABLE
+#if OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE
+otError RadioSpinel::SetCoexEnabled(bool aEnabled)
+{
+ return Set(SPINEL_PROP_RADIO_COEX_ENABLE, SPINEL_DATATYPE_BOOL_S, aEnabled);
+}
+
+bool RadioSpinel::IsCoexEnabled(void)
+{
+ bool enabled;
+ otError error = Get(SPINEL_PROP_RADIO_COEX_ENABLE, SPINEL_DATATYPE_BOOL_S, &enabled);
+
+ LogIfFail("Get Coex State failed", error);
+ return enabled;
+}
+
otError RadioSpinel::GetCoexMetrics(otRadioCoexMetrics &aCoexMetrics)
{
otError error;
@@ -940,6 +1152,13 @@
return error;
}
+otError RadioSpinel::SetCcaEnergyDetectThreshold(int8_t aThreshold)
+{
+ otError error = Set(SPINEL_PROP_PHY_CCA_THRESHOLD, SPINEL_DATATYPE_INT8_S, aThreshold);
+ LogIfFail("Set CCA ED threshold failed", error);
+ return error;
+}
+
otError RadioSpinel::EnergyScan(uint8_t aScanChannel, uint16_t aScanDuration)
{
otError error;
@@ -1022,68 +1241,12 @@
do
{
-#if OPENTHREAD_POSIX_VIRTUAL_TIME
- struct Event event;
-
- platformSimSendSleepEvent(&timeout);
- platformSimReceiveEvent(&event);
-
- switch (event.mEvent)
- {
- case OT_SIM_EVENT_RADIO_SPINEL_WRITE:
- mHdlcInterface.ProcessReadData(event.mData, event.mDataLength);
- break;
-
- case OT_SIM_EVENT_ALARM_FIRED:
- FreeTid(mWaitingTid);
- mWaitingTid = 0;
- ExitNow(mError = OT_ERROR_RESPONSE_TIMEOUT);
- break;
-
- default:
- assert(false);
- break;
- }
-#else // OPENTHREAD_POSIX_VIRTUAL_TIME
- int sockFd = mHdlcInterface.GetSocket();
- fd_set read_fds;
- fd_set error_fds;
- int rval;
-
- FD_ZERO(&read_fds);
- FD_ZERO(&error_fds);
- FD_SET(sockFd, &read_fds);
- FD_SET(sockFd, &error_fds);
-
- rval = select(sockFd + 1, &read_fds, NULL, &error_fds, &timeout);
-
- if (rval > 0)
- {
- if (FD_ISSET(sockFd, &read_fds))
- {
- mHdlcInterface.Read();
- }
- else if (FD_ISSET(sockFd, &error_fds))
- {
- DieNowWithMessage("NCP error", OT_EXIT_FAILURE);
- }
- else
- {
- assert(false);
- DieNow(OT_EXIT_FAILURE);
- }
- }
- else if (rval == 0)
+ if (mSpinelInterface.WaitForFrame(timeout) == OT_ERROR_RESPONSE_TIMEOUT)
{
FreeTid(mWaitingTid);
mWaitingTid = 0;
ExitNow(mError = OT_ERROR_RESPONSE_TIMEOUT);
}
- else if (errno != EINTR)
- {
- DieNowWithMessage("wait response", OT_EXIT_FAILURE);
- }
-#endif // OPENTHREAD_POSIX_VIRTUAL_TIME
now = platformGetTime();
@@ -1122,53 +1285,6 @@
return tid;
}
-/**
- * This method delivers the radio frame to transceiver.
- *
- * otPlatRadioTxStarted() is triggered immediately for now, which may be earlier than real started time.
- *
- */
-void RadioSpinel::RadioTransmit(void)
-{
- otError error;
-
- assert(mTransmitFrame != NULL);
- otPlatRadioTxStarted(mInstance, mTransmitFrame);
- assert(mState == kStateTransmitPending);
-
- error = Request(true, SPINEL_CMD_PROP_VALUE_SET, SPINEL_PROP_STREAM_RAW,
- SPINEL_DATATYPE_DATA_WLEN_S // Frame data
- SPINEL_DATATYPE_UINT8_S // Channel
- SPINEL_DATATYPE_UINT8_S // MaxCsmaBackoffs
- SPINEL_DATATYPE_UINT8_S // MaxFrameRetries
- SPINEL_DATATYPE_BOOL_S, // CsmaCaEnabled
- mTransmitFrame->mPsdu, mTransmitFrame->mLength, mTransmitFrame->mChannel,
- mTransmitFrame->mInfo.mTxInfo.mMaxCsmaBackoffs, mTransmitFrame->mInfo.mTxInfo.mMaxFrameRetries,
- mTransmitFrame->mInfo.mTxInfo.mCsmaCaEnabled);
-
- if (error == OT_ERROR_NONE)
- {
- mTxRadioEndUs = platformGetTime() + TX_WAIT_US;
- mState = kStateTransmitting;
- }
- else
- {
- mState = kStateReceive;
-
-#if OPENTHREAD_CONFIG_DIAG_ENABLE
-
- if (otPlatDiagModeGet())
- {
- otPlatDiagRadioTransmitDone(mInstance, mTransmitFrame, error);
- }
- else
-#endif
- {
- otPlatRadioTxDone(mInstance, mTransmitFrame, NULL, error);
- }
- }
-}
-
otError RadioSpinel::SendReset(void)
{
otError error = OT_ERROR_NONE;
@@ -1181,7 +1297,7 @@
VerifyOrExit(packed > 0 && static_cast<size_t>(packed) <= sizeof(buffer), error = OT_ERROR_NO_BUFS);
- SuccessOrExit(error = mHdlcInterface.SendFrame(buffer, static_cast<uint16_t>(packed)));
+ SuccessOrExit(error = mSpinelInterface.SendFrame(buffer, static_cast<uint16_t>(packed)));
sleep(0);
@@ -1217,7 +1333,7 @@
offset += static_cast<uint16_t>(packed);
}
- error = mHdlcInterface.SendFrame(buffer, offset);
+ error = mSpinelInterface.SendFrame(buffer, offset);
exit:
return error;
@@ -1312,10 +1428,29 @@
otError error = OT_ERROR_INVALID_STATE;
VerifyOrExit(mState == kStateReceive);
- mState = kStateTransmitPending;
- error = OT_ERROR_NONE;
+
mTransmitFrame = &aFrame;
+ // `otPlatRadioTxStarted()` is triggered immediately for now, which may be earlier than real started time.
+ otPlatRadioTxStarted(mInstance, mTransmitFrame);
+
+ error = Request(true, SPINEL_CMD_PROP_VALUE_SET, SPINEL_PROP_STREAM_RAW,
+ SPINEL_DATATYPE_DATA_WLEN_S // Frame data
+ SPINEL_DATATYPE_UINT8_S // Channel
+ SPINEL_DATATYPE_UINT8_S // MaxCsmaBackoffs
+ SPINEL_DATATYPE_UINT8_S // MaxFrameRetries
+ SPINEL_DATATYPE_BOOL_S, // CsmaCaEnabled
+ mTransmitFrame->mPsdu, mTransmitFrame->mLength, mTransmitFrame->mChannel,
+ mTransmitFrame->mInfo.mTxInfo.mMaxCsmaBackoffs, mTransmitFrame->mInfo.mTxInfo.mMaxFrameRetries,
+ mTransmitFrame->mInfo.mTxInfo.mCsmaCaEnabled);
+
+ if (error == OT_ERROR_NONE)
+ {
+ // Waiting for `TransmitDone` event.
+ mState = kStateTransmitting;
+ mTxRadioEndUs = platformGetTime() + TX_WAIT_US;
+ }
+
exit:
return error;
}
@@ -1463,6 +1598,16 @@
return channelMask;
}
+otRadioState RadioSpinel::GetState(void) const
+{
+ static const otRadioState sOtRadioStateMap[] = {
+ OT_RADIO_STATE_DISABLED, OT_RADIO_STATE_SLEEP, OT_RADIO_STATE_RECEIVE,
+ OT_RADIO_STATE_TRANSMIT, OT_RADIO_STATE_TRANSMIT,
+ };
+
+ return sOtRadioStateMap[mState];
+}
+
} // namespace PosixApp
} // namespace ot
@@ -1503,9 +1648,9 @@
OT_UNUSED_VARIABLE(aInstance);
}
-void platformRadioInit(const char *aRadioFile, const char *aRadioConfig, bool aReset)
+void platformRadioInit(const otPlatformConfig *aPlatformConfig)
{
- sRadioSpinel.Init(aRadioFile, aRadioConfig, aReset);
+ sRadioSpinel.Init(*aPlatformConfig);
}
void platformRadioDeinit(void)
@@ -1664,13 +1809,38 @@
return sRadioSpinel.SetTransmitPower(aPower);
}
+otError otPlatRadioGetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t *aThreshold)
+{
+ assert(aThreshold != NULL);
+ OT_UNUSED_VARIABLE(aInstance);
+ return sRadioSpinel.GetCcaEnergyDetectThreshold(*aThreshold);
+}
+
+otError otPlatRadioSetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ return sRadioSpinel.SetCcaEnergyDetectThreshold(aThreshold);
+}
+
int8_t otPlatRadioGetReceiveSensitivity(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
return sRadioSpinel.GetReceiveSensitivity();
}
-#if OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_METRICS_ENABLE
+#if OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE
+otError otPlatRadioSetCoexEnabled(otInstance *aInstance, bool aEnabled)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ return sRadioSpinel.SetCoexEnabled(aEnabled);
+}
+
+bool otPlatRadioIsCoexEnabled(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ return sRadioSpinel.IsCoexEnabled();
+}
+
otError otPlatRadioGetCoexMetrics(otInstance *aInstance, otRadioCoexMetrics *aCoexMetrics)
{
OT_UNUSED_VARIABLE(aInstance);
@@ -1689,7 +1859,7 @@
#if OPENTHREAD_POSIX_VIRTUAL_TIME
void ot::PosixApp::RadioSpinel::Process(const Event &aEvent)
{
- if (mHdlcInterface.GetRxFrameBuffer().HasSavedFrame())
+ if (mRxFrameBuffer.HasSavedFrame())
{
ProcessFrameQueue();
}
@@ -1697,48 +1867,28 @@
// The current event can be other event types
if (aEvent.mEvent == OT_SIM_EVENT_RADIO_SPINEL_WRITE)
{
- mHdlcInterface.ProcessReadData(aEvent.mData, aEvent.mDataLength);
+ mSpinelInterface.ProcessReadData(aEvent.mData, aEvent.mDataLength);
+ }
+
+ if (mRxFrameBuffer.HasSavedFrame())
+ {
ProcessFrameQueue();
}
if (mState == kStateTransmitDone)
{
- mState = kStateReceive;
+ mState = kStateReceive;
+ mTxRadioEndUs = UINT64_MAX;
-#if OPENTHREAD_CONFIG_DIAG_ENABLE
- if (otPlatDiagModeGet())
- {
- otPlatDiagRadioTransmitDone(mInstance, mTransmitFrame, mTxError);
- }
- else
-#endif
- {
- otPlatRadioTxDone(mInstance, mTransmitFrame, (mAckRadioFrame.mLength != 0) ? &mAckRadioFrame : NULL,
- mTxError);
- }
+ TransmitDone(mTransmitFrame, (mAckRadioFrame.mLength != 0) ? &mAckRadioFrame : NULL, mTxError);
}
-
- if (mState == kStateTransmitPending)
+ else if (mState == kStateTransmitting && platformGetTime() >= mTxRadioEndUs)
{
- RadioTransmit();
+ // Frame has been successfully passed to radio, but no `TransmitDone` event received within TX_WAIT_US.
+ DieNowWithMessage("radio tx timeout", OT_EXIT_FAILURE);
}
}
-void ot::PosixApp::RadioSpinel::Update(struct timeval &aTimeout)
-{
- // Prevent sleep event when transmitting
- if (mState == kStateTransmitPending)
- {
- aTimeout.tv_sec = 0;
- aTimeout.tv_usec = 0;
- }
-}
-
-void platformSimRadioSpinelUpdate(struct timeval *aTimeout)
-{
- sRadioSpinel.Update(*aTimeout);
-}
-
void platformSimRadioSpinelProcess(otInstance *aInstance, const struct Event *aEvent)
{
sRadioSpinel.Process(*aEvent);
@@ -1823,3 +1973,9 @@
OT_UNUSED_VARIABLE(aInstance);
return sRadioSpinel.GetRadioChannelMask(true);
}
+
+otRadioState otPlatRadioGetState(otInstance *aInstance)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ return sRadioSpinel.GetState();
+}
diff --git a/src/posix/platform/radio_spinel.hpp b/src/posix/platform/radio_spinel.hpp
index 1a2917b..76761ae 100644
--- a/src/posix/platform/radio_spinel.hpp
+++ b/src/posix/platform/radio_spinel.hpp
@@ -36,14 +36,22 @@
#include <openthread/platform/radio.h>
+#if OPENTHREAD_POSIX_RCP_UART_ENABLE
#include "hdlc_interface.hpp"
+#endif
+
+#if OPENTHREAD_POSIX_RCP_SPI_ENABLE
+#include "spi_interface.hpp"
+#endif
+
+#include "spinel_interface.hpp"
#include "ncp/ncp_config.h"
#include "ncp/spinel.h"
namespace ot {
namespace PosixApp {
-class RadioSpinel : public HdlcInterface::Callbacks
+class RadioSpinel : public SpinelInterface::Callbacks
{
public:
/**
@@ -55,12 +63,10 @@
/**
* Initialize this radio transceiver.
*
- * @param[in] aRadioFile The path to either a uart device or an executable.
- * @param[in] aRadioConfig Parameters given to the device or executable.
- * @param[in] aReset Whether to reset RCP when initializing.
+ * @param[in] aPlatformConfig Platform configuration structure.
*
*/
- void Init(const char *aRadioFile, const char *aRadioConfig, bool aReset);
+ void Init(const otPlatformConfig &aPlatformConfig);
/**
* Deinitialize this radio transceiver.
@@ -163,6 +169,30 @@
otError SetTransmitPower(int8_t aPower);
/**
+ * This method gets the radio's CCA ED threshold in dBm.
+ *
+ * @param[out] aThreshold The CCA ED threshold in dBm.
+ *
+ * @retval OT_ERROR_NONE Succeeded.
+ * @retval OT_ERROR_BUSY Failed due to another operation is on going.
+ * @retval OT_ERROR_RESPONSE_TIMEOUT Failed due to no response received from the transceiver.
+ *
+ */
+ otError GetCcaEnergyDetectThreshold(int8_t &aThreshold);
+
+ /**
+ * This method sets the radio's CCA ED threshold in dBm.
+ *
+ * @param[in] aThreshold The CCA ED threshold in dBm.
+ *
+ * @retval OT_ERROR_NONE Succeeded.
+ * @retval OT_ERROR_BUSY Failed due to another operation is on going.
+ * @retval OT_ERROR_RESPONSE_TIMEOUT Failed due to no response received from the transceiver.
+ *
+ */
+ otError SetCcaEnergyDetectThreshold(int8_t aThreshold);
+
+ /**
* This method returns the radio sw version string.
*
* @returns A pointer to the radio version string.
@@ -197,7 +227,37 @@
*/
int8_t GetReceiveSensitivity(void) const { return mRxSensitivity; }
-#if OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_METRICS_ENABLE
+ /**
+ * This method gets current state of the radio.
+ *
+ * @return Current state of the radio.
+ *
+ */
+ otRadioState GetState(void) const;
+
+#if OPENTHREAD_CONFIG_PLATFORM_RADIO_COEX_ENABLE
+ /**
+ * Enable the radio coex.
+ *
+ * @param[in] aInstance The OpenThread instance structure.
+ * @param[in] aEnabled TRUE to enable the radio coex, FALSE otherwise.
+ *
+ * @retval OT_ERROR_NONE Successfully enabled.
+ * @retval OT_ERROR_FAILED The radio coex could not be enabled.
+ *
+ */
+ otError SetCoexEnabled(bool aEnabled);
+
+ /**
+ * Check whether radio coex is enabled or not.
+ *
+ * @param[in] aInstance The OpenThread instance structure.
+ *
+ * @returns TRUE if the radio coex is enabled, FALSE otherwise.
+ *
+ */
+ bool IsCoexEnabled(void);
+
/**
* This method retrieves the radio coexistence metrics.
*
@@ -467,16 +527,17 @@
uint32_t GetRadioChannelMask(bool aPreferred);
/**
- * This method processes a received Spinel frame.
+ * This method processes a received Spinel frame.
*
- * @param[in] aFrameBuffer The frame buffer constaining the newly received frame.
+ * The newly received frame is available in `RxFrameBuffer` from `SpinelInterface::GetRxFrameBuffer()`.
+ *
*/
- void HandleSpinelFrame(HdlcInterface::RxFrameBuffer &aFrameBuffer);
+ void HandleReceivedFrame(void);
private:
enum
{
- kMaxSpinelFrame = HdlcInterface::kMaxFrameSize,
+ kMaxSpinelFrame = SpinelInterface::kMaxFrameSize,
kMaxWaitTime = 2000, ///< Max time to wait for response in milliseconds.
kVersionStringSize = 128, ///< Max size of version string.
kCapsBufferSize = 100, ///< Max buffer size used to store `SPINEL_PROP_CAPS` value.
@@ -485,16 +546,17 @@
enum State
{
- kStateDisabled, ///< Radio is disabled.
- kStateSleep, ///< Radio is sleep.
- kStateReceive, ///< Radio is in receive mode.
- kStateTransmitPending, ///< Frame transmission requested, waiting to pass frame to radio.
- kStateTransmitting, ///< Frame passed to radio for transmission, waiting for done event from radio.
- kStateTransmitDone, ///< Radio indicated frame transmission is done.
+ kStateDisabled, ///< Radio is disabled.
+ kStateSleep, ///< Radio is sleep.
+ kStateReceive, ///< Radio is in receive mode.
+ kStateTransmitting, ///< Frame passed to radio for transmission, waiting for done event from radio.
+ kStateTransmitDone, ///< Radio indicated frame transmission is done.
};
+ typedef otError (RadioSpinel::*ResponseHandler)(const uint8_t *aBuffer, uint16_t aLength);
+
otError CheckSpinelVersion(void);
- otError CheckCapabilities(void);
+ otError CheckCapabilities(bool &aIsRcp);
otError CheckRadioCapabilities(void);
void ProcessFrameQueue(void);
@@ -567,6 +629,7 @@
const char * pack_format,
va_list args);
otError ParseRadioFrame(otRadioFrame &aFrame, const uint8_t *aBuffer, uint16_t aLength);
+ otError ThreadDatasetHandler(const uint8_t *aBuffer, uint16_t aLength);
/**
* This method returns if the property changed event is safe to be handled now.
@@ -581,11 +644,10 @@
*/
bool IsSafeToHandleNow(spinel_prop_key_t aKey) const
{
- return !((mHdlcInterface.IsDecoding() || mWaitingKey != SPINEL_PROP_LAST_STATUS) &&
- (aKey == SPINEL_PROP_STREAM_RAW || aKey == SPINEL_PROP_MAC_ENERGY_SCAN_RESULT));
+ return !(aKey == SPINEL_PROP_STREAM_RAW || aKey == SPINEL_PROP_MAC_ENERGY_SCAN_RESULT);
}
- void HandleNotification(HdlcInterface::RxFrameBuffer &aFrameBuffer);
+ void HandleNotification(SpinelInterface::RxFrameBuffer &aFrameBuffer);
void HandleNotification(const uint8_t *aBuffer, uint16_t aLength);
void HandleValueIs(spinel_prop_key_t aKey, const uint8_t *aBuffer, uint16_t aLength);
@@ -594,11 +656,31 @@
void HandleWaitingResponse(uint32_t aCommand, spinel_prop_key_t aKey, const uint8_t *aBuffer, uint16_t aLength);
void RadioReceive(void);
- void RadioTransmit(void);
+
+ void TransmitDone(otRadioFrame *aFrame, otRadioFrame *aAckFrame, otError aError);
+
+ /**
+ * This method gets dataset from NCP radio and saves it.
+ *
+ * @retval OT_ERROR_NONE Successfully restore dataset.
+ * @retval OT_ERROR_BUSY Failed due to another operation is on going.
+ * @retval OT_ERROR_RESPONSE_TIMEOUT Failed due to no response received from the transceiver.
+ * @retval OT_ERROR_NOT_FOUND Failed due to spinel property not supported in radio.
+ * @retval OT_ERROR_FAILED Failed due to other reasons.
+ */
+ otError RestoreDatasetFromNcp(void);
otInstance *mInstance;
- HdlcInterface mHdlcInterface;
+ SpinelInterface::RxFrameBuffer mRxFrameBuffer;
+
+#if OPENTHREAD_POSIX_RCP_UART_ENABLE
+ HdlcInterface mSpinelInterface;
+#endif
+
+#if OPENTHREAD_POSIX_RCP_SPI_ENABLE
+ SpiInterface mSpinelInterface;
+#endif
uint16_t mCmdTidsInUse; ///< Used transaction ids.
spinel_tid_t mCmdNextTid; ///< Next available transaction id.
diff --git a/src/posix/platform/settings.cpp b/src/posix/platform/settings.cpp
index 87258d4..3263af1 100644
--- a/src/posix/platform/settings.cpp
+++ b/src/posix/platform/settings.cpp
@@ -53,6 +53,8 @@
static int sSettingsFd = -1;
+static otError platformSettingsDelete(otInstance *aInstance, uint16_t aKey, int aIndex, int *aSwapFd);
+
static void getSettingsFileName(char aFileName[kMaxFileNameSize], bool aSwap)
{
const char *offset = getenv("PORT_OFFSET");
@@ -109,8 +111,8 @@
getSettingsFileName(dataFile, false);
VerifyOrDie(0 == close(sSettingsFd), OT_EXIT_ERROR_ERRNO);
- VerifyOrDie(0 == rename(swapFile, dataFile), OT_EXIT_ERROR_ERRNO);
VerifyOrDie(0 == fsync(aFd), OT_EXIT_ERROR_ERRNO);
+ VerifyOrDie(0 == rename(swapFile, dataFile), OT_EXIT_ERROR_ERRNO);
sSettingsFd = aFd;
}
@@ -238,8 +240,27 @@
otError otPlatSettingsSet(otInstance *aInstance, uint16_t aKey, const uint8_t *aValue, uint16_t aValueLength)
{
- otPlatSettingsDelete(aInstance, aKey, -1);
- return otPlatSettingsAdd(aInstance, aKey, aValue, aValueLength);
+ int swapFd = -1;
+
+ switch (platformSettingsDelete(aInstance, aKey, -1, &swapFd))
+ {
+ case OT_ERROR_NONE:
+ case OT_ERROR_NOT_FOUND:
+ break;
+
+ default:
+ assert(false);
+ break;
+ }
+
+ VerifyOrDie(write(swapFd, &aKey, sizeof(aKey)) == sizeof(aKey) &&
+ write(swapFd, &aValueLength, sizeof(aValueLength)) == sizeof(aValueLength) &&
+ write(swapFd, aValue, aValueLength) == aValueLength,
+ OT_EXIT_FAILURE);
+
+ swapPersist(swapFd);
+
+ return OT_ERROR_NONE;
}
otError otPlatSettingsAdd(otInstance *aInstance, uint16_t aKey, const uint8_t *aValue, uint16_t aValueLength)
@@ -267,6 +288,27 @@
otError otPlatSettingsDelete(otInstance *aInstance, uint16_t aKey, int aIndex)
{
+ return platformSettingsDelete(aInstance, aKey, aIndex, NULL);
+}
+
+/**
+ * This function removes a setting either from swap file or persisted file.
+ *
+ * @param[in] aInstance The OpenThread instance structure.
+ * @param[in] aKey The key associated with the requested setting.
+ * @param[in] aIndex The index of the value to be removed. If set to -1, all values for this aKey will be removed.
+ * @param[out] aSwapFd A optional pointer to receive file descriptor of the generated swap file descriptor.
+ *
+ * @note
+ * If @p aSwapFd is null, operate deleting on the setting file.
+ * If @p aSwapFd is not null, operate on the swap file, and aSwapFd will point to the swap file descriptor.
+ *
+ * @retval OT_ERROR_NONE The given key and index was found and removed successfully.
+ * @retval OT_ERROR_NOT_FOUND The given key or index was not found in the setting store.
+ *
+ */
+static otError platformSettingsDelete(otInstance *aInstance, uint16_t aKey, int aIndex, int *aSwapFd)
+{
OT_UNUSED_VARIABLE(aInstance);
otError error = OT_ERROR_NOT_FOUND;
@@ -327,7 +369,11 @@
exit:
VerifyOrDie(error != OT_ERROR_PARSE, OT_EXIT_FAILURE);
- if (error == OT_ERROR_NONE)
+ if (aSwapFd != NULL)
+ {
+ *aSwapFd = swapFd;
+ }
+ else if (error == OT_ERROR_NONE)
{
swapPersist(swapFd);
}
@@ -345,22 +391,20 @@
VerifyOrDie(0 == ftruncate(sSettingsFd, 0), OT_EXIT_ERROR_ERRNO);
}
+#ifndef SELF_TEST
+#define SELF_TEST 0
+#endif
+
#if SELF_TEST
uint64_t gNodeId = 1;
-const char *otExitCodeToString(uint8_t aExitCode)
-{
- OT_UNUSED_VARIABLE(aExitCode);
- return "SELF_TEST";
-}
-
int main()
{
otInstance *instance = NULL;
uint8_t data[60];
- for (size_t i = 0; i < sizeof(data); ++i)
+ for (uint8_t i = 0; i < sizeof(data); ++i)
{
data[i] = i;
}
diff --git a/src/posix/platform/sim.c b/src/posix/platform/sim.c
index f3c8b92..5ff05d9 100644
--- a/src/posix/platform/sim.c
+++ b/src/posix/platform/sim.c
@@ -171,14 +171,13 @@
{
OT_UNUSED_VARIABLE(aWriteFdSet);
OT_UNUSED_VARIABLE(aErrorFdSet);
+ OT_UNUSED_VARIABLE(aTimeout);
FD_SET(sSockFd, aReadFdSet);
if (*aMaxFd < sSockFd)
{
*aMaxFd = sSockFd;
}
-
- platformSimRadioSpinelUpdate(aTimeout);
}
void platformSimProcess(otInstance * aInstance,
diff --git a/src/posix/platform/spi_interface.cpp b/src/posix/platform/spi_interface.cpp
new file mode 100644
index 0000000..eb3c77c
--- /dev/null
+++ b/src/posix/platform/spi_interface.cpp
@@ -0,0 +1,782 @@
+/*
+ * Copyright (c) 2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file includes the implementation for the SPI interface to radio (RCP).
+ */
+
+#include "openthread-core-config.h"
+
+#include "platform-posix.h"
+#include "spi_interface.hpp"
+
+#include <assert.h>
+#include <errno.h>
+#include <fcntl.h>
+#include <getopt.h>
+#include <signal.h>
+#include <stdbool.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <syslog.h>
+#include <unistd.h>
+
+#include <sys/file.h>
+#include <sys/ioctl.h>
+#include <sys/select.h>
+#include <sys/types.h>
+#include <sys/ucontext.h>
+
+#if OPENTHREAD_POSIX_RCP_SPI_ENABLE
+#include <linux/gpio.h>
+#include <linux/ioctl.h>
+#include <linux/spi/spidev.h>
+
+namespace ot {
+namespace PosixApp {
+
+SpiInterface::SpiInterface(SpinelInterface::Callbacks &aCallback, SpinelInterface::RxFrameBuffer &aFrameBuffer)
+ : mCallbacks(aCallback)
+ , mRxFrameBuffer(aFrameBuffer)
+ , mSpiDevFd(-1)
+ , mResetGpioValueFd(-1)
+ , mIntGpioValueFd(-1)
+ , mSlaveResetCount(0)
+ , mSpiFrameCount(0)
+ , mSpiValidFrameCount(0)
+ , mSpiGarbageFrameCount(0)
+ , mSpiDuplexFrameCount(0)
+ , mSpiUnresponsiveFrameCount(0)
+ , mSpiRxFrameCount(0)
+ , mSpiRxFrameByteCount(0)
+ , mSpiTxFrameCount(0)
+ , mSpiTxFrameByteCount(0)
+ , mSpiTxIsReady(false)
+ , mSpiTxRefusedCount(0)
+ , mSpiTxPayloadSize(0)
+ , mDidPrintRateLimitLog(false)
+ , mSpiSlaveDataLen(0)
+{
+}
+
+otError SpiInterface::Init(const otPlatformConfig &aPlatformConfig)
+{
+ VerifyOrDie(aPlatformConfig.mSpiAlignAllowance <= kSpiAlignAllowanceMax, OT_EXIT_FAILURE);
+
+ mSpiCsDelayUs = aPlatformConfig.mSpiCsDelay;
+ mSpiSmallPacketSize = aPlatformConfig.mSpiSmallPacketSize;
+ mSpiAlignAllowance = aPlatformConfig.mSpiAlignAllowance;
+
+ if (aPlatformConfig.mSpiGpioIntDevice != NULL)
+ {
+ // If the interrupt pin is not set, SPI interface will use polling mode.
+ InitIntPin(aPlatformConfig.mSpiGpioIntDevice, aPlatformConfig.mSpiGpioIntLine);
+ otLogNotePlat("SPI interface enters polling mode.");
+ }
+
+ InitResetPin(aPlatformConfig.mSpiGpioResetDevice, aPlatformConfig.mSpiGpioResetLine);
+ InitSpiDev(aPlatformConfig.mRadioFile, aPlatformConfig.mSpiMode, aPlatformConfig.mSpiSpeed);
+
+ // Reset RCP chip.
+ TrigerReset();
+
+ // Waiting for the RCP chip starts up.
+ usleep(static_cast<useconds_t>(aPlatformConfig.mSpiResetDelay) * kUsecPerMsec);
+
+ return OT_ERROR_NONE;
+}
+
+SpiInterface::~SpiInterface(void)
+{
+ Deinit();
+}
+
+void SpiInterface::Deinit(void)
+{
+ if (mSpiDevFd >= 0)
+ {
+ close(mSpiDevFd);
+ mSpiDevFd = -1;
+ }
+
+ if (mResetGpioValueFd >= 0)
+ {
+ close(mResetGpioValueFd);
+ mResetGpioValueFd = -1;
+ }
+
+ if (mIntGpioValueFd >= 0)
+ {
+ close(mIntGpioValueFd);
+ mIntGpioValueFd = -1;
+ }
+}
+
+int SpiInterface::SetupGpioHandle(int aFd, uint8_t aLine, uint32_t aHandleFlags, const char *aLabel)
+{
+ struct gpiohandle_request req;
+ int ret;
+
+ assert(strlen(aLabel) < sizeof(req.consumer_label));
+
+ req.flags = aHandleFlags;
+ req.lines = 1;
+ req.lineoffsets[0] = aLine;
+ req.default_values[0] = 1;
+
+ snprintf(req.consumer_label, sizeof(req.consumer_label), "%s", aLabel);
+
+ VerifyOrDie((ret = ioctl(aFd, GPIO_GET_LINEHANDLE_IOCTL, &req)) != -1, OT_EXIT_ERROR_ERRNO);
+
+ return req.fd;
+}
+
+int SpiInterface::SetupGpioEvent(int aFd,
+ uint8_t aLine,
+ uint32_t aHandleFlags,
+ uint32_t aEventFlags,
+ const char *aLabel)
+{
+ struct gpioevent_request req;
+ int ret;
+
+ assert(strlen(aLabel) < sizeof(req.consumer_label));
+
+ req.lineoffset = aLine;
+ req.handleflags = aHandleFlags;
+ req.eventflags = aEventFlags;
+ snprintf(req.consumer_label, sizeof(req.consumer_label), "%s", aLabel);
+
+ VerifyOrDie((ret = ioctl(aFd, GPIO_GET_LINEEVENT_IOCTL, &req)) != -1, OT_EXIT_ERROR_ERRNO);
+
+ return req.fd;
+}
+
+void SpiInterface::SetGpioValue(int aFd, uint8_t aValue)
+{
+ struct gpiohandle_data data;
+
+ data.values[0] = aValue;
+ VerifyOrDie(ioctl(aFd, GPIOHANDLE_SET_LINE_VALUES_IOCTL, &data) != -1, OT_EXIT_ERROR_ERRNO);
+}
+
+uint8_t SpiInterface::GetGpioValue(int aFd)
+{
+ struct gpiohandle_data data;
+
+ VerifyOrDie(ioctl(aFd, GPIOHANDLE_GET_LINE_VALUES_IOCTL, &data) != -1, OT_EXIT_ERROR_ERRNO);
+ return data.values[0];
+}
+
+void SpiInterface::InitResetPin(const char *aCharDev, uint8_t aLine)
+{
+ char label[] = "SOC_THREAD_RESET";
+ int fd;
+
+ otLogDebgPlat("InitResetPin: charDev=%s, line=%" PRIu8, aCharDev, aLine);
+
+ VerifyOrDie((aCharDev != NULL) && (aLine < GPIOHANDLES_MAX), OT_EXIT_INVALID_ARGUMENTS);
+ VerifyOrDie((fd = open(aCharDev, O_RDWR)) != -1, OT_EXIT_ERROR_ERRNO);
+ mResetGpioValueFd = SetupGpioHandle(fd, aLine, GPIOHANDLE_REQUEST_OUTPUT, label);
+
+ close(fd);
+}
+
+void SpiInterface::InitIntPin(const char *aCharDev, uint8_t aLine)
+{
+ char label[] = "THREAD_SOC_INT";
+ int fd;
+
+ otLogDebgPlat("InitIntPin: charDev=%s, line=%" PRIu8, aCharDev, aLine);
+
+ VerifyOrDie((aCharDev != NULL) && (aLine < GPIOHANDLES_MAX), OT_EXIT_INVALID_ARGUMENTS);
+ VerifyOrDie((fd = open(aCharDev, O_RDWR)) != -1, OT_EXIT_ERROR_ERRNO);
+
+ mIntGpioValueFd = SetupGpioEvent(fd, aLine, GPIOHANDLE_REQUEST_INPUT, GPIOEVENT_REQUEST_FALLING_EDGE, label);
+
+ close(fd);
+}
+
+void SpiInterface::InitSpiDev(const char *aPath, uint8_t aMode, uint32_t aSpeed)
+{
+ const uint8_t wordBits = kSpiBitsPerWord;
+ int fd;
+
+ otLogDebgPlat("InitSpiDev: path=%s, mode=%" PRIu8 ", speed=%" PRIu32, aPath, aMode, aSpeed);
+
+ VerifyOrDie((aPath != NULL) && (aMode <= kSpiModeMax), OT_EXIT_INVALID_ARGUMENTS);
+ VerifyOrDie((fd = open(aPath, O_RDWR | O_CLOEXEC)) != -1, OT_EXIT_ERROR_ERRNO);
+ VerifyOrExit(ioctl(fd, SPI_IOC_WR_MODE, &aMode) != -1, LogError("ioctl(SPI_IOC_WR_MODE)"));
+ VerifyOrExit(ioctl(fd, SPI_IOC_WR_MAX_SPEED_HZ, &aSpeed) != -1, LogError("ioctl(SPI_IOC_WR_MAX_SPEED_HZ)"));
+ VerifyOrExit(ioctl(fd, SPI_IOC_WR_BITS_PER_WORD, &wordBits) != -1, LogError("ioctl(SPI_IOC_WR_BITS_PER_WORD)"));
+ VerifyOrExit(flock(fd, LOCK_EX | LOCK_NB) != -1, LogError("flock"));
+
+ mSpiDevFd = fd;
+ mSpiMode = aMode;
+ mSpiSpeedHz = aSpeed;
+ fd = -1;
+
+exit:
+ if (fd >= 0)
+ {
+ close(fd);
+ }
+}
+
+void SpiInterface::TrigerReset(void)
+{
+ // Set Reset pin to low level.
+ SetGpioValue(mResetGpioValueFd, 0);
+
+ usleep(kResetHoldOnUsec);
+
+ // Set Reset pin to high level.
+ SetGpioValue(mResetGpioValueFd, 1);
+
+ otLogNotePlat("Triggered hardware reset");
+}
+
+uint8_t *SpiInterface::GetRealRxFrameStart(void)
+{
+ uint8_t * ret = mSpiRxFrameBuffer;
+ const uint8_t *end = mSpiRxFrameBuffer + mSpiAlignAllowance;
+
+ for (; ret != end && ret[0] == 0xff; ret++)
+ ;
+
+ return ret;
+}
+
+otError SpiInterface::DoSpiTransfer(uint32_t aLength)
+{
+ int ret;
+ struct spi_ioc_transfer transfer[2];
+
+ memset(&transfer[0], 0, sizeof(transfer));
+
+ // This part is the delay between CÌ…SÌ… being asserted and the SPI clock
+ // starting. This is not supported by all Linux SPI drivers.
+ transfer[0].tx_buf = 0;
+ transfer[0].rx_buf = 0;
+ transfer[0].len = 0;
+ transfer[0].speed_hz = mSpiSpeedHz;
+ transfer[0].delay_usecs = mSpiCsDelayUs;
+ transfer[0].bits_per_word = kSpiBitsPerWord;
+ transfer[0].cs_change = false;
+
+ // This part is the actual SPI transfer.
+ transfer[1].tx_buf = reinterpret_cast<uintptr_t>(mSpiTxFrameBuffer);
+ transfer[1].rx_buf = reinterpret_cast<uintptr_t>(mSpiRxFrameBuffer);
+ transfer[1].len = aLength + kSpiFrameHeaderSize + mSpiAlignAllowance;
+ transfer[1].speed_hz = mSpiSpeedHz;
+ transfer[1].delay_usecs = 0;
+ transfer[1].bits_per_word = kSpiBitsPerWord;
+ transfer[1].cs_change = false;
+
+ if (mSpiCsDelayUs > 0)
+ {
+ // A CÌ…SÌ… delay has been specified. Start transactions with both parts.
+ ret = ioctl(mSpiDevFd, SPI_IOC_MESSAGE(2), &transfer[0]);
+ }
+ else
+ {
+ // No CÌ…SÌ… delay has been specified, so we skip the first part because it causes some SPI drivers to croak.
+ ret = ioctl(mSpiDevFd, SPI_IOC_MESSAGE(1), &transfer[1]);
+ }
+
+ if (ret != -1)
+ {
+ otDumpDebg(OT_LOG_REGION_PLATFORM, "SPI-TX", mSpiTxFrameBuffer, transfer[1].len);
+ otDumpDebg(OT_LOG_REGION_PLATFORM, "SPI-RX", mSpiRxFrameBuffer, transfer[1].len);
+
+ mSpiFrameCount++;
+ }
+
+ return (ret < 0) ? OT_ERROR_FAILED : OT_ERROR_NONE;
+}
+
+otError SpiInterface::PushPullSpi(void)
+{
+ otError error;
+ uint8_t * spiRxFrameBuffer = NULL;
+ uint16_t spiTransferBytes = 0;
+ uint8_t successfulExchanges = 0;
+ uint8_t slaveHeader;
+ uint16_t slaveAcceptLen;
+ Ncp::SpiFrame txFrame(mSpiTxFrameBuffer);
+
+ if (mSpiValidFrameCount == 0)
+ {
+ // Set the reset flag to indicate to our slave that we are coming up from scratch.
+ txFrame.SetHeaderFlagByte(true);
+ }
+ else
+ {
+ txFrame.SetHeaderFlagByte(false);
+ }
+
+ // Zero out our rx_accept and our data_len for now.
+ txFrame.SetHeaderAcceptLen(0);
+ txFrame.SetHeaderDataLen(0);
+
+ // Sanity check.
+ if (mSpiSlaveDataLen > kMaxFrameSize)
+ {
+ mSpiSlaveDataLen = 0;
+ }
+
+ if (mSpiTxIsReady)
+ {
+ // Go ahead and try to immediately send a frame if we have it queued up.
+ txFrame.SetHeaderDataLen(mSpiTxPayloadSize);
+
+ if (mSpiTxPayloadSize > spiTransferBytes)
+ {
+ spiTransferBytes = mSpiTxPayloadSize;
+ }
+ }
+
+ if (mSpiSlaveDataLen != 0)
+ {
+ // In a previous transaction the slave indicated it had something to send us. Make sure our transaction
+ // is large enough to handle it.
+ if (mSpiSlaveDataLen > spiTransferBytes)
+ {
+ spiTransferBytes = mSpiSlaveDataLen;
+ }
+ }
+ else
+ {
+ // Set up a minimum transfer size to allow small frames the slave wants to send us to be handled in a
+ // single transaction.
+ if (spiTransferBytes < mSpiSmallPacketSize)
+ {
+ spiTransferBytes = mSpiSmallPacketSize;
+ }
+ }
+
+ txFrame.SetHeaderAcceptLen(spiTransferBytes);
+
+ // Perform the SPI transaction.
+ error = DoSpiTransfer(spiTransferBytes);
+
+ if (error != OT_ERROR_NONE)
+ {
+ otLogCritPlat("PushPullSpi:DoSpiTransfer: errno=%s", strerror(errno));
+
+ // Print out a helpful error message for a common error.
+ if ((mSpiCsDelayUs != 0) && (errno == EINVAL))
+ {
+ otLogWarnPlat("SPI ioctl failed with EINVAL. Try adding `--spi-cs-delay=0` to command line arguments.");
+ }
+
+ LogStats();
+ DieNow(OT_EXIT_FAILURE);
+ }
+
+ // Account for misalignment (0xFF bytes at the start)
+ spiRxFrameBuffer = GetRealRxFrameStart();
+
+ {
+ Ncp::SpiFrame rxFrame(spiRxFrameBuffer);
+
+ otLogDebgPlat("spi_transfer TX: H:%02X ACCEPT:%" PRIu16 " DATA:%" PRIu16, txFrame.GetHeaderFlagByte(),
+ txFrame.GetHeaderAcceptLen(), txFrame.GetHeaderDataLen());
+ otLogDebgPlat("spi_transfer RX: H:%02X ACCEPT:%" PRIu16 " DATA:%" PRIu16, rxFrame.GetHeaderFlagByte(),
+ rxFrame.GetHeaderAcceptLen(), rxFrame.GetHeaderDataLen());
+
+ slaveHeader = rxFrame.GetHeaderFlagByte();
+ if ((slaveHeader == 0xFF) || (slaveHeader == 0x00))
+ {
+ if ((slaveHeader == spiRxFrameBuffer[1]) && (slaveHeader == spiRxFrameBuffer[2]) &&
+ (slaveHeader == spiRxFrameBuffer[3]) && (slaveHeader == spiRxFrameBuffer[4]))
+ {
+ // Device is off or in a bad state. In some cases may be induced by flow control.
+ if (mSpiSlaveDataLen == 0)
+ {
+ otLogDebgPlat("Slave did not respond to frame. (Header was all 0x%02X)", slaveHeader);
+ }
+ else
+ {
+ otLogWarnPlat("Slave did not respond to frame. (Header was all 0x%02X)", slaveHeader);
+ }
+
+ mSpiUnresponsiveFrameCount++;
+ }
+ else
+ {
+ // Header is full of garbage
+ mSpiGarbageFrameCount++;
+
+ otLogWarnPlat("Garbage in header : %02X %02X %02X %02X %02X", spiRxFrameBuffer[0], spiRxFrameBuffer[1],
+ spiRxFrameBuffer[2], spiRxFrameBuffer[3], spiRxFrameBuffer[4]);
+ otDumpWarn(OT_LOG_REGION_PLATFORM, "SPI-TX", mSpiTxFrameBuffer,
+ spiTransferBytes + kSpiFrameHeaderSize + mSpiAlignAllowance);
+ otDumpWarn(OT_LOG_REGION_PLATFORM, "SPI-RX", mSpiRxFrameBuffer,
+ spiTransferBytes + kSpiFrameHeaderSize + mSpiAlignAllowance);
+ }
+
+ mSpiTxRefusedCount++;
+ ExitNow();
+ }
+
+ slaveAcceptLen = rxFrame.GetHeaderAcceptLen();
+ mSpiSlaveDataLen = rxFrame.GetHeaderDataLen();
+
+ if (!rxFrame.IsValid() || (slaveAcceptLen > kMaxFrameSize) || (mSpiSlaveDataLen > kMaxFrameSize))
+ {
+ mSpiGarbageFrameCount++;
+ mSpiTxRefusedCount++;
+ mSpiSlaveDataLen = 0;
+
+ otLogWarnPlat("Garbage in header : %02X %02X %02X %02X %02X", spiRxFrameBuffer[0], spiRxFrameBuffer[1],
+ spiRxFrameBuffer[2], spiRxFrameBuffer[3], spiRxFrameBuffer[4]);
+ otDumpWarn(OT_LOG_REGION_PLATFORM, "SPI-TX", mSpiTxFrameBuffer,
+ spiTransferBytes + kSpiFrameHeaderSize + mSpiAlignAllowance);
+ otDumpWarn(OT_LOG_REGION_PLATFORM, "SPI-RX", mSpiRxFrameBuffer,
+ spiTransferBytes + kSpiFrameHeaderSize + mSpiAlignAllowance);
+
+ ExitNow();
+ }
+
+ mSpiValidFrameCount++;
+
+ if (rxFrame.IsResetFlagSet())
+ {
+ mSlaveResetCount++;
+
+ otLogNotePlat("Slave did reset (%" PRIu64 " resets so far)", mSlaveResetCount);
+ LogStats();
+ }
+
+ // Handle received packet, if any.
+ if ((mSpiSlaveDataLen != 0) && (mSpiSlaveDataLen <= txFrame.GetHeaderAcceptLen()))
+ {
+ mSpiRxFrameByteCount += mSpiSlaveDataLen;
+ mSpiSlaveDataLen = 0;
+ mSpiRxFrameCount++;
+ successfulExchanges++;
+
+ HandleReceivedFrame(rxFrame);
+ }
+ }
+
+ // Handle transmitted packet, if any.
+ if (mSpiTxIsReady && (mSpiTxPayloadSize == txFrame.GetHeaderDataLen()))
+ {
+ if (txFrame.GetHeaderDataLen() <= slaveAcceptLen)
+ {
+ // Our outbound packet has been successfully transmitted. Clear mSpiTxPayloadSize and mSpiTxIsReady so
+ // that uplayer can pull another packet for us to send.
+ successfulExchanges++;
+
+ mSpiTxFrameCount++;
+ mSpiTxFrameByteCount += mSpiTxPayloadSize;
+
+ mSpiTxIsReady = false;
+ mSpiTxPayloadSize = 0;
+ mSpiTxRefusedCount = 0;
+ }
+ else
+ {
+ // The slave wasn't ready for what we had to send them. Incrementing this counter will turn on rate
+ // limiting so that we don't waste a ton of CPU bombarding them with useless SPI transfers.
+ mSpiTxRefusedCount++;
+ }
+ }
+
+ if (!mSpiTxIsReady)
+ {
+ mSpiTxRefusedCount = 0;
+ }
+
+ if (successfulExchanges == 2)
+ {
+ mSpiDuplexFrameCount++;
+ }
+
+exit:
+ return error;
+}
+
+bool SpiInterface::CheckInterrupt(void)
+{
+ return (mIntGpioValueFd >= 0) ? (GetGpioValue(mIntGpioValueFd) == kGpioIntAssertState) : true;
+}
+
+void SpiInterface::UpdateFdSet(fd_set &aReadFdSet, fd_set &aWriteFdSet, int &aMaxFd, struct timeval &aTimeout)
+{
+ struct timeval timeout = {kSecPerDay, 0};
+ struct timeval pollingTimeout = {0, kSpiPollPeriodUs};
+
+ OT_UNUSED_VARIABLE(aWriteFdSet);
+
+ if (mSpiTxIsReady)
+ {
+ // We have data to send to the slave.
+ timeout.tv_sec = 0;
+ timeout.tv_usec = 0;
+ }
+
+ if (mIntGpioValueFd >= 0)
+ {
+ if (aMaxFd < mIntGpioValueFd)
+ {
+ aMaxFd = mIntGpioValueFd;
+ }
+
+ if (CheckInterrupt())
+ {
+ // Interrupt pin is asserted, set the timeout to be 0.
+ timeout.tv_sec = 0;
+ timeout.tv_usec = 0;
+ otLogDebgPlat("UpdateFdSet(): Interrupt.");
+ }
+ else
+ {
+ // The interrupt pin was not asserted, so we wait for the interrupt pin to be asserted by adding it to the
+ // read set.
+ FD_SET(mIntGpioValueFd, &aReadFdSet);
+ }
+ }
+ else if (timercmp(&pollingTimeout, &timeout, <))
+ {
+ // In this case we don't have an interrupt, so we revert to SPI polling.
+ timeout = pollingTimeout;
+ }
+
+ if (mSpiTxRefusedCount)
+ {
+ struct timeval minTimeout = {0, 0};
+
+ // We are being rate-limited by the slave. This is fairly normal behavior. Based on number of times slave has
+ // refused a transmission, we apply a minimum timeout.
+ if (mSpiTxRefusedCount < kImmediateRetryCount)
+ {
+ minTimeout.tv_usec = kImmediateRetryTimeoutUs;
+ }
+ else if (mSpiTxRefusedCount < kFastRetryCount)
+ {
+ minTimeout.tv_usec = kFastRetryTimeoutUs;
+ }
+ else
+ {
+ minTimeout.tv_usec = kSlowRetryTimeoutUs;
+ }
+
+ if (timercmp(&timeout, &minTimeout, <))
+ {
+ timeout = minTimeout;
+ }
+
+ if (mSpiTxIsReady && !mDidPrintRateLimitLog && (mSpiTxRefusedCount > 1))
+ {
+ // To avoid printing out this message over and over, we only print it out once the refused count is at two
+ // or higher when we actually have something to send the slave. And then, we only print it once.
+ otLogInfoPlat("Slave is rate limiting transactions");
+
+ mDidPrintRateLimitLog = true;
+ }
+
+ if (mSpiTxRefusedCount == kSpiTxRefuseWarnCount)
+ {
+ // Ua-oh. The slave hasn't given us a chance to send it anything for over thirty frames. If this ever
+ // happens, print out a warning to the logs.
+ otLogWarnPlat("Slave seems stuck.");
+ }
+ else if (mSpiTxRefusedCount == kSpiTxRefuseExitCount)
+ {
+ // Double ua-oh. The slave hasn't given us a chance to send it anything for over a hundred frames.
+ // This almost certainly means that the slave has locked up or gotten into an unrecoverable state.
+ DieNowWithMessage("Slave seems REALLY stuck.", OT_EXIT_FAILURE);
+ }
+ }
+ else
+ {
+ mDidPrintRateLimitLog = false;
+ }
+
+ if (timercmp(&timeout, &aTimeout, <))
+ {
+ aTimeout = timeout;
+ }
+}
+
+void SpiInterface::Process(const fd_set &aReadFdSet, const fd_set &aWriteFdSet)
+{
+ OT_UNUSED_VARIABLE(aWriteFdSet);
+
+ if (FD_ISSET(mIntGpioValueFd, &aReadFdSet))
+ {
+ struct gpioevent_data event;
+
+ otLogDebgPlat("Process(): Interrupt.");
+
+ // Read event data to clear interrupt.
+ VerifyOrDie(read(mIntGpioValueFd, &event, sizeof(event)) != -1, OT_EXIT_ERROR_ERRNO);
+ }
+
+ // Service the SPI port if we can receive a packet or we have a packet to be sent.
+ if (mSpiTxIsReady || CheckInterrupt())
+ {
+ // We guard this with the above check because we don't want to overwrite any previously received frames.
+ PushPullSpi();
+ }
+}
+
+otError SpiInterface::WaitForFrame(const struct timeval &aTimeout)
+{
+ otError error = OT_ERROR_NONE;
+ struct timeval timeout = {kSecPerDay, 0};
+ fd_set readFdSet;
+ int ret;
+
+ FD_ZERO(&readFdSet);
+
+ if (mIntGpioValueFd >= 0)
+ {
+ if (CheckInterrupt())
+ {
+ // Interrupt pin is asserted, set the timeout to be 0.
+ timeout.tv_sec = 0;
+ timeout.tv_usec = 0;
+ }
+ else
+ {
+ // The interrupt pin was not asserted, so we wait for the interrupt pin to be asserted by adding it to the
+ // read set.
+ FD_SET(mIntGpioValueFd, &readFdSet);
+ }
+ }
+ else
+ {
+ // In this case we don't have an interrupt, so we revert to SPI polling.
+ timeout.tv_sec = 0;
+ timeout.tv_usec = kSpiPollPeriodUs;
+ }
+
+ if (timercmp(&aTimeout, &timeout, <))
+ {
+ timeout = aTimeout;
+ }
+
+ ret = select(mIntGpioValueFd + 1, &readFdSet, NULL, NULL, &timeout);
+ if (ret > 0)
+ {
+ if (FD_ISSET(mIntGpioValueFd, &readFdSet))
+ {
+ struct gpioevent_data event;
+
+ // Read event data to clear interrupt.
+ VerifyOrDie(read(mIntGpioValueFd, &event, sizeof(event)) != -1, OT_EXIT_FAILURE);
+ }
+
+ // If we can receive a packet.
+ if (CheckInterrupt())
+ {
+ otLogDebgPlat("WaitForFrame(): Interrupt.");
+ PushPullSpi();
+ }
+ }
+ else if (ret == 0)
+ {
+ ExitNow(error = OT_ERROR_RESPONSE_TIMEOUT);
+ }
+ else if (errno != EINTR)
+ {
+ DieNow(OT_EXIT_ERROR_ERRNO);
+ }
+
+exit:
+ return error;
+}
+
+otError SpiInterface::SendFrame(const uint8_t *aFrame, uint16_t aLength)
+{
+ otError error = OT_ERROR_NONE;
+
+ VerifyOrExit(aLength < (kMaxFrameSize - kSpiFrameHeaderSize), error = OT_ERROR_NO_BUFS);
+ VerifyOrExit(!mSpiTxIsReady, error = OT_ERROR_BUSY);
+
+ memcpy(&mSpiTxFrameBuffer[kSpiFrameHeaderSize], aFrame, aLength);
+
+ mSpiTxIsReady = true;
+ mSpiTxPayloadSize = aLength;
+
+ PushPullSpi();
+
+exit:
+ return error;
+}
+
+void SpiInterface::HandleReceivedFrame(Ncp::SpiFrame &aSpiFrame)
+{
+ const uint8_t *spinelFrame = aSpiFrame.GetData();
+
+ for (uint16_t i = 0; i < aSpiFrame.GetHeaderDataLen(); i++)
+ {
+ if (mRxFrameBuffer.WriteByte(spinelFrame[i]) != OT_ERROR_NONE)
+ {
+ mRxFrameBuffer.DiscardFrame();
+ otLogNotePlat("No enough memory buffers, drop packet");
+ ExitNow();
+ }
+ }
+
+ mCallbacks.HandleReceivedFrame();
+
+exit:
+ return;
+}
+
+void SpiInterface::LogError(const char *aString)
+{
+ OT_UNUSED_VARIABLE(aString);
+ otLogWarnPlat("%s: %s", aString, strerror(errno));
+}
+
+void SpiInterface::LogStats(void)
+{
+ otLogInfoPlat("INFO: mSlaveResetCount=%" PRIu64, mSlaveResetCount);
+ otLogInfoPlat("INFO: mSpiFrameCount=%" PRIu64, mSpiFrameCount);
+ otLogInfoPlat("INFO: mSpiValidFrameCount=%" PRIu64, mSpiValidFrameCount);
+ otLogInfoPlat("INFO: mSpiDuplexFrameCount=%" PRIu64, mSpiDuplexFrameCount);
+ otLogInfoPlat("INFO: mSpiUnresponsiveFrameCount=%" PRIu64, mSpiUnresponsiveFrameCount);
+ otLogInfoPlat("INFO: mSpiGarbageFrameCount=%" PRIu64, mSpiGarbageFrameCount);
+ otLogInfoPlat("INFO: mSpiRxFrameCount=%" PRIu64, mSpiRxFrameCount);
+ otLogInfoPlat("INFO: mSpiRxFrameByteCount=%" PRIu64, mSpiRxFrameByteCount);
+ otLogInfoPlat("INFO: mSpiTxFrameCount=%" PRIu64, mSpiTxFrameCount);
+ otLogInfoPlat("INFO: mSpiTxFrameByteCount=%" PRIu64, mSpiTxFrameByteCount);
+}
+} // namespace PosixApp
+} // namespace ot
+
+#endif // OPENTHREAD_POSIX_RCP_SPI_ENABLE
diff --git a/src/posix/platform/spi_interface.hpp b/src/posix/platform/spi_interface.hpp
new file mode 100644
index 0000000..3338d76
--- /dev/null
+++ b/src/posix/platform/spi_interface.hpp
@@ -0,0 +1,228 @@
+/*
+ * Copyright (c) 2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file includes definitions for the SPI interface to radio (RCP).
+ */
+
+#ifndef POSIX_APP_SPI_INTERFACE_HPP_
+#define POSIX_APP_SPI_INTERFACE_HPP_
+
+#include "spinel_interface.hpp"
+#include "ncp/hdlc.hpp"
+
+#include <openthread-system.h>
+
+#if OPENTHREAD_POSIX_RCP_SPI_ENABLE
+
+#include "ncp/ncp_spi.hpp"
+
+namespace ot {
+namespace PosixApp {
+
+/**
+ * This class defines an SPI interface to the Radio Co-processor (RCP).
+ *
+ */
+class SpiInterface
+{
+public:
+ /**
+ * This constructor initializes the object.
+ *
+ * @param[in] aCallback A reference to a `Callback` object.
+ * @param[in] aFrameBuffer A reference to a `RxFrameBuffer` object.
+ *
+ */
+ SpiInterface(SpinelInterface::Callbacks &aCallback, SpinelInterface::RxFrameBuffer &aFrameBuffer);
+
+ /**
+ * This destructor deinitializes the object.
+ *
+ */
+ ~SpiInterface(void);
+
+ /**
+ * This method initializes the interface to the Radio Co-processor (RCP).
+ *
+ * @note This method should be called before reading and sending spinel frames to the interface.
+ *
+ * @param[in] aPlatformConfig Platform configuration structure.
+ *
+ * @retval OT_ERROR_NONE The interface is initialized successfully.
+ * @retval OT_ERROR_ALREADY The interface is already initialized.
+ * @retval OT_ERROR_INVALID_ARGS The UART device or executable cannot be found or failed to open/run.
+ *
+ */
+ otError Init(const otPlatformConfig &aPlatformConfig);
+
+ /**
+ * This method deinitializes the interface to the RCP.
+ *
+ */
+ void Deinit(void);
+
+ /**
+ * This method encodes and sends a spinel frame to Radio Co-processor (RCP) over the socket.
+ *
+ * @param[in] aFrame A pointer to buffer containing the spinel frame to send.
+ * @param[in] aLength The length (number of bytes) in the frame.
+ *
+ * @retval OT_ERROR_NONE Successfully encoded and sent the spinel frame.
+ * @retval OT_ERROR_BUSY Failed due to another operation is on going.
+ * @retval OT_ERROR_NO_BUFS Insufficient buffer space available to encode the frame.
+ * @retval OT_ERROR_FAILED Failed to call the SPI driver to send the frame.
+ *
+ */
+ otError SendFrame(const uint8_t *aFrame, uint16_t aLength);
+
+ /**
+ * This method waits for receiving part or all of spinel frame within specified interval.
+ *
+ * @param[in] aTimeout A reference to the timeout.
+ *
+ * @retval OT_ERROR_NONE Part or all of spinel frame is received.
+ * @retval OT_ERROR_RESPONSE_TIMEOUT No spinel frame is received within @p aTimeout.
+ *
+ */
+ otError WaitForFrame(const struct timeval &aTimeout);
+
+ /**
+ * This method updates the file descriptor sets with file descriptors used by the radio driver.
+ *
+ * @param[inout] aReadFdSet A reference to the read file descriptors.
+ * @param[inout] aWriteFdSet A reference to the write file descriptors.
+ * @param[inout] aMaxFd A reference to the max file descriptor.
+ * @param[inout] aTimeout A reference to the timeout.
+ *
+ */
+ void UpdateFdSet(fd_set &aReadFdSet, fd_set &aWriteFdSet, int &aMaxFd, struct timeval &aTimeout);
+
+ /**
+ * This method performs radio driver processing.
+ *
+ * @param[in] aReadFdSet A reference to the read file descriptors.
+ * @param[in] aWriteFdSet A reference to the write file descriptors.
+ *
+ */
+ void Process(const fd_set &aReadFdSet, const fd_set &aWriteFdSet);
+
+private:
+ int SetupGpioHandle(int aFd, uint8_t aLine, uint32_t aHandleFlags, const char *aLabel);
+ int SetupGpioEvent(int aFd, uint8_t aLine, uint32_t aHandleFlags, uint32_t aEventFlags, const char *aLabel);
+ void SetGpioValue(int aFd, uint8_t aValue);
+ uint8_t GetGpioValue(int aFd);
+
+ void InitResetPin(const char *aCharDev, uint8_t aLine);
+ void InitIntPin(const char *aCharDev, uint8_t aLine);
+ void InitSpiDev(const char *aPath, uint8_t aMode, uint32_t aSpeed);
+ void TrigerReset(void);
+
+ uint8_t *GetRealRxFrameStart(void);
+ otError DoSpiTransfer(uint32_t aLength);
+ otError PushPullSpi(void);
+
+ bool CheckInterrupt(void);
+ void HandleReceivedFrame(Ncp::SpiFrame &aSpiFrame);
+ void LogStats(void);
+ void LogError(const char * aString);
+ void LogBuffer(const char *aDesc, const uint8_t *aBuffer, uint16_t aLength, bool aForce);
+
+ enum
+ {
+ kSpiModeMax = 3,
+ kSpiAlignAllowanceMax = 16,
+ kSpiFrameHeaderSize = 5,
+ kSpiBitsPerWord = 8,
+ kSpiTxRefuseWarnCount = 30,
+ kSpiTxRefuseExitCount = 100,
+ kImmediateRetryCount = 5,
+ kFastRetryCount = 15,
+ kDebugBytesPerLine = 16,
+ kGpioIntAssertState = 0,
+ kGpioResetAssertState = 0,
+ };
+
+ enum
+ {
+ kMsecPerSec = 1000,
+ kUsecPerMsec = 1000,
+ kSpiPollPeriodUs = kMsecPerSec * kUsecPerMsec / 30,
+ kSecPerDay = 60 * 60 * 24,
+ kResetHoldOnUsec = 10 * kUsecPerMsec,
+ kImmediateRetryTimeoutUs = 1 * kUsecPerMsec,
+ kFastRetryTimeoutUs = 10 * kUsecPerMsec,
+ kSlowRetryTimeoutUs = 33 * kUsecPerMsec,
+ };
+
+ enum
+ {
+ kMaxFrameSize = SpinelInterface::kMaxFrameSize,
+ };
+
+ SpinelInterface::Callbacks & mCallbacks;
+ SpinelInterface::RxFrameBuffer &mRxFrameBuffer;
+
+ int mSpiDevFd;
+ int mResetGpioValueFd;
+ int mIntGpioValueFd;
+
+ uint8_t mSpiMode;
+ uint8_t mSpiAlignAllowance;
+ uint16_t mSpiCsDelayUs;
+ uint16_t mSpiSmallPacketSize;
+ uint32_t mSpiSpeedHz;
+
+ uint64_t mSlaveResetCount;
+ uint64_t mSpiFrameCount;
+ uint64_t mSpiValidFrameCount;
+ uint64_t mSpiGarbageFrameCount;
+ uint64_t mSpiDuplexFrameCount;
+ uint64_t mSpiUnresponsiveFrameCount;
+ uint64_t mSpiRxFrameCount;
+ uint64_t mSpiRxFrameByteCount;
+ uint64_t mSpiTxFrameCount;
+ uint64_t mSpiTxFrameByteCount;
+
+ uint8_t mSpiRxFrameBuffer[kMaxFrameSize + kSpiAlignAllowanceMax];
+
+ bool mSpiTxIsReady;
+ uint16_t mSpiTxRefusedCount;
+ uint16_t mSpiTxPayloadSize;
+ uint8_t mSpiTxFrameBuffer[kMaxFrameSize + kSpiAlignAllowanceMax];
+
+ bool mDidPrintRateLimitLog;
+ uint16_t mSpiSlaveDataLen;
+};
+
+} // namespace PosixApp
+} // namespace ot
+
+#endif // OPENTHREAD_POSIX_RCP_SPI_ENABLE
+#endif // POSIX_APP_SPI_INTERFACE_HPP_
diff --git a/src/posix/platform/spinel_interface.hpp b/src/posix/platform/spinel_interface.hpp
new file mode 100644
index 0000000..0e016c7
--- /dev/null
+++ b/src/posix/platform/spinel_interface.hpp
@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * This file includes definitions for the spinel interface to Radio Co-processor (RCP)
+ *
+ */
+
+#ifndef POSIX_APP_SPINEL_INTERFACE_HPP_
+#define POSIX_APP_SPINEL_INTERFACE_HPP_
+
+#include "ncp/hdlc.hpp"
+
+namespace ot {
+namespace PosixApp {
+
+class SpinelInterface
+{
+public:
+ enum
+ {
+ kMaxFrameSize = 2048, ///< Maximum frame size (number of bytes).
+ };
+
+ /**
+ * This type defines a receive frame buffer to store received spinel frame(s).
+ *
+ * @note The receive frame buffer is an `Hdlc::MultiFrameBuffer` and therefore it is capable of storing multiple
+ * frames in a FIFO queue manner.
+ *
+ */
+ typedef Hdlc::MultiFrameBuffer<kMaxFrameSize> RxFrameBuffer;
+
+ /**
+ * This class defines the callbacks provided by `SpinelInterface` to its owner/user.
+ *
+ */
+ class Callbacks
+ {
+ public:
+ /**
+ * This callback is invoked to notify owner/user of `SpinelInterface` of a received spinel frame.
+ *
+ * The newly received frame is available in `RxFrameBuffer` from `SpinelInterface::GetRxFrameBuffer()`.
+ * User can read and process the frame. The callback is expected to either discard the new frame using
+ * `RxFrameBuffer::DiscardFrame()` or save the frame using `RxFrameBuffer::SaveFrame()` to be read and
+ * processed later.
+ *
+ */
+ void HandleReceivedFrame(void);
+ };
+};
+} // namespace PosixApp
+} // namespace ot
+
+#endif // POSIX_APP_SPINEL_INTERFACE_HPP_
diff --git a/src/posix/platform/system.c b/src/posix/platform/system.c
index 36aa920..8fbc117 100644
--- a/src/posix/platform/system.c
+++ b/src/posix/platform/system.c
@@ -52,7 +52,7 @@
platformSimInit();
#endif
platformAlarmInit(aPlatformConfig->mSpeedUpFactor);
- platformRadioInit(aPlatformConfig->mRadioFile, aPlatformConfig->mRadioConfig, aPlatformConfig->mResetRadio);
+ platformRadioInit(aPlatformConfig);
platformRandomInit();
instance = otInstanceInitSingle();
diff --git a/src/posix/platform/uart.c b/src/posix/platform/uart.c
index 4534cee..b8ffa9a 100644
--- a/src/posix/platform/uart.c
+++ b/src/posix/platform/uart.c
@@ -67,6 +67,9 @@
struct sockaddr_un sockname;
int ret;
+ // This allows implementing pseudo reset.
+ otEXPECT(sUartSocket == -1);
+
sUartSocket = SocketWithCloseExec(AF_UNIX, SOCK_STREAM, 0);
if (sUartSocket == -1)
@@ -109,6 +112,8 @@
{
DieNowWithMessage("listen", OT_EXIT_ERROR_ERRNO);
}
+
+exit:
#endif // OPENTHREAD_ENABLE_POSIX_APP_DAEMON
sEnabled = true;
@@ -135,6 +140,7 @@
if (sUartLock != -1)
{
+ (void)flock(sUartLock, LOCK_UN);
close(sUartLock);
sUartLock = -1;
}
diff --git a/tests/fuzz/fuzzer_platform.c b/tests/fuzz/fuzzer_platform.c
index 69cfdd9..3dad915 100644
--- a/tests/fuzz/fuzzer_platform.c
+++ b/tests/fuzz/fuzzer_platform.c
@@ -344,6 +344,20 @@
return OT_ERROR_NOT_IMPLEMENTED;
}
+otError otPlatRadioGetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t *aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ OT_UNUSED_VARIABLE(aThreshold);
+ return OT_ERROR_NOT_IMPLEMENTED;
+}
+
+otError otPlatRadioSetCcaEnergyDetectThreshold(otInstance *aInstance, int8_t aThreshold)
+{
+ OT_UNUSED_VARIABLE(aInstance);
+ OT_UNUSED_VARIABLE(aThreshold);
+ return OT_ERROR_NOT_IMPLEMENTED;
+}
+
int8_t otPlatRadioGetReceiveSensitivity(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
diff --git a/tests/scripts/thread-cert/Cert_5_1_01_RouterAttach.py b/tests/scripts/thread-cert/Cert_5_1_01_RouterAttach.py
index 9cd6eb4..48d0aea 100755
--- a/tests/scripts/thread-cert/Cert_5_1_01_RouterAttach.py
+++ b/tests/scripts/thread-cert/Cert_5_1_01_RouterAttach.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_1_02_ChildAddressTimeout.py b/tests/scripts/thread-cert/Cert_5_1_02_ChildAddressTimeout.py
index eeccbf2..27adb96 100755
--- a/tests/scripts/thread-cert/Cert_5_1_02_ChildAddressTimeout.py
+++ b/tests/scripts/thread-cert/Cert_5_1_02_ChildAddressTimeout.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_1_03_RouterAddressReallocation.py b/tests/scripts/thread-cert/Cert_5_1_03_RouterAddressReallocation.py
index c7dbd49..8dbb5b5 100755
--- a/tests/scripts/thread-cert/Cert_5_1_03_RouterAddressReallocation.py
+++ b/tests/scripts/thread-cert/Cert_5_1_03_RouterAddressReallocation.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_1_04_RouterAddressReallocation.py b/tests/scripts/thread-cert/Cert_5_1_04_RouterAddressReallocation.py
index 4cdeadd..a94b3f2 100755
--- a/tests/scripts/thread-cert/Cert_5_1_04_RouterAddressReallocation.py
+++ b/tests/scripts/thread-cert/Cert_5_1_04_RouterAddressReallocation.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_1_05_RouterAddressTimeout.py b/tests/scripts/thread-cert/Cert_5_1_05_RouterAddressTimeout.py
index e3aab66..8d85b4b 100755
--- a/tests/scripts/thread-cert/Cert_5_1_05_RouterAddressTimeout.py
+++ b/tests/scripts/thread-cert/Cert_5_1_05_RouterAddressTimeout.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_1_06_RemoveRouterId.py b/tests/scripts/thread-cert/Cert_5_1_06_RemoveRouterId.py
index 030fc4c..afd7b3d 100755
--- a/tests/scripts/thread-cert/Cert_5_1_06_RemoveRouterId.py
+++ b/tests/scripts/thread-cert/Cert_5_1_06_RemoveRouterId.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_1_07_MaxChildCount.py b/tests/scripts/thread-cert/Cert_5_1_07_MaxChildCount.py
index c625834..20c8e86 100755
--- a/tests/scripts/thread-cert/Cert_5_1_07_MaxChildCount.py
+++ b/tests/scripts/thread-cert/Cert_5_1_07_MaxChildCount.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_1_08_RouterAttachConnectivity.py b/tests/scripts/thread-cert/Cert_5_1_08_RouterAttachConnectivity.py
index 908b7f7..08d8627 100755
--- a/tests/scripts/thread-cert/Cert_5_1_08_RouterAttachConnectivity.py
+++ b/tests/scripts/thread-cert/Cert_5_1_08_RouterAttachConnectivity.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_1_09_REEDAttachConnectivity.py b/tests/scripts/thread-cert/Cert_5_1_09_REEDAttachConnectivity.py
index 7e01893..5c1398c 100755
--- a/tests/scripts/thread-cert/Cert_5_1_09_REEDAttachConnectivity.py
+++ b/tests/scripts/thread-cert/Cert_5_1_09_REEDAttachConnectivity.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_1_10_RouterAttachLinkQuality.py b/tests/scripts/thread-cert/Cert_5_1_10_RouterAttachLinkQuality.py
index 743296f..5f09e21 100755
--- a/tests/scripts/thread-cert/Cert_5_1_10_RouterAttachLinkQuality.py
+++ b/tests/scripts/thread-cert/Cert_5_1_10_RouterAttachLinkQuality.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_1_11_REEDAttachLinkQuality.py b/tests/scripts/thread-cert/Cert_5_1_11_REEDAttachLinkQuality.py
index e4dd913..be6195d 100755
--- a/tests/scripts/thread-cert/Cert_5_1_11_REEDAttachLinkQuality.py
+++ b/tests/scripts/thread-cert/Cert_5_1_11_REEDAttachLinkQuality.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_1_12_NewRouterNeighborSync.py b/tests/scripts/thread-cert/Cert_5_1_12_NewRouterNeighborSync.py
index c7ea1c8..738ebd2 100755
--- a/tests/scripts/thread-cert/Cert_5_1_12_NewRouterNeighborSync.py
+++ b/tests/scripts/thread-cert/Cert_5_1_12_NewRouterNeighborSync.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_1_13_RouterReset.py b/tests/scripts/thread-cert/Cert_5_1_13_RouterReset.py
index 6c2952d..1c5a7a7 100755
--- a/tests/scripts/thread-cert/Cert_5_1_13_RouterReset.py
+++ b/tests/scripts/thread-cert/Cert_5_1_13_RouterReset.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_2_01_REEDAttach.py b/tests/scripts/thread-cert/Cert_5_2_01_REEDAttach.py
index 0571c22..3461095 100755
--- a/tests/scripts/thread-cert/Cert_5_2_01_REEDAttach.py
+++ b/tests/scripts/thread-cert/Cert_5_2_01_REEDAttach.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_2_03_LeaderReject2Hops.py b/tests/scripts/thread-cert/Cert_5_2_03_LeaderReject2Hops.py
index a28f74a..df084f8 100755
--- a/tests/scripts/thread-cert/Cert_5_2_03_LeaderReject2Hops.py
+++ b/tests/scripts/thread-cert/Cert_5_2_03_LeaderReject2Hops.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_2_04_REEDUpgrade.py b/tests/scripts/thread-cert/Cert_5_2_04_REEDUpgrade.py
index ce54fd4..062e977 100755
--- a/tests/scripts/thread-cert/Cert_5_2_04_REEDUpgrade.py
+++ b/tests/scripts/thread-cert/Cert_5_2_04_REEDUpgrade.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_2_05_AddressQuery.py b/tests/scripts/thread-cert/Cert_5_2_05_AddressQuery.py
index 9efb674..e4a9e3b 100755
--- a/tests/scripts/thread-cert/Cert_5_2_05_AddressQuery.py
+++ b/tests/scripts/thread-cert/Cert_5_2_05_AddressQuery.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_2_06_RouterDowngrade.py b/tests/scripts/thread-cert/Cert_5_2_06_RouterDowngrade.py
index 91c6d30..963ad7f 100755
--- a/tests/scripts/thread-cert/Cert_5_2_06_RouterDowngrade.py
+++ b/tests/scripts/thread-cert/Cert_5_2_06_RouterDowngrade.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_2_07_REEDSynchronization.py b/tests/scripts/thread-cert/Cert_5_2_07_REEDSynchronization.py
index 49315f6..d642e96 100755
--- a/tests/scripts/thread-cert/Cert_5_2_07_REEDSynchronization.py
+++ b/tests/scripts/thread-cert/Cert_5_2_07_REEDSynchronization.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_3_01_LinkLocal.py b/tests/scripts/thread-cert/Cert_5_3_01_LinkLocal.py
index 90a9042..e7f9bd7 100755
--- a/tests/scripts/thread-cert/Cert_5_3_01_LinkLocal.py
+++ b/tests/scripts/thread-cert/Cert_5_3_01_LinkLocal.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_3_02_RealmLocal.py b/tests/scripts/thread-cert/Cert_5_3_02_RealmLocal.py
index 97452b6..f5fd3a1 100755
--- a/tests/scripts/thread-cert/Cert_5_3_02_RealmLocal.py
+++ b/tests/scripts/thread-cert/Cert_5_3_02_RealmLocal.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_3_03_AddressQuery.py b/tests/scripts/thread-cert/Cert_5_3_03_AddressQuery.py
index 7d438c3..ea6e0f4 100755
--- a/tests/scripts/thread-cert/Cert_5_3_03_AddressQuery.py
+++ b/tests/scripts/thread-cert/Cert_5_3_03_AddressQuery.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_3_04_AddressMapCache.py b/tests/scripts/thread-cert/Cert_5_3_04_AddressMapCache.py
index 178bf76..722ef64 100755
--- a/tests/scripts/thread-cert/Cert_5_3_04_AddressMapCache.py
+++ b/tests/scripts/thread-cert/Cert_5_3_04_AddressMapCache.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_3_05_RoutingLinkQuality.py b/tests/scripts/thread-cert/Cert_5_3_05_RoutingLinkQuality.py
index 14a76ae..af6a1dc 100755
--- a/tests/scripts/thread-cert/Cert_5_3_05_RoutingLinkQuality.py
+++ b/tests/scripts/thread-cert/Cert_5_3_05_RoutingLinkQuality.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_3_06_RouterIdMask.py b/tests/scripts/thread-cert/Cert_5_3_06_RouterIdMask.py
index c62c6be..d20379b 100755
--- a/tests/scripts/thread-cert/Cert_5_3_06_RouterIdMask.py
+++ b/tests/scripts/thread-cert/Cert_5_3_06_RouterIdMask.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_3_06b_RouterIdMask.py b/tests/scripts/thread-cert/Cert_5_3_06b_RouterIdMask.py
index 0885082..0403e97 100755
--- a/tests/scripts/thread-cert/Cert_5_3_06b_RouterIdMask.py
+++ b/tests/scripts/thread-cert/Cert_5_3_06b_RouterIdMask.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_3_07_DuplicateAddress.py b/tests/scripts/thread-cert/Cert_5_3_07_DuplicateAddress.py
index 7918e21..3f65a37 100755
--- a/tests/scripts/thread-cert/Cert_5_3_07_DuplicateAddress.py
+++ b/tests/scripts/thread-cert/Cert_5_3_07_DuplicateAddress.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_3_08_ChildAddressSet.py b/tests/scripts/thread-cert/Cert_5_3_08_ChildAddressSet.py
index fa9c256..4e6b7c4 100755
--- a/tests/scripts/thread-cert/Cert_5_3_08_ChildAddressSet.py
+++ b/tests/scripts/thread-cert/Cert_5_3_08_ChildAddressSet.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_3_09_AddressQuery.py b/tests/scripts/thread-cert/Cert_5_3_09_AddressQuery.py
index 496d127..d5b856c 100755
--- a/tests/scripts/thread-cert/Cert_5_3_09_AddressQuery.py
+++ b/tests/scripts/thread-cert/Cert_5_3_09_AddressQuery.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_3_10_AddressQuery.py b/tests/scripts/thread-cert/Cert_5_3_10_AddressQuery.py
index fb576cd..de8fa3a 100755
--- a/tests/scripts/thread-cert/Cert_5_3_10_AddressQuery.py
+++ b/tests/scripts/thread-cert/Cert_5_3_10_AddressQuery.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_3_11_AddressQueryTimeoutIntervals.py b/tests/scripts/thread-cert/Cert_5_3_11_AddressQueryTimeoutIntervals.py
index 5db6639..eb16153 100755
--- a/tests/scripts/thread-cert/Cert_5_3_11_AddressQueryTimeoutIntervals.py
+++ b/tests/scripts/thread-cert/Cert_5_3_11_AddressQueryTimeoutIntervals.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_5_01_LeaderReboot.py b/tests/scripts/thread-cert/Cert_5_5_01_LeaderReboot.py
index d6bf2a5..eddb05d 100755
--- a/tests/scripts/thread-cert/Cert_5_5_01_LeaderReboot.py
+++ b/tests/scripts/thread-cert/Cert_5_5_01_LeaderReboot.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_5_02_LeaderReboot.py b/tests/scripts/thread-cert/Cert_5_5_02_LeaderReboot.py
index 8635629..c911fc5 100755
--- a/tests/scripts/thread-cert/Cert_5_5_02_LeaderReboot.py
+++ b/tests/scripts/thread-cert/Cert_5_5_02_LeaderReboot.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_5_03_SplitMergeChildren.py b/tests/scripts/thread-cert/Cert_5_5_03_SplitMergeChildren.py
index 8582a5f..c5c92f4 100755
--- a/tests/scripts/thread-cert/Cert_5_5_03_SplitMergeChildren.py
+++ b/tests/scripts/thread-cert/Cert_5_5_03_SplitMergeChildren.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_5_04_SplitMergeRouters.py b/tests/scripts/thread-cert/Cert_5_5_04_SplitMergeRouters.py
index e9f081a..a9c8aa3 100755
--- a/tests/scripts/thread-cert/Cert_5_5_04_SplitMergeRouters.py
+++ b/tests/scripts/thread-cert/Cert_5_5_04_SplitMergeRouters.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_5_05_SplitMergeREED.py b/tests/scripts/thread-cert/Cert_5_5_05_SplitMergeREED.py
index 38e5c27..d0930a1 100755
--- a/tests/scripts/thread-cert/Cert_5_5_05_SplitMergeREED.py
+++ b/tests/scripts/thread-cert/Cert_5_5_05_SplitMergeREED.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_5_07_SplitMergeThreeWay.py b/tests/scripts/thread-cert/Cert_5_5_07_SplitMergeThreeWay.py
index 18c2636..08ee6a9 100755
--- a/tests/scripts/thread-cert/Cert_5_5_07_SplitMergeThreeWay.py
+++ b/tests/scripts/thread-cert/Cert_5_5_07_SplitMergeThreeWay.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_5_08_SplitRoutersLostLeader.py b/tests/scripts/thread-cert/Cert_5_5_08_SplitRoutersLostLeader.py
index f5b9296..6da034b 100755
--- a/tests/scripts/thread-cert/Cert_5_5_08_SplitRoutersLostLeader.py
+++ b/tests/scripts/thread-cert/Cert_5_5_08_SplitRoutersLostLeader.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_6_01_NetworkDataRegisterBeforeAttachLeader.py b/tests/scripts/thread-cert/Cert_5_6_01_NetworkDataRegisterBeforeAttachLeader.py
index 9a261d5..5e172e7 100755
--- a/tests/scripts/thread-cert/Cert_5_6_01_NetworkDataRegisterBeforeAttachLeader.py
+++ b/tests/scripts/thread-cert/Cert_5_6_01_NetworkDataRegisterBeforeAttachLeader.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_6_02_NetworkDataRegisterBeforeAttachRouter.py b/tests/scripts/thread-cert/Cert_5_6_02_NetworkDataRegisterBeforeAttachRouter.py
index 27b1856..c4eb66e 100755
--- a/tests/scripts/thread-cert/Cert_5_6_02_NetworkDataRegisterBeforeAttachRouter.py
+++ b/tests/scripts/thread-cert/Cert_5_6_02_NetworkDataRegisterBeforeAttachRouter.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_6_03_NetworkDataRegisterAfterAttachLeader.py b/tests/scripts/thread-cert/Cert_5_6_03_NetworkDataRegisterAfterAttachLeader.py
index e75b182..cbbfe7b 100755
--- a/tests/scripts/thread-cert/Cert_5_6_03_NetworkDataRegisterAfterAttachLeader.py
+++ b/tests/scripts/thread-cert/Cert_5_6_03_NetworkDataRegisterAfterAttachLeader.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_6_04_NetworkDataRegisterAfterAttachRouter.py b/tests/scripts/thread-cert/Cert_5_6_04_NetworkDataRegisterAfterAttachRouter.py
index c6816d4..d7ad91e 100755
--- a/tests/scripts/thread-cert/Cert_5_6_04_NetworkDataRegisterAfterAttachRouter.py
+++ b/tests/scripts/thread-cert/Cert_5_6_04_NetworkDataRegisterAfterAttachRouter.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_6_05_NetworkDataRegisterAfterAttachRouter.py b/tests/scripts/thread-cert/Cert_5_6_05_NetworkDataRegisterAfterAttachRouter.py
index f868a56..18af5ae 100755
--- a/tests/scripts/thread-cert/Cert_5_6_05_NetworkDataRegisterAfterAttachRouter.py
+++ b/tests/scripts/thread-cert/Cert_5_6_05_NetworkDataRegisterAfterAttachRouter.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_6_06_NetworkDataExpiration.py b/tests/scripts/thread-cert/Cert_5_6_06_NetworkDataExpiration.py
index 340d88d..0c4de82 100755
--- a/tests/scripts/thread-cert/Cert_5_6_06_NetworkDataExpiration.py
+++ b/tests/scripts/thread-cert/Cert_5_6_06_NetworkDataExpiration.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_6_07_NetworkDataRequestREED.py b/tests/scripts/thread-cert/Cert_5_6_07_NetworkDataRequestREED.py
index 03c3332..feb89ad 100755
--- a/tests/scripts/thread-cert/Cert_5_6_07_NetworkDataRequestREED.py
+++ b/tests/scripts/thread-cert/Cert_5_6_07_NetworkDataRequestREED.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_6_08_ContextManagement.py b/tests/scripts/thread-cert/Cert_5_6_08_ContextManagement.py
index 94f82ca..ff82c7c 100755
--- a/tests/scripts/thread-cert/Cert_5_6_08_ContextManagement.py
+++ b/tests/scripts/thread-cert/Cert_5_6_08_ContextManagement.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_6_09_NetworkDataForwarding.py b/tests/scripts/thread-cert/Cert_5_6_09_NetworkDataForwarding.py
index c907b7d..bf8b491 100755
--- a/tests/scripts/thread-cert/Cert_5_6_09_NetworkDataForwarding.py
+++ b/tests/scripts/thread-cert/Cert_5_6_09_NetworkDataForwarding.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_8_01_KeySynchronization.py b/tests/scripts/thread-cert/Cert_5_8_01_KeySynchronization.py
index 4eada6a..41adbbc 100755
--- a/tests/scripts/thread-cert/Cert_5_8_01_KeySynchronization.py
+++ b/tests/scripts/thread-cert/Cert_5_8_01_KeySynchronization.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_8_02_KeyIncrement.py b/tests/scripts/thread-cert/Cert_5_8_02_KeyIncrement.py
index 457a000..27a4c52 100755
--- a/tests/scripts/thread-cert/Cert_5_8_02_KeyIncrement.py
+++ b/tests/scripts/thread-cert/Cert_5_8_02_KeyIncrement.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_5_8_03_KeyIncrementRollOver.py b/tests/scripts/thread-cert/Cert_5_8_03_KeyIncrementRollOver.py
index b97fdfd..b70eeb7 100755
--- a/tests/scripts/thread-cert/Cert_5_8_03_KeyIncrementRollOver.py
+++ b/tests/scripts/thread-cert/Cert_5_8_03_KeyIncrementRollOver.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_6_1_01_RouterAttach.py b/tests/scripts/thread-cert/Cert_6_1_01_RouterAttach.py
index b5a85fc..a812277 100755
--- a/tests/scripts/thread-cert/Cert_6_1_01_RouterAttach.py
+++ b/tests/scripts/thread-cert/Cert_6_1_01_RouterAttach.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_6_1_02_REEDAttach_MED.py b/tests/scripts/thread-cert/Cert_6_1_02_REEDAttach_MED.py
index 347a4be..62440f7 100755
--- a/tests/scripts/thread-cert/Cert_6_1_02_REEDAttach_MED.py
+++ b/tests/scripts/thread-cert/Cert_6_1_02_REEDAttach_MED.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_6_1_02_REEDAttach_SED.py b/tests/scripts/thread-cert/Cert_6_1_02_REEDAttach_SED.py
index b3f47e8..41d5882 100755
--- a/tests/scripts/thread-cert/Cert_6_1_02_REEDAttach_SED.py
+++ b/tests/scripts/thread-cert/Cert_6_1_02_REEDAttach_SED.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_6_1_03_RouterAttachConnectivity.py b/tests/scripts/thread-cert/Cert_6_1_03_RouterAttachConnectivity.py
index f0a61eb..eebb4e3 100755
--- a/tests/scripts/thread-cert/Cert_6_1_03_RouterAttachConnectivity.py
+++ b/tests/scripts/thread-cert/Cert_6_1_03_RouterAttachConnectivity.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_6_1_04_REEDAttachConnectivity.py b/tests/scripts/thread-cert/Cert_6_1_04_REEDAttachConnectivity.py
index 2a7a669..c2ee061 100755
--- a/tests/scripts/thread-cert/Cert_6_1_04_REEDAttachConnectivity.py
+++ b/tests/scripts/thread-cert/Cert_6_1_04_REEDAttachConnectivity.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_6_1_05_RouterAttachLinkQuality.py b/tests/scripts/thread-cert/Cert_6_1_05_RouterAttachLinkQuality.py
index b9b812c..7f33118 100755
--- a/tests/scripts/thread-cert/Cert_6_1_05_RouterAttachLinkQuality.py
+++ b/tests/scripts/thread-cert/Cert_6_1_05_RouterAttachLinkQuality.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_6_1_06_REEDAttachLinkQuality_ED.py b/tests/scripts/thread-cert/Cert_6_1_06_REEDAttachLinkQuality_ED.py
index 86e930d..90661e6 100755
--- a/tests/scripts/thread-cert/Cert_6_1_06_REEDAttachLinkQuality_ED.py
+++ b/tests/scripts/thread-cert/Cert_6_1_06_REEDAttachLinkQuality_ED.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_6_1_06_REEDAttachLinkQuality_SED.py b/tests/scripts/thread-cert/Cert_6_1_06_REEDAttachLinkQuality_SED.py
index 21dee68..8ed6533 100755
--- a/tests/scripts/thread-cert/Cert_6_1_06_REEDAttachLinkQuality_SED.py
+++ b/tests/scripts/thread-cert/Cert_6_1_06_REEDAttachLinkQuality_SED.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2019, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_6_1_07_EDSynchronization.py b/tests/scripts/thread-cert/Cert_6_1_07_EDSynchronization.py
index 69ea8b0..6af3b33 100755
--- a/tests/scripts/thread-cert/Cert_6_1_07_EDSynchronization.py
+++ b/tests/scripts/thread-cert/Cert_6_1_07_EDSynchronization.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_6_2_01_NewPartition.py b/tests/scripts/thread-cert/Cert_6_2_01_NewPartition.py
index 631f021..0bfafa6 100755
--- a/tests/scripts/thread-cert/Cert_6_2_01_NewPartition.py
+++ b/tests/scripts/thread-cert/Cert_6_2_01_NewPartition.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_6_2_02_NewPartition.py b/tests/scripts/thread-cert/Cert_6_2_02_NewPartition.py
index c7337d1..d2c7cfc 100755
--- a/tests/scripts/thread-cert/Cert_6_2_02_NewPartition.py
+++ b/tests/scripts/thread-cert/Cert_6_2_02_NewPartition.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_6_3_01_OrphanReattach.py b/tests/scripts/thread-cert/Cert_6_3_01_OrphanReattach.py
index c3a8e66..0e7743f 100755
--- a/tests/scripts/thread-cert/Cert_6_3_01_OrphanReattach.py
+++ b/tests/scripts/thread-cert/Cert_6_3_01_OrphanReattach.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_6_3_02_NetworkDataUpdate.py b/tests/scripts/thread-cert/Cert_6_3_02_NetworkDataUpdate.py
index d51bfa6..02b34ea 100755
--- a/tests/scripts/thread-cert/Cert_6_3_02_NetworkDataUpdate.py
+++ b/tests/scripts/thread-cert/Cert_6_3_02_NetworkDataUpdate.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_6_4_01_LinkLocal.py b/tests/scripts/thread-cert/Cert_6_4_01_LinkLocal.py
index f759d07..1448293 100755
--- a/tests/scripts/thread-cert/Cert_6_4_01_LinkLocal.py
+++ b/tests/scripts/thread-cert/Cert_6_4_01_LinkLocal.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_6_4_02_RealmLocal.py b/tests/scripts/thread-cert/Cert_6_4_02_RealmLocal.py
index 254704a..a8bf7a5 100755
--- a/tests/scripts/thread-cert/Cert_6_4_02_RealmLocal.py
+++ b/tests/scripts/thread-cert/Cert_6_4_02_RealmLocal.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_6_5_01_ChildResetSynchronize.py b/tests/scripts/thread-cert/Cert_6_5_01_ChildResetSynchronize.py
index 01cc544..fbf9d8a 100755
--- a/tests/scripts/thread-cert/Cert_6_5_01_ChildResetSynchronize.py
+++ b/tests/scripts/thread-cert/Cert_6_5_01_ChildResetSynchronize.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_6_5_02_ChildResetReattach.py b/tests/scripts/thread-cert/Cert_6_5_02_ChildResetReattach.py
index 2985fc0..846f6ae 100755
--- a/tests/scripts/thread-cert/Cert_6_5_02_ChildResetReattach.py
+++ b/tests/scripts/thread-cert/Cert_6_5_02_ChildResetReattach.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_6_6_01_KeyIncrement.py b/tests/scripts/thread-cert/Cert_6_6_01_KeyIncrement.py
index 5325b66..77967a0 100755
--- a/tests/scripts/thread-cert/Cert_6_6_01_KeyIncrement.py
+++ b/tests/scripts/thread-cert/Cert_6_6_01_KeyIncrement.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_6_6_02_KeyIncrementRollOver.py b/tests/scripts/thread-cert/Cert_6_6_02_KeyIncrementRollOver.py
index 72ed80a..766b42b 100755
--- a/tests/scripts/thread-cert/Cert_6_6_02_KeyIncrementRollOver.py
+++ b/tests/scripts/thread-cert/Cert_6_6_02_KeyIncrementRollOver.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_7_1_01_BorderRouterAsLeader.py b/tests/scripts/thread-cert/Cert_7_1_01_BorderRouterAsLeader.py
index e31b062..4f02528 100755
--- a/tests/scripts/thread-cert/Cert_7_1_01_BorderRouterAsLeader.py
+++ b/tests/scripts/thread-cert/Cert_7_1_01_BorderRouterAsLeader.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_7_1_02_BorderRouterAsRouter.py b/tests/scripts/thread-cert/Cert_7_1_02_BorderRouterAsRouter.py
index da4518b..22eb0c8 100755
--- a/tests/scripts/thread-cert/Cert_7_1_02_BorderRouterAsRouter.py
+++ b/tests/scripts/thread-cert/Cert_7_1_02_BorderRouterAsRouter.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_7_1_03_BorderRouterAsLeader.py b/tests/scripts/thread-cert/Cert_7_1_03_BorderRouterAsLeader.py
index 17333ca..018cb04 100755
--- a/tests/scripts/thread-cert/Cert_7_1_03_BorderRouterAsLeader.py
+++ b/tests/scripts/thread-cert/Cert_7_1_03_BorderRouterAsLeader.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_7_1_04_BorderRouterAsRouter.py b/tests/scripts/thread-cert/Cert_7_1_04_BorderRouterAsRouter.py
index 4d5205b..7ffb393 100755
--- a/tests/scripts/thread-cert/Cert_7_1_04_BorderRouterAsRouter.py
+++ b/tests/scripts/thread-cert/Cert_7_1_04_BorderRouterAsRouter.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_7_1_05_BorderRouterAsRouter.py b/tests/scripts/thread-cert/Cert_7_1_05_BorderRouterAsRouter.py
index fef5299..f048369 100755
--- a/tests/scripts/thread-cert/Cert_7_1_05_BorderRouterAsRouter.py
+++ b/tests/scripts/thread-cert/Cert_7_1_05_BorderRouterAsRouter.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_8_1_01_Commissioning.py b/tests/scripts/thread-cert/Cert_8_1_01_Commissioning.py
index 7a94863..e5ee374 100755
--- a/tests/scripts/thread-cert/Cert_8_1_01_Commissioning.py
+++ b/tests/scripts/thread-cert/Cert_8_1_01_Commissioning.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_8_1_02_Commissioning.py b/tests/scripts/thread-cert/Cert_8_1_02_Commissioning.py
index 7817465..01c60a2 100755
--- a/tests/scripts/thread-cert/Cert_8_1_02_Commissioning.py
+++ b/tests/scripts/thread-cert/Cert_8_1_02_Commissioning.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_8_2_01_JoinerRouter.py b/tests/scripts/thread-cert/Cert_8_2_01_JoinerRouter.py
index 0b4b6f5..0cb54bb 100755
--- a/tests/scripts/thread-cert/Cert_8_2_01_JoinerRouter.py
+++ b/tests/scripts/thread-cert/Cert_8_2_01_JoinerRouter.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_8_2_02_JoinerRouter.py b/tests/scripts/thread-cert/Cert_8_2_02_JoinerRouter.py
index a3851f3..e3e7354 100755
--- a/tests/scripts/thread-cert/Cert_8_2_02_JoinerRouter.py
+++ b/tests/scripts/thread-cert/Cert_8_2_02_JoinerRouter.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_9_2_02_MGMTCommissionerSet.py b/tests/scripts/thread-cert/Cert_9_2_02_MGMTCommissionerSet.py
index 2d7b19c..1ab4750 100755
--- a/tests/scripts/thread-cert/Cert_9_2_02_MGMTCommissionerSet.py
+++ b/tests/scripts/thread-cert/Cert_9_2_02_MGMTCommissionerSet.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2019, The OpenThread Authors.
# All rights reserved.
@@ -119,7 +119,7 @@
COMMISSIONER
)
msg = commissioner_messages.next_coap_message('0.02', uri_path='/c/cs')
- rloc = ip_address(self.nodes[LEADER].get_addr_rloc())
+ rloc = ip_address(self.nodes[LEADER].get_rloc())
leader_aloc = ip_address(self.nodes[LEADER].get_addr_leader_aloc())
command.check_coap_message(
msg,
@@ -220,7 +220,7 @@
)
# Step 15 - Send ICMPv6 Echo Request to Leader
- leader_rloc = self.nodes[LEADER].get_addr_rloc()
+ leader_rloc = self.nodes[LEADER].get_rloc()
self.assertTrue(self.nodes[COMMISSIONER].ping(leader_rloc))
diff --git a/tests/scripts/thread-cert/Cert_9_2_04_ActiveDataset.py b/tests/scripts/thread-cert/Cert_9_2_04_ActiveDataset.py
index 9924568..1351e53 100755
--- a/tests/scripts/thread-cert/Cert_9_2_04_ActiveDataset.py
+++ b/tests/scripts/thread-cert/Cert_9_2_04_ActiveDataset.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_9_2_07_DelayTimer.py b/tests/scripts/thread-cert/Cert_9_2_07_DelayTimer.py
index 9a028a5..585d113 100755
--- a/tests/scripts/thread-cert/Cert_9_2_07_DelayTimer.py
+++ b/tests/scripts/thread-cert/Cert_9_2_07_DelayTimer.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_9_2_08_PersistentDatasets.py b/tests/scripts/thread-cert/Cert_9_2_08_PersistentDatasets.py
index 80591c0..b6b1b2a 100755
--- a/tests/scripts/thread-cert/Cert_9_2_08_PersistentDatasets.py
+++ b/tests/scripts/thread-cert/Cert_9_2_08_PersistentDatasets.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_9_2_09_PendingPartition.py b/tests/scripts/thread-cert/Cert_9_2_09_PendingPartition.py
index 0b444a4..53db38a 100755
--- a/tests/scripts/thread-cert/Cert_9_2_09_PendingPartition.py
+++ b/tests/scripts/thread-cert/Cert_9_2_09_PendingPartition.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_9_2_10_PendingPartition.py b/tests/scripts/thread-cert/Cert_9_2_10_PendingPartition.py
index 46868e1..42ed0f7 100755
--- a/tests/scripts/thread-cert/Cert_9_2_10_PendingPartition.py
+++ b/tests/scripts/thread-cert/Cert_9_2_10_PendingPartition.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_9_2_11_MasterKey.py b/tests/scripts/thread-cert/Cert_9_2_11_MasterKey.py
index e09dad2..1947990 100755
--- a/tests/scripts/thread-cert/Cert_9_2_11_MasterKey.py
+++ b/tests/scripts/thread-cert/Cert_9_2_11_MasterKey.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_9_2_12_Announce.py b/tests/scripts/thread-cert/Cert_9_2_12_Announce.py
index feb50b6..4f6485d 100755
--- a/tests/scripts/thread-cert/Cert_9_2_12_Announce.py
+++ b/tests/scripts/thread-cert/Cert_9_2_12_Announce.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_9_2_13_EnergyScan.py b/tests/scripts/thread-cert/Cert_9_2_13_EnergyScan.py
index d579890..8fe47a8 100755
--- a/tests/scripts/thread-cert/Cert_9_2_13_EnergyScan.py
+++ b/tests/scripts/thread-cert/Cert_9_2_13_EnergyScan.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_9_2_14_PanIdQuery.py b/tests/scripts/thread-cert/Cert_9_2_14_PanIdQuery.py
index be2b146..3cda814 100755
--- a/tests/scripts/thread-cert/Cert_9_2_14_PanIdQuery.py
+++ b/tests/scripts/thread-cert/Cert_9_2_14_PanIdQuery.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_9_2_15_PendingPartition.py b/tests/scripts/thread-cert/Cert_9_2_15_PendingPartition.py
index 7883de3..03c9b99 100755
--- a/tests/scripts/thread-cert/Cert_9_2_15_PendingPartition.py
+++ b/tests/scripts/thread-cert/Cert_9_2_15_PendingPartition.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_9_2_16_ActivePendingPartition.py b/tests/scripts/thread-cert/Cert_9_2_16_ActivePendingPartition.py
index e791cef..725928a 100755
--- a/tests/scripts/thread-cert/Cert_9_2_16_ActivePendingPartition.py
+++ b/tests/scripts/thread-cert/Cert_9_2_16_ActivePendingPartition.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_9_2_17_Orphan.py b/tests/scripts/thread-cert/Cert_9_2_17_Orphan.py
index a5cba07..2e9cbed 100755
--- a/tests/scripts/thread-cert/Cert_9_2_17_Orphan.py
+++ b/tests/scripts/thread-cert/Cert_9_2_17_Orphan.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Cert_9_2_18_RollBackActiveTimestamp.py b/tests/scripts/thread-cert/Cert_9_2_18_RollBackActiveTimestamp.py
index 7292d2b..3a8fc7d 100755
--- a/tests/scripts/thread-cert/Cert_9_2_18_RollBackActiveTimestamp.py
+++ b/tests/scripts/thread-cert/Cert_9_2_18_RollBackActiveTimestamp.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Makefile.am b/tests/scripts/thread-cert/Makefile.am
index c819634..72db53f 100644
--- a/tests/scripts/thread-cert/Makefile.am
+++ b/tests/scripts/thread-cert/Makefile.am
@@ -148,6 +148,8 @@
test_crypto.py \
test_diag.py \
test_ipv6.py \
+ test_ipv6_fragmentation.py \
+ test_ipv6_source_selection.py \
test_lowpan.py \
test_mac802154.py \
test_mle.py \
@@ -167,6 +169,8 @@
test_crypto.py \
test_diag.py \
test_ipv6.py \
+ test_ipv6_fragmentation.py \
+ test_ipv6_source_selection.py \
test_lowpan.py \
test_mac802154.py \
test_mle.py \
@@ -281,6 +285,8 @@
XFAIL_NCP_TESTS = \
test_coaps.py \
test_diag.py \
+ test_ipv6_fragmentation.py \
+ test_ipv6_source_selection.py \
test_service.py \
Cert_5_3_10_AddressQuery.py \
Cert_8_1_01_Commissioning.py \
diff --git a/tests/scripts/thread-cert/Test_Cli.py b/tests/scripts/thread-cert/Test_Cli.py
index 50d214a..cfe688e 100755
--- a/tests/scripts/thread-cert/Test_Cli.py
+++ b/tests/scripts/thread-cert/Test_Cli.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/Test_MacScan.py b/tests/scripts/thread-cert/Test_MacScan.py
index 0b68c0b..04ccce3 100755
--- a/tests/scripts/thread-cert/Test_MacScan.py
+++ b/tests/scripts/thread-cert/Test_MacScan.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/__init__.py b/tests/scripts/thread-cert/__init__.py
index 8188863..ebde8c0 100755
--- a/tests/scripts/thread-cert/__init__.py
+++ b/tests/scripts/thread-cert/__init__.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/coap.py b/tests/scripts/thread-cert/coap.py
index ea926b5..68ec871 100644
--- a/tests/scripts/thread-cert/coap.py
+++ b/tests/scripts/thread-cert/coap.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/command.py b/tests/scripts/thread-cert/command.py
index 043dfe6..bf32ad5 100644
--- a/tests/scripts/thread-cert/command.py
+++ b/tests/scripts/thread-cert/command.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2017-2018, The OpenThread Authors.
# All rights reserved.
@@ -28,7 +28,6 @@
#
import binascii
-import sys
import ipv6
import network_data
@@ -70,8 +69,6 @@
if isinstance(destination_address, bytearray):
destination_address = bytes(destination_address)
- elif isinstance(destination_address, str) and sys.version_info[0] == 2:
- destination_address = destination_address.decode("utf-8")
assert (
ipv6.ip_address(destination_address)
@@ -124,8 +121,6 @@
if isinstance(destination_address, bytearray):
destination_address = bytes(destination_address)
- elif isinstance(destination_address, str) and sys.version_info[0] == 2:
- destination_address = destination_address.decode("utf-8")
assert (
ipv6.ip_address(destination_address)
diff --git a/tests/scripts/thread-cert/common.py b/tests/scripts/thread-cert/common.py
index 4e460af..519b1df 100644
--- a/tests/scripts/thread-cert/common.py
+++ b/tests/scripts/thread-cert/common.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
@@ -28,7 +28,6 @@
#
import struct
-import sys
from binascii import hexlify
from enum import IntEnum
@@ -69,9 +68,6 @@
if isinstance(value, bytearray):
value = bytes(value)
- elif isinstance(value, str) and sys.version_info[0] == 2:
- value = value.decode("utf-8")
-
return ipaddress.ip_address(value)
@property
diff --git a/tests/scripts/thread-cert/config.py b/tests/scripts/thread-cert/config.py
index 382410b..b95230e 100644
--- a/tests/scripts/thread-cert/config.py
+++ b/tests/scripts/thread-cert/config.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
@@ -374,6 +374,7 @@
19788: mle_message_factory,
61631: coap_message_factory,
1000: dtls_message_factory,
+ 5684: dtls_message_factory,
}
)
diff --git a/tests/scripts/thread-cert/debug.py b/tests/scripts/thread-cert/debug.py
index d4fd817..4d76097 100644
--- a/tests/scripts/thread-cert/debug.py
+++ b/tests/scripts/thread-cert/debug.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2019, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/dtls.py b/tests/scripts/thread-cert/dtls.py
index 8a86b34..33fd914 100644
--- a/tests/scripts/thread-cert/dtls.py
+++ b/tests/scripts/thread-cert/dtls.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2019, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/ipv6.py b/tests/scripts/thread-cert/ipv6.py
index ebf7481..9e285de 100644
--- a/tests/scripts/thread-cert/ipv6.py
+++ b/tests/scripts/thread-cert/ipv6.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
@@ -30,7 +30,6 @@
import abc
import io
import struct
-import sys
from binascii import hexlify
from ipaddress import ip_address
@@ -45,6 +44,7 @@
IPV6_NEXT_HEADER_HOP_BY_HOP = 0
IPV6_NEXT_HEADER_TCP = 6
IPV6_NEXT_HEADER_UDP = 17
+IPV6_NEXT_HEADER_FRAGMENT = 44
IPV6_NEXT_HEADER_ICMP = 58
UPPER_LAYER_PROTOCOLS = [
@@ -55,6 +55,7 @@
# ICMP Protocol codes
ICMP_DESTINATION_UNREACHABLE = 1
+ICMP_TIME_EXCEEDED = 3
ICMP_ECHO_REQUEST = 128
ICMP_ECHO_RESPONSE = 129
@@ -221,9 +222,6 @@
if isinstance(value, bytearray):
value = bytes(value)
- elif isinstance(value, str) and sys.version_info[0] == 2:
- value = value.decode("utf-8")
-
return ip_address(value)
@property
@@ -285,9 +283,6 @@
if isinstance(value, bytearray):
value = bytes(value)
- elif isinstance(value, str) and sys.version_info[0] == 2:
- value = value.decode("utf-8")
-
return ip_address(value)
@property
@@ -377,6 +372,7 @@
Extension headers:
- HopByHop
- Routing header (not implemented in this module)
+ - Fragment Header
Upper layer protocols:
- ICMPv6
@@ -643,6 +639,68 @@
return len(self.header) + len(self.body)
+class FragmentHeader(ExtensionHeader):
+
+ """ Class representing Fragment extension header.
+
+ +-------------+----------+-----------------+-----+---+----------------+
+ | Next Header | Reserved | Fragment Offset | Res | M | Identification |
+ +-------------+----------+-----------------+-----+---+----------------+
+
+ Fragment extention header consists of:
+ - next_header type (8 bit)
+ - fragment offset which is multiple of 8 (13 bit)
+ - more_flag to indicate further data (1 bit)
+ - identification for all associated fragments (32 bit)
+ """
+ @property
+ def type(self):
+ return 44
+
+ @property
+ def identification(self):
+ return self._identification
+
+ @property
+ def more_flag(self):
+ return self._more_flag
+
+ @property
+ def offset(self):
+ return self._fragm_offset
+
+ def __init__(self, next_header=None, fragm_offset=0, more_flag=False, identification=0):
+ super(FragmentHeader, self).__init__(next_header, 0)
+ self._fragm_offset = fragm_offset
+ self._more_flag = more_flag
+ self._identification = identification
+
+ def callculate_offset(self, position):
+ return position >> 3
+
+ def to_bytes(self):
+ data = bytearray([self.next_header, 0x00])
+ data += bytearray([self._fragm_offset >> 5, ((self._fragm_offset << 3) | self._more_flag) & 0xff])
+ data += struct.pack(">I", self._identification)
+
+ return data
+
+ @classmethod
+ def from_bytes(cls, data):
+ next_header = struct.unpack(">B", data.read(1))[0]
+ struct.unpack(">B", data.read(1))[0] # reserved
+ fragment_offset = struct.unpack(">H", data.read(2))[0]
+ more_flag = fragment_offset & 0x1
+ identificaton = struct.unpack(">I", data.read(4))[0]
+
+ fragment_offset = fragment_offset >> 3
+
+ return cls(next_header, fragment_offset, more_flag, identificaton)
+
+ def __len__(self):
+ return 64
+
+
class HopByHop(ExtensionHeader):
""" Class representing HopByHop extension header.
diff --git a/tests/scripts/thread-cert/lowpan.py b/tests/scripts/thread-cert/lowpan.py
index 43ec9de..01fac90 100644
--- a/tests/scripts/thread-cert/lowpan.py
+++ b/tests/scripts/thread-cert/lowpan.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
@@ -30,7 +30,6 @@
import io
import ipaddress
import struct
-import sys
import common
import ipv6
@@ -320,9 +319,6 @@
class Context:
def __init__(self, prefix, prefix_length=None):
if isinstance(prefix, str):
- if sys.version_info[0] == 2:
- prefix = prefix.decode("utf-8")
-
prefix, prefix_length = prefix.split("/")
prefix_length = int(prefix_length)
diff --git a/tests/scripts/thread-cert/mac802154.py b/tests/scripts/thread-cert/mac802154.py
index 09a6773..7d11760 100644
--- a/tests/scripts/thread-cert/mac802154.py
+++ b/tests/scripts/thread-cert/mac802154.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/mesh_cop.py b/tests/scripts/thread-cert/mesh_cop.py
index 649813d..f5abcb1 100644
--- a/tests/scripts/thread-cert/mesh_cop.py
+++ b/tests/scripts/thread-cert/mesh_cop.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2019, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/message.py b/tests/scripts/thread-cert/message.py
index 73761aa..1556acc 100644
--- a/tests/scripts/thread-cert/message.py
+++ b/tests/scripts/thread-cert/message.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
@@ -30,7 +30,6 @@
import io
import ipaddress
import struct
-import sys
import coap
import common
@@ -349,14 +348,17 @@
assert sent_to_node
def assertSentToDestinationAddress(self, ipv6_address):
- if sys.version_info[0] == 2:
- ipv6_address = ipv6_address.decode("utf-8")
-
assert (
self.ipv6_packet.ipv6_header.destination_address
== ipaddress.ip_address(ipv6_address)
)
+ def assertSentFromSourceAddress(self, ipv6_address):
+ assert (
+ self.ipv6_packet.ipv6_header.source_address
+ == ipaddress.ip_address(ipv6_address)
+ )
+
def assertSentWithHopLimit(self, hop_limit):
assert self.ipv6_packet.ipv6_header.hop_limit == hop_limit
diff --git a/tests/scripts/thread-cert/mle.py b/tests/scripts/thread-cert/mle.py
index 4c3e05d..0f6e335 100644
--- a/tests/scripts/thread-cert/mle.py
+++ b/tests/scripts/thread-cert/mle.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/net_crypto.py b/tests/scripts/thread-cert/net_crypto.py
index a2f7aba..191fa00 100644
--- a/tests/scripts/thread-cert/net_crypto.py
+++ b/tests/scripts/thread-cert/net_crypto.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/network_data.py b/tests/scripts/thread-cert/network_data.py
index edf40f8..72c3ce1 100644
--- a/tests/scripts/thread-cert/network_data.py
+++ b/tests/scripts/thread-cert/network_data.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/network_layer.py b/tests/scripts/thread-cert/network_layer.py
index 99081fb..a84c649 100644
--- a/tests/scripts/thread-cert/network_layer.py
+++ b/tests/scripts/thread-cert/network_layer.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/node.py b/tests/scripts/thread-cert/node.py
index 475c7db..70110ba 100755
--- a/tests/scripts/thread-cert/node.py
+++ b/tests/scripts/thread-cert/node.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
@@ -60,10 +60,7 @@
self.__init_sim(nodeid, mode)
if self.verbose:
- if sys.version_info[0] == 2:
- self.pexpect.logfile_read = sys.stdout
- else:
- self.pexpect.logfile_read = sys.stdout.buffer
+ self.pexpect.logfile_read = sys.stdout.buffer
self._initialized = True
@@ -536,6 +533,36 @@
return addrs
+ def get_mleid(self):
+ addr = None
+ cmd = 'ipaddr mleid'
+ self.send_command(cmd)
+ i = self._expect(r'(\S+(:\S*)+)\r?\n')
+ if i == 0:
+ addr = self.pexpect.match.groups()[0].decode("utf-8")
+ self._expect('Done')
+ return addr
+
+ def get_linklocal(self):
+ addr = None
+ cmd = 'ipaddr linklocal'
+ self.send_command(cmd)
+ i = self._expect(r'(\S+(:\S*)+)\r?\n')
+ if i == 0:
+ addr = self.pexpect.match.groups()[0].decode("utf-8")
+ self._expect('Done')
+ return addr
+
+ def get_rloc(self):
+ addr = None
+ cmd = 'ipaddr rloc'
+ self.send_command(cmd)
+ i = self._expect(r'(\S+(:\S*)+)\r?\n')
+ if i == 0:
+ addr = self.pexpect.match.groups()[0].decode("utf-8")
+ self._expect('Done')
+ return addr
+
def get_addr(self, prefix):
network = ipaddress.ip_network(u'%s' % str(prefix))
addrs = self.get_addrs()
@@ -543,27 +570,12 @@
for addr in addrs:
if isinstance(addr, bytearray):
addr = bytes(addr)
- elif isinstance(addr, str) and sys.version_info[0] == 2:
- addr = addr.decode("utf-8")
ipv6_address = ipaddress.ip_address(addr)
if ipv6_address in network:
return ipv6_address.exploded
return None
- def get_addr_rloc(self):
- addrs = self.get_addrs()
- for addr in addrs:
- segs = addr.split(':')
- if (
- segs[4] == '0'
- and segs[5] == 'ff'
- and segs[6] == 'fe00'
- and segs[7] != 'fc00'
- ):
- return addr
- return None
-
def get_addr_leader_aloc(self):
addrs = self.get_addrs()
for addr in addrs:
@@ -1052,6 +1064,94 @@
payload += tlv.to_hex()
self.commissioner_mgmtset(self.bytes_to_hex_str(payload))
+ def udp_start(self, local_ipaddr, local_port):
+ cmd = 'udp open'
+ self.send_command(cmd)
+ self._expect('Done')
+
+ cmd = 'udp bind %s %s' % (local_ipaddr, local_port)
+ self.send_command(cmd)
+ self._expect('Done')
+
+ def udp_stop(self):
+ cmd = 'udp close'
+ self.send_command(cmd)
+ self._expect('Done')
+
+ def udp_send(self, bytes, ipaddr, port, success=True):
+ cmd = 'udp send %s %d -s %d ' % (ipaddr, port, bytes)
+ self.send_command(cmd)
+ if success:
+ self._expect('Done')
+ else:
+ self._expect('Error')
+
+ def udp_check_rx(self, bytes_should_rx):
+ self._expect('%d bytes' % bytes_should_rx)
+
+ def router_list(self):
+ cmd = 'router list'
+ self.send_command(cmd)
+ self._expect([r'(\d+)((\s\d+)*)'])
+
+ g = self.pexpect.match.groups()
+ router_list = g[0] + ' ' + g[1]
+ router_list = [int(x) for x in router_list.split()]
+ self._expect('Done')
+ return router_list
+
+ def router_table(self):
+ cmd = 'router table'
+ self.send_command(cmd)
+
+ self._expect(r'(.*)Done')
+ g = self.pexpect.match.groups()
+ output = g[0]
+ lines = output.strip().split('\n')
+ lines = [l.strip() for l in lines]
+ router_table = {}
+ for i, line in enumerate(lines):
+ if not line.startswith('|') or not line.endswith('|'):
+ if i not in (0, 2):
+ # should not happen
+ print("unexpected line %d: %s" % (i, line))
+
+ continue
+
+ line = line[1:][:-1]
+ line = [x.strip() for x in line.split('|')]
+ if len(line) != 8:
+ print("unexpected line %d: %s" % (i, line))
+ continue
+
+ try:
+ int(line[0])
+ except ValueError:
+ if i != 1:
+ print("unexpected line %d: %s" % (i, line))
+ continue
+
+ id = int(line[0])
+ rloc16 = int(line[1], 16)
+ nexthop = int(line[2])
+ pathcost = int(line[3])
+ lqin = int(line[4])
+ lqout = int(line[5])
+ age = int(line[6])
+ emac = str(line[7])
+
+ router_table[id] = {
+ 'rloc16': rloc16,
+ 'nexthop': nexthop,
+ 'pathcost': pathcost,
+ 'lqin': lqin,
+ 'lqout': lqout,
+ 'age': age,
+ 'emac': emac,
+ }
+
+ return router_table
+
if __name__ == '__main__':
unittest.main()
diff --git a/tests/scripts/thread-cert/pcap.py b/tests/scripts/thread-cert/pcap.py
index 51e88c8..8887b49 100644
--- a/tests/scripts/thread-cert/pcap.py
+++ b/tests/scripts/thread-cert/pcap.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/requirements.txt b/tests/scripts/thread-cert/requirements.txt
index e4c9696..684b969 100644
--- a/tests/scripts/thread-cert/requirements.txt
+++ b/tests/scripts/thread-cert/requirements.txt
@@ -1,5 +1,4 @@
-enum34==1.1.2;python_version<"3.4"
-future==0.16.0
-ipaddress==1.0.16
-pexpect==4.6
-pycryptodome==3.6.6
+enum34
+ipaddress
+pexpect
+pycryptodome
diff --git a/tests/scripts/thread-cert/simulator.py b/tests/scripts/thread-cert/simulator.py
index 7588e1b..fb23ec5 100644
--- a/tests/scripts/thread-cert/simulator.py
+++ b/tests/scripts/thread-cert/simulator.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/sniffer.py b/tests/scripts/thread-cert/sniffer.py
index a181b5f..5bfbb82 100644
--- a/tests/scripts/thread-cert/sniffer.py
+++ b/tests/scripts/thread-cert/sniffer.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/sniffer_transport.py b/tests/scripts/thread-cert/sniffer_transport.py
index 3e041e6..6f443d3 100644
--- a/tests/scripts/thread-cert/sniffer_transport.py
+++ b/tests/scripts/thread-cert/sniffer_transport.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/test_coap.py b/tests/scripts/thread-cert/test_coap.py
index 63cb2c6..35d4bb6 100755
--- a/tests/scripts/thread-cert/test_coap.py
+++ b/tests/scripts/thread-cert/test_coap.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/test_coaps.py b/tests/scripts/thread-cert/test_coaps.py
index a134087..bb46366 100755
--- a/tests/scripts/thread-cert/test_coaps.py
+++ b/tests/scripts/thread-cert/test_coaps.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/test_common.py b/tests/scripts/thread-cert/test_common.py
index 8a80b05..42939cd 100755
--- a/tests/scripts/thread-cert/test_common.py
+++ b/tests/scripts/thread-cert/test_common.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/test_crypto.py b/tests/scripts/thread-cert/test_crypto.py
index 633d208..3e00407 100755
--- a/tests/scripts/thread-cert/test_crypto.py
+++ b/tests/scripts/thread-cert/test_crypto.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/test_diag.py b/tests/scripts/thread-cert/test_diag.py
index 2303952..06a92fd 100755
--- a/tests/scripts/thread-cert/test_diag.py
+++ b/tests/scripts/thread-cert/test_diag.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/test_ipv6.py b/tests/scripts/thread-cert/test_ipv6.py
index 2a188ff..8011e12 100755
--- a/tests/scripts/thread-cert/test_ipv6.py
+++ b/tests/scripts/thread-cert/test_ipv6.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
@@ -61,6 +61,7 @@
BytesPayloadFactory,
ICMPv6DestinationUnreachable,
UdpBasedOnSrcDstPortsPayloadFactory,
+ FragmentHeader,
)
import common
@@ -157,6 +158,18 @@
return any_uint(16)
+def any_fragment_offset():
+ return any_uint(13)
+
+
+def any_bool():
+ return (any_uint(1) == 1)
+
+
+def any_fragment_identification():
+ return any_uint(32)
+
+
def any_icmp_payload(_type, code, checksum, body):
return bytearray([_type, code, (checksum >> 8) & 0xff, checksum & 0xff]) + body
@@ -752,6 +765,46 @@
self.assertEqual(expected_udp_dgram_bytes, udp_dgram_bytes)
+class TestIPv6FragmentHeader(unittest.TestCase):
+
+ def test_shold_convert_IPv6_fragment_header_to_bytes_when_to_bytes_method_is_called(self):
+ # GIVEN
+ type = any_type()
+ offset = any_fragment_offset()
+ more_flag = any_bool()
+ identification = any_fragment_identification()
+
+ ipv6_fragment_header = FragmentHeader(type, offset, more_flag, identification)
+
+ # WHEN
+ actual = ipv6_fragment_header.to_bytes()
+
+ # THEN
+ expected = bytearray([type, 0x00, offset >> 5, ((offset << 3) & 0xff) | more_flag])\
+ + struct.pack("!I", identification)
+
+ self.assertEqual(expected, actual)
+
+ def test_should_create_FragmentHeader_when_from_bytes_classmethod_is_called(self):
+ # GIVEN
+ type = any_type()
+ offset = any_fragment_offset()
+ more_flag = any_bool()
+ identification = any_fragment_identification()
+
+ data = bytearray([type, 0x00, offset >> 5, ((offset << 3) & 0xff) | more_flag])\
+ + struct.pack("!I", identification)
+
+ # WHEN
+ ipv6_fragment_header = FragmentHeader.from_bytes(io.BytesIO(data))
+
+ # THEN
+ self.assertEqual(type, ipv6_fragment_header.next_header)
+ self.assertEqual(offset, ipv6_fragment_header.offset)
+ self.assertEqual(more_flag, ipv6_fragment_header.more_flag)
+ self.assertEqual(identification, ipv6_fragment_header.identification)
+
+
class TestICMPv6(unittest.TestCase):
def test_should_creates_bytes_from_ICMPv6Header_and_body_when_to_bytes_method_is_called(self):
diff --git a/tests/scripts/thread-cert/test_ipv6_fragmentation.py b/tests/scripts/thread-cert/test_ipv6_fragmentation.py
new file mode 100755
index 0000000..90bb440
--- /dev/null
+++ b/tests/scripts/thread-cert/test_ipv6_fragmentation.py
@@ -0,0 +1,95 @@
+#!/usr/bin/env python3
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+import unittest
+
+import config
+import node
+
+LEADER = 1
+ROUTER = 2
+
+
+class TestIPv6Fragmentation(unittest.TestCase):
+
+ def setUp(self):
+ self.simulator = config.create_default_simulator()
+
+ self.nodes = {}
+ for i in range(1, 3):
+ self.nodes[i] = node.Node(i, simulator=self.simulator)
+
+ self.nodes[LEADER].set_panid(0xcafe)
+ self.nodes[LEADER].set_mode('rsdn')
+ self.nodes[LEADER].add_whitelist(self.nodes[ROUTER].get_addr64())
+ self.nodes[LEADER].enable_whitelist()
+
+ self.nodes[ROUTER].set_panid(0xcafe)
+ self.nodes[ROUTER].set_mode('rsdn')
+ self.nodes[ROUTER].add_whitelist(self.nodes[LEADER].get_addr64())
+ self.nodes[ROUTER].enable_whitelist()
+ self.nodes[ROUTER].set_router_selection_jitter(1)
+
+ def tearDown(self):
+ for n in list(self.nodes.values()):
+ n.stop()
+ n.destroy()
+ self.simulator.stop()
+
+ def test(self):
+ self.nodes[LEADER].start()
+ self.simulator.go(5)
+ self.assertEqual(self.nodes[LEADER].get_state(), 'leader')
+
+ self.nodes[ROUTER].start()
+ self.simulator.go(5)
+ self.assertEqual(self.nodes[ROUTER].get_state(), 'router')
+
+ mleid_leader = self.nodes[LEADER].get_ip6_address(config.ADDRESS_TYPE.ML_EID)
+ mleid_router = self.nodes[ROUTER].get_ip6_address(config.ADDRESS_TYPE.ML_EID)
+
+ self.nodes[LEADER].udp_start("::", 12345)
+ self.nodes[ROUTER].udp_start("::", 12345)
+
+ self.nodes[LEADER].udp_send(1952, mleid_router, 12345)
+ self.simulator.go(5)
+ self.nodes[ROUTER].udp_check_rx(1952)
+
+ self.nodes[ROUTER].udp_send(1831, mleid_leader, 12345)
+ self.simulator.go(5)
+ self.nodes[LEADER].udp_check_rx(1831)
+
+ self.nodes[ROUTER].udp_send(1953, mleid_leader, 12345, False)
+
+ self.nodes[ROUTER].udp_stop()
+ self.nodes[LEADER].udp_stop()
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tests/scripts/thread-cert/test_ipv6_source_selection.py b/tests/scripts/thread-cert/test_ipv6_source_selection.py
new file mode 100755
index 0000000..0c51f0d
--- /dev/null
+++ b/tests/scripts/thread-cert/test_ipv6_source_selection.py
@@ -0,0 +1,145 @@
+#!/usr/bin/env python3
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+import unittest
+
+import config
+import ipv6
+import node
+
+LEADER = 1
+ROUTER = 2
+
+
+class TestIPv6SourceSelection(unittest.TestCase):
+
+ def setUp(self):
+ self.simulator = config.create_default_simulator()
+
+ self.nodes = {}
+ for i in range(1, 3):
+ self.nodes[i] = node.Node(i, simulator=self.simulator)
+
+ self.nodes[LEADER].set_panid(0xcafe)
+ self.nodes[LEADER].set_mode('rsdn')
+ self.nodes[LEADER].add_whitelist(self.nodes[ROUTER].get_addr64())
+ self.nodes[LEADER].enable_whitelist()
+
+ self.nodes[ROUTER].set_panid(0xcafe)
+ self.nodes[ROUTER].set_mode('rsdn')
+ self.nodes[ROUTER].add_whitelist(self.nodes[LEADER].get_addr64())
+ self.nodes[ROUTER].enable_whitelist()
+ self.nodes[ROUTER].set_router_selection_jitter(1)
+
+ def tearDown(self):
+ for n in list(self.nodes.values()):
+ n.stop()
+ n.destroy()
+ self.simulator.stop()
+
+ def test(self):
+ self.nodes[LEADER].start()
+ self.simulator.go(5)
+ self.assertEqual(self.nodes[LEADER].get_state(), 'leader')
+
+ self.nodes[ROUTER].start()
+ self.simulator.go(5)
+ self.assertEqual(self.nodes[ROUTER].get_state(), 'router')
+
+ leader_aloc = self.nodes[LEADER].get_addr_leader_aloc()
+ leader_mleid = self.nodes[LEADER].get_mleid()
+ leader_rloc = self.nodes[LEADER].get_rloc()
+ leader_linklocal = self.nodes[LEADER].get_linklocal()
+ multicast_addr = 'ff03::1'
+ external_addr = '2007::1'
+
+ router_rloc = self.nodes[ROUTER].get_rloc()
+ router_linklocal = self.nodes[ROUTER].get_linklocal()
+ router_mleid = self.nodes[ROUTER].get_mleid()
+
+ # Source check - RLOC source for RLOC destination
+ self.assertTrue(self.nodes[ROUTER].ping(leader_rloc))
+ router_msgs = self.simulator.get_messages_sent_by(ROUTER)
+ msg = router_msgs.get_icmp_message(ipv6.ICMP_ECHO_REQUEST)
+ msg.assertSentFromSourceAddress(router_rloc)
+
+ # Source check - ML-EID source for ALOC destination
+ self.assertTrue(self.nodes[ROUTER].ping(leader_aloc))
+ router_msgs = self.simulator.get_messages_sent_by(ROUTER)
+ msg = router_msgs.get_icmp_message(ipv6.ICMP_ECHO_REQUEST)
+ msg.assertSentFromSourceAddress(router_mleid)
+
+ # Source check - ML-EID source for ML-EID destination
+ self.assertTrue(self.nodes[ROUTER].ping(leader_mleid))
+ router_msgs = self.simulator.get_messages_sent_by(ROUTER)
+ msg = router_msgs.get_icmp_message(ipv6.ICMP_ECHO_REQUEST)
+ msg.assertSentFromSourceAddress(router_mleid)
+
+ # Source check - link local source source for link local address
+ self.assertTrue(self.nodes[ROUTER].ping(leader_linklocal))
+ router_msgs = self.simulator.get_messages_sent_by(ROUTER)
+ msg = router_msgs.get_icmp_message(ipv6.ICMP_ECHO_REQUEST)
+ msg.assertSentFromSourceAddress(router_linklocal)
+
+ # Source check - ML-EID source for realmlocal multicast destination
+ self.assertTrue(self.nodes[ROUTER].ping(multicast_addr))
+ router_msgs = self.simulator.get_messages_sent_by(ROUTER)
+ msg = router_msgs.get_icmp_message(ipv6.ICMP_ECHO_REQUEST)
+ msg.assertSentFromSourceAddress(router_mleid)
+
+ # GUA and default gateway
+ self.nodes[LEADER].add_prefix('2001::/64', 'paros')
+ self.nodes[LEADER].register_netdata()
+ self.simulator.go(5)
+
+ # Set lowpan context of sniffer
+ self.simulator.set_lowpan_context(1, '2001::/64')
+
+ # Flushes message queue before next ping
+ router_msgs = self.simulator.get_messages_sent_by(ROUTER)
+
+ # Source check - GUA source for GUA destination
+ leader_gua = self.nodes[LEADER].get_addr("2001::/64")
+ router_gua = self.nodes[ROUTER].get_addr("2001::/64")
+ self.assertTrue(leader_gua is not None)
+ self.assertTrue(router_gua is not None)
+ self.assertTrue(self.nodes[ROUTER].ping(leader_gua))
+ router_msgs = self.simulator.get_messages_sent_by(ROUTER)
+ msg = router_msgs.get_icmp_message(ipv6.ICMP_ECHO_REQUEST)
+ msg.assertSentFromSourceAddress(router_gua)
+
+ # Source check - GUA source for external address (default route)
+ self.nodes[ROUTER].ping(external_addr)
+ router_msgs = self.simulator.get_messages_sent_by(ROUTER)
+ msg = router_msgs.get_icmp_message(ipv6.ICMP_ECHO_REQUEST)
+ msg.assertSentFromSourceAddress(router_gua)
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tests/scripts/thread-cert/test_lowpan.py b/tests/scripts/thread-cert/test_lowpan.py
index 5142b79..04ebc1c 100755
--- a/tests/scripts/thread-cert/test_lowpan.py
+++ b/tests/scripts/thread-cert/test_lowpan.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/test_mac802154.py b/tests/scripts/thread-cert/test_mac802154.py
index 2bd10a8..449c7ad 100755
--- a/tests/scripts/thread-cert/test_mac802154.py
+++ b/tests/scripts/thread-cert/test_mac802154.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/test_mle.py b/tests/scripts/thread-cert/test_mle.py
index 9c5b0a8..01526ee 100755
--- a/tests/scripts/thread-cert/test_mle.py
+++ b/tests/scripts/thread-cert/test_mle.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/test_network_data.py b/tests/scripts/thread-cert/test_network_data.py
index e72b9c7..552cc04 100755
--- a/tests/scripts/thread-cert/test_network_data.py
+++ b/tests/scripts/thread-cert/test_network_data.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/test_network_layer.py b/tests/scripts/thread-cert/test_network_layer.py
index f7cbfa3..93cae84 100755
--- a/tests/scripts/thread-cert/test_network_layer.py
+++ b/tests/scripts/thread-cert/test_network_layer.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/test_route_table.py b/tests/scripts/thread-cert/test_route_table.py
new file mode 100755
index 0000000..18fecdc
--- /dev/null
+++ b/tests/scripts/thread-cert/test_route_table.py
@@ -0,0 +1,99 @@
+#!/usr/bin/env python3
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+import unittest
+
+import node
+import config
+
+LEADER = 1
+ROUTER1 = 2
+ROUTER2 = 3
+
+# Topology:
+# LEADER -- ROUTER1 -- ROUTER2
+#
+
+
+class TestRouteTable(unittest.TestCase):
+ def setUp(self):
+ self.simulator = config.create_default_simulator()
+
+ self.nodes = {}
+ for i in range(1, 4):
+ self.nodes[i] = node.Node(i, simulator=self.simulator)
+
+ self.nodes[LEADER].set_panid(0xface)
+ self.nodes[LEADER].set_mode('rsdn')
+ self.nodes[LEADER].add_whitelist(self.nodes[ROUTER1].get_addr64())
+ self.nodes[LEADER].enable_whitelist()
+
+ self.nodes[ROUTER1].set_panid(0xface)
+ self.nodes[ROUTER1].set_mode('rsdn')
+ self.nodes[ROUTER1].add_whitelist(self.nodes[LEADER].get_addr64())
+ self.nodes[ROUTER1].add_whitelist(self.nodes[ROUTER2].get_addr64())
+ self.nodes[ROUTER1].enable_whitelist()
+ self.nodes[ROUTER1].set_router_selection_jitter(1)
+
+ self.nodes[ROUTER2].set_panid(0xface)
+ self.nodes[ROUTER2].set_mode('rsdn')
+ self.nodes[ROUTER2].add_whitelist(self.nodes[ROUTER1].get_addr64())
+ self.nodes[ROUTER2].enable_whitelist()
+ self.nodes[ROUTER2].set_router_selection_jitter(1)
+
+ def tearDown(self):
+ for n in list(self.nodes.values()):
+ n.stop()
+ n.destroy()
+ self.simulator.stop()
+
+ def test(self):
+ self.nodes[LEADER].start()
+ self.simulator.go(5)
+ self.assertEqual(self.nodes[LEADER].get_state(), 'leader')
+
+ self.nodes[ROUTER1].start()
+ self.nodes[ROUTER2].start()
+ self.simulator.go(5)
+ self.assertEqual(self.nodes[ROUTER1].get_state(), 'router')
+ self.assertEqual(self.nodes[ROUTER2].get_state(), 'router')
+
+ self.simulator.go(100)
+
+ router_ids = set(_node.get_router_id() for _node in self.nodes.values())
+ for _node in self.nodes.values():
+ self.assertEqual(set(_node.router_list()), router_ids)
+
+ for _node in self.nodes.values():
+ router_table = _node.router_table()
+ self.assertEqual(set(router_table.keys()), router_ids)
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tests/scripts/thread-cert/test_service.py b/tests/scripts/thread-cert/test_service.py
index e587623..b4dc97c 100755
--- a/tests/scripts/thread-cert/test_service.py
+++ b/tests/scripts/thread-cert/test_service.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2017, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/scripts/thread-cert/tlvs_parsing.py b/tests/scripts/thread-cert/tlvs_parsing.py
index 06af83d..63195ff 100644
--- a/tests/scripts/thread-cert/tlvs_parsing.py
+++ b/tests/scripts/thread-cert/tlvs_parsing.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2019, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/build.sh b/tests/toranj/build.sh
index 7187a16..f16fcc0 100755
--- a/tests/toranj/build.sh
+++ b/tests/toranj/build.sh
@@ -39,9 +39,11 @@
echo " ncp : Build OpenThread NCP FTD mode with POSIX platform"
echo " rcp : Build OpenThread RCP (NCP in radio mode) with POSIX platform"
echo " posix-app : Build OpenThread POSIX App NCP"
+ echo " cmake : Configure and build OpenThread using cmake/ninja (RCP and NCP) only"
echo ""
echo "Options:"
echo " -c/--enable-coverage Enable code coverage"
+ echo " -t/--enable-tests Enable tests"
echo ""
}
@@ -51,6 +53,7 @@
}
coverage=no
+tests=no
while [ $# -ge 2 ]
do
@@ -59,6 +62,10 @@
coverage=yes
shift
;;
+ -t|--enable-tests)
+ tests=yes
+ shift
+ ;;
*)
echo "Error: Unknown option \"$1\""
display_usage
@@ -76,7 +83,7 @@
configure_options=" \
--disable-docs \
- --disable-tests \
+ --enable-tests=$tests \
--enable-coverage=$coverage \
--enable-ftd \
--enable-ncp \
@@ -84,13 +91,22 @@
cppflags_config='-DOPENTHREAD_PROJECT_CORE_CONFIG_FILE=\"../tests/toranj/openthread-core-toranj-config.h\"'
+if [ -n "${top_builddir}" ]; then
+ top_srcdir=$(pwd)
+ mkdir -p "${top_builddir}"
+else
+ top_srcdir=.
+ top_builddir=.
+fi
+
case ${build_config} in
ncp)
echo "==================================================================================================="
echo "Building OpenThread NCP FTD mode with POSIX platform"
echo "==================================================================================================="
./bootstrap || die
- ./configure \
+ cd "${top_builddir}"
+ ${top_srcdir}/configure \
CPPFLAGS="$cppflags_config" \
--with-examples=posix \
$configure_options || die
@@ -102,14 +118,15 @@
echo "Building OpenThread RCP (NCP in radio mode) with POSIX platform"
echo "===================================================================================================="
./bootstrap || die
- ./configure \
+ cd "${top_builddir}"
+ ${top_srcdir}/configure \
CPPFLAGS="$cppflags_config" \
--enable-coverage=${coverage} \
--enable-ncp \
--enable-radio-only \
--with-examples=posix \
--disable-docs \
- --disable-tests || die
+ --enable-tests=$tests || die
make -j 8 || die
;;
@@ -118,13 +135,22 @@
echo "Building OpenThread POSIX App NCP"
echo "===================================================================================================="
./bootstrap || die
- ./configure \
- CPPFLAGS="$cppflags_config -DOPENTHREAD_CONFIG_POSIX_APP_ENABLE_PTY_DEVICE=1" \
+ cd "${top_builddir}"
+ ${top_srcdir}/configure \
+ CPPFLAGS="$cppflags_config -DOPENTHREAD_CONFIG_POSIX_APP_ENABLE_PTY_DEVICE=1 -DOPENTHREAD_POSIX_RCP_UART_ENABLE=1" \
--enable-posix-app \
$configure_options || die
make -j 8 || die
;;
+ cmake)
+ echo "===================================================================================================="
+ echo "Building OpenThread (NCP/CLI for FTD/MTD/RCP mode) with POSIX platform using cmake"
+ echo "===================================================================================================="
+ cmake -GNinja -DOT_PLATFORM=posix -DOT_CONFIG=../tests/toranj/openthread-core-toranj-config.h . || die
+ ninja || die
+ ;;
+
*)
echo "Error: Unknown configuration \"$1\""
display_usage
diff --git a/tests/toranj/openthread-core-toranj-config.h b/tests/toranj/openthread-core-toranj-config.h
index c525418..3b84958 100644
--- a/tests/toranj/openthread-core-toranj-config.h
+++ b/tests/toranj/openthread-core-toranj-config.h
@@ -34,6 +34,10 @@
*
*/
+#ifndef OPENTHREAD_RADIO
+#define OPENTHREAD_RADIO 0
+#endif
+
/**
* @def OPENTHREAD_CONFIG_PLATFORM_INFO
*
@@ -203,12 +207,12 @@
#define OPENTHREAD_CONFIG_LOG_LEVEL OT_LOG_LEVEL_INFO
/**
- * @def OPENTHREAD_CONFIG_ENABLE_DYNAMIC_LOG_LEVEL
+ * @def OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE
*
* Define as 1 to enable dynamic log level control.
*
*/
-#define OPENTHREAD_CONFIG_ENABLE_DYNAMIC_LOG_LEVEL 1
+#define OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE 1
/**
* @def OPENTHREAD_CONFIG_LOG_PREPEND_LEVEL
diff --git a/tests/toranj/start.sh b/tests/toranj/start.sh
index 311e1f9..39cbebd 100755
--- a/tests/toranj/start.sh
+++ b/tests/toranj/start.sh
@@ -77,8 +77,7 @@
cd $(dirname $0)
-# On Travis CI, the $BUILD_TARGET is defined as "toranj-test-framework".
-if [ "$BUILD_TARGET" = "toranj-test-framework" ]; then
+if [ "$COVERAGE" = 1 ]; then
coverage_option="--enable-coverage"
else
coverage_option=""
@@ -137,6 +136,10 @@
run test-032-child-attach-with-multiple-ip-addresses.py
run test-033-mesh-local-prefix-change.py
run test-034-poor-link-parent-child-attach.py
+run test-035-child-timeout-large-data-poll.py
+run test-036-wpantund-host-route-management.py
+run test-037-wpantund-auto-add-route-for-on-mesh-prefix.py
+run test-038-clear-address-cache-for-sed.py
run test-100-mcu-power-state.py
run test-600-channel-manager-properties.py
run test-601-channel-manager-channel-change.py
diff --git a/tests/toranj/test-001-get-set.py b/tests/toranj/test-001-get-set.py
index a5d3433..c8a841d 100644
--- a/tests/toranj/test-001-get-set.py
+++ b/tests/toranj/test-001-get-set.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-002-form.py b/tests/toranj/test-002-form.py
index 50db64a..f74b809 100644
--- a/tests/toranj/test-002-form.py
+++ b/tests/toranj/test-002-form.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-003-join.py b/tests/toranj/test-003-join.py
index c39dcef..114cf81 100644
--- a/tests/toranj/test-003-join.py
+++ b/tests/toranj/test-003-join.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-004-scan.py b/tests/toranj/test-004-scan.py
index 5012b3d..ff4603e 100644
--- a/tests/toranj/test-004-scan.py
+++ b/tests/toranj/test-004-scan.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-005-discover-scan.py b/tests/toranj/test-005-discover-scan.py
index 33400e0..e7074e6 100644
--- a/tests/toranj/test-005-discover-scan.py
+++ b/tests/toranj/test-005-discover-scan.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-006-traffic-router-end-device.py b/tests/toranj/test-006-traffic-router-end-device.py
index c3398d4..314e6a5 100644
--- a/tests/toranj/test-006-traffic-router-end-device.py
+++ b/tests/toranj/test-006-traffic-router-end-device.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-007-traffic-router-sleepy.py b/tests/toranj/test-007-traffic-router-sleepy.py
index b0842b8..241e291 100644
--- a/tests/toranj/test-007-traffic-router-sleepy.py
+++ b/tests/toranj/test-007-traffic-router-sleepy.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-008-permit-join.py b/tests/toranj/test-008-permit-join.py
index 3a66f74..63ded32 100644
--- a/tests/toranj/test-008-permit-join.py
+++ b/tests/toranj/test-008-permit-join.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-009-insecure-traffic-join.py b/tests/toranj/test-009-insecure-traffic-join.py
index 02c7e26..d8268c4 100644
--- a/tests/toranj/test-009-insecure-traffic-join.py
+++ b/tests/toranj/test-009-insecure-traffic-join.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-010-on-mesh-prefix-config-gateway.py b/tests/toranj/test-010-on-mesh-prefix-config-gateway.py
index eae1ac4..c096b1a 100644
--- a/tests/toranj/test-010-on-mesh-prefix-config-gateway.py
+++ b/tests/toranj/test-010-on-mesh-prefix-config-gateway.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-011-child-table.py b/tests/toranj/test-011-child-table.py
index 6a155d0..27e8d24 100644
--- a/tests/toranj/test-011-child-table.py
+++ b/tests/toranj/test-011-child-table.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-012-multi-hop-traffic.py b/tests/toranj/test-012-multi-hop-traffic.py
index eb8c350..9d8b0ba 100644
--- a/tests/toranj/test-012-multi-hop-traffic.py
+++ b/tests/toranj/test-012-multi-hop-traffic.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
@@ -130,6 +130,26 @@
NUM_MSGS = 3
MSG_LENS = [40, 100, 400, 800, 1000]
+# Wait till first router has either established a link or
+# has a valid "next hop" towards all other routers.
+
+ROUTER_TABLE_WAIT_TIME = 60 / speedup + 5
+INVALID_ROUTER_ID = 63
+
+r1_rloc = int(routers[0].get(wpan.WPAN_THREAD_RLOC16), 16)
+
+
+def check_r1_router_table():
+ router_table = wpan.parse_router_table_result(
+ routers[0].get(wpan.WPAN_THREAD_ROUTER_TABLE)
+ )
+ verify(len(router_table) == NUM_ROUTERS)
+ for entry in router_table:
+ verify(entry.rloc16 == r1_rloc or entry.is_link_established or entry.next_hop != INVALID_ROUTER_ID)
+
+
+wpan.verify_within(check_r1_router_table, ROUTER_TABLE_WAIT_TIME)
+
# Send from the first router in the chain to the last one.
src = routers[0].get(wpan.WPAN_IP6_MESH_LOCAL_ADDRESS)[1:-1]
diff --git a/tests/toranj/test-013-off-mesh-route-traffic.py b/tests/toranj/test-013-off-mesh-route-traffic.py
index 1f91fbf..3009c20 100644
--- a/tests/toranj/test-013-off-mesh-route-traffic.py
+++ b/tests/toranj/test-013-off-mesh-route-traffic.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-014-ip6-address-add.py b/tests/toranj/test-014-ip6-address-add.py
index 74cdf46..c9822d0 100644
--- a/tests/toranj/test-014-ip6-address-add.py
+++ b/tests/toranj/test-014-ip6-address-add.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-015-same-prefix-on-multiple-nodes.py b/tests/toranj/test-015-same-prefix-on-multiple-nodes.py
index 19c61e2..fcb07a4 100644
--- a/tests/toranj/test-015-same-prefix-on-multiple-nodes.py
+++ b/tests/toranj/test-015-same-prefix-on-multiple-nodes.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-016-neighbor-table.py b/tests/toranj/test-016-neighbor-table.py
index 0fdbca8..c8bac84 100644
--- a/tests/toranj/test-016-neighbor-table.py
+++ b/tests/toranj/test-016-neighbor-table.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-017-parent-reset-child-recovery.py b/tests/toranj/test-017-parent-reset-child-recovery.py
index 3d66a57..b7fec12 100644
--- a/tests/toranj/test-017-parent-reset-child-recovery.py
+++ b/tests/toranj/test-017-parent-reset-child-recovery.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-018-child-supervision.py b/tests/toranj/test-018-child-supervision.py
index 29c2a5b..5c02bb6 100644
--- a/tests/toranj/test-018-child-supervision.py
+++ b/tests/toranj/test-018-child-supervision.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-019-inform-previous-parent.py b/tests/toranj/test-019-inform-previous-parent.py
index c96097d..d88451c 100644
--- a/tests/toranj/test-019-inform-previous-parent.py
+++ b/tests/toranj/test-019-inform-previous-parent.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-020-router-table.py b/tests/toranj/test-020-router-table.py
index 961930c..0c9ac3c 100644
--- a/tests/toranj/test-020-router-table.py
+++ b/tests/toranj/test-020-router-table.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-021-address-cache-table.py b/tests/toranj/test-021-address-cache-table.py
index b2bad63..84b611d 100644
--- a/tests/toranj/test-021-address-cache-table.py
+++ b/tests/toranj/test-021-address-cache-table.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-022-multicast-ip6-address.py b/tests/toranj/test-022-multicast-ip6-address.py
index 428e731..3db89de 100644
--- a/tests/toranj/test-022-multicast-ip6-address.py
+++ b/tests/toranj/test-022-multicast-ip6-address.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-023-multicast-traffic.py b/tests/toranj/test-023-multicast-traffic.py
index ec16704..1467423 100644
--- a/tests/toranj/test-023-multicast-traffic.py
+++ b/tests/toranj/test-023-multicast-traffic.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-024-partition-merge.py b/tests/toranj/test-024-partition-merge.py
index 8e205ba..55899f0 100644
--- a/tests/toranj/test-024-partition-merge.py
+++ b/tests/toranj/test-024-partition-merge.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-025-network-data-timeout.py b/tests/toranj/test-025-network-data-timeout.py
index 602a374..2cab044 100644
--- a/tests/toranj/test-025-network-data-timeout.py
+++ b/tests/toranj/test-025-network-data-timeout.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-026-slaac-address-wpantund.py b/tests/toranj/test-026-slaac-address-wpantund.py
index 95b8cc0..ab435a7 100644
--- a/tests/toranj/test-026-slaac-address-wpantund.py
+++ b/tests/toranj/test-026-slaac-address-wpantund.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-027-child-mode-change.py b/tests/toranj/test-027-child-mode-change.py
index dbc0cb6..447e1f4 100644
--- a/tests/toranj/test-027-child-mode-change.py
+++ b/tests/toranj/test-027-child-mode-change.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-028-router-leader-reset-recovery.py b/tests/toranj/test-028-router-leader-reset-recovery.py
index 76af349..c07738e 100644
--- a/tests/toranj/test-028-router-leader-reset-recovery.py
+++ b/tests/toranj/test-028-router-leader-reset-recovery.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-029-data-poll-interval.py b/tests/toranj/test-029-data-poll-interval.py
index d2463e3..b4213e3 100644
--- a/tests/toranj/test-029-data-poll-interval.py
+++ b/tests/toranj/test-029-data-poll-interval.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2019, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-030-slaac-address-ncp.py b/tests/toranj/test-030-slaac-address-ncp.py
index 2abbf7d..c6edda1 100644
--- a/tests/toranj/test-030-slaac-address-ncp.py
+++ b/tests/toranj/test-030-slaac-address-ncp.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2019, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-031-meshcop-joiner-commissioner.py b/tests/toranj/test-031-meshcop-joiner-commissioner.py
index 30a471d..f06e560 100644
--- a/tests/toranj/test-031-meshcop-joiner-commissioner.py
+++ b/tests/toranj/test-031-meshcop-joiner-commissioner.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2019, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-032-child-attach-with-multiple-ip-addresses.py b/tests/toranj/test-032-child-attach-with-multiple-ip-addresses.py
index 5f986b5..3992b98 100644
--- a/tests/toranj/test-032-child-attach-with-multiple-ip-addresses.py
+++ b/tests/toranj/test-032-child-attach-with-multiple-ip-addresses.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2019, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-033-mesh-local-prefix-change.py b/tests/toranj/test-033-mesh-local-prefix-change.py
index bf1126f..cbf7f76 100644
--- a/tests/toranj/test-033-mesh-local-prefix-change.py
+++ b/tests/toranj/test-033-mesh-local-prefix-change.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2019, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-034-poor-link-parent-child-attach.py b/tests/toranj/test-034-poor-link-parent-child-attach.py
index a10f9ca..2bcf93c 100644
--- a/tests/toranj/test-034-poor-link-parent-child-attach.py
+++ b/tests/toranj/test-034-poor-link-parent-child-attach.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2019, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-035-child-timeout-large-data-poll.py b/tests/toranj/test-035-child-timeout-large-data-poll.py
new file mode 100644
index 0000000..6753a94
--- /dev/null
+++ b/tests/toranj/test-035-child-timeout-large-data-poll.py
@@ -0,0 +1,83 @@
+#!/usr/bin/env python3
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+
+import wpan
+import time
+
+# -----------------------------------------------------------------------------------------------------------------------
+# Test description:
+#
+# This test covers the situation where the data poll interval is set to a value larger than child's timeout interval.
+# The test verifies that the sleepy child would send a data poll within its timeout interval (ensuring hat child stays
+# in parent's child table).
+
+test_name = __file__[:-3] if __file__.endswith('.py') else __file__
+print('-' * 120)
+print('Starting \'{}\''.format(test_name))
+
+# -----------------------------------------------------------------------------------------------------------------------
+# Creating `wpan.Nodes` instances
+
+speedup = 4
+wpan.Node.set_time_speedup_factor(speedup)
+
+parent = wpan.Node()
+child = wpan.Node()
+
+# -----------------------------------------------------------------------------------------------------------------------
+# Init all nodes
+
+wpan.Node.init_all_nodes()
+
+# -----------------------------------------------------------------------------------------------------------------------
+# Test implementation
+
+parent.form("poll-timeout")
+
+TIMEOUT = 5 # Child timeout in seconds
+
+child.set(wpan.WPAN_THREAD_CHILD_TIMEOUT, str(TIMEOUT))
+
+child.set(wpan.WPAN_POLL_INTERVAL, str(5 * TIMEOUT * 1000))
+
+child.join_node(parent, node_type=wpan.JOIN_TYPE_SLEEPY_END_DEVICE)
+
+poll_count_before = int(child.get(wpan.WPAN_NCP_COUNTER_TX_PKT_DATA_POLL), 0)
+
+time.sleep(TIMEOUT * 1.1 / speedup)
+
+poll_count_after = int(child.get(wpan.WPAN_NCP_COUNTER_TX_PKT_DATA_POLL), 0)
+
+wpan.verify(poll_count_after > poll_count_before)
+
+# -----------------------------------------------------------------------------------------------------------------------
+# Test finished
+
+wpan.Node.finalize_all_nodes()
+
+print('\'{}\' passed.'.format(test_name))
diff --git a/tests/toranj/test-036-wpantund-host-route-management.py b/tests/toranj/test-036-wpantund-host-route-management.py
new file mode 100644
index 0000000..9049835
--- /dev/null
+++ b/tests/toranj/test-036-wpantund-host-route-management.py
@@ -0,0 +1,273 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+
+import wpan
+from wpan import verify
+
+# -----------------------------------------------------------------------------------------------------------------------
+# Test description:
+#
+# This test covers behavior of wpantund feature for managing of host interface routes (related to off-mesh routes
+# within the Thread network). This feature can be enabled using "Daemon:OffMeshRoute:AutoAddOnInterface" property (is
+# enabled by default).
+#
+# A route corresponding to an off-mesh route would be added on host primary interface (by wpantund),
+# if it is added by at least one (other) device within the network and
+# (a) either it is not added by host/this-device, or
+# (b) if it is also added by the device itself then
+# - filtering of self added routes is not enabled, and
+# - it is added at lower preference level.
+
+
+test_name = __file__[:-3] if __file__.endswith('.py') else __file__
+print('-' * 120)
+print('Starting \'{}\''.format(test_name))
+
+# -----------------------------------------------------------------------------------------------------------------------
+# Utility functions
+
+
+def verify_interface_routes(node, route_list):
+ """
+ This function verifies that node has the same interface routes as given by `route_list` which is an array of
+ tuples of (route, prefix_len, metric).
+ """
+ node_routes = wpan.parse_interface_routes_result(node.get(wpan.WPAN_IP6_INTERFACE_ROUTES))
+
+ verify(len(route_list) == len(node_routes))
+
+ for route in route_list:
+ for node_route in node_routes:
+ if (node_route.route_prefix, node_route.prefix_len, node_route.metric) == route:
+ break
+ else:
+ raise wpan.VerifyError(
+ 'Did not find route {} on node {}'.format(route, node)
+ )
+
+
+# -----------------------------------------------------------------------------------------------------------------------
+# Creating `wpan.Nodes` instances
+
+speedup = 4
+wpan.Node.set_time_speedup_factor(speedup)
+
+r1 = wpan.Node()
+r2 = wpan.Node()
+r3 = wpan.Node()
+c3 = wpan.Node()
+
+# -----------------------------------------------------------------------------------------------------------------------
+# Init all nodes
+
+wpan.Node.init_all_nodes()
+
+# -----------------------------------------------------------------------------------------------------------------------
+# Build network topology
+#
+# Test topology:
+#
+# r1 ---- r2
+# \ /
+# \ /
+# \ /
+# r3 ---- c3
+#
+# 3 routers, c3 is added to ensure r3 is promoted to a router quickly!
+
+
+r1.form("route-test")
+
+r1.whitelist_node(r2)
+r2.whitelist_node(r1)
+r2.join_node(r1, wpan.JOIN_TYPE_ROUTER)
+
+r3.whitelist_node(r2)
+r2.whitelist_node(r3)
+r3.join_node(r2, wpan.JOIN_TYPE_ROUTER)
+
+c3.whitelist_node(r3)
+r3.whitelist_node(c3)
+c3.join_node(r3, wpan.JOIN_TYPE_END_DEVICE)
+
+r3.whitelist_node(r1)
+r1.whitelist_node(r3)
+
+# -----------------------------------------------------------------------------------------------------------------------
+# Test implementation
+
+ROUTE1 = 'fd00:abba::'
+LEN1 = 64
+
+ROUTE2 = 'fd00:cafe:feed::'
+LEN2 = 64
+
+ROUTE3 = 'fd00:abba::'
+LEN3 = 48
+
+ROUTE4 = 'fd00:1234::'
+LEN4 = 64
+
+# Route Priority for off-mesh routes
+HIGH_PRIORITY = 1
+MEDIUM_PRIORITY = 0
+LOW_PRIORITY = -1
+
+# Host route metric mapping to off-mesh route (note lower metric value is higher priority)
+HIGH_METRIC = 1
+MEDIUM_METRIC = 256
+LOW_METRIC = 512
+
+WAIT_TIME = 10
+
+# Verify the default daemon configuration for managing host/off-mesh routes
+verify(r1.get(wpan.WPAN_DAEMON_OFF_MESH_ROUTE_AUTO_ADD_ON_INTERFACE) == 'true')
+verify(r1.get(wpan.WPAN_DAEMON_OFF_MESH_ROUTE_FILTER_SELF_AUTO_ADDED) == 'true')
+
+# Disable the auto route add on r2.
+r2.set(wpan.WPAN_DAEMON_OFF_MESH_ROUTE_AUTO_ADD_ON_INTERFACE, 'false')
+
+# Verify the host interface routes are empty when we start.
+verify_interface_routes(r1, [])
+
+# Add all 3 routes on r2.
+r2.add_route(ROUTE1, prefix_len=LEN1, priority=LOW_PRIORITY)
+r2.add_route(ROUTE2, prefix_len=LEN2, priority=MEDIUM_PRIORITY)
+r2.add_route(ROUTE3, prefix_len=LEN3, priority=HIGH_PRIORITY)
+
+
+# We expect to see all 3 routes added on r1 host interface with same priority levels as r2.
+def check_routes_on_r1_1():
+ verify_interface_routes(r1,
+ [(ROUTE1, LEN1, LOW_METRIC), (ROUTE2, LEN2, MEDIUM_METRIC), (ROUTE3, LEN3, HIGH_METRIC)])
+
+
+wpan.verify_within(check_routes_on_r1_1, WAIT_TIME)
+
+# - - - - - - - - - - - - - - - - - - - - - - - - - - - -
+
+# Add the same routes on r3 with different priorities.
+r3.add_route(ROUTE1, prefix_len=LEN1, priority=MEDIUM_PRIORITY)
+r3.add_route(ROUTE2, prefix_len=LEN2, priority=LOW_PRIORITY)
+
+
+# We expect the host interface routes on r1 to change accordingly
+def check_routes_on_r1_2():
+ route_list = [(ROUTE1, LEN1, MEDIUM_METRIC), (ROUTE2, LEN2, MEDIUM_METRIC), (ROUTE3, LEN3, HIGH_METRIC)]
+ verify_interface_routes(r1, route_list)
+
+
+wpan.verify_within(check_routes_on_r1_2, WAIT_TIME)
+verify_interface_routes(r2, [])
+
+# - - - - - - - - - - - - - - - - - - - - - - - - - - - -
+
+# Remove the previously added routes from r2.
+r2.remove_route(ROUTE1, prefix_len=LEN1)
+r2.remove_route(ROUTE2, prefix_len=LEN2)
+r2.remove_route(ROUTE3, prefix_len=LEN3)
+
+
+# We expect the host interface routes on r1 to again change accordingly:
+def check_routes_on_r1_3():
+ verify_interface_routes(r1, [(ROUTE1, LEN1, MEDIUM_METRIC), (ROUTE2, LEN2, LOW_METRIC)])
+
+
+wpan.verify_within(check_routes_on_r1_3, WAIT_TIME)
+verify_interface_routes(r2, [])
+
+# - - - - - - - - - - - - - - - - - - - - - - - - - - - -
+
+# Disable "Daemon:OffMeshRoute:FilterSelfAutoAdded" feature on wpantund.
+#
+# The route should be added on host primary interface, if it
+# is added by at least one other device within the network and,
+# (a) either it is not added by host/this-device, or
+# (b) if it is also added by device then
+# - filtering of self added routes is not enabled, and
+# - it is added at lower preference level.
+
+r1.set(wpan.WPAN_DAEMON_OFF_MESH_ROUTE_FILTER_SELF_AUTO_ADDED, 'false')
+verify(r1.get(wpan.WPAN_DAEMON_OFF_MESH_ROUTE_FILTER_SELF_AUTO_ADDED) == 'false')
+
+# Add ROUTE1 on r1 with low-priority. Since it's also present on r3 with
+# medium priority, we should still see the route on host (as medium).
+
+r1.add_route(ROUTE1, prefix_len=LEN1, priority=LOW_PRIORITY)
+
+verify_interface_routes(r1, [(ROUTE1, LEN1, MEDIUM_METRIC), (ROUTE2, LEN2, LOW_METRIC)])
+
+# Now change ROUTE1 on r1 to be same priority as on r2, now the route should
+# no longer be present on host interface routes.
+
+r1.remove_route(ROUTE1, prefix_len=LEN1)
+r1.add_route(ROUTE1, prefix_len=LEN1, priority=MEDIUM_PRIORITY)
+
+verify_interface_routes(r1, [(ROUTE2, LEN2, LOW_METRIC)])
+
+# Adding ROUTE2 with higher priority should remove it from interface routes
+r1.add_route(ROUTE2, prefix_len=LEN2, priority=MEDIUM_PRIORITY)
+
+verify_interface_routes(r1, [])
+
+# Adding a new ROUTE4 on r1 should not change anything related to interface host routes.
+r1.add_route(ROUTE4, prefix_len=LEN4, priority=MEDIUM_METRIC)
+verify_interface_routes(r1, [])
+
+# Removing ROUTE1 and ROUT2 on r1 should cause them to be added back on host
+# interface (since they are still present as off-mesh routes on r3).
+r1.remove_route(ROUTE1, prefix_len=LEN1)
+r1.remove_route(ROUTE2, prefix_len=LEN2)
+
+verify_interface_routes(r1, [(ROUTE1, LEN1, MEDIUM_METRIC), (ROUTE2, LEN2, LOW_METRIC)])
+
+verify_interface_routes(r2, [])
+
+# - - - - - - - - - - - - - - - - - - - - - - - - - - - -
+# Enable "Daemon:OffMeshRoute:FilterSelfAutoAdded" feature on wpantund.
+
+r1.set(wpan.WPAN_DAEMON_OFF_MESH_ROUTE_FILTER_SELF_AUTO_ADDED, 'true')
+verify(r1.get(wpan.WPAN_DAEMON_OFF_MESH_ROUTE_FILTER_SELF_AUTO_ADDED) == 'true')
+
+# Adding ROUTE1 with any priority should remove it from host interface routes.
+r1.add_route(ROUTE1, prefix_len=LEN1, priority=LOW_PRIORITY)
+
+verify_interface_routes(r1, [(ROUTE2, LEN2, LOW_METRIC)])
+
+r1.remove_route(ROUTE1, prefix_len=LEN1)
+
+verify_interface_routes(r1, [(ROUTE1, LEN1, MEDIUM_METRIC), (ROUTE2, LEN2, LOW_METRIC)])
+
+verify_interface_routes(r2, [])
+
+# -----------------------------------------------------------------------------------------------------------------------
+# Test finished
+
+wpan.Node.finalize_all_nodes()
+
+print('\'{}\' passed.'.format(test_name))
diff --git a/tests/toranj/test-037-wpantund-auto-add-route-for-on-mesh-prefix.py b/tests/toranj/test-037-wpantund-auto-add-route-for-on-mesh-prefix.py
new file mode 100644
index 0000000..5cc259e
--- /dev/null
+++ b/tests/toranj/test-037-wpantund-auto-add-route-for-on-mesh-prefix.py
@@ -0,0 +1,219 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+
+import wpan
+from wpan import verify
+
+# -----------------------------------------------------------------------------------------------------------------------
+# Test description:
+#
+# This test covers behavior of wpantund feature for managing of host interface routes (related to on-mesh prefixes
+# within the Thread network).
+#
+# When enabled, wpantund would add a route on host primary interface for any prefix from thread network (with on-mesh
+# flag set). This in turn ensures that traffic destined to an IPv6 address matching the prefix would be correctly
+# forwarded to the `wpan` interface on host.
+
+test_name = __file__[:-3] if __file__.endswith('.py') else __file__
+print('-' * 120)
+print('Starting \'{}\''.format(test_name))
+
+# -----------------------------------------------------------------------------------------------------------------------
+# Utility functions
+
+
+def verify_interface_routes(node, route_list):
+ """
+ This function verifies that node has the same interface routes as given by `route_list` which is an array of
+ tuples of (route, prefix_len, metric).
+ """
+ node_routes = wpan.parse_interface_routes_result(node.get(wpan.WPAN_IP6_INTERFACE_ROUTES))
+
+ verify(len(route_list) == len(node_routes))
+
+ for route in route_list:
+ for node_route in node_routes:
+ if (node_route.route_prefix, node_route.prefix_len, node_route.metric) == route:
+ break
+ else:
+ raise wpan.VerifyError(
+ 'Did not find route {} on node {}'.format(route, node)
+ )
+
+
+# -----------------------------------------------------------------------------------------------------------------------
+# Creating `wpan.Nodes` instances
+
+speedup = 4
+wpan.Node.set_time_speedup_factor(speedup)
+
+r1 = wpan.Node()
+r2 = wpan.Node()
+c2 = wpan.Node()
+
+# -----------------------------------------------------------------------------------------------------------------------
+# Init all nodes
+
+wpan.Node.init_all_nodes()
+
+# -----------------------------------------------------------------------------------------------------------------------
+# Build network topology
+#
+
+r1.form("prefix-route")
+
+r1.whitelist_node(r2)
+r2.whitelist_node(r1)
+r2.join_node(r1, wpan.JOIN_TYPE_ROUTER)
+
+c2.whitelist_node(r2)
+r2.whitelist_node(c2)
+c2.join_node(r2, wpan.JOIN_TYPE_END_DEVICE)
+
+# -----------------------------------------------------------------------------------------------------------------------
+# Test implementation
+
+PREFIX1 = 'fd00:abba::'
+ADDRESS1 = PREFIX1 + '1'
+LEN1 = 64
+
+PREFIX2 = 'fd00:cafe:feed::'
+LEN2 = 64
+
+PREFIX3 = 'fd00:1234::'
+LEN3 = 64
+
+ROUTE4 = 'fd00:1234::'
+LEN4 = 48
+
+ROUTE5 = 'fd00:beef::'
+LEN5 = 64
+
+MEDIUM_METRIC = 256
+MEDIUM_PRIORITY = 0
+
+WAIT_TIME = 10
+
+# Verify the default daemon configuration
+verify(r1.get(wpan.WPAN_DAEMON_ON_MESH_PREFIX_AUTO_ADD_AS_INTERFACE_ROUTE) == 'true')
+
+r1.set(wpan.WPAN_DAEMON_OFF_MESH_ROUTE_AUTO_ADD_ON_INTERFACE, 'false')
+verify(r1.get(wpan.WPAN_DAEMON_OFF_MESH_ROUTE_AUTO_ADD_ON_INTERFACE) == 'false')
+
+# Add on-mesh prefixes 1, 2, and 3 and off-mesh route 5 on r2.
+r2.add_prefix(PREFIX1, prefix_len=LEN1, on_mesh=True, slaac=False)
+r2.add_prefix(PREFIX2, prefix_len=LEN2, on_mesh=True, slaac=True)
+r2.add_prefix(PREFIX3, prefix_len=LEN2, on_mesh=False, slaac=False)
+r2.add_route(ROUTE5, prefix_len=LEN5, priority=MEDIUM_PRIORITY)
+
+
+# We expect to only see routes associated the first two (which are on-mesh) on r1.
+def check_routes_on_r1_is_prefix1_and_prefix2():
+ verify_interface_routes(r1, [(PREFIX1, LEN1, MEDIUM_METRIC), (PREFIX2, LEN2, MEDIUM_METRIC)])
+
+
+wpan.verify_within(check_routes_on_r1_is_prefix1_and_prefix2, WAIT_TIME)
+
+# Remove all prefixes
+r2.remove_prefix(PREFIX1, prefix_len=LEN1)
+r2.remove_prefix(PREFIX2, prefix_len=LEN2)
+r2.remove_prefix(PREFIX3, prefix_len=LEN2)
+r2.remove_route(ROUTE5, prefix_len=LEN5)
+
+
+# We expect all associated routes to be removed on r1
+def check_routes_on_r1_is_empty():
+ verify_interface_routes(r1, [])
+
+
+wpan.verify_within(check_routes_on_r1_is_empty, WAIT_TIME)
+
+# - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
+# Test behavior when an address with same prefix in already added on the interface
+
+r1.add_ip6_address_on_interface(ADDRESS1, prefix_len=LEN1)
+r2.add_prefix(PREFIX1, prefix_len=LEN1, on_mesh=True, slaac=False)
+
+
+def check_routes_on_r1_is_only_prefix1():
+ verify_interface_routes(r1, [(PREFIX1, LEN1, MEDIUM_METRIC)])
+
+
+wpan.verify_within(check_routes_on_r1_is_only_prefix1, WAIT_TIME)
+
+r1.remove_ip6_address_on_interface(ADDRESS1, prefix_len=LEN1)
+wpan.verify_within(check_routes_on_r1_is_only_prefix1, WAIT_TIME)
+
+r2.remove_prefix(PREFIX1, prefix_len=LEN1)
+
+wpan.verify_within(check_routes_on_r1_is_empty, WAIT_TIME)
+
+# - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
+# Test behavior when we have similar route and prefix (different prefix_len)
+
+r1.set(wpan.WPAN_DAEMON_OFF_MESH_ROUTE_AUTO_ADD_ON_INTERFACE, 'true')
+verify(r1.get(wpan.WPAN_DAEMON_OFF_MESH_ROUTE_AUTO_ADD_ON_INTERFACE) == 'true')
+
+
+r2.add_route(ROUTE5, prefix_len=LEN5, priority=MEDIUM_PRIORITY)
+r2.add_route(ROUTE4, prefix_len=LEN4, priority=MEDIUM_PRIORITY)
+r1.add_prefix(PREFIX3, prefix_len=LEN3, on_mesh=True, slaac=False)
+
+
+def check_routes_on_r1_is_prefix3_route4_and_route5():
+ route_list = [(PREFIX3, LEN3, MEDIUM_METRIC), (ROUTE4, LEN4, MEDIUM_METRIC), (ROUTE5, LEN5, MEDIUM_METRIC)]
+ verify_interface_routes(r1, route_list)
+
+
+wpan.verify_within(check_routes_on_r1_is_prefix3_route4_and_route5, WAIT_TIME)
+
+r2.remove_route(ROUTE5, prefix_len=LEN5)
+r1.remove_prefix(PREFIX3, prefix_len=LEN3)
+
+
+def check_routes_on_r1_is_only_route4():
+ verify_interface_routes(r1, [(ROUTE4, LEN4, MEDIUM_METRIC)])
+
+
+wpan.verify_within(check_routes_on_r1_is_only_route4, WAIT_TIME)
+
+# - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
+# Test behavior when feature is disabled
+
+r1.set(wpan.WPAN_DAEMON_ON_MESH_PREFIX_AUTO_ADD_AS_INTERFACE_ROUTE, 'false')
+verify(r1.get(wpan.WPAN_DAEMON_ON_MESH_PREFIX_AUTO_ADD_AS_INTERFACE_ROUTE) == 'false')
+
+r1.add_prefix(PREFIX3, prefix_len=LEN3, on_mesh=True, slaac=False)
+wpan.verify_within(check_routes_on_r1_is_only_route4, WAIT_TIME)
+
+# -----------------------------------------------------------------------------------------------------------------------
+# Test finished
+
+wpan.Node.finalize_all_nodes()
+
+print('\'{}\' passed.'.format(test_name))
diff --git a/tests/toranj/test-038-clear-address-cache-for-sed.py b/tests/toranj/test-038-clear-address-cache-for-sed.py
new file mode 100644
index 0000000..706a4ed
--- /dev/null
+++ b/tests/toranj/test-038-clear-address-cache-for-sed.py
@@ -0,0 +1,212 @@
+#!/usr/bin/env python3
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+
+import wpan
+from wpan import verify
+
+# -----------------------------------------------------------------------------------------------------------------------
+# Test description: Address Cache Table
+#
+# This test verifies that address cache entry associated with a SED child
+# addresses is removed from new parent node ensuring we would not have a
+# routing loop.
+
+test_name = __file__[:-3] if __file__.endswith('.py') else __file__
+print('-' * 120)
+print('Starting \'{}\''.format(test_name))
+
+# -----------------------------------------------------------------------------------------------------------------------
+# Creating `wpan.Nodes` instances
+
+speedup = 4
+wpan.Node.set_time_speedup_factor(speedup)
+
+r1 = wpan.Node()
+r2 = wpan.Node()
+r3 = wpan.Node()
+c = wpan.Node()
+c3 = wpan.Node()
+
+# -----------------------------------------------------------------------------------------------------------------------
+# Init all nodes
+
+wpan.Node.init_all_nodes()
+
+# -----------------------------------------------------------------------------------------------------------------------
+# Build network topology
+#
+# r3 ---- r1 ---- r2
+# | |
+# | |
+# c3 c
+#
+# c is initially attached to r2 but it switches parent during test to r1 and then r3
+# c3 is just added to make sure r3 become router quickly (not involved in test)
+
+PREFIX = "fd00:1234::"
+POLL_INTERVAL = 400
+
+r1.form("addr-cache")
+
+r1.add_prefix(PREFIX, stable=True, on_mesh=True, slaac=True, preferred=True)
+
+r1.whitelist_node(r2)
+r2.whitelist_node(r1)
+r2.join_node(r1, wpan.JOIN_TYPE_ROUTER)
+
+c.set(wpan.WPAN_POLL_INTERVAL, str(POLL_INTERVAL))
+c.whitelist_node(r2)
+r2.whitelist_node(c)
+c.join_node(r2, wpan.JOIN_TYPE_SLEEPY_END_DEVICE)
+
+r3.whitelist_node(r1)
+r1.whitelist_node(r3)
+r3.join_node(r1, wpan.JOIN_TYPE_ROUTER)
+
+c3.whitelist_node(r3)
+r3.whitelist_node(c3)
+c3.join_node(r3, wpan.JOIN_TYPE_END_DEVICE)
+
+# -----------------------------------------------------------------------------------------------------------------------
+# Test implementation
+#
+
+ROUTER_TABLE_WAIT_TIME = 30 / speedup + 5
+
+INVALID_ROUTER_ID = 63
+
+verify(r1.get(wpan.WPAN_NODE_TYPE) == wpan.NODE_TYPE_LEADER)
+verify(r2.get(wpan.WPAN_NODE_TYPE) == wpan.NODE_TYPE_ROUTER)
+verify(r3.get(wpan.WPAN_NODE_TYPE) == wpan.NODE_TYPE_ROUTER)
+verify(c.get(wpan.WPAN_NODE_TYPE) == wpan.NODE_TYPE_SLEEPY_END_DEVICE)
+verify(c3.get(wpan.WPAN_NODE_TYPE) == wpan.NODE_TYPE_END_DEVICE)
+
+r1_address = r1.find_ip6_address_with_prefix(PREFIX)
+r2_address = r2.find_ip6_address_with_prefix(PREFIX)
+c_address = c.find_ip6_address_with_prefix(PREFIX)
+
+# Send a single UDP message from r1 to c
+#
+# This adds an address cache entry on r1 for c pointing to r2 (the current parent of c).
+
+sender = r1.prepare_tx(r1_address, c_address, "Hi from r1 to c")
+recver = c.prepare_rx(sender)
+wpan.Node.perform_async_tx_rx()
+verify(sender.was_successful and recver.was_successful)
+
+
+# Force c to switch its parent from r2 to r1
+#
+# r3 ---- r1 ---- r2
+# | |
+# | |
+# c3 c
+
+CHILD_SUPERVISION_CHECK_TIMEOUT = 2
+PARENT_SUPERVISION_INTERVAL = 1
+
+REATTACH_WAIT_TIME = CHILD_SUPERVISION_CHECK_TIMEOUT / speedup + 6
+
+c.set(wpan.WPAN_CHILD_SUPERVISION_CHECK_TIMEOUT, str(CHILD_SUPERVISION_CHECK_TIMEOUT))
+r2.set(wpan.WPAN_CHILD_SUPERVISION_INTERVAL, str(PARENT_SUPERVISION_INTERVAL))
+r1.set(wpan.WPAN_CHILD_SUPERVISION_INTERVAL, str(PARENT_SUPERVISION_INTERVAL))
+r3.set(wpan.WPAN_CHILD_SUPERVISION_INTERVAL, str(PARENT_SUPERVISION_INTERVAL))
+
+r2.un_whitelist_node(c)
+r1.whitelist_node(c)
+c.whitelist_node(r1)
+
+# Wait for c to detach from r2 and attach to r1.
+
+
+def check_c_is_removed_from_r2_child_table():
+ child_table = wpan.parse_list(r2.get(wpan.WPAN_THREAD_CHILD_TABLE))
+ verify(len(child_table) == 0)
+
+
+wpan.verify_within(check_c_is_removed_from_r2_child_table, REATTACH_WAIT_TIME)
+
+# check that c is now a child of r1
+child_table = wpan.parse_list(r1.get(wpan.WPAN_THREAD_CHILD_TABLE))
+verify(len(child_table) == 1)
+
+# Send a single UDP message from r2 to c
+#
+# This adds an address cache entry on r2 for c pointing to r1 (the current parent of c).
+
+sender = r2.prepare_tx(r2_address, c_address, "Hi from r2 to c")
+recver = c.prepare_rx(sender)
+wpan.Node.perform_async_tx_rx()
+verify(sender.was_successful and recver.was_successful)
+
+
+# Force c to switch its parent from r1 to r3
+#
+# r3 ---- r1 ---- r2
+# | \
+# | \
+# c3 c
+
+r1.un_whitelist_node(c)
+r3.whitelist_node(c)
+c.whitelist_node(r3)
+
+# Wait for c to detach from r1 and attach to r3.
+
+
+def check_c_is_removed_from_r1_child_table():
+ child_table = wpan.parse_list(r1.get(wpan.WPAN_THREAD_CHILD_TABLE))
+ verify(len(child_table) == 0)
+
+
+wpan.verify_within(check_c_is_removed_from_r1_child_table, REATTACH_WAIT_TIME)
+
+
+# check that c is now a child of r3 (r3 should have two child, c and c3)
+child_table = wpan.parse_list(r3.get(wpan.WPAN_THREAD_CHILD_TABLE))
+verify(len(child_table) == 2)
+
+# Send a single UDP message from r1 to c
+#
+# If the r1 address cache entry is not cleared when c attached to r1,
+# r1 will still have an entry pointing to r2, and r2 will have an entry
+# pointing to r1, thus creating a loop (the msg will not be delivered to r3)
+
+
+sender = r1.prepare_tx(r1_address, c_address, "Hi from r1 to c")
+recver = c.prepare_rx(sender)
+wpan.Node.perform_async_tx_rx()
+verify(sender.was_successful and recver.was_successful)
+
+
+# -----------------------------------------------------------------------------------------------------------------------
+# Test finished
+
+wpan.Node.finalize_all_nodes()
+
+print('\'{}\' passed.'.format(test_name))
diff --git a/tests/toranj/test-100-mcu-power-state.py b/tests/toranj/test-100-mcu-power-state.py
index ec232ec..db5aa62 100644
--- a/tests/toranj/test-100-mcu-power-state.py
+++ b/tests/toranj/test-100-mcu-power-state.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-600-channel-manager-properties.py b/tests/toranj/test-600-channel-manager-properties.py
index 2016fdd..8e9f72d 100644
--- a/tests/toranj/test-600-channel-manager-properties.py
+++ b/tests/toranj/test-600-channel-manager-properties.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-601-channel-manager-channel-change.py b/tests/toranj/test-601-channel-manager-channel-change.py
index d7a3632..561aa30 100644
--- a/tests/toranj/test-601-channel-manager-channel-change.py
+++ b/tests/toranj/test-601-channel-manager-channel-change.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-602-channel-manager-channel-select.py b/tests/toranj/test-602-channel-manager-channel-select.py
index d0996b4..253ce03 100644
--- a/tests/toranj/test-602-channel-manager-channel-select.py
+++ b/tests/toranj/test-602-channel-manager-channel-select.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-603-channel-manager-announce-recovery.py b/tests/toranj/test-603-channel-manager-announce-recovery.py
index 3712b2e..381f68f 100644
--- a/tests/toranj/test-603-channel-manager-announce-recovery.py
+++ b/tests/toranj/test-603-channel-manager-announce-recovery.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/test-nnn-template.py b/tests/toranj/test-nnn-template.py
index 0a4e6b4..d8ec956 100644
--- a/tests/toranj/test-nnn-template.py
+++ b/tests/toranj/test-nnn-template.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
diff --git a/tests/toranj/wpan.py b/tests/toranj/wpan.py
index b16889a..3eee1ec 100644
--- a/tests/toranj/wpan.py
+++ b/tests/toranj/wpan.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
@@ -65,6 +65,11 @@
WPAN_IP6_MESH_LOCAL_PREFIX = "IPv6:MeshLocalPrefix"
WPAN_IP6_ALL_ADDRESSES = "IPv6:AllAddresses"
WPAN_IP6_MULTICAST_ADDRESSES = "IPv6:MulticastAddresses"
+WPAN_IP6_INTERFACE_ROUTES = "IPv6:Routes"
+
+WPAN_DAEMON_OFF_MESH_ROUTE_AUTO_ADD_ON_INTERFACE = "Daemon:OffMeshRoute:AutoAddOnInterface"
+WPAN_DAEMON_OFF_MESH_ROUTE_FILTER_SELF_AUTO_ADDED = "Daemon:OffMeshRoute:FilterSelfAutoAdded"
+WPAN_DAEMON_ON_MESH_PREFIX_AUTO_ADD_AS_INTERFACE_ROUTE = "Daemon:OnMeshPrefix:AutoAddAsInterfaceRoute"
WPAN_THREAD_RLOC16 = "Thread:RLOC16"
WPAN_THREAD_ROUTER_ID = "Thread:RouterID"
@@ -1569,3 +1574,49 @@
""" Parses address cache table list string and returns an array of `AddressCacheEntry` objects"""
return [AddressCacheEntry(item)
for item in addr_cache_table_list.split('\n')[1:-1]]
+
+# - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
+
+
+class InterfaceRoute(object):
+ """ This object encapsulates an interface route entry"""
+
+ def __init__(self, text):
+
+ # Example of expected text:
+ #
+ # '\t"fd00:abba::/64 metric:256 "'
+ #
+
+ # We get rid of the first two chars `\t"' and last char '"', split the rest using whitespace as separator.
+ # Then remove any ',' at end of items in the list.
+ items = [
+ item[:-1] if item[-1] == ',' else item
+ for item in text[2:-1].split()
+ ]
+
+ # First item in the extended address
+ self._route_prefix = items[0].split('/')[0]
+ self._prefix_len = int(items[0].split('/')[1], 0)
+ self._metric = int(items[1].split(':')[1], 0)
+
+ @property
+ def route_prefix(self):
+ return self._route_prefix
+
+ @property
+ def prefix_len(self):
+ return self._prefix_len
+
+ @property
+ def metric(self):
+ return self._metric
+
+ def __repr__(self):
+ return 'InterfaceRoute({})'.format(self.__dict__)
+
+
+def parse_interface_routes_result(interface_routes_list):
+ """ Parses interface routes list string and returns an array of `InterfaceRoute` objects"""
+ return [InterfaceRoute(item)
+ for item in interface_routes_list.split('\n')[1:-1]]
diff --git a/tests/unit/Makefile.am b/tests/unit/Makefile.am
index e18ef30..2e18605 100644
--- a/tests/unit/Makefile.am
+++ b/tests/unit/Makefile.am
@@ -51,6 +51,8 @@
AM_CPPFLAGS = \
-DOPENTHREAD_FTD=1 \
+ -DOPENTHREAD_MTD=0 \
+ -DOPENTHREAD_RADIO=0 \
-I$(top_srcdir)/include \
-I$(top_srcdir)/src \
-I$(top_srcdir)/src/core \
@@ -110,17 +112,16 @@
test-hmac-sha256 \
test-ip6-address \
test-link-quality \
+ test-linked-list \
test-lowpan \
test-mac-frame \
test-message \
test-message-queue \
+ test-netif \
test-network-data \
test-priority-queue \
test-pskc \
test-string \
- test-strlcat \
- test-strlcpy \
- test-strnlen \
test-timer \
$(NULL)
@@ -158,76 +159,75 @@
top_srcdir='$(top_srcdir)' \
$(NULL)
+COMMON_SOURCES = test_platform.cpp test_util.cpp
+
# Source, compiler, and linker options for test programs.
test_aes_LDADD = $(COMMON_LDADD)
-test_aes_SOURCES = test_platform.cpp test_aes.cpp
+test_aes_SOURCES = $(COMMON_SOURCES) test_aes.cpp
test_child_LDADD = $(COMMON_LDADD)
-test_child_SOURCES = test_platform.cpp test_child.cpp
+test_child_SOURCES = $(COMMON_SOURCES) test_child.cpp
test_child_table_LDADD = $(COMMON_LDADD)
-test_child_table_SOURCES = test_platform.cpp test_child_table.cpp
+test_child_table_SOURCES = $(COMMON_SOURCES) test_child_table.cpp
test_hdlc_LDADD = $(COMMON_LDADD)
-test_hdlc_SOURCES = test_platform.cpp test_hdlc.cpp
+test_hdlc_SOURCES = $(COMMON_SOURCES) test_hdlc.cpp
test_heap_LDADD = $(COMMON_LDADD)
-test_heap_SOURCES = test_platform.cpp test_heap.cpp
+test_heap_SOURCES = $(COMMON_SOURCES) test_heap.cpp
test_hmac_sha256_LDADD = $(COMMON_LDADD)
-test_hmac_sha256_SOURCES = test_platform.cpp test_hmac_sha256.cpp
+test_hmac_sha256_SOURCES = $(COMMON_SOURCES) test_hmac_sha256.cpp
test_ip6_address_LDADD = $(COMMON_LDADD)
-test_ip6_address_SOURCES = test_platform.cpp test_ip6_address.cpp
+test_ip6_address_SOURCES = $(COMMON_SOURCES) test_ip6_address.cpp
test_link_quality_LDADD = $(COMMON_LDADD)
-test_link_quality_SOURCES = test_platform.cpp test_link_quality.cpp
+test_link_quality_SOURCES = $(COMMON_SOURCES) test_link_quality.cpp
+
+test_linked_list_LDADD = $(COMMON_LDADD)
+test_linked_list_SOURCES = $(COMMON_SOURCES) test_linked_list.cpp
test_lowpan_LDADD = $(COMMON_LDADD)
-test_lowpan_SOURCES = test_platform.cpp test_lowpan.cpp test_util.cpp
+test_lowpan_SOURCES = $(COMMON_SOURCES) test_lowpan.cpp
test_mac_frame_LDADD = $(COMMON_LDADD)
-test_mac_frame_SOURCES = test_platform.cpp test_mac_frame.cpp
+test_mac_frame_SOURCES = $(COMMON_SOURCES) test_mac_frame.cpp
test_message_LDADD = $(COMMON_LDADD)
-test_message_SOURCES = test_platform.cpp test_message.cpp
+test_message_SOURCES = $(COMMON_SOURCES) test_message.cpp
test_message_queue_LDADD = $(COMMON_LDADD)
-test_message_queue_SOURCES = test_platform.cpp test_message_queue.cpp
+test_message_queue_SOURCES = $(COMMON_SOURCES) test_message_queue.cpp
test_ncp_buffer_LDADD = $(COMMON_LDADD)
-test_ncp_buffer_SOURCES = test_platform.cpp test_ncp_buffer.cpp
+test_ncp_buffer_SOURCES = $(COMMON_SOURCES) test_ncp_buffer.cpp
+
+test_netif_LDADD = $(COMMON_LDADD)
+test_netif_SOURCES = $(COMMON_SOURCES) test_netif.cpp
test_network_data_LDADD = $(COMMON_LDADD)
-test_network_data_SOURCES = test_platform.cpp test_network_data.cpp
+test_network_data_SOURCES = $(COMMON_SOURCES) test_network_data.cpp
test_priority_queue_LDADD = $(COMMON_LDADD)
-test_priority_queue_SOURCES = test_platform.cpp test_priority_queue.cpp
+test_priority_queue_SOURCES = $(COMMON_SOURCES) test_priority_queue.cpp
test_pskc_LDADD = $(COMMON_LDADD)
-test_pskc_SOURCES = test_platform.cpp test_pskc.cpp
+test_pskc_SOURCES = $(COMMON_SOURCES) test_pskc.cpp
test_string_LDADD = $(COMMON_LDADD)
-test_string_SOURCES = test_platform.cpp test_string.cpp
-
-test_strlcat_LDADD = $(COMMON_LDADD)
-test_strlcat_SOURCES = test_strlcat.c
-
-test_strlcpy_LDADD = $(COMMON_LDADD)
-test_strlcpy_SOURCES = test_strlcpy.c
-
-test_strnlen_LDADD = $(COMMON_LDADD)
-test_strnlen_SOURCES = test_strnlen.c
+test_string_SOURCES = $(COMMON_SOURCES) test_string.cpp
test_spinel_decoder_LDADD = $(COMMON_LDADD)
-test_spinel_decoder_SOURCES = test_platform.cpp test_spinel_decoder.cpp
+test_spinel_decoder_SOURCES = $(COMMON_SOURCES) test_spinel_decoder.cpp
test_spinel_encoder_LDADD = $(COMMON_LDADD)
-test_spinel_encoder_SOURCES = test_platform.cpp test_spinel_encoder.cpp
+test_spinel_encoder_SOURCES = $(COMMON_SOURCES) test_spinel_encoder.cpp
test_timer_LDADD = $(COMMON_LDADD)
-test_timer_SOURCES = test_platform.cpp test_timer.cpp
+test_timer_SOURCES = $(COMMON_SOURCES) test_timer.cpp
test_toolchain_LDADD = $(NULL)
test_toolchain_SOURCES = test_toolchain.cpp test_toolchain_c.c
@@ -242,20 +242,19 @@
$(test_heap_SOURCES) \
$(test_hmac_sha256_SOURCES) \
$(test_link_quality_SOURCES) \
+ $(test_linked_list_SOURCES) \
$(test_lowpan_SOURCES) \
$(test_mac_frame_SOURCES) \
$(test_message_queue_SOURCES) \
$(test_message_SOURCES) \
$(test_ncp_buffer_SOURCES) \
+ $(test_netif_SOURCES) \
$(test_network_data_SOURCES) \
$(test_priority_queue_SOURCES) \
$(test_pskc_SOURCES) \
$(test_spinel_decoder_SOURCES) \
$(test_spinel_encoder_SOURCES) \
$(test_string_SOURCES) \
- $(test_strlcat_SOURCES) \
- $(test_strlcpy_SOURCES) \
- $(test_strnlen_SOURCES) \
$(test_timer_SOURCES) \
$(test_toolchain_SOURCES) \
$(NULL)
diff --git a/tests/unit/test_address_sanitizer.cpp b/tests/unit/test_address_sanitizer.cpp
index 4e520dc..fd3985d 100644
--- a/tests/unit/test_address_sanitizer.cpp
+++ b/tests/unit/test_address_sanitizer.cpp
@@ -30,7 +30,6 @@
#include "test_util.h"
-#ifdef ENABLE_TEST_MAIN
int main(int argc, char *argv[])
{
(void)argv;
@@ -46,4 +45,3 @@
return 0;
}
-#endif
diff --git a/tests/unit/test_aes.cpp b/tests/unit/test_aes.cpp
index c42bc9d..b8027af 100644
--- a/tests/unit/test_aes.cpp
+++ b/tests/unit/test_aes.cpp
@@ -30,7 +30,6 @@
#include "common/debug.hpp"
#include "crypto/aes_ccm.hpp"
-#include "utils/wrap_string.h"
#include "test_platform.h"
#include "test_util.h"
@@ -134,7 +133,6 @@
VerifyOrQuit(memcmp(test, decrypted, sizeof(decrypted)) == 0, "TestMacCommandFrame decrypt failed\n");
}
-#ifdef ENABLE_TEST_MAIN
int main(void)
{
TestMacBeaconFrame();
@@ -142,4 +140,3 @@
printf("All tests passed\n");
return 0;
}
-#endif
diff --git a/tests/unit/test_child.cpp b/tests/unit/test_child.cpp
index 52074f8..06ac801 100644
--- a/tests/unit/test_child.cpp
+++ b/tests/unit/test_child.cpp
@@ -54,7 +54,7 @@
for (uint8_t index = 0; index < aAddressListLength; index++)
{
- VerifyOrQuit(aChild.HasIp6Address(*sInstance, aAddressList[index]), "HasIp6Address() failed\n");
+ VerifyOrQuit(aChild.HasIp6Address(*sInstance, aAddressList[index]), "HasIp6Address() failed");
}
memset(addressObserved, 0, sizeof(addressObserved));
@@ -81,18 +81,18 @@
}
}
- VerifyOrQuit(addressIsInList, "Child::GetNextIp6Address() returned an address not in the expected list\n");
+ VerifyOrQuit(addressIsInList, "Child::GetNextIp6Address() returned an address not in the expected list");
}
for (uint8_t index = 0; index < aAddressListLength; index++)
{
- VerifyOrQuit(addressObserved[index], "Child::GetNextIp6Address() missed an entry from the expected list\n");
+ VerifyOrQuit(addressObserved[index], "Child::GetNextIp6Address() missed an entry from the expected list");
if (sInstance->Get<Mle::MleRouter>().IsMeshLocalAddress(aAddressList[index]))
{
SuccessOrQuit(aChild.GetMeshLocalIp6Address(*sInstance, address),
"Child::GetMeshLocalIp6Address() failed\n");
- VerifyOrQuit(address == aAddressList[index], "GetMeshLocalIp6Address() did not return expected address\n");
+ VerifyOrQuit(address == aAddressList[index], "GetMeshLocalIp6Address() did not return expected address");
hasMeshLocal = true;
}
}
@@ -100,7 +100,7 @@
if (!hasMeshLocal)
{
VerifyOrQuit(aChild.GetMeshLocalIp6Address(*sInstance, address) == OT_ERROR_NOT_FOUND,
- "Child::GetMeshLocalIp6Address() returned an address not in the exptect list\n");
+ "Child::GetMeshLocalIp6Address() returned an address not in the expected list");
}
}
@@ -143,7 +143,7 @@
//- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
printf("Child state after init");
- memset(&child, 0, sizeof(child));
+ child.Clear();
VerifyChildIp6Addresses(child, 0, NULL);
printf(" -- PASS\n");
@@ -258,11 +258,9 @@
} // namespace ot
-#ifdef ENABLE_TEST_MAIN
int main(void)
{
ot::TestChildIp6Address();
printf("\nAll tests passed.\n");
return 0;
}
-#endif
diff --git a/tests/unit/test_child_table.cpp b/tests/unit/test_child_table.cpp
index f33589e..056362f 100644
--- a/tests/unit/test_child_table.cpp
+++ b/tests/unit/test_child_table.cpp
@@ -51,12 +51,12 @@
otExtAddress mExtAddress;
};
-const ChildTable::StateFilter kAllFilters[] = {
- ChildTable::kInStateValid,
- ChildTable::kInStateValidOrRestoring,
- ChildTable::kInStateChildIdRequest,
- ChildTable::kInStateValidOrAttaching,
- ChildTable::kInStateAnyExceptInvalid,
+const Child::StateFilter kAllFilters[] = {
+ Child::kInStateValid,
+ Child::kInStateValidOrRestoring,
+ Child::kInStateChildIdRequest,
+ Child::kInStateValidOrAttaching,
+ Child::kInStateAnyExceptInvalid,
};
// Checks whether a `Child` matches the `TestChild` struct.
@@ -66,8 +66,8 @@
(aChild.GetExtAddress() == static_cast<const Mac::ExtAddress &>(aTestChild.mExtAddress));
}
-// Checks whether a `Child::State` matches a `ChildTable::StateFilter`.
-static bool StateMatchesFilter(Child::State aState, ChildTable::StateFilter aFilter)
+// Checks whether a `Child::State` matches a `Child::StateFilter`.
+static bool StateMatchesFilter(Child::State aState, Child::StateFilter aFilter)
{
bool rval = false;
Child child;
@@ -76,27 +76,27 @@
switch (aFilter)
{
- case ChildTable::kInStateAnyExceptInvalid:
+ case Child::kInStateAnyExceptInvalid:
rval = (aState != Child::kStateInvalid);
break;
- case ChildTable::kInStateValid:
+ case Child::kInStateValid:
rval = (aState == Child::kStateValid);
break;
- case ChildTable::kInStateValidOrRestoring:
+ case Child::kInStateValidOrRestoring:
rval = child.IsStateValidOrRestoring();
break;
- case ChildTable::kInStateChildIdRequest:
+ case Child::kInStateChildIdRequest:
rval = (aState == Child::kStateChildIdRequest);
break;
- case ChildTable::kInStateValidOrAttaching:
+ case Child::kInStateValidOrAttaching:
rval = child.IsStateValidOrAttaching();
break;
- case ChildTable::kInStateAnyExceptValidOrRestoring:
+ case Child::kInStateAnyExceptValidOrRestoring:
rval = !child.IsStateValidOrRestoring();
break;
}
@@ -111,7 +111,7 @@
for (uint16_t k = 0; k < OT_ARRAY_LENGTH(kAllFilters); k++)
{
- ChildTable::StateFilter filter = kAllFilters[k];
+ Child::StateFilter filter = kAllFilters[k];
// Verify that we can find all children from given list by rloc or extended address.
@@ -152,7 +152,7 @@
if (listIndex < aChildListLength)
{
- startingChild = aTable.FindChild(aChildList[listIndex].mRloc16, ChildTable::kInStateAnyExceptInvalid);
+ startingChild = aTable.FindChild(aChildList[listIndex].mRloc16, Child::kInStateAnyExceptInvalid);
VerifyOrQuit(startingChild != NULL, "FindChild() failed");
}
@@ -316,7 +316,7 @@
for (uint16_t i = 0; i < OT_ARRAY_LENGTH(kAllFilters); i++)
{
- ChildTable::StateFilter filter = kAllFilters[i];
+ Child::StateFilter filter = kAllFilters[i];
VerifyOrQuit(table->HasChildren(filter) == false, "HasChildren() failed after init");
VerifyOrQuit(table->GetNumChildren(filter) == 0, "GetNumChildren() failed after init");
@@ -402,11 +402,9 @@
} // namespace ot
-#ifdef ENABLE_TEST_MAIN
int main(void)
{
ot::TestChildTable();
printf("\nAll tests passed.\n");
return 0;
}
-#endif
diff --git a/tests/unit/test_hdlc.cpp b/tests/unit/test_hdlc.cpp
index 22d31af..a478531 100644
--- a/tests/unit/test_hdlc.cpp
+++ b/tests/unit/test_hdlc.cpp
@@ -517,7 +517,7 @@
uint32_t GetRandom(uint32_t max)
{
- return rand() % max;
+ return static_cast<uint32_t>(rand()) % max;
}
void TestFuzzEncoderDecoder(void)
@@ -571,7 +571,6 @@
} // namespace Ncp
} // namespace ot
-#ifdef ENABLE_TEST_MAIN
int main(void)
{
ot::Ncp::TestHdlcFrameBuffer();
@@ -581,4 +580,3 @@
printf("\nAll tests passed.\n");
return 0;
}
-#endif
diff --git a/tests/unit/test_heap.cpp b/tests/unit/test_heap.cpp
index 81fe90a..f95a6b2 100644
--- a/tests/unit/test_heap.cpp
+++ b/tests/unit/test_heap.cpp
@@ -34,7 +34,6 @@
#include "common/debug.hpp"
#include "crypto/aes_ccm.hpp"
-#include "utils/wrap_string.h"
#include "test_platform.h"
#include "test_util.h"
@@ -51,19 +50,19 @@
{
void *p = heap.CAlloc(1, 0);
- VerifyOrQuit(p == NULL && totalSize == heap.GetFreeSize(), "TestAllocateSingle allocate 1 x 0 byte failed!\n");
+ VerifyOrQuit(p == NULL && totalSize == heap.GetFreeSize(), "TestAllocateSingle allocate 1 x 0 byte failed!");
heap.Free(p);
p = heap.CAlloc(0, 1);
- VerifyOrQuit(p == NULL && totalSize == heap.GetFreeSize(), "TestAllocateSingle allocate 0 x 1 byte failed!\n");
+ VerifyOrQuit(p == NULL && totalSize == heap.GetFreeSize(), "TestAllocateSingle allocate 0 x 1 byte failed!");
heap.Free(p);
}
for (size_t size = 1; size <= heap.GetCapacity(); ++size)
{
- Log("%s allocating %zu bytes...", __func__, size);
+ printf("%s allocating %zu bytes...\n", __func__, size);
void *p = heap.CAlloc(1, size);
- VerifyOrQuit(p != NULL && !heap.IsClean() && heap.GetFreeSize() + size <= totalSize, "allocating failed!\n");
+ VerifyOrQuit(p != NULL && !heap.IsClean() && heap.GetFreeSize() + size <= totalSize, "allocating failed!");
memset(p, 0xff, size);
heap.Free(p);
VerifyOrQuit(heap.IsClean() && heap.GetFreeSize() == totalSize, "freeing failed!\n");
@@ -97,7 +96,7 @@
do
{
size_t size = sizeof(Node) + static_cast<size_t>(rand()) % aSizeLimit;
- Log("TestAllocateRandomly allocating %zu bytes...", size);
+ printf("TestAllocateRandomly allocating %zu bytes...\n", size);
last->mNext = static_cast<Node *>(heap.CAlloc(1, size));
// No more memory for allocation.
@@ -106,7 +105,7 @@
break;
}
- VerifyOrQuit(last->mNext->mNext == NULL, "TestAllocateRandomly memory not initialized to zero!\n");
+ VerifyOrQuit(last->mNext->mNext == NULL, "TestAllocateRandomly memory not initialized to zero!");
last = last->mNext;
last->mSize = size;
++nnodes;
@@ -126,7 +125,7 @@
}
Node *curr = prev->mNext;
- Log("TestAllocateRandomly freeing %zu bytes...", curr->mSize);
+ printf("TestAllocateRandomly freeing %zu bytes...\n", curr->mSize);
prev->mNext = curr->mNext;
heap.Free(curr);
@@ -144,13 +143,13 @@
while (last)
{
Node *next = last->mNext;
- Log("TestAllocateRandomly freeing %zu bytes...", last->mSize);
+ printf("TestAllocateRandomly freeing %zu bytes...\n", last->mSize);
heap.Free(last);
last = next;
}
VerifyOrQuit(heap.IsClean() && heap.GetFreeSize() == totalSize,
- "TestAllocateRandomly heap not clean after freeing all!\n");
+ "TestAllocateRandomly heap not clean after freeing all!");
}
/**
@@ -161,7 +160,7 @@
for (unsigned int seed = 0; seed < 10; ++seed)
{
size_t sizeLimit = (1 << seed);
- Log("TestAllocateRandomly(%zu, %u)...", sizeLimit, seed);
+ printf("TestAllocateRandomly(%zu, %u)...\n", sizeLimit, seed);
TestAllocateRandomly(sizeLimit, seed);
}
}
@@ -172,11 +171,9 @@
TestAllocateMultiple();
}
-#ifdef ENABLE_TEST_MAIN
int main(void)
{
RunTimerTests();
printf("All tests passed\n");
return 0;
}
-#endif
diff --git a/tests/unit/test_hmac_sha256.cpp b/tests/unit/test_hmac_sha256.cpp
index 729e5c6..35fcb58 100644
--- a/tests/unit/test_hmac_sha256.cpp
+++ b/tests/unit/test_hmac_sha256.cpp
@@ -30,7 +30,6 @@
#include "common/debug.hpp"
#include "crypto/hmac_sha256.hpp"
-#include "utils/wrap_string.h"
#include "test_platform.h"
#include "test_util.h"
@@ -73,18 +72,16 @@
hmac.Update(reinterpret_cast<const uint8_t *>(tests[i].data), static_cast<uint16_t>(strlen(tests[i].data)));
hmac.Finish(hash);
- VerifyOrQuit(memcmp(hash, tests[i].hash, sizeof(tests[i].hash)) == 0, "HMAC-SHA-256 failed\n");
+ VerifyOrQuit(memcmp(hash, tests[i].hash, sizeof(tests[i].hash)) == 0, "HMAC-SHA-256 failed");
}
}
testFreeInstance(instance);
}
-#ifdef ENABLE_TEST_MAIN
int main(void)
{
TestHmacSha256();
printf("All tests passed\n");
return 0;
}
-#endif
diff --git a/tests/unit/test_ip6_address.cpp b/tests/unit/test_ip6_address.cpp
index bda0029..ffbf854 100644
--- a/tests/unit/test_ip6_address.cpp
+++ b/tests/unit/test_ip6_address.cpp
@@ -27,7 +27,6 @@
*/
#include "net/ip6_address.hpp"
-#include "utils/wrap_string.h"
#include "test_util.h"
@@ -44,12 +43,12 @@
error = address.FromString(aTestVector->mString);
- VerifyOrQuit(error == aTestVector->mError, "Ip6::Address::FromString returned unexpected error code\n");
+ VerifyOrQuit(error == aTestVector->mError, "Ip6::Address::FromString returned unexpected error code");
if (error == OT_ERROR_NONE)
{
VerifyOrQuit(0 == memcmp(address.mFields.m8, aTestVector->mAddr, OT_IP6_ADDRESS_SIZE),
- "Ip6::Address::FromString parsing failed\n");
+ "Ip6::Address::FromString parsing failed");
}
}
@@ -204,11 +203,9 @@
}
}
-#ifdef ENABLE_TEST_MAIN
int main(void)
{
TestIp6AddressFromString();
printf("All tests passed\n");
return 0;
}
-#endif
diff --git a/tests/unit/test_link_quality.cpp b/tests/unit/test_link_quality.cpp
index 39d30cb..f352f2c 100644
--- a/tests/unit/test_link_quality.cpp
+++ b/tests/unit/test_link_quality.cpp
@@ -28,7 +28,6 @@
#include "common/code_utils.hpp"
#include "thread/link_quality.hpp"
-#include "utils/wrap_string.h"
#include "test_platform.h"
#include "test_util.h"
@@ -486,7 +485,6 @@
} // namespace ot
-#ifdef ENABLE_TEST_MAIN
int main(void)
{
ot::TestRssAveraging();
@@ -495,4 +493,3 @@
printf("\nAll tests passed\n");
return 0;
}
-#endif
diff --git a/tests/unit/test_linked_list.cpp b/tests/unit/test_linked_list.cpp
new file mode 100644
index 0000000..2a13a78
--- /dev/null
+++ b/tests/unit/test_linked_list.cpp
@@ -0,0 +1,160 @@
+/*
+ * Copyright (c) 2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <stdarg.h>
+
+#include "test_platform.h"
+
+#include <openthread/config.h>
+
+#include "common/debug.hpp"
+#include "common/instance.hpp"
+#include "common/linked_list.hpp"
+
+#include "test_util.h"
+
+struct EntryBase
+{
+ EntryBase *mNext;
+};
+
+struct Entry : public EntryBase, ot::LinkedListEntry<Entry>
+{
+};
+
+// This function verifies the content of the linked list matches a given list of entries.
+void VerifyLinkedListContent(const ot::LinkedList<Entry> &aList, ...)
+{
+ va_list args;
+ Entry * argEntry;
+ Entry * argPrev = NULL;
+
+ va_start(args, aList);
+
+ for (const Entry *entry = aList.GetHead(); entry; entry = entry->GetNext())
+ {
+ Entry *prev;
+
+ argEntry = va_arg(args, Entry *);
+ VerifyOrQuit(argEntry != NULL, "List contains more entries than expected");
+ VerifyOrQuit(argEntry == entry, "List does not contain the same entry");
+ VerifyOrQuit(aList.Contains(*argEntry), "List::Contains() failed");
+
+ SuccessOrQuit(aList.Find(*argEntry, prev), "List::Find() failed");
+ VerifyOrQuit(prev == argPrev, "List::Find() returned prev entry is incorrect");
+
+ argPrev = argEntry;
+ }
+
+ argEntry = va_arg(args, Entry *);
+ VerifyOrQuit(argEntry == NULL, "List contains less entries than expected");
+
+ VerifyOrQuit(aList.GetTail() == argPrev, "List::GetTail() failed");
+}
+
+void TestLinkedList(void)
+{
+ Entry a, b, c, d, e;
+ ot::LinkedList<Entry> list;
+
+ VerifyOrQuit(list.IsEmpty(), "LinkedList::IsEmpty() failed after init");
+ VerifyOrQuit(list.GetHead() == NULL, "LinkedList::GetHead() failed after init");
+ VerifyOrQuit(list.Pop() == NULL, "LinkedList::Pop() failed when empty");
+
+ VerifyLinkedListContent(list, NULL);
+
+ list.Push(a);
+ VerifyOrQuit(!list.IsEmpty(), "LinkedList::IsEmpty() failed");
+ VerifyLinkedListContent(list, &a, NULL);
+
+ SuccessOrQuit(list.Add(b), "LinkedList::Add() failed");
+ VerifyLinkedListContent(list, &b, &a, NULL);
+
+ list.Push(c);
+ VerifyLinkedListContent(list, &c, &b, &a, NULL);
+
+ SuccessOrQuit(list.Add(d), "LinkedList::Add() failed");
+ VerifyLinkedListContent(list, &d, &c, &b, &a, NULL);
+
+ SuccessOrQuit(list.Add(e), "LinkedList::Add() failed");
+ VerifyLinkedListContent(list, &e, &d, &c, &b, &a, NULL);
+
+ VerifyOrQuit(list.Add(a) == OT_ERROR_ALREADY, "LinkedList::Add() did not detect duplicate");
+ VerifyOrQuit(list.Add(b) == OT_ERROR_ALREADY, "LinkedList::Add() did not detect duplicate");
+ VerifyOrQuit(list.Add(d) == OT_ERROR_ALREADY, "LinkedList::Add() did not detect duplicate");
+ VerifyOrQuit(list.Add(e) == OT_ERROR_ALREADY, "LinkedList::Add() did not detect duplicate");
+
+ VerifyOrQuit(list.Pop() == &e, "LinkedList::Pop() failed");
+ VerifyLinkedListContent(list, &d, &c, &b, &a, NULL);
+
+ list.SetHead(&e);
+ VerifyLinkedListContent(list, &e, &d, &c, &b, &a, NULL);
+
+ SuccessOrQuit(list.Remove(c), "LinkedList::Remove() failed");
+ VerifyLinkedListContent(list, &e, &d, &b, &a, NULL);
+
+ VerifyOrQuit(list.Remove(c) == OT_ERROR_NOT_FOUND, "LinkedList::Remove() failed");
+ VerifyLinkedListContent(list, &e, &d, &b, &a, NULL);
+
+ SuccessOrQuit(list.Remove(e), "LinkedList::Remove() failed");
+ VerifyLinkedListContent(list, &d, &b, &a, NULL);
+
+ SuccessOrQuit(list.Remove(a), "LinkedList::Remove() failed");
+ VerifyLinkedListContent(list, &d, &b, NULL);
+
+ list.Push(a);
+ list.Push(c);
+ list.Push(e);
+ VerifyLinkedListContent(list, &e, &c, &a, &d, &b, NULL);
+
+ VerifyOrQuit(list.PopAfter(a) == &d, "LinkedList::PopAfter() failed");
+ VerifyLinkedListContent(list, &e, &c, &a, &b, NULL);
+
+ VerifyOrQuit(list.PopAfter(b) == NULL, "LinkedList::PopAfter() failed");
+ VerifyLinkedListContent(list, &e, &c, &a, &b, NULL);
+
+ VerifyOrQuit(list.PopAfter(e) == &c, "LinkedList::PopAfter() failed");
+ VerifyLinkedListContent(list, &e, &a, &b, NULL);
+
+ list.PushAfter(c, b);
+ VerifyLinkedListContent(list, &e, &a, &b, &c, NULL);
+
+ list.PushAfter(d, a);
+ VerifyLinkedListContent(list, &e, &a, &d, &b, &c, NULL);
+
+ list.Clear();
+ VerifyOrQuit(list.IsEmpty(), "LinkedList::IsEmpty() failed after Clear()");
+ VerifyLinkedListContent(list, NULL);
+}
+
+int main(void)
+{
+ TestLinkedList();
+ printf("All tests passed\n");
+ return 0;
+}
diff --git a/tests/unit/test_lowpan.cpp b/tests/unit/test_lowpan.cpp
index 0375f8b..1eb8772 100644
--- a/tests/unit/test_lowpan.cpp
+++ b/tests/unit/test_lowpan.cpp
@@ -99,7 +99,7 @@
"6lo: Message::Append failed");
}
- SuccessOrQuit(aMessage.Append(mPayload.mData, mPayload.mLength), "6lo: Message::Append failed5");
+ SuccessOrQuit(aMessage.Append(mPayload.mData, mPayload.mLength), "6lo: Message::Append failed");
}
/**
@@ -167,13 +167,8 @@
printf("LOWPAN_IPHC length ---------- %d\n", aVector.mIphcHeader.mLength);
printf("IPv6 uncompressed offset ---- %d\n\n", aVector.mPayloadOffset);
- printf("Expected IPv6 uncompressed packet: \n");
- otTestPrintHex(ip6, ip6Length);
- printf("\n");
-
- printf("Expected LOWPAN_IPHC compressed frame: \n");
- otTestPrintHex(iphc, iphcLength);
- printf("\n");
+ DumpBuffer("Expected IPv6 uncompressed packet", ip6, ip6Length);
+ DumpBuffer("Expected LOWPAN_IPHC compressed frame", iphc, iphcLength);
if (aCompress)
{
@@ -194,9 +189,8 @@
// Append payload to the LOWPAN_IPHC.
message->Read(message->GetOffset(), message->GetLength() - message->GetOffset(), result + compressBytes);
- printf("Resulted LOWPAN_IPHC compressed frame: \n");
- otTestPrintHex(result, compressBytes + message->GetLength() - message->GetOffset());
- printf("\n");
+ DumpBuffer("Resulted LOWPAN_IPHC compressed frame", result,
+ compressBytes + message->GetLength() - message->GetOffset());
VerifyOrQuit(compressBytes == aVector.mIphcHeader.mLength, "6lo: Lowpan::Compress failed");
VerifyOrQuit(message->GetOffset() == aVector.mPayloadOffset, "6lo: Lowpan::Compress failed");
@@ -223,9 +217,8 @@
memcpy(result + message->GetLength(), iphc + decompressedBytes,
iphcLength - static_cast<uint16_t>(decompressedBytes));
- printf("Resulted IPv6 uncompressed packet: \n");
- otTestPrintHex(result, message->GetLength() + iphcLength - decompressedBytes);
- printf("\n");
+ DumpBuffer("Resulted IPv6 uncompressed packet", result,
+ message->GetLength() + iphcLength - decompressedBytes);
VerifyOrQuit(decompressedBytes == aVector.mIphcHeader.mLength, "6lo: Lowpan::Decompress failed");
VerifyOrQuit(message->GetOffset() == aVector.mPayloadOffset, "6lo: Lowpan::Decompress failed");
@@ -1839,14 +1832,204 @@
testFreeInstance(sInstance);
}
+void TestLowpanMeshHeader(void)
+{
+ enum
+ {
+ kMaxFrameSize = 127,
+ kSourceAddr = 0x100,
+ kDestAddr = 0x200,
+ };
+
+ const uint8_t kMeshHeader1[] = {0xb1, 0x01, 0x00, 0x02, 0x00}; // src:0x100, dest:0x200, hop:0x1
+ const uint8_t kMeshHeader2[] = {0xbf, 0x20, 0x01, 0x00, 0x02, 0x00}; // src:0x100, dest:0x200, hop:0x20
+ const uint8_t kMeshHeader3[] = {0xbf, 0x01, 0x01, 0x00, 0x02, 0x00}; // src:0x100, dest:0x200, hop:0x1 (deepHops)
+
+ uint8_t frame[kMaxFrameSize];
+ uint16_t length;
+ uint16_t headerLength;
+ Lowpan::MeshHeader meshHeader;
+
+ meshHeader.Init(kSourceAddr, kDestAddr, 1);
+ VerifyOrQuit(meshHeader.GetSource() == kSourceAddr, "MeshHeader::GetSource() failed after Init()");
+ VerifyOrQuit(meshHeader.GetDestination() == kDestAddr, "MeshHeader::GetDestination() failed after Init()");
+ VerifyOrQuit(meshHeader.GetHopsLeft() == 1, "MeshHeader::GetHopsLeft() failed after Init()");
+
+ length = meshHeader.WriteTo(frame);
+ VerifyOrQuit(length == meshHeader.GetHeaderLength(), "MeshHeader::GetHeaderLength() failed");
+ VerifyOrQuit(length == sizeof(kMeshHeader1), "MeshHeader::WriteTo() returned length is incorrect");
+ VerifyOrQuit(memcmp(frame, kMeshHeader1, length) == 0, "MeshHeader::WriteTo() failed");
+
+ memset(&meshHeader, 0, sizeof(meshHeader));
+ VerifyOrQuit(Lowpan::MeshHeader::IsMeshHeader(frame, length), "IsMeshHeader() failed");
+ SuccessOrQuit(meshHeader.ParseFrom(frame, length, headerLength), "MeshHeader::ParseFrom() failed");
+ VerifyOrQuit(headerLength == length, "MeshHeader::ParseFrom() returned length is incorrect");
+ VerifyOrQuit(meshHeader.GetSource() == kSourceAddr, "MeshHeader::GetSource() failed after ParseFrom()");
+ VerifyOrQuit(meshHeader.GetDestination() == kDestAddr, "MeshHeader::GetDestination() failed after ParseFrom()");
+ VerifyOrQuit(meshHeader.GetHopsLeft() == 1, "MeshHeader::GetHopsLeft() failed after ParseFrom()");
+
+ VerifyOrQuit(meshHeader.ParseFrom(frame, length - 1, headerLength) == OT_ERROR_PARSE,
+ "MeshHeader::ParseFrom() did not fail with incorrect length");
+
+ //- - - - - - - - - - - - - - - - - - - - - - - - - -
+
+ meshHeader.Init(kSourceAddr, kDestAddr, 0x20);
+ VerifyOrQuit(meshHeader.GetSource() == kSourceAddr, "MeshHeader::GetSource() failed after Init()");
+ VerifyOrQuit(meshHeader.GetDestination() == kDestAddr, "MeshHeader::GetDestination() failed after Init()");
+ VerifyOrQuit(meshHeader.GetHopsLeft() == 0x20, "MeshHeader::GetHopsLeft() failed after Init()");
+
+ length = meshHeader.WriteTo(frame);
+ VerifyOrQuit(length == sizeof(kMeshHeader2), "MeshHeader::WriteTo() returned length is incorrect");
+ VerifyOrQuit(length == meshHeader.GetHeaderLength(), "MeshHeader::GetHeaderLength() failed");
+ VerifyOrQuit(memcmp(frame, kMeshHeader2, length) == 0, "MeshHeader::WriteTo() failed");
+
+ memset(&meshHeader, 0, sizeof(meshHeader));
+ VerifyOrQuit(Lowpan::MeshHeader::IsMeshHeader(frame, length), "IsMeshHeader() failed");
+ SuccessOrQuit(meshHeader.ParseFrom(frame, length, headerLength), "MeshHeader::ParseFrom() failed");
+ VerifyOrQuit(headerLength == length, "MeshHeader::ParseFrom() returned length is incorrect");
+ VerifyOrQuit(meshHeader.GetSource() == kSourceAddr, "MeshHeader::GetSource() failed after ParseFrom()");
+ VerifyOrQuit(meshHeader.GetDestination() == kDestAddr, "MeshHeader::GetDestination() failed after ParseFrom()");
+ VerifyOrQuit(meshHeader.GetHopsLeft() == 0x20, "MeshHeader::GetHopsLeft() failed after ParseFrom()");
+
+ VerifyOrQuit(meshHeader.ParseFrom(frame, length - 1, headerLength) == OT_ERROR_PARSE,
+ "MeshHeader::ParseFrom() did not fail with incorrect length");
+
+ //- - - - - - - - - - - - - - - - - - - - - - - - - -
+
+ SuccessOrQuit(meshHeader.ParseFrom(kMeshHeader3, sizeof(kMeshHeader3), headerLength),
+ "MeshHeader::ParseFrom() failed");
+ VerifyOrQuit(headerLength == sizeof(kMeshHeader3), "MeshHeader::ParseFrom() returned length is incorrect");
+ VerifyOrQuit(meshHeader.GetSource() == kSourceAddr, "MeshHeader::GetSource() failed after Init()");
+ VerifyOrQuit(meshHeader.GetDestination() == kDestAddr, "MeshHeader::GetDestination() failed after Init()");
+ VerifyOrQuit(meshHeader.GetHopsLeft() == 1, "MeshHeader::GetHopsLeft() failed after Init()");
+
+ VerifyOrQuit(meshHeader.WriteTo(frame) == sizeof(kMeshHeader1), "MeshHeader::WriteTo() failed");
+
+ VerifyOrQuit(meshHeader.ParseFrom(kMeshHeader3, sizeof(kMeshHeader3) - 1, headerLength) == OT_ERROR_PARSE,
+ "MeshHeader::ParseFrom() did not fail with incorrect length");
+}
+
+void TestLowpanFragmentHeader(void)
+{
+ enum
+ {
+ kMaxFrameSize = 127,
+ kSize = 0x7ef,
+ kTag = 0x1234,
+ kOffset = (100 * 8),
+ };
+
+ const uint8_t kFragHeader1[] = {0xc7, 0xef, 0x12, 0x34}; // size:0x7ef, tag:0x1234, offset:0 (first frag)
+ const uint8_t kFragHeader2[] = {0xe7, 0xef, 0x12, 0x34, 0x64}; // size:0x7ef, tag:0x1234, offset:100 (next frag)
+ const uint8_t kFragHeader3[] = {0xe7, 0xef, 0x12, 0x34, 0x00}; // size:0x7ef, tag:0x1234, offset:0 (next frag)
+
+ const uint8_t kInvalidFragHeader1[] = {0xe8, 0xef, 0x12, 0x34, 0x64};
+ const uint8_t kInvalidFragHeader2[] = {0xd0, 0xef, 0x12, 0x34, 0x64};
+ const uint8_t kInvalidFragHeader3[] = {0x90, 0xef, 0x12, 0x34, 0x64};
+
+ uint8_t frame[kMaxFrameSize];
+ uint16_t length;
+ uint16_t headerLength;
+ Lowpan::FragmentHeader fragHeader;
+
+ fragHeader.InitFirstFragment(kSize, kTag);
+ VerifyOrQuit(fragHeader.GetDatagramSize() == kSize, "FragmentHeader::GetDatagramSize() failed after Init");
+ VerifyOrQuit(fragHeader.GetDatagramTag() == kTag, "FragmentHeader::GetDatagramTag() failed after Init()");
+ VerifyOrQuit(fragHeader.GetDatagramOffset() == 0, "FragmentHeader::GetDatagramOffset() failed after Init()");
+
+ length = fragHeader.WriteTo(frame);
+ VerifyOrQuit(length == Lowpan::FragmentHeader::kFirstFragmentHeaderSize,
+ "FragmentHeader::WriteTo() returned length is incorrect");
+ VerifyOrQuit(length == sizeof(kFragHeader1), "FragmentHeader::WriteTo() returned length is incorrect");
+ VerifyOrQuit(memcmp(frame, kFragHeader1, length) == 0, "FragmentHeader::WriteTo() failed");
+
+ memset(&fragHeader, 0, sizeof(fragHeader));
+ VerifyOrQuit(Lowpan::FragmentHeader::IsFragmentHeader(frame, length), "IsFragmentHeader() failed");
+ SuccessOrQuit(fragHeader.ParseFrom(frame, length, headerLength), "FragmentHeader::ParseFrom() failed");
+ VerifyOrQuit(headerLength == length, "FragmentHeader::ParseFrom() returned length is incorrect");
+ VerifyOrQuit(fragHeader.GetDatagramSize() == kSize, "FragmentHeader::GetDatagramSize() failed after ParseFrom()");
+ VerifyOrQuit(fragHeader.GetDatagramTag() == kTag, "FragmentHeader::GetDatagramTag() failed after ParseFrom()");
+ VerifyOrQuit(fragHeader.GetDatagramOffset() == 0, "FragmentHeader::GetDatagramOffset() failed after ParseFrom()");
+
+ VerifyOrQuit(fragHeader.ParseFrom(frame, length - 1, headerLength) == OT_ERROR_PARSE,
+ "FragmentHeader::ParseFrom() did not fail with incorrect length");
+
+ //- - - - - - - - - - - - - - - - - - - - - - - - - -
+
+ fragHeader.Init(kSize, kTag, kOffset);
+ VerifyOrQuit(fragHeader.GetDatagramSize() == kSize, "FragmentHeader::GetDatagramSize() failed after Init");
+ VerifyOrQuit(fragHeader.GetDatagramTag() == kTag, "FragmentHeader::GetDatagramTag() failed after Init()");
+ VerifyOrQuit(fragHeader.GetDatagramOffset() == kOffset, "FragmentHeader::GetDatagramOffset() failed after Init()");
+
+ // Check the truncation of offset (to be multiple of 8).
+ fragHeader.Init(kSize, kTag, kOffset + 1);
+ VerifyOrQuit(fragHeader.GetDatagramOffset() == kOffset, "FragmentHeader::GetDatagramOffset() did not truncate");
+ fragHeader.Init(kSize, kTag, kOffset + 7);
+ VerifyOrQuit(fragHeader.GetDatagramOffset() == kOffset, "FragmentHeader::GetDatagramOffset() did not truncate");
+
+ length = fragHeader.WriteTo(frame);
+ VerifyOrQuit(length == Lowpan::FragmentHeader::kSubsequentFragmentHeaderSize,
+ "FragmentHeader::WriteTo() returned length is incorrect");
+ VerifyOrQuit(length == sizeof(kFragHeader2), "FragmentHeader::WriteTo() returned length is incorrect");
+ VerifyOrQuit(memcmp(frame, kFragHeader2, length) == 0, "FragmentHeader::WriteTo() failed");
+
+ memset(&fragHeader, 0, sizeof(fragHeader));
+ VerifyOrQuit(Lowpan::FragmentHeader::IsFragmentHeader(frame, length), "IsFragmentHeader() failed");
+ SuccessOrQuit(fragHeader.ParseFrom(frame, length, headerLength), "FragmentHeader::ParseFrom() failed");
+ VerifyOrQuit(headerLength == length, "FragmentHeader::ParseFrom() returned length is incorrect");
+ VerifyOrQuit(fragHeader.GetDatagramSize() == kSize, "FragmentHeader::GetDatagramSize() failed after ParseFrom()");
+ VerifyOrQuit(fragHeader.GetDatagramTag() == kTag, "FragmentHeader::GetDatagramTag() failed after ParseFrom()");
+ VerifyOrQuit(fragHeader.GetDatagramOffset() == kOffset,
+ "FragmentHeader::GetDatagramOffset() failed after ParseFrom()");
+
+ VerifyOrQuit(fragHeader.ParseFrom(frame, length - 1, headerLength) == OT_ERROR_PARSE,
+ "FragmentHeader::ParseFrom() did not fail with incorrect length");
+
+ //- - - - - - - - - - - - - - - - - - - - - - - - - -
+
+ length = sizeof(kFragHeader3);
+ memcpy(frame, kFragHeader3, length);
+ SuccessOrQuit(fragHeader.ParseFrom(frame, length, headerLength), "FragmentHeader::ParseFrom() failed");
+ VerifyOrQuit(headerLength == length, "FragmentHeader::ParseFrom() returned length is incorrect");
+ VerifyOrQuit(fragHeader.GetDatagramSize() == kSize, "FragmentHeader::GetDatagramSize() failed after ParseFrom()");
+ VerifyOrQuit(fragHeader.GetDatagramTag() == kTag, "FragmentHeader::GetDatagramTag() failed after ParseFrom()");
+ VerifyOrQuit(fragHeader.GetDatagramOffset() == 0, "FragmentHeader::GetDatagramOffset() failed after ParseFrom()");
+
+ VerifyOrQuit(fragHeader.ParseFrom(frame, length - 1, headerLength) == OT_ERROR_PARSE,
+ "FragmentHeader::ParseFrom() did not fail with incorrect length");
+
+ //- - - - - - - - - - - - - - - - - - - - - - - - - -
+
+ length = sizeof(kInvalidFragHeader1);
+ memcpy(frame, kInvalidFragHeader1, length);
+ VerifyOrQuit(!Lowpan::FragmentHeader::IsFragmentHeader(frame, length),
+ "IsFragmentHeader() did not detect invalid header");
+ VerifyOrQuit(fragHeader.ParseFrom(frame, length, headerLength) != OT_ERROR_NONE,
+ "FragmentHeader::ParseFrom() did not fail with invalid header");
+
+ length = sizeof(kInvalidFragHeader2);
+ memcpy(frame, kInvalidFragHeader2, length);
+ VerifyOrQuit(!Lowpan::FragmentHeader::IsFragmentHeader(frame, length),
+ "IsFragmentHeader() did not detect invalid header");
+ VerifyOrQuit(fragHeader.ParseFrom(frame, length, headerLength) != OT_ERROR_NONE,
+ "FragmentHeader::ParseFrom() did not fail with invalid header");
+
+ length = sizeof(kInvalidFragHeader3);
+ memcpy(frame, kInvalidFragHeader3, length);
+ VerifyOrQuit(!Lowpan::FragmentHeader::IsFragmentHeader(frame, length),
+ "IsFragmentHeader() did not detect invalid header");
+ VerifyOrQuit(fragHeader.ParseFrom(frame, length, headerLength) != OT_ERROR_NONE,
+ "FragmentHeader::ParseFrom() did not fail with invalid header");
+}
+
} // namespace ot
-#ifdef ENABLE_TEST_MAIN
int main(void)
{
TestLowpanIphc();
+ TestLowpanMeshHeader();
+ TestLowpanFragmentHeader();
printf("All tests passed\n");
return 0;
}
-#endif
diff --git a/tests/unit/test_lowpan.hpp b/tests/unit/test_lowpan.hpp
index d7380b8..ae76982 100644
--- a/tests/unit/test_lowpan.hpp
+++ b/tests/unit/test_lowpan.hpp
@@ -72,7 +72,7 @@
* @param aAddress Pointer to the long MAC address.
*
*/
- void SetMacSource(const uint8_t *aAddress) { mMacSource.SetExtended(aAddress, /* reverse */ false); }
+ void SetMacSource(const uint8_t *aAddress) { mMacSource.SetExtended(aAddress); }
/**
* This method sets short MAC source address.
@@ -88,7 +88,7 @@
* @param aAddress Pointer to the long MAC address.
*
*/
- void SetMacDestination(const uint8_t *aAddress) { mMacDestination.SetExtended(aAddress, /* reverse */ false); }
+ void SetMacDestination(const uint8_t *aAddress) { mMacDestination.SetExtended(aAddress); }
/**
* This method sets short MAC destination address.
@@ -109,12 +109,12 @@
* @param aDestination String represents IPv6 destination address.
*
*/
- void SetIpHeader(uint32_t aVersionClassFlow,
- uint16_t aPayloadLength,
- Ip6::IpProto aNextHeader,
- uint8_t aHopLimit,
- const char * aSource,
- const char * aDestination)
+ void SetIpHeader(uint32_t aVersionClassFlow,
+ uint16_t aPayloadLength,
+ uint8_t aNextHeader,
+ uint8_t aHopLimit,
+ const char *aSource,
+ const char *aDestination)
{
mIpHeader.Init(aVersionClassFlow);
mIpHeader.SetPayloadLength(aPayloadLength);
@@ -135,12 +135,12 @@
* @param aDestination String represents IPv6 destination address.
*
*/
- void SetIpTunneledHeader(uint32_t aVersionClassFlow,
- uint16_t aPayloadLength,
- Ip6::IpProto aNextHeader,
- uint8_t aHopLimit,
- const char * aSource,
- const char * aDestination)
+ void SetIpTunneledHeader(uint32_t aVersionClassFlow,
+ uint16_t aPayloadLength,
+ uint8_t aNextHeader,
+ uint8_t aHopLimit,
+ const char *aSource,
+ const char *aDestination)
{
mIpTunneledHeader.Init(aVersionClassFlow);
mIpTunneledHeader.SetPayloadLength(aPayloadLength);
diff --git a/tests/unit/test_mac_frame.cpp b/tests/unit/test_mac_frame.cpp
index 6946de4..e573645 100644
--- a/tests/unit/test_mac_frame.cpp
+++ b/tests/unit/test_mac_frame.cpp
@@ -31,12 +31,205 @@
#include "mac/mac.hpp"
#include "mac/mac_frame.hpp"
#include "radio/radio.hpp"
-#include "utils/wrap_string.h"
+#include "test_platform.h"
#include "test_util.h"
namespace ot {
+bool CompareReversed(const uint8_t *aFirst, const uint8_t *aSecond, uint16_t aLength)
+{
+ bool matches = true;
+
+ for (uint16_t i = 0; i < aLength; i++)
+ {
+ if (aFirst[i] != aSecond[aLength - 1 - i])
+ {
+ matches = false;
+ break;
+ }
+ }
+
+ return matches;
+}
+
+void TestMacAddress(void)
+{
+ const uint8_t kExtAddr[OT_EXT_ADDRESS_SIZE] = {0x12, 0x34, 0x56, 0x78, 0x9a, 0xbc, 0xde, 0xf0};
+ const Mac::ShortAddress kShortAddr = 0x1234;
+
+ ot::Instance * instance;
+ Mac::Address addr;
+ Mac::ExtAddress extAddr;
+ uint8_t buffer[OT_EXT_ADDRESS_SIZE];
+
+ instance = testInitInstance();
+ VerifyOrQuit(instance != NULL, "NULL instance\n");
+
+ // Mac::ExtAddress
+
+ extAddr.GenerateRandom();
+ VerifyOrQuit(extAddr.IsLocal(), "Random Extended Address should have its Local bit set");
+ VerifyOrQuit(!extAddr.IsGroup(), "Random Extended Address should not have its Group bit set");
+
+ extAddr.CopyTo(buffer);
+ VerifyOrQuit(memcmp(extAddr.m8, buffer, OT_EXT_ADDRESS_SIZE) == 0, "ExtAddress::CopyTo() failed");
+
+ extAddr.CopyTo(buffer, Mac::ExtAddress::kReverseByteOrder);
+ VerifyOrQuit(CompareReversed(extAddr.m8, buffer, OT_EXT_ADDRESS_SIZE), "ExtAddress::CopyTo() failed");
+
+ extAddr.Set(kExtAddr);
+ VerifyOrQuit(memcmp(extAddr.m8, kExtAddr, OT_EXT_ADDRESS_SIZE) == 0, "ExtAddress::Set() failed");
+
+ extAddr.Set(kExtAddr, Mac::ExtAddress::kReverseByteOrder);
+ VerifyOrQuit(CompareReversed(extAddr.m8, kExtAddr, OT_EXT_ADDRESS_SIZE), "ExtAddress::Set() failed");
+
+ extAddr.SetLocal(true);
+ VerifyOrQuit(extAddr.IsLocal(), "ExtAddress::SetLocal() failed");
+ extAddr.SetLocal(false);
+ VerifyOrQuit(!extAddr.IsLocal(), "ExtAddress::SetLocal() failed");
+ extAddr.ToggleLocal();
+ VerifyOrQuit(extAddr.IsLocal(), "ExtAddress::SetLocal() failed");
+ extAddr.ToggleLocal();
+ VerifyOrQuit(!extAddr.IsLocal(), "ExtAddress::SetLocal() failed");
+
+ extAddr.SetGroup(true);
+ VerifyOrQuit(extAddr.IsGroup(), "ExtAddress::SetGroup() failed");
+ extAddr.SetGroup(false);
+ VerifyOrQuit(!extAddr.IsGroup(), "ExtAddress::SetGroup() failed");
+ extAddr.ToggleGroup();
+ VerifyOrQuit(extAddr.IsGroup(), "ExtAddress::SetGroup() failed");
+ extAddr.ToggleGroup();
+ VerifyOrQuit(!extAddr.IsGroup(), "ExtAddress::SetGroup() failed");
+
+ // Mac::Address
+
+ VerifyOrQuit(addr.IsNone(), "Address constructor failed");
+ VerifyOrQuit(addr.GetType() == Mac::Address::kTypeNone, "Address::GetType() failed");
+
+ addr.SetShort(kShortAddr);
+ VerifyOrQuit(addr.GetType() == Mac::Address::kTypeShort, "Address::GetType() failed");
+ VerifyOrQuit(addr.IsShort(), "Address::SetShort() failed");
+ VerifyOrQuit(!addr.IsExtended(), "Address::SetShort() failed");
+ VerifyOrQuit(addr.GetShort() == kShortAddr, "Address::GetShort() failed");
+
+ addr.SetExtended(extAddr);
+ VerifyOrQuit(addr.GetType() == Mac::Address::kTypeExtended, "Address::GetType() failed");
+ VerifyOrQuit(!addr.IsShort(), "Address::SetExtended() failed");
+ VerifyOrQuit(addr.IsExtended(), "Address::SetExtended() failed");
+ VerifyOrQuit(addr.GetExtended() == extAddr, "Address::GetExtended() failed");
+
+ addr.SetExtended(extAddr.m8, Mac::ExtAddress::kReverseByteOrder);
+ VerifyOrQuit(addr.GetType() == Mac::Address::kTypeExtended, "Address::GetType() failed");
+ VerifyOrQuit(!addr.IsShort(), "Address::SetExtended() failed");
+ VerifyOrQuit(addr.IsExtended(), "Address::SetExtended() failed");
+ VerifyOrQuit(CompareReversed(addr.GetExtended().m8, extAddr.m8, OT_EXT_ADDRESS_SIZE),
+ "Address::SetExtended() reverse byte order failed");
+
+ addr.SetNone();
+ VerifyOrQuit(addr.GetType() == Mac::Address::kTypeNone, "Address::GetType() failed");
+ VerifyOrQuit(addr.IsNone(), "Address:SetNone() failed");
+ VerifyOrQuit(!addr.IsShort(), "Address::SetNone() failed");
+ VerifyOrQuit(!addr.IsExtended(), "Address::SetNone() failed");
+
+ VerifyOrQuit(!addr.IsBroadcast(), "Address:IsBroadcast() failed");
+ VerifyOrQuit(!addr.IsShortAddrInvalid(), "Address:IsShortAddrInvalid() failed");
+
+ addr.SetExtended(extAddr);
+ VerifyOrQuit(!addr.IsBroadcast(), "Address:IsBroadcast() failed");
+ VerifyOrQuit(!addr.IsShortAddrInvalid(), "Address:IsShortAddrInvalid() failed");
+
+ addr.SetShort(kShortAddr);
+ VerifyOrQuit(!addr.IsBroadcast(), "Address:IsBroadcast() failed");
+ VerifyOrQuit(!addr.IsShortAddrInvalid(), "Address:IsShortAddrInvalid() failed");
+
+ addr.SetShort(Mac::kShortAddrBroadcast);
+ VerifyOrQuit(addr.IsBroadcast(), "Address:IsBroadcast() failed");
+ VerifyOrQuit(!addr.IsShortAddrInvalid(), "Address:IsShortAddrInvalid() failed");
+
+ addr.SetShort(Mac::kShortAddrInvalid);
+ VerifyOrQuit(!addr.IsBroadcast(), "Address:IsBroadcast() failed");
+ VerifyOrQuit(addr.IsShortAddrInvalid(), "Address:IsShortAddrInvalid() failed");
+
+ testFreeInstance(instance);
+}
+
+void CompareNetworkName(const Mac::NetworkName &aNetworkName, const char *aNameString)
+{
+ uint8_t len = static_cast<uint8_t>(strlen(aNameString));
+
+ VerifyOrQuit(strcmp(aNetworkName.GetAsCString(), aNameString) == 0, "NetworkName does not match expected value");
+
+ VerifyOrQuit(aNetworkName.GetAsData().GetLength() == len, "NetworkName:GetAsData().GetLength() is incorrect");
+ VerifyOrQuit(memcmp(aNetworkName.GetAsData().GetBuffer(), aNameString, len) == 0,
+ "NetworkName:GetAsData().GetBuffer() is incorrect");
+}
+
+void TestMacNetworkName(void)
+{
+ const char kEmptyName[] = "";
+ const char kName1[] = "network";
+ const char kName2[] = "network-name";
+ const char kLongName[] = "0123456789abcdef";
+ const char kTooLongName[] = "0123456789abcdef0";
+
+ char buffer[sizeof(kTooLongName) + 2];
+ uint8_t len;
+ Mac::NetworkName networkName;
+
+ CompareNetworkName(networkName, kEmptyName);
+
+ SuccessOrQuit(networkName.Set(Mac::NetworkName::Data(kName1, sizeof(kName1))), "NetworkName::Set() failed");
+ CompareNetworkName(networkName, kName1);
+
+ VerifyOrQuit(networkName.Set(Mac::NetworkName::Data(kName1, sizeof(kName1))) == OT_ERROR_ALREADY,
+ "NetworkName::Set() accepted same name without returning OT_ERROR_ALREADY");
+ CompareNetworkName(networkName, kName1);
+
+ VerifyOrQuit(networkName.Set(Mac::NetworkName::Data(kName1, sizeof(kName1) - 1)) == OT_ERROR_ALREADY,
+ "NetworkName::Set() accepted same name without returning OT_ERROR_ALREADY");
+
+ SuccessOrQuit(networkName.Set(Mac::NetworkName::Data(kName2, sizeof(kName2))), "NetworkName::Set() failed");
+ CompareNetworkName(networkName, kName2);
+
+ SuccessOrQuit(networkName.Set(Mac::NetworkName::Data(kEmptyName, 0)), "NetworkName::Set() failed");
+ CompareNetworkName(networkName, kEmptyName);
+
+ SuccessOrQuit(networkName.Set(Mac::NetworkName::Data(kLongName, sizeof(kLongName))), "NetworkName::Set() failed");
+ CompareNetworkName(networkName, kLongName);
+
+ VerifyOrQuit(networkName.Set(Mac::NetworkName::Data(kLongName, sizeof(kLongName) - 1)) == OT_ERROR_ALREADY,
+ "NetworkName::Set() accepted same name without returning OT_ERROR_ALREADY");
+
+ SuccessOrQuit(networkName.Set(Mac::NetworkName::Data(NULL, 0)), "NetworkName::Set() failed");
+ CompareNetworkName(networkName, kEmptyName);
+
+ SuccessOrQuit(networkName.Set(Mac::NetworkName::Data(kName1, sizeof(kName1))), "NetworkName::Set() failed");
+
+ VerifyOrQuit(networkName.Set(Mac::NetworkName::Data(kTooLongName, sizeof(kTooLongName))) == OT_ERROR_INVALID_ARGS,
+ "NetworkName::Set() accepted an invalid (too long) name");
+
+ CompareNetworkName(networkName, kName1);
+
+ memset(buffer, 'a', sizeof(buffer));
+ len = networkName.GetAsData().CopyTo(buffer, 1);
+ VerifyOrQuit(len == 1, "NetworkName::Data::CopyTo() failed");
+ VerifyOrQuit(buffer[0] == kName1[0], "NetworkName::Data::CopyTo() failed");
+ VerifyOrQuit(buffer[1] == 'a', "NetworkName::Data::CopyTo() failed");
+
+ memset(buffer, 'a', sizeof(buffer));
+ len = networkName.GetAsData().CopyTo(buffer, sizeof(kName1) - 1);
+ VerifyOrQuit(len == sizeof(kName1) - 1, "NetworkName::Data::CopyTo() failed");
+ VerifyOrQuit(memcmp(buffer, kName1, sizeof(kName1) - 1) == 0, "NetworkName::Data::CopyTo() failed");
+ VerifyOrQuit(buffer[sizeof(kName1)] == 'a', "NetworkName::Data::CopyTo() failed");
+
+ memset(buffer, 'a', sizeof(buffer));
+ len = networkName.GetAsData().CopyTo(buffer, sizeof(buffer));
+ VerifyOrQuit(len == sizeof(kName1) - 1, "NetworkName::Data::CopyTo() failed");
+ VerifyOrQuit(memcmp(buffer, kName1, sizeof(kName1) - 1) == 0, "NetworkName::Data::CopyTo() failed");
+ VerifyOrQuit(buffer[sizeof(kName1)] == 0, "NetworkName::Data::CopyTo() failed");
+}
+
void TestMacHeader(void)
{
static const struct
@@ -78,14 +271,14 @@
for (unsigned i = 0; i < OT_ARRAY_LENGTH(tests); i++)
{
- uint8_t psdu[Mac::Frame::kMTU];
+ uint8_t psdu[Mac::Frame::kMtu];
Mac::TxFrame frame;
frame.mPsdu = psdu;
frame.InitMacHeader(tests[i].fcf, tests[i].secCtl);
printf("%d\n", frame.GetHeaderLength());
- VerifyOrQuit(frame.GetHeaderLength() == tests[i].headerLength, "MacHeader test failed\n");
+ VerifyOrQuit(frame.GetHeaderLength() == tests[i].headerLength, "MacHeader test failed");
}
}
@@ -101,11 +294,11 @@
if (channel == aChannels[index])
{
index++;
- VerifyOrQuit(aMask.ContainsChannel(channel), "ChannelMask.ContainsChannel() failed\n");
+ VerifyOrQuit(aMask.ContainsChannel(channel), "ChannelMask.ContainsChannel() failed");
}
else
{
- VerifyOrQuit(!aMask.ContainsChannel(channel), "ChannelMask.ContainsChannel() failed\n");
+ VerifyOrQuit(!aMask.ContainsChannel(channel), "ChannelMask.ContainsChannel() failed");
}
}
}
@@ -115,21 +308,21 @@
while (aMask.GetNextChannel(channel) == OT_ERROR_NONE)
{
- VerifyOrQuit(channel == aChannels[index++], "ChannelMask.GetNextChannel() failed\n");
+ VerifyOrQuit(channel == aChannels[index++], "ChannelMask.GetNextChannel() failed");
}
- VerifyOrQuit(index == aLength, "ChannelMask.GetNextChannel() failed\n");
+ VerifyOrQuit(index == aLength, "ChannelMask.GetNextChannel() failed");
if (aLength == 1)
{
- VerifyOrQuit(aMask.IsSingleChannel(), "ChannelMask.IsSingleChannel() failed\n");
+ VerifyOrQuit(aMask.IsSingleChannel(), "ChannelMask.IsSingleChannel() failed");
}
else
{
- VerifyOrQuit(!aMask.IsSingleChannel(), "ChannelMask.IsSingleChannel() failed\n");
+ VerifyOrQuit(!aMask.IsSingleChannel(), "ChannelMask.IsSingleChannel() failed");
}
- VerifyOrQuit(aLength == aMask.GetNumberOfChannels(), "ChannelMask.GetNumberOfChannels() failed\n");
+ VerifyOrQuit(aLength == aMask.GetNumberOfChannels(), "ChannelMask.GetNumberOfChannels() failed");
}
void TestMacChannelMask(void)
@@ -145,16 +338,16 @@
printf("Testing Mac::ChannelMask\n");
- VerifyOrQuit(mask1.IsEmpty(), "ChannelMask.IsEmpty failed\n");
+ VerifyOrQuit(mask1.IsEmpty(), "ChannelMask.IsEmpty failed");
printf("empty = %s\n", mask1.ToString().AsCString());
- VerifyOrQuit(!mask2.IsEmpty(), "ChannelMask.IsEmpty failed\n");
- VerifyOrQuit(mask2.GetMask() == Radio::kSupportedChannels, "ChannelMask.GetMask() failed\n");
+ VerifyOrQuit(!mask2.IsEmpty(), "ChannelMask.IsEmpty failed");
+ VerifyOrQuit(mask2.GetMask() == Radio::kSupportedChannels, "ChannelMask.GetMask() failed");
printf("all_channels = %s\n", mask2.ToString().AsCString());
mask1.SetMask(Radio::kSupportedChannels);
- VerifyOrQuit(!mask1.IsEmpty(), "ChannelMask.IsEmpty failed\n");
- VerifyOrQuit(mask1.GetMask() == Radio::kSupportedChannels, "ChannelMask.GetMask() failed\n");
+ VerifyOrQuit(!mask1.IsEmpty(), "ChannelMask.IsEmpty failed");
+ VerifyOrQuit(mask1.GetMask() == Radio::kSupportedChannels, "ChannelMask.GetMask() failed");
VerifyChannelMaskContent(mask1, all_channels, sizeof(all_channels));
@@ -166,7 +359,7 @@
}
mask1.Clear();
- VerifyOrQuit(mask1.IsEmpty(), "ChannelMask.IsEmpty failed\n");
+ VerifyOrQuit(mask1.IsEmpty(), "ChannelMask.IsEmpty failed");
VerifyChannelMaskContent(mask1, NULL, 0);
for (uint16_t index = 0; index < sizeof(channels1); index++)
@@ -176,7 +369,7 @@
printf("channels1 = %s\n", mask1.ToString().AsCString());
- VerifyOrQuit(!mask1.IsEmpty(), "ChannelMask.IsEmpty failed\n");
+ VerifyOrQuit(!mask1.IsEmpty(), "ChannelMask.IsEmpty failed");
VerifyChannelMaskContent(mask1, channels1, sizeof(channels1));
mask2.Clear();
@@ -188,7 +381,7 @@
printf("channels2 = %s\n", mask2.ToString().AsCString());
- VerifyOrQuit(!mask2.IsEmpty(), "ChannelMask.IsEmpty failed\n");
+ VerifyOrQuit(!mask2.IsEmpty(), "ChannelMask.IsEmpty failed");
VerifyChannelMaskContent(mask2, channels2, sizeof(channels2));
mask1.Intersect(mask2);
@@ -202,24 +395,24 @@
mask1.Clear();
mask2.Clear();
- VerifyOrQuit(mask1 == mask2, "ChannelMask.operator== failed\n");
+ VerifyOrQuit(mask1 == mask2, "ChannelMask.operator== failed");
mask1.SetMask(Radio::kSupportedChannels);
mask2.SetMask(Radio::kSupportedChannels);
- VerifyOrQuit(mask1 == mask2, "ChannelMask.operator== failed\n");
+ VerifyOrQuit(mask1 == mask2, "ChannelMask.operator== failed");
mask1.Clear();
- VerifyOrQuit(mask1 != mask2, "ChannelMask.operator== failed\n");
+ VerifyOrQuit(mask1 != mask2, "ChannelMask.operator== failed");
}
} // namespace ot
-#ifdef ENABLE_TEST_MAIN
int main(void)
{
+ ot::TestMacAddress();
+ ot::TestMacNetworkName();
ot::TestMacHeader();
ot::TestMacChannelMask();
printf("All tests passed\n");
return 0;
}
-#endif
diff --git a/tests/unit/test_message.cpp b/tests/unit/test_message.cpp
index 080a542..80cf7d8 100644
--- a/tests/unit/test_message.cpp
+++ b/tests/unit/test_message.cpp
@@ -29,7 +29,6 @@
#include "common/debug.hpp"
#include "common/instance.hpp"
#include "common/message.hpp"
-#include "utils/wrap_string.h"
#include "test_platform.h"
#include "test_util.h"
@@ -52,22 +51,20 @@
writeBuffer[i] = static_cast<uint8_t>(random());
}
- VerifyOrQuit((message = messagePool->New(ot::Message::kTypeIp6, 0)) != NULL, "Message::New failed\n");
- SuccessOrQuit(message->SetLength(sizeof(writeBuffer)), "Message::SetLength failed\n");
- VerifyOrQuit(message->Write(0, sizeof(writeBuffer), writeBuffer) == sizeof(writeBuffer), "Message::Write failed\n");
- VerifyOrQuit(message->Read(0, sizeof(readBuffer), readBuffer) == sizeof(readBuffer), "Message::Read failed\n");
- VerifyOrQuit(memcmp(writeBuffer, readBuffer, sizeof(writeBuffer)) == 0, "Message compare failed\n");
- VerifyOrQuit(message->GetLength() == 1024, "Message::GetLength failed\n");
+ VerifyOrQuit((message = messagePool->New(ot::Message::kTypeIp6, 0)) != NULL, "Message::New failed");
+ SuccessOrQuit(message->SetLength(sizeof(writeBuffer)), "Message::SetLength failed");
+ VerifyOrQuit(message->Write(0, sizeof(writeBuffer), writeBuffer) == sizeof(writeBuffer), "Message::Write failed");
+ VerifyOrQuit(message->Read(0, sizeof(readBuffer), readBuffer) == sizeof(readBuffer), "Message::Read failed");
+ VerifyOrQuit(memcmp(writeBuffer, readBuffer, sizeof(writeBuffer)) == 0, "Message compare failed");
+ VerifyOrQuit(message->GetLength() == 1024, "Message::GetLength failed");
message->Free();
testFreeInstance(instance);
}
-#ifdef ENABLE_TEST_MAIN
int main(void)
{
TestMessage();
printf("All tests passed\n");
return 0;
}
-#endif
diff --git a/tests/unit/test_message_queue.cpp b/tests/unit/test_message_queue.cpp
index 3cd4da2..911b07c 100644
--- a/tests/unit/test_message_queue.cpp
+++ b/tests/unit/test_message_queue.cpp
@@ -35,7 +35,6 @@
#include "common/debug.hpp"
#include "common/instance.hpp"
#include "common/message.hpp"
-#include "utils/wrap_string.h"
#include "test_util.h"
@@ -56,21 +55,21 @@
if (aExpectedLength == 0)
{
message = aMessageQueue.GetHead();
- VerifyOrQuit(message == NULL, "MessageQueue is not empty when expected len is zero.\n");
+ VerifyOrQuit(message == NULL, "MessageQueue is not empty when expected len is zero.");
}
else
{
for (message = aMessageQueue.GetHead(); message != NULL; message = message->GetNext())
{
- VerifyOrQuit(aExpectedLength != 0, "MessageQueue contains more entries than expected\n");
+ VerifyOrQuit(aExpectedLength != 0, "MessageQueue contains more entries than expected");
msgArg = va_arg(args, ot::Message *);
- VerifyOrQuit(msgArg == message, "MessageQueue content does not match what is expected.\n");
+ VerifyOrQuit(msgArg == message, "MessageQueue content does not match what is expected.");
aExpectedLength--;
}
- VerifyOrQuit(aExpectedLength == 0, "MessageQueue contains less entries than expected\n");
+ VerifyOrQuit(aExpectedLength == 0, "MessageQueue contains less entries than expected");
}
va_end(args);
@@ -91,102 +90,102 @@
for (int i = 0; i < kNumTestMessages; i++)
{
msg[i] = sMessagePool->New(ot::Message::kTypeIp6, 0);
- VerifyOrQuit(msg[i] != NULL, "Message::New failed\n");
+ VerifyOrQuit(msg[i] != NULL, "Message::New failed");
}
VerifyMessageQueueContent(messageQueue, 0);
// Enqueue 1 message and remove it
- SuccessOrQuit(messageQueue.Enqueue(*msg[0]), "MessageQueue::Enqueue() failed.\n");
+ SuccessOrQuit(messageQueue.Enqueue(*msg[0]), "MessageQueue::Enqueue() failed.");
VerifyMessageQueueContent(messageQueue, 1, msg[0]);
- SuccessOrQuit(messageQueue.Dequeue(*msg[0]), "MessageQueue::Dequeue() failed.\n");
+ SuccessOrQuit(messageQueue.Dequeue(*msg[0]), "MessageQueue::Dequeue() failed.");
VerifyMessageQueueContent(messageQueue, 0);
// Enqueue 1 message at head and remove it
SuccessOrQuit(messageQueue.Enqueue(*msg[0], ot::MessageQueue::kQueuePositionHead),
- "MessageQueue::Enqueue() failed.\n");
+ "MessageQueue::Enqueue() failed.");
VerifyMessageQueueContent(messageQueue, 1, msg[0]);
- SuccessOrQuit(messageQueue.Dequeue(*msg[0]), "MessageQueue::Dequeue() failed.\n");
+ SuccessOrQuit(messageQueue.Dequeue(*msg[0]), "MessageQueue::Dequeue() failed.");
VerifyMessageQueueContent(messageQueue, 0);
// Enqueue 5 messages
- SuccessOrQuit(messageQueue.Enqueue(*msg[0]), "MessageQueue::Enqueue() failed.\n");
+ SuccessOrQuit(messageQueue.Enqueue(*msg[0]), "MessageQueue::Enqueue() failed.");
VerifyMessageQueueContent(messageQueue, 1, msg[0]);
- SuccessOrQuit(messageQueue.Enqueue(*msg[1]), "MessageQueue::Enqueue() failed.\n");
+ SuccessOrQuit(messageQueue.Enqueue(*msg[1]), "MessageQueue::Enqueue() failed.");
VerifyMessageQueueContent(messageQueue, 2, msg[0], msg[1]);
- SuccessOrQuit(messageQueue.Enqueue(*msg[2]), "MessageQueue::Enqueue() failed.\n");
+ SuccessOrQuit(messageQueue.Enqueue(*msg[2]), "MessageQueue::Enqueue() failed.");
VerifyMessageQueueContent(messageQueue, 3, msg[0], msg[1], msg[2]);
- SuccessOrQuit(messageQueue.Enqueue(*msg[3]), "MessageQueue::Enqueue() failed.\n");
+ SuccessOrQuit(messageQueue.Enqueue(*msg[3]), "MessageQueue::Enqueue() failed.");
VerifyMessageQueueContent(messageQueue, 4, msg[0], msg[1], msg[2], msg[3]);
- SuccessOrQuit(messageQueue.Enqueue(*msg[4]), "MessageQueue::Enqueue() failed.\n");
+ SuccessOrQuit(messageQueue.Enqueue(*msg[4]), "MessageQueue::Enqueue() failed.");
VerifyMessageQueueContent(messageQueue, 5, msg[0], msg[1], msg[2], msg[3], msg[4]);
// Check the GetInfo()
messageQueue.GetInfo(msgCount, bufferCount);
- VerifyOrQuit(msgCount == 5, "MessageQueue::GetInfo() failed.\n");
+ VerifyOrQuit(msgCount == 5, "MessageQueue::GetInfo() failed.");
// Remove from head
- SuccessOrQuit(messageQueue.Dequeue(*msg[0]), "MessageQueue::Dequeue() failed.\n");
+ SuccessOrQuit(messageQueue.Dequeue(*msg[0]), "MessageQueue::Dequeue() failed.");
VerifyMessageQueueContent(messageQueue, 4, msg[1], msg[2], msg[3], msg[4]);
// Remove a message in middle
- SuccessOrQuit(messageQueue.Dequeue(*msg[3]), "MessageQueue::Dequeue() failed.\n");
+ SuccessOrQuit(messageQueue.Dequeue(*msg[3]), "MessageQueue::Dequeue() failed.");
VerifyMessageQueueContent(messageQueue, 3, msg[1], msg[2], msg[4]);
// Remove from tail
- SuccessOrQuit(messageQueue.Dequeue(*msg[4]), "MessageQueue::Dequeue() failed.\n");
+ SuccessOrQuit(messageQueue.Dequeue(*msg[4]), "MessageQueue::Dequeue() failed.");
VerifyMessageQueueContent(messageQueue, 2, msg[1], msg[2]);
// Add after remove
- SuccessOrQuit(messageQueue.Enqueue(*msg[0]), "MessageQueue::Enqueue() failed.\n");
+ SuccessOrQuit(messageQueue.Enqueue(*msg[0]), "MessageQueue::Enqueue() failed.");
VerifyMessageQueueContent(messageQueue, 3, msg[1], msg[2], msg[0]);
- SuccessOrQuit(messageQueue.Enqueue(*msg[3]), "MessageQueue::Enqueue() failed.\n");
+ SuccessOrQuit(messageQueue.Enqueue(*msg[3]), "MessageQueue::Enqueue() failed.");
VerifyMessageQueueContent(messageQueue, 4, msg[1], msg[2], msg[0], msg[3]);
// Remove from middle
- SuccessOrQuit(messageQueue.Dequeue(*msg[2]), "MessageQueue::Dequeue() failed.\n");
+ SuccessOrQuit(messageQueue.Dequeue(*msg[2]), "MessageQueue::Dequeue() failed.");
VerifyMessageQueueContent(messageQueue, 3, msg[1], msg[0], msg[3]);
// Add to head
SuccessOrQuit(messageQueue.Enqueue(*msg[2], ot::MessageQueue::kQueuePositionHead),
- "MessageQueue::Enqueue() failed.\n");
+ "MessageQueue::Enqueue() failed.");
VerifyMessageQueueContent(messageQueue, 4, msg[2], msg[1], msg[0], msg[3]);
// Remove from head
- SuccessOrQuit(messageQueue.Dequeue(*msg[2]), "MessageQueue::Dequeue() failed.\n");
+ SuccessOrQuit(messageQueue.Dequeue(*msg[2]), "MessageQueue::Dequeue() failed.");
VerifyMessageQueueContent(messageQueue, 3, msg[1], msg[0], msg[3]);
// Remove from head
- SuccessOrQuit(messageQueue.Dequeue(*msg[1]), "MessageQueue::Dequeue() failed.\n");
+ SuccessOrQuit(messageQueue.Dequeue(*msg[1]), "MessageQueue::Dequeue() failed.");
VerifyMessageQueueContent(messageQueue, 2, msg[0], msg[3]);
// Add to head
SuccessOrQuit(messageQueue.Enqueue(*msg[1], ot::MessageQueue::kQueuePositionHead),
- "MessageQueue::Enqueue() failed.\n");
+ "MessageQueue::Enqueue() failed.");
VerifyMessageQueueContent(messageQueue, 3, msg[1], msg[0], msg[3]);
// Add to tail
SuccessOrQuit(messageQueue.Enqueue(*msg[2], ot::MessageQueue::kQueuePositionTail),
- "MessageQueue::Enqueue() failed.\n");
+ "MessageQueue::Enqueue() failed.");
VerifyMessageQueueContent(messageQueue, 4, msg[1], msg[0], msg[3], msg[2]);
// Remove all messages.
- SuccessOrQuit(messageQueue.Dequeue(*msg[3]), "MessageQueue::Dequeue() failed.\n");
+ SuccessOrQuit(messageQueue.Dequeue(*msg[3]), "MessageQueue::Dequeue() failed.");
VerifyMessageQueueContent(messageQueue, 3, msg[1], msg[0], msg[2]);
- SuccessOrQuit(messageQueue.Dequeue(*msg[1]), "MessageQueue::Dequeue() failed.\n");
+ SuccessOrQuit(messageQueue.Dequeue(*msg[1]), "MessageQueue::Dequeue() failed.");
VerifyMessageQueueContent(messageQueue, 2, msg[0], msg[2]);
- SuccessOrQuit(messageQueue.Dequeue(*msg[2]), "MessageQueue::Dequeue() failed.\n");
+ SuccessOrQuit(messageQueue.Dequeue(*msg[2]), "MessageQueue::Dequeue() failed.");
VerifyMessageQueueContent(messageQueue, 1, msg[0]);
- SuccessOrQuit(messageQueue.Dequeue(*msg[0]), "MessageQueue::Dequeue() failed.\n");
+ SuccessOrQuit(messageQueue.Dequeue(*msg[0]), "MessageQueue::Dequeue() failed.");
VerifyMessageQueueContent(messageQueue, 0);
// Check the failure cases: Enqueue an already queued message or dequeue a message not in the queue.
- SuccessOrQuit(messageQueue.Enqueue(*msg[0]), "MessageQueue::Enqueue() failed.\n");
+ SuccessOrQuit(messageQueue.Enqueue(*msg[0]), "MessageQueue::Enqueue() failed.");
VerifyMessageQueueContent(messageQueue, 1, msg[0]);
error = messageQueue.Enqueue(*msg[0]);
- VerifyOrQuit(error == OT_ERROR_ALREADY, "Enqueuing an already queued message did not fail as expected.\n");
+ VerifyOrQuit(error == OT_ERROR_ALREADY, "Enqueuing an already queued message did not fail as expected.");
error = messageQueue.Dequeue(*msg[1]);
- VerifyOrQuit(error == OT_ERROR_NOT_FOUND, "Dequeuing a message not in the queue did not fail as expected.\n");
+ VerifyOrQuit(error == OT_ERROR_NOT_FOUND, "Dequeuing a message not in the queue did not fail as expected.");
testFreeInstance(sInstance);
}
@@ -203,21 +202,21 @@
if (aExpectedLength == 0)
{
message = otMessageQueueGetHead(aQueue);
- VerifyOrQuit(message == NULL, "MessageQueue is not empty when expected len is zero.\n");
+ VerifyOrQuit(message == NULL, "MessageQueue is not empty when expected len is zero.");
}
else
{
for (message = otMessageQueueGetHead(aQueue); message != NULL; message = otMessageQueueGetNext(aQueue, message))
{
- VerifyOrQuit(aExpectedLength != 0, "MessageQueue contains more entries than expected\n");
+ VerifyOrQuit(aExpectedLength != 0, "MessageQueue contains more entries than expected");
msgArg = va_arg(args, otMessage *);
- VerifyOrQuit(msgArg == message, "MessageQueue content does not match what is expected.\n");
+ VerifyOrQuit(msgArg == message, "MessageQueue content does not match what is expected.");
aExpectedLength--;
}
- VerifyOrQuit(aExpectedLength == 0, "MessageQueue contains less entries than expected\n");
+ VerifyOrQuit(aExpectedLength == 0, "MessageQueue contains less entries than expected");
}
va_end(args);
@@ -237,7 +236,7 @@
for (int i = 0; i < kNumTestMessages; i++)
{
msg[i] = otIp6NewMessage(sInstance, NULL);
- VerifyOrQuit(msg[i] != NULL, "otIp6NewMessage() failed.\n");
+ VerifyOrQuit(msg[i] != NULL, "otIp6NewMessage() failed.");
}
otMessageQueueInit(&queue);
@@ -247,54 +246,53 @@
VerifyMessageQueueContentUsingOtApi(&queue, 0);
// Add message to the queue and check the content
- SuccessOrQuit(otMessageQueueEnqueue(&queue, msg[0]), "Failed to enqueue a message to otMessageQueue.\n");
+ SuccessOrQuit(otMessageQueueEnqueue(&queue, msg[0]), "Failed to enqueue a message to otMessageQueue.");
VerifyMessageQueueContentUsingOtApi(&queue, 1, msg[0]);
- SuccessOrQuit(otMessageQueueEnqueue(&queue, msg[1]), "Failed to enqueue a message to otMessageQueue.\n");
+ SuccessOrQuit(otMessageQueueEnqueue(&queue, msg[1]), "Failed to enqueue a message to otMessageQueue.");
VerifyMessageQueueContentUsingOtApi(&queue, 2, msg[0], msg[1]);
- SuccessOrQuit(otMessageQueueEnqueueAtHead(&queue, msg[2]), "Failed to enqueue a message to otMessageQueue.\n");
+ SuccessOrQuit(otMessageQueueEnqueueAtHead(&queue, msg[2]), "Failed to enqueue a message to otMessageQueue.");
VerifyMessageQueueContentUsingOtApi(&queue, 3, msg[2], msg[0], msg[1]);
- SuccessOrQuit(otMessageQueueEnqueue(&queue, msg[3]), "Failed to enqueue a message to otMessageQueue.\n");
+ SuccessOrQuit(otMessageQueueEnqueue(&queue, msg[3]), "Failed to enqueue a message to otMessageQueue.");
VerifyMessageQueueContentUsingOtApi(&queue, 4, msg[2], msg[0], msg[1], msg[3]);
// Remove elements and check the content
- SuccessOrQuit(otMessageQueueDequeue(&queue, msg[1]), "Failed to dequeue a message from otMessageQueue.\n");
+ SuccessOrQuit(otMessageQueueDequeue(&queue, msg[1]), "Failed to dequeue a message from otMessageQueue.");
VerifyMessageQueueContentUsingOtApi(&queue, 3, msg[2], msg[0], msg[3]);
- SuccessOrQuit(otMessageQueueDequeue(&queue, msg[0]), "Failed to dequeue a message from otMessageQueue.\n");
+ SuccessOrQuit(otMessageQueueDequeue(&queue, msg[0]), "Failed to dequeue a message from otMessageQueue.");
VerifyMessageQueueContentUsingOtApi(&queue, 2, msg[2], msg[3]);
- SuccessOrQuit(otMessageQueueDequeue(&queue, msg[3]), "Failed to dequeue a message from otMessageQueue.\n");
+ SuccessOrQuit(otMessageQueueDequeue(&queue, msg[3]), "Failed to dequeue a message from otMessageQueue.");
VerifyMessageQueueContentUsingOtApi(&queue, 1, msg[2]);
// Check the expected failure cases for the enqueue and dequeue:
error = otMessageQueueEnqueue(&queue, msg[2]);
- VerifyOrQuit(error == OT_ERROR_ALREADY, "Enqueuing an already queued message did not fail as expected.\n");
+ VerifyOrQuit(error == OT_ERROR_ALREADY, "Enqueuing an already queued message did not fail as expected.");
error = otMessageQueueDequeue(&queue, msg[0]);
- VerifyOrQuit(error == OT_ERROR_NOT_FOUND, "Dequeuing a message not in the queue did not fail as expected.\n");
+ VerifyOrQuit(error == OT_ERROR_NOT_FOUND, "Dequeuing a message not in the queue did not fail as expected.");
// Check the failure cases for otMessageQueueGetNext()
message = otMessageQueueGetNext(&queue, NULL);
- VerifyOrQuit(message == NULL, "otMessageQueueGetNext(queue, NULL) did not return NULL.\n");
+ VerifyOrQuit(message == NULL, "otMessageQueueGetNext(queue, NULL) did not return NULL.");
message = otMessageQueueGetNext(&queue, msg[1]);
- VerifyOrQuit(message == NULL, "otMessageQueueGetNext() did not return NULL for a message not in the queue.\n");
+ VerifyOrQuit(message == NULL, "otMessageQueueGetNext() did not return NULL for a message not in the queue.");
// Check the failure case when attempting to do otMessageQueueGetNext() but passing in a wrong queue pointer.
- SuccessOrQuit(otMessageQueueEnqueue(&queue2, msg[0]), "Failed to enqueue a message to otMessageQueue.\n");
+ SuccessOrQuit(otMessageQueueEnqueue(&queue2, msg[0]), "Failed to enqueue a message to otMessageQueue.");
VerifyMessageQueueContentUsingOtApi(&queue2, 1, msg[0]);
- SuccessOrQuit(otMessageQueueEnqueue(&queue2, msg[1]), "Failed to enqueue a message to otMessageQueue.\n");
+ SuccessOrQuit(otMessageQueueEnqueue(&queue2, msg[1]), "Failed to enqueue a message to otMessageQueue.");
VerifyMessageQueueContentUsingOtApi(&queue2, 2, msg[0], msg[1]);
message = otMessageQueueGetNext(&queue2, msg[0]);
- VerifyOrQuit(message == msg[1], "otMessageQueueGetNext() failed\n");
+ VerifyOrQuit(message == msg[1], "otMessageQueueGetNext() failed");
message = otMessageQueueGetNext(&queue, msg[0]);
- VerifyOrQuit(message == NULL, "otMessageQueueGetNext() did not return NULL for message not in the queue.\n");
+ VerifyOrQuit(message == NULL, "otMessageQueueGetNext() did not return NULL for message not in the queue.");
// Remove all element and make sure queue is empty
- SuccessOrQuit(otMessageQueueDequeue(&queue, msg[2]), "Failed to dequeue a message from otMessageQueue.\n");
+ SuccessOrQuit(otMessageQueueDequeue(&queue, msg[2]), "Failed to dequeue a message from otMessageQueue.");
VerifyMessageQueueContentUsingOtApi(&queue, 0);
testFreeInstance(sInstance);
}
-#ifdef ENABLE_TEST_MAIN
int main(void)
{
TestMessageQueue();
@@ -302,4 +300,3 @@
printf("All tests passed\n");
return 0;
}
-#endif
diff --git a/tests/unit/test_ncp_buffer.cpp b/tests/unit/test_ncp_buffer.cpp
index ea25309..3545290 100644
--- a/tests/unit/test_ncp_buffer.cpp
+++ b/tests/unit/test_ncp_buffer.cpp
@@ -35,7 +35,7 @@
#include "ncp/ncp_buffer.hpp"
#include "test_platform.h"
-#include "test_util.h"
+#include "test_util.hpp"
namespace ot {
namespace Ncp {
@@ -159,47 +159,6 @@
callbackContext->mFrameRemovedCount++;
}
-// Dump the buffer content to screen.
-void DumpBuffer(const char *aTextMessage, uint8_t *aBuffer, uint16_t aBufferLength)
-{
- enum
- {
- kBytesPerLine = 32, // Number of bytes per line.
- };
-
- char charBuff[kBytesPerLine + 1];
- uint16_t counter;
- uint8_t byte;
-
- printf("\n%s - len = %u\n ", aTextMessage, aBufferLength);
-
- counter = 0;
-
- while (aBufferLength--)
- {
- byte = *aBuffer++;
- printf("%02X ", byte);
- charBuff[counter] = isprint(byte) ? static_cast<char>(byte) : '.';
- counter++;
-
- if (counter == kBytesPerLine)
- {
- charBuff[counter] = 0;
- printf(" %s\n ", charBuff);
- counter = 0;
- }
- }
-
- charBuff[counter] = 0;
-
- while (counter++ < kBytesPerLine)
- {
- printf(" ");
- }
-
- printf(" %s\n", charBuff);
-}
-
// Reads bytes from the ncp buffer, and verifies that it matches with the given content buffer.
void ReadAndVerifyContent(NcpFrameBuffer &aNcpBuffer, const uint8_t *aContentBuffer, uint16_t aBufferLength)
{
@@ -1098,7 +1057,6 @@
} // namespace Ncp
} // namespace ot
-#ifdef ENABLE_TEST_MAIN
int main(void)
{
ot::Ncp::TestNcpFrameBuffer();
@@ -1106,4 +1064,3 @@
printf("\nAll tests passed.\n");
return 0;
}
-#endif
diff --git a/tests/unit/test_netif.cpp b/tests/unit/test_netif.cpp
new file mode 100644
index 0000000..98dc5d4
--- /dev/null
+++ b/tests/unit/test_netif.cpp
@@ -0,0 +1,215 @@
+/*
+ * Copyright (c) 2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <stdarg.h>
+
+#include "test_platform.h"
+
+#include <openthread/config.h>
+
+#include "common/debug.hpp"
+#include "common/instance.hpp"
+#include "net/netif.hpp"
+
+#include "test_util.h"
+
+namespace ot {
+
+class TestNetif : public Ip6::Netif
+{
+public:
+ TestNetif(Instance &aInstance)
+ : Ip6::Netif(aInstance)
+ {
+ }
+
+ // Provide `protected` methods in `Netif` as `public` from `TestNetif`
+ // so that we can verify their behavior in this test
+ otError SubscribeAllNodesMulticast(void) { return Ip6::Netif::SubscribeAllNodesMulticast(); }
+ otError UnsubscribeAllNodesMulticast(void) { return Ip6::Netif::UnsubscribeAllNodesMulticast(); }
+};
+
+// This function verifies the multicast addresses on Netif matches the list of given addresses.
+void VerifyMulticastAddressList(const Ip6::Netif &aNetif, Ip6::Address aAddresses[], uint8_t aLength)
+{
+ uint8_t count = 0;
+
+ for (uint8_t i = 0; i < aLength; i++)
+ {
+ VerifyOrQuit(aNetif.IsMulticastSubscribed(aAddresses[i]), "IsMulticastSubscribed() failed");
+ }
+
+ for (const Ip6::NetifMulticastAddress *addr = aNetif.GetMulticastAddresses(); addr; addr = addr->GetNext())
+ {
+ bool didFind = false;
+
+ for (uint8_t i = 0; i < aLength; i++)
+ {
+ if (addr->GetAddress() == aAddresses[i])
+ {
+ didFind = true;
+ break;
+ }
+ }
+
+ VerifyOrQuit(didFind, "Netif multicast address is missing from expected address list");
+ count++;
+ }
+
+ VerifyOrQuit(count == aLength, "Expected address is missing from Netif address list");
+}
+
+void TestNetifMulticastAddresses(void)
+{
+ const uint8_t kMaxAddresses = 8;
+
+ Instance * instance = testInitInstance();
+ TestNetif netif(*instance);
+ Ip6::Address addresses[kMaxAddresses];
+
+ Ip6::Address address;
+ Ip6::NetifMulticastAddress netifAddress;
+
+ const char *kLinkLocalAllNodes = "ff02::01";
+ const char *kRealmLocalAllNodes = "ff03::01";
+ const char *kRealmLocalAllMpl = "ff03::fc";
+ const char *kLinkLocalAllRouters = "ff02::02";
+ const char *kRealmLocalAllRouters = "ff03::02";
+ const char *kTestAddress1 = "ff02::114";
+ const char *kTestAddress2 = "ff03::114";
+ const char *kTestAddress3 = "ff04::114";
+
+ addresses[0].FromString(kLinkLocalAllRouters);
+ addresses[1].FromString(kRealmLocalAllRouters);
+ addresses[2].FromString(kLinkLocalAllNodes);
+ addresses[3].FromString(kRealmLocalAllNodes);
+ addresses[4].FromString(kRealmLocalAllMpl);
+ addresses[5].FromString(kTestAddress1);
+ addresses[6].FromString(kTestAddress2);
+ addresses[7].FromString(kTestAddress3);
+
+ VerifyMulticastAddressList(netif, addresses, 0);
+
+ SuccessOrQuit(netif.SubscribeAllNodesMulticast(), "SubscribeAllNodesMulticast() failed");
+
+ VerifyMulticastAddressList(netif, &addresses[2], 3);
+
+ VerifyOrQuit(netif.SubscribeAllNodesMulticast() == OT_ERROR_ALREADY,
+ "SubscribeAllNodesMulticast() did not fail when already subscribed");
+
+ SuccessOrQuit(netif.SubscribeAllRoutersMulticast(), "SubscribeAllRoutersMulticast() failed");
+ VerifyMulticastAddressList(netif, &addresses[0], 5);
+
+ VerifyOrQuit(netif.SubscribeAllRoutersMulticast() == OT_ERROR_ALREADY,
+ "SubscribeAllRoutersMulticast() did not fail when already subscribed");
+
+ SuccessOrQuit(netif.UnsubscribeAllRoutersMulticast(), "UnsubscribeAllRoutersMulticast() failed");
+ VerifyMulticastAddressList(netif, &addresses[2], 3);
+
+ VerifyOrQuit(netif.UnsubscribeAllRoutersMulticast() == OT_ERROR_NOT_FOUND,
+ "UnsubscribeAllRoutersMulticast() did not fail when not subscribed");
+
+ netifAddress.GetAddress().FromString(kTestAddress1);
+ SuccessOrQuit(netif.SubscribeMulticast(netifAddress), "SubscribeMulticast() failed");
+ VerifyMulticastAddressList(netif, &addresses[2], 4);
+
+ VerifyOrQuit(netif.SubscribeMulticast(netifAddress) == OT_ERROR_ALREADY,
+ "SubscribeMulticast() did not fail when address was already subscribed");
+
+ SuccessOrQuit(netif.UnsubscribeAllNodesMulticast(), "UnsubscribeAllNodesMulticast() failed");
+ VerifyMulticastAddressList(netif, &addresses[5], 1);
+
+ VerifyOrQuit(netif.UnsubscribeAllNodesMulticast() == OT_ERROR_NOT_FOUND,
+ "UnsubscribeAllNodesMulticast() did not fail when not subscribed");
+
+ address.FromString(kTestAddress2);
+ SuccessOrQuit(netif.SubscribeExternalMulticast(address), "SubscribeExternalMulticast() failed");
+ VerifyMulticastAddressList(netif, &addresses[5], 2);
+
+ SuccessOrQuit(netif.SubscribeAllNodesMulticast(), "SubscribeAllNodesMulticast() failed");
+ VerifyMulticastAddressList(netif, &addresses[2], 5);
+
+ VerifyOrQuit(netif.SubscribeExternalMulticast(address) == OT_ERROR_ALREADY,
+ "SubscribeExternalMulticast() did not fail when address was already subscribed");
+
+ SuccessOrQuit(netif.SubscribeAllRoutersMulticast(), "SubscribeAllRoutersMulticast() failed");
+ VerifyMulticastAddressList(netif, &addresses[0], 7);
+
+ VerifyOrQuit(netif.SubscribeAllRoutersMulticast() == OT_ERROR_ALREADY,
+ "SubscribeAllRoutersMulticast() did not fail when already subscribed");
+
+ address.FromString(kTestAddress3);
+ SuccessOrQuit(netif.SubscribeExternalMulticast(address), "SubscribeExternalMulticast() failed");
+ VerifyMulticastAddressList(netif, &addresses[0], 8);
+
+ address.FromString(kTestAddress1); // same as netifAddress (internal)
+ VerifyOrQuit(netif.UnsubscribeExternalMulticast(address) == OT_ERROR_INVALID_ARGS,
+ "UnsubscribeExternalMulticast() did not fail when address was not external");
+
+ address.FromString(kRealmLocalAllMpl);
+ VerifyOrQuit(netif.UnsubscribeExternalMulticast(address) == OT_ERROR_INVALID_ARGS,
+ "UnsubscribeExternalMulticast() did not fail when address was fixed address");
+
+ SuccessOrQuit(netif.UnsubscribeAllRoutersMulticast(), "UnsubscribeAllRoutersMulticast() failed");
+ VerifyMulticastAddressList(netif, &addresses[2], 6);
+
+ VerifyOrQuit(netif.UnsubscribeAllRoutersMulticast() == OT_ERROR_NOT_FOUND,
+ "UnsubscribeAllRoutersMulticast() did not fail when not subscribed");
+
+ netif.UnsubscribeAllExternalMulticastAddresses();
+ VerifyMulticastAddressList(netif, &addresses[2], 4);
+
+ SuccessOrQuit(netif.UnsubscribeMulticast(netifAddress), "UnsubscribeMulticast() failed");
+ VerifyMulticastAddressList(netif, &addresses[2], 3);
+
+ VerifyOrQuit(netif.UnsubscribeMulticast(netifAddress) == OT_ERROR_NOT_FOUND,
+ "UnsubscribeMulticast() did not fail when address was not subscribed");
+
+ SuccessOrQuit(netif.UnsubscribeAllNodesMulticast(), "UnsubscribeAllNodesMulticast() failed");
+ VerifyMulticastAddressList(netif, NULL, 0);
+
+ // The first five elements in `addresses[]` are the default/fixed addresses:
+ // kLinkLocalAllRouters, kRealmLocalAllRouters, kLinkLocalAllNodes,
+ // kRealmLocalAllNodes, and kRealmLocalAllMpl. Verify that we cannot add
+ // any of them as an external multicast address.
+
+ for (uint8_t i = 0; i < 5; i++)
+ {
+ VerifyOrQuit(netif.SubscribeExternalMulticast(addresses[i]) == OT_ERROR_INVALID_ARGS,
+ "SubscribeExternalMulticast() did not fail when address was a default/fixed address");
+ }
+}
+
+} // namespace ot
+
+int main(void)
+{
+ ot::TestNetifMulticastAddresses();
+ printf("All tests passed\n");
+ return 0;
+}
diff --git a/tests/unit/test_network_data.cpp b/tests/unit/test_network_data.cpp
index 76b92b2..cddb344 100644
--- a/tests/unit/test_network_data.cpp
+++ b/tests/unit/test_network_data.cpp
@@ -36,6 +36,7 @@
#include "test_util.hpp"
namespace ot {
+namespace NetworkData {
class TestNetworkData : public NetworkData::NetworkData
{
@@ -48,7 +49,7 @@
}
};
-void PrintExternalRouteConfig(const otExternalRouteConfig &aConfig)
+void PrintExternalRouteConfig(const ExternalRouteConfig &aConfig)
{
printf("\nprefix:");
@@ -61,8 +62,8 @@
aConfig.mPreference, aConfig.mStable, aConfig.mNextHopIsThisDevice);
}
-// Returns true if the two given otExternalRouteConfig match (intentionally ignoring mNextHopIsThisDevice).
-bool CompareExternalRouteConfig(const otExternalRouteConfig &aConfig1, const otExternalRouteConfig &aConfig2)
+// Returns true if the two given ExternalRouteConfig match (intentionally ignoring mNextHopIsThisDevice).
+bool CompareExternalRouteConfig(const ExternalRouteConfig &aConfig1, const ExternalRouteConfig &aConfig2)
{
return (memcmp(aConfig1.mPrefix.mPrefix.mFields.m8, aConfig2.mPrefix.mPrefix.mFields.m8,
sizeof(aConfig1.mPrefix.mPrefix)) == 0) &&
@@ -72,9 +73,9 @@
void TestNetworkDataIterator(void)
{
- ot::Instance * instance;
- otNetworkDataIterator iter = OT_NETWORK_DATA_ITERATOR_INIT;
- otExternalRouteConfig config;
+ ot::Instance * instance;
+ Iterator iter = kIteratorInit;
+ ExternalRouteConfig config;
instance = testInitInstance();
VerifyOrQuit(instance != NULL, "Null OpenThread instance\n");
@@ -84,7 +85,7 @@
0xFD, 0x00, 0x12, 0x34, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
0xC8, 0x00, 0x40, 0x01, 0x03, 0x54, 0x00, 0x00};
- otExternalRouteConfig routes[] = {
+ ExternalRouteConfig routes[] = {
{
{{{{0xfd, 0x00, 0x12, 0x34, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}}},
64},
@@ -111,7 +112,7 @@
for (uint8_t i = 0; i < OT_ARRAY_LENGTH(routes); i++)
{
- SuccessOrQuit(netData.GetNextExternalRoute(&iter, &config), "GetNextExternalRoute() failed\n");
+ SuccessOrQuit(netData.GetNextExternalRoute(iter, config), "GetNextExternalRoute() failed");
PrintExternalRouteConfig(config);
VerifyOrQuit(CompareExternalRouteConfig(config, routes[i]) == true,
"external route config does not match expectation");
@@ -125,7 +126,7 @@
0x31, 0x00, 0x02, 0x0F, 0x00, 0x40, 0xFD, 0x00, 0xAB, 0xBA, 0xCD, 0xDC, 0x00, 0x00, 0x00, 0x03, 0x10, 0x00,
0x00, 0x03, 0x0E, 0x00, 0x20, 0xFD, 0x00, 0xAB, 0xBA, 0x01, 0x06, 0x54, 0x00, 0x00, 0x04, 0x00, 0x00};
- otExternalRouteConfig routes[] = {
+ ExternalRouteConfig routes[] = {
{{{{{0xfd, 0x00, 0x12, 0x34, 0x56, 0x78, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}}}, 64},
0x1000,
1,
@@ -161,7 +162,7 @@
for (uint8_t i = 0; i < OT_ARRAY_LENGTH(routes); i++)
{
- SuccessOrQuit(netData.GetNextExternalRoute(&iter, &config), "GetNextExternalRoute() failed\n");
+ SuccessOrQuit(netData.GetNextExternalRoute(iter, config), "GetNextExternalRoute() failed");
PrintExternalRouteConfig(config);
VerifyOrQuit(CompareExternalRouteConfig(config, routes[i]) == true,
"external route config does not match expectation");
@@ -171,14 +172,13 @@
testFreeInstance(instance);
}
+} // namespace NetworkData
} // namespace ot
-#ifdef ENABLE_TEST_MAIN
int main(void)
{
- ot::TestNetworkDataIterator();
+ ot::NetworkData::TestNetworkDataIterator();
printf("\nAll tests passed\n");
return 0;
}
-#endif
diff --git a/tests/unit/test_priority_queue.cpp b/tests/unit/test_priority_queue.cpp
index b60b7cf..914db28 100644
--- a/tests/unit/test_priority_queue.cpp
+++ b/tests/unit/test_priority_queue.cpp
@@ -31,7 +31,6 @@
#include "common/debug.hpp"
#include "common/instance.hpp"
#include "common/message.hpp"
-#include "utils/wrap_string.h"
#include "test_platform.h"
#include "test_util.h"
@@ -51,30 +50,30 @@
// Check the `GetInfo`
aPriorityQueue.GetInfo(msgCount, bufCount);
- VerifyOrQuit(msgCount == aExpectedLength, "GetInfo() result does not match expected len.\n");
+ VerifyOrQuit(msgCount == aExpectedLength, "GetInfo() result does not match expected len.");
va_start(args, aExpectedLength);
if (aExpectedLength == 0)
{
message = aPriorityQueue.GetHead();
- VerifyOrQuit(message == NULL, "PriorityQueue is not empty when expected len is zero.\n");
+ VerifyOrQuit(message == NULL, "PriorityQueue is not empty when expected len is zero.");
VerifyOrQuit(aPriorityQueue.GetHeadForPriority(ot::Message::kPriorityLow) == NULL,
- "GetHeadForPriority() non-NULL when empty\n");
+ "GetHeadForPriority() non-NULL when empty");
VerifyOrQuit(aPriorityQueue.GetHeadForPriority(ot::Message::kPriorityNormal) == NULL,
- "GetHeadForPriority() non-NULL when empty\n");
+ "GetHeadForPriority() non-NULL when empty");
VerifyOrQuit(aPriorityQueue.GetHeadForPriority(ot::Message::kPriorityHigh) == NULL,
- "GetHeadForPriority() non-NULL when empty\n");
+ "GetHeadForPriority() non-NULL when empty");
VerifyOrQuit(aPriorityQueue.GetHeadForPriority(ot::Message::kPriorityNet) == NULL,
- "GetHeadForPriority() non-NULL when empty\n");
+ "GetHeadForPriority() non-NULL when empty");
}
else
{
// Go through all messages in the queue and verify they match the passed-in messages
for (message = aPriorityQueue.GetHead(); message != NULL; message = message->GetNext())
{
- VerifyOrQuit(aExpectedLength != 0, "PriorityQueue contains more entries than expected.\n");
+ VerifyOrQuit(aExpectedLength != 0, "PriorityQueue contains more entries than expected.");
msgArg = va_arg(args, ot::Message *);
@@ -85,27 +84,27 @@
// Check the `GetHeadForPriority` is NULL if there are no expected message for this priority level.
VerifyOrQuit(
aPriorityQueue.GetHeadForPriority(static_cast<uint8_t>(curPriority)) == NULL,
- "PriorityQueue::GetHeadForPriority is non-NULL when no expected msg for this priority.\n");
+ "PriorityQueue::GetHeadForPriority is non-NULL when no expected msg for this priority.");
}
// Check the `GetHeadForPriority`.
VerifyOrQuit(aPriorityQueue.GetHeadForPriority(static_cast<uint8_t>(curPriority)) == msgArg,
- "PriorityQueue::GetHeadForPriority failed.\n");
+ "PriorityQueue::GetHeadForPriority failed.");
}
// Check the queued message to match the one from argument list
- VerifyOrQuit(msgArg == message, "PriorityQueue content does not match what is expected.\n");
+ VerifyOrQuit(msgArg == message, "PriorityQueue content does not match what is expected.");
aExpectedLength--;
}
- VerifyOrQuit(aExpectedLength == 0, "PriorityQueue contains less entries than expected.\n");
+ VerifyOrQuit(aExpectedLength == 0, "PriorityQueue contains less entries than expected.");
// Check the `GetHeadForPriority` is NULL if there are no expected message for any remaining priority level.
for (curPriority--; curPriority >= 0; curPriority--)
{
VerifyOrQuit(aPriorityQueue.GetHeadForPriority(static_cast<uint8_t>(curPriority)) == NULL,
- "PriorityQueue::GetHeadForPriority is non-NULL when no expected msg for this priority.\n");
+ "PriorityQueue::GetHeadForPriority is non-NULL when no expected msg for this priority.");
}
}
@@ -124,21 +123,21 @@
if (aExpectedLength == 0)
{
message = aMessageQueue.GetHead();
- VerifyOrQuit(message == NULL, "MessageQueue is not empty when expected len is zero.\n");
+ VerifyOrQuit(message == NULL, "MessageQueue is not empty when expected len is zero.");
}
else
{
for (message = aMessageQueue.GetHead(); message != NULL; message = message->GetNext())
{
- VerifyOrQuit(aExpectedLength != 0, "MessageQueue contains more entries than expected\n");
+ VerifyOrQuit(aExpectedLength != 0, "MessageQueue contains more entries than expected");
msgArg = va_arg(args, ot::Message *);
- VerifyOrQuit(msgArg == message, "MessageQueue content does not match what is expected.\n");
+ VerifyOrQuit(msgArg == message, "MessageQueue content does not match what is expected.");
aExpectedLength--;
}
- VerifyOrQuit(aExpectedLength == 0, "MessageQueue contains less entries than expected\n");
+ VerifyOrQuit(aExpectedLength == 0, "MessageQueue contains less entries than expected");
}
va_end(args);
@@ -156,7 +155,7 @@
ot::Message * msgLow[kNumTestMessages];
instance = testInitInstance();
- VerifyOrQuit(instance != NULL, "Null OpenThread instance\n");
+ VerifyOrQuit(instance != NULL, "Null OpenThread instance");
messagePool = &instance->Get<ot::MessagePool>();
@@ -164,170 +163,168 @@
for (int i = 0; i < kNumNewPriorityTestMessages; i++)
{
msgNet[i] = messagePool->New(ot::Message::kTypeIp6, 0, ot::Message::kPriorityNet);
- VerifyOrQuit(msgNet[i] != NULL, "Message::New failed\n");
+ VerifyOrQuit(msgNet[i] != NULL, "Message::New failed");
msgHigh[i] = messagePool->New(ot::Message::kTypeIp6, 0, ot::Message::kPriorityHigh);
- VerifyOrQuit(msgHigh[i] != NULL, "Message::New failed\n");
+ VerifyOrQuit(msgHigh[i] != NULL, "Message::New failed");
msgNor[i] = messagePool->New(ot::Message::kTypeIp6, 0, ot::Message::kPriorityNormal);
- VerifyOrQuit(msgNor[i] != NULL, "Message::New failed\n");
+ VerifyOrQuit(msgNor[i] != NULL, "Message::New failed");
msgLow[i] = messagePool->New(ot::Message::kTypeIp6, 0, ot::Message::kPriorityLow);
- VerifyOrQuit(msgLow[i] != NULL, "Message::New failed\n");
+ VerifyOrQuit(msgLow[i] != NULL, "Message::New failed");
}
// Check the failure case for `New()` for invalid argument.
VerifyOrQuit(messagePool->New(ot::Message::kTypeIp6, 0, ot::Message::kNumPriorities) == NULL,
- "Message::New() with out of range value did not fail as expected.\n");
+ "Message::New() with out of range value did not fail as expected.");
// Use the function "SetPriority()" to allocate messages with different priorities
for (int i = kNumNewPriorityTestMessages; i < kNumTestMessages; i++)
{
msgNet[i] = messagePool->New(ot::Message::kTypeIp6, 0);
- VerifyOrQuit(msgNet[i] != NULL, "Message::New failed\n");
- SuccessOrQuit(msgNet[i]->SetPriority(ot::Message::kPriorityNet), "Message:SetPriority failed\n");
+ VerifyOrQuit(msgNet[i] != NULL, "Message::New failed");
+ SuccessOrQuit(msgNet[i]->SetPriority(ot::Message::kPriorityNet), "Message:SetPriority failed");
msgHigh[i] = messagePool->New(ot::Message::kTypeIp6, 0);
- VerifyOrQuit(msgHigh[i] != NULL, "Message::New failed\n");
- SuccessOrQuit(msgHigh[i]->SetPriority(ot::Message::kPriorityHigh), "Message:SetPriority failed\n");
+ VerifyOrQuit(msgHigh[i] != NULL, "Message::New failed");
+ SuccessOrQuit(msgHigh[i]->SetPriority(ot::Message::kPriorityHigh), "Message:SetPriority failed");
msgNor[i] = messagePool->New(ot::Message::kTypeIp6, 0);
- VerifyOrQuit(msgNor[i] != NULL, "Message::New failed\n");
- SuccessOrQuit(msgNor[i]->SetPriority(ot::Message::kPriorityNormal), "Message:SetPriority failed\n");
+ VerifyOrQuit(msgNor[i] != NULL, "Message::New failed");
+ SuccessOrQuit(msgNor[i]->SetPriority(ot::Message::kPriorityNormal), "Message:SetPriority failed");
msgLow[i] = messagePool->New(ot::Message::kTypeIp6, 0);
- VerifyOrQuit(msgLow[i] != NULL, "Message::New failed\n");
- SuccessOrQuit(msgLow[i]->SetPriority(ot::Message::kPriorityLow), "Message:SetPriority failed\n");
+ VerifyOrQuit(msgLow[i] != NULL, "Message::New failed");
+ SuccessOrQuit(msgLow[i]->SetPriority(ot::Message::kPriorityLow), "Message:SetPriority failed");
}
// Check the failure case for `SetPriority()` for invalid argument.
VerifyOrQuit(msgNet[2]->SetPriority(ot::Message::kNumPriorities) == OT_ERROR_INVALID_ARGS,
- "Message::SetPriority() with out of range value did not fail as expected.\n");
+ "Message::SetPriority() with out of range value did not fail as expected.");
// Check the `GetPriority()`
for (int i = 0; i < kNumTestMessages; i++)
{
- VerifyOrQuit(msgLow[i]->GetPriority() == ot::Message::kPriorityLow, "Message::GetPriority failed.\n");
- VerifyOrQuit(msgNor[i]->GetPriority() == ot::Message::kPriorityNormal, "Message::GetPriority failed.\n");
- VerifyOrQuit(msgHigh[i]->GetPriority() == ot::Message::kPriorityHigh, "Message::GetPriority failed.\n");
- VerifyOrQuit(msgNet[i]->GetPriority() == ot::Message::kPriorityNet, "Message::GetPriority failed.\n");
+ VerifyOrQuit(msgLow[i]->GetPriority() == ot::Message::kPriorityLow, "Message::GetPriority failed.");
+ VerifyOrQuit(msgNor[i]->GetPriority() == ot::Message::kPriorityNormal, "Message::GetPriority failed.");
+ VerifyOrQuit(msgHigh[i]->GetPriority() == ot::Message::kPriorityHigh, "Message::GetPriority failed.");
+ VerifyOrQuit(msgNet[i]->GetPriority() == ot::Message::kPriorityNet, "Message::GetPriority failed.");
}
// Verify case of an empty queue.
VerifyPriorityQueueContent(queue, 0);
// Add msgs in different orders and check the content of queue.
- SuccessOrQuit(queue.Enqueue(*msgHigh[0]), "PriorityQueue::Enqueue() failed.\n");
+ SuccessOrQuit(queue.Enqueue(*msgHigh[0]), "PriorityQueue::Enqueue() failed.");
VerifyPriorityQueueContent(queue, 1, msgHigh[0]);
- SuccessOrQuit(queue.Enqueue(*msgHigh[1]), "PriorityQueue::Enqueue() failed.\n");
+ SuccessOrQuit(queue.Enqueue(*msgHigh[1]), "PriorityQueue::Enqueue() failed.");
VerifyPriorityQueueContent(queue, 2, msgHigh[0], msgHigh[1]);
- SuccessOrQuit(queue.Enqueue(*msgNet[0]), "PriorityQueue::Enqueue() failed.\n");
+ SuccessOrQuit(queue.Enqueue(*msgNet[0]), "PriorityQueue::Enqueue() failed.");
VerifyPriorityQueueContent(queue, 3, msgNet[0], msgHigh[0], msgHigh[1]);
- SuccessOrQuit(queue.Enqueue(*msgNet[1]), "PriorityQueue::Enqueue() failed.\n");
+ SuccessOrQuit(queue.Enqueue(*msgNet[1]), "PriorityQueue::Enqueue() failed.");
VerifyPriorityQueueContent(queue, 4, msgNet[0], msgNet[1], msgHigh[0], msgHigh[1]);
- SuccessOrQuit(queue.Enqueue(*msgHigh[2]), "PriorityQueue::Enqueue() failed.\n");
+ SuccessOrQuit(queue.Enqueue(*msgHigh[2]), "PriorityQueue::Enqueue() failed.");
VerifyPriorityQueueContent(queue, 5, msgNet[0], msgNet[1], msgHigh[0], msgHigh[1], msgHigh[2]);
- SuccessOrQuit(queue.Enqueue(*msgLow[0]), "PriorityQueue::Enqueue() failed.\n");
+ SuccessOrQuit(queue.Enqueue(*msgLow[0]), "PriorityQueue::Enqueue() failed.");
VerifyPriorityQueueContent(queue, 6, msgNet[0], msgNet[1], msgHigh[0], msgHigh[1], msgHigh[2], msgLow[0]);
- SuccessOrQuit(queue.Enqueue(*msgNor[0]), "PriorityQueue::Enqueue() failed.\n");
+ SuccessOrQuit(queue.Enqueue(*msgNor[0]), "PriorityQueue::Enqueue() failed.");
VerifyPriorityQueueContent(queue, 7, msgNet[0], msgNet[1], msgHigh[0], msgHigh[1], msgHigh[2], msgNor[0],
msgLow[0]);
- SuccessOrQuit(queue.Enqueue(*msgHigh[3]), "PriorityQueue::Enqueue() failed.\n");
+ SuccessOrQuit(queue.Enqueue(*msgHigh[3]), "PriorityQueue::Enqueue() failed.");
VerifyPriorityQueueContent(queue, 8, msgNet[0], msgNet[1], msgHigh[0], msgHigh[1], msgHigh[2], msgHigh[3],
msgNor[0], msgLow[0]);
// Remove messages in different order and check the content of queue in each step.
- SuccessOrQuit(queue.Dequeue(*msgNet[0]), "PriorityQueue::Dequeue() failed.\n");
+ SuccessOrQuit(queue.Dequeue(*msgNet[0]), "PriorityQueue::Dequeue() failed.");
VerifyPriorityQueueContent(queue, 7, msgNet[1], msgHigh[0], msgHigh[1], msgHigh[2], msgHigh[3], msgNor[0],
msgLow[0]);
- SuccessOrQuit(queue.Dequeue(*msgHigh[2]), "PriorityQueue::Dequeue() failed.\n");
+ SuccessOrQuit(queue.Dequeue(*msgHigh[2]), "PriorityQueue::Dequeue() failed.");
VerifyPriorityQueueContent(queue, 6, msgNet[1], msgHigh[0], msgHigh[1], msgHigh[3], msgNor[0], msgLow[0]);
- SuccessOrQuit(queue.Dequeue(*msgNor[0]), "PriorityQueue::Dequeue() failed.\n");
+ SuccessOrQuit(queue.Dequeue(*msgNor[0]), "PriorityQueue::Dequeue() failed.");
VerifyPriorityQueueContent(queue, 5, msgNet[1], msgHigh[0], msgHigh[1], msgHigh[3], msgLow[0]);
- SuccessOrQuit(queue.Dequeue(*msgHigh[1]), "PriorityQueue::Dequeue() failed.\n");
+ SuccessOrQuit(queue.Dequeue(*msgHigh[1]), "PriorityQueue::Dequeue() failed.");
VerifyPriorityQueueContent(queue, 4, msgNet[1], msgHigh[0], msgHigh[3], msgLow[0]);
- SuccessOrQuit(queue.Dequeue(*msgLow[0]), "PriorityQueue::Dequeue() failed.\n");
+ SuccessOrQuit(queue.Dequeue(*msgLow[0]), "PriorityQueue::Dequeue() failed.");
VerifyPriorityQueueContent(queue, 3, msgNet[1], msgHigh[0], msgHigh[3]);
- SuccessOrQuit(queue.Dequeue(*msgNet[1]), "PriorityQueue::Dequeue() failed.\n");
+ SuccessOrQuit(queue.Dequeue(*msgNet[1]), "PriorityQueue::Dequeue() failed.");
VerifyPriorityQueueContent(queue, 2, msgHigh[0], msgHigh[3]);
- SuccessOrQuit(queue.Dequeue(*msgHigh[0]), "PriorityQueue::Dequeue() failed.\n");
+ SuccessOrQuit(queue.Dequeue(*msgHigh[0]), "PriorityQueue::Dequeue() failed.");
VerifyPriorityQueueContent(queue, 1, msgHigh[3]);
- SuccessOrQuit(queue.Dequeue(*msgHigh[3]), "PriorityQueue::Dequeue() failed.\n");
+ SuccessOrQuit(queue.Dequeue(*msgHigh[3]), "PriorityQueue::Dequeue() failed.");
VerifyPriorityQueueContent(queue, 0);
// Check the failure cases: Enqueuing an already queued message, or dequeuing a message not queued.
- SuccessOrQuit(queue.Enqueue(*msgNet[0]), "PriorityQueue::Enqueue() failed.\n");
+ SuccessOrQuit(queue.Enqueue(*msgNet[0]), "PriorityQueue::Enqueue() failed.");
VerifyPriorityQueueContent(queue, 1, msgNet[0]);
VerifyOrQuit(queue.Enqueue(*msgNet[0]) == OT_ERROR_ALREADY,
- "Enqueuing an already queued message did not fail as expected.\n");
+ "Enqueuing an already queued message did not fail as expected.");
VerifyOrQuit(queue.Dequeue(*msgHigh[0]) == OT_ERROR_NOT_FOUND,
- "Dequeuing a message not queued, did not fail as expected.\n");
- SuccessOrQuit(queue.Dequeue(*msgNet[0]), "PriorityQueue::Dequeue() failed.\n");
+ "Dequeuing a message not queued, did not fail as expected.");
+ SuccessOrQuit(queue.Dequeue(*msgNet[0]), "PriorityQueue::Dequeue() failed.");
VerifyPriorityQueueContent(queue, 0);
// Change the priority of an already queued message and check the order change in the queue.
- SuccessOrQuit(queue.Enqueue(*msgNor[0]), "PriorityQueue::Enqueue() failed.\n");
+ SuccessOrQuit(queue.Enqueue(*msgNor[0]), "PriorityQueue::Enqueue() failed.");
VerifyPriorityQueueContent(queue, 1, msgNor[0]);
- SuccessOrQuit(queue.Enqueue(*msgHigh[0]), "PriorityQueue::Enqueue() failed.\n");
+ SuccessOrQuit(queue.Enqueue(*msgHigh[0]), "PriorityQueue::Enqueue() failed.");
VerifyPriorityQueueContent(queue, 2, msgHigh[0], msgNor[0]);
- SuccessOrQuit(queue.Enqueue(*msgLow[0]), "PriorityQueue::Enqueue() failed.\n");
+ SuccessOrQuit(queue.Enqueue(*msgLow[0]), "PriorityQueue::Enqueue() failed.");
VerifyPriorityQueueContent(queue, 3, msgHigh[0], msgNor[0], msgLow[0]);
SuccessOrQuit(msgNor[0]->SetPriority(ot::Message::kPriorityNet),
- "SetPriority failed for an already queued message.\n");
+ "SetPriority failed for an already queued message.");
VerifyPriorityQueueContent(queue, 3, msgNor[0], msgHigh[0], msgLow[0]);
SuccessOrQuit(msgLow[0]->SetPriority(ot::Message::kPriorityLow),
- "SetPriority failed for an already queued message.\n");
+ "SetPriority failed for an already queued message.");
VerifyPriorityQueueContent(queue, 3, msgNor[0], msgHigh[0], msgLow[0]);
SuccessOrQuit(msgLow[0]->SetPriority(ot::Message::kPriorityNormal),
- "SetPriority failed for an already queued message.\n");
+ "SetPriority failed for an already queued message.");
VerifyPriorityQueueContent(queue, 3, msgNor[0], msgHigh[0], msgLow[0]);
SuccessOrQuit(msgLow[0]->SetPriority(ot::Message::kPriorityHigh),
- "SetPriority failed for an already queued message.\n");
+ "SetPriority failed for an already queued message.");
VerifyPriorityQueueContent(queue, 3, msgNor[0], msgHigh[0], msgLow[0]);
SuccessOrQuit(msgLow[0]->SetPriority(ot::Message::kPriorityNet),
- "SetPriority failed for an already queued message.\n");
+ "SetPriority failed for an already queued message.");
VerifyPriorityQueueContent(queue, 3, msgNor[0], msgLow[0], msgHigh[0]);
SuccessOrQuit(msgNor[0]->SetPriority(ot::Message::kPriorityNormal),
- "SetPriority failed for an already queued message.\n");
+ "SetPriority failed for an already queued message.");
SuccessOrQuit(msgLow[0]->SetPriority(ot::Message::kPriorityLow),
- "SetPriority failed for an already queued message.\n");
+ "SetPriority failed for an already queued message.");
VerifyPriorityQueueContent(queue, 3, msgHigh[0], msgNor[0], msgLow[0]);
- SuccessOrQuit(messageQueue.Enqueue(*msgNor[1]), "MessageQueue::Enqueue() failed.\n");
- SuccessOrQuit(messageQueue.Enqueue(*msgHigh[1]), "MessageQueue::Enqueue() failed.\n");
- SuccessOrQuit(messageQueue.Enqueue(*msgNet[1]), "MessageQueue::Enqueue() failed.\n");
+ SuccessOrQuit(messageQueue.Enqueue(*msgNor[1]), "MessageQueue::Enqueue() failed.");
+ SuccessOrQuit(messageQueue.Enqueue(*msgHigh[1]), "MessageQueue::Enqueue() failed.");
+ SuccessOrQuit(messageQueue.Enqueue(*msgNet[1]), "MessageQueue::Enqueue() failed.");
VerifyMsgQueueContent(messageQueue, 3, msgNor[1], msgHigh[1], msgNet[1]);
// Change priority of message and check for not in messageQueue.
SuccessOrQuit(msgNor[1]->SetPriority(ot::Message::kPriorityNet),
- "SetPriority failed for an already queued message.\n");
+ "SetPriority failed for an already queued message.");
VerifyMsgQueueContent(messageQueue, 3, msgNor[1], msgHigh[1], msgNet[1]);
SuccessOrQuit(msgLow[0]->SetPriority(ot::Message::kPriorityHigh),
- "SetPriority failed for an already queued message.\n");
+ "SetPriority failed for an already queued message.");
VerifyPriorityQueueContent(queue, 3, msgHigh[0], msgLow[0], msgNor[0]);
VerifyMsgQueueContent(messageQueue, 3, msgNor[1], msgHigh[1], msgNet[1]);
// Remove messages from the two queues
- SuccessOrQuit(queue.Dequeue(*msgHigh[0]), "PriorityQueue::Dequeue() failed.\n");
+ SuccessOrQuit(queue.Dequeue(*msgHigh[0]), "PriorityQueue::Dequeue() failed.");
VerifyPriorityQueueContent(queue, 2, msgLow[0], msgNor[0]);
VerifyMsgQueueContent(messageQueue, 3, msgNor[1], msgHigh[1], msgNet[1]);
- SuccessOrQuit(messageQueue.Dequeue(*msgNet[1]), "MessageQueue::Dequeue() failed.\n");
+ SuccessOrQuit(messageQueue.Dequeue(*msgNet[1]), "MessageQueue::Dequeue() failed.");
VerifyPriorityQueueContent(queue, 2, msgLow[0], msgNor[0]);
VerifyMsgQueueContent(messageQueue, 2, msgNor[1], msgHigh[1]);
- SuccessOrQuit(messageQueue.Dequeue(*msgHigh[1]), "MessageQueue::Dequeue() failed.\n");
+ SuccessOrQuit(messageQueue.Dequeue(*msgHigh[1]), "MessageQueue::Dequeue() failed.");
VerifyPriorityQueueContent(queue, 2, msgLow[0], msgNor[0]);
VerifyMsgQueueContent(messageQueue, 1, msgNor[1]);
- SuccessOrQuit(queue.Dequeue(*msgLow[0]), "PriorityQueue::Dequeue() failed.\n");
+ SuccessOrQuit(queue.Dequeue(*msgLow[0]), "PriorityQueue::Dequeue() failed.");
VerifyPriorityQueueContent(queue, 1, msgNor[0]);
VerifyMsgQueueContent(messageQueue, 1, msgNor[1]);
testFreeInstance(instance);
}
-#ifdef ENABLE_TEST_MAIN
int main(void)
{
TestPriorityQueue();
printf("All tests passed\n");
return 0;
}
-#endif
diff --git a/tests/unit/test_pskc.cpp b/tests/unit/test_pskc.cpp
index 8d2a423..e80d0cd 100644
--- a/tests/unit/test_pskc.cpp
+++ b/tests/unit/test_pskc.cpp
@@ -29,7 +29,6 @@
#include "common/logging.hpp"
#include "meshcop/commissioner.hpp"
-#include "utils/wrap_string.h"
#include "test_platform.h"
#include "test_util.h"
@@ -40,20 +39,21 @@
void TestMinimumPassphrase(void)
{
- uint8_t pskc[OT_PSKC_MAX_SIZE];
+ ot::Pskc pskc;
const uint8_t expectedPskc[] = {0x44, 0x98, 0x8e, 0x22, 0xcf, 0x65, 0x2e, 0xee,
0xcc, 0xd1, 0xe4, 0xc0, 0x1d, 0x01, 0x54, 0xf8};
const char passphrase[] = "123456";
otInstance * instance = testInitInstance();
- SuccessOrQuit(ot::MeshCoP::Commissioner::GeneratePSKc(passphrase, "OpenThread", sXPanId, pskc),
+ SuccessOrQuit(ot::MeshCoP::Commissioner::GeneratePskc(passphrase, "OpenThread",
+ static_cast<const ot::Mac::ExtendedPanId &>(sXPanId), pskc),
"TestMinimumPassphrase failed to generate PSKc");
- VerifyOrQuit(memcmp(pskc, expectedPskc, sizeof(pskc)) == 0, "TestMinimumPassphrase got wrong pskc");
+ VerifyOrQuit(memcmp(pskc.m8, expectedPskc, sizeof(pskc)) == 0, "TestMinimumPassphrase got wrong pskc");
testFreeInstance(instance);
}
void TestMaximumPassphrase(void)
{
- uint8_t pskc[OT_PSKC_MAX_SIZE];
+ ot::Pskc pskc;
const uint8_t expectedPskc[] = {0x9e, 0x81, 0xbd, 0x35, 0xa2, 0x53, 0x76, 0x2f,
0x80, 0xee, 0x04, 0xff, 0x2f, 0xa2, 0x85, 0xe9};
const char passphrase[] = "1234567812345678"
@@ -74,13 +74,13 @@
"123456781234567";
otInstance *instance = testInitInstance();
- SuccessOrQuit(ot::MeshCoP::Commissioner::GeneratePSKc(passphrase, "OpenThread", sXPanId, pskc),
+ SuccessOrQuit(ot::MeshCoP::Commissioner::GeneratePskc(passphrase, "OpenThread",
+ static_cast<const ot::Mac::ExtendedPanId &>(sXPanId), pskc),
"TestMaximumPassphrase failed to generate PSKc");
- VerifyOrQuit(memcmp(pskc, expectedPskc, sizeof(pskc)) == 0, "TestMaximumPassphrase got wrong pskc");
+ VerifyOrQuit(memcmp(pskc.m8, expectedPskc, sizeof(pskc)) == 0, "TestMaximumPassphrase got wrong pskc");
testFreeInstance(instance);
}
-#ifdef ENABLE_TEST_MAIN
int main(void)
{
TestMinimumPassphrase();
@@ -88,16 +88,13 @@
printf("All tests passed\n");
return 0;
}
-#endif
#else // #if OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
-#ifdef ENABLE_TEST_MAIN
int main(void)
{
printf("Commissioenr role disabled\n");
return 0;
}
-#endif
#endif // #if OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
diff --git a/tests/unit/test_spinel_decoder.cpp b/tests/unit/test_spinel_decoder.cpp
index 4af4f9f..0a2d674 100644
--- a/tests/unit/test_spinel_decoder.cpp
+++ b/tests/unit/test_spinel_decoder.cpp
@@ -26,13 +26,11 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
-#include <ctype.h>
-
#include "common/code_utils.hpp"
#include "common/instance.hpp"
#include "ncp/spinel_decoder.hpp"
-#include "test_util.h"
+#include "test_util.hpp"
namespace ot {
namespace Ncp {
@@ -42,47 +40,6 @@
kTestBufferSize = 800,
};
-// Dump the buffer content to screen.
-void DumpBuffer(const char *aTextMessage, uint8_t *aBuffer, uint16_t aBufferLength)
-{
- enum
- {
- kBytesPerLine = 32, // Number of bytes per line.
- };
-
- char charBuff[kBytesPerLine + 1];
- uint16_t counter;
- uint8_t byte;
-
- printf("\n%s - len = %u\n ", aTextMessage, aBufferLength);
-
- counter = 0;
-
- while (aBufferLength--)
- {
- byte = *aBuffer++;
- printf("%02X ", byte);
- charBuff[counter] = isprint(byte) ? static_cast<char>(byte) : '.';
- counter++;
-
- if (counter == kBytesPerLine)
- {
- charBuff[counter] = 0;
- printf(" %s\n ", charBuff);
- counter = 0;
- }
- }
-
- charBuff[counter] = 0;
-
- while (counter++ < kBytesPerLine)
- {
- printf(" ");
- }
-
- printf(" %s\n", charBuff);
-}
-
void TestSpinelDecoder(void)
{
uint8_t buffer[kTestBufferSize];
@@ -684,11 +641,9 @@
} // namespace Ncp
} // namespace ot
-#ifdef ENABLE_TEST_MAIN
int main(void)
{
ot::Ncp::TestSpinelDecoder();
printf("\nAll tests passed.\n");
return 0;
}
-#endif
diff --git a/tests/unit/test_spinel_encoder.cpp b/tests/unit/test_spinel_encoder.cpp
index b19a825..3030bc4 100644
--- a/tests/unit/test_spinel_encoder.cpp
+++ b/tests/unit/test_spinel_encoder.cpp
@@ -26,13 +26,11 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
-#include <ctype.h>
-
#include "common/code_utils.hpp"
#include "common/instance.hpp"
#include "ncp/spinel_encoder.hpp"
-#include "test_util.h"
+#include "test_util.hpp"
namespace ot {
namespace Ncp {
@@ -42,47 +40,6 @@
kTestBufferSize = 800,
};
-// Dump the buffer content to screen.
-void DumpBuffer(const char *aTextMessage, uint8_t *aBuffer, uint16_t aBufferLength)
-{
- enum
- {
- kBytesPerLine = 32, // Number of bytes per line.
- };
-
- char charBuff[kBytesPerLine + 1];
- uint16_t counter;
- uint8_t byte;
-
- printf("\n%s - len = %u\n ", aTextMessage, aBufferLength);
-
- counter = 0;
-
- while (aBufferLength--)
- {
- byte = *aBuffer++;
- printf("%02X ", byte);
- charBuff[counter] = isprint(byte) ? static_cast<char>(byte) : '.';
- counter++;
-
- if (counter == kBytesPerLine)
- {
- charBuff[counter] = 0;
- printf(" %s\n ", charBuff);
- counter = 0;
- }
- }
-
- charBuff[counter] = 0;
-
- while (counter++ < kBytesPerLine)
- {
- printf(" ");
- }
-
- printf(" %s\n", charBuff);
-}
-
otError ReadFrame(NcpFrameBuffer &aNcpBuffer, uint8_t *aFrame, uint16_t &aFrameLen)
{
otError error = OT_ERROR_NONE;
@@ -403,11 +360,9 @@
} // namespace Ncp
} // namespace ot
-#ifdef ENABLE_TEST_MAIN
int main(void)
{
ot::Ncp::TestSpinelEncoder();
printf("\nAll tests passed.\n");
return 0;
}
-#endif
diff --git a/tests/unit/test_string.cpp b/tests/unit/test_string.cpp
index 1967aaa..692819a 100644
--- a/tests/unit/test_string.cpp
+++ b/tests/unit/test_string.cpp
@@ -117,13 +117,34 @@
printf(" -- PASS\n");
}
+void TestStringLength(void)
+{
+ char string_a[5] = "\0foo";
+ char string_b[8] = "foo\0bar";
+
+ printf("\nTest 4: String::StringLength() method\n");
+
+ VerifyOrQuit(StringLength(string_a, 0) == 0, "StringLength() 0len 0 fails");
+ VerifyOrQuit(StringLength(string_a, 1) == 0, "StringLength() 0len 1 fails");
+ VerifyOrQuit(StringLength(string_a, 2) == 0, "StringLength() 0len 2 fails");
+
+ VerifyOrQuit(StringLength(string_b, 0) == 0, "StringLength() 3len 0 fails");
+ VerifyOrQuit(StringLength(string_b, 1) == 1, "StringLength() 3len 1 fails");
+ VerifyOrQuit(StringLength(string_b, 2) == 2, "StringLength() 3len 2 fails");
+ VerifyOrQuit(StringLength(string_b, 3) == 3, "StringLength() 3len 3 fails");
+ VerifyOrQuit(StringLength(string_b, 4) == 3, "StringLength() 3len 4 fails");
+ VerifyOrQuit(StringLength(string_b, 5) == 3, "StringLength() 3len 5 fails");
+ VerifyOrQuit(StringLength(string_b, 6) == 3, "StringLength() 3len 6 fails");
+
+ printf(" -- PASS\n");
+}
+
} // namespace ot
-#ifdef ENABLE_TEST_MAIN
int main(void)
{
ot::TestString();
+ ot::TestStringLength();
printf("\nAll tests passed.\n");
return 0;
}
-#endif
diff --git a/tests/unit/test_strlcat.c b/tests/unit/test_strlcat.c
deleted file mode 100644
index e6bf863..0000000
--- a/tests/unit/test_strlcat.c
+++ /dev/null
@@ -1,66 +0,0 @@
-/*
- * Copyright (c) 2016-2017, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <openthread/config.h>
-
-#include <stdio.h>
-#include <stdlib.h>
-#include "utils/wrap_string.h"
-
-int main(int argc, char **argv)
-{
- char string_a[8] = "foo";
- char string_b[8] = "barbar";
- size_t ret = 0;
- int errors = 0;
-
- (void)argc;
- (void)argv;
-
- ret = missing_strlcat(string_a, string_b, sizeof(string_a));
-
- if (0 != strcmp(string_a, "foobarb"))
- {
- printf("strcmp failed\n");
- errors++;
- }
-
- if (ret != 9)
- {
- printf("strlcat return value is wrong (%d)\n", (int)ret);
- errors++;
- }
-
- if (errors != 0)
- {
- printf("FAIL\n");
- return EXIT_FAILURE;
- }
-
- printf("OK\n");
- return EXIT_SUCCESS;
-}
diff --git a/tests/unit/test_strlcpy.c b/tests/unit/test_strlcpy.c
deleted file mode 100644
index 8c9ac43..0000000
--- a/tests/unit/test_strlcpy.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * Copyright (c) 2016-2017, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <openthread/config.h>
-
-#include <stdio.h>
-#include <stdlib.h>
-#include "utils/wrap_string.h"
-
-int main(int argc, char **argv)
-{
- char string_a[8] = "foo";
- char string_b[] = "barbarbar";
- size_t ret = 0;
- int errors = 0;
-
- (void)argc;
- (void)argv;
- ret = strlcpy(string_a, string_b, sizeof(string_a));
-
- if (0 != strcmp(string_a, "barbarb"))
- {
- printf("strcmp failed\n");
- errors++;
- }
-
- if (ret != 9)
- {
- printf("strlcpy return value is wrong (%d)\n", (int)ret);
- errors++;
- }
-
- if (errors != 0)
- {
- printf("FAIL\n");
- return EXIT_FAILURE;
- }
-
- printf("OK\n");
- return EXIT_SUCCESS;
-}
diff --git a/tests/unit/test_strnlen.c b/tests/unit/test_strnlen.c
deleted file mode 100644
index 73be627..0000000
--- a/tests/unit/test_strnlen.c
+++ /dev/null
@@ -1,100 +0,0 @@
-/*
- * Copyright (c) 2016-2017, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <openthread/config.h>
-
-#include <stdio.h>
-#include <stdlib.h>
-#include "utils/wrap_string.h"
-
-static void fail(const char *msg)
-{
- fprintf(stderr, "%s\n", msg);
- exit(EXIT_FAILURE);
-}
-
-int main(int argc, char **argv)
-{
- char string_a[5] = "\0foo";
- char string_b[8] = "foo\0bar";
-
- (void)argc;
- (void)argv;
-
- if (0 != missing_strnlen(string_a, 0))
- {
- fail("0len 0 fails");
- }
-
- if (0 != missing_strnlen(string_a, 1))
- {
- fail("0len 1 fails");
- }
-
- if (0 != missing_strnlen(string_a, 2))
- {
- fail("0len 2 fails");
- }
-
- if (0 != missing_strnlen(string_b, 0))
- {
- fail("3len 0 fails");
- }
-
- if (1 != missing_strnlen(string_b, 1))
- {
- fail("3len 1 fails");
- }
-
- if (2 != missing_strnlen(string_b, 2))
- {
- fail("3len 2 fails");
- }
-
- if (3 != missing_strnlen(string_b, 3))
- {
- fail("3len 3 fails");
- }
-
- if (3 != missing_strnlen(string_b, 4))
- {
- fail("3len 4 fails");
- }
-
- if (3 != missing_strnlen(string_b, 5))
- {
- fail("3len 5 fails");
- }
-
- if (3 != missing_strnlen(string_b, 6))
- {
- fail("3len 6 fails");
- }
-
- printf("OK\n");
- return EXIT_SUCCESS;
-}
diff --git a/tests/unit/test_timer.cpp b/tests/unit/test_timer.cpp
index 2b06018..9b86871 100644
--- a/tests/unit/test_timer.cpp
+++ b/tests/unit/test_timer.cpp
@@ -128,22 +128,22 @@
sNow = kTimeT0;
timer.Start(kTimerInterval);
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 1, "TestOneTimer: Start CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestOneTimer: Stop CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 0, "TestOneTimer: Handler CallCount Failed.\n");
- VerifyOrQuit(sPlatT0 == 1000 && sPlatDt == 10, "TestOneTimer: Start params Failed.\n");
- VerifyOrQuit(timer.IsRunning(), "TestOneTimer: Timer running Failed.\n");
- VerifyOrQuit(sTimerOn, "TestOneTimer: Platform Timer State Failed.\n");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 1, "TestOneTimer: Start CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestOneTimer: Stop CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 0, "TestOneTimer: Handler CallCount Failed.");
+ VerifyOrQuit(sPlatT0 == 1000 && sPlatDt == 10, "TestOneTimer: Start params Failed.");
+ VerifyOrQuit(timer.IsRunning(), "TestOneTimer: Timer running Failed.");
+ VerifyOrQuit(sTimerOn, "TestOneTimer: Platform Timer State Failed.");
sNow += kTimerInterval;
otPlatAlarmMilliFired(instance);
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 1, "TestOneTimer: Start CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 1, "TestOneTimer: Stop CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 1, "TestOneTimer: Handler CallCount Failed.\n");
- VerifyOrQuit(timer.IsRunning() == false, "TestOneTimer: Timer running Failed.\n");
- VerifyOrQuit(sTimerOn == false, "TestOneTimer: Platform Timer State Failed.\n");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 1, "TestOneTimer: Start CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 1, "TestOneTimer: Stop CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 1, "TestOneTimer: Handler CallCount Failed.");
+ VerifyOrQuit(timer.IsRunning() == false, "TestOneTimer: Timer running Failed.");
+ VerifyOrQuit(sTimerOn == false, "TestOneTimer: Platform Timer State Failed.");
// Test one Timer that spans the 32-bit wrap.
@@ -152,22 +152,22 @@
sNow = 0 - (kTimerInterval - 2);
timer.Start(kTimerInterval);
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 1, "TestOneTimer: Start CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestOneTimer: Stop CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 0, "TestOneTimer: Handler CallCount Failed.\n");
- VerifyOrQuit(sPlatT0 == 0 - (kTimerInterval - 2) && sPlatDt == 10, "TestOneTimer: Start params Failed.\n");
- VerifyOrQuit(timer.IsRunning(), "TestOneTimer: Timer running Failed.\n");
- VerifyOrQuit(sTimerOn, "TestOneTimer: Platform Timer State Failed.\n");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 1, "TestOneTimer: Start CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestOneTimer: Stop CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 0, "TestOneTimer: Handler CallCount Failed.");
+ VerifyOrQuit(sPlatT0 == 0 - (kTimerInterval - 2) && sPlatDt == 10, "TestOneTimer: Start params Failed.");
+ VerifyOrQuit(timer.IsRunning(), "TestOneTimer: Timer running Failed.");
+ VerifyOrQuit(sTimerOn, "TestOneTimer: Platform Timer State Failed.");
sNow += kTimerInterval;
otPlatAlarmMilliFired(instance);
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 1, "TestOneTimer: Start CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 1, "TestOneTimer: Stop CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 1, "TestOneTimer: Handler CallCount Failed.\n");
- VerifyOrQuit(timer.IsRunning() == false, "TestOneTimer: Timer running Failed.\n");
- VerifyOrQuit(sTimerOn == false, "TestOneTimer: Platform Timer State Failed.\n");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 1, "TestOneTimer: Start CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 1, "TestOneTimer: Stop CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 1, "TestOneTimer: Handler CallCount Failed.");
+ VerifyOrQuit(timer.IsRunning() == false, "TestOneTimer: Timer running Failed.");
+ VerifyOrQuit(sTimerOn == false, "TestOneTimer: Platform Timer State Failed.");
// Test one Timer that is late by several msec
@@ -176,22 +176,22 @@
sNow = kTimeT0;
timer.Start(kTimerInterval);
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 1, "TestOneTimer: Start CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestOneTimer: Stop CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 0, "TestOneTimer: Handler CallCount Failed.\n");
- VerifyOrQuit(sPlatT0 == 1000 && sPlatDt == 10, "TestOneTimer: Start params Failed.\n");
- VerifyOrQuit(timer.IsRunning(), "TestOneTimer: Timer running Failed.\n");
- VerifyOrQuit(sTimerOn, "TestOneTimer: Platform Timer State Failed.\n");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 1, "TestOneTimer: Start CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestOneTimer: Stop CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 0, "TestOneTimer: Handler CallCount Failed.");
+ VerifyOrQuit(sPlatT0 == 1000 && sPlatDt == 10, "TestOneTimer: Start params Failed.");
+ VerifyOrQuit(timer.IsRunning(), "TestOneTimer: Timer running Failed.");
+ VerifyOrQuit(sTimerOn, "TestOneTimer: Platform Timer State Failed.");
sNow += kTimerInterval + 5;
otPlatAlarmMilliFired(instance);
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 1, "TestOneTimer: Start CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 1, "TestOneTimer: Stop CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 1, "TestOneTimer: Handler CallCount Failed.\n");
- VerifyOrQuit(timer.IsRunning() == false, "TestOneTimer: Timer running Failed.\n");
- VerifyOrQuit(sTimerOn == false, "TestOneTimer: Platform Timer State Failed.\n");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 1, "TestOneTimer: Start CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 1, "TestOneTimer: Stop CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 1, "TestOneTimer: Handler CallCount Failed.");
+ VerifyOrQuit(timer.IsRunning() == false, "TestOneTimer: Timer running Failed.");
+ VerifyOrQuit(sTimerOn == false, "TestOneTimer: Platform Timer State Failed.");
// Test one Timer that is early by several msec
@@ -200,32 +200,32 @@
sNow = kTimeT0;
timer.Start(kTimerInterval);
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 1, "TestOneTimer: Start CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestOneTimer: Stop CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 0, "TestOneTimer: Handler CallCount Failed.\n");
- VerifyOrQuit(sPlatT0 == 1000 && sPlatDt == 10, "TestOneTimer: Start params Failed.\n");
- VerifyOrQuit(timer.IsRunning(), "TestOneTimer: Timer running Failed.\n");
- VerifyOrQuit(sTimerOn, "TestOneTimer: Platform Timer State Failed.\n");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 1, "TestOneTimer: Start CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestOneTimer: Stop CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 0, "TestOneTimer: Handler CallCount Failed.");
+ VerifyOrQuit(sPlatT0 == 1000 && sPlatDt == 10, "TestOneTimer: Start params Failed.");
+ VerifyOrQuit(timer.IsRunning(), "TestOneTimer: Timer running Failed.");
+ VerifyOrQuit(sTimerOn, "TestOneTimer: Platform Timer State Failed.");
sNow += kTimerInterval - 2;
otPlatAlarmMilliFired(instance);
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 2, "TestOneTimer: Start CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestOneTimer: Stop CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 0, "TestOneTimer: Handler CallCount Failed.\n");
- VerifyOrQuit(timer.IsRunning() == true, "TestOneTimer: Timer running Failed.\n");
- VerifyOrQuit(sTimerOn == true, "TestOneTimer: Platform Timer State Failed.\n");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 2, "TestOneTimer: Start CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestOneTimer: Stop CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 0, "TestOneTimer: Handler CallCount Failed.");
+ VerifyOrQuit(timer.IsRunning() == true, "TestOneTimer: Timer running Failed.");
+ VerifyOrQuit(sTimerOn == true, "TestOneTimer: Platform Timer State Failed.");
sNow += kTimerInterval;
otPlatAlarmMilliFired(instance);
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 2, "TestOneTimer: Start CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 1, "TestOneTimer: Stop CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 1, "TestOneTimer: Handler CallCount Failed.\n");
- VerifyOrQuit(timer.IsRunning() == false, "TestOneTimer: Timer running Failed.\n");
- VerifyOrQuit(sTimerOn == false, "TestOneTimer: Platform Timer State Failed.\n");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 2, "TestOneTimer: Start CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 1, "TestOneTimer: Stop CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 1, "TestOneTimer: Handler CallCount Failed.");
+ VerifyOrQuit(timer.IsRunning() == false, "TestOneTimer: Timer running Failed.");
+ VerifyOrQuit(sTimerOn == false, "TestOneTimer: Platform Timer State Failed.");
printf(" --> PASSED\n");
@@ -255,47 +255,47 @@
sNow = kTimeT0;
timer1.Start(kTimerInterval);
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 1, "TestTwoTimers: Start CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestTwoTimers: Stop CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 0, "TestTwoTimers: Handler CallCount Failed.\n");
- VerifyOrQuit(sPlatT0 == kTimeT0 && sPlatDt == kTimerInterval, "TestTwoTimers: Start params Failed.\n");
- VerifyOrQuit(timer1.IsRunning(), "TestTwoTimers: Timer running Failed.\n");
- VerifyOrQuit(timer2.IsRunning() == false, "TestTwoTimers: Timer running Failed.\n");
- VerifyOrQuit(sTimerOn, "TestTwoTimers: Platform Timer State Failed.\n");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 1, "TestTwoTimers: Start CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestTwoTimers: Stop CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 0, "TestTwoTimers: Handler CallCount Failed.");
+ VerifyOrQuit(sPlatT0 == kTimeT0 && sPlatDt == kTimerInterval, "TestTwoTimers: Start params Failed.");
+ VerifyOrQuit(timer1.IsRunning(), "TestTwoTimers: Timer running Failed.");
+ VerifyOrQuit(timer2.IsRunning() == false, "TestTwoTimers: Timer running Failed.");
+ VerifyOrQuit(sTimerOn, "TestTwoTimers: Platform Timer State Failed.");
sNow += kTimerInterval;
timer2.Start(kTimerInterval);
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 1, "TestTwoTimers: Start CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestTwoTimers: Stop CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 0, "TestTwoTimers: Handler CallCount Failed.\n");
- VerifyOrQuit(sPlatT0 == kTimeT0 && sPlatDt == kTimerInterval, "TestTwoTimers: Start params Failed.\n");
- VerifyOrQuit(timer1.IsRunning() == true, "TestTwoTimers: Timer running Failed.\n");
- VerifyOrQuit(timer2.IsRunning() == true, "TestTwoTimers: Timer running Failed.\n");
- VerifyOrQuit(sTimerOn, "TestTwoTimers: Platform Timer State Failed.\n");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 1, "TestTwoTimers: Start CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestTwoTimers: Stop CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 0, "TestTwoTimers: Handler CallCount Failed.");
+ VerifyOrQuit(sPlatT0 == kTimeT0 && sPlatDt == kTimerInterval, "TestTwoTimers: Start params Failed.");
+ VerifyOrQuit(timer1.IsRunning() == true, "TestTwoTimers: Timer running Failed.");
+ VerifyOrQuit(timer2.IsRunning() == true, "TestTwoTimers: Timer running Failed.");
+ VerifyOrQuit(sTimerOn, "TestTwoTimers: Platform Timer State Failed.");
otPlatAlarmMilliFired(instance);
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 2, "TestTwoTimers: Start CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestTwoTimers: Stop CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 1, "TestTwoTimers: Handler CallCount Failed.\n");
- VerifyOrQuit(timer1.GetFiredCounter() == 1, "TestTwoTimers: Fire Counter failed.\n");
- VerifyOrQuit(sPlatT0 == sNow && sPlatDt == kTimerInterval, "TestTwoTimers: Start params Failed.\n");
- VerifyOrQuit(timer1.IsRunning() == false, "TestTwoTimers: Timer running Failed.\n");
- VerifyOrQuit(timer2.IsRunning() == true, "TestTwoTimers: Timer running Failed.\n");
- VerifyOrQuit(sTimerOn == true, "TestTwoTimers: Platform Timer State Failed.\n");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 2, "TestTwoTimers: Start CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestTwoTimers: Stop CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 1, "TestTwoTimers: Handler CallCount Failed.");
+ VerifyOrQuit(timer1.GetFiredCounter() == 1, "TestTwoTimers: Fire Counter failed.");
+ VerifyOrQuit(sPlatT0 == sNow && sPlatDt == kTimerInterval, "TestTwoTimers: Start params Failed.");
+ VerifyOrQuit(timer1.IsRunning() == false, "TestTwoTimers: Timer running Failed.");
+ VerifyOrQuit(timer2.IsRunning() == true, "TestTwoTimers: Timer running Failed.");
+ VerifyOrQuit(sTimerOn == true, "TestTwoTimers: Platform Timer State Failed.");
sNow += kTimerInterval;
otPlatAlarmMilliFired(instance);
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 2, "TestTwoTimers: Start CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 1, "TestTwoTimers: Stop CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 2, "TestTwoTimers: Handler CallCount Failed.\n");
- VerifyOrQuit(timer2.GetFiredCounter() == 1, "TestTwoTimers: Fire Counter failed.\n");
- VerifyOrQuit(timer1.IsRunning() == false, "TestTwoTimers: Timer running Failed.\n");
- VerifyOrQuit(timer2.IsRunning() == false, "TestTwoTimers: Timer running Failed.\n");
- VerifyOrQuit(sTimerOn == false, "TestTwoTimers: Platform Timer State Failed.\n");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 2, "TestTwoTimers: Start CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 1, "TestTwoTimers: Stop CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 2, "TestTwoTimers: Handler CallCount Failed.");
+ VerifyOrQuit(timer2.GetFiredCounter() == 1, "TestTwoTimers: Fire Counter failed.");
+ VerifyOrQuit(timer1.IsRunning() == false, "TestTwoTimers: Timer running Failed.");
+ VerifyOrQuit(timer2.IsRunning() == false, "TestTwoTimers: Timer running Failed.");
+ VerifyOrQuit(sTimerOn == false, "TestTwoTimers: Platform Timer State Failed.");
// Test when second timer starts at the fire time of first timer (before otPlatAlarmMilliFired()) and its fire time
// is before the first timer. Ensure that the second timer handler is invoked before the first one.
@@ -307,41 +307,41 @@
sNow = kTimeT0;
timer1.Start(kTimerInterval);
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 1, "TestTwoTimers: Start CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestTwoTimers: Stop CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 0, "TestTwoTimers: Handler CallCount Failed.\n");
- VerifyOrQuit(sPlatT0 == kTimeT0 && sPlatDt == kTimerInterval, "TestTwoTimers: Start params Failed.\n");
- VerifyOrQuit(timer1.IsRunning(), "TestTwoTimers: Timer running Failed.\n");
- VerifyOrQuit(timer2.IsRunning() == false, "TestTwoTimers: Timer running Failed.\n");
- VerifyOrQuit(sTimerOn, "TestTwoTimers: Platform Timer State Failed.\n");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 1, "TestTwoTimers: Start CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestTwoTimers: Stop CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 0, "TestTwoTimers: Handler CallCount Failed.");
+ VerifyOrQuit(sPlatT0 == kTimeT0 && sPlatDt == kTimerInterval, "TestTwoTimers: Start params Failed.");
+ VerifyOrQuit(timer1.IsRunning(), "TestTwoTimers: Timer running Failed.");
+ VerifyOrQuit(timer2.IsRunning() == false, "TestTwoTimers: Timer running Failed.");
+ VerifyOrQuit(sTimerOn, "TestTwoTimers: Platform Timer State Failed.");
sNow += kTimerInterval;
- timer2.StartAt(kTimeT0, kTimerInterval - 2); // Timer 2 is even before timer 1
+ timer2.StartAt(ot::TimeMilli(kTimeT0), kTimerInterval - 2); // Timer 2 is even before timer 1
- VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 0, "TestTwoTimers: Handler CallCount Failed.\n");
- VerifyOrQuit(timer1.IsRunning() == true, "TestTwoTimers: Timer running Failed.\n");
- VerifyOrQuit(timer2.IsRunning() == true, "TestTwoTimers: Timer running Failed.\n");
- VerifyOrQuit(sTimerOn, "TestTwoTimers: Platform Timer State Failed.\n");
+ VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 0, "TestTwoTimers: Handler CallCount Failed.");
+ VerifyOrQuit(timer1.IsRunning() == true, "TestTwoTimers: Timer running Failed.");
+ VerifyOrQuit(timer2.IsRunning() == true, "TestTwoTimers: Timer running Failed.");
+ VerifyOrQuit(sTimerOn, "TestTwoTimers: Platform Timer State Failed.");
otPlatAlarmMilliFired(instance);
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestTwoTimers: Stop CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 1, "TestTwoTimers: Handler CallCount Failed.\n");
- VerifyOrQuit(timer2.GetFiredCounter() == 1, "TestTwoTimers: Fire Counter failed.\n");
- VerifyOrQuit(sPlatT0 == sNow && sPlatDt == 0, "TestTwoTimers: Start params Failed.\n");
- VerifyOrQuit(timer1.IsRunning() == true, "TestTwoTimers: Timer running Failed.\n");
- VerifyOrQuit(timer2.IsRunning() == false, "TestTwoTimers: Timer running Failed.\n");
- VerifyOrQuit(sTimerOn == true, "TestTwoTimers: Platform Timer State Failed.\n");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestTwoTimers: Stop CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 1, "TestTwoTimers: Handler CallCount Failed.");
+ VerifyOrQuit(timer2.GetFiredCounter() == 1, "TestTwoTimers: Fire Counter failed.");
+ VerifyOrQuit(sPlatT0 == sNow && sPlatDt == 0, "TestTwoTimers: Start params Failed.");
+ VerifyOrQuit(timer1.IsRunning() == true, "TestTwoTimers: Timer running Failed.");
+ VerifyOrQuit(timer2.IsRunning() == false, "TestTwoTimers: Timer running Failed.");
+ VerifyOrQuit(sTimerOn == true, "TestTwoTimers: Platform Timer State Failed.");
otPlatAlarmMilliFired(instance);
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 1, "TestTwoTimers: Stop CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 2, "TestTwoTimers: Handler CallCount Failed.\n");
- VerifyOrQuit(timer1.GetFiredCounter() == 1, "TestTwoTimers: Fire Counter failed.\n");
- VerifyOrQuit(timer1.IsRunning() == false, "TestTwoTimers: Timer running Failed.\n");
- VerifyOrQuit(timer2.IsRunning() == false, "TestTwoTimers: Timer running Failed.\n");
- VerifyOrQuit(sTimerOn == false, "TestTwoTimers: Platform Timer State Failed.\n");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 1, "TestTwoTimers: Stop CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 2, "TestTwoTimers: Handler CallCount Failed.");
+ VerifyOrQuit(timer1.GetFiredCounter() == 1, "TestTwoTimers: Fire Counter failed.");
+ VerifyOrQuit(timer1.IsRunning() == false, "TestTwoTimers: Timer running Failed.");
+ VerifyOrQuit(timer2.IsRunning() == false, "TestTwoTimers: Timer running Failed.");
+ VerifyOrQuit(sTimerOn == false, "TestTwoTimers: Platform Timer State Failed.");
// Timer 1 fire callback is late by some ticks/ms, and second timer is scheduled (before call to
// otPlatAlarmMilliFired) with a maximum interval. This is to test (corner-case) scenario where the fire time of two
@@ -354,47 +354,47 @@
sNow = kTimeT0;
timer1.Start(kTimerInterval);
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 1, "TestTwoTimers: Start CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestTwoTimers: Stop CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 0, "TestTwoTimers: Handler CallCount Failed.\n");
- VerifyOrQuit(sPlatT0 == kTimeT0 && sPlatDt == kTimerInterval, "TestTwoTimers: Start params Failed.\n");
- VerifyOrQuit(timer1.IsRunning(), "TestTwoTimers: Timer running Failed.\n");
- VerifyOrQuit(timer2.IsRunning() == false, "TestTwoTimers: Timer running Failed.\n");
- VerifyOrQuit(sTimerOn, "TestTwoTimers: Platform Timer State Failed.\n");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 1, "TestTwoTimers: Start CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestTwoTimers: Stop CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 0, "TestTwoTimers: Handler CallCount Failed.");
+ VerifyOrQuit(sPlatT0 == kTimeT0 && sPlatDt == kTimerInterval, "TestTwoTimers: Start params Failed.");
+ VerifyOrQuit(timer1.IsRunning(), "TestTwoTimers: Timer running Failed.");
+ VerifyOrQuit(timer2.IsRunning() == false, "TestTwoTimers: Timer running Failed.");
+ VerifyOrQuit(sTimerOn, "TestTwoTimers: Platform Timer State Failed.");
sNow += kTimerInterval + 5;
- timer2.Start(ot::Timer::kMaxDt);
+ timer2.Start(ot::Timer::kMaxDelay);
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 1, "TestTwoTimers: Start CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestTwoTimers: Stop CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 0, "TestTwoTimers: Handler CallCount Failed.\n");
- VerifyOrQuit(timer1.IsRunning() == true, "TestTwoTimers: Timer running Failed.\n");
- VerifyOrQuit(timer2.IsRunning() == true, "TestTwoTimers: Timer running Failed.\n");
- VerifyOrQuit(sTimerOn, "TestTwoTimers: Platform Timer State Failed.\n");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 1, "TestTwoTimers: Start CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestTwoTimers: Stop CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 0, "TestTwoTimers: Handler CallCount Failed.");
+ VerifyOrQuit(timer1.IsRunning() == true, "TestTwoTimers: Timer running Failed.");
+ VerifyOrQuit(timer2.IsRunning() == true, "TestTwoTimers: Timer running Failed.");
+ VerifyOrQuit(sTimerOn, "TestTwoTimers: Platform Timer State Failed.");
otPlatAlarmMilliFired(instance);
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 2, "TestTwoTimers: Start CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestTwoTimers: Stop CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 1, "TestTwoTimers: Handler CallCount Failed.\n");
- VerifyOrQuit(timer1.GetFiredCounter() == 1, "TestTwoTimers: Fire Counter failed.\n");
- VerifyOrQuit(sPlatT0 == sNow, "TestTwoTimers: Start params Failed.\n");
- VerifyOrQuit(sPlatDt == ot::Timer::kMaxDt, "TestTwoTimers: Start params Failed.\n");
- VerifyOrQuit(timer1.IsRunning() == false, "TestTwoTimers: Timer running Failed.\n");
- VerifyOrQuit(timer2.IsRunning() == true, "TestTwoTimers: Timer running Failed.\n");
- VerifyOrQuit(sTimerOn == true, "TestTwoTimers: Platform Timer State Failed.\n");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 2, "TestTwoTimers: Start CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestTwoTimers: Stop CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 1, "TestTwoTimers: Handler CallCount Failed.");
+ VerifyOrQuit(timer1.GetFiredCounter() == 1, "TestTwoTimers: Fire Counter failed.");
+ VerifyOrQuit(sPlatT0 == sNow, "TestTwoTimers: Start params Failed.");
+ VerifyOrQuit(sPlatDt == ot::Timer::kMaxDelay, "TestTwoTimers: Start params Failed.");
+ VerifyOrQuit(timer1.IsRunning() == false, "TestTwoTimers: Timer running Failed.");
+ VerifyOrQuit(timer2.IsRunning() == true, "TestTwoTimers: Timer running Failed.");
+ VerifyOrQuit(sTimerOn == true, "TestTwoTimers: Platform Timer State Failed.");
- sNow += ot::Timer::kMaxDt;
+ sNow += ot::Timer::kMaxDelay;
otPlatAlarmMilliFired(instance);
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 2, "TestTwoTimers: Start CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 1, "TestTwoTimers: Stop CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 2, "TestTwoTimers: Handler CallCount Failed.\n");
- VerifyOrQuit(timer2.GetFiredCounter() == 1, "TestTwoTimers: Fire Counter failed.\n");
- VerifyOrQuit(timer1.IsRunning() == false, "TestTwoTimers: Timer running Failed.\n");
- VerifyOrQuit(timer2.IsRunning() == false, "TestTwoTimers: Timer running Failed.\n");
- VerifyOrQuit(sTimerOn == false, "TestTwoTimers: Platform Timer State Failed.\n");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 2, "TestTwoTimers: Start CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 1, "TestTwoTimers: Stop CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 2, "TestTwoTimers: Handler CallCount Failed.");
+ VerifyOrQuit(timer2.GetFiredCounter() == 1, "TestTwoTimers: Fire Counter failed.");
+ VerifyOrQuit(timer1.IsRunning() == false, "TestTwoTimers: Timer running Failed.");
+ VerifyOrQuit(timer2.IsRunning() == false, "TestTwoTimers: Timer running Failed.");
+ VerifyOrQuit(sTimerOn == false, "TestTwoTimers: Platform Timer State Failed.");
printf(" --> PASSED\n");
@@ -415,7 +415,7 @@
const uint32_t kNumTriggers = 7;
const uint32_t kTimeT0[kNumTimers] = {1000, 1000, 1001, 1002, 1003, 1004, 1005, 1006, 1007, 1008};
const uint32_t kTimerInterval[kNumTimers] = {
- 20, 100, (ot::Timer::kMaxDt - kTimeT0[2]), 100000, 1000000, 10, ot::Timer::kMaxDt, 200, 200, 200};
+ 20, 100, (ot::Timer::kMaxDelay - kTimeT0[2]), 100000, 1000000, 10, ot::Timer::kMaxDelay, 200, 200, 200};
// Expected timer fire order
// timer # Trigger time
// 5 1014
@@ -426,10 +426,10 @@
// 9 1208
// 3 101002
// 4 1001003
- // 2 kMaxDt
- // 6 kMaxDt + 1005
+ // 2 kMaxDuration
+ // 6 kMaxDuration + 1005
const uint32_t kTriggerTimes[kNumTriggers] = {
- 1014, 1020, 1100, 1207, 101004, ot::Timer::kMaxDt, ot::Timer::kMaxDt + kTimeT0[6]};
+ 1014, 1020, 1100, 1207, 101004, ot::Timer::kMaxDelay, ot::Timer::kMaxDelay + kTimeT0[6]};
// Expected timers fired by each kTriggerTimes[] value
// Trigger # Timers Fired
// 0 5
@@ -488,16 +488,16 @@
// given the order in which timers are started, the TimerScheduler should call otPlatAlarmMilliStartAt 2 times.
// one for timer[0] and one for timer[5] which will supercede timer[0].
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 2, "TestTenTimer: Start CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestTenTimer: Stop CallCount Failed.\n");
- VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 0, "TestTenTimer: Handler CallCount Failed.\n");
- VerifyOrQuit(sPlatT0 == kTimeT0[5] + aTimeShift, "TestTenTimer: Start params Failed.\n");
- VerifyOrQuit(sPlatDt == kTimerInterval[5], "TestTenTimer: Start params Failed.\n");
- VerifyOrQuit(sTimerOn, "TestTenTimer: Platform Timer State Failed.\n");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == 2, "TestTenTimer: Start CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == 0, "TestTenTimer: Stop CallCount Failed.");
+ VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == 0, "TestTenTimer: Handler CallCount Failed.");
+ VerifyOrQuit(sPlatT0 == kTimeT0[5] + aTimeShift, "TestTenTimer: Start params Failed.");
+ VerifyOrQuit(sPlatDt == kTimerInterval[5], "TestTenTimer: Start params Failed.");
+ VerifyOrQuit(sTimerOn, "TestTenTimer: Platform Timer State Failed.");
for (i = 0; i < kNumTimers; i++)
{
- VerifyOrQuit(timers[i]->IsRunning(), "TestTenTimer: Timer running Failed.\n");
+ VerifyOrQuit(timers[i]->IsRunning(), "TestTenTimer: Timer running Failed.");
}
// Issue the triggers and test the State after each trigger.
@@ -518,23 +518,23 @@
} while (sPlatDt == 0);
VerifyOrQuit(sCallCount[kCallCountIndexAlarmStart] == kTimerStartCountAfterTrigger[trigger],
- "TestTenTimer: Start CallCount Failed.\n");
+ "TestTenTimer: Start CallCount Failed.");
VerifyOrQuit(sCallCount[kCallCountIndexAlarmStop] == kTimerStopCountAfterTrigger[trigger],
- "TestTenTimer: Stop CallCount Failed.\n");
+ "TestTenTimer: Stop CallCount Failed.");
VerifyOrQuit(sCallCount[kCallCountIndexTimerHandler] == kTimerHandlerCountAfterTrigger[trigger],
- "TestTenTimer: Handler CallCount Failed.\n");
- VerifyOrQuit(sTimerOn == kSchedulerStateAfterTrigger[trigger], "TestTenTimer: Platform Timer State Failed.\n");
+ "TestTenTimer: Handler CallCount Failed.");
+ VerifyOrQuit(sTimerOn == kSchedulerStateAfterTrigger[trigger], "TestTenTimer: Platform Timer State Failed.");
for (i = 0; i < kNumTimers; i++)
{
VerifyOrQuit(timers[i]->IsRunning() == kTimerStateAfterTrigger[trigger][i],
- "TestTenTimer: Timer running Failed.\n");
+ "TestTenTimer: Timer running Failed.");
}
}
for (i = 0; i < kNumTimers; i++)
{
- VerifyOrQuit(timers[i]->GetFiredCounter() == 1, "TestTenTimer: Timer fired counter Failed.\n");
+ VerifyOrQuit(timers[i]->GetFiredCounter() == 1, "TestTenTimer: Timer fired counter Failed.");
}
printf("--> PASSED\n");
@@ -546,7 +546,7 @@
{
// Time shift to change the start/fire time of ten timers.
const uint32_t kTimeShift[] = {
- 0, 100000U, 0U - 1U, 0U - 1100U, ot::Timer::kMaxDt, ot::Timer::kMaxDt + 1020U,
+ 0, 100000U, 0U - 1U, 0U - 1100U, ot::Timer::kMaxDelay, ot::Timer::kMaxDelay + 1020U,
};
size_t i;
@@ -559,6 +559,97 @@
return 0;
}
+/**
+ * Test the `Timer::Time` class.
+ */
+int TestTimerTime(void)
+{
+ const uint32_t kMaxTime = 0xffffffff;
+ const uint32_t kStartTimes[] = {0, 100, kMaxTime / 2, kMaxTime - 100, kMaxTime};
+ const uint32_t kDurations[] = {1, 100, ot::Timer::kMaxDelay - 1, ot::Timer::kMaxDelay};
+
+ ot::Time t1;
+ ot::Time t2;
+
+ for (size_t i = 0; i < OT_ARRAY_LENGTH(kStartTimes); i++)
+ {
+ uint32_t start = kStartTimes[i];
+
+ for (size_t j = 0; j < OT_ARRAY_LENGTH(kDurations); j++)
+ {
+ uint32_t duration = kDurations[j];
+
+ printf("TestTimerTime() start=%-10x duration=%-10x ", start, duration);
+
+ t1.SetValue(start);
+ VerifyOrQuit(t1.GetValue() == start, "Time::SetValue() failed.");
+
+ t2 = t1;
+ VerifyOrQuit(t1.GetValue() == start, "Time assignment failed.");
+
+ VerifyOrQuit(t1 == t2, "Time == failed.");
+ VerifyOrQuit(!(t1 != t2), "Time != failed.");
+ VerifyOrQuit(!(t1 < t2), "Time < failed.");
+ VerifyOrQuit((t1 <= t2), "Time <= failed.");
+ VerifyOrQuit(!(t1 > t2), "Time > failed.");
+ VerifyOrQuit((t1 >= t2), "Time >= failed.");
+ VerifyOrQuit(t2 - t1 == 0, "Time difference failed");
+
+ t2 = t1 + duration;
+ VerifyOrQuit(!(t1 == t2), "Time == failed.");
+ VerifyOrQuit((t1 != t2), "Time != failed.");
+ VerifyOrQuit((t1 < t2), "Time < failed.");
+ VerifyOrQuit((t1 <= t2), "Time <= failed.");
+ VerifyOrQuit(!(t1 > t2), "Time > failed.");
+ VerifyOrQuit(!(t1 >= t2), "Time >= failed.");
+ VerifyOrQuit(t2 - t1 == duration, "Time difference failed");
+
+ t2 = t1;
+ t2 += duration;
+ VerifyOrQuit(!(t1 == t2), "Time == failed.");
+ VerifyOrQuit((t1 != t2), "Time != failed.");
+ VerifyOrQuit((t1 < t2), "Time < failed.");
+ VerifyOrQuit((t1 <= t2), "Time <= failed.");
+ VerifyOrQuit(!(t1 > t2), "Time > failed.");
+ VerifyOrQuit(!(t1 >= t2), "Time >= failed.");
+ VerifyOrQuit(t2 - t1 == duration, "Time difference failed");
+
+ t2 = t1 - duration;
+ VerifyOrQuit(!(t1 == t2), "Time == failed.");
+ VerifyOrQuit((t1 != t2), "Time != failed.");
+ VerifyOrQuit(!(t1 < t2), "Time < failed.");
+ VerifyOrQuit(!(t1 <= t2), "Time <= failed.");
+ VerifyOrQuit((t1 > t2), "Time > failed.");
+ VerifyOrQuit((t1 >= t2), "Time >= failed.");
+ VerifyOrQuit(t1 - t2 == duration, "Time difference failed");
+
+ t2 = t1;
+ t2 -= duration;
+ VerifyOrQuit(!(t1 == t2), "Time == failed.");
+ VerifyOrQuit((t1 != t2), "Time != failed.");
+ VerifyOrQuit(!(t1 < t2), "Time < failed.");
+ VerifyOrQuit(!(t1 <= t2), "Time <= failed.");
+ VerifyOrQuit((t1 > t2), "Time > failed.");
+ VerifyOrQuit((t1 >= t2), "Time >= failed.");
+ VerifyOrQuit(t1 - t2 == duration, "Time difference failed");
+
+ t2 = t1.GetDistantFuture();
+ VerifyOrQuit((t1 < t2), "GetDistanceFuture() failed");
+ t2 += 1;
+ VerifyOrQuit(!(t1 < t2), "GetDistanceFuture() failed");
+
+ t2 = t1.GetDistantPast();
+ VerifyOrQuit((t1 > t2), "GetDistantPast() failed");
+ t2 -= 1;
+ VerifyOrQuit(!(t1 > t2), "GetDistantPast() failed");
+
+ printf("--> PASSED\n");
+ }
+ }
+
+ return 0;
+}
+
void RunTimerTests(void)
{
TestOneTimer();
@@ -566,11 +657,10 @@
TestTenTimers();
}
-#ifdef ENABLE_TEST_MAIN
int main(void)
{
RunTimerTests();
+ TestTimerTime();
printf("All tests passed\n");
return 0;
}
-#endif
diff --git a/tests/unit/test_toolchain.cpp b/tests/unit/test_toolchain.cpp
index a2e0198..a66317a 100644
--- a/tests/unit/test_toolchain.cpp
+++ b/tests/unit/test_toolchain.cpp
@@ -34,6 +34,7 @@
#include "test_util.h"
#include "thread/topology.hpp"
+#include "utils/static_assert.hpp"
extern "C" {
uint32_t otNetifAddress_Size_c();
@@ -51,9 +52,9 @@
uint16_t mShort;
} OT_TOOL_PACKED_END;
- CompileTimeAssert(sizeof(packed_t) == 7, "packed_t should be packed to 7 bytes");
+ OT_STATIC_ASSERT(sizeof(packed_t) == 7, "packed_t should be packed to 7 bytes");
- VerifyOrQuit(sizeof(packed_t) == 7, "Toolchain::OT_TOOL_PACKED failed 1\n");
+ VerifyOrQuit(sizeof(packed_t) == 7, "Toolchain::OT_TOOL_PACKED failed 1");
}
void test_packed2()
@@ -65,9 +66,9 @@
uint8_t mByte;
} OT_TOOL_PACKED_END;
- CompileTimeAssert(sizeof(packed_t) == 4, "packed_t should be packed to 4 bytes");
+ OT_STATIC_ASSERT(sizeof(packed_t) == 4, "packed_t should be packed to 4 bytes");
- VerifyOrQuit(sizeof(packed_t) == 4, "Toolchain::OT_TOOL_PACKED failed 2\n");
+ VerifyOrQuit(sizeof(packed_t) == 4, "Toolchain::OT_TOOL_PACKED failed 2");
}
void test_packed_union()
@@ -88,9 +89,9 @@
} OT_TOOL_PACKED_FIELD;
} OT_TOOL_PACKED_END;
- CompileTimeAssert(sizeof(packed_t) == 5, "packed_t should be packed to 5 bytes");
+ OT_STATIC_ASSERT(sizeof(packed_t) == 5, "packed_t should be packed to 5 bytes");
- VerifyOrQuit(sizeof(packed_t) == 5, "Toolchain::OT_TOOL_PACKED failed 3\n");
+ VerifyOrQuit(sizeof(packed_t) == 5, "Toolchain::OT_TOOL_PACKED failed 3");
}
void test_packed_enum()
@@ -99,7 +100,7 @@
neighbor.SetState(ot::Neighbor::kStateValid);
// Make sure that when we read the 3 bit field it is read as unsigned, so it return '4'
- VerifyOrQuit(neighbor.GetState() == ot::Neighbor::kStateValid, "Toolchain::OT_TOOL_PACKED failed 4\n");
+ VerifyOrQuit(neighbor.GetState() == ot::Neighbor::kStateValid, "Toolchain::OT_TOOL_PACKED failed 4");
}
void test_addr_sizes()
@@ -111,7 +112,7 @@
void test_addr_bitfield()
{
- VerifyOrQuit(CreateNetif_c().mScopeOverrideValid == true, "Toolchain::test_addr_size_cpp\n");
+ VerifyOrQuit(CreateNetif_c().mScopeOverrideValid == true, "Toolchain::test_addr_size_cpp");
}
void TestToolchain(void)
@@ -124,11 +125,9 @@
test_addr_bitfield();
}
-#ifdef ENABLE_TEST_MAIN
int main(void)
{
TestToolchain();
printf("All tests passed\n");
return 0;
}
-#endif
diff --git a/tests/unit/test_util.cpp b/tests/unit/test_util.cpp
index 1c84bd3..0e0ee45 100644
--- a/tests/unit/test_util.cpp
+++ b/tests/unit/test_util.cpp
@@ -26,55 +26,46 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
-#include "test_util.h"
+#include "test_util.hpp"
-#include <iostream>
-#include <sstream>
-#include <string>
-#include <vector>
+#include <ctype.h>
-#include <stdint.h>
-
-void otTestHexToVector(std::string &aHex, std::vector<uint8_t> &aOutBytes)
+void DumpBuffer(const char *aTextMessage, uint8_t *aBuffer, uint16_t aBufferLength)
{
- std::istringstream ss(aHex);
- std::string word;
-
- while (ss >> word)
+ enum
{
- uint8_t n = static_cast<uint8_t>(strtol(word.data(), NULL, 16));
- aOutBytes.push_back(n);
- }
-}
+ kBytesPerLine = 16, // Number of bytes per line.
+ };
-void otTestPrintHex(uint8_t *aBuffer, int aLength)
-{
- int i;
+ char charBuff[kBytesPerLine + 1];
+ uint16_t counter;
+ uint8_t byte;
- for (i = 0; i < aLength; i++)
+ printf("\n%s - len = %u\n ", aTextMessage ? aTextMessage : "Buffer", aBufferLength);
+
+ counter = 0;
+
+ while (aBufferLength--)
{
- printf("%02x ", aBuffer[i]);
+ byte = *aBuffer++;
+ printf("%02X ", byte);
+ charBuff[counter] = isprint(byte) ? static_cast<char>(byte) : '.';
+ counter++;
- if (i % 16 == 7)
+ if (counter == kBytesPerLine)
{
- printf(" ");
- }
-
- if (i % 16 == 15 && aLength != i + 1)
- {
- printf("\n");
+ charBuff[counter] = 0;
+ printf(" %s\n ", charBuff);
+ counter = 0;
}
}
- printf("\n");
-}
+ charBuff[counter] = 0;
-void otTestPrintHex(std::string &aString)
-{
- otTestPrintHex((uint8_t *)aString.data(), static_cast<int>(aString.size()));
-}
+ while (counter++ < kBytesPerLine)
+ {
+ printf(" ");
+ }
-void otTestPrintHex(std::vector<uint8_t> &aBytes)
-{
- otTestPrintHex((uint8_t *)&aBytes[0], static_cast<int>(aBytes.size()));
+ printf(" %s\n", charBuff);
}
diff --git a/tests/unit/test_util.h b/tests/unit/test_util.h
index 0f04da3..6e155cf 100644
--- a/tests/unit/test_util.h
+++ b/tests/unit/test_util.h
@@ -36,40 +36,42 @@
extern "C" {
#endif
-// Enable main functions
-#define ENABLE_TEST_MAIN
-
-#define SuccessOrQuit(ERR, MSG) \
- do \
- { \
- if ((ERR) != OT_ERROR_NONE) \
- { \
- fprintf(stderr, "\nFAILED %s:%d - %s\n", __FUNCTION__, __LINE__, MSG); \
- exit(-1); \
- } \
+/**
+ * This macro verifies a given error status to be successful (compared against value zero (0)), otherwise, it emits a
+ * given error messages and exits the program.
+ *
+ * @param[in] aStatus A scalar error status to be evaluated against zero (0).
+ * @param[in] aMessage A message (text string) to print on failure.
+ *
+ */
+#define SuccessOrQuit(aStatus, aMessage) \
+ do \
+ { \
+ if ((aStatus) != 0) \
+ { \
+ fprintf(stderr, "\nFAILED %s:%d - %s\n", __FUNCTION__, __LINE__, aMessage); \
+ exit(-1); \
+ } \
} while (false)
-#define VerifyOrQuit(TST, MSG) \
- do \
- { \
- if (!(TST)) \
- { \
- fprintf(stderr, "\nFAILED %s:%d - %s\n", __FUNCTION__, __LINE__, MSG); \
- exit(-1); \
- } \
+/**
+ * This macro verifies that a given boolean condition is true, otherwise, it emits a given error message and exits the
+ * program.
+ *
+ * @param[in] aCondition A Boolean expression to be evaluated.
+ * @param[in] aMessage A message (text string) to print on failure.
+ *
+ */
+#define VerifyOrQuit(aCondition, aMessage) \
+ do \
+ { \
+ if (!(aCondition)) \
+ { \
+ fprintf(stderr, "\nFAILED %s:%d - %s\n", __FUNCTION__, __LINE__, aMessage); \
+ exit(-1); \
+ } \
} while (false)
-//#define CompileTimeAssert(COND, MSG) typedef char __C_ASSERT__[(COND)?1:-1]
-
-// I would use the above definition for CompileTimeAssert, but I am getting the following errors
-// when I run 'make -f examples/Makefile-posix distcheck':
-//
-// error: typedef "__C_ASSERT__" locally defined but not used [-Werror=unused-local-typedefs]
-//
-#define CompileTimeAssert(COND, MSG)
-
-#define Log(aFormat, ...) printf(aFormat "\n", ##__VA_ARGS__)
-
#ifdef __cplusplus
}
#endif
diff --git a/tests/unit/test_util.hpp b/tests/unit/test_util.hpp
index 8d25f32..122c1ea 100644
--- a/tests/unit/test_util.hpp
+++ b/tests/unit/test_util.hpp
@@ -29,18 +29,18 @@
#ifndef TEST_UTIL_HPP
#define TEST_UTIL_HPP
+#include <stdint.h>
+
#include "test_util.h"
-// STL is okay in unit tests.
-#include <string>
-#include <vector>
-
-void otTestHexToVector(std::string &aHex, std::vector<uint8_t> &aOutBytes);
-
-void otTestPrintHex(uint8_t *aBuffer, int aLength);
-
-void otTestPrintHex(std::vector<uint8_t> &aBytes);
-
-void otTestPrintHex(std::string &aString);
+/**
+ * This function prints the content of a given buffer to screen as a hex dump along with ASCII text translation.
+ *
+ * @param[in] aTextMessag A text message to describe the buffer content (printed before the buffer content)
+ * @param[in] aBuffer A pointer to the buffer
+ * @param[in] aBufferLength Number of bytes in the buffer.
+ *
+ */
+void DumpBuffer(const char *aTextMessage, uint8_t *aBuffer, uint16_t aBufferLength);
#endif
diff --git a/third_party/.gitattributes b/third_party/.gitattributes
deleted file mode 100644
index 0dc02e6..0000000
--- a/third_party/.gitattributes
+++ /dev/null
@@ -1,4 +0,0 @@
-# Disable automatic text file line-ending
-# normalization for third-party code.
-* !text
-
diff --git a/third_party/CMakeLists.txt b/third_party/CMakeLists.txt
new file mode 100644
index 0000000..56bf9c7
--- /dev/null
+++ b/third_party/CMakeLists.txt
@@ -0,0 +1,31 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if(OT_BUILTIN_MBEDTLS)
+ add_subdirectory(mbedtls)
+endif()
diff --git a/third_party/Makefile.am b/third_party/Makefile.am
index 7bbd292..6b13cac 100644
--- a/third_party/Makefile.am
+++ b/third_party/Makefile.am
@@ -52,6 +52,13 @@
$(NULL)
endif
+if OPENTHREAD_EXAMPLES_EFR32MG13
+SUBDIRS += \
+ silabs \
+ jlink \
+ $(NULL)
+endif
+
if OPENTHREAD_EXAMPLES_EFR32MG21
SUBDIRS += \
silabs \
@@ -66,6 +73,13 @@
$(NULL)
endif
+if OPENTHREAD_EXAMPLES_NRF52833
+SUBDIRS += \
+ jlink \
+ NordicSemiconductor \
+ $(NULL)
+endif
+
if OPENTHREAD_EXAMPLES_NRF52811
SUBDIRS += \
jlink \
diff --git a/third_party/NordicSemiconductor/Makefile.am b/third_party/NordicSemiconductor/Makefile.am
index 28a7948..bd0307b 100644
--- a/third_party/NordicSemiconductor/Makefile.am
+++ b/third_party/NordicSemiconductor/Makefile.am
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2016-2017, The OpenThread Authors.
+# Copyright (c) 2016-2019, The OpenThread Authors.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
@@ -43,10 +43,22 @@
$(NULL)
endif
+if OPENTHREAD_EXAMPLES_NRF52833
+lib_LIBRARIES = \
+ libnordicsemi-nrf52833-sdk.a \
+ libnordicsemi-nrf52833-radio-driver.a \
+ libnordicsemi-nrf52833-radio-driver-softdevice.a \
+ $(NULL)
+endif
+
# Do not enable -pedantic-errors for Nordic Semiconductor driver library
override CFLAGS := $(filter-out -pedantic-errors,$(CFLAGS))
override CXXFLAGS := $(filter-out -pedantic-errors,$(CXXFLAGS))
+# Do not enable -Wundef for Nordic Semiconductor driver library
+override CFLAGS := $(filter-out -Wundef,$(CFLAGS))
+override CXXFLAGS := $(filter-out -Wundef,$(CXXFLAGS))
+
COMMONCPPFLAGS = \
-DCONFIG_GPIO_AS_PINRESET \
-DENABLE_FEM=1 \
@@ -59,6 +71,8 @@
-I$(top_srcdir)/third_party/NordicSemiconductor/drivers/clock \
-I$(top_srcdir)/third_party/NordicSemiconductor/drivers/common \
-I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/fem \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/fem/three_pin_gpio \
-I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/hal \
-I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/rsch \
-I$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/rsch/raal \
@@ -71,6 +85,7 @@
-I$(top_srcdir)/third_party/NordicSemiconductor/libraries/app_error \
-I$(top_srcdir)/third_party/NordicSemiconductor/libraries/atfifo \
-I$(top_srcdir)/third_party/NordicSemiconductor/libraries/atomic \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/block_dev \
-I$(top_srcdir)/third_party/NordicSemiconductor/libraries/delay \
-I$(top_srcdir)/third_party/NordicSemiconductor/libraries/usb \
-I$(top_srcdir)/third_party/NordicSemiconductor/libraries/usb/config \
@@ -87,10 +102,16 @@
-I$(top_srcdir)/third_party/NordicSemiconductor/softdevice/s140/headers/nrf52 \
$(NULL)
+NRF52833_CPPFLAGS = \
+ -DNRF52833_XXAA \
+ -DNRF_802154_PROJECT_CONFIG=\"platform-config.h\" \
+ -I$(top_srcdir)/examples/platforms/nrf52833 \
+ $(NULL)
+
NRF52840_CPPFLAGS = \
-DNRF52840_XXAA \
-DNRF_802154_PROJECT_CONFIG=\"platform-config.h\" \
- -I$(top_srcdir)/examples/platforms/nrf52840 \
+ -I$(top_srcdir)/examples/platforms/nrf528xx/nrf52840/ \
$(NULL)
NRF52811_CPPFLAGS = \
@@ -98,7 +119,7 @@
-DNRF_802154_PROJECT_CONFIG=\"platform-config.h\" \
-D__HEAP_SIZE=0 \
-D__STACK_SIZE=2048 \
- -I$(top_srcdir)/examples/platforms/nrf52811 \
+ -I$(top_srcdir)/examples/platforms/nrf528xx/nrf52811 \
$(NULL)
NORDICSEMI_COMMON_SOURCES = \
@@ -129,6 +150,11 @@
libraries/usb/class/cdc/acm/app_usbd_cdc_acm.c \
$(NULL)
+NORDICSEMI_NRF52833_SOURCES = \
+ nrfx/mdk/gcc_startup_nrf52833.S \
+ nrfx/mdk/system_nrf52833.c \
+ $(NULL)
+
NORDICSEMI_NRF52840_SOURCES = \
nrfx/mdk/gcc_startup_nrf52840.S \
nrfx/mdk/system_nrf52840.c \
@@ -141,7 +167,6 @@
RADIO_DRIVER_SOURCES = \
drivers/radio/fal/nrf_802154_fal.c \
- drivers/radio/fem/nrf_fem_control.c \
drivers/radio/mac_features/ack_generator/nrf_802154_ack_data.c \
drivers/radio/mac_features/ack_generator/nrf_802154_ack_generator.c \
drivers/radio/mac_features/ack_generator/nrf_802154_enh_ack_generator.c \
@@ -151,17 +176,18 @@
drivers/radio/mac_features/nrf_802154_filter.c \
drivers/radio/mac_features/nrf_802154_frame_parser.c \
drivers/radio/mac_features/nrf_802154_precise_ack_timeout.c \
+ drivers/radio/fem/three_pin_gpio/nrf_fem_three_pin_gpio.c \
drivers/radio/nrf_802154_core_hooks.c \
drivers/radio/nrf_802154_core.c \
drivers/radio/nrf_802154_critical_section.c \
drivers/radio/nrf_802154_debug.c \
drivers/radio/nrf_802154_pib.c \
- drivers/radio/nrf_802154_revision.c \
drivers/radio/nrf_802154_rssi.c \
drivers/radio/nrf_802154_rx_buffer.c \
drivers/radio/nrf_802154_timer_coord.c \
drivers/radio/nrf_802154.c \
- drivers/radio/platform/clock/nrf_802154_clock_sdk.c \
+ drivers/radio/platform/coex/nrf_802154_wifi_coex_none.c \
+ drivers/radio/platform/clock/nrf_802154_clock_ot.c \
drivers/radio/platform/hp_timer/nrf_802154_hp_timer.c \
drivers/radio/rsch/nrf_802154_rsch_crit_sect.c \
drivers/radio/rsch/nrf_802154_rsch.c \
@@ -231,6 +257,40 @@
$(RADIO_DRIVER_SOFTDEVICE_SOURCES) \
$(NULL)
+libnordicsemi_nrf52833_sdk_a_CPPFLAGS = \
+ $(COMMONCPPFLAGS) \
+ $(NRF52833_CPPFLAGS) \
+ $(NULL)
+
+libnordicsemi_nrf52833_sdk_a_SOURCES = \
+ $(NORDICSEMI_COMMON_SOURCES) \
+ $(NORDICSEMI_USB_SOURCES) \
+ $(NORDICSEMI_NRF52833_SOURCES) \
+ $(NULL)
+
+libnordicsemi_nrf52833_radio_driver_a_CPPFLAGS = \
+ $(COMMONCPPFLAGS) \
+ $(NRF52833_CPPFLAGS) \
+ $(RADIO_DRIVER_SINGLE_PHY_CPPFLAGS) \
+ $(NULL)
+
+libnordicsemi_nrf52833_radio_driver_a_SOURCES = \
+ $(RADIO_DRIVER_SOURCES) \
+ $(RADIO_DRIVER_SINGLE_PHY_SOURCES) \
+ $(NULL)
+
+libnordicsemi_nrf52833_radio_driver_softdevice_a_CPPFLAGS = \
+ $(COMMONCPPFLAGS) \
+ $(NRF52833_CPPFLAGS) \
+ $(SOFTDEVICE_CPPFLAGS) \
+ $(RADIO_DRIVER_SOFTDEVICE_CPPFLAGS) \
+ $(NULL)
+
+libnordicsemi_nrf52833_radio_driver_softdevice_a_SOURCES = \
+ $(RADIO_DRIVER_SOURCES) \
+ $(RADIO_DRIVER_SOFTDEVICE_SOURCES) \
+ $(NULL)
+
libnordicsemi_nrf52811_sdk_a_CPPFLAGS = \
$(COMMONCPPFLAGS) \
$(NRF52811_CPPFLAGS) \
@@ -263,7 +323,7 @@
$(top_srcdir)/third_party/NordicSemiconductor/cmsis/core_cmSimd.h \
$(top_srcdir)/third_party/NordicSemiconductor/dependencies/app_util_platform.h \
$(top_srcdir)/third_party/NordicSemiconductor/dependencies/app_util.h \
- $(top_srcdir)/third_party/NordicSemiconductor/dependencies/apply_old_config.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/dependencies/legacy/apply_old_config.h \
$(top_srcdir)/third_party/NordicSemiconductor/dependencies/nordic_common.h \
$(top_srcdir)/third_party/NordicSemiconductor/dependencies/nrf_assert.h \
$(top_srcdir)/third_party/NordicSemiconductor/dependencies/nrf_error.h \
@@ -289,48 +349,53 @@
$(top_srcdir)/third_party/NordicSemiconductor/drivers/systick/nrf_drv_systick.h \
$(top_srcdir)/third_party/NordicSemiconductor/drivers/usbd/nrf_drv_usbd_errata.h \
$(top_srcdir)/third_party/NordicSemiconductor/drivers/usbd/nrf_drv_usbd.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_core.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_core_hooks.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_config.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_const.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_critical_section.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_debug.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_debug_core.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_notification.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_pib.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_priority_drop.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_procedures_duration.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_request.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_revision.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_rssi.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_rx_buffer.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_timer_coord.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_swi.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_utils.h \
$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/fal/nrf_802154_fal.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/fem/nrf_fem_control_api.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/fem/none/nrf_fem_config.h \
$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/fem/nrf_fem_control_config.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/mac_features/nrf_802154_ack_timeout.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/mac_features/nrf_802154_csma_ca.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/mac_features/nrf_802154_filter.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/mac_features/nrf_802154_delayed_trx.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/mac_features/nrf_802154_filter.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/mac_features/nrf_802154_frame_parser.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/fem/nrf_fem_protocol_api.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/fem/nrf_fem_protocol_legacy_api.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/fem/simple_gpio/nrf_fem_config.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/fem/three_pin_gpio/nrf_fem_config.h \
$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/mac_features/ack_generator/nrf_802154_ack_data.h \
$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/mac_features/ack_generator/nrf_802154_ack_generator.h \
$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/mac_features/ack_generator/nrf_802154_enh_ack_generator.h \
$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/mac_features/ack_generator/nrf_802154_imm_ack_generator.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/mac_features/nrf_802154_ack_timeout.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/mac_features/nrf_802154_csma_ca.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/mac_features/nrf_802154_delayed_trx.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/mac_features/nrf_802154_filter.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/mac_features/nrf_802154_frame_parser.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_config.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_const.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_core.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_core_hooks.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_critical_section.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_debug_core.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_debug.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_notification.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_peripherals.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_pib.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_priority_drop.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_procedures_duration.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_request.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_rssi.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_rx_buffer.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_swi.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_timer_coord.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_types.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/nrf_802154_utils.h \
$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/platform/clock/nrf_802154_clock.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/platform/coex/nrf_802154_wifi_coex.h \
$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/platform/hp_timer/nrf_802154_hp_timer.h \
$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/platform/lp_timer/nrf_802154_lp_timer.h \
$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/platform/random/nrf_802154_random.h \
$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/platform/temperature/nrf_802154_temperature.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/rsch/nrf_802154_rsch.h \
- $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/rsch/nrf_802154_wifi_coex.h \
$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/rsch/nrf_802154_rsch_crit_sect.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/rsch/nrf_802154_rsch.h \
$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/rsch/raal/nrf_raal_api.h \
$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/rsch/raal/nrf_raal_config.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/rsch/raal/simulator/nrf_802154_debug.h \
$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/rsch/raal/softdevice/nrf_802154_debug.h \
$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/rsch/raal/softdevice/nrf_raal_softdevice.h \
$(top_srcdir)/third_party/NordicSemiconductor/drivers/radio/timer_scheduler/nrf_802154_timer_sched.h \
@@ -340,6 +405,7 @@
$(top_srcdir)/third_party/NordicSemiconductor/libraries/atfifo/nrf_atfifo.h \
$(top_srcdir)/third_party/NordicSemiconductor/libraries/atomic/nrf_atomic_internal.h \
$(top_srcdir)/third_party/NordicSemiconductor/libraries/atomic/nrf_atomic.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/libraries/block_dev/nrf_block_dev.h \
$(top_srcdir)/third_party/NordicSemiconductor/libraries/delay/nrf_delay.h \
$(top_srcdir)/third_party/NordicSemiconductor/libraries/usb/app_usbd_class_base.h \
$(top_srcdir)/third_party/NordicSemiconductor/libraries/usb/app_usbd_core.h \
@@ -386,11 +452,16 @@
$(top_srcdir)/third_party/NordicSemiconductor/nrfx/mdk/nrf51_to_nrf52810.h \
$(top_srcdir)/third_party/NordicSemiconductor/nrfx/mdk/nrf52_to_nrf52810.h \
$(top_srcdir)/third_party/NordicSemiconductor/nrfx/mdk/nrf51_to_nrf52840.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/nrfx/mdk/nrf52_to_nrf52833.h \
$(top_srcdir)/third_party/NordicSemiconductor/nrfx/mdk/nrf52_to_nrf52840.h \
$(top_srcdir)/third_party/NordicSemiconductor/nrfx/mdk/nrf52810_to_nrf52811.h \
$(top_srcdir)/third_party/NordicSemiconductor/nrfx/mdk/nrf52811.h \
$(top_srcdir)/third_party/NordicSemiconductor/nrfx/mdk/nrf52811_bitfields.h \
$(top_srcdir)/third_party/NordicSemiconductor/nrfx/mdk/nrf52811_peripherals.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/nrfx/mdk/nrf52833.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/nrfx/mdk/nrf52833_bitfields.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/nrfx/mdk/nrf52833_peripherals.h \
+ $(top_srcdir)/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52833.h \
$(top_srcdir)/third_party/NordicSemiconductor/nrfx/mdk/nrf52840.h \
$(top_srcdir)/third_party/NordicSemiconductor/nrfx/mdk/nrf52840_bitfields.h \
$(top_srcdir)/third_party/NordicSemiconductor/nrfx/mdk/nrf52840_peripherals.h \
diff --git a/third_party/NordicSemiconductor/README.md b/third_party/NordicSemiconductor/README.md
index 13d7a24..b51ba0e 100644
--- a/third_party/NordicSemiconductor/README.md
+++ b/third_party/NordicSemiconductor/README.md
@@ -1,15 +1,15 @@
Description:
This folder consists of selected components from the nRF5 SDK, that are used
-in process of building the OpenThread's nRF52840 platform.
+in process of building the OpenThread's nRF528xx platform.
Directory consists of following folders:
- /cmsis - Core Peripheral Access Layer Headers files
- - /dependencies - Dependencies for drivers and libraries from nrf5 SDK
- - /drivers - Drivers for the nRF52840 that are used in the platform
- - /libraries - Libraries for the nRF52840 chip
+ - /dependencies - Dependencies for drivers and libraries from nRF5 SDK
+ - /drivers - Drivers for the nRF528xx platform
+ - /libraries - Libraries for the nRF528xx platform
- /nrfx - Standalone drivers for peripherals present in Nordic SoCs (https://github.com/NordicSemiconductor/nrfx)
- - /segger_rtt - Library for the RTT communication
+ - /segger_rtt - Configuration files for RTT communication
- /softdevice - SoftDevice s140 headers
- The following changes comparing to the nRF5 SDK 15.2 have been incorporated:
-- modified nrf_log_ctrl.h file in order to remove unused backend logging functions
\ No newline at end of file
+ The following changes comparing to the nRF5 SDK 16.0 have been incorporated:
+- modified nrf_log module files in order to remove unused backend logging functions
\ No newline at end of file
diff --git a/third_party/NordicSemiconductor/cmsis/arm_math.h b/third_party/NordicSemiconductor/cmsis/arm_math.h
index 0be65d3..e21a3cc 100644
--- a/third_party/NordicSemiconductor/cmsis/arm_math.h
+++ b/third_party/NordicSemiconductor/cmsis/arm_math.h
@@ -1,7030 +1,7030 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2015 ARM Limited. All rights reserved.
-*
-* $Date: 20. October 2015
-* $Revision: V1.4.5 b
-*
-* Project: CMSIS DSP Library
-* Title: arm_math.h
-*
-* Description: Public header file for CMSIS DSP Library
-*
-* Target Processor: Cortex-M7/Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
- * -------------------------------------------------------------------- */
-
-/**
- * @defgroup groupMath Basic Math Functions
- */
-
-/**
- * @defgroup groupFastMath Fast Math Functions
- * This set of functions provides a fast approximation to sine, cosine, and square root.
- * As compared to most of the other functions in the CMSIS math library, the fast math functions
- * operate on individual values and not arrays.
- * There are separate functions for Q15, Q31, and floating-point data.
- *
- */
-
-/**
- * @defgroup groupCmplxMath Complex Math Functions
- * This set of functions operates on complex data vectors.
- * The data in the complex arrays is stored in an interleaved fashion
- * (real, imag, real, imag, ...).
- * In the API functions, the number of samples in a complex array refers
- * to the number of complex values; the array contains twice this number of
- * real values.
- */
-
-/**
- * @defgroup groupFilters Filtering Functions
- */
-
-/**
- * @defgroup groupMatrix Matrix Functions
- *
- * This set of functions provides basic matrix math operations.
- * The functions operate on matrix data structures. For example,
- * the type
- * definition for the floating-point matrix structure is shown
- * below:
- * <pre>
- * typedef struct
- * {
- * uint16_t numRows; // number of rows of the matrix.
- * uint16_t numCols; // number of columns of the matrix.
- * float32_t *pData; // points to the data of the matrix.
- * } arm_matrix_instance_f32;
- * </pre>
- * There are similar definitions for Q15 and Q31 data types.
- *
- * The structure specifies the size of the matrix and then points to
- * an array of data. The array is of size <code>numRows X numCols</code>
- * and the values are arranged in row order. That is, the
- * matrix element (i, j) is stored at:
- * <pre>
- * pData[i*numCols + j]
- * </pre>
- *
- * \par Init Functions
- * There is an associated initialization function for each type of matrix
- * data structure.
- * The initialization function sets the values of the internal structure fields.
- * Refer to the function <code>arm_mat_init_f32()</code>, <code>arm_mat_init_q31()</code>
- * and <code>arm_mat_init_q15()</code> for floating-point, Q31 and Q15 types, respectively.
- *
- * \par
- * Use of the initialization function is optional. However, if initialization function is used
- * then the instance structure cannot be placed into a const data section.
- * To place the instance structure in a const data
- * section, manually initialize the data structure. For example:
- * <pre>
- * <code>arm_matrix_instance_f32 S = {nRows, nColumns, pData};</code>
- * <code>arm_matrix_instance_q31 S = {nRows, nColumns, pData};</code>
- * <code>arm_matrix_instance_q15 S = {nRows, nColumns, pData};</code>
- * </pre>
- * where <code>nRows</code> specifies the number of rows, <code>nColumns</code>
- * specifies the number of columns, and <code>pData</code> points to the
- * data array.
- *
- * \par Size Checking
- * By default all of the matrix functions perform size checking on the input and
- * output matrices. For example, the matrix addition function verifies that the
- * two input matrices and the output matrix all have the same number of rows and
- * columns. If the size check fails the functions return:
- * <pre>
- * ARM_MATH_SIZE_MISMATCH
- * </pre>
- * Otherwise the functions return
- * <pre>
- * ARM_MATH_SUCCESS
- * </pre>
- * There is some overhead associated with this matrix size checking.
- * The matrix size checking is enabled via the \#define
- * <pre>
- * ARM_MATH_MATRIX_CHECK
- * </pre>
- * within the library project settings. By default this macro is defined
- * and size checking is enabled. By changing the project settings and
- * undefining this macro size checking is eliminated and the functions
- * run a bit faster. With size checking disabled the functions always
- * return <code>ARM_MATH_SUCCESS</code>.
- */
-
-/**
- * @defgroup groupTransforms Transform Functions
- */
-
-/**
- * @defgroup groupController Controller Functions
- */
-
-/**
- * @defgroup groupStats Statistics Functions
- */
-/**
- * @defgroup groupSupport Support Functions
- */
-
-/**
- * @defgroup groupInterpolation Interpolation Functions
- * These functions perform 1- and 2-dimensional interpolation of data.
- * Linear interpolation is used for 1-dimensional data and
- * bilinear interpolation is used for 2-dimensional data.
- */
-
-/**
- * @defgroup groupExamples Examples
- */
-#ifndef _ARM_MATH_H
-#define _ARM_MATH_H
-
-/* ignore some GCC warnings */
-#if defined ( __GNUC__ )
-#pragma GCC diagnostic push
-#pragma GCC diagnostic ignored "-Wsign-conversion"
-#pragma GCC diagnostic ignored "-Wconversion"
-#pragma GCC diagnostic ignored "-Wunused-parameter"
-#endif
-
-#define __CMSIS_GENERIC /* disable NVIC and Systick functions */
-
-#if defined(ARM_MATH_CM7)
- #include "core_cm7.h"
-#elif defined (ARM_MATH_CM4)
- #include "core_cm4.h"
-#elif defined (ARM_MATH_CM3)
- #include "core_cm3.h"
-#elif defined (ARM_MATH_CM0)
- #include "core_cm0.h"
- #define ARM_MATH_CM0_FAMILY
-#elif defined (ARM_MATH_CM0PLUS)
- #include "core_cm0plus.h"
- #define ARM_MATH_CM0_FAMILY
-#else
- #error "Define according the used Cortex core ARM_MATH_CM7, ARM_MATH_CM4, ARM_MATH_CM3, ARM_MATH_CM0PLUS or ARM_MATH_CM0"
-#endif
-
-#undef __CMSIS_GENERIC /* enable NVIC and Systick functions */
-#include "string.h"
-#include "math.h"
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-
- /**
- * @brief Macros required for reciprocal calculation in Normalized LMS
- */
-
-#define DELTA_Q31 (0x100)
-#define DELTA_Q15 0x5
-#define INDEX_MASK 0x0000003F
-#ifndef PI
-#define PI 3.14159265358979f
-#endif
-
- /**
- * @brief Macros required for SINE and COSINE Fast math approximations
- */
-
-#define FAST_MATH_TABLE_SIZE 512
-#define FAST_MATH_Q31_SHIFT (32 - 10)
-#define FAST_MATH_Q15_SHIFT (16 - 10)
-#define CONTROLLER_Q31_SHIFT (32 - 9)
-#define TABLE_SIZE 256
-#define TABLE_SPACING_Q31 0x400000
-#define TABLE_SPACING_Q15 0x80
-
- /**
- * @brief Macros required for SINE and COSINE Controller functions
- */
- /* 1.31(q31) Fixed value of 2/360 */
- /* -1 to +1 is divided into 360 values so total spacing is (2/360) */
-#define INPUT_SPACING 0xB60B61
-
- /**
- * @brief Macro for Unaligned Support
- */
-#ifndef UNALIGNED_SUPPORT_DISABLE
- #define ALIGN4
-#else
- #if defined (__GNUC__)
- #define ALIGN4 __attribute__((aligned(4)))
- #else
- #define ALIGN4 __align(4)
- #endif
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
- /**
- * @brief Error status returned by some functions in the library.
- */
-
- typedef enum
- {
- ARM_MATH_SUCCESS = 0, /**< No error */
- ARM_MATH_ARGUMENT_ERROR = -1, /**< One or more arguments are incorrect */
- ARM_MATH_LENGTH_ERROR = -2, /**< Length of data buffer is incorrect */
- ARM_MATH_SIZE_MISMATCH = -3, /**< Size of matrices is not compatible with the operation. */
- ARM_MATH_NANINF = -4, /**< Not-a-number (NaN) or infinity is generated */
- ARM_MATH_SINGULAR = -5, /**< Generated by matrix inversion if the input matrix is singular and cannot be inverted. */
- ARM_MATH_TEST_FAILURE = -6 /**< Test Failed */
- } arm_status;
-
- /**
- * @brief 8-bit fractional data type in 1.7 format.
- */
- typedef int8_t q7_t;
-
- /**
- * @brief 16-bit fractional data type in 1.15 format.
- */
- typedef int16_t q15_t;
-
- /**
- * @brief 32-bit fractional data type in 1.31 format.
- */
- typedef int32_t q31_t;
-
- /**
- * @brief 64-bit fractional data type in 1.63 format.
- */
- typedef int64_t q63_t;
-
- /**
- * @brief 32-bit floating-point type definition.
- */
- typedef float float32_t;
-
- /**
- * @brief 64-bit floating-point type definition.
- */
- typedef double float64_t;
-
- /**
- * @brief definition to read/write two 16 bit values.
- */
-#if defined __CC_ARM
- #define __SIMD32_TYPE int32_t __packed
- #define CMSIS_UNUSED __attribute__((unused))
-
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #define __SIMD32_TYPE int32_t
- #define CMSIS_UNUSED __attribute__((unused))
-
-#elif defined __GNUC__
- #define __SIMD32_TYPE int32_t
- #define CMSIS_UNUSED __attribute__((unused))
-
-#elif defined __ICCARM__
- #define __SIMD32_TYPE int32_t __packed
- #define CMSIS_UNUSED
-
-#elif defined __CSMC__
- #define __SIMD32_TYPE int32_t
- #define CMSIS_UNUSED
-
-#elif defined __TASKING__
- #define __SIMD32_TYPE __unaligned int32_t
- #define CMSIS_UNUSED
-
-#else
- #error Unknown compiler
-#endif
-
-#define __SIMD32(addr) (*(__SIMD32_TYPE **) & (addr))
-#define __SIMD32_CONST(addr) ((__SIMD32_TYPE *)(addr))
-#define _SIMD32_OFFSET(addr) (*(__SIMD32_TYPE *) (addr))
-#define __SIMD64(addr) (*(int64_t **) & (addr))
-
-#if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY)
- /**
- * @brief definition to pack two 16 bit values.
- */
-#define __PKHBT(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0x0000FFFF) | \
- (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000) )
-#define __PKHTB(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0xFFFF0000) | \
- (((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF) )
-
-#endif
-
-
- /**
- * @brief definition to pack four 8 bit values.
- */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) << 0) & (int32_t)0x000000FF) | \
- (((int32_t)(v1) << 8) & (int32_t)0x0000FF00) | \
- (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \
- (((int32_t)(v3) << 24) & (int32_t)0xFF000000) )
-#else
-
-#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) << 0) & (int32_t)0x000000FF) | \
- (((int32_t)(v2) << 8) & (int32_t)0x0000FF00) | \
- (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \
- (((int32_t)(v0) << 24) & (int32_t)0xFF000000) )
-
-#endif
-
-
- /**
- * @brief Clips Q63 to Q31 values.
- */
- static __INLINE q31_t clip_q63_to_q31(
- q63_t x)
- {
- return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
- ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x;
- }
-
- /**
- * @brief Clips Q63 to Q15 values.
- */
- static __INLINE q15_t clip_q63_to_q15(
- q63_t x)
- {
- return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
- ((0x7FFF ^ ((q15_t) (x >> 63)))) : (q15_t) (x >> 15);
- }
-
- /**
- * @brief Clips Q31 to Q7 values.
- */
- static __INLINE q7_t clip_q31_to_q7(
- q31_t x)
- {
- return ((q31_t) (x >> 24) != ((q31_t) x >> 23)) ?
- ((0x7F ^ ((q7_t) (x >> 31)))) : (q7_t) x;
- }
-
- /**
- * @brief Clips Q31 to Q15 values.
- */
- static __INLINE q15_t clip_q31_to_q15(
- q31_t x)
- {
- return ((q31_t) (x >> 16) != ((q31_t) x >> 15)) ?
- ((0x7FFF ^ ((q15_t) (x >> 31)))) : (q15_t) x;
- }
-
- /**
- * @brief Multiplies 32 X 64 and returns 32 bit result in 2.30 format.
- */
-
- static __INLINE q63_t mult32x64(
- q63_t x,
- q31_t y)
- {
- return ((((q63_t) (x & 0x00000000FFFFFFFF) * y) >> 32) +
- (((q63_t) (x >> 32) * y)));
- }
-
-/*
- #if defined (ARM_MATH_CM0_FAMILY) && defined ( __CC_ARM )
- #define __CLZ __clz
- #endif
- */
-/* note: function can be removed when all toolchain support __CLZ for Cortex-M0 */
-#if defined (ARM_MATH_CM0_FAMILY) && ((defined (__ICCARM__)) )
- static __INLINE uint32_t __CLZ(
- q31_t data);
-
- static __INLINE uint32_t __CLZ(
- q31_t data)
- {
- uint32_t count = 0;
- uint32_t mask = 0x80000000;
-
- while ((data & mask) == 0)
- {
- count += 1u;
- mask = mask >> 1u;
- }
-
- return (count);
- }
-#endif
-
- /**
- * @brief Function to Calculates 1/in (reciprocal) value of Q31 Data type.
- */
-
- static __INLINE uint32_t arm_recip_q31(
- q31_t in,
- q31_t * dst,
- q31_t * pRecipTable)
- {
- q31_t out;
- uint32_t tempVal;
- uint32_t index, i;
- uint32_t signBits;
-
- if (in > 0)
- {
- signBits = ((uint32_t) (__CLZ( in) - 1));
- }
- else
- {
- signBits = ((uint32_t) (__CLZ(-in) - 1));
- }
-
- /* Convert input sample to 1.31 format */
- in = (in << signBits);
-
- /* calculation of index for initial approximated Val */
- index = (uint32_t)(in >> 24);
- index = (index & INDEX_MASK);
-
- /* 1.31 with exp 1 */
- out = pRecipTable[index];
-
- /* calculation of reciprocal value */
- /* running approximation for two iterations */
- for (i = 0u; i < 2u; i++)
- {
- tempVal = (uint32_t) (((q63_t) in * out) >> 31);
- tempVal = 0x7FFFFFFFu - tempVal;
- /* 1.31 with exp 1 */
- /* out = (q31_t) (((q63_t) out * tempVal) >> 30); */
- out = clip_q63_to_q31(((q63_t) out * tempVal) >> 30);
- }
-
- /* write output */
- *dst = out;
-
- /* return num of signbits of out = 1/in value */
- return (signBits + 1u);
- }
-
-
- /**
- * @brief Function to Calculates 1/in (reciprocal) value of Q15 Data type.
- */
- static __INLINE uint32_t arm_recip_q15(
- q15_t in,
- q15_t * dst,
- q15_t * pRecipTable)
- {
- q15_t out = 0;
- uint32_t tempVal = 0;
- uint32_t index = 0, i = 0;
- uint32_t signBits = 0;
-
- if (in > 0)
- {
- signBits = ((uint32_t)(__CLZ( in) - 17));
- }
- else
- {
- signBits = ((uint32_t)(__CLZ(-in) - 17));
- }
-
- /* Convert input sample to 1.15 format */
- in = (in << signBits);
-
- /* calculation of index for initial approximated Val */
- index = (uint32_t)(in >> 8);
- index = (index & INDEX_MASK);
-
- /* 1.15 with exp 1 */
- out = pRecipTable[index];
-
- /* calculation of reciprocal value */
- /* running approximation for two iterations */
- for (i = 0u; i < 2u; i++)
- {
- tempVal = (uint32_t) (((q31_t) in * out) >> 15);
- tempVal = 0x7FFFu - tempVal;
- /* 1.15 with exp 1 */
- out = (q15_t) (((q31_t) out * tempVal) >> 14);
- /* out = clip_q31_to_q15(((q31_t) out * tempVal) >> 14); */
- }
-
- /* write output */
- *dst = out;
-
- /* return num of signbits of out = 1/in value */
- return (signBits + 1);
- }
-
-
- /*
- * @brief C custom defined intrinisic function for only M0 processors
- */
-#if defined(ARM_MATH_CM0_FAMILY)
- static __INLINE q31_t __SSAT(
- q31_t x,
- uint32_t y)
- {
- int32_t posMax, negMin;
- uint32_t i;
-
- posMax = 1;
- for (i = 0; i < (y - 1); i++)
- {
- posMax = posMax * 2;
- }
-
- if (x > 0)
- {
- posMax = (posMax - 1);
-
- if (x > posMax)
- {
- x = posMax;
- }
- }
- else
- {
- negMin = -posMax;
-
- if (x < negMin)
- {
- x = negMin;
- }
- }
- return (x);
- }
-#endif /* end of ARM_MATH_CM0_FAMILY */
-
-
- /*
- * @brief C custom defined intrinsic function for M3 and M0 processors
- */
-#if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY)
-
- /*
- * @brief C custom defined QADD8 for M3 and M0 processors
- */
- static __INLINE uint32_t __QADD8(
- uint32_t x,
- uint32_t y)
- {
- q31_t r, s, t, u;
-
- r = __SSAT(((((q31_t)x << 24) >> 24) + (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF;
- s = __SSAT(((((q31_t)x << 16) >> 24) + (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF;
- t = __SSAT(((((q31_t)x << 8) >> 24) + (((q31_t)y << 8) >> 24)), 8) & (int32_t)0x000000FF;
- u = __SSAT(((((q31_t)x ) >> 24) + (((q31_t)y ) >> 24)), 8) & (int32_t)0x000000FF;
-
- return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r )));
- }
-
-
- /*
- * @brief C custom defined QSUB8 for M3 and M0 processors
- */
- static __INLINE uint32_t __QSUB8(
- uint32_t x,
- uint32_t y)
- {
- q31_t r, s, t, u;
-
- r = __SSAT(((((q31_t)x << 24) >> 24) - (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF;
- s = __SSAT(((((q31_t)x << 16) >> 24) - (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF;
- t = __SSAT(((((q31_t)x << 8) >> 24) - (((q31_t)y << 8) >> 24)), 8) & (int32_t)0x000000FF;
- u = __SSAT(((((q31_t)x ) >> 24) - (((q31_t)y ) >> 24)), 8) & (int32_t)0x000000FF;
-
- return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r )));
- }
-
-
- /*
- * @brief C custom defined QADD16 for M3 and M0 processors
- */
- static __INLINE uint32_t __QADD16(
- uint32_t x,
- uint32_t y)
- {
-/* q31_t r, s; without initialisation 'arm_offset_q15 test' fails but 'intrinsic' tests pass! for armCC */
- q31_t r = 0, s = 0;
-
- r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
- s = __SSAT(((((q31_t)x ) >> 16) + (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF;
-
- return ((uint32_t)((s << 16) | (r )));
- }
-
-
- /*
- * @brief C custom defined SHADD16 for M3 and M0 processors
- */
- static __INLINE uint32_t __SHADD16(
- uint32_t x,
- uint32_t y)
- {
- q31_t r, s;
-
- r = (((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
- s = (((((q31_t)x ) >> 16) + (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
-
- return ((uint32_t)((s << 16) | (r )));
- }
-
-
- /*
- * @brief C custom defined QSUB16 for M3 and M0 processors
- */
- static __INLINE uint32_t __QSUB16(
- uint32_t x,
- uint32_t y)
- {
- q31_t r, s;
-
- r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
- s = __SSAT(((((q31_t)x ) >> 16) - (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF;
-
- return ((uint32_t)((s << 16) | (r )));
- }
-
-
- /*
- * @brief C custom defined SHSUB16 for M3 and M0 processors
- */
- static __INLINE uint32_t __SHSUB16(
- uint32_t x,
- uint32_t y)
- {
- q31_t r, s;
-
- r = (((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
- s = (((((q31_t)x ) >> 16) - (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
-
- return ((uint32_t)((s << 16) | (r )));
- }
-
-
- /*
- * @brief C custom defined QASX for M3 and M0 processors
- */
- static __INLINE uint32_t __QASX(
- uint32_t x,
- uint32_t y)
- {
- q31_t r, s;
-
- r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF;
- s = __SSAT(((((q31_t)x ) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
-
- return ((uint32_t)((s << 16) | (r )));
- }
-
-
- /*
- * @brief C custom defined SHASX for M3 and M0 processors
- */
- static __INLINE uint32_t __SHASX(
- uint32_t x,
- uint32_t y)
- {
- q31_t r, s;
-
- r = (((((q31_t)x << 16) >> 16) - (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
- s = (((((q31_t)x ) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
-
- return ((uint32_t)((s << 16) | (r )));
- }
-
-
- /*
- * @brief C custom defined QSAX for M3 and M0 processors
- */
- static __INLINE uint32_t __QSAX(
- uint32_t x,
- uint32_t y)
- {
- q31_t r, s;
-
- r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF;
- s = __SSAT(((((q31_t)x ) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
-
- return ((uint32_t)((s << 16) | (r )));
- }
-
-
- /*
- * @brief C custom defined SHSAX for M3 and M0 processors
- */
- static __INLINE uint32_t __SHSAX(
- uint32_t x,
- uint32_t y)
- {
- q31_t r, s;
-
- r = (((((q31_t)x << 16) >> 16) + (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
- s = (((((q31_t)x ) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
-
- return ((uint32_t)((s << 16) | (r )));
- }
-
-
- /*
- * @brief C custom defined SMUSDX for M3 and M0 processors
- */
- static __INLINE uint32_t __SMUSDX(
- uint32_t x,
- uint32_t y)
- {
- return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) -
- ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) ));
- }
-
- /*
- * @brief C custom defined SMUADX for M3 and M0 processors
- */
- static __INLINE uint32_t __SMUADX(
- uint32_t x,
- uint32_t y)
- {
- return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) +
- ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) ));
- }
-
-
- /*
- * @brief C custom defined QADD for M3 and M0 processors
- */
- static __INLINE int32_t __QADD(
- int32_t x,
- int32_t y)
- {
- return ((int32_t)(clip_q63_to_q31((q63_t)x + (q31_t)y)));
- }
-
-
- /*
- * @brief C custom defined QSUB for M3 and M0 processors
- */
- static __INLINE int32_t __QSUB(
- int32_t x,
- int32_t y)
- {
- return ((int32_t)(clip_q63_to_q31((q63_t)x - (q31_t)y)));
- }
-
-
- /*
- * @brief C custom defined SMLAD for M3 and M0 processors
- */
- static __INLINE uint32_t __SMLAD(
- uint32_t x,
- uint32_t y,
- uint32_t sum)
- {
- return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
- ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) +
- ( ((q31_t)sum ) ) ));
- }
-
-
- /*
- * @brief C custom defined SMLADX for M3 and M0 processors
- */
- static __INLINE uint32_t __SMLADX(
- uint32_t x,
- uint32_t y,
- uint32_t sum)
- {
- return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) +
- ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) +
- ( ((q31_t)sum ) ) ));
- }
-
-
- /*
- * @brief C custom defined SMLSDX for M3 and M0 processors
- */
- static __INLINE uint32_t __SMLSDX(
- uint32_t x,
- uint32_t y,
- uint32_t sum)
- {
- return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) -
- ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) +
- ( ((q31_t)sum ) ) ));
- }
-
-
- /*
- * @brief C custom defined SMLALD for M3 and M0 processors
- */
- static __INLINE uint64_t __SMLALD(
- uint32_t x,
- uint32_t y,
- uint64_t sum)
- {
-/* return (sum + ((q15_t) (x >> 16) * (q15_t) (y >> 16)) + ((q15_t) x * (q15_t) y)); */
- return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
- ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) +
- ( ((q63_t)sum ) ) ));
- }
-
-
- /*
- * @brief C custom defined SMLALDX for M3 and M0 processors
- */
- static __INLINE uint64_t __SMLALDX(
- uint32_t x,
- uint32_t y,
- uint64_t sum)
- {
-/* return (sum + ((q15_t) (x >> 16) * (q15_t) y)) + ((q15_t) x * (q15_t) (y >> 16)); */
- return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) +
- ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) +
- ( ((q63_t)sum ) ) ));
- }
-
-
- /*
- * @brief C custom defined SMUAD for M3 and M0 processors
- */
- static __INLINE uint32_t __SMUAD(
- uint32_t x,
- uint32_t y)
- {
- return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
- ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) ));
- }
-
-
- /*
- * @brief C custom defined SMUSD for M3 and M0 processors
- */
- static __INLINE uint32_t __SMUSD(
- uint32_t x,
- uint32_t y)
- {
- return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) -
- ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) ));
- }
-
-
- /*
- * @brief C custom defined SXTB16 for M3 and M0 processors
- */
- static __INLINE uint32_t __SXTB16(
- uint32_t x)
- {
- return ((uint32_t)(((((q31_t)x << 24) >> 24) & (q31_t)0x0000FFFF) |
- ((((q31_t)x << 8) >> 8) & (q31_t)0xFFFF0000) ));
- }
-
-#endif /* defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY) */
-
-
- /**
- * @brief Instance structure for the Q7 FIR filter.
- */
- typedef struct
- {
- uint16_t numTaps; /**< number of filter coefficients in the filter. */
- q7_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */
- q7_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
- } arm_fir_instance_q7;
-
- /**
- * @brief Instance structure for the Q15 FIR filter.
- */
- typedef struct
- {
- uint16_t numTaps; /**< number of filter coefficients in the filter. */
- q15_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */
- q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
- } arm_fir_instance_q15;
-
- /**
- * @brief Instance structure for the Q31 FIR filter.
- */
- typedef struct
- {
- uint16_t numTaps; /**< number of filter coefficients in the filter. */
- q31_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */
- q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
- } arm_fir_instance_q31;
-
- /**
- * @brief Instance structure for the floating-point FIR filter.
- */
- typedef struct
- {
- uint16_t numTaps; /**< number of filter coefficients in the filter. */
- float32_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */
- float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
- } arm_fir_instance_f32;
-
-
- /**
- * @brief Processing function for the Q7 FIR filter.
- * @param[in] S points to an instance of the Q7 FIR filter structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- */
- void arm_fir_q7(
- const arm_fir_instance_q7 * S,
- q7_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the Q7 FIR filter.
- * @param[in,out] S points to an instance of the Q7 FIR structure.
- * @param[in] numTaps Number of filter coefficients in the filter.
- * @param[in] pCoeffs points to the filter coefficients.
- * @param[in] pState points to the state buffer.
- * @param[in] blockSize number of samples that are processed.
- */
- void arm_fir_init_q7(
- arm_fir_instance_q7 * S,
- uint16_t numTaps,
- q7_t * pCoeffs,
- q7_t * pState,
- uint32_t blockSize);
-
-
- /**
- * @brief Processing function for the Q15 FIR filter.
- * @param[in] S points to an instance of the Q15 FIR structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- */
- void arm_fir_q15(
- const arm_fir_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4.
- * @param[in] S points to an instance of the Q15 FIR filter structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- */
- void arm_fir_fast_q15(
- const arm_fir_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the Q15 FIR filter.
- * @param[in,out] S points to an instance of the Q15 FIR filter structure.
- * @param[in] numTaps Number of filter coefficients in the filter. Must be even and greater than or equal to 4.
- * @param[in] pCoeffs points to the filter coefficients.
- * @param[in] pState points to the state buffer.
- * @param[in] blockSize number of samples that are processed at a time.
- * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_ARGUMENT_ERROR if
- * <code>numTaps</code> is not a supported value.
- */
- arm_status arm_fir_init_q15(
- arm_fir_instance_q15 * S,
- uint16_t numTaps,
- q15_t * pCoeffs,
- q15_t * pState,
- uint32_t blockSize);
-
-
- /**
- * @brief Processing function for the Q31 FIR filter.
- * @param[in] S points to an instance of the Q31 FIR filter structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- */
- void arm_fir_q31(
- const arm_fir_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Processing function for the fast Q31 FIR filter for Cortex-M3 and Cortex-M4.
- * @param[in] S points to an instance of the Q31 FIR structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- */
- void arm_fir_fast_q31(
- const arm_fir_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the Q31 FIR filter.
- * @param[in,out] S points to an instance of the Q31 FIR structure.
- * @param[in] numTaps Number of filter coefficients in the filter.
- * @param[in] pCoeffs points to the filter coefficients.
- * @param[in] pState points to the state buffer.
- * @param[in] blockSize number of samples that are processed at a time.
- */
- void arm_fir_init_q31(
- arm_fir_instance_q31 * S,
- uint16_t numTaps,
- q31_t * pCoeffs,
- q31_t * pState,
- uint32_t blockSize);
-
-
- /**
- * @brief Processing function for the floating-point FIR filter.
- * @param[in] S points to an instance of the floating-point FIR structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- */
- void arm_fir_f32(
- const arm_fir_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the floating-point FIR filter.
- * @param[in,out] S points to an instance of the floating-point FIR filter structure.
- * @param[in] numTaps Number of filter coefficients in the filter.
- * @param[in] pCoeffs points to the filter coefficients.
- * @param[in] pState points to the state buffer.
- * @param[in] blockSize number of samples that are processed at a time.
- */
- void arm_fir_init_f32(
- arm_fir_instance_f32 * S,
- uint16_t numTaps,
- float32_t * pCoeffs,
- float32_t * pState,
- uint32_t blockSize);
-
-
- /**
- * @brief Instance structure for the Q15 Biquad cascade filter.
- */
- typedef struct
- {
- int8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
- q15_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */
- q15_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */
- int8_t postShift; /**< Additional shift, in bits, applied to each output sample. */
- } arm_biquad_casd_df1_inst_q15;
-
- /**
- * @brief Instance structure for the Q31 Biquad cascade filter.
- */
- typedef struct
- {
- uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
- q31_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */
- q31_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */
- uint8_t postShift; /**< Additional shift, in bits, applied to each output sample. */
- } arm_biquad_casd_df1_inst_q31;
-
- /**
- * @brief Instance structure for the floating-point Biquad cascade filter.
- */
- typedef struct
- {
- uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
- float32_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */
- float32_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */
- } arm_biquad_casd_df1_inst_f32;
-
-
- /**
- * @brief Processing function for the Q15 Biquad cascade filter.
- * @param[in] S points to an instance of the Q15 Biquad cascade structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- */
- void arm_biquad_cascade_df1_q15(
- const arm_biquad_casd_df1_inst_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the Q15 Biquad cascade filter.
- * @param[in,out] S points to an instance of the Q15 Biquad cascade structure.
- * @param[in] numStages number of 2nd order stages in the filter.
- * @param[in] pCoeffs points to the filter coefficients.
- * @param[in] pState points to the state buffer.
- * @param[in] postShift Shift to be applied to the output. Varies according to the coefficients format
- */
- void arm_biquad_cascade_df1_init_q15(
- arm_biquad_casd_df1_inst_q15 * S,
- uint8_t numStages,
- q15_t * pCoeffs,
- q15_t * pState,
- int8_t postShift);
-
-
- /**
- * @brief Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.
- * @param[in] S points to an instance of the Q15 Biquad cascade structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- */
- void arm_biquad_cascade_df1_fast_q15(
- const arm_biquad_casd_df1_inst_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Processing function for the Q31 Biquad cascade filter
- * @param[in] S points to an instance of the Q31 Biquad cascade structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- */
- void arm_biquad_cascade_df1_q31(
- const arm_biquad_casd_df1_inst_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.
- * @param[in] S points to an instance of the Q31 Biquad cascade structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- */
- void arm_biquad_cascade_df1_fast_q31(
- const arm_biquad_casd_df1_inst_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the Q31 Biquad cascade filter.
- * @param[in,out] S points to an instance of the Q31 Biquad cascade structure.
- * @param[in] numStages number of 2nd order stages in the filter.
- * @param[in] pCoeffs points to the filter coefficients.
- * @param[in] pState points to the state buffer.
- * @param[in] postShift Shift to be applied to the output. Varies according to the coefficients format
- */
- void arm_biquad_cascade_df1_init_q31(
- arm_biquad_casd_df1_inst_q31 * S,
- uint8_t numStages,
- q31_t * pCoeffs,
- q31_t * pState,
- int8_t postShift);
-
-
- /**
- * @brief Processing function for the floating-point Biquad cascade filter.
- * @param[in] S points to an instance of the floating-point Biquad cascade structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- */
- void arm_biquad_cascade_df1_f32(
- const arm_biquad_casd_df1_inst_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the floating-point Biquad cascade filter.
- * @param[in,out] S points to an instance of the floating-point Biquad cascade structure.
- * @param[in] numStages number of 2nd order stages in the filter.
- * @param[in] pCoeffs points to the filter coefficients.
- * @param[in] pState points to the state buffer.
- */
- void arm_biquad_cascade_df1_init_f32(
- arm_biquad_casd_df1_inst_f32 * S,
- uint8_t numStages,
- float32_t * pCoeffs,
- float32_t * pState);
-
-
- /**
- * @brief Instance structure for the floating-point matrix structure.
- */
- typedef struct
- {
- uint16_t numRows; /**< number of rows of the matrix. */
- uint16_t numCols; /**< number of columns of the matrix. */
- float32_t *pData; /**< points to the data of the matrix. */
- } arm_matrix_instance_f32;
-
-
- /**
- * @brief Instance structure for the floating-point matrix structure.
- */
- typedef struct
- {
- uint16_t numRows; /**< number of rows of the matrix. */
- uint16_t numCols; /**< number of columns of the matrix. */
- float64_t *pData; /**< points to the data of the matrix. */
- } arm_matrix_instance_f64;
-
- /**
- * @brief Instance structure for the Q15 matrix structure.
- */
- typedef struct
- {
- uint16_t numRows; /**< number of rows of the matrix. */
- uint16_t numCols; /**< number of columns of the matrix. */
- q15_t *pData; /**< points to the data of the matrix. */
- } arm_matrix_instance_q15;
-
- /**
- * @brief Instance structure for the Q31 matrix structure.
- */
- typedef struct
- {
- uint16_t numRows; /**< number of rows of the matrix. */
- uint16_t numCols; /**< number of columns of the matrix. */
- q31_t *pData; /**< points to the data of the matrix. */
- } arm_matrix_instance_q31;
-
-
- /**
- * @brief Floating-point matrix addition.
- * @param[in] pSrcA points to the first input matrix structure
- * @param[in] pSrcB points to the second input matrix structure
- * @param[out] pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
- arm_status arm_mat_add_f32(
- const arm_matrix_instance_f32 * pSrcA,
- const arm_matrix_instance_f32 * pSrcB,
- arm_matrix_instance_f32 * pDst);
-
-
- /**
- * @brief Q15 matrix addition.
- * @param[in] pSrcA points to the first input matrix structure
- * @param[in] pSrcB points to the second input matrix structure
- * @param[out] pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
- arm_status arm_mat_add_q15(
- const arm_matrix_instance_q15 * pSrcA,
- const arm_matrix_instance_q15 * pSrcB,
- arm_matrix_instance_q15 * pDst);
-
-
- /**
- * @brief Q31 matrix addition.
- * @param[in] pSrcA points to the first input matrix structure
- * @param[in] pSrcB points to the second input matrix structure
- * @param[out] pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
- arm_status arm_mat_add_q31(
- const arm_matrix_instance_q31 * pSrcA,
- const arm_matrix_instance_q31 * pSrcB,
- arm_matrix_instance_q31 * pDst);
-
-
- /**
- * @brief Floating-point, complex, matrix multiplication.
- * @param[in] pSrcA points to the first input matrix structure
- * @param[in] pSrcB points to the second input matrix structure
- * @param[out] pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
- arm_status arm_mat_cmplx_mult_f32(
- const arm_matrix_instance_f32 * pSrcA,
- const arm_matrix_instance_f32 * pSrcB,
- arm_matrix_instance_f32 * pDst);
-
-
- /**
- * @brief Q15, complex, matrix multiplication.
- * @param[in] pSrcA points to the first input matrix structure
- * @param[in] pSrcB points to the second input matrix structure
- * @param[out] pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
- arm_status arm_mat_cmplx_mult_q15(
- const arm_matrix_instance_q15 * pSrcA,
- const arm_matrix_instance_q15 * pSrcB,
- arm_matrix_instance_q15 * pDst,
- q15_t * pScratch);
-
-
- /**
- * @brief Q31, complex, matrix multiplication.
- * @param[in] pSrcA points to the first input matrix structure
- * @param[in] pSrcB points to the second input matrix structure
- * @param[out] pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
- arm_status arm_mat_cmplx_mult_q31(
- const arm_matrix_instance_q31 * pSrcA,
- const arm_matrix_instance_q31 * pSrcB,
- arm_matrix_instance_q31 * pDst);
-
-
- /**
- * @brief Floating-point matrix transpose.
- * @param[in] pSrc points to the input matrix
- * @param[out] pDst points to the output matrix
- * @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
- * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
- arm_status arm_mat_trans_f32(
- const arm_matrix_instance_f32 * pSrc,
- arm_matrix_instance_f32 * pDst);
-
-
- /**
- * @brief Q15 matrix transpose.
- * @param[in] pSrc points to the input matrix
- * @param[out] pDst points to the output matrix
- * @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
- * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
- arm_status arm_mat_trans_q15(
- const arm_matrix_instance_q15 * pSrc,
- arm_matrix_instance_q15 * pDst);
-
-
- /**
- * @brief Q31 matrix transpose.
- * @param[in] pSrc points to the input matrix
- * @param[out] pDst points to the output matrix
- * @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
- * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
- arm_status arm_mat_trans_q31(
- const arm_matrix_instance_q31 * pSrc,
- arm_matrix_instance_q31 * pDst);
-
-
- /**
- * @brief Floating-point matrix multiplication
- * @param[in] pSrcA points to the first input matrix structure
- * @param[in] pSrcB points to the second input matrix structure
- * @param[out] pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
- arm_status arm_mat_mult_f32(
- const arm_matrix_instance_f32 * pSrcA,
- const arm_matrix_instance_f32 * pSrcB,
- arm_matrix_instance_f32 * pDst);
-
-
- /**
- * @brief Q15 matrix multiplication
- * @param[in] pSrcA points to the first input matrix structure
- * @param[in] pSrcB points to the second input matrix structure
- * @param[out] pDst points to output matrix structure
- * @param[in] pState points to the array for storing intermediate results
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
- arm_status arm_mat_mult_q15(
- const arm_matrix_instance_q15 * pSrcA,
- const arm_matrix_instance_q15 * pSrcB,
- arm_matrix_instance_q15 * pDst,
- q15_t * pState);
-
-
- /**
- * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
- * @param[in] pSrcA points to the first input matrix structure
- * @param[in] pSrcB points to the second input matrix structure
- * @param[out] pDst points to output matrix structure
- * @param[in] pState points to the array for storing intermediate results
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
- arm_status arm_mat_mult_fast_q15(
- const arm_matrix_instance_q15 * pSrcA,
- const arm_matrix_instance_q15 * pSrcB,
- arm_matrix_instance_q15 * pDst,
- q15_t * pState);
-
-
- /**
- * @brief Q31 matrix multiplication
- * @param[in] pSrcA points to the first input matrix structure
- * @param[in] pSrcB points to the second input matrix structure
- * @param[out] pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
- arm_status arm_mat_mult_q31(
- const arm_matrix_instance_q31 * pSrcA,
- const arm_matrix_instance_q31 * pSrcB,
- arm_matrix_instance_q31 * pDst);
-
-
- /**
- * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
- * @param[in] pSrcA points to the first input matrix structure
- * @param[in] pSrcB points to the second input matrix structure
- * @param[out] pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
- arm_status arm_mat_mult_fast_q31(
- const arm_matrix_instance_q31 * pSrcA,
- const arm_matrix_instance_q31 * pSrcB,
- arm_matrix_instance_q31 * pDst);
-
-
- /**
- * @brief Floating-point matrix subtraction
- * @param[in] pSrcA points to the first input matrix structure
- * @param[in] pSrcB points to the second input matrix structure
- * @param[out] pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
- arm_status arm_mat_sub_f32(
- const arm_matrix_instance_f32 * pSrcA,
- const arm_matrix_instance_f32 * pSrcB,
- arm_matrix_instance_f32 * pDst);
-
-
- /**
- * @brief Q15 matrix subtraction
- * @param[in] pSrcA points to the first input matrix structure
- * @param[in] pSrcB points to the second input matrix structure
- * @param[out] pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
- arm_status arm_mat_sub_q15(
- const arm_matrix_instance_q15 * pSrcA,
- const arm_matrix_instance_q15 * pSrcB,
- arm_matrix_instance_q15 * pDst);
-
-
- /**
- * @brief Q31 matrix subtraction
- * @param[in] pSrcA points to the first input matrix structure
- * @param[in] pSrcB points to the second input matrix structure
- * @param[out] pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
- arm_status arm_mat_sub_q31(
- const arm_matrix_instance_q31 * pSrcA,
- const arm_matrix_instance_q31 * pSrcB,
- arm_matrix_instance_q31 * pDst);
-
-
- /**
- * @brief Floating-point matrix scaling.
- * @param[in] pSrc points to the input matrix
- * @param[in] scale scale factor
- * @param[out] pDst points to the output matrix
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
- arm_status arm_mat_scale_f32(
- const arm_matrix_instance_f32 * pSrc,
- float32_t scale,
- arm_matrix_instance_f32 * pDst);
-
-
- /**
- * @brief Q15 matrix scaling.
- * @param[in] pSrc points to input matrix
- * @param[in] scaleFract fractional portion of the scale factor
- * @param[in] shift number of bits to shift the result by
- * @param[out] pDst points to output matrix
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
- arm_status arm_mat_scale_q15(
- const arm_matrix_instance_q15 * pSrc,
- q15_t scaleFract,
- int32_t shift,
- arm_matrix_instance_q15 * pDst);
-
-
- /**
- * @brief Q31 matrix scaling.
- * @param[in] pSrc points to input matrix
- * @param[in] scaleFract fractional portion of the scale factor
- * @param[in] shift number of bits to shift the result by
- * @param[out] pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
- arm_status arm_mat_scale_q31(
- const arm_matrix_instance_q31 * pSrc,
- q31_t scaleFract,
- int32_t shift,
- arm_matrix_instance_q31 * pDst);
-
-
- /**
- * @brief Q31 matrix initialization.
- * @param[in,out] S points to an instance of the floating-point matrix structure.
- * @param[in] nRows number of rows in the matrix.
- * @param[in] nColumns number of columns in the matrix.
- * @param[in] pData points to the matrix data array.
- */
- void arm_mat_init_q31(
- arm_matrix_instance_q31 * S,
- uint16_t nRows,
- uint16_t nColumns,
- q31_t * pData);
-
-
- /**
- * @brief Q15 matrix initialization.
- * @param[in,out] S points to an instance of the floating-point matrix structure.
- * @param[in] nRows number of rows in the matrix.
- * @param[in] nColumns number of columns in the matrix.
- * @param[in] pData points to the matrix data array.
- */
- void arm_mat_init_q15(
- arm_matrix_instance_q15 * S,
- uint16_t nRows,
- uint16_t nColumns,
- q15_t * pData);
-
-
- /**
- * @brief Floating-point matrix initialization.
- * @param[in,out] S points to an instance of the floating-point matrix structure.
- * @param[in] nRows number of rows in the matrix.
- * @param[in] nColumns number of columns in the matrix.
- * @param[in] pData points to the matrix data array.
- */
- void arm_mat_init_f32(
- arm_matrix_instance_f32 * S,
- uint16_t nRows,
- uint16_t nColumns,
- float32_t * pData);
-
-
-
- /**
- * @brief Instance structure for the Q15 PID Control.
- */
- typedef struct
- {
- q15_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */
-#ifdef ARM_MATH_CM0_FAMILY
- q15_t A1;
- q15_t A2;
-#else
- q31_t A1; /**< The derived gain A1 = -Kp - 2Kd | Kd.*/
-#endif
- q15_t state[3]; /**< The state array of length 3. */
- q15_t Kp; /**< The proportional gain. */
- q15_t Ki; /**< The integral gain. */
- q15_t Kd; /**< The derivative gain. */
- } arm_pid_instance_q15;
-
- /**
- * @brief Instance structure for the Q31 PID Control.
- */
- typedef struct
- {
- q31_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */
- q31_t A1; /**< The derived gain, A1 = -Kp - 2Kd. */
- q31_t A2; /**< The derived gain, A2 = Kd . */
- q31_t state[3]; /**< The state array of length 3. */
- q31_t Kp; /**< The proportional gain. */
- q31_t Ki; /**< The integral gain. */
- q31_t Kd; /**< The derivative gain. */
- } arm_pid_instance_q31;
-
- /**
- * @brief Instance structure for the floating-point PID Control.
- */
- typedef struct
- {
- float32_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */
- float32_t A1; /**< The derived gain, A1 = -Kp - 2Kd. */
- float32_t A2; /**< The derived gain, A2 = Kd . */
- float32_t state[3]; /**< The state array of length 3. */
- float32_t Kp; /**< The proportional gain. */
- float32_t Ki; /**< The integral gain. */
- float32_t Kd; /**< The derivative gain. */
- } arm_pid_instance_f32;
-
-
-
- /**
- * @brief Initialization function for the floating-point PID Control.
- * @param[in,out] S points to an instance of the PID structure.
- * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
- */
- void arm_pid_init_f32(
- arm_pid_instance_f32 * S,
- int32_t resetStateFlag);
-
-
- /**
- * @brief Reset function for the floating-point PID Control.
- * @param[in,out] S is an instance of the floating-point PID Control structure
- */
- void arm_pid_reset_f32(
- arm_pid_instance_f32 * S);
-
-
- /**
- * @brief Initialization function for the Q31 PID Control.
- * @param[in,out] S points to an instance of the Q15 PID structure.
- * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
- */
- void arm_pid_init_q31(
- arm_pid_instance_q31 * S,
- int32_t resetStateFlag);
-
-
- /**
- * @brief Reset function for the Q31 PID Control.
- * @param[in,out] S points to an instance of the Q31 PID Control structure
- */
-
- void arm_pid_reset_q31(
- arm_pid_instance_q31 * S);
-
-
- /**
- * @brief Initialization function for the Q15 PID Control.
- * @param[in,out] S points to an instance of the Q15 PID structure.
- * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
- */
- void arm_pid_init_q15(
- arm_pid_instance_q15 * S,
- int32_t resetStateFlag);
-
-
- /**
- * @brief Reset function for the Q15 PID Control.
- * @param[in,out] S points to an instance of the q15 PID Control structure
- */
- void arm_pid_reset_q15(
- arm_pid_instance_q15 * S);
-
-
- /**
- * @brief Instance structure for the floating-point Linear Interpolate function.
- */
- typedef struct
- {
- uint32_t nValues; /**< nValues */
- float32_t x1; /**< x1 */
- float32_t xSpacing; /**< xSpacing */
- float32_t *pYData; /**< pointer to the table of Y values */
- } arm_linear_interp_instance_f32;
-
- /**
- * @brief Instance structure for the floating-point bilinear interpolation function.
- */
- typedef struct
- {
- uint16_t numRows; /**< number of rows in the data table. */
- uint16_t numCols; /**< number of columns in the data table. */
- float32_t *pData; /**< points to the data table. */
- } arm_bilinear_interp_instance_f32;
-
- /**
- * @brief Instance structure for the Q31 bilinear interpolation function.
- */
- typedef struct
- {
- uint16_t numRows; /**< number of rows in the data table. */
- uint16_t numCols; /**< number of columns in the data table. */
- q31_t *pData; /**< points to the data table. */
- } arm_bilinear_interp_instance_q31;
-
- /**
- * @brief Instance structure for the Q15 bilinear interpolation function.
- */
- typedef struct
- {
- uint16_t numRows; /**< number of rows in the data table. */
- uint16_t numCols; /**< number of columns in the data table. */
- q15_t *pData; /**< points to the data table. */
- } arm_bilinear_interp_instance_q15;
-
- /**
- * @brief Instance structure for the Q15 bilinear interpolation function.
- */
- typedef struct
- {
- uint16_t numRows; /**< number of rows in the data table. */
- uint16_t numCols; /**< number of columns in the data table. */
- q7_t *pData; /**< points to the data table. */
- } arm_bilinear_interp_instance_q7;
-
-
- /**
- * @brief Q7 vector multiplication.
- * @param[in] pSrcA points to the first input vector
- * @param[in] pSrcB points to the second input vector
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- */
- void arm_mult_q7(
- q7_t * pSrcA,
- q7_t * pSrcB,
- q7_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Q15 vector multiplication.
- * @param[in] pSrcA points to the first input vector
- * @param[in] pSrcB points to the second input vector
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- */
- void arm_mult_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- q15_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Q31 vector multiplication.
- * @param[in] pSrcA points to the first input vector
- * @param[in] pSrcB points to the second input vector
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- */
- void arm_mult_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- q31_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Floating-point vector multiplication.
- * @param[in] pSrcA points to the first input vector
- * @param[in] pSrcB points to the second input vector
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- */
- void arm_mult_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- float32_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Instance structure for the Q15 CFFT/CIFFT function.
- */
- typedef struct
- {
- uint16_t fftLen; /**< length of the FFT. */
- uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
- uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
- q15_t *pTwiddle; /**< points to the Sin twiddle factor table. */
- uint16_t *pBitRevTable; /**< points to the bit reversal table. */
- uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
- } arm_cfft_radix2_instance_q15;
-
-/* Deprecated */
- arm_status arm_cfft_radix2_init_q15(
- arm_cfft_radix2_instance_q15 * S,
- uint16_t fftLen,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag);
-
-/* Deprecated */
- void arm_cfft_radix2_q15(
- const arm_cfft_radix2_instance_q15 * S,
- q15_t * pSrc);
-
-
- /**
- * @brief Instance structure for the Q15 CFFT/CIFFT function.
- */
- typedef struct
- {
- uint16_t fftLen; /**< length of the FFT. */
- uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
- uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
- q15_t *pTwiddle; /**< points to the twiddle factor table. */
- uint16_t *pBitRevTable; /**< points to the bit reversal table. */
- uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
- } arm_cfft_radix4_instance_q15;
-
-/* Deprecated */
- arm_status arm_cfft_radix4_init_q15(
- arm_cfft_radix4_instance_q15 * S,
- uint16_t fftLen,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag);
-
-/* Deprecated */
- void arm_cfft_radix4_q15(
- const arm_cfft_radix4_instance_q15 * S,
- q15_t * pSrc);
-
- /**
- * @brief Instance structure for the Radix-2 Q31 CFFT/CIFFT function.
- */
- typedef struct
- {
- uint16_t fftLen; /**< length of the FFT. */
- uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
- uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
- q31_t *pTwiddle; /**< points to the Twiddle factor table. */
- uint16_t *pBitRevTable; /**< points to the bit reversal table. */
- uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
- } arm_cfft_radix2_instance_q31;
-
-/* Deprecated */
- arm_status arm_cfft_radix2_init_q31(
- arm_cfft_radix2_instance_q31 * S,
- uint16_t fftLen,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag);
-
-/* Deprecated */
- void arm_cfft_radix2_q31(
- const arm_cfft_radix2_instance_q31 * S,
- q31_t * pSrc);
-
- /**
- * @brief Instance structure for the Q31 CFFT/CIFFT function.
- */
- typedef struct
- {
- uint16_t fftLen; /**< length of the FFT. */
- uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
- uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
- q31_t *pTwiddle; /**< points to the twiddle factor table. */
- uint16_t *pBitRevTable; /**< points to the bit reversal table. */
- uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
- } arm_cfft_radix4_instance_q31;
-
-/* Deprecated */
- void arm_cfft_radix4_q31(
- const arm_cfft_radix4_instance_q31 * S,
- q31_t * pSrc);
-
-/* Deprecated */
- arm_status arm_cfft_radix4_init_q31(
- arm_cfft_radix4_instance_q31 * S,
- uint16_t fftLen,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag);
-
- /**
- * @brief Instance structure for the floating-point CFFT/CIFFT function.
- */
- typedef struct
- {
- uint16_t fftLen; /**< length of the FFT. */
- uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
- uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
- float32_t *pTwiddle; /**< points to the Twiddle factor table. */
- uint16_t *pBitRevTable; /**< points to the bit reversal table. */
- uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
- float32_t onebyfftLen; /**< value of 1/fftLen. */
- } arm_cfft_radix2_instance_f32;
-
-/* Deprecated */
- arm_status arm_cfft_radix2_init_f32(
- arm_cfft_radix2_instance_f32 * S,
- uint16_t fftLen,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag);
-
-/* Deprecated */
- void arm_cfft_radix2_f32(
- const arm_cfft_radix2_instance_f32 * S,
- float32_t * pSrc);
-
- /**
- * @brief Instance structure for the floating-point CFFT/CIFFT function.
- */
- typedef struct
- {
- uint16_t fftLen; /**< length of the FFT. */
- uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
- uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
- float32_t *pTwiddle; /**< points to the Twiddle factor table. */
- uint16_t *pBitRevTable; /**< points to the bit reversal table. */
- uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
- float32_t onebyfftLen; /**< value of 1/fftLen. */
- } arm_cfft_radix4_instance_f32;
-
-/* Deprecated */
- arm_status arm_cfft_radix4_init_f32(
- arm_cfft_radix4_instance_f32 * S,
- uint16_t fftLen,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag);
-
-/* Deprecated */
- void arm_cfft_radix4_f32(
- const arm_cfft_radix4_instance_f32 * S,
- float32_t * pSrc);
-
- /**
- * @brief Instance structure for the fixed-point CFFT/CIFFT function.
- */
- typedef struct
- {
- uint16_t fftLen; /**< length of the FFT. */
- const q15_t *pTwiddle; /**< points to the Twiddle factor table. */
- const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
- uint16_t bitRevLength; /**< bit reversal table length. */
- } arm_cfft_instance_q15;
-
-void arm_cfft_q15(
- const arm_cfft_instance_q15 * S,
- q15_t * p1,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag);
-
- /**
- * @brief Instance structure for the fixed-point CFFT/CIFFT function.
- */
- typedef struct
- {
- uint16_t fftLen; /**< length of the FFT. */
- const q31_t *pTwiddle; /**< points to the Twiddle factor table. */
- const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
- uint16_t bitRevLength; /**< bit reversal table length. */
- } arm_cfft_instance_q31;
-
-void arm_cfft_q31(
- const arm_cfft_instance_q31 * S,
- q31_t * p1,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag);
-
- /**
- * @brief Instance structure for the floating-point CFFT/CIFFT function.
- */
- typedef struct
- {
- uint16_t fftLen; /**< length of the FFT. */
- const float32_t *pTwiddle; /**< points to the Twiddle factor table. */
- const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
- uint16_t bitRevLength; /**< bit reversal table length. */
- } arm_cfft_instance_f32;
-
- void arm_cfft_f32(
- const arm_cfft_instance_f32 * S,
- float32_t * p1,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag);
-
- /**
- * @brief Instance structure for the Q15 RFFT/RIFFT function.
- */
- typedef struct
- {
- uint32_t fftLenReal; /**< length of the real FFT. */
- uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
- uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
- uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- q15_t *pTwiddleAReal; /**< points to the real twiddle factor table. */
- q15_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */
- const arm_cfft_instance_q15 *pCfft; /**< points to the complex FFT instance. */
- } arm_rfft_instance_q15;
-
- arm_status arm_rfft_init_q15(
- arm_rfft_instance_q15 * S,
- uint32_t fftLenReal,
- uint32_t ifftFlagR,
- uint32_t bitReverseFlag);
-
- void arm_rfft_q15(
- const arm_rfft_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst);
-
- /**
- * @brief Instance structure for the Q31 RFFT/RIFFT function.
- */
- typedef struct
- {
- uint32_t fftLenReal; /**< length of the real FFT. */
- uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
- uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
- uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- q31_t *pTwiddleAReal; /**< points to the real twiddle factor table. */
- q31_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */
- const arm_cfft_instance_q31 *pCfft; /**< points to the complex FFT instance. */
- } arm_rfft_instance_q31;
-
- arm_status arm_rfft_init_q31(
- arm_rfft_instance_q31 * S,
- uint32_t fftLenReal,
- uint32_t ifftFlagR,
- uint32_t bitReverseFlag);
-
- void arm_rfft_q31(
- const arm_rfft_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst);
-
- /**
- * @brief Instance structure for the floating-point RFFT/RIFFT function.
- */
- typedef struct
- {
- uint32_t fftLenReal; /**< length of the real FFT. */
- uint16_t fftLenBy2; /**< length of the complex FFT. */
- uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
- uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
- uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- float32_t *pTwiddleAReal; /**< points to the real twiddle factor table. */
- float32_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */
- arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */
- } arm_rfft_instance_f32;
-
- arm_status arm_rfft_init_f32(
- arm_rfft_instance_f32 * S,
- arm_cfft_radix4_instance_f32 * S_CFFT,
- uint32_t fftLenReal,
- uint32_t ifftFlagR,
- uint32_t bitReverseFlag);
-
- void arm_rfft_f32(
- const arm_rfft_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst);
-
- /**
- * @brief Instance structure for the floating-point RFFT/RIFFT function.
- */
-typedef struct
- {
- arm_cfft_instance_f32 Sint; /**< Internal CFFT structure. */
- uint16_t fftLenRFFT; /**< length of the real sequence */
- float32_t * pTwiddleRFFT; /**< Twiddle factors real stage */
- } arm_rfft_fast_instance_f32 ;
-
-arm_status arm_rfft_fast_init_f32 (
- arm_rfft_fast_instance_f32 * S,
- uint16_t fftLen);
-
-void arm_rfft_fast_f32(
- arm_rfft_fast_instance_f32 * S,
- float32_t * p, float32_t * pOut,
- uint8_t ifftFlag);
-
- /**
- * @brief Instance structure for the floating-point DCT4/IDCT4 function.
- */
- typedef struct
- {
- uint16_t N; /**< length of the DCT4. */
- uint16_t Nby2; /**< half of the length of the DCT4. */
- float32_t normalize; /**< normalizing factor. */
- float32_t *pTwiddle; /**< points to the twiddle factor table. */
- float32_t *pCosFactor; /**< points to the cosFactor table. */
- arm_rfft_instance_f32 *pRfft; /**< points to the real FFT instance. */
- arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */
- } arm_dct4_instance_f32;
-
-
- /**
- * @brief Initialization function for the floating-point DCT4/IDCT4.
- * @param[in,out] S points to an instance of floating-point DCT4/IDCT4 structure.
- * @param[in] S_RFFT points to an instance of floating-point RFFT/RIFFT structure.
- * @param[in] S_CFFT points to an instance of floating-point CFFT/CIFFT structure.
- * @param[in] N length of the DCT4.
- * @param[in] Nby2 half of the length of the DCT4.
- * @param[in] normalize normalizing factor.
- * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported transform length.
- */
- arm_status arm_dct4_init_f32(
- arm_dct4_instance_f32 * S,
- arm_rfft_instance_f32 * S_RFFT,
- arm_cfft_radix4_instance_f32 * S_CFFT,
- uint16_t N,
- uint16_t Nby2,
- float32_t normalize);
-
-
- /**
- * @brief Processing function for the floating-point DCT4/IDCT4.
- * @param[in] S points to an instance of the floating-point DCT4/IDCT4 structure.
- * @param[in] pState points to state buffer.
- * @param[in,out] pInlineBuffer points to the in-place input and output buffer.
- */
- void arm_dct4_f32(
- const arm_dct4_instance_f32 * S,
- float32_t * pState,
- float32_t * pInlineBuffer);
-
-
- /**
- * @brief Instance structure for the Q31 DCT4/IDCT4 function.
- */
- typedef struct
- {
- uint16_t N; /**< length of the DCT4. */
- uint16_t Nby2; /**< half of the length of the DCT4. */
- q31_t normalize; /**< normalizing factor. */
- q31_t *pTwiddle; /**< points to the twiddle factor table. */
- q31_t *pCosFactor; /**< points to the cosFactor table. */
- arm_rfft_instance_q31 *pRfft; /**< points to the real FFT instance. */
- arm_cfft_radix4_instance_q31 *pCfft; /**< points to the complex FFT instance. */
- } arm_dct4_instance_q31;
-
-
- /**
- * @brief Initialization function for the Q31 DCT4/IDCT4.
- * @param[in,out] S points to an instance of Q31 DCT4/IDCT4 structure.
- * @param[in] S_RFFT points to an instance of Q31 RFFT/RIFFT structure
- * @param[in] S_CFFT points to an instance of Q31 CFFT/CIFFT structure
- * @param[in] N length of the DCT4.
- * @param[in] Nby2 half of the length of the DCT4.
- * @param[in] normalize normalizing factor.
- * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
- */
- arm_status arm_dct4_init_q31(
- arm_dct4_instance_q31 * S,
- arm_rfft_instance_q31 * S_RFFT,
- arm_cfft_radix4_instance_q31 * S_CFFT,
- uint16_t N,
- uint16_t Nby2,
- q31_t normalize);
-
-
- /**
- * @brief Processing function for the Q31 DCT4/IDCT4.
- * @param[in] S points to an instance of the Q31 DCT4 structure.
- * @param[in] pState points to state buffer.
- * @param[in,out] pInlineBuffer points to the in-place input and output buffer.
- */
- void arm_dct4_q31(
- const arm_dct4_instance_q31 * S,
- q31_t * pState,
- q31_t * pInlineBuffer);
-
-
- /**
- * @brief Instance structure for the Q15 DCT4/IDCT4 function.
- */
- typedef struct
- {
- uint16_t N; /**< length of the DCT4. */
- uint16_t Nby2; /**< half of the length of the DCT4. */
- q15_t normalize; /**< normalizing factor. */
- q15_t *pTwiddle; /**< points to the twiddle factor table. */
- q15_t *pCosFactor; /**< points to the cosFactor table. */
- arm_rfft_instance_q15 *pRfft; /**< points to the real FFT instance. */
- arm_cfft_radix4_instance_q15 *pCfft; /**< points to the complex FFT instance. */
- } arm_dct4_instance_q15;
-
-
- /**
- * @brief Initialization function for the Q15 DCT4/IDCT4.
- * @param[in,out] S points to an instance of Q15 DCT4/IDCT4 structure.
- * @param[in] S_RFFT points to an instance of Q15 RFFT/RIFFT structure.
- * @param[in] S_CFFT points to an instance of Q15 CFFT/CIFFT structure.
- * @param[in] N length of the DCT4.
- * @param[in] Nby2 half of the length of the DCT4.
- * @param[in] normalize normalizing factor.
- * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
- */
- arm_status arm_dct4_init_q15(
- arm_dct4_instance_q15 * S,
- arm_rfft_instance_q15 * S_RFFT,
- arm_cfft_radix4_instance_q15 * S_CFFT,
- uint16_t N,
- uint16_t Nby2,
- q15_t normalize);
-
-
- /**
- * @brief Processing function for the Q15 DCT4/IDCT4.
- * @param[in] S points to an instance of the Q15 DCT4 structure.
- * @param[in] pState points to state buffer.
- * @param[in,out] pInlineBuffer points to the in-place input and output buffer.
- */
- void arm_dct4_q15(
- const arm_dct4_instance_q15 * S,
- q15_t * pState,
- q15_t * pInlineBuffer);
-
-
- /**
- * @brief Floating-point vector addition.
- * @param[in] pSrcA points to the first input vector
- * @param[in] pSrcB points to the second input vector
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- */
- void arm_add_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- float32_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Q7 vector addition.
- * @param[in] pSrcA points to the first input vector
- * @param[in] pSrcB points to the second input vector
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- */
- void arm_add_q7(
- q7_t * pSrcA,
- q7_t * pSrcB,
- q7_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Q15 vector addition.
- * @param[in] pSrcA points to the first input vector
- * @param[in] pSrcB points to the second input vector
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- */
- void arm_add_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- q15_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Q31 vector addition.
- * @param[in] pSrcA points to the first input vector
- * @param[in] pSrcB points to the second input vector
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- */
- void arm_add_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- q31_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Floating-point vector subtraction.
- * @param[in] pSrcA points to the first input vector
- * @param[in] pSrcB points to the second input vector
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- */
- void arm_sub_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- float32_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Q7 vector subtraction.
- * @param[in] pSrcA points to the first input vector
- * @param[in] pSrcB points to the second input vector
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- */
- void arm_sub_q7(
- q7_t * pSrcA,
- q7_t * pSrcB,
- q7_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Q15 vector subtraction.
- * @param[in] pSrcA points to the first input vector
- * @param[in] pSrcB points to the second input vector
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- */
- void arm_sub_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- q15_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Q31 vector subtraction.
- * @param[in] pSrcA points to the first input vector
- * @param[in] pSrcB points to the second input vector
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- */
- void arm_sub_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- q31_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Multiplies a floating-point vector by a scalar.
- * @param[in] pSrc points to the input vector
- * @param[in] scale scale factor to be applied
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- */
- void arm_scale_f32(
- float32_t * pSrc,
- float32_t scale,
- float32_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Multiplies a Q7 vector by a scalar.
- * @param[in] pSrc points to the input vector
- * @param[in] scaleFract fractional portion of the scale value
- * @param[in] shift number of bits to shift the result by
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- */
- void arm_scale_q7(
- q7_t * pSrc,
- q7_t scaleFract,
- int8_t shift,
- q7_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Multiplies a Q15 vector by a scalar.
- * @param[in] pSrc points to the input vector
- * @param[in] scaleFract fractional portion of the scale value
- * @param[in] shift number of bits to shift the result by
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- */
- void arm_scale_q15(
- q15_t * pSrc,
- q15_t scaleFract,
- int8_t shift,
- q15_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Multiplies a Q31 vector by a scalar.
- * @param[in] pSrc points to the input vector
- * @param[in] scaleFract fractional portion of the scale value
- * @param[in] shift number of bits to shift the result by
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- */
- void arm_scale_q31(
- q31_t * pSrc,
- q31_t scaleFract,
- int8_t shift,
- q31_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Q7 vector absolute value.
- * @param[in] pSrc points to the input buffer
- * @param[out] pDst points to the output buffer
- * @param[in] blockSize number of samples in each vector
- */
- void arm_abs_q7(
- q7_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Floating-point vector absolute value.
- * @param[in] pSrc points to the input buffer
- * @param[out] pDst points to the output buffer
- * @param[in] blockSize number of samples in each vector
- */
- void arm_abs_f32(
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Q15 vector absolute value.
- * @param[in] pSrc points to the input buffer
- * @param[out] pDst points to the output buffer
- * @param[in] blockSize number of samples in each vector
- */
- void arm_abs_q15(
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Q31 vector absolute value.
- * @param[in] pSrc points to the input buffer
- * @param[out] pDst points to the output buffer
- * @param[in] blockSize number of samples in each vector
- */
- void arm_abs_q31(
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Dot product of floating-point vectors.
- * @param[in] pSrcA points to the first input vector
- * @param[in] pSrcB points to the second input vector
- * @param[in] blockSize number of samples in each vector
- * @param[out] result output result returned here
- */
- void arm_dot_prod_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- uint32_t blockSize,
- float32_t * result);
-
-
- /**
- * @brief Dot product of Q7 vectors.
- * @param[in] pSrcA points to the first input vector
- * @param[in] pSrcB points to the second input vector
- * @param[in] blockSize number of samples in each vector
- * @param[out] result output result returned here
- */
- void arm_dot_prod_q7(
- q7_t * pSrcA,
- q7_t * pSrcB,
- uint32_t blockSize,
- q31_t * result);
-
-
- /**
- * @brief Dot product of Q15 vectors.
- * @param[in] pSrcA points to the first input vector
- * @param[in] pSrcB points to the second input vector
- * @param[in] blockSize number of samples in each vector
- * @param[out] result output result returned here
- */
- void arm_dot_prod_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- uint32_t blockSize,
- q63_t * result);
-
-
- /**
- * @brief Dot product of Q31 vectors.
- * @param[in] pSrcA points to the first input vector
- * @param[in] pSrcB points to the second input vector
- * @param[in] blockSize number of samples in each vector
- * @param[out] result output result returned here
- */
- void arm_dot_prod_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- uint32_t blockSize,
- q63_t * result);
-
-
- /**
- * @brief Shifts the elements of a Q7 vector a specified number of bits.
- * @param[in] pSrc points to the input vector
- * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- */
- void arm_shift_q7(
- q7_t * pSrc,
- int8_t shiftBits,
- q7_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Shifts the elements of a Q15 vector a specified number of bits.
- * @param[in] pSrc points to the input vector
- * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- */
- void arm_shift_q15(
- q15_t * pSrc,
- int8_t shiftBits,
- q15_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Shifts the elements of a Q31 vector a specified number of bits.
- * @param[in] pSrc points to the input vector
- * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- */
- void arm_shift_q31(
- q31_t * pSrc,
- int8_t shiftBits,
- q31_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Adds a constant offset to a floating-point vector.
- * @param[in] pSrc points to the input vector
- * @param[in] offset is the offset to be added
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- */
- void arm_offset_f32(
- float32_t * pSrc,
- float32_t offset,
- float32_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Adds a constant offset to a Q7 vector.
- * @param[in] pSrc points to the input vector
- * @param[in] offset is the offset to be added
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- */
- void arm_offset_q7(
- q7_t * pSrc,
- q7_t offset,
- q7_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Adds a constant offset to a Q15 vector.
- * @param[in] pSrc points to the input vector
- * @param[in] offset is the offset to be added
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- */
- void arm_offset_q15(
- q15_t * pSrc,
- q15_t offset,
- q15_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Adds a constant offset to a Q31 vector.
- * @param[in] pSrc points to the input vector
- * @param[in] offset is the offset to be added
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- */
- void arm_offset_q31(
- q31_t * pSrc,
- q31_t offset,
- q31_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Negates the elements of a floating-point vector.
- * @param[in] pSrc points to the input vector
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- */
- void arm_negate_f32(
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Negates the elements of a Q7 vector.
- * @param[in] pSrc points to the input vector
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- */
- void arm_negate_q7(
- q7_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Negates the elements of a Q15 vector.
- * @param[in] pSrc points to the input vector
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- */
- void arm_negate_q15(
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Negates the elements of a Q31 vector.
- * @param[in] pSrc points to the input vector
- * @param[out] pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- */
- void arm_negate_q31(
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Copies the elements of a floating-point vector.
- * @param[in] pSrc input pointer
- * @param[out] pDst output pointer
- * @param[in] blockSize number of samples to process
- */
- void arm_copy_f32(
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Copies the elements of a Q7 vector.
- * @param[in] pSrc input pointer
- * @param[out] pDst output pointer
- * @param[in] blockSize number of samples to process
- */
- void arm_copy_q7(
- q7_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Copies the elements of a Q15 vector.
- * @param[in] pSrc input pointer
- * @param[out] pDst output pointer
- * @param[in] blockSize number of samples to process
- */
- void arm_copy_q15(
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Copies the elements of a Q31 vector.
- * @param[in] pSrc input pointer
- * @param[out] pDst output pointer
- * @param[in] blockSize number of samples to process
- */
- void arm_copy_q31(
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Fills a constant value into a floating-point vector.
- * @param[in] value input value to be filled
- * @param[out] pDst output pointer
- * @param[in] blockSize number of samples to process
- */
- void arm_fill_f32(
- float32_t value,
- float32_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Fills a constant value into a Q7 vector.
- * @param[in] value input value to be filled
- * @param[out] pDst output pointer
- * @param[in] blockSize number of samples to process
- */
- void arm_fill_q7(
- q7_t value,
- q7_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Fills a constant value into a Q15 vector.
- * @param[in] value input value to be filled
- * @param[out] pDst output pointer
- * @param[in] blockSize number of samples to process
- */
- void arm_fill_q15(
- q15_t value,
- q15_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Fills a constant value into a Q31 vector.
- * @param[in] value input value to be filled
- * @param[out] pDst output pointer
- * @param[in] blockSize number of samples to process
- */
- void arm_fill_q31(
- q31_t value,
- q31_t * pDst,
- uint32_t blockSize);
-
-
-/**
- * @brief Convolution of floating-point sequences.
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the location where the output result is written. Length srcALen + srcBLen-1.
- */
- void arm_conv_f32(
- float32_t * pSrcA,
- uint32_t srcALen,
- float32_t * pSrcB,
- uint32_t srcBLen,
- float32_t * pDst);
-
-
- /**
- * @brief Convolution of Q15 sequences.
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data Length srcALen + srcBLen-1.
- * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
- */
- void arm_conv_opt_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- q15_t * pScratch1,
- q15_t * pScratch2);
-
-
-/**
- * @brief Convolution of Q15 sequences.
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the location where the output result is written. Length srcALen + srcBLen-1.
- */
- void arm_conv_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst);
-
-
- /**
- * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data Length srcALen + srcBLen-1.
- */
- void arm_conv_fast_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst);
-
-
- /**
- * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data Length srcALen + srcBLen-1.
- * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
- */
- void arm_conv_fast_opt_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- q15_t * pScratch1,
- q15_t * pScratch2);
-
-
- /**
- * @brief Convolution of Q31 sequences.
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data Length srcALen + srcBLen-1.
- */
- void arm_conv_q31(
- q31_t * pSrcA,
- uint32_t srcALen,
- q31_t * pSrcB,
- uint32_t srcBLen,
- q31_t * pDst);
-
-
- /**
- * @brief Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data Length srcALen + srcBLen-1.
- */
- void arm_conv_fast_q31(
- q31_t * pSrcA,
- uint32_t srcALen,
- q31_t * pSrcB,
- uint32_t srcBLen,
- q31_t * pDst);
-
-
- /**
- * @brief Convolution of Q7 sequences.
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data Length srcALen + srcBLen-1.
- * @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
- */
- void arm_conv_opt_q7(
- q7_t * pSrcA,
- uint32_t srcALen,
- q7_t * pSrcB,
- uint32_t srcBLen,
- q7_t * pDst,
- q15_t * pScratch1,
- q15_t * pScratch2);
-
-
- /**
- * @brief Convolution of Q7 sequences.
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data Length srcALen + srcBLen-1.
- */
- void arm_conv_q7(
- q7_t * pSrcA,
- uint32_t srcALen,
- q7_t * pSrcB,
- uint32_t srcBLen,
- q7_t * pDst);
-
-
- /**
- * @brief Partial convolution of floating-point sequences.
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2].
- */
- arm_status arm_conv_partial_f32(
- float32_t * pSrcA,
- uint32_t srcALen,
- float32_t * pSrcB,
- uint32_t srcBLen,
- float32_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints);
-
-
- /**
- * @brief Partial convolution of Q15 sequences.
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2].
- */
- arm_status arm_conv_partial_opt_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints,
- q15_t * pScratch1,
- q15_t * pScratch2);
-
-
- /**
- * @brief Partial convolution of Q15 sequences.
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2].
- */
- arm_status arm_conv_partial_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints);
-
-
- /**
- * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2].
- */
- arm_status arm_conv_partial_fast_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints);
-
-
- /**
- * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2].
- */
- arm_status arm_conv_partial_fast_opt_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints,
- q15_t * pScratch1,
- q15_t * pScratch2);
-
-
- /**
- * @brief Partial convolution of Q31 sequences.
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2].
- */
- arm_status arm_conv_partial_q31(
- q31_t * pSrcA,
- uint32_t srcALen,
- q31_t * pSrcB,
- uint32_t srcBLen,
- q31_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints);
-
-
- /**
- * @brief Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2].
- */
- arm_status arm_conv_partial_fast_q31(
- q31_t * pSrcA,
- uint32_t srcALen,
- q31_t * pSrcB,
- uint32_t srcBLen,
- q31_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints);
-
-
- /**
- * @brief Partial convolution of Q7 sequences
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2].
- */
- arm_status arm_conv_partial_opt_q7(
- q7_t * pSrcA,
- uint32_t srcALen,
- q7_t * pSrcB,
- uint32_t srcBLen,
- q7_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints,
- q15_t * pScratch1,
- q15_t * pScratch2);
-
-
-/**
- * @brief Partial convolution of Q7 sequences.
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2].
- */
- arm_status arm_conv_partial_q7(
- q7_t * pSrcA,
- uint32_t srcALen,
- q7_t * pSrcB,
- uint32_t srcBLen,
- q7_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints);
-
-
- /**
- * @brief Instance structure for the Q15 FIR decimator.
- */
- typedef struct
- {
- uint8_t M; /**< decimation factor. */
- uint16_t numTaps; /**< number of coefficients in the filter. */
- q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
- q15_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */
- } arm_fir_decimate_instance_q15;
-
- /**
- * @brief Instance structure for the Q31 FIR decimator.
- */
- typedef struct
- {
- uint8_t M; /**< decimation factor. */
- uint16_t numTaps; /**< number of coefficients in the filter. */
- q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
- q31_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */
- } arm_fir_decimate_instance_q31;
-
- /**
- * @brief Instance structure for the floating-point FIR decimator.
- */
- typedef struct
- {
- uint8_t M; /**< decimation factor. */
- uint16_t numTaps; /**< number of coefficients in the filter. */
- float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
- float32_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */
- } arm_fir_decimate_instance_f32;
-
-
- /**
- * @brief Processing function for the floating-point FIR decimator.
- * @param[in] S points to an instance of the floating-point FIR decimator structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data
- * @param[in] blockSize number of input samples to process per call.
- */
- void arm_fir_decimate_f32(
- const arm_fir_decimate_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the floating-point FIR decimator.
- * @param[in,out] S points to an instance of the floating-point FIR decimator structure.
- * @param[in] numTaps number of coefficients in the filter.
- * @param[in] M decimation factor.
- * @param[in] pCoeffs points to the filter coefficients.
- * @param[in] pState points to the state buffer.
- * @param[in] blockSize number of input samples to process per call.
- * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
- * <code>blockSize</code> is not a multiple of <code>M</code>.
- */
- arm_status arm_fir_decimate_init_f32(
- arm_fir_decimate_instance_f32 * S,
- uint16_t numTaps,
- uint8_t M,
- float32_t * pCoeffs,
- float32_t * pState,
- uint32_t blockSize);
-
-
- /**
- * @brief Processing function for the Q15 FIR decimator.
- * @param[in] S points to an instance of the Q15 FIR decimator structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data
- * @param[in] blockSize number of input samples to process per call.
- */
- void arm_fir_decimate_q15(
- const arm_fir_decimate_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
- * @param[in] S points to an instance of the Q15 FIR decimator structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data
- * @param[in] blockSize number of input samples to process per call.
- */
- void arm_fir_decimate_fast_q15(
- const arm_fir_decimate_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the Q15 FIR decimator.
- * @param[in,out] S points to an instance of the Q15 FIR decimator structure.
- * @param[in] numTaps number of coefficients in the filter.
- * @param[in] M decimation factor.
- * @param[in] pCoeffs points to the filter coefficients.
- * @param[in] pState points to the state buffer.
- * @param[in] blockSize number of input samples to process per call.
- * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
- * <code>blockSize</code> is not a multiple of <code>M</code>.
- */
- arm_status arm_fir_decimate_init_q15(
- arm_fir_decimate_instance_q15 * S,
- uint16_t numTaps,
- uint8_t M,
- q15_t * pCoeffs,
- q15_t * pState,
- uint32_t blockSize);
-
-
- /**
- * @brief Processing function for the Q31 FIR decimator.
- * @param[in] S points to an instance of the Q31 FIR decimator structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data
- * @param[in] blockSize number of input samples to process per call.
- */
- void arm_fir_decimate_q31(
- const arm_fir_decimate_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
- * @param[in] S points to an instance of the Q31 FIR decimator structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data
- * @param[in] blockSize number of input samples to process per call.
- */
- void arm_fir_decimate_fast_q31(
- arm_fir_decimate_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the Q31 FIR decimator.
- * @param[in,out] S points to an instance of the Q31 FIR decimator structure.
- * @param[in] numTaps number of coefficients in the filter.
- * @param[in] M decimation factor.
- * @param[in] pCoeffs points to the filter coefficients.
- * @param[in] pState points to the state buffer.
- * @param[in] blockSize number of input samples to process per call.
- * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
- * <code>blockSize</code> is not a multiple of <code>M</code>.
- */
- arm_status arm_fir_decimate_init_q31(
- arm_fir_decimate_instance_q31 * S,
- uint16_t numTaps,
- uint8_t M,
- q31_t * pCoeffs,
- q31_t * pState,
- uint32_t blockSize);
-
-
- /**
- * @brief Instance structure for the Q15 FIR interpolator.
- */
- typedef struct
- {
- uint8_t L; /**< upsample factor. */
- uint16_t phaseLength; /**< length of each polyphase filter component. */
- q15_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */
- q15_t *pState; /**< points to the state variable array. The array is of length blockSize + phaseLength-1. */
- } arm_fir_interpolate_instance_q15;
-
- /**
- * @brief Instance structure for the Q31 FIR interpolator.
- */
- typedef struct
- {
- uint8_t L; /**< upsample factor. */
- uint16_t phaseLength; /**< length of each polyphase filter component. */
- q31_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */
- q31_t *pState; /**< points to the state variable array. The array is of length blockSize + phaseLength-1. */
- } arm_fir_interpolate_instance_q31;
-
- /**
- * @brief Instance structure for the floating-point FIR interpolator.
- */
- typedef struct
- {
- uint8_t L; /**< upsample factor. */
- uint16_t phaseLength; /**< length of each polyphase filter component. */
- float32_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */
- float32_t *pState; /**< points to the state variable array. The array is of length phaseLength + numTaps-1. */
- } arm_fir_interpolate_instance_f32;
-
-
- /**
- * @brief Processing function for the Q15 FIR interpolator.
- * @param[in] S points to an instance of the Q15 FIR interpolator structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data.
- * @param[in] blockSize number of input samples to process per call.
- */
- void arm_fir_interpolate_q15(
- const arm_fir_interpolate_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the Q15 FIR interpolator.
- * @param[in,out] S points to an instance of the Q15 FIR interpolator structure.
- * @param[in] L upsample factor.
- * @param[in] numTaps number of filter coefficients in the filter.
- * @param[in] pCoeffs points to the filter coefficient buffer.
- * @param[in] pState points to the state buffer.
- * @param[in] blockSize number of input samples to process per call.
- * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
- * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
- */
- arm_status arm_fir_interpolate_init_q15(
- arm_fir_interpolate_instance_q15 * S,
- uint8_t L,
- uint16_t numTaps,
- q15_t * pCoeffs,
- q15_t * pState,
- uint32_t blockSize);
-
-
- /**
- * @brief Processing function for the Q31 FIR interpolator.
- * @param[in] S points to an instance of the Q15 FIR interpolator structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data.
- * @param[in] blockSize number of input samples to process per call.
- */
- void arm_fir_interpolate_q31(
- const arm_fir_interpolate_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the Q31 FIR interpolator.
- * @param[in,out] S points to an instance of the Q31 FIR interpolator structure.
- * @param[in] L upsample factor.
- * @param[in] numTaps number of filter coefficients in the filter.
- * @param[in] pCoeffs points to the filter coefficient buffer.
- * @param[in] pState points to the state buffer.
- * @param[in] blockSize number of input samples to process per call.
- * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
- * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
- */
- arm_status arm_fir_interpolate_init_q31(
- arm_fir_interpolate_instance_q31 * S,
- uint8_t L,
- uint16_t numTaps,
- q31_t * pCoeffs,
- q31_t * pState,
- uint32_t blockSize);
-
-
- /**
- * @brief Processing function for the floating-point FIR interpolator.
- * @param[in] S points to an instance of the floating-point FIR interpolator structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data.
- * @param[in] blockSize number of input samples to process per call.
- */
- void arm_fir_interpolate_f32(
- const arm_fir_interpolate_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the floating-point FIR interpolator.
- * @param[in,out] S points to an instance of the floating-point FIR interpolator structure.
- * @param[in] L upsample factor.
- * @param[in] numTaps number of filter coefficients in the filter.
- * @param[in] pCoeffs points to the filter coefficient buffer.
- * @param[in] pState points to the state buffer.
- * @param[in] blockSize number of input samples to process per call.
- * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
- * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
- */
- arm_status arm_fir_interpolate_init_f32(
- arm_fir_interpolate_instance_f32 * S,
- uint8_t L,
- uint16_t numTaps,
- float32_t * pCoeffs,
- float32_t * pState,
- uint32_t blockSize);
-
-
- /**
- * @brief Instance structure for the high precision Q31 Biquad cascade filter.
- */
- typedef struct
- {
- uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
- q63_t *pState; /**< points to the array of state coefficients. The array is of length 4*numStages. */
- q31_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */
- uint8_t postShift; /**< additional shift, in bits, applied to each output sample. */
- } arm_biquad_cas_df1_32x64_ins_q31;
-
-
- /**
- * @param[in] S points to an instance of the high precision Q31 Biquad cascade filter structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data
- * @param[in] blockSize number of samples to process.
- */
- void arm_biquad_cas_df1_32x64_q31(
- const arm_biquad_cas_df1_32x64_ins_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @param[in,out] S points to an instance of the high precision Q31 Biquad cascade filter structure.
- * @param[in] numStages number of 2nd order stages in the filter.
- * @param[in] pCoeffs points to the filter coefficients.
- * @param[in] pState points to the state buffer.
- * @param[in] postShift shift to be applied to the output. Varies according to the coefficients format
- */
- void arm_biquad_cas_df1_32x64_init_q31(
- arm_biquad_cas_df1_32x64_ins_q31 * S,
- uint8_t numStages,
- q31_t * pCoeffs,
- q63_t * pState,
- uint8_t postShift);
-
-
- /**
- * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
- */
- typedef struct
- {
- uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
- float32_t *pState; /**< points to the array of state coefficients. The array is of length 2*numStages. */
- float32_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */
- } arm_biquad_cascade_df2T_instance_f32;
-
- /**
- * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
- */
- typedef struct
- {
- uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
- float32_t *pState; /**< points to the array of state coefficients. The array is of length 4*numStages. */
- float32_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */
- } arm_biquad_cascade_stereo_df2T_instance_f32;
-
- /**
- * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
- */
- typedef struct
- {
- uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
- float64_t *pState; /**< points to the array of state coefficients. The array is of length 2*numStages. */
- float64_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */
- } arm_biquad_cascade_df2T_instance_f64;
-
-
- /**
- * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
- * @param[in] S points to an instance of the filter data structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data
- * @param[in] blockSize number of samples to process.
- */
- void arm_biquad_cascade_df2T_f32(
- const arm_biquad_cascade_df2T_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. 2 channels
- * @param[in] S points to an instance of the filter data structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data
- * @param[in] blockSize number of samples to process.
- */
- void arm_biquad_cascade_stereo_df2T_f32(
- const arm_biquad_cascade_stereo_df2T_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
- * @param[in] S points to an instance of the filter data structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data
- * @param[in] blockSize number of samples to process.
- */
- void arm_biquad_cascade_df2T_f64(
- const arm_biquad_cascade_df2T_instance_f64 * S,
- float64_t * pSrc,
- float64_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter.
- * @param[in,out] S points to an instance of the filter data structure.
- * @param[in] numStages number of 2nd order stages in the filter.
- * @param[in] pCoeffs points to the filter coefficients.
- * @param[in] pState points to the state buffer.
- */
- void arm_biquad_cascade_df2T_init_f32(
- arm_biquad_cascade_df2T_instance_f32 * S,
- uint8_t numStages,
- float32_t * pCoeffs,
- float32_t * pState);
-
-
- /**
- * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter.
- * @param[in,out] S points to an instance of the filter data structure.
- * @param[in] numStages number of 2nd order stages in the filter.
- * @param[in] pCoeffs points to the filter coefficients.
- * @param[in] pState points to the state buffer.
- */
- void arm_biquad_cascade_stereo_df2T_init_f32(
- arm_biquad_cascade_stereo_df2T_instance_f32 * S,
- uint8_t numStages,
- float32_t * pCoeffs,
- float32_t * pState);
-
-
- /**
- * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter.
- * @param[in,out] S points to an instance of the filter data structure.
- * @param[in] numStages number of 2nd order stages in the filter.
- * @param[in] pCoeffs points to the filter coefficients.
- * @param[in] pState points to the state buffer.
- */
- void arm_biquad_cascade_df2T_init_f64(
- arm_biquad_cascade_df2T_instance_f64 * S,
- uint8_t numStages,
- float64_t * pCoeffs,
- float64_t * pState);
-
-
- /**
- * @brief Instance structure for the Q15 FIR lattice filter.
- */
- typedef struct
- {
- uint16_t numStages; /**< number of filter stages. */
- q15_t *pState; /**< points to the state variable array. The array is of length numStages. */
- q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */
- } arm_fir_lattice_instance_q15;
-
- /**
- * @brief Instance structure for the Q31 FIR lattice filter.
- */
- typedef struct
- {
- uint16_t numStages; /**< number of filter stages. */
- q31_t *pState; /**< points to the state variable array. The array is of length numStages. */
- q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */
- } arm_fir_lattice_instance_q31;
-
- /**
- * @brief Instance structure for the floating-point FIR lattice filter.
- */
- typedef struct
- {
- uint16_t numStages; /**< number of filter stages. */
- float32_t *pState; /**< points to the state variable array. The array is of length numStages. */
- float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */
- } arm_fir_lattice_instance_f32;
-
-
- /**
- * @brief Initialization function for the Q15 FIR lattice filter.
- * @param[in] S points to an instance of the Q15 FIR lattice structure.
- * @param[in] numStages number of filter stages.
- * @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages.
- * @param[in] pState points to the state buffer. The array is of length numStages.
- */
- void arm_fir_lattice_init_q15(
- arm_fir_lattice_instance_q15 * S,
- uint16_t numStages,
- q15_t * pCoeffs,
- q15_t * pState);
-
-
- /**
- * @brief Processing function for the Q15 FIR lattice filter.
- * @param[in] S points to an instance of the Q15 FIR lattice structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- */
- void arm_fir_lattice_q15(
- const arm_fir_lattice_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the Q31 FIR lattice filter.
- * @param[in] S points to an instance of the Q31 FIR lattice structure.
- * @param[in] numStages number of filter stages.
- * @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages.
- * @param[in] pState points to the state buffer. The array is of length numStages.
- */
- void arm_fir_lattice_init_q31(
- arm_fir_lattice_instance_q31 * S,
- uint16_t numStages,
- q31_t * pCoeffs,
- q31_t * pState);
-
-
- /**
- * @brief Processing function for the Q31 FIR lattice filter.
- * @param[in] S points to an instance of the Q31 FIR lattice structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data
- * @param[in] blockSize number of samples to process.
- */
- void arm_fir_lattice_q31(
- const arm_fir_lattice_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
-
-/**
- * @brief Initialization function for the floating-point FIR lattice filter.
- * @param[in] S points to an instance of the floating-point FIR lattice structure.
- * @param[in] numStages number of filter stages.
- * @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages.
- * @param[in] pState points to the state buffer. The array is of length numStages.
- */
- void arm_fir_lattice_init_f32(
- arm_fir_lattice_instance_f32 * S,
- uint16_t numStages,
- float32_t * pCoeffs,
- float32_t * pState);
-
-
- /**
- * @brief Processing function for the floating-point FIR lattice filter.
- * @param[in] S points to an instance of the floating-point FIR lattice structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data
- * @param[in] blockSize number of samples to process.
- */
- void arm_fir_lattice_f32(
- const arm_fir_lattice_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Instance structure for the Q15 IIR lattice filter.
- */
- typedef struct
- {
- uint16_t numStages; /**< number of stages in the filter. */
- q15_t *pState; /**< points to the state variable array. The array is of length numStages + blockSize. */
- q15_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */
- q15_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages + 1. */
- } arm_iir_lattice_instance_q15;
-
- /**
- * @brief Instance structure for the Q31 IIR lattice filter.
- */
- typedef struct
- {
- uint16_t numStages; /**< number of stages in the filter. */
- q31_t *pState; /**< points to the state variable array. The array is of length numStages + blockSize. */
- q31_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */
- q31_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages + 1. */
- } arm_iir_lattice_instance_q31;
-
- /**
- * @brief Instance structure for the floating-point IIR lattice filter.
- */
- typedef struct
- {
- uint16_t numStages; /**< number of stages in the filter. */
- float32_t *pState; /**< points to the state variable array. The array is of length numStages + blockSize. */
- float32_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */
- float32_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages + 1. */
- } arm_iir_lattice_instance_f32;
-
-
- /**
- * @brief Processing function for the floating-point IIR lattice filter.
- * @param[in] S points to an instance of the floating-point IIR lattice structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- */
- void arm_iir_lattice_f32(
- const arm_iir_lattice_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the floating-point IIR lattice filter.
- * @param[in] S points to an instance of the floating-point IIR lattice structure.
- * @param[in] numStages number of stages in the filter.
- * @param[in] pkCoeffs points to the reflection coefficient buffer. The array is of length numStages.
- * @param[in] pvCoeffs points to the ladder coefficient buffer. The array is of length numStages + 1.
- * @param[in] pState points to the state buffer. The array is of length numStages + blockSize-1.
- * @param[in] blockSize number of samples to process.
- */
- void arm_iir_lattice_init_f32(
- arm_iir_lattice_instance_f32 * S,
- uint16_t numStages,
- float32_t * pkCoeffs,
- float32_t * pvCoeffs,
- float32_t * pState,
- uint32_t blockSize);
-
-
- /**
- * @brief Processing function for the Q31 IIR lattice filter.
- * @param[in] S points to an instance of the Q31 IIR lattice structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- */
- void arm_iir_lattice_q31(
- const arm_iir_lattice_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the Q31 IIR lattice filter.
- * @param[in] S points to an instance of the Q31 IIR lattice structure.
- * @param[in] numStages number of stages in the filter.
- * @param[in] pkCoeffs points to the reflection coefficient buffer. The array is of length numStages.
- * @param[in] pvCoeffs points to the ladder coefficient buffer. The array is of length numStages + 1.
- * @param[in] pState points to the state buffer. The array is of length numStages + blockSize.
- * @param[in] blockSize number of samples to process.
- */
- void arm_iir_lattice_init_q31(
- arm_iir_lattice_instance_q31 * S,
- uint16_t numStages,
- q31_t * pkCoeffs,
- q31_t * pvCoeffs,
- q31_t * pState,
- uint32_t blockSize);
-
-
- /**
- * @brief Processing function for the Q15 IIR lattice filter.
- * @param[in] S points to an instance of the Q15 IIR lattice structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- */
- void arm_iir_lattice_q15(
- const arm_iir_lattice_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
-
-/**
- * @brief Initialization function for the Q15 IIR lattice filter.
- * @param[in] S points to an instance of the fixed-point Q15 IIR lattice structure.
- * @param[in] numStages number of stages in the filter.
- * @param[in] pkCoeffs points to reflection coefficient buffer. The array is of length numStages.
- * @param[in] pvCoeffs points to ladder coefficient buffer. The array is of length numStages + 1.
- * @param[in] pState points to state buffer. The array is of length numStages + blockSize.
- * @param[in] blockSize number of samples to process per call.
- */
- void arm_iir_lattice_init_q15(
- arm_iir_lattice_instance_q15 * S,
- uint16_t numStages,
- q15_t * pkCoeffs,
- q15_t * pvCoeffs,
- q15_t * pState,
- uint32_t blockSize);
-
-
- /**
- * @brief Instance structure for the floating-point LMS filter.
- */
- typedef struct
- {
- uint16_t numTaps; /**< number of coefficients in the filter. */
- float32_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */
- float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
- float32_t mu; /**< step size that controls filter coefficient updates. */
- } arm_lms_instance_f32;
-
-
- /**
- * @brief Processing function for floating-point LMS filter.
- * @param[in] S points to an instance of the floating-point LMS filter structure.
- * @param[in] pSrc points to the block of input data.
- * @param[in] pRef points to the block of reference data.
- * @param[out] pOut points to the block of output data.
- * @param[out] pErr points to the block of error data.
- * @param[in] blockSize number of samples to process.
- */
- void arm_lms_f32(
- const arm_lms_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pRef,
- float32_t * pOut,
- float32_t * pErr,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for floating-point LMS filter.
- * @param[in] S points to an instance of the floating-point LMS filter structure.
- * @param[in] numTaps number of filter coefficients.
- * @param[in] pCoeffs points to the coefficient buffer.
- * @param[in] pState points to state buffer.
- * @param[in] mu step size that controls filter coefficient updates.
- * @param[in] blockSize number of samples to process.
- */
- void arm_lms_init_f32(
- arm_lms_instance_f32 * S,
- uint16_t numTaps,
- float32_t * pCoeffs,
- float32_t * pState,
- float32_t mu,
- uint32_t blockSize);
-
-
- /**
- * @brief Instance structure for the Q15 LMS filter.
- */
- typedef struct
- {
- uint16_t numTaps; /**< number of coefficients in the filter. */
- q15_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */
- q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
- q15_t mu; /**< step size that controls filter coefficient updates. */
- uint32_t postShift; /**< bit shift applied to coefficients. */
- } arm_lms_instance_q15;
-
-
- /**
- * @brief Initialization function for the Q15 LMS filter.
- * @param[in] S points to an instance of the Q15 LMS filter structure.
- * @param[in] numTaps number of filter coefficients.
- * @param[in] pCoeffs points to the coefficient buffer.
- * @param[in] pState points to the state buffer.
- * @param[in] mu step size that controls filter coefficient updates.
- * @param[in] blockSize number of samples to process.
- * @param[in] postShift bit shift applied to coefficients.
- */
- void arm_lms_init_q15(
- arm_lms_instance_q15 * S,
- uint16_t numTaps,
- q15_t * pCoeffs,
- q15_t * pState,
- q15_t mu,
- uint32_t blockSize,
- uint32_t postShift);
-
-
- /**
- * @brief Processing function for Q15 LMS filter.
- * @param[in] S points to an instance of the Q15 LMS filter structure.
- * @param[in] pSrc points to the block of input data.
- * @param[in] pRef points to the block of reference data.
- * @param[out] pOut points to the block of output data.
- * @param[out] pErr points to the block of error data.
- * @param[in] blockSize number of samples to process.
- */
- void arm_lms_q15(
- const arm_lms_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pRef,
- q15_t * pOut,
- q15_t * pErr,
- uint32_t blockSize);
-
-
- /**
- * @brief Instance structure for the Q31 LMS filter.
- */
- typedef struct
- {
- uint16_t numTaps; /**< number of coefficients in the filter. */
- q31_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */
- q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
- q31_t mu; /**< step size that controls filter coefficient updates. */
- uint32_t postShift; /**< bit shift applied to coefficients. */
- } arm_lms_instance_q31;
-
-
- /**
- * @brief Processing function for Q31 LMS filter.
- * @param[in] S points to an instance of the Q15 LMS filter structure.
- * @param[in] pSrc points to the block of input data.
- * @param[in] pRef points to the block of reference data.
- * @param[out] pOut points to the block of output data.
- * @param[out] pErr points to the block of error data.
- * @param[in] blockSize number of samples to process.
- */
- void arm_lms_q31(
- const arm_lms_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pRef,
- q31_t * pOut,
- q31_t * pErr,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for Q31 LMS filter.
- * @param[in] S points to an instance of the Q31 LMS filter structure.
- * @param[in] numTaps number of filter coefficients.
- * @param[in] pCoeffs points to coefficient buffer.
- * @param[in] pState points to state buffer.
- * @param[in] mu step size that controls filter coefficient updates.
- * @param[in] blockSize number of samples to process.
- * @param[in] postShift bit shift applied to coefficients.
- */
- void arm_lms_init_q31(
- arm_lms_instance_q31 * S,
- uint16_t numTaps,
- q31_t * pCoeffs,
- q31_t * pState,
- q31_t mu,
- uint32_t blockSize,
- uint32_t postShift);
-
-
- /**
- * @brief Instance structure for the floating-point normalized LMS filter.
- */
- typedef struct
- {
- uint16_t numTaps; /**< number of coefficients in the filter. */
- float32_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */
- float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
- float32_t mu; /**< step size that control filter coefficient updates. */
- float32_t energy; /**< saves previous frame energy. */
- float32_t x0; /**< saves previous input sample. */
- } arm_lms_norm_instance_f32;
-
-
- /**
- * @brief Processing function for floating-point normalized LMS filter.
- * @param[in] S points to an instance of the floating-point normalized LMS filter structure.
- * @param[in] pSrc points to the block of input data.
- * @param[in] pRef points to the block of reference data.
- * @param[out] pOut points to the block of output data.
- * @param[out] pErr points to the block of error data.
- * @param[in] blockSize number of samples to process.
- */
- void arm_lms_norm_f32(
- arm_lms_norm_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pRef,
- float32_t * pOut,
- float32_t * pErr,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for floating-point normalized LMS filter.
- * @param[in] S points to an instance of the floating-point LMS filter structure.
- * @param[in] numTaps number of filter coefficients.
- * @param[in] pCoeffs points to coefficient buffer.
- * @param[in] pState points to state buffer.
- * @param[in] mu step size that controls filter coefficient updates.
- * @param[in] blockSize number of samples to process.
- */
- void arm_lms_norm_init_f32(
- arm_lms_norm_instance_f32 * S,
- uint16_t numTaps,
- float32_t * pCoeffs,
- float32_t * pState,
- float32_t mu,
- uint32_t blockSize);
-
-
- /**
- * @brief Instance structure for the Q31 normalized LMS filter.
- */
- typedef struct
- {
- uint16_t numTaps; /**< number of coefficients in the filter. */
- q31_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */
- q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
- q31_t mu; /**< step size that controls filter coefficient updates. */
- uint8_t postShift; /**< bit shift applied to coefficients. */
- q31_t *recipTable; /**< points to the reciprocal initial value table. */
- q31_t energy; /**< saves previous frame energy. */
- q31_t x0; /**< saves previous input sample. */
- } arm_lms_norm_instance_q31;
-
-
- /**
- * @brief Processing function for Q31 normalized LMS filter.
- * @param[in] S points to an instance of the Q31 normalized LMS filter structure.
- * @param[in] pSrc points to the block of input data.
- * @param[in] pRef points to the block of reference data.
- * @param[out] pOut points to the block of output data.
- * @param[out] pErr points to the block of error data.
- * @param[in] blockSize number of samples to process.
- */
- void arm_lms_norm_q31(
- arm_lms_norm_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pRef,
- q31_t * pOut,
- q31_t * pErr,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for Q31 normalized LMS filter.
- * @param[in] S points to an instance of the Q31 normalized LMS filter structure.
- * @param[in] numTaps number of filter coefficients.
- * @param[in] pCoeffs points to coefficient buffer.
- * @param[in] pState points to state buffer.
- * @param[in] mu step size that controls filter coefficient updates.
- * @param[in] blockSize number of samples to process.
- * @param[in] postShift bit shift applied to coefficients.
- */
- void arm_lms_norm_init_q31(
- arm_lms_norm_instance_q31 * S,
- uint16_t numTaps,
- q31_t * pCoeffs,
- q31_t * pState,
- q31_t mu,
- uint32_t blockSize,
- uint8_t postShift);
-
-
- /**
- * @brief Instance structure for the Q15 normalized LMS filter.
- */
- typedef struct
- {
- uint16_t numTaps; /**< Number of coefficients in the filter. */
- q15_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */
- q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
- q15_t mu; /**< step size that controls filter coefficient updates. */
- uint8_t postShift; /**< bit shift applied to coefficients. */
- q15_t *recipTable; /**< Points to the reciprocal initial value table. */
- q15_t energy; /**< saves previous frame energy. */
- q15_t x0; /**< saves previous input sample. */
- } arm_lms_norm_instance_q15;
-
-
- /**
- * @brief Processing function for Q15 normalized LMS filter.
- * @param[in] S points to an instance of the Q15 normalized LMS filter structure.
- * @param[in] pSrc points to the block of input data.
- * @param[in] pRef points to the block of reference data.
- * @param[out] pOut points to the block of output data.
- * @param[out] pErr points to the block of error data.
- * @param[in] blockSize number of samples to process.
- */
- void arm_lms_norm_q15(
- arm_lms_norm_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pRef,
- q15_t * pOut,
- q15_t * pErr,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for Q15 normalized LMS filter.
- * @param[in] S points to an instance of the Q15 normalized LMS filter structure.
- * @param[in] numTaps number of filter coefficients.
- * @param[in] pCoeffs points to coefficient buffer.
- * @param[in] pState points to state buffer.
- * @param[in] mu step size that controls filter coefficient updates.
- * @param[in] blockSize number of samples to process.
- * @param[in] postShift bit shift applied to coefficients.
- */
- void arm_lms_norm_init_q15(
- arm_lms_norm_instance_q15 * S,
- uint16_t numTaps,
- q15_t * pCoeffs,
- q15_t * pState,
- q15_t mu,
- uint32_t blockSize,
- uint8_t postShift);
-
-
- /**
- * @brief Correlation of floating-point sequences.
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
- */
- void arm_correlate_f32(
- float32_t * pSrcA,
- uint32_t srcALen,
- float32_t * pSrcB,
- uint32_t srcBLen,
- float32_t * pDst);
-
-
- /**
- * @brief Correlation of Q15 sequences
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
- * @param[in] pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- */
- void arm_correlate_opt_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- q15_t * pScratch);
-
-
- /**
- * @brief Correlation of Q15 sequences.
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
- */
-
- void arm_correlate_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst);
-
-
- /**
- * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
- */
-
- void arm_correlate_fast_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst);
-
-
- /**
- * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
- * @param[in] pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- */
- void arm_correlate_fast_opt_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- q15_t * pScratch);
-
-
- /**
- * @brief Correlation of Q31 sequences.
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
- */
- void arm_correlate_q31(
- q31_t * pSrcA,
- uint32_t srcALen,
- q31_t * pSrcB,
- uint32_t srcBLen,
- q31_t * pDst);
-
-
- /**
- * @brief Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
- */
- void arm_correlate_fast_q31(
- q31_t * pSrcA,
- uint32_t srcALen,
- q31_t * pSrcB,
- uint32_t srcBLen,
- q31_t * pDst);
-
-
- /**
- * @brief Correlation of Q7 sequences.
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
- * @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
- */
- void arm_correlate_opt_q7(
- q7_t * pSrcA,
- uint32_t srcALen,
- q7_t * pSrcB,
- uint32_t srcBLen,
- q7_t * pDst,
- q15_t * pScratch1,
- q15_t * pScratch2);
-
-
- /**
- * @brief Correlation of Q7 sequences.
- * @param[in] pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
- */
- void arm_correlate_q7(
- q7_t * pSrcA,
- uint32_t srcALen,
- q7_t * pSrcB,
- uint32_t srcBLen,
- q7_t * pDst);
-
-
- /**
- * @brief Instance structure for the floating-point sparse FIR filter.
- */
- typedef struct
- {
- uint16_t numTaps; /**< number of coefficients in the filter. */
- uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */
- float32_t *pState; /**< points to the state buffer array. The array is of length maxDelay + blockSize-1. */
- float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
- uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */
- int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */
- } arm_fir_sparse_instance_f32;
-
- /**
- * @brief Instance structure for the Q31 sparse FIR filter.
- */
- typedef struct
- {
- uint16_t numTaps; /**< number of coefficients in the filter. */
- uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */
- q31_t *pState; /**< points to the state buffer array. The array is of length maxDelay + blockSize-1. */
- q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
- uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */
- int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */
- } arm_fir_sparse_instance_q31;
-
- /**
- * @brief Instance structure for the Q15 sparse FIR filter.
- */
- typedef struct
- {
- uint16_t numTaps; /**< number of coefficients in the filter. */
- uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */
- q15_t *pState; /**< points to the state buffer array. The array is of length maxDelay + blockSize-1. */
- q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
- uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */
- int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */
- } arm_fir_sparse_instance_q15;
-
- /**
- * @brief Instance structure for the Q7 sparse FIR filter.
- */
- typedef struct
- {
- uint16_t numTaps; /**< number of coefficients in the filter. */
- uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */
- q7_t *pState; /**< points to the state buffer array. The array is of length maxDelay + blockSize-1. */
- q7_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
- uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */
- int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */
- } arm_fir_sparse_instance_q7;
-
-
- /**
- * @brief Processing function for the floating-point sparse FIR filter.
- * @param[in] S points to an instance of the floating-point sparse FIR structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data
- * @param[in] pScratchIn points to a temporary buffer of size blockSize.
- * @param[in] blockSize number of input samples to process per call.
- */
- void arm_fir_sparse_f32(
- arm_fir_sparse_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- float32_t * pScratchIn,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the floating-point sparse FIR filter.
- * @param[in,out] S points to an instance of the floating-point sparse FIR structure.
- * @param[in] numTaps number of nonzero coefficients in the filter.
- * @param[in] pCoeffs points to the array of filter coefficients.
- * @param[in] pState points to the state buffer.
- * @param[in] pTapDelay points to the array of offset times.
- * @param[in] maxDelay maximum offset time supported.
- * @param[in] blockSize number of samples that will be processed per block.
- */
- void arm_fir_sparse_init_f32(
- arm_fir_sparse_instance_f32 * S,
- uint16_t numTaps,
- float32_t * pCoeffs,
- float32_t * pState,
- int32_t * pTapDelay,
- uint16_t maxDelay,
- uint32_t blockSize);
-
-
- /**
- * @brief Processing function for the Q31 sparse FIR filter.
- * @param[in] S points to an instance of the Q31 sparse FIR structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data
- * @param[in] pScratchIn points to a temporary buffer of size blockSize.
- * @param[in] blockSize number of input samples to process per call.
- */
- void arm_fir_sparse_q31(
- arm_fir_sparse_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- q31_t * pScratchIn,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the Q31 sparse FIR filter.
- * @param[in,out] S points to an instance of the Q31 sparse FIR structure.
- * @param[in] numTaps number of nonzero coefficients in the filter.
- * @param[in] pCoeffs points to the array of filter coefficients.
- * @param[in] pState points to the state buffer.
- * @param[in] pTapDelay points to the array of offset times.
- * @param[in] maxDelay maximum offset time supported.
- * @param[in] blockSize number of samples that will be processed per block.
- */
- void arm_fir_sparse_init_q31(
- arm_fir_sparse_instance_q31 * S,
- uint16_t numTaps,
- q31_t * pCoeffs,
- q31_t * pState,
- int32_t * pTapDelay,
- uint16_t maxDelay,
- uint32_t blockSize);
-
-
- /**
- * @brief Processing function for the Q15 sparse FIR filter.
- * @param[in] S points to an instance of the Q15 sparse FIR structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data
- * @param[in] pScratchIn points to a temporary buffer of size blockSize.
- * @param[in] pScratchOut points to a temporary buffer of size blockSize.
- * @param[in] blockSize number of input samples to process per call.
- */
- void arm_fir_sparse_q15(
- arm_fir_sparse_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- q15_t * pScratchIn,
- q31_t * pScratchOut,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the Q15 sparse FIR filter.
- * @param[in,out] S points to an instance of the Q15 sparse FIR structure.
- * @param[in] numTaps number of nonzero coefficients in the filter.
- * @param[in] pCoeffs points to the array of filter coefficients.
- * @param[in] pState points to the state buffer.
- * @param[in] pTapDelay points to the array of offset times.
- * @param[in] maxDelay maximum offset time supported.
- * @param[in] blockSize number of samples that will be processed per block.
- */
- void arm_fir_sparse_init_q15(
- arm_fir_sparse_instance_q15 * S,
- uint16_t numTaps,
- q15_t * pCoeffs,
- q15_t * pState,
- int32_t * pTapDelay,
- uint16_t maxDelay,
- uint32_t blockSize);
-
-
- /**
- * @brief Processing function for the Q7 sparse FIR filter.
- * @param[in] S points to an instance of the Q7 sparse FIR structure.
- * @param[in] pSrc points to the block of input data.
- * @param[out] pDst points to the block of output data
- * @param[in] pScratchIn points to a temporary buffer of size blockSize.
- * @param[in] pScratchOut points to a temporary buffer of size blockSize.
- * @param[in] blockSize number of input samples to process per call.
- */
- void arm_fir_sparse_q7(
- arm_fir_sparse_instance_q7 * S,
- q7_t * pSrc,
- q7_t * pDst,
- q7_t * pScratchIn,
- q31_t * pScratchOut,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the Q7 sparse FIR filter.
- * @param[in,out] S points to an instance of the Q7 sparse FIR structure.
- * @param[in] numTaps number of nonzero coefficients in the filter.
- * @param[in] pCoeffs points to the array of filter coefficients.
- * @param[in] pState points to the state buffer.
- * @param[in] pTapDelay points to the array of offset times.
- * @param[in] maxDelay maximum offset time supported.
- * @param[in] blockSize number of samples that will be processed per block.
- */
- void arm_fir_sparse_init_q7(
- arm_fir_sparse_instance_q7 * S,
- uint16_t numTaps,
- q7_t * pCoeffs,
- q7_t * pState,
- int32_t * pTapDelay,
- uint16_t maxDelay,
- uint32_t blockSize);
-
-
- /**
- * @brief Floating-point sin_cos function.
- * @param[in] theta input value in degrees
- * @param[out] pSinVal points to the processed sine output.
- * @param[out] pCosVal points to the processed cos output.
- */
- void arm_sin_cos_f32(
- float32_t theta,
- float32_t * pSinVal,
- float32_t * pCosVal);
-
-
- /**
- * @brief Q31 sin_cos function.
- * @param[in] theta scaled input value in degrees
- * @param[out] pSinVal points to the processed sine output.
- * @param[out] pCosVal points to the processed cosine output.
- */
- void arm_sin_cos_q31(
- q31_t theta,
- q31_t * pSinVal,
- q31_t * pCosVal);
-
-
- /**
- * @brief Floating-point complex conjugate.
- * @param[in] pSrc points to the input vector
- * @param[out] pDst points to the output vector
- * @param[in] numSamples number of complex samples in each vector
- */
- void arm_cmplx_conj_f32(
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t numSamples);
-
- /**
- * @brief Q31 complex conjugate.
- * @param[in] pSrc points to the input vector
- * @param[out] pDst points to the output vector
- * @param[in] numSamples number of complex samples in each vector
- */
- void arm_cmplx_conj_q31(
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t numSamples);
-
-
- /**
- * @brief Q15 complex conjugate.
- * @param[in] pSrc points to the input vector
- * @param[out] pDst points to the output vector
- * @param[in] numSamples number of complex samples in each vector
- */
- void arm_cmplx_conj_q15(
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t numSamples);
-
-
- /**
- * @brief Floating-point complex magnitude squared
- * @param[in] pSrc points to the complex input vector
- * @param[out] pDst points to the real output vector
- * @param[in] numSamples number of complex samples in the input vector
- */
- void arm_cmplx_mag_squared_f32(
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t numSamples);
-
-
- /**
- * @brief Q31 complex magnitude squared
- * @param[in] pSrc points to the complex input vector
- * @param[out] pDst points to the real output vector
- * @param[in] numSamples number of complex samples in the input vector
- */
- void arm_cmplx_mag_squared_q31(
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t numSamples);
-
-
- /**
- * @brief Q15 complex magnitude squared
- * @param[in] pSrc points to the complex input vector
- * @param[out] pDst points to the real output vector
- * @param[in] numSamples number of complex samples in the input vector
- */
- void arm_cmplx_mag_squared_q15(
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t numSamples);
-
-
- /**
- * @ingroup groupController
- */
-
- /**
- * @defgroup PID PID Motor Control
- *
- * A Proportional Integral Derivative (PID) controller is a generic feedback control
- * loop mechanism widely used in industrial control systems.
- * A PID controller is the most commonly used type of feedback controller.
- *
- * This set of functions implements (PID) controllers
- * for Q15, Q31, and floating-point data types. The functions operate on a single sample
- * of data and each call to the function returns a single processed value.
- * <code>S</code> points to an instance of the PID control data structure. <code>in</code>
- * is the input sample value. The functions return the output value.
- *
- * \par Algorithm:
- * <pre>
- * y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]
- * A0 = Kp + Ki + Kd
- * A1 = (-Kp ) - (2 * Kd )
- * A2 = Kd </pre>
- *
- * \par
- * where \c Kp is proportional constant, \c Ki is Integral constant and \c Kd is Derivative constant
- *
- * \par
- * \image html PID.gif "Proportional Integral Derivative Controller"
- *
- * \par
- * The PID controller calculates an "error" value as the difference between
- * the measured output and the reference input.
- * The controller attempts to minimize the error by adjusting the process control inputs.
- * The proportional value determines the reaction to the current error,
- * the integral value determines the reaction based on the sum of recent errors,
- * and the derivative value determines the reaction based on the rate at which the error has been changing.
- *
- * \par Instance Structure
- * The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure.
- * A separate instance structure must be defined for each PID Controller.
- * There are separate instance structure declarations for each of the 3 supported data types.
- *
- * \par Reset Functions
- * There is also an associated reset function for each data type which clears the state array.
- *
- * \par Initialization Functions
- * There is also an associated initialization function for each data type.
- * The initialization function performs the following operations:
- * - Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains.
- * - Zeros out the values in the state buffer.
- *
- * \par
- * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
- *
- * \par Fixed-Point Behavior
- * Care must be taken when using the fixed-point versions of the PID Controller functions.
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
- * Refer to the function specific documentation below for usage guidelines.
- */
-
- /**
- * @addtogroup PID
- * @{
- */
-
- /**
- * @brief Process function for the floating-point PID Control.
- * @param[in,out] S is an instance of the floating-point PID Control structure
- * @param[in] in input sample to process
- * @return out processed output sample.
- */
- static __INLINE float32_t arm_pid_f32(
- arm_pid_instance_f32 * S,
- float32_t in)
- {
- float32_t out;
-
- /* y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2] */
- out = (S->A0 * in) +
- (S->A1 * S->state[0]) + (S->A2 * S->state[1]) + (S->state[2]);
-
- /* Update state */
- S->state[1] = S->state[0];
- S->state[0] = in;
- S->state[2] = out;
-
- /* return to application */
- return (out);
-
- }
-
- /**
- * @brief Process function for the Q31 PID Control.
- * @param[in,out] S points to an instance of the Q31 PID Control structure
- * @param[in] in input sample to process
- * @return out processed output sample.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * Thus, if the accumulator result overflows it wraps around rather than clip.
- * In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions.
- * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
- */
- static __INLINE q31_t arm_pid_q31(
- arm_pid_instance_q31 * S,
- q31_t in)
- {
- q63_t acc;
- q31_t out;
-
- /* acc = A0 * x[n] */
- acc = (q63_t) S->A0 * in;
-
- /* acc += A1 * x[n-1] */
- acc += (q63_t) S->A1 * S->state[0];
-
- /* acc += A2 * x[n-2] */
- acc += (q63_t) S->A2 * S->state[1];
-
- /* convert output to 1.31 format to add y[n-1] */
- out = (q31_t) (acc >> 31u);
-
- /* out += y[n-1] */
- out += S->state[2];
-
- /* Update state */
- S->state[1] = S->state[0];
- S->state[0] = in;
- S->state[2] = out;
-
- /* return to application */
- return (out);
- }
-
-
- /**
- * @brief Process function for the Q15 PID Control.
- * @param[in,out] S points to an instance of the Q15 PID Control structure
- * @param[in] in input sample to process
- * @return out processed output sample.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.
- */
- static __INLINE q15_t arm_pid_q15(
- arm_pid_instance_q15 * S,
- q15_t in)
- {
- q63_t acc;
- q15_t out;
-
-#ifndef ARM_MATH_CM0_FAMILY
- __SIMD32_TYPE *vstate;
-
- /* Implementation of PID controller */
-
- /* acc = A0 * x[n] */
- acc = (q31_t) __SMUAD((uint32_t)S->A0, (uint32_t)in);
-
- /* acc += A1 * x[n-1] + A2 * x[n-2] */
- vstate = __SIMD32_CONST(S->state);
- acc = (q63_t)__SMLALD((uint32_t)S->A1, (uint32_t)*vstate, (uint64_t)acc);
-#else
- /* acc = A0 * x[n] */
- acc = ((q31_t) S->A0) * in;
-
- /* acc += A1 * x[n-1] + A2 * x[n-2] */
- acc += (q31_t) S->A1 * S->state[0];
- acc += (q31_t) S->A2 * S->state[1];
-#endif
-
- /* acc += y[n-1] */
- acc += (q31_t) S->state[2] << 15;
-
- /* saturate the output */
- out = (q15_t) (__SSAT((acc >> 15), 16));
-
- /* Update state */
- S->state[1] = S->state[0];
- S->state[0] = in;
- S->state[2] = out;
-
- /* return to application */
- return (out);
- }
-
- /**
- * @} end of PID group
- */
-
-
- /**
- * @brief Floating-point matrix inverse.
- * @param[in] src points to the instance of the input floating-point matrix structure.
- * @param[out] dst points to the instance of the output floating-point matrix structure.
- * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
- * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR.
- */
- arm_status arm_mat_inverse_f32(
- const arm_matrix_instance_f32 * src,
- arm_matrix_instance_f32 * dst);
-
-
- /**
- * @brief Floating-point matrix inverse.
- * @param[in] src points to the instance of the input floating-point matrix structure.
- * @param[out] dst points to the instance of the output floating-point matrix structure.
- * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
- * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR.
- */
- arm_status arm_mat_inverse_f64(
- const arm_matrix_instance_f64 * src,
- arm_matrix_instance_f64 * dst);
-
-
-
- /**
- * @ingroup groupController
- */
-
- /**
- * @defgroup clarke Vector Clarke Transform
- * Forward Clarke transform converts the instantaneous stator phases into a two-coordinate time invariant vector.
- * Generally the Clarke transform uses three-phase currents <code>Ia, Ib and Ic</code> to calculate currents
- * in the two-phase orthogonal stator axis <code>Ialpha</code> and <code>Ibeta</code>.
- * When <code>Ialpha</code> is superposed with <code>Ia</code> as shown in the figure below
- * \image html clarke.gif Stator current space vector and its components in (a,b).
- * and <code>Ia + Ib + Ic = 0</code>, in this condition <code>Ialpha</code> and <code>Ibeta</code>
- * can be calculated using only <code>Ia</code> and <code>Ib</code>.
- *
- * The function operates on a single sample of data and each call to the function returns the processed output.
- * The library provides separate functions for Q31 and floating-point data types.
- * \par Algorithm
- * \image html clarkeFormula.gif
- * where <code>Ia</code> and <code>Ib</code> are the instantaneous stator phases and
- * <code>pIalpha</code> and <code>pIbeta</code> are the two coordinates of time invariant vector.
- * \par Fixed-Point Behavior
- * Care must be taken when using the Q31 version of the Clarke transform.
- * In particular, the overflow and saturation behavior of the accumulator used must be considered.
- * Refer to the function specific documentation below for usage guidelines.
- */
-
- /**
- * @addtogroup clarke
- * @{
- */
-
- /**
- *
- * @brief Floating-point Clarke transform
- * @param[in] Ia input three-phase coordinate <code>a</code>
- * @param[in] Ib input three-phase coordinate <code>b</code>
- * @param[out] pIalpha points to output two-phase orthogonal vector axis alpha
- * @param[out] pIbeta points to output two-phase orthogonal vector axis beta
- */
- static __INLINE void arm_clarke_f32(
- float32_t Ia,
- float32_t Ib,
- float32_t * pIalpha,
- float32_t * pIbeta)
- {
- /* Calculate pIalpha using the equation, pIalpha = Ia */
- *pIalpha = Ia;
-
- /* Calculate pIbeta using the equation, pIbeta = (1/sqrt(3)) * Ia + (2/sqrt(3)) * Ib */
- *pIbeta = ((float32_t) 0.57735026919 * Ia + (float32_t) 1.15470053838 * Ib);
- }
-
-
- /**
- * @brief Clarke transform for Q31 version
- * @param[in] Ia input three-phase coordinate <code>a</code>
- * @param[in] Ib input three-phase coordinate <code>b</code>
- * @param[out] pIalpha points to output two-phase orthogonal vector axis alpha
- * @param[out] pIbeta points to output two-phase orthogonal vector axis beta
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 32-bit accumulator.
- * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
- * There is saturation on the addition, hence there is no risk of overflow.
- */
- static __INLINE void arm_clarke_q31(
- q31_t Ia,
- q31_t Ib,
- q31_t * pIalpha,
- q31_t * pIbeta)
- {
- q31_t product1, product2; /* Temporary variables used to store intermediate results */
-
- /* Calculating pIalpha from Ia by equation pIalpha = Ia */
- *pIalpha = Ia;
-
- /* Intermediate product is calculated by (1/(sqrt(3)) * Ia) */
- product1 = (q31_t) (((q63_t) Ia * 0x24F34E8B) >> 30);
-
- /* Intermediate product is calculated by (2/sqrt(3) * Ib) */
- product2 = (q31_t) (((q63_t) Ib * 0x49E69D16) >> 30);
-
- /* pIbeta is calculated by adding the intermediate products */
- *pIbeta = __QADD(product1, product2);
- }
-
- /**
- * @} end of clarke group
- */
-
- /**
- * @brief Converts the elements of the Q7 vector to Q31 vector.
- * @param[in] pSrc input pointer
- * @param[out] pDst output pointer
- * @param[in] blockSize number of samples to process
- */
- void arm_q7_to_q31(
- q7_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
-
-
- /**
- * @ingroup groupController
- */
-
- /**
- * @defgroup inv_clarke Vector Inverse Clarke Transform
- * Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases.
- *
- * The function operates on a single sample of data and each call to the function returns the processed output.
- * The library provides separate functions for Q31 and floating-point data types.
- * \par Algorithm
- * \image html clarkeInvFormula.gif
- * where <code>pIa</code> and <code>pIb</code> are the instantaneous stator phases and
- * <code>Ialpha</code> and <code>Ibeta</code> are the two coordinates of time invariant vector.
- * \par Fixed-Point Behavior
- * Care must be taken when using the Q31 version of the Clarke transform.
- * In particular, the overflow and saturation behavior of the accumulator used must be considered.
- * Refer to the function specific documentation below for usage guidelines.
- */
-
- /**
- * @addtogroup inv_clarke
- * @{
- */
-
- /**
- * @brief Floating-point Inverse Clarke transform
- * @param[in] Ialpha input two-phase orthogonal vector axis alpha
- * @param[in] Ibeta input two-phase orthogonal vector axis beta
- * @param[out] pIa points to output three-phase coordinate <code>a</code>
- * @param[out] pIb points to output three-phase coordinate <code>b</code>
- */
- static __INLINE void arm_inv_clarke_f32(
- float32_t Ialpha,
- float32_t Ibeta,
- float32_t * pIa,
- float32_t * pIb)
- {
- /* Calculating pIa from Ialpha by equation pIa = Ialpha */
- *pIa = Ialpha;
-
- /* Calculating pIb from Ialpha and Ibeta by equation pIb = -(1/2) * Ialpha + (sqrt(3)/2) * Ibeta */
- *pIb = -0.5f * Ialpha + 0.8660254039f * Ibeta;
- }
-
-
- /**
- * @brief Inverse Clarke transform for Q31 version
- * @param[in] Ialpha input two-phase orthogonal vector axis alpha
- * @param[in] Ibeta input two-phase orthogonal vector axis beta
- * @param[out] pIa points to output three-phase coordinate <code>a</code>
- * @param[out] pIb points to output three-phase coordinate <code>b</code>
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 32-bit accumulator.
- * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
- * There is saturation on the subtraction, hence there is no risk of overflow.
- */
- static __INLINE void arm_inv_clarke_q31(
- q31_t Ialpha,
- q31_t Ibeta,
- q31_t * pIa,
- q31_t * pIb)
- {
- q31_t product1, product2; /* Temporary variables used to store intermediate results */
-
- /* Calculating pIa from Ialpha by equation pIa = Ialpha */
- *pIa = Ialpha;
-
- /* Intermediate product is calculated by (1/(2*sqrt(3)) * Ia) */
- product1 = (q31_t) (((q63_t) (Ialpha) * (0x40000000)) >> 31);
-
- /* Intermediate product is calculated by (1/sqrt(3) * pIb) */
- product2 = (q31_t) (((q63_t) (Ibeta) * (0x6ED9EBA1)) >> 31);
-
- /* pIb is calculated by subtracting the products */
- *pIb = __QSUB(product2, product1);
- }
-
- /**
- * @} end of inv_clarke group
- */
-
- /**
- * @brief Converts the elements of the Q7 vector to Q15 vector.
- * @param[in] pSrc input pointer
- * @param[out] pDst output pointer
- * @param[in] blockSize number of samples to process
- */
- void arm_q7_to_q15(
- q7_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
-
-
- /**
- * @ingroup groupController
- */
-
- /**
- * @defgroup park Vector Park Transform
- *
- * Forward Park transform converts the input two-coordinate vector to flux and torque components.
- * The Park transform can be used to realize the transformation of the <code>Ialpha</code> and the <code>Ibeta</code> currents
- * from the stationary to the moving reference frame and control the spatial relationship between
- * the stator vector current and rotor flux vector.
- * If we consider the d axis aligned with the rotor flux, the diagram below shows the
- * current vector and the relationship from the two reference frames:
- * \image html park.gif "Stator current space vector and its component in (a,b) and in the d,q rotating reference frame"
- *
- * The function operates on a single sample of data and each call to the function returns the processed output.
- * The library provides separate functions for Q31 and floating-point data types.
- * \par Algorithm
- * \image html parkFormula.gif
- * where <code>Ialpha</code> and <code>Ibeta</code> are the stator vector components,
- * <code>pId</code> and <code>pIq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the
- * cosine and sine values of theta (rotor flux position).
- * \par Fixed-Point Behavior
- * Care must be taken when using the Q31 version of the Park transform.
- * In particular, the overflow and saturation behavior of the accumulator used must be considered.
- * Refer to the function specific documentation below for usage guidelines.
- */
-
- /**
- * @addtogroup park
- * @{
- */
-
- /**
- * @brief Floating-point Park transform
- * @param[in] Ialpha input two-phase vector coordinate alpha
- * @param[in] Ibeta input two-phase vector coordinate beta
- * @param[out] pId points to output rotor reference frame d
- * @param[out] pIq points to output rotor reference frame q
- * @param[in] sinVal sine value of rotation angle theta
- * @param[in] cosVal cosine value of rotation angle theta
- *
- * The function implements the forward Park transform.
- *
- */
- static __INLINE void arm_park_f32(
- float32_t Ialpha,
- float32_t Ibeta,
- float32_t * pId,
- float32_t * pIq,
- float32_t sinVal,
- float32_t cosVal)
- {
- /* Calculate pId using the equation, pId = Ialpha * cosVal + Ibeta * sinVal */
- *pId = Ialpha * cosVal + Ibeta * sinVal;
-
- /* Calculate pIq using the equation, pIq = - Ialpha * sinVal + Ibeta * cosVal */
- *pIq = -Ialpha * sinVal + Ibeta * cosVal;
- }
-
-
- /**
- * @brief Park transform for Q31 version
- * @param[in] Ialpha input two-phase vector coordinate alpha
- * @param[in] Ibeta input two-phase vector coordinate beta
- * @param[out] pId points to output rotor reference frame d
- * @param[out] pIq points to output rotor reference frame q
- * @param[in] sinVal sine value of rotation angle theta
- * @param[in] cosVal cosine value of rotation angle theta
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 32-bit accumulator.
- * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
- * There is saturation on the addition and subtraction, hence there is no risk of overflow.
- */
- static __INLINE void arm_park_q31(
- q31_t Ialpha,
- q31_t Ibeta,
- q31_t * pId,
- q31_t * pIq,
- q31_t sinVal,
- q31_t cosVal)
- {
- q31_t product1, product2; /* Temporary variables used to store intermediate results */
- q31_t product3, product4; /* Temporary variables used to store intermediate results */
-
- /* Intermediate product is calculated by (Ialpha * cosVal) */
- product1 = (q31_t) (((q63_t) (Ialpha) * (cosVal)) >> 31);
-
- /* Intermediate product is calculated by (Ibeta * sinVal) */
- product2 = (q31_t) (((q63_t) (Ibeta) * (sinVal)) >> 31);
-
-
- /* Intermediate product is calculated by (Ialpha * sinVal) */
- product3 = (q31_t) (((q63_t) (Ialpha) * (sinVal)) >> 31);
-
- /* Intermediate product is calculated by (Ibeta * cosVal) */
- product4 = (q31_t) (((q63_t) (Ibeta) * (cosVal)) >> 31);
-
- /* Calculate pId by adding the two intermediate products 1 and 2 */
- *pId = __QADD(product1, product2);
-
- /* Calculate pIq by subtracting the two intermediate products 3 from 4 */
- *pIq = __QSUB(product4, product3);
- }
-
- /**
- * @} end of park group
- */
-
- /**
- * @brief Converts the elements of the Q7 vector to floating-point vector.
- * @param[in] pSrc is input pointer
- * @param[out] pDst is output pointer
- * @param[in] blockSize is the number of samples to process
- */
- void arm_q7_to_float(
- q7_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @ingroup groupController
- */
-
- /**
- * @defgroup inv_park Vector Inverse Park transform
- * Inverse Park transform converts the input flux and torque components to two-coordinate vector.
- *
- * The function operates on a single sample of data and each call to the function returns the processed output.
- * The library provides separate functions for Q31 and floating-point data types.
- * \par Algorithm
- * \image html parkInvFormula.gif
- * where <code>pIalpha</code> and <code>pIbeta</code> are the stator vector components,
- * <code>Id</code> and <code>Iq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the
- * cosine and sine values of theta (rotor flux position).
- * \par Fixed-Point Behavior
- * Care must be taken when using the Q31 version of the Park transform.
- * In particular, the overflow and saturation behavior of the accumulator used must be considered.
- * Refer to the function specific documentation below for usage guidelines.
- */
-
- /**
- * @addtogroup inv_park
- * @{
- */
-
- /**
- * @brief Floating-point Inverse Park transform
- * @param[in] Id input coordinate of rotor reference frame d
- * @param[in] Iq input coordinate of rotor reference frame q
- * @param[out] pIalpha points to output two-phase orthogonal vector axis alpha
- * @param[out] pIbeta points to output two-phase orthogonal vector axis beta
- * @param[in] sinVal sine value of rotation angle theta
- * @param[in] cosVal cosine value of rotation angle theta
- */
- static __INLINE void arm_inv_park_f32(
- float32_t Id,
- float32_t Iq,
- float32_t * pIalpha,
- float32_t * pIbeta,
- float32_t sinVal,
- float32_t cosVal)
- {
- /* Calculate pIalpha using the equation, pIalpha = Id * cosVal - Iq * sinVal */
- *pIalpha = Id * cosVal - Iq * sinVal;
-
- /* Calculate pIbeta using the equation, pIbeta = Id * sinVal + Iq * cosVal */
- *pIbeta = Id * sinVal + Iq * cosVal;
- }
-
-
- /**
- * @brief Inverse Park transform for Q31 version
- * @param[in] Id input coordinate of rotor reference frame d
- * @param[in] Iq input coordinate of rotor reference frame q
- * @param[out] pIalpha points to output two-phase orthogonal vector axis alpha
- * @param[out] pIbeta points to output two-phase orthogonal vector axis beta
- * @param[in] sinVal sine value of rotation angle theta
- * @param[in] cosVal cosine value of rotation angle theta
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 32-bit accumulator.
- * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
- * There is saturation on the addition, hence there is no risk of overflow.
- */
- static __INLINE void arm_inv_park_q31(
- q31_t Id,
- q31_t Iq,
- q31_t * pIalpha,
- q31_t * pIbeta,
- q31_t sinVal,
- q31_t cosVal)
- {
- q31_t product1, product2; /* Temporary variables used to store intermediate results */
- q31_t product3, product4; /* Temporary variables used to store intermediate results */
-
- /* Intermediate product is calculated by (Id * cosVal) */
- product1 = (q31_t) (((q63_t) (Id) * (cosVal)) >> 31);
-
- /* Intermediate product is calculated by (Iq * sinVal) */
- product2 = (q31_t) (((q63_t) (Iq) * (sinVal)) >> 31);
-
-
- /* Intermediate product is calculated by (Id * sinVal) */
- product3 = (q31_t) (((q63_t) (Id) * (sinVal)) >> 31);
-
- /* Intermediate product is calculated by (Iq * cosVal) */
- product4 = (q31_t) (((q63_t) (Iq) * (cosVal)) >> 31);
-
- /* Calculate pIalpha by using the two intermediate products 1 and 2 */
- *pIalpha = __QSUB(product1, product2);
-
- /* Calculate pIbeta by using the two intermediate products 3 and 4 */
- *pIbeta = __QADD(product4, product3);
- }
-
- /**
- * @} end of Inverse park group
- */
-
-
- /**
- * @brief Converts the elements of the Q31 vector to floating-point vector.
- * @param[in] pSrc is input pointer
- * @param[out] pDst is output pointer
- * @param[in] blockSize is the number of samples to process
- */
- void arm_q31_to_float(
- q31_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
- /**
- * @ingroup groupInterpolation
- */
-
- /**
- * @defgroup LinearInterpolate Linear Interpolation
- *
- * Linear interpolation is a method of curve fitting using linear polynomials.
- * Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning the appropriate point along that line
- *
- * \par
- * \image html LinearInterp.gif "Linear interpolation"
- *
- * \par
- * A Linear Interpolate function calculates an output value(y), for the input(x)
- * using linear interpolation of the input values x0, x1( nearest input values) and the output values y0 and y1(nearest output values)
- *
- * \par Algorithm:
- * <pre>
- * y = y0 + (x - x0) * ((y1 - y0)/(x1-x0))
- * where x0, x1 are nearest values of input x
- * y0, y1 are nearest values to output y
- * </pre>
- *
- * \par
- * This set of functions implements Linear interpolation process
- * for Q7, Q15, Q31, and floating-point data types. The functions operate on a single
- * sample of data and each call to the function returns a single processed value.
- * <code>S</code> points to an instance of the Linear Interpolate function data structure.
- * <code>x</code> is the input sample value. The functions returns the output value.
- *
- * \par
- * if x is outside of the table boundary, Linear interpolation returns first value of the table
- * if x is below input range and returns last value of table if x is above range.
- */
-
- /**
- * @addtogroup LinearInterpolate
- * @{
- */
-
- /**
- * @brief Process function for the floating-point Linear Interpolation Function.
- * @param[in,out] S is an instance of the floating-point Linear Interpolation structure
- * @param[in] x input sample to process
- * @return y processed output sample.
- *
- */
- static __INLINE float32_t arm_linear_interp_f32(
- arm_linear_interp_instance_f32 * S,
- float32_t x)
- {
- float32_t y;
- float32_t x0, x1; /* Nearest input values */
- float32_t y0, y1; /* Nearest output values */
- float32_t xSpacing = S->xSpacing; /* spacing between input values */
- int32_t i; /* Index variable */
- float32_t *pYData = S->pYData; /* pointer to output table */
-
- /* Calculation of index */
- i = (int32_t) ((x - S->x1) / xSpacing);
-
- if (i < 0)
- {
- /* Iniatilize output for below specified range as least output value of table */
- y = pYData[0];
- }
- else if ((uint32_t)i >= S->nValues)
- {
- /* Iniatilize output for above specified range as last output value of table */
- y = pYData[S->nValues - 1];
- }
- else
- {
- /* Calculation of nearest input values */
- x0 = S->x1 + i * xSpacing;
- x1 = S->x1 + (i + 1) * xSpacing;
-
- /* Read of nearest output values */
- y0 = pYData[i];
- y1 = pYData[i + 1];
-
- /* Calculation of output */
- y = y0 + (x - x0) * ((y1 - y0) / (x1 - x0));
-
- }
-
- /* returns output value */
- return (y);
- }
-
-
- /**
- *
- * @brief Process function for the Q31 Linear Interpolation Function.
- * @param[in] pYData pointer to Q31 Linear Interpolation table
- * @param[in] x input sample to process
- * @param[in] nValues number of table values
- * @return y processed output sample.
- *
- * \par
- * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
- * This function can support maximum of table size 2^12.
- *
- */
- static __INLINE q31_t arm_linear_interp_q31(
- q31_t * pYData,
- q31_t x,
- uint32_t nValues)
- {
- q31_t y; /* output */
- q31_t y0, y1; /* Nearest output values */
- q31_t fract; /* fractional part */
- int32_t index; /* Index to read nearest output values */
-
- /* Input is in 12.20 format */
- /* 12 bits for the table index */
- /* Index value calculation */
- index = ((x & (q31_t)0xFFF00000) >> 20);
-
- if (index >= (int32_t)(nValues - 1))
- {
- return (pYData[nValues - 1]);
- }
- else if (index < 0)
- {
- return (pYData[0]);
- }
- else
- {
- /* 20 bits for the fractional part */
- /* shift left by 11 to keep fract in 1.31 format */
- fract = (x & 0x000FFFFF) << 11;
-
- /* Read two nearest output values from the index in 1.31(q31) format */
- y0 = pYData[index];
- y1 = pYData[index + 1];
-
- /* Calculation of y0 * (1-fract) and y is in 2.30 format */
- y = ((q31_t) ((q63_t) y0 * (0x7FFFFFFF - fract) >> 32));
-
- /* Calculation of y0 * (1-fract) + y1 *fract and y is in 2.30 format */
- y += ((q31_t) (((q63_t) y1 * fract) >> 32));
-
- /* Convert y to 1.31 format */
- return (y << 1u);
- }
- }
-
-
- /**
- *
- * @brief Process function for the Q15 Linear Interpolation Function.
- * @param[in] pYData pointer to Q15 Linear Interpolation table
- * @param[in] x input sample to process
- * @param[in] nValues number of table values
- * @return y processed output sample.
- *
- * \par
- * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
- * This function can support maximum of table size 2^12.
- *
- */
- static __INLINE q15_t arm_linear_interp_q15(
- q15_t * pYData,
- q31_t x,
- uint32_t nValues)
- {
- q63_t y; /* output */
- q15_t y0, y1; /* Nearest output values */
- q31_t fract; /* fractional part */
- int32_t index; /* Index to read nearest output values */
-
- /* Input is in 12.20 format */
- /* 12 bits for the table index */
- /* Index value calculation */
- index = ((x & (int32_t)0xFFF00000) >> 20);
-
- if (index >= (int32_t)(nValues - 1))
- {
- return (pYData[nValues - 1]);
- }
- else if (index < 0)
- {
- return (pYData[0]);
- }
- else
- {
- /* 20 bits for the fractional part */
- /* fract is in 12.20 format */
- fract = (x & 0x000FFFFF);
-
- /* Read two nearest output values from the index */
- y0 = pYData[index];
- y1 = pYData[index + 1];
-
- /* Calculation of y0 * (1-fract) and y is in 13.35 format */
- y = ((q63_t) y0 * (0xFFFFF - fract));
-
- /* Calculation of (y0 * (1-fract) + y1 * fract) and y is in 13.35 format */
- y += ((q63_t) y1 * (fract));
-
- /* convert y to 1.15 format */
- return (q15_t) (y >> 20);
- }
- }
-
-
- /**
- *
- * @brief Process function for the Q7 Linear Interpolation Function.
- * @param[in] pYData pointer to Q7 Linear Interpolation table
- * @param[in] x input sample to process
- * @param[in] nValues number of table values
- * @return y processed output sample.
- *
- * \par
- * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
- * This function can support maximum of table size 2^12.
- */
- static __INLINE q7_t arm_linear_interp_q7(
- q7_t * pYData,
- q31_t x,
- uint32_t nValues)
- {
- q31_t y; /* output */
- q7_t y0, y1; /* Nearest output values */
- q31_t fract; /* fractional part */
- uint32_t index; /* Index to read nearest output values */
-
- /* Input is in 12.20 format */
- /* 12 bits for the table index */
- /* Index value calculation */
- if (x < 0)
- {
- return (pYData[0]);
- }
- index = (x >> 20) & 0xfff;
-
- if (index >= (nValues - 1))
- {
- return (pYData[nValues - 1]);
- }
- else
- {
- /* 20 bits for the fractional part */
- /* fract is in 12.20 format */
- fract = (x & 0x000FFFFF);
-
- /* Read two nearest output values from the index and are in 1.7(q7) format */
- y0 = pYData[index];
- y1 = pYData[index + 1];
-
- /* Calculation of y0 * (1-fract ) and y is in 13.27(q27) format */
- y = ((y0 * (0xFFFFF - fract)));
-
- /* Calculation of y1 * fract + y0 * (1-fract) and y is in 13.27(q27) format */
- y += (y1 * fract);
-
- /* convert y to 1.7(q7) format */
- return (q7_t) (y >> 20);
- }
- }
-
- /**
- * @} end of LinearInterpolate group
- */
-
- /**
- * @brief Fast approximation to the trigonometric sine function for floating-point data.
- * @param[in] x input value in radians.
- * @return sin(x).
- */
- float32_t arm_sin_f32(
- float32_t x);
-
-
- /**
- * @brief Fast approximation to the trigonometric sine function for Q31 data.
- * @param[in] x Scaled input value in radians.
- * @return sin(x).
- */
- q31_t arm_sin_q31(
- q31_t x);
-
-
- /**
- * @brief Fast approximation to the trigonometric sine function for Q15 data.
- * @param[in] x Scaled input value in radians.
- * @return sin(x).
- */
- q15_t arm_sin_q15(
- q15_t x);
-
-
- /**
- * @brief Fast approximation to the trigonometric cosine function for floating-point data.
- * @param[in] x input value in radians.
- * @return cos(x).
- */
- float32_t arm_cos_f32(
- float32_t x);
-
-
- /**
- * @brief Fast approximation to the trigonometric cosine function for Q31 data.
- * @param[in] x Scaled input value in radians.
- * @return cos(x).
- */
- q31_t arm_cos_q31(
- q31_t x);
-
-
- /**
- * @brief Fast approximation to the trigonometric cosine function for Q15 data.
- * @param[in] x Scaled input value in radians.
- * @return cos(x).
- */
- q15_t arm_cos_q15(
- q15_t x);
-
-
- /**
- * @ingroup groupFastMath
- */
-
-
- /**
- * @defgroup SQRT Square Root
- *
- * Computes the square root of a number.
- * There are separate functions for Q15, Q31, and floating-point data types.
- * The square root function is computed using the Newton-Raphson algorithm.
- * This is an iterative algorithm of the form:
- * <pre>
- * x1 = x0 - f(x0)/f'(x0)
- * </pre>
- * where <code>x1</code> is the current estimate,
- * <code>x0</code> is the previous estimate, and
- * <code>f'(x0)</code> is the derivative of <code>f()</code> evaluated at <code>x0</code>.
- * For the square root function, the algorithm reduces to:
- * <pre>
- * x0 = in/2 [initial guess]
- * x1 = 1/2 * ( x0 + in / x0) [each iteration]
- * </pre>
- */
-
-
- /**
- * @addtogroup SQRT
- * @{
- */
-
- /**
- * @brief Floating-point square root function.
- * @param[in] in input value.
- * @param[out] pOut square root of input value.
- * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
- * <code>in</code> is negative value and returns zero output for negative values.
- */
- static __INLINE arm_status arm_sqrt_f32(
- float32_t in,
- float32_t * pOut)
- {
- if (in >= 0.0f)
- {
-
-#if (__FPU_USED == 1) && defined ( __CC_ARM )
- *pOut = __sqrtf(in);
-#elif (__FPU_USED == 1) && (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
- *pOut = __builtin_sqrtf(in);
-#elif (__FPU_USED == 1) && defined(__GNUC__)
- *pOut = __builtin_sqrtf(in);
-#elif (__FPU_USED == 1) && defined ( __ICCARM__ ) && (__VER__ >= 6040000)
- __ASM("VSQRT.F32 %0,%1" : "=t"(*pOut) : "t"(in));
-#else
- *pOut = sqrtf(in);
-#endif
-
- return (ARM_MATH_SUCCESS);
- }
- else
- {
- *pOut = 0.0f;
- return (ARM_MATH_ARGUMENT_ERROR);
- }
- }
-
-
- /**
- * @brief Q31 square root function.
- * @param[in] in input value. The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF.
- * @param[out] pOut square root of input value.
- * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
- * <code>in</code> is negative value and returns zero output for negative values.
- */
- arm_status arm_sqrt_q31(
- q31_t in,
- q31_t * pOut);
-
-
- /**
- * @brief Q15 square root function.
- * @param[in] in input value. The range of the input value is [0 +1) or 0x0000 to 0x7FFF.
- * @param[out] pOut square root of input value.
- * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
- * <code>in</code> is negative value and returns zero output for negative values.
- */
- arm_status arm_sqrt_q15(
- q15_t in,
- q15_t * pOut);
-
- /**
- * @} end of SQRT group
- */
-
-
- /**
- * @brief floating-point Circular write function.
- */
- static __INLINE void arm_circularWrite_f32(
- int32_t * circBuffer,
- int32_t L,
- uint16_t * writeOffset,
- int32_t bufferInc,
- const int32_t * src,
- int32_t srcInc,
- uint32_t blockSize)
- {
- uint32_t i = 0u;
- int32_t wOffset;
-
- /* Copy the value of Index pointer that points
- * to the current location where the input samples to be copied */
- wOffset = *writeOffset;
-
- /* Loop over the blockSize */
- i = blockSize;
-
- while (i > 0u)
- {
- /* copy the input sample to the circular buffer */
- circBuffer[wOffset] = *src;
-
- /* Update the input pointer */
- src += srcInc;
-
- /* Circularly update wOffset. Watch out for positive and negative value */
- wOffset += bufferInc;
- if (wOffset >= L)
- wOffset -= L;
-
- /* Decrement the loop counter */
- i--;
- }
-
- /* Update the index pointer */
- *writeOffset = (uint16_t)wOffset;
- }
-
-
-
- /**
- * @brief floating-point Circular Read function.
- */
- static __INLINE void arm_circularRead_f32(
- int32_t * circBuffer,
- int32_t L,
- int32_t * readOffset,
- int32_t bufferInc,
- int32_t * dst,
- int32_t * dst_base,
- int32_t dst_length,
- int32_t dstInc,
- uint32_t blockSize)
- {
- uint32_t i = 0u;
- int32_t rOffset, dst_end;
-
- /* Copy the value of Index pointer that points
- * to the current location from where the input samples to be read */
- rOffset = *readOffset;
- dst_end = (int32_t) (dst_base + dst_length);
-
- /* Loop over the blockSize */
- i = blockSize;
-
- while (i > 0u)
- {
- /* copy the sample from the circular buffer to the destination buffer */
- *dst = circBuffer[rOffset];
-
- /* Update the input pointer */
- dst += dstInc;
-
- if (dst == (int32_t *) dst_end)
- {
- dst = dst_base;
- }
-
- /* Circularly update rOffset. Watch out for positive and negative value */
- rOffset += bufferInc;
-
- if (rOffset >= L)
- {
- rOffset -= L;
- }
-
- /* Decrement the loop counter */
- i--;
- }
-
- /* Update the index pointer */
- *readOffset = rOffset;
- }
-
-
- /**
- * @brief Q15 Circular write function.
- */
- static __INLINE void arm_circularWrite_q15(
- q15_t * circBuffer,
- int32_t L,
- uint16_t * writeOffset,
- int32_t bufferInc,
- const q15_t * src,
- int32_t srcInc,
- uint32_t blockSize)
- {
- uint32_t i = 0u;
- int32_t wOffset;
-
- /* Copy the value of Index pointer that points
- * to the current location where the input samples to be copied */
- wOffset = *writeOffset;
-
- /* Loop over the blockSize */
- i = blockSize;
-
- while (i > 0u)
- {
- /* copy the input sample to the circular buffer */
- circBuffer[wOffset] = *src;
-
- /* Update the input pointer */
- src += srcInc;
-
- /* Circularly update wOffset. Watch out for positive and negative value */
- wOffset += bufferInc;
- if (wOffset >= L)
- wOffset -= L;
-
- /* Decrement the loop counter */
- i--;
- }
-
- /* Update the index pointer */
- *writeOffset = (uint16_t)wOffset;
- }
-
-
- /**
- * @brief Q15 Circular Read function.
- */
- static __INLINE void arm_circularRead_q15(
- q15_t * circBuffer,
- int32_t L,
- int32_t * readOffset,
- int32_t bufferInc,
- q15_t * dst,
- q15_t * dst_base,
- int32_t dst_length,
- int32_t dstInc,
- uint32_t blockSize)
- {
- uint32_t i = 0;
- int32_t rOffset, dst_end;
-
- /* Copy the value of Index pointer that points
- * to the current location from where the input samples to be read */
- rOffset = *readOffset;
-
- dst_end = (int32_t) (dst_base + dst_length);
-
- /* Loop over the blockSize */
- i = blockSize;
-
- while (i > 0u)
- {
- /* copy the sample from the circular buffer to the destination buffer */
- *dst = circBuffer[rOffset];
-
- /* Update the input pointer */
- dst += dstInc;
-
- if (dst == (q15_t *) dst_end)
- {
- dst = dst_base;
- }
-
- /* Circularly update wOffset. Watch out for positive and negative value */
- rOffset += bufferInc;
-
- if (rOffset >= L)
- {
- rOffset -= L;
- }
-
- /* Decrement the loop counter */
- i--;
- }
-
- /* Update the index pointer */
- *readOffset = rOffset;
- }
-
-
- /**
- * @brief Q7 Circular write function.
- */
- static __INLINE void arm_circularWrite_q7(
- q7_t * circBuffer,
- int32_t L,
- uint16_t * writeOffset,
- int32_t bufferInc,
- const q7_t * src,
- int32_t srcInc,
- uint32_t blockSize)
- {
- uint32_t i = 0u;
- int32_t wOffset;
-
- /* Copy the value of Index pointer that points
- * to the current location where the input samples to be copied */
- wOffset = *writeOffset;
-
- /* Loop over the blockSize */
- i = blockSize;
-
- while (i > 0u)
- {
- /* copy the input sample to the circular buffer */
- circBuffer[wOffset] = *src;
-
- /* Update the input pointer */
- src += srcInc;
-
- /* Circularly update wOffset. Watch out for positive and negative value */
- wOffset += bufferInc;
- if (wOffset >= L)
- wOffset -= L;
-
- /* Decrement the loop counter */
- i--;
- }
-
- /* Update the index pointer */
- *writeOffset = (uint16_t)wOffset;
- }
-
-
- /**
- * @brief Q7 Circular Read function.
- */
- static __INLINE void arm_circularRead_q7(
- q7_t * circBuffer,
- int32_t L,
- int32_t * readOffset,
- int32_t bufferInc,
- q7_t * dst,
- q7_t * dst_base,
- int32_t dst_length,
- int32_t dstInc,
- uint32_t blockSize)
- {
- uint32_t i = 0;
- int32_t rOffset, dst_end;
-
- /* Copy the value of Index pointer that points
- * to the current location from where the input samples to be read */
- rOffset = *readOffset;
-
- dst_end = (int32_t) (dst_base + dst_length);
-
- /* Loop over the blockSize */
- i = blockSize;
-
- while (i > 0u)
- {
- /* copy the sample from the circular buffer to the destination buffer */
- *dst = circBuffer[rOffset];
-
- /* Update the input pointer */
- dst += dstInc;
-
- if (dst == (q7_t *) dst_end)
- {
- dst = dst_base;
- }
-
- /* Circularly update rOffset. Watch out for positive and negative value */
- rOffset += bufferInc;
-
- if (rOffset >= L)
- {
- rOffset -= L;
- }
-
- /* Decrement the loop counter */
- i--;
- }
-
- /* Update the index pointer */
- *readOffset = rOffset;
- }
-
-
- /**
- * @brief Sum of the squares of the elements of a Q31 vector.
- * @param[in] pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] pResult is output value.
- */
- void arm_power_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q63_t * pResult);
-
-
- /**
- * @brief Sum of the squares of the elements of a floating-point vector.
- * @param[in] pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] pResult is output value.
- */
- void arm_power_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult);
-
-
- /**
- * @brief Sum of the squares of the elements of a Q15 vector.
- * @param[in] pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] pResult is output value.
- */
- void arm_power_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q63_t * pResult);
-
-
- /**
- * @brief Sum of the squares of the elements of a Q7 vector.
- * @param[in] pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] pResult is output value.
- */
- void arm_power_q7(
- q7_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult);
-
-
- /**
- * @brief Mean value of a Q7 vector.
- * @param[in] pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] pResult is output value.
- */
- void arm_mean_q7(
- q7_t * pSrc,
- uint32_t blockSize,
- q7_t * pResult);
-
-
- /**
- * @brief Mean value of a Q15 vector.
- * @param[in] pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] pResult is output value.
- */
- void arm_mean_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q15_t * pResult);
-
-
- /**
- * @brief Mean value of a Q31 vector.
- * @param[in] pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] pResult is output value.
- */
- void arm_mean_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult);
-
-
- /**
- * @brief Mean value of a floating-point vector.
- * @param[in] pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] pResult is output value.
- */
- void arm_mean_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult);
-
-
- /**
- * @brief Variance of the elements of a floating-point vector.
- * @param[in] pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] pResult is output value.
- */
- void arm_var_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult);
-
-
- /**
- * @brief Variance of the elements of a Q31 vector.
- * @param[in] pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] pResult is output value.
- */
- void arm_var_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult);
-
-
- /**
- * @brief Variance of the elements of a Q15 vector.
- * @param[in] pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] pResult is output value.
- */
- void arm_var_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q15_t * pResult);
-
-
- /**
- * @brief Root Mean Square of the elements of a floating-point vector.
- * @param[in] pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] pResult is output value.
- */
- void arm_rms_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult);
-
-
- /**
- * @brief Root Mean Square of the elements of a Q31 vector.
- * @param[in] pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] pResult is output value.
- */
- void arm_rms_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult);
-
-
- /**
- * @brief Root Mean Square of the elements of a Q15 vector.
- * @param[in] pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] pResult is output value.
- */
- void arm_rms_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q15_t * pResult);
-
-
- /**
- * @brief Standard deviation of the elements of a floating-point vector.
- * @param[in] pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] pResult is output value.
- */
- void arm_std_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult);
-
-
- /**
- * @brief Standard deviation of the elements of a Q31 vector.
- * @param[in] pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] pResult is output value.
- */
- void arm_std_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult);
-
-
- /**
- * @brief Standard deviation of the elements of a Q15 vector.
- * @param[in] pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] pResult is output value.
- */
- void arm_std_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q15_t * pResult);
-
-
- /**
- * @brief Floating-point complex magnitude
- * @param[in] pSrc points to the complex input vector
- * @param[out] pDst points to the real output vector
- * @param[in] numSamples number of complex samples in the input vector
- */
- void arm_cmplx_mag_f32(
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t numSamples);
-
-
- /**
- * @brief Q31 complex magnitude
- * @param[in] pSrc points to the complex input vector
- * @param[out] pDst points to the real output vector
- * @param[in] numSamples number of complex samples in the input vector
- */
- void arm_cmplx_mag_q31(
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t numSamples);
-
-
- /**
- * @brief Q15 complex magnitude
- * @param[in] pSrc points to the complex input vector
- * @param[out] pDst points to the real output vector
- * @param[in] numSamples number of complex samples in the input vector
- */
- void arm_cmplx_mag_q15(
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t numSamples);
-
-
- /**
- * @brief Q15 complex dot product
- * @param[in] pSrcA points to the first input vector
- * @param[in] pSrcB points to the second input vector
- * @param[in] numSamples number of complex samples in each vector
- * @param[out] realResult real part of the result returned here
- * @param[out] imagResult imaginary part of the result returned here
- */
- void arm_cmplx_dot_prod_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- uint32_t numSamples,
- q31_t * realResult,
- q31_t * imagResult);
-
-
- /**
- * @brief Q31 complex dot product
- * @param[in] pSrcA points to the first input vector
- * @param[in] pSrcB points to the second input vector
- * @param[in] numSamples number of complex samples in each vector
- * @param[out] realResult real part of the result returned here
- * @param[out] imagResult imaginary part of the result returned here
- */
- void arm_cmplx_dot_prod_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- uint32_t numSamples,
- q63_t * realResult,
- q63_t * imagResult);
-
-
- /**
- * @brief Floating-point complex dot product
- * @param[in] pSrcA points to the first input vector
- * @param[in] pSrcB points to the second input vector
- * @param[in] numSamples number of complex samples in each vector
- * @param[out] realResult real part of the result returned here
- * @param[out] imagResult imaginary part of the result returned here
- */
- void arm_cmplx_dot_prod_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- uint32_t numSamples,
- float32_t * realResult,
- float32_t * imagResult);
-
-
- /**
- * @brief Q15 complex-by-real multiplication
- * @param[in] pSrcCmplx points to the complex input vector
- * @param[in] pSrcReal points to the real input vector
- * @param[out] pCmplxDst points to the complex output vector
- * @param[in] numSamples number of samples in each vector
- */
- void arm_cmplx_mult_real_q15(
- q15_t * pSrcCmplx,
- q15_t * pSrcReal,
- q15_t * pCmplxDst,
- uint32_t numSamples);
-
-
- /**
- * @brief Q31 complex-by-real multiplication
- * @param[in] pSrcCmplx points to the complex input vector
- * @param[in] pSrcReal points to the real input vector
- * @param[out] pCmplxDst points to the complex output vector
- * @param[in] numSamples number of samples in each vector
- */
- void arm_cmplx_mult_real_q31(
- q31_t * pSrcCmplx,
- q31_t * pSrcReal,
- q31_t * pCmplxDst,
- uint32_t numSamples);
-
-
- /**
- * @brief Floating-point complex-by-real multiplication
- * @param[in] pSrcCmplx points to the complex input vector
- * @param[in] pSrcReal points to the real input vector
- * @param[out] pCmplxDst points to the complex output vector
- * @param[in] numSamples number of samples in each vector
- */
- void arm_cmplx_mult_real_f32(
- float32_t * pSrcCmplx,
- float32_t * pSrcReal,
- float32_t * pCmplxDst,
- uint32_t numSamples);
-
-
- /**
- * @brief Minimum value of a Q7 vector.
- * @param[in] pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] result is output pointer
- * @param[in] index is the array index of the minimum value in the input buffer.
- */
- void arm_min_q7(
- q7_t * pSrc,
- uint32_t blockSize,
- q7_t * result,
- uint32_t * index);
-
-
- /**
- * @brief Minimum value of a Q15 vector.
- * @param[in] pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] pResult is output pointer
- * @param[in] pIndex is the array index of the minimum value in the input buffer.
- */
- void arm_min_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q15_t * pResult,
- uint32_t * pIndex);
-
-
- /**
- * @brief Minimum value of a Q31 vector.
- * @param[in] pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] pResult is output pointer
- * @param[out] pIndex is the array index of the minimum value in the input buffer.
- */
- void arm_min_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult,
- uint32_t * pIndex);
-
-
- /**
- * @brief Minimum value of a floating-point vector.
- * @param[in] pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] pResult is output pointer
- * @param[out] pIndex is the array index of the minimum value in the input buffer.
- */
- void arm_min_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult,
- uint32_t * pIndex);
-
-
-/**
- * @brief Maximum value of a Q7 vector.
- * @param[in] pSrc points to the input buffer
- * @param[in] blockSize length of the input vector
- * @param[out] pResult maximum value returned here
- * @param[out] pIndex index of maximum value returned here
- */
- void arm_max_q7(
- q7_t * pSrc,
- uint32_t blockSize,
- q7_t * pResult,
- uint32_t * pIndex);
-
-
-/**
- * @brief Maximum value of a Q15 vector.
- * @param[in] pSrc points to the input buffer
- * @param[in] blockSize length of the input vector
- * @param[out] pResult maximum value returned here
- * @param[out] pIndex index of maximum value returned here
- */
- void arm_max_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q15_t * pResult,
- uint32_t * pIndex);
-
-
-/**
- * @brief Maximum value of a Q31 vector.
- * @param[in] pSrc points to the input buffer
- * @param[in] blockSize length of the input vector
- * @param[out] pResult maximum value returned here
- * @param[out] pIndex index of maximum value returned here
- */
- void arm_max_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult,
- uint32_t * pIndex);
-
-
-/**
- * @brief Maximum value of a floating-point vector.
- * @param[in] pSrc points to the input buffer
- * @param[in] blockSize length of the input vector
- * @param[out] pResult maximum value returned here
- * @param[out] pIndex index of maximum value returned here
- */
- void arm_max_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult,
- uint32_t * pIndex);
-
-
- /**
- * @brief Q15 complex-by-complex multiplication
- * @param[in] pSrcA points to the first input vector
- * @param[in] pSrcB points to the second input vector
- * @param[out] pDst points to the output vector
- * @param[in] numSamples number of complex samples in each vector
- */
- void arm_cmplx_mult_cmplx_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- q15_t * pDst,
- uint32_t numSamples);
-
-
- /**
- * @brief Q31 complex-by-complex multiplication
- * @param[in] pSrcA points to the first input vector
- * @param[in] pSrcB points to the second input vector
- * @param[out] pDst points to the output vector
- * @param[in] numSamples number of complex samples in each vector
- */
- void arm_cmplx_mult_cmplx_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- q31_t * pDst,
- uint32_t numSamples);
-
-
- /**
- * @brief Floating-point complex-by-complex multiplication
- * @param[in] pSrcA points to the first input vector
- * @param[in] pSrcB points to the second input vector
- * @param[out] pDst points to the output vector
- * @param[in] numSamples number of complex samples in each vector
- */
- void arm_cmplx_mult_cmplx_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- float32_t * pDst,
- uint32_t numSamples);
-
-
- /**
- * @brief Converts the elements of the floating-point vector to Q31 vector.
- * @param[in] pSrc points to the floating-point input vector
- * @param[out] pDst points to the Q31 output vector
- * @param[in] blockSize length of the input vector
- */
- void arm_float_to_q31(
- float32_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Converts the elements of the floating-point vector to Q15 vector.
- * @param[in] pSrc points to the floating-point input vector
- * @param[out] pDst points to the Q15 output vector
- * @param[in] blockSize length of the input vector
- */
- void arm_float_to_q15(
- float32_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Converts the elements of the floating-point vector to Q7 vector.
- * @param[in] pSrc points to the floating-point input vector
- * @param[out] pDst points to the Q7 output vector
- * @param[in] blockSize length of the input vector
- */
- void arm_float_to_q7(
- float32_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Converts the elements of the Q31 vector to Q15 vector.
- * @param[in] pSrc is input pointer
- * @param[out] pDst is output pointer
- * @param[in] blockSize is the number of samples to process
- */
- void arm_q31_to_q15(
- q31_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Converts the elements of the Q31 vector to Q7 vector.
- * @param[in] pSrc is input pointer
- * @param[out] pDst is output pointer
- * @param[in] blockSize is the number of samples to process
- */
- void arm_q31_to_q7(
- q31_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Converts the elements of the Q15 vector to floating-point vector.
- * @param[in] pSrc is input pointer
- * @param[out] pDst is output pointer
- * @param[in] blockSize is the number of samples to process
- */
- void arm_q15_to_float(
- q15_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Converts the elements of the Q15 vector to Q31 vector.
- * @param[in] pSrc is input pointer
- * @param[out] pDst is output pointer
- * @param[in] blockSize is the number of samples to process
- */
- void arm_q15_to_q31(
- q15_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Converts the elements of the Q15 vector to Q7 vector.
- * @param[in] pSrc is input pointer
- * @param[out] pDst is output pointer
- * @param[in] blockSize is the number of samples to process
- */
- void arm_q15_to_q7(
- q15_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @ingroup groupInterpolation
- */
-
- /**
- * @defgroup BilinearInterpolate Bilinear Interpolation
- *
- * Bilinear interpolation is an extension of linear interpolation applied to a two dimensional grid.
- * The underlying function <code>f(x, y)</code> is sampled on a regular grid and the interpolation process
- * determines values between the grid points.
- * Bilinear interpolation is equivalent to two step linear interpolation, first in the x-dimension and then in the y-dimension.
- * Bilinear interpolation is often used in image processing to rescale images.
- * The CMSIS DSP library provides bilinear interpolation functions for Q7, Q15, Q31, and floating-point data types.
- *
- * <b>Algorithm</b>
- * \par
- * The instance structure used by the bilinear interpolation functions describes a two dimensional data table.
- * For floating-point, the instance structure is defined as:
- * <pre>
- * typedef struct
- * {
- * uint16_t numRows;
- * uint16_t numCols;
- * float32_t *pData;
- * } arm_bilinear_interp_instance_f32;
- * </pre>
- *
- * \par
- * where <code>numRows</code> specifies the number of rows in the table;
- * <code>numCols</code> specifies the number of columns in the table;
- * and <code>pData</code> points to an array of size <code>numRows*numCols</code> values.
- * The data table <code>pTable</code> is organized in row order and the supplied data values fall on integer indexes.
- * That is, table element (x,y) is located at <code>pTable[x + y*numCols]</code> where x and y are integers.
- *
- * \par
- * Let <code>(x, y)</code> specify the desired interpolation point. Then define:
- * <pre>
- * XF = floor(x)
- * YF = floor(y)
- * </pre>
- * \par
- * The interpolated output point is computed as:
- * <pre>
- * f(x, y) = f(XF, YF) * (1-(x-XF)) * (1-(y-YF))
- * + f(XF + 1, YF) * (x-XF)*(1-(y-YF))
- * + f(XF, YF + 1) * (1-(x-XF))*(y-YF)
- * + f(XF + 1, YF + 1) * (x-XF)*(y-YF)
- * </pre>
- * Note that the coordinates (x, y) contain integer and fractional components.
- * The integer components specify which portion of the table to use while the
- * fractional components control the interpolation processor.
- *
- * \par
- * if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output.
- */
-
- /**
- * @addtogroup BilinearInterpolate
- * @{
- */
-
-
- /**
- *
- * @brief Floating-point bilinear interpolation.
- * @param[in,out] S points to an instance of the interpolation structure.
- * @param[in] X interpolation coordinate.
- * @param[in] Y interpolation coordinate.
- * @return out interpolated value.
- */
- static __INLINE float32_t arm_bilinear_interp_f32(
- const arm_bilinear_interp_instance_f32 * S,
- float32_t X,
- float32_t Y)
- {
- float32_t out;
- float32_t f00, f01, f10, f11;
- float32_t *pData = S->pData;
- int32_t xIndex, yIndex, index;
- float32_t xdiff, ydiff;
- float32_t b1, b2, b3, b4;
-
- xIndex = (int32_t) X;
- yIndex = (int32_t) Y;
-
- /* Care taken for table outside boundary */
- /* Returns zero output when values are outside table boundary */
- if (xIndex < 0 || xIndex > (S->numRows - 1) || yIndex < 0 || yIndex > (S->numCols - 1))
- {
- return (0);
- }
-
- /* Calculation of index for two nearest points in X-direction */
- index = (xIndex - 1) + (yIndex - 1) * S->numCols;
-
-
- /* Read two nearest points in X-direction */
- f00 = pData[index];
- f01 = pData[index + 1];
-
- /* Calculation of index for two nearest points in Y-direction */
- index = (xIndex - 1) + (yIndex) * S->numCols;
-
-
- /* Read two nearest points in Y-direction */
- f10 = pData[index];
- f11 = pData[index + 1];
-
- /* Calculation of intermediate values */
- b1 = f00;
- b2 = f01 - f00;
- b3 = f10 - f00;
- b4 = f00 - f01 - f10 + f11;
-
- /* Calculation of fractional part in X */
- xdiff = X - xIndex;
-
- /* Calculation of fractional part in Y */
- ydiff = Y - yIndex;
-
- /* Calculation of bi-linear interpolated output */
- out = b1 + b2 * xdiff + b3 * ydiff + b4 * xdiff * ydiff;
-
- /* return to application */
- return (out);
- }
-
-
- /**
- *
- * @brief Q31 bilinear interpolation.
- * @param[in,out] S points to an instance of the interpolation structure.
- * @param[in] X interpolation coordinate in 12.20 format.
- * @param[in] Y interpolation coordinate in 12.20 format.
- * @return out interpolated value.
- */
- static __INLINE q31_t arm_bilinear_interp_q31(
- arm_bilinear_interp_instance_q31 * S,
- q31_t X,
- q31_t Y)
- {
- q31_t out; /* Temporary output */
- q31_t acc = 0; /* output */
- q31_t xfract, yfract; /* X, Y fractional parts */
- q31_t x1, x2, y1, y2; /* Nearest output values */
- int32_t rI, cI; /* Row and column indices */
- q31_t *pYData = S->pData; /* pointer to output table values */
- uint32_t nCols = S->numCols; /* num of rows */
-
- /* Input is in 12.20 format */
- /* 12 bits for the table index */
- /* Index value calculation */
- rI = ((X & (q31_t)0xFFF00000) >> 20);
-
- /* Input is in 12.20 format */
- /* 12 bits for the table index */
- /* Index value calculation */
- cI = ((Y & (q31_t)0xFFF00000) >> 20);
-
- /* Care taken for table outside boundary */
- /* Returns zero output when values are outside table boundary */
- if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
- {
- return (0);
- }
-
- /* 20 bits for the fractional part */
- /* shift left xfract by 11 to keep 1.31 format */
- xfract = (X & 0x000FFFFF) << 11u;
-
- /* Read two nearest output values from the index */
- x1 = pYData[(rI) + (int32_t)nCols * (cI) ];
- x2 = pYData[(rI) + (int32_t)nCols * (cI) + 1];
-
- /* 20 bits for the fractional part */
- /* shift left yfract by 11 to keep 1.31 format */
- yfract = (Y & 0x000FFFFF) << 11u;
-
- /* Read two nearest output values from the index */
- y1 = pYData[(rI) + (int32_t)nCols * (cI + 1) ];
- y2 = pYData[(rI) + (int32_t)nCols * (cI + 1) + 1];
-
- /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 3.29(q29) format */
- out = ((q31_t) (((q63_t) x1 * (0x7FFFFFFF - xfract)) >> 32));
- acc = ((q31_t) (((q63_t) out * (0x7FFFFFFF - yfract)) >> 32));
-
- /* x2 * (xfract) * (1-yfract) in 3.29(q29) and adding to acc */
- out = ((q31_t) ((q63_t) x2 * (0x7FFFFFFF - yfract) >> 32));
- acc += ((q31_t) ((q63_t) out * (xfract) >> 32));
-
- /* y1 * (1 - xfract) * (yfract) in 3.29(q29) and adding to acc */
- out = ((q31_t) ((q63_t) y1 * (0x7FFFFFFF - xfract) >> 32));
- acc += ((q31_t) ((q63_t) out * (yfract) >> 32));
-
- /* y2 * (xfract) * (yfract) in 3.29(q29) and adding to acc */
- out = ((q31_t) ((q63_t) y2 * (xfract) >> 32));
- acc += ((q31_t) ((q63_t) out * (yfract) >> 32));
-
- /* Convert acc to 1.31(q31) format */
- return ((q31_t)(acc << 2));
- }
-
-
- /**
- * @brief Q15 bilinear interpolation.
- * @param[in,out] S points to an instance of the interpolation structure.
- * @param[in] X interpolation coordinate in 12.20 format.
- * @param[in] Y interpolation coordinate in 12.20 format.
- * @return out interpolated value.
- */
- static __INLINE q15_t arm_bilinear_interp_q15(
- arm_bilinear_interp_instance_q15 * S,
- q31_t X,
- q31_t Y)
- {
- q63_t acc = 0; /* output */
- q31_t out; /* Temporary output */
- q15_t x1, x2, y1, y2; /* Nearest output values */
- q31_t xfract, yfract; /* X, Y fractional parts */
- int32_t rI, cI; /* Row and column indices */
- q15_t *pYData = S->pData; /* pointer to output table values */
- uint32_t nCols = S->numCols; /* num of rows */
-
- /* Input is in 12.20 format */
- /* 12 bits for the table index */
- /* Index value calculation */
- rI = ((X & (q31_t)0xFFF00000) >> 20);
-
- /* Input is in 12.20 format */
- /* 12 bits for the table index */
- /* Index value calculation */
- cI = ((Y & (q31_t)0xFFF00000) >> 20);
-
- /* Care taken for table outside boundary */
- /* Returns zero output when values are outside table boundary */
- if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
- {
- return (0);
- }
-
- /* 20 bits for the fractional part */
- /* xfract should be in 12.20 format */
- xfract = (X & 0x000FFFFF);
-
- /* Read two nearest output values from the index */
- x1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) ];
- x2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) + 1];
-
- /* 20 bits for the fractional part */
- /* yfract should be in 12.20 format */
- yfract = (Y & 0x000FFFFF);
-
- /* Read two nearest output values from the index */
- y1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) ];
- y2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) + 1];
-
- /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 13.51 format */
-
- /* x1 is in 1.15(q15), xfract in 12.20 format and out is in 13.35 format */
- /* convert 13.35 to 13.31 by right shifting and out is in 1.31 */
- out = (q31_t) (((q63_t) x1 * (0xFFFFF - xfract)) >> 4u);
- acc = ((q63_t) out * (0xFFFFF - yfract));
-
- /* x2 * (xfract) * (1-yfract) in 1.51 and adding to acc */
- out = (q31_t) (((q63_t) x2 * (0xFFFFF - yfract)) >> 4u);
- acc += ((q63_t) out * (xfract));
-
- /* y1 * (1 - xfract) * (yfract) in 1.51 and adding to acc */
- out = (q31_t) (((q63_t) y1 * (0xFFFFF - xfract)) >> 4u);
- acc += ((q63_t) out * (yfract));
-
- /* y2 * (xfract) * (yfract) in 1.51 and adding to acc */
- out = (q31_t) (((q63_t) y2 * (xfract)) >> 4u);
- acc += ((q63_t) out * (yfract));
-
- /* acc is in 13.51 format and down shift acc by 36 times */
- /* Convert out to 1.15 format */
- return ((q15_t)(acc >> 36));
- }
-
-
- /**
- * @brief Q7 bilinear interpolation.
- * @param[in,out] S points to an instance of the interpolation structure.
- * @param[in] X interpolation coordinate in 12.20 format.
- * @param[in] Y interpolation coordinate in 12.20 format.
- * @return out interpolated value.
- */
- static __INLINE q7_t arm_bilinear_interp_q7(
- arm_bilinear_interp_instance_q7 * S,
- q31_t X,
- q31_t Y)
- {
- q63_t acc = 0; /* output */
- q31_t out; /* Temporary output */
- q31_t xfract, yfract; /* X, Y fractional parts */
- q7_t x1, x2, y1, y2; /* Nearest output values */
- int32_t rI, cI; /* Row and column indices */
- q7_t *pYData = S->pData; /* pointer to output table values */
- uint32_t nCols = S->numCols; /* num of rows */
-
- /* Input is in 12.20 format */
- /* 12 bits for the table index */
- /* Index value calculation */
- rI = ((X & (q31_t)0xFFF00000) >> 20);
-
- /* Input is in 12.20 format */
- /* 12 bits for the table index */
- /* Index value calculation */
- cI = ((Y & (q31_t)0xFFF00000) >> 20);
-
- /* Care taken for table outside boundary */
- /* Returns zero output when values are outside table boundary */
- if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
- {
- return (0);
- }
-
- /* 20 bits for the fractional part */
- /* xfract should be in 12.20 format */
- xfract = (X & (q31_t)0x000FFFFF);
-
- /* Read two nearest output values from the index */
- x1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) ];
- x2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) + 1];
-
- /* 20 bits for the fractional part */
- /* yfract should be in 12.20 format */
- yfract = (Y & (q31_t)0x000FFFFF);
-
- /* Read two nearest output values from the index */
- y1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) ];
- y2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) + 1];
-
- /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 16.47 format */
- out = ((x1 * (0xFFFFF - xfract)));
- acc = (((q63_t) out * (0xFFFFF - yfract)));
-
- /* x2 * (xfract) * (1-yfract) in 2.22 and adding to acc */
- out = ((x2 * (0xFFFFF - yfract)));
- acc += (((q63_t) out * (xfract)));
-
- /* y1 * (1 - xfract) * (yfract) in 2.22 and adding to acc */
- out = ((y1 * (0xFFFFF - xfract)));
- acc += (((q63_t) out * (yfract)));
-
- /* y2 * (xfract) * (yfract) in 2.22 and adding to acc */
- out = ((y2 * (yfract)));
- acc += (((q63_t) out * (xfract)));
-
- /* acc in 16.47 format and down shift by 40 to convert to 1.7 format */
- return ((q7_t)(acc >> 40));
- }
-
- /**
- * @} end of BilinearInterpolate group
- */
-
-
-/* SMMLAR */
-#define multAcc_32x32_keep32_R(a, x, y) \
- a = (q31_t) (((((q63_t) a) << 32) + ((q63_t) x * y) + 0x80000000LL ) >> 32)
-
-/* SMMLSR */
-#define multSub_32x32_keep32_R(a, x, y) \
- a = (q31_t) (((((q63_t) a) << 32) - ((q63_t) x * y) + 0x80000000LL ) >> 32)
-
-/* SMMULR */
-#define mult_32x32_keep32_R(a, x, y) \
- a = (q31_t) (((q63_t) x * y + 0x80000000LL ) >> 32)
-
-/* SMMLA */
-#define multAcc_32x32_keep32(a, x, y) \
- a += (q31_t) (((q63_t) x * y) >> 32)
-
-/* SMMLS */
-#define multSub_32x32_keep32(a, x, y) \
- a -= (q31_t) (((q63_t) x * y) >> 32)
-
-/* SMMUL */
-#define mult_32x32_keep32(a, x, y) \
- a = (q31_t) (((q63_t) x * y ) >> 32)
-
-
-#if defined ( __CC_ARM )
- /* Enter low optimization region - place directly above function definition */
- #if defined( ARM_MATH_CM4 ) || defined( ARM_MATH_CM7)
- #define LOW_OPTIMIZATION_ENTER \
- _Pragma ("push") \
- _Pragma ("O1")
- #else
- #define LOW_OPTIMIZATION_ENTER
- #endif
-
- /* Exit low optimization region - place directly after end of function definition */
- #if defined( ARM_MATH_CM4 ) || defined( ARM_MATH_CM7)
- #define LOW_OPTIMIZATION_EXIT \
- _Pragma ("pop")
- #else
- #define LOW_OPTIMIZATION_EXIT
- #endif
-
- /* Enter low optimization region - place directly above function definition */
- #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
-
- /* Exit low optimization region - place directly after end of function definition */
- #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
-
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #define LOW_OPTIMIZATION_ENTER
- #define LOW_OPTIMIZATION_EXIT
- #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
- #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
-
-#elif defined(__GNUC__)
- #define LOW_OPTIMIZATION_ENTER __attribute__(( optimize("-O1") ))
- #define LOW_OPTIMIZATION_EXIT
- #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
- #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
-
-#elif defined(__ICCARM__)
- /* Enter low optimization region - place directly above function definition */
- #if defined( ARM_MATH_CM4 ) || defined( ARM_MATH_CM7)
- #define LOW_OPTIMIZATION_ENTER \
- _Pragma ("optimize=low")
- #else
- #define LOW_OPTIMIZATION_ENTER
- #endif
-
- /* Exit low optimization region - place directly after end of function definition */
- #define LOW_OPTIMIZATION_EXIT
-
- /* Enter low optimization region - place directly above function definition */
- #if defined( ARM_MATH_CM4 ) || defined( ARM_MATH_CM7)
- #define IAR_ONLY_LOW_OPTIMIZATION_ENTER \
- _Pragma ("optimize=low")
- #else
- #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
- #endif
-
- /* Exit low optimization region - place directly after end of function definition */
- #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
-
-#elif defined(__CSMC__)
- #define LOW_OPTIMIZATION_ENTER
- #define LOW_OPTIMIZATION_EXIT
- #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
- #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
-
-#elif defined(__TASKING__)
- #define LOW_OPTIMIZATION_ENTER
- #define LOW_OPTIMIZATION_EXIT
- #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
- #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
-
-#endif
-
-
-#ifdef __cplusplus
-}
-#endif
-
-
-#if defined ( __GNUC__ )
-#pragma GCC diagnostic pop
-#endif
-
-#endif /* _ARM_MATH_H */
-
-/**
- *
- * End of file.
- */
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2015 ARM Limited. All rights reserved.
+*
+* $Date: 20. October 2015
+* $Revision: V1.4.5 b
+*
+* Project: CMSIS DSP Library
+* Title: arm_math.h
+*
+* Description: Public header file for CMSIS DSP Library
+*
+* Target Processor: Cortex-M7/Cortex-M4/Cortex-M3/Cortex-M0
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in
+* the documentation and/or other materials provided with the
+* distribution.
+* - Neither the name of ARM LIMITED nor the names of its contributors
+* may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+ * -------------------------------------------------------------------- */
+
+/**
+ * @defgroup groupMath Basic Math Functions
+ */
+
+/**
+ * @defgroup groupFastMath Fast Math Functions
+ * This set of functions provides a fast approximation to sine, cosine, and square root.
+ * As compared to most of the other functions in the CMSIS math library, the fast math functions
+ * operate on individual values and not arrays.
+ * There are separate functions for Q15, Q31, and floating-point data.
+ *
+ */
+
+/**
+ * @defgroup groupCmplxMath Complex Math Functions
+ * This set of functions operates on complex data vectors.
+ * The data in the complex arrays is stored in an interleaved fashion
+ * (real, imag, real, imag, ...).
+ * In the API functions, the number of samples in a complex array refers
+ * to the number of complex values; the array contains twice this number of
+ * real values.
+ */
+
+/**
+ * @defgroup groupFilters Filtering Functions
+ */
+
+/**
+ * @defgroup groupMatrix Matrix Functions
+ *
+ * This set of functions provides basic matrix math operations.
+ * The functions operate on matrix data structures. For example,
+ * the type
+ * definition for the floating-point matrix structure is shown
+ * below:
+ * <pre>
+ * typedef struct
+ * {
+ * uint16_t numRows; // number of rows of the matrix.
+ * uint16_t numCols; // number of columns of the matrix.
+ * float32_t *pData; // points to the data of the matrix.
+ * } arm_matrix_instance_f32;
+ * </pre>
+ * There are similar definitions for Q15 and Q31 data types.
+ *
+ * The structure specifies the size of the matrix and then points to
+ * an array of data. The array is of size <code>numRows X numCols</code>
+ * and the values are arranged in row order. That is, the
+ * matrix element (i, j) is stored at:
+ * <pre>
+ * pData[i*numCols + j]
+ * </pre>
+ *
+ * \par Init Functions
+ * There is an associated initialization function for each type of matrix
+ * data structure.
+ * The initialization function sets the values of the internal structure fields.
+ * Refer to the function <code>arm_mat_init_f32()</code>, <code>arm_mat_init_q31()</code>
+ * and <code>arm_mat_init_q15()</code> for floating-point, Q31 and Q15 types, respectively.
+ *
+ * \par
+ * Use of the initialization function is optional. However, if initialization function is used
+ * then the instance structure cannot be placed into a const data section.
+ * To place the instance structure in a const data
+ * section, manually initialize the data structure. For example:
+ * <pre>
+ * <code>arm_matrix_instance_f32 S = {nRows, nColumns, pData};</code>
+ * <code>arm_matrix_instance_q31 S = {nRows, nColumns, pData};</code>
+ * <code>arm_matrix_instance_q15 S = {nRows, nColumns, pData};</code>
+ * </pre>
+ * where <code>nRows</code> specifies the number of rows, <code>nColumns</code>
+ * specifies the number of columns, and <code>pData</code> points to the
+ * data array.
+ *
+ * \par Size Checking
+ * By default all of the matrix functions perform size checking on the input and
+ * output matrices. For example, the matrix addition function verifies that the
+ * two input matrices and the output matrix all have the same number of rows and
+ * columns. If the size check fails the functions return:
+ * <pre>
+ * ARM_MATH_SIZE_MISMATCH
+ * </pre>
+ * Otherwise the functions return
+ * <pre>
+ * ARM_MATH_SUCCESS
+ * </pre>
+ * There is some overhead associated with this matrix size checking.
+ * The matrix size checking is enabled via the \#define
+ * <pre>
+ * ARM_MATH_MATRIX_CHECK
+ * </pre>
+ * within the library project settings. By default this macro is defined
+ * and size checking is enabled. By changing the project settings and
+ * undefining this macro size checking is eliminated and the functions
+ * run a bit faster. With size checking disabled the functions always
+ * return <code>ARM_MATH_SUCCESS</code>.
+ */
+
+/**
+ * @defgroup groupTransforms Transform Functions
+ */
+
+/**
+ * @defgroup groupController Controller Functions
+ */
+
+/**
+ * @defgroup groupStats Statistics Functions
+ */
+/**
+ * @defgroup groupSupport Support Functions
+ */
+
+/**
+ * @defgroup groupInterpolation Interpolation Functions
+ * These functions perform 1- and 2-dimensional interpolation of data.
+ * Linear interpolation is used for 1-dimensional data and
+ * bilinear interpolation is used for 2-dimensional data.
+ */
+
+/**
+ * @defgroup groupExamples Examples
+ */
+#ifndef _ARM_MATH_H
+#define _ARM_MATH_H
+
+/* ignore some GCC warnings */
+#if defined ( __GNUC__ )
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wsign-conversion"
+#pragma GCC diagnostic ignored "-Wconversion"
+#pragma GCC diagnostic ignored "-Wunused-parameter"
+#endif
+
+#define __CMSIS_GENERIC /* disable NVIC and Systick functions */
+
+#if defined(ARM_MATH_CM7)
+ #include "core_cm7.h"
+#elif defined (ARM_MATH_CM4)
+ #include "core_cm4.h"
+#elif defined (ARM_MATH_CM3)
+ #include "core_cm3.h"
+#elif defined (ARM_MATH_CM0)
+ #include "core_cm0.h"
+ #define ARM_MATH_CM0_FAMILY
+#elif defined (ARM_MATH_CM0PLUS)
+ #include "core_cm0plus.h"
+ #define ARM_MATH_CM0_FAMILY
+#else
+ #error "Define according the used Cortex core ARM_MATH_CM7, ARM_MATH_CM4, ARM_MATH_CM3, ARM_MATH_CM0PLUS or ARM_MATH_CM0"
+#endif
+
+#undef __CMSIS_GENERIC /* enable NVIC and Systick functions */
+#include "string.h"
+#include "math.h"
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+ /**
+ * @brief Macros required for reciprocal calculation in Normalized LMS
+ */
+
+#define DELTA_Q31 (0x100)
+#define DELTA_Q15 0x5
+#define INDEX_MASK 0x0000003F
+#ifndef PI
+#define PI 3.14159265358979f
+#endif
+
+ /**
+ * @brief Macros required for SINE and COSINE Fast math approximations
+ */
+
+#define FAST_MATH_TABLE_SIZE 512
+#define FAST_MATH_Q31_SHIFT (32 - 10)
+#define FAST_MATH_Q15_SHIFT (16 - 10)
+#define CONTROLLER_Q31_SHIFT (32 - 9)
+#define TABLE_SIZE 256
+#define TABLE_SPACING_Q31 0x400000
+#define TABLE_SPACING_Q15 0x80
+
+ /**
+ * @brief Macros required for SINE and COSINE Controller functions
+ */
+ /* 1.31(q31) Fixed value of 2/360 */
+ /* -1 to +1 is divided into 360 values so total spacing is (2/360) */
+#define INPUT_SPACING 0xB60B61
+
+ /**
+ * @brief Macro for Unaligned Support
+ */
+#ifndef UNALIGNED_SUPPORT_DISABLE
+ #define ALIGN4
+#else
+ #if defined (__GNUC__)
+ #define ALIGN4 __attribute__((aligned(4)))
+ #else
+ #define ALIGN4 __align(4)
+ #endif
+#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
+
+ /**
+ * @brief Error status returned by some functions in the library.
+ */
+
+ typedef enum
+ {
+ ARM_MATH_SUCCESS = 0, /**< No error */
+ ARM_MATH_ARGUMENT_ERROR = -1, /**< One or more arguments are incorrect */
+ ARM_MATH_LENGTH_ERROR = -2, /**< Length of data buffer is incorrect */
+ ARM_MATH_SIZE_MISMATCH = -3, /**< Size of matrices is not compatible with the operation. */
+ ARM_MATH_NANINF = -4, /**< Not-a-number (NaN) or infinity is generated */
+ ARM_MATH_SINGULAR = -5, /**< Generated by matrix inversion if the input matrix is singular and cannot be inverted. */
+ ARM_MATH_TEST_FAILURE = -6 /**< Test Failed */
+ } arm_status;
+
+ /**
+ * @brief 8-bit fractional data type in 1.7 format.
+ */
+ typedef int8_t q7_t;
+
+ /**
+ * @brief 16-bit fractional data type in 1.15 format.
+ */
+ typedef int16_t q15_t;
+
+ /**
+ * @brief 32-bit fractional data type in 1.31 format.
+ */
+ typedef int32_t q31_t;
+
+ /**
+ * @brief 64-bit fractional data type in 1.63 format.
+ */
+ typedef int64_t q63_t;
+
+ /**
+ * @brief 32-bit floating-point type definition.
+ */
+ typedef float float32_t;
+
+ /**
+ * @brief 64-bit floating-point type definition.
+ */
+ typedef double float64_t;
+
+ /**
+ * @brief definition to read/write two 16 bit values.
+ */
+#if defined __CC_ARM
+ #define __SIMD32_TYPE int32_t __packed
+ #define CMSIS_UNUSED __attribute__((unused))
+
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #define __SIMD32_TYPE int32_t
+ #define CMSIS_UNUSED __attribute__((unused))
+
+#elif defined __GNUC__
+ #define __SIMD32_TYPE int32_t
+ #define CMSIS_UNUSED __attribute__((unused))
+
+#elif defined __ICCARM__
+ #define __SIMD32_TYPE int32_t __packed
+ #define CMSIS_UNUSED
+
+#elif defined __CSMC__
+ #define __SIMD32_TYPE int32_t
+ #define CMSIS_UNUSED
+
+#elif defined __TASKING__
+ #define __SIMD32_TYPE __unaligned int32_t
+ #define CMSIS_UNUSED
+
+#else
+ #error Unknown compiler
+#endif
+
+#define __SIMD32(addr) (*(__SIMD32_TYPE **) & (addr))
+#define __SIMD32_CONST(addr) ((__SIMD32_TYPE *)(addr))
+#define _SIMD32_OFFSET(addr) (*(__SIMD32_TYPE *) (addr))
+#define __SIMD64(addr) (*(int64_t **) & (addr))
+
+#if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY)
+ /**
+ * @brief definition to pack two 16 bit values.
+ */
+#define __PKHBT(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0x0000FFFF) | \
+ (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000) )
+#define __PKHTB(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0xFFFF0000) | \
+ (((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF) )
+
+#endif
+
+
+ /**
+ * @brief definition to pack four 8 bit values.
+ */
+#ifndef ARM_MATH_BIG_ENDIAN
+
+#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) << 0) & (int32_t)0x000000FF) | \
+ (((int32_t)(v1) << 8) & (int32_t)0x0000FF00) | \
+ (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \
+ (((int32_t)(v3) << 24) & (int32_t)0xFF000000) )
+#else
+
+#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) << 0) & (int32_t)0x000000FF) | \
+ (((int32_t)(v2) << 8) & (int32_t)0x0000FF00) | \
+ (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \
+ (((int32_t)(v0) << 24) & (int32_t)0xFF000000) )
+
+#endif
+
+
+ /**
+ * @brief Clips Q63 to Q31 values.
+ */
+ static __INLINE q31_t clip_q63_to_q31(
+ q63_t x)
+ {
+ return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
+ ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x;
+ }
+
+ /**
+ * @brief Clips Q63 to Q15 values.
+ */
+ static __INLINE q15_t clip_q63_to_q15(
+ q63_t x)
+ {
+ return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
+ ((0x7FFF ^ ((q15_t) (x >> 63)))) : (q15_t) (x >> 15);
+ }
+
+ /**
+ * @brief Clips Q31 to Q7 values.
+ */
+ static __INLINE q7_t clip_q31_to_q7(
+ q31_t x)
+ {
+ return ((q31_t) (x >> 24) != ((q31_t) x >> 23)) ?
+ ((0x7F ^ ((q7_t) (x >> 31)))) : (q7_t) x;
+ }
+
+ /**
+ * @brief Clips Q31 to Q15 values.
+ */
+ static __INLINE q15_t clip_q31_to_q15(
+ q31_t x)
+ {
+ return ((q31_t) (x >> 16) != ((q31_t) x >> 15)) ?
+ ((0x7FFF ^ ((q15_t) (x >> 31)))) : (q15_t) x;
+ }
+
+ /**
+ * @brief Multiplies 32 X 64 and returns 32 bit result in 2.30 format.
+ */
+
+ static __INLINE q63_t mult32x64(
+ q63_t x,
+ q31_t y)
+ {
+ return ((((q63_t) (x & 0x00000000FFFFFFFF) * y) >> 32) +
+ (((q63_t) (x >> 32) * y)));
+ }
+
+/*
+ #if defined (ARM_MATH_CM0_FAMILY) && defined ( __CC_ARM )
+ #define __CLZ __clz
+ #endif
+ */
+/* note: function can be removed when all toolchain support __CLZ for Cortex-M0 */
+#if defined (ARM_MATH_CM0_FAMILY) && ((defined (__ICCARM__)) )
+ static __INLINE uint32_t __CLZ(
+ q31_t data);
+
+ static __INLINE uint32_t __CLZ(
+ q31_t data)
+ {
+ uint32_t count = 0;
+ uint32_t mask = 0x80000000;
+
+ while ((data & mask) == 0)
+ {
+ count += 1u;
+ mask = mask >> 1u;
+ }
+
+ return (count);
+ }
+#endif
+
+ /**
+ * @brief Function to Calculates 1/in (reciprocal) value of Q31 Data type.
+ */
+
+ static __INLINE uint32_t arm_recip_q31(
+ q31_t in,
+ q31_t * dst,
+ q31_t * pRecipTable)
+ {
+ q31_t out;
+ uint32_t tempVal;
+ uint32_t index, i;
+ uint32_t signBits;
+
+ if (in > 0)
+ {
+ signBits = ((uint32_t) (__CLZ( in) - 1));
+ }
+ else
+ {
+ signBits = ((uint32_t) (__CLZ(-in) - 1));
+ }
+
+ /* Convert input sample to 1.31 format */
+ in = (in << signBits);
+
+ /* calculation of index for initial approximated Val */
+ index = (uint32_t)(in >> 24);
+ index = (index & INDEX_MASK);
+
+ /* 1.31 with exp 1 */
+ out = pRecipTable[index];
+
+ /* calculation of reciprocal value */
+ /* running approximation for two iterations */
+ for (i = 0u; i < 2u; i++)
+ {
+ tempVal = (uint32_t) (((q63_t) in * out) >> 31);
+ tempVal = 0x7FFFFFFFu - tempVal;
+ /* 1.31 with exp 1 */
+ /* out = (q31_t) (((q63_t) out * tempVal) >> 30); */
+ out = clip_q63_to_q31(((q63_t) out * tempVal) >> 30);
+ }
+
+ /* write output */
+ *dst = out;
+
+ /* return num of signbits of out = 1/in value */
+ return (signBits + 1u);
+ }
+
+
+ /**
+ * @brief Function to Calculates 1/in (reciprocal) value of Q15 Data type.
+ */
+ static __INLINE uint32_t arm_recip_q15(
+ q15_t in,
+ q15_t * dst,
+ q15_t * pRecipTable)
+ {
+ q15_t out = 0;
+ uint32_t tempVal = 0;
+ uint32_t index = 0, i = 0;
+ uint32_t signBits = 0;
+
+ if (in > 0)
+ {
+ signBits = ((uint32_t)(__CLZ( in) - 17));
+ }
+ else
+ {
+ signBits = ((uint32_t)(__CLZ(-in) - 17));
+ }
+
+ /* Convert input sample to 1.15 format */
+ in = (in << signBits);
+
+ /* calculation of index for initial approximated Val */
+ index = (uint32_t)(in >> 8);
+ index = (index & INDEX_MASK);
+
+ /* 1.15 with exp 1 */
+ out = pRecipTable[index];
+
+ /* calculation of reciprocal value */
+ /* running approximation for two iterations */
+ for (i = 0u; i < 2u; i++)
+ {
+ tempVal = (uint32_t) (((q31_t) in * out) >> 15);
+ tempVal = 0x7FFFu - tempVal;
+ /* 1.15 with exp 1 */
+ out = (q15_t) (((q31_t) out * tempVal) >> 14);
+ /* out = clip_q31_to_q15(((q31_t) out * tempVal) >> 14); */
+ }
+
+ /* write output */
+ *dst = out;
+
+ /* return num of signbits of out = 1/in value */
+ return (signBits + 1);
+ }
+
+
+ /*
+ * @brief C custom defined intrinisic function for only M0 processors
+ */
+#if defined(ARM_MATH_CM0_FAMILY)
+ static __INLINE q31_t __SSAT(
+ q31_t x,
+ uint32_t y)
+ {
+ int32_t posMax, negMin;
+ uint32_t i;
+
+ posMax = 1;
+ for (i = 0; i < (y - 1); i++)
+ {
+ posMax = posMax * 2;
+ }
+
+ if (x > 0)
+ {
+ posMax = (posMax - 1);
+
+ if (x > posMax)
+ {
+ x = posMax;
+ }
+ }
+ else
+ {
+ negMin = -posMax;
+
+ if (x < negMin)
+ {
+ x = negMin;
+ }
+ }
+ return (x);
+ }
+#endif /* end of ARM_MATH_CM0_FAMILY */
+
+
+ /*
+ * @brief C custom defined intrinsic function for M3 and M0 processors
+ */
+#if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY)
+
+ /*
+ * @brief C custom defined QADD8 for M3 and M0 processors
+ */
+ static __INLINE uint32_t __QADD8(
+ uint32_t x,
+ uint32_t y)
+ {
+ q31_t r, s, t, u;
+
+ r = __SSAT(((((q31_t)x << 24) >> 24) + (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF;
+ s = __SSAT(((((q31_t)x << 16) >> 24) + (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF;
+ t = __SSAT(((((q31_t)x << 8) >> 24) + (((q31_t)y << 8) >> 24)), 8) & (int32_t)0x000000FF;
+ u = __SSAT(((((q31_t)x ) >> 24) + (((q31_t)y ) >> 24)), 8) & (int32_t)0x000000FF;
+
+ return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r )));
+ }
+
+
+ /*
+ * @brief C custom defined QSUB8 for M3 and M0 processors
+ */
+ static __INLINE uint32_t __QSUB8(
+ uint32_t x,
+ uint32_t y)
+ {
+ q31_t r, s, t, u;
+
+ r = __SSAT(((((q31_t)x << 24) >> 24) - (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF;
+ s = __SSAT(((((q31_t)x << 16) >> 24) - (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF;
+ t = __SSAT(((((q31_t)x << 8) >> 24) - (((q31_t)y << 8) >> 24)), 8) & (int32_t)0x000000FF;
+ u = __SSAT(((((q31_t)x ) >> 24) - (((q31_t)y ) >> 24)), 8) & (int32_t)0x000000FF;
+
+ return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r )));
+ }
+
+
+ /*
+ * @brief C custom defined QADD16 for M3 and M0 processors
+ */
+ static __INLINE uint32_t __QADD16(
+ uint32_t x,
+ uint32_t y)
+ {
+/* q31_t r, s; without initialisation 'arm_offset_q15 test' fails but 'intrinsic' tests pass! for armCC */
+ q31_t r = 0, s = 0;
+
+ r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
+ s = __SSAT(((((q31_t)x ) >> 16) + (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF;
+
+ return ((uint32_t)((s << 16) | (r )));
+ }
+
+
+ /*
+ * @brief C custom defined SHADD16 for M3 and M0 processors
+ */
+ static __INLINE uint32_t __SHADD16(
+ uint32_t x,
+ uint32_t y)
+ {
+ q31_t r, s;
+
+ r = (((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+ s = (((((q31_t)x ) >> 16) + (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+
+ return ((uint32_t)((s << 16) | (r )));
+ }
+
+
+ /*
+ * @brief C custom defined QSUB16 for M3 and M0 processors
+ */
+ static __INLINE uint32_t __QSUB16(
+ uint32_t x,
+ uint32_t y)
+ {
+ q31_t r, s;
+
+ r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
+ s = __SSAT(((((q31_t)x ) >> 16) - (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF;
+
+ return ((uint32_t)((s << 16) | (r )));
+ }
+
+
+ /*
+ * @brief C custom defined SHSUB16 for M3 and M0 processors
+ */
+ static __INLINE uint32_t __SHSUB16(
+ uint32_t x,
+ uint32_t y)
+ {
+ q31_t r, s;
+
+ r = (((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+ s = (((((q31_t)x ) >> 16) - (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+
+ return ((uint32_t)((s << 16) | (r )));
+ }
+
+
+ /*
+ * @brief C custom defined QASX for M3 and M0 processors
+ */
+ static __INLINE uint32_t __QASX(
+ uint32_t x,
+ uint32_t y)
+ {
+ q31_t r, s;
+
+ r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF;
+ s = __SSAT(((((q31_t)x ) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
+
+ return ((uint32_t)((s << 16) | (r )));
+ }
+
+
+ /*
+ * @brief C custom defined SHASX for M3 and M0 processors
+ */
+ static __INLINE uint32_t __SHASX(
+ uint32_t x,
+ uint32_t y)
+ {
+ q31_t r, s;
+
+ r = (((((q31_t)x << 16) >> 16) - (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+ s = (((((q31_t)x ) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+
+ return ((uint32_t)((s << 16) | (r )));
+ }
+
+
+ /*
+ * @brief C custom defined QSAX for M3 and M0 processors
+ */
+ static __INLINE uint32_t __QSAX(
+ uint32_t x,
+ uint32_t y)
+ {
+ q31_t r, s;
+
+ r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF;
+ s = __SSAT(((((q31_t)x ) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
+
+ return ((uint32_t)((s << 16) | (r )));
+ }
+
+
+ /*
+ * @brief C custom defined SHSAX for M3 and M0 processors
+ */
+ static __INLINE uint32_t __SHSAX(
+ uint32_t x,
+ uint32_t y)
+ {
+ q31_t r, s;
+
+ r = (((((q31_t)x << 16) >> 16) + (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+ s = (((((q31_t)x ) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+
+ return ((uint32_t)((s << 16) | (r )));
+ }
+
+
+ /*
+ * @brief C custom defined SMUSDX for M3 and M0 processors
+ */
+ static __INLINE uint32_t __SMUSDX(
+ uint32_t x,
+ uint32_t y)
+ {
+ return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) -
+ ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) ));
+ }
+
+ /*
+ * @brief C custom defined SMUADX for M3 and M0 processors
+ */
+ static __INLINE uint32_t __SMUADX(
+ uint32_t x,
+ uint32_t y)
+ {
+ return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) +
+ ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) ));
+ }
+
+
+ /*
+ * @brief C custom defined QADD for M3 and M0 processors
+ */
+ static __INLINE int32_t __QADD(
+ int32_t x,
+ int32_t y)
+ {
+ return ((int32_t)(clip_q63_to_q31((q63_t)x + (q31_t)y)));
+ }
+
+
+ /*
+ * @brief C custom defined QSUB for M3 and M0 processors
+ */
+ static __INLINE int32_t __QSUB(
+ int32_t x,
+ int32_t y)
+ {
+ return ((int32_t)(clip_q63_to_q31((q63_t)x - (q31_t)y)));
+ }
+
+
+ /*
+ * @brief C custom defined SMLAD for M3 and M0 processors
+ */
+ static __INLINE uint32_t __SMLAD(
+ uint32_t x,
+ uint32_t y,
+ uint32_t sum)
+ {
+ return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
+ ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) +
+ ( ((q31_t)sum ) ) ));
+ }
+
+
+ /*
+ * @brief C custom defined SMLADX for M3 and M0 processors
+ */
+ static __INLINE uint32_t __SMLADX(
+ uint32_t x,
+ uint32_t y,
+ uint32_t sum)
+ {
+ return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) +
+ ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) +
+ ( ((q31_t)sum ) ) ));
+ }
+
+
+ /*
+ * @brief C custom defined SMLSDX for M3 and M0 processors
+ */
+ static __INLINE uint32_t __SMLSDX(
+ uint32_t x,
+ uint32_t y,
+ uint32_t sum)
+ {
+ return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) -
+ ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) +
+ ( ((q31_t)sum ) ) ));
+ }
+
+
+ /*
+ * @brief C custom defined SMLALD for M3 and M0 processors
+ */
+ static __INLINE uint64_t __SMLALD(
+ uint32_t x,
+ uint32_t y,
+ uint64_t sum)
+ {
+/* return (sum + ((q15_t) (x >> 16) * (q15_t) (y >> 16)) + ((q15_t) x * (q15_t) y)); */
+ return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
+ ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) +
+ ( ((q63_t)sum ) ) ));
+ }
+
+
+ /*
+ * @brief C custom defined SMLALDX for M3 and M0 processors
+ */
+ static __INLINE uint64_t __SMLALDX(
+ uint32_t x,
+ uint32_t y,
+ uint64_t sum)
+ {
+/* return (sum + ((q15_t) (x >> 16) * (q15_t) y)) + ((q15_t) x * (q15_t) (y >> 16)); */
+ return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) +
+ ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) +
+ ( ((q63_t)sum ) ) ));
+ }
+
+
+ /*
+ * @brief C custom defined SMUAD for M3 and M0 processors
+ */
+ static __INLINE uint32_t __SMUAD(
+ uint32_t x,
+ uint32_t y)
+ {
+ return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
+ ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) ));
+ }
+
+
+ /*
+ * @brief C custom defined SMUSD for M3 and M0 processors
+ */
+ static __INLINE uint32_t __SMUSD(
+ uint32_t x,
+ uint32_t y)
+ {
+ return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) -
+ ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) ));
+ }
+
+
+ /*
+ * @brief C custom defined SXTB16 for M3 and M0 processors
+ */
+ static __INLINE uint32_t __SXTB16(
+ uint32_t x)
+ {
+ return ((uint32_t)(((((q31_t)x << 24) >> 24) & (q31_t)0x0000FFFF) |
+ ((((q31_t)x << 8) >> 8) & (q31_t)0xFFFF0000) ));
+ }
+
+#endif /* defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY) */
+
+
+ /**
+ * @brief Instance structure for the Q7 FIR filter.
+ */
+ typedef struct
+ {
+ uint16_t numTaps; /**< number of filter coefficients in the filter. */
+ q7_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */
+ q7_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
+ } arm_fir_instance_q7;
+
+ /**
+ * @brief Instance structure for the Q15 FIR filter.
+ */
+ typedef struct
+ {
+ uint16_t numTaps; /**< number of filter coefficients in the filter. */
+ q15_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */
+ q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
+ } arm_fir_instance_q15;
+
+ /**
+ * @brief Instance structure for the Q31 FIR filter.
+ */
+ typedef struct
+ {
+ uint16_t numTaps; /**< number of filter coefficients in the filter. */
+ q31_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */
+ q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
+ } arm_fir_instance_q31;
+
+ /**
+ * @brief Instance structure for the floating-point FIR filter.
+ */
+ typedef struct
+ {
+ uint16_t numTaps; /**< number of filter coefficients in the filter. */
+ float32_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */
+ float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
+ } arm_fir_instance_f32;
+
+
+ /**
+ * @brief Processing function for the Q7 FIR filter.
+ * @param[in] S points to an instance of the Q7 FIR filter structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_fir_q7(
+ const arm_fir_instance_q7 * S,
+ q7_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the Q7 FIR filter.
+ * @param[in,out] S points to an instance of the Q7 FIR structure.
+ * @param[in] numTaps Number of filter coefficients in the filter.
+ * @param[in] pCoeffs points to the filter coefficients.
+ * @param[in] pState points to the state buffer.
+ * @param[in] blockSize number of samples that are processed.
+ */
+ void arm_fir_init_q7(
+ arm_fir_instance_q7 * S,
+ uint16_t numTaps,
+ q7_t * pCoeffs,
+ q7_t * pState,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Processing function for the Q15 FIR filter.
+ * @param[in] S points to an instance of the Q15 FIR structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_fir_q15(
+ const arm_fir_instance_q15 * S,
+ q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4.
+ * @param[in] S points to an instance of the Q15 FIR filter structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_fir_fast_q15(
+ const arm_fir_instance_q15 * S,
+ q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the Q15 FIR filter.
+ * @param[in,out] S points to an instance of the Q15 FIR filter structure.
+ * @param[in] numTaps Number of filter coefficients in the filter. Must be even and greater than or equal to 4.
+ * @param[in] pCoeffs points to the filter coefficients.
+ * @param[in] pState points to the state buffer.
+ * @param[in] blockSize number of samples that are processed at a time.
+ * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_ARGUMENT_ERROR if
+ * <code>numTaps</code> is not a supported value.
+ */
+ arm_status arm_fir_init_q15(
+ arm_fir_instance_q15 * S,
+ uint16_t numTaps,
+ q15_t * pCoeffs,
+ q15_t * pState,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Processing function for the Q31 FIR filter.
+ * @param[in] S points to an instance of the Q31 FIR filter structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_fir_q31(
+ const arm_fir_instance_q31 * S,
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Processing function for the fast Q31 FIR filter for Cortex-M3 and Cortex-M4.
+ * @param[in] S points to an instance of the Q31 FIR structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_fir_fast_q31(
+ const arm_fir_instance_q31 * S,
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the Q31 FIR filter.
+ * @param[in,out] S points to an instance of the Q31 FIR structure.
+ * @param[in] numTaps Number of filter coefficients in the filter.
+ * @param[in] pCoeffs points to the filter coefficients.
+ * @param[in] pState points to the state buffer.
+ * @param[in] blockSize number of samples that are processed at a time.
+ */
+ void arm_fir_init_q31(
+ arm_fir_instance_q31 * S,
+ uint16_t numTaps,
+ q31_t * pCoeffs,
+ q31_t * pState,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Processing function for the floating-point FIR filter.
+ * @param[in] S points to an instance of the floating-point FIR structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_fir_f32(
+ const arm_fir_instance_f32 * S,
+ float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the floating-point FIR filter.
+ * @param[in,out] S points to an instance of the floating-point FIR filter structure.
+ * @param[in] numTaps Number of filter coefficients in the filter.
+ * @param[in] pCoeffs points to the filter coefficients.
+ * @param[in] pState points to the state buffer.
+ * @param[in] blockSize number of samples that are processed at a time.
+ */
+ void arm_fir_init_f32(
+ arm_fir_instance_f32 * S,
+ uint16_t numTaps,
+ float32_t * pCoeffs,
+ float32_t * pState,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Instance structure for the Q15 Biquad cascade filter.
+ */
+ typedef struct
+ {
+ int8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
+ q15_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */
+ q15_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */
+ int8_t postShift; /**< Additional shift, in bits, applied to each output sample. */
+ } arm_biquad_casd_df1_inst_q15;
+
+ /**
+ * @brief Instance structure for the Q31 Biquad cascade filter.
+ */
+ typedef struct
+ {
+ uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
+ q31_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */
+ q31_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */
+ uint8_t postShift; /**< Additional shift, in bits, applied to each output sample. */
+ } arm_biquad_casd_df1_inst_q31;
+
+ /**
+ * @brief Instance structure for the floating-point Biquad cascade filter.
+ */
+ typedef struct
+ {
+ uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
+ float32_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */
+ float32_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */
+ } arm_biquad_casd_df1_inst_f32;
+
+
+ /**
+ * @brief Processing function for the Q15 Biquad cascade filter.
+ * @param[in] S points to an instance of the Q15 Biquad cascade structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_biquad_cascade_df1_q15(
+ const arm_biquad_casd_df1_inst_q15 * S,
+ q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the Q15 Biquad cascade filter.
+ * @param[in,out] S points to an instance of the Q15 Biquad cascade structure.
+ * @param[in] numStages number of 2nd order stages in the filter.
+ * @param[in] pCoeffs points to the filter coefficients.
+ * @param[in] pState points to the state buffer.
+ * @param[in] postShift Shift to be applied to the output. Varies according to the coefficients format
+ */
+ void arm_biquad_cascade_df1_init_q15(
+ arm_biquad_casd_df1_inst_q15 * S,
+ uint8_t numStages,
+ q15_t * pCoeffs,
+ q15_t * pState,
+ int8_t postShift);
+
+
+ /**
+ * @brief Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.
+ * @param[in] S points to an instance of the Q15 Biquad cascade structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_biquad_cascade_df1_fast_q15(
+ const arm_biquad_casd_df1_inst_q15 * S,
+ q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Processing function for the Q31 Biquad cascade filter
+ * @param[in] S points to an instance of the Q31 Biquad cascade structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_biquad_cascade_df1_q31(
+ const arm_biquad_casd_df1_inst_q31 * S,
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.
+ * @param[in] S points to an instance of the Q31 Biquad cascade structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_biquad_cascade_df1_fast_q31(
+ const arm_biquad_casd_df1_inst_q31 * S,
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the Q31 Biquad cascade filter.
+ * @param[in,out] S points to an instance of the Q31 Biquad cascade structure.
+ * @param[in] numStages number of 2nd order stages in the filter.
+ * @param[in] pCoeffs points to the filter coefficients.
+ * @param[in] pState points to the state buffer.
+ * @param[in] postShift Shift to be applied to the output. Varies according to the coefficients format
+ */
+ void arm_biquad_cascade_df1_init_q31(
+ arm_biquad_casd_df1_inst_q31 * S,
+ uint8_t numStages,
+ q31_t * pCoeffs,
+ q31_t * pState,
+ int8_t postShift);
+
+
+ /**
+ * @brief Processing function for the floating-point Biquad cascade filter.
+ * @param[in] S points to an instance of the floating-point Biquad cascade structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_biquad_cascade_df1_f32(
+ const arm_biquad_casd_df1_inst_f32 * S,
+ float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the floating-point Biquad cascade filter.
+ * @param[in,out] S points to an instance of the floating-point Biquad cascade structure.
+ * @param[in] numStages number of 2nd order stages in the filter.
+ * @param[in] pCoeffs points to the filter coefficients.
+ * @param[in] pState points to the state buffer.
+ */
+ void arm_biquad_cascade_df1_init_f32(
+ arm_biquad_casd_df1_inst_f32 * S,
+ uint8_t numStages,
+ float32_t * pCoeffs,
+ float32_t * pState);
+
+
+ /**
+ * @brief Instance structure for the floating-point matrix structure.
+ */
+ typedef struct
+ {
+ uint16_t numRows; /**< number of rows of the matrix. */
+ uint16_t numCols; /**< number of columns of the matrix. */
+ float32_t *pData; /**< points to the data of the matrix. */
+ } arm_matrix_instance_f32;
+
+
+ /**
+ * @brief Instance structure for the floating-point matrix structure.
+ */
+ typedef struct
+ {
+ uint16_t numRows; /**< number of rows of the matrix. */
+ uint16_t numCols; /**< number of columns of the matrix. */
+ float64_t *pData; /**< points to the data of the matrix. */
+ } arm_matrix_instance_f64;
+
+ /**
+ * @brief Instance structure for the Q15 matrix structure.
+ */
+ typedef struct
+ {
+ uint16_t numRows; /**< number of rows of the matrix. */
+ uint16_t numCols; /**< number of columns of the matrix. */
+ q15_t *pData; /**< points to the data of the matrix. */
+ } arm_matrix_instance_q15;
+
+ /**
+ * @brief Instance structure for the Q31 matrix structure.
+ */
+ typedef struct
+ {
+ uint16_t numRows; /**< number of rows of the matrix. */
+ uint16_t numCols; /**< number of columns of the matrix. */
+ q31_t *pData; /**< points to the data of the matrix. */
+ } arm_matrix_instance_q31;
+
+
+ /**
+ * @brief Floating-point matrix addition.
+ * @param[in] pSrcA points to the first input matrix structure
+ * @param[in] pSrcB points to the second input matrix structure
+ * @param[out] pDst points to output matrix structure
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ */
+ arm_status arm_mat_add_f32(
+ const arm_matrix_instance_f32 * pSrcA,
+ const arm_matrix_instance_f32 * pSrcB,
+ arm_matrix_instance_f32 * pDst);
+
+
+ /**
+ * @brief Q15 matrix addition.
+ * @param[in] pSrcA points to the first input matrix structure
+ * @param[in] pSrcB points to the second input matrix structure
+ * @param[out] pDst points to output matrix structure
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ */
+ arm_status arm_mat_add_q15(
+ const arm_matrix_instance_q15 * pSrcA,
+ const arm_matrix_instance_q15 * pSrcB,
+ arm_matrix_instance_q15 * pDst);
+
+
+ /**
+ * @brief Q31 matrix addition.
+ * @param[in] pSrcA points to the first input matrix structure
+ * @param[in] pSrcB points to the second input matrix structure
+ * @param[out] pDst points to output matrix structure
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ */
+ arm_status arm_mat_add_q31(
+ const arm_matrix_instance_q31 * pSrcA,
+ const arm_matrix_instance_q31 * pSrcB,
+ arm_matrix_instance_q31 * pDst);
+
+
+ /**
+ * @brief Floating-point, complex, matrix multiplication.
+ * @param[in] pSrcA points to the first input matrix structure
+ * @param[in] pSrcB points to the second input matrix structure
+ * @param[out] pDst points to output matrix structure
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ */
+ arm_status arm_mat_cmplx_mult_f32(
+ const arm_matrix_instance_f32 * pSrcA,
+ const arm_matrix_instance_f32 * pSrcB,
+ arm_matrix_instance_f32 * pDst);
+
+
+ /**
+ * @brief Q15, complex, matrix multiplication.
+ * @param[in] pSrcA points to the first input matrix structure
+ * @param[in] pSrcB points to the second input matrix structure
+ * @param[out] pDst points to output matrix structure
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ */
+ arm_status arm_mat_cmplx_mult_q15(
+ const arm_matrix_instance_q15 * pSrcA,
+ const arm_matrix_instance_q15 * pSrcB,
+ arm_matrix_instance_q15 * pDst,
+ q15_t * pScratch);
+
+
+ /**
+ * @brief Q31, complex, matrix multiplication.
+ * @param[in] pSrcA points to the first input matrix structure
+ * @param[in] pSrcB points to the second input matrix structure
+ * @param[out] pDst points to output matrix structure
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ */
+ arm_status arm_mat_cmplx_mult_q31(
+ const arm_matrix_instance_q31 * pSrcA,
+ const arm_matrix_instance_q31 * pSrcB,
+ arm_matrix_instance_q31 * pDst);
+
+
+ /**
+ * @brief Floating-point matrix transpose.
+ * @param[in] pSrc points to the input matrix
+ * @param[out] pDst points to the output matrix
+ * @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
+ * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ */
+ arm_status arm_mat_trans_f32(
+ const arm_matrix_instance_f32 * pSrc,
+ arm_matrix_instance_f32 * pDst);
+
+
+ /**
+ * @brief Q15 matrix transpose.
+ * @param[in] pSrc points to the input matrix
+ * @param[out] pDst points to the output matrix
+ * @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
+ * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ */
+ arm_status arm_mat_trans_q15(
+ const arm_matrix_instance_q15 * pSrc,
+ arm_matrix_instance_q15 * pDst);
+
+
+ /**
+ * @brief Q31 matrix transpose.
+ * @param[in] pSrc points to the input matrix
+ * @param[out] pDst points to the output matrix
+ * @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
+ * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ */
+ arm_status arm_mat_trans_q31(
+ const arm_matrix_instance_q31 * pSrc,
+ arm_matrix_instance_q31 * pDst);
+
+
+ /**
+ * @brief Floating-point matrix multiplication
+ * @param[in] pSrcA points to the first input matrix structure
+ * @param[in] pSrcB points to the second input matrix structure
+ * @param[out] pDst points to output matrix structure
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ */
+ arm_status arm_mat_mult_f32(
+ const arm_matrix_instance_f32 * pSrcA,
+ const arm_matrix_instance_f32 * pSrcB,
+ arm_matrix_instance_f32 * pDst);
+
+
+ /**
+ * @brief Q15 matrix multiplication
+ * @param[in] pSrcA points to the first input matrix structure
+ * @param[in] pSrcB points to the second input matrix structure
+ * @param[out] pDst points to output matrix structure
+ * @param[in] pState points to the array for storing intermediate results
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ */
+ arm_status arm_mat_mult_q15(
+ const arm_matrix_instance_q15 * pSrcA,
+ const arm_matrix_instance_q15 * pSrcB,
+ arm_matrix_instance_q15 * pDst,
+ q15_t * pState);
+
+
+ /**
+ * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
+ * @param[in] pSrcA points to the first input matrix structure
+ * @param[in] pSrcB points to the second input matrix structure
+ * @param[out] pDst points to output matrix structure
+ * @param[in] pState points to the array for storing intermediate results
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ */
+ arm_status arm_mat_mult_fast_q15(
+ const arm_matrix_instance_q15 * pSrcA,
+ const arm_matrix_instance_q15 * pSrcB,
+ arm_matrix_instance_q15 * pDst,
+ q15_t * pState);
+
+
+ /**
+ * @brief Q31 matrix multiplication
+ * @param[in] pSrcA points to the first input matrix structure
+ * @param[in] pSrcB points to the second input matrix structure
+ * @param[out] pDst points to output matrix structure
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ */
+ arm_status arm_mat_mult_q31(
+ const arm_matrix_instance_q31 * pSrcA,
+ const arm_matrix_instance_q31 * pSrcB,
+ arm_matrix_instance_q31 * pDst);
+
+
+ /**
+ * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
+ * @param[in] pSrcA points to the first input matrix structure
+ * @param[in] pSrcB points to the second input matrix structure
+ * @param[out] pDst points to output matrix structure
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ */
+ arm_status arm_mat_mult_fast_q31(
+ const arm_matrix_instance_q31 * pSrcA,
+ const arm_matrix_instance_q31 * pSrcB,
+ arm_matrix_instance_q31 * pDst);
+
+
+ /**
+ * @brief Floating-point matrix subtraction
+ * @param[in] pSrcA points to the first input matrix structure
+ * @param[in] pSrcB points to the second input matrix structure
+ * @param[out] pDst points to output matrix structure
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ */
+ arm_status arm_mat_sub_f32(
+ const arm_matrix_instance_f32 * pSrcA,
+ const arm_matrix_instance_f32 * pSrcB,
+ arm_matrix_instance_f32 * pDst);
+
+
+ /**
+ * @brief Q15 matrix subtraction
+ * @param[in] pSrcA points to the first input matrix structure
+ * @param[in] pSrcB points to the second input matrix structure
+ * @param[out] pDst points to output matrix structure
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ */
+ arm_status arm_mat_sub_q15(
+ const arm_matrix_instance_q15 * pSrcA,
+ const arm_matrix_instance_q15 * pSrcB,
+ arm_matrix_instance_q15 * pDst);
+
+
+ /**
+ * @brief Q31 matrix subtraction
+ * @param[in] pSrcA points to the first input matrix structure
+ * @param[in] pSrcB points to the second input matrix structure
+ * @param[out] pDst points to output matrix structure
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ */
+ arm_status arm_mat_sub_q31(
+ const arm_matrix_instance_q31 * pSrcA,
+ const arm_matrix_instance_q31 * pSrcB,
+ arm_matrix_instance_q31 * pDst);
+
+
+ /**
+ * @brief Floating-point matrix scaling.
+ * @param[in] pSrc points to the input matrix
+ * @param[in] scale scale factor
+ * @param[out] pDst points to the output matrix
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ */
+ arm_status arm_mat_scale_f32(
+ const arm_matrix_instance_f32 * pSrc,
+ float32_t scale,
+ arm_matrix_instance_f32 * pDst);
+
+
+ /**
+ * @brief Q15 matrix scaling.
+ * @param[in] pSrc points to input matrix
+ * @param[in] scaleFract fractional portion of the scale factor
+ * @param[in] shift number of bits to shift the result by
+ * @param[out] pDst points to output matrix
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ */
+ arm_status arm_mat_scale_q15(
+ const arm_matrix_instance_q15 * pSrc,
+ q15_t scaleFract,
+ int32_t shift,
+ arm_matrix_instance_q15 * pDst);
+
+
+ /**
+ * @brief Q31 matrix scaling.
+ * @param[in] pSrc points to input matrix
+ * @param[in] scaleFract fractional portion of the scale factor
+ * @param[in] shift number of bits to shift the result by
+ * @param[out] pDst points to output matrix structure
+ * @return The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ */
+ arm_status arm_mat_scale_q31(
+ const arm_matrix_instance_q31 * pSrc,
+ q31_t scaleFract,
+ int32_t shift,
+ arm_matrix_instance_q31 * pDst);
+
+
+ /**
+ * @brief Q31 matrix initialization.
+ * @param[in,out] S points to an instance of the floating-point matrix structure.
+ * @param[in] nRows number of rows in the matrix.
+ * @param[in] nColumns number of columns in the matrix.
+ * @param[in] pData points to the matrix data array.
+ */
+ void arm_mat_init_q31(
+ arm_matrix_instance_q31 * S,
+ uint16_t nRows,
+ uint16_t nColumns,
+ q31_t * pData);
+
+
+ /**
+ * @brief Q15 matrix initialization.
+ * @param[in,out] S points to an instance of the floating-point matrix structure.
+ * @param[in] nRows number of rows in the matrix.
+ * @param[in] nColumns number of columns in the matrix.
+ * @param[in] pData points to the matrix data array.
+ */
+ void arm_mat_init_q15(
+ arm_matrix_instance_q15 * S,
+ uint16_t nRows,
+ uint16_t nColumns,
+ q15_t * pData);
+
+
+ /**
+ * @brief Floating-point matrix initialization.
+ * @param[in,out] S points to an instance of the floating-point matrix structure.
+ * @param[in] nRows number of rows in the matrix.
+ * @param[in] nColumns number of columns in the matrix.
+ * @param[in] pData points to the matrix data array.
+ */
+ void arm_mat_init_f32(
+ arm_matrix_instance_f32 * S,
+ uint16_t nRows,
+ uint16_t nColumns,
+ float32_t * pData);
+
+
+
+ /**
+ * @brief Instance structure for the Q15 PID Control.
+ */
+ typedef struct
+ {
+ q15_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */
+#ifdef ARM_MATH_CM0_FAMILY
+ q15_t A1;
+ q15_t A2;
+#else
+ q31_t A1; /**< The derived gain A1 = -Kp - 2Kd | Kd.*/
+#endif
+ q15_t state[3]; /**< The state array of length 3. */
+ q15_t Kp; /**< The proportional gain. */
+ q15_t Ki; /**< The integral gain. */
+ q15_t Kd; /**< The derivative gain. */
+ } arm_pid_instance_q15;
+
+ /**
+ * @brief Instance structure for the Q31 PID Control.
+ */
+ typedef struct
+ {
+ q31_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */
+ q31_t A1; /**< The derived gain, A1 = -Kp - 2Kd. */
+ q31_t A2; /**< The derived gain, A2 = Kd . */
+ q31_t state[3]; /**< The state array of length 3. */
+ q31_t Kp; /**< The proportional gain. */
+ q31_t Ki; /**< The integral gain. */
+ q31_t Kd; /**< The derivative gain. */
+ } arm_pid_instance_q31;
+
+ /**
+ * @brief Instance structure for the floating-point PID Control.
+ */
+ typedef struct
+ {
+ float32_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */
+ float32_t A1; /**< The derived gain, A1 = -Kp - 2Kd. */
+ float32_t A2; /**< The derived gain, A2 = Kd . */
+ float32_t state[3]; /**< The state array of length 3. */
+ float32_t Kp; /**< The proportional gain. */
+ float32_t Ki; /**< The integral gain. */
+ float32_t Kd; /**< The derivative gain. */
+ } arm_pid_instance_f32;
+
+
+
+ /**
+ * @brief Initialization function for the floating-point PID Control.
+ * @param[in,out] S points to an instance of the PID structure.
+ * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
+ */
+ void arm_pid_init_f32(
+ arm_pid_instance_f32 * S,
+ int32_t resetStateFlag);
+
+
+ /**
+ * @brief Reset function for the floating-point PID Control.
+ * @param[in,out] S is an instance of the floating-point PID Control structure
+ */
+ void arm_pid_reset_f32(
+ arm_pid_instance_f32 * S);
+
+
+ /**
+ * @brief Initialization function for the Q31 PID Control.
+ * @param[in,out] S points to an instance of the Q15 PID structure.
+ * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
+ */
+ void arm_pid_init_q31(
+ arm_pid_instance_q31 * S,
+ int32_t resetStateFlag);
+
+
+ /**
+ * @brief Reset function for the Q31 PID Control.
+ * @param[in,out] S points to an instance of the Q31 PID Control structure
+ */
+
+ void arm_pid_reset_q31(
+ arm_pid_instance_q31 * S);
+
+
+ /**
+ * @brief Initialization function for the Q15 PID Control.
+ * @param[in,out] S points to an instance of the Q15 PID structure.
+ * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
+ */
+ void arm_pid_init_q15(
+ arm_pid_instance_q15 * S,
+ int32_t resetStateFlag);
+
+
+ /**
+ * @brief Reset function for the Q15 PID Control.
+ * @param[in,out] S points to an instance of the q15 PID Control structure
+ */
+ void arm_pid_reset_q15(
+ arm_pid_instance_q15 * S);
+
+
+ /**
+ * @brief Instance structure for the floating-point Linear Interpolate function.
+ */
+ typedef struct
+ {
+ uint32_t nValues; /**< nValues */
+ float32_t x1; /**< x1 */
+ float32_t xSpacing; /**< xSpacing */
+ float32_t *pYData; /**< pointer to the table of Y values */
+ } arm_linear_interp_instance_f32;
+
+ /**
+ * @brief Instance structure for the floating-point bilinear interpolation function.
+ */
+ typedef struct
+ {
+ uint16_t numRows; /**< number of rows in the data table. */
+ uint16_t numCols; /**< number of columns in the data table. */
+ float32_t *pData; /**< points to the data table. */
+ } arm_bilinear_interp_instance_f32;
+
+ /**
+ * @brief Instance structure for the Q31 bilinear interpolation function.
+ */
+ typedef struct
+ {
+ uint16_t numRows; /**< number of rows in the data table. */
+ uint16_t numCols; /**< number of columns in the data table. */
+ q31_t *pData; /**< points to the data table. */
+ } arm_bilinear_interp_instance_q31;
+
+ /**
+ * @brief Instance structure for the Q15 bilinear interpolation function.
+ */
+ typedef struct
+ {
+ uint16_t numRows; /**< number of rows in the data table. */
+ uint16_t numCols; /**< number of columns in the data table. */
+ q15_t *pData; /**< points to the data table. */
+ } arm_bilinear_interp_instance_q15;
+
+ /**
+ * @brief Instance structure for the Q15 bilinear interpolation function.
+ */
+ typedef struct
+ {
+ uint16_t numRows; /**< number of rows in the data table. */
+ uint16_t numCols; /**< number of columns in the data table. */
+ q7_t *pData; /**< points to the data table. */
+ } arm_bilinear_interp_instance_q7;
+
+
+ /**
+ * @brief Q7 vector multiplication.
+ * @param[in] pSrcA points to the first input vector
+ * @param[in] pSrcB points to the second input vector
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in each vector
+ */
+ void arm_mult_q7(
+ q7_t * pSrcA,
+ q7_t * pSrcB,
+ q7_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Q15 vector multiplication.
+ * @param[in] pSrcA points to the first input vector
+ * @param[in] pSrcB points to the second input vector
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in each vector
+ */
+ void arm_mult_q15(
+ q15_t * pSrcA,
+ q15_t * pSrcB,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Q31 vector multiplication.
+ * @param[in] pSrcA points to the first input vector
+ * @param[in] pSrcB points to the second input vector
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in each vector
+ */
+ void arm_mult_q31(
+ q31_t * pSrcA,
+ q31_t * pSrcB,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Floating-point vector multiplication.
+ * @param[in] pSrcA points to the first input vector
+ * @param[in] pSrcB points to the second input vector
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in each vector
+ */
+ void arm_mult_f32(
+ float32_t * pSrcA,
+ float32_t * pSrcB,
+ float32_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Instance structure for the Q15 CFFT/CIFFT function.
+ */
+ typedef struct
+ {
+ uint16_t fftLen; /**< length of the FFT. */
+ uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+ uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+ q15_t *pTwiddle; /**< points to the Sin twiddle factor table. */
+ uint16_t *pBitRevTable; /**< points to the bit reversal table. */
+ uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+ uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+ } arm_cfft_radix2_instance_q15;
+
+/* Deprecated */
+ arm_status arm_cfft_radix2_init_q15(
+ arm_cfft_radix2_instance_q15 * S,
+ uint16_t fftLen,
+ uint8_t ifftFlag,
+ uint8_t bitReverseFlag);
+
+/* Deprecated */
+ void arm_cfft_radix2_q15(
+ const arm_cfft_radix2_instance_q15 * S,
+ q15_t * pSrc);
+
+
+ /**
+ * @brief Instance structure for the Q15 CFFT/CIFFT function.
+ */
+ typedef struct
+ {
+ uint16_t fftLen; /**< length of the FFT. */
+ uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+ uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+ q15_t *pTwiddle; /**< points to the twiddle factor table. */
+ uint16_t *pBitRevTable; /**< points to the bit reversal table. */
+ uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+ uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+ } arm_cfft_radix4_instance_q15;
+
+/* Deprecated */
+ arm_status arm_cfft_radix4_init_q15(
+ arm_cfft_radix4_instance_q15 * S,
+ uint16_t fftLen,
+ uint8_t ifftFlag,
+ uint8_t bitReverseFlag);
+
+/* Deprecated */
+ void arm_cfft_radix4_q15(
+ const arm_cfft_radix4_instance_q15 * S,
+ q15_t * pSrc);
+
+ /**
+ * @brief Instance structure for the Radix-2 Q31 CFFT/CIFFT function.
+ */
+ typedef struct
+ {
+ uint16_t fftLen; /**< length of the FFT. */
+ uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+ uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+ q31_t *pTwiddle; /**< points to the Twiddle factor table. */
+ uint16_t *pBitRevTable; /**< points to the bit reversal table. */
+ uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+ uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+ } arm_cfft_radix2_instance_q31;
+
+/* Deprecated */
+ arm_status arm_cfft_radix2_init_q31(
+ arm_cfft_radix2_instance_q31 * S,
+ uint16_t fftLen,
+ uint8_t ifftFlag,
+ uint8_t bitReverseFlag);
+
+/* Deprecated */
+ void arm_cfft_radix2_q31(
+ const arm_cfft_radix2_instance_q31 * S,
+ q31_t * pSrc);
+
+ /**
+ * @brief Instance structure for the Q31 CFFT/CIFFT function.
+ */
+ typedef struct
+ {
+ uint16_t fftLen; /**< length of the FFT. */
+ uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+ uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+ q31_t *pTwiddle; /**< points to the twiddle factor table. */
+ uint16_t *pBitRevTable; /**< points to the bit reversal table. */
+ uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+ uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+ } arm_cfft_radix4_instance_q31;
+
+/* Deprecated */
+ void arm_cfft_radix4_q31(
+ const arm_cfft_radix4_instance_q31 * S,
+ q31_t * pSrc);
+
+/* Deprecated */
+ arm_status arm_cfft_radix4_init_q31(
+ arm_cfft_radix4_instance_q31 * S,
+ uint16_t fftLen,
+ uint8_t ifftFlag,
+ uint8_t bitReverseFlag);
+
+ /**
+ * @brief Instance structure for the floating-point CFFT/CIFFT function.
+ */
+ typedef struct
+ {
+ uint16_t fftLen; /**< length of the FFT. */
+ uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+ uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+ float32_t *pTwiddle; /**< points to the Twiddle factor table. */
+ uint16_t *pBitRevTable; /**< points to the bit reversal table. */
+ uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+ uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+ float32_t onebyfftLen; /**< value of 1/fftLen. */
+ } arm_cfft_radix2_instance_f32;
+
+/* Deprecated */
+ arm_status arm_cfft_radix2_init_f32(
+ arm_cfft_radix2_instance_f32 * S,
+ uint16_t fftLen,
+ uint8_t ifftFlag,
+ uint8_t bitReverseFlag);
+
+/* Deprecated */
+ void arm_cfft_radix2_f32(
+ const arm_cfft_radix2_instance_f32 * S,
+ float32_t * pSrc);
+
+ /**
+ * @brief Instance structure for the floating-point CFFT/CIFFT function.
+ */
+ typedef struct
+ {
+ uint16_t fftLen; /**< length of the FFT. */
+ uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+ uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+ float32_t *pTwiddle; /**< points to the Twiddle factor table. */
+ uint16_t *pBitRevTable; /**< points to the bit reversal table. */
+ uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+ uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+ float32_t onebyfftLen; /**< value of 1/fftLen. */
+ } arm_cfft_radix4_instance_f32;
+
+/* Deprecated */
+ arm_status arm_cfft_radix4_init_f32(
+ arm_cfft_radix4_instance_f32 * S,
+ uint16_t fftLen,
+ uint8_t ifftFlag,
+ uint8_t bitReverseFlag);
+
+/* Deprecated */
+ void arm_cfft_radix4_f32(
+ const arm_cfft_radix4_instance_f32 * S,
+ float32_t * pSrc);
+
+ /**
+ * @brief Instance structure for the fixed-point CFFT/CIFFT function.
+ */
+ typedef struct
+ {
+ uint16_t fftLen; /**< length of the FFT. */
+ const q15_t *pTwiddle; /**< points to the Twiddle factor table. */
+ const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
+ uint16_t bitRevLength; /**< bit reversal table length. */
+ } arm_cfft_instance_q15;
+
+void arm_cfft_q15(
+ const arm_cfft_instance_q15 * S,
+ q15_t * p1,
+ uint8_t ifftFlag,
+ uint8_t bitReverseFlag);
+
+ /**
+ * @brief Instance structure for the fixed-point CFFT/CIFFT function.
+ */
+ typedef struct
+ {
+ uint16_t fftLen; /**< length of the FFT. */
+ const q31_t *pTwiddle; /**< points to the Twiddle factor table. */
+ const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
+ uint16_t bitRevLength; /**< bit reversal table length. */
+ } arm_cfft_instance_q31;
+
+void arm_cfft_q31(
+ const arm_cfft_instance_q31 * S,
+ q31_t * p1,
+ uint8_t ifftFlag,
+ uint8_t bitReverseFlag);
+
+ /**
+ * @brief Instance structure for the floating-point CFFT/CIFFT function.
+ */
+ typedef struct
+ {
+ uint16_t fftLen; /**< length of the FFT. */
+ const float32_t *pTwiddle; /**< points to the Twiddle factor table. */
+ const uint16_t *pBitRevTable; /**< points to the bit reversal table. */
+ uint16_t bitRevLength; /**< bit reversal table length. */
+ } arm_cfft_instance_f32;
+
+ void arm_cfft_f32(
+ const arm_cfft_instance_f32 * S,
+ float32_t * p1,
+ uint8_t ifftFlag,
+ uint8_t bitReverseFlag);
+
+ /**
+ * @brief Instance structure for the Q15 RFFT/RIFFT function.
+ */
+ typedef struct
+ {
+ uint32_t fftLenReal; /**< length of the real FFT. */
+ uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
+ uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
+ uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+ q15_t *pTwiddleAReal; /**< points to the real twiddle factor table. */
+ q15_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */
+ const arm_cfft_instance_q15 *pCfft; /**< points to the complex FFT instance. */
+ } arm_rfft_instance_q15;
+
+ arm_status arm_rfft_init_q15(
+ arm_rfft_instance_q15 * S,
+ uint32_t fftLenReal,
+ uint32_t ifftFlagR,
+ uint32_t bitReverseFlag);
+
+ void arm_rfft_q15(
+ const arm_rfft_instance_q15 * S,
+ q15_t * pSrc,
+ q15_t * pDst);
+
+ /**
+ * @brief Instance structure for the Q31 RFFT/RIFFT function.
+ */
+ typedef struct
+ {
+ uint32_t fftLenReal; /**< length of the real FFT. */
+ uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
+ uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
+ uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+ q31_t *pTwiddleAReal; /**< points to the real twiddle factor table. */
+ q31_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */
+ const arm_cfft_instance_q31 *pCfft; /**< points to the complex FFT instance. */
+ } arm_rfft_instance_q31;
+
+ arm_status arm_rfft_init_q31(
+ arm_rfft_instance_q31 * S,
+ uint32_t fftLenReal,
+ uint32_t ifftFlagR,
+ uint32_t bitReverseFlag);
+
+ void arm_rfft_q31(
+ const arm_rfft_instance_q31 * S,
+ q31_t * pSrc,
+ q31_t * pDst);
+
+ /**
+ * @brief Instance structure for the floating-point RFFT/RIFFT function.
+ */
+ typedef struct
+ {
+ uint32_t fftLenReal; /**< length of the real FFT. */
+ uint16_t fftLenBy2; /**< length of the complex FFT. */
+ uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
+ uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
+ uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+ float32_t *pTwiddleAReal; /**< points to the real twiddle factor table. */
+ float32_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */
+ arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */
+ } arm_rfft_instance_f32;
+
+ arm_status arm_rfft_init_f32(
+ arm_rfft_instance_f32 * S,
+ arm_cfft_radix4_instance_f32 * S_CFFT,
+ uint32_t fftLenReal,
+ uint32_t ifftFlagR,
+ uint32_t bitReverseFlag);
+
+ void arm_rfft_f32(
+ const arm_rfft_instance_f32 * S,
+ float32_t * pSrc,
+ float32_t * pDst);
+
+ /**
+ * @brief Instance structure for the floating-point RFFT/RIFFT function.
+ */
+typedef struct
+ {
+ arm_cfft_instance_f32 Sint; /**< Internal CFFT structure. */
+ uint16_t fftLenRFFT; /**< length of the real sequence */
+ float32_t * pTwiddleRFFT; /**< Twiddle factors real stage */
+ } arm_rfft_fast_instance_f32 ;
+
+arm_status arm_rfft_fast_init_f32 (
+ arm_rfft_fast_instance_f32 * S,
+ uint16_t fftLen);
+
+void arm_rfft_fast_f32(
+ arm_rfft_fast_instance_f32 * S,
+ float32_t * p, float32_t * pOut,
+ uint8_t ifftFlag);
+
+ /**
+ * @brief Instance structure for the floating-point DCT4/IDCT4 function.
+ */
+ typedef struct
+ {
+ uint16_t N; /**< length of the DCT4. */
+ uint16_t Nby2; /**< half of the length of the DCT4. */
+ float32_t normalize; /**< normalizing factor. */
+ float32_t *pTwiddle; /**< points to the twiddle factor table. */
+ float32_t *pCosFactor; /**< points to the cosFactor table. */
+ arm_rfft_instance_f32 *pRfft; /**< points to the real FFT instance. */
+ arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */
+ } arm_dct4_instance_f32;
+
+
+ /**
+ * @brief Initialization function for the floating-point DCT4/IDCT4.
+ * @param[in,out] S points to an instance of floating-point DCT4/IDCT4 structure.
+ * @param[in] S_RFFT points to an instance of floating-point RFFT/RIFFT structure.
+ * @param[in] S_CFFT points to an instance of floating-point CFFT/CIFFT structure.
+ * @param[in] N length of the DCT4.
+ * @param[in] Nby2 half of the length of the DCT4.
+ * @param[in] normalize normalizing factor.
+ * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported transform length.
+ */
+ arm_status arm_dct4_init_f32(
+ arm_dct4_instance_f32 * S,
+ arm_rfft_instance_f32 * S_RFFT,
+ arm_cfft_radix4_instance_f32 * S_CFFT,
+ uint16_t N,
+ uint16_t Nby2,
+ float32_t normalize);
+
+
+ /**
+ * @brief Processing function for the floating-point DCT4/IDCT4.
+ * @param[in] S points to an instance of the floating-point DCT4/IDCT4 structure.
+ * @param[in] pState points to state buffer.
+ * @param[in,out] pInlineBuffer points to the in-place input and output buffer.
+ */
+ void arm_dct4_f32(
+ const arm_dct4_instance_f32 * S,
+ float32_t * pState,
+ float32_t * pInlineBuffer);
+
+
+ /**
+ * @brief Instance structure for the Q31 DCT4/IDCT4 function.
+ */
+ typedef struct
+ {
+ uint16_t N; /**< length of the DCT4. */
+ uint16_t Nby2; /**< half of the length of the DCT4. */
+ q31_t normalize; /**< normalizing factor. */
+ q31_t *pTwiddle; /**< points to the twiddle factor table. */
+ q31_t *pCosFactor; /**< points to the cosFactor table. */
+ arm_rfft_instance_q31 *pRfft; /**< points to the real FFT instance. */
+ arm_cfft_radix4_instance_q31 *pCfft; /**< points to the complex FFT instance. */
+ } arm_dct4_instance_q31;
+
+
+ /**
+ * @brief Initialization function for the Q31 DCT4/IDCT4.
+ * @param[in,out] S points to an instance of Q31 DCT4/IDCT4 structure.
+ * @param[in] S_RFFT points to an instance of Q31 RFFT/RIFFT structure
+ * @param[in] S_CFFT points to an instance of Q31 CFFT/CIFFT structure
+ * @param[in] N length of the DCT4.
+ * @param[in] Nby2 half of the length of the DCT4.
+ * @param[in] normalize normalizing factor.
+ * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
+ */
+ arm_status arm_dct4_init_q31(
+ arm_dct4_instance_q31 * S,
+ arm_rfft_instance_q31 * S_RFFT,
+ arm_cfft_radix4_instance_q31 * S_CFFT,
+ uint16_t N,
+ uint16_t Nby2,
+ q31_t normalize);
+
+
+ /**
+ * @brief Processing function for the Q31 DCT4/IDCT4.
+ * @param[in] S points to an instance of the Q31 DCT4 structure.
+ * @param[in] pState points to state buffer.
+ * @param[in,out] pInlineBuffer points to the in-place input and output buffer.
+ */
+ void arm_dct4_q31(
+ const arm_dct4_instance_q31 * S,
+ q31_t * pState,
+ q31_t * pInlineBuffer);
+
+
+ /**
+ * @brief Instance structure for the Q15 DCT4/IDCT4 function.
+ */
+ typedef struct
+ {
+ uint16_t N; /**< length of the DCT4. */
+ uint16_t Nby2; /**< half of the length of the DCT4. */
+ q15_t normalize; /**< normalizing factor. */
+ q15_t *pTwiddle; /**< points to the twiddle factor table. */
+ q15_t *pCosFactor; /**< points to the cosFactor table. */
+ arm_rfft_instance_q15 *pRfft; /**< points to the real FFT instance. */
+ arm_cfft_radix4_instance_q15 *pCfft; /**< points to the complex FFT instance. */
+ } arm_dct4_instance_q15;
+
+
+ /**
+ * @brief Initialization function for the Q15 DCT4/IDCT4.
+ * @param[in,out] S points to an instance of Q15 DCT4/IDCT4 structure.
+ * @param[in] S_RFFT points to an instance of Q15 RFFT/RIFFT structure.
+ * @param[in] S_CFFT points to an instance of Q15 CFFT/CIFFT structure.
+ * @param[in] N length of the DCT4.
+ * @param[in] Nby2 half of the length of the DCT4.
+ * @param[in] normalize normalizing factor.
+ * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
+ */
+ arm_status arm_dct4_init_q15(
+ arm_dct4_instance_q15 * S,
+ arm_rfft_instance_q15 * S_RFFT,
+ arm_cfft_radix4_instance_q15 * S_CFFT,
+ uint16_t N,
+ uint16_t Nby2,
+ q15_t normalize);
+
+
+ /**
+ * @brief Processing function for the Q15 DCT4/IDCT4.
+ * @param[in] S points to an instance of the Q15 DCT4 structure.
+ * @param[in] pState points to state buffer.
+ * @param[in,out] pInlineBuffer points to the in-place input and output buffer.
+ */
+ void arm_dct4_q15(
+ const arm_dct4_instance_q15 * S,
+ q15_t * pState,
+ q15_t * pInlineBuffer);
+
+
+ /**
+ * @brief Floating-point vector addition.
+ * @param[in] pSrcA points to the first input vector
+ * @param[in] pSrcB points to the second input vector
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in each vector
+ */
+ void arm_add_f32(
+ float32_t * pSrcA,
+ float32_t * pSrcB,
+ float32_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Q7 vector addition.
+ * @param[in] pSrcA points to the first input vector
+ * @param[in] pSrcB points to the second input vector
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in each vector
+ */
+ void arm_add_q7(
+ q7_t * pSrcA,
+ q7_t * pSrcB,
+ q7_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Q15 vector addition.
+ * @param[in] pSrcA points to the first input vector
+ * @param[in] pSrcB points to the second input vector
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in each vector
+ */
+ void arm_add_q15(
+ q15_t * pSrcA,
+ q15_t * pSrcB,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Q31 vector addition.
+ * @param[in] pSrcA points to the first input vector
+ * @param[in] pSrcB points to the second input vector
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in each vector
+ */
+ void arm_add_q31(
+ q31_t * pSrcA,
+ q31_t * pSrcB,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Floating-point vector subtraction.
+ * @param[in] pSrcA points to the first input vector
+ * @param[in] pSrcB points to the second input vector
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in each vector
+ */
+ void arm_sub_f32(
+ float32_t * pSrcA,
+ float32_t * pSrcB,
+ float32_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Q7 vector subtraction.
+ * @param[in] pSrcA points to the first input vector
+ * @param[in] pSrcB points to the second input vector
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in each vector
+ */
+ void arm_sub_q7(
+ q7_t * pSrcA,
+ q7_t * pSrcB,
+ q7_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Q15 vector subtraction.
+ * @param[in] pSrcA points to the first input vector
+ * @param[in] pSrcB points to the second input vector
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in each vector
+ */
+ void arm_sub_q15(
+ q15_t * pSrcA,
+ q15_t * pSrcB,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Q31 vector subtraction.
+ * @param[in] pSrcA points to the first input vector
+ * @param[in] pSrcB points to the second input vector
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in each vector
+ */
+ void arm_sub_q31(
+ q31_t * pSrcA,
+ q31_t * pSrcB,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Multiplies a floating-point vector by a scalar.
+ * @param[in] pSrc points to the input vector
+ * @param[in] scale scale factor to be applied
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ */
+ void arm_scale_f32(
+ float32_t * pSrc,
+ float32_t scale,
+ float32_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Multiplies a Q7 vector by a scalar.
+ * @param[in] pSrc points to the input vector
+ * @param[in] scaleFract fractional portion of the scale value
+ * @param[in] shift number of bits to shift the result by
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ */
+ void arm_scale_q7(
+ q7_t * pSrc,
+ q7_t scaleFract,
+ int8_t shift,
+ q7_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Multiplies a Q15 vector by a scalar.
+ * @param[in] pSrc points to the input vector
+ * @param[in] scaleFract fractional portion of the scale value
+ * @param[in] shift number of bits to shift the result by
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ */
+ void arm_scale_q15(
+ q15_t * pSrc,
+ q15_t scaleFract,
+ int8_t shift,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Multiplies a Q31 vector by a scalar.
+ * @param[in] pSrc points to the input vector
+ * @param[in] scaleFract fractional portion of the scale value
+ * @param[in] shift number of bits to shift the result by
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ */
+ void arm_scale_q31(
+ q31_t * pSrc,
+ q31_t scaleFract,
+ int8_t shift,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Q7 vector absolute value.
+ * @param[in] pSrc points to the input buffer
+ * @param[out] pDst points to the output buffer
+ * @param[in] blockSize number of samples in each vector
+ */
+ void arm_abs_q7(
+ q7_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Floating-point vector absolute value.
+ * @param[in] pSrc points to the input buffer
+ * @param[out] pDst points to the output buffer
+ * @param[in] blockSize number of samples in each vector
+ */
+ void arm_abs_f32(
+ float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Q15 vector absolute value.
+ * @param[in] pSrc points to the input buffer
+ * @param[out] pDst points to the output buffer
+ * @param[in] blockSize number of samples in each vector
+ */
+ void arm_abs_q15(
+ q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Q31 vector absolute value.
+ * @param[in] pSrc points to the input buffer
+ * @param[out] pDst points to the output buffer
+ * @param[in] blockSize number of samples in each vector
+ */
+ void arm_abs_q31(
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Dot product of floating-point vectors.
+ * @param[in] pSrcA points to the first input vector
+ * @param[in] pSrcB points to the second input vector
+ * @param[in] blockSize number of samples in each vector
+ * @param[out] result output result returned here
+ */
+ void arm_dot_prod_f32(
+ float32_t * pSrcA,
+ float32_t * pSrcB,
+ uint32_t blockSize,
+ float32_t * result);
+
+
+ /**
+ * @brief Dot product of Q7 vectors.
+ * @param[in] pSrcA points to the first input vector
+ * @param[in] pSrcB points to the second input vector
+ * @param[in] blockSize number of samples in each vector
+ * @param[out] result output result returned here
+ */
+ void arm_dot_prod_q7(
+ q7_t * pSrcA,
+ q7_t * pSrcB,
+ uint32_t blockSize,
+ q31_t * result);
+
+
+ /**
+ * @brief Dot product of Q15 vectors.
+ * @param[in] pSrcA points to the first input vector
+ * @param[in] pSrcB points to the second input vector
+ * @param[in] blockSize number of samples in each vector
+ * @param[out] result output result returned here
+ */
+ void arm_dot_prod_q15(
+ q15_t * pSrcA,
+ q15_t * pSrcB,
+ uint32_t blockSize,
+ q63_t * result);
+
+
+ /**
+ * @brief Dot product of Q31 vectors.
+ * @param[in] pSrcA points to the first input vector
+ * @param[in] pSrcB points to the second input vector
+ * @param[in] blockSize number of samples in each vector
+ * @param[out] result output result returned here
+ */
+ void arm_dot_prod_q31(
+ q31_t * pSrcA,
+ q31_t * pSrcB,
+ uint32_t blockSize,
+ q63_t * result);
+
+
+ /**
+ * @brief Shifts the elements of a Q7 vector a specified number of bits.
+ * @param[in] pSrc points to the input vector
+ * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ */
+ void arm_shift_q7(
+ q7_t * pSrc,
+ int8_t shiftBits,
+ q7_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Shifts the elements of a Q15 vector a specified number of bits.
+ * @param[in] pSrc points to the input vector
+ * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ */
+ void arm_shift_q15(
+ q15_t * pSrc,
+ int8_t shiftBits,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Shifts the elements of a Q31 vector a specified number of bits.
+ * @param[in] pSrc points to the input vector
+ * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ */
+ void arm_shift_q31(
+ q31_t * pSrc,
+ int8_t shiftBits,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Adds a constant offset to a floating-point vector.
+ * @param[in] pSrc points to the input vector
+ * @param[in] offset is the offset to be added
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ */
+ void arm_offset_f32(
+ float32_t * pSrc,
+ float32_t offset,
+ float32_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Adds a constant offset to a Q7 vector.
+ * @param[in] pSrc points to the input vector
+ * @param[in] offset is the offset to be added
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ */
+ void arm_offset_q7(
+ q7_t * pSrc,
+ q7_t offset,
+ q7_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Adds a constant offset to a Q15 vector.
+ * @param[in] pSrc points to the input vector
+ * @param[in] offset is the offset to be added
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ */
+ void arm_offset_q15(
+ q15_t * pSrc,
+ q15_t offset,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Adds a constant offset to a Q31 vector.
+ * @param[in] pSrc points to the input vector
+ * @param[in] offset is the offset to be added
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ */
+ void arm_offset_q31(
+ q31_t * pSrc,
+ q31_t offset,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Negates the elements of a floating-point vector.
+ * @param[in] pSrc points to the input vector
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ */
+ void arm_negate_f32(
+ float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Negates the elements of a Q7 vector.
+ * @param[in] pSrc points to the input vector
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ */
+ void arm_negate_q7(
+ q7_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Negates the elements of a Q15 vector.
+ * @param[in] pSrc points to the input vector
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ */
+ void arm_negate_q15(
+ q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Negates the elements of a Q31 vector.
+ * @param[in] pSrc points to the input vector
+ * @param[out] pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ */
+ void arm_negate_q31(
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Copies the elements of a floating-point vector.
+ * @param[in] pSrc input pointer
+ * @param[out] pDst output pointer
+ * @param[in] blockSize number of samples to process
+ */
+ void arm_copy_f32(
+ float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Copies the elements of a Q7 vector.
+ * @param[in] pSrc input pointer
+ * @param[out] pDst output pointer
+ * @param[in] blockSize number of samples to process
+ */
+ void arm_copy_q7(
+ q7_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Copies the elements of a Q15 vector.
+ * @param[in] pSrc input pointer
+ * @param[out] pDst output pointer
+ * @param[in] blockSize number of samples to process
+ */
+ void arm_copy_q15(
+ q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Copies the elements of a Q31 vector.
+ * @param[in] pSrc input pointer
+ * @param[out] pDst output pointer
+ * @param[in] blockSize number of samples to process
+ */
+ void arm_copy_q31(
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Fills a constant value into a floating-point vector.
+ * @param[in] value input value to be filled
+ * @param[out] pDst output pointer
+ * @param[in] blockSize number of samples to process
+ */
+ void arm_fill_f32(
+ float32_t value,
+ float32_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Fills a constant value into a Q7 vector.
+ * @param[in] value input value to be filled
+ * @param[out] pDst output pointer
+ * @param[in] blockSize number of samples to process
+ */
+ void arm_fill_q7(
+ q7_t value,
+ q7_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Fills a constant value into a Q15 vector.
+ * @param[in] value input value to be filled
+ * @param[out] pDst output pointer
+ * @param[in] blockSize number of samples to process
+ */
+ void arm_fill_q15(
+ q15_t value,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Fills a constant value into a Q31 vector.
+ * @param[in] value input value to be filled
+ * @param[out] pDst output pointer
+ * @param[in] blockSize number of samples to process
+ */
+ void arm_fill_q31(
+ q31_t value,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+/**
+ * @brief Convolution of floating-point sequences.
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the location where the output result is written. Length srcALen + srcBLen-1.
+ */
+ void arm_conv_f32(
+ float32_t * pSrcA,
+ uint32_t srcALen,
+ float32_t * pSrcB,
+ uint32_t srcBLen,
+ float32_t * pDst);
+
+
+ /**
+ * @brief Convolution of Q15 sequences.
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the block of output data Length srcALen + srcBLen-1.
+ * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+ * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
+ */
+ void arm_conv_opt_q15(
+ q15_t * pSrcA,
+ uint32_t srcALen,
+ q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst,
+ q15_t * pScratch1,
+ q15_t * pScratch2);
+
+
+/**
+ * @brief Convolution of Q15 sequences.
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the location where the output result is written. Length srcALen + srcBLen-1.
+ */
+ void arm_conv_q15(
+ q15_t * pSrcA,
+ uint32_t srcALen,
+ q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst);
+
+
+ /**
+ * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the block of output data Length srcALen + srcBLen-1.
+ */
+ void arm_conv_fast_q15(
+ q15_t * pSrcA,
+ uint32_t srcALen,
+ q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst);
+
+
+ /**
+ * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the block of output data Length srcALen + srcBLen-1.
+ * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+ * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
+ */
+ void arm_conv_fast_opt_q15(
+ q15_t * pSrcA,
+ uint32_t srcALen,
+ q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst,
+ q15_t * pScratch1,
+ q15_t * pScratch2);
+
+
+ /**
+ * @brief Convolution of Q31 sequences.
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the block of output data Length srcALen + srcBLen-1.
+ */
+ void arm_conv_q31(
+ q31_t * pSrcA,
+ uint32_t srcALen,
+ q31_t * pSrcB,
+ uint32_t srcBLen,
+ q31_t * pDst);
+
+
+ /**
+ * @brief Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the block of output data Length srcALen + srcBLen-1.
+ */
+ void arm_conv_fast_q31(
+ q31_t * pSrcA,
+ uint32_t srcALen,
+ q31_t * pSrcB,
+ uint32_t srcBLen,
+ q31_t * pDst);
+
+
+ /**
+ * @brief Convolution of Q7 sequences.
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the block of output data Length srcALen + srcBLen-1.
+ * @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+ * @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+ */
+ void arm_conv_opt_q7(
+ q7_t * pSrcA,
+ uint32_t srcALen,
+ q7_t * pSrcB,
+ uint32_t srcBLen,
+ q7_t * pDst,
+ q15_t * pScratch1,
+ q15_t * pScratch2);
+
+
+ /**
+ * @brief Convolution of Q7 sequences.
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the block of output data Length srcALen + srcBLen-1.
+ */
+ void arm_conv_q7(
+ q7_t * pSrcA,
+ uint32_t srcALen,
+ q7_t * pSrcB,
+ uint32_t srcBLen,
+ q7_t * pDst);
+
+
+ /**
+ * @brief Partial convolution of floating-point sequences.
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the block of output data
+ * @param[in] firstIndex is the first output sample to start with.
+ * @param[in] numPoints is the number of output points to be computed.
+ * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2].
+ */
+ arm_status arm_conv_partial_f32(
+ float32_t * pSrcA,
+ uint32_t srcALen,
+ float32_t * pSrcB,
+ uint32_t srcBLen,
+ float32_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints);
+
+
+ /**
+ * @brief Partial convolution of Q15 sequences.
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the block of output data
+ * @param[in] firstIndex is the first output sample to start with.
+ * @param[in] numPoints is the number of output points to be computed.
+ * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+ * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
+ * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2].
+ */
+ arm_status arm_conv_partial_opt_q15(
+ q15_t * pSrcA,
+ uint32_t srcALen,
+ q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints,
+ q15_t * pScratch1,
+ q15_t * pScratch2);
+
+
+ /**
+ * @brief Partial convolution of Q15 sequences.
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the block of output data
+ * @param[in] firstIndex is the first output sample to start with.
+ * @param[in] numPoints is the number of output points to be computed.
+ * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2].
+ */
+ arm_status arm_conv_partial_q15(
+ q15_t * pSrcA,
+ uint32_t srcALen,
+ q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints);
+
+
+ /**
+ * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the block of output data
+ * @param[in] firstIndex is the first output sample to start with.
+ * @param[in] numPoints is the number of output points to be computed.
+ * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2].
+ */
+ arm_status arm_conv_partial_fast_q15(
+ q15_t * pSrcA,
+ uint32_t srcALen,
+ q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints);
+
+
+ /**
+ * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the block of output data
+ * @param[in] firstIndex is the first output sample to start with.
+ * @param[in] numPoints is the number of output points to be computed.
+ * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+ * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
+ * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2].
+ */
+ arm_status arm_conv_partial_fast_opt_q15(
+ q15_t * pSrcA,
+ uint32_t srcALen,
+ q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints,
+ q15_t * pScratch1,
+ q15_t * pScratch2);
+
+
+ /**
+ * @brief Partial convolution of Q31 sequences.
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the block of output data
+ * @param[in] firstIndex is the first output sample to start with.
+ * @param[in] numPoints is the number of output points to be computed.
+ * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2].
+ */
+ arm_status arm_conv_partial_q31(
+ q31_t * pSrcA,
+ uint32_t srcALen,
+ q31_t * pSrcB,
+ uint32_t srcBLen,
+ q31_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints);
+
+
+ /**
+ * @brief Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the block of output data
+ * @param[in] firstIndex is the first output sample to start with.
+ * @param[in] numPoints is the number of output points to be computed.
+ * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2].
+ */
+ arm_status arm_conv_partial_fast_q31(
+ q31_t * pSrcA,
+ uint32_t srcALen,
+ q31_t * pSrcB,
+ uint32_t srcBLen,
+ q31_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints);
+
+
+ /**
+ * @brief Partial convolution of Q7 sequences
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the block of output data
+ * @param[in] firstIndex is the first output sample to start with.
+ * @param[in] numPoints is the number of output points to be computed.
+ * @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+ * @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+ * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2].
+ */
+ arm_status arm_conv_partial_opt_q7(
+ q7_t * pSrcA,
+ uint32_t srcALen,
+ q7_t * pSrcB,
+ uint32_t srcBLen,
+ q7_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints,
+ q15_t * pScratch1,
+ q15_t * pScratch2);
+
+
+/**
+ * @brief Partial convolution of Q7 sequences.
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the block of output data
+ * @param[in] firstIndex is the first output sample to start with.
+ * @param[in] numPoints is the number of output points to be computed.
+ * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen + srcBLen-2].
+ */
+ arm_status arm_conv_partial_q7(
+ q7_t * pSrcA,
+ uint32_t srcALen,
+ q7_t * pSrcB,
+ uint32_t srcBLen,
+ q7_t * pDst,
+ uint32_t firstIndex,
+ uint32_t numPoints);
+
+
+ /**
+ * @brief Instance structure for the Q15 FIR decimator.
+ */
+ typedef struct
+ {
+ uint8_t M; /**< decimation factor. */
+ uint16_t numTaps; /**< number of coefficients in the filter. */
+ q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
+ q15_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */
+ } arm_fir_decimate_instance_q15;
+
+ /**
+ * @brief Instance structure for the Q31 FIR decimator.
+ */
+ typedef struct
+ {
+ uint8_t M; /**< decimation factor. */
+ uint16_t numTaps; /**< number of coefficients in the filter. */
+ q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
+ q31_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */
+ } arm_fir_decimate_instance_q31;
+
+ /**
+ * @brief Instance structure for the floating-point FIR decimator.
+ */
+ typedef struct
+ {
+ uint8_t M; /**< decimation factor. */
+ uint16_t numTaps; /**< number of coefficients in the filter. */
+ float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
+ float32_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */
+ } arm_fir_decimate_instance_f32;
+
+
+ /**
+ * @brief Processing function for the floating-point FIR decimator.
+ * @param[in] S points to an instance of the floating-point FIR decimator structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data
+ * @param[in] blockSize number of input samples to process per call.
+ */
+ void arm_fir_decimate_f32(
+ const arm_fir_decimate_instance_f32 * S,
+ float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the floating-point FIR decimator.
+ * @param[in,out] S points to an instance of the floating-point FIR decimator structure.
+ * @param[in] numTaps number of coefficients in the filter.
+ * @param[in] M decimation factor.
+ * @param[in] pCoeffs points to the filter coefficients.
+ * @param[in] pState points to the state buffer.
+ * @param[in] blockSize number of input samples to process per call.
+ * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+ * <code>blockSize</code> is not a multiple of <code>M</code>.
+ */
+ arm_status arm_fir_decimate_init_f32(
+ arm_fir_decimate_instance_f32 * S,
+ uint16_t numTaps,
+ uint8_t M,
+ float32_t * pCoeffs,
+ float32_t * pState,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Processing function for the Q15 FIR decimator.
+ * @param[in] S points to an instance of the Q15 FIR decimator structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data
+ * @param[in] blockSize number of input samples to process per call.
+ */
+ void arm_fir_decimate_q15(
+ const arm_fir_decimate_instance_q15 * S,
+ q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
+ * @param[in] S points to an instance of the Q15 FIR decimator structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data
+ * @param[in] blockSize number of input samples to process per call.
+ */
+ void arm_fir_decimate_fast_q15(
+ const arm_fir_decimate_instance_q15 * S,
+ q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the Q15 FIR decimator.
+ * @param[in,out] S points to an instance of the Q15 FIR decimator structure.
+ * @param[in] numTaps number of coefficients in the filter.
+ * @param[in] M decimation factor.
+ * @param[in] pCoeffs points to the filter coefficients.
+ * @param[in] pState points to the state buffer.
+ * @param[in] blockSize number of input samples to process per call.
+ * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+ * <code>blockSize</code> is not a multiple of <code>M</code>.
+ */
+ arm_status arm_fir_decimate_init_q15(
+ arm_fir_decimate_instance_q15 * S,
+ uint16_t numTaps,
+ uint8_t M,
+ q15_t * pCoeffs,
+ q15_t * pState,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Processing function for the Q31 FIR decimator.
+ * @param[in] S points to an instance of the Q31 FIR decimator structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data
+ * @param[in] blockSize number of input samples to process per call.
+ */
+ void arm_fir_decimate_q31(
+ const arm_fir_decimate_instance_q31 * S,
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+ /**
+ * @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
+ * @param[in] S points to an instance of the Q31 FIR decimator structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data
+ * @param[in] blockSize number of input samples to process per call.
+ */
+ void arm_fir_decimate_fast_q31(
+ arm_fir_decimate_instance_q31 * S,
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the Q31 FIR decimator.
+ * @param[in,out] S points to an instance of the Q31 FIR decimator structure.
+ * @param[in] numTaps number of coefficients in the filter.
+ * @param[in] M decimation factor.
+ * @param[in] pCoeffs points to the filter coefficients.
+ * @param[in] pState points to the state buffer.
+ * @param[in] blockSize number of input samples to process per call.
+ * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+ * <code>blockSize</code> is not a multiple of <code>M</code>.
+ */
+ arm_status arm_fir_decimate_init_q31(
+ arm_fir_decimate_instance_q31 * S,
+ uint16_t numTaps,
+ uint8_t M,
+ q31_t * pCoeffs,
+ q31_t * pState,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Instance structure for the Q15 FIR interpolator.
+ */
+ typedef struct
+ {
+ uint8_t L; /**< upsample factor. */
+ uint16_t phaseLength; /**< length of each polyphase filter component. */
+ q15_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */
+ q15_t *pState; /**< points to the state variable array. The array is of length blockSize + phaseLength-1. */
+ } arm_fir_interpolate_instance_q15;
+
+ /**
+ * @brief Instance structure for the Q31 FIR interpolator.
+ */
+ typedef struct
+ {
+ uint8_t L; /**< upsample factor. */
+ uint16_t phaseLength; /**< length of each polyphase filter component. */
+ q31_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */
+ q31_t *pState; /**< points to the state variable array. The array is of length blockSize + phaseLength-1. */
+ } arm_fir_interpolate_instance_q31;
+
+ /**
+ * @brief Instance structure for the floating-point FIR interpolator.
+ */
+ typedef struct
+ {
+ uint8_t L; /**< upsample factor. */
+ uint16_t phaseLength; /**< length of each polyphase filter component. */
+ float32_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */
+ float32_t *pState; /**< points to the state variable array. The array is of length phaseLength + numTaps-1. */
+ } arm_fir_interpolate_instance_f32;
+
+
+ /**
+ * @brief Processing function for the Q15 FIR interpolator.
+ * @param[in] S points to an instance of the Q15 FIR interpolator structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of input samples to process per call.
+ */
+ void arm_fir_interpolate_q15(
+ const arm_fir_interpolate_instance_q15 * S,
+ q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the Q15 FIR interpolator.
+ * @param[in,out] S points to an instance of the Q15 FIR interpolator structure.
+ * @param[in] L upsample factor.
+ * @param[in] numTaps number of filter coefficients in the filter.
+ * @param[in] pCoeffs points to the filter coefficient buffer.
+ * @param[in] pState points to the state buffer.
+ * @param[in] blockSize number of input samples to process per call.
+ * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+ * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
+ */
+ arm_status arm_fir_interpolate_init_q15(
+ arm_fir_interpolate_instance_q15 * S,
+ uint8_t L,
+ uint16_t numTaps,
+ q15_t * pCoeffs,
+ q15_t * pState,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Processing function for the Q31 FIR interpolator.
+ * @param[in] S points to an instance of the Q15 FIR interpolator structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of input samples to process per call.
+ */
+ void arm_fir_interpolate_q31(
+ const arm_fir_interpolate_instance_q31 * S,
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the Q31 FIR interpolator.
+ * @param[in,out] S points to an instance of the Q31 FIR interpolator structure.
+ * @param[in] L upsample factor.
+ * @param[in] numTaps number of filter coefficients in the filter.
+ * @param[in] pCoeffs points to the filter coefficient buffer.
+ * @param[in] pState points to the state buffer.
+ * @param[in] blockSize number of input samples to process per call.
+ * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+ * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
+ */
+ arm_status arm_fir_interpolate_init_q31(
+ arm_fir_interpolate_instance_q31 * S,
+ uint8_t L,
+ uint16_t numTaps,
+ q31_t * pCoeffs,
+ q31_t * pState,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Processing function for the floating-point FIR interpolator.
+ * @param[in] S points to an instance of the floating-point FIR interpolator structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of input samples to process per call.
+ */
+ void arm_fir_interpolate_f32(
+ const arm_fir_interpolate_instance_f32 * S,
+ float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the floating-point FIR interpolator.
+ * @param[in,out] S points to an instance of the floating-point FIR interpolator structure.
+ * @param[in] L upsample factor.
+ * @param[in] numTaps number of filter coefficients in the filter.
+ * @param[in] pCoeffs points to the filter coefficient buffer.
+ * @param[in] pState points to the state buffer.
+ * @param[in] blockSize number of input samples to process per call.
+ * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+ * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
+ */
+ arm_status arm_fir_interpolate_init_f32(
+ arm_fir_interpolate_instance_f32 * S,
+ uint8_t L,
+ uint16_t numTaps,
+ float32_t * pCoeffs,
+ float32_t * pState,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Instance structure for the high precision Q31 Biquad cascade filter.
+ */
+ typedef struct
+ {
+ uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
+ q63_t *pState; /**< points to the array of state coefficients. The array is of length 4*numStages. */
+ q31_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */
+ uint8_t postShift; /**< additional shift, in bits, applied to each output sample. */
+ } arm_biquad_cas_df1_32x64_ins_q31;
+
+
+ /**
+ * @param[in] S points to an instance of the high precision Q31 Biquad cascade filter structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_biquad_cas_df1_32x64_q31(
+ const arm_biquad_cas_df1_32x64_ins_q31 * S,
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @param[in,out] S points to an instance of the high precision Q31 Biquad cascade filter structure.
+ * @param[in] numStages number of 2nd order stages in the filter.
+ * @param[in] pCoeffs points to the filter coefficients.
+ * @param[in] pState points to the state buffer.
+ * @param[in] postShift shift to be applied to the output. Varies according to the coefficients format
+ */
+ void arm_biquad_cas_df1_32x64_init_q31(
+ arm_biquad_cas_df1_32x64_ins_q31 * S,
+ uint8_t numStages,
+ q31_t * pCoeffs,
+ q63_t * pState,
+ uint8_t postShift);
+
+
+ /**
+ * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
+ */
+ typedef struct
+ {
+ uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
+ float32_t *pState; /**< points to the array of state coefficients. The array is of length 2*numStages. */
+ float32_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */
+ } arm_biquad_cascade_df2T_instance_f32;
+
+ /**
+ * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
+ */
+ typedef struct
+ {
+ uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
+ float32_t *pState; /**< points to the array of state coefficients. The array is of length 4*numStages. */
+ float32_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */
+ } arm_biquad_cascade_stereo_df2T_instance_f32;
+
+ /**
+ * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
+ */
+ typedef struct
+ {
+ uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
+ float64_t *pState; /**< points to the array of state coefficients. The array is of length 2*numStages. */
+ float64_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */
+ } arm_biquad_cascade_df2T_instance_f64;
+
+
+ /**
+ * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
+ * @param[in] S points to an instance of the filter data structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_biquad_cascade_df2T_f32(
+ const arm_biquad_cascade_df2T_instance_f32 * S,
+ float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. 2 channels
+ * @param[in] S points to an instance of the filter data structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_biquad_cascade_stereo_df2T_f32(
+ const arm_biquad_cascade_stereo_df2T_instance_f32 * S,
+ float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
+ * @param[in] S points to an instance of the filter data structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_biquad_cascade_df2T_f64(
+ const arm_biquad_cascade_df2T_instance_f64 * S,
+ float64_t * pSrc,
+ float64_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+ * @param[in,out] S points to an instance of the filter data structure.
+ * @param[in] numStages number of 2nd order stages in the filter.
+ * @param[in] pCoeffs points to the filter coefficients.
+ * @param[in] pState points to the state buffer.
+ */
+ void arm_biquad_cascade_df2T_init_f32(
+ arm_biquad_cascade_df2T_instance_f32 * S,
+ uint8_t numStages,
+ float32_t * pCoeffs,
+ float32_t * pState);
+
+
+ /**
+ * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+ * @param[in,out] S points to an instance of the filter data structure.
+ * @param[in] numStages number of 2nd order stages in the filter.
+ * @param[in] pCoeffs points to the filter coefficients.
+ * @param[in] pState points to the state buffer.
+ */
+ void arm_biquad_cascade_stereo_df2T_init_f32(
+ arm_biquad_cascade_stereo_df2T_instance_f32 * S,
+ uint8_t numStages,
+ float32_t * pCoeffs,
+ float32_t * pState);
+
+
+ /**
+ * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+ * @param[in,out] S points to an instance of the filter data structure.
+ * @param[in] numStages number of 2nd order stages in the filter.
+ * @param[in] pCoeffs points to the filter coefficients.
+ * @param[in] pState points to the state buffer.
+ */
+ void arm_biquad_cascade_df2T_init_f64(
+ arm_biquad_cascade_df2T_instance_f64 * S,
+ uint8_t numStages,
+ float64_t * pCoeffs,
+ float64_t * pState);
+
+
+ /**
+ * @brief Instance structure for the Q15 FIR lattice filter.
+ */
+ typedef struct
+ {
+ uint16_t numStages; /**< number of filter stages. */
+ q15_t *pState; /**< points to the state variable array. The array is of length numStages. */
+ q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */
+ } arm_fir_lattice_instance_q15;
+
+ /**
+ * @brief Instance structure for the Q31 FIR lattice filter.
+ */
+ typedef struct
+ {
+ uint16_t numStages; /**< number of filter stages. */
+ q31_t *pState; /**< points to the state variable array. The array is of length numStages. */
+ q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */
+ } arm_fir_lattice_instance_q31;
+
+ /**
+ * @brief Instance structure for the floating-point FIR lattice filter.
+ */
+ typedef struct
+ {
+ uint16_t numStages; /**< number of filter stages. */
+ float32_t *pState; /**< points to the state variable array. The array is of length numStages. */
+ float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */
+ } arm_fir_lattice_instance_f32;
+
+
+ /**
+ * @brief Initialization function for the Q15 FIR lattice filter.
+ * @param[in] S points to an instance of the Q15 FIR lattice structure.
+ * @param[in] numStages number of filter stages.
+ * @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages.
+ * @param[in] pState points to the state buffer. The array is of length numStages.
+ */
+ void arm_fir_lattice_init_q15(
+ arm_fir_lattice_instance_q15 * S,
+ uint16_t numStages,
+ q15_t * pCoeffs,
+ q15_t * pState);
+
+
+ /**
+ * @brief Processing function for the Q15 FIR lattice filter.
+ * @param[in] S points to an instance of the Q15 FIR lattice structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_fir_lattice_q15(
+ const arm_fir_lattice_instance_q15 * S,
+ q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the Q31 FIR lattice filter.
+ * @param[in] S points to an instance of the Q31 FIR lattice structure.
+ * @param[in] numStages number of filter stages.
+ * @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages.
+ * @param[in] pState points to the state buffer. The array is of length numStages.
+ */
+ void arm_fir_lattice_init_q31(
+ arm_fir_lattice_instance_q31 * S,
+ uint16_t numStages,
+ q31_t * pCoeffs,
+ q31_t * pState);
+
+
+ /**
+ * @brief Processing function for the Q31 FIR lattice filter.
+ * @param[in] S points to an instance of the Q31 FIR lattice structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_fir_lattice_q31(
+ const arm_fir_lattice_instance_q31 * S,
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+/**
+ * @brief Initialization function for the floating-point FIR lattice filter.
+ * @param[in] S points to an instance of the floating-point FIR lattice structure.
+ * @param[in] numStages number of filter stages.
+ * @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages.
+ * @param[in] pState points to the state buffer. The array is of length numStages.
+ */
+ void arm_fir_lattice_init_f32(
+ arm_fir_lattice_instance_f32 * S,
+ uint16_t numStages,
+ float32_t * pCoeffs,
+ float32_t * pState);
+
+
+ /**
+ * @brief Processing function for the floating-point FIR lattice filter.
+ * @param[in] S points to an instance of the floating-point FIR lattice structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_fir_lattice_f32(
+ const arm_fir_lattice_instance_f32 * S,
+ float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Instance structure for the Q15 IIR lattice filter.
+ */
+ typedef struct
+ {
+ uint16_t numStages; /**< number of stages in the filter. */
+ q15_t *pState; /**< points to the state variable array. The array is of length numStages + blockSize. */
+ q15_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */
+ q15_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages + 1. */
+ } arm_iir_lattice_instance_q15;
+
+ /**
+ * @brief Instance structure for the Q31 IIR lattice filter.
+ */
+ typedef struct
+ {
+ uint16_t numStages; /**< number of stages in the filter. */
+ q31_t *pState; /**< points to the state variable array. The array is of length numStages + blockSize. */
+ q31_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */
+ q31_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages + 1. */
+ } arm_iir_lattice_instance_q31;
+
+ /**
+ * @brief Instance structure for the floating-point IIR lattice filter.
+ */
+ typedef struct
+ {
+ uint16_t numStages; /**< number of stages in the filter. */
+ float32_t *pState; /**< points to the state variable array. The array is of length numStages + blockSize. */
+ float32_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */
+ float32_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages + 1. */
+ } arm_iir_lattice_instance_f32;
+
+
+ /**
+ * @brief Processing function for the floating-point IIR lattice filter.
+ * @param[in] S points to an instance of the floating-point IIR lattice structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_iir_lattice_f32(
+ const arm_iir_lattice_instance_f32 * S,
+ float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the floating-point IIR lattice filter.
+ * @param[in] S points to an instance of the floating-point IIR lattice structure.
+ * @param[in] numStages number of stages in the filter.
+ * @param[in] pkCoeffs points to the reflection coefficient buffer. The array is of length numStages.
+ * @param[in] pvCoeffs points to the ladder coefficient buffer. The array is of length numStages + 1.
+ * @param[in] pState points to the state buffer. The array is of length numStages + blockSize-1.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_iir_lattice_init_f32(
+ arm_iir_lattice_instance_f32 * S,
+ uint16_t numStages,
+ float32_t * pkCoeffs,
+ float32_t * pvCoeffs,
+ float32_t * pState,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Processing function for the Q31 IIR lattice filter.
+ * @param[in] S points to an instance of the Q31 IIR lattice structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_iir_lattice_q31(
+ const arm_iir_lattice_instance_q31 * S,
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the Q31 IIR lattice filter.
+ * @param[in] S points to an instance of the Q31 IIR lattice structure.
+ * @param[in] numStages number of stages in the filter.
+ * @param[in] pkCoeffs points to the reflection coefficient buffer. The array is of length numStages.
+ * @param[in] pvCoeffs points to the ladder coefficient buffer. The array is of length numStages + 1.
+ * @param[in] pState points to the state buffer. The array is of length numStages + blockSize.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_iir_lattice_init_q31(
+ arm_iir_lattice_instance_q31 * S,
+ uint16_t numStages,
+ q31_t * pkCoeffs,
+ q31_t * pvCoeffs,
+ q31_t * pState,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Processing function for the Q15 IIR lattice filter.
+ * @param[in] S points to an instance of the Q15 IIR lattice structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_iir_lattice_q15(
+ const arm_iir_lattice_instance_q15 * S,
+ q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+
+/**
+ * @brief Initialization function for the Q15 IIR lattice filter.
+ * @param[in] S points to an instance of the fixed-point Q15 IIR lattice structure.
+ * @param[in] numStages number of stages in the filter.
+ * @param[in] pkCoeffs points to reflection coefficient buffer. The array is of length numStages.
+ * @param[in] pvCoeffs points to ladder coefficient buffer. The array is of length numStages + 1.
+ * @param[in] pState points to state buffer. The array is of length numStages + blockSize.
+ * @param[in] blockSize number of samples to process per call.
+ */
+ void arm_iir_lattice_init_q15(
+ arm_iir_lattice_instance_q15 * S,
+ uint16_t numStages,
+ q15_t * pkCoeffs,
+ q15_t * pvCoeffs,
+ q15_t * pState,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Instance structure for the floating-point LMS filter.
+ */
+ typedef struct
+ {
+ uint16_t numTaps; /**< number of coefficients in the filter. */
+ float32_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */
+ float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
+ float32_t mu; /**< step size that controls filter coefficient updates. */
+ } arm_lms_instance_f32;
+
+
+ /**
+ * @brief Processing function for floating-point LMS filter.
+ * @param[in] S points to an instance of the floating-point LMS filter structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[in] pRef points to the block of reference data.
+ * @param[out] pOut points to the block of output data.
+ * @param[out] pErr points to the block of error data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_lms_f32(
+ const arm_lms_instance_f32 * S,
+ float32_t * pSrc,
+ float32_t * pRef,
+ float32_t * pOut,
+ float32_t * pErr,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for floating-point LMS filter.
+ * @param[in] S points to an instance of the floating-point LMS filter structure.
+ * @param[in] numTaps number of filter coefficients.
+ * @param[in] pCoeffs points to the coefficient buffer.
+ * @param[in] pState points to state buffer.
+ * @param[in] mu step size that controls filter coefficient updates.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_lms_init_f32(
+ arm_lms_instance_f32 * S,
+ uint16_t numTaps,
+ float32_t * pCoeffs,
+ float32_t * pState,
+ float32_t mu,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Instance structure for the Q15 LMS filter.
+ */
+ typedef struct
+ {
+ uint16_t numTaps; /**< number of coefficients in the filter. */
+ q15_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */
+ q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
+ q15_t mu; /**< step size that controls filter coefficient updates. */
+ uint32_t postShift; /**< bit shift applied to coefficients. */
+ } arm_lms_instance_q15;
+
+
+ /**
+ * @brief Initialization function for the Q15 LMS filter.
+ * @param[in] S points to an instance of the Q15 LMS filter structure.
+ * @param[in] numTaps number of filter coefficients.
+ * @param[in] pCoeffs points to the coefficient buffer.
+ * @param[in] pState points to the state buffer.
+ * @param[in] mu step size that controls filter coefficient updates.
+ * @param[in] blockSize number of samples to process.
+ * @param[in] postShift bit shift applied to coefficients.
+ */
+ void arm_lms_init_q15(
+ arm_lms_instance_q15 * S,
+ uint16_t numTaps,
+ q15_t * pCoeffs,
+ q15_t * pState,
+ q15_t mu,
+ uint32_t blockSize,
+ uint32_t postShift);
+
+
+ /**
+ * @brief Processing function for Q15 LMS filter.
+ * @param[in] S points to an instance of the Q15 LMS filter structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[in] pRef points to the block of reference data.
+ * @param[out] pOut points to the block of output data.
+ * @param[out] pErr points to the block of error data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_lms_q15(
+ const arm_lms_instance_q15 * S,
+ q15_t * pSrc,
+ q15_t * pRef,
+ q15_t * pOut,
+ q15_t * pErr,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Instance structure for the Q31 LMS filter.
+ */
+ typedef struct
+ {
+ uint16_t numTaps; /**< number of coefficients in the filter. */
+ q31_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */
+ q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
+ q31_t mu; /**< step size that controls filter coefficient updates. */
+ uint32_t postShift; /**< bit shift applied to coefficients. */
+ } arm_lms_instance_q31;
+
+
+ /**
+ * @brief Processing function for Q31 LMS filter.
+ * @param[in] S points to an instance of the Q15 LMS filter structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[in] pRef points to the block of reference data.
+ * @param[out] pOut points to the block of output data.
+ * @param[out] pErr points to the block of error data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_lms_q31(
+ const arm_lms_instance_q31 * S,
+ q31_t * pSrc,
+ q31_t * pRef,
+ q31_t * pOut,
+ q31_t * pErr,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for Q31 LMS filter.
+ * @param[in] S points to an instance of the Q31 LMS filter structure.
+ * @param[in] numTaps number of filter coefficients.
+ * @param[in] pCoeffs points to coefficient buffer.
+ * @param[in] pState points to state buffer.
+ * @param[in] mu step size that controls filter coefficient updates.
+ * @param[in] blockSize number of samples to process.
+ * @param[in] postShift bit shift applied to coefficients.
+ */
+ void arm_lms_init_q31(
+ arm_lms_instance_q31 * S,
+ uint16_t numTaps,
+ q31_t * pCoeffs,
+ q31_t * pState,
+ q31_t mu,
+ uint32_t blockSize,
+ uint32_t postShift);
+
+
+ /**
+ * @brief Instance structure for the floating-point normalized LMS filter.
+ */
+ typedef struct
+ {
+ uint16_t numTaps; /**< number of coefficients in the filter. */
+ float32_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */
+ float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
+ float32_t mu; /**< step size that control filter coefficient updates. */
+ float32_t energy; /**< saves previous frame energy. */
+ float32_t x0; /**< saves previous input sample. */
+ } arm_lms_norm_instance_f32;
+
+
+ /**
+ * @brief Processing function for floating-point normalized LMS filter.
+ * @param[in] S points to an instance of the floating-point normalized LMS filter structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[in] pRef points to the block of reference data.
+ * @param[out] pOut points to the block of output data.
+ * @param[out] pErr points to the block of error data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_lms_norm_f32(
+ arm_lms_norm_instance_f32 * S,
+ float32_t * pSrc,
+ float32_t * pRef,
+ float32_t * pOut,
+ float32_t * pErr,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for floating-point normalized LMS filter.
+ * @param[in] S points to an instance of the floating-point LMS filter structure.
+ * @param[in] numTaps number of filter coefficients.
+ * @param[in] pCoeffs points to coefficient buffer.
+ * @param[in] pState points to state buffer.
+ * @param[in] mu step size that controls filter coefficient updates.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_lms_norm_init_f32(
+ arm_lms_norm_instance_f32 * S,
+ uint16_t numTaps,
+ float32_t * pCoeffs,
+ float32_t * pState,
+ float32_t mu,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Instance structure for the Q31 normalized LMS filter.
+ */
+ typedef struct
+ {
+ uint16_t numTaps; /**< number of coefficients in the filter. */
+ q31_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */
+ q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
+ q31_t mu; /**< step size that controls filter coefficient updates. */
+ uint8_t postShift; /**< bit shift applied to coefficients. */
+ q31_t *recipTable; /**< points to the reciprocal initial value table. */
+ q31_t energy; /**< saves previous frame energy. */
+ q31_t x0; /**< saves previous input sample. */
+ } arm_lms_norm_instance_q31;
+
+
+ /**
+ * @brief Processing function for Q31 normalized LMS filter.
+ * @param[in] S points to an instance of the Q31 normalized LMS filter structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[in] pRef points to the block of reference data.
+ * @param[out] pOut points to the block of output data.
+ * @param[out] pErr points to the block of error data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_lms_norm_q31(
+ arm_lms_norm_instance_q31 * S,
+ q31_t * pSrc,
+ q31_t * pRef,
+ q31_t * pOut,
+ q31_t * pErr,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for Q31 normalized LMS filter.
+ * @param[in] S points to an instance of the Q31 normalized LMS filter structure.
+ * @param[in] numTaps number of filter coefficients.
+ * @param[in] pCoeffs points to coefficient buffer.
+ * @param[in] pState points to state buffer.
+ * @param[in] mu step size that controls filter coefficient updates.
+ * @param[in] blockSize number of samples to process.
+ * @param[in] postShift bit shift applied to coefficients.
+ */
+ void arm_lms_norm_init_q31(
+ arm_lms_norm_instance_q31 * S,
+ uint16_t numTaps,
+ q31_t * pCoeffs,
+ q31_t * pState,
+ q31_t mu,
+ uint32_t blockSize,
+ uint8_t postShift);
+
+
+ /**
+ * @brief Instance structure for the Q15 normalized LMS filter.
+ */
+ typedef struct
+ {
+ uint16_t numTaps; /**< Number of coefficients in the filter. */
+ q15_t *pState; /**< points to the state variable array. The array is of length numTaps + blockSize-1. */
+ q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
+ q15_t mu; /**< step size that controls filter coefficient updates. */
+ uint8_t postShift; /**< bit shift applied to coefficients. */
+ q15_t *recipTable; /**< Points to the reciprocal initial value table. */
+ q15_t energy; /**< saves previous frame energy. */
+ q15_t x0; /**< saves previous input sample. */
+ } arm_lms_norm_instance_q15;
+
+
+ /**
+ * @brief Processing function for Q15 normalized LMS filter.
+ * @param[in] S points to an instance of the Q15 normalized LMS filter structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[in] pRef points to the block of reference data.
+ * @param[out] pOut points to the block of output data.
+ * @param[out] pErr points to the block of error data.
+ * @param[in] blockSize number of samples to process.
+ */
+ void arm_lms_norm_q15(
+ arm_lms_norm_instance_q15 * S,
+ q15_t * pSrc,
+ q15_t * pRef,
+ q15_t * pOut,
+ q15_t * pErr,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for Q15 normalized LMS filter.
+ * @param[in] S points to an instance of the Q15 normalized LMS filter structure.
+ * @param[in] numTaps number of filter coefficients.
+ * @param[in] pCoeffs points to coefficient buffer.
+ * @param[in] pState points to state buffer.
+ * @param[in] mu step size that controls filter coefficient updates.
+ * @param[in] blockSize number of samples to process.
+ * @param[in] postShift bit shift applied to coefficients.
+ */
+ void arm_lms_norm_init_q15(
+ arm_lms_norm_instance_q15 * S,
+ uint16_t numTaps,
+ q15_t * pCoeffs,
+ q15_t * pState,
+ q15_t mu,
+ uint32_t blockSize,
+ uint8_t postShift);
+
+
+ /**
+ * @brief Correlation of floating-point sequences.
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
+ */
+ void arm_correlate_f32(
+ float32_t * pSrcA,
+ uint32_t srcALen,
+ float32_t * pSrcB,
+ uint32_t srcBLen,
+ float32_t * pDst);
+
+
+ /**
+ * @brief Correlation of Q15 sequences
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
+ * @param[in] pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+ */
+ void arm_correlate_opt_q15(
+ q15_t * pSrcA,
+ uint32_t srcALen,
+ q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst,
+ q15_t * pScratch);
+
+
+ /**
+ * @brief Correlation of Q15 sequences.
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
+ */
+
+ void arm_correlate_q15(
+ q15_t * pSrcA,
+ uint32_t srcALen,
+ q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst);
+
+
+ /**
+ * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
+ */
+
+ void arm_correlate_fast_q15(
+ q15_t * pSrcA,
+ uint32_t srcALen,
+ q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst);
+
+
+ /**
+ * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
+ * @param[in] pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+ */
+ void arm_correlate_fast_opt_q15(
+ q15_t * pSrcA,
+ uint32_t srcALen,
+ q15_t * pSrcB,
+ uint32_t srcBLen,
+ q15_t * pDst,
+ q15_t * pScratch);
+
+
+ /**
+ * @brief Correlation of Q31 sequences.
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
+ */
+ void arm_correlate_q31(
+ q31_t * pSrcA,
+ uint32_t srcALen,
+ q31_t * pSrcB,
+ uint32_t srcBLen,
+ q31_t * pDst);
+
+
+ /**
+ * @brief Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
+ */
+ void arm_correlate_fast_q31(
+ q31_t * pSrcA,
+ uint32_t srcALen,
+ q31_t * pSrcB,
+ uint32_t srcBLen,
+ q31_t * pDst);
+
+
+ /**
+ * @brief Correlation of Q7 sequences.
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
+ * @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+ * @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+ */
+ void arm_correlate_opt_q7(
+ q7_t * pSrcA,
+ uint32_t srcALen,
+ q7_t * pSrcB,
+ uint32_t srcBLen,
+ q7_t * pDst,
+ q15_t * pScratch1,
+ q15_t * pScratch2);
+
+
+ /**
+ * @brief Correlation of Q7 sequences.
+ * @param[in] pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
+ */
+ void arm_correlate_q7(
+ q7_t * pSrcA,
+ uint32_t srcALen,
+ q7_t * pSrcB,
+ uint32_t srcBLen,
+ q7_t * pDst);
+
+
+ /**
+ * @brief Instance structure for the floating-point sparse FIR filter.
+ */
+ typedef struct
+ {
+ uint16_t numTaps; /**< number of coefficients in the filter. */
+ uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */
+ float32_t *pState; /**< points to the state buffer array. The array is of length maxDelay + blockSize-1. */
+ float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
+ uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */
+ int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */
+ } arm_fir_sparse_instance_f32;
+
+ /**
+ * @brief Instance structure for the Q31 sparse FIR filter.
+ */
+ typedef struct
+ {
+ uint16_t numTaps; /**< number of coefficients in the filter. */
+ uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */
+ q31_t *pState; /**< points to the state buffer array. The array is of length maxDelay + blockSize-1. */
+ q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
+ uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */
+ int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */
+ } arm_fir_sparse_instance_q31;
+
+ /**
+ * @brief Instance structure for the Q15 sparse FIR filter.
+ */
+ typedef struct
+ {
+ uint16_t numTaps; /**< number of coefficients in the filter. */
+ uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */
+ q15_t *pState; /**< points to the state buffer array. The array is of length maxDelay + blockSize-1. */
+ q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
+ uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */
+ int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */
+ } arm_fir_sparse_instance_q15;
+
+ /**
+ * @brief Instance structure for the Q7 sparse FIR filter.
+ */
+ typedef struct
+ {
+ uint16_t numTaps; /**< number of coefficients in the filter. */
+ uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */
+ q7_t *pState; /**< points to the state buffer array. The array is of length maxDelay + blockSize-1. */
+ q7_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
+ uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */
+ int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */
+ } arm_fir_sparse_instance_q7;
+
+
+ /**
+ * @brief Processing function for the floating-point sparse FIR filter.
+ * @param[in] S points to an instance of the floating-point sparse FIR structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data
+ * @param[in] pScratchIn points to a temporary buffer of size blockSize.
+ * @param[in] blockSize number of input samples to process per call.
+ */
+ void arm_fir_sparse_f32(
+ arm_fir_sparse_instance_f32 * S,
+ float32_t * pSrc,
+ float32_t * pDst,
+ float32_t * pScratchIn,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the floating-point sparse FIR filter.
+ * @param[in,out] S points to an instance of the floating-point sparse FIR structure.
+ * @param[in] numTaps number of nonzero coefficients in the filter.
+ * @param[in] pCoeffs points to the array of filter coefficients.
+ * @param[in] pState points to the state buffer.
+ * @param[in] pTapDelay points to the array of offset times.
+ * @param[in] maxDelay maximum offset time supported.
+ * @param[in] blockSize number of samples that will be processed per block.
+ */
+ void arm_fir_sparse_init_f32(
+ arm_fir_sparse_instance_f32 * S,
+ uint16_t numTaps,
+ float32_t * pCoeffs,
+ float32_t * pState,
+ int32_t * pTapDelay,
+ uint16_t maxDelay,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Processing function for the Q31 sparse FIR filter.
+ * @param[in] S points to an instance of the Q31 sparse FIR structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data
+ * @param[in] pScratchIn points to a temporary buffer of size blockSize.
+ * @param[in] blockSize number of input samples to process per call.
+ */
+ void arm_fir_sparse_q31(
+ arm_fir_sparse_instance_q31 * S,
+ q31_t * pSrc,
+ q31_t * pDst,
+ q31_t * pScratchIn,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the Q31 sparse FIR filter.
+ * @param[in,out] S points to an instance of the Q31 sparse FIR structure.
+ * @param[in] numTaps number of nonzero coefficients in the filter.
+ * @param[in] pCoeffs points to the array of filter coefficients.
+ * @param[in] pState points to the state buffer.
+ * @param[in] pTapDelay points to the array of offset times.
+ * @param[in] maxDelay maximum offset time supported.
+ * @param[in] blockSize number of samples that will be processed per block.
+ */
+ void arm_fir_sparse_init_q31(
+ arm_fir_sparse_instance_q31 * S,
+ uint16_t numTaps,
+ q31_t * pCoeffs,
+ q31_t * pState,
+ int32_t * pTapDelay,
+ uint16_t maxDelay,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Processing function for the Q15 sparse FIR filter.
+ * @param[in] S points to an instance of the Q15 sparse FIR structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data
+ * @param[in] pScratchIn points to a temporary buffer of size blockSize.
+ * @param[in] pScratchOut points to a temporary buffer of size blockSize.
+ * @param[in] blockSize number of input samples to process per call.
+ */
+ void arm_fir_sparse_q15(
+ arm_fir_sparse_instance_q15 * S,
+ q15_t * pSrc,
+ q15_t * pDst,
+ q15_t * pScratchIn,
+ q31_t * pScratchOut,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the Q15 sparse FIR filter.
+ * @param[in,out] S points to an instance of the Q15 sparse FIR structure.
+ * @param[in] numTaps number of nonzero coefficients in the filter.
+ * @param[in] pCoeffs points to the array of filter coefficients.
+ * @param[in] pState points to the state buffer.
+ * @param[in] pTapDelay points to the array of offset times.
+ * @param[in] maxDelay maximum offset time supported.
+ * @param[in] blockSize number of samples that will be processed per block.
+ */
+ void arm_fir_sparse_init_q15(
+ arm_fir_sparse_instance_q15 * S,
+ uint16_t numTaps,
+ q15_t * pCoeffs,
+ q15_t * pState,
+ int32_t * pTapDelay,
+ uint16_t maxDelay,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Processing function for the Q7 sparse FIR filter.
+ * @param[in] S points to an instance of the Q7 sparse FIR structure.
+ * @param[in] pSrc points to the block of input data.
+ * @param[out] pDst points to the block of output data
+ * @param[in] pScratchIn points to a temporary buffer of size blockSize.
+ * @param[in] pScratchOut points to a temporary buffer of size blockSize.
+ * @param[in] blockSize number of input samples to process per call.
+ */
+ void arm_fir_sparse_q7(
+ arm_fir_sparse_instance_q7 * S,
+ q7_t * pSrc,
+ q7_t * pDst,
+ q7_t * pScratchIn,
+ q31_t * pScratchOut,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Initialization function for the Q7 sparse FIR filter.
+ * @param[in,out] S points to an instance of the Q7 sparse FIR structure.
+ * @param[in] numTaps number of nonzero coefficients in the filter.
+ * @param[in] pCoeffs points to the array of filter coefficients.
+ * @param[in] pState points to the state buffer.
+ * @param[in] pTapDelay points to the array of offset times.
+ * @param[in] maxDelay maximum offset time supported.
+ * @param[in] blockSize number of samples that will be processed per block.
+ */
+ void arm_fir_sparse_init_q7(
+ arm_fir_sparse_instance_q7 * S,
+ uint16_t numTaps,
+ q7_t * pCoeffs,
+ q7_t * pState,
+ int32_t * pTapDelay,
+ uint16_t maxDelay,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Floating-point sin_cos function.
+ * @param[in] theta input value in degrees
+ * @param[out] pSinVal points to the processed sine output.
+ * @param[out] pCosVal points to the processed cos output.
+ */
+ void arm_sin_cos_f32(
+ float32_t theta,
+ float32_t * pSinVal,
+ float32_t * pCosVal);
+
+
+ /**
+ * @brief Q31 sin_cos function.
+ * @param[in] theta scaled input value in degrees
+ * @param[out] pSinVal points to the processed sine output.
+ * @param[out] pCosVal points to the processed cosine output.
+ */
+ void arm_sin_cos_q31(
+ q31_t theta,
+ q31_t * pSinVal,
+ q31_t * pCosVal);
+
+
+ /**
+ * @brief Floating-point complex conjugate.
+ * @param[in] pSrc points to the input vector
+ * @param[out] pDst points to the output vector
+ * @param[in] numSamples number of complex samples in each vector
+ */
+ void arm_cmplx_conj_f32(
+ float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t numSamples);
+
+ /**
+ * @brief Q31 complex conjugate.
+ * @param[in] pSrc points to the input vector
+ * @param[out] pDst points to the output vector
+ * @param[in] numSamples number of complex samples in each vector
+ */
+ void arm_cmplx_conj_q31(
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t numSamples);
+
+
+ /**
+ * @brief Q15 complex conjugate.
+ * @param[in] pSrc points to the input vector
+ * @param[out] pDst points to the output vector
+ * @param[in] numSamples number of complex samples in each vector
+ */
+ void arm_cmplx_conj_q15(
+ q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t numSamples);
+
+
+ /**
+ * @brief Floating-point complex magnitude squared
+ * @param[in] pSrc points to the complex input vector
+ * @param[out] pDst points to the real output vector
+ * @param[in] numSamples number of complex samples in the input vector
+ */
+ void arm_cmplx_mag_squared_f32(
+ float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t numSamples);
+
+
+ /**
+ * @brief Q31 complex magnitude squared
+ * @param[in] pSrc points to the complex input vector
+ * @param[out] pDst points to the real output vector
+ * @param[in] numSamples number of complex samples in the input vector
+ */
+ void arm_cmplx_mag_squared_q31(
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t numSamples);
+
+
+ /**
+ * @brief Q15 complex magnitude squared
+ * @param[in] pSrc points to the complex input vector
+ * @param[out] pDst points to the real output vector
+ * @param[in] numSamples number of complex samples in the input vector
+ */
+ void arm_cmplx_mag_squared_q15(
+ q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t numSamples);
+
+
+ /**
+ * @ingroup groupController
+ */
+
+ /**
+ * @defgroup PID PID Motor Control
+ *
+ * A Proportional Integral Derivative (PID) controller is a generic feedback control
+ * loop mechanism widely used in industrial control systems.
+ * A PID controller is the most commonly used type of feedback controller.
+ *
+ * This set of functions implements (PID) controllers
+ * for Q15, Q31, and floating-point data types. The functions operate on a single sample
+ * of data and each call to the function returns a single processed value.
+ * <code>S</code> points to an instance of the PID control data structure. <code>in</code>
+ * is the input sample value. The functions return the output value.
+ *
+ * \par Algorithm:
+ * <pre>
+ * y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]
+ * A0 = Kp + Ki + Kd
+ * A1 = (-Kp ) - (2 * Kd )
+ * A2 = Kd </pre>
+ *
+ * \par
+ * where \c Kp is proportional constant, \c Ki is Integral constant and \c Kd is Derivative constant
+ *
+ * \par
+ * \image html PID.gif "Proportional Integral Derivative Controller"
+ *
+ * \par
+ * The PID controller calculates an "error" value as the difference between
+ * the measured output and the reference input.
+ * The controller attempts to minimize the error by adjusting the process control inputs.
+ * The proportional value determines the reaction to the current error,
+ * the integral value determines the reaction based on the sum of recent errors,
+ * and the derivative value determines the reaction based on the rate at which the error has been changing.
+ *
+ * \par Instance Structure
+ * The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure.
+ * A separate instance structure must be defined for each PID Controller.
+ * There are separate instance structure declarations for each of the 3 supported data types.
+ *
+ * \par Reset Functions
+ * There is also an associated reset function for each data type which clears the state array.
+ *
+ * \par Initialization Functions
+ * There is also an associated initialization function for each data type.
+ * The initialization function performs the following operations:
+ * - Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains.
+ * - Zeros out the values in the state buffer.
+ *
+ * \par
+ * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
+ *
+ * \par Fixed-Point Behavior
+ * Care must be taken when using the fixed-point versions of the PID Controller functions.
+ * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+ * Refer to the function specific documentation below for usage guidelines.
+ */
+
+ /**
+ * @addtogroup PID
+ * @{
+ */
+
+ /**
+ * @brief Process function for the floating-point PID Control.
+ * @param[in,out] S is an instance of the floating-point PID Control structure
+ * @param[in] in input sample to process
+ * @return out processed output sample.
+ */
+ static __INLINE float32_t arm_pid_f32(
+ arm_pid_instance_f32 * S,
+ float32_t in)
+ {
+ float32_t out;
+
+ /* y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2] */
+ out = (S->A0 * in) +
+ (S->A1 * S->state[0]) + (S->A2 * S->state[1]) + (S->state[2]);
+
+ /* Update state */
+ S->state[1] = S->state[0];
+ S->state[0] = in;
+ S->state[2] = out;
+
+ /* return to application */
+ return (out);
+
+ }
+
+ /**
+ * @brief Process function for the Q31 PID Control.
+ * @param[in,out] S points to an instance of the Q31 PID Control structure
+ * @param[in] in input sample to process
+ * @return out processed output sample.
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function is implemented using an internal 64-bit accumulator.
+ * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+ * Thus, if the accumulator result overflows it wraps around rather than clip.
+ * In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions.
+ * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
+ */
+ static __INLINE q31_t arm_pid_q31(
+ arm_pid_instance_q31 * S,
+ q31_t in)
+ {
+ q63_t acc;
+ q31_t out;
+
+ /* acc = A0 * x[n] */
+ acc = (q63_t) S->A0 * in;
+
+ /* acc += A1 * x[n-1] */
+ acc += (q63_t) S->A1 * S->state[0];
+
+ /* acc += A2 * x[n-2] */
+ acc += (q63_t) S->A2 * S->state[1];
+
+ /* convert output to 1.31 format to add y[n-1] */
+ out = (q31_t) (acc >> 31u);
+
+ /* out += y[n-1] */
+ out += S->state[2];
+
+ /* Update state */
+ S->state[1] = S->state[0];
+ S->state[0] = in;
+ S->state[2] = out;
+
+ /* return to application */
+ return (out);
+ }
+
+
+ /**
+ * @brief Process function for the Q15 PID Control.
+ * @param[in,out] S points to an instance of the Q15 PID Control structure
+ * @param[in] in input sample to process
+ * @return out processed output sample.
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function is implemented using a 64-bit internal accumulator.
+ * Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+ * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+ * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+ * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+ * Lastly, the accumulator is saturated to yield a result in 1.15 format.
+ */
+ static __INLINE q15_t arm_pid_q15(
+ arm_pid_instance_q15 * S,
+ q15_t in)
+ {
+ q63_t acc;
+ q15_t out;
+
+#ifndef ARM_MATH_CM0_FAMILY
+ __SIMD32_TYPE *vstate;
+
+ /* Implementation of PID controller */
+
+ /* acc = A0 * x[n] */
+ acc = (q31_t) __SMUAD((uint32_t)S->A0, (uint32_t)in);
+
+ /* acc += A1 * x[n-1] + A2 * x[n-2] */
+ vstate = __SIMD32_CONST(S->state);
+ acc = (q63_t)__SMLALD((uint32_t)S->A1, (uint32_t)*vstate, (uint64_t)acc);
+#else
+ /* acc = A0 * x[n] */
+ acc = ((q31_t) S->A0) * in;
+
+ /* acc += A1 * x[n-1] + A2 * x[n-2] */
+ acc += (q31_t) S->A1 * S->state[0];
+ acc += (q31_t) S->A2 * S->state[1];
+#endif
+
+ /* acc += y[n-1] */
+ acc += (q31_t) S->state[2] << 15;
+
+ /* saturate the output */
+ out = (q15_t) (__SSAT((acc >> 15), 16));
+
+ /* Update state */
+ S->state[1] = S->state[0];
+ S->state[0] = in;
+ S->state[2] = out;
+
+ /* return to application */
+ return (out);
+ }
+
+ /**
+ * @} end of PID group
+ */
+
+
+ /**
+ * @brief Floating-point matrix inverse.
+ * @param[in] src points to the instance of the input floating-point matrix structure.
+ * @param[out] dst points to the instance of the output floating-point matrix structure.
+ * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
+ * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR.
+ */
+ arm_status arm_mat_inverse_f32(
+ const arm_matrix_instance_f32 * src,
+ arm_matrix_instance_f32 * dst);
+
+
+ /**
+ * @brief Floating-point matrix inverse.
+ * @param[in] src points to the instance of the input floating-point matrix structure.
+ * @param[out] dst points to the instance of the output floating-point matrix structure.
+ * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
+ * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR.
+ */
+ arm_status arm_mat_inverse_f64(
+ const arm_matrix_instance_f64 * src,
+ arm_matrix_instance_f64 * dst);
+
+
+
+ /**
+ * @ingroup groupController
+ */
+
+ /**
+ * @defgroup clarke Vector Clarke Transform
+ * Forward Clarke transform converts the instantaneous stator phases into a two-coordinate time invariant vector.
+ * Generally the Clarke transform uses three-phase currents <code>Ia, Ib and Ic</code> to calculate currents
+ * in the two-phase orthogonal stator axis <code>Ialpha</code> and <code>Ibeta</code>.
+ * When <code>Ialpha</code> is superposed with <code>Ia</code> as shown in the figure below
+ * \image html clarke.gif Stator current space vector and its components in (a,b).
+ * and <code>Ia + Ib + Ic = 0</code>, in this condition <code>Ialpha</code> and <code>Ibeta</code>
+ * can be calculated using only <code>Ia</code> and <code>Ib</code>.
+ *
+ * The function operates on a single sample of data and each call to the function returns the processed output.
+ * The library provides separate functions for Q31 and floating-point data types.
+ * \par Algorithm
+ * \image html clarkeFormula.gif
+ * where <code>Ia</code> and <code>Ib</code> are the instantaneous stator phases and
+ * <code>pIalpha</code> and <code>pIbeta</code> are the two coordinates of time invariant vector.
+ * \par Fixed-Point Behavior
+ * Care must be taken when using the Q31 version of the Clarke transform.
+ * In particular, the overflow and saturation behavior of the accumulator used must be considered.
+ * Refer to the function specific documentation below for usage guidelines.
+ */
+
+ /**
+ * @addtogroup clarke
+ * @{
+ */
+
+ /**
+ *
+ * @brief Floating-point Clarke transform
+ * @param[in] Ia input three-phase coordinate <code>a</code>
+ * @param[in] Ib input three-phase coordinate <code>b</code>
+ * @param[out] pIalpha points to output two-phase orthogonal vector axis alpha
+ * @param[out] pIbeta points to output two-phase orthogonal vector axis beta
+ */
+ static __INLINE void arm_clarke_f32(
+ float32_t Ia,
+ float32_t Ib,
+ float32_t * pIalpha,
+ float32_t * pIbeta)
+ {
+ /* Calculate pIalpha using the equation, pIalpha = Ia */
+ *pIalpha = Ia;
+
+ /* Calculate pIbeta using the equation, pIbeta = (1/sqrt(3)) * Ia + (2/sqrt(3)) * Ib */
+ *pIbeta = ((float32_t) 0.57735026919 * Ia + (float32_t) 1.15470053838 * Ib);
+ }
+
+
+ /**
+ * @brief Clarke transform for Q31 version
+ * @param[in] Ia input three-phase coordinate <code>a</code>
+ * @param[in] Ib input three-phase coordinate <code>b</code>
+ * @param[out] pIalpha points to output two-phase orthogonal vector axis alpha
+ * @param[out] pIbeta points to output two-phase orthogonal vector axis beta
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function is implemented using an internal 32-bit accumulator.
+ * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
+ * There is saturation on the addition, hence there is no risk of overflow.
+ */
+ static __INLINE void arm_clarke_q31(
+ q31_t Ia,
+ q31_t Ib,
+ q31_t * pIalpha,
+ q31_t * pIbeta)
+ {
+ q31_t product1, product2; /* Temporary variables used to store intermediate results */
+
+ /* Calculating pIalpha from Ia by equation pIalpha = Ia */
+ *pIalpha = Ia;
+
+ /* Intermediate product is calculated by (1/(sqrt(3)) * Ia) */
+ product1 = (q31_t) (((q63_t) Ia * 0x24F34E8B) >> 30);
+
+ /* Intermediate product is calculated by (2/sqrt(3) * Ib) */
+ product2 = (q31_t) (((q63_t) Ib * 0x49E69D16) >> 30);
+
+ /* pIbeta is calculated by adding the intermediate products */
+ *pIbeta = __QADD(product1, product2);
+ }
+
+ /**
+ * @} end of clarke group
+ */
+
+ /**
+ * @brief Converts the elements of the Q7 vector to Q31 vector.
+ * @param[in] pSrc input pointer
+ * @param[out] pDst output pointer
+ * @param[in] blockSize number of samples to process
+ */
+ void arm_q7_to_q31(
+ q7_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+
+ /**
+ * @ingroup groupController
+ */
+
+ /**
+ * @defgroup inv_clarke Vector Inverse Clarke Transform
+ * Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases.
+ *
+ * The function operates on a single sample of data and each call to the function returns the processed output.
+ * The library provides separate functions for Q31 and floating-point data types.
+ * \par Algorithm
+ * \image html clarkeInvFormula.gif
+ * where <code>pIa</code> and <code>pIb</code> are the instantaneous stator phases and
+ * <code>Ialpha</code> and <code>Ibeta</code> are the two coordinates of time invariant vector.
+ * \par Fixed-Point Behavior
+ * Care must be taken when using the Q31 version of the Clarke transform.
+ * In particular, the overflow and saturation behavior of the accumulator used must be considered.
+ * Refer to the function specific documentation below for usage guidelines.
+ */
+
+ /**
+ * @addtogroup inv_clarke
+ * @{
+ */
+
+ /**
+ * @brief Floating-point Inverse Clarke transform
+ * @param[in] Ialpha input two-phase orthogonal vector axis alpha
+ * @param[in] Ibeta input two-phase orthogonal vector axis beta
+ * @param[out] pIa points to output three-phase coordinate <code>a</code>
+ * @param[out] pIb points to output three-phase coordinate <code>b</code>
+ */
+ static __INLINE void arm_inv_clarke_f32(
+ float32_t Ialpha,
+ float32_t Ibeta,
+ float32_t * pIa,
+ float32_t * pIb)
+ {
+ /* Calculating pIa from Ialpha by equation pIa = Ialpha */
+ *pIa = Ialpha;
+
+ /* Calculating pIb from Ialpha and Ibeta by equation pIb = -(1/2) * Ialpha + (sqrt(3)/2) * Ibeta */
+ *pIb = -0.5f * Ialpha + 0.8660254039f * Ibeta;
+ }
+
+
+ /**
+ * @brief Inverse Clarke transform for Q31 version
+ * @param[in] Ialpha input two-phase orthogonal vector axis alpha
+ * @param[in] Ibeta input two-phase orthogonal vector axis beta
+ * @param[out] pIa points to output three-phase coordinate <code>a</code>
+ * @param[out] pIb points to output three-phase coordinate <code>b</code>
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function is implemented using an internal 32-bit accumulator.
+ * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
+ * There is saturation on the subtraction, hence there is no risk of overflow.
+ */
+ static __INLINE void arm_inv_clarke_q31(
+ q31_t Ialpha,
+ q31_t Ibeta,
+ q31_t * pIa,
+ q31_t * pIb)
+ {
+ q31_t product1, product2; /* Temporary variables used to store intermediate results */
+
+ /* Calculating pIa from Ialpha by equation pIa = Ialpha */
+ *pIa = Ialpha;
+
+ /* Intermediate product is calculated by (1/(2*sqrt(3)) * Ia) */
+ product1 = (q31_t) (((q63_t) (Ialpha) * (0x40000000)) >> 31);
+
+ /* Intermediate product is calculated by (1/sqrt(3) * pIb) */
+ product2 = (q31_t) (((q63_t) (Ibeta) * (0x6ED9EBA1)) >> 31);
+
+ /* pIb is calculated by subtracting the products */
+ *pIb = __QSUB(product2, product1);
+ }
+
+ /**
+ * @} end of inv_clarke group
+ */
+
+ /**
+ * @brief Converts the elements of the Q7 vector to Q15 vector.
+ * @param[in] pSrc input pointer
+ * @param[out] pDst output pointer
+ * @param[in] blockSize number of samples to process
+ */
+ void arm_q7_to_q15(
+ q7_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+
+
+ /**
+ * @ingroup groupController
+ */
+
+ /**
+ * @defgroup park Vector Park Transform
+ *
+ * Forward Park transform converts the input two-coordinate vector to flux and torque components.
+ * The Park transform can be used to realize the transformation of the <code>Ialpha</code> and the <code>Ibeta</code> currents
+ * from the stationary to the moving reference frame and control the spatial relationship between
+ * the stator vector current and rotor flux vector.
+ * If we consider the d axis aligned with the rotor flux, the diagram below shows the
+ * current vector and the relationship from the two reference frames:
+ * \image html park.gif "Stator current space vector and its component in (a,b) and in the d,q rotating reference frame"
+ *
+ * The function operates on a single sample of data and each call to the function returns the processed output.
+ * The library provides separate functions for Q31 and floating-point data types.
+ * \par Algorithm
+ * \image html parkFormula.gif
+ * where <code>Ialpha</code> and <code>Ibeta</code> are the stator vector components,
+ * <code>pId</code> and <code>pIq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the
+ * cosine and sine values of theta (rotor flux position).
+ * \par Fixed-Point Behavior
+ * Care must be taken when using the Q31 version of the Park transform.
+ * In particular, the overflow and saturation behavior of the accumulator used must be considered.
+ * Refer to the function specific documentation below for usage guidelines.
+ */
+
+ /**
+ * @addtogroup park
+ * @{
+ */
+
+ /**
+ * @brief Floating-point Park transform
+ * @param[in] Ialpha input two-phase vector coordinate alpha
+ * @param[in] Ibeta input two-phase vector coordinate beta
+ * @param[out] pId points to output rotor reference frame d
+ * @param[out] pIq points to output rotor reference frame q
+ * @param[in] sinVal sine value of rotation angle theta
+ * @param[in] cosVal cosine value of rotation angle theta
+ *
+ * The function implements the forward Park transform.
+ *
+ */
+ static __INLINE void arm_park_f32(
+ float32_t Ialpha,
+ float32_t Ibeta,
+ float32_t * pId,
+ float32_t * pIq,
+ float32_t sinVal,
+ float32_t cosVal)
+ {
+ /* Calculate pId using the equation, pId = Ialpha * cosVal + Ibeta * sinVal */
+ *pId = Ialpha * cosVal + Ibeta * sinVal;
+
+ /* Calculate pIq using the equation, pIq = - Ialpha * sinVal + Ibeta * cosVal */
+ *pIq = -Ialpha * sinVal + Ibeta * cosVal;
+ }
+
+
+ /**
+ * @brief Park transform for Q31 version
+ * @param[in] Ialpha input two-phase vector coordinate alpha
+ * @param[in] Ibeta input two-phase vector coordinate beta
+ * @param[out] pId points to output rotor reference frame d
+ * @param[out] pIq points to output rotor reference frame q
+ * @param[in] sinVal sine value of rotation angle theta
+ * @param[in] cosVal cosine value of rotation angle theta
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function is implemented using an internal 32-bit accumulator.
+ * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
+ * There is saturation on the addition and subtraction, hence there is no risk of overflow.
+ */
+ static __INLINE void arm_park_q31(
+ q31_t Ialpha,
+ q31_t Ibeta,
+ q31_t * pId,
+ q31_t * pIq,
+ q31_t sinVal,
+ q31_t cosVal)
+ {
+ q31_t product1, product2; /* Temporary variables used to store intermediate results */
+ q31_t product3, product4; /* Temporary variables used to store intermediate results */
+
+ /* Intermediate product is calculated by (Ialpha * cosVal) */
+ product1 = (q31_t) (((q63_t) (Ialpha) * (cosVal)) >> 31);
+
+ /* Intermediate product is calculated by (Ibeta * sinVal) */
+ product2 = (q31_t) (((q63_t) (Ibeta) * (sinVal)) >> 31);
+
+
+ /* Intermediate product is calculated by (Ialpha * sinVal) */
+ product3 = (q31_t) (((q63_t) (Ialpha) * (sinVal)) >> 31);
+
+ /* Intermediate product is calculated by (Ibeta * cosVal) */
+ product4 = (q31_t) (((q63_t) (Ibeta) * (cosVal)) >> 31);
+
+ /* Calculate pId by adding the two intermediate products 1 and 2 */
+ *pId = __QADD(product1, product2);
+
+ /* Calculate pIq by subtracting the two intermediate products 3 from 4 */
+ *pIq = __QSUB(product4, product3);
+ }
+
+ /**
+ * @} end of park group
+ */
+
+ /**
+ * @brief Converts the elements of the Q7 vector to floating-point vector.
+ * @param[in] pSrc is input pointer
+ * @param[out] pDst is output pointer
+ * @param[in] blockSize is the number of samples to process
+ */
+ void arm_q7_to_float(
+ q7_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @ingroup groupController
+ */
+
+ /**
+ * @defgroup inv_park Vector Inverse Park transform
+ * Inverse Park transform converts the input flux and torque components to two-coordinate vector.
+ *
+ * The function operates on a single sample of data and each call to the function returns the processed output.
+ * The library provides separate functions for Q31 and floating-point data types.
+ * \par Algorithm
+ * \image html parkInvFormula.gif
+ * where <code>pIalpha</code> and <code>pIbeta</code> are the stator vector components,
+ * <code>Id</code> and <code>Iq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the
+ * cosine and sine values of theta (rotor flux position).
+ * \par Fixed-Point Behavior
+ * Care must be taken when using the Q31 version of the Park transform.
+ * In particular, the overflow and saturation behavior of the accumulator used must be considered.
+ * Refer to the function specific documentation below for usage guidelines.
+ */
+
+ /**
+ * @addtogroup inv_park
+ * @{
+ */
+
+ /**
+ * @brief Floating-point Inverse Park transform
+ * @param[in] Id input coordinate of rotor reference frame d
+ * @param[in] Iq input coordinate of rotor reference frame q
+ * @param[out] pIalpha points to output two-phase orthogonal vector axis alpha
+ * @param[out] pIbeta points to output two-phase orthogonal vector axis beta
+ * @param[in] sinVal sine value of rotation angle theta
+ * @param[in] cosVal cosine value of rotation angle theta
+ */
+ static __INLINE void arm_inv_park_f32(
+ float32_t Id,
+ float32_t Iq,
+ float32_t * pIalpha,
+ float32_t * pIbeta,
+ float32_t sinVal,
+ float32_t cosVal)
+ {
+ /* Calculate pIalpha using the equation, pIalpha = Id * cosVal - Iq * sinVal */
+ *pIalpha = Id * cosVal - Iq * sinVal;
+
+ /* Calculate pIbeta using the equation, pIbeta = Id * sinVal + Iq * cosVal */
+ *pIbeta = Id * sinVal + Iq * cosVal;
+ }
+
+
+ /**
+ * @brief Inverse Park transform for Q31 version
+ * @param[in] Id input coordinate of rotor reference frame d
+ * @param[in] Iq input coordinate of rotor reference frame q
+ * @param[out] pIalpha points to output two-phase orthogonal vector axis alpha
+ * @param[out] pIbeta points to output two-phase orthogonal vector axis beta
+ * @param[in] sinVal sine value of rotation angle theta
+ * @param[in] cosVal cosine value of rotation angle theta
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function is implemented using an internal 32-bit accumulator.
+ * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
+ * There is saturation on the addition, hence there is no risk of overflow.
+ */
+ static __INLINE void arm_inv_park_q31(
+ q31_t Id,
+ q31_t Iq,
+ q31_t * pIalpha,
+ q31_t * pIbeta,
+ q31_t sinVal,
+ q31_t cosVal)
+ {
+ q31_t product1, product2; /* Temporary variables used to store intermediate results */
+ q31_t product3, product4; /* Temporary variables used to store intermediate results */
+
+ /* Intermediate product is calculated by (Id * cosVal) */
+ product1 = (q31_t) (((q63_t) (Id) * (cosVal)) >> 31);
+
+ /* Intermediate product is calculated by (Iq * sinVal) */
+ product2 = (q31_t) (((q63_t) (Iq) * (sinVal)) >> 31);
+
+
+ /* Intermediate product is calculated by (Id * sinVal) */
+ product3 = (q31_t) (((q63_t) (Id) * (sinVal)) >> 31);
+
+ /* Intermediate product is calculated by (Iq * cosVal) */
+ product4 = (q31_t) (((q63_t) (Iq) * (cosVal)) >> 31);
+
+ /* Calculate pIalpha by using the two intermediate products 1 and 2 */
+ *pIalpha = __QSUB(product1, product2);
+
+ /* Calculate pIbeta by using the two intermediate products 3 and 4 */
+ *pIbeta = __QADD(product4, product3);
+ }
+
+ /**
+ * @} end of Inverse park group
+ */
+
+
+ /**
+ * @brief Converts the elements of the Q31 vector to floating-point vector.
+ * @param[in] pSrc is input pointer
+ * @param[out] pDst is output pointer
+ * @param[in] blockSize is the number of samples to process
+ */
+ void arm_q31_to_float(
+ q31_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
+
+ /**
+ * @ingroup groupInterpolation
+ */
+
+ /**
+ * @defgroup LinearInterpolate Linear Interpolation
+ *
+ * Linear interpolation is a method of curve fitting using linear polynomials.
+ * Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning the appropriate point along that line
+ *
+ * \par
+ * \image html LinearInterp.gif "Linear interpolation"
+ *
+ * \par
+ * A Linear Interpolate function calculates an output value(y), for the input(x)
+ * using linear interpolation of the input values x0, x1( nearest input values) and the output values y0 and y1(nearest output values)
+ *
+ * \par Algorithm:
+ * <pre>
+ * y = y0 + (x - x0) * ((y1 - y0)/(x1-x0))
+ * where x0, x1 are nearest values of input x
+ * y0, y1 are nearest values to output y
+ * </pre>
+ *
+ * \par
+ * This set of functions implements Linear interpolation process
+ * for Q7, Q15, Q31, and floating-point data types. The functions operate on a single
+ * sample of data and each call to the function returns a single processed value.
+ * <code>S</code> points to an instance of the Linear Interpolate function data structure.
+ * <code>x</code> is the input sample value. The functions returns the output value.
+ *
+ * \par
+ * if x is outside of the table boundary, Linear interpolation returns first value of the table
+ * if x is below input range and returns last value of table if x is above range.
+ */
+
+ /**
+ * @addtogroup LinearInterpolate
+ * @{
+ */
+
+ /**
+ * @brief Process function for the floating-point Linear Interpolation Function.
+ * @param[in,out] S is an instance of the floating-point Linear Interpolation structure
+ * @param[in] x input sample to process
+ * @return y processed output sample.
+ *
+ */
+ static __INLINE float32_t arm_linear_interp_f32(
+ arm_linear_interp_instance_f32 * S,
+ float32_t x)
+ {
+ float32_t y;
+ float32_t x0, x1; /* Nearest input values */
+ float32_t y0, y1; /* Nearest output values */
+ float32_t xSpacing = S->xSpacing; /* spacing between input values */
+ int32_t i; /* Index variable */
+ float32_t *pYData = S->pYData; /* pointer to output table */
+
+ /* Calculation of index */
+ i = (int32_t) ((x - S->x1) / xSpacing);
+
+ if (i < 0)
+ {
+ /* Iniatilize output for below specified range as least output value of table */
+ y = pYData[0];
+ }
+ else if ((uint32_t)i >= S->nValues)
+ {
+ /* Iniatilize output for above specified range as last output value of table */
+ y = pYData[S->nValues - 1];
+ }
+ else
+ {
+ /* Calculation of nearest input values */
+ x0 = S->x1 + i * xSpacing;
+ x1 = S->x1 + (i + 1) * xSpacing;
+
+ /* Read of nearest output values */
+ y0 = pYData[i];
+ y1 = pYData[i + 1];
+
+ /* Calculation of output */
+ y = y0 + (x - x0) * ((y1 - y0) / (x1 - x0));
+
+ }
+
+ /* returns output value */
+ return (y);
+ }
+
+
+ /**
+ *
+ * @brief Process function for the Q31 Linear Interpolation Function.
+ * @param[in] pYData pointer to Q31 Linear Interpolation table
+ * @param[in] x input sample to process
+ * @param[in] nValues number of table values
+ * @return y processed output sample.
+ *
+ * \par
+ * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
+ * This function can support maximum of table size 2^12.
+ *
+ */
+ static __INLINE q31_t arm_linear_interp_q31(
+ q31_t * pYData,
+ q31_t x,
+ uint32_t nValues)
+ {
+ q31_t y; /* output */
+ q31_t y0, y1; /* Nearest output values */
+ q31_t fract; /* fractional part */
+ int32_t index; /* Index to read nearest output values */
+
+ /* Input is in 12.20 format */
+ /* 12 bits for the table index */
+ /* Index value calculation */
+ index = ((x & (q31_t)0xFFF00000) >> 20);
+
+ if (index >= (int32_t)(nValues - 1))
+ {
+ return (pYData[nValues - 1]);
+ }
+ else if (index < 0)
+ {
+ return (pYData[0]);
+ }
+ else
+ {
+ /* 20 bits for the fractional part */
+ /* shift left by 11 to keep fract in 1.31 format */
+ fract = (x & 0x000FFFFF) << 11;
+
+ /* Read two nearest output values from the index in 1.31(q31) format */
+ y0 = pYData[index];
+ y1 = pYData[index + 1];
+
+ /* Calculation of y0 * (1-fract) and y is in 2.30 format */
+ y = ((q31_t) ((q63_t) y0 * (0x7FFFFFFF - fract) >> 32));
+
+ /* Calculation of y0 * (1-fract) + y1 *fract and y is in 2.30 format */
+ y += ((q31_t) (((q63_t) y1 * fract) >> 32));
+
+ /* Convert y to 1.31 format */
+ return (y << 1u);
+ }
+ }
+
+
+ /**
+ *
+ * @brief Process function for the Q15 Linear Interpolation Function.
+ * @param[in] pYData pointer to Q15 Linear Interpolation table
+ * @param[in] x input sample to process
+ * @param[in] nValues number of table values
+ * @return y processed output sample.
+ *
+ * \par
+ * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
+ * This function can support maximum of table size 2^12.
+ *
+ */
+ static __INLINE q15_t arm_linear_interp_q15(
+ q15_t * pYData,
+ q31_t x,
+ uint32_t nValues)
+ {
+ q63_t y; /* output */
+ q15_t y0, y1; /* Nearest output values */
+ q31_t fract; /* fractional part */
+ int32_t index; /* Index to read nearest output values */
+
+ /* Input is in 12.20 format */
+ /* 12 bits for the table index */
+ /* Index value calculation */
+ index = ((x & (int32_t)0xFFF00000) >> 20);
+
+ if (index >= (int32_t)(nValues - 1))
+ {
+ return (pYData[nValues - 1]);
+ }
+ else if (index < 0)
+ {
+ return (pYData[0]);
+ }
+ else
+ {
+ /* 20 bits for the fractional part */
+ /* fract is in 12.20 format */
+ fract = (x & 0x000FFFFF);
+
+ /* Read two nearest output values from the index */
+ y0 = pYData[index];
+ y1 = pYData[index + 1];
+
+ /* Calculation of y0 * (1-fract) and y is in 13.35 format */
+ y = ((q63_t) y0 * (0xFFFFF - fract));
+
+ /* Calculation of (y0 * (1-fract) + y1 * fract) and y is in 13.35 format */
+ y += ((q63_t) y1 * (fract));
+
+ /* convert y to 1.15 format */
+ return (q15_t) (y >> 20);
+ }
+ }
+
+
+ /**
+ *
+ * @brief Process function for the Q7 Linear Interpolation Function.
+ * @param[in] pYData pointer to Q7 Linear Interpolation table
+ * @param[in] x input sample to process
+ * @param[in] nValues number of table values
+ * @return y processed output sample.
+ *
+ * \par
+ * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
+ * This function can support maximum of table size 2^12.
+ */
+ static __INLINE q7_t arm_linear_interp_q7(
+ q7_t * pYData,
+ q31_t x,
+ uint32_t nValues)
+ {
+ q31_t y; /* output */
+ q7_t y0, y1; /* Nearest output values */
+ q31_t fract; /* fractional part */
+ uint32_t index; /* Index to read nearest output values */
+
+ /* Input is in 12.20 format */
+ /* 12 bits for the table index */
+ /* Index value calculation */
+ if (x < 0)
+ {
+ return (pYData[0]);
+ }
+ index = (x >> 20) & 0xfff;
+
+ if (index >= (nValues - 1))
+ {
+ return (pYData[nValues - 1]);
+ }
+ else
+ {
+ /* 20 bits for the fractional part */
+ /* fract is in 12.20 format */
+ fract = (x & 0x000FFFFF);
+
+ /* Read two nearest output values from the index and are in 1.7(q7) format */
+ y0 = pYData[index];
+ y1 = pYData[index + 1];
+
+ /* Calculation of y0 * (1-fract ) and y is in 13.27(q27) format */
+ y = ((y0 * (0xFFFFF - fract)));
+
+ /* Calculation of y1 * fract + y0 * (1-fract) and y is in 13.27(q27) format */
+ y += (y1 * fract);
+
+ /* convert y to 1.7(q7) format */
+ return (q7_t) (y >> 20);
+ }
+ }
+
+ /**
+ * @} end of LinearInterpolate group
+ */
+
+ /**
+ * @brief Fast approximation to the trigonometric sine function for floating-point data.
+ * @param[in] x input value in radians.
+ * @return sin(x).
+ */
+ float32_t arm_sin_f32(
+ float32_t x);
+
+
+ /**
+ * @brief Fast approximation to the trigonometric sine function for Q31 data.
+ * @param[in] x Scaled input value in radians.
+ * @return sin(x).
+ */
+ q31_t arm_sin_q31(
+ q31_t x);
+
+
+ /**
+ * @brief Fast approximation to the trigonometric sine function for Q15 data.
+ * @param[in] x Scaled input value in radians.
+ * @return sin(x).
+ */
+ q15_t arm_sin_q15(
+ q15_t x);
+
+
+ /**
+ * @brief Fast approximation to the trigonometric cosine function for floating-point data.
+ * @param[in] x input value in radians.
+ * @return cos(x).
+ */
+ float32_t arm_cos_f32(
+ float32_t x);
+
+
+ /**
+ * @brief Fast approximation to the trigonometric cosine function for Q31 data.
+ * @param[in] x Scaled input value in radians.
+ * @return cos(x).
+ */
+ q31_t arm_cos_q31(
+ q31_t x);
+
+
+ /**
+ * @brief Fast approximation to the trigonometric cosine function for Q15 data.
+ * @param[in] x Scaled input value in radians.
+ * @return cos(x).
+ */
+ q15_t arm_cos_q15(
+ q15_t x);
+
+
+ /**
+ * @ingroup groupFastMath
+ */
+
+
+ /**
+ * @defgroup SQRT Square Root
+ *
+ * Computes the square root of a number.
+ * There are separate functions for Q15, Q31, and floating-point data types.
+ * The square root function is computed using the Newton-Raphson algorithm.
+ * This is an iterative algorithm of the form:
+ * <pre>
+ * x1 = x0 - f(x0)/f'(x0)
+ * </pre>
+ * where <code>x1</code> is the current estimate,
+ * <code>x0</code> is the previous estimate, and
+ * <code>f'(x0)</code> is the derivative of <code>f()</code> evaluated at <code>x0</code>.
+ * For the square root function, the algorithm reduces to:
+ * <pre>
+ * x0 = in/2 [initial guess]
+ * x1 = 1/2 * ( x0 + in / x0) [each iteration]
+ * </pre>
+ */
+
+
+ /**
+ * @addtogroup SQRT
+ * @{
+ */
+
+ /**
+ * @brief Floating-point square root function.
+ * @param[in] in input value.
+ * @param[out] pOut square root of input value.
+ * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
+ * <code>in</code> is negative value and returns zero output for negative values.
+ */
+ static __INLINE arm_status arm_sqrt_f32(
+ float32_t in,
+ float32_t * pOut)
+ {
+ if (in >= 0.0f)
+ {
+
+#if (__FPU_USED == 1) && defined ( __CC_ARM )
+ *pOut = __sqrtf(in);
+#elif (__FPU_USED == 1) && (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
+ *pOut = __builtin_sqrtf(in);
+#elif (__FPU_USED == 1) && defined(__GNUC__)
+ *pOut = __builtin_sqrtf(in);
+#elif (__FPU_USED == 1) && defined ( __ICCARM__ ) && (__VER__ >= 6040000)
+ __ASM("VSQRT.F32 %0,%1" : "=t"(*pOut) : "t"(in));
+#else
+ *pOut = sqrtf(in);
+#endif
+
+ return (ARM_MATH_SUCCESS);
+ }
+ else
+ {
+ *pOut = 0.0f;
+ return (ARM_MATH_ARGUMENT_ERROR);
+ }
+ }
+
+
+ /**
+ * @brief Q31 square root function.
+ * @param[in] in input value. The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF.
+ * @param[out] pOut square root of input value.
+ * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
+ * <code>in</code> is negative value and returns zero output for negative values.
+ */
+ arm_status arm_sqrt_q31(
+ q31_t in,
+ q31_t * pOut);
+
+
+ /**
+ * @brief Q15 square root function.
+ * @param[in] in input value. The range of the input value is [0 +1) or 0x0000 to 0x7FFF.
+ * @param[out] pOut square root of input value.
+ * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
+ * <code>in</code> is negative value and returns zero output for negative values.
+ */
+ arm_status arm_sqrt_q15(
+ q15_t in,
+ q15_t * pOut);
+
+ /**
+ * @} end of SQRT group
+ */
+
+
+ /**
+ * @brief floating-point Circular write function.
+ */
+ static __INLINE void arm_circularWrite_f32(
+ int32_t * circBuffer,
+ int32_t L,
+ uint16_t * writeOffset,
+ int32_t bufferInc,
+ const int32_t * src,
+ int32_t srcInc,
+ uint32_t blockSize)
+ {
+ uint32_t i = 0u;
+ int32_t wOffset;
+
+ /* Copy the value of Index pointer that points
+ * to the current location where the input samples to be copied */
+ wOffset = *writeOffset;
+
+ /* Loop over the blockSize */
+ i = blockSize;
+
+ while (i > 0u)
+ {
+ /* copy the input sample to the circular buffer */
+ circBuffer[wOffset] = *src;
+
+ /* Update the input pointer */
+ src += srcInc;
+
+ /* Circularly update wOffset. Watch out for positive and negative value */
+ wOffset += bufferInc;
+ if (wOffset >= L)
+ wOffset -= L;
+
+ /* Decrement the loop counter */
+ i--;
+ }
+
+ /* Update the index pointer */
+ *writeOffset = (uint16_t)wOffset;
+ }
+
+
+
+ /**
+ * @brief floating-point Circular Read function.
+ */
+ static __INLINE void arm_circularRead_f32(
+ int32_t * circBuffer,
+ int32_t L,
+ int32_t * readOffset,
+ int32_t bufferInc,
+ int32_t * dst,
+ int32_t * dst_base,
+ int32_t dst_length,
+ int32_t dstInc,
+ uint32_t blockSize)
+ {
+ uint32_t i = 0u;
+ int32_t rOffset, dst_end;
+
+ /* Copy the value of Index pointer that points
+ * to the current location from where the input samples to be read */
+ rOffset = *readOffset;
+ dst_end = (int32_t) (dst_base + dst_length);
+
+ /* Loop over the blockSize */
+ i = blockSize;
+
+ while (i > 0u)
+ {
+ /* copy the sample from the circular buffer to the destination buffer */
+ *dst = circBuffer[rOffset];
+
+ /* Update the input pointer */
+ dst += dstInc;
+
+ if (dst == (int32_t *) dst_end)
+ {
+ dst = dst_base;
+ }
+
+ /* Circularly update rOffset. Watch out for positive and negative value */
+ rOffset += bufferInc;
+
+ if (rOffset >= L)
+ {
+ rOffset -= L;
+ }
+
+ /* Decrement the loop counter */
+ i--;
+ }
+
+ /* Update the index pointer */
+ *readOffset = rOffset;
+ }
+
+
+ /**
+ * @brief Q15 Circular write function.
+ */
+ static __INLINE void arm_circularWrite_q15(
+ q15_t * circBuffer,
+ int32_t L,
+ uint16_t * writeOffset,
+ int32_t bufferInc,
+ const q15_t * src,
+ int32_t srcInc,
+ uint32_t blockSize)
+ {
+ uint32_t i = 0u;
+ int32_t wOffset;
+
+ /* Copy the value of Index pointer that points
+ * to the current location where the input samples to be copied */
+ wOffset = *writeOffset;
+
+ /* Loop over the blockSize */
+ i = blockSize;
+
+ while (i > 0u)
+ {
+ /* copy the input sample to the circular buffer */
+ circBuffer[wOffset] = *src;
+
+ /* Update the input pointer */
+ src += srcInc;
+
+ /* Circularly update wOffset. Watch out for positive and negative value */
+ wOffset += bufferInc;
+ if (wOffset >= L)
+ wOffset -= L;
+
+ /* Decrement the loop counter */
+ i--;
+ }
+
+ /* Update the index pointer */
+ *writeOffset = (uint16_t)wOffset;
+ }
+
+
+ /**
+ * @brief Q15 Circular Read function.
+ */
+ static __INLINE void arm_circularRead_q15(
+ q15_t * circBuffer,
+ int32_t L,
+ int32_t * readOffset,
+ int32_t bufferInc,
+ q15_t * dst,
+ q15_t * dst_base,
+ int32_t dst_length,
+ int32_t dstInc,
+ uint32_t blockSize)
+ {
+ uint32_t i = 0;
+ int32_t rOffset, dst_end;
+
+ /* Copy the value of Index pointer that points
+ * to the current location from where the input samples to be read */
+ rOffset = *readOffset;
+
+ dst_end = (int32_t) (dst_base + dst_length);
+
+ /* Loop over the blockSize */
+ i = blockSize;
+
+ while (i > 0u)
+ {
+ /* copy the sample from the circular buffer to the destination buffer */
+ *dst = circBuffer[rOffset];
+
+ /* Update the input pointer */
+ dst += dstInc;
+
+ if (dst == (q15_t *) dst_end)
+ {
+ dst = dst_base;
+ }
+
+ /* Circularly update wOffset. Watch out for positive and negative value */
+ rOffset += bufferInc;
+
+ if (rOffset >= L)
+ {
+ rOffset -= L;
+ }
+
+ /* Decrement the loop counter */
+ i--;
+ }
+
+ /* Update the index pointer */
+ *readOffset = rOffset;
+ }
+
+
+ /**
+ * @brief Q7 Circular write function.
+ */
+ static __INLINE void arm_circularWrite_q7(
+ q7_t * circBuffer,
+ int32_t L,
+ uint16_t * writeOffset,
+ int32_t bufferInc,
+ const q7_t * src,
+ int32_t srcInc,
+ uint32_t blockSize)
+ {
+ uint32_t i = 0u;
+ int32_t wOffset;
+
+ /* Copy the value of Index pointer that points
+ * to the current location where the input samples to be copied */
+ wOffset = *writeOffset;
+
+ /* Loop over the blockSize */
+ i = blockSize;
+
+ while (i > 0u)
+ {
+ /* copy the input sample to the circular buffer */
+ circBuffer[wOffset] = *src;
+
+ /* Update the input pointer */
+ src += srcInc;
+
+ /* Circularly update wOffset. Watch out for positive and negative value */
+ wOffset += bufferInc;
+ if (wOffset >= L)
+ wOffset -= L;
+
+ /* Decrement the loop counter */
+ i--;
+ }
+
+ /* Update the index pointer */
+ *writeOffset = (uint16_t)wOffset;
+ }
+
+
+ /**
+ * @brief Q7 Circular Read function.
+ */
+ static __INLINE void arm_circularRead_q7(
+ q7_t * circBuffer,
+ int32_t L,
+ int32_t * readOffset,
+ int32_t bufferInc,
+ q7_t * dst,
+ q7_t * dst_base,
+ int32_t dst_length,
+ int32_t dstInc,
+ uint32_t blockSize)
+ {
+ uint32_t i = 0;
+ int32_t rOffset, dst_end;
+
+ /* Copy the value of Index pointer that points
+ * to the current location from where the input samples to be read */
+ rOffset = *readOffset;
+
+ dst_end = (int32_t) (dst_base + dst_length);
+
+ /* Loop over the blockSize */
+ i = blockSize;
+
+ while (i > 0u)
+ {
+ /* copy the sample from the circular buffer to the destination buffer */
+ *dst = circBuffer[rOffset];
+
+ /* Update the input pointer */
+ dst += dstInc;
+
+ if (dst == (q7_t *) dst_end)
+ {
+ dst = dst_base;
+ }
+
+ /* Circularly update rOffset. Watch out for positive and negative value */
+ rOffset += bufferInc;
+
+ if (rOffset >= L)
+ {
+ rOffset -= L;
+ }
+
+ /* Decrement the loop counter */
+ i--;
+ }
+
+ /* Update the index pointer */
+ *readOffset = rOffset;
+ }
+
+
+ /**
+ * @brief Sum of the squares of the elements of a Q31 vector.
+ * @param[in] pSrc is input pointer
+ * @param[in] blockSize is the number of samples to process
+ * @param[out] pResult is output value.
+ */
+ void arm_power_q31(
+ q31_t * pSrc,
+ uint32_t blockSize,
+ q63_t * pResult);
+
+
+ /**
+ * @brief Sum of the squares of the elements of a floating-point vector.
+ * @param[in] pSrc is input pointer
+ * @param[in] blockSize is the number of samples to process
+ * @param[out] pResult is output value.
+ */
+ void arm_power_f32(
+ float32_t * pSrc,
+ uint32_t blockSize,
+ float32_t * pResult);
+
+
+ /**
+ * @brief Sum of the squares of the elements of a Q15 vector.
+ * @param[in] pSrc is input pointer
+ * @param[in] blockSize is the number of samples to process
+ * @param[out] pResult is output value.
+ */
+ void arm_power_q15(
+ q15_t * pSrc,
+ uint32_t blockSize,
+ q63_t * pResult);
+
+
+ /**
+ * @brief Sum of the squares of the elements of a Q7 vector.
+ * @param[in] pSrc is input pointer
+ * @param[in] blockSize is the number of samples to process
+ * @param[out] pResult is output value.
+ */
+ void arm_power_q7(
+ q7_t * pSrc,
+ uint32_t blockSize,
+ q31_t * pResult);
+
+
+ /**
+ * @brief Mean value of a Q7 vector.
+ * @param[in] pSrc is input pointer
+ * @param[in] blockSize is the number of samples to process
+ * @param[out] pResult is output value.
+ */
+ void arm_mean_q7(
+ q7_t * pSrc,
+ uint32_t blockSize,
+ q7_t * pResult);
+
+
+ /**
+ * @brief Mean value of a Q15 vector.
+ * @param[in] pSrc is input pointer
+ * @param[in] blockSize is the number of samples to process
+ * @param[out] pResult is output value.
+ */
+ void arm_mean_q15(
+ q15_t * pSrc,
+ uint32_t blockSize,
+ q15_t * pResult);
+
+
+ /**
+ * @brief Mean value of a Q31 vector.
+ * @param[in] pSrc is input pointer
+ * @param[in] blockSize is the number of samples to process
+ * @param[out] pResult is output value.
+ */
+ void arm_mean_q31(
+ q31_t * pSrc,
+ uint32_t blockSize,
+ q31_t * pResult);
+
+
+ /**
+ * @brief Mean value of a floating-point vector.
+ * @param[in] pSrc is input pointer
+ * @param[in] blockSize is the number of samples to process
+ * @param[out] pResult is output value.
+ */
+ void arm_mean_f32(
+ float32_t * pSrc,
+ uint32_t blockSize,
+ float32_t * pResult);
+
+
+ /**
+ * @brief Variance of the elements of a floating-point vector.
+ * @param[in] pSrc is input pointer
+ * @param[in] blockSize is the number of samples to process
+ * @param[out] pResult is output value.
+ */
+ void arm_var_f32(
+ float32_t * pSrc,
+ uint32_t blockSize,
+ float32_t * pResult);
+
+
+ /**
+ * @brief Variance of the elements of a Q31 vector.
+ * @param[in] pSrc is input pointer
+ * @param[in] blockSize is the number of samples to process
+ * @param[out] pResult is output value.
+ */
+ void arm_var_q31(
+ q31_t * pSrc,
+ uint32_t blockSize,
+ q31_t * pResult);
+
+
+ /**
+ * @brief Variance of the elements of a Q15 vector.
+ * @param[in] pSrc is input pointer
+ * @param[in] blockSize is the number of samples to process
+ * @param[out] pResult is output value.
+ */
+ void arm_var_q15(
+ q15_t * pSrc,
+ uint32_t blockSize,
+ q15_t * pResult);
+
+
+ /**
+ * @brief Root Mean Square of the elements of a floating-point vector.
+ * @param[in] pSrc is input pointer
+ * @param[in] blockSize is the number of samples to process
+ * @param[out] pResult is output value.
+ */
+ void arm_rms_f32(
+ float32_t * pSrc,
+ uint32_t blockSize,
+ float32_t * pResult);
+
+
+ /**
+ * @brief Root Mean Square of the elements of a Q31 vector.
+ * @param[in] pSrc is input pointer
+ * @param[in] blockSize is the number of samples to process
+ * @param[out] pResult is output value.
+ */
+ void arm_rms_q31(
+ q31_t * pSrc,
+ uint32_t blockSize,
+ q31_t * pResult);
+
+
+ /**
+ * @brief Root Mean Square of the elements of a Q15 vector.
+ * @param[in] pSrc is input pointer
+ * @param[in] blockSize is the number of samples to process
+ * @param[out] pResult is output value.
+ */
+ void arm_rms_q15(
+ q15_t * pSrc,
+ uint32_t blockSize,
+ q15_t * pResult);
+
+
+ /**
+ * @brief Standard deviation of the elements of a floating-point vector.
+ * @param[in] pSrc is input pointer
+ * @param[in] blockSize is the number of samples to process
+ * @param[out] pResult is output value.
+ */
+ void arm_std_f32(
+ float32_t * pSrc,
+ uint32_t blockSize,
+ float32_t * pResult);
+
+
+ /**
+ * @brief Standard deviation of the elements of a Q31 vector.
+ * @param[in] pSrc is input pointer
+ * @param[in] blockSize is the number of samples to process
+ * @param[out] pResult is output value.
+ */
+ void arm_std_q31(
+ q31_t * pSrc,
+ uint32_t blockSize,
+ q31_t * pResult);
+
+
+ /**
+ * @brief Standard deviation of the elements of a Q15 vector.
+ * @param[in] pSrc is input pointer
+ * @param[in] blockSize is the number of samples to process
+ * @param[out] pResult is output value.
+ */
+ void arm_std_q15(
+ q15_t * pSrc,
+ uint32_t blockSize,
+ q15_t * pResult);
+
+
+ /**
+ * @brief Floating-point complex magnitude
+ * @param[in] pSrc points to the complex input vector
+ * @param[out] pDst points to the real output vector
+ * @param[in] numSamples number of complex samples in the input vector
+ */
+ void arm_cmplx_mag_f32(
+ float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t numSamples);
+
+
+ /**
+ * @brief Q31 complex magnitude
+ * @param[in] pSrc points to the complex input vector
+ * @param[out] pDst points to the real output vector
+ * @param[in] numSamples number of complex samples in the input vector
+ */
+ void arm_cmplx_mag_q31(
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t numSamples);
+
+
+ /**
+ * @brief Q15 complex magnitude
+ * @param[in] pSrc points to the complex input vector
+ * @param[out] pDst points to the real output vector
+ * @param[in] numSamples number of complex samples in the input vector
+ */
+ void arm_cmplx_mag_q15(
+ q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t numSamples);
+
+
+ /**
+ * @brief Q15 complex dot product
+ * @param[in] pSrcA points to the first input vector
+ * @param[in] pSrcB points to the second input vector
+ * @param[in] numSamples number of complex samples in each vector
+ * @param[out] realResult real part of the result returned here
+ * @param[out] imagResult imaginary part of the result returned here
+ */
+ void arm_cmplx_dot_prod_q15(
+ q15_t * pSrcA,
+ q15_t * pSrcB,
+ uint32_t numSamples,
+ q31_t * realResult,
+ q31_t * imagResult);
+
+
+ /**
+ * @brief Q31 complex dot product
+ * @param[in] pSrcA points to the first input vector
+ * @param[in] pSrcB points to the second input vector
+ * @param[in] numSamples number of complex samples in each vector
+ * @param[out] realResult real part of the result returned here
+ * @param[out] imagResult imaginary part of the result returned here
+ */
+ void arm_cmplx_dot_prod_q31(
+ q31_t * pSrcA,
+ q31_t * pSrcB,
+ uint32_t numSamples,
+ q63_t * realResult,
+ q63_t * imagResult);
+
+
+ /**
+ * @brief Floating-point complex dot product
+ * @param[in] pSrcA points to the first input vector
+ * @param[in] pSrcB points to the second input vector
+ * @param[in] numSamples number of complex samples in each vector
+ * @param[out] realResult real part of the result returned here
+ * @param[out] imagResult imaginary part of the result returned here
+ */
+ void arm_cmplx_dot_prod_f32(
+ float32_t * pSrcA,
+ float32_t * pSrcB,
+ uint32_t numSamples,
+ float32_t * realResult,
+ float32_t * imagResult);
+
+
+ /**
+ * @brief Q15 complex-by-real multiplication
+ * @param[in] pSrcCmplx points to the complex input vector
+ * @param[in] pSrcReal points to the real input vector
+ * @param[out] pCmplxDst points to the complex output vector
+ * @param[in] numSamples number of samples in each vector
+ */
+ void arm_cmplx_mult_real_q15(
+ q15_t * pSrcCmplx,
+ q15_t * pSrcReal,
+ q15_t * pCmplxDst,
+ uint32_t numSamples);
+
+
+ /**
+ * @brief Q31 complex-by-real multiplication
+ * @param[in] pSrcCmplx points to the complex input vector
+ * @param[in] pSrcReal points to the real input vector
+ * @param[out] pCmplxDst points to the complex output vector
+ * @param[in] numSamples number of samples in each vector
+ */
+ void arm_cmplx_mult_real_q31(
+ q31_t * pSrcCmplx,
+ q31_t * pSrcReal,
+ q31_t * pCmplxDst,
+ uint32_t numSamples);
+
+
+ /**
+ * @brief Floating-point complex-by-real multiplication
+ * @param[in] pSrcCmplx points to the complex input vector
+ * @param[in] pSrcReal points to the real input vector
+ * @param[out] pCmplxDst points to the complex output vector
+ * @param[in] numSamples number of samples in each vector
+ */
+ void arm_cmplx_mult_real_f32(
+ float32_t * pSrcCmplx,
+ float32_t * pSrcReal,
+ float32_t * pCmplxDst,
+ uint32_t numSamples);
+
+
+ /**
+ * @brief Minimum value of a Q7 vector.
+ * @param[in] pSrc is input pointer
+ * @param[in] blockSize is the number of samples to process
+ * @param[out] result is output pointer
+ * @param[in] index is the array index of the minimum value in the input buffer.
+ */
+ void arm_min_q7(
+ q7_t * pSrc,
+ uint32_t blockSize,
+ q7_t * result,
+ uint32_t * index);
+
+
+ /**
+ * @brief Minimum value of a Q15 vector.
+ * @param[in] pSrc is input pointer
+ * @param[in] blockSize is the number of samples to process
+ * @param[out] pResult is output pointer
+ * @param[in] pIndex is the array index of the minimum value in the input buffer.
+ */
+ void arm_min_q15(
+ q15_t * pSrc,
+ uint32_t blockSize,
+ q15_t * pResult,
+ uint32_t * pIndex);
+
+
+ /**
+ * @brief Minimum value of a Q31 vector.
+ * @param[in] pSrc is input pointer
+ * @param[in] blockSize is the number of samples to process
+ * @param[out] pResult is output pointer
+ * @param[out] pIndex is the array index of the minimum value in the input buffer.
+ */
+ void arm_min_q31(
+ q31_t * pSrc,
+ uint32_t blockSize,
+ q31_t * pResult,
+ uint32_t * pIndex);
+
+
+ /**
+ * @brief Minimum value of a floating-point vector.
+ * @param[in] pSrc is input pointer
+ * @param[in] blockSize is the number of samples to process
+ * @param[out] pResult is output pointer
+ * @param[out] pIndex is the array index of the minimum value in the input buffer.
+ */
+ void arm_min_f32(
+ float32_t * pSrc,
+ uint32_t blockSize,
+ float32_t * pResult,
+ uint32_t * pIndex);
+
+
+/**
+ * @brief Maximum value of a Q7 vector.
+ * @param[in] pSrc points to the input buffer
+ * @param[in] blockSize length of the input vector
+ * @param[out] pResult maximum value returned here
+ * @param[out] pIndex index of maximum value returned here
+ */
+ void arm_max_q7(
+ q7_t * pSrc,
+ uint32_t blockSize,
+ q7_t * pResult,
+ uint32_t * pIndex);
+
+
+/**
+ * @brief Maximum value of a Q15 vector.
+ * @param[in] pSrc points to the input buffer
+ * @param[in] blockSize length of the input vector
+ * @param[out] pResult maximum value returned here
+ * @param[out] pIndex index of maximum value returned here
+ */
+ void arm_max_q15(
+ q15_t * pSrc,
+ uint32_t blockSize,
+ q15_t * pResult,
+ uint32_t * pIndex);
+
+
+/**
+ * @brief Maximum value of a Q31 vector.
+ * @param[in] pSrc points to the input buffer
+ * @param[in] blockSize length of the input vector
+ * @param[out] pResult maximum value returned here
+ * @param[out] pIndex index of maximum value returned here
+ */
+ void arm_max_q31(
+ q31_t * pSrc,
+ uint32_t blockSize,
+ q31_t * pResult,
+ uint32_t * pIndex);
+
+
+/**
+ * @brief Maximum value of a floating-point vector.
+ * @param[in] pSrc points to the input buffer
+ * @param[in] blockSize length of the input vector
+ * @param[out] pResult maximum value returned here
+ * @param[out] pIndex index of maximum value returned here
+ */
+ void arm_max_f32(
+ float32_t * pSrc,
+ uint32_t blockSize,
+ float32_t * pResult,
+ uint32_t * pIndex);
+
+
+ /**
+ * @brief Q15 complex-by-complex multiplication
+ * @param[in] pSrcA points to the first input vector
+ * @param[in] pSrcB points to the second input vector
+ * @param[out] pDst points to the output vector
+ * @param[in] numSamples number of complex samples in each vector
+ */
+ void arm_cmplx_mult_cmplx_q15(
+ q15_t * pSrcA,
+ q15_t * pSrcB,
+ q15_t * pDst,
+ uint32_t numSamples);
+
+
+ /**
+ * @brief Q31 complex-by-complex multiplication
+ * @param[in] pSrcA points to the first input vector
+ * @param[in] pSrcB points to the second input vector
+ * @param[out] pDst points to the output vector
+ * @param[in] numSamples number of complex samples in each vector
+ */
+ void arm_cmplx_mult_cmplx_q31(
+ q31_t * pSrcA,
+ q31_t * pSrcB,
+ q31_t * pDst,
+ uint32_t numSamples);
+
+
+ /**
+ * @brief Floating-point complex-by-complex multiplication
+ * @param[in] pSrcA points to the first input vector
+ * @param[in] pSrcB points to the second input vector
+ * @param[out] pDst points to the output vector
+ * @param[in] numSamples number of complex samples in each vector
+ */
+ void arm_cmplx_mult_cmplx_f32(
+ float32_t * pSrcA,
+ float32_t * pSrcB,
+ float32_t * pDst,
+ uint32_t numSamples);
+
+
+ /**
+ * @brief Converts the elements of the floating-point vector to Q31 vector.
+ * @param[in] pSrc points to the floating-point input vector
+ * @param[out] pDst points to the Q31 output vector
+ * @param[in] blockSize length of the input vector
+ */
+ void arm_float_to_q31(
+ float32_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Converts the elements of the floating-point vector to Q15 vector.
+ * @param[in] pSrc points to the floating-point input vector
+ * @param[out] pDst points to the Q15 output vector
+ * @param[in] blockSize length of the input vector
+ */
+ void arm_float_to_q15(
+ float32_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Converts the elements of the floating-point vector to Q7 vector.
+ * @param[in] pSrc points to the floating-point input vector
+ * @param[out] pDst points to the Q7 output vector
+ * @param[in] blockSize length of the input vector
+ */
+ void arm_float_to_q7(
+ float32_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Converts the elements of the Q31 vector to Q15 vector.
+ * @param[in] pSrc is input pointer
+ * @param[out] pDst is output pointer
+ * @param[in] blockSize is the number of samples to process
+ */
+ void arm_q31_to_q15(
+ q31_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Converts the elements of the Q31 vector to Q7 vector.
+ * @param[in] pSrc is input pointer
+ * @param[out] pDst is output pointer
+ * @param[in] blockSize is the number of samples to process
+ */
+ void arm_q31_to_q7(
+ q31_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Converts the elements of the Q15 vector to floating-point vector.
+ * @param[in] pSrc is input pointer
+ * @param[out] pDst is output pointer
+ * @param[in] blockSize is the number of samples to process
+ */
+ void arm_q15_to_float(
+ q15_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Converts the elements of the Q15 vector to Q31 vector.
+ * @param[in] pSrc is input pointer
+ * @param[out] pDst is output pointer
+ * @param[in] blockSize is the number of samples to process
+ */
+ void arm_q15_to_q31(
+ q15_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @brief Converts the elements of the Q15 vector to Q7 vector.
+ * @param[in] pSrc is input pointer
+ * @param[out] pDst is output pointer
+ * @param[in] blockSize is the number of samples to process
+ */
+ void arm_q15_to_q7(
+ q15_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize);
+
+
+ /**
+ * @ingroup groupInterpolation
+ */
+
+ /**
+ * @defgroup BilinearInterpolate Bilinear Interpolation
+ *
+ * Bilinear interpolation is an extension of linear interpolation applied to a two dimensional grid.
+ * The underlying function <code>f(x, y)</code> is sampled on a regular grid and the interpolation process
+ * determines values between the grid points.
+ * Bilinear interpolation is equivalent to two step linear interpolation, first in the x-dimension and then in the y-dimension.
+ * Bilinear interpolation is often used in image processing to rescale images.
+ * The CMSIS DSP library provides bilinear interpolation functions for Q7, Q15, Q31, and floating-point data types.
+ *
+ * <b>Algorithm</b>
+ * \par
+ * The instance structure used by the bilinear interpolation functions describes a two dimensional data table.
+ * For floating-point, the instance structure is defined as:
+ * <pre>
+ * typedef struct
+ * {
+ * uint16_t numRows;
+ * uint16_t numCols;
+ * float32_t *pData;
+ * } arm_bilinear_interp_instance_f32;
+ * </pre>
+ *
+ * \par
+ * where <code>numRows</code> specifies the number of rows in the table;
+ * <code>numCols</code> specifies the number of columns in the table;
+ * and <code>pData</code> points to an array of size <code>numRows*numCols</code> values.
+ * The data table <code>pTable</code> is organized in row order and the supplied data values fall on integer indexes.
+ * That is, table element (x,y) is located at <code>pTable[x + y*numCols]</code> where x and y are integers.
+ *
+ * \par
+ * Let <code>(x, y)</code> specify the desired interpolation point. Then define:
+ * <pre>
+ * XF = floor(x)
+ * YF = floor(y)
+ * </pre>
+ * \par
+ * The interpolated output point is computed as:
+ * <pre>
+ * f(x, y) = f(XF, YF) * (1-(x-XF)) * (1-(y-YF))
+ * + f(XF + 1, YF) * (x-XF)*(1-(y-YF))
+ * + f(XF, YF + 1) * (1-(x-XF))*(y-YF)
+ * + f(XF + 1, YF + 1) * (x-XF)*(y-YF)
+ * </pre>
+ * Note that the coordinates (x, y) contain integer and fractional components.
+ * The integer components specify which portion of the table to use while the
+ * fractional components control the interpolation processor.
+ *
+ * \par
+ * if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output.
+ */
+
+ /**
+ * @addtogroup BilinearInterpolate
+ * @{
+ */
+
+
+ /**
+ *
+ * @brief Floating-point bilinear interpolation.
+ * @param[in,out] S points to an instance of the interpolation structure.
+ * @param[in] X interpolation coordinate.
+ * @param[in] Y interpolation coordinate.
+ * @return out interpolated value.
+ */
+ static __INLINE float32_t arm_bilinear_interp_f32(
+ const arm_bilinear_interp_instance_f32 * S,
+ float32_t X,
+ float32_t Y)
+ {
+ float32_t out;
+ float32_t f00, f01, f10, f11;
+ float32_t *pData = S->pData;
+ int32_t xIndex, yIndex, index;
+ float32_t xdiff, ydiff;
+ float32_t b1, b2, b3, b4;
+
+ xIndex = (int32_t) X;
+ yIndex = (int32_t) Y;
+
+ /* Care taken for table outside boundary */
+ /* Returns zero output when values are outside table boundary */
+ if (xIndex < 0 || xIndex > (S->numRows - 1) || yIndex < 0 || yIndex > (S->numCols - 1))
+ {
+ return (0);
+ }
+
+ /* Calculation of index for two nearest points in X-direction */
+ index = (xIndex - 1) + (yIndex - 1) * S->numCols;
+
+
+ /* Read two nearest points in X-direction */
+ f00 = pData[index];
+ f01 = pData[index + 1];
+
+ /* Calculation of index for two nearest points in Y-direction */
+ index = (xIndex - 1) + (yIndex) * S->numCols;
+
+
+ /* Read two nearest points in Y-direction */
+ f10 = pData[index];
+ f11 = pData[index + 1];
+
+ /* Calculation of intermediate values */
+ b1 = f00;
+ b2 = f01 - f00;
+ b3 = f10 - f00;
+ b4 = f00 - f01 - f10 + f11;
+
+ /* Calculation of fractional part in X */
+ xdiff = X - xIndex;
+
+ /* Calculation of fractional part in Y */
+ ydiff = Y - yIndex;
+
+ /* Calculation of bi-linear interpolated output */
+ out = b1 + b2 * xdiff + b3 * ydiff + b4 * xdiff * ydiff;
+
+ /* return to application */
+ return (out);
+ }
+
+
+ /**
+ *
+ * @brief Q31 bilinear interpolation.
+ * @param[in,out] S points to an instance of the interpolation structure.
+ * @param[in] X interpolation coordinate in 12.20 format.
+ * @param[in] Y interpolation coordinate in 12.20 format.
+ * @return out interpolated value.
+ */
+ static __INLINE q31_t arm_bilinear_interp_q31(
+ arm_bilinear_interp_instance_q31 * S,
+ q31_t X,
+ q31_t Y)
+ {
+ q31_t out; /* Temporary output */
+ q31_t acc = 0; /* output */
+ q31_t xfract, yfract; /* X, Y fractional parts */
+ q31_t x1, x2, y1, y2; /* Nearest output values */
+ int32_t rI, cI; /* Row and column indices */
+ q31_t *pYData = S->pData; /* pointer to output table values */
+ uint32_t nCols = S->numCols; /* num of rows */
+
+ /* Input is in 12.20 format */
+ /* 12 bits for the table index */
+ /* Index value calculation */
+ rI = ((X & (q31_t)0xFFF00000) >> 20);
+
+ /* Input is in 12.20 format */
+ /* 12 bits for the table index */
+ /* Index value calculation */
+ cI = ((Y & (q31_t)0xFFF00000) >> 20);
+
+ /* Care taken for table outside boundary */
+ /* Returns zero output when values are outside table boundary */
+ if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
+ {
+ return (0);
+ }
+
+ /* 20 bits for the fractional part */
+ /* shift left xfract by 11 to keep 1.31 format */
+ xfract = (X & 0x000FFFFF) << 11u;
+
+ /* Read two nearest output values from the index */
+ x1 = pYData[(rI) + (int32_t)nCols * (cI) ];
+ x2 = pYData[(rI) + (int32_t)nCols * (cI) + 1];
+
+ /* 20 bits for the fractional part */
+ /* shift left yfract by 11 to keep 1.31 format */
+ yfract = (Y & 0x000FFFFF) << 11u;
+
+ /* Read two nearest output values from the index */
+ y1 = pYData[(rI) + (int32_t)nCols * (cI + 1) ];
+ y2 = pYData[(rI) + (int32_t)nCols * (cI + 1) + 1];
+
+ /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 3.29(q29) format */
+ out = ((q31_t) (((q63_t) x1 * (0x7FFFFFFF - xfract)) >> 32));
+ acc = ((q31_t) (((q63_t) out * (0x7FFFFFFF - yfract)) >> 32));
+
+ /* x2 * (xfract) * (1-yfract) in 3.29(q29) and adding to acc */
+ out = ((q31_t) ((q63_t) x2 * (0x7FFFFFFF - yfract) >> 32));
+ acc += ((q31_t) ((q63_t) out * (xfract) >> 32));
+
+ /* y1 * (1 - xfract) * (yfract) in 3.29(q29) and adding to acc */
+ out = ((q31_t) ((q63_t) y1 * (0x7FFFFFFF - xfract) >> 32));
+ acc += ((q31_t) ((q63_t) out * (yfract) >> 32));
+
+ /* y2 * (xfract) * (yfract) in 3.29(q29) and adding to acc */
+ out = ((q31_t) ((q63_t) y2 * (xfract) >> 32));
+ acc += ((q31_t) ((q63_t) out * (yfract) >> 32));
+
+ /* Convert acc to 1.31(q31) format */
+ return ((q31_t)(acc << 2));
+ }
+
+
+ /**
+ * @brief Q15 bilinear interpolation.
+ * @param[in,out] S points to an instance of the interpolation structure.
+ * @param[in] X interpolation coordinate in 12.20 format.
+ * @param[in] Y interpolation coordinate in 12.20 format.
+ * @return out interpolated value.
+ */
+ static __INLINE q15_t arm_bilinear_interp_q15(
+ arm_bilinear_interp_instance_q15 * S,
+ q31_t X,
+ q31_t Y)
+ {
+ q63_t acc = 0; /* output */
+ q31_t out; /* Temporary output */
+ q15_t x1, x2, y1, y2; /* Nearest output values */
+ q31_t xfract, yfract; /* X, Y fractional parts */
+ int32_t rI, cI; /* Row and column indices */
+ q15_t *pYData = S->pData; /* pointer to output table values */
+ uint32_t nCols = S->numCols; /* num of rows */
+
+ /* Input is in 12.20 format */
+ /* 12 bits for the table index */
+ /* Index value calculation */
+ rI = ((X & (q31_t)0xFFF00000) >> 20);
+
+ /* Input is in 12.20 format */
+ /* 12 bits for the table index */
+ /* Index value calculation */
+ cI = ((Y & (q31_t)0xFFF00000) >> 20);
+
+ /* Care taken for table outside boundary */
+ /* Returns zero output when values are outside table boundary */
+ if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
+ {
+ return (0);
+ }
+
+ /* 20 bits for the fractional part */
+ /* xfract should be in 12.20 format */
+ xfract = (X & 0x000FFFFF);
+
+ /* Read two nearest output values from the index */
+ x1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) ];
+ x2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) + 1];
+
+ /* 20 bits for the fractional part */
+ /* yfract should be in 12.20 format */
+ yfract = (Y & 0x000FFFFF);
+
+ /* Read two nearest output values from the index */
+ y1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) ];
+ y2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) + 1];
+
+ /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 13.51 format */
+
+ /* x1 is in 1.15(q15), xfract in 12.20 format and out is in 13.35 format */
+ /* convert 13.35 to 13.31 by right shifting and out is in 1.31 */
+ out = (q31_t) (((q63_t) x1 * (0xFFFFF - xfract)) >> 4u);
+ acc = ((q63_t) out * (0xFFFFF - yfract));
+
+ /* x2 * (xfract) * (1-yfract) in 1.51 and adding to acc */
+ out = (q31_t) (((q63_t) x2 * (0xFFFFF - yfract)) >> 4u);
+ acc += ((q63_t) out * (xfract));
+
+ /* y1 * (1 - xfract) * (yfract) in 1.51 and adding to acc */
+ out = (q31_t) (((q63_t) y1 * (0xFFFFF - xfract)) >> 4u);
+ acc += ((q63_t) out * (yfract));
+
+ /* y2 * (xfract) * (yfract) in 1.51 and adding to acc */
+ out = (q31_t) (((q63_t) y2 * (xfract)) >> 4u);
+ acc += ((q63_t) out * (yfract));
+
+ /* acc is in 13.51 format and down shift acc by 36 times */
+ /* Convert out to 1.15 format */
+ return ((q15_t)(acc >> 36));
+ }
+
+
+ /**
+ * @brief Q7 bilinear interpolation.
+ * @param[in,out] S points to an instance of the interpolation structure.
+ * @param[in] X interpolation coordinate in 12.20 format.
+ * @param[in] Y interpolation coordinate in 12.20 format.
+ * @return out interpolated value.
+ */
+ static __INLINE q7_t arm_bilinear_interp_q7(
+ arm_bilinear_interp_instance_q7 * S,
+ q31_t X,
+ q31_t Y)
+ {
+ q63_t acc = 0; /* output */
+ q31_t out; /* Temporary output */
+ q31_t xfract, yfract; /* X, Y fractional parts */
+ q7_t x1, x2, y1, y2; /* Nearest output values */
+ int32_t rI, cI; /* Row and column indices */
+ q7_t *pYData = S->pData; /* pointer to output table values */
+ uint32_t nCols = S->numCols; /* num of rows */
+
+ /* Input is in 12.20 format */
+ /* 12 bits for the table index */
+ /* Index value calculation */
+ rI = ((X & (q31_t)0xFFF00000) >> 20);
+
+ /* Input is in 12.20 format */
+ /* 12 bits for the table index */
+ /* Index value calculation */
+ cI = ((Y & (q31_t)0xFFF00000) >> 20);
+
+ /* Care taken for table outside boundary */
+ /* Returns zero output when values are outside table boundary */
+ if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
+ {
+ return (0);
+ }
+
+ /* 20 bits for the fractional part */
+ /* xfract should be in 12.20 format */
+ xfract = (X & (q31_t)0x000FFFFF);
+
+ /* Read two nearest output values from the index */
+ x1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) ];
+ x2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) + 1];
+
+ /* 20 bits for the fractional part */
+ /* yfract should be in 12.20 format */
+ yfract = (Y & (q31_t)0x000FFFFF);
+
+ /* Read two nearest output values from the index */
+ y1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) ];
+ y2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) + 1];
+
+ /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 16.47 format */
+ out = ((x1 * (0xFFFFF - xfract)));
+ acc = (((q63_t) out * (0xFFFFF - yfract)));
+
+ /* x2 * (xfract) * (1-yfract) in 2.22 and adding to acc */
+ out = ((x2 * (0xFFFFF - yfract)));
+ acc += (((q63_t) out * (xfract)));
+
+ /* y1 * (1 - xfract) * (yfract) in 2.22 and adding to acc */
+ out = ((y1 * (0xFFFFF - xfract)));
+ acc += (((q63_t) out * (yfract)));
+
+ /* y2 * (xfract) * (yfract) in 2.22 and adding to acc */
+ out = ((y2 * (yfract)));
+ acc += (((q63_t) out * (xfract)));
+
+ /* acc in 16.47 format and down shift by 40 to convert to 1.7 format */
+ return ((q7_t)(acc >> 40));
+ }
+
+ /**
+ * @} end of BilinearInterpolate group
+ */
+
+
+/* SMMLAR */
+#define multAcc_32x32_keep32_R(a, x, y) \
+ a = (q31_t) (((((q63_t) a) << 32) + ((q63_t) x * y) + 0x80000000LL ) >> 32)
+
+/* SMMLSR */
+#define multSub_32x32_keep32_R(a, x, y) \
+ a = (q31_t) (((((q63_t) a) << 32) - ((q63_t) x * y) + 0x80000000LL ) >> 32)
+
+/* SMMULR */
+#define mult_32x32_keep32_R(a, x, y) \
+ a = (q31_t) (((q63_t) x * y + 0x80000000LL ) >> 32)
+
+/* SMMLA */
+#define multAcc_32x32_keep32(a, x, y) \
+ a += (q31_t) (((q63_t) x * y) >> 32)
+
+/* SMMLS */
+#define multSub_32x32_keep32(a, x, y) \
+ a -= (q31_t) (((q63_t) x * y) >> 32)
+
+/* SMMUL */
+#define mult_32x32_keep32(a, x, y) \
+ a = (q31_t) (((q63_t) x * y ) >> 32)
+
+
+#if defined ( __CC_ARM )
+ /* Enter low optimization region - place directly above function definition */
+ #if defined( ARM_MATH_CM4 ) || defined( ARM_MATH_CM7)
+ #define LOW_OPTIMIZATION_ENTER \
+ _Pragma ("push") \
+ _Pragma ("O1")
+ #else
+ #define LOW_OPTIMIZATION_ENTER
+ #endif
+
+ /* Exit low optimization region - place directly after end of function definition */
+ #if defined( ARM_MATH_CM4 ) || defined( ARM_MATH_CM7)
+ #define LOW_OPTIMIZATION_EXIT \
+ _Pragma ("pop")
+ #else
+ #define LOW_OPTIMIZATION_EXIT
+ #endif
+
+ /* Enter low optimization region - place directly above function definition */
+ #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+
+ /* Exit low optimization region - place directly after end of function definition */
+ #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #define LOW_OPTIMIZATION_ENTER
+ #define LOW_OPTIMIZATION_EXIT
+ #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+ #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+
+#elif defined(__GNUC__)
+ #define LOW_OPTIMIZATION_ENTER __attribute__(( optimize("-O1") ))
+ #define LOW_OPTIMIZATION_EXIT
+ #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+ #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+
+#elif defined(__ICCARM__)
+ /* Enter low optimization region - place directly above function definition */
+ #if defined( ARM_MATH_CM4 ) || defined( ARM_MATH_CM7)
+ #define LOW_OPTIMIZATION_ENTER \
+ _Pragma ("optimize=low")
+ #else
+ #define LOW_OPTIMIZATION_ENTER
+ #endif
+
+ /* Exit low optimization region - place directly after end of function definition */
+ #define LOW_OPTIMIZATION_EXIT
+
+ /* Enter low optimization region - place directly above function definition */
+ #if defined( ARM_MATH_CM4 ) || defined( ARM_MATH_CM7)
+ #define IAR_ONLY_LOW_OPTIMIZATION_ENTER \
+ _Pragma ("optimize=low")
+ #else
+ #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+ #endif
+
+ /* Exit low optimization region - place directly after end of function definition */
+ #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+
+#elif defined(__CSMC__)
+ #define LOW_OPTIMIZATION_ENTER
+ #define LOW_OPTIMIZATION_EXIT
+ #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+ #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+
+#elif defined(__TASKING__)
+ #define LOW_OPTIMIZATION_ENTER
+ #define LOW_OPTIMIZATION_EXIT
+ #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+ #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#if defined ( __GNUC__ )
+#pragma GCC diagnostic pop
+#endif
+
+#endif /* _ARM_MATH_H */
+
+/**
+ *
+ * End of file.
+ */
diff --git a/third_party/NordicSemiconductor/cmsis/cmsis_armcc.h b/third_party/NordicSemiconductor/cmsis/cmsis_armcc.h
index f2bb66a..74c49c6 100644
--- a/third_party/NordicSemiconductor/cmsis/cmsis_armcc.h
+++ b/third_party/NordicSemiconductor/cmsis/cmsis_armcc.h
@@ -1,734 +1,734 @@
-/**************************************************************************//**
- * @file cmsis_armcc.h
- * @brief CMSIS Cortex-M Core Function/Instruction Header File
- * @version V4.30
- * @date 20. October 2015
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
- All rights reserved.
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
- - Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- - Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
- - Neither the name of ARM nor the names of its contributors may be used
- to endorse or promote products derived from this software without
- specific prior written permission.
- *
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
- ---------------------------------------------------------------------------*/
-
-
-#ifndef __CMSIS_ARMCC_H
-#define __CMSIS_ARMCC_H
-
-
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)
- #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
-#endif
-
-/* ########################### Core Function Access ########################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
- @{
- */
-
-/* intrinsic void __enable_irq(); */
-/* intrinsic void __disable_irq(); */
-
-/**
- \brief Get Control Register
- \details Returns the content of the Control Register.
- \return Control Register value
- */
-__STATIC_INLINE uint32_t __get_CONTROL(void)
-{
- register uint32_t __regControl __ASM("control");
- return(__regControl);
-}
-
-
-/**
- \brief Set Control Register
- \details Writes the given value to the Control Register.
- \param [in] control Control Register value to set
- */
-__STATIC_INLINE void __set_CONTROL(uint32_t control)
-{
- register uint32_t __regControl __ASM("control");
- __regControl = control;
-}
-
-
-/**
- \brief Get IPSR Register
- \details Returns the content of the IPSR Register.
- \return IPSR Register value
- */
-__STATIC_INLINE uint32_t __get_IPSR(void)
-{
- register uint32_t __regIPSR __ASM("ipsr");
- return(__regIPSR);
-}
-
-
-/**
- \brief Get APSR Register
- \details Returns the content of the APSR Register.
- \return APSR Register value
- */
-__STATIC_INLINE uint32_t __get_APSR(void)
-{
- register uint32_t __regAPSR __ASM("apsr");
- return(__regAPSR);
-}
-
-
-/**
- \brief Get xPSR Register
- \details Returns the content of the xPSR Register.
- \return xPSR Register value
- */
-__STATIC_INLINE uint32_t __get_xPSR(void)
-{
- register uint32_t __regXPSR __ASM("xpsr");
- return(__regXPSR);
-}
-
-
-/**
- \brief Get Process Stack Pointer
- \details Returns the current value of the Process Stack Pointer (PSP).
- \return PSP Register value
- */
-__STATIC_INLINE uint32_t __get_PSP(void)
-{
- register uint32_t __regProcessStackPointer __ASM("psp");
- return(__regProcessStackPointer);
-}
-
-
-/**
- \brief Set Process Stack Pointer
- \details Assigns the given value to the Process Stack Pointer (PSP).
- \param [in] topOfProcStack Process Stack Pointer value to set
- */
-__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
-{
- register uint32_t __regProcessStackPointer __ASM("psp");
- __regProcessStackPointer = topOfProcStack;
-}
-
-
-/**
- \brief Get Main Stack Pointer
- \details Returns the current value of the Main Stack Pointer (MSP).
- \return MSP Register value
- */
-__STATIC_INLINE uint32_t __get_MSP(void)
-{
- register uint32_t __regMainStackPointer __ASM("msp");
- return(__regMainStackPointer);
-}
-
-
-/**
- \brief Set Main Stack Pointer
- \details Assigns the given value to the Main Stack Pointer (MSP).
- \param [in] topOfMainStack Main Stack Pointer value to set
- */
-__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
-{
- register uint32_t __regMainStackPointer __ASM("msp");
- __regMainStackPointer = topOfMainStack;
-}
-
-
-/**
- \brief Get Priority Mask
- \details Returns the current state of the priority mask bit from the Priority Mask Register.
- \return Priority Mask value
- */
-__STATIC_INLINE uint32_t __get_PRIMASK(void)
-{
- register uint32_t __regPriMask __ASM("primask");
- return(__regPriMask);
-}
-
-
-/**
- \brief Set Priority Mask
- \details Assigns the given value to the Priority Mask Register.
- \param [in] priMask Priority Mask
- */
-__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
-{
- register uint32_t __regPriMask __ASM("primask");
- __regPriMask = (priMask);
-}
-
-
-#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)
-
-/**
- \brief Enable FIQ
- \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-#define __enable_fault_irq __enable_fiq
-
-
-/**
- \brief Disable FIQ
- \details Disables FIQ interrupts by setting the F-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-#define __disable_fault_irq __disable_fiq
-
-
-/**
- \brief Get Base Priority
- \details Returns the current value of the Base Priority register.
- \return Base Priority register value
- */
-__STATIC_INLINE uint32_t __get_BASEPRI(void)
-{
- register uint32_t __regBasePri __ASM("basepri");
- return(__regBasePri);
-}
-
-
-/**
- \brief Set Base Priority
- \details Assigns the given value to the Base Priority register.
- \param [in] basePri Base Priority value to set
- */
-__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
-{
- register uint32_t __regBasePri __ASM("basepri");
- __regBasePri = (basePri & 0xFFU);
-}
-
-
-/**
- \brief Set Base Priority with condition
- \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
- or the new value increases the BASEPRI priority level.
- \param [in] basePri Base Priority value to set
- */
-__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
-{
- register uint32_t __regBasePriMax __ASM("basepri_max");
- __regBasePriMax = (basePri & 0xFFU);
-}
-
-
-/**
- \brief Get Fault Mask
- \details Returns the current value of the Fault Mask register.
- \return Fault Mask register value
- */
-__STATIC_INLINE uint32_t __get_FAULTMASK(void)
-{
- register uint32_t __regFaultMask __ASM("faultmask");
- return(__regFaultMask);
-}
-
-
-/**
- \brief Set Fault Mask
- \details Assigns the given value to the Fault Mask register.
- \param [in] faultMask Fault Mask value to set
- */
-__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
-{
- register uint32_t __regFaultMask __ASM("faultmask");
- __regFaultMask = (faultMask & (uint32_t)1);
-}
-
-#endif /* (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) */
-
-
-#if (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U)
-
-/**
- \brief Get FPSCR
- \details Returns the current value of the Floating Point Status/Control register.
- \return Floating Point Status/Control register value
- */
-__STATIC_INLINE uint32_t __get_FPSCR(void)
-{
-#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
- register uint32_t __regfpscr __ASM("fpscr");
- return(__regfpscr);
-#else
- return(0U);
-#endif
-}
-
-
-/**
- \brief Set FPSCR
- \details Assigns the given value to the Floating Point Status/Control register.
- \param [in] fpscr Floating Point Status/Control value to set
- */
-__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
-{
-#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
- register uint32_t __regfpscr __ASM("fpscr");
- __regfpscr = (fpscr);
-#endif
-}
-
-#endif /* (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U) */
-
-
-
-/*@} end of CMSIS_Core_RegAccFunctions */
-
-
-/* ########################## Core Instruction Access ######################### */
-/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
- Access to dedicated instructions
- @{
-*/
-
-/**
- \brief No Operation
- \details No Operation does nothing. This instruction can be used for code alignment purposes.
- */
-#define __NOP __nop
-
-
-/**
- \brief Wait For Interrupt
- \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
- */
-#define __WFI __wfi
-
-
-/**
- \brief Wait For Event
- \details Wait For Event is a hint instruction that permits the processor to enter
- a low-power state until one of a number of events occurs.
- */
-#define __WFE __wfe
-
-
-/**
- \brief Send Event
- \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
- */
-#define __SEV __sev
-
-
-/**
- \brief Instruction Synchronization Barrier
- \details Instruction Synchronization Barrier flushes the pipeline in the processor,
- so that all instructions following the ISB are fetched from cache or memory,
- after the instruction has been completed.
- */
-#define __ISB() do {\
- __schedule_barrier();\
- __isb(0xF);\
- __schedule_barrier();\
- } while (0U)
-
-/**
- \brief Data Synchronization Barrier
- \details Acts as a special kind of Data Memory Barrier.
- It completes when all explicit memory accesses before this instruction complete.
- */
-#define __DSB() do {\
- __schedule_barrier();\
- __dsb(0xF);\
- __schedule_barrier();\
- } while (0U)
-
-/**
- \brief Data Memory Barrier
- \details Ensures the apparent order of the explicit memory operations before
- and after the instruction, without ensuring their completion.
- */
-#define __DMB() do {\
- __schedule_barrier();\
- __dmb(0xF);\
- __schedule_barrier();\
- } while (0U)
-
-/**
- \brief Reverse byte order (32 bit)
- \details Reverses the byte order in integer value.
- \param [in] value Value to reverse
- \return Reversed value
- */
-#define __REV __rev
-
-
-/**
- \brief Reverse byte order (16 bit)
- \details Reverses the byte order in two unsigned short values.
- \param [in] value Value to reverse
- \return Reversed value
- */
-#ifndef __NO_EMBEDDED_ASM
-__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
-{
- rev16 r0, r0
- bx lr
-}
-#endif
-
-/**
- \brief Reverse byte order in signed short value
- \details Reverses the byte order in a signed short value with sign extension to integer.
- \param [in] value Value to reverse
- \return Reversed value
- */
-#ifndef __NO_EMBEDDED_ASM
-__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
-{
- revsh r0, r0
- bx lr
-}
-#endif
-
-
-/**
- \brief Rotate Right in unsigned value (32 bit)
- \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
- \param [in] value Value to rotate
- \param [in] value Number of Bits to rotate
- \return Rotated value
- */
-#define __ROR __ror
-
-
-/**
- \brief Breakpoint
- \details Causes the processor to enter Debug state.
- Debug tools can use this to investigate system state when the instruction at a particular address is reached.
- \param [in] value is ignored by the processor.
- If required, a debugger can use it to store additional information about the breakpoint.
- */
-#define __BKPT(value) __breakpoint(value)
-
-
-/**
- \brief Reverse bit order of value
- \details Reverses the bit order of the given value.
- \param [in] value Value to reverse
- \return Reversed value
- */
-#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)
- #define __RBIT __rbit
-#else
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
-{
- uint32_t result;
- int32_t s = 4 /*sizeof(v)*/ * 8 - 1; /* extra shift needed at end */
-
- result = value; /* r will be reversed bits of v; first get LSB of v */
- for (value >>= 1U; value; value >>= 1U)
- {
- result <<= 1U;
- result |= value & 1U;
- s--;
- }
- result <<= s; /* shift when v's highest bits are zero */
- return(result);
-}
-#endif
-
-
-/**
- \brief Count leading zeros
- \details Counts the number of leading zeros of a data value.
- \param [in] value Value to count the leading zeros
- \return number of leading zeros in value
- */
-#define __CLZ __clz
-
-
-#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)
-
-/**
- \brief LDR Exclusive (8 bit)
- \details Executes a exclusive LDR instruction for 8 bit value.
- \param [in] ptr Pointer to data
- \return value of type uint8_t at (*ptr)
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
- #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
-#else
- #define __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop")
-#endif
-
-
-/**
- \brief LDR Exclusive (16 bit)
- \details Executes a exclusive LDR instruction for 16 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint16_t at (*ptr)
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
- #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
-#else
- #define __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop")
-#endif
-
-
-/**
- \brief LDR Exclusive (32 bit)
- \details Executes a exclusive LDR instruction for 32 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint32_t at (*ptr)
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
- #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
-#else
- #define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop")
-#endif
-
-
-/**
- \brief STR Exclusive (8 bit)
- \details Executes a exclusive STR instruction for 8 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
- #define __STREXB(value, ptr) __strex(value, ptr)
-#else
- #define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
-#endif
-
-
-/**
- \brief STR Exclusive (16 bit)
- \details Executes a exclusive STR instruction for 16 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
- #define __STREXH(value, ptr) __strex(value, ptr)
-#else
- #define __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
-#endif
-
-
-/**
- \brief STR Exclusive (32 bit)
- \details Executes a exclusive STR instruction for 32 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
- #define __STREXW(value, ptr) __strex(value, ptr)
-#else
- #define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
-#endif
-
-
-/**
- \brief Remove the exclusive lock
- \details Removes the exclusive lock which is created by LDREX.
- */
-#define __CLREX __clrex
-
-
-/**
- \brief Signed Saturate
- \details Saturates a signed value.
- \param [in] value Value to be saturated
- \param [in] sat Bit position to saturate to (1..32)
- \return Saturated value
- */
-#define __SSAT __ssat
-
-
-/**
- \brief Unsigned Saturate
- \details Saturates an unsigned value.
- \param [in] value Value to be saturated
- \param [in] sat Bit position to saturate to (0..31)
- \return Saturated value
- */
-#define __USAT __usat
-
-
-/**
- \brief Rotate Right with Extend (32 bit)
- \details Moves each bit of a bitstring right by one bit.
- The carry input is shifted in at the left end of the bitstring.
- \param [in] value Value to rotate
- \return Rotated value
- */
-#ifndef __NO_EMBEDDED_ASM
-__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
-{
- rrx r0, r0
- bx lr
-}
-#endif
-
-
-/**
- \brief LDRT Unprivileged (8 bit)
- \details Executes a Unprivileged LDRT instruction for 8 bit value.
- \param [in] ptr Pointer to data
- \return value of type uint8_t at (*ptr)
- */
-#define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
-
-
-/**
- \brief LDRT Unprivileged (16 bit)
- \details Executes a Unprivileged LDRT instruction for 16 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint16_t at (*ptr)
- */
-#define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
-
-
-/**
- \brief LDRT Unprivileged (32 bit)
- \details Executes a Unprivileged LDRT instruction for 32 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint32_t at (*ptr)
- */
-#define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
-
-
-/**
- \brief STRT Unprivileged (8 bit)
- \details Executes a Unprivileged STRT instruction for 8 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-#define __STRBT(value, ptr) __strt(value, ptr)
-
-
-/**
- \brief STRT Unprivileged (16 bit)
- \details Executes a Unprivileged STRT instruction for 16 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-#define __STRHT(value, ptr) __strt(value, ptr)
-
-
-/**
- \brief STRT Unprivileged (32 bit)
- \details Executes a Unprivileged STRT instruction for 32 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-#define __STRT(value, ptr) __strt(value, ptr)
-
-#endif /* (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) */
-
-/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
-
-
-/* ################### Compiler specific Intrinsics ########################### */
-/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
- Access to dedicated SIMD instructions
- @{
-*/
-
-#if (__CORTEX_M >= 0x04U) /* only for Cortex-M4 and above */
-
-#define __SADD8 __sadd8
-#define __QADD8 __qadd8
-#define __SHADD8 __shadd8
-#define __UADD8 __uadd8
-#define __UQADD8 __uqadd8
-#define __UHADD8 __uhadd8
-#define __SSUB8 __ssub8
-#define __QSUB8 __qsub8
-#define __SHSUB8 __shsub8
-#define __USUB8 __usub8
-#define __UQSUB8 __uqsub8
-#define __UHSUB8 __uhsub8
-#define __SADD16 __sadd16
-#define __QADD16 __qadd16
-#define __SHADD16 __shadd16
-#define __UADD16 __uadd16
-#define __UQADD16 __uqadd16
-#define __UHADD16 __uhadd16
-#define __SSUB16 __ssub16
-#define __QSUB16 __qsub16
-#define __SHSUB16 __shsub16
-#define __USUB16 __usub16
-#define __UQSUB16 __uqsub16
-#define __UHSUB16 __uhsub16
-#define __SASX __sasx
-#define __QASX __qasx
-#define __SHASX __shasx
-#define __UASX __uasx
-#define __UQASX __uqasx
-#define __UHASX __uhasx
-#define __SSAX __ssax
-#define __QSAX __qsax
-#define __SHSAX __shsax
-#define __USAX __usax
-#define __UQSAX __uqsax
-#define __UHSAX __uhsax
-#define __USAD8 __usad8
-#define __USADA8 __usada8
-#define __SSAT16 __ssat16
-#define __USAT16 __usat16
-#define __UXTB16 __uxtb16
-#define __UXTAB16 __uxtab16
-#define __SXTB16 __sxtb16
-#define __SXTAB16 __sxtab16
-#define __SMUAD __smuad
-#define __SMUADX __smuadx
-#define __SMLAD __smlad
-#define __SMLADX __smladx
-#define __SMLALD __smlald
-#define __SMLALDX __smlaldx
-#define __SMUSD __smusd
-#define __SMUSDX __smusdx
-#define __SMLSD __smlsd
-#define __SMLSDX __smlsdx
-#define __SMLSLD __smlsld
-#define __SMLSLDX __smlsldx
-#define __SEL __sel
-#define __QADD __qadd
-#define __QSUB __qsub
-
-#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
- ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
-
-#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
- ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
-
-#define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
- ((int64_t)(ARG3) << 32U) ) >> 32U))
-
-#endif /* (__CORTEX_M >= 0x04) */
-/*@} end of group CMSIS_SIMD_intrinsics */
-
-
-#endif /* __CMSIS_ARMCC_H */
+/**************************************************************************//**
+ * @file cmsis_armcc.h
+ * @brief CMSIS Cortex-M Core Function/Instruction Header File
+ * @version V4.30
+ * @date 20. October 2015
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2015 ARM LIMITED
+
+ All rights reserved.
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ - Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ - Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ - Neither the name of ARM nor the names of its contributors may be used
+ to endorse or promote products derived from this software without
+ specific prior written permission.
+ *
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+ ---------------------------------------------------------------------------*/
+
+
+#ifndef __CMSIS_ARMCC_H
+#define __CMSIS_ARMCC_H
+
+
+#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)
+ #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
+#endif
+
+/* ########################### Core Function Access ########################### */
+/** \ingroup CMSIS_Core_FunctionInterface
+ \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
+ @{
+ */
+
+/* intrinsic void __enable_irq(); */
+/* intrinsic void __disable_irq(); */
+
+/**
+ \brief Get Control Register
+ \details Returns the content of the Control Register.
+ \return Control Register value
+ */
+__STATIC_INLINE uint32_t __get_CONTROL(void)
+{
+ register uint32_t __regControl __ASM("control");
+ return(__regControl);
+}
+
+
+/**
+ \brief Set Control Register
+ \details Writes the given value to the Control Register.
+ \param [in] control Control Register value to set
+ */
+__STATIC_INLINE void __set_CONTROL(uint32_t control)
+{
+ register uint32_t __regControl __ASM("control");
+ __regControl = control;
+}
+
+
+/**
+ \brief Get IPSR Register
+ \details Returns the content of the IPSR Register.
+ \return IPSR Register value
+ */
+__STATIC_INLINE uint32_t __get_IPSR(void)
+{
+ register uint32_t __regIPSR __ASM("ipsr");
+ return(__regIPSR);
+}
+
+
+/**
+ \brief Get APSR Register
+ \details Returns the content of the APSR Register.
+ \return APSR Register value
+ */
+__STATIC_INLINE uint32_t __get_APSR(void)
+{
+ register uint32_t __regAPSR __ASM("apsr");
+ return(__regAPSR);
+}
+
+
+/**
+ \brief Get xPSR Register
+ \details Returns the content of the xPSR Register.
+ \return xPSR Register value
+ */
+__STATIC_INLINE uint32_t __get_xPSR(void)
+{
+ register uint32_t __regXPSR __ASM("xpsr");
+ return(__regXPSR);
+}
+
+
+/**
+ \brief Get Process Stack Pointer
+ \details Returns the current value of the Process Stack Pointer (PSP).
+ \return PSP Register value
+ */
+__STATIC_INLINE uint32_t __get_PSP(void)
+{
+ register uint32_t __regProcessStackPointer __ASM("psp");
+ return(__regProcessStackPointer);
+}
+
+
+/**
+ \brief Set Process Stack Pointer
+ \details Assigns the given value to the Process Stack Pointer (PSP).
+ \param [in] topOfProcStack Process Stack Pointer value to set
+ */
+__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
+{
+ register uint32_t __regProcessStackPointer __ASM("psp");
+ __regProcessStackPointer = topOfProcStack;
+}
+
+
+/**
+ \brief Get Main Stack Pointer
+ \details Returns the current value of the Main Stack Pointer (MSP).
+ \return MSP Register value
+ */
+__STATIC_INLINE uint32_t __get_MSP(void)
+{
+ register uint32_t __regMainStackPointer __ASM("msp");
+ return(__regMainStackPointer);
+}
+
+
+/**
+ \brief Set Main Stack Pointer
+ \details Assigns the given value to the Main Stack Pointer (MSP).
+ \param [in] topOfMainStack Main Stack Pointer value to set
+ */
+__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
+{
+ register uint32_t __regMainStackPointer __ASM("msp");
+ __regMainStackPointer = topOfMainStack;
+}
+
+
+/**
+ \brief Get Priority Mask
+ \details Returns the current state of the priority mask bit from the Priority Mask Register.
+ \return Priority Mask value
+ */
+__STATIC_INLINE uint32_t __get_PRIMASK(void)
+{
+ register uint32_t __regPriMask __ASM("primask");
+ return(__regPriMask);
+}
+
+
+/**
+ \brief Set Priority Mask
+ \details Assigns the given value to the Priority Mask Register.
+ \param [in] priMask Priority Mask
+ */
+__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
+{
+ register uint32_t __regPriMask __ASM("primask");
+ __regPriMask = (priMask);
+}
+
+
+#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)
+
+/**
+ \brief Enable FIQ
+ \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
+ Can only be executed in Privileged modes.
+ */
+#define __enable_fault_irq __enable_fiq
+
+
+/**
+ \brief Disable FIQ
+ \details Disables FIQ interrupts by setting the F-bit in the CPSR.
+ Can only be executed in Privileged modes.
+ */
+#define __disable_fault_irq __disable_fiq
+
+
+/**
+ \brief Get Base Priority
+ \details Returns the current value of the Base Priority register.
+ \return Base Priority register value
+ */
+__STATIC_INLINE uint32_t __get_BASEPRI(void)
+{
+ register uint32_t __regBasePri __ASM("basepri");
+ return(__regBasePri);
+}
+
+
+/**
+ \brief Set Base Priority
+ \details Assigns the given value to the Base Priority register.
+ \param [in] basePri Base Priority value to set
+ */
+__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
+{
+ register uint32_t __regBasePri __ASM("basepri");
+ __regBasePri = (basePri & 0xFFU);
+}
+
+
+/**
+ \brief Set Base Priority with condition
+ \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
+ or the new value increases the BASEPRI priority level.
+ \param [in] basePri Base Priority value to set
+ */
+__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
+{
+ register uint32_t __regBasePriMax __ASM("basepri_max");
+ __regBasePriMax = (basePri & 0xFFU);
+}
+
+
+/**
+ \brief Get Fault Mask
+ \details Returns the current value of the Fault Mask register.
+ \return Fault Mask register value
+ */
+__STATIC_INLINE uint32_t __get_FAULTMASK(void)
+{
+ register uint32_t __regFaultMask __ASM("faultmask");
+ return(__regFaultMask);
+}
+
+
+/**
+ \brief Set Fault Mask
+ \details Assigns the given value to the Fault Mask register.
+ \param [in] faultMask Fault Mask value to set
+ */
+__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
+{
+ register uint32_t __regFaultMask __ASM("faultmask");
+ __regFaultMask = (faultMask & (uint32_t)1);
+}
+
+#endif /* (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) */
+
+
+#if (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U)
+
+/**
+ \brief Get FPSCR
+ \details Returns the current value of the Floating Point Status/Control register.
+ \return Floating Point Status/Control register value
+ */
+__STATIC_INLINE uint32_t __get_FPSCR(void)
+{
+#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
+ register uint32_t __regfpscr __ASM("fpscr");
+ return(__regfpscr);
+#else
+ return(0U);
+#endif
+}
+
+
+/**
+ \brief Set FPSCR
+ \details Assigns the given value to the Floating Point Status/Control register.
+ \param [in] fpscr Floating Point Status/Control value to set
+ */
+__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
+{
+#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
+ register uint32_t __regfpscr __ASM("fpscr");
+ __regfpscr = (fpscr);
+#endif
+}
+
+#endif /* (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U) */
+
+
+
+/*@} end of CMSIS_Core_RegAccFunctions */
+
+
+/* ########################## Core Instruction Access ######################### */
+/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
+ Access to dedicated instructions
+ @{
+*/
+
+/**
+ \brief No Operation
+ \details No Operation does nothing. This instruction can be used for code alignment purposes.
+ */
+#define __NOP __nop
+
+
+/**
+ \brief Wait For Interrupt
+ \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
+ */
+#define __WFI __wfi
+
+
+/**
+ \brief Wait For Event
+ \details Wait For Event is a hint instruction that permits the processor to enter
+ a low-power state until one of a number of events occurs.
+ */
+#define __WFE __wfe
+
+
+/**
+ \brief Send Event
+ \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
+ */
+#define __SEV __sev
+
+
+/**
+ \brief Instruction Synchronization Barrier
+ \details Instruction Synchronization Barrier flushes the pipeline in the processor,
+ so that all instructions following the ISB are fetched from cache or memory,
+ after the instruction has been completed.
+ */
+#define __ISB() do {\
+ __schedule_barrier();\
+ __isb(0xF);\
+ __schedule_barrier();\
+ } while (0U)
+
+/**
+ \brief Data Synchronization Barrier
+ \details Acts as a special kind of Data Memory Barrier.
+ It completes when all explicit memory accesses before this instruction complete.
+ */
+#define __DSB() do {\
+ __schedule_barrier();\
+ __dsb(0xF);\
+ __schedule_barrier();\
+ } while (0U)
+
+/**
+ \brief Data Memory Barrier
+ \details Ensures the apparent order of the explicit memory operations before
+ and after the instruction, without ensuring their completion.
+ */
+#define __DMB() do {\
+ __schedule_barrier();\
+ __dmb(0xF);\
+ __schedule_barrier();\
+ } while (0U)
+
+/**
+ \brief Reverse byte order (32 bit)
+ \details Reverses the byte order in integer value.
+ \param [in] value Value to reverse
+ \return Reversed value
+ */
+#define __REV __rev
+
+
+/**
+ \brief Reverse byte order (16 bit)
+ \details Reverses the byte order in two unsigned short values.
+ \param [in] value Value to reverse
+ \return Reversed value
+ */
+#ifndef __NO_EMBEDDED_ASM
+__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
+{
+ rev16 r0, r0
+ bx lr
+}
+#endif
+
+/**
+ \brief Reverse byte order in signed short value
+ \details Reverses the byte order in a signed short value with sign extension to integer.
+ \param [in] value Value to reverse
+ \return Reversed value
+ */
+#ifndef __NO_EMBEDDED_ASM
+__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
+{
+ revsh r0, r0
+ bx lr
+}
+#endif
+
+
+/**
+ \brief Rotate Right in unsigned value (32 bit)
+ \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
+ \param [in] value Value to rotate
+ \param [in] value Number of Bits to rotate
+ \return Rotated value
+ */
+#define __ROR __ror
+
+
+/**
+ \brief Breakpoint
+ \details Causes the processor to enter Debug state.
+ Debug tools can use this to investigate system state when the instruction at a particular address is reached.
+ \param [in] value is ignored by the processor.
+ If required, a debugger can use it to store additional information about the breakpoint.
+ */
+#define __BKPT(value) __breakpoint(value)
+
+
+/**
+ \brief Reverse bit order of value
+ \details Reverses the bit order of the given value.
+ \param [in] value Value to reverse
+ \return Reversed value
+ */
+#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)
+ #define __RBIT __rbit
+#else
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
+{
+ uint32_t result;
+ int32_t s = 4 /*sizeof(v)*/ * 8 - 1; /* extra shift needed at end */
+
+ result = value; /* r will be reversed bits of v; first get LSB of v */
+ for (value >>= 1U; value; value >>= 1U)
+ {
+ result <<= 1U;
+ result |= value & 1U;
+ s--;
+ }
+ result <<= s; /* shift when v's highest bits are zero */
+ return(result);
+}
+#endif
+
+
+/**
+ \brief Count leading zeros
+ \details Counts the number of leading zeros of a data value.
+ \param [in] value Value to count the leading zeros
+ \return number of leading zeros in value
+ */
+#define __CLZ __clz
+
+
+#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)
+
+/**
+ \brief LDR Exclusive (8 bit)
+ \details Executes a exclusive LDR instruction for 8 bit value.
+ \param [in] ptr Pointer to data
+ \return value of type uint8_t at (*ptr)
+ */
+#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
+ #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
+#else
+ #define __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop")
+#endif
+
+
+/**
+ \brief LDR Exclusive (16 bit)
+ \details Executes a exclusive LDR instruction for 16 bit values.
+ \param [in] ptr Pointer to data
+ \return value of type uint16_t at (*ptr)
+ */
+#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
+ #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
+#else
+ #define __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop")
+#endif
+
+
+/**
+ \brief LDR Exclusive (32 bit)
+ \details Executes a exclusive LDR instruction for 32 bit values.
+ \param [in] ptr Pointer to data
+ \return value of type uint32_t at (*ptr)
+ */
+#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
+ #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
+#else
+ #define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop")
+#endif
+
+
+/**
+ \brief STR Exclusive (8 bit)
+ \details Executes a exclusive STR instruction for 8 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ \return 0 Function succeeded
+ \return 1 Function failed
+ */
+#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
+ #define __STREXB(value, ptr) __strex(value, ptr)
+#else
+ #define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
+#endif
+
+
+/**
+ \brief STR Exclusive (16 bit)
+ \details Executes a exclusive STR instruction for 16 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ \return 0 Function succeeded
+ \return 1 Function failed
+ */
+#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
+ #define __STREXH(value, ptr) __strex(value, ptr)
+#else
+ #define __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
+#endif
+
+
+/**
+ \brief STR Exclusive (32 bit)
+ \details Executes a exclusive STR instruction for 32 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ \return 0 Function succeeded
+ \return 1 Function failed
+ */
+#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
+ #define __STREXW(value, ptr) __strex(value, ptr)
+#else
+ #define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
+#endif
+
+
+/**
+ \brief Remove the exclusive lock
+ \details Removes the exclusive lock which is created by LDREX.
+ */
+#define __CLREX __clrex
+
+
+/**
+ \brief Signed Saturate
+ \details Saturates a signed value.
+ \param [in] value Value to be saturated
+ \param [in] sat Bit position to saturate to (1..32)
+ \return Saturated value
+ */
+#define __SSAT __ssat
+
+
+/**
+ \brief Unsigned Saturate
+ \details Saturates an unsigned value.
+ \param [in] value Value to be saturated
+ \param [in] sat Bit position to saturate to (0..31)
+ \return Saturated value
+ */
+#define __USAT __usat
+
+
+/**
+ \brief Rotate Right with Extend (32 bit)
+ \details Moves each bit of a bitstring right by one bit.
+ The carry input is shifted in at the left end of the bitstring.
+ \param [in] value Value to rotate
+ \return Rotated value
+ */
+#ifndef __NO_EMBEDDED_ASM
+__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
+{
+ rrx r0, r0
+ bx lr
+}
+#endif
+
+
+/**
+ \brief LDRT Unprivileged (8 bit)
+ \details Executes a Unprivileged LDRT instruction for 8 bit value.
+ \param [in] ptr Pointer to data
+ \return value of type uint8_t at (*ptr)
+ */
+#define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
+
+
+/**
+ \brief LDRT Unprivileged (16 bit)
+ \details Executes a Unprivileged LDRT instruction for 16 bit values.
+ \param [in] ptr Pointer to data
+ \return value of type uint16_t at (*ptr)
+ */
+#define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
+
+
+/**
+ \brief LDRT Unprivileged (32 bit)
+ \details Executes a Unprivileged LDRT instruction for 32 bit values.
+ \param [in] ptr Pointer to data
+ \return value of type uint32_t at (*ptr)
+ */
+#define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
+
+
+/**
+ \brief STRT Unprivileged (8 bit)
+ \details Executes a Unprivileged STRT instruction for 8 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ */
+#define __STRBT(value, ptr) __strt(value, ptr)
+
+
+/**
+ \brief STRT Unprivileged (16 bit)
+ \details Executes a Unprivileged STRT instruction for 16 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ */
+#define __STRHT(value, ptr) __strt(value, ptr)
+
+
+/**
+ \brief STRT Unprivileged (32 bit)
+ \details Executes a Unprivileged STRT instruction for 32 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ */
+#define __STRT(value, ptr) __strt(value, ptr)
+
+#endif /* (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) */
+
+/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
+
+
+/* ################### Compiler specific Intrinsics ########################### */
+/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
+ Access to dedicated SIMD instructions
+ @{
+*/
+
+#if (__CORTEX_M >= 0x04U) /* only for Cortex-M4 and above */
+
+#define __SADD8 __sadd8
+#define __QADD8 __qadd8
+#define __SHADD8 __shadd8
+#define __UADD8 __uadd8
+#define __UQADD8 __uqadd8
+#define __UHADD8 __uhadd8
+#define __SSUB8 __ssub8
+#define __QSUB8 __qsub8
+#define __SHSUB8 __shsub8
+#define __USUB8 __usub8
+#define __UQSUB8 __uqsub8
+#define __UHSUB8 __uhsub8
+#define __SADD16 __sadd16
+#define __QADD16 __qadd16
+#define __SHADD16 __shadd16
+#define __UADD16 __uadd16
+#define __UQADD16 __uqadd16
+#define __UHADD16 __uhadd16
+#define __SSUB16 __ssub16
+#define __QSUB16 __qsub16
+#define __SHSUB16 __shsub16
+#define __USUB16 __usub16
+#define __UQSUB16 __uqsub16
+#define __UHSUB16 __uhsub16
+#define __SASX __sasx
+#define __QASX __qasx
+#define __SHASX __shasx
+#define __UASX __uasx
+#define __UQASX __uqasx
+#define __UHASX __uhasx
+#define __SSAX __ssax
+#define __QSAX __qsax
+#define __SHSAX __shsax
+#define __USAX __usax
+#define __UQSAX __uqsax
+#define __UHSAX __uhsax
+#define __USAD8 __usad8
+#define __USADA8 __usada8
+#define __SSAT16 __ssat16
+#define __USAT16 __usat16
+#define __UXTB16 __uxtb16
+#define __UXTAB16 __uxtab16
+#define __SXTB16 __sxtb16
+#define __SXTAB16 __sxtab16
+#define __SMUAD __smuad
+#define __SMUADX __smuadx
+#define __SMLAD __smlad
+#define __SMLADX __smladx
+#define __SMLALD __smlald
+#define __SMLALDX __smlaldx
+#define __SMUSD __smusd
+#define __SMUSDX __smusdx
+#define __SMLSD __smlsd
+#define __SMLSDX __smlsdx
+#define __SMLSLD __smlsld
+#define __SMLSLDX __smlsldx
+#define __SEL __sel
+#define __QADD __qadd
+#define __QSUB __qsub
+
+#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
+ ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
+
+#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
+ ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
+
+#define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
+ ((int64_t)(ARG3) << 32U) ) >> 32U))
+
+#endif /* (__CORTEX_M >= 0x04) */
+/*@} end of group CMSIS_SIMD_intrinsics */
+
+
+#endif /* __CMSIS_ARMCC_H */
diff --git a/third_party/NordicSemiconductor/cmsis/cmsis_armcc_V6.h b/third_party/NordicSemiconductor/cmsis/cmsis_armcc_V6.h
index d714e9b..cd13240 100644
--- a/third_party/NordicSemiconductor/cmsis/cmsis_armcc_V6.h
+++ b/third_party/NordicSemiconductor/cmsis/cmsis_armcc_V6.h
@@ -1,1800 +1,1800 @@
-/**************************************************************************//**
- * @file cmsis_armcc_V6.h
- * @brief CMSIS Cortex-M Core Function/Instruction Header File
- * @version V4.30
- * @date 20. October 2015
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
- All rights reserved.
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
- - Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- - Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
- - Neither the name of ARM nor the names of its contributors may be used
- to endorse or promote products derived from this software without
- specific prior written permission.
- *
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
- ---------------------------------------------------------------------------*/
-
-
-#ifndef __CMSIS_ARMCC_V6_H
-#define __CMSIS_ARMCC_V6_H
-
-
-/* ########################### Core Function Access ########################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
- @{
- */
-
-/**
- \brief Enable IRQ Interrupts
- \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __enable_irq(void)
-{
- __ASM volatile ("cpsie i" : : : "memory");
-}
-
-
-/**
- \brief Disable IRQ Interrupts
- \details Disables IRQ interrupts by setting the I-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __disable_irq(void)
-{
- __ASM volatile ("cpsid i" : : : "memory");
-}
-
-
-/**
- \brief Get Control Register
- \details Returns the content of the Control Register.
- \return Control Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_CONTROL(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, control" : "=r" (result) );
- return(result);
-}
-
-
-#if (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief Get Control Register (non-secure)
- \details Returns the content of the non-secure Control Register when in secure mode.
- \return non-secure Control Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_CONTROL_NS(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
- return(result);
-}
-#endif
-
-
-/**
- \brief Set Control Register
- \details Writes the given value to the Control Register.
- \param [in] control Control Register value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __set_CONTROL(uint32_t control)
-{
- __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
-}
-
-
-#if (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief Set Control Register (non-secure)
- \details Writes the given value to the non-secure Control Register when in secure state.
- \param [in] control Control Register value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_CONTROL_NS(uint32_t control)
-{
- __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
-}
-#endif
-
-
-/**
- \brief Get IPSR Register
- \details Returns the content of the IPSR Register.
- \return IPSR Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_IPSR(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
- return(result);
-}
-
-
-#if (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief Get IPSR Register (non-secure)
- \details Returns the content of the non-secure IPSR Register when in secure state.
- \return IPSR Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_IPSR_NS(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, ipsr_ns" : "=r" (result) );
- return(result);
-}
-#endif
-
-
-/**
- \brief Get APSR Register
- \details Returns the content of the APSR Register.
- \return APSR Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_APSR(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, apsr" : "=r" (result) );
- return(result);
-}
-
-
-#if (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief Get APSR Register (non-secure)
- \details Returns the content of the non-secure APSR Register when in secure state.
- \return APSR Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_APSR_NS(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, apsr_ns" : "=r" (result) );
- return(result);
-}
-#endif
-
-
-/**
- \brief Get xPSR Register
- \details Returns the content of the xPSR Register.
- \return xPSR Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_xPSR(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
- return(result);
-}
-
-
-#if (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief Get xPSR Register (non-secure)
- \details Returns the content of the non-secure xPSR Register when in secure state.
- \return xPSR Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_xPSR_NS(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, xpsr_ns" : "=r" (result) );
- return(result);
-}
-#endif
-
-
-/**
- \brief Get Process Stack Pointer
- \details Returns the current value of the Process Stack Pointer (PSP).
- \return PSP Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSP(void)
-{
- register uint32_t result;
-
- __ASM volatile ("MRS %0, psp" : "=r" (result) );
- return(result);
-}
-
-
-#if (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief Get Process Stack Pointer (non-secure)
- \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
- \return PSP Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSP_NS(void)
-{
- register uint32_t result;
-
- __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
- return(result);
-}
-#endif
-
-
-/**
- \brief Set Process Stack Pointer
- \details Assigns the given value to the Process Stack Pointer (PSP).
- \param [in] topOfProcStack Process Stack Pointer value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
-{
- __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : "sp");
-}
-
-
-#if (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief Set Process Stack Pointer (non-secure)
- \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
- \param [in] topOfProcStack Process Stack Pointer value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
-{
- __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : "sp");
-}
-#endif
-
-
-/**
- \brief Get Main Stack Pointer
- \details Returns the current value of the Main Stack Pointer (MSP).
- \return MSP Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSP(void)
-{
- register uint32_t result;
-
- __ASM volatile ("MRS %0, msp" : "=r" (result) );
- return(result);
-}
-
-
-#if (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief Get Main Stack Pointer (non-secure)
- \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
- \return MSP Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSP_NS(void)
-{
- register uint32_t result;
-
- __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
- return(result);
-}
-#endif
-
-
-/**
- \brief Set Main Stack Pointer
- \details Assigns the given value to the Main Stack Pointer (MSP).
- \param [in] topOfMainStack Main Stack Pointer value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
-{
- __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : "sp");
-}
-
-
-#if (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief Set Main Stack Pointer (non-secure)
- \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
- \param [in] topOfMainStack Main Stack Pointer value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
-{
- __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : "sp");
-}
-#endif
-
-
-/**
- \brief Get Priority Mask
- \details Returns the current state of the priority mask bit from the Priority Mask Register.
- \return Priority Mask value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PRIMASK(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, primask" : "=r" (result) );
- return(result);
-}
-
-
-#if (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief Get Priority Mask (non-secure)
- \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
- \return Priority Mask value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PRIMASK_NS(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
- return(result);
-}
-#endif
-
-
-/**
- \brief Set Priority Mask
- \details Assigns the given value to the Priority Mask Register.
- \param [in] priMask Priority Mask
- */
-__attribute__((always_inline)) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
-{
- __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
-}
-
-
-#if (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief Set Priority Mask (non-secure)
- \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
- \param [in] priMask Priority Mask
- */
-__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
-{
- __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
-}
-#endif
-
-
-#if ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) /* ToDo: ARMCC_V6: check if this is ok for cortex >=3 */
-
-/**
- \brief Enable FIQ
- \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __enable_fault_irq(void)
-{
- __ASM volatile ("cpsie f" : : : "memory");
-}
-
-
-/**
- \brief Disable FIQ
- \details Disables FIQ interrupts by setting the F-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __disable_fault_irq(void)
-{
- __ASM volatile ("cpsid f" : : : "memory");
-}
-
-
-/**
- \brief Get Base Priority
- \details Returns the current value of the Base Priority register.
- \return Base Priority register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_BASEPRI(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, basepri" : "=r" (result) );
- return(result);
-}
-
-
-#if (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief Get Base Priority (non-secure)
- \details Returns the current value of the non-secure Base Priority register when in secure state.
- \return Base Priority register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_BASEPRI_NS(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
- return(result);
-}
-#endif
-
-
-/**
- \brief Set Base Priority
- \details Assigns the given value to the Base Priority register.
- \param [in] basePri Base Priority value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
-{
- __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
-}
-
-
-#if (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief Set Base Priority (non-secure)
- \details Assigns the given value to the non-secure Base Priority register when in secure state.
- \param [in] basePri Base Priority value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_BASEPRI_NS(uint32_t value)
-{
- __ASM volatile ("MSR basepri_ns, %0" : : "r" (value) : "memory");
-}
-#endif
-
-
-/**
- \brief Set Base Priority with condition
- \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
- or the new value increases the BASEPRI priority level.
- \param [in] basePri Base Priority value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value)
-{
- __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory");
-}
-
-
-#if (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief Set Base Priority with condition (non_secure)
- \details Assigns the given value to the non-secure Base Priority register when in secure state only if BASEPRI masking is disabled,
- or the new value increases the BASEPRI priority level.
- \param [in] basePri Base Priority value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_BASEPRI_MAX_NS(uint32_t value)
-{
- __ASM volatile ("MSR basepri_max_ns, %0" : : "r" (value) : "memory");
-}
-#endif
-
-
-/**
- \brief Get Fault Mask
- \details Returns the current value of the Fault Mask register.
- \return Fault Mask register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
- return(result);
-}
-
-
-#if (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief Get Fault Mask (non-secure)
- \details Returns the current value of the non-secure Fault Mask register when in secure state.
- \return Fault Mask register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_FAULTMASK_NS(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
- return(result);
-}
-#endif
-
-
-/**
- \brief Set Fault Mask
- \details Assigns the given value to the Fault Mask register.
- \param [in] faultMask Fault Mask value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
-{
- __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
-}
-
-
-#if (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief Set Fault Mask (non-secure)
- \details Assigns the given value to the non-secure Fault Mask register when in secure state.
- \param [in] faultMask Fault Mask value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
-{
- __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
-}
-#endif
-
-
-#endif /* ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_8M__ == 1U)) */
-
-
-#if (__ARM_ARCH_8M__ == 1U)
-
-/**
- \brief Get Process Stack Pointer Limit
- \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
- \return PSPLIM Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSPLIM(void)
-{
- register uint32_t result;
-
- __ASM volatile ("MRS %0, psplim" : "=r" (result) );
- return(result);
-}
-
-
-#if (__ARM_FEATURE_CMSE == 3U) && (__ARM_ARCH_PROFILE == 'M') /* ToDo: ARMCC_V6: check predefined macro for mainline */
-/**
- \brief Get Process Stack Pointer Limit (non-secure)
- \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
- \return PSPLIM Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSPLIM_NS(void)
-{
- register uint32_t result;
-
- __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
- return(result);
-}
-#endif
-
-
-/**
- \brief Set Process Stack Pointer Limit
- \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
- \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
-{
- __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
-}
-
-
-#if (__ARM_FEATURE_CMSE == 3U) && (__ARM_ARCH_PROFILE == 'M') /* ToDo: ARMCC_V6: check predefined macro for mainline */
-/**
- \brief Set Process Stack Pointer (non-secure)
- \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
- \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
-{
- __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
-}
-#endif
-
-
-/**
- \brief Get Main Stack Pointer Limit
- \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
- \return MSPLIM Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSPLIM(void)
-{
- register uint32_t result;
-
- __ASM volatile ("MRS %0, msplim" : "=r" (result) );
-
- return(result);
-}
-
-
-#if (__ARM_FEATURE_CMSE == 3U) && (__ARM_ARCH_PROFILE == 'M') /* ToDo: ARMCC_V6: check predefined macro for mainline */
-/**
- \brief Get Main Stack Pointer Limit (non-secure)
- \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
- \return MSPLIM Register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSPLIM_NS(void)
-{
- register uint32_t result;
-
- __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
- return(result);
-}
-#endif
-
-
-/**
- \brief Set Main Stack Pointer Limit
- \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
- \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
-{
- __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
-}
-
-
-#if (__ARM_FEATURE_CMSE == 3U) && (__ARM_ARCH_PROFILE == 'M') /* ToDo: ARMCC_V6: check predefined macro for mainline */
-/**
- \brief Set Main Stack Pointer Limit (non-secure)
- \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
- \param [in] MainStackPtrLimit Main Stack Pointer value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
-{
- __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
-}
-#endif
-
-#endif /* (__ARM_ARCH_8M__ == 1U) */
-
-
-#if ((__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) /* ToDo: ARMCC_V6: check if this is ok for cortex >=4 */
-
-/**
- \brief Get FPSCR
- \details eturns the current value of the Floating Point Status/Control register.
- \return Floating Point Status/Control register value
- */
-#define __get_FPSCR __builtin_arm_get_fpscr
-#if 0
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FPSCR(void)
-{
-#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
- uint32_t result;
-
- __ASM volatile (""); /* Empty asm statement works as a scheduling barrier */
- __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
- __ASM volatile ("");
- return(result);
-#else
- return(0);
-#endif
-}
-#endif
-
-#if (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief Get FPSCR (non-secure)
- \details Returns the current value of the non-secure Floating Point Status/Control register when in secure state.
- \return Floating Point Status/Control register value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_FPSCR_NS(void)
-{
-#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
- uint32_t result;
-
- __ASM volatile (""); /* Empty asm statement works as a scheduling barrier */
- __ASM volatile ("VMRS %0, fpscr_ns" : "=r" (result) );
- __ASM volatile ("");
- return(result);
-#else
- return(0);
-#endif
-}
-#endif
-
-
-/**
- \brief Set FPSCR
- \details Assigns the given value to the Floating Point Status/Control register.
- \param [in] fpscr Floating Point Status/Control value to set
- */
-#define __set_FPSCR __builtin_arm_set_fpscr
-#if 0
-__attribute__((always_inline)) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
-{
-#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
- __ASM volatile (""); /* Empty asm statement works as a scheduling barrier */
- __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
- __ASM volatile ("");
-#endif
-}
-#endif
-
-#if (__ARM_FEATURE_CMSE == 3U)
-/**
- \brief Set FPSCR (non-secure)
- \details Assigns the given value to the non-secure Floating Point Status/Control register when in secure state.
- \param [in] fpscr Floating Point Status/Control value to set
- */
-__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_FPSCR_NS(uint32_t fpscr)
-{
-#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
- __ASM volatile (""); /* Empty asm statement works as a scheduling barrier */
- __ASM volatile ("VMSR fpscr_ns, %0" : : "r" (fpscr) : "vfpcc");
- __ASM volatile ("");
-#endif
-}
-#endif
-
-#endif /* ((__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) */
-
-
-
-/*@} end of CMSIS_Core_RegAccFunctions */
-
-
-/* ########################## Core Instruction Access ######################### */
-/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
- Access to dedicated instructions
- @{
-*/
-
-/* Define macros for porting to both thumb1 and thumb2.
- * For thumb1, use low register (r0-r7), specified by constraint "l"
- * Otherwise, use general registers, specified by constraint "r" */
-#if defined (__thumb__) && !defined (__thumb2__)
-#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
-#define __CMSIS_GCC_USE_REG(r) "l" (r)
-#else
-#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
-#define __CMSIS_GCC_USE_REG(r) "r" (r)
-#endif
-
-/**
- \brief No Operation
- \details No Operation does nothing. This instruction can be used for code alignment purposes.
- */
-#define __NOP __builtin_arm_nop
-
-/**
- \brief Wait For Interrupt
- \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
- */
-#define __WFI __builtin_arm_wfi
-
-
-/**
- \brief Wait For Event
- \details Wait For Event is a hint instruction that permits the processor to enter
- a low-power state until one of a number of events occurs.
- */
-#define __WFE __builtin_arm_wfe
-
-
-/**
- \brief Send Event
- \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
- */
-#define __SEV __builtin_arm_sev
-
-
-/**
- \brief Instruction Synchronization Barrier
- \details Instruction Synchronization Barrier flushes the pipeline in the processor,
- so that all instructions following the ISB are fetched from cache or memory,
- after the instruction has been completed.
- */
-#define __ISB() __builtin_arm_isb(0xF);
-
-/**
- \brief Data Synchronization Barrier
- \details Acts as a special kind of Data Memory Barrier.
- It completes when all explicit memory accesses before this instruction complete.
- */
-#define __DSB() __builtin_arm_dsb(0xF);
-
-
-/**
- \brief Data Memory Barrier
- \details Ensures the apparent order of the explicit memory operations before
- and after the instruction, without ensuring their completion.
- */
-#define __DMB() __builtin_arm_dmb(0xF);
-
-
-/**
- \brief Reverse byte order (32 bit)
- \details Reverses the byte order in integer value.
- \param [in] value Value to reverse
- \return Reversed value
- */
-#define __REV __builtin_bswap32
-
-
-/**
- \brief Reverse byte order (16 bit)
- \details Reverses the byte order in two unsigned short values.
- \param [in] value Value to reverse
- \return Reversed value
- */
-#define __REV16 __builtin_bswap16 /* ToDo: ARMCC_V6: check if __builtin_bswap16 could be used */
-#if 0
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
-{
- uint32_t result;
-
- __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
- return(result);
-}
-#endif
-
-
-/**
- \brief Reverse byte order in signed short value
- \details Reverses the byte order in a signed short value with sign extension to integer.
- \param [in] value Value to reverse
- \return Reversed value
- */
- /* ToDo: ARMCC_V6: check if __builtin_bswap16 could be used */
-__attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value)
-{
- int32_t result;
-
- __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
- return(result);
-}
-
-
-/**
- \brief Rotate Right in unsigned value (32 bit)
- \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
- \param [in] op1 Value to rotate
- \param [in] op2 Number of Bits to rotate
- \return Rotated value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
-{
- return (op1 >> op2) | (op1 << (32U - op2));
-}
-
-
-/**
- \brief Breakpoint
- \details Causes the processor to enter Debug state.
- Debug tools can use this to investigate system state when the instruction at a particular address is reached.
- \param [in] value is ignored by the processor.
- If required, a debugger can use it to store additional information about the breakpoint.
- */
-#define __BKPT(value) __ASM volatile ("bkpt "#value)
-
-
-/**
- \brief Reverse bit order of value
- \details Reverses the bit order of the given value.
- \param [in] value Value to reverse
- \return Reversed value
- */
- /* ToDo: ARMCC_V6: check if __builtin_arm_rbit is supported */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
-{
- uint32_t result;
-
-#if ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) /* ToDo: ARMCC_V6: check if this is ok for cortex >=3 */
- __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
-#else
- int32_t s = 4 /*sizeof(v)*/ * 8 - 1; /* extra shift needed at end */
-
- result = value; /* r will be reversed bits of v; first get LSB of v */
- for (value >>= 1U; value; value >>= 1U)
- {
- result <<= 1U;
- result |= value & 1U;
- s--;
- }
- result <<= s; /* shift when v's highest bits are zero */
-#endif
- return(result);
-}
-
-
-/**
- \brief Count leading zeros
- \details Counts the number of leading zeros of a data value.
- \param [in] value Value to count the leading zeros
- \return number of leading zeros in value
- */
-#define __CLZ __builtin_clz
-
-
-#if ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) /* ToDo: ARMCC_V6: check if this is ok for cortex >=3 */
-
-/**
- \brief LDR Exclusive (8 bit)
- \details Executes a exclusive LDR instruction for 8 bit value.
- \param [in] ptr Pointer to data
- \return value of type uint8_t at (*ptr)
- */
-#define __LDREXB (uint8_t)__builtin_arm_ldrex
-
-
-/**
- \brief LDR Exclusive (16 bit)
- \details Executes a exclusive LDR instruction for 16 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint16_t at (*ptr)
- */
-#define __LDREXH (uint16_t)__builtin_arm_ldrex
-
-
-/**
- \brief LDR Exclusive (32 bit)
- \details Executes a exclusive LDR instruction for 32 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint32_t at (*ptr)
- */
-#define __LDREXW (uint32_t)__builtin_arm_ldrex
-
-
-/**
- \brief STR Exclusive (8 bit)
- \details Executes a exclusive STR instruction for 8 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-#define __STREXB (uint32_t)__builtin_arm_strex
-
-
-/**
- \brief STR Exclusive (16 bit)
- \details Executes a exclusive STR instruction for 16 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-#define __STREXH (uint32_t)__builtin_arm_strex
-
-
-/**
- \brief STR Exclusive (32 bit)
- \details Executes a exclusive STR instruction for 32 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-#define __STREXW (uint32_t)__builtin_arm_strex
-
-
-/**
- \brief Remove the exclusive lock
- \details Removes the exclusive lock which is created by LDREX.
- */
-#define __CLREX __builtin_arm_clrex
-
-
-/**
- \brief Signed Saturate
- \details Saturates a signed value.
- \param [in] value Value to be saturated
- \param [in] sat Bit position to saturate to (1..32)
- \return Saturated value
- */
-/*#define __SSAT __builtin_arm_ssat*/
-#define __SSAT(ARG1,ARG2) \
-({ \
- int32_t __RES, __ARG1 = (ARG1); \
- __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
- __RES; \
- })
-
-
-/**
- \brief Unsigned Saturate
- \details Saturates an unsigned value.
- \param [in] value Value to be saturated
- \param [in] sat Bit position to saturate to (0..31)
- \return Saturated value
- */
-#define __USAT __builtin_arm_usat
-#if 0
-#define __USAT(ARG1,ARG2) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1); \
- __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
- __RES; \
- })
-#endif
-
-
-/**
- \brief Rotate Right with Extend (32 bit)
- \details Moves each bit of a bitstring right by one bit.
- The carry input is shifted in at the left end of the bitstring.
- \param [in] value Value to rotate
- \return Rotated value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
-{
- uint32_t result;
-
- __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
- return(result);
-}
-
-
-/**
- \brief LDRT Unprivileged (8 bit)
- \details Executes a Unprivileged LDRT instruction for 8 bit value.
- \param [in] ptr Pointer to data
- \return value of type uint8_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *ptr)
-{
- uint32_t result;
-
- __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
- return ((uint8_t) result); /* Add explicit type cast here */
-}
-
-
-/**
- \brief LDRT Unprivileged (16 bit)
- \details Executes a Unprivileged LDRT instruction for 16 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint16_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *ptr)
-{
- uint32_t result;
-
- __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
- return ((uint16_t) result); /* Add explicit type cast here */
-}
-
-
-/**
- \brief LDRT Unprivileged (32 bit)
- \details Executes a Unprivileged LDRT instruction for 32 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint32_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *ptr)
-{
- uint32_t result;
-
- __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
- return(result);
-}
-
-
-/**
- \brief STRT Unprivileged (8 bit)
- \details Executes a Unprivileged STRT instruction for 8 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-__attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
-{
- __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
- \brief STRT Unprivileged (16 bit)
- \details Executes a Unprivileged STRT instruction for 16 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-__attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
-{
- __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
- \brief STRT Unprivileged (32 bit)
- \details Executes a Unprivileged STRT instruction for 32 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-__attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
-{
- __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
-}
-
-#endif /* ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) */
-
-
-#if (__ARM_ARCH_8M__ == 1U)
-
-/**
- \brief Load-Acquire (8 bit)
- \details Executes a LDAB instruction for 8 bit value.
- \param [in] ptr Pointer to data
- \return value of type uint8_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDAB(volatile uint8_t *ptr)
-{
- uint32_t result;
-
- __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
- return ((uint8_t) result);
-}
-
-
-/**
- \brief Load-Acquire (16 bit)
- \details Executes a LDAH instruction for 16 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint16_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDAH(volatile uint16_t *ptr)
-{
- uint32_t result;
-
- __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
- return ((uint16_t) result);
-}
-
-
-/**
- \brief Load-Acquire (32 bit)
- \details Executes a LDA instruction for 32 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint32_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDA(volatile uint32_t *ptr)
-{
- uint32_t result;
-
- __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
- return(result);
-}
-
-
-/**
- \brief Store-Release (8 bit)
- \details Executes a STLB instruction for 8 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-__attribute__((always_inline)) __STATIC_INLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
-{
- __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
- \brief Store-Release (16 bit)
- \details Executes a STLH instruction for 16 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-__attribute__((always_inline)) __STATIC_INLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
-{
- __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
- \brief Store-Release (32 bit)
- \details Executes a STL instruction for 32 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-__attribute__((always_inline)) __STATIC_INLINE void __STL(uint32_t value, volatile uint32_t *ptr)
-{
- __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
- \brief Load-Acquire Exclusive (8 bit)
- \details Executes a LDAB exclusive instruction for 8 bit value.
- \param [in] ptr Pointer to data
- \return value of type uint8_t at (*ptr)
- */
-#define __LDAEXB (uint8_t)__builtin_arm_ldaex
-
-
-/**
- \brief Load-Acquire Exclusive (16 bit)
- \details Executes a LDAH exclusive instruction for 16 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint16_t at (*ptr)
- */
-#define __LDAEXH (uint16_t)__builtin_arm_ldaex
-
-
-/**
- \brief Load-Acquire Exclusive (32 bit)
- \details Executes a LDA exclusive instruction for 32 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint32_t at (*ptr)
- */
-#define __LDAEX (uint32_t)__builtin_arm_ldaex
-
-
-/**
- \brief Store-Release Exclusive (8 bit)
- \details Executes a STLB exclusive instruction for 8 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-#define __STLEXB (uint32_t)__builtin_arm_stlex
-
-
-/**
- \brief Store-Release Exclusive (16 bit)
- \details Executes a STLH exclusive instruction for 16 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-#define __STLEXH (uint32_t)__builtin_arm_stlex
-
-
-/**
- \brief Store-Release Exclusive (32 bit)
- \details Executes a STL exclusive instruction for 32 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-#define __STLEX (uint32_t)__builtin_arm_stlex
-
-#endif /* (__ARM_ARCH_8M__ == 1U) */
-
-/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
-
-
-/* ################### Compiler specific Intrinsics ########################### */
-/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
- Access to dedicated SIMD instructions
- @{
-*/
-
-#if (__ARM_FEATURE_DSP == 1U) /* ToDo: ARMCC_V6: This should be ARCH >= ARMv7-M + SIMD */
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-#define __SSAT16(ARG1,ARG2) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1); \
- __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
- __RES; \
- })
-
-#define __USAT16(ARG1,ARG2) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1); \
- __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
- __RES; \
- })
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
-{
- uint32_t result;
-
- __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
-{
- uint32_t result;
-
- __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
-{
- union llreg_u{
- uint32_t w32[2];
- uint64_t w64;
- } llr;
- llr.w64 = acc;
-
-#ifndef __ARMEB__ /* Little endian */
- __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else /* Big endian */
- __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
- return(llr.w64);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
-{
- union llreg_u{
- uint32_t w32[2];
- uint64_t w64;
- } llr;
- llr.w64 = acc;
-
-#ifndef __ARMEB__ /* Little endian */
- __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else /* Big endian */
- __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
- return(llr.w64);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
-{
- union llreg_u{
- uint32_t w32[2];
- uint64_t w64;
- } llr;
- llr.w64 = acc;
-
-#ifndef __ARMEB__ /* Little endian */
- __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else /* Big endian */
- __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
- return(llr.w64);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
-{
- union llreg_u{
- uint32_t w32[2];
- uint64_t w64;
- } llr;
- llr.w64 = acc;
-
-#ifndef __ARMEB__ /* Little endian */
- __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else /* Big endian */
- __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
- return(llr.w64);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE int32_t __QADD( int32_t op1, int32_t op2)
-{
- int32_t result;
-
- __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__((always_inline)) __STATIC_INLINE int32_t __QSUB( int32_t op1, int32_t op2)
-{
- int32_t result;
-
- __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-#define __PKHBT(ARG1,ARG2,ARG3) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
- __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
- __RES; \
- })
-
-#define __PKHTB(ARG1,ARG2,ARG3) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
- if (ARG3 == 0) \
- __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
- else \
- __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
- __RES; \
- })
-
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
-{
- int32_t result;
-
- __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-#endif /* (__ARM_FEATURE_DSP == 1U) */
-/*@} end of group CMSIS_SIMD_intrinsics */
-
-
-#endif /* __CMSIS_ARMCC_V6_H */
+/**************************************************************************//**
+ * @file cmsis_armcc_V6.h
+ * @brief CMSIS Cortex-M Core Function/Instruction Header File
+ * @version V4.30
+ * @date 20. October 2015
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2015 ARM LIMITED
+
+ All rights reserved.
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ - Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ - Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ - Neither the name of ARM nor the names of its contributors may be used
+ to endorse or promote products derived from this software without
+ specific prior written permission.
+ *
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+ ---------------------------------------------------------------------------*/
+
+
+#ifndef __CMSIS_ARMCC_V6_H
+#define __CMSIS_ARMCC_V6_H
+
+
+/* ########################### Core Function Access ########################### */
+/** \ingroup CMSIS_Core_FunctionInterface
+ \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
+ @{
+ */
+
+/**
+ \brief Enable IRQ Interrupts
+ \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
+ Can only be executed in Privileged modes.
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __enable_irq(void)
+{
+ __ASM volatile ("cpsie i" : : : "memory");
+}
+
+
+/**
+ \brief Disable IRQ Interrupts
+ \details Disables IRQ interrupts by setting the I-bit in the CPSR.
+ Can only be executed in Privileged modes.
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __disable_irq(void)
+{
+ __ASM volatile ("cpsid i" : : : "memory");
+}
+
+
+/**
+ \brief Get Control Register
+ \details Returns the content of the Control Register.
+ \return Control Register value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_CONTROL(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, control" : "=r" (result) );
+ return(result);
+}
+
+
+#if (__ARM_FEATURE_CMSE == 3U)
+/**
+ \brief Get Control Register (non-secure)
+ \details Returns the content of the non-secure Control Register when in secure mode.
+ \return non-secure Control Register value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_CONTROL_NS(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
+ return(result);
+}
+#endif
+
+
+/**
+ \brief Set Control Register
+ \details Writes the given value to the Control Register.
+ \param [in] control Control Register value to set
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __set_CONTROL(uint32_t control)
+{
+ __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
+}
+
+
+#if (__ARM_FEATURE_CMSE == 3U)
+/**
+ \brief Set Control Register (non-secure)
+ \details Writes the given value to the non-secure Control Register when in secure state.
+ \param [in] control Control Register value to set
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_CONTROL_NS(uint32_t control)
+{
+ __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
+}
+#endif
+
+
+/**
+ \brief Get IPSR Register
+ \details Returns the content of the IPSR Register.
+ \return IPSR Register value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_IPSR(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
+ return(result);
+}
+
+
+#if (__ARM_FEATURE_CMSE == 3U)
+/**
+ \brief Get IPSR Register (non-secure)
+ \details Returns the content of the non-secure IPSR Register when in secure state.
+ \return IPSR Register value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_IPSR_NS(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, ipsr_ns" : "=r" (result) );
+ return(result);
+}
+#endif
+
+
+/**
+ \brief Get APSR Register
+ \details Returns the content of the APSR Register.
+ \return APSR Register value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_APSR(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, apsr" : "=r" (result) );
+ return(result);
+}
+
+
+#if (__ARM_FEATURE_CMSE == 3U)
+/**
+ \brief Get APSR Register (non-secure)
+ \details Returns the content of the non-secure APSR Register when in secure state.
+ \return APSR Register value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_APSR_NS(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, apsr_ns" : "=r" (result) );
+ return(result);
+}
+#endif
+
+
+/**
+ \brief Get xPSR Register
+ \details Returns the content of the xPSR Register.
+ \return xPSR Register value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_xPSR(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
+ return(result);
+}
+
+
+#if (__ARM_FEATURE_CMSE == 3U)
+/**
+ \brief Get xPSR Register (non-secure)
+ \details Returns the content of the non-secure xPSR Register when in secure state.
+ \return xPSR Register value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_xPSR_NS(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, xpsr_ns" : "=r" (result) );
+ return(result);
+}
+#endif
+
+
+/**
+ \brief Get Process Stack Pointer
+ \details Returns the current value of the Process Stack Pointer (PSP).
+ \return PSP Register value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSP(void)
+{
+ register uint32_t result;
+
+ __ASM volatile ("MRS %0, psp" : "=r" (result) );
+ return(result);
+}
+
+
+#if (__ARM_FEATURE_CMSE == 3U)
+/**
+ \brief Get Process Stack Pointer (non-secure)
+ \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
+ \return PSP Register value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSP_NS(void)
+{
+ register uint32_t result;
+
+ __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
+ return(result);
+}
+#endif
+
+
+/**
+ \brief Set Process Stack Pointer
+ \details Assigns the given value to the Process Stack Pointer (PSP).
+ \param [in] topOfProcStack Process Stack Pointer value to set
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
+{
+ __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : "sp");
+}
+
+
+#if (__ARM_FEATURE_CMSE == 3U)
+/**
+ \brief Set Process Stack Pointer (non-secure)
+ \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
+ \param [in] topOfProcStack Process Stack Pointer value to set
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
+{
+ __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : "sp");
+}
+#endif
+
+
+/**
+ \brief Get Main Stack Pointer
+ \details Returns the current value of the Main Stack Pointer (MSP).
+ \return MSP Register value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSP(void)
+{
+ register uint32_t result;
+
+ __ASM volatile ("MRS %0, msp" : "=r" (result) );
+ return(result);
+}
+
+
+#if (__ARM_FEATURE_CMSE == 3U)
+/**
+ \brief Get Main Stack Pointer (non-secure)
+ \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
+ \return MSP Register value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSP_NS(void)
+{
+ register uint32_t result;
+
+ __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
+ return(result);
+}
+#endif
+
+
+/**
+ \brief Set Main Stack Pointer
+ \details Assigns the given value to the Main Stack Pointer (MSP).
+ \param [in] topOfMainStack Main Stack Pointer value to set
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
+{
+ __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : "sp");
+}
+
+
+#if (__ARM_FEATURE_CMSE == 3U)
+/**
+ \brief Set Main Stack Pointer (non-secure)
+ \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
+ \param [in] topOfMainStack Main Stack Pointer value to set
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
+{
+ __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : "sp");
+}
+#endif
+
+
+/**
+ \brief Get Priority Mask
+ \details Returns the current state of the priority mask bit from the Priority Mask Register.
+ \return Priority Mask value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PRIMASK(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, primask" : "=r" (result) );
+ return(result);
+}
+
+
+#if (__ARM_FEATURE_CMSE == 3U)
+/**
+ \brief Get Priority Mask (non-secure)
+ \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
+ \return Priority Mask value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PRIMASK_NS(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
+ return(result);
+}
+#endif
+
+
+/**
+ \brief Set Priority Mask
+ \details Assigns the given value to the Priority Mask Register.
+ \param [in] priMask Priority Mask
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
+{
+ __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
+}
+
+
+#if (__ARM_FEATURE_CMSE == 3U)
+/**
+ \brief Set Priority Mask (non-secure)
+ \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
+ \param [in] priMask Priority Mask
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
+{
+ __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
+}
+#endif
+
+
+#if ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) /* ToDo: ARMCC_V6: check if this is ok for cortex >=3 */
+
+/**
+ \brief Enable FIQ
+ \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
+ Can only be executed in Privileged modes.
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __enable_fault_irq(void)
+{
+ __ASM volatile ("cpsie f" : : : "memory");
+}
+
+
+/**
+ \brief Disable FIQ
+ \details Disables FIQ interrupts by setting the F-bit in the CPSR.
+ Can only be executed in Privileged modes.
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __disable_fault_irq(void)
+{
+ __ASM volatile ("cpsid f" : : : "memory");
+}
+
+
+/**
+ \brief Get Base Priority
+ \details Returns the current value of the Base Priority register.
+ \return Base Priority register value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_BASEPRI(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, basepri" : "=r" (result) );
+ return(result);
+}
+
+
+#if (__ARM_FEATURE_CMSE == 3U)
+/**
+ \brief Get Base Priority (non-secure)
+ \details Returns the current value of the non-secure Base Priority register when in secure state.
+ \return Base Priority register value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_BASEPRI_NS(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
+ return(result);
+}
+#endif
+
+
+/**
+ \brief Set Base Priority
+ \details Assigns the given value to the Base Priority register.
+ \param [in] basePri Base Priority value to set
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
+{
+ __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
+}
+
+
+#if (__ARM_FEATURE_CMSE == 3U)
+/**
+ \brief Set Base Priority (non-secure)
+ \details Assigns the given value to the non-secure Base Priority register when in secure state.
+ \param [in] basePri Base Priority value to set
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_BASEPRI_NS(uint32_t value)
+{
+ __ASM volatile ("MSR basepri_ns, %0" : : "r" (value) : "memory");
+}
+#endif
+
+
+/**
+ \brief Set Base Priority with condition
+ \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
+ or the new value increases the BASEPRI priority level.
+ \param [in] basePri Base Priority value to set
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value)
+{
+ __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory");
+}
+
+
+#if (__ARM_FEATURE_CMSE == 3U)
+/**
+ \brief Set Base Priority with condition (non_secure)
+ \details Assigns the given value to the non-secure Base Priority register when in secure state only if BASEPRI masking is disabled,
+ or the new value increases the BASEPRI priority level.
+ \param [in] basePri Base Priority value to set
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_BASEPRI_MAX_NS(uint32_t value)
+{
+ __ASM volatile ("MSR basepri_max_ns, %0" : : "r" (value) : "memory");
+}
+#endif
+
+
+/**
+ \brief Get Fault Mask
+ \details Returns the current value of the Fault Mask register.
+ \return Fault Mask register value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
+ return(result);
+}
+
+
+#if (__ARM_FEATURE_CMSE == 3U)
+/**
+ \brief Get Fault Mask (non-secure)
+ \details Returns the current value of the non-secure Fault Mask register when in secure state.
+ \return Fault Mask register value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_FAULTMASK_NS(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
+ return(result);
+}
+#endif
+
+
+/**
+ \brief Set Fault Mask
+ \details Assigns the given value to the Fault Mask register.
+ \param [in] faultMask Fault Mask value to set
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
+{
+ __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
+}
+
+
+#if (__ARM_FEATURE_CMSE == 3U)
+/**
+ \brief Set Fault Mask (non-secure)
+ \details Assigns the given value to the non-secure Fault Mask register when in secure state.
+ \param [in] faultMask Fault Mask value to set
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
+{
+ __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
+}
+#endif
+
+
+#endif /* ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_8M__ == 1U)) */
+
+
+#if (__ARM_ARCH_8M__ == 1U)
+
+/**
+ \brief Get Process Stack Pointer Limit
+ \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
+ \return PSPLIM Register value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSPLIM(void)
+{
+ register uint32_t result;
+
+ __ASM volatile ("MRS %0, psplim" : "=r" (result) );
+ return(result);
+}
+
+
+#if (__ARM_FEATURE_CMSE == 3U) && (__ARM_ARCH_PROFILE == 'M') /* ToDo: ARMCC_V6: check predefined macro for mainline */
+/**
+ \brief Get Process Stack Pointer Limit (non-secure)
+ \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
+ \return PSPLIM Register value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSPLIM_NS(void)
+{
+ register uint32_t result;
+
+ __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
+ return(result);
+}
+#endif
+
+
+/**
+ \brief Set Process Stack Pointer Limit
+ \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
+ \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
+{
+ __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
+}
+
+
+#if (__ARM_FEATURE_CMSE == 3U) && (__ARM_ARCH_PROFILE == 'M') /* ToDo: ARMCC_V6: check predefined macro for mainline */
+/**
+ \brief Set Process Stack Pointer (non-secure)
+ \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
+ \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
+{
+ __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
+}
+#endif
+
+
+/**
+ \brief Get Main Stack Pointer Limit
+ \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
+ \return MSPLIM Register value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSPLIM(void)
+{
+ register uint32_t result;
+
+ __ASM volatile ("MRS %0, msplim" : "=r" (result) );
+
+ return(result);
+}
+
+
+#if (__ARM_FEATURE_CMSE == 3U) && (__ARM_ARCH_PROFILE == 'M') /* ToDo: ARMCC_V6: check predefined macro for mainline */
+/**
+ \brief Get Main Stack Pointer Limit (non-secure)
+ \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
+ \return MSPLIM Register value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSPLIM_NS(void)
+{
+ register uint32_t result;
+
+ __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
+ return(result);
+}
+#endif
+
+
+/**
+ \brief Set Main Stack Pointer Limit
+ \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
+ \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
+{
+ __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
+}
+
+
+#if (__ARM_FEATURE_CMSE == 3U) && (__ARM_ARCH_PROFILE == 'M') /* ToDo: ARMCC_V6: check predefined macro for mainline */
+/**
+ \brief Set Main Stack Pointer Limit (non-secure)
+ \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
+ \param [in] MainStackPtrLimit Main Stack Pointer value to set
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
+{
+ __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
+}
+#endif
+
+#endif /* (__ARM_ARCH_8M__ == 1U) */
+
+
+#if ((__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) /* ToDo: ARMCC_V6: check if this is ok for cortex >=4 */
+
+/**
+ \brief Get FPSCR
+ \details eturns the current value of the Floating Point Status/Control register.
+ \return Floating Point Status/Control register value
+ */
+#define __get_FPSCR __builtin_arm_get_fpscr
+#if 0
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FPSCR(void)
+{
+#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
+ uint32_t result;
+
+ __ASM volatile (""); /* Empty asm statement works as a scheduling barrier */
+ __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
+ __ASM volatile ("");
+ return(result);
+#else
+ return(0);
+#endif
+}
+#endif
+
+#if (__ARM_FEATURE_CMSE == 3U)
+/**
+ \brief Get FPSCR (non-secure)
+ \details Returns the current value of the non-secure Floating Point Status/Control register when in secure state.
+ \return Floating Point Status/Control register value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_FPSCR_NS(void)
+{
+#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
+ uint32_t result;
+
+ __ASM volatile (""); /* Empty asm statement works as a scheduling barrier */
+ __ASM volatile ("VMRS %0, fpscr_ns" : "=r" (result) );
+ __ASM volatile ("");
+ return(result);
+#else
+ return(0);
+#endif
+}
+#endif
+
+
+/**
+ \brief Set FPSCR
+ \details Assigns the given value to the Floating Point Status/Control register.
+ \param [in] fpscr Floating Point Status/Control value to set
+ */
+#define __set_FPSCR __builtin_arm_set_fpscr
+#if 0
+__attribute__((always_inline)) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
+{
+#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
+ __ASM volatile (""); /* Empty asm statement works as a scheduling barrier */
+ __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
+ __ASM volatile ("");
+#endif
+}
+#endif
+
+#if (__ARM_FEATURE_CMSE == 3U)
+/**
+ \brief Set FPSCR (non-secure)
+ \details Assigns the given value to the non-secure Floating Point Status/Control register when in secure state.
+ \param [in] fpscr Floating Point Status/Control value to set
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_FPSCR_NS(uint32_t fpscr)
+{
+#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
+ __ASM volatile (""); /* Empty asm statement works as a scheduling barrier */
+ __ASM volatile ("VMSR fpscr_ns, %0" : : "r" (fpscr) : "vfpcc");
+ __ASM volatile ("");
+#endif
+}
+#endif
+
+#endif /* ((__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) */
+
+
+
+/*@} end of CMSIS_Core_RegAccFunctions */
+
+
+/* ########################## Core Instruction Access ######################### */
+/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
+ Access to dedicated instructions
+ @{
+*/
+
+/* Define macros for porting to both thumb1 and thumb2.
+ * For thumb1, use low register (r0-r7), specified by constraint "l"
+ * Otherwise, use general registers, specified by constraint "r" */
+#if defined (__thumb__) && !defined (__thumb2__)
+#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
+#define __CMSIS_GCC_USE_REG(r) "l" (r)
+#else
+#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
+#define __CMSIS_GCC_USE_REG(r) "r" (r)
+#endif
+
+/**
+ \brief No Operation
+ \details No Operation does nothing. This instruction can be used for code alignment purposes.
+ */
+#define __NOP __builtin_arm_nop
+
+/**
+ \brief Wait For Interrupt
+ \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
+ */
+#define __WFI __builtin_arm_wfi
+
+
+/**
+ \brief Wait For Event
+ \details Wait For Event is a hint instruction that permits the processor to enter
+ a low-power state until one of a number of events occurs.
+ */
+#define __WFE __builtin_arm_wfe
+
+
+/**
+ \brief Send Event
+ \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
+ */
+#define __SEV __builtin_arm_sev
+
+
+/**
+ \brief Instruction Synchronization Barrier
+ \details Instruction Synchronization Barrier flushes the pipeline in the processor,
+ so that all instructions following the ISB are fetched from cache or memory,
+ after the instruction has been completed.
+ */
+#define __ISB() __builtin_arm_isb(0xF);
+
+/**
+ \brief Data Synchronization Barrier
+ \details Acts as a special kind of Data Memory Barrier.
+ It completes when all explicit memory accesses before this instruction complete.
+ */
+#define __DSB() __builtin_arm_dsb(0xF);
+
+
+/**
+ \brief Data Memory Barrier
+ \details Ensures the apparent order of the explicit memory operations before
+ and after the instruction, without ensuring their completion.
+ */
+#define __DMB() __builtin_arm_dmb(0xF);
+
+
+/**
+ \brief Reverse byte order (32 bit)
+ \details Reverses the byte order in integer value.
+ \param [in] value Value to reverse
+ \return Reversed value
+ */
+#define __REV __builtin_bswap32
+
+
+/**
+ \brief Reverse byte order (16 bit)
+ \details Reverses the byte order in two unsigned short values.
+ \param [in] value Value to reverse
+ \return Reversed value
+ */
+#define __REV16 __builtin_bswap16 /* ToDo: ARMCC_V6: check if __builtin_bswap16 could be used */
+#if 0
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
+{
+ uint32_t result;
+
+ __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+ return(result);
+}
+#endif
+
+
+/**
+ \brief Reverse byte order in signed short value
+ \details Reverses the byte order in a signed short value with sign extension to integer.
+ \param [in] value Value to reverse
+ \return Reversed value
+ */
+ /* ToDo: ARMCC_V6: check if __builtin_bswap16 could be used */
+__attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value)
+{
+ int32_t result;
+
+ __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+ return(result);
+}
+
+
+/**
+ \brief Rotate Right in unsigned value (32 bit)
+ \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
+ \param [in] op1 Value to rotate
+ \param [in] op2 Number of Bits to rotate
+ \return Rotated value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
+{
+ return (op1 >> op2) | (op1 << (32U - op2));
+}
+
+
+/**
+ \brief Breakpoint
+ \details Causes the processor to enter Debug state.
+ Debug tools can use this to investigate system state when the instruction at a particular address is reached.
+ \param [in] value is ignored by the processor.
+ If required, a debugger can use it to store additional information about the breakpoint.
+ */
+#define __BKPT(value) __ASM volatile ("bkpt "#value)
+
+
+/**
+ \brief Reverse bit order of value
+ \details Reverses the bit order of the given value.
+ \param [in] value Value to reverse
+ \return Reversed value
+ */
+ /* ToDo: ARMCC_V6: check if __builtin_arm_rbit is supported */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
+{
+ uint32_t result;
+
+#if ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) /* ToDo: ARMCC_V6: check if this is ok for cortex >=3 */
+ __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
+#else
+ int32_t s = 4 /*sizeof(v)*/ * 8 - 1; /* extra shift needed at end */
+
+ result = value; /* r will be reversed bits of v; first get LSB of v */
+ for (value >>= 1U; value; value >>= 1U)
+ {
+ result <<= 1U;
+ result |= value & 1U;
+ s--;
+ }
+ result <<= s; /* shift when v's highest bits are zero */
+#endif
+ return(result);
+}
+
+
+/**
+ \brief Count leading zeros
+ \details Counts the number of leading zeros of a data value.
+ \param [in] value Value to count the leading zeros
+ \return number of leading zeros in value
+ */
+#define __CLZ __builtin_clz
+
+
+#if ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) /* ToDo: ARMCC_V6: check if this is ok for cortex >=3 */
+
+/**
+ \brief LDR Exclusive (8 bit)
+ \details Executes a exclusive LDR instruction for 8 bit value.
+ \param [in] ptr Pointer to data
+ \return value of type uint8_t at (*ptr)
+ */
+#define __LDREXB (uint8_t)__builtin_arm_ldrex
+
+
+/**
+ \brief LDR Exclusive (16 bit)
+ \details Executes a exclusive LDR instruction for 16 bit values.
+ \param [in] ptr Pointer to data
+ \return value of type uint16_t at (*ptr)
+ */
+#define __LDREXH (uint16_t)__builtin_arm_ldrex
+
+
+/**
+ \brief LDR Exclusive (32 bit)
+ \details Executes a exclusive LDR instruction for 32 bit values.
+ \param [in] ptr Pointer to data
+ \return value of type uint32_t at (*ptr)
+ */
+#define __LDREXW (uint32_t)__builtin_arm_ldrex
+
+
+/**
+ \brief STR Exclusive (8 bit)
+ \details Executes a exclusive STR instruction for 8 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ \return 0 Function succeeded
+ \return 1 Function failed
+ */
+#define __STREXB (uint32_t)__builtin_arm_strex
+
+
+/**
+ \brief STR Exclusive (16 bit)
+ \details Executes a exclusive STR instruction for 16 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ \return 0 Function succeeded
+ \return 1 Function failed
+ */
+#define __STREXH (uint32_t)__builtin_arm_strex
+
+
+/**
+ \brief STR Exclusive (32 bit)
+ \details Executes a exclusive STR instruction for 32 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ \return 0 Function succeeded
+ \return 1 Function failed
+ */
+#define __STREXW (uint32_t)__builtin_arm_strex
+
+
+/**
+ \brief Remove the exclusive lock
+ \details Removes the exclusive lock which is created by LDREX.
+ */
+#define __CLREX __builtin_arm_clrex
+
+
+/**
+ \brief Signed Saturate
+ \details Saturates a signed value.
+ \param [in] value Value to be saturated
+ \param [in] sat Bit position to saturate to (1..32)
+ \return Saturated value
+ */
+/*#define __SSAT __builtin_arm_ssat*/
+#define __SSAT(ARG1,ARG2) \
+({ \
+ int32_t __RES, __ARG1 = (ARG1); \
+ __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
+ __RES; \
+ })
+
+
+/**
+ \brief Unsigned Saturate
+ \details Saturates an unsigned value.
+ \param [in] value Value to be saturated
+ \param [in] sat Bit position to saturate to (0..31)
+ \return Saturated value
+ */
+#define __USAT __builtin_arm_usat
+#if 0
+#define __USAT(ARG1,ARG2) \
+({ \
+ uint32_t __RES, __ARG1 = (ARG1); \
+ __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
+ __RES; \
+ })
+#endif
+
+
+/**
+ \brief Rotate Right with Extend (32 bit)
+ \details Moves each bit of a bitstring right by one bit.
+ The carry input is shifted in at the left end of the bitstring.
+ \param [in] value Value to rotate
+ \return Rotated value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
+{
+ uint32_t result;
+
+ __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+ return(result);
+}
+
+
+/**
+ \brief LDRT Unprivileged (8 bit)
+ \details Executes a Unprivileged LDRT instruction for 8 bit value.
+ \param [in] ptr Pointer to data
+ \return value of type uint8_t at (*ptr)
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *ptr)
+{
+ uint32_t result;
+
+ __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
+ return ((uint8_t) result); /* Add explicit type cast here */
+}
+
+
+/**
+ \brief LDRT Unprivileged (16 bit)
+ \details Executes a Unprivileged LDRT instruction for 16 bit values.
+ \param [in] ptr Pointer to data
+ \return value of type uint16_t at (*ptr)
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *ptr)
+{
+ uint32_t result;
+
+ __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
+ return ((uint16_t) result); /* Add explicit type cast here */
+}
+
+
+/**
+ \brief LDRT Unprivileged (32 bit)
+ \details Executes a Unprivileged LDRT instruction for 32 bit values.
+ \param [in] ptr Pointer to data
+ \return value of type uint32_t at (*ptr)
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *ptr)
+{
+ uint32_t result;
+
+ __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
+ return(result);
+}
+
+
+/**
+ \brief STRT Unprivileged (8 bit)
+ \details Executes a Unprivileged STRT instruction for 8 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
+{
+ __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+ \brief STRT Unprivileged (16 bit)
+ \details Executes a Unprivileged STRT instruction for 16 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
+{
+ __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+ \brief STRT Unprivileged (32 bit)
+ \details Executes a Unprivileged STRT instruction for 32 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
+{
+ __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
+}
+
+#endif /* ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) */
+
+
+#if (__ARM_ARCH_8M__ == 1U)
+
+/**
+ \brief Load-Acquire (8 bit)
+ \details Executes a LDAB instruction for 8 bit value.
+ \param [in] ptr Pointer to data
+ \return value of type uint8_t at (*ptr)
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDAB(volatile uint8_t *ptr)
+{
+ uint32_t result;
+
+ __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
+ return ((uint8_t) result);
+}
+
+
+/**
+ \brief Load-Acquire (16 bit)
+ \details Executes a LDAH instruction for 16 bit values.
+ \param [in] ptr Pointer to data
+ \return value of type uint16_t at (*ptr)
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDAH(volatile uint16_t *ptr)
+{
+ uint32_t result;
+
+ __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
+ return ((uint16_t) result);
+}
+
+
+/**
+ \brief Load-Acquire (32 bit)
+ \details Executes a LDA instruction for 32 bit values.
+ \param [in] ptr Pointer to data
+ \return value of type uint32_t at (*ptr)
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDA(volatile uint32_t *ptr)
+{
+ uint32_t result;
+
+ __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
+ return(result);
+}
+
+
+/**
+ \brief Store-Release (8 bit)
+ \details Executes a STLB instruction for 8 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
+{
+ __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+ \brief Store-Release (16 bit)
+ \details Executes a STLH instruction for 16 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
+{
+ __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+ \brief Store-Release (32 bit)
+ \details Executes a STL instruction for 32 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __STL(uint32_t value, volatile uint32_t *ptr)
+{
+ __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+ \brief Load-Acquire Exclusive (8 bit)
+ \details Executes a LDAB exclusive instruction for 8 bit value.
+ \param [in] ptr Pointer to data
+ \return value of type uint8_t at (*ptr)
+ */
+#define __LDAEXB (uint8_t)__builtin_arm_ldaex
+
+
+/**
+ \brief Load-Acquire Exclusive (16 bit)
+ \details Executes a LDAH exclusive instruction for 16 bit values.
+ \param [in] ptr Pointer to data
+ \return value of type uint16_t at (*ptr)
+ */
+#define __LDAEXH (uint16_t)__builtin_arm_ldaex
+
+
+/**
+ \brief Load-Acquire Exclusive (32 bit)
+ \details Executes a LDA exclusive instruction for 32 bit values.
+ \param [in] ptr Pointer to data
+ \return value of type uint32_t at (*ptr)
+ */
+#define __LDAEX (uint32_t)__builtin_arm_ldaex
+
+
+/**
+ \brief Store-Release Exclusive (8 bit)
+ \details Executes a STLB exclusive instruction for 8 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ \return 0 Function succeeded
+ \return 1 Function failed
+ */
+#define __STLEXB (uint32_t)__builtin_arm_stlex
+
+
+/**
+ \brief Store-Release Exclusive (16 bit)
+ \details Executes a STLH exclusive instruction for 16 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ \return 0 Function succeeded
+ \return 1 Function failed
+ */
+#define __STLEXH (uint32_t)__builtin_arm_stlex
+
+
+/**
+ \brief Store-Release Exclusive (32 bit)
+ \details Executes a STL exclusive instruction for 32 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ \return 0 Function succeeded
+ \return 1 Function failed
+ */
+#define __STLEX (uint32_t)__builtin_arm_stlex
+
+#endif /* (__ARM_ARCH_8M__ == 1U) */
+
+/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
+
+
+/* ################### Compiler specific Intrinsics ########################### */
+/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
+ Access to dedicated SIMD instructions
+ @{
+*/
+
+#if (__ARM_FEATURE_DSP == 1U) /* ToDo: ARMCC_V6: This should be ARCH >= ARMv7-M + SIMD */
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
+{
+ uint32_t result;
+
+ __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+ return(result);
+}
+
+#define __SSAT16(ARG1,ARG2) \
+({ \
+ uint32_t __RES, __ARG1 = (ARG1); \
+ __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
+ __RES; \
+ })
+
+#define __USAT16(ARG1,ARG2) \
+({ \
+ uint32_t __RES, __ARG1 = (ARG1); \
+ __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
+ __RES; \
+ })
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
+{
+ uint32_t result;
+
+ __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
+{
+ uint32_t result;
+
+ __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+ uint32_t result;
+
+ __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+ uint32_t result;
+
+ __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+ union llreg_u{
+ uint32_t w32[2];
+ uint64_t w64;
+ } llr;
+ llr.w64 = acc;
+
+#ifndef __ARMEB__ /* Little endian */
+ __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else /* Big endian */
+ __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+ return(llr.w64);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+ union llreg_u{
+ uint32_t w32[2];
+ uint64_t w64;
+ } llr;
+ llr.w64 = acc;
+
+#ifndef __ARMEB__ /* Little endian */
+ __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else /* Big endian */
+ __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+ return(llr.w64);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+ uint32_t result;
+
+ __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+ uint32_t result;
+
+ __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+ union llreg_u{
+ uint32_t w32[2];
+ uint64_t w64;
+ } llr;
+ llr.w64 = acc;
+
+#ifndef __ARMEB__ /* Little endian */
+ __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else /* Big endian */
+ __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+ return(llr.w64);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+ union llreg_u{
+ uint32_t w32[2];
+ uint64_t w64;
+ } llr;
+ llr.w64 = acc;
+
+#ifndef __ARMEB__ /* Little endian */
+ __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else /* Big endian */
+ __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+ return(llr.w64);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE int32_t __QADD( int32_t op1, int32_t op2)
+{
+ int32_t result;
+
+ __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__((always_inline)) __STATIC_INLINE int32_t __QSUB( int32_t op1, int32_t op2)
+{
+ int32_t result;
+
+ __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+#define __PKHBT(ARG1,ARG2,ARG3) \
+({ \
+ uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
+ __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
+ __RES; \
+ })
+
+#define __PKHTB(ARG1,ARG2,ARG3) \
+({ \
+ uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
+ if (ARG3 == 0) \
+ __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
+ else \
+ __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
+ __RES; \
+ })
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
+{
+ int32_t result;
+
+ __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
+ return(result);
+}
+
+#endif /* (__ARM_FEATURE_DSP == 1U) */
+/*@} end of group CMSIS_SIMD_intrinsics */
+
+
+#endif /* __CMSIS_ARMCC_V6_H */
diff --git a/third_party/NordicSemiconductor/cmsis/cmsis_gcc.h b/third_party/NordicSemiconductor/cmsis/cmsis_gcc.h
index d868f2e..bb89fbb 100644
--- a/third_party/NordicSemiconductor/cmsis/cmsis_gcc.h
+++ b/third_party/NordicSemiconductor/cmsis/cmsis_gcc.h
@@ -1,1373 +1,1373 @@
-/**************************************************************************//**
- * @file cmsis_gcc.h
- * @brief CMSIS Cortex-M Core Function/Instruction Header File
- * @version V4.30
- * @date 20. October 2015
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
- All rights reserved.
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
- - Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- - Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
- - Neither the name of ARM nor the names of its contributors may be used
- to endorse or promote products derived from this software without
- specific prior written permission.
- *
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
- ---------------------------------------------------------------------------*/
-
-
-#ifndef __CMSIS_GCC_H
-#define __CMSIS_GCC_H
-
-/* ignore some GCC warnings */
-#if defined ( __GNUC__ )
-#pragma GCC diagnostic push
-#pragma GCC diagnostic ignored "-Wsign-conversion"
-#pragma GCC diagnostic ignored "-Wconversion"
-#pragma GCC diagnostic ignored "-Wunused-parameter"
-#endif
-
-
-/* ########################### Core Function Access ########################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
- @{
- */
-
-/**
- \brief Enable IRQ Interrupts
- \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
-{
- __ASM volatile ("cpsie i" : : : "memory");
-}
-
-
-/**
- \brief Disable IRQ Interrupts
- \details Disables IRQ interrupts by setting the I-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
-{
- __ASM volatile ("cpsid i" : : : "memory");
-}
-
-
-/**
- \brief Get Control Register
- \details Returns the content of the Control Register.
- \return Control Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, control" : "=r" (result) );
- return(result);
-}
-
-
-/**
- \brief Set Control Register
- \details Writes the given value to the Control Register.
- \param [in] control Control Register value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
-{
- __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
-}
-
-
-/**
- \brief Get IPSR Register
- \details Returns the content of the IPSR Register.
- \return IPSR Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
- return(result);
-}
-
-
-/**
- \brief Get APSR Register
- \details Returns the content of the APSR Register.
- \return APSR Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, apsr" : "=r" (result) );
- return(result);
-}
-
-
-/**
- \brief Get xPSR Register
- \details Returns the content of the xPSR Register.
-
- \return xPSR Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
- return(result);
-}
-
-
-/**
- \brief Get Process Stack Pointer
- \details Returns the current value of the Process Stack Pointer (PSP).
- \return PSP Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
-{
- register uint32_t result;
-
- __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
- return(result);
-}
-
-
-/**
- \brief Set Process Stack Pointer
- \details Assigns the given value to the Process Stack Pointer (PSP).
- \param [in] topOfProcStack Process Stack Pointer value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
-{
- __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
-}
-
-
-/**
- \brief Get Main Stack Pointer
- \details Returns the current value of the Main Stack Pointer (MSP).
- \return MSP Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
-{
- register uint32_t result;
-
- __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
- return(result);
-}
-
-
-/**
- \brief Set Main Stack Pointer
- \details Assigns the given value to the Main Stack Pointer (MSP).
-
- \param [in] topOfMainStack Main Stack Pointer value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
-{
- __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
-}
-
-
-/**
- \brief Get Priority Mask
- \details Returns the current state of the priority mask bit from the Priority Mask Register.
- \return Priority Mask value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, primask" : "=r" (result) );
- return(result);
-}
-
-
-/**
- \brief Set Priority Mask
- \details Assigns the given value to the Priority Mask Register.
- \param [in] priMask Priority Mask
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
-{
- __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
-}
-
-
-#if (__CORTEX_M >= 0x03U)
-
-/**
- \brief Enable FIQ
- \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
-{
- __ASM volatile ("cpsie f" : : : "memory");
-}
-
-
-/**
- \brief Disable FIQ
- \details Disables FIQ interrupts by setting the F-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
-{
- __ASM volatile ("cpsid f" : : : "memory");
-}
-
-
-/**
- \brief Get Base Priority
- \details Returns the current value of the Base Priority register.
- \return Base Priority register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, basepri" : "=r" (result) );
- return(result);
-}
-
-
-/**
- \brief Set Base Priority
- \details Assigns the given value to the Base Priority register.
- \param [in] basePri Base Priority value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
-{
- __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
-}
-
-
-/**
- \brief Set Base Priority with condition
- \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
- or the new value increases the BASEPRI priority level.
- \param [in] basePri Base Priority value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value)
-{
- __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory");
-}
-
-
-/**
- \brief Get Fault Mask
- \details Returns the current value of the Fault Mask register.
- \return Fault Mask register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
- return(result);
-}
-
-
-/**
- \brief Set Fault Mask
- \details Assigns the given value to the Fault Mask register.
- \param [in] faultMask Fault Mask value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
-{
- __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
-}
-
-#endif /* (__CORTEX_M >= 0x03U) */
-
-
-#if (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U)
-
-/**
- \brief Get FPSCR
- \details Returns the current value of the Floating Point Status/Control register.
- \return Floating Point Status/Control register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
-{
-#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
- uint32_t result;
-
- /* Empty asm statement works as a scheduling barrier */
- __ASM volatile ("");
- __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
- __ASM volatile ("");
- return(result);
-#else
- return(0);
-#endif
-}
-
-
-/**
- \brief Set FPSCR
- \details Assigns the given value to the Floating Point Status/Control register.
- \param [in] fpscr Floating Point Status/Control value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
-{
-#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
- /* Empty asm statement works as a scheduling barrier */
- __ASM volatile ("");
- __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
- __ASM volatile ("");
-#endif
-}
-
-#endif /* (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U) */
-
-
-
-/*@} end of CMSIS_Core_RegAccFunctions */
-
-
-/* ########################## Core Instruction Access ######################### */
-/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
- Access to dedicated instructions
- @{
-*/
-
-/* Define macros for porting to both thumb1 and thumb2.
- * For thumb1, use low register (r0-r7), specified by constraint "l"
- * Otherwise, use general registers, specified by constraint "r" */
-#if defined (__thumb__) && !defined (__thumb2__)
-#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
-#define __CMSIS_GCC_USE_REG(r) "l" (r)
-#else
-#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
-#define __CMSIS_GCC_USE_REG(r) "r" (r)
-#endif
-
-/**
- \brief No Operation
- \details No Operation does nothing. This instruction can be used for code alignment purposes.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
-{
- __ASM volatile ("nop");
-}
-
-
-/**
- \brief Wait For Interrupt
- \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __WFI(void)
-{
- __ASM volatile ("wfi");
-}
-
-
-/**
- \brief Wait For Event
- \details Wait For Event is a hint instruction that permits the processor to enter
- a low-power state until one of a number of events occurs.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __WFE(void)
-{
- __ASM volatile ("wfe");
-}
-
-
-/**
- \brief Send Event
- \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __SEV(void)
-{
- __ASM volatile ("sev");
-}
-
-
-/**
- \brief Instruction Synchronization Barrier
- \details Instruction Synchronization Barrier flushes the pipeline in the processor,
- so that all instructions following the ISB are fetched from cache or memory,
- after the instruction has been completed.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __ISB(void)
-{
- __ASM volatile ("isb 0xF":::"memory");
-}
-
-
-/**
- \brief Data Synchronization Barrier
- \details Acts as a special kind of Data Memory Barrier.
- It completes when all explicit memory accesses before this instruction complete.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
-{
- __ASM volatile ("dsb 0xF":::"memory");
-}
-
-
-/**
- \brief Data Memory Barrier
- \details Ensures the apparent order of the explicit memory operations before
- and after the instruction, without ensuring their completion.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __DMB(void)
-{
- __ASM volatile ("dmb 0xF":::"memory");
-}
-
-
-/**
- \brief Reverse byte order (32 bit)
- \details Reverses the byte order in integer value.
- \param [in] value Value to reverse
- \return Reversed value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)
-{
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
- return __builtin_bswap32(value);
-#else
- uint32_t result;
-
- __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
- return(result);
-#endif
-}
-
-
-/**
- \brief Reverse byte order (16 bit)
- \details Reverses the byte order in two unsigned short values.
- \param [in] value Value to reverse
- \return Reversed value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
-{
- uint32_t result;
-
- __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
- return(result);
-}
-
-
-/**
- \brief Reverse byte order in signed short value
- \details Reverses the byte order in a signed short value with sign extension to integer.
- \param [in] value Value to reverse
- \return Reversed value
- */
-__attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value)
-{
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
- return (short)__builtin_bswap16(value);
-#else
- int32_t result;
-
- __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
- return(result);
-#endif
-}
-
-
-/**
- \brief Rotate Right in unsigned value (32 bit)
- \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
- \param [in] value Value to rotate
- \param [in] value Number of Bits to rotate
- \return Rotated value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
-{
- return (op1 >> op2) | (op1 << (32U - op2));
-}
-
-
-/**
- \brief Breakpoint
- \details Causes the processor to enter Debug state.
- Debug tools can use this to investigate system state when the instruction at a particular address is reached.
- \param [in] value is ignored by the processor.
- If required, a debugger can use it to store additional information about the breakpoint.
- */
-#define __BKPT(value) __ASM volatile ("bkpt "#value)
-
-
-/**
- \brief Reverse bit order of value
- \details Reverses the bit order of the given value.
- \param [in] value Value to reverse
- \return Reversed value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
-{
- uint32_t result;
-
-#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)
- __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
-#else
- int32_t s = 4 /*sizeof(v)*/ * 8 - 1; /* extra shift needed at end */
-
- result = value; /* r will be reversed bits of v; first get LSB of v */
- for (value >>= 1U; value; value >>= 1U)
- {
- result <<= 1U;
- result |= value & 1U;
- s--;
- }
- result <<= s; /* shift when v's highest bits are zero */
-#endif
- return(result);
-}
-
-
-/**
- \brief Count leading zeros
- \details Counts the number of leading zeros of a data value.
- \param [in] value Value to count the leading zeros
- \return number of leading zeros in value
- */
-#define __CLZ __builtin_clz
-
-
-#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)
-
-/**
- \brief LDR Exclusive (8 bit)
- \details Executes a exclusive LDR instruction for 8 bit value.
- \param [in] ptr Pointer to data
- \return value of type uint8_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
-{
- uint32_t result;
-
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
- __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
-#else
- /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
- accepted by assembler. So has to use following less efficient pattern.
- */
- __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
-#endif
- return ((uint8_t) result); /* Add explicit type cast here */
-}
-
-
-/**
- \brief LDR Exclusive (16 bit)
- \details Executes a exclusive LDR instruction for 16 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint16_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
-{
- uint32_t result;
-
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
- __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
-#else
- /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
- accepted by assembler. So has to use following less efficient pattern.
- */
- __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
-#endif
- return ((uint16_t) result); /* Add explicit type cast here */
-}
-
-
-/**
- \brief LDR Exclusive (32 bit)
- \details Executes a exclusive LDR instruction for 32 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint32_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
-{
- uint32_t result;
-
- __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- return(result);
-}
-
-
-/**
- \brief STR Exclusive (8 bit)
- \details Executes a exclusive STR instruction for 8 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
-{
- uint32_t result;
-
- __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
- return(result);
-}
-
-
-/**
- \brief STR Exclusive (16 bit)
- \details Executes a exclusive STR instruction for 16 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
-{
- uint32_t result;
-
- __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
- return(result);
-}
-
-
-/**
- \brief STR Exclusive (32 bit)
- \details Executes a exclusive STR instruction for 32 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
-{
- uint32_t result;
-
- __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- return(result);
-}
-
-
-/**
- \brief Remove the exclusive lock
- \details Removes the exclusive lock which is created by LDREX.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __CLREX(void)
-{
- __ASM volatile ("clrex" ::: "memory");
-}
-
-
-/**
- \brief Signed Saturate
- \details Saturates a signed value.
- \param [in] value Value to be saturated
- \param [in] sat Bit position to saturate to (1..32)
- \return Saturated value
- */
-#define __SSAT(ARG1,ARG2) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1); \
- __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
- __RES; \
- })
-
-
-/**
- \brief Unsigned Saturate
- \details Saturates an unsigned value.
- \param [in] value Value to be saturated
- \param [in] sat Bit position to saturate to (0..31)
- \return Saturated value
- */
-#define __USAT(ARG1,ARG2) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1); \
- __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
- __RES; \
- })
-
-
-/**
- \brief Rotate Right with Extend (32 bit)
- \details Moves each bit of a bitstring right by one bit.
- The carry input is shifted in at the left end of the bitstring.
- \param [in] value Value to rotate
- \return Rotated value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
-{
- uint32_t result;
-
- __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
- return(result);
-}
-
-
-/**
- \brief LDRT Unprivileged (8 bit)
- \details Executes a Unprivileged LDRT instruction for 8 bit value.
- \param [in] ptr Pointer to data
- \return value of type uint8_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *addr)
-{
- uint32_t result;
-
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
- __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*addr) );
-#else
- /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
- accepted by assembler. So has to use following less efficient pattern.
- */
- __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
-#endif
- return ((uint8_t) result); /* Add explicit type cast here */
-}
-
-
-/**
- \brief LDRT Unprivileged (16 bit)
- \details Executes a Unprivileged LDRT instruction for 16 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint16_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *addr)
-{
- uint32_t result;
-
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
- __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*addr) );
-#else
- /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
- accepted by assembler. So has to use following less efficient pattern.
- */
- __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
-#endif
- return ((uint16_t) result); /* Add explicit type cast here */
-}
-
-
-/**
- \brief LDRT Unprivileged (32 bit)
- \details Executes a Unprivileged LDRT instruction for 32 bit values.
- \param [in] ptr Pointer to data
- \return value of type uint32_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *addr)
-{
- uint32_t result;
-
- __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*addr) );
- return(result);
-}
-
-
-/**
- \brief STRT Unprivileged (8 bit)
- \details Executes a Unprivileged STRT instruction for 8 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-__attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr)
-{
- __ASM volatile ("strbt %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
-}
-
-
-/**
- \brief STRT Unprivileged (16 bit)
- \details Executes a Unprivileged STRT instruction for 16 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-__attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr)
-{
- __ASM volatile ("strht %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
-}
-
-
-/**
- \brief STRT Unprivileged (32 bit)
- \details Executes a Unprivileged STRT instruction for 32 bit values.
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- */
-__attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *addr)
-{
- __ASM volatile ("strt %1, %0" : "=Q" (*addr) : "r" (value) );
-}
-
-#endif /* (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) */
-
-/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
-
-
-/* ################### Compiler specific Intrinsics ########################### */
-/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
- Access to dedicated SIMD instructions
- @{
-*/
-
-#if (__CORTEX_M >= 0x04U) /* only for Cortex-M4 and above */
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-#define __SSAT16(ARG1,ARG2) \
-({ \
- int32_t __RES, __ARG1 = (ARG1); \
- __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
- __RES; \
- })
-
-#define __USAT16(ARG1,ARG2) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1); \
- __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
- __RES; \
- })
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
-{
- uint32_t result;
-
- __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
-{
- uint32_t result;
-
- __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
-{
- union llreg_u{
- uint32_t w32[2];
- uint64_t w64;
- } llr;
- llr.w64 = acc;
-
-#ifndef __ARMEB__ /* Little endian */
- __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else /* Big endian */
- __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
- return(llr.w64);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
-{
- union llreg_u{
- uint32_t w32[2];
- uint64_t w64;
- } llr;
- llr.w64 = acc;
-
-#ifndef __ARMEB__ /* Little endian */
- __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else /* Big endian */
- __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
- return(llr.w64);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
-{
- union llreg_u{
- uint32_t w32[2];
- uint64_t w64;
- } llr;
- llr.w64 = acc;
-
-#ifndef __ARMEB__ /* Little endian */
- __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else /* Big endian */
- __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
- return(llr.w64);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
-{
- union llreg_u{
- uint32_t w32[2];
- uint64_t w64;
- } llr;
- llr.w64 = acc;
-
-#ifndef __ARMEB__ /* Little endian */
- __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else /* Big endian */
- __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
- return(llr.w64);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __QADD( int32_t op1, int32_t op2)
-{
- int32_t result;
-
- __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __QSUB( int32_t op1, int32_t op2)
-{
- int32_t result;
-
- __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-#define __PKHBT(ARG1,ARG2,ARG3) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
- __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
- __RES; \
- })
-
-#define __PKHTB(ARG1,ARG2,ARG3) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
- if (ARG3 == 0) \
- __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
- else \
- __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
- __RES; \
- })
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
-{
- int32_t result;
-
- __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-#endif /* (__CORTEX_M >= 0x04) */
-/*@} end of group CMSIS_SIMD_intrinsics */
-
-
-#if defined ( __GNUC__ )
-#pragma GCC diagnostic pop
-#endif
-
-#endif /* __CMSIS_GCC_H */
+/**************************************************************************//**
+ * @file cmsis_gcc.h
+ * @brief CMSIS Cortex-M Core Function/Instruction Header File
+ * @version V4.30
+ * @date 20. October 2015
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2015 ARM LIMITED
+
+ All rights reserved.
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ - Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ - Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ - Neither the name of ARM nor the names of its contributors may be used
+ to endorse or promote products derived from this software without
+ specific prior written permission.
+ *
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+ ---------------------------------------------------------------------------*/
+
+
+#ifndef __CMSIS_GCC_H
+#define __CMSIS_GCC_H
+
+/* ignore some GCC warnings */
+#if defined ( __GNUC__ )
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wsign-conversion"
+#pragma GCC diagnostic ignored "-Wconversion"
+#pragma GCC diagnostic ignored "-Wunused-parameter"
+#endif
+
+
+/* ########################### Core Function Access ########################### */
+/** \ingroup CMSIS_Core_FunctionInterface
+ \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
+ @{
+ */
+
+/**
+ \brief Enable IRQ Interrupts
+ \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
+ Can only be executed in Privileged modes.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
+{
+ __ASM volatile ("cpsie i" : : : "memory");
+}
+
+
+/**
+ \brief Disable IRQ Interrupts
+ \details Disables IRQ interrupts by setting the I-bit in the CPSR.
+ Can only be executed in Privileged modes.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
+{
+ __ASM volatile ("cpsid i" : : : "memory");
+}
+
+
+/**
+ \brief Get Control Register
+ \details Returns the content of the Control Register.
+ \return Control Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, control" : "=r" (result) );
+ return(result);
+}
+
+
+/**
+ \brief Set Control Register
+ \details Writes the given value to the Control Register.
+ \param [in] control Control Register value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
+{
+ __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
+}
+
+
+/**
+ \brief Get IPSR Register
+ \details Returns the content of the IPSR Register.
+ \return IPSR Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
+ return(result);
+}
+
+
+/**
+ \brief Get APSR Register
+ \details Returns the content of the APSR Register.
+ \return APSR Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, apsr" : "=r" (result) );
+ return(result);
+}
+
+
+/**
+ \brief Get xPSR Register
+ \details Returns the content of the xPSR Register.
+
+ \return xPSR Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
+ return(result);
+}
+
+
+/**
+ \brief Get Process Stack Pointer
+ \details Returns the current value of the Process Stack Pointer (PSP).
+ \return PSP Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
+{
+ register uint32_t result;
+
+ __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
+ return(result);
+}
+
+
+/**
+ \brief Set Process Stack Pointer
+ \details Assigns the given value to the Process Stack Pointer (PSP).
+ \param [in] topOfProcStack Process Stack Pointer value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
+{
+ __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
+}
+
+
+/**
+ \brief Get Main Stack Pointer
+ \details Returns the current value of the Main Stack Pointer (MSP).
+ \return MSP Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
+{
+ register uint32_t result;
+
+ __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
+ return(result);
+}
+
+
+/**
+ \brief Set Main Stack Pointer
+ \details Assigns the given value to the Main Stack Pointer (MSP).
+
+ \param [in] topOfMainStack Main Stack Pointer value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
+{
+ __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
+}
+
+
+/**
+ \brief Get Priority Mask
+ \details Returns the current state of the priority mask bit from the Priority Mask Register.
+ \return Priority Mask value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, primask" : "=r" (result) );
+ return(result);
+}
+
+
+/**
+ \brief Set Priority Mask
+ \details Assigns the given value to the Priority Mask Register.
+ \param [in] priMask Priority Mask
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
+{
+ __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
+}
+
+
+#if (__CORTEX_M >= 0x03U)
+
+/**
+ \brief Enable FIQ
+ \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
+ Can only be executed in Privileged modes.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
+{
+ __ASM volatile ("cpsie f" : : : "memory");
+}
+
+
+/**
+ \brief Disable FIQ
+ \details Disables FIQ interrupts by setting the F-bit in the CPSR.
+ Can only be executed in Privileged modes.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
+{
+ __ASM volatile ("cpsid f" : : : "memory");
+}
+
+
+/**
+ \brief Get Base Priority
+ \details Returns the current value of the Base Priority register.
+ \return Base Priority register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, basepri" : "=r" (result) );
+ return(result);
+}
+
+
+/**
+ \brief Set Base Priority
+ \details Assigns the given value to the Base Priority register.
+ \param [in] basePri Base Priority value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
+{
+ __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
+}
+
+
+/**
+ \brief Set Base Priority with condition
+ \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
+ or the new value increases the BASEPRI priority level.
+ \param [in] basePri Base Priority value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value)
+{
+ __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory");
+}
+
+
+/**
+ \brief Get Fault Mask
+ \details Returns the current value of the Fault Mask register.
+ \return Fault Mask register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
+{
+ uint32_t result;
+
+ __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
+ return(result);
+}
+
+
+/**
+ \brief Set Fault Mask
+ \details Assigns the given value to the Fault Mask register.
+ \param [in] faultMask Fault Mask value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
+{
+ __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
+}
+
+#endif /* (__CORTEX_M >= 0x03U) */
+
+
+#if (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U)
+
+/**
+ \brief Get FPSCR
+ \details Returns the current value of the Floating Point Status/Control register.
+ \return Floating Point Status/Control register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
+{
+#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
+ uint32_t result;
+
+ /* Empty asm statement works as a scheduling barrier */
+ __ASM volatile ("");
+ __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
+ __ASM volatile ("");
+ return(result);
+#else
+ return(0);
+#endif
+}
+
+
+/**
+ \brief Set FPSCR
+ \details Assigns the given value to the Floating Point Status/Control register.
+ \param [in] fpscr Floating Point Status/Control value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
+{
+#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
+ /* Empty asm statement works as a scheduling barrier */
+ __ASM volatile ("");
+ __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
+ __ASM volatile ("");
+#endif
+}
+
+#endif /* (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U) */
+
+
+
+/*@} end of CMSIS_Core_RegAccFunctions */
+
+
+/* ########################## Core Instruction Access ######################### */
+/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
+ Access to dedicated instructions
+ @{
+*/
+
+/* Define macros for porting to both thumb1 and thumb2.
+ * For thumb1, use low register (r0-r7), specified by constraint "l"
+ * Otherwise, use general registers, specified by constraint "r" */
+#if defined (__thumb__) && !defined (__thumb2__)
+#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
+#define __CMSIS_GCC_USE_REG(r) "l" (r)
+#else
+#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
+#define __CMSIS_GCC_USE_REG(r) "r" (r)
+#endif
+
+/**
+ \brief No Operation
+ \details No Operation does nothing. This instruction can be used for code alignment purposes.
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
+{
+ __ASM volatile ("nop");
+}
+
+
+/**
+ \brief Wait For Interrupt
+ \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __WFI(void)
+{
+ __ASM volatile ("wfi");
+}
+
+
+/**
+ \brief Wait For Event
+ \details Wait For Event is a hint instruction that permits the processor to enter
+ a low-power state until one of a number of events occurs.
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __WFE(void)
+{
+ __ASM volatile ("wfe");
+}
+
+
+/**
+ \brief Send Event
+ \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __SEV(void)
+{
+ __ASM volatile ("sev");
+}
+
+
+/**
+ \brief Instruction Synchronization Barrier
+ \details Instruction Synchronization Barrier flushes the pipeline in the processor,
+ so that all instructions following the ISB are fetched from cache or memory,
+ after the instruction has been completed.
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __ISB(void)
+{
+ __ASM volatile ("isb 0xF":::"memory");
+}
+
+
+/**
+ \brief Data Synchronization Barrier
+ \details Acts as a special kind of Data Memory Barrier.
+ It completes when all explicit memory accesses before this instruction complete.
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
+{
+ __ASM volatile ("dsb 0xF":::"memory");
+}
+
+
+/**
+ \brief Data Memory Barrier
+ \details Ensures the apparent order of the explicit memory operations before
+ and after the instruction, without ensuring their completion.
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __DMB(void)
+{
+ __ASM volatile ("dmb 0xF":::"memory");
+}
+
+
+/**
+ \brief Reverse byte order (32 bit)
+ \details Reverses the byte order in integer value.
+ \param [in] value Value to reverse
+ \return Reversed value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)
+{
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
+ return __builtin_bswap32(value);
+#else
+ uint32_t result;
+
+ __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+ return(result);
+#endif
+}
+
+
+/**
+ \brief Reverse byte order (16 bit)
+ \details Reverses the byte order in two unsigned short values.
+ \param [in] value Value to reverse
+ \return Reversed value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
+{
+ uint32_t result;
+
+ __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+ return(result);
+}
+
+
+/**
+ \brief Reverse byte order in signed short value
+ \details Reverses the byte order in a signed short value with sign extension to integer.
+ \param [in] value Value to reverse
+ \return Reversed value
+ */
+__attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value)
+{
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+ return (short)__builtin_bswap16(value);
+#else
+ int32_t result;
+
+ __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+ return(result);
+#endif
+}
+
+
+/**
+ \brief Rotate Right in unsigned value (32 bit)
+ \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
+ \param [in] value Value to rotate
+ \param [in] value Number of Bits to rotate
+ \return Rotated value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
+{
+ return (op1 >> op2) | (op1 << (32U - op2));
+}
+
+
+/**
+ \brief Breakpoint
+ \details Causes the processor to enter Debug state.
+ Debug tools can use this to investigate system state when the instruction at a particular address is reached.
+ \param [in] value is ignored by the processor.
+ If required, a debugger can use it to store additional information about the breakpoint.
+ */
+#define __BKPT(value) __ASM volatile ("bkpt "#value)
+
+
+/**
+ \brief Reverse bit order of value
+ \details Reverses the bit order of the given value.
+ \param [in] value Value to reverse
+ \return Reversed value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
+{
+ uint32_t result;
+
+#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)
+ __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
+#else
+ int32_t s = 4 /*sizeof(v)*/ * 8 - 1; /* extra shift needed at end */
+
+ result = value; /* r will be reversed bits of v; first get LSB of v */
+ for (value >>= 1U; value; value >>= 1U)
+ {
+ result <<= 1U;
+ result |= value & 1U;
+ s--;
+ }
+ result <<= s; /* shift when v's highest bits are zero */
+#endif
+ return(result);
+}
+
+
+/**
+ \brief Count leading zeros
+ \details Counts the number of leading zeros of a data value.
+ \param [in] value Value to count the leading zeros
+ \return number of leading zeros in value
+ */
+#define __CLZ __builtin_clz
+
+
+#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)
+
+/**
+ \brief LDR Exclusive (8 bit)
+ \details Executes a exclusive LDR instruction for 8 bit value.
+ \param [in] ptr Pointer to data
+ \return value of type uint8_t at (*ptr)
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
+{
+ uint32_t result;
+
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+ __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
+#else
+ /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
+ accepted by assembler. So has to use following less efficient pattern.
+ */
+ __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
+#endif
+ return ((uint8_t) result); /* Add explicit type cast here */
+}
+
+
+/**
+ \brief LDR Exclusive (16 bit)
+ \details Executes a exclusive LDR instruction for 16 bit values.
+ \param [in] ptr Pointer to data
+ \return value of type uint16_t at (*ptr)
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
+{
+ uint32_t result;
+
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+ __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
+#else
+ /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
+ accepted by assembler. So has to use following less efficient pattern.
+ */
+ __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
+#endif
+ return ((uint16_t) result); /* Add explicit type cast here */
+}
+
+
+/**
+ \brief LDR Exclusive (32 bit)
+ \details Executes a exclusive LDR instruction for 32 bit values.
+ \param [in] ptr Pointer to data
+ \return value of type uint32_t at (*ptr)
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
+{
+ uint32_t result;
+
+ __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
+ return(result);
+}
+
+
+/**
+ \brief STR Exclusive (8 bit)
+ \details Executes a exclusive STR instruction for 8 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ \return 0 Function succeeded
+ \return 1 Function failed
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
+{
+ uint32_t result;
+
+ __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
+ return(result);
+}
+
+
+/**
+ \brief STR Exclusive (16 bit)
+ \details Executes a exclusive STR instruction for 16 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ \return 0 Function succeeded
+ \return 1 Function failed
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
+{
+ uint32_t result;
+
+ __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
+ return(result);
+}
+
+
+/**
+ \brief STR Exclusive (32 bit)
+ \details Executes a exclusive STR instruction for 32 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ \return 0 Function succeeded
+ \return 1 Function failed
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
+{
+ uint32_t result;
+
+ __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
+ return(result);
+}
+
+
+/**
+ \brief Remove the exclusive lock
+ \details Removes the exclusive lock which is created by LDREX.
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __CLREX(void)
+{
+ __ASM volatile ("clrex" ::: "memory");
+}
+
+
+/**
+ \brief Signed Saturate
+ \details Saturates a signed value.
+ \param [in] value Value to be saturated
+ \param [in] sat Bit position to saturate to (1..32)
+ \return Saturated value
+ */
+#define __SSAT(ARG1,ARG2) \
+({ \
+ uint32_t __RES, __ARG1 = (ARG1); \
+ __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
+ __RES; \
+ })
+
+
+/**
+ \brief Unsigned Saturate
+ \details Saturates an unsigned value.
+ \param [in] value Value to be saturated
+ \param [in] sat Bit position to saturate to (0..31)
+ \return Saturated value
+ */
+#define __USAT(ARG1,ARG2) \
+({ \
+ uint32_t __RES, __ARG1 = (ARG1); \
+ __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
+ __RES; \
+ })
+
+
+/**
+ \brief Rotate Right with Extend (32 bit)
+ \details Moves each bit of a bitstring right by one bit.
+ The carry input is shifted in at the left end of the bitstring.
+ \param [in] value Value to rotate
+ \return Rotated value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
+{
+ uint32_t result;
+
+ __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+ return(result);
+}
+
+
+/**
+ \brief LDRT Unprivileged (8 bit)
+ \details Executes a Unprivileged LDRT instruction for 8 bit value.
+ \param [in] ptr Pointer to data
+ \return value of type uint8_t at (*ptr)
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *addr)
+{
+ uint32_t result;
+
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+ __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*addr) );
+#else
+ /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
+ accepted by assembler. So has to use following less efficient pattern.
+ */
+ __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
+#endif
+ return ((uint8_t) result); /* Add explicit type cast here */
+}
+
+
+/**
+ \brief LDRT Unprivileged (16 bit)
+ \details Executes a Unprivileged LDRT instruction for 16 bit values.
+ \param [in] ptr Pointer to data
+ \return value of type uint16_t at (*ptr)
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *addr)
+{
+ uint32_t result;
+
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+ __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*addr) );
+#else
+ /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
+ accepted by assembler. So has to use following less efficient pattern.
+ */
+ __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
+#endif
+ return ((uint16_t) result); /* Add explicit type cast here */
+}
+
+
+/**
+ \brief LDRT Unprivileged (32 bit)
+ \details Executes a Unprivileged LDRT instruction for 32 bit values.
+ \param [in] ptr Pointer to data
+ \return value of type uint32_t at (*ptr)
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *addr)
+{
+ uint32_t result;
+
+ __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*addr) );
+ return(result);
+}
+
+
+/**
+ \brief STRT Unprivileged (8 bit)
+ \details Executes a Unprivileged STRT instruction for 8 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr)
+{
+ __ASM volatile ("strbt %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+ \brief STRT Unprivileged (16 bit)
+ \details Executes a Unprivileged STRT instruction for 16 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr)
+{
+ __ASM volatile ("strht %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+ \brief STRT Unprivileged (32 bit)
+ \details Executes a Unprivileged STRT instruction for 32 bit values.
+ \param [in] value Value to store
+ \param [in] ptr Pointer to location
+ */
+__attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *addr)
+{
+ __ASM volatile ("strt %1, %0" : "=Q" (*addr) : "r" (value) );
+}
+
+#endif /* (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) */
+
+/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
+
+
+/* ################### Compiler specific Intrinsics ########################### */
+/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
+ Access to dedicated SIMD instructions
+ @{
+*/
+
+#if (__CORTEX_M >= 0x04U) /* only for Cortex-M4 and above */
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
+{
+ uint32_t result;
+
+ __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+ return(result);
+}
+
+#define __SSAT16(ARG1,ARG2) \
+({ \
+ int32_t __RES, __ARG1 = (ARG1); \
+ __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
+ __RES; \
+ })
+
+#define __USAT16(ARG1,ARG2) \
+({ \
+ uint32_t __RES, __ARG1 = (ARG1); \
+ __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
+ __RES; \
+ })
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
+{
+ uint32_t result;
+
+ __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
+{
+ uint32_t result;
+
+ __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+ uint32_t result;
+
+ __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+ uint32_t result;
+
+ __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+ union llreg_u{
+ uint32_t w32[2];
+ uint64_t w64;
+ } llr;
+ llr.w64 = acc;
+
+#ifndef __ARMEB__ /* Little endian */
+ __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else /* Big endian */
+ __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+ return(llr.w64);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+ union llreg_u{
+ uint32_t w32[2];
+ uint64_t w64;
+ } llr;
+ llr.w64 = acc;
+
+#ifndef __ARMEB__ /* Little endian */
+ __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else /* Big endian */
+ __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+ return(llr.w64);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+ uint32_t result;
+
+ __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+ uint32_t result;
+
+ __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+ union llreg_u{
+ uint32_t w32[2];
+ uint64_t w64;
+ } llr;
+ llr.w64 = acc;
+
+#ifndef __ARMEB__ /* Little endian */
+ __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else /* Big endian */
+ __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+ return(llr.w64);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+ union llreg_u{
+ uint32_t w32[2];
+ uint64_t w64;
+ } llr;
+ llr.w64 = acc;
+
+#ifndef __ARMEB__ /* Little endian */
+ __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else /* Big endian */
+ __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+ return(llr.w64);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
+{
+ uint32_t result;
+
+ __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __QADD( int32_t op1, int32_t op2)
+{
+ int32_t result;
+
+ __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __QSUB( int32_t op1, int32_t op2)
+{
+ int32_t result;
+
+ __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+ return(result);
+}
+
+#define __PKHBT(ARG1,ARG2,ARG3) \
+({ \
+ uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
+ __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
+ __RES; \
+ })
+
+#define __PKHTB(ARG1,ARG2,ARG3) \
+({ \
+ uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
+ if (ARG3 == 0) \
+ __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
+ else \
+ __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
+ __RES; \
+ })
+
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
+{
+ int32_t result;
+
+ __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
+ return(result);
+}
+
+#endif /* (__CORTEX_M >= 0x04) */
+/*@} end of group CMSIS_SIMD_intrinsics */
+
+
+#if defined ( __GNUC__ )
+#pragma GCC diagnostic pop
+#endif
+
+#endif /* __CMSIS_GCC_H */
diff --git a/third_party/NordicSemiconductor/cmsis/core_cm4.h b/third_party/NordicSemiconductor/cmsis/core_cm4.h
index 7002e4e..d02b111 100644
--- a/third_party/NordicSemiconductor/cmsis/core_cm4.h
+++ b/third_party/NordicSemiconductor/cmsis/core_cm4.h
@@ -1,1937 +1,1937 @@
-/**************************************************************************//**
- * @file core_cm4.h
- * @brief CMSIS Cortex-M4 Core Peripheral Access Layer Header File
- * @version V4.30
- * @date 20. October 2015
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
- All rights reserved.
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
- - Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- - Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
- - Neither the name of ARM nor the names of its contributors may be used
- to endorse or promote products derived from this software without
- specific prior written permission.
- *
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
- ---------------------------------------------------------------------------*/
-
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #pragma clang system_header /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM4_H_GENERIC
-#define __CORE_CM4_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
- \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
- CMSIS violates the following MISRA-C:2004 rules:
-
- \li Required Rule 8.5, object/function definition in header file.<br>
- Function definitions in header files are used to allow 'inlining'.
-
- \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
- Unions are used for effective representation of core registers.
-
- \li Advisory Rule 19.7, Function-like macro defined.<br>
- Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- * CMSIS definitions
- ******************************************************************************/
-/**
- \ingroup Cortex_M4
- @{
- */
-
-/* CMSIS CM4 definitions */
-#define __CM4_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */
-#define __CM4_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */
-#define __CM4_CMSIS_VERSION ((__CM4_CMSIS_VERSION_MAIN << 16U) | \
- __CM4_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
-
-#define __CORTEX_M (0x04U) /*!< Cortex-M Core */
-
-
-#if defined ( __CC_ARM )
- #define __ASM __asm /*!< asm keyword for ARM Compiler */
- #define __INLINE __inline /*!< inline keyword for ARM Compiler */
- #define __STATIC_INLINE static __inline
-
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #define __ASM __asm /*!< asm keyword for ARM Compiler */
- #define __INLINE __inline /*!< inline keyword for ARM Compiler */
- #define __STATIC_INLINE static __inline
-
-#elif defined ( __GNUC__ )
- #define __ASM __asm /*!< asm keyword for GNU Compiler */
- #define __INLINE inline /*!< inline keyword for GNU Compiler */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __ICCARM__ )
- #define __ASM __asm /*!< asm keyword for IAR Compiler */
- #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __TMS470__ )
- #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __TASKING__ )
- #define __ASM __asm /*!< asm keyword for TASKING Compiler */
- #define __INLINE inline /*!< inline keyword for TASKING Compiler */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __CSMC__ )
- #define __packed
- #define __ASM _asm /*!< asm keyword for COSMIC Compiler */
- #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */
- #define __STATIC_INLINE static inline
-
-#else
- #error Unknown compiler
-#endif
-
-/** __FPU_USED indicates whether an FPU is used or not.
- For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
-*/
-#if defined ( __CC_ARM )
- #if defined __TARGET_FPU_VFP
- #if (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #if defined __ARM_PCS_VFP
- #if (__FPU_PRESENT == 1)
- #define __FPU_USED 1U
- #else
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#elif defined ( __GNUC__ )
- #if defined (__VFP_FP__) && !defined(__SOFTFP__)
- #if (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#elif defined ( __ICCARM__ )
- #if defined __ARMVFP__
- #if (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#elif defined ( __TMS470__ )
- #if defined __TI_VFP_SUPPORT__
- #if (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#elif defined ( __TASKING__ )
- #if defined __FPU_VFP__
- #if (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#elif defined ( __CSMC__ )
- #if ( __CSMC__ & 0x400U)
- #if (__FPU_PRESENT == 1U)
- #define __FPU_USED 1U
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0U
- #endif
- #else
- #define __FPU_USED 0U
- #endif
-
-#endif
-
-#include "core_cmInstr.h" /* Core Instruction Access */
-#include "core_cmFunc.h" /* Core Function Access */
-#include "core_cmSimd.h" /* Compiler specific SIMD Intrinsics */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM4_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM4_H_DEPENDANT
-#define __CORE_CM4_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
- #ifndef __CM4_REV
- #define __CM4_REV 0x0000U
- #warning "__CM4_REV not defined in device header file; using default!"
- #endif
-
- #ifndef __FPU_PRESENT
- #define __FPU_PRESENT 0U
- #warning "__FPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __MPU_PRESENT
- #define __MPU_PRESENT 0U
- #warning "__MPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __NVIC_PRIO_BITS
- #define __NVIC_PRIO_BITS 4U
- #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
- #endif
-
- #ifndef __Vendor_SysTickConfig
- #define __Vendor_SysTickConfig 0U
- #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
- #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
- \defgroup CMSIS_glob_defs CMSIS Global Defines
-
- <strong>IO Type Qualifiers</strong> are used
- \li to specify the access to peripheral variables.
- \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
- #define __I volatile /*!< Defines 'read only' permissions */
-#else
- #define __I volatile const /*!< Defines 'read only' permissions */
-#endif
-#define __O volatile /*!< Defines 'write only' permissions */
-#define __IO volatile /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define __IM volatile const /*! Defines 'read only' structure member permissions */
-#define __OM volatile /*! Defines 'write only' structure member permissions */
-#define __IOM volatile /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex_M4 */
-
-
-
-/*******************************************************************************
- * Register Abstraction
- Core Register contain:
- - Core Register
- - Core NVIC Register
- - Core SCB Register
- - Core SysTick Register
- - Core Debug Register
- - Core MPU Register
- - Core FPU Register
- ******************************************************************************/
-/**
- \defgroup CMSIS_core_register Defines and Type Definitions
- \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_CORE Status and Control Registers
- \brief Core Register type definitions.
- @{
- */
-
-/**
- \brief Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
- struct
- {
- uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos 31U /*!< APSR: N Position */
-#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */
-
-#define APSR_Z_Pos 30U /*!< APSR: Z Position */
-#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */
-
-#define APSR_C_Pos 29U /*!< APSR: C Position */
-#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */
-
-#define APSR_V_Pos 28U /*!< APSR: V Position */
-#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */
-
-#define APSR_Q_Pos 27U /*!< APSR: Q Position */
-#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */
-
-#define APSR_GE_Pos 16U /*!< APSR: GE Position */
-#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */
-
-
-/**
- \brief Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
-
-
-/**
- \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */
- uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
- uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos 31U /*!< xPSR: N Position */
-#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */
-#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos 29U /*!< xPSR: C Position */
-#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos 28U /*!< xPSR: V Position */
-#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */
-
-#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */
-#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */
-
-#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */
-#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */
-
-#define xPSR_T_Pos 24U /*!< xPSR: T Position */
-#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
-
-#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */
-#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */
-
-#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
-
-
-/**
- \brief Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
- struct
- {
- uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */
- uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
- uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */
- uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */
-#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */
-
-#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
- \brief Type definitions for the NVIC Registers
- @{
- */
-
-/**
- \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
- __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
- uint32_t RESERVED0[24U];
- __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
- uint32_t RSERVED1[24U];
- __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
- uint32_t RESERVED2[24U];
- __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
- uint32_t RESERVED3[24U];
- __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */
- uint32_t RESERVED4[56U];
- __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */
- uint32_t RESERVED5[644U];
- __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */
-} NVIC_Type;
-
-/* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */
-#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SCB System Control Block (SCB)
- \brief Type definitions for the System Control Block Registers
- @{
- */
-
-/**
- \brief Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
- __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
- __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
- __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
- __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
- __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
- __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
- __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */
- __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
- __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */
- __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */
- __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */
- __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */
- __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */
- __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */
- __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */
- __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */
- __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */
- __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */
- __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */
- uint32_t RESERVED0[5U];
- __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */
-#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */
-#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */
-
-#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */
-#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */
-#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */
-
-#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */
-#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */
-
-#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */
-#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */
-#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */
-
-#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */
-#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */
-
-#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */
-#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */
-#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */
-#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */
-
-#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */
-#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */
-
-#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */
-#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */
-
-/* SCB Configurable Fault Status Register Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */
-#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */
-
-#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */
-#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */
-
-#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */
-#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
-
-/* SCB Hard Fault Status Register Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */
-#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */
-
-#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */
-#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */
-
-#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */
-#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */
-
-/* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */
-#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */
-
-#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */
-#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */
-
-#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */
-#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */
-
-#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */
-#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */
-
-#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */
-#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
- \brief Type definitions for the System Control and ID Register not in the SCB
- @{
- */
-
-/**
- \brief Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
- uint32_t RESERVED0[1U];
- __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */
- __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */
-} SCnSCB_Type;
-
-/* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */
-#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */
-
-/* Auxiliary Control Register Definitions */
-#define SCnSCB_ACTLR_DISOOFP_Pos 9U /*!< ACTLR: DISOOFP Position */
-#define SCnSCB_ACTLR_DISOOFP_Msk (1UL << SCnSCB_ACTLR_DISOOFP_Pos) /*!< ACTLR: DISOOFP Mask */
-
-#define SCnSCB_ACTLR_DISFPCA_Pos 8U /*!< ACTLR: DISFPCA Position */
-#define SCnSCB_ACTLR_DISFPCA_Msk (1UL << SCnSCB_ACTLR_DISFPCA_Pos) /*!< ACTLR: DISFPCA Mask */
-
-#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */
-#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */
-
-#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1U /*!< ACTLR: DISDEFWBUF Position */
-#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */
-
-#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */
-#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_SysTick System Tick Timer (SysTick)
- \brief Type definitions for the System Timer Registers.
- @{
- */
-
-/**
- \brief Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
- __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
- __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
- __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
- __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM)
- \brief Type definitions for the Instrumentation Trace Macrocell (ITM)
- @{
- */
-
-/**
- \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM).
- */
-typedef struct
-{
- __OM union
- {
- __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */
- __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */
- __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */
- } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */
- uint32_t RESERVED0[864U];
- __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */
- uint32_t RESERVED1[15U];
- __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */
- uint32_t RESERVED2[15U];
- __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */
- uint32_t RESERVED3[29U];
- __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */
- __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */
- __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */
- uint32_t RESERVED4[43U];
- __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */
- __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */
- uint32_t RESERVED5[6U];
- __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */
- __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */
- __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */
- __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */
- __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */
- __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */
- __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */
- __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */
- __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */
- __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */
- __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */
- __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */
-} ITM_Type;
-
-/* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */
-
-/* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */
-#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */
-
-#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */
-#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */
-
-#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */
-#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */
-
-#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */
-#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */
-
-#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */
-#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */
-
-#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */
-#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */
-
-#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */
-#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */
-
-#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */
-#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */
-
-#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */
-#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */
-
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */
-
-/* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */
-#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */
-
-#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */
-#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */
-
-#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */
-#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */
-
-/*@}*/ /* end of group CMSIS_ITM */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT)
- \brief Type definitions for the Data Watchpoint and Trace (DWT)
- @{
- */
-
-/**
- \brief Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
- __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */
- __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */
- __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */
- __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */
- __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */
- __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */
- __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */
- __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */
- __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */
- __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */
- __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */
- uint32_t RESERVED0[1U];
- __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */
- __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */
- __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */
- uint32_t RESERVED1[1U];
- __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */
- __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */
- __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */
- uint32_t RESERVED2[1U];
- __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */
- __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */
- __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */
-
-#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */
-#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */
-
-#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */
-#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */
-
-#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */
-#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */
-
-#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */
-#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */
-
-#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */
-#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */
-
-#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */
-#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */
-
-#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */
-#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */
-
-#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */
-#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */
-
-#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */
-#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */
-
-#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */
-#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */
-
-#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */
-#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */
-
-#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */
-#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */
-
-#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */
-#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */
-
-/* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */
-#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */
-
-/* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */
-#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */
-
-/* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */
-#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */
-
-/* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */
-#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */
-
-/* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */
-#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */
-
-/* DWT Comparator Mask Register Definitions */
-#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */
-#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */
-#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */
-
-#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */
-#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */
-#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */
-
-#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */
-#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */
-
-#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */
-#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */
-
-#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */
-#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */
-
-#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */
-#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_TPI Trace Port Interface (TPI)
- \brief Type definitions for the Trace Port Interface (TPI)
- @{
- */
-
-/**
- \brief Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
- __IOM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */
- __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */
- uint32_t RESERVED0[2U];
- __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */
- uint32_t RESERVED1[55U];
- __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */
- uint32_t RESERVED2[131U];
- __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */
- __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */
- __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */
- uint32_t RESERVED3[759U];
- __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER */
- __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */
- __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */
- uint32_t RESERVED4[1U];
- __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */
- __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */
- __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */
- uint32_t RESERVED5[39U];
- __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */
- __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */
- uint32_t RESERVED7[8U];
- __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */
- __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */
-
-/* TPI Integration ETM Data Register Definitions (FIFO0) */
-#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */
-
-#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */
-#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */
-
-#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */
-
-#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */
-#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */
-
-#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */
-#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */
-
-#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */
-#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */
-
-#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */
-#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */
-
-/* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY_Pos 0U /*!< TPI ITATBCTR2: ATREADY Position */
-#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/) /*!< TPI ITATBCTR2: ATREADY Mask */
-
-/* TPI Integration ITM Data Register Definitions (FIFO1) */
-#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */
-
-#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */
-#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */
-
-#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */
-
-#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */
-#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */
-
-#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */
-#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */
-
-#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */
-#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */
-
-#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */
-#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */
-
-/* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY_Pos 0U /*!< TPI ITATBCTR0: ATREADY Position */
-#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/) /*!< TPI ITATBCTR0: ATREADY Mask */
-
-/* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */
-#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */
-
-#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */
-#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */
-
-#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_MajorType_Pos 4U /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */
-
-#define TPI_DEVTYPE_SubType_Pos 0U /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if (__MPU_PRESENT == 1U)
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_MPU Memory Protection Unit (MPU)
- \brief Type definitions for the Memory Protection Unit (MPU)
- @{
- */
-
-/**
- \brief Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
- __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
- __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
- __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
- __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
- __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
- __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */
- __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */
- __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */
- __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */
- __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */
- __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */
-} MPU_Type;
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */
-
-#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */
-
-/* MPU Region Attribute and Size Register Definitions */
-#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */
-
-#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */
-
-#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */
-
-#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */
-
-#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */
-
-#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */
-
-#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */
-
-#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */
-
-#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */
-
-#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-#if (__FPU_PRESENT == 1U)
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_FPU Floating Point Unit (FPU)
- \brief Type definitions for the Floating Point Unit (FPU)
- @{
- */
-
-/**
- \brief Structure type to access the Floating Point Unit (FPU).
- */
-typedef struct
-{
- uint32_t RESERVED0[1U];
- __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */
- __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */
- __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */
- __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */
- __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */
-} FPU_Type;
-
-/* Floating-Point Context Control Register Definitions */
-#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */
-#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */
-
-#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */
-#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */
-
-#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */
-#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */
-
-#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */
-#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */
-
-#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */
-#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */
-
-#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */
-#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */
-
-#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */
-#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */
-
-#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */
-#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */
-
-#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */
-#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */
-
-/* Floating-Point Context Address Register Definitions */
-#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */
-#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */
-
-/* Floating-Point Default Status Control Register Definitions */
-#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */
-#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */
-
-#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */
-#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */
-
-#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */
-#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */
-
-#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */
-#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */
-
-/* Media and FP Feature Register 0 Definitions */
-#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */
-#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */
-
-#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */
-#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */
-
-#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */
-#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */
-
-#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */
-#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */
-
-#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */
-#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */
-
-#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */
-#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */
-
-#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */
-#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */
-
-#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */
-#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */
-
-/* Media and FP Feature Register 1 Definitions */
-#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */
-#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */
-
-#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */
-#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */
-
-#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */
-#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */
-
-#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */
-#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */
-
-/*@} end of group CMSIS_FPU */
-#endif
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
- \brief Type definitions for the Core Debug Registers
- @{
- */
-
-/**
- \brief Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
- __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */
- __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */
- __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */
- __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register Definitions */
-#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register Definitions */
-#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register Definitions */
-#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */
-#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */
-
-#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */
-#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */
-
-#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */
-#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */
-
-#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */
-#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */
-
-#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */
-#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */
-#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */
-
-#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */
-#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */
-
-#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */
-#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */
-
-#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */
-#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */
-
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
-
-#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */
-#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_core_bitfield Core register bit field macros
- \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
- @{
- */
-
-/**
- \brief Mask and shift a bit field value for use in a register bit range.
- \param[in] field Name of the register bit field.
- \param[in] value Value of the bit field.
- \return Masked and shifted value.
-*/
-#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk)
-
-/**
- \brief Mask and shift a register value to extract a bit filed value.
- \param[in] field Name of the register bit field.
- \param[in] value Value of register.
- \return Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
- \ingroup CMSIS_core_register
- \defgroup CMSIS_core_base Core Definitions
- \brief Definitions for base addresses, unions, and structures.
- @{
- */
-
-/* Memory mapping of Cortex-M4 Hardware */
-#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
-#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */
-#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */
-#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */
-#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */
-#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
-#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
-#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
-
-#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */
-#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
-#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
-#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
-#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */
-#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */
-#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */
-#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */
-
-#if (__MPU_PRESENT == 1U)
- #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
- #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
-#endif
-
-#if (__FPU_PRESENT == 1U)
- #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */
- #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */
-#endif
-
-/*@} */
-
-
-
-/*******************************************************************************
- * Hardware Abstraction Layer
- Core Function Interface contains:
- - Core NVIC Functions
- - Core SysTick Functions
- - Core Debug Functions
- - Core Register Access Functions
- ******************************************************************************/
-/**
- \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ########################## NVIC functions #################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_NVICFunctions NVIC Functions
- \brief Functions that manage interrupts and exceptions via the NVIC.
- @{
- */
-
-/**
- \brief Set Priority Grouping
- \details Sets the priority grouping field using the required unlock sequence.
- The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
- Only values from 0..7 are used.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
- \param [in] PriorityGroup Priority grouping field.
- */
-__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
- uint32_t reg_value;
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
-
- reg_value = SCB->AIRCR; /* read old register configuration */
- reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
- reg_value = (reg_value |
- ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */
- SCB->AIRCR = reg_value;
-}
-
-
-/**
- \brief Get Priority Grouping
- \details Reads the priority grouping field from the NVIC Interrupt Controller.
- \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
-{
- return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
-
-
-/**
- \brief Enable External Interrupt
- \details Enables a device-specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
-{
- NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
- \brief Disable External Interrupt
- \details Disables a device-specific interrupt in the NVIC interrupt controller.
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
-{
- NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
- \brief Get Pending Interrupt
- \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt.
- \param [in] IRQn Interrupt number.
- \return 0 Interrupt status is not pending.
- \return 1 Interrupt status is pending.
- */
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
- return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-}
-
-
-/**
- \brief Set Pending Interrupt
- \details Sets the pending bit of an external interrupt.
- \param [in] IRQn Interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
- NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
- \brief Clear Pending Interrupt
- \details Clears the pending bit of an external interrupt.
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
- NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
-}
-
-
-/**
- \brief Get Active Interrupt
- \details Reads the active register in NVIC and returns the active bit.
- \param [in] IRQn Interrupt number.
- \return 0 Interrupt status is not active.
- \return 1 Interrupt status is active.
- */
-__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
-{
- return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-}
-
-
-/**
- \brief Set Interrupt Priority
- \details Sets the priority of an interrupt.
- \note The priority cannot be set for every core interrupt.
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- */
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
- if ((int32_t)(IRQn) < 0)
- {
- SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- }
- else
- {
- NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
- }
-}
-
-
-/**
- \brief Get Interrupt Priority
- \details Reads the priority of an interrupt.
- The interrupt number can be positive to specify an external (device specific) interrupt,
- or negative to specify an internal (core) interrupt.
- \param [in] IRQn Interrupt number.
- \return Interrupt Priority.
- Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
-{
-
- if ((int32_t)(IRQn) < 0)
- {
- return(((uint32_t)SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
- }
- else
- {
- return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS)));
- }
-}
-
-
-/**
- \brief Encode Priority
- \details Encodes the priority for an interrupt with the given priority group,
- preemptive priority value, and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
- \param [in] PriorityGroup Used priority group.
- \param [in] PreemptPriority Preemptive priority value (starting from 0).
- \param [in] SubPriority Subpriority value (starting from 0).
- \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
- return (
- ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
- ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
- );
-}
-
-
-/**
- \brief Decode Priority
- \details Decodes an interrupt priority value with a given priority group to
- preemptive priority value and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
- \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
- \param [in] PriorityGroup Used priority group.
- \param [out] pPreemptPriority Preemptive priority value (starting from 0).
- \param [out] pSubPriority Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
- SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
- *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
- *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL);
-}
-
-
-/**
- \brief System Reset
- \details Initiates a system reset request to reset the MCU.
- */
-__STATIC_INLINE void NVIC_SystemReset(void)
-{
- __DSB(); /* Ensure all outstanding memory accesses included
- buffered write are completed before reset */
- SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
- (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
- SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */
- __DSB(); /* Ensure completion of memory access */
-
- for (;;) /* wait until reset */
- {
- __NOP();
- }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-
-/* ################################## SysTick function ############################################ */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
- \brief Functions that configure the System.
- @{
- */
-
-#if (__Vendor_SysTickConfig == 0U)
-
-/**
- \brief System Tick Configuration
- \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
- Counter is in free running mode to generate periodic interrupts.
- \param [in] ticks Number of ticks between two interrupts.
- \return 0 Function succeeded.
- \return 1 Function failed.
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
- if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
- {
- return (1UL); /* Reload value impossible */
- }
-
- SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
- NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
- SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0UL); /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-/* ##################################### Debug In/Output function ########################################### */
-/**
- \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_core_DebugFunctions ITM Functions
- \brief Functions that access the ITM debug interface.
- @{
- */
-
-extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */
-#define ITM_RXBUFFER_EMPTY 0x5AA55AA5U /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/**
- \brief ITM Send Character
- \details Transmits a character via the ITM channel 0, and
- \li Just returns when no debugger is connected that has booked the output.
- \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
- \param [in] ch Character to transmit.
- \returns Character to transmit.
- */
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
- if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
- ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */
- {
- while (ITM->PORT[0U].u32 == 0UL)
- {
- __NOP();
- }
- ITM->PORT[0U].u8 = (uint8_t)ch;
- }
- return (ch);
-}
-
-
-/**
- \brief ITM Receive Character
- \details Inputs a character via the external variable \ref ITM_RxBuffer.
- \return Received character.
- \return -1 No character pending.
- */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void)
-{
- int32_t ch = -1; /* no character available */
-
- if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
- {
- ch = ITM_RxBuffer;
- ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
- }
-
- return (ch);
-}
-
-
-/**
- \brief ITM Check Character
- \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
- \return 0 No character available.
- \return 1 Character available.
- */
-__STATIC_INLINE int32_t ITM_CheckChar (void)
-{
-
- if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
- {
- return (0); /* no character available */
- }
- else
- {
- return (1); /* character available */
- }
-}
-
-/*@} end of CMSIS_core_DebugFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM4_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
+/**************************************************************************//**
+ * @file core_cm4.h
+ * @brief CMSIS Cortex-M4 Core Peripheral Access Layer Header File
+ * @version V4.30
+ * @date 20. October 2015
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2015 ARM LIMITED
+
+ All rights reserved.
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ - Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ - Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ - Neither the name of ARM nor the names of its contributors may be used
+ to endorse or promote products derived from this software without
+ specific prior written permission.
+ *
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+ ---------------------------------------------------------------------------*/
+
+
+#if defined ( __ICCARM__ )
+ #pragma system_include /* treat file as system include file for MISRA check */
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #pragma clang system_header /* treat file as system include file */
+#endif
+
+#ifndef __CORE_CM4_H_GENERIC
+#define __CORE_CM4_H_GENERIC
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+ \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
+ CMSIS violates the following MISRA-C:2004 rules:
+
+ \li Required Rule 8.5, object/function definition in header file.<br>
+ Function definitions in header files are used to allow 'inlining'.
+
+ \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+ Unions are used for effective representation of core registers.
+
+ \li Advisory Rule 19.7, Function-like macro defined.<br>
+ Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ * CMSIS definitions
+ ******************************************************************************/
+/**
+ \ingroup Cortex_M4
+ @{
+ */
+
+/* CMSIS CM4 definitions */
+#define __CM4_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */
+#define __CM4_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */
+#define __CM4_CMSIS_VERSION ((__CM4_CMSIS_VERSION_MAIN << 16U) | \
+ __CM4_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
+
+#define __CORTEX_M (0x04U) /*!< Cortex-M Core */
+
+
+#if defined ( __CC_ARM )
+ #define __ASM __asm /*!< asm keyword for ARM Compiler */
+ #define __INLINE __inline /*!< inline keyword for ARM Compiler */
+ #define __STATIC_INLINE static __inline
+
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #define __ASM __asm /*!< asm keyword for ARM Compiler */
+ #define __INLINE __inline /*!< inline keyword for ARM Compiler */
+ #define __STATIC_INLINE static __inline
+
+#elif defined ( __GNUC__ )
+ #define __ASM __asm /*!< asm keyword for GNU Compiler */
+ #define __INLINE inline /*!< inline keyword for GNU Compiler */
+ #define __STATIC_INLINE static inline
+
+#elif defined ( __ICCARM__ )
+ #define __ASM __asm /*!< asm keyword for IAR Compiler */
+ #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
+ #define __STATIC_INLINE static inline
+
+#elif defined ( __TMS470__ )
+ #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
+ #define __STATIC_INLINE static inline
+
+#elif defined ( __TASKING__ )
+ #define __ASM __asm /*!< asm keyword for TASKING Compiler */
+ #define __INLINE inline /*!< inline keyword for TASKING Compiler */
+ #define __STATIC_INLINE static inline
+
+#elif defined ( __CSMC__ )
+ #define __packed
+ #define __ASM _asm /*!< asm keyword for COSMIC Compiler */
+ #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */
+ #define __STATIC_INLINE static inline
+
+#else
+ #error Unknown compiler
+#endif
+
+/** __FPU_USED indicates whether an FPU is used or not.
+ For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
+*/
+#if defined ( __CC_ARM )
+ #if defined __TARGET_FPU_VFP
+ #if (__FPU_PRESENT == 1U)
+ #define __FPU_USED 1U
+ #else
+ #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+ #define __FPU_USED 0U
+ #endif
+ #else
+ #define __FPU_USED 0U
+ #endif
+
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #if defined __ARM_PCS_VFP
+ #if (__FPU_PRESENT == 1)
+ #define __FPU_USED 1U
+ #else
+ #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+ #define __FPU_USED 0U
+ #endif
+ #else
+ #define __FPU_USED 0U
+ #endif
+
+#elif defined ( __GNUC__ )
+ #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+ #if (__FPU_PRESENT == 1U)
+ #define __FPU_USED 1U
+ #else
+ #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+ #define __FPU_USED 0U
+ #endif
+ #else
+ #define __FPU_USED 0U
+ #endif
+
+#elif defined ( __ICCARM__ )
+ #if defined __ARMVFP__
+ #if (__FPU_PRESENT == 1U)
+ #define __FPU_USED 1U
+ #else
+ #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+ #define __FPU_USED 0U
+ #endif
+ #else
+ #define __FPU_USED 0U
+ #endif
+
+#elif defined ( __TMS470__ )
+ #if defined __TI_VFP_SUPPORT__
+ #if (__FPU_PRESENT == 1U)
+ #define __FPU_USED 1U
+ #else
+ #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+ #define __FPU_USED 0U
+ #endif
+ #else
+ #define __FPU_USED 0U
+ #endif
+
+#elif defined ( __TASKING__ )
+ #if defined __FPU_VFP__
+ #if (__FPU_PRESENT == 1U)
+ #define __FPU_USED 1U
+ #else
+ #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+ #define __FPU_USED 0U
+ #endif
+ #else
+ #define __FPU_USED 0U
+ #endif
+
+#elif defined ( __CSMC__ )
+ #if ( __CSMC__ & 0x400U)
+ #if (__FPU_PRESENT == 1U)
+ #define __FPU_USED 1U
+ #else
+ #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+ #define __FPU_USED 0U
+ #endif
+ #else
+ #define __FPU_USED 0U
+ #endif
+
+#endif
+
+#include "core_cmInstr.h" /* Core Instruction Access */
+#include "core_cmFunc.h" /* Core Function Access */
+#include "core_cmSimd.h" /* Compiler specific SIMD Intrinsics */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM4_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_CM4_H_DEPENDANT
+#define __CORE_CM4_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+ #ifndef __CM4_REV
+ #define __CM4_REV 0x0000U
+ #warning "__CM4_REV not defined in device header file; using default!"
+ #endif
+
+ #ifndef __FPU_PRESENT
+ #define __FPU_PRESENT 0U
+ #warning "__FPU_PRESENT not defined in device header file; using default!"
+ #endif
+
+ #ifndef __MPU_PRESENT
+ #define __MPU_PRESENT 0U
+ #warning "__MPU_PRESENT not defined in device header file; using default!"
+ #endif
+
+ #ifndef __NVIC_PRIO_BITS
+ #define __NVIC_PRIO_BITS 4U
+ #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+ #endif
+
+ #ifndef __Vendor_SysTickConfig
+ #define __Vendor_SysTickConfig 0U
+ #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+ #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+ \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+ <strong>IO Type Qualifiers</strong> are used
+ \li to specify the access to peripheral variables.
+ \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+ #define __I volatile /*!< Defines 'read only' permissions */
+#else
+ #define __I volatile const /*!< Defines 'read only' permissions */
+#endif
+#define __O volatile /*!< Defines 'write only' permissions */
+#define __IO volatile /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define __IM volatile const /*! Defines 'read only' structure member permissions */
+#define __OM volatile /*! Defines 'write only' structure member permissions */
+#define __IOM volatile /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group Cortex_M4 */
+
+
+
+/*******************************************************************************
+ * Register Abstraction
+ Core Register contain:
+ - Core Register
+ - Core NVIC Register
+ - Core SCB Register
+ - Core SysTick Register
+ - Core Debug Register
+ - Core MPU Register
+ - Core FPU Register
+ ******************************************************************************/
+/**
+ \defgroup CMSIS_core_register Defines and Type Definitions
+ \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_CORE Status and Control Registers
+ \brief Core Register type definitions.
+ @{
+ */
+
+/**
+ \brief Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+ struct
+ {
+ uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
+ uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
+ uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */
+ uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
+ uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
+ uint32_t C:1; /*!< bit: 29 Carry condition code flag */
+ uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
+ uint32_t N:1; /*!< bit: 31 Negative condition code flag */
+ } b; /*!< Structure used for bit access */
+ uint32_t w; /*!< Type used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos 31U /*!< APSR: N Position */
+#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */
+
+#define APSR_Z_Pos 30U /*!< APSR: Z Position */
+#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */
+
+#define APSR_C_Pos 29U /*!< APSR: C Position */
+#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */
+
+#define APSR_V_Pos 28U /*!< APSR: V Position */
+#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */
+
+#define APSR_Q_Pos 27U /*!< APSR: Q Position */
+#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */
+
+#define APSR_GE_Pos 16U /*!< APSR: GE Position */
+#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */
+
+
+/**
+ \brief Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+ struct
+ {
+ uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
+ uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
+ } b; /*!< Structure used for bit access */
+ uint32_t w; /*!< Type used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
+
+
+/**
+ \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+ struct
+ {
+ uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
+ uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */
+ uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
+ uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */
+ uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
+ uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */
+ uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
+ uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
+ uint32_t C:1; /*!< bit: 29 Carry condition code flag */
+ uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
+ uint32_t N:1; /*!< bit: 31 Negative condition code flag */
+ } b; /*!< Structure used for bit access */
+ uint32_t w; /*!< Type used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos 31U /*!< xPSR: N Position */
+#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */
+#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos 29U /*!< xPSR: C Position */
+#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos 28U /*!< xPSR: V Position */
+#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */
+
+#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */
+#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */
+
+#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */
+#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */
+
+#define xPSR_T_Pos 24U /*!< xPSR: T Position */
+#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
+
+#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */
+#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */
+
+#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
+
+
+/**
+ \brief Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+ struct
+ {
+ uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */
+ uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
+ uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */
+ uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */
+ } b; /*!< Structure used for bit access */
+ uint32_t w; /*!< Type used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */
+#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */
+
+#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */
+
+#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
+ \brief Type definitions for the NVIC Registers
+ @{
+ */
+
+/**
+ \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+ __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
+ uint32_t RESERVED0[24U];
+ __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
+ uint32_t RSERVED1[24U];
+ __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
+ uint32_t RESERVED2[24U];
+ __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
+ uint32_t RESERVED3[24U];
+ __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */
+ uint32_t RESERVED4[56U];
+ __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */
+ uint32_t RESERVED5[644U];
+ __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */
+} NVIC_Type;
+
+/* Software Triggered Interrupt Register Definitions */
+#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_SCB System Control Block (SCB)
+ \brief Type definitions for the System Control Block Registers
+ @{
+ */
+
+/**
+ \brief Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+ __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
+ __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
+ __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
+ __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
+ __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
+ __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
+ __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */
+ __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
+ __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */
+ __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */
+ __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */
+ __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */
+ __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */
+ __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */
+ __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */
+ __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */
+ __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */
+ __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */
+ __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */
+ uint32_t RESERVED0[5U];
+ __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Vector Table Offset Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */
+#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */
+
+#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */
+#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */
+
+#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */
+
+#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */
+
+#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */
+
+#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */
+
+#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */
+
+#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */
+
+/* SCB Configurable Fault Status Register Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */
+#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */
+
+#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */
+
+#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+
+/* SCB Hard Fault Status Register Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */
+#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */
+
+#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */
+
+#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */
+
+/* SCB Debug Fault Status Register Definitions */
+#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */
+
+#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */
+
+#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */
+
+#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */
+
+#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+ \brief Type definitions for the System Control and ID Register not in the SCB
+ @{
+ */
+
+/**
+ \brief Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+ uint32_t RESERVED0[1U];
+ __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */
+ __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */
+} SCnSCB_Type;
+
+/* Interrupt Controller Type Register Definitions */
+#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */
+
+/* Auxiliary Control Register Definitions */
+#define SCnSCB_ACTLR_DISOOFP_Pos 9U /*!< ACTLR: DISOOFP Position */
+#define SCnSCB_ACTLR_DISOOFP_Msk (1UL << SCnSCB_ACTLR_DISOOFP_Pos) /*!< ACTLR: DISOOFP Mask */
+
+#define SCnSCB_ACTLR_DISFPCA_Pos 8U /*!< ACTLR: DISFPCA Position */
+#define SCnSCB_ACTLR_DISFPCA_Msk (1UL << SCnSCB_ACTLR_DISFPCA_Pos) /*!< ACTLR: DISFPCA Mask */
+
+#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */
+#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */
+
+#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1U /*!< ACTLR: DISDEFWBUF Position */
+#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */
+
+#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */
+#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_SysTick System Tick Timer (SysTick)
+ \brief Type definitions for the System Timer Registers.
+ @{
+ */
+
+/**
+ \brief Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+ __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
+ __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
+ __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
+ __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM)
+ \brief Type definitions for the Instrumentation Trace Macrocell (ITM)
+ @{
+ */
+
+/**
+ \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+ */
+typedef struct
+{
+ __OM union
+ {
+ __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */
+ __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */
+ __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */
+ } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */
+ uint32_t RESERVED0[864U];
+ __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */
+ uint32_t RESERVED1[15U];
+ __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */
+ uint32_t RESERVED2[15U];
+ __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */
+ uint32_t RESERVED3[29U];
+ __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */
+ __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */
+ __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */
+ uint32_t RESERVED4[43U];
+ __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */
+ __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */
+ uint32_t RESERVED5[6U];
+ __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */
+ __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */
+ __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */
+ __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */
+ __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */
+ __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */
+ __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */
+ __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */
+ __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */
+ __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */
+ __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */
+ __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */
+} ITM_Type;
+
+/* ITM Trace Privilege Register Definitions */
+#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */
+
+/* ITM Trace Control Register Definitions */
+#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */
+
+#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */
+
+#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */
+
+#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */
+#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */
+
+#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */
+
+#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */
+
+#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */
+
+#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */
+
+#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */
+
+/* ITM Integration Write Register Definitions */
+#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */
+#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */
+
+/* ITM Integration Read Register Definitions */
+#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */
+#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */
+
+/* ITM Integration Mode Control Register Definitions */
+#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */
+#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */
+
+/* ITM Lock Status Register Definitions */
+#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */
+
+#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */
+
+#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */
+
+/*@}*/ /* end of group CMSIS_ITM */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT)
+ \brief Type definitions for the Data Watchpoint and Trace (DWT)
+ @{
+ */
+
+/**
+ \brief Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+ __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */
+ __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */
+ __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */
+ __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */
+ __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */
+ __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */
+ __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */
+ __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */
+ __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */
+ __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */
+ __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */
+ uint32_t RESERVED0[1U];
+ __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */
+ __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */
+ __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */
+ uint32_t RESERVED1[1U];
+ __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */
+ __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */
+ __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */
+ uint32_t RESERVED2[1U];
+ __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */
+ __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */
+ __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */
+
+#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */
+
+#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */
+
+#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */
+
+#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */
+
+#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */
+
+#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */
+
+#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */
+
+#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */
+
+#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */
+
+#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */
+
+#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */
+
+#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */
+
+#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */
+
+/* DWT CPI Count Register Definitions */
+#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */
+
+/* DWT Exception Overhead Count Register Definitions */
+#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */
+
+/* DWT Sleep Count Register Definitions */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */
+
+/* DWT LSU Count Register Definitions */
+#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */
+
+/* DWT Folded-instruction Count Register Definitions */
+#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */
+
+/* DWT Comparator Mask Register Definitions */
+#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */
+#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */
+#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */
+
+#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */
+#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */
+#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */
+
+#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */
+#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */
+
+#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */
+#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */
+
+#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */
+#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */
+
+#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */
+#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_TPI Trace Port Interface (TPI)
+ \brief Type definitions for the Trace Port Interface (TPI)
+ @{
+ */
+
+/**
+ \brief Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+ __IOM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */
+ __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */
+ uint32_t RESERVED0[2U];
+ __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */
+ uint32_t RESERVED1[55U];
+ __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */
+ uint32_t RESERVED2[131U];
+ __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */
+ __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */
+ __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */
+ uint32_t RESERVED3[759U];
+ __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER */
+ __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */
+ __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */
+ uint32_t RESERVED4[1U];
+ __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */
+ __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */
+ __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */
+ uint32_t RESERVED5[39U];
+ __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */
+ __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */
+ uint32_t RESERVED7[8U];
+ __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */
+ __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */
+
+/* TPI TRIGGER Register Definitions */
+#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */
+
+/* TPI Integration ETM Data Register Definitions (FIFO0) */
+#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */
+#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */
+
+#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */
+#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */
+
+#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */
+#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */
+
+#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */
+#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */
+
+#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */
+#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */
+
+#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */
+#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */
+
+#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */
+#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */
+
+/* TPI ITATBCTR2 Register Definitions */
+#define TPI_ITATBCTR2_ATREADY_Pos 0U /*!< TPI ITATBCTR2: ATREADY Position */
+#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/) /*!< TPI ITATBCTR2: ATREADY Mask */
+
+/* TPI Integration ITM Data Register Definitions (FIFO1) */
+#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */
+#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */
+
+#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */
+#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */
+
+#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */
+#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */
+
+#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */
+#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */
+
+#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */
+#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */
+
+#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */
+#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */
+
+#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */
+#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */
+
+/* TPI ITATBCTR0 Register Definitions */
+#define TPI_ITATBCTR0_ATREADY_Pos 0U /*!< TPI ITATBCTR0: ATREADY Position */
+#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/) /*!< TPI ITATBCTR0: ATREADY Mask */
+
+/* TPI Integration Mode Control Register Definitions */
+#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */
+#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */
+
+#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */
+#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */
+
+#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_MajorType_Pos 4U /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */
+
+#define TPI_DEVTYPE_SubType_Pos 0U /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+
+#if (__MPU_PRESENT == 1U)
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_MPU Memory Protection Unit (MPU)
+ \brief Type definitions for the Memory Protection Unit (MPU)
+ @{
+ */
+
+/**
+ \brief Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+ __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
+ __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
+ __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
+ __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
+ __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
+ __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */
+ __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */
+ __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */
+ __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */
+ __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */
+ __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */
+} MPU_Type;
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */
+#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */
+
+#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */
+#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */
+
+#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */
+#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */
+
+/* MPU Region Attribute and Size Register Definitions */
+#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */
+#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */
+
+#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */
+#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */
+
+#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */
+#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */
+
+#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */
+#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */
+
+#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */
+#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */
+
+#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */
+#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */
+
+#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */
+#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */
+
+#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */
+#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */
+
+#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */
+#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */
+
+#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */
+#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+#if (__FPU_PRESENT == 1U)
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_FPU Floating Point Unit (FPU)
+ \brief Type definitions for the Floating Point Unit (FPU)
+ @{
+ */
+
+/**
+ \brief Structure type to access the Floating Point Unit (FPU).
+ */
+typedef struct
+{
+ uint32_t RESERVED0[1U];
+ __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */
+ __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */
+ __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */
+ __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */
+ __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */
+} FPU_Type;
+
+/* Floating-Point Context Control Register Definitions */
+#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */
+#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */
+
+#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */
+#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */
+
+#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */
+#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */
+
+#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */
+#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */
+
+#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */
+#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */
+
+#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */
+#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */
+
+#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */
+#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */
+
+#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */
+#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */
+
+#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */
+#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */
+
+/* Floating-Point Context Address Register Definitions */
+#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */
+#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */
+
+/* Floating-Point Default Status Control Register Definitions */
+#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */
+#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */
+
+#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */
+#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */
+
+#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */
+#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */
+
+#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */
+#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */
+
+/* Media and FP Feature Register 0 Definitions */
+#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */
+#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */
+
+#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */
+#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */
+
+#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */
+#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */
+
+#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */
+#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */
+
+#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */
+#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */
+
+#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */
+#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */
+
+#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */
+#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */
+
+#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */
+#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */
+
+/* Media and FP Feature Register 1 Definitions */
+#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */
+#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */
+
+#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */
+#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */
+
+#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */
+#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */
+
+#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */
+#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */
+
+/*@} end of group CMSIS_FPU */
+#endif
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
+ \brief Type definitions for the Core Debug Registers
+ @{
+ */
+
+/**
+ \brief Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+ __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */
+ __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */
+ __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */
+ __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register Definitions */
+#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */
+#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */
+
+#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */
+
+#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */
+
+#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */
+
+#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */
+
+#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */
+
+#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */
+
+#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */
+
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
+
+#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_core_bitfield Core register bit field macros
+ \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+ @{
+ */
+
+/**
+ \brief Mask and shift a bit field value for use in a register bit range.
+ \param[in] field Name of the register bit field.
+ \param[in] value Value of the bit field.
+ \return Masked and shifted value.
+*/
+#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk)
+
+/**
+ \brief Mask and shift a register value to extract a bit filed value.
+ \param[in] field Name of the register bit field.
+ \param[in] value Value of register.
+ \return Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+ \ingroup CMSIS_core_register
+ \defgroup CMSIS_core_base Core Definitions
+ \brief Definitions for base addresses, unions, and structures.
+ @{
+ */
+
+/* Memory mapping of Cortex-M4 Hardware */
+#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
+#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */
+#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */
+#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */
+#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */
+#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
+#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
+#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
+
+#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */
+#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
+#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
+#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
+#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */
+#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */
+#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */
+#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */
+
+#if (__MPU_PRESENT == 1U)
+ #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
+ #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
+#endif
+
+#if (__FPU_PRESENT == 1U)
+ #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */
+ #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */
+#endif
+
+/*@} */
+
+
+
+/*******************************************************************************
+ * Hardware Abstraction Layer
+ Core Function Interface contains:
+ - Core NVIC Functions
+ - Core SysTick Functions
+ - Core Debug Functions
+ - Core Register Access Functions
+ ******************************************************************************/
+/**
+ \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ########################## NVIC functions #################################### */
+/**
+ \ingroup CMSIS_Core_FunctionInterface
+ \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+ \brief Functions that manage interrupts and exceptions via the NVIC.
+ @{
+ */
+
+/**
+ \brief Set Priority Grouping
+ \details Sets the priority grouping field using the required unlock sequence.
+ The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+ Only values from 0..7 are used.
+ In case of a conflict between priority grouping and available
+ priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+ \param [in] PriorityGroup Priority grouping field.
+ */
+__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+ uint32_t reg_value;
+ uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
+
+ reg_value = SCB->AIRCR; /* read old register configuration */
+ reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
+ reg_value = (reg_value |
+ ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+ (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */
+ SCB->AIRCR = reg_value;
+}
+
+
+/**
+ \brief Get Priority Grouping
+ \details Reads the priority grouping field from the NVIC Interrupt Controller.
+ \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
+{
+ return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+ \brief Enable External Interrupt
+ \details Enables a device-specific interrupt in the NVIC interrupt controller.
+ \param [in] IRQn External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+ NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+}
+
+
+/**
+ \brief Disable External Interrupt
+ \details Disables a device-specific interrupt in the NVIC interrupt controller.
+ \param [in] IRQn External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+ NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+}
+
+
+/**
+ \brief Get Pending Interrupt
+ \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt.
+ \param [in] IRQn Interrupt number.
+ \return 0 Interrupt status is not pending.
+ \return 1 Interrupt status is pending.
+ */
+__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+ return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+}
+
+
+/**
+ \brief Set Pending Interrupt
+ \details Sets the pending bit of an external interrupt.
+ \param [in] IRQn Interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+ NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+}
+
+
+/**
+ \brief Clear Pending Interrupt
+ \details Clears the pending bit of an external interrupt.
+ \param [in] IRQn External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+ NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+}
+
+
+/**
+ \brief Get Active Interrupt
+ \details Reads the active register in NVIC and returns the active bit.
+ \param [in] IRQn Interrupt number.
+ \return 0 Interrupt status is not active.
+ \return 1 Interrupt status is active.
+ */
+__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
+{
+ return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+}
+
+
+/**
+ \brief Set Interrupt Priority
+ \details Sets the priority of an interrupt.
+ \note The priority cannot be set for every core interrupt.
+ \param [in] IRQn Interrupt number.
+ \param [in] priority Priority to set.
+ */
+__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+ if ((int32_t)(IRQn) < 0)
+ {
+ SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ }
+ else
+ {
+ NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ }
+}
+
+
+/**
+ \brief Get Interrupt Priority
+ \details Reads the priority of an interrupt.
+ The interrupt number can be positive to specify an external (device specific) interrupt,
+ or negative to specify an internal (core) interrupt.
+ \param [in] IRQn Interrupt number.
+ \return Interrupt Priority.
+ Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+ if ((int32_t)(IRQn) < 0)
+ {
+ return(((uint32_t)SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+ }
+ else
+ {
+ return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS)));
+ }
+}
+
+
+/**
+ \brief Encode Priority
+ \details Encodes the priority for an interrupt with the given priority group,
+ preemptive priority value, and subpriority value.
+ In case of a conflict between priority grouping and available
+ priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+ \param [in] PriorityGroup Used priority group.
+ \param [in] PreemptPriority Preemptive priority value (starting from 0).
+ \param [in] SubPriority Subpriority value (starting from 0).
+ \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+ uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
+ uint32_t PreemptPriorityBits;
+ uint32_t SubPriorityBits;
+
+ PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+ SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+ return (
+ ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+ ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
+ );
+}
+
+
+/**
+ \brief Decode Priority
+ \details Decodes an interrupt priority value with a given priority group to
+ preemptive priority value and subpriority value.
+ In case of a conflict between priority grouping and available
+ priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+ \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+ \param [in] PriorityGroup Used priority group.
+ \param [out] pPreemptPriority Preemptive priority value (starting from 0).
+ \param [out] pSubPriority Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+ uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
+ uint32_t PreemptPriorityBits;
+ uint32_t SubPriorityBits;
+
+ PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+ SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+ *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+ *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL);
+}
+
+
+/**
+ \brief System Reset
+ \details Initiates a system reset request to reset the MCU.
+ */
+__STATIC_INLINE void NVIC_SystemReset(void)
+{
+ __DSB(); /* Ensure all outstanding memory accesses included
+ buffered write are completed before reset */
+ SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+ (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
+ SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */
+ __DSB(); /* Ensure completion of memory access */
+
+ for (;;) /* wait until reset */
+ {
+ __NOP();
+ }
+}
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+
+
+/* ################################## SysTick function ############################################ */
+/**
+ \ingroup CMSIS_Core_FunctionInterface
+ \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+ \brief Functions that configure the System.
+ @{
+ */
+
+#if (__Vendor_SysTickConfig == 0U)
+
+/**
+ \brief System Tick Configuration
+ \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+ Counter is in free running mode to generate periodic interrupts.
+ \param [in] ticks Number of ticks between two interrupts.
+ \return 0 Function succeeded.
+ \return 1 Function failed.
+ \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+ function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+ must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+ if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+ {
+ return (1UL); /* Reload value impossible */
+ }
+
+ SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
+ NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+ SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
+ SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
+ SysTick_CTRL_TICKINT_Msk |
+ SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
+ return (0UL); /* Function successful */
+}
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+/* ##################################### Debug In/Output function ########################################### */
+/**
+ \ingroup CMSIS_Core_FunctionInterface
+ \defgroup CMSIS_core_DebugFunctions ITM Functions
+ \brief Functions that access the ITM debug interface.
+ @{
+ */
+
+extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */
+#define ITM_RXBUFFER_EMPTY 0x5AA55AA5U /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
+
+
+/**
+ \brief ITM Send Character
+ \details Transmits a character via the ITM channel 0, and
+ \li Just returns when no debugger is connected that has booked the output.
+ \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+ \param [in] ch Character to transmit.
+ \returns Character to transmit.
+ */
+__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+ if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
+ ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */
+ {
+ while (ITM->PORT[0U].u32 == 0UL)
+ {
+ __NOP();
+ }
+ ITM->PORT[0U].u8 = (uint8_t)ch;
+ }
+ return (ch);
+}
+
+
+/**
+ \brief ITM Receive Character
+ \details Inputs a character via the external variable \ref ITM_RxBuffer.
+ \return Received character.
+ \return -1 No character pending.
+ */
+__STATIC_INLINE int32_t ITM_ReceiveChar (void)
+{
+ int32_t ch = -1; /* no character available */
+
+ if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
+ {
+ ch = ITM_RxBuffer;
+ ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
+ }
+
+ return (ch);
+}
+
+
+/**
+ \brief ITM Check Character
+ \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+ \return 0 No character available.
+ \return 1 Character available.
+ */
+__STATIC_INLINE int32_t ITM_CheckChar (void)
+{
+
+ if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
+ {
+ return (0); /* no character available */
+ }
+ else
+ {
+ return (1); /* character available */
+ }
+}
+
+/*@} end of CMSIS_core_DebugFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM4_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/third_party/NordicSemiconductor/cmsis/core_cmFunc.h b/third_party/NordicSemiconductor/cmsis/core_cmFunc.h
index cb1ebf8..979696f 100644
--- a/third_party/NordicSemiconductor/cmsis/core_cmFunc.h
+++ b/third_party/NordicSemiconductor/cmsis/core_cmFunc.h
@@ -1,86 +1,86 @@
-/**************************************************************************//**
- * @file core_cmFunc.h
- * @brief CMSIS Cortex-M Core Function Access Header File
- * @version V4.30
- * @date 20. October 2015
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
- All rights reserved.
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
- - Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- - Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
- - Neither the name of ARM nor the names of its contributors may be used
- to endorse or promote products derived from this software without
- specific prior written permission.
- *
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
- ---------------------------------------------------------------------------*/
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #pragma clang system_header /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CMFUNC_H
-#define __CORE_CMFUNC_H
-
-
-/* ########################### Core Function Access ########################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
- @{
-*/
-
-/*------------------ RealView Compiler -----------------*/
-#if defined ( __CC_ARM )
- #include "cmsis_armcc.h"
-
-/*------------------ ARM Compiler V6 -------------------*/
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #include "cmsis_armcc_V6.h"
-
-/*------------------ GNU Compiler ----------------------*/
-#elif defined ( __GNUC__ )
- #include "cmsis_gcc.h"
-
-/*------------------ ICC Compiler ----------------------*/
-#elif defined ( __ICCARM__ )
- #include <cmsis_iar.h>
-
-/*------------------ TI CCS Compiler -------------------*/
-#elif defined ( __TMS470__ )
- #include <cmsis_ccs.h>
-
-/*------------------ TASKING Compiler ------------------*/
-#elif defined ( __TASKING__ )
- /*
- * The CMSIS functions have been implemented as intrinsics in the compiler.
- * Please use "carm -?i" to get an up to date list of all intrinsics,
- * Including the CMSIS ones.
- */
-
-/*------------------ COSMIC Compiler -------------------*/
-#elif defined ( __CSMC__ )
- #include <cmsis_csm.h>
-
-#endif
-
-/*@} end of CMSIS_Core_RegAccFunctions */
-
-#endif /* __CORE_CMFUNC_H */
+/**************************************************************************//**
+ * @file core_cmFunc.h
+ * @brief CMSIS Cortex-M Core Function Access Header File
+ * @version V4.30
+ * @date 20. October 2015
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2015 ARM LIMITED
+
+ All rights reserved.
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ - Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ - Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ - Neither the name of ARM nor the names of its contributors may be used
+ to endorse or promote products derived from this software without
+ specific prior written permission.
+ *
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+ ---------------------------------------------------------------------------*/
+
+#if defined ( __ICCARM__ )
+ #pragma system_include /* treat file as system include file for MISRA check */
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #pragma clang system_header /* treat file as system include file */
+#endif
+
+#ifndef __CORE_CMFUNC_H
+#define __CORE_CMFUNC_H
+
+
+/* ########################### Core Function Access ########################### */
+/** \ingroup CMSIS_Core_FunctionInterface
+ \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
+ @{
+*/
+
+/*------------------ RealView Compiler -----------------*/
+#if defined ( __CC_ARM )
+ #include "cmsis_armcc.h"
+
+/*------------------ ARM Compiler V6 -------------------*/
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #include "cmsis_armcc_V6.h"
+
+/*------------------ GNU Compiler ----------------------*/
+#elif defined ( __GNUC__ )
+ #include "cmsis_gcc.h"
+
+/*------------------ ICC Compiler ----------------------*/
+#elif defined ( __ICCARM__ )
+ #include <cmsis_iar.h>
+
+/*------------------ TI CCS Compiler -------------------*/
+#elif defined ( __TMS470__ )
+ #include <cmsis_ccs.h>
+
+/*------------------ TASKING Compiler ------------------*/
+#elif defined ( __TASKING__ )
+ /*
+ * The CMSIS functions have been implemented as intrinsics in the compiler.
+ * Please use "carm -?i" to get an up to date list of all intrinsics,
+ * Including the CMSIS ones.
+ */
+
+/*------------------ COSMIC Compiler -------------------*/
+#elif defined ( __CSMC__ )
+ #include <cmsis_csm.h>
+
+#endif
+
+/*@} end of CMSIS_Core_RegAccFunctions */
+
+#endif /* __CORE_CMFUNC_H */
diff --git a/third_party/NordicSemiconductor/cmsis/core_cmInstr.h b/third_party/NordicSemiconductor/cmsis/core_cmInstr.h
index a0a5064..f474b0e 100644
--- a/third_party/NordicSemiconductor/cmsis/core_cmInstr.h
+++ b/third_party/NordicSemiconductor/cmsis/core_cmInstr.h
@@ -1,87 +1,87 @@
-/**************************************************************************//**
- * @file core_cmInstr.h
- * @brief CMSIS Cortex-M Core Instruction Access Header File
- * @version V4.30
- * @date 20. October 2015
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
- All rights reserved.
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
- - Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- - Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
- - Neither the name of ARM nor the names of its contributors may be used
- to endorse or promote products derived from this software without
- specific prior written permission.
- *
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
- ---------------------------------------------------------------------------*/
-
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #pragma clang system_header /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CMINSTR_H
-#define __CORE_CMINSTR_H
-
-
-/* ########################## Core Instruction Access ######################### */
-/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
- Access to dedicated instructions
- @{
-*/
-
-/*------------------ RealView Compiler -----------------*/
-#if defined ( __CC_ARM )
- #include "cmsis_armcc.h"
-
-/*------------------ ARM Compiler V6 -------------------*/
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #include "cmsis_armcc_V6.h"
-
-/*------------------ GNU Compiler ----------------------*/
-#elif defined ( __GNUC__ )
- #include "cmsis_gcc.h"
-
-/*------------------ ICC Compiler ----------------------*/
-#elif defined ( __ICCARM__ )
- #include <cmsis_iar.h>
-
-/*------------------ TI CCS Compiler -------------------*/
-#elif defined ( __TMS470__ )
- #include <cmsis_ccs.h>
-
-/*------------------ TASKING Compiler ------------------*/
-#elif defined ( __TASKING__ )
- /*
- * The CMSIS functions have been implemented as intrinsics in the compiler.
- * Please use "carm -?i" to get an up to date list of all intrinsics,
- * Including the CMSIS ones.
- */
-
-/*------------------ COSMIC Compiler -------------------*/
-#elif defined ( __CSMC__ )
- #include <cmsis_csm.h>
-
-#endif
-
-/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
-
-#endif /* __CORE_CMINSTR_H */
+/**************************************************************************//**
+ * @file core_cmInstr.h
+ * @brief CMSIS Cortex-M Core Instruction Access Header File
+ * @version V4.30
+ * @date 20. October 2015
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2015 ARM LIMITED
+
+ All rights reserved.
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ - Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ - Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ - Neither the name of ARM nor the names of its contributors may be used
+ to endorse or promote products derived from this software without
+ specific prior written permission.
+ *
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+ ---------------------------------------------------------------------------*/
+
+
+#if defined ( __ICCARM__ )
+ #pragma system_include /* treat file as system include file for MISRA check */
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #pragma clang system_header /* treat file as system include file */
+#endif
+
+#ifndef __CORE_CMINSTR_H
+#define __CORE_CMINSTR_H
+
+
+/* ########################## Core Instruction Access ######################### */
+/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
+ Access to dedicated instructions
+ @{
+*/
+
+/*------------------ RealView Compiler -----------------*/
+#if defined ( __CC_ARM )
+ #include "cmsis_armcc.h"
+
+/*------------------ ARM Compiler V6 -------------------*/
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #include "cmsis_armcc_V6.h"
+
+/*------------------ GNU Compiler ----------------------*/
+#elif defined ( __GNUC__ )
+ #include "cmsis_gcc.h"
+
+/*------------------ ICC Compiler ----------------------*/
+#elif defined ( __ICCARM__ )
+ #include <cmsis_iar.h>
+
+/*------------------ TI CCS Compiler -------------------*/
+#elif defined ( __TMS470__ )
+ #include <cmsis_ccs.h>
+
+/*------------------ TASKING Compiler ------------------*/
+#elif defined ( __TASKING__ )
+ /*
+ * The CMSIS functions have been implemented as intrinsics in the compiler.
+ * Please use "carm -?i" to get an up to date list of all intrinsics,
+ * Including the CMSIS ones.
+ */
+
+/*------------------ COSMIC Compiler -------------------*/
+#elif defined ( __CSMC__ )
+ #include <cmsis_csm.h>
+
+#endif
+
+/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
+
+#endif /* __CORE_CMINSTR_H */
diff --git a/third_party/NordicSemiconductor/cmsis/core_cmSimd.h b/third_party/NordicSemiconductor/cmsis/core_cmSimd.h
index 4d76bf9..66bf5c2 100644
--- a/third_party/NordicSemiconductor/cmsis/core_cmSimd.h
+++ b/third_party/NordicSemiconductor/cmsis/core_cmSimd.h
@@ -1,96 +1,96 @@
-/**************************************************************************//**
- * @file core_cmSimd.h
- * @brief CMSIS Cortex-M SIMD Header File
- * @version V4.30
- * @date 20. October 2015
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
- All rights reserved.
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
- - Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- - Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
- - Neither the name of ARM nor the names of its contributors may be used
- to endorse or promote products derived from this software without
- specific prior written permission.
- *
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
- ---------------------------------------------------------------------------*/
-
-
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #pragma clang system_header /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CMSIMD_H
-#define __CORE_CMSIMD_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-
-/* ################### Compiler specific Intrinsics ########################### */
-/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
- Access to dedicated SIMD instructions
- @{
-*/
-
-/*------------------ RealView Compiler -----------------*/
-#if defined ( __CC_ARM )
- #include "cmsis_armcc.h"
-
-/*------------------ ARM Compiler V6 -------------------*/
-#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
- #include "cmsis_armcc_V6.h"
-
-/*------------------ GNU Compiler ----------------------*/
-#elif defined ( __GNUC__ )
- #include "cmsis_gcc.h"
-
-/*------------------ ICC Compiler ----------------------*/
-#elif defined ( __ICCARM__ )
- #include <cmsis_iar.h>
-
-/*------------------ TI CCS Compiler -------------------*/
-#elif defined ( __TMS470__ )
- #include <cmsis_ccs.h>
-
-/*------------------ TASKING Compiler ------------------*/
-#elif defined ( __TASKING__ )
- /*
- * The CMSIS functions have been implemented as intrinsics in the compiler.
- * Please use "carm -?i" to get an up to date list of all intrinsics,
- * Including the CMSIS ones.
- */
-
-/*------------------ COSMIC Compiler -------------------*/
-#elif defined ( __CSMC__ )
- #include <cmsis_csm.h>
-
-#endif
-
-/*@} end of group CMSIS_SIMD_intrinsics */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CMSIMD_H */
+/**************************************************************************//**
+ * @file core_cmSimd.h
+ * @brief CMSIS Cortex-M SIMD Header File
+ * @version V4.30
+ * @date 20. October 2015
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2015 ARM LIMITED
+
+ All rights reserved.
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+ - Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ - Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+ - Neither the name of ARM nor the names of its contributors may be used
+ to endorse or promote products derived from this software without
+ specific prior written permission.
+ *
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+ ---------------------------------------------------------------------------*/
+
+
+#if defined ( __ICCARM__ )
+ #pragma system_include /* treat file as system include file for MISRA check */
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #pragma clang system_header /* treat file as system include file */
+#endif
+
+#ifndef __CORE_CMSIMD_H
+#define __CORE_CMSIMD_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+
+/* ################### Compiler specific Intrinsics ########################### */
+/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
+ Access to dedicated SIMD instructions
+ @{
+*/
+
+/*------------------ RealView Compiler -----------------*/
+#if defined ( __CC_ARM )
+ #include "cmsis_armcc.h"
+
+/*------------------ ARM Compiler V6 -------------------*/
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #include "cmsis_armcc_V6.h"
+
+/*------------------ GNU Compiler ----------------------*/
+#elif defined ( __GNUC__ )
+ #include "cmsis_gcc.h"
+
+/*------------------ ICC Compiler ----------------------*/
+#elif defined ( __ICCARM__ )
+ #include <cmsis_iar.h>
+
+/*------------------ TI CCS Compiler -------------------*/
+#elif defined ( __TMS470__ )
+ #include <cmsis_ccs.h>
+
+/*------------------ TASKING Compiler ------------------*/
+#elif defined ( __TASKING__ )
+ /*
+ * The CMSIS functions have been implemented as intrinsics in the compiler.
+ * Please use "carm -?i" to get an up to date list of all intrinsics,
+ * Including the CMSIS ones.
+ */
+
+/*------------------ COSMIC Compiler -------------------*/
+#elif defined ( __CSMC__ )
+ #include <cmsis_csm.h>
+
+#endif
+
+/*@} end of group CMSIS_SIMD_intrinsics */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CMSIMD_H */
diff --git a/third_party/NordicSemiconductor/dependencies/app_util.h b/third_party/NordicSemiconductor/dependencies/app_util.h
index 364ece9..b21e25d 100644
--- a/third_party/NordicSemiconductor/dependencies/app_util.h
+++ b/third_party/NordicSemiconductor/dependencies/app_util.h
@@ -1,1310 +1,1326 @@
-/**
- * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-/** @file
- *
- * @defgroup app_util Utility Functions and Definitions
- * @{
- * @ingroup app_common
- *
- * @brief Various types and definitions available to all applications.
- */
-
-#ifndef APP_UTIL_H__
-#define APP_UTIL_H__
-
-#include <stdint.h>
-#include <stdbool.h>
-#include <stddef.h>
-#include "compiler_abstraction.h"
-#include "nordic_common.h"
-#include "nrf.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-/**
- * @cond (NODOX)
- */
-/*lint -save -e27 -e10 -e19 */
-#if defined (__LINT__)
-#define STACK_BASE 0x1F000 // Arbitrary value.
-#define STACK_TOP 0x20000 // Arbitrary value.
-
-#elif defined ( __CC_ARM )
-extern char STACK$$Base;
-extern char STACK$$Length;
-#define STACK_BASE &STACK$$Base
-#define STACK_TOP ((void*)((uint32_t)STACK_BASE + (uint32_t)&STACK$$Length))
-
-#elif defined ( __ICCARM__ )
-extern char CSTACK$$Base;
-extern char CSTACK$$Length;
-#define STACK_BASE &CSTACK$$Base
-#define STACK_TOP ((void*)((uint32_t)STACK_BASE + (uint32_t)&CSTACK$$Length))
-
-#elif defined ( __GNUC__ )
-extern uint32_t __StackTop;
-extern uint32_t __StackLimit;
-#define STACK_BASE &__StackLimit
-#define STACK_TOP &__StackTop
-#endif
-
-/* These macros are valid only when absolute placement is used for the application
- * image. The macros are not compile time symbols. They cannot be used as a
- * constant expression, for example, inside a static assert or linker script
- * at-placement. */
-#if defined (__LINT__)
-#define CODE_START (0) // Arbitrary value.
-#define CODE_END (0x1000) // Arbitrary value.
-#define CODE_SIZE (0x1000) // Arbitrary value.
-
-#elif defined ( __CC_ARM )
-extern char Load$$LR$$LR_IROM1$$Base;
-extern char Load$$LR$$LR_IROM1$$Length;
-extern char Load$$LR$$LR_IROM1$$Limit;
-#define CODE_START ((uint32_t)&Load$$LR$$LR_IROM1$$Base)
-#define CODE_END ((uint32_t)&Load$$LR$$LR_IROM1$$Limit)
-#define CODE_SIZE ((uint32_t)&Load$$LR$$LR_IROM1$$Length)
-
-#elif defined ( __ICCARM__ )
-extern void * __vector_table;
-extern char RO_END$$Base;
-#define CODE_START ((uint32_t)&__vector_table)
-#define CODE_END ((uint32_t)&RO_END$$Base)
-#define CODE_SIZE (CODE_END - CODE_START)
-
-#elif defined(__SES_ARM)
-extern uint32_t * _vectors;
-extern uint32_t __FLASH_segment_used_end__;
-#define CODE_START ((uint32_t)&_vectors)
-#define CODE_END ((uint32_t)&__FLASH_segment_used_end__)
-#define CODE_SIZE (CODE_END - CODE_START)
-
-#elif defined ( __GNUC__ )
-extern uint32_t __isr_vector;
-extern uint32_t __etext;
-#define CODE_START ((uint32_t)&__isr_vector)
-#define CODE_END ((uint32_t)&__etext)
-#define CODE_SIZE (CODE_END - CODE_START)
-#endif
-/** @}
- * @endcond
- */
-/* lint -restore */
-
-enum
-{
- UNIT_0_625_MS = 625, /**< Number of microseconds in 0.625 milliseconds. */
- UNIT_1_25_MS = 1250, /**< Number of microseconds in 1.25 milliseconds. */
- UNIT_10_MS = 10000 /**< Number of microseconds in 10 milliseconds. */
-};
-
-/**
- * @brief Counts number of bits required for the given value
- *
- * The macro technically searches for the highest bit set.
- * For value 0 it returns 0.
- *
- * @param val Value to be processed
- *
- * @return Number of bits required for the given value
- */
-//lint -emacro(572,VBITS)
-#define VBITS(val) VBITS_32(val)
-
-/**
- * @def VBITS_1
- * @brief Internal macro used by @ref VBITS */
-/**
- * @def VBITS_2
- * @brief Internal macro used by @ref VBITS */
-/**
- * @def VBITS_4
- * @brief Internal macro used by @ref VBITS */
-/**
- * @def VBITS_8
- * @brief Internal macro used by @ref VBITS */
-/**
- * @def VBITS_16
- * @brief Internal macro used by @ref VBITS */
-/**
- * @def VBITS_32
- * @brief Internal macro used by @ref VBITS */
-#define VBITS_1( v) ((((v) & (0x0001U << 0)) != 0) ? 1U : 0U)
-#define VBITS_2( v) ((((v) & (0x0001U << 1)) != 0) ? VBITS_1 ((v) >> 1) + 1 : VBITS_1 (v))
-#define VBITS_4( v) ((((v) & (0x0003U << 2)) != 0) ? VBITS_2 ((v) >> 2) + 2 : VBITS_2 (v))
-#define VBITS_8( v) ((((v) & (0x000fU << 4)) != 0) ? VBITS_4 ((v) >> 4) + 4 : VBITS_4 (v))
-#define VBITS_16(v) ((((v) & (0x00ffU << 8)) != 0) ? VBITS_8 ((v) >> 8) + 8 : VBITS_8 (v))
-#define VBITS_32(v) ((((v) & (0xffffU << 16)) != 0) ? VBITS_16((v) >> 16) + 16 : VBITS_16(v))
-
-
-/*Segger embedded studio originally has offsetof macro which cannot be used in macros (like STATIC_ASSERT).
- This redefinition is to allow using that. */
-#if defined(__SES_ARM) && defined(__GNUC__)
-#undef offsetof
-#define offsetof(TYPE, MEMBER) __builtin_offsetof (TYPE, MEMBER)
-#endif
-
-/**@brief Implementation specific macro for delayed macro expansion used in string concatenation
-*
-* @param[in] lhs Left hand side in concatenation
-* @param[in] rhs Right hand side in concatenation
-*/
-#define STRING_CONCATENATE_IMPL(lhs, rhs) lhs ## rhs
-
-
-/**@brief Macro used to concatenate string using delayed macro expansion
-*
-* @note This macro will delay concatenation until the expressions have been resolved
-*
-* @param[in] lhs Left hand side in concatenation
-* @param[in] rhs Right hand side in concatenation
-*/
-#define STRING_CONCATENATE(lhs, rhs) STRING_CONCATENATE_IMPL(lhs, rhs)
-
-
-#ifndef __LINT__
-
-#ifdef __GNUC__
-#define STATIC_ASSERT_SIMPLE(EXPR) _Static_assert(EXPR, "unspecified message")
-#define STATIC_ASSERT_MSG(EXPR, MSG) _Static_assert(EXPR, MSG)
-#endif
-
-#ifdef __CC_ARM
-#define STATIC_ASSERT_SIMPLE(EXPR) extern char (*_do_assert(void)) [sizeof(char[1 - 2*!(EXPR)])]
-#define STATIC_ASSERT_MSG(EXPR, MSG) extern char (*_do_assert(void)) [sizeof(char[1 - 2*!(EXPR)])]
-#endif
-
-#ifdef __ICCARM__
-#define STATIC_ASSERT_SIMPLE(EXPR) static_assert(EXPR, "unspecified message")
-#define STATIC_ASSERT_MSG(EXPR, MSG) static_assert(EXPR, MSG)
-#endif
-
-#else // __LINT__
-
-#define STATIC_ASSERT_SIMPLE(EXPR) extern char (*_ignore(void))
-#define STATIC_ASSERT_MSG(EXPR, MSG) extern char (*_ignore(void))
-
-#endif
-
-
-#define _SELECT_ASSERT_FUNC(x, EXPR, MSG, ASSERT_MACRO, ...) ASSERT_MACRO
-
-/**
- * @brief Static (i.e. compile time) assert macro.
- *
- * @note The output of STATIC_ASSERT can be different across compilers.
- *
- * Usage:
- * STATIC_ASSERT(expression);
- * STATIC_ASSERT(expression, message);
- *
- * @hideinitializer
- */
-//lint -save -esym(???, STATIC_ASSERT)
-#define STATIC_ASSERT(...) \
- _SELECT_ASSERT_FUNC(x, ##__VA_ARGS__, \
- STATIC_ASSERT_MSG(__VA_ARGS__), \
- STATIC_ASSERT_SIMPLE(__VA_ARGS__))
-//lint -restore
-
-
-/**@brief Implementation details for NUM_VAR_ARGS */
-#define NUM_VA_ARGS_IMPL( \
- _0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, \
- _11, _12, _13, _14, _15, _16, _17, _18, _19, _20, \
- _21, _22, _23, _24, _25, _26, _27, _28, _29, _30, \
- _31, _32, _33, _34, _35, _36, _37, _38, _39, _40, \
- _41, _42, _43, _44, _45, _46, _47, _48, _49, _50, \
- _51, _52, _53, _54, _55, _56, _57, _58, _59, _60, \
- _61, _62, N, ...) N
-
-
-/**@brief Macro to get the number of arguments in a call variadic macro call
- *
- * param[in] ... List of arguments
- *
- * @retval Number of variadic arguments in the argument list
- */
-#define NUM_VA_ARGS(...) NUM_VA_ARGS_IMPL(__VA_ARGS__, 63, 62, 61, \
- 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \
- 50, 49, 48, 47, 46, 45, 44, 43, 42, 41, \
- 40, 39, 38, 37, 36, 35, 34, 33, 32, 31, \
- 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, \
- 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, \
- 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
-
-/**@brief Implementation details for NUM_VAR_ARGS */
-#define NUM_VA_ARGS_LESS_1_IMPL( \
- _ignored, \
- _0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, \
- _11, _12, _13, _14, _15, _16, _17, _18, _19, _20, \
- _21, _22, _23, _24, _25, _26, _27, _28, _29, _30, \
- _31, _32, _33, _34, _35, _36, _37, _38, _39, _40, \
- _41, _42, _43, _44, _45, _46, _47, _48, _49, _50, \
- _51, _52, _53, _54, _55, _56, _57, _58, _59, _60, \
- _61, _62, N, ...) N
-
-/**@brief Macro to get the number of arguments in a call variadic macro call.
- * First argument is not counted.
- *
- * param[in] ... List of arguments
- *
- * @retval Number of variadic arguments in the argument list
- */
-#define NUM_VA_ARGS_LESS_1(...) NUM_VA_ARGS_LESS_1_IMPL(__VA_ARGS__, 63, 62, 61, \
- 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \
- 50, 49, 48, 47, 46, 45, 44, 43, 42, 41, \
- 40, 39, 38, 37, 36, 35, 34, 33, 32, 31, \
- 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, \
- 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, \
- 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, ~)
-
-
-/**@brief type for holding an encoded (i.e. little endian) 16 bit unsigned integer. */
-typedef uint8_t uint16_le_t[2];
-
-/**@brief Type for holding an encoded (i.e. little endian) 32 bit unsigned integer. */
-typedef uint8_t uint32_le_t[4];
-
-/**@brief Byte array type. */
-typedef struct
-{
- uint16_t size; /**< Number of array entries. */
- uint8_t * p_data; /**< Pointer to array entries. */
-} uint8_array_t;
-
-
-/**@brief Macro for performing rounded integer division (as opposed to truncating the result).
- *
- * @param[in] A Numerator.
- * @param[in] B Denominator.
- *
- * @return Rounded (integer) result of dividing A by B.
- */
-#define ROUNDED_DIV(A, B) (((A) + ((B) / 2)) / (B))
-
-
-/**@brief Macro for checking if an integer is a power of two.
- *
- * @param[in] A Number to be tested.
- *
- * @return true if value is power of two.
- * @return false if value not power of two.
- */
-#define IS_POWER_OF_TWO(A) ( ((A) != 0) && ((((A) - 1) & (A)) == 0) )
-
-
-/**@brief Macro for converting milliseconds to ticks.
- *
- * @param[in] TIME Number of milliseconds to convert.
- * @param[in] RESOLUTION Unit to be converted to in [us/ticks].
- */
-#define MSEC_TO_UNITS(TIME, RESOLUTION) (((TIME) * 1000) / (RESOLUTION))
-
-
-/**@brief Macro for performing integer division, making sure the result is rounded up.
- *
- * @details One typical use for this is to compute the number of objects with size B is needed to
- * hold A number of bytes.
- *
- * @param[in] A Numerator.
- * @param[in] B Denominator.
- *
- * @return Integer result of dividing A by B, rounded up.
- */
-#define CEIL_DIV(A, B) \
- (((A) + (B) - 1) / (B))
-
-
-/**@brief Macro for creating a buffer aligned to 4 bytes.
- *
- * @param[in] NAME Name of the buffor.
- * @param[in] MIN_SIZE Size of this buffor (it will be rounded up to multiples of 4 bytes).
- */
-#define WORD_ALIGNED_MEM_BUFF(NAME, MIN_SIZE) static uint32_t NAME[CEIL_DIV(MIN_SIZE, sizeof(uint32_t))]
-
-
-/**@brief Macro for calculating the number of words that are needed to hold a number of bytes.
- *
- * @details Adds 3 and divides by 4.
- *
- * @param[in] n_bytes The number of bytes.
- *
- * @return The number of words that @p n_bytes take up (rounded up).
- */
-#define BYTES_TO_WORDS(n_bytes) (((n_bytes) + 3) >> 2)
-
-
-/**@brief The number of bytes in a word.
- */
-#define BYTES_PER_WORD (4)
-
-
-/**@brief Macro for increasing a number to the nearest (larger) multiple of another number.
- *
- * @param[in] alignment The number to align to.
- * @param[in] number The number to align (increase).
- *
- * @return The aligned (increased) @p number.
- */
-#define ALIGN_NUM(alignment, number) (((number) - 1) + (alignment) - (((number) - 1) % (alignment)))
-
-/**@brief Macro for getting first of 2 parameters.
- *
- * @param[in] a1 First parameter.
- * @param[in] a2 Second parameter.
- */
-#define GET_ARG_1(a1, a2) a1
-
-/**@brief Macro for getting second of 2 parameters.
- *
- * @param[in] a1 First parameter.
- * @param[in] a2 Second parameter.
- */
-#define GET_ARG_2(a1, a2) a2
-
-
-/**@brief Container of macro (borrowed from Linux kernel).
- *
- * This macro returns parent structure address basing on child member address.
- *
- * @param ptr Address of child type.
- * @param type Type of parent structure.
- * @param member Name of child field in parent structure.
- *
- * @return Parent structure address.
- * */
-#define CONTAINER_OF(ptr, type, member) \
- (type *)((char *)ptr - offsetof(type, member))
-
-
-/**
- * @brief Define Bit-field mask
- *
- * Macro that defined the mask with selected number of bits set, starting from
- * provided bit number.
- *
- * @param[in] bcnt Number of bits in the bit-field
- * @param[in] boff Lowest bit number
- */
-#define BF_MASK(bcnt, boff) ( ((1U << (bcnt)) - 1U) << (boff) )
-
-/**
- * @brief Get bit-field
- *
- * Macro that extracts selected bit-field from provided value
- *
- * @param[in] val Value from which selected bit-field would be extracted
- * @param[in] bcnt Number of bits in the bit-field
- * @param[in] boff Lowest bit number
- *
- * @return Value of the selected bits
- */
-#define BF_GET(val, bcnt, boff) ( ( (val) & BF_MASK((bcnt), (boff)) ) >> (boff) )
-
-/**
- * @brief Create bit-field value
- *
- * Value is masked and shifted to match given bit-field
- *
- * @param[in] val Value to set on bit-field
- * @param[in] bcnt Number of bits for bit-field
- * @param[in] boff Offset of bit-field
- *
- * @return Value positioned of given bit-field.
- */
-#define BF_VAL(val, bcnt, boff) ( (((uint32_t)(val)) << (boff)) & BF_MASK(bcnt, boff) )
-
-/**
- * @name Configuration of complex bit-field
- *
- * @sa BF_CX
- * @{
- */
-/** @brief Position of bit count in complex bit-field value */
-#define BF_CX_BCNT_POS 0U
-/** @brief Mask of bit count in complex bit-field value */
-#define BF_CX_BCNT_MASK (0xffU << BF_CX_BCNT_POS)
-/** @brief Position of bit position in complex bit-field value */
-#define BF_CX_BOFF_POS 8U
-/** @brief Mask of bit position in complex bit-field value */
-#define BF_CX_BOFF_MASK (0xffU << BF_CX_BOFF_POS)
-/** @} */
-
-/**
- * @brief Define complex bit-field
- *
- * Complex bit-field would contain its position and size in one number.
- * @sa BF_CX_MASK
- * @sa BF_CX_POS
- * @sa BF_CX_GET
- *
- * @param[in] bcnt Number of bits in the bit-field
- * @param[in] boff Lowest bit number
- *
- * @return The single number that describes the bit-field completely.
- */
-#define BF_CX(bcnt, boff) ( ((((uint32_t)(bcnt)) << BF_CX_BCNT_POS) & BF_CX_BCNT_MASK) | ((((uint32_t)(boff)) << BF_CX_BOFF_POS) & BF_CX_BOFF_MASK) )
-
-/**
- * @brief Get number of bits in bit-field
- *
- * @sa BF_CX
- *
- * @param bf_cx Complex bit-field
- *
- * @return Number of bits in given bit-field
- */
-#define BF_CX_BCNT(bf_cx) ( ((bf_cx) & BF_CX_BCNT_MASK) >> BF_CX_BCNT_POS )
-
-/**
- * @brief Get lowest bit number in the field
- *
- * @sa BF_CX
- *
- * @param[in] bf_cx Complex bit-field
- *
- * @return Lowest bit number in given bit-field
- */
-#define BF_CX_BOFF(bf_cx) ( ((bf_cx) & BF_CX_BOFF_MASK) >> BF_CX_BOFF_POS )
-
-/**
- * @brief Get bit mask of the selected field
- *
- * @sa BF_CX
- *
- * @param[in] bf_cx Complex bit-field
- *
- * @return Mask of given bit-field
- */
-#define BF_CX_MASK(bf_cx) BF_MASK(BF_CX_BCNT(bf_cx), BF_CX_BOFF(bf_cx))
-
-/**
- * @brief Get bit-field
- *
- * Macro that extracts selected bit-field from provided value.
- * Bit-field is given as a complex value.
- *
- * @sa BF_CX
- * @sa BF_GET
- *
- * @param[in] val Value from which selected bit-field would be extracted
- * @param[in] bf_cx Complex bit-field
- *
- * @return Value of the selected bits.
- */
-#define BF_CX_GET(val, bf_cx) BF_GET(val, BF_CX_BCNT(bf_cx), BF_CX_BOFF(bf_cx))
-
-/**
- * @brief Create bit-field value
- *
- * Value is masked and shifted to match given bit-field.
- *
- * @param[in] val Value to set on bit-field
- * @param[in] bf_cx Complex bit-field
- *
- * @return Value positioned of given bit-field.
- */
-#define BF_CX_VAL(val, bf_cx) BF_VAL(val, BF_CX_BCNT(bf_cx), BF_CX_BOFF(bf_cx))
-
-/**
- * @brief Extracting data from the brackets
- *
- * This macro get rid of brackets around the argument.
- * It can be used to pass multiple arguments in logical one argument to a macro.
- * Call it with arguments inside brackets:
- * @code
- * #define ARGUMENTS (a, b, c)
- * BRACKET_EXTRACT(ARGUMENTS)
- * @endcode
- * It would produce:
- * @code
- * a, b, c
- * @endcode
- *
- * @param a Argument with anything inside brackets
- * @return Anything that appears inside the brackets of the argument
- *
- * @note
- * The argument of the macro have to be inside brackets.
- * In other case the compilation would fail.
- */
-#define BRACKET_EXTRACT(a) BRACKET_EXTRACT_(a)
-#define BRACKET_EXTRACT_(a) BRACKET_EXTRACT__ a
-#define BRACKET_EXTRACT__(...) __VA_ARGS__
-
-
-/**
- * @brief Check if number of parameters is more than 1
- *
- * @param ... Arguments to count
- *
- * @return 0 If argument count is <= 1
- * @return 1 If argument count is > 1
- *
- * @sa NUM_VA_ARGS
- * @sa NUM_IS_MORE_THAN_1
- */
-#define NUM_VA_ARGS_IS_MORE_THAN_1(...) NUM_IS_MORE_THAN_1(NUM_VA_ARGS(__VA_ARGS__))
-
-/**
- * @brief Check if given numeric value is bigger than 1
- *
- * This macro accepts numeric value, that may be the result of argument expansion.
- * This numeric value is then converted to 0 if it is lover than 1 or to 1 if
- * its value is higher than 1.
- * The generated result can be used to glue it into other macro mnemonic name.
- *
- * @param N Numeric value to check
- *
- * @return 0 If argument is <= 1
- * @return 1 If argument is > 1
- *
- * @note Any existing definition of a form NUM_IS_MORE_THAN_1_PROBE_[N] can
- * broke the result of this macro
- */
-#define NUM_IS_MORE_THAN_1(N) NUM_IS_MORE_THAN_1_(N)
-#define NUM_IS_MORE_THAN_1_(N) NUM_IS_MORE_THAN_1_PROBE_(NUM_IS_MORE_THAN_1_PROBE_ ## N, 1)
-#define NUM_IS_MORE_THAN_1_PROBE_(...) GET_VA_ARG_1(GET_ARGS_AFTER_1(__VA_ARGS__))
-#define NUM_IS_MORE_THAN_1_PROBE_0 ~, 0
-#define NUM_IS_MORE_THAN_1_PROBE_1 ~, 0
-
-/**
- * @brief Get the first argument
- *
- * @param ... Arguments to select
- *
- * @return First argument or empty if no arguments are provided
- */
-#define GET_VA_ARG_1(...) GET_VA_ARG_1_(__VA_ARGS__, ) // Make sure that also for 1 argument it works
-#define GET_VA_ARG_1_(a1, ...) a1
-
-/**
- * @brief Get all the arguments but the first one
- *
- * @param ... Arguments to select
- *
- * @return All arguments after the first one or empty if less than 2 arguments are provided
- */
-#define GET_ARGS_AFTER_1(...) GET_ARGS_AFTER_1_(__VA_ARGS__, ) // Make sure that also for 1 argument it works
-#define GET_ARGS_AFTER_1_(a1, ...) __VA_ARGS__
-
-/**
- * @brief Size of a field in declared structure
- *
- * Macro that returns the size of the structure field.
- * @param struct_type Variable type to get the field size from
- * @param field Field name to analyze. It can be even field inside field (field.somethingelse.and_another).
- *
- * @return Size of the field
- */
-#define FIELD_SIZE(struct_type, field) sizeof(((struct struct_type*)NULL)->field)
-
-/**
- * @brief Number of elements in field array in declared structure
- *
- * Macro that returns number of elementy in structure field.
- * @param struct_type Variable type to get the field size from
- * @param field Field name to analyze.
- *
- * @return Number of elements in field array
- *
- * @sa FIELD_SIZE
- */
-#define FIELD_ARRAY_SIZE(struct_type, field) (FIELD_SIZE(struct_type, field) / FIELD_SIZE(struct_type, field[0]))
-
-/**
- * @brief Mapping macro
- *
- * Macro that process all arguments using given macro
- *
- * @param ... Macro name to be used for argument processing followed by arguments to process.
- * Macro should have following form: MACRO(argument)
- *
- * @return All arguments processed by given macro
- */
-#define MACRO_MAP(...) MACRO_MAP_(__VA_ARGS__)
-#define MACRO_MAP_(...) MACRO_MAP_N(NUM_VA_ARGS_LESS_1(__VA_ARGS__), __VA_ARGS__) // To make sure it works also for 2 arguments in total
-
-/**
- * @brief Mapping macro, recursive version
- *
- * Can be used in @ref MACRO_MAP macro
- */
-#define MACRO_MAP_REC(...) MACRO_MAP_REC_(__VA_ARGS__)
-#define MACRO_MAP_REC_(...) MACRO_MAP_REC_N(NUM_VA_ARGS_LESS_1(__VA_ARGS__), __VA_ARGS__) // To make sure it works also for 2 arguments in total
-/**
- * @brief Mapping N arguments macro
- *
- * Macro similar to @ref MACRO_MAP but maps exact number of arguments.
- * If there is more arguments given, the rest would be ignored.
- *
- * @param N Number of arguments to map
- * @param ... Macro name to be used for argument processing followed by arguments to process.
- * Macro should have following form: MACRO(argument)
- *
- * @return Selected number of arguments processed by given macro
- */
-#define MACRO_MAP_N(N, ...) MACRO_MAP_N_(N, __VA_ARGS__)
-#define MACRO_MAP_N_(N, ...) CONCAT_2(MACRO_MAP_, N)(__VA_ARGS__, )
-
-/**
- * @brief Mapping N arguments macro, recursive version
- *
- * Can be used in @ref MACRO_MAP_N macro
- */
-#define MACRO_MAP_REC_N(N, ...) MACRO_MAP_REC_N_(N, __VA_ARGS__)
-#define MACRO_MAP_REC_N_(N, ...) CONCAT_2(MACRO_MAP_REC_, N)(__VA_ARGS__, )
-
-#define MACRO_MAP_0( ...)
-#define MACRO_MAP_1( macro, a, ...) macro(a)
-#define MACRO_MAP_2( macro, a, ...) macro(a) MACRO_MAP_1 (macro, __VA_ARGS__, )
-#define MACRO_MAP_3( macro, a, ...) macro(a) MACRO_MAP_2 (macro, __VA_ARGS__, )
-#define MACRO_MAP_4( macro, a, ...) macro(a) MACRO_MAP_3 (macro, __VA_ARGS__, )
-#define MACRO_MAP_5( macro, a, ...) macro(a) MACRO_MAP_4 (macro, __VA_ARGS__, )
-#define MACRO_MAP_6( macro, a, ...) macro(a) MACRO_MAP_5 (macro, __VA_ARGS__, )
-#define MACRO_MAP_7( macro, a, ...) macro(a) MACRO_MAP_6 (macro, __VA_ARGS__, )
-#define MACRO_MAP_8( macro, a, ...) macro(a) MACRO_MAP_7 (macro, __VA_ARGS__, )
-#define MACRO_MAP_9( macro, a, ...) macro(a) MACRO_MAP_8 (macro, __VA_ARGS__, )
-#define MACRO_MAP_10(macro, a, ...) macro(a) MACRO_MAP_9 (macro, __VA_ARGS__, )
-#define MACRO_MAP_11(macro, a, ...) macro(a) MACRO_MAP_10(macro, __VA_ARGS__, )
-#define MACRO_MAP_12(macro, a, ...) macro(a) MACRO_MAP_11(macro, __VA_ARGS__, )
-#define MACRO_MAP_13(macro, a, ...) macro(a) MACRO_MAP_12(macro, __VA_ARGS__, )
-#define MACRO_MAP_14(macro, a, ...) macro(a) MACRO_MAP_13(macro, __VA_ARGS__, )
-#define MACRO_MAP_15(macro, a, ...) macro(a) MACRO_MAP_14(macro, __VA_ARGS__, )
-#define MACRO_MAP_16(macro, a, ...) macro(a) MACRO_MAP_15(macro, __VA_ARGS__, )
-#define MACRO_MAP_17(macro, a, ...) macro(a) MACRO_MAP_16(macro, __VA_ARGS__, )
-#define MACRO_MAP_18(macro, a, ...) macro(a) MACRO_MAP_17(macro, __VA_ARGS__, )
-#define MACRO_MAP_19(macro, a, ...) macro(a) MACRO_MAP_18(macro, __VA_ARGS__, )
-#define MACRO_MAP_20(macro, a, ...) macro(a) MACRO_MAP_19(macro, __VA_ARGS__, )
-#define MACRO_MAP_21(macro, a, ...) macro(a) MACRO_MAP_20(macro, __VA_ARGS__, )
-#define MACRO_MAP_22(macro, a, ...) macro(a) MACRO_MAP_21(macro, __VA_ARGS__, )
-#define MACRO_MAP_23(macro, a, ...) macro(a) MACRO_MAP_22(macro, __VA_ARGS__, )
-#define MACRO_MAP_24(macro, a, ...) macro(a) MACRO_MAP_23(macro, __VA_ARGS__, )
-#define MACRO_MAP_25(macro, a, ...) macro(a) MACRO_MAP_24(macro, __VA_ARGS__, )
-#define MACRO_MAP_26(macro, a, ...) macro(a) MACRO_MAP_25(macro, __VA_ARGS__, )
-#define MACRO_MAP_27(macro, a, ...) macro(a) MACRO_MAP_26(macro, __VA_ARGS__, )
-#define MACRO_MAP_28(macro, a, ...) macro(a) MACRO_MAP_27(macro, __VA_ARGS__, )
-#define MACRO_MAP_29(macro, a, ...) macro(a) MACRO_MAP_28(macro, __VA_ARGS__, )
-#define MACRO_MAP_30(macro, a, ...) macro(a) MACRO_MAP_29(macro, __VA_ARGS__, )
-#define MACRO_MAP_31(macro, a, ...) macro(a) MACRO_MAP_30(macro, __VA_ARGS__, )
-#define MACRO_MAP_32(macro, a, ...) macro(a) MACRO_MAP_31(macro, __VA_ARGS__, )
-
-
-#define MACRO_MAP_REC_0( ...)
-#define MACRO_MAP_REC_1( macro, a, ...) macro(a)
-#define MACRO_MAP_REC_2( macro, a, ...) macro(a) MACRO_MAP_REC_1 (macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_3( macro, a, ...) macro(a) MACRO_MAP_REC_2 (macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_4( macro, a, ...) macro(a) MACRO_MAP_REC_3 (macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_5( macro, a, ...) macro(a) MACRO_MAP_REC_4 (macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_6( macro, a, ...) macro(a) MACRO_MAP_REC_5 (macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_7( macro, a, ...) macro(a) MACRO_MAP_REC_6 (macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_8( macro, a, ...) macro(a) MACRO_MAP_REC_7 (macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_9( macro, a, ...) macro(a) MACRO_MAP_REC_8 (macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_10(macro, a, ...) macro(a) MACRO_MAP_REC_9 (macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_11(macro, a, ...) macro(a) MACRO_MAP_REC_10(macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_12(macro, a, ...) macro(a) MACRO_MAP_REC_11(macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_13(macro, a, ...) macro(a) MACRO_MAP_REC_12(macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_14(macro, a, ...) macro(a) MACRO_MAP_REC_13(macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_15(macro, a, ...) macro(a) MACRO_MAP_REC_14(macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_16(macro, a, ...) macro(a) MACRO_MAP_REC_15(macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_17(macro, a, ...) macro(a) MACRO_MAP_REC_16(macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_18(macro, a, ...) macro(a) MACRO_MAP_REC_17(macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_19(macro, a, ...) macro(a) MACRO_MAP_REC_18(macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_20(macro, a, ...) macro(a) MACRO_MAP_REC_19(macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_21(macro, a, ...) macro(a) MACRO_MAP_REC_20(macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_22(macro, a, ...) macro(a) MACRO_MAP_REC_21(macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_23(macro, a, ...) macro(a) MACRO_MAP_REC_22(macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_24(macro, a, ...) macro(a) MACRO_MAP_REC_23(macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_25(macro, a, ...) macro(a) MACRO_MAP_REC_24(macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_26(macro, a, ...) macro(a) MACRO_MAP_REC_25(macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_27(macro, a, ...) macro(a) MACRO_MAP_REC_26(macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_28(macro, a, ...) macro(a) MACRO_MAP_REC_27(macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_29(macro, a, ...) macro(a) MACRO_MAP_REC_28(macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_30(macro, a, ...) macro(a) MACRO_MAP_REC_29(macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_31(macro, a, ...) macro(a) MACRO_MAP_REC_30(macro, __VA_ARGS__, )
-#define MACRO_MAP_REC_32(macro, a, ...) macro(a) MACRO_MAP_REC_31(macro, __VA_ARGS__, )
-
-
-/**
- * @brief Mapping macro with current index
- *
- * Basically macro similar to @ref MACRO_MAP, but the processing function would get an argument
- * and current argument index (beginning from 0).
- *
- * @param ... Macro name to be used for argument processing followed by arguments to process.
- * Macro should have following form: MACRO(argument, index)
- * @return All arguments processed by given macro
- */
-#define MACRO_MAP_FOR(...) MACRO_MAP_FOR_(__VA_ARGS__)
-#define MACRO_MAP_FOR_N_LIST 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
-#define MACRO_MAP_FOR_(...) MACRO_MAP_FOR_N(NUM_VA_ARGS_LESS_1(__VA_ARGS__), __VA_ARGS__)
-
-/**
- * @brief Mapping N arguments macro with current index
- *
- * Macro is similar to @ref MACRO_MAP_FOR but maps exact number of arguments.
- * If there is more arguments given, the rest would be ignored.
- *
- * @param N Number of arguments to map
- * @param ... Macro name to be used for argument processing followed by arguments to process.
- * Macro should have following form: MACRO(argument, index)
- *
- * @return Selected number of arguments processed by given macro
- */
-#define MACRO_MAP_FOR_N(N, ...) MACRO_MAP_FOR_N_(N, __VA_ARGS__)
-#define MACRO_MAP_FOR_N_(N, ...) CONCAT_2(MACRO_MAP_FOR_, N)((MACRO_MAP_FOR_N_LIST), __VA_ARGS__, )
-
-#define MACRO_MAP_FOR_0( n_list, ...)
-#define MACRO_MAP_FOR_1( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)))
-#define MACRO_MAP_FOR_2( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_1 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_3( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_2 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_4( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_3 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_5( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_4 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_6( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_5 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_7( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_6 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_8( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_7 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_9( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_8 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_10(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_9 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_11(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_10((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_12(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_11((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_13(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_12((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_14(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_13((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_15(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_14((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_16(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_15((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_17(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_16((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_18(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_17((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_19(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_18((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_20(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_19((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_21(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_20((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_22(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_21((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_23(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_22((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_24(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_23((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_25(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_24((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_26(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_25((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_27(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_26((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_28(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_27((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_29(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_28((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_30(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_29((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_31(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_30((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_32(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_31((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
-
-
-/**
- * @brief Mapping macro with current index and parameter
- *
- * Version of @ref MACRO_MAP_FOR that passes also the same parameter to all macros.
- *
- * @param param Parameter that would be passed to each macro call during mapping.
- * @param ... Macro name to be used for argument processing followed by arguments to process.
- * Macro should have following form: MACRO(argument, index, param)
- *
- * @return All arguments processed by given macro
- */
-#define MACRO_MAP_FOR_PARAM(param, ...) MACRO_MAP_FOR_PARAM_(param, __VA_ARGS__)
-#define MACRO_MAP_FOR_PARAM_(param, ...) MACRO_MAP_FOR_PARAM_N(NUM_VA_ARGS_LESS_1(__VA_ARGS__), param, __VA_ARGS__)
-
-/**
- * @brief Mapping N arguments macro with with current index and parameter
- *
- * @param N Number of arguments to map
- * @param param Parameter that would be passed to each macro call during mapping.
- * @param ... Macro name to be used for argument processing followed by arguments to process.
- * Macro should have following form: MACRO(argument, index, param)
- *
- * @return All arguments processed by given macro
- */
-#define MACRO_MAP_FOR_PARAM_N(N, param, ...) MACRO_MAP_FOR_PARAM_N_(N, param, __VA_ARGS__)
-#define MACRO_MAP_FOR_PARAM_N_(N, param, ...) CONCAT_2(MACRO_MAP_FOR_PARAM_, N)((MACRO_MAP_FOR_N_LIST), param, __VA_ARGS__, )
-
-
-#define MACRO_MAP_FOR_PARAM_0( n_list, param, ...)
-#define MACRO_MAP_FOR_PARAM_1( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param)
-#define MACRO_MAP_FOR_PARAM_2( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_1 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_3( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_2 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_4( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_3 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_5( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_4 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_6( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_5 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_7( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_6 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_8( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_7 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_9( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_8 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_10(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_9 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_11(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_10((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_12(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_11((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_13(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_12((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_14(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_13((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_15(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_14((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_16(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_15((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_17(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_16((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_18(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_17((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_19(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_18((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_20(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_19((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_21(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_20((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_22(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_21((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_23(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_22((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_24(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_23((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_25(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_24((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_26(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_25((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_27(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_26((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_28(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_27((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_29(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_28((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_30(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_29((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_31(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_30((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-#define MACRO_MAP_FOR_PARAM_32(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_31((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
-
-
-
-/**
- * @brief Repeating macro.
- *
- * @param count Count of repeats.
- * @param macro Macro must have the following form: MACRO(arguments).
- * @param ... Arguments passed to the macro.
- *
- * @return All arguments processed by the given macro.
- */
-#define MACRO_REPEAT(count, macro, ...) MACRO_REPEAT_(count, macro, __VA_ARGS__)
-#define MACRO_REPEAT_(count, macro, ...) CONCAT_2(MACRO_REPEAT_, count)(macro, __VA_ARGS__)
-
-#define MACRO_REPEAT_0(macro, ...)
-#define MACRO_REPEAT_1(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_0(macro, __VA_ARGS__)
-#define MACRO_REPEAT_2(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_1(macro, __VA_ARGS__)
-#define MACRO_REPEAT_3(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_2(macro, __VA_ARGS__)
-#define MACRO_REPEAT_4(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_3(macro, __VA_ARGS__)
-#define MACRO_REPEAT_5(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_4(macro, __VA_ARGS__)
-#define MACRO_REPEAT_6(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_5(macro, __VA_ARGS__)
-#define MACRO_REPEAT_7(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_6(macro, __VA_ARGS__)
-#define MACRO_REPEAT_8(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_7(macro, __VA_ARGS__)
-#define MACRO_REPEAT_9(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_8(macro, __VA_ARGS__)
-#define MACRO_REPEAT_10(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_9(macro, __VA_ARGS__)
-#define MACRO_REPEAT_11(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_10(macro, __VA_ARGS__)
-#define MACRO_REPEAT_12(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_11(macro, __VA_ARGS__)
-#define MACRO_REPEAT_13(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_12(macro, __VA_ARGS__)
-#define MACRO_REPEAT_14(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_13(macro, __VA_ARGS__)
-#define MACRO_REPEAT_15(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_14(macro, __VA_ARGS__)
-#define MACRO_REPEAT_16(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_15(macro, __VA_ARGS__)
-#define MACRO_REPEAT_17(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_16(macro, __VA_ARGS__)
-#define MACRO_REPEAT_18(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_17(macro, __VA_ARGS__)
-#define MACRO_REPEAT_19(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_18(macro, __VA_ARGS__)
-#define MACRO_REPEAT_20(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_19(macro, __VA_ARGS__)
-#define MACRO_REPEAT_21(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_20(macro, __VA_ARGS__)
-#define MACRO_REPEAT_22(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_21(macro, __VA_ARGS__)
-#define MACRO_REPEAT_23(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_22(macro, __VA_ARGS__)
-#define MACRO_REPEAT_24(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_23(macro, __VA_ARGS__)
-#define MACRO_REPEAT_25(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_24(macro, __VA_ARGS__)
-#define MACRO_REPEAT_26(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_25(macro, __VA_ARGS__)
-#define MACRO_REPEAT_27(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_26(macro, __VA_ARGS__)
-#define MACRO_REPEAT_28(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_27(macro, __VA_ARGS__)
-#define MACRO_REPEAT_29(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_28(macro, __VA_ARGS__)
-#define MACRO_REPEAT_30(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_29(macro, __VA_ARGS__)
-#define MACRO_REPEAT_31(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_30(macro, __VA_ARGS__)
-#define MACRO_REPEAT_32(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_31(macro, __VA_ARGS__)
-
-
-/**
- * @brief Repeating macro with current index.
- *
- * Macro similar to @ref MACRO_REPEAT but the processing function gets the arguments
- * and the current argument index (beginning from 0).
-
- * @param count Count of repeats.
- * @param macro Macro must have the following form: MACRO(index, arguments).
- * @param ... Arguments passed to the macro.
- *
- * @return All arguments processed by the given macro.
- */
-#define MACRO_REPEAT_FOR(count, macro, ...) MACRO_REPEAT_FOR_(count, macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_(count, macro, ...) CONCAT_2(MACRO_REPEAT_FOR_, count)((MACRO_MAP_FOR_N_LIST), macro, __VA_ARGS__)
-
-#define MACRO_REPEAT_FOR_0(n_list, macro, ...)
-#define MACRO_REPEAT_FOR_1(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_0((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_2(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_1((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_3(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_2((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_4(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_3((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_5(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_4((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_6(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_5((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_7(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_6((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_8(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_7((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_9(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_8((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_10(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_9((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_11(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_10((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_12(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_11((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_13(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_12((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_14(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_13((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_15(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_14((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_16(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_15((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_17(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_16((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_18(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_17((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_19(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_18((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_20(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_19((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_21(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_20((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_22(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_21((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_23(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_22((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_24(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_23((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_25(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_24((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_26(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_25((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_27(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_26((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_28(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_27((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_29(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_28((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_30(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_29((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_31(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_30((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-#define MACRO_REPEAT_FOR_32(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_31((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
-
-
-/**@brief Adding curly brace to the macro parameter.
- *
- * Useful in array of structures initialization.
- *
- * @param p Parameter to put into the curly brace. */
-#define PARAM_CBRACE(p) { p },
-
-
-/**@brief Function for changing the value unit.
- *
- * @param[in] value Value to be rescaled.
- * @param[in] old_unit_reversal Reversal of the incoming unit.
- * @param[in] new_unit_reversal Reversal of the desired unit.
- *
- * @return Number of bytes written.
- */
-static __INLINE uint64_t value_rescale(uint32_t value, uint32_t old_unit_reversal, uint16_t new_unit_reversal)
-{
- return (uint64_t)ROUNDED_DIV((uint64_t)value * new_unit_reversal, old_unit_reversal);
-}
-
-/**@brief Function for encoding a uint16 value.
- *
- * @param[in] value Value to be encoded.
- * @param[out] p_encoded_data Buffer where the encoded data is to be written.
- *
- * @return Number of bytes written.
- */
-static __INLINE uint8_t uint16_encode(uint16_t value, uint8_t * p_encoded_data)
-{
- p_encoded_data[0] = (uint8_t) ((value & 0x00FF) >> 0);
- p_encoded_data[1] = (uint8_t) ((value & 0xFF00) >> 8);
- return sizeof(uint16_t);
-}
-
-/**@brief Function for encoding a three-byte value.
- *
- * @param[in] value Value to be encoded.
- * @param[out] p_encoded_data Buffer where the encoded data is to be written.
- *
- * @return Number of bytes written.
- */
-static __INLINE uint8_t uint24_encode(uint32_t value, uint8_t * p_encoded_data)
-{
- p_encoded_data[0] = (uint8_t) ((value & 0x000000FF) >> 0);
- p_encoded_data[1] = (uint8_t) ((value & 0x0000FF00) >> 8);
- p_encoded_data[2] = (uint8_t) ((value & 0x00FF0000) >> 16);
- return 3;
-}
-
-/**@brief Function for encoding a uint32 value.
- *
- * @param[in] value Value to be encoded.
- * @param[out] p_encoded_data Buffer where the encoded data is to be written.
- *
- * @return Number of bytes written.
- */
-static __INLINE uint8_t uint32_encode(uint32_t value, uint8_t * p_encoded_data)
-{
- p_encoded_data[0] = (uint8_t) ((value & 0x000000FF) >> 0);
- p_encoded_data[1] = (uint8_t) ((value & 0x0000FF00) >> 8);
- p_encoded_data[2] = (uint8_t) ((value & 0x00FF0000) >> 16);
- p_encoded_data[3] = (uint8_t) ((value & 0xFF000000) >> 24);
- return sizeof(uint32_t);
-}
-
-/**@brief Function for encoding a uint40 value.
- *
- * @param[in] value Value to be encoded.
- * @param[out] p_encoded_data Buffer where the encoded data is to be written.
- *
- * @return Number of bytes written.
- */
-static __INLINE uint8_t uint40_encode(uint64_t value, uint8_t * p_encoded_data)
-{
- p_encoded_data[0] = (uint8_t) ((value & 0x00000000FF) >> 0);
- p_encoded_data[1] = (uint8_t) ((value & 0x000000FF00) >> 8);
- p_encoded_data[2] = (uint8_t) ((value & 0x0000FF0000) >> 16);
- p_encoded_data[3] = (uint8_t) ((value & 0x00FF000000) >> 24);
- p_encoded_data[4] = (uint8_t) ((value & 0xFF00000000) >> 32);
- return 5;
-}
-
-/**@brief Function for encoding a uint48 value.
- *
- * @param[in] value Value to be encoded.
- * @param[out] p_encoded_data Buffer where the encoded data is to be written.
- *
- * @return Number of bytes written.
- */
-static __INLINE uint8_t uint48_encode(uint64_t value, uint8_t * p_encoded_data)
-{
- p_encoded_data[0] = (uint8_t) ((value & 0x0000000000FF) >> 0);
- p_encoded_data[1] = (uint8_t) ((value & 0x00000000FF00) >> 8);
- p_encoded_data[2] = (uint8_t) ((value & 0x000000FF0000) >> 16);
- p_encoded_data[3] = (uint8_t) ((value & 0x0000FF000000) >> 24);
- p_encoded_data[4] = (uint8_t) ((value & 0x00FF00000000) >> 32);
- p_encoded_data[5] = (uint8_t) ((value & 0xFF0000000000) >> 40);
- return 6;
-}
-
-/**@brief Function for decoding a uint16 value.
- *
- * @param[in] p_encoded_data Buffer where the encoded data is stored.
- *
- * @return Decoded value.
- */
-static __INLINE uint16_t uint16_decode(const uint8_t * p_encoded_data)
-{
- return ( (((uint16_t)((uint8_t *)p_encoded_data)[0])) |
- (((uint16_t)((uint8_t *)p_encoded_data)[1]) << 8 ));
-}
-
-/**@brief Function for decoding a uint16 value in big-endian format.
- *
- * @param[in] p_encoded_data Buffer where the encoded data is stored.
- *
- * @return Decoded value.
- */
-static __INLINE uint16_t uint16_big_decode(const uint8_t * p_encoded_data)
-{
- return ( (((uint16_t)((uint8_t *)p_encoded_data)[0]) << 8 ) |
- (((uint16_t)((uint8_t *)p_encoded_data)[1])) );
-}
-
-/**@brief Function for decoding a three-byte value.
- *
- * @param[in] p_encoded_data Buffer where the encoded data is stored.
- *
- * @return Decoded value (uint32_t).
- */
-static __INLINE uint32_t uint24_decode(const uint8_t * p_encoded_data)
-{
- return ( (((uint32_t)((uint8_t *)p_encoded_data)[0]) << 0) |
- (((uint32_t)((uint8_t *)p_encoded_data)[1]) << 8) |
- (((uint32_t)((uint8_t *)p_encoded_data)[2]) << 16));
-}
-
-/**@brief Function for decoding a uint32 value.
- *
- * @param[in] p_encoded_data Buffer where the encoded data is stored.
- *
- * @return Decoded value.
- */
-static __INLINE uint32_t uint32_decode(const uint8_t * p_encoded_data)
-{
- return ( (((uint32_t)((uint8_t *)p_encoded_data)[0]) << 0) |
- (((uint32_t)((uint8_t *)p_encoded_data)[1]) << 8) |
- (((uint32_t)((uint8_t *)p_encoded_data)[2]) << 16) |
- (((uint32_t)((uint8_t *)p_encoded_data)[3]) << 24 ));
-}
-
-/**@brief Function for decoding a uint32 value in big-endian format.
- *
- * @param[in] p_encoded_data Buffer where the encoded data is stored.
- *
- * @return Decoded value.
- */
-static __INLINE uint32_t uint32_big_decode(const uint8_t * p_encoded_data)
-{
- return ( (((uint32_t)((uint8_t *)p_encoded_data)[0]) << 24) |
- (((uint32_t)((uint8_t *)p_encoded_data)[1]) << 16) |
- (((uint32_t)((uint8_t *)p_encoded_data)[2]) << 8) |
- (((uint32_t)((uint8_t *)p_encoded_data)[3]) << 0) );
-}
-
-/**
- * @brief Function for encoding an uint16 value in big-endian format.
- *
- * @param[in] value Value to be encoded.
- * @param[out] p_encoded_data Buffer where the encoded data will be written.
- *
- * @return Number of bytes written.
- */
-static __INLINE uint8_t uint16_big_encode(uint16_t value, uint8_t * p_encoded_data)
-{
- p_encoded_data[0] = (uint8_t) (value >> 8);
- p_encoded_data[1] = (uint8_t) (value & 0xFF);
-
- return sizeof(uint16_t);
-}
-
-/*lint -esym(526, __rev) */
-/*lint -esym(628, __rev) */
-/**@brief Function for encoding a uint32 value in big-endian format.
- *
- * @param[in] value Value to be encoded.
- * @param[out] p_encoded_data Buffer where the encoded data will be written.
- *
- * @return Number of bytes written.
- */
-static __INLINE uint8_t uint32_big_encode(uint32_t value, uint8_t * p_encoded_data)
-{
- *(uint32_t *)p_encoded_data = __REV(value);
- return sizeof(uint32_t);
-}
-
-/**@brief Function for decoding a uint40 value.
- *
- * @param[in] p_encoded_data Buffer where the encoded data is stored.
- *
- * @return Decoded value. (uint64_t)
- */
-static __INLINE uint64_t uint40_decode(const uint8_t * p_encoded_data)
-{
- return ( (((uint64_t)((uint8_t *)p_encoded_data)[0]) << 0) |
- (((uint64_t)((uint8_t *)p_encoded_data)[1]) << 8) |
- (((uint64_t)((uint8_t *)p_encoded_data)[2]) << 16) |
- (((uint64_t)((uint8_t *)p_encoded_data)[3]) << 24) |
- (((uint64_t)((uint8_t *)p_encoded_data)[4]) << 32 ));
-}
-
-/**@brief Function for decoding a uint48 value.
- *
- * @param[in] p_encoded_data Buffer where the encoded data is stored.
- *
- * @return Decoded value. (uint64_t)
- */
-static __INLINE uint64_t uint48_decode(const uint8_t * p_encoded_data)
-{
- return ( (((uint64_t)((uint8_t *)p_encoded_data)[0]) << 0) |
- (((uint64_t)((uint8_t *)p_encoded_data)[1]) << 8) |
- (((uint64_t)((uint8_t *)p_encoded_data)[2]) << 16) |
- (((uint64_t)((uint8_t *)p_encoded_data)[3]) << 24) |
- (((uint64_t)((uint8_t *)p_encoded_data)[4]) << 32) |
- (((uint64_t)((uint8_t *)p_encoded_data)[5]) << 40 ));
-}
-
-/** @brief Function for converting the input voltage (in milli volts) into percentage of 3.0 Volts.
- *
- * @details The calculation is based on a linearized version of the battery's discharge
- * curve. 3.0V returns 100% battery level. The limit for power failure is 2.1V and
- * is considered to be the lower boundary.
- *
- * The discharge curve for CR2032 is non-linear. In this model it is split into
- * 4 linear sections:
- * - Section 1: 3.0V - 2.9V = 100% - 42% (58% drop on 100 mV)
- * - Section 2: 2.9V - 2.74V = 42% - 18% (24% drop on 160 mV)
- * - Section 3: 2.74V - 2.44V = 18% - 6% (12% drop on 300 mV)
- * - Section 4: 2.44V - 2.1V = 6% - 0% (6% drop on 340 mV)
- *
- * These numbers are by no means accurate. Temperature and
- * load in the actual application is not accounted for!
- *
- * @param[in] mvolts The voltage in mV
- *
- * @return Battery level in percent.
-*/
-static __INLINE uint8_t battery_level_in_percent(const uint16_t mvolts)
-{
- uint8_t battery_level;
-
- if (mvolts >= 3000)
- {
- battery_level = 100;
- }
- else if (mvolts > 2900)
- {
- battery_level = 100 - ((3000 - mvolts) * 58) / 100;
- }
- else if (mvolts > 2740)
- {
- battery_level = 42 - ((2900 - mvolts) * 24) / 160;
- }
- else if (mvolts > 2440)
- {
- battery_level = 18 - ((2740 - mvolts) * 12) / 300;
- }
- else if (mvolts > 2100)
- {
- battery_level = 6 - ((2440 - mvolts) * 6) / 340;
- }
- else
- {
- battery_level = 0;
- }
-
- return battery_level;
-}
-
-/**@brief Function for checking if a pointer value is aligned to a 4 byte boundary.
- *
- * @param[in] p Pointer value to be checked.
- *
- * @return TRUE if pointer is aligned to a 4 byte boundary, FALSE otherwise.
- */
-static __INLINE bool is_word_aligned(void const* p)
-{
- return (((uintptr_t)p & 0x03) == 0);
-}
-
-/*lint -e{568, 685} */
-/**
- * @brief Function for checking if provided address is located in stack space.
- *
- * @param[in] ptr Pointer to be checked.
- *
- * @return true if address is in stack space, false otherwise.
- */
-static __INLINE bool is_address_from_stack(void * ptr)
-{
- if (((uint32_t)ptr >= (uint32_t)STACK_BASE) &&
- ((uint32_t)ptr < (uint32_t)STACK_TOP) )
- {
- return true;
- }
- else
- {
- return false;
- }
-}
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // APP_UTIL_H__
-
-/** @} */
+/**
+ * Copyright (c) 2012 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/** @file
+ *
+ * @defgroup app_util Utility Functions and Definitions
+ * @{
+ * @ingroup app_common
+ *
+ * @brief Various types and definitions available to all applications.
+ */
+
+#ifndef APP_UTIL_H__
+#define APP_UTIL_H__
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stddef.h>
+#include "compiler_abstraction.h"
+#include "nordic_common.h"
+#include "nrf.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/**
+ * @cond (NODOX)
+ */
+/*lint -save -e27 -e10 -e19 */
+#if defined (__LINT__)
+#define STACK_BASE 0x1F000 // Arbitrary value.
+#define STACK_TOP 0x20000 // Arbitrary value.
+
+#elif defined ( __CC_ARM )
+extern char STACK$$Base;
+extern char STACK$$Length;
+#define STACK_BASE &STACK$$Base
+#define STACK_TOP ((void*)((uint32_t)STACK_BASE + (uint32_t)&STACK$$Length))
+
+#elif defined ( __ICCARM__ )
+extern char CSTACK$$Base;
+extern char CSTACK$$Length;
+#define STACK_BASE &CSTACK$$Base
+#define STACK_TOP ((void*)((uint32_t)STACK_BASE + (uint32_t)&CSTACK$$Length))
+
+#elif defined ( __GNUC__ )
+extern uint32_t __StackTop;
+extern uint32_t __StackLimit;
+#define STACK_BASE &__StackLimit
+#define STACK_TOP &__StackTop
+#endif
+
+/* These macros are valid only when absolute placement is used for the application
+ * image. The macros are not compile time symbols. They cannot be used as a
+ * constant expression, for example, inside a static assert or linker script
+ * at-placement. */
+#if defined (__LINT__)
+#define CODE_START (0) // Arbitrary value.
+#define CODE_END (0x1000) // Arbitrary value.
+#define CODE_SIZE (0x1000) // Arbitrary value.
+
+#elif defined ( __CC_ARM )
+extern char Load$$LR$$LR_IROM1$$Base;
+extern char Load$$LR$$LR_IROM1$$Length;
+extern char Load$$LR$$LR_IROM1$$Limit;
+#define CODE_START ((uint32_t)&Load$$LR$$LR_IROM1$$Base)
+#define CODE_END ((uint32_t)&Load$$LR$$LR_IROM1$$Limit)
+#define CODE_SIZE ((uint32_t)&Load$$LR$$LR_IROM1$$Length)
+
+#elif defined ( __ICCARM__ )
+extern void * __vector_table;
+extern char RO_END$$Base;
+#define CODE_START ((uint32_t)&__vector_table)
+#define CODE_END ((uint32_t)&RO_END$$Base)
+#define CODE_SIZE (CODE_END - CODE_START)
+
+#elif defined(__SES_ARM)
+extern uint32_t * _vectors;
+extern uint32_t __FLASH_segment_used_end__;
+#define CODE_START ((uint32_t)&_vectors)
+#define CODE_END ((uint32_t)&__FLASH_segment_used_end__)
+#define CODE_SIZE (CODE_END - CODE_START)
+
+#elif defined ( __GNUC__ )
+extern uint32_t __isr_vector;
+extern uint32_t __etext;
+#define CODE_START ((uint32_t)&__isr_vector)
+#define CODE_END ((uint32_t)&__etext)
+#define CODE_SIZE (CODE_END - CODE_START)
+#endif
+/** @}
+ * @endcond
+ */
+/* lint -restore */
+
+#if defined(MBR_PRESENT) || defined(SOFTDEVICE_PRESENT)
+#include "nrf_mbr.h"
+#define BOOTLOADER_ADDRESS ((*(uint32_t *)MBR_BOOTLOADER_ADDR) == 0xFFFFFFFF ? *MBR_UICR_BOOTLOADER_ADDR : *(uint32_t *)MBR_BOOTLOADER_ADDR) /**< The currently configured start address of the bootloader. If 0xFFFFFFFF, no bootloader start address is configured. */
+#define MBR_PARAMS_PAGE_ADDRESS ((*(uint32_t *)MBR_PARAM_PAGE_ADDR) == 0xFFFFFFFF ? *MBR_UICR_PARAM_PAGE_ADDR : *(uint32_t *)MBR_PARAM_PAGE_ADDR) /**< The currently configured address of the MBR params page. If 0xFFFFFFFF, no MBR params page address is configured. */
+#else
+#define BOOTLOADER_ADDRESS (NRF_UICR->NRFFW[0]) /**< Check UICR, just in case. */
+#define MBR_PARAMS_PAGE_ADDRESS (NRF_UICR->NRFFW[1]) /**< Check UICR, just in case. */
+#endif
+
+enum
+{
+ UNIT_0_625_MS = 625, /**< Number of microseconds in 0.625 milliseconds. */
+ UNIT_1_25_MS = 1250, /**< Number of microseconds in 1.25 milliseconds. */
+ UNIT_10_MS = 10000 /**< Number of microseconds in 10 milliseconds. */
+};
+
+/**
+ * @brief Counts number of bits required for the given value
+ *
+ * The macro technically searches for the highest bit set.
+ * For value 0 it returns 0.
+ *
+ * @param val Value to be processed
+ *
+ * @return Number of bits required for the given value
+ */
+//lint -emacro(572,VBITS)
+#define VBITS(val) VBITS_32(val)
+
+/**
+ * @def VBITS_1
+ * @brief Internal macro used by @ref VBITS */
+/**
+ * @def VBITS_2
+ * @brief Internal macro used by @ref VBITS */
+/**
+ * @def VBITS_4
+ * @brief Internal macro used by @ref VBITS */
+/**
+ * @def VBITS_8
+ * @brief Internal macro used by @ref VBITS */
+/**
+ * @def VBITS_16
+ * @brief Internal macro used by @ref VBITS */
+/**
+ * @def VBITS_32
+ * @brief Internal macro used by @ref VBITS */
+#define VBITS_1( v) ((((v) & (0x0001U << 0)) != 0) ? 1U : 0U)
+#define VBITS_2( v) ((((v) & (0x0001U << 1)) != 0) ? VBITS_1 ((v) >> 1) + 1 : VBITS_1 (v))
+#define VBITS_4( v) ((((v) & (0x0003U << 2)) != 0) ? VBITS_2 ((v) >> 2) + 2 : VBITS_2 (v))
+#define VBITS_8( v) ((((v) & (0x000fU << 4)) != 0) ? VBITS_4 ((v) >> 4) + 4 : VBITS_4 (v))
+#define VBITS_16(v) ((((v) & (0x00ffU << 8)) != 0) ? VBITS_8 ((v) >> 8) + 8 : VBITS_8 (v))
+#define VBITS_32(v) ((((v) & (0xffffU << 16)) != 0) ? VBITS_16((v) >> 16) + 16 : VBITS_16(v))
+
+
+/*Segger embedded studio originally has offsetof macro which cannot be used in macros (like STATIC_ASSERT).
+ This redefinition is to allow using that. */
+#if defined(__SES_ARM) && defined(__GNUC__)
+#undef offsetof
+#define offsetof(TYPE, MEMBER) __builtin_offsetof (TYPE, MEMBER)
+#endif
+
+/**@brief Implementation specific macro for delayed macro expansion used in string concatenation
+*
+* @param[in] lhs Left hand side in concatenation
+* @param[in] rhs Right hand side in concatenation
+*/
+#define STRING_CONCATENATE_IMPL(lhs, rhs) lhs ## rhs
+
+
+/**@brief Macro used to concatenate string using delayed macro expansion
+*
+* @note This macro will delay concatenation until the expressions have been resolved
+*
+* @param[in] lhs Left hand side in concatenation
+* @param[in] rhs Right hand side in concatenation
+*/
+#define STRING_CONCATENATE(lhs, rhs) STRING_CONCATENATE_IMPL(lhs, rhs)
+
+
+#ifndef __LINT__
+
+#ifdef __GNUC__
+#ifdef __cplusplus
+#define STATIC_ASSERT_SIMPLE(EXPR) extern char (*_do_assert(void)) [sizeof(char[1 - 2*!(EXPR)])]
+#define STATIC_ASSERT_MSG(EXPR, MSG) extern char (*_do_assert(void)) [sizeof(char[1 - 2*!(EXPR)])]
+#else
+#define STATIC_ASSERT_SIMPLE(EXPR) _Static_assert(EXPR, "unspecified message")
+#define STATIC_ASSERT_MSG(EXPR, MSG) _Static_assert(EXPR, MSG)
+#endif
+#endif
+
+#ifdef __CC_ARM
+#define STATIC_ASSERT_SIMPLE(EXPR) extern char (*_do_assert(void)) [sizeof(char[1 - 2*!(EXPR)])]
+#define STATIC_ASSERT_MSG(EXPR, MSG) extern char (*_do_assert(void)) [sizeof(char[1 - 2*!(EXPR)])]
+#endif
+
+#ifdef __ICCARM__
+#define STATIC_ASSERT_SIMPLE(EXPR) static_assert(EXPR, "unspecified message")
+#define STATIC_ASSERT_MSG(EXPR, MSG) static_assert(EXPR, MSG)
+#endif
+
+#else // __LINT__
+
+#define STATIC_ASSERT_SIMPLE(EXPR) extern char (*_ignore(void))
+#define STATIC_ASSERT_MSG(EXPR, MSG) extern char (*_ignore(void))
+
+#endif
+
+
+#define _SELECT_ASSERT_FUNC(x, EXPR, MSG, ASSERT_MACRO, ...) ASSERT_MACRO
+
+/**
+ * @brief Static (i.e. compile time) assert macro.
+ *
+ * @note The output of STATIC_ASSERT can be different across compilers.
+ *
+ * Usage:
+ * STATIC_ASSERT(expression);
+ * STATIC_ASSERT(expression, message);
+ *
+ * @hideinitializer
+ */
+//lint -save -esym(???, STATIC_ASSERT)
+#define STATIC_ASSERT(...) \
+ _SELECT_ASSERT_FUNC(x, ##__VA_ARGS__, \
+ STATIC_ASSERT_MSG(__VA_ARGS__), \
+ STATIC_ASSERT_SIMPLE(__VA_ARGS__))
+//lint -restore
+
+
+/**@brief Implementation details for NUM_VAR_ARGS */
+#define NUM_VA_ARGS_IMPL( \
+ _0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, \
+ _11, _12, _13, _14, _15, _16, _17, _18, _19, _20, \
+ _21, _22, _23, _24, _25, _26, _27, _28, _29, _30, \
+ _31, _32, _33, _34, _35, _36, _37, _38, _39, _40, \
+ _41, _42, _43, _44, _45, _46, _47, _48, _49, _50, \
+ _51, _52, _53, _54, _55, _56, _57, _58, _59, _60, \
+ _61, _62, N, ...) N
+
+
+/**@brief Macro to get the number of arguments in a call variadic macro call
+ *
+ * param[in] ... List of arguments
+ *
+ * @retval Number of variadic arguments in the argument list
+ */
+#define NUM_VA_ARGS(...) NUM_VA_ARGS_IMPL(__VA_ARGS__, 63, 62, 61, \
+ 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \
+ 50, 49, 48, 47, 46, 45, 44, 43, 42, 41, \
+ 40, 39, 38, 37, 36, 35, 34, 33, 32, 31, \
+ 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, \
+ 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, \
+ 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
+
+/**@brief Implementation details for NUM_VAR_ARGS */
+#define NUM_VA_ARGS_LESS_1_IMPL( \
+ _ignored, \
+ _0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, \
+ _11, _12, _13, _14, _15, _16, _17, _18, _19, _20, \
+ _21, _22, _23, _24, _25, _26, _27, _28, _29, _30, \
+ _31, _32, _33, _34, _35, _36, _37, _38, _39, _40, \
+ _41, _42, _43, _44, _45, _46, _47, _48, _49, _50, \
+ _51, _52, _53, _54, _55, _56, _57, _58, _59, _60, \
+ _61, _62, N, ...) N
+
+/**@brief Macro to get the number of arguments in a call variadic macro call.
+ * First argument is not counted.
+ *
+ * param[in] ... List of arguments
+ *
+ * @retval Number of variadic arguments in the argument list
+ */
+#define NUM_VA_ARGS_LESS_1(...) NUM_VA_ARGS_LESS_1_IMPL(__VA_ARGS__, 63, 62, 61, \
+ 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \
+ 50, 49, 48, 47, 46, 45, 44, 43, 42, 41, \
+ 40, 39, 38, 37, 36, 35, 34, 33, 32, 31, \
+ 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, \
+ 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, \
+ 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, ~)
+
+
+/**@brief type for holding an encoded (i.e. little endian) 16 bit unsigned integer. */
+typedef uint8_t uint16_le_t[2];
+
+/**@brief Type for holding an encoded (i.e. little endian) 32 bit unsigned integer. */
+typedef uint8_t uint32_le_t[4];
+
+/**@brief Byte array type. */
+typedef struct
+{
+ uint16_t size; /**< Number of array entries. */
+ uint8_t * p_data; /**< Pointer to array entries. */
+} uint8_array_t;
+
+
+/**@brief Macro for performing rounded integer division (as opposed to truncating the result).
+ *
+ * @param[in] A Numerator.
+ * @param[in] B Denominator.
+ *
+ * @return Rounded (integer) result of dividing A by B.
+ */
+#define ROUNDED_DIV(A, B) (((A) + ((B) / 2)) / (B))
+
+
+/**@brief Macro for checking if an integer is a power of two.
+ *
+ * @param[in] A Number to be tested.
+ *
+ * @return true if value is power of two.
+ * @return false if value not power of two.
+ */
+#define IS_POWER_OF_TWO(A) ( ((A) != 0) && ((((A) - 1) & (A)) == 0) )
+
+
+/**@brief Macro for converting milliseconds to ticks.
+ *
+ * @param[in] TIME Number of milliseconds to convert.
+ * @param[in] RESOLUTION Unit to be converted to in [us/ticks].
+ */
+#define MSEC_TO_UNITS(TIME, RESOLUTION) (((TIME) * 1000) / (RESOLUTION))
+
+
+/**@brief Macro for performing integer division, making sure the result is rounded up.
+ *
+ * @details One typical use for this is to compute the number of objects with size B is needed to
+ * hold A number of bytes.
+ *
+ * @param[in] A Numerator.
+ * @param[in] B Denominator.
+ *
+ * @return Integer result of dividing A by B, rounded up.
+ */
+#define CEIL_DIV(A, B) \
+ (((A) + (B) - 1) / (B))
+
+
+/**@brief Macro for creating a buffer aligned to 4 bytes.
+ *
+ * @param[in] NAME Name of the buffor.
+ * @param[in] MIN_SIZE Size of this buffor (it will be rounded up to multiples of 4 bytes).
+ */
+#define WORD_ALIGNED_MEM_BUFF(NAME, MIN_SIZE) static uint32_t NAME[CEIL_DIV(MIN_SIZE, sizeof(uint32_t))]
+
+
+/**@brief Macro for calculating the number of words that are needed to hold a number of bytes.
+ *
+ * @details Adds 3 and divides by 4.
+ *
+ * @param[in] n_bytes The number of bytes.
+ *
+ * @return The number of words that @p n_bytes take up (rounded up).
+ */
+#define BYTES_TO_WORDS(n_bytes) (((n_bytes) + 3) >> 2)
+
+
+/**@brief The number of bytes in a word.
+ */
+#define BYTES_PER_WORD (4)
+
+
+/**@brief Macro for increasing a number to the nearest (larger) multiple of another number.
+ *
+ * @param[in] alignment The number to align to.
+ * @param[in] number The number to align (increase).
+ *
+ * @return The aligned (increased) @p number.
+ */
+#define ALIGN_NUM(alignment, number) (((number) - 1) + (alignment) - (((number) - 1) % (alignment)))
+
+/**@brief Macro for getting first of 2 parameters.
+ *
+ * @param[in] a1 First parameter.
+ * @param[in] a2 Second parameter.
+ */
+#define GET_ARG_1(a1, a2) a1
+
+/**@brief Macro for getting second of 2 parameters.
+ *
+ * @param[in] a1 First parameter.
+ * @param[in] a2 Second parameter.
+ */
+#define GET_ARG_2(a1, a2) a2
+
+
+/**@brief Container of macro (borrowed from Linux kernel).
+ *
+ * This macro returns parent structure address basing on child member address.
+ *
+ * @param ptr Address of child type.
+ * @param type Type of parent structure.
+ * @param member Name of child field in parent structure.
+ *
+ * @return Parent structure address.
+ * */
+#define CONTAINER_OF(ptr, type, member) \
+ (type *)((char *)ptr - offsetof(type, member))
+
+
+/**
+ * @brief Define Bit-field mask
+ *
+ * Macro that defined the mask with selected number of bits set, starting from
+ * provided bit number.
+ *
+ * @param[in] bcnt Number of bits in the bit-field
+ * @param[in] boff Lowest bit number
+ */
+#define BF_MASK(bcnt, boff) ( ((1U << (bcnt)) - 1U) << (boff) )
+
+/**
+ * @brief Get bit-field
+ *
+ * Macro that extracts selected bit-field from provided value
+ *
+ * @param[in] val Value from which selected bit-field would be extracted
+ * @param[in] bcnt Number of bits in the bit-field
+ * @param[in] boff Lowest bit number
+ *
+ * @return Value of the selected bits
+ */
+#define BF_GET(val, bcnt, boff) ( ( (val) & BF_MASK((bcnt), (boff)) ) >> (boff) )
+
+/**
+ * @brief Create bit-field value
+ *
+ * Value is masked and shifted to match given bit-field
+ *
+ * @param[in] val Value to set on bit-field
+ * @param[in] bcnt Number of bits for bit-field
+ * @param[in] boff Offset of bit-field
+ *
+ * @return Value positioned of given bit-field.
+ */
+#define BF_VAL(val, bcnt, boff) ( (((uint32_t)(val)) << (boff)) & BF_MASK(bcnt, boff) )
+
+/**
+ * @name Configuration of complex bit-field
+ *
+ * @sa BF_CX
+ * @{
+ */
+/** @brief Position of bit count in complex bit-field value */
+#define BF_CX_BCNT_POS 0U
+/** @brief Mask of bit count in complex bit-field value */
+#define BF_CX_BCNT_MASK (0xffU << BF_CX_BCNT_POS)
+/** @brief Position of bit position in complex bit-field value */
+#define BF_CX_BOFF_POS 8U
+/** @brief Mask of bit position in complex bit-field value */
+#define BF_CX_BOFF_MASK (0xffU << BF_CX_BOFF_POS)
+/** @} */
+
+/**
+ * @brief Define complex bit-field
+ *
+ * Complex bit-field would contain its position and size in one number.
+ * @sa BF_CX_MASK
+ * @sa BF_CX_POS
+ * @sa BF_CX_GET
+ *
+ * @param[in] bcnt Number of bits in the bit-field
+ * @param[in] boff Lowest bit number
+ *
+ * @return The single number that describes the bit-field completely.
+ */
+#define BF_CX(bcnt, boff) ( ((((uint32_t)(bcnt)) << BF_CX_BCNT_POS) & BF_CX_BCNT_MASK) | ((((uint32_t)(boff)) << BF_CX_BOFF_POS) & BF_CX_BOFF_MASK) )
+
+/**
+ * @brief Get number of bits in bit-field
+ *
+ * @sa BF_CX
+ *
+ * @param bf_cx Complex bit-field
+ *
+ * @return Number of bits in given bit-field
+ */
+#define BF_CX_BCNT(bf_cx) ( ((bf_cx) & BF_CX_BCNT_MASK) >> BF_CX_BCNT_POS )
+
+/**
+ * @brief Get lowest bit number in the field
+ *
+ * @sa BF_CX
+ *
+ * @param[in] bf_cx Complex bit-field
+ *
+ * @return Lowest bit number in given bit-field
+ */
+#define BF_CX_BOFF(bf_cx) ( ((bf_cx) & BF_CX_BOFF_MASK) >> BF_CX_BOFF_POS )
+
+/**
+ * @brief Get bit mask of the selected field
+ *
+ * @sa BF_CX
+ *
+ * @param[in] bf_cx Complex bit-field
+ *
+ * @return Mask of given bit-field
+ */
+#define BF_CX_MASK(bf_cx) BF_MASK(BF_CX_BCNT(bf_cx), BF_CX_BOFF(bf_cx))
+
+/**
+ * @brief Get bit-field
+ *
+ * Macro that extracts selected bit-field from provided value.
+ * Bit-field is given as a complex value.
+ *
+ * @sa BF_CX
+ * @sa BF_GET
+ *
+ * @param[in] val Value from which selected bit-field would be extracted
+ * @param[in] bf_cx Complex bit-field
+ *
+ * @return Value of the selected bits.
+ */
+#define BF_CX_GET(val, bf_cx) BF_GET(val, BF_CX_BCNT(bf_cx), BF_CX_BOFF(bf_cx))
+
+/**
+ * @brief Create bit-field value
+ *
+ * Value is masked and shifted to match given bit-field.
+ *
+ * @param[in] val Value to set on bit-field
+ * @param[in] bf_cx Complex bit-field
+ *
+ * @return Value positioned of given bit-field.
+ */
+#define BF_CX_VAL(val, bf_cx) BF_VAL(val, BF_CX_BCNT(bf_cx), BF_CX_BOFF(bf_cx))
+
+/**
+ * @brief Extracting data from the brackets
+ *
+ * This macro get rid of brackets around the argument.
+ * It can be used to pass multiple arguments in logical one argument to a macro.
+ * Call it with arguments inside brackets:
+ * @code
+ * #define ARGUMENTS (a, b, c)
+ * BRACKET_EXTRACT(ARGUMENTS)
+ * @endcode
+ * It would produce:
+ * @code
+ * a, b, c
+ * @endcode
+ *
+ * @param a Argument with anything inside brackets
+ * @return Anything that appears inside the brackets of the argument
+ *
+ * @note
+ * The argument of the macro have to be inside brackets.
+ * In other case the compilation would fail.
+ */
+#define BRACKET_EXTRACT(a) BRACKET_EXTRACT_(a)
+#define BRACKET_EXTRACT_(a) BRACKET_EXTRACT__ a
+#define BRACKET_EXTRACT__(...) __VA_ARGS__
+
+
+/**
+ * @brief Check if number of parameters is more than 1
+ *
+ * @param ... Arguments to count
+ *
+ * @return 0 If argument count is <= 1
+ * @return 1 If argument count is > 1
+ *
+ * @sa NUM_VA_ARGS
+ * @sa NUM_IS_MORE_THAN_1
+ */
+#define NUM_VA_ARGS_IS_MORE_THAN_1(...) NUM_IS_MORE_THAN_1(NUM_VA_ARGS(__VA_ARGS__))
+
+/**
+ * @brief Check if given numeric value is bigger than 1
+ *
+ * This macro accepts numeric value, that may be the result of argument expansion.
+ * This numeric value is then converted to 0 if it is lover than 1 or to 1 if
+ * its value is higher than 1.
+ * The generated result can be used to glue it into other macro mnemonic name.
+ *
+ * @param N Numeric value to check
+ *
+ * @return 0 If argument is <= 1
+ * @return 1 If argument is > 1
+ *
+ * @note Any existing definition of a form NUM_IS_MORE_THAN_1_PROBE_[N] can
+ * broke the result of this macro
+ */
+#define NUM_IS_MORE_THAN_1(N) NUM_IS_MORE_THAN_1_(N)
+#define NUM_IS_MORE_THAN_1_(N) NUM_IS_MORE_THAN_1_PROBE_(NUM_IS_MORE_THAN_1_PROBE_ ## N, 1)
+#define NUM_IS_MORE_THAN_1_PROBE_(...) GET_VA_ARG_1(GET_ARGS_AFTER_1(__VA_ARGS__))
+#define NUM_IS_MORE_THAN_1_PROBE_0 ~, 0
+#define NUM_IS_MORE_THAN_1_PROBE_1 ~, 0
+
+/**
+ * @brief Get the first argument
+ *
+ * @param ... Arguments to select
+ *
+ * @return First argument or empty if no arguments are provided
+ */
+#define GET_VA_ARG_1(...) GET_VA_ARG_1_(__VA_ARGS__, ) // Make sure that also for 1 argument it works
+#define GET_VA_ARG_1_(a1, ...) a1
+
+/**
+ * @brief Get all the arguments but the first one
+ *
+ * @param ... Arguments to select
+ *
+ * @return All arguments after the first one or empty if less than 2 arguments are provided
+ */
+#define GET_ARGS_AFTER_1(...) GET_ARGS_AFTER_1_(__VA_ARGS__, ) // Make sure that also for 1 argument it works
+#define GET_ARGS_AFTER_1_(a1, ...) __VA_ARGS__
+
+/**
+ * @brief Size of a field in declared structure
+ *
+ * Macro that returns the size of the structure field.
+ * @param struct_type Variable type to get the field size from
+ * @param field Field name to analyze. It can be even field inside field (field.somethingelse.and_another).
+ *
+ * @return Size of the field
+ */
+#define FIELD_SIZE(struct_type, field) sizeof(((struct struct_type*)NULL)->field)
+
+/**
+ * @brief Number of elements in field array in declared structure
+ *
+ * Macro that returns number of elementy in structure field.
+ * @param struct_type Variable type to get the field size from
+ * @param field Field name to analyze.
+ *
+ * @return Number of elements in field array
+ *
+ * @sa FIELD_SIZE
+ */
+#define FIELD_ARRAY_SIZE(struct_type, field) (FIELD_SIZE(struct_type, field) / FIELD_SIZE(struct_type, field[0]))
+
+/**
+ * @brief Mapping macro
+ *
+ * Macro that process all arguments using given macro
+ *
+ * @param ... Macro name to be used for argument processing followed by arguments to process.
+ * Macro should have following form: MACRO(argument)
+ *
+ * @return All arguments processed by given macro
+ */
+#define MACRO_MAP(...) MACRO_MAP_(__VA_ARGS__)
+#define MACRO_MAP_(...) MACRO_MAP_N(NUM_VA_ARGS_LESS_1(__VA_ARGS__), __VA_ARGS__) // To make sure it works also for 2 arguments in total
+
+/**
+ * @brief Mapping macro, recursive version
+ *
+ * Can be used in @ref MACRO_MAP macro
+ */
+#define MACRO_MAP_REC(...) MACRO_MAP_REC_(__VA_ARGS__)
+#define MACRO_MAP_REC_(...) MACRO_MAP_REC_N(NUM_VA_ARGS_LESS_1(__VA_ARGS__), __VA_ARGS__) // To make sure it works also for 2 arguments in total
+/**
+ * @brief Mapping N arguments macro
+ *
+ * Macro similar to @ref MACRO_MAP but maps exact number of arguments.
+ * If there is more arguments given, the rest would be ignored.
+ *
+ * @param N Number of arguments to map
+ * @param ... Macro name to be used for argument processing followed by arguments to process.
+ * Macro should have following form: MACRO(argument)
+ *
+ * @return Selected number of arguments processed by given macro
+ */
+#define MACRO_MAP_N(N, ...) MACRO_MAP_N_(N, __VA_ARGS__)
+#define MACRO_MAP_N_(N, ...) CONCAT_2(MACRO_MAP_, N)(__VA_ARGS__, )
+
+/**
+ * @brief Mapping N arguments macro, recursive version
+ *
+ * Can be used in @ref MACRO_MAP_N macro
+ */
+#define MACRO_MAP_REC_N(N, ...) MACRO_MAP_REC_N_(N, __VA_ARGS__)
+#define MACRO_MAP_REC_N_(N, ...) CONCAT_2(MACRO_MAP_REC_, N)(__VA_ARGS__, )
+
+#define MACRO_MAP_0( ...)
+#define MACRO_MAP_1( macro, a, ...) macro(a)
+#define MACRO_MAP_2( macro, a, ...) macro(a) MACRO_MAP_1 (macro, __VA_ARGS__, )
+#define MACRO_MAP_3( macro, a, ...) macro(a) MACRO_MAP_2 (macro, __VA_ARGS__, )
+#define MACRO_MAP_4( macro, a, ...) macro(a) MACRO_MAP_3 (macro, __VA_ARGS__, )
+#define MACRO_MAP_5( macro, a, ...) macro(a) MACRO_MAP_4 (macro, __VA_ARGS__, )
+#define MACRO_MAP_6( macro, a, ...) macro(a) MACRO_MAP_5 (macro, __VA_ARGS__, )
+#define MACRO_MAP_7( macro, a, ...) macro(a) MACRO_MAP_6 (macro, __VA_ARGS__, )
+#define MACRO_MAP_8( macro, a, ...) macro(a) MACRO_MAP_7 (macro, __VA_ARGS__, )
+#define MACRO_MAP_9( macro, a, ...) macro(a) MACRO_MAP_8 (macro, __VA_ARGS__, )
+#define MACRO_MAP_10(macro, a, ...) macro(a) MACRO_MAP_9 (macro, __VA_ARGS__, )
+#define MACRO_MAP_11(macro, a, ...) macro(a) MACRO_MAP_10(macro, __VA_ARGS__, )
+#define MACRO_MAP_12(macro, a, ...) macro(a) MACRO_MAP_11(macro, __VA_ARGS__, )
+#define MACRO_MAP_13(macro, a, ...) macro(a) MACRO_MAP_12(macro, __VA_ARGS__, )
+#define MACRO_MAP_14(macro, a, ...) macro(a) MACRO_MAP_13(macro, __VA_ARGS__, )
+#define MACRO_MAP_15(macro, a, ...) macro(a) MACRO_MAP_14(macro, __VA_ARGS__, )
+#define MACRO_MAP_16(macro, a, ...) macro(a) MACRO_MAP_15(macro, __VA_ARGS__, )
+#define MACRO_MAP_17(macro, a, ...) macro(a) MACRO_MAP_16(macro, __VA_ARGS__, )
+#define MACRO_MAP_18(macro, a, ...) macro(a) MACRO_MAP_17(macro, __VA_ARGS__, )
+#define MACRO_MAP_19(macro, a, ...) macro(a) MACRO_MAP_18(macro, __VA_ARGS__, )
+#define MACRO_MAP_20(macro, a, ...) macro(a) MACRO_MAP_19(macro, __VA_ARGS__, )
+#define MACRO_MAP_21(macro, a, ...) macro(a) MACRO_MAP_20(macro, __VA_ARGS__, )
+#define MACRO_MAP_22(macro, a, ...) macro(a) MACRO_MAP_21(macro, __VA_ARGS__, )
+#define MACRO_MAP_23(macro, a, ...) macro(a) MACRO_MAP_22(macro, __VA_ARGS__, )
+#define MACRO_MAP_24(macro, a, ...) macro(a) MACRO_MAP_23(macro, __VA_ARGS__, )
+#define MACRO_MAP_25(macro, a, ...) macro(a) MACRO_MAP_24(macro, __VA_ARGS__, )
+#define MACRO_MAP_26(macro, a, ...) macro(a) MACRO_MAP_25(macro, __VA_ARGS__, )
+#define MACRO_MAP_27(macro, a, ...) macro(a) MACRO_MAP_26(macro, __VA_ARGS__, )
+#define MACRO_MAP_28(macro, a, ...) macro(a) MACRO_MAP_27(macro, __VA_ARGS__, )
+#define MACRO_MAP_29(macro, a, ...) macro(a) MACRO_MAP_28(macro, __VA_ARGS__, )
+#define MACRO_MAP_30(macro, a, ...) macro(a) MACRO_MAP_29(macro, __VA_ARGS__, )
+#define MACRO_MAP_31(macro, a, ...) macro(a) MACRO_MAP_30(macro, __VA_ARGS__, )
+#define MACRO_MAP_32(macro, a, ...) macro(a) MACRO_MAP_31(macro, __VA_ARGS__, )
+
+
+#define MACRO_MAP_REC_0( ...)
+#define MACRO_MAP_REC_1( macro, a, ...) macro(a)
+#define MACRO_MAP_REC_2( macro, a, ...) macro(a) MACRO_MAP_REC_1 (macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_3( macro, a, ...) macro(a) MACRO_MAP_REC_2 (macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_4( macro, a, ...) macro(a) MACRO_MAP_REC_3 (macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_5( macro, a, ...) macro(a) MACRO_MAP_REC_4 (macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_6( macro, a, ...) macro(a) MACRO_MAP_REC_5 (macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_7( macro, a, ...) macro(a) MACRO_MAP_REC_6 (macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_8( macro, a, ...) macro(a) MACRO_MAP_REC_7 (macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_9( macro, a, ...) macro(a) MACRO_MAP_REC_8 (macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_10(macro, a, ...) macro(a) MACRO_MAP_REC_9 (macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_11(macro, a, ...) macro(a) MACRO_MAP_REC_10(macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_12(macro, a, ...) macro(a) MACRO_MAP_REC_11(macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_13(macro, a, ...) macro(a) MACRO_MAP_REC_12(macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_14(macro, a, ...) macro(a) MACRO_MAP_REC_13(macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_15(macro, a, ...) macro(a) MACRO_MAP_REC_14(macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_16(macro, a, ...) macro(a) MACRO_MAP_REC_15(macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_17(macro, a, ...) macro(a) MACRO_MAP_REC_16(macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_18(macro, a, ...) macro(a) MACRO_MAP_REC_17(macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_19(macro, a, ...) macro(a) MACRO_MAP_REC_18(macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_20(macro, a, ...) macro(a) MACRO_MAP_REC_19(macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_21(macro, a, ...) macro(a) MACRO_MAP_REC_20(macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_22(macro, a, ...) macro(a) MACRO_MAP_REC_21(macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_23(macro, a, ...) macro(a) MACRO_MAP_REC_22(macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_24(macro, a, ...) macro(a) MACRO_MAP_REC_23(macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_25(macro, a, ...) macro(a) MACRO_MAP_REC_24(macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_26(macro, a, ...) macro(a) MACRO_MAP_REC_25(macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_27(macro, a, ...) macro(a) MACRO_MAP_REC_26(macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_28(macro, a, ...) macro(a) MACRO_MAP_REC_27(macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_29(macro, a, ...) macro(a) MACRO_MAP_REC_28(macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_30(macro, a, ...) macro(a) MACRO_MAP_REC_29(macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_31(macro, a, ...) macro(a) MACRO_MAP_REC_30(macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_32(macro, a, ...) macro(a) MACRO_MAP_REC_31(macro, __VA_ARGS__, )
+
+
+/**
+ * @brief Mapping macro with current index
+ *
+ * Basically macro similar to @ref MACRO_MAP, but the processing function would get an argument
+ * and current argument index (beginning from 0).
+ *
+ * @param ... Macro name to be used for argument processing followed by arguments to process.
+ * Macro should have following form: MACRO(argument, index)
+ * @return All arguments processed by given macro
+ */
+#define MACRO_MAP_FOR(...) MACRO_MAP_FOR_(__VA_ARGS__)
+#define MACRO_MAP_FOR_N_LIST 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, \
+ 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32
+#define MACRO_MAP_FOR_(...) MACRO_MAP_FOR_N(NUM_VA_ARGS_LESS_1(__VA_ARGS__), __VA_ARGS__)
+
+/**
+ * @brief Mapping N arguments macro with current index
+ *
+ * Macro is similar to @ref MACRO_MAP_FOR but maps exact number of arguments.
+ * If there is more arguments given, the rest would be ignored.
+ *
+ * @param N Number of arguments to map
+ * @param ... Macro name to be used for argument processing followed by arguments to process.
+ * Macro should have following form: MACRO(argument, index)
+ *
+ * @return Selected number of arguments processed by given macro
+ */
+#define MACRO_MAP_FOR_N(N, ...) MACRO_MAP_FOR_N_(N, __VA_ARGS__)
+#define MACRO_MAP_FOR_N_(N, ...) CONCAT_2(MACRO_MAP_FOR_, N)((MACRO_MAP_FOR_N_LIST), __VA_ARGS__, )
+
+#define MACRO_MAP_FOR_0( n_list, ...)
+#define MACRO_MAP_FOR_1( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)))
+#define MACRO_MAP_FOR_2( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_1 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_3( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_2 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_4( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_3 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_5( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_4 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_6( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_5 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_7( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_6 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_8( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_7 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_9( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_8 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_10(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_9 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_11(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_10((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_12(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_11((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_13(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_12((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_14(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_13((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_15(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_14((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_16(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_15((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_17(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_16((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_18(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_17((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_19(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_18((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_20(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_19((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_21(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_20((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_22(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_21((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_23(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_22((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_24(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_23((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_25(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_24((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_26(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_25((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_27(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_26((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_28(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_27((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_29(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_28((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_30(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_29((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_31(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_30((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_32(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_31((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+
+
+/**
+ * @brief Mapping macro with current index and parameter
+ *
+ * Version of @ref MACRO_MAP_FOR that passes also the same parameter to all macros.
+ *
+ * @param param Parameter that would be passed to each macro call during mapping.
+ * @param ... Macro name to be used for argument processing followed by arguments to process.
+ * Macro should have following form: MACRO(argument, index, param)
+ *
+ * @return All arguments processed by given macro
+ */
+#define MACRO_MAP_FOR_PARAM(param, ...) MACRO_MAP_FOR_PARAM_(param, __VA_ARGS__)
+#define MACRO_MAP_FOR_PARAM_(param, ...) MACRO_MAP_FOR_PARAM_N(NUM_VA_ARGS_LESS_1(__VA_ARGS__), param, __VA_ARGS__)
+
+/**
+ * @brief Mapping N arguments macro with with current index and parameter
+ *
+ * @param N Number of arguments to map
+ * @param param Parameter that would be passed to each macro call during mapping.
+ * @param ... Macro name to be used for argument processing followed by arguments to process.
+ * Macro should have following form: MACRO(argument, index, param)
+ *
+ * @return All arguments processed by given macro
+ */
+#define MACRO_MAP_FOR_PARAM_N(N, param, ...) MACRO_MAP_FOR_PARAM_N_(N, param, __VA_ARGS__)
+#define MACRO_MAP_FOR_PARAM_N_(N, param, ...) CONCAT_2(MACRO_MAP_FOR_PARAM_, N)((MACRO_MAP_FOR_N_LIST), param, __VA_ARGS__, )
+
+
+#define MACRO_MAP_FOR_PARAM_0( n_list, param, ...)
+#define MACRO_MAP_FOR_PARAM_1( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param)
+#define MACRO_MAP_FOR_PARAM_2( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_1 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_3( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_2 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_4( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_3 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_5( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_4 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_6( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_5 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_7( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_6 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_8( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_7 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_9( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_8 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_10(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_9 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_11(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_10((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_12(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_11((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_13(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_12((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_14(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_13((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_15(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_14((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_16(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_15((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_17(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_16((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_18(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_17((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_19(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_18((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_20(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_19((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_21(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_20((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_22(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_21((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_23(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_22((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_24(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_23((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_25(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_24((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_26(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_25((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_27(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_26((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_28(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_27((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_29(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_28((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_30(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_29((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_31(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_30((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_32(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_31((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+
+
+
+/**
+ * @brief Repeating macro.
+ *
+ * @param count Count of repeats.
+ * @param macro Macro must have the following form: MACRO(arguments).
+ * @param ... Arguments passed to the macro.
+ *
+ * @return All arguments processed by the given macro.
+ */
+#define MACRO_REPEAT(count, macro, ...) MACRO_REPEAT_(count, macro, __VA_ARGS__)
+#define MACRO_REPEAT_(count, macro, ...) CONCAT_2(MACRO_REPEAT_, count)(macro, __VA_ARGS__)
+
+#define MACRO_REPEAT_0(macro, ...)
+#define MACRO_REPEAT_1(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_0(macro, __VA_ARGS__)
+#define MACRO_REPEAT_2(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_1(macro, __VA_ARGS__)
+#define MACRO_REPEAT_3(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_2(macro, __VA_ARGS__)
+#define MACRO_REPEAT_4(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_3(macro, __VA_ARGS__)
+#define MACRO_REPEAT_5(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_4(macro, __VA_ARGS__)
+#define MACRO_REPEAT_6(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_5(macro, __VA_ARGS__)
+#define MACRO_REPEAT_7(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_6(macro, __VA_ARGS__)
+#define MACRO_REPEAT_8(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_7(macro, __VA_ARGS__)
+#define MACRO_REPEAT_9(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_8(macro, __VA_ARGS__)
+#define MACRO_REPEAT_10(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_9(macro, __VA_ARGS__)
+#define MACRO_REPEAT_11(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_10(macro, __VA_ARGS__)
+#define MACRO_REPEAT_12(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_11(macro, __VA_ARGS__)
+#define MACRO_REPEAT_13(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_12(macro, __VA_ARGS__)
+#define MACRO_REPEAT_14(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_13(macro, __VA_ARGS__)
+#define MACRO_REPEAT_15(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_14(macro, __VA_ARGS__)
+#define MACRO_REPEAT_16(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_15(macro, __VA_ARGS__)
+#define MACRO_REPEAT_17(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_16(macro, __VA_ARGS__)
+#define MACRO_REPEAT_18(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_17(macro, __VA_ARGS__)
+#define MACRO_REPEAT_19(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_18(macro, __VA_ARGS__)
+#define MACRO_REPEAT_20(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_19(macro, __VA_ARGS__)
+#define MACRO_REPEAT_21(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_20(macro, __VA_ARGS__)
+#define MACRO_REPEAT_22(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_21(macro, __VA_ARGS__)
+#define MACRO_REPEAT_23(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_22(macro, __VA_ARGS__)
+#define MACRO_REPEAT_24(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_23(macro, __VA_ARGS__)
+#define MACRO_REPEAT_25(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_24(macro, __VA_ARGS__)
+#define MACRO_REPEAT_26(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_25(macro, __VA_ARGS__)
+#define MACRO_REPEAT_27(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_26(macro, __VA_ARGS__)
+#define MACRO_REPEAT_28(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_27(macro, __VA_ARGS__)
+#define MACRO_REPEAT_29(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_28(macro, __VA_ARGS__)
+#define MACRO_REPEAT_30(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_29(macro, __VA_ARGS__)
+#define MACRO_REPEAT_31(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_30(macro, __VA_ARGS__)
+#define MACRO_REPEAT_32(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_31(macro, __VA_ARGS__)
+
+
+/**
+ * @brief Repeating macro with current index.
+ *
+ * Macro similar to @ref MACRO_REPEAT but the processing function gets the arguments
+ * and the current argument index (beginning from 0).
+
+ * @param count Count of repeats.
+ * @param macro Macro must have the following form: MACRO(index, arguments).
+ * @param ... Arguments passed to the macro.
+ *
+ * @return All arguments processed by the given macro.
+ */
+#define MACRO_REPEAT_FOR(count, macro, ...) MACRO_REPEAT_FOR_(count, macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_(count, macro, ...) CONCAT_2(MACRO_REPEAT_FOR_, count)((MACRO_MAP_FOR_N_LIST), macro, __VA_ARGS__)
+
+#define MACRO_REPEAT_FOR_0(n_list, macro, ...)
+#define MACRO_REPEAT_FOR_1(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_0((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_2(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_1((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_3(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_2((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_4(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_3((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_5(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_4((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_6(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_5((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_7(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_6((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_8(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_7((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_9(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_8((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_10(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_9((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_11(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_10((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_12(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_11((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_13(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_12((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_14(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_13((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_15(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_14((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_16(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_15((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_17(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_16((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_18(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_17((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_19(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_18((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_20(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_19((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_21(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_20((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_22(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_21((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_23(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_22((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_24(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_23((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_25(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_24((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_26(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_25((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_27(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_26((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_28(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_27((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_29(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_28((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_30(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_29((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_31(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_30((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_32(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_31((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+
+
+/**@brief Adding curly brace to the macro parameter.
+ *
+ * Useful in array of structures initialization.
+ *
+ * @param p Parameter to put into the curly brace. */
+#define PARAM_CBRACE(p) { p },
+
+
+/**@brief Function for changing the value unit.
+ *
+ * @param[in] value Value to be rescaled.
+ * @param[in] old_unit_reversal Reversal of the incoming unit.
+ * @param[in] new_unit_reversal Reversal of the desired unit.
+ *
+ * @return Number of bytes written.
+ */
+static __INLINE uint64_t value_rescale(uint32_t value, uint32_t old_unit_reversal, uint16_t new_unit_reversal)
+{
+ return (uint64_t)ROUNDED_DIV((uint64_t)value * new_unit_reversal, old_unit_reversal);
+}
+
+/**@brief Function for encoding a uint16 value.
+ *
+ * @param[in] value Value to be encoded.
+ * @param[out] p_encoded_data Buffer where the encoded data is to be written.
+ *
+ * @return Number of bytes written.
+ */
+static __INLINE uint8_t uint16_encode(uint16_t value, uint8_t * p_encoded_data)
+{
+ p_encoded_data[0] = (uint8_t) ((value & 0x00FF) >> 0);
+ p_encoded_data[1] = (uint8_t) ((value & 0xFF00) >> 8);
+ return sizeof(uint16_t);
+}
+
+/**@brief Function for encoding a three-byte value.
+ *
+ * @param[in] value Value to be encoded.
+ * @param[out] p_encoded_data Buffer where the encoded data is to be written.
+ *
+ * @return Number of bytes written.
+ */
+static __INLINE uint8_t uint24_encode(uint32_t value, uint8_t * p_encoded_data)
+{
+ p_encoded_data[0] = (uint8_t) ((value & 0x000000FF) >> 0);
+ p_encoded_data[1] = (uint8_t) ((value & 0x0000FF00) >> 8);
+ p_encoded_data[2] = (uint8_t) ((value & 0x00FF0000) >> 16);
+ return 3;
+}
+
+/**@brief Function for encoding a uint32 value.
+ *
+ * @param[in] value Value to be encoded.
+ * @param[out] p_encoded_data Buffer where the encoded data is to be written.
+ *
+ * @return Number of bytes written.
+ */
+static __INLINE uint8_t uint32_encode(uint32_t value, uint8_t * p_encoded_data)
+{
+ p_encoded_data[0] = (uint8_t) ((value & 0x000000FF) >> 0);
+ p_encoded_data[1] = (uint8_t) ((value & 0x0000FF00) >> 8);
+ p_encoded_data[2] = (uint8_t) ((value & 0x00FF0000) >> 16);
+ p_encoded_data[3] = (uint8_t) ((value & 0xFF000000) >> 24);
+ return sizeof(uint32_t);
+}
+
+/**@brief Function for encoding a uint40 value.
+ *
+ * @param[in] value Value to be encoded.
+ * @param[out] p_encoded_data Buffer where the encoded data is to be written.
+ *
+ * @return Number of bytes written.
+ */
+static __INLINE uint8_t uint40_encode(uint64_t value, uint8_t * p_encoded_data)
+{
+ p_encoded_data[0] = (uint8_t) ((value & 0x00000000FF) >> 0);
+ p_encoded_data[1] = (uint8_t) ((value & 0x000000FF00) >> 8);
+ p_encoded_data[2] = (uint8_t) ((value & 0x0000FF0000) >> 16);
+ p_encoded_data[3] = (uint8_t) ((value & 0x00FF000000) >> 24);
+ p_encoded_data[4] = (uint8_t) ((value & 0xFF00000000) >> 32);
+ return 5;
+}
+
+/**@brief Function for encoding a uint48 value.
+ *
+ * @param[in] value Value to be encoded.
+ * @param[out] p_encoded_data Buffer where the encoded data is to be written.
+ *
+ * @return Number of bytes written.
+ */
+static __INLINE uint8_t uint48_encode(uint64_t value, uint8_t * p_encoded_data)
+{
+ p_encoded_data[0] = (uint8_t) ((value & 0x0000000000FF) >> 0);
+ p_encoded_data[1] = (uint8_t) ((value & 0x00000000FF00) >> 8);
+ p_encoded_data[2] = (uint8_t) ((value & 0x000000FF0000) >> 16);
+ p_encoded_data[3] = (uint8_t) ((value & 0x0000FF000000) >> 24);
+ p_encoded_data[4] = (uint8_t) ((value & 0x00FF00000000) >> 32);
+ p_encoded_data[5] = (uint8_t) ((value & 0xFF0000000000) >> 40);
+ return 6;
+}
+
+/**@brief Function for decoding a uint16 value.
+ *
+ * @param[in] p_encoded_data Buffer where the encoded data is stored.
+ *
+ * @return Decoded value.
+ */
+static __INLINE uint16_t uint16_decode(const uint8_t * p_encoded_data)
+{
+ return ( (((uint16_t)((uint8_t *)p_encoded_data)[0])) |
+ (((uint16_t)((uint8_t *)p_encoded_data)[1]) << 8 ));
+}
+
+/**@brief Function for decoding a uint16 value in big-endian format.
+ *
+ * @param[in] p_encoded_data Buffer where the encoded data is stored.
+ *
+ * @return Decoded value.
+ */
+static __INLINE uint16_t uint16_big_decode(const uint8_t * p_encoded_data)
+{
+ return ( (((uint16_t)((uint8_t *)p_encoded_data)[0]) << 8 ) |
+ (((uint16_t)((uint8_t *)p_encoded_data)[1])) );
+}
+
+/**@brief Function for decoding a three-byte value.
+ *
+ * @param[in] p_encoded_data Buffer where the encoded data is stored.
+ *
+ * @return Decoded value (uint32_t).
+ */
+static __INLINE uint32_t uint24_decode(const uint8_t * p_encoded_data)
+{
+ return ( (((uint32_t)((uint8_t *)p_encoded_data)[0]) << 0) |
+ (((uint32_t)((uint8_t *)p_encoded_data)[1]) << 8) |
+ (((uint32_t)((uint8_t *)p_encoded_data)[2]) << 16));
+}
+
+/**@brief Function for decoding a uint32 value.
+ *
+ * @param[in] p_encoded_data Buffer where the encoded data is stored.
+ *
+ * @return Decoded value.
+ */
+static __INLINE uint32_t uint32_decode(const uint8_t * p_encoded_data)
+{
+ return ( (((uint32_t)((uint8_t *)p_encoded_data)[0]) << 0) |
+ (((uint32_t)((uint8_t *)p_encoded_data)[1]) << 8) |
+ (((uint32_t)((uint8_t *)p_encoded_data)[2]) << 16) |
+ (((uint32_t)((uint8_t *)p_encoded_data)[3]) << 24 ));
+}
+
+/**@brief Function for decoding a uint32 value in big-endian format.
+ *
+ * @param[in] p_encoded_data Buffer where the encoded data is stored.
+ *
+ * @return Decoded value.
+ */
+static __INLINE uint32_t uint32_big_decode(const uint8_t * p_encoded_data)
+{
+ return ( (((uint32_t)((uint8_t *)p_encoded_data)[0]) << 24) |
+ (((uint32_t)((uint8_t *)p_encoded_data)[1]) << 16) |
+ (((uint32_t)((uint8_t *)p_encoded_data)[2]) << 8) |
+ (((uint32_t)((uint8_t *)p_encoded_data)[3]) << 0) );
+}
+
+/**
+ * @brief Function for encoding an uint16 value in big-endian format.
+ *
+ * @param[in] value Value to be encoded.
+ * @param[out] p_encoded_data Buffer where the encoded data will be written.
+ *
+ * @return Number of bytes written.
+ */
+static __INLINE uint8_t uint16_big_encode(uint16_t value, uint8_t * p_encoded_data)
+{
+ p_encoded_data[0] = (uint8_t) (value >> 8);
+ p_encoded_data[1] = (uint8_t) (value & 0xFF);
+
+ return sizeof(uint16_t);
+}
+
+/*lint -esym(526, __rev) */
+/*lint -esym(628, __rev) */
+/**@brief Function for encoding a uint32 value in big-endian format.
+ *
+ * @param[in] value Value to be encoded.
+ * @param[out] p_encoded_data Buffer where the encoded data will be written.
+ * The address pointed to must be word alligned.
+ *
+ * @return Number of bytes written.
+ */
+static __INLINE uint8_t uint32_big_encode(uint32_t value, uint8_t * p_encoded_data)
+{
+ *(uint32_t *)p_encoded_data = __REV(value);
+ return sizeof(uint32_t);
+}
+
+/**@brief Function for decoding a uint40 value.
+ *
+ * @param[in] p_encoded_data Buffer where the encoded data is stored.
+ *
+ * @return Decoded value. (uint64_t)
+ */
+static __INLINE uint64_t uint40_decode(const uint8_t * p_encoded_data)
+{
+ return ( (((uint64_t)((uint8_t *)p_encoded_data)[0]) << 0) |
+ (((uint64_t)((uint8_t *)p_encoded_data)[1]) << 8) |
+ (((uint64_t)((uint8_t *)p_encoded_data)[2]) << 16) |
+ (((uint64_t)((uint8_t *)p_encoded_data)[3]) << 24) |
+ (((uint64_t)((uint8_t *)p_encoded_data)[4]) << 32 ));
+}
+
+/**@brief Function for decoding a uint48 value.
+ *
+ * @param[in] p_encoded_data Buffer where the encoded data is stored.
+ *
+ * @return Decoded value. (uint64_t)
+ */
+static __INLINE uint64_t uint48_decode(const uint8_t * p_encoded_data)
+{
+ return ( (((uint64_t)((uint8_t *)p_encoded_data)[0]) << 0) |
+ (((uint64_t)((uint8_t *)p_encoded_data)[1]) << 8) |
+ (((uint64_t)((uint8_t *)p_encoded_data)[2]) << 16) |
+ (((uint64_t)((uint8_t *)p_encoded_data)[3]) << 24) |
+ (((uint64_t)((uint8_t *)p_encoded_data)[4]) << 32) |
+ (((uint64_t)((uint8_t *)p_encoded_data)[5]) << 40 ));
+}
+
+/** @brief Function for converting the input voltage (in milli volts) into percentage of 3.0 Volts.
+ *
+ * @details The calculation is based on a linearized version of the battery's discharge
+ * curve. 3.0V returns 100% battery level. The limit for power failure is 2.1V and
+ * is considered to be the lower boundary.
+ *
+ * The discharge curve for CR2032 is non-linear. In this model it is split into
+ * 4 linear sections:
+ * - Section 1: 3.0V - 2.9V = 100% - 42% (58% drop on 100 mV)
+ * - Section 2: 2.9V - 2.74V = 42% - 18% (24% drop on 160 mV)
+ * - Section 3: 2.74V - 2.44V = 18% - 6% (12% drop on 300 mV)
+ * - Section 4: 2.44V - 2.1V = 6% - 0% (6% drop on 340 mV)
+ *
+ * These numbers are by no means accurate. Temperature and
+ * load in the actual application is not accounted for!
+ *
+ * @param[in] mvolts The voltage in mV
+ *
+ * @return Battery level in percent.
+*/
+static __INLINE uint8_t battery_level_in_percent(const uint16_t mvolts)
+{
+ uint8_t battery_level;
+
+ if (mvolts >= 3000)
+ {
+ battery_level = 100;
+ }
+ else if (mvolts > 2900)
+ {
+ battery_level = 100 - ((3000 - mvolts) * 58) / 100;
+ }
+ else if (mvolts > 2740)
+ {
+ battery_level = 42 - ((2900 - mvolts) * 24) / 160;
+ }
+ else if (mvolts > 2440)
+ {
+ battery_level = 18 - ((2740 - mvolts) * 12) / 300;
+ }
+ else if (mvolts > 2100)
+ {
+ battery_level = 6 - ((2440 - mvolts) * 6) / 340;
+ }
+ else
+ {
+ battery_level = 0;
+ }
+
+ return battery_level;
+}
+
+/**@brief Function for checking if a pointer value is aligned to a 4 byte boundary.
+ *
+ * @param[in] p Pointer value to be checked.
+ *
+ * @return TRUE if pointer is aligned to a 4 byte boundary, FALSE otherwise.
+ */
+static __INLINE bool is_word_aligned(void const* p)
+{
+ return (((uintptr_t)p & 0x03) == 0);
+}
+
+/*lint -e{568, 685} */
+/**
+ * @brief Function for checking if provided address is located in stack space.
+ *
+ * @param[in] ptr Pointer to be checked.
+ *
+ * @return true if address is in stack space, false otherwise.
+ */
+static __INLINE bool is_address_from_stack(void * ptr)
+{
+ if (((uint32_t)ptr >= (uint32_t)STACK_BASE) &&
+ ((uint32_t)ptr < (uint32_t)STACK_TOP) )
+ {
+ return true;
+ }
+ else
+ {
+ return false;
+ }
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // APP_UTIL_H__
+
+/** @} */
diff --git a/third_party/NordicSemiconductor/dependencies/app_util_platform.c b/third_party/NordicSemiconductor/dependencies/app_util_platform.c
index aa10017..8e4f121 100644
--- a/third_party/NordicSemiconductor/dependencies/app_util_platform.c
+++ b/third_party/NordicSemiconductor/dependencies/app_util_platform.c
@@ -1,129 +1,129 @@
-/**
- * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-#include "app_util_platform.h"
-
-#ifdef SOFTDEVICE_PRESENT
-/* Global nvic state instance, required by nrf_nvic.h */
-nrf_nvic_state_t nrf_nvic_state;
-#endif
-
-static uint32_t m_in_critical_region = 0;
-
-void app_util_disable_irq(void)
-{
- __disable_irq();
- m_in_critical_region++;
-}
-
-void app_util_enable_irq(void)
-{
- m_in_critical_region--;
- if (m_in_critical_region == 0)
- {
- __enable_irq();
- }
-}
-
-void app_util_critical_region_enter(uint8_t *p_nested)
-{
-#if __CORTEX_M == (0x04U)
- ASSERT(APP_LEVEL_PRIVILEGED == privilege_level_get())
-#endif
-
-#if defined(SOFTDEVICE_PRESENT)
- /* return value can be safely ignored */
- (void) sd_nvic_critical_region_enter(p_nested);
-#else
- (void)p_nested;
- app_util_disable_irq();
-#endif
-}
-
-void app_util_critical_region_exit(uint8_t nested)
-{
-#if __CORTEX_M == (0x04U)
- ASSERT(APP_LEVEL_PRIVILEGED == privilege_level_get())
-#endif
-
-#if defined(SOFTDEVICE_PRESENT)
- /* return value can be safely ignored */
- (void) sd_nvic_critical_region_exit(nested);
-#else
- app_util_enable_irq();
- (void)nested;
-#endif
-}
-
-
-uint8_t privilege_level_get(void)
-{
-#if __CORTEX_M == (0x00U) || defined(_WIN32) || defined(__unix) || defined(__APPLE__)
- /* the Cortex-M0 has no concept of privilege */
- return APP_LEVEL_PRIVILEGED;
-#elif __CORTEX_M == (0x04U)
- uint32_t isr_vector_num = __get_IPSR() & IPSR_ISR_Msk ;
- if (0 == isr_vector_num)
- {
- /* Thread Mode, check nPRIV */
- int32_t control = __get_CONTROL();
- return control & CONTROL_nPRIV_Msk ? APP_LEVEL_UNPRIVILEGED : APP_LEVEL_PRIVILEGED;
- }
- else
- {
- /* Handler Mode, always privileged */
- return APP_LEVEL_PRIVILEGED;
- }
-#endif
-}
-
-
-uint8_t current_int_priority_get(void)
-{
- uint32_t isr_vector_num = __get_IPSR() & IPSR_ISR_Msk ;
- if (isr_vector_num > 0)
- {
- int32_t irq_type = ((int32_t)isr_vector_num - EXTERNAL_INT_VECTOR_OFFSET);
- return (NVIC_GetPriority((IRQn_Type)irq_type) & 0xFF);
- }
- else
- {
- return APP_IRQ_PRIORITY_THREAD;
- }
-}
+/**
+ * Copyright (c) 2014 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#include "app_util_platform.h"
+
+#ifdef SOFTDEVICE_PRESENT
+/* Global nvic state instance, required by nrf_nvic.h */
+nrf_nvic_state_t nrf_nvic_state;
+#endif
+
+static uint32_t m_in_critical_region = 0;
+
+void app_util_disable_irq(void)
+{
+ __disable_irq();
+ m_in_critical_region++;
+}
+
+void app_util_enable_irq(void)
+{
+ m_in_critical_region--;
+ if (m_in_critical_region == 0)
+ {
+ __enable_irq();
+ }
+}
+
+void app_util_critical_region_enter(uint8_t *p_nested)
+{
+#if __CORTEX_M == (0x04U)
+ ASSERT(APP_LEVEL_PRIVILEGED == privilege_level_get())
+#endif
+
+#if defined(SOFTDEVICE_PRESENT)
+ /* return value can be safely ignored */
+ (void) sd_nvic_critical_region_enter(p_nested);
+#else
+ UNUSED_PARAMETER(p_nested);
+ app_util_disable_irq();
+#endif
+}
+
+void app_util_critical_region_exit(uint8_t nested)
+{
+#if __CORTEX_M == (0x04U)
+ ASSERT(APP_LEVEL_PRIVILEGED == privilege_level_get())
+#endif
+
+#if defined(SOFTDEVICE_PRESENT)
+ /* return value can be safely ignored */
+ (void) sd_nvic_critical_region_exit(nested);
+#else
+ UNUSED_PARAMETER(nested);
+ app_util_enable_irq();
+#endif
+}
+
+
+uint8_t privilege_level_get(void)
+{
+#if __CORTEX_M == (0x00U) || defined(_WIN32) || defined(__unix) || defined(__APPLE__)
+ /* the Cortex-M0 has no concept of privilege */
+ return APP_LEVEL_PRIVILEGED;
+#elif __CORTEX_M == (0x04U)
+ uint32_t isr_vector_num = __get_IPSR() & IPSR_ISR_Msk ;
+ if (0 == isr_vector_num)
+ {
+ /* Thread Mode, check nPRIV */
+ int32_t control = __get_CONTROL();
+ return control & CONTROL_nPRIV_Msk ? APP_LEVEL_UNPRIVILEGED : APP_LEVEL_PRIVILEGED;
+ }
+ else
+ {
+ /* Handler Mode, always privileged */
+ return APP_LEVEL_PRIVILEGED;
+ }
+#endif
+}
+
+
+uint8_t current_int_priority_get(void)
+{
+ uint32_t isr_vector_num = __get_IPSR() & IPSR_ISR_Msk ;
+ if (isr_vector_num > 0)
+ {
+ int32_t irq_type = ((int32_t)isr_vector_num - EXTERNAL_INT_VECTOR_OFFSET);
+ return (NVIC_GetPriority((IRQn_Type)irq_type) & 0xFF);
+ }
+ else
+ {
+ return APP_IRQ_PRIORITY_THREAD;
+ }
+}
diff --git a/third_party/NordicSemiconductor/dependencies/app_util_platform.h b/third_party/NordicSemiconductor/dependencies/app_util_platform.h
index 0b9896e..dd41339 100644
--- a/third_party/NordicSemiconductor/dependencies/app_util_platform.h
+++ b/third_party/NordicSemiconductor/dependencies/app_util_platform.h
@@ -1,279 +1,281 @@
-/**
- * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-/**@file
- *
- * @defgroup app_util_platform Utility Functions and Definitions (Platform)
- * @{
- * @ingroup app_common
- *
- * @brief Various types and definitions available to all applications when using SoftDevice.
- */
-
-#ifndef APP_UTIL_PLATFORM_H__
-#define APP_UTIL_PLATFORM_H__
-
-#include <stdint.h>
-#include "compiler_abstraction.h"
-#include "nrf.h"
-#ifdef SOFTDEVICE_PRESENT
-#include "nrf_soc.h"
-#include "nrf_nvic.h"
-#endif
-#include "nrf_assert.h"
-#include "app_error.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#if __CORTEX_M == (0x00U)
-#define _PRIO_SD_HIGH 0
-#define _PRIO_APP_HIGH 1
-#define _PRIO_APP_MID 1
-#define _PRIO_SD_LOW 2
-#define _PRIO_APP_LOW 3
-#define _PRIO_APP_LOWEST 3
-#define _PRIO_THREAD 4
-#elif __CORTEX_M == (0x04U)
-#define _PRIO_SD_HIGH 0
-#define _PRIO_SD_MID 1
-#define _PRIO_APP_HIGH 2
-#define _PRIO_APP_MID 3
-#define _PRIO_SD_LOW 4
-#define _PRIO_SD_LOWEST 5
-#define _PRIO_APP_LOW 6
-#define _PRIO_APP_LOWEST 7
-#define _PRIO_THREAD 15
-#else
- #error "No platform defined"
-#endif
-
-
-//lint -save -e113 -e452
-/**@brief The interrupt priorities available to the application while the SoftDevice is active. */
-typedef enum
-{
-#ifndef SOFTDEVICE_PRESENT
- APP_IRQ_PRIORITY_HIGHEST = _PRIO_SD_HIGH,
-#else
- APP_IRQ_PRIORITY_HIGHEST = _PRIO_APP_HIGH,
-#endif
- APP_IRQ_PRIORITY_HIGH = _PRIO_APP_HIGH,
-#ifndef SOFTDEVICE_PRESENT
- APP_IRQ_PRIORITY_MID = _PRIO_SD_LOW,
-#else
- APP_IRQ_PRIORITY_MID = _PRIO_APP_MID,
-#endif
- APP_IRQ_PRIORITY_LOW = _PRIO_APP_LOW,
- APP_IRQ_PRIORITY_LOWEST = _PRIO_APP_LOWEST,
- APP_IRQ_PRIORITY_THREAD = _PRIO_THREAD /**< "Interrupt level" when running in Thread Mode. */
-} app_irq_priority_t;
-//lint -restore
-
-
-/*@brief The privilege levels available to applications in Thread Mode */
-typedef enum
-{
- APP_LEVEL_UNPRIVILEGED,
- APP_LEVEL_PRIVILEGED
-} app_level_t;
-
-/**@cond NO_DOXYGEN */
-#define EXTERNAL_INT_VECTOR_OFFSET 16
-/**@endcond */
-
-/**@brief Macro for setting a breakpoint.
- */
-#if defined(__GNUC__)
-#define NRF_BREAKPOINT __asm__("BKPT 0");
-#else
-#define NRF_BREAKPOINT __BKPT(0)
-#endif
-
-/** @brief Macro for setting a breakpoint.
- *
- * If it is possible to detect debugger presence then it is set only in that case.
- *
- */
-#if __CORTEX_M == 0x04
-#define NRF_BREAKPOINT_COND do { \
- /* C_DEBUGEN == 1 -> Debugger Connected */ \
- if (CoreDebug->DHCSR & CoreDebug_DHCSR_C_DEBUGEN_Msk) \
- { \
- /* Generate breakpoint if debugger is connected */ \
- NRF_BREAKPOINT; \
- } \
- }while (0)
-#else
-#define NRF_BREAKPOINT_COND NRF_BREAKPOINT
-#endif // __CORTEX_M == 0x04
-
-#if defined ( __CC_ARM )
-#define PACKED(TYPE) __packed TYPE
-#define PACKED_STRUCT PACKED(struct)
-#elif defined ( __GNUC__ )
-#define PACKED __attribute__((packed))
-#define PACKED_STRUCT struct PACKED
-#elif defined (__ICCARM__)
-#define PACKED_STRUCT __packed struct
-#endif
-
-#if defined ( __CC_ARM )
-#define PRAGMA_OPTIMIZATION_FORCE_START _Pragma ("push") \
- _Pragma ("O3")
-#define PRAGMA_OPTIMIZATION_FORCE_END _Pragma ("pop")
-#elif defined ( __GNUC__ )
-#define PRAGMA_OPTIMIZATION_FORCE_START _Pragma("GCC push_options") \
- _Pragma ("GCC optimize (\"Os\")")
-#define PRAGMA_OPTIMIZATION_FORCE_END _Pragma ("GCC pop_options")
-#elif defined (__ICCARM__)
-#define PRAGMA_OPTIMIZATION_FORCE_START _Pragma ("optimize=high z")
-#define PRAGMA_OPTIMIZATION_FORCE_END
-#endif
-
-
-void app_util_critical_region_enter (uint8_t *p_nested);
-void app_util_critical_region_exit (uint8_t nested);
-
-/**@brief Macro for entering a critical region.
- *
- * @note Due to implementation details, there must exist one and only one call to
- * CRITICAL_REGION_EXIT() for each call to CRITICAL_REGION_ENTER(), and they must be located
- * in the same scope.
- */
-#ifdef SOFTDEVICE_PRESENT
-#define CRITICAL_REGION_ENTER() \
- { \
- uint8_t __CR_NESTED = 0; \
- app_util_critical_region_enter(&__CR_NESTED);
-#else
-#define CRITICAL_REGION_ENTER() app_util_critical_region_enter(NULL)
-#endif
-
-/**@brief Macro for leaving a critical region.
- *
- * @note Due to implementation details, there must exist one and only one call to
- * CRITICAL_REGION_EXIT() for each call to CRITICAL_REGION_ENTER(), and they must be located
- * in the same scope.
- */
-#ifdef SOFTDEVICE_PRESENT
-#define CRITICAL_REGION_EXIT() \
- app_util_critical_region_exit(__CR_NESTED); \
- }
-#else
-#define CRITICAL_REGION_EXIT() app_util_critical_region_exit(0)
-#endif
-
-/* Workaround for Keil 4 */
-#ifndef IPSR_ISR_Msk
-#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
-#endif
-
-
-
-/**@brief Macro to enable anonymous unions from a certain point in the code.
- */
-#if defined(__CC_ARM)
- #define ANON_UNIONS_ENABLE _Pragma("push") \
- _Pragma("anon_unions") \
- struct semicolon_swallower
-#elif defined(__ICCARM__)
- #define ANON_UNIONS_ENABLE _Pragma("language=extended") \
- struct semicolon_swallower
-#else
- #define ANON_UNIONS_ENABLE struct semicolon_swallower
- // No action will be taken.
- // For GCC anonymous unions are enabled by default.
-#endif
-
-/**@brief Macro to disable anonymous unions from a certain point in the code.
- * @note Call only after first calling @ref ANON_UNIONS_ENABLE.
- */
-#if defined(__CC_ARM)
- #define ANON_UNIONS_DISABLE _Pragma("pop") \
- struct semicolon_swallower
-#elif defined(__ICCARM__)
- #define ANON_UNIONS_DISABLE struct semicolon_swallower
- // for IAR leave anonymous unions enabled
-#else
- #define ANON_UNIONS_DISABLE struct semicolon_swallower
- // No action will be taken.
- // For GCC anonymous unions are enabled by default.
-#endif
-
-/**@brief Macro for adding pragma directive only for GCC.
- */
-#ifdef __GNUC__
-#define GCC_PRAGMA(v) _Pragma(v)
-#else
-#define GCC_PRAGMA(v)
-#endif
-
-/* Workaround for Keil 4 */
-#ifndef CONTROL_nPRIV_Msk
-#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */
-#endif
-
-/**@brief Function for finding the current interrupt level.
- *
- * @return Current interrupt level.
- * @retval APP_IRQ_PRIORITY_HIGH We are running in Application High interrupt level.
- * @retval APP_IRQ_PRIORITY_LOW We are running in Application Low interrupt level.
- * @retval APP_IRQ_PRIORITY_THREAD We are running in Thread Mode.
- */
-uint8_t current_int_priority_get(void);
-
-
-/**@brief Function for finding out the current privilege level.
- *
- * @return Current privilege level.
- * @retval APP_LEVEL_UNPRIVILEGED We are running in unprivileged level.
- * @retval APP_LEVEL_PRIVILEGED We are running in privileged level.
- */
-uint8_t privilege_level_get(void);
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // APP_UTIL_PLATFORM_H__
-
-/** @} */
+/**
+ * Copyright (c) 2014 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/**@file
+ *
+ * @defgroup app_util_platform Utility Functions and Definitions (Platform)
+ * @{
+ * @ingroup app_common
+ *
+ * @brief Various types and definitions available to all applications when using SoftDevice.
+ */
+
+#ifndef APP_UTIL_PLATFORM_H__
+#define APP_UTIL_PLATFORM_H__
+
+#include <stdint.h>
+#include "compiler_abstraction.h"
+#include "nrf.h"
+#ifdef SOFTDEVICE_PRESENT
+#include "nrf_soc.h"
+#include "nrf_nvic.h"
+#endif
+#include "nrf_assert.h"
+#include "app_error.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if __CORTEX_M == (0x00U)
+#define _PRIO_SD_HIGH 0
+#define _PRIO_APP_HIGH 1
+#define _PRIO_APP_MID 1
+#define _PRIO_SD_LOW 2
+#define _PRIO_APP_LOW_MID 3
+#define _PRIO_APP_LOW 3
+#define _PRIO_APP_LOWEST 3
+#define _PRIO_THREAD 4
+#elif __CORTEX_M == (0x04U)
+#define _PRIO_SD_HIGH 0
+#define _PRIO_SD_MID 1
+#define _PRIO_APP_HIGH 2
+#define _PRIO_APP_MID 3
+#define _PRIO_SD_LOW 4
+#define _PRIO_APP_LOW_MID 5
+#define _PRIO_APP_LOW 6
+#define _PRIO_APP_LOWEST 7
+#define _PRIO_THREAD 15
+#else
+ #error "No platform defined"
+#endif
+
+
+//lint -save -e113 -e452
+/**@brief The interrupt priorities available to the application while the SoftDevice is active. */
+typedef enum
+{
+#ifndef SOFTDEVICE_PRESENT
+ APP_IRQ_PRIORITY_HIGHEST = _PRIO_SD_HIGH,
+#else
+ APP_IRQ_PRIORITY_HIGHEST = _PRIO_APP_HIGH,
+#endif
+ APP_IRQ_PRIORITY_HIGH = _PRIO_APP_HIGH,
+#ifndef SOFTDEVICE_PRESENT
+ APP_IRQ_PRIORITY_MID = _PRIO_SD_LOW,
+#else
+ APP_IRQ_PRIORITY_MID = _PRIO_APP_MID,
+#endif
+ APP_IRQ_PRIORITY_LOW_MID = _PRIO_APP_LOW_MID,
+ APP_IRQ_PRIORITY_LOW = _PRIO_APP_LOW,
+ APP_IRQ_PRIORITY_LOWEST = _PRIO_APP_LOWEST,
+ APP_IRQ_PRIORITY_THREAD = _PRIO_THREAD /**< "Interrupt level" when running in Thread Mode. */
+} app_irq_priority_t;
+//lint -restore
+
+
+/*@brief The privilege levels available to applications in Thread Mode */
+typedef enum
+{
+ APP_LEVEL_UNPRIVILEGED,
+ APP_LEVEL_PRIVILEGED
+} app_level_t;
+
+/**@cond NO_DOXYGEN */
+#define EXTERNAL_INT_VECTOR_OFFSET 16
+/**@endcond */
+
+/**@brief Macro for setting a breakpoint.
+ */
+#if defined(__GNUC__)
+#define NRF_BREAKPOINT __asm__("BKPT 0");
+#else
+#define NRF_BREAKPOINT __BKPT(0)
+#endif
+
+/** @brief Macro for setting a breakpoint.
+ *
+ * If it is possible to detect debugger presence then it is set only in that case.
+ *
+ */
+#if __CORTEX_M == 0x04
+#define NRF_BREAKPOINT_COND do { \
+ /* C_DEBUGEN == 1 -> Debugger Connected */ \
+ if (CoreDebug->DHCSR & CoreDebug_DHCSR_C_DEBUGEN_Msk) \
+ { \
+ /* Generate breakpoint if debugger is connected */ \
+ NRF_BREAKPOINT; \
+ } \
+ }while (0)
+#else
+#define NRF_BREAKPOINT_COND NRF_BREAKPOINT
+#endif // __CORTEX_M == 0x04
+
+#if defined ( __CC_ARM )
+#define PACKED(TYPE) __packed TYPE
+#define PACKED_STRUCT PACKED(struct)
+#elif defined ( __GNUC__ )
+#define PACKED __attribute__((packed))
+#define PACKED_STRUCT struct PACKED
+#elif defined (__ICCARM__)
+#define PACKED_STRUCT __packed struct
+#endif
+
+#if defined ( __CC_ARM )
+#define PRAGMA_OPTIMIZATION_FORCE_START _Pragma ("push") \
+ _Pragma ("O3")
+#define PRAGMA_OPTIMIZATION_FORCE_END _Pragma ("pop")
+#elif defined ( __GNUC__ )
+#define PRAGMA_OPTIMIZATION_FORCE_START _Pragma("GCC push_options") \
+ _Pragma ("GCC optimize (\"Os\")")
+#define PRAGMA_OPTIMIZATION_FORCE_END _Pragma ("GCC pop_options")
+#elif defined (__ICCARM__)
+#define PRAGMA_OPTIMIZATION_FORCE_START _Pragma ("optimize=high z")
+#define PRAGMA_OPTIMIZATION_FORCE_END
+#endif
+
+
+void app_util_critical_region_enter (uint8_t *p_nested);
+void app_util_critical_region_exit (uint8_t nested);
+
+/**@brief Macro for entering a critical region.
+ *
+ * @note Due to implementation details, there must exist one and only one call to
+ * CRITICAL_REGION_EXIT() for each call to CRITICAL_REGION_ENTER(), and they must be located
+ * in the same scope.
+ */
+#ifdef SOFTDEVICE_PRESENT
+#define CRITICAL_REGION_ENTER() \
+ { \
+ uint8_t __CR_NESTED = 0; \
+ app_util_critical_region_enter(&__CR_NESTED);
+#else
+#define CRITICAL_REGION_ENTER() app_util_critical_region_enter(NULL)
+#endif
+
+/**@brief Macro for leaving a critical region.
+ *
+ * @note Due to implementation details, there must exist one and only one call to
+ * CRITICAL_REGION_EXIT() for each call to CRITICAL_REGION_ENTER(), and they must be located
+ * in the same scope.
+ */
+#ifdef SOFTDEVICE_PRESENT
+#define CRITICAL_REGION_EXIT() \
+ app_util_critical_region_exit(__CR_NESTED); \
+ }
+#else
+#define CRITICAL_REGION_EXIT() app_util_critical_region_exit(0)
+#endif
+
+/* Workaround for Keil 4 */
+#ifndef IPSR_ISR_Msk
+#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
+#endif
+
+
+
+/**@brief Macro to enable anonymous unions from a certain point in the code.
+ */
+#if defined(__CC_ARM)
+ #define ANON_UNIONS_ENABLE _Pragma("push") \
+ _Pragma("anon_unions") \
+ struct semicolon_swallower
+#elif defined(__ICCARM__)
+ #define ANON_UNIONS_ENABLE _Pragma("language=extended") \
+ struct semicolon_swallower
+#else
+ #define ANON_UNIONS_ENABLE struct semicolon_swallower
+ // No action will be taken.
+ // For GCC anonymous unions are enabled by default.
+#endif
+
+/**@brief Macro to disable anonymous unions from a certain point in the code.
+ * @note Call only after first calling @ref ANON_UNIONS_ENABLE.
+ */
+#if defined(__CC_ARM)
+ #define ANON_UNIONS_DISABLE _Pragma("pop") \
+ struct semicolon_swallower
+#elif defined(__ICCARM__)
+ #define ANON_UNIONS_DISABLE struct semicolon_swallower
+ // for IAR leave anonymous unions enabled
+#else
+ #define ANON_UNIONS_DISABLE struct semicolon_swallower
+ // No action will be taken.
+ // For GCC anonymous unions are enabled by default.
+#endif
+
+/**@brief Macro for adding pragma directive only for GCC.
+ */
+#ifdef __GNUC__
+#define GCC_PRAGMA(v) _Pragma(v)
+#else
+#define GCC_PRAGMA(v)
+#endif
+
+/* Workaround for Keil 4 */
+#ifndef CONTROL_nPRIV_Msk
+#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */
+#endif
+
+/**@brief Function for finding the current interrupt level.
+ *
+ * @return Current interrupt level.
+ * @retval APP_IRQ_PRIORITY_HIGH We are running in Application High interrupt level.
+ * @retval APP_IRQ_PRIORITY_LOW We are running in Application Low interrupt level.
+ * @retval APP_IRQ_PRIORITY_THREAD We are running in Thread Mode.
+ */
+uint8_t current_int_priority_get(void);
+
+
+/**@brief Function for finding out the current privilege level.
+ *
+ * @return Current privilege level.
+ * @retval APP_LEVEL_UNPRIVILEGED We are running in unprivileged level.
+ * @retval APP_LEVEL_PRIVILEGED We are running in privileged level.
+ */
+uint8_t privilege_level_get(void);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // APP_UTIL_PLATFORM_H__
+
+/** @} */
diff --git a/third_party/NordicSemiconductor/dependencies/apply_old_config.h b/third_party/NordicSemiconductor/dependencies/apply_old_config.h
deleted file mode 100644
index 62ef475..0000000
--- a/third_party/NordicSemiconductor/dependencies/apply_old_config.h
+++ /dev/null
@@ -1,1385 +0,0 @@
-/**
- * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-
-#ifndef APPLY_OLD_CONFIG_H__
-#define APPLY_OLD_CONFIG_H__
-
-//------------------------------------------------------------------------------
-// Peripheral Resource Sharing (PRS)
-
-#if defined(PERIPHERAL_RESOURCE_SHARING_ENABLED)
-
-#define NRFX_PRS_ENABLED PERIPHERAL_RESOURCE_SHARING_ENABLED
-#define NRFX_PRS_BOX_0_ENABLED PERIPHERAL_RESOURCE_SHARING_ENABLED
-#define NRFX_PRS_BOX_1_ENABLED PERIPHERAL_RESOURCE_SHARING_ENABLED
-#define NRFX_PRS_BOX_2_ENABLED PERIPHERAL_RESOURCE_SHARING_ENABLED
-#define NRFX_PRS_BOX_3_ENABLED PERIPHERAL_RESOURCE_SHARING_ENABLED
-#define NRFX_PRS_BOX_4_ENABLED PERIPHERAL_RESOURCE_SHARING_ENABLED
-
-#if defined(COMMON_CONFIG_LOG_ENABLED)
-#undef NRFX_PRS_CONFIG_LOG_ENABLED
-#define NRFX_PRS_CONFIG_LOG_ENABLED COMMON_CONFIG_LOG_ENABLED
-#endif
-#if defined(COMMON_CONFIG_LOG_LEVEL)
-#undef NRFX_PRS_CONFIG_LOG_LEVEL
-#define NRFX_PRS_CONFIG_LOG_LEVEL COMMON_CONFIG_LOG_LEVEL
-#endif
-#if defined(COMMON_CONFIG_INFO_COLOR)
-#undef NRFX_PRS_CONFIG_INFO_COLOR
-#define NRFX_PRS_CONFIG_INFO_COLOR COMMON_CONFIG_INFO_COLOR
-#endif
-#if defined(COMMON_CONFIG_DEBUG_COLOR)
-#undef NRFX_PRS_CONFIG_DEBUG_COLOR
-#define NRFX_PRS_CONFIG_DEBUG_COLOR COMMON_CONFIG_DEBUG_COLOR
-#endif
-
-#endif // defined(PERIPHERAL_RESOURCE_SHARING_ENABLED)
-
-//------------------------------------------------------------------------------
-// CLOCK
-
-#if defined(CLOCK_ENABLED)
-
-#undef NRFX_CLOCK_ENABLED
-#define NRFX_CLOCK_ENABLED CLOCK_ENABLED
-
-#if defined(CLOCK_CONFIG_LF_SRC)
-#undef NRFX_CLOCK_CONFIG_LF_SRC
-#define NRFX_CLOCK_CONFIG_LF_SRC CLOCK_CONFIG_LF_SRC
-#endif
-#if defined(CLOCK_CONFIG_IRQ_PRIORITY)
-#undef NRFX_CLOCK_CONFIG_IRQ_PRIORITY
-#define NRFX_CLOCK_CONFIG_IRQ_PRIORITY CLOCK_CONFIG_IRQ_PRIORITY
-#endif
-
-#if defined(CLOCK_CONFIG_LOG_ENABLED)
-#undef NRFX_CLOCK_CONFIG_LOG_ENABLED
-#define NRFX_CLOCK_CONFIG_LOG_ENABLED CLOCK_CONFIG_LOG_ENABLED
-#endif
-#if defined(CLOCK_CONFIG_LOG_LEVEL)
-#undef NRFX_CLOCK_CONFIG_LOG_LEVEL
-#define NRFX_CLOCK_CONFIG_LOG_LEVEL CLOCK_CONFIG_LOG_LEVEL
-#endif
-#if defined(CLOCK_CONFIG_INFO_COLOR)
-#undef NRFX_CLOCK_CONFIG_INFO_COLOR
-#define NRFX_CLOCK_CONFIG_INFO_COLOR CLOCK_CONFIG_INFO_COLOR
-#endif
-#if defined(CLOCK_CONFIG_DEBUG_COLOR)
-#undef NRFX_CLOCK_CONFIG_DEBUG_COLOR
-#define NRFX_CLOCK_CONFIG_DEBUG_COLOR CLOCK_CONFIG_DEBUG_COLOR
-#endif
-
-#endif // defined(CLOCK_ENABLED)
-
-//------------------------------------------------------------------------------
-// COMP
-
-#if defined(COMP_ENABLED)
-
-#undef NRFX_COMP_ENABLED
-#define NRFX_COMP_ENABLED COMP_ENABLED
-
-#if defined(COMP_CONFIG_REF)
-#undef NRFX_COMP_CONFIG_REF
-#define NRFX_COMP_CONFIG_REF COMP_CONFIG_REF
-#endif
-#if defined(COMP_CONFIG_MAIN_MODE)
-#undef NRFX_COMP_CONFIG_MAIN_MODE
-#define NRFX_COMP_CONFIG_MAIN_MODE COMP_CONFIG_MAIN_MODE
-#endif
-#if defined(COMP_CONFIG_SPEED_MODE)
-#undef NRFX_COMP_CONFIG_SPEED_MODE
-#define NRFX_COMP_CONFIG_SPEED_MODE COMP_CONFIG_SPEED_MODE
-#endif
-#if defined(COMP_CONFIG_HYST)
-#undef NRFX_COMP_CONFIG_HYST
-#define NRFX_COMP_CONFIG_HYST COMP_CONFIG_HYST
-#endif
-#if defined(COMP_CONFIG_ISOURCE)
-#undef NRFX_COMP_CONFIG_ISOURCE
-#define NRFX_COMP_CONFIG_ISOURCE COMP_CONFIG_ISOURCE
-#endif
-#if defined(COMP_CONFIG_INPUT)
-#undef NRFX_COMP_CONFIG_INPUT
-#define NRFX_COMP_CONFIG_INPUT COMP_CONFIG_INPUT
-#endif
-#if defined(COMP_CONFIG_IRQ_PRIORITY)
-#undef NRFX_COMP_CONFIG_IRQ_PRIORITY
-#define NRFX_COMP_CONFIG_IRQ_PRIORITY COMP_CONFIG_IRQ_PRIORITY
-#endif
-
-#if defined(COMP_CONFIG_LOG_ENABLED)
-#undef NRFX_COMP_CONFIG_LOG_ENABLED
-#define NRFX_COMP_CONFIG_LOG_ENABLED COMP_CONFIG_LOG_ENABLED
-#endif
-#if defined(COMP_CONFIG_LOG_LEVEL)
-#undef NRFX_COMP_CONFIG_LOG_LEVEL
-#define NRFX_COMP_CONFIG_LOG_LEVEL COMP_CONFIG_LOG_LEVEL
-#endif
-#if defined(COMP_CONFIG_INFO_COLOR)
-#undef NRFX_COMP_CONFIG_INFO_COLOR
-#define NRFX_COMP_CONFIG_INFO_COLOR COMP_CONFIG_INFO_COLOR
-#endif
-#if defined(COMP_CONFIG_DEBUG_COLOR)
-#undef NRFX_COMP_CONFIG_DEBUG_COLOR
-#define NRFX_COMP_CONFIG_DEBUG_COLOR COMP_CONFIG_DEBUG_COLOR
-#endif
-
-#endif // defined(COMP_ENABLED)
-
-//------------------------------------------------------------------------------
-// GPIOTE
-
-#if defined(GPIOTE_ENABLED)
-
-#undef NRFX_GPIOTE_ENABLED
-#define NRFX_GPIOTE_ENABLED GPIOTE_ENABLED
-
-#if defined(GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS)
-#undef NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS
-#define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS
-#endif
-
-#if defined(GPIOTE_CONFIG_IRQ_PRIORITY)
-#undef NRFX_GPIOTE_CONFIG_IRQ_PRIORITY
-#define NRFX_GPIOTE_CONFIG_IRQ_PRIORITY GPIOTE_CONFIG_IRQ_PRIORITY
-#endif
-
-#if defined(GPIOTE_CONFIG_LOG_ENABLED)
-#undef NRFX_GPIOTE_CONFIG_LOG_ENABLED
-#define NRFX_GPIOTE_CONFIG_LOG_ENABLED GPIOTE_CONFIG_LOG_ENABLED
-#endif
-#if defined(GPIOTE_CONFIG_LOG_LEVEL)
-#undef NRFX_GPIOTE_CONFIG_LOG_LEVEL
-#define NRFX_GPIOTE_CONFIG_LOG_LEVEL GPIOTE_CONFIG_LOG_LEVEL
-#endif
-#if defined(GPIOTE_CONFIG_INFO_COLOR)
-#undef NRFX_GPIOTE_CONFIG_INFO_COLOR
-#define NRFX_GPIOTE_CONFIG_INFO_COLOR GPIOTE_CONFIG_INFO_COLOR
-#endif
-#if defined(GPIOTE_CONFIG_DEBUG_COLOR)
-#undef NRFX_GPIOTE_CONFIG_DEBUG_COLOR
-#define NRFX_GPIOTE_CONFIG_DEBUG_COLOR GPIOTE_CONFIG_DEBUG_COLOR
-#endif
-
-#endif // defined(GPIOTE_ENABLED)
-
-//------------------------------------------------------------------------------
-// I2S
-
-#if defined(I2S_ENABLED)
-
-#undef NRFX_I2S_ENABLED
-#define NRFX_I2S_ENABLED I2S_ENABLED
-
-#if defined(I2S_CONFIG_SCK_PIN)
-#undef NRFX_I2S_CONFIG_SCK_PIN
-#define NRFX_I2S_CONFIG_SCK_PIN I2S_CONFIG_SCK_PIN
-#endif
-#if defined(I2S_CONFIG_LRCK_PIN)
-#undef NRFX_I2S_CONFIG_LRCK_PIN
-#define NRFX_I2S_CONFIG_LRCK_PIN I2S_CONFIG_LRCK_PIN
-#endif
-#if defined(I2S_CONFIG_MCK_PIN)
-#undef NRFX_I2S_CONFIG_MCK_PIN
-#define NRFX_I2S_CONFIG_MCK_PIN I2S_CONFIG_MCK_PIN
-#endif
-#if defined(I2S_CONFIG_SDOUT_PIN)
-#undef NRFX_I2S_CONFIG_SDOUT_PIN
-#define NRFX_I2S_CONFIG_SDOUT_PIN I2S_CONFIG_SDOUT_PIN
-#endif
-#if defined(I2S_CONFIG_SDIN_PIN)
-#undef NRFX_I2S_CONFIG_SDIN_PIN
-#define NRFX_I2S_CONFIG_SDIN_PIN I2S_CONFIG_SDIN_PIN
-#endif
-
-#if defined(I2S_CONFIG_MASTER)
-#undef NRFX_I2S_CONFIG_MASTER
-#define NRFX_I2S_CONFIG_MASTER I2S_CONFIG_MASTER
-#endif
-#if defined(I2S_CONFIG_FORMAT)
-#undef NRFX_I2S_CONFIG_FORMAT
-#define NRFX_I2S_CONFIG_FORMAT I2S_CONFIG_FORMAT
-#endif
-#if defined(I2S_CONFIG_ALIGN)
-#undef NRFX_I2S_CONFIG_ALIGN
-#define NRFX_I2S_CONFIG_ALIGN I2S_CONFIG_ALIGN
-#endif
-#if defined(I2S_CONFIG_SWIDTH)
-#undef NRFX_I2S_CONFIG_SWIDTH
-#define NRFX_I2S_CONFIG_SWIDTH I2S_CONFIG_SWIDTH
-#endif
-#if defined(I2S_CONFIG_CHANNELS)
-#undef NRFX_I2S_CONFIG_CHANNELS
-#define NRFX_I2S_CONFIG_CHANNELS I2S_CONFIG_CHANNELS
-#endif
-#if defined(I2S_CONFIG_MCK_SETUP)
-#undef NRFX_I2S_CONFIG_MCK_SETUP
-#define NRFX_I2S_CONFIG_MCK_SETUP I2S_CONFIG_MCK_SETUP
-#endif
-#if defined(I2S_CONFIG_RATIO)
-#undef NRFX_I2S_CONFIG_RATIO
-#define NRFX_I2S_CONFIG_RATIO I2S_CONFIG_RATIO
-#endif
-#if defined(I2S_CONFIG_IRQ_PRIORITY)
-#undef NRFX_I2S_CONFIG_IRQ_PRIORITY
-#define NRFX_I2S_CONFIG_IRQ_PRIORITY I2S_CONFIG_IRQ_PRIORITY
-#endif
-
-#if defined(I2S_CONFIG_LOG_ENABLED)
-#undef NRFX_I2S_CONFIG_LOG_ENABLED
-#define NRFX_I2S_CONFIG_LOG_ENABLED I2S_CONFIG_LOG_ENABLED
-#endif
-#if defined(I2S_CONFIG_LOG_LEVEL)
-#undef NRFX_I2S_CONFIG_LOG_LEVEL
-#define NRFX_I2S_CONFIG_LOG_LEVEL I2S_CONFIG_LOG_LEVEL
-#endif
-#if defined(I2S_CONFIG_INFO_COLOR)
-#undef NRFX_I2S_CONFIG_INFO_COLOR
-#define NRFX_I2S_CONFIG_INFO_COLOR I2S_CONFIG_INFO_COLOR
-#endif
-#if defined(I2S_CONFIG_DEBUG_COLOR)
-#undef NRFX_I2S_CONFIG_DEBUG_COLOR
-#define NRFX_I2S_CONFIG_DEBUG_COLOR I2S_CONFIG_DEBUG_COLOR
-#endif
-
-#endif // defined(I2S_ENABLED)
-
-//------------------------------------------------------------------------------
-// LPCOMP
-
-#if defined(LPCOMP_ENABLED)
-
-#undef NRFX_LPCOMP_ENABLED
-#define NRFX_LPCOMP_ENABLED LPCOMP_ENABLED
-
-#if defined(LPCOMP_CONFIG_REFERENCE)
-#undef NRFX_LPCOMP_CONFIG_REFERENCE
-#define NRFX_LPCOMP_CONFIG_REFERENCE LPCOMP_CONFIG_REFERENCE
-#endif
-#if defined(LPCOMP_CONFIG_DETECTION)
-#undef NRFX_LPCOMP_CONFIG_DETECTION
-#define NRFX_LPCOMP_CONFIG_DETECTION LPCOMP_CONFIG_DETECTION
-#endif
-#if defined(LPCOMP_CONFIG_INPUT)
-#undef NRFX_LPCOMP_CONFIG_INPUT
-#define NRFX_LPCOMP_CONFIG_INPUT LPCOMP_CONFIG_INPUT
-#endif
-#if defined(LPCOMP_CONFIG_HYST)
-#undef NRFX_LPCOMP_CONFIG_HYST
-#define NRFX_LPCOMP_CONFIG_HYST LPCOMP_CONFIG_HYST
-#endif
-#if defined(LPCOMP_CONFIG_IRQ_PRIORITY)
-#undef NRFX_LPCOMP_CONFIG_IRQ_PRIORITY
-#define NRFX_LPCOMP_CONFIG_IRQ_PRIORITY LPCOMP_CONFIG_IRQ_PRIORITY
-#endif
-
-#if defined(LPCOMP_CONFIG_LOG_ENABLED)
-#undef NRFX_LPCOMP_CONFIG_LOG_ENABLED
-#define NRFX_LPCOMP_CONFIG_LOG_ENABLED LPCOMP_CONFIG_LOG_ENABLED
-#endif
-#if defined(LPCOMP_CONFIG_LOG_LEVEL)
-#undef NRFX_LPCOMP_CONFIG_LOG_LEVEL
-#define NRFX_LPCOMP_CONFIG_LOG_LEVEL LPCOMP_CONFIG_LOG_LEVEL
-#endif
-#if defined(LPCOMP_CONFIG_INFO_COLOR)
-#undef NRFX_LPCOMP_CONFIG_INFO_COLOR
-#define NRFX_LPCOMP_CONFIG_INFO_COLOR LPCOMP_CONFIG_INFO_COLOR
-#endif
-#if defined(LPCOMP_CONFIG_DEBUG_COLOR)
-#undef NRFX_LPCOMP_CONFIG_DEBUG_COLOR
-#define NRFX_LPCOMP_CONFIG_DEBUG_COLOR LPCOMP_CONFIG_DEBUG_COLOR
-#endif
-
-#endif // defined(LPCOMP_ENABLED)
-
-//------------------------------------------------------------------------------
-// PDM
-
-#if defined(PDM_ENABLED)
-
-#undef NRFX_PDM_ENABLED
-#define NRFX_PDM_ENABLED PDM_ENABLED
-
-#if defined(PDM_CONFIG_MODE)
-#undef NRFX_PDM_CONFIG_MODE
-#define NRFX_PDM_CONFIG_MODE PDM_CONFIG_MODE
-#endif
-#if defined(PDM_CONFIG_EDGE)
-#undef NRFX_PDM_CONFIG_EDGE
-#define NRFX_PDM_CONFIG_EDGE PDM_CONFIG_EDGE
-#endif
-#if defined(PDM_CONFIG_CLOCK_FREQ)
-#undef NRFX_PDM_CONFIG_CLOCK_FREQ
-#define NRFX_PDM_CONFIG_CLOCK_FREQ PDM_CONFIG_CLOCK_FREQ
-#endif
-#if defined(PDM_CONFIG_IRQ_PRIORITY)
-#undef NRFX_PDM_CONFIG_IRQ_PRIORITY
-#define NRFX_PDM_CONFIG_IRQ_PRIORITY PDM_CONFIG_IRQ_PRIORITY
-#endif
-
-#if defined(PDM_CONFIG_LOG_ENABLED)
-#undef NRFX_PDM_CONFIG_LOG_ENABLED
-#define NRFX_PDM_CONFIG_LOG_ENABLED PDM_CONFIG_LOG_ENABLED
-#endif
-#if defined(PDM_CONFIG_LOG_LEVEL)
-#undef NRFX_PDM_CONFIG_LOG_LEVEL
-#define NRFX_PDM_CONFIG_LOG_LEVEL PDM_CONFIG_LOG_LEVEL
-#endif
-#if defined(PDM_CONFIG_INFO_COLOR)
-#undef NRFX_PDM_CONFIG_INFO_COLOR
-#define NRFX_PDM_CONFIG_INFO_COLOR PDM_CONFIG_INFO_COLOR
-#endif
-#if defined(PDM_CONFIG_DEBUG_COLOR)
-#undef NRFX_PDM_CONFIG_DEBUG_COLOR
-#define NRFX_PDM_CONFIG_DEBUG_COLOR PDM_CONFIG_DEBUG_COLOR
-#endif
-
-#endif // defined(PDM_ENABLED)
-
-//------------------------------------------------------------------------------
-// POWER
-
-#if defined(POWER_ENABLED)
-
-#undef NRFX_POWER_ENABLED
-#define NRFX_POWER_ENABLED POWER_ENABLED
-
-#if defined(POWER_CONFIG_IRQ_PRIORITY)
-#undef NRFX_POWER_CONFIG_IRQ_PRIORITY
-#define NRFX_POWER_CONFIG_IRQ_PRIORITY POWER_CONFIG_IRQ_PRIORITY
-#endif
-
-#if defined(POWER_CONFIG_DEFAULT_DCDCEN)
-#undef NRFX_POWER_CONFIG_DEFAULT_DCDCEN
-#define NRFX_POWER_CONFIG_DEFAULT_DCDCEN POWER_CONFIG_DEFAULT_DCDCEN
-#endif
-#if defined(POWER_CONFIG_DEFAULT_DCDCENHV)
-#undef NRFX_POWER_CONFIG_DEFAULT_DCDCENHV
-#define NRFX_POWER_CONFIG_DEFAULT_DCDCENHV POWER_CONFIG_DEFAULT_DCDCENHV
-#endif
-
-#endif // defined(POWER_ENABLED)
-
-//------------------------------------------------------------------------------
-// PPI
-
-#if defined(PPI_ENABLED)
-
-#undef NRFX_PPI_ENABLED
-#define NRFX_PPI_ENABLED PPI_ENABLED
-
-#if defined(PPI_CONFIG_LOG_ENABLED)
-#undef NRFX_PPI_CONFIG_LOG_ENABLED
-#define NRFX_PPI_CONFIG_LOG_ENABLED PPI_CONFIG_LOG_ENABLED
-#endif
-#if defined(PPI_CONFIG_LOG_LEVEL)
-#undef NRFX_PPI_CONFIG_LOG_LEVEL
-#define NRFX_PPI_CONFIG_LOG_LEVEL PPI_CONFIG_LOG_LEVEL
-#endif
-#if defined(PPI_CONFIG_INFO_COLOR)
-#undef NRFX_PPI_CONFIG_INFO_COLOR
-#define NRFX_PPI_CONFIG_INFO_COLOR PPI_CONFIG_INFO_COLOR
-#endif
-#if defined(PPI_CONFIG_DEBUG_COLOR)
-#undef NRFX_PPI_CONFIG_DEBUG_COLOR
-#define NRFX_PPI_CONFIG_DEBUG_COLOR PPI_CONFIG_DEBUG_COLOR
-#endif
-
-#endif // defined(PPI_ENABLED)
-
-//------------------------------------------------------------------------------
-// PWM
-
-#if defined(PWM_ENABLED)
-
-#undef NRFX_PWM_ENABLED
-#define NRFX_PWM_ENABLED PWM_ENABLED
-
-#if defined(PWM0_ENABLED)
-#undef NRFX_PWM0_ENABLED
-#define NRFX_PWM0_ENABLED PWM0_ENABLED
-#endif
-#if defined(PWM1_ENABLED)
-#undef NRFX_PWM1_ENABLED
-#define NRFX_PWM1_ENABLED PWM1_ENABLED
-#endif
-#if defined(PWM2_ENABLED)
-#undef NRFX_PWM2_ENABLED
-#define NRFX_PWM2_ENABLED PWM2_ENABLED
-#endif
-#if defined(PWM3_ENABLED)
-#undef NRFX_PWM3_ENABLED
-#define NRFX_PWM3_ENABLED PWM3_ENABLED
-#endif
-
-#if defined(PWM_DEFAULT_CONFIG_OUT0_PIN)
-#undef NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN
-#define NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN PWM_DEFAULT_CONFIG_OUT0_PIN
-#endif
-#if defined(PWM_DEFAULT_CONFIG_OUT1_PIN)
-#undef NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN
-#define NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN PWM_DEFAULT_CONFIG_OUT1_PIN
-#endif
-#if defined(PWM_DEFAULT_CONFIG_OUT2_PIN)
-#undef NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN
-#define NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN PWM_DEFAULT_CONFIG_OUT2_PIN
-#endif
-#if defined(PWM_DEFAULT_CONFIG_OUT3_PIN)
-#undef NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN
-#define NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN PWM_DEFAULT_CONFIG_OUT3_PIN
-#endif
-#if defined(PWM_DEFAULT_CONFIG_BASE_CLOCK)
-#undef NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK
-#define NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK PWM_DEFAULT_CONFIG_BASE_CLOCK
-#endif
-#if defined(PWM_DEFAULT_CONFIG_COUNT_MODE)
-#undef NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE
-#define NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE PWM_DEFAULT_CONFIG_COUNT_MODE
-#endif
-#if defined(PWM_DEFAULT_CONFIG_TOP_VALUE)
-#undef NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE
-#define NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE PWM_DEFAULT_CONFIG_TOP_VALUE
-#endif
-#if defined(PWM_DEFAULT_CONFIG_LOAD_MODE)
-#undef NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE
-#define NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE PWM_DEFAULT_CONFIG_LOAD_MODE
-#endif
-#if defined(PWM_DEFAULT_CONFIG_STEP_MODE)
-#undef NRFX_PWM_DEFAULT_CONFIG_STEP_MODE
-#define NRFX_PWM_DEFAULT_CONFIG_STEP_MODE PWM_DEFAULT_CONFIG_STEP_MODE
-#endif
-#if defined(PWM_DEFAULT_CONFIG_IRQ_PRIORITY)
-#undef NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY
-#define NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY PWM_DEFAULT_CONFIG_IRQ_PRIORITY
-#endif
-
-#if defined(PWM_CONFIG_LOG_ENABLED)
-#undef NRFX_PWM_CONFIG_LOG_ENABLED
-#define NRFX_PWM_CONFIG_LOG_ENABLED PWM_CONFIG_LOG_ENABLED
-#endif
-#if defined(PWM_CONFIG_LOG_LEVEL)
-#undef NRFX_PWM_CONFIG_LOG_LEVEL
-#define NRFX_PWM_CONFIG_LOG_LEVEL PWM_CONFIG_LOG_LEVEL
-#endif
-#if defined(PWM_CONFIG_INFO_COLOR)
-#undef NRFX_PWM_CONFIG_INFO_COLOR
-#define NRFX_PWM_CONFIG_INFO_COLOR PWM_CONFIG_INFO_COLOR
-#endif
-#if defined(PWM_CONFIG_DEBUG_COLOR)
-#undef NRFX_PWM_CONFIG_DEBUG_COLOR
-#define NRFX_PWM_CONFIG_DEBUG_COLOR PWM_CONFIG_DEBUG_COLOR
-#endif
-
-#if defined(PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED)
-#undef NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED
-#define NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED
-#endif
-#if defined(PWM_NRF52_ANOMALY_109_EGU_INSTANCE)
-#undef NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE
-#define NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE PWM_NRF52_ANOMALY_109_EGU_INSTANCE
-#endif
-
-#endif // defined(PWM_ENABLED)
-
-//------------------------------------------------------------------------------
-// QDEC
-
-#if defined(QDEC_ENABLED)
-
-#undef NRFX_QDEC_ENABLED
-#define NRFX_QDEC_ENABLED QDEC_ENABLED
-
-#if defined(QDEC_CONFIG_REPORTPER)
-#undef NRFX_QDEC_CONFIG_REPORTPER
-#define NRFX_QDEC_CONFIG_REPORTPER QDEC_CONFIG_REPORTPER
-#endif
-#if defined(QDEC_CONFIG_SAMPLEPER)
-#undef NRFX_QDEC_CONFIG_SAMPLEPER
-#define NRFX_QDEC_CONFIG_SAMPLEPER QDEC_CONFIG_SAMPLEPER
-#endif
-#if defined(QDEC_CONFIG_PIO_A)
-#undef NRFX_QDEC_CONFIG_PIO_A
-#define NRFX_QDEC_CONFIG_PIO_A QDEC_CONFIG_PIO_A
-#endif
-#if defined(QDEC_CONFIG_PIO_B)
-#undef NRFX_QDEC_CONFIG_PIO_B
-#define NRFX_QDEC_CONFIG_PIO_B QDEC_CONFIG_PIO_B
-#endif
-#if defined(QDEC_CONFIG_PIO_LED)
-#undef NRFX_QDEC_CONFIG_PIO_LED
-#define NRFX_QDEC_CONFIG_PIO_LED QDEC_CONFIG_PIO_LED
-#endif
-#if defined(QDEC_CONFIG_LEDPRE)
-#undef NRFX_QDEC_CONFIG_LEDPRE
-#define NRFX_QDEC_CONFIG_LEDPRE QDEC_CONFIG_LEDPRE
-#endif
-#if defined(QDEC_CONFIG_LEDPOL)
-#undef NRFX_QDEC_CONFIG_LEDPOL
-#define NRFX_QDEC_CONFIG_LEDPOL QDEC_CONFIG_LEDPOL
-#endif
-#if defined(QDEC_CONFIG_DBFEN)
-#undef NRFX_QDEC_CONFIG_DBFEN
-#define NRFX_QDEC_CONFIG_DBFEN QDEC_CONFIG_DBFEN
-#endif
-#if defined(QDEC_CONFIG_SAMPLE_INTEN)
-#undef NRFX_QDEC_CONFIG_SAMPLE_INTEN
-#define NRFX_QDEC_CONFIG_SAMPLE_INTEN QDEC_CONFIG_SAMPLE_INTEN
-#endif
-#if defined(QDEC_CONFIG_IRQ_PRIORITY)
-#undef NRFX_QDEC_CONFIG_IRQ_PRIORITY
-#define NRFX_QDEC_CONFIG_IRQ_PRIORITY QDEC_CONFIG_IRQ_PRIORITY
-#endif
-
-#if defined(QDEC_CONFIG_LOG_ENABLED)
-#undef NRFX_QDEC_CONFIG_LOG_ENABLED
-#define NRFX_QDEC_CONFIG_LOG_ENABLED QDEC_CONFIG_LOG_ENABLED
-#endif
-#if defined(QDEC_CONFIG_LOG_LEVEL)
-#undef NRFX_QDEC_CONFIG_LOG_LEVEL
-#define NRFX_QDEC_CONFIG_LOG_LEVEL QDEC_CONFIG_LOG_LEVEL
-#endif
-#if defined(QDEC_CONFIG_INFO_COLOR)
-#undef NRFX_QDEC_CONFIG_INFO_COLOR
-#define NRFX_QDEC_CONFIG_INFO_COLOR QDEC_CONFIG_INFO_COLOR
-#endif
-#if defined(QDEC_CONFIG_DEBUG_COLOR)
-#undef NRFX_QDEC_CONFIG_DEBUG_COLOR
-#define NRFX_QDEC_CONFIG_DEBUG_COLOR QDEC_CONFIG_DEBUG_COLOR
-#endif
-
-#endif // defined(QDEC_ENABLED)
-
-//------------------------------------------------------------------------------
-// QSPI
-
-#if defined(QSPI_ENABLED)
-
-#undef NRFX_QSPI_ENABLED
-#define NRFX_QSPI_ENABLED QSPI_ENABLED
-
-#if defined(QSPI_CONFIG_SCK_DELAY)
-#undef NRFX_QSPI_CONFIG_SCK_DELAY
-#define NRFX_QSPI_CONFIG_SCK_DELAY QSPI_CONFIG_SCK_DELAY
-#endif
-#if defined(QSPI_CONFIG_XIP_OFFSET)
-#undef NRFX_QSPI_CONFIG_XIP_OFFSET
-#define NRFX_QSPI_CONFIG_XIP_OFFSET QSPI_CONFIG_XIP_OFFSET
-#endif
-#if defined(QSPI_CONFIG_READOC)
-#undef NRFX_QSPI_CONFIG_READOC
-#define NRFX_QSPI_CONFIG_READOC QSPI_CONFIG_READOC
-#endif
-#if defined(QSPI_CONFIG_WRITEOC)
-#undef NRFX_QSPI_CONFIG_WRITEOC
-#define NRFX_QSPI_CONFIG_WRITEOC QSPI_CONFIG_WRITEOC
-#endif
-#if defined(QSPI_CONFIG_ADDRMODE)
-#undef NRFX_QSPI_CONFIG_ADDRMODE
-#define NRFX_QSPI_CONFIG_ADDRMODE QSPI_CONFIG_ADDRMODE
-#endif
-#if defined(QSPI_CONFIG_MODE)
-#undef NRFX_QSPI_CONFIG_MODE
-#define NRFX_QSPI_CONFIG_MODE QSPI_CONFIG_MODE
-#endif
-#if defined(QSPI_CONFIG_FREQUENCY)
-#undef NRFX_QSPI_CONFIG_FREQUENCY
-#define NRFX_QSPI_CONFIG_FREQUENCY QSPI_CONFIG_FREQUENCY
-#endif
-#if defined(QSPI_CONFIG_IRQ_PRIORITY)
-#undef NRFX_QSPI_CONFIG_IRQ_PRIORITY
-#define NRFX_QSPI_CONFIG_IRQ_PRIORITY QSPI_CONFIG_IRQ_PRIORITY
-#endif
-
-#if defined(QSPI_PIN_SCK)
-#undef NRFX_QSPI_PIN_SCK
-#define NRFX_QSPI_PIN_SCK QSPI_PIN_SCK
-#endif
-#if defined(QSPI_PIN_CSN)
-#undef NRFX_QSPI_PIN_CSN
-#define NRFX_QSPI_PIN_CSN QSPI_PIN_CSN
-#endif
-#if defined(QSPI_PIN_IO0)
-#undef NRFX_QSPI_PIN_IO0
-#define NRFX_QSPI_PIN_IO0 QSPI_PIN_IO0
-#endif
-#if defined(QSPI_PIN_IO0)
-#undef NRFX_QSPI_PIN_IO0
-#define NRFX_QSPI_PIN_IO0 QSPI_PIN_IO0
-#endif
-#if defined(QSPI_PIN_IO1)
-#undef NRFX_QSPI_PIN_IO1
-#define NRFX_QSPI_PIN_IO1 QSPI_PIN_IO1
-#endif
-#if defined(QSPI_PIN_IO2)
-#undef NRFX_QSPI_PIN_IO2
-#define NRFX_QSPI_PIN_IO2 QSPI_PIN_IO2
-#endif
-#if defined(QSPI_PIN_IO3)
-#undef NRFX_QSPI_PIN_IO3
-#define NRFX_QSPI_PIN_IO3 QSPI_PIN_IO3
-#endif
-
-#endif // defined(QSPI_ENABLED)
-
-//------------------------------------------------------------------------------
-// RNG
-
-#if defined(RNG_ENABLED)
-
-#undef NRFX_RNG_ENABLED
-#define NRFX_RNG_ENABLED RNG_ENABLED
-
-#if defined(RNG_CONFIG_ERROR_CORRECTION)
-#undef NRFX_RNG_CONFIG_ERROR_CORRECTION
-#define NRFX_RNG_CONFIG_ERROR_CORRECTION RNG_CONFIG_ERROR_CORRECTION
-#endif
-
-#if defined(RNG_CONFIG_IRQ_PRIORITY)
-#undef NRFX_RNG_CONFIG_IRQ_PRIORITY
-#define NRFX_RNG_CONFIG_IRQ_PRIORITY RNG_CONFIG_IRQ_PRIORITY
-#endif
-
-#if defined(RNG_CONFIG_LOG_ENABLED)
-#undef NRFX_RNG_CONFIG_LOG_ENABLED
-#define NRFX_RNG_CONFIG_LOG_ENABLED RNG_CONFIG_LOG_ENABLED
-#endif
-#if defined(RNG_CONFIG_LOG_LEVEL)
-#undef NRFX_RNG_CONFIG_LOG_LEVEL
-#define NRFX_RNG_CONFIG_LOG_LEVEL RNG_CONFIG_LOG_LEVEL
-#endif
-#if defined(RNG_CONFIG_INFO_COLOR)
-#undef NRFX_RNG_CONFIG_INFO_COLOR
-#define NRFX_RNG_CONFIG_INFO_COLOR RNG_CONFIG_INFO_COLOR
-#endif
-#if defined(RNG_CONFIG_DEBUG_COLOR)
-#undef NRFX_RNG_CONFIG_DEBUG_COLOR
-#define NRFX_RNG_CONFIG_DEBUG_COLOR RNG_CONFIG_DEBUG_COLOR
-#endif
-
-#endif // defined(RNG_ENABLED)
-
-//------------------------------------------------------------------------------
-// RTC
-
-#if defined(RTC_ENABLED)
-
-#undef NRFX_RTC_ENABLED
-#define NRFX_RTC_ENABLED RTC_ENABLED
-
-#if defined(RTC0_ENABLED)
-#undef NRFX_RTC0_ENABLED
-#define NRFX_RTC0_ENABLED RTC0_ENABLED
-#endif
-#if defined(RTC1_ENABLED)
-#undef NRFX_RTC1_ENABLED
-#define NRFX_RTC1_ENABLED RTC1_ENABLED
-#endif
-#if defined(RTC2_ENABLED)
-#undef NRFX_RTC2_ENABLED
-#define NRFX_RTC2_ENABLED RTC2_ENABLED
-#endif
-
-#if defined(RTC_DEFAULT_CONFIG_FREQUENCY)
-#undef NRFX_RTC_DEFAULT_CONFIG_FREQUENCY
-#define NRFX_RTC_DEFAULT_CONFIG_FREQUENCY RTC_DEFAULT_CONFIG_FREQUENCY
-#endif
-#if defined(RTC_DEFAULT_CONFIG_RELIABLE)
-#undef NRFX_RTC_DEFAULT_CONFIG_RELIABLE
-#define NRFX_RTC_DEFAULT_CONFIG_RELIABLE RTC_DEFAULT_CONFIG_RELIABLE
-#endif
-#if defined(RTC_DEFAULT_CONFIG_IRQ_PRIORITY)
-#undef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY
-#define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY RTC_DEFAULT_CONFIG_IRQ_PRIORITY
-#endif
-
-#if defined(NRF_MAXIMUM_LATENCY_US)
-#undef NRFX_RTC_MAXIMUM_LATENCY_US
-#define NRFX_RTC_MAXIMUM_LATENCY_US NRF_MAXIMUM_LATENCY_US
-#endif
-
-#if defined(RTC_CONFIG_LOG_ENABLED)
-#undef NRFX_RTC_CONFIG_LOG_ENABLED
-#define NRFX_RTC_CONFIG_LOG_ENABLED RTC_CONFIG_LOG_ENABLED
-#endif
-#if defined(RTC_CONFIG_LOG_LEVEL)
-#undef NRFX_RTC_CONFIG_LOG_LEVEL
-#define NRFX_RTC_CONFIG_LOG_LEVEL RTC_CONFIG_LOG_LEVEL
-#endif
-#if defined(RTC_CONFIG_INFO_COLOR)
-#undef NRFX_RTC_CONFIG_INFO_COLOR
-#define NRFX_RTC_CONFIG_INFO_COLOR RTC_CONFIG_INFO_COLOR
-#endif
-#if defined(RTC_CONFIG_DEBUG_COLOR)
-#undef NRFX_RTC_CONFIG_DEBUG_COLOR
-#define NRFX_RTC_CONFIG_DEBUG_COLOR RTC_CONFIG_DEBUG_COLOR
-#endif
-
-#endif // defined(RTC_ENABLED)
-
-//------------------------------------------------------------------------------
-// SAADC
-
-#if defined(SAADC_ENABLED)
-
-#undef NRFX_SAADC_ENABLED
-#define NRFX_SAADC_ENABLED SAADC_ENABLED
-
-#if defined(SAADC_CONFIG_RESOLUTION)
-#undef NRFX_SAADC_CONFIG_RESOLUTION
-#define NRFX_SAADC_CONFIG_RESOLUTION SAADC_CONFIG_RESOLUTION
-#endif
-#if defined(SAADC_CONFIG_OVERSAMPLE)
-#undef NRFX_SAADC_CONFIG_OVERSAMPLE
-#define NRFX_SAADC_CONFIG_OVERSAMPLE SAADC_CONFIG_OVERSAMPLE
-#endif
-#if defined(SAADC_CONFIG_LP_MODE)
-#undef NRFX_SAADC_CONFIG_LP_MODE
-#define NRFX_SAADC_CONFIG_LP_MODE SAADC_CONFIG_LP_MODE
-#endif
-#if defined(SAADC_CONFIG_IRQ_PRIORITY)
-#undef NRFX_SAADC_CONFIG_IRQ_PRIORITY
-#define NRFX_SAADC_CONFIG_IRQ_PRIORITY SAADC_CONFIG_IRQ_PRIORITY
-#endif
-
-#if defined(SAADC_CONFIG_LOG_ENABLED)
-#undef NRFX_SAADC_CONFIG_LOG_ENABLED
-#define NRFX_SAADC_CONFIG_LOG_ENABLED SAADC_CONFIG_LOG_ENABLED
-#endif
-#if defined(SAADC_CONFIG_LOG_LEVEL)
-#undef NRFX_SAADC_CONFIG_LOG_LEVEL
-#define NRFX_SAADC_CONFIG_LOG_LEVEL SAADC_CONFIG_LOG_LEVEL
-#endif
-#if defined(SAADC_CONFIG_INFO_COLOR)
-#undef NRFX_SAADC_CONFIG_INFO_COLOR
-#define NRFX_SAADC_CONFIG_INFO_COLOR SAADC_CONFIG_INFO_COLOR
-#endif
-#if defined(SAADC_CONFIG_DEBUG_COLOR)
-#undef NRFX_SAADC_CONFIG_DEBUG_COLOR
-#define NRFX_SAADC_CONFIG_DEBUG_COLOR SAADC_CONFIG_DEBUG_COLOR
-#endif
-
-#endif // defined(SAADC_ENABLED)
-
-//------------------------------------------------------------------------------
-// SPI
-
-#if defined(SPI_ENABLED)
-
-#undef NRFX_SPI_ENABLED
-#define NRFX_SPI_ENABLED \
- (SPI_ENABLED && (NRFX_SPI0_ENABLED || NRFX_SPI1_ENABLED || NRFX_SPI2_ENABLED))
-#undef NRFX_SPIM_ENABLED
-#define NRFX_SPIM_ENABLED \
- (SPI_ENABLED && (NRFX_SPIM0_ENABLED || NRFX_SPIM1_ENABLED || NRFX_SPIM2_ENABLED))
-
-#if defined(SPI_PRESENT) && !defined(SPIM_PRESENT)
-
-#undef NRFX_SPI0_ENABLED
-#define NRFX_SPI0_ENABLED SPI0_ENABLED
-#undef NRFX_SPIM0_ENABLED
-#define NRFX_SPIM0_ENABLED 0
-
-#undef NRFX_SPI1_ENABLED
-#define NRFX_SPI1_ENABLED SPI1_ENABLED
-#undef NRFX_SPIM1_ENABLED
-#define NRFX_SPIM1_ENABLED 0
-
-#undef NRFX_SPI2_ENABLED
-#define NRFX_SPI2_ENABLED SPI2_ENABLED
-#undef NRFX_SPIM2_ENABLED
-#define NRFX_SPIM2_ENABLED 0
-
-#elif !defined(SPI_PRESENT) && defined(SPIM_PRESENT)
-
-#undef NRFX_SPI0_ENABLED
-#define NRFX_SPI0_ENABLED 0
-#undef NRFX_SPIM0_ENABLED
-#define NRFX_SPIM0_ENABLED SPI0_ENABLED
-
-#undef NRFX_SPI1_ENABLED
-#define NRFX_SPI1_ENABLED 0
-#undef NRFX_SPIM1_ENABLED
-#define NRFX_SPIM1_ENABLED SPI1_ENABLED
-
-#undef NRFX_SPI2_ENABLED
-#define NRFX_SPI2_ENABLED 0
-#undef NRFX_SPIM2_ENABLED
-#define NRFX_SPIM2_ENABLED SPI2_ENABLED
-
-#else // -> defined(SPI_PRESENT) && defined(SPIM_PRESENT)
-
-#undef NRFX_SPI0_ENABLED
-#define NRFX_SPI0_ENABLED (SPI0_ENABLED && !SPI0_USE_EASY_DMA)
-#undef NRFX_SPIM0_ENABLED
-#define NRFX_SPIM0_ENABLED (SPI0_ENABLED && SPI0_USE_EASY_DMA)
-
-#undef NRFX_SPI1_ENABLED
-#define NRFX_SPI1_ENABLED (SPI1_ENABLED && !SPI1_USE_EASY_DMA)
-#undef NRFX_SPIM1_ENABLED
-#define NRFX_SPIM1_ENABLED (SPI1_ENABLED && SPI1_USE_EASY_DMA)
-
-#undef NRFX_SPI2_ENABLED
-#define NRFX_SPI2_ENABLED (SPI2_ENABLED && !SPI2_USE_EASY_DMA)
-#undef NRFX_SPIM2_ENABLED
-#define NRFX_SPIM2_ENABLED (SPI2_ENABLED && SPI2_USE_EASY_DMA)
-
-#endif // -> defined(SPI_PRESENT) && defined(SPIM_PRESENT)
-
-#if defined(NRF_SPI_DRV_MISO_PULLUP_CFG)
-#undef NRFX_SPI_MISO_PULL_CFG
-#define NRFX_SPI_MISO_PULL_CFG NRF_SPI_DRV_MISO_PULLUP_CFG
-#undef NRFX_SPIM_MISO_PULL_CFG
-#define NRFX_SPIM_MISO_PULL_CFG NRF_SPI_DRV_MISO_PULLUP_CFG
-#endif
-
-#if defined(SPI_DEFAULT_CONFIG_IRQ_PRIORITY)
-#undef NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY
-#define NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY SPI_DEFAULT_CONFIG_IRQ_PRIORITY
-#undef NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY
-#define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY SPI_DEFAULT_CONFIG_IRQ_PRIORITY
-#endif
-
-#if defined(SPI_CONFIG_LOG_ENABLED)
-#undef NRFX_SPI_CONFIG_LOG_ENABLED
-#define NRFX_SPI_CONFIG_LOG_ENABLED SPI_CONFIG_LOG_ENABLED
-#undef NRFX_SPIM_CONFIG_LOG_ENABLED
-#define NRFX_SPIM_CONFIG_LOG_ENABLED SPI_CONFIG_LOG_ENABLED
-#endif
-#if defined(SPI_CONFIG_LOG_LEVEL)
-#undef NRFX_SPI_CONFIG_LOG_LEVEL
-#define NRFX_SPI_CONFIG_LOG_LEVEL SPI_CONFIG_LOG_LEVEL
-#undef NRFX_SPIM_CONFIG_LOG_LEVEL
-#define NRFX_SPIM_CONFIG_LOG_LEVEL SPI_CONFIG_LOG_LEVEL
-#endif
-#if defined(SPI_CONFIG_INFO_COLOR)
-#undef NRFX_SPI_CONFIG_INFO_COLOR
-#define NRFX_SPI_CONFIG_INFO_COLOR SPI_CONFIG_INFO_COLOR
-#undef NRFX_SPIM_CONFIG_INFO_COLOR
-#define NRFX_SPIM_CONFIG_INFO_COLOR SPI_CONFIG_INFO_COLOR
-#endif
-#if defined(SPI_CONFIG_DEBUG_COLOR)
-#undef NRFX_SPI_CONFIG_DEBUG_COLOR
-#define NRFX_SPI_CONFIG_DEBUG_COLOR SPI_CONFIG_DEBUG_COLOR
-#undef NRFX_SPIM_CONFIG_DEBUG_COLOR
-#define NRFX_SPIM_CONFIG_DEBUG_COLOR SPI_CONFIG_DEBUG_COLOR
-#endif
-
-#if defined(SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED)
-#undef NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED
-#define NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED
-#endif
-
-#endif // defined(SPI_ENABLED)
-
-//------------------------------------------------------------------------------
-// SPIS
-
-#if defined(SPIS_ENABLED)
-
-#undef NRFX_SPIS_ENABLED
-#define NRFX_SPIS_ENABLED SPIS_ENABLED
-
-#if defined(SPIS0_ENABLED)
-#undef NRFX_SPIS0_ENABLED
-#define NRFX_SPIS0_ENABLED SPIS0_ENABLED
-#endif
-#if defined(SPIS1_ENABLED)
-#undef NRFX_SPIS1_ENABLED
-#define NRFX_SPIS1_ENABLED SPIS1_ENABLED
-#endif
-#if defined(SPIS2_ENABLED)
-#undef NRFX_SPIS2_ENABLED
-#define NRFX_SPIS2_ENABLED SPIS2_ENABLED
-#endif
-
-#if defined(SPIS_DEFAULT_CONFIG_IRQ_PRIORITY)
-#undef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY
-#define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY SPIS_DEFAULT_CONFIG_IRQ_PRIORITY
-#endif
-#if defined(SPIS_DEFAULT_MODE)
-#undef NRFX_SPIS_DEFAULT_MODE
-#define NRFX_SPIS_DEFAULT_MODE SPIS_DEFAULT_MODE
-#endif
-#if defined(SPIS_DEFAULT_BIT_ORDER)
-#undef NRFX_SPIS_DEFAULT_BIT_ORDER
-#define NRFX_SPIS_DEFAULT_BIT_ORDER SPIS_DEFAULT_BIT_ORDER
-#endif
-#if defined(SPIS_DEFAULT_DEF)
-#undef NRFX_SPIS_DEFAULT_DEF
-#define NRFX_SPIS_DEFAULT_DEF SPIS_DEFAULT_DEF
-#endif
-#if defined(SPIS_DEFAULT_ORC)
-#undef NRFX_SPIS_DEFAULT_ORC
-#define NRFX_SPIS_DEFAULT_ORC SPIS_DEFAULT_ORC
-#endif
-
-#if defined(SPIS_CONFIG_LOG_ENABLED)
-#undef NRFX_SPIS_CONFIG_LOG_ENABLED
-#define NRFX_SPIS_CONFIG_LOG_ENABLED SPIS_CONFIG_LOG_ENABLED
-#endif
-#if defined(SPIS_CONFIG_LOG_LEVEL)
-#undef NRFX_SPIS_CONFIG_LOG_LEVEL
-#define NRFX_SPIS_CONFIG_LOG_LEVEL SPIS_CONFIG_LOG_LEVEL
-#endif
-#if defined(SPIS_CONFIG_INFO_COLOR)
-#undef NRFX_SPIS_CONFIG_INFO_COLOR
-#define NRFX_SPIS_CONFIG_INFO_COLOR SPIS_CONFIG_INFO_COLOR
-#endif
-#if defined(SPIS_CONFIG_DEBUG_COLOR)
-#undef NRFX_SPIS_CONFIG_DEBUG_COLOR
-#define NRFX_SPIS_CONFIG_DEBUG_COLOR SPIS_CONFIG_DEBUG_COLOR
-#endif
-
-#if defined(SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED)
-#undef NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED
-#define NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED
-#endif
-
-#endif // defined(SPIS_ENABLED)
-
-//------------------------------------------------------------------------------
-// SWI
-
-#if defined(SWI_DISABLE0)
-#undef NRFX_SWI0_DISABLED
-#define NRFX_SWI0_DISABLED 1
-#endif
-#if defined(SWI_DISABLE1)
-#undef NRFX_SWI1_DISABLED
-#define NRFX_SWI1_DISABLED 1
-#endif
-#if defined(SWI_DISABLE2)
-#undef NRFX_SWI2_DISABLED
-#define NRFX_SWI2_DISABLED 1
-#endif
-#if defined(SWI_DISABLE3)
-#undef NRFX_SWI3_DISABLED
-#define NRFX_SWI3_DISABLED 1
-#endif
-#if defined(SWI_DISABLE4)
-#undef NRFX_SWI4_DISABLED
-#define NRFX_SWI4_DISABLED 1
-#endif
-#if defined(SWI_DISABLE5)
-#undef NRFX_SWI5_DISABLED
-#define NRFX_SWI5_DISABLED 1
-#endif
-
-#if defined(EGU_ENABLED)
-#undef NRFX_EGU_ENABLED
-#define NRFX_EGU_ENABLED EGU_ENABLED
-#endif
-
-#if defined(SWI_CONFIG_LOG_ENABLED)
-#undef NRFX_SWI_CONFIG_LOG_ENABLED
-#define NRFX_SWI_CONFIG_LOG_ENABLED SWI_CONFIG_LOG_ENABLED
-#endif
-#if defined(SWI_CONFIG_LOG_LEVEL)
-#undef NRFX_SWI_CONFIG_LOG_LEVEL
-#define NRFX_SWI_CONFIG_LOG_LEVEL SWI_CONFIG_LOG_LEVEL
-#endif
-#if defined(SWI_CONFIG_INFO_COLOR)
-#undef NRFX_SWI_CONFIG_INFO_COLOR
-#define NRFX_SWI_CONFIG_INFO_COLOR SWI_CONFIG_INFO_COLOR
-#endif
-#if defined(SWI_CONFIG_DEBUG_COLOR)
-#undef NRFX_SWI_CONFIG_DEBUG_COLOR
-#define NRFX_SWI_CONFIG_DEBUG_COLOR SWI_CONFIG_DEBUG_COLOR
-#endif
-
-//------------------------------------------------------------------------------
-// SysTick
-
-#if defined(SYSTICK_ENABLED)
-
-#undef NRFX_SYSTICK_ENABLED
-#define NRFX_SYSTICK_ENABLED SYSTICK_ENABLED
-
-#endif // defined(SYSTICK_ENABLED)
-
-//------------------------------------------------------------------------------
-// TIMER
-
-#if defined(TIMER_ENABLED)
-
-#undef NRFX_TIMER_ENABLED
-#define NRFX_TIMER_ENABLED TIMER_ENABLED
-
-#if defined(TIMER0_ENABLED)
-#undef NRFX_TIMER0_ENABLED
-#define NRFX_TIMER0_ENABLED TIMER0_ENABLED
-#endif
-#if defined(TIMER1_ENABLED)
-#undef NRFX_TIMER1_ENABLED
-#define NRFX_TIMER1_ENABLED TIMER1_ENABLED
-#endif
-#if defined(TIMER2_ENABLED)
-#undef NRFX_TIMER2_ENABLED
-#define NRFX_TIMER2_ENABLED TIMER2_ENABLED
-#endif
-#if defined(TIMER3_ENABLED)
-#undef NRFX_TIMER3_ENABLED
-#define NRFX_TIMER3_ENABLED TIMER3_ENABLED
-#endif
-#if defined(TIMER4_ENABLED)
-#undef NRFX_TIMER4_ENABLED
-#define NRFX_TIMER4_ENABLED TIMER4_ENABLED
-#endif
-
-#if defined(TIMER_DEFAULT_CONFIG_FREQUENCY)
-#undef NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY
-#define NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY TIMER_DEFAULT_CONFIG_FREQUENCY
-#endif
-#if defined(TIMER_DEFAULT_CONFIG_MODE)
-#undef NRFX_TIMER_DEFAULT_CONFIG_MODE
-#define NRFX_TIMER_DEFAULT_CONFIG_MODE TIMER_DEFAULT_CONFIG_MODE
-#endif
-#if defined(TIMER_DEFAULT_CONFIG_BIT_WIDTH)
-#undef NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH
-#define NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH TIMER_DEFAULT_CONFIG_BIT_WIDTH
-#endif
-#if defined(TIMER_DEFAULT_CONFIG_IRQ_PRIORITY)
-#undef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY
-#define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY TIMER_DEFAULT_CONFIG_IRQ_PRIORITY
-#endif
-
-#if defined(TIMER_CONFIG_LOG_ENABLED)
-#undef NRFX_TIMER_CONFIG_LOG_ENABLED
-#define NRFX_TIMER_CONFIG_LOG_ENABLED TIMER_CONFIG_LOG_ENABLED
-#endif
-#if defined(TIMER_CONFIG_LOG_LEVEL)
-#undef NRFX_TIMER_CONFIG_LOG_LEVEL
-#define NRFX_TIMER_CONFIG_LOG_LEVEL TIMER_CONFIG_LOG_LEVEL
-#endif
-#if defined(TIMER_CONFIG_INFO_COLOR)
-#undef NRFX_TIMER_CONFIG_INFO_COLOR
-#define NRFX_TIMER_CONFIG_INFO_COLOR TIMER_CONFIG_INFO_COLOR
-#endif
-#if defined(TIMER_CONFIG_DEBUG_COLOR)
-#undef NRFX_TIMER_CONFIG_DEBUG_COLOR
-#define NRFX_TIMER_CONFIG_DEBUG_COLOR TIMER_CONFIG_DEBUG_COLOR
-#endif
-
-#endif // defined(TIMER_ENABLED)
-
-//------------------------------------------------------------------------------
-// TWI
-#define TWI_ONLY ( defined(TWI_PRESENT) && !defined(TWIM_PRESENT))
-#define TWIM_ONLY (!defined(TWI_PRESENT) && defined(TWIM_PRESENT))
-#define TWI_AND_TWIM ( defined(TWI_PRESENT) && defined(TWIM_PRESENT))
-
-#if defined(TWI_ENABLED)
-
-#undef NRFX_TWI_ENABLED
-#define NRFX_TWI_ENABLED (TWI_ENABLED && (NRFX_TWI0_ENABLED || NRFX_TWI1_ENABLED))
-#undef NRFX_TWIM_ENABLED
-#define NRFX_TWIM_ENABLED (TWI_ENABLED && (NRFX_TWIM0_ENABLED || NRFX_TWIM1_ENABLED))
-
-#if defined(TWI_PRESENT) && !defined(TWIM_PRESENT)
-
-#undef NRFX_TWI0_ENABLED
-#define NRFX_TWI0_ENABLED TWI0_ENABLED
-#undef NRFX_TWIM0_ENABLED
-#define NRFX_TWIM0_ENABLED 0
-
-#undef NRFX_TWI1_ENABLED
-#define NRFX_TWI1_ENABLED TWI1_ENABLED
-#undef NRFX_TWIM1_ENABLED
-#define NRFX_TWIM1_ENABLED 0
-
-#elif !defined(TWI_PRESENT) && defined(TWIM_PRESENT)
-
-#undef NRFX_TWI0_ENABLED
-#define NRFX_TWI0_ENABLED 0
-#undef NRFX_TWIM0_ENABLED
-#define NRFX_TWIM0_ENABLED TWI0_ENABLED
-
-#undef NRFX_TWI1_ENABLED
-#define NRFX_TWI1_ENABLED 0
-#undef NRFX_TWIM1_ENABLED
-#define NRFX_TWIM1_ENABLED TWI1_ENABLED
-
-#else // -> defined(TWI_PRESENT) && defined(TWIM_PRESENT)
-
-#undef NRFX_TWI0_ENABLED
-#define NRFX_TWI0_ENABLED (TWI0_ENABLED && !TWI0_USE_EASY_DMA)
-#undef NRFX_TWIM0_ENABLED
-#define NRFX_TWIM0_ENABLED (TWI0_ENABLED && TWI0_USE_EASY_DMA)
-
-#undef NRFX_TWI1_ENABLED
-#define NRFX_TWI1_ENABLED (TWI1_ENABLED && !TWI1_USE_EASY_DMA)
-#undef NRFX_TWIM1_ENABLED
-#define NRFX_TWIM1_ENABLED (TWI1_ENABLED && TWI1_USE_EASY_DMA)
-
-#endif // -> defined(TWI_PRESENT) && defined(TWIM_PRESENT)
-
-#if defined(TWI_DEFAULT_CONFIG_FREQUENCY)
-#undef NRFX_TWI_DEFAULT_CONFIG_FREQUENCY
-#define NRFX_TWI_DEFAULT_CONFIG_FREQUENCY TWI_DEFAULT_CONFIG_FREQUENCY
-#undef NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY
-#define NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY TWI_DEFAULT_CONFIG_FREQUENCY
-#endif
-#if defined(TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT)
-#undef NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT
-#define NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT
-#undef NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT
-#define NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT
-#endif
-#if defined(TWI_DEFAULT_CONFIG_IRQ_PRIORITY)
-#undef NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY
-#define NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY TWI_DEFAULT_CONFIG_IRQ_PRIORITY
-#undef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY
-#define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY TWI_DEFAULT_CONFIG_IRQ_PRIORITY
-#endif
-
-#if defined(TWI_CONFIG_LOG_ENABLED)
-#undef NRFX_TWI_CONFIG_LOG_ENABLED
-#define NRFX_TWI_CONFIG_LOG_ENABLED TWI_CONFIG_LOG_ENABLED
-#undef NRFX_TWIM_CONFIG_LOG_ENABLED
-#define NRFX_TWIM_CONFIG_LOG_ENABLED TWI_CONFIG_LOG_ENABLED
-#endif
-#if defined(TWI_CONFIG_LOG_LEVEL)
-#undef NRFX_TWI_CONFIG_LOG_LEVEL
-#define NRFX_TWI_CONFIG_LOG_LEVEL TWI_CONFIG_LOG_LEVEL
-#undef NRFX_TWIM_CONFIG_LOG_LEVEL
-#define NRFX_TWIM_CONFIG_LOG_LEVEL TWI_CONFIG_LOG_LEVEL
-#endif
-#if defined(TWI_CONFIG_INFO_COLOR)
-#undef NRFX_TWI_CONFIG_INFO_COLOR
-#define NRFX_TWI_CONFIG_INFO_COLOR TWI_CONFIG_INFO_COLOR
-#undef NRFX_TWIM_CONFIG_INFO_COLOR
-#define NRFX_TWIM_CONFIG_INFO_COLOR TWI_CONFIG_INFO_COLOR
-#endif
-#if defined(TWI_CONFIG_DEBUG_COLOR)
-#undef NRFX_TWI_CONFIG_DEBUG_COLOR
-#define NRFX_TWI_CONFIG_DEBUG_COLOR TWI_CONFIG_DEBUG_COLOR
-#undef NRFX_TWIM_CONFIG_DEBUG_COLOR
-#define NRFX_TWIM_CONFIG_DEBUG_COLOR TWI_CONFIG_DEBUG_COLOR
-#endif
-
-#if defined(TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED)
-#undef NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED
-#define NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED
-#endif
-
-#endif // defined(TWI_ENABLED)
-
-//------------------------------------------------------------------------------
-// TWIS
-
-#if defined(TWIS_ENABLED)
-
-#undef NRFX_TWIS_ENABLED
-#define NRFX_TWIS_ENABLED TWIS_ENABLED
-
-#if defined(TWIS0_ENABLED)
-#undef NRFX_TWIS0_ENABLED
-#define NRFX_TWIS0_ENABLED TWIS0_ENABLED
-#endif
-#if defined(TWIS1_ENABLED)
-#undef NRFX_TWIS1_ENABLED
-#define NRFX_TWIS1_ENABLED TWIS1_ENABLED
-#endif
-
-#if defined(TWIS_ASSUME_INIT_AFTER_RESET_ONLY)
-#undef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY
-#define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY TWIS_ASSUME_INIT_AFTER_RESET_ONLY
-#endif
-#if defined(TWIS_NO_SYNC_MODE)
-#undef NRFX_TWIS_NO_SYNC_MODE
-#define NRFX_TWIS_NO_SYNC_MODE TWIS_NO_SYNC_MODE
-#endif
-
-#if defined(TWIS_DEFAULT_CONFIG_ADDR0)
-#undef NRFX_TWIS_DEFAULT_CONFIG_ADDR0
-#define NRFX_TWIS_DEFAULT_CONFIG_ADDR0 TWIS_DEFAULT_CONFIG_ADDR0
-#endif
-#if defined(TWIS_DEFAULT_CONFIG_ADDR1)
-#undef NRFX_TWIS_DEFAULT_CONFIG_ADDR1
-#define NRFX_TWIS_DEFAULT_CONFIG_ADDR1 TWIS_DEFAULT_CONFIG_ADDR1
-#endif
-#if defined(TWIS_DEFAULT_CONFIG_SCL_PULL)
-#undef NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL
-#define NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL TWIS_DEFAULT_CONFIG_SCL_PULL
-#endif
-#if defined(TWIS_DEFAULT_CONFIG_SDA_PULL)
-#undef NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL
-#define NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL TWIS_DEFAULT_CONFIG_SDA_PULL
-#endif
-#if defined(TWIS_DEFAULT_CONFIG_IRQ_PRIORITY)
-#undef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY
-#define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY TWIS_DEFAULT_CONFIG_IRQ_PRIORITY
-#endif
-
-#if defined(TWIS_CONFIG_LOG_ENABLED)
-#undef NRFX_TWIS_CONFIG_LOG_ENABLED
-#define NRFX_TWIS_CONFIG_LOG_ENABLED TWIS_CONFIG_LOG_ENABLED
-#endif
-#if defined(TWIS_CONFIG_LOG_LEVEL)
-#undef NRFX_TWIS_CONFIG_LOG_LEVEL
-#define NRFX_TWIS_CONFIG_LOG_LEVEL TWIS_CONFIG_LOG_LEVEL
-#endif
-#if defined(TWIS_CONFIG_INFO_COLOR)
-#undef NRFX_TWIS_CONFIG_INFO_COLOR
-#define NRFX_TWIS_CONFIG_INFO_COLOR TWIS_CONFIG_INFO_COLOR
-#endif
-#if defined(TWIS_CONFIG_DEBUG_COLOR)
-#undef NRFX_TWIS_CONFIG_DEBUG_COLOR
-#define NRFX_TWIS_CONFIG_DEBUG_COLOR TWIS_CONFIG_DEBUG_COLOR
-#endif
-
-#endif // defined(TWIS_ENABLED)
-
-//------------------------------------------------------------------------------
-// UART
-
-#if defined(UART_ENABLED)
-
-#undef NRFX_UART_ENABLED
-#define NRFX_UART_ENABLED (UART_ENABLED && NRFX_UART0_ENABLED)
-#undef NRFX_UARTE_ENABLED
-#define NRFX_UARTE_ENABLED (UART_ENABLED && (NRFX_UARTE0_ENABLED || NRFX_UARTE1_ENABLED))
-
-#if defined(UART0_ENABLED)
-#undef NRFX_UART0_ENABLED
-#define NRFX_UART0_ENABLED (UART0_ENABLED && UART_LEGACY_SUPPORT)
-#undef NRFX_UARTE0_ENABLED
-#define NRFX_UARTE0_ENABLED (UART0_ENABLED && UART_EASY_DMA_SUPPORT)
-#endif
-#if defined(UART1_ENABLED)
-#undef NRFX_UARTE1_ENABLED
-#define NRFX_UARTE1_ENABLED (UART1_ENABLED && UART_EASY_DMA_SUPPORT)
-#endif
-
-#if defined(UART_DEFAULT_CONFIG_HWFC)
-#undef NRFX_UART_DEFAULT_CONFIG_HWFC
-#define NRFX_UART_DEFAULT_CONFIG_HWFC UART_DEFAULT_CONFIG_HWFC
-#undef NRFX_UARTE_DEFAULT_CONFIG_HWFC
-#define NRFX_UARTE_DEFAULT_CONFIG_HWFC UART_DEFAULT_CONFIG_HWFC
-#endif
-#if defined(UART_DEFAULT_CONFIG_PARITY)
-#undef NRFX_UART_DEFAULT_CONFIG_PARITY
-#define NRFX_UART_DEFAULT_CONFIG_PARITY UART_DEFAULT_CONFIG_PARITY
-#undef NRFX_UARTE_DEFAULT_CONFIG_PARITY
-#define NRFX_UARTE_DEFAULT_CONFIG_PARITY UART_DEFAULT_CONFIG_PARITY
-#endif
-#if defined(UART_DEFAULT_CONFIG_BAUDRATE)
-#undef NRFX_UART_DEFAULT_CONFIG_BAUDRATE
-#define NRFX_UART_DEFAULT_CONFIG_BAUDRATE UART_DEFAULT_CONFIG_BAUDRATE
-#undef NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE
-#define NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE UART_DEFAULT_CONFIG_BAUDRATE
-#endif
-#if defined(UART_DEFAULT_CONFIG_IRQ_PRIORITY)
-#undef NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY
-#define NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY UART_DEFAULT_CONFIG_IRQ_PRIORITY
-#undef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY
-#define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY UART_DEFAULT_CONFIG_IRQ_PRIORITY
-#endif
-
-#if defined(UART_CONFIG_LOG_ENABLED)
-#undef NRFX_UART_CONFIG_LOG_ENABLED
-#define NRFX_UART_CONFIG_LOG_ENABLED UART_CONFIG_LOG_ENABLED
-#undef NRFX_UARTE_CONFIG_LOG_ENABLED
-#define NRFX_UARTE_CONFIG_LOG_ENABLED UART_CONFIG_LOG_ENABLED
-#endif
-#if defined(UART_CONFIG_LOG_LEVEL)
-#undef NRFX_UART_CONFIG_LOG_LEVEL
-#define NRFX_UART_CONFIG_LOG_LEVEL UART_CONFIG_LOG_LEVEL
-#undef NRFX_UARTE_CONFIG_LOG_LEVEL
-#define NRFX_UARTE_CONFIG_LOG_LEVEL UART_CONFIG_LOG_LEVEL
-#endif
-#if defined(UART_CONFIG_INFO_COLOR)
-#undef NRFX_UART_CONFIG_INFO_COLOR
-#define NRFX_UART_CONFIG_INFO_COLOR UART_CONFIG_INFO_COLOR
-#undef NRFX_UARTE_CONFIG_INFO_COLOR
-#define NRFX_UARTE_CONFIG_INFO_COLOR UART_CONFIG_INFO_COLOR
-#endif
-#if defined(UART_CONFIG_DEBUG_COLOR)
-#undef NRFX_UART_CONFIG_DEBUG_COLOR
-#define NRFX_UART_CONFIG_DEBUG_COLOR UART_CONFIG_DEBUG_COLOR
-#undef NRFX_UARTE_CONFIG_DEBUG_COLOR
-#define NRFX_UARTE_CONFIG_DEBUG_COLOR UART_CONFIG_DEBUG_COLOR
-#endif
-
-#endif // defined(UART_ENABLED)
-
-//------------------------------------------------------------------------------
-// WDT
-
-#if defined(WDT_ENABLED)
-
-#undef NRFX_WDT_ENABLED
-#define NRFX_WDT_ENABLED WDT_ENABLED
-
-#if defined(WDT_CONFIG_BEHAVIOUR)
-#undef NRFX_WDT_CONFIG_BEHAVIOUR
-#define NRFX_WDT_CONFIG_BEHAVIOUR WDT_CONFIG_BEHAVIOUR
-#endif
-#if defined(WDT_CONFIG_RELOAD_VALUE)
-#undef NRFX_WDT_CONFIG_RELOAD_VALUE
-#define NRFX_WDT_CONFIG_RELOAD_VALUE WDT_CONFIG_RELOAD_VALUE
-#endif
-#if defined(WDT_CONFIG_IRQ_PRIORITY)
-#undef NRFX_WDT_CONFIG_IRQ_PRIORITY
-#define NRFX_WDT_CONFIG_IRQ_PRIORITY WDT_CONFIG_IRQ_PRIORITY
-#endif
-
-#if defined(WDT_CONFIG_LOG_ENABLED)
-#undef NRFX_WDT_CONFIG_LOG_ENABLED
-#define NRFX_WDT_CONFIG_LOG_ENABLED WDT_CONFIG_LOG_ENABLED
-#endif
-#if defined(WDT_CONFIG_LOG_LEVEL)
-#undef NRFX_WDT_CONFIG_LOG_LEVEL
-#define NRFX_WDT_CONFIG_LOG_LEVEL WDT_CONFIG_LOG_LEVEL
-#endif
-#if defined(WDT_CONFIG_INFO_COLOR)
-#undef NRFX_WDT_CONFIG_INFO_COLOR
-#define NRFX_WDT_CONFIG_INFO_COLOR WDT_CONFIG_INFO_COLOR
-#endif
-#if defined(WDT_CONFIG_DEBUG_COLOR)
-#undef NRFX_WDT_CONFIG_DEBUG_COLOR
-#define NRFX_WDT_CONFIG_DEBUG_COLOR WDT_CONFIG_DEBUG_COLOR
-#endif
-
-#endif // defined(WDT_ENABLED)
-
-#endif // APPLY_OLD_CONFIG_H__
diff --git a/third_party/NordicSemiconductor/dependencies/legacy/apply_old_config.h b/third_party/NordicSemiconductor/dependencies/legacy/apply_old_config.h
new file mode 100644
index 0000000..b371852
--- /dev/null
+++ b/third_party/NordicSemiconductor/dependencies/legacy/apply_old_config.h
@@ -0,0 +1,1391 @@
+/**
+ * Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+
+#ifndef APPLY_OLD_CONFIG_H__
+#define APPLY_OLD_CONFIG_H__
+
+//------------------------------------------------------------------------------
+// Peripheral Resource Sharing (PRS)
+
+#if defined(PERIPHERAL_RESOURCE_SHARING_ENABLED)
+
+#define NRFX_PRS_ENABLED PERIPHERAL_RESOURCE_SHARING_ENABLED
+#define NRFX_PRS_BOX_0_ENABLED PERIPHERAL_RESOURCE_SHARING_ENABLED
+#define NRFX_PRS_BOX_1_ENABLED PERIPHERAL_RESOURCE_SHARING_ENABLED
+#define NRFX_PRS_BOX_2_ENABLED PERIPHERAL_RESOURCE_SHARING_ENABLED
+#define NRFX_PRS_BOX_3_ENABLED PERIPHERAL_RESOURCE_SHARING_ENABLED
+#define NRFX_PRS_BOX_4_ENABLED PERIPHERAL_RESOURCE_SHARING_ENABLED
+
+#if defined(COMMON_CONFIG_LOG_ENABLED)
+#undef NRFX_PRS_CONFIG_LOG_ENABLED
+#define NRFX_PRS_CONFIG_LOG_ENABLED COMMON_CONFIG_LOG_ENABLED
+#endif
+#if defined(COMMON_CONFIG_LOG_LEVEL)
+#undef NRFX_PRS_CONFIG_LOG_LEVEL
+#define NRFX_PRS_CONFIG_LOG_LEVEL COMMON_CONFIG_LOG_LEVEL
+#endif
+#if defined(COMMON_CONFIG_INFO_COLOR)
+#undef NRFX_PRS_CONFIG_INFO_COLOR
+#define NRFX_PRS_CONFIG_INFO_COLOR COMMON_CONFIG_INFO_COLOR
+#endif
+#if defined(COMMON_CONFIG_DEBUG_COLOR)
+#undef NRFX_PRS_CONFIG_DEBUG_COLOR
+#define NRFX_PRS_CONFIG_DEBUG_COLOR COMMON_CONFIG_DEBUG_COLOR
+#endif
+
+#endif // defined(PERIPHERAL_RESOURCE_SHARING_ENABLED)
+
+//------------------------------------------------------------------------------
+// CLOCK
+
+#if defined(NRF_CLOCK_ENABLED)
+
+#if defined(CLOCK_CONFIG_LF_CAL_ENABLED) && defined(CLOCK_CONFIG_LF_SRC)
+#if (CLOCK_CONFIG_LF_SRC == CLOCK_LFCLKSRC_SRC_RC)
+#define NRFX_CLOCK_CONFIG_LF_CAL_ENABLED 1
+#endif
+#endif
+
+#undef NRFX_CLOCK_ENABLED
+#define NRFX_CLOCK_ENABLED NRF_CLOCK_ENABLED
+
+#if defined(CLOCK_CONFIG_LF_SRC)
+#undef NRFX_CLOCK_CONFIG_LF_SRC
+#define NRFX_CLOCK_CONFIG_LF_SRC CLOCK_CONFIG_LF_SRC
+#endif
+#if defined(CLOCK_CONFIG_IRQ_PRIORITY)
+#undef NRFX_CLOCK_CONFIG_IRQ_PRIORITY
+#define NRFX_CLOCK_CONFIG_IRQ_PRIORITY CLOCK_CONFIG_IRQ_PRIORITY
+#endif
+
+#if defined(CLOCK_CONFIG_LOG_ENABLED)
+#undef NRFX_CLOCK_CONFIG_LOG_ENABLED
+#define NRFX_CLOCK_CONFIG_LOG_ENABLED CLOCK_CONFIG_LOG_ENABLED
+#endif
+#if defined(CLOCK_CONFIG_LOG_LEVEL)
+#undef NRFX_CLOCK_CONFIG_LOG_LEVEL
+#define NRFX_CLOCK_CONFIG_LOG_LEVEL CLOCK_CONFIG_LOG_LEVEL
+#endif
+#if defined(CLOCK_CONFIG_INFO_COLOR)
+#undef NRFX_CLOCK_CONFIG_INFO_COLOR
+#define NRFX_CLOCK_CONFIG_INFO_COLOR CLOCK_CONFIG_INFO_COLOR
+#endif
+#if defined(CLOCK_CONFIG_DEBUG_COLOR)
+#undef NRFX_CLOCK_CONFIG_DEBUG_COLOR
+#define NRFX_CLOCK_CONFIG_DEBUG_COLOR CLOCK_CONFIG_DEBUG_COLOR
+#endif
+
+#endif // defined(NRF_CLOCK_ENABLED)
+
+//------------------------------------------------------------------------------
+// COMP
+
+#if defined(COMP_ENABLED)
+
+#undef NRFX_COMP_ENABLED
+#define NRFX_COMP_ENABLED COMP_ENABLED
+
+#if defined(COMP_CONFIG_REF)
+#undef NRFX_COMP_CONFIG_REF
+#define NRFX_COMP_CONFIG_REF COMP_CONFIG_REF
+#endif
+#if defined(COMP_CONFIG_MAIN_MODE)
+#undef NRFX_COMP_CONFIG_MAIN_MODE
+#define NRFX_COMP_CONFIG_MAIN_MODE COMP_CONFIG_MAIN_MODE
+#endif
+#if defined(COMP_CONFIG_SPEED_MODE)
+#undef NRFX_COMP_CONFIG_SPEED_MODE
+#define NRFX_COMP_CONFIG_SPEED_MODE COMP_CONFIG_SPEED_MODE
+#endif
+#if defined(COMP_CONFIG_HYST)
+#undef NRFX_COMP_CONFIG_HYST
+#define NRFX_COMP_CONFIG_HYST COMP_CONFIG_HYST
+#endif
+#if defined(COMP_CONFIG_ISOURCE)
+#undef NRFX_COMP_CONFIG_ISOURCE
+#define NRFX_COMP_CONFIG_ISOURCE COMP_CONFIG_ISOURCE
+#endif
+#if defined(COMP_CONFIG_INPUT)
+#undef NRFX_COMP_CONFIG_INPUT
+#define NRFX_COMP_CONFIG_INPUT COMP_CONFIG_INPUT
+#endif
+#if defined(COMP_CONFIG_IRQ_PRIORITY)
+#undef NRFX_COMP_CONFIG_IRQ_PRIORITY
+#define NRFX_COMP_CONFIG_IRQ_PRIORITY COMP_CONFIG_IRQ_PRIORITY
+#endif
+
+#if defined(COMP_CONFIG_LOG_ENABLED)
+#undef NRFX_COMP_CONFIG_LOG_ENABLED
+#define NRFX_COMP_CONFIG_LOG_ENABLED COMP_CONFIG_LOG_ENABLED
+#endif
+#if defined(COMP_CONFIG_LOG_LEVEL)
+#undef NRFX_COMP_CONFIG_LOG_LEVEL
+#define NRFX_COMP_CONFIG_LOG_LEVEL COMP_CONFIG_LOG_LEVEL
+#endif
+#if defined(COMP_CONFIG_INFO_COLOR)
+#undef NRFX_COMP_CONFIG_INFO_COLOR
+#define NRFX_COMP_CONFIG_INFO_COLOR COMP_CONFIG_INFO_COLOR
+#endif
+#if defined(COMP_CONFIG_DEBUG_COLOR)
+#undef NRFX_COMP_CONFIG_DEBUG_COLOR
+#define NRFX_COMP_CONFIG_DEBUG_COLOR COMP_CONFIG_DEBUG_COLOR
+#endif
+
+#endif // defined(COMP_ENABLED)
+
+//------------------------------------------------------------------------------
+// GPIOTE
+
+#if defined(GPIOTE_ENABLED)
+
+#undef NRFX_GPIOTE_ENABLED
+#define NRFX_GPIOTE_ENABLED GPIOTE_ENABLED
+
+#if defined(GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS)
+#undef NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS
+#define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS
+#endif
+
+#if defined(GPIOTE_CONFIG_IRQ_PRIORITY)
+#undef NRFX_GPIOTE_CONFIG_IRQ_PRIORITY
+#define NRFX_GPIOTE_CONFIG_IRQ_PRIORITY GPIOTE_CONFIG_IRQ_PRIORITY
+#endif
+
+#if defined(GPIOTE_CONFIG_LOG_ENABLED)
+#undef NRFX_GPIOTE_CONFIG_LOG_ENABLED
+#define NRFX_GPIOTE_CONFIG_LOG_ENABLED GPIOTE_CONFIG_LOG_ENABLED
+#endif
+#if defined(GPIOTE_CONFIG_LOG_LEVEL)
+#undef NRFX_GPIOTE_CONFIG_LOG_LEVEL
+#define NRFX_GPIOTE_CONFIG_LOG_LEVEL GPIOTE_CONFIG_LOG_LEVEL
+#endif
+#if defined(GPIOTE_CONFIG_INFO_COLOR)
+#undef NRFX_GPIOTE_CONFIG_INFO_COLOR
+#define NRFX_GPIOTE_CONFIG_INFO_COLOR GPIOTE_CONFIG_INFO_COLOR
+#endif
+#if defined(GPIOTE_CONFIG_DEBUG_COLOR)
+#undef NRFX_GPIOTE_CONFIG_DEBUG_COLOR
+#define NRFX_GPIOTE_CONFIG_DEBUG_COLOR GPIOTE_CONFIG_DEBUG_COLOR
+#endif
+
+#endif // defined(GPIOTE_ENABLED)
+
+//------------------------------------------------------------------------------
+// I2S
+
+#if defined(I2S_ENABLED)
+
+#undef NRFX_I2S_ENABLED
+#define NRFX_I2S_ENABLED I2S_ENABLED
+
+#if defined(I2S_CONFIG_SCK_PIN)
+#undef NRFX_I2S_CONFIG_SCK_PIN
+#define NRFX_I2S_CONFIG_SCK_PIN I2S_CONFIG_SCK_PIN
+#endif
+#if defined(I2S_CONFIG_LRCK_PIN)
+#undef NRFX_I2S_CONFIG_LRCK_PIN
+#define NRFX_I2S_CONFIG_LRCK_PIN I2S_CONFIG_LRCK_PIN
+#endif
+#if defined(I2S_CONFIG_MCK_PIN)
+#undef NRFX_I2S_CONFIG_MCK_PIN
+#define NRFX_I2S_CONFIG_MCK_PIN I2S_CONFIG_MCK_PIN
+#endif
+#if defined(I2S_CONFIG_SDOUT_PIN)
+#undef NRFX_I2S_CONFIG_SDOUT_PIN
+#define NRFX_I2S_CONFIG_SDOUT_PIN I2S_CONFIG_SDOUT_PIN
+#endif
+#if defined(I2S_CONFIG_SDIN_PIN)
+#undef NRFX_I2S_CONFIG_SDIN_PIN
+#define NRFX_I2S_CONFIG_SDIN_PIN I2S_CONFIG_SDIN_PIN
+#endif
+
+#if defined(I2S_CONFIG_MASTER)
+#undef NRFX_I2S_CONFIG_MASTER
+#define NRFX_I2S_CONFIG_MASTER I2S_CONFIG_MASTER
+#endif
+#if defined(I2S_CONFIG_FORMAT)
+#undef NRFX_I2S_CONFIG_FORMAT
+#define NRFX_I2S_CONFIG_FORMAT I2S_CONFIG_FORMAT
+#endif
+#if defined(I2S_CONFIG_ALIGN)
+#undef NRFX_I2S_CONFIG_ALIGN
+#define NRFX_I2S_CONFIG_ALIGN I2S_CONFIG_ALIGN
+#endif
+#if defined(I2S_CONFIG_SWIDTH)
+#undef NRFX_I2S_CONFIG_SWIDTH
+#define NRFX_I2S_CONFIG_SWIDTH I2S_CONFIG_SWIDTH
+#endif
+#if defined(I2S_CONFIG_CHANNELS)
+#undef NRFX_I2S_CONFIG_CHANNELS
+#define NRFX_I2S_CONFIG_CHANNELS I2S_CONFIG_CHANNELS
+#endif
+#if defined(I2S_CONFIG_MCK_SETUP)
+#undef NRFX_I2S_CONFIG_MCK_SETUP
+#define NRFX_I2S_CONFIG_MCK_SETUP I2S_CONFIG_MCK_SETUP
+#endif
+#if defined(I2S_CONFIG_RATIO)
+#undef NRFX_I2S_CONFIG_RATIO
+#define NRFX_I2S_CONFIG_RATIO I2S_CONFIG_RATIO
+#endif
+#if defined(I2S_CONFIG_IRQ_PRIORITY)
+#undef NRFX_I2S_CONFIG_IRQ_PRIORITY
+#define NRFX_I2S_CONFIG_IRQ_PRIORITY I2S_CONFIG_IRQ_PRIORITY
+#endif
+
+#if defined(I2S_CONFIG_LOG_ENABLED)
+#undef NRFX_I2S_CONFIG_LOG_ENABLED
+#define NRFX_I2S_CONFIG_LOG_ENABLED I2S_CONFIG_LOG_ENABLED
+#endif
+#if defined(I2S_CONFIG_LOG_LEVEL)
+#undef NRFX_I2S_CONFIG_LOG_LEVEL
+#define NRFX_I2S_CONFIG_LOG_LEVEL I2S_CONFIG_LOG_LEVEL
+#endif
+#if defined(I2S_CONFIG_INFO_COLOR)
+#undef NRFX_I2S_CONFIG_INFO_COLOR
+#define NRFX_I2S_CONFIG_INFO_COLOR I2S_CONFIG_INFO_COLOR
+#endif
+#if defined(I2S_CONFIG_DEBUG_COLOR)
+#undef NRFX_I2S_CONFIG_DEBUG_COLOR
+#define NRFX_I2S_CONFIG_DEBUG_COLOR I2S_CONFIG_DEBUG_COLOR
+#endif
+
+#endif // defined(I2S_ENABLED)
+
+//------------------------------------------------------------------------------
+// LPCOMP
+
+#if defined(LPCOMP_ENABLED)
+
+#undef NRFX_LPCOMP_ENABLED
+#define NRFX_LPCOMP_ENABLED LPCOMP_ENABLED
+
+#if defined(LPCOMP_CONFIG_REFERENCE)
+#undef NRFX_LPCOMP_CONFIG_REFERENCE
+#define NRFX_LPCOMP_CONFIG_REFERENCE LPCOMP_CONFIG_REFERENCE
+#endif
+#if defined(LPCOMP_CONFIG_DETECTION)
+#undef NRFX_LPCOMP_CONFIG_DETECTION
+#define NRFX_LPCOMP_CONFIG_DETECTION LPCOMP_CONFIG_DETECTION
+#endif
+#if defined(LPCOMP_CONFIG_INPUT)
+#undef NRFX_LPCOMP_CONFIG_INPUT
+#define NRFX_LPCOMP_CONFIG_INPUT LPCOMP_CONFIG_INPUT
+#endif
+#if defined(LPCOMP_CONFIG_HYST)
+#undef NRFX_LPCOMP_CONFIG_HYST
+#define NRFX_LPCOMP_CONFIG_HYST LPCOMP_CONFIG_HYST
+#endif
+#if defined(LPCOMP_CONFIG_IRQ_PRIORITY)
+#undef NRFX_LPCOMP_CONFIG_IRQ_PRIORITY
+#define NRFX_LPCOMP_CONFIG_IRQ_PRIORITY LPCOMP_CONFIG_IRQ_PRIORITY
+#endif
+
+#if defined(LPCOMP_CONFIG_LOG_ENABLED)
+#undef NRFX_LPCOMP_CONFIG_LOG_ENABLED
+#define NRFX_LPCOMP_CONFIG_LOG_ENABLED LPCOMP_CONFIG_LOG_ENABLED
+#endif
+#if defined(LPCOMP_CONFIG_LOG_LEVEL)
+#undef NRFX_LPCOMP_CONFIG_LOG_LEVEL
+#define NRFX_LPCOMP_CONFIG_LOG_LEVEL LPCOMP_CONFIG_LOG_LEVEL
+#endif
+#if defined(LPCOMP_CONFIG_INFO_COLOR)
+#undef NRFX_LPCOMP_CONFIG_INFO_COLOR
+#define NRFX_LPCOMP_CONFIG_INFO_COLOR LPCOMP_CONFIG_INFO_COLOR
+#endif
+#if defined(LPCOMP_CONFIG_DEBUG_COLOR)
+#undef NRFX_LPCOMP_CONFIG_DEBUG_COLOR
+#define NRFX_LPCOMP_CONFIG_DEBUG_COLOR LPCOMP_CONFIG_DEBUG_COLOR
+#endif
+
+#endif // defined(LPCOMP_ENABLED)
+
+//------------------------------------------------------------------------------
+// PDM
+
+#if defined(PDM_ENABLED)
+
+#undef NRFX_PDM_ENABLED
+#define NRFX_PDM_ENABLED PDM_ENABLED
+
+#if defined(PDM_CONFIG_MODE)
+#undef NRFX_PDM_CONFIG_MODE
+#define NRFX_PDM_CONFIG_MODE PDM_CONFIG_MODE
+#endif
+#if defined(PDM_CONFIG_EDGE)
+#undef NRFX_PDM_CONFIG_EDGE
+#define NRFX_PDM_CONFIG_EDGE PDM_CONFIG_EDGE
+#endif
+#if defined(PDM_CONFIG_CLOCK_FREQ)
+#undef NRFX_PDM_CONFIG_CLOCK_FREQ
+#define NRFX_PDM_CONFIG_CLOCK_FREQ PDM_CONFIG_CLOCK_FREQ
+#endif
+#if defined(PDM_CONFIG_IRQ_PRIORITY)
+#undef NRFX_PDM_CONFIG_IRQ_PRIORITY
+#define NRFX_PDM_CONFIG_IRQ_PRIORITY PDM_CONFIG_IRQ_PRIORITY
+#endif
+
+#if defined(PDM_CONFIG_LOG_ENABLED)
+#undef NRFX_PDM_CONFIG_LOG_ENABLED
+#define NRFX_PDM_CONFIG_LOG_ENABLED PDM_CONFIG_LOG_ENABLED
+#endif
+#if defined(PDM_CONFIG_LOG_LEVEL)
+#undef NRFX_PDM_CONFIG_LOG_LEVEL
+#define NRFX_PDM_CONFIG_LOG_LEVEL PDM_CONFIG_LOG_LEVEL
+#endif
+#if defined(PDM_CONFIG_INFO_COLOR)
+#undef NRFX_PDM_CONFIG_INFO_COLOR
+#define NRFX_PDM_CONFIG_INFO_COLOR PDM_CONFIG_INFO_COLOR
+#endif
+#if defined(PDM_CONFIG_DEBUG_COLOR)
+#undef NRFX_PDM_CONFIG_DEBUG_COLOR
+#define NRFX_PDM_CONFIG_DEBUG_COLOR PDM_CONFIG_DEBUG_COLOR
+#endif
+
+#endif // defined(PDM_ENABLED)
+
+//------------------------------------------------------------------------------
+// POWER
+
+#if defined(POWER_ENABLED)
+
+#undef NRFX_POWER_ENABLED
+#define NRFX_POWER_ENABLED POWER_ENABLED
+
+#if defined(POWER_CONFIG_IRQ_PRIORITY)
+#undef NRFX_POWER_CONFIG_IRQ_PRIORITY
+#define NRFX_POWER_CONFIG_IRQ_PRIORITY POWER_CONFIG_IRQ_PRIORITY
+#endif
+
+#if defined(POWER_CONFIG_DEFAULT_DCDCEN)
+#undef NRFX_POWER_CONFIG_DEFAULT_DCDCEN
+#define NRFX_POWER_CONFIG_DEFAULT_DCDCEN POWER_CONFIG_DEFAULT_DCDCEN
+#endif
+#if defined(POWER_CONFIG_DEFAULT_DCDCENHV)
+#undef NRFX_POWER_CONFIG_DEFAULT_DCDCENHV
+#define NRFX_POWER_CONFIG_DEFAULT_DCDCENHV POWER_CONFIG_DEFAULT_DCDCENHV
+#endif
+
+#endif // defined(POWER_ENABLED)
+
+//------------------------------------------------------------------------------
+// PPI
+
+#if defined(PPI_ENABLED)
+
+#undef NRFX_PPI_ENABLED
+#define NRFX_PPI_ENABLED PPI_ENABLED
+
+#if defined(PPI_CONFIG_LOG_ENABLED)
+#undef NRFX_PPI_CONFIG_LOG_ENABLED
+#define NRFX_PPI_CONFIG_LOG_ENABLED PPI_CONFIG_LOG_ENABLED
+#endif
+#if defined(PPI_CONFIG_LOG_LEVEL)
+#undef NRFX_PPI_CONFIG_LOG_LEVEL
+#define NRFX_PPI_CONFIG_LOG_LEVEL PPI_CONFIG_LOG_LEVEL
+#endif
+#if defined(PPI_CONFIG_INFO_COLOR)
+#undef NRFX_PPI_CONFIG_INFO_COLOR
+#define NRFX_PPI_CONFIG_INFO_COLOR PPI_CONFIG_INFO_COLOR
+#endif
+#if defined(PPI_CONFIG_DEBUG_COLOR)
+#undef NRFX_PPI_CONFIG_DEBUG_COLOR
+#define NRFX_PPI_CONFIG_DEBUG_COLOR PPI_CONFIG_DEBUG_COLOR
+#endif
+
+#endif // defined(PPI_ENABLED)
+
+//------------------------------------------------------------------------------
+// PWM
+
+#if defined(PWM_ENABLED)
+
+#undef NRFX_PWM_ENABLED
+#define NRFX_PWM_ENABLED PWM_ENABLED
+
+#if defined(PWM0_ENABLED)
+#undef NRFX_PWM0_ENABLED
+#define NRFX_PWM0_ENABLED PWM0_ENABLED
+#endif
+#if defined(PWM1_ENABLED)
+#undef NRFX_PWM1_ENABLED
+#define NRFX_PWM1_ENABLED PWM1_ENABLED
+#endif
+#if defined(PWM2_ENABLED)
+#undef NRFX_PWM2_ENABLED
+#define NRFX_PWM2_ENABLED PWM2_ENABLED
+#endif
+#if defined(PWM3_ENABLED)
+#undef NRFX_PWM3_ENABLED
+#define NRFX_PWM3_ENABLED PWM3_ENABLED
+#endif
+
+#if defined(PWM_DEFAULT_CONFIG_OUT0_PIN)
+#undef NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN
+#define NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN PWM_DEFAULT_CONFIG_OUT0_PIN
+#endif
+#if defined(PWM_DEFAULT_CONFIG_OUT1_PIN)
+#undef NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN
+#define NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN PWM_DEFAULT_CONFIG_OUT1_PIN
+#endif
+#if defined(PWM_DEFAULT_CONFIG_OUT2_PIN)
+#undef NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN
+#define NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN PWM_DEFAULT_CONFIG_OUT2_PIN
+#endif
+#if defined(PWM_DEFAULT_CONFIG_OUT3_PIN)
+#undef NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN
+#define NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN PWM_DEFAULT_CONFIG_OUT3_PIN
+#endif
+#if defined(PWM_DEFAULT_CONFIG_BASE_CLOCK)
+#undef NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK
+#define NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK PWM_DEFAULT_CONFIG_BASE_CLOCK
+#endif
+#if defined(PWM_DEFAULT_CONFIG_COUNT_MODE)
+#undef NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE
+#define NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE PWM_DEFAULT_CONFIG_COUNT_MODE
+#endif
+#if defined(PWM_DEFAULT_CONFIG_TOP_VALUE)
+#undef NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE
+#define NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE PWM_DEFAULT_CONFIG_TOP_VALUE
+#endif
+#if defined(PWM_DEFAULT_CONFIG_LOAD_MODE)
+#undef NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE
+#define NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE PWM_DEFAULT_CONFIG_LOAD_MODE
+#endif
+#if defined(PWM_DEFAULT_CONFIG_STEP_MODE)
+#undef NRFX_PWM_DEFAULT_CONFIG_STEP_MODE
+#define NRFX_PWM_DEFAULT_CONFIG_STEP_MODE PWM_DEFAULT_CONFIG_STEP_MODE
+#endif
+#if defined(PWM_DEFAULT_CONFIG_IRQ_PRIORITY)
+#undef NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY PWM_DEFAULT_CONFIG_IRQ_PRIORITY
+#endif
+
+#if defined(PWM_CONFIG_LOG_ENABLED)
+#undef NRFX_PWM_CONFIG_LOG_ENABLED
+#define NRFX_PWM_CONFIG_LOG_ENABLED PWM_CONFIG_LOG_ENABLED
+#endif
+#if defined(PWM_CONFIG_LOG_LEVEL)
+#undef NRFX_PWM_CONFIG_LOG_LEVEL
+#define NRFX_PWM_CONFIG_LOG_LEVEL PWM_CONFIG_LOG_LEVEL
+#endif
+#if defined(PWM_CONFIG_INFO_COLOR)
+#undef NRFX_PWM_CONFIG_INFO_COLOR
+#define NRFX_PWM_CONFIG_INFO_COLOR PWM_CONFIG_INFO_COLOR
+#endif
+#if defined(PWM_CONFIG_DEBUG_COLOR)
+#undef NRFX_PWM_CONFIG_DEBUG_COLOR
+#define NRFX_PWM_CONFIG_DEBUG_COLOR PWM_CONFIG_DEBUG_COLOR
+#endif
+
+#if defined(PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED)
+#undef NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED
+#define NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED
+#endif
+#if defined(PWM_NRF52_ANOMALY_109_EGU_INSTANCE)
+#undef NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE
+#define NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE PWM_NRF52_ANOMALY_109_EGU_INSTANCE
+#endif
+
+#endif // defined(PWM_ENABLED)
+
+//------------------------------------------------------------------------------
+// QDEC
+
+#if defined(QDEC_ENABLED)
+
+#undef NRFX_QDEC_ENABLED
+#define NRFX_QDEC_ENABLED QDEC_ENABLED
+
+#if defined(QDEC_CONFIG_REPORTPER)
+#undef NRFX_QDEC_CONFIG_REPORTPER
+#define NRFX_QDEC_CONFIG_REPORTPER QDEC_CONFIG_REPORTPER
+#endif
+#if defined(QDEC_CONFIG_SAMPLEPER)
+#undef NRFX_QDEC_CONFIG_SAMPLEPER
+#define NRFX_QDEC_CONFIG_SAMPLEPER QDEC_CONFIG_SAMPLEPER
+#endif
+#if defined(QDEC_CONFIG_PIO_A)
+#undef NRFX_QDEC_CONFIG_PIO_A
+#define NRFX_QDEC_CONFIG_PIO_A QDEC_CONFIG_PIO_A
+#endif
+#if defined(QDEC_CONFIG_PIO_B)
+#undef NRFX_QDEC_CONFIG_PIO_B
+#define NRFX_QDEC_CONFIG_PIO_B QDEC_CONFIG_PIO_B
+#endif
+#if defined(QDEC_CONFIG_PIO_LED)
+#undef NRFX_QDEC_CONFIG_PIO_LED
+#define NRFX_QDEC_CONFIG_PIO_LED QDEC_CONFIG_PIO_LED
+#endif
+#if defined(QDEC_CONFIG_LEDPRE)
+#undef NRFX_QDEC_CONFIG_LEDPRE
+#define NRFX_QDEC_CONFIG_LEDPRE QDEC_CONFIG_LEDPRE
+#endif
+#if defined(QDEC_CONFIG_LEDPOL)
+#undef NRFX_QDEC_CONFIG_LEDPOL
+#define NRFX_QDEC_CONFIG_LEDPOL QDEC_CONFIG_LEDPOL
+#endif
+#if defined(QDEC_CONFIG_DBFEN)
+#undef NRFX_QDEC_CONFIG_DBFEN
+#define NRFX_QDEC_CONFIG_DBFEN QDEC_CONFIG_DBFEN
+#endif
+#if defined(QDEC_CONFIG_SAMPLE_INTEN)
+#undef NRFX_QDEC_CONFIG_SAMPLE_INTEN
+#define NRFX_QDEC_CONFIG_SAMPLE_INTEN QDEC_CONFIG_SAMPLE_INTEN
+#endif
+#if defined(QDEC_CONFIG_IRQ_PRIORITY)
+#undef NRFX_QDEC_CONFIG_IRQ_PRIORITY
+#define NRFX_QDEC_CONFIG_IRQ_PRIORITY QDEC_CONFIG_IRQ_PRIORITY
+#endif
+
+#if defined(QDEC_CONFIG_LOG_ENABLED)
+#undef NRFX_QDEC_CONFIG_LOG_ENABLED
+#define NRFX_QDEC_CONFIG_LOG_ENABLED QDEC_CONFIG_LOG_ENABLED
+#endif
+#if defined(QDEC_CONFIG_LOG_LEVEL)
+#undef NRFX_QDEC_CONFIG_LOG_LEVEL
+#define NRFX_QDEC_CONFIG_LOG_LEVEL QDEC_CONFIG_LOG_LEVEL
+#endif
+#if defined(QDEC_CONFIG_INFO_COLOR)
+#undef NRFX_QDEC_CONFIG_INFO_COLOR
+#define NRFX_QDEC_CONFIG_INFO_COLOR QDEC_CONFIG_INFO_COLOR
+#endif
+#if defined(QDEC_CONFIG_DEBUG_COLOR)
+#undef NRFX_QDEC_CONFIG_DEBUG_COLOR
+#define NRFX_QDEC_CONFIG_DEBUG_COLOR QDEC_CONFIG_DEBUG_COLOR
+#endif
+
+#endif // defined(QDEC_ENABLED)
+
+//------------------------------------------------------------------------------
+// QSPI
+
+#if defined(QSPI_ENABLED)
+
+#undef NRFX_QSPI_ENABLED
+#define NRFX_QSPI_ENABLED QSPI_ENABLED
+
+#if defined(QSPI_CONFIG_SCK_DELAY)
+#undef NRFX_QSPI_CONFIG_SCK_DELAY
+#define NRFX_QSPI_CONFIG_SCK_DELAY QSPI_CONFIG_SCK_DELAY
+#endif
+#if defined(QSPI_CONFIG_XIP_OFFSET)
+#undef NRFX_QSPI_CONFIG_XIP_OFFSET
+#define NRFX_QSPI_CONFIG_XIP_OFFSET QSPI_CONFIG_XIP_OFFSET
+#endif
+#if defined(QSPI_CONFIG_READOC)
+#undef NRFX_QSPI_CONFIG_READOC
+#define NRFX_QSPI_CONFIG_READOC QSPI_CONFIG_READOC
+#endif
+#if defined(QSPI_CONFIG_WRITEOC)
+#undef NRFX_QSPI_CONFIG_WRITEOC
+#define NRFX_QSPI_CONFIG_WRITEOC QSPI_CONFIG_WRITEOC
+#endif
+#if defined(QSPI_CONFIG_ADDRMODE)
+#undef NRFX_QSPI_CONFIG_ADDRMODE
+#define NRFX_QSPI_CONFIG_ADDRMODE QSPI_CONFIG_ADDRMODE
+#endif
+#if defined(QSPI_CONFIG_MODE)
+#undef NRFX_QSPI_CONFIG_MODE
+#define NRFX_QSPI_CONFIG_MODE QSPI_CONFIG_MODE
+#endif
+#if defined(QSPI_CONFIG_FREQUENCY)
+#undef NRFX_QSPI_CONFIG_FREQUENCY
+#define NRFX_QSPI_CONFIG_FREQUENCY QSPI_CONFIG_FREQUENCY
+#endif
+#if defined(QSPI_CONFIG_IRQ_PRIORITY)
+#undef NRFX_QSPI_CONFIG_IRQ_PRIORITY
+#define NRFX_QSPI_CONFIG_IRQ_PRIORITY QSPI_CONFIG_IRQ_PRIORITY
+#endif
+
+#if defined(QSPI_PIN_SCK)
+#undef NRFX_QSPI_PIN_SCK
+#define NRFX_QSPI_PIN_SCK QSPI_PIN_SCK
+#endif
+#if defined(QSPI_PIN_CSN)
+#undef NRFX_QSPI_PIN_CSN
+#define NRFX_QSPI_PIN_CSN QSPI_PIN_CSN
+#endif
+#if defined(QSPI_PIN_IO0)
+#undef NRFX_QSPI_PIN_IO0
+#define NRFX_QSPI_PIN_IO0 QSPI_PIN_IO0
+#endif
+#if defined(QSPI_PIN_IO0)
+#undef NRFX_QSPI_PIN_IO0
+#define NRFX_QSPI_PIN_IO0 QSPI_PIN_IO0
+#endif
+#if defined(QSPI_PIN_IO1)
+#undef NRFX_QSPI_PIN_IO1
+#define NRFX_QSPI_PIN_IO1 QSPI_PIN_IO1
+#endif
+#if defined(QSPI_PIN_IO2)
+#undef NRFX_QSPI_PIN_IO2
+#define NRFX_QSPI_PIN_IO2 QSPI_PIN_IO2
+#endif
+#if defined(QSPI_PIN_IO3)
+#undef NRFX_QSPI_PIN_IO3
+#define NRFX_QSPI_PIN_IO3 QSPI_PIN_IO3
+#endif
+
+#endif // defined(QSPI_ENABLED)
+
+//------------------------------------------------------------------------------
+// RNG
+
+#if defined(RNG_ENABLED)
+
+#undef NRFX_RNG_ENABLED
+#define NRFX_RNG_ENABLED RNG_ENABLED
+
+#if defined(RNG_CONFIG_ERROR_CORRECTION)
+#undef NRFX_RNG_CONFIG_ERROR_CORRECTION
+#define NRFX_RNG_CONFIG_ERROR_CORRECTION RNG_CONFIG_ERROR_CORRECTION
+#endif
+
+#if defined(RNG_CONFIG_IRQ_PRIORITY)
+#undef NRFX_RNG_CONFIG_IRQ_PRIORITY
+#define NRFX_RNG_CONFIG_IRQ_PRIORITY RNG_CONFIG_IRQ_PRIORITY
+#endif
+
+#if defined(RNG_CONFIG_LOG_ENABLED)
+#undef NRFX_RNG_CONFIG_LOG_ENABLED
+#define NRFX_RNG_CONFIG_LOG_ENABLED RNG_CONFIG_LOG_ENABLED
+#endif
+#if defined(RNG_CONFIG_LOG_LEVEL)
+#undef NRFX_RNG_CONFIG_LOG_LEVEL
+#define NRFX_RNG_CONFIG_LOG_LEVEL RNG_CONFIG_LOG_LEVEL
+#endif
+#if defined(RNG_CONFIG_INFO_COLOR)
+#undef NRFX_RNG_CONFIG_INFO_COLOR
+#define NRFX_RNG_CONFIG_INFO_COLOR RNG_CONFIG_INFO_COLOR
+#endif
+#if defined(RNG_CONFIG_DEBUG_COLOR)
+#undef NRFX_RNG_CONFIG_DEBUG_COLOR
+#define NRFX_RNG_CONFIG_DEBUG_COLOR RNG_CONFIG_DEBUG_COLOR
+#endif
+
+#endif // defined(RNG_ENABLED)
+
+//------------------------------------------------------------------------------
+// RTC
+
+#if defined(RTC_ENABLED)
+
+#undef NRFX_RTC_ENABLED
+#define NRFX_RTC_ENABLED RTC_ENABLED
+
+#if defined(RTC0_ENABLED)
+#undef NRFX_RTC0_ENABLED
+#define NRFX_RTC0_ENABLED RTC0_ENABLED
+#endif
+#if defined(RTC1_ENABLED)
+#undef NRFX_RTC1_ENABLED
+#define NRFX_RTC1_ENABLED RTC1_ENABLED
+#endif
+#if defined(RTC2_ENABLED)
+#undef NRFX_RTC2_ENABLED
+#define NRFX_RTC2_ENABLED RTC2_ENABLED
+#endif
+
+#if defined(RTC_DEFAULT_CONFIG_FREQUENCY)
+#undef NRFX_RTC_DEFAULT_CONFIG_FREQUENCY
+#define NRFX_RTC_DEFAULT_CONFIG_FREQUENCY RTC_DEFAULT_CONFIG_FREQUENCY
+#endif
+#if defined(RTC_DEFAULT_CONFIG_RELIABLE)
+#undef NRFX_RTC_DEFAULT_CONFIG_RELIABLE
+#define NRFX_RTC_DEFAULT_CONFIG_RELIABLE RTC_DEFAULT_CONFIG_RELIABLE
+#endif
+#if defined(RTC_DEFAULT_CONFIG_IRQ_PRIORITY)
+#undef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY RTC_DEFAULT_CONFIG_IRQ_PRIORITY
+#endif
+
+#if defined(NRF_MAXIMUM_LATENCY_US)
+#undef NRFX_RTC_MAXIMUM_LATENCY_US
+#define NRFX_RTC_MAXIMUM_LATENCY_US NRF_MAXIMUM_LATENCY_US
+#endif
+
+#if defined(RTC_CONFIG_LOG_ENABLED)
+#undef NRFX_RTC_CONFIG_LOG_ENABLED
+#define NRFX_RTC_CONFIG_LOG_ENABLED RTC_CONFIG_LOG_ENABLED
+#endif
+#if defined(RTC_CONFIG_LOG_LEVEL)
+#undef NRFX_RTC_CONFIG_LOG_LEVEL
+#define NRFX_RTC_CONFIG_LOG_LEVEL RTC_CONFIG_LOG_LEVEL
+#endif
+#if defined(RTC_CONFIG_INFO_COLOR)
+#undef NRFX_RTC_CONFIG_INFO_COLOR
+#define NRFX_RTC_CONFIG_INFO_COLOR RTC_CONFIG_INFO_COLOR
+#endif
+#if defined(RTC_CONFIG_DEBUG_COLOR)
+#undef NRFX_RTC_CONFIG_DEBUG_COLOR
+#define NRFX_RTC_CONFIG_DEBUG_COLOR RTC_CONFIG_DEBUG_COLOR
+#endif
+
+#endif // defined(RTC_ENABLED)
+
+//------------------------------------------------------------------------------
+// SAADC
+
+#if defined(SAADC_ENABLED)
+
+#undef NRFX_SAADC_ENABLED
+#define NRFX_SAADC_ENABLED SAADC_ENABLED
+
+#if defined(SAADC_CONFIG_RESOLUTION)
+#undef NRFX_SAADC_CONFIG_RESOLUTION
+#define NRFX_SAADC_CONFIG_RESOLUTION SAADC_CONFIG_RESOLUTION
+#endif
+#if defined(SAADC_CONFIG_OVERSAMPLE)
+#undef NRFX_SAADC_CONFIG_OVERSAMPLE
+#define NRFX_SAADC_CONFIG_OVERSAMPLE SAADC_CONFIG_OVERSAMPLE
+#endif
+#if defined(SAADC_CONFIG_LP_MODE)
+#undef NRFX_SAADC_CONFIG_LP_MODE
+#define NRFX_SAADC_CONFIG_LP_MODE SAADC_CONFIG_LP_MODE
+#endif
+#if defined(SAADC_CONFIG_IRQ_PRIORITY)
+#undef NRFX_SAADC_CONFIG_IRQ_PRIORITY
+#define NRFX_SAADC_CONFIG_IRQ_PRIORITY SAADC_CONFIG_IRQ_PRIORITY
+#endif
+
+#if defined(SAADC_CONFIG_LOG_ENABLED)
+#undef NRFX_SAADC_CONFIG_LOG_ENABLED
+#define NRFX_SAADC_CONFIG_LOG_ENABLED SAADC_CONFIG_LOG_ENABLED
+#endif
+#if defined(SAADC_CONFIG_LOG_LEVEL)
+#undef NRFX_SAADC_CONFIG_LOG_LEVEL
+#define NRFX_SAADC_CONFIG_LOG_LEVEL SAADC_CONFIG_LOG_LEVEL
+#endif
+#if defined(SAADC_CONFIG_INFO_COLOR)
+#undef NRFX_SAADC_CONFIG_INFO_COLOR
+#define NRFX_SAADC_CONFIG_INFO_COLOR SAADC_CONFIG_INFO_COLOR
+#endif
+#if defined(SAADC_CONFIG_DEBUG_COLOR)
+#undef NRFX_SAADC_CONFIG_DEBUG_COLOR
+#define NRFX_SAADC_CONFIG_DEBUG_COLOR SAADC_CONFIG_DEBUG_COLOR
+#endif
+
+#endif // defined(SAADC_ENABLED)
+
+//------------------------------------------------------------------------------
+// SPI
+
+#if defined(SPI_ENABLED)
+
+#undef NRFX_SPI_ENABLED
+#define NRFX_SPI_ENABLED \
+ (SPI_ENABLED && (NRFX_SPI0_ENABLED || NRFX_SPI1_ENABLED || NRFX_SPI2_ENABLED))
+#undef NRFX_SPIM_ENABLED
+#define NRFX_SPIM_ENABLED \
+ (SPI_ENABLED && (NRFX_SPIM0_ENABLED || NRFX_SPIM1_ENABLED || NRFX_SPIM2_ENABLED))
+
+#if defined(SPI_PRESENT) && !defined(SPIM_PRESENT)
+
+#undef NRFX_SPI0_ENABLED
+#define NRFX_SPI0_ENABLED SPI0_ENABLED
+#undef NRFX_SPIM0_ENABLED
+#define NRFX_SPIM0_ENABLED 0
+
+#undef NRFX_SPI1_ENABLED
+#define NRFX_SPI1_ENABLED SPI1_ENABLED
+#undef NRFX_SPIM1_ENABLED
+#define NRFX_SPIM1_ENABLED 0
+
+#undef NRFX_SPI2_ENABLED
+#define NRFX_SPI2_ENABLED SPI2_ENABLED
+#undef NRFX_SPIM2_ENABLED
+#define NRFX_SPIM2_ENABLED 0
+
+#elif !defined(SPI_PRESENT) && defined(SPIM_PRESENT)
+
+#undef NRFX_SPI0_ENABLED
+#define NRFX_SPI0_ENABLED 0
+#undef NRFX_SPIM0_ENABLED
+#define NRFX_SPIM0_ENABLED SPI0_ENABLED
+
+#undef NRFX_SPI1_ENABLED
+#define NRFX_SPI1_ENABLED 0
+#undef NRFX_SPIM1_ENABLED
+#define NRFX_SPIM1_ENABLED SPI1_ENABLED
+
+#undef NRFX_SPI2_ENABLED
+#define NRFX_SPI2_ENABLED 0
+#undef NRFX_SPIM2_ENABLED
+#define NRFX_SPIM2_ENABLED SPI2_ENABLED
+
+#else // -> defined(SPI_PRESENT) && defined(SPIM_PRESENT)
+
+#undef NRFX_SPI0_ENABLED
+#define NRFX_SPI0_ENABLED (SPI0_ENABLED && !SPI0_USE_EASY_DMA)
+#undef NRFX_SPIM0_ENABLED
+#define NRFX_SPIM0_ENABLED (SPI0_ENABLED && SPI0_USE_EASY_DMA)
+
+#undef NRFX_SPI1_ENABLED
+#define NRFX_SPI1_ENABLED (SPI1_ENABLED && !SPI1_USE_EASY_DMA)
+#undef NRFX_SPIM1_ENABLED
+#define NRFX_SPIM1_ENABLED (SPI1_ENABLED && SPI1_USE_EASY_DMA)
+
+#undef NRFX_SPI2_ENABLED
+#define NRFX_SPI2_ENABLED (SPI2_ENABLED && !SPI2_USE_EASY_DMA)
+#undef NRFX_SPIM2_ENABLED
+#define NRFX_SPIM2_ENABLED (SPI2_ENABLED && SPI2_USE_EASY_DMA)
+
+#endif // -> defined(SPI_PRESENT) && defined(SPIM_PRESENT)
+
+#if defined(NRF_SPI_DRV_MISO_PULLUP_CFG)
+#undef NRFX_SPI_MISO_PULL_CFG
+#define NRFX_SPI_MISO_PULL_CFG NRF_SPI_DRV_MISO_PULLUP_CFG
+#undef NRFX_SPIM_MISO_PULL_CFG
+#define NRFX_SPIM_MISO_PULL_CFG NRF_SPI_DRV_MISO_PULLUP_CFG
+#endif
+
+#if defined(SPI_DEFAULT_CONFIG_IRQ_PRIORITY)
+#undef NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY SPI_DEFAULT_CONFIG_IRQ_PRIORITY
+#undef NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY SPI_DEFAULT_CONFIG_IRQ_PRIORITY
+#endif
+
+#if defined(SPI_CONFIG_LOG_ENABLED)
+#undef NRFX_SPI_CONFIG_LOG_ENABLED
+#define NRFX_SPI_CONFIG_LOG_ENABLED SPI_CONFIG_LOG_ENABLED
+#undef NRFX_SPIM_CONFIG_LOG_ENABLED
+#define NRFX_SPIM_CONFIG_LOG_ENABLED SPI_CONFIG_LOG_ENABLED
+#endif
+#if defined(SPI_CONFIG_LOG_LEVEL)
+#undef NRFX_SPI_CONFIG_LOG_LEVEL
+#define NRFX_SPI_CONFIG_LOG_LEVEL SPI_CONFIG_LOG_LEVEL
+#undef NRFX_SPIM_CONFIG_LOG_LEVEL
+#define NRFX_SPIM_CONFIG_LOG_LEVEL SPI_CONFIG_LOG_LEVEL
+#endif
+#if defined(SPI_CONFIG_INFO_COLOR)
+#undef NRFX_SPI_CONFIG_INFO_COLOR
+#define NRFX_SPI_CONFIG_INFO_COLOR SPI_CONFIG_INFO_COLOR
+#undef NRFX_SPIM_CONFIG_INFO_COLOR
+#define NRFX_SPIM_CONFIG_INFO_COLOR SPI_CONFIG_INFO_COLOR
+#endif
+#if defined(SPI_CONFIG_DEBUG_COLOR)
+#undef NRFX_SPI_CONFIG_DEBUG_COLOR
+#define NRFX_SPI_CONFIG_DEBUG_COLOR SPI_CONFIG_DEBUG_COLOR
+#undef NRFX_SPIM_CONFIG_DEBUG_COLOR
+#define NRFX_SPIM_CONFIG_DEBUG_COLOR SPI_CONFIG_DEBUG_COLOR
+#endif
+
+#if defined(SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED)
+#undef NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED
+#define NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED
+#endif
+
+#endif // defined(SPI_ENABLED)
+
+//------------------------------------------------------------------------------
+// SPIS
+
+#if defined(SPIS_ENABLED)
+
+#undef NRFX_SPIS_ENABLED
+#define NRFX_SPIS_ENABLED SPIS_ENABLED
+
+#if defined(SPIS0_ENABLED)
+#undef NRFX_SPIS0_ENABLED
+#define NRFX_SPIS0_ENABLED SPIS0_ENABLED
+#endif
+#if defined(SPIS1_ENABLED)
+#undef NRFX_SPIS1_ENABLED
+#define NRFX_SPIS1_ENABLED SPIS1_ENABLED
+#endif
+#if defined(SPIS2_ENABLED)
+#undef NRFX_SPIS2_ENABLED
+#define NRFX_SPIS2_ENABLED SPIS2_ENABLED
+#endif
+
+#if defined(SPIS_DEFAULT_CONFIG_IRQ_PRIORITY)
+#undef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY SPIS_DEFAULT_CONFIG_IRQ_PRIORITY
+#endif
+#if defined(SPIS_DEFAULT_MODE)
+#undef NRFX_SPIS_DEFAULT_MODE
+#define NRFX_SPIS_DEFAULT_MODE SPIS_DEFAULT_MODE
+#endif
+#if defined(SPIS_DEFAULT_BIT_ORDER)
+#undef NRFX_SPIS_DEFAULT_BIT_ORDER
+#define NRFX_SPIS_DEFAULT_BIT_ORDER SPIS_DEFAULT_BIT_ORDER
+#endif
+#if defined(SPIS_DEFAULT_DEF)
+#undef NRFX_SPIS_DEFAULT_DEF
+#define NRFX_SPIS_DEFAULT_DEF SPIS_DEFAULT_DEF
+#endif
+#if defined(SPIS_DEFAULT_ORC)
+#undef NRFX_SPIS_DEFAULT_ORC
+#define NRFX_SPIS_DEFAULT_ORC SPIS_DEFAULT_ORC
+#endif
+
+#if defined(SPIS_CONFIG_LOG_ENABLED)
+#undef NRFX_SPIS_CONFIG_LOG_ENABLED
+#define NRFX_SPIS_CONFIG_LOG_ENABLED SPIS_CONFIG_LOG_ENABLED
+#endif
+#if defined(SPIS_CONFIG_LOG_LEVEL)
+#undef NRFX_SPIS_CONFIG_LOG_LEVEL
+#define NRFX_SPIS_CONFIG_LOG_LEVEL SPIS_CONFIG_LOG_LEVEL
+#endif
+#if defined(SPIS_CONFIG_INFO_COLOR)
+#undef NRFX_SPIS_CONFIG_INFO_COLOR
+#define NRFX_SPIS_CONFIG_INFO_COLOR SPIS_CONFIG_INFO_COLOR
+#endif
+#if defined(SPIS_CONFIG_DEBUG_COLOR)
+#undef NRFX_SPIS_CONFIG_DEBUG_COLOR
+#define NRFX_SPIS_CONFIG_DEBUG_COLOR SPIS_CONFIG_DEBUG_COLOR
+#endif
+
+#if defined(SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED)
+#undef NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED
+#define NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED
+#endif
+
+#endif // defined(SPIS_ENABLED)
+
+//------------------------------------------------------------------------------
+// SWI
+
+#if defined(SWI_DISABLE0)
+#undef NRFX_SWI0_DISABLED
+#define NRFX_SWI0_DISABLED 1
+#endif
+#if defined(SWI_DISABLE1)
+#undef NRFX_SWI1_DISABLED
+#define NRFX_SWI1_DISABLED 1
+#endif
+#if defined(SWI_DISABLE2)
+#undef NRFX_SWI2_DISABLED
+#define NRFX_SWI2_DISABLED 1
+#endif
+#if defined(SWI_DISABLE3)
+#undef NRFX_SWI3_DISABLED
+#define NRFX_SWI3_DISABLED 1
+#endif
+#if defined(SWI_DISABLE4)
+#undef NRFX_SWI4_DISABLED
+#define NRFX_SWI4_DISABLED 1
+#endif
+#if defined(SWI_DISABLE5)
+#undef NRFX_SWI5_DISABLED
+#define NRFX_SWI5_DISABLED 1
+#endif
+
+#if defined(EGU_ENABLED)
+#undef NRFX_EGU_ENABLED
+#define NRFX_EGU_ENABLED EGU_ENABLED
+#endif
+
+#if defined(SWI_CONFIG_LOG_ENABLED)
+#undef NRFX_SWI_CONFIG_LOG_ENABLED
+#define NRFX_SWI_CONFIG_LOG_ENABLED SWI_CONFIG_LOG_ENABLED
+#endif
+#if defined(SWI_CONFIG_LOG_LEVEL)
+#undef NRFX_SWI_CONFIG_LOG_LEVEL
+#define NRFX_SWI_CONFIG_LOG_LEVEL SWI_CONFIG_LOG_LEVEL
+#endif
+#if defined(SWI_CONFIG_INFO_COLOR)
+#undef NRFX_SWI_CONFIG_INFO_COLOR
+#define NRFX_SWI_CONFIG_INFO_COLOR SWI_CONFIG_INFO_COLOR
+#endif
+#if defined(SWI_CONFIG_DEBUG_COLOR)
+#undef NRFX_SWI_CONFIG_DEBUG_COLOR
+#define NRFX_SWI_CONFIG_DEBUG_COLOR SWI_CONFIG_DEBUG_COLOR
+#endif
+
+//------------------------------------------------------------------------------
+// SysTick
+
+#if defined(SYSTICK_ENABLED)
+
+#undef NRFX_SYSTICK_ENABLED
+#define NRFX_SYSTICK_ENABLED SYSTICK_ENABLED
+
+#endif // defined(SYSTICK_ENABLED)
+
+//------------------------------------------------------------------------------
+// TIMER
+
+#if defined(TIMER_ENABLED)
+
+#undef NRFX_TIMER_ENABLED
+#define NRFX_TIMER_ENABLED TIMER_ENABLED
+
+#if defined(TIMER0_ENABLED)
+#undef NRFX_TIMER0_ENABLED
+#define NRFX_TIMER0_ENABLED TIMER0_ENABLED
+#endif
+#if defined(TIMER1_ENABLED)
+#undef NRFX_TIMER1_ENABLED
+#define NRFX_TIMER1_ENABLED TIMER1_ENABLED
+#endif
+#if defined(TIMER2_ENABLED)
+#undef NRFX_TIMER2_ENABLED
+#define NRFX_TIMER2_ENABLED TIMER2_ENABLED
+#endif
+#if defined(TIMER3_ENABLED)
+#undef NRFX_TIMER3_ENABLED
+#define NRFX_TIMER3_ENABLED TIMER3_ENABLED
+#endif
+#if defined(TIMER4_ENABLED)
+#undef NRFX_TIMER4_ENABLED
+#define NRFX_TIMER4_ENABLED TIMER4_ENABLED
+#endif
+
+#if defined(TIMER_DEFAULT_CONFIG_FREQUENCY)
+#undef NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY
+#define NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY TIMER_DEFAULT_CONFIG_FREQUENCY
+#endif
+#if defined(TIMER_DEFAULT_CONFIG_MODE)
+#undef NRFX_TIMER_DEFAULT_CONFIG_MODE
+#define NRFX_TIMER_DEFAULT_CONFIG_MODE TIMER_DEFAULT_CONFIG_MODE
+#endif
+#if defined(TIMER_DEFAULT_CONFIG_BIT_WIDTH)
+#undef NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH
+#define NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH TIMER_DEFAULT_CONFIG_BIT_WIDTH
+#endif
+#if defined(TIMER_DEFAULT_CONFIG_IRQ_PRIORITY)
+#undef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY TIMER_DEFAULT_CONFIG_IRQ_PRIORITY
+#endif
+
+#if defined(TIMER_CONFIG_LOG_ENABLED)
+#undef NRFX_TIMER_CONFIG_LOG_ENABLED
+#define NRFX_TIMER_CONFIG_LOG_ENABLED TIMER_CONFIG_LOG_ENABLED
+#endif
+#if defined(TIMER_CONFIG_LOG_LEVEL)
+#undef NRFX_TIMER_CONFIG_LOG_LEVEL
+#define NRFX_TIMER_CONFIG_LOG_LEVEL TIMER_CONFIG_LOG_LEVEL
+#endif
+#if defined(TIMER_CONFIG_INFO_COLOR)
+#undef NRFX_TIMER_CONFIG_INFO_COLOR
+#define NRFX_TIMER_CONFIG_INFO_COLOR TIMER_CONFIG_INFO_COLOR
+#endif
+#if defined(TIMER_CONFIG_DEBUG_COLOR)
+#undef NRFX_TIMER_CONFIG_DEBUG_COLOR
+#define NRFX_TIMER_CONFIG_DEBUG_COLOR TIMER_CONFIG_DEBUG_COLOR
+#endif
+
+#endif // defined(TIMER_ENABLED)
+
+//------------------------------------------------------------------------------
+// TWI
+#define TWI_ONLY ( defined(TWI_PRESENT) && !defined(TWIM_PRESENT))
+#define TWIM_ONLY (!defined(TWI_PRESENT) && defined(TWIM_PRESENT))
+#define TWI_AND_TWIM ( defined(TWI_PRESENT) && defined(TWIM_PRESENT))
+
+#if defined(TWI_ENABLED)
+
+#undef NRFX_TWI_ENABLED
+#define NRFX_TWI_ENABLED (TWI_ENABLED && (NRFX_TWI0_ENABLED || NRFX_TWI1_ENABLED))
+#undef NRFX_TWIM_ENABLED
+#define NRFX_TWIM_ENABLED (TWI_ENABLED && (NRFX_TWIM0_ENABLED || NRFX_TWIM1_ENABLED))
+
+#if defined(TWI_PRESENT) && !defined(TWIM_PRESENT)
+
+#undef NRFX_TWI0_ENABLED
+#define NRFX_TWI0_ENABLED TWI0_ENABLED
+#undef NRFX_TWIM0_ENABLED
+#define NRFX_TWIM0_ENABLED 0
+
+#undef NRFX_TWI1_ENABLED
+#define NRFX_TWI1_ENABLED TWI1_ENABLED
+#undef NRFX_TWIM1_ENABLED
+#define NRFX_TWIM1_ENABLED 0
+
+#elif !defined(TWI_PRESENT) && defined(TWIM_PRESENT)
+
+#undef NRFX_TWI0_ENABLED
+#define NRFX_TWI0_ENABLED 0
+#undef NRFX_TWIM0_ENABLED
+#define NRFX_TWIM0_ENABLED TWI0_ENABLED
+
+#undef NRFX_TWI1_ENABLED
+#define NRFX_TWI1_ENABLED 0
+#undef NRFX_TWIM1_ENABLED
+#define NRFX_TWIM1_ENABLED TWI1_ENABLED
+
+#else // -> defined(TWI_PRESENT) && defined(TWIM_PRESENT)
+
+#undef NRFX_TWI0_ENABLED
+#define NRFX_TWI0_ENABLED (TWI0_ENABLED && !TWI0_USE_EASY_DMA)
+#undef NRFX_TWIM0_ENABLED
+#define NRFX_TWIM0_ENABLED (TWI0_ENABLED && TWI0_USE_EASY_DMA)
+
+#undef NRFX_TWI1_ENABLED
+#define NRFX_TWI1_ENABLED (TWI1_ENABLED && !TWI1_USE_EASY_DMA)
+#undef NRFX_TWIM1_ENABLED
+#define NRFX_TWIM1_ENABLED (TWI1_ENABLED && TWI1_USE_EASY_DMA)
+
+#endif // -> defined(TWI_PRESENT) && defined(TWIM_PRESENT)
+
+#if defined(TWI_DEFAULT_CONFIG_FREQUENCY)
+#undef NRFX_TWI_DEFAULT_CONFIG_FREQUENCY
+#define NRFX_TWI_DEFAULT_CONFIG_FREQUENCY TWI_DEFAULT_CONFIG_FREQUENCY
+#undef NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY
+#define NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY TWI_DEFAULT_CONFIG_FREQUENCY
+#endif
+#if defined(TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT)
+#undef NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT
+#define NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT
+#undef NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT
+#define NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT
+#endif
+#if defined(TWI_DEFAULT_CONFIG_IRQ_PRIORITY)
+#undef NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY TWI_DEFAULT_CONFIG_IRQ_PRIORITY
+#undef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY TWI_DEFAULT_CONFIG_IRQ_PRIORITY
+#endif
+
+#if defined(TWI_CONFIG_LOG_ENABLED)
+#undef NRFX_TWI_CONFIG_LOG_ENABLED
+#define NRFX_TWI_CONFIG_LOG_ENABLED TWI_CONFIG_LOG_ENABLED
+#undef NRFX_TWIM_CONFIG_LOG_ENABLED
+#define NRFX_TWIM_CONFIG_LOG_ENABLED TWI_CONFIG_LOG_ENABLED
+#endif
+#if defined(TWI_CONFIG_LOG_LEVEL)
+#undef NRFX_TWI_CONFIG_LOG_LEVEL
+#define NRFX_TWI_CONFIG_LOG_LEVEL TWI_CONFIG_LOG_LEVEL
+#undef NRFX_TWIM_CONFIG_LOG_LEVEL
+#define NRFX_TWIM_CONFIG_LOG_LEVEL TWI_CONFIG_LOG_LEVEL
+#endif
+#if defined(TWI_CONFIG_INFO_COLOR)
+#undef NRFX_TWI_CONFIG_INFO_COLOR
+#define NRFX_TWI_CONFIG_INFO_COLOR TWI_CONFIG_INFO_COLOR
+#undef NRFX_TWIM_CONFIG_INFO_COLOR
+#define NRFX_TWIM_CONFIG_INFO_COLOR TWI_CONFIG_INFO_COLOR
+#endif
+#if defined(TWI_CONFIG_DEBUG_COLOR)
+#undef NRFX_TWI_CONFIG_DEBUG_COLOR
+#define NRFX_TWI_CONFIG_DEBUG_COLOR TWI_CONFIG_DEBUG_COLOR
+#undef NRFX_TWIM_CONFIG_DEBUG_COLOR
+#define NRFX_TWIM_CONFIG_DEBUG_COLOR TWI_CONFIG_DEBUG_COLOR
+#endif
+
+#if defined(TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED)
+#undef NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED
+#define NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED
+#endif
+
+#endif // defined(TWI_ENABLED)
+
+//------------------------------------------------------------------------------
+// TWIS
+
+#if defined(TWIS_ENABLED)
+
+#undef NRFX_TWIS_ENABLED
+#define NRFX_TWIS_ENABLED TWIS_ENABLED
+
+#if defined(TWIS0_ENABLED)
+#undef NRFX_TWIS0_ENABLED
+#define NRFX_TWIS0_ENABLED TWIS0_ENABLED
+#endif
+#if defined(TWIS1_ENABLED)
+#undef NRFX_TWIS1_ENABLED
+#define NRFX_TWIS1_ENABLED TWIS1_ENABLED
+#endif
+
+#if defined(TWIS_ASSUME_INIT_AFTER_RESET_ONLY)
+#undef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY
+#define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY TWIS_ASSUME_INIT_AFTER_RESET_ONLY
+#endif
+#if defined(TWIS_NO_SYNC_MODE)
+#undef NRFX_TWIS_NO_SYNC_MODE
+#define NRFX_TWIS_NO_SYNC_MODE TWIS_NO_SYNC_MODE
+#endif
+
+#if defined(TWIS_DEFAULT_CONFIG_ADDR0)
+#undef NRFX_TWIS_DEFAULT_CONFIG_ADDR0
+#define NRFX_TWIS_DEFAULT_CONFIG_ADDR0 TWIS_DEFAULT_CONFIG_ADDR0
+#endif
+#if defined(TWIS_DEFAULT_CONFIG_ADDR1)
+#undef NRFX_TWIS_DEFAULT_CONFIG_ADDR1
+#define NRFX_TWIS_DEFAULT_CONFIG_ADDR1 TWIS_DEFAULT_CONFIG_ADDR1
+#endif
+#if defined(TWIS_DEFAULT_CONFIG_SCL_PULL)
+#undef NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL
+#define NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL TWIS_DEFAULT_CONFIG_SCL_PULL
+#endif
+#if defined(TWIS_DEFAULT_CONFIG_SDA_PULL)
+#undef NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL
+#define NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL TWIS_DEFAULT_CONFIG_SDA_PULL
+#endif
+#if defined(TWIS_DEFAULT_CONFIG_IRQ_PRIORITY)
+#undef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY TWIS_DEFAULT_CONFIG_IRQ_PRIORITY
+#endif
+
+#if defined(TWIS_CONFIG_LOG_ENABLED)
+#undef NRFX_TWIS_CONFIG_LOG_ENABLED
+#define NRFX_TWIS_CONFIG_LOG_ENABLED TWIS_CONFIG_LOG_ENABLED
+#endif
+#if defined(TWIS_CONFIG_LOG_LEVEL)
+#undef NRFX_TWIS_CONFIG_LOG_LEVEL
+#define NRFX_TWIS_CONFIG_LOG_LEVEL TWIS_CONFIG_LOG_LEVEL
+#endif
+#if defined(TWIS_CONFIG_INFO_COLOR)
+#undef NRFX_TWIS_CONFIG_INFO_COLOR
+#define NRFX_TWIS_CONFIG_INFO_COLOR TWIS_CONFIG_INFO_COLOR
+#endif
+#if defined(TWIS_CONFIG_DEBUG_COLOR)
+#undef NRFX_TWIS_CONFIG_DEBUG_COLOR
+#define NRFX_TWIS_CONFIG_DEBUG_COLOR TWIS_CONFIG_DEBUG_COLOR
+#endif
+
+#endif // defined(TWIS_ENABLED)
+
+//------------------------------------------------------------------------------
+// UART
+
+#if defined(UART_ENABLED)
+
+#undef NRFX_UART_ENABLED
+#define NRFX_UART_ENABLED (UART_ENABLED && NRFX_UART0_ENABLED)
+#undef NRFX_UARTE_ENABLED
+#define NRFX_UARTE_ENABLED (UART_ENABLED && (NRFX_UARTE0_ENABLED || NRFX_UARTE1_ENABLED))
+
+#if defined(UART0_ENABLED)
+#undef NRFX_UART0_ENABLED
+#define NRFX_UART0_ENABLED (UART0_ENABLED && UART_LEGACY_SUPPORT)
+#undef NRFX_UARTE0_ENABLED
+#define NRFX_UARTE0_ENABLED (UART0_ENABLED && UART_EASY_DMA_SUPPORT)
+#endif
+#if defined(UART1_ENABLED)
+#undef NRFX_UARTE1_ENABLED
+#define NRFX_UARTE1_ENABLED (UART1_ENABLED && UART_EASY_DMA_SUPPORT)
+#endif
+
+#if defined(UART_DEFAULT_CONFIG_HWFC)
+#undef NRFX_UART_DEFAULT_CONFIG_HWFC
+#define NRFX_UART_DEFAULT_CONFIG_HWFC UART_DEFAULT_CONFIG_HWFC
+#undef NRFX_UARTE_DEFAULT_CONFIG_HWFC
+#define NRFX_UARTE_DEFAULT_CONFIG_HWFC UART_DEFAULT_CONFIG_HWFC
+#endif
+#if defined(UART_DEFAULT_CONFIG_PARITY)
+#undef NRFX_UART_DEFAULT_CONFIG_PARITY
+#define NRFX_UART_DEFAULT_CONFIG_PARITY UART_DEFAULT_CONFIG_PARITY
+#undef NRFX_UARTE_DEFAULT_CONFIG_PARITY
+#define NRFX_UARTE_DEFAULT_CONFIG_PARITY UART_DEFAULT_CONFIG_PARITY
+#endif
+#if defined(UART_DEFAULT_CONFIG_BAUDRATE)
+#undef NRFX_UART_DEFAULT_CONFIG_BAUDRATE
+#define NRFX_UART_DEFAULT_CONFIG_BAUDRATE UART_DEFAULT_CONFIG_BAUDRATE
+#undef NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE
+#define NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE UART_DEFAULT_CONFIG_BAUDRATE
+#endif
+#if defined(UART_DEFAULT_CONFIG_IRQ_PRIORITY)
+#undef NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY UART_DEFAULT_CONFIG_IRQ_PRIORITY
+#undef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY UART_DEFAULT_CONFIG_IRQ_PRIORITY
+#endif
+
+#if defined(UART_CONFIG_LOG_ENABLED)
+#undef NRFX_UART_CONFIG_LOG_ENABLED
+#define NRFX_UART_CONFIG_LOG_ENABLED UART_CONFIG_LOG_ENABLED
+#undef NRFX_UARTE_CONFIG_LOG_ENABLED
+#define NRFX_UARTE_CONFIG_LOG_ENABLED UART_CONFIG_LOG_ENABLED
+#endif
+#if defined(UART_CONFIG_LOG_LEVEL)
+#undef NRFX_UART_CONFIG_LOG_LEVEL
+#define NRFX_UART_CONFIG_LOG_LEVEL UART_CONFIG_LOG_LEVEL
+#undef NRFX_UARTE_CONFIG_LOG_LEVEL
+#define NRFX_UARTE_CONFIG_LOG_LEVEL UART_CONFIG_LOG_LEVEL
+#endif
+#if defined(UART_CONFIG_INFO_COLOR)
+#undef NRFX_UART_CONFIG_INFO_COLOR
+#define NRFX_UART_CONFIG_INFO_COLOR UART_CONFIG_INFO_COLOR
+#undef NRFX_UARTE_CONFIG_INFO_COLOR
+#define NRFX_UARTE_CONFIG_INFO_COLOR UART_CONFIG_INFO_COLOR
+#endif
+#if defined(UART_CONFIG_DEBUG_COLOR)
+#undef NRFX_UART_CONFIG_DEBUG_COLOR
+#define NRFX_UART_CONFIG_DEBUG_COLOR UART_CONFIG_DEBUG_COLOR
+#undef NRFX_UARTE_CONFIG_DEBUG_COLOR
+#define NRFX_UARTE_CONFIG_DEBUG_COLOR UART_CONFIG_DEBUG_COLOR
+#endif
+
+#endif // defined(UART_ENABLED)
+
+//------------------------------------------------------------------------------
+// WDT
+
+#if defined(WDT_ENABLED)
+
+#undef NRFX_WDT_ENABLED
+#define NRFX_WDT_ENABLED WDT_ENABLED
+
+#if defined(WDT_CONFIG_BEHAVIOUR)
+#undef NRFX_WDT_CONFIG_BEHAVIOUR
+#define NRFX_WDT_CONFIG_BEHAVIOUR WDT_CONFIG_BEHAVIOUR
+#endif
+#if defined(WDT_CONFIG_RELOAD_VALUE)
+#undef NRFX_WDT_CONFIG_RELOAD_VALUE
+#define NRFX_WDT_CONFIG_RELOAD_VALUE WDT_CONFIG_RELOAD_VALUE
+#endif
+#if defined(WDT_CONFIG_IRQ_PRIORITY)
+#undef NRFX_WDT_CONFIG_IRQ_PRIORITY
+#define NRFX_WDT_CONFIG_IRQ_PRIORITY WDT_CONFIG_IRQ_PRIORITY
+#endif
+
+#if defined(WDT_CONFIG_LOG_ENABLED)
+#undef NRFX_WDT_CONFIG_LOG_ENABLED
+#define NRFX_WDT_CONFIG_LOG_ENABLED WDT_CONFIG_LOG_ENABLED
+#endif
+#if defined(WDT_CONFIG_LOG_LEVEL)
+#undef NRFX_WDT_CONFIG_LOG_LEVEL
+#define NRFX_WDT_CONFIG_LOG_LEVEL WDT_CONFIG_LOG_LEVEL
+#endif
+#if defined(WDT_CONFIG_INFO_COLOR)
+#undef NRFX_WDT_CONFIG_INFO_COLOR
+#define NRFX_WDT_CONFIG_INFO_COLOR WDT_CONFIG_INFO_COLOR
+#endif
+#if defined(WDT_CONFIG_DEBUG_COLOR)
+#undef NRFX_WDT_CONFIG_DEBUG_COLOR
+#define NRFX_WDT_CONFIG_DEBUG_COLOR WDT_CONFIG_DEBUG_COLOR
+#endif
+
+#endif // defined(WDT_ENABLED)
+
+#endif // APPLY_OLD_CONFIG_H__
diff --git a/third_party/NordicSemiconductor/dependencies/nordic_common.h b/third_party/NordicSemiconductor/dependencies/nordic_common.h
index d38719f..8fcaf5d 100644
--- a/third_party/NordicSemiconductor/dependencies/nordic_common.h
+++ b/third_party/NordicSemiconductor/dependencies/nordic_common.h
@@ -1,215 +1,215 @@
-/**
- * Copyright (c) 2008 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-/** @file
- * @brief Common defines and macros for firmware developed by Nordic Semiconductor.
- */
-
-#ifndef NORDIC_COMMON_H__
-#define NORDIC_COMMON_H__
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @brief Check if selected module is enabled
- *
- * This is save function for driver enable checking.
- * Correct from Lint point of view (not using default of undefined value).
- *
- * Usage:
- * @code
- #if NRF_MODULE_ENABLED(UART)
- ...
- #endif
- * @endcode
- *
- * @param module The module name.
- *
- * @retval 1 The macro <module>_ENABLE is defined and is non-zero.
- * @retval 0 The macro <module>_ENABLE is not defined or it equals zero.
- *
- * @note
- * This macro intentionally does not implement second expansion level.
- * The name of the module to be checked has to be given directly as a parameter.
- * And given parameter would be connected with @c _ENABLED postfix directly
- * without evaluating its value.
- */
-//lint -emacro(491,NRF_MODULE_ENABLED) // Suppers warning 491 "non-standard use of 'defined' preprocessor operator"
-#ifdef NRF_MODULE_ENABLE_ALL
-#warning "Do not use NRF_MODULE_ENABLE_ALL for real builds."
-#define NRF_MODULE_ENABLED(module) 1
-#else
-#define NRF_MODULE_ENABLED(module) \
- ((defined(module ## _ENABLED) && (module ## _ENABLED)) ? 1 : 0)
-#endif
-/** The upper 8 bits of a 32 bit value */
-//lint -emacro(572,MSB_32) // Suppress warning 572 "Excessive shift value"
-#define MSB_32(a) (((a) & 0xFF000000) >> 24)
-/** The lower 8 bits (of a 32 bit value) */
-#define LSB_32(a) ((a) & 0x000000FF)
-
-/** The upper 8 bits of a 16 bit value */
-//lint -emacro(572,MSB_16) // Suppress warning 572 "Excessive shift value"
-#define MSB_16(a) (((a) & 0xFF00) >> 8)
-/** The lower 8 bits (of a 16 bit value) */
-#define LSB_16(a) ((a) & 0x00FF)
-
-/** Leaves the minimum of the two 32-bit arguments */
-/*lint -emacro(506, MIN) */ /* Suppress "Constant value Boolean */
-#define MIN(a, b) ((a) < (b) ? (a) : (b))
-/** Leaves the maximum of the two 32-bit arguments */
-/*lint -emacro(506, MAX) */ /* Suppress "Constant value Boolean */
-#define MAX(a, b) ((a) < (b) ? (b) : (a))
-
-/**@brief Concatenates two parameters.
- *
- * It realizes two level expansion to make it sure that all the parameters
- * are actually expanded before gluing them together.
- *
- * @param p1 First parameter to concatenating
- * @param p2 Second parameter to concatenating
- *
- * @return Two parameters glued together.
- * They have to create correct C mnemonic in other case
- * preprocessor error would be generated.
- *
- * @sa CONCAT_3
- */
-#define CONCAT_2(p1, p2) CONCAT_2_(p1, p2)
-/** Auxiliary macro used by @ref CONCAT_2 */
-#define CONCAT_2_(p1, p2) p1##p2
-
-/**@brief Concatenates three parameters.
- *
- * It realizes two level expansion to make it sure that all the parameters
- * are actually expanded before gluing them together.
- *
- * @param p1 First parameter to concatenating
- * @param p2 Second parameter to concatenating
- * @param p3 Third parameter to concatenating
- *
- * @return Three parameters glued together.
- * They have to create correct C mnemonic in other case
- * preprocessor error would be generated.
- *
- * @sa CONCAT_2
- */
-#define CONCAT_3(p1, p2, p3) CONCAT_3_(p1, p2, p3)
-/** Auxiliary macro used by @ref CONCAT_3 */
-#define CONCAT_3_(p1, p2, p3) p1##p2##p3
-
-#define STRINGIFY_(val) #val
-/** Converts a macro argument into a character constant.
- */
-#define STRINGIFY(val) STRINGIFY_(val)
-
-/** Counts number of elements inside the array
- */
-#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
-
-/**@brief Set a bit in the uint32 word.
- *
- * @param[in] W Word whose bit is being set.
- * @param[in] B Bit number in the word to be set.
- */
-#define SET_BIT(W, B) ((W) |= (uint32_t)(1U << (B)))
-
-
-/**@brief Clears a bit in the uint32 word.
- *
- * @param[in] W Word whose bit is to be cleared.
- * @param[in] B Bit number in the word to be cleared.
- */
-#define CLR_BIT(W, B) ((W) &= (~(uint32_t)(1U << (B))))
-
-
-/**@brief Checks if a bit is set.
- *
- * @param[in] W Word whose bit is to be checked.
- * @param[in] B Bit number in the word to be checked.
- *
- * @retval 1 if bit is set.
- * @retval 0 if bit is not set.
- */
-#define IS_SET(W, B) (((W) >> (B)) & 1)
-
-#define BIT_0 0x01 /**< The value of bit 0 */
-#define BIT_1 0x02 /**< The value of bit 1 */
-#define BIT_2 0x04 /**< The value of bit 2 */
-#define BIT_3 0x08 /**< The value of bit 3 */
-#define BIT_4 0x10 /**< The value of bit 4 */
-#define BIT_5 0x20 /**< The value of bit 5 */
-#define BIT_6 0x40 /**< The value of bit 6 */
-#define BIT_7 0x80 /**< The value of bit 7 */
-#define BIT_8 0x0100 /**< The value of bit 8 */
-#define BIT_9 0x0200 /**< The value of bit 9 */
-#define BIT_10 0x0400 /**< The value of bit 10 */
-#define BIT_11 0x0800 /**< The value of bit 11 */
-#define BIT_12 0x1000 /**< The value of bit 12 */
-#define BIT_13 0x2000 /**< The value of bit 13 */
-#define BIT_14 0x4000 /**< The value of bit 14 */
-#define BIT_15 0x8000 /**< The value of bit 15 */
-#define BIT_16 0x00010000 /**< The value of bit 16 */
-#define BIT_17 0x00020000 /**< The value of bit 17 */
-#define BIT_18 0x00040000 /**< The value of bit 18 */
-#define BIT_19 0x00080000 /**< The value of bit 19 */
-#define BIT_20 0x00100000 /**< The value of bit 20 */
-#define BIT_21 0x00200000 /**< The value of bit 21 */
-#define BIT_22 0x00400000 /**< The value of bit 22 */
-#define BIT_23 0x00800000 /**< The value of bit 23 */
-#define BIT_24 0x01000000 /**< The value of bit 24 */
-#define BIT_25 0x02000000 /**< The value of bit 25 */
-#define BIT_26 0x04000000 /**< The value of bit 26 */
-#define BIT_27 0x08000000 /**< The value of bit 27 */
-#define BIT_28 0x10000000 /**< The value of bit 28 */
-#define BIT_29 0x20000000 /**< The value of bit 29 */
-#define BIT_30 0x40000000 /**< The value of bit 30 */
-#define BIT_31 0x80000000 /**< The value of bit 31 */
-
-#define UNUSED_VARIABLE(X) ((void)(X))
-#define UNUSED_PARAMETER(X) UNUSED_VARIABLE(X)
-#define UNUSED_RETURN_VALUE(X) UNUSED_VARIABLE(X)
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // NORDIC_COMMON_H__
+/**
+ * Copyright (c) 2008 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/** @file
+ * @brief Common defines and macros for firmware developed by Nordic Semiconductor.
+ */
+
+#ifndef NORDIC_COMMON_H__
+#define NORDIC_COMMON_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Check if selected module is enabled
+ *
+ * This is save function for driver enable checking.
+ * Correct from Lint point of view (not using default of undefined value).
+ *
+ * Usage:
+ * @code
+ #if NRF_MODULE_ENABLED(UART)
+ ...
+ #endif
+ * @endcode
+ *
+ * @param module The module name.
+ *
+ * @retval 1 The macro <module>_ENABLE is defined and is non-zero.
+ * @retval 0 The macro <module>_ENABLE is not defined or it equals zero.
+ *
+ * @note
+ * This macro intentionally does not implement second expansion level.
+ * The name of the module to be checked has to be given directly as a parameter.
+ * And given parameter would be connected with @c _ENABLED postfix directly
+ * without evaluating its value.
+ */
+//lint -emacro(491,NRF_MODULE_ENABLED) // Suppers warning 491 "non-standard use of 'defined' preprocessor operator"
+#ifdef NRF_MODULE_ENABLE_ALL
+#warning "Do not use NRF_MODULE_ENABLE_ALL for real builds."
+#define NRF_MODULE_ENABLED(module) 1
+#else
+#define NRF_MODULE_ENABLED(module) \
+ ((defined(module ## _ENABLED) && (module ## _ENABLED)) ? 1 : 0)
+#endif
+/** The upper 8 bits of a 32 bit value */
+//lint -emacro(572,MSB_32) // Suppress warning 572 "Excessive shift value"
+#define MSB_32(a) (((a) & 0xFF000000) >> 24)
+/** The lower 8 bits (of a 32 bit value) */
+#define LSB_32(a) ((a) & 0x000000FF)
+
+/** The upper 8 bits of a 16 bit value */
+//lint -emacro(572,MSB_16) // Suppress warning 572 "Excessive shift value"
+#define MSB_16(a) (((a) & 0xFF00) >> 8)
+/** The lower 8 bits (of a 16 bit value) */
+#define LSB_16(a) ((a) & 0x00FF)
+
+/** Leaves the minimum of the two 32-bit arguments */
+/*lint -emacro(506, MIN) */ /* Suppress "Constant value Boolean */
+#define MIN(a, b) ((a) < (b) ? (a) : (b))
+/** Leaves the maximum of the two 32-bit arguments */
+/*lint -emacro(506, MAX) */ /* Suppress "Constant value Boolean */
+#define MAX(a, b) ((a) < (b) ? (b) : (a))
+
+/**@brief Concatenates two parameters.
+ *
+ * It realizes two level expansion to make it sure that all the parameters
+ * are actually expanded before gluing them together.
+ *
+ * @param p1 First parameter to concatenating
+ * @param p2 Second parameter to concatenating
+ *
+ * @return Two parameters glued together.
+ * They have to create correct C mnemonic in other case
+ * preprocessor error would be generated.
+ *
+ * @sa CONCAT_3
+ */
+#define CONCAT_2(p1, p2) CONCAT_2_(p1, p2)
+/** Auxiliary macro used by @ref CONCAT_2 */
+#define CONCAT_2_(p1, p2) p1##p2
+
+/**@brief Concatenates three parameters.
+ *
+ * It realizes two level expansion to make it sure that all the parameters
+ * are actually expanded before gluing them together.
+ *
+ * @param p1 First parameter to concatenating
+ * @param p2 Second parameter to concatenating
+ * @param p3 Third parameter to concatenating
+ *
+ * @return Three parameters glued together.
+ * They have to create correct C mnemonic in other case
+ * preprocessor error would be generated.
+ *
+ * @sa CONCAT_2
+ */
+#define CONCAT_3(p1, p2, p3) CONCAT_3_(p1, p2, p3)
+/** Auxiliary macro used by @ref CONCAT_3 */
+#define CONCAT_3_(p1, p2, p3) p1##p2##p3
+
+#define STRINGIFY_(val) #val
+/** Converts a macro argument into a character constant.
+ */
+#define STRINGIFY(val) STRINGIFY_(val)
+
+/** Counts number of elements inside the array
+ */
+#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
+
+/**@brief Set a bit in the uint32 word.
+ *
+ * @param[in] W Word whose bit is being set.
+ * @param[in] B Bit number in the word to be set.
+ */
+#define SET_BIT(W, B) ((W) |= (uint32_t)(1U << (B)))
+
+
+/**@brief Clears a bit in the uint32 word.
+ *
+ * @param[in] W Word whose bit is to be cleared.
+ * @param[in] B Bit number in the word to be cleared.
+ */
+#define CLR_BIT(W, B) ((W) &= (~(uint32_t)(1U << (B))))
+
+
+/**@brief Checks if a bit is set.
+ *
+ * @param[in] W Word whose bit is to be checked.
+ * @param[in] B Bit number in the word to be checked.
+ *
+ * @retval 1 if bit is set.
+ * @retval 0 if bit is not set.
+ */
+#define IS_SET(W, B) (((W) >> (B)) & 1)
+
+#define BIT_0 0x01 /**< The value of bit 0 */
+#define BIT_1 0x02 /**< The value of bit 1 */
+#define BIT_2 0x04 /**< The value of bit 2 */
+#define BIT_3 0x08 /**< The value of bit 3 */
+#define BIT_4 0x10 /**< The value of bit 4 */
+#define BIT_5 0x20 /**< The value of bit 5 */
+#define BIT_6 0x40 /**< The value of bit 6 */
+#define BIT_7 0x80 /**< The value of bit 7 */
+#define BIT_8 0x0100 /**< The value of bit 8 */
+#define BIT_9 0x0200 /**< The value of bit 9 */
+#define BIT_10 0x0400 /**< The value of bit 10 */
+#define BIT_11 0x0800 /**< The value of bit 11 */
+#define BIT_12 0x1000 /**< The value of bit 12 */
+#define BIT_13 0x2000 /**< The value of bit 13 */
+#define BIT_14 0x4000 /**< The value of bit 14 */
+#define BIT_15 0x8000 /**< The value of bit 15 */
+#define BIT_16 0x00010000 /**< The value of bit 16 */
+#define BIT_17 0x00020000 /**< The value of bit 17 */
+#define BIT_18 0x00040000 /**< The value of bit 18 */
+#define BIT_19 0x00080000 /**< The value of bit 19 */
+#define BIT_20 0x00100000 /**< The value of bit 20 */
+#define BIT_21 0x00200000 /**< The value of bit 21 */
+#define BIT_22 0x00400000 /**< The value of bit 22 */
+#define BIT_23 0x00800000 /**< The value of bit 23 */
+#define BIT_24 0x01000000 /**< The value of bit 24 */
+#define BIT_25 0x02000000 /**< The value of bit 25 */
+#define BIT_26 0x04000000 /**< The value of bit 26 */
+#define BIT_27 0x08000000 /**< The value of bit 27 */
+#define BIT_28 0x10000000 /**< The value of bit 28 */
+#define BIT_29 0x20000000 /**< The value of bit 29 */
+#define BIT_30 0x40000000 /**< The value of bit 30 */
+#define BIT_31 0x80000000 /**< The value of bit 31 */
+
+#define UNUSED_VARIABLE(X) ((void)(X))
+#define UNUSED_PARAMETER(X) UNUSED_VARIABLE(X)
+#define UNUSED_RETURN_VALUE(X) UNUSED_VARIABLE(X)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // NORDIC_COMMON_H__
diff --git a/third_party/NordicSemiconductor/dependencies/nrf_assert.h b/third_party/NordicSemiconductor/dependencies/nrf_assert.h
index d46a092..8685362 100644
--- a/third_party/NordicSemiconductor/dependencies/nrf_assert.h
+++ b/third_party/NordicSemiconductor/dependencies/nrf_assert.h
@@ -1,122 +1,122 @@
-/**
- * Copyright (c) 2006 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-/** @file
- * @brief Utilities for verifying program logic
- */
-
-#ifndef NRF_ASSERT_H_
-#define NRF_ASSERT_H_
-
-#include <stdint.h>
-#include "nrf.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/** @brief Function for handling assertions.
- *
- *
- * @note
- * This function is called when an assertion has triggered.
- *
- * @note
- * This function is deprecated and will be removed in future releases.
- * Use app_error_fault_handler instead.
- *
- *
- * @post
- * All hardware is put into an idle non-emitting state (in particular the radio is highly
- * important to switch off since the radio might be in a state that makes it send
- * packets continiously while a typical final infinit ASSERT loop is executing).
- *
- *
- * @param line_num The line number where the assertion is called
- * @param file_name Pointer to the file name
- */
-//lint -save -esym(14, assert_nrf_callback)
-void assert_nrf_callback(uint16_t line_num, const uint8_t *file_name);
-//lint -restore
-
-#if (defined(DEBUG_NRF) || defined(DEBUG_NRF_USER))
-#define NRF_ASSERT_PRESENT 1
-#else
-#define NRF_ASSERT_PRESENT 0
-#endif
-
-//#if defined(DEBUG_NRF) || defined(DEBUG_NRF_USER)
-
-/*lint -emacro(506, ASSERT) */ /* Suppress "Constant value Boolean */
-/*lint -emacro(774, ASSERT) */ /* Suppress "Boolean within 'if' always evaluates to True" */ \
-
-/** @brief Function for checking intended for production code.
- *
- * Check passes if "expr" evaluates to true. */
-
-#ifdef _lint
-#define ASSERT(expr) \
-if (expr) \
-{ \
-} \
-else \
-{ \
- while (1); \
-}
-#else //_lint
-#define ASSERT(expr) \
-if (NRF_ASSERT_PRESENT) \
-{ \
- if (expr) \
- { \
- } \
- else \
- { \
- assert_nrf_callback((uint16_t)__LINE__, (uint8_t *)__FILE__); \
- } \
-}
-
-#endif
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* NRF_ASSERT_H_ */
+/**
+ * Copyright (c) 2006 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/** @file
+ * @brief Utilities for verifying program logic
+ */
+
+#ifndef NRF_ASSERT_H_
+#define NRF_ASSERT_H_
+
+#include <stdint.h>
+#include "nrf.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @brief Function for handling assertions.
+ *
+ *
+ * @note
+ * This function is called when an assertion has triggered.
+ *
+ * @note
+ * This function is deprecated and will be removed in future releases.
+ * Use app_error_fault_handler instead.
+ *
+ *
+ * @post
+ * All hardware is put into an idle non-emitting state (in particular the radio is highly
+ * important to switch off since the radio might be in a state that makes it send
+ * packets continiously while a typical final infinit ASSERT loop is executing).
+ *
+ *
+ * @param line_num The line number where the assertion is called
+ * @param file_name Pointer to the file name
+ */
+//lint -save -esym(14, assert_nrf_callback)
+void assert_nrf_callback(uint16_t line_num, const uint8_t *file_name);
+//lint -restore
+
+#if (defined(DEBUG_NRF) || defined(DEBUG_NRF_USER))
+#define NRF_ASSERT_PRESENT 1
+#else
+#define NRF_ASSERT_PRESENT 0
+#endif
+
+//#if defined(DEBUG_NRF) || defined(DEBUG_NRF_USER)
+
+/*lint -emacro(506, ASSERT) */ /* Suppress "Constant value Boolean */
+/*lint -emacro(774, ASSERT) */ /* Suppress "Boolean within 'if' always evaluates to True" */ \
+
+/** @brief Function for checking intended for production code.
+ *
+ * Check passes if "expr" evaluates to true. */
+
+#ifdef _lint
+#define ASSERT(expr) \
+if (expr) \
+{ \
+} \
+else \
+{ \
+ while (1); \
+}
+#else //_lint
+#define ASSERT(expr) \
+if (NRF_ASSERT_PRESENT) \
+{ \
+ if (expr) \
+ { \
+ } \
+ else \
+ { \
+ assert_nrf_callback((uint16_t)__LINE__, (uint8_t *)__FILE__); \
+ } \
+}
+
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* NRF_ASSERT_H_ */
diff --git a/third_party/NordicSemiconductor/dependencies/nrf_error.h b/third_party/NordicSemiconductor/dependencies/nrf_error.h
index e97fa06..c673beb 100644
--- a/third_party/NordicSemiconductor/dependencies/nrf_error.h
+++ b/third_party/NordicSemiconductor/dependencies/nrf_error.h
@@ -1,95 +1,95 @@
-/**
- * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-/* Header guard */
-
-#ifndef SOFTDEVICE_PRESENT
-
-/**
- @defgroup nrf_error Global Error Codes
- @{
-
- @brief Global Error definitions
-*/
-
-#ifndef NRF_ERROR_H__
-#define NRF_ERROR_H__
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/** @defgroup NRF_ERRORS_BASE Error Codes Base number definitions
- * @{ */
-#define NRF_ERROR_BASE_NUM (0x0) ///< Global error base
-#define NRF_ERROR_SDM_BASE_NUM (0x1000) ///< SDM error base
-#define NRF_ERROR_SOC_BASE_NUM (0x2000) ///< SoC error base
-#define NRF_ERROR_STK_BASE_NUM (0x3000) ///< STK error base
-/** @} */
-
-#define NRF_SUCCESS (NRF_ERROR_BASE_NUM + 0) ///< Successful command
-#define NRF_ERROR_SVC_HANDLER_MISSING (NRF_ERROR_BASE_NUM + 1) ///< SVC handler is missing
-#define NRF_ERROR_SOFTDEVICE_NOT_ENABLED (NRF_ERROR_BASE_NUM + 2) ///< SoftDevice has not been enabled
-#define NRF_ERROR_INTERNAL (NRF_ERROR_BASE_NUM + 3) ///< Internal Error
-#define NRF_ERROR_NO_MEM (NRF_ERROR_BASE_NUM + 4) ///< No Memory for operation
-#define NRF_ERROR_NOT_FOUND (NRF_ERROR_BASE_NUM + 5) ///< Not found
-#define NRF_ERROR_NOT_SUPPORTED (NRF_ERROR_BASE_NUM + 6) ///< Not supported
-#define NRF_ERROR_INVALID_PARAM (NRF_ERROR_BASE_NUM + 7) ///< Invalid Parameter
-#define NRF_ERROR_INVALID_STATE (NRF_ERROR_BASE_NUM + 8) ///< Invalid state, operation disallowed in this state
-#define NRF_ERROR_INVALID_LENGTH (NRF_ERROR_BASE_NUM + 9) ///< Invalid Length
-#define NRF_ERROR_INVALID_FLAGS (NRF_ERROR_BASE_NUM + 10) ///< Invalid Flags
-#define NRF_ERROR_INVALID_DATA (NRF_ERROR_BASE_NUM + 11) ///< Invalid Data
-#define NRF_ERROR_DATA_SIZE (NRF_ERROR_BASE_NUM + 12) ///< Data size exceeds limit
-#define NRF_ERROR_TIMEOUT (NRF_ERROR_BASE_NUM + 13) ///< Operation timed out
-#define NRF_ERROR_NULL (NRF_ERROR_BASE_NUM + 14) ///< Null Pointer
-#define NRF_ERROR_FORBIDDEN (NRF_ERROR_BASE_NUM + 15) ///< Forbidden Operation
-#define NRF_ERROR_INVALID_ADDR (NRF_ERROR_BASE_NUM + 16) ///< Bad Memory Address
-#define NRF_ERROR_BUSY (NRF_ERROR_BASE_NUM + 17) ///< Busy
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // NRF_ERROR_H__
-
-/**
- @}
-*/
-
-#endif // SOFTDEVICE_PRESENT
+/**
+ * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/* Header guard */
+
+#ifndef SOFTDEVICE_PRESENT
+
+/**
+ @defgroup nrf_error Global Error Codes
+ @{
+
+ @brief Global Error definitions
+*/
+
+#ifndef NRF_ERROR_H__
+#define NRF_ERROR_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @defgroup NRF_ERRORS_BASE Error Codes Base number definitions
+ * @{ */
+#define NRF_ERROR_BASE_NUM (0x0) ///< Global error base
+#define NRF_ERROR_SDM_BASE_NUM (0x1000) ///< SDM error base
+#define NRF_ERROR_SOC_BASE_NUM (0x2000) ///< SoC error base
+#define NRF_ERROR_STK_BASE_NUM (0x3000) ///< STK error base
+/** @} */
+
+#define NRF_SUCCESS (NRF_ERROR_BASE_NUM + 0) ///< Successful command
+#define NRF_ERROR_SVC_HANDLER_MISSING (NRF_ERROR_BASE_NUM + 1) ///< SVC handler is missing
+#define NRF_ERROR_SOFTDEVICE_NOT_ENABLED (NRF_ERROR_BASE_NUM + 2) ///< SoftDevice has not been enabled
+#define NRF_ERROR_INTERNAL (NRF_ERROR_BASE_NUM + 3) ///< Internal Error
+#define NRF_ERROR_NO_MEM (NRF_ERROR_BASE_NUM + 4) ///< No Memory for operation
+#define NRF_ERROR_NOT_FOUND (NRF_ERROR_BASE_NUM + 5) ///< Not found
+#define NRF_ERROR_NOT_SUPPORTED (NRF_ERROR_BASE_NUM + 6) ///< Not supported
+#define NRF_ERROR_INVALID_PARAM (NRF_ERROR_BASE_NUM + 7) ///< Invalid Parameter
+#define NRF_ERROR_INVALID_STATE (NRF_ERROR_BASE_NUM + 8) ///< Invalid state, operation disallowed in this state
+#define NRF_ERROR_INVALID_LENGTH (NRF_ERROR_BASE_NUM + 9) ///< Invalid Length
+#define NRF_ERROR_INVALID_FLAGS (NRF_ERROR_BASE_NUM + 10) ///< Invalid Flags
+#define NRF_ERROR_INVALID_DATA (NRF_ERROR_BASE_NUM + 11) ///< Invalid Data
+#define NRF_ERROR_DATA_SIZE (NRF_ERROR_BASE_NUM + 12) ///< Data size exceeds limit
+#define NRF_ERROR_TIMEOUT (NRF_ERROR_BASE_NUM + 13) ///< Operation timed out
+#define NRF_ERROR_NULL (NRF_ERROR_BASE_NUM + 14) ///< Null Pointer
+#define NRF_ERROR_FORBIDDEN (NRF_ERROR_BASE_NUM + 15) ///< Forbidden Operation
+#define NRF_ERROR_INVALID_ADDR (NRF_ERROR_BASE_NUM + 16) ///< Bad Memory Address
+#define NRF_ERROR_BUSY (NRF_ERROR_BASE_NUM + 17) ///< Busy
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // NRF_ERROR_H__
+
+/**
+ @}
+*/
+
+#endif // SOFTDEVICE_PRESENT
diff --git a/third_party/NordicSemiconductor/dependencies/nrf_log.h b/third_party/NordicSemiconductor/dependencies/nrf_log.h
index 870f6ec..d709d23 100644
--- a/third_party/NordicSemiconductor/dependencies/nrf_log.h
+++ b/third_party/NordicSemiconductor/dependencies/nrf_log.h
@@ -1,291 +1,291 @@
-/**
- * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-/**@file
- *
- * @defgroup nrf_log Logger module
- * @{
- * @ingroup app_common
- *
- * @brief The nrf_log module interface.
- */
-
-#ifndef NRF_LOG_H_
-#define NRF_LOG_H_
-
-#include "sdk_common.h"
-#include "nrf_section.h"
-#if NRF_MODULE_ENABLED(NRF_LOG)
-#include "nrf_strerror.h"
-#define NRF_LOG_ERROR_STRING_GET(code) nrf_strerror_get(code)
-#else
-#define NRF_LOG_ERROR_STRING_GET(code) ""
-#endif
-
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/** @brief Severity level for the module.
- *
- * The severity level can be defined in a module to override the default.
- */
-#ifndef NRF_LOG_LEVEL
- #define NRF_LOG_LEVEL NRF_LOG_DEFAULT_LEVEL
-#endif
-
-/** @brief Initial severity if filtering is enabled.
- */
-#ifndef NRF_LOG_INITIAL_LEVEL
- #define NRF_LOG_INITIAL_LEVEL NRF_LOG_LEVEL
-#endif
-
-
-#include "nrf_log_internal.h"
-
-/** @def NRF_LOG_ERROR
- * @brief Macro for logging error messages. It takes a printf-like, formatted
- * string with up to seven arguments.
- *
- * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs.
- */
-
-/** @def NRF_LOG_WARNING
- * @brief Macro for logging error messages. It takes a printf-like, formatted
- * string with up to seven arguments.
- *
- * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes warning logs.
- */
-
-/** @def NRF_LOG_INFO
- * @brief Macro for logging error messages. It takes a printf-like, formatted
- * string with up to seven arguments.
- *
- * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes info logs.
- */
-
-/** @def NRF_LOG_DEBUG
- * @brief Macro for logging error messages. It takes a printf-like, formatted
- * string with up to seven arguments.
- *
- * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes debug logs.
- */
-
-#define NRF_LOG_ERROR(...) NRF_LOG_INTERNAL_ERROR(__VA_ARGS__)
-#define NRF_LOG_WARNING(...) NRF_LOG_INTERNAL_WARNING( __VA_ARGS__)
-#define NRF_LOG_INFO(...) NRF_LOG_INTERNAL_INFO( __VA_ARGS__)
-#define NRF_LOG_DEBUG(...) NRF_LOG_INTERNAL_DEBUG( __VA_ARGS__)
-
-/** @def NRF_LOG_INST_ERROR
- * @brief Macro for logging error messages for a given module instance. It takes a printf-like, formatted
- * string with up to seven arguments.
- *
- * @param p_inst Pointer to the instance with logging support.
- *
- * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs.
- */
-
-/** @def NRF_LOG_INST_WARNING
- * @brief Macro for logging error messages for a given module instance. It takes a printf-like, formatted
- * string with up to seven arguments.
- *
- * @param p_inst Pointer to the instance with logging support.
- *
- * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs.
- */
-
-/** @def NRF_LOG_INST_INFO
- * @brief Macro for logging error messages for a given module instance. It takes a printf-like, formatted
- * string with up to seven arguments.
- *
- * @param p_inst Pointer to the instance with logging support.
- *
- * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs.
- */
-
-/** @def NRF_LOG_INST_DEBUG
- * @brief Macro for logging error messages for given module instance. It takes a printf-like, formatted
- * string with up to seven arguments.
- *
- * @param p_inst Pointer to the instance with logging support.
- *
- * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs.
- */
-#define NRF_LOG_INST_ERROR(p_inst,...) NRF_LOG_INTERNAL_INST_ERROR(p_inst,__VA_ARGS__)
-#define NRF_LOG_INST_WARNING(p_inst,...) NRF_LOG_INTERNAL_INST_WARNING(p_inst,__VA_ARGS__)
-#define NRF_LOG_INST_INFO(p_inst,...) NRF_LOG_INTERNAL_INST_INFO(p_inst, __VA_ARGS__)
-#define NRF_LOG_INST_DEBUG(p_inst,...) NRF_LOG_INTERNAL_INST_DEBUG(p_inst, __VA_ARGS__)
-
-/**
- * @brief Macro for logging a formatted string without any prefix or timestamp.
- */
-#define NRF_LOG_RAW_INFO(...) NRF_LOG_INTERNAL_RAW_INFO( __VA_ARGS__)
-
-/** @def NRF_LOG_HEXDUMP_ERROR
- * @brief Macro for logging raw bytes.
- * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs.
- *
- * @param p_data Pointer to data.
- * @param len Data length in bytes.
- */
-/** @def NRF_LOG_HEXDUMP_WARNING
- * @brief Macro for logging raw bytes.
- * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes warning logs.
- *
- * @param p_data Pointer to data.
- * @param len Data length in bytes.
- */
-/** @def NRF_LOG_HEXDUMP_INFO
- * @brief Macro for logging raw bytes.
- * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes info logs.
- *
- * @param p_data Pointer to data.
- * @param len Data length in bytes.
- */
-/** @def NRF_LOG_HEXDUMP_DEBUG
- * @brief Macro for logging raw bytes.
- * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes debug logs.
- *
- * @param p_data Pointer to data.
- * @param len Data length in bytes.
- */
-#define NRF_LOG_HEXDUMP_ERROR(p_data, len) NRF_LOG_INTERNAL_HEXDUMP_ERROR(p_data, len)
-#define NRF_LOG_HEXDUMP_WARNING(p_data, len) NRF_LOG_INTERNAL_HEXDUMP_WARNING(p_data, len)
-#define NRF_LOG_HEXDUMP_INFO(p_data, len) NRF_LOG_INTERNAL_HEXDUMP_INFO(p_data, len)
-#define NRF_LOG_HEXDUMP_DEBUG(p_data, len) NRF_LOG_INTERNAL_HEXDUMP_DEBUG(p_data, len)
-
-/** @def NRF_LOG_HEXDUMP_INST_ERROR
- * @brief Macro for logging raw bytes for a specific module instance.
- * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs.
- *
- * @param p_inst Pointer to the instance with logging support.
- * @param p_data Pointer to data.
- * @param len Data length in bytes.
- */
-/** @def NRF_LOG_HEXDUMP_INST_WARNING
- * @brief Macro for logging raw bytes for a specific module instance.
- * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs.
- *
- * @param p_inst Pointer to the instance with logging support.
- * @param p_data Pointer to data.
- * @param len Data length in bytes.
- */
-/** @def NRF_LOG_HEXDUMP_INST_INFO
- * @brief Macro for logging raw bytes for a specific module instance.
- * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs.
- *
- * @param p_inst Pointer to the instance with logging support.
- * @param p_data Pointer to data.
- * @param len Data length in bytes.
- */
-/** @def NRF_LOG_HEXDUMP_INST_DEBUG
- * @brief Macro for logging raw bytes for a specific module instance.
- * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs.
- *
- * @param p_inst Pointer to the instance with logging support.
- * @param p_data Pointer to data.
- * @param len Data length in bytes.
- */
-#define NRF_LOG_HEXDUMP_INST_ERROR(p_inst, p_data, len) NRF_LOG_INTERNAL_HEXDUMP_INST_ERROR(p_inst, p_data, len)
-#define NRF_LOG_HEXDUMP_INST_WARNING(p_inst, p_data, len) NRF_LOG_INTERNAL_HEXDUMP_INST_WARNING(p_inst, p_data, len)
-#define NRF_LOG_HEXDUMP_INST_INFO(p_inst, p_data, len) NRF_LOG_INTERNAL_HEXDUMP_INST_INFO(p_inst, p_data, len)
-#define NRF_LOG_HEXDUMP_INST_DEBUG(p_inst, p_data, len) NRF_LOG_INTERNAL_HEXDUMP_INST_DEBUG(p_inst, p_data, len)
-
-/**
- * @brief Macro for logging hexdump without any prefix or timestamp.
- */
-#define NRF_LOG_RAW_HEXDUMP_INFO(p_data, len) NRF_LOG_INTERNAL_RAW_HEXDUMP_INFO(p_data, len)
-
-
-/**
- * @brief Macro for copying a string to internal logger buffer if logs are deferred.
- *
- * @param _str String.
- */
-#define NRF_LOG_PUSH(_str) NRF_LOG_INTERNAL_LOG_PUSH(_str)
-
-/**
- * @brief Function for copying a string to the internal logger buffer if logs are deferred.
- *
- * Use this function to store a string that is volatile (for example allocated
- * on stack) or that may change before the deferred logs are processed. Such string is copied
- * into the internal logger buffer and is persistent until the log is processed.
- *
- * @note If the logs are not deferred, then this function returns the input parameter.
- *
- * @param p_str Pointer to the user string.
- *
- * @return Address to the location where the string is stored in the internal logger buffer.
- */
-uint32_t nrf_log_push(char * const p_str);
-
-/**
- * @brief Macro to be used in a formatted string to a pass float number to the log.
- *
- * Use this macro in a formatted string instead of the %f specifier together with
- * @ref NRF_LOG_FLOAT macro.
- * Example: NRF_LOG_INFO("My float number" NRF_LOG_FLOAT_MARKER "\r\n", NRF_LOG_FLOAT(f)))
- */
-#define NRF_LOG_FLOAT_MARKER "%s%d.%02d"
-
-/**
- * @brief Macro for dissecting a float number into two numbers (integer and residuum).
- */
-#define NRF_LOG_FLOAT(val) (uint32_t)(((val) < 0 && (val) > -1.0) ? "-" : ""), \
- (int32_t)(val), \
- (int32_t)((((val) > 0) ? (val) - (int32_t)(val) \
- : (int32_t)(val) - (val))*100)
-
-
-/**
- * @brief Macro for registering an independent module.
- *
- * Registration creates set of dynamic (RAM) and constant variables associated with the module.
- */
-#define NRF_LOG_MODULE_REGISTER() NRF_LOG_INTERNAL_MODULE_REGISTER()
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // NRF_LOG_H_
-
-/** @} */
+/**
+ * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/**@file
+ *
+ * @defgroup nrf_log Logger module
+ * @{
+ * @ingroup app_common
+ *
+ * @brief The nrf_log module interface.
+ */
+
+#ifndef NRF_LOG_H_
+#define NRF_LOG_H_
+
+#include "sdk_common.h"
+#include "nrf_section.h"
+#if NRF_MODULE_ENABLED(NRF_LOG)
+#include "nrf_strerror.h"
+#define NRF_LOG_ERROR_STRING_GET(code) nrf_strerror_get(code)
+#else
+#define NRF_LOG_ERROR_STRING_GET(code) ""
+#endif
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @brief Severity level for the module.
+ *
+ * The severity level can be defined in a module to override the default.
+ */
+#ifndef NRF_LOG_LEVEL
+ #define NRF_LOG_LEVEL NRF_LOG_DEFAULT_LEVEL
+#endif
+
+/** @brief Initial severity if filtering is enabled.
+ */
+#ifndef NRF_LOG_INITIAL_LEVEL
+ #define NRF_LOG_INITIAL_LEVEL NRF_LOG_LEVEL
+#endif
+
+
+#include "nrf_log_internal.h"
+
+/** @def NRF_LOG_ERROR
+ * @brief Macro for logging error messages. It takes a printf-like, formatted
+ * string with up to seven arguments.
+ *
+ * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs.
+ */
+
+/** @def NRF_LOG_WARNING
+ * @brief Macro for logging error messages. It takes a printf-like, formatted
+ * string with up to seven arguments.
+ *
+ * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes warning logs.
+ */
+
+/** @def NRF_LOG_INFO
+ * @brief Macro for logging error messages. It takes a printf-like, formatted
+ * string with up to seven arguments.
+ *
+ * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes info logs.
+ */
+
+/** @def NRF_LOG_DEBUG
+ * @brief Macro for logging error messages. It takes a printf-like, formatted
+ * string with up to seven arguments.
+ *
+ * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes debug logs.
+ */
+
+#define NRF_LOG_ERROR(...) NRF_LOG_INTERNAL_ERROR(__VA_ARGS__)
+#define NRF_LOG_WARNING(...) NRF_LOG_INTERNAL_WARNING( __VA_ARGS__)
+#define NRF_LOG_INFO(...) NRF_LOG_INTERNAL_INFO( __VA_ARGS__)
+#define NRF_LOG_DEBUG(...) NRF_LOG_INTERNAL_DEBUG( __VA_ARGS__)
+
+/** @def NRF_LOG_INST_ERROR
+ * @brief Macro for logging error messages for a given module instance. It takes a printf-like, formatted
+ * string with up to seven arguments.
+ *
+ * @param p_inst Pointer to the instance with logging support.
+ *
+ * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs.
+ */
+
+/** @def NRF_LOG_INST_WARNING
+ * @brief Macro for logging error messages for a given module instance. It takes a printf-like, formatted
+ * string with up to seven arguments.
+ *
+ * @param p_inst Pointer to the instance with logging support.
+ *
+ * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs.
+ */
+
+/** @def NRF_LOG_INST_INFO
+ * @brief Macro for logging error messages for a given module instance. It takes a printf-like, formatted
+ * string with up to seven arguments.
+ *
+ * @param p_inst Pointer to the instance with logging support.
+ *
+ * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs.
+ */
+
+/** @def NRF_LOG_INST_DEBUG
+ * @brief Macro for logging error messages for given module instance. It takes a printf-like, formatted
+ * string with up to seven arguments.
+ *
+ * @param p_inst Pointer to the instance with logging support.
+ *
+ * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs.
+ */
+#define NRF_LOG_INST_ERROR(p_inst,...) NRF_LOG_INTERNAL_INST_ERROR(p_inst,__VA_ARGS__)
+#define NRF_LOG_INST_WARNING(p_inst,...) NRF_LOG_INTERNAL_INST_WARNING(p_inst,__VA_ARGS__)
+#define NRF_LOG_INST_INFO(p_inst,...) NRF_LOG_INTERNAL_INST_INFO(p_inst, __VA_ARGS__)
+#define NRF_LOG_INST_DEBUG(p_inst,...) NRF_LOG_INTERNAL_INST_DEBUG(p_inst, __VA_ARGS__)
+
+/**
+ * @brief Macro for logging a formatted string without any prefix or timestamp.
+ */
+#define NRF_LOG_RAW_INFO(...) NRF_LOG_INTERNAL_RAW_INFO( __VA_ARGS__)
+
+/** @def NRF_LOG_HEXDUMP_ERROR
+ * @brief Macro for logging raw bytes.
+ * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs.
+ *
+ * @param p_data Pointer to data.
+ * @param len Data length in bytes.
+ */
+/** @def NRF_LOG_HEXDUMP_WARNING
+ * @brief Macro for logging raw bytes.
+ * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes warning logs.
+ *
+ * @param p_data Pointer to data.
+ * @param len Data length in bytes.
+ */
+/** @def NRF_LOG_HEXDUMP_INFO
+ * @brief Macro for logging raw bytes.
+ * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes info logs.
+ *
+ * @param p_data Pointer to data.
+ * @param len Data length in bytes.
+ */
+/** @def NRF_LOG_HEXDUMP_DEBUG
+ * @brief Macro for logging raw bytes.
+ * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes debug logs.
+ *
+ * @param p_data Pointer to data.
+ * @param len Data length in bytes.
+ */
+#define NRF_LOG_HEXDUMP_ERROR(p_data, len) NRF_LOG_INTERNAL_HEXDUMP_ERROR(p_data, len)
+#define NRF_LOG_HEXDUMP_WARNING(p_data, len) NRF_LOG_INTERNAL_HEXDUMP_WARNING(p_data, len)
+#define NRF_LOG_HEXDUMP_INFO(p_data, len) NRF_LOG_INTERNAL_HEXDUMP_INFO(p_data, len)
+#define NRF_LOG_HEXDUMP_DEBUG(p_data, len) NRF_LOG_INTERNAL_HEXDUMP_DEBUG(p_data, len)
+
+/** @def NRF_LOG_HEXDUMP_INST_ERROR
+ * @brief Macro for logging raw bytes for a specific module instance.
+ * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs.
+ *
+ * @param p_inst Pointer to the instance with logging support.
+ * @param p_data Pointer to data.
+ * @param len Data length in bytes.
+ */
+/** @def NRF_LOG_HEXDUMP_INST_WARNING
+ * @brief Macro for logging raw bytes for a specific module instance.
+ * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs.
+ *
+ * @param p_inst Pointer to the instance with logging support.
+ * @param p_data Pointer to data.
+ * @param len Data length in bytes.
+ */
+/** @def NRF_LOG_HEXDUMP_INST_INFO
+ * @brief Macro for logging raw bytes for a specific module instance.
+ * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs.
+ *
+ * @param p_inst Pointer to the instance with logging support.
+ * @param p_data Pointer to data.
+ * @param len Data length in bytes.
+ */
+/** @def NRF_LOG_HEXDUMP_INST_DEBUG
+ * @brief Macro for logging raw bytes for a specific module instance.
+ * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs.
+ *
+ * @param p_inst Pointer to the instance with logging support.
+ * @param p_data Pointer to data.
+ * @param len Data length in bytes.
+ */
+#define NRF_LOG_HEXDUMP_INST_ERROR(p_inst, p_data, len) NRF_LOG_INTERNAL_HEXDUMP_INST_ERROR(p_inst, p_data, len)
+#define NRF_LOG_HEXDUMP_INST_WARNING(p_inst, p_data, len) NRF_LOG_INTERNAL_HEXDUMP_INST_WARNING(p_inst, p_data, len)
+#define NRF_LOG_HEXDUMP_INST_INFO(p_inst, p_data, len) NRF_LOG_INTERNAL_HEXDUMP_INST_INFO(p_inst, p_data, len)
+#define NRF_LOG_HEXDUMP_INST_DEBUG(p_inst, p_data, len) NRF_LOG_INTERNAL_HEXDUMP_INST_DEBUG(p_inst, p_data, len)
+
+/**
+ * @brief Macro for logging hexdump without any prefix or timestamp.
+ */
+#define NRF_LOG_RAW_HEXDUMP_INFO(p_data, len) NRF_LOG_INTERNAL_RAW_HEXDUMP_INFO(p_data, len)
+
+
+/**
+ * @brief Macro for copying a string to internal logger buffer if logs are deferred.
+ *
+ * @param _str String.
+ */
+#define NRF_LOG_PUSH(_str) NRF_LOG_INTERNAL_LOG_PUSH(_str)
+
+/**
+ * @brief Function for copying a string to the internal logger buffer if logs are deferred.
+ *
+ * Use this function to store a string that is volatile (for example allocated
+ * on stack) or that may change before the deferred logs are processed. Such string is copied
+ * into the internal logger buffer and is persistent until the log is processed.
+ *
+ * @note If the logs are not deferred, then this function returns the input parameter.
+ *
+ * @param p_str Pointer to the user string.
+ *
+ * @return Address to the location where the string is stored in the internal logger buffer.
+ */
+uint32_t nrf_log_push(char * const p_str);
+
+/**
+ * @brief Macro to be used in a formatted string to a pass float number to the log.
+ *
+ * Use this macro in a formatted string instead of the %f specifier together with
+ * @ref NRF_LOG_FLOAT macro.
+ * Example: NRF_LOG_INFO("My float number" NRF_LOG_FLOAT_MARKER "\r\n", NRF_LOG_FLOAT(f)))
+ */
+#define NRF_LOG_FLOAT_MARKER "%s%d.%02d"
+
+/**
+ * @brief Macro for dissecting a float number into two numbers (integer and residuum).
+ */
+#define NRF_LOG_FLOAT(val) (uint32_t)(((val) < 0 && (val) > -1.0) ? "-" : ""), \
+ (int32_t)(val), \
+ (int32_t)((((val) > 0) ? (val) - (int32_t)(val) \
+ : (int32_t)(val) - (val))*100)
+
+
+/**
+ * @brief Macro for registering an independent module.
+ *
+ * Registration creates set of dynamic (RAM) and constant variables associated with the module.
+ */
+#define NRF_LOG_MODULE_REGISTER() NRF_LOG_INTERNAL_MODULE_REGISTER()
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // NRF_LOG_H_
+
+/** @} */
diff --git a/third_party/NordicSemiconductor/dependencies/nrf_log_internal.h b/third_party/NordicSemiconductor/dependencies/nrf_log_internal.h
index 9250426..1f74a7e 100644
--- a/third_party/NordicSemiconductor/dependencies/nrf_log_internal.h
+++ b/third_party/NordicSemiconductor/dependencies/nrf_log_internal.h
@@ -1,528 +1,528 @@
-/**
- * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-#ifndef NRF_LOG_INTERNAL_H__
-#define NRF_LOG_INTERNAL_H__
-#include "sdk_common.h"
-#include "nrf.h"
-#include "nrf_error.h"
-#include "app_util.h"
-#include <stdint.h>
-#include <stdbool.h>
-#include "nrf_log_instance.h"
-#include "nrf_log_types.h"
-
-#ifndef NRF_LOG_ERROR_COLOR
- #define NRF_LOG_ERROR_COLOR NRF_LOG_COLOR_DEFAULT
-#endif
-
-#ifndef NRF_LOG_WARNING_COLOR
- #define NRF_LOG_WARNING_COLOR NRF_LOG_COLOR_DEFAULT
-#endif
-
-#ifndef NRF_LOG_INFO_COLOR
- #define NRF_LOG_INFO_COLOR NRF_LOG_COLOR_DEFAULT
-#endif
-
-#ifndef NRF_LOG_DEBUG_COLOR
- #define NRF_LOG_DEBUG_COLOR NRF_LOG_COLOR_DEFAULT
-#endif
-
-
-#ifndef NRF_LOG_COLOR_DEFAULT
-#define NRF_LOG_COLOR_DEFAULT 0
-#endif
-
-#ifndef NRF_LOG_DEFAULT_LEVEL
-#define NRF_LOG_DEFAULT_LEVEL 0
-#endif
-
-#ifndef NRF_LOG_USES_COLORS
-#define NRF_LOG_USES_COLORS 0
-#endif
-
-#ifndef NRF_LOG_USES_TIMESTAMP
-#define NRF_LOG_USES_TIMESTAMP 0
-#endif
-
-#ifndef NRF_LOG_FILTERS_ENABLED
-#define NRF_LOG_FILTERS_ENABLED 0
-#endif
-
-#ifndef NRF_LOG_MODULE_NAME
- #define NRF_LOG_MODULE_NAME app
-#endif
-
-#define NRF_LOG_LEVEL_BITS 3
-#define NRF_LOG_LEVEL_MASK ((1UL << NRF_LOG_LEVEL_BITS) - 1)
-#define NRF_LOG_MODULE_ID_BITS 16
-#define NRF_LOG_MODULE_ID_POS 16
-
-
-#define NRF_LOG_MAX_NUM_OF_ARGS 6
-
-
-#if NRF_LOG_FILTERS_ENABLED && NRF_LOG_ENABLED
- #define NRF_LOG_FILTER NRF_LOG_ITEM_DATA_DYNAMIC(NRF_LOG_MODULE_NAME).filter
- #define NRF_LOG_INST_FILTER(p_inst) (p_inst)->filter
-#else
- #undef NRF_LOG_FILTER
- #define NRF_LOG_FILTER NRF_LOG_SEVERITY_DEBUG
- #define NRF_LOG_INST_FILTER(p_inst) NRF_LOG_SEVERITY_DEBUG
-#endif
-
-#if NRF_LOG_ENABLED
-#define NRF_LOG_MODULE_ID NRF_LOG_ITEM_DATA_DYNAMIC(NRF_LOG_MODULE_NAME).module_id
-#define NRF_LOG_INST_ID(p_inst) (p_inst)->module_id
-#else
-#define NRF_LOG_MODULE_ID 0
-#define NRF_LOG_INST_ID(p_inst) 0
-#endif
-
-
-#define LOG_INTERNAL_X(N, ...) CONCAT_2(LOG_INTERNAL_, N) (__VA_ARGS__)
-#define LOG_INTERNAL(type, ...) LOG_INTERNAL_X(NUM_VA_ARGS_LESS_1( \
- __VA_ARGS__), type, __VA_ARGS__)
-#if NRF_LOG_ENABLED
-#define NRF_LOG_INTERNAL_LOG_PUSH(_str) nrf_log_push(_str)
-#define LOG_INTERNAL_0(type, str) \
- nrf_log_frontend_std_0(type, str)
-#define LOG_INTERNAL_1(type, str, arg0) \
- /*lint -save -e571*/nrf_log_frontend_std_1(type, str, (uint32_t)(arg0))/*lint -restore*/
-#define LOG_INTERNAL_2(type, str, arg0, arg1) \
- /*lint -save -e571*/nrf_log_frontend_std_2(type, str, (uint32_t)(arg0), \
- (uint32_t)(arg1))/*lint -restore*/
-#define LOG_INTERNAL_3(type, str, arg0, arg1, arg2) \
- /*lint -save -e571*/nrf_log_frontend_std_3(type, str, (uint32_t)(arg0), \
- (uint32_t)(arg1), (uint32_t)(arg2))/*lint -restore*/
-#define LOG_INTERNAL_4(type, str, arg0, arg1, arg2, arg3) \
- /*lint -save -e571*/nrf_log_frontend_std_4(type, str, (uint32_t)(arg0), \
- (uint32_t)(arg1), (uint32_t)(arg2), (uint32_t)(arg3))/*lint -restore*/
-#define LOG_INTERNAL_5(type, str, arg0, arg1, arg2, arg3, arg4) \
- /*lint -save -e571*/nrf_log_frontend_std_5(type, str, (uint32_t)(arg0), \
- (uint32_t)(arg1), (uint32_t)(arg2), (uint32_t)(arg3), (uint32_t)(arg4))/*lint -restore*/
-#define LOG_INTERNAL_6(type, str, arg0, arg1, arg2, arg3, arg4, arg5) \
- /*lint -save -e571*/nrf_log_frontend_std_6(type, str, (uint32_t)(arg0), \
- (uint32_t)(arg1), (uint32_t)(arg2), (uint32_t)(arg3), (uint32_t)(arg4), (uint32_t)(arg5))/*lint -restore*/
-
-
-#else //NRF_LOG_ENABLED
-#define NRF_LOG_INTERNAL_LOG_PUSH(_str) (void)(_str)
-#define LOG_INTERNAL_0(_type, _str) \
- (void)(_type); (void)(_str)
-#define LOG_INTERNAL_1(_type, _str, _arg0) \
- (void)(_type); (void)(_str); (void)(_arg0)
-#define LOG_INTERNAL_2(_type, _str, _arg0, _arg1) \
- (void)(_type); (void)(_str); (void)(_arg0); (void)(_arg1)
-#define LOG_INTERNAL_3(_type, _str, _arg0, _arg1, _arg2) \
- (void)(_type); (void)(_str); (void)(_arg0); (void)(_arg1); (void)(_arg2)
-#define LOG_INTERNAL_4(_type, _str, _arg0, _arg1, _arg2, _arg3) \
- (void)(_type); (void)(_str); (void)(_arg0); (void)(_arg1); (void)(_arg2); (void)(_arg3)
-#define LOG_INTERNAL_5(_type, _str, _arg0, _arg1, _arg2, _arg3, _arg4) \
- (void)(_type); (void)(_str); (void)(_arg0); (void)(_arg1); (void)(_arg2); (void)(_arg3); (void)(_arg4)
-#define LOG_INTERNAL_6(_type, _str, _arg0, _arg1, _arg2, _arg3, _arg4, _arg5) \
- (void)(_type); (void)(_str); (void)(_arg0); (void)(_arg1); (void)(_arg2); (void)(_arg3); (void)(_arg4); (void)(_arg5)
-#endif //NRF_LOG_ENABLED
-
-#define LOG_SEVERITY_MOD_ID(severity) ((severity) | NRF_LOG_MODULE_ID << NRF_LOG_MODULE_ID_POS)
-#define LOG_SEVERITY_INST_ID(severity,p_inst) ((severity) | NRF_LOG_INST_ID(p_inst) << NRF_LOG_MODULE_ID_POS)
-
-#if NRF_LOG_ENABLED
-#define LOG_HEXDUMP(_severity, _p_data, _length) \
- nrf_log_frontend_hexdump((_severity), (_p_data), (_length))
-#else
-#define LOG_HEXDUMP(_severity, _p_data, _length) \
- (void)(_severity); (void)(_p_data); (void)_length
-#endif
-
-#define NRF_LOG_INTERNAL_INST(level, level_id, p_inst, ...) \
- if (NRF_LOG_ENABLED && (NRF_LOG_LEVEL >= level) && \
- (level <= NRF_LOG_DEFAULT_LEVEL)) \
- { \
- if (NRF_LOG_INST_FILTER(p_inst) >= level) \
- { \
- LOG_INTERNAL(LOG_SEVERITY_INST_ID(level_id, p_inst), __VA_ARGS__); \
- } \
- }
-
-#define NRF_LOG_INTERNAL_MODULE(level, level_id, ...) \
- if (NRF_LOG_ENABLED && (NRF_LOG_LEVEL >= level) && \
- (level <= NRF_LOG_DEFAULT_LEVEL)) \
- { \
- if (NRF_LOG_FILTER >= level) \
- { \
- LOG_INTERNAL(LOG_SEVERITY_MOD_ID(level_id), __VA_ARGS__); \
- } \
- }
-
-#define NRF_LOG_INTERNAL_HEXDUMP_INST(level, level_id, p_inst, p_data, len) \
- if (NRF_LOG_ENABLED && (NRF_LOG_LEVEL >= level) && \
- (level <= NRF_LOG_DEFAULT_LEVEL)) \
- { \
- if (NRF_LOG_INST_FILTER(p_inst) >= level) \
- { \
- LOG_HEXDUMP(LOG_SEVERITY_INST_ID(level_id, p_inst), \
- (p_data), (len)); \
- } \
- }
-
-#define NRF_LOG_INTERNAL_HEXDUMP_MODULE(level, level_id, p_data, len) \
- if (NRF_LOG_ENABLED && (NRF_LOG_LEVEL >= level) && \
- (level <= NRF_LOG_DEFAULT_LEVEL)) \
- { \
- if (NRF_LOG_FILTER >= level) \
- { \
- LOG_HEXDUMP(LOG_SEVERITY_MOD_ID(level_id), \
- (p_data), (len)); \
- } \
- }
-
-#define NRF_LOG_INTERNAL_INST_ERROR(p_inst, ...) \
- NRF_LOG_INTERNAL_INST(NRF_LOG_SEVERITY_ERROR, NRF_LOG_SEVERITY_ERROR, p_inst, __VA_ARGS__)
-
-#define NRF_LOG_INTERNAL_ERROR(...) \
- NRF_LOG_INTERNAL_MODULE(NRF_LOG_SEVERITY_ERROR, NRF_LOG_SEVERITY_ERROR,__VA_ARGS__)
-
-#define NRF_LOG_INTERNAL_HEXDUMP_INST_ERROR(p_inst, p_data, len) \
- NRF_LOG_INTERNAL_HEXDUMP_INST(NRF_LOG_SEVERITY_ERROR, NRF_LOG_SEVERITY_ERROR, p_inst, p_data, len)
-
-#define NRF_LOG_INTERNAL_HEXDUMP_ERROR(p_data, len) \
- NRF_LOG_INTERNAL_HEXDUMP_MODULE(NRF_LOG_SEVERITY_ERROR, NRF_LOG_SEVERITY_ERROR, p_data, len)
-
-#define NRF_LOG_INTERNAL_INST_WARNING(p_inst, ...) \
- NRF_LOG_INTERNAL_INST(NRF_LOG_SEVERITY_WARNING, NRF_LOG_SEVERITY_WARNING, p_inst, __VA_ARGS__)
-
-#define NRF_LOG_INTERNAL_WARNING(...) \
- NRF_LOG_INTERNAL_MODULE(NRF_LOG_SEVERITY_WARNING, NRF_LOG_SEVERITY_WARNING,__VA_ARGS__)
-
-#define NRF_LOG_INTERNAL_HEXDUMP_INST_WARNING(p_inst, p_data, len) \
- NRF_LOG_INTERNAL_HEXDUMP_INST(NRF_LOG_SEVERITY_WARNING, NRF_LOG_SEVERITY_WARNING, p_inst, p_data, len)
-
-#define NRF_LOG_INTERNAL_HEXDUMP_WARNING(p_data, len) \
- NRF_LOG_INTERNAL_HEXDUMP_(NRF_LOG_SEVERITY_WARNING, NRF_LOG_SEVERITY_WARNING, p_data, len)
-
-#define NRF_LOG_INTERNAL_INST_INFO(p_inst, ...) \
- NRF_LOG_INTERNAL_INST(NRF_LOG_SEVERITY_INFO, NRF_LOG_SEVERITY_INFO, p_inst, __VA_ARGS__)
-
-#define NRF_LOG_INTERNAL_INFO(...) \
- NRF_LOG_INTERNAL_MODULE(NRF_LOG_SEVERITY_INFO, NRF_LOG_SEVERITY_INFO, __VA_ARGS__)
-
-#define NRF_LOG_INTERNAL_HEXDUMP_INST_INFO(p_inst, p_data, len) \
- NRF_LOG_INTERNAL_HEXDUMP_INST(NRF_LOG_SEVERITY_INFO, NRF_LOG_SEVERITY_INFO, p_inst, p_data, len)
-
-#define NRF_LOG_INTERNAL_HEXDUMP_INFO(p_data, len) \
- NRF_LOG_INTERNAL_HEXDUMP_MODULE(NRF_LOG_SEVERITY_INFO, NRF_LOG_SEVERITY_INFO, p_data, len)
-
-#define NRF_LOG_INTERNAL_RAW_INFO(...) \
- NRF_LOG_INTERNAL_MODULE(NRF_LOG_SEVERITY_INFO, NRF_LOG_SEVERITY_INFO_RAW, __VA_ARGS__)
-
-#define NRF_LOG_INTERNAL_RAW_HEXDUMP_INFO(p_data, len) \
- NRF_LOG_INTERNAL_HEXDUMP_MODULE(NRF_LOG_SEVERITY_INFO, NRF_LOG_SEVERITY_INFO_RAW, p_data, len)
-
-#define NRF_LOG_INTERNAL_INST_DEBUG(p_inst, ...) \
- NRF_LOG_INTERNAL_INST(NRF_LOG_SEVERITY_DEBUG, NRF_LOG_SEVERITY_DEBUG, p_inst, __VA_ARGS__)
-
-#define NRF_LOG_INTERNAL_DEBUG(...) \
- NRF_LOG_INTERNAL_MODULE(NRF_LOG_SEVERITY_DEBUG, NRF_LOG_SEVERITY_DEBUG, __VA_ARGS__)
-
-#define NRF_LOG_INTERNAL_HEXDUMP_INST_DEBUG(p_inst, p_data, len) \
- NRF_LOG_INTERNAL_HEXDUMP_INST(NRF_LOG_SEVERITY_DEBUG, NRF_LOG_SEVERITY_DEBUG, p_inst, p_data, len)
-
-#define NRF_LOG_INTERNAL_HEXDUMP_DEBUG(p_data, len) \
- NRF_LOG_INTERNAL_HEXDUMP_MODULE(NRF_LOG_SEVERITY_DEBUG, NRF_LOG_SEVERITY_DEBUG, p_data, len)
-
-
-#if NRF_LOG_ENABLED
-
-#ifdef UNIT_TEST
-#define COMPILED_LOG_LEVEL 4
-#else
-#define COMPILED_LOG_LEVEL NRF_LOG_LEVEL
-#endif
-
-
-#define NRF_LOG_INTERNAL_MODULE_REGISTER() \
- NRF_LOG_INTERNAL_ITEM_REGISTER(NRF_LOG_MODULE_NAME, \
- STRINGIFY(NRF_LOG_MODULE_NAME), \
- NRF_LOG_INFO_COLOR, \
- NRF_LOG_DEBUG_COLOR, \
- NRF_LOG_INITIAL_LEVEL, \
- COMPILED_LOG_LEVEL)
-
-#else
-#define NRF_LOG_INTERNAL_MODULE_REGISTER() /*lint -save -e19*/ /*lint -restore*/
-#endif
-
-extern NRF_LOG_DYNAMIC_STRUCT_NAME NRF_LOG_ITEM_DATA_DYNAMIC(NRF_LOG_MODULE_NAME);
-
-/**
- * Set of macros for encoding and decoding header for log entries.
- * There are 3 types of entries:
- * 1. Standard entry (STD)
- * An entry consists of header, pointer to string and values. Header contains
- * severity leveland determines number of arguments and thus size of the entry.
- * Since flash address space starts from 0x00000000 and is limited to kB rather
- * than MB 22 bits are used to store the address (4MB). It is used that way to
- * save one RAM memory.
- *
- * --------------------------------
- * |TYPE|SEVERITY|NARGS| P_STR |
- * |------------------------------|
- * | Module_ID (optional) |
- * |------------------------------|
- * | TIMESTAMP (optional) |
- * |------------------------------|
- * | ARG0 |
- * |------------------------------|
- * | .... |
- * |------------------------------|
- * | ARG(nargs-1) |
- * --------------------------------
- *
- * 2. Hexdump entry (HEXDUMP) is used for dumping raw data. An entry consists of
- * header, optional timestamp, pointer to string and data. A header contains
- * length (10bit) and offset which is updated after backend processes part of
- * data.
- *
- * --------------------------------
- * |TYPE|SEVERITY|NARGS|OFFSET|LEN|
- * |------------------------------|
- * | Module_ID (optional) |
- * |------------------------------|
- * | TIMESTAMP (optional) |
- * |------------------------------|
- * | P_STR |
- * |------------------------------|
- * | data |
- * |------------------------------|
- * | data | dummy |
- * --------------------------------
- *
- * 3. Pushed string. If string is pushed into the logger internal buffer it is
- * stored as PUSHED entry. It consists of header, unused data (optional) and
- * string. Unused data is present if string does not not fit into a buffer
- * without wrapping (and string cannot be wrapped). In that case header
- * contains information about offset.
- *
- * --------------------------------
- * |TYPE| OFFSET | LEN |
- * |------------------------------|
- * | OFFSET |
- * |------------------------------|
- * end| OFFSET |
- * 0|------------------------------|
- * | STRING |
- * |------------------------------|
- * | STRING | dummy |
- * --------------------------------
- */
-
-#define STD_ADDR_MASK ((uint32_t)(1U << 22) - 1U)
-#define HEADER_TYPE_STD 1U
-#define HEADER_TYPE_HEXDUMP 2U
-#define HEADER_TYPE_PUSHED 0U
-#define HEADER_TYPE_INVALID 3U
-
-typedef struct
-{
- uint32_t type : 2;
- uint32_t in_progress: 1;
- uint32_t data : 29;
-} nrf_log_generic_header_t;
-
-typedef struct
-{
- uint32_t type : 2;
- uint32_t in_progress: 1;
- uint32_t severity : 3;
- uint32_t nargs : 4;
- uint32_t addr : 22;
-} nrf_log_std_header_t;
-
-typedef struct
-{
- uint32_t type : 2;
- uint32_t in_progress: 1;
- uint32_t severity : 3;
- uint32_t offset : 10;
- uint32_t reserved : 6;
- uint32_t len : 10;
-} nrf_log_hexdump_header_t;
-
-typedef struct
-{
- uint32_t type : 2;
- uint32_t reserved0 : 4;
- uint32_t offset : 10;
- uint32_t reserved1 : 6;
- uint32_t len : 10;
-} nrf_log_pushed_header_t;
-
-typedef union
-{
- nrf_log_generic_header_t generic;
- nrf_log_std_header_t std;
- nrf_log_hexdump_header_t hexdump;
- nrf_log_pushed_header_t pushed;
- uint32_t raw;
-} nrf_log_main_header_t;
-
-typedef struct
-{
- nrf_log_main_header_t base;
- uint32_t module_id;
- uint32_t timestamp;
-} nrf_log_header_t;
-
-#define HEADER_SIZE (sizeof(nrf_log_header_t)/sizeof(uint32_t) - \
- (NRF_LOG_USES_TIMESTAMP ? 0 : 1))
-
-#define PUSHED_HEADER_SIZE (sizeof(nrf_log_pushed_header_t)/sizeof(uint32_t))
-
-//Implementation assumes that pushed header has one word.
-STATIC_ASSERT(PUSHED_HEADER_SIZE == 1);
-/**
- * @brief A function for logging raw string.
- *
- * @param severity_mid Severity.
- * @param p_str A pointer to a string.
- */
-void nrf_log_frontend_std_0(uint32_t severity_mid, char const * const p_str);
-
-/**
- * @brief A function for logging a formatted string with one argument.
- *
- * @param severity_mid Severity.
- * @param p_str A pointer to a formatted string.
- * @param val0 An argument.
- */
-void nrf_log_frontend_std_1(uint32_t severity_mid,
- char const * const p_str,
- uint32_t val0);
-
-/**
- * @brief A function for logging a formatted string with 2 arguments.
- *
- * @param severity_mid Severity.
- * @param p_str A pointer to a formatted string.
- * @param val0, val1 Arguments for formatting string.
- */
-void nrf_log_frontend_std_2(uint32_t severity_mid,
- char const * const p_str,
- uint32_t val0,
- uint32_t val1);
-
-/**
- * @brief A function for logging a formatted string with 3 arguments.
- *
- * @param severity_mid Severity.
- * @param p_str A pointer to a formatted string.
- * @param val0, val1, val2 Arguments for formatting string.
- */
-void nrf_log_frontend_std_3(uint32_t severity_mid,
- char const * const p_str,
- uint32_t val0,
- uint32_t val1,
- uint32_t val2);
-
-/**
- * @brief A function for logging a formatted string with 4 arguments.
- *
- * @param severity_mid Severity.
- * @param p_str A pointer to a formatted string.
- * @param val0, val1, val2, val3 Arguments for formatting string.
- */
-void nrf_log_frontend_std_4(uint32_t severity_mid,
- char const * const p_str,
- uint32_t val0,
- uint32_t val1,
- uint32_t val2,
- uint32_t val3);
-
-/**
- * @brief A function for logging a formatted string with 5 arguments.
- *
- * @param severity_mid Severity.
- * @param p_str A pointer to a formatted string.
- * @param val0, val1, val2, val3, val4 Arguments for formatting string.
- */
-void nrf_log_frontend_std_5(uint32_t severity_mid,
- char const * const p_str,
- uint32_t val0,
- uint32_t val1,
- uint32_t val2,
- uint32_t val3,
- uint32_t val4);
-
-/**
- * @brief A function for logging a formatted string with 6 arguments.
- *
- * @param severity_mid Severity.
- * @param p_str A pointer to a formatted string.
- * @param val0, val1, val2, val3, val4, val5 Arguments for formatting string.
- */
-void nrf_log_frontend_std_6(uint32_t severity_mid,
- char const * const p_str,
- uint32_t val0,
- uint32_t val1,
- uint32_t val2,
- uint32_t val3,
- uint32_t val4,
- uint32_t val5);
-
-/**
- * @brief A function for logging raw data.
- *
- * @param severity_mid Severity.
- * @param p_str A pointer to a string which is prefixing the data.
- * @param p_data A pointer to data to be dumped.
- * @param length Length of data (in bytes).
- *
- */
-void nrf_log_frontend_hexdump(uint32_t severity_mid,
- const void * const p_data,
- uint16_t length);
-
-/**
- * @brief A function for reading a byte from log backend.
- *
- * @return Byte.
- */
-uint8_t nrf_log_getchar(void);
-#endif // NRF_LOG_INTERNAL_H__
+/**
+ * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#ifndef NRF_LOG_INTERNAL_H__
+#define NRF_LOG_INTERNAL_H__
+#include "sdk_common.h"
+#include "nrf.h"
+#include "nrf_error.h"
+#include "app_util.h"
+#include <stdint.h>
+#include <stdbool.h>
+#include "nrf_log_instance.h"
+#include "nrf_log_types.h"
+
+#ifndef NRF_LOG_ERROR_COLOR
+ #define NRF_LOG_ERROR_COLOR NRF_LOG_COLOR_DEFAULT
+#endif
+
+#ifndef NRF_LOG_WARNING_COLOR
+ #define NRF_LOG_WARNING_COLOR NRF_LOG_COLOR_DEFAULT
+#endif
+
+#ifndef NRF_LOG_INFO_COLOR
+ #define NRF_LOG_INFO_COLOR NRF_LOG_COLOR_DEFAULT
+#endif
+
+#ifndef NRF_LOG_DEBUG_COLOR
+ #define NRF_LOG_DEBUG_COLOR NRF_LOG_COLOR_DEFAULT
+#endif
+
+
+#ifndef NRF_LOG_COLOR_DEFAULT
+#define NRF_LOG_COLOR_DEFAULT 0
+#endif
+
+#ifndef NRF_LOG_DEFAULT_LEVEL
+#define NRF_LOG_DEFAULT_LEVEL 0
+#endif
+
+#ifndef NRF_LOG_USES_COLORS
+#define NRF_LOG_USES_COLORS 0
+#endif
+
+#ifndef NRF_LOG_USES_TIMESTAMP
+#define NRF_LOG_USES_TIMESTAMP 0
+#endif
+
+#ifndef NRF_LOG_FILTERS_ENABLED
+#define NRF_LOG_FILTERS_ENABLED 0
+#endif
+
+#ifndef NRF_LOG_MODULE_NAME
+ #define NRF_LOG_MODULE_NAME app
+#endif
+
+#define NRF_LOG_LEVEL_BITS 3
+#define NRF_LOG_LEVEL_MASK ((1UL << NRF_LOG_LEVEL_BITS) - 1)
+#define NRF_LOG_MODULE_ID_BITS 16
+#define NRF_LOG_MODULE_ID_POS 16
+
+
+#define NRF_LOG_MAX_NUM_OF_ARGS 6
+
+
+#if NRF_LOG_FILTERS_ENABLED && NRF_LOG_ENABLED
+ #define NRF_LOG_FILTER NRF_LOG_ITEM_DATA_DYNAMIC(NRF_LOG_MODULE_NAME).filter
+ #define NRF_LOG_INST_FILTER(p_inst) (p_inst)->filter
+#else
+ #undef NRF_LOG_FILTER
+ #define NRF_LOG_FILTER NRF_LOG_SEVERITY_DEBUG
+ #define NRF_LOG_INST_FILTER(p_inst) NRF_LOG_SEVERITY_DEBUG
+#endif
+
+#if NRF_LOG_ENABLED
+#define NRF_LOG_MODULE_ID NRF_LOG_ITEM_DATA_DYNAMIC(NRF_LOG_MODULE_NAME).module_id
+#define NRF_LOG_INST_ID(p_inst) (p_inst)->module_id
+#else
+#define NRF_LOG_MODULE_ID 0
+#define NRF_LOG_INST_ID(p_inst) 0
+#endif
+
+
+#define LOG_INTERNAL_X(N, ...) CONCAT_2(LOG_INTERNAL_, N) (__VA_ARGS__)
+#define LOG_INTERNAL(type, ...) LOG_INTERNAL_X(NUM_VA_ARGS_LESS_1( \
+ __VA_ARGS__), type, __VA_ARGS__)
+#if NRF_LOG_ENABLED
+#define NRF_LOG_INTERNAL_LOG_PUSH(_str) nrf_log_push(_str)
+#define LOG_INTERNAL_0(type, str) \
+ nrf_log_frontend_std_0(type, str)
+#define LOG_INTERNAL_1(type, str, arg0) \
+ /*lint -save -e571*/nrf_log_frontend_std_1(type, str, (uint32_t)(arg0))/*lint -restore*/
+#define LOG_INTERNAL_2(type, str, arg0, arg1) \
+ /*lint -save -e571*/nrf_log_frontend_std_2(type, str, (uint32_t)(arg0), \
+ (uint32_t)(arg1))/*lint -restore*/
+#define LOG_INTERNAL_3(type, str, arg0, arg1, arg2) \
+ /*lint -save -e571*/nrf_log_frontend_std_3(type, str, (uint32_t)(arg0), \
+ (uint32_t)(arg1), (uint32_t)(arg2))/*lint -restore*/
+#define LOG_INTERNAL_4(type, str, arg0, arg1, arg2, arg3) \
+ /*lint -save -e571*/nrf_log_frontend_std_4(type, str, (uint32_t)(arg0), \
+ (uint32_t)(arg1), (uint32_t)(arg2), (uint32_t)(arg3))/*lint -restore*/
+#define LOG_INTERNAL_5(type, str, arg0, arg1, arg2, arg3, arg4) \
+ /*lint -save -e571*/nrf_log_frontend_std_5(type, str, (uint32_t)(arg0), \
+ (uint32_t)(arg1), (uint32_t)(arg2), (uint32_t)(arg3), (uint32_t)(arg4))/*lint -restore*/
+#define LOG_INTERNAL_6(type, str, arg0, arg1, arg2, arg3, arg4, arg5) \
+ /*lint -save -e571*/nrf_log_frontend_std_6(type, str, (uint32_t)(arg0), \
+ (uint32_t)(arg1), (uint32_t)(arg2), (uint32_t)(arg3), (uint32_t)(arg4), (uint32_t)(arg5))/*lint -restore*/
+
+
+#else //NRF_LOG_ENABLED
+#define NRF_LOG_INTERNAL_LOG_PUSH(_str) (void)(_str)
+#define LOG_INTERNAL_0(_type, _str) \
+ (void)(_type); (void)(_str)
+#define LOG_INTERNAL_1(_type, _str, _arg0) \
+ (void)(_type); (void)(_str); (void)(_arg0)
+#define LOG_INTERNAL_2(_type, _str, _arg0, _arg1) \
+ (void)(_type); (void)(_str); (void)(_arg0); (void)(_arg1)
+#define LOG_INTERNAL_3(_type, _str, _arg0, _arg1, _arg2) \
+ (void)(_type); (void)(_str); (void)(_arg0); (void)(_arg1); (void)(_arg2)
+#define LOG_INTERNAL_4(_type, _str, _arg0, _arg1, _arg2, _arg3) \
+ (void)(_type); (void)(_str); (void)(_arg0); (void)(_arg1); (void)(_arg2); (void)(_arg3)
+#define LOG_INTERNAL_5(_type, _str, _arg0, _arg1, _arg2, _arg3, _arg4) \
+ (void)(_type); (void)(_str); (void)(_arg0); (void)(_arg1); (void)(_arg2); (void)(_arg3); (void)(_arg4)
+#define LOG_INTERNAL_6(_type, _str, _arg0, _arg1, _arg2, _arg3, _arg4, _arg5) \
+ (void)(_type); (void)(_str); (void)(_arg0); (void)(_arg1); (void)(_arg2); (void)(_arg3); (void)(_arg4); (void)(_arg5)
+#endif //NRF_LOG_ENABLED
+
+#define LOG_SEVERITY_MOD_ID(severity) ((severity) | NRF_LOG_MODULE_ID << NRF_LOG_MODULE_ID_POS)
+#define LOG_SEVERITY_INST_ID(severity,p_inst) ((severity) | NRF_LOG_INST_ID(p_inst) << NRF_LOG_MODULE_ID_POS)
+
+#if NRF_LOG_ENABLED
+#define LOG_HEXDUMP(_severity, _p_data, _length) \
+ nrf_log_frontend_hexdump((_severity), (_p_data), (_length))
+#else
+#define LOG_HEXDUMP(_severity, _p_data, _length) \
+ (void)(_severity); (void)(_p_data); (void)_length
+#endif
+
+#define NRF_LOG_INTERNAL_INST(level, level_id, p_inst, ...) \
+ if (NRF_LOG_ENABLED && (NRF_LOG_LEVEL >= level) && \
+ (level <= NRF_LOG_DEFAULT_LEVEL)) \
+ { \
+ if (NRF_LOG_INST_FILTER(p_inst) >= level) \
+ { \
+ LOG_INTERNAL(LOG_SEVERITY_INST_ID(level_id, p_inst), __VA_ARGS__); \
+ } \
+ }
+
+#define NRF_LOG_INTERNAL_MODULE(level, level_id, ...) \
+ if (NRF_LOG_ENABLED && (NRF_LOG_LEVEL >= level) && \
+ (level <= NRF_LOG_DEFAULT_LEVEL)) \
+ { \
+ if (NRF_LOG_FILTER >= level) \
+ { \
+ LOG_INTERNAL(LOG_SEVERITY_MOD_ID(level_id), __VA_ARGS__); \
+ } \
+ }
+
+#define NRF_LOG_INTERNAL_HEXDUMP_INST(level, level_id, p_inst, p_data, len) \
+ if (NRF_LOG_ENABLED && (NRF_LOG_LEVEL >= level) && \
+ (level <= NRF_LOG_DEFAULT_LEVEL)) \
+ { \
+ if (NRF_LOG_INST_FILTER(p_inst) >= level) \
+ { \
+ LOG_HEXDUMP(LOG_SEVERITY_INST_ID(level_id, p_inst), \
+ (p_data), (len)); \
+ } \
+ }
+
+#define NRF_LOG_INTERNAL_HEXDUMP_MODULE(level, level_id, p_data, len) \
+ if (NRF_LOG_ENABLED && (NRF_LOG_LEVEL >= level) && \
+ (level <= NRF_LOG_DEFAULT_LEVEL)) \
+ { \
+ if (NRF_LOG_FILTER >= level) \
+ { \
+ LOG_HEXDUMP(LOG_SEVERITY_MOD_ID(level_id), \
+ (p_data), (len)); \
+ } \
+ }
+
+#define NRF_LOG_INTERNAL_INST_ERROR(p_inst, ...) \
+ NRF_LOG_INTERNAL_INST(NRF_LOG_SEVERITY_ERROR, NRF_LOG_SEVERITY_ERROR, p_inst, __VA_ARGS__)
+
+#define NRF_LOG_INTERNAL_ERROR(...) \
+ NRF_LOG_INTERNAL_MODULE(NRF_LOG_SEVERITY_ERROR, NRF_LOG_SEVERITY_ERROR,__VA_ARGS__)
+
+#define NRF_LOG_INTERNAL_HEXDUMP_INST_ERROR(p_inst, p_data, len) \
+ NRF_LOG_INTERNAL_HEXDUMP_INST(NRF_LOG_SEVERITY_ERROR, NRF_LOG_SEVERITY_ERROR, p_inst, p_data, len)
+
+#define NRF_LOG_INTERNAL_HEXDUMP_ERROR(p_data, len) \
+ NRF_LOG_INTERNAL_HEXDUMP_MODULE(NRF_LOG_SEVERITY_ERROR, NRF_LOG_SEVERITY_ERROR, p_data, len)
+
+#define NRF_LOG_INTERNAL_INST_WARNING(p_inst, ...) \
+ NRF_LOG_INTERNAL_INST(NRF_LOG_SEVERITY_WARNING, NRF_LOG_SEVERITY_WARNING, p_inst, __VA_ARGS__)
+
+#define NRF_LOG_INTERNAL_WARNING(...) \
+ NRF_LOG_INTERNAL_MODULE(NRF_LOG_SEVERITY_WARNING, NRF_LOG_SEVERITY_WARNING,__VA_ARGS__)
+
+#define NRF_LOG_INTERNAL_HEXDUMP_INST_WARNING(p_inst, p_data, len) \
+ NRF_LOG_INTERNAL_HEXDUMP_INST(NRF_LOG_SEVERITY_WARNING, NRF_LOG_SEVERITY_WARNING, p_inst, p_data, len)
+
+#define NRF_LOG_INTERNAL_HEXDUMP_WARNING(p_data, len) \
+ NRF_LOG_INTERNAL_HEXDUMP_(NRF_LOG_SEVERITY_WARNING, NRF_LOG_SEVERITY_WARNING, p_data, len)
+
+#define NRF_LOG_INTERNAL_INST_INFO(p_inst, ...) \
+ NRF_LOG_INTERNAL_INST(NRF_LOG_SEVERITY_INFO, NRF_LOG_SEVERITY_INFO, p_inst, __VA_ARGS__)
+
+#define NRF_LOG_INTERNAL_INFO(...) \
+ NRF_LOG_INTERNAL_MODULE(NRF_LOG_SEVERITY_INFO, NRF_LOG_SEVERITY_INFO, __VA_ARGS__)
+
+#define NRF_LOG_INTERNAL_HEXDUMP_INST_INFO(p_inst, p_data, len) \
+ NRF_LOG_INTERNAL_HEXDUMP_INST(NRF_LOG_SEVERITY_INFO, NRF_LOG_SEVERITY_INFO, p_inst, p_data, len)
+
+#define NRF_LOG_INTERNAL_HEXDUMP_INFO(p_data, len) \
+ NRF_LOG_INTERNAL_HEXDUMP_MODULE(NRF_LOG_SEVERITY_INFO, NRF_LOG_SEVERITY_INFO, p_data, len)
+
+#define NRF_LOG_INTERNAL_RAW_INFO(...) \
+ NRF_LOG_INTERNAL_MODULE(NRF_LOG_SEVERITY_INFO, NRF_LOG_SEVERITY_INFO_RAW, __VA_ARGS__)
+
+#define NRF_LOG_INTERNAL_RAW_HEXDUMP_INFO(p_data, len) \
+ NRF_LOG_INTERNAL_HEXDUMP_MODULE(NRF_LOG_SEVERITY_INFO, NRF_LOG_SEVERITY_INFO_RAW, p_data, len)
+
+#define NRF_LOG_INTERNAL_INST_DEBUG(p_inst, ...) \
+ NRF_LOG_INTERNAL_INST(NRF_LOG_SEVERITY_DEBUG, NRF_LOG_SEVERITY_DEBUG, p_inst, __VA_ARGS__)
+
+#define NRF_LOG_INTERNAL_DEBUG(...) \
+ NRF_LOG_INTERNAL_MODULE(NRF_LOG_SEVERITY_DEBUG, NRF_LOG_SEVERITY_DEBUG, __VA_ARGS__)
+
+#define NRF_LOG_INTERNAL_HEXDUMP_INST_DEBUG(p_inst, p_data, len) \
+ NRF_LOG_INTERNAL_HEXDUMP_INST(NRF_LOG_SEVERITY_DEBUG, NRF_LOG_SEVERITY_DEBUG, p_inst, p_data, len)
+
+#define NRF_LOG_INTERNAL_HEXDUMP_DEBUG(p_data, len) \
+ NRF_LOG_INTERNAL_HEXDUMP_MODULE(NRF_LOG_SEVERITY_DEBUG, NRF_LOG_SEVERITY_DEBUG, p_data, len)
+
+
+#if NRF_LOG_ENABLED
+
+#ifdef UNIT_TEST
+#define COMPILED_LOG_LEVEL 4
+#else
+#define COMPILED_LOG_LEVEL NRF_LOG_LEVEL
+#endif
+
+
+#define NRF_LOG_INTERNAL_MODULE_REGISTER() \
+ NRF_LOG_INTERNAL_ITEM_REGISTER(NRF_LOG_MODULE_NAME, \
+ STRINGIFY(NRF_LOG_MODULE_NAME), \
+ NRF_LOG_INFO_COLOR, \
+ NRF_LOG_DEBUG_COLOR, \
+ NRF_LOG_INITIAL_LEVEL, \
+ COMPILED_LOG_LEVEL)
+
+#else
+#define NRF_LOG_INTERNAL_MODULE_REGISTER() /*lint -save -e19*/ /*lint -restore*/
+#endif
+
+extern NRF_LOG_DYNAMIC_STRUCT_NAME NRF_LOG_ITEM_DATA_DYNAMIC(NRF_LOG_MODULE_NAME);
+
+/**
+ * Set of macros for encoding and decoding header for log entries.
+ * There are 3 types of entries:
+ * 1. Standard entry (STD)
+ * An entry consists of header, pointer to string and values. Header contains
+ * severity leveland determines number of arguments and thus size of the entry.
+ * Since flash address space starts from 0x00000000 and is limited to kB rather
+ * than MB 22 bits are used to store the address (4MB). It is used that way to
+ * save one RAM memory.
+ *
+ * --------------------------------
+ * |TYPE|SEVERITY|NARGS| P_STR |
+ * |------------------------------|
+ * | Module_ID (optional) |
+ * |------------------------------|
+ * | TIMESTAMP (optional) |
+ * |------------------------------|
+ * | ARG0 |
+ * |------------------------------|
+ * | .... |
+ * |------------------------------|
+ * | ARG(nargs-1) |
+ * --------------------------------
+ *
+ * 2. Hexdump entry (HEXDUMP) is used for dumping raw data. An entry consists of
+ * header, optional timestamp, pointer to string and data. A header contains
+ * length (10bit) and offset which is updated after backend processes part of
+ * data.
+ *
+ * --------------------------------
+ * |TYPE|SEVERITY|NARGS|OFFSET|LEN|
+ * |------------------------------|
+ * | Module_ID (optional) |
+ * |------------------------------|
+ * | TIMESTAMP (optional) |
+ * |------------------------------|
+ * | P_STR |
+ * |------------------------------|
+ * | data |
+ * |------------------------------|
+ * | data | dummy |
+ * --------------------------------
+ *
+ * 3. Pushed string. If string is pushed into the logger internal buffer it is
+ * stored as PUSHED entry. It consists of header, unused data (optional) and
+ * string. Unused data is present if string does not not fit into a buffer
+ * without wrapping (and string cannot be wrapped). In that case header
+ * contains information about offset.
+ *
+ * --------------------------------
+ * |TYPE| OFFSET | LEN |
+ * |------------------------------|
+ * | OFFSET |
+ * |------------------------------|
+ * end| OFFSET |
+ * 0|------------------------------|
+ * | STRING |
+ * |------------------------------|
+ * | STRING | dummy |
+ * --------------------------------
+ */
+
+#define STD_ADDR_MASK ((uint32_t)(1U << 22) - 1U)
+#define HEADER_TYPE_STD 1U
+#define HEADER_TYPE_HEXDUMP 2U
+#define HEADER_TYPE_PUSHED 0U
+#define HEADER_TYPE_INVALID 3U
+
+typedef struct
+{
+ uint32_t type : 2;
+ uint32_t in_progress: 1;
+ uint32_t data : 29;
+} nrf_log_generic_header_t;
+
+typedef struct
+{
+ uint32_t type : 2;
+ uint32_t in_progress: 1;
+ uint32_t severity : 3;
+ uint32_t nargs : 4;
+ uint32_t addr : 22;
+} nrf_log_std_header_t;
+
+typedef struct
+{
+ uint32_t type : 2;
+ uint32_t in_progress: 1;
+ uint32_t severity : 3;
+ uint32_t offset : 10;
+ uint32_t reserved : 6;
+ uint32_t len : 10;
+} nrf_log_hexdump_header_t;
+
+typedef struct
+{
+ uint32_t type : 2;
+ uint32_t reserved0 : 4;
+ uint32_t offset : 10;
+ uint32_t reserved1 : 6;
+ uint32_t len : 10;
+} nrf_log_pushed_header_t;
+
+typedef union
+{
+ nrf_log_generic_header_t generic;
+ nrf_log_std_header_t std;
+ nrf_log_hexdump_header_t hexdump;
+ nrf_log_pushed_header_t pushed;
+ uint32_t raw;
+} nrf_log_main_header_t;
+
+typedef struct
+{
+ nrf_log_main_header_t base;
+ uint32_t module_id;
+ uint32_t timestamp;
+} nrf_log_header_t;
+
+#define HEADER_SIZE (sizeof(nrf_log_header_t)/sizeof(uint32_t) - \
+ (NRF_LOG_USES_TIMESTAMP ? 0 : 1))
+
+#define PUSHED_HEADER_SIZE (sizeof(nrf_log_pushed_header_t)/sizeof(uint32_t))
+
+//Implementation assumes that pushed header has one word.
+STATIC_ASSERT(PUSHED_HEADER_SIZE == 1);
+/**
+ * @brief A function for logging raw string.
+ *
+ * @param severity_mid Severity.
+ * @param p_str A pointer to a string.
+ */
+void nrf_log_frontend_std_0(uint32_t severity_mid, char const * const p_str);
+
+/**
+ * @brief A function for logging a formatted string with one argument.
+ *
+ * @param severity_mid Severity.
+ * @param p_str A pointer to a formatted string.
+ * @param val0 An argument.
+ */
+void nrf_log_frontend_std_1(uint32_t severity_mid,
+ char const * const p_str,
+ uint32_t val0);
+
+/**
+ * @brief A function for logging a formatted string with 2 arguments.
+ *
+ * @param severity_mid Severity.
+ * @param p_str A pointer to a formatted string.
+ * @param val0, val1 Arguments for formatting string.
+ */
+void nrf_log_frontend_std_2(uint32_t severity_mid,
+ char const * const p_str,
+ uint32_t val0,
+ uint32_t val1);
+
+/**
+ * @brief A function for logging a formatted string with 3 arguments.
+ *
+ * @param severity_mid Severity.
+ * @param p_str A pointer to a formatted string.
+ * @param val0, val1, val2 Arguments for formatting string.
+ */
+void nrf_log_frontend_std_3(uint32_t severity_mid,
+ char const * const p_str,
+ uint32_t val0,
+ uint32_t val1,
+ uint32_t val2);
+
+/**
+ * @brief A function for logging a formatted string with 4 arguments.
+ *
+ * @param severity_mid Severity.
+ * @param p_str A pointer to a formatted string.
+ * @param val0, val1, val2, val3 Arguments for formatting string.
+ */
+void nrf_log_frontend_std_4(uint32_t severity_mid,
+ char const * const p_str,
+ uint32_t val0,
+ uint32_t val1,
+ uint32_t val2,
+ uint32_t val3);
+
+/**
+ * @brief A function for logging a formatted string with 5 arguments.
+ *
+ * @param severity_mid Severity.
+ * @param p_str A pointer to a formatted string.
+ * @param val0, val1, val2, val3, val4 Arguments for formatting string.
+ */
+void nrf_log_frontend_std_5(uint32_t severity_mid,
+ char const * const p_str,
+ uint32_t val0,
+ uint32_t val1,
+ uint32_t val2,
+ uint32_t val3,
+ uint32_t val4);
+
+/**
+ * @brief A function for logging a formatted string with 6 arguments.
+ *
+ * @param severity_mid Severity.
+ * @param p_str A pointer to a formatted string.
+ * @param val0, val1, val2, val3, val4, val5 Arguments for formatting string.
+ */
+void nrf_log_frontend_std_6(uint32_t severity_mid,
+ char const * const p_str,
+ uint32_t val0,
+ uint32_t val1,
+ uint32_t val2,
+ uint32_t val3,
+ uint32_t val4,
+ uint32_t val5);
+
+/**
+ * @brief A function for logging raw data.
+ *
+ * @param severity_mid Severity.
+ * @param p_str A pointer to a string which is prefixing the data.
+ * @param p_data A pointer to data to be dumped.
+ * @param length Length of data (in bytes).
+ *
+ */
+void nrf_log_frontend_hexdump(uint32_t severity_mid,
+ const void * const p_data,
+ uint16_t length);
+
+/**
+ * @brief A function for reading a byte from log backend.
+ *
+ * @return Byte.
+ */
+uint8_t nrf_log_getchar(void);
+#endif // NRF_LOG_INTERNAL_H__
diff --git a/third_party/NordicSemiconductor/dependencies/nrf_section.h b/third_party/NordicSemiconductor/dependencies/nrf_section.h
index 62eda64..a482be0 100644
--- a/third_party/NordicSemiconductor/dependencies/nrf_section.h
+++ b/third_party/NordicSemiconductor/dependencies/nrf_section.h
@@ -1,30 +1,30 @@
/**
- * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
- *
+ * Copyright (c) 2016 - 2019, Nordic Semiconductor ASA
+ *
* All rights reserved.
- *
+ *
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
- *
+ *
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
- *
+ *
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
- *
+ *
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
- *
+ *
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
- *
+ *
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -35,7 +35,7 @@
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
+ *
*/
#ifndef NRF_SECTION_H__
#define NRF_SECTION_H__
diff --git a/third_party/NordicSemiconductor/dependencies/nrfx_config.h b/third_party/NordicSemiconductor/dependencies/nrfx_config.h
index 72577ef..b006b6b 100644
--- a/third_party/NordicSemiconductor/dependencies/nrfx_config.h
+++ b/third_party/NordicSemiconductor/dependencies/nrfx_config.h
@@ -1,30 +1,30 @@
/**
- * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
- *
+ * Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
+ *
* All rights reserved.
- *
+ *
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
- *
+ *
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
- *
+ *
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
- *
+ *
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
- *
+ *
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
- *
+ *
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -35,7 +35,7 @@
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
+ *
*/
#ifndef NRFX_CONFIG_H__
diff --git a/third_party/NordicSemiconductor/dependencies/nrfx_glue.h b/third_party/NordicSemiconductor/dependencies/nrfx_glue.h
index 0a41b98..20c5fbd 100644
--- a/third_party/NordicSemiconductor/dependencies/nrfx_glue.h
+++ b/third_party/NordicSemiconductor/dependencies/nrfx_glue.h
@@ -1,30 +1,30 @@
/**
* Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
- *
+ *
* All rights reserved.
- *
+ *
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
- *
+ *
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
- *
+ *
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
- *
+ *
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
- *
+ *
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
- *
+ *
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -35,7 +35,7 @@
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
+ *
*/
#ifndef NRFX_GLUE_H__
@@ -54,7 +54,7 @@
* the needs of the host environment into which @em nrfx is integrated.
*/
-#include <apply_old_config.h>
+#include <legacy/apply_old_config.h>
#include <soc/nrfx_irqs.h>
diff --git a/third_party/NordicSemiconductor/dependencies/nrfx_log.h b/third_party/NordicSemiconductor/dependencies/nrfx_log.h
index 4c2546e..c4d81a7 100644
--- a/third_party/NordicSemiconductor/dependencies/nrfx_log.h
+++ b/third_party/NordicSemiconductor/dependencies/nrfx_log.h
@@ -1,30 +1,30 @@
/**
- * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
- *
+ * Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
+ *
* All rights reserved.
- *
+ *
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
- *
+ *
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
- *
+ *
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
- *
+ *
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
- *
+ *
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
- *
+ *
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -35,7 +35,7 @@
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
+ *
*/
#ifndef NRFX_LOG_H__
diff --git a/third_party/NordicSemiconductor/dependencies/sdk_common.h b/third_party/NordicSemiconductor/dependencies/sdk_common.h
index bbfcbfe..29b200b 100644
--- a/third_party/NordicSemiconductor/dependencies/sdk_common.h
+++ b/third_party/NordicSemiconductor/dependencies/sdk_common.h
@@ -1,77 +1,77 @@
-/**
- * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-/** @cond */
-/**@file
- *
- * @ingroup experimental_api
- * @defgroup sdk_common SDK Common Header
- * @brief All common headers needed for SDK examples will be included here so that application
- * developer does not have to include headers on him/herself.
- * @{
- */
-
-#ifndef SDK_COMMON_H__
-#define SDK_COMMON_H__
-
-#include <stdint.h>
-#include <stdbool.h>
-#include <string.h>
-#include "sdk_config.h"
-#include "nordic_common.h"
-#include "compiler_abstraction.h"
-#include "sdk_os.h"
-#include "sdk_errors.h"
-#include "app_util.h"
-#include "sdk_macros.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-
-/** @} */
-/** @endcond */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // SDK_COMMON_H__
-
+/**
+ * Copyright (c) 2013 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/** @cond */
+/**@file
+ *
+ * @ingroup experimental_api
+ * @defgroup sdk_common SDK Common Header
+ * @brief All common headers needed for SDK examples will be included here so that application
+ * developer does not have to include headers on him/herself.
+ * @{
+ */
+
+#ifndef SDK_COMMON_H__
+#define SDK_COMMON_H__
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <string.h>
+#include "sdk_config.h"
+#include "nordic_common.h"
+#include "compiler_abstraction.h"
+#include "sdk_os.h"
+#include "sdk_errors.h"
+#include "app_util.h"
+#include "sdk_macros.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/** @} */
+/** @endcond */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // SDK_COMMON_H__
+
diff --git a/third_party/NordicSemiconductor/dependencies/sdk_config.h b/third_party/NordicSemiconductor/dependencies/sdk_config.h
index eae55be..e9d08f0 100644
--- a/third_party/NordicSemiconductor/dependencies/sdk_config.h
+++ b/third_party/NordicSemiconductor/dependencies/sdk_config.h
@@ -1,781 +1,935 @@
-#ifndef SDK_CONFIG_H
-#define SDK_CONFIG_H
-
-#include <openthread/config.h>
-#undef PACKAGE
-
-#if defined(__GNUC__)
-#pragma GCC diagnostic ignored "-Wpedantic"
-#pragma GCC diagnostic ignored "-Wunused-parameter"
-#endif
-
-//==========================================================
-// <e> APP_USBD_ENABLED - app_usbd - USB Device library
-//==========================================================
-#if (USB_CDC_AS_SERIAL_TRANSPORT == 1)
-#ifndef APP_USBD_ENABLED
-#define APP_USBD_ENABLED 1
-#endif
-#else // USB_CDC_AS_SERIAL_TRANSPORT == 1
-#ifndef APP_USBD_ENABLED
-#define APP_USBD_ENABLED 0
-#endif
-#endif // USB_CDC_AS_SERIAL_TRANSPORT == 1
-
-// <s> APP_USBD_VID - Vendor ID
-
-// <i> Vendor ID ordered from USB IF: http://www.usb.org/developers/vendor/
-#ifndef APP_USBD_VID
-#define APP_USBD_VID 0x1915
-#endif
-
-// <s> APP_USBD_PID - Product ID
-
-// <i> Selected Product ID
-#ifndef APP_USBD_PID
-#define APP_USBD_PID 0xCAFE
-#endif
-
-// <o> APP_USBD_DEVICE_VER_MAJOR - Device version, major part <0-99>
-
-
-// <i> Device version, will be converted automatically to BCD notation. Use just decimal values.
-
-#ifndef APP_USBD_DEVICE_VER_MAJOR
-#define APP_USBD_DEVICE_VER_MAJOR 1
-#endif
-
-// <o> APP_USBD_DEVICE_VER_MINOR - Device version, minor part <0-99>
-
-
-// <i> Device version, will be converted automatically to BCD notation. Use just decimal values.
-
-#ifndef APP_USBD_DEVICE_VER_MINOR
-#define APP_USBD_DEVICE_VER_MINOR 0
-#endif
-
-// <q> APP_USBD_CONFIG_SELF_POWERED - Self powered
-
-
-#ifndef APP_USBD_CONFIG_SELF_POWERED
-#define APP_USBD_CONFIG_SELF_POWERED 1
-#endif
-
-// <o> APP_USBD_CONFIG_MAX_POWER - MaxPower field in configuration descriptor in milliamps. <0-500>
-
-
-#ifndef APP_USBD_CONFIG_MAX_POWER
-#define APP_USBD_CONFIG_MAX_POWER 500
-#endif
-
-// <q> APP_USBD_CONFIG_POWER_EVENTS_PROCESS - Process power events
-
-
-// <i> Enable processing power events in USB event handler.
-
-#ifndef APP_USBD_CONFIG_POWER_EVENTS_PROCESS
-#define APP_USBD_CONFIG_POWER_EVENTS_PROCESS 1
-#endif
-
-// <e> APP_USBD_CONFIG_EVENT_QUEUE_ENABLE - Enable event queue
-
-// <i> This is the default configuration when all the events are placed into internal queue.
-// <i> Disable it when external queue is used like app_scheduler or if you wish to process all events inside interrupts.
-// <i> Processing all events from the interrupt level adds requirement not to call any functions that modifies the USBD library state from the context higher than USB interrupt context.
-// <i> Functions that modify USBD state are functions for sleep, wakeup, start, stop, enable and disable.
-//==========================================================
-#ifndef APP_USBD_CONFIG_EVENT_QUEUE_ENABLE
-#define APP_USBD_CONFIG_EVENT_QUEUE_ENABLE 1
-#endif
-// <o> APP_USBD_CONFIG_EVENT_QUEUE_SIZE - The size of event queue <16-64>
-
-
-// <i> The size of the queue for the events that would be processed in the main loop.
-
-#ifndef APP_USBD_CONFIG_EVENT_QUEUE_SIZE
-#define APP_USBD_CONFIG_EVENT_QUEUE_SIZE 32
-#endif
-
-// <o> APP_USBD_CONFIG_SOF_HANDLING_MODE - Change SOF events handling mode.
-
-
-// <i> Normal queue - SOF events are pushed normally into event queue.
-// <i> Compress queue - SOF events are counted and binded with other events or executed when queue is empty.
-// <i> This prevents queue from filling with SOF events.
-// <i> Interrupt - SOF events are processed in interrupt.
-// <0=> Normal queue
-// <1=> Compress queue
-// <2=> Interrupt
-
-#ifndef APP_USBD_CONFIG_SOF_HANDLING_MODE
-#define APP_USBD_CONFIG_SOF_HANDLING_MODE 1
-#endif
-
-// </e>
-
-// <q> APP_USBD_CONFIG_SOF_TIMESTAMP_PROVIDE - Provide a function that generates timestamps for logs based on the current SOF
-
-
-// <i> The function app_usbd_sof_timestamp_get will be implemented if the logger is enabled.
-// <i> Use it when initializing the logger.
-// <i> SOF processing will be always enabled when this configuration parameter is active.
-// <i> Notice that this option is configured outside of APP_USBD_CONFIG_LOG_ENABLED.
-// <i> This means that it will work even if the logging in this very module is disabled.
-
-#ifndef APP_USBD_CONFIG_SOF_TIMESTAMP_PROVIDE
-#define APP_USBD_CONFIG_SOF_TIMESTAMP_PROVIDE 0
-#endif
-
-// <o> APP_USBD_CONFIG_DESC_STRING_SIZE - Maximum size of the NULL-terminated string of the string descriptor. <31-254>
-
-
-// <i> 31 characters can be stored in the internal USB buffer used for transfers.
-// <i> Any value higher than 31 creates an additional buffer just for descriptor strings.
-
-#ifndef APP_USBD_CONFIG_DESC_STRING_SIZE
-#define APP_USBD_CONFIG_DESC_STRING_SIZE 31
-#endif
-
-// <q> APP_USBD_CONFIG_DESC_STRING_UTF_ENABLED - Enable UTF8 conversion.
-
-
-// <i> Enable UTF8-encoded characters. In normal processing, only ASCII characters are available.
-
-#ifndef APP_USBD_CONFIG_DESC_STRING_UTF_ENABLED
-#define APP_USBD_CONFIG_DESC_STRING_UTF_ENABLED 0
-#endif
-
-// <s> APP_USBD_STRINGS_LANGIDS - Supported languages identifiers.
-
-// <i> Note: This value is not editable in Configuration Wizard.
-// <i> Comma-separated list of supported languages.
-#ifndef APP_USBD_STRINGS_LANGIDS
-#define APP_USBD_STRINGS_LANGIDS APP_USBD_LANG_AND_SUBLANG(APP_USBD_LANG_ENGLISH, APP_USBD_SUBLANG_ENGLISH_US)
-#endif
-
-// <e> APP_USBD_STRING_ID_MANUFACTURER - Define manufacturer string ID.
-
-// <i> Setting ID to 0 disables the string.
-//==========================================================
-#ifndef APP_USBD_STRING_ID_MANUFACTURER
-#define APP_USBD_STRING_ID_MANUFACTURER 1
-#endif
-// <q> APP_USBD_STRINGS_MANUFACTURER_EXTERN - Define whether @ref APP_USBD_STRINGS_MANUFACTURER is created by macro or declared as a global variable.
-
-
-#ifndef APP_USBD_STRINGS_MANUFACTURER_EXTERN
-#define APP_USBD_STRINGS_MANUFACTURER_EXTERN 0
-#endif
-
-// <s> APP_USBD_STRINGS_MANUFACTURER - String descriptor for the manufacturer name.
-
-// <i> Note: This value is not editable in Configuration Wizard.
-// <i> Comma-separated list of manufacturer names for each defined language.
-// <i> Use @ref APP_USBD_STRING_DESC macro to create string descriptor from a NULL-terminated string.
-// <i> Use @ref APP_USBD_STRING_RAW8_DESC macro to create string descriptor from comma-separated uint8_t values.
-// <i> Use @ref APP_USBD_STRING_RAW16_DESC macro to create string descriptor from comma-separated uint16_t values.
-// <i> Alternatively, configure the macro to point to any internal variable pointer that already contains the descriptor.
-// <i> Setting string to NULL disables that string.
-// <i> The order of manufacturer names must be the same like in @ref APP_USBD_STRINGS_LANGIDS.
-#ifndef APP_USBD_STRINGS_MANUFACTURER
-#define APP_USBD_STRINGS_MANUFACTURER APP_USBD_STRING_DESC("Nordic Semiconductor")
-#endif
-
-// </e>
-
-// <e> APP_USBD_STRING_ID_PRODUCT - Define product string ID.
-
-// <i> Setting ID to 0 disables the string.
-//==========================================================
-#ifndef APP_USBD_STRING_ID_PRODUCT
-#define APP_USBD_STRING_ID_PRODUCT 2
-#endif
-// <q> APP_USBD_STRINGS_PRODUCT_EXTERN - Define whether @ref APP_USBD_STRINGS_PRODUCT is created by macro or declared as a global variable.
-
-
-#ifndef APP_USBD_STRINGS_PRODUCT_EXTERN
-#define APP_USBD_STRINGS_PRODUCT_EXTERN 0
-#endif
-
-// <s> APP_USBD_STRINGS_PRODUCT - String descriptor for the product name.
-
-// <i> Note: This value is not editable in Configuration Wizard.
-// <i> List of product names that is defined the same way like in @ref APP_USBD_STRINGS_MANUFACTURER.
-#ifndef APP_USBD_STRINGS_PRODUCT
-#define APP_USBD_STRINGS_PRODUCT APP_USBD_STRING_DESC("nRF52840 OpenThread Device")
-#endif
-
-// </e>
-
-// <e> APP_USBD_STRING_ID_SERIAL - Define serial number string ID.
-
-// <i> Setting ID to 0 disables the string.
-//==========================================================
-#ifndef APP_USBD_STRING_ID_SERIAL
-#define APP_USBD_STRING_ID_SERIAL 3
-#endif
-// <q> APP_USBD_STRING_SERIAL_EXTERN - Define whether @ref APP_USBD_STRING_SERIAL is created by macro or declared as a global variable.
-
-
-#ifndef APP_USBD_STRING_SERIAL_EXTERN
-#define APP_USBD_STRING_SERIAL_EXTERN 1
-#endif
-
-// <s> APP_USBD_STRING_SERIAL - String descriptor for the serial number.
-
-// <i> Note: This value is not editable in Configuration Wizard.
-// <i> Serial number that is defined the same way like in @ref APP_USBD_STRINGS_MANUFACTURER.
-#ifndef APP_USBD_STRING_SERIAL
-#define APP_USBD_STRING_SERIAL g_extern_serial_number
-#endif
-
-// </e>
-
-// <e> APP_USBD_STRING_ID_CONFIGURATION - Define configuration string ID.
-
-// <i> Setting ID to 0 disables the string.
-//==========================================================
-#ifndef APP_USBD_STRING_ID_CONFIGURATION
-#define APP_USBD_STRING_ID_CONFIGURATION 4
-#endif
-// <q> APP_USBD_STRING_CONFIGURATION_EXTERN - Define whether @ref APP_USBD_STRINGS_CONFIGURATION is created by macro or declared as global variable.
-
-
-#ifndef APP_USBD_STRING_CONFIGURATION_EXTERN
-#define APP_USBD_STRING_CONFIGURATION_EXTERN 0
-#endif
-
-// <s> APP_USBD_STRINGS_CONFIGURATION - String descriptor for the device configuration.
-
-// <i> Note: This value is not editable in Configuration Wizard.
-// <i> Configuration string that is defined the same way like in @ref APP_USBD_STRINGS_MANUFACTURER.
-#ifndef APP_USBD_STRINGS_CONFIGURATION
-#define APP_USBD_STRINGS_CONFIGURATION APP_USBD_STRING_DESC("Default configuration")
-#endif
-
-// </e>
-
-// <s> APP_USBD_STRINGS_USER - Default values for user strings.
-
-// <i> Note: This value is not editable in Configuration Wizard.
-// <i> This value stores all application specific user strings with the default initialization.
-// <i> The setup is done by X-macros.
-// <i> Expected macro parameters:
-// <i> @code
-// <i> X(mnemonic, [=str_idx], ...)
-// <i> @endcode
-// <i> - @c mnemonic: Mnemonic of the string descriptor that would be added to
-// <i> @ref app_usbd_string_desc_idx_t enumerator.
-// <i> - @c str_idx : String index value, can be set or left empty.
-// <i> For example, WinUSB driver requires descriptor to be present on 0xEE index.
-// <i> Then use X(USBD_STRING_WINUSB, =0xEE, (APP_USBD_STRING_DESC(...)))
-// <i> - @c ... : List of string descriptors for each defined language.
-#ifndef APP_USBD_STRINGS_USER
-#define APP_USBD_STRINGS_USER X(APP_USER_1, , APP_USBD_STRING_DESC("User 1"))
-#endif
-
-// </e>
-
-// <e> APP_USBD_CONFIG_LOG_ENABLED - Enable logging in the module
-//==========================================================
-#ifndef APP_USBD_CONFIG_LOG_ENABLED
-#define APP_USBD_CONFIG_LOG_ENABLED 0
-#endif
-
-// </e>
-
-// </e>
-
-// <e> USBD_ENABLED - nrf_drv_usbd - USB driver
-//==========================================================
-#if (USB_CDC_AS_SERIAL_TRANSPORT == 1)
-#ifndef USBD_ENABLED
-#define USBD_ENABLED 1
-#endif
-#else // USB_CDC_AS_SERIAL_TRANSPORT == 1
-#ifndef USBD_ENABLED
-#define USBD_ENABLED 0
-#endif
-#endif // USB_CDC_AS_SERIAL_TRANSPORT == 1
-
-// <q> Enable power USB detection.
-
-// <i> Configure if the example supports USB port connection.
-
-#ifndef USBD_POWER_DETECTION
-#define USBD_POWER_DETECTION 1
-#endif
-
-// <o> USBD_CONFIG_IRQ_PRIORITY - Interrupt priority
-
-// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
-// <0=> 0 (highest)
-// <1=> 1
-// <2=> 2
-// <3=> 3
-// <4=> 4
-// <5=> 5
-// <6=> 6
-// <7=> 7
-
-#ifndef USBD_CONFIG_IRQ_PRIORITY
-#define USBD_CONFIG_IRQ_PRIORITY 7
-#endif
-
-// <o> USBD_CONFIG_DMASCHEDULER_MODE - USBD SMA scheduler working scheme
-
-// <0=> Prioritized access
-// <1=> Round Robin
-
-#ifndef USBD_CONFIG_DMASCHEDULER_MODE
-#define USBD_CONFIG_DMASCHEDULER_MODE 0
-#endif
-
-// <q> USBD_CONFIG_DMASCHEDULER_ISO_BOOST - Give priority to isochronous transfers
-
-
-// <i> This option gives priority to isochronous transfers.
-// <i> Enabling it assures that isochronous transfers are always processed,
-// <i> even if multiple other transfers are pending.
-// <i> Isochronous endpoints are prioritized before the usbd_dma_scheduler_algorithm
-// <i> function is called, so the option is independent of the algorithm chosen.
-
-#ifndef USBD_CONFIG_DMASCHEDULER_ISO_BOOST
-#define USBD_CONFIG_DMASCHEDULER_ISO_BOOST 1
-#endif
-
-// <q> USBD_CONFIG_ISO_IN_ZLP - Respond to an IN token on ISO IN endpoint with ZLP when no data is ready
-
-
-// <i> If set, ISO IN endpoint will respond to an IN token with ZLP when no data is ready to be sent.
-// <i> Else, there will be no response.
-
-#ifndef USBD_CONFIG_ISO_IN_ZLP
-#define USBD_CONFIG_ISO_IN_ZLP 0
-#endif
-
-#define NRFX_USBD_ENABLED USBD_ENABLED
-#define NRFX_USBD_POWER_DETECTION USBD_POWER_DETECTION
-#define NRFX_USBD_CONFIG_IRQ_PRIORITY USBD_CONFIG_IRQ_PRIORITY
-#define NRFX_USBD_CONFIG_DMASCHEDULER_MODE USBD_CONFIG_DMASCHEDULER_MODE
-#define NRFX_USBD_CONFIG_DMASCHEDULER_ISO_BOOST USBD_CONFIG_DMASCHEDULER_ISO_BOOST
-#define NRFX_USBD_CONFIG_ISO_IN_ZLP USBD_CONFIG_ISO_IN_ZLP
-
-// </e>
-
-
-// <h> Application info used by the USB DFU.
-
-// <q> @def APP_NAME
-
-// <i> Application name in a human readable string.
-
-
-#ifndef APP_NAME
-#define APP_NAME "OpenThread App"
-#endif
-
-
-// <q> APP_VERSION_MAJOR
-
-// <i> Application version major version.
-
-#ifndef APP_VERSION_MAJOR
-#define APP_VERSION_MAJOR 1
-#endif
-
-
-// <q> APP_VERSION_MINOR
-
-// <i> Application version minor version.
-
-
-#ifndef APP_VERSION_MINOR
-#define APP_VERSION_MINOR 0
-#endif
-
-
-// <q> APP_VERSION_PATCH
-
-// <i> Application version patch version.
-
-
-#ifndef APP_VERSION_PATCH
-#define APP_VERSION_PATCH 0
-#endif
-
-
-// <q> @def APP_ID
-
-// <i> Application ID.
-
-
-#ifndef APP_ID
-#define APP_ID 1
-#endif
-
-
-// <q> APP_VERSION_PRERELEASE
-
-// <i> Application prerelease tag.
-
-
-#ifndef APP_VERSION_PRERELEASE
-#define APP_VERSION_PRERELEASE ""
-#endif
-
-
-// <q> APP_VERSION_METADATA
-
-// <i> Application metadata.
-
-
-#ifndef APP_VERSION_METADATA
-#define APP_VERSION_METADATA ""
-#endif
-
-// <h> app_usbd_cdc_acm - USB CDC ACM class
-
-//==========================================================
-// <q> APP_USBD_CDC_ACM_ENABLED - app_usbd_cdc_acm - USB CDC ACM class
-
-
-#ifndef APP_USBD_CDC_ACM_ENABLED
-#define APP_USBD_CDC_ACM_ENABLED 1
-#endif
-
-// <q> APP_USBD_CDC_ACM_ZLP_ON_EPSIZE_WRITE - Send ZLP on write with same size as endpoint
-
-
-// <i> If enabled, CDC ACM class will automatically send a zero length packet after transfer which has the same size as endpoint.
-// <i> This may limit throughput if a lot of binary data is sent, but in terminal mode operation it makes sure that the data is always displayed right after it is sent.
-
-#ifndef APP_USBD_CDC_ACM_ZLP_ON_EPSIZE_WRITE
-#define APP_USBD_CDC_ACM_ZLP_ON_EPSIZE_WRITE 1
-#endif
-
-// </h>
-
-// <h> app_usbd_nrf_dfu_trigger - USB Trigger library
-
-//==========================================================
-// <q> APP_USBD_NRF_DFU_TRIGGER_ENABLED
-
-
-// <i> Enable possibility to enter the bootloader from the application via a software trigger send over USB.
-// <i> Requires configured BSP_SELF_PINRESET_PIN which is a GPIO pin connected to the reset pin.
-
-#ifndef APP_USBD_NRF_DFU_TRIGGER_ENABLED
-#define APP_USBD_NRF_DFU_TRIGGER_ENABLED 0
-#endif
-
-// <q> BSP_SELF_PINRESET_PIN
-
-
-// <i> Enable possibility to enter the bootloader from the application via a software trigger send over USB.
-// <i> Requires configured BSP_SELF_PINRESET_PIN which is a GPIO pin connected to the reset pin.
-// <i> NRF_GPIO_PIN_MAP(0,19) is a pin used on Nordic PCA10059 Dongle.
-
-#ifndef BSP_SELF_PINRESET_PIN
-#define BSP_SELF_PINRESET_PIN NRF_GPIO_PIN_MAP(0, 19)
-#endif
-
-// <q> NRF_DFU_TRIGGER_USB_USB_SHARED
-
-// <i> Flag indicating whether USB is used for other purposes in the application.
-
-#ifndef NRF_DFU_TRIGGER_USB_USB_SHARED
-#define NRF_DFU_TRIGGER_USB_USB_SHARED 1
-#endif
-
-
-// <q> NRF_DFU_TRIGGER_USB_INTERFACE_NUM
-
-// <i> The USB interface to use for the DFU Trigger library.
-// <i> According to the USB Specification, interface numbers cannot have gaps. Tailor this value to adhere to this
-// <i> limitation. Takes values between 0-255
-
-#ifndef NRF_DFU_TRIGGER_USB_INTERFACE_NUM
-#define NRF_DFU_TRIGGER_USB_INTERFACE_NUM 0
-#endif
-
-// </h>
-
-//==========================================================
-
-// <h> nrf_log - Logging
-
-//==========================================================
-// <e> NRF_LOG_ENABLED - Logging module for nRF5 SDK
-//==========================================================
-#ifndef NRF_LOG_ENABLED
-#define NRF_LOG_ENABLED 0
-#endif
-
-// </e>
-// </h>
-
-// <h> segger_rtt - SEGGER RTT
-
-//==========================================================
-// <o> SEGGER_RTT_CONFIG_BUFFER_SIZE_UP - Size of upstream buffer.
-// <i> Note that either @ref NRF_LOG_BACKEND_RTT_OUTPUT_BUFFER_SIZE
-// <i> or this value is actually used. It depends on which one is bigger.
-
-#ifndef SEGGER_RTT_CONFIG_BUFFER_SIZE_UP
-#define SEGGER_RTT_CONFIG_BUFFER_SIZE_UP 512
-#endif
-
-// <o> SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS - Size of upstream buffer.
-#ifndef SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS
-#define SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS 2
-#endif
-
-// <o> SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN - Size of upstream buffer.
-#ifndef SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN
-#define SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN 16
-#endif
-
-// <o> SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS - Size of upstream buffer.
-#ifndef SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS
-#define SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS 2
-#endif
-
-// <o> SEGGER_RTT_CONFIG_DEFAULT_MODE - RTT behavior if the buffer is full.
-
-
-// <i> The following modes are supported:
-// <i> - SKIP - Do not block, output nothing.
-// <i> - TRIM - Do not block, output as much as fits.
-// <i> - BLOCK - Wait until there is space in the buffer.
-// <0=> SKIP
-// <1=> TRIM
-// <2=> BLOCK_IF_FIFO_FULL
-
-#ifndef SEGGER_RTT_CONFIG_DEFAULT_MODE
-#define SEGGER_RTT_CONFIG_DEFAULT_MODE 0
-#endif
-
-// </h>
-//==========================================================
-
-// <e> CLOCK_ENABLED - nrf_drv_clock - CLOCK peripheral driver
-//==========================================================
-#ifndef CLOCK_ENABLED
-#define CLOCK_ENABLED 1
-#endif
-// <o> CLOCK_CONFIG_XTAL_FREQ - HF XTAL Frequency
-
-// <0=> Default (64 MHz)
-
-#ifndef CLOCK_CONFIG_XTAL_FREQ
-#define CLOCK_CONFIG_XTAL_FREQ 0
-#endif
-
-// <o> CLOCK_CONFIG_LF_SRC - LF Clock Source
-
-// <0=> RC
-// <1=> XTAL
-// <2=> Synth
-
-#ifndef CLOCK_CONFIG_LF_SRC
-#define CLOCK_CONFIG_LF_SRC 1
-#endif
-
-// <o> CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority
-
-
-// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
-// <0=> 0 (highest)
-// <1=> 1
-// <2=> 2
-// <3=> 3
-// <4=> 4
-// <5=> 5
-// <6=> 6
-// <7=> 7
-
-#ifndef CLOCK_CONFIG_IRQ_PRIORITY
-#define CLOCK_CONFIG_IRQ_PRIORITY 7
-#endif
-
-// </e>
-
-// <e> POWER_ENABLED - nrf_drv_power - POWER peripheral driver
-//==========================================================
-
-#if (USB_CDC_AS_SERIAL_TRANSPORT == 1)
-#ifndef POWER_ENABLED
-#define POWER_ENABLED 1
-#endif
-#else // USB_CDC_AS_SERIAL_TRANSPORT == 1
-#ifndef POWER_ENABLED
-#define POWER_ENABLED 0
-#endif
-#endif // USB_CDC_AS_SERIAL_TRANSPORT == 1
-
-// <o> POWER_CONFIG_IRQ_PRIORITY - Interrupt priority
-
-
-// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
-// <0=> 0 (highest)
-// <1=> 1
-// <2=> 2
-// <3=> 3
-// <4=> 4
-// <5=> 5
-// <6=> 6
-// <7=> 7
-
-#ifndef POWER_CONFIG_IRQ_PRIORITY
-#define POWER_CONFIG_IRQ_PRIORITY 7
-#endif
-
-// <q> POWER_CONFIG_DEFAULT_DCDCEN - The default configuration of main DCDC regulator
-
-
-// <i> This settings means only that components for DCDC regulator are installed and it can be enabled.
-
-#ifndef POWER_CONFIG_DEFAULT_DCDCEN
-#define POWER_CONFIG_DEFAULT_DCDCEN 0
-#endif
-
-// <q> POWER_CONFIG_DEFAULT_DCDCENHV - The default configuration of High Voltage DCDC regulator
-
-
-// <i> This settings means only that components for DCDC regulator are installed and it can be enabled.
-
-#ifndef POWER_CONFIG_DEFAULT_DCDCENHV
-#define POWER_CONFIG_DEFAULT_DCDCENHV 0
-#endif
-
-// </e>
-
-
-// <e> NRFX_SPIS_ENABLED - nrfx_spis - SPIS peripheral driver
-//==========================================================
-#if (SPIS_AS_SERIAL_TRANSPORT == 1)
-#ifndef NRFX_SPIS_ENABLED
-#define NRFX_SPIS_ENABLED 1
-#endif
-#else // SPIS_AS_SERIAL_TRANSPORT == 1
-#ifndef NRFX_SPIS_ENABLED
-#define NRFX_SPIS_ENABLED 0
-#endif
-#endif // SPIS_AS_SERIAL_TRANSPORT == 1
-
-// <q> NRFX_SPIS0_ENABLED - Enable SPIS0 instance
-
-#ifndef NRFX_SPIS0_ENABLED
-#define NRFX_SPIS0_ENABLED 1
-#endif
-
-// <q> NRFX_SPIS1_ENABLED - Enable SPIS1 instance
-
-
-#ifndef NRFX_SPIS1_ENABLED
-#define NRFX_SPIS1_ENABLED 0
-#endif
-
-// <q> NRFX_SPIS2_ENABLED - Enable SPIS2 instance
-
-
-#ifndef NRFX_SPIS2_ENABLED
-#define NRFX_SPIS2_ENABLED 0
-#endif
-
-// <o> NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
-
-// <0=> 0 (highest)
-// <1=> 1
-// <2=> 2
-// <3=> 3
-// <4=> 4
-// <5=> 5
-// <6=> 6
-// <7=> 7
-
-#ifndef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY
-#define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY 7
-#endif
-
-// <o> NRFX_SPIS_DEFAULT_DEF - SPIS default DEF character <0-255>
-
-
-#ifndef NRFX_SPIS_DEFAULT_DEF
-#define NRFX_SPIS_DEFAULT_DEF 255
-#endif
-
-// <o> NRFX_SPIS_DEFAULT_ORC - SPIS default ORC character <0-255>
-
-
-#ifndef NRFX_SPIS_DEFAULT_ORC
-#define NRFX_SPIS_DEFAULT_ORC 255
-#endif
-
-// <e> NRFX_SPIS_CONFIG_LOG_ENABLED - Enables logging in the module.
-//==========================================================
-#ifndef NRFX_SPIS_CONFIG_LOG_ENABLED
-#define NRFX_SPIS_CONFIG_LOG_ENABLED 0
-#endif
-// <o> NRFX_SPIS_CONFIG_LOG_LEVEL - Default Severity level
-
-// <0=> Off
-// <1=> Error
-// <2=> Warning
-// <3=> Info
-// <4=> Debug
-
-#ifndef NRFX_SPIS_CONFIG_LOG_LEVEL
-#define NRFX_SPIS_CONFIG_LOG_LEVEL 3
-#endif
-
-// <o> NRFX_SPIS_CONFIG_INFO_COLOR - ANSI escape code prefix.
-
-// <0=> Default
-// <1=> Black
-// <2=> Red
-// <3=> Green
-// <4=> Yellow
-// <5=> Blue
-// <6=> Magenta
-// <7=> Cyan
-// <8=> White
-
-#ifndef NRFX_SPIS_CONFIG_INFO_COLOR
-#define NRFX_SPIS_CONFIG_INFO_COLOR 0
-#endif
-
-// <o> NRFX_SPIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
-
-// <0=> Default
-// <1=> Black
-// <2=> Red
-// <3=> Green
-// <4=> Yellow
-// <5=> Blue
-// <6=> Magenta
-// <7=> Cyan
-// <8=> White
-
-#ifndef NRFX_SPIS_CONFIG_DEBUG_COLOR
-#define NRFX_SPIS_CONFIG_DEBUG_COLOR 0
-#endif
-
-// </e>
-
-// </e>
-
-// <q> SYSTICK_ENABLED - nrf_drv_systick - SysTick driver
-
-#if (USB_CDC_AS_SERIAL_TRANSPORT == 1)
-#ifndef SYSTICK_ENABLED
-#define SYSTICK_ENABLED 1
-#endif
-#else // USB_CDC_AS_SERIAL_TRANSPORT == 1
-#ifndef SYSTICK_ENABLED
-#define SYSTICK_ENABLED 0
-#endif
-#endif // USB_CDC_AS_SERIAL_TRANSPORT == 1
-
-#endif //SDK_CONFIG_H
+#ifndef SDK_CONFIG_H
+#define SDK_CONFIG_H
+
+#include <openthread/config.h>
+#undef PACKAGE
+
+#if defined(__GNUC__)
+#pragma GCC diagnostic ignored "-Wpedantic"
+#pragma GCC diagnostic ignored "-Wunused-parameter"
+#endif
+
+//==========================================================
+// <e> APP_USBD_ENABLED - app_usbd - USB Device library
+//==========================================================
+#if (USB_CDC_AS_SERIAL_TRANSPORT == 1)
+#ifndef APP_USBD_ENABLED
+#define APP_USBD_ENABLED 1
+#endif
+#else // USB_CDC_AS_SERIAL_TRANSPORT == 1
+#ifndef APP_USBD_ENABLED
+#define APP_USBD_ENABLED 0
+#endif
+#endif // USB_CDC_AS_SERIAL_TRANSPORT == 1
+
+// <s> APP_USBD_VID - Vendor ID
+
+// <i> Vendor ID ordered from USB IF: http://www.usb.org/developers/vendor/
+#ifndef APP_USBD_VID
+#define APP_USBD_VID 0x1915
+#endif
+
+// <s> APP_USBD_PID - Product ID
+
+// <i> Selected Product ID
+#ifndef APP_USBD_PID
+#define APP_USBD_PID 0xCAFE
+#endif
+
+// <o> APP_USBD_DEVICE_VER_MAJOR - Major device version <0-99>
+
+
+// <i> Major device version, will be converted automatically to BCD notation. Use just decimal values.
+
+#ifndef APP_USBD_DEVICE_VER_MAJOR
+#define APP_USBD_DEVICE_VER_MAJOR 1
+#endif
+
+// <o> APP_USBD_DEVICE_VER_MINOR - Minor device version <0-9>
+
+
+// <i> Minor device version, will be converted automatically to BCD notation. Use just decimal values.
+
+#ifndef APP_USBD_DEVICE_VER_MINOR
+#define APP_USBD_DEVICE_VER_MINOR 0
+#endif
+
+// <o> APP_USBD_DEVICE_VER_SUB - Sub-minor device version <0-9>
+
+
+// <i> Sub-minor device version, will be converted automatically to BCD notation. Use just decimal values.
+
+#ifndef APP_USBD_DEVICE_VER_SUB
+#define APP_USBD_DEVICE_VER_SUB 0
+#endif
+
+// <q> APP_USBD_CONFIG_SELF_POWERED - Self powered
+
+
+#ifndef APP_USBD_CONFIG_SELF_POWERED
+#define APP_USBD_CONFIG_SELF_POWERED 1
+#endif
+
+// <o> APP_USBD_CONFIG_MAX_POWER - MaxPower field in configuration descriptor in milliamps. <0-500>
+
+
+#ifndef APP_USBD_CONFIG_MAX_POWER
+#define APP_USBD_CONFIG_MAX_POWER 500
+#endif
+
+// <q> APP_USBD_CONFIG_POWER_EVENTS_PROCESS - Process power events
+
+
+// <i> Enable processing power events in USB event handler.
+
+#ifndef APP_USBD_CONFIG_POWER_EVENTS_PROCESS
+#define APP_USBD_CONFIG_POWER_EVENTS_PROCESS 1
+#endif
+
+// <e> APP_USBD_CONFIG_EVENT_QUEUE_ENABLE - Enable event queue
+
+// <i> This is the default configuration when all the events are placed into internal queue.
+// <i> Disable it when external queue is used like app_scheduler or if you wish to process all events inside interrupts.
+// <i> Processing all events from the interrupt level adds requirement not to call any functions that modifies the USBD library state from the context higher than USB interrupt context.
+// <i> Functions that modify USBD state are functions for sleep, wakeup, start, stop, enable and disable.
+//==========================================================
+#ifndef APP_USBD_CONFIG_EVENT_QUEUE_ENABLE
+#define APP_USBD_CONFIG_EVENT_QUEUE_ENABLE 1
+#endif
+// <o> APP_USBD_CONFIG_EVENT_QUEUE_SIZE - The size of event queue <16-64>
+
+
+// <i> The size of the queue for the events that would be processed in the main loop.
+
+#ifndef APP_USBD_CONFIG_EVENT_QUEUE_SIZE
+#define APP_USBD_CONFIG_EVENT_QUEUE_SIZE 32
+#endif
+
+// <o> APP_USBD_CONFIG_SOF_HANDLING_MODE - Change SOF events handling mode.
+
+
+// <i> Normal queue - SOF events are pushed normally into event queue.
+// <i> Compress queue - SOF events are counted and binded with other events or executed when queue is empty.
+// <i> This prevents queue from filling with SOF events.
+// <i> Interrupt - SOF events are processed in interrupt.
+// <0=> Normal queue
+// <1=> Compress queue
+// <2=> Interrupt
+
+#ifndef APP_USBD_CONFIG_SOF_HANDLING_MODE
+#define APP_USBD_CONFIG_SOF_HANDLING_MODE 1
+#endif
+
+// </e>
+
+// <q> APP_USBD_CONFIG_SOF_TIMESTAMP_PROVIDE - Provide a function that generates timestamps for logs based on the current SOF
+
+
+// <i> The function app_usbd_sof_timestamp_get will be implemented if the logger is enabled.
+// <i> Use it when initializing the logger.
+// <i> SOF processing will be always enabled when this configuration parameter is active.
+// <i> Notice that this option is configured outside of APP_USBD_CONFIG_LOG_ENABLED.
+// <i> This means that it will work even if the logging in this very module is disabled.
+
+#ifndef APP_USBD_CONFIG_SOF_TIMESTAMP_PROVIDE
+#define APP_USBD_CONFIG_SOF_TIMESTAMP_PROVIDE 0
+#endif
+
+// <o> APP_USBD_CONFIG_DESC_STRING_SIZE - Maximum size of the NULL-terminated string of the string descriptor. <31-254>
+
+
+// <i> 31 characters can be stored in the internal USB buffer used for transfers.
+// <i> Any value higher than 31 creates an additional buffer just for descriptor strings.
+
+#ifndef APP_USBD_CONFIG_DESC_STRING_SIZE
+#define APP_USBD_CONFIG_DESC_STRING_SIZE 31
+#endif
+
+// <q> APP_USBD_CONFIG_DESC_STRING_UTF_ENABLED - Enable UTF8 conversion.
+
+
+// <i> Enable UTF8-encoded characters. In normal processing, only ASCII characters are available.
+
+#ifndef APP_USBD_CONFIG_DESC_STRING_UTF_ENABLED
+#define APP_USBD_CONFIG_DESC_STRING_UTF_ENABLED 0
+#endif
+
+// <s> APP_USBD_STRINGS_LANGIDS - Supported languages identifiers.
+
+// <i> Note: This value is not editable in Configuration Wizard.
+// <i> Comma-separated list of supported languages.
+#ifndef APP_USBD_STRINGS_LANGIDS
+#define APP_USBD_STRINGS_LANGIDS APP_USBD_LANG_AND_SUBLANG(APP_USBD_LANG_ENGLISH, APP_USBD_SUBLANG_ENGLISH_US)
+#endif
+
+// <e> APP_USBD_STRING_ID_MANUFACTURER - Define manufacturer string ID.
+
+// <i> Setting ID to 0 disables the string.
+//==========================================================
+#ifndef APP_USBD_STRING_ID_MANUFACTURER
+#define APP_USBD_STRING_ID_MANUFACTURER 1
+#endif
+// <q> APP_USBD_STRINGS_MANUFACTURER_EXTERN - Define whether @ref APP_USBD_STRINGS_MANUFACTURER is created by macro or declared as a global variable.
+
+
+#ifndef APP_USBD_STRINGS_MANUFACTURER_EXTERN
+#define APP_USBD_STRINGS_MANUFACTURER_EXTERN 0
+#endif
+
+// <s> APP_USBD_STRINGS_MANUFACTURER - String descriptor for the manufacturer name.
+
+// <i> Note: This value is not editable in Configuration Wizard.
+// <i> Comma-separated list of manufacturer names for each defined language.
+// <i> Use @ref APP_USBD_STRING_DESC macro to create string descriptor from a NULL-terminated string.
+// <i> Use @ref APP_USBD_STRING_RAW8_DESC macro to create string descriptor from comma-separated uint8_t values.
+// <i> Use @ref APP_USBD_STRING_RAW16_DESC macro to create string descriptor from comma-separated uint16_t values.
+// <i> Alternatively, configure the macro to point to any internal variable pointer that already contains the descriptor.
+// <i> Setting string to NULL disables that string.
+// <i> The order of manufacturer names must be the same like in @ref APP_USBD_STRINGS_LANGIDS.
+#ifndef APP_USBD_STRINGS_MANUFACTURER
+#define APP_USBD_STRINGS_MANUFACTURER APP_USBD_STRING_DESC("Nordic Semiconductor")
+#endif
+
+// </e>
+
+// <e> APP_USBD_STRING_ID_PRODUCT - Define product string ID.
+
+// <i> Setting ID to 0 disables the string.
+//==========================================================
+#ifndef APP_USBD_STRING_ID_PRODUCT
+#define APP_USBD_STRING_ID_PRODUCT 2
+#endif
+// <q> APP_USBD_STRINGS_PRODUCT_EXTERN - Define whether @ref APP_USBD_STRINGS_PRODUCT is created by macro or declared as a global variable.
+
+
+#ifndef APP_USBD_STRINGS_PRODUCT_EXTERN
+#define APP_USBD_STRINGS_PRODUCT_EXTERN 0
+#endif
+
+// <s> APP_USBD_STRINGS_PRODUCT - String descriptor for the product name.
+
+// <i> Note: This value is not editable in Configuration Wizard.
+// <i> List of product names that is defined the same way like in @ref APP_USBD_STRINGS_MANUFACTURER.
+#ifndef APP_USBD_STRINGS_PRODUCT
+#define APP_USBD_STRINGS_PRODUCT APP_USBD_STRING_DESC("nRF52840 OpenThread Device")
+#endif
+
+// </e>
+
+// <e> APP_USBD_STRING_ID_SERIAL - Define serial number string ID.
+
+// <i> Setting ID to 0 disables the string.
+//==========================================================
+#ifndef APP_USBD_STRING_ID_SERIAL
+#define APP_USBD_STRING_ID_SERIAL 3
+#endif
+// <q> APP_USBD_STRING_SERIAL_EXTERN - Define whether @ref APP_USBD_STRING_SERIAL is created by macro or declared as a global variable.
+
+
+#ifndef APP_USBD_STRING_SERIAL_EXTERN
+#define APP_USBD_STRING_SERIAL_EXTERN 1
+#endif
+
+// <s> APP_USBD_STRING_SERIAL - String descriptor for the serial number.
+
+// <i> Note: This value is not editable in Configuration Wizard.
+// <i> Serial number that is defined the same way like in @ref APP_USBD_STRINGS_MANUFACTURER.
+#ifndef APP_USBD_STRING_SERIAL
+#define APP_USBD_STRING_SERIAL g_extern_serial_number
+#endif
+
+// </e>
+
+// <e> APP_USBD_STRING_ID_CONFIGURATION - Define configuration string ID.
+
+// <i> Setting ID to 0 disables the string.
+//==========================================================
+#ifndef APP_USBD_STRING_ID_CONFIGURATION
+#define APP_USBD_STRING_ID_CONFIGURATION 4
+#endif
+// <q> APP_USBD_STRING_CONFIGURATION_EXTERN - Define whether @ref APP_USBD_STRINGS_CONFIGURATION is created by macro or declared as global variable.
+
+
+#ifndef APP_USBD_STRING_CONFIGURATION_EXTERN
+#define APP_USBD_STRING_CONFIGURATION_EXTERN 0
+#endif
+
+// <s> APP_USBD_STRINGS_CONFIGURATION - String descriptor for the device configuration.
+
+// <i> Note: This value is not editable in Configuration Wizard.
+// <i> Configuration string that is defined the same way like in @ref APP_USBD_STRINGS_MANUFACTURER.
+#ifndef APP_USBD_STRINGS_CONFIGURATION
+#define APP_USBD_STRINGS_CONFIGURATION APP_USBD_STRING_DESC("Default configuration")
+#endif
+
+// </e>
+
+// <s> APP_USBD_STRINGS_USER - Default values for user strings.
+
+// <i> Note: This value is not editable in Configuration Wizard.
+// <i> This value stores all application specific user strings with the default initialization.
+// <i> The setup is done by X-macros.
+// <i> Expected macro parameters:
+// <i> @code
+// <i> X(mnemonic, [=str_idx], ...)
+// <i> @endcode
+// <i> - @c mnemonic: Mnemonic of the string descriptor that would be added to
+// <i> @ref app_usbd_string_desc_idx_t enumerator.
+// <i> - @c str_idx : String index value, can be set or left empty.
+// <i> For example, WinUSB driver requires descriptor to be present on 0xEE index.
+// <i> Then use X(USBD_STRING_WINUSB, =0xEE, (APP_USBD_STRING_DESC(...)))
+// <i> - @c ... : List of string descriptors for each defined language.
+#ifndef APP_USBD_STRINGS_USER
+#define APP_USBD_STRINGS_USER X(APP_USER_1, , APP_USBD_STRING_DESC("User 1"))
+#endif
+
+// </e>
+
+// <e> APP_USBD_CONFIG_LOG_ENABLED - Enable logging in the module
+//==========================================================
+#ifndef APP_USBD_CONFIG_LOG_ENABLED
+#define APP_USBD_CONFIG_LOG_ENABLED 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> USBD_ENABLED - nrf_drv_usbd - USB driver
+//==========================================================
+#if (USB_CDC_AS_SERIAL_TRANSPORT == 1)
+#ifndef USBD_ENABLED
+#define USBD_ENABLED 1
+#endif
+#else // USB_CDC_AS_SERIAL_TRANSPORT == 1
+#ifndef USBD_ENABLED
+#define USBD_ENABLED 0
+#endif
+#endif // USB_CDC_AS_SERIAL_TRANSPORT == 1
+
+// <q> Enable power USB detection.
+
+// <i> Configure if the example supports USB port connection.
+
+#ifndef USBD_POWER_DETECTION
+#define USBD_POWER_DETECTION 1
+#endif
+
+// <o> USBD_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef USBD_CONFIG_IRQ_PRIORITY
+#define USBD_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <o> USBD_CONFIG_DMASCHEDULER_MODE - USBD SMA scheduler working scheme
+
+// <0=> Prioritized access
+// <1=> Round Robin
+
+#ifndef USBD_CONFIG_DMASCHEDULER_MODE
+#define USBD_CONFIG_DMASCHEDULER_MODE 0
+#endif
+
+// <q> USBD_CONFIG_DMASCHEDULER_ISO_BOOST - Give priority to isochronous transfers
+
+
+// <i> This option gives priority to isochronous transfers.
+// <i> Enabling it assures that isochronous transfers are always processed,
+// <i> even if multiple other transfers are pending.
+// <i> Isochronous endpoints are prioritized before the usbd_dma_scheduler_algorithm
+// <i> function is called, so the option is independent of the algorithm chosen.
+
+#ifndef USBD_CONFIG_DMASCHEDULER_ISO_BOOST
+#define USBD_CONFIG_DMASCHEDULER_ISO_BOOST 1
+#endif
+
+// <q> USBD_CONFIG_ISO_IN_ZLP - Respond to an IN token on ISO IN endpoint with ZLP when no data is ready
+
+
+// <i> If set, ISO IN endpoint will respond to an IN token with ZLP when no data is ready to be sent.
+// <i> Else, there will be no response.
+
+#ifndef USBD_CONFIG_ISO_IN_ZLP
+#define USBD_CONFIG_ISO_IN_ZLP 0
+#endif
+
+#define NRFX_USBD_ENABLED USBD_ENABLED
+#define NRFX_USBD_POWER_DETECTION USBD_POWER_DETECTION
+#define NRFX_USBD_CONFIG_IRQ_PRIORITY USBD_CONFIG_IRQ_PRIORITY
+#define NRFX_USBD_CONFIG_DMASCHEDULER_MODE USBD_CONFIG_DMASCHEDULER_MODE
+#define NRFX_USBD_CONFIG_DMASCHEDULER_ISO_BOOST USBD_CONFIG_DMASCHEDULER_ISO_BOOST
+#define NRFX_USBD_CONFIG_ISO_IN_ZLP USBD_CONFIG_ISO_IN_ZLP
+
+// </e>
+
+
+// <h> Application info used by the USB DFU.
+
+// <q> @def APP_NAME
+
+// <i> Application name in a human readable string.
+
+
+#ifndef APP_NAME
+#define APP_NAME "OpenThread App"
+#endif
+
+
+// <q> APP_VERSION_MAJOR
+
+// <i> Application version major version.
+
+#ifndef APP_VERSION_MAJOR
+#define APP_VERSION_MAJOR 1
+#endif
+
+
+// <q> APP_VERSION_MINOR
+
+// <i> Application version minor version.
+
+
+#ifndef APP_VERSION_MINOR
+#define APP_VERSION_MINOR 0
+#endif
+
+
+// <q> APP_VERSION_PATCH
+
+// <i> Application version patch version.
+
+
+#ifndef APP_VERSION_PATCH
+#define APP_VERSION_PATCH 0
+#endif
+
+
+// <q> @def APP_ID
+
+// <i> Application ID.
+
+
+#ifndef APP_ID
+#define APP_ID 1
+#endif
+
+
+// <q> APP_VERSION_PRERELEASE
+
+// <i> Application prerelease tag.
+
+
+#ifndef APP_VERSION_PRERELEASE
+#define APP_VERSION_PRERELEASE ""
+#endif
+
+
+// <q> APP_VERSION_METADATA
+
+// <i> Application metadata.
+
+
+#ifndef APP_VERSION_METADATA
+#define APP_VERSION_METADATA ""
+#endif
+
+// <h> app_usbd_cdc_acm - USB CDC ACM class
+
+//==========================================================
+// <q> APP_USBD_CDC_ACM_ENABLED - app_usbd_cdc_acm - USB CDC ACM class
+
+
+#ifndef APP_USBD_CDC_ACM_ENABLED
+#define APP_USBD_CDC_ACM_ENABLED 1
+#endif
+
+// <q> APP_USBD_CDC_ACM_ZLP_ON_EPSIZE_WRITE - Send ZLP on write with same size as endpoint
+
+
+// <i> If enabled, CDC ACM class will automatically send a zero length packet after transfer which has the same size as endpoint.
+// <i> This may limit throughput if a lot of binary data is sent, but in terminal mode operation it makes sure that the data is always displayed right after it is sent.
+
+#ifndef APP_USBD_CDC_ACM_ZLP_ON_EPSIZE_WRITE
+#define APP_USBD_CDC_ACM_ZLP_ON_EPSIZE_WRITE 1
+#endif
+
+// </h>
+
+// <h> app_usbd_nrf_dfu_trigger - USB Trigger library
+
+//==========================================================
+// <q> APP_USBD_NRF_DFU_TRIGGER_ENABLED
+
+
+// <i> Enable possibility to enter the bootloader from the application via a software trigger send over USB.
+// <i> Requires configured BSP_SELF_PINRESET_PIN which is a GPIO pin connected to the reset pin.
+
+#ifndef APP_USBD_NRF_DFU_TRIGGER_ENABLED
+#define APP_USBD_NRF_DFU_TRIGGER_ENABLED 0
+#endif
+
+// <q> BSP_SELF_PINRESET_PIN
+
+
+// <i> Enable possibility to enter the bootloader from the application via a software trigger send over USB.
+// <i> Requires configured BSP_SELF_PINRESET_PIN which is a GPIO pin connected to the reset pin.
+// <i> NRF_GPIO_PIN_MAP(0,19) is a pin used on Nordic PCA10059 Dongle.
+
+#ifndef BSP_SELF_PINRESET_PIN
+#define BSP_SELF_PINRESET_PIN NRF_GPIO_PIN_MAP(0, 19)
+#endif
+
+// <q> NRF_DFU_TRIGGER_USB_USB_SHARED
+
+// <i> Flag indicating whether USB is used for other purposes in the application.
+
+#ifndef NRF_DFU_TRIGGER_USB_USB_SHARED
+#define NRF_DFU_TRIGGER_USB_USB_SHARED 1
+#endif
+
+
+// <q> NRF_DFU_TRIGGER_USB_INTERFACE_NUM
+
+// <i> The USB interface to use for the DFU Trigger library.
+// <i> According to the USB Specification, interface numbers cannot have gaps. Tailor this value to adhere to this
+// <i> limitation. Takes values between 0-255
+
+#ifndef NRF_DFU_TRIGGER_USB_INTERFACE_NUM
+#define NRF_DFU_TRIGGER_USB_INTERFACE_NUM 0
+#endif
+
+// </h>
+
+//==========================================================
+
+// <h> nrf_log - Logging
+
+//==========================================================
+// <e> NRF_LOG_ENABLED - Logging module for nRF5 SDK
+//==========================================================
+#ifndef NRF_LOG_ENABLED
+#define NRF_LOG_ENABLED 0
+#endif
+
+// </e>
+// </h>
+
+// <h> segger_rtt - SEGGER RTT
+
+//==========================================================
+// <o> SEGGER_RTT_CONFIG_BUFFER_SIZE_UP - Size of upstream buffer.
+// <i> Note that either @ref NRF_LOG_BACKEND_RTT_OUTPUT_BUFFER_SIZE
+// <i> or this value is actually used. It depends on which one is bigger.
+
+#ifndef SEGGER_RTT_CONFIG_BUFFER_SIZE_UP
+#define SEGGER_RTT_CONFIG_BUFFER_SIZE_UP 512
+#endif
+
+// <o> SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS - Size of upstream buffer.
+#ifndef SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS
+#define SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS 2
+#endif
+
+// <o> SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN - Size of upstream buffer.
+#ifndef SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN
+#define SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN 16
+#endif
+
+// <o> SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS - Size of upstream buffer.
+#ifndef SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS
+#define SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS 2
+#endif
+
+// <o> SEGGER_RTT_CONFIG_DEFAULT_MODE - RTT behavior if the buffer is full.
+
+
+// <i> The following modes are supported:
+// <i> - SKIP - Do not block, output nothing.
+// <i> - TRIM - Do not block, output as much as fits.
+// <i> - BLOCK - Wait until there is space in the buffer.
+// <0=> SKIP
+// <1=> TRIM
+// <2=> BLOCK_IF_FIFO_FULL
+
+#ifndef SEGGER_RTT_CONFIG_DEFAULT_MODE
+#define SEGGER_RTT_CONFIG_DEFAULT_MODE 0
+#endif
+
+// </h>
+//==========================================================
+
+// <e> NRF_CLOCK_ENABLED - nrf_drv_clock - CLOCK peripheral driver
+//==========================================================
+#ifndef NRF_CLOCK_ENABLED
+#define NRF_CLOCK_ENABLED 1
+#endif
+// <o> CLOCK_CONFIG_XTAL_FREQ - HF XTAL Frequency
+
+// <0=> Default (64 MHz)
+
+#ifndef CLOCK_CONFIG_XTAL_FREQ
+#define CLOCK_CONFIG_XTAL_FREQ 0
+#endif
+
+// <o> CLOCK_CONFIG_LF_SRC - LF Clock Source
+
+// <0=> RC
+// <1=> XTAL
+// <2=> Synth
+
+#ifndef CLOCK_CONFIG_LF_SRC
+#define CLOCK_CONFIG_LF_SRC 1
+#endif
+
+// <o> CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef CLOCK_CONFIG_IRQ_PRIORITY
+#define CLOCK_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// </e>
+
+// <e> POWER_ENABLED - nrf_drv_power - POWER peripheral driver
+//==========================================================
+
+#if (USB_CDC_AS_SERIAL_TRANSPORT == 1)
+#ifndef POWER_ENABLED
+#define POWER_ENABLED 1
+#endif
+#else // USB_CDC_AS_SERIAL_TRANSPORT == 1
+#ifndef POWER_ENABLED
+#define POWER_ENABLED 0
+#endif
+#endif // USB_CDC_AS_SERIAL_TRANSPORT == 1
+
+// <o> POWER_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+
+// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef POWER_CONFIG_IRQ_PRIORITY
+#define POWER_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <q> POWER_CONFIG_DEFAULT_DCDCEN - The default configuration of main DCDC regulator
+
+
+// <i> This settings means only that components for DCDC regulator are installed and it can be enabled.
+
+#ifndef POWER_CONFIG_DEFAULT_DCDCEN
+#define POWER_CONFIG_DEFAULT_DCDCEN 0
+#endif
+
+// <q> POWER_CONFIG_DEFAULT_DCDCENHV - The default configuration of High Voltage DCDC regulator
+
+
+// <i> This settings means only that components for DCDC regulator are installed and it can be enabled.
+
+#ifndef POWER_CONFIG_DEFAULT_DCDCENHV
+#define POWER_CONFIG_DEFAULT_DCDCENHV 0
+#endif
+
+// </e>
+
+
+// <e> NRFX_SPIS_ENABLED - nrfx_spis - SPIS peripheral driver
+//==========================================================
+#if (SPIS_AS_SERIAL_TRANSPORT == 1)
+#ifndef NRFX_SPIS_ENABLED
+#define NRFX_SPIS_ENABLED 1
+#endif
+#else // SPIS_AS_SERIAL_TRANSPORT == 1
+#ifndef NRFX_SPIS_ENABLED
+#define NRFX_SPIS_ENABLED 0
+#endif
+#endif // SPIS_AS_SERIAL_TRANSPORT == 1
+
+// <q> NRFX_SPIS0_ENABLED - Enable SPIS0 instance
+
+#ifndef NRFX_SPIS0_ENABLED
+#define NRFX_SPIS0_ENABLED 1
+#endif
+
+// <q> NRFX_SPIS1_ENABLED - Enable SPIS1 instance
+
+
+#ifndef NRFX_SPIS1_ENABLED
+#define NRFX_SPIS1_ENABLED 0
+#endif
+
+// <q> NRFX_SPIS2_ENABLED - Enable SPIS2 instance
+
+
+#ifndef NRFX_SPIS2_ENABLED
+#define NRFX_SPIS2_ENABLED 0
+#endif
+
+// <o> NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <o> NRFX_SPIS_DEFAULT_DEF - SPIS default DEF character <0-255>
+
+
+#ifndef NRFX_SPIS_DEFAULT_DEF
+#define NRFX_SPIS_DEFAULT_DEF 255
+#endif
+
+// <o> NRFX_SPIS_DEFAULT_ORC - SPIS default ORC character <0-255>
+
+
+#ifndef NRFX_SPIS_DEFAULT_ORC
+#define NRFX_SPIS_DEFAULT_ORC 255
+#endif
+
+// <e> NRFX_SPIS_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_SPIS_CONFIG_LOG_ENABLED
+#define NRFX_SPIS_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_SPIS_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_SPIS_CONFIG_LOG_LEVEL
+#define NRFX_SPIS_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_SPIS_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_SPIS_CONFIG_INFO_COLOR
+#define NRFX_SPIS_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_SPIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_SPIS_CONFIG_DEBUG_COLOR
+#define NRFX_SPIS_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_TIMER_ENABLED - nrfx_timer - TIMER periperal driver
+//==========================================================
+#ifndef NRFX_TIMER_ENABLED
+#define NRFX_TIMER_ENABLED 1
+#endif
+// <q> NRFX_TIMER0_ENABLED - Enable TIMER0 instance
+
+
+#ifndef NRFX_TIMER0_ENABLED
+#define NRFX_TIMER0_ENABLED 1
+#endif
+
+// <q> NRFX_TIMER1_ENABLED - Enable TIMER1 instance
+
+
+#ifndef NRFX_TIMER1_ENABLED
+#define NRFX_TIMER1_ENABLED 1
+#endif
+
+// <q> NRFX_TIMER2_ENABLED - Enable TIMER2 instance
+
+
+#ifndef NRFX_TIMER2_ENABLED
+#define NRFX_TIMER2_ENABLED 1
+#endif
+
+// <q> NRFX_TIMER3_ENABLED - Enable TIMER3 instance
+
+
+#ifndef NRFX_TIMER3_ENABLED
+#define NRFX_TIMER3_ENABLED 1
+#endif
+
+// <q> NRFX_TIMER4_ENABLED - Enable TIMER4 instance
+
+
+#ifndef NRFX_TIMER4_ENABLED
+#define NRFX_TIMER4_ENABLED 1
+#endif
+
+// <o> NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY - Timer frequency if in Timer mode
+
+// <0=> 16 MHz
+// <1=> 8 MHz
+// <2=> 4 MHz
+// <3=> 2 MHz
+// <4=> 1 MHz
+// <5=> 500 kHz
+// <6=> 250 kHz
+// <7=> 125 kHz
+// <8=> 62.5 kHz
+// <9=> 31.25 kHz
+
+#ifndef NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY
+#define NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY 0
+#endif
+
+// <o> NRFX_TIMER_DEFAULT_CONFIG_MODE - Timer mode or operation
+
+// <0=> Timer
+// <1=> Counter
+
+#ifndef NRFX_TIMER_DEFAULT_CONFIG_MODE
+#define NRFX_TIMER_DEFAULT_CONFIG_MODE 0
+#endif
+
+// <o> NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH - Timer counter bit width
+
+// <0=> 16 bit
+// <1=> 8 bit
+// <2=> 24 bit
+// <3=> 32 bit
+
+#ifndef NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH
+#define NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH 0
+#endif
+
+// <o> NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <e> NRFX_TIMER_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_TIMER_CONFIG_LOG_ENABLED
+#define NRFX_TIMER_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_TIMER_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_TIMER_CONFIG_LOG_LEVEL
+#define NRFX_TIMER_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_TIMER_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_TIMER_CONFIG_INFO_COLOR
+#define NRFX_TIMER_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_TIMER_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_TIMER_CONFIG_DEBUG_COLOR
+#define NRFX_TIMER_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <q> SYSTICK_ENABLED - nrf_drv_systick - SysTick driver
+
+#if (USB_CDC_AS_SERIAL_TRANSPORT == 1)
+#ifndef SYSTICK_ENABLED
+#define SYSTICK_ENABLED 1
+#endif
+#else // USB_CDC_AS_SERIAL_TRANSPORT == 1
+#ifndef SYSTICK_ENABLED
+#define SYSTICK_ENABLED 0
+#endif
+#endif // USB_CDC_AS_SERIAL_TRANSPORT == 1
+
+#endif //SDK_CONFIG_H
diff --git a/third_party/NordicSemiconductor/dependencies/sdk_errors.h b/third_party/NordicSemiconductor/dependencies/sdk_errors.h
index 2f125d2..7d3a96b 100644
--- a/third_party/NordicSemiconductor/dependencies/sdk_errors.h
+++ b/third_party/NordicSemiconductor/dependencies/sdk_errors.h
@@ -1,167 +1,168 @@
-/**
- * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-/**@file
- *
- * @defgroup sdk_error SDK Error codes
- * @{
- * @ingroup app_common
- * @{
- * @details Error codes are 32-bit unsigned integers with the most significant 16-bit reserved for
- * identifying the module where the error occurred while the least least significant LSB
- * are used to provide the cause or nature of error. Each module is assigned a 16-bit
- * unsigned integer. Which it will use to identify all errors that occurred in it. 16-bit
- * LSB range is with module id as the MSB in the 32-bit error code is reserved for the
- * module. As an example, if 0x8800 identifies a certain SDK module, all values from
- * 0x88000000 - 0x8800FFFF are reserved for this module.
- * It should be noted that common error reasons have been assigned values to make it
- * possible to decode error reason easily. As an example, lets module uninitialized has
- * been assigned an error code 0x000A0. Then, if application encounters an error code
- * 0xZZZZ00A0, it knows that it accessing a certain module without initializing it.
- * Apart from this, each module is allowed to define error codes that are not covered by
- * the common ones, however, these values are defined in a range that does not conflict
- * with common error values. For module, specific error however, it is possible that the
- * same error value is used by two different modules to indicated errors of very different
- * nature. If error is already defined by the NRF common error codes, these are reused.
- * A range is reserved for application as well, it can use this range for defining
- * application specific errors.
- *
- * @note Success code, NRF_SUCCESS, does not include any module identifier.
-
- */
-
-#ifndef SDK_ERRORS_H__
-#define SDK_ERRORS_H__
-
-#include <stdint.h>
-#include "nrf_error.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @defgroup sdk_err_base Base defined for SDK Modules
- * @{
- */
-#define NRF_ERROR_SDK_ERROR_BASE (NRF_ERROR_BASE_NUM + 0x8000) /**< Base value defined for SDK module identifiers. */
-#define NRF_ERROR_SDK_COMMON_ERROR_BASE (NRF_ERROR_BASE_NUM + 0x0080) /**< Base error value to be used for SDK error values. */
-/** @} */
-
-/**
- * @defgroup sdk_module_codes Codes reserved as identification for module where the error occurred.
- * @{
- */
-#define NRF_ERROR_MEMORY_MANAGER_ERR_BASE (0x8100) /**< Base address for Memory Manager related errors. */
-#define NRF_ERROR_PERIPH_DRIVERS_ERR_BASE (0x8200) /**< Base address for Peripheral drivers related errors. */
-#define NRF_ERROR_GAZELLE_ERR_BASE (0x8300) /**< Base address for Gazelle related errors. */
-#define NRF_ERROR_BLE_IPSP_ERR_BASE (0x8400) /**< Base address for BLE IPSP related errors. */
-#define NRF_ERROR_CRYPTO_ERR_BASE (0x8500) /**< Base address for crypto related errors. */
-/** @} */
-
-
-/**
- * @defgroup sdk_iot_errors Codes reserved as identification for IoT errors.
- * @{
- */
-#define NRF_ERROR_IOT_ERR_BASE_START (0xA000)
-#define NRF_ERROR_IOT_ERR_BASE_STOP (0xAFFF)
-/** @} */
-
-
-/**
- * @defgroup sdk_common_errors Codes reserved as identification for common errors.
- * @{
- */
-#define NRF_ERROR_MODULE_NOT_INITIALIZED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0000) ///< Module not initialized
-#define NRF_ERROR_MUTEX_INIT_FAILED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0001) ///< Mutex initialization failed
-#define NRF_ERROR_MUTEX_LOCK_FAILED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0002) ///< Mutex lock failed
-#define NRF_ERROR_MUTEX_UNLOCK_FAILED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0003) ///< Mutex unlock failed
-#define NRF_ERROR_MUTEX_COND_INIT_FAILED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0004) ///< Mutex conditional initialization failed
-#define NRF_ERROR_MODULE_ALREADY_INITIALIZED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0005) ///< Module already initialized
-#define NRF_ERROR_STORAGE_FULL (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0006) ///< Storage full
-#define NRF_ERROR_API_NOT_IMPLEMENTED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0010) ///< API not implemented
-#define NRF_ERROR_FEATURE_NOT_ENABLED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0011) ///< Feature not enabled
-#define NRF_ERROR_IO_PENDING (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0012) ///< Input/Output pending
-/** @} */
-
-
-/**
- * @defgroup drv_specific_errors Error / status codes specific to drivers.
- * @{
- */
-#define NRF_ERROR_DRV_TWI_ERR_OVERRUN (NRF_ERROR_PERIPH_DRIVERS_ERR_BASE + 0x0000)
-#define NRF_ERROR_DRV_TWI_ERR_ANACK (NRF_ERROR_PERIPH_DRIVERS_ERR_BASE + 0x0001)
-#define NRF_ERROR_DRV_TWI_ERR_DNACK (NRF_ERROR_PERIPH_DRIVERS_ERR_BASE + 0x0002)
-/** @} */
-
-
-/**
- * @defgroup ble_ipsp_errors IPSP codes
- * @brief Error and status codes specific to IPSP.
- * @{
- */
-#define NRF_ERROR_BLE_IPSP_RX_PKT_TRUNCATED (NRF_ERROR_BLE_IPSP_ERR_BASE + 0x0000)
-#define NRF_ERROR_BLE_IPSP_CHANNEL_ALREADY_EXISTS (NRF_ERROR_BLE_IPSP_ERR_BASE + 0x0001)
-#define NRF_ERROR_BLE_IPSP_LINK_DISCONNECTED (NRF_ERROR_BLE_IPSP_ERR_BASE + 0x0002)
-#define NRF_ERROR_BLE_IPSP_PEER_REJECTED (NRF_ERROR_BLE_IPSP_ERR_BASE + 0x0003)
-/* @} */
-
-
-/**
- * @brief API Result.
- *
- * @details Indicates success or failure of an API procedure. In case of failure, a comprehensive
- * error code indicating cause or reason for failure is provided.
- *
- * Though called an API result, it could used in Asynchronous notifications callback along
- * with asynchronous callback as event result. This mechanism is employed when an event
- * marks the end of procedure initiated using API. API result, in this case, will only be
- * an indicative of whether the procedure has been requested successfully.
- */
-typedef uint32_t ret_code_t;
-
-/** @} */
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // SDK_ERRORS_H__
+/**
+ * Copyright (c) 2013 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/**@file
+ *
+ * @defgroup sdk_error SDK Error codes
+ * @{
+ * @ingroup app_common
+ * @{
+ * @details Error codes are 32-bit unsigned integers with the most significant 16-bit reserved for
+ * identifying the module where the error occurred while the least least significant LSB
+ * are used to provide the cause or nature of error. Each module is assigned a 16-bit
+ * unsigned integer. Which it will use to identify all errors that occurred in it. 16-bit
+ * LSB range is with module id as the MSB in the 32-bit error code is reserved for the
+ * module. As an example, if 0x8800 identifies a certain SDK module, all values from
+ * 0x88000000 - 0x8800FFFF are reserved for this module.
+ * It should be noted that common error reasons have been assigned values to make it
+ * possible to decode error reason easily. As an example, lets module uninitialized has
+ * been assigned an error code 0x000A0. Then, if application encounters an error code
+ * 0xZZZZ00A0, it knows that it accessing a certain module without initializing it.
+ * Apart from this, each module is allowed to define error codes that are not covered by
+ * the common ones, however, these values are defined in a range that does not conflict
+ * with common error values. For module, specific error however, it is possible that the
+ * same error value is used by two different modules to indicated errors of very different
+ * nature. If error is already defined by the NRF common error codes, these are reused.
+ * A range is reserved for application as well, it can use this range for defining
+ * application specific errors.
+ *
+ * @note Success code, NRF_SUCCESS, does not include any module identifier.
+
+ */
+
+#ifndef SDK_ERRORS_H__
+#define SDK_ERRORS_H__
+
+#include <stdint.h>
+#include "nrf_error.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup sdk_err_base Base defined for SDK Modules
+ * @{
+ */
+#define NRF_ERROR_SDK_ERROR_BASE (NRF_ERROR_BASE_NUM + 0x8000) /**< Base value defined for SDK module identifiers. */
+#define NRF_ERROR_SDK_COMMON_ERROR_BASE (NRF_ERROR_BASE_NUM + 0x0080) /**< Base error value to be used for SDK error values. */
+/** @} */
+
+/**
+ * @defgroup sdk_module_codes Codes reserved as identification for module where the error occurred.
+ * @{
+ */
+#define NRF_ERROR_MEMORY_MANAGER_ERR_BASE (0x8100) /**< Base address for Memory Manager related errors. */
+#define NRF_ERROR_PERIPH_DRIVERS_ERR_BASE (0x8200) /**< Base address for Peripheral drivers related errors. */
+#define NRF_ERROR_GAZELLE_ERR_BASE (0x8300) /**< Base address for Gazelle related errors. */
+#define NRF_ERROR_BLE_IPSP_ERR_BASE (0x8400) /**< Base address for BLE IPSP related errors. */
+#define NRF_ERROR_CRYPTO_ERR_BASE (0x8500) /**< Base address for crypto related errors. */
+#define NRF_ERROR_FDS_ERR_BASE (0x8600) /**< Base address for FDS related errors. */
+/** @} */
+
+
+/**
+ * @defgroup sdk_iot_errors Codes reserved as identification for IoT errors.
+ * @{
+ */
+#define NRF_ERROR_IOT_ERR_BASE_START (0xA000)
+#define NRF_ERROR_IOT_ERR_BASE_STOP (0xAFFF)
+/** @} */
+
+
+/**
+ * @defgroup sdk_common_errors Codes reserved as identification for common errors.
+ * @{
+ */
+#define NRF_ERROR_MODULE_NOT_INITIALIZED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0000) ///< Module not initialized
+#define NRF_ERROR_MUTEX_INIT_FAILED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0001) ///< Mutex initialization failed
+#define NRF_ERROR_MUTEX_LOCK_FAILED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0002) ///< Mutex lock failed
+#define NRF_ERROR_MUTEX_UNLOCK_FAILED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0003) ///< Mutex unlock failed
+#define NRF_ERROR_MUTEX_COND_INIT_FAILED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0004) ///< Mutex conditional initialization failed
+#define NRF_ERROR_MODULE_ALREADY_INITIALIZED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0005) ///< Module already initialized
+#define NRF_ERROR_STORAGE_FULL (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0006) ///< Storage full
+#define NRF_ERROR_API_NOT_IMPLEMENTED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0010) ///< API not implemented
+#define NRF_ERROR_FEATURE_NOT_ENABLED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0011) ///< Feature not enabled
+#define NRF_ERROR_IO_PENDING (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0012) ///< Input/Output pending
+/** @} */
+
+
+/**
+ * @defgroup drv_specific_errors Error / status codes specific to drivers.
+ * @{
+ */
+#define NRF_ERROR_DRV_TWI_ERR_OVERRUN (NRF_ERROR_PERIPH_DRIVERS_ERR_BASE + 0x0000)
+#define NRF_ERROR_DRV_TWI_ERR_ANACK (NRF_ERROR_PERIPH_DRIVERS_ERR_BASE + 0x0001)
+#define NRF_ERROR_DRV_TWI_ERR_DNACK (NRF_ERROR_PERIPH_DRIVERS_ERR_BASE + 0x0002)
+/** @} */
+
+
+/**
+ * @defgroup ble_ipsp_errors IPSP codes
+ * @brief Error and status codes specific to IPSP.
+ * @{
+ */
+#define NRF_ERROR_BLE_IPSP_RX_PKT_TRUNCATED (NRF_ERROR_BLE_IPSP_ERR_BASE + 0x0000)
+#define NRF_ERROR_BLE_IPSP_CHANNEL_ALREADY_EXISTS (NRF_ERROR_BLE_IPSP_ERR_BASE + 0x0001)
+#define NRF_ERROR_BLE_IPSP_LINK_DISCONNECTED (NRF_ERROR_BLE_IPSP_ERR_BASE + 0x0002)
+#define NRF_ERROR_BLE_IPSP_PEER_REJECTED (NRF_ERROR_BLE_IPSP_ERR_BASE + 0x0003)
+/* @} */
+
+
+/**
+ * @brief API Result.
+ *
+ * @details Indicates success or failure of an API procedure. In case of failure, a comprehensive
+ * error code indicating cause or reason for failure is provided.
+ *
+ * Though called an API result, it could used in Asynchronous notifications callback along
+ * with asynchronous callback as event result. This mechanism is employed when an event
+ * marks the end of procedure initiated using API. API result, in this case, will only be
+ * an indicative of whether the procedure has been requested successfully.
+ */
+typedef uint32_t ret_code_t;
+
+/** @} */
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // SDK_ERRORS_H__
diff --git a/third_party/NordicSemiconductor/dependencies/sdk_macros.h b/third_party/NordicSemiconductor/dependencies/sdk_macros.h
index 7658f9d..4a0b2e9 100644
--- a/third_party/NordicSemiconductor/dependencies/sdk_macros.h
+++ b/third_party/NordicSemiconductor/dependencies/sdk_macros.h
@@ -1,215 +1,224 @@
-/**
- * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-/**@file
- *
-
- * @defgroup sdk_common_macros SDK Common Header
- * @ingroup app_common
- * @brief Macros for parameter checking and similar tasks
- * @{
- */
-
-#ifndef SDK_MACROS_H__
-#define SDK_MACROS_H__
-
-#include "nrf_assert.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-
-/**@brief Macro for parameter checking.
- *
- * If @p _cond evaluates to true, does nothing. Otherwise,
- * if @p _module ## _PARAM_CHECK_DISABLED is @e not set (default), prints an error message
- * if @p _printfn is provided, and returns from the calling function context with code @p _err.
- * If @p _module ## _PARAM_CHECK_DISABLED is set, behaves like the ASSERT macro.
- *
- * Parameter checking implemented using this macro can be optionally turned off for release code.
- * Only disable runtime parameter checks if size if a major concern.
- *
- * @param _module The module name.
- * @param _cond The condition to be evaluated.
- * @param _err The error to be returned.
- * @param _printfn A printf-compatible function used to log the error.
- * Leave empty if no logging is needed.
- *
- * @hideinitializer
- */
-/*lint -esym(666, NRF_PARAM_CHECK*) : Expression with side effects passed to macro */
-#define NRF_PARAM_CHECK(_module, _cond, _err, _printfn) \
- do \
- { \
- if ((_cond)) \
- { \
- /* Do nothing. */ \
- } \
- else if (!(_module ## _PARAM_CHECK_DISABLED)) \
- { \
- _printfn("%s check failed in %s() with value 0x%x.", #_cond, __func__, _err); \
- return (_err); \
- } \
- else \
- { \
- ASSERT((_cond)); \
- } \
- } while (0);
-
-
-/**@brief Macro for verifying statement to be true. It will cause the exterior function to return
- * err_code if the statement is not true.
- *
- * @param[in] statement Statement to test.
- * @param[in] err_code Error value to return if test was invalid.
- *
- * @retval nothing, but will cause the exterior function to return @p err_code if @p statement
- * is false.
- */
-#define VERIFY_TRUE(statement, err_code) \
-do \
-{ \
- if (!(statement)) \
- { \
- return err_code; \
- } \
-} while (0)
-
-
-/**@brief Macro for verifying statement to be true. It will cause the exterior function to return
- * if the statement is not true.
- *
- * @param[in] statement Statement to test.
- */
-#define VERIFY_TRUE_VOID(statement) VERIFY_TRUE((statement), )
-
-
-/**@brief Macro for verifying statement to be false. It will cause the exterior function to return
- * err_code if the statement is not false.
- *
- * @param[in] statement Statement to test.
- * @param[in] err_code Error value to return if test was invalid.
- *
- * @retval nothing, but will cause the exterior function to return @p err_code if @p statement
- * is true.
- */
-#define VERIFY_FALSE(statement, err_code) \
-do \
-{ \
- if ((statement)) \
- { \
- return err_code; \
- } \
-} while (0)
-
-
-/**@brief Macro for verifying statement to be false. It will cause the exterior function to return
- * if the statement is not false.
- *
- * @param[in] statement Statement to test.
- */
-#define VERIFY_FALSE_VOID(statement) VERIFY_FALSE((statement), )
-
-
-/**@brief Macro for verifying that a function returned NRF_SUCCESS. It will cause the exterior
- * function to return error code of statement if it is not @ref NRF_SUCCESS.
- *
- * @param[in] statement Statement to check against NRF_SUCCESS.
- */
-#define VERIFY_SUCCESS(statement) \
-do \
-{ \
- uint32_t _err_code = (uint32_t) (statement); \
- if (_err_code != NRF_SUCCESS) \
- { \
- return _err_code; \
- } \
-} while(0)
-
-
-/**@brief Macro for verifying that a function returned NRF_SUCCESS. It will cause the exterior
- * function to return if the err_code is not @ref NRF_SUCCESS.
- *
- * @param[in] err_code The error code to check.
- */
-#define VERIFY_SUCCESS_VOID(err_code) VERIFY_TRUE_VOID((err_code) == NRF_SUCCESS)
-
-
-/**@brief Macro for verifying that the module is initialized. It will cause the exterior function to
- * return @ref NRF_ERROR_INVALID_STATE if not.
- *
- * @note MODULE_INITIALIZED must be defined in each module using this macro. MODULE_INITIALIZED
- * should be true if the module is initialized, false if not.
- */
-#define VERIFY_MODULE_INITIALIZED() VERIFY_TRUE((MODULE_INITIALIZED), NRF_ERROR_INVALID_STATE)
-
-
-/**@brief Macro for verifying that the module is initialized. It will cause the exterior function to
- * return if not.
- *
- * @note MODULE_INITIALIZED must be defined in each module using this macro. MODULE_INITIALIZED
- * should be true if the module is initialized, false if not.
- */
-#define VERIFY_MODULE_INITIALIZED_VOID() VERIFY_TRUE_VOID((MODULE_INITIALIZED))
-
-
-/**@brief Macro for verifying that the module is initialized. It will cause the exterior function to
- * return if not.
- *
- * @param[in] param The variable to check if is NULL.
- */
-#define VERIFY_PARAM_NOT_NULL(param) VERIFY_FALSE(((param) == NULL), NRF_ERROR_NULL)
-
-
-/**@brief Macro for verifying that the module is initialized. It will cause the exterior function to
- * return if not.
- *
- * @param[in] param The variable to check if is NULL.
- */
-#define VERIFY_PARAM_NOT_NULL_VOID(param) VERIFY_FALSE_VOID(((param) == NULL))
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // SDK_MACROS_H__
-
+/**
+ * Copyright (c) 2013 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/**@file
+ *
+
+ * @defgroup sdk_common_macros SDK Common Header
+ * @ingroup app_common
+ * @brief Macros for parameter checking and similar tasks
+ * @{
+ */
+
+#ifndef SDK_MACROS_H__
+#define SDK_MACROS_H__
+
+#include "nrf_assert.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/**@brief Macro for parameter checking.
+ *
+ * If @p _cond evaluates to true, does nothing. Otherwise,
+ * if @p _module ## _PARAM_CHECK_DISABLED is @e not set (default), prints an error message
+ * if @p _printfn is provided, and returns from the calling function context with code @p _err.
+ * If @p _module ## _PARAM_CHECK_DISABLED is set, behaves like the ASSERT macro.
+ *
+ * Parameter checking implemented using this macro can be optionally turned off for release code.
+ * Only disable runtime parameter checks if size if a major concern.
+ *
+ * @param _module The module name.
+ * @param _cond The condition to be evaluated.
+ * @param _err The error to be returned.
+ * @param _printfn A printf-compatible function used to log the error.
+ * Leave empty if no logging is needed.
+ *
+ * @hideinitializer
+ */
+/*lint -esym(666, NRF_PARAM_CHECK*) : Expression with side effects passed to macro */
+#define NRF_PARAM_CHECK(_module, _cond, _err, _printfn) \
+ do \
+ { \
+ if ((_cond)) \
+ { \
+ /* Do nothing. */ \
+ } \
+ else if (!(_module ## _PARAM_CHECK_DISABLED)) \
+ { \
+ _printfn("%s check failed in %s() with value 0x%x.", #_cond, __func__, _err); \
+ return (_err); \
+ } \
+ else \
+ { \
+ ASSERT((_cond)); \
+ } \
+ } while (0);
+
+
+/**@brief Macro for verifying statement to be true. It will cause the exterior function to return
+ * err_code if the statement is not true.
+ *
+ * @param[in] statement Statement to test.
+ * @param[in] err_code Error value to return if test was invalid.
+ *
+ * @retval nothing, but will cause the exterior function to return @p err_code if @p statement
+ * is false.
+ */
+#define VERIFY_TRUE(statement, err_code) \
+do \
+{ \
+ if (!(statement)) \
+ { \
+ return err_code; \
+ } \
+} while (0)
+
+
+/**@brief Macro for verifying statement to be true. It will cause the exterior function to return
+ * if the statement is not true.
+ *
+ * @param[in] statement Statement to test.
+ */
+#define VERIFY_TRUE_VOID(statement) VERIFY_TRUE((statement), )
+
+
+/**@brief Macro for verifying statement to be false. It will cause the exterior function to return
+ * err_code if the statement is not false.
+ *
+ * @param[in] statement Statement to test.
+ * @param[in] err_code Error value to return if test was invalid.
+ *
+ * @retval nothing, but will cause the exterior function to return @p err_code if @p statement
+ * is true.
+ */
+#define VERIFY_FALSE(statement, err_code) \
+do \
+{ \
+ if ((statement)) \
+ { \
+ return err_code; \
+ } \
+} while (0)
+
+
+/**@brief Macro for verifying statement to be false. It will cause the exterior function to return
+ * if the statement is not false.
+ *
+ * @param[in] statement Statement to test.
+ */
+#define VERIFY_FALSE_VOID(statement) VERIFY_FALSE((statement), )
+
+
+/**@brief Macro for verifying that a function returned NRF_SUCCESS. It will cause the exterior
+ * function to return error code of statement if it is not @ref NRF_SUCCESS.
+ *
+ * @param[in] statement Statement to check against NRF_SUCCESS.
+ */
+#define VERIFY_SUCCESS(statement) \
+do \
+{ \
+ uint32_t _err_code = (uint32_t) (statement); \
+ if (_err_code != NRF_SUCCESS) \
+ { \
+ return _err_code; \
+ } \
+} while(0)
+
+
+/**@brief Macro for verifying that a function returned NRF_SUCCESS. It will cause the exterior
+ * function to return if the err_code is not @ref NRF_SUCCESS.
+ *
+ * @param[in] err_code The error code to check.
+ */
+#define VERIFY_SUCCESS_VOID(err_code) VERIFY_TRUE_VOID((err_code) == NRF_SUCCESS)
+
+
+/**@brief Macro for verifying that the module is initialized. It will cause the exterior function to
+ * return @ref NRF_ERROR_INVALID_STATE if not.
+ *
+ * @note MODULE_INITIALIZED must be defined in each module using this macro. MODULE_INITIALIZED
+ * should be true if the module is initialized, false if not.
+ */
+#define VERIFY_MODULE_INITIALIZED() VERIFY_TRUE((MODULE_INITIALIZED), NRF_ERROR_INVALID_STATE)
+
+
+/**@brief Macro for verifying that the module is initialized. It will cause the exterior function to
+ * return if not.
+ *
+ * @note MODULE_INITIALIZED must be defined in each module using this macro. MODULE_INITIALIZED
+ * should be true if the module is initialized, false if not.
+ */
+#define VERIFY_MODULE_INITIALIZED_VOID() VERIFY_TRUE_VOID((MODULE_INITIALIZED))
+
+
+/**@brief Macro for verifying that the module is initialized. It will cause the exterior function to
+ * return false if not.
+ *
+ * @note MODULE_INITIALIZED must be defined in each module using this macro. MODULE_INITIALIZED
+ * should be true if the module is initialized, false if not.
+ */
+#define VERIFY_MODULE_INITIALIZED_BOOL() VERIFY_TRUE((MODULE_INITIALIZED), false)
+
+
+/**@brief Macro for verifying that the module is initialized. It will cause the exterior function to
+ * return if not.
+ *
+ * @param[in] param The variable to check if is NULL.
+ */
+#define VERIFY_PARAM_NOT_NULL(param) VERIFY_FALSE(((param) == NULL), NRF_ERROR_NULL)
+
+
+/**@brief Macro for verifying that the module is initialized. It will cause the exterior function to
+ * return if not.
+ *
+ * @param[in] param The variable to check if is NULL.
+ */
+#define VERIFY_PARAM_NOT_NULL_VOID(param) VERIFY_FALSE_VOID(((param) == NULL))
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // SDK_MACROS_H__
+
diff --git a/third_party/NordicSemiconductor/dependencies/sdk_os.h b/third_party/NordicSemiconductor/dependencies/sdk_os.h
index 6e505c0..b75954c 100644
--- a/third_party/NordicSemiconductor/dependencies/sdk_os.h
+++ b/third_party/NordicSemiconductor/dependencies/sdk_os.h
@@ -1,76 +1,76 @@
-/**
- * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-/** @cond */
-/**@file
- *
- * @defgroup sdk_os SDK OS Abstraction
- * @ingroup experimental_api
- * @details In order to made SDK modules independent of use of an embedded OS, and permit
- * application with varied task architecture, SDK abstracts the OS specific
- * elements here in order to make all other modules agnostic to the OS or task
- * architecture.
- * @{
- */
-
-#ifndef SDK_OS_H__
-#define SDK_OS_H__
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#define SDK_MUTEX_DEFINE(X)
-#define SDK_MUTEX_INIT(X)
-#define SDK_MUTEX_LOCK(X)
-#define SDK_MUTEX_UNLOCK(X)
-
-/**
- * @defgroup os_data_type Data types.
- */
-
-/** @} */
-/** @endcond */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // SDK_OS_H__
-
+/**
+ * Copyright (c) 2013 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/** @cond */
+/**@file
+ *
+ * @defgroup sdk_os SDK OS Abstraction
+ * @ingroup experimental_api
+ * @details In order to made SDK modules independent of use of an embedded OS, and permit
+ * application with varied task architecture, SDK abstracts the OS specific
+ * elements here in order to make all other modules agnostic to the OS or task
+ * architecture.
+ * @{
+ */
+
+#ifndef SDK_OS_H__
+#define SDK_OS_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SDK_MUTEX_DEFINE(X)
+#define SDK_MUTEX_INIT(X)
+#define SDK_MUTEX_LOCK(X)
+#define SDK_MUTEX_UNLOCK(X)
+
+/**
+ * @defgroup os_data_type Data types.
+ */
+
+/** @} */
+/** @endcond */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // SDK_OS_H__
+
diff --git a/third_party/NordicSemiconductor/dependencies/sdk_resources.h b/third_party/NordicSemiconductor/dependencies/sdk_resources.h
index 3c5e558..c066b17 100644
--- a/third_party/NordicSemiconductor/dependencies/sdk_resources.h
+++ b/third_party/NordicSemiconductor/dependencies/sdk_resources.h
@@ -1,86 +1,86 @@
-/**
- * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-/** @file
- * @brief Definition file for resource usage by SoftDevice, ESB and Gazell.
- */
-
-#ifndef SDK_RESOURCES_H__
-#define SDK_RESOURCES_H__
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#if defined(SOFTDEVICE_PRESENT) || defined (BLE_STACK_SUPPORT_REQD) || defined (ANT_STACK_SUPPORT_REQD)
- #include "nrf_sd_def.h"
-#else
- #define SD_PPI_RESTRICTED 0uL /**< 1 if PPI peripheral is restricted, 0 otherwise. */
- #define SD_PPI_CHANNELS_USED 0uL /**< PPI channels utilized by SotfDevice (not available to th spplication). */
- #define SD_PPI_GROUPS_USED 0uL /**< PPI groups utilized by SotfDevice (not available to th spplication). */
- #define SD_TIMERS_USED 0uL /**< Timers used by SoftDevice. */
- #define SD_SWI_USED 0uL /**< Software interrupts used by SoftDevice. */
-#endif
-
-#ifdef GAZELL_PRESENT
- #include "nrf_gzll_resources.h"
-#else
- #define GZLL_PPI_CHANNELS_USED 0uL /**< PPI channels utilized by Gazell (not available to th spplication). */
- #define GZLL_TIMERS_USED 0uL /**< Timers used by Gazell. */
- #define GZLL_SWI_USED 0uL /**< Software interrupts used by Gazell */
-#endif
-
-#ifdef ESB_PRESENT
- #include "nrf_esb_resources.h"
-#else
- #define ESB_PPI_CHANNELS_USED 0uL /**< PPI channels utilized by ESB (not available to th spplication). */
- #define ESB_TIMERS_USED 0uL /**< Timers used by ESB. */
- #define ESB_SWI_USED 0uL /**< Software interrupts used by ESB */
-#endif
-
-#define NRF_PPI_CHANNELS_USED (SD_PPI_CHANNELS_USED | GZLL_PPI_CHANNELS_USED | ESB_PPI_CHANNELS_USED)
-#define NRF_PPI_GROUPS_USED (SD_PPI_GROUPS_USED)
-#define NRF_SWI_USED (SD_SWI_USED | GZLL_SWI_USED | ESB_SWI_USED)
-#define NRF_TIMERS_USED (SD_TIMERS_USED | GZLL_TIMERS_USED | ESB_TIMERS_USED)
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // SDK_RESOURCES_H__
+/**
+ * Copyright (c) 2015 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/** @file
+ * @brief Definition file for resource usage by SoftDevice, ESB and Gazell.
+ */
+
+#ifndef SDK_RESOURCES_H__
+#define SDK_RESOURCES_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(SOFTDEVICE_PRESENT) || defined (BLE_STACK_SUPPORT_REQD) || defined (ANT_STACK_SUPPORT_REQD)
+ #include "nrf_sd_def.h"
+#else
+ #define SD_PPI_RESTRICTED 0uL /**< 1 if PPI peripheral is restricted, 0 otherwise. */
+ #define SD_PPI_CHANNELS_USED 0uL /**< PPI channels utilized by SotfDevice (not available to th spplication). */
+ #define SD_PPI_GROUPS_USED 0uL /**< PPI groups utilized by SotfDevice (not available to th spplication). */
+ #define SD_TIMERS_USED 0uL /**< Timers used by SoftDevice. */
+ #define SD_SWI_USED 0uL /**< Software interrupts used by SoftDevice. */
+#endif
+
+#ifdef GAZELL_PRESENT
+ #include "nrf_gzll_resources.h"
+#else
+ #define GZLL_PPI_CHANNELS_USED 0uL /**< PPI channels utilized by Gazell (not available to th spplication). */
+ #define GZLL_TIMERS_USED 0uL /**< Timers used by Gazell. */
+ #define GZLL_SWI_USED 0uL /**< Software interrupts used by Gazell */
+#endif
+
+#ifdef ESB_PRESENT
+ #include "nrf_esb_resources.h"
+#else
+ #define ESB_PPI_CHANNELS_USED 0uL /**< PPI channels utilized by ESB (not available to th spplication). */
+ #define ESB_TIMERS_USED 0uL /**< Timers used by ESB. */
+ #define ESB_SWI_USED 0uL /**< Software interrupts used by ESB */
+#endif
+
+#define NRF_PPI_CHANNELS_USED (SD_PPI_CHANNELS_USED | GZLL_PPI_CHANNELS_USED | ESB_PPI_CHANNELS_USED)
+#define NRF_PPI_GROUPS_USED (SD_PPI_GROUPS_USED)
+#define NRF_SWI_USED (SD_SWI_USED | GZLL_SWI_USED | ESB_SWI_USED)
+#define NRF_TIMERS_USED (SD_TIMERS_USED | GZLL_TIMERS_USED | ESB_TIMERS_USED)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // SDK_RESOURCES_H__
diff --git a/third_party/NordicSemiconductor/drivers/clock/nrf_drv_clock.c b/third_party/NordicSemiconductor/drivers/clock/nrf_drv_clock.c
index d8da268..cc3a07c 100644
--- a/third_party/NordicSemiconductor/drivers/clock/nrf_drv_clock.c
+++ b/third_party/NordicSemiconductor/drivers/clock/nrf_drv_clock.c
@@ -1,601 +1,605 @@
-/**
- * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#include <nordic_common.h>
-#include "nrf_drv_clock.h"
-
-#ifdef SOFTDEVICE_PRESENT
-#include "nrf_sdh.h"
-#include "nrf_sdh_soc.h"
-#endif
-
-#define NRF_LOG_MODULE_NAME clock
-#if CLOCK_CONFIG_LOG_ENABLED
- #define NRF_LOG_LEVEL CLOCK_CONFIG_LOG_LEVEL
- #define NRF_LOG_INFO_COLOR CLOCK_CONFIG_INFO_COLOR
- #define NRF_LOG_DEBUG_COLOR CLOCK_CONFIG_DEBUG_COLOR
-#else //CLOCK_CONFIG_LOG_ENABLED
- #define NRF_LOG_LEVEL 0
-#endif //CLOCK_CONFIG_LOG_ENABLED
-#include "nrf_log.h"
-NRF_LOG_MODULE_REGISTER();
-
-#define EVT_TO_STR(event) \
- (event == NRF_CLOCK_EVENT_HFCLKSTARTED ? "NRF_CLOCK_EVENT_HFCLKSTARTED" : \
- (event == NRF_CLOCK_EVENT_LFCLKSTARTED ? "NRF_CLOCK_EVENT_LFCLKSTARTED" : \
- (event == NRF_CLOCK_EVENT_DONE ? "NRF_CLOCK_EVENT_DONE" : \
- (event == NRF_CLOCK_EVENT_CTTO ? "NRF_CLOCK_EVENT_CTTO" : \
- "UNKNOWN EVENT"))))
-
-
-/*lint -save -e652 */
-#define NRF_CLOCK_LFCLK_RC CLOCK_LFCLKSRC_SRC_RC
-#define NRF_CLOCK_LFCLK_Xtal CLOCK_LFCLKSRC_SRC_Xtal
-#define NRF_CLOCK_LFCLK_Synth CLOCK_LFCLKSRC_SRC_Synth
-/*lint -restore */
-
-#if (CLOCK_CONFIG_LF_SRC == NRF_CLOCK_LFCLK_RC) && !defined(SOFTDEVICE_PRESENT)
-#define CALIBRATION_SUPPORT 1
-#else
-#define CALIBRATION_SUPPORT 0
-#endif
-typedef enum
-{
- CAL_STATE_IDLE,
- CAL_STATE_CT,
- CAL_STATE_HFCLK_REQ,
- CAL_STATE_CAL,
- CAL_STATE_ABORT,
-} nrf_drv_clock_cal_state_t;
-
-/**@brief CLOCK control block. */
-typedef struct
-{
- bool module_initialized; /*< Indicate the state of module */
- volatile bool hfclk_on; /*< High-frequency clock state. */
- volatile bool lfclk_on; /*< Low-frequency clock state. */
- volatile uint32_t hfclk_requests; /*< High-frequency clock request counter. */
- volatile nrf_drv_clock_handler_item_t * p_hf_head;
- volatile uint32_t lfclk_requests; /*< Low-frequency clock request counter. */
- volatile nrf_drv_clock_handler_item_t * p_lf_head;
-#if CALIBRATION_SUPPORT
- nrf_drv_clock_handler_item_t cal_hfclk_started_handler_item;
- nrf_drv_clock_event_handler_t cal_done_handler;
- volatile nrf_drv_clock_cal_state_t cal_state;
-#endif // CALIBRATION_SUPPORT
-} nrf_drv_clock_cb_t;
-
-static nrf_drv_clock_cb_t m_clock_cb;
-
-static void clock_irq_handler(nrfx_clock_evt_type_t evt);
-
-static void lfclk_stop(void)
-{
-#if CALIBRATION_SUPPORT
- nrfx_clock_calibration_timer_stop();
-#endif
-
-#ifdef SOFTDEVICE_PRESENT
- // If LFCLK is requested to stop while SD is still enabled,
- // it indicates an error in the application.
- // Enabling SD should increment the LFCLK request.
- ASSERT(!nrf_sdh_is_enabled());
-#endif // SOFTDEVICE_PRESENT
-
- nrfx_clock_lfclk_stop();
- m_clock_cb.lfclk_on = false;
-}
-
-static void hfclk_start(void)
-{
-#ifdef SOFTDEVICE_PRESENT
- if (nrf_sdh_is_enabled())
- {
- (void)sd_clock_hfclk_request();
- return;
- }
-#endif // SOFTDEVICE_PRESENT
-
- nrfx_clock_hfclk_start();
-}
-
-static void hfclk_stop(void)
-{
-#ifdef SOFTDEVICE_PRESENT
- if (nrf_sdh_is_enabled())
- {
- (void)sd_clock_hfclk_release();
- m_clock_cb.hfclk_on = false;
- return;
- }
-#endif // SOFTDEVICE_PRESENT
-
- nrfx_clock_hfclk_stop();
- m_clock_cb.hfclk_on = false;
-}
-
-bool nrf_drv_clock_init_check(void)
-{
- return m_clock_cb.module_initialized;
-}
-
-ret_code_t nrf_drv_clock_init(void)
-{
- ret_code_t err_code = NRF_SUCCESS;
- if (m_clock_cb.module_initialized)
- {
- err_code = NRF_ERROR_MODULE_ALREADY_INITIALIZED;
- }
- else
- {
- m_clock_cb.p_hf_head = NULL;
- m_clock_cb.hfclk_requests = 0;
- m_clock_cb.p_lf_head = NULL;
- m_clock_cb.lfclk_requests = 0;
- err_code = nrfx_clock_init(clock_irq_handler);
-#ifdef SOFTDEVICE_PRESENT
- if (!nrf_sdh_is_enabled())
-#endif
- {
- nrfx_clock_enable();
- }
-
-#if CALIBRATION_SUPPORT
- m_clock_cb.cal_state = CAL_STATE_IDLE;
-#endif
-
- m_clock_cb.module_initialized = true;
- }
-
- NRF_LOG_INFO("Function: %s, error code: %s.",
- (uint32_t)__func__,
- (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
- return err_code;
-}
-
-void nrf_drv_clock_uninit(void)
-{
- ASSERT(m_clock_cb.module_initialized);
- nrfx_clock_disable();
- nrfx_clock_uninit();
-
- m_clock_cb.module_initialized = false;
-}
-
-static void item_enqueue(nrf_drv_clock_handler_item_t ** p_head,
- nrf_drv_clock_handler_item_t * p_item)
-{
- nrf_drv_clock_handler_item_t * p_next = *p_head;
- while (p_next)
- {
- if (p_next == p_item)
- {
- return;
- }
- p_next = p_next->p_next;
- }
-
- p_item->p_next = (*p_head ? *p_head : NULL);
- *p_head = p_item;
-}
-
-static nrf_drv_clock_handler_item_t * item_dequeue(nrf_drv_clock_handler_item_t ** p_head)
-{
- nrf_drv_clock_handler_item_t * p_item = *p_head;
- if (p_item)
- {
- *p_head = p_item->p_next;
- }
- return p_item;
-}
-
-void nrf_drv_clock_lfclk_request(nrf_drv_clock_handler_item_t * p_handler_item)
-{
- ASSERT(m_clock_cb.module_initialized);
-
- if (m_clock_cb.lfclk_on)
- {
- if (p_handler_item)
- {
- p_handler_item->event_handler(NRF_DRV_CLOCK_EVT_LFCLK_STARTED);
- }
- CRITICAL_REGION_ENTER();
- ++(m_clock_cb.lfclk_requests);
- CRITICAL_REGION_EXIT();
- }
- else
- {
- CRITICAL_REGION_ENTER();
- if (p_handler_item)
- {
- item_enqueue((nrf_drv_clock_handler_item_t **)&m_clock_cb.p_lf_head,
- p_handler_item);
- }
- if (m_clock_cb.lfclk_requests == 0)
- {
- nrfx_clock_lfclk_start();
- }
- ++(m_clock_cb.lfclk_requests);
- CRITICAL_REGION_EXIT();
- }
-
- ASSERT(m_clock_cb.lfclk_requests > 0);
-}
-
-void nrf_drv_clock_lfclk_release(void)
-{
- ASSERT(m_clock_cb.module_initialized);
- ASSERT(m_clock_cb.lfclk_requests > 0);
-
- CRITICAL_REGION_ENTER();
- --(m_clock_cb.lfclk_requests);
- if (m_clock_cb.lfclk_requests == 0)
- {
- lfclk_stop();
- }
- CRITICAL_REGION_EXIT();
-}
-
-bool nrf_drv_clock_lfclk_is_running(void)
-{
- ASSERT(m_clock_cb.module_initialized);
-
-#ifdef SOFTDEVICE_PRESENT
- if (nrf_sdh_is_enabled())
- {
- return true;
- }
-#endif // SOFTDEVICE_PRESENT
-
- return nrfx_clock_lfclk_is_running();
-}
-
-void nrf_drv_clock_hfclk_request(nrf_drv_clock_handler_item_t * p_handler_item)
-{
- ASSERT(m_clock_cb.module_initialized);
-
- if (m_clock_cb.hfclk_on)
- {
- if (p_handler_item)
- {
- p_handler_item->event_handler(NRF_DRV_CLOCK_EVT_HFCLK_STARTED);
- }
- CRITICAL_REGION_ENTER();
- ++(m_clock_cb.hfclk_requests);
- CRITICAL_REGION_EXIT();
- }
- else
- {
- CRITICAL_REGION_ENTER();
- if (p_handler_item)
- {
- item_enqueue((nrf_drv_clock_handler_item_t **)&m_clock_cb.p_hf_head,
- p_handler_item);
- }
- if (m_clock_cb.hfclk_requests == 0)
- {
- hfclk_start();
- }
- ++(m_clock_cb.hfclk_requests);
- CRITICAL_REGION_EXIT();
- }
-
- ASSERT(m_clock_cb.hfclk_requests > 0);
-}
-
-void nrf_drv_clock_hfclk_release(void)
-{
- ASSERT(m_clock_cb.module_initialized);
- ASSERT(m_clock_cb.hfclk_requests > 0);
-
- CRITICAL_REGION_ENTER();
- --(m_clock_cb.hfclk_requests);
- if (m_clock_cb.hfclk_requests == 0)
- {
- hfclk_stop();
- }
- CRITICAL_REGION_EXIT();
-}
-
-bool nrf_drv_clock_hfclk_is_running(void)
-{
- ASSERT(m_clock_cb.module_initialized);
-
-#ifdef SOFTDEVICE_PRESENT
- if (nrf_sdh_is_enabled())
- {
- uint32_t is_running;
- UNUSED_VARIABLE(sd_clock_hfclk_is_running(&is_running));
- return (is_running ? true : false);
- }
-#endif // SOFTDEVICE_PRESENT
-
- return nrfx_clock_hfclk_is_running();
-}
-
-#if CALIBRATION_SUPPORT
-static void clock_calibration_hf_started(nrf_drv_clock_evt_type_t event)
-{
- if (m_clock_cb.cal_state == CAL_STATE_ABORT)
- {
- nrf_drv_clock_hfclk_release();
- m_clock_cb.cal_state = CAL_STATE_IDLE;
- if (m_clock_cb.cal_done_handler)
- {
- m_clock_cb.cal_done_handler(NRF_DRV_CLOCK_EVT_CAL_ABORTED);
- }
- }
- else
- {
- ASSERT(event == NRF_DRV_CLOCK_EVT_HFCLK_STARTED);
- if (nrfx_clock_calibration_start() != NRFX_SUCCESS)
- {
- ASSERT(false);
- }
- }
-}
-#endif // CALIBRATION_SUPPORT
-
-ret_code_t nrf_drv_clock_calibration_start(uint8_t interval, nrf_drv_clock_event_handler_t handler)
-{
- ret_code_t err_code = NRF_SUCCESS;
-#if CALIBRATION_SUPPORT
- ASSERT(m_clock_cb.cal_state == CAL_STATE_IDLE);
- if (m_clock_cb.lfclk_on == false)
- {
- err_code = NRF_ERROR_INVALID_STATE;
- }
- else if (m_clock_cb.cal_state == CAL_STATE_IDLE)
- {
- m_clock_cb.cal_done_handler = handler;
- m_clock_cb.cal_hfclk_started_handler_item.event_handler = clock_calibration_hf_started;
- if (interval == 0)
- {
- m_clock_cb.cal_state = CAL_STATE_HFCLK_REQ;
- nrf_drv_clock_hfclk_request(&m_clock_cb.cal_hfclk_started_handler_item);
- }
- else
- {
- m_clock_cb.cal_state = CAL_STATE_CT;
- nrfx_clock_calibration_timer_start(interval);
- }
- }
- else
- {
- err_code = NRF_ERROR_BUSY;
- }
- NRF_LOG_WARNING("Function: %s, error code: %s.",
- (uint32_t)__func__,
- (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
- return err_code;
-#else
- UNUSED_PARAMETER(interval);
- UNUSED_PARAMETER(handler);
- err_code = NRF_ERROR_FORBIDDEN;
- NRF_LOG_WARNING("Function: %s, error code: %s.",
- (uint32_t)__func__,
- (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
- return err_code;
-#endif // CALIBRATION_SUPPORT
-}
-
-ret_code_t nrf_drv_clock_calibration_abort(void)
-{
- ret_code_t err_code = NRF_SUCCESS;
-#if CALIBRATION_SUPPORT
- CRITICAL_REGION_ENTER();
- switch (m_clock_cb.cal_state)
- {
- case CAL_STATE_CT:
- nrfx_clock_calibration_timer_stop();
- m_clock_cb.cal_state = CAL_STATE_IDLE;
- if (m_clock_cb.cal_done_handler)
- {
- m_clock_cb.cal_done_handler(NRF_DRV_CLOCK_EVT_CAL_ABORTED);
- }
- break;
- case CAL_STATE_HFCLK_REQ:
- /* fall through. */
- case CAL_STATE_CAL:
- m_clock_cb.cal_state = CAL_STATE_ABORT;
- break;
- default:
- break;
- }
- CRITICAL_REGION_EXIT();
-
- NRF_LOG_INFO("Function: %s, error code: %s.",
- (uint32_t)__func__,
- (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
- return err_code;
-#else
- err_code = NRF_ERROR_FORBIDDEN;
- NRF_LOG_WARNING("Function: %s, error code: %s.",
- (uint32_t)__func__,
- (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
- return err_code;
-#endif // CALIBRATION_SUPPORT
-}
-
-ret_code_t nrf_drv_clock_is_calibrating(bool * p_is_calibrating)
-{
- ret_code_t err_code = NRF_SUCCESS;
-#if CALIBRATION_SUPPORT
- ASSERT(m_clock_cb.module_initialized);
- *p_is_calibrating = (m_clock_cb.cal_state != CAL_STATE_IDLE);
- NRF_LOG_INFO("Function: %s, error code: %s.",
- (uint32_t)__func__,
- (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
- return err_code;
-#else
- UNUSED_PARAMETER(p_is_calibrating);
- err_code = NRF_ERROR_FORBIDDEN;
- NRF_LOG_WARNING("Function: %s, error code: %s.",
- (uint32_t)__func__,
- (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
- return err_code;
-#endif // CALIBRATION_SUPPORT
-}
-
-__STATIC_INLINE void clock_clk_started_notify(nrf_drv_clock_evt_type_t evt_type)
-{
- nrf_drv_clock_handler_item_t **p_head;
- if (evt_type == NRF_DRV_CLOCK_EVT_HFCLK_STARTED)
- {
- p_head = (nrf_drv_clock_handler_item_t **)&m_clock_cb.p_hf_head;
- }
- else
- {
- p_head = (nrf_drv_clock_handler_item_t **)&m_clock_cb.p_lf_head;
- }
-
- while (1)
- {
- nrf_drv_clock_handler_item_t * p_item = item_dequeue(p_head);
- if (!p_item)
- {
- break;
- }
-
- p_item->event_handler(evt_type);
- }
-}
-
-static void clock_irq_handler(nrfx_clock_evt_type_t evt)
-{
- if (evt == NRFX_CLOCK_EVT_HFCLK_STARTED)
- {
- m_clock_cb.hfclk_on = true;
- clock_clk_started_notify(NRF_DRV_CLOCK_EVT_HFCLK_STARTED);
- }
- if (evt == NRFX_CLOCK_EVT_LFCLK_STARTED)
- {
- m_clock_cb.lfclk_on = true;
- clock_clk_started_notify(NRF_DRV_CLOCK_EVT_LFCLK_STARTED);
- }
-#if CALIBRATION_SUPPORT
- if (evt == NRFX_CLOCK_EVT_CTTO)
- {
- nrf_drv_clock_hfclk_request(&m_clock_cb.cal_hfclk_started_handler_item);
- }
-
- if (evt == NRFX_CLOCK_EVT_CAL_DONE)
- {
- nrf_drv_clock_hfclk_release();
- bool aborted = (m_clock_cb.cal_state == CAL_STATE_ABORT);
- m_clock_cb.cal_state = CAL_STATE_IDLE;
- if (m_clock_cb.cal_done_handler)
- {
- m_clock_cb.cal_done_handler(aborted ?
- NRF_DRV_CLOCK_EVT_CAL_ABORTED : NRF_DRV_CLOCK_EVT_CAL_DONE);
- }
- }
-#endif // CALIBRATION_SUPPORT
-}
-
-#ifdef SOFTDEVICE_PRESENT
-/**
- * @brief SoftDevice SoC event handler.
- *
- * @param[in] evt_id SoC event.
- * @param[in] p_context Context.
- */
-static void soc_evt_handler(uint32_t evt_id, void * p_context)
-{
- if (evt_id == NRF_EVT_HFCLKSTARTED)
- {
- m_clock_cb.hfclk_on = true;
- clock_clk_started_notify(NRF_DRV_CLOCK_EVT_HFCLK_STARTED);
- }
-}
-NRF_SDH_SOC_OBSERVER(m_soc_evt_observer, CLOCK_CONFIG_SOC_OBSERVER_PRIO, soc_evt_handler, NULL);
-
-/**
- * @brief SoftDevice enable/disable state handler.
- *
- * @param[in] state State.
- * @param[in] p_context Context.
- */
-static void sd_state_evt_handler(nrf_sdh_state_evt_t state, void * p_context)
-{
- switch (state)
- {
- case NRF_SDH_EVT_STATE_ENABLE_PREPARE:
- NVIC_DisableIRQ(POWER_CLOCK_IRQn);
- break;
-
- case NRF_SDH_EVT_STATE_ENABLED:
- CRITICAL_REGION_ENTER();
- /* Make sure that nrf_drv_clock module is initialized */
- if (!m_clock_cb.module_initialized)
- {
- (void)nrf_drv_clock_init();
- }
- /* SD is one of the LFCLK requesters, but it will enable it by itself. */
- ++(m_clock_cb.lfclk_requests);
- m_clock_cb.lfclk_on = true;
- CRITICAL_REGION_EXIT();
- break;
-
- case NRF_SDH_EVT_STATE_DISABLED:
- /* Reinit interrupts */
- ASSERT(m_clock_cb.module_initialized);
- nrfx_clock_enable();
-
- /* SD leaves LFCLK enabled - disable it if it is no longer required. */
- nrf_drv_clock_lfclk_release();
- break;
-
- default:
- break;
- }
-}
-
-NRF_SDH_STATE_OBSERVER(m_sd_state_observer, CLOCK_CONFIG_STATE_OBSERVER_PRIO) =
-{
- .handler = sd_state_evt_handler,
- .p_context = NULL,
-};
-
-#endif // SOFTDEVICE_PRESENT
-
-#undef NRF_CLOCK_LFCLK_RC
-#undef NRF_CLOCK_LFCLK_Xtal
-#undef NRF_CLOCK_LFCLK_Synth
+/**
+ * Copyright (c) 2016 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <nordic_common.h>
+#include "nrf_drv_clock.h"
+
+#if NRF_MODULE_ENABLED(NRF_CLOCK)
+
+#ifdef SOFTDEVICE_PRESENT
+#include "nrf_sdh.h"
+#include "nrf_sdh_soc.h"
+#endif
+
+#define NRF_LOG_MODULE_NAME clock
+#if CLOCK_CONFIG_LOG_ENABLED
+ #define NRF_LOG_LEVEL CLOCK_CONFIG_LOG_LEVEL
+ #define NRF_LOG_INFO_COLOR CLOCK_CONFIG_INFO_COLOR
+ #define NRF_LOG_DEBUG_COLOR CLOCK_CONFIG_DEBUG_COLOR
+#else //CLOCK_CONFIG_LOG_ENABLED
+ #define NRF_LOG_LEVEL 0
+#endif //CLOCK_CONFIG_LOG_ENABLED
+#include "nrf_log.h"
+NRF_LOG_MODULE_REGISTER();
+
+#define EVT_TO_STR(event) \
+ (event == NRF_CLOCK_EVENT_HFCLKSTARTED ? "NRF_CLOCK_EVENT_HFCLKSTARTED" : \
+ (event == NRF_CLOCK_EVENT_LFCLKSTARTED ? "NRF_CLOCK_EVENT_LFCLKSTARTED" : \
+ (event == NRF_CLOCK_EVENT_DONE ? "NRF_CLOCK_EVENT_DONE" : \
+ (event == NRF_CLOCK_EVENT_CTTO ? "NRF_CLOCK_EVENT_CTTO" : \
+ "UNKNOWN EVENT"))))
+
+
+/*lint -save -e652 */
+#define NRF_CLOCK_LFCLK_RC CLOCK_LFCLKSRC_SRC_RC
+#define NRF_CLOCK_LFCLK_Xtal CLOCK_LFCLKSRC_SRC_Xtal
+#define NRF_CLOCK_LFCLK_Synth CLOCK_LFCLKSRC_SRC_Synth
+/*lint -restore */
+
+#if (CLOCK_CONFIG_LF_SRC == NRF_CLOCK_LFCLK_RC) && !defined(SOFTDEVICE_PRESENT)
+#define CALIBRATION_SUPPORT 1
+#else
+#define CALIBRATION_SUPPORT 0
+#endif
+typedef enum
+{
+ CAL_STATE_IDLE,
+ CAL_STATE_CT,
+ CAL_STATE_HFCLK_REQ,
+ CAL_STATE_CAL,
+ CAL_STATE_ABORT,
+} nrf_drv_clock_cal_state_t;
+
+/**@brief CLOCK control block. */
+typedef struct
+{
+ bool module_initialized; /*< Indicate the state of module */
+ volatile bool hfclk_on; /*< High-frequency clock state. */
+ volatile bool lfclk_on; /*< Low-frequency clock state. */
+ volatile uint32_t hfclk_requests; /*< High-frequency clock request counter. */
+ volatile nrf_drv_clock_handler_item_t * p_hf_head;
+ volatile uint32_t lfclk_requests; /*< Low-frequency clock request counter. */
+ volatile nrf_drv_clock_handler_item_t * p_lf_head;
+#if CALIBRATION_SUPPORT
+ nrf_drv_clock_handler_item_t cal_hfclk_started_handler_item;
+ nrf_drv_clock_event_handler_t cal_done_handler;
+ volatile nrf_drv_clock_cal_state_t cal_state;
+#endif // CALIBRATION_SUPPORT
+} nrf_drv_clock_cb_t;
+
+static nrf_drv_clock_cb_t m_clock_cb;
+
+static void clock_irq_handler(nrfx_clock_evt_type_t evt);
+
+static void lfclk_stop(void)
+{
+#if CALIBRATION_SUPPORT
+ nrfx_clock_calibration_timer_stop();
+#endif
+
+#ifdef SOFTDEVICE_PRESENT
+ // If LFCLK is requested to stop while SD is still enabled,
+ // it indicates an error in the application.
+ // Enabling SD should increment the LFCLK request.
+ ASSERT(!nrf_sdh_is_enabled());
+#endif // SOFTDEVICE_PRESENT
+
+ nrfx_clock_lfclk_stop();
+ m_clock_cb.lfclk_on = false;
+}
+
+static void hfclk_start(void)
+{
+#ifdef SOFTDEVICE_PRESENT
+ if (nrf_sdh_is_enabled())
+ {
+ (void)sd_clock_hfclk_request();
+ return;
+ }
+#endif // SOFTDEVICE_PRESENT
+
+ nrfx_clock_hfclk_start();
+}
+
+static void hfclk_stop(void)
+{
+#ifdef SOFTDEVICE_PRESENT
+ if (nrf_sdh_is_enabled())
+ {
+ (void)sd_clock_hfclk_release();
+ m_clock_cb.hfclk_on = false;
+ return;
+ }
+#endif // SOFTDEVICE_PRESENT
+
+ nrfx_clock_hfclk_stop();
+ m_clock_cb.hfclk_on = false;
+}
+
+bool nrf_drv_clock_init_check(void)
+{
+ return m_clock_cb.module_initialized;
+}
+
+ret_code_t nrf_drv_clock_init(void)
+{
+ ret_code_t err_code = NRF_SUCCESS;
+ if (m_clock_cb.module_initialized)
+ {
+ err_code = NRF_ERROR_MODULE_ALREADY_INITIALIZED;
+ }
+ else
+ {
+ m_clock_cb.p_hf_head = NULL;
+ m_clock_cb.hfclk_requests = 0;
+ m_clock_cb.p_lf_head = NULL;
+ m_clock_cb.lfclk_requests = 0;
+ err_code = nrfx_clock_init(clock_irq_handler);
+#ifdef SOFTDEVICE_PRESENT
+ if (!nrf_sdh_is_enabled())
+#endif
+ {
+ nrfx_clock_enable();
+ }
+
+#if CALIBRATION_SUPPORT
+ m_clock_cb.cal_state = CAL_STATE_IDLE;
+#endif
+
+ m_clock_cb.module_initialized = true;
+ }
+
+ NRF_LOG_INFO("Function: %s, error code: %s.",
+ (uint32_t)__func__,
+ (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
+ return err_code;
+}
+
+void nrf_drv_clock_uninit(void)
+{
+ ASSERT(m_clock_cb.module_initialized);
+ nrfx_clock_disable();
+ nrfx_clock_uninit();
+
+ m_clock_cb.module_initialized = false;
+}
+
+static void item_enqueue(nrf_drv_clock_handler_item_t ** p_head,
+ nrf_drv_clock_handler_item_t * p_item)
+{
+ nrf_drv_clock_handler_item_t * p_next = *p_head;
+ while (p_next)
+ {
+ if (p_next == p_item)
+ {
+ return;
+ }
+ p_next = p_next->p_next;
+ }
+
+ p_item->p_next = (*p_head ? *p_head : NULL);
+ *p_head = p_item;
+}
+
+static nrf_drv_clock_handler_item_t * item_dequeue(nrf_drv_clock_handler_item_t ** p_head)
+{
+ nrf_drv_clock_handler_item_t * p_item = *p_head;
+ if (p_item)
+ {
+ *p_head = p_item->p_next;
+ }
+ return p_item;
+}
+
+void nrf_drv_clock_lfclk_request(nrf_drv_clock_handler_item_t * p_handler_item)
+{
+ ASSERT(m_clock_cb.module_initialized);
+
+ if (m_clock_cb.lfclk_on)
+ {
+ if (p_handler_item)
+ {
+ p_handler_item->event_handler(NRF_DRV_CLOCK_EVT_LFCLK_STARTED);
+ }
+ CRITICAL_REGION_ENTER();
+ ++(m_clock_cb.lfclk_requests);
+ CRITICAL_REGION_EXIT();
+ }
+ else
+ {
+ CRITICAL_REGION_ENTER();
+ if (p_handler_item)
+ {
+ item_enqueue((nrf_drv_clock_handler_item_t **)&m_clock_cb.p_lf_head,
+ p_handler_item);
+ }
+ if (m_clock_cb.lfclk_requests == 0)
+ {
+ nrfx_clock_lfclk_start();
+ }
+ ++(m_clock_cb.lfclk_requests);
+ CRITICAL_REGION_EXIT();
+ }
+
+ ASSERT(m_clock_cb.lfclk_requests > 0);
+}
+
+void nrf_drv_clock_lfclk_release(void)
+{
+ ASSERT(m_clock_cb.module_initialized);
+ ASSERT(m_clock_cb.lfclk_requests > 0);
+
+ CRITICAL_REGION_ENTER();
+ --(m_clock_cb.lfclk_requests);
+ if (m_clock_cb.lfclk_requests == 0)
+ {
+ lfclk_stop();
+ }
+ CRITICAL_REGION_EXIT();
+}
+
+bool nrf_drv_clock_lfclk_is_running(void)
+{
+ ASSERT(m_clock_cb.module_initialized);
+
+#ifdef SOFTDEVICE_PRESENT
+ if (nrf_sdh_is_enabled())
+ {
+ return true;
+ }
+#endif // SOFTDEVICE_PRESENT
+
+ return nrfx_clock_lfclk_is_running();
+}
+
+void nrf_drv_clock_hfclk_request(nrf_drv_clock_handler_item_t * p_handler_item)
+{
+ ASSERT(m_clock_cb.module_initialized);
+
+ if (m_clock_cb.hfclk_on)
+ {
+ if (p_handler_item)
+ {
+ p_handler_item->event_handler(NRF_DRV_CLOCK_EVT_HFCLK_STARTED);
+ }
+ CRITICAL_REGION_ENTER();
+ ++(m_clock_cb.hfclk_requests);
+ CRITICAL_REGION_EXIT();
+ }
+ else
+ {
+ CRITICAL_REGION_ENTER();
+ if (p_handler_item)
+ {
+ item_enqueue((nrf_drv_clock_handler_item_t **)&m_clock_cb.p_hf_head,
+ p_handler_item);
+ }
+ if (m_clock_cb.hfclk_requests == 0)
+ {
+ hfclk_start();
+ }
+ ++(m_clock_cb.hfclk_requests);
+ CRITICAL_REGION_EXIT();
+ }
+
+ ASSERT(m_clock_cb.hfclk_requests > 0);
+}
+
+void nrf_drv_clock_hfclk_release(void)
+{
+ ASSERT(m_clock_cb.module_initialized);
+ ASSERT(m_clock_cb.hfclk_requests > 0);
+
+ CRITICAL_REGION_ENTER();
+ --(m_clock_cb.hfclk_requests);
+ if (m_clock_cb.hfclk_requests == 0)
+ {
+ hfclk_stop();
+ }
+ CRITICAL_REGION_EXIT();
+}
+
+bool nrf_drv_clock_hfclk_is_running(void)
+{
+ ASSERT(m_clock_cb.module_initialized);
+
+#ifdef SOFTDEVICE_PRESENT
+ if (nrf_sdh_is_enabled())
+ {
+ uint32_t is_running;
+ UNUSED_VARIABLE(sd_clock_hfclk_is_running(&is_running));
+ return (is_running ? true : false);
+ }
+#endif // SOFTDEVICE_PRESENT
+
+ return nrfx_clock_hfclk_is_running();
+}
+
+#if CALIBRATION_SUPPORT
+static void clock_calibration_hf_started(nrf_drv_clock_evt_type_t event)
+{
+ if (m_clock_cb.cal_state == CAL_STATE_ABORT)
+ {
+ nrf_drv_clock_hfclk_release();
+ m_clock_cb.cal_state = CAL_STATE_IDLE;
+ if (m_clock_cb.cal_done_handler)
+ {
+ m_clock_cb.cal_done_handler(NRF_DRV_CLOCK_EVT_CAL_ABORTED);
+ }
+ }
+ else
+ {
+ ASSERT(event == NRF_DRV_CLOCK_EVT_HFCLK_STARTED);
+ if (nrfx_clock_calibration_start() != NRFX_SUCCESS)
+ {
+ ASSERT(false);
+ }
+ }
+}
+#endif // CALIBRATION_SUPPORT
+
+ret_code_t nrf_drv_clock_calibration_start(uint8_t interval, nrf_drv_clock_event_handler_t handler)
+{
+ ret_code_t err_code = NRF_SUCCESS;
+#if CALIBRATION_SUPPORT
+ ASSERT(m_clock_cb.cal_state == CAL_STATE_IDLE);
+ if (m_clock_cb.lfclk_on == false)
+ {
+ err_code = NRF_ERROR_INVALID_STATE;
+ }
+ else if (m_clock_cb.cal_state == CAL_STATE_IDLE)
+ {
+ m_clock_cb.cal_done_handler = handler;
+ m_clock_cb.cal_hfclk_started_handler_item.event_handler = clock_calibration_hf_started;
+ if (interval == 0)
+ {
+ m_clock_cb.cal_state = CAL_STATE_HFCLK_REQ;
+ nrf_drv_clock_hfclk_request(&m_clock_cb.cal_hfclk_started_handler_item);
+ }
+ else
+ {
+ m_clock_cb.cal_state = CAL_STATE_CT;
+ nrfx_clock_calibration_timer_start(interval);
+ }
+ }
+ else
+ {
+ err_code = NRF_ERROR_BUSY;
+ }
+ NRF_LOG_WARNING("Function: %s, error code: %s.",
+ (uint32_t)__func__,
+ (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
+ return err_code;
+#else
+ UNUSED_PARAMETER(interval);
+ UNUSED_PARAMETER(handler);
+ err_code = NRF_ERROR_FORBIDDEN;
+ NRF_LOG_WARNING("Function: %s, error code: %s.",
+ (uint32_t)__func__,
+ (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
+ return err_code;
+#endif // CALIBRATION_SUPPORT
+}
+
+ret_code_t nrf_drv_clock_calibration_abort(void)
+{
+ ret_code_t err_code = NRF_SUCCESS;
+#if CALIBRATION_SUPPORT
+ CRITICAL_REGION_ENTER();
+ switch (m_clock_cb.cal_state)
+ {
+ case CAL_STATE_CT:
+ nrfx_clock_calibration_timer_stop();
+ m_clock_cb.cal_state = CAL_STATE_IDLE;
+ if (m_clock_cb.cal_done_handler)
+ {
+ m_clock_cb.cal_done_handler(NRF_DRV_CLOCK_EVT_CAL_ABORTED);
+ }
+ break;
+ case CAL_STATE_HFCLK_REQ:
+ /* fall through. */
+ case CAL_STATE_CAL:
+ m_clock_cb.cal_state = CAL_STATE_ABORT;
+ break;
+ default:
+ break;
+ }
+ CRITICAL_REGION_EXIT();
+
+ NRF_LOG_INFO("Function: %s, error code: %s.",
+ (uint32_t)__func__,
+ (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
+ return err_code;
+#else
+ err_code = NRF_ERROR_FORBIDDEN;
+ NRF_LOG_WARNING("Function: %s, error code: %s.",
+ (uint32_t)__func__,
+ (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
+ return err_code;
+#endif // CALIBRATION_SUPPORT
+}
+
+ret_code_t nrf_drv_clock_is_calibrating(bool * p_is_calibrating)
+{
+ ret_code_t err_code = NRF_SUCCESS;
+#if CALIBRATION_SUPPORT
+ ASSERT(m_clock_cb.module_initialized);
+ *p_is_calibrating = (m_clock_cb.cal_state != CAL_STATE_IDLE);
+ NRF_LOG_INFO("Function: %s, error code: %s.",
+ (uint32_t)__func__,
+ (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
+ return err_code;
+#else
+ UNUSED_PARAMETER(p_is_calibrating);
+ err_code = NRF_ERROR_FORBIDDEN;
+ NRF_LOG_WARNING("Function: %s, error code: %s.",
+ (uint32_t)__func__,
+ (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
+ return err_code;
+#endif // CALIBRATION_SUPPORT
+}
+
+__STATIC_INLINE void clock_clk_started_notify(nrf_drv_clock_evt_type_t evt_type)
+{
+ nrf_drv_clock_handler_item_t **p_head;
+ if (evt_type == NRF_DRV_CLOCK_EVT_HFCLK_STARTED)
+ {
+ p_head = (nrf_drv_clock_handler_item_t **)&m_clock_cb.p_hf_head;
+ }
+ else
+ {
+ p_head = (nrf_drv_clock_handler_item_t **)&m_clock_cb.p_lf_head;
+ }
+
+ while (1)
+ {
+ nrf_drv_clock_handler_item_t * p_item = item_dequeue(p_head);
+ if (!p_item)
+ {
+ break;
+ }
+
+ p_item->event_handler(evt_type);
+ }
+}
+
+static void clock_irq_handler(nrfx_clock_evt_type_t evt)
+{
+ if (evt == NRFX_CLOCK_EVT_HFCLK_STARTED)
+ {
+ m_clock_cb.hfclk_on = true;
+ clock_clk_started_notify(NRF_DRV_CLOCK_EVT_HFCLK_STARTED);
+ }
+ if (evt == NRFX_CLOCK_EVT_LFCLK_STARTED)
+ {
+ m_clock_cb.lfclk_on = true;
+ clock_clk_started_notify(NRF_DRV_CLOCK_EVT_LFCLK_STARTED);
+ }
+#if CALIBRATION_SUPPORT
+ if (evt == NRFX_CLOCK_EVT_CTTO)
+ {
+ nrf_drv_clock_hfclk_request(&m_clock_cb.cal_hfclk_started_handler_item);
+ }
+
+ if (evt == NRFX_CLOCK_EVT_CAL_DONE)
+ {
+ nrf_drv_clock_hfclk_release();
+ bool aborted = (m_clock_cb.cal_state == CAL_STATE_ABORT);
+ m_clock_cb.cal_state = CAL_STATE_IDLE;
+ if (m_clock_cb.cal_done_handler)
+ {
+ m_clock_cb.cal_done_handler(aborted ?
+ NRF_DRV_CLOCK_EVT_CAL_ABORTED : NRF_DRV_CLOCK_EVT_CAL_DONE);
+ }
+ }
+#endif // CALIBRATION_SUPPORT
+}
+
+#ifdef SOFTDEVICE_PRESENT
+/**
+ * @brief SoftDevice SoC event handler.
+ *
+ * @param[in] evt_id SoC event.
+ * @param[in] p_context Context.
+ */
+static void soc_evt_handler(uint32_t evt_id, void * p_context)
+{
+ if (evt_id == NRF_EVT_HFCLKSTARTED)
+ {
+ m_clock_cb.hfclk_on = true;
+ clock_clk_started_notify(NRF_DRV_CLOCK_EVT_HFCLK_STARTED);
+ }
+}
+NRF_SDH_SOC_OBSERVER(m_soc_evt_observer, CLOCK_CONFIG_SOC_OBSERVER_PRIO, soc_evt_handler, NULL);
+
+/**
+ * @brief SoftDevice enable/disable state handler.
+ *
+ * @param[in] state State.
+ * @param[in] p_context Context.
+ */
+static void sd_state_evt_handler(nrf_sdh_state_evt_t state, void * p_context)
+{
+ switch (state)
+ {
+ case NRF_SDH_EVT_STATE_ENABLE_PREPARE:
+ NVIC_DisableIRQ(POWER_CLOCK_IRQn);
+ break;
+
+ case NRF_SDH_EVT_STATE_ENABLED:
+ CRITICAL_REGION_ENTER();
+ /* Make sure that nrf_drv_clock module is initialized */
+ if (!m_clock_cb.module_initialized)
+ {
+ (void)nrf_drv_clock_init();
+ }
+ /* SD is one of the LFCLK requesters, but it will enable it by itself. */
+ ++(m_clock_cb.lfclk_requests);
+ m_clock_cb.lfclk_on = true;
+ CRITICAL_REGION_EXIT();
+ break;
+
+ case NRF_SDH_EVT_STATE_DISABLED:
+ /* Reinit interrupts */
+ ASSERT(m_clock_cb.module_initialized);
+ nrfx_clock_enable();
+
+ /* SD leaves LFCLK enabled - disable it if it is no longer required. */
+ nrf_drv_clock_lfclk_release();
+ break;
+
+ default:
+ break;
+ }
+}
+
+NRF_SDH_STATE_OBSERVER(m_sd_state_observer, CLOCK_CONFIG_STATE_OBSERVER_PRIO) =
+{
+ .handler = sd_state_evt_handler,
+ .p_context = NULL,
+};
+
+#endif // SOFTDEVICE_PRESENT
+
+#undef NRF_CLOCK_LFCLK_RC
+#undef NRF_CLOCK_LFCLK_Xtal
+#undef NRF_CLOCK_LFCLK_Synth
+
+#endif // NRF_MODULE_ENABLED(NRF_CLOCK)
diff --git a/third_party/NordicSemiconductor/drivers/clock/nrf_drv_clock.h b/third_party/NordicSemiconductor/drivers/clock/nrf_drv_clock.h
index e0ead2b..53c0ec8 100644
--- a/third_party/NordicSemiconductor/drivers/clock/nrf_drv_clock.h
+++ b/third_party/NordicSemiconductor/drivers/clock/nrf_drv_clock.h
@@ -1,297 +1,297 @@
-/**
- * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-#ifndef NRF_DRV_CLOCK_H__
-#define NRF_DRV_CLOCK_H__
-
-#include <nrfx_clock.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @defgroup nrf_drv_clock Clock driver - legacy layer
- * @{
- * @ingroup nrf_clock
- *
- * @brief Layer providing compatibility with the former API.
- */
-
-/**
- * @brief Clock events.
- */
-typedef enum
-{
- NRF_DRV_CLOCK_EVT_HFCLK_STARTED, ///< HFCLK has been started.
- NRF_DRV_CLOCK_EVT_LFCLK_STARTED, ///< LFCLK has been started.
- NRF_DRV_CLOCK_EVT_CAL_DONE, ///< Calibration is done.
- NRF_DRV_CLOCK_EVT_CAL_ABORTED, ///< Calibration has been aborted.
-} nrf_drv_clock_evt_type_t;
-
-/**
- * @brief Clock event handler.
- *
- * @param[in] event Event.
- */
-typedef void (*nrf_drv_clock_event_handler_t)(nrf_drv_clock_evt_type_t event);
-
-// Forward declaration of the nrf_drv_clock_handler_item_t type.
-typedef struct nrf_drv_clock_handler_item_s nrf_drv_clock_handler_item_t;
-
-struct nrf_drv_clock_handler_item_s
-{
- nrf_drv_clock_handler_item_t * p_next; ///< A pointer to the next handler that should be called when the clock is started.
- nrf_drv_clock_event_handler_t event_handler; ///< Function to be called when the clock is started.
-};
-
-/**
- * @brief Function for checking if driver is already initialized
- *
- * @retval true Driver is initialized
- * @retval false Driver is uninitialized
- */
-bool nrf_drv_clock_init_check(void);
-
-/**
- * @brief Function for initializing the nrf_drv_clock module.
- *
- * After initialization, the module is in power off state (clocks are not requested).
- *
- * @retval NRF_SUCCESS If the procedure was successful.
- * @retval NRF_ERROR_MODULE_ALREADY_INITIALIZED If the driver was already initialized.
- */
-ret_code_t nrf_drv_clock_init(void);
-
-/**
- * @brief Function for uninitializing the clock module.
- *
- */
-void nrf_drv_clock_uninit(void);
-
-/**
- * @brief Function for requesting the LFCLK.
- *
- * The low-frequency clock can be requested by different modules
- * or contexts. The driver ensures that the clock will be started only when it is requested
- * the first time. If the clock is not ready but it was already started, the handler item that is
- * provided as an input parameter is added to the list of handlers that will be notified
- * when the clock is started. If the clock is already enabled, user callback is called from the
- * current context.
- *
- * The first request will start the selected LFCLK source. If an event handler is
- * provided, it will be called once the LFCLK is started. If the LFCLK was already started at this
- * time, the event handler will be called from the context of this function. Additionally,
- * the @ref nrf_drv_clock_lfclk_is_running function can be polled to check if the clock has started.
- *
- * @note When a SoftDevice is enabled, the LFCLK is always running and the driver cannot control it.
- *
- * @note The handler item provided by the user cannot be an automatic variable.
- *
- * @param[in] p_handler_item A pointer to the event handler structure.
- */
-void nrf_drv_clock_lfclk_request(nrf_drv_clock_handler_item_t * p_handler_item);
-
-/**
- * @brief Function for releasing the LFCLK.
- *
- * If there are no more requests, the LFCLK source will be stopped.
- *
- * @note When a SoftDevice is enabled, the LFCLK is always running.
- */
-void nrf_drv_clock_lfclk_release(void);
-
-/**
- * @brief Function for checking the LFCLK state.
- *
- * @retval true If the LFCLK is running.
- * @retval false If the LFCLK is not running.
- */
-bool nrf_drv_clock_lfclk_is_running(void);
-
-/**
- * @brief Function for requesting the high-accuracy source HFCLK.
- *
- * The high-accuracy source
- * can be requested by different modules or contexts. The driver ensures that the high-accuracy
- * clock will be started only when it is requested the first time. If the clock is not ready
- * but it was already started, the handler item that is provided as an input parameter is added
- * to the list of handlers that will be notified when the clock is started.
- *
- * If an event handler is provided, it will be called once the clock is started. If the clock was already
- * started at this time, the event handler will be called from the context of this function. Additionally,
- * the @ref nrf_drv_clock_hfclk_is_running function can be polled to check if the clock has started.
- *
- * @note If a SoftDevice is running, the clock is managed by the SoftDevice and all requests are handled by
- * the SoftDevice. This function cannot be called from all interrupt priority levels in that case.
- * @note The handler item provided by the user cannot be an automatic variable.
- *
- * @param[in] p_handler_item A pointer to the event handler structure.
- */
-void nrf_drv_clock_hfclk_request(nrf_drv_clock_handler_item_t * p_handler_item);
-
-/**
- * @brief Function for releasing the high-accuracy source HFCLK.
- *
- * If there are no more requests, the high-accuracy source will be released.
- */
-void nrf_drv_clock_hfclk_release(void);
-
-/**
- * @brief Function for checking the HFCLK state.
- *
- * @retval true If the HFCLK is running (for \nRFXX XTAL source).
- * @retval false If the HFCLK is not running.
- */
-bool nrf_drv_clock_hfclk_is_running(void);
-
-/**
- * @brief Function for starting a single calibration process.
- *
- * This function can also delay the start of calibration by a user-specified value. The delay will use
- * a low-power timer that is part of the CLOCK module. @ref nrf_drv_clock_is_calibrating can be called to
- * check if calibration is still in progress. If a handler is provided, the user can be notified when
- * calibration is completed. The ext calibration can be started from the handler context.
- *
- * The calibration process consists of three phases:
- * - Delay (optional)
- * - Requesting the high-accuracy HFCLK
- * - Hardware-supported calibration
- *
- * @param[in] delay Time after which the calibration will be started (in 0.25 s units).
- * @param[in] handler NULL or user function to be called when calibration is completed or aborted.
- *
- * @retval NRF_SUCCESS If the procedure was successful.
- * @retval NRF_ERROR_FORBIDDEN If a SoftDevice is present or the selected LFCLK source is not an RC oscillator.
- * @retval NRF_ERROR_INVALID_STATE If the low-frequency clock is off.
- * @retval NRF_ERROR_BUSY If calibration is in progress.
- */
-ret_code_t nrf_drv_clock_calibration_start(uint8_t delay, nrf_drv_clock_event_handler_t handler);
-
-/**
- * @brief Function for aborting calibration.
- *
- * This function aborts on-going calibration. If calibration was started, it cannot be stopped. If a handler
- * was provided by @ref nrf_drv_clock_calibration_start, this handler will be called once
- * aborted calibration is completed. @ref nrf_drv_clock_is_calibrating can also be used to check
- * if the system is calibrating.
- *
- * @retval NRF_SUCCESS If the procedure was successful.
- * @retval NRF_ERROR_FORBIDDEN If a SoftDevice is present or the selected LFCLK source is not an RC oscillator.
- */
-ret_code_t nrf_drv_clock_calibration_abort(void);
-
-/**
- * @brief Function for checking if calibration is in progress.
- *
- * This function indicates that the system is
- * in calibration if it is in any of the calibration process phases (see @ref nrf_drv_clock_calibration_start).
- *
- * @param[out] p_is_calibrating True if calibration is in progress, false if not.
- *
- * @retval NRF_SUCCESS If the procedure was successful.
- * @retval NRF_ERROR_FORBIDDEN If a SoftDevice is present or the selected LFCLK source is not an RC oscillator.
- */
-ret_code_t nrf_drv_clock_is_calibrating(bool * p_is_calibrating);
-
-/**@brief Function for returning a requested task address for the clock driver module.
- *
- * @param[in] task One of the peripheral tasks.
- *
- * @return Task address.
- */
-__STATIC_INLINE uint32_t nrf_drv_clock_ppi_task_addr(nrf_clock_task_t task);
-
-/**@brief Function for returning a requested event address for the clock driver module.
- *
- * @param[in] event One of the peripheral events.
- *
- * @return Event address.
- */
-__STATIC_INLINE uint32_t nrf_drv_clock_ppi_event_addr(nrf_clock_event_t event);
-
-
-#ifdef SOFTDEVICE_PRESENT
-/**
- * @brief Function called by the SoftDevice handler if an @ref NRF_SOC_EVTS event is received from the SoftDevice.
- *
- * @param[in] evt_id One of NRF_SOC_EVTS values.
- */
-void nrf_drv_clock_on_soc_event(uint32_t evt_id);
-
-/**
- * @brief Function called by the SoftDevice handler when the SoftDevice has been enabled.
- *
- * This function is called just after the SoftDevice has been properly enabled.
- * Its main purpose is to mark that LFCLK has been requested by SD.
- */
-void nrf_drv_clock_on_sd_enable(void);
-
-/**
- * @brief Function called by the SoftDevice handler when the SoftDevice has been disabled.
- *
- * This function is called just after the SoftDevice has been properly disabled.
- * It has two purposes:
- * 1. Releases the LFCLK from the SD.
- * 2. Reinitializes an interrupt after the SD releases POWER_CLOCK_IRQ.
- */
-void nrf_drv_clock_on_sd_disable(void);
-
-#endif
-/**
- *@}
- **/
-
-#ifndef SUPPRESS_INLINE_IMPLEMENTATION
-__STATIC_INLINE uint32_t nrf_drv_clock_ppi_task_addr(nrf_clock_task_t task)
-{
- return nrf_clock_task_address_get(task);
-}
-
-__STATIC_INLINE uint32_t nrf_drv_clock_ppi_event_addr(nrf_clock_event_t event)
-{
- return nrf_clock_event_address_get(event);
-}
-#endif //SUPPRESS_INLINE_IMPLEMENTATION
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // NRF_DRV_CLOCK_H__
+/**
+ * Copyright (c) 2016 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#ifndef NRF_DRV_CLOCK_H__
+#define NRF_DRV_CLOCK_H__
+
+#include <nrfx_clock.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup nrf_drv_clock Clock driver - legacy layer
+ * @{
+ * @ingroup nrf_clock
+ *
+ * @brief Layer providing compatibility with the former API.
+ */
+
+/**
+ * @brief Clock events.
+ */
+typedef enum
+{
+ NRF_DRV_CLOCK_EVT_HFCLK_STARTED, ///< HFCLK has been started.
+ NRF_DRV_CLOCK_EVT_LFCLK_STARTED, ///< LFCLK has been started.
+ NRF_DRV_CLOCK_EVT_CAL_DONE, ///< Calibration is done.
+ NRF_DRV_CLOCK_EVT_CAL_ABORTED, ///< Calibration has been aborted.
+} nrf_drv_clock_evt_type_t;
+
+/**
+ * @brief Clock event handler.
+ *
+ * @param[in] event Event.
+ */
+typedef void (*nrf_drv_clock_event_handler_t)(nrf_drv_clock_evt_type_t event);
+
+// Forward declaration of the nrf_drv_clock_handler_item_t type.
+typedef struct nrf_drv_clock_handler_item_s nrf_drv_clock_handler_item_t;
+
+struct nrf_drv_clock_handler_item_s
+{
+ nrf_drv_clock_handler_item_t * p_next; ///< A pointer to the next handler that should be called when the clock is started.
+ nrf_drv_clock_event_handler_t event_handler; ///< Function to be called when the clock is started.
+};
+
+/**
+ * @brief Function for checking if driver is already initialized
+ *
+ * @retval true Driver is initialized
+ * @retval false Driver is uninitialized
+ */
+bool nrf_drv_clock_init_check(void);
+
+/**
+ * @brief Function for initializing the nrf_drv_clock module.
+ *
+ * After initialization, the module is in power off state (clocks are not requested).
+ *
+ * @retval NRF_SUCCESS If the procedure was successful.
+ * @retval NRF_ERROR_MODULE_ALREADY_INITIALIZED If the driver was already initialized.
+ */
+ret_code_t nrf_drv_clock_init(void);
+
+/**
+ * @brief Function for uninitializing the clock module.
+ *
+ */
+void nrf_drv_clock_uninit(void);
+
+/**
+ * @brief Function for requesting the LFCLK.
+ *
+ * The low-frequency clock can be requested by different modules
+ * or contexts. The driver ensures that the clock will be started only when it is requested
+ * the first time. If the clock is not ready but it was already started, the handler item that is
+ * provided as an input parameter is added to the list of handlers that will be notified
+ * when the clock is started. If the clock is already enabled, user callback is called from the
+ * current context.
+ *
+ * The first request will start the selected LFCLK source. If an event handler is
+ * provided, it will be called once the LFCLK is started. If the LFCLK was already started at this
+ * time, the event handler will be called from the context of this function. Additionally,
+ * the @ref nrf_drv_clock_lfclk_is_running function can be polled to check if the clock has started.
+ *
+ * @note When a SoftDevice is enabled, the LFCLK is always running and the driver cannot control it.
+ *
+ * @note The handler item provided by the user cannot be an automatic variable.
+ *
+ * @param[in] p_handler_item A pointer to the event handler structure.
+ */
+void nrf_drv_clock_lfclk_request(nrf_drv_clock_handler_item_t * p_handler_item);
+
+/**
+ * @brief Function for releasing the LFCLK.
+ *
+ * If there are no more requests, the LFCLK source will be stopped.
+ *
+ * @note When a SoftDevice is enabled, the LFCLK is always running.
+ */
+void nrf_drv_clock_lfclk_release(void);
+
+/**
+ * @brief Function for checking the LFCLK state.
+ *
+ * @retval true If the LFCLK is running.
+ * @retval false If the LFCLK is not running.
+ */
+bool nrf_drv_clock_lfclk_is_running(void);
+
+/**
+ * @brief Function for requesting the high-accuracy source HFCLK.
+ *
+ * The high-accuracy source
+ * can be requested by different modules or contexts. The driver ensures that the high-accuracy
+ * clock will be started only when it is requested the first time. If the clock is not ready
+ * but it was already started, the handler item that is provided as an input parameter is added
+ * to the list of handlers that will be notified when the clock is started.
+ *
+ * If an event handler is provided, it will be called once the clock is started. If the clock was already
+ * started at this time, the event handler will be called from the context of this function. Additionally,
+ * the @ref nrf_drv_clock_hfclk_is_running function can be polled to check if the clock has started.
+ *
+ * @note If a SoftDevice is running, the clock is managed by the SoftDevice and all requests are handled by
+ * the SoftDevice. This function cannot be called from all interrupt priority levels in that case.
+ * @note The handler item provided by the user cannot be an automatic variable.
+ *
+ * @param[in] p_handler_item A pointer to the event handler structure.
+ */
+void nrf_drv_clock_hfclk_request(nrf_drv_clock_handler_item_t * p_handler_item);
+
+/**
+ * @brief Function for releasing the high-accuracy source HFCLK.
+ *
+ * If there are no more requests, the high-accuracy source will be released.
+ */
+void nrf_drv_clock_hfclk_release(void);
+
+/**
+ * @brief Function for checking the HFCLK state.
+ *
+ * @retval true If the HFCLK is running (for \nRFXX XTAL source).
+ * @retval false If the HFCLK is not running.
+ */
+bool nrf_drv_clock_hfclk_is_running(void);
+
+/**
+ * @brief Function for starting a single calibration process.
+ *
+ * This function can also delay the start of calibration by a user-specified value. The delay will use
+ * a low-power timer that is part of the CLOCK module. @ref nrf_drv_clock_is_calibrating can be called to
+ * check if calibration is still in progress. If a handler is provided, the user can be notified when
+ * calibration is completed. The ext calibration can be started from the handler context.
+ *
+ * The calibration process consists of three phases:
+ * - Delay (optional)
+ * - Requesting the high-accuracy HFCLK
+ * - Hardware-supported calibration
+ *
+ * @param[in] delay Time after which the calibration will be started (in 0.25 s units).
+ * @param[in] handler NULL or user function to be called when calibration is completed or aborted.
+ *
+ * @retval NRF_SUCCESS If the procedure was successful.
+ * @retval NRF_ERROR_FORBIDDEN If a SoftDevice is present or the selected LFCLK source is not an RC oscillator.
+ * @retval NRF_ERROR_INVALID_STATE If the low-frequency clock is off.
+ * @retval NRF_ERROR_BUSY If calibration is in progress.
+ */
+ret_code_t nrf_drv_clock_calibration_start(uint8_t delay, nrf_drv_clock_event_handler_t handler);
+
+/**
+ * @brief Function for aborting calibration.
+ *
+ * This function aborts on-going calibration. If calibration was started, it cannot be stopped. If a handler
+ * was provided by @ref nrf_drv_clock_calibration_start, this handler will be called once
+ * aborted calibration is completed. @ref nrf_drv_clock_is_calibrating can also be used to check
+ * if the system is calibrating.
+ *
+ * @retval NRF_SUCCESS If the procedure was successful.
+ * @retval NRF_ERROR_FORBIDDEN If a SoftDevice is present or the selected LFCLK source is not an RC oscillator.
+ */
+ret_code_t nrf_drv_clock_calibration_abort(void);
+
+/**
+ * @brief Function for checking if calibration is in progress.
+ *
+ * This function indicates that the system is
+ * in calibration if it is in any of the calibration process phases (see @ref nrf_drv_clock_calibration_start).
+ *
+ * @param[out] p_is_calibrating True if calibration is in progress, false if not.
+ *
+ * @retval NRF_SUCCESS If the procedure was successful.
+ * @retval NRF_ERROR_FORBIDDEN If a SoftDevice is present or the selected LFCLK source is not an RC oscillator.
+ */
+ret_code_t nrf_drv_clock_is_calibrating(bool * p_is_calibrating);
+
+/**@brief Function for returning a requested task address for the clock driver module.
+ *
+ * @param[in] task One of the peripheral tasks.
+ *
+ * @return Task address.
+ */
+__STATIC_INLINE uint32_t nrf_drv_clock_ppi_task_addr(nrf_clock_task_t task);
+
+/**@brief Function for returning a requested event address for the clock driver module.
+ *
+ * @param[in] event One of the peripheral events.
+ *
+ * @return Event address.
+ */
+__STATIC_INLINE uint32_t nrf_drv_clock_ppi_event_addr(nrf_clock_event_t event);
+
+
+#ifdef SOFTDEVICE_PRESENT
+/**
+ * @brief Function called by the SoftDevice handler if an @ref NRF_SOC_EVTS event is received from the SoftDevice.
+ *
+ * @param[in] evt_id One of NRF_SOC_EVTS values.
+ */
+void nrf_drv_clock_on_soc_event(uint32_t evt_id);
+
+/**
+ * @brief Function called by the SoftDevice handler when the SoftDevice has been enabled.
+ *
+ * This function is called just after the SoftDevice has been properly enabled.
+ * Its main purpose is to mark that LFCLK has been requested by SD.
+ */
+void nrf_drv_clock_on_sd_enable(void);
+
+/**
+ * @brief Function called by the SoftDevice handler when the SoftDevice has been disabled.
+ *
+ * This function is called just after the SoftDevice has been properly disabled.
+ * It has two purposes:
+ * 1. Releases the LFCLK from the SD.
+ * 2. Reinitializes an interrupt after the SD releases POWER_CLOCK_IRQ.
+ */
+void nrf_drv_clock_on_sd_disable(void);
+
+#endif
+/**
+ *@}
+ **/
+
+#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+__STATIC_INLINE uint32_t nrf_drv_clock_ppi_task_addr(nrf_clock_task_t task)
+{
+ return nrf_clock_task_address_get(task);
+}
+
+__STATIC_INLINE uint32_t nrf_drv_clock_ppi_event_addr(nrf_clock_event_t event)
+{
+ return nrf_clock_event_address_get(event);
+}
+#endif //SUPPRESS_INLINE_IMPLEMENTATION
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // NRF_DRV_CLOCK_H__
diff --git a/third_party/NordicSemiconductor/drivers/common/nrf_drv_common.h b/third_party/NordicSemiconductor/drivers/common/nrf_drv_common.h
index 163c987..909562f 100644
--- a/third_party/NordicSemiconductor/drivers/common/nrf_drv_common.h
+++ b/third_party/NordicSemiconductor/drivers/common/nrf_drv_common.h
@@ -1,63 +1,63 @@
-/**
- * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#ifndef NRF_DRV_COMMON_H__
-#define NRF_DRV_COMMON_H__
-
-#include <nrfx.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#define INTERRUPT_PRIORITY_VALIDATION(pri) STATIC_ASSERT(INTERRUPT_PRIORITY_IS_VALID((pri)))
-#define INTERRUPT_PRIORITY_ASSERT(pri) ASSERT(INTERRUPT_PRIORITY_IS_VALID((pri)))
-
-#define nrf_drv_irq_handler_t nrfx_irq_handler_t
-#define nrf_drv_bitpos_to_event nrfx_bitpos_to_event
-#define nrf_drv_event_to_bitpos nrfx_event_to_bitpos
-#define nrf_drv_get_IRQn nrfx_get_irq_number
-#define nrf_drv_is_in_RAM nrfx_is_in_ram
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // NRF_DRV_COMMON_H__
+/**
+ * Copyright (c) 2015 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef NRF_DRV_COMMON_H__
+#define NRF_DRV_COMMON_H__
+
+#include <nrfx.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define INTERRUPT_PRIORITY_VALIDATION(pri) STATIC_ASSERT(INTERRUPT_PRIORITY_IS_VALID((pri)))
+#define INTERRUPT_PRIORITY_ASSERT(pri) ASSERT(INTERRUPT_PRIORITY_IS_VALID((pri)))
+
+#define nrf_drv_irq_handler_t nrfx_irq_handler_t
+#define nrf_drv_bitpos_to_event nrfx_bitpos_to_event
+#define nrf_drv_event_to_bitpos nrfx_event_to_bitpos
+#define nrf_drv_get_IRQn nrfx_get_irq_number
+#define nrf_drv_is_in_RAM nrfx_is_in_ram
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // NRF_DRV_COMMON_H__
diff --git a/third_party/NordicSemiconductor/drivers/power/nrf_drv_power.c b/third_party/NordicSemiconductor/drivers/power/nrf_drv_power.c
index bba3d13..5141ec4 100644
--- a/third_party/NordicSemiconductor/drivers/power/nrf_drv_power.c
+++ b/third_party/NordicSemiconductor/drivers/power/nrf_drv_power.c
@@ -1,416 +1,417 @@
-/**
- * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#include "sdk_common.h"
-#if NRF_MODULE_ENABLED(POWER)
-#include "nrf_drv_power.h"
-#include <nrf_drv_clock.h>
-#ifdef SOFTDEVICE_PRESENT
-#include "nrf_sdh.h"
-#include "nrf_sdh_soc.h"
-#endif
-
-#include <app_util.h>
-
-// The structure with default configuration data.
-static const nrfx_power_config_t m_drv_power_config_default =
-{
- .dcdcen = NRFX_POWER_CONFIG_DEFAULT_DCDCEN,
-#if NRF_POWER_HAS_VDDH
- .dcdcenhv = NRFX_POWER_CONFIG_DEFAULT_DCDCENHV,
-#endif
-};
-
-static bool m_initialized;
-
-bool nrf_drv_power_init_check(void)
-{
- return m_initialized;
-}
-
-ret_code_t nrf_drv_power_init(nrf_drv_power_config_t const * p_config)
-{
-#ifdef SOFTDEVICE_PRESENT
- if (m_initialized)
- {
- return NRF_ERROR_MODULE_ALREADY_INITIALIZED;
- }
- if (nrf_sdh_is_enabled())
- {
- return NRF_ERROR_INVALID_STATE;
- }
-#endif
- if (p_config == NULL)
- {
- p_config = &m_drv_power_config_default;
- }
-
- ret_code_t err_code = nrfx_power_init(p_config);
- if (err_code == NRFX_SUCCESS)
- {
- m_initialized = true;
- }
- return err_code;
-}
-
-void nrf_drv_power_uninit()
-{
- nrfx_power_uninit();
- nrf_drv_power_pof_uninit();
-#if NRF_POWER_HAS_SLEEPEVT
- nrf_drv_power_sleepevt_uninit();
-#endif
-#if NRF_POWER_HAS_USBREG
- nrf_drv_power_usbevt_uninit();
-#endif
- m_initialized = false;
-}
-
-ret_code_t nrf_drv_power_pof_init(nrf_drv_power_pofwarn_config_t const * p_config)
-{
- ret_code_t err_code = NRF_SUCCESS;
- nrfx_power_pof_init(p_config);
-#ifdef SOFTDEVICE_PRESENT
- if (nrf_sdh_is_enabled())
- {
- /* Currently when SD is enabled - the configuration can be changed
- * in very limited range.
- * It is the SoftDevice limitation.
- */
-#if NRF_POWER_HAS_VDDH
- if (p_config->thrvddh != nrf_power_pofcon_vddh_get())
- {
- /* Cannot change THRVDDH with current SD API */
- return NRF_ERROR_INVALID_STATE;
- }
-#endif
- if (p_config->thr != nrf_power_pofcon_get(NULL))
- {
- /* Only limited number of THR values are supported and
- * the values taken by SD is different than the one in hardware
- */
- uint8_t thr;
- switch(p_config->thr)
- {
- case NRF_POWER_POFTHR_V21:
- thr = NRF_POWER_THRESHOLD_V21;
- break;
- case NRF_POWER_POFTHR_V23:
- thr = NRF_POWER_THRESHOLD_V23;
- break;
- case NRF_POWER_POFTHR_V25:
- thr = NRF_POWER_THRESHOLD_V25;
- break;
- case NRF_POWER_POFTHR_V27:
- thr = NRF_POWER_THRESHOLD_V27;
- break;
- default:
- /* Cannot configure */
- nrfx_power_pof_uninit();
- return NRF_ERROR_INVALID_STATE;
- }
- err_code = sd_power_pof_threshold_set(thr);
- if (err_code != NRF_SUCCESS)
- {
- return err_code;
- }
- }
- err_code = sd_power_pof_enable(true);
- }
- else
-#endif /* SOFTDEVICE_PRESENT */
- {
- nrfx_power_pof_enable(p_config);
- }
- return err_code;
-}
-
-void nrf_drv_power_pof_uninit()
-{
-#ifdef SOFTDEVICE_PRESENT
- if (nrf_sdh_is_enabled())
- {
- ret_code_t err_code = sd_power_pof_enable(false);
- ASSERT(err_code == NRF_SUCCESS);
- UNUSED_VARIABLE(err_code); //handle no-debug case
- }
- else
-#endif
- {
- nrfx_power_pof_disable();
- }
- nrfx_power_pof_uninit();
-}
-
-#if NRF_POWER_HAS_SLEEPEVT
-ret_code_t nrf_drv_power_sleepevt_init(nrf_drv_power_sleepevt_config_t const * p_config)
-{
- if (p_config->handler != NULL)
- {
-#ifdef SOFTDEVICE_PRESENT
- if (nrf_sdh_is_enabled())
- {
- if ((p_config->en_enter) || (p_config->en_exit))
- {
- return NRF_ERROR_INVALID_STATE;
- }
- }
- else
-#endif
- {
- nrfx_power_sleepevt_enable(p_config);
- }
- }
- return NRF_SUCCESS;
-}
-
-void nrf_drv_power_sleepevt_uninit(void)
-{
-#ifdef SOFTDEVICE_PRESENT
- if (nrf_sdh_is_enabled())
- {
- /* Nothing to do */
- }
- else
-#endif
- {
- nrfx_power_sleepevt_disable();
- }
- nrfx_power_sleepevt_uninit();
-}
-#endif /* NRF_POWER_HAS_SLEEPEVT */
-
-#if NRF_POWER_HAS_USBREG
-
-#ifdef SOFTDEVICE_PRESENT
-static ret_code_t nrf_drv_power_sd_usbevt_enable(bool enable)
-{
- ret_code_t err_code;
- err_code = sd_power_usbdetected_enable(enable);
- ASSERT(err_code == NRF_SUCCESS);
- if (err_code != NRF_SUCCESS)
- {
- return err_code;
- }
-
- err_code = sd_power_usbpwrrdy_enable(enable);
- ASSERT(err_code == NRF_SUCCESS);
- if (err_code != NRF_SUCCESS)
- {
- return err_code;
- }
-
- err_code = sd_power_usbremoved_enable(enable);
- ASSERT(err_code == NRF_SUCCESS);
- return err_code;
-}
-#endif // SOFTDEVICE_PRESENT
-
-ret_code_t nrf_drv_power_usbevt_init(nrf_drv_power_usbevt_config_t const * p_config)
-{
- nrf_drv_power_usbevt_uninit();
- nrfx_power_usbevt_init(p_config);
-#ifdef SOFTDEVICE_PRESENT
- if (nrf_sdh_is_enabled())
- {
- ret_code_t err_code = nrf_drv_power_sd_usbevt_enable(true);
- ASSERT(err_code == NRF_SUCCESS);
- if (err_code != NRF_SUCCESS)
- {
- return err_code;
- }
-
- uint32_t regstatus;
- err_code = sd_power_usbregstatus_get(®status);
- ASSERT(err_code == NRF_SUCCESS);
- if (err_code != NRF_SUCCESS)
- {
- return err_code;
- }
-
- if (regstatus & POWER_USBREGSTATUS_VBUSDETECT_Msk)
- {
- nrfx_power_usb_event_handler_t usbevt_handler = nrfx_power_usb_handler_get();
- ASSERT(usbevt_handler != NULL);
- usbevt_handler(NRFX_POWER_USB_EVT_DETECTED);
- }
- }
- else
-#endif
- {
- nrfx_power_usbevt_enable();
- }
- return NRF_SUCCESS;
-}
-
-void nrf_drv_power_usbevt_uninit(void)
-{
-#ifdef SOFTDEVICE_PRESENT
- CRITICAL_REGION_ENTER();
- if (nrf_sdh_is_enabled())
- {
- ret_code_t err_code = nrf_drv_power_sd_usbevt_enable(false);
- ASSERT(err_code == NRF_SUCCESS);
- UNUSED_VARIABLE(err_code);
- }
- else
-#endif
- {
- nrfx_power_usbevt_disable();
- }
-#ifdef SOFTDEVICE_PRESENT
- CRITICAL_REGION_EXIT();
-#endif
- nrfx_power_usbevt_uninit();
-}
-#endif /* NRF_POWER_HAS_USBREG */
-
-#ifdef SOFTDEVICE_PRESENT
-static void nrf_drv_power_sdh_soc_evt_handler(uint32_t evt_id, void * p_context);
-static void nrf_drv_power_sdh_state_evt_handler(nrf_sdh_state_evt_t state, void * p_context);
-
-NRF_SDH_SOC_OBSERVER(m_soc_observer, POWER_CONFIG_SOC_OBSERVER_PRIO,
- nrf_drv_power_sdh_soc_evt_handler, NULL);
-
-NRF_SDH_STATE_OBSERVER(m_sd_observer, POWER_CONFIG_STATE_OBSERVER_PRIO) =
-{
- .handler = nrf_drv_power_sdh_state_evt_handler,
- .p_context = NULL
-};
-
-static void nrf_drv_power_sdh_soc_evt_handler(uint32_t evt_id, void * p_context)
-{
- if (evt_id == NRF_EVT_POWER_FAILURE_WARNING)
- {
- nrfx_power_pofwarn_event_handler_t pofwarn_handler = nrfx_power_pof_handler_get();
- /* Cannot be null if event is enabled */
- ASSERT(pofwarn_handler != NULL);
- pofwarn_handler();
- }
-
-#if NRF_POWER_HAS_USBREG
- nrfx_power_usb_event_handler_t usbevt_handler = nrfx_power_usb_handler_get();
- if (usbevt_handler != NULL)
- {
- switch (evt_id)
- {
- case NRF_EVT_POWER_USB_POWER_READY:
- usbevt_handler(NRFX_POWER_USB_EVT_READY);
- break;
-
- case NRF_EVT_POWER_USB_DETECTED:
- usbevt_handler(NRFX_POWER_USB_EVT_DETECTED);
- break;
-
- case NRF_EVT_POWER_USB_REMOVED:
- usbevt_handler(NRFX_POWER_USB_EVT_REMOVED);
- break;
-
- default:
- break;
-
- }
- }
-#endif
-}
-
-static void nrf_drv_power_on_sd_enable(void)
-{
- ASSERT(m_initialized); /* This module has to be enabled first */
- CRITICAL_REGION_ENTER();
- if (nrfx_power_pof_handler_get() != NULL)
- {
- ret_code_t err_code = sd_power_pof_enable(true);
- ASSERT(err_code == NRF_SUCCESS);
- UNUSED_VARIABLE(err_code); //handle no-debug case
- }
- CRITICAL_REGION_EXIT();
-
-#if NRF_POWER_HAS_USBREG
- if (nrfx_power_usb_handler_get() != NULL)
- {
- ret_code_t err_code = nrf_drv_power_sd_usbevt_enable(true);
- ASSERT(err_code == NRF_SUCCESS);
- UNUSED_VARIABLE(err_code); //handle no-debug case
- }
-#endif
-}
-
-static void nrf_drv_power_on_sd_disable(void)
-{
- /* Reinit interrupts */
- ASSERT(m_initialized);
- NRFX_IRQ_PRIORITY_SET(POWER_CLOCK_IRQn, CLOCK_CONFIG_IRQ_PRIORITY);
- NRFX_IRQ_ENABLE(POWER_CLOCK_IRQn);
- if (nrfx_power_pof_handler_get() != NULL)
- {
- nrf_power_int_enable(NRF_POWER_INT_POFWARN_MASK);
- }
-
-#if NRF_POWER_HAS_USBREG
- if (nrfx_power_usb_handler_get() != NULL)
- {
- nrf_power_int_enable(
- NRF_POWER_INT_USBDETECTED_MASK |
- NRF_POWER_INT_USBREMOVED_MASK |
- NRF_POWER_INT_USBPWRRDY_MASK);
- }
-#endif
-}
-
-static void nrf_drv_power_sdh_state_evt_handler(nrf_sdh_state_evt_t state, void * p_context)
-{
- switch (state)
- {
- case NRF_SDH_EVT_STATE_ENABLED:
- nrf_drv_power_on_sd_enable();
- break;
-
- case NRF_SDH_EVT_STATE_DISABLED:
- nrf_drv_power_on_sd_disable();
- break;
-
- default:
- break;
- }
-}
-
-#endif // SOFTDEVICE_PRESENT
-#endif //POWER_ENABLED
+/**
+ * Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include "sdk_common.h"
+#if NRF_MODULE_ENABLED(POWER)
+#include "nrf_drv_power.h"
+#include <nrf_drv_clock.h>
+#ifdef SOFTDEVICE_PRESENT
+#include "nrf_sdh.h"
+#include "nrf_sdh_soc.h"
+#endif
+
+#include <app_util.h>
+
+// The structure with default configuration data.
+static const nrfx_power_config_t m_drv_power_config_default =
+{
+ .dcdcen = NRFX_POWER_CONFIG_DEFAULT_DCDCEN,
+#if NRF_POWER_HAS_VDDH
+ .dcdcenhv = NRFX_POWER_CONFIG_DEFAULT_DCDCENHV,
+#endif
+};
+
+static bool m_initialized;
+
+bool nrf_drv_power_init_check(void)
+{
+ return m_initialized;
+}
+
+ret_code_t nrf_drv_power_init(nrf_drv_power_config_t const * p_config)
+{
+ if (m_initialized)
+ {
+ return NRF_ERROR_MODULE_ALREADY_INITIALIZED;
+ }
+
+#ifdef SOFTDEVICE_PRESENT
+ if (nrf_sdh_is_enabled())
+ {
+ return NRF_ERROR_INVALID_STATE;
+ }
+#endif
+ if (p_config == NULL)
+ {
+ p_config = &m_drv_power_config_default;
+ }
+
+ ret_code_t err_code = nrfx_power_init(p_config);
+ if (err_code == NRFX_SUCCESS)
+ {
+ m_initialized = true;
+ }
+ return err_code;
+}
+
+void nrf_drv_power_uninit()
+{
+ nrfx_power_uninit();
+ nrf_drv_power_pof_uninit();
+#if NRF_POWER_HAS_SLEEPEVT
+ nrf_drv_power_sleepevt_uninit();
+#endif
+#if NRF_POWER_HAS_USBREG
+ nrf_drv_power_usbevt_uninit();
+#endif
+ m_initialized = false;
+}
+
+ret_code_t nrf_drv_power_pof_init(nrf_drv_power_pofwarn_config_t const * p_config)
+{
+ ret_code_t err_code = NRF_SUCCESS;
+ nrfx_power_pof_init(p_config);
+#ifdef SOFTDEVICE_PRESENT
+ if (nrf_sdh_is_enabled())
+ {
+ /* Currently when SD is enabled - the configuration can be changed
+ * in very limited range.
+ * It is the SoftDevice limitation.
+ */
+#if NRF_POWER_HAS_VDDH
+ if (p_config->thrvddh != nrf_power_pofcon_vddh_get())
+ {
+ /* Cannot change THRVDDH with current SD API */
+ return NRF_ERROR_INVALID_STATE;
+ }
+#endif
+ if (p_config->thr != nrf_power_pofcon_get(NULL))
+ {
+ /* Only limited number of THR values are supported and
+ * the values taken by SD is different than the one in hardware
+ */
+ uint8_t thr;
+ switch(p_config->thr)
+ {
+ case NRF_POWER_POFTHR_V21:
+ thr = NRF_POWER_THRESHOLD_V21;
+ break;
+ case NRF_POWER_POFTHR_V23:
+ thr = NRF_POWER_THRESHOLD_V23;
+ break;
+ case NRF_POWER_POFTHR_V25:
+ thr = NRF_POWER_THRESHOLD_V25;
+ break;
+ case NRF_POWER_POFTHR_V27:
+ thr = NRF_POWER_THRESHOLD_V27;
+ break;
+ default:
+ /* Cannot configure */
+ nrfx_power_pof_uninit();
+ return NRF_ERROR_INVALID_STATE;
+ }
+ err_code = sd_power_pof_threshold_set(thr);
+ if (err_code != NRF_SUCCESS)
+ {
+ return err_code;
+ }
+ }
+ err_code = sd_power_pof_enable(true);
+ }
+ else
+#endif /* SOFTDEVICE_PRESENT */
+ {
+ nrfx_power_pof_enable(p_config);
+ }
+ return err_code;
+}
+
+void nrf_drv_power_pof_uninit()
+{
+#ifdef SOFTDEVICE_PRESENT
+ if (nrf_sdh_is_enabled())
+ {
+ ret_code_t err_code = sd_power_pof_enable(false);
+ ASSERT(err_code == NRF_SUCCESS);
+ UNUSED_VARIABLE(err_code); //handle no-debug case
+ }
+ else
+#endif
+ {
+ nrfx_power_pof_disable();
+ }
+ nrfx_power_pof_uninit();
+}
+
+#if NRF_POWER_HAS_SLEEPEVT
+ret_code_t nrf_drv_power_sleepevt_init(nrf_drv_power_sleepevt_config_t const * p_config)
+{
+ if (p_config->handler != NULL)
+ {
+#ifdef SOFTDEVICE_PRESENT
+ if (nrf_sdh_is_enabled())
+ {
+ if ((p_config->en_enter) || (p_config->en_exit))
+ {
+ return NRF_ERROR_INVALID_STATE;
+ }
+ }
+ else
+#endif
+ {
+ nrfx_power_sleepevt_enable(p_config);
+ }
+ }
+ return NRF_SUCCESS;
+}
+
+void nrf_drv_power_sleepevt_uninit(void)
+{
+#ifdef SOFTDEVICE_PRESENT
+ if (nrf_sdh_is_enabled())
+ {
+ /* Nothing to do */
+ }
+ else
+#endif
+ {
+ nrfx_power_sleepevt_disable();
+ }
+ nrfx_power_sleepevt_uninit();
+}
+#endif /* NRF_POWER_HAS_SLEEPEVT */
+
+#if NRF_POWER_HAS_USBREG
+
+#ifdef SOFTDEVICE_PRESENT
+static ret_code_t nrf_drv_power_sd_usbevt_enable(bool enable)
+{
+ ret_code_t err_code;
+ err_code = sd_power_usbdetected_enable(enable);
+ ASSERT(err_code == NRF_SUCCESS);
+ if (err_code != NRF_SUCCESS)
+ {
+ return err_code;
+ }
+
+ err_code = sd_power_usbpwrrdy_enable(enable);
+ ASSERT(err_code == NRF_SUCCESS);
+ if (err_code != NRF_SUCCESS)
+ {
+ return err_code;
+ }
+
+ err_code = sd_power_usbremoved_enable(enable);
+ ASSERT(err_code == NRF_SUCCESS);
+ return err_code;
+}
+#endif // SOFTDEVICE_PRESENT
+
+ret_code_t nrf_drv_power_usbevt_init(nrf_drv_power_usbevt_config_t const * p_config)
+{
+ nrf_drv_power_usbevt_uninit();
+ nrfx_power_usbevt_init(p_config);
+#ifdef SOFTDEVICE_PRESENT
+ if (nrf_sdh_is_enabled())
+ {
+ ret_code_t err_code = nrf_drv_power_sd_usbevt_enable(true);
+ ASSERT(err_code == NRF_SUCCESS);
+ if (err_code != NRF_SUCCESS)
+ {
+ return err_code;
+ }
+
+ uint32_t regstatus;
+ err_code = sd_power_usbregstatus_get(®status);
+ ASSERT(err_code == NRF_SUCCESS);
+ if (err_code != NRF_SUCCESS)
+ {
+ return err_code;
+ }
+
+ if (regstatus & POWER_USBREGSTATUS_VBUSDETECT_Msk)
+ {
+ nrfx_power_usb_event_handler_t usbevt_handler = nrfx_power_usb_handler_get();
+ ASSERT(usbevt_handler != NULL);
+ usbevt_handler(NRFX_POWER_USB_EVT_DETECTED);
+ }
+ }
+ else
+#endif
+ {
+ nrfx_power_usbevt_enable();
+ }
+ return NRF_SUCCESS;
+}
+
+void nrf_drv_power_usbevt_uninit(void)
+{
+#ifdef SOFTDEVICE_PRESENT
+ CRITICAL_REGION_ENTER();
+ if (nrf_sdh_is_enabled())
+ {
+ ret_code_t err_code = nrf_drv_power_sd_usbevt_enable(false);
+ ASSERT(err_code == NRF_SUCCESS);
+ UNUSED_VARIABLE(err_code);
+ }
+ else
+#endif
+ {
+ nrfx_power_usbevt_disable();
+ }
+#ifdef SOFTDEVICE_PRESENT
+ CRITICAL_REGION_EXIT();
+#endif
+ nrfx_power_usbevt_uninit();
+}
+#endif /* NRF_POWER_HAS_USBREG */
+
+#ifdef SOFTDEVICE_PRESENT
+static void nrf_drv_power_sdh_soc_evt_handler(uint32_t evt_id, void * p_context);
+static void nrf_drv_power_sdh_state_evt_handler(nrf_sdh_state_evt_t state, void * p_context);
+
+NRF_SDH_SOC_OBSERVER(m_soc_observer, POWER_CONFIG_SOC_OBSERVER_PRIO,
+ nrf_drv_power_sdh_soc_evt_handler, NULL);
+
+NRF_SDH_STATE_OBSERVER(m_sd_observer, POWER_CONFIG_STATE_OBSERVER_PRIO) =
+{
+ .handler = nrf_drv_power_sdh_state_evt_handler,
+ .p_context = NULL
+};
+
+static void nrf_drv_power_sdh_soc_evt_handler(uint32_t evt_id, void * p_context)
+{
+ if (evt_id == NRF_EVT_POWER_FAILURE_WARNING)
+ {
+ nrfx_power_pofwarn_event_handler_t pofwarn_handler = nrfx_power_pof_handler_get();
+ /* Cannot be null if event is enabled */
+ ASSERT(pofwarn_handler != NULL);
+ pofwarn_handler();
+ }
+
+#if NRF_POWER_HAS_USBREG
+ nrfx_power_usb_event_handler_t usbevt_handler = nrfx_power_usb_handler_get();
+ if (usbevt_handler != NULL)
+ {
+ switch (evt_id)
+ {
+ case NRF_EVT_POWER_USB_POWER_READY:
+ usbevt_handler(NRFX_POWER_USB_EVT_READY);
+ break;
+
+ case NRF_EVT_POWER_USB_DETECTED:
+ usbevt_handler(NRFX_POWER_USB_EVT_DETECTED);
+ break;
+
+ case NRF_EVT_POWER_USB_REMOVED:
+ usbevt_handler(NRFX_POWER_USB_EVT_REMOVED);
+ break;
+
+ default:
+ break;
+
+ }
+ }
+#endif
+}
+
+static void nrf_drv_power_on_sd_enable(void)
+{
+ ASSERT(m_initialized); /* This module has to be enabled first */
+ CRITICAL_REGION_ENTER();
+ if (nrfx_power_pof_handler_get() != NULL)
+ {
+ ret_code_t err_code = sd_power_pof_enable(true);
+ ASSERT(err_code == NRF_SUCCESS);
+ UNUSED_VARIABLE(err_code); //handle no-debug case
+ }
+ CRITICAL_REGION_EXIT();
+
+#if NRF_POWER_HAS_USBREG
+ if (nrfx_power_usb_handler_get() != NULL)
+ {
+ ret_code_t err_code = nrf_drv_power_sd_usbevt_enable(true);
+ ASSERT(err_code == NRF_SUCCESS);
+ UNUSED_VARIABLE(err_code); //handle no-debug case
+ }
+#endif
+}
+
+static void nrf_drv_power_on_sd_disable(void)
+{
+ /* Reinit interrupts */
+ ASSERT(m_initialized);
+ NRFX_IRQ_PRIORITY_SET(POWER_CLOCK_IRQn, CLOCK_CONFIG_IRQ_PRIORITY);
+ NRFX_IRQ_ENABLE(POWER_CLOCK_IRQn);
+ if (nrfx_power_pof_handler_get() != NULL)
+ {
+ nrf_power_int_enable(NRF_POWER_INT_POFWARN_MASK);
+ }
+
+#if NRF_POWER_HAS_USBREG
+ if (nrfx_power_usb_handler_get() != NULL)
+ {
+ nrf_power_int_enable(
+ NRF_POWER_INT_USBDETECTED_MASK |
+ NRF_POWER_INT_USBREMOVED_MASK |
+ NRF_POWER_INT_USBPWRRDY_MASK);
+ }
+#endif
+}
+
+static void nrf_drv_power_sdh_state_evt_handler(nrf_sdh_state_evt_t state, void * p_context)
+{
+ switch (state)
+ {
+ case NRF_SDH_EVT_STATE_ENABLED:
+ nrf_drv_power_on_sd_enable();
+ break;
+
+ case NRF_SDH_EVT_STATE_DISABLED:
+ nrf_drv_power_on_sd_disable();
+ break;
+
+ default:
+ break;
+ }
+}
+
+#endif // SOFTDEVICE_PRESENT
+#endif //POWER_ENABLED
diff --git a/third_party/NordicSemiconductor/drivers/power/nrf_drv_power.h b/third_party/NordicSemiconductor/drivers/power/nrf_drv_power.h
index 1709527..105dda2 100644
--- a/third_party/NordicSemiconductor/drivers/power/nrf_drv_power.h
+++ b/third_party/NordicSemiconductor/drivers/power/nrf_drv_power.h
@@ -1,232 +1,232 @@
-/**
- * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#ifndef NRF_DRV_POWER_H__
-#define NRF_DRV_POWER_H__
-
-#include <nrfx_power.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @defgroup nrf_drv_power POWER driver - legacy layer
- * @{
- * @ingroup nrf_power
- *
- * @brief Layer providing compatibility with the former API.
- */
-
-/** @brief Type definition for forwarding the new implementation. */
-typedef nrfx_power_config_t nrf_drv_power_config_t;
-/** @brief Type definition for forwarding the new implementation. */
-typedef nrfx_power_pofwarn_config_t nrf_drv_power_pofwarn_config_t;
-#if NRF_POWER_HAS_SLEEPEVT || defined(__SDK_DOXYGEN__)
-/** @brief Type definition for forwarding the new implementation. */
-typedef nrfx_power_sleepevt_config_t nrf_drv_power_sleepevt_config_t;
-#endif
-#if NRF_POWER_HAS_USBREG || defined(__SDK_DOXYGEN__)
-/** @brief Type definition for forwarding the new implementation. */
-typedef nrfx_power_usbevt_config_t nrf_drv_power_usbevt_config_t;
-#endif
-
-/** @brief Macro for forwarding the new implementation. */
-#define NRF_DRV_POWER_MODE_CONSTLAT NRFX_POWER_MODE_CONSTLAT
-/** @brief Macro for forwarding the new implementation. */
-#define NRF_DRV_POWER_MODE_LOWPWR NRFX_POWER_MODE_LOWPWR
-/** @brief Macro for forwarding the new implementation. */
-#define nrf_drv_power_mode_t nrfx_power_mode_t
-/** @brief Macro for forwarding the new implementation. */
-#define NRF_DRV_POWER_SLEEP_EVT_ENTER NRFX_POWER_SLEEP_EVT_ENTER
-/** @brief Macro for forwarding the new implementation. */
-#define NRF_DRV_POWER_SLEEP_EVT_EXIT NRFX_POWER_SLEEP_EVT_EXIT
-/** @brief Macro for forwarding the new implementation. */
-#define nrf_drv_power_sleep_evt_t nrfx_power_sleep_evt_t
-/** @brief Macro for forwarding the new implementation. */
-#define NRF_DRV_POWER_USB_EVT_DETECTED NRFX_POWER_USB_EVT_DETECTED
-/** @brief Macro for forwarding the new implementation. */
-#define NRF_DRV_POWER_USB_EVT_REMOVED NRFX_POWER_USB_EVT_REMOVED
-/** @brief Macro for forwarding the new implementation. */
-#define NRF_DRV_POWER_USB_EVT_READY NRFX_POWER_USB_EVT_READY
-/** @brief Macro for forwarding the new implementation. */
-#define nrf_drv_power_usb_evt_t nrfx_power_usb_evt_t
-/** @brief Macro for forwarding the new implementation. */
-#define NRF_DRV_POWER_USB_STATE_DISCONNECTED NRFX_POWER_USB_STATE_DISCONNECTED
-/** @brief Macro for forwarding the new implementation. */
-#define NRF_DRV_POWER_USB_STATE_CONNECTED NRFX_POWER_USB_STATE_CONNECTED
-/** @brief Macro for forwarding the new implementation. */
-#define NRF_DRV_POWER_USB_STATE_READY NRFX_POWER_USB_STATE_READY
-/** @brief Macro for forwarding the new implementation. */
-#define nrf_drv_power_usb_state_t nrfx_power_usb_state_t
-/** @brief Macro for forwarding the new implementation. */
-#define nrf_drv_power_pofwarn_event_handler_t nrfx_power_pofwarn_event_handler_t
-/** @brief Macro for forwarding the new implementation. */
-#define nrf_drv_power_sleep_event_handler_t nrfx_power_sleep_event_handler_t
-/** @brief Macro for forwarding the new implementation. */
-#define nrf_drv_power_usb_event_handler_t nrfx_power_usb_event_handler_t
-
-/** @brief Macro for forwarding the new implementation. */
-#define nrf_drv_power_usbstatus_get nrfx_power_usbstatus_get
-
-/**
- * @brief Function for checking if driver is already initialized
- *
- * This function is used to check whether common POWER_CLOCK interrupt
- * should be disabled or not if @ref nrf_drv_clock tries to disable the interrupt.
- *
- * @retval true Driver is initialized
- * @retval false Driver is uninitialized
- *
- * @sa nrf_drv_power_uninit
- */
-bool nrf_drv_power_init_check(void);
-
-/**
- * @brief Initialize power module driver
- *
- * Enabled power module driver would process all the interrupts from power system.
- *
- * @param[in] p_config Driver configuration. Can be NULL - the default configuration
- * from @em sdk_config.h file would be used then.
- *
- * @retval NRF_ERROR_INVALID_STATE Power driver has to be enabled
- * before SoftDevice.
- * @retval NRF_ERROR_MODULE_ALREADY_INITIALIZED Module is initialized already.
- * @retval NRF_SUCCESS Successfully initialized.
- */
-ret_code_t nrf_drv_power_init(nrf_drv_power_config_t const * p_config);
-
-/**
- * @brief Unintialize power module driver
- *
- * Disables all the interrupt handling in the module.
- *
- * @sa nrf_drv_power_init
- */
-void nrf_drv_power_uninit(void);
-
-/**
- * @brief Initialize power failure comparator
- *
- * Configures and setups the power failure comparator and enables it.
- *
- * @param[in] p_config Configuration with values and event handler.
- * If event handler is set to NULL, interrupt would be disabled.
- *
- * @retval NRF_ERROR_INVALID_STATE POF is initialized when SD is enabled and
- * the configuration differs from the old one and
- * is not possible to be set using SD interface.
- * @retval NRF_SUCCESS Successfully initialized and configured.
- */
-ret_code_t nrf_drv_power_pof_init(nrf_drv_power_pofwarn_config_t const * p_config);
-
-/**
- * @brief Turn off the power failure comparator
- *
- * Disables and clears the settings of the power failure comparator.
- */
-void nrf_drv_power_pof_uninit(void);
-
-#if NRF_POWER_HAS_SLEEPEVT || defined(__SDK_DOXYGEN__)
-
-/**
- * @brief Initialize sleep entering and exiting events processing
- *
- * Configures and setups the sleep event processing.
- *
- * @param[in] p_config Configuration with values and event handler.
- *
- * @sa nrf_drv_power_sleepevt_uninit
- *
- * @note Sleep events are not available when SoftDevice is enabled.
- * @note If sleep event is enabled when SoftDevice is initialized, sleep events
- * would be automatically disabled - it is the limitation of the
- * SoftDevice itself.
- *
- * @retval NRF_ERROR_INVALID_STATE This event cannot be initialized
- * when SD is enabled.
- * @retval NRF_SUCCESS Successfully initialized and configured.
- */
-ret_code_t nrf_drv_power_sleepevt_init(nrf_drv_power_sleepevt_config_t const * p_config);
-
-/**
- * @brief Uninitialize sleep entering and exiting events processing
- *
- * @sa nrf_drv_power_sleepevt_init
- */
-void nrf_drv_power_sleepevt_uninit(void);
-
-#endif // NRF_POWER_HAS_SLEEPEVT || defined(__SDK_DOXYGEN__)
-
-#if NRF_POWER_HAS_USBREG || defined(__SDK_DOXYGEN__)
-
-/**
- * @brief Initialize USB power event processing
- *
- * Configures and setups the USB power event processing.
- *
- * @param[in] p_config Configuration with values and event handler.
- *
- * @sa nrf_drv_power_usbevt_uninit
- *
- * @retval NRF_ERROR_INVALID_STATE This event cannot be initialized
- * when SD is enabled and SD does not support
- * USB power events.
- * @retval NRF_SUCCESS Successfully initialized and configured.
- */
-ret_code_t nrf_drv_power_usbevt_init(nrf_drv_power_usbevt_config_t const * p_config);
-
-/**
- * @brief Uninitalize USB power event processing
- *
- * @sa nrf_drv_power_usbevt_init
- */
-void nrf_drv_power_usbevt_uninit(void);
-
-#endif // NRF_POWER_HAS_USBREG || defined(__SDK_DOXYGEN__)
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // NRF_DRV_POWER_H__
+/**
+ * Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef NRF_DRV_POWER_H__
+#define NRF_DRV_POWER_H__
+
+#include <nrfx_power.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup nrf_drv_power POWER driver - legacy layer
+ * @{
+ * @ingroup nrf_power
+ *
+ * @brief Layer providing compatibility with the former API.
+ */
+
+/** @brief Type definition for forwarding the new implementation. */
+typedef nrfx_power_config_t nrf_drv_power_config_t;
+/** @brief Type definition for forwarding the new implementation. */
+typedef nrfx_power_pofwarn_config_t nrf_drv_power_pofwarn_config_t;
+#if NRF_POWER_HAS_SLEEPEVT || defined(__SDK_DOXYGEN__)
+/** @brief Type definition for forwarding the new implementation. */
+typedef nrfx_power_sleepevt_config_t nrf_drv_power_sleepevt_config_t;
+#endif
+#if NRF_POWER_HAS_USBREG || defined(__SDK_DOXYGEN__)
+/** @brief Type definition for forwarding the new implementation. */
+typedef nrfx_power_usbevt_config_t nrf_drv_power_usbevt_config_t;
+#endif
+
+/** @brief Macro for forwarding the new implementation. */
+#define NRF_DRV_POWER_MODE_CONSTLAT NRFX_POWER_MODE_CONSTLAT
+/** @brief Macro for forwarding the new implementation. */
+#define NRF_DRV_POWER_MODE_LOWPWR NRFX_POWER_MODE_LOWPWR
+/** @brief Macro for forwarding the new implementation. */
+#define nrf_drv_power_mode_t nrfx_power_mode_t
+/** @brief Macro for forwarding the new implementation. */
+#define NRF_DRV_POWER_SLEEP_EVT_ENTER NRFX_POWER_SLEEP_EVT_ENTER
+/** @brief Macro for forwarding the new implementation. */
+#define NRF_DRV_POWER_SLEEP_EVT_EXIT NRFX_POWER_SLEEP_EVT_EXIT
+/** @brief Macro for forwarding the new implementation. */
+#define nrf_drv_power_sleep_evt_t nrfx_power_sleep_evt_t
+/** @brief Macro for forwarding the new implementation. */
+#define NRF_DRV_POWER_USB_EVT_DETECTED NRFX_POWER_USB_EVT_DETECTED
+/** @brief Macro for forwarding the new implementation. */
+#define NRF_DRV_POWER_USB_EVT_REMOVED NRFX_POWER_USB_EVT_REMOVED
+/** @brief Macro for forwarding the new implementation. */
+#define NRF_DRV_POWER_USB_EVT_READY NRFX_POWER_USB_EVT_READY
+/** @brief Macro for forwarding the new implementation. */
+#define nrf_drv_power_usb_evt_t nrfx_power_usb_evt_t
+/** @brief Macro for forwarding the new implementation. */
+#define NRF_DRV_POWER_USB_STATE_DISCONNECTED NRFX_POWER_USB_STATE_DISCONNECTED
+/** @brief Macro for forwarding the new implementation. */
+#define NRF_DRV_POWER_USB_STATE_CONNECTED NRFX_POWER_USB_STATE_CONNECTED
+/** @brief Macro for forwarding the new implementation. */
+#define NRF_DRV_POWER_USB_STATE_READY NRFX_POWER_USB_STATE_READY
+/** @brief Macro for forwarding the new implementation. */
+#define nrf_drv_power_usb_state_t nrfx_power_usb_state_t
+/** @brief Macro for forwarding the new implementation. */
+#define nrf_drv_power_pofwarn_event_handler_t nrfx_power_pofwarn_event_handler_t
+/** @brief Macro for forwarding the new implementation. */
+#define nrf_drv_power_sleep_event_handler_t nrfx_power_sleep_event_handler_t
+/** @brief Macro for forwarding the new implementation. */
+#define nrf_drv_power_usb_event_handler_t nrfx_power_usb_event_handler_t
+
+/** @brief Macro for forwarding the new implementation. */
+#define nrf_drv_power_usbstatus_get nrfx_power_usbstatus_get
+
+/**
+ * @brief Function for checking if driver is already initialized
+ *
+ * This function is used to check whether common POWER_CLOCK interrupt
+ * should be disabled or not if @ref nrf_drv_clock tries to disable the interrupt.
+ *
+ * @retval true Driver is initialized
+ * @retval false Driver is uninitialized
+ *
+ * @sa nrf_drv_power_uninit
+ */
+bool nrf_drv_power_init_check(void);
+
+/**
+ * @brief Initialize power module driver
+ *
+ * Enabled power module driver would process all the interrupts from power system.
+ *
+ * @param[in] p_config Driver configuration. Can be NULL - the default configuration
+ * from @em sdk_config.h file would be used then.
+ *
+ * @retval NRF_ERROR_INVALID_STATE Power driver has to be enabled
+ * before SoftDevice.
+ * @retval NRF_ERROR_MODULE_ALREADY_INITIALIZED Module is initialized already.
+ * @retval NRF_SUCCESS Successfully initialized.
+ */
+ret_code_t nrf_drv_power_init(nrf_drv_power_config_t const * p_config);
+
+/**
+ * @brief Unintialize power module driver
+ *
+ * Disables all the interrupt handling in the module.
+ *
+ * @sa nrf_drv_power_init
+ */
+void nrf_drv_power_uninit(void);
+
+/**
+ * @brief Initialize power failure comparator
+ *
+ * Configures and setups the power failure comparator and enables it.
+ *
+ * @param[in] p_config Configuration with values and event handler.
+ * If event handler is set to NULL, interrupt would be disabled.
+ *
+ * @retval NRF_ERROR_INVALID_STATE POF is initialized when SD is enabled and
+ * the configuration differs from the old one and
+ * is not possible to be set using SD interface.
+ * @retval NRF_SUCCESS Successfully initialized and configured.
+ */
+ret_code_t nrf_drv_power_pof_init(nrf_drv_power_pofwarn_config_t const * p_config);
+
+/**
+ * @brief Turn off the power failure comparator
+ *
+ * Disables and clears the settings of the power failure comparator.
+ */
+void nrf_drv_power_pof_uninit(void);
+
+#if NRF_POWER_HAS_SLEEPEVT || defined(__SDK_DOXYGEN__)
+
+/**
+ * @brief Initialize sleep entering and exiting events processing
+ *
+ * Configures and setups the sleep event processing.
+ *
+ * @param[in] p_config Configuration with values and event handler.
+ *
+ * @sa nrf_drv_power_sleepevt_uninit
+ *
+ * @note Sleep events are not available when SoftDevice is enabled.
+ * @note If sleep event is enabled when SoftDevice is initialized, sleep events
+ * would be automatically disabled - it is the limitation of the
+ * SoftDevice itself.
+ *
+ * @retval NRF_ERROR_INVALID_STATE This event cannot be initialized
+ * when SD is enabled.
+ * @retval NRF_SUCCESS Successfully initialized and configured.
+ */
+ret_code_t nrf_drv_power_sleepevt_init(nrf_drv_power_sleepevt_config_t const * p_config);
+
+/**
+ * @brief Uninitialize sleep entering and exiting events processing
+ *
+ * @sa nrf_drv_power_sleepevt_init
+ */
+void nrf_drv_power_sleepevt_uninit(void);
+
+#endif // NRF_POWER_HAS_SLEEPEVT || defined(__SDK_DOXYGEN__)
+
+#if NRF_POWER_HAS_USBREG || defined(__SDK_DOXYGEN__)
+
+/**
+ * @brief Initialize USB power event processing
+ *
+ * Configures and setups the USB power event processing.
+ *
+ * @param[in] p_config Configuration with values and event handler.
+ *
+ * @sa nrf_drv_power_usbevt_uninit
+ *
+ * @retval NRF_ERROR_INVALID_STATE This event cannot be initialized
+ * when SD is enabled and SD does not support
+ * USB power events.
+ * @retval NRF_SUCCESS Successfully initialized and configured.
+ */
+ret_code_t nrf_drv_power_usbevt_init(nrf_drv_power_usbevt_config_t const * p_config);
+
+/**
+ * @brief Uninitalize USB power event processing
+ *
+ * @sa nrf_drv_power_usbevt_init
+ */
+void nrf_drv_power_usbevt_uninit(void);
+
+#endif // NRF_POWER_HAS_USBREG || defined(__SDK_DOXYGEN__)
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // NRF_DRV_POWER_H__
diff --git a/third_party/NordicSemiconductor/drivers/radio/README.md b/third_party/NordicSemiconductor/drivers/radio/README.md
deleted file mode 100644
index ec3cb58..0000000
--- a/third_party/NordicSemiconductor/drivers/radio/README.md
+++ /dev/null
@@ -1,3 +0,0 @@
-# nRF 802.15.4 radio driver.
-
-Copy of [the nRF52840 IEEE 802.15.4 radio driver](https://github.com/NordicSemiconductor/nRF-IEEE-802.15.4-radio-driver).
\ No newline at end of file
diff --git a/third_party/NordicSemiconductor/drivers/radio/fem/none/nrf_fem_config.h b/third_party/NordicSemiconductor/drivers/radio/fem/none/nrf_fem_config.h
new file mode 100644
index 0000000..e8daf6c
--- /dev/null
+++ b/third_party/NordicSemiconductor/drivers/radio/fem/none/nrf_fem_config.h
@@ -0,0 +1,61 @@
+/* Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef NRF_FEM_CONFIG_H_
+#define NRF_FEM_CONFIG_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Configuration parameters for pins that enable or disable (or both) either Power Amplifier (PA) or Low Noise Amplifier (LNA).
+ */
+typedef struct
+{
+
+} nrf_fem_gpiote_pin_config_t;
+
+/**
+ * @brief Configuration parameters for the PA/LNA interface.
+ */
+typedef struct
+{
+
+} nrf_fem_interface_config_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* NRF_FEM_CONFIG_H_ */
diff --git a/third_party/NordicSemiconductor/drivers/radio/fem/nrf_fem_control.c b/third_party/NordicSemiconductor/drivers/radio/fem/nrf_fem_control.c
deleted file mode 100644
index 54957c1..0000000
--- a/third_party/NordicSemiconductor/drivers/radio/fem/nrf_fem_control.c
+++ /dev/null
@@ -1,401 +0,0 @@
-/* Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-/**
- * @file
- * This file implements common function for Front End Module control of the nRF 802.15.4 radio driver.
- *
- */
-
-#include "nrf_fem_control_api.h"
-
-#include <assert.h>
-
-#include "compiler_abstraction.h"
-#include "nrf_fem_control_config.h"
-#include "nrf_802154_config.h"
-#include "nrf.h"
-#include "nrf_gpio.h"
-#include "nrf_gpiote.h"
-#include "nrf_ppi.h"
-#include "nrf_radio.h"
-#include "nrf_timer.h"
-
-#define NRF_FEM_TIMER_INSTANCE NRF_802154_TIMER_INSTANCE
-
-#if ENABLE_FEM
-
-static nrf_fem_control_cfg_t m_nrf_fem_control_cfg; /**< FEM controller configuration. */
-
-/** Check whether pin is valid and enabled. */
-static bool pin_is_enabled(nrf_fem_control_pin_t pin)
-{
- switch (pin)
- {
- case NRF_FEM_CONTROL_LNA_PIN:
- return m_nrf_fem_control_cfg.lna_cfg.enable;
-
- case NRF_FEM_CONTROL_PA_PIN:
- return m_nrf_fem_control_cfg.pa_cfg.enable;
-
- case NRF_FEM_CONTROL_ANY_PIN:
- return m_nrf_fem_control_cfg.lna_cfg.enable || m_nrf_fem_control_cfg.pa_cfg.enable;
-
- default:
- assert(false);
- return false;
- }
-}
-
-/**
- * @section GPIO control.
- */
-
-/** Initialize GPIO according to configuration provided. */
-static void gpio_init(void)
-{
- if (m_nrf_fem_control_cfg.pa_cfg.enable)
- {
- nrf_gpio_cfg_output(m_nrf_fem_control_cfg.pa_cfg.gpio_pin);
- nrf_gpio_pin_write(m_nrf_fem_control_cfg.pa_cfg.gpio_pin,
- !m_nrf_fem_control_cfg.pa_cfg.active_high);
- }
-
- if (m_nrf_fem_control_cfg.lna_cfg.enable)
- {
- nrf_gpio_cfg_output(m_nrf_fem_control_cfg.lna_cfg.gpio_pin);
- nrf_gpio_pin_write(m_nrf_fem_control_cfg.lna_cfg.gpio_pin,
- !m_nrf_fem_control_cfg.lna_cfg.active_high);
- }
-}
-
-/** Configure GPIOTE module. */
-static void gpiote_configure(void)
-{
- if (m_nrf_fem_control_cfg.lna_cfg.enable)
- {
- nrf_gpiote_task_configure(m_nrf_fem_control_cfg.lna_gpiote_ch_id,
- m_nrf_fem_control_cfg.lna_cfg.gpio_pin,
- (nrf_gpiote_polarity_t)GPIOTE_CONFIG_POLARITY_None,
- (nrf_gpiote_outinit_t) !m_nrf_fem_control_cfg.lna_cfg.active_high);
-
- nrf_gpiote_task_enable(m_nrf_fem_control_cfg.lna_gpiote_ch_id);
- }
-
- if (m_nrf_fem_control_cfg.pa_cfg.enable)
- {
- nrf_gpiote_task_configure(m_nrf_fem_control_cfg.pa_gpiote_ch_id,
- m_nrf_fem_control_cfg.pa_cfg.gpio_pin,
- (nrf_gpiote_polarity_t)GPIOTE_CONFIG_POLARITY_None,
- (nrf_gpiote_outinit_t) !m_nrf_fem_control_cfg.pa_cfg.active_high);
-
- nrf_gpiote_task_enable(m_nrf_fem_control_cfg.pa_gpiote_ch_id);
- }
-}
-
-/**
- * @section PPI control.
- */
-
-/** Initialize PPI according to configuration provided. */
-static void ppi_init(void)
-{
- /* RADIO DISABLED --> clr LNA & clr PA PPI */
- if (m_nrf_fem_control_cfg.lna_cfg.enable && m_nrf_fem_control_cfg.pa_cfg.enable)
- {
- nrf_ppi_channel_and_fork_endpoint_setup(
- (nrf_ppi_channel_t)m_nrf_fem_control_cfg.ppi_ch_id_clr,
- (uint32_t)(&NRF_RADIO->EVENTS_DISABLED),
- (m_nrf_fem_control_cfg.lna_cfg.active_high ?
- (uint32_t)(&NRF_GPIOTE->TASKS_CLR[m_nrf_fem_control_cfg.lna_gpiote_ch_id]) :
- (uint32_t)(&NRF_GPIOTE->TASKS_SET[m_nrf_fem_control_cfg.lna_gpiote_ch_id])),
- (m_nrf_fem_control_cfg.pa_cfg.active_high ?
- (uint32_t)(&NRF_GPIOTE->TASKS_CLR[m_nrf_fem_control_cfg.pa_gpiote_ch_id]) :
- (uint32_t)(&NRF_GPIOTE->TASKS_SET[m_nrf_fem_control_cfg.pa_gpiote_ch_id])));
- }
- else if (m_nrf_fem_control_cfg.lna_cfg.enable)
- {
- nrf_ppi_channel_endpoint_setup(
- (nrf_ppi_channel_t)m_nrf_fem_control_cfg.ppi_ch_id_clr,
- (uint32_t)(&NRF_RADIO->EVENTS_DISABLED),
- (m_nrf_fem_control_cfg.lna_cfg.active_high ?
- (uint32_t)(&NRF_GPIOTE->TASKS_CLR[m_nrf_fem_control_cfg.lna_gpiote_ch_id]) :
- (uint32_t)(&NRF_GPIOTE->TASKS_SET[m_nrf_fem_control_cfg.lna_gpiote_ch_id])));
- }
- else if (m_nrf_fem_control_cfg.pa_cfg.enable)
- {
- nrf_ppi_channel_endpoint_setup(
- (nrf_ppi_channel_t)m_nrf_fem_control_cfg.ppi_ch_id_clr,
- (uint32_t)(&NRF_RADIO->EVENTS_DISABLED),
- (m_nrf_fem_control_cfg.pa_cfg.active_high ?
- (uint32_t)(&NRF_GPIOTE->TASKS_CLR[m_nrf_fem_control_cfg.pa_gpiote_ch_id]) :
- (uint32_t)(&NRF_GPIOTE->TASKS_SET[m_nrf_fem_control_cfg.pa_gpiote_ch_id])));
- }
- else
- {
- // Intentionally empty
- }
-}
-
-/** Setup PPI to set LNA pin on a timer event. */
-static void ppi_lna_enable_setup(nrf_timer_cc_channel_t timer_cc_channel)
-{
- /* TIMER0->COMPARE --> set LNA PPI */
- nrf_ppi_channel_endpoint_setup(
- (nrf_ppi_channel_t)m_nrf_fem_control_cfg.ppi_ch_id_set,
- (uint32_t)(&NRF_FEM_TIMER_INSTANCE->EVENTS_COMPARE[timer_cc_channel]),
- (m_nrf_fem_control_cfg.lna_cfg.active_high ?
- (uint32_t)(&NRF_GPIOTE->TASKS_SET[m_nrf_fem_control_cfg.lna_gpiote_ch_id]) :
- (uint32_t)(&NRF_GPIOTE->TASKS_CLR[m_nrf_fem_control_cfg.lna_gpiote_ch_id])));
-}
-
-/** Setup PPI to set PA pin on a timer event. */
-static void ppi_pa_enable_setup(nrf_timer_cc_channel_t timer_cc_channel)
-{
- /* TIMER2->COMPARE --> set PA PPI */
- nrf_ppi_channel_endpoint_setup(
- (nrf_ppi_channel_t)m_nrf_fem_control_cfg.ppi_ch_id_set,
- (uint32_t)(&NRF_FEM_TIMER_INSTANCE->EVENTS_COMPARE[timer_cc_channel]),
- (m_nrf_fem_control_cfg.pa_cfg.active_high ?
- (uint32_t)(&NRF_GPIOTE->TASKS_SET[m_nrf_fem_control_cfg.pa_gpiote_ch_id]) :
- (uint32_t)(&NRF_GPIOTE->TASKS_CLR[m_nrf_fem_control_cfg.pa_gpiote_ch_id])));
-}
-
-/**
- * @section FEM API functions.
- */
-
-void nrf_fem_control_cfg_set(const nrf_fem_control_cfg_t * p_cfg)
-{
- m_nrf_fem_control_cfg = *p_cfg;
-
- if (m_nrf_fem_control_cfg.pa_cfg.enable || m_nrf_fem_control_cfg.lna_cfg.enable)
- {
- gpio_init();
- gpiote_configure();
- ppi_init();
-
- nrf_ppi_channel_enable((nrf_ppi_channel_t)m_nrf_fem_control_cfg.ppi_ch_id_clr);
- }
-}
-
-void nrf_fem_control_cfg_get(nrf_fem_control_cfg_t * p_cfg)
-{
- *p_cfg = m_nrf_fem_control_cfg;
-}
-
-void nrf_fem_control_activate(void)
-{
- if (m_nrf_fem_control_cfg.pa_cfg.enable || m_nrf_fem_control_cfg.lna_cfg.enable)
- {
- nrf_ppi_channel_enable((nrf_ppi_channel_t)m_nrf_fem_control_cfg.ppi_ch_id_clr);
- }
-}
-
-void nrf_fem_control_deactivate(void)
-{
- if (m_nrf_fem_control_cfg.pa_cfg.enable || m_nrf_fem_control_cfg.lna_cfg.enable)
- {
- nrf_ppi_channel_disable((nrf_ppi_channel_t)m_nrf_fem_control_cfg.ppi_ch_id_clr);
- nrf_ppi_channel_disable((nrf_ppi_channel_t)m_nrf_fem_control_cfg.ppi_ch_id_set);
- }
-}
-
-void nrf_fem_control_ppi_enable(nrf_fem_control_pin_t pin, nrf_timer_cc_channel_t timer_cc_channel)
-{
- if (pin_is_enabled(pin))
- {
- switch (pin)
- {
- case NRF_FEM_CONTROL_LNA_PIN:
- ppi_lna_enable_setup(timer_cc_channel);
- nrf_ppi_channel_enable((nrf_ppi_channel_t)m_nrf_fem_control_cfg.ppi_ch_id_set);
- break;
-
- case NRF_FEM_CONTROL_PA_PIN:
- ppi_pa_enable_setup(timer_cc_channel);
- nrf_ppi_channel_enable((nrf_ppi_channel_t)m_nrf_fem_control_cfg.ppi_ch_id_set);
- break;
-
- default:
- assert(false);
- break;
- }
- }
-}
-
-void nrf_fem_control_ppi_disable(nrf_fem_control_pin_t pin)
-{
- if (pin_is_enabled(pin))
- {
- nrf_ppi_channel_disable((nrf_ppi_channel_t)m_nrf_fem_control_cfg.ppi_ch_id_set);
- }
-}
-
-uint32_t nrf_fem_control_delay_get(nrf_fem_control_pin_t pin)
-{
- uint32_t target_time = 1;
-
- if (pin_is_enabled(pin))
- {
- switch (pin)
- {
- case NRF_FEM_CONTROL_LNA_PIN:
- target_time = NRF_FEM_RADIO_RX_STARTUP_LATENCY_US - NRF_FEM_LNA_TIME_IN_ADVANCE;
- break;
-
- case NRF_FEM_CONTROL_PA_PIN:
- target_time = NRF_FEM_RADIO_TX_STARTUP_LATENCY_US - NRF_FEM_PA_TIME_IN_ADVANCE;
- break;
-
- default:
- assert(false);
- break;
- }
- }
-
- return target_time;
-}
-
-void nrf_fem_control_pin_clear(void)
-{
- if (pin_is_enabled(NRF_FEM_CONTROL_PA_PIN))
- {
- nrf_gpiote_task_force(m_nrf_fem_control_cfg.pa_gpiote_ch_id,
- (nrf_gpiote_outinit_t) !m_nrf_fem_control_cfg.pa_cfg.active_high);
- }
-
- if (pin_is_enabled(NRF_FEM_CONTROL_LNA_PIN))
- {
- nrf_gpiote_task_force(m_nrf_fem_control_cfg.lna_gpiote_ch_id,
- (nrf_gpiote_outinit_t) !m_nrf_fem_control_cfg.lna_cfg.active_high);
- }
-}
-
-void nrf_fem_control_timer_set(nrf_fem_control_pin_t pin,
- nrf_timer_cc_channel_t timer_cc_channel,
- nrf_timer_short_mask_t short_mask)
-{
- if (pin_is_enabled(pin))
- {
- uint32_t target_time = nrf_fem_control_delay_get(pin);
-
- nrf_timer_shorts_enable(NRF_FEM_TIMER_INSTANCE, short_mask);
- nrf_timer_cc_write(NRF_FEM_TIMER_INSTANCE, timer_cc_channel, target_time);
- }
-}
-
-void nrf_fem_control_timer_reset(nrf_fem_control_pin_t pin, nrf_timer_short_mask_t short_mask)
-{
- if (pin_is_enabled(pin))
- {
- // Anomaly 78: use SHUTDOWN instead of STOP and CLEAR.
- nrf_timer_task_trigger(NRF_FEM_TIMER_INSTANCE, NRF_TIMER_TASK_SHUTDOWN);
- nrf_timer_shorts_disable(NRF_FEM_TIMER_INSTANCE, short_mask);
- }
-}
-
-void nrf_fem_control_ppi_fork_setup(nrf_fem_control_pin_t pin,
- nrf_ppi_channel_t ppi_channel,
- uint32_t task_addr)
-{
- if (pin_is_enabled(pin))
- {
- nrf_ppi_fork_endpoint_setup(ppi_channel, task_addr);
- }
-}
-
-void nrf_fem_control_ppi_task_setup(nrf_fem_control_pin_t pin,
- nrf_ppi_channel_t ppi_channel,
- uint32_t event_addr,
- uint32_t task_addr)
-{
- if (pin_is_enabled(pin))
- {
- nrf_ppi_channel_endpoint_setup(ppi_channel, event_addr, task_addr);
- nrf_ppi_channel_enable(ppi_channel);
- }
-}
-
-void nrf_fem_control_ppi_fork_clear(nrf_fem_control_pin_t pin, nrf_ppi_channel_t ppi_channel)
-{
- if (pin_is_enabled(pin))
- {
- nrf_ppi_fork_endpoint_setup(ppi_channel, 0);
- }
-}
-
-void nrf_fem_control_ppi_pin_task_setup(nrf_ppi_channel_t ppi_channel,
- uint32_t event_addr,
- bool lna_pin_set,
- bool pa_pin_set)
-{
- uint32_t lna_task_addr = 0;
- uint32_t pa_task_addr = 0;
-
- if (m_nrf_fem_control_cfg.lna_cfg.enable)
- {
- if ((lna_pin_set && m_nrf_fem_control_cfg.lna_cfg.active_high) ||
- (!lna_pin_set && !m_nrf_fem_control_cfg.lna_cfg.active_high))
- {
- lna_task_addr =
- (uint32_t)(&NRF_GPIOTE->TASKS_SET[m_nrf_fem_control_cfg.lna_gpiote_ch_id]);
- }
- else
- {
- lna_task_addr =
- (uint32_t)(&NRF_GPIOTE->TASKS_CLR[m_nrf_fem_control_cfg.lna_gpiote_ch_id]);
- }
- }
-
- if (m_nrf_fem_control_cfg.pa_cfg.enable)
- {
- if ((pa_pin_set && m_nrf_fem_control_cfg.pa_cfg.active_high) ||
- (!pa_pin_set && !m_nrf_fem_control_cfg.pa_cfg.active_high))
- {
- pa_task_addr =
- (uint32_t)(&NRF_GPIOTE->TASKS_SET[m_nrf_fem_control_cfg.pa_gpiote_ch_id]);
- }
- else
- {
- pa_task_addr =
- (uint32_t)(&NRF_GPIOTE->TASKS_CLR[m_nrf_fem_control_cfg.pa_gpiote_ch_id]);
- }
- }
-
- if (lna_task_addr != 0 || pa_task_addr != 0)
- {
- nrf_ppi_channel_and_fork_endpoint_setup(ppi_channel, event_addr, lna_task_addr,
- pa_task_addr);
- nrf_ppi_channel_enable(ppi_channel);
- }
-}
-
-#endif // ENABLE_FEM
diff --git a/third_party/NordicSemiconductor/drivers/radio/fem/nrf_fem_control_api.h b/third_party/NordicSemiconductor/drivers/radio/fem/nrf_fem_control_api.h
deleted file mode 100644
index bd6d0ff..0000000
--- a/third_party/NordicSemiconductor/drivers/radio/fem/nrf_fem_control_api.h
+++ /dev/null
@@ -1,272 +0,0 @@
-/* Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-/**
- * @brief Frontend Module control for the nRF 802.15.4 radio driver.
- *
- */
-
-#ifndef NRF_FEM_CONTROL_API_H_
-#define NRF_FEM_CONTROL_API_H_
-
-#include <stdint.h>
-#include <stdbool.h>
-
-#include "nrf_ppi.h"
-#include "nrf_timer.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @section Resource configuration.
- */
-
-#ifdef NRF52811_XXAA
-/** Default Power Amplifier pin. */
-#define NRF_FEM_CONTROL_DEFAULT_PA_PIN 19
-
-/** Default Low Noise Amplifier pin. */
-#define NRF_FEM_CONTROL_DEFAULT_LNA_PIN 20
-
-#else
-
-/** Default Power Amplifier pin. */
-#define NRF_FEM_CONTROL_DEFAULT_PA_PIN 15
-
-/** Default Low Noise Amplifier pin. */
-#define NRF_FEM_CONTROL_DEFAULT_LNA_PIN 16
-#endif
-
-/** Default PPI channel for pin setting. */
-#define NRF_FEM_CONTROL_DEFAULT_SET_PPI_CHANNEL 15
-
-/** Default PPI channel for pin clearing. */
-#define NRF_FEM_CONTROL_DEFAULT_CLR_PPI_CHANNEL 16
-
-/** Default GPIOTE channel for FEM control. */
-#define NRF_FEM_CONTROL_DEFAULT_LNA_GPIOTE_CHANNEL 6
-
-/** Default GPIOTE channel for FEM control. */
-#define NRF_FEM_CONTROL_DEFAULT_PA_GPIOTE_CHANNEL 7
-
-#if ENABLE_FEM
-
-/**
- * @brief Configuration parameters for the Power Amplifier and Low Noise Amplifier.
- */
-typedef struct
-{
- uint8_t enable : 1; /**< Enable/disable this amplifier. */
- uint8_t active_high : 1; /**< GPIO pin active state for this amplifier. */
- uint8_t gpio_pin : 6; /**< GPIO pin to be toggled for this amplifier. */
-} nrf_fem_control_pa_lna_cfg_t;
-
-/**
- * @brief PA & LNA GPIO toggle configuration.
- *
- * This option configures the nRF 802.15.4 radio driver to toggle pins when the radio
- * is active for use with a Power Amplifier or a Low Noise Amplifier, or both.
- *
- * Toggling the pins is achieved by using two PPI channels and a GPIOTE channel.
- * The hardware channel IDs are provided by the application and must be regarded as reserved
- * for as long as any PA/LNA toggling is enabled.
- *
- * @note Changing this configuration while the radio is in use can have undefined
- * consequences and must be avoided by the application.
- */
-typedef struct
-{
- nrf_fem_control_pa_lna_cfg_t pa_cfg; /**< Power Amplifier configuration. */
- nrf_fem_control_pa_lna_cfg_t lna_cfg; /**< Low Noise Amplifier configuration. */
- uint8_t pa_gpiote_ch_id; /**< GPIOTE channel used for the Power Amplifier pin toggling. */
- uint8_t lna_gpiote_ch_id; /**< GPIOTE channel used for the Low Noise Amplifier pin toggling. */
- uint8_t ppi_ch_id_set; /**< PPI channel used for radio Power Amplifier and Low Noise Amplifier pin settings. */
- uint8_t ppi_ch_id_clr; /**< PPI channel used for radio pin clearing. */
-} nrf_fem_control_cfg_t;
-
-/**
- * @brief Hardware pins controlled by the Frontend Module.
- */
-typedef enum
-{
- NRF_FEM_CONTROL_PA_PIN,
- NRF_FEM_CONTROL_LNA_PIN,
- NRF_FEM_CONTROL_ANY_PIN,
-} nrf_fem_control_pin_t;
-
-/**@brief Sets the PA & LNA GPIO toggle configuration.
- *
- * @note Do not call this function when the radio is in use.
- *
- * @param[in] p_cfg Pointer to the PA & LNA GPIO toggle configuration.
- *
- */
-void nrf_fem_control_cfg_set(const nrf_fem_control_cfg_t * p_cfg);
-
-/**@brief Gets the PA & LNA GPIO toggle configuration.
- *
- * @param[out] p_cfg Pointer to the structure for the PA & LNA GPIO toggle configuration.
- *
- */
-void nrf_fem_control_cfg_get(nrf_fem_control_cfg_t * p_cfg);
-
-/**@brief Activates the Frontend Module controller.
- *
- * This function is to be called when the radio wakes up.
- */
-void nrf_fem_control_activate(void);
-
-/**@brief Deactivates the Frontend Module controller.
- *
- * This function is to be called when the radio goes to sleep.
- */
-void nrf_fem_control_deactivate(void);
-
-/**@brief Configures PPI to activate one of the Frontend Module pins on an appropriate timer event.
- *
- * @param[in] pin Pin controlled by Frontend Module to be connected to the PPI.
- * @param[in] timer_cc_channel Timer CC channel that triggers the @p pin activation through the PPI.
- *
- */
-void nrf_fem_control_ppi_enable(nrf_fem_control_pin_t pin, nrf_timer_cc_channel_t timer_cc_channel);
-
-/**@brief Clears the PPI configuration used to activate one of Frontend Module pins.
- *
- * @param[in] pin Pin controlled by Frontend Module to be disconnected from the PPI.
- *
- */
-void nrf_fem_control_ppi_disable(nrf_fem_control_pin_t pin);
-
-/**@brief Calculates the target time for a timer that activates one of the Frontend Module pins.
- *
- * @param[in] pin Pin controlled by Frontend Module that is to be activated.
- *
- * @returns Activation delay of @p pin in microseconds.
- *
- */
-uint32_t nrf_fem_control_delay_get(nrf_fem_control_pin_t pin);
-
-/**@brief Clears the Power Amplifier and the Low Noise Amplifier pins immediately.
- *
- */
-void nrf_fem_control_pin_clear(void);
-
-/**@brief Configures and sets a timer for activation of one of the Frontend Module pins.
- *
- * @param[in] pin Pin controlled by Frontend Module to be activated.
- * @param[in] timer_cc_channel Timer CC channel to be set.
- * @param[in] short_mask Mask of timer shortcuts to be enabled.
- *
- */
-void nrf_fem_control_timer_set(nrf_fem_control_pin_t pin,
- nrf_timer_cc_channel_t timer_cc_channel,
- nrf_timer_short_mask_t short_mask);
-
-/**@brief Clears the timer configuration after the deactivation of one of the Frontend Module pins.
- *
- * @param[in] pin Pin controlled by Frontend Module to be deactivated.
- * @param[in] short_mask Mask of timer shortcuts to be disabled.
- *
- */
-void nrf_fem_control_timer_reset(nrf_fem_control_pin_t pin, nrf_timer_short_mask_t short_mask);
-
-/**@brief Sets up a PPI fork task necessary for one of the Frontend Module pins.
- *
- * @param[in] pin Pin controlled by Frontend Module that was deactivated.
- * @param[in] ppi_channel PPI channel to connect the fork task to.
- *
- */
-void nrf_fem_control_ppi_fork_setup(nrf_fem_control_pin_t pin,
- nrf_ppi_channel_t ppi_channel,
- uint32_t task_addr);
-
-/**@brief Sets up a PPI task necessary for one of the Frontend Module pins.
- *
- * @param[in] pin Pin controlled by Frontend Module that was deactivated.
- * @param[in] ppi_channel PPI channel to connect the task to.
- * @param[in] event_addr Address of the event to be connected to the PPI.
- * @param[in] task_addr Address of the task to be connected to the PPI.
- *
- */
-void nrf_fem_control_ppi_task_setup(nrf_fem_control_pin_t pin,
- nrf_ppi_channel_t ppi_channel,
- uint32_t event_addr,
- uint32_t task_addr);
-
-/**@brief Clears a PPI fork task configuration for one of the Frontend Module pins.
- *
- * @param[in] pin Pin controlled by Frontend Module that was deactivated.
- * @param[in] ppi_channel PPI channel to disconnect the fork task from.
- *
- */
-void nrf_fem_control_ppi_fork_clear(nrf_fem_control_pin_t pin, nrf_ppi_channel_t ppi_channel);
-
-/**@brief Sets up a PPI task and a PPI fork that set or clear Frontend Module pins on a given event.
- *
- * @param[in] ppi_channel PPI channel to connect the task and fork to.
- * @param[in] event_addr Address of the event to be connected to the PPI.
- * @param[in] lna_pin_set If true, the Low Noise Amplifier pin will be set on @p event_addr.
- * Otherwise, it will be cleared.
- * @param[in] pa_pin_set If true, the Power Amplifier pin will be set on @p event_addr.
- * Otherwise, it will be cleared.
- *
- */
-void nrf_fem_control_ppi_pin_task_setup(nrf_ppi_channel_t ppi_channel,
- uint32_t event_addr,
- bool lna_pin_set,
- bool pa_pin_set);
-
-#else // ENABLE_FEM
-
-#define nrf_fem_control_cfg_set(...)
-#define nrf_fem_control_cfg_get(...)
-#define nrf_fem_control_activate(...)
-#define nrf_fem_control_deactivate(...)
-#define nrf_fem_control_ppi_enable(...)
-#define nrf_fem_control_ppi_disable(...)
-#define nrf_fem_control_delay_get(...) 1
-#define nrf_fem_control_pin_clear(...)
-#define nrf_fem_control_timer_set(...)
-#define nrf_fem_control_timer_reset(...)
-#define nrf_fem_control_ppi_fork_setup(...)
-#define nrf_fem_control_ppi_task_setup(...)
-#define nrf_fem_control_ppi_task_and_fork_setup(...)
-#define nrf_fem_control_ppi_fork_clear(...)
-#define nrf_fem_control_ppi_pin_task_setup(...)
-
-#endif // ENABLE_FEM
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* NRF_FEM_CONTROL_API_H_ */
diff --git a/third_party/NordicSemiconductor/drivers/radio/fem/nrf_fem_control_config.h b/third_party/NordicSemiconductor/drivers/radio/fem/nrf_fem_control_config.h
index 25f965b..6c93bba 100644
--- a/third_party/NordicSemiconductor/drivers/radio/fem/nrf_fem_control_config.h
+++ b/third_party/NordicSemiconductor/drivers/radio/fem/nrf_fem_control_config.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
+/* Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -31,37 +31,74 @@
#ifndef NRF_FEM_CONTROL_CONFIG_H_
#define NRF_FEM_CONTROL_CONFIG_H_
+#if ENABLE_FEM
+#include "nrf_fem_config.h"
+#endif // ENABLE_FEM
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "nrf_error.h"
+
#ifdef __cplusplus
extern "C" {
#endif
/**
- * @section Timings.
+ * @section Configuration
*/
-/** Time in microseconds when PA GPIO is activated before the radio is ready for transmission. */
-#define NRF_FEM_PA_TIME_IN_ADVANCE 23
+#if ENABLE_FEM
-/** Time in microseconds when LNA GPIO is activated before the radio is ready for reception. */
-#define NRF_FEM_LNA_TIME_IN_ADVANCE 5
+/**
+ * @brief Configures the PA and LNA device interface.
+ *
+ * This function sets device interface parameters for the PA/LNA module.
+ * The module can then be used to control a power amplifier or a low noise amplifier (or both) through the given interface and resources.
+ *
+ * The function also sets the PPI and GPIOTE channels to be configured for the PA/LNA interface.
+ *
+ * @param[in] p_config Pointer to the interface parameters for the PA/LNA device.
+ *
+ * @retval ::NRF_SUCCESS PA/LNA control successfully configured.
+ * @retval ::NRF_ERROR_NOT_SUPPORTED PA/LNA is not available.
+ *
+ */
+int32_t nrf_fem_interface_configuration_set(nrf_fem_interface_config_t const * const p_config);
-#if defined(NRF52840_XXAA) || \
- defined(NRF52840_AAAA) || \
- defined(NRF52840_AABA) || \
- defined(NRF52840_AACX) || \
- defined(NRF52811_XXAA)
+/**
+ * @brief Retrieves the configuration of PA and LNA device interface.
+ *
+ * This function gets device interface parameters for the PA/LNA module.
+ * The module can then be used to control a power amplifier or a low noise amplifier (or both) through the given interface and resources.
+ *
+ *
+ * @param[in] p_config Pointer to the interface parameters for the PA/LNA device to be populated.
+ *
+ * @retval ::NRF_SUCCESS PA/LNA control successfully configured.
+ * @retval ::NRF_ERROR_NOT_SUPPORTED PA/LNA is not available.
+ *
+ */
+int32_t nrf_fem_interface_configuration_get(nrf_fem_interface_config_t * p_config);
-/** Radio ramp-up time in TX mode, in microseconds. */
-#define NRF_FEM_RADIO_TX_STARTUP_LATENCY_US 40
+#else // ENABLE_FEM
-/** Radio ramp-up time in RX mode, in microseconds. */
-#define NRF_FEM_RADIO_RX_STARTUP_LATENCY_US 40
+typedef void nrf_fem_interface_config_t;
-#else
+static inline int32_t nrf_fem_interface_configuration_set(
+ nrf_fem_interface_config_t const * const p_config)
+{
+ (void)p_config;
+ return NRF_ERROR_NOT_SUPPORTED;
+}
-#error "Device not supported."
+static inline int32_t nrf_fem_interface_configuration_get(nrf_fem_interface_config_t * p_config)
+{
+ (void)p_config;
+ return NRF_ERROR_NOT_SUPPORTED;
+}
-#endif
+#endif // ENABLE_FEM
#ifdef __cplusplus
}
diff --git a/third_party/NordicSemiconductor/drivers/radio/fem/nrf_fem_protocol_api.h b/third_party/NordicSemiconductor/drivers/radio/fem/nrf_fem_protocol_api.h
new file mode 100644
index 0000000..3c83547
--- /dev/null
+++ b/third_party/NordicSemiconductor/drivers/radio/fem/nrf_fem_protocol_api.h
@@ -0,0 +1,303 @@
+/* Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @brief Protocol interface for Power Amplifier (PA) and Low Noise Amplifier (LNA).
+ *
+ * This module enables toggling of GPIO pins before and after the radio transmission and the radio reception
+ * in order to control a Power Amplifier or a Low Noise Amplifier, or both.
+ *
+ * The application must first provide PA and LNA device-specific configuration parameters to this module.
+ * The protocol must then provide PA and LNA protocol configuration parameters before it can use the functionality.
+ *
+ * When the PA/LNA module is configured, the stack can call the provided enable functions before radio activity
+ * to enable the PA or LNA timer configurations for the upcoming radio activity.
+ * By default, PA/LNA is automatically deactivated on the radio DISABLED event.
+ * This can be disabled, so that a manual deactivation can be performed instead.
+ */
+
+#ifndef NRF_FEM_PROTOCOL_API_H__
+#define NRF_FEM_PROTOCOL_API_H__
+
+#include "nrf_fem_control_config.h"
+#include "nrf_fem_protocol_legacy_api.h"
+
+#include "nrf_error.h"
+#include "nrf_ppi.h"
+#include "nrf_timer.h"
+
+typedef enum
+{
+ NRF_802154_FAL_PA = 1 << 0,
+ NRF_802154_FAL_LNA = 1 << 1,
+ NRF_802154_FAL_ALL = NRF_802154_FAL_PA | NRF_802154_FAL_LNA
+} nrf_fal_functionality_t;
+
+/**
+ * @brief PA and LNA activation event types.
+ */
+typedef enum
+{
+ NRF_802154_FAL_EVENT_TYPE_TIMER,
+ NRF_802154_FAL_EVENT_TYPE_GENERIC,
+ NRF_802154_FAL_EVENT_TYPE_PPI,
+} nrf_802154_fal_event_type_t;
+
+/**
+ * @brief Frontend Abstraction Layer event.
+ *
+ * The event can be a Timer Compare event or an Any event.
+ * Register value is only used for the Timer Compare event and should only contain the timer value relative to the Timer Compare event.
+ */
+typedef struct
+{
+ union
+ {
+ struct
+ {
+ NRF_TIMER_Type * p_timer_instance; /* Pointer to a 1-us resolution timer instance. */
+ uint32_t counter_value; /* Timer value when the radio activity starts. */
+ uint8_t compare_channel_mask; /* Mask of the compare channels that can be used by the FEM to schedule its own tasks. */
+ } timer;
+ struct
+ {
+ uint32_t register_address; /* Address of event register. */
+ } generic;
+ struct
+ {
+ uint8_t ch_id; /* Number of the PPI which was provided. */
+ } ppi;
+ } event;
+ bool override_ppi; /* False to ignore the PPI channel below and use the one set by application. True to use the PPI channel below. */
+ uint8_t ppi_ch_id; /* PPI channel to be used for this event. */
+ nrf_802154_fal_event_type_t type; /* Type of event source. */
+} nrf_802154_fal_event_t;
+
+#if ENABLE_FEM
+
+/**
+ * @brief Sets up PA using the provided events for the upcoming radio transmission.
+ *
+ * Multiple configurations can be provided by repeating calls to this function (that is, you can set the activate and the deactivate events in multiple calls,
+ * and the configuration is preserved between calls).
+ *
+ * If a NRF_802154_PA_LNA_EVENT_TYPE_TIMER timer event is provided, the PA will be configured to activate or deactivate at the application-configured time gap
+ * before the timer instance reaches the given register_value. The time gap is set via @ref nrf_fem_interface_configuration_set.
+ *
+ * If a NRF_802154_PA_LNA_EVENT_TYPE_GENERIC event is provided, the PA will be configured to activate or deactivate when an event occurs.
+ *
+ * The function sets up the PPIs and the GPIOTE channel to activate PA for the upcoming radio transmission.
+ * The PA pin will be active until deactivated, which can happen either by encountering a configured deactivation event or by using @ref nrf_802154_fal_deactivate_now.
+ *
+ * @param[in] p_activate_event Pointer to the activation event structure.
+ * @param[in] p_deactivate_event Pointer to the deactivation event structure.
+ *
+ * @pre To activate PA, nrf_fem_interface_configuration_set() must have been called first.
+ *
+ * @note If a timer event is provided, the caller of this function is responsible for starting the timer and its shorts.
+ * Moreover, the caller is responsible for stopping the timer no earlier than the provided compare channel expires.
+ *
+ * @retval ::NRF_SUCCESS PA activate setup is successful.
+ * @retval ::NRF_ERROR_FORBIDDEN PA is currently disabled.
+ * @retval ::NRF_ERROR_INVALID_STATE PA activate setup could not be performed due to invalid or missing configuration parameters
+ * in p_activate_event or p_deactivate_event, or both.
+ */
+int32_t nrf_802154_fal_pa_configuration_set(const nrf_802154_fal_event_t * const p_activate_event,
+ const nrf_802154_fal_event_t * const p_deactivate_event);
+
+/**
+ * @brief Clears up the configuration provided by the @ref nrf_802154_fal_pa_configuration_set function.
+ *
+ * @param[in] p_activate_event Pointer to the activation event structure.
+ * @param[in] p_deactivate_event Pointer to the deactivation event structure.
+ *
+ * @retval ::NRF_SUCCESS PA activate setup purge is successful.
+ * @retval ::NRF_ERROR_FORBIDDEN PA is currently disabled.
+ * @retval ::NRF_ERROR_INVALID_STATE PA activate setup purge could not be performed due to invalid or missing configuration parameters
+ * in p_activate_event or p_deactivate_event, or both.
+ */
+int32_t nrf_802154_fal_pa_configuration_clear(const nrf_802154_fal_event_t * const p_activate_event,
+ const nrf_802154_fal_event_t * const p_deactivate_event);
+
+/**
+ * @brief Sets up LNA using the provided event for the upcoming radio reception.
+ *
+ * Multiple configurations can be provided by repeating calls to this function (that is, you can set the activate and the deactivate event in multiple calls,
+ * and the configuration is preserved between calls).
+ *
+ * If a NRF_802154_PA_LNA_EVENT_TYPE_TIMER timer event is provided, the LNA will be configured to activate or deactivate at the application-configured time gap
+ * before the timer instance reaches the given register_value. The time gap is set via @ref nrf_fem_interface_configuration_set.
+ *
+ * If a NRF_802154_PA_LNA_EVENT_TYPE_GENERIC event is provided, the LNA will be configured to activate or deactivate when an event occurs.
+ *
+ * The function sets up the PPIs and the GPIOTE channel to activate LNA for the upcoming radio transmission.
+ * The LNA pin will be active until deactivated, which can happen either by encountering a configured deactivation event or by using @ref nrf_802154_fal_deactivate_now.
+ *
+ * @param[in] p_activate_event Pointer to the activation event structure.
+ * @param[in] p_deactivate_event Pointer to the deactivation event structure.
+ *
+ * @pre To activate LNA, nrf_fem_interface_configuration_set() must have been called first.
+ *
+ * @note If a timer event is provided, the caller of this function is responsible for starting the timer and its shorts.
+ * Moreover, the caller is responsible for stopping the timer no earlier than the provided compare channel expires.
+ *
+ * @retval ::NRF_SUCCESS LNA activate setup is successful.
+ * @retval ::NRF_ERROR_FORBIDDEN LNA is currently disabled.
+ * @retval ::NRF_ERROR_INVALID_STATE LNA activate setup could not be performed due to invalid or missing configuration parameters
+ * in p_activate_event or p_deactivate_event, or both.
+ */
+int32_t nrf_802154_fal_lna_configuration_set(const nrf_802154_fal_event_t * const p_activate_event,
+ const nrf_802154_fal_event_t * const p_deactivate_event);
+
+/**
+ * @brief Clears up the configuration provided by the @ref nrf_802154_fal_lna_configuration_set function.
+ *
+ * @param[in] p_activate_event Pointer to the activation event structure.
+ * @param[in] p_deactivate_event Pointer to the deactivation event structure.
+ *
+ * @retval ::NRF_SUCCESS LNA activate setup purge is successful.
+ * @retval ::NRF_ERROR_FORBIDDEN LNA is currently disabled.
+ * @retval ::NRF_ERROR_INVALID_STATE LNA activate setup purge could not be performed due to invalid or missing configuration parameters
+ * in p_activate_event or p_deactivate_event, or both.
+ */
+int32_t nrf_802154_fal_lna_configuration_clear(
+ const nrf_802154_fal_event_t * const p_activate_event,
+ const nrf_802154_fal_event_t * const p_deactivate_event);
+
+/**
+ * @brief Deactivates PA/LNA pins with immediate effect.
+ */
+void nrf_802154_fal_deactivate_now(nrf_fal_functionality_t type);
+
+/**
+ * @brief Cleans up the configured PA/LNA timer/radio instance and resources of PPI and GPIOTE.
+ * The function resets the hardware that has been set up for the PA/LNA activation. The PA and LNA module control configuration parameters are not deleted.
+ * The function is intended to be called after the radio disable signal.
+ */
+void nrf_802154_fal_cleanup(void);
+
+/**
+ * @brief Checks if the PA signaling is configured and enabled, and gets the configured gain in dB.
+ *
+ * @param[out] p_gain The configured gain in dB if PA is configured and enabled.
+ If there is no PA present or the PA does not affect the signal gain, returns 0 dB.
+ *
+ */
+void nrf_802154_fal_pa_is_configured(int8_t * const p_gain);
+
+/**
+ * @brief Prepares the FEM module to switch to the Power Down state.
+ *
+ * @param[in] p_instance Timer instance that is used to schedule the transition to the Power Down state.
+ * @param[in] compare_channel Compare channel to hold a value for the timer.
+ * @param[in] ppi_id ID of the PPI channel used to switch to the Power Down state.
+ *
+ * @return bool Whether the scheduling of the transition was successful or not.
+ *
+ */
+bool nrf_fem_prepare_powerdown(NRF_TIMER_Type * p_instance,
+ uint32_t compare_channel,
+ nrf_ppi_channel_t ppi_id);
+
+#else // ENABLE_FEM
+
+static inline int32_t nrf_802154_fal_pa_configuration_set(
+ const nrf_802154_fal_event_t * const p_activate_event,
+ const nrf_802154_fal_event_t * const p_deactivate_event)
+{
+ (void)p_activate_event;
+ (void)p_deactivate_event;
+ return NRF_ERROR_FORBIDDEN;
+}
+
+static inline int32_t nrf_802154_fal_pa_configuration_clear(
+ const nrf_802154_fal_event_t * const p_activate_event,
+ const nrf_802154_fal_event_t * const p_deactivate_event)
+{
+ (void)p_activate_event;
+ (void)p_deactivate_event;
+ return NRF_ERROR_FORBIDDEN;
+}
+
+static inline int32_t nrf_802154_fal_lna_configuration_set(
+ const nrf_802154_fal_event_t * const p_activate_event,
+ const nrf_802154_fal_event_t * const p_deactivate_event)
+{
+ (void)p_activate_event;
+ (void)p_deactivate_event;
+ return NRF_ERROR_FORBIDDEN;
+}
+
+static inline int32_t nrf_802154_fal_lna_configuration_clear(
+ const nrf_802154_fal_event_t * const p_activate_event,
+ const nrf_802154_fal_event_t * const p_deactivate_event)
+{
+ (void)p_activate_event;
+ (void)p_deactivate_event;
+ return NRF_ERROR_FORBIDDEN;
+}
+
+static inline void nrf_802154_fal_deactivate_now(nrf_fal_functionality_t type)
+{
+ (void)type;
+}
+
+static inline void nrf_802154_fal_cleanup(void)
+{
+
+}
+
+static inline bool nrf_fem_prepare_powerdown(NRF_TIMER_Type * p_instance,
+ uint32_t compare_channel,
+ nrf_ppi_channel_t ppi_id)
+{
+ (void)p_instance;
+ (void)compare_channel;
+ (void)ppi_id;
+ return false;
+}
+
+static inline void nrf_802154_fal_pa_is_configured(int8_t * const p_gain)
+{
+ *p_gain = 0;
+}
+
+#define NRF_802154_FEM_PINS_USED_MASK 0
+#define NRF_802154_FEM_PPI_CHANNELS_USED_MASK 0
+#define NRF_802154_FEM_GPIOTE_CHANNELS_USED_MASK 0
+
+#endif // ENABLE_FEM
+
+#endif // NRF_FEM_PROTOCOL_API_H__
+
+/**
+ @}
+ @}
+ */
diff --git a/third_party/NordicSemiconductor/drivers/radio/fem/nrf_fem_protocol_legacy_api.h b/third_party/NordicSemiconductor/drivers/radio/fem/nrf_fem_protocol_legacy_api.h
new file mode 100644
index 0000000..0411577
--- /dev/null
+++ b/third_party/NordicSemiconductor/drivers/radio/fem/nrf_fem_protocol_legacy_api.h
@@ -0,0 +1,63 @@
+/* Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <stdint.h>
+
+/**
+ * @brief Configuration parameters for PA and LNA.
+ */
+typedef struct
+{
+ uint8_t enable : 1; /**< Enable toggling for this amplifier. */
+ uint8_t active_high : 1; /**< Set the pin to be active high. */
+ uint8_t gpio_pin : 6; /**< The GPIO pin to be toggled for this amplifier. */
+} nrf_fem_control_pa_lna_cfg_t;
+
+/**
+ * @brief PA and LNA GPIO toggle configuration.
+ *
+ * This option configures the nRF 802.15.4 radio driver to toggle pins when the radio
+ * is active and ready for use with a Power Amplifier (PA) or a Low Noise Amplifier (LNA), or both.
+ *
+ * Pins can be toggled by using two PPI channels and a GPIOTE channel. The hardware channel IDs are provided
+ * by the application and are to be regarded as reserved for as long as there is no PA/LNA toggling enabled.
+ *
+ * @note Avoid changing this configuration while the radio is in use, as this can lead to undefined consequences.
+ *
+ */
+typedef struct
+{
+ nrf_fem_control_pa_lna_cfg_t pa_cfg; /**< Power Amplifier configuration. */
+ nrf_fem_control_pa_lna_cfg_t lna_cfg; /**< Low Noise Amplifier configuration. */
+ uint8_t pa_gpiote_ch_id; /**< GPIOTE channel used for Power Amplifier pin toggling. */
+ uint8_t lna_gpiote_ch_id; /**< GPIOTE channel used for Low Noise Amplifier pin toggling. */
+ uint8_t ppi_ch_id_set; /**< PPI channel used for radio Power Amplifier and Low Noise Amplifier pins setting. */
+ uint8_t ppi_ch_id_clr; /**< PPI channel used for radio pin clearing. */
+} nrf_fem_control_cfg_t;
diff --git a/third_party/NordicSemiconductor/drivers/radio/fem/simple_gpio/nrf_fem_config.h b/third_party/NordicSemiconductor/drivers/radio/fem/simple_gpio/nrf_fem_config.h
new file mode 100644
index 0000000..aa16f06
--- /dev/null
+++ b/third_party/NordicSemiconductor/drivers/radio/fem/simple_gpio/nrf_fem_config.h
@@ -0,0 +1,127 @@
+/* Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef NRF_FEM_CONFIG_H_
+#define NRF_FEM_CONFIG_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Configuration parameters for pins that enable or disable (or both) either Power Amplifier (PA) or Low Noise Amplifier (LNA).
+ */
+typedef struct
+{
+ bool enable; /* Enable toggling for this pin. */
+ bool active_high; /* If true, the pin will be active high. Otherwise, the pin will be active low. */
+ uint8_t gpio_pin; /* GPIO pin number for the pin. */
+ uint8_t gpiote_ch_id; /* GPIOTE channel to be used for toggling pins. */
+} nrf_fem_gpiote_pin_config_t;
+
+/**
+ * @brief Configuration parameters for the PA/LNA interface.
+ */
+typedef struct
+{
+ struct
+ {
+ uint32_t pa_time_gap_us; /* Time between the activation of the PA pin and the start of the radio transmission. */
+ uint32_t lna_time_gap_us; /* Time between the activation of the LNA pin and the start of the radio reception. */
+ int8_t pa_gain_db; /* Configurable PA gain. Ignored if the amplifier is not supporting this feature. */
+ int8_t lna_gain_db; /* Configurable LNA gain. Ignored if the amplifier is not supporting this feature. */
+ } fem_config;
+
+ nrf_fem_gpiote_pin_config_t pa_pin_config; /* Power Amplifier pin configuration. */
+ nrf_fem_gpiote_pin_config_t lna_pin_config; /* Low Noise Amplifier pin configuration. */
+
+ uint8_t ppi_ch_id_set; /* PPI channel to be used for setting pins. */
+ uint8_t ppi_ch_id_clr; /* PPI channel to be used for clearing pins. */
+} nrf_fem_interface_config_t;
+
+/**
+ * @section Timings.
+ */
+
+/** Time in microseconds when PA GPIO is activated before the radio is ready for transmission. */
+#define NRF_FEM_PA_TIME_IN_ADVANCE_US 23
+
+/** Time in microseconds when LNA GPIO is activated before the radio is ready for reception. */
+#define NRF_FEM_LNA_TIME_IN_ADVANCE_US 5
+
+#ifdef NRF52811_XXAA
+/** Default Power Amplifier pin. */
+#define NRF_FEM_CONTROL_DEFAULT_PA_PIN 19
+
+/** Default Low Noise Amplifier pin. */
+#define NRF_FEM_CONTROL_DEFAULT_LNA_PIN 20
+
+#else
+
+/** Default Power Amplifier pin. */
+#define NRF_FEM_CONTROL_DEFAULT_PA_PIN 15
+
+/** Default Low Noise Amplifier pin. */
+#define NRF_FEM_CONTROL_DEFAULT_LNA_PIN 16
+#endif
+
+/** Default PPI channel for pin setting. */
+#define NRF_FEM_CONTROL_DEFAULT_SET_PPI_CHANNEL 15
+
+/** Default PPI channel for pin clearing. */
+#define NRF_FEM_CONTROL_DEFAULT_CLR_PPI_CHANNEL 16
+
+/** Default GPIOTE channel for FEM control. */
+#define NRF_FEM_CONTROL_DEFAULT_LNA_GPIOTE_CHANNEL 6
+
+/** Default GPIOTE channel for FEM control. */
+#define NRF_FEM_CONTROL_DEFAULT_PA_GPIOTE_CHANNEL 7
+
+/** Mask of GPIO pins used for FEM control. */
+#define NRF_802154_FEM_PINS_USED_MASK ((1 << NRF_FEM_CONTROL_DEFAULT_PA_PIN) | \
+ (1 << NRF_FEM_CONTROL_DEFAULT_LNA_PIN))
+
+/** Mask of PPI channels used for FEM control. */
+#define NRF_802154_FEM_PPI_CHANNELS_USED_MASK ((1 << NRF_FEM_CONTROL_DEFAULT_SET_PPI_CHANNEL) | \
+ (1 << NRF_FEM_CONTROL_DEFAULT_CLR_PPI_CHANNEL))
+
+/** Mask of GPIOTE channels used for FEM control. */
+#define NRF_802154_FEM_GPIOTE_CHANNELS_USED_MASK ( \
+ (1 << NRF_FEM_CONTROL_DEFAULT_LNA_GPIOTE_CHANNEL) | \
+ (1 << NRF_FEM_CONTROL_DEFAULT_PA_GPIOTE_CHANNEL))
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* NRF_FEM_CONFIG_H_ */
diff --git a/third_party/NordicSemiconductor/drivers/radio/fem/simple_gpio/nrf_fem_simple_gpio.c b/third_party/NordicSemiconductor/drivers/radio/fem/simple_gpio/nrf_fem_simple_gpio.c
new file mode 100644
index 0000000..62ba56c
--- /dev/null
+++ b/third_party/NordicSemiconductor/drivers/radio/fem/simple_gpio/nrf_fem_simple_gpio.c
@@ -0,0 +1,470 @@
+/* Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @file
+ * This file implements common function for Front End Module control of the nRF 802.15.4 radio driver.
+ *
+ */
+#include "nrf_fem_protocol_api.h"
+
+#include <assert.h>
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "compiler_abstraction.h"
+#include "nrf_802154_config.h"
+#include "nrf.h"
+#include "nrf_error.h"
+#include "nrf_gpio.h"
+#include "nrf_gpiote.h"
+#include "nrf_ppi.h"
+#include "nrf_radio.h"
+#include "nrf_timer.h"
+
+#if ENABLE_FEM
+
+#define PPI_INVALID_CHANNEL 0xFF /**< Default value for the PPI holder variable. */
+
+static nrf_fem_interface_config_t m_nrf_fem_interface_config = /**< FEM controller configuration. */
+{
+ .fem_config =
+ {
+ .pa_time_gap_us = NRF_FEM_PA_TIME_IN_ADVANCE_US,
+ .lna_time_gap_us = NRF_FEM_LNA_TIME_IN_ADVANCE_US
+ },
+ .pa_pin_config =
+ {
+ .enable = 1,
+ .active_high = 1,
+ .gpio_pin = NRF_FEM_CONTROL_DEFAULT_PA_PIN,
+ .gpiote_ch_id = NRF_FEM_CONTROL_DEFAULT_PA_GPIOTE_CHANNEL
+ },
+ .lna_pin_config =
+ {
+ .enable = 1,
+ .active_high = 1,
+ .gpio_pin = NRF_FEM_CONTROL_DEFAULT_LNA_PIN,
+ .gpiote_ch_id = NRF_FEM_CONTROL_DEFAULT_LNA_GPIOTE_CHANNEL
+ },
+ .ppi_ch_id_set = NRF_FEM_CONTROL_DEFAULT_SET_PPI_CHANNEL,
+ .ppi_ch_id_clr = NRF_FEM_CONTROL_DEFAULT_CLR_PPI_CHANNEL
+};
+static uint8_t m_ppi_channel_ext = PPI_INVALID_CHANNEL; /**< PPI channel provided by the `override_ppi = true` functionality. */
+
+/** Map the mask bits with the Compare Channels. */
+static uint32_t get_first_available_compare_channel(uint8_t mask)
+{
+ if (mask & (1 << 0))
+ return NRF_TIMER_CC_CHANNEL0;
+ if (mask & (1 << 1))
+ return NRF_TIMER_CC_CHANNEL1;
+ if (mask & (1 << 2))
+ return NRF_TIMER_CC_CHANNEL2;
+ if (mask & (1 << 3))
+ return NRF_TIMER_CC_CHANNEL3;
+ assert(false);
+ return 0;
+}
+
+/** Configure GPIOTE module. */
+static void gpiote_configure(void)
+{
+ if (m_nrf_fem_interface_config.pa_pin_config.enable)
+ {
+ nrf_gpiote_task_configure(m_nrf_fem_interface_config.pa_pin_config.gpiote_ch_id,
+ m_nrf_fem_interface_config.pa_pin_config.gpio_pin,
+ (nrf_gpiote_polarity_t)GPIOTE_CONFIG_POLARITY_None,
+ (nrf_gpiote_outinit_t) !m_nrf_fem_interface_config.pa_pin_config.active_high);
+
+ nrf_gpiote_task_enable(m_nrf_fem_interface_config.pa_pin_config.gpiote_ch_id);
+ }
+
+ if (m_nrf_fem_interface_config.lna_pin_config.enable)
+ {
+ nrf_gpiote_task_configure(m_nrf_fem_interface_config.lna_pin_config.gpiote_ch_id,
+ m_nrf_fem_interface_config.lna_pin_config.gpio_pin,
+ (nrf_gpiote_polarity_t)GPIOTE_CONFIG_POLARITY_None,
+ (nrf_gpiote_outinit_t) !m_nrf_fem_interface_config.lna_pin_config.active_high);
+
+ nrf_gpiote_task_enable(m_nrf_fem_interface_config.lna_pin_config.gpiote_ch_id);
+ }
+}
+
+/** Configure the event with the provided values. */
+static int32_t event_configuration_set(const nrf_802154_fal_event_t * const p_event,
+ nrf_fem_gpiote_pin_config_t * p_pin_config,
+ bool activate,
+ uint32_t time_delay)
+{
+ uint32_t task_addr;
+ uint8_t ppi_ch;
+
+ assert(p_event);
+ assert(p_pin_config);
+
+ if (p_event->override_ppi)
+ {
+ assert(p_event->ppi_ch_id != PPI_INVALID_CHANNEL);
+ if (m_ppi_channel_ext == PPI_INVALID_CHANNEL)
+ {
+ /* External PPI channel placeholder is free. */
+ m_ppi_channel_ext = ppi_ch = p_event->ppi_ch_id;
+ }
+ else if ((m_ppi_channel_ext == p_event->ppi_ch_id) &&
+ (!NRF_PPI->FORK[(uint32_t)m_ppi_channel_ext].TEP))
+ {
+ /* PPI is equal to the already set, but the one set has a free fork endpoint. */
+ ppi_ch = p_event->ppi_ch_id;
+ }
+ else
+ {
+ return NRF_ERROR_INVALID_STATE;
+ }
+ }
+ else
+ {
+ ppi_ch =
+ activate ? m_nrf_fem_interface_config.ppi_ch_id_set : m_nrf_fem_interface_config.
+ ppi_ch_id_clr;
+ }
+
+ if (p_pin_config->active_high ^ activate)
+ {
+ task_addr = (uint32_t)(&NRF_GPIOTE->TASKS_CLR[p_pin_config->gpiote_ch_id]);
+ }
+ else
+ {
+ task_addr = (uint32_t)(&NRF_GPIOTE->TASKS_SET[p_pin_config->gpiote_ch_id]);
+ }
+
+ switch (p_event->type)
+ {
+ case NRF_802154_FAL_EVENT_TYPE_GENERIC:
+ {
+ if (NRF_PPI->CH[(uint32_t)ppi_ch].TEP)
+ {
+ nrf_ppi_fork_endpoint_setup((nrf_ppi_channel_t)ppi_ch, task_addr);
+ }
+ else
+ {
+ nrf_ppi_channel_endpoint_setup((nrf_ppi_channel_t)ppi_ch,
+ p_event->event.generic.register_address,
+ task_addr);
+ }
+
+ nrf_ppi_channel_enable((nrf_ppi_channel_t)ppi_ch);
+ }
+ break;
+
+ case NRF_802154_FAL_EVENT_TYPE_TIMER:
+ {
+ assert(p_event->event.timer.compare_channel_mask);
+
+ uint32_t compare_channel = get_first_available_compare_channel(
+ p_event->event.timer.compare_channel_mask);
+
+ nrf_ppi_channel_endpoint_setup((nrf_ppi_channel_t)ppi_ch,
+ (uint32_t)(&(p_event->event.timer.p_timer_instance->
+ EVENTS_COMPARE[compare_channel])),
+ task_addr);
+ nrf_ppi_channel_enable((nrf_ppi_channel_t)ppi_ch);
+
+ nrf_timer_cc_write(p_event->event.timer.p_timer_instance,
+ (nrf_timer_cc_channel_t)compare_channel,
+ p_event->event.timer.counter_value - time_delay);
+ }
+ break;
+
+ default:
+ assert(false);
+ break;
+ }
+
+ return NRF_SUCCESS;
+}
+
+/** Deconfigure the event with the provided values. */
+static int32_t event_configuration_clear(const nrf_802154_fal_event_t * const p_event,
+ bool activate)
+{
+ uint8_t ppi_ch;
+
+ assert(p_event);
+
+ if (p_event->override_ppi)
+ {
+ ppi_ch = p_event->ppi_ch_id;
+ }
+ else
+ {
+ ppi_ch =
+ activate ? m_nrf_fem_interface_config.ppi_ch_id_set : m_nrf_fem_interface_config.
+ ppi_ch_id_clr;
+ }
+
+ nrf_ppi_channel_disable((nrf_ppi_channel_t)ppi_ch);
+ nrf_ppi_channel_endpoint_setup((nrf_ppi_channel_t)ppi_ch, 0, 0);
+ nrf_ppi_fork_endpoint_setup((nrf_ppi_channel_t)ppi_ch, 0);
+
+ switch (p_event->type)
+ {
+ case NRF_802154_FAL_EVENT_TYPE_GENERIC:
+ break;
+
+ case NRF_802154_FAL_EVENT_TYPE_TIMER:
+ break;
+
+ default:
+ assert(false);
+ break;
+ }
+
+ return NRF_SUCCESS;
+}
+
+int32_t nrf_802154_fal_pa_configuration_set(const nrf_802154_fal_event_t * const p_activate_event,
+ const nrf_802154_fal_event_t * const p_deactivate_event)
+{
+ int32_t ret_code;
+
+ if (!m_nrf_fem_interface_config.pa_pin_config.enable)
+ {
+ return NRF_ERROR_FORBIDDEN;
+ }
+
+ if (p_activate_event)
+ {
+ ret_code = event_configuration_set(p_activate_event,
+ &m_nrf_fem_interface_config.pa_pin_config,
+ true,
+ m_nrf_fem_interface_config.fem_config.pa_time_gap_us);
+ if (ret_code != NRF_SUCCESS)
+ {
+ return ret_code;
+ }
+ }
+
+ if (p_deactivate_event)
+ {
+ ret_code = event_configuration_set(p_deactivate_event,
+ &m_nrf_fem_interface_config.pa_pin_config,
+ false,
+ m_nrf_fem_interface_config.fem_config.pa_time_gap_us);
+ if (ret_code != NRF_SUCCESS)
+ {
+ return ret_code;
+ }
+ }
+
+ return NRF_SUCCESS;
+}
+
+int32_t nrf_802154_fal_lna_configuration_set(const nrf_802154_fal_event_t * const p_activate_event,
+ const nrf_802154_fal_event_t * const p_deactivate_event)
+{
+ int32_t ret_code;
+
+ if (!m_nrf_fem_interface_config.lna_pin_config.enable)
+ {
+ return NRF_ERROR_FORBIDDEN;
+ }
+
+ if (p_activate_event)
+ {
+ ret_code = event_configuration_set(p_activate_event,
+ &m_nrf_fem_interface_config.lna_pin_config,
+ true,
+ m_nrf_fem_interface_config.fem_config.lna_time_gap_us);
+ if (ret_code != NRF_SUCCESS)
+ {
+ return ret_code;
+ }
+ }
+
+ if (p_deactivate_event)
+ {
+ ret_code = event_configuration_set(p_deactivate_event,
+ &m_nrf_fem_interface_config.lna_pin_config,
+ false,
+ m_nrf_fem_interface_config.fem_config.lna_time_gap_us);
+ if (ret_code != NRF_SUCCESS)
+ {
+ return ret_code;
+ }
+ }
+
+ return NRF_SUCCESS;
+}
+
+int32_t nrf_802154_fal_pa_configuration_clear(const nrf_802154_fal_event_t * const p_activate_event,
+ const nrf_802154_fal_event_t * const p_deactivate_event)
+{
+ int32_t ret_code;
+
+ if (!m_nrf_fem_interface_config.pa_pin_config.enable)
+ {
+ return NRF_ERROR_FORBIDDEN;
+ }
+
+ if (p_activate_event)
+ {
+ ret_code = event_configuration_clear(p_activate_event, true);
+ if (ret_code != NRF_SUCCESS)
+ {
+ return ret_code;
+ }
+ }
+
+ if (p_deactivate_event)
+ {
+ ret_code = event_configuration_clear(p_deactivate_event, false);
+ if (ret_code != NRF_SUCCESS)
+ {
+ return ret_code;
+ }
+ }
+
+ return NRF_SUCCESS;
+}
+
+int32_t nrf_802154_fal_lna_configuration_clear(
+ const nrf_802154_fal_event_t * const p_activate_event,
+ const nrf_802154_fal_event_t * const p_deactivate_event)
+{
+ int32_t ret_code;
+
+ if (!m_nrf_fem_interface_config.lna_pin_config.enable)
+ {
+ return NRF_ERROR_FORBIDDEN;
+ }
+
+ if (p_activate_event)
+ {
+ ret_code = event_configuration_clear(p_activate_event, true);
+ if (ret_code != NRF_SUCCESS)
+ {
+ return ret_code;
+ }
+ }
+
+ if (p_deactivate_event)
+ {
+ ret_code = event_configuration_clear(p_deactivate_event, false);
+ if (ret_code != NRF_SUCCESS)
+ {
+ return ret_code;
+ }
+ }
+
+ return NRF_SUCCESS;
+}
+
+void nrf_802154_fal_deactivate_now(nrf_fal_functionality_t type)
+{
+ if (m_nrf_fem_interface_config.pa_pin_config.enable && (type & NRF_802154_FAL_PA))
+ {
+ if (m_nrf_fem_interface_config.pa_pin_config.active_high)
+ {
+ nrf_gpiote_task_force(m_nrf_fem_interface_config.pa_pin_config.gpiote_ch_id,
+ NRF_GPIOTE_INITIAL_VALUE_LOW);
+ }
+ else
+ {
+ nrf_gpiote_task_force(m_nrf_fem_interface_config.pa_pin_config.gpiote_ch_id,
+ NRF_GPIOTE_INITIAL_VALUE_HIGH);
+ }
+ }
+
+ if (m_nrf_fem_interface_config.lna_pin_config.enable && (type & NRF_802154_FAL_LNA))
+ {
+ if (m_nrf_fem_interface_config.lna_pin_config.active_high)
+ {
+ nrf_gpiote_task_force(m_nrf_fem_interface_config.lna_pin_config.gpiote_ch_id,
+ NRF_GPIOTE_INITIAL_VALUE_LOW);
+ }
+ else
+ {
+ nrf_gpiote_task_force(m_nrf_fem_interface_config.lna_pin_config.gpiote_ch_id,
+ NRF_GPIOTE_INITIAL_VALUE_HIGH);
+ }
+ }
+}
+
+int32_t nrf_fem_interface_configuration_set(nrf_fem_interface_config_t const * const p_config)
+{
+ m_nrf_fem_interface_config = *p_config;
+
+ if (m_nrf_fem_interface_config.pa_pin_config.enable ||
+ m_nrf_fem_interface_config.lna_pin_config.enable)
+ {
+ gpiote_configure();
+ }
+
+ return NRF_SUCCESS;
+}
+
+int32_t nrf_fem_interface_configuration_get(nrf_fem_interface_config_t * p_config)
+{
+ *p_config = m_nrf_fem_interface_config;
+
+ return NRF_SUCCESS;
+}
+
+void nrf_802154_fal_cleanup(void)
+{
+ nrf_ppi_channel_disable((nrf_ppi_channel_t)m_nrf_fem_interface_config.ppi_ch_id_set);
+ nrf_ppi_channel_endpoint_setup((nrf_ppi_channel_t)m_nrf_fem_interface_config.ppi_ch_id_set, 0,
+ 0);
+ nrf_ppi_fork_endpoint_setup((nrf_ppi_channel_t)m_nrf_fem_interface_config.ppi_ch_id_set, 0);
+ nrf_ppi_channel_disable((nrf_ppi_channel_t)m_nrf_fem_interface_config.ppi_ch_id_clr);
+ nrf_ppi_channel_endpoint_setup((nrf_ppi_channel_t)m_nrf_fem_interface_config.ppi_ch_id_clr, 0,
+ 0);
+ nrf_ppi_fork_endpoint_setup((nrf_ppi_channel_t)m_nrf_fem_interface_config.ppi_ch_id_clr, 0);
+ if (m_ppi_channel_ext != PPI_INVALID_CHANNEL)
+ {
+ nrf_ppi_channel_disable((nrf_ppi_channel_t)m_ppi_channel_ext);
+ nrf_ppi_channel_endpoint_setup((nrf_ppi_channel_t)m_ppi_channel_ext, 0, 0);
+ nrf_ppi_fork_endpoint_setup((nrf_ppi_channel_t)m_ppi_channel_ext, 0);
+ m_ppi_channel_ext = PPI_INVALID_CHANNEL;
+ }
+}
+
+bool nrf_fem_prepare_powerdown(NRF_TIMER_Type * p_instance,
+ uint32_t compare_channel,
+ nrf_ppi_channel_t ppi_id)
+{
+ (void)p_instance;
+ (void)compare_channel;
+ (void)ppi_id;
+ return false;
+}
+
+#endif // ENABLE_FEM
diff --git a/third_party/NordicSemiconductor/drivers/radio/fem/three_pin_gpio/nrf_fem_config.h b/third_party/NordicSemiconductor/drivers/radio/fem/three_pin_gpio/nrf_fem_config.h
new file mode 100644
index 0000000..80cff20
--- /dev/null
+++ b/third_party/NordicSemiconductor/drivers/radio/fem/three_pin_gpio/nrf_fem_config.h
@@ -0,0 +1,149 @@
+/* Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef NRF_FEM_CONFIG_H_
+#define NRF_FEM_CONFIG_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Configuration parameters for pins that enable or disable (or both) either Power Amplifier (PA) or Low Noise Amplifier (LNA).
+ */
+typedef struct
+{
+ bool enable; /* Enable toggling for this pin. */
+ bool active_high; /* If true, the pin will be active high. Otherwise, the pin will be active low. */
+ uint8_t gpio_pin; /* GPIO pin number for the pin. */
+ uint8_t gpiote_ch_id; /* GPIOTE channel to be used for toggling pins. */
+} nrf_fem_gpiote_pin_config_t;
+
+/**
+ * @brief Configuration parameters for the PA/LNA interface.
+ */
+typedef struct
+{
+ struct
+ {
+ uint32_t pa_time_gap_us; /* Time between the activation of the PA pin and the start of the radio transmission. */
+ uint32_t lna_time_gap_us; /* Time between the activation of the LNA pin and the start of the radio reception. */
+ uint32_t pdn_settle_us; /* The time between activating the PDN and asserting the PA/LNA pin. */
+ uint32_t trx_hold_us; /* The time between deasserting the PA/LNA pin and deactivating PDN. */
+ int8_t pa_gain_db; /* Configurable PA gain. Ignored if the amplifier is not supporting this feature. */
+ int8_t lna_gain_db; /* Configurable LNA gain. Ignored if the amplifier is not supporting this feature. */
+ } fem_config;
+
+ nrf_fem_gpiote_pin_config_t pa_pin_config; /* Power Amplifier pin configuration. */
+ nrf_fem_gpiote_pin_config_t lna_pin_config; /* Low Noise Amplifier pin configuration. */
+ nrf_fem_gpiote_pin_config_t pdn_pin_config; /* Power Down pin configuration. */
+
+ uint8_t ppi_ch_id_set; /* PPI channel to be used for setting pins. */
+ uint8_t ppi_ch_id_clr; /* PPI channel to be used for clearing pins. */
+ uint8_t ppi_ch_id_pdn; /* PPI channel to handle PDN pin. */
+} nrf_fem_interface_config_t;
+
+/**
+ * @section Timings.
+ */
+
+/** Time in microseconds when PA GPIO is activated before the radio is ready for transmission. */
+#define NRF_FEM_PA_TIME_IN_ADVANCE_US 13
+
+/** Time in microseconds when LNA GPIO is activated before the radio is ready for reception. */
+#define NRF_FEM_LNA_TIME_IN_ADVANCE_US 13
+
+/** The time between activating the PDN and asserting the RX_EN/TX_EN. */
+#define NRF_FEM_PDN_SETTLE_US 18
+
+/** The time between deasserting the RX_EN/TX_EN and deactivating PDN. */
+#define NRF_FEM_TRX_HOLD_US 5
+
+#ifdef NRF52811_XXAA
+/** Default Power Amplifier pin. */
+#define NRF_FEM_CONTROL_DEFAULT_PA_PIN 19
+
+/** Default Low Noise Amplifier pin. */
+#define NRF_FEM_CONTROL_DEFAULT_LNA_PIN 20
+
+#else
+
+/** Default Power Amplifier pin. */
+#define NRF_FEM_CONTROL_DEFAULT_PA_PIN 15
+
+/** Default Low Noise Amplifier pin. */
+#define NRF_FEM_CONTROL_DEFAULT_LNA_PIN 16
+#endif
+
+/** Default Eagle PDN pin. */
+#define NRF_FEM_CONTROL_DEFAULT_PDN_PIN 24
+
+/** Default PPI channel for pin setting. */
+#define NRF_FEM_CONTROL_DEFAULT_SET_PPI_CHANNEL 15
+
+/** Default PPI channel for pin clearing. */
+#define NRF_FEM_CONTROL_DEFAULT_CLR_PPI_CHANNEL 16
+
+/** Default PPI channel for PDN pin handling. */
+#define NRF_FEM_CONTROL_DEFAULT_PDN_PPI_CHANNEL 5
+
+/** Default GPIOTE channel for PDN control. */
+#define NRF_FEM_CONTROL_DEFAULT_PDN_GPIOTE_CHANNEL 5
+
+/** Default GPIOTE channel for LNA control. */
+#define NRF_FEM_CONTROL_DEFAULT_LNA_GPIOTE_CHANNEL 6
+
+/** Default GPIOTE channel for PA control. */
+#define NRF_FEM_CONTROL_DEFAULT_PA_GPIOTE_CHANNEL 7
+
+/** Mask of GPIO pins used for FEM control. */
+#define NRF_802154_FEM_PINS_USED_MASK ((1 << NRF_FEM_CONTROL_DEFAULT_PA_PIN) | \
+ (1 << NRF_FEM_CONTROL_DEFAULT_LNA_PIN) | \
+ (1 << NRF_FEM_CONTROL_DEFAULT_PDN_PIN))
+
+/** Mask of PPI channels used for FEM control. */
+#define NRF_802154_FEM_PPI_CHANNELS_USED_MASK ((1 << NRF_FEM_CONTROL_DEFAULT_SET_PPI_CHANNEL) | \
+ (1 << NRF_FEM_CONTROL_DEFAULT_CLR_PPI_CHANNEL) | \
+ (1 << NRF_FEM_CONTROL_DEFAULT_PDN_PPI_CHANNEL))
+
+/** Mask of GPIOTE channels used for FEM control. */
+#define NRF_802154_FEM_GPIOTE_CHANNELS_USED_MASK ( \
+ (1 << NRF_FEM_CONTROL_DEFAULT_PDN_GPIOTE_CHANNEL) | \
+ (1 << NRF_FEM_CONTROL_DEFAULT_LNA_GPIOTE_CHANNEL) | \
+ (1 << NRF_FEM_CONTROL_DEFAULT_PA_GPIOTE_CHANNEL))
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* NRF_FEM_CONFIG_H_ */
diff --git a/third_party/NordicSemiconductor/drivers/radio/fem/three_pin_gpio/nrf_fem_three_pin_gpio.c b/third_party/NordicSemiconductor/drivers/radio/fem/three_pin_gpio/nrf_fem_three_pin_gpio.c
new file mode 100644
index 0000000..68bad9d
--- /dev/null
+++ b/third_party/NordicSemiconductor/drivers/radio/fem/three_pin_gpio/nrf_fem_three_pin_gpio.c
@@ -0,0 +1,575 @@
+/* Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @file
+ * This file implements common function for Front End Module control of the nRF 802.15.4 radio driver.
+ *
+ */
+#include "nrf_fem_protocol_api.h"
+
+#include <assert.h>
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "compiler_abstraction.h"
+#include "nrf_802154_config.h"
+#include "nrf.h"
+#include "nrf_error.h"
+#include "nrf_gpio.h"
+#include "nrf_gpiote.h"
+#include "nrf_ppi.h"
+#include "nrf_radio.h"
+#include "nrf_timer.h"
+
+#if ENABLE_FEM
+
+#define PPI_INVALID_CHANNEL 0xFF /**< Default value for the PPI holder variable. */
+
+static nrf_fem_interface_config_t m_nrf_fem_interface_config = /**< FEM controller configuration. */
+{
+ .fem_config =
+ {
+ .pa_time_gap_us = NRF_FEM_PA_TIME_IN_ADVANCE_US,
+ .lna_time_gap_us = NRF_FEM_LNA_TIME_IN_ADVANCE_US,
+ .pdn_settle_us = NRF_FEM_PDN_SETTLE_US,
+ .trx_hold_us = NRF_FEM_TRX_HOLD_US,
+ },
+ .pa_pin_config =
+ {
+ .enable = 1,
+ .active_high = 1,
+ .gpio_pin = NRF_FEM_CONTROL_DEFAULT_PA_PIN,
+ .gpiote_ch_id = NRF_FEM_CONTROL_DEFAULT_PA_GPIOTE_CHANNEL
+ },
+ .lna_pin_config =
+ {
+ .enable = 1,
+ .active_high = 1,
+ .gpio_pin = NRF_FEM_CONTROL_DEFAULT_LNA_PIN,
+ .gpiote_ch_id = NRF_FEM_CONTROL_DEFAULT_LNA_GPIOTE_CHANNEL
+ },
+ .pdn_pin_config =
+ {
+ .enable = 1,
+ .gpio_pin = NRF_FEM_CONTROL_DEFAULT_PDN_PIN,
+ .active_high = 1,
+ .gpiote_ch_id = NRF_FEM_CONTROL_DEFAULT_PDN_GPIOTE_CHANNEL
+ },
+ .ppi_ch_id_set = NRF_FEM_CONTROL_DEFAULT_SET_PPI_CHANNEL,
+ .ppi_ch_id_clr = NRF_FEM_CONTROL_DEFAULT_CLR_PPI_CHANNEL,
+ .ppi_ch_id_pdn = NRF_FEM_CONTROL_DEFAULT_PDN_PPI_CHANNEL
+};
+static uint8_t m_ppi_channel_ext = PPI_INVALID_CHANNEL; /**< PPI channel provided by the `override_ppi = true` functionality. */
+
+/** Map the mask bits with the Compare Channels. */
+static uint32_t get_available_compare_channel(uint8_t mask, uint32_t number)
+{
+ uint32_t i;
+
+ for (i = 0; i < 4; i++)
+ {
+ if (mask & (1 << i))
+ {
+ if (number == 0)
+ {
+ break;
+ }
+ else
+ {
+ number--;
+ }
+ }
+ }
+
+ if (i == 0)
+ return NRF_TIMER_CC_CHANNEL0;
+ if (i == 1)
+ return NRF_TIMER_CC_CHANNEL1;
+ if (i == 2)
+ return NRF_TIMER_CC_CHANNEL2;
+ if (i == 3)
+ return NRF_TIMER_CC_CHANNEL3;
+ assert(false);
+ return 0;
+}
+
+/** Configure GPIOTE module. */
+static void gpiote_configure(void)
+{
+ if (m_nrf_fem_interface_config.pa_pin_config.enable)
+ {
+ nrf_gpiote_task_configure(m_nrf_fem_interface_config.pa_pin_config.gpiote_ch_id,
+ m_nrf_fem_interface_config.pa_pin_config.gpio_pin,
+ (nrf_gpiote_polarity_t)GPIOTE_CONFIG_POLARITY_None,
+ (nrf_gpiote_outinit_t) !m_nrf_fem_interface_config.pa_pin_config.active_high);
+
+ nrf_gpiote_task_enable(m_nrf_fem_interface_config.pa_pin_config.gpiote_ch_id);
+ }
+
+ if (m_nrf_fem_interface_config.lna_pin_config.enable)
+ {
+ nrf_gpiote_task_configure(m_nrf_fem_interface_config.lna_pin_config.gpiote_ch_id,
+ m_nrf_fem_interface_config.lna_pin_config.gpio_pin,
+ (nrf_gpiote_polarity_t)GPIOTE_CONFIG_POLARITY_None,
+ (nrf_gpiote_outinit_t) !m_nrf_fem_interface_config.lna_pin_config.active_high);
+
+ nrf_gpiote_task_enable(m_nrf_fem_interface_config.lna_pin_config.gpiote_ch_id);
+ }
+
+ if (m_nrf_fem_interface_config.pdn_pin_config.enable)
+ {
+ nrf_gpiote_task_configure(m_nrf_fem_interface_config.pdn_pin_config.gpiote_ch_id,
+ m_nrf_fem_interface_config.pdn_pin_config.gpio_pin,
+ (nrf_gpiote_polarity_t)GPIOTE_CONFIG_POLARITY_None,
+ (nrf_gpiote_outinit_t) !m_nrf_fem_interface_config.pdn_pin_config.active_high);
+
+ nrf_gpiote_task_enable(m_nrf_fem_interface_config.pdn_pin_config.gpiote_ch_id);
+ }
+}
+
+/** Configure the event with the provided values. */
+static int32_t event_configuration_set(const nrf_802154_fal_event_t * const p_event,
+ nrf_fem_gpiote_pin_config_t * p_pin_config,
+ bool activate,
+ uint32_t time_delay)
+{
+ uint32_t task_addr;
+ uint8_t ppi_ch;
+
+ assert(p_event);
+ assert(p_pin_config);
+
+ if (p_event->override_ppi)
+ {
+ assert(p_event->ppi_ch_id != PPI_INVALID_CHANNEL);
+ if (m_ppi_channel_ext == PPI_INVALID_CHANNEL)
+ {
+ /* External PPI channel placeholder is free. */
+ m_ppi_channel_ext = ppi_ch = p_event->ppi_ch_id;
+ }
+ else if ((m_ppi_channel_ext == p_event->ppi_ch_id) &&
+ (!NRF_PPI->FORK[(uint32_t)m_ppi_channel_ext].TEP))
+ {
+ /* PPI is equal to the already set, but the one set has a free fork endpoint. */
+ ppi_ch = p_event->ppi_ch_id;
+ }
+ else
+ {
+ return NRF_ERROR_INVALID_STATE;
+ }
+ }
+ else
+ {
+ ppi_ch =
+ activate ? m_nrf_fem_interface_config.ppi_ch_id_set : m_nrf_fem_interface_config.
+ ppi_ch_id_clr;
+ }
+
+ if (p_pin_config->active_high ^ activate)
+ {
+ task_addr = (uint32_t)(&NRF_GPIOTE->TASKS_CLR[p_pin_config->gpiote_ch_id]);
+ }
+ else
+ {
+ task_addr = (uint32_t)(&NRF_GPIOTE->TASKS_SET[p_pin_config->gpiote_ch_id]);
+ }
+
+ switch (p_event->type)
+ {
+ case NRF_802154_FAL_EVENT_TYPE_GENERIC:
+ {
+ if (NRF_PPI->CH[(uint32_t)ppi_ch].TEP)
+ {
+ nrf_ppi_fork_endpoint_setup((nrf_ppi_channel_t)ppi_ch, task_addr);
+ }
+ else
+ {
+ nrf_ppi_channel_endpoint_setup((nrf_ppi_channel_t)ppi_ch,
+ p_event->event.generic.register_address,
+ task_addr);
+ }
+
+ nrf_ppi_channel_enable((nrf_ppi_channel_t)ppi_ch);
+ }
+ break;
+
+ case NRF_802154_FAL_EVENT_TYPE_TIMER:
+ {
+ assert(p_event->event.timer.compare_channel_mask);
+
+ uint32_t compare_channel;
+ uint32_t pdn_task_addr;
+
+ /* EN pin */
+ compare_channel = get_available_compare_channel(
+ p_event->event.timer.compare_channel_mask,
+ 0);
+
+ nrf_ppi_channel_endpoint_setup((nrf_ppi_channel_t)ppi_ch,
+ (uint32_t)(&(p_event->event.timer.p_timer_instance->
+ EVENTS_COMPARE[compare_channel])),
+ task_addr);
+ nrf_ppi_channel_enable((nrf_ppi_channel_t)ppi_ch);
+
+ nrf_timer_cc_write(p_event->event.timer.p_timer_instance,
+ (nrf_timer_cc_channel_t)compare_channel,
+ p_event->event.timer.counter_value - time_delay);
+
+ /* PDN pin */
+ if (m_nrf_fem_interface_config.pdn_pin_config.active_high)
+ {
+ pdn_task_addr =
+ (uint32_t)(&NRF_GPIOTE->TASKS_SET[m_nrf_fem_interface_config.pdn_pin_config.
+ gpiote_ch_id]);
+ }
+ else
+ {
+ pdn_task_addr =
+ (uint32_t)(&NRF_GPIOTE->TASKS_CLR[m_nrf_fem_interface_config.pdn_pin_config.
+ gpiote_ch_id]);
+ }
+
+ compare_channel = get_available_compare_channel(
+ p_event->event.timer.compare_channel_mask,
+ 1);
+
+ nrf_ppi_channel_endpoint_setup(
+ (nrf_ppi_channel_t)m_nrf_fem_interface_config.ppi_ch_id_pdn,
+ (uint32_t)(&(p_event->event.timer.p_timer_instance->
+ EVENTS_COMPARE[compare_channel])),
+ pdn_task_addr);
+
+ nrf_ppi_channel_enable((nrf_ppi_channel_t)m_nrf_fem_interface_config.ppi_ch_id_pdn);
+
+ nrf_timer_cc_write(p_event->event.timer.p_timer_instance,
+ (nrf_timer_cc_channel_t)compare_channel,
+ p_event->event.timer.counter_value - time_delay -
+ m_nrf_fem_interface_config.fem_config.pdn_settle_us);
+ break;
+ }
+
+ default:
+ assert(false);
+ break;
+ }
+
+ return NRF_SUCCESS;
+}
+
+/** Deconfigure the event with the provided values. */
+static int32_t event_configuration_clear(const nrf_802154_fal_event_t * const p_event,
+ bool activate)
+{
+ uint8_t ppi_ch;
+
+ assert(p_event);
+
+ if (p_event->override_ppi)
+ {
+ ppi_ch = p_event->ppi_ch_id;
+ }
+ else
+ {
+ ppi_ch =
+ activate ? m_nrf_fem_interface_config.ppi_ch_id_set : m_nrf_fem_interface_config.
+ ppi_ch_id_clr;
+ }
+
+ nrf_ppi_channel_disable((nrf_ppi_channel_t)ppi_ch);
+ nrf_ppi_channel_endpoint_setup((nrf_ppi_channel_t)ppi_ch, 0, 0);
+ nrf_ppi_fork_endpoint_setup((nrf_ppi_channel_t)ppi_ch, 0);
+
+ switch (p_event->type)
+ {
+ case NRF_802154_FAL_EVENT_TYPE_GENERIC:
+ case NRF_802154_FAL_EVENT_TYPE_TIMER:
+ break;
+
+ default:
+ assert(false);
+ break;
+ }
+
+ return NRF_SUCCESS;
+}
+
+int32_t nrf_802154_fal_pa_configuration_set(const nrf_802154_fal_event_t * const p_activate_event,
+ const nrf_802154_fal_event_t * const p_deactivate_event)
+{
+ int32_t ret_code;
+
+ if (!m_nrf_fem_interface_config.pa_pin_config.enable)
+ {
+ return NRF_ERROR_FORBIDDEN;
+ }
+
+ if (p_activate_event)
+ {
+ ret_code = event_configuration_set(p_activate_event,
+ &m_nrf_fem_interface_config.pa_pin_config,
+ true,
+ m_nrf_fem_interface_config.fem_config.pa_time_gap_us);
+ if (ret_code != NRF_SUCCESS)
+ {
+ return ret_code;
+ }
+ }
+
+ if (p_deactivate_event)
+ {
+ ret_code = event_configuration_set(p_deactivate_event,
+ &m_nrf_fem_interface_config.pa_pin_config,
+ false,
+ m_nrf_fem_interface_config.fem_config.pa_time_gap_us);
+ if (ret_code != NRF_SUCCESS)
+ {
+ return ret_code;
+ }
+ }
+
+ return NRF_SUCCESS;
+}
+
+int32_t nrf_802154_fal_lna_configuration_set(const nrf_802154_fal_event_t * const p_activate_event,
+ const nrf_802154_fal_event_t * const p_deactivate_event)
+{
+ int32_t ret_code;
+
+ if (!m_nrf_fem_interface_config.lna_pin_config.enable)
+ {
+ return NRF_ERROR_FORBIDDEN;
+ }
+
+ if (p_activate_event)
+ {
+ ret_code = event_configuration_set(p_activate_event,
+ &m_nrf_fem_interface_config.lna_pin_config,
+ true,
+ m_nrf_fem_interface_config.fem_config.lna_time_gap_us);
+ if (ret_code != NRF_SUCCESS)
+ {
+ return ret_code;
+ }
+ }
+
+ if (p_deactivate_event)
+ {
+ ret_code = event_configuration_set(p_deactivate_event,
+ &m_nrf_fem_interface_config.lna_pin_config,
+ false,
+ m_nrf_fem_interface_config.fem_config.lna_time_gap_us);
+ if (ret_code != NRF_SUCCESS)
+ {
+ return ret_code;
+ }
+ }
+
+ return NRF_SUCCESS;
+}
+
+int32_t nrf_802154_fal_pa_configuration_clear(const nrf_802154_fal_event_t * const p_activate_event,
+ const nrf_802154_fal_event_t * const p_deactivate_event)
+{
+ int32_t ret_code;
+
+ if (!m_nrf_fem_interface_config.pa_pin_config.enable)
+ {
+ return NRF_ERROR_FORBIDDEN;
+ }
+
+ if (p_activate_event)
+ {
+ ret_code = event_configuration_clear(p_activate_event, true);
+ if (ret_code != NRF_SUCCESS)
+ {
+ return ret_code;
+ }
+ }
+
+ if (p_deactivate_event)
+ {
+ ret_code = event_configuration_clear(p_deactivate_event, false);
+ if (ret_code != NRF_SUCCESS)
+ {
+ return ret_code;
+ }
+ }
+
+ return NRF_SUCCESS;
+}
+
+int32_t nrf_802154_fal_lna_configuration_clear(
+ const nrf_802154_fal_event_t * const p_activate_event,
+ const nrf_802154_fal_event_t * const p_deactivate_event)
+{
+ int32_t ret_code;
+
+ if (!m_nrf_fem_interface_config.lna_pin_config.enable)
+ {
+ return NRF_ERROR_FORBIDDEN;
+ }
+
+ if (p_activate_event)
+ {
+ ret_code = event_configuration_clear(p_activate_event, true);
+ if (ret_code != NRF_SUCCESS)
+ {
+ return ret_code;
+ }
+ }
+
+ if (p_deactivate_event)
+ {
+ ret_code = event_configuration_clear(p_deactivate_event, false);
+ if (ret_code != NRF_SUCCESS)
+ {
+ return ret_code;
+ }
+ }
+
+ return NRF_SUCCESS;
+}
+
+void nrf_802154_fal_deactivate_now(nrf_fal_functionality_t type)
+{
+ if (m_nrf_fem_interface_config.pa_pin_config.enable && (type & NRF_802154_FAL_PA))
+ {
+ if (m_nrf_fem_interface_config.pa_pin_config.active_high)
+ {
+ nrf_gpiote_task_force(m_nrf_fem_interface_config.pa_pin_config.gpiote_ch_id,
+ NRF_GPIOTE_INITIAL_VALUE_LOW);
+ }
+ else
+ {
+ nrf_gpiote_task_force(m_nrf_fem_interface_config.pa_pin_config.gpiote_ch_id,
+ NRF_GPIOTE_INITIAL_VALUE_HIGH);
+ }
+ }
+
+ if (m_nrf_fem_interface_config.lna_pin_config.enable && (type & NRF_802154_FAL_LNA))
+ {
+ if (m_nrf_fem_interface_config.lna_pin_config.active_high)
+ {
+ nrf_gpiote_task_force(m_nrf_fem_interface_config.lna_pin_config.gpiote_ch_id,
+ NRF_GPIOTE_INITIAL_VALUE_LOW);
+ }
+ else
+ {
+ nrf_gpiote_task_force(m_nrf_fem_interface_config.lna_pin_config.gpiote_ch_id,
+ NRF_GPIOTE_INITIAL_VALUE_HIGH);
+ }
+ }
+}
+
+int32_t nrf_fem_interface_configuration_set(nrf_fem_interface_config_t const * const p_config)
+{
+ m_nrf_fem_interface_config = *p_config;
+
+ if (m_nrf_fem_interface_config.pa_pin_config.enable ||
+ m_nrf_fem_interface_config.lna_pin_config.enable)
+ {
+ gpiote_configure();
+ }
+
+ return NRF_SUCCESS;
+}
+
+int32_t nrf_fem_interface_configuration_get(nrf_fem_interface_config_t * p_config)
+{
+ *p_config = m_nrf_fem_interface_config;
+
+ return NRF_SUCCESS;
+}
+
+void nrf_802154_fal_cleanup(void)
+{
+ nrf_ppi_channel_disable((nrf_ppi_channel_t)m_nrf_fem_interface_config.ppi_ch_id_set);
+ nrf_ppi_channel_endpoint_setup((nrf_ppi_channel_t)m_nrf_fem_interface_config.ppi_ch_id_set, 0,
+ 0);
+ nrf_ppi_fork_endpoint_setup((nrf_ppi_channel_t)m_nrf_fem_interface_config.ppi_ch_id_set, 0);
+ nrf_ppi_channel_disable((nrf_ppi_channel_t)m_nrf_fem_interface_config.ppi_ch_id_clr);
+ nrf_ppi_channel_endpoint_setup((nrf_ppi_channel_t)m_nrf_fem_interface_config.ppi_ch_id_clr, 0,
+ 0);
+ nrf_ppi_fork_endpoint_setup((nrf_ppi_channel_t)m_nrf_fem_interface_config.ppi_ch_id_clr, 0);
+ if (m_ppi_channel_ext != PPI_INVALID_CHANNEL)
+ {
+ nrf_ppi_channel_disable((nrf_ppi_channel_t)m_ppi_channel_ext);
+ nrf_ppi_channel_endpoint_setup((nrf_ppi_channel_t)m_ppi_channel_ext, 0, 0);
+ nrf_ppi_fork_endpoint_setup((nrf_ppi_channel_t)m_ppi_channel_ext, 0);
+ m_ppi_channel_ext = PPI_INVALID_CHANNEL;
+ }
+}
+
+bool nrf_fem_prepare_powerdown(NRF_TIMER_Type * p_instance,
+ uint32_t compare_channel,
+ nrf_ppi_channel_t ppi_id)
+{
+ uint32_t pdn_task_addr;
+
+ if (!m_nrf_fem_interface_config.pdn_pin_config.enable)
+ {
+ return false;
+ }
+
+ if (m_nrf_fem_interface_config.pdn_pin_config.active_high)
+ {
+ pdn_task_addr =
+ (uint32_t)(&NRF_GPIOTE->TASKS_CLR[m_nrf_fem_interface_config.pdn_pin_config.gpiote_ch_id
+ ]);
+ }
+ else
+ {
+ pdn_task_addr =
+ (uint32_t)(&NRF_GPIOTE->TASKS_SET[m_nrf_fem_interface_config.pdn_pin_config.gpiote_ch_id
+ ]);
+ }
+
+ nrf_timer_cc_write(p_instance,
+ (nrf_timer_cc_channel_t)compare_channel,
+ m_nrf_fem_interface_config.fem_config.trx_hold_us + 1);
+ nrf_ppi_channel_endpoint_setup((nrf_ppi_channel_t)m_nrf_fem_interface_config.ppi_ch_id_pdn,
+ (uint32_t)(&(p_instance->EVENTS_COMPARE[compare_channel])),
+ pdn_task_addr);
+
+ uint32_t event_addr = (uint32_t)nrf_radio_event_address_get(NRF_RADIO_EVENT_DISABLED);
+ uint32_t task_addr = (uint32_t)nrf_timer_task_address_get(p_instance, NRF_TIMER_TASK_START);
+
+ nrf_timer_shorts_enable(p_instance, NRF_TIMER_SHORT_COMPARE0_STOP_MASK);
+ nrf_ppi_channel_endpoint_setup(ppi_id, event_addr, task_addr);
+ nrf_ppi_fork_endpoint_setup(ppi_id, 0);
+ nrf_ppi_channel_enable(ppi_id);
+
+ nrf_timer_event_clear(p_instance, NRF_TIMER_EVENT_COMPARE0);
+
+ return true;
+}
+
+#endif // ENABLE_FEM
diff --git a/third_party/NordicSemiconductor/drivers/radio/mac_features/ack_generator/nrf_802154_ack_data.c b/third_party/NordicSemiconductor/drivers/radio/mac_features/ack_generator/nrf_802154_ack_data.c
index 0d7cdb7..2de5a21 100644
--- a/third_party/NordicSemiconductor/drivers/radio/mac_features/ack_generator/nrf_802154_ack_data.c
+++ b/third_party/NordicSemiconductor/drivers/radio/mac_features/ack_generator/nrf_802154_ack_data.c
@@ -43,7 +43,6 @@
#include "mac_features/nrf_802154_frame_parser.h"
#include "nrf_802154_config.h"
#include "nrf_802154_const.h"
-#include "nrf_802154_types.h"
/// Maximum number of Short Addresses of nodes for which there is ACK data to set.
#define NUM_SHORT_ADDRESSES NRF_802154_PENDING_SHORT_ADDRESSES
@@ -91,8 +90,9 @@
} ie_arrays_t;
// TODO: Combine below arrays to perform binary search only once per Ack generation.
-static pending_bit_arrays_t m_pending_bit;
-static ie_arrays_t m_ie;
+static pending_bit_arrays_t m_pending_bit;
+static ie_arrays_t m_ie;
+static nrf_802154_src_addr_match_t m_src_matching_method;
/***************************************************************************************************
* @section Array handling helper functions
@@ -322,6 +322,106 @@
}
/**
+ * @brief Thread implementation of the address matching algorithm.
+ *
+ * @param[in] p_frame Pointer to the frame for which the ACK frame is being prepared.
+ *
+ * @retval true Pending bit is to be set.
+ * @retval false Pending bit is to be cleared.
+ */
+static bool addr_match_thread(const uint8_t * p_frame)
+{
+ bool extended;
+ uint32_t location;
+ const uint8_t * p_src_addr = nrf_802154_frame_parser_src_addr_get(p_frame, &extended);
+
+ // The pending bit is set by default.
+ if (!m_pending_bit.enabled || (NULL == p_src_addr))
+ {
+ return true;
+ }
+
+ return addr_index_find(p_src_addr, &location, NRF_802154_ACK_DATA_PENDING_BIT, extended);
+}
+
+/**
+ * @brief Zigbee implementation of the address matching algorithm.
+ *
+ * @param[in] p_frame Pointer to the frame for which the ACK frame is being prepared.
+ *
+ * @retval true Pending bit is to be set.
+ * @retval false Pending bit is to be cleared.
+ */
+static bool addr_match_zigbee(const uint8_t * p_frame)
+{
+ uint8_t frame_type;
+ nrf_802154_frame_parser_mhr_data_t mhr_fields;
+ uint32_t location;
+ const uint8_t * p_cmd = p_frame;
+ bool ret = false;
+
+ // If ack data generator module is disabled do not perform check, return true by default.
+ if (!m_pending_bit.enabled)
+ {
+ return true;
+ }
+
+ // Check the frame type.
+ frame_type = (p_frame[FRAME_TYPE_OFFSET] & FRAME_TYPE_MASK);
+
+ // Parse the MAC header and retrieve the command type.
+ if (nrf_802154_frame_parser_mhr_parse(p_frame, &mhr_fields))
+ {
+ // Note: Security header is not included in the offset.
+ // If security is to be used at any point, additional calculation
+ // in nrf_802154_frame_parser_mhr_parse needs to be implemented.
+ p_cmd += mhr_fields.addressing_end_offset;
+ }
+ else
+ {
+ // If invalid source or destination addressing mode is detected, assume unknown device.
+ // Command type cannot be checked, as addressing_end_offset value will be invalid.
+ return true;
+ }
+
+ // Check frame type and command type.
+ if ((frame_type == FRAME_TYPE_COMMAND) && (*p_cmd == MAC_CMD_DATA_REQ))
+ {
+ // Check addressing type - in long case address, pb should always be 1.
+ if (mhr_fields.src_addr_size == SHORT_ADDRESS_SIZE)
+ {
+ // Return true if address is not found on the m_pending_bits list.
+ ret = !addr_index_find(mhr_fields.p_src_addr,
+ &location,
+ NRF_802154_ACK_DATA_PENDING_BIT,
+ false);
+ }
+ else
+ {
+ ret = true;
+ }
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Standard-compliant implementation of the address matching algorithm.
+ *
+ * Function always returns true. It is IEEE 802.15.4 compliant, as per 6.7.3.
+ * Higher layer should ensure empty data frame with no AR is sent afterwards.
+ *
+ * @param[in] p_frame Pointer to the frame for which the ACK frame is being prepared.
+ *
+ * @retval true Pending bit is to be set.
+ */
+static bool addr_match_standard_compliant(const uint8_t * p_frame)
+{
+ (void)p_frame;
+ return true;
+}
+
+/**
* @brief Add an address to the address list in ascending order.
*
* @param[in] p_addr Pointer to the address to be added.
@@ -491,6 +591,7 @@
memset(&m_ie, 0, sizeof(m_ie));
m_pending_bit.enabled = true;
+ m_src_matching_method = NRF_802154_SRC_ADDR_MATCH_THREAD;
}
void nrf_802154_ack_data_enable(bool enabled)
@@ -567,19 +668,45 @@
}
}
-bool nrf_802154_ack_data_pending_bit_should_be_set(const uint8_t * p_frame)
+void nrf_802154_ack_data_src_addr_matching_method_set(nrf_802154_src_addr_match_t match_method)
{
- bool extended;
- uint32_t location;
- const uint8_t * p_src_addr = nrf_802154_frame_parser_src_addr_get(p_frame, &extended);
-
- // The pending bit is set by default.
- if (!m_pending_bit.enabled || NULL == p_src_addr)
+ switch (match_method)
{
- return true;
+ case NRF_802154_SRC_ADDR_MATCH_THREAD:
+ case NRF_802154_SRC_ADDR_MATCH_ZIGBEE:
+ case NRF_802154_SRC_ADDR_MATCH_ALWAYS_1:
+ m_src_matching_method = match_method;
+ break;
+
+ default:
+ assert(false);
}
- return addr_index_find(p_src_addr, &location, NRF_802154_ACK_DATA_PENDING_BIT, extended);
+}
+
+bool nrf_802154_ack_data_pending_bit_should_be_set(const uint8_t * p_frame)
+{
+ bool ret;
+
+ switch (m_src_matching_method)
+ {
+ case NRF_802154_SRC_ADDR_MATCH_THREAD:
+ ret = addr_match_thread(p_frame);
+ break;
+
+ case NRF_802154_SRC_ADDR_MATCH_ZIGBEE:
+ ret = addr_match_zigbee(p_frame);
+ break;
+
+ case NRF_802154_SRC_ADDR_MATCH_ALWAYS_1:
+ ret = addr_match_standard_compliant(p_frame);
+ break;
+
+ default:
+ assert(false);
+ }
+
+ return ret;
}
const uint8_t * nrf_802154_ack_data_ie_get(const uint8_t * p_src_addr,
diff --git a/third_party/NordicSemiconductor/drivers/radio/mac_features/ack_generator/nrf_802154_ack_data.h b/third_party/NordicSemiconductor/drivers/radio/mac_features/ack_generator/nrf_802154_ack_data.h
index bfa3604..355959b 100644
--- a/third_party/NordicSemiconductor/drivers/radio/mac_features/ack_generator/nrf_802154_ack_data.h
+++ b/third_party/NordicSemiconductor/drivers/radio/mac_features/ack_generator/nrf_802154_ack_data.h
@@ -40,6 +40,8 @@
#include <stdbool.h>
#include <stdint.h>
+#include "nrf_802154_types.h"
+
/**
* @brief Initializes the ACK data generator module.
*/
@@ -100,6 +102,19 @@
void nrf_802154_ack_data_reset(bool extended, uint8_t data_type);
/**
+ * @brief Select the source matching algorithm.
+ *
+ * @note This function is to be called after the driver initialization, but before the transceiver is enabled.
+ *
+ * When calling @ref nrf_802154_ack_data_pending_bit_should_be_set, one of several algorithms
+ * for source address matching will be chosen. To ensure a specific algorithm is selected,
+ * call this function before @ref rf_802154_ack_data_pending_bit_should_be_set.
+ *
+ * @param[in] match_method Source matching method to be used.
+ */
+void nrf_802154_ack_data_src_addr_matching_method_set(nrf_802154_src_addr_match_t match_method);
+
+/**
* @brief Checks if a pending bit is to be set in the ACK frame sent in response to a given frame.
*
* @param[in] p_frame Pointer to the frame for which the ACK frame is being prepared.
diff --git a/third_party/NordicSemiconductor/drivers/radio/nrf_802154.c b/third_party/NordicSemiconductor/drivers/radio/nrf_802154.c
index fb65d22..02d9fdb 100644
--- a/third_party/NordicSemiconductor/drivers/radio/nrf_802154.c
+++ b/third_party/NordicSemiconductor/drivers/radio/nrf_802154.c
@@ -51,7 +51,6 @@
#include "nrf_802154_pib.h"
#include "nrf_802154_priority_drop.h"
#include "nrf_802154_request.h"
-#include "nrf_802154_revision.h"
#include "nrf_802154_rssi.h"
#include "nrf_802154_rx_buffer.h"
#include "nrf_802154_timer_coord.h"
@@ -70,7 +69,7 @@
#include "mac_features/ack_generator/nrf_802154_ack_data.h"
#if ENABLE_FEM
-#include "fem/nrf_fem_control_api.h"
+#include "fem/nrf_fem_protocol_api.h"
#endif
#define RAW_LENGTH_OFFSET 0
@@ -214,7 +213,6 @@
nrf_802154_priority_drop_init();
nrf_802154_random_init();
nrf_802154_request_init();
- nrf_802154_revision_init();
nrf_802154_rsch_crit_sect_init();
nrf_802154_rsch_init();
nrf_802154_rx_buffer_init();
@@ -244,14 +242,47 @@
#endif // !NRF_802154_INTERNAL_RADIO_IRQ_HANDLING
#if ENABLE_FEM
-void nrf_802154_fem_control_cfg_set(const nrf_802154_fem_control_cfg_t * p_cfg)
+void nrf_802154_fem_control_cfg_set(nrf_802154_fem_control_cfg_t const * const p_cfg)
{
- nrf_fem_control_cfg_set(p_cfg);
+ nrf_fem_interface_config_t config;
+
+ nrf_fem_interface_configuration_get(&config);
+
+ config.lna_pin_config.active_high = p_cfg->lna_cfg.active_high;
+ config.lna_pin_config.enable = p_cfg->lna_cfg.enable;
+ config.lna_pin_config.gpio_pin = p_cfg->lna_cfg.gpio_pin;
+ config.lna_pin_config.gpiote_ch_id = p_cfg->lna_gpiote_ch_id;
+
+ config.pa_pin_config.active_high = p_cfg->pa_cfg.active_high;
+ config.pa_pin_config.enable = p_cfg->pa_cfg.enable;
+ config.pa_pin_config.gpio_pin = p_cfg->pa_cfg.gpio_pin;
+ config.pa_pin_config.gpiote_ch_id = p_cfg->pa_gpiote_ch_id;
+
+ config.ppi_ch_id_set = p_cfg->ppi_ch_id_set;
+ config.ppi_ch_id_clr = p_cfg->ppi_ch_id_clr;
+
+ nrf_fem_interface_configuration_set(&config);
}
void nrf_802154_fem_control_cfg_get(nrf_802154_fem_control_cfg_t * p_cfg)
{
- nrf_fem_control_cfg_get(p_cfg);
+ nrf_fem_interface_config_t config;
+
+ nrf_fem_interface_configuration_get(&config);
+
+ p_cfg->lna_cfg.active_high = config.lna_pin_config.active_high;
+ p_cfg->lna_cfg.enable = config.lna_pin_config.enable;
+ p_cfg->lna_cfg.gpio_pin = config.lna_pin_config.gpio_pin;
+
+ p_cfg->pa_cfg.active_high = config.pa_pin_config.active_high;
+ p_cfg->pa_cfg.enable = config.pa_pin_config.enable;
+ p_cfg->pa_cfg.gpio_pin = config.pa_pin_config.gpio_pin;
+
+ p_cfg->lna_gpiote_ch_id = config.lna_pin_config.gpiote_ch_id;
+ p_cfg->pa_gpiote_ch_id = config.pa_pin_config.gpiote_ch_id;
+
+ p_cfg->ppi_ch_id_clr = config.ppi_ch_id_clr;
+ p_cfg->ppi_ch_id_set = config.ppi_ch_id_set;
}
#endif // ENABLE_FEM
@@ -574,6 +605,11 @@
nrf_802154_pib_pan_coord_set(enabled);
}
+void nrf_802154_src_addr_matching_method_set(nrf_802154_src_addr_match_t match_method)
+{
+ nrf_802154_ack_data_src_addr_matching_method_set(match_method);
+}
+
bool nrf_802154_ack_data_set(const uint8_t * p_addr,
bool extended,
const void * p_data,
diff --git a/third_party/NordicSemiconductor/drivers/radio/nrf_802154.h b/third_party/NordicSemiconductor/drivers/radio/nrf_802154.h
index cf7394e..b1adba4 100644
--- a/third_party/NordicSemiconductor/drivers/radio/nrf_802154.h
+++ b/third_party/NordicSemiconductor/drivers/radio/nrf_802154.h
@@ -1,1179 +1,1246 @@
-/* Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-/**
- * @defgroup nrf_802154 802.15.4 radio driver
- * @{
- *
- */
-
-#ifndef NRF_802154_H_
-#define NRF_802154_H_
-
-#include <stdbool.h>
-#include <stdint.h>
-
-#include "nrf_802154_config.h"
-#include "nrf_802154_types.h"
-
-#if ENABLE_FEM
-#include "fem/nrf_fem_control_api.h"
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @brief Timestamp value indicating that the timestamp is inaccurate.
- */
-#define NRF_802154_NO_TIMESTAMP 0
-
-/**
- * @brief Initializes the 802.15.4 driver.
- *
- * This function initializes the RADIO peripheral in the @ref RADIO_STATE_SLEEP state.
- *
- * @note This function is to be called once, before any other functions from this module.
- */
-void nrf_802154_init(void);
-
-/**
- * @brief Deinitializes the 802.15.4 driver.
- *
- * This function deinitializes the RADIO peripheral and resets it to the default state.
- */
-void nrf_802154_deinit(void);
-
-#if !NRF_802154_INTERNAL_RADIO_IRQ_HANDLING
-/**
- * @brief Handles the interrupt request from the RADIO peripheral.
- *
- * @note If NRF_802154_INTERNAL_RADIO_IRQ_HANDLING is enabled, the driver internally handles the
- * RADIO IRQ, and this function must not be called.
- *
- * This function is intended for use in an operating system environment, where the OS handles IRQ
- * and indirectly passes it to the driver, or with a RAAL implementation that indirectly passes
- * radio IRQ to the driver (that is, SoftDevice).
- */
-void nrf_802154_radio_irq_handler(void);
-#endif // !NRF_802154_INTERNAL_RADIO_IRQ_HANDLING
-
-/**
- * @brief Sets the channel on which the radio is to operate.
- *
- * @param[in] channel Channel number (11-26).
- */
-void nrf_802154_channel_set(uint8_t channel);
-
-/**
- * @brief Gets the channel on which the radio operates.
- *
- * @returns Channel number (11-26).
- */
-uint8_t nrf_802154_channel_get(void);
-
-/**
- * @brief Sets the transmit power.
- *
- * @note The driver recalculates the requested value to the nearest value accepted by the hardware.
- * The calculation result is rounded up.
- *
- * @param[in] power Transmit power in dBm.
- */
-void nrf_802154_tx_power_set(int8_t power);
-
-/**
- * @brief Gets the currently set transmit power.
- *
- * @returns Currently used transmit power, in dBm.
- */
-int8_t nrf_802154_tx_power_get(void);
-
-/**
- * @defgroup nrf_802154_frontend Frontend Module management
- * @{
- */
-
-#if ENABLE_FEM
-
-/** Structure that contains the run-time configuration of the Frontend Module. */
-typedef nrf_fem_control_cfg_t nrf_802154_fem_control_cfg_t;
-
-/** Macro with the default configuration of the Frontend Module. */
-#define NRF_802154_FEM_DEFAULT_SETTINGS \
- ((nrf_802154_fem_control_cfg_t) { \
- .pa_cfg = { \
- .enable = 1, \
- .active_high = 1, \
- .gpio_pin = NRF_FEM_CONTROL_DEFAULT_PA_PIN, \
- }, \
- .lna_cfg = { \
- .enable = 1, \
- .active_high = 1, \
- .gpio_pin = NRF_FEM_CONTROL_DEFAULT_LNA_PIN, \
- }, \
- .pa_gpiote_ch_id = NRF_FEM_CONTROL_DEFAULT_PA_GPIOTE_CHANNEL, \
- .lna_gpiote_ch_id = NRF_FEM_CONTROL_DEFAULT_LNA_GPIOTE_CHANNEL, \
- .ppi_ch_id_set = NRF_FEM_CONTROL_DEFAULT_SET_PPI_CHANNEL, \
- .ppi_ch_id_clr = NRF_FEM_CONTROL_DEFAULT_CLR_PPI_CHANNEL, \
- })
-
-/**
- * @brief Sets the PA & LNA GPIO toggle configuration.
- *
- * @note This function must not be called when the radio is in use.
- *
- * @param[in] p_cfg Pointer to the PA & LNA GPIO toggle configuration.
- *
- */
-void nrf_802154_fem_control_cfg_set(const nrf_802154_fem_control_cfg_t * p_cfg);
-
-/**
- * @brief Get the PA & LNA GPIO toggle configuration.
- *
- * @param[out] p_cfg Pointer to the structure for the PA & LNA GPIO toggle configuration.
- *
- */
-void nrf_802154_fem_control_cfg_get(nrf_802154_fem_control_cfg_t * p_cfg);
-
-#endif // ENABLE_FEM
-
-/**
- * @}
- * @defgroup nrf_802154_addresses Setting addresses and PAN ID of the device
- * @{
- */
-
-/**
- * @brief Sets the PAN ID used by the device.
- *
- * @param[in] p_pan_id Pointer to the PAN ID (2 bytes, little-endian).
- *
- * This function makes a copy of the PAN ID.
- */
-void nrf_802154_pan_id_set(const uint8_t * p_pan_id);
-
-/**
- * @brief Sets the extended address of the device.
- *
- * @param[in] p_extended_address Pointer to the extended address (8 bytes, little-endian).
- *
- * This function makes a copy of the address.
- */
-void nrf_802154_extended_address_set(const uint8_t * p_extended_address);
-
-/**
- * @brief Sets the short address of the device.
- *
- * @param[in] p_short_address Pointer to the short address (2 bytes, little-endian).
- *
- * This function makes a copy of the address.
- */
-void nrf_802154_short_address_set(const uint8_t * p_short_address);
-
-/**
- * @}
- * @defgroup nrf_802154_data Functions to calculate data given by the driver
- * @{
- */
-
-/**
- * @brief Converts the energy level received during the energy detection procedure to a dBm value.
- *
- * @param[in] energy_level Energy level passed by @ref nrf_802154_energy_detected.
- *
- * @return Result of the energy detection procedure in dBm.
- */
-int8_t nrf_802154_dbm_from_energy_level_calculate(uint8_t energy_level);
-
-/**
- * @brief Converts a given dBm level to a CCA energy detection threshold value.
- *
- * @param[in] dbm Energy level in dBm used to calculate the CCAEDTHRES value.
- *
- * @return Energy level value corresponding to the given dBm level that is to be written to
- * the CCACTRL register.
- */
-uint8_t nrf_802154_ccaedthres_from_dbm_calculate(int8_t dbm);
-
-/**
- * @brief Calculates the timestamp of the first symbol of the preamble in a received frame.
- *
- * @param[in] end_timestamp Timestamp of the end of the last symbol in the frame,
- * in microseconds.
- * @param[in] psdu_length Number of bytes in the frame PSDU.
- *
- * @return Timestamp of the beginning of the first preamble symbol of a given frame,
- * in microseconds.
- */
-uint32_t nrf_802154_first_symbol_timestamp_get(uint32_t end_timestamp, uint8_t psdu_length);
-
-/**
- * @}
- * @defgroup nrf_802154_transitions Functions to request FSM transitions and check current state
- * @{
- */
-
-/**
- * @brief Gets the current state of the radio.
- */
-nrf_802154_state_t nrf_802154_state_get(void);
-
-/**
- * @brief Changes the radio state to the @ref RADIO_STATE_SLEEP state.
- *
- * The sleep state is the lowest power state. In this state, the radio cannot transmit or receive
- * frames. It is the only state in which the driver releases the high-frequency clock and does not
- * request timeslots from a radio arbiter.
- *
- * @note If another module requests it, the high-frequency clock may be enabled even in the radio
- * sleep state.
- *
- * @retval true The radio changes its state to the low power mode.
- * @retval false The driver could not schedule changing state.
- */
-bool nrf_802154_sleep(void);
-
-/**
- * @brief Changes the radio state to the @ref RADIO_STATE_SLEEP state if the radio is idle.
- *
- * The sleep state is the lowest power state. In this state, the radio cannot transmit or receive
- * frames. It is the only state in which the driver releases the high-frequency clock and does not
- * request timeslots from a radio arbiter.
- *
- * @note If another module requests it, the high-frequency clock may be enabled even in the radio
- * sleep state.
- *
- * @retval NRF_802154_SLEEP_ERROR_NONE The radio changes its state to the low power mode.
- * @retval NRF_802154_SLEEP_ERROR_BUSY The driver could not schedule changing state.
- */
-nrf_802154_sleep_error_t nrf_802154_sleep_if_idle(void);
-
-/**
- * @brief Changes the radio state to @ref RADIO_STATE_RX.
- *
- * In the receive state, the radio receives frames and may automatically send ACK frames when
- * appropriate. The received frame is reported to the higher layer by a call to
- * @ref nrf_802154_received.
- *
- * @retval true The radio enters the receive state.
- * @retval false The driver could not enter the receive state.
- */
-bool nrf_802154_receive(void);
-
-/**
- * @brief Requests reception at the specified time.
- *
- * This function works as a delayed version of @ref nrf_802154_receive. It is asynchronous.
- * It queues the delayed reception using the Radio Scheduler module.
- * If the delayed reception cannot be performed (@ref nrf_802154_receive_at would return false)
- * or the requested reception timeslot is denied, @ref nrf_drv_radio802154_receive_failed is called
- * with the @ref NRF_802154_RX_ERROR_DELAYED_TIMESLOT_DENIED argument.
- *
- * If the requested reception time is in the past, the function returns false and does not
- * schedule reception.
- *
- * A scheduled reception can be cancelled by a call to @ref nrf_802154_receive_at_cancel.
- *
- * @param[in] t0 Base of delay time - absolute time used by the Timer Scheduler,
- * in microseconds (us).
- * @param[in] dt Delta of delay time from @p t0, in microseconds (us).
- * @param[in] timeout Reception timeout (counted from @p t0 + @p dt), in microseconds (us).
- * @param[in] channel Radio channel on which the frame is to be received.
- *
- * @retval true The reception procedure was scheduled.
- * @retval false The driver could not schedule the reception procedure.
- */
-bool nrf_802154_receive_at(uint32_t t0,
- uint32_t dt,
- uint32_t timeout,
- uint8_t channel);
-
-/**
- * @brief Cancels a delayed reception scheduled by a call to @ref nrf_802154_receive_at.
- *
- * If the receive window has been scheduled but has not started yet, this function prevents
- * entering the receive window. If the receive window has been scheduled and has already started,
- * the radio remains in the receive state, but a window timeout will not be reported.
- *
- * @retval true The delayed reception was scheduled and successfully cancelled.
- * @retval false No delayed reception was scheduled.
- */
-bool nrf_802154_receive_at_cancel(void);
-
-#if NRF_802154_USE_RAW_API
-/**
- * @brief Changes the radio state to @ref RADIO_STATE_TX.
- *
- * @note If the CPU is halted or interrupted while this function is executed,
- * @ref nrf_802154_transmitted or @ref nrf_802154_transmit_failed can be called before this
- * function returns a result.
- *
- * @note This function is implemented in zero-copy fashion. It passes the given buffer pointer to
- * the RADIO peripheral.
- *
- * In the transmit state, the radio transmits a given frame. If requested, it waits for
- * an ACK frame. Depending on @ref NRF_802154_ACK_TIMEOUT_ENABLED, the radio driver automatically
- * stops waiting for an ACK frame or waits indefinitely for an ACK frame. If it is configured to
- * wait, the MAC layer is responsible for calling @ref nrf_802154_receive or
- * @ref nrf_802154_sleep after the ACK timeout.
- * The transmission result is reported to the higher layer by calls to @ref nrf_802154_transmitted
- * or @ref nrf_802154_transmit_failed.
- *
- * @verbatim
- * p_data
- * v
- * +-----+-----------------------------------------------------------+------------+
- * | PHR | MAC header and payload | FCS |
- * +-----+-----------------------------------------------------------+------------+
- * | |
- * | <---------------------------- PHR -----------------------------------> |
- * @endverbatim
- *
- * @param[in] p_data Pointer to the array with data to transmit. The first byte must contain frame
- * length (including PHR and FCS). The following bytes contain data. The CRC is
- * computed automatically by the radio hardware. Therefore, the FCS field can
- * contain any bytes.
- * @param[in] cca If the driver is to perform a CCA procedure before transmission.
- *
- * @retval true The transmission procedure was scheduled.
- * @retval false The driver could not schedule the transmission procedure.
- */
-bool nrf_802154_transmit_raw(const uint8_t * p_data, bool cca);
-
-#else // NRF_802154_USE_RAW_API
-
-/**
- * @brief Changes the radio state to transmit.
- *
- * @note If the CPU is halted or interrupted while this function is executed,
- * @ref nrf_802154_transmitted or @ref nrf_802154_transmit_failed must be called before this
- * function returns a result.
- *
- * @note This function copies the given buffer. It maintains an internal buffer, which is used to
- * make a frame copy. To prevent unnecessary memory consumption and to perform zero-copy
- * transmission, use @ref nrf_802154_transmit_raw instead.
- *
- * In the transmit state, the radio transmits a given frame. If requested, it waits for
- * an ACK frame. Depending on @ref NRF_802154_ACK_TIMEOUT_ENABLED, the radio driver automatically
- * stops waiting for an ACK frame or waits indefinitely for an ACK frame. If it is configured to
- * wait, the MAC layer is responsible for calling @ref nrf_802154_receive or
- * @ref nrf_802154_sleep after the ACK timeout.
- * The transmission result is reported to the higher layer by calls to @ref nrf_802154_transmitted
- * or @ref nrf_802154_transmit_failed.
- *
- * @verbatim
- * p_data
- * v
- * +-----+-----------------------------------------------------------+------------+
- * | PHR | MAC header and payload | FCS |
- * +-----+-----------------------------------------------------------+------------+
- * | |
- * | <------------------ length -----------------------------> |
- * @endverbatim
- *
- * @param[in] p_data Pointer to the array with the payload of data to transmit. The array should
- * exclude PHR or FCS fields of the 802.15.4 frame.
- * @param[in] length Length of the given frame. This value must exclude PHR and FCS fields from
- * the given frame (exact size of buffer pointed to by @p p_data).
- * @param[in] cca If the driver is to perform a CCA procedure before transmission.
- *
- * @retval true The transmission procedure was scheduled.
- * @retval false The driver could not schedule the transmission procedure.
- */
-bool nrf_802154_transmit(const uint8_t * p_data, uint8_t length, bool cca);
-
-#endif // NRF_802154_USE_RAW_API
-
-/**
- * @brief Requests transmission at the specified time.
- *
- * @note This function is implemented in a zero-copy fashion. It passes the given buffer pointer to
- * the RADIO peripheral.
- *
- * This function works as a delayed version of @ref nrf_802154_transmit_raw. It is asynchronous.
- * It queues the delayed transmission using the Radio Scheduler module and performs it
- * at the specified time.
- *
- * If the delayed transmission is successfully performed, @ref nrf_802154_transmitted is called.
- * If the delayed transmission cannot be performed (@ref nrf_802154_transmit_raw would return false)
- * or the requested transmission timeslot is denied, @ref nrf_802154_transmit_failed with the
- * @ref NRF_802154_TX_ERROR_TIMESLOT_DENIED argument is called.
- *
- * This function is designed to transmit the first symbol of SHR at the given time.
- *
- * If the requested transmission time is in the past, the function returns false and does not
- * schedule transmission.
- *
- * A successfully scheduled transmission can be cancelled by a call
- * to @ref nrf_802154_transmit_at_cancel.
- *
- * @param[in] p_data Pointer to the array with data to transmit. The first byte must contain
- * the frame length (including PHR and FCS). The following bytes contain data.
- * The CRC is computed automatically by the radio hardware. Therefore, the FCS
- * field can contain any bytes.
- * @param[in] cca If the driver is to perform a CCA procedure before transmission.
- * @param[in] t0 Base of delay time - absolute time used by the Timer Scheduler,
- * in microseconds (us).
- * @param[in] dt Delta of delay time from @p t0, in microseconds (us).
- * @param[in] channel Radio channel on which the frame is to be transmitted.
- *
- * @retval true The transmission procedure was scheduled.
- * @retval false The driver could not schedule the transmission procedure.
- */
-bool nrf_802154_transmit_raw_at(const uint8_t * p_data,
- bool cca,
- uint32_t t0,
- uint32_t dt,
- uint8_t channel);
-
-/**
- * @brief Cancels a delayed transmission scheduled by a call to @ref nrf_802154_transmit_raw_at.
- *
- * If a delayed transmission has been scheduled but the transmission has not been started yet,
- * a call to this function prevents the transmission. If the transmission is ongoing,
- * it will not be aborted.
- *
- * If a delayed transmission has not been scheduled (or has already finished), this function does
- * not change state and returns false.
- *
- * @retval true The delayed transmission was scheduled and successfully cancelled.
- * @retval false No delayed transmission was scheduled.
- */
-bool nrf_802154_transmit_at_cancel(void);
-
-/**
- * @brief Changes the radio state to energy detection.
- *
- * In the energy detection state, the radio detects the maximum energy for a given time.
- * The result of the detection is reported to the higher layer by @ref nrf_802154_energy_detected.
- *
- * @note @ref nrf_802154_energy_detected can be called before this function returns a result.
- * @note Performing the energy detection procedure can take longer than requested in @p time_us.
- * The procedure is performed only during the timeslots granted by a radio arbiter.
- * It can be interrupted by other protocols using the radio hardware. If the procedure is
- * interrupted, it is automatically continued and the sum of time periods during which the
- * procedure is carried out is not less than the requested @p time_us.
- *
- * @param[in] time_us Duration of energy detection procedure. The given value is rounded up to
- * multiplication of 8 symbols (128 us).
- *
- * @retval true The energy detection procedure was scheduled.
- * @retval false The driver could not schedule the energy detection procedure.
- */
-bool nrf_802154_energy_detection(uint32_t time_us);
-
-/**
- * @brief Changes the radio state to @ref RADIO_STATE_CCA.
- *
- * @note @ref nrf_802154_cca_done can be called before this function returns a result.
- *
- * In the CCA state, the radio verifies if the channel is clear. The result of the verification is
- * reported to the higher layer by @ref nrf_802154_cca_done.
- *
- * @retval true The CCA procedure was scheduled.
- * @retval false The driver could not schedule the CCA procedure.
- */
-bool nrf_802154_cca(void);
-
-/**
- * @brief Changes the radio state to continuous carrier.
- *
- * @note When the radio is emitting continuous carrier signals, it blocks all transmissions on the
- * selected channel. This function is to be called only during radio tests. Do not
- * use it during normal device operation.
- *
- * @retval true The continuous carrier procedure was scheduled.
- * @retval false The driver could not schedule the continuous carrier procedure.
- */
-bool nrf_802154_continuous_carrier(void);
-
-/**
- * @}
- * @defgroup nrf_802154_calls Calls to higher layer
- * @{
- */
-
-/**
- * @brief Notifies about the start of the ACK frame transmission.
- *
- * @note This function must be very short to prevent dropping frames by the driver.
- *
- * @param[in] p_data Pointer to a buffer with PHR and PSDU of the ACK frame.
- */
-extern void nrf_802154_tx_ack_started(const uint8_t * p_data);
-
-#if NRF_802154_USE_RAW_API
-
-/**
- * @brief Notifies that a frame was received.
- *
- * @note The buffer pointed to by @p p_data is not modified by the radio driver (and cannot be used
- * to receive a frame) until @ref nrf_802154_buffer_free_raw is called.
- * @note The buffer pointed to by @p p_data may be modified by the function handler (and other
- * modules) until @ref nrf_802154_buffer_free_raw is called.
- *
- * @verbatim
- * p_data
- * v
- * +-----+-----------------------------------------------------------+------------+
- * | PHR | MAC Header and payload | FCS |
- * +-----+-----------------------------------------------------------+------------+
- * | |
- * | <---------------------------- PHR -----------------------------------> |
- * @endverbatim
- *
- * @param[in] p_data Pointer to a buffer that contains PHR and PSDU of the received frame.
- * The first byte in the buffer is the length of the frame (PHR). The following
- * bytes contain the frame itself (PSDU). The length byte (PHR) includes FCS.
- * FCS is already verified by the hardware and may be modified by the hardware.
- * @param[in] power RSSI of the received frame.
- * @param[in] lqi LQI of the received frame.
- */
-extern void nrf_802154_received_raw(uint8_t * p_data, int8_t power, uint8_t lqi);
-
-/**
- * @brief Notifies that a frame was received at a given time.
- *
- * This function works like @ref nrf_802154_received_raw and adds a timestamp to the parameter
- * list.
- *
- * @note The received frame usually contains a timestamp. However, due to a race condition,
- * the timestamp may be invalid. This erroneous situation is indicated by
- * the @ref NRF_802154_NO_TIMESTAMP value of the @p time parameter.
- *
- * @param[in] p_data Pointer to a buffer that contains PHR and PSDU of the received frame.
- * The first byte in the buffer is the length of the frame (PHR). The following
- * bytes contain the frame itself (PSDU). The length byte (PHR) includes FCS.
- * FCS is already verified by the hardware and may be modified by the hardware.
- * @param[in] power RSSI of the received frame.
- * @param[in] lqi LQI of the received frame.
- * @param[in] time Timestamp taken when the last symbol of the frame was received, in
- * microseconds (us), or @ref NRF_802154_NO_TIMESTAMP if the timestamp
- * is invalid.
- */
-extern void nrf_802154_received_timestamp_raw(uint8_t * p_data,
- int8_t power,
- uint8_t lqi,
- uint32_t time);
-
-#else // NRF_802154_USE_RAW_API
-
-/**
- * @brief Notifies that a frame was received.
- *
- * @note The buffer pointed to by @p p_data is not modified by the radio driver (and cannot
- * be used to receive a frame) until @ref nrf_802154_buffer_free is called.
- * @note The buffer pointed to by @p p_data can be modified by the function handler (and other
- * modules) until @ref nrf_802154_buffer_free is called.
- *
- * @verbatim
- * p_data
- * v
- * +-----+-----------------------------------------------------------+------------+
- * | PHR | MAC Header and payload | FCS |
- * +-----+-----------------------------------------------------------+------------+
- * | |
- * | <------------------ length -----------------------------> |
- * @endverbatim
- *
- * @param[in] p_data Pointer to a buffer that contains only the payload of the received frame
- * (PSDU without FCS).
- * @param[in] length Length of the received payload.
- * @param[in] power RSSI of the received frame.
- * @param[in] lqi LQI of the received frame.
- */
-extern void nrf_802154_received(uint8_t * p_data, uint8_t length, int8_t power, uint8_t lqi);
-
-/**
- * @brief Notifies that a frame was received at a given time.
- *
- * This function works like @ref nrf_802154_received and adds a timestamp to the parameter list.
- *
- * @note The received frame usually contains a timestamp. However, due to a race condition,
- * the timestamp may be invalid. This erroneous situation is indicated by
- * the @ref NRF_802154_NO_TIMESTAMP value of the @p time parameter.
- *
- * @param[in] p_data Pointer to a buffer that contains only the payload of the received frame
- * (PSDU without FCS).
- * @param[in] length Length of the received payload.
- * @param[in] power RSSI of the received frame.
- * @param[in] lqi LQI of the received frame.
- * @param[in] time Timestamp taken when the last symbol of the frame was received,
- * in microseconds (us), or @ref NRF_802154_NO_TIMESTAMP if the timestamp
- * is invalid.
- */
-extern void nrf_802154_received_timestamp(uint8_t * p_data,
- uint8_t length,
- int8_t power,
- uint8_t lqi,
- uint32_t time);
-
-#endif // !NRF_802154_USE_RAW_API
-
-/**
- * @brief Notifies that the reception of a frame failed.
- *
- * @param[in] error Error code that indicates the reason of the failure.
- */
-extern void nrf_802154_receive_failed(nrf_802154_rx_error_t error);
-
-/**
- * @brief Notifies that transmitting a frame has started.
- *
- * @note Usually, @ref nrf_802154_transmitted is called shortly after this function.
- * However, if the transmit procedure is interrupted, it might happen that
- * @ref nrf_802154_transmitted is not called.
- * @note This function should be very short to prevent dropping frames by the driver.
- *
- * @param[in] p_frame Pointer to a buffer that contains PHR and PSDU of the frame being
- * transmitted.
- */
-extern void nrf_802154_tx_started(const uint8_t * p_frame);
-
-#if NRF_802154_USE_RAW_API
-
-/**
- * @brief Notifies that a frame was transmitted.
- *
- * @note If ACK was requested for the transmitted frame, this function is called after a proper ACK
- * is received. If ACK was not requested, this function is called just after transmission has
- * ended.
- * @note The buffer pointed to by @p p_ack is not modified by the radio driver (and cannot be used
- * to receive a frame) until @ref nrf_802154_buffer_free_raw is called.
- * @note The buffer pointed to by @p p_ack may be modified by the function handler (and other
- * modules) until @ref nrf_802154_buffer_free_raw is called.
- *
- * @param[in] p_frame Pointer to a buffer that contains PHR and PSDU of the transmitted frame.
- * @param[in] p_ack Pointer to a buffer that contains PHR and PSDU of the received ACK.
- * The first byte in the buffer is the length of the frame (PHR). The following
- * bytes contain the ACK frame itself (PSDU). The length byte (PHR) includes
- * FCS. FCS is already verified by the hardware and may be modified by the
- * hardware. If ACK was not requested, @p p_ack is set to NULL.
- * @param[in] power RSSI of the received frame or 0 if ACK was not requested.
- * @param[in] lqi LQI of the received frame or 0 if ACK was not requested.
- */
-extern void nrf_802154_transmitted_raw(const uint8_t * p_frame,
- uint8_t * p_ack,
- int8_t power,
- uint8_t lqi);
-
-/**
- * @brief Notifies that a frame was transmitted.
- *
- * This function works like @ref nrf_802154_transmitted_raw and adds a timestamp to the parameter
- * list.
- *
- * @note @p timestamp may be inaccurate due to software latency (IRQ handling).
- * @note @p timestamp granularity depends on the granularity of the timer driver in the
- * platform/timer directory.
- * @note Including a timestamp for received frames uses resources like CPU time and memory. If the
- * timestamp is not required, use @ref nrf_802154_received instead.
- *
- * @param[in] p_frame Pointer to a buffer that contains PHR and PSDU of the transmitted frame.
- * @param[in] p_ack Pointer to a buffer that contains PHR and PSDU of the received ACK.
- * The first byte in the buffer is the length of the frame (PHR). The following
- * bytes contain the ACK frame itself (PSDU). The length byte (PHR) includes
- * FCS. FCS is already verified by the hardware and may be modified by the
- * hardware. If ACK was not requested, @p p_ack is set to NULL.
- * @param[in] power RSSI of the received frame or 0 if ACK was not requested.
- * @param[in] lqi LQI of the received frame or 0 if ACK was not requested.
- * @param[in] time Timestamp taken when the last symbol of ACK is received or 0 if ACK was not
- * requested.
- */
-extern void nrf_802154_transmitted_timestamp_raw(const uint8_t * p_frame,
- uint8_t * p_ack,
- int8_t power,
- uint8_t lqi,
- uint32_t time);
-
-#else // NRF_802154_USE_RAW_API
-
-/**
- * @brief Notifies that a frame was transmitted.
- *
- * @note If ACK was requested for the transmitted frame, this function is called after a proper ACK
- * is received. If ACK was not requested, this function is called just after transmission has
- * ended.
- * @note The buffer pointed to by @p p_ack is not modified by the radio driver (and cannot
- * be used to receive a frame) until @ref nrf_802154_buffer_free is
- * called.
- * @note The buffer pointed to by @p p_ack may be modified by the function handler (and other
- * modules) until @ref nrf_802154_buffer_free is called.
- * @note The next higher layer must handle either @ref nrf_802154_transmitted or
- * @ref nrf_802154_transmitted_raw. It should not handle both functions.
- *
- * @param[in] p_frame Pointer to a buffer that contains PHR and PSDU of the transmitted frame.
- * @param[in] p_ack Pointer to a buffer that contains only the received ACK payload (PSDU
- * excluding FCS).
- * If ACK was not requested, @p p_ack is set to NULL.
- * @param[in] length Length of the received ACK payload or 0 if ACK was not requested.
- * @param[in] power RSSI of the received frame or 0 if ACK was not requested.
- * @param[in] lqi LQI of the received frame or 0 if ACK was not requested.
- */
-extern void nrf_802154_transmitted(const uint8_t * p_frame,
- uint8_t * p_ack,
- uint8_t length,
- int8_t power,
- uint8_t lqi);
-
-/**
- * @brief Notifies that a frame was transmitted.
- *
- * This function works like @ref nrf_802154_transmitted and adds a timestamp to the parameter
- * list.
- *
- * @note @p timestamp may be inaccurate due to software latency (IRQ handling).
- * @note @p timestamp granularity depends on the granularity of the timer driver
- * in the platform/timer directory.
- * @note Including a timestamp for received frames uses resources like CPU time and memory. If the
- * timestamp is not required, use @ref nrf_802154_received instead.
- *
- * @param[in] p_frame Pointer to the buffer containing PHR and PSDU of the transmitted frame.
- * @param[in] p_ack Pointer to the buffer containing only the received ACK payload (PSDU
- * excluding FCS).
- * If ACK was not requested, @p p_ack is set to NULL.
- * @param[in] length Length of the received ACK payload.
- * @param[in] power RSSI of the received frame or 0 if ACK was not requested.
- * @param[in] lqi LQI of the received frame or 0 if ACK was not requested.
- * @param[in] time Timestamp taken when the last symbol of ACK is received or 0 if ACK was not
- * requested.
- */
-extern void nrf_802154_transmitted_timestamp(const uint8_t * p_frame,
- uint8_t * p_ack,
- uint8_t length,
- int8_t power,
- uint8_t lqi,
- uint32_t time);
-
-#endif // !NRF_802154_USE_RAW_API
-
-/**
- * @brief Notifies that a frame was not transmitted due to a busy channel.
- *
- * This function is called if the transmission procedure fails.
- *
- * @param[in] p_frame Pointer to a buffer that contains PHR and PSDU of the frame that was not
- * transmitted.
- * @param[in] error Reason of the failure.
- */
-extern void nrf_802154_transmit_failed(const uint8_t * p_frame,
- nrf_802154_tx_error_t error);
-
-/**
- * @brief Notifies that the energy detection procedure finished.
- *
- * @note This function passes the EnergyLevel defined in the 802.15.4-2006 specification:
- * 0x00 - 0xff, proportionally to the detected energy level (dBm above receiver sensitivity).
- * To calculate the result in dBm, use @ref nrf_802154_dbm_from_energy_level_calculate.
- *
- * @param[in] result Maximum energy detected during the energy detection procedure.
- */
-extern void nrf_802154_energy_detected(uint8_t result);
-
-/**
- * @brief Notifies that the energy detection procedure failed.
- *
- * @param[in] error Reason of the failure.
- */
-extern void nrf_802154_energy_detection_failed(nrf_802154_ed_error_t error);
-
-/**
- * @brief Notifies that the CCA procedure has finished.
- *
- * @param[in] channel_free Indication if the channel is free.
- */
-extern void nrf_802154_cca_done(bool channel_free);
-
-/**
- * @brief Notifies that the CCA procedure failed.
- *
- * @param[in] error Reason of the failure.
- */
-extern void nrf_802154_cca_failed(nrf_802154_cca_error_t error);
-
-/**
- * @}
- * @defgroup nrf_802154_memman Driver memory management
- * @{
- */
-
-#if NRF_802154_USE_RAW_API
-
-/**
- * @brief Notifies the driver that the buffer containing the received frame is not used anymore.
- *
- * @note The buffer pointed to by @p p_data may be modified by this function.
- * @note This function can be safely called only from the main context. To free the buffer from
- * a callback or the IRQ context, use @ref nrf_802154_buffer_free_immediately_raw.
- *
- * @param[in] p_data Pointer to the buffer containing the received data that is no longer needed
- * by the higher layer.
- */
-void nrf_802154_buffer_free_raw(uint8_t * p_data);
-
-/**
- * @brief Notifies the driver that the buffer containing the received frame is not used anymore.
- *
- * @note The buffer pointed to by @p p_data may be modified by this function.
- * @note This function can be safely called from any context. If the driver is busy processing
- * a request called from a context with lower priority, this function returns false and
- * the caller should free the buffer later.
- *
- * @param[in] p_data Pointer to the buffer containing the received data that is no longer needed
- * by the higher layer.
- *
- * @retval true Buffer was freed successfully.
- * @retval false Buffer cannot be freed right now due to ongoing operation.
- */
-bool nrf_802154_buffer_free_immediately_raw(uint8_t * p_data);
-
-#else // NRF_802154_USE_RAW_API
-
-/**
- * @brief Notifies the driver that the buffer containing the received frame is not used anymore.
- *
- * @note The buffer pointed to by @p p_data may be modified by this function.
- * @note This function can be safely called only from the main context. To free the buffer from
- * a callback or IRQ context, use @ref nrf_802154_buffer_free_immediately.
- *
- * @param[in] p_data Pointer to the buffer containing the received data that is no longer needed
- * by the higher layer.
- */
-void nrf_802154_buffer_free(uint8_t * p_data);
-
-/**
- * @brief Notifies the driver that the buffer containing the received frame is not used anymore.
- *
- * @note The buffer pointed to by @p p_data may be modified by this function.
- * @note This function can be safely called from any context. If the driver is busy processing
- * a request called from a context with lower priority, this function returns false and
- * the caller should free the buffer later.
- *
- * @param[in] p_data Pointer to the buffer containing the received data that is no longer needed
- * by the higher layer.
- *
- * @retval true Buffer was freed successfully.
- * @retval false Buffer cannot be freed right now due to ongoing operation.
- */
-bool nrf_802154_buffer_free_immediately(uint8_t * p_data);
-
-#endif // NRF_802154_USE_RAW_API
-
-/**
- * @}
- * @defgroup nrf_802154_rssi RSSI measurement function
- * @{
- */
-
-/**
- * @brief Begins the RSSI measurement.
- *
- * @note This function is to be called in the @ref RADIO_STATE_RX state.
- *
- * The result will be available after the measurement process is finished. The result can be read by
- * @ref nrf_802154_rssi_last_get. Check the documentation of the RADIO peripheral to check
- * the duration of the RSSI measurement procedure.
- *
- * @retval true RSSI measurement successfully requested.
- * @retval false RSSI measurement cannot be scheduled at the moment.
- */
-bool nrf_802154_rssi_measure_begin(void);
-
-/**
- * @brief Gets the result of the last RSSI measurement.
- *
- * @returns RSSI measurement result, in dBm.
- */
-int8_t nrf_802154_rssi_last_get(void);
-
-/**
- * @}
- * @defgroup nrf_802154_prom Promiscuous mode
- * @{
- */
-
-/**
- * @brief Enables or disables the promiscuous radio mode.
- *
- * @note The promiscuous mode is disabled by default.
- *
- * In the promiscuous mode, the driver notifies the higher layer that it received any frame
- * (regardless frame type or destination address).
- * In normal mode (not promiscuous), the higher layer is not notified about ACK frames and frames
- * with unknown type. Also, frames with a destination address not matching the device address are
- * ignored.
- *
- * @param[in] enabled If the promiscuous mode is to be enabled.
- */
-void nrf_802154_promiscuous_set(bool enabled);
-
-/**
- * @brief Checks if the radio is in the promiscuous mode.
- *
- * @retval True Radio is in the promiscuous mode.
- * @retval False Radio is not in the promiscuous mode.
- */
-bool nrf_802154_promiscuous_get(void);
-
-/**
- * @}
- * @defgroup nrf_802154_autoack Auto ACK management
- * @{
- */
-
-/**
- * @brief Enables or disables the automatic acknowledgments (auto ACK).
- *
- * @note The auto ACK is enabled by default.
- *
- * If the auto ACK is enabled, the driver prepares and sends ACK frames automatically
- * aTurnaroundTime (192 us) after the proper frame is received. The driver prepares an ACK frame
- * according to the data provided by @ref nrf_802154_ack_data_set.
- * When the auto ACK is enabled, the driver notifies the next higher layer about the received frame
- * after the ACK frame is transmitted.
- * If the auto ACK is disabled, the driver does not transmit ACK frames. It notifies the next higher
- * layer about the received frames when a frame is received. In this mode, the next higher layer is
- * responsible for sending the ACK frame. ACK frames should be sent using @ref nrf_802154_transmit.
- *
- * @param[in] enabled If the auto ACK should be enabled.
- */
-void nrf_802154_auto_ack_set(bool enabled);
-
-/**
- * @brief Checks if the auto ACK is enabled.
- *
- * @retval True Auto ACK is enabled.
- * @retval False Auto ACK is disabled.
- */
-bool nrf_802154_auto_ack_get(void);
-
-/**
- * @brief Configures the device as the PAN coordinator.
- *
- * @note That information is used for packet filtering.
- *
- * @param[in] enabled The radio is configured as the PAN coordinator.
- */
-void nrf_802154_pan_coord_set(bool enabled);
-
-/**
- * @brief Checks if the radio is configured as the PAN coordinator.
- *
- * @retval true The radio is configured as the PAN coordinator.
- * @retval false The radio is not configured as the PAN coordinator.
- */
-bool nrf_802154_pan_coord_get(void);
-
-/**
- * @brief Adds the address of a peer node for which the provided ACK data is to be set.
- *
- * @param[in] p_addr Array of bytes containing the address of the node (little-endian).
- * @param[in] extended If the given address is an extended MAC address or a short MAC address.
- * @param[in] p_data Pointer to the buffer containing data to be set.
- * @param[in] length Length of @p p_data.
- * @param[in] data_type Type of data to be set. Refer to the @ref nrf_802154_ack_data_t type.
- *
- * @retval True Address successfully added to the list.
- * @retval False Not enough memory to store this address in the list.
- */
-bool nrf_802154_ack_data_set(const uint8_t * p_addr,
- bool extended,
- const void * p_data,
- uint16_t length,
- uint8_t data_type);
-
-/**
- * @brief Removes the address of a peer node for which the ACK data is set.
- *
- * The ACK data that was previously set for the given address is automatically removed.
- *
- * @param[in] p_addr Array of bytes containing the address of the node (little-endian).
- * @param[in] extended If the given address is an extended MAC address or a short MAC address.
- * @param[in] data_type Type of data to be removed. Refer to the @ref nrf_802154_ack_data_t type.
- *
- * @retval True Address removed from the list.
- * @retval False Address not found in the list.
- */
-bool nrf_802154_ack_data_clear(const uint8_t * p_addr, bool extended, uint8_t data_type);
-
-/**
- * @brief Enables or disables setting a pending bit in automatically transmitted ACK frames.
- *
- * @note Setting a pending bit in automatically transmitted ACK frames is enabled by default.
- *
- * The radio driver automatically sends ACK frames in response frames destined for this node with
- * the ACK Request bit set. The pending bit in the ACK frame can be set or cleared regarding data
- * in the indirect queue destined for the ACK destination.
- *
- * If setting a pending bit in ACK frames is disabled, the pending bit in every ACK frame is set.
- * If setting a pending bit in ACK frames is enabled, the radio driver checks if there is data
- * in the indirect queue destined for the ACK destination. If there is no such data,
- * the pending bit is cleared.
- *
- * @note Due to the ISR latency, the radio driver might not be able to verify if there is data
- * in the indirect queue before ACK is sent. In this case, the pending bit is set.
- *
- * @param[in] enabled If setting a pending bit in ACK frames is enabled.
- */
-void nrf_802154_auto_pending_bit_set(bool enabled);
-
-/**
- * @brief Adds address of a peer node for which there is pending data in the buffer.
- *
- * @note This function makes a copy of the given address.
- *
- * @param[in] p_addr Array of bytes containing the address of the node (little-endian).
- * @param[in] extended If the given address is an extended MAC address or a short MAC address.
- *
- * @retval True The address is successfully added to the list.
- * @retval False Not enough memory to store the address in the list.
- */
-bool nrf_802154_pending_bit_for_addr_set(const uint8_t * p_addr, bool extended);
-
-/**
- * @brief Removes address of a peer node for which there is no more pending data in the buffer.
- *
- * @param[in] p_addr Array of bytes containing the address of the node (little-endian).
- * @param[in] extended If the given address is an extended MAC address or a short MAC address.
- *
- * @retval True The address is successfully removed from the list.
- * @retval False No such address in the list.
- */
-bool nrf_802154_pending_bit_for_addr_clear(const uint8_t * p_addr, bool extended);
-
-/**
- * @brief Removes all addresses of a given type from the pending bit list.
- *
- * @param[in] extended If the function is to remove all extended MAC addresses or all short
- * addresses.
- */
-void nrf_802154_pending_bit_for_addr_reset(bool extended);
-
-/**
- * @}
- * @defgroup nrf_802154_cca CCA configuration management
- * @{
- */
-
-/**
- * @brief Configures the radio CCA mode and threshold.
- *
- * @param[in] p_cca_cfg Pointer to the CCA configuration structure. Only fields relevant to
- * the selected mode are updated.
- */
-void nrf_802154_cca_cfg_set(const nrf_802154_cca_cfg_t * p_cca_cfg);
-
-/**
- * @brief Gets the current radio CCA configuration.
- *
- * @param[out] p_cca_cfg Pointer to the structure for the current CCA configuration.
- */
-void nrf_802154_cca_cfg_get(nrf_802154_cca_cfg_t * p_cca_cfg);
-
-/**
- * @}
- * @defgroup nrf_802154_csma CSMA-CA procedure
- * @{
- */
-#if NRF_802154_CSMA_CA_ENABLED
-#if NRF_802154_USE_RAW_API
-
-/**
- * @brief Performs the CSMA-CA procedure and transmits a frame in case of success.
- *
- * The end of the CSMA-CA procedure is notified by @ref nrf_802154_transmitted_raw or
- * @ref nrf_802154_transmit_failed.
- *
- * @note The driver may be configured to automatically time out waiting for an ACK frame depending
- * on @ref NRF_802154_ACK_TIMEOUT_ENABLED. If the automatic ACK timeout is disabled,
- * the CSMA-CA procedure does not time out waiting for an ACK frame if a frame
- * with the ACK request bit set was transmitted. The MAC layer is expected to manage the timer
- * to time out waiting for the ACK frame. This timer can be started
- * by @ref nrf_802154_tx_started. When the timer expires, the MAC layer is expected
- * to call @ref nrf_802154_receive or @ref nrf_802154_sleep to stop waiting for the ACK frame.
- *
- * @param[in] p_data Pointer to the frame to transmit. See also @ref nrf_802154_transmit_raw.
- */
-void nrf_802154_transmit_csma_ca_raw(const uint8_t * p_data);
-
-#else // NRF_802154_USE_RAW_API
-
-/**
- * @brief Performs the CSMA-CA procedure and transmits a frame in case of success.
- *
- * The end of the CSMA-CA procedure is notified by @ref nrf_802154_transmitted or
- * @ref nrf_802154_transmit_failed.
- *
- * @note The driver may be configured to automatically time out waiting for an ACK frame depending
- * on @ref NRF_802154_ACK_TIMEOUT_ENABLED. If the automatic ACK timeout is disabled,
- * the CSMA-CA procedure does not time out waiting for an ACK frame if a frame
- * with the ACK request bit set was transmitted. The MAC layer is expected to manage the timer
- * to time out waiting for the ACK frame. This timer can be started
- * by @ref nrf_802154_tx_started. When the timer expires, the MAC layer is expected
- * to call @ref nrf_802154_receive or @ref nrf_802154_sleep to stop waiting for the ACK frame.
- *
- * @param[in] p_data Pointer to the frame to transmit. See also @ref nrf_802154_transmit.
- * @param[in] length Length of the given frame. See also @ref nrf_802154_transmit.
- */
-void nrf_802154_transmit_csma_ca(const uint8_t * p_data, uint8_t length);
-
-#endif // NRF_802154_USE_RAW_API
-#endif // NRF_802154_CSMA_CA_ENABLED
-
-/**
- * @}
- * @defgroup nrf_802154_timeout ACK timeout procedure
- * @{
- */
-#if NRF_802154_ACK_TIMEOUT_ENABLED
-
-/**
- * @brief Sets timeout for the ACK timeout feature.
- *
- * A timeout is notified by @ref nrf_802154_transmit_failed.
- *
- * @param[in] time Timeout in microseconds (us).
- * A default value is defined in nrf_802154_config.h.
- */
-void nrf_802154_ack_timeout_set(uint32_t time);
-
-#endif // NRF_802154_ACK_TIMEOUT_ENABLED
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* NRF_802154_H_ */
-
-/** @} */
+/* Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @defgroup nrf_802154 802.15.4 radio driver
+ * @{
+ *
+ */
+
+#ifndef NRF_802154_H_
+#define NRF_802154_H_
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "nrf_802154_config.h"
+#include "nrf_802154_types.h"
+
+#include "nrf_ppi.h"
+
+#if ENABLE_FEM
+#include "fem/nrf_fem_protocol_api.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Timestamp value indicating that the timestamp is inaccurate.
+ */
+#define NRF_802154_NO_TIMESTAMP 0
+
+/**
+ * @brief Initializes the 802.15.4 driver.
+ *
+ * This function initializes the RADIO peripheral in the @ref RADIO_STATE_SLEEP state.
+ *
+ * @note This function is to be called once, before any other functions from this module.
+ */
+void nrf_802154_init(void);
+
+/**
+ * @brief Deinitializes the 802.15.4 driver.
+ *
+ * This function deinitializes the RADIO peripheral and resets it to the default state.
+ */
+void nrf_802154_deinit(void);
+
+#if !NRF_802154_INTERNAL_RADIO_IRQ_HANDLING
+/**
+ * @brief Handles the interrupt request from the RADIO peripheral.
+ *
+ * @note If NRF_802154_INTERNAL_RADIO_IRQ_HANDLING is enabled, the driver internally handles the
+ * RADIO IRQ, and this function must not be called.
+ *
+ * This function is intended for use in an operating system environment, where the OS handles IRQ
+ * and indirectly passes it to the driver, or with a RAAL implementation that indirectly passes
+ * radio IRQ to the driver (that is, SoftDevice).
+ */
+void nrf_802154_radio_irq_handler(void);
+#endif // !NRF_802154_INTERNAL_RADIO_IRQ_HANDLING
+
+/**
+ * @brief Sets the channel on which the radio is to operate.
+ *
+ * @param[in] channel Channel number (11-26).
+ */
+void nrf_802154_channel_set(uint8_t channel);
+
+/**
+ * @brief Gets the channel on which the radio operates.
+ *
+ * @returns Channel number (11-26).
+ */
+uint8_t nrf_802154_channel_get(void);
+
+/**
+ * @brief Sets the transmit power.
+ *
+ * @note The driver recalculates the requested value to the nearest value accepted by the hardware.
+ * The calculation result is rounded up.
+ *
+ * @param[in] power Transmit power in dBm.
+ */
+void nrf_802154_tx_power_set(int8_t power);
+
+/**
+ * @brief Gets the currently set transmit power.
+ *
+ * @returns Currently used transmit power, in dBm.
+ */
+int8_t nrf_802154_tx_power_get(void);
+
+/**
+ * @defgroup nrf_802154_frontend Frontend Module management
+ * @{
+ */
+
+#if ENABLE_FEM
+
+/** Structure that contains the run-time configuration of the Frontend Module. */
+typedef nrf_fem_control_cfg_t nrf_802154_fem_control_cfg_t;
+
+/** Macro with the default configuration of the Frontend Module. */
+#define NRF_802154_FEM_DEFAULT_SETTINGS \
+ ((nrf_802154_fem_control_cfg_t) { \
+ .pa_cfg = { \
+ .enable = 1, \
+ .active_high = 1, \
+ .gpio_pin = NRF_FEM_CONTROL_DEFAULT_PA_PIN, \
+ }, \
+ .lna_cfg = { \
+ .enable = 1, \
+ .active_high = 1, \
+ .gpio_pin = NRF_FEM_CONTROL_DEFAULT_LNA_PIN, \
+ }, \
+ .pa_gpiote_ch_id = NRF_FEM_CONTROL_DEFAULT_PA_GPIOTE_CHANNEL, \
+ .lna_gpiote_ch_id = NRF_FEM_CONTROL_DEFAULT_LNA_GPIOTE_CHANNEL, \
+ .ppi_ch_id_set = NRF_FEM_CONTROL_DEFAULT_SET_PPI_CHANNEL, \
+ .ppi_ch_id_clr = NRF_FEM_CONTROL_DEFAULT_CLR_PPI_CHANNEL, \
+ })
+
+/**
+ * @brief Sets the PA & LNA GPIO toggle configuration.
+ *
+ * @note This function must not be called when the radio is in use.
+ *
+ * @note This function is deprecated. Only to be used with Skyworks module.
+ * Consider using nrf_fem_interface_configuration_set instead.
+ *
+ * @param[in] p_cfg Pointer to the PA & LNA GPIO toggle configuration.
+ *
+ */
+void nrf_802154_fem_control_cfg_set(nrf_802154_fem_control_cfg_t const * const p_cfg);
+
+/**
+ * @brief Get the PA & LNA GPIO toggle configuration.
+ *
+ * @param[out] p_cfg Pointer to the structure for the PA & LNA GPIO toggle configuration.
+ *
+ * @note This function is deprecated. Only to be used with Skyworks module.
+ * Consider using nrf_fem_interface_configuration_get instead.
+ *
+ */
+void nrf_802154_fem_control_cfg_get(nrf_802154_fem_control_cfg_t * p_cfg);
+
+#endif // ENABLE_FEM
+
+/**
+ * @}
+ * @defgroup nrf_802154_addresses Setting addresses and PAN ID of the device
+ * @{
+ */
+
+/**
+ * @brief Sets the PAN ID used by the device.
+ *
+ * @param[in] p_pan_id Pointer to the PAN ID (2 bytes, little-endian).
+ *
+ * This function makes a copy of the PAN ID.
+ */
+void nrf_802154_pan_id_set(const uint8_t * p_pan_id);
+
+/**
+ * @brief Sets the extended address of the device.
+ *
+ * @param[in] p_extended_address Pointer to the extended address (8 bytes, little-endian).
+ *
+ * This function makes a copy of the address.
+ */
+void nrf_802154_extended_address_set(const uint8_t * p_extended_address);
+
+/**
+ * @brief Sets the short address of the device.
+ *
+ * @param[in] p_short_address Pointer to the short address (2 bytes, little-endian).
+ *
+ * This function makes a copy of the address.
+ */
+void nrf_802154_short_address_set(const uint8_t * p_short_address);
+
+/**
+ * @}
+ * @defgroup nrf_802154_data Functions to calculate data given by the driver
+ * @{
+ */
+
+/**
+ * @brief Converts the energy level received during the energy detection procedure to a dBm value.
+ *
+ * @param[in] energy_level Energy level passed by @ref nrf_802154_energy_detected.
+ *
+ * @return Result of the energy detection procedure in dBm.
+ */
+int8_t nrf_802154_dbm_from_energy_level_calculate(uint8_t energy_level);
+
+/**
+ * @brief Converts a given dBm level to a CCA energy detection threshold value.
+ *
+ * @param[in] dbm Energy level in dBm used to calculate the CCAEDTHRES value.
+ *
+ * @return Energy level value corresponding to the given dBm level that is to be written to
+ * the CCACTRL register.
+ */
+uint8_t nrf_802154_ccaedthres_from_dbm_calculate(int8_t dbm);
+
+/**
+ * @brief Calculates the timestamp of the first symbol of the preamble in a received frame.
+ *
+ * @param[in] end_timestamp Timestamp of the end of the last symbol in the frame,
+ * in microseconds.
+ * @param[in] psdu_length Number of bytes in the frame PSDU.
+ *
+ * @return Timestamp of the beginning of the first preamble symbol of a given frame,
+ * in microseconds.
+ */
+uint32_t nrf_802154_first_symbol_timestamp_get(uint32_t end_timestamp, uint8_t psdu_length);
+
+/**
+ * @}
+ * @defgroup nrf_802154_transitions Functions to request FSM transitions and check current state
+ * @{
+ */
+
+/**
+ * @brief Gets the current state of the radio.
+ */
+nrf_802154_state_t nrf_802154_state_get(void);
+
+/**
+ * @brief Changes the radio state to the @ref RADIO_STATE_SLEEP state.
+ *
+ * The sleep state is the lowest power state. In this state, the radio cannot transmit or receive
+ * frames. It is the only state in which the driver releases the high-frequency clock and does not
+ * request timeslots from a radio arbiter.
+ *
+ * @note If another module requests it, the high-frequency clock may be enabled even in the radio
+ * sleep state.
+ *
+ * @retval true The radio changes its state to the low power mode.
+ * @retval false The driver could not schedule changing state.
+ */
+bool nrf_802154_sleep(void);
+
+/**
+ * @brief Changes the radio state to the @ref RADIO_STATE_SLEEP state if the radio is idle.
+ *
+ * The sleep state is the lowest power state. In this state, the radio cannot transmit or receive
+ * frames. It is the only state in which the driver releases the high-frequency clock and does not
+ * request timeslots from a radio arbiter.
+ *
+ * @note If another module requests it, the high-frequency clock may be enabled even in the radio
+ * sleep state.
+ *
+ * @retval NRF_802154_SLEEP_ERROR_NONE The radio changes its state to the low power mode.
+ * @retval NRF_802154_SLEEP_ERROR_BUSY The driver could not schedule changing state.
+ */
+nrf_802154_sleep_error_t nrf_802154_sleep_if_idle(void);
+
+/**
+ * @brief Changes the radio state to @ref RADIO_STATE_RX.
+ *
+ * In the receive state, the radio receives frames and may automatically send ACK frames when
+ * appropriate. The received frame is reported to the higher layer by a call to
+ * @ref nrf_802154_received.
+ *
+ * @retval true The radio enters the receive state.
+ * @retval false The driver could not enter the receive state.
+ */
+bool nrf_802154_receive(void);
+
+/**
+ * @brief Requests reception at the specified time.
+ *
+ * This function works as a delayed version of @ref nrf_802154_receive. It is asynchronous.
+ * It queues the delayed reception using the Radio Scheduler module.
+ * If the delayed reception cannot be performed (@ref nrf_802154_receive_at would return false)
+ * or the requested reception timeslot is denied, @ref nrf_drv_radio802154_receive_failed is called
+ * with the @ref NRF_802154_RX_ERROR_DELAYED_TIMESLOT_DENIED argument.
+ *
+ * If the requested reception time is in the past, the function returns false and does not
+ * schedule reception.
+ *
+ * A scheduled reception can be cancelled by a call to @ref nrf_802154_receive_at_cancel.
+ *
+ * @param[in] t0 Base of delay time - absolute time used by the Timer Scheduler,
+ * in microseconds (us).
+ * @param[in] dt Delta of delay time from @p t0, in microseconds (us).
+ * @param[in] timeout Reception timeout (counted from @p t0 + @p dt), in microseconds (us).
+ * @param[in] channel Radio channel on which the frame is to be received.
+ *
+ * @retval true The reception procedure was scheduled.
+ * @retval false The driver could not schedule the reception procedure.
+ */
+bool nrf_802154_receive_at(uint32_t t0,
+ uint32_t dt,
+ uint32_t timeout,
+ uint8_t channel);
+
+/**
+ * @brief Cancels a delayed reception scheduled by a call to @ref nrf_802154_receive_at.
+ *
+ * If the receive window has been scheduled but has not started yet, this function prevents
+ * entering the receive window. If the receive window has been scheduled and has already started,
+ * the radio remains in the receive state, but a window timeout will not be reported.
+ *
+ * @retval true The delayed reception was scheduled and successfully cancelled.
+ * @retval false No delayed reception was scheduled.
+ */
+bool nrf_802154_receive_at_cancel(void);
+
+#if NRF_802154_USE_RAW_API
+/**
+ * @brief Changes the radio state to @ref RADIO_STATE_TX.
+ *
+ * @note If the CPU is halted or interrupted while this function is executed,
+ * @ref nrf_802154_transmitted or @ref nrf_802154_transmit_failed can be called before this
+ * function returns a result.
+ *
+ * @note This function is implemented in zero-copy fashion. It passes the given buffer pointer to
+ * the RADIO peripheral.
+ *
+ * In the transmit state, the radio transmits a given frame. If requested, it waits for
+ * an ACK frame. Depending on @ref NRF_802154_ACK_TIMEOUT_ENABLED, the radio driver automatically
+ * stops waiting for an ACK frame or waits indefinitely for an ACK frame. If it is configured to
+ * wait, the MAC layer is responsible for calling @ref nrf_802154_receive or
+ * @ref nrf_802154_sleep after the ACK timeout.
+ * The transmission result is reported to the higher layer by calls to @ref nrf_802154_transmitted
+ * or @ref nrf_802154_transmit_failed.
+ *
+ * @verbatim
+ * p_data
+ * v
+ * +-----+-----------------------------------------------------------+------------+
+ * | PHR | MAC header and payload | FCS |
+ * +-----+-----------------------------------------------------------+------------+
+ * | |
+ * | <---------------------------- PHR -----------------------------------> |
+ * @endverbatim
+ *
+ * @param[in] p_data Pointer to the array with data to transmit. The first byte must contain frame
+ * length (including PHR and FCS). The following bytes contain data. The CRC is
+ * computed automatically by the radio hardware. Therefore, the FCS field can
+ * contain any bytes.
+ * @param[in] cca If the driver is to perform a CCA procedure before transmission.
+ *
+ * @retval true The transmission procedure was scheduled.
+ * @retval false The driver could not schedule the transmission procedure.
+ */
+bool nrf_802154_transmit_raw(const uint8_t * p_data, bool cca);
+
+#else // NRF_802154_USE_RAW_API
+
+/**
+ * @brief Changes the radio state to transmit.
+ *
+ * @note If the CPU is halted or interrupted while this function is executed,
+ * @ref nrf_802154_transmitted or @ref nrf_802154_transmit_failed must be called before this
+ * function returns a result.
+ *
+ * @note This function copies the given buffer. It maintains an internal buffer, which is used to
+ * make a frame copy. To prevent unnecessary memory consumption and to perform zero-copy
+ * transmission, use @ref nrf_802154_transmit_raw instead.
+ *
+ * In the transmit state, the radio transmits a given frame. If requested, it waits for
+ * an ACK frame. Depending on @ref NRF_802154_ACK_TIMEOUT_ENABLED, the radio driver automatically
+ * stops waiting for an ACK frame or waits indefinitely for an ACK frame. If it is configured to
+ * wait, the MAC layer is responsible for calling @ref nrf_802154_receive or
+ * @ref nrf_802154_sleep after the ACK timeout.
+ * The transmission result is reported to the higher layer by calls to @ref nrf_802154_transmitted
+ * or @ref nrf_802154_transmit_failed.
+ *
+ * @verbatim
+ * p_data
+ * v
+ * +-----+-----------------------------------------------------------+------------+
+ * | PHR | MAC header and payload | FCS |
+ * +-----+-----------------------------------------------------------+------------+
+ * | |
+ * | <------------------ length -----------------------------> |
+ * @endverbatim
+ *
+ * @param[in] p_data Pointer to the array with the payload of data to transmit. The array should
+ * exclude PHR or FCS fields of the 802.15.4 frame.
+ * @param[in] length Length of the given frame. This value must exclude PHR and FCS fields from
+ * the given frame (exact size of buffer pointed to by @p p_data).
+ * @param[in] cca If the driver is to perform a CCA procedure before transmission.
+ *
+ * @retval true The transmission procedure was scheduled.
+ * @retval false The driver could not schedule the transmission procedure.
+ */
+bool nrf_802154_transmit(const uint8_t * p_data, uint8_t length, bool cca);
+
+#endif // NRF_802154_USE_RAW_API
+
+/**
+ * @brief Requests transmission at the specified time.
+ *
+ * @note This function is implemented in a zero-copy fashion. It passes the given buffer pointer to
+ * the RADIO peripheral.
+ *
+ * This function works as a delayed version of @ref nrf_802154_transmit_raw. It is asynchronous.
+ * It queues the delayed transmission using the Radio Scheduler module and performs it
+ * at the specified time.
+ *
+ * If the delayed transmission is successfully performed, @ref nrf_802154_transmitted is called.
+ * If the delayed transmission cannot be performed (@ref nrf_802154_transmit_raw would return false)
+ * or the requested transmission timeslot is denied, @ref nrf_802154_transmit_failed with the
+ * @ref NRF_802154_TX_ERROR_TIMESLOT_DENIED argument is called.
+ *
+ * This function is designed to transmit the first symbol of SHR at the given time.
+ *
+ * If the requested transmission time is in the past, the function returns false and does not
+ * schedule transmission.
+ *
+ * A successfully scheduled transmission can be cancelled by a call
+ * to @ref nrf_802154_transmit_at_cancel.
+ *
+ * @param[in] p_data Pointer to the array with data to transmit. The first byte must contain
+ * the frame length (including PHR and FCS). The following bytes contain data.
+ * The CRC is computed automatically by the radio hardware. Therefore, the FCS
+ * field can contain any bytes.
+ * @param[in] cca If the driver is to perform a CCA procedure before transmission.
+ * @param[in] t0 Base of delay time - absolute time used by the Timer Scheduler,
+ * in microseconds (us).
+ * @param[in] dt Delta of delay time from @p t0, in microseconds (us).
+ * @param[in] channel Radio channel on which the frame is to be transmitted.
+ *
+ * @retval true The transmission procedure was scheduled.
+ * @retval false The driver could not schedule the transmission procedure.
+ */
+bool nrf_802154_transmit_raw_at(const uint8_t * p_data,
+ bool cca,
+ uint32_t t0,
+ uint32_t dt,
+ uint8_t channel);
+
+/**
+ * @brief Cancels a delayed transmission scheduled by a call to @ref nrf_802154_transmit_raw_at.
+ *
+ * If a delayed transmission has been scheduled but the transmission has not been started yet,
+ * a call to this function prevents the transmission. If the transmission is ongoing,
+ * it will not be aborted.
+ *
+ * If a delayed transmission has not been scheduled (or has already finished), this function does
+ * not change state and returns false.
+ *
+ * @retval true The delayed transmission was scheduled and successfully cancelled.
+ * @retval false No delayed transmission was scheduled.
+ */
+bool nrf_802154_transmit_at_cancel(void);
+
+/**
+ * @brief Changes the radio state to energy detection.
+ *
+ * In the energy detection state, the radio detects the maximum energy for a given time.
+ * The result of the detection is reported to the higher layer by @ref nrf_802154_energy_detected.
+ *
+ * @note @ref nrf_802154_energy_detected can be called before this function returns a result.
+ * @note Performing the energy detection procedure can take longer than requested in @p time_us.
+ * The procedure is performed only during the timeslots granted by a radio arbiter.
+ * It can be interrupted by other protocols using the radio hardware. If the procedure is
+ * interrupted, it is automatically continued and the sum of time periods during which the
+ * procedure is carried out is not less than the requested @p time_us.
+ *
+ * @param[in] time_us Duration of energy detection procedure. The given value is rounded up to
+ * multiplication of 8 symbols (128 us).
+ *
+ * @retval true The energy detection procedure was scheduled.
+ * @retval false The driver could not schedule the energy detection procedure.
+ */
+bool nrf_802154_energy_detection(uint32_t time_us);
+
+/**
+ * @brief Changes the radio state to @ref RADIO_STATE_CCA.
+ *
+ * @note @ref nrf_802154_cca_done can be called before this function returns a result.
+ *
+ * In the CCA state, the radio verifies if the channel is clear. The result of the verification is
+ * reported to the higher layer by @ref nrf_802154_cca_done.
+ *
+ * @retval true The CCA procedure was scheduled.
+ * @retval false The driver could not schedule the CCA procedure.
+ */
+bool nrf_802154_cca(void);
+
+/**
+ * @brief Changes the radio state to continuous carrier.
+ *
+ * @note When the radio is emitting continuous carrier signals, it blocks all transmissions on the
+ * selected channel. This function is to be called only during radio tests. Do not
+ * use it during normal device operation.
+ *
+ * @retval true The continuous carrier procedure was scheduled.
+ * @retval false The driver could not schedule the continuous carrier procedure.
+ */
+bool nrf_802154_continuous_carrier(void);
+
+/**
+ * @}
+ * @defgroup nrf_802154_calls Calls to higher layer
+ * @{
+ */
+
+/**
+ * @brief Notifies about the start of the ACK frame transmission.
+ *
+ * @note This function must be very short to prevent dropping frames by the driver.
+ *
+ * @param[in] p_data Pointer to a buffer with PHR and PSDU of the ACK frame.
+ */
+extern void nrf_802154_tx_ack_started(const uint8_t * p_data);
+
+#if NRF_802154_USE_RAW_API
+
+/**
+ * @brief Notifies that a frame was received.
+ *
+ * @note The buffer pointed to by @p p_data is not modified by the radio driver (and cannot be used
+ * to receive a frame) until @ref nrf_802154_buffer_free_raw is called.
+ * @note The buffer pointed to by @p p_data may be modified by the function handler (and other
+ * modules) until @ref nrf_802154_buffer_free_raw is called.
+ *
+ * @verbatim
+ * p_data
+ * v
+ * +-----+-----------------------------------------------------------+------------+
+ * | PHR | MAC Header and payload | FCS |
+ * +-----+-----------------------------------------------------------+------------+
+ * | |
+ * | <---------------------------- PHR -----------------------------------> |
+ * @endverbatim
+ *
+ * @param[in] p_data Pointer to a buffer that contains PHR and PSDU of the received frame.
+ * The first byte in the buffer is the length of the frame (PHR). The following
+ * bytes contain the frame itself (PSDU). The length byte (PHR) includes FCS.
+ * FCS is already verified by the hardware and may be modified by the hardware.
+ * @param[in] power RSSI of the received frame.
+ * @param[in] lqi LQI of the received frame.
+ */
+extern void nrf_802154_received_raw(uint8_t * p_data, int8_t power, uint8_t lqi);
+
+/**
+ * @brief Notifies that a frame was received at a given time.
+ *
+ * This function works like @ref nrf_802154_received_raw and adds a timestamp to the parameter
+ * list.
+ *
+ * @note The received frame usually contains a timestamp. However, due to a race condition,
+ * the timestamp may be invalid. This erroneous situation is indicated by
+ * the @ref NRF_802154_NO_TIMESTAMP value of the @p time parameter.
+ *
+ * @param[in] p_data Pointer to a buffer that contains PHR and PSDU of the received frame.
+ * The first byte in the buffer is the length of the frame (PHR). The following
+ * bytes contain the frame itself (PSDU). The length byte (PHR) includes FCS.
+ * FCS is already verified by the hardware and may be modified by the hardware.
+ * @param[in] power RSSI of the received frame.
+ * @param[in] lqi LQI of the received frame.
+ * @param[in] time Timestamp taken when the last symbol of the frame was received, in
+ * microseconds (us), or @ref NRF_802154_NO_TIMESTAMP if the timestamp
+ * is invalid.
+ */
+extern void nrf_802154_received_timestamp_raw(uint8_t * p_data,
+ int8_t power,
+ uint8_t lqi,
+ uint32_t time);
+
+#else // NRF_802154_USE_RAW_API
+
+/**
+ * @brief Notifies that a frame was received.
+ *
+ * @note The buffer pointed to by @p p_data is not modified by the radio driver (and cannot
+ * be used to receive a frame) until @ref nrf_802154_buffer_free is called.
+ * @note The buffer pointed to by @p p_data can be modified by the function handler (and other
+ * modules) until @ref nrf_802154_buffer_free is called.
+ *
+ * @verbatim
+ * p_data
+ * v
+ * +-----+-----------------------------------------------------------+------------+
+ * | PHR | MAC Header and payload | FCS |
+ * +-----+-----------------------------------------------------------+------------+
+ * | |
+ * | <------------------ length -----------------------------> |
+ * @endverbatim
+ *
+ * @param[in] p_data Pointer to a buffer that contains only the payload of the received frame
+ * (PSDU without FCS).
+ * @param[in] length Length of the received payload.
+ * @param[in] power RSSI of the received frame.
+ * @param[in] lqi LQI of the received frame.
+ */
+extern void nrf_802154_received(uint8_t * p_data, uint8_t length, int8_t power, uint8_t lqi);
+
+/**
+ * @brief Notifies that a frame was received at a given time.
+ *
+ * This function works like @ref nrf_802154_received and adds a timestamp to the parameter list.
+ *
+ * @note The received frame usually contains a timestamp. However, due to a race condition,
+ * the timestamp may be invalid. This erroneous situation is indicated by
+ * the @ref NRF_802154_NO_TIMESTAMP value of the @p time parameter.
+ *
+ * @param[in] p_data Pointer to a buffer that contains only the payload of the received frame
+ * (PSDU without FCS).
+ * @param[in] length Length of the received payload.
+ * @param[in] power RSSI of the received frame.
+ * @param[in] lqi LQI of the received frame.
+ * @param[in] time Timestamp taken when the last symbol of the frame was received,
+ * in microseconds (us), or @ref NRF_802154_NO_TIMESTAMP if the timestamp
+ * is invalid.
+ */
+extern void nrf_802154_received_timestamp(uint8_t * p_data,
+ uint8_t length,
+ int8_t power,
+ uint8_t lqi,
+ uint32_t time);
+
+#endif // !NRF_802154_USE_RAW_API
+
+/**
+ * @brief Notifies that the reception of a frame failed.
+ *
+ * @param[in] error Error code that indicates the reason of the failure.
+ */
+extern void nrf_802154_receive_failed(nrf_802154_rx_error_t error);
+
+/**
+ * @brief Notifies that transmitting a frame has started.
+ *
+ * @note Usually, @ref nrf_802154_transmitted is called shortly after this function.
+ * However, if the transmit procedure is interrupted, it might happen that
+ * @ref nrf_802154_transmitted is not called.
+ * @note This function should be very short to prevent dropping frames by the driver.
+ *
+ * @param[in] p_frame Pointer to a buffer that contains PHR and PSDU of the frame being
+ * transmitted.
+ */
+extern void nrf_802154_tx_started(const uint8_t * p_frame);
+
+#if NRF_802154_USE_RAW_API
+
+/**
+ * @brief Notifies that a frame was transmitted.
+ *
+ * @note If ACK was requested for the transmitted frame, this function is called after a proper ACK
+ * is received. If ACK was not requested, this function is called just after transmission has
+ * ended.
+ * @note The buffer pointed to by @p p_ack is not modified by the radio driver (and cannot be used
+ * to receive a frame) until @ref nrf_802154_buffer_free_raw is called.
+ * @note The buffer pointed to by @p p_ack may be modified by the function handler (and other
+ * modules) until @ref nrf_802154_buffer_free_raw is called.
+ *
+ * @param[in] p_frame Pointer to a buffer that contains PHR and PSDU of the transmitted frame.
+ * @param[in] p_ack Pointer to a buffer that contains PHR and PSDU of the received ACK.
+ * The first byte in the buffer is the length of the frame (PHR). The following
+ * bytes contain the ACK frame itself (PSDU). The length byte (PHR) includes
+ * FCS. FCS is already verified by the hardware and may be modified by the
+ * hardware. If ACK was not requested, @p p_ack is set to NULL.
+ * @param[in] power RSSI of the received frame or 0 if ACK was not requested.
+ * @param[in] lqi LQI of the received frame or 0 if ACK was not requested.
+ */
+extern void nrf_802154_transmitted_raw(const uint8_t * p_frame,
+ uint8_t * p_ack,
+ int8_t power,
+ uint8_t lqi);
+
+/**
+ * @brief Notifies that a frame was transmitted.
+ *
+ * This function works like @ref nrf_802154_transmitted_raw and adds a timestamp to the parameter
+ * list.
+ *
+ * @note @p timestamp may be inaccurate due to software latency (IRQ handling).
+ * @note @p timestamp granularity depends on the granularity of the timer driver in the
+ * platform/timer directory.
+ * @note Including a timestamp for received frames uses resources like CPU time and memory. If the
+ * timestamp is not required, use @ref nrf_802154_received instead.
+ *
+ * @param[in] p_frame Pointer to a buffer that contains PHR and PSDU of the transmitted frame.
+ * @param[in] p_ack Pointer to a buffer that contains PHR and PSDU of the received ACK.
+ * The first byte in the buffer is the length of the frame (PHR). The following
+ * bytes contain the ACK frame itself (PSDU). The length byte (PHR) includes
+ * FCS. FCS is already verified by the hardware and may be modified by the
+ * hardware. If ACK was not requested, @p p_ack is set to NULL.
+ * @param[in] power RSSI of the received frame or 0 if ACK was not requested.
+ * @param[in] lqi LQI of the received frame or 0 if ACK was not requested.
+ * @param[in] time Timestamp taken when the last symbol of ACK is received or 0 if ACK was not
+ * requested.
+ */
+extern void nrf_802154_transmitted_timestamp_raw(const uint8_t * p_frame,
+ uint8_t * p_ack,
+ int8_t power,
+ uint8_t lqi,
+ uint32_t time);
+
+#else // NRF_802154_USE_RAW_API
+
+/**
+ * @brief Notifies that a frame was transmitted.
+ *
+ * @note If ACK was requested for the transmitted frame, this function is called after a proper ACK
+ * is received. If ACK was not requested, this function is called just after transmission has
+ * ended.
+ * @note The buffer pointed to by @p p_ack is not modified by the radio driver (and cannot
+ * be used to receive a frame) until @ref nrf_802154_buffer_free is
+ * called.
+ * @note The buffer pointed to by @p p_ack may be modified by the function handler (and other
+ * modules) until @ref nrf_802154_buffer_free is called.
+ * @note The next higher layer must handle either @ref nrf_802154_transmitted or
+ * @ref nrf_802154_transmitted_raw. It should not handle both functions.
+ *
+ * @param[in] p_frame Pointer to a buffer that contains PHR and PSDU of the transmitted frame.
+ * @param[in] p_ack Pointer to a buffer that contains only the received ACK payload (PSDU
+ * excluding FCS).
+ * If ACK was not requested, @p p_ack is set to NULL.
+ * @param[in] length Length of the received ACK payload or 0 if ACK was not requested.
+ * @param[in] power RSSI of the received frame or 0 if ACK was not requested.
+ * @param[in] lqi LQI of the received frame or 0 if ACK was not requested.
+ */
+extern void nrf_802154_transmitted(const uint8_t * p_frame,
+ uint8_t * p_ack,
+ uint8_t length,
+ int8_t power,
+ uint8_t lqi);
+
+/**
+ * @brief Notifies that a frame was transmitted.
+ *
+ * This function works like @ref nrf_802154_transmitted and adds a timestamp to the parameter
+ * list.
+ *
+ * @note @p timestamp may be inaccurate due to software latency (IRQ handling).
+ * @note @p timestamp granularity depends on the granularity of the timer driver
+ * in the platform/timer directory.
+ * @note Including a timestamp for received frames uses resources like CPU time and memory. If the
+ * timestamp is not required, use @ref nrf_802154_received instead.
+ *
+ * @param[in] p_frame Pointer to the buffer containing PHR and PSDU of the transmitted frame.
+ * @param[in] p_ack Pointer to the buffer containing only the received ACK payload (PSDU
+ * excluding FCS).
+ * If ACK was not requested, @p p_ack is set to NULL.
+ * @param[in] length Length of the received ACK payload.
+ * @param[in] power RSSI of the received frame or 0 if ACK was not requested.
+ * @param[in] lqi LQI of the received frame or 0 if ACK was not requested.
+ * @param[in] time Timestamp taken when the last symbol of ACK is received or 0 if ACK was not
+ * requested.
+ */
+extern void nrf_802154_transmitted_timestamp(const uint8_t * p_frame,
+ uint8_t * p_ack,
+ uint8_t length,
+ int8_t power,
+ uint8_t lqi,
+ uint32_t time);
+
+#endif // !NRF_802154_USE_RAW_API
+
+/**
+ * @brief Notifies that a frame was not transmitted due to a busy channel.
+ *
+ * This function is called if the transmission procedure fails.
+ *
+ * @param[in] p_frame Pointer to a buffer that contains PHR and PSDU of the frame that was not
+ * transmitted.
+ * @param[in] error Reason of the failure.
+ */
+extern void nrf_802154_transmit_failed(const uint8_t * p_frame,
+ nrf_802154_tx_error_t error);
+
+/**
+ * @brief Notifies that the energy detection procedure finished.
+ *
+ * @note This function passes the EnergyLevel defined in the 802.15.4-2006 specification:
+ * 0x00 - 0xff, proportionally to the detected energy level (dBm above receiver sensitivity).
+ * To calculate the result in dBm, use @ref nrf_802154_dbm_from_energy_level_calculate.
+ *
+ * @param[in] result Maximum energy detected during the energy detection procedure.
+ */
+extern void nrf_802154_energy_detected(uint8_t result);
+
+/**
+ * @brief Notifies that the energy detection procedure failed.
+ *
+ * @param[in] error Reason of the failure.
+ */
+extern void nrf_802154_energy_detection_failed(nrf_802154_ed_error_t error);
+
+/**
+ * @brief Notifies that the CCA procedure has finished.
+ *
+ * @param[in] channel_free Indication if the channel is free.
+ */
+extern void nrf_802154_cca_done(bool channel_free);
+
+/**
+ * @brief Notifies that the CCA procedure failed.
+ *
+ * @param[in] error Reason of the failure.
+ */
+extern void nrf_802154_cca_failed(nrf_802154_cca_error_t error);
+
+/**
+ * @}
+ * @defgroup nrf_802154_memman Driver memory management
+ * @{
+ */
+
+#if NRF_802154_USE_RAW_API
+
+/**
+ * @brief Notifies the driver that the buffer containing the received frame is not used anymore.
+ *
+ * @note The buffer pointed to by @p p_data may be modified by this function.
+ * @note This function can be safely called only from the main context. To free the buffer from
+ * a callback or the IRQ context, use @ref nrf_802154_buffer_free_immediately_raw.
+ *
+ * @param[in] p_data Pointer to the buffer containing the received data that is no longer needed
+ * by the higher layer.
+ */
+void nrf_802154_buffer_free_raw(uint8_t * p_data);
+
+/**
+ * @brief Notifies the driver that the buffer containing the received frame is not used anymore.
+ *
+ * @note The buffer pointed to by @p p_data may be modified by this function.
+ * @note This function can be safely called from any context. If the driver is busy processing
+ * a request called from a context with lower priority, this function returns false and
+ * the caller should free the buffer later.
+ *
+ * @param[in] p_data Pointer to the buffer containing the received data that is no longer needed
+ * by the higher layer.
+ *
+ * @retval true Buffer was freed successfully.
+ * @retval false Buffer cannot be freed right now due to ongoing operation.
+ */
+bool nrf_802154_buffer_free_immediately_raw(uint8_t * p_data);
+
+#else // NRF_802154_USE_RAW_API
+
+/**
+ * @brief Notifies the driver that the buffer containing the received frame is not used anymore.
+ *
+ * @note The buffer pointed to by @p p_data may be modified by this function.
+ * @note This function can be safely called only from the main context. To free the buffer from
+ * a callback or IRQ context, use @ref nrf_802154_buffer_free_immediately.
+ *
+ * @param[in] p_data Pointer to the buffer containing the received data that is no longer needed
+ * by the higher layer.
+ */
+void nrf_802154_buffer_free(uint8_t * p_data);
+
+/**
+ * @brief Notifies the driver that the buffer containing the received frame is not used anymore.
+ *
+ * @note The buffer pointed to by @p p_data may be modified by this function.
+ * @note This function can be safely called from any context. If the driver is busy processing
+ * a request called from a context with lower priority, this function returns false and
+ * the caller should free the buffer later.
+ *
+ * @param[in] p_data Pointer to the buffer containing the received data that is no longer needed
+ * by the higher layer.
+ *
+ * @retval true Buffer was freed successfully.
+ * @retval false Buffer cannot be freed right now due to ongoing operation.
+ */
+bool nrf_802154_buffer_free_immediately(uint8_t * p_data);
+
+#endif // NRF_802154_USE_RAW_API
+
+/**
+ * @}
+ * @defgroup nrf_802154_rssi RSSI measurement function
+ * @{
+ */
+
+/**
+ * @brief Begins the RSSI measurement.
+ *
+ * @note This function is to be called in the @ref RADIO_STATE_RX state.
+ *
+ * The result will be available after the measurement process is finished. The result can be read by
+ * @ref nrf_802154_rssi_last_get. Check the documentation of the RADIO peripheral to check
+ * the duration of the RSSI measurement procedure.
+ *
+ * @retval true RSSI measurement successfully requested.
+ * @retval false RSSI measurement cannot be scheduled at the moment.
+ */
+bool nrf_802154_rssi_measure_begin(void);
+
+/**
+ * @brief Gets the result of the last RSSI measurement.
+ *
+ * @returns RSSI measurement result, in dBm.
+ */
+int8_t nrf_802154_rssi_last_get(void);
+
+/**
+ * @}
+ * @defgroup nrf_802154_prom Promiscuous mode
+ * @{
+ */
+
+/**
+ * @brief Enables or disables the promiscuous radio mode.
+ *
+ * @note The promiscuous mode is disabled by default.
+ *
+ * In the promiscuous mode, the driver notifies the higher layer that it received any frame
+ * (regardless frame type or destination address).
+ * In normal mode (not promiscuous), the higher layer is not notified about ACK frames and frames
+ * with unknown type. Also, frames with a destination address not matching the device address are
+ * ignored.
+ *
+ * @param[in] enabled If the promiscuous mode is to be enabled.
+ */
+void nrf_802154_promiscuous_set(bool enabled);
+
+/**
+ * @brief Checks if the radio is in the promiscuous mode.
+ *
+ * @retval True Radio is in the promiscuous mode.
+ * @retval False Radio is not in the promiscuous mode.
+ */
+bool nrf_802154_promiscuous_get(void);
+
+/**
+ * @}
+ * @defgroup nrf_802154_autoack Auto ACK management
+ * @{
+ */
+
+/**
+ * @brief Enables or disables the automatic acknowledgments (auto ACK).
+ *
+ * @note The auto ACK is enabled by default.
+ *
+ * If the auto ACK is enabled, the driver prepares and sends ACK frames automatically
+ * aTurnaroundTime (192 us) after the proper frame is received. The driver prepares an ACK frame
+ * according to the data provided by @ref nrf_802154_ack_data_set.
+ * When the auto ACK is enabled, the driver notifies the next higher layer about the received frame
+ * after the ACK frame is transmitted.
+ * If the auto ACK is disabled, the driver does not transmit ACK frames. It notifies the next higher
+ * layer about the received frames when a frame is received. In this mode, the next higher layer is
+ * responsible for sending the ACK frame. ACK frames should be sent using @ref nrf_802154_transmit.
+ *
+ * @param[in] enabled If the auto ACK should be enabled.
+ */
+void nrf_802154_auto_ack_set(bool enabled);
+
+/**
+ * @brief Checks if the auto ACK is enabled.
+ *
+ * @retval True Auto ACK is enabled.
+ * @retval False Auto ACK is disabled.
+ */
+bool nrf_802154_auto_ack_get(void);
+
+/**
+ * @brief Configures the device as the PAN coordinator.
+ *
+ * @note That information is used for packet filtering.
+ *
+ * @param[in] enabled The radio is configured as the PAN coordinator.
+ */
+void nrf_802154_pan_coord_set(bool enabled);
+
+/**
+ * @brief Checks if the radio is configured as the PAN coordinator.
+ *
+ * @retval true The radio is configured as the PAN coordinator.
+ * @retval false The radio is not configured as the PAN coordinator.
+ */
+bool nrf_802154_pan_coord_get(void);
+
+/**
+ * @brief Select the source matching algorithm.
+ *
+ * @note This method should be called after driver initialization, but before transceiver is enabled.
+ *
+ * When calling @ref nrf_802154_ack_data_pending_bit_should_be_set, one of several algorithms
+ * for source address matching will be chosen. To ensure a specific algorithm is selected,
+ * call this function before @ref rf_802154_ack_data_pending_bit_should_be_set.
+ *
+ * @param[in] match_method Source address matching method to be used.
+ */
+void nrf_802154_src_addr_matching_method_set(nrf_802154_src_addr_match_t match_method);
+
+/**
+ * @brief Adds the address of a peer node for which the provided ACK data
+ * is to be added to the pending bit list.
+ *
+ * The pending bit list works differently, depending on the upper layer for which the source
+ * address matching method is selected:
+ * - For Thread, @ref NRF_802154_SRC_ADDR_MATCH_THREAD
+ * - For Zigbee, @ref NRF_802154_SRC_ADDR_MATCH_ZIGBEE
+ * - For Standard-compliant, @ref NRF_802154_SRC_ADDR_MATCH_ALWAYS_1
+ * For more information, see @ref nrf_802154_src_addr_match_t.
+ *
+ * The method can be set during initialization phase by calling @ref nrf_802154_src_matching_method.
+ *
+ * @param[in] p_addr Array of bytes containing the address of the node (little-endian).
+ * @param[in] extended If the given address is an extended MAC address or a short MAC address.
+ * @param[in] p_data Pointer to the buffer containing data to be set.
+ * @param[in] length Length of @p p_data.
+ * @param[in] data_type Type of data to be set. Refer to the @ref nrf_802154_ack_data_t type.
+ *
+ * @retval True Address successfully added to the list.
+ * @retval False Not enough memory to store this address in the list.
+ */
+bool nrf_802154_ack_data_set(const uint8_t * p_addr,
+ bool extended,
+ const void * p_data,
+ uint16_t length,
+ uint8_t data_type);
+
+/**
+ * @brief Removes the address of a peer node for which the ACK data is set from the pending bit list.
+ *
+ * The ACK data that was previously set for the given address is automatically removed.
+ *
+ * The pending bit list works differently, depending on the upper layer for which the source
+ * address matching method is selected:
+ * - For Thread, @ref NRF_802154_SRC_ADDR_MATCH_THREAD
+ * - For Zigbee, @ref NRF_802154_SRC_ADDR_MATCH_ZIGBEE
+ * - For Standard-compliant, @ref NRF_802154_SRC_ADDR_MATCH_ALWAYS_1
+ * For more information, see @ref nrf_802154_src_addr_match_t.
+ *
+ * The method can be set during initialization phase by calling @ref nrf_802154_src_matching_method.
+ *
+ * @param[in] p_addr Array of bytes containing the address of the node (little-endian).
+ * @param[in] extended If the given address is an extended MAC address or a short MAC address.
+ * @param[in] data_type Type of data to be removed. Refer to the @ref nrf_802154_ack_data_t type.
+ *
+ * @retval True Address removed from the list.
+ * @retval False Address not found in the list.
+ */
+bool nrf_802154_ack_data_clear(const uint8_t * p_addr, bool extended, uint8_t data_type);
+
+/**
+ * @brief Enables or disables setting a pending bit in automatically transmitted ACK frames.
+ *
+ * @note Setting a pending bit in automatically transmitted ACK frames is enabled by default.
+ *
+ * The radio driver automatically sends ACK frames in response frames destined for this node with
+ * the ACK Request bit set. The pending bit in the ACK frame can be set or cleared regarding data
+ * in the indirect queue destined for the ACK destination.
+ *
+ * If setting a pending bit in ACK frames is disabled, the pending bit in every ACK frame is set.
+ * If setting a pending bit in ACK frames is enabled, the radio driver checks if there is data
+ * in the indirect queue destined for the ACK destination. If there is no such data,
+ * the pending bit is cleared.
+ *
+ * @note Due to the ISR latency, the radio driver might not be able to verify if there is data
+ * in the indirect queue before ACK is sent. In this case, the pending bit is set.
+ *
+ * @param[in] enabled If setting a pending bit in ACK frames is enabled.
+ */
+void nrf_802154_auto_pending_bit_set(bool enabled);
+
+/**
+ * @brief Adds the address of a peer node to the pending bit list.
+ *
+ * The pending bit list works differently, depending on the upper layer for which the source
+ * address matching method is selected:
+ * - For Thread, @ref NRF_802154_SRC_ADDR_MATCH_THREAD
+ * - For Zigbee, @ref NRF_802154_SRC_ADDR_MATCH_ZIGBEE
+ * - For Standard-compliant, @ref NRF_802154_SRC_ADDR_MATCH_ALWAYS_1
+ * For more information, see @ref nrf_802154_src_addr_match_t.
+ *
+ * The method can be set during initialization phase by calling @ref nrf_802154_src_matching_method.
+ *
+ * @note This function makes a copy of the given address.
+ *
+ * @param[in] p_addr Array of bytes containing the address of the node (little-endian).
+ * @param[in] extended If the given address is an extended MAC address or a short MAC address.
+ *
+ * @retval True The address is successfully added to the list.
+ * @retval False Not enough memory to store the address in the list.
+ */
+bool nrf_802154_pending_bit_for_addr_set(const uint8_t * p_addr, bool extended);
+
+/**
+ * @brief Removes address of a peer node from the pending bit list.
+ *
+ * The pending bit list works differently, depending on the upper layer for which the source
+ * address matching method is selected:
+ * - For Thread, @ref NRF_802154_SRC_ADDR_MATCH_THREAD
+ * - For Zigbee, @ref NRF_802154_SRC_ADDR_MATCH_ZIGBEE
+ * - For Standard-compliant, @ref NRF_802154_SRC_ADDR_MATCH_ALWAYS_1
+ * For more information, see @ref nrf_802154_src_addr_match_t.
+ *
+ * The method can be set during initialization phase by calling @ref nrf_802154_src_matching_method.
+ *
+ * @param[in] p_addr Array of bytes containing the address of the node (little-endian).
+ * @param[in] extended If the given address is an extended MAC address or a short MAC address.
+ *
+ * @retval True The address is successfully removed from the list.
+ * @retval False No such address in the list.
+ */
+bool nrf_802154_pending_bit_for_addr_clear(const uint8_t * p_addr, bool extended);
+
+/**
+ * @brief Removes all addresses of a given type from the pending bit list.
+ *
+ * The pending bit list works differently, depending on the upper layer for which the source
+ * address matching method is selected:
+ * - For Thread, @ref NRF_802154_SRC_ADDR_MATCH_THREAD
+ * - For Zigbee, @ref NRF_802154_SRC_ADDR_MATCH_ZIGBEE
+ * - For Standard-compliant, @ref NRF_802154_SRC_ADDR_MATCH_ALWAYS_1
+ * For more information, see @ref nrf_802154_src_addr_match_t.
+ *
+ * The method can be set during initialization phase by calling @ref nrf_802154_src_matching_method.
+ *
+ * @param[in] extended If the function is to remove all extended MAC addresses or all short
+ * addresses.
+ */
+void nrf_802154_pending_bit_for_addr_reset(bool extended);
+
+/**
+ * @}
+ * @defgroup nrf_802154_cca CCA configuration management
+ * @{
+ */
+
+/**
+ * @brief Configures the radio CCA mode and threshold.
+ *
+ * @param[in] p_cca_cfg Pointer to the CCA configuration structure. Only fields relevant to
+ * the selected mode are updated.
+ */
+void nrf_802154_cca_cfg_set(const nrf_802154_cca_cfg_t * p_cca_cfg);
+
+/**
+ * @brief Gets the current radio CCA configuration.
+ *
+ * @param[out] p_cca_cfg Pointer to the structure for the current CCA configuration.
+ */
+void nrf_802154_cca_cfg_get(nrf_802154_cca_cfg_t * p_cca_cfg);
+
+/**
+ * @}
+ * @defgroup nrf_802154_csma CSMA-CA procedure
+ * @{
+ */
+#if NRF_802154_CSMA_CA_ENABLED
+#if NRF_802154_USE_RAW_API
+
+/**
+ * @brief Performs the CSMA-CA procedure and transmits a frame in case of success.
+ *
+ * The end of the CSMA-CA procedure is notified by @ref nrf_802154_transmitted_raw or
+ * @ref nrf_802154_transmit_failed.
+ *
+ * @note The driver may be configured to automatically time out waiting for an ACK frame depending
+ * on @ref NRF_802154_ACK_TIMEOUT_ENABLED. If the automatic ACK timeout is disabled,
+ * the CSMA-CA procedure does not time out waiting for an ACK frame if a frame
+ * with the ACK request bit set was transmitted. The MAC layer is expected to manage the timer
+ * to time out waiting for the ACK frame. This timer can be started
+ * by @ref nrf_802154_tx_started. When the timer expires, the MAC layer is expected
+ * to call @ref nrf_802154_receive or @ref nrf_802154_sleep to stop waiting for the ACK frame.
+ *
+ * @param[in] p_data Pointer to the frame to transmit. See also @ref nrf_802154_transmit_raw.
+ */
+void nrf_802154_transmit_csma_ca_raw(const uint8_t * p_data);
+
+#else // NRF_802154_USE_RAW_API
+
+/**
+ * @brief Performs the CSMA-CA procedure and transmits a frame in case of success.
+ *
+ * The end of the CSMA-CA procedure is notified by @ref nrf_802154_transmitted or
+ * @ref nrf_802154_transmit_failed.
+ *
+ * @note The driver may be configured to automatically time out waiting for an ACK frame depending
+ * on @ref NRF_802154_ACK_TIMEOUT_ENABLED. If the automatic ACK timeout is disabled,
+ * the CSMA-CA procedure does not time out waiting for an ACK frame if a frame
+ * with the ACK request bit set was transmitted. The MAC layer is expected to manage the timer
+ * to time out waiting for the ACK frame. This timer can be started
+ * by @ref nrf_802154_tx_started. When the timer expires, the MAC layer is expected
+ * to call @ref nrf_802154_receive or @ref nrf_802154_sleep to stop waiting for the ACK frame.
+ *
+ * @param[in] p_data Pointer to the frame to transmit. See also @ref nrf_802154_transmit.
+ * @param[in] length Length of the given frame. See also @ref nrf_802154_transmit.
+ */
+void nrf_802154_transmit_csma_ca(const uint8_t * p_data, uint8_t length);
+
+#endif // NRF_802154_USE_RAW_API
+#endif // NRF_802154_CSMA_CA_ENABLED
+
+/**
+ * @}
+ * @defgroup nrf_802154_timeout ACK timeout procedure
+ * @{
+ */
+#if NRF_802154_ACK_TIMEOUT_ENABLED
+
+/**
+ * @brief Sets timeout for the ACK timeout feature.
+ *
+ * A timeout is notified by @ref nrf_802154_transmit_failed.
+ *
+ * @param[in] time Timeout in microseconds (us).
+ * A default value is defined in nrf_802154_config.h.
+ */
+void nrf_802154_ack_timeout_set(uint32_t time);
+
+#endif // NRF_802154_ACK_TIMEOUT_ENABLED
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* NRF_802154_H_ */
+
+/** @} */
diff --git a/third_party/NordicSemiconductor/drivers/radio/nrf_802154_config.h b/third_party/NordicSemiconductor/drivers/radio/nrf_802154_config.h
index 3c5714f..4bead86 100644
--- a/third_party/NordicSemiconductor/drivers/radio/nrf_802154_config.h
+++ b/third_party/NordicSemiconductor/drivers/radio/nrf_802154_config.h
@@ -125,71 +125,6 @@
#endif
/**
- * @def NRF_802154_TIMER_INSTANCE
- *
- * The timer instance used both by the driver for ACK IFS and by the FEM module.
- *
- */
-#ifndef NRF_802154_TIMER_INSTANCE
-#define NRF_802154_TIMER_INSTANCE NRF_TIMER1
-#endif
-
-/**
- * @def NRF_802154_COUNTER_TIMER_INSTANCE
- *
- * The timer instance used by the driver for detecting when PSDU is being received.
- *
- * @note This configuration is used only when the NRF_RADIO_EVENT_BCMATCH event handling is disabled
- * (see @ref NRF_802154_DISABLE_BCC_MATCHING).
- */
-#ifndef NRF_802154_COUNTER_TIMER_INSTANCE
-#define NRF_802154_COUNTER_TIMER_INSTANCE NRF_TIMER2
-#endif
-
-/**
- * @def NRF_802154_SWI_EGU_INSTANCE
- *
- * The SWI EGU instance used by the driver to synchronize PPIs and for requests and notifications if
- * SWI is in use.
- *
- * @note This option is used by the core module regardless of the driver configuration.
- *
- */
-#ifndef NRF_802154_SWI_EGU_INSTANCE
-
-#ifdef NRF52811_XXAA
-#define NRF_802154_SWI_EGU_INSTANCE NRF_EGU0
-#else
-#define NRF_802154_SWI_EGU_INSTANCE NRF_EGU3
-#endif
-
-#endif
-
-/**
- * @def NRF_802154_SWI_IRQ_HANDLER
- *
- * The SWI EGU IRQ handler used by the driver for requests and notifications if SWI is in use.
- *
- * @note This option is used when the driver uses SWI to process requests and notifications.
- *
- */
-#ifndef NRF_802154_SWI_IRQ_HANDLER
-#define NRF_802154_SWI_IRQ_HANDLER SWI3_EGU3_IRQHandler
-#endif
-
-/**
- * @def NRF_802154_SWI_IRQN
- *
- * The SWI EGU IRQ number used by the driver for requests and notifications if SWI is in use.
- *
- * @note This option is used when the driver uses SWI to process requests and notifications.
- *
- */
-#ifndef NRF_802154_SWI_IRQN
-#define NRF_802154_SWI_IRQN SWI3_EGU3_IRQn
-#endif
-
-/**
* @def NRF_802154_SWI_PRIORITY
*
* The priority of software interrupt used for requests and notifications.
@@ -270,7 +205,7 @@
* @def NRF_802154_FRAME_TIMESTAMP_ENABLED
*
* If timestamps are to be added to the frames received.
- * Enabling this feature enables the functions @ref nrf_802154_received_timsestamp_raw,
+ * Enabling this feature enables the functions @ref nrf_802154_received_timestamp_raw,
* @ref nrf_802154_received_timestamp, @ref nrf_802154_transmitted_timestamp_raw, and
* @ref nrf_802154_transmitted_timestamp, which add timestamps to the frames received.
*
@@ -341,63 +276,6 @@
#endif
/**
- * @def NRF_802154_RTC_INSTANCE
- *
- * The RTC instance used in the standalone timer driver implementation.
- *
- * @note This configuration is only applicable for the Low Power Timer Abstraction Layer
- * implementation in nrf_802154_lp_timer_nodrv.c.
- *
- */
-#ifndef NRF_802154_RTC_INSTANCE
-
-#ifdef NRF52811_XXAA
-#define NRF_802154_RTC_INSTANCE NRF_RTC0
-#else
-#define NRF_802154_RTC_INSTANCE NRF_RTC2
-#endif
-
-#endif
-
-/**
- * @def NRF_802154_RTC_IRQ_HANDLER
- *
- * The RTC interrupt handler name used in the standalone timer driver implementation.
- *
- * @note This configuration is only applicable for Low Power Timer Abstraction Layer implementation
- * in nrf_802154_lp_timer_nodrv.c.
- *
- */
-#ifndef NRF_802154_RTC_IRQ_HANDLER
-
-#ifdef NRF52811_XXAA
-#define NRF_802154_RTC_IRQ_HANDLER RTC0_IRQHandler
-#else
-#define NRF_802154_RTC_IRQ_HANDLER RTC2_IRQHandler
-#endif
-
-#endif
-
-/**
- * @def NRF_802154_RTC_IRQN
- *
- * The RTC Interrupt number used in the standalone timer driver implementation.
- *
- * @note This configuration is only applicable for the Low Power Timer Abstraction Layer implementation
- * in nrf_802154_lp_timer_nodrv.c.
- *
- */
-#ifndef NRF_802154_RTC_IRQN
-
-#ifdef NRF52811_XXAA
-#define NRF_802154_RTC_IRQN RTC0_IRQn
-#else
-#define NRF_802154_RTC_IRQN RTC2_IRQn
-#endif
-
-#endif
-
-/**
* @}
* @defgroup nrf_802154_config_csma CSMA/CA procedure configuration
* @{
diff --git a/third_party/NordicSemiconductor/drivers/radio/nrf_802154_const.h b/third_party/NordicSemiconductor/drivers/radio/nrf_802154_const.h
index 460b234..bc324ae 100644
--- a/third_party/NordicSemiconductor/drivers/radio/nrf_802154_const.h
+++ b/third_party/NordicSemiconductor/drivers/radio/nrf_802154_const.h
@@ -88,6 +88,16 @@
#define KEY_ID_MODE_2 0x10 ///< Bits containing the 0x10 Key Identifier Mode.
#define KEY_ID_MODE_3 0x18 ///< Bits containing the 0x11 Key Identifier Mode.
+#define MAC_CMD_ASSOC_REQ 0x01 ///< Command frame identifier for MAC Association request.
+#define MAC_CMD_ASSOC_RESP 0x02 ///< Command frame identifier for MAC Association response.
+#define MAC_CMD_DISASSOC_NOTIFY 0x03 ///< Command frame identifier for MAC Disaccociation notification.
+#define MAC_CMD_DATA_REQ 0x04 ///< Command frame identifier for MAC Data Requests.
+#define MAC_CMD_PANID_CONFLICT 0x05 ///< Command frame identifier for MAC PAN ID conflict notification.
+#define MAC_CMD_ORPHAN_NOTIFY 0x06 ///< Command frame identifier for MAC Orphan notification.
+#define MAC_CMD_BEACON_REQ 0x07 ///< Command frame identifier for MAC Beacon.
+#define MAC_CMD_COORD_REALIGN 0x08 ///< Command frame identifier for MAC Coordinator realignment.
+#define MAC_CMD_GTS_REQUEST 0x09 ///< Command frame identifier for MAC GTS request.
+
#define PAN_ID_COMPR_OFFSET 1 ///< Byte containing the PAN ID compression bit (+1 for the frame length byte).
#define PAN_ID_COMPR_MASK 0x40 ///< PAN ID compression bit.
diff --git a/third_party/NordicSemiconductor/drivers/radio/nrf_802154_core.c b/third_party/NordicSemiconductor/drivers/radio/nrf_802154_core.c
index 563956b..ea15796 100644
--- a/third_party/NordicSemiconductor/drivers/radio/nrf_802154_core.c
+++ b/third_party/NordicSemiconductor/drivers/radio/nrf_802154_core.c
@@ -47,9 +47,9 @@
#include "nrf_802154_critical_section.h"
#include "nrf_802154_debug.h"
#include "nrf_802154_notification.h"
+#include "nrf_802154_peripherals.h"
#include "nrf_802154_pib.h"
#include "nrf_802154_procedures_duration.h"
-#include "nrf_802154_revision.h"
#include "nrf_802154_rssi.h"
#include "nrf_802154_rx_buffer.h"
#include "nrf_802154_utils.h"
@@ -57,10 +57,11 @@
#include "nrf_802154_types.h"
#include "nrf_802154_utils.h"
#include "nrf_egu.h"
+#include "nrf_error.h"
#include "nrf_ppi.h"
#include "nrf_radio.h"
#include "nrf_timer.h"
-#include "fem/nrf_fem_control_api.h"
+#include "fem/nrf_fem_protocol_api.h"
#include "mac_features/nrf_802154_delayed_trx.h"
#include "mac_features/nrf_802154_filter.h"
#include "mac_features/nrf_802154_frame_parser.h"
@@ -73,40 +74,22 @@
#define EGU_EVENT NRF_EGU_EVENT_TRIGGERED15
#define EGU_TASK NRF_EGU_TASK_TRIGGER15
-#define PPI_CH0 NRF_PPI_CHANNEL6
-#define PPI_CH1 NRF_PPI_CHANNEL7
-#define PPI_CH2 NRF_PPI_CHANNEL8
-#define PPI_CH3 NRF_PPI_CHANNEL9
-#define PPI_CH4 NRF_PPI_CHANNEL10
-#define PPI_CH5 NRF_PPI_CHANNEL11
-#define PPI_CH6 NRF_PPI_CHANNEL12
-#define PPI_CHGRP0 NRF_PPI_CHANNEL_GROUP0 ///< PPI group used to disable self-disabling PPIs
-#define PPI_CHGRP0_DIS_TASK NRF_PPI_TASK_CHG0_DIS ///< PPI task used to disable self-disabling PPIs
+#define PPI_CHGRP0 NRF_802154_PPI_CORE_GROUP ///< PPI group used to disable self-disabling PPIs
+#define PPI_CHGRP0_DIS_TASK NRF_PPI_TASK_CHG0_DIS ///< PPI task used to disable self-disabling PPIs
-#define PPI_DISABLED_EGU PPI_CH0 ///< PPI that connects RADIO DISABLED event with EGU task
-#define PPI_EGU_RAMP_UP PPI_CH1 ///< PPI that connects EGU event with RADIO TXEN or RXEN task
-#define PPI_EGU_TIMER_START PPI_CH2 ///< PPI that connects EGU event with TIMER START task
-#define PPI_CRCERROR_CLEAR PPI_CH3 ///< PPI that connects RADIO CRCERROR event with TIMER CLEAR task
-#define PPI_CCAIDLE_FEM PPI_CH3 ///< PPI that connects RADIO CCAIDLE event with GPIOTE tasks used by FEM
-#define PPI_TIMER_TX_ACK PPI_CH3 ///< PPI that connects TIMER COMPARE event with RADIO TXEN task
-#define PPI_CRCOK_DIS_PPI PPI_CH4 ///< PPI that connects RADIO CRCOK event with task that disables PPI group
+#define PPI_DISABLED_EGU NRF_802154_PPI_RADIO_DISABLED_TO_EGU ///< PPI that connects RADIO DISABLED event with EGU task
+#define PPI_EGU_RAMP_UP NRF_802154_PPI_EGU_TO_RADIO_RAMP_UP ///< PPI that connects EGU event with RADIO TXEN or RXEN task
+#define PPI_EGU_TIMER_START NRF_802154_PPI_EGU_TO_TIMER_START ///< PPI that connects EGU event with TIMER START task
+#define PPI_CRCERROR_CLEAR NRF_802154_PPI_RADIO_CRCERROR_TO_TIMER_CLEAR ///< PPI that connects RADIO CRCERROR event with TIMER CLEAR task
+#define PPI_CCAIDLE_FEM NRF_802154_PPI_RADIO_CCAIDLE_TO_FEM_GPIOTE ///< PPI that connects RADIO CCAIDLE event with GPIOTE tasks used by FEM
+#define PPI_TIMER_TX_ACK NRF_802154_PPI_TIMER_COMPARE_TO_RADIO_TXEN ///< PPI that connects TIMER COMPARE event with RADIO TXEN task
+#define PPI_CRCOK_DIS_PPI NRF_802154_PPI_RADIO_CRCOK_TO_PPI_GRP_DISABLE ///< PPI that connects RADIO CRCOK event with task that disables PPI group
#if NRF_802154_DISABLE_BCC_MATCHING
-#define PPI_ADDRESS_COUNTER_COUNT PPI_CH5 ///< PPI that connects RADIO ADDRESS event with TIMER COUNT task
-#define PPI_CRCERROR_COUNTER_CLEAR PPI_CH6 ///< PPI that connects RADIO CRCERROR event with TIMER CLEAR task
+#define PPI_ADDRESS_COUNTER_COUNT NRF_802154_PPI_RADIO_ADDR_TO_COUNTER_COUNT ///< PPI that connects RADIO ADDRESS event with TIMER COUNT task
+#define PPI_CRCERROR_COUNTER_CLEAR NRF_802154_PPI_RADIO_CRCERROR_COUNTER_CLEAR ///< PPI that connects RADIO CRCERROR event with TIMER CLEAR task
#endif // NRF_802154_DISABLE_BCC_MATCHING
-/// Workaround for missing PHYEND event in older chip revision.
-static inline uint32_t short_phyend_disable_mask_get(void)
-{
- if (nrf_802154_revision_has_phyend_event())
- {
- return NRF_RADIO_SHORT_PHYEND_DISABLE_MASK;
- }
-
- return NRF_RADIO_SHORT_END_DISABLE_MASK;
-}
-
#if NRF_802154_DISABLE_BCC_MATCHING
#define SHORT_ADDRESS_BCSTART 0UL
#else // NRF_802154_DISABLE_BCC_MATCHING
@@ -124,16 +107,16 @@
#define SHORTS_RX_FREE_BUFFER (NRF_RADIO_SHORT_RXREADY_START_MASK)
#define SHORTS_TX_ACK (NRF_RADIO_SHORT_TXREADY_START_MASK | \
- short_phyend_disable_mask_get())
+ NRF_RADIO_SHORT_PHYEND_DISABLE_MASK)
#define SHORTS_CCA_TX (NRF_RADIO_SHORT_RXREADY_CCASTART_MASK | \
NRF_RADIO_SHORT_CCABUSY_DISABLE_MASK | \
NRF_RADIO_SHORT_CCAIDLE_TXEN_MASK | \
NRF_RADIO_SHORT_TXREADY_START_MASK | \
- short_phyend_disable_mask_get())
+ NRF_RADIO_SHORT_PHYEND_DISABLE_MASK)
#define SHORTS_TX (NRF_RADIO_SHORT_TXREADY_START_MASK | \
- short_phyend_disable_mask_get())
+ NRF_RADIO_SHORT_PHYEND_DISABLE_MASK)
#define SHORTS_RX_ACK (NRF_RADIO_SHORT_ADDRESS_RSSISTART_MASK | \
NRF_RADIO_SHORT_END_DISABLE_MASK)
@@ -189,6 +172,47 @@
static volatile radio_state_t m_state; ///< State of the radio driver.
+/// Common parameters for the FAL handling.
+static const nrf_802154_fal_event_t m_deactivate_on_disable =
+{
+ .type = NRF_802154_FAL_EVENT_TYPE_GENERIC,
+ .override_ppi = false,
+ .event.generic.register_address =
+ ((uint32_t)NRF_RADIO_BASE + (uint32_t)NRF_RADIO_EVENT_DISABLED)
+};
+
+static const nrf_802154_fal_event_t m_activate_rx_cc0 =
+{
+ .type = NRF_802154_FAL_EVENT_TYPE_TIMER,
+ .override_ppi = false,
+ .event.timer =
+ {
+ .p_timer_instance = NRF_802154_TIMER_INSTANCE,
+ .counter_value = RX_RAMP_UP_TIME,
+ .compare_channel_mask = ((1 << NRF_TIMER_CC_CHANNEL0) | (1 << NRF_TIMER_CC_CHANNEL2)),
+ },
+};
+
+static const nrf_802154_fal_event_t m_activate_tx_cc0 =
+{
+ .type = NRF_802154_FAL_EVENT_TYPE_TIMER,
+ .override_ppi = false,
+ .event.timer =
+ {
+ .p_timer_instance = NRF_802154_TIMER_INSTANCE,
+ .counter_value = TX_RAMP_UP_TIME,
+ .compare_channel_mask = ((1 << NRF_TIMER_CC_CHANNEL0) | (1 << NRF_TIMER_CC_CHANNEL2)),
+ },
+};
+
+static const nrf_802154_fal_event_t m_ccaidle =
+{
+ .type = NRF_802154_FAL_EVENT_TYPE_GENERIC,
+ .override_ppi = true,
+ .ppi_ch_id = PPI_CCAIDLE_FEM,
+ .event.generic.register_address = ((uint32_t)NRF_RADIO_BASE + (uint32_t)NRF_RADIO_EVENT_CCAIDLE)
+};
+
typedef struct
{
bool frame_filtered : 1; ///< If frame being received passed filtering operation.
@@ -614,7 +638,7 @@
static void nrf_timer_init(void)
{
nrf_timer_mode_set(NRF_802154_TIMER_INSTANCE, NRF_TIMER_MODE_TIMER);
- nrf_timer_bit_width_set(NRF_802154_TIMER_INSTANCE, NRF_TIMER_BIT_WIDTH_16);
+ nrf_timer_bit_width_set(NRF_802154_TIMER_INSTANCE, NRF_TIMER_BIT_WIDTH_32);
nrf_timer_frequency_set(NRF_802154_TIMER_INSTANCE, NRF_TIMER_FREQ_1MHz);
#if NRF_802154_DISABLE_BCC_MATCHING
@@ -784,96 +808,126 @@
}
/** Configure FEM to set LNA at appropriate time. */
-static void fem_for_lna_set(nrf_timer_cc_channel_t cc_channel,
- nrf_timer_short_mask_t short_mask)
+static void fem_for_lna_set(void)
{
- nrf_fem_control_ppi_enable(NRF_FEM_CONTROL_LNA_PIN, cc_channel);
- nrf_fem_control_timer_set(NRF_FEM_CONTROL_LNA_PIN, cc_channel, short_mask);
- nrf_fem_control_ppi_task_setup(NRF_FEM_CONTROL_LNA_PIN,
- PPI_EGU_TIMER_START,
- (uint32_t)nrf_egu_event_address_get(
- NRF_802154_SWI_EGU_INSTANCE,
- EGU_EVENT),
- (uint32_t)nrf_timer_task_address_get(
- NRF_802154_TIMER_INSTANCE,
- NRF_TIMER_TASK_START));
+ if (nrf_802154_fal_lna_configuration_set(&m_activate_rx_cc0, NULL) == NRF_SUCCESS)
+ {
+ uint32_t event_addr = (uint32_t)nrf_egu_event_address_get(NRF_802154_SWI_EGU_INSTANCE,
+ EGU_EVENT);
+ uint32_t task_addr = (uint32_t)nrf_timer_task_address_get(NRF_802154_TIMER_INSTANCE,
+ NRF_TIMER_TASK_START);
+
+ nrf_timer_shorts_enable(m_activate_rx_cc0.event.timer.p_timer_instance,
+ NRF_TIMER_SHORT_COMPARE0_STOP_MASK);
+ nrf_ppi_channel_endpoint_setup(PPI_EGU_TIMER_START, event_addr, task_addr);
+ nrf_ppi_channel_enable(PPI_EGU_TIMER_START);
+ }
}
/** Reset FEM configuration for LNA.
*
* @param[in] timer_short_mask Mask of shorts that should be disabled on FEM timer.
*/
-static void fem_for_lna_reset(nrf_timer_short_mask_t timer_short_mask)
+static void fem_for_lna_reset(void)
{
- nrf_fem_control_ppi_disable(NRF_FEM_CONTROL_LNA_PIN);
- nrf_fem_control_timer_reset(NRF_FEM_CONTROL_LNA_PIN, timer_short_mask);
+ nrf_802154_fal_lna_configuration_clear(&m_activate_rx_cc0, NULL);
+ nrf_timer_task_trigger(NRF_802154_TIMER_INSTANCE, NRF_TIMER_TASK_SHUTDOWN);
+ nrf_timer_shorts_disable(NRF_802154_TIMER_INSTANCE, NRF_TIMER_SHORT_COMPARE0_STOP_MASK);
nrf_ppi_channel_disable(PPI_EGU_TIMER_START);
}
/** Configure FEM to set PA at appropriate time. */
static void fem_for_pa_set(void)
{
- nrf_fem_control_ppi_enable(NRF_FEM_CONTROL_PA_PIN, NRF_TIMER_CC_CHANNEL2);
- nrf_fem_control_timer_set(NRF_FEM_CONTROL_PA_PIN,
- NRF_TIMER_CC_CHANNEL2,
- NRF_TIMER_SHORT_COMPARE2_STOP_MASK);
- nrf_fem_control_ppi_fork_setup(NRF_FEM_CONTROL_PA_PIN,
- PPI_EGU_RAMP_UP,
- (uint32_t)nrf_timer_task_address_get(
- NRF_802154_TIMER_INSTANCE,
- NRF_TIMER_TASK_START));
+ if (nrf_802154_fal_pa_configuration_set(&m_activate_tx_cc0, NULL) == NRF_SUCCESS)
+ {
+ uint32_t event_addr = (uint32_t)nrf_egu_event_address_get(NRF_802154_SWI_EGU_INSTANCE,
+ EGU_EVENT);
+ uint32_t task_addr = (uint32_t)nrf_timer_task_address_get(NRF_802154_TIMER_INSTANCE,
+ NRF_TIMER_TASK_START);
+
+ nrf_timer_shorts_enable(m_activate_tx_cc0.event.timer.p_timer_instance,
+ NRF_TIMER_SHORT_COMPARE0_STOP_MASK);
+ nrf_ppi_channel_endpoint_setup(PPI_EGU_TIMER_START, event_addr, task_addr);
+ nrf_ppi_channel_enable(PPI_EGU_TIMER_START);
+ }
}
/** Reset FEM configuration for PA. */
static void fem_for_pa_reset(void)
{
- nrf_fem_control_ppi_disable(NRF_FEM_CONTROL_PA_PIN);
- nrf_fem_control_timer_reset(NRF_FEM_CONTROL_PA_PIN, NRF_TIMER_SHORT_COMPARE2_STOP_MASK);
- nrf_fem_control_ppi_fork_clear(NRF_FEM_CONTROL_PA_PIN, PPI_EGU_RAMP_UP);
+ nrf_802154_fal_pa_configuration_clear(&m_activate_tx_cc0, NULL);
+ nrf_timer_task_trigger(NRF_802154_TIMER_INSTANCE, NRF_TIMER_TASK_SHUTDOWN);
+ nrf_ppi_channel_disable(PPI_EGU_TIMER_START);
+ nrf_802154_fal_deactivate_now(NRF_802154_FAL_PA);
}
/** Configure FEM for TX procedure. */
static void fem_for_tx_set(bool cca)
{
+ bool success;
+
if (cca)
{
- nrf_fem_control_ppi_enable(NRF_FEM_CONTROL_LNA_PIN, NRF_TIMER_CC_CHANNEL0);
- nrf_fem_control_timer_set(NRF_FEM_CONTROL_LNA_PIN,
- NRF_TIMER_CC_CHANNEL0,
- NRF_TIMER_SHORT_COMPARE0_STOP_MASK);
- nrf_fem_control_ppi_pin_task_setup(PPI_CCAIDLE_FEM,
- (uint32_t)nrf_radio_event_address_get(
- NRF_RADIO_EVENT_CCAIDLE),
- false,
- true);
+ bool pa_set = false;
+ bool lna_set = false;
+
+ if (nrf_802154_fal_lna_configuration_set(&m_activate_rx_cc0, &m_ccaidle) == NRF_SUCCESS)
+ {
+ lna_set = true;
+ }
+
+ if (nrf_802154_fal_pa_configuration_set(&m_ccaidle, NULL) == NRF_SUCCESS)
+ {
+ pa_set = true;
+ }
+
+ success = pa_set || lna_set;
+
}
else
{
- nrf_fem_control_ppi_enable(NRF_FEM_CONTROL_PA_PIN, NRF_TIMER_CC_CHANNEL1);
- nrf_fem_control_timer_set(NRF_FEM_CONTROL_PA_PIN,
- NRF_TIMER_CC_CHANNEL1,
- NRF_TIMER_SHORT_COMPARE1_STOP_MASK);
+ success = (nrf_802154_fal_pa_configuration_set(&m_activate_tx_cc0, NULL) == NRF_SUCCESS);
}
- nrf_fem_control_ppi_task_setup(NRF_FEM_CONTROL_ANY_PIN,
- PPI_EGU_TIMER_START,
- (uint32_t)nrf_egu_event_address_get(
- NRF_802154_SWI_EGU_INSTANCE,
- EGU_EVENT),
- (uint32_t)nrf_timer_task_address_get(
- NRF_802154_TIMER_INSTANCE,
- NRF_TIMER_TASK_START));
+ if (success)
+ {
+ nrf_timer_shorts_enable(NRF_802154_TIMER_INSTANCE, NRF_TIMER_SHORT_COMPARE0_STOP_MASK);
+
+ uint32_t egu_event_addr = (uint32_t)nrf_egu_event_address_get(NRF_802154_SWI_EGU_INSTANCE,
+ EGU_EVENT);
+ uint32_t timer_task_addr = (uint32_t)nrf_timer_task_address_get(NRF_802154_TIMER_INSTANCE,
+ NRF_TIMER_TASK_START);
+
+ nrf_ppi_channel_endpoint_setup(PPI_EGU_TIMER_START, egu_event_addr, timer_task_addr);
+ nrf_ppi_channel_enable(PPI_EGU_TIMER_START);
+ }
}
/** Reset FEM for TX procedure. */
static void fem_for_tx_reset(bool disable_ppi_egu_timer_start)
{
- nrf_fem_control_ppi_disable(NRF_FEM_CONTROL_ANY_PIN);
- nrf_fem_control_timer_reset(NRF_FEM_CONTROL_ANY_PIN,
- (nrf_timer_short_mask_t)(NRF_TIMER_SHORT_COMPARE0_STOP_MASK |
- NRF_TIMER_SHORT_COMPARE1_STOP_MASK));
- nrf_fem_control_ppi_fork_clear(NRF_FEM_CONTROL_ANY_PIN, PPI_CCAIDLE_FEM);
- nrf_ppi_channel_disable(PPI_CCAIDLE_FEM);
+ nrf_timer_task_trigger(NRF_802154_TIMER_INSTANCE, NRF_TIMER_TASK_SHUTDOWN);
+ nrf_timer_shorts_disable(NRF_802154_TIMER_INSTANCE,
+ NRF_TIMER_SHORT_COMPARE0_STOP_MASK |
+ NRF_TIMER_SHORT_COMPARE1_STOP_MASK);
+
+ switch (m_state)
+ {
+ case RADIO_STATE_CCA_TX:
+ nrf_802154_fal_pa_configuration_clear(&m_activate_rx_cc0, &m_ccaidle);
+ break;
+
+ case RADIO_STATE_TX:
+ nrf_802154_fal_pa_configuration_clear(&m_activate_tx_cc0, NULL);
+ break;
+
+ default:
+ assert(false);
+ break;
+ }
+
+ nrf_timer_task_trigger(NRF_802154_TIMER_INSTANCE, NRF_TIMER_TASK_SHUTDOWN);
if (disable_ppi_egu_timer_start)
{
@@ -988,10 +1042,13 @@
nrf_ppi_channel_disable(PPI_CRCOK_DIS_PPI);
nrf_ppi_channel_disable(PPI_ADDRESS_COUNTER_COUNT);
nrf_ppi_channel_disable(PPI_CRCERROR_COUNTER_CLEAR);
+ nrf_ppi_channel_endpoint_setup(PPI_CRCERROR_CLEAR, 0, 0);
+ nrf_ppi_fork_endpoint_setup(PPI_CRCERROR_CLEAR, 0);
#endif // NRF_802154_DISABLE_BCC_MATCHING
- nrf_fem_control_ppi_disable(NRF_FEM_CONTROL_LNA_PIN);
-
+ // Disable LNA
+ nrf_802154_fal_lna_configuration_clear(&m_activate_rx_cc0, NULL);
+ nrf_timer_task_trigger(NRF_802154_TIMER_INSTANCE, NRF_TIMER_TASK_SHUTDOWN);
nrf_ppi_channel_remove_from_group(PPI_EGU_RAMP_UP, PPI_CHGRP0);
#if NRF_802154_DISABLE_BCC_MATCHING
@@ -1003,8 +1060,7 @@
// Anomaly 78: use SHUTDOWN instead of STOP and CLEAR.
nrf_timer_task_trigger(NRF_802154_TIMER_INSTANCE, NRF_TIMER_TASK_SHUTDOWN);
nrf_timer_shorts_disable(NRF_802154_TIMER_INSTANCE,
- NRF_TIMER_SHORT_COMPARE0_STOP_MASK |
- NRF_TIMER_SHORT_COMPARE2_STOP_MASK);
+ NRF_TIMER_SHORT_COMPARE0_STOP_MASK);
#if NRF_802154_DISABLE_BCC_MATCHING
// Anomaly 78: use SHUTDOWN instead of STOP and CLEAR.
@@ -1023,7 +1079,21 @@
ints_to_disable |= NRF_RADIO_INT_CRCOK_MASK;
nrf_radio_int_disable(ints_to_disable);
nrf_radio_shorts_set(SHORTS_IDLE);
+ bool shutdown = nrf_fem_prepare_powerdown(NRF_802154_TIMER_INSTANCE,
+ NRF_TIMER_CC_CHANNEL0,
+ PPI_EGU_TIMER_START);
+
nrf_radio_task_trigger(NRF_RADIO_TASK_DISABLE);
+ if (shutdown)
+ {
+ while (!nrf_timer_event_check(NRF_802154_TIMER_INSTANCE, NRF_TIMER_EVENT_COMPARE0))
+ {
+ // Wait until the event is set.
+ }
+ nrf_timer_shorts_disable(NRF_802154_TIMER_INSTANCE, NRF_TIMER_SHORT_COMPARE0_STOP_MASK);
+ nrf_timer_task_trigger(NRF_802154_TIMER_INSTANCE, NRF_TIMER_TASK_SHUTDOWN);
+ nrf_ppi_channel_disable(PPI_EGU_TIMER_START);
+ }
}
}
@@ -1038,9 +1108,13 @@
#if NRF_802154_DISABLE_BCC_MATCHING
nrf_ppi_channel_disable(PPI_CRCERROR_CLEAR);
nrf_ppi_channel_disable(PPI_CRCOK_DIS_PPI);
+ nrf_ppi_channel_endpoint_setup(PPI_CRCERROR_CLEAR, 0, 0);
+ nrf_ppi_fork_endpoint_setup(PPI_CRCERROR_CLEAR, 0);
#endif // NRF_802154_DISABLE_BCC_MATCHING
- nrf_fem_control_ppi_disable(NRF_FEM_CONTROL_PA_PIN);
+ // Disable PA
+ nrf_802154_fal_pa_configuration_clear(&m_activate_tx_cc0, NULL);
+ nrf_timer_task_trigger(NRF_802154_TIMER_INSTANCE, NRF_TIMER_TASK_SHUTDOWN);
nrf_ppi_channel_remove_from_group(PPI_EGU_RAMP_UP, PPI_CHGRP0);
#if !NRF_802154_DISABLE_BCC_MATCHING
@@ -1050,8 +1124,7 @@
// Anomaly 78: use SHUTDOWN instead of STOP and CLEAR.
nrf_timer_task_trigger(NRF_802154_TIMER_INSTANCE, NRF_TIMER_TASK_SHUTDOWN);
nrf_timer_shorts_disable(NRF_802154_TIMER_INSTANCE,
- NRF_TIMER_SHORT_COMPARE0_STOP_MASK |
- NRF_TIMER_SHORT_COMPARE2_STOP_MASK);
+ NRF_TIMER_SHORT_COMPARE0_STOP_MASK);
#if NRF_802154_DISABLE_BCC_MATCHING
// Anomaly 78: use SHUTDOWN instead of STOP and CLEAR.
@@ -1061,8 +1134,8 @@
if (timeslot_is_granted())
{
- ints_to_disable = nrf_802154_revision_has_phyend_event() ?
- NRF_RADIO_INT_PHYEND_MASK : NRF_RADIO_INT_END_MASK;
+ ints_to_disable = NRF_RADIO_INT_PHYEND_MASK;
+
#if NRF_802154_TX_STARTED_NOTIFY_ENABLED
ints_to_disable |= NRF_RADIO_INT_ADDRESS_MASK;
#endif // NRF_802154_TX_STARTED_NOTIFY_ENABLED
@@ -1088,17 +1161,30 @@
if (timeslot_is_granted())
{
- ints_to_disable = nrf_802154_revision_has_phyend_event() ?
- NRF_RADIO_INT_PHYEND_MASK : NRF_RADIO_INT_END_MASK;
- ints_to_disable |= NRF_RADIO_INT_CCABUSY_MASK;
+ ints_to_disable = NRF_RADIO_INT_PHYEND_MASK | NRF_RADIO_INT_CCABUSY_MASK;
+
#if NRF_802154_TX_STARTED_NOTIFY_ENABLED
ints_to_disable |= NRF_RADIO_INT_ADDRESS_MASK;
#endif // NRF_802154_TX_STARTED_NOTIFY_ENABLED
nrf_radio_int_disable(ints_to_disable);
nrf_radio_shorts_set(SHORTS_IDLE);
+ bool shutdown = nrf_fem_prepare_powerdown(NRF_802154_TIMER_INSTANCE,
+ NRF_TIMER_CC_CHANNEL0,
+ PPI_EGU_TIMER_START);
+
nrf_radio_task_trigger(NRF_RADIO_TASK_CCASTOP);
nrf_radio_task_trigger(NRF_RADIO_TASK_DISABLE);
+ if (shutdown)
+ {
+ while (!nrf_timer_event_check(NRF_802154_TIMER_INSTANCE, NRF_TIMER_EVENT_COMPARE0))
+ {
+ // Wait until the event is set.
+ }
+ nrf_timer_shorts_disable(NRF_802154_TIMER_INSTANCE, NRF_TIMER_SHORT_COMPARE0_STOP_MASK);
+ nrf_timer_task_trigger(NRF_802154_TIMER_INSTANCE, NRF_TIMER_TASK_SHUTDOWN);
+ nrf_ppi_channel_disable(PPI_EGU_TIMER_START);
+ }
}
}
@@ -1110,7 +1196,7 @@
nrf_ppi_channel_disable(PPI_DISABLED_EGU);
nrf_ppi_channel_disable(PPI_EGU_RAMP_UP);
- fem_for_lna_reset(NRF_TIMER_SHORT_COMPARE2_STOP_MASK);
+ fem_for_lna_reset();
nrf_ppi_channel_remove_from_group(PPI_EGU_RAMP_UP, PPI_CHGRP0);
nrf_ppi_fork_endpoint_setup(PPI_EGU_RAMP_UP, 0);
@@ -1134,17 +1220,32 @@
nrf_ppi_channel_disable(PPI_DISABLED_EGU);
nrf_ppi_channel_disable(PPI_EGU_RAMP_UP);
- fem_for_lna_reset(NRF_TIMER_SHORT_COMPARE0_STOP_MASK);
+ fem_for_lna_reset();
nrf_ppi_channel_remove_from_group(PPI_EGU_RAMP_UP, PPI_CHGRP0);
nrf_ppi_fork_endpoint_setup(PPI_EGU_RAMP_UP, 0);
if (timeslot_is_granted())
{
+ bool shutdown = nrf_fem_prepare_powerdown(NRF_802154_TIMER_INSTANCE,
+ NRF_TIMER_CC_CHANNEL0,
+ PPI_EGU_TIMER_START);
+
nrf_radio_int_disable(NRF_RADIO_INT_EDEND_MASK);
nrf_radio_shorts_set(SHORTS_IDLE);
nrf_radio_task_trigger(NRF_RADIO_TASK_EDSTOP);
nrf_radio_task_trigger(NRF_RADIO_TASK_DISABLE);
+
+ if (shutdown)
+ {
+ while (!nrf_timer_event_check(NRF_802154_TIMER_INSTANCE, NRF_TIMER_EVENT_COMPARE0))
+ {
+ // Wait until the event is set.
+ }
+ nrf_timer_shorts_disable(NRF_802154_TIMER_INSTANCE, NRF_TIMER_SHORT_COMPARE0_STOP_MASK);
+ nrf_timer_task_trigger(NRF_802154_TIMER_INSTANCE, NRF_TIMER_TASK_SHUTDOWN);
+ nrf_ppi_channel_disable(PPI_EGU_TIMER_START);
+ }
}
}
@@ -1154,17 +1255,32 @@
nrf_ppi_channel_disable(PPI_DISABLED_EGU);
nrf_ppi_channel_disable(PPI_EGU_RAMP_UP);
- fem_for_lna_reset(NRF_TIMER_SHORT_COMPARE0_STOP_MASK);
+ fem_for_lna_reset();
nrf_ppi_channel_remove_from_group(PPI_EGU_RAMP_UP, PPI_CHGRP0);
nrf_ppi_fork_endpoint_setup(PPI_EGU_RAMP_UP, 0);
if (timeslot_is_granted())
{
+ bool shutdown = nrf_fem_prepare_powerdown(NRF_802154_TIMER_INSTANCE,
+ NRF_TIMER_CC_CHANNEL0,
+ PPI_EGU_TIMER_START);
+
nrf_radio_int_disable(NRF_RADIO_INT_CCABUSY_MASK | NRF_RADIO_INT_CCAIDLE_MASK);
nrf_radio_shorts_set(SHORTS_IDLE);
nrf_radio_task_trigger(NRF_RADIO_TASK_CCASTOP);
nrf_radio_task_trigger(NRF_RADIO_TASK_DISABLE);
+
+ if (shutdown)
+ {
+ while (!nrf_timer_event_check(NRF_802154_TIMER_INSTANCE, NRF_TIMER_EVENT_COMPARE0))
+ {
+ // Wait until the event is set.
+ }
+ nrf_timer_shorts_disable(NRF_802154_TIMER_INSTANCE, NRF_TIMER_SHORT_COMPARE0_STOP_MASK);
+ nrf_timer_task_trigger(NRF_802154_TIMER_INSTANCE, NRF_TIMER_TASK_SHUTDOWN);
+ nrf_ppi_channel_disable(PPI_EGU_TIMER_START);
+ }
}
}
@@ -1178,7 +1294,21 @@
if (timeslot_is_granted())
{
+ bool shutdown = nrf_fem_prepare_powerdown(NRF_802154_TIMER_INSTANCE,
+ NRF_TIMER_CC_CHANNEL0,
+ PPI_EGU_TIMER_START);
+
nrf_radio_task_trigger(NRF_RADIO_TASK_DISABLE);
+ if (shutdown)
+ {
+ while (!nrf_timer_event_check(NRF_802154_TIMER_INSTANCE, NRF_TIMER_EVENT_COMPARE0))
+ {
+ // Wait until the event is set.
+ }
+ nrf_timer_shorts_disable(NRF_802154_TIMER_INSTANCE, NRF_TIMER_SHORT_COMPARE0_STOP_MASK);
+ nrf_timer_task_trigger(NRF_802154_TIMER_INSTANCE, NRF_TIMER_TASK_SHUTDOWN);
+ nrf_ppi_channel_disable(PPI_EGU_TIMER_START);
+ }
}
}
@@ -1374,10 +1504,8 @@
/** Initialize RX operation. */
static void rx_init(bool disabled_was_triggered)
{
- bool free_buffer;
- int32_t ints_to_enable = 0;
- uint32_t lna_target_time;
- uint32_t pa_target_time;
+ bool free_buffer;
+ int32_t ints_to_enable = 0;
if (!timeslot_is_granted())
{
@@ -1421,21 +1549,25 @@
nrf_radio_int_enable(ints_to_enable);
// Set FEM
- nrf_fem_control_ppi_enable(NRF_FEM_CONTROL_LNA_PIN, NRF_TIMER_CC_CHANNEL0);
- lna_target_time = nrf_fem_control_delay_get(NRF_FEM_CONTROL_LNA_PIN);
- pa_target_time = nrf_fem_control_delay_get(NRF_FEM_CONTROL_PA_PIN);
-
- // Set TIMER to transmit ACK
nrf_timer_shorts_enable(NRF_802154_TIMER_INSTANCE,
- NRF_TIMER_SHORT_COMPARE0_STOP_MASK |
- NRF_TIMER_SHORT_COMPARE2_STOP_MASK);
- nrf_timer_cc_write(NRF_802154_TIMER_INSTANCE, NRF_TIMER_CC_CHANNEL0, lna_target_time);
+ NRF_TIMER_SHORT_COMPARE0_STOP_MASK);
+
+ uint32_t delta_time;
+
+ if (nrf_802154_fal_lna_configuration_set(&m_activate_rx_cc0, NULL) == NRF_SUCCESS)
+ {
+ delta_time = nrf_timer_cc_read(NRF_802154_TIMER_INSTANCE,
+ NRF_TIMER_CC_CHANNEL0);
+ }
+ else
+ {
+ delta_time = 1;
+ nrf_timer_cc_write(NRF_802154_TIMER_INSTANCE, NRF_TIMER_CC_CHANNEL0, delta_time);
+ }
+
nrf_timer_cc_write(NRF_802154_TIMER_INSTANCE,
NRF_TIMER_CC_CHANNEL1,
- lna_target_time + ACK_IFS - TXRU_TIME - EVENT_LAT);
- nrf_timer_cc_write(NRF_802154_TIMER_INSTANCE,
- NRF_TIMER_CC_CHANNEL2,
- lna_target_time + ACK_IFS - TXRU_TIME - EVENT_LAT + pa_target_time);
+ delta_time + ACK_IFS - TXRU_TIME - EVENT_LAT);
#if NRF_802154_DISABLE_BCC_MATCHING
nrf_timer_shorts_enable(NRF_802154_COUNTER_TIMER_INSTANCE, NRF_TIMER_SHORT_COMPARE1_STOP_MASK);
@@ -1565,16 +1697,8 @@
nrf_radio_shorts_set(cca ? SHORTS_CCA_TX : SHORTS_TX);
// Enable IRQs
- if (nrf_802154_revision_has_phyend_event())
- {
- nrf_radio_event_clear(NRF_RADIO_EVENT_PHYEND);
- ints_to_enable |= NRF_RADIO_INT_PHYEND_MASK;
- }
- else
- {
- nrf_radio_event_clear(NRF_RADIO_EVENT_END);
- ints_to_enable |= NRF_RADIO_INT_END_MASK;
- }
+ nrf_radio_event_clear(NRF_RADIO_EVENT_PHYEND);
+ ints_to_enable |= NRF_RADIO_INT_PHYEND_MASK;
if (cca)
{
@@ -1624,7 +1748,7 @@
nrf_radio_int_enable(NRF_RADIO_INT_EDEND_MASK);
// Set FEM
- fem_for_lna_set(NRF_TIMER_CC_CHANNEL0, NRF_TIMER_SHORT_COMPARE0_STOP_MASK);
+ fem_for_lna_set();
// Clr event EGU
nrf_egu_event_clear(NRF_802154_SWI_EGU_INSTANCE, EGU_EVENT);
@@ -1655,7 +1779,7 @@
nrf_radio_int_enable(NRF_RADIO_INT_CCABUSY_MASK | NRF_RADIO_INT_CCAIDLE_MASK);
// Set FEM
- fem_for_lna_set(NRF_TIMER_CC_CHANNEL0, NRF_TIMER_SHORT_COMPARE0_STOP_MASK);
+ fem_for_lna_set();
// Clr event EGU
nrf_egu_event_clear(NRF_802154_SWI_EGU_INSTANCE, EGU_EVENT);
@@ -1714,6 +1838,9 @@
m_rsch_timeslot_is_granted = true;
nrf_802154_timer_coord_start();
+ nrf_802154_fal_pa_configuration_set(NULL, &m_deactivate_on_disable);
+ nrf_802154_fal_lna_configuration_set(NULL, &m_deactivate_on_disable);
+
switch (m_state)
{
case RADIO_STATE_SLEEP:
@@ -1768,7 +1895,10 @@
nrf_radio_reset();
}
- nrf_fem_control_pin_clear();
+ nrf_802154_fal_pa_configuration_clear(NULL, &m_deactivate_on_disable);
+ nrf_802154_fal_lna_configuration_clear(NULL, &m_deactivate_on_disable);
+
+ nrf_802154_fal_deactivate_now(NRF_802154_FAL_ALL);
nrf_802154_timer_coord_stop();
result = current_operation_terminate(NRF_802154_TERM_802154, REQ_ORIG_RSCH, false);
@@ -2052,13 +2182,29 @@
#endif // !NRF_802154_DISABLE_BCC_MATCHING
// Set FEM PPIs
- nrf_fem_control_ppi_disable(NRF_FEM_CONTROL_LNA_PIN);
- nrf_fem_control_ppi_enable(NRF_FEM_CONTROL_PA_PIN, NRF_TIMER_CC_CHANNEL2);
+ uint32_t time_to_rampup = nrf_timer_cc_read(NRF_802154_TIMER_INSTANCE,
+ NRF_TIMER_CC_CHANNEL1);
+
+ nrf_802154_fal_event_t timer = m_activate_tx_cc0;
+
+ timer.event.timer.counter_value += time_to_rampup;
+
+ nrf_802154_fal_pa_configuration_set(&timer, NULL);
// Detect if PPI worked (timer is counting or TIMER event is marked)
nrf_timer_task_trigger(NRF_802154_TIMER_INSTANCE, NRF_TIMER_TASK_CAPTURE3);
- if (nrf_timer_cc_read(NRF_802154_TIMER_INSTANCE, NRF_TIMER_CC_CHANNEL3) <
- nrf_timer_cc_read(NRF_802154_TIMER_INSTANCE, NRF_TIMER_CC_CHANNEL1))
+ uint32_t current_timer_value = nrf_timer_cc_read(NRF_802154_TIMER_INSTANCE,
+ NRF_TIMER_CC_CHANNEL3);
+ uint32_t time_to_fem = nrf_timer_cc_read(NRF_802154_TIMER_INSTANCE,
+ NRF_TIMER_CC_CHANNEL0);
+
+ // When external PA uses timer, it should be configured to a time later than ramp up
+ // time. In such case, the timer stops with shorts on PA timer.
+ // But if external PA does not use timer, FEM time is set to a value in the pased
+ // used by LNA. After timer overflow, the timer stops with short on the past value
+ // used by LNA. We have to detect if the timer is after the overflow.
+ if ((current_timer_value < time_to_rampup) &&
+ ((time_to_fem >= time_to_rampup) || (current_timer_value > time_to_fem)))
{
wait_for_phyend = true;
}
@@ -2094,16 +2240,8 @@
ints_to_disable |= NRF_RADIO_INT_CRCOK_MASK;
nrf_radio_int_disable(ints_to_disable);
- if (nrf_802154_revision_has_phyend_event())
- {
- nrf_radio_event_clear(NRF_RADIO_EVENT_PHYEND);
- ints_to_enable = NRF_RADIO_INT_PHYEND_MASK;
- }
- else
- {
- nrf_radio_event_clear(NRF_RADIO_EVENT_END);
- ints_to_enable = NRF_RADIO_INT_END_MASK;
- }
+ nrf_radio_event_clear(NRF_RADIO_EVENT_PHYEND);
+ ints_to_enable = NRF_RADIO_INT_PHYEND_MASK;
#if NRF_802154_TX_STARTED_NOTIFY_ENABLED
nrf_radio_event_clear(NRF_RADIO_EVENT_ADDRESS);
@@ -2118,6 +2256,8 @@
#if !NRF_802154_DISABLE_BCC_MATCHING
nrf_ppi_channel_disable(PPI_TIMER_TX_ACK);
+ nrf_ppi_channel_endpoint_setup(PPI_TIMER_TX_ACK, 0, 0);
+ nrf_ppi_fork_endpoint_setup(PPI_TIMER_TX_ACK, 0);
#endif // !NRF_802154_DISABLE_BCC_MATCHING
// RX uses the same peripherals as TX_ACK until RADIO ints are updated.
@@ -2192,8 +2332,9 @@
nrf_ppi_channel_disable(PPI_DISABLED_EGU);
// Set FEM PPIs
- nrf_fem_control_ppi_disable(NRF_FEM_CONTROL_PA_PIN);
- nrf_fem_control_ppi_enable(NRF_FEM_CONTROL_LNA_PIN, NRF_TIMER_CC_CHANNEL0);
+ nrf_802154_fal_pa_configuration_clear(&m_activate_tx_cc0, NULL);
+ nrf_timer_task_trigger(NRF_802154_TIMER_INSTANCE, NRF_TIMER_TASK_SHUTDOWN);
+ nrf_802154_fal_lna_configuration_set(&m_activate_rx_cc0, NULL);
nrf_radio_shorts_set(SHORTS_RX);
@@ -2202,8 +2343,7 @@
nrf_radio_bcc_set(BCC_INIT);
#endif // !NRF_802154_DISABLE_BCC_MATCHING
- ints_to_disable = nrf_802154_revision_has_phyend_event() ?
- NRF_RADIO_INT_PHYEND_MASK : NRF_RADIO_INT_END_MASK;
+ ints_to_disable = NRF_RADIO_INT_PHYEND_MASK;
#if NRF_802154_TX_STARTED_NOTIFY_ENABLED
ints_to_disable |= NRF_RADIO_INT_ADDRESS_MASK;
@@ -2248,7 +2388,9 @@
NRF_TIMER_TASK_START));
#else // NRF_802154_DISABLE_BCC_MATCHING
nrf_ppi_channel_disable(PPI_TIMER_TX_ACK);
-#endif // NRF_802154_DISABLE_BCC_MATCHING
+ nrf_ppi_channel_endpoint_setup(PPI_TIMER_TX_ACK, 0, 0);
+ nrf_ppi_fork_endpoint_setup(PPI_TIMER_TX_ACK, 0);
+#endif // NRF_802154_DISABLE_BCC_MATCHING
// Enable PPI disabled by CRCOK
nrf_ppi_channel_enable(PPI_EGU_RAMP_UP);
@@ -2325,12 +2467,9 @@
ints_to_disable |= NRF_RADIO_INT_ADDRESS_MASK;
#endif // NRF_802154_TX_STARTED_NOTIFY_ENABLED
- if (nrf_802154_revision_has_phyend_event())
- {
- ints_to_disable |= NRF_RADIO_INT_PHYEND_MASK;
- nrf_radio_event_clear(NRF_RADIO_EVENT_END);
- ints_to_enable |= NRF_RADIO_INT_END_MASK;
- }
+ ints_to_disable |= NRF_RADIO_INT_PHYEND_MASK;
+ nrf_radio_event_clear(NRF_RADIO_EVENT_END);
+ ints_to_enable |= NRF_RADIO_INT_END_MASK;
nrf_radio_int_disable(ints_to_disable);
@@ -2342,7 +2481,7 @@
// Clear FEM configuration set at the beginning of the transmission
fem_for_tx_reset(false);
// Set PPIs necessary in rx_ack state
- fem_for_lna_set(NRF_TIMER_CC_CHANNEL2, NRF_TIMER_SHORT_COMPARE2_STOP_MASK);
+ fem_for_lna_set();
nrf_ppi_channel_and_fork_endpoint_setup(PPI_EGU_RAMP_UP,
(uint32_t)nrf_egu_event_address_get(
@@ -2505,7 +2644,7 @@
}
else
{
- fem_for_lna_reset(NRF_TIMER_SHORT_COMPARE0_STOP_MASK);
+ fem_for_lna_reset();
}
}
else
@@ -2620,8 +2759,7 @@
nrf_802154_log(EVENT_TRACE_EXIT, FUNCTION_EVENT_CRCOK);
}
- if (nrf_802154_revision_has_phyend_event() &&
- nrf_radio_int_enable_check(NRF_RADIO_INT_PHYEND_MASK) &&
+ if (nrf_radio_int_enable_check(NRF_RADIO_INT_PHYEND_MASK) &&
nrf_radio_event_check(NRF_RADIO_EVENT_PHYEND))
{
nrf_802154_log(EVENT_TRACE_ENTER, FUNCTION_EVENT_PHYEND);
@@ -2653,23 +2791,6 @@
switch (m_state)
{
- case RADIO_STATE_TX_ACK:
- if (!nrf_802154_revision_has_phyend_event())
- {
- irq_phyend_state_tx_ack();
- }
-
- break;
-
- case RADIO_STATE_CCA_TX:
- case RADIO_STATE_TX:
- if (!nrf_802154_revision_has_phyend_event())
- {
- irq_phyend_state_tx_frame();
- }
-
- break;
-
case RADIO_STATE_RX_ACK: // Ended receiving of ACK.
irq_end_state_rx_ack();
break;
@@ -2785,10 +2906,10 @@
if (timeslot_is_granted())
{
nrf_radio_reset();
+ nrf_802154_fal_deactivate_now(NRF_802154_FAL_ALL);
}
- nrf_fem_control_pin_clear();
- nrf_fem_control_deactivate();
+ nrf_802154_fal_cleanup();
irq_deinit();
}
diff --git a/third_party/NordicSemiconductor/drivers/radio/nrf_802154_debug.c b/third_party/NordicSemiconductor/drivers/radio/nrf_802154_debug.c
index 52fd79f..9e4f579 100644
--- a/third_party/NordicSemiconductor/drivers/radio/nrf_802154_debug.c
+++ b/third_party/NordicSemiconductor/drivers/radio/nrf_802154_debug.c
@@ -62,65 +62,55 @@
nrf_gpio_cfg_output(PIN_DBG_RADIO_EVT_READY);
nrf_gpio_cfg_output(PIN_DBG_RADIO_EVT_FRAMESTART);
nrf_gpio_cfg_output(PIN_DBG_RADIO_EVT_EDEND);
- nrf_gpio_cfg_output(PIN_DBG_RADIO_EVT_PHYEND);
- nrf_gpiote_task_configure(0,
+ nrf_gpiote_task_configure(GPIOTE_DBG_RADIO_EVT_END,
PIN_DBG_RADIO_EVT_END,
NRF_GPIOTE_POLARITY_TOGGLE,
NRF_GPIOTE_INITIAL_VALUE_HIGH);
- nrf_gpiote_task_configure(1,
+ nrf_gpiote_task_configure(GPIOTE_DBG_RADIO_EVT_DISABLED,
PIN_DBG_RADIO_EVT_DISABLED,
NRF_GPIOTE_POLARITY_TOGGLE,
NRF_GPIOTE_INITIAL_VALUE_HIGH);
- nrf_gpiote_task_configure(2,
+ nrf_gpiote_task_configure(GPIOTE_DBG_RADIO_EVT_READY,
PIN_DBG_RADIO_EVT_READY,
NRF_GPIOTE_POLARITY_TOGGLE,
NRF_GPIOTE_INITIAL_VALUE_HIGH);
- nrf_gpiote_task_configure(3,
+ nrf_gpiote_task_configure(GPIOTE_DBG_RADIO_EVT_FRAMESTART,
PIN_DBG_RADIO_EVT_FRAMESTART,
NRF_GPIOTE_POLARITY_TOGGLE,
NRF_GPIOTE_INITIAL_VALUE_HIGH);
- nrf_gpiote_task_configure(4,
+ nrf_gpiote_task_configure(GPIOTE_DBG_RADIO_EVT_EDEND,
PIN_DBG_RADIO_EVT_EDEND,
NRF_GPIOTE_POLARITY_TOGGLE,
NRF_GPIOTE_INITIAL_VALUE_HIGH);
- nrf_gpiote_task_configure(5,
- PIN_DBG_RADIO_EVT_PHYEND,
- NRF_GPIOTE_POLARITY_TOGGLE,
- NRF_GPIOTE_INITIAL_VALUE_HIGH);
- nrf_gpiote_task_enable(0);
- nrf_gpiote_task_enable(1);
- nrf_gpiote_task_enable(2);
- nrf_gpiote_task_enable(3);
- nrf_gpiote_task_enable(4);
- nrf_gpiote_task_enable(5);
+ nrf_gpiote_task_enable(GPIOTE_DBG_RADIO_EVT_END);
+ nrf_gpiote_task_enable(GPIOTE_DBG_RADIO_EVT_DISABLED);
+ nrf_gpiote_task_enable(GPIOTE_DBG_RADIO_EVT_READY);
+ nrf_gpiote_task_enable(GPIOTE_DBG_RADIO_EVT_FRAMESTART);
+ nrf_gpiote_task_enable(GPIOTE_DBG_RADIO_EVT_EDEND);
- nrf_ppi_channel_endpoint_setup(NRF_PPI_CHANNEL0,
+ nrf_ppi_channel_endpoint_setup((nrf_ppi_channel_t)PPI_DBG_RADIO_EVT_END,
(uint32_t)&NRF_RADIO->EVENTS_END,
nrf_gpiote_task_addr_get(NRF_GPIOTE_TASKS_OUT_0));
- nrf_ppi_channel_endpoint_setup(NRF_PPI_CHANNEL1,
+ nrf_ppi_channel_endpoint_setup((nrf_ppi_channel_t)PPI_DBG_RADIO_EVT_DISABLED,
(uint32_t)&NRF_RADIO->EVENTS_DISABLED,
nrf_gpiote_task_addr_get(NRF_GPIOTE_TASKS_OUT_1));
- nrf_ppi_channel_endpoint_setup(NRF_PPI_CHANNEL2,
+ nrf_ppi_channel_endpoint_setup((nrf_ppi_channel_t)PPI_DBG_RADIO_EVT_READY,
(uint32_t)&NRF_RADIO->EVENTS_READY,
nrf_gpiote_task_addr_get(NRF_GPIOTE_TASKS_OUT_2));
- nrf_ppi_channel_endpoint_setup(NRF_PPI_CHANNEL3,
+ nrf_ppi_channel_endpoint_setup((nrf_ppi_channel_t)PPI_DBG_RADIO_EVT_FRAMESTART,
(uint32_t)&NRF_RADIO->EVENTS_FRAMESTART,
nrf_gpiote_task_addr_get(NRF_GPIOTE_TASKS_OUT_3));
- nrf_ppi_channel_endpoint_setup(NRF_PPI_CHANNEL4,
+ nrf_ppi_channel_endpoint_setup((nrf_ppi_channel_t)PPI_DBG_RADIO_EVT_EDEND,
(uint32_t)&NRF_RADIO->EVENTS_EDEND,
nrf_gpiote_task_addr_get(NRF_GPIOTE_TASKS_OUT_4));
- nrf_ppi_channel_endpoint_setup(NRF_PPI_CHANNEL5,
- (uint32_t)&NRF_RADIO->EVENTS_PHYEND,
- nrf_gpiote_task_addr_get(NRF_GPIOTE_TASKS_OUT_5));
- nrf_ppi_channel_enable(NRF_PPI_CHANNEL0);
- nrf_ppi_channel_enable(NRF_PPI_CHANNEL1);
- nrf_ppi_channel_enable(NRF_PPI_CHANNEL2);
- nrf_ppi_channel_enable(NRF_PPI_CHANNEL3);
- nrf_ppi_channel_enable(NRF_PPI_CHANNEL4);
- nrf_ppi_channel_enable(NRF_PPI_CHANNEL5);
+ nrf_ppi_channel_enable((nrf_ppi_channel_t)PPI_DBG_RADIO_EVT_END);
+ nrf_ppi_channel_enable((nrf_ppi_channel_t)PPI_DBG_RADIO_EVT_DISABLED);
+ nrf_ppi_channel_enable((nrf_ppi_channel_t)PPI_DBG_RADIO_EVT_READY);
+ nrf_ppi_channel_enable((nrf_ppi_channel_t)PPI_DBG_RADIO_EVT_FRAMESTART);
+ nrf_ppi_channel_enable((nrf_ppi_channel_t)PPI_DBG_RADIO_EVT_EDEND);
}
/**
@@ -134,36 +124,6 @@
#endif
}
-/**
- * @brief Initialize PPI to toggle GPIO pins on Softdevice events. Initialize GPIO to set it
- * according to Softdevice arbiter client events.
- */
-static void raal_softdevice_event_gpio_toggle_init(void)
-{
-#if RAAL_SOFTDEVICE
- nrf_gpio_cfg_output(PIN_DBG_TIMESLOT_ACTIVE);
- nrf_gpio_cfg_output(PIN_DBG_TIMESLOT_EXTEND_REQ);
- nrf_gpio_cfg_output(PIN_DBG_TIMESLOT_SESSION_IDLE);
- nrf_gpio_cfg_output(PIN_DBG_TIMESLOT_RADIO_IRQ);
- nrf_gpio_cfg_output(PIN_DBG_TIMESLOT_FAILED);
- nrf_gpio_cfg_output(PIN_DBG_TIMESLOT_BLOCKED);
- nrf_gpio_cfg_output(PIN_DBG_RTC0_EVT_REM);
-
- nrf_gpiote_task_configure(5,
- PIN_DBG_RTC0_EVT_REM,
- NRF_GPIOTE_POLARITY_TOGGLE,
- NRF_GPIOTE_INITIAL_VALUE_HIGH);
-
- nrf_gpiote_task_enable(5);
-
- nrf_ppi_channel_endpoint_setup(NRF_PPI_CHANNEL5,
- (uint32_t)&NRF_RTC0->EVENTS_COMPARE[1],
- nrf_gpiote_task_addr_get(NRF_GPIOTE_TASKS_OUT_5));
-
- nrf_ppi_channel_enable(NRF_PPI_CHANNEL5);
-#endif // RAAL_SOFTDEVICE
-}
-
#endif // ENABLE_DEBUG_GPIO
void nrf_802154_debug_init(void)
@@ -171,7 +131,6 @@
#if ENABLE_DEBUG_GPIO
radio_event_gpio_toggle_init();
raal_simulator_gpio_init();
- raal_softdevice_event_gpio_toggle_init();
#endif // ENABLE_DEBUG_GPIO
}
diff --git a/third_party/NordicSemiconductor/drivers/radio/nrf_802154_debug.h b/third_party/NordicSemiconductor/drivers/radio/nrf_802154_debug.h
index ba635ca..d407b2a 100644
--- a/third_party/NordicSemiconductor/drivers/radio/nrf_802154_debug.h
+++ b/third_party/NordicSemiconductor/drivers/radio/nrf_802154_debug.h
@@ -141,6 +141,49 @@
#endif
+#define PPI_DBG_RADIO_EVT_END 0
+#define PPI_DBG_RADIO_EVT_DISABLED 1
+#define PPI_DBG_RADIO_EVT_READY 2
+#define PPI_DBG_RADIO_EVT_FRAMESTART 3
+#define PPI_DBG_RADIO_EVT_EDEND 4
+
+#define GPIOTE_DBG_RADIO_EVT_END 0
+#define GPIOTE_DBG_RADIO_EVT_DISABLED 1
+#define GPIOTE_DBG_RADIO_EVT_READY 2
+#define GPIOTE_DBG_RADIO_EVT_FRAMESTART 3
+#define GPIOTE_DBG_RADIO_EVT_EDEND 4
+
+#if ENABLE_DEBUG_GPIO
+
+#define NRF_802154_DEBUG_PINS_USED_MASK ((1 << PIN_DBG_RADIO_EVT_END) | \
+ (1 << PIN_DBG_RADIO_EVT_DISABLED) | \
+ (1 << PIN_DBG_RADIO_EVT_READY) | \
+ (1 << PIN_DBG_RADIO_EVT_FRAMESTART) | \
+ (1 << PIN_DBG_RADIO_EVT_EDEND) | \
+ (1 << PIN_DBG_RADIO_EVT_PHYEND))
+
+#define NRF_802154_DEBUG_PPI_CHANNELS_USED_MASK ((1 << PPI_DBG_RADIO_EVT_END) | \
+ (1 << PPI_DBG_RADIO_EVT_DISABLED) | \
+ (1 << PPI_DBG_RADIO_EVT_READY) | \
+ (1 << PPI_DBG_RADIO_EVT_FRAMESTART) | \
+ (1 << PPI_DBG_RADIO_EVT_EDEND) | \
+ (1 << PPI_DBG_RADIO_EVT_PHYEND))
+
+#define NRF_802154_DEBUG_GPIOTE_CHANNELS_USED_MASK ((1 << GPIOTE_DBG_RADIO_EVT_END) | \
+ (1 << GPIOTE_DBG_RADIO_EVT_DISABLED) | \
+ (1 << GPIOTE_DBG_RADIO_EVT_READY) | \
+ (1 << GPIOTE_DBG_RADIO_EVT_FRAMESTART) | \
+ (1 << GPIOTE_DBG_RADIO_EVT_EDEND) | \
+ (1 << GPIOTE_DBG_RADIO_EVT_PHYEND))
+
+#else // ENABLE_DEBUG_GPIO
+
+#define NRF_802154_DEBUG_PINS_USED_MASK 0
+#define NRF_802154_DEBUG_PPI_CHANNELS_USED_MASK 0
+#define NRF_802154_DEBUG_GPIOTE_CHANNELS_USED_MASK 0
+
+#endif // ENABLE_DEBUG_GPIO
+
#ifdef __cplusplus
}
#endif
diff --git a/third_party/NordicSemiconductor/drivers/radio/nrf_802154_debug_core.h b/third_party/NordicSemiconductor/drivers/radio/nrf_802154_debug_core.h
index bc948ae..8da136c 100644
--- a/third_party/NordicSemiconductor/drivers/radio/nrf_802154_debug_core.h
+++ b/third_party/NordicSemiconductor/drivers/radio/nrf_802154_debug_core.h
@@ -57,8 +57,24 @@
#define PIN_DBG_RTC0_EVT_REM 31
+#if ENABLE_DEBUG_GPIO
+
+#define NRF_802154_DEBUG_CORE_PINS_USED ((1 << PIN_DBG_TIMESLOT_ACTIVE) | \
+ (1 << PIN_DBG_TIMESLOT_EXTEND_REQ) | \
+ (1 << PIN_DBG_TIMESLOT_SESSION_IDLE) | \
+ (1 << PIN_DBG_TIMESLOT_RADIO_IRQ) | \
+ (1 << PIN_DBG_TIMESLOT_FAILED) | \
+ (1 << PIN_DBG_TIMESLOT_BLOCKED) | \
+ (1 << PIN_DBG_RAAL_CRITICAL_SECTION))
+
+#else // ENABLE_DEBUG_GPIO
+
+#define NRF_802154_DEBUG_CORE_PINS_USED 0
+
+#endif
+
#ifndef DEBUG_VERBOSITY
-#define DEBUG_VERBOSITY 1
+#define DEBUG_VERBOSITY 1
#endif
#ifndef CU_TEST
diff --git a/third_party/NordicSemiconductor/drivers/radio/nrf_802154_peripherals.h b/third_party/NordicSemiconductor/drivers/radio/nrf_802154_peripherals.h
new file mode 100644
index 0000000..6ba5152
--- /dev/null
+++ b/third_party/NordicSemiconductor/drivers/radio/nrf_802154_peripherals.h
@@ -0,0 +1,506 @@
+/* Copyright (c) 2019, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @brief Module that defines the 802.15.4 driver peripheral usage.
+ *
+ */
+
+#ifndef NRF_802154_PERIPHERALS_H__
+#define NRF_802154_PERIPHERALS_H__
+
+#include <nrf.h>
+#include <nrfx.h>
+#include "nrf_802154_config.h"
+#include "nrf_802154_debug.h"
+#include "nrf_802154_debug_core.h"
+#include "fem/nrf_fem_protocol_api.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @def NRF_802154_HIGH_PRECISION_TIMER_INSTANCE_NO
+ *
+ * Number of the timer instance used for precise frame timestamps and synchronous radio operations.
+ *
+ */
+#ifndef NRF_802154_HIGH_PRECISION_TIMER_INSTANCE_NO
+#define NRF_802154_HIGH_PRECISION_TIMER_INSTANCE_NO 0
+#endif
+
+/**
+ * @def NRF_802154_HIGH_PRECISION_TIMER_INSTANCE
+ *
+ * The timer instance used for precise frame timestamps and synchronous radio operations.
+ *
+ */
+#define NRF_802154_HIGH_PRECISION_TIMER_INSTANCE \
+ NRFX_CONCAT_2(NRF_TIMER, NRF_802154_HIGH_PRECISION_TIMER_INSTANCE_NO)
+
+/**
+ * @def NRF_802154_TIMER_INSTANCE_NO
+ *
+ * Number of the timer instance used both by the driver for ACK IFS and by the FEM module.
+ *
+ */
+#ifndef NRF_802154_TIMER_INSTANCE_NO
+#define NRF_802154_TIMER_INSTANCE_NO 1
+#endif
+
+/**
+ * @def NRF_802154_TIMER_INSTANCE
+ *
+ * The timer instance used both by the driver for ACK IFS and by the FEM module.
+ *
+ */
+#define NRF_802154_TIMER_INSTANCE \
+ NRFX_CONCAT_2(NRF_TIMER, NRF_802154_TIMER_INSTANCE_NO)
+
+/**
+ * @def NRF_802154_COUNTER_TIMER_INSTANCE_NO
+ *
+ * Number of the timer instance used for detecting when PSDU is being received.
+ *
+ */
+#ifndef NRF_802154_COUNTER_TIMER_INSTANCE_NO
+#define NRF_802154_COUNTER_TIMER_INSTANCE_NO 2
+#endif
+
+/**
+ * @def NRF_802154_COUNTER_TIMER_INSTANCE
+ *
+ * The timer instance used by the driver for detecting when PSDU is being received.
+ *
+ * @note This configuration is used only when the NRF_RADIO_EVENT_BCMATCH event handling is disabled
+ * (see @ref NRF_802154_DISABLE_BCC_MATCHING).
+ */
+#define NRF_802154_COUNTER_TIMER_INSTANCE \
+ NRFX_CONCAT_2(NRF_TIMER, NRF_802154_COUNTER_TIMER_INSTANCE_NO)
+
+/**
+ * @def NRF_802154_SWI_EGU_INSTANCE_NO
+ *
+ * Number of the SWI EGU instance used by the driver to synchronize PPIs and for requests and
+ * notifications if SWI is in use.
+ *
+ */
+#ifndef NRF_802154_SWI_EGU_INSTANCE_NO
+
+#ifdef NRF52811_XXAA
+#define NRF_802154_SWI_EGU_INSTANCE_NO 0
+#else
+#define NRF_802154_SWI_EGU_INSTANCE_NO 3
+#endif
+
+#endif // NRF_802154_SWI_EGU_INSTANCE_NO
+
+/**
+ * @def NRF_802154_SWI_EGU_INSTANCE
+ *
+ * The SWI EGU instance used by the driver to synchronize PPIs and for requests and notifications if
+ * SWI is in use.
+ *
+ * @note This option is used by the core module regardless of the driver configuration.
+ *
+ */
+#define NRF_802154_SWI_EGU_INSTANCE NRFX_CONCAT_2(NRF_EGU, NRF_802154_SWI_EGU_INSTANCE_NO)
+
+/**
+ * @def NRF_802154_SWI_IRQ_HANDLER
+ *
+ * The SWI EGU IRQ handler used by the driver for requests and notifications if SWI is in use.
+ *
+ * @note This option is used when the driver uses SWI to process requests and notifications.
+ *
+ */
+#define NRF_802154_SWI_IRQ_HANDLER \
+ NRFX_CONCAT_3(NRFX_CONCAT_3(SWI, NRF_802154_SWI_EGU_INSTANCE_NO, _EGU), \
+ NRF_802154_SWI_EGU_INSTANCE_NO, \
+ _IRQHandler)
+
+/**
+ * @def NRF_802154_SWI_IRQN
+ *
+ * The SWI EGU IRQ number used by the driver for requests and notifications if SWI is in use.
+ *
+ * @note This option is used when the driver uses SWI to process requests and notifications.
+ *
+ */
+#define NRF_802154_SWI_IRQN \
+ NRFX_CONCAT_3(NRFX_CONCAT_3(SWI, NRF_802154_SWI_EGU_INSTANCE_NO, _EGU), \
+ NRF_802154_SWI_EGU_INSTANCE_NO, \
+ _IRQn)
+
+/**
+ * @def NRF_802154_RTC_INSTANCE_NO
+ *
+ * Number of the RTC instance used in the standalone timer driver implementation.
+ *
+ */
+#ifndef NRF_802154_RTC_INSTANCE_NO
+
+#ifdef NRF52811_XXAA
+#define NRF_802154_RTC_INSTANCE_NO 0
+#else
+#define NRF_802154_RTC_INSTANCE_NO 2
+#endif
+
+#endif // NRF_802154_RTC_INSTANCE_NO
+
+/**
+ * @def NRF_802154_RTC_INSTANCE
+ *
+ * The RTC instance used in the standalone timer driver implementation.
+ *
+ * @note This configuration is only applicable for the Low Power Timer Abstraction Layer
+ * implementation in nrf_802154_lp_timer_nodrv.c.
+ *
+ */
+#define NRF_802154_RTC_INSTANCE NRFX_CONCAT_2(NRF_RTC, NRF_802154_RTC_INSTANCE_NO)
+
+/**
+ * @def NRF_802154_RTC_IRQ_HANDLER
+ *
+ * The RTC interrupt handler name used in the standalone timer driver implementation.
+ *
+ * @note This configuration is only applicable for Low Power Timer Abstraction Layer implementation
+ * in nrf_802154_lp_timer_nodrv.c.
+ *
+ */
+#define NRF_802154_RTC_IRQ_HANDLER NRFX_CONCAT_3(RTC, NRF_802154_RTC_INSTANCE_NO, _IRQHandler)
+
+/**
+ * @def NRF_802154_RTC_IRQN
+ *
+ * The RTC Interrupt number used in the standalone timer driver implementation.
+ *
+ * @note This configuration is only applicable for the Low Power Timer Abstraction Layer implementation
+ * in nrf_802154_lp_timer_nodrv.c.
+ *
+ */
+#define NRF_802154_RTC_IRQN NRFX_CONCAT_3(RTC, NRF_802154_RTC_INSTANCE_NO, _IRQn)
+
+/**
+ * @def NRF_802154_PPI_RADIO_DISABLED_TO_EGU
+ *
+ * The PPI channel that connects RADIO_DISABLED event to EGU task.
+ *
+ * @note This option is used by the core module regardless of the driver configuration.
+ *
+ */
+#ifndef NRF_802154_PPI_RADIO_DISABLED_TO_EGU
+#define NRF_802154_PPI_RADIO_DISABLED_TO_EGU NRF_PPI_CHANNEL6
+#endif
+
+/**
+ * @def NRF_802154_PPI_EGU_TO_RADIO_RAMP_UP
+ *
+ * The PPI channel that connects EGU event to RADIO_TXEN or RADIO_RXEN task.
+ *
+ * @note This option is used by the core module regardless of the driver configuration.
+ *
+ */
+#ifndef NRF_802154_PPI_EGU_TO_RADIO_RAMP_UP
+#define NRF_802154_PPI_EGU_TO_RADIO_RAMP_UP NRF_PPI_CHANNEL7
+#endif
+
+/**
+ * @def NRF_802154_PPI_EGU_TO_TIMER_START
+ *
+ * The PPI channel that connects EGU event to TIMER_START task.
+ *
+ * @note This option is used by the core module regardless of the driver configuration.
+ *
+ */
+#ifndef NRF_802154_PPI_EGU_TO_TIMER_START
+#define NRF_802154_PPI_EGU_TO_TIMER_START NRF_PPI_CHANNEL8
+#endif
+
+/**
+ * @def NRF_802154_PPI_RADIO_CRCERROR_TO_TIMER_CLEAR
+ *
+ * The PPI channel that connects RADIO_CRCERROR event to TIMER_CLEAR task.
+ *
+ * @note This option is used by the core module regardless of the driver configuration.
+ * The peripheral is shared with @ref NRF_802154_PPI_RADIO_CCAIDLE_TO_FEM_GPIOTE
+ * and @ref NRF_802154_PPI_TIMER_COMPARE_TO_RADIO_TXEN.
+ *
+ */
+#ifndef NRF_802154_PPI_RADIO_CRCERROR_TO_TIMER_CLEAR
+#define NRF_802154_PPI_RADIO_CRCERROR_TO_TIMER_CLEAR NRF_PPI_CHANNEL9
+#endif
+
+/**
+ * @def NRF_802154_PPI_RADIO_CCAIDLE_TO_FEM_GPIOTE
+ *
+ * The PPI channel that connects RADIO_CCAIDLE event to the GPIOTE tasks used by the Frontend.
+ *
+ * @note This option is used by the core module regardless of the driver configuration.
+ * The peripheral is shared with @ref NRF_802154_PPI_RADIO_CRCERROR_TO_TIMER_CLEAR
+ * and @ref NRF_802154_PPI_TIMER_COMPARE_TO_RADIO_TXEN.
+ *
+ */
+#ifndef NRF_802154_PPI_RADIO_CCAIDLE_TO_FEM_GPIOTE
+#define NRF_802154_PPI_RADIO_CCAIDLE_TO_FEM_GPIOTE NRF_PPI_CHANNEL9
+#endif
+
+/**
+ * @def NRF_802154_PPI_TIMER_COMPARE_TO_RADIO_TXEN
+ *
+ * The PPI channel that connects TIMER_COMPARE event to RADIO_TXEN task.
+ *
+ * @note This option is used by the core module regardless of the driver configuration.
+ * The peripheral is shared with @ref NRF_802154_PPI_RADIO_CRCERROR_TO_TIMER_CLEAR
+ * and @ref NRF_802154_PPI_RADIO_CCAIDLE_TO_FEM_GPIOTE.
+ *
+ */
+#ifndef NRF_802154_PPI_TIMER_COMPARE_TO_RADIO_TXEN
+#define NRF_802154_PPI_TIMER_COMPARE_TO_RADIO_TXEN NRF_PPI_CHANNEL9
+#endif
+
+/**
+ * @def NRF_802154_PPI_RADIO_CRCOK_TO_PPI_GRP_DISABLE
+ *
+ * The PPI channel that connects RADIO_CRCOK event with the task that disables the whole PPI group.
+ *
+ * @note This option is used by the core module regardless of the driver configuration.
+ *
+ */
+#ifndef NRF_802154_PPI_RADIO_CRCOK_TO_PPI_GRP_DISABLE
+#define NRF_802154_PPI_RADIO_CRCOK_TO_PPI_GRP_DISABLE NRF_PPI_CHANNEL10
+#endif
+
+#ifdef NRF_802154_DISABLE_BCC_MATCHING
+
+/**
+ * @def NRF_802154_PPI_RADIO_ADDR_TO_COUNTER_COUNT
+ *
+ * The PPI channel that connects RADIO_ADDRESS event to TIMER_COUNT task.
+ *
+ * @note This configuration is used only when the NRF_RADIO_EVENT_BCMATCH event handling is disabled
+ * (see @ref NRF_802154_DISABLE_BCC_MATCHING).
+ *
+ */
+#ifndef NRF_802154_PPI_RADIO_ADDR_TO_COUNTER_COUNT
+#define NRF_802154_PPI_RADIO_ADDR_TO_COUNTER_COUNT NRF_PPI_CHANNEL11
+#endif
+
+/**
+ * @def NRF_802154_PPI_RADIO_CRCERROR_TO_COUNTER_CLEAR
+ *
+ * The PPI channel that connects RADIO_CRCERROR event to TIMER_CLEAR task.
+ *
+ * @note This option is used only when the NRF_RADIO_EVENT_BCMATCH event handling is disabled
+ * (see @ref NRF_802154_DISABLE_BCC_MATCHING).
+ *
+ */
+#ifndef NRF_802154_PPI_RADIO_CRCERROR_COUNTER_CLEAR
+#define NRF_802154_PPI_RADIO_CRCERROR_COUNTER_CLEAR NRF_PPI_CHANNEL12
+#endif
+
+/**
+ * @def NRF_802154_DISABLE_BCC_MATCHING_PPI_CHANNELS_USED_MASK
+ *
+ * Helper bit mask of PPI channels used additionally by the 802.15.4 driver when the BCC matching
+ * is disabled.
+ */
+#define NRF_802154_DISABLE_BCC_MATCHING_PPI_CHANNELS_USED_MASK \
+ ((1 << NRF_802154_PPI_RADIO_ADDR_TO_COUNTER_COUNT) | \
+ (1 << NRF_802154_PPI_RADIO_CRCERROR_COUNTER_CLEAR))
+
+#else // NRF_802154_DISABLE_BCC_MATCHING
+
+#define NRF_802154_DISABLE_BCC_MATCHING_PPI_CHANNELS_USED_MASK 0
+
+#endif // NRF_802154_DISABLE_BCC_MATCHING
+
+#ifdef NRF_802154_FRAME_TIMESTAMP_ENABLED
+
+/**
+ * @def NRF_802154_PPI_RTC_COMPARE_TO_TIMER_CAPTURE
+ *
+ * The PPI channel that connects LP timer's COMPARE event to HP timer's TIMER_CAPTURE task.
+ *
+ * @note This option is used only when the timestamping feature is enabled
+ * (see @ref NRF_802154_FRAME_TIMESTAMP_ENABLED).
+ *
+ */
+#ifndef NRF_802154_PPI_RTC_COMPARE_TO_TIMER_CAPTURE
+#define NRF_802154_PPI_RTC_COMPARE_TO_TIMER_CAPTURE NRF_PPI_CHANNEL13
+#endif
+
+/**
+ * @def NRF_802154_PPI_TIMESTAMP_EVENT_TO_TIMER_CAPTURE
+ *
+ * The PPI channel that connects provided event to HP timer's TIMER_CAPTURE task.
+ *
+ * @note This option is used only when the timestamping feature is enabled
+ * (see @ref NRF_802154_FRAME_TIMESTAMP_ENABLED).
+ *
+ */
+#ifndef NRF_802154_PPI_TIMESTAMP_EVENT_TO_TIMER_CAPTURE
+#define NRF_802154_PPI_TIMESTAMP_EVENT_TO_TIMER_CAPTURE NRF_PPI_CHANNEL14
+#endif
+
+/**
+ * @def NRF_802154_TIMESTAMP_PPI_CHANNELS_USED_MASK
+ *
+ * Helper bit mask of PPI channels used by the 802.15.4 driver for timestamping.
+ */
+#define NRF_802154_TIMESTAMP_PPI_CHANNELS_USED_MASK \
+ ((1 << NRF_802154_PPI_RTC_COMPARE_TO_TIMER_CAPTURE) | \
+ (1 << NRF_802154_PPI_TIMESTAMP_EVENT_TO_TIMER_CAPTURE))
+
+#else // NRF_802154_FRAME_TIMESTAMP_ENABLED
+
+#define NRF_802154_TIMESTAMP_PPI_CHANNELS_USED_MASK 0
+
+#endif // NRF_802154_FRAME_TIMESTAMP_ENABLED
+
+/**
+ * @def NRF_802154_PPI_CORE_GROUP
+ *
+ * The PPI channel group used to disable self-disabling PPIs used by the core module.
+ *
+ * @note This option is used by the core module regardless of the driver configuration.
+ *
+ */
+#ifndef NRF_802154_PPI_CORE_GROUP
+#define NRF_802154_PPI_CORE_GROUP NRF_PPI_CHANNEL_GROUP0
+#endif
+
+#ifdef NRF_802154_FRAME_TIMESTAMP_ENABLED
+
+/**
+ * @def NRF_802154_PPI_TIMESTAMP_GROUP
+ *
+ * The PPI channel group used to control PPIs used for timestamping.
+ *
+ * @note This option is used only when the timestamping feature is enabled
+ * (see @ref NRF_802154_FRAME_TIMESTAMP_ENABLED).
+ *
+ */
+#ifndef NRF_802154_PPI_TIMESTAMP_GROUP
+#define NRF_802154_PPI_TIMESTAMP_GROUP NRF_PPI_CHANNEL_GROUP1
+#endif
+
+#endif // NRF_802154_FRAME_TIMESTAMP_ENABLED
+
+/**
+ * @def NRF_802154_TIMERS_USED_MASK
+ *
+ * Bit mask of instances of timer peripherals used by the 802.15.4 driver.
+ */
+#ifndef NRF_802154_TIMERS_USED_MASK
+#define NRF_802154_TIMERS_USED_MASK ((1 << NRF_802154_HIGH_PRECISION_TIMER_INSTANCE_NO) | \
+ (1 << NRF_802154_TIMER_INSTANCE_NO) | \
+ (1 << NRF_802154_COUNTER_TIMER_INSTANCE_NO))
+#endif // NRF_802154_TIMERS_USED_MASK
+
+/**
+ * @def NRF_802154_SWI_EGU_USED_MASK
+ *
+ * Bit mask of instances of SWI/EGU peripherals used by the 802.15.4 driver.
+ */
+#ifndef NRF_802154_SWI_EGU_USED_MASK
+#define NRF_802154_SWI_EGU_USED_MASK (1 << NRF_802154_SWI_EGU_INSTANCE_NO)
+#endif
+
+/**
+ * @def NRF_802154_RTC_USED_MASK
+ *
+ * Bit mask of instances of RTC peripherals used by the 802.15.4 driver.
+ */
+#ifndef NRF_802154_RTC_USED_MASK
+#define NRF_802154_RTC_USED_MASK (1 << NRF_802154_RTC_INSTANCE_NO)
+#endif
+
+/**
+ * @def NRF_802154_GPIO_PINS_USED_MASK
+ *
+ * Bit mask of GPIO pins used by the 802.15.4 driver.
+ */
+#ifndef NRF_802154_GPIO_PINS_USED_MASK
+#define NRF_802154_GPIO_PINS_USED_MASK (NRF_802154_FEM_PINS_USED_MASK | \
+ NRF_802154_DEBUG_PINS_USED_MASK)
+#endif // NRF_802154_GPIO_PINS_USED_MASK
+
+/**
+ * @def NRF_802154_GPIOTE_CHANNELS_USED_MASK
+ *
+ * Bit mask of GPIOTE peripherals used by the 802.15.4 driver.
+ */
+#ifndef NRF_802154_GPIOTE_CHANNELS_USED_MASK
+#define NRF_802154_GPIOTE_CHANNELS_USED_MASK (NRF_802154_FEM_GPIOTE_CHANNELS_USED_MASK | \
+ NRF_802154_DEBUG_GPIOTE_CHANNELS_USED_MASK)
+#endif // NRF_802154_GPIOTE_CHANNELS_USED_MASK
+
+/**
+ * @def NRF_80254_PPI_CHANNELS_USED_MASK
+ *
+ * Bit mask of PPI channels used by the 802.15.4 driver.
+ */
+#ifndef NRF_802154_PPI_CHANNELS_USED_MASK
+#define NRF_802154_PPI_CHANNELS_USED_MASK ((1 << NRF_802154_PPI_RADIO_DISABLED_TO_EGU) | \
+ (1 << NRF_802154_PPI_EGU_TO_RADIO_RAMP_UP) | \
+ (1 << NRF_802154_PPI_EGU_TO_TIMER_START) | \
+ (1 << NRF_802154_PPI_RADIO_CRCERROR_TO_TIMER_CLEAR) | \
+ (1 << NRF_802154_PPI_RADIO_CCAIDLE_TO_FEM_GPIOTE) | \
+ (1 << NRF_802154_PPI_TIMER_COMPARE_TO_RADIO_TXEN) | \
+ (1 << NRF_802154_PPI_RADIO_CRCOK_TO_PPI_GRP_DISABLE) | \
+ NRF_802154_DISABLE_BCC_MATCHING_PPI_CHANNELS_USED_MASK | \
+ NRF_802154_TIMESTAMP_PPI_CHANNELS_USED_MASK | \
+ NRF_802154_FEM_PPI_CHANNELS_USED_MASK | \
+ NRF_802154_DEBUG_PPI_CHANNELS_USED_MASK)
+#endif // NRF_802154_PPI_CHANNELS_USED_MASK
+
+/**
+ * @def NRF_802154_PPI_GROUPS_USED_MASK
+ *
+ * Bit mask of PPI groups identifiers used by the 802.15.4 driver.
+ */
+#ifndef NRF_802154_PPI_GROUPS_USED_MASK
+
+#ifdef NRF_802154_FRAME_TIMESTAMP_ENABLED
+#define NRF_802154_PPI_GROUPS_USED_MASK ((1 << NRF_802154_PPI_CORE_GROUP) | \
+ (1 << NRF_802154_PPI_TIMESTAMP_GROUP))
+#else // NRF_802154_FRAME_TIMESTAMP_ENABLED
+#define NRF_802154_PPI_GROUPS_USED_MASK (1 << NRF_802154_PPI_CORE_GROUP)
+#endif // NRF_802154_FRAME_TIMESTAMP_ENABLED
+
+#endif // NRF_802154_PPI_GROUPS_USED_MASK
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // NRF_802154_PERIPHERALS_H__
diff --git a/third_party/NordicSemiconductor/drivers/radio/nrf_802154_request_swi.c b/third_party/NordicSemiconductor/drivers/radio/nrf_802154_request_swi.c
index 513da3f..fcc36cb 100644
--- a/third_party/NordicSemiconductor/drivers/radio/nrf_802154_request_swi.c
+++ b/third_party/NordicSemiconductor/drivers/radio/nrf_802154_request_swi.c
@@ -44,9 +44,10 @@
#include "nrf_802154_core.h"
#include "nrf_802154_critical_section.h"
#include "nrf_802154_debug.h"
-#include "nrf_802154_utils.h"
+#include "nrf_802154_peripherals.h"
#include "nrf_802154_rx_buffer.h"
#include "nrf_802154_swi.h"
+#include "nrf_802154_utils.h"
#include "nrf_radio.h"
#include <nrf.h>
diff --git a/third_party/NordicSemiconductor/drivers/radio/nrf_802154_revision.c b/third_party/NordicSemiconductor/drivers/radio/nrf_802154_revision.c
deleted file mode 100644
index 33a8fad..0000000
--- a/third_party/NordicSemiconductor/drivers/radio/nrf_802154_revision.c
+++ /dev/null
@@ -1,178 +0,0 @@
-/* Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-/**
- * @file
- * This file implements helpers for checking nRF SoC revision.
- *
- */
-
-#include "nrf_802154_revision.h"
-
-#include <assert.h>
-
-/** @breif Types of nRF revisions. */
-typedef enum
-{
- NRF52840_REVISION_AAAA,
- NRF52840_REVISION_AABA,
- NRF52840_REVISION_AACX,
- NRF52811_REVISION,
- NRF_REVISION_UNKNOWN,
-} nrf_802154_chip_revision;
-
-static nrf_802154_chip_revision m_nrf_revision = NRF_REVISION_UNKNOWN;
-
-/**
- * @brief Internal auxiliary function to check if the program is running on NRF52840 chip.
- *
- * @retval true If it is NRF52480 chip.
- * @retval false If it is other chip.
- */
-static inline bool nrf_revision_type_52840(void)
-{
- return ((((*(uint32_t *)0xF0000FE0) & 0xFF) == 0x08) &&
- (((*(uint32_t *)0xF0000FE4) & 0x0F) == 0x00));
-}
-
-/**
- * @brief Internal auxiliary function to check if the program is running
- * on the AAAA revision of the nRF52840 chip.
- *
- * @retval true If it is NRF52480_AAAA chip revision.
- * @retval false It is other chip revision.
- */
-static inline bool nrf_revision_type_52840_aaaa(void)
-{
- return (nrf_revision_type_52840() &&
- (((*(uint32_t *)0xF0000FE8) & 0xF0) == 0x00) && // revision
- (((*(uint32_t *)0xF0000FEC) & 0xF0) == 0x00)); // sub-revision
-}
-
-/**
- * @brief Internal auxiliary function to check if the program is running
- * on the AABA revision of the nRF52840 chip.
- *
- * @retval true If it is NRF52480_AABA chip revision.
- * @retval false It is other chip revision.
- */
-static inline bool nrf_revision_type_52840_aaba(void)
-{
- return (nrf_revision_type_52840() &&
- (((*(uint32_t *)0xF0000FE8) & 0xF0) == 0x10) && // revision
- (((*(uint32_t *)0xF0000FEC) & 0xF0) == 0x00)); // sub-revision
-}
-
-/**
- * @brief Internal auxiliary function to check if the program is running
- * on the AACx revision of the nRF52840 chip.
- *
- * @retval true If it is NRF52480_AACx chip revision.
- * @retval false It is other chip revision.
- */
-static inline bool nrf_revision_type_52840_aacx(void)
-{
- return (nrf_revision_type_52840() &&
- (((*(uint32_t *)0xF0000FE8) & 0xF0) == 0x20) && // revision
- (((*(uint32_t *)0xF0000FEC) & 0xF0) == 0x00)); // sub-revision
-}
-
-/**
- * @brief Internal auxiliary function to check if the program is running on NRF52811 chip.
- *
- * @retval true If it is NRF52411 chip.
- * @retval false If it is other chip.
- */
-static inline bool nrf_revision_type_52811(void)
-{
- return ((((*(uint32_t *)0xF0000FE0) & 0xFF) == 0x0E) &&
- (((*(uint32_t *)0xF0000FE4) & 0x0F) == 0x00));
-}
-
-void nrf_802154_revision_init(void)
-{
- if (nrf_revision_type_52840_aaaa())
- {
- m_nrf_revision = NRF52840_REVISION_AAAA;
- }
- else if (nrf_revision_type_52840_aaba())
- {
- m_nrf_revision = NRF52840_REVISION_AABA;
- }
- else if (nrf_revision_type_52840_aacx())
- {
- m_nrf_revision = NRF52840_REVISION_AACX;
- }
- else if (nrf_revision_type_52811())
- {
- m_nrf_revision = NRF52811_REVISION;
- }
- else
- {
- m_nrf_revision = NRF_REVISION_UNKNOWN;
- }
-
- // This variable may be unused if revision is defined by the compiler.
- (void)m_nrf_revision;
-}
-
-bool nrf_802154_revision_has_phyend_event(void)
-{
-#if defined(NRF52840_XXAA) || defined(NRF52840_AAAA)
- return false;
-#elif defined(NRF52840_AABA)
- return true;
-#elif defined(NRF52840_AACX)
- return true;
-#elif defined(NRF52811_XXAA)
- return true;
-#else
- bool result = false;
-
- switch (m_nrf_revision)
- {
- case NRF52840_REVISION_AAAA:
- result = false;
- break;
-
- case NRF52840_REVISION_AABA:
- case NRF52840_REVISION_AACX:
- case NRF52811_REVISION:
- case NRF_REVISION_UNKNOWN:
- result = true;
- break;
-
- default:
- assert(false);
- }
-
- return result;
-#endif // NRF52840_AAAA
-}
diff --git a/third_party/NordicSemiconductor/drivers/radio/nrf_802154_revision.h b/third_party/NordicSemiconductor/drivers/radio/nrf_802154_revision.h
deleted file mode 100644
index a40cc87..0000000
--- a/third_party/NordicSemiconductor/drivers/radio/nrf_802154_revision.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/* Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-/**
- * @brief Module that contains helpers for checking the nRF SoC revision.
- *
- */
-
-#ifndef NRF_802154_REVISION_H_
-#define NRF_802154_REVISION_H_
-
-#include <stdbool.h>
-#include <stdint.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @brief Initializes the module by reading the nRF52840 revision from the registers and storing it
- * for convenient access.
- *
- * @note If the chip revision is not recognized, this module assumes that it is running on a newer
- * chip revision that has all of the features compared to the features of the most recent
- * known revision.
- */
-void nrf_802154_revision_init(void);
-
-/**
- * @brief Checks if the program is running on the nRF52840 revision that supports the PHYEND event.
- *
- * @retval true The PHYEND event is supported.
- * @retval false The PHYEND event is not supported.
- */
-bool nrf_802154_revision_has_phyend_event(void);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* NRF_802154_REVISION_H_ */
diff --git a/third_party/NordicSemiconductor/drivers/radio/nrf_802154_swi.c b/third_party/NordicSemiconductor/drivers/radio/nrf_802154_swi.c
index 5fa26dc..bbadda8 100644
--- a/third_party/NordicSemiconductor/drivers/radio/nrf_802154_swi.c
+++ b/third_party/NordicSemiconductor/drivers/radio/nrf_802154_swi.c
@@ -43,6 +43,7 @@
#include "nrf_802154.h"
#include "nrf_802154_config.h"
#include "nrf_802154_core.h"
+#include "nrf_802154_peripherals.h"
#include "nrf_802154_rx_buffer.h"
#include "nrf_802154_utils.h"
#include "nrf_egu.h"
@@ -54,6 +55,7 @@
* detection.
*/
#define NTF_QUEUE_SIZE (NRF_802154_RX_BUFFERS + 3)
+
/** Size of requests queue.
*
* Two is minimal queue size. It is not expected in current implementation to queue a few requests.
diff --git a/third_party/NordicSemiconductor/drivers/radio/nrf_802154_timer_coord.c b/third_party/NordicSemiconductor/drivers/radio/nrf_802154_timer_coord.c
index 3594bc6..0aaf598 100644
--- a/third_party/NordicSemiconductor/drivers/radio/nrf_802154_timer_coord.c
+++ b/third_party/NordicSemiconductor/drivers/radio/nrf_802154_timer_coord.c
@@ -42,7 +42,7 @@
#include "nrf_802154_config.h"
#include "nrf_802154_debug.h"
-#include "nrf_ppi.h"
+#include "nrf_802154_peripherals.h"
#include "platform/hp_timer/nrf_802154_hp_timer.h"
#include "platform/lp_timer/nrf_802154_lp_timer.h"
@@ -57,13 +57,9 @@
#define RESYNC_TIME (4 * TIME_BASE) ///< Delay of following resynchronizations.
#define EWMA_COEF (8) ///< Weight used in the EWMA algorithm.
-#define PPI_CH0 NRF_PPI_CHANNEL13
-#define PPI_CH1 NRF_PPI_CHANNEL14
-#define PPI_CHGRP0 NRF_PPI_CHANNEL_GROUP1
-
-#define PPI_SYNC PPI_CH0
-#define PPI_TIMESTAMP PPI_CH1
-#define PPI_TIMESTAMP_GROUP PPI_CHGRP0
+#define PPI_SYNC NRF_802154_PPI_RTC_COMPARE_TO_TIMER_CAPTURE
+#define PPI_TIMESTAMP NRF_802154_PPI_TIMESTAMP_EVENT_TO_TIMER_CAPTURE
+#define PPI_TIMESTAMP_GROUP NRF_802154_PPI_TIMESTAMP_GROUP
#if NRF_802154_FRAME_TIMESTAMP_ENABLED
// Structure holding common timepoint from both timers.
diff --git a/third_party/NordicSemiconductor/drivers/radio/nrf_802154_types.h b/third_party/NordicSemiconductor/drivers/radio/nrf_802154_types.h
index 56fb9ae..202c346 100644
--- a/third_party/NordicSemiconductor/drivers/radio/nrf_802154_types.h
+++ b/third_party/NordicSemiconductor/drivers/radio/nrf_802154_types.h
@@ -139,6 +139,23 @@
#define NRF_802154_ACK_DATA_IE 0x01
/**
+ * @brief Methods of source address matching.
+ *
+ * You can use one of the following methods that can be set during the initialization phase
+ * by calling @ref nrf_802154_src_matching_method:
+ * - For Thread: @ref NRF_802154_SRC_ADDR_MATCH_THREAD -- The pending bit is set only for the addresses found in the list.
+ * - For Zigbee: @ref NRF_802154_SRC_ADDR_MATCH_ZIGBEE -- The pending bit is cleared only for the short addresses found in the list.\n
+ * This method does not set pending bit in non-command and non-data-request frames.
+ * - For standard-compliant implementation: @ref NRF_802154_SRC_ADDR_MATCH_ALWAYS_1 -- The pending bit is always set to 1.\n
+ * This requires an empty data frame with AR set to 0 to be transmitted immediately afterwards.
+ */
+typedef uint8_t nrf_802154_src_addr_match_t;
+
+#define NRF_802154_SRC_ADDR_MATCH_THREAD 0x00 // !< Implementation for the Thread protocol.
+#define NRF_802154_SRC_ADDR_MATCH_ZIGBEE 0x01 // !< Implementation for the Zigbee protocol.
+#define NRF_802154_SRC_ADDR_MATCH_ALWAYS_1 0x02 // !< Standard compliant implementation.
+
+/**
* @brief RSSI measurement results.
*/
diff --git a/third_party/NordicSemiconductor/drivers/radio/platform/clock/nrf_802154_clock_ot.c b/third_party/NordicSemiconductor/drivers/radio/platform/clock/nrf_802154_clock_ot.c
new file mode 100644
index 0000000..8207e7f
--- /dev/null
+++ b/third_party/NordicSemiconductor/drivers/radio/platform/clock/nrf_802154_clock_ot.c
@@ -0,0 +1,115 @@
+/* Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @file
+ * This file implements the nrf 802.15.4 HF Clock abstraction with SDK driver.
+ *
+ * This implementation uses clock driver implementation from SDK.
+ */
+
+#include "nrf_802154_clock.h"
+
+#include <stddef.h>
+
+#include <compiler_abstraction.h>
+#include <nrf_drv_clock.h>
+
+static void clock_handler(nrf_drv_clock_evt_type_t event);
+
+static nrf_drv_clock_handler_item_t m_clock_handler =
+{
+ .p_next = NULL,
+ .event_handler = clock_handler,
+};
+
+static void clock_handler(nrf_drv_clock_evt_type_t event)
+{
+ if (event == NRF_DRV_CLOCK_EVT_HFCLK_STARTED)
+ {
+ nrf_802154_clock_hfclk_ready();
+ }
+
+ if (event == NRF_DRV_CLOCK_EVT_LFCLK_STARTED)
+ {
+ nrf_802154_clock_lfclk_ready();
+ }
+}
+
+void nrf_802154_clock_init(void)
+{
+ // Intentionally empty.
+}
+
+void nrf_802154_clock_deinit(void)
+{
+ // Intentionally empty.
+}
+
+void nrf_802154_clock_hfclk_start(void)
+{
+ nrf_drv_clock_hfclk_request(&m_clock_handler);
+}
+
+void nrf_802154_clock_hfclk_stop(void)
+{
+ nrf_drv_clock_hfclk_release();
+}
+
+bool nrf_802154_clock_hfclk_is_running(void)
+{
+ return nrf_drv_clock_hfclk_is_running();
+}
+
+void nrf_802154_clock_lfclk_start(void)
+{
+ nrf_drv_clock_lfclk_request(&m_clock_handler);
+}
+
+void nrf_802154_clock_lfclk_stop(void)
+{
+ nrf_drv_clock_lfclk_release();
+}
+
+bool nrf_802154_clock_lfclk_is_running(void)
+{
+ return nrf_drv_clock_lfclk_is_running();
+}
+
+__WEAK void nrf_802154_clock_hfclk_ready(void)
+{
+ // Intentionally empty.
+}
+
+__WEAK void nrf_802154_clock_lfclk_ready(void)
+{
+ // Intentionally empty.
+}
+
diff --git a/third_party/NordicSemiconductor/drivers/radio/platform/clock/nrf_802154_clock_sdk.c b/third_party/NordicSemiconductor/drivers/radio/platform/clock/nrf_802154_clock_sdk.c
index ee357d1..de1173f 100644
--- a/third_party/NordicSemiconductor/drivers/radio/platform/clock/nrf_802154_clock_sdk.c
+++ b/third_party/NordicSemiconductor/drivers/radio/platform/clock/nrf_802154_clock_sdk.c
@@ -65,12 +65,12 @@
void nrf_802154_clock_init(void)
{
- // Intentionally empty.
+ nrf_drv_clock_init();
}
void nrf_802154_clock_deinit(void)
{
- // Intentionally empty.
+ nrf_drv_clock_uninit();
}
void nrf_802154_clock_hfclk_start(void)
diff --git a/third_party/NordicSemiconductor/drivers/radio/platform/coex/nrf_802154_wifi_coex.h b/third_party/NordicSemiconductor/drivers/radio/platform/coex/nrf_802154_wifi_coex.h
new file mode 100644
index 0000000..61b5f78
--- /dev/null
+++ b/third_party/NordicSemiconductor/drivers/radio/platform/coex/nrf_802154_wifi_coex.h
@@ -0,0 +1,108 @@
+/* Copyright (c) 2018, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @brief Module that defines the Wi-Fi coexistence module.
+ *
+ */
+
+#ifndef NRF_802154_WIFI_COEX_H_
+#define NRF_802154_WIFI_COEX_H_
+
+#include "rsch/nrf_802154_rsch.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup nrf_wifi_coex Wi-Fi Coexistence
+ * @{
+ * @ingroup nrf_802154
+ * @brief The Wi-Fi Coexistence module.
+ *
+ * The Wi-Fi Coexistence module is a client of the PTA (defined in the 802.15.2). It manages GPIO
+ * to assert pins and respond to pin state changes.
+ */
+
+/**
+ * @brief Initializes the Wi-Fi Coexistence module.
+ *
+ * @note This function must be called once, before any other function from this module.
+ *
+ */
+void nrf_802154_wifi_coex_init(void);
+
+/**
+ * @brief Deinitializes the Wi-Fi Coexistence module.
+ *
+ */
+void nrf_802154_wifi_coex_uninit(void);
+
+/**
+ * @brief Requests the given priority from the Wi-Fi Coexistence module.
+ *
+ * @note The approval of the requested priority is notified asynchronously by the
+ * @ref nrf_802154_wifi_coex_prio_changed call.
+ *
+ * @param[in] priority The requested priority level.
+ *
+ */
+void nrf_802154_wifi_coex_prio_request(rsch_prio_t priority);
+
+/**
+ * @brief Gets the priority denial event address.
+ *
+ * Get the address of a hardware event that notifies about the denial of a previously approved
+ * priority.
+ *
+ * @returns Address of the priority denial event.
+ */
+void * nrf_802154_wifi_coex_deny_event_addr_get(void);
+
+/**
+ * @brief Notifies about the approved priority change.
+ *
+ * The Wi-Fi Coexistence module calls this function to notify the RSCH of the currently approved
+ * priority level.
+ *
+ * @param[in] priority The approved priority level.
+ */
+extern void nrf_802154_wifi_coex_prio_changed(rsch_prio_t priority);
+
+/**
+ *@}
+ **/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* NRF_802154_WIFI_COEX_H_ */
diff --git a/third_party/NordicSemiconductor/drivers/radio/platform/coex/nrf_802154_wifi_coex_none.c b/third_party/NordicSemiconductor/drivers/radio/platform/coex/nrf_802154_wifi_coex_none.c
new file mode 100644
index 0000000..2158617
--- /dev/null
+++ b/third_party/NordicSemiconductor/drivers/radio/platform/coex/nrf_802154_wifi_coex_none.c
@@ -0,0 +1,69 @@
+/* Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @file
+ * This file implements the nrf 802.15.4 WiFi Coexitstence abstraction in case no implementation is used.
+ *
+ */
+
+#include "nrf_802154_wifi_coex.h"
+
+#include "stddef.h"
+
+#include <nrf.h>
+
+void nrf_802154_wifi_coex_init(void)
+{
+ // Intentionally empty
+}
+
+void nrf_802154_wifi_coex_uninit(void)
+{
+ // Intentionally empty
+}
+
+void nrf_802154_wifi_coex_prio_request(rsch_prio_t priority)
+{
+ (void)priority;
+ // Intentionally empty
+}
+
+void * nrf_802154_wifi_coex_deny_event_addr_get(void)
+{
+ // Intentionally empty
+ return NULL;
+}
+
+__WEAK void nrf_802154_wifi_coex_prio_changed(rsch_prio_t priority)
+{
+ (void)priority;
+ // Intentionally empty
+}
diff --git a/third_party/NordicSemiconductor/drivers/radio/platform/hp_timer/nrf_802154_hp_timer.c b/third_party/NordicSemiconductor/drivers/radio/platform/hp_timer/nrf_802154_hp_timer.c
index 5379b4f..eadce20 100644
--- a/third_party/NordicSemiconductor/drivers/radio/platform/hp_timer/nrf_802154_hp_timer.c
+++ b/third_party/NordicSemiconductor/drivers/radio/platform/hp_timer/nrf_802154_hp_timer.c
@@ -47,9 +47,10 @@
#include <nrf_timer.h>
#include "nrf_802154_config.h"
+#include "nrf_802154_peripherals.h"
/**@brief Timer instance. */
-#define TIMER NRF_TIMER0
+#define TIMER NRF_802154_HIGH_PRECISION_TIMER_INSTANCE
/**@brief Timer compare channel definitions. */
#define TIMER_CC_CAPTURE NRF_TIMER_CC_CHANNEL1
diff --git a/third_party/NordicSemiconductor/drivers/radio/platform/lp_timer/nrf_802154_lp_timer_nodrv.c b/third_party/NordicSemiconductor/drivers/radio/platform/lp_timer/nrf_802154_lp_timer_nodrv.c
index 5d66b68..552622e 100644
--- a/third_party/NordicSemiconductor/drivers/radio/platform/lp_timer/nrf_802154_lp_timer_nodrv.c
+++ b/third_party/NordicSemiconductor/drivers/radio/platform/lp_timer/nrf_802154_lp_timer_nodrv.c
@@ -45,6 +45,7 @@
#include "platform/clock/nrf_802154_clock.h"
#include "nrf_802154_config.h"
+#include "nrf_802154_peripherals.h"
#include "nrf_802154_utils.h"
#define RTC_LP_TIMER_COMPARE_CHANNEL 0
diff --git a/third_party/NordicSemiconductor/drivers/radio/platform/random/nrf_802154_random_newlib.c b/third_party/NordicSemiconductor/drivers/radio/platform/random/nrf_802154_random_newlib.c
new file mode 100644
index 0000000..f1b6b18
--- /dev/null
+++ b/third_party/NordicSemiconductor/drivers/radio/platform/random/nrf_802154_random_newlib.c
@@ -0,0 +1,82 @@
+/* Copyright (c) 2019, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @file
+ * This file implements the pseudo-random number generator abstraction layer.
+ *
+ * This pseudo-random number abstraction layer uses newlib's rand_r() function.
+ *
+ */
+
+#define _POSIX_C_SOURCE 1 // Enable access to POSIX functions (rand_r is not from the std library)
+
+#include "nrf_802154_random.h"
+
+#include <stdlib.h>
+#include <stdint.h>
+
+#include "nrf.h"
+
+#if RAAL_SOFTDEVICE
+#include <nrf_soc.h>
+#endif // RAAL_SOFTDEVICE
+
+unsigned int m_seed;
+
+void nrf_802154_random_init(void)
+{
+#if RAAL_SOFTDEVICE
+ uint32_t result;
+
+ do
+ {
+ result = sd_rand_application_vector_get((uint8_t *)&m_seed, sizeof(m_seed));
+ }
+ while (result != NRF_SUCCESS);
+#else // RAAL_SOFTDEVICE
+ NRF_RNG->TASKS_START = 1;
+
+ while (!NRF_RNG->EVENTS_VALRDY);
+ NRF_RNG->EVENTS_VALRDY = 0;
+
+ m_seed = NRF_RNG->VALUE;
+#endif // RAAL_SOFTDEVICE
+}
+
+void nrf_802154_random_deinit(void)
+{
+ // Intentionally empty
+}
+
+uint32_t nrf_802154_random_get(void)
+{
+ return (uint32_t)rand_r(&m_seed);
+}
diff --git a/third_party/NordicSemiconductor/drivers/radio/platform/random/nrf_802154_random_stdlib.c b/third_party/NordicSemiconductor/drivers/radio/platform/random/nrf_802154_random_stdlib.c
index ac5ad1e..d2644f7 100644
--- a/third_party/NordicSemiconductor/drivers/radio/platform/random/nrf_802154_random_stdlib.c
+++ b/third_party/NordicSemiconductor/drivers/radio/platform/random/nrf_802154_random_stdlib.c
@@ -44,7 +44,7 @@
#include "nrf.h"
#if RAAL_SOFTDEVICE
-#include <softdevice.h>
+#include <nrf_soc.h>
#endif // RAAL_SOFTDEVICE
void nrf_802154_random_init(void)
diff --git a/third_party/NordicSemiconductor/drivers/radio/rsch/nrf_802154_rsch.c b/third_party/NordicSemiconductor/drivers/radio/rsch/nrf_802154_rsch.c
index 083e233..507d8ff 100644
--- a/third_party/NordicSemiconductor/drivers/radio/rsch/nrf_802154_rsch.c
+++ b/third_party/NordicSemiconductor/drivers/radio/rsch/nrf_802154_rsch.c
@@ -7,6 +7,7 @@
#include "../nrf_802154_debug.h"
#include "nrf_802154_priority_drop.h"
#include "platform/clock/nrf_802154_clock.h"
+#include "platform/coex/nrf_802154_wifi_coex.h"
#include "raal/nrf_raal_api.h"
#include "timer_scheduler/nrf_802154_timer_sched.h"
@@ -227,6 +228,9 @@
nrf_802154_clock_hfclk_start();
nrf_raal_continuous_mode_enter();
}
+
+ nrf_802154_wifi_coex_prio_request(new_prio);
+ prec_approved_prio_set(RSCH_PREC_COEX, new_prio);
}
mutex_unlock(&m_req_mutex);
@@ -363,6 +367,7 @@
void nrf_802154_rsch_init(void)
{
nrf_raal_init();
+ nrf_802154_wifi_coex_init();
m_ntf_mutex = 0;
m_req_mutex = 0;
@@ -388,6 +393,7 @@
nrf_802154_timer_sched_remove(&m_dly_ts[i].timer, NULL);
}
+ nrf_802154_wifi_coex_uninit();
nrf_raal_uninit();
}
diff --git a/third_party/NordicSemiconductor/drivers/radio/rsch/nrf_802154_rsch.h b/third_party/NordicSemiconductor/drivers/radio/rsch/nrf_802154_rsch.h
index 05d5623..5d25857 100644
--- a/third_party/NordicSemiconductor/drivers/radio/rsch/nrf_802154_rsch.h
+++ b/third_party/NordicSemiconductor/drivers/radio/rsch/nrf_802154_rsch.h
@@ -64,6 +64,7 @@
{
RSCH_PREC_HFCLK,
RSCH_PREC_RAAL,
+ RSCH_PREC_COEX,
RSCH_PREC_CNT,
} rsch_prec_t;
@@ -117,7 +118,7 @@
* possible to give the radio driver core as much radio time as possible while
* disturbing the other activities to the minimum extent.
*
- * @note The start of a timeslot is indicated by the @ref nrf_802154_rsch_prec_approved call.
+ * @note The start of a timeslot is indicated by the @ref nrf_802154_rsch_prec_is_approved call.
* @note To disable the continuous radio mode, the @ref RSCH_PRIO_IDLE should be used.
*
* @param[in] prio Priority level used in the continuous radio mode.
@@ -137,7 +138,7 @@
/**
* @brief Immediately requests a timeslot for radio communication.
*
- * This function is to be called only after @ref nrf_802154_rsch_prec_approved indicated the
+ * This function is to be called only after @ref nrf_802154_rsch_prec_is_approved indicated the
* start of a timeslot.
*
* @param[in] length_us Requested radio timeslot length in microseconds.
diff --git a/third_party/NordicSemiconductor/drivers/radio/rsch/nrf_802154_wifi_coex.h b/third_party/NordicSemiconductor/drivers/radio/rsch/nrf_802154_wifi_coex.h
deleted file mode 100644
index 264c7a7..0000000
--- a/third_party/NordicSemiconductor/drivers/radio/rsch/nrf_802154_wifi_coex.h
+++ /dev/null
@@ -1,108 +0,0 @@
-/* Copyright (c) 2018, Nordic Semiconductor ASA
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-/**
- * @brief Module that defines the Wi-Fi coexistence module.
- *
- */
-
-#ifndef NRF_802154_WIFI_COEX_H_
-#define NRF_802154_WIFI_COEX_H_
-
-#include "nrf_802154_rsch.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @defgroup nrf_wifi_coex Wi-Fi Coexistence
- * @{
- * @ingroup nrf_802154
- * @brief The Wi-Fi Coexistence module.
- *
- * The Wi-Fi Coexistence module is a client of the PTA (defined in the 802.15.2). It manages GPIO
- * to assert pins and respond to pin state changes.
- */
-
-/**
- * @brief Initializes the Wi-Fi Coexistence module.
- *
- * @note This function must be called once, before any other function from this module.
- *
- */
-void nrf_802154_wifi_coex_init(void);
-
-/**
- * @brief Deinitializes the Wi-Fi Coexistence module.
- *
- */
-void nrf_802154_wifi_coex_uninit(void);
-
-/**
- * @brief Requests the given priority from the Wi-Fi Coexistence module.
- *
- * @note The approval of the requested priority is notified asynchronously by the
- * @ref nrf_802154_wifi_coex_prio_changed call.
- *
- * @param[in] priority The requested priority level.
- *
- */
-void nrf_802154_wifi_coex_prio_req(rsch_prio_t priority);
-
-/**
- * @brief Gets the priority denial event address.
- *
- * Get the address of a hardware event that notifies about the denial of a previously approved
- * priority.
- *
- * @returns Address of the priority denial event.
- */
-void * nrf_802154_wifi_coex_deny_event_addr_get(void);
-
-/**
- * @brief Notifies about the approved priority change.
- *
- * The Wi-Fi Coexistence module calls this function to notify the RSCH of the currently approved
- * priority level.
- *
- * @param[in] priority The approved priority level.
- */
-extern void nrf_802154_wifi_coex_prio_changed(rsch_prio_t priority);
-
-/**
- *@}
- **/
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* NRF_802154_WIFI_COEX_H_ */
diff --git a/third_party/NordicSemiconductor/drivers/radio/rsch/raal/softdevice/nrf_raal_softdevice.c b/third_party/NordicSemiconductor/drivers/radio/rsch/raal/softdevice/nrf_raal_softdevice.c
index 5f2c2ae..4b29897 100644
--- a/third_party/NordicSemiconductor/drivers/radio/rsch/raal/softdevice/nrf_raal_softdevice.c
+++ b/third_party/NordicSemiconductor/drivers/radio/rsch/raal/softdevice/nrf_raal_softdevice.c
@@ -71,16 +71,16 @@
**************************************************************************************************/
/*
- * @brief Defines the minimum version of the SoftDevice that supports configuration of BLE advertising
+ * @brief Defines the only version of the SoftDevice that supports configuration of BLE advertising
* role scheduling.
*
- * The first SoftDevice that supports this option is S140 6.1.1 (6001001). The full version
+ * The only SoftDevice that supports this option is S140 6.1.1 (6001001). The full version
* number for the SoftDevice binary is a decimal number in the form Mmmmbbb, where:
* - M is major version (one or more digits)
* - mmm is minor version (three digits)
* - bbb is bugfix version (three digits).
*/
-#define BLE_ADV_SCHED_CFG_SUPPORT_MIN_SD_VERSION (6001001)
+#define BLE_ADV_SCHED_CFG_SUPPORT_SD_VERSION (6001001)
/*
* @brief Defines the minimum version of the SoftDevice that correctly handles timeslot releasing.
@@ -713,9 +713,9 @@
assert(err_code == NRF_SUCCESS);
(void)err_code;
-#if (SD_VERSION >= BLE_ADV_SCHED_CFG_SUPPORT_MIN_SD_VERSION)
+#if (SD_VERSION == BLE_ADV_SCHED_CFG_SUPPORT_SD_VERSION)
// Ensure that correct SoftDevice version is flashed.
- if (SD_VERSION_GET(MBR_SIZE) >= BLE_ADV_SCHED_CFG_SUPPORT_MIN_SD_VERSION)
+ if (SD_VERSION_GET(MBR_SIZE) == BLE_ADV_SCHED_CFG_SUPPORT_SD_VERSION)
{
// Use improved Advertiser Role Scheduling configuration.
ble_opt_t opt;
diff --git a/third_party/NordicSemiconductor/drivers/radio/rsch/raal/softdevice/nrf_raal_softdevice.h b/third_party/NordicSemiconductor/drivers/radio/rsch/raal/softdevice/nrf_raal_softdevice.h
index c3b65e7..9f735c1 100644
--- a/third_party/NordicSemiconductor/drivers/radio/rsch/raal/softdevice/nrf_raal_softdevice.h
+++ b/third_party/NordicSemiconductor/drivers/radio/rsch/raal/softdevice/nrf_raal_softdevice.h
@@ -51,7 +51,7 @@
#define NRF_RAAL_TIMESLOT_DEFAULT_ALLOC_ITERS 5
#define NRF_RAAL_TIMESLOT_DEFAULT_SAFE_MARGIN nrf_raal_softdevice_safe_margin_calc( \
NRF_RAAL_DEFAULT_LF_CLK_ACCURACY_PPM)
-#define NRF_RAAL_TIMESLOT_DEFAULT_TIMEOUT 4500
+#define NRF_RAAL_TIMESLOT_DEFAULT_TIMEOUT 2500
#define NRF_RAAL_TIMESLOT_DEFAULT_MAX_LENGTH 120000000
#define NRF_RAAL_DEFAULT_LF_CLK_ACCURACY_PPM 500
diff --git a/third_party/NordicSemiconductor/drivers/systick/nrf_drv_systick.h b/third_party/NordicSemiconductor/drivers/systick/nrf_drv_systick.h
index 6dc8832..cb3f4f3 100644
--- a/third_party/NordicSemiconductor/drivers/systick/nrf_drv_systick.h
+++ b/third_party/NordicSemiconductor/drivers/systick/nrf_drv_systick.h
@@ -1,80 +1,80 @@
-/**
- * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#ifndef NRF_DRV_SYSTICK_H__
-#define NRF_DRV_SYSTICK_H__
-
-#include <nrfx_systick.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @defgroup nrf_drv_systick ARM(R) SysTick driver - legacy layer
- * @{
- * @ingroup nrf_systick
- *
- * @brief Layer providing compatibility with the former API.
- */
-
-/** @brief Type definition for forwarding the new implementation. */
-typedef nrfx_systick_state_t nrf_drv_systick_state_t;
-
-/** @brief Macro for forwarding the new implementation. */
-#define nrf_drv_systick_init nrfx_systick_init
-/** @brief Macro for forwarding the new implementation. */
-#define nrf_drv_systick_get nrfx_systick_get
-/** @brief Macro for forwarding the new implementation. */
-#define nrf_drv_systick_test nrfx_systick_test
-/** @brief Macro for forwarding the new implementation. */
-#define nrf_drv_systick_delay_ticks nrfx_systick_delay_ticks
-/** @brief Macro for forwarding the new implementation. */
-#define nrf_drv_systick_delay_us nrfx_systick_delay_us
-/** @brief Macro for forwarding the new implementation. */
-#define nrf_drv_systick_delay_ms nrfx_systick_delay_ms
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // NRF_DRV_SYSTICK_H__
+/**
+ * Copyright (c) 2016 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef NRF_DRV_SYSTICK_H__
+#define NRF_DRV_SYSTICK_H__
+
+#include <nrfx_systick.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup nrf_drv_systick ARM(R) SysTick driver - legacy layer
+ * @{
+ * @ingroup nrf_systick
+ *
+ * @brief Layer providing compatibility with the former API.
+ */
+
+/** @brief Type definition for forwarding the new implementation. */
+typedef nrfx_systick_state_t nrf_drv_systick_state_t;
+
+/** @brief Macro for forwarding the new implementation. */
+#define nrf_drv_systick_init nrfx_systick_init
+/** @brief Macro for forwarding the new implementation. */
+#define nrf_drv_systick_get nrfx_systick_get
+/** @brief Macro for forwarding the new implementation. */
+#define nrf_drv_systick_test nrfx_systick_test
+/** @brief Macro for forwarding the new implementation. */
+#define nrf_drv_systick_delay_ticks nrfx_systick_delay_ticks
+/** @brief Macro for forwarding the new implementation. */
+#define nrf_drv_systick_delay_us nrfx_systick_delay_us
+/** @brief Macro for forwarding the new implementation. */
+#define nrf_drv_systick_delay_ms nrfx_systick_delay_ms
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // NRF_DRV_SYSTICK_H__
diff --git a/third_party/NordicSemiconductor/drivers/usbd/nrf_drv_usbd.h b/third_party/NordicSemiconductor/drivers/usbd/nrf_drv_usbd.h
index 427cc1d..db30fce 100644
--- a/third_party/NordicSemiconductor/drivers/usbd/nrf_drv_usbd.h
+++ b/third_party/NordicSemiconductor/drivers/usbd/nrf_drv_usbd.h
@@ -1,4 +1,42 @@
-/*$$$LICENCE_NORDIC_STANDARD<2016>$$$*/
+/**
+ * Copyright (c) 2016 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
#ifndef NRF_DRV_USBD_H__
#define NRF_DRV_USBD_H__
diff --git a/third_party/NordicSemiconductor/libraries/app_error/app_error.c b/third_party/NordicSemiconductor/libraries/app_error/app_error.c
index e155820..97b2eed 100644
--- a/third_party/NordicSemiconductor/libraries/app_error/app_error.c
+++ b/third_party/NordicSemiconductor/libraries/app_error/app_error.c
@@ -1,125 +1,139 @@
-/**
- * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-/** @file
- *
- * @defgroup app_error Common application error handler
- * @{
- * @ingroup app_common
- *
- * @brief Common application error handler.
- */
-
-#include "nrf.h"
-#include <stdio.h>
-#include "app_error.h"
-#include "nordic_common.h"
-#include "sdk_errors.h"
-
-/**@brief Function for error handling, which is called when an error has occurred.
- *
- * @warning This handler is an example only and does not fit a final product. You need to analyze
- * how your product is supposed to react in case of error.
- *
- * @param[in] error_code Error code supplied to the handler.
- * @param[in] line_num Line number where the handler is called.
- * @param[in] p_file_name Pointer to the file name.
- */
-void app_error_handler_bare(ret_code_t error_code)
-{
- error_info_t error_info =
- {
- .line_num = 0,
- .p_file_name = NULL,
- .err_code = error_code,
- };
-
- app_error_fault_handler(NRF_FAULT_ID_SDK_ERROR, 0, (uint32_t)(&error_info));
-
- UNUSED_VARIABLE(error_info);
-}
-
-void app_error_save_and_stop(uint32_t id, uint32_t pc, uint32_t info)
-{
- /* static error variables - in order to prevent removal by optimizers */
- static volatile struct
- {
- uint32_t fault_id;
- uint32_t pc;
- uint32_t error_info;
- assert_info_t * p_assert_info;
- error_info_t * p_error_info;
- ret_code_t err_code;
- uint32_t line_num;
- const uint8_t * p_file_name;
- } m_error_data = {0};
-
- // The following variable helps Keil keep the call stack visible, in addition, it can be set to
- // 0 in the debugger to continue executing code after the error check.
- volatile bool loop = true;
- UNUSED_VARIABLE(loop);
-
- m_error_data.fault_id = id;
- m_error_data.pc = pc;
- m_error_data.error_info = info;
-
- switch (id)
- {
- case NRF_FAULT_ID_SDK_ASSERT:
- m_error_data.p_assert_info = (assert_info_t *)info;
- m_error_data.line_num = m_error_data.p_assert_info->line_num;
- m_error_data.p_file_name = m_error_data.p_assert_info->p_file_name;
- break;
-
- case NRF_FAULT_ID_SDK_ERROR:
- m_error_data.p_error_info = (error_info_t *)info;
- m_error_data.err_code = m_error_data.p_error_info->err_code;
- m_error_data.line_num = m_error_data.p_error_info->line_num;
- m_error_data.p_file_name = m_error_data.p_error_info->p_file_name;
- break;
- }
-
- UNUSED_VARIABLE(m_error_data);
-
- // If printing is disrupted, remove the irq calls, or set the loop variable to 0 in the debugger.
- __disable_irq();
- while (loop);
-
- __enable_irq();
-}
+/**
+ * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/** @file
+ *
+ * @defgroup app_error Common application error handler
+ * @{
+ * @ingroup app_common
+ *
+ * @brief Common application error handler.
+ */
+
+#include "nrf.h"
+#include <stdio.h>
+#include "app_error.h"
+#include "nordic_common.h"
+#include "sdk_errors.h"
+
+/**@brief Function for error handling, which is called when an error has occurred.
+ *
+ * @warning This handler is an example only and does not fit a final product. You need to analyze
+ * how your product is supposed to react in case of error.
+ *
+ * @param[in] error_code Error code supplied to the handler.
+ * @param[in] line_num Line number where the handler is called.
+ * @param[in] p_file_name Pointer to the file name.
+ */
+void app_error_handler_bare(ret_code_t error_code)
+{
+ error_info_t error_info =
+ {
+ .line_num = 0,
+ .p_file_name = NULL,
+ .err_code = error_code,
+ };
+
+ app_error_fault_handler(NRF_FAULT_ID_SDK_ERROR, 0, (uint32_t)(&error_info));
+
+ UNUSED_VARIABLE(error_info);
+}
+
+/**@brief Function for error handling, which is called when an error has occurred.
+ *
+ * @param[in] error_code Error code supplied to the handler.
+ * @param[in] line_num Line number where the handler is called.
+ * @param[in] p_file_name Pointer to the file name.
+ */
+void app_error_handler(uint32_t error_code, uint32_t line_num, const uint8_t * p_file_name)
+{
+ UNUSED_VARIABLE(line_num);
+ UNUSED_VARIABLE(p_file_name);
+
+ app_error_handler_bare(error_code);
+}
+
+void app_error_save_and_stop(uint32_t id, uint32_t pc, uint32_t info)
+{
+ /* static error variables - in order to prevent removal by optimizers */
+ static volatile struct
+ {
+ uint32_t fault_id;
+ uint32_t pc;
+ uint32_t error_info;
+ assert_info_t * p_assert_info;
+ error_info_t * p_error_info;
+ ret_code_t err_code;
+ uint32_t line_num;
+ const uint8_t * p_file_name;
+ } m_error_data = {0};
+
+ // The following variable helps Keil keep the call stack visible, in addition, it can be set to
+ // 0 in the debugger to continue executing code after the error check.
+ volatile bool loop = true;
+ UNUSED_VARIABLE(loop);
+
+ m_error_data.fault_id = id;
+ m_error_data.pc = pc;
+ m_error_data.error_info = info;
+
+ switch (id)
+ {
+ case NRF_FAULT_ID_SDK_ASSERT:
+ m_error_data.p_assert_info = (assert_info_t *)info;
+ m_error_data.line_num = m_error_data.p_assert_info->line_num;
+ m_error_data.p_file_name = m_error_data.p_assert_info->p_file_name;
+ break;
+
+ case NRF_FAULT_ID_SDK_ERROR:
+ m_error_data.p_error_info = (error_info_t *)info;
+ m_error_data.err_code = m_error_data.p_error_info->err_code;
+ m_error_data.line_num = m_error_data.p_error_info->line_num;
+ m_error_data.p_file_name = m_error_data.p_error_info->p_file_name;
+ break;
+ }
+
+ UNUSED_VARIABLE(m_error_data);
+
+ // If printing is disrupted, remove the irq calls, or set the loop variable to 0 in the debugger.
+ __disable_irq();
+ while (loop);
+
+ __enable_irq();
+}
diff --git a/third_party/NordicSemiconductor/libraries/app_error/app_error.h b/third_party/NordicSemiconductor/libraries/app_error/app_error.h
index b1498d2..ff8b2a8 100644
--- a/third_party/NordicSemiconductor/libraries/app_error/app_error.h
+++ b/third_party/NordicSemiconductor/libraries/app_error/app_error.h
@@ -1,192 +1,192 @@
-/**
- * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-/** @file
- *
- * @defgroup app_error Common application error handler
- * @{
- * @ingroup app_common
- *
- * @brief Common application error handler and macros for utilizing a common error handler.
- */
-
-#ifndef APP_ERROR_H__
-#define APP_ERROR_H__
-
-
-#include <stdint.h>
-#include <stdio.h>
-#include <stdbool.h>
-#include "nrf.h"
-#include "sdk_errors.h"
-#include "nordic_common.h"
-#include "app_error_weak.h"
-#ifdef ANT_STACK_SUPPORT_REQD
-#include "ant_error.h"
-#endif // ANT_STACK_SUPPORT_REQD
-
-
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#define NRF_FAULT_ID_SDK_RANGE_START (0x00004000) /**< The start of the range of error IDs defined in the SDK. */
-
-/**@defgroup APP_ERROR_FAULT_IDS Fault ID types
- * @{ */
-#define NRF_FAULT_ID_SDK_ERROR (NRF_FAULT_ID_SDK_RANGE_START + 1) /**< An error stemming from a call to @ref APP_ERROR_CHECK or @ref APP_ERROR_CHECK_BOOL. The info parameter is a pointer to an @ref error_info_t variable. */
-#define NRF_FAULT_ID_SDK_ASSERT (NRF_FAULT_ID_SDK_RANGE_START + 2) /**< An error stemming from a call to ASSERT (nrf_assert.h). The info parameter is a pointer to an @ref assert_info_t variable. */
-/**@} */
-
-/**@brief Structure containing info about an error of the type @ref NRF_FAULT_ID_SDK_ERROR.
- */
-typedef struct
-{
- uint32_t line_num; /**< The line number where the error occurred. */
- uint8_t const * p_file_name; /**< The file in which the error occurred. */
- uint32_t err_code; /**< The error code representing the error that occurred. */
-} error_info_t;
-
-/**@brief Structure containing info about an error of the type @ref NRF_FAULT_ID_SDK_ASSERT.
- */
-typedef struct
-{
- uint16_t line_num; /**< The line number where the error occurred. */
- uint8_t const * p_file_name; /**< The file in which the error occurred. */
-} assert_info_t;
-
-/**@brief Defines required by app_error_handler assembler intructions.
- */
-#define APP_ERROR_ERROR_INFO_OFFSET_LINE_NUM (offsetof(error_info_t, line_num))
-#define APP_ERROR_ERROR_INFO_OFFSET_P_FILE_NAME (offsetof(error_info_t, p_file_name))
-#define APP_ERROR_ERROR_INFO_OFFSET_ERR_CODE (offsetof(error_info_t, err_code))
-#define APP_ERROR_ERROR_INFO_SIZE (sizeof(error_info_t))
-#define APP_ERROR_ERROR_INFO_SIZE_ALIGNED_8BYTE \
- ALIGN_NUM(APP_ERROR_ERROR_INFO_SIZE, sizeof(uint64_t))
-
-
-/**@brief Function for error handling, which is called when an error has occurred.
- *
- * @param[in] error_code Error code supplied to the handler.
- * @param[in] line_num Line number where the handler is called.
- * @param[in] p_file_name Pointer to the file name.
- */
-void app_error_handler(uint32_t error_code, uint32_t line_num, const uint8_t * p_file_name);
-
-/**@brief Function for error handling, which is called when an error has occurred.
- *
- * @param[in] error_code Error code supplied to the handler.
- */
-void app_error_handler_bare(ret_code_t error_code);
-
-/**@brief Function for saving the parameters and entering an eternal loop, for debug purposes.
- *
- * @param[in] id Fault identifier. See @ref NRF_FAULT_IDS.
- * @param[in] pc The program counter of the instruction that triggered the fault, or 0 if
- * unavailable.
- * @param[in] info Optional additional information regarding the fault. Refer to each fault
- * identifier for details.
- */
-void app_error_save_and_stop(uint32_t id, uint32_t pc, uint32_t info);
-
-/**@brief Function for logging details of error and flushing logs.
- *
- * @param[in] id Fault identifier. See @ref NRF_FAULT_IDS.
- * @param[in] pc The program counter of the instruction that triggered the fault, or 0 if
- * unavailable.
- * @param[in] info Optional additional information regarding the fault. Refer to each fault
- * identifier for details.
- */
-void app_error_log_handle(uint32_t id, uint32_t pc, uint32_t info);
-
-
-/**@brief Macro for calling error handler function.
- *
- * @param[in] ERR_CODE Error code supplied to the error handler.
- */
-#ifdef DEBUG
-#define APP_ERROR_HANDLER(ERR_CODE) \
- do \
- { \
- app_error_handler((ERR_CODE), __LINE__, (uint8_t*) __FILE__); \
- } while (0)
-#else
-#define APP_ERROR_HANDLER(ERR_CODE) \
- do \
- { \
- app_error_handler_bare((ERR_CODE)); \
- } while (0)
-#endif
-/**@brief Macro for calling error handler function if supplied error code any other than NRF_SUCCESS.
- *
- * @param[in] ERR_CODE Error code supplied to the error handler.
- */
-#define APP_ERROR_CHECK(ERR_CODE) \
- do \
- { \
- const uint32_t LOCAL_ERR_CODE = (ERR_CODE); \
- if (LOCAL_ERR_CODE != NRF_SUCCESS) \
- { \
- APP_ERROR_HANDLER(LOCAL_ERR_CODE); \
- } \
- } while (0)
-
-/**@brief Macro for calling error handler function if supplied boolean value is false.
- *
- * @param[in] BOOLEAN_VALUE Boolean value to be evaluated.
- */
-#define APP_ERROR_CHECK_BOOL(BOOLEAN_VALUE) \
- do \
- { \
- const uint32_t LOCAL_BOOLEAN_VALUE = (BOOLEAN_VALUE); \
- if (!LOCAL_BOOLEAN_VALUE) \
- { \
- APP_ERROR_HANDLER(0); \
- } \
- } while (0)
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // APP_ERROR_H__
-
-/** @} */
+/**
+ * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/** @file
+ *
+ * @defgroup app_error Common application error handler
+ * @{
+ * @ingroup app_common
+ *
+ * @brief Common application error handler and macros for utilizing a common error handler.
+ */
+
+#ifndef APP_ERROR_H__
+#define APP_ERROR_H__
+
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdbool.h>
+#include "nrf.h"
+#include "sdk_errors.h"
+#include "nordic_common.h"
+#include "app_error_weak.h"
+#ifdef ANT_STACK_SUPPORT_REQD
+#include "ant_error.h"
+#endif // ANT_STACK_SUPPORT_REQD
+
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define NRF_FAULT_ID_SDK_RANGE_START (0x00004000) /**< The start of the range of error IDs defined in the SDK. */
+
+/**@defgroup APP_ERROR_FAULT_IDS Fault ID types
+ * @{ */
+#define NRF_FAULT_ID_SDK_ERROR (NRF_FAULT_ID_SDK_RANGE_START + 1) /**< An error stemming from a call to @ref APP_ERROR_CHECK or @ref APP_ERROR_CHECK_BOOL. The info parameter is a pointer to an @ref error_info_t variable. */
+#define NRF_FAULT_ID_SDK_ASSERT (NRF_FAULT_ID_SDK_RANGE_START + 2) /**< An error stemming from a call to ASSERT (nrf_assert.h). The info parameter is a pointer to an @ref assert_info_t variable. */
+/**@} */
+
+/**@brief Structure containing info about an error of the type @ref NRF_FAULT_ID_SDK_ERROR.
+ */
+typedef struct
+{
+ uint32_t line_num; /**< The line number where the error occurred. */
+ uint8_t const * p_file_name; /**< The file in which the error occurred. */
+ uint32_t err_code; /**< The error code representing the error that occurred. */
+} error_info_t;
+
+/**@brief Structure containing info about an error of the type @ref NRF_FAULT_ID_SDK_ASSERT.
+ */
+typedef struct
+{
+ uint16_t line_num; /**< The line number where the error occurred. */
+ uint8_t const * p_file_name; /**< The file in which the error occurred. */
+} assert_info_t;
+
+/**@brief Defines required by app_error_handler assembler intructions.
+ */
+#define APP_ERROR_ERROR_INFO_OFFSET_LINE_NUM (offsetof(error_info_t, line_num))
+#define APP_ERROR_ERROR_INFO_OFFSET_P_FILE_NAME (offsetof(error_info_t, p_file_name))
+#define APP_ERROR_ERROR_INFO_OFFSET_ERR_CODE (offsetof(error_info_t, err_code))
+#define APP_ERROR_ERROR_INFO_SIZE (sizeof(error_info_t))
+#define APP_ERROR_ERROR_INFO_SIZE_ALIGNED_8BYTE \
+ ALIGN_NUM(APP_ERROR_ERROR_INFO_SIZE, sizeof(uint64_t))
+
+
+/**@brief Function for error handling, which is called when an error has occurred.
+ *
+ * @param[in] error_code Error code supplied to the handler.
+ * @param[in] line_num Line number where the handler is called.
+ * @param[in] p_file_name Pointer to the file name.
+ */
+void app_error_handler(uint32_t error_code, uint32_t line_num, const uint8_t * p_file_name);
+
+/**@brief Function for error handling, which is called when an error has occurred.
+ *
+ * @param[in] error_code Error code supplied to the handler.
+ */
+void app_error_handler_bare(ret_code_t error_code);
+
+/**@brief Function for saving the parameters and entering an eternal loop, for debug purposes.
+ *
+ * @param[in] id Fault identifier. See @ref NRF_FAULT_IDS.
+ * @param[in] pc The program counter of the instruction that triggered the fault, or 0 if
+ * unavailable.
+ * @param[in] info Optional additional information regarding the fault. Refer to each fault
+ * identifier for details.
+ */
+void app_error_save_and_stop(uint32_t id, uint32_t pc, uint32_t info);
+
+/**@brief Function for logging details of error and flushing logs.
+ *
+ * @param[in] id Fault identifier. See @ref NRF_FAULT_IDS.
+ * @param[in] pc The program counter of the instruction that triggered the fault, or 0 if
+ * unavailable.
+ * @param[in] info Optional additional information regarding the fault. Refer to each fault
+ * identifier for details.
+ */
+void app_error_log_handle(uint32_t id, uint32_t pc, uint32_t info);
+
+
+/**@brief Macro for calling error handler function.
+ *
+ * @param[in] ERR_CODE Error code supplied to the error handler.
+ */
+#ifdef DEBUG
+#define APP_ERROR_HANDLER(ERR_CODE) \
+ do \
+ { \
+ app_error_handler((ERR_CODE), __LINE__, (uint8_t*) __FILE__); \
+ } while (0)
+#else
+#define APP_ERROR_HANDLER(ERR_CODE) \
+ do \
+ { \
+ app_error_handler_bare((ERR_CODE)); \
+ } while (0)
+#endif
+/**@brief Macro for calling error handler function if supplied error code any other than NRF_SUCCESS.
+ *
+ * @param[in] ERR_CODE Error code supplied to the error handler.
+ */
+#define APP_ERROR_CHECK(ERR_CODE) \
+ do \
+ { \
+ const uint32_t LOCAL_ERR_CODE = (ERR_CODE); \
+ if (LOCAL_ERR_CODE != NRF_SUCCESS) \
+ { \
+ APP_ERROR_HANDLER(LOCAL_ERR_CODE); \
+ } \
+ } while (0)
+
+/**@brief Macro for calling error handler function if supplied boolean value is false.
+ *
+ * @param[in] BOOLEAN_VALUE Boolean value to be evaluated.
+ */
+#define APP_ERROR_CHECK_BOOL(BOOLEAN_VALUE) \
+ do \
+ { \
+ const uint32_t LOCAL_BOOLEAN_VALUE = (BOOLEAN_VALUE); \
+ if (!LOCAL_BOOLEAN_VALUE) \
+ { \
+ APP_ERROR_HANDLER(0); \
+ } \
+ } while (0)
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // APP_ERROR_H__
+
+/** @} */
diff --git a/third_party/NordicSemiconductor/libraries/app_error/app_error_weak.c b/third_party/NordicSemiconductor/libraries/app_error/app_error_weak.c
index 9a5f3e6..f101410 100644
--- a/third_party/NordicSemiconductor/libraries/app_error/app_error_weak.c
+++ b/third_party/NordicSemiconductor/libraries/app_error/app_error_weak.c
@@ -1,60 +1,60 @@
-/**
- * Copyright (c) 2016 - 2019, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#include "app_error.h"
-
-/*lint -save -e14 */
-/**
- * Function is implemented as weak so that it can be overwritten by custom application error handler
- * when needed.
- */
-__WEAK void app_error_fault_handler(uint32_t id, uint32_t pc, uint32_t info)
-{
- (void)id;
- (void)pc;
- (void)info;
-
-#ifndef DEBUG
- NVIC_SystemReset();
-#else
- app_error_save_and_stop(id, pc, info);
-#endif // DEBUG
-}
-/*lint -restore */
+/**
+ * Copyright (c) 2016 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include "app_error.h"
+
+/*lint -save -e14 */
+/**
+ * Function is implemented as weak so that it can be overwritten by custom application error handler
+ * when needed.
+ */
+__WEAK void app_error_fault_handler(uint32_t id, uint32_t pc, uint32_t info)
+{
+ (void)id;
+ (void)pc;
+ (void)info;
+
+#ifndef DEBUG
+ NVIC_SystemReset();
+#else
+ app_error_save_and_stop(id, pc, info);
+#endif // DEBUG
+}
+/*lint -restore */
diff --git a/third_party/NordicSemiconductor/libraries/app_error/app_error_weak.h b/third_party/NordicSemiconductor/libraries/app_error/app_error_weak.h
index e64fc21..4476ae1 100644
--- a/third_party/NordicSemiconductor/libraries/app_error/app_error_weak.h
+++ b/third_party/NordicSemiconductor/libraries/app_error/app_error_weak.h
@@ -1,87 +1,87 @@
-/**
- * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-#ifndef APP_ERROR_WEAK_H__
-#define APP_ERROR_WEAK_H__
-
-#include <stdint.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/** @file
- *
- * @defgroup app_error Common application error handler
- * @{
- * @ingroup app_common
- *
- * @brief Common application error handler.
- */
-
-/**@brief Callback function for errors, asserts, and faults.
- *
- * @details This function is called every time an error is raised in app_error, nrf_assert, or
- * in the SoftDevice. Information about the error can be found in the @p info
- * parameter.
- *
- * See also @ref nrf_fault_handler_t for more details.
- *
- * @note The function is implemented as weak so that it can be redefined by a custom error
- * handler when needed.
- *
- * @param[in] id Fault identifier. See @ref NRF_FAULT_IDS.
- * @param[in] pc The program counter of the instruction that triggered the fault, or 0 if
- * unavailable.
- * @param[in] info Optional additional information regarding the fault. The value of the @p id
- * parameter dictates how to interpret this parameter. Refer to the documentation
- * for each fault identifier (@ref NRF_FAULT_IDS and @ref APP_ERROR_FAULT_IDS) for
- * details about interpreting @p info.
- */
-void app_error_fault_handler(uint32_t id, uint32_t pc, uint32_t info);
-
-
-/** @} */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // APP_ERROR_WEAK_H__
+/**
+ * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#ifndef APP_ERROR_WEAK_H__
+#define APP_ERROR_WEAK_H__
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @file
+ *
+ * @defgroup app_error Common application error handler
+ * @{
+ * @ingroup app_common
+ *
+ * @brief Common application error handler.
+ */
+
+/**@brief Callback function for errors, asserts, and faults.
+ *
+ * @details This function is called every time an error is raised in app_error, nrf_assert, or
+ * in the SoftDevice. Information about the error can be found in the @p info
+ * parameter.
+ *
+ * See also @ref nrf_fault_handler_t for more details.
+ *
+ * @note The function is implemented as weak so that it can be redefined by a custom error
+ * handler when needed.
+ *
+ * @param[in] id Fault identifier. See @ref NRF_FAULT_IDS.
+ * @param[in] pc The program counter of the instruction that triggered the fault, or 0 if
+ * unavailable.
+ * @param[in] info Optional additional information regarding the fault. The value of the @p id
+ * parameter dictates how to interpret this parameter. Refer to the documentation
+ * for each fault identifier (@ref NRF_FAULT_IDS and @ref APP_ERROR_FAULT_IDS) for
+ * details about interpreting @p info.
+ */
+void app_error_fault_handler(uint32_t id, uint32_t pc, uint32_t info);
+
+
+/** @} */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // APP_ERROR_WEAK_H__
diff --git a/third_party/NordicSemiconductor/libraries/atfifo/nrf_atfifo.c b/third_party/NordicSemiconductor/libraries/atfifo/nrf_atfifo.c
index 3227cee..836e3b9 100644
--- a/third_party/NordicSemiconductor/libraries/atfifo/nrf_atfifo.c
+++ b/third_party/NordicSemiconductor/libraries/atfifo/nrf_atfifo.c
@@ -1,189 +1,189 @@
-/**
- * Copyright (c) 2011 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#include <string.h>
-#include <stdint.h>
-#include <stdbool.h>
-#include "app_util.h"
-#include "nrf_atfifo.h"
-#include "nrf_atfifo_internal.h"
-
-#if NRF_ATFIFO_CONFIG_LOG_ENABLED
- #define NRF_LOG_LEVEL NRF_ATFIFO_CONFIG_LOG_LEVEL
- #define NRF_LOG_INIT_FILTER_LEVEL NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL
- #define NRF_LOG_INFO_COLOR NRF_ATFIFO_CONFIG_INFO_COLOR
- #define NRF_LOG_DEBUG_COLOR NRF_ATFIFO_CONFIG_DEBUG_COLOR
-#else
- #define NRF_LOG_LEVEL 0
-#endif // NRF_ATFIFO_CONFIG_LOG_ENABLED
-#include "nrf_log.h"
-
-/* Unions testing */
-STATIC_ASSERT(sizeof(nrf_atfifo_postag_t) == sizeof(uint32_t));
-
-
-ret_code_t nrf_atfifo_init(nrf_atfifo_t * const p_fifo, void * p_buf, uint16_t buf_size, uint16_t item_size)
-{
- if (NULL == p_buf)
- {
- NRF_LOG_INST_ERROR(p_fifo->p_log, "Initialization failed. p_buf == NULL");
- return NRF_ERROR_NULL;
- }
- if (0 != (buf_size % item_size))
- {
- NRF_LOG_INST_ERROR(p_fifo->p_log, "Initialization failed. Buf_size not multiple of item_size");
- return NRF_ERROR_INVALID_LENGTH;
- }
-
- p_fifo->p_buf = p_buf;
- p_fifo->tail.tag = 0;
- p_fifo->head.tag = 0;
- p_fifo->buf_size = buf_size;
- p_fifo->item_size = item_size;
-
- NRF_LOG_INST_INFO(p_fifo->p_log, "Initialized.");
- return NRF_SUCCESS;
-}
-
-
-ret_code_t nrf_atfifo_clear(nrf_atfifo_t * const p_fifo)
-{
- bool released = nrf_atfifo_space_clear(p_fifo);
- NRF_LOG_INST_INFO(p_fifo->p_log, "Cleared result:%s", released ? "success" : "busy");
- return released ? NRF_SUCCESS : NRF_ERROR_BUSY;
-}
-
-
-ret_code_t nrf_atfifo_alloc_put(nrf_atfifo_t * const p_fifo, void const * p_var, size_t size, bool * const p_visible)
-{
- nrf_atfifo_item_put_t context;
- bool visible;
- void * p_data = nrf_atfifo_item_alloc(p_fifo, &context);
- if (NULL == p_data)
- {
- NRF_LOG_INST_WARNING(p_fifo->p_log, "Copying in element (0x%08X) failed - no space.", p_var);
- return NRF_ERROR_NO_MEM;
- }
-
- memcpy(p_data, p_var, size);
-
- visible = nrf_atfifo_item_put(p_fifo, &context);
- if (NULL != p_visible)
- {
- *p_visible = visible;
- }
- NRF_LOG_INST_DEBUG(p_fifo->p_log, "Element (0x%08X) copied in.", p_var);
- return NRF_SUCCESS;
-}
-
-
-void * nrf_atfifo_item_alloc(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_put_t * p_context)
-{
- if (nrf_atfifo_wspace_req(p_fifo, &(p_context->last_tail)))
- {
- void * p_item = ((uint8_t*)(p_fifo->p_buf)) + p_context->last_tail.pos.wr;
- NRF_LOG_INST_DEBUG(p_fifo->p_log, "Allocated element (0x%08X).", p_item);
- return p_item;
- }
- NRF_LOG_INST_WARNING(p_fifo->p_log, "Allocation failed - no space.");
- return NULL;
-}
-
-
-bool nrf_atfifo_item_put(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_put_t * p_context)
-{
- if ((p_context->last_tail.pos.wr) == (p_context->last_tail.pos.rd))
- {
- NRF_LOG_INST_DEBUG(p_fifo->p_log, "Put (uninterrupted)");
- nrf_atfifo_wspace_close(p_fifo);
- return true;
- }
- NRF_LOG_INST_DEBUG(p_fifo->p_log, "Put (interrupted!)");
- return false;
-}
-
-
-ret_code_t nrf_atfifo_get_free(nrf_atfifo_t * const p_fifo, void * const p_var, size_t size, bool * p_released)
-{
- nrf_atfifo_item_get_t context;
- bool released;
- void const * p_s = nrf_atfifo_item_get(p_fifo, &context);
- if (NULL == p_s)
- {
- NRF_LOG_INST_WARNING(p_fifo->p_log, "Copying out failed - no item in the FIFO.");
- return NRF_ERROR_NOT_FOUND;
- }
-
- memcpy(p_var, p_s, size);
-
- released = nrf_atfifo_item_free(p_fifo, &context);
- if (NULL != p_released)
- {
- *p_released = released;
- }
- NRF_LOG_INST_DEBUG(p_fifo->p_log, "Element (0x%08X) copied out.", p_var);
- return NRF_SUCCESS;
-}
-
-
-void * nrf_atfifo_item_get(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_get_t * p_context)
-{
- if (nrf_atfifo_rspace_req(p_fifo, &(p_context->last_head)))
- {
- void * p_item = ((uint8_t*)(p_fifo->p_buf)) + p_context->last_head.pos.rd;
- NRF_LOG_INST_DEBUG(p_fifo->p_log, "Get element: 0x%08X", p_item);
- return p_item;
- }
- NRF_LOG_INST_WARNING(p_fifo->p_log, "Get failed - no item in the FIFO.");
- return NULL;
-}
-
-
-bool nrf_atfifo_item_free(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_get_t * p_context)
-{
- if ((p_context->last_head.pos.wr) == (p_context->last_head.pos.rd))
- {
- NRF_LOG_INST_DEBUG(p_fifo->p_log, "Free (uninterrupted)");
- nrf_atfifo_rspace_close(p_fifo);
- return true;
- }
- NRF_LOG_INST_DEBUG(p_fifo->p_log, "Free (interrupted)");
- return false;
-}
+/**
+ * Copyright (c) 2011 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <string.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include "app_util.h"
+#include "nrf_atfifo.h"
+#include "nrf_atfifo_internal.h"
+
+#if NRF_ATFIFO_CONFIG_LOG_ENABLED
+ #define NRF_LOG_LEVEL NRF_ATFIFO_CONFIG_LOG_LEVEL
+ #define NRF_LOG_INIT_FILTER_LEVEL NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL
+ #define NRF_LOG_INFO_COLOR NRF_ATFIFO_CONFIG_INFO_COLOR
+ #define NRF_LOG_DEBUG_COLOR NRF_ATFIFO_CONFIG_DEBUG_COLOR
+#else
+ #define NRF_LOG_LEVEL 0
+#endif // NRF_ATFIFO_CONFIG_LOG_ENABLED
+#include "nrf_log.h"
+
+/* Unions testing */
+STATIC_ASSERT(sizeof(nrf_atfifo_postag_t) == sizeof(uint32_t));
+
+
+ret_code_t nrf_atfifo_init(nrf_atfifo_t * const p_fifo, void * p_buf, uint16_t buf_size, uint16_t item_size)
+{
+ if (NULL == p_buf)
+ {
+ NRF_LOG_INST_ERROR(p_fifo->p_log, "Initialization failed. p_buf == NULL");
+ return NRF_ERROR_NULL;
+ }
+ if (0 != (buf_size % item_size))
+ {
+ NRF_LOG_INST_ERROR(p_fifo->p_log, "Initialization failed. Buf_size not multiple of item_size");
+ return NRF_ERROR_INVALID_LENGTH;
+ }
+
+ p_fifo->p_buf = p_buf;
+ p_fifo->tail.tag = 0;
+ p_fifo->head.tag = 0;
+ p_fifo->buf_size = buf_size;
+ p_fifo->item_size = item_size;
+
+ NRF_LOG_INST_INFO(p_fifo->p_log, "Initialized.");
+ return NRF_SUCCESS;
+}
+
+
+ret_code_t nrf_atfifo_clear(nrf_atfifo_t * const p_fifo)
+{
+ bool released = nrf_atfifo_space_clear(p_fifo);
+ NRF_LOG_INST_INFO(p_fifo->p_log, "Cleared result:%s", released ? "success" : "busy");
+ return released ? NRF_SUCCESS : NRF_ERROR_BUSY;
+}
+
+
+ret_code_t nrf_atfifo_alloc_put(nrf_atfifo_t * const p_fifo, void const * p_var, size_t size, bool * const p_visible)
+{
+ nrf_atfifo_item_put_t context;
+ bool visible;
+ void * p_data = nrf_atfifo_item_alloc(p_fifo, &context);
+ if (NULL == p_data)
+ {
+ NRF_LOG_INST_WARNING(p_fifo->p_log, "Copying in element (0x%08X) failed - no space.", p_var);
+ return NRF_ERROR_NO_MEM;
+ }
+
+ memcpy(p_data, p_var, size);
+
+ visible = nrf_atfifo_item_put(p_fifo, &context);
+ if (NULL != p_visible)
+ {
+ *p_visible = visible;
+ }
+ NRF_LOG_INST_DEBUG(p_fifo->p_log, "Element (0x%08X) copied in.", p_var);
+ return NRF_SUCCESS;
+}
+
+
+void * nrf_atfifo_item_alloc(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_put_t * p_context)
+{
+ if (nrf_atfifo_wspace_req(p_fifo, &(p_context->last_tail)))
+ {
+ void * p_item = ((uint8_t*)(p_fifo->p_buf)) + p_context->last_tail.pos.wr;
+ NRF_LOG_INST_DEBUG(p_fifo->p_log, "Allocated element (0x%08X).", p_item);
+ return p_item;
+ }
+ NRF_LOG_INST_WARNING(p_fifo->p_log, "Allocation failed - no space.");
+ return NULL;
+}
+
+
+bool nrf_atfifo_item_put(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_put_t * p_context)
+{
+ if ((p_context->last_tail.pos.wr) == (p_context->last_tail.pos.rd))
+ {
+ NRF_LOG_INST_DEBUG(p_fifo->p_log, "Put (uninterrupted)");
+ nrf_atfifo_wspace_close(p_fifo);
+ return true;
+ }
+ NRF_LOG_INST_DEBUG(p_fifo->p_log, "Put (interrupted!)");
+ return false;
+}
+
+
+ret_code_t nrf_atfifo_get_free(nrf_atfifo_t * const p_fifo, void * const p_var, size_t size, bool * p_released)
+{
+ nrf_atfifo_item_get_t context;
+ bool released;
+ void const * p_s = nrf_atfifo_item_get(p_fifo, &context);
+ if (NULL == p_s)
+ {
+ NRF_LOG_INST_WARNING(p_fifo->p_log, "Copying out failed - no item in the FIFO.");
+ return NRF_ERROR_NOT_FOUND;
+ }
+
+ memcpy(p_var, p_s, size);
+
+ released = nrf_atfifo_item_free(p_fifo, &context);
+ if (NULL != p_released)
+ {
+ *p_released = released;
+ }
+ NRF_LOG_INST_DEBUG(p_fifo->p_log, "Element (0x%08X) copied out.", p_var);
+ return NRF_SUCCESS;
+}
+
+
+void * nrf_atfifo_item_get(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_get_t * p_context)
+{
+ if (nrf_atfifo_rspace_req(p_fifo, &(p_context->last_head)))
+ {
+ void * p_item = ((uint8_t*)(p_fifo->p_buf)) + p_context->last_head.pos.rd;
+ NRF_LOG_INST_DEBUG(p_fifo->p_log, "Get element: 0x%08X", p_item);
+ return p_item;
+ }
+ NRF_LOG_INST_WARNING(p_fifo->p_log, "Get failed - no item in the FIFO.");
+ return NULL;
+}
+
+
+bool nrf_atfifo_item_free(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_get_t * p_context)
+{
+ if ((p_context->last_head.pos.wr) == (p_context->last_head.pos.rd))
+ {
+ NRF_LOG_INST_DEBUG(p_fifo->p_log, "Free (uninterrupted)");
+ nrf_atfifo_rspace_close(p_fifo);
+ return true;
+ }
+ NRF_LOG_INST_DEBUG(p_fifo->p_log, "Free (interrupted)");
+ return false;
+}
diff --git a/third_party/NordicSemiconductor/libraries/atfifo/nrf_atfifo.h b/third_party/NordicSemiconductor/libraries/atfifo/nrf_atfifo.h
index 376d0d8..e8c2ad0 100644
--- a/third_party/NordicSemiconductor/libraries/atfifo/nrf_atfifo.h
+++ b/third_party/NordicSemiconductor/libraries/atfifo/nrf_atfifo.h
@@ -1,424 +1,424 @@
-/**
- * Copyright (c) 2011 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-#ifndef NRF_ATFIFO_H__
-#define NRF_ATFIFO_H__
-
-#include <stdint.h>
-#include <stdbool.h>
-#include "sdk_config.h"
-#include "nordic_common.h"
-#include "nrf_assert.h"
-#include "sdk_errors.h"
-#include "nrf_log_instance.h"
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @defgroup nrf_atfifo Atomic FIFO
- * @ingroup app_common
- *
- * @brief @tagAPI52 FIFO implementation that allows for making atomic transactions without
- * locking interrupts.
- *
- * @details There are two types of functions to prepare the FIFO writing:
- * - Single function for simple access:
- * @code
- * if (NRF_SUCCESS != nrf_atfifo_simple_put(my_fifo, &data, NULL))
- * {
- * // Error handling
- * }
- * @endcode
- * - Function pair to limit data copying:
- * @code
- * struct point3d
- * {
- * int x, y, z;
- * }point3d_t;
- * nrf_atfifo_context_t context;
- * point3d_t * point;
- *
- * if (NULL != (point = nrf_atfifo_item_alloc(my_fifo, &context)))
- * {
- * point->x = a;
- * point->y = b;
- * point->z = c;
- * if (nrf_atfifo_item_put(my_fifo, &context))
- * {
- * // Send information to the rest of the system
- * // that there is new data in the FIFO available for reading.
- * }
- * }
- * else
- * {
- * // Error handling
- * }
- *
- * @endcode
- * @note
- * This atomic FIFO implementation requires that the operation that is
- * opened last is finished (committed/flushed) first.
- * This is typical for operations performed from the interrupt runtime
- * when the other operation is performed from the main thread.
- *
- * This implementation does not support typical multithreading operating system
- * access where operations can be started and finished in totally unrelated order.
- *
- * @{
- */
-
-/**
- * @brief Read and write position structure.
- *
- * A structure that holds the read and write position used by the FIFO head and tail.
- */
-typedef struct nrf_atfifo_postag_pos_s
-{
- uint16_t wr; //!< First free space to write the data
- uint16_t rd; //!< A place after the last data to read
-}nrf_atfifo_postag_pos_t;
-
-/**
- * @brief End data index tag.
- *
- * A tag used to mark the end of data.
- * To properly realize atomic data committing, the whole variable has to be
- * accessed atomically.
- */
-typedef union nrf_atfifo_postag_u
-{
- uint32_t tag; //!< Whole tag, used for atomic, 32-bit access
- nrf_atfifo_postag_pos_t pos; //!< Structure that holds reading and writing position separately
-}nrf_atfifo_postag_t;
-
-/**
- * @brief The FIFO instance.
- *
- * The instance of atomic FIFO.
- * Used with all FIFO functions.
- */
-typedef struct nrf_atfifo_s
-{
- void * p_buf; //!< Pointer to the data buffer
- nrf_atfifo_postag_t tail; //!< Read and write tail position tag
- nrf_atfifo_postag_t head; //!< Read and write head position tag
- uint16_t buf_size; //!< FIFO size in number of bytes (has to be divisible by @c item_size)
- uint16_t item_size; //!< Size of a single FIFO item
- NRF_LOG_INSTANCE_PTR_DECLARE(p_log) //!< Pointer to instance of the logger object (Conditionally compiled).
-}nrf_atfifo_t;
-
-/**
- * @brief FIFO write operation item context.
- *
- * Context structure used to mark an allocated space in FIFO that is ready for put.
- * All the data required to properly put allocated and written data.
- */
-typedef struct nrf_atfifo_item_put_s
-{
- nrf_atfifo_postag_t last_tail; //!< Tail tag value that was here when opening the FIFO to write
-}nrf_atfifo_item_put_t;
-
-
-/**
- * @brief FIFO read operation item context.
- *
- * Context structure used to mark an opened get operation to properly free an item after reading.
- */
-typedef struct nrf_atfifo_rcontext_s
-{
- nrf_atfifo_postag_t last_head; //!< Head tag value that was here when opening the FIFO to read
-}nrf_atfifo_item_get_t;
-
-
-/** @brief Name of the module used for logger messaging.
- */
-#define NRF_ATFIFO_LOG_NAME atfifo
-
-/**
- * @defgroup nrf_atfifo_instmacros FIFO instance macros
- *
- * A group of macros helpful for FIFO instance creation and initialization.
- * They may be used to create and initialize instances for most use cases.
- *
- * FIFO may also be created and initialized directly using
- * @ref nrf_atfifo_init function.
- * @{
- */
- /**
- * @brief Macro for generating the name for a data buffer.
- *
- * The name of the data buffer that would be created by
- * @ref NRF_ATFIFO_DEF macro.
- *
- * @param[in] fifo_id Identifier of the FIFO object.
- *
- * @return Name of the buffer variable.
- *
- * @note This is auxiliary internal macro and in normal usage
- * it should not be called.
- */
- #define NRF_ATFIFO_BUF_NAME(fifo_id) CONCAT_2(fifo_id, _data)
-
- /**
- * @brief Macro for generating the name for a FIFO instance.
- *
- * The name of the instance variable that will be created by the
- * @ref NRF_ATFIFO_DEF macro.
- *
- * @param[in] fifo_id Identifier of the FIFO object.
- *
- * @return Name of the instance variable.
- *
- * @note This is auxiliary internal macro and in normal usage
- * it should not be called.
- */
- #define NRF_ATFIFO_INST_NAME(fifo_id) CONCAT_2(fifo_id, _inst)
-
- /**
- * @brief Macro for creating an instance.
- *
- * Creates the FIFO object variable itself.
- *
- * Usage example:
- * @code
- * NRF_ATFIFO_DEF(my_fifo, uint16_t, 12);
- * NRF_ATFIFO_INIT(my_fifo);
- *
- * uint16_t some_val = 45;
- * nrf_atfifo_item_put(my_fifo, &some_val, sizeof(some_val), NULL);
- * nrf_atfifo_item_get(my_fifo, &some_val, sizeof(some_val), NULL);
- * @endcode
- *
- * @param[in] fifo_id Identifier of a FIFO object.
- * This identifier will be a pointer to the instance.
- * It makes it possible to use this directly for the functions
- * that operate on the FIFO.
- * Because it is a static const object, it should be optimized by the compiler.
- * @param[in] storage_type Type of data that will be stored in the FIFO.
- * @param[in] item_cnt Capacity of the created FIFO in maximum number of items that may be stored.
- * The phisical size of the buffer will be 1 element bigger.
- */
- #define NRF_ATFIFO_DEF(fifo_id, storage_type, item_cnt) \
- static storage_type NRF_ATFIFO_BUF_NAME(fifo_id)[(item_cnt)+1]; \
- NRF_LOG_INSTANCE_REGISTER(NRF_ATFIFO_LOG_NAME, fifo_id, \
- NRF_ATFIFO_CONFIG_INFO_COLOR, \
- NRF_ATFIFO_CONFIG_DEBUG_COLOR, \
- NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL, \
- NRF_ATFIFO_CONFIG_LOG_ENABLED ? \
- NRF_ATFIFO_CONFIG_LOG_LEVEL : NRF_LOG_SEVERITY_NONE); \
- static nrf_atfifo_t NRF_ATFIFO_INST_NAME(fifo_id) = { \
- .p_buf = NULL, \
- NRF_LOG_INSTANCE_PTR_INIT(p_log, NRF_ATFIFO_LOG_NAME, fifo_id) \
- }; \
- static nrf_atfifo_t * const fifo_id = &NRF_ATFIFO_INST_NAME(fifo_id)
-
- /**
- * @brief Macro for initializing the FIFO that was previously declared by the macro.
- *
- * Use this macro to simplify FIFO initialization.
- *
- * @note
- * This macro can be only used on a FIFO object defined by @ref NRF_ATFIFO_DEF macro.
- *
- * @param[in] fifo_id Identifier of the FIFO object.
- *
- * @return Value from the @ref nrf_atfifo_init function.
- */
- #define NRF_ATFIFO_INIT(fifo_id) \
- nrf_atfifo_init( \
- fifo_id, \
- NRF_ATFIFO_BUF_NAME(fifo_id), \
- sizeof(NRF_ATFIFO_BUF_NAME(fifo_id)), \
- sizeof(NRF_ATFIFO_BUF_NAME(fifo_id)[0]) \
- )
-
-/** @} */
-
-/**
- * @brief Function for initializing the FIFO.
- *
- * Preparing the FIFO instance to work.
- *
- * @param[out] p_fifo FIFO object to initialize.
- * @param[in,out] p_buf FIFO buffer for storing data.
- * @param[in] buf_size Total buffer size (has to be divisible by @c item_size).
- * @param[in] item_size Size of a single item held inside the FIFO.
- *
- * @retval NRF_SUCCESS If initialization was successful.
- * @retval NRF_ERROR_NULL If a NULL pointer is provided as the buffer.
- * @retval NRF_ERROR_INVALID_LENGTH If size of the buffer provided is not divisible by @c item_size.
- *
- * @note
- * Buffer size must be able to hold one element more than the designed FIFO capacity.
- * This one, empty element is used for overflow checking.
- */
-ret_code_t nrf_atfifo_init(nrf_atfifo_t * const p_fifo, void * p_buf, uint16_t buf_size, uint16_t item_size);
-
-/**
- * @brief Function for clearing the FIFO.
- *
- * Function for clearing the FIFO.
- *
- * If this function is called during an opened and uncommitted write operation,
- * the FIFO is cleared up to the currently ongoing commit.
- * There is no possibility to cancel an ongoing commit.
- *
- * If this function is called during an opened and unflushed read operation,
- * the read position in the head is set, but copying it into the write head position
- * is left to read closing operation.
- *
- * This way, there is no more data to read, but the memory is released
- * in the moment when it is safe.
- *
- * @param[in,out] p_fifo FIFO object.
- *
- * @retval NRF_SUCCESS FIFO totally cleared.
- * @retval NRF_ERROR_BUSY Function called in the middle of writing or reading operation.
- * If it is called in the middle of writing operation,
- * FIFO was cleared up to the already started and uncommitted write.
- * If it is called in the middle of reading operation,
- * write head was only moved. It will be copied into read tail when the reading operation
- * is flushed.
- */
-ret_code_t nrf_atfifo_clear(nrf_atfifo_t * const p_fifo);
-
-/**
- * @brief Function for atomically putting data into the FIFO.
- *
- * It uses memcpy function inside and in most situations, it is more suitable to
- * use @ref nrf_atfifo_item_alloc, write the data, and @ref nrf_atfifo_item_put to store a new value
- * in a FIFO.
- *
- * @param[in,out] p_fifo FIFO object.
- * @param[in] p_var Variable to copy.
- * @param[in] size Size of the variable to copy.
- * Can be smaller or equal to the FIFO item size.
- * @param[out] p_visible See value returned by @ref nrf_atfifo_item_put.
- * It may be NULL if the caller does not require the current operation status.
- *
- * @retval NRF_SUCCESS If an element has been successfully added to the FIFO.
- * @retval NRF_ERROR_NO_MEM If the FIFO is full.
- *
- * @note
- * To avoid data copying, you can use the @ref nrf_atfifo_item_alloc and @ref nrf_atfifo_item_put
- * functions pair.
- */
-ret_code_t nrf_atfifo_alloc_put(nrf_atfifo_t * const p_fifo, void const * const p_var, size_t size, bool * const p_visible);
-
-/**
- * @brief Function for opening the FIFO for writing.
- *
- * Function called to start the FIFO write operation and access the given FIFO buffer directly.
- *
- * @param[in,out] p_fifo FIFO object.
- * @param[out] p_context Operation context, required by @ref nrf_atfifo_item_put.
- *
- * @return Pointer to the space where variable data can be stored.
- * NULL if there is no space in the buffer.
- */
-void * nrf_atfifo_item_alloc(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_put_t * p_context);
-
-/**
- * @brief Function for closing the writing operation.
- *
- * Puts a previously allocated context into FIFO.
- * This function must be called to commit an opened write operation.
- * It sets all the buffers and marks the data, so that it is visible to read.
- *
- * @param[in,out] p_fifo FIFO object.
- * @param[in] p_context Operation context, filled by the @ref nrf_atfifo_item_alloc function.
- *
- * @retval true Data is currently ready and will be visible to read.
- * @retval false The internal commit was marked, but the writing operation interrupted another writing operation.
- * The data will be available to read when the interrupted operation is committed.
- */
-bool nrf_atfifo_item_put(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_put_t * p_context);
-
-/**
- * @brief Function for getting a single value from the FIFO.
- *
- * This function gets the value from the top of the FIFO.
- * The value is removed from the FIFO memory.
- *
- * @param[in,out] p_fifo FIFO object.
- * @param[out] p_var Pointer to the variable to store the data.
- * @param[in] size Size of the data to be loaded.
- * @param[out] p_released See the values returned by @ref nrf_atfifo_item_free.
- *
- * @retval NRF_SUCCESS Element was successfully copied from the FIFO memory.
- * @retval NRF_ERROR_NOT_FOUND No data in the FIFO.
- */
-ret_code_t nrf_atfifo_get_free(nrf_atfifo_t * const p_fifo, void * const p_var, size_t size, bool * p_released);
-
-/**
- * @brief Function for opening the FIFO for reading.
- *
- * Function called to start the FIFO read operation and access the given FIFO buffer directly.
- *
- * @param[in,out] p_fifo FIFO object.
- * @param[out] p_context The operation context, required by @ref nrf_atfifo_item_free
- *
- * @return Pointer to data buffer or NULL if there is no data in the FIFO.
- */
-void * nrf_atfifo_item_get(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_get_t * p_context);
-
-/**
- * @brief Function for closing the reading operation.
- *
- * Function used to finish the reading operation.
- * If this reading operation does not interrupt another reading operation, the head write buffer is moved.
- * If this reading operation is placed in the middle of another reading, only the new read pointer is written.
- *
- * @param[in,out] p_fifo FIFO object.
- * @param[in] p_context Context of the reading operation to be closed.
- *
- * @retval true This operation is not generated in the middle of another read operation and the write head will be updated to the read head (space is released).
- * @retval false This operation was performed in the middle of another read operation and the write buffer head was not moved (no space is released).
- */
-bool nrf_atfifo_item_free(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_get_t * p_context);
-
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* NRF_ATFIFO_H__ */
+/**
+ * Copyright (c) 2011 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#ifndef NRF_ATFIFO_H__
+#define NRF_ATFIFO_H__
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "sdk_config.h"
+#include "nordic_common.h"
+#include "nrf_assert.h"
+#include "sdk_errors.h"
+#include "nrf_log_instance.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup nrf_atfifo Atomic FIFO
+ * @ingroup app_common
+ *
+ * @brief @tagAPI52 FIFO implementation that allows for making atomic transactions without
+ * locking interrupts.
+ *
+ * @details There are two types of functions to prepare the FIFO writing:
+ * - Single function for simple access:
+ * @code
+ * if (NRF_SUCCESS != nrf_atfifo_simple_put(my_fifo, &data, NULL))
+ * {
+ * // Error handling
+ * }
+ * @endcode
+ * - Function pair to limit data copying:
+ * @code
+ * struct point3d
+ * {
+ * int x, y, z;
+ * }point3d_t;
+ * nrf_atfifo_context_t context;
+ * point3d_t * point;
+ *
+ * if (NULL != (point = nrf_atfifo_item_alloc(my_fifo, &context)))
+ * {
+ * point->x = a;
+ * point->y = b;
+ * point->z = c;
+ * if (nrf_atfifo_item_put(my_fifo, &context))
+ * {
+ * // Send information to the rest of the system
+ * // that there is new data in the FIFO available for reading.
+ * }
+ * }
+ * else
+ * {
+ * // Error handling
+ * }
+ *
+ * @endcode
+ * @note
+ * This atomic FIFO implementation requires that the operation that is
+ * opened last is finished (committed/flushed) first.
+ * This is typical for operations performed from the interrupt runtime
+ * when the other operation is performed from the main thread.
+ *
+ * This implementation does not support typical multithreading operating system
+ * access where operations can be started and finished in totally unrelated order.
+ *
+ * @{
+ */
+
+/**
+ * @brief Read and write position structure.
+ *
+ * A structure that holds the read and write position used by the FIFO head and tail.
+ */
+typedef struct nrf_atfifo_postag_pos_s
+{
+ uint16_t wr; //!< First free space to write the data
+ uint16_t rd; //!< A place after the last data to read
+}nrf_atfifo_postag_pos_t;
+
+/**
+ * @brief End data index tag.
+ *
+ * A tag used to mark the end of data.
+ * To properly realize atomic data committing, the whole variable has to be
+ * accessed atomically.
+ */
+typedef union nrf_atfifo_postag_u
+{
+ uint32_t tag; //!< Whole tag, used for atomic, 32-bit access
+ nrf_atfifo_postag_pos_t pos; //!< Structure that holds reading and writing position separately
+}nrf_atfifo_postag_t;
+
+/**
+ * @brief The FIFO instance.
+ *
+ * The instance of atomic FIFO.
+ * Used with all FIFO functions.
+ */
+typedef struct nrf_atfifo_s
+{
+ void * p_buf; //!< Pointer to the data buffer
+ nrf_atfifo_postag_t tail; //!< Read and write tail position tag
+ nrf_atfifo_postag_t head; //!< Read and write head position tag
+ uint16_t buf_size; //!< FIFO size in number of bytes (has to be divisible by @c item_size)
+ uint16_t item_size; //!< Size of a single FIFO item
+ NRF_LOG_INSTANCE_PTR_DECLARE(p_log) //!< Pointer to instance of the logger object (Conditionally compiled).
+}nrf_atfifo_t;
+
+/**
+ * @brief FIFO write operation item context.
+ *
+ * Context structure used to mark an allocated space in FIFO that is ready for put.
+ * All the data required to properly put allocated and written data.
+ */
+typedef struct nrf_atfifo_item_put_s
+{
+ nrf_atfifo_postag_t last_tail; //!< Tail tag value that was here when opening the FIFO to write
+}nrf_atfifo_item_put_t;
+
+
+/**
+ * @brief FIFO read operation item context.
+ *
+ * Context structure used to mark an opened get operation to properly free an item after reading.
+ */
+typedef struct nrf_atfifo_rcontext_s
+{
+ nrf_atfifo_postag_t last_head; //!< Head tag value that was here when opening the FIFO to read
+}nrf_atfifo_item_get_t;
+
+
+/** @brief Name of the module used for logger messaging.
+ */
+#define NRF_ATFIFO_LOG_NAME atfifo
+
+/**
+ * @defgroup nrf_atfifo_instmacros FIFO instance macros
+ *
+ * A group of macros helpful for FIFO instance creation and initialization.
+ * They may be used to create and initialize instances for most use cases.
+ *
+ * FIFO may also be created and initialized directly using
+ * @ref nrf_atfifo_init function.
+ * @{
+ */
+ /**
+ * @brief Macro for generating the name for a data buffer.
+ *
+ * The name of the data buffer that would be created by
+ * @ref NRF_ATFIFO_DEF macro.
+ *
+ * @param[in] fifo_id Identifier of the FIFO object.
+ *
+ * @return Name of the buffer variable.
+ *
+ * @note This is auxiliary internal macro and in normal usage
+ * it should not be called.
+ */
+ #define NRF_ATFIFO_BUF_NAME(fifo_id) CONCAT_2(fifo_id, _data)
+
+ /**
+ * @brief Macro for generating the name for a FIFO instance.
+ *
+ * The name of the instance variable that will be created by the
+ * @ref NRF_ATFIFO_DEF macro.
+ *
+ * @param[in] fifo_id Identifier of the FIFO object.
+ *
+ * @return Name of the instance variable.
+ *
+ * @note This is auxiliary internal macro and in normal usage
+ * it should not be called.
+ */
+ #define NRF_ATFIFO_INST_NAME(fifo_id) CONCAT_2(fifo_id, _inst)
+
+ /**
+ * @brief Macro for creating an instance.
+ *
+ * Creates the FIFO object variable itself.
+ *
+ * Usage example:
+ * @code
+ * NRF_ATFIFO_DEF(my_fifo, uint16_t, 12);
+ * NRF_ATFIFO_INIT(my_fifo);
+ *
+ * uint16_t some_val = 45;
+ * nrf_atfifo_item_put(my_fifo, &some_val, sizeof(some_val), NULL);
+ * nrf_atfifo_item_get(my_fifo, &some_val, sizeof(some_val), NULL);
+ * @endcode
+ *
+ * @param[in] fifo_id Identifier of a FIFO object.
+ * This identifier will be a pointer to the instance.
+ * It makes it possible to use this directly for the functions
+ * that operate on the FIFO.
+ * Because it is a static const object, it should be optimized by the compiler.
+ * @param[in] storage_type Type of data that will be stored in the FIFO.
+ * @param[in] item_cnt Capacity of the created FIFO in maximum number of items that may be stored.
+ * The phisical size of the buffer will be 1 element bigger.
+ */
+ #define NRF_ATFIFO_DEF(fifo_id, storage_type, item_cnt) \
+ static storage_type NRF_ATFIFO_BUF_NAME(fifo_id)[(item_cnt)+1]; \
+ NRF_LOG_INSTANCE_REGISTER(NRF_ATFIFO_LOG_NAME, fifo_id, \
+ NRF_ATFIFO_CONFIG_INFO_COLOR, \
+ NRF_ATFIFO_CONFIG_DEBUG_COLOR, \
+ NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL, \
+ NRF_ATFIFO_CONFIG_LOG_ENABLED ? \
+ NRF_ATFIFO_CONFIG_LOG_LEVEL : NRF_LOG_SEVERITY_NONE); \
+ static nrf_atfifo_t NRF_ATFIFO_INST_NAME(fifo_id) = { \
+ .p_buf = NULL, \
+ NRF_LOG_INSTANCE_PTR_INIT(p_log, NRF_ATFIFO_LOG_NAME, fifo_id) \
+ }; \
+ static nrf_atfifo_t * const fifo_id = &NRF_ATFIFO_INST_NAME(fifo_id)
+
+ /**
+ * @brief Macro for initializing the FIFO that was previously declared by the macro.
+ *
+ * Use this macro to simplify FIFO initialization.
+ *
+ * @note
+ * This macro can be only used on a FIFO object defined by @ref NRF_ATFIFO_DEF macro.
+ *
+ * @param[in] fifo_id Identifier of the FIFO object.
+ *
+ * @return Value from the @ref nrf_atfifo_init function.
+ */
+ #define NRF_ATFIFO_INIT(fifo_id) \
+ nrf_atfifo_init( \
+ fifo_id, \
+ NRF_ATFIFO_BUF_NAME(fifo_id), \
+ sizeof(NRF_ATFIFO_BUF_NAME(fifo_id)), \
+ sizeof(NRF_ATFIFO_BUF_NAME(fifo_id)[0]) \
+ )
+
+/** @} */
+
+/**
+ * @brief Function for initializing the FIFO.
+ *
+ * Preparing the FIFO instance to work.
+ *
+ * @param[out] p_fifo FIFO object to initialize.
+ * @param[in,out] p_buf FIFO buffer for storing data.
+ * @param[in] buf_size Total buffer size (has to be divisible by @c item_size).
+ * @param[in] item_size Size of a single item held inside the FIFO.
+ *
+ * @retval NRF_SUCCESS If initialization was successful.
+ * @retval NRF_ERROR_NULL If a NULL pointer is provided as the buffer.
+ * @retval NRF_ERROR_INVALID_LENGTH If size of the buffer provided is not divisible by @c item_size.
+ *
+ * @note
+ * Buffer size must be able to hold one element more than the designed FIFO capacity.
+ * This one, empty element is used for overflow checking.
+ */
+ret_code_t nrf_atfifo_init(nrf_atfifo_t * const p_fifo, void * p_buf, uint16_t buf_size, uint16_t item_size);
+
+/**
+ * @brief Function for clearing the FIFO.
+ *
+ * Function for clearing the FIFO.
+ *
+ * If this function is called during an opened and uncommitted write operation,
+ * the FIFO is cleared up to the currently ongoing commit.
+ * There is no possibility to cancel an ongoing commit.
+ *
+ * If this function is called during an opened and unflushed read operation,
+ * the read position in the head is set, but copying it into the write head position
+ * is left to read closing operation.
+ *
+ * This way, there is no more data to read, but the memory is released
+ * in the moment when it is safe.
+ *
+ * @param[in,out] p_fifo FIFO object.
+ *
+ * @retval NRF_SUCCESS FIFO totally cleared.
+ * @retval NRF_ERROR_BUSY Function called in the middle of writing or reading operation.
+ * If it is called in the middle of writing operation,
+ * FIFO was cleared up to the already started and uncommitted write.
+ * If it is called in the middle of reading operation,
+ * write head was only moved. It will be copied into read tail when the reading operation
+ * is flushed.
+ */
+ret_code_t nrf_atfifo_clear(nrf_atfifo_t * const p_fifo);
+
+/**
+ * @brief Function for atomically putting data into the FIFO.
+ *
+ * It uses memcpy function inside and in most situations, it is more suitable to
+ * use @ref nrf_atfifo_item_alloc, write the data, and @ref nrf_atfifo_item_put to store a new value
+ * in a FIFO.
+ *
+ * @param[in,out] p_fifo FIFO object.
+ * @param[in] p_var Variable to copy.
+ * @param[in] size Size of the variable to copy.
+ * Can be smaller or equal to the FIFO item size.
+ * @param[out] p_visible See value returned by @ref nrf_atfifo_item_put.
+ * It may be NULL if the caller does not require the current operation status.
+ *
+ * @retval NRF_SUCCESS If an element has been successfully added to the FIFO.
+ * @retval NRF_ERROR_NO_MEM If the FIFO is full.
+ *
+ * @note
+ * To avoid data copying, you can use the @ref nrf_atfifo_item_alloc and @ref nrf_atfifo_item_put
+ * functions pair.
+ */
+ret_code_t nrf_atfifo_alloc_put(nrf_atfifo_t * const p_fifo, void const * const p_var, size_t size, bool * const p_visible);
+
+/**
+ * @brief Function for opening the FIFO for writing.
+ *
+ * Function called to start the FIFO write operation and access the given FIFO buffer directly.
+ *
+ * @param[in,out] p_fifo FIFO object.
+ * @param[out] p_context Operation context, required by @ref nrf_atfifo_item_put.
+ *
+ * @return Pointer to the space where variable data can be stored.
+ * NULL if there is no space in the buffer.
+ */
+void * nrf_atfifo_item_alloc(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_put_t * p_context);
+
+/**
+ * @brief Function for closing the writing operation.
+ *
+ * Puts a previously allocated context into FIFO.
+ * This function must be called to commit an opened write operation.
+ * It sets all the buffers and marks the data, so that it is visible to read.
+ *
+ * @param[in,out] p_fifo FIFO object.
+ * @param[in] p_context Operation context, filled by the @ref nrf_atfifo_item_alloc function.
+ *
+ * @retval true Data is currently ready and will be visible to read.
+ * @retval false The internal commit was marked, but the writing operation interrupted another writing operation.
+ * The data will be available to read when the interrupted operation is committed.
+ */
+bool nrf_atfifo_item_put(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_put_t * p_context);
+
+/**
+ * @brief Function for getting a single value from the FIFO.
+ *
+ * This function gets the value from the top of the FIFO.
+ * The value is removed from the FIFO memory.
+ *
+ * @param[in,out] p_fifo FIFO object.
+ * @param[out] p_var Pointer to the variable to store the data.
+ * @param[in] size Size of the data to be loaded.
+ * @param[out] p_released See the values returned by @ref nrf_atfifo_item_free.
+ *
+ * @retval NRF_SUCCESS Element was successfully copied from the FIFO memory.
+ * @retval NRF_ERROR_NOT_FOUND No data in the FIFO.
+ */
+ret_code_t nrf_atfifo_get_free(nrf_atfifo_t * const p_fifo, void * const p_var, size_t size, bool * p_released);
+
+/**
+ * @brief Function for opening the FIFO for reading.
+ *
+ * Function called to start the FIFO read operation and access the given FIFO buffer directly.
+ *
+ * @param[in,out] p_fifo FIFO object.
+ * @param[out] p_context The operation context, required by @ref nrf_atfifo_item_free
+ *
+ * @return Pointer to data buffer or NULL if there is no data in the FIFO.
+ */
+void * nrf_atfifo_item_get(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_get_t * p_context);
+
+/**
+ * @brief Function for closing the reading operation.
+ *
+ * Function used to finish the reading operation.
+ * If this reading operation does not interrupt another reading operation, the head write buffer is moved.
+ * If this reading operation is placed in the middle of another reading, only the new read pointer is written.
+ *
+ * @param[in,out] p_fifo FIFO object.
+ * @param[in] p_context Context of the reading operation to be closed.
+ *
+ * @retval true This operation is not generated in the middle of another read operation and the write head will be updated to the read head (space is released).
+ * @retval false This operation was performed in the middle of another read operation and the write buffer head was not moved (no space is released).
+ */
+bool nrf_atfifo_item_free(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_get_t * p_context);
+
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* NRF_ATFIFO_H__ */
diff --git a/third_party/NordicSemiconductor/libraries/atfifo/nrf_atfifo_internal.h b/third_party/NordicSemiconductor/libraries/atfifo/nrf_atfifo_internal.h
index d2edabf..8e87eb5 100644
--- a/third_party/NordicSemiconductor/libraries/atfifo/nrf_atfifo_internal.h
+++ b/third_party/NordicSemiconductor/libraries/atfifo/nrf_atfifo_internal.h
@@ -1,577 +1,577 @@
-/**
- * Copyright (c) 2011 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-/**
- * @file
- * @brief Atomic FIFO internal file
- *
- * This file should be included only by nrf_atfifo internally.
- * Needs nrf_atfifo.h included first.
- */
-#ifndef NRF_ATFIFO_H__
-#error This is internal file. Do not include this file in your program.
-#endif
-
-#ifndef NRF_ATFIFO_INTERNAL_H__
-#define NRF_ATFIFO_INTERNAL_H__
-#include <stddef.h>
-#include "nrf.h"
-#include "app_util.h"
-#include "nordic_common.h"
-
-#if ((__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)) == 0
-#error Unsupported core version
-#endif
-
-/*
- * Make sure that rd and wr pos in a tag are aligned like expected
- * Changing this would require changes inside assembly code!
- */
-STATIC_ASSERT(offsetof(nrf_atfifo_postag_pos_t, wr) == 0);
-STATIC_ASSERT(offsetof(nrf_atfifo_postag_pos_t, rd) == 2);
-
-/**
- * @brief Atomically reserve space for a new write.
- *
- * @param[in,out] p_fifo FIFO object.
- * @param[out] old_tail Tail position tag before new space is reserved.
- *
- * @retval true Space available.
- * @retval false Memory full.
- *
- * @sa nrf_atfifo_wspace_close
- */
-static bool nrf_atfifo_wspace_req(nrf_atfifo_t * const p_fifo, nrf_atfifo_postag_t * const p_old_tail);
-
-/**
- * @brief Atomically mark all written data available.
- *
- * This function marks all data available for reading.
- * This marking is done by copying tail.pos.wr into tail.pos.rd.
- *
- * It must be called only when closing the first write.
- * It cannot be called if any write access was interrupted.
- * See the code below:
- * @code
- * if (old_tail.pos.wr == old_tail.pos.rd)
- * {
- * nrf_atfifo_wspace_close(my_fifo);
- * return true;
- * }
- * return false;
- * @endcode
- *
- * @param[in,out] p_fifo FIFO object.
- *
- * @sa nrf_atfifo_wspace_req
- */
-static void nrf_atfifo_wspace_close(nrf_atfifo_t * const p_fifo);
-
-/**
- * @brief Atomically get a part of a buffer to read data.
- *
- * @param[in,out] p_fifo FIFO object.
- * @param[out] old_head Head position tag before the data buffer is read.
- *
- * @retval true Data available for reading.
- * @retval false No data in the buffer.
- *
- * @sa nrf_atfifo_rspace_close
- */
-static bool nrf_atfifo_rspace_req(nrf_atfifo_t * const p_fifo, nrf_atfifo_postag_t * const p_old_head);
-
-/**
- * @brief Atomically release all read data.
- *
- * This function marks all data that was read as free space,
- * which is available for writing.
- * This marking is done by copying head.pos.rd into head.pos.wr.
- *
- * It must be called only when closing the first read.
- * It cannot be called when the current read access interrupted any other read access.
- * See code below:
- * @code
- * if (old_head.pos.wr == old_head.pos.rd)
- * {
- * nrf_atfifo_rspace_close(my_fifo);
- * return true;
- * }
- * return false;
- * @endcode
- *
- * @param[in,out] p_fifo FIFO object.
- *
- * @sa nrf_atfifo_rspace_req
- */
-static void nrf_atfifo_rspace_close(nrf_atfifo_t * const p_fifo);
-
-/**
- * @brief Safely clear the FIFO, internal function.
- *
- * This function realizes the functionality required by @ref nrf_atfifo_clear.
- *
- * @param[in,out] p_fifo FIFO object.
- *
- * @retval true All the data was released.
- * @retval false All the data available for releasing was released, but there is some pending transfer.
- */
-static bool nrf_atfifo_space_clear(nrf_atfifo_t * const p_fifo);
-
-
-/* ---------------------------------------------------------------------------
- * Implementation starts here
- */
-
-#if defined ( __CC_ARM )
-
-
-__ASM bool nrf_atfifo_wspace_req(nrf_atfifo_t * const p_fifo, nrf_atfifo_postag_t * const p_old_tail)
-{
- /* Registry usage:
- * R0 - p_fifo
- * R1 - p_old_tail
- * R2 - internal variable old_tail (saved by caller)
- * R3 - internal variable new_tail (saved by caller)
- * R4 - internal temporary register (saved by this function)
- * R5 - not used stored to keep the stack aligned to 8 bytes
- * Returned value:
- * R0 (bool - 32 bits)
- */
- push {r4, r5}
-nrf_atfifo_wspace_req_repeat
- /* Load tail tag and set memory monitor !!! R2 - old tail !!! */
- ldrex r2, [r0, #__cpp(offsetof(nrf_atfifo_t, tail))]
- /* Extract write position !!! R3 !!! */
- uxth r3, r2
- /* Increment address with overload support !!! R4 used temporary !!! */
- ldrh r4, [r0, #__cpp(offsetof(nrf_atfifo_t, item_size))]
- add r3, r4
- ldrh r4, [r0, #__cpp(offsetof(nrf_atfifo_t, buf_size))]
- cmp r3, r4
- it hs
- subhs r3, r3, r4
-
- /* Check if FIFO would overload after making this increment !!! R4 used temporary !!! */
- ldrh r4, [r0, #__cpp(offsetof(nrf_atfifo_t, head) + offsetof(nrf_atfifo_postag_pos_t, wr))]
- cmp r3, r4
- ittt eq
- clrexeq
- moveq r0, #__cpp(false)
- beq nrf_atfifo_wspace_req_exit
-
- /* Pack everything back !!! R3 - new tail !!! */
- /* Copy lower byte from new_tail, and higher byte is a value from the top of old_tail */
- pkhbt r3, r3, r2
-
- /* Store new value clearing memory monitor !!! R4 used temporary !!! */
- strex r4, r3, [r0, #__cpp(offsetof(nrf_atfifo_t, tail))]
- cmp r4, #0
- bne nrf_atfifo_wspace_req_repeat
-
- /* Return true */
- mov r0, #__cpp(true)
-nrf_atfifo_wspace_req_exit
- /* Save old tail */
- str r2, [r1]
- pop {r4, r5}
- bx lr
-}
-
-
-__ASM void nrf_atfifo_wspace_close(nrf_atfifo_t * const p_fifo)
-{
- /* Registry usage:
- * R0 - p_fifo
- * R1 - internal temporary register
- * R2 - new_tail
- */
-nrf_atfifo_wspace_close_repeat
- ldrex r2, [r0, #__cpp(offsetof(nrf_atfifo_t, tail))]
- /* Copy from lower byte to higher */
- pkhbt r2, r2, r2, lsl #16
-
- strex r1, r2, [r0, #__cpp(offsetof(nrf_atfifo_t, tail))]
- cmp r1, #0
- bne nrf_atfifo_wspace_close_repeat
- bx lr
-}
-
-
-__ASM bool nrf_atfifo_rspace_req(nrf_atfifo_t * const p_fifo, nrf_atfifo_postag_t * const p_old_head)
-{
- /* Registry usage:
- * R0 - p_fifo
- * R1 - p_old_head
- * R2 - internal variable old_head (saved by caller)
- * R3 - internal variable new_head (saved by caller)
- * R4 - internal temporary register (saved by this function)
- * R5 - not used stored to keep the stack aligned to 8 bytes
- * Returned value:
- * R0 (bool - 32 bits)
- */
- push {r4, r5}
-nrf_atfifo_rspace_req_repeat
- /* Load tail tag and set memory monitor !!! R2 - old tail !!! */
- ldrex r2, [r0, #__cpp(offsetof(nrf_atfifo_t, head))]
- /* Extract read position !!! R3 !!! */
- uxth r3, r2, ror #16
-
- /* Check if we have any data !!! R4 used temporary !!! */
- ldrh r4, [r0, #__cpp(offsetof(nrf_atfifo_t, tail) + offsetof(nrf_atfifo_postag_pos_t, rd))]
- cmp r3, r4
- ittt eq
- clrexeq
- moveq r0, #__cpp(false)
- beq nrf_atfifo_rspace_req_exit
-
- /* Increment address with overload support !!! R4 used temporary !!! */
- ldrh r4, [r0, #__cpp(offsetof(nrf_atfifo_t, item_size))]
- add r3, r4
- ldrh r4, [r0, #__cpp(offsetof(nrf_atfifo_t, buf_size))]
- cmp r3, r4
- it hs
- subhs r3, r3, r4
-
- /* Pack everything back !!! R3 - new tail !!! */
- /* Copy lower byte from old_head, and higher byte is a value from write_pos */
- pkhbt r3, r2, r3, lsl #16
-
- /* Store new value clearing memory monitor !!! R4 used temporary !!! */
- strex r4, r3, [r0, #__cpp(offsetof(nrf_atfifo_t, head))]
- cmp r4, #0
- bne nrf_atfifo_rspace_req_repeat
-
- /* Return true */
- mov r0, #__cpp(true)
-nrf_atfifo_rspace_req_exit
- /* Save old head */
- str r2, [r1]
- pop {r4, r5}
- bx lr
-}
-
-
-__ASM void nrf_atfifo_rspace_close(nrf_atfifo_t * const p_fifo)
-{
- /* Registry usage:
- * R0 - p_fifo
- * R1 - internal temporary register
- * R2 - new_tail
- */
-nrf_atfifo_rspace_close_repeat
- ldrex r2, [r0, #__cpp(offsetof(nrf_atfifo_t, head))]
- /* Copy from higher byte to lower */
- pkhtb r2, r2, r2, asr #16
-
- strex r1, r2, [r0, #__cpp(offsetof(nrf_atfifo_t, head))]
- cmp r1, #0
- bne nrf_atfifo_rspace_close_repeat
- bx lr
-}
-
-
-__ASM bool nrf_atfifo_space_clear(nrf_atfifo_t * const p_fifo)
-{
- /* Registry usage:
- * R0 - p_fifo as input, bool output after
- * R1 - tail, rd pointer, new_head
- * R2 - head_old, destroyed when creating new_head
- * R3 - p_fifo - copy
- */
- mov r3, r0
-nrf_atfifo_space_clear_repeat
- /* Load old head in !!! R2 register !!! and read pointer of tail in !!! R1 register !!! */
- ldrex r2, [r3, #__cpp(offsetof(nrf_atfifo_t, head))]
- ldrh r1, [r3, #__cpp(offsetof(nrf_atfifo_t, tail) + offsetof(nrf_atfifo_postag_pos_t, rd))]
- cmp r2, r2, ror #16
- /* Return false as default */
- mov r0, #__cpp(false)
- /* Create new head in !!! R1 register !!! Data in !!! R2 register broken !!! */
- itett ne
- uxthne r2, r2
- orreq r1, r1, r1, lsl #16
- orrne r1, r2, r1, lsl #16
-
- /* Skip header test */
- bne nrf_atfifo_space_clear_head_test_skip
-
- /* Load whole tail and test it !!! R2 used !!! */
- ldr r2, [r3, #__cpp(offsetof(nrf_atfifo_t, tail))]
- cmp r2, r2, ror #16
- /* Return true if equal */
- it eq
- moveq r0, #__cpp(true)
-
-nrf_atfifo_space_clear_head_test_skip
- /* Store and test if success !!! R2 used temporary !!! */
- strex r2, r1, [r3, #__cpp(offsetof(nrf_atfifo_t, head))]
- cmp r2, #0
- bne nrf_atfifo_space_clear_repeat
- bx lr
-}
-
-#elif defined ( __ICCARM__ ) || defined ( __GNUC__ )
-
-bool nrf_atfifo_wspace_req(nrf_atfifo_t * const p_fifo, nrf_atfifo_postag_t * const p_old_tail)
-{
- volatile bool ret;
- volatile uint32_t old_tail;
- uint32_t new_tail;
- uint32_t temp;
-
- __ASM volatile(
- /* For more comments see Keil version above */
- "1: \n"
- " ldrex %[old_tail], [%[p_fifo], %[offset_tail]] \n"
- " uxth %[new_tail], %[old_tail] \n"
- " \n"
- " ldrh %[temp], [%[p_fifo], %[offset_item_size]] \n"
- " add %[new_tail], %[temp] \n"
- " ldrh %[temp], [%[p_fifo], %[offset_buf_size]] \n"
- " cmp %[new_tail], %[temp] \n"
- " it hs \n"
- " subhs %[new_tail], %[new_tail], %[temp] \n"
- " \n"
- " ldrh %[temp], [%[p_fifo], %[offset_head_wr]] \n"
- " cmp %[new_tail], %[temp] \n"
- " ittt eq \n"
- " clrexeq \n"
- " moveq %[ret], %[false_val] \n"
- " beq.n 2f \n"
- " \n"
- " pkhbt %[new_tail], %[new_tail], %[old_tail] \n"
- " \n"
- " strex %[temp], %[new_tail], [%[p_fifo], %[offset_tail]] \n"
- " cmp %[temp], #0 \n"
- " bne.n 1b \n"
- " \n"
- " mov %[ret], %[true_val] \n"
- "2: \n"
- : /* Output operands */
- [ret] "=r"(ret),
- [temp] "=&r"(temp),
- [old_tail]"=&r"(old_tail),
- [new_tail]"=&r"(new_tail)
- : /* Input operands */
- [p_fifo] "r"(p_fifo),
- [offset_tail] "J"(offsetof(nrf_atfifo_t, tail)),
- [offset_head_wr] "J"(offsetof(nrf_atfifo_t, head) + offsetof(nrf_atfifo_postag_pos_t, wr)),
- [offset_item_size]"J"(offsetof(nrf_atfifo_t, item_size)),
- [offset_buf_size] "J"(offsetof(nrf_atfifo_t, buf_size)),
- [true_val] "I"(true),
- [false_val] "I"(false)
- : /* Clobbers */
- "cc");
-
- p_old_tail->tag = old_tail;
- UNUSED_VARIABLE(new_tail);
- UNUSED_VARIABLE(temp);
- return ret;
-}
-
-
-void nrf_atfifo_wspace_close(nrf_atfifo_t * const p_fifo)
-{
- uint32_t temp;
- uint32_t new_tail;
-
- __ASM volatile(
- /* For more comments see Keil version above */
- "1: \n"
- " ldrex %[new_tail], [%[p_fifo], %[offset_tail]] \n"
- " pkhbt %[new_tail],%[new_tail], %[new_tail], lsl #16 \n"
- " \n"
- " strex %[temp], %[new_tail], [%[p_fifo], %[offset_tail]] \n"
- " cmp %[temp], #0 \n"
- " bne.n 1b \n"
- : /* Output operands */
- [temp] "=&r"(temp),
- [new_tail] "=&r"(new_tail)
- : /* Input operands */
- [p_fifo] "r"(p_fifo),
- [offset_tail] "J"(offsetof(nrf_atfifo_t, tail))
- : /* Clobbers */
- "cc");
-
- UNUSED_VARIABLE(temp);
- UNUSED_VARIABLE(new_tail);
-}
-
-
-bool nrf_atfifo_rspace_req(nrf_atfifo_t * const p_fifo, nrf_atfifo_postag_t * const p_old_head)
-{
- volatile bool ret;
- volatile uint32_t old_head;
- uint32_t new_head;
- uint32_t temp;
-
- __ASM volatile(
- /* For more comments see Keil version above */
- "1: \n"
- " ldrex %[old_head], [%[p_fifo], %[offset_head]] \n"
- " uxth %[new_head], %[old_head], ror #16 \n"
- " \n"
- " ldrh %[temp], [%[p_fifo], %[offset_tail_rd]] \n"
- " cmp %[new_head], %[temp] \n"
- " ittt eq \n"
- " clrexeq \n"
- " moveq %[ret], %[false_val] \n"
- " beq.n 2f \n"
- " \n"
- " ldrh %[temp], [%[p_fifo], %[offset_item_size]] \n"
- " add %[new_head], %[temp] \n"
- " ldrh %[temp], [%[p_fifo], %[offset_buf_size]] \n"
- " cmp %[new_head], %[temp] \n"
- " it hs \n"
- " subhs %[new_head], %[new_head], %[temp] \n"
- " \n"
- " pkhbt %[new_head], %[old_head], %[new_head], lsl #16 \n"
- " \n"
- " strex %[temp], %[new_head], [%[p_fifo], %[offset_head]] \n"
- " cmp %[temp], #0 \n"
- " bne.n 1b \n"
- " \n"
- " mov %[ret], %[true_val] \n"
- "2: \n"
- : /* Output operands */
- [ret] "=r"(ret),
- [temp] "=&r"(temp),
- [old_head]"=&r"(old_head),
- [new_head]"=&r"(new_head)
- : /* Input operands */
- [p_fifo] "r"(p_fifo),
- [offset_head] "J"(offsetof(nrf_atfifo_t, head)),
- [offset_tail_rd] "J"(offsetof(nrf_atfifo_t, tail) + offsetof(nrf_atfifo_postag_pos_t, rd)),
- [offset_item_size]"J"(offsetof(nrf_atfifo_t, item_size)),
- [offset_buf_size] "J"(offsetof(nrf_atfifo_t, buf_size)),
- [true_val] "I"(true),
- [false_val] "I"(false)
- : /* Clobbers */
- "cc");
-
- p_old_head->tag = old_head;
- UNUSED_VARIABLE(new_head);
- UNUSED_VARIABLE(temp);
- return ret;
-}
-
-
-void nrf_atfifo_rspace_close(nrf_atfifo_t * const p_fifo)
-{
- uint32_t temp;
- uint32_t new_head;
-
- __ASM volatile(
- /* For more comments see Keil version above */
- "1: \n"
- " ldrex %[new_head], [%[p_fifo], %[offset_head]] \n"
- " pkhtb %[new_head],%[new_head], %[new_head], asr #16 \n"
- " \n"
- " strex %[temp], %[new_head], [%[p_fifo], %[offset_head]] \n"
- " cmp %[temp], #0 \n"
- " bne.n 1b \n"
- : /* Output operands */
- [temp] "=&r"(temp),
- [new_head] "=&r"(new_head)
- : /* Input operands */
- [p_fifo] "r"(p_fifo),
- [offset_head] "J"(offsetof(nrf_atfifo_t, head))
- : /* Clobbers */
- "cc");
-
- UNUSED_VARIABLE(temp);
- UNUSED_VARIABLE(new_head);
-}
-
-
-bool nrf_atfifo_space_clear(nrf_atfifo_t * const p_fifo)
-{
- volatile bool ret;
- uint32_t old_head; /* This variable is left broken after assembly code finishes */
- uint32_t new_head;
-
- __ASM volatile(
- "1: \n"
- " ldrex %[old_head], [%[p_fifo], %[offset_head]] \n"
- " ldrh %[new_head], [%[p_fifo], %[offset_tail_rd]] \n"
- " cmp %[old_head], %[old_head], ror #16 \n"
- " \n"
- " mov %[ret], %[false_val] \n"
- " \n"
- " itett ne \n"
- " uxthne %[old_head], %[old_head] \n"
- " orreq %[new_head], %[new_head], %[new_head], lsl #16 \n"
- " orrne %[new_head], %[old_head], %[new_head], lsl #16 \n"
- " \n"
- " bne.n 2f \n"
- " \n"
- " ldr %[old_head], [%[p_fifo], %[offset_tail]] \n"
- " cmp %[old_head], %[old_head], ror #16 \n"
- " it eq \n"
- " moveq %[ret], %[true_val] \n"
- " \n"
- "2: \n"
- " strex %[old_head], %[new_head], [%[p_fifo], %[offset_head]] \n"
- " cmp %[old_head], #0 \n"
- " bne.n 1b \n"
- : /* Output operands */
- [ret] "=&r"(ret),
- [old_head] "=&r"(old_head),
- [new_head] "=&r"(new_head)
- : /* Input operands */
- [p_fifo] "r"(p_fifo),
- [offset_head] "J"(offsetof(nrf_atfifo_t, head)),
- [offset_tail] "J"(offsetof(nrf_atfifo_t, tail)),
- [offset_tail_rd] "J"(offsetof(nrf_atfifo_t, tail) + offsetof(nrf_atfifo_postag_pos_t, rd)),
- [true_val] "I"(true),
- [false_val] "I"(false)
- : /* Clobbers */
- "cc");
-
- UNUSED_VARIABLE(old_head);
- UNUSED_VARIABLE(new_head);
- return ret;
-}
-
-#else
-#error Unsupported compiler
-#endif
-
-#endif /* NRF_ATFIFO_INTERNAL_H__ */
+/**
+ * Copyright (c) 2011 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @file
+ * @brief Atomic FIFO internal file
+ *
+ * This file should be included only by nrf_atfifo internally.
+ * Needs nrf_atfifo.h included first.
+ */
+#ifndef NRF_ATFIFO_H__
+#error This is internal file. Do not include this file in your program.
+#endif
+
+#ifndef NRF_ATFIFO_INTERNAL_H__
+#define NRF_ATFIFO_INTERNAL_H__
+#include <stddef.h>
+#include "nrf.h"
+#include "app_util.h"
+#include "nordic_common.h"
+
+#if ((__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)) == 0
+#error Unsupported core version
+#endif
+
+/*
+ * Make sure that rd and wr pos in a tag are aligned like expected
+ * Changing this would require changes inside assembly code!
+ */
+STATIC_ASSERT(offsetof(nrf_atfifo_postag_pos_t, wr) == 0);
+STATIC_ASSERT(offsetof(nrf_atfifo_postag_pos_t, rd) == 2);
+
+/**
+ * @brief Atomically reserve space for a new write.
+ *
+ * @param[in,out] p_fifo FIFO object.
+ * @param[out] old_tail Tail position tag before new space is reserved.
+ *
+ * @retval true Space available.
+ * @retval false Memory full.
+ *
+ * @sa nrf_atfifo_wspace_close
+ */
+static bool nrf_atfifo_wspace_req(nrf_atfifo_t * const p_fifo, nrf_atfifo_postag_t * const p_old_tail);
+
+/**
+ * @brief Atomically mark all written data available.
+ *
+ * This function marks all data available for reading.
+ * This marking is done by copying tail.pos.wr into tail.pos.rd.
+ *
+ * It must be called only when closing the first write.
+ * It cannot be called if any write access was interrupted.
+ * See the code below:
+ * @code
+ * if (old_tail.pos.wr == old_tail.pos.rd)
+ * {
+ * nrf_atfifo_wspace_close(my_fifo);
+ * return true;
+ * }
+ * return false;
+ * @endcode
+ *
+ * @param[in,out] p_fifo FIFO object.
+ *
+ * @sa nrf_atfifo_wspace_req
+ */
+static void nrf_atfifo_wspace_close(nrf_atfifo_t * const p_fifo);
+
+/**
+ * @brief Atomically get a part of a buffer to read data.
+ *
+ * @param[in,out] p_fifo FIFO object.
+ * @param[out] old_head Head position tag before the data buffer is read.
+ *
+ * @retval true Data available for reading.
+ * @retval false No data in the buffer.
+ *
+ * @sa nrf_atfifo_rspace_close
+ */
+static bool nrf_atfifo_rspace_req(nrf_atfifo_t * const p_fifo, nrf_atfifo_postag_t * const p_old_head);
+
+/**
+ * @brief Atomically release all read data.
+ *
+ * This function marks all data that was read as free space,
+ * which is available for writing.
+ * This marking is done by copying head.pos.rd into head.pos.wr.
+ *
+ * It must be called only when closing the first read.
+ * It cannot be called when the current read access interrupted any other read access.
+ * See code below:
+ * @code
+ * if (old_head.pos.wr == old_head.pos.rd)
+ * {
+ * nrf_atfifo_rspace_close(my_fifo);
+ * return true;
+ * }
+ * return false;
+ * @endcode
+ *
+ * @param[in,out] p_fifo FIFO object.
+ *
+ * @sa nrf_atfifo_rspace_req
+ */
+static void nrf_atfifo_rspace_close(nrf_atfifo_t * const p_fifo);
+
+/**
+ * @brief Safely clear the FIFO, internal function.
+ *
+ * This function realizes the functionality required by @ref nrf_atfifo_clear.
+ *
+ * @param[in,out] p_fifo FIFO object.
+ *
+ * @retval true All the data was released.
+ * @retval false All the data available for releasing was released, but there is some pending transfer.
+ */
+static bool nrf_atfifo_space_clear(nrf_atfifo_t * const p_fifo);
+
+
+/* ---------------------------------------------------------------------------
+ * Implementation starts here
+ */
+
+#if defined ( __CC_ARM )
+
+
+__ASM bool nrf_atfifo_wspace_req(nrf_atfifo_t * const p_fifo, nrf_atfifo_postag_t * const p_old_tail)
+{
+ /* Registry usage:
+ * R0 - p_fifo
+ * R1 - p_old_tail
+ * R2 - internal variable old_tail (saved by caller)
+ * R3 - internal variable new_tail (saved by caller)
+ * R4 - internal temporary register (saved by this function)
+ * R5 - not used stored to keep the stack aligned to 8 bytes
+ * Returned value:
+ * R0 (bool - 32 bits)
+ */
+ push {r4, r5}
+nrf_atfifo_wspace_req_repeat
+ /* Load tail tag and set memory monitor !!! R2 - old tail !!! */
+ ldrex r2, [r0, #__cpp(offsetof(nrf_atfifo_t, tail))]
+ /* Extract write position !!! R3 !!! */
+ uxth r3, r2
+ /* Increment address with overload support !!! R4 used temporary !!! */
+ ldrh r4, [r0, #__cpp(offsetof(nrf_atfifo_t, item_size))]
+ add r3, r4
+ ldrh r4, [r0, #__cpp(offsetof(nrf_atfifo_t, buf_size))]
+ cmp r3, r4
+ it hs
+ subhs r3, r3, r4
+
+ /* Check if FIFO would overload after making this increment !!! R4 used temporary !!! */
+ ldrh r4, [r0, #__cpp(offsetof(nrf_atfifo_t, head) + offsetof(nrf_atfifo_postag_pos_t, wr))]
+ cmp r3, r4
+ ittt eq
+ clrexeq
+ moveq r0, #__cpp(false)
+ beq nrf_atfifo_wspace_req_exit
+
+ /* Pack everything back !!! R3 - new tail !!! */
+ /* Copy lower byte from new_tail, and higher byte is a value from the top of old_tail */
+ pkhbt r3, r3, r2
+
+ /* Store new value clearing memory monitor !!! R4 used temporary !!! */
+ strex r4, r3, [r0, #__cpp(offsetof(nrf_atfifo_t, tail))]
+ cmp r4, #0
+ bne nrf_atfifo_wspace_req_repeat
+
+ /* Return true */
+ mov r0, #__cpp(true)
+nrf_atfifo_wspace_req_exit
+ /* Save old tail */
+ str r2, [r1]
+ pop {r4, r5}
+ bx lr
+}
+
+
+__ASM void nrf_atfifo_wspace_close(nrf_atfifo_t * const p_fifo)
+{
+ /* Registry usage:
+ * R0 - p_fifo
+ * R1 - internal temporary register
+ * R2 - new_tail
+ */
+nrf_atfifo_wspace_close_repeat
+ ldrex r2, [r0, #__cpp(offsetof(nrf_atfifo_t, tail))]
+ /* Copy from lower byte to higher */
+ pkhbt r2, r2, r2, lsl #16
+
+ strex r1, r2, [r0, #__cpp(offsetof(nrf_atfifo_t, tail))]
+ cmp r1, #0
+ bne nrf_atfifo_wspace_close_repeat
+ bx lr
+}
+
+
+__ASM bool nrf_atfifo_rspace_req(nrf_atfifo_t * const p_fifo, nrf_atfifo_postag_t * const p_old_head)
+{
+ /* Registry usage:
+ * R0 - p_fifo
+ * R1 - p_old_head
+ * R2 - internal variable old_head (saved by caller)
+ * R3 - internal variable new_head (saved by caller)
+ * R4 - internal temporary register (saved by this function)
+ * R5 - not used stored to keep the stack aligned to 8 bytes
+ * Returned value:
+ * R0 (bool - 32 bits)
+ */
+ push {r4, r5}
+nrf_atfifo_rspace_req_repeat
+ /* Load tail tag and set memory monitor !!! R2 - old tail !!! */
+ ldrex r2, [r0, #__cpp(offsetof(nrf_atfifo_t, head))]
+ /* Extract read position !!! R3 !!! */
+ uxth r3, r2, ror #16
+
+ /* Check if we have any data !!! R4 used temporary !!! */
+ ldrh r4, [r0, #__cpp(offsetof(nrf_atfifo_t, tail) + offsetof(nrf_atfifo_postag_pos_t, rd))]
+ cmp r3, r4
+ ittt eq
+ clrexeq
+ moveq r0, #__cpp(false)
+ beq nrf_atfifo_rspace_req_exit
+
+ /* Increment address with overload support !!! R4 used temporary !!! */
+ ldrh r4, [r0, #__cpp(offsetof(nrf_atfifo_t, item_size))]
+ add r3, r4
+ ldrh r4, [r0, #__cpp(offsetof(nrf_atfifo_t, buf_size))]
+ cmp r3, r4
+ it hs
+ subhs r3, r3, r4
+
+ /* Pack everything back !!! R3 - new tail !!! */
+ /* Copy lower byte from old_head, and higher byte is a value from write_pos */
+ pkhbt r3, r2, r3, lsl #16
+
+ /* Store new value clearing memory monitor !!! R4 used temporary !!! */
+ strex r4, r3, [r0, #__cpp(offsetof(nrf_atfifo_t, head))]
+ cmp r4, #0
+ bne nrf_atfifo_rspace_req_repeat
+
+ /* Return true */
+ mov r0, #__cpp(true)
+nrf_atfifo_rspace_req_exit
+ /* Save old head */
+ str r2, [r1]
+ pop {r4, r5}
+ bx lr
+}
+
+
+__ASM void nrf_atfifo_rspace_close(nrf_atfifo_t * const p_fifo)
+{
+ /* Registry usage:
+ * R0 - p_fifo
+ * R1 - internal temporary register
+ * R2 - new_tail
+ */
+nrf_atfifo_rspace_close_repeat
+ ldrex r2, [r0, #__cpp(offsetof(nrf_atfifo_t, head))]
+ /* Copy from higher byte to lower */
+ pkhtb r2, r2, r2, asr #16
+
+ strex r1, r2, [r0, #__cpp(offsetof(nrf_atfifo_t, head))]
+ cmp r1, #0
+ bne nrf_atfifo_rspace_close_repeat
+ bx lr
+}
+
+
+__ASM bool nrf_atfifo_space_clear(nrf_atfifo_t * const p_fifo)
+{
+ /* Registry usage:
+ * R0 - p_fifo as input, bool output after
+ * R1 - tail, rd pointer, new_head
+ * R2 - head_old, destroyed when creating new_head
+ * R3 - p_fifo - copy
+ */
+ mov r3, r0
+nrf_atfifo_space_clear_repeat
+ /* Load old head in !!! R2 register !!! and read pointer of tail in !!! R1 register !!! */
+ ldrex r2, [r3, #__cpp(offsetof(nrf_atfifo_t, head))]
+ ldrh r1, [r3, #__cpp(offsetof(nrf_atfifo_t, tail) + offsetof(nrf_atfifo_postag_pos_t, rd))]
+ cmp r2, r2, ror #16
+ /* Return false as default */
+ mov r0, #__cpp(false)
+ /* Create new head in !!! R1 register !!! Data in !!! R2 register broken !!! */
+ itett ne
+ uxthne r2, r2
+ orreq r1, r1, r1, lsl #16
+ orrne r1, r2, r1, lsl #16
+
+ /* Skip header test */
+ bne nrf_atfifo_space_clear_head_test_skip
+
+ /* Load whole tail and test it !!! R2 used !!! */
+ ldr r2, [r3, #__cpp(offsetof(nrf_atfifo_t, tail))]
+ cmp r2, r2, ror #16
+ /* Return true if equal */
+ it eq
+ moveq r0, #__cpp(true)
+
+nrf_atfifo_space_clear_head_test_skip
+ /* Store and test if success !!! R2 used temporary !!! */
+ strex r2, r1, [r3, #__cpp(offsetof(nrf_atfifo_t, head))]
+ cmp r2, #0
+ bne nrf_atfifo_space_clear_repeat
+ bx lr
+}
+
+#elif defined ( __ICCARM__ ) || defined ( __GNUC__ )
+
+bool nrf_atfifo_wspace_req(nrf_atfifo_t * const p_fifo, nrf_atfifo_postag_t * const p_old_tail)
+{
+ volatile bool ret;
+ volatile uint32_t old_tail;
+ uint32_t new_tail;
+ uint32_t temp;
+
+ __ASM volatile(
+ /* For more comments see Keil version above */
+ "1: \n"
+ " ldrex %[old_tail], [%[p_fifo], %[offset_tail]] \n"
+ " uxth %[new_tail], %[old_tail] \n"
+ " \n"
+ " ldrh %[temp], [%[p_fifo], %[offset_item_size]] \n"
+ " add %[new_tail], %[temp] \n"
+ " ldrh %[temp], [%[p_fifo], %[offset_buf_size]] \n"
+ " cmp %[new_tail], %[temp] \n"
+ " it hs \n"
+ " subhs %[new_tail], %[new_tail], %[temp] \n"
+ " \n"
+ " ldrh %[temp], [%[p_fifo], %[offset_head_wr]] \n"
+ " cmp %[new_tail], %[temp] \n"
+ " ittt eq \n"
+ " clrexeq \n"
+ " moveq %[ret], %[false_val] \n"
+ " beq.n 2f \n"
+ " \n"
+ " pkhbt %[new_tail], %[new_tail], %[old_tail] \n"
+ " \n"
+ " strex %[temp], %[new_tail], [%[p_fifo], %[offset_tail]] \n"
+ " cmp %[temp], #0 \n"
+ " bne.n 1b \n"
+ " \n"
+ " mov %[ret], %[true_val] \n"
+ "2: \n"
+ : /* Output operands */
+ [ret] "=r"(ret),
+ [temp] "=&r"(temp),
+ [old_tail]"=&r"(old_tail),
+ [new_tail]"=&r"(new_tail)
+ : /* Input operands */
+ [p_fifo] "r"(p_fifo),
+ [offset_tail] "J"(offsetof(nrf_atfifo_t, tail)),
+ [offset_head_wr] "J"(offsetof(nrf_atfifo_t, head) + offsetof(nrf_atfifo_postag_pos_t, wr)),
+ [offset_item_size]"J"(offsetof(nrf_atfifo_t, item_size)),
+ [offset_buf_size] "J"(offsetof(nrf_atfifo_t, buf_size)),
+ [true_val] "I"(true),
+ [false_val] "I"(false)
+ : /* Clobbers */
+ "cc");
+
+ p_old_tail->tag = old_tail;
+ UNUSED_VARIABLE(new_tail);
+ UNUSED_VARIABLE(temp);
+ return ret;
+}
+
+
+void nrf_atfifo_wspace_close(nrf_atfifo_t * const p_fifo)
+{
+ uint32_t temp;
+ uint32_t new_tail;
+
+ __ASM volatile(
+ /* For more comments see Keil version above */
+ "1: \n"
+ " ldrex %[new_tail], [%[p_fifo], %[offset_tail]] \n"
+ " pkhbt %[new_tail],%[new_tail], %[new_tail], lsl #16 \n"
+ " \n"
+ " strex %[temp], %[new_tail], [%[p_fifo], %[offset_tail]] \n"
+ " cmp %[temp], #0 \n"
+ " bne.n 1b \n"
+ : /* Output operands */
+ [temp] "=&r"(temp),
+ [new_tail] "=&r"(new_tail)
+ : /* Input operands */
+ [p_fifo] "r"(p_fifo),
+ [offset_tail] "J"(offsetof(nrf_atfifo_t, tail))
+ : /* Clobbers */
+ "cc");
+
+ UNUSED_VARIABLE(temp);
+ UNUSED_VARIABLE(new_tail);
+}
+
+
+bool nrf_atfifo_rspace_req(nrf_atfifo_t * const p_fifo, nrf_atfifo_postag_t * const p_old_head)
+{
+ volatile bool ret;
+ volatile uint32_t old_head;
+ uint32_t new_head;
+ uint32_t temp;
+
+ __ASM volatile(
+ /* For more comments see Keil version above */
+ "1: \n"
+ " ldrex %[old_head], [%[p_fifo], %[offset_head]] \n"
+ " uxth %[new_head], %[old_head], ror #16 \n"
+ " \n"
+ " ldrh %[temp], [%[p_fifo], %[offset_tail_rd]] \n"
+ " cmp %[new_head], %[temp] \n"
+ " ittt eq \n"
+ " clrexeq \n"
+ " moveq %[ret], %[false_val] \n"
+ " beq.n 2f \n"
+ " \n"
+ " ldrh %[temp], [%[p_fifo], %[offset_item_size]] \n"
+ " add %[new_head], %[temp] \n"
+ " ldrh %[temp], [%[p_fifo], %[offset_buf_size]] \n"
+ " cmp %[new_head], %[temp] \n"
+ " it hs \n"
+ " subhs %[new_head], %[new_head], %[temp] \n"
+ " \n"
+ " pkhbt %[new_head], %[old_head], %[new_head], lsl #16 \n"
+ " \n"
+ " strex %[temp], %[new_head], [%[p_fifo], %[offset_head]] \n"
+ " cmp %[temp], #0 \n"
+ " bne.n 1b \n"
+ " \n"
+ " mov %[ret], %[true_val] \n"
+ "2: \n"
+ : /* Output operands */
+ [ret] "=r"(ret),
+ [temp] "=&r"(temp),
+ [old_head]"=&r"(old_head),
+ [new_head]"=&r"(new_head)
+ : /* Input operands */
+ [p_fifo] "r"(p_fifo),
+ [offset_head] "J"(offsetof(nrf_atfifo_t, head)),
+ [offset_tail_rd] "J"(offsetof(nrf_atfifo_t, tail) + offsetof(nrf_atfifo_postag_pos_t, rd)),
+ [offset_item_size]"J"(offsetof(nrf_atfifo_t, item_size)),
+ [offset_buf_size] "J"(offsetof(nrf_atfifo_t, buf_size)),
+ [true_val] "I"(true),
+ [false_val] "I"(false)
+ : /* Clobbers */
+ "cc");
+
+ p_old_head->tag = old_head;
+ UNUSED_VARIABLE(new_head);
+ UNUSED_VARIABLE(temp);
+ return ret;
+}
+
+
+void nrf_atfifo_rspace_close(nrf_atfifo_t * const p_fifo)
+{
+ uint32_t temp;
+ uint32_t new_head;
+
+ __ASM volatile(
+ /* For more comments see Keil version above */
+ "1: \n"
+ " ldrex %[new_head], [%[p_fifo], %[offset_head]] \n"
+ " pkhtb %[new_head],%[new_head], %[new_head], asr #16 \n"
+ " \n"
+ " strex %[temp], %[new_head], [%[p_fifo], %[offset_head]] \n"
+ " cmp %[temp], #0 \n"
+ " bne.n 1b \n"
+ : /* Output operands */
+ [temp] "=&r"(temp),
+ [new_head] "=&r"(new_head)
+ : /* Input operands */
+ [p_fifo] "r"(p_fifo),
+ [offset_head] "J"(offsetof(nrf_atfifo_t, head))
+ : /* Clobbers */
+ "cc");
+
+ UNUSED_VARIABLE(temp);
+ UNUSED_VARIABLE(new_head);
+}
+
+
+bool nrf_atfifo_space_clear(nrf_atfifo_t * const p_fifo)
+{
+ volatile bool ret;
+ uint32_t old_head; /* This variable is left broken after assembly code finishes */
+ uint32_t new_head;
+
+ __ASM volatile(
+ "1: \n"
+ " ldrex %[old_head], [%[p_fifo], %[offset_head]] \n"
+ " ldrh %[new_head], [%[p_fifo], %[offset_tail_rd]] \n"
+ " cmp %[old_head], %[old_head], ror #16 \n"
+ " \n"
+ " mov %[ret], %[false_val] \n"
+ " \n"
+ " itett ne \n"
+ " uxthne %[old_head], %[old_head] \n"
+ " orreq %[new_head], %[new_head], %[new_head], lsl #16 \n"
+ " orrne %[new_head], %[old_head], %[new_head], lsl #16 \n"
+ " \n"
+ " bne.n 2f \n"
+ " \n"
+ " ldr %[old_head], [%[p_fifo], %[offset_tail]] \n"
+ " cmp %[old_head], %[old_head], ror #16 \n"
+ " it eq \n"
+ " moveq %[ret], %[true_val] \n"
+ " \n"
+ "2: \n"
+ " strex %[old_head], %[new_head], [%[p_fifo], %[offset_head]] \n"
+ " cmp %[old_head], #0 \n"
+ " bne.n 1b \n"
+ : /* Output operands */
+ [ret] "=&r"(ret),
+ [old_head] "=&r"(old_head),
+ [new_head] "=&r"(new_head)
+ : /* Input operands */
+ [p_fifo] "r"(p_fifo),
+ [offset_head] "J"(offsetof(nrf_atfifo_t, head)),
+ [offset_tail] "J"(offsetof(nrf_atfifo_t, tail)),
+ [offset_tail_rd] "J"(offsetof(nrf_atfifo_t, tail) + offsetof(nrf_atfifo_postag_pos_t, rd)),
+ [true_val] "I"(true),
+ [false_val] "I"(false)
+ : /* Clobbers */
+ "cc");
+
+ UNUSED_VARIABLE(old_head);
+ UNUSED_VARIABLE(new_head);
+ return ret;
+}
+
+#else
+#error Unsupported compiler
+#endif
+
+#endif /* NRF_ATFIFO_INTERNAL_H__ */
diff --git a/third_party/NordicSemiconductor/libraries/atomic/nrf_atomic.c b/third_party/NordicSemiconductor/libraries/atomic/nrf_atomic.c
index a4fdc23..cf46812 100644
--- a/third_party/NordicSemiconductor/libraries/atomic/nrf_atomic.c
+++ b/third_party/NordicSemiconductor/libraries/atomic/nrf_atomic.c
@@ -1,449 +1,449 @@
-/**
- * Copyright (c) 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-#include "nrf_atomic.h"
-
-#ifndef NRF_ATOMIC_USE_BUILD_IN
-#if (defined(__GNUC__) && defined(WIN32))
- #define NRF_ATOMIC_USE_BUILD_IN 1
-#else
- #define NRF_ATOMIC_USE_BUILD_IN 0
-#endif
-#endif // NRF_ATOMIC_USE_BUILD_IN
-
-#if ((__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U))
-#define STREX_LDREX_PRESENT
-#else
-#include "app_util_platform.h"
-#endif
-
-
-#if (NRF_ATOMIC_USE_BUILD_IN == 0) && defined(STREX_LDREX_PRESENT)
-#include "nrf_atomic_internal.h"
-#endif
-
-uint32_t nrf_atomic_u32_fetch_store(nrf_atomic_u32_t * p_data, uint32_t value)
-{
-#if NRF_ATOMIC_USE_BUILD_IN
- return __atomic_exchange_n(p_data, value, __ATOMIC_SEQ_CST);
-
-#elif defined(STREX_LDREX_PRESENT)
- uint32_t old_val;
- uint32_t new_val;
- NRF_ATOMIC_OP(mov, old_val, new_val, p_data, value);
-
- UNUSED_PARAMETER(old_val);
- UNUSED_PARAMETER(new_val);
- return old_val;
-#else
- CRITICAL_REGION_ENTER();
- uint32_t old_val = *p_data;
- *p_data = value;
- CRITICAL_REGION_EXIT();
- return old_val;
-#endif //NRF_ATOMIC_USE_BUILD_IN
-}
-
-uint32_t nrf_atomic_u32_store(nrf_atomic_u32_t * p_data, uint32_t value)
-{
-#if NRF_ATOMIC_USE_BUILD_IN
- __atomic_store_n(p_data, value, __ATOMIC_SEQ_CST);
- return value;
-#elif defined(STREX_LDREX_PRESENT)
- uint32_t old_val;
- uint32_t new_val;
-
- NRF_ATOMIC_OP(mov, old_val, new_val, p_data, value);
-
- UNUSED_PARAMETER(old_val);
- UNUSED_PARAMETER(new_val);
- return new_val;
-#else
- CRITICAL_REGION_ENTER();
- *p_data = value;
- CRITICAL_REGION_EXIT();
- return value;
-#endif //NRF_ATOMIC_USE_BUILD_IN
-}
-
-uint32_t nrf_atomic_u32_fetch_or(nrf_atomic_u32_t * p_data, uint32_t value)
-{
-#if NRF_ATOMIC_USE_BUILD_IN
- return __atomic_fetch_or(p_data, value, __ATOMIC_SEQ_CST);
-#elif defined(STREX_LDREX_PRESENT)
- uint32_t old_val;
- uint32_t new_val;
-
- NRF_ATOMIC_OP(orr, old_val, new_val, p_data, value);
- UNUSED_PARAMETER(old_val);
- UNUSED_PARAMETER(new_val);
- return old_val;
-#else
- CRITICAL_REGION_ENTER();
- uint32_t old_val = *p_data;
- *p_data |= value;
- CRITICAL_REGION_EXIT();
- return old_val;
-#endif //NRF_ATOMIC_USE_BUILD_IN
-}
-
-uint32_t nrf_atomic_u32_or(nrf_atomic_u32_t * p_data, uint32_t value)
-{
-#if NRF_ATOMIC_USE_BUILD_IN
- return __atomic_or_fetch(p_data, value, __ATOMIC_SEQ_CST);
-#elif defined(STREX_LDREX_PRESENT)
- uint32_t old_val;
- uint32_t new_val;
-
- NRF_ATOMIC_OP(orr, old_val, new_val, p_data, value);
- UNUSED_PARAMETER(old_val);
- UNUSED_PARAMETER(new_val);
- return new_val;
-#else
- CRITICAL_REGION_ENTER();
- *p_data |= value;
- uint32_t new_value = *p_data;
- CRITICAL_REGION_EXIT();
- return new_value;
-#endif //NRF_ATOMIC_USE_BUILD_IN
-}
-
-uint32_t nrf_atomic_u32_fetch_and(nrf_atomic_u32_t * p_data, uint32_t value)
-{
-#if NRF_ATOMIC_USE_BUILD_IN
- return __atomic_fetch_and(p_data, value, __ATOMIC_SEQ_CST);
-#elif defined(STREX_LDREX_PRESENT)
- uint32_t old_val;
- uint32_t new_val;
-
- NRF_ATOMIC_OP(and, old_val, new_val, p_data, value);
- UNUSED_PARAMETER(old_val);
- UNUSED_PARAMETER(new_val);
- return old_val;
-#else
- CRITICAL_REGION_ENTER();
- uint32_t old_val = *p_data;
- *p_data &= value;
- CRITICAL_REGION_EXIT();
- return old_val;
-#endif //NRF_ATOMIC_USE_BUILD_IN
-}
-
-uint32_t nrf_atomic_u32_and(nrf_atomic_u32_t * p_data, uint32_t value)
-{
-#if NRF_ATOMIC_USE_BUILD_IN
- return __atomic_and_fetch(p_data, value, __ATOMIC_SEQ_CST);
-#elif defined(STREX_LDREX_PRESENT)
- uint32_t old_val;
- uint32_t new_val;
-
- NRF_ATOMIC_OP(and, old_val, new_val, p_data, value);
- UNUSED_PARAMETER(old_val);
- UNUSED_PARAMETER(new_val);
- return new_val;
-#else
- CRITICAL_REGION_ENTER();
- *p_data &= value;
- uint32_t new_value = *p_data;
- CRITICAL_REGION_EXIT();
- return new_value;
-#endif //NRF_ATOMIC_USE_BUILD_IN
-}
-
-uint32_t nrf_atomic_u32_fetch_xor(nrf_atomic_u32_t * p_data, uint32_t value)
-{
-#if NRF_ATOMIC_USE_BUILD_IN
- return __atomic_fetch_xor(p_data, value, __ATOMIC_SEQ_CST);
-#elif defined(STREX_LDREX_PRESENT)
- uint32_t old_val;
- uint32_t new_val;
-
- NRF_ATOMIC_OP(eor, old_val, new_val, p_data, value);
- UNUSED_PARAMETER(old_val);
- UNUSED_PARAMETER(new_val);
- return old_val;
-#else
- CRITICAL_REGION_ENTER();
- uint32_t old_val = *p_data;
- *p_data ^= value;
- CRITICAL_REGION_EXIT();
- return old_val;
-#endif //NRF_ATOMIC_USE_BUILD_IN
-}
-
-uint32_t nrf_atomic_u32_xor(nrf_atomic_u32_t * p_data, uint32_t value)
-{
-#if NRF_ATOMIC_USE_BUILD_IN
- return __atomic_xor_fetch(p_data, value, __ATOMIC_SEQ_CST);
-#elif defined(STREX_LDREX_PRESENT)
- uint32_t old_val;
- uint32_t new_val;
-
- NRF_ATOMIC_OP(eor, old_val, new_val, p_data, value);
- UNUSED_PARAMETER(old_val);
- UNUSED_PARAMETER(new_val);
- return new_val;
-#else
- CRITICAL_REGION_ENTER();
- *p_data ^= value;
- uint32_t new_value = *p_data;
- CRITICAL_REGION_EXIT();
- return new_value;
-#endif //NRF_ATOMIC_USE_BUILD_IN
-}
-
-uint32_t nrf_atomic_u32_fetch_add(nrf_atomic_u32_t * p_data, uint32_t value)
-{
-#if NRF_ATOMIC_USE_BUILD_IN
- return __atomic_fetch_add(p_data, value, __ATOMIC_SEQ_CST);
-#elif defined(STREX_LDREX_PRESENT)
- uint32_t old_val;
- uint32_t new_val;
-
- NRF_ATOMIC_OP(add, old_val, new_val, p_data, value);
- UNUSED_PARAMETER(old_val);
- UNUSED_PARAMETER(new_val);
- return old_val;
-#else
- CRITICAL_REGION_ENTER();
- uint32_t old_val = *p_data;
- *p_data += value;
- CRITICAL_REGION_EXIT();
- return old_val;
-#endif //NRF_ATOMIC_USE_BUILD_IN
-}
-
-uint32_t nrf_atomic_u32_add(nrf_atomic_u32_t * p_data, uint32_t value)
-{
-#if NRF_ATOMIC_USE_BUILD_IN
- return __atomic_add_fetch(p_data, value, __ATOMIC_SEQ_CST);
-#elif defined(STREX_LDREX_PRESENT)
- uint32_t old_val;
- uint32_t new_val;
-
- NRF_ATOMIC_OP(add, old_val, new_val, p_data, value);
- UNUSED_PARAMETER(old_val);
- UNUSED_PARAMETER(new_val);
- return new_val;
-#else
- CRITICAL_REGION_ENTER();
- *p_data += value;
- uint32_t new_value = *p_data;
- CRITICAL_REGION_EXIT();
- return new_value;
-#endif //NRF_ATOMIC_USE_BUILD_IN
-}
-
-uint32_t nrf_atomic_u32_fetch_sub(nrf_atomic_u32_t * p_data, uint32_t value)
-{
-#if NRF_ATOMIC_USE_BUILD_IN
- return __atomic_fetch_sub(p_data, value, __ATOMIC_SEQ_CST);
-#elif defined(STREX_LDREX_PRESENT)
- uint32_t old_val;
- uint32_t new_val;
-
- NRF_ATOMIC_OP(sub, old_val, new_val, p_data, value);
- UNUSED_PARAMETER(old_val);
- UNUSED_PARAMETER(new_val);
- return old_val;
-#else
- CRITICAL_REGION_ENTER();
- uint32_t old_val = *p_data;
- *p_data -= value;
- CRITICAL_REGION_EXIT();
- return old_val;
-#endif //NRF_ATOMIC_USE_BUILD_IN
-}
-
-uint32_t nrf_atomic_u32_sub(nrf_atomic_u32_t * p_data, uint32_t value)
-{
-#if NRF_ATOMIC_USE_BUILD_IN
- return __atomic_sub_fetch(p_data, value, __ATOMIC_SEQ_CST);
-#elif defined(STREX_LDREX_PRESENT)
- uint32_t old_val;
- uint32_t new_val;
-
- NRF_ATOMIC_OP(sub, old_val, new_val, p_data, value);
- UNUSED_PARAMETER(old_val);
- UNUSED_PARAMETER(new_val);
- return new_val;
-#else
- CRITICAL_REGION_ENTER();
- *p_data -= value;
- uint32_t new_value = *p_data;
- CRITICAL_REGION_EXIT();
- return new_value;
-#endif //NRF_ATOMIC_USE_BUILD_IN
-}
-
-bool nrf_atomic_u32_cmp_exch(nrf_atomic_u32_t * p_data,
- uint32_t * p_expected,
- uint32_t desired)
-{
-#if NRF_ATOMIC_USE_BUILD_IN
- return __atomic_compare_exchange(p_data,
- p_expected,
- &desired,
- 1,
- __ATOMIC_SEQ_CST,
- __ATOMIC_SEQ_CST);
-#elif defined(STREX_LDREX_PRESENT)
- return nrf_atomic_internal_cmp_exch(p_data, p_expected, desired);
-#else
- bool ret;
- CRITICAL_REGION_ENTER();
- if (*p_data == *p_expected)
- {
- *p_data = desired;
- ret = true;
- }
- else
- {
- *p_expected = *p_data;
- ret = false;
- }
- CRITICAL_REGION_EXIT();
- return ret;
-#endif
-}
-
-uint32_t nrf_atomic_u32_fetch_sub_hs(nrf_atomic_u32_t * p_data, uint32_t value)
-{
-#if NRF_ATOMIC_USE_BUILD_IN
- uint32_t expected = *p_data;
- uint32_t new_val;
- bool success;
-
- do
- {
- if (expected >= value)
- {
- new_val = expected - value;
- }
- else
- {
- new_val = expected;
- }
- success = __atomic_compare_exchange(p_data,
- &expected,
- &new_val,
- 1,
- __ATOMIC_SEQ_CST,
- __ATOMIC_SEQ_CST);
- } while(!success);
- return expected;
-#elif defined(STREX_LDREX_PRESENT)
- uint32_t old_val;
- uint32_t new_val;
-
- NRF_ATOMIC_OP(sub_hs, old_val, new_val, p_data, value);
- UNUSED_PARAMETER(old_val);
- UNUSED_PARAMETER(new_val);
- return old_val;
-#else
- CRITICAL_REGION_ENTER();
- uint32_t old_val = *p_data;
- *p_data -= value;
- CRITICAL_REGION_EXIT();
- return old_val;
-#endif //NRF_ATOMIC_USE_BUILD_IN
-}
-
-uint32_t nrf_atomic_u32_sub_hs(nrf_atomic_u32_t * p_data, uint32_t value)
-{
-#if NRF_ATOMIC_USE_BUILD_IN
- uint32_t expected = *p_data;
- uint32_t new_val;
- bool success;
-
- do
- {
- if (expected >= value)
- {
- new_val = expected - value;
- }
- else
- {
- new_val = expected;
- }
- success = __atomic_compare_exchange(p_data,
- &expected,
- &new_val,
- 1,
- __ATOMIC_SEQ_CST,
- __ATOMIC_SEQ_CST);
- } while(!success);
- return new_val;
-#elif defined(STREX_LDREX_PRESENT)
- uint32_t old_val;
- uint32_t new_val;
-
- NRF_ATOMIC_OP(sub_hs, old_val, new_val, p_data, value);
- UNUSED_PARAMETER(old_val);
- UNUSED_PARAMETER(new_val);
- return new_val;
-#else
- CRITICAL_REGION_ENTER();
- *p_data -= value;
- uint32_t new_value = *p_data;
- CRITICAL_REGION_EXIT();
- return new_value;
-#endif //NRF_ATOMIC_USE_BUILD_IN
-}
-
-uint32_t nrf_atomic_flag_set_fetch(nrf_atomic_flag_t * p_data)
-{
- return nrf_atomic_u32_fetch_or(p_data, 1);
-}
-
-uint32_t nrf_atomic_flag_set(nrf_atomic_flag_t * p_data)
-{
- return nrf_atomic_u32_or(p_data, 1);
-}
-
-uint32_t nrf_atomic_flag_clear_fetch(nrf_atomic_flag_t * p_data)
-{
- return nrf_atomic_u32_fetch_and(p_data, 0);
-}
-
-uint32_t nrf_atomic_flag_clear(nrf_atomic_flag_t * p_data)
-{
- return nrf_atomic_u32_and(p_data, 0);
-}
-
+/**
+ * Copyright (c) 2018 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#include "nrf_atomic.h"
+
+#ifndef NRF_ATOMIC_USE_BUILD_IN
+#if (defined(__GNUC__) && defined(WIN32))
+ #define NRF_ATOMIC_USE_BUILD_IN 1
+#else
+ #define NRF_ATOMIC_USE_BUILD_IN 0
+#endif
+#endif // NRF_ATOMIC_USE_BUILD_IN
+
+#if ((__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U))
+#define STREX_LDREX_PRESENT
+#else
+#include "app_util_platform.h"
+#endif
+
+
+#if (NRF_ATOMIC_USE_BUILD_IN == 0) && defined(STREX_LDREX_PRESENT)
+#include "nrf_atomic_internal.h"
+#endif
+
+uint32_t nrf_atomic_u32_fetch_store(nrf_atomic_u32_t * p_data, uint32_t value)
+{
+#if NRF_ATOMIC_USE_BUILD_IN
+ return __atomic_exchange_n(p_data, value, __ATOMIC_SEQ_CST);
+
+#elif defined(STREX_LDREX_PRESENT)
+ uint32_t old_val;
+ uint32_t new_val;
+ NRF_ATOMIC_OP(mov, old_val, new_val, p_data, value);
+
+ UNUSED_PARAMETER(old_val);
+ UNUSED_PARAMETER(new_val);
+ return old_val;
+#else
+ CRITICAL_REGION_ENTER();
+ uint32_t old_val = *p_data;
+ *p_data = value;
+ CRITICAL_REGION_EXIT();
+ return old_val;
+#endif //NRF_ATOMIC_USE_BUILD_IN
+}
+
+uint32_t nrf_atomic_u32_store(nrf_atomic_u32_t * p_data, uint32_t value)
+{
+#if NRF_ATOMIC_USE_BUILD_IN
+ __atomic_store_n(p_data, value, __ATOMIC_SEQ_CST);
+ return value;
+#elif defined(STREX_LDREX_PRESENT)
+ uint32_t old_val;
+ uint32_t new_val;
+
+ NRF_ATOMIC_OP(mov, old_val, new_val, p_data, value);
+
+ UNUSED_PARAMETER(old_val);
+ UNUSED_PARAMETER(new_val);
+ return new_val;
+#else
+ CRITICAL_REGION_ENTER();
+ *p_data = value;
+ CRITICAL_REGION_EXIT();
+ return value;
+#endif //NRF_ATOMIC_USE_BUILD_IN
+}
+
+uint32_t nrf_atomic_u32_fetch_or(nrf_atomic_u32_t * p_data, uint32_t value)
+{
+#if NRF_ATOMIC_USE_BUILD_IN
+ return __atomic_fetch_or(p_data, value, __ATOMIC_SEQ_CST);
+#elif defined(STREX_LDREX_PRESENT)
+ uint32_t old_val;
+ uint32_t new_val;
+
+ NRF_ATOMIC_OP(orr, old_val, new_val, p_data, value);
+ UNUSED_PARAMETER(old_val);
+ UNUSED_PARAMETER(new_val);
+ return old_val;
+#else
+ CRITICAL_REGION_ENTER();
+ uint32_t old_val = *p_data;
+ *p_data |= value;
+ CRITICAL_REGION_EXIT();
+ return old_val;
+#endif //NRF_ATOMIC_USE_BUILD_IN
+}
+
+uint32_t nrf_atomic_u32_or(nrf_atomic_u32_t * p_data, uint32_t value)
+{
+#if NRF_ATOMIC_USE_BUILD_IN
+ return __atomic_or_fetch(p_data, value, __ATOMIC_SEQ_CST);
+#elif defined(STREX_LDREX_PRESENT)
+ uint32_t old_val;
+ uint32_t new_val;
+
+ NRF_ATOMIC_OP(orr, old_val, new_val, p_data, value);
+ UNUSED_PARAMETER(old_val);
+ UNUSED_PARAMETER(new_val);
+ return new_val;
+#else
+ CRITICAL_REGION_ENTER();
+ *p_data |= value;
+ uint32_t new_value = *p_data;
+ CRITICAL_REGION_EXIT();
+ return new_value;
+#endif //NRF_ATOMIC_USE_BUILD_IN
+}
+
+uint32_t nrf_atomic_u32_fetch_and(nrf_atomic_u32_t * p_data, uint32_t value)
+{
+#if NRF_ATOMIC_USE_BUILD_IN
+ return __atomic_fetch_and(p_data, value, __ATOMIC_SEQ_CST);
+#elif defined(STREX_LDREX_PRESENT)
+ uint32_t old_val;
+ uint32_t new_val;
+
+ NRF_ATOMIC_OP(and, old_val, new_val, p_data, value);
+ UNUSED_PARAMETER(old_val);
+ UNUSED_PARAMETER(new_val);
+ return old_val;
+#else
+ CRITICAL_REGION_ENTER();
+ uint32_t old_val = *p_data;
+ *p_data &= value;
+ CRITICAL_REGION_EXIT();
+ return old_val;
+#endif //NRF_ATOMIC_USE_BUILD_IN
+}
+
+uint32_t nrf_atomic_u32_and(nrf_atomic_u32_t * p_data, uint32_t value)
+{
+#if NRF_ATOMIC_USE_BUILD_IN
+ return __atomic_and_fetch(p_data, value, __ATOMIC_SEQ_CST);
+#elif defined(STREX_LDREX_PRESENT)
+ uint32_t old_val;
+ uint32_t new_val;
+
+ NRF_ATOMIC_OP(and, old_val, new_val, p_data, value);
+ UNUSED_PARAMETER(old_val);
+ UNUSED_PARAMETER(new_val);
+ return new_val;
+#else
+ CRITICAL_REGION_ENTER();
+ *p_data &= value;
+ uint32_t new_value = *p_data;
+ CRITICAL_REGION_EXIT();
+ return new_value;
+#endif //NRF_ATOMIC_USE_BUILD_IN
+}
+
+uint32_t nrf_atomic_u32_fetch_xor(nrf_atomic_u32_t * p_data, uint32_t value)
+{
+#if NRF_ATOMIC_USE_BUILD_IN
+ return __atomic_fetch_xor(p_data, value, __ATOMIC_SEQ_CST);
+#elif defined(STREX_LDREX_PRESENT)
+ uint32_t old_val;
+ uint32_t new_val;
+
+ NRF_ATOMIC_OP(eor, old_val, new_val, p_data, value);
+ UNUSED_PARAMETER(old_val);
+ UNUSED_PARAMETER(new_val);
+ return old_val;
+#else
+ CRITICAL_REGION_ENTER();
+ uint32_t old_val = *p_data;
+ *p_data ^= value;
+ CRITICAL_REGION_EXIT();
+ return old_val;
+#endif //NRF_ATOMIC_USE_BUILD_IN
+}
+
+uint32_t nrf_atomic_u32_xor(nrf_atomic_u32_t * p_data, uint32_t value)
+{
+#if NRF_ATOMIC_USE_BUILD_IN
+ return __atomic_xor_fetch(p_data, value, __ATOMIC_SEQ_CST);
+#elif defined(STREX_LDREX_PRESENT)
+ uint32_t old_val;
+ uint32_t new_val;
+
+ NRF_ATOMIC_OP(eor, old_val, new_val, p_data, value);
+ UNUSED_PARAMETER(old_val);
+ UNUSED_PARAMETER(new_val);
+ return new_val;
+#else
+ CRITICAL_REGION_ENTER();
+ *p_data ^= value;
+ uint32_t new_value = *p_data;
+ CRITICAL_REGION_EXIT();
+ return new_value;
+#endif //NRF_ATOMIC_USE_BUILD_IN
+}
+
+uint32_t nrf_atomic_u32_fetch_add(nrf_atomic_u32_t * p_data, uint32_t value)
+{
+#if NRF_ATOMIC_USE_BUILD_IN
+ return __atomic_fetch_add(p_data, value, __ATOMIC_SEQ_CST);
+#elif defined(STREX_LDREX_PRESENT)
+ uint32_t old_val;
+ uint32_t new_val;
+
+ NRF_ATOMIC_OP(add, old_val, new_val, p_data, value);
+ UNUSED_PARAMETER(old_val);
+ UNUSED_PARAMETER(new_val);
+ return old_val;
+#else
+ CRITICAL_REGION_ENTER();
+ uint32_t old_val = *p_data;
+ *p_data += value;
+ CRITICAL_REGION_EXIT();
+ return old_val;
+#endif //NRF_ATOMIC_USE_BUILD_IN
+}
+
+uint32_t nrf_atomic_u32_add(nrf_atomic_u32_t * p_data, uint32_t value)
+{
+#if NRF_ATOMIC_USE_BUILD_IN
+ return __atomic_add_fetch(p_data, value, __ATOMIC_SEQ_CST);
+#elif defined(STREX_LDREX_PRESENT)
+ uint32_t old_val;
+ uint32_t new_val;
+
+ NRF_ATOMIC_OP(add, old_val, new_val, p_data, value);
+ UNUSED_PARAMETER(old_val);
+ UNUSED_PARAMETER(new_val);
+ return new_val;
+#else
+ CRITICAL_REGION_ENTER();
+ *p_data += value;
+ uint32_t new_value = *p_data;
+ CRITICAL_REGION_EXIT();
+ return new_value;
+#endif //NRF_ATOMIC_USE_BUILD_IN
+}
+
+uint32_t nrf_atomic_u32_fetch_sub(nrf_atomic_u32_t * p_data, uint32_t value)
+{
+#if NRF_ATOMIC_USE_BUILD_IN
+ return __atomic_fetch_sub(p_data, value, __ATOMIC_SEQ_CST);
+#elif defined(STREX_LDREX_PRESENT)
+ uint32_t old_val;
+ uint32_t new_val;
+
+ NRF_ATOMIC_OP(sub, old_val, new_val, p_data, value);
+ UNUSED_PARAMETER(old_val);
+ UNUSED_PARAMETER(new_val);
+ return old_val;
+#else
+ CRITICAL_REGION_ENTER();
+ uint32_t old_val = *p_data;
+ *p_data -= value;
+ CRITICAL_REGION_EXIT();
+ return old_val;
+#endif //NRF_ATOMIC_USE_BUILD_IN
+}
+
+uint32_t nrf_atomic_u32_sub(nrf_atomic_u32_t * p_data, uint32_t value)
+{
+#if NRF_ATOMIC_USE_BUILD_IN
+ return __atomic_sub_fetch(p_data, value, __ATOMIC_SEQ_CST);
+#elif defined(STREX_LDREX_PRESENT)
+ uint32_t old_val;
+ uint32_t new_val;
+
+ NRF_ATOMIC_OP(sub, old_val, new_val, p_data, value);
+ UNUSED_PARAMETER(old_val);
+ UNUSED_PARAMETER(new_val);
+ return new_val;
+#else
+ CRITICAL_REGION_ENTER();
+ *p_data -= value;
+ uint32_t new_value = *p_data;
+ CRITICAL_REGION_EXIT();
+ return new_value;
+#endif //NRF_ATOMIC_USE_BUILD_IN
+}
+
+bool nrf_atomic_u32_cmp_exch(nrf_atomic_u32_t * p_data,
+ uint32_t * p_expected,
+ uint32_t desired)
+{
+#if NRF_ATOMIC_USE_BUILD_IN
+ return __atomic_compare_exchange(p_data,
+ p_expected,
+ &desired,
+ 1,
+ __ATOMIC_SEQ_CST,
+ __ATOMIC_SEQ_CST);
+#elif defined(STREX_LDREX_PRESENT)
+ return nrf_atomic_internal_cmp_exch(p_data, p_expected, desired);
+#else
+ bool ret;
+ CRITICAL_REGION_ENTER();
+ if (*p_data == *p_expected)
+ {
+ *p_data = desired;
+ ret = true;
+ }
+ else
+ {
+ *p_expected = *p_data;
+ ret = false;
+ }
+ CRITICAL_REGION_EXIT();
+ return ret;
+#endif
+}
+
+uint32_t nrf_atomic_u32_fetch_sub_hs(nrf_atomic_u32_t * p_data, uint32_t value)
+{
+#if NRF_ATOMIC_USE_BUILD_IN
+ uint32_t expected = *p_data;
+ uint32_t new_val;
+ bool success;
+
+ do
+ {
+ if (expected >= value)
+ {
+ new_val = expected - value;
+ }
+ else
+ {
+ new_val = expected;
+ }
+ success = __atomic_compare_exchange(p_data,
+ &expected,
+ &new_val,
+ 1,
+ __ATOMIC_SEQ_CST,
+ __ATOMIC_SEQ_CST);
+ } while(!success);
+ return expected;
+#elif defined(STREX_LDREX_PRESENT)
+ uint32_t old_val;
+ uint32_t new_val;
+
+ NRF_ATOMIC_OP(sub_hs, old_val, new_val, p_data, value);
+ UNUSED_PARAMETER(old_val);
+ UNUSED_PARAMETER(new_val);
+ return old_val;
+#else
+ CRITICAL_REGION_ENTER();
+ uint32_t old_val = *p_data;
+ *p_data -= value;
+ CRITICAL_REGION_EXIT();
+ return old_val;
+#endif //NRF_ATOMIC_USE_BUILD_IN
+}
+
+uint32_t nrf_atomic_u32_sub_hs(nrf_atomic_u32_t * p_data, uint32_t value)
+{
+#if NRF_ATOMIC_USE_BUILD_IN
+ uint32_t expected = *p_data;
+ uint32_t new_val;
+ bool success;
+
+ do
+ {
+ if (expected >= value)
+ {
+ new_val = expected - value;
+ }
+ else
+ {
+ new_val = expected;
+ }
+ success = __atomic_compare_exchange(p_data,
+ &expected,
+ &new_val,
+ 1,
+ __ATOMIC_SEQ_CST,
+ __ATOMIC_SEQ_CST);
+ } while(!success);
+ return new_val;
+#elif defined(STREX_LDREX_PRESENT)
+ uint32_t old_val;
+ uint32_t new_val;
+
+ NRF_ATOMIC_OP(sub_hs, old_val, new_val, p_data, value);
+ UNUSED_PARAMETER(old_val);
+ UNUSED_PARAMETER(new_val);
+ return new_val;
+#else
+ CRITICAL_REGION_ENTER();
+ *p_data -= value;
+ uint32_t new_value = *p_data;
+ CRITICAL_REGION_EXIT();
+ return new_value;
+#endif //NRF_ATOMIC_USE_BUILD_IN
+}
+
+uint32_t nrf_atomic_flag_set_fetch(nrf_atomic_flag_t * p_data)
+{
+ return nrf_atomic_u32_fetch_or(p_data, 1);
+}
+
+uint32_t nrf_atomic_flag_set(nrf_atomic_flag_t * p_data)
+{
+ return nrf_atomic_u32_or(p_data, 1);
+}
+
+uint32_t nrf_atomic_flag_clear_fetch(nrf_atomic_flag_t * p_data)
+{
+ return nrf_atomic_u32_fetch_and(p_data, 0);
+}
+
+uint32_t nrf_atomic_flag_clear(nrf_atomic_flag_t * p_data)
+{
+ return nrf_atomic_u32_and(p_data, 0);
+}
+
diff --git a/third_party/NordicSemiconductor/libraries/atomic/nrf_atomic.h b/third_party/NordicSemiconductor/libraries/atomic/nrf_atomic.h
index c2c905c..137aadc 100644
--- a/third_party/NordicSemiconductor/libraries/atomic/nrf_atomic.h
+++ b/third_party/NordicSemiconductor/libraries/atomic/nrf_atomic.h
@@ -1,274 +1,274 @@
-/**
- * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-/**@file
- *
- * @defgroup nrf_atomic Atomic operations API
- * @ingroup app_common
- * @{
- *
- * @brief @tagAPI52 This module implements C11 stdatomic.h simplified API.
- At this point only Cortex-M3/M4 cores are supported (LDREX/STREX instructions).
- * Atomic types are limited to @ref nrf_atomic_u32_t and @ref nrf_atomic_flag_t.
- */
-
-#ifndef NRF_ATOMIC_H__
-#define NRF_ATOMIC_H__
-
-#include "sdk_common.h"
-
-/**
- * @brief Atomic 32 bit unsigned type
- * */
-typedef volatile uint32_t nrf_atomic_u32_t;
-
-/**
- * @brief Atomic 1 bit flag type (technically 32 bit)
- * */
-typedef volatile uint32_t nrf_atomic_flag_t;
-
-
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @brief Stores value to an atomic object
- *
- * @param[in] p_data Atomic memory pointer
- * @param[in] value Value to store
- *
- * @return Old value stored into atomic object
- * */
-uint32_t nrf_atomic_u32_fetch_store(nrf_atomic_u32_t * p_data, uint32_t value);
-
-/**
- * @brief Stores value to an atomic object
- *
- * @param[in] p_data Atomic memory pointer
- * @param[in] value Value to store
- *
- * @return New value stored into atomic object
- * */
-uint32_t nrf_atomic_u32_store(nrf_atomic_u32_t * p_data, uint32_t value);
-
-/**
- * @brief Logical OR operation on an atomic object
- *
- * @param[in] p_data Atomic memory pointer
- * @param[in] value Value of second operand OR operation
- *
- * @return Old value stored into atomic object
- * */
-uint32_t nrf_atomic_u32_fetch_or(nrf_atomic_u32_t * p_data, uint32_t value);
-
-/**
- * @brief Logical OR operation on an atomic object
- *
- * @param[in] p_data Atomic memory pointer
- * @param[in] value Value of second operand OR operation
- *
- * @return New value stored into atomic object
- * */
-uint32_t nrf_atomic_u32_or(nrf_atomic_u32_t * p_data, uint32_t value);
-
-/**
- * @brief Logical AND operation on an atomic object
- *
- * @param[in] p_data Atomic memory pointer
- * @param[in] value Value of second operand AND operation
- *
- * @return Old value stored into atomic object
- * */
-uint32_t nrf_atomic_u32_fetch_and(nrf_atomic_u32_t * p_data, uint32_t value);
-
-/**
- * @brief Logical AND operation on an atomic object
- *
- * @param[in] p_data Atomic memory pointer
- * @param[in] value Value of second operand AND operation
- *
- * @return New value stored into atomic object
- * */
-uint32_t nrf_atomic_u32_and(nrf_atomic_u32_t * p_data, uint32_t value);
-
-/**
- * @brief Logical XOR operation on an atomic object
- *
- * @param[in] p_data Atomic memory pointer
- * @param[in] value Value of second operand XOR operation
- *
- * @return Old value stored into atomic object
- * */
-uint32_t nrf_atomic_u32_fetch_xor(nrf_atomic_u32_t * p_data, uint32_t value);
-
-/**
- * @brief Logical XOR operation on an atomic object
- *
- * @param[in] p_data Atomic memory pointer
- * @param[in] value Value of second operand XOR operation
- *
- * @return New value stored into atomic object
- * */
-uint32_t nrf_atomic_u32_xor(nrf_atomic_u32_t * p_data, uint32_t value);
-
-/**
- * @brief Arithmetic ADD operation on an atomic object
- *
- * @param[in] p_data Atomic memory pointer
- * @param[in] value Value of second operand ADD operation
- *
- * @return Old value stored into atomic object
- * */
-uint32_t nrf_atomic_u32_fetch_add(nrf_atomic_u32_t * p_data, uint32_t value);
-
-/**
- * @brief Arithmetic ADD operation on an atomic object
- *
- * @param[in] p_data Atomic memory pointer
- * @param[in] value Value of second operand ADD operation
- *
- * @return New value stored into atomic object
- * */
-uint32_t nrf_atomic_u32_add(nrf_atomic_u32_t * p_data, uint32_t value);
-
-/**
- * @brief Arithmetic SUB operation on an atomic object
- *
- * @param[in] p_data Atomic memory pointer
- * @param[in] value Value of second operand SUB operation
- *
- * @return Old value stored into atomic object
- * */
-uint32_t nrf_atomic_u32_fetch_sub(nrf_atomic_u32_t * p_data, uint32_t value);
-
-/**
- * @brief Arithmetic SUB operation on an atomic object
- *
- * @param[in] p_data Atomic memory pointer
- * @param[in] value Value of second operand SUB operation
- *
- * @return New value stored into atomic object
- * */
-uint32_t nrf_atomic_u32_sub(nrf_atomic_u32_t * p_data, uint32_t value);
-
-/**
- * @brief If value at pointer is equal to expected value, changes value at pointer to desired
- *
- * Atomically compares the value pointed to by p_data with the value pointed to by p_expected,
- * and if those are equal, replaces the former with desired. Otherwise, loads the actual value
- * pointed to by p_data into *p_expected.
- *
- * @param p_data Atomic memory pointer to test and modify.
- * @param p_expected Pointer to test value.
- * @param desired Value to be stored to atomic memory.
- *
- * @retval true *p_data was equal to *p_expected
- * @retval false *p_data was not equal to *p_expected
- */
-bool nrf_atomic_u32_cmp_exch(nrf_atomic_u32_t * p_data,
- uint32_t * p_expected,
- uint32_t desired);
-
-/**
- * @brief Arithmetic SUB operation on an atomic object performed if object >= value.
- *
- * @param[in] p_data Atomic memory pointer
- * @param[in] value Value of second operand SUB operation
- *
- * @return Old value stored into atomic object
- * */
-uint32_t nrf_atomic_u32_fetch_sub_hs(nrf_atomic_u32_t * p_data, uint32_t value);
-
-/**
- * @brief Arithmetic SUB operation on an atomic object performed if object >= value.
- *
- * @param[in] p_data Atomic memory pointer
- * @param[in] value Value of second operand SUB operation
- *
- * @return New value stored into atomic object
- * */
-uint32_t nrf_atomic_u32_sub_hs(nrf_atomic_u32_t * p_data, uint32_t value);
-
-/**************************************************************************************************/
-
-/**
- * @brief Logic one bit flag set operation on an atomic object
- *
- * @param[in] p_data Atomic flag memory pointer
- *
- * @return Old flag value
- * */
-uint32_t nrf_atomic_flag_set_fetch(nrf_atomic_flag_t * p_data);
-
-/**
- * @brief Logic one bit flag set operation on an atomic object
- *
- * @param[in] p_data Atomic flag memory pointer
- *
- * @return New flag value
- * */
-uint32_t nrf_atomic_flag_set(nrf_atomic_flag_t * p_data);
-
-/**
- * @brief Logic one bit flag clear operation on an atomic object
- *
- * @param[in] p_data Atomic flag memory pointer
- *
- * @return Old flag value
- * */
-uint32_t nrf_atomic_flag_clear_fetch(nrf_atomic_flag_t * p_data);
-
-/**
- * @brief Logic one bit flag clear operation on an atomic object
- *
- * @param[in] p_data Atomic flag memory pointer
- *
- * @return New flag value
- * */
-uint32_t nrf_atomic_flag_clear(nrf_atomic_flag_t * p_data);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* NRF_ATOMIC_H__ */
-
-/** @} */
+/**
+ * Copyright (c) 2016 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/**@file
+ *
+ * @defgroup nrf_atomic Atomic operations API
+ * @ingroup app_common
+ * @{
+ *
+ * @brief @tagAPI52 This module implements C11 stdatomic.h simplified API.
+ At this point only Cortex-M3/M4 cores are supported (LDREX/STREX instructions).
+ * Atomic types are limited to @ref nrf_atomic_u32_t and @ref nrf_atomic_flag_t.
+ */
+
+#ifndef NRF_ATOMIC_H__
+#define NRF_ATOMIC_H__
+
+#include "sdk_common.h"
+
+/**
+ * @brief Atomic 32 bit unsigned type
+ * */
+typedef volatile uint32_t nrf_atomic_u32_t;
+
+/**
+ * @brief Atomic 1 bit flag type (technically 32 bit)
+ * */
+typedef volatile uint32_t nrf_atomic_flag_t;
+
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Stores value to an atomic object
+ *
+ * @param[in] p_data Atomic memory pointer
+ * @param[in] value Value to store
+ *
+ * @return Old value stored into atomic object
+ * */
+uint32_t nrf_atomic_u32_fetch_store(nrf_atomic_u32_t * p_data, uint32_t value);
+
+/**
+ * @brief Stores value to an atomic object
+ *
+ * @param[in] p_data Atomic memory pointer
+ * @param[in] value Value to store
+ *
+ * @return New value stored into atomic object
+ * */
+uint32_t nrf_atomic_u32_store(nrf_atomic_u32_t * p_data, uint32_t value);
+
+/**
+ * @brief Logical OR operation on an atomic object
+ *
+ * @param[in] p_data Atomic memory pointer
+ * @param[in] value Value of second operand OR operation
+ *
+ * @return Old value stored into atomic object
+ * */
+uint32_t nrf_atomic_u32_fetch_or(nrf_atomic_u32_t * p_data, uint32_t value);
+
+/**
+ * @brief Logical OR operation on an atomic object
+ *
+ * @param[in] p_data Atomic memory pointer
+ * @param[in] value Value of second operand OR operation
+ *
+ * @return New value stored into atomic object
+ * */
+uint32_t nrf_atomic_u32_or(nrf_atomic_u32_t * p_data, uint32_t value);
+
+/**
+ * @brief Logical AND operation on an atomic object
+ *
+ * @param[in] p_data Atomic memory pointer
+ * @param[in] value Value of second operand AND operation
+ *
+ * @return Old value stored into atomic object
+ * */
+uint32_t nrf_atomic_u32_fetch_and(nrf_atomic_u32_t * p_data, uint32_t value);
+
+/**
+ * @brief Logical AND operation on an atomic object
+ *
+ * @param[in] p_data Atomic memory pointer
+ * @param[in] value Value of second operand AND operation
+ *
+ * @return New value stored into atomic object
+ * */
+uint32_t nrf_atomic_u32_and(nrf_atomic_u32_t * p_data, uint32_t value);
+
+/**
+ * @brief Logical XOR operation on an atomic object
+ *
+ * @param[in] p_data Atomic memory pointer
+ * @param[in] value Value of second operand XOR operation
+ *
+ * @return Old value stored into atomic object
+ * */
+uint32_t nrf_atomic_u32_fetch_xor(nrf_atomic_u32_t * p_data, uint32_t value);
+
+/**
+ * @brief Logical XOR operation on an atomic object
+ *
+ * @param[in] p_data Atomic memory pointer
+ * @param[in] value Value of second operand XOR operation
+ *
+ * @return New value stored into atomic object
+ * */
+uint32_t nrf_atomic_u32_xor(nrf_atomic_u32_t * p_data, uint32_t value);
+
+/**
+ * @brief Arithmetic ADD operation on an atomic object
+ *
+ * @param[in] p_data Atomic memory pointer
+ * @param[in] value Value of second operand ADD operation
+ *
+ * @return Old value stored into atomic object
+ * */
+uint32_t nrf_atomic_u32_fetch_add(nrf_atomic_u32_t * p_data, uint32_t value);
+
+/**
+ * @brief Arithmetic ADD operation on an atomic object
+ *
+ * @param[in] p_data Atomic memory pointer
+ * @param[in] value Value of second operand ADD operation
+ *
+ * @return New value stored into atomic object
+ * */
+uint32_t nrf_atomic_u32_add(nrf_atomic_u32_t * p_data, uint32_t value);
+
+/**
+ * @brief Arithmetic SUB operation on an atomic object
+ *
+ * @param[in] p_data Atomic memory pointer
+ * @param[in] value Value of second operand SUB operation
+ *
+ * @return Old value stored into atomic object
+ * */
+uint32_t nrf_atomic_u32_fetch_sub(nrf_atomic_u32_t * p_data, uint32_t value);
+
+/**
+ * @brief Arithmetic SUB operation on an atomic object
+ *
+ * @param[in] p_data Atomic memory pointer
+ * @param[in] value Value of second operand SUB operation
+ *
+ * @return New value stored into atomic object
+ * */
+uint32_t nrf_atomic_u32_sub(nrf_atomic_u32_t * p_data, uint32_t value);
+
+/**
+ * @brief If value at pointer is equal to expected value, changes value at pointer to desired
+ *
+ * Atomically compares the value pointed to by p_data with the value pointed to by p_expected,
+ * and if those are equal, replaces the former with desired. Otherwise, loads the actual value
+ * pointed to by p_data into *p_expected.
+ *
+ * @param p_data Atomic memory pointer to test and modify.
+ * @param p_expected Pointer to test value.
+ * @param desired Value to be stored to atomic memory.
+ *
+ * @retval true *p_data was equal to *p_expected
+ * @retval false *p_data was not equal to *p_expected
+ */
+bool nrf_atomic_u32_cmp_exch(nrf_atomic_u32_t * p_data,
+ uint32_t * p_expected,
+ uint32_t desired);
+
+/**
+ * @brief Arithmetic SUB operation on an atomic object performed if object >= value.
+ *
+ * @param[in] p_data Atomic memory pointer
+ * @param[in] value Value of second operand SUB operation
+ *
+ * @return Old value stored into atomic object
+ * */
+uint32_t nrf_atomic_u32_fetch_sub_hs(nrf_atomic_u32_t * p_data, uint32_t value);
+
+/**
+ * @brief Arithmetic SUB operation on an atomic object performed if object >= value.
+ *
+ * @param[in] p_data Atomic memory pointer
+ * @param[in] value Value of second operand SUB operation
+ *
+ * @return New value stored into atomic object
+ * */
+uint32_t nrf_atomic_u32_sub_hs(nrf_atomic_u32_t * p_data, uint32_t value);
+
+/**************************************************************************************************/
+
+/**
+ * @brief Logic one bit flag set operation on an atomic object
+ *
+ * @param[in] p_data Atomic flag memory pointer
+ *
+ * @return Old flag value
+ * */
+uint32_t nrf_atomic_flag_set_fetch(nrf_atomic_flag_t * p_data);
+
+/**
+ * @brief Logic one bit flag set operation on an atomic object
+ *
+ * @param[in] p_data Atomic flag memory pointer
+ *
+ * @return New flag value
+ * */
+uint32_t nrf_atomic_flag_set(nrf_atomic_flag_t * p_data);
+
+/**
+ * @brief Logic one bit flag clear operation on an atomic object
+ *
+ * @param[in] p_data Atomic flag memory pointer
+ *
+ * @return Old flag value
+ * */
+uint32_t nrf_atomic_flag_clear_fetch(nrf_atomic_flag_t * p_data);
+
+/**
+ * @brief Logic one bit flag clear operation on an atomic object
+ *
+ * @param[in] p_data Atomic flag memory pointer
+ *
+ * @return New flag value
+ * */
+uint32_t nrf_atomic_flag_clear(nrf_atomic_flag_t * p_data);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* NRF_ATOMIC_H__ */
+
+/** @} */
diff --git a/third_party/NordicSemiconductor/libraries/atomic/nrf_atomic_internal.h b/third_party/NordicSemiconductor/libraries/atomic/nrf_atomic_internal.h
index 5df87aa..ab114f6 100644
--- a/third_party/NordicSemiconductor/libraries/atomic/nrf_atomic_internal.h
+++ b/third_party/NordicSemiconductor/libraries/atomic/nrf_atomic_internal.h
@@ -1,343 +1,343 @@
-/**
- * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-#ifndef NRF_ATOMIC_INTERNAL_H__
-#define NRF_ATOMIC_INTERNAL_H__
-
-#include "sdk_common.h"
-#include <stdbool.h>
-#include <stdint.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- *
- * @defgroup nrf_atomic_internal Atomic operations internals
- * @ingroup nrf_atomic
- * @{
- *
- */
-
-/* Only Cortex M cores > 3 support LDREX/STREX instructions*/
-#if ((__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)) == 0
-#error "Unsupported core version"
-#endif
-
-#if defined ( __CC_ARM )
-static __asm uint32_t nrf_atomic_internal_mov(nrf_atomic_u32_t * p_ptr,
- uint32_t value,
- uint32_t * p_new)
-{
- /* The base standard provides for passing arguments in core registers (r0-r3) and on the stack.
- * Registers r4 and r5 have to be saved on stack. Note that only even number of register push are
- * allowed. This is a requirement of the Procedure Call Standard for the ARM Architecture [AAPCS].
- * */
- push {r4, r5}
- mov r4, r0
-
-loop_mov
- ldrex r0, [r4]
- mov r5, r1
- strex r3, r5, [r4]
- cmp r3, #0
- bne loop_mov
-
- str r5, [r2]
- pop {r4, r5}
- bx lr
-}
-
-
-static __asm uint32_t nrf_atomic_internal_orr(nrf_atomic_u32_t * p_ptr,
- uint32_t value,
- uint32_t * p_new)
-{
- push {r4, r5}
- mov r4, r0
-
-loop_orr
- ldrex r0, [r4]
- orr r5, r0, r1
- strex r3, r5, [r4]
- cmp r3, #0
- bne loop_orr
-
- str r5, [r2]
- pop {r4, r5}
- bx lr
-}
-
-static __asm uint32_t nrf_atomic_internal_and(nrf_atomic_u32_t * p_ptr,
- uint32_t value,
- uint32_t * p_new)
-{
- push {r4, r5}
- mov r4, r0
-
-loop_and
- ldrex r0, [r4]
- and r5, r0, r1
- strex r3, r5, [r4]
- cmp r3, #0
- bne loop_and
-
- str r5, [r2]
- pop {r4, r5}
- bx lr
-}
-
-static __asm uint32_t nrf_atomic_internal_eor(nrf_atomic_u32_t * p_ptr,
- uint32_t value,
- uint32_t * p_new)
-{
- push {r4, r5}
- mov r4, r0
-
-loop_eor
- ldrex r0, [r4]
- eor r5, r0, r1
- strex r3, r5, [r4]
- cmp r3, #0
- bne loop_eor
-
- str r5, [r2]
- pop {r4, r5}
- bx lr
-}
-
-static __asm uint32_t nrf_atomic_internal_add(nrf_atomic_u32_t * p_ptr,
- uint32_t value,
- uint32_t * p_new)
-{
- push {r4, r5}
- mov r4, r0
-
-loop_add
- ldrex r0, [r4]
- add r5, r0, r1
- strex r3, r5, [r4]
- cmp r3, #0
- bne loop_add
-
- str r5, [r2]
- pop {r4, r5}
- bx lr
-}
-
-static __asm uint32_t nrf_atomic_internal_sub(nrf_atomic_u32_t * p_ptr,
- uint32_t value,
- uint32_t * p_new)
-{
- push {r4, r5}
- mov r4, r0
-
-loop_sub
- ldrex r0, [r4]
- sub r5, r0, r1
- strex r3, r5, [r4]
- cmp r3, #0
- bne loop_sub
-
- str r5, [r2]
- pop {r4, r5}
- bx lr
-}
-
-static __asm bool nrf_atomic_internal_cmp_exch(nrf_atomic_u32_t * p_data,
- uint32_t * p_expected,
- uint32_t value)
-{
-#define RET_REG r0
-#define P_EXPC r1
-#define VALUE r2
-#define STR_RES r3
-#define P_DATA r4
-#define EXPC_VAL r5
-#define ACT_VAL r6
-
- push {r4-r6}
- mov P_DATA, r0
- mov RET_REG, #0
-
-loop_cmp_exch
- ldrex ACT_VAL, [P_DATA]
- ldr EXPC_VAL, [P_EXPC]
- cmp ACT_VAL, EXPC_VAL
- ittee eq
- strexeq STR_RES, VALUE, [P_DATA]
- moveq RET_REG, #1
- strexne STR_RES, ACT_VAL, [P_DATA]
- strne ACT_VAL, [P_EXPC]
- cmp STR_RES, #0
- itt ne
- movne RET_REG, #0
- bne loop_cmp_exch
-
- pop {r4-r6}
- bx lr
-
-#undef RET_REG
-#undef P_EXPC
-#undef VALUE
-#undef STR_RES
-#undef P_DATA
-#undef EXPC_VAL
-#undef ACT_VAL
-}
-
-static __asm uint32_t nrf_atomic_internal_sub_hs(nrf_atomic_u32_t * p_ptr,
- uint32_t value,
- uint32_t * p_new)
-{
- push {r4, r5}
- mov r4, r0
-
-loop_sub_ge
- ldrex r0, [r4]
- cmp r0, r1
- ite hs
- subhs r5, r0, r1
- movlo r5, r0
- strex r3, r5, [r4]
- cmp r3, #0
- bne loop_sub_ge
-
- str r5, [r2]
- pop {r4, r5}
- bx lr
-}
-
-
-#define NRF_ATOMIC_OP(asm_op, old_val, new_val, ptr, value) \
- old_val = nrf_atomic_internal_##asm_op(ptr, value, &new_val)
-
-#elif defined ( __ICCARM__ ) || defined ( __GNUC__ )
-
-/**
- * @brief Atomic operation generic macro
- * @param[in] asm_op operation: mov, orr, and, eor, add, sub
- * @param[out] old_val atomic object output (uint32_t), value before operation
- * @param[out] new_val atomic object output (uint32_t), value after operation
- * @param[in] value atomic operation operand
- * */
-#define NRF_ATOMIC_OP(asm_op, old_val, new_val, ptr, value) \
-{ \
- uint32_t str_res; \
- __ASM volatile( \
- "1: ldrex %["#old_val"], [%["#ptr"]]\n" \
- NRF_ATOMIC_OP_##asm_op(new_val, old_val, value) \
- " strex %[str_res], %["#new_val"], [%["#ptr"]]\n" \
- " teq %[str_res], #0\n" \
- " bne.n 1b" \
- : \
- [old_val]"=&r" (old_val), \
- [new_val]"=&r" (new_val), \
- [str_res]"=&r" (str_res) \
- : \
- [ptr]"r" (ptr), \
- [value]"r" (value) \
- : "cc"); \
- UNUSED_PARAMETER(str_res); \
-}
-
-#define NRF_ATOMIC_OP_mov(new_val, old_val, value) "mov %["#new_val"], %["#value"]\n"
-#define NRF_ATOMIC_OP_orr(new_val, old_val, value) "orr %["#new_val"], %["#old_val"], %["#value"]\n"
-#define NRF_ATOMIC_OP_and(new_val, old_val, value) "and %["#new_val"], %["#old_val"], %["#value"]\n"
-#define NRF_ATOMIC_OP_eor(new_val, old_val, value) "eor %["#new_val"], %["#old_val"], %["#value"]\n"
-#define NRF_ATOMIC_OP_add(new_val, old_val, value) "add %["#new_val"], %["#old_val"], %["#value"]\n"
-#define NRF_ATOMIC_OP_sub(new_val, old_val, value) "sub %["#new_val"], %["#old_val"], %["#value"]\n"
-#define NRF_ATOMIC_OP_sub_hs(new_val, old_val, value) \
- "cmp %["#old_val"], %["#value"]\n " \
- "ite hs\n" \
- "subhs %["#new_val"], %["#old_val"], %["#value"]\n" \
- "movlo %["#new_val"], %["#old_val"]\n"
-
-static inline bool nrf_atomic_internal_cmp_exch(nrf_atomic_u32_t * p_data,
- uint32_t * p_expected,
- uint32_t value)
-{
- bool res = false;
- uint32_t str_res = 0;
- uint32_t act_val = 0;
- uint32_t exp_val = 0;
- UNUSED_VARIABLE(str_res);
- UNUSED_VARIABLE(act_val);
- UNUSED_VARIABLE(exp_val);
- __ASM volatile(
- "1: ldrex %[act_val], [%[ptr]]\n"
- " ldr %[exp_val], [%[expc]]\n"
- " cmp %[act_val], %[exp_val]\n"
- " ittee eq\n"
- " strexeq %[str_res], %[value], [%[ptr]]\n"
- " moveq %[res], #1\n"
- " strexne %[str_res], %[act_val], [%[ptr]]\n"
- " strne %[act_val], [%[expc]]\n"
- " cmp %[str_res], #0\n"
- " itt ne\n"
- " movne %[res], #0\n"
- " bne.n 1b"
- :
- [res] "=&r" (res),
- [exp_val] "=&r" (exp_val),
- [act_val] "=&r" (act_val),
- [str_res] "=&r" (str_res)
- :
- "0" (res),
- "1" (exp_val),
- "2" (act_val),
- [expc] "r" (p_expected),
- [ptr] "r" (p_data),
- [value] "r" (value)
- : "cc");
- return res;
-}
-
-#else
-#error "Unsupported compiler"
-#endif
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* NRF_ATOMIC_INTERNAL_H__ */
-
-/** @} */
+/**
+ * Copyright (c) 2016 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#ifndef NRF_ATOMIC_INTERNAL_H__
+#define NRF_ATOMIC_INTERNAL_H__
+
+#include "sdk_common.h"
+#include <stdbool.h>
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ *
+ * @defgroup nrf_atomic_internal Atomic operations internals
+ * @ingroup nrf_atomic
+ * @{
+ *
+ */
+
+/* Only Cortex M cores > 3 support LDREX/STREX instructions*/
+#if ((__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)) == 0
+#error "Unsupported core version"
+#endif
+
+#if defined ( __CC_ARM )
+static __asm uint32_t nrf_atomic_internal_mov(nrf_atomic_u32_t * p_ptr,
+ uint32_t value,
+ uint32_t * p_new)
+{
+ /* The base standard provides for passing arguments in core registers (r0-r3) and on the stack.
+ * Registers r4 and r5 have to be saved on stack. Note that only even number of register push are
+ * allowed. This is a requirement of the Procedure Call Standard for the ARM Architecture [AAPCS].
+ * */
+ push {r4, r5}
+ mov r4, r0
+
+loop_mov
+ ldrex r0, [r4]
+ mov r5, r1
+ strex r3, r5, [r4]
+ cmp r3, #0
+ bne loop_mov
+
+ str r5, [r2]
+ pop {r4, r5}
+ bx lr
+}
+
+
+static __asm uint32_t nrf_atomic_internal_orr(nrf_atomic_u32_t * p_ptr,
+ uint32_t value,
+ uint32_t * p_new)
+{
+ push {r4, r5}
+ mov r4, r0
+
+loop_orr
+ ldrex r0, [r4]
+ orr r5, r0, r1
+ strex r3, r5, [r4]
+ cmp r3, #0
+ bne loop_orr
+
+ str r5, [r2]
+ pop {r4, r5}
+ bx lr
+}
+
+static __asm uint32_t nrf_atomic_internal_and(nrf_atomic_u32_t * p_ptr,
+ uint32_t value,
+ uint32_t * p_new)
+{
+ push {r4, r5}
+ mov r4, r0
+
+loop_and
+ ldrex r0, [r4]
+ and r5, r0, r1
+ strex r3, r5, [r4]
+ cmp r3, #0
+ bne loop_and
+
+ str r5, [r2]
+ pop {r4, r5}
+ bx lr
+}
+
+static __asm uint32_t nrf_atomic_internal_eor(nrf_atomic_u32_t * p_ptr,
+ uint32_t value,
+ uint32_t * p_new)
+{
+ push {r4, r5}
+ mov r4, r0
+
+loop_eor
+ ldrex r0, [r4]
+ eor r5, r0, r1
+ strex r3, r5, [r4]
+ cmp r3, #0
+ bne loop_eor
+
+ str r5, [r2]
+ pop {r4, r5}
+ bx lr
+}
+
+static __asm uint32_t nrf_atomic_internal_add(nrf_atomic_u32_t * p_ptr,
+ uint32_t value,
+ uint32_t * p_new)
+{
+ push {r4, r5}
+ mov r4, r0
+
+loop_add
+ ldrex r0, [r4]
+ add r5, r0, r1
+ strex r3, r5, [r4]
+ cmp r3, #0
+ bne loop_add
+
+ str r5, [r2]
+ pop {r4, r5}
+ bx lr
+}
+
+static __asm uint32_t nrf_atomic_internal_sub(nrf_atomic_u32_t * p_ptr,
+ uint32_t value,
+ uint32_t * p_new)
+{
+ push {r4, r5}
+ mov r4, r0
+
+loop_sub
+ ldrex r0, [r4]
+ sub r5, r0, r1
+ strex r3, r5, [r4]
+ cmp r3, #0
+ bne loop_sub
+
+ str r5, [r2]
+ pop {r4, r5}
+ bx lr
+}
+
+static __asm bool nrf_atomic_internal_cmp_exch(nrf_atomic_u32_t * p_data,
+ uint32_t * p_expected,
+ uint32_t value)
+{
+#define RET_REG r0
+#define P_EXPC r1
+#define VALUE r2
+#define STR_RES r3
+#define P_DATA r4
+#define EXPC_VAL r5
+#define ACT_VAL r6
+
+ push {r4-r6}
+ mov P_DATA, r0
+ mov RET_REG, #0
+
+loop_cmp_exch
+ ldrex ACT_VAL, [P_DATA]
+ ldr EXPC_VAL, [P_EXPC]
+ cmp ACT_VAL, EXPC_VAL
+ ittee eq
+ strexeq STR_RES, VALUE, [P_DATA]
+ moveq RET_REG, #1
+ strexne STR_RES, ACT_VAL, [P_DATA]
+ strne ACT_VAL, [P_EXPC]
+ cmp STR_RES, #0
+ itt ne
+ movne RET_REG, #0
+ bne loop_cmp_exch
+
+ pop {r4-r6}
+ bx lr
+
+#undef RET_REG
+#undef P_EXPC
+#undef VALUE
+#undef STR_RES
+#undef P_DATA
+#undef EXPC_VAL
+#undef ACT_VAL
+}
+
+static __asm uint32_t nrf_atomic_internal_sub_hs(nrf_atomic_u32_t * p_ptr,
+ uint32_t value,
+ uint32_t * p_new)
+{
+ push {r4, r5}
+ mov r4, r0
+
+loop_sub_ge
+ ldrex r0, [r4]
+ cmp r0, r1
+ ite hs
+ subhs r5, r0, r1
+ movlo r5, r0
+ strex r3, r5, [r4]
+ cmp r3, #0
+ bne loop_sub_ge
+
+ str r5, [r2]
+ pop {r4, r5}
+ bx lr
+}
+
+
+#define NRF_ATOMIC_OP(asm_op, old_val, new_val, ptr, value) \
+ old_val = nrf_atomic_internal_##asm_op(ptr, value, &new_val)
+
+#elif defined ( __ICCARM__ ) || defined ( __GNUC__ )
+
+/**
+ * @brief Atomic operation generic macro
+ * @param[in] asm_op operation: mov, orr, and, eor, add, sub
+ * @param[out] old_val atomic object output (uint32_t), value before operation
+ * @param[out] new_val atomic object output (uint32_t), value after operation
+ * @param[in] value atomic operation operand
+ * */
+#define NRF_ATOMIC_OP(asm_op, old_val, new_val, ptr, value) \
+{ \
+ uint32_t str_res; \
+ __ASM volatile( \
+ "1: ldrex %["#old_val"], [%["#ptr"]]\n" \
+ NRF_ATOMIC_OP_##asm_op(new_val, old_val, value) \
+ " strex %[str_res], %["#new_val"], [%["#ptr"]]\n" \
+ " teq %[str_res], #0\n" \
+ " bne.n 1b" \
+ : \
+ [old_val]"=&r" (old_val), \
+ [new_val]"=&r" (new_val), \
+ [str_res]"=&r" (str_res) \
+ : \
+ [ptr]"r" (ptr), \
+ [value]"r" (value) \
+ : "cc"); \
+ UNUSED_PARAMETER(str_res); \
+}
+
+#define NRF_ATOMIC_OP_mov(new_val, old_val, value) "mov %["#new_val"], %["#value"]\n"
+#define NRF_ATOMIC_OP_orr(new_val, old_val, value) "orr %["#new_val"], %["#old_val"], %["#value"]\n"
+#define NRF_ATOMIC_OP_and(new_val, old_val, value) "and %["#new_val"], %["#old_val"], %["#value"]\n"
+#define NRF_ATOMIC_OP_eor(new_val, old_val, value) "eor %["#new_val"], %["#old_val"], %["#value"]\n"
+#define NRF_ATOMIC_OP_add(new_val, old_val, value) "add %["#new_val"], %["#old_val"], %["#value"]\n"
+#define NRF_ATOMIC_OP_sub(new_val, old_val, value) "sub %["#new_val"], %["#old_val"], %["#value"]\n"
+#define NRF_ATOMIC_OP_sub_hs(new_val, old_val, value) \
+ "cmp %["#old_val"], %["#value"]\n " \
+ "ite hs\n" \
+ "subhs %["#new_val"], %["#old_val"], %["#value"]\n" \
+ "movlo %["#new_val"], %["#old_val"]\n"
+
+static inline bool nrf_atomic_internal_cmp_exch(nrf_atomic_u32_t * p_data,
+ uint32_t * p_expected,
+ uint32_t value)
+{
+ bool res = false;
+ uint32_t str_res = 0;
+ uint32_t act_val = 0;
+ uint32_t exp_val = 0;
+ UNUSED_VARIABLE(str_res);
+ UNUSED_VARIABLE(act_val);
+ UNUSED_VARIABLE(exp_val);
+ __ASM volatile(
+ "1: ldrex %[act_val], [%[ptr]]\n"
+ " ldr %[exp_val], [%[expc]]\n"
+ " cmp %[act_val], %[exp_val]\n"
+ " ittee eq\n"
+ " strexeq %[str_res], %[value], [%[ptr]]\n"
+ " moveq %[res], #1\n"
+ " strexne %[str_res], %[act_val], [%[ptr]]\n"
+ " strne %[act_val], [%[expc]]\n"
+ " cmp %[str_res], #0\n"
+ " itt ne\n"
+ " movne %[res], #0\n"
+ " bne.n 1b"
+ :
+ [res] "=&r" (res),
+ [exp_val] "=&r" (exp_val),
+ [act_val] "=&r" (act_val),
+ [str_res] "=&r" (str_res)
+ :
+ "0" (res),
+ "1" (exp_val),
+ "2" (act_val),
+ [expc] "r" (p_expected),
+ [ptr] "r" (p_data),
+ [value] "r" (value)
+ : "cc");
+ return res;
+}
+
+#else
+#error "Unsupported compiler"
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* NRF_ATOMIC_INTERNAL_H__ */
+
+/** @} */
diff --git a/third_party/NordicSemiconductor/libraries/block_dev/nrf_block_dev.h b/third_party/NordicSemiconductor/libraries/block_dev/nrf_block_dev.h
new file mode 100644
index 0000000..0f57d92
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/block_dev/nrf_block_dev.h
@@ -0,0 +1,352 @@
+/**
+ * Copyright (c) 2016 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#ifndef NRF_BLOCK_DEV_H__
+#define NRF_BLOCK_DEV_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "sdk_common.h"
+#include "nrf_assert.h"
+
+#include <stddef.h>
+
+/**@file
+ *
+ * @defgroup nrf_block_dev Block device
+ * @{
+ * @ingroup app_common
+ *
+ * @brief This module implements unified block device API. It could used as a middle layer between
+ * filesystems and memories.
+ */
+
+/**
+ * @brief Block device request descriptor item.
+ */
+typedef struct {
+ uint32_t blk_id; //!< Block ID
+ uint32_t blk_count; //!< Block count
+ void * p_buff; //!< Data buffer
+} nrf_block_req_t;
+
+
+/**
+ * @brief Helper macro to create block device read/write request item
+ *
+ * @param name Instance name
+ * @param block_start Block number start
+ * @param block_count Number of blocks
+ * @param buff Buffer to read/write
+ */
+#define NRF_BLOCK_DEV_REQUEST(name, block_start, block_count, buff) \
+ nrf_block_req_t name = { \
+ .blk_id = block_start, \
+ .blk_count = block_count, \
+ .p_buff = buff, \
+ }
+/**
+ * @brief Block device events.
+ *
+ * Events are propagated when event handler is defined (@ref nrf_blk_dev_init)
+ *
+ */
+typedef enum {
+ NRF_BLOCK_DEV_EVT_INIT, /**< Passed to event handler when init is done*/
+ NRF_BLOCK_DEV_EVT_UNINIT, /**< Passed to event handler when uninit is done*/
+ NRF_BLOCK_DEV_EVT_BLK_READ_DONE, /**< Passed to event handler block read operation is done*/
+ NRF_BLOCK_DEV_EVT_BLK_WRITE_DONE, /**< Passed to event handler block write operation is done*/
+} nrf_block_dev_event_type_t;
+
+typedef enum {
+ NRF_BLOCK_DEV_RESULT_SUCCESS = 0, /**< Operation completed succsefully*/
+ NRF_BLOCK_DEV_RESULT_IO_ERROR, /**< I/O error*/
+ NRF_BLOCK_DEV_RESULT_TIMEOUT, /**< Device timeout*/
+} nrf_block_dev_result_t;
+
+/**
+ * @brief Block device event
+ * */
+typedef struct {
+ nrf_block_dev_event_type_t ev_type; //!< Event type
+ nrf_block_dev_result_t result; //!< Operation status
+ nrf_block_req_t const * p_blk_req; //!< Block request
+ void const * p_context; //!< Event context
+} nrf_block_dev_event_t;
+
+struct nrf_block_dev_s;
+
+/**
+ * @brief Block device event handler.
+ *
+ * @param[in] p_blk_dev Block device handle
+ * @param[in] p_event Block device event
+ */
+typedef void (* nrf_block_dev_ev_handler)(struct nrf_block_dev_s const * p_blk_dev,
+ nrf_block_dev_event_t const * p_event);
+
+/**
+ * @brief Block device geometry
+ */
+typedef struct {
+ uint32_t blk_count; //!< Block count
+ uint32_t blk_size; //!< Block size
+} nrf_block_dev_geometry_t;
+
+/**
+ * @brief Block device information strings
+ */
+typedef struct {
+ const char * p_vendor; //!< Vendor string
+ const char * p_product; //!< Product string
+ const char * p_revision; //!< Revision string
+} nrf_block_dev_info_strings_t;
+
+/**
+ * @brief Block device information config
+ *
+ * @param vendor Vendor string
+ * @param product Product string
+ * @param revision Revision string
+ * */
+#define NFR_BLOCK_DEV_INFO_CONFIG(vendor, product, revision) ( { \
+ .p_vendor = vendor, \
+ .p_product = product, \
+ .p_revision = revision, \
+})
+
+/**
+ * @brief Empty info string initializer
+ * */
+#define NFR_BLOCK_DEV_INFO_CONFIG_EMPTY \
+ NFR_BLOCK_DEV_INFO_CONFIG(NULL, NULL, NULL)
+
+/**
+ * @brief Block device IOCTL requests
+ */
+typedef enum {
+ NRF_BLOCK_DEV_IOCTL_REQ_CACHE_FLUSH = 0, /**< Cache flush IOCTL request*/
+ NRF_BLOCK_DEV_IOCTL_REQ_INFO_STRINGS, /**< Get info strings IOCTL request*/
+} nrf_block_dev_ioctl_req_t;
+
+
+/**
+ * @brief Helper macro to get block device address from specific instance
+ *
+ * @param instance Block device instance
+ * @param member Block device member name
+ * */
+#define NRF_BLOCKDEV_BASE_ADDR(instance, member) &(instance).member
+
+/**
+ * @brief Block device API
+ * */
+typedef struct nrf_block_dev_s {
+ struct nrf_block_dev_ops_s {
+ /**
+ * @brief @ref nrf_blk_dev_init
+ */
+ ret_code_t (*init)(struct nrf_block_dev_s const * p_blk_dev,
+ nrf_block_dev_ev_handler ev_handler,
+ void const * p_context);
+
+ /**
+ * @brief @ref nrf_blk_dev_uninit
+ */
+ ret_code_t (*uninit)(struct nrf_block_dev_s const * p_blk_dev);
+
+ /**
+ * @brief @ref nrf_blk_dev_read_req
+ */
+ ret_code_t (*read_req)(struct nrf_block_dev_s const * p_blk_dev,
+ nrf_block_req_t const * p_blk);
+
+ /**
+ * @brief @ref nrf_blk_dev_write_req
+ */
+ ret_code_t (*write_req)(struct nrf_block_dev_s const * p_blk_dev,
+ nrf_block_req_t const * p_blk);
+
+ /**
+ * @brief @ref nrf_blk_dev_ioctl
+ */
+ ret_code_t (*ioctl)(struct nrf_block_dev_s const * p_blk_dev,
+ nrf_block_dev_ioctl_req_t req,
+ void * p_data);
+
+ /**
+ * @brief @ref nrf_blk_dev_geometry
+ */
+ nrf_block_dev_geometry_t const * (*geometry)(struct nrf_block_dev_s const * p_blk_dev);
+ } const * p_ops;
+} nrf_block_dev_t;
+
+/**
+ * @brief Internals of @ref nrf_block_dev_t
+ * */
+typedef struct nrf_block_dev_ops_s nrf_block_dev_ops_t;
+
+/**
+ * @brief Initializes a block device.
+ *
+ * @param[in] p_blk_dev Block device handle
+ * @param[in] ev_handler Event handler (pass NULL to work in synchronous mode)
+ * @param[in] p_context Context passed to event handler
+ *
+ * @return Standard error code
+ */
+static inline ret_code_t nrf_blk_dev_init(nrf_block_dev_t const * p_blk_dev,
+ nrf_block_dev_ev_handler ev_handler,
+ void const * p_context)
+{
+ ASSERT(p_blk_dev->p_ops->init);
+ return p_blk_dev->p_ops->init(p_blk_dev, ev_handler, p_context);
+}
+
+/**
+ * @brief Un-initializes a block device.
+ *
+ * @param[in] p_blk_dev Block device handle
+ *
+ * @return Standard error code
+ */
+static inline ret_code_t nrf_blk_dev_uninit(nrf_block_dev_t const * p_blk_dev)
+{
+ ASSERT(p_blk_dev->p_ops->uninit);
+ return p_blk_dev->p_ops->uninit(p_blk_dev);
+}
+
+/**
+ * @brief Block read request.
+ *
+ * In synchronous mode this function will execute the read operation
+ * and wait for its completion. In asynchronous mode the function will only request
+ * the operation and return immediately. Then, the @ref NRF_BLOCK_DEV_EVT_BLK_READ_DONE
+ * event will signal that operation has been completed and the specified buffer contains
+ * valid data.
+ *
+ * @param[in] p_blk_dev Block device handle
+ * @param[in] p_blk Block device request
+ *
+ * @return Standard error code
+ */
+static inline ret_code_t nrf_blk_dev_read_req(nrf_block_dev_t const * p_blk_dev,
+ nrf_block_req_t const * p_blk)
+{
+ ASSERT(p_blk_dev->p_ops->read_req);
+ ASSERT(p_blk_dev->p_ops->geometry);
+
+ if (p_blk->blk_id >= p_blk_dev->p_ops->geometry(p_blk_dev)->blk_count)
+ {
+ return NRF_ERROR_INVALID_PARAM;
+ }
+
+ return p_blk_dev->p_ops->read_req(p_blk_dev, p_blk);
+}
+
+/**
+ * @brief Block write request.
+ *
+ * In synchronous mode this function will execute the write operation
+ * and wait for its completion. In asynchronous mode the function will only request
+ * the operation and return immediately. Then, the @ref NRF_BLOCK_DEV_EVT_BLK_WRITE_DONE
+ * event will signal that operation has been completed and the specified buffer
+ * can be freed.
+ *
+ * @param[in] p_blk_dev Block device handle
+ * @param[in] p_blk Block device request
+ *
+ * @return Standard error code
+ */
+static inline ret_code_t nrf_blk_dev_write_req(nrf_block_dev_t const * p_blk_dev,
+ nrf_block_req_t const * p_blk)
+{
+ ASSERT(p_blk_dev->p_ops->write_req);
+ ASSERT(p_blk_dev->p_ops->geometry);
+
+ if (p_blk->blk_id >= p_blk_dev->p_ops->geometry(p_blk_dev)->blk_count)
+ {
+ return NRF_ERROR_INVALID_PARAM;
+ }
+
+ return p_blk_dev->p_ops->write_req(p_blk_dev, p_blk);
+}
+
+/**
+ * @brief IO control function.
+ *
+ * @param[in] p_blk_dev Block device handle
+ * @param[in] req Block device ioctl request
+ * @param[in] p_data Block device ioctl data
+ *
+ * @return Standard error code
+ * */
+static inline ret_code_t nrf_blk_dev_ioctl(nrf_block_dev_t const * p_blk_dev,
+ nrf_block_dev_ioctl_req_t req,
+ void * p_data)
+{
+ ASSERT(p_blk_dev->p_ops->ioctl);
+ return p_blk_dev->p_ops->ioctl(p_blk_dev, req, p_data);
+}
+
+/**
+ * @brief Return a geometry of a block device.
+ *
+ * @param[in] p_blk_dev Block device handle
+ *
+ * @return Block size and count @ref nrf_block_dev_geometry_t
+ */
+static inline nrf_block_dev_geometry_t const *
+nrf_blk_dev_geometry(nrf_block_dev_t const * p_blk_dev)
+{
+ ASSERT(p_blk_dev->p_ops->geometry);
+ return p_blk_dev->p_ops->geometry(p_blk_dev);
+}
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* NRF_BLOCK_DEV_H__ */
+
+
diff --git a/third_party/NordicSemiconductor/libraries/crypto/aes_alt.c b/third_party/NordicSemiconductor/libraries/crypto/aes_alt.c
deleted file mode 100644
index a5882db..0000000
--- a/third_party/NordicSemiconductor/libraries/crypto/aes_alt.c
+++ /dev/null
@@ -1,151 +0,0 @@
-/*
- * Copyright (c) 2018, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-/*
- * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "mbedtls/aes.h"
-
-#include <openthread-core-config.h>
-#include <string.h>
-
-#ifdef MBEDTLS_AES_ALT
-
-#include "aes_alt_cc310.h"
-
-#if NRF_MBEDTLS_AES_ALT_INTERRUPT_CONTEXT
-#include <nrf.h>
-#include "aes_alt_soft.h"
-#endif
-
-void mbedtls_aes_init(mbedtls_aes_context * ctx)
-{
-#if NRF_MBEDTLS_AES_ALT_INTERRUPT_CONTEXT
- uint32_t active_vector_id = (SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) >> SCB_ICSR_VECTACTIVE_Pos;
-
- // Check if this function is called from main thread.
- if (active_vector_id == 0)
- {
- aes_soft_init(ctx);
-#endif
- aes_cc310_init(ctx);
-#if NRF_MBEDTLS_AES_ALT_INTERRUPT_CONTEXT
- ctx->using_cc310 = true;
- }
- else
- {
- aes_soft_init(ctx);
- ctx->using_cc310 = false;
- }
-#endif
-}
-
-void mbedtls_aes_free(mbedtls_aes_context * ctx)
-{
-#if NRF_MBEDTLS_AES_ALT_INTERRUPT_CONTEXT
- if (ctx->using_cc310)
- {
-#endif
- aes_cc310_free(ctx);
-#if NRF_MBEDTLS_AES_ALT_INTERRUPT_CONTEXT
- aes_soft_free(ctx);
- }
- else
- {
- aes_soft_free(ctx);
- }
-#endif
-}
-
-int mbedtls_aes_setkey_enc(mbedtls_aes_context * ctx,
- const unsigned char * key,
- unsigned int keybits)
-{
- int result;
-
-#if NRF_MBEDTLS_AES_ALT_INTERRUPT_CONTEXT
- if (ctx->using_cc310 && keybits == 128)
- {
-#endif
- result = aes_cc310_setkey_enc(ctx, key, keybits);
-#if NRF_MBEDTLS_AES_ALT_INTERRUPT_CONTEXT
- }
- else
- {
- ctx->using_cc310 = false;
- result = aes_soft_setkey_enc(ctx, key, keybits);
- }
-#endif
-
- return result;
-}
-
-int mbedtls_aes_setkey_dec(mbedtls_aes_context * ctx,
- const unsigned char * key,
- unsigned int keybits)
-{
- return mbedtls_aes_setkey_enc(ctx, key, keybits);
-}
-
-int mbedtls_aes_crypt_ecb(mbedtls_aes_context * ctx,
- int mode,
- const unsigned char input[16],
- unsigned char output[16])
-{
- int result;
-
-#if NRF_MBEDTLS_AES_ALT_INTERRUPT_CONTEXT
- if (ctx->using_cc310)
- {
-#endif
- result = aes_cc310_crypt_ecb(ctx, mode, input, output);
-#if NRF_MBEDTLS_AES_ALT_INTERRUPT_CONTEXT
- }
- else
- {
- result = aes_soft_crypt_ecb(ctx, mode, input, output);
- }
-#endif
-
- return result;
-}
-
-#endif /* MBEDTLS_AES_ALT */
diff --git a/third_party/NordicSemiconductor/libraries/crypto/aes_alt.h b/third_party/NordicSemiconductor/libraries/crypto/aes_alt.h
deleted file mode 100644
index 0f9e073..0000000
--- a/third_party/NordicSemiconductor/libraries/crypto/aes_alt.h
+++ /dev/null
@@ -1,166 +0,0 @@
-/*
- * Copyright (c) 2018, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-/*
- * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef MBEDTLS_AES_ALT_H
-#define MBEDTLS_AES_ALT_H
-
-#if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
-#else
-#include MBEDTLS_CONFIG_FILE
-#endif
-
-#include <stddef.h>
-#include <stdint.h>
-
-#ifdef MBEDTLS_AES_ALT
-
-#include "ssi_aes.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#if defined(__CC_ARM)
-#pragma anon_unions
-#endif
-
-/**
- * @brief AES context structure
- */
-typedef struct
-{
-#if NRF_MBEDTLS_AES_ALT_INTERRUPT_CONTEXT
- bool using_cc310; ///< Indicate whether it's using cc310 or not.
-#endif
-
-#if !NRF_MBEDTLS_AES_ALT_INTERRUPT_CONTEXT
- union
- {
-#endif // !NRF_MBEDTLS_AES_ALT_INTERRUPT_CONTEXT
- struct
- {
- SaSiAesUserContext_t user_context; ///< User context for CC310 AES.
- uint8_t key_buffer[32]; ///< Buffer for an encryption key.
- SaSiAesUserKeyData_t key; ///< CC310 AES key structure.
- SaSiAesEncryptMode_t mode; ///< Current context operation mode (encrypt/decrypt).
- } hardware;
- struct
- {
- int nr; ///< number of rounds */
- uint32_t *rk; ///< AES round keys */
- uint32_t buf[68]; ///< unaligned data */
- } software;
-#if !NRF_MBEDTLS_AES_ALT_INTERRUPT_CONTEXT
- };
-#endif // !NRF_MBEDTLS_AES_ALT_INTERRUPT_CONTEXT
-}
-mbedtls_aes_context;
-
-#if defined(__CC_ARM)
-#pragma no_anon_unions
-#endif
-
-/**
- * @brief Initialize AES context
- *
- * @param[in,out] ctx AES context to be initialized
- */
-void mbedtls_aes_init(mbedtls_aes_context * ctx);
-
-/**
- * @brief Clear AES context
- *
- * @param[in,out] ctx AES context to be cleared
- */
-void mbedtls_aes_free(mbedtls_aes_context * ctx);
-
-/**
- * @brief AES key schedule (encryption)
- *
- * @param[in,out] ctx AES context to be initialized
- * @param[in] key encryption key
- * @param[in] keybits must be 128, 192 or 256
- *
- * @return 0 if successful
- */
-int mbedtls_aes_setkey_enc(mbedtls_aes_context * ctx,
- const unsigned char * key,
- unsigned int keybits);
-
-/**
- * @brief AES key schedule (decryption)
- *
- * @param[in,out] ctx AES context to be initialized
- * @param[in] key decryption key
- * @param[in] keybits must be 128, 192 or 256
- *
- * @return 0 if successful
- */
-int mbedtls_aes_setkey_dec(mbedtls_aes_context * ctx,
- const unsigned char * key,
- unsigned int keybits);
-
-/**
- * @brief AES-ECB block encryption/decryption
- *
- * @param[in,out] ctx AES context
- * @param[in] mode MBEDTLS_AES_ENCRYPT or MBEDTLS_AES_DECRYPT
- * @param[in] input 16-byte input block
- * @param[out] output 16-byte output block
- *
- * @return 0 if successful
- */
-int mbedtls_aes_crypt_ecb(mbedtls_aes_context * ctx,
- int mode,
- const unsigned char input[16],
- unsigned char output[16]);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* MBEDTLS_AES_ALT */
-
-#endif /* MBEDTLS_AES_ALT_H */
diff --git a/third_party/NordicSemiconductor/libraries/crypto/aes_alt_cc310.c b/third_party/NordicSemiconductor/libraries/crypto/aes_alt_cc310.c
deleted file mode 100644
index d59c3b6..0000000
--- a/third_party/NordicSemiconductor/libraries/crypto/aes_alt_cc310.c
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * Copyright (c) 2018, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-/*
- * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "mbedtls/aes.h"
-
-#include <string.h>
-
-#ifdef MBEDTLS_AES_ALT
-
-#include "aes_alt_cc310.h"
-#include "cc310_mbedtls.h"
-#include "ssi_pal_types.h"
-
-static void aes_init(mbedtls_aes_context * ctx, SaSiAesEncryptMode_t mode)
-{
- memset(&ctx->hardware.user_context, 0, sizeof(ctx->hardware.user_context));
-
- ctx->hardware.mode = mode;
- ctx->hardware.key.pKey = ctx->hardware.key_buffer;
-
- CC310_OPERATION_NO_RESULT(SaSi_AesInit(&ctx->hardware.user_context,
- mode,
- SASI_AES_MODE_ECB,
- SASI_AES_PADDING_NONE));
-}
-
-void aes_cc310_init(mbedtls_aes_context * ctx)
-{
- memset(ctx, 0, sizeof(*ctx));
-
- aes_init(ctx, SASI_AES_ENCRYPT);
-}
-
-void aes_cc310_free(mbedtls_aes_context * ctx)
-{
- CC310_OPERATION_NO_RESULT(SaSi_AesFree(&ctx->hardware.user_context));
-}
-
-int aes_cc310_setkey_enc(mbedtls_aes_context * ctx,
- const unsigned char * key,
- unsigned int keybits)
-{
- SaSiError_t result = SASI_OK;
-
- ctx->hardware.key.keySize = (keybits + 7) / 8;
- ctx->hardware.key.pKey = ctx->hardware.key_buffer;
-
- memcpy(ctx->hardware.key_buffer, key, ctx->hardware.key.keySize);
-
- CC310_OPERATION(SaSi_AesSetKey(&ctx->hardware.user_context,
- SASI_AES_USER_KEY,
- &ctx->hardware.key,
- sizeof(ctx->hardware.key)),
- result);
-
- return (int)result;
-}
-
-int aes_cc310_crypt_ecb(mbedtls_aes_context * ctx,
- int mode,
- const unsigned char input[16],
- unsigned char output[16])
-{
- SaSiAesEncryptMode_t reinit_mode = SASI_AES_ENCRYPT_MODE_LAST;
- SaSiError_t result = SASI_OK;
-
- if ((mode == MBEDTLS_AES_ENCRYPT) && (ctx->hardware.mode != SASI_AES_ENCRYPT))
- {
- reinit_mode = SASI_AES_ENCRYPT;
- }
- else if ((mode == MBEDTLS_AES_DECRYPT) && (ctx->hardware.mode != SASI_AES_DECRYPT))
- {
- reinit_mode = SASI_AES_DECRYPT;
- }
-
- if ((reinit_mode == SASI_AES_ENCRYPT) || (reinit_mode == SASI_AES_DECRYPT))
- {
- aes_init(ctx, reinit_mode);
-
- CC310_OPERATION(SaSi_AesSetKey(&ctx->hardware.user_context,
- SASI_AES_USER_KEY,
- &ctx->hardware.key,
- sizeof(ctx->hardware.key)),
- result);
-
- if (result != SASI_OK)
- {
- return (int)result;
- }
- }
-
- CC310_OPERATION(SaSi_AesBlock(&ctx->hardware.user_context, (uint8_t *)input, 16, output), result);
-
- return (int)result;
-}
-
-#endif /* MBEDTLS_AES_ALT */
diff --git a/third_party/NordicSemiconductor/libraries/crypto/aes_alt_cc310.h b/third_party/NordicSemiconductor/libraries/crypto/aes_alt_cc310.h
deleted file mode 100644
index 6c492bb..0000000
--- a/third_party/NordicSemiconductor/libraries/crypto/aes_alt_cc310.h
+++ /dev/null
@@ -1,108 +0,0 @@
-/*
- * Copyright (c) 2018, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-/*
- * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef AES_ALT_CC310_H
-#define AES_ALT_CC310_H
-
-#include <stddef.h>
-#include <stdint.h>
-
-#ifdef MBEDTLS_AES_ALT
-
-#include "ssi_aes.h"
-#include "aes_alt.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @brief Initialize AES context
- *
- * @param[in,out] ctx AES context to be initialized
- */
-void aes_cc310_init(mbedtls_aes_context * ctx);
-
-/**
- * @brief Clear AES context
- *
- * @param[in,out] ctx AES context to be cleared
- */
-void aes_cc310_free(mbedtls_aes_context * ctx);
-
-/**
- * @brief AES key schedule (encryption)
- *
- * @param[in,out] ctx AES context to be initialized
- * @param[in] key encryption key
- * @param[in] keybits must be 128, 192 or 256
- *
- * @return 0 if successful
- */
-int aes_cc310_setkey_enc(mbedtls_aes_context * ctx,
- const unsigned char * key,
- unsigned int keybits);
-
-/**
- * @brief AES-ECB block encryption/decryption
- *
- * @param[in,out] ctx AES context
- * @param[in] mode MBEDTLS_AES_ENCRYPT or MBEDTLS_AES_DECRYPT
- * @param[in] input 16-byte input block
- * @param[out] output 16-byte output block
- *
- * @return 0 if successful
- */
-int aes_cc310_crypt_ecb(mbedtls_aes_context * ctx,
- int mode,
- const unsigned char input[16],
- unsigned char output[16]);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* MBEDTLS_AES_ALT */
-
-#endif /* AES_ALT_CC310_H */
diff --git a/third_party/NordicSemiconductor/libraries/crypto/aes_alt_soft.c b/third_party/NordicSemiconductor/libraries/crypto/aes_alt_soft.c
deleted file mode 100644
index a72cffd..0000000
--- a/third_party/NordicSemiconductor/libraries/crypto/aes_alt_soft.c
+++ /dev/null
@@ -1,404 +0,0 @@
-/*
- * Copyright (c) 2018, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-/*
- * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "mbedtls/aes.h"
-
-#include "aes_alt_soft.h"
-
-#include <string.h>
-
-#ifdef MBEDTLS_AES_ALT
-
-#if NRF_MBEDTLS_AES_ALT_INTERRUPT_CONTEXT
-
-/*
- * 32-bit integer manipulation macros (little endian)
- */
-#define GET_UINT32_LE(n,b,i) \
-{ \
- (n) = ( (uint32_t) (b)[(i) ] ) \
- | ( (uint32_t) (b)[(i) + 1] << 8 ) \
- | ( (uint32_t) (b)[(i) + 2] << 16 ) \
- | ( (uint32_t) (b)[(i) + 3] << 24 ); \
-}
-
-#define PUT_UINT32_LE(n,b,i) \
-{ \
- (b)[(i) ] = (unsigned char) ( ( (n) ) & 0xFF ); \
- (b)[(i) + 1] = (unsigned char) ( ( (n) >> 8 ) & 0xFF ); \
- (b)[(i) + 2] = (unsigned char) ( ( (n) >> 16 ) & 0xFF ); \
- (b)[(i) + 3] = (unsigned char) ( ( (n) >> 24 ) & 0xFF ); \
-}
-
-/*
- * Forward S-box
- */
-static const unsigned char FSb[256] =
-{
- 0x63, 0x7C, 0x77, 0x7B, 0xF2, 0x6B, 0x6F, 0xC5,
- 0x30, 0x01, 0x67, 0x2B, 0xFE, 0xD7, 0xAB, 0x76,
- 0xCA, 0x82, 0xC9, 0x7D, 0xFA, 0x59, 0x47, 0xF0,
- 0xAD, 0xD4, 0xA2, 0xAF, 0x9C, 0xA4, 0x72, 0xC0,
- 0xB7, 0xFD, 0x93, 0x26, 0x36, 0x3F, 0xF7, 0xCC,
- 0x34, 0xA5, 0xE5, 0xF1, 0x71, 0xD8, 0x31, 0x15,
- 0x04, 0xC7, 0x23, 0xC3, 0x18, 0x96, 0x05, 0x9A,
- 0x07, 0x12, 0x80, 0xE2, 0xEB, 0x27, 0xB2, 0x75,
- 0x09, 0x83, 0x2C, 0x1A, 0x1B, 0x6E, 0x5A, 0xA0,
- 0x52, 0x3B, 0xD6, 0xB3, 0x29, 0xE3, 0x2F, 0x84,
- 0x53, 0xD1, 0x00, 0xED, 0x20, 0xFC, 0xB1, 0x5B,
- 0x6A, 0xCB, 0xBE, 0x39, 0x4A, 0x4C, 0x58, 0xCF,
- 0xD0, 0xEF, 0xAA, 0xFB, 0x43, 0x4D, 0x33, 0x85,
- 0x45, 0xF9, 0x02, 0x7F, 0x50, 0x3C, 0x9F, 0xA8,
- 0x51, 0xA3, 0x40, 0x8F, 0x92, 0x9D, 0x38, 0xF5,
- 0xBC, 0xB6, 0xDA, 0x21, 0x10, 0xFF, 0xF3, 0xD2,
- 0xCD, 0x0C, 0x13, 0xEC, 0x5F, 0x97, 0x44, 0x17,
- 0xC4, 0xA7, 0x7E, 0x3D, 0x64, 0x5D, 0x19, 0x73,
- 0x60, 0x81, 0x4F, 0xDC, 0x22, 0x2A, 0x90, 0x88,
- 0x46, 0xEE, 0xB8, 0x14, 0xDE, 0x5E, 0x0B, 0xDB,
- 0xE0, 0x32, 0x3A, 0x0A, 0x49, 0x06, 0x24, 0x5C,
- 0xC2, 0xD3, 0xAC, 0x62, 0x91, 0x95, 0xE4, 0x79,
- 0xE7, 0xC8, 0x37, 0x6D, 0x8D, 0xD5, 0x4E, 0xA9,
- 0x6C, 0x56, 0xF4, 0xEA, 0x65, 0x7A, 0xAE, 0x08,
- 0xBA, 0x78, 0x25, 0x2E, 0x1C, 0xA6, 0xB4, 0xC6,
- 0xE8, 0xDD, 0x74, 0x1F, 0x4B, 0xBD, 0x8B, 0x8A,
- 0x70, 0x3E, 0xB5, 0x66, 0x48, 0x03, 0xF6, 0x0E,
- 0x61, 0x35, 0x57, 0xB9, 0x86, 0xC1, 0x1D, 0x9E,
- 0xE1, 0xF8, 0x98, 0x11, 0x69, 0xD9, 0x8E, 0x94,
- 0x9B, 0x1E, 0x87, 0xE9, 0xCE, 0x55, 0x28, 0xDF,
- 0x8C, 0xA1, 0x89, 0x0D, 0xBF, 0xE6, 0x42, 0x68,
- 0x41, 0x99, 0x2D, 0x0F, 0xB0, 0x54, 0xBB, 0x16
-};
-
-/*
- * Forward tables
- */
-#define FT \
-\
- V(A5,63,63,C6), V(84,7C,7C,F8), V(99,77,77,EE), V(8D,7B,7B,F6), \
- V(0D,F2,F2,FF), V(BD,6B,6B,D6), V(B1,6F,6F,DE), V(54,C5,C5,91), \
- V(50,30,30,60), V(03,01,01,02), V(A9,67,67,CE), V(7D,2B,2B,56), \
- V(19,FE,FE,E7), V(62,D7,D7,B5), V(E6,AB,AB,4D), V(9A,76,76,EC), \
- V(45,CA,CA,8F), V(9D,82,82,1F), V(40,C9,C9,89), V(87,7D,7D,FA), \
- V(15,FA,FA,EF), V(EB,59,59,B2), V(C9,47,47,8E), V(0B,F0,F0,FB), \
- V(EC,AD,AD,41), V(67,D4,D4,B3), V(FD,A2,A2,5F), V(EA,AF,AF,45), \
- V(BF,9C,9C,23), V(F7,A4,A4,53), V(96,72,72,E4), V(5B,C0,C0,9B), \
- V(C2,B7,B7,75), V(1C,FD,FD,E1), V(AE,93,93,3D), V(6A,26,26,4C), \
- V(5A,36,36,6C), V(41,3F,3F,7E), V(02,F7,F7,F5), V(4F,CC,CC,83), \
- V(5C,34,34,68), V(F4,A5,A5,51), V(34,E5,E5,D1), V(08,F1,F1,F9), \
- V(93,71,71,E2), V(73,D8,D8,AB), V(53,31,31,62), V(3F,15,15,2A), \
- V(0C,04,04,08), V(52,C7,C7,95), V(65,23,23,46), V(5E,C3,C3,9D), \
- V(28,18,18,30), V(A1,96,96,37), V(0F,05,05,0A), V(B5,9A,9A,2F), \
- V(09,07,07,0E), V(36,12,12,24), V(9B,80,80,1B), V(3D,E2,E2,DF), \
- V(26,EB,EB,CD), V(69,27,27,4E), V(CD,B2,B2,7F), V(9F,75,75,EA), \
- V(1B,09,09,12), V(9E,83,83,1D), V(74,2C,2C,58), V(2E,1A,1A,34), \
- V(2D,1B,1B,36), V(B2,6E,6E,DC), V(EE,5A,5A,B4), V(FB,A0,A0,5B), \
- V(F6,52,52,A4), V(4D,3B,3B,76), V(61,D6,D6,B7), V(CE,B3,B3,7D), \
- V(7B,29,29,52), V(3E,E3,E3,DD), V(71,2F,2F,5E), V(97,84,84,13), \
- V(F5,53,53,A6), V(68,D1,D1,B9), V(00,00,00,00), V(2C,ED,ED,C1), \
- V(60,20,20,40), V(1F,FC,FC,E3), V(C8,B1,B1,79), V(ED,5B,5B,B6), \
- V(BE,6A,6A,D4), V(46,CB,CB,8D), V(D9,BE,BE,67), V(4B,39,39,72), \
- V(DE,4A,4A,94), V(D4,4C,4C,98), V(E8,58,58,B0), V(4A,CF,CF,85), \
- V(6B,D0,D0,BB), V(2A,EF,EF,C5), V(E5,AA,AA,4F), V(16,FB,FB,ED), \
- V(C5,43,43,86), V(D7,4D,4D,9A), V(55,33,33,66), V(94,85,85,11), \
- V(CF,45,45,8A), V(10,F9,F9,E9), V(06,02,02,04), V(81,7F,7F,FE), \
- V(F0,50,50,A0), V(44,3C,3C,78), V(BA,9F,9F,25), V(E3,A8,A8,4B), \
- V(F3,51,51,A2), V(FE,A3,A3,5D), V(C0,40,40,80), V(8A,8F,8F,05), \
- V(AD,92,92,3F), V(BC,9D,9D,21), V(48,38,38,70), V(04,F5,F5,F1), \
- V(DF,BC,BC,63), V(C1,B6,B6,77), V(75,DA,DA,AF), V(63,21,21,42), \
- V(30,10,10,20), V(1A,FF,FF,E5), V(0E,F3,F3,FD), V(6D,D2,D2,BF), \
- V(4C,CD,CD,81), V(14,0C,0C,18), V(35,13,13,26), V(2F,EC,EC,C3), \
- V(E1,5F,5F,BE), V(A2,97,97,35), V(CC,44,44,88), V(39,17,17,2E), \
- V(57,C4,C4,93), V(F2,A7,A7,55), V(82,7E,7E,FC), V(47,3D,3D,7A), \
- V(AC,64,64,C8), V(E7,5D,5D,BA), V(2B,19,19,32), V(95,73,73,E6), \
- V(A0,60,60,C0), V(98,81,81,19), V(D1,4F,4F,9E), V(7F,DC,DC,A3), \
- V(66,22,22,44), V(7E,2A,2A,54), V(AB,90,90,3B), V(83,88,88,0B), \
- V(CA,46,46,8C), V(29,EE,EE,C7), V(D3,B8,B8,6B), V(3C,14,14,28), \
- V(79,DE,DE,A7), V(E2,5E,5E,BC), V(1D,0B,0B,16), V(76,DB,DB,AD), \
- V(3B,E0,E0,DB), V(56,32,32,64), V(4E,3A,3A,74), V(1E,0A,0A,14), \
- V(DB,49,49,92), V(0A,06,06,0C), V(6C,24,24,48), V(E4,5C,5C,B8), \
- V(5D,C2,C2,9F), V(6E,D3,D3,BD), V(EF,AC,AC,43), V(A6,62,62,C4), \
- V(A8,91,91,39), V(A4,95,95,31), V(37,E4,E4,D3), V(8B,79,79,F2), \
- V(32,E7,E7,D5), V(43,C8,C8,8B), V(59,37,37,6E), V(B7,6D,6D,DA), \
- V(8C,8D,8D,01), V(64,D5,D5,B1), V(D2,4E,4E,9C), V(E0,A9,A9,49), \
- V(B4,6C,6C,D8), V(FA,56,56,AC), V(07,F4,F4,F3), V(25,EA,EA,CF), \
- V(AF,65,65,CA), V(8E,7A,7A,F4), V(E9,AE,AE,47), V(18,08,08,10), \
- V(D5,BA,BA,6F), V(88,78,78,F0), V(6F,25,25,4A), V(72,2E,2E,5C), \
- V(24,1C,1C,38), V(F1,A6,A6,57), V(C7,B4,B4,73), V(51,C6,C6,97), \
- V(23,E8,E8,CB), V(7C,DD,DD,A1), V(9C,74,74,E8), V(21,1F,1F,3E), \
- V(DD,4B,4B,96), V(DC,BD,BD,61), V(86,8B,8B,0D), V(85,8A,8A,0F), \
- V(90,70,70,E0), V(42,3E,3E,7C), V(C4,B5,B5,71), V(AA,66,66,CC), \
- V(D8,48,48,90), V(05,03,03,06), V(01,F6,F6,F7), V(12,0E,0E,1C), \
- V(A3,61,61,C2), V(5F,35,35,6A), V(F9,57,57,AE), V(D0,B9,B9,69), \
- V(91,86,86,17), V(58,C1,C1,99), V(27,1D,1D,3A), V(B9,9E,9E,27), \
- V(38,E1,E1,D9), V(13,F8,F8,EB), V(B3,98,98,2B), V(33,11,11,22), \
- V(BB,69,69,D2), V(70,D9,D9,A9), V(89,8E,8E,07), V(A7,94,94,33), \
- V(B6,9B,9B,2D), V(22,1E,1E,3C), V(92,87,87,15), V(20,E9,E9,C9), \
- V(49,CE,CE,87), V(FF,55,55,AA), V(78,28,28,50), V(7A,DF,DF,A5), \
- V(8F,8C,8C,03), V(F8,A1,A1,59), V(80,89,89,09), V(17,0D,0D,1A), \
- V(DA,BF,BF,65), V(31,E6,E6,D7), V(C6,42,42,84), V(B8,68,68,D0), \
- V(C3,41,41,82), V(B0,99,99,29), V(77,2D,2D,5A), V(11,0F,0F,1E), \
- V(CB,B0,B0,7B), V(FC,54,54,A8), V(D6,BB,BB,6D), V(3A,16,16,2C)
-
-#define V(a,b,c,d) 0x##a##b##c##d
-static const uint32_t FT0[256] = { FT };
-#undef V
-
-#define V(a,b,c,d) 0x##b##c##d##a
-static const uint32_t FT1[256] = { FT };
-#undef V
-
-#define V(a,b,c,d) 0x##c##d##a##b
-static const uint32_t FT2[256] = { FT };
-#undef V
-
-#define V(a,b,c,d) 0x##d##a##b##c
-static const uint32_t FT3[256] = { FT };
-#undef V
-
-#undef FT
-
-/*
- * Round constants
- */
-static const uint32_t RCON[10] =
-{
- 0x00000001, 0x00000002, 0x00000004, 0x00000008,
- 0x00000010, 0x00000020, 0x00000040, 0x00000080,
- 0x0000001B, 0x00000036
-};
-
-#define AES_FROUND(X0,X1,X2,X3,Y0,Y1,Y2,Y3) \
-{ \
- X0 = *RK++ ^ FT0[ ( Y0 ) & 0xFF ] ^ \
- FT1[ ( Y1 >> 8 ) & 0xFF ] ^ \
- FT2[ ( Y2 >> 16 ) & 0xFF ] ^ \
- FT3[ ( Y3 >> 24 ) & 0xFF ]; \
- \
- X1 = *RK++ ^ FT0[ ( Y1 ) & 0xFF ] ^ \
- FT1[ ( Y2 >> 8 ) & 0xFF ] ^ \
- FT2[ ( Y3 >> 16 ) & 0xFF ] ^ \
- FT3[ ( Y0 >> 24 ) & 0xFF ]; \
- \
- X2 = *RK++ ^ FT0[ ( Y2 ) & 0xFF ] ^ \
- FT1[ ( Y3 >> 8 ) & 0xFF ] ^ \
- FT2[ ( Y0 >> 16 ) & 0xFF ] ^ \
- FT3[ ( Y1 >> 24 ) & 0xFF ]; \
- \
- X3 = *RK++ ^ FT0[ ( Y3 ) & 0xFF ] ^ \
- FT1[ ( Y0 >> 8 ) & 0xFF ] ^ \
- FT2[ ( Y1 >> 16 ) & 0xFF ] ^ \
- FT3[ ( Y2 >> 24 ) & 0xFF ]; \
-}
-
-void aes_soft_init( mbedtls_aes_context *ctx )
-{
- memset( ctx, 0, sizeof( mbedtls_aes_context ) );
-}
-
-void aes_soft_free( mbedtls_aes_context *ctx )
-{
- memset( ctx, 0, sizeof( mbedtls_aes_context ) );
-}
-
-/*
- * AES key schedule (encryption)
- */
-int aes_soft_setkey_enc( mbedtls_aes_context *ctx, const unsigned char *key,
- unsigned int keybits )
-{
- unsigned int i;
- uint32_t *RK;
-
- switch( keybits )
- {
- case 128: ctx->software.nr = 10; break;
- case 192: ctx->software.nr = 12; break;
- case 256: ctx->software.nr = 14; break;
- default : return( MBEDTLS_ERR_AES_INVALID_KEY_LENGTH );
- }
-
- ctx->software.rk = RK = ctx->software.buf;
-
- for( i = 0; i < ( keybits >> 5 ); i++ )
- {
- GET_UINT32_LE( RK[i], key, i << 2 );
- }
-
- switch( ctx->software.nr )
- {
- case 10:
-
- for( i = 0; i < 10; i++, RK += 4 )
- {
- RK[4] = RK[0] ^ RCON[i] ^
- ( (uint32_t) FSb[ ( RK[3] >> 8 ) & 0xFF ] ) ^
- ( (uint32_t) FSb[ ( RK[3] >> 16 ) & 0xFF ] << 8 ) ^
- ( (uint32_t) FSb[ ( RK[3] >> 24 ) & 0xFF ] << 16 ) ^
- ( (uint32_t) FSb[ ( RK[3] ) & 0xFF ] << 24 );
-
- RK[5] = RK[1] ^ RK[4];
- RK[6] = RK[2] ^ RK[5];
- RK[7] = RK[3] ^ RK[6];
- }
- break;
-
- case 12:
-
- for( i = 0; i < 8; i++, RK += 6 )
- {
- RK[6] = RK[0] ^ RCON[i] ^
- ( (uint32_t) FSb[ ( RK[5] >> 8 ) & 0xFF ] ) ^
- ( (uint32_t) FSb[ ( RK[5] >> 16 ) & 0xFF ] << 8 ) ^
- ( (uint32_t) FSb[ ( RK[5] >> 24 ) & 0xFF ] << 16 ) ^
- ( (uint32_t) FSb[ ( RK[5] ) & 0xFF ] << 24 );
-
- RK[7] = RK[1] ^ RK[6];
- RK[8] = RK[2] ^ RK[7];
- RK[9] = RK[3] ^ RK[8];
- RK[10] = RK[4] ^ RK[9];
- RK[11] = RK[5] ^ RK[10];
- }
- break;
-
- case 14:
-
- for( i = 0; i < 7; i++, RK += 8 )
- {
- RK[8] = RK[0] ^ RCON[i] ^
- ( (uint32_t) FSb[ ( RK[7] >> 8 ) & 0xFF ] ) ^
- ( (uint32_t) FSb[ ( RK[7] >> 16 ) & 0xFF ] << 8 ) ^
- ( (uint32_t) FSb[ ( RK[7] >> 24 ) & 0xFF ] << 16 ) ^
- ( (uint32_t) FSb[ ( RK[7] ) & 0xFF ] << 24 );
-
- RK[9] = RK[1] ^ RK[8];
- RK[10] = RK[2] ^ RK[9];
- RK[11] = RK[3] ^ RK[10];
-
- RK[12] = RK[4] ^
- ( (uint32_t) FSb[ ( RK[11] ) & 0xFF ] ) ^
- ( (uint32_t) FSb[ ( RK[11] >> 8 ) & 0xFF ] << 8 ) ^
- ( (uint32_t) FSb[ ( RK[11] >> 16 ) & 0xFF ] << 16 ) ^
- ( (uint32_t) FSb[ ( RK[11] >> 24 ) & 0xFF ] << 24 );
-
- RK[13] = RK[5] ^ RK[12];
- RK[14] = RK[6] ^ RK[13];
- RK[15] = RK[7] ^ RK[14];
- }
- break;
- }
-
- return( 0 );
-}
-
-/*
- * AES-ECB block encryption
- */
-int aes_encrypt( mbedtls_aes_context *ctx,
- const unsigned char input[16],
- unsigned char output[16] )
-{
- int i;
- uint32_t *RK, X0, X1, X2, X3, Y0, Y1, Y2, Y3;
-
- RK = ctx->software.rk;
-
- GET_UINT32_LE( X0, input, 0 ); X0 ^= *RK++;
- GET_UINT32_LE( X1, input, 4 ); X1 ^= *RK++;
- GET_UINT32_LE( X2, input, 8 ); X2 ^= *RK++;
- GET_UINT32_LE( X3, input, 12 ); X3 ^= *RK++;
-
- for( i = ( ctx->software.nr >> 1 ) - 1; i > 0; i-- )
- {
- AES_FROUND( Y0, Y1, Y2, Y3, X0, X1, X2, X3 );
- AES_FROUND( X0, X1, X2, X3, Y0, Y1, Y2, Y3 );
- }
-
- AES_FROUND( Y0, Y1, Y2, Y3, X0, X1, X2, X3 );
-
- X0 = *RK++ ^ \
- ( (uint32_t) FSb[ ( Y0 ) & 0xFF ] ) ^
- ( (uint32_t) FSb[ ( Y1 >> 8 ) & 0xFF ] << 8 ) ^
- ( (uint32_t) FSb[ ( Y2 >> 16 ) & 0xFF ] << 16 ) ^
- ( (uint32_t) FSb[ ( Y3 >> 24 ) & 0xFF ] << 24 );
-
- X1 = *RK++ ^ \
- ( (uint32_t) FSb[ ( Y1 ) & 0xFF ] ) ^
- ( (uint32_t) FSb[ ( Y2 >> 8 ) & 0xFF ] << 8 ) ^
- ( (uint32_t) FSb[ ( Y3 >> 16 ) & 0xFF ] << 16 ) ^
- ( (uint32_t) FSb[ ( Y0 >> 24 ) & 0xFF ] << 24 );
-
- X2 = *RK++ ^ \
- ( (uint32_t) FSb[ ( Y2 ) & 0xFF ] ) ^
- ( (uint32_t) FSb[ ( Y3 >> 8 ) & 0xFF ] << 8 ) ^
- ( (uint32_t) FSb[ ( Y0 >> 16 ) & 0xFF ] << 16 ) ^
- ( (uint32_t) FSb[ ( Y1 >> 24 ) & 0xFF ] << 24 );
-
- X3 = *RK++ ^ \
- ( (uint32_t) FSb[ ( Y3 ) & 0xFF ] ) ^
- ( (uint32_t) FSb[ ( Y0 >> 8 ) & 0xFF ] << 8 ) ^
- ( (uint32_t) FSb[ ( Y1 >> 16 ) & 0xFF ] << 16 ) ^
- ( (uint32_t) FSb[ ( Y2 >> 24 ) & 0xFF ] << 24 );
-
- PUT_UINT32_LE( X0, output, 0 );
- PUT_UINT32_LE( X1, output, 4 );
- PUT_UINT32_LE( X2, output, 8 );
- PUT_UINT32_LE( X3, output, 12 );
-
- return( 0 );
-}
-
-int aes_soft_crypt_ecb( mbedtls_aes_context *ctx,
- int mode,
- const unsigned char input[16],
- unsigned char output[16] )
-{
- // OpenThread uses MBEDTLS_AES_ENCRYPT mode only
- (void)mode;
-
- return aes_encrypt( ctx, input, output );
-}
-
-#endif /* NRF_MBEDTLS_AES_ALT_INTERRUPT_CONTEXT */
-
-#endif /* MBEDTLS_AES_ALT */
diff --git a/third_party/NordicSemiconductor/libraries/crypto/aes_alt_soft.h b/third_party/NordicSemiconductor/libraries/crypto/aes_alt_soft.h
deleted file mode 100644
index ba6acfc..0000000
--- a/third_party/NordicSemiconductor/libraries/crypto/aes_alt_soft.h
+++ /dev/null
@@ -1,113 +0,0 @@
-/*
- * Copyright (c) 2018, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-/*
- * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef AES_ALT_SOFT_H
-#define AES_ALT_SOFT_H
-
-#include <openthread-core-config.h>
-
-#include <stddef.h>
-#include <stdint.h>
-
-#ifdef MBEDTLS_AES_ALT
-
-#if NRF_MBEDTLS_AES_ALT_INTERRUPT_CONTEXT
-
-#include "aes_alt.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @brief Initialize AES context
- *
- * @param[in,out] ctx AES context to be initialized
- */
-void aes_soft_init(mbedtls_aes_context * ctx);
-
-/**
- * @brief Clear AES context
- *
- * @param[in,out] ctx AES context to be cleared
- */
-void aes_soft_free(mbedtls_aes_context * ctx);
-
-/**
- * @brief AES key schedule (encryption)
- *
- * @param[in,out] ctx AES context to be initialized
- * @param[in] key encryption key
- * @param[in] keybits must be 128, 192 or 256
- *
- * @return 0 if successful
- */
-int aes_soft_setkey_enc(mbedtls_aes_context * ctx,
- const unsigned char * key,
- unsigned int keybits);
-
-/**
- * @brief AES-ECB block encryption/decryption
- *
- * @param[in,out] ctx AES context
- * @param[in] mode MBEDTLS_AES_ENCRYPT or MBEDTLS_AES_DECRYPT
- * @param[in] input 16-byte input block
- * @param[out] output 16-byte output block
- *
- * @return 0 if successful
- */
-int aes_soft_crypt_ecb(mbedtls_aes_context * ctx,
- int mode,
- const unsigned char input[16],
- unsigned char output[16]);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* NRF_MBEDTLS_AES_ALT_INTERRUPT_CONTEXT */
-
-#endif /* MBEDTLS_AES_ALT */
-
-#endif /* AES_ALT_SOFT_H */
diff --git a/third_party/NordicSemiconductor/libraries/crypto/cc310_mbedtls.c b/third_party/NordicSemiconductor/libraries/crypto/cc310_mbedtls.c
deleted file mode 100644
index d010421..0000000
--- a/third_party/NordicSemiconductor/libraries/crypto/cc310_mbedtls.c
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * Copyright (c) 2018, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef DISABLE_CC310
-
-#include "cc310_mbedtls.h"
-
-#include "crys_rnd.h"
-#include "sns_silib.h"
-
-#include <openthread/platform/logging.h>
-
-CRYS_RND_State_t m_rndState;
-CRYS_RND_WorkBuff_t m_rndWorkBuff;
-
-CRYS_RND_State_t * pRndState = &m_rndState;
-CRYS_RND_WorkBuff_t * pRndWorkBuff = &m_rndWorkBuff;
-
-void cc310_enable(void)
-{
- NRF_CRYPTOCELL->ENABLE = 1;
- NVIC_EnableIRQ(CRYPTOCELL_IRQn);
-}
-
-void cc310_disable(void)
-{
- NRF_CRYPTOCELL->ENABLE = 0;
- NVIC_DisableIRQ(CRYPTOCELL_IRQn);
- NVIC_ClearPendingIRQ(CRYPTOCELL_IRQn);
-}
-
-void nrf5CryptoInit(void)
-{
- SA_SilibRetCode_t sa_result;
- CRYSError_t crys_result;
-
- CC310_OPERATION(SaSi_LibInit(), sa_result);
- if (sa_result != SA_SILIB_RET_OK)
- {
- otPlatLog(OT_LOG_LEVEL_CRIT, OT_LOG_REGION_PLATFORM, "Failed SaSi_LibInit - ret = 0x%x", sa_result);
- }
-
- CC310_OPERATION(CRYS_RndInit(pRndState, pRndWorkBuff), crys_result);
- if (crys_result != CRYS_OK)
- {
- otPlatLog(OT_LOG_LEVEL_CRIT, OT_LOG_REGION_PLATFORM, "Failed CRYS_RndInit - ret = 0x%x", crys_result);
- }
-}
-
-void nrf5CryptoDeinit(void)
-{
- CC310_OPERATION_NO_RESULT(SaSi_LibFini());
- CC310_OPERATION_NO_RESULT(CRYS_RND_UnInstantiation(pRndState));
-}
-
-#endif // DISABLE_CC310
diff --git a/third_party/NordicSemiconductor/libraries/crypto/cc310_mbedtls.h b/third_party/NordicSemiconductor/libraries/crypto/cc310_mbedtls.h
deleted file mode 100644
index 11bd53c..0000000
--- a/third_party/NordicSemiconductor/libraries/crypto/cc310_mbedtls.h
+++ /dev/null
@@ -1,72 +0,0 @@
-/*
- * Copyright (c) 2018, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef DISABLE_CC310
-
-#undef PACKAGE
-
-#include "nrf.h"
-
-/** @brief Enable CC310 hardware. */
-void cc310_enable(void);
-
-/** @brief Disable CC310 hardware. */
-void cc310_disable(void);
-
-/** @brief Wrapper for CC310 operations which ignores result.
- *
- * This macro enables CC310 hardware before operation and disables it after operation.
- * Result of the CC310 operation is ignored.
- *
- * @param[in] operation CC310 operation to execute.
- */
-#define CC310_OPERATION_NO_RESULT(operation) \
- do \
- { \
- cc310_enable(); \
- (void)operation; \
- cc310_disable(); \
- } while (0)
-
-/** @brief Wrapper for CC310 operations.
- *
- * This macro enables CC310 hardware before operation and disables it after operation.
- * Result of the CC310 operation is returned through a variable passed to the macro.
- *
- * @param[in] operation CC310 operation to execute.
- * @param[out] result Variable to store result of the operation.
- */
-#define CC310_OPERATION(operation, result) \
- do \
- { \
- cc310_enable(); \
- result = operation; \
- cc310_disable(); \
- } while (0)
-
-#endif // DISABLE_CC310
diff --git a/third_party/NordicSemiconductor/libraries/crypto/ecp_alt.h b/third_party/NordicSemiconductor/libraries/crypto/ecp_alt.h
deleted file mode 100644
index a1f88f5..0000000
--- a/third_party/NordicSemiconductor/libraries/crypto/ecp_alt.h
+++ /dev/null
@@ -1,165 +0,0 @@
-/*
- * Copyright (c) 2018, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if defined(MBEDTLS_ECP_ALT)
-
-/*
- * default mbed TLS elliptic curve arithmetic implementation
- *
- * (in case MBEDTLS_ECP_ALT is defined then the developer has to provide an
- * alternative implementation for the whole module and it will replace this
- * one.)
- */
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * \brief ECP group structure
- *
- * We consider two types of curves equations:
- * 1. Short Weierstrass y^2 = x^3 + A x + B mod P (SEC1 + RFC 4492)
- * 2. Montgomery, y^2 = x^3 + A x^2 + x mod P (Curve25519 + draft)
- * In both cases, a generator G for a prime-order subgroup is fixed. In the
- * short weierstrass, this subgroup is actually the whole curve, and its
- * cardinal is denoted by N.
- *
- * In the case of Short Weierstrass curves, our code requires that N is an odd
- * prime. (Use odd in mbedtls_ecp_mul() and prime in mbedtls_ecdsa_sign() for blinding.)
- *
- * In the case of Montgomery curves, we don't store A but (A + 2) / 4 which is
- * the quantity actually used in the formulas. Also, nbits is not the size of N
- * but the required size for private keys.
- *
- * If modp is NULL, reduction modulo P is done using a generic algorithm.
- * Otherwise, it must point to a function that takes an mbedtls_mpi in the range
- * 0..2^(2*pbits)-1 and transforms it in-place in an integer of little more
- * than pbits, so that the integer may be efficiently brought in the 0..P-1
- * range by a few additions or substractions. It must return 0 on success and
- * non-zero on failure.
- */
-typedef struct
-{
- mbedtls_ecp_group_id id; /*!< internal group identifier */
- mbedtls_mpi P; /*!< prime modulus of the base field */
- mbedtls_mpi A; /*!< 1. A in the equation, or 2. (A + 2) / 4 */
- mbedtls_mpi B; /*!< 1. B in the equation, or 2. unused */
- mbedtls_ecp_point G; /*!< generator of the (sub)group used */
- mbedtls_mpi N; /*!< 1. the order of G, or 2. unused */
- size_t pbits; /*!< number of bits in P */
- size_t nbits; /*!< number of bits in 1. P, or 2. private keys */
- unsigned int h; /*!< internal: 1 if the constants are static */
- int (*modp)(mbedtls_mpi *); /*!< function for fast reduction mod P */
- int (*t_pre)(mbedtls_ecp_point *, void *); /*!< unused */
- int (*t_post)(mbedtls_ecp_point *, void *); /*!< unused */
- void *t_data; /*!< unused */
- mbedtls_ecp_point *T; /*!< pre-computed points for ecp_mul_comb() */
- size_t T_size; /*!< number for pre-computed points */
-}
-mbedtls_ecp_group;
-
-/**
- * \name SECTION: Module settings
- *
- * The configuration options you can set for this module are in this section.
- * Either change them in config.h or define them on the compiler command line.
- * \{
- */
-
-#if !defined(MBEDTLS_ECP_MAX_BITS)
-/**
- * Maximum size of the groups (that is, of N and P)
- */
-#define MBEDTLS_ECP_MAX_BITS 521 /**< Maximum bit size of groups */
-#endif
-
-#define MBEDTLS_ECP_MAX_BYTES ( ( MBEDTLS_ECP_MAX_BITS + 7 ) / 8 )
-#define MBEDTLS_ECP_MAX_PT_LEN ( 2 * MBEDTLS_ECP_MAX_BYTES + 1 )
-
-#if !defined(MBEDTLS_ECP_WINDOW_SIZE)
-/*
- * Maximum "window" size used for point multiplication.
- * Default: 6.
- * Minimum value: 2. Maximum value: 7.
- *
- * Result is an array of at most ( 1 << ( MBEDTLS_ECP_WINDOW_SIZE - 1 ) )
- * points used for point multiplication. This value is directly tied to EC
- * peak memory usage, so decreasing it by one should roughly cut memory usage
- * by two (if large curves are in use).
- *
- * Reduction in size may reduce speed, but larger curves are impacted first.
- * Sample performances (in ECDHE handshakes/s, with FIXED_POINT_OPTIM = 1):
- * w-size: 6 5 4 3 2
- * 521 145 141 135 120 97
- * 384 214 209 198 177 146
- * 256 320 320 303 262 226
-
- * 224 475 475 453 398 342
- * 192 640 640 633 587 476
- */
-#define MBEDTLS_ECP_WINDOW_SIZE 6 /**< Maximum window size used */
-#endif /* MBEDTLS_ECP_WINDOW_SIZE */
-
-#if !defined(MBEDTLS_ECP_FIXED_POINT_OPTIM)
-/*
- * Trade memory for speed on fixed-point multiplication.
- *
- * This speeds up repeated multiplication of the generator (that is, the
- * multiplication in ECDSA signatures, and half of the multiplications in
- * ECDSA verification and ECDHE) by a factor roughly 3 to 4.
- *
- * The cost is increasing EC peak memory usage by a factor roughly 2.
- *
- * Change this value to 0 to reduce peak memory usage.
- */
-#define MBEDTLS_ECP_FIXED_POINT_OPTIM 1 /**< Enable fixed-point speed-up */
-#endif /* MBEDTLS_ECP_FIXED_POINT_OPTIM */
-
-/* \} name SECTION: Module settings */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // MBEDTLS_ECP_ALT
diff --git a/third_party/NordicSemiconductor/libraries/crypto/ecp_alt_cc310.c b/third_party/NordicSemiconductor/libraries/crypto/ecp_alt_cc310.c
deleted file mode 100644
index d2a6578..0000000
--- a/third_party/NordicSemiconductor/libraries/crypto/ecp_alt_cc310.c
+++ /dev/null
@@ -1,3223 +0,0 @@
-/*
- * Copyright (c) 2018, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Elliptic curves over GF(p): generic functions
- *
- * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- * This file is part of mbed TLS (https://tls.mbed.org)
- */
-
-/*
- * References:
- *
- * SEC1 http://www.secg.org/index.php?action=secg,docs_secg
- * GECC = Guide to Elliptic Curve Cryptography - Hankerson, Menezes, Vanstone
- * FIPS 186-3 http://csrc.nist.gov/publications/fips/fips186-3/fips_186-3.pdf
- * RFC 4492 for the related TLS structures and constants
- * RFC 7748 for the Curve448 and Curve25519 curve definitions
- *
- * [Curve25519] http://cr.yp.to/ecdh/curve25519-20060209.pdf
- *
- * [2] CORON, Jean-S'ebastien. Resistance against differential power analysis
- * for elliptic curve cryptosystems. In : Cryptographic Hardware and
- * Embedded Systems. Springer Berlin Heidelberg, 1999. p. 292-302.
- * <http://link.springer.com/chapter/10.1007/3-540-48059-5_25>
- *
- * [3] HEDABOU, Mustapha, PINEL, Pierre, et B'EN'ETEAU, Lucien. A comb method to
- * render ECC resistant against Side Channel Attacks. IACR Cryptology
- * ePrint Archive, 2004, vol. 2004, p. 342.
- * <http://eprint.iacr.org/2004/342.pdf>
- */
-
- /*
- * Changes to original file:
- * - Hardware accelerated EC point multiplication.
- * - Hardware accelerated EC key pair generation.
- *
- * Added lines [103 - 107]
- * Added lines [126 - 185] from ecp.h (lines [188 - 250] with lines [246 - 248] excluded)
- * Added lines [502 - 749]
- * Changed code in [2620 - 2631] to use HW acceleration if possible
- * Changed code in [3005 - 3013] to use HW acceleration if possible
- *
- * Original files (ecp.c, ecp.h) from d369956d42764dc8173a8bf8106ed0f1defedec6
- */
-
-
-#if !defined(MBEDTLS_CONFIG_FILE)
-#include "mbedtls/config.h"
-#else
-#include MBEDTLS_CONFIG_FILE
-#endif
-
-#if defined(MBEDTLS_ECP_C)
-
-#include "mbedtls/ecp.h"
-#include "mbedtls/threading.h"
-#include "mbedtls/platform_util.h"
-
-#include <string.h>
-
-#if defined(MBEDTLS_ECP_ALT)
-
-#include "cc310_mbedtls.h"
-#include "crys_rnd.h"
-#include "crys_ecpki_kg.h"
-#include "crys_ecpki_domain.h"
-#include "ssi_bitops.h"
-
-#if defined(MBEDTLS_PLATFORM_C)
-#include "mbedtls/platform.h"
-#else
-#include <stdlib.h>
-#include <stdio.h>
-#define mbedtls_printf printf
-#define mbedtls_calloc calloc
-#define mbedtls_free free
-#endif
-
-#include "mbedtls/ecp_internal.h"
-
-#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
- !defined(inline) && !defined(__cplusplus)
-#define inline __inline
-#endif
-
-#if defined(MBEDTLS_SELF_TEST)
-/*
- * Counts of point addition and doubling, and field multiplications.
- * Used to test resistance of point multiplication to simple timing attacks.
- */
-static unsigned long add_count, dbl_count, mul_count;
-#endif
-
-#if defined(MBEDTLS_ECP_RESTARTABLE)
-
-/**
- * \brief Internal restart context for multiplication
- *
- * \note Opaque struct
- */
-typedef struct mbedtls_ecp_restart_mul mbedtls_ecp_restart_mul_ctx;
-
-/**
- * \brief Internal restart context for ecp_muladd()
- *
- * \note Opaque struct
- */
-typedef struct mbedtls_ecp_restart_muladd mbedtls_ecp_restart_muladd_ctx;
-
-/**
- * \brief General context for resuming ECC operations
- */
-typedef struct
-{
- unsigned ops_done; /*!< current ops count */
- unsigned depth; /*!< call depth (0 = top-level) */
- mbedtls_ecp_restart_mul_ctx *rsm; /*!< ecp_mul_comb() sub-context */
- mbedtls_ecp_restart_muladd_ctx *ma; /*!< ecp_muladd() sub-context */
-} mbedtls_ecp_restart_ctx;
-
-/*
- * Operation counts for restartable functions
- */
-#define MBEDTLS_ECP_OPS_CHK 3 /*!< basic ops count for ecp_check_pubkey() */
-#define MBEDTLS_ECP_OPS_DBL 8 /*!< basic ops count for ecp_double_jac() */
-#define MBEDTLS_ECP_OPS_ADD 11 /*!< basic ops count for see ecp_add_mixed() */
-#define MBEDTLS_ECP_OPS_INV 120 /*!< empirical equivalent for mpi_mod_inv() */
-
-/**
- * \brief Internal; for restartable functions in other modules.
- * Check and update basic ops budget.
- *
- * \param grp Group structure
- * \param rs_ctx Restart context
- * \param ops Number of basic ops to do
- *
- * \return \c 0 if doing \p ops basic ops is still allowed,
- * \return #MBEDTLS_ERR_ECP_IN_PROGRESS otherwise.
- */
-int mbedtls_ecp_check_budget( const mbedtls_ecp_group *grp,
- mbedtls_ecp_restart_ctx *rs_ctx,
- unsigned ops );
-
-/* Utility macro for checking and updating ops budget */
-#define MBEDTLS_ECP_BUDGET( ops ) \
- MBEDTLS_MPI_CHK( mbedtls_ecp_check_budget( grp, rs_ctx, \
- (unsigned) (ops) ) );
-
-#else /* MBEDTLS_ECP_RESTARTABLE */
-
-#define MBEDTLS_ECP_BUDGET( ops ) /* no-op; for compatibility */
-
-#endif /* MBEDTLS_ECP_RESTARTABLE */
-
-#if defined(MBEDTLS_ECP_RESTARTABLE)
-/*
- * Maximum number of "basic operations" to be done in a row.
- *
- * Default value 0 means that ECC operations will not yield.
- * Note that regardless of the value of ecp_max_ops, always at
- * least one step is performed before yielding.
- *
- * Setting ecp_max_ops=1 can be suitable for testing purposes
- * as it will interrupt computation at all possible points.
- */
-static unsigned ecp_max_ops = 0;
-
-/*
- * Set ecp_max_ops
- */
-void mbedtls_ecp_set_max_ops( unsigned max_ops )
-{
- ecp_max_ops = max_ops;
-}
-
-/*
- * Check if restart is enabled
- */
-int mbedtls_ecp_restart_is_enabled( void )
-{
- return( ecp_max_ops != 0 );
-}
-
-/*
- * Restart sub-context for ecp_mul_comb()
- */
-struct mbedtls_ecp_restart_mul
-{
- mbedtls_ecp_point R; /* current intermediate result */
- size_t i; /* current index in various loops, 0 outside */
- mbedtls_ecp_point *T; /* table for precomputed points */
- unsigned char T_size; /* number of points in table T */
- enum { /* what were we doing last time we returned? */
- ecp_rsm_init = 0, /* nothing so far, dummy initial state */
- ecp_rsm_pre_dbl, /* precompute 2^n multiples */
- ecp_rsm_pre_norm_dbl, /* normalize precomputed 2^n multiples */
- ecp_rsm_pre_add, /* precompute remaining points by adding */
- ecp_rsm_pre_norm_add, /* normalize all precomputed points */
- ecp_rsm_comb_core, /* ecp_mul_comb_core() */
- ecp_rsm_final_norm, /* do the final normalization */
- } state;
-};
-
-/*
- * Init restart_mul sub-context
- */
-static void ecp_restart_rsm_init( mbedtls_ecp_restart_mul_ctx *ctx )
-{
- mbedtls_ecp_point_init( &ctx->R );
- ctx->i = 0;
- ctx->T = NULL;
- ctx->T_size = 0;
- ctx->state = ecp_rsm_init;
-}
-
-/*
- * Free the components of a restart_mul sub-context
- */
-static void ecp_restart_rsm_free( mbedtls_ecp_restart_mul_ctx *ctx )
-{
- unsigned char i;
-
- if( ctx == NULL )
- return;
-
- mbedtls_ecp_point_free( &ctx->R );
-
- if( ctx->T != NULL )
- {
- for( i = 0; i < ctx->T_size; i++ )
- mbedtls_ecp_point_free( ctx->T + i );
- mbedtls_free( ctx->T );
- }
-
- ecp_restart_rsm_init( ctx );
-}
-
-/*
- * Restart context for ecp_muladd()
- */
-struct mbedtls_ecp_restart_muladd
-{
- mbedtls_ecp_point mP; /* mP value */
- mbedtls_ecp_point R; /* R intermediate result */
- enum { /* what should we do next? */
- ecp_rsma_mul1 = 0, /* first multiplication */
- ecp_rsma_mul2, /* second multiplication */
- ecp_rsma_add, /* addition */
- ecp_rsma_norm, /* normalization */
- } state;
-};
-
-/*
- * Init restart_muladd sub-context
- */
-static void ecp_restart_ma_init( mbedtls_ecp_restart_muladd_ctx *ctx )
-{
- mbedtls_ecp_point_init( &ctx->mP );
- mbedtls_ecp_point_init( &ctx->R );
- ctx->state = ecp_rsma_mul1;
-}
-
-/*
- * Free the components of a restart_muladd sub-context
- */
-static void ecp_restart_ma_free( mbedtls_ecp_restart_muladd_ctx *ctx )
-{
- if( ctx == NULL )
- return;
-
- mbedtls_ecp_point_free( &ctx->mP );
- mbedtls_ecp_point_free( &ctx->R );
-
- ecp_restart_ma_init( ctx );
-}
-
-/*
- * Initialize a restart context
- */
-void mbedtls_ecp_restart_init( mbedtls_ecp_restart_ctx *ctx )
-{
- ctx->ops_done = 0;
- ctx->depth = 0;
- ctx->rsm = NULL;
- ctx->ma = NULL;
-}
-
-/*
- * Free the components of a restart context
- */
-void mbedtls_ecp_restart_free( mbedtls_ecp_restart_ctx *ctx )
-{
- if( ctx == NULL )
- return;
-
- ecp_restart_rsm_free( ctx->rsm );
- mbedtls_free( ctx->rsm );
-
- ecp_restart_ma_free( ctx->ma );
- mbedtls_free( ctx->ma );
-
- mbedtls_ecp_restart_init( ctx );
-}
-
-/*
- * Check if we can do the next step
- */
-int mbedtls_ecp_check_budget( const mbedtls_ecp_group *grp,
- mbedtls_ecp_restart_ctx *rs_ctx,
- unsigned ops )
-{
- if( rs_ctx != NULL && ecp_max_ops != 0 )
- {
- /* scale depending on curve size: the chosen reference is 256-bit,
- * and multiplication is quadratic. Round to the closest integer. */
- if( grp->pbits >= 512 )
- ops *= 4;
- else if( grp->pbits >= 384 )
- ops *= 2;
-
- /* Avoid infinite loops: always allow first step.
- * Because of that, however, it's not generally true
- * that ops_done <= ecp_max_ops, so the check
- * ops_done > ecp_max_ops below is mandatory. */
- if( ( rs_ctx->ops_done != 0 ) &&
- ( rs_ctx->ops_done > ecp_max_ops ||
- ops > ecp_max_ops - rs_ctx->ops_done ) )
- {
- return( MBEDTLS_ERR_ECP_IN_PROGRESS );
- }
-
- /* update running count */
- rs_ctx->ops_done += ops;
- }
-
- return( 0 );
-}
-
-/* Call this when entering a function that needs its own sub-context */
-#define ECP_RS_ENTER( SUB ) do { \
- /* reset ops count for this call if top-level */ \
- if( rs_ctx != NULL && rs_ctx->depth++ == 0 ) \
- rs_ctx->ops_done = 0; \
- \
- /* set up our own sub-context if needed */ \
- if( mbedtls_ecp_restart_is_enabled() && \
- rs_ctx != NULL && rs_ctx->SUB == NULL ) \
- { \
- rs_ctx->SUB = mbedtls_calloc( 1, sizeof( *rs_ctx->SUB ) ); \
- if( rs_ctx->SUB == NULL ) \
- return( MBEDTLS_ERR_ECP_ALLOC_FAILED ); \
- \
- ecp_restart_## SUB ##_init( rs_ctx->SUB ); \
- } \
-} while( 0 )
-
-/* Call this when leaving a function that needs its own sub-context */
-#define ECP_RS_LEAVE( SUB ) do { \
- /* clear our sub-context when not in progress (done or error) */ \
- if( rs_ctx != NULL && rs_ctx->SUB != NULL && \
- ret != MBEDTLS_ERR_ECP_IN_PROGRESS ) \
- { \
- ecp_restart_## SUB ##_free( rs_ctx->SUB ); \
- mbedtls_free( rs_ctx->SUB ); \
- rs_ctx->SUB = NULL; \
- } \
- \
- if( rs_ctx != NULL ) \
- rs_ctx->depth--; \
-} while( 0 )
-
-#else /* MBEDTLS_ECP_RESTARTABLE */
-
-#define ECP_RS_ENTER( sub ) (void) rs_ctx;
-#define ECP_RS_LEAVE( sub ) (void) rs_ctx;
-
-#endif /* MBEDTLS_ECP_RESTARTABLE */
-
-#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) || \
- defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) || \
- defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) || \
- defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) || \
- defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) || \
- defined(MBEDTLS_ECP_DP_BP256R1_ENABLED) || \
- defined(MBEDTLS_ECP_DP_BP384R1_ENABLED) || \
- defined(MBEDTLS_ECP_DP_BP512R1_ENABLED) || \
- defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) || \
- defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) || \
- defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
-#define ECP_SHORTWEIERSTRASS
-#endif
-
-#if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) || \
- defined(MBEDTLS_ECP_DP_CURVE448_ENABLED)
-#define ECP_MONTGOMERY
-#endif
-
-/*
- * Curve types: internal for now, might be exposed later
- */
-typedef enum
-{
- ECP_TYPE_NONE = 0,
- ECP_TYPE_SHORT_WEIERSTRASS, /* y^2 = x^3 + a x + b */
- ECP_TYPE_MONTGOMERY, /* y^2 = x^3 + a x^2 + x */
-} ecp_curve_type;
-
-/*
- * List of supported curves:
- * - internal ID
- * - TLS NamedCurve ID (RFC 4492 sec. 5.1.1, RFC 7071 sec. 2)
- * - size in bits
- * - readable name
- *
- * Curves are listed in order: largest curves first, and for a given size,
- * fastest curves first. This provides the default order for the SSL module.
- *
- * Reminder: update profiles in x509_crt.c when adding a new curves!
- */
-static const mbedtls_ecp_curve_info ecp_supported_curves[] =
-{
-#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
- { MBEDTLS_ECP_DP_SECP521R1, 25, 521, "secp521r1" },
-#endif
-#if defined(MBEDTLS_ECP_DP_BP512R1_ENABLED)
- { MBEDTLS_ECP_DP_BP512R1, 28, 512, "brainpoolP512r1" },
-#endif
-#if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
- { MBEDTLS_ECP_DP_SECP384R1, 24, 384, "secp384r1" },
-#endif
-#if defined(MBEDTLS_ECP_DP_BP384R1_ENABLED)
- { MBEDTLS_ECP_DP_BP384R1, 27, 384, "brainpoolP384r1" },
-#endif
-#if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED)
- { MBEDTLS_ECP_DP_SECP256R1, 23, 256, "secp256r1" },
-#endif
-#if defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
- { MBEDTLS_ECP_DP_SECP256K1, 22, 256, "secp256k1" },
-#endif
-#if defined(MBEDTLS_ECP_DP_BP256R1_ENABLED)
- { MBEDTLS_ECP_DP_BP256R1, 26, 256, "brainpoolP256r1" },
-#endif
-#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED)
- { MBEDTLS_ECP_DP_SECP224R1, 21, 224, "secp224r1" },
-#endif
-#if defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED)
- { MBEDTLS_ECP_DP_SECP224K1, 20, 224, "secp224k1" },
-#endif
-#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
- { MBEDTLS_ECP_DP_SECP192R1, 19, 192, "secp192r1" },
-#endif
-#if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED)
- { MBEDTLS_ECP_DP_SECP192K1, 18, 192, "secp192k1" },
-#endif
- { MBEDTLS_ECP_DP_NONE, 0, 0, NULL },
-};
-
-#define ECP_NB_CURVES sizeof( ecp_supported_curves ) / \
- sizeof( ecp_supported_curves[0] )
-
-static mbedtls_ecp_group_id ecp_supported_grp_id[ECP_NB_CURVES];
-
-extern CRYSError_t PkaEcWrstScalarMult(const CRYS_ECPKI_Domain_t *pDomain,
- const uint32_t *scalar,
- uint32_t scalSizeInWords,
- uint32_t *inPointX,
- uint32_t *inPointY,
- uint32_t *outPointX,
- uint32_t *outPointY,
- uint32_t *tmpBuff);
-
-extern CRYS_RND_State_t * pRndState;
-
-#define CC_CALLOC_CHECK(ptr, size) \
-do \
-{ \
- if (( ptr = mbedtls_calloc( 1, size ) ) == NULL ) \
- { \
- ret = MBEDTLS_ERR_ECP_ALLOC_FAILED; \
- goto cleanup; \
- } \
-} while (0)
-
-#define CC_CHECK_FREE(ptr) \
-do \
-{ \
- if (ptr != NULL) \
- { \
- mbedtls_free( ptr ); \
- } \
-} while (0)
-
-static void endianess_swap( uint32_t * buf, uint32_t len )
-{
- for ( uint32_t i = 0; i < len / 2; i++ )
- {
- uint32_t temp = buf[i];
- buf[i] = SWAP_ENDIAN( buf[len - i - 1] );
- buf[len - i - 1] = SWAP_ENDIAN( temp );
- }
-
- // Handle the middle value in case of an odd len.
- if (len % 2)
- {
- buf[len / 2 + 1] = SWAP_ENDIAN( buf[len / 2 + 1] );
- }
-}
-
-static CRYS_ECPKI_DomainID_t mbedtls_to_cryptocell_group_id( mbedtls_ecp_group_id grp_id )
-{
- CRYS_ECPKI_DomainID_t cc_id = CRYS_ECPKI_DomainIDLast;
- switch ( grp_id )
- {
- case MBEDTLS_ECP_DP_SECP192R1:
- cc_id = CRYS_ECPKI_DomainID_secp192r1;
- break;
-
- case MBEDTLS_ECP_DP_SECP224R1:
- cc_id = CRYS_ECPKI_DomainID_secp224r1;
- break;
-
- case MBEDTLS_ECP_DP_SECP256R1:
- cc_id = CRYS_ECPKI_DomainID_secp256r1;
- break;
-
- case MBEDTLS_ECP_DP_SECP384R1:
- cc_id = CRYS_ECPKI_DomainID_secp384r1;
- break;
-
- case MBEDTLS_ECP_DP_SECP521R1:
- cc_id = CRYS_ECPKI_DomainID_secp521r1;
- break;
-
- case MBEDTLS_ECP_DP_SECP192K1:
- cc_id = CRYS_ECPKI_DomainID_secp192k1;
- break;
-
- case MBEDTLS_ECP_DP_SECP224K1:
- cc_id = CRYS_ECPKI_DomainID_secp224k1;
- break;
-
- case MBEDTLS_ECP_DP_SECP256K1:
- cc_id = CRYS_ECPKI_DomainID_secp256k1;
- break;
-
- case MBEDTLS_ECP_DP_CURVE25519:
- // Not implemented.
- break;
-
- case MBEDTLS_ECP_DP_NONE:
- case MBEDTLS_ECP_DP_BP256R1:
- case MBEDTLS_ECP_DP_BP384R1:
- case MBEDTLS_ECP_DP_CURVE448:
- case MBEDTLS_ECP_DP_BP512R1:
- // Not supported.
- break;
- }
-
- return cc_id;
-}
-
-#if defined(ECP_SHORTWEIERSTRASS)
-
-/*
- * Multiplication with CryptoCell hardware acceleration,
- * for curves in short Weierstrass form
- */
-static int ecp_mul_ws_cryptocell( CRYS_ECPKI_DomainID_t grp_id, mbedtls_ecp_point *R,
- const mbedtls_mpi *m, const mbedtls_ecp_point *P )
-{
- int ret = MBEDTLS_ERR_ECP_ALLOC_FAILED;
-
- const CRYS_ECPKI_Domain_t * pDomain = CRYS_ECPKI_GetEcDomain( grp_id );
-
- uint32_t orderSizeInWords = ( pDomain->ordSizeInBits + ( 8 * sizeof( uint32_t ) ) - 1 ) /
- ( 8 * sizeof( uint32_t ) );
-
- uint32_t *scalar = NULL;
- uint32_t *inPointX = NULL;
- uint32_t *inPointY = NULL;
- uint32_t *outPointX = NULL;
- uint32_t *outPointY = NULL;
- uint32_t *tmpBuff = NULL;
-
- CC_CALLOC_CHECK(scalar, sizeof(uint32_t) * CRYS_ECPKI_MODUL_MAX_LENGTH_IN_WORDS);
- CC_CALLOC_CHECK(inPointX, sizeof(uint32_t) * CRYS_ECPKI_MODUL_MAX_LENGTH_IN_WORDS);
- CC_CALLOC_CHECK(inPointY, sizeof(uint32_t) * CRYS_ECPKI_MODUL_MAX_LENGTH_IN_WORDS);
- CC_CALLOC_CHECK(outPointX, sizeof(uint32_t) * CRYS_ECPKI_MODUL_MAX_LENGTH_IN_WORDS);
- CC_CALLOC_CHECK(outPointY, sizeof(uint32_t) * CRYS_ECPKI_MODUL_MAX_LENGTH_IN_WORDS);
- CC_CALLOC_CHECK(tmpBuff, sizeof(uint32_t) * CRYS_PKA_ECPKI_SCALAR_MUL_BUFF_MAX_LENGTH_IN_WORDS);
-
- // Convert input from mbedTLS to CryptoCell convention.
- mbedtls_mpi_write_binary( m, ( uint8_t *)scalar, sizeof( uint32_t ) * orderSizeInWords );
- mbedtls_mpi_write_binary( &P->X, ( uint8_t * )inPointX, sizeof( uint32_t ) * orderSizeInWords );
- mbedtls_mpi_write_binary( &P->Y, ( uint8_t * )inPointY, sizeof( uint32_t ) * orderSizeInWords );
- endianess_swap( scalar, orderSizeInWords );
- endianess_swap( inPointX, orderSizeInWords );
- endianess_swap( inPointY, orderSizeInWords );
-
- // Multipy point by scalar.
- CRYSError_t error;
- CC310_OPERATION(PkaEcWrstScalarMult( pDomain, scalar, orderSizeInWords,
- inPointX, inPointY, outPointX, outPointY, tmpBuff ),
- error);
-
- if ( error == CRYS_OK )
- {
- // Convert output from CryptoCell to mbedTLS convention.
- mbedtls_mpi_read_binary( &R->X, ( const uint8_t * )outPointX,
- sizeof( uint32_t ) * orderSizeInWords );
- mbedtls_mpi_read_binary( &R->Y, ( const uint8_t * )outPointY,
- sizeof( uint32_t ) * orderSizeInWords );
- mbedtls_mpi_lset( &R->Z, 1 );
- endianess_swap( R->X.p, orderSizeInWords );
- endianess_swap( R->Y.p, orderSizeInWords );
-
- ret = 0;
- }
- else
- {
- ret = MBEDTLS_ERR_ECP_BAD_INPUT_DATA;
- }
-
-cleanup:
-
- CC_CHECK_FREE(scalar);
- CC_CHECK_FREE(inPointX);
- CC_CHECK_FREE(inPointY);
- CC_CHECK_FREE(outPointX);
- CC_CHECK_FREE(outPointY);
- CC_CHECK_FREE(tmpBuff);
-
- return ret;
-}
-
-#endif /* ECP_SHORTWEIERSTRASS */
-
-/*
- * Generate key pair with CryptoCell hardware acceleration.
- */
-static int ecp_gen_keypair_cryptocell( CRYS_ECPKI_DomainID_t grp_id, const mbedtls_ecp_point *G,
- mbedtls_mpi *d, mbedtls_ecp_point *Q )
-{
- int ret = MBEDTLS_ERR_ECP_ALLOC_FAILED;
- uint32_t orderSizeInWords;
-
- CRYS_ECPKI_UserPrivKey_t *UserPrivKey = NULL;
- CRYS_ECPKI_UserPublKey_t *UserPublKey = NULL;
- CRYS_ECPKI_KG_TempData_t *TempECCKGBuff = NULL;
- CRYS_ECPKI_KG_FipsContext_t *FipsBuff = NULL;
- CRYS_ECPKI_Domain_t *domain = NULL;
-
- CC_CALLOC_CHECK(UserPrivKey, sizeof( *UserPrivKey ));
- CC_CALLOC_CHECK(UserPublKey, sizeof( *UserPublKey ));
- CC_CALLOC_CHECK(TempECCKGBuff, sizeof( *TempECCKGBuff ));
- CC_CALLOC_CHECK(FipsBuff, sizeof( *FipsBuff ));
- CC_CALLOC_CHECK(domain, sizeof( *domain ));
-
- *domain = *CRYS_ECPKI_GetEcDomain( grp_id );
-
- orderSizeInWords = ( domain->ordSizeInBits + ( 8 * sizeof( uint32_t ) ) - 1 ) /
- ( 8 * sizeof( uint32_t ) );
-
- // Copy generator point from mbedTLS to CryptoCell convention.
- mbedtls_mpi_write_binary( &G->X, ( uint8_t * )domain->ecGx, sizeof( uint32_t ) * orderSizeInWords );
- mbedtls_mpi_write_binary( &G->Y, ( uint8_t * )domain->ecGy, sizeof( uint32_t ) * orderSizeInWords );
- endianess_swap(domain->ecGx, orderSizeInWords);
- endianess_swap(domain->ecGy, orderSizeInWords);
-
- // Generate keys with CryptoCell.
- CRYSError_t error;
- CC310_OPERATION(CRYS_ECPKI_GenKeyPair( pRndState, CRYS_RND_GenerateVector, domain,
- UserPrivKey, UserPublKey, TempECCKGBuff, FipsBuff ),
- error);
-
- if (error == CRYS_OK)
- {
- CRYS_ECPKI_PrivKey_t * privateKey = ( CRYS_ECPKI_PrivKey_t * )UserPrivKey->PrivKeyDbBuff;
- CRYS_ECPKI_PublKey_t * publicKey = ( CRYS_ECPKI_PublKey_t * )UserPublKey->PublKeyDbBuff;
-
- // Convert keys from CryptoCell to mbedTLS convention.
- mbedtls_mpi_read_binary( d, ( const uint8_t * )privateKey->PrivKey,
- sizeof( uint32_t ) * orderSizeInWords );
- endianess_swap(d->p, orderSizeInWords);
-
- mbedtls_mpi_read_binary( &Q->X, ( const uint8_t * )publicKey->x,
- sizeof( uint32_t ) * orderSizeInWords );
- mbedtls_mpi_read_binary( &Q->Y, ( const uint8_t * )publicKey->y,
- sizeof( uint32_t ) * orderSizeInWords );
- mbedtls_mpi_lset( &Q->Z, 1 );
- endianess_swap( Q->X.p, orderSizeInWords );
- endianess_swap( Q->Y.p, orderSizeInWords );
-
- ret = 0;
- }
- else
- {
- ret = MBEDTLS_ERR_ECP_BAD_INPUT_DATA;
- }
-
-cleanup:
-
- CC_CHECK_FREE(UserPrivKey);
- CC_CHECK_FREE(UserPublKey);
- CC_CHECK_FREE(TempECCKGBuff);
- CC_CHECK_FREE(FipsBuff);
- CC_CHECK_FREE(domain);
-
- return ret;
-}
-
-/*
- * List of supported curves and associated info
- */
-const mbedtls_ecp_curve_info *mbedtls_ecp_curve_list( void )
-{
- return( ecp_supported_curves );
-}
-
-/*
- * List of supported curves, group ID only
- */
-const mbedtls_ecp_group_id *mbedtls_ecp_grp_id_list( void )
-{
- static int init_done = 0;
-
- if( ! init_done )
- {
- size_t i = 0;
- const mbedtls_ecp_curve_info *curve_info;
-
- for( curve_info = mbedtls_ecp_curve_list();
- curve_info->grp_id != MBEDTLS_ECP_DP_NONE;
- curve_info++ )
- {
- ecp_supported_grp_id[i++] = curve_info->grp_id;
- }
- ecp_supported_grp_id[i] = MBEDTLS_ECP_DP_NONE;
-
- init_done = 1;
- }
-
- return( ecp_supported_grp_id );
-}
-
-/*
- * Get the curve info for the internal identifier
- */
-const mbedtls_ecp_curve_info *mbedtls_ecp_curve_info_from_grp_id( mbedtls_ecp_group_id grp_id )
-{
- const mbedtls_ecp_curve_info *curve_info;
-
- for( curve_info = mbedtls_ecp_curve_list();
- curve_info->grp_id != MBEDTLS_ECP_DP_NONE;
- curve_info++ )
- {
- if( curve_info->grp_id == grp_id )
- return( curve_info );
- }
-
- return( NULL );
-}
-
-/*
- * Get the curve info from the TLS identifier
- */
-const mbedtls_ecp_curve_info *mbedtls_ecp_curve_info_from_tls_id( uint16_t tls_id )
-{
- const mbedtls_ecp_curve_info *curve_info;
-
- for( curve_info = mbedtls_ecp_curve_list();
- curve_info->grp_id != MBEDTLS_ECP_DP_NONE;
- curve_info++ )
- {
- if( curve_info->tls_id == tls_id )
- return( curve_info );
- }
-
- return( NULL );
-}
-
-/*
- * Get the curve info from the name
- */
-const mbedtls_ecp_curve_info *mbedtls_ecp_curve_info_from_name( const char *name )
-{
- const mbedtls_ecp_curve_info *curve_info;
-
- for( curve_info = mbedtls_ecp_curve_list();
- curve_info->grp_id != MBEDTLS_ECP_DP_NONE;
- curve_info++ )
- {
- if( strcmp( curve_info->name, name ) == 0 )
- return( curve_info );
- }
-
- return( NULL );
-}
-
-/*
- * Get the type of a curve
- */
-static inline ecp_curve_type ecp_get_type( const mbedtls_ecp_group *grp )
-{
- if( grp->G.X.p == NULL )
- return( ECP_TYPE_NONE );
-
- if( grp->G.Y.p == NULL )
- return( ECP_TYPE_MONTGOMERY );
- else
- return( ECP_TYPE_SHORT_WEIERSTRASS );
-}
-
-/*
- * Initialize (the components of) a point
- */
-void mbedtls_ecp_point_init( mbedtls_ecp_point *pt )
-{
- if( pt == NULL )
- return;
-
- mbedtls_mpi_init( &pt->X );
- mbedtls_mpi_init( &pt->Y );
- mbedtls_mpi_init( &pt->Z );
-}
-
-/*
- * Initialize (the components of) a group
- */
-void mbedtls_ecp_group_init( mbedtls_ecp_group *grp )
-{
- if( grp == NULL )
- return;
-
- grp->id = MBEDTLS_ECP_DP_NONE;
- mbedtls_mpi_init( &grp->P );
- mbedtls_mpi_init( &grp->A );
- mbedtls_mpi_init( &grp->B );
- mbedtls_ecp_point_init( &grp->G );
- mbedtls_mpi_init( &grp->N );
- grp->pbits = 0;
- grp->nbits = 0;
- grp->h = 0;
- grp->modp = NULL;
- grp->t_pre = NULL;
- grp->t_post = NULL;
- grp->t_data = NULL;
- grp->T = NULL;
- grp->T_size = 0;
-}
-
-/*
- * Initialize (the components of) a key pair
- */
-void mbedtls_ecp_keypair_init( mbedtls_ecp_keypair *key )
-{
- if( key == NULL )
- return;
-
- mbedtls_ecp_group_init( &key->grp );
- mbedtls_mpi_init( &key->d );
- mbedtls_ecp_point_init( &key->Q );
-}
-
-/*
- * Unallocate (the components of) a point
- */
-void mbedtls_ecp_point_free( mbedtls_ecp_point *pt )
-{
- if( pt == NULL )
- return;
-
- mbedtls_mpi_free( &( pt->X ) );
- mbedtls_mpi_free( &( pt->Y ) );
- mbedtls_mpi_free( &( pt->Z ) );
-}
-
-/*
- * Unallocate (the components of) a group
- */
-void mbedtls_ecp_group_free( mbedtls_ecp_group *grp )
-{
- size_t i;
-
- if( grp == NULL )
- return;
-
- if( grp->h != 1 )
- {
- mbedtls_mpi_free( &grp->P );
- mbedtls_mpi_free( &grp->A );
- mbedtls_mpi_free( &grp->B );
- mbedtls_ecp_point_free( &grp->G );
- mbedtls_mpi_free( &grp->N );
- }
-
- if( grp->T != NULL )
- {
- for( i = 0; i < grp->T_size; i++ )
- mbedtls_ecp_point_free( &grp->T[i] );
- mbedtls_free( grp->T );
- }
-
- mbedtls_platform_zeroize( grp, sizeof( mbedtls_ecp_group ) );
-}
-
-/*
- * Unallocate (the components of) a key pair
- */
-void mbedtls_ecp_keypair_free( mbedtls_ecp_keypair *key )
-{
- if( key == NULL )
- return;
-
- mbedtls_ecp_group_free( &key->grp );
- mbedtls_mpi_free( &key->d );
- mbedtls_ecp_point_free( &key->Q );
-}
-
-/*
- * Copy the contents of a point
- */
-int mbedtls_ecp_copy( mbedtls_ecp_point *P, const mbedtls_ecp_point *Q )
-{
- int ret;
-
- MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &P->X, &Q->X ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &P->Y, &Q->Y ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &P->Z, &Q->Z ) );
-
-cleanup:
- return( ret );
-}
-
-/*
- * Copy the contents of a group object
- */
-int mbedtls_ecp_group_copy( mbedtls_ecp_group *dst, const mbedtls_ecp_group *src )
-{
- return mbedtls_ecp_group_load( dst, src->id );
-}
-
-/*
- * Set point to zero
- */
-int mbedtls_ecp_set_zero( mbedtls_ecp_point *pt )
-{
- int ret;
-
- MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &pt->X , 1 ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &pt->Y , 1 ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &pt->Z , 0 ) );
-
-cleanup:
- return( ret );
-}
-
-/*
- * Tell if a point is zero
- */
-int mbedtls_ecp_is_zero( mbedtls_ecp_point *pt )
-{
- return( mbedtls_mpi_cmp_int( &pt->Z, 0 ) == 0 );
-}
-
-/*
- * Compare two points lazyly
- */
-int mbedtls_ecp_point_cmp( const mbedtls_ecp_point *P,
- const mbedtls_ecp_point *Q )
-{
- if( mbedtls_mpi_cmp_mpi( &P->X, &Q->X ) == 0 &&
- mbedtls_mpi_cmp_mpi( &P->Y, &Q->Y ) == 0 &&
- mbedtls_mpi_cmp_mpi( &P->Z, &Q->Z ) == 0 )
- {
- return( 0 );
- }
-
- return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA );
-}
-
-/*
- * Import a non-zero point from ASCII strings
- */
-int mbedtls_ecp_point_read_string( mbedtls_ecp_point *P, int radix,
- const char *x, const char *y )
-{
- int ret;
-
- MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &P->X, radix, x ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &P->Y, radix, y ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &P->Z, 1 ) );
-
-cleanup:
- return( ret );
-}
-
-/*
- * Export a point into unsigned binary data (SEC1 2.3.3)
- */
-int mbedtls_ecp_point_write_binary( const mbedtls_ecp_group *grp, const mbedtls_ecp_point *P,
- int format, size_t *olen,
- unsigned char *buf, size_t buflen )
-{
- int ret = 0;
- size_t plen;
-
- if( format != MBEDTLS_ECP_PF_UNCOMPRESSED &&
- format != MBEDTLS_ECP_PF_COMPRESSED )
- return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA );
-
- /*
- * Common case: P == 0
- */
- if( mbedtls_mpi_cmp_int( &P->Z, 0 ) == 0 )
- {
- if( buflen < 1 )
- return( MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL );
-
- buf[0] = 0x00;
- *olen = 1;
-
- return( 0 );
- }
-
- plen = mbedtls_mpi_size( &grp->P );
-
- if( format == MBEDTLS_ECP_PF_UNCOMPRESSED )
- {
- *olen = 2 * plen + 1;
-
- if( buflen < *olen )
- return( MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL );
-
- buf[0] = 0x04;
- MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( &P->X, buf + 1, plen ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( &P->Y, buf + 1 + plen, plen ) );
- }
- else if( format == MBEDTLS_ECP_PF_COMPRESSED )
- {
- *olen = plen + 1;
-
- if( buflen < *olen )
- return( MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL );
-
- buf[0] = 0x02 + mbedtls_mpi_get_bit( &P->Y, 0 );
- MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( &P->X, buf + 1, plen ) );
- }
-
-cleanup:
- return( ret );
-}
-
-/*
- * Import a point from unsigned binary data (SEC1 2.3.4)
- */
-int mbedtls_ecp_point_read_binary( const mbedtls_ecp_group *grp, mbedtls_ecp_point *pt,
- const unsigned char *buf, size_t ilen )
-{
- int ret;
- size_t plen;
-
- if( ilen < 1 )
- return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA );
-
- if( buf[0] == 0x00 )
- {
- if( ilen == 1 )
- return( mbedtls_ecp_set_zero( pt ) );
- else
- return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA );
- }
-
- plen = mbedtls_mpi_size( &grp->P );
-
- if( buf[0] != 0x04 )
- return( MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE );
-
- if( ilen != 2 * plen + 1 )
- return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA );
-
- MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( &pt->X, buf + 1, plen ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( &pt->Y, buf + 1 + plen, plen ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &pt->Z, 1 ) );
-
-cleanup:
- return( ret );
-}
-
-/*
- * Import a point from a TLS ECPoint record (RFC 4492)
- * struct {
- * opaque point <1..2^8-1>;
- * } ECPoint;
- */
-int mbedtls_ecp_tls_read_point( const mbedtls_ecp_group *grp, mbedtls_ecp_point *pt,
- const unsigned char **buf, size_t buf_len )
-{
- unsigned char data_len;
- const unsigned char *buf_start;
-
- /*
- * We must have at least two bytes (1 for length, at least one for data)
- */
- if( buf_len < 2 )
- return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA );
-
- data_len = *(*buf)++;
- if( data_len < 1 || data_len > buf_len - 1 )
- return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA );
-
- /*
- * Save buffer start for read_binary and update buf
- */
- buf_start = *buf;
- *buf += data_len;
-
- return mbedtls_ecp_point_read_binary( grp, pt, buf_start, data_len );
-}
-
-/*
- * Export a point as a TLS ECPoint record (RFC 4492)
- * struct {
- * opaque point <1..2^8-1>;
- * } ECPoint;
- */
-int mbedtls_ecp_tls_write_point( const mbedtls_ecp_group *grp, const mbedtls_ecp_point *pt,
- int format, size_t *olen,
- unsigned char *buf, size_t blen )
-{
- int ret;
-
- /*
- * buffer length must be at least one, for our length byte
- */
- if( blen < 1 )
- return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA );
-
- if( ( ret = mbedtls_ecp_point_write_binary( grp, pt, format,
- olen, buf + 1, blen - 1) ) != 0 )
- return( ret );
-
- /*
- * write length to the first byte and update total length
- */
- buf[0] = (unsigned char) *olen;
- ++*olen;
-
- return( 0 );
-}
-
-/*
- * Set a group from an ECParameters record (RFC 4492)
- */
-int mbedtls_ecp_tls_read_group( mbedtls_ecp_group *grp, const unsigned char **buf, size_t len )
-{
- uint16_t tls_id;
- const mbedtls_ecp_curve_info *curve_info;
-
- /*
- * We expect at least three bytes (see below)
- */
- if( len < 3 )
- return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA );
-
- /*
- * First byte is curve_type; only named_curve is handled
- */
- if( *(*buf)++ != MBEDTLS_ECP_TLS_NAMED_CURVE )
- return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA );
-
- /*
- * Next two bytes are the namedcurve value
- */
- tls_id = *(*buf)++;
- tls_id <<= 8;
- tls_id |= *(*buf)++;
-
- if( ( curve_info = mbedtls_ecp_curve_info_from_tls_id( tls_id ) ) == NULL )
- return( MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE );
-
- return mbedtls_ecp_group_load( grp, curve_info->grp_id );
-}
-
-/*
- * Write the ECParameters record corresponding to a group (RFC 4492)
- */
-int mbedtls_ecp_tls_write_group( const mbedtls_ecp_group *grp, size_t *olen,
- unsigned char *buf, size_t blen )
-{
- const mbedtls_ecp_curve_info *curve_info;
-
- if( ( curve_info = mbedtls_ecp_curve_info_from_grp_id( grp->id ) ) == NULL )
- return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA );
-
- /*
- * We are going to write 3 bytes (see below)
- */
- *olen = 3;
- if( blen < *olen )
- return( MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL );
-
- /*
- * First byte is curve_type, always named_curve
- */
- *buf++ = MBEDTLS_ECP_TLS_NAMED_CURVE;
-
- /*
- * Next two bytes are the namedcurve value
- */
- buf[0] = curve_info->tls_id >> 8;
- buf[1] = curve_info->tls_id & 0xFF;
-
- return( 0 );
-}
-
-/*
- * Wrapper around fast quasi-modp functions, with fall-back to mbedtls_mpi_mod_mpi.
- * See the documentation of struct mbedtls_ecp_group.
- *
- * This function is in the critial loop for mbedtls_ecp_mul, so pay attention to perf.
- */
-static int ecp_modp( mbedtls_mpi *N, const mbedtls_ecp_group *grp )
-{
- int ret;
-
- if( grp->modp == NULL )
- return( mbedtls_mpi_mod_mpi( N, N, &grp->P ) );
-
- /* N->s < 0 is a much faster test, which fails only if N is 0 */
- if( ( N->s < 0 && mbedtls_mpi_cmp_int( N, 0 ) != 0 ) ||
- mbedtls_mpi_bitlen( N ) > 2 * grp->pbits )
- {
- return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA );
- }
-
- MBEDTLS_MPI_CHK( grp->modp( N ) );
-
- /* N->s < 0 is a much faster test, which fails only if N is 0 */
- while( N->s < 0 && mbedtls_mpi_cmp_int( N, 0 ) != 0 )
- MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( N, N, &grp->P ) );
-
- while( mbedtls_mpi_cmp_mpi( N, &grp->P ) >= 0 )
- /* we known P, N and the result are positive */
- MBEDTLS_MPI_CHK( mbedtls_mpi_sub_abs( N, N, &grp->P ) );
-
-cleanup:
- return( ret );
-}
-
-/*
- * Fast mod-p functions expect their argument to be in the 0..p^2 range.
- *
- * In order to guarantee that, we need to ensure that operands of
- * mbedtls_mpi_mul_mpi are in the 0..p range. So, after each operation we will
- * bring the result back to this range.
- *
- * The following macros are shortcuts for doing that.
- */
-
-/*
- * Reduce a mbedtls_mpi mod p in-place, general case, to use after mbedtls_mpi_mul_mpi
- */
-#if defined(MBEDTLS_SELF_TEST)
-#define INC_MUL_COUNT mul_count++;
-#else
-#define INC_MUL_COUNT
-#endif
-
-#define MOD_MUL( N ) do { MBEDTLS_MPI_CHK( ecp_modp( &N, grp ) ); INC_MUL_COUNT } \
- while( 0 )
-
-/*
- * Reduce a mbedtls_mpi mod p in-place, to use after mbedtls_mpi_sub_mpi
- * N->s < 0 is a very fast test, which fails only if N is 0
- */
-#define MOD_SUB( N ) \
- while( N.s < 0 && mbedtls_mpi_cmp_int( &N, 0 ) != 0 ) \
- MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &N, &N, &grp->P ) )
-
-/*
- * Reduce a mbedtls_mpi mod p in-place, to use after mbedtls_mpi_add_mpi and mbedtls_mpi_mul_int.
- * We known P, N and the result are positive, so sub_abs is correct, and
- * a bit faster.
- */
-#define MOD_ADD( N ) \
- while( mbedtls_mpi_cmp_mpi( &N, &grp->P ) >= 0 ) \
- MBEDTLS_MPI_CHK( mbedtls_mpi_sub_abs( &N, &N, &grp->P ) )
-
-#if defined(ECP_SHORTWEIERSTRASS)
-/*
- * For curves in short Weierstrass form, we do all the internal operations in
- * Jacobian coordinates.
- *
- * For multiplication, we'll use a comb method with coutermeasueres against
- * SPA, hence timing attacks.
- */
-
-/*
- * Normalize jacobian coordinates so that Z == 0 || Z == 1 (GECC 3.2.1)
- * Cost: 1N := 1I + 3M + 1S
- */
-static int ecp_normalize_jac( const mbedtls_ecp_group *grp, mbedtls_ecp_point *pt )
-{
- int ret;
- mbedtls_mpi Zi, ZZi;
-
- if( mbedtls_mpi_cmp_int( &pt->Z, 0 ) == 0 )
- return( 0 );
-
-#if defined(MBEDTLS_ECP_NORMALIZE_JAC_ALT)
- if( mbedtls_internal_ecp_grp_capable( grp ) )
- return( mbedtls_internal_ecp_normalize_jac( grp, pt ) );
-#endif /* MBEDTLS_ECP_NORMALIZE_JAC_ALT */
-
- mbedtls_mpi_init( &Zi ); mbedtls_mpi_init( &ZZi );
-
- /*
- * X = X / Z^2 mod p
- */
- MBEDTLS_MPI_CHK( mbedtls_mpi_inv_mod( &Zi, &pt->Z, &grp->P ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &ZZi, &Zi, &Zi ) ); MOD_MUL( ZZi );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &pt->X, &pt->X, &ZZi ) ); MOD_MUL( pt->X );
-
- /*
- * Y = Y / Z^3 mod p
- */
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &pt->Y, &pt->Y, &ZZi ) ); MOD_MUL( pt->Y );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &pt->Y, &pt->Y, &Zi ) ); MOD_MUL( pt->Y );
-
- /*
- * Z = 1
- */
- MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &pt->Z, 1 ) );
-
-cleanup:
-
- mbedtls_mpi_free( &Zi ); mbedtls_mpi_free( &ZZi );
-
- return( ret );
-}
-
-/*
- * Normalize jacobian coordinates of an array of (pointers to) points,
- * using Montgomery's trick to perform only one inversion mod P.
- * (See for example Cohen's "A Course in Computational Algebraic Number
- * Theory", Algorithm 10.3.4.)
- *
- * Warning: fails (returning an error) if one of the points is zero!
- * This should never happen, see choice of w in ecp_mul_comb().
- *
- * Cost: 1N(t) := 1I + (6t - 3)M + 1S
- */
-static int ecp_normalize_jac_many( const mbedtls_ecp_group *grp,
- mbedtls_ecp_point *T[], size_t T_size )
-{
- int ret;
- size_t i;
- mbedtls_mpi *c, u, Zi, ZZi;
-
- if( T_size < 2 )
- return( ecp_normalize_jac( grp, *T ) );
-
-#if defined(MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT)
- if( mbedtls_internal_ecp_grp_capable( grp ) )
- return( mbedtls_internal_ecp_normalize_jac_many( grp, T, T_size ) );
-#endif
-
- if( ( c = mbedtls_calloc( T_size, sizeof( mbedtls_mpi ) ) ) == NULL )
- return( MBEDTLS_ERR_ECP_ALLOC_FAILED );
-
- for( i = 0; i < T_size; i++ )
- mbedtls_mpi_init( &c[i] );
-
- mbedtls_mpi_init( &u ); mbedtls_mpi_init( &Zi ); mbedtls_mpi_init( &ZZi );
-
- /*
- * c[i] = Z_0 * ... * Z_i
- */
- MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &c[0], &T[0]->Z ) );
- for( i = 1; i < T_size; i++ )
- {
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &c[i], &c[i-1], &T[i]->Z ) );
- MOD_MUL( c[i] );
- }
-
- /*
- * u = 1 / (Z_0 * ... * Z_n) mod P
- */
- MBEDTLS_MPI_CHK( mbedtls_mpi_inv_mod( &u, &c[T_size-1], &grp->P ) );
-
- for( i = T_size - 1; ; i-- )
- {
- /*
- * Zi = 1 / Z_i mod p
- * u = 1 / (Z_0 * ... * Z_i) mod P
- */
- if( i == 0 ) {
- MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &Zi, &u ) );
- }
- else
- {
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &Zi, &u, &c[i-1] ) ); MOD_MUL( Zi );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &u, &u, &T[i]->Z ) ); MOD_MUL( u );
- }
-
- /*
- * proceed as in normalize()
- */
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &ZZi, &Zi, &Zi ) ); MOD_MUL( ZZi );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T[i]->X, &T[i]->X, &ZZi ) ); MOD_MUL( T[i]->X );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T[i]->Y, &T[i]->Y, &ZZi ) ); MOD_MUL( T[i]->Y );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T[i]->Y, &T[i]->Y, &Zi ) ); MOD_MUL( T[i]->Y );
-
- /*
- * Post-precessing: reclaim some memory by shrinking coordinates
- * - not storing Z (always 1)
- * - shrinking other coordinates, but still keeping the same number of
- * limbs as P, as otherwise it will too likely be regrown too fast.
- */
- MBEDTLS_MPI_CHK( mbedtls_mpi_shrink( &T[i]->X, grp->P.n ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_shrink( &T[i]->Y, grp->P.n ) );
- mbedtls_mpi_free( &T[i]->Z );
-
- if( i == 0 )
- break;
- }
-
-cleanup:
-
- mbedtls_mpi_free( &u ); mbedtls_mpi_free( &Zi ); mbedtls_mpi_free( &ZZi );
- for( i = 0; i < T_size; i++ )
- mbedtls_mpi_free( &c[i] );
- mbedtls_free( c );
-
- return( ret );
-}
-
-/*
- * Conditional point inversion: Q -> -Q = (Q.X, -Q.Y, Q.Z) without leak.
- * "inv" must be 0 (don't invert) or 1 (invert) or the result will be invalid
- */
-static int ecp_safe_invert_jac( const mbedtls_ecp_group *grp,
- mbedtls_ecp_point *Q,
- unsigned char inv )
-{
- int ret;
- unsigned char nonzero;
- mbedtls_mpi mQY;
-
- mbedtls_mpi_init( &mQY );
-
- /* Use the fact that -Q.Y mod P = P - Q.Y unless Q.Y == 0 */
- MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &mQY, &grp->P, &Q->Y ) );
- nonzero = mbedtls_mpi_cmp_int( &Q->Y, 0 ) != 0;
- MBEDTLS_MPI_CHK( mbedtls_mpi_safe_cond_assign( &Q->Y, &mQY, inv & nonzero ) );
-
-cleanup:
- mbedtls_mpi_free( &mQY );
-
- return( ret );
-}
-
-/*
- * Point doubling R = 2 P, Jacobian coordinates
- *
- * Based on http://www.hyperelliptic.org/EFD/g1p/auto-shortw-jacobian.html#doubling-dbl-1998-cmo-2 .
- *
- * We follow the variable naming fairly closely. The formula variations that trade a MUL for a SQR
- * (plus a few ADDs) aren't useful as our bignum implementation doesn't distinguish squaring.
- *
- * Standard optimizations are applied when curve parameter A is one of { 0, -3 }.
- *
- * Cost: 1D := 3M + 4S (A == 0)
- * 4M + 4S (A == -3)
- * 3M + 6S + 1a otherwise
- */
-static int ecp_double_jac( const mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
- const mbedtls_ecp_point *P )
-{
- int ret;
- mbedtls_mpi M, S, T, U;
-
-#if defined(MBEDTLS_SELF_TEST)
- dbl_count++;
-#endif
-
-#if defined(MBEDTLS_ECP_DOUBLE_JAC_ALT)
- if( mbedtls_internal_ecp_grp_capable( grp ) )
- return( mbedtls_internal_ecp_double_jac( grp, R, P ) );
-#endif /* MBEDTLS_ECP_DOUBLE_JAC_ALT */
-
- mbedtls_mpi_init( &M ); mbedtls_mpi_init( &S ); mbedtls_mpi_init( &T ); mbedtls_mpi_init( &U );
-
- /* Special case for A = -3 */
- if( grp->A.p == NULL )
- {
- /* M = 3(X + Z^2)(X - Z^2) */
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &S, &P->Z, &P->Z ) ); MOD_MUL( S );
- MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &T, &P->X, &S ) ); MOD_ADD( T );
- MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &U, &P->X, &S ) ); MOD_SUB( U );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &S, &T, &U ) ); MOD_MUL( S );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_int( &M, &S, 3 ) ); MOD_ADD( M );
- }
- else
- {
- /* M = 3.X^2 */
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &S, &P->X, &P->X ) ); MOD_MUL( S );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_int( &M, &S, 3 ) ); MOD_ADD( M );
-
- /* Optimize away for "koblitz" curves with A = 0 */
- if( mbedtls_mpi_cmp_int( &grp->A, 0 ) != 0 )
- {
- /* M += A.Z^4 */
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &S, &P->Z, &P->Z ) ); MOD_MUL( S );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T, &S, &S ) ); MOD_MUL( T );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &S, &T, &grp->A ) ); MOD_MUL( S );
- MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &M, &M, &S ) ); MOD_ADD( M );
- }
- }
-
- /* S = 4.X.Y^2 */
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T, &P->Y, &P->Y ) ); MOD_MUL( T );
- MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &T, 1 ) ); MOD_ADD( T );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &S, &P->X, &T ) ); MOD_MUL( S );
- MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &S, 1 ) ); MOD_ADD( S );
-
- /* U = 8.Y^4 */
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &U, &T, &T ) ); MOD_MUL( U );
- MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &U, 1 ) ); MOD_ADD( U );
-
- /* T = M^2 - 2.S */
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T, &M, &M ) ); MOD_MUL( T );
- MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &T, &T, &S ) ); MOD_SUB( T );
- MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &T, &T, &S ) ); MOD_SUB( T );
-
- /* S = M(S - T) - U */
- MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &S, &S, &T ) ); MOD_SUB( S );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &S, &S, &M ) ); MOD_MUL( S );
- MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &S, &S, &U ) ); MOD_SUB( S );
-
- /* U = 2.Y.Z */
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &U, &P->Y, &P->Z ) ); MOD_MUL( U );
- MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &U, 1 ) ); MOD_ADD( U );
-
- MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &R->X, &T ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &R->Y, &S ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &R->Z, &U ) );
-
-cleanup:
- mbedtls_mpi_free( &M ); mbedtls_mpi_free( &S ); mbedtls_mpi_free( &T ); mbedtls_mpi_free( &U );
-
- return( ret );
-}
-
-/*
- * Addition: R = P + Q, mixed affine-Jacobian coordinates (GECC 3.22)
- *
- * The coordinates of Q must be normalized (= affine),
- * but those of P don't need to. R is not normalized.
- *
- * Special cases: (1) P or Q is zero, (2) R is zero, (3) P == Q.
- * None of these cases can happen as intermediate step in ecp_mul_comb():
- * - at each step, P, Q and R are multiples of the base point, the factor
- * being less than its order, so none of them is zero;
- * - Q is an odd multiple of the base point, P an even multiple,
- * due to the choice of precomputed points in the modified comb method.
- * So branches for these cases do not leak secret information.
- *
- * We accept Q->Z being unset (saving memory in tables) as meaning 1.
- *
- * Cost: 1A := 8M + 3S
- */
-static int ecp_add_mixed( const mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
- const mbedtls_ecp_point *P, const mbedtls_ecp_point *Q )
-{
- int ret;
- mbedtls_mpi T1, T2, T3, T4, X, Y, Z;
-
-#if defined(MBEDTLS_SELF_TEST)
- add_count++;
-#endif
-
-#if defined(MBEDTLS_ECP_ADD_MIXED_ALT)
- if( mbedtls_internal_ecp_grp_capable( grp ) )
- return( mbedtls_internal_ecp_add_mixed( grp, R, P, Q ) );
-#endif /* MBEDTLS_ECP_ADD_MIXED_ALT */
-
- /*
- * Trivial cases: P == 0 or Q == 0 (case 1)
- */
- if( mbedtls_mpi_cmp_int( &P->Z, 0 ) == 0 )
- return( mbedtls_ecp_copy( R, Q ) );
-
- if( Q->Z.p != NULL && mbedtls_mpi_cmp_int( &Q->Z, 0 ) == 0 )
- return( mbedtls_ecp_copy( R, P ) );
-
- /*
- * Make sure Q coordinates are normalized
- */
- if( Q->Z.p != NULL && mbedtls_mpi_cmp_int( &Q->Z, 1 ) != 0 )
- return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA );
-
- mbedtls_mpi_init( &T1 ); mbedtls_mpi_init( &T2 ); mbedtls_mpi_init( &T3 ); mbedtls_mpi_init( &T4 );
- mbedtls_mpi_init( &X ); mbedtls_mpi_init( &Y ); mbedtls_mpi_init( &Z );
-
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T1, &P->Z, &P->Z ) ); MOD_MUL( T1 );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T2, &T1, &P->Z ) ); MOD_MUL( T2 );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T1, &T1, &Q->X ) ); MOD_MUL( T1 );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T2, &T2, &Q->Y ) ); MOD_MUL( T2 );
- MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &T1, &T1, &P->X ) ); MOD_SUB( T1 );
- MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &T2, &T2, &P->Y ) ); MOD_SUB( T2 );
-
- /* Special cases (2) and (3) */
- if( mbedtls_mpi_cmp_int( &T1, 0 ) == 0 )
- {
- if( mbedtls_mpi_cmp_int( &T2, 0 ) == 0 )
- {
- ret = ecp_double_jac( grp, R, P );
- goto cleanup;
- }
- else
- {
- ret = mbedtls_ecp_set_zero( R );
- goto cleanup;
- }
- }
-
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &Z, &P->Z, &T1 ) ); MOD_MUL( Z );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T3, &T1, &T1 ) ); MOD_MUL( T3 );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T4, &T3, &T1 ) ); MOD_MUL( T4 );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T3, &T3, &P->X ) ); MOD_MUL( T3 );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_int( &T1, &T3, 2 ) ); MOD_ADD( T1 );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &X, &T2, &T2 ) ); MOD_MUL( X );
- MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &X, &X, &T1 ) ); MOD_SUB( X );
- MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &X, &X, &T4 ) ); MOD_SUB( X );
- MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &T3, &T3, &X ) ); MOD_SUB( T3 );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T3, &T3, &T2 ) ); MOD_MUL( T3 );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &T4, &T4, &P->Y ) ); MOD_MUL( T4 );
- MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &Y, &T3, &T4 ) ); MOD_SUB( Y );
-
- MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &R->X, &X ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &R->Y, &Y ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &R->Z, &Z ) );
-
-cleanup:
-
- mbedtls_mpi_free( &T1 ); mbedtls_mpi_free( &T2 ); mbedtls_mpi_free( &T3 ); mbedtls_mpi_free( &T4 );
- mbedtls_mpi_free( &X ); mbedtls_mpi_free( &Y ); mbedtls_mpi_free( &Z );
-
- return( ret );
-}
-
-/*
- * Randomize jacobian coordinates:
- * (X, Y, Z) -> (l^2 X, l^3 Y, l Z) for random l
- * This is sort of the reverse operation of ecp_normalize_jac().
- *
- * This countermeasure was first suggested in [2].
- */
-static int ecp_randomize_jac( const mbedtls_ecp_group *grp, mbedtls_ecp_point *pt,
- int (*f_rng)(void *, unsigned char *, size_t), void *p_rng )
-{
- int ret;
- mbedtls_mpi l, ll;
- size_t p_size;
- int count = 0;
-
-#if defined(MBEDTLS_ECP_RANDOMIZE_JAC_ALT)
- if( mbedtls_internal_ecp_grp_capable( grp ) )
- return( mbedtls_internal_ecp_randomize_jac( grp, pt, f_rng, p_rng ) );
-#endif /* MBEDTLS_ECP_RANDOMIZE_JAC_ALT */
-
- p_size = ( grp->pbits + 7 ) / 8;
- mbedtls_mpi_init( &l ); mbedtls_mpi_init( &ll );
-
- /* Generate l such that 1 < l < p */
- do
- {
- MBEDTLS_MPI_CHK( mbedtls_mpi_fill_random( &l, p_size, f_rng, p_rng ) );
-
- while( mbedtls_mpi_cmp_mpi( &l, &grp->P ) >= 0 )
- MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &l, 1 ) );
-
- if( count++ > 10 )
- return( MBEDTLS_ERR_ECP_RANDOM_FAILED );
- }
- while( mbedtls_mpi_cmp_int( &l, 1 ) <= 0 );
-
- /* Z = l * Z */
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &pt->Z, &pt->Z, &l ) ); MOD_MUL( pt->Z );
-
- /* X = l^2 * X */
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &ll, &l, &l ) ); MOD_MUL( ll );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &pt->X, &pt->X, &ll ) ); MOD_MUL( pt->X );
-
- /* Y = l^3 * Y */
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &ll, &ll, &l ) ); MOD_MUL( ll );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &pt->Y, &pt->Y, &ll ) ); MOD_MUL( pt->Y );
-
-cleanup:
- mbedtls_mpi_free( &l ); mbedtls_mpi_free( &ll );
-
- return( ret );
-}
-
-/*
- * Check and define parameters used by the comb method (see below for details)
- */
-#if MBEDTLS_ECP_WINDOW_SIZE < 2 || MBEDTLS_ECP_WINDOW_SIZE > 7
-#error "MBEDTLS_ECP_WINDOW_SIZE out of bounds"
-#endif
-
-/* d = ceil( n / w ) */
-#define COMB_MAX_D ( MBEDTLS_ECP_MAX_BITS + 1 ) / 2
-
-/* number of precomputed points */
-#define COMB_MAX_PRE ( 1 << ( MBEDTLS_ECP_WINDOW_SIZE - 1 ) )
-
-/*
- * Compute the representation of m that will be used with our comb method.
- *
- * The basic comb method is described in GECC 3.44 for example. We use a
- * modified version that provides resistance to SPA by avoiding zero
- * digits in the representation as in [3]. We modify the method further by
- * requiring that all K_i be odd, which has the small cost that our
- * representation uses one more K_i, due to carries, but saves on the size of
- * the precomputed table.
- *
- * Summary of the comb method and its modifications:
- *
- * - The goal is to compute m*P for some w*d-bit integer m.
- *
- * - The basic comb method splits m into the w-bit integers
- * x[0] .. x[d-1] where x[i] consists of the bits in m whose
- * index has residue i modulo d, and computes m * P as
- * S[x[0]] + 2 * S[x[1]] + .. + 2^(d-1) S[x[d-1]], where
- * S[i_{w-1} .. i_0] := i_{w-1} 2^{(w-1)d} P + ... + i_1 2^d P + i_0 P.
- *
- * - If it happens that, say, x[i+1]=0 (=> S[x[i+1]]=0), one can replace the sum by
- * .. + 2^{i-1} S[x[i-1]] - 2^i S[x[i]] + 2^{i+1} S[x[i]] + 2^{i+2} S[x[i+2]] ..,
- * thereby successively converting it into a form where all summands
- * are nonzero, at the cost of negative summands. This is the basic idea of [3].
- *
- * - More generally, even if x[i+1] != 0, we can first transform the sum as
- * .. - 2^i S[x[i]] + 2^{i+1} ( S[x[i]] + S[x[i+1]] ) + 2^{i+2} S[x[i+2]] ..,
- * and then replace S[x[i]] + S[x[i+1]] = S[x[i] ^ x[i+1]] + 2 S[x[i] & x[i+1]].
- * Performing and iterating this procedure for those x[i] that are even
- * (keeping track of carry), we can transform the original sum into one of the form
- * S[x'[0]] +- 2 S[x'[1]] +- .. +- 2^{d-1} S[x'[d-1]] + 2^d S[x'[d]]
- * with all x'[i] odd. It is therefore only necessary to know S at odd indices,
- * which is why we are only computing half of it in the first place in
- * ecp_precompute_comb and accessing it with index abs(i) / 2 in ecp_select_comb.
- *
- * - For the sake of compactness, only the seven low-order bits of x[i]
- * are used to represent its absolute value (K_i in the paper), and the msb
- * of x[i] encodes the sign (s_i in the paper): it is set if and only if
- * if s_i == -1;
- *
- * Calling conventions:
- * - x is an array of size d + 1
- * - w is the size, ie number of teeth, of the comb, and must be between
- * 2 and 7 (in practice, between 2 and MBEDTLS_ECP_WINDOW_SIZE)
- * - m is the MPI, expected to be odd and such that bitlength(m) <= w * d
- * (the result will be incorrect if these assumptions are not satisfied)
- */
-static void ecp_comb_recode_core( unsigned char x[], size_t d,
- unsigned char w, const mbedtls_mpi *m )
-{
- size_t i, j;
- unsigned char c, cc, adjust;
-
- memset( x, 0, d+1 );
-
- /* First get the classical comb values (except for x_d = 0) */
- for( i = 0; i < d; i++ )
- for( j = 0; j < w; j++ )
- x[i] |= mbedtls_mpi_get_bit( m, i + d * j ) << j;
-
- /* Now make sure x_1 .. x_d are odd */
- c = 0;
- for( i = 1; i <= d; i++ )
- {
- /* Add carry and update it */
- cc = x[i] & c;
- x[i] = x[i] ^ c;
- c = cc;
-
- /* Adjust if needed, avoiding branches */
- adjust = 1 - ( x[i] & 0x01 );
- c |= x[i] & ( x[i-1] * adjust );
- x[i] = x[i] ^ ( x[i-1] * adjust );
- x[i-1] |= adjust << 7;
- }
-}
-
-/*
- * Precompute points for the adapted comb method
- *
- * Assumption: T must be able to hold 2^{w - 1} elements.
- *
- * Operation: If i = i_{w-1} ... i_1 is the binary representation of i,
- * sets T[i] = i_{w-1} 2^{(w-1)d} P + ... + i_1 2^d P + P.
- *
- * Cost: d(w-1) D + (2^{w-1} - 1) A + 1 N(w-1) + 1 N(2^{w-1} - 1)
- *
- * Note: Even comb values (those where P would be omitted from the
- * sum defining T[i] above) are not needed in our adaption
- * the comb method. See ecp_comb_recode_core().
- *
- * This function currently works in four steps:
- * (1) [dbl] Computation of intermediate T[i] for 2-power values of i
- * (2) [norm_dbl] Normalization of coordinates of these T[i]
- * (3) [add] Computation of all T[i]
- * (4) [norm_add] Normalization of all T[i]
- *
- * Step 1 can be interrupted but not the others; together with the final
- * coordinate normalization they are the largest steps done at once, depending
- * on the window size. Here are operation counts for P-256:
- *
- * step (2) (3) (4)
- * w = 5 142 165 208
- * w = 4 136 77 160
- * w = 3 130 33 136
- * w = 2 124 11 124
- *
- * So if ECC operations are blocking for too long even with a low max_ops
- * value, it's useful to set MBEDTLS_ECP_WINDOW_SIZE to a lower value in order
- * to minimize maximum blocking time.
- */
-static int ecp_precompute_comb( const mbedtls_ecp_group *grp,
- mbedtls_ecp_point T[], const mbedtls_ecp_point *P,
- unsigned char w, size_t d,
- mbedtls_ecp_restart_ctx *rs_ctx )
-{
- int ret;
- unsigned char i;
- size_t j = 0;
- const unsigned char T_size = 1U << ( w - 1 );
- mbedtls_ecp_point *cur, *TT[COMB_MAX_PRE - 1];
-
-#if defined(MBEDTLS_ECP_RESTARTABLE)
- if( rs_ctx != NULL && rs_ctx->rsm != NULL )
- {
- if( rs_ctx->rsm->state == ecp_rsm_pre_dbl )
- goto dbl;
- if( rs_ctx->rsm->state == ecp_rsm_pre_norm_dbl )
- goto norm_dbl;
- if( rs_ctx->rsm->state == ecp_rsm_pre_add )
- goto add;
- if( rs_ctx->rsm->state == ecp_rsm_pre_norm_add )
- goto norm_add;
- }
-#else
- (void) rs_ctx;
-#endif
-
-#if defined(MBEDTLS_ECP_RESTARTABLE)
- if( rs_ctx != NULL && rs_ctx->rsm != NULL )
- {
- rs_ctx->rsm->state = ecp_rsm_pre_dbl;
-
- /* initial state for the loop */
- rs_ctx->rsm->i = 0;
- }
-
-dbl:
-#endif
- /*
- * Set T[0] = P and
- * T[2^{l-1}] = 2^{dl} P for l = 1 .. w-1 (this is not the final value)
- */
- MBEDTLS_MPI_CHK( mbedtls_ecp_copy( &T[0], P ) );
-
-#if defined(MBEDTLS_ECP_RESTARTABLE)
- if( rs_ctx != NULL && rs_ctx->rsm != NULL && rs_ctx->rsm->i != 0 )
- j = rs_ctx->rsm->i;
- else
-#endif
- j = 0;
-
- for( ; j < d * ( w - 1 ); j++ )
- {
- MBEDTLS_ECP_BUDGET( MBEDTLS_ECP_OPS_DBL );
-
- i = 1U << ( j / d );
- cur = T + i;
-
- if( j % d == 0 )
- MBEDTLS_MPI_CHK( mbedtls_ecp_copy( cur, T + ( i >> 1 ) ) );
-
- MBEDTLS_MPI_CHK( ecp_double_jac( grp, cur, cur ) );
- }
-
-#if defined(MBEDTLS_ECP_RESTARTABLE)
- if( rs_ctx != NULL && rs_ctx->rsm != NULL )
- rs_ctx->rsm->state = ecp_rsm_pre_norm_dbl;
-
-norm_dbl:
-#endif
- /*
- * Normalize current elements in T. As T has holes,
- * use an auxiliary array of pointers to elements in T.
- */
- j = 0;
- for( i = 1; i < T_size; i <<= 1 )
- TT[j++] = T + i;
-
- MBEDTLS_ECP_BUDGET( MBEDTLS_ECP_OPS_INV + 6 * j - 2 );
-
- MBEDTLS_MPI_CHK( ecp_normalize_jac_many( grp, TT, j ) );
-
-#if defined(MBEDTLS_ECP_RESTARTABLE)
- if( rs_ctx != NULL && rs_ctx->rsm != NULL )
- rs_ctx->rsm->state = ecp_rsm_pre_add;
-
-add:
-#endif
- /*
- * Compute the remaining ones using the minimal number of additions
- * Be careful to update T[2^l] only after using it!
- */
- MBEDTLS_ECP_BUDGET( ( T_size - 1 ) * MBEDTLS_ECP_OPS_ADD );
-
- for( i = 1; i < T_size; i <<= 1 )
- {
- j = i;
- while( j-- )
- MBEDTLS_MPI_CHK( ecp_add_mixed( grp, &T[i + j], &T[j], &T[i] ) );
- }
-
-#if defined(MBEDTLS_ECP_RESTARTABLE)
- if( rs_ctx != NULL && rs_ctx->rsm != NULL )
- rs_ctx->rsm->state = ecp_rsm_pre_norm_add;
-
-norm_add:
-#endif
- /*
- * Normalize final elements in T. Even though there are no holes now, we
- * still need the auxiliary array for homogeneity with the previous
- * call. Also, skip T[0] which is already normalised, being a copy of P.
- */
- for( j = 0; j + 1 < T_size; j++ )
- TT[j] = T + j + 1;
-
- MBEDTLS_ECP_BUDGET( MBEDTLS_ECP_OPS_INV + 6 * j - 2 );
-
- MBEDTLS_MPI_CHK( ecp_normalize_jac_many( grp, TT, j ) );
-
-cleanup:
-#if defined(MBEDTLS_ECP_RESTARTABLE)
- if( rs_ctx != NULL && rs_ctx->rsm != NULL &&
- ret == MBEDTLS_ERR_ECP_IN_PROGRESS )
- {
- if( rs_ctx->rsm->state == ecp_rsm_pre_dbl )
- rs_ctx->rsm->i = j;
- }
-#endif
-
- return( ret );
-}
-
-/*
- * Select precomputed point: R = sign(i) * T[ abs(i) / 2 ]
- *
- * See ecp_comb_recode_core() for background
- */
-static int ecp_select_comb( const mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
- const mbedtls_ecp_point T[], unsigned char T_size,
- unsigned char i )
-{
- int ret;
- unsigned char ii, j;
-
- /* Ignore the "sign" bit and scale down */
- ii = ( i & 0x7Fu ) >> 1;
-
- /* Read the whole table to thwart cache-based timing attacks */
- for( j = 0; j < T_size; j++ )
- {
- MBEDTLS_MPI_CHK( mbedtls_mpi_safe_cond_assign( &R->X, &T[j].X, j == ii ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_safe_cond_assign( &R->Y, &T[j].Y, j == ii ) );
- }
-
- /* Safely invert result if i is "negative" */
- MBEDTLS_MPI_CHK( ecp_safe_invert_jac( grp, R, i >> 7 ) );
-
-cleanup:
- return( ret );
-}
-
-/*
- * Core multiplication algorithm for the (modified) comb method.
- * This part is actually common with the basic comb method (GECC 3.44)
- *
- * Cost: d A + d D + 1 R
- */
-static int ecp_mul_comb_core( const mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
- const mbedtls_ecp_point T[], unsigned char T_size,
- const unsigned char x[], size_t d,
- int (*f_rng)(void *, unsigned char *, size_t),
- void *p_rng,
- mbedtls_ecp_restart_ctx *rs_ctx )
-{
- int ret;
- mbedtls_ecp_point Txi;
- size_t i;
-
- mbedtls_ecp_point_init( &Txi );
-
-#if !defined(MBEDTLS_ECP_RESTARTABLE)
- (void) rs_ctx;
-#endif
-
-#if defined(MBEDTLS_ECP_RESTARTABLE)
- if( rs_ctx != NULL && rs_ctx->rsm != NULL &&
- rs_ctx->rsm->state != ecp_rsm_comb_core )
- {
- rs_ctx->rsm->i = 0;
- rs_ctx->rsm->state = ecp_rsm_comb_core;
- }
-
- /* new 'if' instead of nested for the sake of the 'else' branch */
- if( rs_ctx != NULL && rs_ctx->rsm != NULL && rs_ctx->rsm->i != 0 )
- {
- /* restore current index (R already pointing to rs_ctx->rsm->R) */
- i = rs_ctx->rsm->i;
- }
- else
-#endif
- {
- /* Start with a non-zero point and randomize its coordinates */
- i = d;
- MBEDTLS_MPI_CHK( ecp_select_comb( grp, R, T, T_size, x[i] ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &R->Z, 1 ) );
- if( f_rng != 0 )
- MBEDTLS_MPI_CHK( ecp_randomize_jac( grp, R, f_rng, p_rng ) );
- }
-
- while( i != 0 )
- {
- MBEDTLS_ECP_BUDGET( MBEDTLS_ECP_OPS_DBL + MBEDTLS_ECP_OPS_ADD );
- --i;
-
- MBEDTLS_MPI_CHK( ecp_double_jac( grp, R, R ) );
- MBEDTLS_MPI_CHK( ecp_select_comb( grp, &Txi, T, T_size, x[i] ) );
- MBEDTLS_MPI_CHK( ecp_add_mixed( grp, R, R, &Txi ) );
- }
-
-cleanup:
-
- mbedtls_ecp_point_free( &Txi );
-
-#if defined(MBEDTLS_ECP_RESTARTABLE)
- if( rs_ctx != NULL && rs_ctx->rsm != NULL &&
- ret == MBEDTLS_ERR_ECP_IN_PROGRESS )
- {
- rs_ctx->rsm->i = i;
- /* no need to save R, already pointing to rs_ctx->rsm->R */
- }
-#endif
-
- return( ret );
-}
-
-/*
- * Recode the scalar to get constant-time comb multiplication
- *
- * As the actual scalar recoding needs an odd scalar as a starting point,
- * this wrapper ensures that by replacing m by N - m if necessary, and
- * informs the caller that the result of multiplication will be negated.
- *
- * This works because we only support large prime order for Short Weierstrass
- * curves, so N is always odd hence either m or N - m is.
- *
- * See ecp_comb_recode_core() for background.
- */
-static int ecp_comb_recode_scalar( const mbedtls_ecp_group *grp,
- const mbedtls_mpi *m,
- unsigned char k[COMB_MAX_D + 1],
- size_t d,
- unsigned char w,
- unsigned char *parity_trick )
-{
- int ret;
- mbedtls_mpi M, mm;
-
- mbedtls_mpi_init( &M );
- mbedtls_mpi_init( &mm );
-
- /* N is always odd (see above), just make extra sure */
- if( mbedtls_mpi_get_bit( &grp->N, 0 ) != 1 )
- return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA );
-
- /* do we need the parity trick? */
- *parity_trick = ( mbedtls_mpi_get_bit( m, 0 ) == 0 );
-
- /* execute parity fix in constant time */
- MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &M, m ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &mm, &grp->N, m ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_safe_cond_assign( &M, &mm, *parity_trick ) );
-
- /* actual scalar recoding */
- ecp_comb_recode_core( k, d, w, &M );
-
-cleanup:
- mbedtls_mpi_free( &mm );
- mbedtls_mpi_free( &M );
-
- return( ret );
-}
-
-/*
- * Perform comb multiplication (for short Weierstrass curves)
- * once the auxiliary table has been pre-computed.
- *
- * Scalar recoding may use a parity trick that makes us compute -m * P,
- * if that is the case we'll need to recover m * P at the end.
- */
-static int ecp_mul_comb_after_precomp( const mbedtls_ecp_group *grp,
- mbedtls_ecp_point *R,
- const mbedtls_mpi *m,
- const mbedtls_ecp_point *T,
- unsigned char T_size,
- unsigned char w,
- size_t d,
- int (*f_rng)(void *, unsigned char *, size_t),
- void *p_rng,
- mbedtls_ecp_restart_ctx *rs_ctx )
-{
- int ret;
- unsigned char parity_trick;
- unsigned char k[COMB_MAX_D + 1];
- mbedtls_ecp_point *RR = R;
-
-#if defined(MBEDTLS_ECP_RESTARTABLE)
- if( rs_ctx != NULL && rs_ctx->rsm != NULL )
- {
- RR = &rs_ctx->rsm->R;
-
- if( rs_ctx->rsm->state == ecp_rsm_final_norm )
- goto final_norm;
- }
-#endif
-
- MBEDTLS_MPI_CHK( ecp_comb_recode_scalar( grp, m, k, d, w,
- &parity_trick ) );
- MBEDTLS_MPI_CHK( ecp_mul_comb_core( grp, RR, T, T_size, k, d,
- f_rng, p_rng, rs_ctx ) );
- MBEDTLS_MPI_CHK( ecp_safe_invert_jac( grp, RR, parity_trick ) );
-
-#if defined(MBEDTLS_ECP_RESTARTABLE)
- if( rs_ctx != NULL && rs_ctx->rsm != NULL )
- rs_ctx->rsm->state = ecp_rsm_final_norm;
-
-final_norm:
-#endif
- MBEDTLS_ECP_BUDGET( MBEDTLS_ECP_OPS_INV );
- MBEDTLS_MPI_CHK( ecp_normalize_jac( grp, RR ) );
-
-#if defined(MBEDTLS_ECP_RESTARTABLE)
- if( rs_ctx != NULL && rs_ctx->rsm != NULL )
- MBEDTLS_MPI_CHK( mbedtls_ecp_copy( R, RR ) );
-#endif
-
-cleanup:
- return( ret );
-}
-
-/*
- * Pick window size based on curve size and whether we optimize for base point
- */
-static unsigned char ecp_pick_window_size( const mbedtls_ecp_group *grp,
- unsigned char p_eq_g )
-{
- unsigned char w;
-
- /*
- * Minimize the number of multiplications, that is minimize
- * 10 * d * w + 18 * 2^(w-1) + 11 * d + 7 * w, with d = ceil( nbits / w )
- * (see costs of the various parts, with 1S = 1M)
- */
- w = grp->nbits >= 384 ? 5 : 4;
-
- /*
- * If P == G, pre-compute a bit more, since this may be re-used later.
- * Just adding one avoids upping the cost of the first mul too much,
- * and the memory cost too.
- */
- if( p_eq_g )
- w++;
-
- /*
- * Make sure w is within bounds.
- * (The last test is useful only for very small curves in the test suite.)
- */
- if( w > MBEDTLS_ECP_WINDOW_SIZE )
- w = MBEDTLS_ECP_WINDOW_SIZE;
- if( w >= grp->nbits )
- w = 2;
-
- return( w );
-}
-
-/*
- * Multiplication using the comb method - for curves in short Weierstrass form
- *
- * This function is mainly responsible for administrative work:
- * - managing the restart context if enabled
- * - managing the table of precomputed points (passed between the below two
- * functions): allocation, computation, ownership tranfer, freeing.
- *
- * It delegates the actual arithmetic work to:
- * ecp_precompute_comb() and ecp_mul_comb_with_precomp()
- *
- * See comments on ecp_comb_recode_core() regarding the computation strategy.
- */
-static int ecp_mul_comb( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
- const mbedtls_mpi *m, const mbedtls_ecp_point *P,
- int (*f_rng)(void *, unsigned char *, size_t),
- void *p_rng,
- mbedtls_ecp_restart_ctx *rs_ctx )
-{
- int ret;
- unsigned char w, p_eq_g, i;
- size_t d;
- unsigned char T_size, T_ok;
- mbedtls_ecp_point *T;
-
- ECP_RS_ENTER( rsm );
-
- /* Is P the base point ? */
-#if MBEDTLS_ECP_FIXED_POINT_OPTIM == 1
- p_eq_g = ( mbedtls_mpi_cmp_mpi( &P->Y, &grp->G.Y ) == 0 &&
- mbedtls_mpi_cmp_mpi( &P->X, &grp->G.X ) == 0 );
-#else
- p_eq_g = 0;
-#endif
-
- /* Pick window size and deduce related sizes */
- w = ecp_pick_window_size( grp, p_eq_g );
- T_size = 1U << ( w - 1 );
- d = ( grp->nbits + w - 1 ) / w;
-
- /* Pre-computed table: do we have it already for the base point? */
- if( p_eq_g && grp->T != NULL )
- {
- /* second pointer to the same table, will be deleted on exit */
- T = grp->T;
- T_ok = 1;
- }
- else
-#if defined(MBEDTLS_ECP_RESTARTABLE)
- /* Pre-computed table: do we have one in progress? complete? */
- if( rs_ctx != NULL && rs_ctx->rsm != NULL && rs_ctx->rsm->T != NULL )
- {
- /* transfer ownership of T from rsm to local function */
- T = rs_ctx->rsm->T;
- rs_ctx->rsm->T = NULL;
- rs_ctx->rsm->T_size = 0;
-
- /* This effectively jumps to the call to mul_comb_after_precomp() */
- T_ok = rs_ctx->rsm->state >= ecp_rsm_comb_core;
- }
- else
-#endif
- /* Allocate table if we didn't have any */
- {
- T = mbedtls_calloc( T_size, sizeof( mbedtls_ecp_point ) );
- if( T == NULL )
- {
- ret = MBEDTLS_ERR_ECP_ALLOC_FAILED;
- goto cleanup;
- }
-
- for( i = 0; i < T_size; i++ )
- mbedtls_ecp_point_init( &T[i] );
-
- T_ok = 0;
- }
-
- /* Compute table (or finish computing it) if not done already */
- if( !T_ok )
- {
- MBEDTLS_MPI_CHK( ecp_precompute_comb( grp, T, P, w, d, rs_ctx ) );
-
- if( p_eq_g )
- {
- /* almost transfer ownership of T to the group, but keep a copy of
- * the pointer to use for calling the next function more easily */
- grp->T = T;
- grp->T_size = T_size;
- }
- }
-
- /* Actual comb multiplication using precomputed points */
- MBEDTLS_MPI_CHK( ecp_mul_comb_after_precomp( grp, R, m,
- T, T_size, w, d,
- f_rng, p_rng, rs_ctx ) );
-
-cleanup:
-
- /* does T belong to the group? */
- if( T == grp->T )
- T = NULL;
-
- /* does T belong to the restart context? */
-#if defined(MBEDTLS_ECP_RESTARTABLE)
- if( rs_ctx != NULL && rs_ctx->rsm != NULL && ret == MBEDTLS_ERR_ECP_IN_PROGRESS && T != NULL )
- {
- /* transfer ownership of T from local function to rsm */
- rs_ctx->rsm->T_size = T_size;
- rs_ctx->rsm->T = T;
- T = NULL;
- }
-#endif
-
- /* did T belong to us? then let's destroy it! */
- if( T != NULL )
- {
- for( i = 0; i < T_size; i++ )
- mbedtls_ecp_point_free( &T[i] );
- mbedtls_free( T );
- }
-
- /* don't free R while in progress in case R == P */
-#if defined(MBEDTLS_ECP_RESTARTABLE)
- if( ret != MBEDTLS_ERR_ECP_IN_PROGRESS )
-#endif
- /* prevent caller from using invalid value */
- if( ret != 0 )
- mbedtls_ecp_point_free( R );
-
- ECP_RS_LEAVE( rsm );
-
- return( ret );
-}
-
-#endif /* ECP_SHORTWEIERSTRASS */
-
-#if defined(ECP_MONTGOMERY)
-/*
- * For Montgomery curves, we do all the internal arithmetic in projective
- * coordinates. Import/export of points uses only the x coordinates, which is
- * internaly represented as X / Z.
- *
- * For scalar multiplication, we'll use a Montgomery ladder.
- */
-
-/*
- * Normalize Montgomery x/z coordinates: X = X/Z, Z = 1
- * Cost: 1M + 1I
- */
-static int ecp_normalize_mxz( const mbedtls_ecp_group *grp, mbedtls_ecp_point *P )
-{
- int ret;
-
-#if defined(MBEDTLS_ECP_NORMALIZE_MXZ_ALT)
- if( mbedtls_internal_ecp_grp_capable( grp ) )
- return( mbedtls_internal_ecp_normalize_mxz( grp, P ) );
-#endif /* MBEDTLS_ECP_NORMALIZE_MXZ_ALT */
-
- MBEDTLS_MPI_CHK( mbedtls_mpi_inv_mod( &P->Z, &P->Z, &grp->P ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &P->X, &P->X, &P->Z ) ); MOD_MUL( P->X );
- MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &P->Z, 1 ) );
-
-cleanup:
- return( ret );
-}
-
-/*
- * Randomize projective x/z coordinates:
- * (X, Z) -> (l X, l Z) for random l
- * This is sort of the reverse operation of ecp_normalize_mxz().
- *
- * This countermeasure was first suggested in [2].
- * Cost: 2M
- */
-static int ecp_randomize_mxz( const mbedtls_ecp_group *grp, mbedtls_ecp_point *P,
- int (*f_rng)(void *, unsigned char *, size_t), void *p_rng )
-{
- int ret;
- mbedtls_mpi l;
- size_t p_size;
- int count = 0;
-
-#if defined(MBEDTLS_ECP_RANDOMIZE_MXZ_ALT)
- if( mbedtls_internal_ecp_grp_capable( grp ) )
- return( mbedtls_internal_ecp_randomize_mxz( grp, P, f_rng, p_rng );
-#endif /* MBEDTLS_ECP_RANDOMIZE_MXZ_ALT */
-
- p_size = ( grp->pbits + 7 ) / 8;
- mbedtls_mpi_init( &l );
-
- /* Generate l such that 1 < l < p */
- do
- {
- MBEDTLS_MPI_CHK( mbedtls_mpi_fill_random( &l, p_size, f_rng, p_rng ) );
-
- while( mbedtls_mpi_cmp_mpi( &l, &grp->P ) >= 0 )
- MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &l, 1 ) );
-
- if( count++ > 10 )
- return( MBEDTLS_ERR_ECP_RANDOM_FAILED );
- }
- while( mbedtls_mpi_cmp_int( &l, 1 ) <= 0 );
-
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &P->X, &P->X, &l ) ); MOD_MUL( P->X );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &P->Z, &P->Z, &l ) ); MOD_MUL( P->Z );
-
-cleanup:
- mbedtls_mpi_free( &l );
-
- return( ret );
-}
-
-/*
- * Double-and-add: R = 2P, S = P + Q, with d = X(P - Q),
- * for Montgomery curves in x/z coordinates.
- *
- * http://www.hyperelliptic.org/EFD/g1p/auto-code/montgom/xz/ladder/mladd-1987-m.op3
- * with
- * d = X1
- * P = (X2, Z2)
- * Q = (X3, Z3)
- * R = (X4, Z4)
- * S = (X5, Z5)
- * and eliminating temporary variables tO, ..., t4.
- *
- * Cost: 5M + 4S
- */
-static int ecp_double_add_mxz( const mbedtls_ecp_group *grp,
- mbedtls_ecp_point *R, mbedtls_ecp_point *S,
- const mbedtls_ecp_point *P, const mbedtls_ecp_point *Q,
- const mbedtls_mpi *d )
-{
- int ret;
- mbedtls_mpi A, AA, B, BB, E, C, D, DA, CB;
-
-#if defined(MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT)
- if( mbedtls_internal_ecp_grp_capable( grp ) )
- return( mbedtls_internal_ecp_double_add_mxz( grp, R, S, P, Q, d ) );
-#endif /* MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT */
-
- mbedtls_mpi_init( &A ); mbedtls_mpi_init( &AA ); mbedtls_mpi_init( &B );
- mbedtls_mpi_init( &BB ); mbedtls_mpi_init( &E ); mbedtls_mpi_init( &C );
- mbedtls_mpi_init( &D ); mbedtls_mpi_init( &DA ); mbedtls_mpi_init( &CB );
-
- MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &A, &P->X, &P->Z ) ); MOD_ADD( A );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &AA, &A, &A ) ); MOD_MUL( AA );
- MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &B, &P->X, &P->Z ) ); MOD_SUB( B );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &BB, &B, &B ) ); MOD_MUL( BB );
- MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &E, &AA, &BB ) ); MOD_SUB( E );
- MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &C, &Q->X, &Q->Z ) ); MOD_ADD( C );
- MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &D, &Q->X, &Q->Z ) ); MOD_SUB( D );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &DA, &D, &A ) ); MOD_MUL( DA );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &CB, &C, &B ) ); MOD_MUL( CB );
- MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &S->X, &DA, &CB ) ); MOD_MUL( S->X );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &S->X, &S->X, &S->X ) ); MOD_MUL( S->X );
- MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &S->Z, &DA, &CB ) ); MOD_SUB( S->Z );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &S->Z, &S->Z, &S->Z ) ); MOD_MUL( S->Z );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &S->Z, d, &S->Z ) ); MOD_MUL( S->Z );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &R->X, &AA, &BB ) ); MOD_MUL( R->X );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &R->Z, &grp->A, &E ) ); MOD_MUL( R->Z );
- MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &R->Z, &BB, &R->Z ) ); MOD_ADD( R->Z );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &R->Z, &E, &R->Z ) ); MOD_MUL( R->Z );
-
-cleanup:
- mbedtls_mpi_free( &A ); mbedtls_mpi_free( &AA ); mbedtls_mpi_free( &B );
- mbedtls_mpi_free( &BB ); mbedtls_mpi_free( &E ); mbedtls_mpi_free( &C );
- mbedtls_mpi_free( &D ); mbedtls_mpi_free( &DA ); mbedtls_mpi_free( &CB );
-
- return( ret );
-}
-
-/*
- * Multiplication with Montgomery ladder in x/z coordinates,
- * for curves in Montgomery form
- */
-static int ecp_mul_mxz( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
- const mbedtls_mpi *m, const mbedtls_ecp_point *P,
- int (*f_rng)(void *, unsigned char *, size_t),
- void *p_rng )
-{
- int ret;
- size_t i;
- unsigned char b;
- mbedtls_ecp_point RP;
- mbedtls_mpi PX;
-
- mbedtls_ecp_point_init( &RP ); mbedtls_mpi_init( &PX );
-
- /* Save PX and read from P before writing to R, in case P == R */
- MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &PX, &P->X ) );
- MBEDTLS_MPI_CHK( mbedtls_ecp_copy( &RP, P ) );
-
- /* Set R to zero in modified x/z coordinates */
- MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &R->X, 1 ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &R->Z, 0 ) );
- mbedtls_mpi_free( &R->Y );
-
- /* RP.X might be sligtly larger than P, so reduce it */
- MOD_ADD( RP.X );
-
- /* Randomize coordinates of the starting point */
- if( f_rng != NULL )
- MBEDTLS_MPI_CHK( ecp_randomize_mxz( grp, &RP, f_rng, p_rng ) );
-
- /* Loop invariant: R = result so far, RP = R + P */
- i = mbedtls_mpi_bitlen( m ); /* one past the (zero-based) most significant bit */
- while( i-- > 0 )
- {
- b = mbedtls_mpi_get_bit( m, i );
- /*
- * if (b) R = 2R + P else R = 2R,
- * which is:
- * if (b) double_add( RP, R, RP, R )
- * else double_add( R, RP, R, RP )
- * but using safe conditional swaps to avoid leaks
- */
- MBEDTLS_MPI_CHK( mbedtls_mpi_safe_cond_swap( &R->X, &RP.X, b ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_safe_cond_swap( &R->Z, &RP.Z, b ) );
- MBEDTLS_MPI_CHK( ecp_double_add_mxz( grp, R, &RP, R, &RP, &PX ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_safe_cond_swap( &R->X, &RP.X, b ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_safe_cond_swap( &R->Z, &RP.Z, b ) );
- }
-
- MBEDTLS_MPI_CHK( ecp_normalize_mxz( grp, R ) );
-
-cleanup:
- mbedtls_ecp_point_free( &RP ); mbedtls_mpi_free( &PX );
-
- return( ret );
-}
-
-#endif /* ECP_MONTGOMERY */
-
-/*
- * Restartable multiplication R = m * P
- */
-int mbedtls_ecp_mul_restartable( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
- const mbedtls_mpi *m, const mbedtls_ecp_point *P,
- int (*f_rng)(void *, unsigned char *, size_t), void *p_rng,
- mbedtls_ecp_restart_ctx *rs_ctx )
-{
- int ret = MBEDTLS_ERR_ECP_BAD_INPUT_DATA;
-#if defined(MBEDTLS_ECP_INTERNAL_ALT)
- char is_grp_capable = 0;
-#endif
-
-#if defined(MBEDTLS_ECP_RESTARTABLE)
- /* reset ops count for this call if top-level */
- if( rs_ctx != NULL && rs_ctx->depth++ == 0 )
- rs_ctx->ops_done = 0;
-#endif
-
-#if defined(MBEDTLS_ECP_INTERNAL_ALT)
- if( ( is_grp_capable = mbedtls_internal_ecp_grp_capable( grp ) ) )
- MBEDTLS_MPI_CHK( mbedtls_internal_ecp_init( grp ) );
-#endif /* MBEDTLS_ECP_INTERNAL_ALT */
-
-#if defined(MBEDTLS_ECP_RESTARTABLE)
- /* skip argument check when restarting */
- if( rs_ctx == NULL || rs_ctx->rsm == NULL )
-#endif
- {
- /* check_privkey is free */
- MBEDTLS_ECP_BUDGET( MBEDTLS_ECP_OPS_CHK );
-
- /* Common sanity checks */
- MBEDTLS_MPI_CHK( mbedtls_ecp_check_privkey( grp, m ) );
- MBEDTLS_MPI_CHK( mbedtls_ecp_check_pubkey( grp, P ) );
- }
-
- ret = MBEDTLS_ERR_ECP_BAD_INPUT_DATA;
-#if defined(ECP_MONTGOMERY)
- if( ecp_get_type( grp ) == ECP_TYPE_MONTGOMERY )
- MBEDTLS_MPI_CHK( ecp_mul_mxz( grp, R, m, P, f_rng, p_rng ) );
-#endif
-#if defined(ECP_SHORTWEIERSTRASS)
- if( ecp_get_type( grp ) == ECP_TYPE_SHORT_WEIERSTRASS )
- {
- CRYS_ECPKI_DomainID_t cc_id = mbedtls_to_cryptocell_group_id( grp->id );
- if ( cc_id != CRYS_ECPKI_DomainIDLast )
- {
- ret = ecp_mul_ws_cryptocell( cc_id, R, m, P );
- }
- else
- {
- MBEDTLS_MPI_CHK( ecp_mul_comb( grp, R, m, P, f_rng, p_rng, rs_ctx ) );
- }
- }
-#endif
-
-cleanup:
-
-#if defined(MBEDTLS_ECP_INTERNAL_ALT)
- if( is_grp_capable )
- mbedtls_internal_ecp_free( grp );
-#endif /* MBEDTLS_ECP_INTERNAL_ALT */
-
-#if defined(MBEDTLS_ECP_RESTARTABLE)
- if( rs_ctx != NULL )
- rs_ctx->depth--;
-#endif
-
- return( ret );
-}
-
-/*
- * Multiplication R = m * P
- */
-int mbedtls_ecp_mul( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
- const mbedtls_mpi *m, const mbedtls_ecp_point *P,
- int (*f_rng)(void *, unsigned char *, size_t), void *p_rng )
-{
- return( mbedtls_ecp_mul_restartable( grp, R, m, P, f_rng, p_rng, NULL ) );
-}
-
-#if defined(ECP_SHORTWEIERSTRASS)
-/*
- * Check that an affine point is valid as a public key,
- * short weierstrass curves (SEC1 3.2.3.1)
- */
-static int ecp_check_pubkey_sw( const mbedtls_ecp_group *grp, const mbedtls_ecp_point *pt )
-{
- int ret;
- mbedtls_mpi YY, RHS;
-
- /* pt coordinates must be normalized for our checks */
- if( mbedtls_mpi_cmp_int( &pt->X, 0 ) < 0 ||
- mbedtls_mpi_cmp_int( &pt->Y, 0 ) < 0 ||
- mbedtls_mpi_cmp_mpi( &pt->X, &grp->P ) >= 0 ||
- mbedtls_mpi_cmp_mpi( &pt->Y, &grp->P ) >= 0 )
- return( MBEDTLS_ERR_ECP_INVALID_KEY );
-
- mbedtls_mpi_init( &YY ); mbedtls_mpi_init( &RHS );
-
- /*
- * YY = Y^2
- * RHS = X (X^2 + A) + B = X^3 + A X + B
- */
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &YY, &pt->Y, &pt->Y ) ); MOD_MUL( YY );
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &RHS, &pt->X, &pt->X ) ); MOD_MUL( RHS );
-
- /* Special case for A = -3 */
- if( grp->A.p == NULL )
- {
- MBEDTLS_MPI_CHK( mbedtls_mpi_sub_int( &RHS, &RHS, 3 ) ); MOD_SUB( RHS );
- }
- else
- {
- MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &RHS, &RHS, &grp->A ) ); MOD_ADD( RHS );
- }
-
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &RHS, &RHS, &pt->X ) ); MOD_MUL( RHS );
- MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &RHS, &RHS, &grp->B ) ); MOD_ADD( RHS );
-
- if( mbedtls_mpi_cmp_mpi( &YY, &RHS ) != 0 )
- ret = MBEDTLS_ERR_ECP_INVALID_KEY;
-
-cleanup:
-
- mbedtls_mpi_free( &YY ); mbedtls_mpi_free( &RHS );
-
- return( ret );
-}
-#endif /* ECP_SHORTWEIERSTRASS */
-
-/*
- * R = m * P with shortcuts for m == 1 and m == -1
- * NOT constant-time - ONLY for short Weierstrass!
- */
-static int mbedtls_ecp_mul_shortcuts( mbedtls_ecp_group *grp,
- mbedtls_ecp_point *R,
- const mbedtls_mpi *m,
- const mbedtls_ecp_point *P,
- mbedtls_ecp_restart_ctx *rs_ctx )
-{
- int ret;
-
- if( mbedtls_mpi_cmp_int( m, 1 ) == 0 )
- {
- MBEDTLS_MPI_CHK( mbedtls_ecp_copy( R, P ) );
- }
- else if( mbedtls_mpi_cmp_int( m, -1 ) == 0 )
- {
- MBEDTLS_MPI_CHK( mbedtls_ecp_copy( R, P ) );
- if( mbedtls_mpi_cmp_int( &R->Y, 0 ) != 0 )
- MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &R->Y, &grp->P, &R->Y ) );
- }
- else
- {
- MBEDTLS_MPI_CHK( mbedtls_ecp_mul_restartable( grp, R, m, P,
- NULL, NULL, rs_ctx ) );
- }
-
-cleanup:
- return( ret );
-}
-
-/*
- * Restartable linear combination
- * NOT constant-time
- */
-int mbedtls_ecp_muladd_restartable(
- mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
- const mbedtls_mpi *m, const mbedtls_ecp_point *P,
- const mbedtls_mpi *n, const mbedtls_ecp_point *Q,
- mbedtls_ecp_restart_ctx *rs_ctx )
-{
- int ret;
- mbedtls_ecp_point mP;
- mbedtls_ecp_point *pmP = &mP;
- mbedtls_ecp_point *pR = R;
-#if defined(MBEDTLS_ECP_INTERNAL_ALT)
- char is_grp_capable = 0;
-#endif
-
- if( ecp_get_type( grp ) != ECP_TYPE_SHORT_WEIERSTRASS )
- return( MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE );
-
- mbedtls_ecp_point_init( &mP );
-
-#if defined(MBEDTLS_ECP_INTERNAL_ALT)
- if( ( is_grp_capable = mbedtls_internal_ecp_grp_capable( grp ) ) )
- MBEDTLS_MPI_CHK( mbedtls_internal_ecp_init( grp ) );
-#endif /* MBEDTLS_ECP_INTERNAL_ALT */
-
- ECP_RS_ENTER( ma );
-
-#if defined(MBEDTLS_ECP_RESTARTABLE)
- if( rs_ctx != NULL && rs_ctx->ma != NULL )
- {
- /* redirect intermediate results to restart context */
- pmP = &rs_ctx->ma->mP;
- pR = &rs_ctx->ma->R;
-
- /* jump to next operation */
- if( rs_ctx->ma->state == ecp_rsma_mul2 )
- goto mul2;
- if( rs_ctx->ma->state == ecp_rsma_add )
- goto add;
- if( rs_ctx->ma->state == ecp_rsma_norm )
- goto norm;
- }
-#endif /* MBEDTLS_ECP_RESTARTABLE */
-
- MBEDTLS_MPI_CHK( mbedtls_ecp_mul_shortcuts( grp, pmP, m, P, rs_ctx ) );
-#if defined(MBEDTLS_ECP_RESTARTABLE)
- if( rs_ctx != NULL && rs_ctx->ma != NULL )
- rs_ctx->ma->state = ecp_rsma_mul2;
-
-mul2:
-#endif
- MBEDTLS_MPI_CHK( mbedtls_ecp_mul_shortcuts( grp, pR, n, Q, rs_ctx ) );
-#if defined(MBEDTLS_ECP_RESTARTABLE)
- if( rs_ctx != NULL && rs_ctx->ma != NULL )
- rs_ctx->ma->state = ecp_rsma_add;
-
-add:
-#endif
- MBEDTLS_ECP_BUDGET( MBEDTLS_ECP_OPS_ADD );
- MBEDTLS_MPI_CHK( ecp_add_mixed( grp, pR, pmP, pR ) );
-#if defined(MBEDTLS_ECP_RESTARTABLE)
- if( rs_ctx != NULL && rs_ctx->ma != NULL )
- rs_ctx->ma->state = ecp_rsma_norm;
-
-norm:
-#endif
- MBEDTLS_ECP_BUDGET( MBEDTLS_ECP_OPS_INV );
- MBEDTLS_MPI_CHK( ecp_normalize_jac( grp, pR ) );
-
-#if defined(MBEDTLS_ECP_RESTARTABLE)
- if( rs_ctx != NULL && rs_ctx->ma != NULL )
- MBEDTLS_MPI_CHK( mbedtls_ecp_copy( R, pR ) );
-#endif
-
-cleanup:
-#if defined(MBEDTLS_ECP_INTERNAL_ALT)
- if( is_grp_capable )
- mbedtls_internal_ecp_free( grp );
-#endif /* MBEDTLS_ECP_INTERNAL_ALT */
-
- mbedtls_ecp_point_free( &mP );
-
- ECP_RS_LEAVE( ma );
-
- return( ret );
-}
-
-/*
- * Linear combination
- * NOT constant-time
- */
-int mbedtls_ecp_muladd( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
- const mbedtls_mpi *m, const mbedtls_ecp_point *P,
- const mbedtls_mpi *n, const mbedtls_ecp_point *Q )
-{
- return( mbedtls_ecp_muladd_restartable( grp, R, m, P, n, Q, NULL ) );
-}
-
-#if defined(ECP_MONTGOMERY)
-/*
- * Check validity of a public key for Montgomery curves with x-only schemes
- */
-static int ecp_check_pubkey_mx( const mbedtls_ecp_group *grp, const mbedtls_ecp_point *pt )
-{
- /* [Curve25519 p. 5] Just check X is the correct number of bytes */
- /* Allow any public value, if it's too big then we'll just reduce it mod p
- * (RFC 7748 sec. 5 para. 3). */
- if( mbedtls_mpi_size( &pt->X ) > ( grp->nbits + 7 ) / 8 )
- return( MBEDTLS_ERR_ECP_INVALID_KEY );
-
- return( 0 );
-}
-#endif /* ECP_MONTGOMERY */
-
-/*
- * Check that a point is valid as a public key
- */
-int mbedtls_ecp_check_pubkey( const mbedtls_ecp_group *grp, const mbedtls_ecp_point *pt )
-{
- /* Must use affine coordinates */
- if( mbedtls_mpi_cmp_int( &pt->Z, 1 ) != 0 )
- return( MBEDTLS_ERR_ECP_INVALID_KEY );
-
-#if defined(ECP_MONTGOMERY)
- if( ecp_get_type( grp ) == ECP_TYPE_MONTGOMERY )
- return( ecp_check_pubkey_mx( grp, pt ) );
-#endif
-#if defined(ECP_SHORTWEIERSTRASS)
- if( ecp_get_type( grp ) == ECP_TYPE_SHORT_WEIERSTRASS )
- return( ecp_check_pubkey_sw( grp, pt ) );
-#endif
- return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA );
-}
-
-/*
- * Check that an mbedtls_mpi is valid as a private key
- */
-int mbedtls_ecp_check_privkey( const mbedtls_ecp_group *grp, const mbedtls_mpi *d )
-{
-#if defined(ECP_MONTGOMERY)
- if( ecp_get_type( grp ) == ECP_TYPE_MONTGOMERY )
- {
- /* see RFC 7748 sec. 5 para. 5 */
- if( mbedtls_mpi_get_bit( d, 0 ) != 0 ||
- mbedtls_mpi_get_bit( d, 1 ) != 0 ||
- mbedtls_mpi_bitlen( d ) - 1 != grp->nbits ) /* mbedtls_mpi_bitlen is one-based! */
- return( MBEDTLS_ERR_ECP_INVALID_KEY );
-
- /* see [Curve25519] page 5 */
- if( grp->nbits == 254 && mbedtls_mpi_get_bit( d, 2 ) != 0 )
- return( MBEDTLS_ERR_ECP_INVALID_KEY );
-
- return( 0 );
- }
-#endif /* ECP_MONTGOMERY */
-#if defined(ECP_SHORTWEIERSTRASS)
- if( ecp_get_type( grp ) == ECP_TYPE_SHORT_WEIERSTRASS )
- {
- /* see SEC1 3.2 */
- if( mbedtls_mpi_cmp_int( d, 1 ) < 0 ||
- mbedtls_mpi_cmp_mpi( d, &grp->N ) >= 0 )
- return( MBEDTLS_ERR_ECP_INVALID_KEY );
- else
- return( 0 );
- }
-#endif /* ECP_SHORTWEIERSTRASS */
-
- return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA );
-}
-
-/*
- * Generate a private key
- */
-int mbedtls_ecp_gen_privkey( const mbedtls_ecp_group *grp,
- mbedtls_mpi *d,
- int (*f_rng)(void *, unsigned char *, size_t),
- void *p_rng )
-{
- int ret = MBEDTLS_ERR_ECP_BAD_INPUT_DATA;
- size_t n_size = ( grp->nbits + 7 ) / 8;
-
-#if defined(ECP_MONTGOMERY)
- if( ecp_get_type( grp ) == ECP_TYPE_MONTGOMERY )
- {
- /* [M225] page 5 */
- size_t b;
-
- do {
- MBEDTLS_MPI_CHK( mbedtls_mpi_fill_random( d, n_size, f_rng, p_rng ) );
- } while( mbedtls_mpi_bitlen( d ) == 0);
-
- /* Make sure the most significant bit is nbits */
- b = mbedtls_mpi_bitlen( d ) - 1; /* mbedtls_mpi_bitlen is one-based */
- if( b > grp->nbits )
- MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( d, b - grp->nbits ) );
- else
- MBEDTLS_MPI_CHK( mbedtls_mpi_set_bit( d, grp->nbits, 1 ) );
-
- /* Make sure the last two bits are unset for Curve448, three bits for
- Curve25519 */
- MBEDTLS_MPI_CHK( mbedtls_mpi_set_bit( d, 0, 0 ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_set_bit( d, 1, 0 ) );
- if( grp->nbits == 254 )
- {
- MBEDTLS_MPI_CHK( mbedtls_mpi_set_bit( d, 2, 0 ) );
- }
- }
-#endif /* ECP_MONTGOMERY */
-
-#if defined(ECP_SHORTWEIERSTRASS)
- if( ecp_get_type( grp ) == ECP_TYPE_SHORT_WEIERSTRASS )
- {
- /* SEC1 3.2.1: Generate d such that 1 <= n < N */
- int count = 0;
-
- /*
- * Match the procedure given in RFC 6979 (deterministic ECDSA):
- * - use the same byte ordering;
- * - keep the leftmost nbits bits of the generated octet string;
- * - try until result is in the desired range.
- * This also avoids any biais, which is especially important for ECDSA.
- */
- do
- {
- MBEDTLS_MPI_CHK( mbedtls_mpi_fill_random( d, n_size, f_rng, p_rng ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( d, 8 * n_size - grp->nbits ) );
-
- /*
- * Each try has at worst a probability 1/2 of failing (the msb has
- * a probability 1/2 of being 0, and then the result will be < N),
- * so after 30 tries failure probability is a most 2**(-30).
- *
- * For most curves, 1 try is enough with overwhelming probability,
- * since N starts with a lot of 1s in binary, but some curves
- * such as secp224k1 are actually very close to the worst case.
- */
- if( ++count > 30 )
- return( MBEDTLS_ERR_ECP_RANDOM_FAILED );
- }
- while( mbedtls_mpi_cmp_int( d, 1 ) < 0 ||
- mbedtls_mpi_cmp_mpi( d, &grp->N ) >= 0 );
- }
-#endif /* ECP_SHORTWEIERSTRASS */
-
-cleanup:
- return( ret );
-}
-
-/*
- * Generate a keypair with configurable base point
- */
-int mbedtls_ecp_gen_keypair_base( mbedtls_ecp_group *grp,
- const mbedtls_ecp_point *G,
- mbedtls_mpi *d, mbedtls_ecp_point *Q,
- int (*f_rng)(void *, unsigned char *, size_t),
- void *p_rng )
-{
- int ret;
-
-#if defined(ECP_SHORTWEIERSTRASS)
- if( ecp_get_type( grp ) == ECP_TYPE_SHORT_WEIERSTRASS )
- {
- CRYS_ECPKI_DomainID_t cc_id = mbedtls_to_cryptocell_group_id( grp->id );
- if ( cc_id != CRYS_ECPKI_DomainIDLast )
- {
- ret = ecp_gen_keypair_cryptocell( cc_id, G, d, Q );
- return( ret );
- }
- }
-#endif /* ECP_SHORTWEIERSTRASS */
-
- MBEDTLS_MPI_CHK( mbedtls_ecp_gen_privkey( grp, d, f_rng, p_rng ) );
- MBEDTLS_MPI_CHK( mbedtls_ecp_mul( grp, Q, d, G, f_rng, p_rng ) );
-
-cleanup:
- return( ret );
-}
-
-/*
- * Generate key pair, wrapper for conventional base point
- */
-int mbedtls_ecp_gen_keypair( mbedtls_ecp_group *grp,
- mbedtls_mpi *d, mbedtls_ecp_point *Q,
- int (*f_rng)(void *, unsigned char *, size_t),
- void *p_rng )
-{
- return( mbedtls_ecp_gen_keypair_base( grp, &grp->G, d, Q, f_rng, p_rng ) );
-}
-
-/*
- * Generate a keypair, prettier wrapper
- */
-int mbedtls_ecp_gen_key( mbedtls_ecp_group_id grp_id, mbedtls_ecp_keypair *key,
- int (*f_rng)(void *, unsigned char *, size_t), void *p_rng )
-{
- int ret;
-
- if( ( ret = mbedtls_ecp_group_load( &key->grp, grp_id ) ) != 0 )
- return( ret );
-
- return( mbedtls_ecp_gen_keypair( &key->grp, &key->d, &key->Q, f_rng, p_rng ) );
-}
-
-/*
- * Check a public-private key pair
- */
-int mbedtls_ecp_check_pub_priv( const mbedtls_ecp_keypair *pub, const mbedtls_ecp_keypair *prv )
-{
- int ret;
- mbedtls_ecp_point Q;
- mbedtls_ecp_group grp;
-
- if( pub->grp.id == MBEDTLS_ECP_DP_NONE ||
- pub->grp.id != prv->grp.id ||
- mbedtls_mpi_cmp_mpi( &pub->Q.X, &prv->Q.X ) ||
- mbedtls_mpi_cmp_mpi( &pub->Q.Y, &prv->Q.Y ) ||
- mbedtls_mpi_cmp_mpi( &pub->Q.Z, &prv->Q.Z ) )
- {
- return( MBEDTLS_ERR_ECP_BAD_INPUT_DATA );
- }
-
- mbedtls_ecp_point_init( &Q );
- mbedtls_ecp_group_init( &grp );
-
- /* mbedtls_ecp_mul() needs a non-const group... */
- mbedtls_ecp_group_copy( &grp, &prv->grp );
-
- /* Also checks d is valid */
- MBEDTLS_MPI_CHK( mbedtls_ecp_mul( &grp, &Q, &prv->d, &prv->grp.G, NULL, NULL ) );
-
- if( mbedtls_mpi_cmp_mpi( &Q.X, &prv->Q.X ) ||
- mbedtls_mpi_cmp_mpi( &Q.Y, &prv->Q.Y ) ||
- mbedtls_mpi_cmp_mpi( &Q.Z, &prv->Q.Z ) )
- {
- ret = MBEDTLS_ERR_ECP_BAD_INPUT_DATA;
- goto cleanup;
- }
-
-cleanup:
- mbedtls_ecp_point_free( &Q );
- mbedtls_ecp_group_free( &grp );
-
- return( ret );
-}
-
-#if defined(MBEDTLS_SELF_TEST)
-
-/*
- * Checkup routine
- */
-int mbedtls_ecp_self_test( int verbose )
-{
- int ret;
- size_t i;
- mbedtls_ecp_group grp;
- mbedtls_ecp_point R, P;
- mbedtls_mpi m;
- unsigned long add_c_prev, dbl_c_prev, mul_c_prev;
- /* exponents especially adapted for secp192r1 */
- const char *exponents[] =
- {
- "000000000000000000000000000000000000000000000001", /* one */
- "FFFFFFFFFFFFFFFFFFFFFFFF99DEF836146BC9B1B4D22830", /* N - 1 */
- "5EA6F389A38B8BC81E767753B15AA5569E1782E30ABE7D25", /* random */
- "400000000000000000000000000000000000000000000000", /* one and zeros */
- "7FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF", /* all ones */
- "555555555555555555555555555555555555555555555555", /* 101010... */
- };
-
- mbedtls_ecp_group_init( &grp );
- mbedtls_ecp_point_init( &R );
- mbedtls_ecp_point_init( &P );
- mbedtls_mpi_init( &m );
-
- /* Use secp192r1 if available, or any available curve */
-#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
- MBEDTLS_MPI_CHK( mbedtls_ecp_group_load( &grp, MBEDTLS_ECP_DP_SECP192R1 ) );
-#else
- MBEDTLS_MPI_CHK( mbedtls_ecp_group_load( &grp, mbedtls_ecp_curve_list()->grp_id ) );
-#endif
-
- if( verbose != 0 )
- mbedtls_printf( " ECP test #1 (constant op_count, base point G): " );
-
- /* Do a dummy multiplication first to trigger precomputation */
- MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &m, 2 ) );
- MBEDTLS_MPI_CHK( mbedtls_ecp_mul( &grp, &P, &m, &grp.G, NULL, NULL ) );
-
- add_count = 0;
- dbl_count = 0;
- mul_count = 0;
- MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &m, 16, exponents[0] ) );
- MBEDTLS_MPI_CHK( mbedtls_ecp_mul( &grp, &R, &m, &grp.G, NULL, NULL ) );
-
- for( i = 1; i < sizeof( exponents ) / sizeof( exponents[0] ); i++ )
- {
- add_c_prev = add_count;
- dbl_c_prev = dbl_count;
- mul_c_prev = mul_count;
- add_count = 0;
- dbl_count = 0;
- mul_count = 0;
-
- MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &m, 16, exponents[i] ) );
- MBEDTLS_MPI_CHK( mbedtls_ecp_mul( &grp, &R, &m, &grp.G, NULL, NULL ) );
-
- if( add_count != add_c_prev ||
- dbl_count != dbl_c_prev ||
- mul_count != mul_c_prev )
- {
- if( verbose != 0 )
- mbedtls_printf( "failed (%u)\n", (unsigned int) i );
-
- ret = 1;
- goto cleanup;
- }
- }
-
- if( verbose != 0 )
- mbedtls_printf( "passed\n" );
-
- if( verbose != 0 )
- mbedtls_printf( " ECP test #2 (constant op_count, other point): " );
- /* We computed P = 2G last time, use it */
-
- add_count = 0;
- dbl_count = 0;
- mul_count = 0;
- MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &m, 16, exponents[0] ) );
- MBEDTLS_MPI_CHK( mbedtls_ecp_mul( &grp, &R, &m, &P, NULL, NULL ) );
-
- for( i = 1; i < sizeof( exponents ) / sizeof( exponents[0] ); i++ )
- {
- add_c_prev = add_count;
- dbl_c_prev = dbl_count;
- mul_c_prev = mul_count;
- add_count = 0;
- dbl_count = 0;
- mul_count = 0;
-
- MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &m, 16, exponents[i] ) );
- MBEDTLS_MPI_CHK( mbedtls_ecp_mul( &grp, &R, &m, &P, NULL, NULL ) );
-
- if( add_count != add_c_prev ||
- dbl_count != dbl_c_prev ||
- mul_count != mul_c_prev )
- {
- if( verbose != 0 )
- mbedtls_printf( "failed (%u)\n", (unsigned int) i );
-
- ret = 1;
- goto cleanup;
- }
- }
-
- if( verbose != 0 )
- mbedtls_printf( "passed\n" );
-
-cleanup:
-
- if( ret < 0 && verbose != 0 )
- mbedtls_printf( "Unexpected error, return code = %08X\n", ret );
-
- mbedtls_ecp_group_free( &grp );
- mbedtls_ecp_point_free( &R );
- mbedtls_ecp_point_free( &P );
- mbedtls_mpi_free( &m );
-
- if( verbose != 0 )
- mbedtls_printf( "\n" );
-
- return( ret );
-}
-
-#endif /* MBEDTLS_SELF_TEST */
-
-#endif /* !MBEDTLS_ECP_ALT */
-
-#endif /* MBEDTLS_ECP_C */
diff --git a/third_party/NordicSemiconductor/libraries/crypto/ecp_curves_alt.c b/third_party/NordicSemiconductor/libraries/crypto/ecp_curves_alt.c
deleted file mode 100644
index 60c2c93..0000000
--- a/third_party/NordicSemiconductor/libraries/crypto/ecp_curves_alt.c
+++ /dev/null
@@ -1,1329 +0,0 @@
-/*
- * Elliptic curves over GF(p): curve-specific data and functions
- *
- * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- * This file is part of mbed TLS (https://tls.mbed.org)
- */
-
-#if !defined(MBEDTLS_CONFIG_FILE)
-#include "mbedtls/config.h"
-#else
-#include MBEDTLS_CONFIG_FILE
-#endif
-
-#if defined(MBEDTLS_ECP_C)
-
-#include "mbedtls/ecp.h"
-
-#include <string.h>
-
-#if defined(MBEDTLS_ECP_ALT)
-
-#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
- !defined(inline) && !defined(__cplusplus)
-#define inline __inline
-#endif
-
-/*
- * Conversion macros for embedded constants:
- * build lists of mbedtls_mpi_uint's from lists of unsigned char's grouped by 8, 4 or 2
- */
-#if defined(MBEDTLS_HAVE_INT32)
-
-#define BYTES_TO_T_UINT_4( a, b, c, d ) \
- ( (mbedtls_mpi_uint) a << 0 ) | \
- ( (mbedtls_mpi_uint) b << 8 ) | \
- ( (mbedtls_mpi_uint) c << 16 ) | \
- ( (mbedtls_mpi_uint) d << 24 )
-
-#define BYTES_TO_T_UINT_2( a, b ) \
- BYTES_TO_T_UINT_4( a, b, 0, 0 )
-
-#define BYTES_TO_T_UINT_8( a, b, c, d, e, f, g, h ) \
- BYTES_TO_T_UINT_4( a, b, c, d ), \
- BYTES_TO_T_UINT_4( e, f, g, h )
-
-#else /* 64-bits */
-
-#define BYTES_TO_T_UINT_8( a, b, c, d, e, f, g, h ) \
- ( (mbedtls_mpi_uint) a << 0 ) | \
- ( (mbedtls_mpi_uint) b << 8 ) | \
- ( (mbedtls_mpi_uint) c << 16 ) | \
- ( (mbedtls_mpi_uint) d << 24 ) | \
- ( (mbedtls_mpi_uint) e << 32 ) | \
- ( (mbedtls_mpi_uint) f << 40 ) | \
- ( (mbedtls_mpi_uint) g << 48 ) | \
- ( (mbedtls_mpi_uint) h << 56 )
-
-#define BYTES_TO_T_UINT_4( a, b, c, d ) \
- BYTES_TO_T_UINT_8( a, b, c, d, 0, 0, 0, 0 )
-
-#define BYTES_TO_T_UINT_2( a, b ) \
- BYTES_TO_T_UINT_8( a, b, 0, 0, 0, 0, 0, 0 )
-
-#endif /* bits in mbedtls_mpi_uint */
-
-/*
- * Note: the constants are in little-endian order
- * to be directly usable in MPIs
- */
-
-/*
- * Domain parameters for secp192r1
- */
-#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
-static const mbedtls_mpi_uint secp192r1_p[] = {
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
-};
-static const mbedtls_mpi_uint secp192r1_b[] = {
- BYTES_TO_T_UINT_8( 0xB1, 0xB9, 0x46, 0xC1, 0xEC, 0xDE, 0xB8, 0xFE ),
- BYTES_TO_T_UINT_8( 0x49, 0x30, 0x24, 0x72, 0xAB, 0xE9, 0xA7, 0x0F ),
- BYTES_TO_T_UINT_8( 0xE7, 0x80, 0x9C, 0xE5, 0x19, 0x05, 0x21, 0x64 ),
-};
-static const mbedtls_mpi_uint secp192r1_gx[] = {
- BYTES_TO_T_UINT_8( 0x12, 0x10, 0xFF, 0x82, 0xFD, 0x0A, 0xFF, 0xF4 ),
- BYTES_TO_T_UINT_8( 0x00, 0x88, 0xA1, 0x43, 0xEB, 0x20, 0xBF, 0x7C ),
- BYTES_TO_T_UINT_8( 0xF6, 0x90, 0x30, 0xB0, 0x0E, 0xA8, 0x8D, 0x18 ),
-};
-static const mbedtls_mpi_uint secp192r1_gy[] = {
- BYTES_TO_T_UINT_8( 0x11, 0x48, 0x79, 0x1E, 0xA1, 0x77, 0xF9, 0x73 ),
- BYTES_TO_T_UINT_8( 0xD5, 0xCD, 0x24, 0x6B, 0xED, 0x11, 0x10, 0x63 ),
- BYTES_TO_T_UINT_8( 0x78, 0xDA, 0xC8, 0xFF, 0x95, 0x2B, 0x19, 0x07 ),
-};
-static const mbedtls_mpi_uint secp192r1_n[] = {
- BYTES_TO_T_UINT_8( 0x31, 0x28, 0xD2, 0xB4, 0xB1, 0xC9, 0x6B, 0x14 ),
- BYTES_TO_T_UINT_8( 0x36, 0xF8, 0xDE, 0x99, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
-};
-#endif /* MBEDTLS_ECP_DP_SECP192R1_ENABLED */
-
-/*
- * Domain parameters for secp224r1
- */
-#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED)
-static const mbedtls_mpi_uint secp224r1_p[] = {
- BYTES_TO_T_UINT_8( 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 ),
- BYTES_TO_T_UINT_8( 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00 ),
-};
-static const mbedtls_mpi_uint secp224r1_b[] = {
- BYTES_TO_T_UINT_8( 0xB4, 0xFF, 0x55, 0x23, 0x43, 0x39, 0x0B, 0x27 ),
- BYTES_TO_T_UINT_8( 0xBA, 0xD8, 0xBF, 0xD7, 0xB7, 0xB0, 0x44, 0x50 ),
- BYTES_TO_T_UINT_8( 0x56, 0x32, 0x41, 0xF5, 0xAB, 0xB3, 0x04, 0x0C ),
- BYTES_TO_T_UINT_4( 0x85, 0x0A, 0x05, 0xB4 ),
-};
-static const mbedtls_mpi_uint secp224r1_gx[] = {
- BYTES_TO_T_UINT_8( 0x21, 0x1D, 0x5C, 0x11, 0xD6, 0x80, 0x32, 0x34 ),
- BYTES_TO_T_UINT_8( 0x22, 0x11, 0xC2, 0x56, 0xD3, 0xC1, 0x03, 0x4A ),
- BYTES_TO_T_UINT_8( 0xB9, 0x90, 0x13, 0x32, 0x7F, 0xBF, 0xB4, 0x6B ),
- BYTES_TO_T_UINT_4( 0xBD, 0x0C, 0x0E, 0xB7 ),
-};
-static const mbedtls_mpi_uint secp224r1_gy[] = {
- BYTES_TO_T_UINT_8( 0x34, 0x7E, 0x00, 0x85, 0x99, 0x81, 0xD5, 0x44 ),
- BYTES_TO_T_UINT_8( 0x64, 0x47, 0x07, 0x5A, 0xA0, 0x75, 0x43, 0xCD ),
- BYTES_TO_T_UINT_8( 0xE6, 0xDF, 0x22, 0x4C, 0xFB, 0x23, 0xF7, 0xB5 ),
- BYTES_TO_T_UINT_4( 0x88, 0x63, 0x37, 0xBD ),
-};
-static const mbedtls_mpi_uint secp224r1_n[] = {
- BYTES_TO_T_UINT_8( 0x3D, 0x2A, 0x5C, 0x5C, 0x45, 0x29, 0xDD, 0x13 ),
- BYTES_TO_T_UINT_8( 0x3E, 0xF0, 0xB8, 0xE0, 0xA2, 0x16, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_4( 0xFF, 0xFF, 0xFF, 0xFF ),
-};
-#endif /* MBEDTLS_ECP_DP_SECP224R1_ENABLED */
-
-/*
- * Domain parameters for secp256r1
- */
-#if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED)
-static const mbedtls_mpi_uint secp256r1_p[] = {
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00 ),
- BYTES_TO_T_UINT_8( 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 ),
- BYTES_TO_T_UINT_8( 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF ),
-};
-static const mbedtls_mpi_uint secp256r1_b[] = {
- BYTES_TO_T_UINT_8( 0x4B, 0x60, 0xD2, 0x27, 0x3E, 0x3C, 0xCE, 0x3B ),
- BYTES_TO_T_UINT_8( 0xF6, 0xB0, 0x53, 0xCC, 0xB0, 0x06, 0x1D, 0x65 ),
- BYTES_TO_T_UINT_8( 0xBC, 0x86, 0x98, 0x76, 0x55, 0xBD, 0xEB, 0xB3 ),
- BYTES_TO_T_UINT_8( 0xE7, 0x93, 0x3A, 0xAA, 0xD8, 0x35, 0xC6, 0x5A ),
-};
-static const mbedtls_mpi_uint secp256r1_gx[] = {
- BYTES_TO_T_UINT_8( 0x96, 0xC2, 0x98, 0xD8, 0x45, 0x39, 0xA1, 0xF4 ),
- BYTES_TO_T_UINT_8( 0xA0, 0x33, 0xEB, 0x2D, 0x81, 0x7D, 0x03, 0x77 ),
- BYTES_TO_T_UINT_8( 0xF2, 0x40, 0xA4, 0x63, 0xE5, 0xE6, 0xBC, 0xF8 ),
- BYTES_TO_T_UINT_8( 0x47, 0x42, 0x2C, 0xE1, 0xF2, 0xD1, 0x17, 0x6B ),
-};
-static const mbedtls_mpi_uint secp256r1_gy[] = {
- BYTES_TO_T_UINT_8( 0xF5, 0x51, 0xBF, 0x37, 0x68, 0x40, 0xB6, 0xCB ),
- BYTES_TO_T_UINT_8( 0xCE, 0x5E, 0x31, 0x6B, 0x57, 0x33, 0xCE, 0x2B ),
- BYTES_TO_T_UINT_8( 0x16, 0x9E, 0x0F, 0x7C, 0x4A, 0xEB, 0xE7, 0x8E ),
- BYTES_TO_T_UINT_8( 0x9B, 0x7F, 0x1A, 0xFE, 0xE2, 0x42, 0xE3, 0x4F ),
-};
-static const mbedtls_mpi_uint secp256r1_n[] = {
- BYTES_TO_T_UINT_8( 0x51, 0x25, 0x63, 0xFC, 0xC2, 0xCA, 0xB9, 0xF3 ),
- BYTES_TO_T_UINT_8( 0x84, 0x9E, 0x17, 0xA7, 0xAD, 0xFA, 0xE6, 0xBC ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF ),
-};
-#endif /* MBEDTLS_ECP_DP_SECP256R1_ENABLED */
-
-/*
- * Domain parameters for secp384r1
- */
-#if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
-static const mbedtls_mpi_uint secp384r1_p[] = {
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00 ),
- BYTES_TO_T_UINT_8( 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
-};
-static const mbedtls_mpi_uint secp384r1_b[] = {
- BYTES_TO_T_UINT_8( 0xEF, 0x2A, 0xEC, 0xD3, 0xED, 0xC8, 0x85, 0x2A ),
- BYTES_TO_T_UINT_8( 0x9D, 0xD1, 0x2E, 0x8A, 0x8D, 0x39, 0x56, 0xC6 ),
- BYTES_TO_T_UINT_8( 0x5A, 0x87, 0x13, 0x50, 0x8F, 0x08, 0x14, 0x03 ),
- BYTES_TO_T_UINT_8( 0x12, 0x41, 0x81, 0xFE, 0x6E, 0x9C, 0x1D, 0x18 ),
- BYTES_TO_T_UINT_8( 0x19, 0x2D, 0xF8, 0xE3, 0x6B, 0x05, 0x8E, 0x98 ),
- BYTES_TO_T_UINT_8( 0xE4, 0xE7, 0x3E, 0xE2, 0xA7, 0x2F, 0x31, 0xB3 ),
-};
-static const mbedtls_mpi_uint secp384r1_gx[] = {
- BYTES_TO_T_UINT_8( 0xB7, 0x0A, 0x76, 0x72, 0x38, 0x5E, 0x54, 0x3A ),
- BYTES_TO_T_UINT_8( 0x6C, 0x29, 0x55, 0xBF, 0x5D, 0xF2, 0x02, 0x55 ),
- BYTES_TO_T_UINT_8( 0x38, 0x2A, 0x54, 0x82, 0xE0, 0x41, 0xF7, 0x59 ),
- BYTES_TO_T_UINT_8( 0x98, 0x9B, 0xA7, 0x8B, 0x62, 0x3B, 0x1D, 0x6E ),
- BYTES_TO_T_UINT_8( 0x74, 0xAD, 0x20, 0xF3, 0x1E, 0xC7, 0xB1, 0x8E ),
- BYTES_TO_T_UINT_8( 0x37, 0x05, 0x8B, 0xBE, 0x22, 0xCA, 0x87, 0xAA ),
-};
-static const mbedtls_mpi_uint secp384r1_gy[] = {
- BYTES_TO_T_UINT_8( 0x5F, 0x0E, 0xEA, 0x90, 0x7C, 0x1D, 0x43, 0x7A ),
- BYTES_TO_T_UINT_8( 0x9D, 0x81, 0x7E, 0x1D, 0xCE, 0xB1, 0x60, 0x0A ),
- BYTES_TO_T_UINT_8( 0xC0, 0xB8, 0xF0, 0xB5, 0x13, 0x31, 0xDA, 0xE9 ),
- BYTES_TO_T_UINT_8( 0x7C, 0x14, 0x9A, 0x28, 0xBD, 0x1D, 0xF4, 0xF8 ),
- BYTES_TO_T_UINT_8( 0x29, 0xDC, 0x92, 0x92, 0xBF, 0x98, 0x9E, 0x5D ),
- BYTES_TO_T_UINT_8( 0x6F, 0x2C, 0x26, 0x96, 0x4A, 0xDE, 0x17, 0x36 ),
-};
-static const mbedtls_mpi_uint secp384r1_n[] = {
- BYTES_TO_T_UINT_8( 0x73, 0x29, 0xC5, 0xCC, 0x6A, 0x19, 0xEC, 0xEC ),
- BYTES_TO_T_UINT_8( 0x7A, 0xA7, 0xB0, 0x48, 0xB2, 0x0D, 0x1A, 0x58 ),
- BYTES_TO_T_UINT_8( 0xDF, 0x2D, 0x37, 0xF4, 0x81, 0x4D, 0x63, 0xC7 ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
-};
-#endif /* MBEDTLS_ECP_DP_SECP384R1_ENABLED */
-
-/*
- * Domain parameters for secp521r1
- */
-#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
-static const mbedtls_mpi_uint secp521r1_p[] = {
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_2( 0xFF, 0x01 ),
-};
-static const mbedtls_mpi_uint secp521r1_b[] = {
- BYTES_TO_T_UINT_8( 0x00, 0x3F, 0x50, 0x6B, 0xD4, 0x1F, 0x45, 0xEF ),
- BYTES_TO_T_UINT_8( 0xF1, 0x34, 0x2C, 0x3D, 0x88, 0xDF, 0x73, 0x35 ),
- BYTES_TO_T_UINT_8( 0x07, 0xBF, 0xB1, 0x3B, 0xBD, 0xC0, 0x52, 0x16 ),
- BYTES_TO_T_UINT_8( 0x7B, 0x93, 0x7E, 0xEC, 0x51, 0x39, 0x19, 0x56 ),
- BYTES_TO_T_UINT_8( 0xE1, 0x09, 0xF1, 0x8E, 0x91, 0x89, 0xB4, 0xB8 ),
- BYTES_TO_T_UINT_8( 0xF3, 0x15, 0xB3, 0x99, 0x5B, 0x72, 0xDA, 0xA2 ),
- BYTES_TO_T_UINT_8( 0xEE, 0x40, 0x85, 0xB6, 0xA0, 0x21, 0x9A, 0x92 ),
- BYTES_TO_T_UINT_8( 0x1F, 0x9A, 0x1C, 0x8E, 0x61, 0xB9, 0x3E, 0x95 ),
- BYTES_TO_T_UINT_2( 0x51, 0x00 ),
-};
-static const mbedtls_mpi_uint secp521r1_gx[] = {
- BYTES_TO_T_UINT_8( 0x66, 0xBD, 0xE5, 0xC2, 0x31, 0x7E, 0x7E, 0xF9 ),
- BYTES_TO_T_UINT_8( 0x9B, 0x42, 0x6A, 0x85, 0xC1, 0xB3, 0x48, 0x33 ),
- BYTES_TO_T_UINT_8( 0xDE, 0xA8, 0xFF, 0xA2, 0x27, 0xC1, 0x1D, 0xFE ),
- BYTES_TO_T_UINT_8( 0x28, 0x59, 0xE7, 0xEF, 0x77, 0x5E, 0x4B, 0xA1 ),
- BYTES_TO_T_UINT_8( 0xBA, 0x3D, 0x4D, 0x6B, 0x60, 0xAF, 0x28, 0xF8 ),
- BYTES_TO_T_UINT_8( 0x21, 0xB5, 0x3F, 0x05, 0x39, 0x81, 0x64, 0x9C ),
- BYTES_TO_T_UINT_8( 0x42, 0xB4, 0x95, 0x23, 0x66, 0xCB, 0x3E, 0x9E ),
- BYTES_TO_T_UINT_8( 0xCD, 0xE9, 0x04, 0x04, 0xB7, 0x06, 0x8E, 0x85 ),
- BYTES_TO_T_UINT_2( 0xC6, 0x00 ),
-};
-static const mbedtls_mpi_uint secp521r1_gy[] = {
- BYTES_TO_T_UINT_8( 0x50, 0x66, 0xD1, 0x9F, 0x76, 0x94, 0xBE, 0x88 ),
- BYTES_TO_T_UINT_8( 0x40, 0xC2, 0x72, 0xA2, 0x86, 0x70, 0x3C, 0x35 ),
- BYTES_TO_T_UINT_8( 0x61, 0x07, 0xAD, 0x3F, 0x01, 0xB9, 0x50, 0xC5 ),
- BYTES_TO_T_UINT_8( 0x40, 0x26, 0xF4, 0x5E, 0x99, 0x72, 0xEE, 0x97 ),
- BYTES_TO_T_UINT_8( 0x2C, 0x66, 0x3E, 0x27, 0x17, 0xBD, 0xAF, 0x17 ),
- BYTES_TO_T_UINT_8( 0x68, 0x44, 0x9B, 0x57, 0x49, 0x44, 0xF5, 0x98 ),
- BYTES_TO_T_UINT_8( 0xD9, 0x1B, 0x7D, 0x2C, 0xB4, 0x5F, 0x8A, 0x5C ),
- BYTES_TO_T_UINT_8( 0x04, 0xC0, 0x3B, 0x9A, 0x78, 0x6A, 0x29, 0x39 ),
- BYTES_TO_T_UINT_2( 0x18, 0x01 ),
-};
-static const mbedtls_mpi_uint secp521r1_n[] = {
- BYTES_TO_T_UINT_8( 0x09, 0x64, 0x38, 0x91, 0x1E, 0xB7, 0x6F, 0xBB ),
- BYTES_TO_T_UINT_8( 0xAE, 0x47, 0x9C, 0x89, 0xB8, 0xC9, 0xB5, 0x3B ),
- BYTES_TO_T_UINT_8( 0xD0, 0xA5, 0x09, 0xF7, 0x48, 0x01, 0xCC, 0x7F ),
- BYTES_TO_T_UINT_8( 0x6B, 0x96, 0x2F, 0xBF, 0x83, 0x87, 0x86, 0x51 ),
- BYTES_TO_T_UINT_8( 0xFA, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_2( 0xFF, 0x01 ),
-};
-#endif /* MBEDTLS_ECP_DP_SECP521R1_ENABLED */
-
-#if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED)
-static const mbedtls_mpi_uint secp192k1_p[] = {
- BYTES_TO_T_UINT_8( 0x37, 0xEE, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
-};
-static const mbedtls_mpi_uint secp192k1_a[] = {
- BYTES_TO_T_UINT_2( 0x00, 0x00 ),
-};
-static const mbedtls_mpi_uint secp192k1_b[] = {
- BYTES_TO_T_UINT_2( 0x03, 0x00 ),
-};
-static const mbedtls_mpi_uint secp192k1_gx[] = {
- BYTES_TO_T_UINT_8( 0x7D, 0x6C, 0xE0, 0xEA, 0xB1, 0xD1, 0xA5, 0x1D ),
- BYTES_TO_T_UINT_8( 0x34, 0xF4, 0xB7, 0x80, 0x02, 0x7D, 0xB0, 0x26 ),
- BYTES_TO_T_UINT_8( 0xAE, 0xE9, 0x57, 0xC0, 0x0E, 0xF1, 0x4F, 0xDB ),
-};
-static const mbedtls_mpi_uint secp192k1_gy[] = {
- BYTES_TO_T_UINT_8( 0x9D, 0x2F, 0x5E, 0xD9, 0x88, 0xAA, 0x82, 0x40 ),
- BYTES_TO_T_UINT_8( 0x34, 0x86, 0xBE, 0x15, 0xD0, 0x63, 0x41, 0x84 ),
- BYTES_TO_T_UINT_8( 0xA7, 0x28, 0x56, 0x9C, 0x6D, 0x2F, 0x2F, 0x9B ),
-};
-static const mbedtls_mpi_uint secp192k1_n[] = {
- BYTES_TO_T_UINT_8( 0x8D, 0xFD, 0xDE, 0x74, 0x6A, 0x46, 0x69, 0x0F ),
- BYTES_TO_T_UINT_8( 0x17, 0xFC, 0xF2, 0x26, 0xFE, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
-};
-#endif /* MBEDTLS_ECP_DP_SECP192K1_ENABLED */
-
-#if defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED)
-static const mbedtls_mpi_uint secp224k1_p[] = {
- BYTES_TO_T_UINT_8( 0x6D, 0xE5, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_4( 0xFF, 0xFF, 0xFF, 0xFF ),
-};
-static const mbedtls_mpi_uint secp224k1_a[] = {
- BYTES_TO_T_UINT_2( 0x00, 0x00 ),
-};
-static const mbedtls_mpi_uint secp224k1_b[] = {
- BYTES_TO_T_UINT_2( 0x05, 0x00 ),
-};
-static const mbedtls_mpi_uint secp224k1_gx[] = {
- BYTES_TO_T_UINT_8( 0x5C, 0xA4, 0xB7, 0xB6, 0x0E, 0x65, 0x7E, 0x0F ),
- BYTES_TO_T_UINT_8( 0xA9, 0x75, 0x70, 0xE4, 0xE9, 0x67, 0xA4, 0x69 ),
- BYTES_TO_T_UINT_8( 0xA1, 0x28, 0xFC, 0x30, 0xDF, 0x99, 0xF0, 0x4D ),
- BYTES_TO_T_UINT_4( 0x33, 0x5B, 0x45, 0xA1 ),
-};
-static const mbedtls_mpi_uint secp224k1_gy[] = {
- BYTES_TO_T_UINT_8( 0xA5, 0x61, 0x6D, 0x55, 0xDB, 0x4B, 0xCA, 0xE2 ),
- BYTES_TO_T_UINT_8( 0x59, 0xBD, 0xB0, 0xC0, 0xF7, 0x19, 0xE3, 0xF7 ),
- BYTES_TO_T_UINT_8( 0xD6, 0xFB, 0xCA, 0x82, 0x42, 0x34, 0xBA, 0x7F ),
- BYTES_TO_T_UINT_4( 0xED, 0x9F, 0x08, 0x7E ),
-};
-static const mbedtls_mpi_uint secp224k1_n[] = {
- BYTES_TO_T_UINT_8( 0xF7, 0xB1, 0x9F, 0x76, 0x71, 0xA9, 0xF0, 0xCA ),
- BYTES_TO_T_UINT_8( 0x84, 0x61, 0xEC, 0xD2, 0xE8, 0xDC, 0x01, 0x00 ),
- BYTES_TO_T_UINT_8( 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 ),
- BYTES_TO_T_UINT_8( 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 ),
-};
-#endif /* MBEDTLS_ECP_DP_SECP224K1_ENABLED */
-
-#if defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
-static const mbedtls_mpi_uint secp256k1_p[] = {
- BYTES_TO_T_UINT_8( 0x2F, 0xFC, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
-};
-static const mbedtls_mpi_uint secp256k1_a[] = {
- BYTES_TO_T_UINT_2( 0x00, 0x00 ),
-};
-static const mbedtls_mpi_uint secp256k1_b[] = {
- BYTES_TO_T_UINT_2( 0x07, 0x00 ),
-};
-static const mbedtls_mpi_uint secp256k1_gx[] = {
- BYTES_TO_T_UINT_8( 0x98, 0x17, 0xF8, 0x16, 0x5B, 0x81, 0xF2, 0x59 ),
- BYTES_TO_T_UINT_8( 0xD9, 0x28, 0xCE, 0x2D, 0xDB, 0xFC, 0x9B, 0x02 ),
- BYTES_TO_T_UINT_8( 0x07, 0x0B, 0x87, 0xCE, 0x95, 0x62, 0xA0, 0x55 ),
- BYTES_TO_T_UINT_8( 0xAC, 0xBB, 0xDC, 0xF9, 0x7E, 0x66, 0xBE, 0x79 ),
-};
-static const mbedtls_mpi_uint secp256k1_gy[] = {
- BYTES_TO_T_UINT_8( 0xB8, 0xD4, 0x10, 0xFB, 0x8F, 0xD0, 0x47, 0x9C ),
- BYTES_TO_T_UINT_8( 0x19, 0x54, 0x85, 0xA6, 0x48, 0xB4, 0x17, 0xFD ),
- BYTES_TO_T_UINT_8( 0xA8, 0x08, 0x11, 0x0E, 0xFC, 0xFB, 0xA4, 0x5D ),
- BYTES_TO_T_UINT_8( 0x65, 0xC4, 0xA3, 0x26, 0x77, 0xDA, 0x3A, 0x48 ),
-};
-static const mbedtls_mpi_uint secp256k1_n[] = {
- BYTES_TO_T_UINT_8( 0x41, 0x41, 0x36, 0xD0, 0x8C, 0x5E, 0xD2, 0xBF ),
- BYTES_TO_T_UINT_8( 0x3B, 0xA0, 0x48, 0xAF, 0xE6, 0xDC, 0xAE, 0xBA ),
- BYTES_TO_T_UINT_8( 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
- BYTES_TO_T_UINT_8( 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF ),
-};
-#endif /* MBEDTLS_ECP_DP_SECP256K1_ENABLED */
-
-/*
- * Domain parameters for brainpoolP256r1 (RFC 5639 3.4)
- */
-#if defined(MBEDTLS_ECP_DP_BP256R1_ENABLED)
-static const mbedtls_mpi_uint brainpoolP256r1_p[] = {
- BYTES_TO_T_UINT_8( 0x77, 0x53, 0x6E, 0x1F, 0x1D, 0x48, 0x13, 0x20 ),
- BYTES_TO_T_UINT_8( 0x28, 0x20, 0x26, 0xD5, 0x23, 0xF6, 0x3B, 0x6E ),
- BYTES_TO_T_UINT_8( 0x72, 0x8D, 0x83, 0x9D, 0x90, 0x0A, 0x66, 0x3E ),
- BYTES_TO_T_UINT_8( 0xBC, 0xA9, 0xEE, 0xA1, 0xDB, 0x57, 0xFB, 0xA9 ),
-};
-static const mbedtls_mpi_uint brainpoolP256r1_a[] = {
- BYTES_TO_T_UINT_8( 0xD9, 0xB5, 0x30, 0xF3, 0x44, 0x4B, 0x4A, 0xE9 ),
- BYTES_TO_T_UINT_8( 0x6C, 0x5C, 0xDC, 0x26, 0xC1, 0x55, 0x80, 0xFB ),
- BYTES_TO_T_UINT_8( 0xE7, 0xFF, 0x7A, 0x41, 0x30, 0x75, 0xF6, 0xEE ),
- BYTES_TO_T_UINT_8( 0x57, 0x30, 0x2C, 0xFC, 0x75, 0x09, 0x5A, 0x7D ),
-};
-static const mbedtls_mpi_uint brainpoolP256r1_b[] = {
- BYTES_TO_T_UINT_8( 0xB6, 0x07, 0x8C, 0xFF, 0x18, 0xDC, 0xCC, 0x6B ),
- BYTES_TO_T_UINT_8( 0xCE, 0xE1, 0xF7, 0x5C, 0x29, 0x16, 0x84, 0x95 ),
- BYTES_TO_T_UINT_8( 0xBF, 0x7C, 0xD7, 0xBB, 0xD9, 0xB5, 0x30, 0xF3 ),
- BYTES_TO_T_UINT_8( 0x44, 0x4B, 0x4A, 0xE9, 0x6C, 0x5C, 0xDC, 0x26 ),
-};
-static const mbedtls_mpi_uint brainpoolP256r1_gx[] = {
- BYTES_TO_T_UINT_8( 0x62, 0x32, 0xCE, 0x9A, 0xBD, 0x53, 0x44, 0x3A ),
- BYTES_TO_T_UINT_8( 0xC2, 0x23, 0xBD, 0xE3, 0xE1, 0x27, 0xDE, 0xB9 ),
- BYTES_TO_T_UINT_8( 0xAF, 0xB7, 0x81, 0xFC, 0x2F, 0x48, 0x4B, 0x2C ),
- BYTES_TO_T_UINT_8( 0xCB, 0x57, 0x7E, 0xCB, 0xB9, 0xAE, 0xD2, 0x8B ),
-};
-static const mbedtls_mpi_uint brainpoolP256r1_gy[] = {
- BYTES_TO_T_UINT_8( 0x97, 0x69, 0x04, 0x2F, 0xC7, 0x54, 0x1D, 0x5C ),
- BYTES_TO_T_UINT_8( 0x54, 0x8E, 0xED, 0x2D, 0x13, 0x45, 0x77, 0xC2 ),
- BYTES_TO_T_UINT_8( 0xC9, 0x1D, 0x61, 0x14, 0x1A, 0x46, 0xF8, 0x97 ),
- BYTES_TO_T_UINT_8( 0xFD, 0xC4, 0xDA, 0xC3, 0x35, 0xF8, 0x7E, 0x54 ),
-};
-static const mbedtls_mpi_uint brainpoolP256r1_n[] = {
- BYTES_TO_T_UINT_8( 0xA7, 0x56, 0x48, 0x97, 0x82, 0x0E, 0x1E, 0x90 ),
- BYTES_TO_T_UINT_8( 0xF7, 0xA6, 0x61, 0xB5, 0xA3, 0x7A, 0x39, 0x8C ),
- BYTES_TO_T_UINT_8( 0x71, 0x8D, 0x83, 0x9D, 0x90, 0x0A, 0x66, 0x3E ),
- BYTES_TO_T_UINT_8( 0xBC, 0xA9, 0xEE, 0xA1, 0xDB, 0x57, 0xFB, 0xA9 ),
-};
-#endif /* MBEDTLS_ECP_DP_BP256R1_ENABLED */
-
-/*
- * Domain parameters for brainpoolP384r1 (RFC 5639 3.6)
- */
-#if defined(MBEDTLS_ECP_DP_BP384R1_ENABLED)
-static const mbedtls_mpi_uint brainpoolP384r1_p[] = {
- BYTES_TO_T_UINT_8( 0x53, 0xEC, 0x07, 0x31, 0x13, 0x00, 0x47, 0x87 ),
- BYTES_TO_T_UINT_8( 0x71, 0x1A, 0x1D, 0x90, 0x29, 0xA7, 0xD3, 0xAC ),
- BYTES_TO_T_UINT_8( 0x23, 0x11, 0xB7, 0x7F, 0x19, 0xDA, 0xB1, 0x12 ),
- BYTES_TO_T_UINT_8( 0xB4, 0x56, 0x54, 0xED, 0x09, 0x71, 0x2F, 0x15 ),
- BYTES_TO_T_UINT_8( 0xDF, 0x41, 0xE6, 0x50, 0x7E, 0x6F, 0x5D, 0x0F ),
- BYTES_TO_T_UINT_8( 0x28, 0x6D, 0x38, 0xA3, 0x82, 0x1E, 0xB9, 0x8C ),
-};
-static const mbedtls_mpi_uint brainpoolP384r1_a[] = {
- BYTES_TO_T_UINT_8( 0x26, 0x28, 0xCE, 0x22, 0xDD, 0xC7, 0xA8, 0x04 ),
- BYTES_TO_T_UINT_8( 0xEB, 0xD4, 0x3A, 0x50, 0x4A, 0x81, 0xA5, 0x8A ),
- BYTES_TO_T_UINT_8( 0x0F, 0xF9, 0x91, 0xBA, 0xEF, 0x65, 0x91, 0x13 ),
- BYTES_TO_T_UINT_8( 0x87, 0x27, 0xB2, 0x4F, 0x8E, 0xA2, 0xBE, 0xC2 ),
- BYTES_TO_T_UINT_8( 0xA0, 0xAF, 0x05, 0xCE, 0x0A, 0x08, 0x72, 0x3C ),
- BYTES_TO_T_UINT_8( 0x0C, 0x15, 0x8C, 0x3D, 0xC6, 0x82, 0xC3, 0x7B ),
-};
-static const mbedtls_mpi_uint brainpoolP384r1_b[] = {
- BYTES_TO_T_UINT_8( 0x11, 0x4C, 0x50, 0xFA, 0x96, 0x86, 0xB7, 0x3A ),
- BYTES_TO_T_UINT_8( 0x94, 0xC9, 0xDB, 0x95, 0x02, 0x39, 0xB4, 0x7C ),
- BYTES_TO_T_UINT_8( 0xD5, 0x62, 0xEB, 0x3E, 0xA5, 0x0E, 0x88, 0x2E ),
- BYTES_TO_T_UINT_8( 0xA6, 0xD2, 0xDC, 0x07, 0xE1, 0x7D, 0xB7, 0x2F ),
- BYTES_TO_T_UINT_8( 0x7C, 0x44, 0xF0, 0x16, 0x54, 0xB5, 0x39, 0x8B ),
- BYTES_TO_T_UINT_8( 0x26, 0x28, 0xCE, 0x22, 0xDD, 0xC7, 0xA8, 0x04 ),
-};
-static const mbedtls_mpi_uint brainpoolP384r1_gx[] = {
- BYTES_TO_T_UINT_8( 0x1E, 0xAF, 0xD4, 0x47, 0xE2, 0xB2, 0x87, 0xEF ),
- BYTES_TO_T_UINT_8( 0xAA, 0x46, 0xD6, 0x36, 0x34, 0xE0, 0x26, 0xE8 ),
- BYTES_TO_T_UINT_8( 0xE8, 0x10, 0xBD, 0x0C, 0xFE, 0xCA, 0x7F, 0xDB ),
- BYTES_TO_T_UINT_8( 0xE3, 0x4F, 0xF1, 0x7E, 0xE7, 0xA3, 0x47, 0x88 ),
- BYTES_TO_T_UINT_8( 0x6B, 0x3F, 0xC1, 0xB7, 0x81, 0x3A, 0xA6, 0xA2 ),
- BYTES_TO_T_UINT_8( 0xFF, 0x45, 0xCF, 0x68, 0xF0, 0x64, 0x1C, 0x1D ),
-};
-static const mbedtls_mpi_uint brainpoolP384r1_gy[] = {
- BYTES_TO_T_UINT_8( 0x15, 0x53, 0x3C, 0x26, 0x41, 0x03, 0x82, 0x42 ),
- BYTES_TO_T_UINT_8( 0x11, 0x81, 0x91, 0x77, 0x21, 0x46, 0x46, 0x0E ),
- BYTES_TO_T_UINT_8( 0x28, 0x29, 0x91, 0xF9, 0x4F, 0x05, 0x9C, 0xE1 ),
- BYTES_TO_T_UINT_8( 0x64, 0x58, 0xEC, 0xFE, 0x29, 0x0B, 0xB7, 0x62 ),
- BYTES_TO_T_UINT_8( 0x52, 0xD5, 0xCF, 0x95, 0x8E, 0xEB, 0xB1, 0x5C ),
- BYTES_TO_T_UINT_8( 0xA4, 0xC2, 0xF9, 0x20, 0x75, 0x1D, 0xBE, 0x8A ),
-};
-static const mbedtls_mpi_uint brainpoolP384r1_n[] = {
- BYTES_TO_T_UINT_8( 0x65, 0x65, 0x04, 0xE9, 0x02, 0x32, 0x88, 0x3B ),
- BYTES_TO_T_UINT_8( 0x10, 0xC3, 0x7F, 0x6B, 0xAF, 0xB6, 0x3A, 0xCF ),
- BYTES_TO_T_UINT_8( 0xA7, 0x25, 0x04, 0xAC, 0x6C, 0x6E, 0x16, 0x1F ),
- BYTES_TO_T_UINT_8( 0xB3, 0x56, 0x54, 0xED, 0x09, 0x71, 0x2F, 0x15 ),
- BYTES_TO_T_UINT_8( 0xDF, 0x41, 0xE6, 0x50, 0x7E, 0x6F, 0x5D, 0x0F ),
- BYTES_TO_T_UINT_8( 0x28, 0x6D, 0x38, 0xA3, 0x82, 0x1E, 0xB9, 0x8C ),
-};
-#endif /* MBEDTLS_ECP_DP_BP384R1_ENABLED */
-
-/*
- * Domain parameters for brainpoolP512r1 (RFC 5639 3.7)
- */
-#if defined(MBEDTLS_ECP_DP_BP512R1_ENABLED)
-static const mbedtls_mpi_uint brainpoolP512r1_p[] = {
- BYTES_TO_T_UINT_8( 0xF3, 0x48, 0x3A, 0x58, 0x56, 0x60, 0xAA, 0x28 ),
- BYTES_TO_T_UINT_8( 0x85, 0xC6, 0x82, 0x2D, 0x2F, 0xFF, 0x81, 0x28 ),
- BYTES_TO_T_UINT_8( 0xE6, 0x80, 0xA3, 0xE6, 0x2A, 0xA1, 0xCD, 0xAE ),
- BYTES_TO_T_UINT_8( 0x42, 0x68, 0xC6, 0x9B, 0x00, 0x9B, 0x4D, 0x7D ),
- BYTES_TO_T_UINT_8( 0x71, 0x08, 0x33, 0x70, 0xCA, 0x9C, 0x63, 0xD6 ),
- BYTES_TO_T_UINT_8( 0x0E, 0xD2, 0xC9, 0xB3, 0xB3, 0x8D, 0x30, 0xCB ),
- BYTES_TO_T_UINT_8( 0x07, 0xFC, 0xC9, 0x33, 0xAE, 0xE6, 0xD4, 0x3F ),
- BYTES_TO_T_UINT_8( 0x8B, 0xC4, 0xE9, 0xDB, 0xB8, 0x9D, 0xDD, 0xAA ),
-};
-static const mbedtls_mpi_uint brainpoolP512r1_a[] = {
- BYTES_TO_T_UINT_8( 0xCA, 0x94, 0xFC, 0x77, 0x4D, 0xAC, 0xC1, 0xE7 ),
- BYTES_TO_T_UINT_8( 0xB9, 0xC7, 0xF2, 0x2B, 0xA7, 0x17, 0x11, 0x7F ),
- BYTES_TO_T_UINT_8( 0xB5, 0xC8, 0x9A, 0x8B, 0xC9, 0xF1, 0x2E, 0x0A ),
- BYTES_TO_T_UINT_8( 0xA1, 0x3A, 0x25, 0xA8, 0x5A, 0x5D, 0xED, 0x2D ),
- BYTES_TO_T_UINT_8( 0xBC, 0x63, 0x98, 0xEA, 0xCA, 0x41, 0x34, 0xA8 ),
- BYTES_TO_T_UINT_8( 0x10, 0x16, 0xF9, 0x3D, 0x8D, 0xDD, 0xCB, 0x94 ),
- BYTES_TO_T_UINT_8( 0xC5, 0x4C, 0x23, 0xAC, 0x45, 0x71, 0x32, 0xE2 ),
- BYTES_TO_T_UINT_8( 0x89, 0x3B, 0x60, 0x8B, 0x31, 0xA3, 0x30, 0x78 ),
-};
-static const mbedtls_mpi_uint brainpoolP512r1_b[] = {
- BYTES_TO_T_UINT_8( 0x23, 0xF7, 0x16, 0x80, 0x63, 0xBD, 0x09, 0x28 ),
- BYTES_TO_T_UINT_8( 0xDD, 0xE5, 0xBA, 0x5E, 0xB7, 0x50, 0x40, 0x98 ),
- BYTES_TO_T_UINT_8( 0x67, 0x3E, 0x08, 0xDC, 0xCA, 0x94, 0xFC, 0x77 ),
- BYTES_TO_T_UINT_8( 0x4D, 0xAC, 0xC1, 0xE7, 0xB9, 0xC7, 0xF2, 0x2B ),
- BYTES_TO_T_UINT_8( 0xA7, 0x17, 0x11, 0x7F, 0xB5, 0xC8, 0x9A, 0x8B ),
- BYTES_TO_T_UINT_8( 0xC9, 0xF1, 0x2E, 0x0A, 0xA1, 0x3A, 0x25, 0xA8 ),
- BYTES_TO_T_UINT_8( 0x5A, 0x5D, 0xED, 0x2D, 0xBC, 0x63, 0x98, 0xEA ),
- BYTES_TO_T_UINT_8( 0xCA, 0x41, 0x34, 0xA8, 0x10, 0x16, 0xF9, 0x3D ),
-};
-static const mbedtls_mpi_uint brainpoolP512r1_gx[] = {
- BYTES_TO_T_UINT_8( 0x22, 0xF8, 0xB9, 0xBC, 0x09, 0x22, 0x35, 0x8B ),
- BYTES_TO_T_UINT_8( 0x68, 0x5E, 0x6A, 0x40, 0x47, 0x50, 0x6D, 0x7C ),
- BYTES_TO_T_UINT_8( 0x5F, 0x7D, 0xB9, 0x93, 0x7B, 0x68, 0xD1, 0x50 ),
- BYTES_TO_T_UINT_8( 0x8D, 0xD4, 0xD0, 0xE2, 0x78, 0x1F, 0x3B, 0xFF ),
- BYTES_TO_T_UINT_8( 0x8E, 0x09, 0xD0, 0xF4, 0xEE, 0x62, 0x3B, 0xB4 ),
- BYTES_TO_T_UINT_8( 0xC1, 0x16, 0xD9, 0xB5, 0x70, 0x9F, 0xED, 0x85 ),
- BYTES_TO_T_UINT_8( 0x93, 0x6A, 0x4C, 0x9C, 0x2E, 0x32, 0x21, 0x5A ),
- BYTES_TO_T_UINT_8( 0x64, 0xD9, 0x2E, 0xD8, 0xBD, 0xE4, 0xAE, 0x81 ),
-};
-static const mbedtls_mpi_uint brainpoolP512r1_gy[] = {
- BYTES_TO_T_UINT_8( 0x92, 0x08, 0xD8, 0x3A, 0x0F, 0x1E, 0xCD, 0x78 ),
- BYTES_TO_T_UINT_8( 0x06, 0x54, 0xF0, 0xA8, 0x2F, 0x2B, 0xCA, 0xD1 ),
- BYTES_TO_T_UINT_8( 0xAE, 0x63, 0x27, 0x8A, 0xD8, 0x4B, 0xCA, 0x5B ),
- BYTES_TO_T_UINT_8( 0x5E, 0x48, 0x5F, 0x4A, 0x49, 0xDE, 0xDC, 0xB2 ),
- BYTES_TO_T_UINT_8( 0x11, 0x81, 0x1F, 0x88, 0x5B, 0xC5, 0x00, 0xA0 ),
- BYTES_TO_T_UINT_8( 0x1A, 0x7B, 0xA5, 0x24, 0x00, 0xF7, 0x09, 0xF2 ),
- BYTES_TO_T_UINT_8( 0xFD, 0x22, 0x78, 0xCF, 0xA9, 0xBF, 0xEA, 0xC0 ),
- BYTES_TO_T_UINT_8( 0xEC, 0x32, 0x63, 0x56, 0x5D, 0x38, 0xDE, 0x7D ),
-};
-static const mbedtls_mpi_uint brainpoolP512r1_n[] = {
- BYTES_TO_T_UINT_8( 0x69, 0x00, 0xA9, 0x9C, 0x82, 0x96, 0x87, 0xB5 ),
- BYTES_TO_T_UINT_8( 0xDD, 0xDA, 0x5D, 0x08, 0x81, 0xD3, 0xB1, 0x1D ),
- BYTES_TO_T_UINT_8( 0x47, 0x10, 0xAC, 0x7F, 0x19, 0x61, 0x86, 0x41 ),
- BYTES_TO_T_UINT_8( 0x19, 0x26, 0xA9, 0x4C, 0x41, 0x5C, 0x3E, 0x55 ),
- BYTES_TO_T_UINT_8( 0x70, 0x08, 0x33, 0x70, 0xCA, 0x9C, 0x63, 0xD6 ),
- BYTES_TO_T_UINT_8( 0x0E, 0xD2, 0xC9, 0xB3, 0xB3, 0x8D, 0x30, 0xCB ),
- BYTES_TO_T_UINT_8( 0x07, 0xFC, 0xC9, 0x33, 0xAE, 0xE6, 0xD4, 0x3F ),
- BYTES_TO_T_UINT_8( 0x8B, 0xC4, 0xE9, 0xDB, 0xB8, 0x9D, 0xDD, 0xAA ),
-};
-#endif /* MBEDTLS_ECP_DP_BP512R1_ENABLED */
-
-/*
- * Create an MPI from embedded constants
- * (assumes len is an exact multiple of sizeof mbedtls_mpi_uint)
- */
-static inline void ecp_mpi_load( mbedtls_mpi *X, const mbedtls_mpi_uint *p, size_t len )
-{
- X->s = 1;
- X->n = len / sizeof( mbedtls_mpi_uint );
- X->p = (mbedtls_mpi_uint *) p;
-}
-
-/*
- * Set an MPI to static value 1
- */
-static inline void ecp_mpi_set1( mbedtls_mpi *X )
-{
- static mbedtls_mpi_uint one[] = { 1 };
- X->s = 1;
- X->n = 1;
- X->p = one;
-}
-
-/*
- * Make group available from embedded constants
- */
-static int ecp_group_load( mbedtls_ecp_group *grp,
- const mbedtls_mpi_uint *p, size_t plen,
- const mbedtls_mpi_uint *a, size_t alen,
- const mbedtls_mpi_uint *b, size_t blen,
- const mbedtls_mpi_uint *gx, size_t gxlen,
- const mbedtls_mpi_uint *gy, size_t gylen,
- const mbedtls_mpi_uint *n, size_t nlen)
-{
- ecp_mpi_load( &grp->P, p, plen );
- if( a != NULL )
- ecp_mpi_load( &grp->A, a, alen );
- ecp_mpi_load( &grp->B, b, blen );
- ecp_mpi_load( &grp->N, n, nlen );
-
- ecp_mpi_load( &grp->G.X, gx, gxlen );
- ecp_mpi_load( &grp->G.Y, gy, gylen );
- ecp_mpi_set1( &grp->G.Z );
-
- grp->pbits = mbedtls_mpi_bitlen( &grp->P );
- grp->nbits = mbedtls_mpi_bitlen( &grp->N );
-
- grp->h = 1;
-
- return( 0 );
-}
-
-#if defined(MBEDTLS_ECP_NIST_OPTIM)
-/* Forward declarations */
-#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
-static int ecp_mod_p192( mbedtls_mpi * );
-#endif
-#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED)
-static int ecp_mod_p224( mbedtls_mpi * );
-#endif
-#if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED)
-static int ecp_mod_p256( mbedtls_mpi * );
-#endif
-#if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
-static int ecp_mod_p384( mbedtls_mpi * );
-#endif
-#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
-static int ecp_mod_p521( mbedtls_mpi * );
-#endif
-
-#define NIST_MODP( P ) grp->modp = ecp_mod_ ## P;
-#else
-#define NIST_MODP( P )
-#endif /* MBEDTLS_ECP_NIST_OPTIM */
-
-/* Additional forward declarations */
-#if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED)
-static int ecp_mod_p255( mbedtls_mpi * );
-#endif
-#if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED)
-static int ecp_mod_p192k1( mbedtls_mpi * );
-#endif
-#if defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED)
-static int ecp_mod_p224k1( mbedtls_mpi * );
-#endif
-#if defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
-static int ecp_mod_p256k1( mbedtls_mpi * );
-#endif
-
-#define LOAD_GROUP_A( G ) ecp_group_load( grp, \
- G ## _p, sizeof( G ## _p ), \
- G ## _a, sizeof( G ## _a ), \
- G ## _b, sizeof( G ## _b ), \
- G ## _gx, sizeof( G ## _gx ), \
- G ## _gy, sizeof( G ## _gy ), \
- G ## _n, sizeof( G ## _n ) )
-
-#define LOAD_GROUP( G ) ecp_group_load( grp, \
- G ## _p, sizeof( G ## _p ), \
- NULL, 0, \
- G ## _b, sizeof( G ## _b ), \
- G ## _gx, sizeof( G ## _gx ), \
- G ## _gy, sizeof( G ## _gy ), \
- G ## _n, sizeof( G ## _n ) )
-
-#if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED)
-/*
- * Specialized function for creating the Curve25519 group
- */
-static int ecp_use_curve25519( mbedtls_ecp_group *grp )
-{
- int ret;
-
- /* Actually ( A + 2 ) / 4 */
- MBEDTLS_MPI_CHK( mbedtls_mpi_read_string( &grp->A, 16, "01DB42" ) );
-
- /* P = 2^255 - 19 */
- MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &grp->P, 1 ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &grp->P, 255 ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_sub_int( &grp->P, &grp->P, 19 ) );
- grp->pbits = mbedtls_mpi_bitlen( &grp->P );
-
- /* Y intentionaly not set, since we use x/z coordinates.
- * This is used as a marker to identify Montgomery curves! */
- MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &grp->G.X, 9 ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &grp->G.Z, 1 ) );
- mbedtls_mpi_free( &grp->G.Y );
-
- /* Actually, the required msb for private keys */
- grp->nbits = 254;
-
-cleanup:
- if( ret != 0 )
- mbedtls_ecp_group_free( grp );
-
- return( ret );
-}
-#endif /* MBEDTLS_ECP_DP_CURVE25519_ENABLED */
-
-/*
- * Set a group using well-known domain parameters
- */
-int mbedtls_ecp_group_load( mbedtls_ecp_group *grp, mbedtls_ecp_group_id id )
-{
- mbedtls_ecp_group_free( grp );
-
- grp->id = id;
-
- switch( id )
- {
-#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
- case MBEDTLS_ECP_DP_SECP192R1:
- NIST_MODP( p192 );
- return( LOAD_GROUP( secp192r1 ) );
-#endif /* MBEDTLS_ECP_DP_SECP192R1_ENABLED */
-
-#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED)
- case MBEDTLS_ECP_DP_SECP224R1:
- NIST_MODP( p224 );
- return( LOAD_GROUP( secp224r1 ) );
-#endif /* MBEDTLS_ECP_DP_SECP224R1_ENABLED */
-
-#if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED)
- case MBEDTLS_ECP_DP_SECP256R1:
- NIST_MODP( p256 );
- return( LOAD_GROUP( secp256r1 ) );
-#endif /* MBEDTLS_ECP_DP_SECP256R1_ENABLED */
-
-#if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
- case MBEDTLS_ECP_DP_SECP384R1:
- NIST_MODP( p384 );
- return( LOAD_GROUP( secp384r1 ) );
-#endif /* MBEDTLS_ECP_DP_SECP384R1_ENABLED */
-
-#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
- case MBEDTLS_ECP_DP_SECP521R1:
- NIST_MODP( p521 );
- return( LOAD_GROUP( secp521r1 ) );
-#endif /* MBEDTLS_ECP_DP_SECP521R1_ENABLED */
-
-#if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED)
- case MBEDTLS_ECP_DP_SECP192K1:
- grp->modp = ecp_mod_p192k1;
- return( LOAD_GROUP_A( secp192k1 ) );
-#endif /* MBEDTLS_ECP_DP_SECP192K1_ENABLED */
-
-#if defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED)
- case MBEDTLS_ECP_DP_SECP224K1:
- grp->modp = ecp_mod_p224k1;
- return( LOAD_GROUP_A( secp224k1 ) );
-#endif /* MBEDTLS_ECP_DP_SECP224K1_ENABLED */
-
-#if defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
- case MBEDTLS_ECP_DP_SECP256K1:
- grp->modp = ecp_mod_p256k1;
- return( LOAD_GROUP_A( secp256k1 ) );
-#endif /* MBEDTLS_ECP_DP_SECP256K1_ENABLED */
-
-#if defined(MBEDTLS_ECP_DP_BP256R1_ENABLED)
- case MBEDTLS_ECP_DP_BP256R1:
- return( LOAD_GROUP_A( brainpoolP256r1 ) );
-#endif /* MBEDTLS_ECP_DP_BP256R1_ENABLED */
-
-#if defined(MBEDTLS_ECP_DP_BP384R1_ENABLED)
- case MBEDTLS_ECP_DP_BP384R1:
- return( LOAD_GROUP_A( brainpoolP384r1 ) );
-#endif /* MBEDTLS_ECP_DP_BP384R1_ENABLED */
-
-#if defined(MBEDTLS_ECP_DP_BP512R1_ENABLED)
- case MBEDTLS_ECP_DP_BP512R1:
- return( LOAD_GROUP_A( brainpoolP512r1 ) );
-#endif /* MBEDTLS_ECP_DP_BP512R1_ENABLED */
-
-#if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED)
- case MBEDTLS_ECP_DP_CURVE25519:
- grp->modp = ecp_mod_p255;
- return( ecp_use_curve25519( grp ) );
-#endif /* MBEDTLS_ECP_DP_CURVE25519_ENABLED */
-
- default:
- mbedtls_ecp_group_free( grp );
- return( MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE );
- }
-}
-
-#if defined(MBEDTLS_ECP_NIST_OPTIM)
-/*
- * Fast reduction modulo the primes used by the NIST curves.
- *
- * These functions are critical for speed, but not needed for correct
- * operations. So, we make the choice to heavily rely on the internals of our
- * bignum library, which creates a tight coupling between these functions and
- * our MPI implementation. However, the coupling between the ECP module and
- * MPI remains loose, since these functions can be deactivated at will.
- */
-
-#if defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED)
-/*
- * Compared to the way things are presented in FIPS 186-3 D.2,
- * we proceed in columns, from right (least significant chunk) to left,
- * adding chunks to N in place, and keeping a carry for the next chunk.
- * This avoids moving things around in memory, and uselessly adding zeros,
- * compared to the more straightforward, line-oriented approach.
- *
- * For this prime we need to handle data in chunks of 64 bits.
- * Since this is always a multiple of our basic mbedtls_mpi_uint, we can
- * use a mbedtls_mpi_uint * to designate such a chunk, and small loops to handle it.
- */
-
-/* Add 64-bit chunks (dst += src) and update carry */
-static inline void add64( mbedtls_mpi_uint *dst, mbedtls_mpi_uint *src, mbedtls_mpi_uint *carry )
-{
- unsigned char i;
- mbedtls_mpi_uint c = 0;
- for( i = 0; i < 8 / sizeof( mbedtls_mpi_uint ); i++, dst++, src++ )
- {
- *dst += c; c = ( *dst < c );
- *dst += *src; c += ( *dst < *src );
- }
- *carry += c;
-}
-
-/* Add carry to a 64-bit chunk and update carry */
-static inline void carry64( mbedtls_mpi_uint *dst, mbedtls_mpi_uint *carry )
-{
- unsigned char i;
- for( i = 0; i < 8 / sizeof( mbedtls_mpi_uint ); i++, dst++ )
- {
- *dst += *carry;
- *carry = ( *dst < *carry );
- }
-}
-
-#define WIDTH 8 / sizeof( mbedtls_mpi_uint )
-#define A( i ) N->p + i * WIDTH
-#define ADD( i ) add64( p, A( i ), &c )
-#define NEXT p += WIDTH; carry64( p, &c )
-#define LAST p += WIDTH; *p = c; while( ++p < end ) *p = 0
-
-/*
- * Fast quasi-reduction modulo p192 (FIPS 186-3 D.2.1)
- */
-static int ecp_mod_p192( mbedtls_mpi *N )
-{
- int ret;
- mbedtls_mpi_uint c = 0;
- mbedtls_mpi_uint *p, *end;
-
- /* Make sure we have enough blocks so that A(5) is legal */
- MBEDTLS_MPI_CHK( mbedtls_mpi_grow( N, 6 * WIDTH ) );
-
- p = N->p;
- end = p + N->n;
-
- ADD( 3 ); ADD( 5 ); NEXT; // A0 += A3 + A5
- ADD( 3 ); ADD( 4 ); ADD( 5 ); NEXT; // A1 += A3 + A4 + A5
- ADD( 4 ); ADD( 5 ); LAST; // A2 += A4 + A5
-
-cleanup:
- return( ret );
-}
-
-#undef WIDTH
-#undef A
-#undef ADD
-#undef NEXT
-#undef LAST
-#endif /* MBEDTLS_ECP_DP_SECP192R1_ENABLED */
-
-#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) || \
- defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) || \
- defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
-/*
- * The reader is advised to first understand ecp_mod_p192() since the same
- * general structure is used here, but with additional complications:
- * (1) chunks of 32 bits, and (2) subtractions.
- */
-
-/*
- * For these primes, we need to handle data in chunks of 32 bits.
- * This makes it more complicated if we use 64 bits limbs in MPI,
- * which prevents us from using a uniform access method as for p192.
- *
- * So, we define a mini abstraction layer to access 32 bit chunks,
- * load them in 'cur' for work, and store them back from 'cur' when done.
- *
- * While at it, also define the size of N in terms of 32-bit chunks.
- */
-#define LOAD32 cur = A( i );
-
-#if defined(MBEDTLS_HAVE_INT32) /* 32 bit */
-
-#define MAX32 N->n
-#define A( j ) N->p[j]
-#define STORE32 N->p[i] = cur;
-
-#else /* 64-bit */
-
-#define MAX32 N->n * 2
-#define A( j ) j % 2 ? (uint32_t)( N->p[j/2] >> 32 ) : (uint32_t)( N->p[j/2] )
-#define STORE32 \
- if( i % 2 ) { \
- N->p[i/2] &= 0x00000000FFFFFFFF; \
- N->p[i/2] |= ((mbedtls_mpi_uint) cur) << 32; \
- } else { \
- N->p[i/2] &= 0xFFFFFFFF00000000; \
- N->p[i/2] |= (mbedtls_mpi_uint) cur; \
- }
-
-#endif /* sizeof( mbedtls_mpi_uint ) */
-
-/*
- * Helpers for addition and subtraction of chunks, with signed carry.
- */
-static inline void add32( uint32_t *dst, uint32_t src, signed char *carry )
-{
- *dst += src;
- *carry += ( *dst < src );
-}
-
-static inline void sub32( uint32_t *dst, uint32_t src, signed char *carry )
-{
- *carry -= ( *dst < src );
- *dst -= src;
-}
-
-#define ADD( j ) add32( &cur, A( j ), &c );
-#define SUB( j ) sub32( &cur, A( j ), &c );
-
-/*
- * Helpers for the main 'loop'
- * (see fix_negative for the motivation of C)
- */
-#define INIT( b ) \
- int ret; \
- signed char c = 0, cc; \
- uint32_t cur; \
- size_t i = 0, bits = b; \
- mbedtls_mpi C; \
- mbedtls_mpi_uint Cp[ b / 8 / sizeof( mbedtls_mpi_uint) + 1 ]; \
- \
- C.s = 1; \
- C.n = b / 8 / sizeof( mbedtls_mpi_uint) + 1; \
- C.p = Cp; \
- memset( Cp, 0, C.n * sizeof( mbedtls_mpi_uint ) ); \
- \
- MBEDTLS_MPI_CHK( mbedtls_mpi_grow( N, b * 2 / 8 / sizeof( mbedtls_mpi_uint ) ) ); \
- LOAD32;
-
-#define NEXT \
- STORE32; i++; LOAD32; \
- cc = c; c = 0; \
- if( cc < 0 ) \
- sub32( &cur, -cc, &c ); \
- else \
- add32( &cur, cc, &c ); \
-
-#define LAST \
- STORE32; i++; \
- cur = c > 0 ? c : 0; STORE32; \
- cur = 0; while( ++i < MAX32 ) { STORE32; } \
- if( c < 0 ) fix_negative( N, c, &C, bits );
-
-/*
- * If the result is negative, we get it in the form
- * c * 2^(bits + 32) + N, with c negative and N positive shorter than 'bits'
- */
-static inline int fix_negative( mbedtls_mpi *N, signed char c, mbedtls_mpi *C, size_t bits )
-{
- int ret;
-
- /* C = - c * 2^(bits + 32) */
-#if !defined(MBEDTLS_HAVE_INT64)
- ((void) bits);
-#else
- if( bits == 224 )
- C->p[ C->n - 1 ] = ((mbedtls_mpi_uint) -c) << 32;
- else
-#endif
- C->p[ C->n - 1 ] = (mbedtls_mpi_uint) -c;
-
- /* N = - ( C - N ) */
- MBEDTLS_MPI_CHK( mbedtls_mpi_sub_abs( N, C, N ) );
- N->s = -1;
-
-cleanup:
-
- return( ret );
-}
-
-#if defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED)
-/*
- * Fast quasi-reduction modulo p224 (FIPS 186-3 D.2.2)
- */
-static int ecp_mod_p224( mbedtls_mpi *N )
-{
- INIT( 224 );
-
- SUB( 7 ); SUB( 11 ); NEXT; // A0 += -A7 - A11
- SUB( 8 ); SUB( 12 ); NEXT; // A1 += -A8 - A12
- SUB( 9 ); SUB( 13 ); NEXT; // A2 += -A9 - A13
- SUB( 10 ); ADD( 7 ); ADD( 11 ); NEXT; // A3 += -A10 + A7 + A11
- SUB( 11 ); ADD( 8 ); ADD( 12 ); NEXT; // A4 += -A11 + A8 + A12
- SUB( 12 ); ADD( 9 ); ADD( 13 ); NEXT; // A5 += -A12 + A9 + A13
- SUB( 13 ); ADD( 10 ); LAST; // A6 += -A13 + A10
-
-cleanup:
- return( ret );
-}
-#endif /* MBEDTLS_ECP_DP_SECP224R1_ENABLED */
-
-#if defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED)
-/*
- * Fast quasi-reduction modulo p256 (FIPS 186-3 D.2.3)
- */
-static int ecp_mod_p256( mbedtls_mpi *N )
-{
- INIT( 256 );
-
- ADD( 8 ); ADD( 9 );
- SUB( 11 ); SUB( 12 ); SUB( 13 ); SUB( 14 ); NEXT; // A0
-
- ADD( 9 ); ADD( 10 );
- SUB( 12 ); SUB( 13 ); SUB( 14 ); SUB( 15 ); NEXT; // A1
-
- ADD( 10 ); ADD( 11 );
- SUB( 13 ); SUB( 14 ); SUB( 15 ); NEXT; // A2
-
- ADD( 11 ); ADD( 11 ); ADD( 12 ); ADD( 12 ); ADD( 13 );
- SUB( 15 ); SUB( 8 ); SUB( 9 ); NEXT; // A3
-
- ADD( 12 ); ADD( 12 ); ADD( 13 ); ADD( 13 ); ADD( 14 );
- SUB( 9 ); SUB( 10 ); NEXT; // A4
-
- ADD( 13 ); ADD( 13 ); ADD( 14 ); ADD( 14 ); ADD( 15 );
- SUB( 10 ); SUB( 11 ); NEXT; // A5
-
- ADD( 14 ); ADD( 14 ); ADD( 15 ); ADD( 15 ); ADD( 14 ); ADD( 13 );
- SUB( 8 ); SUB( 9 ); NEXT; // A6
-
- ADD( 15 ); ADD( 15 ); ADD( 15 ); ADD( 8 );
- SUB( 10 ); SUB( 11 ); SUB( 12 ); SUB( 13 ); LAST; // A7
-
-cleanup:
- return( ret );
-}
-#endif /* MBEDTLS_ECP_DP_SECP256R1_ENABLED */
-
-#if defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED)
-/*
- * Fast quasi-reduction modulo p384 (FIPS 186-3 D.2.4)
- */
-static int ecp_mod_p384( mbedtls_mpi *N )
-{
- INIT( 384 );
-
- ADD( 12 ); ADD( 21 ); ADD( 20 );
- SUB( 23 ); NEXT; // A0
-
- ADD( 13 ); ADD( 22 ); ADD( 23 );
- SUB( 12 ); SUB( 20 ); NEXT; // A2
-
- ADD( 14 ); ADD( 23 );
- SUB( 13 ); SUB( 21 ); NEXT; // A2
-
- ADD( 15 ); ADD( 12 ); ADD( 20 ); ADD( 21 );
- SUB( 14 ); SUB( 22 ); SUB( 23 ); NEXT; // A3
-
- ADD( 21 ); ADD( 21 ); ADD( 16 ); ADD( 13 ); ADD( 12 ); ADD( 20 ); ADD( 22 );
- SUB( 15 ); SUB( 23 ); SUB( 23 ); NEXT; // A4
-
- ADD( 22 ); ADD( 22 ); ADD( 17 ); ADD( 14 ); ADD( 13 ); ADD( 21 ); ADD( 23 );
- SUB( 16 ); NEXT; // A5
-
- ADD( 23 ); ADD( 23 ); ADD( 18 ); ADD( 15 ); ADD( 14 ); ADD( 22 );
- SUB( 17 ); NEXT; // A6
-
- ADD( 19 ); ADD( 16 ); ADD( 15 ); ADD( 23 );
- SUB( 18 ); NEXT; // A7
-
- ADD( 20 ); ADD( 17 ); ADD( 16 );
- SUB( 19 ); NEXT; // A8
-
- ADD( 21 ); ADD( 18 ); ADD( 17 );
- SUB( 20 ); NEXT; // A9
-
- ADD( 22 ); ADD( 19 ); ADD( 18 );
- SUB( 21 ); NEXT; // A10
-
- ADD( 23 ); ADD( 20 ); ADD( 19 );
- SUB( 22 ); LAST; // A11
-
-cleanup:
- return( ret );
-}
-#endif /* MBEDTLS_ECP_DP_SECP384R1_ENABLED */
-
-#undef A
-#undef LOAD32
-#undef STORE32
-#undef MAX32
-#undef INIT
-#undef NEXT
-#undef LAST
-
-#endif /* MBEDTLS_ECP_DP_SECP224R1_ENABLED ||
- MBEDTLS_ECP_DP_SECP256R1_ENABLED ||
- MBEDTLS_ECP_DP_SECP384R1_ENABLED */
-
-#if defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED)
-/*
- * Here we have an actual Mersenne prime, so things are more straightforward.
- * However, chunks are aligned on a 'weird' boundary (521 bits).
- */
-
-/* Size of p521 in terms of mbedtls_mpi_uint */
-#define P521_WIDTH ( 521 / 8 / sizeof( mbedtls_mpi_uint ) + 1 )
-
-/* Bits to keep in the most significant mbedtls_mpi_uint */
-#define P521_MASK 0x01FF
-
-/*
- * Fast quasi-reduction modulo p521 (FIPS 186-3 D.2.5)
- * Write N as A1 + 2^521 A0, return A0 + A1
- */
-static int ecp_mod_p521( mbedtls_mpi *N )
-{
- int ret;
- size_t i;
- mbedtls_mpi M;
- mbedtls_mpi_uint Mp[P521_WIDTH + 1];
- /* Worst case for the size of M is when mbedtls_mpi_uint is 16 bits:
- * we need to hold bits 513 to 1056, which is 34 limbs, that is
- * P521_WIDTH + 1. Otherwise P521_WIDTH is enough. */
-
- if( N->n < P521_WIDTH )
- return( 0 );
-
- /* M = A1 */
- M.s = 1;
- M.n = N->n - ( P521_WIDTH - 1 );
- if( M.n > P521_WIDTH + 1 )
- M.n = P521_WIDTH + 1;
- M.p = Mp;
- memcpy( Mp, N->p + P521_WIDTH - 1, M.n * sizeof( mbedtls_mpi_uint ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &M, 521 % ( 8 * sizeof( mbedtls_mpi_uint ) ) ) );
-
- /* N = A0 */
- N->p[P521_WIDTH - 1] &= P521_MASK;
- for( i = P521_WIDTH; i < N->n; i++ )
- N->p[i] = 0;
-
- /* N = A0 + A1 */
- MBEDTLS_MPI_CHK( mbedtls_mpi_add_abs( N, N, &M ) );
-
-cleanup:
- return( ret );
-}
-
-#undef P521_WIDTH
-#undef P521_MASK
-#endif /* MBEDTLS_ECP_DP_SECP521R1_ENABLED */
-
-#endif /* MBEDTLS_ECP_NIST_OPTIM */
-
-#if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED)
-
-/* Size of p255 in terms of mbedtls_mpi_uint */
-#define P255_WIDTH ( 255 / 8 / sizeof( mbedtls_mpi_uint ) + 1 )
-
-/*
- * Fast quasi-reduction modulo p255 = 2^255 - 19
- * Write N as A0 + 2^255 A1, return A0 + 19 * A1
- */
-static int ecp_mod_p255( mbedtls_mpi *N )
-{
- int ret;
- size_t i;
- mbedtls_mpi M;
- mbedtls_mpi_uint Mp[P255_WIDTH + 2];
-
- if( N->n < P255_WIDTH )
- return( 0 );
-
- /* M = A1 */
- M.s = 1;
- M.n = N->n - ( P255_WIDTH - 1 );
- if( M.n > P255_WIDTH + 1 )
- M.n = P255_WIDTH + 1;
- M.p = Mp;
- memset( Mp, 0, sizeof Mp );
- memcpy( Mp, N->p + P255_WIDTH - 1, M.n * sizeof( mbedtls_mpi_uint ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &M, 255 % ( 8 * sizeof( mbedtls_mpi_uint ) ) ) );
- M.n++; /* Make room for multiplication by 19 */
-
- /* N = A0 */
- MBEDTLS_MPI_CHK( mbedtls_mpi_set_bit( N, 255, 0 ) );
- for( i = P255_WIDTH; i < N->n; i++ )
- N->p[i] = 0;
-
- /* N = A0 + 19 * A1 */
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_int( &M, &M, 19 ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_add_abs( N, N, &M ) );
-
-cleanup:
- return( ret );
-}
-#endif /* MBEDTLS_ECP_DP_CURVE25519_ENABLED */
-
-#if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) || \
- defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) || \
- defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
-/*
- * Fast quasi-reduction modulo P = 2^s - R,
- * with R about 33 bits, used by the Koblitz curves.
- *
- * Write N as A0 + 2^224 A1, return A0 + R * A1.
- * Actually do two passes, since R is big.
- */
-#define P_KOBLITZ_MAX ( 256 / 8 / sizeof( mbedtls_mpi_uint ) ) // Max limbs in P
-#define P_KOBLITZ_R ( 8 / sizeof( mbedtls_mpi_uint ) ) // Limbs in R
-static inline int ecp_mod_koblitz( mbedtls_mpi *N, mbedtls_mpi_uint *Rp, size_t p_limbs,
- size_t adjust, size_t shift, mbedtls_mpi_uint mask )
-{
- int ret;
- size_t i;
- mbedtls_mpi M, R;
- mbedtls_mpi_uint Mp[P_KOBLITZ_MAX + P_KOBLITZ_R + 1];
-
- if( N->n < p_limbs )
- return( 0 );
-
- /* Init R */
- R.s = 1;
- R.p = Rp;
- R.n = P_KOBLITZ_R;
-
- /* Common setup for M */
- M.s = 1;
- M.p = Mp;
-
- /* M = A1 */
- M.n = N->n - ( p_limbs - adjust );
- if( M.n > p_limbs + adjust )
- M.n = p_limbs + adjust;
- memset( Mp, 0, sizeof Mp );
- memcpy( Mp, N->p + p_limbs - adjust, M.n * sizeof( mbedtls_mpi_uint ) );
- if( shift != 0 )
- MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &M, shift ) );
- M.n += R.n; /* Make room for multiplication by R */
-
- /* N = A0 */
- if( mask != 0 )
- N->p[p_limbs - 1] &= mask;
- for( i = p_limbs; i < N->n; i++ )
- N->p[i] = 0;
-
- /* N = A0 + R * A1 */
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &M, &M, &R ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_add_abs( N, N, &M ) );
-
- /* Second pass */
-
- /* M = A1 */
- M.n = N->n - ( p_limbs - adjust );
- if( M.n > p_limbs + adjust )
- M.n = p_limbs + adjust;
- memset( Mp, 0, sizeof Mp );
- memcpy( Mp, N->p + p_limbs - adjust, M.n * sizeof( mbedtls_mpi_uint ) );
- if( shift != 0 )
- MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &M, shift ) );
- M.n += R.n; /* Make room for multiplication by R */
-
- /* N = A0 */
- if( mask != 0 )
- N->p[p_limbs - 1] &= mask;
- for( i = p_limbs; i < N->n; i++ )
- N->p[i] = 0;
-
- /* N = A0 + R * A1 */
- MBEDTLS_MPI_CHK( mbedtls_mpi_mul_mpi( &M, &M, &R ) );
- MBEDTLS_MPI_CHK( mbedtls_mpi_add_abs( N, N, &M ) );
-
-cleanup:
- return( ret );
-}
-#endif /* MBEDTLS_ECP_DP_SECP192K1_ENABLED) ||
- MBEDTLS_ECP_DP_SECP224K1_ENABLED) ||
- MBEDTLS_ECP_DP_SECP256K1_ENABLED) */
-
-#if defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED)
-/*
- * Fast quasi-reduction modulo p192k1 = 2^192 - R,
- * with R = 2^32 + 2^12 + 2^8 + 2^7 + 2^6 + 2^3 + 1 = 0x0100001119
- */
-static int ecp_mod_p192k1( mbedtls_mpi *N )
-{
- static mbedtls_mpi_uint Rp[] = {
- BYTES_TO_T_UINT_8( 0xC9, 0x11, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 ) };
-
- return( ecp_mod_koblitz( N, Rp, 192 / 8 / sizeof( mbedtls_mpi_uint ), 0, 0, 0 ) );
-}
-#endif /* MBEDTLS_ECP_DP_SECP192K1_ENABLED */
-
-#if defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED)
-/*
- * Fast quasi-reduction modulo p224k1 = 2^224 - R,
- * with R = 2^32 + 2^12 + 2^11 + 2^9 + 2^7 + 2^4 + 2 + 1 = 0x0100001A93
- */
-static int ecp_mod_p224k1( mbedtls_mpi *N )
-{
- static mbedtls_mpi_uint Rp[] = {
- BYTES_TO_T_UINT_8( 0x93, 0x1A, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 ) };
-
-#if defined(MBEDTLS_HAVE_INT64)
- return( ecp_mod_koblitz( N, Rp, 4, 1, 32, 0xFFFFFFFF ) );
-#else
- return( ecp_mod_koblitz( N, Rp, 224 / 8 / sizeof( mbedtls_mpi_uint ), 0, 0, 0 ) );
-#endif
-}
-
-#endif /* MBEDTLS_ECP_DP_SECP224K1_ENABLED */
-
-#if defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED)
-/*
- * Fast quasi-reduction modulo p256k1 = 2^256 - R,
- * with R = 2^32 + 2^9 + 2^8 + 2^7 + 2^6 + 2^4 + 1 = 0x01000003D1
- */
-static int ecp_mod_p256k1( mbedtls_mpi *N )
-{
- static mbedtls_mpi_uint Rp[] = {
- BYTES_TO_T_UINT_8( 0xD1, 0x03, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 ) };
- return( ecp_mod_koblitz( N, Rp, 256 / 8 / sizeof( mbedtls_mpi_uint ), 0, 0, 0 ) );
-}
-#endif /* MBEDTLS_ECP_DP_SECP256K1_ENABLED */
-
-#endif /* !MBEDTLS_ECP_ALT */
-
-#endif /* MBEDTLS_ECP_C */
diff --git a/third_party/NordicSemiconductor/libraries/crypto/nrf52840-mbedtls-config.h b/third_party/NordicSemiconductor/libraries/crypto/nrf52840-mbedtls-config.h
deleted file mode 100644
index 9f54372..0000000
--- a/third_party/NordicSemiconductor/libraries/crypto/nrf52840-mbedtls-config.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * Copyright (c) 2018, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef NRF52840_MBEDTLS_CONFIG_H_
-#define NRF52840_MBEDTLS_CONFIG_H_
-
-#include <openthread/config.h>
-
-#ifndef DISABLE_CC310
-#define MBEDTLS_AES_ALT
-#define MBEDTLS_ECP_ALT
-#define MBEDTLS_SHA256_ALT
-#endif // DISABLE_CC310
-
-#ifdef MBEDTLS_THREADING
-#define MBEDTLS_THREADING_C
-#define MBEDTLS_THREADING_ALT
-#endif // MBEDTLS_THREADING
-
-#if defined(__ICCARM__)
- _Pragma("diag_suppress=Pe550")
-#endif
-
-#if defined(__CC_ARM)
- _Pragma("diag_suppress=550")
- _Pragma("diag_suppress=68")
-#endif
-
-/**
- * @def NRF_MBEDTLS_AES_ALT_INTERRUPT_CONTEXT
- *
- * Define as 1 to enable AES usage in interrupt context and AES-256, by introducing a software AES under platform layer.
- *
- * @note This feature must be enabled to support AES-256 used by Commissioner and Joiner, and AES usage in interrupt context
- * used by Header IE related features.
- *
- */
-#if OPENTHREAD_CONFIG_COMMISSIONER_ENABLE || OPENTHREAD_CONFIG_JOINER_ENABLE || OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT
-#define NRF_MBEDTLS_AES_ALT_INTERRUPT_CONTEXT 1
-#else
-#define NRF_MBEDTLS_AES_ALT_INTERRUPT_CONTEXT 0
-#endif
-
-#endif // NRF52840_MBEDTLS_CONFIG_H_
diff --git a/third_party/NordicSemiconductor/libraries/crypto/sha256_alt.h b/third_party/NordicSemiconductor/libraries/crypto/sha256_alt.h
deleted file mode 100644
index 9f439b6..0000000
--- a/third_party/NordicSemiconductor/libraries/crypto/sha256_alt.h
+++ /dev/null
@@ -1,149 +0,0 @@
-/*
- * Copyright (c) 2017, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef MBEDTLS_SHA256_ALT_H
-#define MBEDTLS_SHA256_ALT_H
-
-#if !defined(MBEDTLS_CONFIG_FILE)
-#include "config.h"
-#else
-#include MBEDTLS_CONFIG_FILE
-#endif
-
-#include <stddef.h>
-#include <stdint.h>
-
-#ifdef MBEDTLS_SHA256_ALT
-
-#include "crys_hash.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#if defined(__CC_ARM)
-#pragma anon_unions
-#endif
-
-/**
- * @brief SHA-256 context structure
- */
-typedef union mbedtls_sha256_context
-{
- struct
- {
- CRYS_HASHUserContext_t user_context; ///< User context for CC310 SHA256
- CRYS_HASH_OperationMode_t mode; ///< CC310 hash operation mode
- } hardware;
- struct
- {
- uint32_t total[2]; ///< number of bytes processed
- uint32_t state[8]; ///< intermediate digest state
- unsigned char buffer[64]; ///< data block being processed
- int is224; ///< 0 => SHA-256, else SHA-224
- } software;
-}
-mbedtls_sha256_context;
-
-#if defined(__CC_ARM)
-#pragma no_anon_unions
-#endif
-
-/**
- * @brief Initialize SHA-256 context
- *
- * @param [in,out] ctx SHA-256 context to be initialized
- */
-void mbedtls_sha256_init(mbedtls_sha256_context *ctx);
-
-/**
- * @brief Clear SHA-256 context
- *
- * @param [in,out] ctx SHA-256 context to be cleared
- */
-void mbedtls_sha256_free(mbedtls_sha256_context *ctx);
-
-/**
- * @brief Clone (the state of) a SHA-256 context
- *
- * @param [out] dst The destination context
- * @param [in] src The context to be cloned
- */
-void mbedtls_sha256_clone(mbedtls_sha256_context *dst,
- const mbedtls_sha256_context *src);
-
-/**
- * @brief SHA-256 context setup
- *
- * @param [in,out] ctx context to be initialized
- * @param [in] is224 0 = use SHA256, 1 = use SHA224
- */
-void mbedtls_sha256_starts(mbedtls_sha256_context *ctx, int is224);
-
-/**
- * @brief SHA-256 process buffer
- *
- * @param [in,out] ctx SHA-256 context
- * @param [in] input buffer holding the data
- * @param [in] ilen length of the input data
- */
-void mbedtls_sha256_update(mbedtls_sha256_context *ctx, const unsigned char *input, size_t ilen);
-
-/**
- * @brief SHA-256 final digest
- *
- * @param [in,out] ctx SHA-256 context
- * @param [out] output SHA-224/256 checksum result
- */
-void mbedtls_sha256_finish(mbedtls_sha256_context *ctx, unsigned char output[32]);
-
-/* Internal use */
-void mbedtls_sha256_process(mbedtls_sha256_context *ctx, const unsigned char data[64]);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* MBEDTLS_SHA256_ALT */
-
-#endif /* MBEDTLS_SHA256_ALT_H */
diff --git a/third_party/NordicSemiconductor/libraries/crypto/sha256_alt_cc310.c b/third_party/NordicSemiconductor/libraries/crypto/sha256_alt_cc310.c
deleted file mode 100644
index 93c68f8..0000000
--- a/third_party/NordicSemiconductor/libraries/crypto/sha256_alt_cc310.c
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * Copyright (c) 2018, The OpenThread Authors.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holder nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "mbedtls/sha256.h"
-
-#include <string.h>
-
-#ifdef MBEDTLS_SHA256_ALT
-
-#include "cc310_mbedtls.h"
-
-void mbedtls_sha256_init(mbedtls_sha256_context * ctx)
-{
- memset(ctx, 0, sizeof(*ctx));
-}
-
-void mbedtls_sha256_free(mbedtls_sha256_context * ctx)
-{
- CC310_OPERATION_NO_RESULT(CRYS_HASH_Free(&ctx->hardware.user_context));
-}
-
-void mbedtls_sha256_clone(mbedtls_sha256_context *dst, const mbedtls_sha256_context *src)
-{
- memcpy(dst, src, sizeof(*dst));
-}
-
-int mbedtls_sha256_starts_ret(mbedtls_sha256_context * ctx, int is224)
-{
- if (is224)
- {
- ctx->hardware.mode = CRYS_HASH_SHA224_mode;
- }
- else
- {
- ctx->hardware.mode = CRYS_HASH_SHA256_mode;
- }
-
- CC310_OPERATION_NO_RESULT(CRYS_HASH_Init(&ctx->hardware.user_context, ctx->hardware.mode));
-
- return 0;
-}
-
-int mbedtls_sha256_update_ret(mbedtls_sha256_context * ctx, const unsigned char * input, size_t ilen)
-{
- CC310_OPERATION_NO_RESULT(CRYS_HASH_Update(&ctx->hardware.user_context, (unsigned char *)input, ilen));
- return 0;
-}
-
-int mbedtls_sha256_finish_ret(mbedtls_sha256_context * ctx, unsigned char output[32])
-{
- CRYS_HASH_Result_t result;
-
- memset(result, 0, sizeof(result));
-
- CC310_OPERATION_NO_RESULT(CRYS_HASH_Finish(&ctx->hardware.user_context, result));
-
- uint8_t size = CRYS_HASH_SHA256_DIGEST_SIZE_IN_BYTES;
-
- if (ctx->hardware.mode == CRYS_HASH_SHA224_mode)
- {
- size = CRYS_HASH_SHA224_DIGEST_SIZE_IN_BYTES;
- }
-
- memcpy(output, result, size);
-
- return 0;
-}
-
-int mbedtls_internal_sha256_process(mbedtls_sha256_context *ctx, const unsigned char data[64])
-{
- return mbedtls_sha256_update_ret(ctx, data, 64);
-}
-
-#endif /* MBEDTLS_SHA256_ALT */
diff --git a/third_party/NordicSemiconductor/libraries/delay/nrf_delay.h b/third_party/NordicSemiconductor/libraries/delay/nrf_delay.h
index 89639f8..3719683 100644
--- a/third_party/NordicSemiconductor/libraries/delay/nrf_delay.h
+++ b/third_party/NordicSemiconductor/libraries/delay/nrf_delay.h
@@ -1,80 +1,80 @@
-/**
- * Copyright (c) 2011 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#ifndef _NRF_DELAY_H
-#define _NRF_DELAY_H
-
-#include <nrfx.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @brief Function for delaying execution for a number of microseconds.
- *
- * @param us_time Number of microseconds to wait.
- */
-#define nrf_delay_us(us_time) NRFX_DELAY_US(us_time)
-
-
-/**
- * @brief Function for delaying execution for a number of milliseconds.
- *
- * @param ms_time Number of milliseconds to wait.
- */
-
-__STATIC_INLINE void nrf_delay_ms(uint32_t ms_time)
-{
- if (ms_time == 0)
- {
- return;
- }
-
- do {
- nrf_delay_us(1000);
- } while (--ms_time);
-}
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
+/**
+ * Copyright (c) 2011 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef _NRF_DELAY_H
+#define _NRF_DELAY_H
+
+#include <nrfx.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Function for delaying execution for a number of microseconds.
+ *
+ * @param us_time Number of microseconds to wait.
+ */
+#define nrf_delay_us(us_time) NRFX_DELAY_US(us_time)
+
+
+/**
+ * @brief Function for delaying execution for a number of milliseconds.
+ *
+ * @param ms_time Number of milliseconds to wait.
+ */
+
+__STATIC_INLINE void nrf_delay_ms(uint32_t ms_time)
+{
+ if (ms_time == 0)
+ {
+ return;
+ }
+
+ do {
+ nrf_delay_us(1000);
+ } while (--ms_time);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ccsw_crys_rsa_shared_types.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ccsw_crys_rsa_shared_types.h
deleted file mode 100644
index 4b1e39f..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ccsw_crys_rsa_shared_types.h
+++ /dev/null
@@ -1,144 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef SW_CRYS_RSA_SHARED_TYPES_H
-#define SW_CRYS_RSA_SHARED_TYPES_H
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-
-/** @file
- * @brief This file contains the types for the CCSW RSA module.
- */
-
-/************************ Defines ******************************/
-
-/************************************************************************/
-/* the following definitions are only relevant for RSA code on SW */
-/************************************************************************/
-/* Define the maximal allowed width of the exponentiation sliding window
-in range 2...6. This define is actual for projects on soft platform.
-To minimize code size use the minimum value. To optimize performance
-choose the maximum value */
-
-/* The valid key size in bits */
-#define SW_CRYS_RSA_MIN_VALID_KEY_SIZE_VALUE_IN_BITS 512
-
-#ifndef CRYS_NO_RSA_MAX_KEY_SIZE_4096_BIT_SUPPORT
-#define SW_CRYS_RSA_MAX_VALID_KEY_SIZE_VALUE_IN_BITS 4096
-#define SW_CRYS_RSA_MAX_KEY_GENERATION_SIZE_BITS 4096
-#else
-#ifndef CRYS_NO_RSA_MAX_KEY_SIZE_3072_BIT_SUPPORT
-#define SW_CRYS_RSA_MAX_VALID_KEY_SIZE_VALUE_IN_BITS 3072
-#define SW_CRYS_RSA_MAX_KEY_GENERATION_SIZE_BITS 3072
-#else
-#define SW_CRYS_RSA_MAX_VALID_KEY_SIZE_VALUE_IN_BITS 2048
-#define SW_CRYS_RSA_MAX_KEY_GENERATION_SIZE_BITS 2048
-#endif
-#endif
-
-
-
-
-
-/* Define the size of the exponentiation temp buffer, used in LLF_PKI exponentiation and NON DEPENDED on
- width of the sliding window. The size defined in units equaled to maximal RSA modulus size */
-#define PKI_EXP_CONST_TEMP_BUFF_SIZE_IN_MODULUS_UNITS 7
-
-#define PKI_EXP_SLIDING_WINDOW_MAX_VALUE 2
-
- /* The maximum buffer size for the 'H' value */
-#define SW_CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS ((SW_CRYS_RSA_MAX_VALID_KEY_SIZE_VALUE_IN_BITS + 64UL ) / 32 )
-
-
-/* definition of PKI_KEY_GEN_TEMP_BUFF_SIZE_WORDS IS DEPENDED on width of the sliding window*/
-#if( PKI_EXP_SLIDING_WINDOW_MAX_VALUE > 2 )
-#define PKI_KEY_GEN_TEMP_BUFF_SIZE_WORDS \
- ((4 + (1<<(PKI_EXP_SLIDING_WINDOW_MAX_VALUE-2))) * SW_CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS)
-#else
-#define PKI_KEY_GEN_TEMP_BUFF_SIZE_WORDS \
- (16 * SW_CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS)
-#endif
-
-#ifndef PKI_EXP_WINDOW_TEMP_BUFFER_SIZE_IN_MODULUS_UNITS
-#define PKI_EXP_WINDOW_TEMP_BUFFER_SIZE_IN_MODULUS_UNITS (3 + (1 << (PKI_EXP_SLIDING_WINDOW_MAX_VALUE-1)))
-#endif
-
-
-/* Define the size of the temp buffer, used in LLF_PKI exponentiation and DEPENDED on
- width of the sliding window in words */
-#if (PKI_EXP_CONST_TEMP_BUFF_SIZE_IN_MODULUS_UNITS > PKI_EXP_WINDOW_TEMP_BUFFER_SIZE_IN_MODULUS_UNITS )
-#define PKI_EXP_TEMP_BUFFER_SIZE_IN_WORDS \
- (PKI_EXP_CONST_TEMP_BUFF_SIZE_IN_MODULUS_UNITS * SW_CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS + 2 )
-#else
-#define PKI_EXP_TEMP_BUFFER_SIZE_IN_WORDS \
- (PKI_EXP_WINDOW_TEMP_BUFFER_SIZE_IN_MODULUS_UNITS * SW_CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS + 2 )
-#endif
-
-/* the RSA data type */
-typedef struct SW_Shared_CRYS_RSAPrimeData_t {
- /* The aligned input and output data buffers */
- uint32_t DataIn[SW_CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS];
- uint32_t DataOut[SW_CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS];
-
- /* #include specific fields that are used by the low level */
- struct {
- union {
- struct { /* Temporary buffers used for the exponent calculation */
- uint32_t Tempbuff1[PKI_EXP_TEMP_BUFFER_SIZE_IN_WORDS];
- uint32_t Tempbuff2[SW_CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS * 2];
- /* Temporary buffer for self-test support */
- uint32_t TempBuffer[SW_CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS];
- }NonCrt;
-
- struct { /* Temporary buffers used for the exponent calculation */
- uint32_t Tempbuff1[PKI_EXP_TEMP_BUFFER_SIZE_IN_WORDS];
- uint32_t Tempbuff2[SW_CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS * 2];
- }Crt;
- }Data;
- }LLF;
-
-}SW_Shared_CRYS_RSAPrimeData_t;
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-#endif
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_aesccm.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_aesccm.h
deleted file mode 100644
index c6a3392..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_aesccm.h
+++ /dev/null
@@ -1,315 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-#ifndef CRYS_AESCCM_H
-#define CRYS_AESCCM_H
-
-#include "ssi_pal_types.h"
-#include "crys_error.h"
-
-#include "ssi_aes.h"
-
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*!
-@file
-@brief This file contains all of the enums and definitions that are used for the CRYS AESCCM APIs, as well as the APIs themselves.
-The API supports AES-CCM and AES-CCM* as defined in ieee-802.15.4.
-@defgroup crys_aesccm CryptoCell AES-CCM APIs
-@{
-@ingroup cryptocell_api
-
-
-@note
-Regarding the AES-CCM*, the API supports only AES-CCM* as defined in ieee-802.15.4-2011; With the instantiations as defined in B.3.2 and the nonce as defined in 7.3.2.
-in case of AES-CCM* the flow should be as follows:
-<ul><li>AES-CCM* integrated</li>
- <ul><li>CRYS_AESCCMStar_NonceGenerate</li>
- <li>CRYS_AESCCMStar</li></ul></ul>
-<ul><li>AES-CCM* non-integrated</li>
- <ul><li>CRYS_AESCCMStar_NonceGenerate</li>
- <li>CRYS_AESCCMStar_Init</li>
- <li>CRYS_AESCCM_BlockAdata</li>
- <li>CRYS_AESCCM_BlockTextData</li>
- <li>CRYS_AESCCM_Finish</li></ul></ul>
-*/
-
-/************************ Defines ******************************/
-
-/*! AES CCM context size in words.*/
-#define CRYS_AESCCM_USER_CTX_SIZE_IN_WORDS (152/4)
-
-/*! AES CCM maximal key size in words. */
-#define CRYS_AESCCM_KEY_SIZE_WORDS 8
-
-/* nonce and AESCCM-MAC sizes definitions */
-/*! AES CCM NONCE minimal size in bytes. */
-#define CRYS_AESCCM_NONCE_MIN_SIZE_BYTES 7
-/*! AES CCM NONCE maximal size in bytes. */
-#define CRYS_AESCCM_NONCE_MAX_SIZE_BYTES 13
-/*! AES CCM MAC minimal size in bytes..*/
-#define CRYS_AESCCM_MAC_MIN_SIZE_BYTES 4
-/*! AES CCM MAC maximal size in bytes. */
-#define CRYS_AESCCM_MAC_MAX_SIZE_BYTES 16
-
-/*! AES CCM star NONCE size in bytes. */
-#define CRYS_AESCCM_STAR_NONCE_SIZE_BYTES 13
-/*! AES CCM star source address size in bytes. */
-#define CRYS_AESCCM_STAR_SOURCE_ADDRESS_SIZE_BYTES 8
-
-/*! AES CCM mode - CCM. */
-#define CRYS_AESCCM_MODE_CCM 0
-/*! AES CCM mode - CCM STAR. */
-#define CRYS_AESCCM_MODE_STAR 1
-
-
-/************************ Typedefs ****************************/
-/*! AES CCM key sizes. */
-typedef enum {
- /*! Key size 128 bits. */
- CRYS_AES_Key128BitSize = 0,
- /*! Key size 192 bits. */
- CRYS_AES_Key192BitSize = 1,
- /*! Key size 256 bits. */
- CRYS_AES_Key256BitSize = 2,
- /*! Key size 512 bits. */
- CRYS_AES_Key512BitSize = 3,
- /*! Number of optional key sizes. */
- CRYS_AES_KeySizeNumOfOptions,
- /*! Reserved. */
- CRYS_AES_KeySizeLast = 0x7FFFFFFF,
-
-}CRYS_AESCCM_KeySize_t;
-
-/*! AES_CCM key buffer definition.*/
-typedef uint8_t CRYS_AESCCM_Key_t[CRYS_AESCCM_KEY_SIZE_WORDS * sizeof(uint32_t)];
-/*! AES_CCM MAC buffer definition.*/
-typedef uint8_t CRYS_AESCCM_Mac_Res_t[SASI_AES_BLOCK_SIZE_IN_BYTES];
-
-/*! AES_CCM_STAR source address buffer defintion. */
-typedef uint8_t CRYS_AESCCMStar_SourceAddress_t[CRYS_AESCCM_STAR_SOURCE_ADDRESS_SIZE_BYTES];
-/*! AES_CCM_STAR Nonce buffer defintion. */
-typedef uint8_t CRYS_AESCCMStar_Nonce_t[CRYS_AESCCM_STAR_NONCE_SIZE_BYTES];
-
-/******************* Context Structure ***********************/
-/*! The user's context structure - the argument type that is passed by the user to the AES CCM APIs */
-typedef struct CRYS_AESCCM_UserContext_t
-{
- /*! AES CCM context buffer for internal usage. */
- uint32_t buff[CRYS_AESCCM_USER_CTX_SIZE_IN_WORDS];
-}CRYS_AESCCM_UserContext_t;
-
-
-/************************ Public Functions **********************/
-
-/*!
-@brief This function initializes the AES CCM context.
-
-It formats of the input data, calculates AES-MAC value for the formatted B0 block containing control information and
-CCM unique value (Nonce), and initializes the AES context structure including the initial CTR0 value.
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_aesccm_error.h.
-*/
-CRYSError_t CC_AESCCM_Init(
- CRYS_AESCCM_UserContext_t *ContextID_ptr, /*!< [in] Pointer to the AES context buffer that is allocated by the user and is used for
- the AES operation. */
- SaSiAesEncryptMode_t EncrDecrMode, /*!< [in] Flag specifying whether Encrypt (::SASI_AES_ENCRYPT) or Decrypt
- (::SASI_AES_DECRYPT) operation should be performed. */
- CRYS_AESCCM_Key_t CCM_Key, /*!< [in] Pointer to the AES-CCM key. */
- CRYS_AESCCM_KeySize_t KeySizeId, /*!< [in] Enumerator defining the key size (only 128 bit is valid). */
- uint32_t AdataSize, /*!< [in] Full byte length of additional (associated) data. If set to zero,
- calling ::CRYS_AESCCM_BlockAdata on the same context would return an error. */
- uint32_t TextSizeQ, /*!< [in] Full length of plain text data. */
- uint8_t *N_ptr, /*!< [in] Pointer to the Nonce. */
- uint8_t SizeOfN, /*!< [in] Nonce byte size. The valid values depend on the ccm mode:
- <ul><li>CCM: valid values = [7 .. 13].</li>
- <li>CCM*: valid values = [13].</li></ul> */
- uint8_t SizeOfT, /*!< [in] AES-CCM MAC (tag) byte size. The valid values depend on the ccm mode:
- <ul><li>CCM: valid values = [4, 6, 8, 10, 12, 14, 16].</li>
- <li>CCM*: valid values = [0, 4, 8, 16].</li></ul>*/
- uint32_t ccmMode /*!< [in] Flag specifying whether AES-CCM or AES-CCM* should be performed. */
-);
-
-/*! Macro defintion for CRYS_AESCCM_Init (AES CCM non-star implementation). */
-#define CRYS_AESCCM_Init(ContextID_ptr, EncrDecrMode, CCM_Key, KeySizeId, AdataSize, TextSizeQ, N_ptr, SizeOfN, SizeOfT) \
- CC_AESCCM_Init(ContextID_ptr, EncrDecrMode, CCM_Key, KeySizeId, AdataSize, TextSizeQ, N_ptr, SizeOfN, SizeOfT, CRYS_AESCCM_MODE_CCM)
-
-/*! Macro defintion CRYS_AESCCMStar_Init (AES CCM star implementation). */
-#define CRYS_AESCCMStar_Init(ContextID_ptr, EncrDecrMode, CCM_Key, KeySizeId, AdataSize, TextSizeQ, N_ptr, SizeOfN, SizeOfT) \
- CC_AESCCM_Init(ContextID_ptr, EncrDecrMode, CCM_Key, KeySizeId, AdataSize, TextSizeQ, N_ptr, SizeOfN, SizeOfT, CRYS_AESCCM_MODE_STAR)
-
-/*!
-@brief This function receives a CCM context and a block of additional data, and adds it to the AES MAC
-calculation.
-This API can be called only once per operation context. It should not be called in case AdataSize was set to
-zero in ::CC_AESCCM_Init.
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_aesccm_error.h.
-*/
-CRYSError_t CRYS_AESCCM_BlockAdata(
- CRYS_AESCCM_UserContext_t *ContextID_ptr, /*!< [in] Pointer to the context buffer. */
- uint8_t *DataIn_ptr, /*!< [in] Pointer to the additional input data. The buffer must be contiguous. */
- uint32_t DataInSize /*!< [in] Byte size of the additional data. Must match AdataSize parameter provided to
- ::CRYS_AESCCM_Init. */
-);
-
-/*!
-@brief This function can be invoked for any block of Text data whose size is a multiple of 16 bytes,
-excluding the last block that must be processed by ::CRYS_AESCCM_Finish.
-<ul><li> If encrypting:
- Continues calculation of the intermediate AES_MAC value of the text data, while simultaneously encrypting the text data using AES_CTR,
- starting from CTR value = CTR0+1.</li>
-<li>If decrypting:
- Continues decryption of the text data, while calculating the intermediate AES_MAC value of decrypted data.</li></ul>
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_aesccm_error.h.
-*/
-CRYSError_t CRYS_AESCCM_BlockTextData(
- CRYS_AESCCM_UserContext_t *ContextID_ptr, /*!< [in] Pointer to the context buffer. */
- uint8_t *DataIn_ptr, /*!< [in] Pointer to the additional input data. The buffer must be contiguous. */
- uint32_t DataInSize, /*!< [in] Byte size of the text data block. Must be a multiple of 16 bytes. */
- uint8_t *DataOut_ptr /*!< [out] Pointer to the output data. The size of the output buffer must be at least DataInSize.
- The buffer must be contiguous. */
-);
-
-/*!
-@brief This function must be the last to be called on the text data.
-It can either be called on the entire text data (if transferred as one block), or on the last block of the text data,
-even if total size of text data is equal to 0.
-It performs the same operations as ::CRYS_AESCCM_BlockTextData, but additionally:
-<ul><li> If encrypting: </li>
- <ul><li>If the size of text data is not in multiples of 16 bytes, it pads the remaining bytes with zeros to a full 16-bytes block and
- processes the data using AES_MAC and AES_CTR algorithms.</li>
- <li> Encrypts the AES_MAC result with AES_CTR using the CTR0 value saved in the context and places the SizeOfT bytes of MAC (tag)
- at the end.</li></ul></ul>
-<ul><li> If decrypting: </li>
- <ul><li>Processes the text data, except for the last SizeOfT bytes (tag), using AES_CTR and then AES_MAC algorithms.</li>
- <li>Encrypts the calculated MAC using AES_CTR based on the saved CTR0 value, and compares it with SizeOfT last bytes of input data (i.e.
- tag value).</li>
- <li>The function saves the validation result (Valid/Invalid) in the context.</li>
- <li>Returns (as the error code) the final CCM-MAC verification result.</li></ul></ul>
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_aesccm_error.h.
-*/
-CEXPORT_C CRYSError_t CRYS_AESCCM_Finish(
- CRYS_AESCCM_UserContext_t *ContextID_ptr, /*!< [in] Pointer to the context buffer. */
- uint8_t *DataIn_ptr, /*!< [in] Pointer to the last input data. The buffer must be contiguous. */
- uint32_t DataInSize, /*!< [in] Byte size of the last text data block. Can be zero. */
- uint8_t *DataOut_ptr, /*!< [in] Pointer to the output (cipher or plain text data) data. The buffer must
- be contiguous. If DataInSize = 0, output buffer is not required. */
- CRYS_AESCCM_Mac_Res_t MacRes, /*!< [in] MAC result buffer pointer. */
- uint8_t *SizeOfT /*!< [out] AES-CCM MAC byte size as defined in CRYS_AESCCM_Init. */
-);
-
-/****************************************************************************************************/
-/******** AESCCM FUNCTION ******/
-/****************************************************************************************************/
-/*!
-@brief AES CCM combines Counter mode encryption with CBC-MAC authentication.
-Input to CCM includes the following elements:
-<ul><li> Payload - text data that is both authenticated and encrypted.</li>
-<li> Associated data (Adata) - data that is authenticated but not encrypted, e.g., a header.</li>
-<li> Nonce - A unique value that is assigned to the payload and the associated data.</li></ul>
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_aesccm_error.h.
-*/
-CIMPORT_C CRYSError_t CC_AESCCM(
- SaSiAesEncryptMode_t EncrDecrMode, /*!< [in] A flag specifying whether an AES Encrypt (::SASI_AES_ENCRYPT) or Decrypt
- (::SASI_AES_DECRYPT) operation should be performed. */
- CRYS_AESCCM_Key_t CCM_Key, /*!< [in] Pointer to AES-CCM key. */
- CRYS_AESCCM_KeySize_t KeySizeId, /*!< [in] Enumerator defining the key size (only 128 bit is valid). */
- uint8_t *N_ptr, /*!< [in] Pointer to the Nonce. */
- uint8_t SizeOfN, /*!< [in] Nonce byte size. The valid values depend on the ccm mode:
- <ul><li>CCM: valid values = [7 .. 13].</li>
- <li>CCM*: valid values = [13].</li></ul> */
- uint8_t *ADataIn_ptr, /*!< [in] Pointer to the additional input data. The buffer must be contiguous. */
- uint32_t ADataInSize, /*!< [in] Byte size of the additional data. */
- uint8_t *TextDataIn_ptr, /*!< [in] Pointer to the plain-text data for encryption or cipher-text data for decryption.
- The buffer must be contiguous. */
- uint32_t TextDataInSize, /*!< [in] Byte size of the full text data. */
- uint8_t *TextDataOut_ptr, /*!< [out] Pointer to the output (cipher or plain text data according to encrypt-decrypt mode)
- data. The buffer must be contiguous. */
- uint8_t SizeOfT, /*!< [in] AES-CCM MAC (tag) byte size. The valid values depend on the ccm mode:
- <ul><li>CCM: valid values = [4, 6, 8, 10, 12, 14, 16].</li>
- <li>CCM*: valid values = [0, 4, 8, 16].</li></ul>*/
- CRYS_AESCCM_Mac_Res_t Mac_Res, /*!< [in/out] Pointer to the MAC result buffer. */
- uint32_t ccmMode /*!< [in] Flag specifying whether AES-CCM or AES-CCM* should be performed. */
-);
-
-/*! Macro defintion for CRYS_AESCCM (AES CCM non-star implementation). */
-#define CRYS_AESCCM(EncrDecrMode, CCM_Key, KeySizeId, N_ptr, SizeOfN, ADataIn_ptr, ADataInSize, TextDataIn_ptr, TextDataInSize, TextDataOut_ptr, SizeOfT, Mac_Res) \
- CC_AESCCM(EncrDecrMode, CCM_Key, KeySizeId, N_ptr, SizeOfN, ADataIn_ptr, ADataInSize, TextDataIn_ptr, TextDataInSize, TextDataOut_ptr, SizeOfT, Mac_Res, CRYS_AESCCM_MODE_CCM)
-
-/*! Macro defintion for CRYS_AESCCMStar (AES CCM star implementation). */
-#define CRYS_AESCCMStar(EncrDecrMode, CCM_Key, KeySizeId, N_ptr, SizeOfN, ADataIn_ptr, ADataInSize, TextDataIn_ptr, TextDataInSize, TextDataOut_ptr, SizeOfT, Mac_Res) \
- CC_AESCCM(EncrDecrMode, CCM_Key, KeySizeId, N_ptr, SizeOfN, ADataIn_ptr, ADataInSize, TextDataIn_ptr, TextDataInSize, TextDataOut_ptr, SizeOfT, Mac_Res, CRYS_AESCCM_MODE_STAR)
-
-
-/*!
-@brief This function receives the MAC source address, the frame counter and the MAC size
-and returns the required nonce for AES-CCM* as defined in ieee-802.15.4.
-This API should be called before CRYS_AESCCMStar and CRYS_AESCCMStar_Init,
-and the generated nonce should be provided to these functions.
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_aesccm_error.h.
-*/
-CRYSError_t CRYS_AESCCMStar_NonceGenerate(
- CRYS_AESCCMStar_SourceAddress_t srcAddr, /*!< [in] The MAC address in EUI-64 format. */
- uint32_t FrameCounter, /*!< [in] The MAC frame counter. */
- uint8_t SizeOfT, /*!< [in] AES-CCM* MAC (tag) byte size. Valid values = [0,4,8,16]. */
- CRYS_AESCCMStar_Nonce_t nonce /*!< [out] The required nonce for AES-CCM*. */
-);
-
-#ifdef __cplusplus
-}
-#endif
-
-/**
-@}
- */
-
-#endif /*#ifndef CRYS_AESCCM_H*/
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_aesccm_error.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_aesccm_error.h
deleted file mode 100644
index a2b20a0..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_aesccm_error.h
+++ /dev/null
@@ -1,134 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-
-#ifndef CRYS_AESCCM_ERROR_H
-#define CRYS_AESCCM_ERROR_H
-
-
-#include "crys_error.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*!
-@file
-@brief This module contains the definitions of the CRYS AESCCM errors.
-@defgroup crys_aesccm_error CryptoCell AES-CCM specific errors
-@{
-@ingroup crys_aesccm
-*/
-
-/************************ Defines ******************************/
-
-/*! CRYS AESCCM module errors. CRYS_AESCCM_MODULE_ERROR_BASE = 0x00F01500. */
-/*! Invalid context pointer. */
-#define CRYS_AESCCM_INVALID_USER_CONTEXT_POINTER_ERROR (CRYS_AESCCM_MODULE_ERROR_BASE + 0x00UL)
-/*! Illegal key size. */
-#define CRYS_AESCCM_ILLEGAL_KEY_SIZE_ERROR (CRYS_AESCCM_MODULE_ERROR_BASE + 0x01UL)
-/*! Invalid key pointer. */
-#define CRYS_AESCCM_INVALID_KEY_POINTER_ERROR (CRYS_AESCCM_MODULE_ERROR_BASE + 0x02UL)
-/*! Invalid encryption mode. */
-#define CRYS_AESCCM_INVALID_ENCRYPT_MODE_ERROR (CRYS_AESCCM_MODULE_ERROR_BASE + 0x03UL)
-/*! Context is corrupted. */
-#define CRYS_AESCCM_USER_CONTEXT_CORRUPTED_ERROR (CRYS_AESCCM_MODULE_ERROR_BASE + 0x04UL)
-/*! Invalid data in pointer. */
-#define CRYS_AESCCM_DATA_IN_POINTER_INVALID_ERROR (CRYS_AESCCM_MODULE_ERROR_BASE + 0x05UL)
-/*! Invalid data out pointer. */
-#define CRYS_AESCCM_DATA_OUT_POINTER_INVALID_ERROR (CRYS_AESCCM_MODULE_ERROR_BASE + 0x06UL)
-/*! Illegal data in size. */
-#define CRYS_AESCCM_DATA_IN_SIZE_ILLEGAL (CRYS_AESCCM_MODULE_ERROR_BASE + 0x07UL)
-/*! Illegal data in or data out address. */
-#define CRYS_AESCCM_DATA_OUT_DATA_IN_OVERLAP_ERROR (CRYS_AESCCM_MODULE_ERROR_BASE + 0x08UL)
-/*! Illegal data out size. */
-#define CRYS_AESCCM_DATA_OUT_SIZE_INVALID_ERROR (CRYS_AESCCM_MODULE_ERROR_BASE + 0x09UL)
-/*! Illegal call to process additional data. */
-#define CRYS_AESCCM_ADDITIONAL_BLOCK_NOT_PERMITTED_ERROR (CRYS_AESCCM_MODULE_ERROR_BASE + 0x0AUL)
-/*! Illegal dma buffer type. */
-#define CRYS_AESCCM_ILLEGAL_DMA_BUFF_TYPE_ERROR (CRYS_AESCCM_MODULE_ERROR_BASE + 0x0BUL)
-/*! Illegal parameter size. */
-#define CRYS_AESCCM_ILLEGAL_PARAMETER_SIZE_ERROR (CRYS_AESCCM_MODULE_ERROR_BASE + 0x0CUL)
-/*! Invalid parameter pointer. */
-#define CRYS_AESCCM_ILLEGAL_PARAMETER_PTR_ERROR (CRYS_AESCCM_MODULE_ERROR_BASE + 0x0DUL)
-/*! Invalid data type. */
-#define CRYS_AESCCM_ILLEGAL_DATA_TYPE_ERROR (CRYS_AESCCM_MODULE_ERROR_BASE + 0x0EUL)
-/*! CCM MAC compare failure. */
-#define CRYS_AESCCM_CCM_MAC_INVALID_ERROR (CRYS_AESCCM_MODULE_ERROR_BASE + 0x0FUL)
-/*! Illegal operation. */
-#define CRYS_AESCCM_LAST_BLOCK_NOT_PERMITTED_ERROR (CRYS_AESCCM_MODULE_ERROR_BASE + 0x10UL)
-/*! Illegal parameter. */
-#define CRYS_AESCCM_ILLEGAL_PARAMETER_ERROR (CRYS_AESCCM_MODULE_ERROR_BASE + 0x11UL)
-/*! Additional data input size is incorrect. */
-#define CRYS_AESCCM_NOT_ALL_ADATA_WAS_PROCESSED_ERROR (CRYS_AESCCM_MODULE_ERROR_BASE + 0x13UL)
-/*! Text data input size is incorrect. */
-#define CRYS_AESCCM_NOT_ALL_DATA_WAS_PROCESSED_ERROR (CRYS_AESCCM_MODULE_ERROR_BASE + 0x14UL)
-/*! Additional data was already processed (must be processed only once). */
-#define CRYS_AESCCM_ADATA_WAS_PROCESSED_ERROR (CRYS_AESCCM_MODULE_ERROR_BASE + 0x15UL)
-/*! Illegal Nonce size. */
-#define CRYS_AESCCM_ILLEGAL_NONCE_SIZE_ERROR (CRYS_AESCCM_MODULE_ERROR_BASE + 0x16UL)
-/*! Illegal tag (MAC) size. */
-#define CRYS_AESCCM_ILLEGAL_TAG_SIZE_ERROR (CRYS_AESCCM_MODULE_ERROR_BASE + 0x17UL)
-
-/*! Illegal context size. */
-#define CRYS_AESCCM_CTX_SIZES_ERROR (CRYS_AESCCM_MODULE_ERROR_BASE + 0x28UL)
-/*! Illegal parameters. */
-#define CRYS_AESCCM_ILLEGAL_PARAMS_ERROR (CRYS_AESCCM_MODULE_ERROR_BASE + 0x29UL)
-/*! AESCCM is not supported. */
-#define CRYS_AESCCM_IS_NOT_SUPPORTED (CRYS_AESCCM_MODULE_ERROR_BASE + 0xFFUL)
-
-/************************ Enums ********************************/
-
-/************************ Typedefs ****************************/
-
-/************************ Structs *****************************/
-
-/************************ Public Variables *********************/
-
-/************************ Public Functions *********************/
-
-#ifdef __cplusplus
-}
-#endif
-
-/**
-@}
- */
-
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_chacha.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_chacha.h
deleted file mode 100644
index d303a38..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_chacha.h
+++ /dev/null
@@ -1,234 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-/*!
-@file
-@brief This file contains all of the enums and definitions that are used for the
- CRYS CHACHA APIs, as well as the APIs themselves.
-@defgroup crys_chacha CryptoCell CHACHA APIs
-@{
-@ingroup cryptocell_api
-*/
-#ifndef CRYS_CHACHA_H
-#define CRYS_CHACHA_H
-
-
-#include "ssi_pal_types.h"
-#include "crys_error.h"
-
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/************************ Defines ******************************/
-/*! CHACHA user's context size in words. */
-#define CRYS_CHACHA_USER_CTX_SIZE_IN_WORDS 17
-
-/*! CHACHA block size in words. */
-#define CRYS_CHACHA_BLOCK_SIZE_IN_WORDS 16
-/*! CHACHA block size in bytes. */
-#define CRYS_CHACHA_BLOCK_SIZE_IN_BYTES (CRYS_CHACHA_BLOCK_SIZE_IN_WORDS * sizeof(uint32_t))
-
-/*! Nonce buffer max size in words. */
-#define CRYS_CHACHA_NONCE_MAX_SIZE_IN_WORDS 3
-/*! Nonce buffer max size in bytes. */
-#define CRYS_CHACHA_NONCE_MAX_SIZE_IN_BYTES (CRYS_CHACHA_NONCE_MAX_SIZE_IN_WORDS * sizeof(uint32_t))
-
-/*! CHACHA KEY maximal size in words. */
-#define CRYS_CHACHA_KEY_MAX_SIZE_IN_WORDS 8
-/*! CHACHA KEY maximal size in bytes. */
-#define CRYS_CHACHA_KEY_MAX_SIZE_IN_BYTES (CRYS_CHACHA_KEY_MAX_SIZE_IN_WORDS * sizeof(uint32_t))
-
-/************************ Enums ********************************/
-
-/*! Enum defining the CHACHA Encrypt or Decrypt operation mode. */
-typedef enum {
- /*! CHACHA encrypt mode. */
- CRYS_CHACHA_Encrypt = 0,
- /*! CHACHA decrypt mode. */
- CRYS_CHACHA_Decrypt = 1,
- /*! CHACHA maximal number of operations (encrypt/decrypt). */
- CRYS_CHACHA_EncryptNumOfOptions,
-
- /*! Reserved. */
- CRYS_CHACHA_EncryptModeLast = 0x7FFFFFFF,
-
-}CRYS_CHACHA_EncryptMode_t;
-
-/*! Enum defining the CHACHA Nonce size in bits. */
-typedef enum {
- /*! 64 bit Nonce size. */
- CRYS_CHACHA_Nonce64BitSize = 0,
- /*! 96 bit Nonce size. */
- CRYS_CHACHA_Nonce96BitSize = 1,
- /*! CHACHA maximal number of nonce sizes. */
- CRYS_CHACHA_NonceSizeNumOfOptions,
- /*! Reserved. */
- CRYS_CHACHA_NonceSizeLast = 0x7FFFFFFF,
-
-}CRYS_CHACHA_NonceSize_t;
-
-/************************ Typedefs ****************************/
-
-/*! Defines the Nonce buffer 12 bytes array. */
-typedef uint8_t CRYS_CHACHA_Nonce_t[CRYS_CHACHA_NONCE_MAX_SIZE_IN_BYTES];
-
-/*! Defines the CHACHA key buffer. */
-typedef uint8_t CRYS_CHACHA_Key_t[CRYS_CHACHA_KEY_MAX_SIZE_IN_BYTES];
-
-
-/************************ context Structs ******************************/
-
-/*! The user's context prototype - the argument type that is passed by the user
- to the CHACHA API. The context saves the state of the operation and must be saved by the user
- till the end of the APIs flow (for example till ::CRYS_CHACHA_Free is called). */
-typedef struct CRYS_CHACHAUserContext_t {
- /* Allocated buffer must be double the size of actual context
- * + 1 word for offset management */
- /*! Context buffer for internal use */
- uint32_t buff[CRYS_CHACHA_USER_CTX_SIZE_IN_WORDS];
-}CRYS_CHACHAUserContext_t;
-
-/************************ Public Variables **********************/
-
-
-/************************ Public Functions **********************/
-
-/****************************************************************************************************/
-
-/*!
-@brief This function is used to initialize the context for CHACHA operations.
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_chacha_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_CHACHA_Init(
- CRYS_CHACHAUserContext_t *pContextID, /*!< [in] Pointer to the CHACHA context buffer that is allocated by the user
- and is used for the CHACHA operation. */
- CRYS_CHACHA_Nonce_t pNonce, /*!< [in] A buffer containing an nonce. */
- CRYS_CHACHA_NonceSize_t nonceSize, /*!< [in] Enumerator defining the nonce size (only 64 and 96 bit are valid). */
- CRYS_CHACHA_Key_t pKey, /*!< [in] A pointer to the user's key buffer. */
- uint32_t initialCounter, /*!< [in] An initial counter. */
- CRYS_CHACHA_EncryptMode_t EncryptDecryptFlag /*!< [in] A flag specifying whether the CHACHA should perform an Encrypt operation
- or a Decrypt operation. */
-);
-
-
-/*!
-@brief This function is used to process aligned blocks of CHACHA.
-The data in size should be a multiple of chacha block size.
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_chacha_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_CHACHA_Block(
- CRYS_CHACHAUserContext_t *pContextID, /*!< [in] Pointer to the context buffer. */
- uint8_t *pDataIn, /*!< [in] A pointer to the buffer of the input data to the CHACHA.
- The pointer does not need to be aligned. must not be null. */
- uint32_t dataInSize, /*!< [in] The size of the input data.
- Must be a multiple of ::CRYS_CHACHA_BLOCK_SIZE_IN_BYTES bytes and must not be 0. */
- uint8_t *pDataOut /*!< [out] A pointer to the buffer of the output data from the CHACHA.
- The pointer does not need to be aligned. must not be null. */
-);
-
-
-/*!
-@brief This function is used to process the remaining data of CHACHA.
-The data in size should be smaller than chacha block size.
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_chacha_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_CHACHA_Finish(
- CRYS_CHACHAUserContext_t *pContextID, /*!< [in] Pointer to the context buffer. */
- uint8_t *pDataIn, /*!< [in] A pointer to the buffer of the input data to the CHACHA.
- The pointer does not need to be aligned. If dataInSize = 0, input buffer is not required. */
- uint32_t dataInSize, /*!< [in] The size of the input data.
- zero and non multiple of ::CRYS_CHACHA_BLOCK_SIZE_IN_BYTES are valid. */
- uint8_t *pDataOut /*!< [out] A pointer to the buffer of the output data from the CHACHA.
- The pointer does not need to be aligned. If dataInSize = 0, output buffer is not required. */
-);
-
-
-/*!
-@brief This function is used to free the context of CHACHA operations.
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_chacha_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_CHACHA_Free(
- CRYS_CHACHAUserContext_t *pContextID /*!< [in] Pointer to the context buffer. */
-);
-
-
-/*!
-@brief This function is used to perform the CHACHA operation in one integrated process.
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_chacha_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_CHACHA(
- CRYS_CHACHA_Nonce_t pNonce, /*!< [in] A buffer containing an nonce. */
- CRYS_CHACHA_NonceSize_t nonceSize, /*!< [in] Enumerator defining the nonce size (only 64 and 96 bit are valid). */
- CRYS_CHACHA_Key_t pKey, /*!< [in] A pointer to the user's key buffer. */
- uint32_t initialCounter, /*!< [in] An initial counter. */
- CRYS_CHACHA_EncryptMode_t encryptDecryptFlag, /*!< [in] A flag specifying whether the CHACHA should perform an Encrypt operation
- or a Decrypt operation. */
- uint8_t *pDataIn, /*!< [in] A pointer to the buffer of the input data to the CHACHA.
- The pointer does not need to be aligned. must not be null. */
- uint32_t dataInSize, /*!< [in] The size of the input data. must not be 0. */
- uint8_t *pDataOut /*!< [out] A pointer to the buffer of the output data from the CHACHA.
- The pointer does not need to be aligned. must not be null. */
-);
-
-
-/***********************************************************************************/
-
-#ifdef __cplusplus
-}
-#endif
-
-/**
-@}
- */
-
-#endif /* #ifndef CRYS_CHACHA_H */
-
-
-
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_chacha_error.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_chacha_error.h
deleted file mode 100644
index 6be2c35..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_chacha_error.h
+++ /dev/null
@@ -1,103 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef CRYS_CHACHA_ERROR_H
-#define CRYS_CHACHA_ERROR_H
-
-
-#include "crys_error.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*!
-@file
-@brief This module contains the definitions of the CRYS CHACHA errors.
-@defgroup crys_chacha_error CryptoCell CHACHA specific errors
-@{
-@ingroup crys_chacha
-*/
-
-
-
-/************************ Defines ******************************/
-
-/*! The CRYS CHACHA module errors base address - 0x00F02200. */
-/*! Illegal Nonce. */
-#define CRYS_CHACHA_INVALID_NONCE_ERROR (CRYS_CHACHA_MODULE_ERROR_BASE + 0x01UL)
-/*! Illegal key size. */
-#define CRYS_CHACHA_ILLEGAL_KEY_SIZE_ERROR (CRYS_CHACHA_MODULE_ERROR_BASE + 0x02UL)
-/*! Illegal key pointer. */
-#define CRYS_CHACHA_INVALID_KEY_POINTER_ERROR (CRYS_CHACHA_MODULE_ERROR_BASE + 0x03UL)
-/*! Illegal operation mode. */
-#define CRYS_CHACHA_INVALID_ENCRYPT_MODE_ERROR (CRYS_CHACHA_MODULE_ERROR_BASE + 0x04UL)
-/*! Illegal data in pointer. */
-#define CRYS_CHACHA_DATA_IN_POINTER_INVALID_ERROR (CRYS_CHACHA_MODULE_ERROR_BASE + 0x05UL)
-/*! Illegal data out pointer. */
-#define CRYS_CHACHA_DATA_OUT_POINTER_INVALID_ERROR (CRYS_CHACHA_MODULE_ERROR_BASE + 0x06UL)
-/*! Illegal user context. */
-#define CRYS_CHACHA_INVALID_USER_CONTEXT_POINTER_ERROR (CRYS_CHACHA_MODULE_ERROR_BASE + 0x07UL)
-/*! Illegal user context size. */
-#define CRYS_CHACHA_CTX_SIZES_ERROR (CRYS_CHACHA_MODULE_ERROR_BASE + 0x08UL)
-/*! Illegal Nonce pointer. */
-#define CRYS_CHACHA_INVALID_NONCE_PTR_ERROR (CRYS_CHACHA_MODULE_ERROR_BASE + 0x09UL)
-/*! Illegal data in size. */
-#define CRYS_CHACHA_DATA_IN_SIZE_ILLEGAL (CRYS_CHACHA_MODULE_ERROR_BASE + 0x0AUL)
-/*! General error. */
-#define CRYS_CHACHA_GENERAL_ERROR (CRYS_CHACHA_MODULE_ERROR_BASE + 0x0BUL)
-/*! CHACHA is not supported. */
-#define CRYS_CHACHA_IS_NOT_SUPPORTED (CRYS_CHACHA_MODULE_ERROR_BASE + 0xFFUL)
-
-/************************ Enums ********************************/
-
-/************************ Typedefs ****************************/
-
-/************************ Structs *****************************/
-
-/************************ Public Variables *********************/
-
-/************************ Public Functions *********************/
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_chacha_poly.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_chacha_poly.h
deleted file mode 100644
index a7f074a..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_chacha_poly.h
+++ /dev/null
@@ -1,95 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-/*!
-@file
-@brief This file contains all of the enums and definitions that are used for the
- CRYS CHACHA-POLY APIs, as well as the APIs themselves.
-@defgroup crys_chacha_poly CryptoCell CHACHA-POLY APIs
-@{
-@ingroup cryptocell_api
-*/
-#ifndef CRYS_CHACHA_POLY_H
-#define CRYS_CHACHA_POLY_H
-
-
-#include "ssi_pal_types.h"
-#include "crys_error.h"
-#include "crys_chacha.h"
-#include "crys_poly.h"
-
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-
-/*!
-@brief This function is used to perform the CHACHA-POLY encryption and authentication operation.
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_chacha_poly_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_CHACHA_POLY(
- CRYS_CHACHA_Nonce_t pNonce, /*!< [in] A pointer to a buffer containing the nonce value. */
- CRYS_CHACHA_Key_t pKey, /*!< [in] A pointer to the user's key buffer. */
- CRYS_CHACHA_EncryptMode_t encryptDecryptFlag, /*!< [in] A flag specifying whether the CHACHA-POLY should perform an Encrypt or
- Decrypt operation. */
- uint8_t *pAddData, /*!< [in] A pointer to the buffer of the additional data to the POLY.
- The pointer does not need to be aligned. must not be null. */
- size_t addDataSize, /*!< [in] The size of the input data. must not be 0. */
- uint8_t *pDataIn, /*!< [in] A pointer to the buffer of the input data to the CHACHA.
- The pointer does not need to be aligned. must not be null. */
- size_t dataInSize, /*!< [in] The size of the input data. must not be 0. */
- uint8_t *pDataOut, /*!< [out] A pointer to the buffer of the output data from the CHACHA.
- must not be null. */
- CRYS_POLY_Mac_t macRes /*!< [in/out] Pointer to the MAC result buffer.*/
-);
-
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif /* #ifndef CRYS_CHACHA_POLY_H */
-
-
-
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_chacha_poly_error.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_chacha_poly_error.h
deleted file mode 100644
index 433d071..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_chacha_poly_error.h
+++ /dev/null
@@ -1,95 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef CRYS_CHACHA_POLY_ERROR_H
-#define CRYS_CHACHA_POLY_ERROR_H
-
-
-#include "crys_error.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*!
-@file
-@brief This module contains the definitions of the CRYS CHACHA POLY errors.
-@defgroup crys_chacha_poly_error CryptoCell CHACHA POLY specific errors
-@{
-@ingroup crys_chacha_poly
-*/
-
-
-
-/************************ Defines ******************************/
-
-/*! The CRYS CHACHA POLY module errors base address - 0x00F02400. */
-/*! Invalid Additional data. */
-#define CRYS_CHACHA_POLY_ADATA_INVALID_ERROR (CRYS_CHACHA_POLY_MODULE_ERROR_BASE + 0x01UL)
-/*! Invalid input data. */
-#define CRYS_CHACHA_POLY_DATA_INVALID_ERROR (CRYS_CHACHA_POLY_MODULE_ERROR_BASE + 0x02UL)
-/*! Illegal encryption mode. */
-#define CRYS_CHACHA_POLY_ENC_MODE_INVALID_ERROR (CRYS_CHACHA_POLY_MODULE_ERROR_BASE + 0x03UL)
-/*! Illegal data size. */
-#define CRYS_CHACHA_POLY_DATA_SIZE_INVALID_ERROR (CRYS_CHACHA_POLY_MODULE_ERROR_BASE + 0x04UL)
-/*! Key generation error. */
-#define CRYS_CHACHA_POLY_GEN_KEY_ERROR (CRYS_CHACHA_POLY_MODULE_ERROR_BASE + 0x05UL)
-/*! CHACHA Key generation error. */
-#define CRYS_CHACHA_POLY_ENCRYPTION_ERROR (CRYS_CHACHA_POLY_MODULE_ERROR_BASE + 0x06UL)
-/*! Authentication error. */
-#define CRYS_CHACHA_POLY_AUTH_ERROR (CRYS_CHACHA_POLY_MODULE_ERROR_BASE + 0x07UL)
-/*! MAC comparison error. */
-#define CRYS_CHACHA_POLY_MAC_ERROR (CRYS_CHACHA_POLY_MODULE_ERROR_BASE + 0x08UL)
-
-/************************ Enums ********************************/
-
-/************************ Typedefs ****************************/
-
-/************************ Structs *****************************/
-
-/************************ Public Variables *********************/
-
-/************************ Public Functions *********************/
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_common.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_common.h
deleted file mode 100644
index 74c13cf..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_common.h
+++ /dev/null
@@ -1,371 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-
-#ifndef CRYS_COMMON_H
-#define CRYS_COMMON_H
-
-#include "crys_common_error.h"
-
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-
-/************************ Defines ******************************/
-
-#define CRYS_AES_SECRET_KEY_SIZE_IN_WORDS 4
-
-/* the ROT13 definition - relevant only on SW low level engines compiled in the ROT mode */
-#define CRYS_COMMON_ROT_13_OFFSET 13
-
-
-
-/************************ Enums ********************************/
-
-/************************ Typedefs ****************************/
-
-/************************ Structs *****************************/
-
-/************************ Public Variables *********************/
-
-/************************ Public Functions *********************/
-
-
-
-/***********************************************************************
- **
- * @brief This function executes a reverse bytes copying from one buffer to another buffer.
- *
- * Overlapping of buffers is not allowed, excluding the case, when destination and source
- * buffers are the same.
- * Example of a 5 byte buffer:
- *
- * dst_ptr[4] = src_ptr[0]
- * dst_ptr[3] = src_ptr[1]
- * dst_ptr[2] = src_ptr[2]
- * dst_ptr[1] = src_ptr[3]
- * dst_ptr[0] = src_ptr[4]
- *
- * @param[in] dst_ptr - The pointer to destination buffer.
- * @param[in] src_ptr - The pointer to source buffer.
- * @param[in] size - The size in bytes.
- *
- */
- CRYSError_t CRYS_COMMON_ReverseMemcpy( uint8_t *dst_ptr , uint8_t *src_ptr , uint32_t size );
-
-
-/***********************************************************************
- **
- * @brief This function converts aligned words array to bytes array/
- *
- * 1. Assumed, that input buffer is aligned to 4-bytes word and
- * bytes order is set according to machine endianness.
- * 2. Output buffer receives data as bytes stream from LSB to MSB.
- * For increasing performance on small buffers, the output data is given
- * by rounded down pointer and alignment.
- * 3. This implementation is given for both Big and Little endian machines.
- *
- *
- * @param[in] in32_ptr - The pointer to aligned input buffer.
- * @param[in] out32_ptr - The 32-bits pointer to output buffer (rounded down to 4 bytes) .
- * @param[in] outAlignBits - The actual output data alignment;
- * @param[in] sizeWords - The size in words (sizeWords >= 1).
- *
- * return - no return value.
- */
- void CRYS_COMMON_AlignedWordsArrayToBytes( uint32_t *in32_ptr , uint32_t *out32_ptr ,
- uint32_t outAlignBits, uint32_t sizeWords );
-
-/***********************************************************************/
- /**
- * @brief This function converts in place words byffer to bytes buffer with
- * reversed endianity of output array.
- *
- * The function can convert:
- * - big endian bytes array to words array with little endian order
- * of words and backward.
- *
- * Note:
- * 1. Endianness of each word in words buffer should be set allways
- * according to processor used.
- * 2. Implementation is given for both big and little endianness of
- * processor.
- *
- * @param[in] buf_ptr - The 32-bits pointer to input/output buffer.
- * @param[in] sizeWords - The size in words (sizeWords > 0).
- *
- * @return - no return value.
- */
-void CRYS_COMMON_InPlaceConvertBytesWordsAndArrayEndianness(
- uint32_t *buf_ptr,
- uint32_t sizeWords);
-
-
-/***********************************************************************/
- /**
- * @brief This function converts big endianness bytes array to aligned words
- * array with words order according to little endian /
- *
- * 1. Assumed, that input bytes order is set according
- * to big endianness: MS Byte is most left, i.e. order is from
- * Msb to Lsb.
- * 2. Output words array should set according to
- * little endianness words order: LSWord is most left, i.e. order
- * is from Lsw to Msw. Order bytes in each word - according to
- * 3. Implementation is given for both big and little
- * endianness of processor.
- *
- * @param[out] out32_ptr - The 32-bits pointer to output buffer.
- * @param[in] sizeOutBuffBytes - The size in bytes of output buffer, must be
- * aligned to 4 bytes and not less than sizeInBytes.
- * @param[in] in8_ptr - The pointer to input buffer.
- * @param[in] sizeInBytes - The size in bytes of input data(sizeBytes >= 1).
- *
- * @return CRYSError_t - On success CRYS_OK is returned, on failure a
- * value MODULE_* as defined in .
- */
-CRYSError_t CRYS_COMMON_ConvertMsbLsbBytesToLswMswWords(
- uint32_t *out32_ptr,
- uint32_t sizeOutBuffBytes,
- const uint8_t *in8_ptr,
- uint32_t sizeInBytes);
-
-
-/***********************************************************************/
- /**
- * @brief This function converts LE 32bit-words array to BE bytes array.
- *
- * Note: The function allows output full size of the data and also output
- * without leading zeros, if the user gives appropriate exact output
- * size < input size.
- *
- * Assuming:
- * 1. Output bytes order is according to big endianness:
- * MS Byte is most left, i.e. order is from Msb to Lsb.
- * 2. Input array words order is set according to
- * little endianness words order: LSWord is most left, i.e. order
- * is from Lsw to Msw. Bytes order in each word - according to
- * processor endianness.
- * 3. Owerlapping of buffers is not allowed, besides in
- * place operation and size aligned to full words.
- * 4. Implementation is given for both big and little
- * endianness of processor.
- *
- * @param[in] out8_ptr - The bytes pointer to the output buffer.
- * @param[in] sizeOutBuffBytes - The size of the data in bytes to output; must
- * be not less, than sizeInBytes.
- * @param[out] in32_ptr - The pointer to the input buffer.
- * @param[in] sizeInpBytes - The size of the input data in bytes. The size must
- * be > 0 and aligned to 4 bytes.
- *
- * @return CRYSError_t - On success CRYS_OK is returned, on failure a
- * value MODULE_* as defined in .
- */
-CRYSError_t CRYS_COMMON_ConvertLswMswWordsToMsbLsbBytes(
- uint8_t *out8_ptr,
- uint32_t sizeOutBytes,
- uint32_t *in32_ptr,
- uint32_t sizeInpBytes);
-
-
-/***********************************************************************/
-/**
- * @brief VOS_GetGlobalData get the global random key hidden inside the function
- * the global data implemented for now are random key buffer and AES secret key buffer
- *
- * When no_rtos is declared then we allow a global data. The random key/AES secret key are hidden as static inside the function
- *
- *
- * @param[in] Globalid select the buffer
- * @param[in] GlobalDataSizeWords - the global data buffer size needed in words - this value must be a predetermined value
- * @param[out] GlobalData_ptr - Pointer to the global buffer returned. The buffer must be at least GlobalDataSizeWords size
- *
- * @return CRYSError_t - On success CRYS_OK is returned, on failure an Error as defined in VOS_error
- */
-CRYSError_t CRYS_COMMON_GetGlobalData(uint16_t Globalid, uint32_t *GlobalData_ptr, uint16_t GlobalDataSizeWords);
-
-
-/***********************************************************************/
-/**
-* @brief CRYS_COMMON_StoreGlobalData store the global random key into the global buffer hidden inside the function
-* the global data implemented for now are random key buffer and AES secret key buffer
-*
-*
-* @param[in] Globalid - random key / AES secret key
-* @param[in] GlobalDataSizeWords - the global data buffer size needed in words - this value must be a predetermined value
-* @param[in] GlobalData_ptr - Pointer to the global buffer to be saved. The buffer must be at least GlobalDataSizeWords size
-*
-* Return Value:
-*/
-CRYSError_t CRYS_COMMON_StoreGlobalData(uint16_t Globalid, uint32_t *GlobalData_ptr, uint16_t GlobalDataSizeWords);
-
-
-/***********************************************************************/
-/**
- * @brief The CRYS_COMMON_CutAndSaveEndOfLliData() function saves the data from end of source
- * memory, pointed by LLI table, to destination memory, and decreases the LLI table accordingly.
- *
- * The function executes the following major steps:
- *
- * 1. Starts copy bytes from last byte of last chunk of source LLI table into
- * last byte of destination memory.
- * 2. Continues copy bytes in reverse order while not completes copying of all amount of data.
- * 3. If last chunk of source or destination data is not enough, the function crosses
- * to next chunk of LLI table.
- * 4. Decreases the Data size of last updated LLI entry and sets the LAST bit.
- * 5. Exits with the OK code.
- *
- *
- * @param[in] SrcLliTab_ptr - The pointer to the LLI table, containing pointers and sizes of
- * chunks of source data. The table need to be aligned and placed
- * in SEP SRAM.
- * @param[in] SrcLliTabSize_ptr - The pointer to buffer, containing th size of the LLI table in words.
- * @param[in] Dest_ptr - The destination address for copying the data.
- * @param[in] DataSize - The count of bytes to copy.
- *
- * @return CRYSError_t - On success CRYS_OK is returned,
- * - CRYS_COMMON_ERROR_IN_SAVING_LLI_DATA_ERROR
- *
- * NOTE: 1. Because the function is intended for internal using, it is presumed that all input parameters
- * are valid.
- * 2. Assumed, that copied source not may to take more than two last chunks of source memory.
- */
- CRYSError_t CRYS_COMMON_CutAndSaveEndOfLliData(
- uint32_t *SrcLliTab_ptr,
- uint32_t *SrcLliTabSize_ptr,
- uint8_t *Dst_ptr,
- uint32_t DataSize);
-
-/***********************************************************************/
-/**
- * @brief The CRYS_COMMON_CutAndSaveBeginOfLliData() function saves the data from beginning of source
- * memory, pointed by LLI table, to destination memory, and decreases the LLI table accordingly.
- *
- * The function executes the following major steps:
- *
- * 1. Starts copy bytes from first byte of first chunk of source LLI table into
- * destination memory.
- * 2. If first chunk of source is not enough, the function crosses
- * to next chunk of LLI table.
- * 3. Updates LLI table pointer and size according to copied amount of data.
- * 5. Exits with the OK code.
- *
- * @param[in/out] SrcLliTab_ptr_ptr - The pointer to pointer to the LLI table, containing pointers and
- * sizes of the chunks of source data. The table need to be aligned and
- * placed in SRAM.
- * @param[in/out] SrcLliTabSize_ptr - The pointer to buffer, containing th size of the LLI table in words.
- * @param[in] Dest_ptr - The destination address for copying the data.
- * @param[in] DataSize - The count of bytes to copy.
- *
- * @return - no return value.
- *
- * NOTE: 1. Because the function is intended for internal using, it is presumed that all input parameters
- * are valid.
- * 2. Assumed, that copied source not may to take more than two first chunks of source memory.
- */
- void CRYS_COMMON_CutAndSaveBeginOfLliData(
- uint32_t **SrcLliTab_ptr_ptr,
- uint32_t *SrcLliTabSize_ptr,
- uint8_t *Dst_ptr,
- uint32_t DataSize);
-
-/***********************************************************************/
- /**
- * @brief This function converts 32-bit words array with little endian
- * order of words to bytes array with little endian (LE) order of bytes.
- *
- * Assuming: no buffers overlapping, in/out pointers and sizes not equall to NULL,
- the buffer size must be not less, than input data size.
- *
- * @param[out] out8Le - The bytes pointer to output buffer.
- * @param[in] in32Le - The pointer to input 32-bit words buffer.
- * @param[in] sizeInWords - The size in words of input data (sizeWords >= 0).
- *
- * @return CRYSError_t - On success CRYS_OK is returned, on failure a
- * value MODULE_* as defined in .
- */
-void CRYS_COMMON_ConvertLswMswWordsToLsbMsbBytes(
- uint8_t *out8Le,
- const uint32_t *in32Le,
- size_t sizeInWords);
-
-
-/***********************************************************************/
-/**
- * @brief This function converts bytes array with little endian (LE) order of
- * bytes to 32-bit words array with little endian order of words and bytes.
- *
- * Assuming: No owerlapping of buffers; in/out pointers and sizes are not equall to NULL.
- * If is in-place conversion, then the size must be multiple of 4 bytes.
- * @param[out] out32Le - The 32-bits pointer to output buffer. The buffer size must be
- * not less, than input data size.
- * @param[in] in8Le - The pointer to input buffer.
- * @param[in] sizeInBytes - The size in bytes of input data(sizeBytes > 0).
- *
- * @return CRYSError_t - On success CRYS_OK is returned, on failure a
- * value MODULE_* as defined in .
- */
-void CRYS_COMMON_ConvertLsbMsbBytesToLswMswWords(
- uint32_t *out32Le,
- const uint8_t *in8Le,
- size_t sizeInBytes);
-
-
-/**
- * The function compares value of byte vector to null.
- *
- * @author reuvenl (6/20/2016)
- *
- * @param vect - a pointer to bytes vector.
- * @param sizeBytes - size of the vector.
- *
- * @return uint32_t - if vector's value iz zero, then returns 1, else - 0;
- */
-uint32_t CRYS_COMMON_CheckIsVectorZero(uint8_t *vect, uint32_t sizeBytes);
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_common_error.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_common_error.h
deleted file mode 100644
index c8e455c..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_common_error.h
+++ /dev/null
@@ -1,95 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
- #ifndef CRYS_COMMON_ERROR_H
-#define CRYS_COMMON_ERROR_H
-
-#include "crys_error.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-
-/************************ Defines ******************************/
-
-/* CRYS COMMON module errors. Base address - 0x00F00D00 */
-
-#define CRYS_COMMON_INIT_HW_SEM_CREATION_FAILURE (CRYS_COMMON_MODULE_ERROR_BASE + 0x0UL)
-#define CRYS_COMMON_DATA_IN_POINTER_INVALID_ERROR (CRYS_COMMON_MODULE_ERROR_BASE + 0x4UL)
-#define CRYS_COMMON_DATA_SIZE_ILLEGAL (CRYS_COMMON_MODULE_ERROR_BASE + 0x5UL)
-#define CRYS_COMMON_DATA_OUT_DATA_IN_OVERLAP_ERROR (CRYS_COMMON_MODULE_ERROR_BASE + 0x6UL)
-#define CRYS_COMMON_DATA_OUT_POINTER_INVALID_ERROR (CRYS_COMMON_MODULE_ERROR_BASE + 0x7UL)
-#define CRYS_COMMON_OUTPUT_BUFF_SIZE_ILLEGAL (CRYS_COMMON_MODULE_ERROR_BASE + 0x9UL)
-
-#define CRYS_COMMON_TST_UTIL_CHUNK_SIZE_SMALL_ERROR (CRYS_COMMON_MODULE_ERROR_BASE + 0x10UL)
-#define CRYS_COMMON_ERROR_IN_SAVING_LLI_DATA_ERROR (CRYS_COMMON_MODULE_ERROR_BASE + 0x11UL)
-
-
-#define CRYS_COMMON_TST_UTIL_LLI_ENTRY_SIZE_TOO_SMALL_ERROR (CRYS_COMMON_MODULE_ERROR_BASE + 0x12UL)
-#define CRYS_COMMON_TST_CSI_DATA_SIZE_EXCEED_ERROR (CRYS_COMMON_MODULE_ERROR_BASE + 0x13UL)
-#define CRYS_COMMON_TST_CSI_MODULE_ID_OUT_OF_RANGE (CRYS_COMMON_MODULE_ERROR_BASE + 0x14UL)
-#define CRYS_COMMON_TST_CSI_MEMORY_MAPPING_ERROR (CRYS_COMMON_MODULE_ERROR_BASE + 0x15UL)
-
-#define CRYS_COMMON_TERM_HW_SEM_DELETE_FAILURE (CRYS_COMMON_MODULE_ERROR_BASE + 0x16UL)
-
-#define CRYS_COMMON_TST_UTIL_NOT_INTEGER_CHAR_ERROR (CRYS_COMMON_MODULE_ERROR_BASE + 0x17UL)
-#define CRYS_COMMON_TST_UTIL_BUFFER_IS_SMALL_ERROR (CRYS_COMMON_MODULE_ERROR_BASE + 0x18UL)
-#define CRYS_COMMON_POINTER_NOT_ALIGNED_ERROR (CRYS_COMMON_MODULE_ERROR_BASE + 0x19UL)
-
-
-/************************ Enums ********************************/
-
-
-/************************ Typedefs ****************************/
-
-
-/************************ Structs ******************************/
-
-
-/************************ Public Variables **********************/
-
-
-/************************ Public Functions **********************/
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_dh.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_dh.h
deleted file mode 100644
index d612658..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_dh.h
+++ /dev/null
@@ -1,446 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-
-#ifndef _CRYS_DH_H
-#define _CRYS_DH_H
-
-#include "crys_rsa_types.h"
-#include "crys_kdf.h"
-#include "crys_rnd.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-
-/*!
-@file
-@brief This module defines the API that supports Diffie-Hellman key exchange, as defined in [PKCS3] and in [X9.42] (key lengths 1024 and 2048 bits).
-@defgroup crys_dh CryptoCell DH APIs
-@{
-@ingroup cryptocell_api
-*/
-
-
-/************************ Defines ******************************/
-/*! Defintion for DH public key.*/
-#define CRYS_DHPubKey_t CRYSRSAPubKey_t
-
-/*! Maximal valid key size in bits.*/
-#define CRYS_DH_MAX_VALID_KEY_SIZE_VALUE_IN_BITS CRYS_RSA_MAX_VALID_KEY_SIZE_VALUE_IN_BITS /*!< \internal RL restrict to 2048 */
-/*! Minimal valid key size in bits.*/
-#define CRYS_DH_MIN_VALID_KEY_SIZE_VALUE_IN_BITS 1024 /*!< Size limitation according to ANSI standard */
-/*! Maximal modulus size in bytes.*/
-#define CRYS_DH_MAX_MOD_SIZE_IN_BYTES (CRYS_DH_MAX_VALID_KEY_SIZE_VALUE_IN_BITS / SASI_BITS_IN_BYTE)
-/*! Maximal modulus size in words.*/
-#define CRYS_DH_MAX_MOD_SIZE_IN_WORDS (CRYS_DH_MAX_MOD_SIZE_IN_BYTES/sizeof(uint32_t))
-
-/*! Modulus buffer size in words.*/
-#define CRYS_DH_MAX_MOD_BUFFER_SIZE_IN_WORDS (CRYS_DH_MAX_MOD_SIZE_IN_WORDS + 2)
-/*! Maximal domain generation size in bits.*/
-#define CRYS_DH_DOMAIN_GENERATION_MAX_SIZE_BITS CRYS_RSA_MAX_KEY_GENERATION_SIZE_BITS /*!< \internal RL restrict to 2048 */
-
-/*! Defintion for DH primitives data.*/
-#define CRYS_DHPrimeData_t CRYS_RSAPrimeData_t
-/*! Defintion for DH public key.*/
-#define CRYS_DHUserPubKey_t CRYS_RSAUserPubKey_t
-/*! Defintion for DH other info.*/
-#define CRYS_DH_OtherInfo_t CRYS_KDF_OtherInfo_t
-
-/*! Keying data size is in bytes*/
-#define CRYS_DH_MAX_SIZE_OF_KEYING_DATA CRYS_KDF_MAX_SIZE_OF_KEYING_DATA
-
-/************************ Enums ********************************/
-
-/*! DH operations mode */
-typedef enum
-{
- /*! PKCS3 operation mode. */
- CRYS_DH_PKCS3_mode = 0,
- /*! ANSI X942 operation mode. */
- CRYS_DH_ANSI_X942_mode = 1,
- /*! Total number of operation modes. */
- CRYS_DH_NumOfModes,
-
- /*! Reserved. */
- CRYS_DH_OpModeLast = 0x7FFFFFFF,
-
-}CRYS_DH_OpMode_t;
-
-/*! HASH operation modes */
-typedef enum
-{
- /*! SHA1 operation mode. */
- CRYS_DH_HASH_SHA1_mode = CRYS_HASH_SHA1_mode,
- /*! SHA224 operation mode. */
- CRYS_DH_HASH_SHA224_mode = CRYS_HASH_SHA224_mode,
- /*! SHA256 operation mode. */
- CRYS_DH_HASH_SHA256_mode = CRYS_HASH_SHA256_mode,
- /*! SHA384 operation mode. */
- CRYS_DH_HASH_SHA384_mode = CRYS_HASH_SHA384_mode,
- /*! SHA512 operation mode. */
- CRYS_DH_HASH_SHA512_mode = CRYS_HASH_SHA512_mode,
- /*! MD5 operation mode (not used in DH). */
- CRYS_DH_HASH_MD5_mode = CRYS_HASH_MD5_mode, /*!< \internal not used in DH */
- /*! Total number of HASH modes. */
- CRYS_DH_HASH_NumOfModes = CRYS_HASH_MD5_mode,
- /*! Reserved. */
- CRYS_DH_HASH_OperationModeLast = 0x7FFFFFFF,
-
-}CRYS_DH_HASH_OpMode_t;
-
-/*! Key derivation modes. */
-typedef enum
-{
- /*! ASN1 derivation mode.*/
- CRYS_DH_ASN1_Der_mode = CRYS_KDF_ASN1_DerivMode,
- /*! Concatination derivation mode.*/
- CRYS_DH_Concat_Der_mode = CRYS_KDF_ConcatDerivMode,
- /*! X963 derivation mode.*/
- CRYS_DH_X963_DerMode = CRYS_KDF_ConcatDerivMode,
- /*! Reserved. */
- CRYS_DH_DerivationFunc_ModeLast= 0x7FFFFFFF,
-
-}CRYS_DH_DerivationFunc_Mode;
-
-
-/************************ Typedefs *************************************/
-/*! Temporary buffer structure for internal usage.*/
-typedef struct
-{
- /*! Temporary primitives data */
- CRYS_DHPrimeData_t PrimeData;
- /*! Public key. */
- CRYS_DHPubKey_t PubKey;
- /*! Temporary buffer for internal usage. */
- uint32_t TempBuff[CRYS_DH_MAX_MOD_BUFFER_SIZE_IN_WORDS];
-} CRYS_DH_ExpTemp_t;
-
-/*! Temporary buffer structure for internal usage. */
-typedef struct
-{
- /*! Temporary primitives data */
- CRYS_DHPrimeData_t PrimeData;
- /*! User's public key. */
- CRYS_DHUserPubKey_t UserPubKey;
- /*! Temporary buffer for internal usage. */
- uint32_t TempBuff[CRYS_DH_MAX_MOD_BUFFER_SIZE_IN_WORDS];
-} CRYS_DH_Temp_t;
-
-/*! Temporary buffer structure for internal usage. */
-typedef struct
-{
- /*! Temporary primitives data */
- CRYS_DHPrimeData_t PrimeData;
- /*! User's public key. */
- CRYS_DHUserPubKey_t UserPubKey;
- /*! Temporary buffer for internal usage. */
- uint32_t TempBuff[2*CRYS_DH_MAX_MOD_BUFFER_SIZE_IN_WORDS];
-} CRYS_DH_HybrTemp_t;
-
-/*! Defintion of buffer used for FIPS Known Answer Tests. */
-typedef struct
-{
- /*! Public key. */
- CRYS_DHUserPubKey_t pubKey;
- /*! Temporary primitives data */
- CRYS_DHPrimeData_t primeData;
- /*! Buffer for the secret value.*/
- uint8_t secretBuff[CRYS_DH_MIN_VALID_KEY_SIZE_VALUE_IN_BITS/SASI_BITS_IN_BYTE]; // KAT tests uses 1024 bit key
-} CRYS_DH_FipsKat_t;
-
-
-/************************ Structs **************************************/
-
-/************************ Public Variables ******************************/
-
-/************************ Public Functions ******************************/
-
-/*******************************************************************************************/
-
-/*!
-@brief This function has two purposes:
-<ol><li> Randomly generate the client private key according to the choosen version [PKCS3] or [ANSI X9.42].</li>
-<li> Computes the client public key as follows: ClientPub = Generator^Prv mod Prime, where '^' is the symbol of exponentiation.</li></ol>
-This function should not be called directly. Instead, use the macros ::CRYS_DH_PKCS3_GeneratePubPrv and ::CRYS_DH_ANSI_X942_GeneratePubPrv.
-\note
-All buffer parameters should be in Big-Endian form.
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_dh_error.h, crys_rnd_error.h or crys_rsa_error.h.
- */
-CIMPORT_C CRYSError_t _DX_DH_GeneratePubPrv(
- void *rndState_ptr, /*!< [in/out] Pointer to the RND state structure. */
- SaSiRndGenerateVectWorkFunc_t rndGenerateVectFunc, /*!< [in] Pointer to the random vector generation function. */
- uint8_t *Generator_ptr, /*!< [in] Pointer to the Generator octet string. */
- uint16_t GeneratorSize, /*!< [in] The size of the Generator string (in bytes). */
- uint8_t *Prime_ptr, /*!< [in] Pointer to the Prime octet string P (used as modulus in the algorithm). */
- uint16_t PrimeSize, /*!< [in] The size of the Prime string in bytes. */
- uint16_t L, /*!< [in] Exact size in bits of the Prime to be generated (relevant only for [PKCS3]):
- <ul><li> If L!=0, force the private key to be [2^(L-1) ? Prv < 2^L], where '^'
- indicates exponentiation.</li>
- <li> If L = 0 then [0 < Prv < P-1].</li></ul> */
- uint8_t *Q_ptr, /*!< [in] Relevant only for [ANSI X9.42] - Pointer to the Q octet string in the range:
- 1 <= Prv <= Q-1 or 1 < Prv < Q-1. */
- uint16_t QSize, /*!< [in] Relevant only for [ANSI X9.42] - Size of the Q string (in bytes). */
- CRYS_DH_OpMode_t DH_mode, /*!< [in] An enumerator declaring whether this is [PKCS3] or [ANSI X9.42] mode. */
- CRYS_DHUserPubKey_t *tmpPubKey_ptr, /*!< [in] Pointer to a temporary buffer for public key structure. Used for the
- exponentiation function. */
- CRYS_DHPrimeData_t *tmpPrimeData_ptr, /*!< [in] Pointer to a structure holding internal temporary buffers. */
- uint8_t *ClientPrvKey_ptr, /*!< [out] Pointer to the Private key Prv. This buffer should be at least the following
- size (in bytes):
- <ul><li> If L is provided: (L+7)/8.</li>
- <li> If L is NULL: \p PrimeSize. </li></ul> */
- uint16_t *ClientPrvKeySize_ptr, /*!< [in/out] Pointer to the Private key size:
- <ul><li> Input - size of the given buffer.</li>
- <li> Output - actual size of the generated private key.</li></ul> */
- uint8_t *ClientPub1_ptr, /*!< [out] Pointer to the Public key. This buffer should be at least \p PrimeSize bytes. */
- uint16_t *ClientPubSize_ptr /*!< [in/out] Pointer to the Public key size:
- <ul><li> Input - size of the given buffer.</li>
- <li> Output - actual size of the generated public key.</li></ul> */
-);
-
-
-/* macro for calling the GeneratePubPrv function on PKCS#3 mode: Q is irrelevant */
-/*--------------------------------------------------------------------------------*/
-/*!
-This macro is used to generate the public and private DH keys according to [PKCS3]. For a description of the parameters see ::_DX_DH_GeneratePubPrv.
-*/
-#define CRYS_DH_PKCS3_GeneratePubPrv(rndState_ptr, rndGenerateVectFunc, Generator_ptr,GeneratorSize,\
- Prime_ptr,PrimeSize,\
- L,\
- tmpPubKey_ptr,tmpPrimeData_ptr,\
- ClientPrvKey_ptr,ClientPrvKeySize_ptr,\
- ClientPub_ptr,ClientPubSize_ptr)\
- _DX_DH_GeneratePubPrv(rndState_ptr, rndGenerateVectFunc, (Generator_ptr),(GeneratorSize),\
- (Prime_ptr),(PrimeSize),\
- (L),\
- (uint8_t *)NULL,(uint16_t)0,\
- CRYS_DH_PKCS3_mode,\
- (tmpPubKey_ptr),(tmpPrimeData_ptr),\
- (ClientPrvKey_ptr),(ClientPrvKeySize_ptr),\
- (ClientPub_ptr),(ClientPubSize_ptr))
-
-/*!
-This macro is used to generate the public and private DH keys according to [ANSI X9.42]. For a description of the parameters see ::_DX_DH_GeneratePubPrv.
-*/
-#define CRYS_DH_ANSI_X942_GeneratePubPrv(rndState_ptr, rndGenerateVectFunc, Generator_ptr,GeneratorSize,Prime_ptr,PrimeSize,\
- Q_ptr,QSize,\
- tmpPubKey_ptr,tmpPrimeData_ptr,\
- ClientPrvKey_ptr,ClientPrvKeySize_ptr,\
- ClientPub_ptr,ClientPubSize_ptr)\
- _DX_DH_GeneratePubPrv(rndState_ptr, rndGenerateVectFunc, (Generator_ptr),(GeneratorSize),\
- (Prime_ptr),(PrimeSize),\
- (uint16_t)0,\
- (Q_ptr),(QSize),\
- CRYS_DH_ANSI_X942_mode,\
- (tmpPubKey_ptr),(tmpPrimeData_ptr),\
- (ClientPrvKey_ptr),(ClientPrvKeySize_ptr),\
- (ClientPub_ptr),(ClientPubSize_ptr))
-
-
-/*******************************************************************************************/
-/*!
-@brief This function computes the shared secret key (value) accordng to [ANSI X9.42], 7.5.1:
- SecretKey = ServerPubKey ^ ClientPrvKey mod Prime.
-\note <ul id="noteb"><li> All buffer parameters should be in Big-Endian form.</li>
-<li>The user must obtain assurance of validity of the public key, using one of methods,
-described in [ANSI X9.42] paragraph 7.4.</li>
-<li>The actual size of the private key (in bits) must be not less than 2 and not greater than the actual
-size of the Prime (modulus in bits).</li></ul>
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined in crys_dh_error.h or crys_rsa_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_DH_GetSecretKey(
- uint8_t *ClientPrvKey_ptr, /*!< [in] Pointer to the Private key octet string Prv < Prime. */
- uint16_t ClientPrvKeySize, /*!< [in] The Private key Size (in bytes). */
- uint8_t *ServerPubKey_ptr, /*!< [in] Pointer to the Server public key octet string. */
- uint16_t ServerPubKeySize, /*!< [in] The Server Public key Size (in bytes). */
- uint8_t *Prime_ptr, /*!< [in] Pointer to the Prime octet string. */
- uint16_t PrimeSize, /*!< [in] The size of the Prime string. */
- CRYS_DHUserPubKey_t *tmpPubKey_ptr, /*!< [in] Pointer to the public key structure. Used for the exponentiation
- operation function. Need not be initialized. */
- CRYS_DHPrimeData_t *tmpPrimeData_ptr, /*!< [in] Pointer to a structure containing internal temp buffers. */
- uint8_t *SecretKey_ptr, /*!< [out] Pointer to the secret key octet string. This buffer should be at
- least PrimeSize bytes. */
- uint16_t *SecretKeySize_ptr /*!< [in/out] Pointer to the secret key Buffer Size. This buffer should be at
- least of PrimeSize bytes:
- <ul><li> Input - size of the given buffer.</li>
- <li> Output - actual size. </li></ul>*/
-);
-
-
-/******************************************************************************************/
-/*!
-@brief This function extracts the shared secret keying data from the shared secret value. It should be called by using
-macros ::CRYS_DH_X942_GetSecretDataAsn1 and ::CRYS_DH_X942_GetSecretDataConcat.
-
-\note
-<ul id="noteb"><li> The "other info" argument and its AlgorithmID entry are mandatory only for ASN1 key derivation, and optional for
-the other derivation modes. </li>
-<li>If used, all entries of the structure should be initialized with relevant data and size, prior to calling this function
-(entry size of empty fields must be set to 0).</li>
-<li>All buffers arguments are represented in Big-Endian form.</li></ul>
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined in crys_dh_error.h, crys_rsa_error.h, crys_kdf_error.h or crys_hash_error.h.
-*/
- CIMPORT_C CRYSError_t CRYS_DH_X942_GetSecretData(
- uint8_t *ClientPrvKey_ptr, /*!< [in] Pointer to the Private key octet string. */
- uint16_t ClientPrvKeySize, /*!< [in] The Private key size (in bytes). */
- uint8_t *ServerPubKey_ptr, /*!< [in] Pointer to the Server public key octet string. */
- uint16_t ServerPubKeySize, /*!< [in] The Server Public key size (in bytes). */
- uint8_t *Prime_ptr, /*!< [in] Pointer to the Prime octet string. */
- uint16_t PrimeSize, /*!< [in] The size of the Prime string. */
- CRYS_DH_OtherInfo_t *otherInfo_ptr, /*!< [in] Pointer to structure containing other data, shared by two entities
- sharing the secret keying data.
- The Maximal size of each data entry of "other info" is limited - see crys_kdf.h
- for the defined value. */
- CRYS_DH_HASH_OpMode_t hashMode, /*!< [in] One of the supported SHA-x HASH modes. The supported modes are according to the supported
- HASH modes for the product (and MD5 is not supported). */
- CRYS_DH_DerivationFunc_Mode DerivFunc_mode, /*!< [in] The enumerator ID of key derivation function mode. ASN1 or Concatenation
- modes are supported. */
- CRYS_DH_Temp_t *tmpBuff_ptr, /*!< [in] A pointer to the DH temp buffer structure. Not initialized. */
- uint8_t *SecretKeyingData_ptr, /*!< [out] Pointer to the secret key octet string. This buffer should be at least
- PrimeSize bytes. */
- uint16_t SecretKeyingDataSize /*!< [in] The required Secret Keying data size (in bytes). Must be larger than 0,
- and smaller than the maximal - CRYS_DH_MAX_SIZE_OF_KEYING_DATA. */
-);
-
-/****************************************************************/
-/*!
-This macro implements the DH [ANSI X9.42] standard. It derives a secret key using the Derivation function based on ASN.1. For a
-description of the parameters see ::CRYS_DH_X942_GetSecretData.*/
-#define CRYS_DH_X942_GetSecretDataAsn1(ClientPrvKey_ptr,ClientPrvKeySize,ServerPubKey_ptr,ServerPubKeySize,Prime_ptr,PrimeSize,otherInfo_ptr,hashMode,tmpBuff_ptr,SecretKeyingData_ptr,SecretKeyingDataSize)\
- CRYS_DH_X942_GetSecretData((ClientPrvKey_ptr),(ClientPrvKeySize),(ServerPubKey_ptr),(ServerPubKeySize),(Prime_ptr),(PrimeSize),(otherInfo_ptr),(hashMode),(CRYS_DH_ASN1_Der_mode),(tmpBuff_ptr),(SecretKeyingData_ptr),(SecretKeyingDataSize))
-/*!
-This macro implements the DH [ANSI X9.42] standard. It derives a secret key using the Derivation function based on concatenation of HASHed data.
-For a description of the parameters see ::CRYS_DH_X942_GetSecretData.*/
-#define CRYS_DH_X942_GetSecretDataConcat(ClientPrvKey_ptr,ClientPrvKeySize,ServerPubKey_ptr,ServerPubKeySize,Prime_ptr,PrimeSize,otherInfo_ptr,hashMode,tmpBuff_ptr,SecretKeyingData_ptr,SecretKeyingDataSize)\
- CRYS_DH_X942_GetSecretData((ClientPrvKey_ptr),(ClientPrvKeySize),(ServerPubKey_ptr),(ServerPubKeySize),(Prime_ptr),(PrimeSize),(otherInfo_ptr),(hashMode),(CRYS_DH_Concat_Der_mode),(tmpBuff_ptr),(SecretKeyingData_ptr),(SecretKeyingDataSize))
-
-
-/****************************************************************/
-/*!
-@brief The function computes shared secret data using two pairs of public and private keys:
-
-<ul><li> SecretKey1 = ServerPubKey1^ClientPrvKey1 mod Prime. </li>
-<li> SecretKey2 = ServerPubKey2^ClientPrvKey2 mod Prime. </li></ul>
-It uses the Derivation function to derive secret keying data from the two secret keys (values).
-This function may be called directly, or by using macros ::CRYS_DH_X942_HybridGetSecretDataAsn1 and ::CRYS_DH_X942_HybridGetSecretDataConcat
-described above.
-
-\note
-<ul id="noteb"><li> The "other info" argument and its AlgorithmID entry are mandatory only for ASN1 key derivation, and optional for the other derivation modes.</li>
-If used, all entries of the structure should be initialized with relevant data and size, prior to calling this function
-(entry size of empty fields must be set to 0).
-<li> All buffers arguments are represented in Big-Endian form. </li></ul>
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined in crys_dh_error.h, crys_rsa_error.h or crys_hash_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_DH_X942_HybridGetSecretData(
- uint8_t *ClientPrvKey_ptr1, /*!< [in] Pointer to the First Private key octet string number. */
- uint16_t ClientPrvKeySize1, /*!< [in] The First Private key Size (in bytes). */
- uint8_t *ClientPrvKey_ptr2, /*!< [in] Pointer to the Second Private key octet string. */
- uint16_t ClientPrvKeySize2, /*!< [in] The Second Private key Size (in bytes). */
- uint8_t *ServerPubKey_ptr1, /*!< [in] Pointer to the First Server public key octet string. */
- uint16_t ServerPubKeySize1, /*!< [in] The First Server Public key Size (in bytes). */
- uint8_t *ServerPubKey_ptr2, /*!< [in] Pointer to the Second Server public key octet string. */
- uint16_t ServerPubKeySize2, /*!< [in] The Second Server Public key Size (in bytes). */
- uint8_t *Prime_ptr, /*!< [in] Pointer to the Prime octet string. */
- uint16_t PrimeSize, /*!< [in] The size of the Prime string. */
- CRYS_DH_OtherInfo_t *otherInfo_ptr, /*!< [in] Pointer to structure containing optional other data, shared by two entities
- sharing the secret keying data. */
- CRYS_DH_HASH_OpMode_t hashMode, /*!< [in] One of the supported SHA-x HASH modes. The supported modes are according to the supported
- HASH modes for the product (and MD5 is not supported). */
- CRYS_DH_DerivationFunc_Mode DerivFunc_mode, /*!< [in] The type of function to use to derive the secret key to the key data.
- ASN.1 or Concatenation modes are supported. */
- CRYS_DH_HybrTemp_t *tmpDhHybr_ptr, /*!< [in] Pointer to a CRYS_DH_Temp_t structure that contains temp buffers for
- internal operations. */
- uint8_t *SecretKeyingData_ptr, /*!< [out] Pointer to the secret key octet string. This buffer should be at least
- of size PrimeSize bytes. */
- uint16_t SecretKeyingDataSize /*!< [in] The required Secret Keying data size (in bytes). Must be larger than 0,
- and smaller than CRYS_DH_MAX_SIZE_OF_KEYING_DATA. */
-);
-
-
-/****************************************************************/
-/*!
-This macro implements the DH [X9.42] standard deriving a hybrid secret key from two public-private pair of keys using the Derivation function based on ASN.1.
-For a description of the parameters see ::CRYS_DH_X942_HybridGetSecretData.*/
-#define CRYS_DH_X942_HybridGetSecretDataAsn1(ClientPrvKey_ptr1,ClientPrvKeySize1,ClientPrvKey_ptr2,ClientPrvKeySize2,ServerPubKey_ptr1,ServerPubKeySize1,ServerPubKey_ptr2,ServerPubKeySize2,Prime_ptr,PrimeSize,otherInfo_ptr,hashFunc,tmpDhHybr_ptr,SecretKeyingData_ptr,SecretKeyingDataSize)\
- CRYS_DH_X942_HybridGetSecretData((ClientPrvKey_ptr1),(ClientPrvKeySize1),(ClientPrvKey_ptr2),(ClientPrvKeySize2),(ServerPubKey_ptr1),(ServerPubKeySize1),(ServerPubKey_ptr2),(ServerPubKeySize2),(Prime_ptr),(PrimeSize),(otherInfo_ptr),(hashFunc),CRYS_DH_ASN1_Der_mode,(tmpDhHybr_ptr),(SecretKeyingData_ptr),(SecretKeyingDataSize))
-
-/*!
-This macro implements the DH [X9.42] standard, deriving a hybrid secret key from two pairs of public-private keys, using the Derivation
-function based on concatenation using SHA-x HASH. For a description of the parameters see ::CRYS_DH_X942_HybridGetSecretData.
-*/
-#define CRYS_DH_X942_HybridGetSecretDataConcat(ClientPrvKey_ptr1,ClientPrvKeySize1,ClientPrvKey_ptr2,ClientPrvKeySize2,ServerPubKey_ptr1,ServerPubKeySize1,ServerPubKey_ptr2,ServerPubKeySize2,Prime_ptr,PrimeSize,otherInfo_ptr,hashFunc,tmpDhHybr_ptr,SecretKeyingData_ptr,SecretKeyingDataSize)\
- CRYS_DH_X942_HybridGetSecretData((ClientPrvKey_ptr1),(ClientPrvKeySize1),(ClientPrvKey_ptr2),(ClientPrvKeySize2),(ServerPubKey_ptr1),(ServerPubKeySize1),(ServerPubKey_ptr2),(ServerPubKeySize2),(Prime_ptr),(PrimeSize),(otherInfo_ptr),(hashFunc),CRYS_DH_Concat_Der_mode,(tmpDhHybr_ptr),(SecretKeyingData_ptr),(SecretKeyingDataSize))
-
-
-/******************************************************************************************/
-/*!
-@brief The function checks the obtained DH public key according to its domain parameters [ANSI X9.42-2001]
-
-\note
-Assuming: The DH domain parameters are valid.
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined in crys_dh_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_DH_CheckPubKey(
- uint8_t *modP_ptr, /*!< [in] The pointer to the modulus (prime) P. */
- uint32_t modPsizeBytes, /*!< [in] The modulus size in bytes. */
- uint8_t *orderQ_ptr, /*!< [in] The pointer to the prime order Q of generator. */
- uint32_t orderQsizeBytes, /*!< [in] The size of order of generator in bytes. */
- uint8_t *pubKey_ptr, /*!< [in] The pointer to the public key to be validated. */
- uint32_t pubKeySizeBytes, /*!< [in] The public key size in bytes. */
- CRYS_DH_Temp_t *tempBuff_ptr /*!< [in] The temp buffer for internal calculations. */
-);
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_dh_error.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_dh_error.h
deleted file mode 100644
index 15258a2..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_dh_error.h
+++ /dev/null
@@ -1,158 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-#ifndef CRYS_DH_ERROR_H
-#define CRYS_DH_ERROR_H
-
-
-#include "crys_error.h"
-
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*!
-@file
-@brief This file contains error codes definitions for CRYS DH module.
-@defgroup crys_dh_error CryptoCell DH specific errors
-@{
-@ingroup crys_dh
-*/
-/************************ Defines ******************************/
-/* DH module on the CRYS layer base address - 0x00F00500 */
-/*! The CRYS DH module errors */
-/*! Illegal input pointer.*/
-#define CRYS_DH_INVALID_ARGUMENT_POINTER_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x0UL)
-/*! Illegal input size.*/
-#define CRYS_DH_INVALID_ARGUMENT_SIZE_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x1UL)
-/*! Illegal operation mode.*/
-#define CRYS_DH_INVALID_ARGUMENT_OPERATION_MODE_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x2UL)
-/*! Illegal hash mode.*/
-#define CRYS_DH_INVALID_ARGUMENT_HASH_MODE_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x3UL)
-
-/*! Illegal secret key data size. */
-#define CRYS_DH_SECRET_KEYING_DATA_SIZE_ILLEGAL_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x4UL)
-/*! Illegal L input. */
-#define CRYS_DH_INVALID_L_ARGUMENT_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x5UL)
-/*! Prime is smaller than generator. */
-#define CRYS_DH_ARGUMENT_PRIME_SMALLER_THAN_GENERATOR_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x6UL)
-/*! Generator is smaller than zero. */
-#define CRYS_DH_ARGUMENT_GENERATOR_SMALLER_THAN_ZERO_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x7UL)
-/*! Illegal private key size. */
-#define CRYS_DH_ARGUMENT_PRV_SIZE_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x8UL)
-/*! Illegal buffer size. */
-#define CRYS_DH_ARGUMENT_BUFFER_SIZE_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x9UL)
-/*! Invalid shared secret value. */
-#define CRYS_DH_INVALID_SHARED_SECRET_VALUE_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0xAUL)
-/*! DH is not supported. */
-#define CRYS_DH_IS_NOT_SUPPORTED (CRYS_DH_MODULE_ERROR_BASE + 0xFUL)
-/*! Illegal X942 hybrid buffer size.*/
-#define CRYS_DH_X942_HYBRID_SIZE1_BUFFER_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x15UL)
-
-/*The requested derived secret key size is invalid*/
-/*! Illegal secret key size .*/
-#define CRYS_DH_SECRET_KEY_SIZE_NEEDED_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x16UL)
-/*! Illegal output secret key size .*/
-#define CRYS_DH_SECRET_KEY_SIZE_OUTPUT_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x17UL)
-/*! Illegal otherInfo size .*/
-#define CRYS_DH_OTHERINFO_SIZE_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x18UL)
-
-/* DH domain and key generation and checking errors */
-/*! Illegal modulus size. */
-#define CRYS_DH_INVALID_MODULUS_SIZE_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x20UL)
-/*! Illegal order size. */
-#define CRYS_DH_INVALID_ORDER_SIZE_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x21UL)
-/*! Illegal seed size. */
-#define CRYS_DH_INVALID_SEED_SIZE_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x22UL)
-/*! Illegal J factor pointer size. */
-#define CRYS_DH_INVALID_J_FACTOR_PTR_OR_SIZE_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x23UL)
-/*! Illegal generator pointer or size. */
-#define CRYS_DH_INVALID_GENERATOR_PTR_OR_SIZE_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x24UL)
-
-/*! Illegal domain primes. */
-#define CRYS_DH_CHECK_DOMAIN_PRIMES_NOT_VALID_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x25UL)
-/*! Illegal domain generator. */
-#define CRYS_DH_CHECK_DOMAIN_GENERATOR_NOT_VALID_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x26UL)
-/*! Illegal public key size. */
-#define CRYS_DH_INVALID_PUBLIC_KEY_SIZE_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x27UL)
-/*! Illegal public key. */
-#define CRYS_DH_CHECK_PUB_KEY_NOT_VALID_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x28UL)
-/*! Illegal generator size or pointer. */
-#define CRYS_DH_CHECK_GENERATOR_SIZE_OR_PTR_NOT_VALID_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x29UL)
-/*! Illegal seed size or pointer. */
-#define CRYS_DH_CHECK_SEED_SIZE_OR_PTR_NOT_VALID_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x2AUL)
-/*! Illegal generator. */
-#define CRYS_DH_CHECK_GENERATOR_NOT_VALID_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x2BUL)
-/*! Prime generation failed. */
-#define CRYS_DH_PRIME_P_GENERATION_FAILURE_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x2CUL)
-/*! Illegal public key. */
-#define CRYS_DH_INVALID_PUBLIC_KEY_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x2DUL)
-/*! Illegal seed. */
-#define CRYS_DH_PASSED_INVALID_SEED_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x2EUL)
-/*! Prime generation failed. */
-#define CRYS_DH_PRIME_Q_GENERATION_FAILURE_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x2FUL)
-/*! Internal PKI error */
-#define CRYS_DH_PKI_INTERNAL_ERROR (CRYS_DH_MODULE_ERROR_BASE + 0x30UL)
-
-
-
-/************************ Enums ********************************/
-
-
-/************************ Typedefs ****************************/
-
-
-/************************ Structs ******************************/
-
-
-/************************ Public Variables **********************/
-
-
-/************************ Public Functions **********************/
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_dh_kg.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_dh_kg.h
deleted file mode 100644
index 961d1a0..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_dh_kg.h
+++ /dev/null
@@ -1,203 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-
-#ifndef _CRYS_DH_KG_H
-#define _CRYS_DH_KG_H
-
-
-#include "crys_dh.h"
-
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*! @file
-@brief This module defines the API that supports Diffie-Hellman domain.
-@defgroup crys_dh_kg CryptoCell DH Key Generation APIs
-@{
-@ingroup crys_dh
-*/
-
-/************************ Defines ******************************/
-/*! Minimal size of DH seed in bytes. */
-#define CRYS_DH_SEED_MIN_SIZE_IN_BYTES CRYS_HASH_SHA1_DIGEST_SIZE_IN_BYTES
-/*! Minimal size of DH seed in bits. */
-#define CRYS_DH_SEED_MIN_SIZE_IN_BITS (CRYS_DH_SEED_MIN_SIZE_IN_BYTES * 8)
-
-/************************ Enums ********************************/
-
-
-/************************ Typedefs ****************************/
-
-/* temp buffers, used in different DH KG functions */
-
-/*! Temporary data buffer structure for domain parameters generation in DH. */
-typedef struct CRYS_DHKGData_t
-{
- /* The aligned input and output temp buffers */
- /*! Temporary buffer. */
- uint32_t TempBuff1[CRYS_DH_MAX_MOD_BUFFER_SIZE_IN_WORDS];
- /*! Temporary buffer. */
- uint32_t TempBuff2[CRYS_DH_MAX_MOD_BUFFER_SIZE_IN_WORDS];
- /*! Temporary buffer. */
- uint32_t TempBuff3[CRYS_DH_MAX_MOD_BUFFER_SIZE_IN_WORDS];
- /*! Temporary buffer. */
- uint32_t TempBuff4[CRYS_DH_MAX_MOD_BUFFER_SIZE_IN_WORDS];
- /*! Temporary buffer. */
- uint32_t TempBuff5[CRYS_DH_MAX_MOD_BUFFER_SIZE_IN_WORDS];
- /*! Temporary buffer. */
- uint32_t TempBuff6[CRYS_DH_MAX_MOD_BUFFER_SIZE_IN_WORDS];
- /*! Temporary buffer. */
- CRYS_DH_Temp_t ExpTemps;
-}CRYS_DHKGData_t;
-
-/*! Temporary buffer structure . */
-typedef struct CRYS_DHKG_CheckTemp_t
-{
- /*! Temporary buffer. */
- uint32_t CheckTempBuff[3*CRYS_DH_MAX_MOD_BUFFER_SIZE_IN_WORDS];
- /*! Temporary buffer. */
- CRYS_DHKGData_t DhKgBuff;
-}CRYS_DHKG_CheckTemp_t;
-
-/*! DH Domain generation values definitions */
-/*! Minimal modulus size for X942 - 1024.*/
-#define DH_X942_PRIME_MOD_MIN_VAL 1024
-/*! Maximal modulus size for X942 - 2048.*/
-#define DH_X942_PRIME_MOD_MAX_VAL 2048
-/*! PGeneration counter for X942 - 4096.*/
-#define DH_X942_PGEN_COUNTER_CONST 4096
-/*! HASH size in bits for X942 - 160.*/
-#define DH_X942_HASH_SIZE_BITS 160
-/*! Maximal allowed ratio between modulus and generator order sizes (by implementation) */
-#define DH_MAX_RATIO_MODULO_TO_ORDER 4
-
-/************************ Structs ******************************/
-
-/************************ Public Variables **********************/
-
-/************************ Public Functions **********************/
-
-
-/******************************************************************************************/
-/*!
-@brief This function generates DH domain parameters in Galois prime field according to standard [ANS X9.42].
-It receives the required sizes (in bits) of the modulus, the generator's order, and the seed, and then generates
-the prime modulus and the generator according to given sizes.
-If generateSeed argument is set to 1, the function generates and outputs the random seed. Otherwise (if set to 0),
-the seed has to be passed as an input argument. According to implementation the seed should be not greate, than (2^seedSizeBits - 2^32).
-The seed and some additional parameters, generated by the function (factorJ, pgenCounter), are used for checking
-that all domain parameters are generated according to the standard and not forged.
-\note All buffer parameters should be in Big-Endian form.
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_dh_error.h, crys_rnd_error.h or crys_hash_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_DH_CreateDomainParams(
- void *rndState_ptr, /*!< [in/out] Pointer to the RND state structure. */
- SaSiRndGenerateVectWorkFunc_t rndGenerateVectFunc, /*!< [in] Pointer to a random vector generation function. */
- uint32_t modPsizeBits, /*!< [in] Size of the modulus (Prime) in bits equal 256*n, where n >= 4. FIPS 186-4
- defines sizes 1024 and 2048 bit. */
- uint32_t orderQsizeBits, /*!< [in] Size of the Generator's order in bits. FIPS 186-4 defines orderQSizeBits = 160
- for modulus 1024 bit and 224 or 256 bit for modPSizeBits = 2048. We not recommend
- sizes > 256 and returns an error if orderQSizeBits > modPSizeBits/4 */
- uint32_t seedSizeBits, /*!< [in] Seed size in bits. Requirements: modPSizeBits >= seedSizeBits >= orderQSizeBits
- (the first is required by our implementation). */
- uint8_t *modP_ptr, /*!< [out] Pointer to the modulus (prime) buffer. The size of the buffer for output
- generated value must be no less than given modulus size. */
- uint8_t *orderQ_ptr, /*!< [out] Pointer to the order Q of generator. The size of the buffer for output generated
- value must be no less than the given order size. */
- uint8_t *generatorG_ptr, /*!< [out] Pointer to the generator of multiplicative subgroup in GF(P).
- If the user does not need this output, then both the pointer and the buffer size
- must be set to 0. */
- uint32_t *generGsizeBytes_ptr, /*!< [in/out] Pointer to the one word buffer for outputting the generator's size.
- The passed size (if needed) must be not less than modulus size and the function
- returns the actual size of the generator. */
- uint8_t *factorJ_ptr, /*!< [out] Pointer to the buffer for integer factor J. If NULL, the function does not output
- this parameter (in this case JsizeBytes_ptr also must be set to NULL, else the function
- returns an error). */
- uint32_t *JsizeBytes_ptr, /*!< [in/out] Pointer to the size of integer factor J. If NULL, the function does not output
- this parameter. */
- uint8_t *seedS_ptr, /*!< [in/out] Random seed used for prime generation. The size of the buffer must be
- at least the seed size. */
- int8_t generateSeed, /*!< [in] Flag, defining whether the seed should be generated randomly by the function
- (1) or is passed by the user (0). */
- uint32_t *pgenCounter_ptr, /*!< [out] Pointer to counter of tries to generate the primes. If NULL, the function does not
- output this parameter. */
- CRYS_DHKGData_t *DHKGbuff_ptr /*!< [out] The temp buffer of defined structure for internal calculations. */
-);
-
-
-/******************************************************************************************/
-/*!
-@brief This function receives DH domain parameters, seed and prime generation counter and then verifies
-that the domain was created according to the standard [ANS X9.42].
-According to implementation, the value of the user passed seed should be not
-greate, than (2^seedSizeBits - 2^32), otherwise an error is returned.
-\note All buffer parameters should be in Big-Endian form. For more detailed
-description of the parameters see ::CRYS_DH_CreateDomainParams.
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_dh_error.h, crys_rnd_error.h or crys_hash_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_DH_CheckDomainParams(
- void *rndState_ptr, /*!< [in/out] Pointer to the RND state. */
- SaSiRndGenerateVectWorkFunc_t rndGenerateVectFunc, /*!< [in/out] Pointer to the RND Generate vector function pointer. */
- uint8_t *modP_ptr, /*!< [in] Pointer to the modulus (Prime). */
- uint32_t modPsizeBytes, /*!< [in] Size of the modulus (Prime) in bytes. */
- uint8_t *orderQ_ptr, /*!< [in] Pointer to the order Q of generator. The size of the buffer for output
- generated value must be no less than the order size. */
- uint32_t orderQsizeBytes, /*!< [in] Size of the Generator's order in bytes. */
- uint8_t *generatorG_ptr, /*!< [in] Pointer to the generator of the multiplicative subgroup in GF(P). */
- uint32_t generatorSizeBytes, /*!< [in] Size of the generator in bytes. */
- uint8_t *seedS_ptr, /*!< [in] Random seed used for prime generation. */
- uint32_t seedSizeBits, /*!< [in] Seed size in bits. */
- uint32_t pgenCounter, /*!< [in] Counter of prime generation attempts. */
- CRYS_DHKG_CheckTemp_t *checkTempBuff_ptr /*!< [in] Temporary buffer for internal calculations. */
-
-);
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ec_edw_api.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ec_edw_api.h
deleted file mode 100644
index 47c7f08..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ec_edw_api.h
+++ /dev/null
@@ -1,201 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-#ifndef CRYS_EC_EDW_API_H
-#define CRYS_EC_EDW_API_H
-
-#include "ssi_pal_types.h"
-#include "crys_hash.h"
-#include "crys_rnd.h"
-#include "crys_pka_defs_hw.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*!
-@defgroup cryptocell_ec CryptoCell EC 25519 curve APIs
-@{
-@ingroup cryptocell_api
-@brief This group is the cryptocell EC 25519 curve root group
-@}
-
-@file
-@brief This file contains the CRYS APIs used for EC EDW (Edwards) ed25519 algorithms.
-@defgroup crys_ec_edw CryptoCell EC Edwards APIs
-@{
-@ingroup cryptocell_ec
-
-\note Algorithms of Montgomery and Edwards elliptic curves cryptography were developed by
- Daniel.J.Bernstein.
-*/
-
-/*! EC Edwards ed25519 modulus and order sizes in bits, words and bytes. */
-/*! EC Edwards modulus size in bits. */
-#define CRYS_ECEDW_MOD_SIZE_IN_BITS 255U /*!<\internal MOD - EC Edw modulus size*/
-/*! EC Edwards order size in bits. */
-#define CRYS_ECEDW_ORD_SIZE_IN_BITS 255U /*!<\internal ORD - EC Edw generator order size*/
-/*! EC Edwards nodulus size in words. */
-#define CRYS_ECEDW_MOD_SIZE_IN_32BIT_WORDS ((CRYS_ECEDW_MOD_SIZE_IN_BITS + SASI_BITS_IN_32BIT_WORD - 1) / SASI_BITS_IN_32BIT_WORD)
-/*! EC Edwards modulus size in bytes. */
-#define CRYS_ECEDW_MOD_SIZE_IN_BYTES (CRYS_ECEDW_MOD_SIZE_IN_32BIT_WORDS * SASI_32BIT_WORD_SIZE)
-/*! EC Edwards order size in words. */
-#define CRYS_ECEDW_ORD_SIZE_IN_32BIT_WORDS ((CRYS_ECEDW_ORD_SIZE_IN_BITS + SASI_BITS_IN_32BIT_WORD - 1) / SASI_BITS_IN_32BIT_WORD)
-/*! EC Edwards order size in bytes. */
-#define CRYS_ECEDW_ORD_SIZE_IN_BYTES (CRYS_ECEDW_ORD_SIZE_IN_32BIT_WORDS * SASI_32BIT_WORD_SIZE)
-
-/*! Constant sizes of special EC_MONT buffers and arrays */
-/*! EC Edwards seed size in bytes. */
-#define CRYS_ECEDW_SEED_BYTES CRYS_ECEDW_MOD_SIZE_IN_BYTES
-/*! EC Edwards secret key size in bytes. */
-#define CRYS_ECEDW_SECRET_KEY_BYTES (2 * CRYS_ECEDW_MOD_SIZE_IN_BYTES)
-/*! EC Edwards signatue size in bytes. */
-#define CRYS_ECEDW_SIGNATURE_BYTES (2 * CRYS_ECEDW_ORD_SIZE_IN_BYTES)
-/*! EC Edwards scalar size in bytes. */
-#define CRYS_ECEDW_SCALAR_BYTES CRYS_ECEDW_ORD_SIZE_IN_BYTES
-/*! EC Edwards scalar multiplication size in bytes. */
-#define CRYS_ECEDW_SCALARMULT_BYTES CRYS_ECEDW_MOD_SIZE_IN_BYTES
-
-/*! EC_EDW temp buffer size definition. */
-#define CRYS_ECEDW_TEMP_BUFF_SIZE_IN_32BIT_WORD (10*CRYS_EC_MONT_EDW_MODULUS_MAX_SIZE_IN_WORDS + (sizeof(CRYS_HASHUserContext_t)+SASI_32BIT_WORD_SIZE-1)/SASI_32BIT_WORD_SIZE)
-
-/*! EC_EDW temp buffer type definition. */
-typedef struct {
- /*! Internal buffer. */
- uint32_t buff[CRYS_ECEDW_TEMP_BUFF_SIZE_IN_32BIT_WORD];
-} CRYS_ECEDW_TempBuff_t;
-
-
-/******************************************************************************/
-/*!
-@brief The function creates EC Edwards signature on the message.
-\note Used detached form of signature, separated from the message.
- Implemented algorithm of Bernstein D. etc. sign ed25519.
-
-@return CRYS_OK on success,
-@return A non-zero value on failure as defined crys_ec_mont_edw_error.h or crys_hash_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_ECEDW_Sign (
- uint8_t *pSign, /*!< [out] Pointer to the detached signature. */
- size_t *pSignSize, /*!< [in/out] Pointer to the total size of the signature ;
- In - the buffer size, which (must be at least 2*EC order size);
- Out - the actual size of output data. */
- const uint8_t *pMsg, /*!< [in] Pointer to the message. */
- size_t msgSize, /*!< [in] Message size in bytes: must be less, than
- (CRYS_HASH_UPDATE_DATA_MAX_SIZE_IN_BYTES - 2*(EC_EDW modulus size)). */
- const uint8_t *pSignSecrKey, /*!< [in] Pointer to the signer secret key (seed || pulKey) */
- size_t secrKeySize, /*!< [in] Size of signer secret key in bytes: (must be 2*EC order size). */
- CRYS_ECEDW_TempBuff_t *pTempBuff /*!< [in] Pointer to the temp buffer. */);
-
-
-
-/******************************************************************************/
-/*!
-@brief The function verifies the EC Edwards ed25519 signature on the message.
-\note The input signature is in detached form, i.e. separated from the message.
-
-@return CRYS_OK on success,
-@return A non-zero value on failure as defined crys_ec_mont_edw_error.h or crys_hash_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_ECEDW_Verify(
- const uint8_t *pSign, /*!< [in] Pointer to detached signature, i.e. the
- signature is separated from the message. */
- size_t signSize, /*!< [in] Size of the signature in bytes, it must be
- equal to two EC Order size in bytes. */
- const uint8_t *pSignPublKey, /*!< [in] Pointer to signer public key. */
- size_t publKeySize, /*!< [in] Size of the signer public key in bytes; must be
- equal to EC modulus size. */
- uint8_t *pMsg, /*!< [in] Pointer to the message. */
- size_t msgSize, /*!< [in] Pointer to the message size in bytes. Must be less than
- (CRYS_HASH_UPDATE_DATA_MAX_SIZE_IN_BYTES - 2*(EC_EDW modulus size)). */
- CRYS_ECEDW_TempBuff_t *pTempBuff /*!< [in] Pointer to the temp buffer, for internal use. */);
-
-
-/******************************************************************************/
-/*!
-@brief The function randomly generates Ec ed25519 private and public keys
- using given seed.
- The generation is performed using EC Edwards ed25519 algorithm.
-
-@return CRYS_OK on success,
-@return A non-zero value on failure as defined crys_ec_mont_edw_error.h or crys_hash_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_ECEDW_SeedKeyPair (
- const uint8_t *pSeed, /*!< [in] Pointer to the given seed. */
- size_t seedSize, /*!< [in] Size of the seed in bytes, must be equal the EC order size
- in bytes. */
- uint8_t *pSecrKey, /*!< [out] Pointer to the secret key, including the seed, concatenated
- with the public key. */
- size_t *pSecrKeySize, /*!< [in/out] Pointer to the size of the secret key buffer in bytes
- (must be at least 2*EC order size). */
- uint8_t *pPublKey, /*!< [out] Pointer to the public key. */
- size_t *pPublKeySize, /*!< [in/out] Pointer to the size of the public key in bytes.
- In - the size of buffer must be at least EC modulus size;
- Out - the actual size. */
- CRYS_ECEDW_TempBuff_t *pTempBuff /*!< [in] Pointer to the temp buffer, for internal use. */);
-
-/*******************************************************************/
-/*!
- @brief The function randomly generates the EC Edwards ed25519 private and
- public keys.
- The generation is performed using EC Edwards ed25519 algorithm.
-
-@return CRYS_OK on success,
-@return A non-zero value on failure as defined crys_ec_mont_edw_error.h, crys_hash_error.h or crys_rnd_error.
-*/
-CIMPORT_C CRYSError_t CRYS_ECEDW_KeyPair (
- uint8_t *pSecrKey, /*!< [out] Pointer to the secret key (including seed and public key). */
- size_t *pSecrKeySize, /*!< [in/out] Pointer to the size of the secret key in bytes,
- (must be at least 2*EC order size). */
- uint8_t *pPublKey, /*!< [out] Pointer to the public key. */
- size_t *pPublKeySize, /*!< [in/out] - Pointer to the size of the public key in bytes.
- In - the size of buffer must be at least EC modulus size;
- Out - the actual size. */
- void *pRndState, /*!< [in/out] Pointer to the RND state structure. */
- SaSiRndGenerateVectWorkFunc_t rndGenerateVectFunc, /*!< [in] Pointer to the random vector generation function. */
- CRYS_ECEDW_TempBuff_t *pTempBuff /*!< [in] Pointer to the temp buffer. */);
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
-
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ec_mont_api.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ec_mont_api.h
deleted file mode 100644
index f9d56ca..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ec_mont_api.h
+++ /dev/null
@@ -1,213 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-#ifndef CRYS_ECMONT_API_H
-#define CRYS_ECMONT_API_H
-
-#include "ssi_pal_types.h"
-#include "crys_rnd.h"
-#include "crys_pka_defs_hw.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*!
-@file
-@brief This file contains the CRYS APIs used for EC MONT (Montgomery Curve25519) algorithms.
-@defgroup crys_ec_mont CryptoCell EC Montgomery APIs
-@{
-@ingroup cryptocell_ec
-
-
-\note Implemented algorithms according to Montgomery elliptic curves cryptography,
- developed by Daniel J.Bernstein etc.
-*/
-
-/*! EC Montgomery curve25519 modulus size in bits, words and bytes */
-/*! EC Montgomery modulus size in bits. */
-#define CRYS_ECMONT_MOD_SIZE_IN_BITS 255U
-/*! EC Montgomery modulus size in words. */
-#define CRYS_ECMONT_MOD_SIZE_IN_32BIT_WORDS ((CRYS_ECMONT_MOD_SIZE_IN_BITS + SASI_BITS_IN_32BIT_WORD - 1) / SASI_BITS_IN_32BIT_WORD)
-/*! EC Montgomery modulus size in bytes. */
-#define CRYS_ECMONT_MOD_SIZE_IN_BYTES ((CRYS_ECMONT_MOD_SIZE_IN_BITS + SASI_BITS_IN_32BIT_WORD - 1) / sizeof(uint32_t))
-
-/*! Constant sizes of special EC_MONT buffers and arrays */
-/*! EC Montgomery scalar size in bytes. */
-#define CRYS_ECMONT_SCALARBYTES (CRYS_ECMONT_MOD_SIZE_IN_32BIT_WORDS * SASI_32BIT_WORD_SIZE)
-/*! EC Montgomery scalar multiplication size in bytes. */
-#define CRYS_ECMONT_SCALARMULTBYTES (CRYS_ECMONT_MOD_SIZE_IN_32BIT_WORDS * SASI_32BIT_WORD_SIZE)
-/*! EC Montgomery scalar seed size in bytes. */
-#define CRYS_ECMONT_SEEDBYTES (CRYS_ECMONT_MOD_SIZE_IN_32BIT_WORDS * SASI_32BIT_WORD_SIZE)
-
-/*! EC Montgomery domains ID-s enumerator. */
-typedef enum {
- CRYS_ECMONT_DOMAIN_CURVE_25519, /*!< EC Curve25519. */
- /*! EC Montgomery last domain. */
- CRYS_ECMONT_DOMAIN_OFF_MODE,
- /*! Reserved. */
- CRYS_ECMONT_DOMAIN_LAST = 0x7FFFFFFF
-}CRYS_ECMONT_DomainId_t;
-
-
-/*! EC_MONT scalar mult temp buffer type definition */
-typedef struct {
- /*! Internal temporary buffer. */
- uint32_t ecMontScalarMultTempBuff[CRYS_EC_MONT_TEMP_BUFF_SIZE_IN_32BIT_WORDS]; // set needed
-} CRYS_ECMONT_ScalrMultTempBuff_t;
-
-/*! EC_MONT temp buffer type definition */
-typedef struct {
- /* Don't change sequence order of the buffers */
- /*! Internal temporary buffer. */
- uint32_t ecMontScalar[CRYS_EC_MONT_EDW_MODULUS_MAX_SIZE_IN_WORDS];
- /*! Internal temporary buffer. */
- uint32_t ecMontResPoint[CRYS_EC_MONT_EDW_MODULUS_MAX_SIZE_IN_WORDS];
- /*! Internal temporary buffer. */
- uint32_t ecMontInPoint[CRYS_EC_MONT_EDW_MODULUS_MAX_SIZE_IN_WORDS];
- /*! Internal temporary buffer. */
- CRYS_ECMONT_ScalrMultTempBuff_t ecMontScalrMultTempBuff; // if needed
-} CRYS_ECMONT_TempBuff_t;
-
-
-/*********************************************************************/
-/*!
-@brief The function performs EC Montgomery (Curve25519) scalar multiplication:
- resPoint = scalar * point.
-
-@return CRYS_OK on success,
-@return A non-zero value on failure as defined crys_ec_mont_edw_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_ECMONT_Scalarmult(
- uint8_t *pResPoint, /*!< [out] Pointer to the public (secret) key. */
- size_t *pResPointSize, /*!< [in/out] Pointer to the size of the public key in bytes.
- In - the size of the buffer. must be at least EC modulus
- size (for curve25519 - 32 bytes).
- Out - the actual size. */
- const uint8_t *pScalar, /*!< [in] Pointer to the secret (private) key. */
- size_t scalarSize, /*!< [in] Pointer to the size of the secret key in bytes;
- must be equal to EC order size (for curve25519 - 32 bytes). */
- const uint8_t *pInPoint, /*!< [in] Pointer to the input point (compressed). */
- size_t inPointSize, /*!< [in] Size of the point - must be equal to CRYS_ECMONT_MOD_SIZE_IN_BYTES. */
- CRYS_ECMONT_TempBuff_t *pEcMontTempBuff /*!< [in] Pointer to temp buffer, for internal use. */);
-
-
-/*********************************************************************/
-/*!
-@brief The function performs EC Montgomery (Curve25519) scalar multiplication of base point:
- res = scalar * base_point.
-
- Note: all byte arrays have LE order of bytes, i.e. LS byte is on left most place.
-
-@return CRYS_OK on success,
-@return A non-zero value on failure as defined crys_ec_mont_edw_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_ECMONT_ScalarmultBase(
- uint8_t *pResPoint, /*!< [out] Pointer to the public (secret) key. */
- size_t *pResPointSize, /*!< [in/out] Pointer to the size of the public key in bytes.
- In - the size of buffer must be at least EC modulus size
- (for curve25519 - 32 bytes);
- Out - the actual size. */
- const uint8_t *pScalar, /*!< [in] Pointer to the secret (private) key. */
- size_t scalarSize, /*!< [in] Pointer to the size of the scalar in bytes -
- must be equal to EC order size (for curve25519 - 32 bytes). */
- CRYS_ECMONT_TempBuff_t *pEcMontTempBuff /*!< [in] Pointer to temp buffer, for internal use. */);
-
-
-/*******************************************************************/
-/*!
-@brief The function randomly generates private and public keys for Montgomery
- Curve25519.
-
-
-\note <ul id="noteb"><li> All byte arrays are in LE order of bytes, i.e. LS byte is on the left most place.</li>
- <li> LS and MS bits of the Secret key are set according to EC Montgomery scalar mult. algorithm:
- secrKey[0] &= 248; secrKey[31] &= 127; secrKey[31] |= 64;</li></ul>
-
-@return CRYS_OK on success,
-@return A non-zero value on failure as defined crys_ec_mont_edw_error.h or crys_rnd_error.h.
-
-*/
-CIMPORT_C CRYSError_t CRYS_ECMONT_KeyPair (
- uint8_t *pPublKey, /*!< [out] Pointer to the public key. */
- size_t *pPublKeySize, /*!< [in/out] Pointer to the size of the public key in bytes.
- In - the size of the buffer must be at least EC order size
- (for curve25519 - 32 bytes);
- Out - the actual size. */
- uint8_t *pSecrKey, /*!< [out] Pointer to the secret key, including. */
- size_t *pSecrKeySize, /*!< [in/out] Pointer to the size of buffer for the secret key in bytes -
- must be at least EC order size (for curve25519 - 32 bytes). */
- void *pRndState, /*!< [in/out] Pointer to the RND state structure. */
- SaSiRndGenerateVectWorkFunc_t rndGenerateVectFunc, /*!< [in] Pointer to the random vector generation function. */
- CRYS_ECMONT_TempBuff_t *pEcMontTempBuff /*!< [in] Pointer to the temp buffer, for internal use. */);
-
-
-/*******************************************************************/
-/*!
-@brief The function generates private and public keys for Montgomery algorithms.
-
- The generation performed using given seed.
-
-
-@return CRYS_OK on success,
-@return A non-zero value on failure as defined crys_ec_mont_edw_error.h or crys_hash_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_ECMONT_SeedKeyPair (
- uint8_t *pPublKey, /*!< [out] Pointer to the public (secret) key. */
- size_t *pPublKeySize, /*!< [in/out] Pointer to the size of the public key in bytes.
- In - the size of buffer must be at least EC order size
- (for curve25519 - 32 bytes);
- Out - the actual size. */
- uint8_t *pSecrKey, /*!< [out] Pointer to the secret (private) key. */
- size_t *pSecrKeySize, /*!< [in/out] Pointer to the size of the secret key in bytes
- In - the size of buffer must be at least EC order size
- (for curve25519 - 32 bytes);
- Out - the actual size. */
- const uint8_t *pSeed, /*!< [in] Pointer to the given seed - 32 bytes. */
- size_t seedSize, /*!< [in/] Size of the seed in bytes (must be equal to CRYS_ECMONT_SEEDBYTES). */
- CRYS_ECMONT_TempBuff_t *pEcMontTempBuff /*!< [in] Pointer to a temp buffer, for internal use. */);
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
-
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ec_mont_edw_error.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ec_mont_edw_error.h
deleted file mode 100644
index 2251b7d..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ec_mont_edw_error.h
+++ /dev/null
@@ -1,114 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef CRYS_EC_MONT_EDW_ERROR_H
-#define CRYS_EC_MONT_EDW_ERROR_H
-
-/*!
-@file
-@brief This module containes the definitions of the CRYS ECC-25519 errors.
-@defgroup crys_ecmontedw_error CryptoCell ECC-25519 errors
-@{
-@ingroup cryptocell_ec
-*/
-
-#include "crys_error.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-
-/************************ Defines ******************************/
-
-/**********************************************************************************************************
- * CRYS EC Montgomery-Edwards MODULE ERRORS base address - 0x00F02300 *
- **********************************************************************************************************/
-/*! Illegal input pointer */
-#define CRYS_ECEDW_INVALID_INPUT_POINTER_ERROR (CRYS_EC_MONT_EDW_MODULE_ERROR_BASE + 0x00UL)
-/*! Illegal input size */
-#define CRYS_ECEDW_INVALID_INPUT_SIZE_ERROR (CRYS_EC_MONT_EDW_MODULE_ERROR_BASE + 0x01UL)
-/*! Illegal scalar size */
-#define CRYS_ECEDW_INVALID_SCALAR_SIZE_ERROR (CRYS_EC_MONT_EDW_MODULE_ERROR_BASE + 0x02UL)
-/*! Illegal scalar data */
-#define CRYS_ECEDW_INVALID_SCALAR_DATA_ERROR (CRYS_EC_MONT_EDW_MODULE_ERROR_BASE + 0x03UL)
-/*! Invalid RND context pointer */
-#define CRYS_ECEDW_RND_CONTEXT_PTR_INVALID_ERROR (CRYS_EC_MONT_EDW_MODULE_ERROR_BASE + 0x04UL)
-/*! Invalid RND generate vector functions pointer */
-#define CRYS_ECEDW_RND_GEN_VECTOR_FUNC_ERROR (CRYS_EC_MONT_EDW_MODULE_ERROR_BASE + 0x05UL)
-/*! Signing or verification operation failed */
-#define CRYS_ECEDW_SIGN_VERIFY_FAILED_ERROR (CRYS_EC_MONT_EDW_MODULE_ERROR_BASE + 0x20UL)
-/*! Illegal input pointer */
-#define CRYS_ECMONT_INVALID_INPUT_POINTER_ERROR (CRYS_EC_MONT_EDW_MODULE_ERROR_BASE + 0x30UL)
-/*! Illegal input size */
-#define CRYS_ECMONT_INVALID_INPUT_SIZE_ERROR (CRYS_EC_MONT_EDW_MODULE_ERROR_BASE + 0x31UL)
-/*! Illegal domain id */
-#define CRYS_ECMONT_INVALID_DOMAIN_ID_ERROR (CRYS_EC_MONT_EDW_MODULE_ERROR_BASE + 0x32UL)
-/*! Internal PKI error */
-#define CRYS_ECEDW_PKI_ERROR (CRYS_EC_MONT_EDW_MODULE_ERROR_BASE + 0x33UL)
-/*! Internal PKI error */
-#define CRYS_ECMONT_PKI_ERROR (CRYS_EC_MONT_EDW_MODULE_ERROR_BASE + 0x34UL)
-
-
-/************************************************************************************************************
- * NOT SUPPORTED MODULES ERROR IDs *
- ************************************************************************************************************/
-/*! EC montgomery is not supported */
-#define CRYS_ECMONT_IS_NOT_SUPPORTED (CRYS_EC_MONT_EDW_MODULE_ERROR_BASE + 0xFEUL)
-/*! EC edwards is not supported */
-#define CRYS_ECEDW_IS_NOT_SUPPORTED (CRYS_EC_MONT_EDW_MODULE_ERROR_BASE + 0xFFUL)
-
-
-
-/************************ Enums ********************************/
-
-/************************ Typedefs ****************************/
-
-/************************ Structs ******************************/
-
-/************************ Public Variables **********************/
-
-/************************ Public Functions **********************/
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
-*/
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ecpki_build.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ecpki_build.h
deleted file mode 100644
index 5a48e21..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ecpki_build.h
+++ /dev/null
@@ -1,224 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef CRYS_ECPKI_BUILD_H
-#define CRYS_ECPKI_BUILD_H
-
-/*!
-@defgroup cryptocell_ecpki CryptoCell ECC APIs
-@{
-@ingroup cryptocell_api
-@brief This group is the cryptocell ECC root group
-@}
-
-@file
-@brief This module defines functions for building key structures used in Elliptic Curves Cryptography (ECC).
-@defgroup crys_ecpki_build CryptoCell key build for ECC APIs
-@{
-@ingroup cryptocell_ecpki
-*/
-
-
-#include "crys_error.h"
-#include "crys_ecpki_types.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/**********************************************************************************
- * CRYS_ECPKI_BuildPrivKey function *
- **********************************************************************************/
-/*!
-@brief Builds (imports) the user private key structure from an existing private key so
-that this structure can be used by other EC primitives.
-This function should be called before using of the private key. Input
-domain structure must be initialized by EC parameters and auxiliary
-values, using CRYS_ECPKI_GetDomain or CRYS_ECPKI_SetDomain functions.
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_ecpki_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_ECPKI_BuildPrivKey(
- const CRYS_ECPKI_Domain_t *pDomain, /*!< [in] The EC domain (curve). */
- const uint8_t *pPrivKeyIn, /*!< [in] Pointer to private key data. */
- uint32_t PrivKeySizeInBytes, /*!< [in] Size of private key data (in bytes). */
- CRYS_ECPKI_UserPrivKey_t *pUserPrivKey /*!< [out] Pointer to the private key structure.
- This structure is used as input to the ECPKI cryptographic primitives. */
- );
-
-
-/**********************************************************************************
- * CRYS_ECPKI_ExportPrivKey function *
- **********************************************************************************/
-/*!
-@brief Converts an existing private key from internal representation to Big-Endian export representation.
-\note Size of output is equal to ModSizeInBytes.
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_ecpki_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_ECPKI_ExportPrivKey(
- CRYS_ECPKI_UserPrivKey_t *pUserPrivKey, /*!< [in] */
- uint8_t *pExportPrivKey, /*!< [out] */
- uint32_t *pPrivKeySizeBytes /*!< [in/out] */
- );
-
-
-/**********************************************************************************
- * _DX_ECPKI_BuildPublKey function *
- **********************************************************************************/
-/*!
-@brief Builds a user public key structure from an imported public key,
-so it can be used by other EC primitives.
-When operating the EC cryptographic algorithms with imported EC public
-key, this function should be called before using of the public key.
-
-\note The Incoming public key PublKeyIn structure is big endian bytes array, containing
-concatenation of PC||X||Y, where:
-<ul id="noteb"><li> PC - point control single byte, defining the type of point: 0x4 - uncompressed,
-06,07 - hybrid, 2,3 - compressed. </li>
-<li>X,Y - EC point coordinates of public key (y is omitted in compressed form),
-size of X and Y must be equal to size of EC modulus. </li></ul>
-
-The user may call this function by appropriate macros, according to necessary validation level [SEC1. ECC standard: 3.2, ANS X9.62]:
-<ul><li>Checking the input pointers and sizes only - ::CRYS_ECPKI_BuildPublKey.</li>
-<li>Partially checking of public key - ::CRYS_ECPKI_BuildPublKeyPartlyCheck. </li>
-<li>Full checking of public key - ::CRYS_ECPKI_BuildPublKeyFullCheck. </li></ul>
-
-\note Full check mode takes long time and should be used when it is actually needed.
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_ecpki_error.h.
-*/
-/*
-The function performs the following operations:
-- Checks validity of incoming variables and pointers;
-- Converts incoming key data from big endian into little endian;
-- If public key is given in compressed form (i.e. byte[0] = 2 or 3 and
- coordinate Y is omitted), then the function uncompress it;
-- Performs checking of input key according to CheckMode parameter.
-- Initializes variables and structures.
-*/
-CIMPORT_C CRYSError_t _DX_ECPKI_BuildPublKey(
- const CRYS_ECPKI_Domain_t *pDomain, /*!< [in] The EC domain (curve). */
- uint8_t *PublKeyIn_ptr, /*!< [in] Pointer to the input public key data, in compressed or
- uncompressed or hybrid form:
- [PC||X||Y] Big-Endian representation, structured according to
- [IEEE1363], where:
- <ul><li>X and Y are the public key's EC point coordinates.
- In compressed form, Y is omitted.</li>
- <li> The sizes of X and Y are equal to the size of the EC modulus.</li>
- <li> PC is a one-byte point control that defines the type of point
- compression. </li></ul>*/
- uint32_t PublKeySizeInBytes, /*!< [in] The size of public key data (in bytes). */
- EC_PublKeyCheckMode_t CheckMode, /*!< [in] The required level of public key verification
- (higher verification level means longer verification time):
- <ul><li> 0 = preliminary validation. </li>
- <li> 1 = partial validation. </li>
- <li> 2 = full validation. </li></ul>*/
- CRYS_ECPKI_UserPublKey_t *pUserPublKey, /*!< [out] Pointer to the output public key structure.
- This structure is used as input to the ECPKI cryptographic primitives. */
- CRYS_ECPKI_BUILD_TempData_t *pTempBuff /*!< [in] Pointer for a temporary buffer required for the build function. */
- );
-
-
-/**********************************************************************************
- * CRYS_ECPKI_BuildPublKey macro *
- **********************************************************************************/
-/*!
-@brief This macro calls _DX_ECPKI_BuildPublKey function for building the public key
-while checking input pointers and sizes. For a description of the parameters see ::_DX_ECPKI_BuildPublKey.
-*/
-#define CRYS_ECPKI_BuildPublKey(pDomain, PublKeyIn_ptr, PublKeySizeInBytes, pUserPublKey) \
- _DX_ECPKI_BuildPublKey((pDomain), (PublKeyIn_ptr), (PublKeySizeInBytes), CheckPointersAndSizesOnly, (pUserPublKey), NULL)
-
-
-/**********************************************************************************
- * CRYS_ECPKI_BuildPublKeyPartlyCheck macro *
- **********************************************************************************/
-/*!
-@brief This macro calls _DX_ECPKI_BuildPublKey function for building the public key with partial validation of the key [SEC1] - 3.2.3.
-For a description of the parameters see ::_DX_ECPKI_BuildPublKey.
-*/
-#define CRYS_ECPKI_BuildPublKeyPartlyCheck(pDomain, PublKeyIn_ptr, PublKeySizeInBytes, pUserPublKey, pTempBuff) \
- _DX_ECPKI_BuildPublKey((pDomain), (PublKeyIn_ptr), (PublKeySizeInBytes), ECpublKeyPartlyCheck, (pUserPublKey), (pTempBuff))
-
-
-/**********************************************************************************
- * CRYS_ECPKI_BuildPublKeyFullCheck macro *
- **********************************************************************************/
-/*!
-@brief This macro calls _DX_ECPKI_BuildPublKey function for building the public key with full validation of the key [SEC1] - 3.2.2.
-For a description of the parameters and return values see _DX_ECPKI_BuildPublKey.
-*/
-#define CRYS_ECPKI_BuildPublKeyFullCheck(pDomain, PublKeyIn_ptr, PublKeySizeInBytes, pUserPublKey, pTempBuff) \
- _DX_ECPKI_BuildPublKey((pDomain), (PublKeyIn_ptr), (PublKeySizeInBytes), (ECpublKeyFullCheck), (pUserPublKey), (pTempBuff))
-
-
-/***********************************************************************************
- * CRYS_ECPKI_ExportPublKey function *
- ***********************************************************************************/
-/*!
-@brief Converts an existing public key from internal representation to Big-Endian export representation.
-The function converts the X,Y coordinates of public key EC point to big endianness,
-and sets the public key as follows:
-<ul><li>In case "Uncompressed" point: PubKey = PC||X||Y, PC = 0x4 - single byte;</li>
-<li>In case of "Hybrid" key PC = 0x6.</li>
-<li>In case of "Compressed" key PC = 0x2.</li></ul>
-\note Size of output X and Y coordinates is equal to ModSizeInBytes.
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_ecpki_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_ECPKI_ExportPublKey(
- CRYS_ECPKI_UserPublKey_t *pUserPublKey, /*!< [in] Pointer to the input public key structure (in Little-Endian form). */
- CRYS_ECPKI_PointCompression_t compression, /*!< [in] Compression mode: Compressed, Uncompressed or Hybrid. */
- uint8_t *pExternPublKey, /*!< [out] Pointer to the exported public key array, in compressed or uncompressed
- or hybrid form:
- [PC||X||Y] Big-Endian representation, structured according to [IEEE1363].
- In compressed form, Y is omitted. */
- uint32_t *pPublKeySizeBytes /*!< [in/out] Pointer used for the input of the user public key buffer size
- (in bytes), and the output of the size of the converted public key in bytes. */
- );
-
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ecpki_dh.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ecpki_dh.h
deleted file mode 100644
index 5ed48ad..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ecpki_dh.h
+++ /dev/null
@@ -1,90 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-#ifndef CRYS_ECPKI_DH_H
-#define CRYS_ECPKI_DH_H
-
-/*! @file
-@brief Defines the API that supports EC Diffie-Hellman shared secret value derivation primitives.
-@defgroup crys_ecpki_dh CryptoCell ECC Diffie-Hellman APIs
-@{
-@ingroup cryptocell_ecpki
-*/
-
-
-#include "crys_ecpki_types.h"
-#include "crys_ecpki_error.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/***********************************************************************
- * CRYS_ECDH_SVDP_DH function *
- ***********************************************************************/
-/*!
-@brief Creates the shared secret value according to [IEEE1363, ANS X9.63]:
-
-<ol><li> Checks input-parameter pointers and EC Domain in public and private
-keys.</li>
-<li> Derives the partner public key and calls the EcWrstDhDeriveSharedSecret
-function, which performs EC SVDP operations.</li></ol>
-\note The term "User"
-refers to any party that calculates a shared secret value using this primitive.
-The term "Partner" refers to any other party of shared secret value calculation.
-Partner's public key shall be validated before using in this primitive.
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_ecpki_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_ECDH_SVDP_DH(
- CRYS_ECPKI_UserPublKey_t *PartnerPublKey_ptr, /*!< [in] Pointer to a partner public key. */
- CRYS_ECPKI_UserPrivKey_t *UserPrivKey_ptr, /*!< [in] Pointer to a user private key. */
- uint8_t *SharedSecretValue_ptr, /*!< [out] Pointer to an output buffer that will contain the shared
- secret value. */
- uint32_t *SharedSecrValSize_ptr, /*!< [in/out] Pointer to the size of user-passed buffer (in) and
- actual size of output of calculated shared secret value
- (out). */
- CRYS_ECDH_TempData_t *TempBuff_ptr /*!< [in] Pointer to a temporary buffer. */);
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ecpki_domain.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ecpki_domain.h
deleted file mode 100644
index c8faaea..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ecpki_domain.h
+++ /dev/null
@@ -1,80 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-#ifndef CRYS_ECPKI_DOMAIN_H
-#define CRYS_ECPKI_DOMAIN_H
-
-
-/*!
-@file
-@brief Defines the ecpki build domain API.
-@defgroup crys_ecpki_domain CryptoCell ECC domain APIs
-@{
-@ingroup cryptocell_ecpki
-*/
-
-
-#include "crys_error.h"
-#include "crys_ecpki_types.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-
-
-
-/**********************************************************************************
- * CRYS_ECPKI_GetEcDomain function *
- **********************************************************************************/
-
-/*!
- * @brief The function returns a pointer to an ECDSA saved domain (one of the supported domains).
- *
- * @return Domain pointer on success.
- * @return NULL on failure.
- */
-
-const CRYS_ECPKI_Domain_t *CRYS_ECPKI_GetEcDomain(CRYS_ECPKI_DomainID_t domainId /*!< [in] Index of one of the domain Id (must be one of the supported domains). */);
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
-*/
-#endif
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ecpki_ecdsa.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ecpki_ecdsa.h
deleted file mode 100644
index 13138c5..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ecpki_ecdsa.h
+++ /dev/null
@@ -1,139 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-#ifndef CRYS_ECPKI_ECDSA_H
-#define CRYS_ECPKI_ECDSA_H
-
-/*!
-@file
-@brief Defines the APIs that support the ECDSA functions.
-@defgroup crys_ecpki_ecdsa CryptoCell ECDSA APIs
-@{
-@ingroup cryptocell_ecpki
-*/
-
-#include "crys_error.h"
-#include "crys_ecpki_types.h"
-#include "crys_hash.h"
-#include "crys_rnd.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-
-
-/**************************************************************************
- * CRYS_ECDSA_Sign - integrated function
- **************************************************************************/
-/*!
-@brief This function performs an ECDSA sign operation in integrated form.
-
-\note
-Using of HASH functions with HASH size greater than EC modulus size, is not recommended!.
-Algorithm according [ANS X9.62] standard.
-
-The message data may be either a non-hashed data or a digest of a hash function.
-For a non-hashed data, the message data will be hashed using the hash function indicated by ::CRYS_ECPKI_HASH_OpMode_t.
-For a digest, ::CRYS_ECPKI_HASH_OpMode_t should indicate the hash function that the message data was created by, and it will not be hashed.
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_ecpki_error.h, crys_hash_error.h or crys_rnd_error.h.
-**/
-CIMPORT_C CRYSError_t CRYS_ECDSA_Sign(
- void *rndState_ptr, /*!< [in/out] Pointer to the RND state structure. */
- SaSiRndGenerateVectWorkFunc_t rndGenerateVectFunc, /*!< [in] Pointer to the random vector generation function. */
- CRYS_ECDSA_SignUserContext_t *pSignUserContext, /*!< [in/out] Pointer to the user buffer for signing the database. */
- CRYS_ECPKI_UserPrivKey_t *pSignerPrivKey, /*!< [in] A pointer to a user private key structure. */
- CRYS_ECPKI_HASH_OpMode_t hashMode, /*!< [in] One of the supported SHA-x HASH modes, as defined in
- ::CRYS_ECPKI_HASH_OpMode_t.
- \note MD5 is not supported. */
- uint8_t *pMessageDataIn, /*!< [in] Pointer to the input data to be signed.
- The size of the scatter/gather list representing the data buffer
- is limited to 128 entries, and the size of each entry is limited
- to 64KB (fragments larger than 64KB are broken into
- fragments <= 64KB). */
- uint32_t messageSizeInBytes, /*!< [in] Size of message data in bytes. */
- uint8_t *pSignatureOut, /*!< [in] Pointer to a buffer for output of signature. */
- uint32_t *pSignatureOutSize /*!< [in/out] Pointer to the signature size. Used to pass the size of
- the SignatureOut buffer (in), which must be >= 2
- * OrderSizeInBytes. When the API returns,
- it is replaced with the size of the actual signature (out). */
- );
-
-
-
-/**************************************************************************
- * CRYS_ECDSA_Verify integrated function
- **************************************************************************/
-/*!
-@brief This function performs an ECDSA verify operation in integrated form.
-Algorithm according [ANS X9.62] standard.
-
-The message data may be either a non-hashed data or a digest of a hash function.
-For a non-hashed data, the message data will be hashed using the hash function indicated by ::CRYS_ECPKI_HASH_OpMode_t.
-For a digest, ::CRYS_ECPKI_HASH_OpMode_t should indicate the hash function that the message data was created by, and it will not be hashed.
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_ecpki_error.h or crys_hash_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_ECDSA_Verify (
- CRYS_ECDSA_VerifyUserContext_t *pVerifyUserContext, /*!< [in] Pointer to the user buffer for signing the database. */
- CRYS_ECPKI_UserPublKey_t *pUserPublKey, /*!< [in] Pointer to a user public key structure. */
- CRYS_ECPKI_HASH_OpMode_t hashMode, /*!< [in] One of the supported SHA-x HASH modes, as defined in
- ::CRYS_ECPKI_HASH_OpMode_t.
- \note MD5 is not supported. */
- uint8_t *pSignatureIn, /*!< [in] Pointer to the signature to be verified. */
- uint32_t SignatureSizeBytes, /*!< [in] Size of the signature (in bytes). */
- uint8_t *pMessageDataIn, /*!< [in] Pointer to the input data that was signed (same as given to
- the signing function). The size of the scatter/gather list representing
- the data buffer is limited to 128 entries, and the size of each entry is
- limited to 64KB (fragments larger than 64KB are broken into fragments <= 64KB). */
- uint32_t messageSizeInBytes /*!< [in] Size of the input data (in bytes). */
- );
-
-
-/**********************************************************************************************************/
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ecpki_error.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ecpki_error.h
deleted file mode 100644
index 950dce0..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ecpki_error.h
+++ /dev/null
@@ -1,317 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-#ifndef CRYS_ECPKI_ERROR_H
-#define CRYS_ECPKI_ERROR_H
-
-
-/*!
-@file
-@brief This module contains the definitions of the CRYS ECPKI errors.
-@defgroup crys_ecpki_error CryptoCell ECC specific errors
-@{
-@ingroup cryptocell_ecpki
-*/
-
-#include "crys_error.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-
-/************************ Defines ******************************/
-
-/* CRYS_ECPKI_MODULE_ERROR_BASE = 0x00F00800 */
-
-/*********************************************************************************************
- * CRYS ECPKI MODULE ERRORS *
- *********************************************************************************************/
-/*! Illegal domain ID. */
-#define CRYS_ECPKI_ILLEGAL_DOMAIN_ID_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x1UL)
-/*! Illegal domain pointer. */
-#define CRYS_ECPKI_DOMAIN_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x2UL)
-/* The CRYS ECPKI GEN KEY PAIR module errors */
-/*! Illegal private key pointer. */
-#define CRYS_ECPKI_GEN_KEY_INVALID_PRIVATE_KEY_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x3UL)
-/*! Illegal public key pointer. */
-#define CRYS_ECPKI_GEN_KEY_INVALID_PUBLIC_KEY_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x4UL)
-/*! Illegal temporary buffer pointer. */
-#define CRYS_ECPKI_GEN_KEY_INVALID_TEMP_DATA_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x5UL)
-/*! Illegal RND context pointer. */
-#define CRYS_ECPKI_RND_CONTEXT_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x6UL)
-
-/************************************************************************************************************
-* The CRYS ECPKI BUILD KEYS MODULE ERRORS *
-*************************************************************************************************************/
-/*! Illegal compression mode. */
-#define CRYS_ECPKI_BUILD_KEY_INVALID_COMPRESSION_MODE_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x07UL)
-/*! Illegal domain ID. */
-#define CRYS_ECPKI_BUILD_KEY_ILLEGAL_DOMAIN_ID_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x08UL)
-/*! Illegal private key pointer. */
-#define CRYS_ECPKI_BUILD_KEY_INVALID_PRIV_KEY_IN_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x09UL)
-/*! Illegal private key structure pointer. */
-#define CRYS_ECPKI_BUILD_KEY_INVALID_USER_PRIV_KEY_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x0AUL)
-/*! Illegal private key size. */
-#define CRYS_ECPKI_BUILD_KEY_INVALID_PRIV_KEY_SIZE_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x0BUL)
-/*! Illegal private key data. */
-#define CRYS_ECPKI_BUILD_KEY_INVALID_PRIV_KEY_DATA_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x0CUL)
-/*! Illegal public key pointer. */
-#define CRYS_ECPKI_BUILD_KEY_INVALID_PUBL_KEY_IN_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x0DUL)
-/*! Illegal public key structure pointer. */
-#define CRYS_ECPKI_BUILD_KEY_INVALID_USER_PUBL_KEY_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x0EUL)
-/*! Illegal public key size. */
-#define CRYS_ECPKI_BUILD_KEY_INVALID_PUBL_KEY_SIZE_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x0FUL)
-/*! Illegal public key data. */
-#define CRYS_ECPKI_BUILD_KEY_INVALID_PUBL_KEY_DATA_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x10UL)
-/*! Illegal EC build check mode option. */
-#define CRYS_ECPKI_BUILD_KEY_INVALID_CHECK_MODE_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x11UL)
-/*! Illegal temporary buffer pointer. */
-#define CRYS_ECPKI_BUILD_KEY_INVALID_TEMP_BUFF_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x12UL)
-
-/* The CRYS ECPKI EXPORT PUBLIC KEY MODULE ERRORS */
-/*! Illegal public key structure pointer. */
-#define CRYS_ECPKI_EXPORT_PUBL_KEY_INVALID_USER_PUBL_KEY_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x14UL)
-/*! Illegal public key compression mode. */
-#define CRYS_ECPKI_EXPORT_PUBL_KEY_ILLEGAL_COMPRESSION_MODE_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x15UL)
-/*! Illegal output public key pointer. */
-#define CRYS_ECPKI_EXPORT_PUBL_KEY_INVALID_EXTERN_PUBL_KEY_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x16UL)
-/*! Illegal output public key size pointer. */
-#define CRYS_ECPKI_EXPORT_PUBL_KEY_INVALID_PUBL_KEY_SIZE_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x17UL)
-/*! Illegal output public key size. */
-#define CRYS_ECPKI_EXPORT_PUBL_KEY_INVALID_PUBL_KEY_SIZE_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x18UL)
-/*! Illegal domain ID. */
-#define CRYS_ECPKI_EXPORT_PUBL_KEY_ILLEGAL_DOMAIN_ID_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x19UL)
-/*! Validation of public key failed. */
-#define CRYS_ECPKI_EXPORT_PUBL_KEY_ILLEGAL_VALIDATION_TAG_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x1AUL)
-/*! Validation of public key failed. */
-#define CRYS_ECPKI_EXPORT_PUBL_KEY_INVALID_PUBL_KEY_DATA_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x1BUL)
-
-/* The CRYS ECPKI EXPORT PRIVATE KEY MODULE ERRORS */
-/*! Illegal private key structure pointer. */
-#define CRYS_ECPKI_EXPORT_PRIV_KEY_INVALID_USER_PRIV_KEY_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0xC0UL)
-/*! Illegal output private key pointer. */
-#define CRYS_ECPKI_EXPORT_PRIV_KEY_INVALID_EXTERN_PRIV_KEY_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0xC1UL)
-/*! Validation of private key failed. */
-#define CRYS_ECPKI_EXPORT_PRIV_KEY_ILLEGAL_VALIDATION_TAG_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0xC2UL)
-/*! Illegal output private key size pointer. */
-#define CRYS_ECPKI_EXPORT_PRIV_KEY_INVALID_PRIV_KEY_SIZE_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0xC3UL)
-/*! Illegal output private key size. */
-#define CRYS_ECPKI_EXPORT_PRIV_KEY_INVALID_PRIV_KEY_SIZE_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0xC4UL)
-/*! Validation of private key failed. */
-#define CRYS_ECPKI_EXPORT_PRIV_KEY_INVALID_PRIV_KEY_DATA_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0xC5UL)
-
-/* The CRYS ECPKI BUILD ECC DOMAIN ERRORS */
-/*! Illegal domain ID. */
-#define CRYS_ECPKI_BUILD_DOMAIN_ID_IS_NOT_VALID_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x20UL)
-/*! Illegal domain ID pointer. */
-#define CRYS_ECPKI_BUILD_DOMAIN_DOMAIN_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x21UL)
-/*! Illegal domain parameter pointer. */
-#define CRYS_ECPKI_BUILD_DOMAIN_EC_PARAMETR_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x22UL)
-/*! Illegal domain parameter size. */
-#define CRYS_ECPKI_BUILD_DOMAIN_EC_PARAMETR_SIZE_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x23UL)
-/*! Illegal domain cofactor parameters. */
-#define CRYS_ECPKI_BUILD_DOMAIN_COFACTOR_PARAMS_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x24UL)
-/*! Insufficient strength. */
-#define CRYS_ECPKI_BUILD_DOMAIN_SECURITY_STRENGTH_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x25UL)
-/*! SCA resistance error. */
-#define CRYS_ECPKI_BUILD_SCA_RESIST_ILLEGAL_MODE_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x26UL)
-
-
-/*! Internal PKI error */
-#define CRYS_ECPKI_PKI_INTERNAL_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x30UL)
-
-/************************************************************************************************************
- * CRYS EC DIFFIE-HELLMAN MODULE ERRORS
-*************************************************************************************************************/
-/* The CRYS EC SVDP_DH Function errors */
-/*! Illegal partner's public key pointer. */
-#define CRYS_ECDH_SVDP_DH_INVALID_PARTNER_PUBL_KEY_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x31UL)
-/*! Partner's public key validation failed. */
-#define CRYS_ECDH_SVDP_DH_PARTNER_PUBL_KEY_VALID_TAG_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x32UL)
-/*! Illegal user private key pointer. */
-#define CRYS_ECDH_SVDP_DH_INVALID_USER_PRIV_KEY_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x33UL)
-/*! Private key validation failed. */
-#define CRYS_ECDH_SVDP_DH_USER_PRIV_KEY_VALID_TAG_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x34UL)
-/*! Illegal shared secret pointer. */
-#define CRYS_ECDH_SVDP_DH_INVALID_SHARED_SECRET_VALUE_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x35UL)
-/*! Illegal temporary buffer pointer. */
-#define CRYS_ECDH_SVDP_DH_INVALID_TEMP_DATA_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x36UL)
-/*! Illegal shared secret size pointer. */
-#define CRYS_ECDH_SVDP_DH_INVALID_SHARED_SECRET_VALUE_SIZE_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x37UL)
-/*! Illegal shared secret size. */
-#define CRYS_ECDH_SVDP_DH_INVALID_SHARED_SECRET_VALUE_SIZE_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x38UL)
-/*! Illegal domain ID. */
-#define CRYS_ECDH_SVDP_DH_ILLEGAL_DOMAIN_ID_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x39UL)
-/*! Illegal private and public domain ID are different. */
-#define CRYS_ECDH_SVDP_DH_NOT_CONCENT_PUBL_AND_PRIV_DOMAIN_ID_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x3AUL)
-
-
-/************************************************************************************************************
- * CRYS ECDSA MODULE ERRORS
- ************************************************************************************************************/
-/* The CRYS ECDSA Signing errors */
-/*! Illegal domain ID. */
-#define CRYS_ECDSA_SIGN_INVALID_DOMAIN_ID_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x50UL)
-/*! Illegal context pointer. */
-#define CRYS_ECDSA_SIGN_INVALID_USER_CONTEXT_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x51UL)
-/*! Illegal private key pointer. */
-#define CRYS_ECDSA_SIGN_INVALID_USER_PRIV_KEY_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x52UL)
-/*! Illegal hash operation mode. */
-#define CRYS_ECDSA_SIGN_ILLEGAL_HASH_OP_MODE_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x53UL)
-/*! Illegal data in pointer. */
-#define CRYS_ECDSA_SIGN_INVALID_MESSAGE_DATA_IN_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x54UL)
-/*! Illegal data in size. */
-#define CRYS_ECDSA_SIGN_INVALID_MESSAGE_DATA_IN_SIZE_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x55UL)
-/*! Context validation failed. */
-#define CRYS_ECDSA_SIGN_USER_CONTEXT_VALIDATION_TAG_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x57UL)
-/*! User's private key validation failed. */
-#define CRYS_ECDSA_SIGN_USER_PRIV_KEY_VALIDATION_TAG_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x58UL)
-/*! Illegal signature pointer. */
-#define CRYS_ECDSA_SIGN_INVALID_SIGNATURE_OUT_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x60UL)
-/*! Illegal signature size pointer. */
-#define CRYS_ECDSA_SIGN_INVALID_SIGNATURE_OUT_SIZE_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x61UL)
-/*! Illegal signature size. */
-#define CRYS_ECDSA_SIGN_INVALID_SIGNATURE_OUT_SIZE_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x62UL)
-/*! Ephemeral key error. */
-#define CRYS_ECDSA_SIGN_INVALID_IS_EPHEMER_KEY_INTERNAL_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x63UL)
-/*! Illegal ephemeral key pointer. */
-#define CRYS_ECDSA_SIGN_INVALID_EPHEMERAL_KEY_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x64UL)
-/*! Illegal RND context pointer. */
-#define CRYS_ECDSA_SIGN_INVALID_RND_CONTEXT_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x65UL)
-/*! Illegal RND function pointer. */
-#define CRYS_ECDSA_SIGN_INVALID_RND_FUNCTION_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x66UL)
-/*! Signature calculation failed. */
-#define CRYS_ECDSA_SIGN_SIGNING_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x67UL)
-
-/* The CRYS ECDSA Verifying errors */
-/*! Illegal domain ID. */
-#define CRYS_ECDSA_VERIFY_INVALID_DOMAIN_ID_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x70UL)
-/*! Illegal user's context pointer. */
-#define CRYS_ECDSA_VERIFY_INVALID_USER_CONTEXT_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x71UL)
-/*! Illegal public key pointer. */
-#define CRYS_ECDSA_VERIFY_INVALID_SIGNER_PUBL_KEY_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x72UL)
-/*! Illegal hash operation mode. */
-#define CRYS_ECDSA_VERIFY_ILLEGAL_HASH_OP_MODE_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x73UL)
-/*! Illegal signature pointer. */
-#define CRYS_ECDSA_VERIFY_INVALID_SIGNATURE_IN_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x76UL)
-/*! Illegal signature size. */
-#define CRYS_ECDSA_VERIFY_INVALID_SIGNATURE_SIZE_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x77UL)
-/*! Illegal data in pointer. */
-#define CRYS_ECDSA_VERIFY_INVALID_MESSAGE_DATA_IN_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x80UL)
-/*! Illegal data in size. */
-#define CRYS_ECDSA_VERIFY_INVALID_MESSAGE_DATA_IN_SIZE_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x81UL)
-/*! Context validation failed. */
-#define CRYS_ECDSA_VERIFY_USER_CONTEXT_VALIDATION_TAG_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x82UL)
-/*! public key validation failed. */
-#define CRYS_ECDSA_VERIFY_SIGNER_PUBL_KEY_VALIDATION_TAG_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x83UL)
-/*! Verification failed. */
-#define CRYS_ECDSA_VERIFY_INCONSISTENT_VERIFY_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x84UL)
-
-/*! Illegal parameters. */
-#define CRYS_ECC_ILLEGAL_PARAMS_ACCORDING_TO_PRIV_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0xD3UL)
-/*! Illegal hash mode. */
-#define CRYS_ECC_ILLEGAL_HASH_MODE_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0xE0UL)
-
-
-/************************************************************************************************************
- * CRYS ECPKI MODULE COMMON ERRORS
-*************************************************************************************************************/
-/*! Illegal RND function pointer. */
-#define CRYS_ECPKI_INVALID_RND_FUNC_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x90UL)
-/*! Illegal RND context pointer. */
-#define CRYS_ECPKI_INVALID_RND_CTX_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x91UL)
-/*! Illegal domain ID. */
-#define CRYS_ECPKI_INVALID_DOMAIN_ID_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x92UL)
-/*! Private key validation failed. */
-#define CRYS_ECPKI_INVALID_PRIV_KEY_TAG_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x93UL)
-/*! Public key validation failed. */
-#define CRYS_ECPKI_INVALID_PUBL_KEY_TAG_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x94UL)
-/*! Illegal data in. */
-#define CRYS_ECPKI_INVALID_DATA_IN_PASSED_STRUCT_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0x95UL)
-
-/************************************************************************************************************
- * CRYS ECIES MODULE ERRORS
-*************************************************************************************************************/
-/*! Illegal public key pointer. */
-#define CRYS_ECIES_INVALID_PUBL_KEY_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0xE0UL)
-/*! Public key validation failed. */
-#define CRYS_ECIES_INVALID_PUBL_KEY_TAG_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0xE1UL)
-/*! Illegal private key pointer. */
-#define CRYS_ECIES_INVALID_PRIV_KEY_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0xE2UL)
-/*! Private key validation failed. */
-#define CRYS_ECIES_INVALID_PRIV_KEY_TAG_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0xE3UL)
-/*! Illegal private key value. */
-#define CRYS_ECIES_INVALID_PRIV_KEY_VALUE_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0xE4UL)
-/*! Illegal KDF derivation mode. */
-#define CRYS_ECIES_INVALID_KDF_DERIV_MODE_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0xE5UL)
-/*! Illegal KDF hash mode. */
-#define CRYS_ECIES_INVALID_KDF_HASH_MODE_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0xE6UL)
-/*! Illegal secret key pointer. */
-#define CRYS_ECIES_INVALID_SECRET_KEY_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0xE7UL)
-/*! Illegal secret key size. */
-#define CRYS_ECIES_INVALID_SECRET_KEY_SIZE_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0xE8UL)
-/*! Illegal cipher data pointer. */
-#define CRYS_ECIES_INVALID_CIPHER_DATA_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0xE9UL)
-/*! Illegal cipher data size pointer. */
-#define CRYS_ECIES_INVALID_CIPHER_DATA_SIZE_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0xEAUL)
-/*! Illegal cipher data size. */
-#define CRYS_ECIES_INVALID_CIPHER_DATA_SIZE_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0xEBUL)
-/*! Illegal temporary buffer pointer. */
-#define CRYS_ECIES_INVALID_TEMP_DATA_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0xECUL)
-/*! Illegal ephemeral key pointer */
-#define CRYS_ECIES_INVALID_EPHEM_KEY_PAIR_PTR_ERROR (CRYS_ECPKI_MODULE_ERROR_BASE + 0xEDUL)
-
-/************************ Enums ********************************/
-
-/************************ Typedefs ****************************/
-
-/************************ Structs ******************************/
-
-/************************ Public Variables **********************/
-
-/************************ Public Functions **********************/
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ecpki_kg.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ecpki_kg.h
deleted file mode 100644
index 2279c25..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ecpki_kg.h
+++ /dev/null
@@ -1,88 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-#ifndef CRYS_ECPKI_KG_H
-#define CRYS_ECPKI_KG_H
-
-/*! @file
-@brief Defines the API for generation of ECC private and public keys.
-@defgroup crys_ecpki_kg CryptoCell ECC Key Generation APIs
-@{
-@ingroup cryptocell_ecpki
-*/
-
-
-#include "crys_error.h"
-#include "crys_rnd.h"
-#include "crys_ecpki_types.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/***************** CRYS_ECPKI_GenKeyPair function **********************/
-/*!
-@brief Generates a pair of private and public keys in internal representation according to [ANS X9.62].
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_ecpki_error.h or crys_rnd_error.h
-*/
-CIMPORT_C CRYSError_t CRYS_ECPKI_GenKeyPair(
- void *rndState_ptr, /*!< [in/out] Pointer to the RND state structure. */
- SaSiRndGenerateVectWorkFunc_t rndGenerateVectFunc, /*!< [in] Pointer to the random vector generation function. */
- const CRYS_ECPKI_Domain_t *pDomain, /*!< [in] Pointer to EC domain (curve). */
- CRYS_ECPKI_UserPrivKey_t *pUserPrivKey, /*!< [out] Pointer to the private key structure. This structure is used as input to the
- ECPKI cryptographic primitives. */
- CRYS_ECPKI_UserPublKey_t *pUserPublKey, /*!< [out] Pointer to the public key structure. This structure is used as input to the
- ECPKI cryptographic primitives. */
- CRYS_ECPKI_KG_TempData_t *pTempData, /*!< [in] Temporary buffers for internal use, defined in ::CRYS_ECPKI_KG_TempData_t. */
- CRYS_ECPKI_KG_FipsContext_t *pFipsCtx /*!< [in] Pointer to temporary buffer used in case FIPS certification if required. */
-);
-
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
-
-
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ecpki_types.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ecpki_types.h
deleted file mode 100644
index f32aa77..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_ecpki_types.h
+++ /dev/null
@@ -1,478 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-#ifndef CRYS_ECPKI_TYPES_H
-#define CRYS_ECPKI_TYPES_H
-
-/*!
-@file
-@brief Contains all of the enums and definitions that are used for the CRYS ECPKI APIs.
-@defgroup crys_ecpki_types CryptoCell ECC specific types
-@{
-@ingroup cryptocell_ecpki
-*/
-
-#include "ssi_pal_types_plat.h"
-#include "crys_hash.h"
-#include "crys_pka_defs_hw.h"
-#include "ssi_pal_compiler.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-
-/************************ Defines ******************************/
-/*! Internal buffer size in words. */
-#define CRYS_PKA_DOMAIN_LLF_BUFF_SIZE_IN_WORDS (10 + 3*CRYS_ECPKI_MODUL_MAX_LENGTH_IN_WORDS)
-
-/**************************************************************************************
- * Enumerators
- ***************************************************************************************/
-
-/*------------------------------------------------------------------*/
-/*! Enumerator for the EC Domain idetifier
- References: [13] - SEC 2: Recommended elliptic curve domain parameters.
- Version 1.0. Certicom 2000.
- [8] - WAP-261-WTLS-20010406-a, Version 06-April-2001. */
-
-typedef enum
-{
- /* For prime field */
- CRYS_ECPKI_DomainID_secp160k1, /*!< EC secp160r1 */
- CRYS_ECPKI_DomainID_secp160r1, /*!< EC secp160k1 */
- CRYS_ECPKI_DomainID_secp160r2, /*!< EC secp160r2 */
- CRYS_ECPKI_DomainID_secp192k1, /*!< EC secp192k1 */
- CRYS_ECPKI_DomainID_secp192r1, /*!< EC secp192r1 */
- CRYS_ECPKI_DomainID_secp224k1, /*!< EC secp224k1 */
- CRYS_ECPKI_DomainID_secp224r1, /*!< EC secp224r1 */
- CRYS_ECPKI_DomainID_secp256k1, /*!< EC secp256k1 */
- CRYS_ECPKI_DomainID_secp256r1, /*!< EC secp256r1 */
- CRYS_ECPKI_DomainID_secp384r1, /*!< EC secp384r1 */
- CRYS_ECPKI_DomainID_secp521r1, /*!< EC secp521r1 */
-
- CRYS_ECPKI_DomainID_Builded, /*!< User given, not identified. */
- CRYS_ECPKI_DomainID_OffMode, /*!< Reserved.*/
-
- CRYS_ECPKI_DomainIDLast = 0x7FFFFFFF, /*! Reserved.*/
-
-}CRYS_ECPKI_DomainID_t;
-
-
-/*------------------------------------------------------------------*/
-/*! Defines the enum for the HASH operation mode.
- * The enumerator defines 6 HASH modes according to IEEE 1363.
- *
- */
-typedef enum
-{
- CRYS_ECPKI_HASH_SHA1_mode = 0, /*!< The message data will be hashed with SHA1. */
- CRYS_ECPKI_HASH_SHA224_mode = 1, /*!< The message data will be hashed with SHA224. */
- CRYS_ECPKI_HASH_SHA256_mode = 2, /*!< The message data will be hashed with SHA256. */
- CRYS_ECPKI_HASH_SHA384_mode = 3, /*!< The message data will be hashed with SHA384. */
- CRYS_ECPKI_HASH_SHA512_mode = 4, /*!< The message data will be hashed with SHA512. */
-
- CRYS_ECPKI_AFTER_HASH_SHA1_mode = 5, /*!< The message data is a digest of SHA1 and will not be hashed. */
- CRYS_ECPKI_AFTER_HASH_SHA224_mode = 6, /*!< The message data is a digest of SHA224 and will not be hashed. */
- CRYS_ECPKI_AFTER_HASH_SHA256_mode = 7, /*!< The message data is a digest of SHA256 and will not be hashed. */
- CRYS_ECPKI_AFTER_HASH_SHA384_mode = 8, /*!< The message data is a digest of SHA384 and will not be hashed. */
- CRYS_ECPKI_AFTER_HASH_SHA512_mode = 9, /*!< The message data is a digest of SHA512 and will not be hashed. */
-
-
- CRYS_ECPKI_HASH_NumOfModes, /*!< Maximal number of HASH modes. */
- CRYS_ECPKI_HASH_OpModeLast = 0x7FFFFFFF, /*!< Reserved. */
-
-}CRYS_ECPKI_HASH_OpMode_t;
-
-
-/*---------------------------------------------------*/
-/*! Enumerator for the EC point compression idetifier. */
-typedef enum
-{
- CRYS_EC_PointCompressed = 2, /*!< Compressed point. */
- CRYS_EC_PointUncompressed = 4, /*!< Uncompressed point. */
- CRYS_EC_PointContWrong = 5, /*!< Wrong Point Control value. */
- CRYS_EC_PointHybrid = 6, /*!< Hybrid point. */
-
- CRYS_EC_PointCompresOffMode = 8, /*!< Reserved. */
-
- CRYS_ECPKI_PointCompressionLast= 0x7FFFFFFF, /*!< Reserved. */
-
-}CRYS_ECPKI_PointCompression_t;
-
-
-/*! EC key checks defintions. */
-typedef enum {
- CheckPointersAndSizesOnly = 0, /*!< Only preliminary input parameters are checked. */
- ECpublKeyPartlyCheck = 1, /*!< Preliminary input parameters check and verify that EC PubKey point is on the curve. */
- ECpublKeyFullCheck = 2, /*!< All the above and in addition verifies that EC_GeneratorOrder*PubKey = O */
-
- PublKeyChecingOffMode, /*! Reserved. */
- EC_PublKeyCheckModeLast = 0x7FFFFFFF, /*! Reserved. */
-}EC_PublKeyCheckMode_t;
-
-/*----------------------------------------------------*/
-/*! Defintion of sw SCA protection. */
-typedef enum {
- SCAP_Inactive, /*! Inactive.*/
- SCAP_Active, /*! Active.*/
- SCAP_OFF_MODE, /*! Reserved. */
- SCAP_LAST = 0x7FFFFFFF /*! Reserved. */
-} CRYS_ECPKI_ScaProtection_t;
-
-
-/**************************************************************************************
- * EC Domain structure definition
- ***************************************************************************************/
-
-/*! The structure containing the EC domain parameters in little-endian form
- EC equation: Y^2 = X^3 + A*X + B over prime fild GFp. */
-typedef struct {
-
- /*! EC modulus: P. */
- uint32_t ecP [CRYS_ECPKI_MODUL_MAX_LENGTH_IN_WORDS];
- /*! EC equation parameter a. */
- uint32_t ecA [CRYS_ECPKI_MODUL_MAX_LENGTH_IN_WORDS];
- /*! EC equation parameter b. */
- uint32_t ecB [CRYS_ECPKI_MODUL_MAX_LENGTH_IN_WORDS];
- /*! Order of generator. */
- uint32_t ecR [CRYS_ECPKI_MODUL_MAX_LENGTH_IN_WORDS + 1];
- /*! EC cofactor EC_Cofactor_K
- Generator (EC base point) coordinates in projective form. */
- uint32_t ecGx [CRYS_ECPKI_MODUL_MAX_LENGTH_IN_WORDS];
- /*! EC cofactor EC_Cofactor_K
- Generator (EC base point) coordinates in projective form. */
- uint32_t ecGy [CRYS_ECPKI_MODUL_MAX_LENGTH_IN_WORDS];
- /*! EC cofactor EC_Cofactor_K
- Generator (EC base point) coordinates in projective form. */
- uint32_t ecH;
- /*! Specific fields that are used by the low level.*/
- uint32_t llfBuff[CRYS_PKA_DOMAIN_LLF_BUFF_SIZE_IN_WORDS];
- /*! Size of fields in bits. */
- uint32_t modSizeInBits;
- /*! Order size in bits. */
- uint32_t ordSizeInBits;
- /*! Size of each inserted Barret tag in words; 0 - if not inserted.*/
- uint32_t barrTagSizeInWords;
- /*! EC Domain identifier.*/
- CRYS_ECPKI_DomainID_t DomainID;
-
- /*! Internal buffer. */
- int8_t name[20];
-
-} CRYS_ECPKI_Domain_t;
-
-
-
-/**************************************************************************************
- * EC point structures definitions
- ***************************************************************************************/
-
-/*! The structure containing the EC point in affine coordinates
- and little endian form. */
-typedef struct
-{
- /*! Point coordinate X. */
- uint32_t x[CRYS_ECPKI_MODUL_MAX_LENGTH_IN_WORDS];
- /*! Point coordinate Y. */
- uint32_t y[CRYS_ECPKI_MODUL_MAX_LENGTH_IN_WORDS];
-
-}CRYS_ECPKI_PointAffine_t;
-
-
-/**************************************************************************************
- * ECPKI public and private key Structures
- ***************************************************************************************/
-
-/* --------------------------------------------------------------------- */
-/* .................. The public key structures definitions ............ */
-/* --------------------------------------------------------------------- */
-
-/*! The structure containing the Public Key in affine coordinates.*/
-typedef struct
-{
- /*! Public Key coordinate X.*/
- uint32_t x[CRYS_ECPKI_MODUL_MAX_LENGTH_IN_WORDS];
- /*! Public Key coordinate Y.*/
- uint32_t y[CRYS_ECPKI_MODUL_MAX_LENGTH_IN_WORDS];
- /*! EC Domain.*/
- CRYS_ECPKI_Domain_t domain;
- /*! Point type.*/
- uint32_t pointType;
-} CRYS_ECPKI_PublKey_t;
-
-/*! The EC public key's user structure prototype. This structure must be saved by the user, and is used as input to the ECC functions
-(such as ::CRYS_ECDSA_Verify etc.). */
-typedef struct CRYS_ECPKI_UserPublKey_t
-{
- /*! Validation tag.*/
- uint32_t valid_tag;
- /*! Public key data. */
- uint32_t PublKeyDbBuff[(sizeof(CRYS_ECPKI_PublKey_t)+3)/4];
-
-} CRYS_ECPKI_UserPublKey_t;
-
-
-/* --------------------------------------------------------------------- */
-/* .................. The private key structures definitions ........... */
-/* --------------------------------------------------------------------- */
-
-/*! Structure containing the Private key data. */
-typedef struct
-{
- /*! Private Key data. */
- uint32_t PrivKey[CRYS_ECPKI_MODUL_MAX_LENGTH_IN_WORDS + 1];
- /*! Domain. */
- CRYS_ECPKI_Domain_t domain;
- /*! SCA protection mode. */
- CRYS_ECPKI_ScaProtection_t scaProtection;
-
-}CRYS_ECPKI_PrivKey_t;
-
-
-/*! The EC private key's user structure prototype. This structure must be saved by the user, and is used as input to the ECC functions
-(such as ::CRYS_ECDSA_Sign etc.). */
-typedef struct CRYS_ECPKI_UserPrivKey_t
-{
- /*! Validation tag. */
- uint32_t valid_tag;
- /*! Private key data. */
- uint32_t PrivKeyDbBuff[(sizeof(CRYS_ECPKI_PrivKey_t)+3)/4];
-
-} CRYS_ECPKI_UserPrivKey_t;
-
-/*! ECDH temporary data type */
-typedef struct CRYS_ECDH_TempData_t
-{
- /*! Temporary buffers. */
- uint32_t crysEcdhIntBuff[CRYS_PKA_ECDH_BUFF_MAX_LENGTH_IN_WORDS];
-}CRYS_ECDH_TempData_t;
-
-/*! EC build temporary data. */
-typedef struct CRYS_ECPKI_BUILD_TempData_t
-{
- /*! Temporary buffers. */
- uint32_t crysBuildTmpIntBuff[CRYS_PKA_ECPKI_BUILD_TMP_BUFF_MAX_LENGTH_IN_WORDS];
-}CRYS_ECPKI_BUILD_TempData_t;
-
-
-
-/**************************************************************************
- * CRYS ECDSA context structures
- **************************************************************************/
-
-/* --------------------------------------------------------------------- */
-/* CRYS ECDSA Signing context structure */
-/* --------------------------------------------------------------------- */
-/*! Internal buffer used in the signing process. */
-typedef uint32_t CRYS_ECDSA_SignIntBuff[CRYS_PKA_ECDSA_SIGN_BUFF_MAX_LENGTH_IN_WORDS];
-
-/*! Context definition for Signing operation. */
-typedef struct
-{
- /*! Private Key data. */
- CRYS_ECPKI_UserPrivKey_t ECDSA_SignerPrivKey;
-
- /*! HASH context. */
- CRYS_HASHUserContext_t hashUserCtxBuff;
- /*! HASH result buffer. */
- CRYS_HASH_Result_t hashResult;
- /*! HASH result size in words. */
- uint32_t hashResultSizeWords;
- /*! HASH mode. */
- CRYS_ECPKI_HASH_OpMode_t hashMode;
- /*! Internal buffer. */
- CRYS_ECDSA_SignIntBuff crysEcdsaSignIntBuff;
-}ECDSA_SignContext_t;
-
-
-/* --------------------------------------------------------------------- */
-/* CRYS ECDSA Signing User context database */
-/* --------------------------------------------------------------------- */
-
-/*! User's context definition for signing operation. The context saves the state of the operation and must be saved by the user
- till the end of the APIs flow */
-typedef struct CRYS_ECDSA_SignUserContext_t
-{
- /*! Signing process data. */
- uint32_t context_buff [(sizeof(ECDSA_SignContext_t)+3)/4];
- /*! Validation tag*/
- uint32_t valid_tag;
-} CRYS_ECDSA_SignUserContext_t;
-
-
-
-/****************************************************************************/
-
-/* --------------------------------------------------------------------- */
-/* CRYS ECDSA Verifying context structure */
-/* --------------------------------------------------------------------- */
-/*! Internal buffer used in the verification process. */
-typedef uint32_t CRYS_ECDSA_VerifyIntBuff[CRYS_PKA_ECDSA_VERIFY_BUFF_MAX_LENGTH_IN_WORDS];
-
-/*! Context definition for verification operation. */
-typedef struct
-{
- /*! Public key data. */
- CRYS_ECPKI_UserPublKey_t ECDSA_SignerPublKey;
-
- /*! HASH context. */
- CRYS_HASHUserContext_t hashUserCtxBuff;
- /*! HASH result. */
- CRYS_HASH_Result_t hashResult;
- /*! HASH result size in words. */
- uint32_t hashResultSizeWords;
- /*! HASH mode. */
- CRYS_ECPKI_HASH_OpMode_t hashMode;
- /*! Internal buffer. */
- CRYS_ECDSA_VerifyIntBuff crysEcdsaVerIntBuff;
-
-}ECDSA_VerifyContext_t;
-
-
-/* --------------------------------------------------------------------- */
-/* CRYS ECDSA Verifying User context database */
-/* --------------------------------------------------------------------- */
-/*! User's context definition for verification operation. The context saves the state of the operation and must be saved by the user
- till the end of the APIs flow */
-typedef struct CRYS_ECDSA_VerifyUserContext_t
-{
- /*! Verification process data. */
- uint32_t context_buff[(sizeof(ECDSA_VerifyContext_t)+3)/4];
- /*! Validation tag. */
- uint32_t valid_tag;
-}CRYS_ECDSA_VerifyUserContext_t;
-
-
-
-
-/* --------------------------------------------------------------------- */
-/* .................. key generation temp buffer ........... */
-/* --------------------------------------------------------------------- */
-
-/*! ECPKI KG temporary data type */
-typedef struct CRYS_ECPKI_KG_TempData_t
-{
- /*! Internal buffer. */
- uint32_t crysKGIntBuff[CRYS_PKA_KG_BUFF_MAX_LENGTH_IN_WORDS];
-}CRYS_ECPKI_KG_TempData_t;
-
-/*! ECIES temporary data definition. */
-typedef struct CRYS_ECIES_TempData_t {
-
- /*! Private key data. */
- CRYS_ECPKI_UserPrivKey_t PrivKey;
- /*! Public key data. */
- CRYS_ECPKI_UserPublKey_t PublKey;
- /*! Internal buffer. */
- uint32_t zz[3*CRYS_ECPKI_MODUL_MAX_LENGTH_IN_WORDS + 1];
- /*! Internal buffers. */
- union {
- CRYS_ECPKI_BUILD_TempData_t buildTempbuff;
- CRYS_ECPKI_KG_TempData_t KgTempBuff;
- CRYS_ECDH_TempData_t DhTempBuff;
- } tmp;
-
-}CRYS_ECIES_TempData_t;
-
-
-/* --------------------------------------------------------------------- */
-/* .................. defines for FIPS ........... */
-/* --------------------------------------------------------------------- */
-
-/*! Order length for the FIPS ECC tests. */
-#define CRYS_ECPKI_FIPS_ORDER_LENGTH (256/SASI_BITS_IN_BYTE) // the order of secp256r1 in bytes
-
-/*! Context definition required for internal FIPS verification for ECPKI key generation. */
-typedef struct CRYS_ECPKI_KG_FipsContext_t
-{
- /*! Signing and verification data. */
- union {
- CRYS_ECDSA_SignUserContext_t signCtx;
- CRYS_ECDSA_VerifyUserContext_t verifyCtx;
- }operationCtx;
- /*! Internal buffer. */
- uint32_t signBuff[2*CRYS_ECPKI_ORDER_MAX_LENGTH_IN_WORDS];
-}CRYS_ECPKI_KG_FipsContext_t;
-
-
-
-/*! Context defintion, required for internal FIPS verification for ECDSA KAT. *
-* The ECDSA KAT tests defined for domain 256r1. */
-typedef struct CRYS_ECDSAFipsKatContext_t{
- /*! Key data. */
- union {
- /*! Private key data. */
- struct {
- CRYS_ECPKI_UserPrivKey_t PrivKey;
- CRYS_ECDSA_SignUserContext_t signCtx;
- }userSignData;
- /*! Public key data. */
- struct {
- CRYS_ECPKI_UserPublKey_t PublKey;
- union {
- CRYS_ECDSA_VerifyUserContext_t verifyCtx;
- CRYS_ECPKI_BUILD_TempData_t tempData;
- }buildOrVerify;
- }userVerifyData;
- }keyContextData;
- /*! Internal buffer. */
- uint8_t signBuff[2*CRYS_ECPKI_FIPS_ORDER_LENGTH];
-}CRYS_ECDSAFipsKatContext_t;
-
-/*! Context definition, required for internal FIPS verification for ECDH KAT. */
-typedef struct CRYS_ECDHFipsKatContext_t{
- /*! Public key data. */
- CRYS_ECPKI_UserPublKey_t pubKey;
- /*! Private key data. */
- CRYS_ECPKI_UserPrivKey_t privKey;
- /*! Internal buffers. */
- union {
- CRYS_ECPKI_BUILD_TempData_t ecpkiTempData;
- CRYS_ECDH_TempData_t ecdhTempBuff;
- }tmpData;
- /*! Buffer for the secret key. */
- uint8_t secretBuff[CRYS_ECPKI_FIPS_ORDER_LENGTH];
-}CRYS_ECDHFipsKatContext_t;
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_error.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_error.h
deleted file mode 100644
index bf5673f..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_error.h
+++ /dev/null
@@ -1,273 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef CRYS_ERROR_H
-#define CRYS_ERROR_H
-
-#include "ssi_pal_types.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*! @file
-@brief This module defines the error return code types and the numbering spaces of the error codes
-for each module of the layers listed below.
-@defgroup crys_error CryptoCell general base error codes
-@{
-@ingroup cryptocell_api
-*/
-
-/*! The definitions of the error number space used for the different modules */
-
-/* ........... Error base numeric mapping definitions ................... */
-/* ----------------------------------------------------------------------- */
-
- /*! CRYS error base number. */
-#define CRYS_ERROR_BASE 0x00F00000UL
-
-/*! Error range number assigned for each layer. */
-#define CRYS_ERROR_LAYER_RANGE 0x00010000UL
-
-/*! Error range number assigned to each module on its specified layer. */
-#define CRYS_ERROR_MODULE_RANGE 0x00000100UL
-
-/* Defines the layer index for the error mapping. */
-/*! CRYS error layer index. */
-#define CRYS_LAYER_ERROR_IDX 0x00UL
-/*! Low level functions error layer index. */
-#define LLF_LAYER_ERROR_IDX 0x01UL
-/*! Generic error layer index. */
-#define GENERIC_ERROR_IDX 0x05UL
-
-/* Defines the module index for error mapping */
-/*! AES error index.*/
-#define AES_ERROR_IDX 0x00UL
-/*! DES error index.*/
-#define DES_ERROR_IDX 0x01UL
-/*! HASH error index.*/
-#define HASH_ERROR_IDX 0x02UL
-/*! HMAC error index.*/
-#define HMAC_ERROR_IDX 0x03UL
-/*! RSA error index.*/
-#define RSA_ERROR_IDX 0x04UL
-/*! DH error index.*/
-#define DH_ERROR_IDX 0x05UL
-
-/*! ECPKI error index.*/
-#define ECPKI_ERROR_IDX 0x08UL
-/*! RND error index.*/
-#define RND_ERROR_IDX 0x0CUL
-/*! Common error index.*/
-#define COMMON_ERROR_IDX 0x0DUL
-/*! KDF error index.*/
-#define KDF_ERROR_IDX 0x11UL
-/*! HKDF error index.*/
-#define HKDF_ERROR_IDX 0x12UL
-/*! AESCCM error index.*/
-#define AESCCM_ERROR_IDX 0x15UL
-/*! FIPS error index.*/
-#define FIPS_ERROR_IDX 0x17UL
-
-/*! PKA error index.*/
-#define PKA_MODULE_ERROR_IDX 0x21UL
-/*! CHACHA error index.*/
-#define CHACHA_ERROR_IDX 0x22UL
-/*! EC montgomery and edwards error index.*/
-#define EC_MONT_EDW_ERROR_IDX 0x23UL
-/*! CHACHA POLY error index.*/
-#define CHACHA_POLY_ERROR_IDX 0x24UL
-/*! POLY error index.*/
-#define POLY_ERROR_IDX 0x25UL
-/*! SRP error index.*/
-#define SRP_ERROR_IDX 0x26UL
-
-
-
-/* .......... defining the error spaces for each module on each layer ........... */
-/* ------------------------------------------------------------------------------ */
-
-/*! AES module error base address - 0x00F00000. */
-#define CRYS_AES_MODULE_ERROR_BASE (CRYS_ERROR_BASE + \
- (CRYS_ERROR_LAYER_RANGE * CRYS_LAYER_ERROR_IDX) + \
- (CRYS_ERROR_MODULE_RANGE * AES_ERROR_IDX ) )
-
-/*! DES module error base address - 0x00F00100. */
-#define CRYS_DES_MODULE_ERROR_BASE (CRYS_ERROR_BASE + \
- (CRYS_ERROR_LAYER_RANGE * CRYS_LAYER_ERROR_IDX) + \
- (CRYS_ERROR_MODULE_RANGE * DES_ERROR_IDX ) )
-
-/*! HASH module error base address - 0x00F00200. */
-#define CRYS_HASH_MODULE_ERROR_BASE (CRYS_ERROR_BASE + \
- (CRYS_ERROR_LAYER_RANGE * CRYS_LAYER_ERROR_IDX) + \
- (CRYS_ERROR_MODULE_RANGE * HASH_ERROR_IDX ) )
-
-/*! HMAC module error base address - 0x00F00300. */
-#define CRYS_HMAC_MODULE_ERROR_BASE (CRYS_ERROR_BASE + \
- (CRYS_ERROR_LAYER_RANGE * CRYS_LAYER_ERROR_IDX) + \
- (CRYS_ERROR_MODULE_RANGE * HMAC_ERROR_IDX ) )
-
-/*! RSA module error base address - 0x00F00400. */
-#define CRYS_RSA_MODULE_ERROR_BASE (CRYS_ERROR_BASE + \
- (CRYS_ERROR_LAYER_RANGE * CRYS_LAYER_ERROR_IDX) + \
- (CRYS_ERROR_MODULE_RANGE * RSA_ERROR_IDX ) )
-
-/*! DH module error base address - 0x00F00500. */
-#define CRYS_DH_MODULE_ERROR_BASE (CRYS_ERROR_BASE + \
- (CRYS_ERROR_LAYER_RANGE * CRYS_LAYER_ERROR_IDX) + \
- (CRYS_ERROR_MODULE_RANGE * DH_ERROR_IDX ) )
-
-/*! ECPKI module error base address - 0x00F00800. */
-#define CRYS_ECPKI_MODULE_ERROR_BASE (CRYS_ERROR_BASE + \
- (CRYS_ERROR_LAYER_RANGE * CRYS_LAYER_ERROR_IDX) + \
- (CRYS_ERROR_MODULE_RANGE * ECPKI_ERROR_IDX ) )
-
-/*! Low level ECPKI module error base address - 0x00F10800. */
-#define LLF_ECPKI_MODULE_ERROR_BASE (CRYS_ERROR_BASE + \
- (CRYS_ERROR_LAYER_RANGE * LLF_LAYER_ERROR_IDX) + \
- (CRYS_ERROR_MODULE_RANGE * ECPKI_ERROR_IDX ) )
-
-/*! RND module error base address - 0x00F00C00. */
-#define CRYS_RND_MODULE_ERROR_BASE (CRYS_ERROR_BASE + \
- (CRYS_ERROR_LAYER_RANGE * CRYS_LAYER_ERROR_IDX) + \
- (CRYS_ERROR_MODULE_RANGE * RND_ERROR_IDX ) )
-
-/*! Low level RND module error base address - 0x00F10C00. */
-#define LLF_RND_MODULE_ERROR_BASE (CRYS_ERROR_BASE + \
- (CRYS_ERROR_LAYER_RANGE * LLF_LAYER_ERROR_IDX) + \
- (CRYS_ERROR_MODULE_RANGE * RND_ERROR_IDX ) )
-
-/*! COMMMON module error base address - 0x00F00D00. */
-#define CRYS_COMMON_MODULE_ERROR_BASE (CRYS_ERROR_BASE + \
- (CRYS_ERROR_LAYER_RANGE * CRYS_LAYER_ERROR_IDX) + \
- (CRYS_ERROR_MODULE_RANGE * COMMON_ERROR_IDX ) )
-
-/*! KDF module error base address - 0x00F01100. */
-#define CRYS_KDF_MODULE_ERROR_BASE (CRYS_ERROR_BASE + \
- (CRYS_ERROR_LAYER_RANGE * CRYS_LAYER_ERROR_IDX) + \
- (CRYS_ERROR_MODULE_RANGE * KDF_ERROR_IDX ) )
-
-/*! HKDF module error base address - 0x00F01100. */
-#define CRYS_HKDF_MODULE_ERROR_BASE (CRYS_ERROR_BASE + \
- (CRYS_ERROR_LAYER_RANGE * CRYS_LAYER_ERROR_IDX) + \
- (CRYS_ERROR_MODULE_RANGE * HKDF_ERROR_IDX ) )
-
-/*! AESCCM module error base address - 0x00F01500. */
-#define CRYS_AESCCM_MODULE_ERROR_BASE (CRYS_ERROR_BASE + \
- (CRYS_ERROR_LAYER_RANGE * CRYS_LAYER_ERROR_IDX) + \
- (CRYS_ERROR_MODULE_RANGE * AESCCM_ERROR_IDX ) )
-
-/*! FIPS module error base address - 0x00F01700. */
-#define CRYS_FIPS_MODULE_ERROR_BASE (CRYS_ERROR_BASE + \
- (CRYS_ERROR_LAYER_RANGE * CRYS_LAYER_ERROR_IDX) + \
- (CRYS_ERROR_MODULE_RANGE * FIPS_ERROR_IDX ) )
-
-/*! PKA module error base address - 0x00F02100. */
-#define PKA_MODULE_ERROR_BASE (CRYS_ERROR_BASE + \
- (CRYS_ERROR_LAYER_RANGE * CRYS_LAYER_ERROR_IDX) + \
- (CRYS_ERROR_MODULE_RANGE * PKA_MODULE_ERROR_IDX ) )
-
-/*! CHACHA module error base address - 0x00F02200. */
-#define CRYS_CHACHA_MODULE_ERROR_BASE (CRYS_ERROR_BASE + \
- (CRYS_ERROR_LAYER_RANGE * CRYS_LAYER_ERROR_IDX) + \
- (CRYS_ERROR_MODULE_RANGE * CHACHA_ERROR_IDX ) )
-/*! CHACHA POLY module error base address - 0x00F02400. */
-#define CRYS_CHACHA_POLY_MODULE_ERROR_BASE (CRYS_ERROR_BASE + \
- (CRYS_ERROR_LAYER_RANGE * CRYS_LAYER_ERROR_IDX) + \
- (CRYS_ERROR_MODULE_RANGE * CHACHA_POLY_ERROR_IDX ) )
-/*! POLY module error base address - 0x00F02500. */
-#define CRYS_POLY_MODULE_ERROR_BASE (CRYS_ERROR_BASE + \
- (CRYS_ERROR_LAYER_RANGE * CRYS_LAYER_ERROR_IDX) + \
- (CRYS_ERROR_MODULE_RANGE * POLY_ERROR_IDX ) )
-
-/*! SRP module error base address - 0x00F02600. */
-#define CRYS_SRP_MODULE_ERROR_BASE (CRYS_ERROR_BASE + \
- (CRYS_ERROR_LAYER_RANGE * CRYS_LAYER_ERROR_IDX) + \
- (CRYS_ERROR_MODULE_RANGE * SRP_ERROR_IDX ) )
-
-
-/*! EC MONT_EDW module error base address - 0x00F02300. */
-#define CRYS_EC_MONT_EDW_MODULE_ERROR_BASE (CRYS_ERROR_BASE + \
- (CRYS_ERROR_LAYER_RANGE * CRYS_LAYER_ERROR_IDX) + \
- (CRYS_ERROR_MODULE_RANGE * EC_MONT_EDW_ERROR_IDX ) )
-
-
-/*! User generic error base address - 0x00F50000 */
-#define GENERIC_ERROR_BASE ( CRYS_ERROR_BASE + (CRYS_ERROR_LAYER_RANGE * GENERIC_ERROR_IDX) )
-/*! CRYS fatal error. */
-#define CRYS_FATAL_ERROR (GENERIC_ERROR_BASE + 0x00UL)
-/*! CRYS out of resources error. */
-#define CRYS_OUT_OF_RESOURCE_ERROR (GENERIC_ERROR_BASE + 0x01UL)
-/*! CRYS illegal resource value error. */
-#define CRYS_ILLEGAL_RESOURCE_VAL_ERROR (GENERIC_ERROR_BASE + 0x02UL)
-
-
-
-/* ............ The OK (success) definition ....................... */
-/*! Success defintion. */
-#define CRYS_OK 0
-
-/*! MACRO that defines crys return value. */
-#define SASI_CRYS_RETURN_ERROR(retCode, retcodeInfo, funcHandler) \
- ((retCode) == 0 ? CRYS_OK : funcHandler(retCode, retcodeInfo))
-
-/************************ Enums ********************************/
-
-
-/************************ Typedefs ****************************/
-
-/*! The typedef definition of all of the error codes that are returned from the CRYS functions */
-typedef uint32_t CRYSError_t;
-
-/************************ Structs ******************************/
-
-
-/************************ Public Variables **********************/
-
-
-/************************ Public Functions **********************/
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
-
-
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_hash.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_hash.h
deleted file mode 100644
index dede2a0..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_hash.h
+++ /dev/null
@@ -1,285 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-/*!
-@file
-@brief This file contains all of the enums and definitions
-that are used for the CRYS HASH APIs, as well as the APIs themselves.
-@defgroup crys_hash CryptoCell HASH APIs
-@{
-@ingroup cryptocell_api
-
-
-This product supports the following HASH algorithms (or modes, according to product):
-<ul><li> CRYS_HASH_MD5 (producing 16 byte output).</li>
-<li> CRYS_HASH_SHA1 (producing 20 byte output).</li>
-<li> CRYS_HASH_SHA224 (producing 28 byte output).</li>
-<li> CRYS_HASH_SHA256 (producing 32 byte output).</li>
-<li> CRYS_HASH_SHA384 (producing 48 byte output).</li>
-<li> CRYS_HASH_SHA512 (producing 64 byte output).</li></ul>
-
-HASH calculation can be performed in either of the following two modes of operation:
-<ul><li> Integrated operation - Processes all data in a single function call. This flow is applicable when all data is available prior to the
- cryptographic operation.</li>
-<li> Block operation - Processes a subset of the data buffers, and is called multiple times in a sequence. This flow is applicable when the
- next data buffer becomes available only during/after processing of the current data buffer.</li></ul>
-
-The following is a typical HASH Block operation flow:
-<ol><li> ::CRYS_HASH_Init - this function initializes the HASH machine on the CRYS level by setting the context pointer that is used on the entire
- HASH operation.</li>
-<li> ::CRYS_HASH_Update - this function runs a HASH operation on a block of data allocated by the user. This function may be called as many times
- as required.</li>
-<li> ::CRYS_HASH_Finish - this function ends the HASH operation. It returns the digest result and clears the context.</li></ol>
-*/
-
-#ifndef CRYS_HASH_H
-#define CRYS_HASH_H
-
-
-#include "ssi_pal_types.h"
-#include "crys_error.h"
-#include "crys_hash_defs.h"
-
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-
-/************************ Defines ******************************/
-/* The hash result in words
-#define CRYS_HASH_RESULT_SIZE_IN_WORDS 5*/
-/*! The maximal hash result is 512 bits for SHA512. */
-#define CRYS_HASH_RESULT_SIZE_IN_WORDS 16
-
-/*! MD5 digest result size in bytes. */
-#define CRYS_HASH_MD5_DIGEST_SIZE_IN_BYTES 16
-
-/*! MD5 digest result size in words. */
-#define CRYS_HASH_MD5_DIGEST_SIZE_IN_WORDS 4
-
-/*! SHA-1 digest result size in bytes. */
-#define CRYS_HASH_SHA1_DIGEST_SIZE_IN_BYTES 20
-
-/*! SHA-1 digest result size in words. */
-#define CRYS_HASH_SHA1_DIGEST_SIZE_IN_WORDS 5
-
-/*! SHA-256 digest result size in words. */
-#define CRYS_HASH_SHA224_DIGEST_SIZE_IN_WORDS 7
-
-/*! SHA-256 digest result size in words. */
-#define CRYS_HASH_SHA256_DIGEST_SIZE_IN_WORDS 8
-
-/*! SHA-384 digest result size in words. */
-#define CRYS_HASH_SHA384_DIGEST_SIZE_IN_WORDS 12
-
-/*! SHA-512 digest result size in words. */
-#define CRYS_HASH_SHA512_DIGEST_SIZE_IN_WORDS 16
-
-/*! SHA-256 digest result size in bytes */
-#define CRYS_HASH_SHA224_DIGEST_SIZE_IN_BYTES 28
-
-/*! SHA-256 digest result size in bytes */
-#define CRYS_HASH_SHA256_DIGEST_SIZE_IN_BYTES 32
-
-/*! SHA-384 digest result size in bytes */
-#define CRYS_HASH_SHA384_DIGEST_SIZE_IN_BYTES 48
-
-/*! SHA-512 digest result size in bytes */
-#define CRYS_HASH_SHA512_DIGEST_SIZE_IN_BYTES 64
-
-/*! SHA1 hash block size in words */
-#define CRYS_HASH_BLOCK_SIZE_IN_WORDS 16
-
-/*! SHA1 hash block size in bytes */
-#define CRYS_HASH_BLOCK_SIZE_IN_BYTES 64
-
-/*! SHA2 hash block size in words */
-#define CRYS_HASH_SHA512_BLOCK_SIZE_IN_WORDS 32
-
-/*! SHA2 hash block size in bytes */
-#define CRYS_HASH_SHA512_BLOCK_SIZE_IN_BYTES 128
-
-/*! Maximal data size for update operation. */
-#define CRYS_HASH_UPDATE_DATA_MAX_SIZE_IN_BYTES (1 << 29)
-
-
-/************************ Enums ********************************/
-
-/*!
-HASH operation mode
-*/
-typedef enum {
- CRYS_HASH_SHA1_mode = 0, /*!< SHA1. */
- CRYS_HASH_SHA224_mode = 1, /*!< SHA224. */
- CRYS_HASH_SHA256_mode = 2, /*!< SHA256. */
- CRYS_HASH_SHA384_mode = 3, /*!< SHA384. */
- CRYS_HASH_SHA512_mode = 4, /*!< SHA512. */
- CRYS_HASH_MD5_mode = 5, /*!< MD5. */
- /*! Number of hash modes. */
- CRYS_HASH_NumOfModes,
- /*! Reserved. */
- CRYS_HASH_OperationModeLast= 0x7FFFFFFF,
-
-}CRYS_HASH_OperationMode_t;
-
-/************************ Typedefs *****************************/
-
-/*! HASH result buffer. */
-typedef uint32_t CRYS_HASH_Result_t[CRYS_HASH_RESULT_SIZE_IN_WORDS];
-
-/************************ Structs ******************************/
-/*! The user's context prototype - the argument type that is passed by the user
- to the HASH APIs. The context saves the state of the operation and must be saved by the user
- till the end of the APIs flow. */
-typedef struct CRYS_HASHUserContext_t {
- /*! Internal buffer */
- uint32_t buff[CRYS_HASH_USER_CTX_SIZE_IN_WORDS];
-}CRYS_HASHUserContext_t;
-
-/************************ Public Variables **********************/
-
-/************************ Public Functions **********************/
-
-
-/************************************************************************************************/
-/*!
-@brief This function initializes the HASH machine and the HASH Context.
-
-It receives as input a pointer to store the context handle to the HASH Context,
-and initializes the HASH Context with the cryptographic attributes that are needed for the HASH block operation (initializes H's value for the HASH algorithm).
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_hash_error.h on failure.
-*/
-CIMPORT_C CRYSError_t CRYS_HASH_Init(
- CRYS_HASHUserContext_t *ContextID_ptr, /*!< [in] Pointer to the HASH context buffer allocated by the user that is used
- for the HASH machine operation. */
- CRYS_HASH_OperationMode_t OperationMode /*!< [in] One of the supported HASH modes, as defined in CRYS_HASH_OperationMode_t. */
-);
-
-/************************************************************************************************/
-/*!
-@brief This function processes a block of data to be HASHed.
-
-It updates a HASH Context that was previously initialized by CRYS_HASH_Init or updated by a previous call to CRYS_HASH_Update.
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_hash_error.h on failure.
-*/
-
-CIMPORT_C CRYSError_t CRYS_HASH_Update(
- CRYS_HASHUserContext_t *ContextID_ptr, /*!< [in] Pointer to the HASH context buffer allocated by the user, which is used for the
- HASH machine operation. */
- uint8_t *DataIn_ptr, /*!< [in] Pointer to the input data to be HASHed.
- it is a one contiguous memory block. */
- size_t DataInSize /*!< [in] Byte size of the input data. Must be > 0.
- If not a multiple of the HASH block size (64 for MD5, SHA-1 and SHA-224/256,
- 128 for SHA-384/512), no further calls
- to CRYS_HASH_Update are allowed in this context, and only CRYS_HASH_Finish
- can be called to complete the computation. */
-);
-
-/************************************************************************************************/
-/*!
-@brief This function finalizes the hashing process of data block.
-
-It receives a handle to the HASH Context, which was previously initialized by CRYS_HASH_Init or by CRYS_HASH_Update.
-It "adds" a header to the data block according to the relevant HASH standard, and computes the final message digest.
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_hash_error.h on failure.
-*/
-
-CIMPORT_C CRYSError_t CRYS_HASH_Finish(
- CRYS_HASHUserContext_t *ContextID_ptr, /*!< [in] Pointer to the HASH context buffer allocated by the user that is used for
- the HASH machine operation. */
- CRYS_HASH_Result_t HashResultBuff /*!< [in] Pointer to the word-aligned 64 byte buffer. The actual size of the HASH
- result depends on CRYS_HASH_OperationMode_t. */
-);
-
-
-/************************************************************************************************/
-/*!
-@brief This function is a utility function that frees the context if the operation has failed.
-
-The function executes the following major steps:
-<ol><li> Checks the validity of all of the inputs of the function. </li>
-<li> Clears the user's context.</li>
-<li> Exits the handler with the OK code.</li></ol>
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_hash_error.h on failure.
-*/
-
-CIMPORT_C CRYSError_t CRYS_HASH_Free(
- CRYS_HASHUserContext_t *ContextID_ptr /*!< [in] Pointer to the HASH context buffer allocated by the user that is used for
- the HASH machine operation. */
-);
-
-
-/************************************************************************************************/
-/*!
-@brief This function processes a single buffer of data.
-
-The function allocates an internal HASH Context, and initializes it with the cryptographic attributes
-that are needed for the HASH block operation (initialize H's value for the HASH algorithm).
-Then it processes the data block, calculating the HASH. Finally, it returns the data buffer's message digest.
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_hash_error.h on failure.
- */
-
-CIMPORT_C CRYSError_t CRYS_HASH (
- CRYS_HASH_OperationMode_t OperationMode, /*!< [in] One of the supported HASH modes, as defined in CRYS_HASH_OperationMode_t. */
- uint8_t *DataIn_ptr, /*!< [in] Pointer to the input data to be HASHed.
- The size of the scatter/gather list representing the data buffer is limited
- to 128 entries, and the size of each entry is limited to 64KB
- (fragments larger than 64KB are broken into fragments <= 64KB). */
- size_t DataSize, /*!< [in] The size of the data to be hashed in bytes. */
- CRYS_HASH_Result_t HashResultBuff /*!< [out] Pointer to a word-aligned 64 byte buffer. The actual size of the HASH
- result depends on CRYS_HASH_OperationMode_t. */
-);
-
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_hash_defs.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_hash_defs.h
deleted file mode 100644
index 701f78a..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_hash_defs.h
+++ /dev/null
@@ -1,66 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef CRYS_HASH_DEFS_H
-#define CRYS_HASH_DEFS_H
-
-/*!
-@file
-@brief This file contains HASH definitions.
-@defgroup crys_hash_defs CryptoCell Hash definitions
-@{
-@ingroup crys_hash
-*/
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-
-/************************ Defines ******************************/
-
-/*! The size of user's context prototype (see ::CRYS_HASHUserContext_t) in words. */
-#define CRYS_HASH_USER_CTX_SIZE_IN_WORDS 60
-
-
-#ifdef __cplusplus
-}
-#endif
-
-/**
-@}
- */
-#endif
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_hash_error.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_hash_error.h
deleted file mode 100644
index c1d304e..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_hash_error.h
+++ /dev/null
@@ -1,108 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-
-#ifndef CRYS_HASH_ERROR_H
-#define CRYS_HASH_ERROR_H
-
-
-#include "crys_error.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*!
-@file
-@brief This module contains the definitions of the CRYS HASH errors.
-@defgroup crys_hash_error CryptoCell HASH specific errors
-@{
-@ingroup crys_hash
-*/
-
-
-
-
-/************************ Defines ******************************/
-/*! HASH module on the CRYS layer base address - 0x00F00200*/
-/* The CRYS HASH module errors */
-/*! Illegal context pointer. */
-#define CRYS_HASH_INVALID_USER_CONTEXT_POINTER_ERROR (CRYS_HASH_MODULE_ERROR_BASE + 0x0UL)
-/*! Illegal operation mode. */
-#define CRYS_HASH_ILLEGAL_OPERATION_MODE_ERROR (CRYS_HASH_MODULE_ERROR_BASE + 0x1UL)
-/*! Context is corrupted. */
-#define CRYS_HASH_USER_CONTEXT_CORRUPTED_ERROR (CRYS_HASH_MODULE_ERROR_BASE + 0x2UL)
-/*! Illegal data in pointer. */
-#define CRYS_HASH_DATA_IN_POINTER_INVALID_ERROR (CRYS_HASH_MODULE_ERROR_BASE + 0x3UL)
-/*! Illegal data in size. */
-#define CRYS_HASH_DATA_SIZE_ILLEGAL (CRYS_HASH_MODULE_ERROR_BASE + 0x4UL)
-/*! Illegal result buffer pointer. */
-#define CRYS_HASH_INVALID_RESULT_BUFFER_POINTER_ERROR (CRYS_HASH_MODULE_ERROR_BASE + 0x5UL)
-/*! Last block was already processed (may happen if previous block was not a multiple of block size). */
-#define CRYS_HASH_LAST_BLOCK_ALREADY_PROCESSED_ERROR (CRYS_HASH_MODULE_ERROR_BASE + 0xCUL)
-/*! Illegal parameter. */
-#define CRYS_HASH_ILLEGAL_PARAMS_ERROR (CRYS_HASH_MODULE_ERROR_BASE + 0xDUL)
-/*! Illegal context size. */
-#define CRYS_HASH_CTX_SIZES_ERROR (CRYS_HASH_MODULE_ERROR_BASE + 0xEUL)
-/*! HASH is not supported. */
-#define CRYS_HASH_IS_NOT_SUPPORTED (CRYS_HASH_MODULE_ERROR_BASE + 0xFUL)
-
-
-
-/************************ Enums ********************************/
-
-
-/************************ Typedefs ****************************/
-
-
-/************************ Structs ******************************/
-
-
-/************************ Public Variables **********************/
-
-
-/************************ Public Functions **********************/
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_hkdf.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_hkdf.h
deleted file mode 100644
index 2d9b948..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_hkdf.h
+++ /dev/null
@@ -1,124 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef CRYS_HKDF_H
-#define CRYS_HKDF_H
-
-#include "crys_hash.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*!
-@file
-@brief This module defines the API that supports HMAC Key derivation function as defined by RFC5869.
-@defgroup crys_hkdf CryptoCell HMAC Key Derivation APIs
-@{
-@ingroup cryptocell_api
-*/
-
-/*! HKDF maximal key size in words. */
-#define CRYS_HKDF_MAX_HASH_KEY_SIZE_IN_BYTES 512
-
-/*! HKDF maximal HASH digest size in bytes. */
-#define CRYS_HKDF_MAX_HASH_DIGEST_SIZE_IN_BYTES CRYS_HASH_SHA512_DIGEST_SIZE_IN_BYTES
-
-/************************ Defines ******************************/
-
-/************************ Enums ********************************/
-
-/*! Enum defining HKDF HASH available modes. */
-typedef enum
-{
- /*! SHA1 mode. */
- CRYS_HKDF_HASH_SHA1_mode = 0,
- /*! SHA224 mode. */
- CRYS_HKDF_HASH_SHA224_mode = 1,
- /*! SHA256 mode. */
- CRYS_HKDF_HASH_SHA256_mode = 2,
- /*! SHA384 mode. */
- CRYS_HKDF_HASH_SHA384_mode = 3,
- /*! SHA512 mode. */
- CRYS_HKDF_HASH_SHA512_mode = 4,
-
- /*! Maximal number of HASH modes. */
- CRYS_HKDF_HASH_NumOfModes,
-
- /*! Reserved */
- CRYS_HKDF_HASH_OpModeLast = 0x7FFFFFFF,
-
-}CRYS_HKDF_HASH_OpMode_t;
-
-/************************ Typedefs ****************************/
-
-/************************ Structs ******************************/
-
-/************************ Public Variables **********************/
-
-/************************ Public Functions **********************/
-
-/****************************************************************/
-
-
-/*********************************************************************************************************/
-/*!
-@brief CRYS_HKDF_KeyDerivFunc performs the HMAC-based key derivation, according to RFC5869
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_kdf_error.h, crys_hash_error or crys_hmac_error.h
-*/
-CEXPORT_C CRYSError_t CRYS_HKDF_KeyDerivFunc(
- CRYS_HKDF_HASH_OpMode_t HKDFhashMode, /*!< [in] The HKDF identifier of hash function to be used. */
- uint8_t* Salt_ptr, /*!< [in] A pointer to a non secret random value. can be NULL. */
- size_t SaltLen, /*!< [in] The size of the salt_ptr. */
- uint8_t* Ikm_ptr, /*!< [in] A pointer to a input key message. */
- uint32_t IkmLen, /*!< [in] The size of the input key message */
- uint8_t* Info, /*!< [in] A pointer to an optional context and application specific information. can be NULL */
- uint32_t InfoLen, /*!< [in] The size of the info. */
- uint8_t* Okm, /*!< [in] A pointer to a output key material. */
- uint32_t OkmLen, /*!< [in] The size of the output key material. */
- SaSiBool IsStrongKey /*!< [in] if TRUE , then no need to perform the extraction phase. */
- );
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_hkdf_error.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_hkdf_error.h
deleted file mode 100644
index 36ddaee..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_hkdf_error.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef CRYS_HKDF_ERROR_H
-#define CRYS_HKDF_ERROR_H
-
-#include "crys_error.h"
-
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*!
-@file
-@brief This module contains the definitions of the CRYS HKDF errors.
-@defgroup crys_hkdf_error HMAC Key Derivation specific errors
-@{
-@ingroup crys_hkdf
- */
-
-
-/************************ Defines *******************************/
-
-/*! CryptoCell HKDF module errors / base address - 0x00F01100. */
-/*! Invalid argument. */
-#define CRYS_HKDF_INVALID_ARGUMENT_POINTER_ERROR (CRYS_HKDF_MODULE_ERROR_BASE + 0x0UL)
-/*! Invalid argument size. */
-#define CRYS_HKDF_INVALID_ARGUMENT_SIZE_ERROR (CRYS_HKDF_MODULE_ERROR_BASE + 0x1UL)
-/*! Illegal hash mode. */
-#define CRYS_HKDF_INVALID_ARGUMENT_HASH_MODE_ERROR (CRYS_HKDF_MODULE_ERROR_BASE + 0x3UL)
-/*! HKDF not supported. */
-#define CRYS_HKDF_IS_NOT_SUPPORTED (CRYS_HKDF_MODULE_ERROR_BASE + 0xFFUL)
-
-/************************ Enums *********************************/
-
-/************************ Typedefs *****************************/
-
-/************************ Structs ******************************/
-
-/************************ Public Variables **********************/
-
-/************************ Public Functions **********************/
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
-
-
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_hmac.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_hmac.h
deleted file mode 100644
index 1ba7659..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_hmac.h
+++ /dev/null
@@ -1,214 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-/*!
-@file
-@brief This file contains all of the enums and definitions
-that are used for the CRYS HMAC APIs, as well as the APIs themselves.
-@defgroup crys_hmac CryptoCell HMAC APIs
-@{
-@ingroup cryptocell_api
-
-
-HMAC is a wrapping algorithm that uses a HASH function (one of the supported HASH algorithms, as specified in the HASH chapter) and a key,
-to generate a unique authentication code over the input data.
-HMAC calculation can be performed in either of the following two modes of operation:
-<ul><li> Integrated operation - Processes all data in a single function call. This flow is applicable when all data is available prior to
-the cryptographic operation.</li>
-<li> Block operation - Processes a subset of the data buffers, and is called multiple times in a sequence. This flow is applicable when
-the next data buffer becomes available only during/after processing of the current data buffer.</li></ul>
-
-The following is a typical HMAC Block operation flow:
-<ol><li> ::CRYS_HMAC_Init: This function initializes the HMAC machine on the CRYS level by setting the context pointer that is
- used on the entire HMAC operation.</li>
-<li> ::CRYS_HMAC_Update: This function runs an HMAC operation on a block of data allocated by the user. This function may be called as
- many times as required.</li>
-<li> ::CRYS_HMAC_Finish: This function ends the HMAC operation. It returns the digest result and clears the context.</li></ol>
-*/
-
-#ifndef CRYS_HMAC_H
-#define CRYS_HMAC_H
-
-
-#include "ssi_pal_types.h"
-#include "crys_error.h"
-
-#include "crys_hash.h"
-#include "crys_hmac_defs.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-
-/************************ Defines ******************************/
-
-/*! HMAC key size after padding for MD5, SHA1, SHA256. */
-#define CRYS_HMAC_KEY_SIZE_IN_BYTES 64
-
-/*! HMAC key size after padding for SHA384, SHA512 */
-#define CRYS_HMAC_SHA2_1024BIT_KEY_SIZE_IN_BYTES 128
-
-/************************ Enums ********************************/
-
-/************************ Typedefs ****************************/
-
-/*********************** Structures ****************************/
-
-
-/*! User's context prototype - the argument type that is passed by the user
- to the HMAC APIs. The context saves the state of the operation and must be saved by the user
- till the end of the APIs flow */
-typedef struct CRYS_HMACUserContext_t {
- /*! Context buffer for internal use */
- uint32_t buff[CRYS_HMAC_USER_CTX_SIZE_IN_WORDS];
-
-}CRYS_HMACUserContext_t;
-
-/************************ Structs ******************************/
-
-
-/************************ Public Variables **********************/
-
-
-/************************ Public Functions **********************/
-
-/*!
-@brief This function initializes the HMAC machine.
-
-It allocates and initializes the HMAC Context. It initiates a HASH session and processes a HASH update on the Key XOR ipad,
-then stores it in the context
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_hmac_error.h or crys_hash_error.h on failure.
-*/
-CIMPORT_C CRYSError_t CRYS_HMAC_Init(
- CRYS_HMACUserContext_t *ContextID_ptr, /*!< [in] Pointer to the HMAC context buffer allocated by the user, which is used
- for the HMAC machine operation. */
- CRYS_HASH_OperationMode_t OperationMode, /*!< [in] One of the supported HASH modes, as defined in CRYS_HASH_OperationMode_t. */
- uint8_t *key_ptr, /*!< [in] The pointer to the user's key buffer. */
- uint16_t keySize /*!< [in] The key size in bytes. If the key size is bigger than the HASH block, the key will be hashed.
- The limitations on the key size are the same as the limitations on MAX hash size. */
-);
-
-
-/*!
-@brief This function processes a block of data to be HASHed.
-
-It receives a handle to the HMAC Context, and updates the HASH value with the new data.
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_hmac_error.h or crys_hash_error.h on failure.
-*/
-
-CIMPORT_C CRYSError_t CRYS_HMAC_Update(
- CRYS_HMACUserContext_t *ContextID_ptr, /*!< [in] Pointer to the HMAC context buffer allocated by the user
- that is used for the HMAC machine operation. */
- uint8_t *DataIn_ptr, /*!< [in] Pointer to the input data to be HASHed.
- The size of the scatter/gather list representing the data buffer is limited to
- 128 entries, and the size of each entry is limited to 64KB
- (fragments larger than 64KB are broken into fragments <= 64KB). */
- size_t DataInSize /*!< [in] Byte size of the input data. Must be > 0.
- If not a multiple of the HASH block size (64 for SHA-1 and SHA-224/256,
- 128 for SHA-384/512), no further calls to ::CRYS_HMAC_Update are allowed in
- this context, and only ::CRYS_HMAC_Finish can be called to complete the
- computation. */
-);
-
-
-/*!
-@brief This function finalizes the HMAC processing of a data block.
-
-It receives a handle to the HMAC context that was previously initialized by ::CRYS_HMAC_Init, or by ::CRYS_HMAC_Update.
-It completes the HASH calculation on the ipad and text, and then executes a new HASH operation with the key XOR opad and the previous
-HASH operation result.
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_hmac_error.h or crys_hash_error.h on failure.
-*/
-
-CIMPORT_C CRYSError_t CRYS_HMAC_Finish(
- CRYS_HMACUserContext_t *ContextID_ptr, /*!< [in] Pointer to the HMAC context buffer allocated by the user, which is used
- for the HMAC machine operation. */
- CRYS_HASH_Result_t HmacResultBuff /*!< [out] Pointer to the word-aligned 64 byte buffer. The actual size of the
- HASH result depends on CRYS_HASH_OperationMode_t. */
-);
-
-
-/*!
-@brief This function is a service function that frees the context if the operation has failed.
-
-The function executes the following major steps:
-<ol><li> Checks the validity of all of the inputs of the function. </li>
-<li> Clears the user's context.</li>
-<li> Exits the handler with the OK code.</li></ol>
-
-@return CRYS_OK on success.
-@return a non-zero value from crys_hmac_error.h on failure.
-*/
-
-CIMPORT_C CRYSError_t CRYS_HMAC_Free(
- CRYS_HMACUserContext_t *ContextID_ptr /*!< [in] Pointer to the HMAC context buffer allocated by the user, which is used for
- the HMAC machine operation. */
-);
-
-
-/*!
-@brief This function processes a single buffer of data, and returns the data buffer's message digest.
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_hmac_error.h or crys_hash_error.h on failure.
-*/
-CIMPORT_C CRYSError_t CRYS_HMAC (
- CRYS_HASH_OperationMode_t OperationMode, /*!< [in] One of the supported HASH modes, as defined in CRYS_HASH_OperationMode_t. */
- uint8_t *key_ptr, /*!< [in] The pointer to the user's key buffer. */
- uint16_t keySize, /*!< [in] The key size in bytes. If the key size is bigger than the HASH block, the key will be hashed.
- The limitations on the key size are the same as the limitations on MAX hash size.*/
- uint8_t *DataIn_ptr, /*!< [in] Pointer to the input data to be HASHed.
- The size of the scatter/gather list representing the data buffer is limited to 128
- entries, and the size of each entry is limited to 64KB (fragments larger than
- 64KB are broken into fragments <= 64KB). */
- size_t DataSize, /*!< [in] The size of the data to be hashed (in bytes). */
- CRYS_HASH_Result_t HmacResultBuff /*!< [out] Pointer to the word-aligned 64 byte buffer. The actual size of the
- HMAC result depends on CRYS_HASH_OperationMode_t. */
-);
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_hmac_defs.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_hmac_defs.h
deleted file mode 100644
index 6e76d71..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_hmac_defs.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef CRYS_HMAC_DEFS_H
-#define CRYS_HMAC_DEFS_H
-
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*!
-@file
-@brief This file contains HMAC definitions.
-@defgroup crys_hmac_defs CryptoCell Hmac definitions
-@{
-@ingroup crys_hmac
-*/
-
-/************************ Defines ******************************/
-/*! The size of user's context prototype (see ::CRYS_HMACUserContext_t) in words. */
-#define CRYS_HMAC_USER_CTX_SIZE_IN_WORDS 94
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_hmac_error.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_hmac_error.h
deleted file mode 100644
index 9530ab8..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_hmac_error.h
+++ /dev/null
@@ -1,108 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-#ifndef CRYS_HMAC_ERROR_H
-#define CRYS_HMAC_ERROR_H
-
-#include "crys_error.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*! @file
-@brief This module contains the definitions of the CRYS HMAC errors.
-@defgroup crys_hmac_error CryptoCell HMAC specific errors
-@{
-@ingroup crys_hmac
-*/
-
-
-
-/************************ Defines ******************************/
-
-/*! The CRYS HMAC module errors */
-/*! Illegal context pointer. */
-#define CRYS_HMAC_INVALID_USER_CONTEXT_POINTER_ERROR (CRYS_HMAC_MODULE_ERROR_BASE + 0x0UL)
-/*! Illegal operation mode. */
-#define CRYS_HMAC_ILLEGAL_OPERATION_MODE_ERROR (CRYS_HMAC_MODULE_ERROR_BASE + 0x1UL)
-/*! Context is corrupted. */
-#define CRYS_HMAC_USER_CONTEXT_CORRUPTED_ERROR (CRYS_HMAC_MODULE_ERROR_BASE + 0x2UL)
-/*! Illegal data in pointer. */
-#define CRYS_HMAC_DATA_IN_POINTER_INVALID_ERROR (CRYS_HMAC_MODULE_ERROR_BASE + 0x3UL)
-/*! Illegal data in size. */
-#define CRYS_HMAC_DATA_SIZE_ILLEGAL (CRYS_HMAC_MODULE_ERROR_BASE + 0x4UL)
-/*! Illegal result buffer pointer. */
-#define CRYS_HMAC_INVALID_RESULT_BUFFER_POINTER_ERROR (CRYS_HMAC_MODULE_ERROR_BASE + 0x5UL)
-/*! Illegal key buffer pointer. */
-#define CRYS_HMAC_INVALID_KEY_POINTER_ERROR (CRYS_HMAC_MODULE_ERROR_BASE + 0x6UL)
-/*! Illegal key size. */
-#define CRYS_HMAC_UNVALID_KEY_SIZE_ERROR (CRYS_HMAC_MODULE_ERROR_BASE + 0x7UL)
-/*! Last block was already processed (may happen if previous block was not a multiple of block size). */
-#define CRYS_HMAC_LAST_BLOCK_ALREADY_PROCESSED_ERROR (CRYS_HMAC_MODULE_ERROR_BASE + 0xBUL)
-/*! Illegal parameters. */
-#define CRYS_HMAC_ILLEGAL_PARAMS_ERROR (CRYS_HMAC_MODULE_ERROR_BASE + 0xCUL)
-/*! Illegal context size. */
-#define CRYS_HMAC_CTX_SIZES_ERROR (CRYS_HMAC_MODULE_ERROR_BASE + 0xEUL)
-/*! HMAC is not supported. */
-#define CRYS_HMAC_IS_NOT_SUPPORTED (CRYS_HMAC_MODULE_ERROR_BASE + 0xFUL)
-
-
-
-/************************ Enums ********************************/
-
-
-/************************ Typedefs ****************************/
-
-
-/************************ Structs ******************************/
-
-
-/************************ Public Variables **********************/
-
-
-/************************ Public Functions **********************/
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_kdf.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_kdf.h
deleted file mode 100644
index 78cde00..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_kdf.h
+++ /dev/null
@@ -1,211 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef CRYS_KDF_H
-#define CRYS_KDF_H
-
-
-#include "crys_hash.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*!
-@file
-@brief This module defines the API that supports Key derivation function in modes
-as defined in PKCS#3, ANSI X9.42-2001, and ANSI X9.63-1999.
-@defgroup crys_kdf CryptoCell Key Derivation APIs
-@{
-@ingroup cryptocell_api
-*/
-
-#include "crys_hash.h"
-
-/************************ Defines ******************************/
-
-/*! Shared secret value max size in bytes */
-#define CRYS_KDF_MAX_SIZE_OF_SHARED_SECRET_VALUE 1024
-
-/* Count and max. sizeof OtherInfo entries (pointers to data buffers) */
-/*! Number of other info entries. */
-#define CRYS_KDF_COUNT_OF_OTHER_INFO_ENTRIES 5
-/*! Maximal size of other info entry. */
-#define CRYS_KDF_MAX_SIZE_OF_OTHER_INFO_ENTRY 64 /*!< Size is in bytes*/
-/*! Maximal size of keying data in bytes. */
-#define CRYS_KDF_MAX_SIZE_OF_KEYING_DATA 2048
-
-/************************ Enums ********************************/
-/*! HASH operation modes */
-typedef enum
-{
- /*! SHA1 mode.*/
- CRYS_KDF_HASH_SHA1_mode = 0,
- /*! SHA224 mode.*/
- CRYS_KDF_HASH_SHA224_mode = 1,
- /*! SHA256 mode.*/
- CRYS_KDF_HASH_SHA256_mode = 2,
- /*! SHA384 mode.*/
- CRYS_KDF_HASH_SHA384_mode = 3,
- /*! SHA512 mode.*/
- CRYS_KDF_HASH_SHA512_mode = 4,
- /*! Maximal number of HASH modes. */
- CRYS_KDF_HASH_NumOfModes,
- /*! Reserved.*/
- CRYS_KDF_HASH_OpModeLast = 0x7FFFFFFF,
-
-}CRYS_KDF_HASH_OpMode_t;
-
-/*! Key derivation modes. */
-typedef enum
-{
- /*! ASN1 key derivation mode.*/
- CRYS_KDF_ASN1_DerivMode = 0,
- /*! Concatination key derivation mode.*/
- CRYS_KDF_ConcatDerivMode = 1,
- /*! X963 key derivation mode.*/
- CRYS_KDF_X963_DerivMode = CRYS_KDF_ConcatDerivMode,
- /*! ISO 18033 KDF1 key derivation mode.*/
- CRYS_KDF_ISO18033_KDF1_DerivMode = 3,
- /*! ISO 18033 KDF2 key derivation mode.*/
- CRYS_KDF_ISO18033_KDF2_DerivMode = 4,
- /*! Maximal number of key derivation modes. */
- CRYS_KDF_DerivFunc_NumOfModes = 5,
- /*! Reserved.*/
- CRYS_KDF_DerivFuncModeLast= 0x7FFFFFFF,
-
-}CRYS_KDF_DerivFuncMode_t;
-
-/************************ Typedefs ****************************/
-
-/*! Structure, containing the optional data (other info) for KDF,
- if any data is not needed, then the pointer value and
- the size must be set to NULL */
-typedef struct
-{
- /*! A unique object identifier (OID), indicating algorithm(s)
- for which the keying data is used. */
- uint8_t AlgorithmID[CRYS_KDF_MAX_SIZE_OF_OTHER_INFO_ENTRY];
- uint32_t SizeOfAlgorithmID; /*!< Size of algorithm ID.*/
- /*! Public information contributed by the initiator. */
- uint8_t PartyUInfo[CRYS_KDF_MAX_SIZE_OF_OTHER_INFO_ENTRY];
- uint32_t SizeOfPartyUInfo; /*!< Size of the Public information contributed by the initiator. */
- /*! Public information contributed by the responder. */
- uint8_t PartyVInfo[CRYS_KDF_MAX_SIZE_OF_OTHER_INFO_ENTRY];
- uint32_t SizeOfPartyVInfo; /*!< Size of the responder's public information. */
- /*! Mutually-known private information, e.g. shared information
- communicated throgh a separate channel. */
- uint8_t SuppPrivInfo[CRYS_KDF_MAX_SIZE_OF_OTHER_INFO_ENTRY];
- uint32_t SizeOfSuppPrivInfo; /*!< Size of the private information. */
- /*! Mutually-known public information, */
- uint8_t SuppPubInfo[CRYS_KDF_MAX_SIZE_OF_OTHER_INFO_ENTRY];
- uint32_t SizeOfSuppPubInfo; /*!< Size of the public information. */
-
-}CRYS_KDF_OtherInfo_t;
-
-/************************ Structs ******************************/
-
-/************************ Public Variables **********************/
-
-/************************ Public Functions **********************/
-
-/****************************************************************/
-
-
-/*********************************************************************************************************/
-/*!
- @brief CRYS_KDF_KeyDerivFunc performs key derivation according to one of the modes defined in standards:
- ANS X9.42-2001, ANS X9.63, ISO/IEC 18033-2.
-
-The present implementation of the function allows the following operation modes:
-<ul><li> CRYS_KDF_ASN1_DerivMode - mode based on ASN.1 DER encoding; </li>
-<li> CRYS_KDF_ConcatDerivMode - mode based on concatenation;</li>
-<li> CRYS_KDF_X963_DerivMode = CRYS_KDF_ConcatDerivMode;</li>
-<li> CRYS_KDF_ISO18033_KDF1_DerivMode - specific mode according to ECIES-KEM algorithm (ISO/IEC 18033-2).</li></ul>
-
-The purpose of this function is to derive a keying data from the shared secret value and some
-other optional shared information (SharedInfo).
-
-\note
-<ul id="noteb"><li> The length in Bytes of the hash result buffer is denoted by "hashlen".</li>
-<li> All buffers arguments are represented in Big-Endian format.</li>
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_kdf_error.h or crys_hash_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_KDF_KeyDerivFunc(
- uint8_t *ZZSecret_ptr, /*!< [in] A pointer to shared secret value octet string. */
- uint32_t ZZSecretSize, /*!< [in] The size of the shared secret value in bytes.
- The maximal size is defined as: CRYS_KDF_MAX_SIZE_OF_SHARED_SECRET_VALUE. */
- CRYS_KDF_OtherInfo_t *OtherInfo_ptr, /*!< [in] The pointer to structure, containing the data, shared by two entities of
- agreement and the data sizes. This argument may be optional in several modes
- (if it is not needed - set NULL).
- On two ISO/IEC 18033-2 modes - set NULL.
- On KDF ASN1 mode the OtherInfo and its AlgorithmID entry are mandatory. */
- CRYS_KDF_HASH_OpMode_t KDFhashMode, /*!< [in] The KDF identifier of hash function to be used. The hash function output
- must be at least 160 bits. */
- CRYS_KDF_DerivFuncMode_t derivation_mode, /*!< [in] Specifies one of above described derivation modes. */
- uint8_t *KeyingData_ptr, /*!< [out] A pointer to the buffer for derived keying data. */
- uint32_t KeyingDataSizeBytes /*!< [in] The size in bytes of the keying data to be derived.
- The maximal size is defined as: CRYS_KDF_MAX_SIZE_OF_KEYING_DATA. */
-);
-
-/*********************************************************************************************************/
-/*!
- CRYS_KDF_ASN1_KeyDerivFunc is A MACRO that performs key derivation according to ASN1 DER encoding method defined
- in standard ANS X9.42-2001, 7.2.1. For a description of the parameters see ::CRYS_KDF_KeyDerivFunc.
-*/
-#define CRYS_KDF_ASN1_KeyDerivFunc(ZZSecret_ptr,ZZSecretSize,OtherInfo_ptr,KDFhashMode,KeyingData_ptr,KeyLenInBytes)\
- CRYS_KDF_KeyDerivFunc((ZZSecret_ptr),(ZZSecretSize),(OtherInfo_ptr),(KDFhashMode),CRYS_KDF_ASN1_DerivMode,(KeyingData_ptr),(KeyLenInBytes))
-
-
-/*********************************************************************************************************/
-/*!
- CRYS_KDF_ConcatKeyDerivFunc is a MACRO that performs key derivation according to concatenation mode defined
- in standard ANS X9.42-2001, 7.2.2. For a description of the parameters see
- ::CRYS_KDF_KeyDerivFunc.
-*/
-#define CRYS_KDF_ConcatKeyDerivFunc(ZZSecret_ptr,ZZSecretSize,OtherInfo_ptr,KDFhashMode,KeyingData_ptr,KeyLenInBytes)\
- CRYS_KDF_KeyDerivFunc((ZZSecret_ptr),(ZZSecretSize),(OtherInfo_ptr),(KDFhashMode),CRYS_KDF_ConcatDerivMode,(KeyingData_ptr),(KeyLenInBytes))
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_kdf_error.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_kdf_error.h
deleted file mode 100644
index f550140..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_kdf_error.h
+++ /dev/null
@@ -1,105 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef CRYS_KDF_ERROR_H
-#define CRYS_KDF_ERROR_H
-
-#include "crys_error.h"
-
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*!
-@file
-@brief This module contains the definitions of the CRYS KDF errors.
-@defgroup crys_kdf_error CryptoCell Key Derivation specific errors
-@{
-@ingroup crys_kdf
- */
-
-
-/************************ Defines *******************************/
-
-/*! The CRYS KDF module errors / base address - 0x00F01100*/
-/*! Illegal input pointer. */
-#define CRYS_KDF_INVALID_ARGUMENT_POINTER_ERROR (CRYS_KDF_MODULE_ERROR_BASE + 0x0UL)
-/*! Illegal input size. */
-#define CRYS_KDF_INVALID_ARGUMENT_SIZE_ERROR (CRYS_KDF_MODULE_ERROR_BASE + 0x1UL)
-/*! Illegal operation mode. */
-#define CRYS_KDF_INVALID_ARGUMENT_OPERATION_MODE_ERROR (CRYS_KDF_MODULE_ERROR_BASE + 0x2UL)
-/*! Illegal hash mode. */
-#define CRYS_KDF_INVALID_ARGUMENT_HASH_MODE_ERROR (CRYS_KDF_MODULE_ERROR_BASE + 0x3UL)
-/*! Illegal key derivation mode. */
-#define CRYS_KDF_INVALID_KEY_DERIVATION_MODE_ERROR (CRYS_KDF_MODULE_ERROR_BASE + 0x4UL)
-/*! Illegal shared secret value size. */
-#define CRYS_KDF_INVALID_SHARED_SECRET_VALUE_SIZE_ERROR (CRYS_KDF_MODULE_ERROR_BASE + 0x5UL)
-/*! Illegal otherInfo size. */
-#define CRYS_KDF_INVALID_OTHER_INFO_SIZE_ERROR (CRYS_KDF_MODULE_ERROR_BASE + 0x6UL)
-/*! Illegal key data size. */
-#define CRYS_KDF_INVALID_KEYING_DATA_SIZE_ERROR (CRYS_KDF_MODULE_ERROR_BASE + 0x7UL)
-/*! Illegal algorithm ID pointer. */
-#define CRYS_KDF_INVALID_ALGORITHM_ID_POINTER_ERROR (CRYS_KDF_MODULE_ERROR_BASE + 0x8UL)
-/*! Illegal algorithm ID size. */
-#define CRYS_KDF_INVALID_ALGORITHM_ID_SIZE_ERROR (CRYS_KDF_MODULE_ERROR_BASE + 0x9UL)
-/*! KDF is not supproted. */
-#define CRYS_KDF_IS_NOT_SUPPORTED (CRYS_KDF_MODULE_ERROR_BASE + 0xFFUL)
-
-/************************ Enums *********************************/
-
-/************************ Typedefs *****************************/
-
-/************************ Structs ******************************/
-
-/************************ Public Variables **********************/
-
-/************************ Public Functions **********************/
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
-
-
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_pka_defs_hw.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_pka_defs_hw.h
deleted file mode 100644
index 5073ad2..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_pka_defs_hw.h
+++ /dev/null
@@ -1,128 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-
-#ifndef _CRYS_PKA_DEFS_HW_H_
-#define _CRYS_PKA_DEFS_HW_H_
-
-#include "ssi_pal_types.h"
-#include "ssi_pka_hw_plat_defs.h"
-
-/*!
-@defgroup cryptocell_pka CryptoCell PKA group
-@{
-@ingroup cryptocell_api
-@brief This group is the cryptocell PKA root group
-@}
-
-@file
-@brief The file contains all of the enums and definitions that are used in the PKA related code.
-@defgroup crys_pka_defs_hw CryptoCell PKA specific definitions
-@{
-@ingroup cryptocell_pka
-*/
-
-
-/* The valid key sizes in bits for RSA primitives (exponentiation) */
-/*! Maximal RSA modulus size */
-#define CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS ((CRYS_RSA_MAX_VALID_KEY_SIZE_VALUE_IN_BITS + SASI_PKA_WORD_SIZE_IN_BITS) / SASI_BITS_IN_32BIT_WORD )
-/*! Maximal EC modulus size */
-#define CRYS_ECPKI_MODUL_MAX_LENGTH_IN_BITS 521
-
-/*! size of buffers for Barrett modulus tag NP, used in PKI algorithms. */
-#define CRYS_PKA_BARRETT_MOD_TAG_BUFF_SIZE_IN_WORDS 5
-/*! size of buffers for Barrett modulus tag NP, used in ECC. */
-#define CRYS_PKA_ECPKI_BARRETT_MOD_TAG_BUFF_SIZE_IN_WORDS CRYS_PKA_BARRETT_MOD_TAG_BUFF_SIZE_IN_WORDS
-/*! Maximal PKA modulus size */
-#define CRYS_PKA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS
-/*! Maximal PKA public key size in words */
-#define CRYS_PKA_PUB_KEY_BUFF_SIZE_IN_WORDS (2*CRYS_PKA_BARRETT_MOD_TAG_BUFF_SIZE_IN_WORDS)
-/*! Maximal PKA private key size in words */
-#define CRYS_PKA_PRIV_KEY_BUFF_SIZE_IN_WORDS (2*CRYS_PKA_BARRETT_MOD_TAG_BUFF_SIZE_IN_WORDS)
-/*! Maximal PKA KG buffer size in words */
-#define CRYS_PKA_KGDATA_BUFF_SIZE_IN_WORDS (3*CRYS_PKA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS)
-
-
-/*! Maximal EC modulus size in words. */
-#define CRYS_ECPKI_MODUL_MAX_LENGTH_IN_WORDS 18 /*!< \internal [(CRYS_ECPKI_MODUL_MAX_LENGTH_IN_BITS + 31)/(sizeof(uint32_t)) + 1] */
-/*! Maximal EC order size in words. */
-#define CRYS_ECPKI_ORDER_MAX_LENGTH_IN_WORDS (CRYS_ECPKI_MODUL_MAX_LENGTH_IN_WORDS + 1)
-/*! Maximal EC domain size in words. */
-#define CRYS_PKA_DOMAIN_BUFF_SIZE_IN_WORDS (2*CRYS_PKA_BARRETT_MOD_TAG_BUFF_SIZE_IN_WORDS)
-
-
-/*! ECC NAF buffer definitions */
-#define COUNT_NAF_WORDS_PER_KEY_WORD 8 /*!< \internal Change according to NAF representation (? 2)*/
-/*! Maximal ECC NAF length */
-#define CRYS_PKA_ECDSA_NAF_BUFF_MAX_LENGTH_IN_WORDS (COUNT_NAF_WORDS_PER_KEY_WORD*CRYS_ECPKI_ORDER_MAX_LENGTH_IN_WORDS + 1)
-
-#ifndef SSI_SUPPORT_ECC_SCA_SW_PROTECT
-/* on fast SCA non protected mode required additional buffers for NAF key */
-/*! Scalar Buffer size in words */
-#define CRYS_PKA_ECPKI_SCALAR_MUL_BUFF_MAX_LENGTH_IN_WORDS (CRYS_PKA_ECDSA_NAF_BUFF_MAX_LENGTH_IN_WORDS+CRYS_ECPKI_MODUL_MAX_LENGTH_IN_WORDS+2)
-#else
-/*! Scalar Buffer size in words */
-#define CRYS_PKA_ECPKI_SCALAR_MUL_BUFF_MAX_LENGTH_IN_WORDS 1 /*(4*CRYS_ECPKI_MODUL_MAX_LENGTH_IN_WORDS)*/
-#endif
-/*! ECC temp buffer size in words */
-#define CRYS_PKA_ECPKI_BUILD_TMP_BUFF_MAX_LENGTH_IN_WORDS (3*CRYS_ECPKI_MODUL_MAX_LENGTH_IN_WORDS+CRYS_PKA_ECPKI_SCALAR_MUL_BUFF_MAX_LENGTH_IN_WORDS)
-/*! ECC sign temp buffer size in words */
-#define CRYS_PKA_ECDSA_SIGN_BUFF_MAX_LENGTH_IN_WORDS (6*CRYS_ECPKI_MODUL_MAX_LENGTH_IN_WORDS+CRYS_PKA_ECPKI_SCALAR_MUL_BUFF_MAX_LENGTH_IN_WORDS)
-/*! ECC ecdh temp buffer size in words */
-#define CRYS_PKA_ECDH_BUFF_MAX_LENGTH_IN_WORDS (2*CRYS_ECPKI_ORDER_MAX_LENGTH_IN_WORDS + CRYS_PKA_ECPKI_SCALAR_MUL_BUFF_MAX_LENGTH_IN_WORDS)
-/*! PKA KG temp buffer size in words */
-#define CRYS_PKA_KG_BUFF_MAX_LENGTH_IN_WORDS (2*CRYS_ECPKI_ORDER_MAX_LENGTH_IN_WORDS + CRYS_PKA_ECPKI_SCALAR_MUL_BUFF_MAX_LENGTH_IN_WORDS)
-/*! ECC verify temp buffer size in words */
-#define CRYS_PKA_ECDSA_VERIFY_BUFF_MAX_LENGTH_IN_WORDS (3*CRYS_ECPKI_MODUL_MAX_LENGTH_IN_WORDS)
-
-/* *************************************************************************** */
-/*! Definitions of maximal size of modulus buffers for CRYS_EC_MONT and EC_EDW in bytes */
-#define CRYS_EC_MONT_EDW_MODULUS_MAX_SIZE_IN_BYTES 32U /*!< \internal for Curve25519 */
-/*! Definitions of maximal size of modulus buffers for CRYS_EC_MONT and EC_EDW in words */
-#define CRYS_EC_MONT_EDW_MODULUS_MAX_SIZE_IN_WORDS 8U /*!< \internal for Curve25519 */
-/*! ECC montgomery temp buffer size in words */
-#define CRYS_EC_MONT_TEMP_BUFF_SIZE_IN_32BIT_WORDS (8 * CRYS_EC_MONT_EDW_MODULUS_MAX_SIZE_IN_WORDS)
-/*! ECC edwards temp buffer size in words */
-#define CRYS_EC_EDW_TEMP_BUFF_SIZE_IN_32BIT_WORD (8*CRYS_EC_MONT_EDW_MODULUS_MAX_SIZE_IN_WORDS + (sizeof(CRYS_HASHUserContext_t)+SASI_32BIT_WORD_SIZE-1)/SASI_32BIT_WORD_SIZE)
-
-/**
-@}
- */
-/**
-@}
- */
-#endif /*_CRYS_PKA_DEFS_HW_H_*/
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_poly.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_poly.h
deleted file mode 100644
index d8ad3e6..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_poly.h
+++ /dev/null
@@ -1,107 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-/*!
-@file
-@brief This file contains all of the enums and definitions that are used for the
- CRYS POLY APIs, as well as the APIs themselves.
-@defgroup crys_poly CryptoCell POLY APIs
-@{
-@ingroup cryptocell_api
-
-*/
-#ifndef CRYS_POLY_H
-#define CRYS_POLY_H
-
-
-#include "ssi_pal_types.h"
-#include "crys_error.h"
-
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/************************ Defines ******************************/
-/*! POLY KEY size in words. */
-#define CRYS_POLY_KEY_SIZE_IN_WORDS 8
-/*! POLY KEY size in bytes. */
-#define CRYS_POLY_KEY_SIZE_IN_BYTES (CRYS_POLY_KEY_SIZE_IN_WORDS*SASI_32BIT_WORD_SIZE)
-
-/*! POLY MAC size in words. */
-#define CRYS_POLY_MAC_SIZE_IN_WORDS 4
-/*! POLY MAC size in bytes. */
-#define CRYS_POLY_MAC_SIZE_IN_BYTES (CRYS_POLY_MAC_SIZE_IN_WORDS*SASI_32BIT_WORD_SIZE)
-
-/************************ Typedefs ****************************/
-
-/*! CHACHA MAC buffer definition. */
-typedef uint32_t CRYS_POLY_Mac_t[CRYS_POLY_MAC_SIZE_IN_WORDS];
-
-/*! CHACHA key buffer definition. */
-typedef uint32_t CRYS_POLY_Key_t[CRYS_POLY_KEY_SIZE_IN_WORDS];
-
-/************************ Public Functions **********************/
-
-/****************************************************************************************************/
-/*!
-@brief This function is used to perform the POLY MAC Calculation.
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_poly_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_POLY(
- CRYS_POLY_Key_t pKey, /*!< [in] A pointer to the user's key buffer. */
- uint8_t *pDataIn, /*!< [in] A pointer to the buffer of the input data to the CHACHA.
- must not be null. */
- size_t dataInSize, /*!< [in] The size of the input data. must not be 0. */
- CRYS_POLY_Mac_t macRes /*!< [in/out] Pointer to the MAC result buffer.*/
-);
-
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif /* #ifndef CRYS_POLY_H */
-
-
-
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_poly_error.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_poly_error.h
deleted file mode 100644
index 0b89892..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_poly_error.h
+++ /dev/null
@@ -1,89 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef CRYS_POLY_ERROR_H
-#define CRYS_POLY_ERROR_H
-
-
-#include "crys_error.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*!
-@file
-@brief This module contains the definitions of the CRYS POLY errors.
-@defgroup crys_poly_error CryptoCell POLY specific errors
-@{
-@ingroup crys_poly
-*/
-
-
-/************************ Defines ******************************/
-
-/*! The CRYS POLY module errors base address - 0x00F02500 */
-/*! Invalid key. */
-#define CRYS_POLY_KEY_INVALID_ERROR (CRYS_POLY_MODULE_ERROR_BASE + 0x01UL)
-/*! Invalid input data. */
-#define CRYS_POLY_DATA_INVALID_ERROR (CRYS_POLY_MODULE_ERROR_BASE + 0x02UL)
-/*! Illegal input data size. */
-#define CRYS_POLY_DATA_SIZE_INVALID_ERROR (CRYS_POLY_MODULE_ERROR_BASE + 0x03UL)
-/*! MAC calculation error. */
-#define CRYS_POLY_MAC_CALCULATION_ERROR (CRYS_POLY_MODULE_ERROR_BASE + 0x04UL)
-
-/************************ Enums ********************************/
-
-/************************ Typedefs ****************************/
-
-/************************ Structs *****************************/
-
-/************************ Public Variables *********************/
-
-/************************ Public Functions *********************/
-
-#ifdef __cplusplus
-}
-#endif
-
-
-/**
-@}
- */
-
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_rnd.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_rnd.h
deleted file mode 100644
index 653768c..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_rnd.h
+++ /dev/null
@@ -1,398 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-
-#ifndef CRYS_RND_H
-#define CRYS_RND_H
-
-#include "crys_error.h"
-#include "ssi_aes.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*!
-@file
-@brief This file contains the CRYS APIs used for random number generation.
-The random-number generation module implements referenced standard [SP800-90].
-@defgroup crys_rnd CryptoCell Random Generator APIs
-@{
-@ingroup cryptocell_api
-*/
-
-/************************ Defines ******************************/
-
-/*! Maximal reseed counter - indicates maximal number of
-requests allowed between reseeds; according to NIST 800-90
-it is (2^48 - 1), our restriction is : (0xFFFFFFFF - 0xF).*/
-#define CRYS_RND_MAX_RESEED_COUNTER (0xFFFFFFFF - 0xF)
-
-/* Max size for one RNG generation (in bits) =
- max_num_of_bits_per_request = 2^19 (FIPS 800-90 Tab.3) */
-/*! Maximal size of generated vector in bits. */
-#define CRYS_RND_MAX_GEN_VECTOR_SIZE_BITS 0x7FFFF
-/*! Maximal size of generated vector in bytes. */
-#define CRYS_RND_MAX_GEN_VECTOR_SIZE_BYTES 0xFFFF
-
-/*! AES output block size in words. */
-#define CRYS_RND_AES_BLOCK_SIZE_IN_WORDS SASI_AES_BLOCK_SIZE_IN_WORDS
-
-
-/* RND seed and additional input sizes */
-/*! Maximal size of random seed in words. */
-#define CRYS_RND_SEED_MAX_SIZE_WORDS 12
-
-#ifndef CRYS_RND_ADDITINAL_INPUT_MAX_SIZE_WORDS
-/*! Maximal size of additional input data in words. */
-#define CRYS_RND_ADDITINAL_INPUT_MAX_SIZE_WORDS CRYS_RND_SEED_MAX_SIZE_WORDS
-#endif
-
-/* allowed sizes of AES Key, in words */
-/*! AES key size (128 bits) in words. */
-#define CRYS_RND_AES_KEY_128_SIZE_WORDS 4
-/*! AES key size (192 bits) in words. */
-#define CRYS_RND_AES_KEY_192_SIZE_WORDS 6
-/*! AES key size (256 bits) in words. */
-#define CRYS_RND_AES_KEY_256_SIZE_WORDS 8
-
-/* Definitions of temp buffer for RND_DMA version of CRYS_RND */
-/*******************************************************************/
-/* Definitions of temp buffer for DMA version of CRYS_RND */
-
-/*! Temporary buffer size in words. */
-#define CRYS_RND_WORK_BUFFER_SIZE_WORDS 1528
-
-/*! A definition for RAM buffer to be internally used in instantiation (or reseeding) operation. */
-typedef struct
-{
- /*! Internal buffer*/
- uint32_t crysRndWorkBuff[CRYS_RND_WORK_BUFFER_SIZE_WORDS];
-}CRYS_RND_WorkBuff_t;
-
-/*! A definition for entropy estimation data type. */
-#define CRYS_RND_EntropyEstimatData_t CRYS_RND_WorkBuff_t
-/*! A definition for entropy estimation buffer. */
-#define crysRndEntrIntBuff crysRndWorkBuff
-
-
-/* RND source buffer inner (entrpopy) offset */
-/*! An internal offset definition. */
-#define CRYS_RND_TRNG_SRC_INNER_OFFSET_WORDS 2
-/*! An internal offset definition. */
-#define CRYS_RND_TRNG_SRC_INNER_OFFSET_BYTES (CRYS_RND_TRNG_SRC_INNER_OFFSET_WORDS*sizeof(uint32_t))
-
-
-
-
-/* Size of the expected output buffer used by FIPS KAT */
-/*! FIPS Known answer test output size. */
-#define CRYS_PRNG_FIPS_KAT_OUT_DATA_SIZE 64
-
-/************************ Enumerators ****************************/
-
-/*! Definition of random operation modes. */
-typedef enum
-{
- /*! SW entropy estimation mode. */
- CRYS_RND_Fast = 0,
- /*! Full entropy mode. */
- CRYS_RND_Slow = 1,
- /*! Reserved. */
- CRYS_RND_ModeLast = 0x7FFFFFFF,
-} CRYS_RND_mode_t;
-
-
-
-/************************ Structs *****************************/
-
-
-/* The internal state of DRBG mechanism based on AES CTR and CBC-MAC
- algorithms. It is set as global data defined by the following
- structure */
-/*! RND state structure. Includes internal data that needs to be saved between boots by the user.*/
-typedef struct
-{
- /* Seed buffer, consists from concatenated Key||V: max size 12 words */
- /*! Random Seed buffer */
- uint32_t Seed[CRYS_RND_SEED_MAX_SIZE_WORDS];
- /* Previous value for continuous test */
- /*! Previous random data (used for continuous test). */
- uint32_t PreviousRandValue[SASI_AES_BLOCK_SIZE_IN_WORDS];
-
- /* AdditionalInput buffer max size = seed max size words + 4w for padding*/
- /*! Previous additional input buffer. */
- uint32_t PreviousAdditionalInput[CRYS_RND_ADDITINAL_INPUT_MAX_SIZE_WORDS+5];
- /*! Additional input buffer. */
- uint32_t AdditionalInput[CRYS_RND_ADDITINAL_INPUT_MAX_SIZE_WORDS+4];
- /*! Additional input size in words. */
- uint32_t AddInputSizeWords; /* size of additional data set by user, words */
-
- /*! Entropy source size in words */
- uint32_t EntropySourceSizeWords;
-
- /*! Reseed counter (32 bits active) - indicates number of requests for entropy
- since instantiation or reseeding */
- uint32_t ReseedCounter;
-
- /*! Key size: 4 or 8 words according to security strength 128 bits or 256 bits*/
- uint32_t KeySizeWords;
-
- /* State flag (see definition of StateFlag above), containing bit-fields, defining:
- - b'0: instantiation steps: 0 - not done, 1 - done;
- - 2b'9,8: working or testing mode: 0 - working, 1 - KAT DRBG test, 2 -
- KAT TRNG test;
- b'16: flag defining is Previous random valid or not:
- 0 - not valid, 1 - valid */
- /*! State flag used internally in the code.*/
- uint32_t StateFlag;
-
- /* Trng processing flag - indicates which ROSC lengths are:
- - allowed (bits 0-3);
- - total started (bits 8-11);
- - processed (bits 16-19);
- - started, but not processed (bits24-27) */
- /*! TRNG process state used internally in the code */
- uint32_t TrngProcesState;
-
- /* validation tag */
- /*! Validation tag used internally in the code */
- uint32_t ValidTag;
-
- /*! Rnd source entropy size in bits */
- uint32_t EntropySizeBits;
-
-} CRYS_RND_State_t;
-
-
-/*! The RND Generate vector function pointer type definition.
- The prototype intendent for External and CRYS internal RND functions
- pointers definitions.
- Full description can be found in ::CRYS_RND_GenerateVector function API. */
-typedef uint32_t (*SaSiRndGenerateVectWorkFunc_t)( \
- void *rndState_ptr, /*context*/ \
- uint16_t outSizeBytes, /*in*/ \
- uint8_t *out_ptr /*out*/);
-
-
-
-/*! Data structure required for internal FIPS verification for PRNG KAT. */
-typedef struct
-{
- /*! Internal working buffer. */
- CRYS_RND_WorkBuff_t rndWorkBuff;
- /*! Output buffer. */
- uint8_t rndOutputBuff[CRYS_PRNG_FIPS_KAT_OUT_DATA_SIZE];
-} CRYS_PrngFipsKatCtx_t;
-
-
-/*****************************************************************************/
-/********************** Public Functions *************************/
-/*****************************************************************************/
-
-/*!
-@brief This function needs to be called once.
-It calls CRYS_RND_Instantiation to initialize the TRNG and the primary RND context.
-An initialized RND context is required for calling RND APIs and asymmetric cryptography key generation and signatures.
-The primary context returned by this function can be used as a single global context for all RND needs.
-Alternatively, other contexts may be initialized and used with a more limited scope (for specific applications or specific threads).
-
-\note The Mutexes, if used, are initialized by this API. Therefore, unlike the other APIs in the library,
-this API is not thread-safe.
-
-@param[in/out] rnd_ctx - Pointer to the RND state structure.
-@param[in/out] rndWorkBuff_ptr - Pointer to the RND scratch buffer.
-*/
-CEXPORT_C CRYSError_t CRYS_RndInit(void* rnd_ctx, /*!< [in/out] Pointer to the RND state buffer,
- allocated by the user. This state must be saved and provided
- as parameter to any API that uses the RND module.*/
- CRYS_RND_WorkBuff_t *rndWorkBuff_ptr /*!< [in] Scratchpad for the RND module's work. */);
-
-/*!
-@brief This function initializes the RND context.
-It must be called at least once prior to using this context with any API that requires it as a parameter (e.g., other RND APIs, asymmetric
-cryptography key generation and signatures).
-It is called as part of ARM TrustZone CryptoCell library initialization, which initializes and returns the primary RND context.
-This primary context can be used as a single global context for all RND needs.
-Alternatively, other contexts may be initialized and used with a more limited scope (for specific applications or specific threads).
-The call to this function must be followed by a call to ::CRYS_RND_SetGenerateVectorFunc API to set the generate vector function.
-It implements referenced standard [SP800-90] - 10.2.1.3.2 - CTR-DRBG Instantiate algorithm using AES (FIPS-PUB 197) and Derivation Function (DF).
-\note Additional data can be mixed with the random seed (personalization data or nonce). If required, this data should be provided by calling ::CRYS_RND_AddAdditionalInput prior to using this API.
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_rnd_error.h on failure.
-*/
-CIMPORT_C CRYSError_t CRYS_RND_Instantiation(
- void *rndState_ptr, /*!< [in/out] Pointer to the RND state buffer allocated by the user, which is used to
- maintain the RND state. This context state must be saved and provided as a
- parameter to any API that uses the RND module.
- \note the context must be cleared before sent to the function. */
- CRYS_RND_WorkBuff_t *rndWorkBuff_ptr /*!< [in/out] Scratchpad for the RND module's work. */
-);
-
-
-/*!
-@brief Clears existing RNG instantiation state.
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_rnd_error.h on failure.
-*/
-CIMPORT_C CRYSError_t CRYS_RND_UnInstantiation(
- void *rndState_ptr /*!< [in/out] Pointer to the RND context state buffer. */
-);
-
-
-/*!
-@brief This function is used for reseeding the RNG with additional entropy and additional user-provided input.
-(additional data should be provided by calling ::CRYS_RND_AddAdditionalInput prior to using this API).
-It implements referenced standard [SP800-90] - 10.2.1.4.2 - CTR-DRBG Reseeding algorithm, using AES (FIPS-PUB 197) and Derivation Function (DF).
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_rnd_error.h on failure.
-*/
-CIMPORT_C CRYSError_t CRYS_RND_Reseeding(
- void *rndState_ptr, /*!< [in/out] Pointer to the RND context buffer. */
- CRYS_RND_WorkBuff_t *rndWorkBuff_ptr /*!< [in/out] Scratchpad for the RND module's work. */
-);
-
-
-/****************************************************************************************/
-/*!
-@brief Generates a random vector according to the algorithm defined in referenced standard [SP800-90] - 10.2.1.5.2 - CTR-DRBG.
-The generation algorithm uses AES (FIPS-PUB 197) and Derivation Function (DF).
-
-\note
-<ul id="noteb"><li> The RND module must be instantiated prior to invocation of this API.</li>
-<li> In the following cases, Reseeding operation must be performed prior to vector generation:</li>
- <ul><li> Prediction resistance is required.</li>
- <li> The function returns CRYS_RND_RESEED_COUNTER_OVERFLOW_ERROR, stating that the Reseed Counter has passed its upper-limit (2^32-2).</li></ul></ul>
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_rnd_error.h on failure.
-*/
-CIMPORT_C CRYSError_t CRYS_RND_GenerateVector(
- void *rndState_ptr, /*!< [in/out] Pointer to the RND state structure, which is part of the RND context structure.
- Use rndContext->rndState field of the context for this parameter. */
- uint16_t outSizeBytes, /*!< [in] The size in bytes of the random vector required. The maximal size is 2^16 -1 bytes. */
- uint8_t *out_ptr /*!< [out] The pointer to output buffer. */
-);
-
-
-
-/**********************************************************************************************************/
-/*!
-@brief Generates a random vector with specific limitations by testing candidates (described and used in FIPS 186-4: B.1.2, B.4.2 etc.).
-
-This function draws a random vector, compare it to the range limits, and if within range - return it in rndVect_ptr.
-If outside the range, the function continues retrying until a conforming vector is found, or the maximal retries limit is exceeded.
-If maxVect_ptr is provided, rndSizeInBits specifies its size, and the output vector must conform to the range [1 < rndVect < maxVect].
-If maxVect_ptr is NULL, rndSizeInBits specifies the exact required vector size, and the output vector must be the exact same
-bit size (with its most significant bit = 1).
-\note
-The RND module must be instantiated prior to invocation of this API.
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_rnd_error.h on failure.
-*/
-CIMPORT_C CRYSError_t CRYS_RND_GenerateVectorInRange(
- void *rndState_ptr, /*!< [in/out] Pointer to the RND state structure. */
- SaSiRndGenerateVectWorkFunc_t rndGenerateVectFunc, /*!< [in] Pointer to the random vector generation function. */
- uint32_t rndSizeInBits, /*!< [in] The size in bits of the random vector required. The allowed size in range 2 <= rndSizeInBits < 2^19-1, bits. */
- uint8_t *maxVect_ptr, /*!< [in] Pointer to the vector defining the upper limit for the random vector output, Given as little-endian byte array.
- If not NULL, its actual size is treated as [(rndSizeInBits+7)/8] bytes and its value must be in range (3, 2^19) */
- uint8_t *rndVect_ptr /*!< [in/out] Pointer to the output buffer for the random vector. Must be at least [(rndSizeInBits+7)/8] bytes.
- Treated as little-endian byte array. */
-);
-
-
-/*************************************************************************************/
-/*!
-@brief Used for adding additional input/personalization data provided by the user,
-to be later used by the ::CRYS_RND_Instantiation/::CRYS_RND_Reseeding/::CRYS_RND_GenerateVector functions.
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_rnd_error.h on failure.
-*/
-CIMPORT_C CRYSError_t CRYS_RND_AddAdditionalInput(
- void *rndState_ptr, /*!< [in/out] Pointer to the RND context state buffer. */
- uint8_t *additonalInput_ptr, /*!< [in] The Additional Input buffer. */
- uint16_t additonalInputSize /*!< [in] The size of the Additional Input buffer. It must
- be <= CRYS_RND_ADDITINAL_INPUT_MAX_SIZE_WORDS and a multiple of 4. */
-);
-
-/*!
-@brief The CRYS_RND_EnterKatMode function sets KAT mode bit into StateFlag of global CRYS_RND_WorkingState structure.
-
-The user must call this function before calling functions performing KAT tests.
-
-\note Total size of entropy and nonce must be not great than 126 words (maximal size of entropy and nonce).
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_rnd_error.h on failure.
-*/
-CIMPORT_C CRYSError_t CRYS_RND_EnterKatMode(
- void *rndState_ptr, /*!< [in/out] Pointer to the RND context state buffer. */
- uint8_t *entrData_ptr, /*!< [in] Entropy data. */
- uint32_t entrSize, /*!< [in] Entropy size in bytes. */
- uint8_t *nonce_ptr, /*!< [in] Nonce. */
- uint32_t nonceSize, /*!< [in] Entropy size in bytes. */
- CRYS_RND_WorkBuff_t *workBuff_ptr /*!< [out] RND working buffer, must be the same buffer, which should be passed into
- Instantiation/Reseeding functions. */
-);
-
-/**********************************************************************************************************/
-/*!
-@brief The CRYS_RND_DisableKatMode function disables KAT mode bit into StateFlag of global CRYS_RND_State_t structure.
-
-The user must call this function after KAT tests before actual using RND module (Instantiation etc.).
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_rnd_error.h on failure.
-*/
-CIMPORT_C void CRYS_RND_DisableKatMode(
- void *rndState_ptr /*!< [in/out] Pointer to the RND state buffer. */
-);
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif /* #ifndef CRYS_RND_H */
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_rnd_error.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_rnd_error.h
deleted file mode 100644
index 417eaff..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_rnd_error.h
+++ /dev/null
@@ -1,160 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-
-#ifndef CRYS_RND_ERROR_H
-#define CRYS_RND_ERROR_H
-
-#include "crys_error.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-
-/*!
-@file
-@brief This module contains the definitions of the CRYS RND errors.
-@defgroup crys_rnd_error CryptoCell RND specific errors
-@{
-@ingroup crys_rnd
-*/
-
-
-
-/************************ Defines ******************************/
-/*! RND module on the CRYS layer base address - 0x00F00C00 */
-
-/*! Illegal output pointer.*/
-#define CRYS_RND_DATA_OUT_POINTER_INVALID_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0x0UL)
-/*! Random generation in range failed .*/
-#define CRYS_RND_CAN_NOT_GENERATE_RAND_IN_RANGE (CRYS_RND_MODULE_ERROR_BASE + 0x1UL)
-/*! CPRNGT test failed.*/
-#define CRYS_RND_CPRNG_TEST_FAIL_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0x2UL)
-/*! Illegal additional data buffer. */
-#define CRYS_RND_ADDITIONAL_INPUT_BUFFER_NULL (CRYS_RND_MODULE_ERROR_BASE + 0x3UL)
-/*! Illegal additional data size. */
-#define CRYS_RND_ADDITIONAL_INPUT_SIZE_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0x4UL)
-/*! Data size overflow. */
-#define CRYS_RND_DATA_SIZE_OVERFLOW_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0x5UL)
-/*! Illegal vector size. */
-#define CRYS_RND_VECTOR_SIZE_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0x6UL)
-/*! Reseed counter overflow - in case this error was returned instantiation or reseeding operation must be called. */
-#define CRYS_RND_RESEED_COUNTER_OVERFLOW_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0x7UL)
-/*! Instantiation was not yet called. */
-#define CRYS_RND_INSTANTIATION_NOT_DONE_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0x8UL)
-/*! TRNG loss of samples. */
-#define CRYS_RND_TRNG_LOSS_SAMPLES_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0x9UL)
-/*! TRNG Time exceeded limitations. */
-#define CRYS_RND_TRNG_TIME_EXCEED_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0xAUL)
-/*! TRNG loss of samples and time exceeded limitations. */
-#define CRYS_RND_TRNG_LOSS_SAMPLES_AND_TIME_EXCEED_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0xBUL)
-/*! RND is in Known Answer Test mode. */
-#define CRYS_RND_IS_KAT_MODE_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0xCUL)
-/*! RND operation not supported. */
-#define CRYS_RND_OPERATION_IS_NOT_SUPPORTED_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0xDUL)
-/*! RND validity check failed. */
-#define CRYS_RND_STATE_VALIDATION_TAG_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0xEUL)
-/*! RND is not supported. */
-#define CRYS_RND_IS_NOT_SUPPORTED (CRYS_RND_MODULE_ERROR_BASE + 0xFUL)
-/*! RND Init failed. */
-#define CRYS_RND_INIT_FAILED (CRYS_RND_MODULE_ERROR_BASE + 0x10UL)
-/*! RND Init failed. */
-#define CRYS_RND_STARTUP_FAILED (CRYS_RND_MODULE_ERROR_BASE + 0x11UL)
-/*! Instantiation Failed. */
-#define CRYS_RND_INSTANTIATION_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0x12L)
-
-
-/*! Illegal generate vector function pointer. */
-#define CRYS_RND_GEN_VECTOR_FUNC_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0x14UL)
-
-/*! Illegal work buffer pointer. */
-#define CRYS_RND_WORK_BUFFER_PTR_INVALID_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0x20UL)
-/*! Illegal AES key size. */
-#define CRYS_RND_ILLEGAL_AES_KEY_SIZE_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0x21UL)
-/*! Illegal data pointer. */
-#define CRYS_RND_ILLEGAL_DATA_PTR_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0x22UL)
-/*! Illegal data size. */
-#define CRYS_RND_ILLEGAL_DATA_SIZE_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0x23UL)
-/*! Illegal parameter. */
-#define CRYS_RND_ILLEGAL_PARAMETER_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0x24UL)
-/*! Illegal RND state pointer. */
-#define CRYS_RND_STATE_PTR_INVALID_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0x25UL)
-/*! TRNG errors. */
-#define CRYS_RND_TRNG_ERRORS_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0x26UL)
-/*! Illegal context pointer. */
-#define CRYS_RND_CONTEXT_PTR_INVALID_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0x27UL)
-
-/*! Illegal output vector pointer. */
-#define CRYS_RND_VECTOR_OUT_PTR_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0x30UL)
-/*! Illegal output vector size. */
-#define CRYS_RND_VECTOR_OUT_SIZE_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0x31UL)
-/*! Maximal vector size is too small. */
-#define CRYS_RND_MAX_VECTOR_IS_TOO_SMALL_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0x32UL)
-/*! Illegal Known Answer Tests parameters. */
-#define CRYS_RND_KAT_DATA_PARAMS_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0x33UL)
-/*! TRNG Known Answer Test not supported. */
-#define CRYS_RND_TRNG_KAT_NOT_SUPPORTED_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0x34UL)
-/*! SRAM memory is not defined. */
-#define CRYS_RND_SRAM_NOT_SUPPORTED_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0x35UL)
-/*! AES operation failure. */
-#define CRYS_RND_AES_ERROR (CRYS_RND_MODULE_ERROR_BASE + 0x36UL)
-
-
-/************************ Enums ********************************/
-
-
-/************************ Typedefs ****************************/
-
-
-/************************ Structs ******************************/
-
-
-/************************ Public Variables **********************/
-
-
-/************************ Public Functions **********************/
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_rsa_build.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_rsa_build.h
deleted file mode 100644
index a48e46f..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_rsa_build.h
+++ /dev/null
@@ -1,152 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-#ifndef CRYS_RSA_BUILD_H
-#define CRYS_RSA_BUILD_H
-
-
-#include "crys_error.h"
-#include "crys_rsa_types.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*!
-@defgroup crys_rsa CryptoCell RSA APIs
-@{
-@ingroup cryptocell_api
-@brief This group is the cryptocell ECC root group
-@}
-
-@file
-@brief This module defines some utility functions for working with RSA cryptography.
-@defgroup crys_rsa_build CryptoCell RSA Utility APIs
-@{
-@ingroup crys_rsa
-*/
-
-/******************************************************************************************/
-/*!
-@brief Builds a ::CRYSRSAPubKey_t public key structure with the provided modulus and exponent.
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_rsa_error.h on failure.
-*/
-CIMPORT_C CRYSError_t CRYS_RSA_Build_PubKey(
- CRYS_RSAUserPubKey_t *UserPubKey_ptr, /*!< [out] Pointer to the public key structure. */
- uint8_t *Exponent_ptr, /*!< [in] Pointer to the exponent stream of bytes (Big-Endian format). */
- uint16_t ExponentSize, /*!< [in] The size of the exponent (in bytes). */
- uint8_t *Modulus_ptr, /*!< [in] Pointer to the modulus stream of bytes (Big-Endian format).
- The most significant bit (MSB) must be set to '1'. */
- uint16_t ModulusSize /*!< [in] The modulus size in bytes. Supported sizes are 64, 128, 256, 384 and 512. */
-);
-
-
-/******************************************************************************************/
-/*!
-@brief Builds a ::CRYSRSAPrivKey_t private key structure with the provided modulus and exponent, marking the key as a non-CRT key.
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_rsa_error.h on failure.
-*/
-CIMPORT_C CRYSError_t CRYS_RSA_Build_PrivKey(
- CRYS_RSAUserPrivKey_t *UserPrivKey_ptr, /*!< [out] Pointer to the public key structure.*/
- uint8_t *PrivExponent_ptr, /*!< [in] Pointer to the private exponent stream of bytes (Big-Endian format). */
- uint16_t PrivExponentSize, /*!< [in] The size of the private exponent (in bytes). */
- uint8_t *PubExponent_ptr, /*!< [in] Pointer to the public exponent stream of bytes (Big-Endian format). */
- uint16_t PubExponentSize, /*!< [in] The size of the public exponent (in bytes). */
- uint8_t *Modulus_ptr, /*!< [in] Pointer to the modulus stream of bytes (Big-Endian format).
- The most significant bit must be set to '1'. */
- uint16_t ModulusSize /*!< [in] The modulus size in bytes. Supported sizes are 64, 128, 256, 384 and 512. */
-);
-
-/******************************************************************************************/
-/*!
-@brief Builds a ::CRYSRSAPrivKey_t private key structure with the provided parameters, marking the key as a CRT key.
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_rsa_error.h on failure.
-*/
-CIMPORT_C CRYSError_t CRYS_RSA_Build_PrivKeyCRT(
- CRYS_RSAUserPrivKey_t *UserPrivKey_ptr, /*!< [out] Pointer to the public key structure. */
- uint8_t *P_ptr, /*!< [in] Pointer to the first factor stream of bytes (Big-Endian format). */
- uint16_t PSize, /*!< [in] The size of the first factor (in bytes). */
- uint8_t *Q_ptr, /*!< [in] Pointer to the second factor stream of bytes (Big-Endian format). */
- uint16_t QSize, /*!< [in] The size of the second factor (in bytes). */
- uint8_t *dP_ptr, /*!< [in] Pointer to the first factor's CRT exponent stream of bytes
- (Big-Endian format). */
- uint16_t dPSize, /*!< [in] The size of the first factor's CRT exponent (in bytes). */
- uint8_t *dQ_ptr, /*!< [in] Pointer to the second factor's CRT exponent stream of bytes
- (Big-Endian format). */
- uint16_t dQSize, /*!< [in] The size of the second factor's CRT exponent (in bytes). */
- uint8_t *qInv_ptr, /*!< [in] Pointer to the first CRT coefficient stream of bytes (Big-Endian format). */
- uint16_t qInvSize /*!< [in] The size of the first CRT coefficient (in bytes). */
-);
-
-
-/******************************************************************************************/
-/*!
-@brief The function gets the e,n public key parameters from the input
-CRYS_RSAUserPubKey_t structure. The function can also be used to retrieve the
-modulus and exponent sizes only (Exponent_ptr AND Modulus_ptr must be set to
-NULL).
-
-\note All members of input UserPubKey_ptr structure must be initialized.
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_rsa_error.h on failure.
-*/
-CIMPORT_C CRYSError_t CRYS_RSA_Get_PubKey(
- CRYS_RSAUserPubKey_t *UserPubKey_ptr, /*!< [in] A pointer to the public key structure. */
- uint8_t *Exponent_ptr, /*!< [out] A pointer to the exponent stream of bytes (Big-Endian format). */
- uint16_t *ExponentSize_ptr, /*!< [in/out] the size of the exponent buffer in bytes,
- it is updated to the actual size of the exponent, in bytes. */
- uint8_t *Modulus_ptr, /*!< [out] A pointer to the modulus stream of bytes (Big-Endian format).
- The MS (most significant) bit must be set to '1'. */
- uint16_t *ModulusSize_ptr /*!< [in/out] the size of the modulus buffer in bytes, it is updated to the actual
- size of the modulus, in bytes. */
-);
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_rsa_error.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_rsa_error.h
deleted file mode 100644
index 0f8f8d9..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_rsa_error.h
+++ /dev/null
@@ -1,277 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
- #ifndef CRYS_RSA_ERROR_H
-#define CRYS_RSA_ERROR_H
-
-
-#include "crys_error.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*! @file
-@brief This module contains the definitions of the CRYS RSA errors.
-@defgroup crys_rsa_error CryptoCell RSA specific errors
-@{
-@ingroup crys_rsa
-*/
-
-/************************ Defines ******************************/
-
-/*! CRYS RSA module on the CRYS layer base address - 0x00F00400 */
-
-/*! The CRYS RSA module errors */
-/*! Illegal modulus size. */
-#define CRYS_RSA_INVALID_MODULUS_SIZE (CRYS_RSA_MODULE_ERROR_BASE + 0x0UL)
-/*! Illegal modulus pointer. */
-#define CRYS_RSA_INVALID_MODULUS_POINTER_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x1UL)
-/*! Illegal exponent pointer. */
-#define CRYS_RSA_INVALID_EXPONENT_POINTER_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x2UL)
-/*! Illegal public key structure pointer. */
-#define CRYS_RSA_INVALID_PUB_KEY_STRUCT_POINTER_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x3UL)
-/*! Illegal private key structure pointer. */
-#define CRYS_RSA_INVALID_PRIV_KEY_STRUCT_POINTER_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x4UL)
-/*! Illegal exponent value. */
-#define CRYS_RSA_INVALID_EXPONENT_VAL (CRYS_RSA_MODULE_ERROR_BASE + 0x5UL)
-/*! Illegal exponent size. */
-#define CRYS_RSA_INVALID_EXPONENT_SIZE (CRYS_RSA_MODULE_ERROR_BASE + 0x6UL)
-/*! Illegal CRT first factor pointer (P_ptr) . */
-#define CRYS_RSA_INVALID_CRT_FIRST_FACTOR_POINTER_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x7UL)
-/*! Illegal CRT second factor pointer (Q_ptr) . */
-#define CRYS_RSA_INVALID_CRT_SECOND_FACTOR_POINTER_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x8UL)
-/*! Illegal CRT first exponent factor pointer (dP_ptr) . */
-#define CRYS_RSA_INVALID_CRT_FIRST_FACTOR_EXP_PTR_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x9UL)
-/*! Illegal CRT second exponent factor pointer (dQ_ptr) . */
-#define CRYS_RSA_INVALID_CRT_SECOND_FACTOR_EXP_PTR_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0xAUL)
-/*! Illegal CRT coefficient pointer (qInv_ptr) . */
-#define CRYS_RSA_INVALID_CRT_COEFFICIENT_PTR_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0xBUL)
-/*! Illegal CRT first factor size (Psize). */
-#define CRYS_RSA_INVALID_CRT_FIRST_FACTOR_SIZE (CRYS_RSA_MODULE_ERROR_BASE + 0xCUL)
-/*! Illegal CRT second factor size (Qsize). */
-#define CRYS_RSA_INVALID_CRT_SECOND_FACTOR_SIZE (CRYS_RSA_MODULE_ERROR_BASE + 0xDUL)
-/*! Illegal CRT first and second factor size (Psize + Qsize). */
-#define CRYS_RSA_INVALID_CRT_FIRST_AND_SECOND_FACTOR_SIZE (CRYS_RSA_MODULE_ERROR_BASE + 0xEUL)
-/*! Illegal CRT first factor exponent value (dP). */
-#define CRYS_RSA_INVALID_CRT_FIRST_FACTOR_EXPONENT_VAL (CRYS_RSA_MODULE_ERROR_BASE + 0xFUL)
-/*! Illegal CRT first factor exponent value (dQ). */
-#define CRYS_RSA_INVALID_CRT_SECOND_FACTOR_EXPONENT_VAL (CRYS_RSA_MODULE_ERROR_BASE + 0x10UL)
-/*! Illegal CRT coefficient value (qInv). */
-#define CRYS_RSA_INVALID_CRT_COEFF_VAL (CRYS_RSA_MODULE_ERROR_BASE + 0x11UL)
-/*! Illegal data in. */
-#define CRYS_RSA_DATA_POINTER_INVALID_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x12UL)
-/*! Illegal message data size. */
-#define CRYS_RSA_INVALID_MESSAGE_DATA_SIZE (CRYS_RSA_MODULE_ERROR_BASE + 0x13UL)
-/*! Illegal message value. */
-#define CRYS_RSA_INVALID_MESSAGE_VAL (CRYS_RSA_MODULE_ERROR_BASE + 0x14UL)
-
-/*! Modulus even error. */
-#define CRYS_RSA_MODULUS_EVEN_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x15UL)
-/*! Illegal context pointer. */
-#define CRYS_RSA_INVALID_USER_CONTEXT_POINTER_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x16UL)
-/*! Illegal hash operation mode. */
-#define CRYS_RSA_HASH_ILLEGAL_OPERATION_MODE_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x17UL)
-/*! Illegal MGF value. */
-#define CRYS_RSA_MGF_ILLEGAL_ARG_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x18UL)
-/*! Illegal PKCS1 version. */
-#define CRYS_RSA_PKCS1_VER_ARG_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x19UL)
-
-/*! Invalid private key. */
-#define CRYS_RSA_PRIV_KEY_VALIDATION_TAG_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x1AUL)
-/*! Invalid public key. */
-#define CRYS_RSA_PUB_KEY_VALIDATION_TAG_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x1BUL)
-/*! Invalid context. */
-#define CRYS_RSA_USER_CONTEXT_VALIDATION_TAG_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x1CUL)
-/*! Illegal output pointer. */
-#define CRYS_RSA_INVALID_OUTPUT_POINTER_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x1DUL)
-/*! Illegal output size pointer. */
-#define CRYS_RSA_INVALID_OUTPUT_SIZE_POINTER_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x1FUL)
-/*! Illegal temporary buffer pointer. */
-#define CRYS_RSA_CONV_TO_CRT_INVALID_TEMP_BUFF_POINTER_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x20UL)
-
-/*! OAEP encode parameter string is too long. */
-#define CRYS_RSA_BASE_OAEP_ENCODE_PARAMETER_STRING_TOO_LONG (CRYS_RSA_MODULE_ERROR_BASE + 0x22UL)
-/*! OAEP decode parameter string is too long. */
-#define CRYS_RSA_BASE_OAEP_DECODE_PARAMETER_STRING_TOO_LONG (CRYS_RSA_MODULE_ERROR_BASE + 0x23UL)
-/*! OAEP encode message is too long. */
-#define CRYS_RSA_BASE_OAEP_ENCODE_MESSAGE_TOO_LONG (CRYS_RSA_MODULE_ERROR_BASE + 0x24UL)
-/*! OAEP decode message is too long. */
-#define CRYS_RSA_BASE_OAEP_DECODE_MESSAGE_TOO_LONG (CRYS_RSA_MODULE_ERROR_BASE + 0x25UL)
-/*! Illegal key generation data struct pointer. */
-#define CRYS_RSA_KEY_GEN_DATA_STRUCT_POINTER_INVALID (CRYS_RSA_MODULE_ERROR_BASE + 0x26UL)
-/*! Illegal PRIM data struct pointer. */
-#define CRYS_RSA_PRIM_DATA_STRUCT_POINTER_INVALID (CRYS_RSA_MODULE_ERROR_BASE + 0x27UL)
-/*! Illegal message buffer size. */
-#define CRYS_RSA_INVALID_MESSAGE_BUFFER_SIZE (CRYS_RSA_MODULE_ERROR_BASE + 0x28UL)
-/*! Illegal signature buffer size. */
-#define CRYS_RSA_INVALID_SIGNATURE_BUFFER_SIZE (CRYS_RSA_MODULE_ERROR_BASE + 0x29UL)
-/*! Illegal modulus size pointer. */
-#define CRYS_RSA_INVALID_MOD_BUFFER_SIZE_POINTER (CRYS_RSA_MODULE_ERROR_BASE + 0x2AUL)
-/*! Illegal exponent size pointer. */
-#define CRYS_RSA_INVALID_EXP_BUFFER_SIZE_POINTER (CRYS_RSA_MODULE_ERROR_BASE + 0x2BUL)
-/*! Illegal signature pointer. */
-#define CRYS_RSA_INVALID_SIGNATURE_BUFFER_POINTER (CRYS_RSA_MODULE_ERROR_BASE + 0x2CUL)
-/*! Wrong private key type. */
-#define CRYS_RSA_WRONG_PRIVATE_KEY_TYPE (CRYS_RSA_MODULE_ERROR_BASE + 0x2DUL)
-
-/*! Illegal CRT first factor size pointer (Psize) . */
-#define CRYS_RSA_INVALID_CRT_FIRST_FACTOR_SIZE_POINTER_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x2EUL)
-/*! Illegal CRT second factor size pointer (Qsize) . */
-#define CRYS_RSA_INVALID_CRT_SECOND_FACTOR_SIZE_POINTER_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x2FUL)
-/*! Illegal CRT first factor exponent size pointer (dPsize) . */
-#define CRYS_RSA_INVALID_CRT_FIRST_FACTOR_EXP_SIZE_PTR_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x30UL)
-/*! Illegal CRT second factor exponent size pointer (dQsize) . */
-#define CRYS_RSA_INVALID_CRT_SECOND_FACTOR_EXP_SIZE_PTR_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x31UL)
-/*! Illegal CRT coefficient size pointer (qInvsize) . */
-#define CRYS_RSA_INVALID_CRT_COEFFICIENT_SIZE_PTR_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x32UL)
-
-/*! Illegal CRT first factor size (Psize) . */
-#define CRYS_RSA_INVALID_CRT_FIRST_FACTOR_SIZE_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x33UL)
-/*! Illegal CRT second factor size (Qsize) . */
-#define CRYS_RSA_INVALID_CRT_SECOND_FACTOR_SIZE_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x34UL)
-/*! Illegal CRT first factor exponent size (dPsize) . */
-#define CRYS_RSA_INVALID_CRT_FIRST_FACTOR_EXP_SIZE_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x35UL)
-/*! Illegal CRT second factor exponent size (dQsize) . */
-#define CRYS_RSA_INVALID_CRT_SECOND_FACTOR_EXP_SIZE_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x36UL)
-/*! Illegal CRT coefficient size (qInvsize) . */
-#define CRYS_RSA_INVALID_CRT_COEFFICIENT_SIZE_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x37UL)
-/*! Key generation conditional test failed. */
-#define CRYS_RSA_KEY_GEN_CONDITIONAL_TEST_FAIL_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x38UL)
-
-/*! Random generation in range failed. */
-#define CRYS_RSA_CAN_NOT_GENERATE_RAND_IN_RANGE (CRYS_RSA_MODULE_ERROR_BASE + 0x39UL)
-/*! Illegal CRT parameter size. */
-#define CRYS_RSA_INVALID_CRT_PARAMETR_SIZE_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x3AUL)
-
-/*! Illegal modulus. */
-#define CRYS_RSA_INVALID_MODULUS_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x40UL)
-/*! Illegal pointer. */
-#define CRYS_RSA_INVALID_PTR_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x41UL)
-/*! Illegal decryption mode. */
-#define CRYS_RSA_INVALID_DECRYPRION_MODE_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x42UL)
-
-/*! Illegal generated private key. */
-#define CRYS_RSA_GENERATED_PRIV_KEY_IS_TOO_LOW (CRYS_RSA_MODULE_ERROR_BASE + 0x43UL)
-/*! Key generation error. */
-#define CRYS_RSA_KEY_GENERATION_FAILURE_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x44UL)
-/*! Internal error. */
-#define CRYS_RSA_INTERNAL_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x45UL)
-
-
-/****************************************************************************************
- * PKCS#1 VERSION 1.5 ERRORS
- ****************************************************************************************/
-/*! BER encoding passed. */
-#define CRYS_RSA_BER_ENCODING_OK CRYS_OK
-/*! Error in BER parsing. */
-#define CRYS_RSA_ERROR_BER_PARSING (CRYS_RSA_MODULE_ERROR_BASE+0x51UL)
-/*! Error in PKCS15 message. */
-#define CRYS_RSA_ENCODE_15_MSG_OUT_OF_RANGE (CRYS_RSA_MODULE_ERROR_BASE+0x52UL)
-/*! Error in PKCS15 PS. */
-#define CRYS_RSA_ENCODE_15_PS_TOO_SHORT (CRYS_RSA_MODULE_ERROR_BASE+0x53UL)
-/*! PKCS15 block type is not supported. */
-#define CRYS_RSA_PKCS1_15_BLOCK_TYPE_NOT_SUPPORTED (CRYS_RSA_MODULE_ERROR_BASE+0x54UL)
-/*! Error in PKCS15 decrypted block parsing. */
-#define CRYS_RSA_15_ERROR_IN_DECRYPTED_BLOCK_PARSING (CRYS_RSA_MODULE_ERROR_BASE+0x55UL)
-/*! Error in random operation. */
-#define CRYS_RSA_ERROR_IN_RANDOM_OPERATION_FOR_ENCODE (CRYS_RSA_MODULE_ERROR_BASE+0x56UL)
-/*! PKCS15 verification failed. */
-#define CRYS_RSA_ERROR_VER15_INCONSISTENT_VERIFY (CRYS_RSA_MODULE_ERROR_BASE+0x57UL)
-/*! Illegal message size (in no hash operation case). */
-#define CRYS_RSA_INVALID_MESSAGE_DATA_SIZE_IN_NO_HASH_CASE (CRYS_RSA_MODULE_ERROR_BASE+0x58UL)
-/*! Illegal message size. */
-#define CRYS_RSA_INVALID_MESSAGE_DATA_SIZE_IN_SSL_CASE (CRYS_RSA_MODULE_ERROR_BASE+0x59UL)
-/*! PKCS#1 Ver 1.5 verify hash input inconsistent with hash mode derived from signature. */
-#define CRYS_RSA_PKCS15_VERIFY_BER_ENCODING_HASH_TYPE (CRYS_RSA_MODULE_ERROR_BASE+0x60UL)
-/*! Illegal DER hash mode */
-#define CRYS_RSA_GET_DER_HASH_MODE_ILLEGAL (CRYS_RSA_MODULE_ERROR_BASE+0x61UL)
-
-/****************************************************************************************
- * PKCS#1 VERSION 2.1 ERRORS
- ****************************************************************************************/
-/*! Illegal salt length. */
-#define CRYS_RSA_PSS_ENCODING_MODULUS_HASH_SALT_LENGTHS_ERROR (CRYS_RSA_MODULE_ERROR_BASE+0x80UL)
-/*! Illegal MGF mask. */
-#define CRYS_RSA_BASE_MGF_MASK_TOO_LONG (CRYS_RSA_MODULE_ERROR_BASE+0x81UL)
-/*! PSS verification failed. */
-#define CRYS_RSA_ERROR_PSS_INCONSISTENT_VERIFY (CRYS_RSA_MODULE_ERROR_BASE+0x82UL)
-/*! OAEP message too long. */
-#define CRYS_RSA_OAEP_VER21_MESSAGE_TOO_LONG (CRYS_RSA_MODULE_ERROR_BASE+0x83UL)
-/*! OAEP error in decrypted block parsing. */
-#define CRYS_RSA_ERROR_IN_DECRYPTED_BLOCK_PARSING (CRYS_RSA_MODULE_ERROR_BASE+0x84UL)
-/*! OAEP decoding error. */
-#define CRYS_RSA_OAEP_DECODE_ERROR (CRYS_RSA_MODULE_ERROR_BASE+0x85UL)
-/*! Error in decrypted data size. */
-#define CRYS_RSA_15_ERROR_IN_DECRYPTED_DATA_SIZE (CRYS_RSA_MODULE_ERROR_BASE+0x86UL)
-/*! Error in decrypted data. */
-#define CRYS_RSA_15_ERROR_IN_DECRYPTED_DATA (CRYS_RSA_MODULE_ERROR_BASE+0x87UL)
-/*! Illegal L pointer. */
-#define CRYS_RSA_OAEP_L_POINTER_ERROR (CRYS_RSA_MODULE_ERROR_BASE+0x88UL)
-/*! Illegal output size. */
-#define CRYS_RSA_DECRYPT_INVALID_OUTPUT_SIZE (CRYS_RSA_MODULE_ERROR_BASE+0x89UL)
-/*! Illegal output size pointer. */
-#define CRYS_RSA_DECRYPT_OUTPUT_SIZE_POINTER_ERROR (CRYS_RSA_MODULE_ERROR_BASE+0x8AUL)
-/*! Illegal parameters. */
-#define CRYS_RSA_ILLEGAL_PARAMS_ACCORDING_TO_PRIV_ERROR (CRYS_RSA_MODULE_ERROR_BASE + 0x93UL)
-/*! RSA is not supported. */
-#define CRYS_RSA_IS_NOT_SUPPORTED (CRYS_RSA_MODULE_ERROR_BASE+0xFFUL)
-
-
-/************************ Enums ********************************/
-
-
-/************************ Typedefs ****************************/
-
-
-/************************ Structs ******************************/
-
-
-/************************ Public Variables **********************/
-
-
-/************************ Public Functions **********************/
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_rsa_kg.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_rsa_kg.h
deleted file mode 100644
index 2ea2e47..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_rsa_kg.h
+++ /dev/null
@@ -1,129 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-
-#ifndef CRYS_RSA_KG_H
-#define CRYS_RSA_KG_H
-
-#include "crys_rsa_types.h"
-#include "crys_rnd.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*!
-@file
-@brief Generates a RSA pair of public and private keys.
-@defgroup crys_rsa_kg CryptoCell RSA key generation APIs
-@{
-@ingroup crys_rsa
-*/
-
-/************************ Defines ******************************/
-
-/* Max allowed size and values of public exponent for key generation in CRYS */
-/*! Maximal public exponent size in bits. */
-#define CRYS_RSA_KG_PUB_EXP_MAX_SIZE_BITS 17
-/*! Definition of public exponent value. */
-#define CRYS_RSA_KG_PUB_EXP_ALLOW_VAL_1 0x000003
-/*! Definition of public exponent value. */
-#define CRYS_RSA_KG_PUB_EXP_ALLOW_VAL_2 0x000011
-/*! Definition of public exponent value. */
-#define CRYS_RSA_KG_PUB_EXP_ALLOW_VAL_3 0x010001
-
-
-
-
-/***********************************************************************************************/
-
-/*!
-@brief CRYS_RSA_KG_GenerateKeyPair generates a Pair of public and private keys on non CRT mode according to [ANS X9.31].
-
-\note To be FIPS 186-4 [5.1] compliant use only the following key sizes (in bits): 1024, 2048 and 3072.
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_rsa_error.h or crys_rnd_error.h on failure.
-
-*/
-
-CIMPORT_C CRYSError_t CRYS_RSA_KG_GenerateKeyPair(
- void *rndState_ptr, /*!< [in/out] Pointer to the RND state structure. */
- SaSiRndGenerateVectWorkFunc_t rndGenerateVectFunc, /*!< [in] Pointer to the random vector generation function. */
- uint8_t *pubExp_ptr, /*!< [in] The pointer to the public exponent (public key). */
- uint16_t pubExpSizeInBytes, /*!< [in] The public exponent size in bytes. */
- uint32_t keySize, /*!< [in] The size of the key, in bits. Supported sizes are
- 512, 1024, 2048, 3072 and 4096 bit. */
- CRYS_RSAUserPrivKey_t *userPrivKey_ptr, /*!< [out] Pointer to the private key structure. */
- CRYS_RSAUserPubKey_t *userPubKey_ptr, /*!< [out] Pointer to the public key structure. */
- CRYS_RSAKGData_t *keyGenData_ptr, /*!< [in] Pointer to a temporary structure required for the KeyGen operation. */
- CRYS_RSAKGFipsContext_t *pFipsCtx /*!< [in] Pointer to temporary buffer used in case FIPS certification if required. */
-);
-
-/***********************************************************************************************/
-/*!
-@brief Generates a pair of public and private keys on CRT mode according to [ANS X9.31].
-
-\note To be FIPS 186-4 [5.1] compliant use only the following key sizes (in bits): 1024, 2048 and 3072.
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_rsa_error.h or crys_rnd_error.h on failure.
-*/
-
-CIMPORT_C CRYSError_t CRYS_RSA_KG_GenerateKeyPairCRT(
- void *rndState_ptr, /*!< [in/out] Pointer to the RND state structure. */
- SaSiRndGenerateVectWorkFunc_t rndGenerateVectFunc, /*!< [in] Pointer to the random vector generation function. */
- uint8_t *pubExp_ptr, /*!< [in] The pointer to the public exponent (public key). */
- uint16_t pubExpSizeInBytes, /*!< [in] The public exponent size in bytes. */
- uint32_t keySize, /*!< [in] The size of the key, in bits. Supported sizes are
- 512, 1024, 2048, 3072 and 4096 bit. */
- CRYS_RSAUserPrivKey_t *userPrivKey_ptr, /*!< [out] Pointer to the private key structure. */
- CRYS_RSAUserPubKey_t *userPubKey_ptr, /*!< [out] Pointer to the public key structure. */
- CRYS_RSAKGData_t *keyGenData_ptr, /*!< [in] Pointer to a temporary structure required for the KeyGen operation. */
- CRYS_RSAKGFipsContext_t *pFipsCtx /*!< [in] Pointer to temporary buffer used in case FIPS certification if required. */
-);
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_rsa_prim.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_rsa_prim.h
deleted file mode 100644
index 6712086..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_rsa_prim.h
+++ /dev/null
@@ -1,125 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-#ifndef CRYS_RSA_PRIM_H
-#define CRYS_RSA_PRIM_H
-
-#include "crys_rsa_types.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*!
-@file
-@brief This module defines the API that implements the [PKCS1_2.1] primitive functions.
-@defgroup crys_rsa_prim CryptoCell RSA primitive APIs
-@{
-@ingroup crys_rsa
-
-
-\note Direct use of primitive functions, rather than schemes to protect data, is strongly discouraged as primitive functions are
-susceptible to well-known attacks.
-*/
-
-
-
-/**********************************************************************************/
-/*!
-@brief Implements the RSAEP algorithm, as defined in [PKCS1_2.1] - 6.1.1.
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_rsa_error.h on failure.
- */
-CIMPORT_C CRYSError_t CRYS_RSA_PRIM_Encrypt(
- CRYS_RSAUserPubKey_t *UserPubKey_ptr, /*!< [in] Pointer to the public key data structure. */
- CRYS_RSAPrimeData_t *PrimeData_ptr, /*!< [in] Pointer to a temporary structure containing internal buffers. */
- uint8_t *Data_ptr, /*!< [in] Pointer to the data to encrypt. */
- uint16_t DataSize, /*!< [in] The size (in bytes) of input data must be ≤ modulus size. If is smaller,
- then the function padds it by zeros on left side up to the modulus size
- and therefore, after further decrypt operation, its result will contain
- zero-padding also. If the function is used for recovering the plain data
- from result of inverse function (CRYS_RSA_PRIM_Decrypt), the input size
- must be equal to modulus size exactly. */
- uint8_t *Output_ptr /*!< [out] Pointer to the encrypted data. The buffer size must be ≥ the modulus size. */
-);
-
-
-/**********************************************************************************/
-/*!
-@brief Implements the RSADP algorithm, as defined in [PKCS1_2.1] - 6.1.2.
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_rsa_error.h on failure.
-
-*/
-CIMPORT_C CRYSError_t CRYS_RSA_PRIM_Decrypt(
- CRYS_RSAUserPrivKey_t *UserPrivKey_ptr, /*!< [in] Pointer to the private key data structure.
- The key representation (pair or quintuple) and hence the RSA algorithm
- (CRT or not-CRT) is determined by enum value in the structure
- ::CRYS_RSA_Build_PrivKey or ::CRYS_RSA_Build_PrivKeyCRT. */
- CRYS_RSAPrimeData_t *PrimeData_ptr, /*!< [in] Pointer to a temporary structure containing internal buffers required for
- the RSA operation. */
- uint8_t *Data_ptr, /*!< [in] Pointer to the data to be decrypted. */
- uint16_t DataSize, /*!< [in] The size (in bytes) of input data must be ≤ modulus size.
- If the size is smaller (not recommendet), then the data will be zero-padded
- by the function on left side up to the modulus size and therefore, after further
- decrypt operation,its result will contain zero-padding also. If the function is used
- for recovering the plain data from result of inverse function (CRYS_RSA_PRIM_Encrypt),
- the input size must be equal to modulus size exactly. */
- uint8_t *Output_ptr /*!< [out] Pointer to the decrypted data. The buffer size must be ≤ the modulus size. */
-);
-
-
-/*!
-@brief Implements the RSASP1 algorithm, as defined in [PKCS1_2.1] - 6.2.1, as a call to ::CRYS_RSA_PRIM_Decrypt,
-since the signature primitive is identical to the decryption primitive.
-*/
-#define CRYS_RSA_PRIM_Sign CRYS_RSA_PRIM_Decrypt
-
-/*!
-@brief Implements the RSAVP1 algorithm, as defined in [PKCS1_2.1] - 6.2.2, as a call to ::CRYS_RSA_PRIM_Encrypt.
-*/
-#define CRYS_RSA_PRIM_Verify CRYS_RSA_PRIM_Encrypt
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_rsa_schemes.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_rsa_schemes.h
deleted file mode 100644
index be26af2..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_rsa_schemes.h
+++ /dev/null
@@ -1,521 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-#ifndef CRYS_RSA_SCHEMES_H
-#define CRYS_RSA_SCHEMES_H
-
-
-#include "crys_error.h"
-#include "crys_rsa_types.h"
-#include "crys_rnd.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*!
-@file
-@brief This module defines APIs that support [PKCS1_1.5] and [PKCS1_2.1] encryption and signature schemes.
-@defgroup crys_rsa_schemes CryptoCell RSA encryption and signature schemes
-@{
-@ingroup crys_rsa
-*/
-
-/**********************************************************************************************************/
-/*!
-@brief This function implements the Encrypt algorithm, as defined in [PKCS1_2.1] and [PKCS1_1.5].
-
-It should not be called directly. Instead, use macros ::CRYS_RSA_OAEP_Encrypt or ::CRYS_RSA_PKCS1v15_Encrypt.
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_rsa_error.h, crys_rnd_error.h or crys_hash_error.h on failure.
-*/
-CIMPORT_C CRYSError_t SaSi_RsaSchemesEncrypt(
- void *rndState_ptr, /*!< [in/out] Pointer to the RND state structure. */
- SaSiRndGenerateVectWorkFunc_t rndGenerateVectFunc, /*!< [in] Pointer to the random vector generation function. */
- CRYS_RSAUserPubKey_t *UserPubKey_ptr, /*!< [in] Pointer to the public key data structure. */
- CRYS_RSAPrimeData_t *PrimeData_ptr, /*!< [in] Pointer to a temporary structure that is internally used as workspace for the
- Encryption operation. */
- CRYS_RSA_HASH_OpMode_t hashFunc, /*!< [in] The HASH function to be used. One of the supported SHA-x HASH modes, as defined
- in ::CRYS_RSA_HASH_OpMode_t (MD5 is not supported).*/
- uint8_t *L, /*!< [in] The label input pointer. Relevant for [PKCS1_2.1] only. NULL by default.
- NULL for [PKCS1_1.5]. */
- uint16_t Llen, /*!< [in] The label length. Relevant for [PKCS1_2.1] only. Zero by default.
- Must be <=2048. Zero for [PKCS1_1.5]. */
- CRYS_PKCS1_MGF_t MGF, /*!< [in] The mask generation function. [PKCS1_2.1] defines MGF1, so the only value
- allowed here is CRYS_PKCS1_MGF1. */
- uint8_t *DataIn_ptr, /*!< [in] Pointer to the data to encrypt. */
- uint16_t DataInSize, /*!< [in] The size (in bytes) of the data to encrypt. The data size must be:
- - For [PKCS1_2.1], DataSize <= modulus size - 2*HashLen - 2.
- - For [PKCS1_1.5], DataSize <= modulus size - 11. */
- uint8_t *Output_ptr, /*!< [out] Pointer to the encrypted data. The buffer must be at least modulus size bytes long. */
- CRYS_PKCS1_version PKCS1_ver /*!< [in] [PKCS1_1.5] or [PKCS1_2.1], according to the functionality required. */
-);
-
-/*!
- @brief
- CRYS_RSA_OAEP_PSS21_Encrypt implements the RSAES-OAEP algorithm
- as defined in PKCS#1 v2.1 8.1.
-
- \note It is not recommended to use hash MD5 in OAEP PKCS1 ver 2.1, therefore
- it is not supported.
-
- This function combines the RSA encryption primitive and the
- EME-OAEP encoding method, to provide an RSA-based encryption
- method that is semantically secure against adaptive
- chosen-ciphertext attacks. For additional details, please refer to
- the PKCS#1 standard.
-*/
-#define CRYS_RSA_OAEP_Encrypt(rndState_ptr, rndGenerateVectFunc, UserPubKey_ptr,PrimeData_ptr,HashMode,L,Llen,MGF,Data_ptr,DataSize,Output_ptr)\
- SaSi_RsaSchemesEncrypt(rndState_ptr, rndGenerateVectFunc, UserPubKey_ptr,PrimeData_ptr,HashMode,L,Llen,MGF,Data_ptr,DataSize,Output_ptr,CRYS_PKCS1_VER21)
-
-/*!
- @brief
- CRYS_RSA_PKCS1v15_Encrypt implements the RSAES-PKCS1v15 algorithm
- as defined in PKCS#1 v2.1 8.2.
-*/
-#define CRYS_RSA_PKCS1v15_Encrypt(rndState_ptr, rndGenerateVectFunc, UserPubKey_ptr,PrimeData_ptr,DataIn_ptr,DataInSize,Output_ptr)\
- SaSi_RsaSchemesEncrypt(rndState_ptr, rndGenerateVectFunc, UserPubKey_ptr,PrimeData_ptr,CRYS_RSA_HASH_NO_HASH_mode,NULL,0,CRYS_PKCS1_NO_MGF,DataIn_ptr, \
- DataInSize, Output_ptr,CRYS_PKCS1_VER15)
-
-
-/**********************************************************************************************************/
-/*!
-@brief This function implements the Decrypt algorithm, as defined in [PKCS1_2.1] and [PKCS1_1.5].
-
-It should not be called directly. Instead, use macros ::CRYS_RSA_OAEP_Decrypt or ::CRYS_RSA_PKCS1v15_Decrypt.
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_rsa_error.h or crys_hash_error.h on failure.
-*/
-CIMPORT_C CRYSError_t SaSi_RsaSchemesDecrypt(
- CRYS_RSAUserPrivKey_t *UserPrivKey_ptr, /*!< [in] Pointer to the private key data structure of the user. */
- CRYS_RSAPrimeData_t *PrimeData_ptr, /*!< [in] Pointer to a temporary structure that is internally used as workspace
- for the decryption operation. */
- CRYS_RSA_HASH_OpMode_t hashFunc, /*!< [in] The HASH function to be used. One of the supported SHA-x HASH modes,
- as defined in ::CRYS_RSA_HASH_OpMode_t (MD5 is not supported). */
- uint8_t *L, /*!< [in] The label input pointer. Relevant for [PKCS1_2.1] only. NULL by default.
- NULL for [PKCS1_1.5]. */
- uint16_t Llen, /*!< [in] The label length. Relevant for [PKCS1_2.1] only. Zero by default.
- Zero for [PKCS1_1.5]. */
- CRYS_PKCS1_MGF_t MGF, /*!< [in] The mask generation function. [PKCS1_2.1] defines MGF1, so the only
- value allowed here is CRYS_PKCS1_MGF1. */
- uint8_t *DataIn_ptr, /*!< [in] Pointer to the data to decrypt. */
- uint16_t DataInSize, /*!< [in] The size (in bytes) of the data to decrypt. DataSize must be ≤
- the modulus size. */
- uint8_t *Output_ptr, /*!< [in] Pointer to the decrypted data. The buffer must be at least
- PrivKey_ptr->N.len bytes long (i.e. the modulus size in bytes). */
- uint16_t *OutputSize_ptr, /*!< [in] Pointer to the byte size of the buffer pointed to by Output_buffer.
- The size must be:
- <ul><li> For PKCS #1 v2.1: Modulus size > OutputSize >=
- (modulus size - 2*HashLen - 2).</li>
- <li> For PKCS #1 v1.5: Modulus size > OutputSize >= (modulus size - 11).
- The value pointed by OutputSize_ptr is updated after decryption with
- the actual number of bytes that are loaded to Output_ptr.</li></ul> */
- CRYS_PKCS1_version PKCS1_ver /*!< [in] [PKCS1_1.5] or [PKCS1_2.1], according to the functionality required. */
-);
-
-/**********************************************************************************************************/
-/**
- @brief
- CRYS_RSA_OAEP_Decrypt implements the RSAES-OAEP algorithm
- as defined in PKCS#1 v2.1 8.1.
-
- \note It is not recommended to use hash MD5 in OAEP PKCS1 ver 2.1, therefore
- it is not supported.
-
- This function combines the RSA decryption primitive and the
- EME-OAEP encoding method, to provide an RSA-based decryption
- method that is semantically secure against adaptive
- chosen-ciphertext attacks. For more details, please refer to
- the PKCS#1 standard.
-
-*/
-#define CRYS_RSA_OAEP_Decrypt(UserPrivKey_ptr,PrimeData_ptr,HashMode,L,Llen,MGF,Data_ptr,DataSize,Output_ptr,OutputSize_ptr)\
- SaSi_RsaSchemesDecrypt(UserPrivKey_ptr,PrimeData_ptr,HashMode,L,Llen,MGF,Data_ptr,DataSize,Output_ptr,OutputSize_ptr,CRYS_PKCS1_VER21)
-
-
-/**
- @brief
- CRYS_RSA_PKCS1v15_Decrypt implements the RSAES-PKCS1v15 algorithm as defined
- in PKCS#1 v2.1 8.2.
-*/
-#define CRYS_RSA_PKCS1v15_Decrypt(UserPrivKey_ptr,PrimeData_ptr,DataIn_ptr,DataInSize,Output_ptr,OutputSize_ptr)\
- SaSi_RsaSchemesDecrypt(UserPrivKey_ptr,PrimeData_ptr,CRYS_RSA_HASH_NO_HASH_mode,NULL,0,CRYS_PKCS1_NO_MGF,DataIn_ptr,DataInSize,Output_ptr,OutputSize_ptr,CRYS_PKCS1_VER15)
-
-
-/**********************************************************************************************************/
-/*!
-@brief Implements the Signing algorithm, as defined in [PKCS1_1.5] or [PKCS1_2.1], using a single function.
-
-The input data may be either a non-hashed data or a digest of a hash function.
-For a non-hashed data, the input data will be hashed using the hash function indicated by ::CRYS_RSA_HASH_OpMode_t.
-For a digest, ::CRYS_RSA_HASH_OpMode_t should indicate the hash function that the input data was created by, and it will not be hashed.
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_rsa_error.h, crys_rnd_error.h or crys_hash_error.h on failure.
-*/
-CIMPORT_C CRYSError_t SaSi_RsaSign(
- void *rndState_ptr, /*!< [in/out] Pointer to the RND state. */
- SaSiRndGenerateVectWorkFunc_t rndGenerateVectFunc, /*!< [in/out] Pointer to the RND Generate vector function pointer. */
- CRYS_RSAPrivUserContext_t *UserContext_ptr, /*!< [in] Pointer to a temporary context for internal use. */
- CRYS_RSAUserPrivKey_t *UserPrivKey_ptr, /*!< [in] Pointer to the private key data structure of the user.
- The representation (pair or quintuple) and hence the algorithm (CRT or not CRT)
- is determined by the Private Key build function -
- ::CRYS_RSA_Build_PrivKey or ::CRYS_RSA_Build_PrivKeyCRT. */
- CRYS_RSA_HASH_OpMode_t rsaHashMode, /*!< [in] One of the supported SHA-x HASH modes, as defined in ::CRYS_RSA_HASH_OpMode_t.
- (MD5 is not supported). */
- CRYS_PKCS1_MGF_t MGF, /*!< [in] The mask generation function. [PKCS1_2.1] defines only MGF1, so the only value
- allowed for [PKCS1_2.1] is CRYS_PKCS1_MGF1. */
- uint16_t SaltLen, /*!< [in] The Length of the Salt buffer (relevant for PKCS#1 Ver 2.1 only, typically lengths is 0 or hash Len).
- FIPS 186-4 requires, that SaltLen <= hash len. If SaltLen > KeySize - hash Len - 2, the function
- returns an error. */
- uint8_t *DataIn_ptr, /*!< [in] Pointer to the input data to be signed.
- The size of the scatter/gather list representing the data buffer is limited to 128
- entries, and the size of each entry is limited to 64KB (fragments larger than
- 64KB are broken into fragments <= 64KB). */
- uint32_t DataInSize, /*!< [in] The size (in bytes) of the data to sign. */
- uint8_t *Output_ptr, /*!< [out] Pointer to the signature. The buffer must be at least PrivKey_ptr->N.len bytes
- long (i.e. the modulus size in bytes). */
- uint16_t *OutputSize_ptr, /*!< [in/out] Pointer to the signature size value - the input value is the signature
- buffer size allocated, the output value is the signature size used.
- he buffer must be equal to PrivKey_ptr->N.len bytes long
- (i.e. the modulus size in bytes). */
- CRYS_PKCS1_version PKCS1_ver /*!< [in] [PKCS1_1.5] or [PKCS1_2.1], according to the functionality required. */
-);
-
-
-/*!
-@brief CRYS_RSA_PKCS1v15_Sign implements the RSASSA-PKCS1v15 algorithm as defined in PKCS#1 v1.5.
-
-This function combines the RSASP1 signature primitive and the EMSA-PKCS1v15 encoding method, to provide an RSA-based signature scheme.
-For more details, please refer to the PKCS#1 standard.
- */
-
-#define CRYS_RSA_PKCS1v15_Sign(rndState_ptr, rndGenerateVectFunc, UserContext_ptr,UserPrivKey_ptr,hashFunc,DataIn_ptr,DataInSize,Output_ptr,OutputSize_ptr)\
- SaSi_RsaSign(rndState_ptr, rndGenerateVectFunc, (UserContext_ptr),(UserPrivKey_ptr),(hashFunc),(CRYS_PKCS1_NO_MGF),0,(DataIn_ptr),(DataInSize),(Output_ptr),(OutputSize_ptr),CRYS_PKCS1_VER15)
-
-
-/*!
-@brief CRYS_RSA_PKCS1v15_SHA1_Sign implements the RSASSA-PKCS1v15 algorithm as defined in PKCS#1 v1.5, but without performing a HASH function -
-it assumes that the data in has already been hashed using SHA-1.
-
-\note The data_in size is already known after the Hash.
-*/
-#define CRYS_RSA_PKCS1v15_SHA1_Sign(rndState_ptr, rndGenerateVectFunc, UserContext_ptr,UserPrivKey_ptr,DataIn_ptr,Output_ptr,OutputSize_ptr)\
- SaSi_RsaSign(rndState_ptr, rndGenerateVectFunc, (UserContext_ptr),(UserPrivKey_ptr),(CRYS_RSA_After_SHA1_mode),(CRYS_PKCS1_NO_MGF),0,(DataIn_ptr),CRYS_HASH_SHA1_DIGEST_SIZE_IN_BYTES,(Output_ptr),(OutputSize_ptr),CRYS_PKCS1_VER15)
-
-/*!
-@brief CRYS_RSA_PKCS1v15_MD5_Sign implements the RSASSA-PKCS1v15 algorithm as defined in PKCS#1 v1.5, but without performing a HASH function -
-it assumes that the data in has already been hashed using MD5.
-
-\note The data_in size is already known after the Hash.
-*/
-
-#define CRYS_RSA_PKCS1v15_MD5_Sign(rndState_ptr, rndGenerateVectFunc, UserContext_ptr,UserPrivKey_ptr,DataIn_ptr,Output_ptr,OutputSize_ptr)\
- SaSi_RsaSign(rndState_ptr, rndGenerateVectFunc, (UserContext_ptr),(UserPrivKey_ptr),CRYS_RSA_After_MD5_mode,CRYS_PKCS1_NO_MGF,0,(DataIn_ptr),CRYS_HASH_MD5_DIGEST_SIZE_IN_BYTES,(Output_ptr),(OutputSize_ptr),CRYS_PKCS1_VER15)
-
-
-/*!
-@brief CRYS_RSA_PKCS1v15_SHA224_Sign implements the RSASSA-PKCS1v15 algorithm as defined in PKCS#1 v1.5, but without performing a HASH function -
-it assumes that the data in has already been hashed using SHA-224.
-
-\note The data_in size is already known after the Hash.
-*/
-#define CRYS_RSA_PKCS1v15_SHA224_Sign(rndState_ptr, rndGenerateVectFunc, UserContext_ptr,UserPrivKey_ptr,DataIn_ptr,Output_ptr,OutputSize_ptr)\
- SaSi_RsaSign(rndState_ptr, rndGenerateVectFunc, (UserContext_ptr),(UserPrivKey_ptr),(CRYS_RSA_After_SHA224_mode),(CRYS_PKCS1_NO_MGF),0,(DataIn_ptr),CRYS_HASH_SHA224_DIGEST_SIZE_IN_BYTES,(Output_ptr),(OutputSize_ptr),CRYS_PKCS1_VER15)
-
-
-/*!
-@brief CRYS_RSA_PKCS1v15_SHA256_Sign implements the RSASSA-PKCS1v15 algorithm as defined in PKCS#1 v1.5, but without performing a HASH function -
-it assumes that the data in has already been hashed using SHA-256.
-
-\note The data_in size is already known after the Hash.
-*/
-#define CRYS_RSA_PKCS1v15_SHA256_Sign(rndState_ptr, rndGenerateVectFunc, UserContext_ptr,UserPrivKey_ptr,DataIn_ptr,Output_ptr,OutputSize_ptr)\
- SaSi_RsaSign(rndState_ptr, rndGenerateVectFunc, (UserContext_ptr),(UserPrivKey_ptr),(CRYS_RSA_After_SHA256_mode),(CRYS_PKCS1_NO_MGF),0,(DataIn_ptr),CRYS_HASH_SHA256_DIGEST_SIZE_IN_BYTES,(Output_ptr),(OutputSize_ptr),CRYS_PKCS1_VER15)
-
-/*!
-@brief CRYS_RSA_PKCS1v15_SHA1_Sign implements the RSASSA-PKCS1v15 algorithm as defined in PKCS#1 v1.5, but without performing a HASH function -
-it assumes that the data in has already been hashed using SHA-384.
-
-\note The data_in size is already known after the Hash.
-*/
-#define CRYS_RSA_PKCS1v15_SHA384_Sign(rndState_ptr, rndGenerateVectFunc, UserContext_ptr,UserPrivKey_ptr,DataIn_ptr,Output_ptr,OutputSize_ptr)\
- SaSi_RsaSign(rndState_ptr, rndGenerateVectFunc, (UserContext_ptr),(UserPrivKey_ptr),(CRYS_RSA_After_SHA384_mode),(CRYS_PKCS1_NO_MGF),0,(DataIn_ptr),CRYS_HASH_SHA384_DIGEST_SIZE_IN_BYTES,(Output_ptr),(OutputSize_ptr),CRYS_PKCS1_VER15)
-
-
-/*!
-@brief CRYS_RSA_PKCS1v15_SHA512_Sign implements the RSASSA-PKCS1v15 algorithm as defined in PKCS#1 v1.5, but without performing a HASH function -
-it assumes that the data in has already been hashed using SHA-512.
-
-\note The data_in size is already known after the Hash.
-*/
-#define CRYS_RSA_PKCS1v15_SHA512_Sign(rndState_ptr, rndGenerateVectFunc, UserContext_ptr,UserPrivKey_ptr,DataIn_ptr,Output_ptr,OutputSize_ptr)\
- SaSi_RsaSign(rndState_ptr, rndGenerateVectFunc, (UserContext_ptr),(UserPrivKey_ptr),(CRYS_RSA_After_SHA512_mode),(CRYS_PKCS1_NO_MGF),0,(DataIn_ptr),CRYS_HASH_SHA512_DIGEST_SIZE_IN_BYTES,(Output_ptr),(OutputSize_ptr),CRYS_PKCS1_VER15)
-
-
-
-/*!
-@brief CRYS_RSA_PSS_Sign implements the RSASSA-PSS algorithm as defined in PKCS#1 v2.1 9.1, in a single function call.
-
-\note According to the PKCS#1 ver2.1 it is not recommended to use MD5 Hash, therefore it is not supported.
-
-The actual macro that is used by the user is ::CRYS_RSA_PSS_Sign.
-*/
-
-#define CRYS_RSA_PSS_Sign(rndState_ptr, rndGenerateVectFunc, UserContext_ptr,UserPrivKey_ptr,hashFunc,MGF,SaltLen,DataIn_ptr,DataInSize,Output_ptr,OutputSize_ptr)\
- SaSi_RsaSign(rndState_ptr, rndGenerateVectFunc, UserContext_ptr,UserPrivKey_ptr,hashFunc,MGF,SaltLen,DataIn_ptr,DataInSize,Output_ptr,OutputSize_ptr,CRYS_PKCS1_VER21)
-
-
-/*!
-@brief CRYS_RSA_PSS_SHA1_Sign implements the RSASSA-PSS algorithm as defined in PKCS#1 v2.1 9.1 in a single function call, but without performing a HASH function -
-it assumes that the data in has already been hashed using SHA-1.
-
-\note The data_in size is already known after the Hash.
-
-The actual macro that is used by the users is ::CRYS_RSA_PSS_SHA1_Sign.
-*/
-
-#define CRYS_RSA_PSS_SHA1_Sign(rndState_ptr, rndGenerateVectFunc, UserContext_ptr,UserPrivKey_ptr,MGF,SaltLen,DataIn_ptr,Output_ptr,OutputSize_ptr)\
- SaSi_RsaSign(rndState_ptr, rndGenerateVectFunc, UserContext_ptr,UserPrivKey_ptr,CRYS_RSA_After_SHA1_mode,MGF,SaltLen,DataIn_ptr,CRYS_HASH_SHA1_DIGEST_SIZE_IN_BYTES,Output_ptr,OutputSize_ptr,CRYS_PKCS1_VER21)
-
-
-/*!
-@brief CRYS_RSA_PSS_SHA224_Sign implements the RSASSA-PSS algorithm as defined in PKCS#1 v2.1 9.1 in a single function call, but without performing a HASH function -
-it assumes that the data in has already been hashed using SHA-224.
-
-\note The data_in size is already known after the Hash.
-
-The actual macro that is used by the users is ::CRYS_RSA_PSS_SHA224_Sign.
-*/
-
-#define CRYS_RSA_PSS_SHA224_Sign(rndState_ptr, rndGenerateVectFunc, UserContext_ptr,UserPrivKey_ptr,MGF,SaltLen,DataIn_ptr,Output_ptr,OutputSize_ptr)\
- SaSi_RsaSign(rndState_ptr, rndGenerateVectFunc, UserContext_ptr,UserPrivKey_ptr,CRYS_RSA_After_SHA224_mode,MGF,SaltLen,DataIn_ptr,CRYS_HASH_SHA224_DIGEST_SIZE_IN_BYTES,Output_ptr,OutputSize_ptr,CRYS_PKCS1_VER21)
-
-
-/*!
-@brief CRYS_RSA_PSS_SHA256_Sign implements the RSASSA-PSS algorithm as defined in PKCS#1 v2.1 9.1 in a single function call, but without performing a HASH function -
-it assumes that the data in has already been hashed using SHA-256.
-
-\note The data_in size is already known after the Hash.
-
-The actual macro that is used by the users is ::CRYS_RSA_PSS_SHA256_Sign.
-*/
-
-#define CRYS_RSA_PSS_SHA256_Sign(rndState_ptr, rndGenerateVectFunc, UserContext_ptr,UserPrivKey_ptr,MGF,SaltLen,DataIn_ptr,Output_ptr,OutputSize_ptr)\
- SaSi_RsaSign(rndState_ptr, rndGenerateVectFunc, UserContext_ptr,UserPrivKey_ptr,CRYS_RSA_After_SHA256_mode,MGF,SaltLen,DataIn_ptr,CRYS_HASH_SHA256_DIGEST_SIZE_IN_BYTES,Output_ptr,OutputSize_ptr,CRYS_PKCS1_VER21)
-
-
-/*!
-@brief CRYS_RSA_PSS_SHA384_Sign implements the RSASSA-PSS algorithm as defined in PKCS#1 v2.1 9.1 in a single function call, but without performing a HASH function -
-it assumes that the data in has already been hashed using SHA-384.
-
-\note The data_in size is already known after the Hash.
-
-The actual macro that is used by the users is ::CRYS_RSA_PSS_SHA384_Sign.
-*/
-
-#define CRYS_RSA_PSS_SHA384_Sign(rndState_ptr, rndGenerateVectFunc, UserContext_ptr,UserPrivKey_ptr,MGF,SaltLen,DataIn_ptr,Output_ptr,OutputSize_ptr)\
- SaSi_RsaSign(rndState_ptr, rndGenerateVectFunc, UserContext_ptr,UserPrivKey_ptr,CRYS_RSA_After_SHA384_mode,MGF,SaltLen,DataIn_ptr,CRYS_HASH_SHA384_DIGEST_SIZE_IN_BYTES,Output_ptr,OutputSize_ptr,CRYS_PKCS1_VER21)
-
-
-/*!
-@brief CRYS_RSA_PSS_SHA512_Sign implements the RSASSA-PSS algorithm as defined in PKCS#1 v2.1 9.1 in a single function call, but without performing a HASH function -
-it assumes that the data in has already been hashed using SHA-512.
-
-\note The data_in size is already known after the Hash.
-
-The actual macro that is used by the users is ::CRYS_RSA_PSS_SHA512_Sign.
-*/
-
-#define CRYS_RSA_PSS_SHA512_Sign(rndState_ptr, rndGenerateVectFunc, UserContext_ptr,UserPrivKey_ptr,MGF,SaltLen,DataIn_ptr,Output_ptr,OutputSize_ptr)\
- SaSi_RsaSign(rndState_ptr, rndGenerateVectFunc, UserContext_ptr,UserPrivKey_ptr,CRYS_RSA_After_SHA512_mode,MGF,SaltLen,DataIn_ptr,CRYS_HASH_SHA512_DIGEST_SIZE_IN_BYTES,Output_ptr,OutputSize_ptr,CRYS_PKCS1_VER21)
-
-
-/**********************************************************************************************************/
-/*!
-@brief Implements the RSA signature verification algorithms, in a single function call, as defined in referenced standards [PKCS1_1.5]
-and [PKCS1_2.1].
-
-The input data may be either a non-hashed data or a digest of a hash function.
-For a non-hashed data, the input data will be hashed using the hash function indicated by ::CRYS_RSA_HASH_OpMode_t.
-For a digest, ::CRYS_RSA_HASH_OpMode_t should indicate the hash function that the input data was created by, and it will not be hashed.
-
-@return CRYS_OK on success.
-@return A non-zero value from crys_rsa_error.h or crys_hash_error.h on failure.
-*/
-
-CIMPORT_C CRYSError_t SaSi_RsaVerify(
- CRYS_RSAPubUserContext_t *UserContext_ptr, /*!< [in] Pointer to a temporary context for internal use. */
- CRYS_RSAUserPubKey_t *UserPubKey_ptr, /*!< [in] Pointer to the public key data structure of the user. */
- CRYS_RSA_HASH_OpMode_t rsaHashMode, /*!< [in] One of the supported SHA-x HASH modes, as defined in ::CRYS_RSA_HASH_OpMode_t.
- (MD5 is not supported). */
- CRYS_PKCS1_MGF_t MGF, /*!< [in] The mask generation function. [PKCS1_2.1] defines only MGF1, so the only
- value allowed for [PKCS_2.1] is CRYS_PKCS1_MGF1. */
- uint16_t SaltLen, /*!< [in] The Length of the Salt buffer. Relevant only for [PKCS1_2.1].
- Typical lengths are 0 or hash Len (20 for SHA-1).
- The maximum length allowed is [modulus size - hash Len - 2]. */
- uint8_t *DataIn_ptr, /*!< [in] Pointer to the input data to be verified.
- The size of the scatter/gather list representing the data buffer is
- limited to 128 entries, and the size of each entry is limited to 64KB
- (fragments larger than 64KB are broken into fragments <= 64KB). */
- uint32_t DataInSize, /*!< [in] The size (in bytes) of the data whose signature is to be verified. */
- uint8_t *Sig_ptr, /*!< [in] Pointer to the signature to be verified.
- The length of the signature is PubKey_ptr->N.len bytes
- (i.e. the modulus size in bytes). */
- CRYS_PKCS1_version PKCS1_ver /*!< [in] [PKCS1_1.5] or [PKCS1_2.1], according to the functionality required. */
-);
-
-/*!
-@brief CRYS_RSA_PKCS1v15_Verify implements the RSASSA-PKCS1v15 Verify algorithm as defined in PKCS#1 v1.5.
-*/
-#define CRYS_RSA_PKCS1v15_Verify(UserContext_ptr,UserPubKey_ptr,hashFunc,DataIn_ptr,DataInSize,Sig_ptr)\
- SaSi_RsaVerify(UserContext_ptr,UserPubKey_ptr,hashFunc,CRYS_PKCS1_NO_MGF,0,DataIn_ptr,DataInSize,Sig_ptr,CRYS_PKCS1_VER15)
-
-
-/*!
-@brief CRYS_RSA_PKCS1v15_MD5_Verify implements the RSASSA-PKCS1v15 Verify algorithm as defined in PKCS#1 v1.5, but without operating the HASH function -
-it assumes the DataIn_ptr data has already been hashed using MD5.
-*/
-#define CRYS_RSA_PKCS1v15_MD5_Verify(UserContext_ptr,UserPubKey_ptr,DataIn_ptr,Sig_ptr)\
- SaSi_RsaVerify(UserContext_ptr,UserPubKey_ptr,CRYS_RSA_After_MD5_mode,CRYS_PKCS1_NO_MGF,0,DataIn_ptr,CRYS_HASH_MD5_DIGEST_SIZE_IN_BYTES,Sig_ptr,CRYS_PKCS1_VER15)
-
-
-/*!
-@brief CRYS_RSA_PKCS1v15_SHA1_Verify implements the RSASSA-PKCS1v15 Verify algorithm as defined in PKCS#1 v1.5, but without operating the HASH function -
-it assumes that the DataIn_ptr data has already been hashed using SHA1.
-
-*/
-#define CRYS_RSA_PKCS1v15_SHA1_Verify(UserContext_ptr,UserPubKey_ptr,DataIn_ptr,Sig_ptr)\
- SaSi_RsaVerify(UserContext_ptr,UserPubKey_ptr,CRYS_RSA_After_SHA1_mode,CRYS_PKCS1_NO_MGF,0,DataIn_ptr,CRYS_HASH_SHA1_DIGEST_SIZE_IN_BYTES,Sig_ptr,CRYS_PKCS1_VER15)
-
-/*!
-@brief CRYS_RSA_PKCS1v15_SHA224_Verify implements the RSASSA-PKCS1v15 Verify algorithm as defined in PKCS#1 v1.5, but without operating the HASH function -
-it assumes that the DataIn_ptr data has already been hashed using SHA224.
-
-*/
-#define CRYS_RSA_PKCS1v15_SHA224_Verify(UserContext_ptr,UserPubKey_ptr,DataIn_ptr,Sig_ptr)\
- SaSi_RsaVerify(UserContext_ptr,UserPubKey_ptr,CRYS_RSA_After_SHA224_mode,CRYS_PKCS1_NO_MGF,0,DataIn_ptr,CRYS_HASH_SHA224_DIGEST_SIZE_IN_BYTES,Sig_ptr,CRYS_PKCS1_VER15)
-
-/*!
-@brief CRYS_RSA_PKCS1v15_SHA256_Verify implements the RSASSA-PKCS1v15 Verify algorithm as defined in PKCS#1 v1.5, but without operating the HASH function -
-it assumes that the DataIn_ptr data has already been hashed using SHA256.
-
-*/
-#define CRYS_RSA_PKCS1v15_SHA256_Verify(UserContext_ptr,UserPubKey_ptr,DataIn_ptr,Sig_ptr)\
- SaSi_RsaVerify(UserContext_ptr,UserPubKey_ptr,CRYS_RSA_After_SHA256_mode,CRYS_PKCS1_NO_MGF,0,DataIn_ptr,CRYS_HASH_SHA256_DIGEST_SIZE_IN_BYTES,Sig_ptr,CRYS_PKCS1_VER15)
-
-/*!
-@brief CRYS_RSA_PKCS1v15_SHA384_Verify implements the RSASSA-PKCS1v15 Verify algorithm as defined in PKCS#1 v1.5, but without operating the HASH function -
-it assumes that the DataIn_ptr data has already been hashed using SHA384.
-
-*/
-#define CRYS_RSA_PKCS1v15_SHA384_Verify(UserContext_ptr,UserPubKey_ptr,DataIn_ptr,Sig_ptr)\
- SaSi_RsaVerify(UserContext_ptr,UserPubKey_ptr,CRYS_RSA_After_SHA384_mode,CRYS_PKCS1_NO_MGF,0,DataIn_ptr,CRYS_HASH_SHA384_DIGEST_SIZE_IN_BYTES,Sig_ptr,CRYS_PKCS1_VER15)
-
-/*!
-@brief CRYS_RSA_PKCS1v15_SHA512_Verify implements the RSASSA-PKCS1v15 Verify algorithm as defined in PKCS#1 v1.5, but without operating the HASH function -
-it assumes that the DataIn_ptr data has already been hashed using SHA512.
-
-*/
-#define CRYS_RSA_PKCS1v15_SHA512_Verify(UserContext_ptr,UserPubKey_ptr,DataIn_ptr,Sig_ptr)\
- SaSi_RsaVerify(UserContext_ptr,UserPubKey_ptr,CRYS_RSA_After_SHA512_mode,CRYS_PKCS1_NO_MGF,0,DataIn_ptr,CRYS_HASH_SHA512_DIGEST_SIZE_IN_BYTES,Sig_ptr,CRYS_PKCS1_VER15)
-
-/*!
-@brief CRYS_RSA_PSS_Verify implements the RSASSA-PKCS1v21 Verify algorithm as defined in PKCS#1 v2.1.
-*/
-
-#define CRYS_RSA_PSS_Verify(UserContext_ptr,UserPubKey_ptr,hashFunc,MGF,SaltLen,DataIn_ptr,DataInSize,Sig_ptr)\
- SaSi_RsaVerify(UserContext_ptr,UserPubKey_ptr,hashFunc,MGF,SaltLen,DataIn_ptr,DataInSize,Sig_ptr,CRYS_PKCS1_VER21)
-
- /*!
-@brief CRYS_RSA_PSS_SHA1_Verify implements the PKCS1v21 Verify algorithm as defined in PKCS#1 v2.1, but without operating the HASH function -
-it assumes the DataIn_ptr has already been hashed using SHA1.
-
-*/
-
-#define CRYS_RSA_PSS_SHA1_Verify(UserContext_ptr,UserPubKey_ptr,MGF,SaltLen,DataIn_ptr,Sig_ptr)\
- SaSi_RsaVerify(UserContext_ptr,UserPubKey_ptr,CRYS_RSA_After_SHA1_mode,MGF,SaltLen,DataIn_ptr,CRYS_HASH_SHA1_DIGEST_SIZE_IN_BYTES,Sig_ptr,CRYS_PKCS1_VER21)
-
-
-/*!
-@brief CRYS_RSA_PSS_SHA224_Verify implements the PKCS1v21 Verify algorithm as defined in PKCS#1 v2.1, but without operating the HASH function -
-it assumes the DataIn_ptr has already been hashed using SHA224.
-*/
-
-#define CRYS_RSA_PSS_SHA224_Verify(UserContext_ptr,UserPubKey_ptr,MGF,SaltLen,DataIn_ptr,Sig_ptr)\
- SaSi_RsaVerify(UserContext_ptr,UserPubKey_ptr,CRYS_RSA_After_SHA224_mode,MGF,SaltLen,DataIn_ptr,CRYS_HASH_SHA224_DIGEST_SIZE_IN_BYTES,Sig_ptr,CRYS_PKCS1_VER21)
-
-/*!
-@brief CRYS_RSA_PSS_SHA256_Verify implements the PKCS1v21 Verify algorithm as defined in PKCS#1 v2.1, but without operating the HASH function -
-it assumes the DataIn_ptr has already been hashed using SHA256.
-
-*/
-
-#define CRYS_RSA_PSS_SHA256_Verify(UserContext_ptr,UserPubKey_ptr,MGF,SaltLen,DataIn_ptr,Sig_ptr)\
- SaSi_RsaVerify(UserContext_ptr,UserPubKey_ptr,CRYS_RSA_After_SHA256_mode,MGF,SaltLen,DataIn_ptr,CRYS_HASH_SHA256_DIGEST_SIZE_IN_BYTES,Sig_ptr,CRYS_PKCS1_VER21)
-
-
-/*!
-@brief CRYS_RSA_PSS_SHA384_Verify implements the PKCS1v21 Verify algorithm as defined in PKCS#1 v2.1, but without operating the HASH function -
-it assumes the DataIn_ptr has already been hashed using SHA384.
-
-*/
-
-#define CRYS_RSA_PSS_SHA384_Verify(UserContext_ptr,UserPubKey_ptr,MGF,SaltLen,DataIn_ptr,Sig_ptr)\
- SaSi_RsaVerify(UserContext_ptr,UserPubKey_ptr,CRYS_RSA_After_SHA384_mode,MGF,SaltLen,DataIn_ptr,CRYS_HASH_SHA384_DIGEST_SIZE_IN_BYTES,Sig_ptr,CRYS_PKCS1_VER21)
-
-
-/*!
-@brief CRYS_RSA_PSS_SHA512_Verify implements the PKCS1v21 Verify algorithm as defined in PKCS#1 v2.1, but without operating the HASH function -
-it assumes the DataIn_ptr has already been hashed using SHA512.
-*/
-
-#define CRYS_RSA_PSS_SHA512_Verify(UserContext_ptr,UserPubKey_ptr,MGF,SaltLen,DataIn_ptr,Sig_ptr)\
- SaSi_RsaVerify(UserContext_ptr,UserPubKey_ptr,CRYS_RSA_After_SHA512_mode,MGF,SaltLen,DataIn_ptr,CRYS_HASH_SHA512_DIGEST_SIZE_IN_BYTES,Sig_ptr,CRYS_PKCS1_VER21)
-
-/**********************************************************************************************************/
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_rsa_types.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_rsa_types.h
deleted file mode 100644
index a0acc52..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_rsa_types.h
+++ /dev/null
@@ -1,616 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef CRYS_RSA_TYPES_H
-#define CRYS_RSA_TYPES_H
-
-#include "crys_hash.h"
-#include "crys_pka_defs_hw.h"
-#include "ssi_pal_types.h"
-#include "ssi_pal_compiler.h"
-
-#ifdef DX_SOFT_KEYGEN
-#include "ccsw_crys_rsa_shared_types.h"
-#endif
-
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-/*!
-@file
-@brief This file contains all of the enums and definitions that are used for the CRYS RSA APIs.
-@defgroup crys_rsa_types CryptoCell RSA used definitions and enums
-@{
-@ingroup crys_rsa
-*/
-
-/************************ Defines ******************************/
-
-/*! Definition of HASH context size. */
-#define CRYS_PKA_RSA_HASH_CTX_SIZE_IN_WORDS CRYS_HASH_USER_CTX_SIZE_IN_WORDS
-
-/*! Maximal key size in bytes. */
-#define CRYS_RSA_MAX_VALID_KEY_SIZE_VALUE_IN_BYTES (CRYS_RSA_MAX_VALID_KEY_SIZE_VALUE_IN_BITS / SASI_BITS_IN_BYTE)
-
-/*! Minimal key size in bits. */
-#define CRYS_RSA_MIN_VALID_KEY_SIZE_VALUE_IN_BITS 512
-/*! Valid key size multiplications in RSA. */
-#define CRYS_RSA_VALID_KEY_SIZE_MULTIPLE_VALUE_IN_BITS 256
-
-/*! Maximal RSA generated key size in bits. */
-#define CRYS_RSA_MAX_KEY_GENERATION_SIZE_BITS CRYS_RSA_MAX_KEY_GENERATION_HW_SIZE_BITS
-
-/* FIPS 184-4 definitions for allowed RSA and FFC DH key sizes */
-/*! FIPS 184-4 allowed key size - 1024 bits. */
-#define CRYS_RSA_FIPS_KEY_SIZE_1024_BITS 1024
-/*! FIPS 184-4 allowed key size - 2048 bits. */
-#define CRYS_RSA_FIPS_KEY_SIZE_2048_BITS 2048
-/*! FIPS 184-4 allowed key size - 3072 bits. */
-#define CRYS_RSA_FIPS_KEY_SIZE_3072_BITS 3072
-/*! FIPS 184-4 allowed modulus size in bits. */
-#define CRYS_RSA_FIPS_MODULUS_SIZE_BITS CRYS_RSA_FIPS_KEY_SIZE_2048_BITS
-
-/*! FIPS 184-4 DH key size - 1024 bits. */
-#define CRYS_DH_FIPS_KEY_SIZE_1024_BITS 1024
-/*! FIPS 184-4 DH key size - 2048 bits. */
-#define CRYS_DH_FIPS_KEY_SIZE_2048_BITS 2048
-
-
-/*! Salt length definition - if the salt length is not available in verify operation, the user can use this define and the algorithm will
- calculate the salt length alone*/
-/*!\note Security wise: it is not recommended to use this flag.*/
-#define CRYS_RSA_VERIFY_SALT_LENGTH_UNKNOWN 0xFFFF
-
-/*! Minimal public exponent value */
-#define CRYS_RSA_MIN_PUB_EXP_VALUE 3
-/*! Minimal private exponent value */
-#define CRYS_RSA_MIN_PRIV_EXP_VALUE 1
-
-/* The maximum buffer size for the 'H' value */
-/*! Temporary buffer size definition.*/
-#define CRYS_RSA_TMP_BUFF_SIZE (CRYS_RSA_OAEP_ENCODE_MAX_MASKDB_SIZE + CRYS_RSA_OAEP_ENCODE_MAX_SEEDMASK_SIZE + CRYS_PKA_RSA_HASH_CTX_SIZE_IN_WORDS*sizeof(uint32_t) + sizeof(CRYS_HASH_Result_t))
-
-/*! Hash structure definition.*/
-#define CRYS_PKCS1_HashFunc_t CRYS_HASH_OperationMode_t
-
-/*! OAEP maximal H length.*/
-#define CRYS_RSA_OAEP_MAX_HLEN CRYS_HASH_SHA512_DIGEST_SIZE_IN_BYTES
-
-/*! MGF1 definitions */
-#define CRYS_RSA_MGF_2_POWER_32 65535 /*!< \internal 0xFFFF This is the 2^32 of the 2^32*hLen boundary check */
-/*! MGF1 definitions */
-#define CRYS_RSA_SIZE_OF_T_STRING_BYTES (CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS*sizeof(uint32_t))
-
-/***********************************************************
- *
- * RSA PKCS#1 v2.1 DEFINES
- *
- ***********************************************************/
-/*! Size of OEAP seed. */
-#define CRYS_RSA_OAEP_ENCODE_MAX_SEEDMASK_SIZE CRYS_RSA_OAEP_MAX_HLEN
-/*! Maximal PSS salt size. */
-#define CRYS_RSA_PSS_SALT_LENGTH CRYS_RSA_OAEP_MAX_HLEN
-/*! PSS padding length. */
-#define CRYS_RSA_PSS_PAD1_LEN 8
-
-/*! OAEP encode mask size. */
-#define CRYS_RSA_OAEP_ENCODE_MAX_MASKDB_SIZE (CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS*sizeof(uint32_t)) /*!< \internal For OAEP Encode; the max size is emLen */
-/*! OAEP decode mask size. */
-#define CRYS_RSA_OAEP_DECODE_MAX_DBMASK_SIZE (CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS*sizeof(uint32_t)) /*!< \internal For OAEP Decode; the max size is emLen */
-
-/************************ Enums ********************************/
-
-/*! Defines the enum for the HASH operation mode. */
-typedef enum
-{
- CRYS_RSA_HASH_MD5_mode = 0, /*!< For PKCS1 v1.5 only. The input data will be hashed with MD5 */
- CRYS_RSA_HASH_SHA1_mode = 1, /*!< The input data will be hashed with SHA1. */
- CRYS_RSA_HASH_SHA224_mode = 2, /*!< The input data will be hashed with SHA224. */
- CRYS_RSA_HASH_SHA256_mode = 3, /*!< The input data will be hashed with SHA256. */
- CRYS_RSA_HASH_SHA384_mode = 4, /*!< The input data will be hashed with SHA384. */
- CRYS_RSA_HASH_SHA512_mode = 5, /*!< The input data will be hashed with SHA512. */
- CRYS_RSA_After_MD5_mode = 6, /*!< For PKCS1 v1.5 only. The input data is a digest of MD5 and will not be hashed. */
- CRYS_RSA_After_SHA1_mode = 7, /*!< The input data is a digest of SHA1 and will not be hashed. */
- CRYS_RSA_After_SHA224_mode = 8, /*!< The input data is a digest of SHA224 and will not be hashed. */
- CRYS_RSA_After_SHA256_mode = 9, /*!< The input data is a digest of SHA256 and will not be hashed. */
- CRYS_RSA_After_SHA384_mode = 10, /*!< The input data is a digest of SHA384 and will not be hashed. */
- CRYS_RSA_After_SHA512_mode = 11, /*!< The input data is a digest of SHA512 and will not be hashed. */
- CRYS_RSA_After_HASH_NOT_KNOWN_mode = 12, /*!< \internal used only for PKCS#1 Ver 1.5 - possible to perform verify operation without hash mode input,
- the hash mode is derived from the signature.*/
- CRYS_RSA_HASH_NO_HASH_mode = 13, /*!< Used for PKCS1 v1.5 Encrypt and Decrypt.*/
- CRYS_RSA_HASH_NumOfModes, /*!< Maximal number of hash operations modes. */
-
- CRYS_RSA_HASH_OpModeLast = 0x7FFFFFFF, /*! Reserved.*/
-
-}CRYS_RSA_HASH_OpMode_t;
-
-
-/*! Defines the enum of the RSA decryption mode. */
-typedef enum
-{
- CRYS_RSA_NoCrt = 10, /*!< Decryption no CRT mode.*/
- CRYS_RSA_Crt = 11, /*!< Decryption CRT mode.*/
-
- CRYS_RSADecryptionNumOfOptions, /*! Reserved.*/
-
- CRYS_RSA_DecryptionModeLast= 0x7FFFFFFF, /*! Reserved.*/
-
-}CRYS_RSA_DecryptionMode_t;
-
-/*! RSA Key source definition. */
-typedef enum
-{
- CRYS_RSA_ExternalKey = 1, /*!< External key.*/
- CRYS_RSA_InternalKey = 2, /*!< Internal key.*/
-
- CRYS_RSA_KeySourceLast= 0x7FFFFFFF, /*!< Reserved. */
-
-}CRYS_RSA_KeySource_t;
-
-/*! MGF values. */
-typedef enum
-{
- CRYS_PKCS1_MGF1 = 0, /*! MGF1. */
- CRYS_PKCS1_NO_MGF = 1, /*! No MGF. */
- CRYS_RSA_NumOfMGFFunctions, /*! Maximal number of MGF options. */
-
- CRYS_PKCS1_MGFLast= 0x7FFFFFFF, /*! Reserved.*/
-
-}CRYS_PKCS1_MGF_t;
-
-/*! Defines the enum of the various PKCS1 versions. */
-typedef enum
-{
- CRYS_PKCS1_VER15 = 0, /*! PKCS1 version 15. */
- CRYS_PKCS1_VER21 = 1, /*! PKCS1 version 21. */
-
- CRYS_RSA_NumOf_PKCS1_versions, /*! Maximal number of PKCS versions. */
-
- CRYS_PKCS1_versionLast= 0x7FFFFFFF, /*! Reserved.*/
-
-}CRYS_PKCS1_version;
-
-
-/*! Enum defining primality testing mode in Rabin-Miller
- and Lucas-Lehmer tests (internal tests). */
-typedef enum
-{
- /* P and Q primes */
- CRYS_RSA_PRIME_TEST_MODE = 0, /*!< PRIME test. */
- /* FFC (DH, DSA) primes */
- CRYS_DH_PRIME_TEST_MODE = 1, /*!< DH Prime test. */
-
- CRYS_RSA_DH_PRIME_TEST_OFF_MODE /*!< Reserved.*/
-
-}CRYS_RSA_DH_PrimeTestMode_t;
-
-/************************ Public and private key database Structs ******************************/
-
-/* .................. The public key definitions ...................... */
-/* --------------------------------------------------------------------- */
-
-/*! Public key data structure (used internally). */
-typedef struct
-{
- /*! RSA modulus buffer. */
- uint32_t n[CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS];
- /*! RSA modulus size in bits. */
- uint32_t nSizeInBits;
-
- /*! RSA public exponent buffer. */
- uint32_t e[CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS];
- /*! RSA public exponent buffer. */
- uint32_t eSizeInBits;
-
- /*! Buffer for internal usage.*/
- uint32_t crysRSAIntBuff[CRYS_PKA_BARRETT_MOD_TAG_BUFF_SIZE_IN_WORDS];
-
-}CRYSRSAPubKey_t;
-
-/*! The public key's user structure prototype. This structure must be saved by the user, and is used as input to the RSA functions
-(such as ::SaSi_RsaSchemesEncrypt etc.) */
-typedef struct CRYS_RSAUserPubKey_t
-{
- /*! Validation tag. */
- uint32_t valid_tag;
- /*! Public key data. */
- uint32_t PublicKeyDbBuff[ sizeof(CRYSRSAPubKey_t)/sizeof(uint32_t) + 1 ];
-
-
-}CRYS_RSAUserPubKey_t;
-
-/* .................. The private key definitions ...................... */
-/* --------------------------------------------------------------------- */
-
-/*! Private key on non-CRT mode data structure (used internally). */
-typedef struct
-{
- /*! RSA private exponent buffer. */
- uint32_t d[CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS];
- /*! RSA private exponent size in bits. */
- uint32_t dSizeInBits;
-
- /*! RSA public exponent buffer. */
- uint32_t e[CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS];
- /*! RSA public exponent size in bits. */
- uint32_t eSizeInBits;
-
-}CRYSRSAPrivNonCRTKey_t;
-
-/*! Private key on CRT mode data structure (used internally). */
-#ifndef CRYS_NO_RSA_SMALL_CRT_BUFFERS_SUPPORT
-/* use small CRT buffers */
-typedef struct
-{
- /*! First factor buffer. */
- uint32_t P[CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS/2];
- /*! First factor size in bits. */
- uint32_t PSizeInBits;
-
- /*! Second factor buffer. */
- uint32_t Q[CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS/2];
- /*! Second factor size in bits. */
- uint32_t QSizeInBits;
-
- /*! First CRT exponent buffer. */
- uint32_t dP[CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS/2];
- /*! First CRT exponent size in bits. */
- uint32_t dPSizeInBits;
-
- /*! Second CRT exponent buffer. */
- uint32_t dQ[CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS/2];
- /*! Second CRT exponent size in bits. */
- uint32_t dQSizeInBits;
-
- /*! First CRT coefficient buffer. */
- uint32_t qInv[CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS/2];
- /*! First CRT coefficient size in bits. */
- uint32_t qInvSizeInBits;
-
-}CRYSRSAPrivCRTKey_t;
-
-/*! Size of CRYSRSAPrivCRTKey_t structure in words (used for temp buffers allocation). */
-#define CRYS_RSA_SIZE_IN_WORDS_OF_CRYSRSAPrivCRTKey_t (CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS*7/2 + 5)
-
-#else /* use large CRT buffers */
-typedef struct
-{
- /* The first factor buffer and size in bits */
- uint32_t P[CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS];
- uint32_t PSizeInBits;
-
- /* The second factor buffer and its size in bits */
- uint32_t Q[CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS];
- uint32_t QSizeInBits;
-
- /* The first CRT exponent buffer and its size in bits */
- uint32_t dP[CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS];
- uint32_t dPSizeInBits;
-
- /* The second CRT exponent buffer and its size in bits */
- uint32_t dQ[CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS];
- uint32_t dQSizeInBits;
-
- /* The first CRT coefficient buffer and its size in bits */
- uint32_t qInv[CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS];
- uint32_t qInvSizeInBits;
-
-}CRYSRSAPrivCRTKey_t;
-
-/* size of CRYSRSAPrivCRTKey_t structure in words (used for temp buffers allocation) */
-#define CRYS_RSA_SIZE_IN_WORDS_OF_CRYSRSAPrivCRTKey_t (CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS*5 + 5)
-
-#endif
-
-/*! Private key data structure (used internally). */
-typedef struct
-{
- /*! RSA modulus buffer. */
- uint32_t n[CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS];
- /*! RSA modulus size in bits. */
- uint32_t nSizeInBits;
-
- /*! Decryption operation mode. */
- CRYS_RSA_DecryptionMode_t OperationMode;
-
- /*! Key source ( internal or external ). */
- CRYS_RSA_KeySource_t KeySource;
-
-
- /*! Union between the CRT and non-CRT data structures. */
- union
- {
- CRYSRSAPrivNonCRTKey_t NonCrt; /*!< Non CRT data structure. */
- CRYSRSAPrivCRTKey_t Crt; /*!< CRT data structure. */
- }PriveKeyDb;
-
- /*! Internal buffer. */
- uint32_t crysRSAPrivKeyIntBuff[CRYS_PKA_PRIV_KEY_BUFF_SIZE_IN_WORDS];
-
-}CRYSRSAPrivKey_t;
-
-/*! The private key's user structure prototype. This structure must be saved by the user, and is used as input to the RSA functions
-(such as ::SaSi_RsaSchemesDecrypt etc.). */
-typedef struct CRYS_RSAUserPrivKey_t
-{
- /*! Validation tag.*/
- uint32_t valid_tag;
- /*! Private key data. */
- uint32_t PrivateKeyDbBuff[ sizeof(CRYSRSAPrivKey_t)/sizeof(uint32_t) + 1 ] ;
-
-}CRYS_RSAUserPrivKey_t;
-
-/*! Temporary buffers for RSA usage. */
-typedef struct CRYS_RSAPrimeData_t
-{
- /* The aligned input and output data buffers */
- uint32_t DataIn[CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS]; /*!< Temporary buffer for data in.*/
- uint32_t DataOut[CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS]; /*!< Temporary buffer for data out.*/
- /*! Temporary buffer for internal data.*/
- SASI_PAL_COMPILER_ALIGN(4) uint8_t InternalBuff[CRYS_RSA_TMP_BUFF_SIZE];
-
-}CRYS_RSAPrimeData_t;
-
-/*! KG data type. */
-typedef union CRYS_RSAKGData_t
-{
- /*! RSA Key Generation buffers definitions. */
- struct
- {
- /* The aligned input and output data buffers */
- /*! First factor buffer. */
- uint32_t p[CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS / 2];
- /*! Second factor buffer. */
- uint32_t q[CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS / 2];
- union {
- /*! Internal buffer. */
- uint32_t crysRSAKGDataIntBuff[CRYS_PKA_KGDATA_BUFF_SIZE_IN_WORDS];
- #ifdef DX_SOFT_KEYGEN
- /* # added for compatibility with size of KGData SW type */
- uint32_t TempbuffExp[PKI_KEY_GEN_TEMP_BUFF_SIZE_WORDS];
- #endif
- }kg_buf;
- }KGData;
-
- /*! Buffers for internal usage. */
- union {
- /*! Internally used buffer.*/
- struct {
- CRYS_RSAPrimeData_t PrimData;
- }primExt;
- #ifdef DX_SOFT_KEYGEN
- /* # added for compatibility with size of SW CRYSRSAPrivKey_t type */
- SW_Shared_CRYS_RSAPrimeData_t SW_Shared_PrimData;
- #endif
- }prim;
-}CRYS_RSAKGData_t;
-
- /*************
- * RSA contexts
- **************/
-/************************ CRYS RSA struct for Private Key ******************************/
-
-/*! Context definition for operations that use the RSA private key. */
-typedef struct
-{
-
- /*! Private key data. */
- CRYS_RSAUserPrivKey_t PrivUserKey;
-
- /*! RSA PKCS#1 Version 1.5 or 2.1 */
- uint8_t PKCS1_Version;
-
- /*! MGF to be used for the PKCS1 Ver 2.1 sign or verify operations. */
- uint8_t MGF_2use;
-
- /*! Salt random length for PKCS#1 PSS Ver 2.1*/
- uint16_t SaltLen;
-
- /*! Internal buffer. */
- CRYS_RSAPrimeData_t PrimeData;
-
- /*! HASH context buffer. */
- uint32_t CRYSPKAHashCtxBuff[CRYS_PKA_RSA_HASH_CTX_SIZE_IN_WORDS];
- /*! HASH result buffer. */
- CRYS_HASH_Result_t HASH_Result;
- /*! HASH result size in words. */
- uint16_t HASH_Result_Size; /*in words*/
- /*! RSA HASH operation mode (all modes RSA supports).*/
- CRYS_RSA_HASH_OpMode_t RsaHashOperationMode; /*RSA HASH enum. */
- /*! HASH operation mode.*/
- CRYS_HASH_OperationMode_t HashOperationMode; /*CRYS HASH enum. */
- /*! HASH block size (in words).*/
- uint16_t HashBlockSize; /*in words*/
- /*! HASH flag. */
- bool doHash;
-
- /* Used for sensitive data manipulation in the context space, which is safer and which saves stack space */
- /*! Internal buffer.*/
- uint32_t EBD[CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS];
- /*! Internal bufffer used size in bits. */
- uint32_t EBDSizeInBits;
-
- /* Used for sensitive data manipulation in the context space, which is safer and which saves stack space */
- /*! Internal buffer.*/
- uint8_t T_Buf[CRYS_RSA_SIZE_OF_T_STRING_BYTES];
- /*! Internal buffer used size.*/
- uint16_t T_BufSize;
-
- /*! Buffer for the use of the Ber encoder in the case of PKCS#1 Ver 1.5. */
- uint32_t BER[CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS];
- /*! Ber encoder buffer size.*/
- uint16_t BERSize;
-
- /*! Internal buffer.*/
- uint8_t DummyBufAESBlockSize[16];
-
-}RSAPrivContext_t;
-
-/*! The user's context prototype - the argument type that is passed by the user
- to the RSA APIs. The context saves the state of the operation and must be saved by the user
- till the end of the APIs flow . */
-typedef struct CRYS_RSAPrivUserContext_t
-{
- /*! Validation tag. */
- uint32_t valid_tag;
- /*! Internally used value.*/
- uint32_t AES_iv;
- /*! Private data context buffer. */
- SASI_PAL_COMPILER_ALIGN(4) uint8_t context_buff[ sizeof(RSAPrivContext_t) + sizeof(uint32_t)]; /* must be aligned to 4 */
-
-}CRYS_RSAPrivUserContext_t;
-
-
-/************************ CRYS RSA struct for Public Key ******************************/
-
-/*! Context definition for operations that use the RSA public key. */
-typedef struct
-{
-
- /*! RSA public key structure. */
- CRYS_RSAUserPubKey_t PubUserKey;
-
- /*! Public key size in bytes */
- uint32_t nSizeInBytes;
-
- /*! RSA PKCS#1 Version 1.5 or 2.1 */
- uint8_t PKCS1_Version;
-
- /*! MGF to be used for the PKCS1 Ver 2.1 Sign or Verify operations */
- uint8_t MGF_2use;
-
- /*! Salt random length for PKCS#1 PSS Ver 2.1*/
- uint16_t SaltLen;
-
- /*! Internal buffer. */
- CRYS_RSAPrimeData_t PrimeData;
-
- /*! HASH context. */
- uint32_t CRYSPKAHashCtxBuff[CRYS_PKA_RSA_HASH_CTX_SIZE_IN_WORDS];
- /*! HASH result buffer. */
- CRYS_HASH_Result_t HASH_Result;
- /*! HASH result size. */
- uint16_t HASH_Result_Size; /* denotes the length, in words, of the hash function output */
- /*! RSA HASH operation mode (all modes RSA supports). */
- CRYS_RSA_HASH_OpMode_t RsaHashOperationMode; /*RSA HASH enum. */
- /*! HASH operation mode. */
- CRYS_HASH_OperationMode_t HashOperationMode; /*CRYS HASH enum. */
- /*! HASH block size. */
- uint16_t HashBlockSize; /*in words*/
- /*! HASH flag.*/
- bool doHash;
-
- /* Used for sensitive data manipulation in the context space, which is safer and which saves stack space */
- /*! Internal buffer.*/
- uint32_t EBD[CRYS_RSA_MAXIMUM_MOD_BUFFER_SIZE_IN_WORDS];
- /*! Internal bufffer used size in bits. */
- uint32_t EBDSizeInBits;
-
- /* Used for sensitive data manipulation in the context space, which is safer and which saves stack space */
- /*! Internal buffer.*/
- uint8_t T_Buf[CRYS_RSA_SIZE_OF_T_STRING_BYTES];
- /*! Internal buffer used size.*/
- uint16_t T_BufSize;
-
- /*! Internal buffer.*/
- uint8_t DummyBufAESBlockSize[16];
-
-}RSAPubContext_t;
-
-/*! Temporary buffers for the RSA usage. */
-typedef struct CRYS_RSAPubUserContext_t
-{
- /*! Validation tag. */
- uint32_t valid_tag;
- /*! Internally used value.*/
- uint32_t AES_iv; /* For the use of the AES CBC mode of Encryption and Decryption of the context in CCM */
- /*! Public data context buffer. */
- uint32_t context_buff[ sizeof(RSAPubContext_t)/sizeof(uint32_t) + 1] ;
-
-}CRYS_RSAPubUserContext_t;
-
-
-
-/*! Required for internal FIPS verification for RSA key generation. */
-typedef struct CRYS_RSAKGFipsContext_t{
- /*! Internal buffer. */
- CRYS_RSAPrimeData_t primData;
- /*! Buffer used for decryption. */
- uint8_t decBuff[((CRYS_RSA_MIN_VALID_KEY_SIZE_VALUE_IN_BITS/SASI_BITS_IN_BYTE) - 2*(CRYS_HASH_SHA1_DIGEST_SIZE_IN_BYTES) -2)];
- /*! Buffer used for encryption. */
- uint8_t encBuff[CRYS_RSA_FIPS_MODULUS_SIZE_BITS/SASI_BITS_IN_BYTE];
-}CRYS_RSAKGFipsContext_t;
-
-/*! Required for internal FIPS verification for RSA KAT. The RSA KAT tests defined for scheme 2.1 with modulus key size of 2048. */
-typedef struct CRYS_RSAFipsKatContext_t{
- /*! RSA user's key (either public or private).*/
- union {
- /*! RSA user's public key. */
- CRYS_RSAUserPubKey_t userPubKey; // used for RsaEnc and RsaVerify
- /*! RSA user's private key. */
- CRYS_RSAUserPrivKey_t userPrivKey; // used for RsaDec and RsaSign
- }userKey;
- /*! RSA user's context (either public or private).*/
- union {
- /*! RSA user's private context. */
- CRYS_RSAPrivUserContext_t userPrivContext; // used for RsaSign
- /*! RSA public user's context. */
- CRYS_RSAPubUserContext_t userPubContext; // used for RsaVerify
- /*! Internal buffers. */
- CRYS_RSAPrimeData_t primData; // used for RsaEnc and RsaDec
- }userContext;
- /*! RSA user's data. */
- union {
- struct { // used for RsaEnc and RsaDec
- /*! Buffer for encrypted data. */
- uint8_t encBuff[CRYS_RSA_FIPS_MODULUS_SIZE_BITS/SASI_BITS_IN_BYTE];
- /*! Buffer for decrypted data. */
- uint8_t decBuff[((CRYS_RSA_FIPS_MODULUS_SIZE_BITS/SASI_BITS_IN_BYTE) - 2*(CRYS_HASH_SHA1_DIGEST_SIZE_IN_BYTES) -2)];
- }userOaepData;
- /*! Buffer for Signed data. */
- uint8_t signBuff[CRYS_RSA_FIPS_MODULUS_SIZE_BITS/SASI_BITS_IN_BYTE]; // used for RsaSign and RsaVerify
- }userData;
-}CRYS_RSAFipsKatContext_t;
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_srp.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_srp.h
deleted file mode 100644
index ed23098..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_srp.h
+++ /dev/null
@@ -1,375 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-/*!
-@file
-@brief This file contains all of the enums and definitions that are used for the
- CRYS SRP APIs, as well as the APIs themselves.
-@defgroup crys_srp CryptoCell SRP APIs
-@{
-@ingroup cryptocell_api
-
-*/
-#ifndef CRYS_SRP_H
-#define CRYS_SRP_H
-
-
-#include "ssi_pal_types.h"
-#include "crys_error.h"
-#include "crys_pka_defs_hw.h"
-#include "crys_hash.h"
-#include "crys_rnd.h"
-
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*!\internal The following describes the SRP APIs usage for the Device and the Accessory :*
-
- Device (User) Accessory (Host)
-* -------------- -----------------
-
- 1. CRYS_SRP_HK_INIT(CRYS_SRP_USER, .......) CRYS_SRP_HK_INIT(CRYS_SRP_HOST, .....)
-
- 2. CRYS_SRP_PwdVerCreate(..)
-
- 3. CRYS_SRP_UserPubKeyCreate(..) CRYS_SRP_HostPubKeyCreate(..)
-
- 4. CRYS_SRP_UserProofCalc(..)
-
- 5. CRYS_SRP_HostProofVerifyAndCalc(..)
-
- 6. CRYS_SRP_UserProofVerify(..)
-
- 7. CRYS_SRP_Clear(..) CRYS_SRP_Clear(..)
-
- */
-
-/************************ Defines ******************************/
-/*! The SRP modulus sizes. */
-/*! 1024 bits modulus size. */
-#define CRYS_SRP_MODULUS_SIZE_1024_BITS 1024
-/*! 1536 bits modulus size. */
-#define CRYS_SRP_MODULUS_SIZE_1536_BITS 1536
-/*! 2048 bits modulus size. */
-#define CRYS_SRP_MODULUS_SIZE_2048_BITS 2048
-/*! 3072 bits modulus size. */
-#define CRYS_SRP_MODULUS_SIZE_3072_BITS 3072
-
-/*! Maximal modulus size in bits. */
-#define CRYS_SRP_MAX_MODULUS_IN_BITS CRYS_SRP_MODULUS_SIZE_3072_BITS
-/*! Maximal modulus size in bytes. */
-#define CRYS_SRP_MAX_MODULUS (CRYS_SRP_MAX_MODULUS_IN_BITS/SASI_BITS_IN_BYTE)
-/*! Maximal modulus size in words. */
-#define CRYS_SRP_MAX_MODULUS_IN_WORDS (CRYS_SRP_MAX_MODULUS_IN_BITS/SASI_BITS_IN_32BIT_WORD)
-
-/*! The SRP private number size range. */
-/*! Minimal private number size in bits. */
-#define CRYS_SRP_PRIV_NUM_MIN_SIZE_IN_BITS (256)
-/*! Minimal private number size in bytes. */
-#define CRYS_SRP_PRIV_NUM_MIN_SIZE (CRYS_SRP_PRIV_NUM_MIN_SIZE_IN_BITS/SASI_BITS_IN_BYTE)
-/*! Minimal private number size in words. */
-#define CRYS_SRP_PRIV_NUM_MIN_SIZE_IN_WORDS (CRYS_SRP_PRIV_NUM_MIN_SIZE_IN_BITS/SASI_BITS_IN_32BIT_WORD)
-/*! Maximal private number size in bits. */
-#define CRYS_SRP_PRIV_NUM_MAX_SIZE_IN_BITS (CRYS_SRP_MAX_MODULUS_IN_BITS)
-/*! Maximal private number size in bytes. */
-#define CRYS_SRP_PRIV_NUM_MAX_SIZE (CRYS_SRP_PRIV_NUM_MAX_SIZE_IN_BITS/SASI_BITS_IN_BYTE)
-/*! Maximal private number size in words. */
-#define CRYS_SRP_PRIV_NUM_MAX_SIZE_IN_WORDS (CRYS_SRP_PRIV_NUM_MAX_SIZE_IN_BITS/SASI_BITS_IN_32BIT_WORD)
-
-/*! Maximal SRP HASH digest size in words. */
-#define CRYS_SRP_MAX_DIGEST_IN_WORDS CRYS_HASH_RESULT_SIZE_IN_WORDS
-/*! Maximal SRP HASH digest size in bytes. */
-#define CRYS_SRP_MAX_DIGEST (CRYS_SRP_MAX_DIGEST_IN_WORDS*SASI_32BIT_WORD_SIZE)
-
-/*! Minimal salt size in bytes. */
-#define CRYS_SRP_MIN_SALT_SIZE (8)
-/*! Minimal salt size in words. */
-#define CRYS_SRP_MIN_SALT_SIZE_IN_WORDS (CRYS_SRP_MIN_SALT_SIZE/SASI_32BIT_WORD_SIZE)
-/*! Maximal salt size in bytes. */
-#define CRYS_SRP_MAX_SALT_SIZE (64)
-/*! Maximal salt size in words. */
-#define CRYS_SRP_MAX_SALT_SIZE_IN_WORDS (CRYS_SRP_MAX_SALT_SIZE/SASI_32BIT_WORD_SIZE)
-
-/************************ Typedefs ****************************/
-/*! SRP modulus buffer definition. */
-typedef uint8_t CRYS_SRP_Modulus_t[CRYS_SRP_MAX_MODULUS];
-
-/*! SRP digest buffer definition. */
-typedef uint8_t CRYS_SRP_Digest_t[CRYS_SRP_MAX_DIGEST];
-
-/*! SRP secret buffer definition. */
-typedef uint8_t CRYS_SRP_Secret_t[2*CRYS_SRP_MAX_DIGEST];
-
-/************************ Enums ********************************/
-
-/*!
-SRP supported versions
-*/
-typedef enum {
- CRYS_SRP_VER_3 = 0, /*!< VER 3. */
- CRYS_SRP_VER_6 = 1, /*!< VER 6. */
- CRYS_SRP_VER_6A = 2, /*!< VER 6A. */
- CRYS_SRP_VER_HK = 3, /*!< VER 6A. */
- /*! Maximal number of supported versions.*/
- CRYS_SRP_NumOfVersions,
- /*! Reserved.*/
- CRYS_SRP_VersionLast= 0x7FFFFFFF,
-
-}CRYS_SRP_Version_t;
-
-/*!
-SRP entity type
-*/
-typedef enum {
- CRYS_SRP_HOST = 1, /*!< Host entity, called also server, verifier, or Accessory in Home-Kit */
- CRYS_SRP_USER = 2, /*!< User entity, called also client, or Device in Home-Kit */
- /*! Maximal number of entities types.*/
- CRYS_SRP_NumOfEntityType,
- /*! Reserved.*/
- CRYS_SRP_EntityLast= 0x7FFFFFFF,
-
-}CRYS_SRP_Entity_t;
-
-/************************ Structs ******************************/
-
-/*! Group parameters for the SRP - defines the modulus and the generator used */
-typedef struct CRYS_SRP_GroupParam_t {
- /*! SRP modulus.*/
- CRYS_SRP_Modulus_t modulus;
- /*! SRP generator.*/
- uint8_t gen;
- /*! SRP modulus size in bits .*/
- size_t modSizeInBits;
- /*! SRP valid Np.*/
- uint32_t validNp;
- /*! SRP Np buffer.*/
- uint32_t Np[CRYS_PKA_BARRETT_MOD_TAG_BUFF_SIZE_IN_WORDS];
-}CRYS_SRP_GroupParam_t;
-
-/************************ context Structs ******************************/
-/*! The SRP context prototype */
-typedef struct CRYS_SRP_Context_t {
- /*! SRP entitiy type.*/
- CRYS_SRP_Entity_t srpType;
- /*! SRP version.*/
- CRYS_SRP_Version_t srpVer;
- /*! Group parameter including the modulus information.*/
- CRYS_SRP_GroupParam_t groupParam; // N, g, Np
- /*! Hash mode.*/
- CRYS_HASH_OperationMode_t hashMode;
- /*! Hash digest size.*/
- size_t hashDigestSize;
- /*! Pointer to RND state.*/
- CRYS_RND_State_t *pRndState;
- /*! Pointer to random vector generation function.*/
- SaSiRndGenerateVectWorkFunc_t rndGenerateVectFunc;
- /*! Modulus.*/
- CRYS_SRP_Modulus_t ephemPriv; // a or b
- /*! Modulus size.*/
- size_t ephemPrivSize;
- /*! User name digest.*/
- CRYS_SRP_Digest_t userNameDigest; // M
- /*! Cred digest.*/
- CRYS_SRP_Digest_t credDigest; // p
- /*! SRP K multiplier. */ //
- CRYS_SRP_Digest_t kMult; // k multiplier
-}CRYS_SRP_Context_t;
-
-
-/************************ SRP common Functions **********************/
-/****************************************************************************************************/
-/*!
-@brief This function initiates the SRP context.
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_srp_error.h or crys_hash_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_SRP_Init(
- CRYS_SRP_Entity_t srpType, /*!< [in] SRP entity type. */
- CRYS_SRP_Version_t srpVer, /*!< [in] SRP version. */
- CRYS_SRP_Modulus_t srpModulus, /*!< [in] A pointer to the SRP modulus, BE byte buffer. */
- uint8_t srpGen, /*!< [in] The SRP generator param. */
- size_t modSizeInBits, /*!< [in] The SRP modulus size in bits:1024, 1536, 2048 & 3072 */
- CRYS_HASH_OperationMode_t hashMode, /*!< [in] Enumerator defining the HASH mode. */
- uint8_t *pUserName, /*!< [in] A Pointer to user name. */
- size_t userNameSize, /*!< [in] The user name buffer size > 0. */
- uint8_t *pPwd, /*!< [in] A Pointer to user password. */
- size_t pwdSize, /*!< [in] The user password buffer size > 0 if pPwd is valid. */
- void *pRndState, /*!< [in] A Pointer to RND context.*/
- SaSiRndGenerateVectWorkFunc_t rndGenerateVectFunc, /*!< [in] Pointer to random vector generation function.*/
- CRYS_SRP_Context_t *pCtx /*!< [out] A Pointer to the SRP host context.*/
-);
-
-/*! MACRO definition for a specific SRP initialization function.*/
-#define CRYS_SRP_HK_INIT(srpType, srpModulus, srpGen, modSizeInBits, pUserName, userNameSize, pPwd, pwdSize, pRndState, rndGenerateVectFunc, pCtx) \
- CRYS_SRP_Init(srpType, CRYS_SRP_VER_HK, srpModulus, srpGen, modSizeInBits, CRYS_HASH_SHA512_mode, pUserName, userNameSize, pPwd, pwdSize, pRndState, rndGenerateVectFunc, pCtx)
-
-
-/****************************************************************************************************/
-/*!
-@brief This function calculates pSalt & password verifier
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_srp_error.h, crys_rnd_error.h or crys_hash_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_SRP_PwdVerCreate(
- size_t saltSize, /*!< [in] The size of the random salt to generate,
- The range is between CRYS_SRP_MIN_SALT_SIZE
- to CRYS_SRP_MAX_SALT_SIZE. */
- uint8_t *pSalt, /*!< [out] A Pointer to the pSalt number (s).*/
- CRYS_SRP_Modulus_t pwdVerifier, /*!< [out] A Pointer to the password verifier (v). */
- CRYS_SRP_Context_t *pCtx /*!< [out] A Pointer to the SRP context.*/
-);
-
-
-/****************************************************************************************************/
-/*!
-@brief Clears the SRP context.
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_srp_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_SRP_Clear(
- CRYS_SRP_Context_t *pCtx /*!< [in/out] A Pointer to the SRP context.*/
-);
-
-
-/************************ SRP Host Functions **********************/
-/****************************************************************************************************/
-/*!
-@brief This function generates host public & private ephemeral key, known as B & b in RFC
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_srp_error.h or crys_rnd_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_SRP_HostPubKeyCreate(
- size_t ephemPrivSize, /*!< [in] The size of the generated ephemeral private key (b).
- The range is between CRYS_SRP_PRIV_NUM_MIN_SIZE to
- CRYS_SRP_PRIV_NUM_MAX_SIZE */
- CRYS_SRP_Modulus_t pwdVerifier, /*!< [in] A Pointer to the verifier (v). */
- CRYS_SRP_Modulus_t hostPubKeyB, /*!< [out] A Pointer to the host ephemeral public key (B). */
- CRYS_SRP_Context_t *pCtx /*!< [in/out] A Pointer to the SRP context.*/
-);
-
-
-/*!
-@brief Verifies the user Proof and calculates the Host message proof.
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_srp_error.h or crys_hash_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_SRP_HostProofVerifyAndCalc(
- size_t saltSize, /*!< [in] The size of the random salt,
- The range is between CRYS_SRP_MIN_SALT_SIZE
- to CRYS_SRP_MAX_SALT_SIZE. */
- uint8_t *pSalt, /*!< [in] A Pointer to the pSalt number.*/
- CRYS_SRP_Modulus_t pwdVerifier, /*!< [in] A Pointer to the password verifier (v). */
- CRYS_SRP_Modulus_t userPubKeyA, /*!< [in] A Pointer to the user ephemeral public key (A). */
- CRYS_SRP_Modulus_t hostPubKeyB, /*!< [in] A Pointer to the host ephemeral public key (B). */
- CRYS_SRP_Digest_t userProof, /*!< [in] A Pointer to the SRP user proof buffer (M1).*/
- CRYS_SRP_Digest_t hostProof, /*!< [out] A Pointer to the SRP host proof buffer (M2).*/
- CRYS_SRP_Secret_t sharedSecret, /*!< [out] A Pointer to the SRP shared secret (K).*/
- CRYS_SRP_Context_t *pCtx /*!< [in] A Pointer to the SRP context.*/
-);
-
-
-
-/************************ SRP User Functions **********************/
-/****************************************************************************************************/
-/*!
-@brief This function generates user public & private ephemeral key, known as A & a in RFC
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_srp_error.h or crys_rnd_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_SRP_UserPubKeyCreate(
- size_t ephemPrivSize, /*!< [in] The size of the generated ephemeral private key (a).
- The range is between CRYS_SRP_PRIV_NUM_MIN_SIZE to
- CRYS_SRP_PRIV_NUM_MAX_SIZE */
- CRYS_SRP_Modulus_t userPubKeyA, /*!< [out] A Pointer to the user ephemeral public key (A). */
- CRYS_SRP_Context_t *pCtx /*!< [in/out] A Pointer to the SRP context.*/
-);
-
-
-/****************************************************************************************************/
-/*!
-@brief This function calculates the user proof.
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_srp_error.h or crys_hash_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_SRP_UserProofCalc(
- size_t saltSize, /*!< [in] The size of the random salt,
- The range is between CRYS_SRP_MIN_SALT_SIZE
- to CRYS_SRP_MAX_SALT_SIZE. */
- uint8_t *pSalt, /*!< [in] A Pointer to the pSalt number.*/
- CRYS_SRP_Modulus_t userPubKeyA, /*!< [in] A Pointer to the user public ephmeral key (A).*/
- CRYS_SRP_Modulus_t hostPubKeyB, /*!< [in] A Pointer to the host public ephmeral key (B).*/
- CRYS_SRP_Digest_t userProof, /*!< [out] A Pointer to the SRP user proof buffer (M1).*/
- CRYS_SRP_Secret_t sharedSecret, /*!< [out] A Pointer to the SRP shared secret (K).*/
- CRYS_SRP_Context_t *pCtx /*!< [out] A Pointer to the SRP context.*/
-);
-
-/****************************************************************************************************/
-/*!
-@brief This function verifies the host proof
-
-@return CRYS_OK on success.
-@return A non-zero value on failure as defined crys_srp_error.h or crys_hash_error.h.
-*/
-CIMPORT_C CRYSError_t CRYS_SRP_UserProofVerify(
- CRYS_SRP_Secret_t sharedSecret, /*!< [in] A Pointer to the SRP shared secret (K).*/
- CRYS_SRP_Modulus_t userPubKeyA, /*!< [in] A Pointer to the user public ephmeral key (A).*/
- CRYS_SRP_Digest_t userProof, /*!< [in] A Pointer to the SRP user proof buffer (M1).*/
- CRYS_SRP_Digest_t hostProof, /*!< [in] A Pointer to the SRP host proof buffer (M2).*/
- CRYS_SRP_Context_t *pCtx /*!< [out] A Pointer to the SRP user context.*/
-);
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif /* #ifndef CRYS_SRP_H */
-
-
-
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_srp_error.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_srp_error.h
deleted file mode 100644
index 085b03b..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/crys_srp_error.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef CRYS_SRP_ERROR_H
-#define CRYS_SRP_ERROR_H
-
-
-#include "crys_error.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*!
-@file
-@brief This module contains the definitions of the CRYS SRP errors.
-@defgroup crys_srp_error CryptoCell SRP specific errors
-@{
-@ingroup crys_srp
-*/
-
-
-
-/************************ Defines ******************************/
-
-/*! The CRYS SRP module errors base address - 0x00F02600. */
-/*! Illegal parameter. */
-#define CRYS_SRP_PARAM_INVALID_ERROR (CRYS_SRP_MODULE_ERROR_BASE + 0x01UL)
-/*! Illegal modulus size . */
-#define CRYS_SRP_MOD_SIZE_INVALID_ERROR (CRYS_SRP_MODULE_ERROR_BASE + 0x02UL)
-/*! Illegal state (uninitialized) . */
-#define CRYS_SRP_STATE_UNINITIALIZED_ERROR (CRYS_SRP_MODULE_ERROR_BASE + 0x03UL)
-/*! Result validation error. */
-#define CRYS_SRP_RESULT_ERROR (CRYS_SRP_MODULE_ERROR_BASE + 0x04UL)
-/*! Invalid parameter. */
-#define CRYS_SRP_PARAM_ERROR (CRYS_SRP_MODULE_ERROR_BASE + 0x05UL)
-/*! Internal PKI error */
-#define CRYS_SRP_PKI_INTERNAL_ERROR (CRYS_SRP_MODULE_ERROR_BASE + 0x06UL)
-
-/************************ Enums ********************************/
-
-/************************ Typedefs ****************************/
-
-/************************ Structs *****************************/
-
-/************************ Public Variables *********************/
-
-/************************ Public Functions *********************/
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/dx_reg_base_host.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/dx_reg_base_host.h
deleted file mode 100644
index d4c5bc1..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/dx_reg_base_host.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-#ifndef __DX_REG_BASE_HOST_H__
-#define __DX_REG_BASE_HOST_H__
-
-/* Identify platform: Xilinx Zynq7000 ZC706 */
-#define DX_PLAT_ZYNQ7000 1
-#define DX_PLAT_ZYNQ7000_ZC706 1
-
-/* SEP core clock frequency in MHz */
-#define DX_SEP_FREQ_MHZ 64
-#define DX_BASE_CC 0x5002B000
-
-#define DX_BASE_ENV_REGS 0x40008000
-#define DX_BASE_ENV_CC_MEMORIES 0x40008000
-#define DX_BASE_ENV_FLASH 0x40008700
-#define DX_BASE_ENV_PERF_RAM 0x40009000
-
-#define DX_BASE_HOST_RGF 0x0UL
-#define DX_BASE_CRY_KERNEL 0x0UL
-#define DX_BASE_ROM 0x40000000
-
-#define DX_BASE_RNG 0x0000UL
-#endif /*__DX_REG_BASE_HOST_H__*/
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/sns_silib.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/sns_silib.h
deleted file mode 100644
index 5760501..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/sns_silib.h
+++ /dev/null
@@ -1,101 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-/*!
-@file
-@brief This file contains all of the enums and definitions that are used for the
- CryptoCell Lib init and finish APIs, as well as the APIs themselves.
-@defgroup sns_silib CryptoCell library basic APIs
-@{
-@ingroup cryptocell_api
-
-*/
-
-#ifndef __SNS_SILIB_H__
-#define __SNS_SILIB_H__
-
-#include "ssi_pal_types.h"
-#include "crys_rnd.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*! Definitions for error returns from SaSi_LibInit or SaSi_LibFini functions. */
-typedef enum {
- SA_SILIB_RET_OK = 0, /*!< Success defintion.*/
- SA_SILIB_RET_EINVAL_CTX_PTR, /*!< Illegal context pointer.*/
- SA_SILIB_RET_EINVAL_WORK_BUF_PTR, /*!< Illegal work buffer pointer.*/
- SA_SILIB_RET_HAL, /*!< Error returned from HAL layer.*/
- SA_SILIB_RET_PAL, /*!< Error returned from PAL layer.*/
- SA_SILIB_RET_EINVAL_HW_VERSION, /*!< Invalid HW version. */
- SA_SILIB_RET_EINVAL_HW_SIGNATURE, /*!< Invalid HW signature. */
- SA_SILIB_RESERVE32B = 0x7FFFFFFFL /*!< Reserved.*/
-} SA_SilibRetCode_t;
-
-
-/*! Internal defintion for the product register. */
-#define DX_VERSION_PRODUCT_BIT_SHIFT 0x18UL
-/*! Internal defintion for the product register size. */
-#define DX_VERSION_PRODUCT_BIT_SIZE 0x8UL
-
-
-
-/*!
-@brief This function Perform global initialization of the ARM CryptoCell 3xx runtime library;
-it must be called once per ARM CryptoCell for 3xx cold boot cycle.
-
-\note The Mutexes, if used, are initialized by this API. Therefore, unlike the other APIs in the library,
-this API is not thread-safe.
-@return SA_SILIB_RET_OK on success.
-@return A non-zero value in case of failure.
-*/
-SA_SilibRetCode_t SaSi_LibInit(void);
-
-/*!
-@brief This function finalize the library operations. It frees the associated resources (mutexes) and call hal and pal terminate functions.
-in case of active instansiation - one must call CRYS_RND_UnInstantiation to clean the rnd state.
-*/
-void SaSi_LibFini(void);
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif /*__DX_CCLIB_H__*/
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_aes.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_aes.h
deleted file mode 100644
index a42b65f..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_aes.h
+++ /dev/null
@@ -1,325 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-/*! @file
-@brief This file contains all of the enums and definitions that are used for the
-CryptoCell AES APIs, as well as the APIs themselves.
-@defgroup ssi_aes CryptoCell AES APIs
-@{
-@ingroup cryptocell_api
-*/
-
-#ifndef SSI_AES_H
-#define SSI_AES_H
-
-#include "ssi_pal_types.h"
-#include "ssi_aes_error.h"
-#include "ssi_aes_defs.h"
-
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/************************ Defines ******************************/
-
-
-/************************ Enums ********************************/
-
-/*!
-Encrypt or Decrypt operation mode.
-*/
-typedef enum {
- /*! Encrypt operation. */
- SASI_AES_ENCRYPT = 0,
- /*! Decrypt operation. */
- SASI_AES_DECRYPT = 1,
- /*! Maximal number of operations. */
- SASI_AES_NUM_OF_ENCRYPT_MODES,
- /*! Reserved. */
- SASI_AES_ENCRYPT_MODE_LAST = 0x7FFFFFFF
-}SaSiAesEncryptMode_t;
-
-/*!
-AES operation mode.
-*/
-typedef enum {
- SASI_AES_MODE_ECB = 0, /*!< ECB mode. */
- SASI_AES_MODE_CBC = 1, /*!< CBC mode. */
- SASI_AES_MODE_CBC_MAC = 2, /*!< CBC-MAC mode. */
- SASI_AES_MODE_CTR = 3, /*!< CTR mode. */
- SASI_AES_MODE_XCBC_MAC = 4, /*!< XCBC-MAC mode. */
- SASI_AES_MODE_CMAC = 5, /*!< CMAC mode. */
- SASI_AES_MODE_XTS = 6, /*!< XTS mode. */
- SASI_AES_MODE_CBC_CTS = 7, /*!< CBC-CTS mode. */
- SASI_AES_MODE_OFB = 8, /*!< OFB mode. */
-
- /*! Maximal number of AES modes */
- SASI_AES_NUM_OF_OPERATION_MODES,
- /*! Reserved. */
- SASI_AES_OPERATION_MODE_LAST = 0x7FFFFFFF
-}SaSiAesOperationMode_t;
-
-/*!
-AES padding type.
-*/
-typedef enum {
- SASI_AES_PADDING_NONE = 0, /*!< No padding. */
- SASI_AES_PADDING_PKCS7 = 1, /*!< PKCS7 padding. */
-
- /*! Maximal number of AES padding modes */
- SASI_AES_NUM_OF_PADDING_TYPES,
- /*! Reserved. */
- SASI_AES_PADDING_TYPE_LAST = 0x7FFFFFFF
-}SaSiAesPaddingType_t;
-
-/*!
-AES key type.
-*/
-typedef enum {
- SASI_AES_USER_KEY = 0, /*!< user key. */
- SASI_AES_PLATFORM_KEY = 1, /*!< Kplt hardware key. */
- SASI_AES_CUSTOMER_KEY = 2, /*!< Kcst hardware key. */
-
- /*! Maximal number of AES key types */
- SASI_AES_NUM_OF_KEY_TYPES,
- /*! Reserved. */
- SASI_AES_KEY_TYPE_LAST = 0x7FFFFFFF
-}SaSiAesKeyType_t;
-
-/************************ Typedefs ****************************/
-
-/*! Defines the IV buffer - 16 bytes array. */
-typedef uint8_t SaSiAesIv_t[SASI_AES_IV_SIZE_IN_BYTES];
-
-/*! Defines the AES key data buffer. */
-typedef uint8_t SaSiAesKeyBuffer_t[SASI_AES_KEY_MAX_SIZE_IN_BYTES];
-
-/************************ Structs ******************************/
-
-/*! The user's context prototype - the argument type that is passed by the user
- to the AES APIs. The context saves the state of the operation and must be saved by the user
- till the end of the APIs flow*/
-typedef struct SaSiAesUserContext_t {
- /*! Context buffer for internal usage. */
- uint32_t buff[SASI_AES_USER_CTX_SIZE_IN_WORDS];
-}SaSiAesUserContext_t;
-
-
-/*! AES User Key Data. */
-typedef struct SaSiAesUserKeyData_t {
- uint8_t * pKey; /*!< Pointer to the key. */
- size_t keySize; /*!< The key size in bytes. Valid values:
- <ul><li> For XTS mode - 32 or 64 byte, indicating the full size of the double key (2x128 or 2x256 bit).</li>
- <li>For XCBC-MAC mode - 16 byte (limited by the standard).</li>
- <li>For all other modes - 16, 24 or 32 byte.</li></ul> */
-}SaSiAesUserKeyData_t;
-
-/*! AES HW Key Data - this structure is likely to be changed when we'll start using it. */
-typedef struct SaSiAesHwKeyData_t {
- size_t slotNumber; /*!< Slot number. */
-}SaSiAesHwKeyData_t;
-
-
-/************************ Functions *****************************/
-
-/*!
-@brief This function is used to initialize an AES operation context.
- To operate the AES machine, this must be the first API called.
-
-@return SASI_OK on success,
-@return A non-zero value from ssi_aes_error.h on failure.
-*/
-CIMPORT_C SaSiError_t SaSi_AesInit(
- SaSiAesUserContext_t * pContext, /*!< [in] Pointer to the AES context buffer that is allocated by the caller and initialized by this API.
- Should be used in all subsequent calls that are part of the same operation. */
- SaSiAesEncryptMode_t encryptDecryptFlag, /*!< [in] A flag specifying whether an AES Encrypt (SASI_AES_Encrypt) or Decrypt (SASI_AES_Decrypt) operation should be performed.
- Must be set to CRYS_AES_Encrypt in CBC-MAC, XCBC-MAC and CMAC modes. */
- SaSiAesOperationMode_t operationMode, /*!< [in] The operation cipher/mode. */
- SaSiAesPaddingType_t paddingType /*!< [in] The padding type for AES operation:
- <ul><li> NONE - supported for all operation modes.</li>
- <li> PKCS7 - supported for ECB, CBC, CBC-MAC operation modes.</li></ul> */
-);
-
-
-/*!
-@brief This function sets the key information for the AES operation, in the context that was initialized by SaSi_AesInit.
-\note When FIPS certification mode is set to ON, and the mode is AES-XTS, weak keys are not allowed (128/256 lsb bits must be
-different than 128/256 msb bits, according to the key size).
-@return SASI_OK on success,
-@return A non-zero value from ssi_aes_error.h on failure.
-*/
-CIMPORT_C SaSiError_t SaSi_AesSetKey(
- SaSiAesUserContext_t * pContext, /*!< [in] Pointer to the AES context, after it was initialized by SaSi_AesInit. */
- SaSiAesKeyType_t keyType, /*!< [in] The type of key to be used for the AES operation.
- Currently only SASI_AES_USER_KEY is supported - the key is plaintext and provided in the pKeyData parameter. */
- void * pKeyData, /*!< [in] Pointer to the key data structure (to be casted to the relevant struct type). */
- size_t keyDataSize /*!< [in] The size of data passed in pKeyData in bytes. */
-);
-
-
-/*!
-@brief This function sets the IV, counter or tweak data for the following AES operation on the same context.
- The context must be first initialized by SaSi_AesInit.
- It must be called at least once prior to the first SaSi_AesBlock operation on the same context - for those ciphers that require it.
- If needed, it can also be called to override the IV in the middle of a sequence of SaSi_AesBlock operations.
-
-@return SASI_OK on success,
-@return A non-zero value from ssi_aes_error.h on failure.
-*/
-CIMPORT_C SaSiError_t SaSi_AesSetIv(
- SaSiAesUserContext_t * pContext, /*!< [in] Pointer to the AES context. */
- SaSiAesIv_t pIV /*!< [in] Pointer to the buffer of the IV, counter or tweak.
- <ul><li> For CBC, CBC-CTS, OFB and CBC-MAC modes - the IV value.</li>
- <li> For CTR mode - the counter.</li>
- <li> For XTS mode - the tweak value.</li>
- <li> For all other modes - N/A. </li></ul>*/
-);
-
-
-/*!
-@brief This function retrieves the current IV, counter or tweak from the AES context.
-
-@return SASI_OK on success,
-@return A non-zero value from ssi_aes_error.h on failure.
-*/
-CIMPORT_C SaSiError_t SaSi_AesGetIv(
- SaSiAesUserContext_t * pContext, /*!< [in] Pointer to the AES context. */
- SaSiAesIv_t pIV /*!< [out] Pointer to the buffer of the IV, counter or tweak.
- <ul><li> For CBC, CBC-CTS, OFB and CBC-MAC modes - the IV value.</li>
- <li> For CTR mode - the counter.</li>
- <li> For XTS mode - the tweak value.</li>
- <li> For all other modes - N/A. </li></ul> */
-);
-
-
-/*!
-@brief This function performs an AES operation on an input data buffer, according to the configuration defined in the context parameter.
- It can be called as many times as needed, until all the input data is processed.
- SaSi_AesInit, SaSi_AesSetKey, and for some ciphers SaSi_AesSetIv, must be called before
- the first call to this API with the same context.
-
-@return SASI_OK on success,
-@return A non-zero value from ssi_aes_error.h on failure.
-*/
-CIMPORT_C SaSiError_t SaSi_AesBlock(
- SaSiAesUserContext_t * pContext, /*!< [in] Pointer to the AES context. */
- uint8_t * pDataIn, /*!< [in] Pointer to the buffer of the input data to the AES. The pointer does not need to be aligned.
- For TZ, the size of the scatter/gather list representing the data buffer is limited to 128 entries,
- and the size of each entry is limited to 64KB (fragments larger than 64KB are broken into fragments <= 64KB).
- For ARM CryptoCell 3xx, The buffer must be contiguous and limited to 64KB. */
- size_t dataInSize, /*!< [in] Size of the input data in bytes.
- <ul><li> For all modes except XTS, must be multiple of 16 bytes.</li>
- <li> For XTS mode, only the following data sizes are supported: 64, 512, 520, 521, 1024 and 4096 bytes.
- The data passed in a single SaSi_AesBlock call is considered to be a single XTS unit.
- All subsequent calls to this API with the same context must use the same data size. </li></ul>*/
- uint8_t * pDataOut /*!< [out] Pointer to the output buffer. The pointer does not need to be aligned.
- For CBC-MAC, XCBC-MAC, CMAC modes it may be NULL.
- For TZ, the size of the scatter/gather list representing the data buffer is limited to 128 entries,
- and the size of each entry is limited to 64KB (fragments larger than 64KB are broken into fragments <= 64KB).
- For ARM CryptoCell 3xx, The buffer must be contiguous and limited to 64KB. */
-);
-
-
-/*!
-@brief This function is used to finish AES operation.
-
- It processes the last data block if needed, finalizes the AES operation (cipher-specific),
- and produces operation results (for MAC operations).
- \note In case AES padding is used (PKCS#7) Din and Dout user's buffers must include extra space for
- the padding scheme.
-
-@return SASI_OK on success,
-@return A non-zero value from ssi_aes_error.h on failure.
-*/
-CIMPORT_C SaSiError_t SaSi_AesFinish(
- SaSiAesUserContext_t * pContext, /*!< [in] Pointer to the AES context. */
- size_t dataSize, /*!< [in] The size of the input data in bytes.
- <ul><li> For CBC-CTS mode, must be > 16. Can be <=16 only if this is the only data (no previous calls were
- made to SaSi_AesBlock with the same context).</li>
- <li> For XTS mode, the data size must conform to the dataInSize rules as listed for XTS under the
- SaSi_AesBlock API, and match the data size passed in the previous calls to SaSi_AesBlock with the
- same context.</li>
- <li> For all other modes, zero is a valid size.</li>
- <li> For ECB, CBC, CBC-MAC modes: </li>
- <ul><li> Must be >= 0, if direction is SASI_AES_ENCRYPT and padding type is SASI_AES_PADDING_PKCS7.</li>
- <li> Must be >= 16 and a multiple of 16 bytes, if direction is SASI_AES_DECRYPT and padding type
- is SASI_AES_PADDING_PKCS7.</li>
- <li> Must be a multiple of 16 bytes, otherwise. </li></ul></ul>*/
- uint8_t * pDataIn, /*!< [in] Pointer of the input data buffer.
- For TZ, the size of the scatter/gather list representing the data buffer is limited to 128 entries,
- and the size of each entry is limited to 64KB (fragments larger than 64KB are broken into fragments <= 64KB).
- For ARM CryptoCell 3xx, The buffer must be contiguous and limited to 64KB. */
- size_t dataInBuffSize, /*!< [in] Size of pDataIn buffer in bytes.
- <ul><li> Must be >= dataSize. </li>
- <li> According to padding type, must be >= dataSize + padding. For PKCS7, padding size is
- maximum SASI_AES_BLOCK_SIZE_IN_BYTES. </li></ul>*/
- uint8_t * pDataOut, /*!< [out] Pointer to the output buffer.
- For TZ, the size of the scatter/gather list representing the data buffer is limited to 128 entries,
- and the size of each entry is limited to 64KB (fragments larger than 64KB are broken into fragments <= 64KB).
- For ARM CryptoCell 3xx, The buffer must be contiguous and limited to 64KB. */
- size_t * dataOutBuffSize /*!< [in,out] In - Size of pDataOut buffer in bytes.
- The output buffer size must be no less than:
- <ul><li> For CBC-MAC, XCBC-MAC, CMAC modes - 16 bytes (for MAC result).</li>
- <li> For non-MAC modes - dataInBuffSize.</li></ul>
- Out - The size in bytes of the actual output data:
- <ul><li> If direction is SASI_AES_ENCRYPT and padding type is SASI_AES_PADDING_PKCS7, it is the actual size
- with the padding.</li>
- <li> If direction is SASI_AES_DECRYPT and padding type is SASI_AES_PADDING_PKCS7, it is the size without
- the padding. </li>
- <li> For CBC-MAC, XCBC-MAC, CMAC modes - always 16 bytes. </li></ul>*/
-);
-
-
-/*!
-@brief This function releases and crears resources after AES operations.
-
-@return SASI_OK on success,
-@return A non-zero value from ssi_aes_error.h on failure.
-*/
-CIMPORT_C SaSiError_t SaSi_AesFree(
- SaSiAesUserContext_t * pContext /*!< [in] Pointer to the AES context. */
-);
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif /* #ifndef SSI_AES_H */
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_aes_defs.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_aes_defs.h
deleted file mode 100644
index 02789d0..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_aes_defs.h
+++ /dev/null
@@ -1,83 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-/*!
-@file
-@brief This file contains definitions that are used for the ARM CryptoCell 3xx version of the CryptoCell AES APIs.
-@defgroup ssi_aes_defs CryptoCell AES definitions
-@{
-@ingroup ssi_aes
-
-*/
-
-#ifndef SSI_AES_DEFS_H
-#define SSI_AES_DEFS_H
-
-#include "ssi_pal_types.h"
-
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/************************ Defines ******************************/
-
-/*! The size of the user's context prototype (see ::SaSiAesUserContext_t) in words. */
-#define SASI_AES_USER_CTX_SIZE_IN_WORDS (4+4+7+4)
-
-/*! The AES block size in words. */
-#define SASI_AES_BLOCK_SIZE_IN_WORDS 4
-/*! The AES block size in bytes. */
-#define SASI_AES_BLOCK_SIZE_IN_BYTES (SASI_AES_BLOCK_SIZE_IN_WORDS * sizeof(uint32_t))
-
-/*! The size of the IV buffer in words. */
-#define SASI_AES_IV_SIZE_IN_WORDS SASI_AES_BLOCK_SIZE_IN_WORDS
-/*! The size of the IV buffer in bytes. */
-#define SASI_AES_IV_SIZE_IN_BYTES (SASI_AES_IV_SIZE_IN_WORDS * sizeof(uint32_t))
-
-/*! The maximum size of the AES KEY in words. */
-#define SASI_AES_KEY_MAX_SIZE_IN_WORDS 4
-/*! The maximum size of the AES KEY in bytes. */
-#define SASI_AES_KEY_MAX_SIZE_IN_BYTES (SASI_AES_KEY_MAX_SIZE_IN_WORDS * sizeof(uint32_t))
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif /* #ifndef SSI_AES_DEFS_H */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_aes_error.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_aes_error.h
deleted file mode 100644
index 11c6927..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_aes_error.h
+++ /dev/null
@@ -1,133 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-/*!
-@file
-@brief This file contains the definitions of the CryptoCell AES errors.
-@defgroup ssi_aes_error CryptoCell AES specific errors
-@{
-@ingroup ssi_aes
-*/
-
-#ifndef SSI_AES_ERROR_H
-#define SSI_AES_ERROR_H
-
-#include "crys_error.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/************************ Defines ******************************/
-
-/* generic errors */
-/*! General fatal error. */
-#define SASI_FATAL_ERROR CRYS_FATAL_ERROR
-/*! General out of resources error. */
-#define SASI_OUT_OF_RESOURCE_ERROR CRYS_OUT_OF_RESOURCE_ERROR
-/*! General Illegal resource value error. */
-#define SASI_ILLEGAL_RESOURCE_VAL_ERROR CRYS_ILLEGAL_RESOURCE_VAL_ERROR
-
-/*! CRYS_AES_MODULE_ERROR_BASE - 0x00F00000. */
-/*! Illegal user context. */
-#define SASI_AES_INVALID_USER_CONTEXT_POINTER_ERROR (CRYS_AES_MODULE_ERROR_BASE + 0x00UL)
-/*! Illegal IV or tweak pointer. */
-#define SASI_AES_INVALID_IV_OR_TWEAK_PTR_ERROR (CRYS_AES_MODULE_ERROR_BASE + 0x01UL)
-/*! Illegal operation. */
-#define SASI_AES_ILLEGAL_OPERATION_MODE_ERROR (CRYS_AES_MODULE_ERROR_BASE + 0x02UL)
-/*! Illegal key size. */
-#define SASI_AES_ILLEGAL_KEY_SIZE_ERROR (CRYS_AES_MODULE_ERROR_BASE + 0x03UL)
-/*! Illegal key pointer. */
-#define SASI_AES_INVALID_KEY_POINTER_ERROR (CRYS_AES_MODULE_ERROR_BASE + 0x04UL)
-/*! Unsupported key type. */
-#define SASI_AES_KEY_TYPE_NOT_SUPPORTED_ERROR (CRYS_AES_MODULE_ERROR_BASE + 0x05UL)
-/*! Illegal operation. */
-#define SASI_AES_INVALID_ENCRYPT_MODE_ERROR (CRYS_AES_MODULE_ERROR_BASE + 0x06UL)
-/*! User context corrupted. */
-#define SASI_AES_USER_CONTEXT_CORRUPTED_ERROR (CRYS_AES_MODULE_ERROR_BASE + 0x07UL)
-/*! Illegal data in pointer. */
-#define SASI_AES_DATA_IN_POINTER_INVALID_ERROR (CRYS_AES_MODULE_ERROR_BASE + 0x08UL)
-/*! Illegal data out pointer. */
-#define SASI_AES_DATA_OUT_POINTER_INVALID_ERROR (CRYS_AES_MODULE_ERROR_BASE + 0x09UL)
-/*! Illegal data in size. */
-#define SASI_AES_DATA_IN_SIZE_ILLEGAL (CRYS_AES_MODULE_ERROR_BASE + 0x0AUL)
-/*! Illegal data out address. */
-#define SASI_AES_DATA_OUT_DATA_IN_OVERLAP_ERROR (CRYS_AES_MODULE_ERROR_BASE + 0x0BUL)
-/*! Illegal data in buffer size. */
-#define SASI_AES_DATA_IN_BUFFER_SIZE_ERROR (CRYS_AES_MODULE_ERROR_BASE + 0x0CUL)
-/*! Illegal data out buffer size. */
-#define SASI_AES_DATA_OUT_BUFFER_SIZE_ERROR (CRYS_AES_MODULE_ERROR_BASE + 0x0DUL)
-/*! Illegal padding type. */
-#define SASI_AES_ILLEGAL_PADDING_TYPE_ERROR (CRYS_AES_MODULE_ERROR_BASE + 0x0EUL)
-/*! Incorrect padding. */
-#define SASI_AES_INCORRECT_PADDING_ERROR (CRYS_AES_MODULE_ERROR_BASE + 0x0FUL)
-/*! Output is corrupted. */
-#define SASI_AES_CORRUPTED_OUTPUT_ERROR (CRYS_AES_MODULE_ERROR_BASE + 0x10UL)
-/*! Illegal output size. */
-#define SASI_AES_DATA_OUT_SIZE_POINTER_INVALID_ERROR (CRYS_AES_MODULE_ERROR_BASE + 0x11UL)
-/*! Decryption operation is not permitted in this mode. */
-#define SASI_AES_DECRYPTION_NOT_ALLOWED_ON_THIS_MODE (CRYS_AES_MODULE_ERROR_BASE + 0x12UL)
-/*! Additional block operation is not permitted. */
-#define SASI_AES_ADDITIONAL_BLOCK_NOT_PERMITTED_ERROR (CRYS_AES_MODULE_ERROR_BASE + 0x15UL)
-/*! Illegal context size. */
-#define SASI_AES_CTX_SIZES_ERROR (CRYS_AES_MODULE_ERROR_BASE + 0x16UL)
-
-/*! Illegal parameters. */
-#define SASI_AES_ILLEGAL_PARAMS_ERROR (CRYS_AES_MODULE_ERROR_BASE + 0x60UL)
-/*! Illegal CTR block offset. */
-#define SASI_AES_CTR_ILLEGAL_BLOCK_OFFSET_ERROR (CRYS_AES_MODULE_ERROR_BASE + 0x70UL)
-/*! Illegal counter (in CTR mode). */
-#define SASI_AES_CTR_ILLEGAL_COUNTER_ERROR (CRYS_AES_MODULE_ERROR_BASE + 0x71UL)
-/*! AES is not supported. */
-#define SASI_AES_IS_NOT_SUPPORTED (CRYS_AES_MODULE_ERROR_BASE + 0xFFUL)
-
-/************************ Enums ********************************/
-
-/************************ Typedefs ****************************/
-
-/************************ Structs *****************************/
-
-/************************ Public Variables *********************/
-
-/************************ Public Functions *********************/
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif /* #ifndef SSI_AES_ERROR_H */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_bitops.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_bitops.h
deleted file mode 100644
index 56c85ee..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_bitops.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-/*!
- * \file ssi_bitops.h
- * Bit fields operations macros.
- */
-#ifndef _SSI_BITOPS_H_
-#define _SSI_BITOPS_H_
-
-#define BITMASK(mask_size) (((mask_size) < 32) ? \
- ((1UL << (mask_size)) - 1) : 0xFFFFFFFFUL)
-#define BITMASK_AT(mask_size, mask_offset) (BITMASK(mask_size) << (mask_offset))
-
-#define BITFIELD_GET(word, bit_offset, bit_size) \
- (((word) >> (bit_offset)) & BITMASK(bit_size))
-#define BITFIELD_SET(word, bit_offset, bit_size, new_val) do { \
- word = ((word) & ~BITMASK_AT(bit_size, bit_offset)) | \
- (((new_val) & BITMASK(bit_size)) << (bit_offset)); \
-} while (0)
-
-/* Is val aligned to "align" ("align" must be power of 2) */
-#ifndef IS_ALIGNED
-#define IS_ALIGNED(val, align) \
- (((uint32_t)(val) & ((align) - 1)) == 0)
-#endif
-
-#define SWAP_ENDIAN(word) \
- (((word) >> 24) | (((word) & 0x00FF0000) >> 8) | \
- (((word) & 0x0000FF00) << 8) | (((word) & 0x000000FF) << 24))
-
-#ifdef BIG__ENDIAN
-#define SWAP_TO_LE(word) SWAP_ENDIAN(word)
-#define SWAP_TO_BE(word) word
-#else
-#define SWAP_TO_LE(word) word
-#define SWAP_TO_BE(word) SWAP_ENDIAN(word)
-#endif
-
-
-
-/* Is val a multiple of "mult" ("mult" must be power of 2) */
-#define IS_MULT(val, mult) \
- (((val) & ((mult) - 1)) == 0)
-
-#define IS_NULL_ADDR(adr) \
- (!(adr))
-
-#endif /*_SSI_BITOPS_H_*/
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_abort.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_abort.h
deleted file mode 100644
index 8d7035b..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_abort.h
+++ /dev/null
@@ -1,80 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef _SSI_PAL_ABORT_H
-#define _SSI_PAL_ABORT_H
-
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*----------------------------
- PUBLIC FUNCTIONS
------------------------------------*/
-
-/*!
-@defgroup ssi_pal CryptoCell PAL APIs
-@{
-@ingroup cryptocell_api
-@brief This group is the PAL root group
-@}
-
-@file
-@brief This file contains definitions for PAL Abort API.
-@defgroup ssi_pal_abort CryptoCell PAL abort APIs
-@{
-@ingroup ssi_pal
-
-*/
-
-/*!
-This function performs the "Abort" operation, should be implemented according to platform and OS.
-*/
-
-void SaSi_PalAbort(const char *msg);
-/**
-@}
- */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_barrier.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_barrier.h
deleted file mode 100644
index 1188026..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_barrier.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-#ifndef _SSI_PAL_BARRIER_H
-#define _SSI_PAL_BARRIER_H
-
-/*!
-@file
-@brief This file contains the definitions and APIs for memory barrier implementation.
- This is a place holder for platform specific memory barrier implementation
- The secure core driver should include a memory barrier before and after the last word of the descriptor
- to allow correct order between the words and different descriptors.
-@defgroup ssi_pal_barrier CryptoCell PAL memory Barrier APIs
-@{
-@ingroup ssi_pal
-
-*/
-
-/*!
- * This MACRO is responsible to put the memory barrier after the write operation.
- *
- * @return None
- */
-
-void SaSi_PalWmb(void);
-
-/*!
- * This MACRO is responsible to put the memory barrier before the read operation.
- *
- * @return None
- */
-void SaSi_PalRmb(void);
-
-/**
-@}
- */
-#endif
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_compiler.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_compiler.h
deleted file mode 100644
index 081ce72..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_compiler.h
+++ /dev/null
@@ -1,186 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef __SSI_PAL_COMPILER_H__
-#define __SSI_PAL_COMPILER_H__
-
-/*!
-@file
-@brief This file contains compiler related definitions.
-@defgroup ssi_pal_compiler CryptoCell PAL platform dependant compiler specific definitions
-@{
-@ingroup ssi_pal
-
-*/
-
-#ifdef __GNUC__
-
-/************************ Defines ******************************/
-
-/*! Associate a symbol with a link section. */
-#define SASI_PAL_COMPILER_SECTION(sectionName) __attribute__((section(sectionName)))
-
-/*! Mark symbol as used, i.e., prevent garbage collector from dropping it. */
-#define SASI_PAL_COMPILER_KEEP_SYMBOL __attribute__((used))
-
-/*! Make given data item aligned (alignment in bytes). */
-#define SASI_PAL_COMPILER_ALIGN(alignement) __attribute__((aligned(alignement)))
-
-/*! Mark function that never returns. */
-#define SASI_PAL_COMPILER_FUNC_NEVER_RETURNS __attribute__((noreturn))
-
-/*! Prevent function from being inlined */
-#define SASI_PAL_COMPILER_FUNC_DONT_INLINE __attribute__((noinline))
-
-/*! Given data type may cast (alias) another data type pointer. */
-/* (this is used for "superclass" struct casting) */
-#define SASI_PAL_COMPILER_TYPE_MAY_ALIAS __attribute__((__may_alias__))
-
-/*! Get sizeof for a structure type member. */
-#define SASI_PAL_COMPILER_SIZEOF_STRUCT_MEMBER(type_name, member_name) \
- sizeof(((type_name *)0)->member_name)
-
-/*! Assertion. */
-#define SASI_ASSERT_CONCAT_(a, b) a##b
-#define SASI_ASSERT_CONCAT(a, b) SASI_ASSERT_CONCAT_(a, b)
-#define SASI_PAL_COMPILER_ASSERT(cond, message) \
- enum { SASI_ASSERT_CONCAT(assert_line_, __LINE__) = 1/(!!(cond)) }
-
-#elif defined(__ARM_DSM__) || defined(__CC_ARM)
-#define inline
-/*! Associate a symbol with a link section. */
-#define SASI_PAL_COMPILER_SECTION(sectionName) __attribute__((section(sectionName)))
-
-/*! Mark symbol as used, i.e., prevent garbage collector from dropping it. */
-#define SASI_PAL_COMPILER_KEEP_SYMBOL __attribute__((used))
-
-/*! Make given data item aligned (alignment in bytes). */
-#define SASI_PAL_COMPILER_ALIGN(alignement) __attribute__((aligned(alignement)))
-
-/*! Mark function that never returns. */
-#define SASI_PAL_COMPILER_FUNC_NEVER_RETURNS __attribute__((noreturn))
-
-/*! Prevent function from being inlined. */
-#define SASI_PAL_COMPILER_FUNC_DONT_INLINE __attribute__((noinline))
-
-/*! Given data type may cast (alias) another data type pointer. */
-/* (this is used for "superclass" struct casting) */
-#define SASI_PAL_COMPILER_TYPE_MAY_ALIAS __attribute__((__may_alias__))
-
-/*! Get sizeof for a structure type member. */
-#define SASI_PAL_COMPILER_SIZEOF_STRUCT_MEMBER(type_name, member_name) \
- sizeof(((type_name *)0)->member_name)
-
-/*! Assertion. */
-#define SASI_ASSERT_CONCAT_(a, b) a##b
-#define SASI_ASSERT_CONCAT(a, b) SASI_ASSERT_CONCAT_(a, b)
-#define SASI_PAL_COMPILER_ASSERT(cond, message) \
- enum { SASI_ASSERT_CONCAT(assert_line_, __LINE__) = 1/(!!(cond)) }
-
-#elif defined(__ARM_DS__)
-#define inline
-/*! Associate a symbol with a link section. */
-#define SASI_PAL_COMPILER_SECTION(sectionName) __attribute__((section(sectionName)))
-
-/*! Mark symbol as used, i.e., prevent garbage collector from dropping it. */
-#define SASI_PAL_COMPILER_KEEP_SYMBOL __attribute__((used))
-
-/*! Make given data item aligned (alignment in bytes). */
-#define SASI_PAL_COMPILER_ALIGN(alignement) __attribute__((aligned(alignement)))
-
-/*! Mark function that never returns. */
-#define SASI_PAL_COMPILER_FUNC_NEVER_RETURNS __attribute__((noreturn))
-
-/*! Prevent function from being inlined. */
-#define SASI_PAL_COMPILER_FUNC_DONT_INLINE __attribute__((noinline))
-
-/*! Given data type may cast (alias) another data type pointer. */
-/* (this is used for "superclass" struct casting) */
-#define SASI_PAL_COMPILER_TYPE_MAY_ALIAS
-
-/*! Get sizeof for a structure type member. */
-#define SASI_PAL_COMPILER_SIZEOF_STRUCT_MEMBER(type_name, member_name) \
- sizeof(((type_name *)0)->member_name)
-
-/*! Assertion. */
-#define SASI_ASSERT_CONCAT_(a, b) a##b
-#define SASI_ASSERT_CONCAT(a, b) SASI_ASSERT_CONCAT_(a, b)
-#define SASI_PAL_COMPILER_ASSERT(cond, message) \
- enum { SASI_ASSERT_CONCAT(assert_line_, __LINE__) = 1/(!!(cond)) }
-
-#elif defined(__ICCARM__)
-
-/************************ Defines ******************************/
-
-/*! Associate a symbol with a link section. */
-#define SASI_PAL_COMPILER_SECTION(sectionName) __attribute__((section(sectionName)))
-
-/*! Mark symbol as used, i.e., prevent garbage collector from dropping it. */
-#define SASI_PAL_COMPILER_KEEP_SYMBOL __attribute__((used))
-
-/*! Make given data item aligned (alignment in bytes). */
-#define STRING_PRAGMA(x) _Pragma(#x)
-//#define SASI_PAL_COMPILER_ALIGN(n) STRING_PRAGMA(data_alignment = n)
-#define SASI_PAL_COMPILER_ALIGN(n)
-
-/*! Mark function that never returns. Not implemented */
-#define SASI_PAL_COMPILER_FUNC_NEVER_RETURNS
-
-/* Prevent function from being inlined */
-#define SASI_PAL_COMPILER_FUNC_DONT_INLINE STRING_PRAGMA(optimize = no_inline)
-
-/*! Given data type may cast (alias) another data type pointer. */
-/* (this is used for "superclass" struct casting). Not implemented */
-#define SASI_PAL_COMPILER_TYPE_MAY_ALIAS
-
-/*! Get sizeof for a structure type member. */
-#define SASI_PAL_COMPILER_SIZEOF_STRUCT_MEMBER(type_name, member_name) \
- sizeof(((type_name *)0)->member_name)
-
-/*! Assertion. */
-#define SASI_ASSERT_CONCAT_(a, b) a##b
-#define SASI_ASSERT_CONCAT(a, b) SASI_ASSERT_CONCAT_(a, b)
-
-#define SASI_PAL_COMPILER_ASSERT(cond, message) \
- enum { SASI_ASSERT_CONCAT(assert_line_, __LINE__) = 1/(!!(cond)) }
-
-
-#else
-#error Unsupported compiler.
-#endif
-/**
-@}
- */
-#endif /*__SSI_PAL_COMPILER_H__*/
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_dma.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_dma.h
deleted file mode 100644
index 2a89846..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_dma.h
+++ /dev/null
@@ -1,175 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-
-#ifndef _SSI_PAL_DMA_H
-#define _SSI_PAL_DMA_H
-
-/*!
-@file
-@brief This file contains definitions that are used for the DMA related APIs. The implementation of these functions
-need to be replaced according to Platform and OS.
-@defgroup ssi_pal_dma CryptoCell PAL DMA related APIs
-@{
-@ingroup ssi_pal
-
-*/
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-#include "ssi_pal_types.h"
-#include "ssi_pal_dma_plat.h"
-#include "ssi_pal_dma_defs.h"
-
-/*! User buffer scatter information. */
-typedef struct {
- SaSiDmaAddr_t blockPhysAddr; /*!< Physical address.*/
- uint32_t blockSize; /*!< Block size.*/
-}SaSi_PalDmaBlockInfo_t;
-
-#ifdef BIG__ENDIAN
-/*! Defintion for big to little endian. */
-#define SET_WORD_LE(val) cpu_to_le32(val)
-#else
-/*! Defintion for big to little endian. */
-#define SET_WORD_LE
-#endif
-
-/**
- * @brief This function is called by the ARM TrustZone CryptoCell TEE runtime library before the HW is used.
- * It maps a given data buffer (virtual address) for ARM TrustZone CryptoCell TEE HW DMA use (physical address), and returns the list of
- * one or more DMA-able (physical) blocks. It may lock the buffer for ARM TrustZone CryptoCell TEE HW use. Once it is called,
- * only ARM TrustZone CryptoCell TEE HW access to the buffer is allowed, until it is unmapped.
- * If the data buffer was already mapped by the Secure OS prior to calling the ARM TrustZone CryptoCell TEE runtime library,
- * this API does not have to perform any actual mapping operation, but only return the list of DMA-able blocks.
- *
- * @return A non-zero value in case of failure.
- */
-uint32_t SaSi_PalDmaBufferMap(uint8_t *pDataBuffer, /*!< [in] Address of the buffer to map. */
- uint32_t buffSize, /*!< [in] Buffer size in bytes. */
- SaSi_PalDmaBufferDirection_t copyDirection, /*!< [in] Copy direction of the buffer, according to ::SaSi_PalDmaBufferDirection_t,
- <ul><li>TO_DEVICE - the original buffer is the input to the operation,
- and this function should copy it to the temp buffer,
- prior to the activating the HW on the temp buffer.</li>
- <li>FROM_DEVICE - not relevant for this API.</li>
- <li>BI_DIRECTION - used when the crypto operation is "in-place", meaning
- the result of encryption or decryption is written over the original data
- at the same address. Should be treated by this API same as
- TO_DEVICE. </li></ul> */
- uint32_t *pNumOfBlocks, /*!< [in/out] Maximum numOfBlocks to fill, as output the actual number. */
- SaSi_PalDmaBlockInfo_t *pDmaBlockList, /*!< [out] List of DMA-able blocks that the buffer maps to. */
- SaSi_PalDmaBufferHandle *dmaBuffHandle /*!< [out] A handle to the mapped buffer private resources.*/ );
-
-
-/**
- * @brief This function is called by the ARM TrustZone CryptoCell TEE runtime library after the HW is used.
- * It unmaps a given buffer, and frees its associated resources, if needed. It may unlock the buffer and flush it for CPU use.
- * Once it is called, ARM TrustZone CryptoCell TEE HW does not require access to this buffer anymore.
- * If the data buffer was already mapped by the Secure OS prior to calling the ARM TrustZone CryptoCell TEE runtime library, this API does
- * not have to perform any un-mapping operation, and the actual un-mapping can be done by the Secure OS outside the context
- * of the ARM TrustZone CryptoCell TEE runtime library.
- * @return A non-zero value in case of failure.
- */
-uint32_t SaSi_PalDmaBufferUnmap(uint8_t *pDataBuffer, /*!< [in] Address of the buffer to unmap. */
- uint32_t buffSize, /*!< [in] Buffer size in bytes. */
- SaSi_PalDmaBufferDirection_t copyDirection, /*!< [in] Copy direction of the buffer, according to ::SaSi_PalDmaBufferDirection_t
- <ul><li>TO_DEVICE - not relevant for this API. </li>
- <li>FROM_DEVICE - the temp buffer holds the output of the HW, and this
- API should copy it to the actual output buffer.</li>
- <li>BI_DIRECTION - used when the crypto operation is "in-place", meaning
- the result of encryption or decryption is written over the original data
- at the same address. Should be treated by this API same as
- FROM_DEVICE.</li></ul> */
- uint32_t numOfBlocks, /*!< [in] Number of DMA-able blocks that the buffer maps to. */
- SaSi_PalDmaBlockInfo_t *pDmaBlockList, /*!< [in] List of DMA-able blocks that the buffer maps to. */
- SaSi_PalDmaBufferHandle dmaBuffHandle /*!< [in] A handle to the mapped buffer private resources. */);
-
-
-/**
- * @brief Allocates a DMA-contiguous buffer for CPU use, and returns its virtual address.
- * Before passing the buffer to the ARM TrustZone CryptoCell TEE HW, ::SaSi_PalDmaBufferMap should be called.
- * \note The returned address must be aligned to 32 bits.
- *
- *
- * @return A non-zero value in case of failure.
- */
-uint32_t SaSi_PalDmaContigBufferAllocate(uint32_t buffSize, /*!< [in] Buffer size in bytes.*/
- uint8_t **ppVirtBuffAddr /*!< [out] Virtual address of the allocated buffer.*/);
-
-
-
-/**
- * @brief Frees resources previously allocated by ::SaSi_PalDmaContigBufferAllocate.
- *
- *
- * @return A non-zero value in case of failure.
- */
-uint32_t SaSi_PalDmaContigBufferFree(uint32_t buffSize, /*!< [in] Buffer size in Bytes. */
- uint8_t *pVirtBuffAddr /*!< [in] Virtual address of the buffer to free. */);
-
-
-
-/**
- * @brief Checks whether the buffer is guaranteed to be a single contiguous DMA block.
- *
- *
- * @return Returns TRUE if the buffer is guaranteed to be a single contiguous DMA block, and FALSE otherwise.
- */
-uint32_t SaSi_PalIsDmaBufferContiguous(uint8_t *pDataBuffer, /*!< [in] User buffer address. */
- uint32_t buffSize /*!< [in] User buffer size. */);
-
-
-/**
- * @brief Maps virtual address to physical address.
- *
- *
- * @return Physical address.
- */
-SaSiDmaAddr_t SaSi_PalMapVirtualToPhysical(uint8_t *pVirtualAddr /*!< [in] Pointer to virtual address. */);
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_dma_defs.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_dma_defs.h
deleted file mode 100644
index ce74c10..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_dma_defs.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-/*!
-@file
-@brief This file contains the platform dependent DMA definitions.
-@defgroup ssi_pal_dma_defs CryptoCell PAL DMA specific definitions
-@{
-@ingroup ssi_pal
-*/
-
-#ifndef _SSI_PAL_DMA_DEFS_H
-#define _SSI_PAL_DMA_DEFS_H
-
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*! Definition for DMA buffer handle.*/
-typedef void * SaSi_PalDmaBufferHandle;
-
-/*! DMA directions configuration */
-typedef enum {
- SASI_PAL_DMA_DIR_NONE = 0, /*!< No direction. */
- SASI_PAL_DMA_DIR_TO_DEVICE = 1, /*!< The original buffer is the input to the operation, and should be copied/mapped to a temp buffer,
- prior to activating the HW on the temp buffer. */
- SASI_PAL_DMA_DIR_FROM_DEVICE = 2, /*!< The temp buffer holds the output of the HW, and this API should copy/map it to the original output buffer.*/
- SASI_PAL_DMA_DIR_BI_DIRECTION = 3, /*!< Used when the result is written over the original data at the same address. should be treated as 1 & 2.*/
- SASI_PAL_DMA_DIR_MAX, /*!< Maximal DMA directions options. */
- SASI_PAL_DMA_DIR_RESERVE32 = 0x7FFFFFFF /*!< Reserved.*/
-}SaSi_PalDmaBufferDirection_t;
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_dma_plat.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_dma_plat.h
deleted file mode 100644
index e296977..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_dma_plat.h
+++ /dev/null
@@ -1,72 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-
-#ifndef _SSI_PAL_DMA_PLAT_H
-#define _SSI_PAL_DMA_PLAT_H
-
-#include <stdint.h>
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/**
- * @brief stub function, the function should initialize the DMA mapping of the platform (if needed)
- *
- * @param[in] buffSize - buffer size in Bytes
- * @param[in] physBuffAddr - physical start address of the memory to map
- *
- * @return Virtual start address of contiguous memory
- */
-extern uint32_t SaSi_PalDmaInit(uint32_t buffSize,
- uint32_t physBuffAddr);
-
-/**
- * @brief free system resources created in PD_PAL_DmaInit()
- *
- *
- * @return void
- */
-extern void SaSi_PalDmaTerminate(void);
-#ifdef __cplusplus
-}
-#endif
-
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_error.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_error.h
deleted file mode 100644
index 9210acd..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_error.h
+++ /dev/null
@@ -1,84 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef _SSI_PAL_ERROR_H
-#define _SSI_PAL_ERROR_H
-
-/*!
-@file
-@brief This file contains the platform dependent error definitions.
-@defgroup ssi_pal_error CryptoCell PAL specific errors
-@{
-@ingroup ssi_pal
-
-*/
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*! PAL error base.*/
-#define SASI_PAL_BASE_ERROR 0x0F000000
-
-/* Memory error returns */
-/*! Buffer 1 is greater than buffer 2 error.*/
-#define SASI_PAL_MEM_BUF1_GREATER SASI_PAL_BASE_ERROR + 0x01UL
-/*! Buffer 2 is greater than buffer 1 error.*/
-#define SASI_PAL_MEM_BUF2_GREATER SASI_PAL_BASE_ERROR + 0x02UL
-
-/* Semaphore error returns */
-/*! Semaphor creation failed.*/
-#define SASI_PAL_SEM_CREATE_FAILED SASI_PAL_BASE_ERROR + 0x03UL
-/*! Semaphor deletion failed.*/
-#define SASI_PAL_SEM_DELETE_FAILED SASI_PAL_BASE_ERROR + 0x04UL
-/*! Semaphor reached timeout.*/
-#define SASI_PAL_SEM_WAIT_TIMEOUT SASI_PAL_BASE_ERROR + 0x05UL
-/*! Semaphor wait failed.*/
-#define SASI_PAL_SEM_WAIT_FAILED SASI_PAL_BASE_ERROR + 0x06UL
-/*! Semaphor release failed.*/
-#define SASI_PAL_SEM_RELEASE_FAILED SASI_PAL_BASE_ERROR + 0x07UL
-/*! PAL illegal address.*/
-#define SASI_PAL_ILLEGAL_ADDRESS SASI_PAL_BASE_ERROR + 0x08UL
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_file.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_file.h
deleted file mode 100644
index a39875d..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_file.h
+++ /dev/null
@@ -1,225 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-#ifndef _SSI_PAL_FILE_H
-#define _SSI_PAL_FILE_H
-
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-#include "ssi_pal_types.h"
-#include "ssi_pal_file_plat.h"
-/**
-* @brief File Description:
-* This file contains functions for file related operations. The functions implementations
-* are generally just wrappers to different operating system calls.
-* None of the described functions will check the input parameters so the behavior
-* of the APIs in illegal parameters case is dependent on the operating system behavior.
-*
-*/
-
-/**** ----- Files General Definitions ----- ****/
-typedef enum
-{
- SASI_PAL_Read = 0, /* "r", read only */
- SASI_PAL_ReadAndWrite = 1, /* "r+", read and write */
- SASI_PAL_Write = 2, /* "w", write only */
- SASI_PAL_WriteAndRead = 3, /* "w+", write and read */
- SASI_PAL_Append = 4, /* "a", append to the end of file */
- SASI_PAL_AppendAndRead = 5, /* "a+", append (to the end of file) and read */
- SASI_PAL_ReadBinary = 6, /* "rb", read binary */
- SASI_PAL_ReadAndWriteBinary = 7, /* "r+b" read and write binary */
- SASI_PAL_WriteBinary = 8, /* "wb" write binary */
- SASI_PAL_WriteAndReadBinary = 9, /* "w+b" write and read binary */
- SASI_PAL_AppendBinary = 10, /* "ab" append binary */
- SASI_PAL_AppendAndReadBinary = 11, /* "a+b" append and read binary */
-
- SASI_PAL_DummyMode = 0x7FFFFFFF
-
-}SaSi_PalFileMode_t;
-
-/* Definitions for SEEK positions */
-
-#define SASI_PAL_SEEK_START 0 /* Seek from start of file */
-#define SASI_PAL_SEEK_CUR 1 /* Seek from current position */
-#define SASI_PAL_SEEK_END 2 /* Seek from end of file */
-
-/* Definition for DxFile */
-typedef struct _SaSiFile_t* SaSiFile_t;
-/**** ------------------------------------- ****/
-
-
-/*----------------------------
- PUBLIC FUNCTIONS
------------------------------------*/
-
-/**
- * @brief This function purpose is to create a new file. The function will delete a file
- * If it is already exist.
- *
- *
- * @param[in] aFileName - The file name to create
- *
- * @return The function returns a FILE handle to the opened file, in case of failure
- * the function will return NULL
- */
-SaSiFile_t SaSi_PalFileCreate( char *aFileName );
-
-/* Definition for SaSi_PalFileCreate */
-#define SaSi_PalFileCreate(aFileName) _SaSi_PalFileCreate(aFileName)
-/**
- * @brief This function purpose is to create a new file. The function will delete a file
- * If it is already exist.
- *
- *
- * @param[in] aFileName - The file name to open
- * @param[in] aFileMode - The mode to open the file
- *
- * @return The function returns a FILE handle to the opened file, in case of failure
- * the function will return NULL
- */
-SaSiFile_t SaSi_PalFOpen( char *aFileName, SaSi_PalFileMode_t aFileMode );
-
-/* Definition for fopen */
-#define SaSi_PalFOpen(aFileName, aFileMode) _SaSi_PalFOpen(aFileName, aFileMode)
-/**
- * @brief This function purpose is to close a file (pointed by aFileHandle), The function
- * will dissociate the file from the handle.
- *
- *
- * @param[in] aFileHandle - The file name to create
- *
- * @return The return values is according to operating system return values.
- */
-SaSiError_t SaSi_PalFClose( SaSiFile_t aFileHandle );
-
-/* Definition for fclose */
-#define SaSi_PalFClose(aFileHandle) _SaSi_PalFClose(aFileHandle)
-
-/**
- * @brief This function purpose is to change the file pointer position according to aOffset
- *
- *
- * @param[in] aFileHandle - The file handle
- * @param[in] aOffset - offset to move the file pointer inside the file
- * @param[in] aSeekOrigin - seek origin (current, end or start) to move aOffset from
- *
- * @return The return values is according to operating system return values.
- */
-SaSiError_t SaSi_PalFSeek( SaSiFile_t aFileHandle, int32_t aOffset, uint8_t aSeekOrigin );
-
-/* Definition for fseek */
-#define SaSi_PalFSeek(aFileHandle ,aOffset, aSeekOrigin) _SaSi_PalFSeek(aFileHandle, aOffset, aSeekOrigin)
-
-/**
- * @brief This function purpose is to return the file pointer position
- *
- *
- * @param[in] aFileHandle - The file handle
- *
- * @return The file pointer position
- */
-uint32_t SaSi_PalFTell( SaSiFile_t aFileHandle );
-
-/* definition for SaSi_PalFTell */
-#define SaSi_PalFTell(aFileHandle) _SaSi_PalFTell(aFileHandle)
-
-/**
- * @brief This function purpose is to read aSize of bytes from the file and write it
- * to aBuffer. In case EOF reached before aSize is read the returned size is smaller
- * than aSize.
- *
- *
- * @param[in] aFileHandle - The file handle
- * @param[in] aBuffer - Pointer to buffer to read the data into
- * @param[in] aSize - Number of bytes to read from file
- *
- * @return The number of bytes read from the file
- */
-uint32_t SaSi_PalFRead(SaSiFile_t aFileHandle, void *aBuffer, uint32_t aSize );
-
-/* Definition for fread */
-#define SaSi_PalFRead(aFileHandle, aBuffer, aSize) _SaSi_PalFRead(aFileHandle, aBuffer, aSize)
-/**
- * @brief This function purpose is to write aSize bytes from aBuffer to the file pointed
- * by aFileHandle.
- *
- *
- * @param[in] aFileHandle - The file handle
- * @param[in] aBuffer - Pointer to buffer to read the data into
- * @param[in] aSize - Number of bytes to read from file
- *
- * @return The number of bytes written to the file
- */
-uint32_t SaSi_PalFWrite( SaSiFile_t aFileHandle, const void *aBuffer, uint32_t aSize );
-
-#define SaSi_PalFWrite(aFileHandle, aBuffer, aSize) _SaSi_PalFWrite(aFileHandle, aBuffer, aSize)
-/**
- * @brief This function purpose is to save all buffered data to disk
- *
- *
- * @param[in] aFileHandle - The file handle
- *
- * @return The return values is according to operating system return values.
- */
-SaSiError_t SaSi_PalFFlush( SaSiFile_t aFileHandle );
-
-/* Definition for fflush */
-#define SaSi_PalFFlush(aFileHandle) _SaSi_PalFFlush(aFileHandle)
-
-/**
- * @brief This function purpose is to return the file size
- *
- *
- * @param[in] aFileHandle - The file handle
- * @param[out] aFileSize - The returned file size
- *
- * @return The function will return SASI_SUCCESS in case of success, else errors from
- * ssi_pal_error.h is returned.
- */
-SaSiError_t SaSi_PalFGetFileSize( SaSiFile_t aFileHandle, uint32_t *aFileSize );
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_file_plat.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_file_plat.h
deleted file mode 100644
index 1d99c52..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_file_plat.h
+++ /dev/null
@@ -1,128 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-
-#ifndef _SSI_PAL_FILE_INT_H
-#define _SSI_PAL_FILE_INT_H
-
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-#include "stdio.h"
-
-/**
-* @brief File Description:
-* This file contains wrapper functions for file related operations.
-*/
-
-/**** ----- Files General Definitions ----- ****/
-
-/* Definitions for file modes */
-#define SASI_PAL_MAX_SIZE_MODE 4
-#define SASI_PAL_NUM_OF_SUPPORT_MODES 12
-
-typedef char SaSiPalFileModeStr_t[SASI_PAL_MAX_SIZE_MODE];
-
-typedef SaSiPalFileModeStr_t SaSiPalFileModesTable_t[SASI_PAL_NUM_OF_SUPPORT_MODES];
-
-extern const SaSiPalFileModeStr_t SaSiPalFileModeTable[];
-/**** ------------------------------------- ****/
-
-//#define _SaSiFile_t FILE
-
-/*----------------------------
- PUBLIC FUNCTIONS
------------------------------------*/
-/**
-* @brief A wrapper for fopen functionality (to create a new file, the file is opened for read and
-* write).
-*
-*/
-#define _SaSi_PalFileCreate(aFileName) SaSi_PalFOpen(aFileName, SASI_PAL_WriteAndRead)
-
-/**
-* @brief A wrapper for fopen functionality. SaSiPalFileModeTable contains all possible modes
-* for fopen
-*
-*/
-#define _SaSi_PalFOpen(aFileName, aFileMode) ((SaSiFile_t)fopen(aFileName, SaSiPalFileModeTable[aFileMode]))
-
-/**
- * @brief A wrapper for fclose functionality.
- *
- */
-#define _SaSi_PalFClose(aFileHandle) fclose((FILE*)aFileHandle)
-
-/**
- * @brief A wrapper for fseek functionality
- *
- */
-#define _SaSi_PalFSeek(aFileHandle, aOffset, aSeekOrigin) fseek((FILE*)aFileHandle, aOffset, aSeekOrigin)
-
-/**
- * @brief A wrapper for ftell functionality
- *
- */
-#define _SaSi_PalFTell(aFileHandle) ftell((FILE*)aFileHandle)
-
-/**
-* @brief A wrapper for fread functionality
-*
-*/
-#define _SaSi_PalFRead(aFileHandle, aBuffer, aSize) fread(aBuffer, 1, aSize, (FILE*)aFileHandle)
-
-/**
-* @brief A wrapper for fwrite functionality
-*
-*/
-#define _SaSi_PalFWrite(aFileHandle, aBuffer, aSize) fwrite(aBuffer, 1, aSize, (FILE*)aFileHandle)
-/**
- * @brief A wrapper for fflush functionality
- *
- */
-#define _SaSi_PalFFlush(aFileHandle) fflush((FILE*)aFileHandle)
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_fips.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_fips.h
deleted file mode 100644
index 5fba32e..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_fips.h
+++ /dev/null
@@ -1,119 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef _SSI_PAL_FIPS_H
-#define _SSI_PAL_FIPS_H
-
-/*!
-@file
-@brief This file contains definitions that are used by the FIPS related APIs. The implementation of these functions
-need to be replaced according to Platform and OS.
-*/
-
-#include "ssi_pal_types_plat.h"
-#include "crys_fips.h"
-#include "crys_fips_defs.h"
-
-/**
- * @brief This function purpose is to get the FIPS state.
- *
- *
- * @return Zero on success.
- * @return A non-zero value on failure.
- */
-SaSiError_t SaSi_PalFipsGetState(CC_FipsState_t *pFipsState);
-
-
-/**
- * @brief This function purpose is to get the FIPS Error.
- *
- *
- * @return Zero on success.
- * @return A non-zero value on failure.
- */
-SaSiError_t SaSi_PalFipsGetError(CC_FipsError_t *pFipsError);
-
-
-/**
- * @brief This function purpose is to get the FIPS trace.
- *
- *
- * @return Zero on success.
- * @return A non-zero value on failure.
- */
-SaSiError_t SaSi_PalFipsGetTrace(CC_FipsTrace_t *pFipsTrace);
-
-
-/**
- * @brief This function purpose is to set the FIPS state.
- *
- *
- * @return Zero on success.
- * @return A non-zero value on failure.
- */
-SaSiError_t SaSi_PalFipsSetState(CC_FipsState_t fipsState);
-
-
-/**
- * @brief This function purpose is to set the FIPS error.
- *
- *
- * @return Zero on success.
- * @return A non-zero value on failure.
- */
-SaSiError_t SaSi_PalFipsSetError(CC_FipsError_t fipsError);
-
-
-/**
- * @brief This function purpose is to set the FIPS trace.
- *
- *
- * @return Zero on success.
- * @return A non-zero value on failure.
- */
-SaSiError_t SaSi_PalFipsSetTrace(CC_FipsTrace_t fipsTrace);
-
-
-/**
- * @brief This function should push the FIPS TEE library error towards the REE library,
- * the FIPS error can occur while running KAT tests at library init or while running
- * conditional or continues tests
- *
- * @return Zero on success.
- * @return A non-zero value on failure.
- */
-SaSiError_t SaSi_PalFipsNotifyUponTeeError(void);
-
-#endif // _SSI_PAL_FIPS_H
\ No newline at end of file
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_init.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_init.h
deleted file mode 100644
index a607547..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_init.h
+++ /dev/null
@@ -1,85 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-#ifndef _SSI_PAL_INIT_H
-#define _SSI_PAL_INIT_H
-
-#include "ssi_pal_types.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*!
-@file
-@brief This file contains the PAL layer entry point, it includes the definitions and APIs for PAL initialization and termination.
-@defgroup ssi_pal_init CryptoCell PAL entry\exit point APIs
-@{
-@ingroup ssi_pal
-
-*/
-
-/**
- * @brief This function Performs all initializations that may be required by the customer's PAL implementation, specifically by the DMA-able buffer
- * scheme. The existing implementation allocates a contiguous memory pool that is later used by the ARM TrustZone CryptoCell TEE implementation.
- * In case no initializations are needed in the customer's environment, the function can be minimized to return OK.
- * It is called by ::SaSi_LibInit.
- *
- * @return A non-zero value in case of failure.
- */
-int SaSi_PalInit(void);
-
-
-
-/**
- * @brief This function is used to terminate the PAL implementation and free the resources that were taken by ::SaSi_PalInit.
- *
- * @return Void.
- */
-void SaSi_PalTerminate(void);
-
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_list.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_list.h
deleted file mode 100644
index eda599b..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_list.h
+++ /dev/null
@@ -1,118 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef _SSI_PAL_LIST_H
-#define _SSI_PAL_LIST_H
-
-
-typedef struct SaSi_PalListItem {
- struct SaSi_PalListItem *prev;
- struct SaSi_PalListItem *next;
-} SaSi_PalListItem_s;
-
-/*!
- * Initializes a list. Prev/Next points to the same head object.
- *
- * \param head The head of the list.
- */
-static inline void SaSi_PalListInit(SaSi_PalListItem_s *head)
-{
- head->prev = head;
- head->next = head;
-}
-
-/*!
- * Add a new list item after head of list.
- *
- * \param new New entry to be added
- * \param head List head to add it after
- */
-static inline void SaSi_PalListAdd(SaSi_PalListItem_s *new, SaSi_PalListItem_s *head)
-{
- SaSi_PalListItem_s *next = head->next;
-
- next->prev = new;
- new->next = next;
- new->prev = head;
- head->next = new;
-}
-
-/*!
- * Add a new list item after head of list.
- *
- * \param new New entry to be added
- * \param head List head to add it after
- */
-static inline void SaSi_PalListAddTail(SaSi_PalListItem_s *new, SaSi_PalListItem_s *head)
-{
- SaSi_PalListItem_s *prev = head->prev;
-
- prev->next = new;
- new->next = head;
- new->prev = prev;
- head->prev = new;
-}
-
-/*!
- * Deletes entry from list.
- *
- * \param item The item to delete from the list.
- */
-static inline void SaSi_PalListDel(SaSi_PalListItem_s *item)
-{
- SaSi_PalListItem_s *prev = item->prev;
- SaSi_PalListItem_s *next = item->next;
-
- prev->next = next;
- next->prev = prev;
-
- item->next = item;
- item->prev = item;
-}
-
-/*!
- * Checks whether a list is empty.
- *
- * \param head The list's head
- *
- * \return int True if empty list, False otherwise.
- */
-static inline int SaSi_PalIsListEmpty(const SaSi_PalListItem_s *head)
-{
- return (head->next == head);
-}
-
-#endif
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_log.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_log.h
deleted file mode 100644
index fd97069..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_log.h
+++ /dev/null
@@ -1,216 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef _SSI_PAL_LOG_H_
-#define _SSI_PAL_LOG_H_
-
-#include "ssi_pal_types.h"
-
-
-/*!
-@file
-@brief This file contains the PAL layer log definitions, by default the log is disabled.
-@defgroup ssi_pal_log CryptoCell PAL logging APIs and definitions
-@{
-@ingroup ssi_pal
-
-*/
-
-/* PAL log levels (to be used in SASI_PAL_logLevel) */
-/*! PAL log level - disabled. */
-#define SASI_PAL_LOG_LEVEL_NULL -1 /*!< \internal Disable logging */
-/*! PAL log level - error. */
-#define SASI_PAL_LOG_LEVEL_ERR 0
-/*! PAL log level - warning. */
-#define SASI_PAL_LOG_LEVEL_WARN 1
-/*! PAL log level - info. */
-#define SASI_PAL_LOG_LEVEL_INFO 2
-/*! PAL log level - debug. */
-#define SASI_PAL_LOG_LEVEL_DEBUG 3
-/*! PAL log level - trace. */
-#define SASI_PAL_LOG_LEVEL_TRACE 4
-/*! PAL log level - data. */
-#define SASI_PAL_LOG_LEVEL_DATA 5
-
-#ifndef SASI_PAL_LOG_CUR_COMPONENT
-/* Setting default component mask in case caller did not define */
-/* (a mask that is always on for every log mask value but full masking) */
-/*! Default log debugged component.*/
-#define SASI_PAL_LOG_CUR_COMPONENT 0xFFFFFFFF
-#endif
-#ifndef SASI_PAL_LOG_CUR_COMPONENT_NAME
-/*! Default log component name.*/
-#define SASI_PAL_LOG_CUR_COMPONENT_NAME "Dx"
-#endif
-
-/* Select compile time log level (default if not explicitly specified by caller) */
-#ifndef SASI_PAL_MAX_LOG_LEVEL /* Can be overriden by external definition of this constant */
-#ifdef DEBUG
-/*! Default debug log level (when debug is set to on).*/
-#define SASI_PAL_MAX_LOG_LEVEL SASI_PAL_LOG_LEVEL_ERR /*SASI_PAL_LOG_LEVEL_DEBUG*/
-#else /* Disable logging */
-/*! Default debug log level (when debug is set to off).*/
-#define SASI_PAL_MAX_LOG_LEVEL SASI_PAL_LOG_LEVEL_NULL
-#endif
-#endif /*SASI_PAL_MAX_LOG_LEVEL*/
-/*! Evaluate SASI_PAL_MAX_LOG_LEVEL in case provided by caller */
-#define __SASI_PAL_LOG_LEVEL_EVAL(level) level
-/*! Maximal log level defintion.*/
-#define _SASI_PAL_MAX_LOG_LEVEL __SASI_PAL_LOG_LEVEL_EVAL(SASI_PAL_MAX_LOG_LEVEL)
-
-#ifdef ARM_DSM //not support ARM DSM log feature
-/*! Log init function. */
-#define SaSi_PalLogInit() do {} while (0)
-/*! Log set level function - sets the level of logging in case of debug. */
-#define SaSi_PalLogLevelSet(setLevel) do {} while (0)
-/*! Log set mask function - sets the component masking in case of debug. */
-#define SaSi_PalLogMaskSet(setMask) do {} while (0)
-/*! Log log funtion based on various platform */
-#define SaSi_PalLogPlatsampan(level, msg) do {} while (0)
-
-#else
-#if _SASI_PAL_MAX_LOG_LEVEL > SASI_PAL_LOG_LEVEL_NULL
-/*! Log init function. */
-void SaSi_PalLogInit(void);
-/*! Log set level function - sets the level of logging in case of debug. */
-void SaSi_PalLogLevelSet(int setLevel);
-/*! Log set mask function - sets the component masking in case of debug. */
-void SaSi_PalLogMaskSet(uint32_t setMask);
-/*! Log log funtion based on various platform */
-void SaSi_PalLogPlat(uint32_t level, const char *msg);
-
-/*! Global variable for log level */
-extern int SaSi_PAL_logLevel;
-/*! Global variable for log mask */
-extern uint32_t SaSi_PAL_logMask;
-#else /* No log */
-/*! Log init function. */
-#define SaSi_PalLogInit() do {} while (0)
-/*! Log set level function - sets the level of logging in case of debug. */
-#define SaSi_PalLogLevelSet(setLevel) do {} while (0)
-/*! Log set mask function - sets the component masking in case of debug. */
-#define SaSi_PalLogMaskSet(setMask) do {} while (0)
-/*! Log log funtion based on various platform */
-#define SaSi_PalLogPlat(level, msg) do {} while (0)
-
-#endif
-#endif
-
-/*! Filter logging based on logMask and dispatch to platform specific logging mechanism */
-#define _SASI_PAL_LOG(level, msg) \
- if (SaSi_PAL_logMask & SASI_PAL_LOG_CUR_COMPONENT) \
- SaSi_PalLogPlat(SASI_PAL_LOG_LEVEL_ ## level, msg )
-
-#if (_SASI_PAL_MAX_LOG_LEVEL >= SASI_PAL_LOG_LEVEL_ERR)
-
-/*! Log messages according to log level.*/
-#define SASI_PAL_LOG_ERR(msg) \
- _SASI_PAL_LOG(ERR, msg)
-#else
-/*! Log messages according to log level.*/
-#define SASI_PAL_LOG_ERR( ... ) do {} while (0)
-#endif
-
-#if (_SASI_PAL_MAX_LOG_LEVEL >= SASI_PAL_LOG_LEVEL_WARN)
-/*! Log messages according to log level.*/
-#define SASI_PAL_LOG_WARN(msg) \
- if (SaSi_PAL_logLevel >= SASI_PAL_LOG_LEVEL_WARN) \
- _SASI_PAL_LOG(WARN, msg)
-#else
-/*! Log messages according to log level.*/
-#define SASI_PAL_LOG_WARN( ... ) do {} while (0)
-#endif
-
-#if (_SASI_PAL_MAX_LOG_LEVEL >= SASI_PAL_LOG_LEVEL_INFO)
-/*! Log messages according to log level.*/
-#define SASI_PAL_LOG_INFO(msg) \
- if (SaSi_PAL_logLevel >= SASI_PAL_LOG_LEVEL_INFO) \
- _SASI_PAL_LOG(INFO, msg)
-#else
-/*! Log messages according to log level.*/
-#define SASI_PAL_LOG_INFO( ... ) do {} while (0)
-#endif
-
-#if (_SASI_PAL_MAX_LOG_LEVEL >= SASI_PAL_LOG_LEVEL_DEBUG)
-/*! Log messages according to log level.*/
-#define SASI_PAL_LOG_DEBUG(msg) \
- if (SaSi_PAL_logLevel >= SASI_PAL_LOG_LEVEL_DEBUG) \
- _SASI_PAL_LOG(DEBUG, msg)
-
-/*! Log message buffer.*/
-#define SASI_PAL_LOG_DUMP_BUF(msg, buf, size) \
- do { \
- int i; \
- uint8_t *pData = (uint8_t*)buf; \
- \
- PRINTF("%s (%d):\n", msg, size); \
- for (i = 0; i < size; i++) { \
- PRINTF("0x%02X ", pData[i]); \
- if ((i & 0xF) == 0xF) { \
- PRINTF("\n"); \
- } \
- } \
- PRINTF("\n"); \
- } while (0)
-#else
-/*! Log debug messages.*/
-#define SASI_PAL_LOG_DEBUG( ... ) do {} while (0)
-/*! Log debug buffer.*/
-#define SASI_PAL_LOG_DUMP_BUF(msg, buf, size) do {} while (0)
-#endif
-
-#if (_SASI_PAL_MAX_LOG_LEVEL >= SASI_PAL_LOG_LEVEL_TRACE)
-/*! Log debug trace.*/
-#define SASI_PAL_LOG_TRACE(msg) \
- if (SaSi_PAL_logLevel >= SASI_PAL_LOG_LEVEL_TRACE) \
- _SASI_PAL_LOG(TRACE, format, msg)
-#else
-/*! Log debug trace.*/
-#define SASI_PAL_LOG_TRACE(...) do {} while (0)
-#endif
-
-#if (_SASI_PAL_MAX_LOG_LEVEL >= SASI_PAL_LOG_LEVEL_TRACE)
-/*! Log debug data.*/
-#define SASI_PAL_LOG_DATA(msg) \
- if (SaSi_PAL_logLevel >= SASI_PAL_LOG_LEVEL_TRACE) \
- _SASI_PAL_LOG(DATA, format, msg)
-#else
-/*! Log debug data.*/
-#define SASI_PAL_LOG_DATA( ...) do {} while (0)
-#endif
-/**
-@}
- */
-#endif /*_SSI_PAL_LOG_H_*/
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_mem.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_mem.h
deleted file mode 100644
index 796ca0b..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_mem.h
+++ /dev/null
@@ -1,162 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-
-#ifndef _SSI_PAL_MEM_H
-#define _SSI_PAL_MEM_H
-
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-#include "ssi_pal_types.h"
-
-/*!
-@file
-@brief This file contains functions for memory operations. The functions implementations
- are generally just wrappers to different operating system calls.
- None of the described functions will check the input parameters so the behavior
- of the APIs in illegal parameters case is dependent on the operating system behavior.
-@defgroup ssi_pal_mem CryptoCell PAL memory operations
-@{
-@ingroup ssi_pal
-*/
-
-
-/*----------------------------
- PUBLIC FUNCTIONS
------------------------------------*/
-
-/**** ----- Memory Operations APIs ----- ****/
-
-/*!
-* @brief This function purpose is to compare between two given buffers according to given size.
-*
-* @return The return values is according to operating system return values.
-*/
-
-
-int32_t SaSi_PalMemCmp( const void* aTarget, /*!< [in] The target buffer to compare. */
- const void* aSource, /*!< [in] The Source buffer to compare to. */
- uint32_t aSize /*!< [in] Number of bytes to compare. */);
-
-/*!
- * @brief This function purpose is to perform secured memory comparison between two given
- * buffers according to given size. The function will compare each byte till aSize
- * number of bytes was compared even if the bytes are different.
- * The function should be used to avoid security timing attacks.
- *
- * @return SASI_SUCCESS in case of success,
- * @return value on failure as defined in ssi_pal_error.h.
- */
-SaSiError_t SaSi_PalSecMemCmp( const uint8_t* aTarget, /*!< [in] The target buffer to compare. */
- const uint8_t* aSource, /*!< [in] The Source buffer to compare to. */
- uint32_t aSize /*!< [in] Number of bytes to compare. */);
-
-/*!
- * @brief This function purpose is to copy aSize bytes from source buffer to destination buffer.
- *
- * @return void.
- */
-void SaSi_PalMemCopy( void* aDestination, /*!< [out] The destination buffer to copy bytes to. */
- const void* aSource, /*!< [in] The Source buffer to copy from. */
- uint32_t aSize /*!< [in] Number of bytes to copy. */ );
-
-/*!
- * @brief This function purpose is to copy aSize bytes from source buffer to destination buffer.
- * This function Supports overlapped buffers.
- *
- * @return void.
- */
-void SaSi_PalMemMove( void* aDestination, /*!< [out] The destination buffer to copy bytes to. */
- const void* aSource, /*!< [in] The Source buffer to copy from. */
- uint32_t aSize /*!< [in] Number of bytes to copy. */);
-
-/*!
- * @brief This function purpose is to set aSize bytes in the given buffer with aChar.
- *
- * @return void.
- */
-void SaSi_PalMemSet( void* aTarget, /*!< [out] The target buffer to set. */
- const uint8_t aChar, /*!< [in] The char to set into aTarget. */
- uint32_t aSize /*!< [in] Number of bytes to set. */);
-
-/*!
- * @brief This function purpose is to set aSize bytes in the given buffer with zeroes.
- *
- * @return void.
- */
-void SaSi_PalMemSetZero( void* aTarget, /*!< [out] The target buffer to set. */
- uint32_t aSize /*!< [in] Number of bytes to set. */);
-
-/**** ----- Memory Allocation APIs ----- ****/
-
-/*!
- * @brief This function purpose is to allocate a memory buffer according to aSize.
- *
- *
- * @return The function will return a pointer to allocated buffer or NULL if allocation failed.
- */
-void* SaSi_PalMemMalloc(uint32_t aSize /*!< [in] Number of bytes to allocate. */);
-
-/*!
- * @brief This function purpose is to reallocate a memory buffer according to aNewSize.
- * The content of the old buffer is moved to the new location.
- *
- * @return The function will return a pointer to the newly allocated buffer or NULL if allocation failed.
- */
-void* SaSi_PalMemRealloc( void* aBuffer, /*!< [in] Pointer to allocated buffer. */
- uint32_t aNewSize /*!< [in] Number of bytes to reallocate. */);
-
-/*!
- * @brief This function purpose is to free allocated buffer.
- *
- *
- * @return void.
- */
-void SaSi_PalMemFree(void* aBuffer /*!< [in] Pointer to allocated buffer.*/);
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_memmap.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_memmap.h
deleted file mode 100644
index b0d70bb..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_memmap.h
+++ /dev/null
@@ -1,95 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-
-#ifndef _SSI_PAL_MEMMAP_H
-#define _SSI_PAL_MEMMAP_H
-
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-
-#include "ssi_pal_types.h"
-/*!
-@file
-@brief This file contains functions for memory mapping
- None of the described functions will check the input parameters so the behavior
- of the APIs in illegal parameters case is dependent on the operating system behavior.
-@defgroup ssi_pal_memmap CryptoCell PAL memory mapping APIs
-@{
-@ingroup ssi_pal
-
-*/
-
-
-/*----------------------------
- PUBLIC FUNCTIONS
------------------------------------*/
-
-/**
- * @brief This function purpose is to return the base virtual address that maps the
- * base physical address
- *
- * @return Zero on success.
- * @return A non-zero value in case of failure.
- */
-uint32_t SaSi_PalMemMap(uint32_t physicalAddress, /*!< [in] Start physical address of the I/O range to be mapped. */
- uint32_t mapSize, /*!< [in] Number of bytes that were mapped. */
- uint32_t **ppVirtBuffAddr /*!< [out] Pointer to the base virtual address to which the physical pages were mapped. */ );
-
-
-/**
- * @brief This function purpose is to Unmap a specified address range previously mapped
- * by SaSi_PalMemMap.
- *
- * @return Zero on success.
- * @return A non-zero value in case of failure.
- */
-uint32_t SaSi_PalMemUnMap(uint32_t *pVirtBuffAddr, /*!< [in] Pointer to the base virtual address to which the physical pages were mapped. */
- uint32_t mapSize /*!< [in] Number of bytes that were mapped. */);
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_mutex.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_mutex.h
deleted file mode 100644
index b0dd666..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_mutex.h
+++ /dev/null
@@ -1,117 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-#ifndef _SSI_PAL_MUTEX_H
-#define _SSI_PAL_MUTEX_H
-
-#include "ssi_pal_mutex_plat.h"
-#include "ssi_pal_types_plat.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*!
-@file
-@brief This file contains functions for resource management (mutex operations).
- The functions implementations are generally just wrappers to different operating system calls.
- None of the described functions will check the input parameters so the behavior
- of the APIs in illegal parameters case is dependent on the operating system behavior.
-@defgroup ssi_pal_mutex CryptoCell PAL mutex APIs
-@{
-@ingroup ssi_pal
-*/
-
-
-
-
-/*----------------------------
- PUBLIC FUNCTIONS
------------------------------------*/
-
-/**
- * @brief This function purpose is to create a mutex.
- *
- *
- * @return Zero on success.
- * @return A non-zero value on failure.
- */
-SaSiError_t SaSi_PalMutexCreate(SaSi_PalMutex *pMutexId /*!< [out] Pointer to created mutex handle. */);
-
-
-/**
- * @brief This function purpose is to destroy a mutex.
- *
- *
- * @return Zero on success.
- * @return A non-zero value on failure.
- */
-SaSiError_t SaSi_PalMutexDestroy(SaSi_PalMutex *pMutexId /*!< [in] Pointer to mutex handle. */);
-
-
-/**
- * @brief This function purpose is to Wait for Mutex with aTimeOut. aTimeOut is
- * specified in milliseconds (SASI_INFINITE is blocking).
- *
- * @return Zero on success.
- * @return A non-zero value on failure.
- */
-SaSiError_t SaSi_PalMutexLock (SaSi_PalMutex *pMutexId, /*!< [in] Pointer to Mutex handle. */
- uint32_t aTimeOut /*!< [in] Timeout in mSec, or SASI_INFINITE. */);
-
-
-/**
- * @brief This function purpose is to release the mutex.
- *
- * @return Zero on success.
- * @return A non-zero value on failure.
- */
-SaSiError_t SaSi_PalMutexUnlock (SaSi_PalMutex *pMutexId/*!< [in] Pointer to Mutex handle. */);
-
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_mutex_plat.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_mutex_plat.h
deleted file mode 100644
index 9141c8b..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_mutex_plat.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-
-#ifndef _SSI_PAL_MUTEX_PLAT_H
-#define _SSI_PAL_MUTEX_PLAT_H
-
-#include <stdint.h>
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-/**
-* @brief File Description:
-* This file contains functions for resource management (semaphor operations).
-* The functions implementations are generally just wrappers to different operating system calls.
-* None of the described functions will check the input parameters so the behavior
-* of the APIs in illegal parameters case is dependent on the operating system behavior.
-*
-*/
-
-typedef uint32_t SaSi_PalMutex;
-
-
-
-/*----------------------------
- PUBLIC FUNCTIONS
------------------------------------*/
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_perf.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_perf.h
deleted file mode 100644
index 8bad274..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_perf.h
+++ /dev/null
@@ -1,143 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef _SSI_PAL_PERF_H_
-#define _SSI_PAL_PERF_H_
-
-#ifdef LIB_PERF
-#include "ssi_pal_perf_plat.h"
-#endif
-
-typedef enum {
- PERF_TEST_TYPE_CRYS_AES_INTGR = 0x1,
- PERF_TEST_TYPE_CRYS_AES_INIT = 0x2,
- PERF_TEST_TYPE_CRYS_AES_BLOCK = 0x3,
- PERF_TEST_TYPE_CRYS_AES_FIN = 0x4,
- PERF_TEST_TYPE_HW_CMPLT = 0x5,
- PERF_TEST_TYPE_PAL_MAP = 0x6,
- PERF_TEST_TYPE_PAL_UNMAP = 0x7,
- PERF_TEST_TYPE_MLLI_BUILD = 0x8,
- PERF_TEST_TYPE_SYM_DRV_INIT = 0x9,
- PERF_TEST_TYPE_SYM_DRV_PROC = 0xA,
- PERF_TEST_TYPE_SYM_DRV_FIN = 0xB,
- PERF_TEST_TYPE_CRYS_HASH_INIT = 0xC,
- PERF_TEST_TYPE_CRYS_HASH_UPDATE=0xD,
- PERF_TEST_TYPE_CRYS_HASH_FIN = 0xE,
- PERF_TEST_TYPE_CRYS_HMAC_INIT = 0xF,
- PERF_TEST_TYPE_CRYS_HMAC_UPDATE=0x10,
- PERF_TEST_TYPE_CRYS_HMAC_FIN = 0x11,
- PERF_TEST_TYPE_CMPLT_SLEEP = 0x12,
- PERF_TEST_TYPE_CRYS_AES_SET_KEY = 0x13,
- PERF_TEST_TYPE_PKA_ModExp = 0x30,
- PERF_TEST_TYPE_TEST_BASE = 0x100,
- PERF_TEST_TYPE_MAX,
- PERF_TEST_TYPE_RESERVE32 = 0x7FFFFFFF
-}SaSiPalPerfType_t;
-
-
-#ifdef LIB_PERF
-#define SASI_PAL_PERF_INIT SaSi_PalPerfInit
-#define SASI_PAL_PERF_OPEN_NEW_ENTRY(num, type) \
- num = SaSi_PalPerfOpenNewEntry(type)
-
-#define SASI_PAL_PERF_CLOSE_ENTRY(num, type) \
- SaSi_PalPerfCloseEntry(num, type)
-#define SASI_PAL_PERF_DUMP SaSi_PalPerfDump
-#define SASI_PAL_PERF_FIN SaSi_PalPerfFin
-
-/**
- * @brief initialize performance test mechanism
- *
- * @param[in]
- * *
- * @return None
- */
-void SaSi_PalPerfInit(void);
-
-
-/**
- * @brief opens new entry in perf buffer to record new entry
- *
- * @param[in] entryType - entry type (defined in ssi_pal_perf.h) to be recorded in buffer
- *
- * @return A non-zero value in case of failure.
- */
-SaSi_PalPerfData_t SaSi_PalPerfOpenNewEntry(SaSiPalPerfType_t entryType);
-
-
-/**
- * @brief closes entry in perf buffer previously opened by SaSi_PalPerfOpenNewEntry
- *
- * @param[in] idx - index of the entry to be closed, the return value of SaSi_PalPerfOpenNewEntry
- * @param[in] entryType - entry type (defined in ssi_pal_perf.h) to be recorded in buffer
- *
- * @return A non-zero value in case of failure.
- */
-void SaSi_PalPerfCloseEntry(SaSi_PalPerfData_t idx, SaSiPalPerfType_t entryType);
-
-
-/**
- * @brief dumps the performance buffer
- *
- * @param[in] None
- *
- * @return None
- */
-void SaSi_PalPerfDump(void);
-
-
-/**
- * @brief terminates resources used for performance tests
- *
- * @param[in]
- * *
- * @return None
- */
-void SaSi_PalPerfFin(void);
-
-#else //LIB_PERF
-#define SASI_PAL_PERF_INIT()
-#define SASI_PAL_PERF_OPEN_NEW_ENTRY(num, type) (num=num)
-#define SASI_PAL_PERF_CLOSE_ENTRY(num, type)
-#define SASI_PAL_PERF_DUMP()
-#define SASI_PAL_PERF_FIN()
-
-
-typedef uint32_t SaSi_PalPerfData_t;
-
-#endif //LIB_PERF
-
-
-#endif /*_SSI_PAL_PERF_H__*/
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_perf_plat.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_perf_plat.h
deleted file mode 100644
index 04972de..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_perf_plat.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef _SSI_PAL_PERF_PLAT_H__
-#define _SSI_PAL_PERF_PLAT_H__
-
-
-
-
-typedef unsigned int SaSi_PalPerfData_t;
-
-/**
- * @brief DSM environment bug - sometimes very long write operation.
- * to overcome this bug we added while to make sure write opeartion is completed
- *
- * @param[in]
- * *
- * @return None
- */
-void SaSi_PalDsmWorkarround(void);
-
-
-#endif /*_SSI_PAL_PERF_PLAT_H__*/
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_sem.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_sem.h
deleted file mode 100644
index c371143..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_sem.h
+++ /dev/null
@@ -1,123 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-
-#ifndef _SSI_PAL_SEM_H
-#define _SSI_PAL_SEM_H
-
-#include "ssi_pal_sem_plat.h"
-
-#define SASI_PAL_SEM_NO_WAIT 0
-#define SASI_PAL_SEM_FREE 1
-#define SASI_PAL_SEM_LOCKED 0
-
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/**
-* @brief File Description:
-* This file contains functions for resource management (semaphor operations).
-* The functions implementations are generally just wrappers to different operating system calls.
-* None of the described functions will check the input parameters so the behavior
-* of the APIs in illegal parameters case is dependent on the operating system behavior.
-*
-*/
-
-
-
-
-/*----------------------------
- PUBLIC FUNCTIONS
------------------------------------*/
-
-/**
- * @brief This function purpose is to create a semaphore.
- *
- *
- * @param[out] aSemId - Pointer to created semaphor handle
- * @param[in] aInitialVal - Initial semaphore value
- *
- * @return The return values is according to operating system return values.
- */
-//SaSiError_t SaSi_PalSemCreate( DX_PAL_SEM *aSemId, uint32_t aInitialVal );
-#define SaSi_PalSemCreate _SaSi_PalSemCreate
-/**
- * @brief This function purpose is to delete a semaphore
- *
- *
- * @param[in] aSemId - Semaphore handle
- *
- * @return The return values is according to operating system return values.
- */
-//SaSiError_t SaSi_PalSemDelete( DX_PAL_SEM *aSemId );
-#define SaSi_PalSemDelete _SaSi_PalSemDelete
-/**
- * @brief This function purpose is to Wait for semaphore with aTimeOut. aTimeOut is
- * specified in milliseconds.
- *
- *
- * @param[in] aSemId - Semaphore handle
- * @param[in] aTimeOut - timeout in mSec, or SASI_INFINITE
- *
- * @return The return values is according to operating system return values.
- */
-//SaSiError_t SaSi_PalSemWait(DX_PAL_SEM aSemId, uint32_t aTimeOut);
-#define SaSi_PalSemWait _SaSi_PalSemWait
-/**
- * @brief This function purpose is to signal the semaphore.
- *
- *
- * @param[in] aSemId - Semaphore handle
- *
- * @return The return values is according to operating system return values.
- */
-//SaSiError_t SaSi_PalSemGive(DX_PAL_SEM aSemId);
-
-#define SaSi_PalSemGive _SaSi_PalSemGive
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_sem_plat.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_sem_plat.h
deleted file mode 100644
index 8e65ce2..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_sem_plat.h
+++ /dev/null
@@ -1,120 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-
-#ifndef _SSI_PAL_SEM_INT__H
-#define _SSI_PAL_SEM_INT__H
-
-
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-#include "ssi_pal_types.h"
-/**
-* @brief File Description:
-* This file contains functions for resource management (semaphor operations).
-* The functions implementations are generally just wrappers to different operating system calls.
-* None of the described functions will check the input parameters so the behavior
-* of the APIs in illegal parameters case is dependent on the operating system behavior.
-*
-*/
-
-typedef int DX_PAL_SEM;
-
-
-
-/*----------------------------
- PUBLIC FUNCTIONS
------------------------------------*/
-
-/**
- * @brief This function purpose is to create a semaphore.
- *
- *
- * @param[out] aSemId - Pointer to created semaphor handle
- * @param[in] aInitialVal - Initial semaphore value
- *
- * @return The return values is according to operating system return values.
- */
-SaSiError_t _SaSi_PalSemCreate( DX_PAL_SEM *aSemId, uint32_t aInitialVal );
-
-#define _SaSi_PalSemCreate(aSemId,aInitialVal) SASI_SUCCESS
-/**
- * @brief This function purpose is to delete a semaphore
- *
- *
- * @param[in] aSemId - Semaphore handle
- *
- * @return The return values is according to operating system return values.
- */
-SaSiError_t _SaSi_PalSemDelete( DX_PAL_SEM *aSemId );
-
-#define _SaSi_PalSemDelete( aSemId ) SASI_SUCCESS
-/**
- * @brief This function purpose is to Wait for semaphore with aTimeOut. aTimeOut is
- * specified in milliseconds.
- *
- *
- * @param[in] aSemId - Semaphore handle
- * @param[in] aTimeOut - timeout in mSec, or SASI_INFINITE
- *
- * @return The return values is according to operating system return values.
- */
-SaSiError_t _SaSi_PalSemWait(DX_PAL_SEM aSemId, uint32_t aTimeOut);
-
-#define _SaSi_PalSemWait(aSemId, aTimeOut) SASI_SUCCESS
-/**
- * @brief This function purpose is to signal the semaphore.
- *
- *
- * @param[in] aSemId - Semaphore handle
- *
- * @return The return values is according to operating system return values.
- */
-SaSiError_t _SaSi_PalSemGive(DX_PAL_SEM aSemId);
-
-#define _SaSi_PalSemGive(aSemId) SASI_SUCCESS
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_trng.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_trng.h
deleted file mode 100644
index 029bb0a..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_trng.h
+++ /dev/null
@@ -1,66 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-#ifndef _SSI_PAL_TRNG_H
-#define _SSI_PAL_TRNG_H
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*----------------------------
- PUBLIC FUNCTIONS
------------------------------------*/
-
-/**
- * @brief This function purpose is to get TRNG characterization parameters.
- *
- *
- * @return Zero on success.
- * @return A non-zero value on failure.
- */
-SaSiError_t SaSi_PalTrngParameterGet(uint32_t *SubSamplingRatio /*!< [out] TRNG characterization parameters, array size = 4. */);
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_types.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_types.h
deleted file mode 100644
index ed9c333..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_types.h
+++ /dev/null
@@ -1,115 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-/*!
-@file
-@brief This file contains the platform dependent definitions and types.
-@defgroup ssi_pal_types CryptoCell PAL platform dependant types
-@{
-@ingroup ssi_pal
-*/
-
-#ifndef SSI_PAL_TYPES_H
-#define SSI_PAL_TYPES_H
-
-#include "ssi_pal_types_plat.h"
-
-/*! Boolean definition.*/
-typedef enum {
- /*! Boolean false definition.*/
- SASI_FALSE = 0,
- /*! Boolean true definition.*/
- SASI_TRUE = 1
-} SaSiBool;
-
-/*! Success definition. */
-#define SASI_SUCCESS 0UL
-/*! Failure definition. */
-#define SASI_FAIL 1UL
-
-/*! Defintion of 1KB in bytes. */
-#define SASI_1K_SIZE_IN_BYTES 1024
-/*! Defintion of number of bits in a byte. */
-#define SASI_BITS_IN_BYTE 8
-/*! Defintion of number of bits in a 32bits word. */
-#define SASI_BITS_IN_32BIT_WORD 32
-/*! Defintion of number of bytes in a 32bits word. */
-#define SASI_32BIT_WORD_SIZE (sizeof(uint32_t))
-
-/*! Success (OK) defintion. */
-#define SASI_OK SASI_SUCCESS
-
-/*! Macro that handles unused parameters in the code (to avoid compilation warnings). */
-#define SASI_UNUSED_PARAM(prm) ((void)prm)
-
-/*! Maximal uint32 value.*/
-#define SASI_MAX_UINT32_VAL (0xFFFFFFFF)
-
-
-/* Minimum and Maximum macros */
-#ifdef min
-/*! Definition for minimum. */
-#define CRYS_MIN(a,b) min( a , b )
-#else
-/*! Definition for minimum. */
-#define CRYS_MIN( a , b ) ( ( (a) < (b) ) ? (a) : (b) )
-#endif
-
-#ifdef max
-/*! Definition for maximum. */
-#define CRYS_MAX(a,b) max( a , b )
-#else
-/*! Definition for maximum. */
-#define CRYS_MAX( a , b ) ( ( (a) > (b) ) ? (a) : (b) )
-#endif
-
-/*! Macro that calculates number of full bytes from bits (i.e. 7 bits are 1 byte). */
-#define CALC_FULL_BYTES(numBits) (((numBits) + (SASI_BITS_IN_BYTE -1))/SASI_BITS_IN_BYTE)
-/*! Macro that calculates number of full 32bits words from bits (i.e. 31 bits are 1 word). */
-#define CALC_FULL_32BIT_WORDS(numBits) (((numBits) + (SASI_BITS_IN_32BIT_WORD -1))/SASI_BITS_IN_32BIT_WORD)
-/*! Macro that calculates number of full 32bits words from bytes (i.e. 3 bytes are 1 word). */
-#define CALC_32BIT_WORDS_FROM_BYTES(sizeBytes) (((sizeBytes) + SASI_32BIT_WORD_SIZE - 1) / SASI_32BIT_WORD_SIZE)
-/*! Macro that round up bits to 32bits words. */
-#define ROUNDUP_BITS_TO_32BIT_WORD(numBits) (CALC_FULL_32BIT_WORDS(numBits)*SASI_BITS_IN_32BIT_WORD)
-/*! Macro that round up bits to bytes. */
-#define ROUNDUP_BITS_TO_BYTES(numBits) (CALC_FULL_BYTES(numBits)*SASI_BITS_IN_BYTE)
-/*! Macro that round up bytes to 32bits words. */
-#define ROUNDUP_BYTES_TO_32BIT_WORD(numBytes) (SASI_32BIT_WORD_SIZE*(((numBytes)+SASI_32BIT_WORD_SIZE-1)/SASI_32BIT_WORD_SIZE))
-
-
-/**
-@}
- */
-#endif
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_types_plat.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_types_plat.h
deleted file mode 100644
index 50e7e40..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pal_types_plat.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-/*! @file
-@brief This file contains basic type definitions that are platform dependent.
-*/
-#ifndef SSI_PAL_TYPES_PLAT_H
-#define SSI_PAL_TYPES_PLAT_H
-/* Host specific types for standard (ISO-C99) compilant platforms */
-
-#include <stdint.h>
-#include <stddef.h>
-#include <stdbool.h>
-
-typedef uintptr_t SaSiVirtAddr_t;
-typedef uint32_t SaSiBool_t;
-typedef uint32_t SaSiStatus;
-
-#define SaSiError_t SaSiStatus
-#define SASI_INFINITE 0xFFFFFFFF
-
-#define CEXPORT_C
-#define CIMPORT_C
-
-#endif /*SSI_PAL_TYPES_PLAT_H*/
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pka_hw_plat_defs.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pka_hw_plat_defs.h
deleted file mode 100644
index 1ea406c..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_pka_hw_plat_defs.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-#ifndef PKA_HW_PLAT_DEFS_H
-#define PKA_HW_PLAT_DEFS_H
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*!
-@file
-@brief Contains the enums and definitions that are used in the PKA code (definitions that are platform dependent).
-@defgroup ssi_pka_hw_plat_defs CryptoCell PKA specific types and definitions
-@{
-@ingroup cryptocell_pka
-
-*/
-
-/*! Size of PKA engine word.*/
-#define SASI_PKA_WORD_SIZE_IN_BITS 64
-/*! Maximal supported modulus size in bits. */
-#define CRYS_SRP_MAX_MODULUS_SIZE_IN_BITS 3072
-/*! Maximal supported modulus size in RSA in bits. */
-#define CRYS_RSA_MAX_VALID_KEY_SIZE_VALUE_IN_BITS 2048
-/*! Maximal supported key generation size in RSA in bits. */
-#define CRYS_RSA_MAX_KEY_GENERATION_HW_SIZE_BITS 2048
-
-/*! PKA operations maximal count of extra bits. */
-#define PKA_EXTRA_BITS 8
-/*! PKA operations number of memory registers. */
-#define PKA_MAX_COUNT_OF_PHYS_MEM_REGS 32
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif //PKA_HW_PLAT_DEFS_H
-
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_regs.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_regs.h
deleted file mode 100644
index 82290ba..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_regs.h
+++ /dev/null
@@ -1,166 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-
-/*!
- * @file
- * @brief Macro definitions for accessing ARM TrustZone CryptoCell register space.
- */
-
-#ifndef _SSI_REGS_H_
-#define _SSI_REGS_H_
-
-#include "ssi_bitops.h"
-
-/* Register Offset macro */
-#define SASI_REG_OFFSET(unit_name, reg_name) \
- (DX_BASE_ ## unit_name + DX_ ## reg_name ## _REG_OFFSET)
-
-#define SASI_REG_BIT_SHIFT(reg_name, field_name) \
- (DX_ ## reg_name ## _ ## field_name ## _BIT_SHIFT)
-
-/* Register Offset macros (from registers base address in host) */
-#if defined(DX_CC_REE) || defined(DX_CC_TEE) || defined(DX_CONFIG_IOT_SUPPORTED)
-
-#include "dx_reg_base_host.h"
-
-/* Indexed GPR offset macros - note the (not original) preprocessor tricks...*/
-/* (Using the macro without the "_" prefix is allowed with another macro *
- * as the gpr_idx) */
-#define _SEP_HOST_GPR_REG_OFFSET(gpr_idx) \
- SASI_REG_OFFSET(HOST_RGF, HOST_SEP_HOST_GPR ## gpr_idx)
-#define SEP_HOST_GPR_REG_OFFSET(gpr_idx) _SEP_HOST_GPR_REG_OFFSET(gpr_idx)
-#define _HOST_SEP_GPR_REG_OFFSET(gpr_idx) \
- SASI_REG_OFFSET(HOST_RGF, HOST_HOST_SEP_GPR ## gpr_idx)
-#define HOST_SEP_GPR_REG_OFFSET(gpr_idx) _HOST_SEP_GPR_REG_OFFSET(gpr_idx)
-
-/* GPR IRQ bit shift/mask by GPR index */
-#define _SEP_HOST_GPR_IRQ_SHIFT(gpr_idx) \
- DX_HOST_IRR_SEP_HOST_GPR ## gpr_idx ## _INT_BIT_SHIFT
-#define SEP_HOST_GPR_IRQ_SHIFT(gpr_idx) \
- _SEP_HOST_GPR_IRQ_SHIFT(gpr_idx)
-#define SEP_HOST_GPR_IRQ_MASK(gpr_idx) \
- (1 << SEP_HOST_GPR_IRQ_CAUSE_SHIFT(gpr_idx))
-
-/* Read-Modify-Write a field of a register */
-#define MODIFY_REGISTER_FLD(unitName, regName, fldName, fldVal) \
-do { \
- uint32_t regVal; \
- regVal = READ_REGISTER(SASI_REG_ADDR(unitName, regName)); \
- SASI_REG_FLD_SET(unitName, regName, fldName, regVal, fldVal); \
- WRITE_REGISTER(SASI_REG_ADDR(unitName, regName), regVal); \
-} while (0)
-
-#elif defined(DX_CC_SEP)
-
-#include "dx_reg_base_sep.h"
-
-/* We only provide this macro for SEP code because other platforms require usage
- of (mapping base + offset), i.e., use of SASI_REG_OFFSET */
-/* PLEASE AVOID USING THIS MACRO FOR NEW SEP CODE. USE THE OFFSET MACROS. */
-#define SASI_REG_ADDR(unit_name, reg_name) \
- (DX_BASE_CC_PERIF + DX_BASE_ ## unit_name + \
- DX_ ## reg_name ## _REG_OFFSET)
-
-/* Indexed GPR address macros - note the (not original) preprocessor tricks...*/
-/* (Using the macro without the "_" prefix is allowed with another macro *
- * as the gpr_idx) */
-#define _SEP_HOST_GPR_REG_ADDR(gpr_idx) \
- SASI_REG_ADDR(SEP_RGF, SEP_SEP_HOST_GPR ## gpr_idx)
-#define SEP_HOST_GPR_REG_ADDR(gpr_idx) _SEP_HOST_GPR_REG_ADDR(gpr_idx)
-#define _HOST_SEP_GPR_REG_ADDR(gpr_idx) \
- SASI_REG_ADDR(SEP_RGF, SEP_HOST_SEP_GPR ## gpr_idx)
-#define HOST_SEP_GPR_REG_ADDR(gpr_idx) _HOST_SEP_GPR_REG_ADDR(gpr_idx)
-
-#else
-#error Execution domain is not DX_CC_SEP/DX_CC_REE/DX_CC_TEE/DX_CONFIG_IOT_SUPPORTED
-#endif
-
-/* Registers address macros for ENV registers (development FPGA only) */
-#ifdef DX_BASE_ENV_REGS
-
-#ifndef DX_CC_SEP /* Irrelevant for SeP code */
-/* This offset should be added to mapping address of DX_BASE_ENV_REGS */
-#define SASI_ENV_REG_OFFSET(reg_name) (DX_ENV_ ## reg_name ## _REG_OFFSET)
-#endif
-
-#endif /*DX_BASE_ENV_REGS*/
-
-/* Bit fields access */
-#define SASI_REG_FLD_GET(unit_name, reg_name, fld_name, reg_val) \
- (DX_ ## reg_name ## _ ## fld_name ## _BIT_SIZE == 0x20 ? \
- reg_val /*!< \internal Optimization for 32b fields */ : \
- BITFIELD_GET(reg_val, DX_ ## reg_name ## _ ## fld_name ## _BIT_SHIFT, \
- DX_ ## reg_name ## _ ## fld_name ## _BIT_SIZE))
-
-/* Bit fields access */
-#define SASI2_REG_FLD_GET(unit_name, reg_name, fld_name, reg_val) \
- (SASI_ ## reg_name ## _ ## fld_name ## _BIT_SIZE == 0x20 ? \
- reg_val /*!< \internal Optimization for 32b fields */ : \
- BITFIELD_GET(reg_val, SASI_ ## reg_name ## _ ## fld_name ## _BIT_SHIFT, \
- SASI_ ## reg_name ## _ ## fld_name ## _BIT_SIZE))
-
-#define SASI_REG_FLD_SET( \
- unit_name, reg_name, fld_name, reg_shadow_var, new_fld_val) \
-do { \
- if (DX_ ## reg_name ## _ ## fld_name ## _BIT_SIZE == 0x20) \
- reg_shadow_var = new_fld_val; /*!< \internal Optimization for 32b fields */\
- else \
- BITFIELD_SET(reg_shadow_var, \
- DX_ ## reg_name ## _ ## fld_name ## _BIT_SHIFT, \
- DX_ ## reg_name ## _ ## fld_name ## _BIT_SIZE, \
- new_fld_val); \
-} while (0)
-
-#define SASI2_REG_FLD_SET( \
- unit_name, reg_name, fld_name, reg_shadow_var, new_fld_val) \
-do { \
- if (SASI_ ## reg_name ## _ ## fld_name ## _BIT_SIZE == 0x20) \
- reg_shadow_var = new_fld_val; /*!< \internal Optimization for 32b fields */\
- else \
- BITFIELD_SET(reg_shadow_var, \
- SASI_ ## reg_name ## _ ## fld_name ## _BIT_SHIFT, \
- SASI_ ## reg_name ## _ ## fld_name ## _BIT_SIZE, \
- new_fld_val); \
-} while (0)
-
-/* Usage example:
- uint32_t reg_shadow = READ_REGISTER(SASI_REG_ADDR(CRY_KERNEL,AES_CONTROL));
- SASI_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY0,reg_shadow, 3);
- SASI_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY1,reg_shadow, 1);
- WRITE_REGISTER(SASI_REG_ADDR(CRY_KERNEL,AES_CONTROL), reg_shadow);
- */
-
-#endif /*_SSI_REGS_H_*/
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_sram_map.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_sram_map.h
deleted file mode 100644
index b409598..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_sram_map.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef _SSI_SRAM_MAP_H_
-#define _SSI_SRAM_MAP_H_
-
-/*!
-@file
-@brief This file contains internal SRAM mapping definitions.
-@defgroup ssi_sram_map CryptoCell SRAM mapping APIs
-@{
-@ingroup cryptocell_api
-
-*/
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*! PKA base address in the PKA SRAM. */
-#define SASI_SRAM_PKA_BASE_ADDRESS 0x0
-/*! PKA SRAM size in KB. */
-#define SASI_PKA_SRAM_SIZE_IN_KBYTES 4
-
-/*! RND SRAM address. */
-#define SASI_SRAM_RND_HW_DMA_ADDRESS 0x0
-/*! Addresses 0K-2KB in SRAM reserved for RND operations. */
-#define SASI_SRAM_RND_MAX_SIZE 0x800
-/*! SRAM maximal size. */
-#define SASI_SRAM_MAX_SIZE 0x1000
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif /*_SSI_SRAM_MAP_H_*/
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_util_defs.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_util_defs.h
deleted file mode 100644
index f6e7746..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_util_defs.h
+++ /dev/null
@@ -1,93 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef _SSI_UTIL_DEFS_H
-#define _SSI_UTIL_DEFS_H
-
-/*!
-@defgroup ssi_utils CryptoCell utility APIs
-@{
-@ingroup cryptocell_api
-@brief This group is the utility apis group
-@}
-
-@file
-@brief This file contains CryptoCell Util general definitions.
-@defgroup ssi_utils_defs CryptoCell utils general definitions
-@{
-@ingroup ssi_utils
-
-*/
-
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-#include "ssi_pal_types_plat.h"
-#include "ssi_util_key_derivation_defs.h"
-
-
-/******************************************************************************
-* DEFINITIONS
-******************************************************************************/
-/*! Supported AES key size in bits. */
-#define SASI_UTIL_AES_128BIT_SIZE 16 // same as SEP_AES_128_BIT_KEY_SIZE
-/*****************************************/
-/* CMAC derive key definitions*/
-/*****************************************/
-/*! Minimal data size for CMAC derivation operation. */
-#define SASI_UTIL_CMAC_DERV_MIN_DATA_IN_SIZE SASI_UTIL_FIX_DATA_MIN_SIZE_IN_BYTES+2
-/*! Maximal data size for CMAC derivation operation. */
-#define SASI_UTIL_CMAC_DERV_MAX_DATA_IN_SIZE SASI_UTIL_MAX_KDF_SIZE_IN_BYTES
-/*! AES CMAC result size in bytes. */
-#define SASI_UTIL_AES_CMAC_RESULT_SIZE_IN_BYTES 0x10UL
-/*! AES CMAC result size in words. */
-#define SASI_UTIL_AES_CMAC_RESULT_SIZE_IN_WORDS (SASI_UTIL_AES_CMAC_RESULT_SIZE_IN_BYTES/4)
-
-/*! Util Error type. */
-typedef uint32_t SaSiUtilError_t;
-/*! Defines the CMAC result buffer. */
-typedef uint8_t SaSiUtilAesCmacResult_t[SASI_UTIL_AES_CMAC_RESULT_SIZE_IN_BYTES];
-
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif /*_SSI_UTIL_DEFS_H*/
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_util_error.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_util_error.h
deleted file mode 100644
index e932a52..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_util_error.h
+++ /dev/null
@@ -1,97 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef _SSI_UTIL_ERROR_H
-#define _SSI_UTIL_ERROR_H
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*!
-@file
-@brief This module contains the definitions of the UTIL module errors.
-@defgroup ssi_utils_errors CryptoCell utils error definitions
-@{
-@ingroup ssi_utils
-
-*/
-
-/***********************/
-/* Util return codes */
-/***********************/
-
-/*! Success definition. */
-#define SASI_UTIL_OK 0x00UL
-/*! Error base number definition. */
-#define SASI_UTIL_MODULE_ERROR_BASE 0x80000000
-
-/*! Illegal key type. */
-#define SASI_UTIL_INVALID_KEY_TYPE (SASI_UTIL_MODULE_ERROR_BASE + 0x00UL)
-/*! Illegal data in pointer. */
-#define SASI_UTIL_DATA_IN_POINTER_INVALID_ERROR (SASI_UTIL_MODULE_ERROR_BASE + 0x01UL)
-/*! Illegal data in size. */
-#define SASI_UTIL_DATA_IN_SIZE_INVALID_ERROR (SASI_UTIL_MODULE_ERROR_BASE + 0x02UL)
-/*! Illegal data out pointer. */
-#define SASI_UTIL_DATA_OUT_POINTER_INVALID_ERROR (SASI_UTIL_MODULE_ERROR_BASE + 0x03UL)
-/*! Illegal data out size. */
-#define SASI_UTIL_DATA_OUT_SIZE_INVALID_ERROR (SASI_UTIL_MODULE_ERROR_BASE + 0x04UL)
-/*! Fatal error. */
-#define SASI_UTIL_FATAL_ERROR (SASI_UTIL_MODULE_ERROR_BASE + 0x05UL)
-/*! Illegal parameters. */
-#define SASI_UTIL_ILLEGAL_PARAMS_ERROR (SASI_UTIL_MODULE_ERROR_BASE + 0x06UL)
-/*! Invalid address given. */
-#define SASI_UTIL_BAD_ADDR_ERROR (SASI_UTIL_MODULE_ERROR_BASE + 0x07UL)
-/*! Illegal domain for endorsement key. */
-#define SASI_UTIL_EK_DOMAIN_INVALID_ERROR (SASI_UTIL_MODULE_ERROR_BASE + 0x08UL)
-/*! Kdr is not valid. */
-#define SASI_UTIL_KDR_INVALID_ERROR (SASI_UTIL_MODULE_ERROR_BASE + 0x09UL)
-/*! LCS is not valid. */
-#define SASI_UTIL_LCS_INVALID_ERROR (SASI_UTIL_MODULE_ERROR_BASE + 0x0AUL)
-/*! session key is not valid. */
-#define SASI_UTIL_SESSION_KEY_ERROR (SASI_UTIL_MODULE_ERROR_BASE + 0x0BUL)
-/*! Illegal user key size. */
-#define SASI_UTIL_INVALID_USER_KEY_SIZE (SASI_UTIL_MODULE_ERROR_BASE + 0x0DUL)
-/*! Illegal LCS for the required operation. */
-#define SASI_UTIL_ILLEGAL_LCS_FOR_OPERATION_ERR (SASI_UTIL_MODULE_ERROR_BASE + 0x0EUL)
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif /*_SSI_UTIL_ERROR_H*/
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_util_key_derivation.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_util_key_derivation.h
deleted file mode 100644
index ac39184..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_util_key_derivation.h
+++ /dev/null
@@ -1,107 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef _SSI_UTIL_KEY_DERIVATION_H
-#define _SSI_UTIL_KEY_DERIVATION_H
-
-/*!
-@file
-@brief This module defines the API that supports Key derivation function as specified
- in [SP800-108] in section "KDF in Counter Mode".
-@defgroup ssi_utils_key_derivation CryptoCell utility key derivation APIs
-@{
-@ingroup ssi_utils
-
-*/
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-#include "ssi_util_defs.h"
-#include "ssi_util_key_derivation_defs.h"
-#include "ssi_aes.h"
-
-/******************************************************************************
-* DEFINITIONS
-******************************************************************************/
-
-/*! Input key derivation type. */
-typedef enum {
- /*! User's key.*/
- SASI_UTIL_USER_KEY = 0,
- /*! Root key (Kdr).*/
- SASI_UTIL_ROOT_KEY = 1,
- /*! Reserved.*/
- SASI_UTIL_END_OF_KEY_TYPE = 0x7FFFFFFF
-}SaSiUtilKeyType_t;
-
-
-/*!
-@brief The key derivation function is as specified in [SP800-108] in section "KDF in Counter Mode".
- The derivation is based on length l, label L, context C and derivation key Ki.
- AES-CMAC is used as the pseudorandom function (PRF).
-
-@return SASI_UTIL_OK on success.
-@return A non-zero value from ssi_util_error.h on failure.
-*/
-
-/* A key derivation functions can iterates n times until l bits of keying material are generated.
- For each of the iteration of the PRF, i=1 to n, do:
- result(0) = 0;
- K(i) = PRF (Ki, [i] || Label || 0x00 || Context || length);
- results(i) = result(i-1) || K(i);
-
- concisely, result(i) = K(i) || k(i-1) || .... || k(0)*/
-SaSiUtilError_t SaSi_UtilKeyDerivation(
- SaSiUtilKeyType_t keyType, /*!< [in] The key type that is used as an input to a key derivation function.
- Can be one of: SASI_UTIL_USER_KEY or SASI_UTIL_ROOT_KEY. */
- SaSiAesUserKeyData_t *pUserKey, /*!< [in] A pointer to the user's key buffer (in case of SASI_UTIL_USER_KEY). */
- const uint8_t *pLabel, /*!< [in] A string that identifies the purpose for the derived keying material.*/
- size_t labelSize, /*!< [in] The label size should be in range of 1 to 64 bytes length. */
- const uint8_t *pContextData, /*!< [in] A binary string containing the information related to the derived keying material. */
- size_t contextSize, /*!< [in] The context size should be in range of 1 to 64 bytes length. */
- uint8_t *pDerivedKey, /*!< [out] Keying material output (MUST be atleast the size of derivedKeySize). */
- size_t derivedKeySize /*!< [in] Size of the derived keying material in bytes (limited to 4080 bytes). */
- );
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif /*_SSI_UTIL_KEY_DERIVATION_H*/
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_util_key_derivation_defs.h b/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_util_key_derivation_defs.h
deleted file mode 100644
index 10a8869..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/include/ssi_util_key_derivation_defs.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/**************************************************************************************
-* Copyright (c) 2016-2017, ARM Limited or its affiliates. All rights reserved *
-* *
-* This file and the related binary are licensed under the following license: *
-* *
-* ARM Object Code and Header Files License, v1.0 Redistribution. *
-* *
-* Redistribution and use of object code, header files, and documentation, without *
-* modification, are permitted provided that the following conditions are met: *
-* *
-* 1) Redistributions must reproduce the above copyright notice and the *
-* following disclaimer in the documentation and/or other materials *
-* provided with the distribution. *
-* *
-* 2) Unless to the extent explicitly permitted by law, no reverse *
-* engineering, decompilation, or disassembly of is permitted. *
-* *
-* 3) Redistribution and use is permitted solely for the purpose of *
-* developing or executing applications that are targeted for use *
-* on an ARM-based product. *
-* *
-* DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT *
-* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, *
-* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE *
-* COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, *
-* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED *
-* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
-* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
-* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
-**************************************************************************************/
-
-
-#ifndef _SSI_UTIL_KEY_DERIVATION_DEFS_H
-#define _SSI_UTIL_KEY_DERIVATION_DEFS_H
-
-/*!
-@file
-@brief This file contains the definitions for the key derivation API.
-@defgroup ssi_utils_key_defs CryptoCell utils general key definitions
-@{
-@ingroup ssi_utils
-
-*/
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/******************************************************************************
-* DEFINITIONS
-******************************************************************************/
-
-/*! Maximal label length in bytes. */
-#define SASI_UTIL_MAX_LABEL_LENGTH_IN_BYTES 64
-/*! Maximal context length in bytes. */
-#define SASI_UTIL_MAX_CONTEXT_LENGTH_IN_BYTES 64
-
-/*! Minimal fixed data size in bytes. */
-#define SASI_UTIL_FIX_DATA_MIN_SIZE_IN_BYTES 3 /*!< \internal counter, 0x00, lengt(-0xff) */
-/*! Maximal fixed data size in bytes. */
-#define SASI_UTIL_FIX_DATA_MAX_SIZE_IN_BYTES 4 /*!< \internal counter, 0x00, lengt(0x100-0xff0) */
-
-/*! Maximal derived key material size in bytes. */
-#define SASI_UTIL_MAX_KDF_SIZE_IN_BYTES (SASI_UTIL_MAX_LABEL_LENGTH_IN_BYTES+ \
- SASI_UTIL_MAX_CONTEXT_LENGTH_IN_BYTES+SASI_UTIL_FIX_DATA_MAX_SIZE_IN_BYTES)
-
-/*! Maximal derived key size in bytes. */
-#define SASI_UTIL_MAX_DERIVED_KEY_SIZE_IN_BYTES 4080
-
-#ifdef __cplusplus
-}
-#endif
-/**
-@}
- */
-#endif /*_SSI_UTIL_KEY_DERIVATION_DEFS_H*/
-
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/lib/libnrf_cc310_0.9.10.a b/third_party/NordicSemiconductor/libraries/nrf_cc310/lib/libnrf_cc310_0.9.10.a
deleted file mode 100644
index 78969b0..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/lib/libnrf_cc310_0.9.10.a
+++ /dev/null
Binary files differ
diff --git a/third_party/NordicSemiconductor/libraries/nrf_cc310/lib/license.txt b/third_party/NordicSemiconductor/libraries/nrf_cc310/lib/license.txt
deleted file mode 100644
index d45aeb3..0000000
--- a/third_party/NordicSemiconductor/libraries/nrf_cc310/lib/license.txt
+++ /dev/null
@@ -1,28 +0,0 @@
-ARM Object Code and Header Files License
-Version 1.0
-
-Redistribution.
-
-Redistribution and use of object code, header files, and
-documentation, without modification, are permitted provided that the following
-conditions are met:
-1) Redistributions must reproduce the above copyright notice and the
- following disclaimer in the documentation and/or other materials
- provided with the distribution.
-2) Unless to the extent explicitly permitted by law, no reverse
- engineering, decompilation, or disassembly of is permitted.
-3) Redistribution and use is permitted solely for the purpose of
- developing or executing applications that are targeted for use
- on an ARM-based product.
-
- DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
- CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT
- NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT,
- AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
- PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
- LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
- NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
\ No newline at end of file
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/config/nrf-config.h b/third_party/NordicSemiconductor/libraries/nrf_security/config/nrf-config.h
new file mode 100644
index 0000000..a9c6ea4
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/config/nrf-config.h
@@ -0,0 +1,3203 @@
+/**
+ * \file config.h
+ *
+ * \brief Configuration options (set of defines)
+ *
+ * This set of compile-time options may be used to enable
+ * or disable features selectively, and reduce the global
+ * memory footprint.
+ */
+/*
+ * Copyright (C) 2006-2018, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+
+#ifndef MBEDTLS_CONFIG_H
+#define MBEDTLS_CONFIG_H
+
+#if defined(_MSC_VER) && !defined(_CRT_SECURE_NO_DEPRECATE)
+#define _CRT_SECURE_NO_DEPRECATE 1
+#endif
+
+/**
+ * \name SECTION: System support
+ *
+ * This section sets system specific settings.
+ * \{
+ */
+
+/**
+ * \def MBEDTLS_HAVE_ASM
+ *
+ * The compiler has support for asm().
+ *
+ * Requires support for asm() in compiler.
+ *
+ * Used in:
+ * library/aria.c
+ * library/timing.c
+ * include/mbedtls/bn_mul.h
+ *
+ * Required by:
+ * MBEDTLS_AESNI_C
+ * MBEDTLS_PADLOCK_C
+ *
+ * Comment to disable the use of assembly code.
+ */
+#define MBEDTLS_HAVE_ASM
+
+/**
+ * \def MBEDTLS_NO_UDBL_DIVISION
+ *
+ * The platform lacks support for double-width integer division (64-bit
+ * division on a 32-bit platform, 128-bit division on a 64-bit platform).
+ *
+ * Used in:
+ * include/mbedtls/bignum.h
+ * library/bignum.c
+ *
+ * The bignum code uses double-width division to speed up some operations.
+ * Double-width division is often implemented in software that needs to
+ * be linked with the program. The presence of a double-width integer
+ * type is usually detected automatically through preprocessor macros,
+ * but the automatic detection cannot know whether the code needs to
+ * and can be linked with an implementation of division for that type.
+ * By default division is assumed to be usable if the type is present.
+ * Uncomment this option to prevent the use of double-width division.
+ *
+ * Note that division for the native integer type is always required.
+ * Furthermore, a 64-bit type is always required even on a 32-bit
+ * platform, but it need not support multiplication or division. In some
+ * cases it is also desirable to disable some double-width operations. For
+ * example, if double-width division is implemented in software, disabling
+ * it can reduce code size in some embedded targets.
+ */
+//#define MBEDTLS_NO_UDBL_DIVISION
+
+/**
+ * \def MBEDTLS_NO_64BIT_MULTIPLICATION
+ *
+ * The platform lacks support for 32x32 -> 64-bit multiplication.
+ *
+ * Used in:
+ * library/poly1305.c
+ *
+ * Some parts of the library may use multiplication of two unsigned 32-bit
+ * operands with a 64-bit result in order to speed up computations. On some
+ * platforms, this is not available in hardware and has to be implemented in
+ * software, usually in a library provided by the toolchain.
+ *
+ * Sometimes it is not desirable to have to link to that library. This option
+ * removes the dependency of that library on platforms that lack a hardware
+ * 64-bit multiplier by embedding a software implementation in Mbed TLS.
+ *
+ * Note that depending on the compiler, this may decrease performance compared
+ * to using the library function provided by the toolchain.
+ */
+//#define MBEDTLS_NO_64BIT_MULTIPLICATION
+
+/**
+ * \def MBEDTLS_HAVE_SSE2
+ *
+ * CPU supports SSE2 instruction set.
+ *
+ * Uncomment if the CPU supports SSE2 (IA-32 specific).
+ */
+//#define MBEDTLS_HAVE_SSE2
+
+/**
+ * \def MBEDTLS_HAVE_TIME
+ *
+ * System has time.h and time().
+ * The time does not need to be correct, only time differences are used,
+ * by contrast with MBEDTLS_HAVE_TIME_DATE
+ *
+ * Defining MBEDTLS_HAVE_TIME allows you to specify MBEDTLS_PLATFORM_TIME_ALT,
+ * MBEDTLS_PLATFORM_TIME_MACRO, MBEDTLS_PLATFORM_TIME_TYPE_MACRO and
+ * MBEDTLS_PLATFORM_STD_TIME.
+ *
+ * Comment if your system does not support time functions
+ */
+//#define MBEDTLS_HAVE_TIME
+
+/**
+ * \def MBEDTLS_HAVE_TIME_DATE
+ *
+ * System has time.h, time(), and an implementation for
+ * mbedtls_platform_gmtime_r() (see below).
+ * The time needs to be correct (not necesarily very accurate, but at least
+ * the date should be correct). This is used to verify the validity period of
+ * X.509 certificates.
+ *
+ * Comment if your system does not have a correct clock.
+ *
+ * \note mbedtls_platform_gmtime_r() is an abstraction in platform_util.h that
+ * behaves similarly to the gmtime_r() function from the C standard. Refer to
+ * the documentation for mbedtls_platform_gmtime_r() for more information.
+ *
+ * \note It is possible to configure an implementation for
+ * mbedtls_platform_gmtime_r() at compile-time by using the macro
+ * MBEDTLS_PLATFORM_GMTIME_R_ALT.
+ */
+//#define MBEDTLS_HAVE_TIME_DATE
+
+/**
+ * \def MBEDTLS_PLATFORM_MEMORY
+ *
+ * Enable the memory allocation layer.
+ *
+ * By default mbed TLS uses the system-provided calloc() and free().
+ * This allows different allocators (self-implemented or provided) to be
+ * provided to the platform abstraction layer.
+ *
+ * Enabling MBEDTLS_PLATFORM_MEMORY without the
+ * MBEDTLS_PLATFORM_{FREE,CALLOC}_MACROs will provide
+ * "mbedtls_platform_set_calloc_free()" allowing you to set an alternative calloc() and
+ * free() function pointer at runtime.
+ *
+ * Enabling MBEDTLS_PLATFORM_MEMORY and specifying
+ * MBEDTLS_PLATFORM_{CALLOC,FREE}_MACROs will allow you to specify the
+ * alternate function at compile time.
+ *
+ * Requires: MBEDTLS_PLATFORM_C
+ *
+ * Enable this layer to allow use of alternative memory allocators.
+ */
+#define MBEDTLS_PLATFORM_MEMORY
+
+/**
+ * \def MBEDTLS_PLATFORM_NO_STD_FUNCTIONS
+ *
+ * Do not assign standard functions in the platform layer (e.g. calloc() to
+ * MBEDTLS_PLATFORM_STD_CALLOC and printf() to MBEDTLS_PLATFORM_STD_PRINTF)
+ *
+ * This makes sure there are no linking errors on platforms that do not support
+ * these functions. You will HAVE to provide alternatives, either at runtime
+ * via the platform_set_xxx() functions or at compile time by setting
+ * the MBEDTLS_PLATFORM_STD_XXX defines, or enabling a
+ * MBEDTLS_PLATFORM_XXX_MACRO.
+ *
+ * Requires: MBEDTLS_PLATFORM_C
+ *
+ * Uncomment to prevent default assignment of standard functions in the
+ * platform layer.
+ */
+#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS
+
+/**
+ * \def MBEDTLS_PLATFORM_EXIT_ALT
+ *
+ * MBEDTLS_PLATFORM_XXX_ALT: Uncomment a macro to let mbed TLS support the
+ * function in the platform abstraction layer.
+ *
+ * Example: In case you uncomment MBEDTLS_PLATFORM_PRINTF_ALT, mbed TLS will
+ * provide a function "mbedtls_platform_set_printf()" that allows you to set an
+ * alternative printf function pointer.
+ *
+ * All these define require MBEDTLS_PLATFORM_C to be defined!
+ *
+ * \note MBEDTLS_PLATFORM_SNPRINTF_ALT is required on Windows;
+ * it will be enabled automatically by check_config.h
+ *
+ * \warning MBEDTLS_PLATFORM_XXX_ALT cannot be defined at the same time as
+ * MBEDTLS_PLATFORM_XXX_MACRO!
+ *
+ * Requires: MBEDTLS_PLATFORM_TIME_ALT requires MBEDTLS_HAVE_TIME
+ *
+ * Uncomment a macro to enable alternate implementation of specific base
+ * platform function
+ */
+#define MBEDTLS_PLATFORM_EXIT_ALT
+//#define MBEDTLS_PLATFORM_TIME_ALT
+#define MBEDTLS_PLATFORM_FPRINTF_ALT
+#define MBEDTLS_PLATFORM_PRINTF_ALT
+#define MBEDTLS_PLATFORM_SNPRINTF_ALT
+//#define MBEDTLS_PLATFORM_NV_SEED_ALT
+#define MBEDTLS_PLATFORM_SETUP_TEARDOWN_ALT
+
+/**
+ * \def MBEDTLS_DEPRECATED_WARNING
+ *
+ * Mark deprecated functions so that they generate a warning if used.
+ * Functions deprecated in one version will usually be removed in the next
+ * version. You can enable this to help you prepare the transition to a new
+ * major version by making sure your code is not using these functions.
+ *
+ * This only works with GCC and Clang. With other compilers, you may want to
+ * use MBEDTLS_DEPRECATED_REMOVED
+ *
+ * Uncomment to get warnings on using deprecated functions.
+ */
+//#define MBEDTLS_DEPRECATED_WARNING
+
+/**
+ * \def MBEDTLS_DEPRECATED_REMOVED
+ *
+ * Remove deprecated functions so that they generate an error if used.
+ * Functions deprecated in one version will usually be removed in the next
+ * version. You can enable this to help you prepare the transition to a new
+ * major version by making sure your code is not using these functions.
+ *
+ * Uncomment to get errors on using deprecated functions.
+ */
+//#define MBEDTLS_DEPRECATED_REMOVED
+
+/* \} name SECTION: System support */
+
+/**
+ * \name SECTION: mbed TLS feature support
+ *
+ * This section sets support for features that are or are not needed
+ * within the modules that are enabled.
+ * \{
+ */
+
+/**
+ * \def MBEDTLS_TIMING_ALT
+ *
+ * Uncomment to provide your own alternate implementation for mbedtls_timing_hardclock(),
+ * mbedtls_timing_get_timer(), mbedtls_set_alarm(), mbedtls_set/get_delay()
+ *
+ * Only works if you have MBEDTLS_TIMING_C enabled.
+ *
+ * You will need to provide a header "timing_alt.h" and an implementation at
+ * compile time.
+ */
+//#define MBEDTLS_TIMING_ALT
+
+/**
+ * \def MBEDTLS_AES_ALT
+ *
+ * MBEDTLS__MODULE_NAME__ALT: Uncomment a macro to let mbed TLS use your
+ * alternate core implementation of a symmetric crypto, an arithmetic or hash
+ * module (e.g. platform specific assembly optimized implementations). Keep
+ * in mind that the function prototypes should remain the same.
+ *
+ * This replaces the whole module. If you only want to replace one of the
+ * functions, use one of the MBEDTLS__FUNCTION_NAME__ALT flags.
+ *
+ * Example: In case you uncomment MBEDTLS_AES_ALT, mbed TLS will no longer
+ * provide the "struct mbedtls_aes_context" definition and omit the base
+ * function declarations and implementations. "aes_alt.h" will be included from
+ * "aes.h" to include the new function definitions.
+ *
+ * Uncomment a macro to enable alternate implementation of the corresponding
+ * module.
+ *
+ * \warning MD2, MD4, MD5, ARC4, DES and SHA-1 are considered weak and their
+ * use constitutes a security risk. If possible, we recommend
+ * avoiding dependencies on them, and considering stronger message
+ * digests and ciphers instead.
+ *
+ */
+#define MBEDTLS_AES_ALT
+//#define MBEDTLS_ARC4_ALT
+//#define MBEDTLS_ARIA_ALT
+//#define MBEDTLS_BLOWFISH_ALT
+//#define MBEDTLS_CAMELLIA_ALT
+#define MBEDTLS_CCM_ALT
+/* #undef MBEDTLS_CHACHA20_ALT */
+/* #undef MBEDTLS_CHACHAPOLY_ALT */
+#define MBEDTLS_CMAC_ALT
+//#define MBEDTLS_DES_ALT
+#define MBEDTLS_DHM_ALT
+//#define MBEDTLS_ECJPAKE_ALT
+//#define MBEDTLS_GCM_ALT
+//#define MBEDTLS_NIST_KW_ALT
+//#define MBEDTLS_MD2_ALT
+//#define MBEDTLS_MD4_ALT
+//#define MBEDTLS_MD5_ALT
+/* #undef MBEDTLS_POLY1305_ALT */
+//#define MBEDTLS_RIPEMD160_ALT
+#define MBEDTLS_ECP_ALT
+/* #undef MBEDTLS_RSA_ALT */
+/* #undef MBEDTLS_SHA1_ALT */
+#define MBEDTLS_SHA256_ALT
+//#define MBEDTLS_SHA512_ALT
+//#define MBEDTLS_XTEA_ALT
+
+/*
+ * When replacing the elliptic curve module, please consider, that it is
+ * implemented with two .c files:
+ * - ecp.c
+ * - ecp_curves.c
+ * You can replace them very much like all the other MBEDTLS__MODULE_NAME__ALT
+ * macros as described above. The only difference is that you have to make sure
+ * that you provide functionality for both .c files.
+ */
+//#define MBEDTLS_ECP_ALT
+
+/**
+ * \def MBEDTLS_MD2_PROCESS_ALT
+ *
+ * MBEDTLS__FUNCTION_NAME__ALT: Uncomment a macro to let mbed TLS use you
+ * alternate core implementation of symmetric crypto or hash function. Keep in
+ * mind that function prototypes should remain the same.
+ *
+ * This replaces only one function. The header file from mbed TLS is still
+ * used, in contrast to the MBEDTLS__MODULE_NAME__ALT flags.
+ *
+ * Example: In case you uncomment MBEDTLS_SHA256_PROCESS_ALT, mbed TLS will
+ * no longer provide the mbedtls_sha1_process() function, but it will still provide
+ * the other function (using your mbedtls_sha1_process() function) and the definition
+ * of mbedtls_sha1_context, so your implementation of mbedtls_sha1_process must be compatible
+ * with this definition.
+ *
+ * \note Because of a signature change, the core AES encryption and decryption routines are
+ * currently named mbedtls_aes_internal_encrypt and mbedtls_aes_internal_decrypt,
+ * respectively. When setting up alternative implementations, these functions should
+ * be overriden, but the wrapper functions mbedtls_aes_decrypt and mbedtls_aes_encrypt
+ * must stay untouched.
+ *
+ * \note If you use the AES_xxx_ALT macros, then is is recommended to also set
+ * MBEDTLS_AES_ROM_TABLES in order to help the linker garbage-collect the AES
+ * tables.
+ *
+ * Uncomment a macro to enable alternate implementation of the corresponding
+ * function.
+ *
+ * \warning MD2, MD4, MD5, DES and SHA-1 are considered weak and their use
+ * constitutes a security risk. If possible, we recommend avoiding
+ * dependencies on them, and considering stronger message digests
+ * and ciphers instead.
+ *
+ */
+//#define MBEDTLS_MD2_PROCESS_ALT
+//#define MBEDTLS_MD4_PROCESS_ALT
+//#define MBEDTLS_MD5_PROCESS_ALT
+//#define MBEDTLS_RIPEMD160_PROCESS_ALT
+//#define MBEDTLS_SHA1_PROCESS_ALT
+//#define MBEDTLS_SHA256_PROCESS_ALT
+//#define MBEDTLS_SHA512_PROCESS_ALT
+//#define MBEDTLS_DES_SETKEY_ALT
+//#define MBEDTLS_DES_CRYPT_ECB_ALT
+//#define MBEDTLS_DES3_CRYPT_ECB_ALT
+//#define MBEDTLS_AES_SETKEY_ENC_ALT
+//#define MBEDTLS_AES_SETKEY_DEC_ALT
+//#define MBEDTLS_AES_ENCRYPT_ALT
+//#define MBEDTLS_AES_DECRYPT_ALT
+#define MBEDTLS_ECDH_GEN_PUBLIC_ALT
+#define MBEDTLS_ECDH_COMPUTE_SHARED_ALT
+#define MBEDTLS_ECDSA_VERIFY_ALT
+#define MBEDTLS_ECDSA_SIGN_ALT
+#define MBEDTLS_ECDSA_GENKEY_ALT
+
+/**
+ * \def MBEDTLS_ECP_INTERNAL_ALT
+ *
+ * Expose a part of the internal interface of the Elliptic Curve Point module.
+ *
+ * MBEDTLS_ECP__FUNCTION_NAME__ALT: Uncomment a macro to let mbed TLS use your
+ * alternative core implementation of elliptic curve arithmetic. Keep in mind
+ * that function prototypes should remain the same.
+ *
+ * This partially replaces one function. The header file from mbed TLS is still
+ * used, in contrast to the MBEDTLS_ECP_ALT flag. The original implementation
+ * is still present and it is used for group structures not supported by the
+ * alternative.
+ *
+ * Any of these options become available by defining MBEDTLS_ECP_INTERNAL_ALT
+ * and implementing the following functions:
+ * unsigned char mbedtls_internal_ecp_grp_capable(
+ * const mbedtls_ecp_group *grp )
+ * int mbedtls_internal_ecp_init( const mbedtls_ecp_group *grp )
+ * void mbedtls_internal_ecp_deinit( const mbedtls_ecp_group *grp )
+ * The mbedtls_internal_ecp_grp_capable function should return 1 if the
+ * replacement functions implement arithmetic for the given group and 0
+ * otherwise.
+ * The functions mbedtls_internal_ecp_init and mbedtls_internal_ecp_deinit are
+ * called before and after each point operation and provide an opportunity to
+ * implement optimized set up and tear down instructions.
+ *
+ * Example: In case you uncomment MBEDTLS_ECP_INTERNAL_ALT and
+ * MBEDTLS_ECP_DOUBLE_JAC_ALT, mbed TLS will still provide the ecp_double_jac
+ * function, but will use your mbedtls_internal_ecp_double_jac if the group is
+ * supported (your mbedtls_internal_ecp_grp_capable function returns 1 when
+ * receives it as an argument). If the group is not supported then the original
+ * implementation is used. The other functions and the definition of
+ * mbedtls_ecp_group and mbedtls_ecp_point will not change, so your
+ * implementation of mbedtls_internal_ecp_double_jac and
+ * mbedtls_internal_ecp_grp_capable must be compatible with this definition.
+ *
+ * Uncomment a macro to enable alternate implementation of the corresponding
+ * function.
+ */
+/* Required for all the functions in this section */
+//#define MBEDTLS_ECP_INTERNAL_ALT
+/* Support for Weierstrass curves with Jacobi representation */
+//#define MBEDTLS_ECP_RANDOMIZE_JAC_ALT
+//#define MBEDTLS_ECP_ADD_MIXED_ALT
+//#define MBEDTLS_ECP_DOUBLE_JAC_ALT
+//#define MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT
+//#define MBEDTLS_ECP_NORMALIZE_JAC_ALT
+/* Support for curves with Montgomery arithmetic */
+//#define MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT
+//#define MBEDTLS_ECP_RANDOMIZE_MXZ_ALT
+//#define MBEDTLS_ECP_NORMALIZE_MXZ_ALT
+
+/**
+ * \def MBEDTLS_TEST_NULL_ENTROPY
+ *
+ * Enables testing and use of mbed TLS without any configured entropy sources.
+ * This permits use of the library on platforms before an entropy source has
+ * been integrated (see for example the MBEDTLS_ENTROPY_HARDWARE_ALT or the
+ * MBEDTLS_ENTROPY_NV_SEED switches).
+ *
+ * WARNING! This switch MUST be disabled in production builds, and is suitable
+ * only for development.
+ * Enabling the switch negates any security provided by the library.
+ *
+ * Requires MBEDTLS_ENTROPY_C, MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
+ *
+ */
+//#define MBEDTLS_TEST_NULL_ENTROPY
+
+/**
+ * \def MBEDTLS_ENTROPY_HARDWARE_ALT
+ *
+ * Uncomment this macro to let mbed TLS use your own implementation of a
+ * hardware entropy collector.
+ *
+ * Your function must be called \c mbedtls_hardware_poll(), have the same
+ * prototype as declared in entropy_poll.h, and accept NULL as first argument.
+ *
+ * Uncomment to use your own hardware entropy collector.
+ */
+#define MBEDTLS_ENTROPY_HARDWARE_ALT
+
+/**
+ * \def MBEDTLS_AES_ROM_TABLES
+ *
+ * Use precomputed AES tables stored in ROM.
+ *
+ * Uncomment this macro to use precomputed AES tables stored in ROM.
+ * Comment this macro to generate AES tables in RAM at runtime.
+ *
+ * Tradeoff: Using precomputed ROM tables reduces RAM usage by ~8kb
+ * (or ~2kb if \c MBEDTLS_AES_FEWER_TABLES is used) and reduces the
+ * initialization time before the first AES operation can be performed.
+ * It comes at the cost of additional ~8kb ROM use (resp. ~2kb if \c
+ * MBEDTLS_AES_FEWER_TABLES below is used), and potentially degraded
+ * performance if ROM access is slower than RAM access.
+ *
+ * This option is independent of \c MBEDTLS_AES_FEWER_TABLES.
+ *
+ */
+//#define MBEDTLS_AES_ROM_TABLES
+
+/**
+ * \def MBEDTLS_AES_FEWER_TABLES
+ *
+ * Use less ROM/RAM for AES tables.
+ *
+ * Uncommenting this macro omits 75% of the AES tables from
+ * ROM / RAM (depending on the value of \c MBEDTLS_AES_ROM_TABLES)
+ * by computing their values on the fly during operations
+ * (the tables are entry-wise rotations of one another).
+ *
+ * Tradeoff: Uncommenting this reduces the RAM / ROM footprint
+ * by ~6kb but at the cost of more arithmetic operations during
+ * runtime. Specifically, one has to compare 4 accesses within
+ * different tables to 4 accesses with additional arithmetic
+ * operations within the same table. The performance gain/loss
+ * depends on the system and memory details.
+ *
+ * This option is independent of \c MBEDTLS_AES_ROM_TABLES.
+ *
+ */
+//#define MBEDTLS_AES_FEWER_TABLES
+
+/**
+ * \def MBEDTLS_CAMELLIA_SMALL_MEMORY
+ *
+ * Use less ROM for the Camellia implementation (saves about 768 bytes).
+ *
+ * Uncomment this macro to use less memory for Camellia.
+ */
+//#define MBEDTLS_CAMELLIA_SMALL_MEMORY
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_CBC
+ *
+ * Enable Cipher Block Chaining mode (CBC) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_CBC
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_CFB
+ *
+ * Enable Cipher Feedback mode (CFB) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_CFB
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_CTR
+ *
+ * Enable Counter Block Cipher mode (CTR) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_CTR
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_OFB
+ *
+ * Enable Output Feedback mode (OFB) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_OFB
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_XTS
+ *
+ * Enable Xor-encrypt-xor with ciphertext stealing mode (XTS) for AES.
+ */
+/* #undef MBEDTLS_CIPHER_MODE_XTS */
+
+/**
+ * \def MBEDTLS_CIPHER_NULL_CIPHER
+ *
+ * Enable NULL cipher.
+ * Warning: Only do so when you know what you are doing. This allows for
+ * encryption or channels without any security!
+ *
+ * Requires MBEDTLS_ENABLE_WEAK_CIPHERSUITES as well to enable
+ * the following ciphersuites:
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA
+ * MBEDTLS_TLS_RSA_WITH_NULL_SHA256
+ * MBEDTLS_TLS_RSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_RSA_WITH_NULL_MD5
+ * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA
+ * MBEDTLS_TLS_PSK_WITH_NULL_SHA384
+ * MBEDTLS_TLS_PSK_WITH_NULL_SHA256
+ * MBEDTLS_TLS_PSK_WITH_NULL_SHA
+ *
+ * Uncomment this macro to enable the NULL cipher and ciphersuites
+ */
+//#define MBEDTLS_CIPHER_NULL_CIPHER
+
+/**
+ * \def MBEDTLS_CIPHER_PADDING_PKCS7
+ *
+ * MBEDTLS_CIPHER_PADDING_XXX: Uncomment or comment macros to add support for
+ * specific padding modes in the cipher layer with cipher modes that support
+ * padding (e.g. CBC)
+ *
+ * If you disable all padding modes, only full blocks can be used with CBC.
+ *
+ * Enable padding modes in the cipher layer.
+ */
+#define MBEDTLS_CIPHER_PADDING_PKCS7
+#define MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS
+#define MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN
+#define MBEDTLS_CIPHER_PADDING_ZEROS
+
+/**
+ * \def MBEDTLS_ENABLE_WEAK_CIPHERSUITES
+ *
+ * Enable weak ciphersuites in SSL / TLS.
+ * Warning: Only do so when you know what you are doing. This allows for
+ * channels with virtually no security at all!
+ *
+ * This enables the following ciphersuites:
+ * MBEDTLS_TLS_RSA_WITH_DES_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_DES_CBC_SHA
+ *
+ * Uncomment this macro to enable weak ciphersuites
+ *
+ * \warning DES is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers instead.
+ */
+//#define MBEDTLS_ENABLE_WEAK_CIPHERSUITES
+
+/**
+ * \def MBEDTLS_REMOVE_ARC4_CIPHERSUITES
+ *
+ * Remove RC4 ciphersuites by default in SSL / TLS.
+ * This flag removes the ciphersuites based on RC4 from the default list as
+ * returned by mbedtls_ssl_list_ciphersuites(). However, it is still possible to
+ * enable (some of) them with mbedtls_ssl_conf_ciphersuites() by including them
+ * explicitly.
+ *
+ * Uncomment this macro to remove RC4 ciphersuites by default.
+ */
+//#define MBEDTLS_REMOVE_ARC4_CIPHERSUITES
+
+/**
+ * \def MBEDTLS_ECP_DP_SECP192R1_ENABLED
+ *
+ * MBEDTLS_ECP_XXXX_ENABLED: Enables specific curves within the Elliptic Curve
+ * module. By default all supported curves are enabled.
+ *
+ * Comment macros to disable the curve and functions for it
+ */
+/* #undef MBEDTLS_ECP_DP_SECP192R1_ENABLED */
+/* #undef MBEDTLS_ECP_DP_SECP224R1_ENABLED */
+#define MBEDTLS_ECP_DP_SECP256R1_ENABLED
+/* #undef MBEDTLS_ECP_DP_SECP384R1_ENABLED */
+/* #undef MBEDTLS_ECP_DP_SECP521R1_ENABLED */
+/* #undef MBEDTLS_ECP_DP_SECP192K1_ENABLED */
+/* #undef MBEDTLS_ECP_DP_SECP224K1_ENABLED */
+/* #undef MBEDTLS_ECP_DP_SECP256K1_ENABLED */
+/* #undef MBEDTLS_ECP_DP_BP256R1_ENABLED */
+/* #undef MBEDTLS_ECP_DP_BP384R1_ENABLED */
+/* #undef MBEDTLS_ECP_DP_BP512R1_ENABLED */
+/* #undef MBEDTLS_ECP_DP_CURVE25519_ENABLED */
+/* #undef MBEDTLS_ECP_DP_CURVE448_ENABLED */
+
+/**
+ * \def MBEDTLS_ECP_NIST_OPTIM
+ *
+ * Enable specific 'modulo p' routines for each NIST prime.
+ * Depending on the prime and architecture, makes operations 4 to 8 times
+ * faster on the corresponding curve.
+ *
+ * Comment this macro to disable NIST curves optimisation.
+ */
+#define MBEDTLS_ECP_NIST_OPTIM
+
+/**
+ * \def MBEDTLS_ECDSA_DETERMINISTIC
+ *
+ * Enable deterministic ECDSA (RFC 6979).
+ * Standard ECDSA is "fragile" in the sense that lack of entropy when signing
+ * may result in a compromise of the long-term signing key. This is avoided by
+ * the deterministic variant.
+ *
+ * Requires: MBEDTLS_HMAC_DRBG_C
+ *
+ * Comment this macro to disable deterministic ECDSA.
+ */
+#define MBEDTLS_ECDSA_DETERMINISTIC
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+ *
+ * Enable the PSK based ciphersuite modes in SSL / TLS.
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_RC4_128_SHA
+ */
+#define MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED
+ *
+ * Enable the DHE-PSK based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_DHM_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA
+ *
+ * \warning Using DHE constitutes a security risk as it
+ * is not possible to validate custom DH parameters.
+ * If possible, it is recommended users should consider
+ * preferring other methods of key exchange.
+ * See dhm.h for more details.
+ *
+ */
+#define MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED
+ *
+ * Enable the ECDHE-PSK based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA
+ */
+#define MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED
+ *
+ * Enable the RSA-PSK based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ * MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA
+ */
+/* #undef MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED */
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_RSA_ENABLED
+ *
+ * Enable the RSA-only based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ * MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_RSA_WITH_RC4_128_MD5
+ */
+/* #undef MBEDTLS_KEY_EXCHANGE_RSA_ENABLED */
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED
+ *
+ * Enable the DHE-RSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_DHM_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ * MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA
+ *
+ * \warning Using DHE constitutes a security risk as it
+ * is not possible to validate custom DH parameters.
+ * If possible, it is recommended users should consider
+ * preferring other methods of key exchange.
+ * See dhm.h for more details.
+ *
+ */
+/* #undef MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED */
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED
+ *
+ * Enable the ECDHE-RSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ * MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA
+ */
+/* #undef MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED */
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+ *
+ * Enable the ECDHE-ECDSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_ECDSA_C, MBEDTLS_X509_CRT_PARSE_C,
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA
+ */
+#define MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED
+ *
+ * Enable the ECDH-ECDSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ */
+#define MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED
+ *
+ * Enable the ECDH-RSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ */
+#define MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED
+ *
+ * Enable the ECJPAKE based ciphersuite modes in SSL / TLS.
+ *
+ * \warning This is currently experimental. EC J-PAKE support is based on the
+ * Thread v1.0.0 specification; incompatible changes to the specification
+ * might still happen. For this reason, this is disabled by default.
+ *
+ * Requires: MBEDTLS_ECJPAKE_C
+ * MBEDTLS_SHA256_C
+ * MBEDTLS_ECP_DP_SECP256R1_ENABLED
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8
+ */
+#define MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED
+
+/**
+ * \def MBEDTLS_PK_PARSE_EC_EXTENDED
+ *
+ * Enhance support for reading EC keys using variants of SEC1 not allowed by
+ * RFC 5915 and RFC 5480.
+ *
+ * Currently this means parsing the SpecifiedECDomain choice of EC
+ * parameters (only known groups are supported, not arbitrary domains, to
+ * avoid validation issues).
+ *
+ * Disable if you only need to support RFC 5915 + 5480 key formats.
+ */
+#define MBEDTLS_PK_PARSE_EC_EXTENDED
+
+/**
+ * \def MBEDTLS_ERROR_STRERROR_DUMMY
+ *
+ * Enable a dummy error function to make use of mbedtls_strerror() in
+ * third party libraries easier when MBEDTLS_ERROR_C is disabled
+ * (no effect when MBEDTLS_ERROR_C is enabled).
+ *
+ * You can safely disable this if MBEDTLS_ERROR_C is enabled, or if you're
+ * not using mbedtls_strerror() or error_strerror() in your application.
+ *
+ * Disable if you run into name conflicts and want to really remove the
+ * mbedtls_strerror()
+ */
+#define MBEDTLS_ERROR_STRERROR_DUMMY
+
+/**
+ * \def MBEDTLS_GENPRIME
+ *
+ * Enable the prime-number generation code.
+ *
+ * Requires: MBEDTLS_BIGNUM_C
+ */
+#define MBEDTLS_GENPRIME
+
+/**
+ * \def MBEDTLS_FS_IO
+ *
+ * Enable functions that use the filesystem.
+ */
+//#define MBEDTLS_FS_IO
+
+/**
+ * \def MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
+ *
+ * Do not add default entropy sources. These are the platform specific,
+ * mbedtls_timing_hardclock and HAVEGE based poll functions.
+ *
+ * This is useful to have more control over the added entropy sources in an
+ * application.
+ *
+ * Uncomment this macro to prevent loading of default entropy functions.
+ */
+//#define MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
+
+/**
+ * \def MBEDTLS_NO_PLATFORM_ENTROPY
+ *
+ * Do not use built-in platform entropy functions.
+ * This is useful if your platform does not support
+ * standards like the /dev/urandom or Windows CryptoAPI.
+ *
+ * Uncomment this macro to disable the built-in platform entropy functions.
+ */
+#define MBEDTLS_NO_PLATFORM_ENTROPY
+
+/**
+ * \def MBEDTLS_ENTROPY_FORCE_SHA256
+ *
+ * Force the entropy accumulator to use a SHA-256 accumulator instead of the
+ * default SHA-512 based one (if both are available).
+ *
+ * Requires: MBEDTLS_SHA256_C
+ *
+ * On 32-bit systems SHA-256 can be much faster than SHA-512. Use this option
+ * if you have performance concerns.
+ *
+ * This option is only useful if both MBEDTLS_SHA256_C and
+ * MBEDTLS_SHA512_C are defined. Otherwise the available hash module is used.
+ */
+#define MBEDTLS_ENTROPY_FORCE_SHA256
+
+/**
+ * \def MBEDTLS_ENTROPY_NV_SEED
+ *
+ * Enable the non-volatile (NV) seed file-based entropy source.
+ * (Also enables the NV seed read/write functions in the platform layer)
+ *
+ * This is crucial (if not required) on systems that do not have a
+ * cryptographic entropy source (in hardware or kernel) available.
+ *
+ * Requires: MBEDTLS_ENTROPY_C, MBEDTLS_PLATFORM_C
+ *
+ * \note The read/write functions that are used by the entropy source are
+ * determined in the platform layer, and can be modified at runtime and/or
+ * compile-time depending on the flags (MBEDTLS_PLATFORM_NV_SEED_*) used.
+ *
+ * \note If you use the default implementation functions that read a seedfile
+ * with regular fopen(), please make sure you make a seedfile with the
+ * proper name (defined in MBEDTLS_PLATFORM_STD_NV_SEED_FILE) and at
+ * least MBEDTLS_ENTROPY_BLOCK_SIZE bytes in size that can be read from
+ * and written to or you will get an entropy source error! The default
+ * implementation will only use the first MBEDTLS_ENTROPY_BLOCK_SIZE
+ * bytes from the file.
+ *
+ * \note The entropy collector will write to the seed file before entropy is
+ * given to an external source, to update it.
+ */
+//#define MBEDTLS_ENTROPY_NV_SEED
+
+/**
+ * \def MBEDTLS_MEMORY_DEBUG
+ *
+ * Enable debugging of buffer allocator memory issues. Automatically prints
+ * (to stderr) all (fatal) messages on memory allocation issues. Enables
+ * function for 'debug output' of allocated memory.
+ *
+ * Requires: MBEDTLS_MEMORY_BUFFER_ALLOC_C
+ *
+ * Uncomment this macro to let the buffer allocator print out error messages.
+ */
+//#define MBEDTLS_MEMORY_DEBUG
+
+/**
+ * \def MBEDTLS_MEMORY_BACKTRACE
+ *
+ * Include backtrace information with each allocated block.
+ *
+ * Requires: MBEDTLS_MEMORY_BUFFER_ALLOC_C
+ * GLIBC-compatible backtrace() an backtrace_symbols() support
+ *
+ * Uncomment this macro to include backtrace information
+ */
+//#define MBEDTLS_MEMORY_BACKTRACE
+
+/**
+ * \def MBEDTLS_PK_RSA_ALT_SUPPORT
+ *
+ * Support external private RSA keys (eg from a HSM) in the PK layer.
+ *
+ * Comment this macro to disable support for external private RSA keys.
+ */
+//#define MBEDTLS_PK_RSA_ALT_SUPPORT
+
+/**
+ * \def MBEDTLS_PKCS1_V15
+ *
+ * Enable support for PKCS#1 v1.5 encoding.
+ *
+ * Requires: MBEDTLS_RSA_C
+ *
+ * This enables support for PKCS#1 v1.5 operations.
+ */
+/* #undef MBEDTLS_PKCS1_V15 */
+
+/**
+ * \def MBEDTLS_PKCS1_V21
+ *
+ * Enable support for PKCS#1 v2.1 encoding.
+ *
+ * Requires: MBEDTLS_MD_C, MBEDTLS_RSA_C
+ *
+ * This enables support for RSAES-OAEP and RSASSA-PSS operations.
+ */
+/* #undef MBEDTLS_PKCS1_V21 */
+
+/**
+ * \def MBEDTLS_RSA_NO_CRT
+ *
+ * Do not use the Chinese Remainder Theorem
+ * for the RSA private operation.
+ *
+ * Uncomment this macro to disable the use of CRT in RSA.
+ *
+ */
+//#define MBEDTLS_RSA_NO_CRT
+
+/**
+ * \def MBEDTLS_SELF_TEST
+ *
+ * Enable the checkup functions (*_self_test).
+ */
+//#define MBEDTLS_SELF_TEST
+
+/**
+ * \def MBEDTLS_SHA256_SMALLER
+ *
+ * Enable an implementation of SHA-256 that has lower ROM footprint but also
+ * lower performance.
+ *
+ * The default implementation is meant to be a reasonnable compromise between
+ * performance and size. This version optimizes more aggressively for size at
+ * the expense of performance. Eg on Cortex-M4 it reduces the size of
+ * mbedtls_sha256_process() from ~2KB to ~0.5KB for a performance hit of about
+ * 30%.
+ *
+ * Uncomment to enable the smaller implementation of SHA256.
+ */
+#define MBEDTLS_SHA256_SMALLER
+
+/**
+ * \def MBEDTLS_SSL_ALL_ALERT_MESSAGES
+ *
+ * Enable sending of alert messages in case of encountered errors as per RFC.
+ * If you choose not to send the alert messages, mbed TLS can still communicate
+ * with other servers, only debugging of failures is harder.
+ *
+ * The advantage of not sending alert messages, is that no information is given
+ * about reasons for failures thus preventing adversaries of gaining intel.
+ *
+ * Enable sending of all alert messages
+ */
+//#define MBEDTLS_SSL_ALL_ALERT_MESSAGES
+
+/**
+ * \def MBEDTLS_SSL_ASYNC_PRIVATE
+ *
+ * Enable asynchronous external private key operations in SSL. This allows
+ * you to configure an SSL connection to call an external cryptographic
+ * module to perform private key operations instead of performing the
+ * operation inside the library.
+ *
+ */
+//#define MBEDTLS_SSL_ASYNC_PRIVATE
+
+/**
+ * \def MBEDTLS_SSL_DEBUG_ALL
+ *
+ * Enable the debug messages in SSL module for all issues.
+ * Debug messages have been disabled in some places to prevent timing
+ * attacks due to (unbalanced) debugging function calls.
+ *
+ * If you need all error reporting you should enable this during debugging,
+ * but remove this for production servers that should log as well.
+ *
+ * Uncomment this macro to report all debug messages on errors introducing
+ * a timing side-channel.
+ *
+ */
+//#define MBEDTLS_SSL_DEBUG_ALL
+
+/** \def MBEDTLS_SSL_ENCRYPT_THEN_MAC
+ *
+ * Enable support for Encrypt-then-MAC, RFC 7366.
+ *
+ * This allows peers that both support it to use a more robust protection for
+ * ciphersuites using CBC, providing deep resistance against timing attacks
+ * on the padding or underlying cipher.
+ *
+ * This only affects CBC ciphersuites, and is useless if none is defined.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_TLS1 or
+ * MBEDTLS_SSL_PROTO_TLS1_1 or
+ * MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Comment this macro to disable support for Encrypt-then-MAC
+ */
+//#define MBEDTLS_SSL_ENCRYPT_THEN_MAC
+
+/** \def MBEDTLS_SSL_EXTENDED_MASTER_SECRET
+ *
+ * Enable support for Extended Master Secret, aka Session Hash
+ * (draft-ietf-tls-session-hash-02).
+ *
+ * This was introduced as "the proper fix" to the Triple Handshake familiy of
+ * attacks, but it is recommended to always use it (even if you disable
+ * renegotiation), since it actually fixes a more fundamental issue in the
+ * original SSL/TLS design, and has implications beyond Triple Handshake.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_TLS1 or
+ * MBEDTLS_SSL_PROTO_TLS1_1 or
+ * MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Comment this macro to disable support for Extended Master Secret.
+ */
+//#define MBEDTLS_SSL_EXTENDED_MASTER_SECRET
+
+/**
+ * \def MBEDTLS_SSL_FALLBACK_SCSV
+ *
+ * Enable support for FALLBACK_SCSV (draft-ietf-tls-downgrade-scsv-00).
+ *
+ * For servers, it is recommended to always enable this, unless you support
+ * only one version of TLS, or know for sure that none of your clients
+ * implements a fallback strategy.
+ *
+ * For clients, you only need this if you're using a fallback strategy, which
+ * is not recommended in the first place, unless you absolutely need it to
+ * interoperate with buggy (version-intolerant) servers.
+ *
+ * Comment this macro to disable support for FALLBACK_SCSV
+ */
+//#define MBEDTLS_SSL_FALLBACK_SCSV
+
+/**
+ * \def MBEDTLS_SSL_HW_RECORD_ACCEL
+ *
+ * Enable hooking functions in SSL module for hardware acceleration of
+ * individual records.
+ *
+ * Uncomment this macro to enable hooking functions.
+ */
+//#define MBEDTLS_SSL_HW_RECORD_ACCEL
+
+/**
+ * \def MBEDTLS_SSL_CBC_RECORD_SPLITTING
+ *
+ * Enable 1/n-1 record splitting for CBC mode in SSLv3 and TLS 1.0.
+ *
+ * This is a countermeasure to the BEAST attack, which also minimizes the risk
+ * of interoperability issues compared to sending 0-length records.
+ *
+ * Comment this macro to disable 1/n-1 record splitting.
+ */
+//#define MBEDTLS_SSL_CBC_RECORD_SPLITTING
+
+/**
+ * \def MBEDTLS_SSL_RENEGOTIATION
+ *
+ * Disable support for TLS renegotiation.
+ *
+ * The two main uses of renegotiation are (1) refresh keys on long-lived
+ * connections and (2) client authentication after the initial handshake.
+ * If you don't need renegotiation, it's probably better to disable it, since
+ * it has been associated with security issues in the past and is easy to
+ * misuse/misunderstand.
+ *
+ * Comment this to disable support for renegotiation.
+ *
+ * \note Even if this option is disabled, both client and server are aware
+ * of the Renegotiation Indication Extension (RFC 5746) used to
+ * prevent the SSL renegotiation attack (see RFC 5746 Sect. 1).
+ * (See \c mbedtls_ssl_conf_legacy_renegotiation for the
+ * configuration of this extension).
+ *
+ */
+//#define MBEDTLS_SSL_RENEGOTIATION
+
+/**
+ * \def MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO
+ *
+ * Enable support for receiving and parsing SSLv2 Client Hello messages for the
+ * SSL Server module (MBEDTLS_SSL_SRV_C).
+ *
+ * Uncomment this macro to enable support for SSLv2 Client Hello messages.
+ */
+//#define MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO
+
+/**
+ * \def MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE
+ *
+ * Pick the ciphersuite according to the client's preferences rather than ours
+ * in the SSL Server module (MBEDTLS_SSL_SRV_C).
+ *
+ * Uncomment this macro to respect client's ciphersuite order
+ */
+//#define MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE
+
+/**
+ * \def MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+ *
+ * Enable support for RFC 6066 max_fragment_length extension in SSL.
+ *
+ * Comment this macro to disable support for the max_fragment_length extension
+ */
+#define MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+
+/**
+ * \def MBEDTLS_SSL_PROTO_SSL3
+ *
+ * Enable support for SSL 3.0.
+ *
+ * Requires: MBEDTLS_MD5_C
+ * MBEDTLS_SHA1_C
+ *
+ * Comment this macro to disable support for SSL 3.0
+ */
+//#define MBEDTLS_SSL_PROTO_SSL3
+
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1
+ *
+ * Enable support for TLS 1.0.
+ *
+ * Requires: MBEDTLS_MD5_C
+ * MBEDTLS_SHA1_C
+ *
+ * Comment this macro to disable support for TLS 1.0
+ */
+//#define MBEDTLS_SSL_PROTO_TLS1
+
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1_1
+ *
+ * Enable support for TLS 1.1 (and DTLS 1.0 if DTLS is enabled).
+ *
+ * Requires: MBEDTLS_MD5_C
+ * MBEDTLS_SHA1_C
+ *
+ * Comment this macro to disable support for TLS 1.1 / DTLS 1.0
+ */
+//#define MBEDTLS_SSL_PROTO_TLS1_1
+
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Enable support for TLS 1.2 (and DTLS 1.2 if DTLS is enabled).
+ *
+ * Requires: MBEDTLS_SHA1_C or MBEDTLS_SHA256_C or MBEDTLS_SHA512_C
+ * (Depends on ciphersuites)
+ *
+ * Comment this macro to disable support for TLS 1.2 / DTLS 1.2
+ */
+#define MBEDTLS_SSL_PROTO_TLS1_2
+
+/**
+ * \def MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Enable support for DTLS (all available versions).
+ *
+ * Enable this and MBEDTLS_SSL_PROTO_TLS1_1 to enable DTLS 1.0,
+ * and/or this and MBEDTLS_SSL_PROTO_TLS1_2 to enable DTLS 1.2.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_TLS1_1
+ * or MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Comment this macro to disable support for DTLS
+ */
+#define MBEDTLS_SSL_PROTO_DTLS
+
+/**
+ * \def MBEDTLS_SSL_ALPN
+ *
+ * Enable support for RFC 7301 Application Layer Protocol Negotiation.
+ *
+ * Comment this macro to disable support for ALPN.
+ */
+//#define MBEDTLS_SSL_ALPN
+
+/**
+ * \def MBEDTLS_SSL_DTLS_ANTI_REPLAY
+ *
+ * Enable support for the anti-replay mechanism in DTLS.
+ *
+ * Requires: MBEDTLS_SSL_TLS_C
+ * MBEDTLS_SSL_PROTO_DTLS
+ *
+ * \warning Disabling this is often a security risk!
+ * See mbedtls_ssl_conf_dtls_anti_replay() for details.
+ *
+ * Comment this to disable anti-replay in DTLS.
+ */
+#define MBEDTLS_SSL_DTLS_ANTI_REPLAY
+
+/**
+ * \def MBEDTLS_SSL_DTLS_HELLO_VERIFY
+ *
+ * Enable support for HelloVerifyRequest on DTLS servers.
+ *
+ * This feature is highly recommended to prevent DTLS servers being used as
+ * amplifiers in DoS attacks against other hosts. It should always be enabled
+ * unless you know for sure amplification cannot be a problem in the
+ * environment in which your server operates.
+ *
+ * \warning Disabling this can ba a security risk! (see above)
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Comment this to disable support for HelloVerifyRequest.
+ */
+#define MBEDTLS_SSL_DTLS_HELLO_VERIFY
+
+/**
+ * \def MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE
+ *
+ * Enable server-side support for clients that reconnect from the same port.
+ *
+ * Some clients unexpectedly close the connection and try to reconnect using the
+ * same source port. This needs special support from the server to handle the
+ * new connection securely, as described in section 4.2.8 of RFC 6347. This
+ * flag enables that support.
+ *
+ * Requires: MBEDTLS_SSL_DTLS_HELLO_VERIFY
+ *
+ * Comment this to disable support for clients reusing the source port.
+ */
+//#define MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE
+
+/**
+ * \def MBEDTLS_SSL_DTLS_BADMAC_LIMIT
+ *
+ * Enable support for a limit of records with bad MAC.
+ *
+ * See mbedtls_ssl_conf_dtls_badmac_limit().
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ */
+//#define MBEDTLS_SSL_DTLS_BADMAC_LIMIT
+
+/**
+ * \def MBEDTLS_SSL_SESSION_TICKETS
+ *
+ * Enable support for RFC 5077 session tickets in SSL.
+ * Client-side, provides full support for session tickets (maintainance of a
+ * session store remains the responsibility of the application, though).
+ * Server-side, you also need to provide callbacks for writing and parsing
+ * tickets, including authenticated encryption and key management. Example
+ * callbacks are provided by MBEDTLS_SSL_TICKET_C.
+ *
+ * Comment this macro to disable support for SSL session tickets
+ */
+//#define MBEDTLS_SSL_SESSION_TICKETS
+
+/**
+ * \def MBEDTLS_SSL_EXPORT_KEYS
+ *
+ * Enable support for exporting key block and master secret.
+ * This is required for certain users of TLS, e.g. EAP-TLS.
+ *
+ * Comment this macro to disable support for key export
+ */
+#define MBEDTLS_SSL_EXPORT_KEYS
+
+/**
+ * \def MBEDTLS_SSL_SERVER_NAME_INDICATION
+ *
+ * Enable support for RFC 6066 server name indication (SNI) in SSL.
+ *
+ * Requires: MBEDTLS_X509_CRT_PARSE_C
+ *
+ * Comment this macro to disable support for server name indication in SSL
+ */
+//#define MBEDTLS_SSL_SERVER_NAME_INDICATION
+
+/**
+ * \def MBEDTLS_SSL_TRUNCATED_HMAC
+ *
+ * Enable support for RFC 6066 truncated HMAC in SSL.
+ *
+ * Comment this macro to disable support for truncated HMAC in SSL
+ */
+//#define MBEDTLS_SSL_TRUNCATED_HMAC
+
+/**
+ * \def MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT
+ *
+ * Fallback to old (pre-2.7), non-conforming implementation of the truncated
+ * HMAC extension which also truncates the HMAC key. Note that this option is
+ * only meant for a transitory upgrade period and is likely to be removed in
+ * a future version of the library.
+ *
+ * \warning The old implementation is non-compliant and has a security weakness
+ * (2^80 brute force attack on the HMAC key used for a single,
+ * uninterrupted connection). This should only be enabled temporarily
+ * when (1) the use of truncated HMAC is essential in order to save
+ * bandwidth, and (2) the peer is an Mbed TLS stack that doesn't use
+ * the fixed implementation yet (pre-2.7).
+ *
+ * \deprecated This option is deprecated and will likely be removed in a
+ * future version of Mbed TLS.
+ *
+ * Uncomment to fallback to old, non-compliant truncated HMAC implementation.
+ *
+ * Requires: MBEDTLS_SSL_TRUNCATED_HMAC
+ */
+//#define MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT
+
+/**
+ * \def MBEDTLS_THREADING_ALT
+ *
+ * Provide your own alternate threading implementation.
+ *
+ * Requires: MBEDTLS_THREADING_C
+ *
+ * Uncomment this to allow your own alternate threading implementation.
+ */
+#define MBEDTLS_THREADING_ALT
+
+/**
+ * \def MBEDTLS_THREADING_PTHREAD
+ *
+ * Enable the pthread wrapper layer for the threading layer.
+ *
+ * Requires: MBEDTLS_THREADING_C
+ *
+ * Uncomment this to enable pthread mutexes.
+ */
+//#define MBEDTLS_THREADING_PTHREAD
+
+/**
+ * \def MBEDTLS_VERSION_FEATURES
+ *
+ * Allow run-time checking of compile-time enabled features. Thus allowing users
+ * to check at run-time if the library is for instance compiled with threading
+ * support via mbedtls_version_check_feature().
+ *
+ * Requires: MBEDTLS_VERSION_C
+ *
+ * Comment this to disable run-time checking and save ROM space
+ */
+#define MBEDTLS_VERSION_FEATURES
+
+/**
+ * \def MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3
+ *
+ * If set, the X509 parser will not break-off when parsing an X509 certificate
+ * and encountering an extension in a v1 or v2 certificate.
+ *
+ * Uncomment to prevent an error.
+ */
+//#define MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3
+
+/**
+ * \def MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
+ *
+ * If set, the X509 parser will not break-off when parsing an X509 certificate
+ * and encountering an unknown critical extension.
+ *
+ * \warning Depending on your PKI use, enabling this can be a security risk!
+ *
+ * Uncomment to prevent an error.
+ */
+//#define MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
+
+/**
+ * \def MBEDTLS_X509_CHECK_KEY_USAGE
+ *
+ * Enable verification of the keyUsage extension (CA and leaf certificates).
+ *
+ * Disabling this avoids problems with mis-issued and/or misused
+ * (intermediate) CA and leaf certificates.
+ *
+ * \warning Depending on your PKI use, disabling this can be a security risk!
+ *
+ * Comment to skip keyUsage checking for both CA and leaf certificates.
+ */
+//#define MBEDTLS_X509_CHECK_KEY_USAGE
+
+/**
+ * \def MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+ *
+ * Enable verification of the extendedKeyUsage extension (leaf certificates).
+ *
+ * Disabling this avoids problems with mis-issued and/or misused certificates.
+ *
+ * \warning Depending on your PKI use, disabling this can be a security risk!
+ *
+ * Comment to skip extendedKeyUsage checking for certificates.
+ */
+//#define MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+
+/**
+ * \def MBEDTLS_X509_RSASSA_PSS_SUPPORT
+ *
+ * Enable parsing and verification of X.509 certificates, CRLs and CSRS
+ * signed with RSASSA-PSS (aka PKCS#1 v2.1).
+ *
+ * Comment this macro to disallow using RSASSA-PSS in certificates.
+ */
+//#define MBEDTLS_X509_RSASSA_PSS_SUPPORT
+
+/**
+ * \def MBEDTLS_ZLIB_SUPPORT
+ *
+ * If set, the SSL/TLS module uses ZLIB to support compression and
+ * decompression of packet data.
+ *
+ * \warning TLS-level compression MAY REDUCE SECURITY! See for example the
+ * CRIME attack. Before enabling this option, you should examine with care if
+ * CRIME or similar exploits may be a applicable to your use case.
+ *
+ * \note Currently compression can't be used with DTLS.
+ *
+ * \deprecated This feature is deprecated and will be removed
+ * in the next major revision of the library.
+ *
+ * Used in: library/ssl_tls.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * This feature requires zlib library and headers to be present.
+ *
+ * Uncomment to enable use of ZLIB
+ */
+//#define MBEDTLS_ZLIB_SUPPORT
+/* \} name SECTION: mbed TLS feature support */
+
+/**
+ * \name SECTION: mbed TLS modules
+ *
+ * This section enables or disables entire modules in mbed TLS
+ * \{
+ */
+
+/**
+ * \def MBEDTLS_AESNI_C
+ *
+ * Enable AES-NI support on x86-64.
+ *
+ * Module: library/aesni.c
+ * Caller: library/aes.c
+ *
+ * Requires: MBEDTLS_HAVE_ASM
+ *
+ * This modules adds support for the AES-NI instructions on x86-64
+ */
+//#define MBEDTLS_AESNI_C
+
+/**
+ * \def MBEDTLS_AES_C
+ *
+ * Enable the AES block cipher.
+ *
+ * Module: library/aes.c
+ * Caller: library/cipher.c
+ * library/pem.c
+ * library/ctr_drbg.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA
+ *
+ * PEM_PARSE uses AES for decrypting encrypted keys.
+ */
+#define MBEDTLS_AES_C
+
+/**
+ * \def MBEDTLS_ARC4_C
+ *
+ * Enable the ARCFOUR stream cipher.
+ *
+ * Module: library/arc4.c
+ * Caller: library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_RSA_WITH_RC4_128_MD5
+ * MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_PSK_WITH_RC4_128_SHA
+ *
+ * \warning ARC4 is considered a weak cipher and its use constitutes a
+ * security risk. If possible, we recommend avoidng dependencies on
+ * it, and considering stronger ciphers instead.
+ *
+ */
+#define MBEDTLS_ARC4_C
+
+/**
+ * \def MBEDTLS_ASN1_PARSE_C
+ *
+ * Enable the generic ASN1 parser.
+ *
+ * Module: library/asn1.c
+ * Caller: library/x509.c
+ * library/dhm.c
+ * library/pkcs12.c
+ * library/pkcs5.c
+ * library/pkparse.c
+ */
+#define MBEDTLS_ASN1_PARSE_C
+
+/**
+ * \def MBEDTLS_ASN1_WRITE_C
+ *
+ * Enable the generic ASN1 writer.
+ *
+ * Module: library/asn1write.c
+ * Caller: library/ecdsa.c
+ * library/pkwrite.c
+ * library/x509_create.c
+ * library/x509write_crt.c
+ * library/x509write_csr.c
+ */
+#define MBEDTLS_ASN1_WRITE_C
+
+/**
+ * \def MBEDTLS_BASE64_C
+ *
+ * Enable the Base64 module.
+ *
+ * Module: library/base64.c
+ * Caller: library/pem.c
+ *
+ * This module is required for PEM support (required by X.509).
+ */
+#define MBEDTLS_BASE64_C
+
+/**
+ * \def MBEDTLS_BIGNUM_C
+ *
+ * Enable the multi-precision integer library.
+ *
+ * Module: library/bignum.c
+ * Caller: library/dhm.c
+ * library/ecp.c
+ * library/ecdsa.c
+ * library/rsa.c
+ * library/rsa_internal.c
+ * library/ssl_tls.c
+ *
+ * This module is required for RSA, DHM and ECC (ECDH, ECDSA) support.
+ */
+#define MBEDTLS_BIGNUM_C
+
+/**
+ * \def MBEDTLS_BLOWFISH_C
+ *
+ * Enable the Blowfish block cipher.
+ *
+ * Module: library/blowfish.c
+ */
+//#define MBEDTLS_BLOWFISH_C
+
+/**
+ * \def MBEDTLS_CAMELLIA_C
+ *
+ * Enable the Camellia block cipher.
+ *
+ * Module: library/camellia.c
+ * Caller: library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ */
+//#define MBEDTLS_CAMELLIA_C
+
+/**
+ * \def MBEDTLS_ARIA_C
+ *
+ * Enable the ARIA block cipher.
+ *
+ * Module: library/aria.c
+ * Caller: library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *
+ * MBEDTLS_TLS_RSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_ARIA_256_CBC_SHA384
+ */
+//#define MBEDTLS_ARIA_C
+
+/**
+ * \def MBEDTLS_CCM_C
+ *
+ * Enable the Counter with CBC-MAC (CCM) mode for 128-bit block cipher.
+ *
+ * Module: library/ccm.c
+ *
+ * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C
+ *
+ * This module enables the AES-CCM ciphersuites, if other requisites are
+ * enabled as well.
+ */
+#define MBEDTLS_CCM_C
+
+/**
+ * \def MBEDTLS_CERTS_C
+ *
+ * Enable the test certificates.
+ *
+ * Module: library/certs.c
+ * Caller:
+ *
+ * This module is used for testing (ssl_client/server).
+ */
+//#define MBEDTLS_CERTS_C
+
+/**
+ * \def MBEDTLS_CHACHA20_C
+ *
+ * Enable the ChaCha20 stream cipher.
+ *
+ * Module: library/chacha20.c
+ */
+/* #undef MBEDTLS_CHACHA20_C */
+
+/**
+ * \def MBEDTLS_CHACHAPOLY_C
+ *
+ * Enable the ChaCha20-Poly1305 AEAD algorithm.
+ *
+ * Module: library/chachapoly.c
+ *
+ * This module requires: MBEDTLS_CHACHA20_C, MBEDTLS_POLY1305_C
+ */
+/* #undef MBEDTLS_CHACHAPOLY_C */
+
+/**
+ * \def MBEDTLS_CIPHER_C
+ *
+ * Enable the generic cipher layer.
+ *
+ * Module: library/cipher.c
+ * Caller: library/ssl_tls.c
+ *
+ * Uncomment to enable generic cipher wrappers.
+ */
+#define MBEDTLS_CIPHER_C
+
+/**
+ * \def MBEDTLS_CMAC_C
+ *
+ * Enable the CMAC (Cipher-based Message Authentication Code) mode for block
+ * ciphers.
+ *
+ * Module: library/cmac.c
+ *
+ * Requires: MBEDTLS_AES_C or MBEDTLS_DES_C
+ *
+ */
+#define MBEDTLS_CMAC_C
+
+/**
+ * \def MBEDTLS_CTR_DRBG_C
+ *
+ * Enable the CTR_DRBG AES-256-based random generator.
+ *
+ * Module: library/ctr_drbg.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_AES_C
+ *
+ * This module provides the CTR_DRBG AES-256 random number generator.
+ */
+#define MBEDTLS_CTR_DRBG_C
+
+/**
+ * \def MBEDTLS_DEBUG_C
+ *
+ * Enable the debug functions.
+ *
+ * Module: library/debug.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ *
+ * This module provides debugging functions.
+ */
+//#define MBEDTLS_DEBUG_C
+
+/**
+ * \def MBEDTLS_DES_C
+ *
+ * Enable the DES block cipher.
+ *
+ * Module: library/des.c
+ * Caller: library/pem.c
+ * library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA
+ *
+ * PEM_PARSE uses DES/3DES for decrypting encrypted keys.
+ *
+ * \warning DES is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers instead.
+ */
+//#define MBEDTLS_DES_C
+
+/**
+ * \def MBEDTLS_DHM_C
+ *
+ * Enable the Diffie-Hellman-Merkle module.
+ *
+ * Module: library/dhm.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * This module is used by the following key exchanges:
+ * DHE-RSA, DHE-PSK
+ *
+ * \warning Using DHE constitutes a security risk as it
+ * is not possible to validate custom DH parameters.
+ * If possible, it is recommended users should consider
+ * preferring other methods of key exchange.
+ * See dhm.h for more details.
+ *
+ */
+#define MBEDTLS_DHM_C
+
+/**
+ * \def MBEDTLS_ECDH_C
+ *
+ * Enable the elliptic curve Diffie-Hellman library.
+ *
+ * Module: library/ecdh.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * This module is used by the following key exchanges:
+ * ECDHE-ECDSA, ECDHE-RSA, DHE-PSK
+ *
+ * Requires: MBEDTLS_ECP_C
+ */
+#define MBEDTLS_ECDH_C
+
+/**
+ * \def MBEDTLS_ECDSA_C
+ *
+ * Enable the elliptic curve DSA library.
+ *
+ * Module: library/ecdsa.c
+ * Caller:
+ *
+ * This module is used by the following key exchanges:
+ * ECDHE-ECDSA
+ *
+ * Requires: MBEDTLS_ECP_C, MBEDTLS_ASN1_WRITE_C, MBEDTLS_ASN1_PARSE_C
+ */
+#define MBEDTLS_ECDSA_C
+
+/**
+ * \def MBEDTLS_ECJPAKE_C
+ *
+ * Enable the elliptic curve J-PAKE library.
+ *
+ * \warning This is currently experimental. EC J-PAKE support is based on the
+ * Thread v1.0.0 specification; incompatible changes to the specification
+ * might still happen. For this reason, this is disabled by default.
+ *
+ * Module: library/ecjpake.c
+ * Caller:
+ *
+ * This module is used by the following key exchanges:
+ * ECJPAKE
+ *
+ * Requires: MBEDTLS_ECP_C, MBEDTLS_MD_C
+ */
+#define MBEDTLS_ECJPAKE_C
+
+/**
+ * \def MBEDTLS_ECP_C
+ *
+ * Enable the elliptic curve over GF(p) library.
+ *
+ * Module: library/ecp.c
+ * Caller: library/ecdh.c
+ * library/ecdsa.c
+ * library/ecjpake.c
+ *
+ * Requires: MBEDTLS_BIGNUM_C and at least one MBEDTLS_ECP_DP_XXX_ENABLED
+ */
+#define MBEDTLS_ECP_C
+
+/**
+ * \def MBEDTLS_ENTROPY_C
+ *
+ * Enable the platform-specific entropy code.
+ *
+ * Module: library/entropy.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SHA512_C or MBEDTLS_SHA256_C
+ *
+ * This module provides a generic entropy pool
+ */
+#define MBEDTLS_ENTROPY_C
+
+/**
+ * \def MBEDTLS_ERROR_C
+ *
+ * Enable error code to error string conversion.
+ *
+ * Module: library/error.c
+ * Caller:
+ *
+ * This module enables mbedtls_strerror().
+ */
+//#define MBEDTLS_ERROR_C
+
+/**
+ * \def MBEDTLS_GCM_C
+ *
+ * Enable the Galois/Counter Mode (GCM) for AES.
+ *
+ * Module: library/gcm.c
+ *
+ * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C
+ *
+ * This module enables the AES-GCM and CAMELLIA-GCM ciphersuites, if other
+ * requisites are enabled as well.
+ */
+/* #undef MBEDTLS_GCM_C */
+
+/**
+ * \def MBEDTLS_HAVEGE_C
+ *
+ * Enable the HAVEGE random generator.
+ *
+ * Warning: the HAVEGE random generator is not suitable for virtualized
+ * environments
+ *
+ * Warning: the HAVEGE random generator is dependent on timing and specific
+ * processor traits. It is therefore not advised to use HAVEGE as
+ * your applications primary random generator or primary entropy pool
+ * input. As a secondary input to your entropy pool, it IS able add
+ * the (limited) extra entropy it provides.
+ *
+ * Module: library/havege.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_TIMING_C
+ *
+ * Uncomment to enable the HAVEGE random generator.
+ */
+//#define MBEDTLS_HAVEGE_C
+
+/**
+ * \def MBEDTLS_HKDF_C
+ *
+ * Enable the HKDF algorithm (RFC 5869).
+ *
+ * Module: library/hkdf.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_MD_C
+ *
+ * This module adds support for the Hashed Message Authentication Code
+ * (HMAC)-based key derivation function (HKDF).
+ */
+#define MBEDTLS_HKDF_C
+
+/**
+ * \def MBEDTLS_HMAC_DRBG_C
+ *
+ * Enable the HMAC_DRBG random generator.
+ *
+ * Module: library/hmac_drbg.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_MD_C
+ *
+ * Uncomment to enable the HMAC_DRBG random number geerator.
+ */
+#define MBEDTLS_HMAC_DRBG_C
+
+/**
+ * \def MBEDTLS_NIST_KW_C
+ *
+ * Enable the Key Wrapping mode for 128-bit block ciphers,
+ * as defined in NIST SP 800-38F. Only KW and KWP modes
+ * are supported. At the moment, only AES is approved by NIST.
+ *
+ * Module: library/nist_kw.c
+ *
+ * Requires: MBEDTLS_AES_C and MBEDTLS_CIPHER_C
+ */
+//#define MBEDTLS_NIST_KW_C
+
+/**
+ * \def MBEDTLS_MD_C
+ *
+ * Enable the generic message digest layer.
+ *
+ * Module: library/md.c
+ * Caller:
+ *
+ * Uncomment to enable generic message digest wrappers.
+ */
+#define MBEDTLS_MD_C
+
+/**
+ * \def MBEDTLS_MD2_C
+ *
+ * Enable the MD2 hash algorithm.
+ *
+ * Module: library/md2.c
+ * Caller:
+ *
+ * Uncomment to enable support for (rare) MD2-signed X.509 certs.
+ *
+ * \warning MD2 is considered a weak message digest and its use constitutes a
+ * security risk. If possible, we recommend avoiding dependencies on
+ * it, and considering stronger message digests instead.
+ *
+ */
+//#define MBEDTLS_MD2_C
+
+/**
+ * \def MBEDTLS_MD4_C
+ *
+ * Enable the MD4 hash algorithm.
+ *
+ * Module: library/md4.c
+ * Caller:
+ *
+ * Uncomment to enable support for (rare) MD4-signed X.509 certs.
+ *
+ * \warning MD4 is considered a weak message digest and its use constitutes a
+ * security risk. If possible, we recommend avoiding dependencies on
+ * it, and considering stronger message digests instead.
+ *
+ */
+//#define MBEDTLS_MD4_C
+
+/**
+ * \def MBEDTLS_MD5_C
+ *
+ * Enable the MD5 hash algorithm.
+ *
+ * Module: library/md5.c
+ * Caller: library/md.c
+ * library/pem.c
+ * library/ssl_tls.c
+ *
+ * This module is required for SSL/TLS up to version 1.1, and for TLS 1.2
+ * depending on the handshake parameters. Further, it is used for checking
+ * MD5-signed certificates, and for PBKDF1 when decrypting PEM-encoded
+ * encrypted keys.
+ *
+ * \warning MD5 is considered a weak message digest and its use constitutes a
+ * security risk. If possible, we recommend avoiding dependencies on
+ * it, and considering stronger message digests instead.
+ *
+ */
+//#define MBEDTLS_MD5_C
+
+/**
+ * \def MBEDTLS_MEMORY_BUFFER_ALLOC_C
+ *
+ * Enable the buffer allocator implementation that makes use of a (stack)
+ * based buffer to 'allocate' dynamic memory. (replaces calloc() and free()
+ * calls)
+ *
+ * Module: library/memory_buffer_alloc.c
+ *
+ * Requires: MBEDTLS_PLATFORM_C
+ * MBEDTLS_PLATFORM_MEMORY (to use it within mbed TLS)
+ *
+ * Enable this module to enable the buffer memory allocator.
+ */
+#define MBEDTLS_MEMORY_BUFFER_ALLOC_C
+
+/**
+ * \def MBEDTLS_NET_C
+ *
+ * Enable the TCP and UDP over IPv6/IPv4 networking routines.
+ *
+ * \note This module only works on POSIX/Unix (including Linux, BSD and OS X)
+ * and Windows. For other platforms, you'll want to disable it, and write your
+ * own networking callbacks to be passed to \c mbedtls_ssl_set_bio().
+ *
+ * \note See also our Knowledge Base article about porting to a new
+ * environment:
+ * https://tls.mbed.org/kb/how-to/how-do-i-port-mbed-tls-to-a-new-environment-OS
+ *
+ * Module: library/net_sockets.c
+ *
+ * This module provides networking routines.
+ */
+//#define MBEDTLS_NET_C
+
+/**
+ * \def MBEDTLS_OID_C
+ *
+ * Enable the OID database.
+ *
+ * Module: library/oid.c
+ * Caller: library/asn1write.c
+ * library/pkcs5.c
+ * library/pkparse.c
+ * library/pkwrite.c
+ * library/rsa.c
+ * library/x509.c
+ * library/x509_create.c
+ * library/x509_crl.c
+ * library/x509_crt.c
+ * library/x509_csr.c
+ * library/x509write_crt.c
+ * library/x509write_csr.c
+ *
+ * This modules translates between OIDs and internal values.
+ */
+#define MBEDTLS_OID_C
+
+/**
+ * \def MBEDTLS_PADLOCK_C
+ *
+ * Enable VIA Padlock support on x86.
+ *
+ * Module: library/padlock.c
+ * Caller: library/aes.c
+ *
+ * Requires: MBEDTLS_HAVE_ASM
+ *
+ * This modules adds support for the VIA PadLock on x86.
+ */
+//#define MBEDTLS_PADLOCK_C
+
+/**
+ * \def MBEDTLS_PEM_PARSE_C
+ *
+ * Enable PEM decoding / parsing.
+ *
+ * Module: library/pem.c
+ * Caller: library/dhm.c
+ * library/pkparse.c
+ * library/x509_crl.c
+ * library/x509_crt.c
+ * library/x509_csr.c
+ *
+ * Requires: MBEDTLS_BASE64_C
+ *
+ * This modules adds support for decoding / parsing PEM files.
+ */
+#define MBEDTLS_PEM_PARSE_C
+
+/**
+ * \def MBEDTLS_PEM_WRITE_C
+ *
+ * Enable PEM encoding / writing.
+ *
+ * Module: library/pem.c
+ * Caller: library/pkwrite.c
+ * library/x509write_crt.c
+ * library/x509write_csr.c
+ *
+ * Requires: MBEDTLS_BASE64_C
+ *
+ * This modules adds support for encoding / writing PEM files.
+ */
+#define MBEDTLS_PEM_WRITE_C
+
+/**
+ * \def MBEDTLS_PK_C
+ *
+ * Enable the generic public (asymetric) key layer.
+ *
+ * Module: library/pk.c
+ * Caller: library/ssl_tls.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * Requires: MBEDTLS_RSA_C or MBEDTLS_ECP_C
+ *
+ * Uncomment to enable generic public key wrappers.
+ */
+#define MBEDTLS_PK_C
+
+/**
+ * \def MBEDTLS_PK_PARSE_C
+ *
+ * Enable the generic public (asymetric) key parser.
+ *
+ * Module: library/pkparse.c
+ * Caller: library/x509_crt.c
+ * library/x509_csr.c
+ *
+ * Requires: MBEDTLS_PK_C
+ *
+ * Uncomment to enable generic public key parse functions.
+ */
+#define MBEDTLS_PK_PARSE_C
+
+/**
+ * \def MBEDTLS_PK_WRITE_C
+ *
+ * Enable the generic public (asymetric) key writer.
+ *
+ * Module: library/pkwrite.c
+ * Caller: library/x509write.c
+ *
+ * Requires: MBEDTLS_PK_C
+ *
+ * Uncomment to enable generic public key write functions.
+ */
+/* #undef MBEDTLS_PK_WRITE_C */
+
+/**
+ * \def MBEDTLS_PKCS5_C
+ *
+ * Enable PKCS#5 functions.
+ *
+ * Module: library/pkcs5.c
+ *
+ * Requires: MBEDTLS_MD_C
+ *
+ * This module adds support for the PKCS#5 functions.
+ */
+#define MBEDTLS_PKCS5_C
+
+/**
+ * \def MBEDTLS_PKCS11_C
+ *
+ * Enable wrapper for PKCS#11 smartcard support.
+ *
+ * Module: library/pkcs11.c
+ * Caller: library/pk.c
+ *
+ * Requires: MBEDTLS_PK_C
+ *
+ * This module enables SSL/TLS PKCS #11 smartcard support.
+ * Requires the presence of the PKCS#11 helper library (libpkcs11-helper)
+ */
+//#define MBEDTLS_PKCS11_C
+
+/**
+ * \def MBEDTLS_PKCS12_C
+ *
+ * Enable PKCS#12 PBE functions.
+ * Adds algorithms for parsing PKCS#8 encrypted private keys
+ *
+ * Module: library/pkcs12.c
+ * Caller: library/pkparse.c
+ *
+ * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_CIPHER_C, MBEDTLS_MD_C
+ * Can use: MBEDTLS_ARC4_C
+ *
+ * This module enables PKCS#12 functions.
+ */
+//#define MBEDTLS_PKCS12_C
+
+/**
+ * \def MBEDTLS_PLATFORM_C
+ *
+ * Enable the platform abstraction layer that allows you to re-assign
+ * functions like calloc(), free(), snprintf(), printf(), fprintf(), exit().
+ *
+ * Enabling MBEDTLS_PLATFORM_C enables to use of MBEDTLS_PLATFORM_XXX_ALT
+ * or MBEDTLS_PLATFORM_XXX_MACRO directives, allowing the functions mentioned
+ * above to be specified at runtime or compile time respectively.
+ *
+ * \note This abstraction layer must be enabled on Windows (including MSYS2)
+ * as other module rely on it for a fixed snprintf implementation.
+ *
+ * Module: library/platform.c
+ * Caller: Most other .c files
+ *
+ * This module enables abstraction of common (libc) functions.
+ */
+#define MBEDTLS_PLATFORM_C
+
+/**
+ * \def MBEDTLS_POLY1305_C
+ *
+ * Enable the Poly1305 MAC algorithm.
+ *
+ * Module: library/poly1305.c
+ * Caller: library/chachapoly.c
+ */
+/* #undef MBEDTLS_POLY1305_C */
+
+/**
+ * \def MBEDTLS_RIPEMD160_C
+ *
+ * Enable the RIPEMD-160 hash algorithm.
+ *
+ * Module: library/ripemd160.c
+ * Caller: library/md.c
+ *
+ */
+//#define MBEDTLS_RIPEMD160_C
+
+/**
+ * \def MBEDTLS_RSA_C
+ *
+ * Enable the RSA public-key cryptosystem.
+ *
+ * Module: library/rsa.c
+ * library/rsa_internal.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ * library/x509.c
+ *
+ * This module is used by the following key exchanges:
+ * RSA, DHE-RSA, ECDHE-RSA, RSA-PSK
+ *
+ * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C
+ */
+/* #undef MBEDTLS_RSA_C */
+
+/**
+ * \def MBEDTLS_SHA1_C
+ *
+ * Enable the SHA1 cryptographic hash algorithm.
+ *
+ * Module: library/sha1.c
+ * Caller: library/md.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ * library/x509write_crt.c
+ *
+ * This module is required for SSL/TLS up to version 1.1, for TLS 1.2
+ * depending on the handshake parameters, and for SHA1-signed certificates.
+ *
+ * \warning SHA-1 is considered a weak message digest and its use constitutes
+ * a security risk. If possible, we recommend avoiding dependencies
+ * on it, and considering stronger message digests instead.
+ *
+ */
+/* #undef MBEDTLS_SHA1_C */
+
+/**
+ * \def MBEDTLS_SHA256_C
+ *
+ * Enable the SHA-224 and SHA-256 cryptographic hash algorithms.
+ *
+ * Module: library/sha256.c
+ * Caller: library/entropy.c
+ * library/md.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ *
+ * This module adds support for SHA-224 and SHA-256.
+ * This module is required for the SSL/TLS 1.2 PRF function.
+ */
+#define MBEDTLS_SHA256_C
+
+/**
+ * \def MBEDTLS_SHA512_C
+ *
+ * Enable the SHA-384 and SHA-512 cryptographic hash algorithms.
+ *
+ * Module: library/sha512.c
+ * Caller: library/entropy.c
+ * library/md.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * This module adds support for SHA-384 and SHA-512.
+ */
+/* #undef MBEDTLS_SHA512_C */
+
+/**
+ * \def MBEDTLS_SSL_CACHE_C
+ *
+ * Enable simple SSL cache implementation.
+ *
+ * Module: library/ssl_cache.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SSL_CACHE_C
+ */
+//#define MBEDTLS_SSL_CACHE_C
+
+/**
+ * \def MBEDTLS_SSL_COOKIE_C
+ *
+ * Enable basic implementation of DTLS cookies for hello verification.
+ *
+ * Module: library/ssl_cookie.c
+ * Caller:
+ */
+#define MBEDTLS_SSL_COOKIE_C
+
+/**
+ * \def MBEDTLS_SSL_TICKET_C
+ *
+ * Enable an implementation of TLS server-side callbacks for session tickets.
+ *
+ * Module: library/ssl_ticket.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_CIPHER_C
+ */
+//#define MBEDTLS_SSL_TICKET_C
+
+/**
+ * \def MBEDTLS_SSL_CLI_C
+ *
+ * Enable the SSL/TLS client code.
+ *
+ * Module: library/ssl_cli.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SSL_TLS_C
+ *
+ * This module is required for SSL/TLS client support.
+ */
+#define MBEDTLS_SSL_CLI_C
+
+/**
+ * \def MBEDTLS_SSL_SRV_C
+ *
+ * Enable the SSL/TLS server code.
+ *
+ * Module: library/ssl_srv.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SSL_TLS_C
+ *
+ * This module is required for SSL/TLS server support.
+ */
+#define MBEDTLS_SSL_SRV_C
+
+/**
+ * \def MBEDTLS_SSL_TLS_C
+ *
+ * Enable the generic SSL/TLS code.
+ *
+ * Module: library/ssl_tls.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * Requires: MBEDTLS_CIPHER_C, MBEDTLS_MD_C
+ * and at least one of the MBEDTLS_SSL_PROTO_XXX defines
+ *
+ * This module is required for SSL/TLS.
+ */
+#define MBEDTLS_SSL_TLS_C
+
+/**
+ * \def MBEDTLS_THREADING_C
+ *
+ * Enable the threading abstraction layer.
+ * By default mbed TLS assumes it is used in a non-threaded environment or that
+ * contexts are not shared between threads. If you do intend to use contexts
+ * between threads, you will need to enable this layer to prevent race
+ * conditions. See also our Knowledge Base article about threading:
+ * https://tls.mbed.org/kb/development/thread-safety-and-multi-threading
+ *
+ * Module: library/threading.c
+ *
+ * This allows different threading implementations (self-implemented or
+ * provided).
+ *
+ * You will have to enable either MBEDTLS_THREADING_ALT or
+ * MBEDTLS_THREADING_PTHREAD.
+ *
+ * Enable this layer to allow use of mutexes within mbed TLS
+ */
+#define MBEDTLS_THREADING_C
+
+/**
+ * \def MBEDTLS_TIMING_C
+ *
+ * Enable the semi-portable timing interface.
+ *
+ * \note The provided implementation only works on POSIX/Unix (including Linux,
+ * BSD and OS X) and Windows. On other platforms, you can either disable that
+ * module and provide your own implementations of the callbacks needed by
+ * \c mbedtls_ssl_set_timer_cb() for DTLS, or leave it enabled and provide
+ * your own implementation of the whole module by setting
+ * \c MBEDTLS_TIMING_ALT in the current file.
+ *
+ * \note See also our Knowledge Base article about porting to a new
+ * environment:
+ * https://tls.mbed.org/kb/how-to/how-do-i-port-mbed-tls-to-a-new-environment-OS
+ *
+ * Module: library/timing.c
+ * Caller: library/havege.c
+ *
+ * This module is used by the HAVEGE random number generator.
+ */
+//#define MBEDTLS_TIMING_C
+
+/**
+ * \def MBEDTLS_VERSION_C
+ *
+ * Enable run-time version information.
+ *
+ * Module: library/version.c
+ *
+ * This module provides run-time version information.
+ */
+#define MBEDTLS_VERSION_C
+
+/**
+ * \def MBEDTLS_X509_USE_C
+ *
+ * Enable X.509 core for using certificates.
+ *
+ * Module: library/x509.c
+ * Caller: library/x509_crl.c
+ * library/x509_crt.c
+ * library/x509_csr.c
+ *
+ * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_BIGNUM_C, MBEDTLS_OID_C,
+ * MBEDTLS_PK_PARSE_C
+ *
+ * This module is required for the X.509 parsing modules.
+ */
+#define MBEDTLS_X509_USE_C
+
+/**
+ * \def MBEDTLS_X509_CRT_PARSE_C
+ *
+ * Enable X.509 certificate parsing.
+ *
+ * Module: library/x509_crt.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ *
+ * Requires: MBEDTLS_X509_USE_C
+ *
+ * This module is required for X.509 certificate parsing.
+ */
+#define MBEDTLS_X509_CRT_PARSE_C
+
+/**
+ * \def MBEDTLS_X509_CRL_PARSE_C
+ *
+ * Enable X.509 CRL parsing.
+ *
+ * Module: library/x509_crl.c
+ * Caller: library/x509_crt.c
+ *
+ * Requires: MBEDTLS_X509_USE_C
+ *
+ * This module is required for X.509 CRL parsing.
+ */
+//#define MBEDTLS_X509_CRL_PARSE_C
+
+/**
+ * \def MBEDTLS_X509_CSR_PARSE_C
+ *
+ * Enable X.509 Certificate Signing Request (CSR) parsing.
+ *
+ * Module: library/x509_csr.c
+ * Caller: library/x509_crt_write.c
+ *
+ * Requires: MBEDTLS_X509_USE_C
+ *
+ * This module is used for reading X.509 certificate request.
+ */
+//#define MBEDTLS_X509_CSR_PARSE_C
+
+/**
+ * \def MBEDTLS_X509_CREATE_C
+ *
+ * Enable X.509 core for creating certificates.
+ *
+ * Module: library/x509_create.c
+ *
+ * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C, MBEDTLS_PK_WRITE_C
+ *
+ * This module is the basis for creating X.509 certificates and CSRs.
+ */
+//#define MBEDTLS_X509_CREATE_C
+
+/**
+ * \def MBEDTLS_X509_CRT_WRITE_C
+ *
+ * Enable creating X.509 certificates.
+ *
+ * Module: library/x509_crt_write.c
+ *
+ * Requires: MBEDTLS_X509_CREATE_C
+ *
+ * This module is required for X.509 certificate creation.
+ */
+//#define MBEDTLS_X509_CRT_WRITE_C
+
+/**
+ * \def MBEDTLS_X509_CSR_WRITE_C
+ *
+ * Enable creating X.509 Certificate Signing Requests (CSR).
+ *
+ * Module: library/x509_csr_write.c
+ *
+ * Requires: MBEDTLS_X509_CREATE_C
+ *
+ * This module is required for X.509 certificate request writing.
+ */
+//#define MBEDTLS_X509_CSR_WRITE_C
+
+/**
+ * \def MBEDTLS_XTEA_C
+ *
+ * Enable the XTEA block cipher.
+ *
+ * Module: library/xtea.c
+ * Caller:
+ */
+//#define MBEDTLS_XTEA_C
+
+/* \} name SECTION: mbed TLS modules */
+
+/**
+ * \name SECTION: Module configuration options
+ *
+ * This section allows for the setting of module specific sizes and
+ * configuration options. The default values are already present in the
+ * relevant header files and should suffice for the regular use cases.
+ *
+ * Our advice is to enable options and change their values here
+ * only if you have a good reason and know the consequences.
+ *
+ * Please check the respective header file for documentation on these
+ * parameters (to prevent duplicate documentation).
+ * \{
+ */
+
+/* MPI / BIGNUM options */
+#define MBEDTLS_MPI_WINDOW_SIZE 1 /**< Maximum windows size used. */
+#define MBEDTLS_MPI_MAX_SIZE 32 /**< Maximum number of bytes for usable MPIs. */
+
+/* CTR_DRBG options */
+//#define MBEDTLS_CTR_DRBG_ENTROPY_LEN 48 /**< Amount of entropy used per seed by default (48 with SHA-512, 32 with SHA-256) */
+/*! Maximal reseed counter - indicates maximal number of
+requests allowed between reseeds; according to NIST 800-90
+it is (2^48 - 1), our restriction is : (int - 0xFFFF - 0xF).*/
+#define MBEDTLS_CTR_DRBG_RESEED_INTERVAL 0xFFF0 /**< Interval before reseed is performed by default */
+//#define MBEDTLS_CTR_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */
+//#define MBEDTLS_CTR_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */
+//#define MBEDTLS_CTR_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */
+#define MBEDTLS_CTR_DRBG_USE_128_BIT_KEY /**< Use 128-bit key for CTR_DRBG - may reduce security (see ctr_drbg.h) */
+
+/* HMAC_DRBG options */
+//#define MBEDTLS_HMAC_DRBG_RESEED_INTERVAL 10000 /**< Interval before reseed is performed by default */
+//#define MBEDTLS_HMAC_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */
+//#define MBEDTLS_HMAC_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */
+//#define MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */
+
+/* ECP options */
+#define MBEDTLS_ECP_MAX_BITS 256 /**< Maximum bit size of groups */
+#define MBEDTLS_ECP_WINDOW_SIZE 2 /**< Maximum window size used */
+/* #undef MBEDTLS_ECP_FIXED_POINT_OPTIM */
+
+/* Entropy options */
+//#define MBEDTLS_ENTROPY_MAX_SOURCES 20 /**< Maximum number of sources supported */
+#define MBEDTLS_ENTROPY_MAX_GATHER 144 /**< Maximum amount requested from entropy sources */
+//#define MBEDTLS_ENTROPY_MIN_HARDWARE 32 /**< Default minimum number of bytes required for the hardware entropy source mbedtls_hardware_poll() before entropy is released */
+
+/* Memory buffer allocator options */
+//#define MBEDTLS_MEMORY_ALIGN_MULTIPLE 4 /**< Align on multiples of this value */
+/* Platform options */
+//#define MBEDTLS_PLATFORM_STD_MEM_HDR <stdlib.h> /**< Header to include if MBEDTLS_PLATFORM_NO_STD_FUNCTIONS is defined. Don't define if no header is needed. */
+//#define MBEDTLS_PLATFORM_STD_CALLOC calloc /**< Default allocator to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_FREE free /**< Default free to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_EXIT exit /**< Default exit to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_TIME time /**< Default time to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */
+//#define MBEDTLS_PLATFORM_STD_FPRINTF fprintf /**< Default fprintf to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_PRINTF printf /**< Default printf to use, can be undefined */
+/* Note: your snprintf must correclty zero-terminate the buffer! */
+//#define MBEDTLS_PLATFORM_STD_SNPRINTF snprintf /**< Default snprintf to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_EXIT_SUCCESS 0 /**< Default exit value to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_EXIT_FAILURE 1 /**< Default exit value to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_NV_SEED_READ mbedtls_platform_std_nv_seed_read /**< Default nv_seed_read function to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_NV_SEED_WRITE mbedtls_platform_std_nv_seed_write /**< Default nv_seed_write function to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_NV_SEED_FILE "seedfile" /**< Seed file to read/write with default implementation */
+
+/* To Use Function Macros MBEDTLS_PLATFORM_C must be enabled */
+/* MBEDTLS_PLATFORM_XXX_MACRO and MBEDTLS_PLATFORM_XXX_ALT cannot both be defined */
+//#define MBEDTLS_PLATFORM_CALLOC_MACRO calloc /**< Default allocator macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_FREE_MACRO free /**< Default free macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_EXIT_MACRO exit /**< Default exit macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_TIME_MACRO time /**< Default time macro to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */
+//#define MBEDTLS_PLATFORM_TIME_TYPE_MACRO time_t /**< Default time macro to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */
+//#define MBEDTLS_PLATFORM_FPRINTF_MACRO fprintf /**< Default fprintf macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_PRINTF_MACRO printf /**< Default printf macro to use, can be undefined */
+/* Note: your snprintf must correclty zero-terminate the buffer! */
+//#define MBEDTLS_PLATFORM_SNPRINTF_MACRO snprintf /**< Default snprintf macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_NV_SEED_READ_MACRO mbedtls_platform_std_nv_seed_read /**< Default nv_seed_read function to use, can be undefined */
+//#define MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO mbedtls_platform_std_nv_seed_write /**< Default nv_seed_write function to use, can be undefined */
+
+/* SSL Cache options */
+//#define MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT 86400 /**< 1 day */
+//#define MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES 50 /**< Maximum entries in cache */
+
+/* SSL options */
+
+/** \def MBEDTLS_SSL_MAX_CONTENT_LEN
+ *
+ * Maximum fragment length in bytes.
+ *
+ * Determines the size of both the incoming and outgoing TLS I/O buffers.
+ *
+ * Uncommenting MBEDTLS_SSL_IN_CONTENT_LEN and/or MBEDTLS_SSL_OUT_CONTENT_LEN
+ * will override this length by setting maximum incoming and/or outgoing
+ * fragment length, respectively.
+ */
+#define MBEDTLS_SSL_MAX_CONTENT_LEN 900
+
+/** \def MBEDTLS_SSL_IN_CONTENT_LEN
+ *
+ * Maximum incoming fragment length in bytes.
+ *
+ * Uncomment to set the size of the inward TLS buffer independently of the
+ * outward buffer.
+ */
+//#define MBEDTLS_SSL_IN_CONTENT_LEN 16384
+
+/** \def MBEDTLS_SSL_OUT_CONTENT_LEN
+ *
+ * Maximum outgoing fragment length in bytes.
+ *
+ * Uncomment to set the size of the outward TLS buffer independently of the
+ * inward buffer.
+ *
+ * It is possible to save RAM by setting a smaller outward buffer, while keeping
+ * the default inward 16384 byte buffer to conform to the TLS specification.
+ *
+ * The minimum required outward buffer size is determined by the handshake
+ * protocol's usage. Handshaking will fail if the outward buffer is too small.
+ * The specific size requirement depends on the configured ciphers and any
+ * certificate data which is sent during the handshake.
+ *
+ * For absolute minimum RAM usage, it's best to enable
+ * MBEDTLS_SSL_MAX_FRAGMENT_LENGTH and reduce MBEDTLS_SSL_MAX_CONTENT_LEN. This
+ * reduces both incoming and outgoing buffer sizes. However this is only
+ * guaranteed if the other end of the connection also supports the TLS
+ * max_fragment_len extension. Otherwise the connection may fail.
+ */
+//#define MBEDTLS_SSL_OUT_CONTENT_LEN 16384
+
+/** \def MBEDTLS_SSL_DTLS_MAX_BUFFERING
+ *
+ * Maximum number of heap-allocated bytes for the purpose of
+ * DTLS handshake message reassembly and future message buffering.
+ *
+ * This should be at least 9/8 * MBEDTLSSL_IN_CONTENT_LEN
+ * to account for a reassembled handshake message of maximum size,
+ * together with its reassembly bitmap.
+ *
+ * A value of 2 * MBEDTLS_SSL_IN_CONTENT_LEN (32768 by default)
+ * should be sufficient for all practical situations as it allows
+ * to reassembly a large handshake message (such as a certificate)
+ * while buffering multiple smaller handshake messages.
+ *
+ */
+//#define MBEDTLS_SSL_DTLS_MAX_BUFFERING 32768
+
+//#define MBEDTLS_SSL_DEFAULT_TICKET_LIFETIME 86400 /**< Lifetime of session tickets (if enabled) */
+//#define MBEDTLS_PSK_MAX_LEN 32 /**< Max size of TLS pre-shared keys, in bytes (default 256 bits) */
+//#define MBEDTLS_SSL_COOKIE_TIMEOUT 60 /**< Default expiration delay of DTLS cookies, in seconds if HAVE_TIME, or in number of cookies issued */
+
+/**
+ * Complete list of ciphersuites to use, in order of preference.
+ *
+ * \warning No dependency checking is done on that field! This option can only
+ * be used to restrict the set of available ciphersuites. It is your
+ * responsibility to make sure the needed modules are active.
+ *
+ * Use this to save a few hundred bytes of ROM (default ordering of all
+ * available ciphersuites) and a few to a few hundred bytes of RAM.
+ *
+ * The value below is only an example, not the default.
+ */
+#define MBEDTLS_SSL_CIPHERSUITES MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8
+
+/* X509 options */
+//#define MBEDTLS_X509_MAX_INTERMEDIATE_CA 8 /**< Maximum number of intermediate CAs in a verification chain. */
+//#define MBEDTLS_X509_MAX_FILE_PATH_LEN 512 /**< Maximum length of a path/filename string in bytes including the null terminator character ('\0'). */
+
+/**
+ * Allow SHA-1 in the default TLS configuration for certificate signing.
+ * Without this build-time option, SHA-1 support must be activated explicitly
+ * through mbedtls_ssl_conf_cert_profile. Turning on this option is not
+ * recommended because of it is possible to generate SHA-1 collisions, however
+ * this may be safe for legacy infrastructure where additional controls apply.
+ *
+ * \warning SHA-1 is considered a weak message digest and its use constitutes
+ * a security risk. If possible, we recommend avoiding dependencies
+ * on it, and considering stronger message digests instead.
+ *
+ */
+// #define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_CERTIFICATES
+
+/**
+ * Allow SHA-1 in the default TLS configuration for TLS 1.2 handshake
+ * signature and ciphersuite selection. Without this build-time option, SHA-1
+ * support must be activated explicitly through mbedtls_ssl_conf_sig_hashes.
+ * The use of SHA-1 in TLS <= 1.1 and in HMAC-SHA-1 is always allowed by
+ * default. At the time of writing, there is no practical attack on the use
+ * of SHA-1 in handshake signatures, hence this option is turned on by default
+ * to preserve compatibility with existing peers, but the general
+ * warning applies nonetheless:
+ *
+ * \warning SHA-1 is considered a weak message digest and its use constitutes
+ * a security risk. If possible, we recommend avoiding dependencies
+ * on it, and considering stronger message digests instead.
+ *
+ */
+#define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE
+
+/**
+ * Uncomment the macro to let mbed TLS use your alternate implementation of
+ * mbedtls_platform_zeroize(). This replaces the default implementation in
+ * platform_util.c.
+ *
+ * mbedtls_platform_zeroize() is a widely used function across the library to
+ * zero a block of memory. The implementation is expected to be secure in the
+ * sense that it has been written to prevent the compiler from removing calls
+ * to mbedtls_platform_zeroize() as part of redundant code elimination
+ * optimizations. However, it is difficult to guarantee that calls to
+ * mbedtls_platform_zeroize() will not be optimized by the compiler as older
+ * versions of the C language standards do not provide a secure implementation
+ * of memset(). Therefore, MBEDTLS_PLATFORM_ZEROIZE_ALT enables users to
+ * configure their own implementation of mbedtls_platform_zeroize(), for
+ * example by using directives specific to their compiler, features from newer
+ * C standards (e.g using memset_s() in C11) or calling a secure memset() from
+ * their system (e.g explicit_bzero() in BSD).
+ */
+#define MBEDTLS_PLATFORM_ZEROIZE_ALT
+
+/**
+ * Uncomment the macro to let Mbed TLS use your alternate implementation of
+ * mbedtls_platform_gmtime_r(). This replaces the default implementation in
+ * platform_util.c.
+ *
+ * gmtime() is not a thread-safe function as defined in the C standard. The
+ * library will try to use safer implementations of this function, such as
+ * gmtime_r() when available. However, if Mbed TLS cannot identify the target
+ * system, the implementation of mbedtls_platform_gmtime_r() will default to
+ * using the standard gmtime(). In this case, calls from the library to
+ * gmtime() will be guarded by the global mutex mbedtls_threading_gmtime_mutex
+ * if MBEDTLS_THREADING_C is enabled. We recommend that calls from outside the
+ * library are also guarded with this mutex to avoid race conditions. However,
+ * if the macro MBEDTLS_PLATFORM_GMTIME_R_ALT is defined, Mbed TLS will
+ * unconditionally use the implementation for mbedtls_platform_gmtime_r()
+ * supplied at compile time.
+ */
+//#define MBEDTLS_PLATFORM_GMTIME_R_ALT
+
+/* \} name SECTION: Customisation configuration options */
+
+/* Target and application specific configurations */
+
+#define CONFIG_CC310_MBEDTLS_AES_C
+#define CONFIG_CC310_MBEDTLS_C
+#define CONFIG_CC310_MBEDTLS_CCM_C
+#define CONFIG_CC310_MBEDTLS_CIPHER_MODE_C
+#define CONFIG_CC310_MBEDTLS_CMAC_C
+#define CONFIG_CC310_MBEDTLS_DHM_C
+#define CONFIG_CC310_MBEDTLS_ECDH_C
+#define CONFIG_CC310_MBEDTLS_ECDSA_C
+#define CONFIG_CC310_MBEDTLS_ECJPAKE_C
+#define CONFIG_CC310_MBEDTLS_ECP_C
+#define CONFIG_CC310_MBEDTLS_SHA256_C
+#define CONFIG_GLUE_MBEDTLS_AES_C
+#define CONFIG_GLUE_MBEDTLS_C
+#define CONFIG_GLUE_MBEDTLS_CIPHER_MODE_C
+#define CONFIG_VANILLA_MBEDTLS_AES_C
+#define CONFIG_VANILLA_MBEDTLS_C
+#define CONFIG_VANILLA_MBEDTLS_CIPHER_MODE_C
+
+//#define YOTTA_CFG_MBEDTLS_TARGET_CONFIG_FILE "target_config.h"
+
+#if defined(TARGET_LIKE_MBED) && defined(YOTTA_CFG_MBEDTLS_TARGET_CONFIG_FILE)
+#include YOTTA_CFG_MBEDTLS_TARGET_CONFIG_FILE
+#endif
+
+/*
+ * Allow user to override any previous default.
+ *
+ * Use two macro names for that, as:
+ * - with yotta the prefix YOTTA_CFG_ is forced
+ * - without yotta is looks weird to have a YOTTA prefix.
+ */
+#if defined(YOTTA_CFG_MBEDTLS_USER_CONFIG_FILE)
+#include YOTTA_CFG_MBEDTLS_USER_CONFIG_FILE
+#elif defined(MBEDTLS_USER_CONFIG_FILE)
+#include MBEDTLS_USER_CONFIG_FILE
+#endif
+
+
+/*
+ * Nordic added. 256 bit defines for vanilla mbed TLS
+ */
+#define MBEDTLS_CIPHER_AES_256_ECB_C
+#define MBEDTLS_CIPHER_AES_256_CBC_C
+#define MBEDTLS_CIPHER_AES_256_CTR_C
+/* #undef MBEDTLS_CIPHER_AES_256_CCM_C */
+/* #undef MBEDTLS_CIPHER_AES_256_CFB_C */
+/* #undef MBEDTLS_CIPHER_AES_256_OFB_C */
+
+
+/*
+ * Nordic added. Defines for features not supported in HW
+ * on non-glued functionality.
+ */
+/* #undef MBEDTLS_AES_256_CMAC_C */
+
+
+
+#include "mbedtls/check_config.h"
+
+#if defined(MBEDTLS_NRF_CONFIG_FILE)
+#include MBEDTLS_NRF_CONFIG_FILE
+#endif
+
+#endif /* MBEDTLS_CONFIG_H */
+
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/aes.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/aes.h
new file mode 100644
index 0000000..94e7282
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/aes.h
@@ -0,0 +1,674 @@
+/**
+ * \file aes.h
+ *
+ * \brief This file contains AES definitions and functions.
+ *
+ * The Advanced Encryption Standard (AES) specifies a FIPS-approved
+ * cryptographic algorithm that can be used to protect electronic
+ * data.
+ *
+ * The AES algorithm is a symmetric block cipher that can
+ * encrypt and decrypt information. For more information, see
+ * <em>FIPS Publication 197: Advanced Encryption Standard</em> and
+ * <em>ISO/IEC 18033-2:2006: Information technology -- Security
+ * techniques -- Encryption algorithms -- Part 2: Asymmetric
+ * ciphers</em>.
+ *
+ * The AES-XTS block mode is standardized by NIST SP 800-38E
+ * <https://nvlpubs.nist.gov/nistpubs/legacy/sp/nistspecialpublication800-38e.pdf>
+ * and described in detail by IEEE P1619
+ * <https://ieeexplore.ieee.org/servlet/opac?punumber=4375278>.
+ */
+
+/* Copyright (C) 2006-2018, Arm Limited (or its affiliates), All Rights Reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of Mbed TLS (https://tls.mbed.org)
+ */
+
+#ifndef MBEDTLS_AES_H
+#define MBEDTLS_AES_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+
+/* padlock.c and aesni.c rely on these values! */
+#define MBEDTLS_AES_ENCRYPT 1 /**< AES encryption. */
+#define MBEDTLS_AES_DECRYPT 0 /**< AES decryption. */
+
+/* Error codes in range 0x0020-0x0022 */
+#define MBEDTLS_ERR_AES_INVALID_KEY_LENGTH -0x0020 /**< Invalid key length. */
+#define MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH -0x0022 /**< Invalid data input length. */
+
+/* Error codes in range 0x0021-0x0025 */
+#define MBEDTLS_ERR_AES_BAD_INPUT_DATA -0x0021 /**< Invalid input data. */
+
+/* MBEDTLS_ERR_AES_FEATURE_UNAVAILABLE is deprecated and should not be used. */
+#define MBEDTLS_ERR_AES_FEATURE_UNAVAILABLE -0x0023 /**< Feature not available. For example, an unsupported AES key size. */
+
+/* MBEDTLS_ERR_AES_HW_ACCEL_FAILED is deprecated and should not be used. */
+#define MBEDTLS_ERR_AES_HW_ACCEL_FAILED -0x0025 /**< AES hardware accelerator failed. */
+
+#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
+ !defined(inline) && !defined(__cplusplus)
+#define inline __inline
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_AES_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief The AES context-type definition.
+ */
+typedef struct mbedtls_aes_context
+{
+ int nr; /*!< The number of rounds. */
+ uint32_t *rk; /*!< AES round keys. */
+ uint32_t buf[68]; /*!< Unaligned data buffer. This buffer can
+ hold 32 extra Bytes, which can be used for
+ one of the following purposes:
+ <ul><li>Alignment if VIA padlock is
+ used.</li>
+ <li>Simplifying key expansion in the 256-bit
+ case by generating an extra round key.
+ </li></ul> */
+}
+mbedtls_aes_context;
+
+#if defined(MBEDTLS_CIPHER_MODE_XTS)
+/**
+ * \brief The AES XTS context-type definition.
+ */
+typedef struct mbedtls_aes_xts_context
+{
+ mbedtls_aes_context crypt; /*!< The AES context to use for AES block
+ encryption or decryption. */
+ mbedtls_aes_context tweak; /*!< The AES context used for tweak
+ computation. */
+} mbedtls_aes_xts_context;
+#endif /* MBEDTLS_CIPHER_MODE_XTS */
+
+#else /* MBEDTLS_AES_ALT */
+#include "aes_alt.h"
+#endif /* MBEDTLS_AES_ALT */
+
+/**
+ * \brief This function initializes the specified AES context.
+ *
+ * It must be the first API called before using
+ * the context.
+ *
+ * \param ctx The AES context to initialize. This must not be \c NULL.
+ */
+void mbedtls_aes_init( mbedtls_aes_context *ctx );
+
+/**
+ * \brief This function releases and clears the specified AES context.
+ *
+ * \param ctx The AES context to clear.
+ * If this is \c NULL, this function does nothing.
+ * Otherwise, the context must have been at least initialized.
+ */
+void mbedtls_aes_free( mbedtls_aes_context *ctx );
+
+#if defined(MBEDTLS_CIPHER_MODE_XTS)
+/**
+ * \brief This function initializes the specified AES XTS context.
+ *
+ * It must be the first API called before using
+ * the context.
+ *
+ * \param ctx The AES XTS context to initialize. This must not be \c NULL.
+ */
+void mbedtls_aes_xts_init( mbedtls_aes_xts_context *ctx );
+
+/**
+ * \brief This function releases and clears the specified AES XTS context.
+ *
+ * \param ctx The AES XTS context to clear.
+ * If this is \c NULL, this function does nothing.
+ * Otherwise, the context must have been at least initialized.
+ */
+void mbedtls_aes_xts_free( mbedtls_aes_xts_context *ctx );
+#endif /* MBEDTLS_CIPHER_MODE_XTS */
+
+/**
+ * \brief This function sets the encryption key.
+ *
+ * \param ctx The AES context to which the key should be bound.
+ * It must be initialized.
+ * \param key The encryption key.
+ * This must be a readable buffer of size \p keybits bits.
+ * \param keybits The size of data passed in bits. Valid options are:
+ * <ul><li>128 bits</li>
+ * <li>192 bits</li>
+ * <li>256 bits</li></ul>
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_AES_INVALID_KEY_LENGTH on failure.
+ */
+int mbedtls_aes_setkey_enc( mbedtls_aes_context *ctx, const unsigned char *key,
+ unsigned int keybits );
+
+/**
+ * \brief This function sets the decryption key.
+ *
+ * \param ctx The AES context to which the key should be bound.
+ * It must be initialized.
+ * \param key The decryption key.
+ * This must be a readable buffer of size \p keybits bits.
+ * \param keybits The size of data passed. Valid options are:
+ * <ul><li>128 bits</li>
+ * <li>192 bits</li>
+ * <li>256 bits</li></ul>
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_AES_INVALID_KEY_LENGTH on failure.
+ */
+int mbedtls_aes_setkey_dec( mbedtls_aes_context *ctx, const unsigned char *key,
+ unsigned int keybits );
+
+#if defined(MBEDTLS_CIPHER_MODE_XTS)
+/**
+ * \brief This function prepares an XTS context for encryption and
+ * sets the encryption key.
+ *
+ * \param ctx The AES XTS context to which the key should be bound.
+ * It must be initialized.
+ * \param key The encryption key. This is comprised of the XTS key1
+ * concatenated with the XTS key2.
+ * This must be a readable buffer of size \p keybits bits.
+ * \param keybits The size of \p key passed in bits. Valid options are:
+ * <ul><li>256 bits (each of key1 and key2 is a 128-bit key)</li>
+ * <li>512 bits (each of key1 and key2 is a 256-bit key)</li></ul>
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_AES_INVALID_KEY_LENGTH on failure.
+ */
+int mbedtls_aes_xts_setkey_enc( mbedtls_aes_xts_context *ctx,
+ const unsigned char *key,
+ unsigned int keybits );
+
+/**
+ * \brief This function prepares an XTS context for decryption and
+ * sets the decryption key.
+ *
+ * \param ctx The AES XTS context to which the key should be bound.
+ * It must be initialized.
+ * \param key The decryption key. This is comprised of the XTS key1
+ * concatenated with the XTS key2.
+ * This must be a readable buffer of size \p keybits bits.
+ * \param keybits The size of \p key passed in bits. Valid options are:
+ * <ul><li>256 bits (each of key1 and key2 is a 128-bit key)</li>
+ * <li>512 bits (each of key1 and key2 is a 256-bit key)</li></ul>
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_AES_INVALID_KEY_LENGTH on failure.
+ */
+int mbedtls_aes_xts_setkey_dec( mbedtls_aes_xts_context *ctx,
+ const unsigned char *key,
+ unsigned int keybits );
+#endif /* MBEDTLS_CIPHER_MODE_XTS */
+
+/**
+ * \brief This function performs an AES single-block encryption or
+ * decryption operation.
+ *
+ * It performs the operation defined in the \p mode parameter
+ * (encrypt or decrypt), on the input data buffer defined in
+ * the \p input parameter.
+ *
+ * mbedtls_aes_init(), and either mbedtls_aes_setkey_enc() or
+ * mbedtls_aes_setkey_dec() must be called before the first
+ * call to this API with the same context.
+ *
+ * \param ctx The AES context to use for encryption or decryption.
+ * It must be initialized and bound to a key.
+ * \param mode The AES operation: #MBEDTLS_AES_ENCRYPT or
+ * #MBEDTLS_AES_DECRYPT.
+ * \param input The buffer holding the input data.
+ * It must be readable and at least \c 16 Bytes long.
+ * \param output The buffer where the output data will be written.
+ * It must be writeable and at least \c 16 Bytes long.
+
+ * \return \c 0 on success.
+ */
+int mbedtls_aes_crypt_ecb( mbedtls_aes_context *ctx,
+ int mode,
+ const unsigned char input[16],
+ unsigned char output[16] );
+
+#if defined(MBEDTLS_CIPHER_MODE_CBC)
+/**
+ * \brief This function performs an AES-CBC encryption or decryption operation
+ * on full blocks.
+ *
+ * It performs the operation defined in the \p mode
+ * parameter (encrypt/decrypt), on the input data buffer defined in
+ * the \p input parameter.
+ *
+ * It can be called as many times as needed, until all the input
+ * data is processed. mbedtls_aes_init(), and either
+ * mbedtls_aes_setkey_enc() or mbedtls_aes_setkey_dec() must be called
+ * before the first call to this API with the same context.
+ *
+ * \note This function operates on full blocks, that is, the input size
+ * must be a multiple of the AES block size of \c 16 Bytes.
+ *
+ * \note Upon exit, the content of the IV is updated so that you can
+ * call the same function again on the next
+ * block(s) of data and get the same result as if it was
+ * encrypted in one call. This allows a "streaming" usage.
+ * If you need to retain the contents of the IV, you should
+ * either save it manually or use the cipher module instead.
+ *
+ *
+ * \param ctx The AES context to use for encryption or decryption.
+ * It must be initialized and bound to a key.
+ * \param mode The AES operation: #MBEDTLS_AES_ENCRYPT or
+ * #MBEDTLS_AES_DECRYPT.
+ * \param length The length of the input data in Bytes. This must be a
+ * multiple of the block size (\c 16 Bytes).
+ * \param iv Initialization vector (updated after use).
+ * It must be a readable and writeable buffer of \c 16 Bytes.
+ * \param input The buffer holding the input data.
+ * It must be readable and of size \p length Bytes.
+ * \param output The buffer holding the output data.
+ * It must be writeable and of size \p length Bytes.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH
+ * on failure.
+ */
+int mbedtls_aes_crypt_cbc( mbedtls_aes_context *ctx,
+ int mode,
+ size_t length,
+ unsigned char iv[16],
+ const unsigned char *input,
+ unsigned char *output );
+#endif /* MBEDTLS_CIPHER_MODE_CBC */
+
+#if defined(MBEDTLS_CIPHER_MODE_XTS)
+/**
+ * \brief This function performs an AES-XTS encryption or decryption
+ * operation for an entire XTS data unit.
+ *
+ * AES-XTS encrypts or decrypts blocks based on their location as
+ * defined by a data unit number. The data unit number must be
+ * provided by \p data_unit.
+ *
+ * NIST SP 800-38E limits the maximum size of a data unit to 2^20
+ * AES blocks. If the data unit is larger than this, this function
+ * returns #MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH.
+ *
+ * \param ctx The AES XTS context to use for AES XTS operations.
+ * It must be initialized and bound to a key.
+ * \param mode The AES operation: #MBEDTLS_AES_ENCRYPT or
+ * #MBEDTLS_AES_DECRYPT.
+ * \param length The length of a data unit in Bytes. This can be any
+ * length between 16 bytes and 2^24 bytes inclusive
+ * (between 1 and 2^20 block cipher blocks).
+ * \param data_unit The address of the data unit encoded as an array of 16
+ * bytes in little-endian format. For disk encryption, this
+ * is typically the index of the block device sector that
+ * contains the data.
+ * \param input The buffer holding the input data (which is an entire
+ * data unit). This function reads \p length Bytes from \p
+ * input.
+ * \param output The buffer holding the output data (which is an entire
+ * data unit). This function writes \p length Bytes to \p
+ * output.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH if \p length is
+ * smaller than an AES block in size (16 Bytes) or if \p
+ * length is larger than 2^20 blocks (16 MiB).
+ */
+int mbedtls_aes_crypt_xts( mbedtls_aes_xts_context *ctx,
+ int mode,
+ size_t length,
+ const unsigned char data_unit[16],
+ const unsigned char *input,
+ unsigned char *output );
+#endif /* MBEDTLS_CIPHER_MODE_XTS */
+
+#if defined(MBEDTLS_CIPHER_MODE_CFB)
+/**
+ * \brief This function performs an AES-CFB128 encryption or decryption
+ * operation.
+ *
+ * It performs the operation defined in the \p mode
+ * parameter (encrypt or decrypt), on the input data buffer
+ * defined in the \p input parameter.
+ *
+ * For CFB, you must set up the context with mbedtls_aes_setkey_enc(),
+ * regardless of whether you are performing an encryption or decryption
+ * operation, that is, regardless of the \p mode parameter. This is
+ * because CFB mode uses the same key schedule for encryption and
+ * decryption.
+ *
+ * \note Upon exit, the content of the IV is updated so that you can
+ * call the same function again on the next
+ * block(s) of data and get the same result as if it was
+ * encrypted in one call. This allows a "streaming" usage.
+ * If you need to retain the contents of the
+ * IV, you must either save it manually or use the cipher
+ * module instead.
+ *
+ *
+ * \param ctx The AES context to use for encryption or decryption.
+ * It must be initialized and bound to a key.
+ * \param mode The AES operation: #MBEDTLS_AES_ENCRYPT or
+ * #MBEDTLS_AES_DECRYPT.
+ * \param length The length of the input data in Bytes.
+ * \param iv_off The offset in IV (updated after use).
+ * It must point to a valid \c size_t.
+ * \param iv The initialization vector (updated after use).
+ * It must be a readable and writeable buffer of \c 16 Bytes.
+ * \param input The buffer holding the input data.
+ * It must be readable and of size \p length Bytes.
+ * \param output The buffer holding the output data.
+ * It must be writeable and of size \p length Bytes.
+ *
+ * \return \c 0 on success.
+ */
+int mbedtls_aes_crypt_cfb128( mbedtls_aes_context *ctx,
+ int mode,
+ size_t length,
+ size_t *iv_off,
+ unsigned char iv[16],
+ const unsigned char *input,
+ unsigned char *output );
+
+/**
+ * \brief This function performs an AES-CFB8 encryption or decryption
+ * operation.
+ *
+ * It performs the operation defined in the \p mode
+ * parameter (encrypt/decrypt), on the input data buffer defined
+ * in the \p input parameter.
+ *
+ * Due to the nature of CFB, you must use the same key schedule for
+ * both encryption and decryption operations. Therefore, you must
+ * use the context initialized with mbedtls_aes_setkey_enc() for
+ * both #MBEDTLS_AES_ENCRYPT and #MBEDTLS_AES_DECRYPT.
+ *
+ * \note Upon exit, the content of the IV is updated so that you can
+ * call the same function again on the next
+ * block(s) of data and get the same result as if it was
+ * encrypted in one call. This allows a "streaming" usage.
+ * If you need to retain the contents of the
+ * IV, you should either save it manually or use the cipher
+ * module instead.
+ *
+ *
+ * \param ctx The AES context to use for encryption or decryption.
+ * It must be initialized and bound to a key.
+ * \param mode The AES operation: #MBEDTLS_AES_ENCRYPT or
+ * #MBEDTLS_AES_DECRYPT
+ * \param length The length of the input data.
+ * \param iv The initialization vector (updated after use).
+ * It must be a readable and writeable buffer of \c 16 Bytes.
+ * \param input The buffer holding the input data.
+ * It must be readable and of size \p length Bytes.
+ * \param output The buffer holding the output data.
+ * It must be writeable and of size \p length Bytes.
+ *
+ * \return \c 0 on success.
+ */
+int mbedtls_aes_crypt_cfb8( mbedtls_aes_context *ctx,
+ int mode,
+ size_t length,
+ unsigned char iv[16],
+ const unsigned char *input,
+ unsigned char *output );
+#endif /*MBEDTLS_CIPHER_MODE_CFB */
+
+#if defined(MBEDTLS_CIPHER_MODE_OFB)
+/**
+ * \brief This function performs an AES-OFB (Output Feedback Mode)
+ * encryption or decryption operation.
+ *
+ * For OFB, you must set up the context with
+ * mbedtls_aes_setkey_enc(), regardless of whether you are
+ * performing an encryption or decryption operation. This is
+ * because OFB mode uses the same key schedule for encryption and
+ * decryption.
+ *
+ * The OFB operation is identical for encryption or decryption,
+ * therefore no operation mode needs to be specified.
+ *
+ * \note Upon exit, the content of iv, the Initialisation Vector, is
+ * updated so that you can call the same function again on the next
+ * block(s) of data and get the same result as if it was encrypted
+ * in one call. This allows a "streaming" usage, by initialising
+ * iv_off to 0 before the first call, and preserving its value
+ * between calls.
+ *
+ * For non-streaming use, the iv should be initialised on each call
+ * to a unique value, and iv_off set to 0 on each call.
+ *
+ * If you need to retain the contents of the initialisation vector,
+ * you must either save it manually or use the cipher module
+ * instead.
+ *
+ * \warning For the OFB mode, the initialisation vector must be unique
+ * every encryption operation. Reuse of an initialisation vector
+ * will compromise security.
+ *
+ * \param ctx The AES context to use for encryption or decryption.
+ * It must be initialized and bound to a key.
+ * \param length The length of the input data.
+ * \param iv_off The offset in IV (updated after use).
+ * It must point to a valid \c size_t.
+ * \param iv The initialization vector (updated after use).
+ * It must be a readable and writeable buffer of \c 16 Bytes.
+ * \param input The buffer holding the input data.
+ * It must be readable and of size \p length Bytes.
+ * \param output The buffer holding the output data.
+ * It must be writeable and of size \p length Bytes.
+ *
+ * \return \c 0 on success.
+ */
+int mbedtls_aes_crypt_ofb( mbedtls_aes_context *ctx,
+ size_t length,
+ size_t *iv_off,
+ unsigned char iv[16],
+ const unsigned char *input,
+ unsigned char *output );
+
+#endif /* MBEDTLS_CIPHER_MODE_OFB */
+
+#if defined(MBEDTLS_CIPHER_MODE_CTR)
+/**
+ * \brief This function performs an AES-CTR encryption or decryption
+ * operation.
+ *
+ * This function performs the operation defined in the \p mode
+ * parameter (encrypt/decrypt), on the input data buffer
+ * defined in the \p input parameter.
+ *
+ * Due to the nature of CTR, you must use the same key schedule
+ * for both encryption and decryption operations. Therefore, you
+ * must use the context initialized with mbedtls_aes_setkey_enc()
+ * for both #MBEDTLS_AES_ENCRYPT and #MBEDTLS_AES_DECRYPT.
+ *
+ * \warning You must never reuse a nonce value with the same key. Doing so
+ * would void the encryption for the two messages encrypted with
+ * the same nonce and key.
+ *
+ * There are two common strategies for managing nonces with CTR:
+ *
+ * 1. You can handle everything as a single message processed over
+ * successive calls to this function. In that case, you want to
+ * set \p nonce_counter and \p nc_off to 0 for the first call, and
+ * then preserve the values of \p nonce_counter, \p nc_off and \p
+ * stream_block across calls to this function as they will be
+ * updated by this function.
+ *
+ * With this strategy, you must not encrypt more than 2**128
+ * blocks of data with the same key.
+ *
+ * 2. You can encrypt separate messages by dividing the \p
+ * nonce_counter buffer in two areas: the first one used for a
+ * per-message nonce, handled by yourself, and the second one
+ * updated by this function internally.
+ *
+ * For example, you might reserve the first 12 bytes for the
+ * per-message nonce, and the last 4 bytes for internal use. In that
+ * case, before calling this function on a new message you need to
+ * set the first 12 bytes of \p nonce_counter to your chosen nonce
+ * value, the last 4 to 0, and \p nc_off to 0 (which will cause \p
+ * stream_block to be ignored). That way, you can encrypt at most
+ * 2**96 messages of up to 2**32 blocks each with the same key.
+ *
+ * The per-message nonce (or information sufficient to reconstruct
+ * it) needs to be communicated with the ciphertext and must be unique.
+ * The recommended way to ensure uniqueness is to use a message
+ * counter. An alternative is to generate random nonces, but this
+ * limits the number of messages that can be securely encrypted:
+ * for example, with 96-bit random nonces, you should not encrypt
+ * more than 2**32 messages with the same key.
+ *
+ * Note that for both stategies, sizes are measured in blocks and
+ * that an AES block is 16 bytes.
+ *
+ * \warning Upon return, \p stream_block contains sensitive data. Its
+ * content must not be written to insecure storage and should be
+ * securely discarded as soon as it's no longer needed.
+ *
+ * \param ctx The AES context to use for encryption or decryption.
+ * It must be initialized and bound to a key.
+ * \param length The length of the input data.
+ * \param nc_off The offset in the current \p stream_block, for
+ * resuming within the current cipher stream. The
+ * offset pointer should be 0 at the start of a stream.
+ * It must point to a valid \c size_t.
+ * \param nonce_counter The 128-bit nonce and counter.
+ * It must be a readable-writeable buffer of \c 16 Bytes.
+ * \param stream_block The saved stream block for resuming. This is
+ * overwritten by the function.
+ * It must be a readable-writeable buffer of \c 16 Bytes.
+ * \param input The buffer holding the input data.
+ * It must be readable and of size \p length Bytes.
+ * \param output The buffer holding the output data.
+ * It must be writeable and of size \p length Bytes.
+ *
+ * \return \c 0 on success.
+ */
+int mbedtls_aes_crypt_ctr( mbedtls_aes_context *ctx,
+ size_t length,
+ size_t *nc_off,
+ unsigned char nonce_counter[16],
+ unsigned char stream_block[16],
+ const unsigned char *input,
+ unsigned char *output );
+#endif /* MBEDTLS_CIPHER_MODE_CTR */
+
+/**
+ * \brief Internal AES block encryption function. This is only
+ * exposed to allow overriding it using
+ * \c MBEDTLS_AES_ENCRYPT_ALT.
+ *
+ * \param ctx The AES context to use for encryption.
+ * \param input The plaintext block.
+ * \param output The output (ciphertext) block.
+ *
+ * \return \c 0 on success.
+ */
+int mbedtls_internal_aes_encrypt( mbedtls_aes_context *ctx,
+ const unsigned char input[16],
+ unsigned char output[16] );
+
+/**
+ * \brief Internal AES block decryption function. This is only
+ * exposed to allow overriding it using see
+ * \c MBEDTLS_AES_DECRYPT_ALT.
+ *
+ * \param ctx The AES context to use for decryption.
+ * \param input The ciphertext block.
+ * \param output The output (plaintext) block.
+ *
+ * \return \c 0 on success.
+ */
+int mbedtls_internal_aes_decrypt( mbedtls_aes_context *ctx,
+ const unsigned char input[16],
+ unsigned char output[16] );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief Deprecated internal AES block encryption function
+ * without return value.
+ *
+ * \deprecated Superseded by mbedtls_internal_aes_encrypt()
+ *
+ * \param ctx The AES context to use for encryption.
+ * \param input Plaintext block.
+ * \param output Output (ciphertext) block.
+ */
+MBEDTLS_DEPRECATED void mbedtls_aes_encrypt( mbedtls_aes_context *ctx,
+ const unsigned char input[16],
+ unsigned char output[16] );
+
+/**
+ * \brief Deprecated internal AES block decryption function
+ * without return value.
+ *
+ * \deprecated Superseded by mbedtls_internal_aes_decrypt()
+ *
+ * \param ctx The AES context to use for decryption.
+ * \param input Ciphertext block.
+ * \param output Output (plaintext) block.
+ */
+MBEDTLS_DEPRECATED void mbedtls_aes_decrypt( mbedtls_aes_context *ctx,
+ const unsigned char input[16],
+ unsigned char output[16] );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+
+#if defined(MBEDTLS_SELF_TEST)
+/**
+ * \brief Checkup routine.
+ *
+ * \return \c 0 on success.
+ * \return \c 1 on failure.
+ */
+int mbedtls_aes_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* aes.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/aes_alt.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/aes_alt.h
new file mode 100644
index 0000000..fd6f5da
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/aes_alt.h
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2019 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-BSD-5-Clause-Nordic
+ */
+
+/**@file
+ * @addtogroup mbedtls_glue_aes
+ * @{
+ */
+#ifndef MBEDTLS_AES_ALT_H
+#define MBEDTLS_AES_ALT_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "../config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#define CC310_MBEDTLS_AES_CONTEXT_WORDS (24) //!< AES context size in words in nrf_cc310_mbedcrypto library.
+#define VANILLA_MBEDTLS_AES_CONTEXT_WORDS (70) //!< AES context size in words in standard mbed TLS.
+#define VANILLA_MBEDTLS_AES_XTS_CONTEXT_WORDS (140) //!< AES XTS context size in words in standard mbed TLS.
+
+#if defined(MBEDTLS_AES_ALT)
+
+#include <stdint.h>
+
+
+/** @brief Typedef of mbedcrypto AES glue context.
+ */
+typedef struct mbedtls_aes_context
+{
+ union
+ {
+#if defined(CONFIG_CC310_MBEDTLS_AES_C)
+ uint32_t buffer_cc310[CC310_MBEDTLS_AES_CONTEXT_WORDS]; //!< Array the size of an AES context in the nrf_cc310_mbedcrypto library.
+#endif /* CONFIG_CC310_MBEDTLS_AES_C */
+#if defined(CONFIG_VANILLA_MBEDTLS_AES_C)
+ uint32_t buffer_vanilla_mbedtls[VANILLA_MBEDTLS_AES_CONTEXT_WORDS]; //!< Array the size of an AES context in vanilla mbed TLS.
+#endif /* CONFIG_VANILLA_MBEDTLS_AES_C */
+ uint32_t dummy; //!< Dummy value in case no backend is enabled.
+ } buffer; //!< Union with size of the largest enabled backend context.
+ void* handle; //!< Pointer to the function table in an initialized glue context.
+} mbedtls_aes_context;
+
+
+/** @brief Typedef of mbedcrypto glue AES XTS context
+ */
+typedef struct mbedtls_aes_xts_context
+{
+ union
+ {
+#if defined(CONFIG_VANILLA_MBEDTLS_CIPHER_MODE_XTS)
+ uint32_t buffer_vanilla_mbedtls[VANILLA_MBEDTLS_AES_XTS_CONTEXT_WORDS]; //!< Array the size of the memory required for an AES XTS context in vanilla mbed TLS.
+#endif /* CONFIG_VANILLA_MBEDTLS_CIPHER_MODE_XTS */
+ uint32_t dummy; //!< Dummy value in case no backend is enabled.
+ } buffer; //!< Array with length equal to the size of the largest enabled backend.
+ void* handle; //!< Pointer to the function table in an initialized glue context.
+} mbedtls_aes_xts_context;
+
+#endif /* MBEDTLS_AES_ALT */
+
+#endif /* MBEDTLS_AES_ALT_H */
+
+/** @} */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/aesni.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/aesni.h
new file mode 100644
index 0000000..a4ca012
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/aesni.h
@@ -0,0 +1,138 @@
+/**
+ * \file aesni.h
+ *
+ * \brief AES-NI for hardware AES acceleration on some Intel processors
+ *
+ * \warning These functions are only for internal use by other library
+ * functions; you must not call them directly.
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_AESNI_H
+#define MBEDTLS_AESNI_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "aes.h"
+
+#define MBEDTLS_AESNI_AES 0x02000000u
+#define MBEDTLS_AESNI_CLMUL 0x00000002u
+
+#if defined(MBEDTLS_HAVE_ASM) && defined(__GNUC__) && \
+ ( defined(__amd64__) || defined(__x86_64__) ) && \
+ ! defined(MBEDTLS_HAVE_X86_64)
+#define MBEDTLS_HAVE_X86_64
+#endif
+
+#if defined(MBEDTLS_HAVE_X86_64)
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief Internal function to detect the AES-NI feature in CPUs.
+ *
+ * \note This function is only for internal use by other library
+ * functions; you must not call it directly.
+ *
+ * \param what The feature to detect
+ * (MBEDTLS_AESNI_AES or MBEDTLS_AESNI_CLMUL)
+ *
+ * \return 1 if CPU has support for the feature, 0 otherwise
+ */
+int mbedtls_aesni_has_support( unsigned int what );
+
+/**
+ * \brief Internal AES-NI AES-ECB block encryption and decryption
+ *
+ * \note This function is only for internal use by other library
+ * functions; you must not call it directly.
+ *
+ * \param ctx AES context
+ * \param mode MBEDTLS_AES_ENCRYPT or MBEDTLS_AES_DECRYPT
+ * \param input 16-byte input block
+ * \param output 16-byte output block
+ *
+ * \return 0 on success (cannot fail)
+ */
+int mbedtls_aesni_crypt_ecb( mbedtls_aes_context *ctx,
+ int mode,
+ const unsigned char input[16],
+ unsigned char output[16] );
+
+/**
+ * \brief Internal GCM multiplication: c = a * b in GF(2^128)
+ *
+ * \note This function is only for internal use by other library
+ * functions; you must not call it directly.
+ *
+ * \param c Result
+ * \param a First operand
+ * \param b Second operand
+ *
+ * \note Both operands and result are bit strings interpreted as
+ * elements of GF(2^128) as per the GCM spec.
+ */
+void mbedtls_aesni_gcm_mult( unsigned char c[16],
+ const unsigned char a[16],
+ const unsigned char b[16] );
+
+/**
+ * \brief Internal round key inversion. This function computes
+ * decryption round keys from the encryption round keys.
+ *
+ * \note This function is only for internal use by other library
+ * functions; you must not call it directly.
+ *
+ * \param invkey Round keys for the equivalent inverse cipher
+ * \param fwdkey Original round keys (for encryption)
+ * \param nr Number of rounds (that is, number of round keys minus one)
+ */
+void mbedtls_aesni_inverse_key( unsigned char *invkey,
+ const unsigned char *fwdkey,
+ int nr );
+
+/**
+ * \brief Internal key expansion for encryption
+ *
+ * \note This function is only for internal use by other library
+ * functions; you must not call it directly.
+ *
+ * \param rk Destination buffer where the round keys are written
+ * \param key Encryption key
+ * \param bits Key size in bits (must be 128, 192 or 256)
+ *
+ * \return 0 if successful, or MBEDTLS_ERR_AES_INVALID_KEY_LENGTH
+ */
+int mbedtls_aesni_setkey_enc( unsigned char *rk,
+ const unsigned char *key,
+ size_t bits );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_HAVE_X86_64 */
+
+#endif /* MBEDTLS_AESNI_H */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/arc4.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/arc4.h
new file mode 100644
index 0000000..fb044d5
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/arc4.h
@@ -0,0 +1,146 @@
+/**
+ * \file arc4.h
+ *
+ * \brief The ARCFOUR stream cipher
+ *
+ * \warning ARC4 is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers instead.
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ *
+ */
+#ifndef MBEDTLS_ARC4_H
+#define MBEDTLS_ARC4_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+
+/* MBEDTLS_ERR_ARC4_HW_ACCEL_FAILED is deprecated and should not be used. */
+#define MBEDTLS_ERR_ARC4_HW_ACCEL_FAILED -0x0019 /**< ARC4 hardware accelerator failed. */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_ARC4_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief ARC4 context structure
+ *
+ * \warning ARC4 is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers instead.
+ *
+ */
+typedef struct mbedtls_arc4_context
+{
+ int x; /*!< permutation index */
+ int y; /*!< permutation index */
+ unsigned char m[256]; /*!< permutation table */
+}
+mbedtls_arc4_context;
+
+#else /* MBEDTLS_ARC4_ALT */
+#include "arc4_alt.h"
+#endif /* MBEDTLS_ARC4_ALT */
+
+/**
+ * \brief Initialize ARC4 context
+ *
+ * \param ctx ARC4 context to be initialized
+ *
+ * \warning ARC4 is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers
+ * instead.
+ *
+ */
+void mbedtls_arc4_init( mbedtls_arc4_context *ctx );
+
+/**
+ * \brief Clear ARC4 context
+ *
+ * \param ctx ARC4 context to be cleared
+ *
+ * \warning ARC4 is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers
+ * instead.
+ *
+ */
+void mbedtls_arc4_free( mbedtls_arc4_context *ctx );
+
+/**
+ * \brief ARC4 key schedule
+ *
+ * \param ctx ARC4 context to be setup
+ * \param key the secret key
+ * \param keylen length of the key, in bytes
+ *
+ * \warning ARC4 is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers
+ * instead.
+ *
+ */
+void mbedtls_arc4_setup( mbedtls_arc4_context *ctx, const unsigned char *key,
+ unsigned int keylen );
+
+/**
+ * \brief ARC4 cipher function
+ *
+ * \param ctx ARC4 context
+ * \param length length of the input data
+ * \param input buffer holding the input data
+ * \param output buffer for the output data
+ *
+ * \return 0 if successful
+ *
+ * \warning ARC4 is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers
+ * instead.
+ *
+ */
+int mbedtls_arc4_crypt( mbedtls_arc4_context *ctx, size_t length, const unsigned char *input,
+ unsigned char *output );
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief Checkup routine
+ *
+ * \return 0 if successful, or 1 if the test failed
+ *
+ * \warning ARC4 is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers
+ * instead.
+ *
+ */
+int mbedtls_arc4_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* arc4.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/aria.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/aria.h
new file mode 100644
index 0000000..1e8956e
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/aria.h
@@ -0,0 +1,370 @@
+/**
+ * \file aria.h
+ *
+ * \brief ARIA block cipher
+ *
+ * The ARIA algorithm is a symmetric block cipher that can encrypt and
+ * decrypt information. It is defined by the Korean Agency for
+ * Technology and Standards (KATS) in <em>KS X 1213:2004</em> (in
+ * Korean, but see http://210.104.33.10/ARIA/index-e.html in English)
+ * and also described by the IETF in <em>RFC 5794</em>.
+ */
+/* Copyright (C) 2006-2018, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+
+#ifndef MBEDTLS_ARIA_H
+#define MBEDTLS_ARIA_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+
+#include "platform_util.h"
+
+#define MBEDTLS_ARIA_ENCRYPT 1 /**< ARIA encryption. */
+#define MBEDTLS_ARIA_DECRYPT 0 /**< ARIA decryption. */
+
+#define MBEDTLS_ARIA_BLOCKSIZE 16 /**< ARIA block size in bytes. */
+#define MBEDTLS_ARIA_MAX_ROUNDS 16 /**< Maxiumum number of rounds in ARIA. */
+#define MBEDTLS_ARIA_MAX_KEYSIZE 32 /**< Maximum size of an ARIA key in bytes. */
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#define MBEDTLS_ERR_ARIA_INVALID_KEY_LENGTH MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( -0x005C )
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+#define MBEDTLS_ERR_ARIA_BAD_INPUT_DATA -0x005C /**< Bad input data. */
+
+#define MBEDTLS_ERR_ARIA_INVALID_INPUT_LENGTH -0x005E /**< Invalid data input length. */
+
+/* MBEDTLS_ERR_ARIA_FEATURE_UNAVAILABLE is deprecated and should not be used.
+ */
+#define MBEDTLS_ERR_ARIA_FEATURE_UNAVAILABLE -0x005A /**< Feature not available. For example, an unsupported ARIA key size. */
+
+/* MBEDTLS_ERR_ARIA_HW_ACCEL_FAILED is deprecated and should not be used. */
+#define MBEDTLS_ERR_ARIA_HW_ACCEL_FAILED -0x0058 /**< ARIA hardware accelerator failed. */
+
+#if !defined(MBEDTLS_ARIA_ALT)
+// Regular implementation
+//
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief The ARIA context-type definition.
+ */
+typedef struct mbedtls_aria_context
+{
+ unsigned char nr; /*!< The number of rounds (12, 14 or 16) */
+ /*! The ARIA round keys. */
+ uint32_t rk[MBEDTLS_ARIA_MAX_ROUNDS + 1][MBEDTLS_ARIA_BLOCKSIZE / 4];
+}
+mbedtls_aria_context;
+
+#else /* MBEDTLS_ARIA_ALT */
+#include "aria_alt.h"
+#endif /* MBEDTLS_ARIA_ALT */
+
+/**
+ * \brief This function initializes the specified ARIA context.
+ *
+ * It must be the first API called before using
+ * the context.
+ *
+ * \param ctx The ARIA context to initialize. This must not be \c NULL.
+ */
+void mbedtls_aria_init( mbedtls_aria_context *ctx );
+
+/**
+ * \brief This function releases and clears the specified ARIA context.
+ *
+ * \param ctx The ARIA context to clear. This may be \c NULL, in which
+ * case this function returns immediately. If it is not \c NULL,
+ * it must point to an initialized ARIA context.
+ */
+void mbedtls_aria_free( mbedtls_aria_context *ctx );
+
+/**
+ * \brief This function sets the encryption key.
+ *
+ * \param ctx The ARIA context to which the key should be bound.
+ * This must be initialized.
+ * \param key The encryption key. This must be a readable buffer
+ * of size \p keybits Bits.
+ * \param keybits The size of \p key in Bits. Valid options are:
+ * <ul><li>128 bits</li>
+ * <li>192 bits</li>
+ * <li>256 bits</li></ul>
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_aria_setkey_enc( mbedtls_aria_context *ctx,
+ const unsigned char *key,
+ unsigned int keybits );
+
+/**
+ * \brief This function sets the decryption key.
+ *
+ * \param ctx The ARIA context to which the key should be bound.
+ * This must be initialized.
+ * \param key The decryption key. This must be a readable buffer
+ * of size \p keybits Bits.
+ * \param keybits The size of data passed. Valid options are:
+ * <ul><li>128 bits</li>
+ * <li>192 bits</li>
+ * <li>256 bits</li></ul>
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_aria_setkey_dec( mbedtls_aria_context *ctx,
+ const unsigned char *key,
+ unsigned int keybits );
+
+/**
+ * \brief This function performs an ARIA single-block encryption or
+ * decryption operation.
+ *
+ * It performs encryption or decryption (depending on whether
+ * the key was set for encryption on decryption) on the input
+ * data buffer defined in the \p input parameter.
+ *
+ * mbedtls_aria_init(), and either mbedtls_aria_setkey_enc() or
+ * mbedtls_aria_setkey_dec() must be called before the first
+ * call to this API with the same context.
+ *
+ * \param ctx The ARIA context to use for encryption or decryption.
+ * This must be initialized and bound to a key.
+ * \param input The 16-Byte buffer holding the input data.
+ * \param output The 16-Byte buffer holding the output data.
+
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_aria_crypt_ecb( mbedtls_aria_context *ctx,
+ const unsigned char input[MBEDTLS_ARIA_BLOCKSIZE],
+ unsigned char output[MBEDTLS_ARIA_BLOCKSIZE] );
+
+#if defined(MBEDTLS_CIPHER_MODE_CBC)
+/**
+ * \brief This function performs an ARIA-CBC encryption or decryption operation
+ * on full blocks.
+ *
+ * It performs the operation defined in the \p mode
+ * parameter (encrypt/decrypt), on the input data buffer defined in
+ * the \p input parameter.
+ *
+ * It can be called as many times as needed, until all the input
+ * data is processed. mbedtls_aria_init(), and either
+ * mbedtls_aria_setkey_enc() or mbedtls_aria_setkey_dec() must be called
+ * before the first call to this API with the same context.
+ *
+ * \note This function operates on aligned blocks, that is, the input size
+ * must be a multiple of the ARIA block size of 16 Bytes.
+ *
+ * \note Upon exit, the content of the IV is updated so that you can
+ * call the same function again on the next
+ * block(s) of data and get the same result as if it was
+ * encrypted in one call. This allows a "streaming" usage.
+ * If you need to retain the contents of the IV, you should
+ * either save it manually or use the cipher module instead.
+ *
+ *
+ * \param ctx The ARIA context to use for encryption or decryption.
+ * This must be initialized and bound to a key.
+ * \param mode The mode of operation. This must be either
+ * #MBEDTLS_ARIA_ENCRYPT for encryption, or
+ * #MBEDTLS_ARIA_DECRYPT for decryption.
+ * \param length The length of the input data in Bytes. This must be a
+ * multiple of the block size (16 Bytes).
+ * \param iv Initialization vector (updated after use).
+ * This must be a readable buffer of size 16 Bytes.
+ * \param input The buffer holding the input data. This must
+ * be a readable buffer of length \p length Bytes.
+ * \param output The buffer holding the output data. This must
+ * be a writable buffer of length \p length Bytes.
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_aria_crypt_cbc( mbedtls_aria_context *ctx,
+ int mode,
+ size_t length,
+ unsigned char iv[MBEDTLS_ARIA_BLOCKSIZE],
+ const unsigned char *input,
+ unsigned char *output );
+#endif /* MBEDTLS_CIPHER_MODE_CBC */
+
+#if defined(MBEDTLS_CIPHER_MODE_CFB)
+/**
+ * \brief This function performs an ARIA-CFB128 encryption or decryption
+ * operation.
+ *
+ * It performs the operation defined in the \p mode
+ * parameter (encrypt or decrypt), on the input data buffer
+ * defined in the \p input parameter.
+ *
+ * For CFB, you must set up the context with mbedtls_aria_setkey_enc(),
+ * regardless of whether you are performing an encryption or decryption
+ * operation, that is, regardless of the \p mode parameter. This is
+ * because CFB mode uses the same key schedule for encryption and
+ * decryption.
+ *
+ * \note Upon exit, the content of the IV is updated so that you can
+ * call the same function again on the next
+ * block(s) of data and get the same result as if it was
+ * encrypted in one call. This allows a "streaming" usage.
+ * If you need to retain the contents of the
+ * IV, you must either save it manually or use the cipher
+ * module instead.
+ *
+ *
+ * \param ctx The ARIA context to use for encryption or decryption.
+ * This must be initialized and bound to a key.
+ * \param mode The mode of operation. This must be either
+ * #MBEDTLS_ARIA_ENCRYPT for encryption, or
+ * #MBEDTLS_ARIA_DECRYPT for decryption.
+ * \param length The length of the input data \p input in Bytes.
+ * \param iv_off The offset in IV (updated after use).
+ * This must not be larger than 15.
+ * \param iv The initialization vector (updated after use).
+ * This must be a readable buffer of size 16 Bytes.
+ * \param input The buffer holding the input data. This must
+ * be a readable buffer of length \p length Bytes.
+ * \param output The buffer holding the output data. This must
+ * be a writable buffer of length \p length Bytes.
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_aria_crypt_cfb128( mbedtls_aria_context *ctx,
+ int mode,
+ size_t length,
+ size_t *iv_off,
+ unsigned char iv[MBEDTLS_ARIA_BLOCKSIZE],
+ const unsigned char *input,
+ unsigned char *output );
+#endif /* MBEDTLS_CIPHER_MODE_CFB */
+
+#if defined(MBEDTLS_CIPHER_MODE_CTR)
+/**
+ * \brief This function performs an ARIA-CTR encryption or decryption
+ * operation.
+ *
+ * This function performs the operation defined in the \p mode
+ * parameter (encrypt/decrypt), on the input data buffer
+ * defined in the \p input parameter.
+ *
+ * Due to the nature of CTR, you must use the same key schedule
+ * for both encryption and decryption operations. Therefore, you
+ * must use the context initialized with mbedtls_aria_setkey_enc()
+ * for both #MBEDTLS_ARIA_ENCRYPT and #MBEDTLS_ARIA_DECRYPT.
+ *
+ * \warning You must never reuse a nonce value with the same key. Doing so
+ * would void the encryption for the two messages encrypted with
+ * the same nonce and key.
+ *
+ * There are two common strategies for managing nonces with CTR:
+ *
+ * 1. You can handle everything as a single message processed over
+ * successive calls to this function. In that case, you want to
+ * set \p nonce_counter and \p nc_off to 0 for the first call, and
+ * then preserve the values of \p nonce_counter, \p nc_off and \p
+ * stream_block across calls to this function as they will be
+ * updated by this function.
+ *
+ * With this strategy, you must not encrypt more than 2**128
+ * blocks of data with the same key.
+ *
+ * 2. You can encrypt separate messages by dividing the \p
+ * nonce_counter buffer in two areas: the first one used for a
+ * per-message nonce, handled by yourself, and the second one
+ * updated by this function internally.
+ *
+ * For example, you might reserve the first 12 bytes for the
+ * per-message nonce, and the last 4 bytes for internal use. In that
+ * case, before calling this function on a new message you need to
+ * set the first 12 bytes of \p nonce_counter to your chosen nonce
+ * value, the last 4 to 0, and \p nc_off to 0 (which will cause \p
+ * stream_block to be ignored). That way, you can encrypt at most
+ * 2**96 messages of up to 2**32 blocks each with the same key.
+ *
+ * The per-message nonce (or information sufficient to reconstruct
+ * it) needs to be communicated with the ciphertext and must be unique.
+ * The recommended way to ensure uniqueness is to use a message
+ * counter. An alternative is to generate random nonces, but this
+ * limits the number of messages that can be securely encrypted:
+ * for example, with 96-bit random nonces, you should not encrypt
+ * more than 2**32 messages with the same key.
+ *
+ * Note that for both stategies, sizes are measured in blocks and
+ * that an ARIA block is 16 bytes.
+ *
+ * \warning Upon return, \p stream_block contains sensitive data. Its
+ * content must not be written to insecure storage and should be
+ * securely discarded as soon as it's no longer needed.
+ *
+ * \param ctx The ARIA context to use for encryption or decryption.
+ * This must be initialized and bound to a key.
+ * \param length The length of the input data \p input in Bytes.
+ * \param nc_off The offset in Bytes in the current \p stream_block,
+ * for resuming within the current cipher stream. The
+ * offset pointer should be \c 0 at the start of a
+ * stream. This must not be larger than \c 15 Bytes.
+ * \param nonce_counter The 128-bit nonce and counter. This must point to
+ * a read/write buffer of length \c 16 bytes.
+ * \param stream_block The saved stream block for resuming. This must
+ * point to a read/write buffer of length \c 16 bytes.
+ * This is overwritten by the function.
+ * \param input The buffer holding the input data. This must
+ * be a readable buffer of length \p length Bytes.
+ * \param output The buffer holding the output data. This must
+ * be a writable buffer of length \p length Bytes.
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_aria_crypt_ctr( mbedtls_aria_context *ctx,
+ size_t length,
+ size_t *nc_off,
+ unsigned char nonce_counter[MBEDTLS_ARIA_BLOCKSIZE],
+ unsigned char stream_block[MBEDTLS_ARIA_BLOCKSIZE],
+ const unsigned char *input,
+ unsigned char *output );
+#endif /* MBEDTLS_CIPHER_MODE_CTR */
+
+#if defined(MBEDTLS_SELF_TEST)
+/**
+ * \brief Checkup routine.
+ *
+ * \return \c 0 on success, or \c 1 on failure.
+ */
+int mbedtls_aria_self_test( int verbose );
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* aria.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/asn1.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/asn1.h
new file mode 100644
index 0000000..96c1c9a
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/asn1.h
@@ -0,0 +1,358 @@
+/**
+ * \file asn1.h
+ *
+ * \brief Generic ASN.1 parsing
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_ASN1_H
+#define MBEDTLS_ASN1_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+
+#if defined(MBEDTLS_BIGNUM_C)
+#include "bignum.h"
+#endif
+
+/**
+ * \addtogroup asn1_module
+ * \{
+ */
+
+/**
+ * \name ASN1 Error codes
+ * These error codes are OR'ed to X509 error codes for
+ * higher error granularity.
+ * ASN1 is a standard to specify data structures.
+ * \{
+ */
+#define MBEDTLS_ERR_ASN1_OUT_OF_DATA -0x0060 /**< Out of data when parsing an ASN1 data structure. */
+#define MBEDTLS_ERR_ASN1_UNEXPECTED_TAG -0x0062 /**< ASN1 tag was of an unexpected value. */
+#define MBEDTLS_ERR_ASN1_INVALID_LENGTH -0x0064 /**< Error when trying to determine the length or invalid length. */
+#define MBEDTLS_ERR_ASN1_LENGTH_MISMATCH -0x0066 /**< Actual length differs from expected length. */
+#define MBEDTLS_ERR_ASN1_INVALID_DATA -0x0068 /**< Data is invalid. (not used) */
+#define MBEDTLS_ERR_ASN1_ALLOC_FAILED -0x006A /**< Memory allocation failed */
+#define MBEDTLS_ERR_ASN1_BUF_TOO_SMALL -0x006C /**< Buffer too small when writing ASN.1 data structure. */
+
+/* \} name */
+
+/**
+ * \name DER constants
+ * These constants comply with the DER encoded ASN.1 type tags.
+ * DER encoding uses hexadecimal representation.
+ * An example DER sequence is:\n
+ * - 0x02 -- tag indicating INTEGER
+ * - 0x01 -- length in octets
+ * - 0x05 -- value
+ * Such sequences are typically read into \c ::mbedtls_x509_buf.
+ * \{
+ */
+#define MBEDTLS_ASN1_BOOLEAN 0x01
+#define MBEDTLS_ASN1_INTEGER 0x02
+#define MBEDTLS_ASN1_BIT_STRING 0x03
+#define MBEDTLS_ASN1_OCTET_STRING 0x04
+#define MBEDTLS_ASN1_NULL 0x05
+#define MBEDTLS_ASN1_OID 0x06
+#define MBEDTLS_ASN1_UTF8_STRING 0x0C
+#define MBEDTLS_ASN1_SEQUENCE 0x10
+#define MBEDTLS_ASN1_SET 0x11
+#define MBEDTLS_ASN1_PRINTABLE_STRING 0x13
+#define MBEDTLS_ASN1_T61_STRING 0x14
+#define MBEDTLS_ASN1_IA5_STRING 0x16
+#define MBEDTLS_ASN1_UTC_TIME 0x17
+#define MBEDTLS_ASN1_GENERALIZED_TIME 0x18
+#define MBEDTLS_ASN1_UNIVERSAL_STRING 0x1C
+#define MBEDTLS_ASN1_BMP_STRING 0x1E
+#define MBEDTLS_ASN1_PRIMITIVE 0x00
+#define MBEDTLS_ASN1_CONSTRUCTED 0x20
+#define MBEDTLS_ASN1_CONTEXT_SPECIFIC 0x80
+
+/*
+ * Bit masks for each of the components of an ASN.1 tag as specified in
+ * ITU X.690 (08/2015), section 8.1 "General rules for encoding",
+ * paragraph 8.1.2.2:
+ *
+ * Bit 8 7 6 5 1
+ * +-------+-----+------------+
+ * | Class | P/C | Tag number |
+ * +-------+-----+------------+
+ */
+#define MBEDTLS_ASN1_TAG_CLASS_MASK 0xC0
+#define MBEDTLS_ASN1_TAG_PC_MASK 0x20
+#define MBEDTLS_ASN1_TAG_VALUE_MASK 0x1F
+
+/* \} name */
+/* \} addtogroup asn1_module */
+
+/** Returns the size of the binary string, without the trailing \\0 */
+#define MBEDTLS_OID_SIZE(x) (sizeof(x) - 1)
+
+/**
+ * Compares an mbedtls_asn1_buf structure to a reference OID.
+ *
+ * Only works for 'defined' oid_str values (MBEDTLS_OID_HMAC_SHA1), you cannot use a
+ * 'unsigned char *oid' here!
+ */
+#define MBEDTLS_OID_CMP(oid_str, oid_buf) \
+ ( ( MBEDTLS_OID_SIZE(oid_str) != (oid_buf)->len ) || \
+ memcmp( (oid_str), (oid_buf)->p, (oid_buf)->len) != 0 )
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \name Functions to parse ASN.1 data structures
+ * \{
+ */
+
+/**
+ * Type-length-value structure that allows for ASN1 using DER.
+ */
+typedef struct mbedtls_asn1_buf
+{
+ int tag; /**< ASN1 type, e.g. MBEDTLS_ASN1_UTF8_STRING. */
+ size_t len; /**< ASN1 length, in octets. */
+ unsigned char *p; /**< ASN1 data, e.g. in ASCII. */
+}
+mbedtls_asn1_buf;
+
+/**
+ * Container for ASN1 bit strings.
+ */
+typedef struct mbedtls_asn1_bitstring
+{
+ size_t len; /**< ASN1 length, in octets. */
+ unsigned char unused_bits; /**< Number of unused bits at the end of the string */
+ unsigned char *p; /**< Raw ASN1 data for the bit string */
+}
+mbedtls_asn1_bitstring;
+
+/**
+ * Container for a sequence of ASN.1 items
+ */
+typedef struct mbedtls_asn1_sequence
+{
+ mbedtls_asn1_buf buf; /**< Buffer containing the given ASN.1 item. */
+ struct mbedtls_asn1_sequence *next; /**< The next entry in the sequence. */
+}
+mbedtls_asn1_sequence;
+
+/**
+ * Container for a sequence or list of 'named' ASN.1 data items
+ */
+typedef struct mbedtls_asn1_named_data
+{
+ mbedtls_asn1_buf oid; /**< The object identifier. */
+ mbedtls_asn1_buf val; /**< The named value. */
+ struct mbedtls_asn1_named_data *next; /**< The next entry in the sequence. */
+ unsigned char next_merged; /**< Merge next item into the current one? */
+}
+mbedtls_asn1_named_data;
+
+/**
+ * \brief Get the length of an ASN.1 element.
+ * Updates the pointer to immediately behind the length.
+ *
+ * \param p The position in the ASN.1 data
+ * \param end End of data
+ * \param len The variable that will receive the value
+ *
+ * \return 0 if successful, MBEDTLS_ERR_ASN1_OUT_OF_DATA on reaching
+ * end of data, MBEDTLS_ERR_ASN1_INVALID_LENGTH if length is
+ * unparseable.
+ */
+int mbedtls_asn1_get_len( unsigned char **p,
+ const unsigned char *end,
+ size_t *len );
+
+/**
+ * \brief Get the tag and length of the tag. Check for the requested tag.
+ * Updates the pointer to immediately behind the tag and length.
+ *
+ * \param p The position in the ASN.1 data
+ * \param end End of data
+ * \param len The variable that will receive the length
+ * \param tag The expected tag
+ *
+ * \return 0 if successful, MBEDTLS_ERR_ASN1_UNEXPECTED_TAG if tag did
+ * not match requested tag, or another specific ASN.1 error code.
+ */
+int mbedtls_asn1_get_tag( unsigned char **p,
+ const unsigned char *end,
+ size_t *len, int tag );
+
+/**
+ * \brief Retrieve a boolean ASN.1 tag and its value.
+ * Updates the pointer to immediately behind the full tag.
+ *
+ * \param p The position in the ASN.1 data
+ * \param end End of data
+ * \param val The variable that will receive the value
+ *
+ * \return 0 if successful or a specific ASN.1 error code.
+ */
+int mbedtls_asn1_get_bool( unsigned char **p,
+ const unsigned char *end,
+ int *val );
+
+/**
+ * \brief Retrieve an integer ASN.1 tag and its value.
+ * Updates the pointer to immediately behind the full tag.
+ *
+ * \param p The position in the ASN.1 data
+ * \param end End of data
+ * \param val The variable that will receive the value
+ *
+ * \return 0 if successful or a specific ASN.1 error code.
+ */
+int mbedtls_asn1_get_int( unsigned char **p,
+ const unsigned char *end,
+ int *val );
+
+/**
+ * \brief Retrieve a bitstring ASN.1 tag and its value.
+ * Updates the pointer to immediately behind the full tag.
+ *
+ * \param p The position in the ASN.1 data
+ * \param end End of data
+ * \param bs The variable that will receive the value
+ *
+ * \return 0 if successful or a specific ASN.1 error code.
+ */
+int mbedtls_asn1_get_bitstring( unsigned char **p, const unsigned char *end,
+ mbedtls_asn1_bitstring *bs);
+
+/**
+ * \brief Retrieve a bitstring ASN.1 tag without unused bits and its
+ * value.
+ * Updates the pointer to the beginning of the bit/octet string.
+ *
+ * \param p The position in the ASN.1 data
+ * \param end End of data
+ * \param len Length of the actual bit/octect string in bytes
+ *
+ * \return 0 if successful or a specific ASN.1 error code.
+ */
+int mbedtls_asn1_get_bitstring_null( unsigned char **p, const unsigned char *end,
+ size_t *len );
+
+/**
+ * \brief Parses and splits an ASN.1 "SEQUENCE OF <tag>"
+ * Updated the pointer to immediately behind the full sequence tag.
+ *
+ * \param p The position in the ASN.1 data
+ * \param end End of data
+ * \param cur First variable in the chain to fill
+ * \param tag Type of sequence
+ *
+ * \return 0 if successful or a specific ASN.1 error code.
+ */
+int mbedtls_asn1_get_sequence_of( unsigned char **p,
+ const unsigned char *end,
+ mbedtls_asn1_sequence *cur,
+ int tag);
+
+#if defined(MBEDTLS_BIGNUM_C)
+/**
+ * \brief Retrieve a MPI value from an integer ASN.1 tag.
+ * Updates the pointer to immediately behind the full tag.
+ *
+ * \param p The position in the ASN.1 data
+ * \param end End of data
+ * \param X The MPI that will receive the value
+ *
+ * \return 0 if successful or a specific ASN.1 or MPI error code.
+ */
+int mbedtls_asn1_get_mpi( unsigned char **p,
+ const unsigned char *end,
+ mbedtls_mpi *X );
+#endif /* MBEDTLS_BIGNUM_C */
+
+/**
+ * \brief Retrieve an AlgorithmIdentifier ASN.1 sequence.
+ * Updates the pointer to immediately behind the full
+ * AlgorithmIdentifier.
+ *
+ * \param p The position in the ASN.1 data
+ * \param end End of data
+ * \param alg The buffer to receive the OID
+ * \param params The buffer to receive the params (if any)
+ *
+ * \return 0 if successful or a specific ASN.1 or MPI error code.
+ */
+int mbedtls_asn1_get_alg( unsigned char **p,
+ const unsigned char *end,
+ mbedtls_asn1_buf *alg, mbedtls_asn1_buf *params );
+
+/**
+ * \brief Retrieve an AlgorithmIdentifier ASN.1 sequence with NULL or no
+ * params.
+ * Updates the pointer to immediately behind the full
+ * AlgorithmIdentifier.
+ *
+ * \param p The position in the ASN.1 data
+ * \param end End of data
+ * \param alg The buffer to receive the OID
+ *
+ * \return 0 if successful or a specific ASN.1 or MPI error code.
+ */
+int mbedtls_asn1_get_alg_null( unsigned char **p,
+ const unsigned char *end,
+ mbedtls_asn1_buf *alg );
+
+/**
+ * \brief Find a specific named_data entry in a sequence or list based on
+ * the OID.
+ *
+ * \param list The list to seek through
+ * \param oid The OID to look for
+ * \param len Size of the OID
+ *
+ * \return NULL if not found, or a pointer to the existing entry.
+ */
+mbedtls_asn1_named_data *mbedtls_asn1_find_named_data( mbedtls_asn1_named_data *list,
+ const char *oid, size_t len );
+
+/**
+ * \brief Free a mbedtls_asn1_named_data entry
+ *
+ * \param entry The named data entry to free
+ */
+void mbedtls_asn1_free_named_data( mbedtls_asn1_named_data *entry );
+
+/**
+ * \brief Free all entries in a mbedtls_asn1_named_data list
+ * Head will be set to NULL
+ *
+ * \param head Pointer to the head of the list of named data entries to free
+ */
+void mbedtls_asn1_free_named_data_list( mbedtls_asn1_named_data **head );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* asn1.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/asn1write.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/asn1write.h
new file mode 100644
index 0000000..a194243
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/asn1write.h
@@ -0,0 +1,329 @@
+/**
+ * \file asn1write.h
+ *
+ * \brief ASN.1 buffer writing functionality
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_ASN1_WRITE_H
+#define MBEDTLS_ASN1_WRITE_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "asn1.h"
+
+#define MBEDTLS_ASN1_CHK_ADD(g, f) \
+ do \
+ { \
+ if( ( ret = (f) ) < 0 ) \
+ return( ret ); \
+ else \
+ (g) += ret; \
+ } while( 0 )
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief Write a length field in ASN.1 format.
+ *
+ * \note This function works backwards in data buffer.
+ *
+ * \param p The reference to the current position pointer.
+ * \param start The start of the buffer, for bounds-checking.
+ * \param len The length value to write.
+ *
+ * \return The number of bytes written to \p p on success.
+ * \return A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_asn1_write_len( unsigned char **p, unsigned char *start,
+ size_t len );
+/**
+ * \brief Write an ASN.1 tag in ASN.1 format.
+ *
+ * \note This function works backwards in data buffer.
+ *
+ * \param p The reference to the current position pointer.
+ * \param start The start of the buffer, for bounds-checking.
+ * \param tag The tag to write.
+ *
+ * \return The number of bytes written to \p p on success.
+ * \return A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_asn1_write_tag( unsigned char **p, unsigned char *start,
+ unsigned char tag );
+
+/**
+ * \brief Write raw buffer data.
+ *
+ * \note This function works backwards in data buffer.
+ *
+ * \param p The reference to the current position pointer.
+ * \param start The start of the buffer, for bounds-checking.
+ * \param buf The data buffer to write.
+ * \param size The length of the data buffer.
+ *
+ * \return The number of bytes written to \p p on success.
+ * \return A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_asn1_write_raw_buffer( unsigned char **p, unsigned char *start,
+ const unsigned char *buf, size_t size );
+
+#if defined(MBEDTLS_BIGNUM_C)
+/**
+ * \brief Write a arbitrary-precision number (#MBEDTLS_ASN1_INTEGER)
+ * in ASN.1 format.
+ *
+ * \note This function works backwards in data buffer.
+ *
+ * \param p The reference to the current position pointer.
+ * \param start The start of the buffer, for bounds-checking.
+ * \param X The MPI to write.
+ *
+ * \return The number of bytes written to \p p on success.
+ * \return A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_asn1_write_mpi( unsigned char **p, unsigned char *start,
+ const mbedtls_mpi *X );
+#endif /* MBEDTLS_BIGNUM_C */
+
+/**
+ * \brief Write a NULL tag (#MBEDTLS_ASN1_NULL) with zero data
+ * in ASN.1 format.
+ *
+ * \note This function works backwards in data buffer.
+ *
+ * \param p The reference to the current position pointer.
+ * \param start The start of the buffer, for bounds-checking.
+ *
+ * \return The number of bytes written to \p p on success.
+ * \return A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_asn1_write_null( unsigned char **p, unsigned char *start );
+
+/**
+ * \brief Write an OID tag (#MBEDTLS_ASN1_OID) and data
+ * in ASN.1 format.
+ *
+ * \note This function works backwards in data buffer.
+ *
+ * \param p The reference to the current position pointer.
+ * \param start The start of the buffer, for bounds-checking.
+ * \param oid The OID to write.
+ * \param oid_len The length of the OID.
+ *
+ * \return The number of bytes written to \p p on success.
+ * \return A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_asn1_write_oid( unsigned char **p, unsigned char *start,
+ const char *oid, size_t oid_len );
+
+/**
+ * \brief Write an AlgorithmIdentifier sequence in ASN.1 format.
+ *
+ * \note This function works backwards in data buffer.
+ *
+ * \param p The reference to the current position pointer.
+ * \param start The start of the buffer, for bounds-checking.
+ * \param oid The OID of the algorithm to write.
+ * \param oid_len The length of the algorithm's OID.
+ * \param par_len The length of the parameters, which must be already written.
+ * If 0, NULL parameters are added
+ *
+ * \return The number of bytes written to \p p on success.
+ * \return A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_asn1_write_algorithm_identifier( unsigned char **p,
+ unsigned char *start,
+ const char *oid, size_t oid_len,
+ size_t par_len );
+
+/**
+ * \brief Write a boolean tag (#MBEDTLS_ASN1_BOOLEAN) and value
+ * in ASN.1 format.
+ *
+ * \note This function works backwards in data buffer.
+ *
+ * \param p The reference to the current position pointer.
+ * \param start The start of the buffer, for bounds-checking.
+ * \param boolean The boolean value to write, either \c 0 or \c 1.
+ *
+ * \return The number of bytes written to \p p on success.
+ * \return A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_asn1_write_bool( unsigned char **p, unsigned char *start,
+ int boolean );
+
+/**
+ * \brief Write an int tag (#MBEDTLS_ASN1_INTEGER) and value
+ * in ASN.1 format.
+ *
+ * \note This function works backwards in data buffer.
+ *
+ * \param p The reference to the current position pointer.
+ * \param start The start of the buffer, for bounds-checking.
+ * \param val The integer value to write.
+ *
+ * \return The number of bytes written to \p p on success.
+ * \return A negative \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_asn1_write_int( unsigned char **p, unsigned char *start, int val );
+
+/**
+ * \brief Write a string in ASN.1 format using a specific
+ * string encoding tag.
+
+ * \note This function works backwards in data buffer.
+ *
+ * \param p The reference to the current position pointer.
+ * \param start The start of the buffer, for bounds-checking.
+ * \param tag The string encoding tag to write, e.g.
+ * #MBEDTLS_ASN1_UTF8_STRING.
+ * \param text The string to write.
+ * \param text_len The length of \p text in bytes (which might
+ * be strictly larger than the number of characters).
+ *
+ * \return The number of bytes written to \p p on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_asn1_write_tagged_string( unsigned char **p, unsigned char *start,
+ int tag, const char *text,
+ size_t text_len );
+
+/**
+ * \brief Write a string in ASN.1 format using the PrintableString
+ * string encoding tag (#MBEDTLS_ASN1_PRINTABLE_STRING).
+ *
+ * \note This function works backwards in data buffer.
+ *
+ * \param p The reference to the current position pointer.
+ * \param start The start of the buffer, for bounds-checking.
+ * \param text The string to write.
+ * \param text_len The length of \p text in bytes (which might
+ * be strictly larger than the number of characters).
+ *
+ * \return The number of bytes written to \p p on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_asn1_write_printable_string( unsigned char **p,
+ unsigned char *start,
+ const char *text, size_t text_len );
+
+/**
+ * \brief Write a UTF8 string in ASN.1 format using the UTF8String
+ * string encoding tag (#MBEDTLS_ASN1_PRINTABLE_STRING).
+ *
+ * \note This function works backwards in data buffer.
+ *
+ * \param p The reference to the current position pointer.
+ * \param start The start of the buffer, for bounds-checking.
+ * \param text The string to write.
+ * \param text_len The length of \p text in bytes (which might
+ * be strictly larger than the number of characters).
+ *
+ * \return The number of bytes written to \p p on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_asn1_write_utf8_string( unsigned char **p, unsigned char *start,
+ const char *text, size_t text_len );
+
+/**
+ * \brief Write a string in ASN.1 format using the IA5String
+ * string encoding tag (#MBEDTLS_ASN1_IA5_STRING).
+ *
+ * \note This function works backwards in data buffer.
+ *
+ * \param p The reference to the current position pointer.
+ * \param start The start of the buffer, for bounds-checking.
+ * \param text The string to write.
+ * \param text_len The length of \p text in bytes (which might
+ * be strictly larger than the number of characters).
+ *
+ * \return The number of bytes written to \p p on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_asn1_write_ia5_string( unsigned char **p, unsigned char *start,
+ const char *text, size_t text_len );
+
+/**
+ * \brief Write a bitstring tag (#MBEDTLS_ASN1_BIT_STRING) and
+ * value in ASN.1 format.
+ *
+ * \note This function works backwards in data buffer.
+ *
+ * \param p The reference to the current position pointer.
+ * \param start The start of the buffer, for bounds-checking.
+ * \param buf The bitstring to write.
+ * \param bits The total number of bits in the bitstring.
+ *
+ * \return The number of bytes written to \p p on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_asn1_write_bitstring( unsigned char **p, unsigned char *start,
+ const unsigned char *buf, size_t bits );
+
+/**
+ * \brief Write an octet string tag (#MBEDTLS_ASN1_OCTET_STRING)
+ * and value in ASN.1 format.
+ *
+ * \note This function works backwards in data buffer.
+ *
+ * \param p The reference to the current position pointer.
+ * \param start The start of the buffer, for bounds-checking.
+ * \param buf The buffer holding the data to write.
+ * \param size The length of the data buffer \p buf.
+ *
+ * \return The number of bytes written to \p p on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_asn1_write_octet_string( unsigned char **p, unsigned char *start,
+ const unsigned char *buf, size_t size );
+
+/**
+ * \brief Create or find a specific named_data entry for writing in a
+ * sequence or list based on the OID. If not already in there,
+ * a new entry is added to the head of the list.
+ * Warning: Destructive behaviour for the val data!
+ *
+ * \param list The pointer to the location of the head of the list to seek
+ * through (will be updated in case of a new entry).
+ * \param oid The OID to look for.
+ * \param oid_len The size of the OID.
+ * \param val The data to store (can be \c NULL if you want to fill
+ * it by hand).
+ * \param val_len The minimum length of the data buffer needed.
+ *
+ * \return A pointer to the new / existing entry on success.
+ * \return \c NULL if if there was a memory allocation error.
+ */
+mbedtls_asn1_named_data *mbedtls_asn1_store_named_data( mbedtls_asn1_named_data **list,
+ const char *oid, size_t oid_len,
+ const unsigned char *val,
+ size_t val_len );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_ASN1_WRITE_H */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/base64.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/base64.h
new file mode 100644
index 0000000..0d02416
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/base64.h
@@ -0,0 +1,98 @@
+/**
+ * \file base64.h
+ *
+ * \brief RFC 1521 base64 encoding/decoding
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_BASE64_H
+#define MBEDTLS_BASE64_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+
+#define MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL -0x002A /**< Output buffer too small. */
+#define MBEDTLS_ERR_BASE64_INVALID_CHARACTER -0x002C /**< Invalid character in input. */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief Encode a buffer into base64 format
+ *
+ * \param dst destination buffer
+ * \param dlen size of the destination buffer
+ * \param olen number of bytes written
+ * \param src source buffer
+ * \param slen amount of data to be encoded
+ *
+ * \return 0 if successful, or MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL.
+ * *olen is always updated to reflect the amount
+ * of data that has (or would have) been written.
+ * If that length cannot be represented, then no data is
+ * written to the buffer and *olen is set to the maximum
+ * length representable as a size_t.
+ *
+ * \note Call this function with dlen = 0 to obtain the
+ * required buffer size in *olen
+ */
+int mbedtls_base64_encode( unsigned char *dst, size_t dlen, size_t *olen,
+ const unsigned char *src, size_t slen );
+
+/**
+ * \brief Decode a base64-formatted buffer
+ *
+ * \param dst destination buffer (can be NULL for checking size)
+ * \param dlen size of the destination buffer
+ * \param olen number of bytes written
+ * \param src source buffer
+ * \param slen amount of data to be decoded
+ *
+ * \return 0 if successful, MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL, or
+ * MBEDTLS_ERR_BASE64_INVALID_CHARACTER if the input data is
+ * not correct. *olen is always updated to reflect the amount
+ * of data that has (or would have) been written.
+ *
+ * \note Call this function with *dst = NULL or dlen = 0 to obtain
+ * the required buffer size in *olen
+ */
+int mbedtls_base64_decode( unsigned char *dst, size_t dlen, size_t *olen,
+ const unsigned char *src, size_t slen );
+
+#if defined(MBEDTLS_SELF_TEST)
+/**
+ * \brief Checkup routine
+ *
+ * \return 0 if successful, or 1 if the test failed
+ */
+int mbedtls_base64_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* base64.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/bignum.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/bignum.h
new file mode 100644
index 0000000..1c86072
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/bignum.h
@@ -0,0 +1,966 @@
+/**
+ * \file bignum.h
+ *
+ * \brief Multi-precision integer library
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_BIGNUM_H
+#define MBEDTLS_BIGNUM_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+
+#if defined(MBEDTLS_FS_IO)
+#include <stdio.h>
+#endif
+
+#define MBEDTLS_ERR_MPI_FILE_IO_ERROR -0x0002 /**< An error occurred while reading from or writing to a file. */
+#define MBEDTLS_ERR_MPI_BAD_INPUT_DATA -0x0004 /**< Bad input parameters to function. */
+#define MBEDTLS_ERR_MPI_INVALID_CHARACTER -0x0006 /**< There is an invalid character in the digit string. */
+#define MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL -0x0008 /**< The buffer is too small to write to. */
+#define MBEDTLS_ERR_MPI_NEGATIVE_VALUE -0x000A /**< The input arguments are negative or result in illegal output. */
+#define MBEDTLS_ERR_MPI_DIVISION_BY_ZERO -0x000C /**< The input argument for division is zero, which is not allowed. */
+#define MBEDTLS_ERR_MPI_NOT_ACCEPTABLE -0x000E /**< The input arguments are not acceptable. */
+#define MBEDTLS_ERR_MPI_ALLOC_FAILED -0x0010 /**< Memory allocation failed. */
+
+#define MBEDTLS_MPI_CHK(f) \
+ do \
+ { \
+ if( ( ret = (f) ) != 0 ) \
+ goto cleanup; \
+ } while( 0 )
+
+/*
+ * Maximum size MPIs are allowed to grow to in number of limbs.
+ */
+#define MBEDTLS_MPI_MAX_LIMBS 10000
+
+#if !defined(MBEDTLS_MPI_WINDOW_SIZE)
+/*
+ * Maximum window size used for modular exponentiation. Default: 6
+ * Minimum value: 1. Maximum value: 6.
+ *
+ * Result is an array of ( 2 << MBEDTLS_MPI_WINDOW_SIZE ) MPIs used
+ * for the sliding window calculation. (So 64 by default)
+ *
+ * Reduction in size, reduces speed.
+ */
+#define MBEDTLS_MPI_WINDOW_SIZE 6 /**< Maximum windows size used. */
+#endif /* !MBEDTLS_MPI_WINDOW_SIZE */
+
+#if !defined(MBEDTLS_MPI_MAX_SIZE)
+/*
+ * Maximum size of MPIs allowed in bits and bytes for user-MPIs.
+ * ( Default: 512 bytes => 4096 bits, Maximum tested: 2048 bytes => 16384 bits )
+ *
+ * Note: Calculations can temporarily result in larger MPIs. So the number
+ * of limbs required (MBEDTLS_MPI_MAX_LIMBS) is higher.
+ */
+#define MBEDTLS_MPI_MAX_SIZE 1024 /**< Maximum number of bytes for usable MPIs. */
+#endif /* !MBEDTLS_MPI_MAX_SIZE */
+
+#define MBEDTLS_MPI_MAX_BITS ( 8 * MBEDTLS_MPI_MAX_SIZE ) /**< Maximum number of bits for usable MPIs. */
+
+/*
+ * When reading from files with mbedtls_mpi_read_file() and writing to files with
+ * mbedtls_mpi_write_file() the buffer should have space
+ * for a (short) label, the MPI (in the provided radix), the newline
+ * characters and the '\0'.
+ *
+ * By default we assume at least a 10 char label, a minimum radix of 10
+ * (decimal) and a maximum of 4096 bit numbers (1234 decimal chars).
+ * Autosized at compile time for at least a 10 char label, a minimum radix
+ * of 10 (decimal) for a number of MBEDTLS_MPI_MAX_BITS size.
+ *
+ * This used to be statically sized to 1250 for a maximum of 4096 bit
+ * numbers (1234 decimal chars).
+ *
+ * Calculate using the formula:
+ * MBEDTLS_MPI_RW_BUFFER_SIZE = ceil(MBEDTLS_MPI_MAX_BITS / ln(10) * ln(2)) +
+ * LabelSize + 6
+ */
+#define MBEDTLS_MPI_MAX_BITS_SCALE100 ( 100 * MBEDTLS_MPI_MAX_BITS )
+#define MBEDTLS_LN_2_DIV_LN_10_SCALE100 332
+#define MBEDTLS_MPI_RW_BUFFER_SIZE ( ((MBEDTLS_MPI_MAX_BITS_SCALE100 + MBEDTLS_LN_2_DIV_LN_10_SCALE100 - 1) / MBEDTLS_LN_2_DIV_LN_10_SCALE100) + 10 + 6 )
+
+/*
+ * Define the base integer type, architecture-wise.
+ *
+ * 32 or 64-bit integer types can be forced regardless of the underlying
+ * architecture by defining MBEDTLS_HAVE_INT32 or MBEDTLS_HAVE_INT64
+ * respectively and undefining MBEDTLS_HAVE_ASM.
+ *
+ * Double-width integers (e.g. 128-bit in 64-bit architectures) can be
+ * disabled by defining MBEDTLS_NO_UDBL_DIVISION.
+ */
+#if !defined(MBEDTLS_HAVE_INT32)
+ #if defined(_MSC_VER) && defined(_M_AMD64)
+ /* Always choose 64-bit when using MSC */
+ #if !defined(MBEDTLS_HAVE_INT64)
+ #define MBEDTLS_HAVE_INT64
+ #endif /* !MBEDTLS_HAVE_INT64 */
+ typedef int64_t mbedtls_mpi_sint;
+ typedef uint64_t mbedtls_mpi_uint;
+ #elif defined(__GNUC__) && ( \
+ defined(__amd64__) || defined(__x86_64__) || \
+ defined(__ppc64__) || defined(__powerpc64__) || \
+ defined(__ia64__) || defined(__alpha__) || \
+ ( defined(__sparc__) && defined(__arch64__) ) || \
+ defined(__s390x__) || defined(__mips64) )
+ #if !defined(MBEDTLS_HAVE_INT64)
+ #define MBEDTLS_HAVE_INT64
+ #endif /* MBEDTLS_HAVE_INT64 */
+ typedef int64_t mbedtls_mpi_sint;
+ typedef uint64_t mbedtls_mpi_uint;
+ #if !defined(MBEDTLS_NO_UDBL_DIVISION)
+ /* mbedtls_t_udbl defined as 128-bit unsigned int */
+ typedef unsigned int mbedtls_t_udbl __attribute__((mode(TI)));
+ #define MBEDTLS_HAVE_UDBL
+ #endif /* !MBEDTLS_NO_UDBL_DIVISION */
+ #elif defined(__ARMCC_VERSION) && defined(__aarch64__)
+ /*
+ * __ARMCC_VERSION is defined for both armcc and armclang and
+ * __aarch64__ is only defined by armclang when compiling 64-bit code
+ */
+ #if !defined(MBEDTLS_HAVE_INT64)
+ #define MBEDTLS_HAVE_INT64
+ #endif /* !MBEDTLS_HAVE_INT64 */
+ typedef int64_t mbedtls_mpi_sint;
+ typedef uint64_t mbedtls_mpi_uint;
+ #if !defined(MBEDTLS_NO_UDBL_DIVISION)
+ /* mbedtls_t_udbl defined as 128-bit unsigned int */
+ typedef __uint128_t mbedtls_t_udbl;
+ #define MBEDTLS_HAVE_UDBL
+ #endif /* !MBEDTLS_NO_UDBL_DIVISION */
+ #elif defined(MBEDTLS_HAVE_INT64)
+ /* Force 64-bit integers with unknown compiler */
+ typedef int64_t mbedtls_mpi_sint;
+ typedef uint64_t mbedtls_mpi_uint;
+ #endif
+#endif /* !MBEDTLS_HAVE_INT32 */
+
+#if !defined(MBEDTLS_HAVE_INT64)
+ /* Default to 32-bit compilation */
+ #if !defined(MBEDTLS_HAVE_INT32)
+ #define MBEDTLS_HAVE_INT32
+ #endif /* !MBEDTLS_HAVE_INT32 */
+ typedef int32_t mbedtls_mpi_sint;
+ typedef uint32_t mbedtls_mpi_uint;
+ #if !defined(MBEDTLS_NO_UDBL_DIVISION)
+ typedef uint64_t mbedtls_t_udbl;
+ #define MBEDTLS_HAVE_UDBL
+ #endif /* !MBEDTLS_NO_UDBL_DIVISION */
+#endif /* !MBEDTLS_HAVE_INT64 */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief MPI structure
+ */
+typedef struct mbedtls_mpi
+{
+ int s; /*!< integer sign */
+ size_t n; /*!< total # of limbs */
+ mbedtls_mpi_uint *p; /*!< pointer to limbs */
+}
+mbedtls_mpi;
+
+/**
+ * \brief Initialize an MPI context.
+ *
+ * This makes the MPI ready to be set or freed,
+ * but does not define a value for the MPI.
+ *
+ * \param X The MPI context to initialize. This must not be \c NULL.
+ */
+void mbedtls_mpi_init( mbedtls_mpi *X );
+
+/**
+ * \brief This function frees the components of an MPI context.
+ *
+ * \param X The MPI context to be cleared. This may be \c NULL,
+ * in which case this function is a no-op. If it is
+ * not \c NULL, it must point to an initialized MPI.
+ */
+void mbedtls_mpi_free( mbedtls_mpi *X );
+
+/**
+ * \brief Enlarge an MPI to the specified number of limbs.
+ *
+ * \note This function does nothing if the MPI is
+ * already large enough.
+ *
+ * \param X The MPI to grow. It must be initialized.
+ * \param nblimbs The target number of limbs.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed.
+ * \return Another negative error code on other kinds of failure.
+ */
+int mbedtls_mpi_grow( mbedtls_mpi *X, size_t nblimbs );
+
+/**
+ * \brief This function resizes an MPI downwards, keeping at least the
+ * specified number of limbs.
+ *
+ * If \c X is smaller than \c nblimbs, it is resized up
+ * instead.
+ *
+ * \param X The MPI to shrink. This must point to an initialized MPI.
+ * \param nblimbs The minimum number of limbs to keep.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed
+ * (this can only happen when resizing up).
+ * \return Another negative error code on other kinds of failure.
+ */
+int mbedtls_mpi_shrink( mbedtls_mpi *X, size_t nblimbs );
+
+/**
+ * \brief Make a copy of an MPI.
+ *
+ * \param X The destination MPI. This must point to an initialized MPI.
+ * \param Y The source MPI. This must point to an initialized MPI.
+ *
+ * \note The limb-buffer in the destination MPI is enlarged
+ * if necessary to hold the value in the source MPI.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed.
+ * \return Another negative error code on other kinds of failure.
+ */
+int mbedtls_mpi_copy( mbedtls_mpi *X, const mbedtls_mpi *Y );
+
+/**
+ * \brief Swap the contents of two MPIs.
+ *
+ * \param X The first MPI. It must be initialized.
+ * \param Y The second MPI. It must be initialized.
+ */
+void mbedtls_mpi_swap( mbedtls_mpi *X, mbedtls_mpi *Y );
+
+/**
+ * \brief Perform a safe conditional copy of MPI which doesn't
+ * reveal whether the condition was true or not.
+ *
+ * \param X The MPI to conditionally assign to. This must point
+ * to an initialized MPI.
+ * \param Y The MPI to be assigned from. This must point to an
+ * initialized MPI.
+ * \param assign The condition deciding whether to perform the
+ * assignment or not. Possible values:
+ * * \c 1: Perform the assignment `X = Y`.
+ * * \c 0: Keep the original value of \p X.
+ *
+ * \note This function is equivalent to
+ * `if( assign ) mbedtls_mpi_copy( X, Y );`
+ * except that it avoids leaking any information about whether
+ * the assignment was done or not (the above code may leak
+ * information through branch prediction and/or memory access
+ * patterns analysis).
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed.
+ * \return Another negative error code on other kinds of failure.
+ */
+int mbedtls_mpi_safe_cond_assign( mbedtls_mpi *X, const mbedtls_mpi *Y, unsigned char assign );
+
+/**
+ * \brief Perform a safe conditional swap which doesn't
+ * reveal whether the condition was true or not.
+ *
+ * \param X The first MPI. This must be initialized.
+ * \param Y The second MPI. This must be initialized.
+ * \param assign The condition deciding whether to perform
+ * the swap or not. Possible values:
+ * * \c 1: Swap the values of \p X and \p Y.
+ * * \c 0: Keep the original values of \p X and \p Y.
+ *
+ * \note This function is equivalent to
+ * if( assign ) mbedtls_mpi_swap( X, Y );
+ * except that it avoids leaking any information about whether
+ * the assignment was done or not (the above code may leak
+ * information through branch prediction and/or memory access
+ * patterns analysis).
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed.
+ * \return Another negative error code on other kinds of failure.
+ *
+ */
+int mbedtls_mpi_safe_cond_swap( mbedtls_mpi *X, mbedtls_mpi *Y, unsigned char assign );
+
+/**
+ * \brief Store integer value in MPI.
+ *
+ * \param X The MPI to set. This must be initialized.
+ * \param z The value to use.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed.
+ * \return Another negative error code on other kinds of failure.
+ */
+int mbedtls_mpi_lset( mbedtls_mpi *X, mbedtls_mpi_sint z );
+
+/**
+ * \brief Get a specific bit from an MPI.
+ *
+ * \param X The MPI to query. This must be initialized.
+ * \param pos Zero-based index of the bit to query.
+ *
+ * \return \c 0 or \c 1 on success, depending on whether bit \c pos
+ * of \c X is unset or set.
+ * \return A negative error code on failure.
+ */
+int mbedtls_mpi_get_bit( const mbedtls_mpi *X, size_t pos );
+
+/**
+ * \brief Modify a specific bit in an MPI.
+ *
+ * \note This function will grow the target MPI if necessary to set a
+ * bit to \c 1 in a not yet existing limb. It will not grow if
+ * the bit should be set to \c 0.
+ *
+ * \param X The MPI to modify. This must be initialized.
+ * \param pos Zero-based index of the bit to modify.
+ * \param val The desired value of bit \c pos: \c 0 or \c 1.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed.
+ * \return Another negative error code on other kinds of failure.
+ */
+int mbedtls_mpi_set_bit( mbedtls_mpi *X, size_t pos, unsigned char val );
+
+/**
+ * \brief Return the number of bits of value \c 0 before the
+ * least significant bit of value \c 1.
+ *
+ * \note This is the same as the zero-based index of
+ * the least significant bit of value \c 1.
+ *
+ * \param X The MPI to query.
+ *
+ * \return The number of bits of value \c 0 before the least significant
+ * bit of value \c 1 in \p X.
+ */
+size_t mbedtls_mpi_lsb( const mbedtls_mpi *X );
+
+/**
+ * \brief Return the number of bits up to and including the most
+ * significant bit of value \c 1.
+ *
+ * * \note This is same as the one-based index of the most
+ * significant bit of value \c 1.
+ *
+ * \param X The MPI to query. This must point to an initialized MPI.
+ *
+ * \return The number of bits up to and including the most
+ * significant bit of value \c 1.
+ */
+size_t mbedtls_mpi_bitlen( const mbedtls_mpi *X );
+
+/**
+ * \brief Return the total size of an MPI value in bytes.
+ *
+ * \param X The MPI to use. This must point to an initialized MPI.
+ *
+ * \note The value returned by this function may be less than
+ * the number of bytes used to store \p X internally.
+ * This happens if and only if there are trailing bytes
+ * of value zero.
+ *
+ * \return The least number of bytes capable of storing
+ * the absolute value of \p X.
+ */
+size_t mbedtls_mpi_size( const mbedtls_mpi *X );
+
+/**
+ * \brief Import an MPI from an ASCII string.
+ *
+ * \param X The destination MPI. This must point to an initialized MPI.
+ * \param radix The numeric base of the input string.
+ * \param s Null-terminated string buffer.
+ *
+ * \return \c 0 if successful.
+ * \return A negative error code on failure.
+ */
+int mbedtls_mpi_read_string( mbedtls_mpi *X, int radix, const char *s );
+
+/**
+ * \brief Export an MPI to an ASCII string.
+ *
+ * \param X The source MPI. This must point to an initialized MPI.
+ * \param radix The numeric base of the output string.
+ * \param buf The buffer to write the string to. This must be writable
+ * buffer of length \p buflen Bytes.
+ * \param buflen The available size in Bytes of \p buf.
+ * \param olen The address at which to store the length of the string
+ * written, including the final \c NULL byte. This must
+ * not be \c NULL.
+ *
+ * \note You can call this function with `buflen == 0` to obtain the
+ * minimum required buffer size in `*olen`.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL if the target buffer \p buf
+ * is too small to hold the value of \p X in the desired base.
+ * In this case, `*olen` is nonetheless updated to contain the
+ * size of \p buf required for a successful call.
+ * \return Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_write_string( const mbedtls_mpi *X, int radix,
+ char *buf, size_t buflen, size_t *olen );
+
+#if defined(MBEDTLS_FS_IO)
+/**
+ * \brief Read an MPI from a line in an opened file.
+ *
+ * \param X The destination MPI. This must point to an initialized MPI.
+ * \param radix The numeric base of the string representation used
+ * in the source line.
+ * \param fin The input file handle to use. This must not be \c NULL.
+ *
+ * \note On success, this function advances the file stream
+ * to the end of the current line or to EOF.
+ *
+ * The function returns \c 0 on an empty line.
+ *
+ * Leading whitespaces are ignored, as is a
+ * '0x' prefix for radix \c 16.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL if the file read buffer
+ * is too small.
+ * \return Another negative error code on failure.
+ */
+int mbedtls_mpi_read_file( mbedtls_mpi *X, int radix, FILE *fin );
+
+/**
+ * \brief Export an MPI into an opened file.
+ *
+ * \param p A string prefix to emit prior to the MPI data.
+ * For example, this might be a label, or "0x" when
+ * printing in base \c 16. This may be \c NULL if no prefix
+ * is needed.
+ * \param X The source MPI. This must point to an initialized MPI.
+ * \param radix The numeric base to be used in the emitted string.
+ * \param fout The output file handle. This may be \c NULL, in which case
+ * the output is written to \c stdout.
+ *
+ * \return \c 0 if successful.
+ * \return A negative error code on failure.
+ */
+int mbedtls_mpi_write_file( const char *p, const mbedtls_mpi *X,
+ int radix, FILE *fout );
+#endif /* MBEDTLS_FS_IO */
+
+/**
+ * \brief Import an MPI from unsigned big endian binary data.
+ *
+ * \param X The destination MPI. This must point to an initialized MPI.
+ * \param buf The input buffer. This must be a readable buffer of length
+ * \p buflen Bytes.
+ * \param buflen The length of the input buffer \p p in Bytes.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed.
+ * \return Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_read_binary( mbedtls_mpi *X, const unsigned char *buf,
+ size_t buflen );
+
+/**
+ * \brief Export an MPI into unsigned big endian binary data
+ * of fixed size.
+ *
+ * \param X The source MPI. This must point to an initialized MPI.
+ * \param buf The output buffer. This must be a writable buffer of length
+ * \p buflen Bytes.
+ * \param buflen The size of the output buffer \p buf in Bytes.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL if \p buf isn't
+ * large enough to hold the value of \p X.
+ * \return Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_write_binary( const mbedtls_mpi *X, unsigned char *buf,
+ size_t buflen );
+
+/**
+ * \brief Perform a left-shift on an MPI: X <<= count
+ *
+ * \param X The MPI to shift. This must point to an initialized MPI.
+ * \param count The number of bits to shift by.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_shift_l( mbedtls_mpi *X, size_t count );
+
+/**
+ * \brief Perform a right-shift on an MPI: X >>= count
+ *
+ * \param X The MPI to shift. This must point to an initialized MPI.
+ * \param count The number of bits to shift by.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_shift_r( mbedtls_mpi *X, size_t count );
+
+/**
+ * \brief Compare the absolute values of two MPIs.
+ *
+ * \param X The left-hand MPI. This must point to an initialized MPI.
+ * \param Y The right-hand MPI. This must point to an initialized MPI.
+ *
+ * \return \c 1 if `|X|` is greater than `|Y|`.
+ * \return \c -1 if `|X|` is lesser than `|Y|`.
+ * \return \c 0 if `|X|` is equal to `|Y|`.
+ */
+int mbedtls_mpi_cmp_abs( const mbedtls_mpi *X, const mbedtls_mpi *Y );
+
+/**
+ * \brief Compare two MPIs.
+ *
+ * \param X The left-hand MPI. This must point to an initialized MPI.
+ * \param Y The right-hand MPI. This must point to an initialized MPI.
+ *
+ * \return \c 1 if \p X is greater than \p Y.
+ * \return \c -1 if \p X is lesser than \p Y.
+ * \return \c 0 if \p X is equal to \p Y.
+ */
+int mbedtls_mpi_cmp_mpi( const mbedtls_mpi *X, const mbedtls_mpi *Y );
+
+/**
+ * \brief Compare an MPI with an integer.
+ *
+ * \param X The left-hand MPI. This must point to an initialized MPI.
+ * \param z The integer value to compare \p X to.
+ *
+ * \return \c 1 if \p X is greater than \p z.
+ * \return \c -1 if \p X is lesser than \p z.
+ * \return \c 0 if \p X is equal to \p z.
+ */
+int mbedtls_mpi_cmp_int( const mbedtls_mpi *X, mbedtls_mpi_sint z );
+
+/**
+ * \brief Perform an unsigned addition of MPIs: X = |A| + |B|
+ *
+ * \param X The destination MPI. This must point to an initialized MPI.
+ * \param A The first summand. This must point to an initialized MPI.
+ * \param B The second summand. This must point to an initialized MPI.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_add_abs( mbedtls_mpi *X, const mbedtls_mpi *A,
+ const mbedtls_mpi *B );
+
+/**
+ * \brief Perform an unsigned subtraction of MPIs: X = |A| - |B|
+ *
+ * \param X The destination MPI. This must point to an initialized MPI.
+ * \param A The minuend. This must point to an initialized MPI.
+ * \param B The subtrahend. This must point to an initialized MPI.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_NEGATIVE_VALUE if \p B is greater than \p A.
+ * \return Another negative error code on different kinds of failure.
+ *
+ */
+int mbedtls_mpi_sub_abs( mbedtls_mpi *X, const mbedtls_mpi *A,
+ const mbedtls_mpi *B );
+
+/**
+ * \brief Perform a signed addition of MPIs: X = A + B
+ *
+ * \param X The destination MPI. This must point to an initialized MPI.
+ * \param A The first summand. This must point to an initialized MPI.
+ * \param B The second summand. This must point to an initialized MPI.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_add_mpi( mbedtls_mpi *X, const mbedtls_mpi *A,
+ const mbedtls_mpi *B );
+
+/**
+ * \brief Perform a signed subtraction of MPIs: X = A - B
+ *
+ * \param X The destination MPI. This must point to an initialized MPI.
+ * \param A The minuend. This must point to an initialized MPI.
+ * \param B The subtrahend. This must point to an initialized MPI.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_sub_mpi( mbedtls_mpi *X, const mbedtls_mpi *A,
+ const mbedtls_mpi *B );
+
+/**
+ * \brief Perform a signed addition of an MPI and an integer: X = A + b
+ *
+ * \param X The destination MPI. This must point to an initialized MPI.
+ * \param A The first summand. This must point to an initialized MPI.
+ * \param b The second summand.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_add_int( mbedtls_mpi *X, const mbedtls_mpi *A,
+ mbedtls_mpi_sint b );
+
+/**
+ * \brief Perform a signed subtraction of an MPI and an integer:
+ * X = A - b
+ *
+ * \param X The destination MPI. This must point to an initialized MPI.
+ * \param A The minuend. This must point to an initialized MPI.
+ * \param b The subtrahend.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_sub_int( mbedtls_mpi *X, const mbedtls_mpi *A,
+ mbedtls_mpi_sint b );
+
+/**
+ * \brief Perform a multiplication of two MPIs: X = A * B
+ *
+ * \param X The destination MPI. This must point to an initialized MPI.
+ * \param A The first factor. This must point to an initialized MPI.
+ * \param B The second factor. This must point to an initialized MPI.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return Another negative error code on different kinds of failure.
+ *
+ */
+int mbedtls_mpi_mul_mpi( mbedtls_mpi *X, const mbedtls_mpi *A,
+ const mbedtls_mpi *B );
+
+/**
+ * \brief Perform a multiplication of an MPI with an unsigned integer:
+ * X = A * b
+ *
+ * \param X The destination MPI. This must point to an initialized MPI.
+ * \param A The first factor. This must point to an initialized MPI.
+ * \param b The second factor.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return Another negative error code on different kinds of failure.
+ *
+ */
+int mbedtls_mpi_mul_int( mbedtls_mpi *X, const mbedtls_mpi *A,
+ mbedtls_mpi_uint b );
+
+/**
+ * \brief Perform a division with remainder of two MPIs:
+ * A = Q * B + R
+ *
+ * \param Q The destination MPI for the quotient.
+ * This may be \c NULL if the value of the
+ * quotient is not needed.
+ * \param R The destination MPI for the remainder value.
+ * This may be \c NULL if the value of the
+ * remainder is not needed.
+ * \param A The dividend. This must point to an initialized MPi.
+ * \param B The divisor. This must point to an initialized MPI.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed.
+ * \return #MBEDTLS_ERR_MPI_DIVISION_BY_ZERO if \p B equals zero.
+ * \return Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_div_mpi( mbedtls_mpi *Q, mbedtls_mpi *R, const mbedtls_mpi *A,
+ const mbedtls_mpi *B );
+
+/**
+ * \brief Perform a division with remainder of an MPI by an integer:
+ * A = Q * b + R
+ *
+ * \param Q The destination MPI for the quotient.
+ * This may be \c NULL if the value of the
+ * quotient is not needed.
+ * \param R The destination MPI for the remainder value.
+ * This may be \c NULL if the value of the
+ * remainder is not needed.
+ * \param A The dividend. This must point to an initialized MPi.
+ * \param b The divisor.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if memory allocation failed.
+ * \return #MBEDTLS_ERR_MPI_DIVISION_BY_ZERO if \p b equals zero.
+ * \return Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_div_int( mbedtls_mpi *Q, mbedtls_mpi *R, const mbedtls_mpi *A,
+ mbedtls_mpi_sint b );
+
+/**
+ * \brief Perform a modular reduction. R = A mod B
+ *
+ * \param R The destination MPI for the residue value.
+ * This must point to an initialized MPI.
+ * \param A The MPI to compute the residue of.
+ * This must point to an initialized MPI.
+ * \param B The base of the modular reduction.
+ * This must point to an initialized MPI.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return #MBEDTLS_ERR_MPI_DIVISION_BY_ZERO if \p B equals zero.
+ * \return #MBEDTLS_ERR_MPI_NEGATIVE_VALUE if \p B is negative.
+ * \return Another negative error code on different kinds of failure.
+ *
+ */
+int mbedtls_mpi_mod_mpi( mbedtls_mpi *R, const mbedtls_mpi *A,
+ const mbedtls_mpi *B );
+
+/**
+ * \brief Perform a modular reduction with respect to an integer.
+ * r = A mod b
+ *
+ * \param r The address at which to store the residue.
+ * This must not be \c NULL.
+ * \param A The MPI to compute the residue of.
+ * This must point to an initialized MPi.
+ * \param b The integer base of the modular reduction.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return #MBEDTLS_ERR_MPI_DIVISION_BY_ZERO if \p b equals zero.
+ * \return #MBEDTLS_ERR_MPI_NEGATIVE_VALUE if \p b is negative.
+ * \return Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_mod_int( mbedtls_mpi_uint *r, const mbedtls_mpi *A,
+ mbedtls_mpi_sint b );
+
+/**
+ * \brief Perform a sliding-window exponentiation: X = A^E mod N
+ *
+ * \param X The destination MPI. This must point to an initialized MPI.
+ * \param A The base of the exponentiation.
+ * This must point to an initialized MPI.
+ * \param E The exponent MPI. This must point to an initialized MPI.
+ * \param N The base for the modular reduction. This must point to an
+ * initialized MPI.
+ * \param _RR A helper MPI depending solely on \p N which can be used to
+ * speed-up multiple modular exponentiations for the same value
+ * of \p N. This may be \c NULL. If it is not \c NULL, it must
+ * point to an initialized MPI. If it hasn't been used after
+ * the call to mbedtls_mpi_init(), this function will compute
+ * the helper value and store it in \p _RR for reuse on
+ * subsequent calls to this function. Otherwise, the function
+ * will assume that \p _RR holds the helper value set by a
+ * previous call to mbedtls_mpi_exp_mod(), and reuse it.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return #MBEDTLS_ERR_MPI_BAD_INPUT_DATA if \c N is negative or
+ * even, or if \c E is negative.
+ * \return Another negative error code on different kinds of failures.
+ *
+ */
+int mbedtls_mpi_exp_mod( mbedtls_mpi *X, const mbedtls_mpi *A,
+ const mbedtls_mpi *E, const mbedtls_mpi *N,
+ mbedtls_mpi *_RR );
+
+/**
+ * \brief Fill an MPI with a number of random bytes.
+ *
+ * \param X The destination MPI. This must point to an initialized MPI.
+ * \param size The number of random bytes to generate.
+ * \param f_rng The RNG function to use. This must not be \c NULL.
+ * \param p_rng The RNG parameter to be passed to \p f_rng. This may be
+ * \c NULL if \p f_rng doesn't need a context argument.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return Another negative error code on failure.
+ *
+ * \note The bytes obtained from the RNG are interpreted
+ * as a big-endian representation of an MPI; this can
+ * be relevant in applications like deterministic ECDSA.
+ */
+int mbedtls_mpi_fill_random( mbedtls_mpi *X, size_t size,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+/**
+ * \brief Compute the greatest common divisor: G = gcd(A, B)
+ *
+ * \param G The destination MPI. This must point to an initialized MPI.
+ * \param A The first operand. This must point to an initialized MPI.
+ * \param B The second operand. This must point to an initialized MPI.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return Another negative error code on different kinds of failure.
+ */
+int mbedtls_mpi_gcd( mbedtls_mpi *G, const mbedtls_mpi *A,
+ const mbedtls_mpi *B );
+
+/**
+ * \brief Compute the modular inverse: X = A^-1 mod N
+ *
+ * \param X The destination MPI. This must point to an initialized MPI.
+ * \param A The MPI to calculate the modular inverse of. This must point
+ * to an initialized MPI.
+ * \param N The base of the modular inversion. This must point to an
+ * initialized MPI.
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return #MBEDTLS_ERR_MPI_BAD_INPUT_DATA if \p N is less than
+ * or equal to one.
+ * \return #MBEDTLS_ERR_MPI_NOT_ACCEPTABLE if \p has no modular inverse
+ * with respect to \p N.
+ */
+int mbedtls_mpi_inv_mod( mbedtls_mpi *X, const mbedtls_mpi *A,
+ const mbedtls_mpi *N );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief Perform a Miller-Rabin primality test with error
+ * probability of 2<sup>-80</sup>.
+ *
+ * \deprecated Superseded by mbedtls_mpi_is_prime_ext() which allows
+ * specifying the number of Miller-Rabin rounds.
+ *
+ * \param X The MPI to check for primality.
+ * This must point to an initialized MPI.
+ * \param f_rng The RNG function to use. This must not be \c NULL.
+ * \param p_rng The RNG parameter to be passed to \p f_rng.
+ * This may be \c NULL if \p f_rng doesn't use a
+ * context parameter.
+ *
+ * \return \c 0 if successful, i.e. \p X is probably prime.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return #MBEDTLS_ERR_MPI_NOT_ACCEPTABLE if \p X is not prime.
+ * \return Another negative error code on other kinds of failure.
+ */
+MBEDTLS_DEPRECATED int mbedtls_mpi_is_prime( const mbedtls_mpi *X,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+/**
+ * \brief Miller-Rabin primality test.
+ *
+ * \warning If \p X is potentially generated by an adversary, for example
+ * when validating cryptographic parameters that you didn't
+ * generate yourself and that are supposed to be prime, then
+ * \p rounds should be at least the half of the security
+ * strength of the cryptographic algorithm. On the other hand,
+ * if \p X is chosen uniformly or non-adversially (as is the
+ * case when mbedtls_mpi_gen_prime calls this function), then
+ * \p rounds can be much lower.
+ *
+ * \param X The MPI to check for primality.
+ * This must point to an initialized MPI.
+ * \param rounds The number of bases to perform the Miller-Rabin primality
+ * test for. The probability of returning 0 on a composite is
+ * at most 2<sup>-2*\p rounds</sup>.
+ * \param f_rng The RNG function to use. This must not be \c NULL.
+ * \param p_rng The RNG parameter to be passed to \p f_rng.
+ * This may be \c NULL if \p f_rng doesn't use
+ * a context parameter.
+ *
+ * \return \c 0 if successful, i.e. \p X is probably prime.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return #MBEDTLS_ERR_MPI_NOT_ACCEPTABLE if \p X is not prime.
+ * \return Another negative error code on other kinds of failure.
+ */
+int mbedtls_mpi_is_prime_ext( const mbedtls_mpi *X, int rounds,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+/**
+ * \brief Flags for mbedtls_mpi_gen_prime()
+ *
+ * Each of these flags is a constraint on the result X returned by
+ * mbedtls_mpi_gen_prime().
+ */
+typedef enum {
+ MBEDTLS_MPI_GEN_PRIME_FLAG_DH = 0x0001, /**< (X-1)/2 is prime too */
+ MBEDTLS_MPI_GEN_PRIME_FLAG_LOW_ERR = 0x0002, /**< lower error rate from 2<sup>-80</sup> to 2<sup>-128</sup> */
+} mbedtls_mpi_gen_prime_flag_t;
+
+/**
+ * \brief Generate a prime number.
+ *
+ * \param X The destination MPI to store the generated prime in.
+ * This must point to an initialized MPi.
+ * \param nbits The required size of the destination MPI in bits.
+ * This must be between \c 3 and #MBEDTLS_MPI_MAX_BITS.
+ * \param flags A mask of flags of type #mbedtls_mpi_gen_prime_flag_t.
+ * \param f_rng The RNG function to use. This must not be \c NULL.
+ * \param p_rng The RNG parameter to be passed to \p f_rng.
+ * This may be \c NULL if \p f_rng doesn't use
+ * a context parameter.
+ *
+ * \return \c 0 if successful, in which case \p X holds a
+ * probably prime number.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED if a memory allocation failed.
+ * \return #MBEDTLS_ERR_MPI_BAD_INPUT_DATA if `nbits` is not between
+ * \c 3 and #MBEDTLS_MPI_MAX_BITS.
+ */
+int mbedtls_mpi_gen_prime( mbedtls_mpi *X, size_t nbits, int flags,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief Checkup routine
+ *
+ * \return 0 if successful, or 1 if the test failed
+ */
+int mbedtls_mpi_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* bignum.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/blowfish.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/blowfish.h
new file mode 100644
index 0000000..f01573d
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/blowfish.h
@@ -0,0 +1,287 @@
+/**
+ * \file blowfish.h
+ *
+ * \brief Blowfish block cipher
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_BLOWFISH_H
+#define MBEDTLS_BLOWFISH_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+
+#include "platform_util.h"
+
+#define MBEDTLS_BLOWFISH_ENCRYPT 1
+#define MBEDTLS_BLOWFISH_DECRYPT 0
+#define MBEDTLS_BLOWFISH_MAX_KEY_BITS 448
+#define MBEDTLS_BLOWFISH_MIN_KEY_BITS 32
+#define MBEDTLS_BLOWFISH_ROUNDS 16 /**< Rounds to use. When increasing this value, make sure to extend the initialisation vectors */
+#define MBEDTLS_BLOWFISH_BLOCKSIZE 8 /* Blowfish uses 64 bit blocks */
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#define MBEDTLS_ERR_BLOWFISH_INVALID_KEY_LENGTH MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( -0x0016 )
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+#define MBEDTLS_ERR_BLOWFISH_BAD_INPUT_DATA -0x0016 /**< Bad input data. */
+
+#define MBEDTLS_ERR_BLOWFISH_INVALID_INPUT_LENGTH -0x0018 /**< Invalid data input length. */
+
+/* MBEDTLS_ERR_BLOWFISH_HW_ACCEL_FAILED is deprecated and should not be used.
+ */
+#define MBEDTLS_ERR_BLOWFISH_HW_ACCEL_FAILED -0x0017 /**< Blowfish hardware accelerator failed. */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_BLOWFISH_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief Blowfish context structure
+ */
+typedef struct mbedtls_blowfish_context
+{
+ uint32_t P[MBEDTLS_BLOWFISH_ROUNDS + 2]; /*!< Blowfish round keys */
+ uint32_t S[4][256]; /*!< key dependent S-boxes */
+}
+mbedtls_blowfish_context;
+
+#else /* MBEDTLS_BLOWFISH_ALT */
+#include "blowfish_alt.h"
+#endif /* MBEDTLS_BLOWFISH_ALT */
+
+/**
+ * \brief Initialize a Blowfish context.
+ *
+ * \param ctx The Blowfish context to be initialized.
+ * This must not be \c NULL.
+ */
+void mbedtls_blowfish_init( mbedtls_blowfish_context *ctx );
+
+/**
+ * \brief Clear a Blowfish context.
+ *
+ * \param ctx The Blowfish context to be cleared.
+ * This may be \c NULL, in which case this function
+ * returns immediately. If it is not \c NULL, it must
+ * point to an initialized Blowfish context.
+ */
+void mbedtls_blowfish_free( mbedtls_blowfish_context *ctx );
+
+/**
+ * \brief Perform a Blowfish key schedule operation.
+ *
+ * \param ctx The Blowfish context to perform the key schedule on.
+ * \param key The encryption key. This must be a readable buffer of
+ * length \p keybits Bits.
+ * \param keybits The length of \p key in Bits. This must be between
+ * \c 32 and \c 448 and a multiple of \c 8.
+ *
+ * \return \c 0 if successful.
+ * \return A negative error code on failure.
+ */
+int mbedtls_blowfish_setkey( mbedtls_blowfish_context *ctx, const unsigned char *key,
+ unsigned int keybits );
+
+/**
+ * \brief Perform a Blowfish-ECB block encryption/decryption operation.
+ *
+ * \param ctx The Blowfish context to use. This must be initialized
+ * and bound to a key.
+ * \param mode The mode of operation. Possible values are
+ * #MBEDTLS_BLOWFISH_ENCRYPT for encryption, or
+ * #MBEDTLS_BLOWFISH_DECRYPT for decryption.
+ * \param input The input block. This must be a readable buffer
+ * of size \c 8 Bytes.
+ * \param output The output block. This must be a writable buffer
+ * of size \c 8 Bytes.
+ *
+ * \return \c 0 if successful.
+ * \return A negative error code on failure.
+ */
+int mbedtls_blowfish_crypt_ecb( mbedtls_blowfish_context *ctx,
+ int mode,
+ const unsigned char input[MBEDTLS_BLOWFISH_BLOCKSIZE],
+ unsigned char output[MBEDTLS_BLOWFISH_BLOCKSIZE] );
+
+#if defined(MBEDTLS_CIPHER_MODE_CBC)
+/**
+ * \brief Perform a Blowfish-CBC buffer encryption/decryption operation.
+ *
+ * \note Upon exit, the content of the IV is updated so that you can
+ * call the function same function again on the following
+ * block(s) of data and get the same result as if it was
+ * encrypted in one call. This allows a "streaming" usage.
+ * If on the other hand you need to retain the contents of the
+ * IV, you should either save it manually or use the cipher
+ * module instead.
+ *
+ * \param ctx The Blowfish context to use. This must be initialized
+ * and bound to a key.
+ * \param mode The mode of operation. Possible values are
+ * #MBEDTLS_BLOWFISH_ENCRYPT for encryption, or
+ * #MBEDTLS_BLOWFISH_DECRYPT for decryption.
+ * \param length The length of the input data in Bytes. This must be
+ * multiple of \c 8.
+ * \param iv The initialization vector. This must be a read/write buffer
+ * of length \c 8 Bytes. It is updated by this function.
+ * \param input The input data. This must be a readable buffer of length
+ * \p length Bytes.
+ * \param output The output data. This must be a writable buffer of length
+ * \p length Bytes.
+ *
+ * \return \c 0 if successful.
+ * \return A negative error code on failure.
+ */
+int mbedtls_blowfish_crypt_cbc( mbedtls_blowfish_context *ctx,
+ int mode,
+ size_t length,
+ unsigned char iv[MBEDTLS_BLOWFISH_BLOCKSIZE],
+ const unsigned char *input,
+ unsigned char *output );
+#endif /* MBEDTLS_CIPHER_MODE_CBC */
+
+#if defined(MBEDTLS_CIPHER_MODE_CFB)
+/**
+ * \brief Perform a Blowfish CFB buffer encryption/decryption operation.
+ *
+ * \note Upon exit, the content of the IV is updated so that you can
+ * call the function same function again on the following
+ * block(s) of data and get the same result as if it was
+ * encrypted in one call. This allows a "streaming" usage.
+ * If on the other hand you need to retain the contents of the
+ * IV, you should either save it manually or use the cipher
+ * module instead.
+ *
+ * \param ctx The Blowfish context to use. This must be initialized
+ * and bound to a key.
+ * \param mode The mode of operation. Possible values are
+ * #MBEDTLS_BLOWFISH_ENCRYPT for encryption, or
+ * #MBEDTLS_BLOWFISH_DECRYPT for decryption.
+ * \param length The length of the input data in Bytes.
+ * \param iv_off The offset in the initialiation vector.
+ * The value pointed to must be smaller than \c 8 Bytes.
+ * It is updated by this function to support the aforementioned
+ * streaming usage.
+ * \param iv The initialization vector. This must be a read/write buffer
+ * of size \c 8 Bytes. It is updated after use.
+ * \param input The input data. This must be a readable buffer of length
+ * \p length Bytes.
+ * \param output The output data. This must be a writable buffer of length
+ * \p length Bytes.
+ *
+ * \return \c 0 if successful.
+ * \return A negative error code on failure.
+ */
+int mbedtls_blowfish_crypt_cfb64( mbedtls_blowfish_context *ctx,
+ int mode,
+ size_t length,
+ size_t *iv_off,
+ unsigned char iv[MBEDTLS_BLOWFISH_BLOCKSIZE],
+ const unsigned char *input,
+ unsigned char *output );
+#endif /*MBEDTLS_CIPHER_MODE_CFB */
+
+#if defined(MBEDTLS_CIPHER_MODE_CTR)
+/**
+ * \brief Perform a Blowfish-CTR buffer encryption/decryption operation.
+ *
+ * \warning You must never reuse a nonce value with the same key. Doing so
+ * would void the encryption for the two messages encrypted with
+ * the same nonce and key.
+ *
+ * There are two common strategies for managing nonces with CTR:
+ *
+ * 1. You can handle everything as a single message processed over
+ * successive calls to this function. In that case, you want to
+ * set \p nonce_counter and \p nc_off to 0 for the first call, and
+ * then preserve the values of \p nonce_counter, \p nc_off and \p
+ * stream_block across calls to this function as they will be
+ * updated by this function.
+ *
+ * With this strategy, you must not encrypt more than 2**64
+ * blocks of data with the same key.
+ *
+ * 2. You can encrypt separate messages by dividing the \p
+ * nonce_counter buffer in two areas: the first one used for a
+ * per-message nonce, handled by yourself, and the second one
+ * updated by this function internally.
+ *
+ * For example, you might reserve the first 4 bytes for the
+ * per-message nonce, and the last 4 bytes for internal use. In that
+ * case, before calling this function on a new message you need to
+ * set the first 4 bytes of \p nonce_counter to your chosen nonce
+ * value, the last 4 to 0, and \p nc_off to 0 (which will cause \p
+ * stream_block to be ignored). That way, you can encrypt at most
+ * 2**32 messages of up to 2**32 blocks each with the same key.
+ *
+ * The per-message nonce (or information sufficient to reconstruct
+ * it) needs to be communicated with the ciphertext and must be unique.
+ * The recommended way to ensure uniqueness is to use a message
+ * counter.
+ *
+ * Note that for both stategies, sizes are measured in blocks and
+ * that a Blowfish block is 8 bytes.
+ *
+ * \warning Upon return, \p stream_block contains sensitive data. Its
+ * content must not be written to insecure storage and should be
+ * securely discarded as soon as it's no longer needed.
+ *
+ * \param ctx The Blowfish context to use. This must be initialized
+ * and bound to a key.
+ * \param length The length of the input data in Bytes.
+ * \param nc_off The offset in the current stream_block (for resuming
+ * within current cipher stream). The offset pointer
+ * should be \c 0 at the start of a stream and must be
+ * smaller than \c 8. It is updated by this function.
+ * \param nonce_counter The 64-bit nonce and counter. This must point to a
+ * read/write buffer of length \c 8 Bytes.
+ * \param stream_block The saved stream-block for resuming. This must point to
+ * a read/write buffer of length \c 8 Bytes.
+ * \param input The input data. This must be a readable buffer of
+ * length \p length Bytes.
+ * \param output The output data. This must be a writable buffer of
+ * length \p length Bytes.
+ *
+ * \return \c 0 if successful.
+ * \return A negative error code on failure.
+ */
+int mbedtls_blowfish_crypt_ctr( mbedtls_blowfish_context *ctx,
+ size_t length,
+ size_t *nc_off,
+ unsigned char nonce_counter[MBEDTLS_BLOWFISH_BLOCKSIZE],
+ unsigned char stream_block[MBEDTLS_BLOWFISH_BLOCKSIZE],
+ const unsigned char *input,
+ unsigned char *output );
+#endif /* MBEDTLS_CIPHER_MODE_CTR */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* blowfish.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/bn_mul.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/bn_mul.h
new file mode 100644
index 0000000..c33bd8d
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/bn_mul.h
@@ -0,0 +1,915 @@
+/**
+ * \file bn_mul.h
+ *
+ * \brief Multi-precision integer library
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+/*
+ * Multiply source vector [s] with b, add result
+ * to destination vector [d] and set carry c.
+ *
+ * Currently supports:
+ *
+ * . IA-32 (386+) . AMD64 / EM64T
+ * . IA-32 (SSE2) . Motorola 68000
+ * . PowerPC, 32-bit . MicroBlaze
+ * . PowerPC, 64-bit . TriCore
+ * . SPARC v8 . ARM v3+
+ * . Alpha . MIPS32
+ * . C, longlong . C, generic
+ */
+#ifndef MBEDTLS_BN_MUL_H
+#define MBEDTLS_BN_MUL_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "bignum.h"
+
+#if defined(MBEDTLS_HAVE_ASM)
+
+#ifndef asm
+#define asm __asm
+#endif
+
+/* armcc5 --gnu defines __GNUC__ but doesn't support GNU's extended asm */
+#if defined(__GNUC__) && \
+ ( !defined(__ARMCC_VERSION) || __ARMCC_VERSION >= 6000000 )
+
+/*
+ * Disable use of the i386 assembly code below if option -O0, to disable all
+ * compiler optimisations, is passed, detected with __OPTIMIZE__
+ * This is done as the number of registers used in the assembly code doesn't
+ * work with the -O0 option.
+ */
+#if defined(__i386__) && defined(__OPTIMIZE__)
+
+#define MULADDC_INIT \
+ asm( \
+ "movl %%ebx, %0 \n\t" \
+ "movl %5, %%esi \n\t" \
+ "movl %6, %%edi \n\t" \
+ "movl %7, %%ecx \n\t" \
+ "movl %8, %%ebx \n\t"
+
+#define MULADDC_CORE \
+ "lodsl \n\t" \
+ "mull %%ebx \n\t" \
+ "addl %%ecx, %%eax \n\t" \
+ "adcl $0, %%edx \n\t" \
+ "addl (%%edi), %%eax \n\t" \
+ "adcl $0, %%edx \n\t" \
+ "movl %%edx, %%ecx \n\t" \
+ "stosl \n\t"
+
+#if defined(MBEDTLS_HAVE_SSE2)
+
+#define MULADDC_HUIT \
+ "movd %%ecx, %%mm1 \n\t" \
+ "movd %%ebx, %%mm0 \n\t" \
+ "movd (%%edi), %%mm3 \n\t" \
+ "paddq %%mm3, %%mm1 \n\t" \
+ "movd (%%esi), %%mm2 \n\t" \
+ "pmuludq %%mm0, %%mm2 \n\t" \
+ "movd 4(%%esi), %%mm4 \n\t" \
+ "pmuludq %%mm0, %%mm4 \n\t" \
+ "movd 8(%%esi), %%mm6 \n\t" \
+ "pmuludq %%mm0, %%mm6 \n\t" \
+ "movd 12(%%esi), %%mm7 \n\t" \
+ "pmuludq %%mm0, %%mm7 \n\t" \
+ "paddq %%mm2, %%mm1 \n\t" \
+ "movd 4(%%edi), %%mm3 \n\t" \
+ "paddq %%mm4, %%mm3 \n\t" \
+ "movd 8(%%edi), %%mm5 \n\t" \
+ "paddq %%mm6, %%mm5 \n\t" \
+ "movd 12(%%edi), %%mm4 \n\t" \
+ "paddq %%mm4, %%mm7 \n\t" \
+ "movd %%mm1, (%%edi) \n\t" \
+ "movd 16(%%esi), %%mm2 \n\t" \
+ "pmuludq %%mm0, %%mm2 \n\t" \
+ "psrlq $32, %%mm1 \n\t" \
+ "movd 20(%%esi), %%mm4 \n\t" \
+ "pmuludq %%mm0, %%mm4 \n\t" \
+ "paddq %%mm3, %%mm1 \n\t" \
+ "movd 24(%%esi), %%mm6 \n\t" \
+ "pmuludq %%mm0, %%mm6 \n\t" \
+ "movd %%mm1, 4(%%edi) \n\t" \
+ "psrlq $32, %%mm1 \n\t" \
+ "movd 28(%%esi), %%mm3 \n\t" \
+ "pmuludq %%mm0, %%mm3 \n\t" \
+ "paddq %%mm5, %%mm1 \n\t" \
+ "movd 16(%%edi), %%mm5 \n\t" \
+ "paddq %%mm5, %%mm2 \n\t" \
+ "movd %%mm1, 8(%%edi) \n\t" \
+ "psrlq $32, %%mm1 \n\t" \
+ "paddq %%mm7, %%mm1 \n\t" \
+ "movd 20(%%edi), %%mm5 \n\t" \
+ "paddq %%mm5, %%mm4 \n\t" \
+ "movd %%mm1, 12(%%edi) \n\t" \
+ "psrlq $32, %%mm1 \n\t" \
+ "paddq %%mm2, %%mm1 \n\t" \
+ "movd 24(%%edi), %%mm5 \n\t" \
+ "paddq %%mm5, %%mm6 \n\t" \
+ "movd %%mm1, 16(%%edi) \n\t" \
+ "psrlq $32, %%mm1 \n\t" \
+ "paddq %%mm4, %%mm1 \n\t" \
+ "movd 28(%%edi), %%mm5 \n\t" \
+ "paddq %%mm5, %%mm3 \n\t" \
+ "movd %%mm1, 20(%%edi) \n\t" \
+ "psrlq $32, %%mm1 \n\t" \
+ "paddq %%mm6, %%mm1 \n\t" \
+ "movd %%mm1, 24(%%edi) \n\t" \
+ "psrlq $32, %%mm1 \n\t" \
+ "paddq %%mm3, %%mm1 \n\t" \
+ "movd %%mm1, 28(%%edi) \n\t" \
+ "addl $32, %%edi \n\t" \
+ "addl $32, %%esi \n\t" \
+ "psrlq $32, %%mm1 \n\t" \
+ "movd %%mm1, %%ecx \n\t"
+
+#define MULADDC_STOP \
+ "emms \n\t" \
+ "movl %4, %%ebx \n\t" \
+ "movl %%ecx, %1 \n\t" \
+ "movl %%edi, %2 \n\t" \
+ "movl %%esi, %3 \n\t" \
+ : "=m" (t), "=m" (c), "=m" (d), "=m" (s) \
+ : "m" (t), "m" (s), "m" (d), "m" (c), "m" (b) \
+ : "eax", "ebx", "ecx", "edx", "esi", "edi" \
+ );
+
+#else
+
+#define MULADDC_STOP \
+ "movl %4, %%ebx \n\t" \
+ "movl %%ecx, %1 \n\t" \
+ "movl %%edi, %2 \n\t" \
+ "movl %%esi, %3 \n\t" \
+ : "=m" (t), "=m" (c), "=m" (d), "=m" (s) \
+ : "m" (t), "m" (s), "m" (d), "m" (c), "m" (b) \
+ : "eax", "ebx", "ecx", "edx", "esi", "edi" \
+ );
+#endif /* SSE2 */
+#endif /* i386 */
+
+#if defined(__amd64__) || defined (__x86_64__)
+
+#define MULADDC_INIT \
+ asm( \
+ "xorq %%r8, %%r8\n"
+
+#define MULADDC_CORE \
+ "movq (%%rsi), %%rax\n" \
+ "mulq %%rbx\n" \
+ "addq $8, %%rsi\n" \
+ "addq %%rcx, %%rax\n" \
+ "movq %%r8, %%rcx\n" \
+ "adcq $0, %%rdx\n" \
+ "nop \n" \
+ "addq %%rax, (%%rdi)\n" \
+ "adcq %%rdx, %%rcx\n" \
+ "addq $8, %%rdi\n"
+
+#define MULADDC_STOP \
+ : "+c" (c), "+D" (d), "+S" (s) \
+ : "b" (b) \
+ : "rax", "rdx", "r8" \
+ );
+
+#endif /* AMD64 */
+
+#if defined(__mc68020__) || defined(__mcpu32__)
+
+#define MULADDC_INIT \
+ asm( \
+ "movl %3, %%a2 \n\t" \
+ "movl %4, %%a3 \n\t" \
+ "movl %5, %%d3 \n\t" \
+ "movl %6, %%d2 \n\t" \
+ "moveq #0, %%d0 \n\t"
+
+#define MULADDC_CORE \
+ "movel %%a2@+, %%d1 \n\t" \
+ "mulul %%d2, %%d4:%%d1 \n\t" \
+ "addl %%d3, %%d1 \n\t" \
+ "addxl %%d0, %%d4 \n\t" \
+ "moveq #0, %%d3 \n\t" \
+ "addl %%d1, %%a3@+ \n\t" \
+ "addxl %%d4, %%d3 \n\t"
+
+#define MULADDC_STOP \
+ "movl %%d3, %0 \n\t" \
+ "movl %%a3, %1 \n\t" \
+ "movl %%a2, %2 \n\t" \
+ : "=m" (c), "=m" (d), "=m" (s) \
+ : "m" (s), "m" (d), "m" (c), "m" (b) \
+ : "d0", "d1", "d2", "d3", "d4", "a2", "a3" \
+ );
+
+#define MULADDC_HUIT \
+ "movel %%a2@+, %%d1 \n\t" \
+ "mulul %%d2, %%d4:%%d1 \n\t" \
+ "addxl %%d3, %%d1 \n\t" \
+ "addxl %%d0, %%d4 \n\t" \
+ "addl %%d1, %%a3@+ \n\t" \
+ "movel %%a2@+, %%d1 \n\t" \
+ "mulul %%d2, %%d3:%%d1 \n\t" \
+ "addxl %%d4, %%d1 \n\t" \
+ "addxl %%d0, %%d3 \n\t" \
+ "addl %%d1, %%a3@+ \n\t" \
+ "movel %%a2@+, %%d1 \n\t" \
+ "mulul %%d2, %%d4:%%d1 \n\t" \
+ "addxl %%d3, %%d1 \n\t" \
+ "addxl %%d0, %%d4 \n\t" \
+ "addl %%d1, %%a3@+ \n\t" \
+ "movel %%a2@+, %%d1 \n\t" \
+ "mulul %%d2, %%d3:%%d1 \n\t" \
+ "addxl %%d4, %%d1 \n\t" \
+ "addxl %%d0, %%d3 \n\t" \
+ "addl %%d1, %%a3@+ \n\t" \
+ "movel %%a2@+, %%d1 \n\t" \
+ "mulul %%d2, %%d4:%%d1 \n\t" \
+ "addxl %%d3, %%d1 \n\t" \
+ "addxl %%d0, %%d4 \n\t" \
+ "addl %%d1, %%a3@+ \n\t" \
+ "movel %%a2@+, %%d1 \n\t" \
+ "mulul %%d2, %%d3:%%d1 \n\t" \
+ "addxl %%d4, %%d1 \n\t" \
+ "addxl %%d0, %%d3 \n\t" \
+ "addl %%d1, %%a3@+ \n\t" \
+ "movel %%a2@+, %%d1 \n\t" \
+ "mulul %%d2, %%d4:%%d1 \n\t" \
+ "addxl %%d3, %%d1 \n\t" \
+ "addxl %%d0, %%d4 \n\t" \
+ "addl %%d1, %%a3@+ \n\t" \
+ "movel %%a2@+, %%d1 \n\t" \
+ "mulul %%d2, %%d3:%%d1 \n\t" \
+ "addxl %%d4, %%d1 \n\t" \
+ "addxl %%d0, %%d3 \n\t" \
+ "addl %%d1, %%a3@+ \n\t" \
+ "addxl %%d0, %%d3 \n\t"
+
+#endif /* MC68000 */
+
+#if defined(__powerpc64__) || defined(__ppc64__)
+
+#if defined(__MACH__) && defined(__APPLE__)
+
+#define MULADDC_INIT \
+ asm( \
+ "ld r3, %3 \n\t" \
+ "ld r4, %4 \n\t" \
+ "ld r5, %5 \n\t" \
+ "ld r6, %6 \n\t" \
+ "addi r3, r3, -8 \n\t" \
+ "addi r4, r4, -8 \n\t" \
+ "addic r5, r5, 0 \n\t"
+
+#define MULADDC_CORE \
+ "ldu r7, 8(r3) \n\t" \
+ "mulld r8, r7, r6 \n\t" \
+ "mulhdu r9, r7, r6 \n\t" \
+ "adde r8, r8, r5 \n\t" \
+ "ld r7, 8(r4) \n\t" \
+ "addze r5, r9 \n\t" \
+ "addc r8, r8, r7 \n\t" \
+ "stdu r8, 8(r4) \n\t"
+
+#define MULADDC_STOP \
+ "addze r5, r5 \n\t" \
+ "addi r4, r4, 8 \n\t" \
+ "addi r3, r3, 8 \n\t" \
+ "std r5, %0 \n\t" \
+ "std r4, %1 \n\t" \
+ "std r3, %2 \n\t" \
+ : "=m" (c), "=m" (d), "=m" (s) \
+ : "m" (s), "m" (d), "m" (c), "m" (b) \
+ : "r3", "r4", "r5", "r6", "r7", "r8", "r9" \
+ );
+
+
+#else /* __MACH__ && __APPLE__ */
+
+#define MULADDC_INIT \
+ asm( \
+ "ld %%r3, %3 \n\t" \
+ "ld %%r4, %4 \n\t" \
+ "ld %%r5, %5 \n\t" \
+ "ld %%r6, %6 \n\t" \
+ "addi %%r3, %%r3, -8 \n\t" \
+ "addi %%r4, %%r4, -8 \n\t" \
+ "addic %%r5, %%r5, 0 \n\t"
+
+#define MULADDC_CORE \
+ "ldu %%r7, 8(%%r3) \n\t" \
+ "mulld %%r8, %%r7, %%r6 \n\t" \
+ "mulhdu %%r9, %%r7, %%r6 \n\t" \
+ "adde %%r8, %%r8, %%r5 \n\t" \
+ "ld %%r7, 8(%%r4) \n\t" \
+ "addze %%r5, %%r9 \n\t" \
+ "addc %%r8, %%r8, %%r7 \n\t" \
+ "stdu %%r8, 8(%%r4) \n\t"
+
+#define MULADDC_STOP \
+ "addze %%r5, %%r5 \n\t" \
+ "addi %%r4, %%r4, 8 \n\t" \
+ "addi %%r3, %%r3, 8 \n\t" \
+ "std %%r5, %0 \n\t" \
+ "std %%r4, %1 \n\t" \
+ "std %%r3, %2 \n\t" \
+ : "=m" (c), "=m" (d), "=m" (s) \
+ : "m" (s), "m" (d), "m" (c), "m" (b) \
+ : "r3", "r4", "r5", "r6", "r7", "r8", "r9" \
+ );
+
+#endif /* __MACH__ && __APPLE__ */
+
+#elif defined(__powerpc__) || defined(__ppc__) /* end PPC64/begin PPC32 */
+
+#if defined(__MACH__) && defined(__APPLE__)
+
+#define MULADDC_INIT \
+ asm( \
+ "lwz r3, %3 \n\t" \
+ "lwz r4, %4 \n\t" \
+ "lwz r5, %5 \n\t" \
+ "lwz r6, %6 \n\t" \
+ "addi r3, r3, -4 \n\t" \
+ "addi r4, r4, -4 \n\t" \
+ "addic r5, r5, 0 \n\t"
+
+#define MULADDC_CORE \
+ "lwzu r7, 4(r3) \n\t" \
+ "mullw r8, r7, r6 \n\t" \
+ "mulhwu r9, r7, r6 \n\t" \
+ "adde r8, r8, r5 \n\t" \
+ "lwz r7, 4(r4) \n\t" \
+ "addze r5, r9 \n\t" \
+ "addc r8, r8, r7 \n\t" \
+ "stwu r8, 4(r4) \n\t"
+
+#define MULADDC_STOP \
+ "addze r5, r5 \n\t" \
+ "addi r4, r4, 4 \n\t" \
+ "addi r3, r3, 4 \n\t" \
+ "stw r5, %0 \n\t" \
+ "stw r4, %1 \n\t" \
+ "stw r3, %2 \n\t" \
+ : "=m" (c), "=m" (d), "=m" (s) \
+ : "m" (s), "m" (d), "m" (c), "m" (b) \
+ : "r3", "r4", "r5", "r6", "r7", "r8", "r9" \
+ );
+
+#else /* __MACH__ && __APPLE__ */
+
+#define MULADDC_INIT \
+ asm( \
+ "lwz %%r3, %3 \n\t" \
+ "lwz %%r4, %4 \n\t" \
+ "lwz %%r5, %5 \n\t" \
+ "lwz %%r6, %6 \n\t" \
+ "addi %%r3, %%r3, -4 \n\t" \
+ "addi %%r4, %%r4, -4 \n\t" \
+ "addic %%r5, %%r5, 0 \n\t"
+
+#define MULADDC_CORE \
+ "lwzu %%r7, 4(%%r3) \n\t" \
+ "mullw %%r8, %%r7, %%r6 \n\t" \
+ "mulhwu %%r9, %%r7, %%r6 \n\t" \
+ "adde %%r8, %%r8, %%r5 \n\t" \
+ "lwz %%r7, 4(%%r4) \n\t" \
+ "addze %%r5, %%r9 \n\t" \
+ "addc %%r8, %%r8, %%r7 \n\t" \
+ "stwu %%r8, 4(%%r4) \n\t"
+
+#define MULADDC_STOP \
+ "addze %%r5, %%r5 \n\t" \
+ "addi %%r4, %%r4, 4 \n\t" \
+ "addi %%r3, %%r3, 4 \n\t" \
+ "stw %%r5, %0 \n\t" \
+ "stw %%r4, %1 \n\t" \
+ "stw %%r3, %2 \n\t" \
+ : "=m" (c), "=m" (d), "=m" (s) \
+ : "m" (s), "m" (d), "m" (c), "m" (b) \
+ : "r3", "r4", "r5", "r6", "r7", "r8", "r9" \
+ );
+
+#endif /* __MACH__ && __APPLE__ */
+
+#endif /* PPC32 */
+
+/*
+ * The Sparc(64) assembly is reported to be broken.
+ * Disable it for now, until we're able to fix it.
+ */
+#if 0 && defined(__sparc__)
+#if defined(__sparc64__)
+
+#define MULADDC_INIT \
+ asm( \
+ "ldx %3, %%o0 \n\t" \
+ "ldx %4, %%o1 \n\t" \
+ "ld %5, %%o2 \n\t" \
+ "ld %6, %%o3 \n\t"
+
+#define MULADDC_CORE \
+ "ld [%%o0], %%o4 \n\t" \
+ "inc 4, %%o0 \n\t" \
+ "ld [%%o1], %%o5 \n\t" \
+ "umul %%o3, %%o4, %%o4 \n\t" \
+ "addcc %%o4, %%o2, %%o4 \n\t" \
+ "rd %%y, %%g1 \n\t" \
+ "addx %%g1, 0, %%g1 \n\t" \
+ "addcc %%o4, %%o5, %%o4 \n\t" \
+ "st %%o4, [%%o1] \n\t" \
+ "addx %%g1, 0, %%o2 \n\t" \
+ "inc 4, %%o1 \n\t"
+
+ #define MULADDC_STOP \
+ "st %%o2, %0 \n\t" \
+ "stx %%o1, %1 \n\t" \
+ "stx %%o0, %2 \n\t" \
+ : "=m" (c), "=m" (d), "=m" (s) \
+ : "m" (s), "m" (d), "m" (c), "m" (b) \
+ : "g1", "o0", "o1", "o2", "o3", "o4", \
+ "o5" \
+ );
+
+#else /* __sparc64__ */
+
+#define MULADDC_INIT \
+ asm( \
+ "ld %3, %%o0 \n\t" \
+ "ld %4, %%o1 \n\t" \
+ "ld %5, %%o2 \n\t" \
+ "ld %6, %%o3 \n\t"
+
+#define MULADDC_CORE \
+ "ld [%%o0], %%o4 \n\t" \
+ "inc 4, %%o0 \n\t" \
+ "ld [%%o1], %%o5 \n\t" \
+ "umul %%o3, %%o4, %%o4 \n\t" \
+ "addcc %%o4, %%o2, %%o4 \n\t" \
+ "rd %%y, %%g1 \n\t" \
+ "addx %%g1, 0, %%g1 \n\t" \
+ "addcc %%o4, %%o5, %%o4 \n\t" \
+ "st %%o4, [%%o1] \n\t" \
+ "addx %%g1, 0, %%o2 \n\t" \
+ "inc 4, %%o1 \n\t"
+
+#define MULADDC_STOP \
+ "st %%o2, %0 \n\t" \
+ "st %%o1, %1 \n\t" \
+ "st %%o0, %2 \n\t" \
+ : "=m" (c), "=m" (d), "=m" (s) \
+ : "m" (s), "m" (d), "m" (c), "m" (b) \
+ : "g1", "o0", "o1", "o2", "o3", "o4", \
+ "o5" \
+ );
+
+#endif /* __sparc64__ */
+#endif /* __sparc__ */
+
+#if defined(__microblaze__) || defined(microblaze)
+
+#define MULADDC_INIT \
+ asm( \
+ "lwi r3, %3 \n\t" \
+ "lwi r4, %4 \n\t" \
+ "lwi r5, %5 \n\t" \
+ "lwi r6, %6 \n\t" \
+ "andi r7, r6, 0xffff \n\t" \
+ "bsrli r6, r6, 16 \n\t"
+
+#define MULADDC_CORE \
+ "lhui r8, r3, 0 \n\t" \
+ "addi r3, r3, 2 \n\t" \
+ "lhui r9, r3, 0 \n\t" \
+ "addi r3, r3, 2 \n\t" \
+ "mul r10, r9, r6 \n\t" \
+ "mul r11, r8, r7 \n\t" \
+ "mul r12, r9, r7 \n\t" \
+ "mul r13, r8, r6 \n\t" \
+ "bsrli r8, r10, 16 \n\t" \
+ "bsrli r9, r11, 16 \n\t" \
+ "add r13, r13, r8 \n\t" \
+ "add r13, r13, r9 \n\t" \
+ "bslli r10, r10, 16 \n\t" \
+ "bslli r11, r11, 16 \n\t" \
+ "add r12, r12, r10 \n\t" \
+ "addc r13, r13, r0 \n\t" \
+ "add r12, r12, r11 \n\t" \
+ "addc r13, r13, r0 \n\t" \
+ "lwi r10, r4, 0 \n\t" \
+ "add r12, r12, r10 \n\t" \
+ "addc r13, r13, r0 \n\t" \
+ "add r12, r12, r5 \n\t" \
+ "addc r5, r13, r0 \n\t" \
+ "swi r12, r4, 0 \n\t" \
+ "addi r4, r4, 4 \n\t"
+
+#define MULADDC_STOP \
+ "swi r5, %0 \n\t" \
+ "swi r4, %1 \n\t" \
+ "swi r3, %2 \n\t" \
+ : "=m" (c), "=m" (d), "=m" (s) \
+ : "m" (s), "m" (d), "m" (c), "m" (b) \
+ : "r3", "r4", "r5", "r6", "r7", "r8", \
+ "r9", "r10", "r11", "r12", "r13" \
+ );
+
+#endif /* MicroBlaze */
+
+#if defined(__tricore__)
+
+#define MULADDC_INIT \
+ asm( \
+ "ld.a %%a2, %3 \n\t" \
+ "ld.a %%a3, %4 \n\t" \
+ "ld.w %%d4, %5 \n\t" \
+ "ld.w %%d1, %6 \n\t" \
+ "xor %%d5, %%d5 \n\t"
+
+#define MULADDC_CORE \
+ "ld.w %%d0, [%%a2+] \n\t" \
+ "madd.u %%e2, %%e4, %%d0, %%d1 \n\t" \
+ "ld.w %%d0, [%%a3] \n\t" \
+ "addx %%d2, %%d2, %%d0 \n\t" \
+ "addc %%d3, %%d3, 0 \n\t" \
+ "mov %%d4, %%d3 \n\t" \
+ "st.w [%%a3+], %%d2 \n\t"
+
+#define MULADDC_STOP \
+ "st.w %0, %%d4 \n\t" \
+ "st.a %1, %%a3 \n\t" \
+ "st.a %2, %%a2 \n\t" \
+ : "=m" (c), "=m" (d), "=m" (s) \
+ : "m" (s), "m" (d), "m" (c), "m" (b) \
+ : "d0", "d1", "e2", "d4", "a2", "a3" \
+ );
+
+#endif /* TriCore */
+
+/*
+ * Note, gcc -O0 by default uses r7 for the frame pointer, so it complains about
+ * our use of r7 below, unless -fomit-frame-pointer is passed.
+ *
+ * On the other hand, -fomit-frame-pointer is implied by any -Ox options with
+ * x !=0, which we can detect using __OPTIMIZE__ (which is also defined by
+ * clang and armcc5 under the same conditions).
+ *
+ * So, only use the optimized assembly below for optimized build, which avoids
+ * the build error and is pretty reasonable anyway.
+ */
+#if defined(__GNUC__) && !defined(__OPTIMIZE__)
+#define MULADDC_CANNOT_USE_R7
+#endif
+
+#if defined(__arm__) && !defined(MULADDC_CANNOT_USE_R7)
+
+#if defined(__thumb__) && !defined(__thumb2__)
+
+#define MULADDC_INIT \
+ asm( \
+ "ldr r0, %3 \n\t" \
+ "ldr r1, %4 \n\t" \
+ "ldr r2, %5 \n\t" \
+ "ldr r3, %6 \n\t" \
+ "lsr r7, r3, #16 \n\t" \
+ "mov r9, r7 \n\t" \
+ "lsl r7, r3, #16 \n\t" \
+ "lsr r7, r7, #16 \n\t" \
+ "mov r8, r7 \n\t"
+
+#define MULADDC_CORE \
+ "ldmia r0!, {r6} \n\t" \
+ "lsr r7, r6, #16 \n\t" \
+ "lsl r6, r6, #16 \n\t" \
+ "lsr r6, r6, #16 \n\t" \
+ "mov r4, r8 \n\t" \
+ "mul r4, r6 \n\t" \
+ "mov r3, r9 \n\t" \
+ "mul r6, r3 \n\t" \
+ "mov r5, r9 \n\t" \
+ "mul r5, r7 \n\t" \
+ "mov r3, r8 \n\t" \
+ "mul r7, r3 \n\t" \
+ "lsr r3, r6, #16 \n\t" \
+ "add r5, r5, r3 \n\t" \
+ "lsr r3, r7, #16 \n\t" \
+ "add r5, r5, r3 \n\t" \
+ "add r4, r4, r2 \n\t" \
+ "mov r2, #0 \n\t" \
+ "adc r5, r2 \n\t" \
+ "lsl r3, r6, #16 \n\t" \
+ "add r4, r4, r3 \n\t" \
+ "adc r5, r2 \n\t" \
+ "lsl r3, r7, #16 \n\t" \
+ "add r4, r4, r3 \n\t" \
+ "adc r5, r2 \n\t" \
+ "ldr r3, [r1] \n\t" \
+ "add r4, r4, r3 \n\t" \
+ "adc r2, r5 \n\t" \
+ "stmia r1!, {r4} \n\t"
+
+#define MULADDC_STOP \
+ "str r2, %0 \n\t" \
+ "str r1, %1 \n\t" \
+ "str r0, %2 \n\t" \
+ : "=m" (c), "=m" (d), "=m" (s) \
+ : "m" (s), "m" (d), "m" (c), "m" (b) \
+ : "r0", "r1", "r2", "r3", "r4", "r5", \
+ "r6", "r7", "r8", "r9", "cc" \
+ );
+
+#elif defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1)
+
+#define MULADDC_INIT \
+ asm(
+
+#define MULADDC_CORE \
+ "ldr r0, [%0], #4 \n\t" \
+ "ldr r1, [%1] \n\t" \
+ "umaal r1, %2, %3, r0 \n\t" \
+ "str r1, [%1], #4 \n\t"
+
+#define MULADDC_STOP \
+ : "=r" (s), "=r" (d), "=r" (c) \
+ : "r" (b), "0" (s), "1" (d), "2" (c) \
+ : "r0", "r1", "memory" \
+ );
+
+#else
+
+#define MULADDC_INIT \
+ asm( \
+ "ldr r0, %3 \n\t" \
+ "ldr r1, %4 \n\t" \
+ "ldr r2, %5 \n\t" \
+ "ldr r3, %6 \n\t"
+
+#define MULADDC_CORE \
+ "ldr r4, [r0], #4 \n\t" \
+ "mov r5, #0 \n\t" \
+ "ldr r6, [r1] \n\t" \
+ "umlal r2, r5, r3, r4 \n\t" \
+ "adds r7, r6, r2 \n\t" \
+ "adc r2, r5, #0 \n\t" \
+ "str r7, [r1], #4 \n\t"
+
+#define MULADDC_STOP \
+ "str r2, %0 \n\t" \
+ "str r1, %1 \n\t" \
+ "str r0, %2 \n\t" \
+ : "=m" (c), "=m" (d), "=m" (s) \
+ : "m" (s), "m" (d), "m" (c), "m" (b) \
+ : "r0", "r1", "r2", "r3", "r4", "r5", \
+ "r6", "r7", "cc" \
+ );
+
+#endif /* Thumb */
+
+#endif /* ARMv3 */
+
+#if defined(__alpha__)
+
+#define MULADDC_INIT \
+ asm( \
+ "ldq $1, %3 \n\t" \
+ "ldq $2, %4 \n\t" \
+ "ldq $3, %5 \n\t" \
+ "ldq $4, %6 \n\t"
+
+#define MULADDC_CORE \
+ "ldq $6, 0($1) \n\t" \
+ "addq $1, 8, $1 \n\t" \
+ "mulq $6, $4, $7 \n\t" \
+ "umulh $6, $4, $6 \n\t" \
+ "addq $7, $3, $7 \n\t" \
+ "cmpult $7, $3, $3 \n\t" \
+ "ldq $5, 0($2) \n\t" \
+ "addq $7, $5, $7 \n\t" \
+ "cmpult $7, $5, $5 \n\t" \
+ "stq $7, 0($2) \n\t" \
+ "addq $2, 8, $2 \n\t" \
+ "addq $6, $3, $3 \n\t" \
+ "addq $5, $3, $3 \n\t"
+
+#define MULADDC_STOP \
+ "stq $3, %0 \n\t" \
+ "stq $2, %1 \n\t" \
+ "stq $1, %2 \n\t" \
+ : "=m" (c), "=m" (d), "=m" (s) \
+ : "m" (s), "m" (d), "m" (c), "m" (b) \
+ : "$1", "$2", "$3", "$4", "$5", "$6", "$7" \
+ );
+#endif /* Alpha */
+
+#if defined(__mips__) && !defined(__mips64)
+
+#define MULADDC_INIT \
+ asm( \
+ "lw $10, %3 \n\t" \
+ "lw $11, %4 \n\t" \
+ "lw $12, %5 \n\t" \
+ "lw $13, %6 \n\t"
+
+#define MULADDC_CORE \
+ "lw $14, 0($10) \n\t" \
+ "multu $13, $14 \n\t" \
+ "addi $10, $10, 4 \n\t" \
+ "mflo $14 \n\t" \
+ "mfhi $9 \n\t" \
+ "addu $14, $12, $14 \n\t" \
+ "lw $15, 0($11) \n\t" \
+ "sltu $12, $14, $12 \n\t" \
+ "addu $15, $14, $15 \n\t" \
+ "sltu $14, $15, $14 \n\t" \
+ "addu $12, $12, $9 \n\t" \
+ "sw $15, 0($11) \n\t" \
+ "addu $12, $12, $14 \n\t" \
+ "addi $11, $11, 4 \n\t"
+
+#define MULADDC_STOP \
+ "sw $12, %0 \n\t" \
+ "sw $11, %1 \n\t" \
+ "sw $10, %2 \n\t" \
+ : "=m" (c), "=m" (d), "=m" (s) \
+ : "m" (s), "m" (d), "m" (c), "m" (b) \
+ : "$9", "$10", "$11", "$12", "$13", "$14", "$15", "lo", "hi" \
+ );
+
+#endif /* MIPS */
+#endif /* GNUC */
+
+#if (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
+
+#define MULADDC_INIT \
+ __asm mov esi, s \
+ __asm mov edi, d \
+ __asm mov ecx, c \
+ __asm mov ebx, b
+
+#define MULADDC_CORE \
+ __asm lodsd \
+ __asm mul ebx \
+ __asm add eax, ecx \
+ __asm adc edx, 0 \
+ __asm add eax, [edi] \
+ __asm adc edx, 0 \
+ __asm mov ecx, edx \
+ __asm stosd
+
+#if defined(MBEDTLS_HAVE_SSE2)
+
+#define EMIT __asm _emit
+
+#define MULADDC_HUIT \
+ EMIT 0x0F EMIT 0x6E EMIT 0xC9 \
+ EMIT 0x0F EMIT 0x6E EMIT 0xC3 \
+ EMIT 0x0F EMIT 0x6E EMIT 0x1F \
+ EMIT 0x0F EMIT 0xD4 EMIT 0xCB \
+ EMIT 0x0F EMIT 0x6E EMIT 0x16 \
+ EMIT 0x0F EMIT 0xF4 EMIT 0xD0 \
+ EMIT 0x0F EMIT 0x6E EMIT 0x66 EMIT 0x04 \
+ EMIT 0x0F EMIT 0xF4 EMIT 0xE0 \
+ EMIT 0x0F EMIT 0x6E EMIT 0x76 EMIT 0x08 \
+ EMIT 0x0F EMIT 0xF4 EMIT 0xF0 \
+ EMIT 0x0F EMIT 0x6E EMIT 0x7E EMIT 0x0C \
+ EMIT 0x0F EMIT 0xF4 EMIT 0xF8 \
+ EMIT 0x0F EMIT 0xD4 EMIT 0xCA \
+ EMIT 0x0F EMIT 0x6E EMIT 0x5F EMIT 0x04 \
+ EMIT 0x0F EMIT 0xD4 EMIT 0xDC \
+ EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x08 \
+ EMIT 0x0F EMIT 0xD4 EMIT 0xEE \
+ EMIT 0x0F EMIT 0x6E EMIT 0x67 EMIT 0x0C \
+ EMIT 0x0F EMIT 0xD4 EMIT 0xFC \
+ EMIT 0x0F EMIT 0x7E EMIT 0x0F \
+ EMIT 0x0F EMIT 0x6E EMIT 0x56 EMIT 0x10 \
+ EMIT 0x0F EMIT 0xF4 EMIT 0xD0 \
+ EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \
+ EMIT 0x0F EMIT 0x6E EMIT 0x66 EMIT 0x14 \
+ EMIT 0x0F EMIT 0xF4 EMIT 0xE0 \
+ EMIT 0x0F EMIT 0xD4 EMIT 0xCB \
+ EMIT 0x0F EMIT 0x6E EMIT 0x76 EMIT 0x18 \
+ EMIT 0x0F EMIT 0xF4 EMIT 0xF0 \
+ EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x04 \
+ EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \
+ EMIT 0x0F EMIT 0x6E EMIT 0x5E EMIT 0x1C \
+ EMIT 0x0F EMIT 0xF4 EMIT 0xD8 \
+ EMIT 0x0F EMIT 0xD4 EMIT 0xCD \
+ EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x10 \
+ EMIT 0x0F EMIT 0xD4 EMIT 0xD5 \
+ EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x08 \
+ EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \
+ EMIT 0x0F EMIT 0xD4 EMIT 0xCF \
+ EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x14 \
+ EMIT 0x0F EMIT 0xD4 EMIT 0xE5 \
+ EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x0C \
+ EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \
+ EMIT 0x0F EMIT 0xD4 EMIT 0xCA \
+ EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x18 \
+ EMIT 0x0F EMIT 0xD4 EMIT 0xF5 \
+ EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x10 \
+ EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \
+ EMIT 0x0F EMIT 0xD4 EMIT 0xCC \
+ EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x1C \
+ EMIT 0x0F EMIT 0xD4 EMIT 0xDD \
+ EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x14 \
+ EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \
+ EMIT 0x0F EMIT 0xD4 EMIT 0xCE \
+ EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x18 \
+ EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \
+ EMIT 0x0F EMIT 0xD4 EMIT 0xCB \
+ EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x1C \
+ EMIT 0x83 EMIT 0xC7 EMIT 0x20 \
+ EMIT 0x83 EMIT 0xC6 EMIT 0x20 \
+ EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \
+ EMIT 0x0F EMIT 0x7E EMIT 0xC9
+
+#define MULADDC_STOP \
+ EMIT 0x0F EMIT 0x77 \
+ __asm mov c, ecx \
+ __asm mov d, edi \
+ __asm mov s, esi \
+
+#else
+
+#define MULADDC_STOP \
+ __asm mov c, ecx \
+ __asm mov d, edi \
+ __asm mov s, esi \
+
+#endif /* SSE2 */
+#endif /* MSVC */
+
+#endif /* MBEDTLS_HAVE_ASM */
+
+#if !defined(MULADDC_CORE)
+#if defined(MBEDTLS_HAVE_UDBL)
+
+#define MULADDC_INIT \
+{ \
+ mbedtls_t_udbl r; \
+ mbedtls_mpi_uint r0, r1;
+
+#define MULADDC_CORE \
+ r = *(s++) * (mbedtls_t_udbl) b; \
+ r0 = (mbedtls_mpi_uint) r; \
+ r1 = (mbedtls_mpi_uint)( r >> biL ); \
+ r0 += c; r1 += (r0 < c); \
+ r0 += *d; r1 += (r0 < *d); \
+ c = r1; *(d++) = r0;
+
+#define MULADDC_STOP \
+}
+
+#else
+#define MULADDC_INIT \
+{ \
+ mbedtls_mpi_uint s0, s1, b0, b1; \
+ mbedtls_mpi_uint r0, r1, rx, ry; \
+ b0 = ( b << biH ) >> biH; \
+ b1 = ( b >> biH );
+
+#define MULADDC_CORE \
+ s0 = ( *s << biH ) >> biH; \
+ s1 = ( *s >> biH ); s++; \
+ rx = s0 * b1; r0 = s0 * b0; \
+ ry = s1 * b0; r1 = s1 * b1; \
+ r1 += ( rx >> biH ); \
+ r1 += ( ry >> biH ); \
+ rx <<= biH; ry <<= biH; \
+ r0 += rx; r1 += (r0 < rx); \
+ r0 += ry; r1 += (r0 < ry); \
+ r0 += c; r1 += (r0 < c); \
+ r0 += *d; r1 += (r0 < *d); \
+ c = r1; *(d++) = r0;
+
+#define MULADDC_STOP \
+}
+
+#endif /* C (generic) */
+#endif /* C (longlong) */
+
+#endif /* bn_mul.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/camellia.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/camellia.h
new file mode 100644
index 0000000..3eeb663
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/camellia.h
@@ -0,0 +1,326 @@
+/**
+ * \file camellia.h
+ *
+ * \brief Camellia block cipher
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_CAMELLIA_H
+#define MBEDTLS_CAMELLIA_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+
+#include "platform_util.h"
+
+#define MBEDTLS_CAMELLIA_ENCRYPT 1
+#define MBEDTLS_CAMELLIA_DECRYPT 0
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#define MBEDTLS_ERR_CAMELLIA_INVALID_KEY_LENGTH MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( -0x0024 )
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+#define MBEDTLS_ERR_CAMELLIA_BAD_INPUT_DATA -0x0024 /**< Bad input data. */
+
+#define MBEDTLS_ERR_CAMELLIA_INVALID_INPUT_LENGTH -0x0026 /**< Invalid data input length. */
+
+/* MBEDTLS_ERR_CAMELLIA_HW_ACCEL_FAILED is deprecated and should not be used.
+ */
+#define MBEDTLS_ERR_CAMELLIA_HW_ACCEL_FAILED -0x0027 /**< Camellia hardware accelerator failed. */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_CAMELLIA_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief CAMELLIA context structure
+ */
+typedef struct mbedtls_camellia_context
+{
+ int nr; /*!< number of rounds */
+ uint32_t rk[68]; /*!< CAMELLIA round keys */
+}
+mbedtls_camellia_context;
+
+#else /* MBEDTLS_CAMELLIA_ALT */
+#include "camellia_alt.h"
+#endif /* MBEDTLS_CAMELLIA_ALT */
+
+/**
+ * \brief Initialize a CAMELLIA context.
+ *
+ * \param ctx The CAMELLIA context to be initialized.
+ * This must not be \c NULL.
+ */
+void mbedtls_camellia_init( mbedtls_camellia_context *ctx );
+
+/**
+ * \brief Clear a CAMELLIA context.
+ *
+ * \param ctx The CAMELLIA context to be cleared. This may be \c NULL,
+ * in which case this function returns immediately. If it is not
+ * \c NULL, it must be initialized.
+ */
+void mbedtls_camellia_free( mbedtls_camellia_context *ctx );
+
+/**
+ * \brief Perform a CAMELLIA key schedule operation for encryption.
+ *
+ * \param ctx The CAMELLIA context to use. This must be initialized.
+ * \param key The encryption key to use. This must be a readable buffer
+ * of size \p keybits Bits.
+ * \param keybits The length of \p key in Bits. This must be either \c 128,
+ * \c 192 or \c 256.
+ *
+ * \return \c 0 if successful.
+ * \return A negative error code on failure.
+ */
+int mbedtls_camellia_setkey_enc( mbedtls_camellia_context *ctx,
+ const unsigned char *key,
+ unsigned int keybits );
+
+/**
+ * \brief Perform a CAMELLIA key schedule operation for decryption.
+ *
+ * \param ctx The CAMELLIA context to use. This must be initialized.
+ * \param key The decryption key. This must be a readable buffer
+ * of size \p keybits Bits.
+ * \param keybits The length of \p key in Bits. This must be either \c 128,
+ * \c 192 or \c 256.
+ *
+ * \return \c 0 if successful.
+ * \return A negative error code on failure.
+ */
+int mbedtls_camellia_setkey_dec( mbedtls_camellia_context *ctx,
+ const unsigned char *key,
+ unsigned int keybits );
+
+/**
+ * \brief Perform a CAMELLIA-ECB block encryption/decryption operation.
+ *
+ * \param ctx The CAMELLIA context to use. This must be initialized
+ * and bound to a key.
+ * \param mode The mode of operation. This must be either
+ * #MBEDTLS_CAMELLIA_ENCRYPT or #MBEDTLS_CAMELLIA_DECRYPT.
+ * \param input The input block. This must be a readable buffer
+ * of size \c 16 Bytes.
+ * \param output The output block. This must be a writable buffer
+ * of size \c 16 Bytes.
+ *
+ * \return \c 0 if successful.
+ * \return A negative error code on failure.
+ */
+int mbedtls_camellia_crypt_ecb( mbedtls_camellia_context *ctx,
+ int mode,
+ const unsigned char input[16],
+ unsigned char output[16] );
+
+#if defined(MBEDTLS_CIPHER_MODE_CBC)
+/**
+ * \brief Perform a CAMELLIA-CBC buffer encryption/decryption operation.
+ *
+ * \note Upon exit, the content of the IV is updated so that you can
+ * call the function same function again on the following
+ * block(s) of data and get the same result as if it was
+ * encrypted in one call. This allows a "streaming" usage.
+ * If on the other hand you need to retain the contents of the
+ * IV, you should either save it manually or use the cipher
+ * module instead.
+ *
+ * \param ctx The CAMELLIA context to use. This must be initialized
+ * and bound to a key.
+ * \param mode The mode of operation. This must be either
+ * #MBEDTLS_CAMELLIA_ENCRYPT or #MBEDTLS_CAMELLIA_DECRYPT.
+ * \param length The length in Bytes of the input data \p input.
+ * This must be a multiple of \c 16 Bytes.
+ * \param iv The initialization vector. This must be a read/write buffer
+ * of length \c 16 Bytes. It is updated to allow streaming
+ * use as explained above.
+ * \param input The buffer holding the input data. This must point to a
+ * readable buffer of length \p length Bytes.
+ * \param output The buffer holding the output data. This must point to a
+ * writable buffer of length \p length Bytes.
+ *
+ * \return \c 0 if successful.
+ * \return A negative error code on failure.
+ */
+int mbedtls_camellia_crypt_cbc( mbedtls_camellia_context *ctx,
+ int mode,
+ size_t length,
+ unsigned char iv[16],
+ const unsigned char *input,
+ unsigned char *output );
+#endif /* MBEDTLS_CIPHER_MODE_CBC */
+
+#if defined(MBEDTLS_CIPHER_MODE_CFB)
+/**
+ * \brief Perform a CAMELLIA-CFB128 buffer encryption/decryption
+ * operation.
+ *
+ * \note Due to the nature of CFB mode, you should use the same
+ * key for both encryption and decryption. In particular, calls
+ * to this function should be preceded by a key-schedule via
+ * mbedtls_camellia_setkey_enc() regardless of whether \p mode
+ * is #MBEDTLS_CAMELLIA_ENCRYPT or #MBEDTLS_CAMELLIA_DECRYPT.
+ *
+ * \note Upon exit, the content of the IV is updated so that you can
+ * call the function same function again on the following
+ * block(s) of data and get the same result as if it was
+ * encrypted in one call. This allows a "streaming" usage.
+ * If on the other hand you need to retain the contents of the
+ * IV, you should either save it manually or use the cipher
+ * module instead.
+ *
+ * \param ctx The CAMELLIA context to use. This must be initialized
+ * and bound to a key.
+ * \param mode The mode of operation. This must be either
+ * #MBEDTLS_CAMELLIA_ENCRYPT or #MBEDTLS_CAMELLIA_DECRYPT.
+ * \param length The length of the input data \p input. Any value is allowed.
+ * \param iv_off The current offset in the IV. This must be smaller
+ * than \c 16 Bytes. It is updated after this call to allow
+ * the aforementioned streaming usage.
+ * \param iv The initialization vector. This must be a read/write buffer
+ * of length \c 16 Bytes. It is updated after this call to
+ * allow the aforementioned streaming usage.
+ * \param input The buffer holding the input data. This must be a readable
+ * buffer of size \p length Bytes.
+ * \param output The buffer to hold the output data. This must be a writable
+ * buffer of length \p length Bytes.
+ *
+ * \return \c 0 if successful.
+ * \return A negative error code on failure.
+ */
+int mbedtls_camellia_crypt_cfb128( mbedtls_camellia_context *ctx,
+ int mode,
+ size_t length,
+ size_t *iv_off,
+ unsigned char iv[16],
+ const unsigned char *input,
+ unsigned char *output );
+#endif /* MBEDTLS_CIPHER_MODE_CFB */
+
+#if defined(MBEDTLS_CIPHER_MODE_CTR)
+/**
+ * \brief Perform a CAMELLIA-CTR buffer encryption/decryption operation.
+ *
+ * *note Due to the nature of CTR mode, you should use the same
+ * key for both encryption and decryption. In particular, calls
+ * to this function should be preceded by a key-schedule via
+ * mbedtls_camellia_setkey_enc() regardless of whether \p mode
+ * is #MBEDTLS_CAMELLIA_ENCRYPT or #MBEDTLS_CAMELLIA_DECRYPT.
+ *
+ * \warning You must never reuse a nonce value with the same key. Doing so
+ * would void the encryption for the two messages encrypted with
+ * the same nonce and key.
+ *
+ * There are two common strategies for managing nonces with CTR:
+ *
+ * 1. You can handle everything as a single message processed over
+ * successive calls to this function. In that case, you want to
+ * set \p nonce_counter and \p nc_off to 0 for the first call, and
+ * then preserve the values of \p nonce_counter, \p nc_off and \p
+ * stream_block across calls to this function as they will be
+ * updated by this function.
+ *
+ * With this strategy, you must not encrypt more than 2**128
+ * blocks of data with the same key.
+ *
+ * 2. You can encrypt separate messages by dividing the \p
+ * nonce_counter buffer in two areas: the first one used for a
+ * per-message nonce, handled by yourself, and the second one
+ * updated by this function internally.
+ *
+ * For example, you might reserve the first \c 12 Bytes for the
+ * per-message nonce, and the last \c 4 Bytes for internal use.
+ * In that case, before calling this function on a new message you
+ * need to set the first \c 12 Bytes of \p nonce_counter to your
+ * chosen nonce value, the last four to \c 0, and \p nc_off to \c 0
+ * (which will cause \p stream_block to be ignored). That way, you
+ * can encrypt at most \c 2**96 messages of up to \c 2**32 blocks
+ * each with the same key.
+ *
+ * The per-message nonce (or information sufficient to reconstruct
+ * it) needs to be communicated with the ciphertext and must be
+ * unique. The recommended way to ensure uniqueness is to use a
+ * message counter. An alternative is to generate random nonces,
+ * but this limits the number of messages that can be securely
+ * encrypted: for example, with 96-bit random nonces, you should
+ * not encrypt more than 2**32 messages with the same key.
+ *
+ * Note that for both stategies, sizes are measured in blocks and
+ * that a CAMELLIA block is \c 16 Bytes.
+ *
+ * \warning Upon return, \p stream_block contains sensitive data. Its
+ * content must not be written to insecure storage and should be
+ * securely discarded as soon as it's no longer needed.
+ *
+ * \param ctx The CAMELLIA context to use. This must be initialized
+ * and bound to a key.
+ * \param length The length of the input data \p input in Bytes.
+ * Any value is allowed.
+ * \param nc_off The offset in the current \p stream_block (for resuming
+ * within current cipher stream). The offset pointer to
+ * should be \c 0 at the start of a stream. It is updated
+ * at the end of this call.
+ * \param nonce_counter The 128-bit nonce and counter. This must be a read/write
+ * buffer of length \c 16 Bytes.
+ * \param stream_block The saved stream-block for resuming. This must be a
+ * read/write buffer of length \c 16 Bytes.
+ * \param input The input data stream. This must be a readable buffer of
+ * size \p length Bytes.
+ * \param output The output data stream. This must be a writable buffer
+ * of size \p length Bytes.
+ *
+ * \return \c 0 if successful.
+ * \return A negative error code on failure.
+ */
+int mbedtls_camellia_crypt_ctr( mbedtls_camellia_context *ctx,
+ size_t length,
+ size_t *nc_off,
+ unsigned char nonce_counter[16],
+ unsigned char stream_block[16],
+ const unsigned char *input,
+ unsigned char *output );
+#endif /* MBEDTLS_CIPHER_MODE_CTR */
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief Checkup routine
+ *
+ * \return 0 if successful, or 1 if the test failed
+ */
+int mbedtls_camellia_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* camellia.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ccm.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ccm.h
new file mode 100644
index 0000000..f03e3b5
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ccm.h
@@ -0,0 +1,310 @@
+/**
+ * \file ccm.h
+ *
+ * \brief This file provides an API for the CCM authenticated encryption
+ * mode for block ciphers.
+ *
+ * CCM combines Counter mode encryption with CBC-MAC authentication
+ * for 128-bit block ciphers.
+ *
+ * Input to CCM includes the following elements:
+ * <ul><li>Payload - data that is both authenticated and encrypted.</li>
+ * <li>Associated data (Adata) - data that is authenticated but not
+ * encrypted, For example, a header.</li>
+ * <li>Nonce - A unique value that is assigned to the payload and the
+ * associated data.</li></ul>
+ *
+ * Definition of CCM:
+ * http://csrc.nist.gov/publications/nistpubs/800-38C/SP800-38C_updated-July20_2007.pdf
+ * RFC 3610 "Counter with CBC-MAC (CCM)"
+ *
+ * Related:
+ * RFC 5116 "An Interface and Algorithms for Authenticated Encryption"
+ *
+ * Definition of CCM*:
+ * IEEE 802.15.4 - IEEE Standard for Local and metropolitan area networks
+ * Integer representation is fixed most-significant-octet-first order and
+ * the representation of octets is most-significant-bit-first order. This is
+ * consistent with RFC 3610.
+ */
+/*
+ * Copyright (C) 2006-2018, Arm Limited (or its affiliates), All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of Mbed TLS (https://tls.mbed.org)
+ */
+
+#ifndef MBEDTLS_CCM_H
+#define MBEDTLS_CCM_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "cipher.h"
+
+#define MBEDTLS_ERR_CCM_BAD_INPUT -0x000D /**< Bad input parameters to the function. */
+#define MBEDTLS_ERR_CCM_AUTH_FAILED -0x000F /**< Authenticated decryption failed. */
+
+/* MBEDTLS_ERR_CCM_HW_ACCEL_FAILED is deprecated and should not be used. */
+#define MBEDTLS_ERR_CCM_HW_ACCEL_FAILED -0x0011 /**< CCM hardware accelerator failed. */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_CCM_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief The CCM context-type definition. The CCM context is passed
+ * to the APIs called.
+ */
+typedef struct mbedtls_ccm_context
+{
+ mbedtls_cipher_context_t cipher_ctx; /*!< The cipher context used. */
+}
+mbedtls_ccm_context;
+
+#else /* MBEDTLS_CCM_ALT */
+#include "ccm_alt.h"
+#endif /* MBEDTLS_CCM_ALT */
+
+/**
+ * \brief This function initializes the specified CCM context,
+ * to make references valid, and prepare the context
+ * for mbedtls_ccm_setkey() or mbedtls_ccm_free().
+ *
+ * \param ctx The CCM context to initialize. This must not be \c NULL.
+ */
+void mbedtls_ccm_init( mbedtls_ccm_context *ctx );
+
+/**
+ * \brief This function initializes the CCM context set in the
+ * \p ctx parameter and sets the encryption key.
+ *
+ * \param ctx The CCM context to initialize. This must be an initialized
+ * context.
+ * \param cipher The 128-bit block cipher to use.
+ * \param key The encryption key. This must not be \c NULL.
+ * \param keybits The key size in bits. This must be acceptable by the cipher.
+ *
+ * \return \c 0 on success.
+ * \return A CCM or cipher-specific error code on failure.
+ */
+int mbedtls_ccm_setkey( mbedtls_ccm_context *ctx,
+ mbedtls_cipher_id_t cipher,
+ const unsigned char *key,
+ unsigned int keybits );
+
+/**
+ * \brief This function releases and clears the specified CCM context
+ * and underlying cipher sub-context.
+ *
+ * \param ctx The CCM context to clear. If this is \c NULL, the function
+ * has no effect. Otherwise, this must be initialized.
+ */
+void mbedtls_ccm_free( mbedtls_ccm_context *ctx );
+
+/**
+ * \brief This function encrypts a buffer using CCM.
+ *
+ * \note The tag is written to a separate buffer. To concatenate
+ * the \p tag with the \p output, as done in <em>RFC-3610:
+ * Counter with CBC-MAC (CCM)</em>, use
+ * \p tag = \p output + \p length, and make sure that the
+ * output buffer is at least \p length + \p tag_len wide.
+ *
+ * \param ctx The CCM context to use for encryption. This must be
+ * initialized and bound to a key.
+ * \param length The length of the input data in Bytes.
+ * \param iv The initialization vector (nonce). This must be a readable
+ * buffer of at least \p iv_len Bytes.
+ * \param iv_len The length of the nonce in Bytes: 7, 8, 9, 10, 11, 12,
+ * or 13. The length L of the message length field is
+ * 15 - \p iv_len.
+ * \param add The additional data field. If \p add_len is greater than
+ * zero, \p add must be a readable buffer of at least that
+ * length.
+ * \param add_len The length of additional data in Bytes.
+ * This must be less than `2^16 - 2^8`.
+ * \param input The buffer holding the input data. If \p length is greater
+ * than zero, \p input must be a readable buffer of at least
+ * that length.
+ * \param output The buffer holding the output data. If \p length is greater
+ * than zero, \p output must be a writable buffer of at least
+ * that length.
+ * \param tag The buffer holding the authentication field. This must be a
+ * readable buffer of at least \p tag_len Bytes.
+ * \param tag_len The length of the authentication field to generate in Bytes:
+ * 4, 6, 8, 10, 12, 14 or 16.
+ *
+ * \return \c 0 on success.
+ * \return A CCM or cipher-specific error code on failure.
+ */
+int mbedtls_ccm_encrypt_and_tag( mbedtls_ccm_context *ctx, size_t length,
+ const unsigned char *iv, size_t iv_len,
+ const unsigned char *add, size_t add_len,
+ const unsigned char *input, unsigned char *output,
+ unsigned char *tag, size_t tag_len );
+
+/**
+ * \brief This function encrypts a buffer using CCM*.
+ *
+ * \note The tag is written to a separate buffer. To concatenate
+ * the \p tag with the \p output, as done in <em>RFC-3610:
+ * Counter with CBC-MAC (CCM)</em>, use
+ * \p tag = \p output + \p length, and make sure that the
+ * output buffer is at least \p length + \p tag_len wide.
+ *
+ * \note When using this function in a variable tag length context,
+ * the tag length has to be encoded into the \p iv passed to
+ * this function.
+ *
+ * \param ctx The CCM context to use for encryption. This must be
+ * initialized and bound to a key.
+ * \param length The length of the input data in Bytes.
+ * \param iv The initialization vector (nonce). This must be a readable
+ * buffer of at least \p iv_len Bytes.
+ * \param iv_len The length of the nonce in Bytes: 7, 8, 9, 10, 11, 12,
+ * or 13. The length L of the message length field is
+ * 15 - \p iv_len.
+ * \param add The additional data field. This must be a readable buffer of
+ * at least \p add_len Bytes.
+ * \param add_len The length of additional data in Bytes.
+ * This must be less than 2^16 - 2^8.
+ * \param input The buffer holding the input data. If \p length is greater
+ * than zero, \p input must be a readable buffer of at least
+ * that length.
+ * \param output The buffer holding the output data. If \p length is greater
+ * than zero, \p output must be a writable buffer of at least
+ * that length.
+ * \param tag The buffer holding the authentication field. This must be a
+ * readable buffer of at least \p tag_len Bytes.
+ * \param tag_len The length of the authentication field to generate in Bytes:
+ * 0, 4, 6, 8, 10, 12, 14 or 16.
+ *
+ * \warning Passing \c 0 as \p tag_len means that the message is no
+ * longer authenticated.
+ *
+ * \return \c 0 on success.
+ * \return A CCM or cipher-specific error code on failure.
+ */
+int mbedtls_ccm_star_encrypt_and_tag( mbedtls_ccm_context *ctx, size_t length,
+ const unsigned char *iv, size_t iv_len,
+ const unsigned char *add, size_t add_len,
+ const unsigned char *input, unsigned char *output,
+ unsigned char *tag, size_t tag_len );
+
+/**
+ * \brief This function performs a CCM authenticated decryption of a
+ * buffer.
+ *
+ * \param ctx The CCM context to use for decryption. This must be
+ * initialized and bound to a key.
+ * \param length The length of the input data in Bytes.
+ * \param iv The initialization vector (nonce). This must be a readable
+ * buffer of at least \p iv_len Bytes.
+ * \param iv_len The length of the nonce in Bytes: 7, 8, 9, 10, 11, 12,
+ * or 13. The length L of the message length field is
+ * 15 - \p iv_len.
+ * \param add The additional data field. This must be a readable buffer
+ * of at least that \p add_len Bytes..
+ * \param add_len The length of additional data in Bytes.
+ * This must be less than 2^16 - 2^8.
+ * \param input The buffer holding the input data. If \p length is greater
+ * than zero, \p input must be a readable buffer of at least
+ * that length.
+ * \param output The buffer holding the output data. If \p length is greater
+ * than zero, \p output must be a writable buffer of at least
+ * that length.
+ * \param tag The buffer holding the authentication field. This must be a
+ * readable buffer of at least \p tag_len Bytes.
+ * \param tag_len The length of the authentication field to generate in Bytes:
+ * 4, 6, 8, 10, 12, 14 or 16.
+ *
+ * \return \c 0 on success. This indicates that the message is authentic.
+ * \return #MBEDTLS_ERR_CCM_AUTH_FAILED if the tag does not match.
+ * \return A cipher-specific error code on calculation failure.
+ */
+int mbedtls_ccm_auth_decrypt( mbedtls_ccm_context *ctx, size_t length,
+ const unsigned char *iv, size_t iv_len,
+ const unsigned char *add, size_t add_len,
+ const unsigned char *input, unsigned char *output,
+ const unsigned char *tag, size_t tag_len );
+
+/**
+ * \brief This function performs a CCM* authenticated decryption of a
+ * buffer.
+ *
+ * \note When using this function in a variable tag length context,
+ * the tag length has to be decoded from \p iv and passed to
+ * this function as \p tag_len. (\p tag needs to be adjusted
+ * accordingly.)
+ *
+ * \param ctx The CCM context to use for decryption. This must be
+ * initialized and bound to a key.
+ * \param length The length of the input data in Bytes.
+ * \param iv The initialization vector (nonce). This must be a readable
+ * buffer of at least \p iv_len Bytes.
+ * \param iv_len The length of the nonce in Bytes: 7, 8, 9, 10, 11, 12,
+ * or 13. The length L of the message length field is
+ * 15 - \p iv_len.
+ * \param add The additional data field. This must be a readable buffer of
+ * at least that \p add_len Bytes.
+ * \param add_len The length of additional data in Bytes.
+ * This must be less than 2^16 - 2^8.
+ * \param input The buffer holding the input data. If \p length is greater
+ * than zero, \p input must be a readable buffer of at least
+ * that length.
+ * \param output The buffer holding the output data. If \p length is greater
+ * than zero, \p output must be a writable buffer of at least
+ * that length.
+ * \param tag The buffer holding the authentication field. This must be a
+ * readable buffer of at least \p tag_len Bytes.
+ * \param tag_len The length of the authentication field in Bytes.
+ * 0, 4, 6, 8, 10, 12, 14 or 16.
+ *
+ * \warning Passing \c 0 as \p tag_len means that the message is nos
+ * longer authenticated.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_CCM_AUTH_FAILED if the tag does not match.
+ * \return A cipher-specific error code on calculation failure.
+ */
+int mbedtls_ccm_star_auth_decrypt( mbedtls_ccm_context *ctx, size_t length,
+ const unsigned char *iv, size_t iv_len,
+ const unsigned char *add, size_t add_len,
+ const unsigned char *input, unsigned char *output,
+ const unsigned char *tag, size_t tag_len );
+
+#if defined(MBEDTLS_SELF_TEST) && defined(MBEDTLS_AES_C)
+/**
+ * \brief The CCM checkup routine.
+ *
+ * \return \c 0 on success.
+ * \return \c 1 on failure.
+ */
+int mbedtls_ccm_self_test( int verbose );
+#endif /* MBEDTLS_SELF_TEST && MBEDTLS_AES_C */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_CCM_H */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ccm_alt.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ccm_alt.h
new file mode 100644
index 0000000..f8b0b20
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ccm_alt.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause OR Arm’s non-OSI source license
+ */
+
+#ifndef MBEDTLS_CCM_ALT_H
+#define MBEDTLS_CCM_ALT_H
+
+#if defined(MBEDTLS_CONFIG_FILE)
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+#include "mbedtls/cipher.h"
+
+#if defined (MBEDTLS_CCM_ALT)
+
+#define MBEDTLS_ERR_CCM_BAD_INPUT -0x000D /**< Bad input parameters to function. */
+#define MBEDTLS_ERR_CCM_AUTH_FAILED -0x000F /**< Authenticated decryption failed. */
+
+/* The Size of the CCM context.*/
+#define MBEDTLS_CCM_CONTEXT_SIZE_IN_WORDS (96)
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief The CCM context-type definition. The CCM context is passed
+ * to the APIs called.
+ */
+typedef struct {
+ uint32_t buf[MBEDTLS_CCM_CONTEXT_SIZE_IN_WORDS];
+}
+mbedtls_ccm_context;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_CCM_ALT */
+
+#endif /* MBEDTLS_CCM_ALT_H */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/certs.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/certs.h
new file mode 100644
index 0000000..179ebbb
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/certs.h
@@ -0,0 +1,252 @@
+/**
+ * \file certs.h
+ *
+ * \brief Sample certificates and DHM parameters for testing
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_CERTS_H
+#define MBEDTLS_CERTS_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* List of all PEM-encoded CA certificates, terminated by NULL;
+ * PEM encoded if MBEDTLS_PEM_PARSE_C is enabled, DER encoded
+ * otherwise. */
+extern const char * mbedtls_test_cas[];
+extern const size_t mbedtls_test_cas_len[];
+
+/* List of all DER-encoded CA certificates, terminated by NULL */
+extern const unsigned char * mbedtls_test_cas_der[];
+extern const size_t mbedtls_test_cas_der_len[];
+
+#if defined(MBEDTLS_PEM_PARSE_C)
+/* Concatenation of all CA certificates in PEM format if available */
+extern const char mbedtls_test_cas_pem[];
+extern const size_t mbedtls_test_cas_pem_len;
+#endif /* MBEDTLS_PEM_PARSE_C */
+
+/*
+ * CA test certificates
+ */
+
+extern const char mbedtls_test_ca_crt_ec_pem[];
+extern const char mbedtls_test_ca_key_ec_pem[];
+extern const char mbedtls_test_ca_pwd_ec_pem[];
+extern const char mbedtls_test_ca_key_rsa_pem[];
+extern const char mbedtls_test_ca_pwd_rsa_pem[];
+extern const char mbedtls_test_ca_crt_rsa_sha1_pem[];
+extern const char mbedtls_test_ca_crt_rsa_sha256_pem[];
+
+extern const unsigned char mbedtls_test_ca_crt_ec_der[];
+extern const unsigned char mbedtls_test_ca_key_ec_der[];
+extern const unsigned char mbedtls_test_ca_key_rsa_der[];
+extern const unsigned char mbedtls_test_ca_crt_rsa_sha1_der[];
+extern const unsigned char mbedtls_test_ca_crt_rsa_sha256_der[];
+
+extern const size_t mbedtls_test_ca_crt_ec_pem_len;
+extern const size_t mbedtls_test_ca_key_ec_pem_len;
+extern const size_t mbedtls_test_ca_pwd_ec_pem_len;
+extern const size_t mbedtls_test_ca_key_rsa_pem_len;
+extern const size_t mbedtls_test_ca_pwd_rsa_pem_len;
+extern const size_t mbedtls_test_ca_crt_rsa_sha1_pem_len;
+extern const size_t mbedtls_test_ca_crt_rsa_sha256_pem_len;
+
+extern const size_t mbedtls_test_ca_crt_ec_der_len;
+extern const size_t mbedtls_test_ca_key_ec_der_len;
+extern const size_t mbedtls_test_ca_pwd_ec_der_len;
+extern const size_t mbedtls_test_ca_key_rsa_der_len;
+extern const size_t mbedtls_test_ca_pwd_rsa_der_len;
+extern const size_t mbedtls_test_ca_crt_rsa_sha1_der_len;
+extern const size_t mbedtls_test_ca_crt_rsa_sha256_der_len;
+
+/* Config-dependent dispatch between PEM and DER encoding
+ * (PEM if enabled, otherwise DER) */
+
+extern const char mbedtls_test_ca_crt_ec[];
+extern const char mbedtls_test_ca_key_ec[];
+extern const char mbedtls_test_ca_pwd_ec[];
+extern const char mbedtls_test_ca_key_rsa[];
+extern const char mbedtls_test_ca_pwd_rsa[];
+extern const char mbedtls_test_ca_crt_rsa_sha1[];
+extern const char mbedtls_test_ca_crt_rsa_sha256[];
+
+extern const size_t mbedtls_test_ca_crt_ec_len;
+extern const size_t mbedtls_test_ca_key_ec_len;
+extern const size_t mbedtls_test_ca_pwd_ec_len;
+extern const size_t mbedtls_test_ca_key_rsa_len;
+extern const size_t mbedtls_test_ca_pwd_rsa_len;
+extern const size_t mbedtls_test_ca_crt_rsa_sha1_len;
+extern const size_t mbedtls_test_ca_crt_rsa_sha256_len;
+
+/* Config-dependent dispatch between SHA-1 and SHA-256
+ * (SHA-256 if enabled, otherwise SHA-1) */
+
+extern const char mbedtls_test_ca_crt_rsa[];
+extern const size_t mbedtls_test_ca_crt_rsa_len;
+
+/* Config-dependent dispatch between EC and RSA
+ * (RSA if enabled, otherwise EC) */
+
+extern const char * mbedtls_test_ca_crt;
+extern const char * mbedtls_test_ca_key;
+extern const char * mbedtls_test_ca_pwd;
+extern const size_t mbedtls_test_ca_crt_len;
+extern const size_t mbedtls_test_ca_key_len;
+extern const size_t mbedtls_test_ca_pwd_len;
+
+/*
+ * Server test certificates
+ */
+
+extern const char mbedtls_test_srv_crt_ec_pem[];
+extern const char mbedtls_test_srv_key_ec_pem[];
+extern const char mbedtls_test_srv_pwd_ec_pem[];
+extern const char mbedtls_test_srv_key_rsa_pem[];
+extern const char mbedtls_test_srv_pwd_rsa_pem[];
+extern const char mbedtls_test_srv_crt_rsa_sha1_pem[];
+extern const char mbedtls_test_srv_crt_rsa_sha256_pem[];
+
+extern const unsigned char mbedtls_test_srv_crt_ec_der[];
+extern const unsigned char mbedtls_test_srv_key_ec_der[];
+extern const unsigned char mbedtls_test_srv_key_rsa_der[];
+extern const unsigned char mbedtls_test_srv_crt_rsa_sha1_der[];
+extern const unsigned char mbedtls_test_srv_crt_rsa_sha256_der[];
+
+extern const size_t mbedtls_test_srv_crt_ec_pem_len;
+extern const size_t mbedtls_test_srv_key_ec_pem_len;
+extern const size_t mbedtls_test_srv_pwd_ec_pem_len;
+extern const size_t mbedtls_test_srv_key_rsa_pem_len;
+extern const size_t mbedtls_test_srv_pwd_rsa_pem_len;
+extern const size_t mbedtls_test_srv_crt_rsa_sha1_pem_len;
+extern const size_t mbedtls_test_srv_crt_rsa_sha256_pem_len;
+
+extern const size_t mbedtls_test_srv_crt_ec_der_len;
+extern const size_t mbedtls_test_srv_key_ec_der_len;
+extern const size_t mbedtls_test_srv_pwd_ec_der_len;
+extern const size_t mbedtls_test_srv_key_rsa_der_len;
+extern const size_t mbedtls_test_srv_pwd_rsa_der_len;
+extern const size_t mbedtls_test_srv_crt_rsa_sha1_der_len;
+extern const size_t mbedtls_test_srv_crt_rsa_sha256_der_len;
+
+/* Config-dependent dispatch between PEM and DER encoding
+ * (PEM if enabled, otherwise DER) */
+
+extern const char mbedtls_test_srv_crt_ec[];
+extern const char mbedtls_test_srv_key_ec[];
+extern const char mbedtls_test_srv_pwd_ec[];
+extern const char mbedtls_test_srv_key_rsa[];
+extern const char mbedtls_test_srv_pwd_rsa[];
+extern const char mbedtls_test_srv_crt_rsa_sha1[];
+extern const char mbedtls_test_srv_crt_rsa_sha256[];
+
+extern const size_t mbedtls_test_srv_crt_ec_len;
+extern const size_t mbedtls_test_srv_key_ec_len;
+extern const size_t mbedtls_test_srv_pwd_ec_len;
+extern const size_t mbedtls_test_srv_key_rsa_len;
+extern const size_t mbedtls_test_srv_pwd_rsa_len;
+extern const size_t mbedtls_test_srv_crt_rsa_sha1_len;
+extern const size_t mbedtls_test_srv_crt_rsa_sha256_len;
+
+/* Config-dependent dispatch between SHA-1 and SHA-256
+ * (SHA-256 if enabled, otherwise SHA-1) */
+
+extern const char mbedtls_test_srv_crt_rsa[];
+extern const size_t mbedtls_test_srv_crt_rsa_len;
+
+/* Config-dependent dispatch between EC and RSA
+ * (RSA if enabled, otherwise EC) */
+
+extern const char * mbedtls_test_srv_crt;
+extern const char * mbedtls_test_srv_key;
+extern const char * mbedtls_test_srv_pwd;
+extern const size_t mbedtls_test_srv_crt_len;
+extern const size_t mbedtls_test_srv_key_len;
+extern const size_t mbedtls_test_srv_pwd_len;
+
+/*
+ * Client test certificates
+ */
+
+extern const char mbedtls_test_cli_crt_ec_pem[];
+extern const char mbedtls_test_cli_key_ec_pem[];
+extern const char mbedtls_test_cli_pwd_ec_pem[];
+extern const char mbedtls_test_cli_key_rsa_pem[];
+extern const char mbedtls_test_cli_pwd_rsa_pem[];
+extern const char mbedtls_test_cli_crt_rsa_pem[];
+
+extern const unsigned char mbedtls_test_cli_crt_ec_der[];
+extern const unsigned char mbedtls_test_cli_key_ec_der[];
+extern const unsigned char mbedtls_test_cli_key_rsa_der[];
+extern const unsigned char mbedtls_test_cli_crt_rsa_der[];
+
+extern const size_t mbedtls_test_cli_crt_ec_pem_len;
+extern const size_t mbedtls_test_cli_key_ec_pem_len;
+extern const size_t mbedtls_test_cli_pwd_ec_pem_len;
+extern const size_t mbedtls_test_cli_key_rsa_pem_len;
+extern const size_t mbedtls_test_cli_pwd_rsa_pem_len;
+extern const size_t mbedtls_test_cli_crt_rsa_pem_len;
+
+extern const size_t mbedtls_test_cli_crt_ec_der_len;
+extern const size_t mbedtls_test_cli_key_ec_der_len;
+extern const size_t mbedtls_test_cli_key_rsa_der_len;
+extern const size_t mbedtls_test_cli_crt_rsa_der_len;
+
+/* Config-dependent dispatch between PEM and DER encoding
+ * (PEM if enabled, otherwise DER) */
+
+extern const char mbedtls_test_cli_crt_ec[];
+extern const char mbedtls_test_cli_key_ec[];
+extern const char mbedtls_test_cli_pwd_ec[];
+extern const char mbedtls_test_cli_key_rsa[];
+extern const char mbedtls_test_cli_pwd_rsa[];
+extern const char mbedtls_test_cli_crt_rsa[];
+
+extern const size_t mbedtls_test_cli_crt_ec_len;
+extern const size_t mbedtls_test_cli_key_ec_len;
+extern const size_t mbedtls_test_cli_pwd_ec_len;
+extern const size_t mbedtls_test_cli_key_rsa_len;
+extern const size_t mbedtls_test_cli_pwd_rsa_len;
+extern const size_t mbedtls_test_cli_crt_rsa_len;
+
+/* Config-dependent dispatch between EC and RSA
+ * (RSA if enabled, otherwise EC) */
+
+extern const char * mbedtls_test_cli_crt;
+extern const char * mbedtls_test_cli_key;
+extern const char * mbedtls_test_cli_pwd;
+extern const size_t mbedtls_test_cli_crt_len;
+extern const size_t mbedtls_test_cli_key_len;
+extern const size_t mbedtls_test_cli_pwd_len;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* certs.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/chacha20.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/chacha20.h
new file mode 100644
index 0000000..2ae5e6e
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/chacha20.h
@@ -0,0 +1,226 @@
+/**
+ * \file chacha20.h
+ *
+ * \brief This file contains ChaCha20 definitions and functions.
+ *
+ * ChaCha20 is a stream cipher that can encrypt and decrypt
+ * information. ChaCha was created by Daniel Bernstein as a variant of
+ * its Salsa cipher https://cr.yp.to/chacha/chacha-20080128.pdf
+ * ChaCha20 is the variant with 20 rounds, that was also standardized
+ * in RFC 7539.
+ *
+ * \author Daniel King <damaki.gh@gmail.com>
+ */
+
+/* Copyright (C) 2006-2018, Arm Limited (or its affiliates), All Rights Reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of Mbed TLS (https://tls.mbed.org)
+ */
+
+#ifndef MBEDTLS_CHACHA20_H
+#define MBEDTLS_CHACHA20_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stdint.h>
+#include <stddef.h>
+
+#define MBEDTLS_ERR_CHACHA20_BAD_INPUT_DATA -0x0051 /**< Invalid input parameter(s). */
+
+/* MBEDTLS_ERR_CHACHA20_FEATURE_UNAVAILABLE is deprecated and should not be
+ * used. */
+#define MBEDTLS_ERR_CHACHA20_FEATURE_UNAVAILABLE -0x0053 /**< Feature not available. For example, s part of the API is not implemented. */
+
+/* MBEDTLS_ERR_CHACHA20_HW_ACCEL_FAILED is deprecated and should not be used.
+ */
+#define MBEDTLS_ERR_CHACHA20_HW_ACCEL_FAILED -0x0055 /**< Chacha20 hardware accelerator failed. */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_CHACHA20_ALT)
+
+typedef struct mbedtls_chacha20_context
+{
+ uint32_t state[16]; /*! The state (before round operations). */
+ uint8_t keystream8[64]; /*! Leftover keystream bytes. */
+ size_t keystream_bytes_used; /*! Number of keystream bytes already used. */
+}
+mbedtls_chacha20_context;
+
+#else /* MBEDTLS_CHACHA20_ALT */
+#include "chacha20_alt.h"
+#endif /* MBEDTLS_CHACHA20_ALT */
+
+/**
+ * \brief This function initializes the specified ChaCha20 context.
+ *
+ * It must be the first API called before using
+ * the context.
+ *
+ * It is usually followed by calls to
+ * \c mbedtls_chacha20_setkey() and
+ * \c mbedtls_chacha20_starts(), then one or more calls to
+ * to \c mbedtls_chacha20_update(), and finally to
+ * \c mbedtls_chacha20_free().
+ *
+ * \param ctx The ChaCha20 context to initialize.
+ * This must not be \c NULL.
+ */
+void mbedtls_chacha20_init( mbedtls_chacha20_context *ctx );
+
+/**
+ * \brief This function releases and clears the specified
+ * ChaCha20 context.
+ *
+ * \param ctx The ChaCha20 context to clear. This may be \c NULL,
+ * in which case this function is a no-op. If it is not
+ * \c NULL, it must point to an initialized context.
+ *
+ */
+void mbedtls_chacha20_free( mbedtls_chacha20_context *ctx );
+
+/**
+ * \brief This function sets the encryption/decryption key.
+ *
+ * \note After using this function, you must also call
+ * \c mbedtls_chacha20_starts() to set a nonce before you
+ * start encrypting/decrypting data with
+ * \c mbedtls_chacha_update().
+ *
+ * \param ctx The ChaCha20 context to which the key should be bound.
+ * It must be initialized.
+ * \param key The encryption/decryption key. This must be \c 32 Bytes
+ * in length.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_CHACHA20_BAD_INPUT_DATA if ctx or key is NULL.
+ */
+int mbedtls_chacha20_setkey( mbedtls_chacha20_context *ctx,
+ const unsigned char key[32] );
+
+/**
+ * \brief This function sets the nonce and initial counter value.
+ *
+ * \note A ChaCha20 context can be re-used with the same key by
+ * calling this function to change the nonce.
+ *
+ * \warning You must never use the same nonce twice with the same key.
+ * This would void any confidentiality guarantees for the
+ * messages encrypted with the same nonce and key.
+ *
+ * \param ctx The ChaCha20 context to which the nonce should be bound.
+ * It must be initialized and bound to a key.
+ * \param nonce The nonce. This must be \c 12 Bytes in size.
+ * \param counter The initial counter value. This is usually \c 0.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_CHACHA20_BAD_INPUT_DATA if ctx or nonce is
+ * NULL.
+ */
+int mbedtls_chacha20_starts( mbedtls_chacha20_context* ctx,
+ const unsigned char nonce[12],
+ uint32_t counter );
+
+/**
+ * \brief This function encrypts or decrypts data.
+ *
+ * Since ChaCha20 is a stream cipher, the same operation is
+ * used for encrypting and decrypting data.
+ *
+ * \note The \p input and \p output pointers must either be equal or
+ * point to non-overlapping buffers.
+ *
+ * \note \c mbedtls_chacha20_setkey() and
+ * \c mbedtls_chacha20_starts() must be called at least once
+ * to setup the context before this function can be called.
+ *
+ * \note This function can be called multiple times in a row in
+ * order to encrypt of decrypt data piecewise with the same
+ * key and nonce.
+ *
+ * \param ctx The ChaCha20 context to use for encryption or decryption.
+ * It must be initialized and bound to a key and nonce.
+ * \param size The length of the input data in Bytes.
+ * \param input The buffer holding the input data.
+ * This pointer can be \c NULL if `size == 0`.
+ * \param output The buffer holding the output data.
+ * This must be able to hold \p size Bytes.
+ * This pointer can be \c NULL if `size == 0`.
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_chacha20_update( mbedtls_chacha20_context *ctx,
+ size_t size,
+ const unsigned char *input,
+ unsigned char *output );
+
+/**
+ * \brief This function encrypts or decrypts data with ChaCha20 and
+ * the given key and nonce.
+ *
+ * Since ChaCha20 is a stream cipher, the same operation is
+ * used for encrypting and decrypting data.
+ *
+ * \warning You must never use the same (key, nonce) pair more than
+ * once. This would void any confidentiality guarantees for
+ * the messages encrypted with the same nonce and key.
+ *
+ * \note The \p input and \p output pointers must either be equal or
+ * point to non-overlapping buffers.
+ *
+ * \param key The encryption/decryption key.
+ * This must be \c 32 Bytes in length.
+ * \param nonce The nonce. This must be \c 12 Bytes in size.
+ * \param counter The initial counter value. This is usually \c 0.
+ * \param size The length of the input data in Bytes.
+ * \param input The buffer holding the input data.
+ * This pointer can be \c NULL if `size == 0`.
+ * \param output The buffer holding the output data.
+ * This must be able to hold \p size Bytes.
+ * This pointer can be \c NULL if `size == 0`.
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_chacha20_crypt( const unsigned char key[32],
+ const unsigned char nonce[12],
+ uint32_t counter,
+ size_t size,
+ const unsigned char* input,
+ unsigned char* output );
+
+#if defined(MBEDTLS_SELF_TEST)
+/**
+ * \brief The ChaCha20 checkup routine.
+ *
+ * \return \c 0 on success.
+ * \return \c 1 on failure.
+ */
+int mbedtls_chacha20_self_test( int verbose );
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_CHACHA20_H */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/chachapoly.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/chachapoly.h
new file mode 100644
index 0000000..49e615d
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/chachapoly.h
@@ -0,0 +1,358 @@
+/**
+ * \file chachapoly.h
+ *
+ * \brief This file contains the AEAD-ChaCha20-Poly1305 definitions and
+ * functions.
+ *
+ * ChaCha20-Poly1305 is an algorithm for Authenticated Encryption
+ * with Associated Data (AEAD) that can be used to encrypt and
+ * authenticate data. It is based on ChaCha20 and Poly1305 by Daniel
+ * Bernstein and was standardized in RFC 7539.
+ *
+ * \author Daniel King <damaki.gh@gmail.com>
+ */
+
+/* Copyright (C) 2006-2018, Arm Limited (or its affiliates), All Rights Reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of Mbed TLS (https://tls.mbed.org)
+ */
+
+#ifndef MBEDTLS_CHACHAPOLY_H
+#define MBEDTLS_CHACHAPOLY_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+/* for shared error codes */
+#include "poly1305.h"
+
+#define MBEDTLS_ERR_CHACHAPOLY_BAD_STATE -0x0054 /**< The requested operation is not permitted in the current state. */
+#define MBEDTLS_ERR_CHACHAPOLY_AUTH_FAILED -0x0056 /**< Authenticated decryption failed: data was not authentic. */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum
+{
+ MBEDTLS_CHACHAPOLY_ENCRYPT, /**< The mode value for performing encryption. */
+ MBEDTLS_CHACHAPOLY_DECRYPT /**< The mode value for performing decryption. */
+}
+mbedtls_chachapoly_mode_t;
+
+#if !defined(MBEDTLS_CHACHAPOLY_ALT)
+
+#include "chacha20.h"
+
+typedef struct mbedtls_chachapoly_context
+{
+ mbedtls_chacha20_context chacha20_ctx; /**< The ChaCha20 context. */
+ mbedtls_poly1305_context poly1305_ctx; /**< The Poly1305 context. */
+ uint64_t aad_len; /**< The length (bytes) of the Additional Authenticated Data. */
+ uint64_t ciphertext_len; /**< The length (bytes) of the ciphertext. */
+ int state; /**< The current state of the context. */
+ mbedtls_chachapoly_mode_t mode; /**< Cipher mode (encrypt or decrypt). */
+}
+mbedtls_chachapoly_context;
+
+#else /* !MBEDTLS_CHACHAPOLY_ALT */
+#include "chachapoly_alt.h"
+#endif /* !MBEDTLS_CHACHAPOLY_ALT */
+
+/**
+ * \brief This function initializes the specified ChaCha20-Poly1305 context.
+ *
+ * It must be the first API called before using
+ * the context. It must be followed by a call to
+ * \c mbedtls_chachapoly_setkey() before any operation can be
+ * done, and to \c mbedtls_chachapoly_free() once all
+ * operations with that context have been finished.
+ *
+ * In order to encrypt or decrypt full messages at once, for
+ * each message you should make a single call to
+ * \c mbedtls_chachapoly_crypt_and_tag() or
+ * \c mbedtls_chachapoly_auth_decrypt().
+ *
+ * In order to encrypt messages piecewise, for each
+ * message you should make a call to
+ * \c mbedtls_chachapoly_starts(), then 0 or more calls to
+ * \c mbedtls_chachapoly_update_aad(), then 0 or more calls to
+ * \c mbedtls_chachapoly_update(), then one call to
+ * \c mbedtls_chachapoly_finish().
+ *
+ * \warning Decryption with the piecewise API is discouraged! Always
+ * use \c mbedtls_chachapoly_auth_decrypt() when possible!
+ *
+ * If however this is not possible because the data is too
+ * large to fit in memory, you need to:
+ *
+ * - call \c mbedtls_chachapoly_starts() and (if needed)
+ * \c mbedtls_chachapoly_update_aad() as above,
+ * - call \c mbedtls_chachapoly_update() multiple times and
+ * ensure its output (the plaintext) is NOT used in any other
+ * way than placing it in temporary storage at this point,
+ * - call \c mbedtls_chachapoly_finish() to compute the
+ * authentication tag and compared it in constant time to the
+ * tag received with the ciphertext.
+ *
+ * If the tags are not equal, you must immediately discard
+ * all previous outputs of \c mbedtls_chachapoly_update(),
+ * otherwise you can now safely use the plaintext.
+ *
+ * \param ctx The ChachaPoly context to initialize. Must not be \c NULL.
+ */
+void mbedtls_chachapoly_init( mbedtls_chachapoly_context *ctx );
+
+/**
+ * \brief This function releases and clears the specified
+ * ChaCha20-Poly1305 context.
+ *
+ * \param ctx The ChachaPoly context to clear. This may be \c NULL, in which
+ * case this function is a no-op.
+ */
+void mbedtls_chachapoly_free( mbedtls_chachapoly_context *ctx );
+
+/**
+ * \brief This function sets the ChaCha20-Poly1305
+ * symmetric encryption key.
+ *
+ * \param ctx The ChaCha20-Poly1305 context to which the key should be
+ * bound. This must be initialized.
+ * \param key The \c 256 Bit (\c 32 Bytes) key.
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_chachapoly_setkey( mbedtls_chachapoly_context *ctx,
+ const unsigned char key[32] );
+
+/**
+ * \brief This function starts a ChaCha20-Poly1305 encryption or
+ * decryption operation.
+ *
+ * \warning You must never use the same nonce twice with the same key.
+ * This would void any confidentiality and authenticity
+ * guarantees for the messages encrypted with the same nonce
+ * and key.
+ *
+ * \note If the context is being used for AAD only (no data to
+ * encrypt or decrypt) then \p mode can be set to any value.
+ *
+ * \warning Decryption with the piecewise API is discouraged, see the
+ * warning on \c mbedtls_chachapoly_init().
+ *
+ * \param ctx The ChaCha20-Poly1305 context. This must be initialized
+ * and bound to a key.
+ * \param nonce The nonce/IV to use for the message.
+ * This must be a redable buffer of length \c 12 Bytes.
+ * \param mode The operation to perform: #MBEDTLS_CHACHAPOLY_ENCRYPT or
+ * #MBEDTLS_CHACHAPOLY_DECRYPT (discouraged, see warning).
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_chachapoly_starts( mbedtls_chachapoly_context *ctx,
+ const unsigned char nonce[12],
+ mbedtls_chachapoly_mode_t mode );
+
+/**
+ * \brief This function feeds additional data to be authenticated
+ * into an ongoing ChaCha20-Poly1305 operation.
+ *
+ * The Additional Authenticated Data (AAD), also called
+ * Associated Data (AD) is only authenticated but not
+ * encrypted nor included in the encrypted output. It is
+ * usually transmitted separately from the ciphertext or
+ * computed locally by each party.
+ *
+ * \note This function is called before data is encrypted/decrypted.
+ * I.e. call this function to process the AAD before calling
+ * \c mbedtls_chachapoly_update().
+ *
+ * You may call this function multiple times to process
+ * an arbitrary amount of AAD. It is permitted to call
+ * this function 0 times, if no AAD is used.
+ *
+ * This function cannot be called any more if data has
+ * been processed by \c mbedtls_chachapoly_update(),
+ * or if the context has been finished.
+ *
+ * \warning Decryption with the piecewise API is discouraged, see the
+ * warning on \c mbedtls_chachapoly_init().
+ *
+ * \param ctx The ChaCha20-Poly1305 context. This must be initialized
+ * and bound to a key.
+ * \param aad_len The length in Bytes of the AAD. The length has no
+ * restrictions.
+ * \param aad Buffer containing the AAD.
+ * This pointer can be \c NULL if `aad_len == 0`.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_POLY1305_BAD_INPUT_DATA
+ * if \p ctx or \p aad are NULL.
+ * \return #MBEDTLS_ERR_CHACHAPOLY_BAD_STATE
+ * if the operations has not been started or has been
+ * finished, or if the AAD has been finished.
+ */
+int mbedtls_chachapoly_update_aad( mbedtls_chachapoly_context *ctx,
+ const unsigned char *aad,
+ size_t aad_len );
+
+/**
+ * \brief Thus function feeds data to be encrypted or decrypted
+ * into an on-going ChaCha20-Poly1305
+ * operation.
+ *
+ * The direction (encryption or decryption) depends on the
+ * mode that was given when calling
+ * \c mbedtls_chachapoly_starts().
+ *
+ * You may call this function multiple times to process
+ * an arbitrary amount of data. It is permitted to call
+ * this function 0 times, if no data is to be encrypted
+ * or decrypted.
+ *
+ * \warning Decryption with the piecewise API is discouraged, see the
+ * warning on \c mbedtls_chachapoly_init().
+ *
+ * \param ctx The ChaCha20-Poly1305 context to use. This must be initialized.
+ * \param len The length (in bytes) of the data to encrypt or decrypt.
+ * \param input The buffer containing the data to encrypt or decrypt.
+ * This pointer can be \c NULL if `len == 0`.
+ * \param output The buffer to where the encrypted or decrypted data is
+ * written. This must be able to hold \p len bytes.
+ * This pointer can be \c NULL if `len == 0`.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_CHACHAPOLY_BAD_STATE
+ * if the operation has not been started or has been
+ * finished.
+ * \return Another negative error code on other kinds of failure.
+ */
+int mbedtls_chachapoly_update( mbedtls_chachapoly_context *ctx,
+ size_t len,
+ const unsigned char *input,
+ unsigned char *output );
+
+/**
+ * \brief This function finished the ChaCha20-Poly1305 operation and
+ * generates the MAC (authentication tag).
+ *
+ * \param ctx The ChaCha20-Poly1305 context to use. This must be initialized.
+ * \param mac The buffer to where the 128-bit (16 bytes) MAC is written.
+ *
+ * \warning Decryption with the piecewise API is discouraged, see the
+ * warning on \c mbedtls_chachapoly_init().
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_CHACHAPOLY_BAD_STATE
+ * if the operation has not been started or has been
+ * finished.
+ * \return Another negative error code on other kinds of failure.
+ */
+int mbedtls_chachapoly_finish( mbedtls_chachapoly_context *ctx,
+ unsigned char mac[16] );
+
+/**
+ * \brief This function performs a complete ChaCha20-Poly1305
+ * authenticated encryption with the previously-set key.
+ *
+ * \note Before using this function, you must set the key with
+ * \c mbedtls_chachapoly_setkey().
+ *
+ * \warning You must never use the same nonce twice with the same key.
+ * This would void any confidentiality and authenticity
+ * guarantees for the messages encrypted with the same nonce
+ * and key.
+ *
+ * \param ctx The ChaCha20-Poly1305 context to use (holds the key).
+ * This must be initialized.
+ * \param length The length (in bytes) of the data to encrypt or decrypt.
+ * \param nonce The 96-bit (12 bytes) nonce/IV to use.
+ * \param aad The buffer containing the additional authenticated
+ * data (AAD). This pointer can be \c NULL if `aad_len == 0`.
+ * \param aad_len The length (in bytes) of the AAD data to process.
+ * \param input The buffer containing the data to encrypt or decrypt.
+ * This pointer can be \c NULL if `ilen == 0`.
+ * \param output The buffer to where the encrypted or decrypted data
+ * is written. This pointer can be \c NULL if `ilen == 0`.
+ * \param tag The buffer to where the computed 128-bit (16 bytes) MAC
+ * is written. This must not be \c NULL.
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_chachapoly_encrypt_and_tag( mbedtls_chachapoly_context *ctx,
+ size_t length,
+ const unsigned char nonce[12],
+ const unsigned char *aad,
+ size_t aad_len,
+ const unsigned char *input,
+ unsigned char *output,
+ unsigned char tag[16] );
+
+/**
+ * \brief This function performs a complete ChaCha20-Poly1305
+ * authenticated decryption with the previously-set key.
+ *
+ * \note Before using this function, you must set the key with
+ * \c mbedtls_chachapoly_setkey().
+ *
+ * \param ctx The ChaCha20-Poly1305 context to use (holds the key).
+ * \param length The length (in Bytes) of the data to decrypt.
+ * \param nonce The \c 96 Bit (\c 12 bytes) nonce/IV to use.
+ * \param aad The buffer containing the additional authenticated data (AAD).
+ * This pointer can be \c NULL if `aad_len == 0`.
+ * \param aad_len The length (in bytes) of the AAD data to process.
+ * \param tag The buffer holding the authentication tag.
+ * This must be a readable buffer of length \c 16 Bytes.
+ * \param input The buffer containing the data to decrypt.
+ * This pointer can be \c NULL if `ilen == 0`.
+ * \param output The buffer to where the decrypted data is written.
+ * This pointer can be \c NULL if `ilen == 0`.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_CHACHAPOLY_AUTH_FAILED
+ * if the data was not authentic.
+ * \return Another negative error code on other kinds of failure.
+ */
+int mbedtls_chachapoly_auth_decrypt( mbedtls_chachapoly_context *ctx,
+ size_t length,
+ const unsigned char nonce[12],
+ const unsigned char *aad,
+ size_t aad_len,
+ const unsigned char tag[16],
+ const unsigned char *input,
+ unsigned char *output );
+
+#if defined(MBEDTLS_SELF_TEST)
+/**
+ * \brief The ChaCha20-Poly1305 checkup routine.
+ *
+ * \return \c 0 on success.
+ * \return \c 1 on failure.
+ */
+int mbedtls_chachapoly_self_test( int verbose );
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_CHACHAPOLY_H */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/check_config.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/check_config.h
new file mode 100644
index 0000000..b86e580
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/check_config.h
@@ -0,0 +1,698 @@
+/**
+ * \file check_config.h
+ *
+ * \brief Consistency checks for configuration options
+ */
+/*
+ * Copyright (C) 2006-2018, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+
+/*
+ * It is recommended to include this file from your config.h
+ * in order to catch dependency issues early.
+ */
+
+#ifndef MBEDTLS_CHECK_CONFIG_H
+#define MBEDTLS_CHECK_CONFIG_H
+
+/*
+ * We assume CHAR_BIT is 8 in many places. In practice, this is true on our
+ * target platforms, so not an issue, but let's just be extra sure.
+ */
+#include <limits.h>
+#if CHAR_BIT != 8
+#error "mbed TLS requires a platform with 8-bit chars"
+#endif
+
+#if defined(_WIN32)
+#if !defined(MBEDTLS_PLATFORM_C)
+#error "MBEDTLS_PLATFORM_C is required on Windows"
+#endif
+
+/* Fix the config here. Not convenient to put an #ifdef _WIN32 in config.h as
+ * it would confuse config.pl. */
+#if !defined(MBEDTLS_PLATFORM_SNPRINTF_ALT) && \
+ !defined(MBEDTLS_PLATFORM_SNPRINTF_MACRO)
+#define MBEDTLS_PLATFORM_SNPRINTF_ALT
+#endif
+#endif /* _WIN32 */
+
+#if defined(TARGET_LIKE_MBED) && \
+ ( defined(MBEDTLS_NET_C) || defined(MBEDTLS_TIMING_C) )
+#error "The NET and TIMING modules are not available for mbed OS - please use the network and timing functions provided by mbed OS"
+#endif
+
+#if defined(MBEDTLS_DEPRECATED_WARNING) && \
+ !defined(__GNUC__) && !defined(__clang__)
+#error "MBEDTLS_DEPRECATED_WARNING only works with GCC and Clang"
+#endif
+
+#if defined(MBEDTLS_HAVE_TIME_DATE) && !defined(MBEDTLS_HAVE_TIME)
+#error "MBEDTLS_HAVE_TIME_DATE without MBEDTLS_HAVE_TIME does not make sense"
+#endif
+
+#if defined(MBEDTLS_AESNI_C) && !defined(MBEDTLS_HAVE_ASM)
+#error "MBEDTLS_AESNI_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_CTR_DRBG_C) && !defined(MBEDTLS_AES_C)
+#error "MBEDTLS_CTR_DRBG_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_DHM_C) && !defined(MBEDTLS_BIGNUM_C)
+#error "MBEDTLS_DHM_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT) && !defined(MBEDTLS_SSL_TRUNCATED_HMAC)
+#error "MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_CMAC_C) && \
+ !defined(MBEDTLS_AES_C) && !defined(MBEDTLS_DES_C)
+#error "MBEDTLS_CMAC_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_NIST_KW_C) && \
+ ( !defined(MBEDTLS_AES_C) || !defined(MBEDTLS_CIPHER_C) )
+#error "MBEDTLS_NIST_KW_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECDH_C) && !defined(MBEDTLS_ECP_C)
+#error "MBEDTLS_ECDH_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECDSA_C) && \
+ ( !defined(MBEDTLS_ECP_C) || \
+ !defined(MBEDTLS_ASN1_PARSE_C) || \
+ !defined(MBEDTLS_ASN1_WRITE_C) )
+#error "MBEDTLS_ECDSA_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECJPAKE_C) && \
+ ( !defined(MBEDTLS_ECP_C) || !defined(MBEDTLS_MD_C) )
+#error "MBEDTLS_ECJPAKE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECP_RESTARTABLE) && \
+ ( defined(MBEDTLS_ECDH_COMPUTE_SHARED_ALT) || \
+ defined(MBEDTLS_ECDH_GEN_PUBLIC_ALT) || \
+ defined(MBEDTLS_ECDSA_SIGN_ALT) || \
+ defined(MBEDTLS_ECDSA_VERIFY_ALT) || \
+ defined(MBEDTLS_ECDSA_GENKEY_ALT) || \
+ defined(MBEDTLS_ECP_INTERNAL_ALT) || \
+ defined(MBEDTLS_ECP_ALT) )
+#error "MBEDTLS_ECP_RESTARTABLE defined, but it cannot coexist with an alternative ECP implementation"
+#endif
+
+#if defined(MBEDTLS_ECDSA_DETERMINISTIC) && !defined(MBEDTLS_HMAC_DRBG_C)
+#error "MBEDTLS_ECDSA_DETERMINISTIC defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECP_C) && ( !defined(MBEDTLS_BIGNUM_C) || ( \
+ !defined(MBEDTLS_ECP_DP_SECP192R1_ENABLED) && \
+ !defined(MBEDTLS_ECP_DP_SECP224R1_ENABLED) && \
+ !defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) && \
+ !defined(MBEDTLS_ECP_DP_SECP384R1_ENABLED) && \
+ !defined(MBEDTLS_ECP_DP_SECP521R1_ENABLED) && \
+ !defined(MBEDTLS_ECP_DP_BP256R1_ENABLED) && \
+ !defined(MBEDTLS_ECP_DP_BP384R1_ENABLED) && \
+ !defined(MBEDTLS_ECP_DP_BP512R1_ENABLED) && \
+ !defined(MBEDTLS_ECP_DP_SECP192K1_ENABLED) && \
+ !defined(MBEDTLS_ECP_DP_SECP224K1_ENABLED) && \
+ !defined(MBEDTLS_ECP_DP_SECP256K1_ENABLED) ) )
+#error "MBEDTLS_ECP_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PK_PARSE_C) && !defined(MBEDTLS_ASN1_PARSE_C)
+#error "MBEDTLS_PK_PARSE_C defined, but not all prerequesites"
+#endif
+
+#if defined(MBEDTLS_ENTROPY_C) && (!defined(MBEDTLS_SHA512_C) && \
+ !defined(MBEDTLS_SHA256_C))
+#error "MBEDTLS_ENTROPY_C defined, but not all prerequisites"
+#endif
+#if defined(MBEDTLS_ENTROPY_C) && defined(MBEDTLS_SHA512_C) && \
+ defined(MBEDTLS_CTR_DRBG_ENTROPY_LEN) && (MBEDTLS_CTR_DRBG_ENTROPY_LEN > 64)
+#error "MBEDTLS_CTR_DRBG_ENTROPY_LEN value too high"
+#endif
+#if defined(MBEDTLS_ENTROPY_C) && \
+ ( !defined(MBEDTLS_SHA512_C) || defined(MBEDTLS_ENTROPY_FORCE_SHA256) ) \
+ && defined(MBEDTLS_CTR_DRBG_ENTROPY_LEN) && (MBEDTLS_CTR_DRBG_ENTROPY_LEN > 32)
+#error "MBEDTLS_CTR_DRBG_ENTROPY_LEN value too high"
+#endif
+#if defined(MBEDTLS_ENTROPY_C) && \
+ defined(MBEDTLS_ENTROPY_FORCE_SHA256) && !defined(MBEDTLS_SHA256_C)
+#error "MBEDTLS_ENTROPY_FORCE_SHA256 defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_TEST_NULL_ENTROPY) && \
+ ( !defined(MBEDTLS_ENTROPY_C) || !defined(MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES) )
+#error "MBEDTLS_TEST_NULL_ENTROPY defined, but not all prerequisites"
+#endif
+#if defined(MBEDTLS_TEST_NULL_ENTROPY) && \
+ ( defined(MBEDTLS_ENTROPY_NV_SEED) || defined(MBEDTLS_ENTROPY_HARDWARE_ALT) || \
+ defined(MBEDTLS_HAVEGE_C) )
+#error "MBEDTLS_TEST_NULL_ENTROPY defined, but entropy sources too"
+#endif
+
+#if defined(MBEDTLS_GCM_C) && ( \
+ !defined(MBEDTLS_AES_C) && !defined(MBEDTLS_CAMELLIA_C) )
+#error "MBEDTLS_GCM_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECP_RANDOMIZE_JAC_ALT) && !defined(MBEDTLS_ECP_INTERNAL_ALT)
+#error "MBEDTLS_ECP_RANDOMIZE_JAC_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECP_ADD_MIXED_ALT) && !defined(MBEDTLS_ECP_INTERNAL_ALT)
+#error "MBEDTLS_ECP_ADD_MIXED_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECP_DOUBLE_JAC_ALT) && !defined(MBEDTLS_ECP_INTERNAL_ALT)
+#error "MBEDTLS_ECP_DOUBLE_JAC_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT) && !defined(MBEDTLS_ECP_INTERNAL_ALT)
+#error "MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECP_NORMALIZE_JAC_ALT) && !defined(MBEDTLS_ECP_INTERNAL_ALT)
+#error "MBEDTLS_ECP_NORMALIZE_JAC_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT) && !defined(MBEDTLS_ECP_INTERNAL_ALT)
+#error "MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECP_RANDOMIZE_MXZ_ALT) && !defined(MBEDTLS_ECP_INTERNAL_ALT)
+#error "MBEDTLS_ECP_RANDOMIZE_MXZ_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ECP_NORMALIZE_MXZ_ALT) && !defined(MBEDTLS_ECP_INTERNAL_ALT)
+#error "MBEDTLS_ECP_NORMALIZE_MXZ_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_HAVEGE_C) && !defined(MBEDTLS_TIMING_C)
+#error "MBEDTLS_HAVEGE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_HKDF_C) && !defined(MBEDTLS_MD_C)
+#error "MBEDTLS_HKDF_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_HMAC_DRBG_C) && !defined(MBEDTLS_MD_C)
+#error "MBEDTLS_HMAC_DRBG_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED) && \
+ ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_X509_CRT_PARSE_C) )
+#error "MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) && \
+ ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_X509_CRT_PARSE_C) )
+#error "MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED) && !defined(MBEDTLS_DHM_C)
+#error "MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED) && \
+ !defined(MBEDTLS_ECDH_C)
+#error "MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) && \
+ ( !defined(MBEDTLS_DHM_C) || !defined(MBEDTLS_RSA_C) || \
+ !defined(MBEDTLS_X509_CRT_PARSE_C) || !defined(MBEDTLS_PKCS1_V15) )
+#error "MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) && \
+ ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_RSA_C) || \
+ !defined(MBEDTLS_X509_CRT_PARSE_C) || !defined(MBEDTLS_PKCS1_V15) )
+#error "MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) && \
+ ( !defined(MBEDTLS_ECDH_C) || !defined(MBEDTLS_ECDSA_C) || \
+ !defined(MBEDTLS_X509_CRT_PARSE_C) )
+#error "MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED) && \
+ ( !defined(MBEDTLS_RSA_C) || !defined(MBEDTLS_X509_CRT_PARSE_C) || \
+ !defined(MBEDTLS_PKCS1_V15) )
+#error "MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) && \
+ ( !defined(MBEDTLS_RSA_C) || !defined(MBEDTLS_X509_CRT_PARSE_C) || \
+ !defined(MBEDTLS_PKCS1_V15) )
+#error "MBEDTLS_KEY_EXCHANGE_RSA_ENABLED defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED) && \
+ ( !defined(MBEDTLS_ECJPAKE_C) || !defined(MBEDTLS_SHA256_C) || \
+ !defined(MBEDTLS_ECP_DP_SECP256R1_ENABLED) )
+#error "MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_MEMORY_BUFFER_ALLOC_C) && \
+ ( !defined(MBEDTLS_PLATFORM_C) || !defined(MBEDTLS_PLATFORM_MEMORY) )
+#error "MBEDTLS_MEMORY_BUFFER_ALLOC_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PADLOCK_C) && !defined(MBEDTLS_HAVE_ASM)
+#error "MBEDTLS_PADLOCK_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PEM_PARSE_C) && !defined(MBEDTLS_BASE64_C)
+#error "MBEDTLS_PEM_PARSE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PEM_WRITE_C) && !defined(MBEDTLS_BASE64_C)
+#error "MBEDTLS_PEM_WRITE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PK_C) && \
+ ( !defined(MBEDTLS_RSA_C) && !defined(MBEDTLS_ECP_C) )
+#error "MBEDTLS_PK_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PK_PARSE_C) && !defined(MBEDTLS_PK_C)
+#error "MBEDTLS_PK_PARSE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PK_WRITE_C) && !defined(MBEDTLS_PK_C)
+#error "MBEDTLS_PK_WRITE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PKCS11_C) && !defined(MBEDTLS_PK_C)
+#error "MBEDTLS_PKCS11_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_EXIT_ALT) && !defined(MBEDTLS_PLATFORM_C)
+#error "MBEDTLS_PLATFORM_EXIT_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_EXIT_MACRO) && !defined(MBEDTLS_PLATFORM_C)
+#error "MBEDTLS_PLATFORM_EXIT_MACRO defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_EXIT_MACRO) &&\
+ ( defined(MBEDTLS_PLATFORM_STD_EXIT) ||\
+ defined(MBEDTLS_PLATFORM_EXIT_ALT) )
+#error "MBEDTLS_PLATFORM_EXIT_MACRO and MBEDTLS_PLATFORM_STD_EXIT/MBEDTLS_PLATFORM_EXIT_ALT cannot be defined simultaneously"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_TIME_ALT) &&\
+ ( !defined(MBEDTLS_PLATFORM_C) ||\
+ !defined(MBEDTLS_HAVE_TIME) )
+#error "MBEDTLS_PLATFORM_TIME_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_TIME_MACRO) &&\
+ ( !defined(MBEDTLS_PLATFORM_C) ||\
+ !defined(MBEDTLS_HAVE_TIME) )
+#error "MBEDTLS_PLATFORM_TIME_MACRO defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_TIME_TYPE_MACRO) &&\
+ ( !defined(MBEDTLS_PLATFORM_C) ||\
+ !defined(MBEDTLS_HAVE_TIME) )
+#error "MBEDTLS_PLATFORM_TIME_TYPE_MACRO defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_TIME_MACRO) &&\
+ ( defined(MBEDTLS_PLATFORM_STD_TIME) ||\
+ defined(MBEDTLS_PLATFORM_TIME_ALT) )
+#error "MBEDTLS_PLATFORM_TIME_MACRO and MBEDTLS_PLATFORM_STD_TIME/MBEDTLS_PLATFORM_TIME_ALT cannot be defined simultaneously"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_TIME_TYPE_MACRO) &&\
+ ( defined(MBEDTLS_PLATFORM_STD_TIME) ||\
+ defined(MBEDTLS_PLATFORM_TIME_ALT) )
+#error "MBEDTLS_PLATFORM_TIME_TYPE_MACRO and MBEDTLS_PLATFORM_STD_TIME/MBEDTLS_PLATFORM_TIME_ALT cannot be defined simultaneously"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_FPRINTF_ALT) && !defined(MBEDTLS_PLATFORM_C)
+#error "MBEDTLS_PLATFORM_FPRINTF_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_FPRINTF_MACRO) && !defined(MBEDTLS_PLATFORM_C)
+#error "MBEDTLS_PLATFORM_FPRINTF_MACRO defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_FPRINTF_MACRO) &&\
+ ( defined(MBEDTLS_PLATFORM_STD_FPRINTF) ||\
+ defined(MBEDTLS_PLATFORM_FPRINTF_ALT) )
+#error "MBEDTLS_PLATFORM_FPRINTF_MACRO and MBEDTLS_PLATFORM_STD_FPRINTF/MBEDTLS_PLATFORM_FPRINTF_ALT cannot be defined simultaneously"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_FREE_MACRO) &&\
+ ( !defined(MBEDTLS_PLATFORM_C) || !defined(MBEDTLS_PLATFORM_MEMORY) )
+#error "MBEDTLS_PLATFORM_FREE_MACRO defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_FREE_MACRO) &&\
+ defined(MBEDTLS_PLATFORM_STD_FREE)
+#error "MBEDTLS_PLATFORM_FREE_MACRO and MBEDTLS_PLATFORM_STD_FREE cannot be defined simultaneously"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_FREE_MACRO) && !defined(MBEDTLS_PLATFORM_CALLOC_MACRO)
+#error "MBEDTLS_PLATFORM_CALLOC_MACRO must be defined if MBEDTLS_PLATFORM_FREE_MACRO is"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_CALLOC_MACRO) &&\
+ ( !defined(MBEDTLS_PLATFORM_C) || !defined(MBEDTLS_PLATFORM_MEMORY) )
+#error "MBEDTLS_PLATFORM_CALLOC_MACRO defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_CALLOC_MACRO) &&\
+ defined(MBEDTLS_PLATFORM_STD_CALLOC)
+#error "MBEDTLS_PLATFORM_CALLOC_MACRO and MBEDTLS_PLATFORM_STD_CALLOC cannot be defined simultaneously"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_CALLOC_MACRO) && !defined(MBEDTLS_PLATFORM_FREE_MACRO)
+#error "MBEDTLS_PLATFORM_FREE_MACRO must be defined if MBEDTLS_PLATFORM_CALLOC_MACRO is"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_MEMORY) && !defined(MBEDTLS_PLATFORM_C)
+#error "MBEDTLS_PLATFORM_MEMORY defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_PRINTF_ALT) && !defined(MBEDTLS_PLATFORM_C)
+#error "MBEDTLS_PLATFORM_PRINTF_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_PRINTF_MACRO) && !defined(MBEDTLS_PLATFORM_C)
+#error "MBEDTLS_PLATFORM_PRINTF_MACRO defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_PRINTF_MACRO) &&\
+ ( defined(MBEDTLS_PLATFORM_STD_PRINTF) ||\
+ defined(MBEDTLS_PLATFORM_PRINTF_ALT) )
+#error "MBEDTLS_PLATFORM_PRINTF_MACRO and MBEDTLS_PLATFORM_STD_PRINTF/MBEDTLS_PLATFORM_PRINTF_ALT cannot be defined simultaneously"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_SNPRINTF_ALT) && !defined(MBEDTLS_PLATFORM_C)
+#error "MBEDTLS_PLATFORM_SNPRINTF_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_SNPRINTF_MACRO) && !defined(MBEDTLS_PLATFORM_C)
+#error "MBEDTLS_PLATFORM_SNPRINTF_MACRO defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_SNPRINTF_MACRO) &&\
+ ( defined(MBEDTLS_PLATFORM_STD_SNPRINTF) ||\
+ defined(MBEDTLS_PLATFORM_SNPRINTF_ALT) )
+#error "MBEDTLS_PLATFORM_SNPRINTF_MACRO and MBEDTLS_PLATFORM_STD_SNPRINTF/MBEDTLS_PLATFORM_SNPRINTF_ALT cannot be defined simultaneously"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_STD_MEM_HDR) &&\
+ !defined(MBEDTLS_PLATFORM_NO_STD_FUNCTIONS)
+#error "MBEDTLS_PLATFORM_STD_MEM_HDR defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_STD_CALLOC) && !defined(MBEDTLS_PLATFORM_MEMORY)
+#error "MBEDTLS_PLATFORM_STD_CALLOC defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_STD_CALLOC) && !defined(MBEDTLS_PLATFORM_MEMORY)
+#error "MBEDTLS_PLATFORM_STD_CALLOC defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_STD_FREE) && !defined(MBEDTLS_PLATFORM_MEMORY)
+#error "MBEDTLS_PLATFORM_STD_FREE defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_STD_EXIT) &&\
+ !defined(MBEDTLS_PLATFORM_EXIT_ALT)
+#error "MBEDTLS_PLATFORM_STD_EXIT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_STD_TIME) &&\
+ ( !defined(MBEDTLS_PLATFORM_TIME_ALT) ||\
+ !defined(MBEDTLS_HAVE_TIME) )
+#error "MBEDTLS_PLATFORM_STD_TIME defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_STD_FPRINTF) &&\
+ !defined(MBEDTLS_PLATFORM_FPRINTF_ALT)
+#error "MBEDTLS_PLATFORM_STD_FPRINTF defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_STD_PRINTF) &&\
+ !defined(MBEDTLS_PLATFORM_PRINTF_ALT)
+#error "MBEDTLS_PLATFORM_STD_PRINTF defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_STD_SNPRINTF) &&\
+ !defined(MBEDTLS_PLATFORM_SNPRINTF_ALT)
+#error "MBEDTLS_PLATFORM_STD_SNPRINTF defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_ENTROPY_NV_SEED) &&\
+ ( !defined(MBEDTLS_PLATFORM_C) || !defined(MBEDTLS_ENTROPY_C) )
+#error "MBEDTLS_ENTROPY_NV_SEED defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_NV_SEED_ALT) &&\
+ !defined(MBEDTLS_ENTROPY_NV_SEED)
+#error "MBEDTLS_PLATFORM_NV_SEED_ALT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_STD_NV_SEED_READ) &&\
+ !defined(MBEDTLS_PLATFORM_NV_SEED_ALT)
+#error "MBEDTLS_PLATFORM_STD_NV_SEED_READ defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_STD_NV_SEED_WRITE) &&\
+ !defined(MBEDTLS_PLATFORM_NV_SEED_ALT)
+#error "MBEDTLS_PLATFORM_STD_NV_SEED_WRITE defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_NV_SEED_READ_MACRO) &&\
+ ( defined(MBEDTLS_PLATFORM_STD_NV_SEED_READ) ||\
+ defined(MBEDTLS_PLATFORM_NV_SEED_ALT) )
+#error "MBEDTLS_PLATFORM_NV_SEED_READ_MACRO and MBEDTLS_PLATFORM_STD_NV_SEED_READ cannot be defined simultaneously"
+#endif
+
+#if defined(MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO) &&\
+ ( defined(MBEDTLS_PLATFORM_STD_NV_SEED_WRITE) ||\
+ defined(MBEDTLS_PLATFORM_NV_SEED_ALT) )
+#error "MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO and MBEDTLS_PLATFORM_STD_NV_SEED_WRITE cannot be defined simultaneously"
+#endif
+
+#if defined(MBEDTLS_RSA_C) && ( !defined(MBEDTLS_BIGNUM_C) || \
+ !defined(MBEDTLS_OID_C) )
+#error "MBEDTLS_RSA_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_RSA_C) && ( !defined(MBEDTLS_PKCS1_V21) && \
+ !defined(MBEDTLS_PKCS1_V15) )
+#error "MBEDTLS_RSA_C defined, but none of the PKCS1 versions enabled"
+#endif
+
+#if defined(MBEDTLS_X509_RSASSA_PSS_SUPPORT) && \
+ ( !defined(MBEDTLS_RSA_C) || !defined(MBEDTLS_PKCS1_V21) )
+#error "MBEDTLS_X509_RSASSA_PSS_SUPPORT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_PROTO_SSL3) && ( !defined(MBEDTLS_MD5_C) || \
+ !defined(MBEDTLS_SHA1_C) )
+#error "MBEDTLS_SSL_PROTO_SSL3 defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_PROTO_TLS1) && ( !defined(MBEDTLS_MD5_C) || \
+ !defined(MBEDTLS_SHA1_C) )
+#error "MBEDTLS_SSL_PROTO_TLS1 defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_PROTO_TLS1_1) && ( !defined(MBEDTLS_MD5_C) || \
+ !defined(MBEDTLS_SHA1_C) )
+#error "MBEDTLS_SSL_PROTO_TLS1_1 defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_PROTO_TLS1_2) && ( !defined(MBEDTLS_SHA1_C) && \
+ !defined(MBEDTLS_SHA256_C) && !defined(MBEDTLS_SHA512_C) )
+#error "MBEDTLS_SSL_PROTO_TLS1_2 defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS) && \
+ !defined(MBEDTLS_SSL_PROTO_TLS1_1) && \
+ !defined(MBEDTLS_SSL_PROTO_TLS1_2)
+#error "MBEDTLS_SSL_PROTO_DTLS defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_CLI_C) && !defined(MBEDTLS_SSL_TLS_C)
+#error "MBEDTLS_SSL_CLI_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_TLS_C) && ( !defined(MBEDTLS_CIPHER_C) || \
+ !defined(MBEDTLS_MD_C) )
+#error "MBEDTLS_SSL_TLS_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_SRV_C) && !defined(MBEDTLS_SSL_TLS_C)
+#error "MBEDTLS_SSL_SRV_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_TLS_C) && (!defined(MBEDTLS_SSL_PROTO_SSL3) && \
+ !defined(MBEDTLS_SSL_PROTO_TLS1) && !defined(MBEDTLS_SSL_PROTO_TLS1_1) && \
+ !defined(MBEDTLS_SSL_PROTO_TLS1_2))
+#error "MBEDTLS_SSL_TLS_C defined, but no protocols are active"
+#endif
+
+#if defined(MBEDTLS_SSL_TLS_C) && (defined(MBEDTLS_SSL_PROTO_SSL3) && \
+ defined(MBEDTLS_SSL_PROTO_TLS1_1) && !defined(MBEDTLS_SSL_PROTO_TLS1))
+#error "Illegal protocol selection"
+#endif
+
+#if defined(MBEDTLS_SSL_TLS_C) && (defined(MBEDTLS_SSL_PROTO_TLS1) && \
+ defined(MBEDTLS_SSL_PROTO_TLS1_2) && !defined(MBEDTLS_SSL_PROTO_TLS1_1))
+#error "Illegal protocol selection"
+#endif
+
+#if defined(MBEDTLS_SSL_TLS_C) && (defined(MBEDTLS_SSL_PROTO_SSL3) && \
+ defined(MBEDTLS_SSL_PROTO_TLS1_2) && (!defined(MBEDTLS_SSL_PROTO_TLS1) || \
+ !defined(MBEDTLS_SSL_PROTO_TLS1_1)))
+#error "Illegal protocol selection"
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_HELLO_VERIFY) && !defined(MBEDTLS_SSL_PROTO_DTLS)
+#error "MBEDTLS_SSL_DTLS_HELLO_VERIFY defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE) && \
+ !defined(MBEDTLS_SSL_DTLS_HELLO_VERIFY)
+#error "MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY) && \
+ ( !defined(MBEDTLS_SSL_TLS_C) || !defined(MBEDTLS_SSL_PROTO_DTLS) )
+#error "MBEDTLS_SSL_DTLS_ANTI_REPLAY defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_BADMAC_LIMIT) && \
+ ( !defined(MBEDTLS_SSL_TLS_C) || !defined(MBEDTLS_SSL_PROTO_DTLS) )
+#error "MBEDTLS_SSL_DTLS_BADMAC_LIMIT defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC) && \
+ !defined(MBEDTLS_SSL_PROTO_TLS1) && \
+ !defined(MBEDTLS_SSL_PROTO_TLS1_1) && \
+ !defined(MBEDTLS_SSL_PROTO_TLS1_2)
+#error "MBEDTLS_SSL_ENCRYPT_THEN_MAC defined, but not all prerequsites"
+#endif
+
+#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET) && \
+ !defined(MBEDTLS_SSL_PROTO_TLS1) && \
+ !defined(MBEDTLS_SSL_PROTO_TLS1_1) && \
+ !defined(MBEDTLS_SSL_PROTO_TLS1_2)
+#error "MBEDTLS_SSL_EXTENDED_MASTER_SECRET defined, but not all prerequsites"
+#endif
+
+#if defined(MBEDTLS_SSL_TICKET_C) && !defined(MBEDTLS_CIPHER_C)
+#error "MBEDTLS_SSL_TICKET_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_CBC_RECORD_SPLITTING) && \
+ !defined(MBEDTLS_SSL_PROTO_SSL3) && !defined(MBEDTLS_SSL_PROTO_TLS1)
+#error "MBEDTLS_SSL_CBC_RECORD_SPLITTING defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION) && \
+ !defined(MBEDTLS_X509_CRT_PARSE_C)
+#error "MBEDTLS_SSL_SERVER_NAME_INDICATION defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_THREADING_PTHREAD)
+#if !defined(MBEDTLS_THREADING_C) || defined(MBEDTLS_THREADING_IMPL)
+#error "MBEDTLS_THREADING_PTHREAD defined, but not all prerequisites"
+#endif
+#define MBEDTLS_THREADING_IMPL
+#endif
+
+#if defined(MBEDTLS_THREADING_ALT)
+#if !defined(MBEDTLS_THREADING_C) || defined(MBEDTLS_THREADING_IMPL)
+#error "MBEDTLS_THREADING_ALT defined, but not all prerequisites"
+#endif
+#define MBEDTLS_THREADING_IMPL
+#endif
+
+#if defined(MBEDTLS_THREADING_C) && !defined(MBEDTLS_THREADING_IMPL)
+#error "MBEDTLS_THREADING_C defined, single threading implementation required"
+#endif
+#undef MBEDTLS_THREADING_IMPL
+
+#if defined(MBEDTLS_VERSION_FEATURES) && !defined(MBEDTLS_VERSION_C)
+#error "MBEDTLS_VERSION_FEATURES defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_X509_USE_C) && ( !defined(MBEDTLS_BIGNUM_C) || \
+ !defined(MBEDTLS_OID_C) || !defined(MBEDTLS_ASN1_PARSE_C) || \
+ !defined(MBEDTLS_PK_PARSE_C) )
+#error "MBEDTLS_X509_USE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_X509_CREATE_C) && ( !defined(MBEDTLS_BIGNUM_C) || \
+ !defined(MBEDTLS_OID_C) || !defined(MBEDTLS_ASN1_WRITE_C) || \
+ !defined(MBEDTLS_PK_WRITE_C) )
+#error "MBEDTLS_X509_CREATE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C) && ( !defined(MBEDTLS_X509_USE_C) )
+#error "MBEDTLS_X509_CRT_PARSE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_X509_CRL_PARSE_C) && ( !defined(MBEDTLS_X509_USE_C) )
+#error "MBEDTLS_X509_CRL_PARSE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_X509_CSR_PARSE_C) && ( !defined(MBEDTLS_X509_USE_C) )
+#error "MBEDTLS_X509_CSR_PARSE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_X509_CRT_WRITE_C) && ( !defined(MBEDTLS_X509_CREATE_C) )
+#error "MBEDTLS_X509_CRT_WRITE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_X509_CSR_WRITE_C) && ( !defined(MBEDTLS_X509_CREATE_C) )
+#error "MBEDTLS_X509_CSR_WRITE_C defined, but not all prerequisites"
+#endif
+
+#if defined(MBEDTLS_HAVE_INT32) && defined(MBEDTLS_HAVE_INT64)
+#error "MBEDTLS_HAVE_INT32 and MBEDTLS_HAVE_INT64 cannot be defined simultaneously"
+#endif /* MBEDTLS_HAVE_INT32 && MBEDTLS_HAVE_INT64 */
+
+#if ( defined(MBEDTLS_HAVE_INT32) || defined(MBEDTLS_HAVE_INT64) ) && \
+ defined(MBEDTLS_HAVE_ASM)
+#error "MBEDTLS_HAVE_INT32/MBEDTLS_HAVE_INT64 and MBEDTLS_HAVE_ASM cannot be defined simultaneously"
+#endif /* (MBEDTLS_HAVE_INT32 || MBEDTLS_HAVE_INT64) && MBEDTLS_HAVE_ASM */
+
+/*
+ * Avoid warning from -pedantic. This is a convenient place for this
+ * workaround since this is included by every single file before the
+ * #if defined(MBEDTLS_xxx_C) that results in emtpy translation units.
+ */
+typedef int mbedtls_iso_c_forbids_empty_translation_units;
+
+#endif /* MBEDTLS_CHECK_CONFIG_H */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/cipher.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/cipher.h
new file mode 100644
index 0000000..082a691
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/cipher.h
@@ -0,0 +1,872 @@
+/**
+ * \file cipher.h
+ *
+ * \brief This file contains an abstraction interface for use with the cipher
+ * primitives provided by the library. It provides a common interface to all of
+ * the available cipher operations.
+ *
+ * \author Adriaan de Jong <dejong@fox-it.com>
+ */
+/*
+ * Copyright (C) 2006-2018, Arm Limited (or its affiliates), All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of Mbed TLS (https://tls.mbed.org)
+ */
+
+#ifndef MBEDTLS_CIPHER_H
+#define MBEDTLS_CIPHER_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include "platform_util.h"
+
+#if defined(MBEDTLS_GCM_C) || defined(MBEDTLS_CCM_C) || defined(MBEDTLS_CHACHAPOLY_C)
+#define MBEDTLS_CIPHER_MODE_AEAD
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_CBC)
+#define MBEDTLS_CIPHER_MODE_WITH_PADDING
+#endif
+
+#if defined(MBEDTLS_ARC4_C) || defined(MBEDTLS_CIPHER_NULL_CIPHER) || \
+ defined(MBEDTLS_CHACHA20_C)
+#define MBEDTLS_CIPHER_MODE_STREAM
+#endif
+
+#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
+ !defined(inline) && !defined(__cplusplus)
+#define inline __inline
+#endif
+
+#define MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE -0x6080 /**< The selected feature is not available. */
+#define MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA -0x6100 /**< Bad input parameters. */
+#define MBEDTLS_ERR_CIPHER_ALLOC_FAILED -0x6180 /**< Failed to allocate memory. */
+#define MBEDTLS_ERR_CIPHER_INVALID_PADDING -0x6200 /**< Input data contains invalid padding and is rejected. */
+#define MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED -0x6280 /**< Decryption of block requires a full block. */
+#define MBEDTLS_ERR_CIPHER_AUTH_FAILED -0x6300 /**< Authentication failed (for AEAD modes). */
+#define MBEDTLS_ERR_CIPHER_INVALID_CONTEXT -0x6380 /**< The context is invalid. For example, because it was freed. */
+
+/* MBEDTLS_ERR_CIPHER_HW_ACCEL_FAILED is deprecated and should not be used. */
+#define MBEDTLS_ERR_CIPHER_HW_ACCEL_FAILED -0x6400 /**< Cipher hardware accelerator failed. */
+
+#define MBEDTLS_CIPHER_VARIABLE_IV_LEN 0x01 /**< Cipher accepts IVs of variable length. */
+#define MBEDTLS_CIPHER_VARIABLE_KEY_LEN 0x02 /**< Cipher accepts keys of variable length. */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief Supported cipher types.
+ *
+ * \warning RC4 and DES are considered weak ciphers and their use
+ * constitutes a security risk. Arm recommends considering stronger
+ * ciphers instead.
+ */
+typedef enum {
+ MBEDTLS_CIPHER_ID_NONE = 0, /**< Placeholder to mark the end of cipher ID lists. */
+ MBEDTLS_CIPHER_ID_NULL, /**< The identity cipher, treated as a stream cipher. */
+ MBEDTLS_CIPHER_ID_AES, /**< The AES cipher. */
+ MBEDTLS_CIPHER_ID_DES, /**< The DES cipher. */
+ MBEDTLS_CIPHER_ID_3DES, /**< The Triple DES cipher. */
+ MBEDTLS_CIPHER_ID_CAMELLIA, /**< The Camellia cipher. */
+ MBEDTLS_CIPHER_ID_BLOWFISH, /**< The Blowfish cipher. */
+ MBEDTLS_CIPHER_ID_ARC4, /**< The RC4 cipher. */
+ MBEDTLS_CIPHER_ID_ARIA, /**< The Aria cipher. */
+ MBEDTLS_CIPHER_ID_CHACHA20, /**< The ChaCha20 cipher. */
+} mbedtls_cipher_id_t;
+
+/**
+ * \brief Supported {cipher type, cipher mode} pairs.
+ *
+ * \warning RC4 and DES are considered weak ciphers and their use
+ * constitutes a security risk. Arm recommends considering stronger
+ * ciphers instead.
+ */
+typedef enum {
+ MBEDTLS_CIPHER_NONE = 0, /**< Placeholder to mark the end of cipher-pair lists. */
+ MBEDTLS_CIPHER_NULL, /**< The identity stream cipher. */
+ MBEDTLS_CIPHER_AES_128_ECB, /**< AES cipher with 128-bit ECB mode. */
+ MBEDTLS_CIPHER_AES_192_ECB, /**< AES cipher with 192-bit ECB mode. */
+ MBEDTLS_CIPHER_AES_256_ECB, /**< AES cipher with 256-bit ECB mode. */
+ MBEDTLS_CIPHER_AES_128_CBC, /**< AES cipher with 128-bit CBC mode. */
+ MBEDTLS_CIPHER_AES_192_CBC, /**< AES cipher with 192-bit CBC mode. */
+ MBEDTLS_CIPHER_AES_256_CBC, /**< AES cipher with 256-bit CBC mode. */
+ MBEDTLS_CIPHER_AES_128_CFB128, /**< AES cipher with 128-bit CFB128 mode. */
+ MBEDTLS_CIPHER_AES_192_CFB128, /**< AES cipher with 192-bit CFB128 mode. */
+ MBEDTLS_CIPHER_AES_256_CFB128, /**< AES cipher with 256-bit CFB128 mode. */
+ MBEDTLS_CIPHER_AES_128_CTR, /**< AES cipher with 128-bit CTR mode. */
+ MBEDTLS_CIPHER_AES_192_CTR, /**< AES cipher with 192-bit CTR mode. */
+ MBEDTLS_CIPHER_AES_256_CTR, /**< AES cipher with 256-bit CTR mode. */
+ MBEDTLS_CIPHER_AES_128_GCM, /**< AES cipher with 128-bit GCM mode. */
+ MBEDTLS_CIPHER_AES_192_GCM, /**< AES cipher with 192-bit GCM mode. */
+ MBEDTLS_CIPHER_AES_256_GCM, /**< AES cipher with 256-bit GCM mode. */
+ MBEDTLS_CIPHER_CAMELLIA_128_ECB, /**< Camellia cipher with 128-bit ECB mode. */
+ MBEDTLS_CIPHER_CAMELLIA_192_ECB, /**< Camellia cipher with 192-bit ECB mode. */
+ MBEDTLS_CIPHER_CAMELLIA_256_ECB, /**< Camellia cipher with 256-bit ECB mode. */
+ MBEDTLS_CIPHER_CAMELLIA_128_CBC, /**< Camellia cipher with 128-bit CBC mode. */
+ MBEDTLS_CIPHER_CAMELLIA_192_CBC, /**< Camellia cipher with 192-bit CBC mode. */
+ MBEDTLS_CIPHER_CAMELLIA_256_CBC, /**< Camellia cipher with 256-bit CBC mode. */
+ MBEDTLS_CIPHER_CAMELLIA_128_CFB128, /**< Camellia cipher with 128-bit CFB128 mode. */
+ MBEDTLS_CIPHER_CAMELLIA_192_CFB128, /**< Camellia cipher with 192-bit CFB128 mode. */
+ MBEDTLS_CIPHER_CAMELLIA_256_CFB128, /**< Camellia cipher with 256-bit CFB128 mode. */
+ MBEDTLS_CIPHER_CAMELLIA_128_CTR, /**< Camellia cipher with 128-bit CTR mode. */
+ MBEDTLS_CIPHER_CAMELLIA_192_CTR, /**< Camellia cipher with 192-bit CTR mode. */
+ MBEDTLS_CIPHER_CAMELLIA_256_CTR, /**< Camellia cipher with 256-bit CTR mode. */
+ MBEDTLS_CIPHER_CAMELLIA_128_GCM, /**< Camellia cipher with 128-bit GCM mode. */
+ MBEDTLS_CIPHER_CAMELLIA_192_GCM, /**< Camellia cipher with 192-bit GCM mode. */
+ MBEDTLS_CIPHER_CAMELLIA_256_GCM, /**< Camellia cipher with 256-bit GCM mode. */
+ MBEDTLS_CIPHER_DES_ECB, /**< DES cipher with ECB mode. */
+ MBEDTLS_CIPHER_DES_CBC, /**< DES cipher with CBC mode. */
+ MBEDTLS_CIPHER_DES_EDE_ECB, /**< DES cipher with EDE ECB mode. */
+ MBEDTLS_CIPHER_DES_EDE_CBC, /**< DES cipher with EDE CBC mode. */
+ MBEDTLS_CIPHER_DES_EDE3_ECB, /**< DES cipher with EDE3 ECB mode. */
+ MBEDTLS_CIPHER_DES_EDE3_CBC, /**< DES cipher with EDE3 CBC mode. */
+ MBEDTLS_CIPHER_BLOWFISH_ECB, /**< Blowfish cipher with ECB mode. */
+ MBEDTLS_CIPHER_BLOWFISH_CBC, /**< Blowfish cipher with CBC mode. */
+ MBEDTLS_CIPHER_BLOWFISH_CFB64, /**< Blowfish cipher with CFB64 mode. */
+ MBEDTLS_CIPHER_BLOWFISH_CTR, /**< Blowfish cipher with CTR mode. */
+ MBEDTLS_CIPHER_ARC4_128, /**< RC4 cipher with 128-bit mode. */
+ MBEDTLS_CIPHER_AES_128_CCM, /**< AES cipher with 128-bit CCM mode. */
+ MBEDTLS_CIPHER_AES_192_CCM, /**< AES cipher with 192-bit CCM mode. */
+ MBEDTLS_CIPHER_AES_256_CCM, /**< AES cipher with 256-bit CCM mode. */
+ MBEDTLS_CIPHER_CAMELLIA_128_CCM, /**< Camellia cipher with 128-bit CCM mode. */
+ MBEDTLS_CIPHER_CAMELLIA_192_CCM, /**< Camellia cipher with 192-bit CCM mode. */
+ MBEDTLS_CIPHER_CAMELLIA_256_CCM, /**< Camellia cipher with 256-bit CCM mode. */
+ MBEDTLS_CIPHER_ARIA_128_ECB, /**< Aria cipher with 128-bit key and ECB mode. */
+ MBEDTLS_CIPHER_ARIA_192_ECB, /**< Aria cipher with 192-bit key and ECB mode. */
+ MBEDTLS_CIPHER_ARIA_256_ECB, /**< Aria cipher with 256-bit key and ECB mode. */
+ MBEDTLS_CIPHER_ARIA_128_CBC, /**< Aria cipher with 128-bit key and CBC mode. */
+ MBEDTLS_CIPHER_ARIA_192_CBC, /**< Aria cipher with 192-bit key and CBC mode. */
+ MBEDTLS_CIPHER_ARIA_256_CBC, /**< Aria cipher with 256-bit key and CBC mode. */
+ MBEDTLS_CIPHER_ARIA_128_CFB128, /**< Aria cipher with 128-bit key and CFB-128 mode. */
+ MBEDTLS_CIPHER_ARIA_192_CFB128, /**< Aria cipher with 192-bit key and CFB-128 mode. */
+ MBEDTLS_CIPHER_ARIA_256_CFB128, /**< Aria cipher with 256-bit key and CFB-128 mode. */
+ MBEDTLS_CIPHER_ARIA_128_CTR, /**< Aria cipher with 128-bit key and CTR mode. */
+ MBEDTLS_CIPHER_ARIA_192_CTR, /**< Aria cipher with 192-bit key and CTR mode. */
+ MBEDTLS_CIPHER_ARIA_256_CTR, /**< Aria cipher with 256-bit key and CTR mode. */
+ MBEDTLS_CIPHER_ARIA_128_GCM, /**< Aria cipher with 128-bit key and GCM mode. */
+ MBEDTLS_CIPHER_ARIA_192_GCM, /**< Aria cipher with 192-bit key and GCM mode. */
+ MBEDTLS_CIPHER_ARIA_256_GCM, /**< Aria cipher with 256-bit key and GCM mode. */
+ MBEDTLS_CIPHER_ARIA_128_CCM, /**< Aria cipher with 128-bit key and CCM mode. */
+ MBEDTLS_CIPHER_ARIA_192_CCM, /**< Aria cipher with 192-bit key and CCM mode. */
+ MBEDTLS_CIPHER_ARIA_256_CCM, /**< Aria cipher with 256-bit key and CCM mode. */
+ MBEDTLS_CIPHER_AES_128_OFB, /**< AES 128-bit cipher in OFB mode. */
+ MBEDTLS_CIPHER_AES_192_OFB, /**< AES 192-bit cipher in OFB mode. */
+ MBEDTLS_CIPHER_AES_256_OFB, /**< AES 256-bit cipher in OFB mode. */
+ MBEDTLS_CIPHER_AES_128_XTS, /**< AES 128-bit cipher in XTS block mode. */
+ MBEDTLS_CIPHER_AES_256_XTS, /**< AES 256-bit cipher in XTS block mode. */
+ MBEDTLS_CIPHER_CHACHA20, /**< ChaCha20 stream cipher. */
+ MBEDTLS_CIPHER_CHACHA20_POLY1305, /**< ChaCha20-Poly1305 AEAD cipher. */
+} mbedtls_cipher_type_t;
+
+/** Supported cipher modes. */
+typedef enum {
+ MBEDTLS_MODE_NONE = 0, /**< None. */
+ MBEDTLS_MODE_ECB, /**< The ECB cipher mode. */
+ MBEDTLS_MODE_CBC, /**< The CBC cipher mode. */
+ MBEDTLS_MODE_CFB, /**< The CFB cipher mode. */
+ MBEDTLS_MODE_OFB, /**< The OFB cipher mode. */
+ MBEDTLS_MODE_CTR, /**< The CTR cipher mode. */
+ MBEDTLS_MODE_GCM, /**< The GCM cipher mode. */
+ MBEDTLS_MODE_STREAM, /**< The stream cipher mode. */
+ MBEDTLS_MODE_CCM, /**< The CCM cipher mode. */
+ MBEDTLS_MODE_XTS, /**< The XTS cipher mode. */
+ MBEDTLS_MODE_CHACHAPOLY, /**< The ChaCha-Poly cipher mode. */
+} mbedtls_cipher_mode_t;
+
+/** Supported cipher padding types. */
+typedef enum {
+ MBEDTLS_PADDING_PKCS7 = 0, /**< PKCS7 padding (default). */
+ MBEDTLS_PADDING_ONE_AND_ZEROS, /**< ISO/IEC 7816-4 padding. */
+ MBEDTLS_PADDING_ZEROS_AND_LEN, /**< ANSI X.923 padding. */
+ MBEDTLS_PADDING_ZEROS, /**< Zero padding (not reversible). */
+ MBEDTLS_PADDING_NONE, /**< Never pad (full blocks only). */
+} mbedtls_cipher_padding_t;
+
+/** Type of operation. */
+typedef enum {
+ MBEDTLS_OPERATION_NONE = -1,
+ MBEDTLS_DECRYPT = 0,
+ MBEDTLS_ENCRYPT,
+} mbedtls_operation_t;
+
+enum {
+ /** Undefined key length. */
+ MBEDTLS_KEY_LENGTH_NONE = 0,
+ /** Key length, in bits (including parity), for DES keys. */
+ MBEDTLS_KEY_LENGTH_DES = 64,
+ /** Key length in bits, including parity, for DES in two-key EDE. */
+ MBEDTLS_KEY_LENGTH_DES_EDE = 128,
+ /** Key length in bits, including parity, for DES in three-key EDE. */
+ MBEDTLS_KEY_LENGTH_DES_EDE3 = 192,
+};
+
+/** Maximum length of any IV, in Bytes. */
+#define MBEDTLS_MAX_IV_LENGTH 16
+/** Maximum block size of any cipher, in Bytes. */
+#define MBEDTLS_MAX_BLOCK_LENGTH 16
+
+/**
+ * Base cipher information (opaque struct).
+ */
+typedef struct mbedtls_cipher_base_t mbedtls_cipher_base_t;
+
+/**
+ * CMAC context (opaque struct).
+ */
+typedef struct mbedtls_cmac_context_t mbedtls_cmac_context_t;
+
+/**
+ * Cipher information. Allows calling cipher functions
+ * in a generic way.
+ */
+typedef struct mbedtls_cipher_info_t
+{
+ /** Full cipher identifier. For example,
+ * MBEDTLS_CIPHER_AES_256_CBC.
+ */
+ mbedtls_cipher_type_t type;
+
+ /** The cipher mode. For example, MBEDTLS_MODE_CBC. */
+ mbedtls_cipher_mode_t mode;
+
+ /** The cipher key length, in bits. This is the
+ * default length for variable sized ciphers.
+ * Includes parity bits for ciphers like DES.
+ */
+ unsigned int key_bitlen;
+
+ /** Name of the cipher. */
+ const char * name;
+
+ /** IV or nonce size, in Bytes.
+ * For ciphers that accept variable IV sizes,
+ * this is the recommended size.
+ */
+ unsigned int iv_size;
+
+ /** Bitflag comprised of MBEDTLS_CIPHER_VARIABLE_IV_LEN and
+ * MBEDTLS_CIPHER_VARIABLE_KEY_LEN indicating whether the
+ * cipher supports variable IV or variable key sizes, respectively.
+ */
+ int flags;
+
+ /** The block size, in Bytes. */
+ unsigned int block_size;
+
+ /** Struct for base cipher information and functions. */
+ const mbedtls_cipher_base_t *base;
+
+} mbedtls_cipher_info_t;
+
+/**
+ * Generic cipher context.
+ */
+typedef struct mbedtls_cipher_context_t
+{
+ /** Information about the associated cipher. */
+ const mbedtls_cipher_info_t *cipher_info;
+
+ /** Key length to use. */
+ int key_bitlen;
+
+ /** Operation that the key of the context has been
+ * initialized for.
+ */
+ mbedtls_operation_t operation;
+
+#if defined(MBEDTLS_CIPHER_MODE_WITH_PADDING)
+ /** Padding functions to use, if relevant for
+ * the specific cipher mode.
+ */
+ void (*add_padding)( unsigned char *output, size_t olen, size_t data_len );
+ int (*get_padding)( unsigned char *input, size_t ilen, size_t *data_len );
+#endif
+
+ /** Buffer for input that has not been processed yet. */
+ unsigned char unprocessed_data[MBEDTLS_MAX_BLOCK_LENGTH];
+
+ /** Number of Bytes that have not been processed yet. */
+ size_t unprocessed_len;
+
+ /** Current IV or NONCE_COUNTER for CTR-mode, data unit (or sector) number
+ * for XTS-mode. */
+ unsigned char iv[MBEDTLS_MAX_IV_LENGTH];
+
+ /** IV size in Bytes, for ciphers with variable-length IVs. */
+ size_t iv_size;
+
+ /** The cipher-specific context. */
+ void *cipher_ctx;
+
+#if defined(MBEDTLS_CMAC_C)
+ /** CMAC-specific context. */
+ mbedtls_cmac_context_t *cmac_ctx;
+#endif
+} mbedtls_cipher_context_t;
+
+/**
+ * \brief This function retrieves the list of ciphers supported by the generic
+ * cipher module.
+ *
+ * \return A statically-allocated array of ciphers. The last entry
+ * is zero.
+ */
+const int *mbedtls_cipher_list( void );
+
+/**
+ * \brief This function retrieves the cipher-information
+ * structure associated with the given cipher name.
+ *
+ * \param cipher_name Name of the cipher to search for. This must not be
+ * \c NULL.
+ *
+ * \return The cipher information structure associated with the
+ * given \p cipher_name.
+ * \return \c NULL if the associated cipher information is not found.
+ */
+const mbedtls_cipher_info_t *mbedtls_cipher_info_from_string( const char *cipher_name );
+
+/**
+ * \brief This function retrieves the cipher-information
+ * structure associated with the given cipher type.
+ *
+ * \param cipher_type Type of the cipher to search for.
+ *
+ * \return The cipher information structure associated with the
+ * given \p cipher_type.
+ * \return \c NULL if the associated cipher information is not found.
+ */
+const mbedtls_cipher_info_t *mbedtls_cipher_info_from_type( const mbedtls_cipher_type_t cipher_type );
+
+/**
+ * \brief This function retrieves the cipher-information
+ * structure associated with the given cipher ID,
+ * key size and mode.
+ *
+ * \param cipher_id The ID of the cipher to search for. For example,
+ * #MBEDTLS_CIPHER_ID_AES.
+ * \param key_bitlen The length of the key in bits.
+ * \param mode The cipher mode. For example, #MBEDTLS_MODE_CBC.
+ *
+ * \return The cipher information structure associated with the
+ * given \p cipher_id.
+ * \return \c NULL if the associated cipher information is not found.
+ */
+const mbedtls_cipher_info_t *mbedtls_cipher_info_from_values( const mbedtls_cipher_id_t cipher_id,
+ int key_bitlen,
+ const mbedtls_cipher_mode_t mode );
+
+/**
+ * \brief This function initializes a \p cipher_context as NONE.
+ *
+ * \param ctx The context to be initialized. This must not be \c NULL.
+ */
+void mbedtls_cipher_init( mbedtls_cipher_context_t *ctx );
+
+/**
+ * \brief This function frees and clears the cipher-specific
+ * context of \p ctx. Freeing \p ctx itself remains the
+ * responsibility of the caller.
+ *
+ * \param ctx The context to be freed. If this is \c NULL, the
+ * function has no effect, otherwise this must point to an
+ * initialized context.
+ */
+void mbedtls_cipher_free( mbedtls_cipher_context_t *ctx );
+
+
+/**
+ * \brief This function initializes and fills the cipher-context
+ * structure with the appropriate values. It also clears
+ * the structure.
+ *
+ * \param ctx The context to initialize. This must be initialized.
+ * \param cipher_info The cipher to use.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ * parameter-verification failure.
+ * \return #MBEDTLS_ERR_CIPHER_ALLOC_FAILED if allocation of the
+ * cipher-specific context fails.
+ *
+ * \internal Currently, the function also clears the structure.
+ * In future versions, the caller will be required to call
+ * mbedtls_cipher_init() on the structure first.
+ */
+int mbedtls_cipher_setup( mbedtls_cipher_context_t *ctx,
+ const mbedtls_cipher_info_t *cipher_info );
+
+/**
+ * \brief This function returns the block size of the given cipher.
+ *
+ * \param ctx The context of the cipher. This must be initialized.
+ *
+ * \return The block size of the underlying cipher.
+ * \return \c 0 if \p ctx has not been initialized.
+ */
+static inline unsigned int mbedtls_cipher_get_block_size(
+ const mbedtls_cipher_context_t *ctx )
+{
+ MBEDTLS_INTERNAL_VALIDATE_RET( ctx != NULL, 0 );
+ if( ctx->cipher_info == NULL )
+ return 0;
+
+ return ctx->cipher_info->block_size;
+}
+
+/**
+ * \brief This function returns the mode of operation for
+ * the cipher. For example, MBEDTLS_MODE_CBC.
+ *
+ * \param ctx The context of the cipher. This must be initialized.
+ *
+ * \return The mode of operation.
+ * \return #MBEDTLS_MODE_NONE if \p ctx has not been initialized.
+ */
+static inline mbedtls_cipher_mode_t mbedtls_cipher_get_cipher_mode(
+ const mbedtls_cipher_context_t *ctx )
+{
+ MBEDTLS_INTERNAL_VALIDATE_RET( ctx != NULL, MBEDTLS_MODE_NONE );
+ if( ctx->cipher_info == NULL )
+ return MBEDTLS_MODE_NONE;
+
+ return ctx->cipher_info->mode;
+}
+
+/**
+ * \brief This function returns the size of the IV or nonce
+ * of the cipher, in Bytes.
+ *
+ * \param ctx The context of the cipher. This must be initialized.
+ *
+ * \return The recommended IV size if no IV has been set.
+ * \return \c 0 for ciphers not using an IV or a nonce.
+ * \return The actual size if an IV has been set.
+ */
+static inline int mbedtls_cipher_get_iv_size(
+ const mbedtls_cipher_context_t *ctx )
+{
+ MBEDTLS_INTERNAL_VALIDATE_RET( ctx != NULL, 0 );
+ if( ctx->cipher_info == NULL )
+ return 0;
+
+ if( ctx->iv_size != 0 )
+ return (int) ctx->iv_size;
+
+ return (int) ctx->cipher_info->iv_size;
+}
+
+/**
+ * \brief This function returns the type of the given cipher.
+ *
+ * \param ctx The context of the cipher. This must be initialized.
+ *
+ * \return The type of the cipher.
+ * \return #MBEDTLS_CIPHER_NONE if \p ctx has not been initialized.
+ */
+static inline mbedtls_cipher_type_t mbedtls_cipher_get_type(
+ const mbedtls_cipher_context_t *ctx )
+{
+ MBEDTLS_INTERNAL_VALIDATE_RET(
+ ctx != NULL, MBEDTLS_CIPHER_NONE );
+ if( ctx->cipher_info == NULL )
+ return MBEDTLS_CIPHER_NONE;
+
+ return ctx->cipher_info->type;
+}
+
+/**
+ * \brief This function returns the name of the given cipher
+ * as a string.
+ *
+ * \param ctx The context of the cipher. This must be initialized.
+ *
+ * \return The name of the cipher.
+ * \return NULL if \p ctx has not been not initialized.
+ */
+static inline const char *mbedtls_cipher_get_name(
+ const mbedtls_cipher_context_t *ctx )
+{
+ MBEDTLS_INTERNAL_VALIDATE_RET( ctx != NULL, 0 );
+ if( ctx->cipher_info == NULL )
+ return 0;
+
+ return ctx->cipher_info->name;
+}
+
+/**
+ * \brief This function returns the key length of the cipher.
+ *
+ * \param ctx The context of the cipher. This must be initialized.
+ *
+ * \return The key length of the cipher in bits.
+ * \return #MBEDTLS_KEY_LENGTH_NONE if ctx \p has not been
+ * initialized.
+ */
+static inline int mbedtls_cipher_get_key_bitlen(
+ const mbedtls_cipher_context_t *ctx )
+{
+ MBEDTLS_INTERNAL_VALIDATE_RET(
+ ctx != NULL, MBEDTLS_KEY_LENGTH_NONE );
+ if( ctx->cipher_info == NULL )
+ return MBEDTLS_KEY_LENGTH_NONE;
+
+ return (int) ctx->cipher_info->key_bitlen;
+}
+
+/**
+ * \brief This function returns the operation of the given cipher.
+ *
+ * \param ctx The context of the cipher. This must be initialized.
+ *
+ * \return The type of operation: #MBEDTLS_ENCRYPT or #MBEDTLS_DECRYPT.
+ * \return #MBEDTLS_OPERATION_NONE if \p ctx has not been initialized.
+ */
+static inline mbedtls_operation_t mbedtls_cipher_get_operation(
+ const mbedtls_cipher_context_t *ctx )
+{
+ MBEDTLS_INTERNAL_VALIDATE_RET(
+ ctx != NULL, MBEDTLS_OPERATION_NONE );
+ if( ctx->cipher_info == NULL )
+ return MBEDTLS_OPERATION_NONE;
+
+ return ctx->operation;
+}
+
+/**
+ * \brief This function sets the key to use with the given context.
+ *
+ * \param ctx The generic cipher context. This must be initialized and
+ * bound to a cipher information structure.
+ * \param key The key to use. This must be a readable buffer of at
+ * least \p key_bitlen Bits.
+ * \param key_bitlen The key length to use, in Bits.
+ * \param operation The operation that the key will be used for:
+ * #MBEDTLS_ENCRYPT or #MBEDTLS_DECRYPT.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ * parameter-verification failure.
+ * \return A cipher-specific error code on failure.
+ */
+int mbedtls_cipher_setkey( mbedtls_cipher_context_t *ctx,
+ const unsigned char *key,
+ int key_bitlen,
+ const mbedtls_operation_t operation );
+
+#if defined(MBEDTLS_CIPHER_MODE_WITH_PADDING)
+/**
+ * \brief This function sets the padding mode, for cipher modes
+ * that use padding.
+ *
+ * The default passing mode is PKCS7 padding.
+ *
+ * \param ctx The generic cipher context. This must be initialized and
+ * bound to a cipher information structure.
+ * \param mode The padding mode.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE
+ * if the selected padding mode is not supported.
+ * \return #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA if the cipher mode
+ * does not support padding.
+ */
+int mbedtls_cipher_set_padding_mode( mbedtls_cipher_context_t *ctx,
+ mbedtls_cipher_padding_t mode );
+#endif /* MBEDTLS_CIPHER_MODE_WITH_PADDING */
+
+/**
+ * \brief This function sets the initialization vector (IV)
+ * or nonce.
+ *
+ * \note Some ciphers do not use IVs nor nonce. For these
+ * ciphers, this function has no effect.
+ *
+ * \param ctx The generic cipher context. This must be initialized and
+ * bound to a cipher information structure.
+ * \param iv The IV to use, or NONCE_COUNTER for CTR-mode ciphers. This
+ * must be a readable buffer of at least \p iv_len Bytes.
+ * \param iv_len The IV length for ciphers with variable-size IV.
+ * This parameter is discarded by ciphers with fixed-size IV.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ * parameter-verification failure.
+ */
+int mbedtls_cipher_set_iv( mbedtls_cipher_context_t *ctx,
+ const unsigned char *iv,
+ size_t iv_len );
+
+/**
+ * \brief This function resets the cipher state.
+ *
+ * \param ctx The generic cipher context. This must be initialized.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ * parameter-verification failure.
+ */
+int mbedtls_cipher_reset( mbedtls_cipher_context_t *ctx );
+
+#if defined(MBEDTLS_GCM_C) || defined(MBEDTLS_CHACHAPOLY_C)
+/**
+ * \brief This function adds additional data for AEAD ciphers.
+ * Currently supported with GCM and ChaCha20+Poly1305.
+ * This must be called exactly once, after
+ * mbedtls_cipher_reset().
+ *
+ * \param ctx The generic cipher context. This must be initialized.
+ * \param ad The additional data to use. This must be a readable
+ * buffer of at least \p ad_len Bytes.
+ * \param ad_len the Length of \p ad Bytes.
+ *
+ * \return \c 0 on success.
+ * \return A specific error code on failure.
+ */
+int mbedtls_cipher_update_ad( mbedtls_cipher_context_t *ctx,
+ const unsigned char *ad, size_t ad_len );
+#endif /* MBEDTLS_GCM_C || MBEDTLS_CHACHAPOLY_C */
+
+/**
+ * \brief The generic cipher update function. It encrypts or
+ * decrypts using the given cipher context. Writes as
+ * many block-sized blocks of data as possible to output.
+ * Any data that cannot be written immediately is either
+ * added to the next block, or flushed when
+ * mbedtls_cipher_finish() is called.
+ * Exception: For MBEDTLS_MODE_ECB, expects a single block
+ * in size. For example, 16 Bytes for AES.
+ *
+ * \note If the underlying cipher is used in GCM mode, all calls
+ * to this function, except for the last one before
+ * mbedtls_cipher_finish(), must have \p ilen as a
+ * multiple of the block size of the cipher.
+ *
+ * \param ctx The generic cipher context. This must be initialized and
+ * bound to a key.
+ * \param input The buffer holding the input data. This must be a
+ * readable buffer of at least \p ilen Bytes.
+ * \param ilen The length of the input data.
+ * \param output The buffer for the output data. This must be able to
+ * hold at least `ilen + block_size`. This must not be the
+ * same buffer as \p input.
+ * \param olen The length of the output data, to be updated with the
+ * actual number of Bytes written. This must not be
+ * \c NULL.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ * parameter-verification failure.
+ * \return #MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE on an
+ * unsupported mode for a cipher.
+ * \return A cipher-specific error code on failure.
+ */
+int mbedtls_cipher_update( mbedtls_cipher_context_t *ctx, const unsigned char *input,
+ size_t ilen, unsigned char *output, size_t *olen );
+
+/**
+ * \brief The generic cipher finalization function. If data still
+ * needs to be flushed from an incomplete block, the data
+ * contained in it is padded to the size of
+ * the last block, and written to the \p output buffer.
+ *
+ * \param ctx The generic cipher context. This must be initialized and
+ * bound to a key.
+ * \param output The buffer to write data to. This needs to be a writable
+ * buffer of at least \p block_size Bytes.
+ * \param olen The length of the data written to the \p output buffer.
+ * This may not be \c NULL.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ * parameter-verification failure.
+ * \return #MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED on decryption
+ * expecting a full block but not receiving one.
+ * \return #MBEDTLS_ERR_CIPHER_INVALID_PADDING on invalid padding
+ * while decrypting.
+ * \return A cipher-specific error code on failure.
+ */
+int mbedtls_cipher_finish( mbedtls_cipher_context_t *ctx,
+ unsigned char *output, size_t *olen );
+
+#if defined(MBEDTLS_GCM_C) || defined(MBEDTLS_CHACHAPOLY_C)
+/**
+ * \brief This function writes a tag for AEAD ciphers.
+ * Currently supported with GCM and ChaCha20+Poly1305.
+ * This must be called after mbedtls_cipher_finish().
+ *
+ * \param ctx The generic cipher context. This must be initialized,
+ * bound to a key, and have just completed a cipher
+ * operation through mbedtls_cipher_finish() the tag for
+ * which should be written.
+ * \param tag The buffer to write the tag to. This must be a writable
+ * buffer of at least \p tag_len Bytes.
+ * \param tag_len The length of the tag to write.
+ *
+ * \return \c 0 on success.
+ * \return A specific error code on failure.
+ */
+int mbedtls_cipher_write_tag( mbedtls_cipher_context_t *ctx,
+ unsigned char *tag, size_t tag_len );
+
+/**
+ * \brief This function checks the tag for AEAD ciphers.
+ * Currently supported with GCM and ChaCha20+Poly1305.
+ * This must be called after mbedtls_cipher_finish().
+ *
+ * \param ctx The generic cipher context. This must be initialized.
+ * \param tag The buffer holding the tag. This must be a readable
+ * buffer of at least \p tag_len Bytes.
+ * \param tag_len The length of the tag to check.
+ *
+ * \return \c 0 on success.
+ * \return A specific error code on failure.
+ */
+int mbedtls_cipher_check_tag( mbedtls_cipher_context_t *ctx,
+ const unsigned char *tag, size_t tag_len );
+#endif /* MBEDTLS_GCM_C || MBEDTLS_CHACHAPOLY_C */
+
+/**
+ * \brief The generic all-in-one encryption/decryption function,
+ * for all ciphers except AEAD constructs.
+ *
+ * \param ctx The generic cipher context. This must be initialized.
+ * \param iv The IV to use, or NONCE_COUNTER for CTR-mode ciphers.
+ * This must be a readable buffer of at least \p iv_len
+ * Bytes.
+ * \param iv_len The IV length for ciphers with variable-size IV.
+ * This parameter is discarded by ciphers with fixed-size
+ * IV.
+ * \param input The buffer holding the input data. This must be a
+ * readable buffer of at least \p ilen Bytes.
+ * \param ilen The length of the input data in Bytes.
+ * \param output The buffer for the output data. This must be able to
+ * hold at least `ilen + block_size`. This must not be the
+ * same buffer as \p input.
+ * \param olen The length of the output data, to be updated with the
+ * actual number of Bytes written. This must not be
+ * \c NULL.
+ *
+ * \note Some ciphers do not use IVs nor nonce. For these
+ * ciphers, use \p iv = NULL and \p iv_len = 0.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ * parameter-verification failure.
+ * \return #MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED on decryption
+ * expecting a full block but not receiving one.
+ * \return #MBEDTLS_ERR_CIPHER_INVALID_PADDING on invalid padding
+ * while decrypting.
+ * \return A cipher-specific error code on failure.
+ */
+int mbedtls_cipher_crypt( mbedtls_cipher_context_t *ctx,
+ const unsigned char *iv, size_t iv_len,
+ const unsigned char *input, size_t ilen,
+ unsigned char *output, size_t *olen );
+
+#if defined(MBEDTLS_CIPHER_MODE_AEAD)
+/**
+ * \brief The generic autenticated encryption (AEAD) function.
+ *
+ * \param ctx The generic cipher context. This must be initialized and
+ * bound to a key.
+ * \param iv The IV to use, or NONCE_COUNTER for CTR-mode ciphers.
+ * This must be a readable buffer of at least \p iv_len
+ * Bytes.
+ * \param iv_len The IV length for ciphers with variable-size IV.
+ * This parameter is discarded by ciphers with fixed-size IV.
+ * \param ad The additional data to authenticate. This must be a
+ * readable buffer of at least \p ad_len Bytes.
+ * \param ad_len The length of \p ad.
+ * \param input The buffer holding the input data. This must be a
+ * readable buffer of at least \p ilen Bytes.
+ * \param ilen The length of the input data.
+ * \param output The buffer for the output data. This must be able to
+ * hold at least \p ilen Bytes.
+ * \param olen The length of the output data, to be updated with the
+ * actual number of Bytes written. This must not be
+ * \c NULL.
+ * \param tag The buffer for the authentication tag. This must be a
+ * writable buffer of at least \p tag_len Bytes.
+ * \param tag_len The desired length of the authentication tag.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ * parameter-verification failure.
+ * \return A cipher-specific error code on failure.
+ */
+int mbedtls_cipher_auth_encrypt( mbedtls_cipher_context_t *ctx,
+ const unsigned char *iv, size_t iv_len,
+ const unsigned char *ad, size_t ad_len,
+ const unsigned char *input, size_t ilen,
+ unsigned char *output, size_t *olen,
+ unsigned char *tag, size_t tag_len );
+
+/**
+ * \brief The generic autenticated decryption (AEAD) function.
+ *
+ * \note If the data is not authentic, then the output buffer
+ * is zeroed out to prevent the unauthentic plaintext being
+ * used, making this interface safer.
+ *
+ * \param ctx The generic cipher context. This must be initialized and
+ * and bound to a key.
+ * \param iv The IV to use, or NONCE_COUNTER for CTR-mode ciphers.
+ * This must be a readable buffer of at least \p iv_len
+ * Bytes.
+ * \param iv_len The IV length for ciphers with variable-size IV.
+ * This parameter is discarded by ciphers with fixed-size IV.
+ * \param ad The additional data to be authenticated. This must be a
+ * readable buffer of at least \p ad_len Bytes.
+ * \param ad_len The length of \p ad.
+ * \param input The buffer holding the input data. This must be a
+ * readable buffer of at least \p ilen Bytes.
+ * \param ilen The length of the input data.
+ * \param output The buffer for the output data.
+ * This must be able to hold at least \p ilen Bytes.
+ * \param olen The length of the output data, to be updated with the
+ * actual number of Bytes written. This must not be
+ * \c NULL.
+ * \param tag The buffer holding the authentication tag. This must be
+ * a readable buffer of at least \p tag_len Bytes.
+ * \param tag_len The length of the authentication tag.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA on
+ * parameter-verification failure.
+ * \return #MBEDTLS_ERR_CIPHER_AUTH_FAILED if data is not authentic.
+ * \return A cipher-specific error code on failure.
+ */
+int mbedtls_cipher_auth_decrypt( mbedtls_cipher_context_t *ctx,
+ const unsigned char *iv, size_t iv_len,
+ const unsigned char *ad, size_t ad_len,
+ const unsigned char *input, size_t ilen,
+ unsigned char *output, size_t *olen,
+ const unsigned char *tag, size_t tag_len );
+#endif /* MBEDTLS_CIPHER_MODE_AEAD */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_CIPHER_H */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/cipher_internal.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/cipher_internal.h
new file mode 100644
index 0000000..c6def0b
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/cipher_internal.h
@@ -0,0 +1,125 @@
+/**
+ * \file cipher_internal.h
+ *
+ * \brief Cipher wrappers.
+ *
+ * \author Adriaan de Jong <dejong@fox-it.com>
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_CIPHER_WRAP_H
+#define MBEDTLS_CIPHER_WRAP_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "cipher.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Base cipher information. The non-mode specific functions and values.
+ */
+struct mbedtls_cipher_base_t
+{
+ /** Base Cipher type (e.g. MBEDTLS_CIPHER_ID_AES) */
+ mbedtls_cipher_id_t cipher;
+
+ /** Encrypt using ECB */
+ int (*ecb_func)( void *ctx, mbedtls_operation_t mode,
+ const unsigned char *input, unsigned char *output );
+
+#if defined(MBEDTLS_CIPHER_MODE_CBC)
+ /** Encrypt using CBC */
+ int (*cbc_func)( void *ctx, mbedtls_operation_t mode, size_t length,
+ unsigned char *iv, const unsigned char *input,
+ unsigned char *output );
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_CFB)
+ /** Encrypt using CFB (Full length) */
+ int (*cfb_func)( void *ctx, mbedtls_operation_t mode, size_t length, size_t *iv_off,
+ unsigned char *iv, const unsigned char *input,
+ unsigned char *output );
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_OFB)
+ /** Encrypt using OFB (Full length) */
+ int (*ofb_func)( void *ctx, size_t length, size_t *iv_off,
+ unsigned char *iv,
+ const unsigned char *input,
+ unsigned char *output );
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_CTR)
+ /** Encrypt using CTR */
+ int (*ctr_func)( void *ctx, size_t length, size_t *nc_off,
+ unsigned char *nonce_counter, unsigned char *stream_block,
+ const unsigned char *input, unsigned char *output );
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_XTS)
+ /** Encrypt or decrypt using XTS. */
+ int (*xts_func)( void *ctx, mbedtls_operation_t mode, size_t length,
+ const unsigned char data_unit[16],
+ const unsigned char *input, unsigned char *output );
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_STREAM)
+ /** Encrypt using STREAM */
+ int (*stream_func)( void *ctx, size_t length,
+ const unsigned char *input, unsigned char *output );
+#endif
+
+ /** Set key for encryption purposes */
+ int (*setkey_enc_func)( void *ctx, const unsigned char *key,
+ unsigned int key_bitlen );
+
+ /** Set key for decryption purposes */
+ int (*setkey_dec_func)( void *ctx, const unsigned char *key,
+ unsigned int key_bitlen);
+
+ /** Allocate a new context */
+ void * (*ctx_alloc_func)( void );
+
+ /** Free the given context */
+ void (*ctx_free_func)( void *ctx );
+
+};
+
+typedef struct
+{
+ mbedtls_cipher_type_t type;
+ const mbedtls_cipher_info_t *info;
+} mbedtls_cipher_definition_t;
+
+extern const mbedtls_cipher_definition_t mbedtls_cipher_definitions[];
+
+extern int mbedtls_cipher_supported[];
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_CIPHER_WRAP_H */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/cmac.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/cmac.h
new file mode 100644
index 0000000..9d42b3f
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/cmac.h
@@ -0,0 +1,213 @@
+/**
+ * \file cmac.h
+ *
+ * \brief This file contains CMAC definitions and functions.
+ *
+ * The Cipher-based Message Authentication Code (CMAC) Mode for
+ * Authentication is defined in <em>RFC-4493: The AES-CMAC Algorithm</em>.
+ */
+/*
+ * Copyright (C) 2015-2018, Arm Limited (or its affiliates), All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of Mbed TLS (https://tls.mbed.org)
+ */
+
+#ifndef MBEDTLS_CMAC_H
+#define MBEDTLS_CMAC_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "cipher.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* MBEDTLS_ERR_CMAC_HW_ACCEL_FAILED is deprecated and should not be used. */
+#define MBEDTLS_ERR_CMAC_HW_ACCEL_FAILED -0x007A /**< CMAC hardware accelerator failed. */
+
+#define MBEDTLS_AES_BLOCK_SIZE 16
+#define MBEDTLS_DES3_BLOCK_SIZE 8
+
+#if defined(MBEDTLS_AES_C)
+#define MBEDTLS_CIPHER_BLKSIZE_MAX 16 /**< The longest block used by CMAC is that of AES. */
+#else
+#define MBEDTLS_CIPHER_BLKSIZE_MAX 8 /**< The longest block used by CMAC is that of 3DES. */
+#endif
+
+#if !defined(MBEDTLS_CMAC_ALT)
+
+/**
+ * The CMAC context structure.
+ */
+struct mbedtls_cmac_context_t
+{
+ /** The internal state of the CMAC algorithm. */
+ unsigned char state[MBEDTLS_CIPHER_BLKSIZE_MAX];
+
+ /** Unprocessed data - either data that was not block aligned and is still
+ * pending processing, or the final block. */
+ unsigned char unprocessed_block[MBEDTLS_CIPHER_BLKSIZE_MAX];
+
+ /** The length of data pending processing. */
+ size_t unprocessed_len;
+};
+
+#else /* !MBEDTLS_CMAC_ALT */
+#include "cmac_alt.h"
+#endif /* !MBEDTLS_CMAC_ALT */
+
+/**
+ * \brief This function sets the CMAC key, and prepares to authenticate
+ * the input data.
+ * Must be called with an initialized cipher context.
+ *
+ * \param ctx The cipher context used for the CMAC operation, initialized
+ * as one of the following types: MBEDTLS_CIPHER_AES_128_ECB,
+ * MBEDTLS_CIPHER_AES_192_ECB, MBEDTLS_CIPHER_AES_256_ECB,
+ * or MBEDTLS_CIPHER_DES_EDE3_ECB.
+ * \param key The CMAC key.
+ * \param keybits The length of the CMAC key in bits.
+ * Must be supported by the cipher.
+ *
+ * \return \c 0 on success.
+ * \return A cipher-specific error code on failure.
+ */
+int mbedtls_cipher_cmac_starts( mbedtls_cipher_context_t *ctx,
+ const unsigned char *key, size_t keybits );
+
+/**
+ * \brief This function feeds an input buffer into an ongoing CMAC
+ * computation.
+ *
+ * It is called between mbedtls_cipher_cmac_starts() or
+ * mbedtls_cipher_cmac_reset(), and mbedtls_cipher_cmac_finish().
+ * Can be called repeatedly.
+ *
+ * \param ctx The cipher context used for the CMAC operation.
+ * \param input The buffer holding the input data.
+ * \param ilen The length of the input data.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA
+ * if parameter verification fails.
+ */
+int mbedtls_cipher_cmac_update( mbedtls_cipher_context_t *ctx,
+ const unsigned char *input, size_t ilen );
+
+/**
+ * \brief This function finishes the CMAC operation, and writes
+ * the result to the output buffer.
+ *
+ * It is called after mbedtls_cipher_cmac_update().
+ * It can be followed by mbedtls_cipher_cmac_reset() and
+ * mbedtls_cipher_cmac_update(), or mbedtls_cipher_free().
+ *
+ * \param ctx The cipher context used for the CMAC operation.
+ * \param output The output buffer for the CMAC checksum result.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA
+ * if parameter verification fails.
+ */
+int mbedtls_cipher_cmac_finish( mbedtls_cipher_context_t *ctx,
+ unsigned char *output );
+
+/**
+ * \brief This function prepares the authentication of another
+ * message with the same key as the previous CMAC
+ * operation.
+ *
+ * It is called after mbedtls_cipher_cmac_finish()
+ * and before mbedtls_cipher_cmac_update().
+ *
+ * \param ctx The cipher context used for the CMAC operation.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA
+ * if parameter verification fails.
+ */
+int mbedtls_cipher_cmac_reset( mbedtls_cipher_context_t *ctx );
+
+/**
+ * \brief This function calculates the full generic CMAC
+ * on the input buffer with the provided key.
+ *
+ * The function allocates the context, performs the
+ * calculation, and frees the context.
+ *
+ * The CMAC result is calculated as
+ * output = generic CMAC(cmac key, input buffer).
+ *
+ *
+ * \param cipher_info The cipher information.
+ * \param key The CMAC key.
+ * \param keylen The length of the CMAC key in bits.
+ * \param input The buffer holding the input data.
+ * \param ilen The length of the input data.
+ * \param output The buffer for the generic CMAC result.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA
+ * if parameter verification fails.
+ */
+int mbedtls_cipher_cmac( const mbedtls_cipher_info_t *cipher_info,
+ const unsigned char *key, size_t keylen,
+ const unsigned char *input, size_t ilen,
+ unsigned char *output );
+
+#if defined(MBEDTLS_AES_C)
+/**
+ * \brief This function implements the AES-CMAC-PRF-128 pseudorandom
+ * function, as defined in
+ * <em>RFC-4615: The Advanced Encryption Standard-Cipher-based
+ * Message Authentication Code-Pseudo-Random Function-128
+ * (AES-CMAC-PRF-128) Algorithm for the Internet Key
+ * Exchange Protocol (IKE).</em>
+ *
+ * \param key The key to use.
+ * \param key_len The key length in Bytes.
+ * \param input The buffer holding the input data.
+ * \param in_len The length of the input data in Bytes.
+ * \param output The buffer holding the generated 16 Bytes of
+ * pseudorandom output.
+ *
+ * \return \c 0 on success.
+ */
+int mbedtls_aes_cmac_prf_128( const unsigned char *key, size_t key_len,
+ const unsigned char *input, size_t in_len,
+ unsigned char output[16] );
+#endif /* MBEDTLS_AES_C */
+
+#if defined(MBEDTLS_SELF_TEST) && ( defined(MBEDTLS_AES_C) || defined(MBEDTLS_DES_C) )
+/**
+ * \brief The CMAC checkup routine.
+ *
+ * \return \c 0 on success.
+ * \return \c 1 on failure.
+ */
+int mbedtls_cmac_self_test( int verbose );
+#endif /* MBEDTLS_SELF_TEST && ( MBEDTLS_AES_C || MBEDTLS_DES_C ) */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_CMAC_H */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/cmac_alt.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/cmac_alt.h
new file mode 100644
index 0000000..07e7168
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/cmac_alt.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause OR Arm’s non-OSI source license
+ */
+
+#ifndef MBEDTLS_CMAC_ALT_H
+#define MBEDTLS_CMAC_ALT_H
+
+#if defined(MBEDTLS_CONFIG_FILE)
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+
+
+#include <stddef.h>
+#include <stdint.h>
+
+#if defined(MBEDTLS_CMAC_ALT)
+
+/* hide internal implementation of the struct. Allocate enough space for it.*/
+#define MBEDTLS_CMAC_CONTEXT_SIZE_IN_WORDS 33
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief CMAC cipher context structure
+ */
+struct mbedtls_cmac_context_t{
+ /*! Internal buffer */
+ uint32_t buf[MBEDTLS_CMAC_CONTEXT_SIZE_IN_WORDS];
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_CMAC_ALT */
+
+#endif /* MBEDTLS_CMAC_ALT_H */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/compat-1.3.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/compat-1.3.h
new file mode 100644
index 0000000..a58b472
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/compat-1.3.h
@@ -0,0 +1,2531 @@
+/**
+ * \file compat-1.3.h
+ *
+ * \brief Compatibility definitions for using mbed TLS with client code written
+ * for the PolarSSL naming conventions.
+ *
+ * \deprecated Use the new names directly instead
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#if ! defined(MBEDTLS_DEPRECATED_REMOVED)
+
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#warning "Including compat-1.3.h is deprecated"
+#endif
+
+#ifndef MBEDTLS_COMPAT13_H
+#define MBEDTLS_COMPAT13_H
+
+/*
+ * config.h options
+ */
+#if defined MBEDTLS_AESNI_C
+#define POLARSSL_AESNI_C MBEDTLS_AESNI_C
+#endif
+#if defined MBEDTLS_AES_ALT
+#define POLARSSL_AES_ALT MBEDTLS_AES_ALT
+#endif
+#if defined MBEDTLS_AES_C
+#define POLARSSL_AES_C MBEDTLS_AES_C
+#endif
+#if defined MBEDTLS_AES_ROM_TABLES
+#define POLARSSL_AES_ROM_TABLES MBEDTLS_AES_ROM_TABLES
+#endif
+#if defined MBEDTLS_ARC4_ALT
+#define POLARSSL_ARC4_ALT MBEDTLS_ARC4_ALT
+#endif
+#if defined MBEDTLS_ARC4_C
+#define POLARSSL_ARC4_C MBEDTLS_ARC4_C
+#endif
+#if defined MBEDTLS_ASN1_PARSE_C
+#define POLARSSL_ASN1_PARSE_C MBEDTLS_ASN1_PARSE_C
+#endif
+#if defined MBEDTLS_ASN1_WRITE_C
+#define POLARSSL_ASN1_WRITE_C MBEDTLS_ASN1_WRITE_C
+#endif
+#if defined MBEDTLS_BASE64_C
+#define POLARSSL_BASE64_C MBEDTLS_BASE64_C
+#endif
+#if defined MBEDTLS_BIGNUM_C
+#define POLARSSL_BIGNUM_C MBEDTLS_BIGNUM_C
+#endif
+#if defined MBEDTLS_BLOWFISH_ALT
+#define POLARSSL_BLOWFISH_ALT MBEDTLS_BLOWFISH_ALT
+#endif
+#if defined MBEDTLS_BLOWFISH_C
+#define POLARSSL_BLOWFISH_C MBEDTLS_BLOWFISH_C
+#endif
+#if defined MBEDTLS_CAMELLIA_ALT
+#define POLARSSL_CAMELLIA_ALT MBEDTLS_CAMELLIA_ALT
+#endif
+#if defined MBEDTLS_CAMELLIA_C
+#define POLARSSL_CAMELLIA_C MBEDTLS_CAMELLIA_C
+#endif
+#if defined MBEDTLS_CAMELLIA_SMALL_MEMORY
+#define POLARSSL_CAMELLIA_SMALL_MEMORY MBEDTLS_CAMELLIA_SMALL_MEMORY
+#endif
+#if defined MBEDTLS_CCM_C
+#define POLARSSL_CCM_C MBEDTLS_CCM_C
+#endif
+#if defined MBEDTLS_CERTS_C
+#define POLARSSL_CERTS_C MBEDTLS_CERTS_C
+#endif
+#if defined MBEDTLS_CIPHER_C
+#define POLARSSL_CIPHER_C MBEDTLS_CIPHER_C
+#endif
+#if defined MBEDTLS_CIPHER_MODE_CBC
+#define POLARSSL_CIPHER_MODE_CBC MBEDTLS_CIPHER_MODE_CBC
+#endif
+#if defined MBEDTLS_CIPHER_MODE_CFB
+#define POLARSSL_CIPHER_MODE_CFB MBEDTLS_CIPHER_MODE_CFB
+#endif
+#if defined MBEDTLS_CIPHER_MODE_CTR
+#define POLARSSL_CIPHER_MODE_CTR MBEDTLS_CIPHER_MODE_CTR
+#endif
+#if defined MBEDTLS_CIPHER_NULL_CIPHER
+#define POLARSSL_CIPHER_NULL_CIPHER MBEDTLS_CIPHER_NULL_CIPHER
+#endif
+#if defined MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS
+#define POLARSSL_CIPHER_PADDING_ONE_AND_ZEROS MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS
+#endif
+#if defined MBEDTLS_CIPHER_PADDING_PKCS7
+#define POLARSSL_CIPHER_PADDING_PKCS7 MBEDTLS_CIPHER_PADDING_PKCS7
+#endif
+#if defined MBEDTLS_CIPHER_PADDING_ZEROS
+#define POLARSSL_CIPHER_PADDING_ZEROS MBEDTLS_CIPHER_PADDING_ZEROS
+#endif
+#if defined MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN
+#define POLARSSL_CIPHER_PADDING_ZEROS_AND_LEN MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN
+#endif
+#if defined MBEDTLS_CTR_DRBG_C
+#define POLARSSL_CTR_DRBG_C MBEDTLS_CTR_DRBG_C
+#endif
+#if defined MBEDTLS_DEBUG_C
+#define POLARSSL_DEBUG_C MBEDTLS_DEBUG_C
+#endif
+#if defined MBEDTLS_DEPRECATED_REMOVED
+#define POLARSSL_DEPRECATED_REMOVED MBEDTLS_DEPRECATED_REMOVED
+#endif
+#if defined MBEDTLS_DEPRECATED_WARNING
+#define POLARSSL_DEPRECATED_WARNING MBEDTLS_DEPRECATED_WARNING
+#endif
+#if defined MBEDTLS_DES_ALT
+#define POLARSSL_DES_ALT MBEDTLS_DES_ALT
+#endif
+#if defined MBEDTLS_DES_C
+#define POLARSSL_DES_C MBEDTLS_DES_C
+#endif
+#if defined MBEDTLS_DHM_C
+#define POLARSSL_DHM_C MBEDTLS_DHM_C
+#endif
+#if defined MBEDTLS_ECDH_C
+#define POLARSSL_ECDH_C MBEDTLS_ECDH_C
+#endif
+#if defined MBEDTLS_ECDSA_C
+#define POLARSSL_ECDSA_C MBEDTLS_ECDSA_C
+#endif
+#if defined MBEDTLS_ECDSA_DETERMINISTIC
+#define POLARSSL_ECDSA_DETERMINISTIC MBEDTLS_ECDSA_DETERMINISTIC
+#endif
+#if defined MBEDTLS_ECP_C
+#define POLARSSL_ECP_C MBEDTLS_ECP_C
+#endif
+#if defined MBEDTLS_ECP_DP_BP256R1_ENABLED
+#define POLARSSL_ECP_DP_BP256R1_ENABLED MBEDTLS_ECP_DP_BP256R1_ENABLED
+#endif
+#if defined MBEDTLS_ECP_DP_BP384R1_ENABLED
+#define POLARSSL_ECP_DP_BP384R1_ENABLED MBEDTLS_ECP_DP_BP384R1_ENABLED
+#endif
+#if defined MBEDTLS_ECP_DP_BP512R1_ENABLED
+#define POLARSSL_ECP_DP_BP512R1_ENABLED MBEDTLS_ECP_DP_BP512R1_ENABLED
+#endif
+#if defined MBEDTLS_ECP_DP_CURVE25519_ENABLED
+#define POLARSSL_ECP_DP_M255_ENABLED MBEDTLS_ECP_DP_CURVE25519_ENABLED
+#endif
+#if defined MBEDTLS_ECP_DP_SECP192K1_ENABLED
+#define POLARSSL_ECP_DP_SECP192K1_ENABLED MBEDTLS_ECP_DP_SECP192K1_ENABLED
+#endif
+#if defined MBEDTLS_ECP_DP_SECP192R1_ENABLED
+#define POLARSSL_ECP_DP_SECP192R1_ENABLED MBEDTLS_ECP_DP_SECP192R1_ENABLED
+#endif
+#if defined MBEDTLS_ECP_DP_SECP224K1_ENABLED
+#define POLARSSL_ECP_DP_SECP224K1_ENABLED MBEDTLS_ECP_DP_SECP224K1_ENABLED
+#endif
+#if defined MBEDTLS_ECP_DP_SECP224R1_ENABLED
+#define POLARSSL_ECP_DP_SECP224R1_ENABLED MBEDTLS_ECP_DP_SECP224R1_ENABLED
+#endif
+#if defined MBEDTLS_ECP_DP_SECP256K1_ENABLED
+#define POLARSSL_ECP_DP_SECP256K1_ENABLED MBEDTLS_ECP_DP_SECP256K1_ENABLED
+#endif
+#if defined MBEDTLS_ECP_DP_SECP256R1_ENABLED
+#define POLARSSL_ECP_DP_SECP256R1_ENABLED MBEDTLS_ECP_DP_SECP256R1_ENABLED
+#endif
+#if defined MBEDTLS_ECP_DP_SECP384R1_ENABLED
+#define POLARSSL_ECP_DP_SECP384R1_ENABLED MBEDTLS_ECP_DP_SECP384R1_ENABLED
+#endif
+#if defined MBEDTLS_ECP_DP_SECP521R1_ENABLED
+#define POLARSSL_ECP_DP_SECP521R1_ENABLED MBEDTLS_ECP_DP_SECP521R1_ENABLED
+#endif
+#if defined MBEDTLS_ECP_FIXED_POINT_OPTIM
+#define POLARSSL_ECP_FIXED_POINT_OPTIM MBEDTLS_ECP_FIXED_POINT_OPTIM
+#endif
+#if defined MBEDTLS_ECP_MAX_BITS
+#define POLARSSL_ECP_MAX_BITS MBEDTLS_ECP_MAX_BITS
+#endif
+#if defined MBEDTLS_ECP_NIST_OPTIM
+#define POLARSSL_ECP_NIST_OPTIM MBEDTLS_ECP_NIST_OPTIM
+#endif
+#if defined MBEDTLS_ECP_WINDOW_SIZE
+#define POLARSSL_ECP_WINDOW_SIZE MBEDTLS_ECP_WINDOW_SIZE
+#endif
+#if defined MBEDTLS_ENABLE_WEAK_CIPHERSUITES
+#define POLARSSL_ENABLE_WEAK_CIPHERSUITES MBEDTLS_ENABLE_WEAK_CIPHERSUITES
+#endif
+#if defined MBEDTLS_ENTROPY_C
+#define POLARSSL_ENTROPY_C MBEDTLS_ENTROPY_C
+#endif
+#if defined MBEDTLS_ENTROPY_FORCE_SHA256
+#define POLARSSL_ENTROPY_FORCE_SHA256 MBEDTLS_ENTROPY_FORCE_SHA256
+#endif
+#if defined MBEDTLS_ERROR_C
+#define POLARSSL_ERROR_C MBEDTLS_ERROR_C
+#endif
+#if defined MBEDTLS_ERROR_STRERROR_DUMMY
+#define POLARSSL_ERROR_STRERROR_DUMMY MBEDTLS_ERROR_STRERROR_DUMMY
+#endif
+#if defined MBEDTLS_FS_IO
+#define POLARSSL_FS_IO MBEDTLS_FS_IO
+#endif
+#if defined MBEDTLS_GCM_C
+#define POLARSSL_GCM_C MBEDTLS_GCM_C
+#endif
+#if defined MBEDTLS_GENPRIME
+#define POLARSSL_GENPRIME MBEDTLS_GENPRIME
+#endif
+#if defined MBEDTLS_HAVEGE_C
+#define POLARSSL_HAVEGE_C MBEDTLS_HAVEGE_C
+#endif
+#if defined MBEDTLS_HAVE_ASM
+#define POLARSSL_HAVE_ASM MBEDTLS_HAVE_ASM
+#endif
+#if defined MBEDTLS_HAVE_SSE2
+#define POLARSSL_HAVE_SSE2 MBEDTLS_HAVE_SSE2
+#endif
+#if defined MBEDTLS_HAVE_TIME
+#define POLARSSL_HAVE_TIME MBEDTLS_HAVE_TIME
+#endif
+#if defined MBEDTLS_HMAC_DRBG_C
+#define POLARSSL_HMAC_DRBG_C MBEDTLS_HMAC_DRBG_C
+#endif
+#if defined MBEDTLS_HMAC_DRBG_MAX_INPUT
+#define POLARSSL_HMAC_DRBG_MAX_INPUT MBEDTLS_HMAC_DRBG_MAX_INPUT
+#endif
+#if defined MBEDTLS_HMAC_DRBG_MAX_REQUEST
+#define POLARSSL_HMAC_DRBG_MAX_REQUEST MBEDTLS_HMAC_DRBG_MAX_REQUEST
+#endif
+#if defined MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT
+#define POLARSSL_HMAC_DRBG_MAX_SEED_INPUT MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT
+#endif
+#if defined MBEDTLS_HMAC_DRBG_RESEED_INTERVAL
+#define POLARSSL_HMAC_DRBG_RESEED_INTERVAL MBEDTLS_HMAC_DRBG_RESEED_INTERVAL
+#endif
+#if defined MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED
+#define POLARSSL_KEY_EXCHANGE_DHE_PSK_ENABLED MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED
+#endif
+#if defined MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED
+#define POLARSSL_KEY_EXCHANGE_DHE_RSA_ENABLED MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED
+#endif
+#if defined MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+#define POLARSSL_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+#endif
+#if defined MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED
+#define POLARSSL_KEY_EXCHANGE_ECDHE_PSK_ENABLED MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED
+#endif
+#if defined MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED
+#define POLARSSL_KEY_EXCHANGE_ECDHE_RSA_ENABLED MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED
+#endif
+#if defined MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED
+#define POLARSSL_KEY_EXCHANGE_ECDH_ECDSA_ENABLED MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED
+#endif
+#if defined MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED
+#define POLARSSL_KEY_EXCHANGE_ECDH_RSA_ENABLED MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED
+#endif
+#if defined MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+#define POLARSSL_KEY_EXCHANGE_PSK_ENABLED MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+#endif
+#if defined MBEDTLS_KEY_EXCHANGE_RSA_ENABLED
+#define POLARSSL_KEY_EXCHANGE_RSA_ENABLED MBEDTLS_KEY_EXCHANGE_RSA_ENABLED
+#endif
+#if defined MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED
+#define POLARSSL_KEY_EXCHANGE_RSA_PSK_ENABLED MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED
+#endif
+#if defined MBEDTLS_MD2_ALT
+#define POLARSSL_MD2_ALT MBEDTLS_MD2_ALT
+#endif
+#if defined MBEDTLS_MD2_C
+#define POLARSSL_MD2_C MBEDTLS_MD2_C
+#endif
+#if defined MBEDTLS_MD2_PROCESS_ALT
+#define POLARSSL_MD2_PROCESS_ALT MBEDTLS_MD2_PROCESS_ALT
+#endif
+#if defined MBEDTLS_MD4_ALT
+#define POLARSSL_MD4_ALT MBEDTLS_MD4_ALT
+#endif
+#if defined MBEDTLS_MD4_C
+#define POLARSSL_MD4_C MBEDTLS_MD4_C
+#endif
+#if defined MBEDTLS_MD4_PROCESS_ALT
+#define POLARSSL_MD4_PROCESS_ALT MBEDTLS_MD4_PROCESS_ALT
+#endif
+#if defined MBEDTLS_MD5_ALT
+#define POLARSSL_MD5_ALT MBEDTLS_MD5_ALT
+#endif
+#if defined MBEDTLS_MD5_C
+#define POLARSSL_MD5_C MBEDTLS_MD5_C
+#endif
+#if defined MBEDTLS_MD5_PROCESS_ALT
+#define POLARSSL_MD5_PROCESS_ALT MBEDTLS_MD5_PROCESS_ALT
+#endif
+#if defined MBEDTLS_MD_C
+#define POLARSSL_MD_C MBEDTLS_MD_C
+#endif
+#if defined MBEDTLS_MEMORY_ALIGN_MULTIPLE
+#define POLARSSL_MEMORY_ALIGN_MULTIPLE MBEDTLS_MEMORY_ALIGN_MULTIPLE
+#endif
+#if defined MBEDTLS_MEMORY_BACKTRACE
+#define POLARSSL_MEMORY_BACKTRACE MBEDTLS_MEMORY_BACKTRACE
+#endif
+#if defined MBEDTLS_MEMORY_BUFFER_ALLOC_C
+#define POLARSSL_MEMORY_BUFFER_ALLOC_C MBEDTLS_MEMORY_BUFFER_ALLOC_C
+#endif
+#if defined MBEDTLS_MEMORY_DEBUG
+#define POLARSSL_MEMORY_DEBUG MBEDTLS_MEMORY_DEBUG
+#endif
+#if defined MBEDTLS_MPI_MAX_SIZE
+#define POLARSSL_MPI_MAX_SIZE MBEDTLS_MPI_MAX_SIZE
+#endif
+#if defined MBEDTLS_MPI_WINDOW_SIZE
+#define POLARSSL_MPI_WINDOW_SIZE MBEDTLS_MPI_WINDOW_SIZE
+#endif
+#if defined MBEDTLS_NET_C
+#define POLARSSL_NET_C MBEDTLS_NET_C
+#endif
+#if defined MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
+#define POLARSSL_NO_DEFAULT_ENTROPY_SOURCES MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
+#endif
+#if defined MBEDTLS_NO_PLATFORM_ENTROPY
+#define POLARSSL_NO_PLATFORM_ENTROPY MBEDTLS_NO_PLATFORM_ENTROPY
+#endif
+#if defined MBEDTLS_OID_C
+#define POLARSSL_OID_C MBEDTLS_OID_C
+#endif
+#if defined MBEDTLS_PADLOCK_C
+#define POLARSSL_PADLOCK_C MBEDTLS_PADLOCK_C
+#endif
+#if defined MBEDTLS_PEM_PARSE_C
+#define POLARSSL_PEM_PARSE_C MBEDTLS_PEM_PARSE_C
+#endif
+#if defined MBEDTLS_PEM_WRITE_C
+#define POLARSSL_PEM_WRITE_C MBEDTLS_PEM_WRITE_C
+#endif
+#if defined MBEDTLS_PKCS11_C
+#define POLARSSL_PKCS11_C MBEDTLS_PKCS11_C
+#endif
+#if defined MBEDTLS_PKCS12_C
+#define POLARSSL_PKCS12_C MBEDTLS_PKCS12_C
+#endif
+#if defined MBEDTLS_PKCS1_V15
+#define POLARSSL_PKCS1_V15 MBEDTLS_PKCS1_V15
+#endif
+#if defined MBEDTLS_PKCS1_V21
+#define POLARSSL_PKCS1_V21 MBEDTLS_PKCS1_V21
+#endif
+#if defined MBEDTLS_PKCS5_C
+#define POLARSSL_PKCS5_C MBEDTLS_PKCS5_C
+#endif
+#if defined MBEDTLS_PK_C
+#define POLARSSL_PK_C MBEDTLS_PK_C
+#endif
+#if defined MBEDTLS_PK_PARSE_C
+#define POLARSSL_PK_PARSE_C MBEDTLS_PK_PARSE_C
+#endif
+#if defined MBEDTLS_PK_PARSE_EC_EXTENDED
+#define POLARSSL_PK_PARSE_EC_EXTENDED MBEDTLS_PK_PARSE_EC_EXTENDED
+#endif
+#if defined MBEDTLS_PK_RSA_ALT_SUPPORT
+#define POLARSSL_PK_RSA_ALT_SUPPORT MBEDTLS_PK_RSA_ALT_SUPPORT
+#endif
+#if defined MBEDTLS_PK_WRITE_C
+#define POLARSSL_PK_WRITE_C MBEDTLS_PK_WRITE_C
+#endif
+#if defined MBEDTLS_PLATFORM_C
+#define POLARSSL_PLATFORM_C MBEDTLS_PLATFORM_C
+#endif
+#if defined MBEDTLS_PLATFORM_EXIT_ALT
+#define POLARSSL_PLATFORM_EXIT_ALT MBEDTLS_PLATFORM_EXIT_ALT
+#endif
+#if defined MBEDTLS_PLATFORM_EXIT_MACRO
+#define POLARSSL_PLATFORM_EXIT_MACRO MBEDTLS_PLATFORM_EXIT_MACRO
+#endif
+#if defined MBEDTLS_PLATFORM_FPRINTF_ALT
+#define POLARSSL_PLATFORM_FPRINTF_ALT MBEDTLS_PLATFORM_FPRINTF_ALT
+#endif
+#if defined MBEDTLS_PLATFORM_FPRINTF_MACRO
+#define POLARSSL_PLATFORM_FPRINTF_MACRO MBEDTLS_PLATFORM_FPRINTF_MACRO
+#endif
+#if defined MBEDTLS_PLATFORM_FREE_MACRO
+#define POLARSSL_PLATFORM_FREE_MACRO MBEDTLS_PLATFORM_FREE_MACRO
+#endif
+#if defined MBEDTLS_PLATFORM_MEMORY
+#define POLARSSL_PLATFORM_MEMORY MBEDTLS_PLATFORM_MEMORY
+#endif
+#if defined MBEDTLS_PLATFORM_NO_STD_FUNCTIONS
+#define POLARSSL_PLATFORM_NO_STD_FUNCTIONS MBEDTLS_PLATFORM_NO_STD_FUNCTIONS
+#endif
+#if defined MBEDTLS_PLATFORM_PRINTF_ALT
+#define POLARSSL_PLATFORM_PRINTF_ALT MBEDTLS_PLATFORM_PRINTF_ALT
+#endif
+#if defined MBEDTLS_PLATFORM_PRINTF_MACRO
+#define POLARSSL_PLATFORM_PRINTF_MACRO MBEDTLS_PLATFORM_PRINTF_MACRO
+#endif
+#if defined MBEDTLS_PLATFORM_SNPRINTF_ALT
+#define POLARSSL_PLATFORM_SNPRINTF_ALT MBEDTLS_PLATFORM_SNPRINTF_ALT
+#endif
+#if defined MBEDTLS_PLATFORM_SNPRINTF_MACRO
+#define POLARSSL_PLATFORM_SNPRINTF_MACRO MBEDTLS_PLATFORM_SNPRINTF_MACRO
+#endif
+#if defined MBEDTLS_PLATFORM_STD_EXIT
+#define POLARSSL_PLATFORM_STD_EXIT MBEDTLS_PLATFORM_STD_EXIT
+#endif
+#if defined MBEDTLS_PLATFORM_STD_FPRINTF
+#define POLARSSL_PLATFORM_STD_FPRINTF MBEDTLS_PLATFORM_STD_FPRINTF
+#endif
+#if defined MBEDTLS_PLATFORM_STD_FREE
+#define POLARSSL_PLATFORM_STD_FREE MBEDTLS_PLATFORM_STD_FREE
+#endif
+#if defined MBEDTLS_PLATFORM_STD_MEM_HDR
+#define POLARSSL_PLATFORM_STD_MEM_HDR MBEDTLS_PLATFORM_STD_MEM_HDR
+#endif
+#if defined MBEDTLS_PLATFORM_STD_PRINTF
+#define POLARSSL_PLATFORM_STD_PRINTF MBEDTLS_PLATFORM_STD_PRINTF
+#endif
+#if defined MBEDTLS_PLATFORM_STD_SNPRINTF
+#define POLARSSL_PLATFORM_STD_SNPRINTF MBEDTLS_PLATFORM_STD_SNPRINTF
+#endif
+#if defined MBEDTLS_PSK_MAX_LEN
+#define POLARSSL_PSK_MAX_LEN MBEDTLS_PSK_MAX_LEN
+#endif
+#if defined MBEDTLS_REMOVE_ARC4_CIPHERSUITES
+#define POLARSSL_REMOVE_ARC4_CIPHERSUITES MBEDTLS_REMOVE_ARC4_CIPHERSUITES
+#endif
+#if defined MBEDTLS_RIPEMD160_ALT
+#define POLARSSL_RIPEMD160_ALT MBEDTLS_RIPEMD160_ALT
+#endif
+#if defined MBEDTLS_RIPEMD160_C
+#define POLARSSL_RIPEMD160_C MBEDTLS_RIPEMD160_C
+#endif
+#if defined MBEDTLS_RIPEMD160_PROCESS_ALT
+#define POLARSSL_RIPEMD160_PROCESS_ALT MBEDTLS_RIPEMD160_PROCESS_ALT
+#endif
+#if defined MBEDTLS_RSA_C
+#define POLARSSL_RSA_C MBEDTLS_RSA_C
+#endif
+#if defined MBEDTLS_RSA_NO_CRT
+#define POLARSSL_RSA_NO_CRT MBEDTLS_RSA_NO_CRT
+#endif
+#if defined MBEDTLS_SELF_TEST
+#define POLARSSL_SELF_TEST MBEDTLS_SELF_TEST
+#endif
+#if defined MBEDTLS_SHA1_ALT
+#define POLARSSL_SHA1_ALT MBEDTLS_SHA1_ALT
+#endif
+#if defined MBEDTLS_SHA1_C
+#define POLARSSL_SHA1_C MBEDTLS_SHA1_C
+#endif
+#if defined MBEDTLS_SHA1_PROCESS_ALT
+#define POLARSSL_SHA1_PROCESS_ALT MBEDTLS_SHA1_PROCESS_ALT
+#endif
+#if defined MBEDTLS_SHA256_ALT
+#define POLARSSL_SHA256_ALT MBEDTLS_SHA256_ALT
+#endif
+#if defined MBEDTLS_SHA256_C
+#define POLARSSL_SHA256_C MBEDTLS_SHA256_C
+#endif
+#if defined MBEDTLS_SHA256_PROCESS_ALT
+#define POLARSSL_SHA256_PROCESS_ALT MBEDTLS_SHA256_PROCESS_ALT
+#endif
+#if defined MBEDTLS_SHA512_ALT
+#define POLARSSL_SHA512_ALT MBEDTLS_SHA512_ALT
+#endif
+#if defined MBEDTLS_SHA512_C
+#define POLARSSL_SHA512_C MBEDTLS_SHA512_C
+#endif
+#if defined MBEDTLS_SHA512_PROCESS_ALT
+#define POLARSSL_SHA512_PROCESS_ALT MBEDTLS_SHA512_PROCESS_ALT
+#endif
+#if defined MBEDTLS_SSL_ALL_ALERT_MESSAGES
+#define POLARSSL_SSL_ALL_ALERT_MESSAGES MBEDTLS_SSL_ALL_ALERT_MESSAGES
+#endif
+#if defined MBEDTLS_SSL_ALPN
+#define POLARSSL_SSL_ALPN MBEDTLS_SSL_ALPN
+#endif
+#if defined MBEDTLS_SSL_CACHE_C
+#define POLARSSL_SSL_CACHE_C MBEDTLS_SSL_CACHE_C
+#endif
+#if defined MBEDTLS_SSL_CBC_RECORD_SPLITTING
+#define POLARSSL_SSL_CBC_RECORD_SPLITTING MBEDTLS_SSL_CBC_RECORD_SPLITTING
+#endif
+#if defined MBEDTLS_SSL_CLI_C
+#define POLARSSL_SSL_CLI_C MBEDTLS_SSL_CLI_C
+#endif
+#if defined MBEDTLS_SSL_COOKIE_C
+#define POLARSSL_SSL_COOKIE_C MBEDTLS_SSL_COOKIE_C
+#endif
+#if defined MBEDTLS_SSL_COOKIE_TIMEOUT
+#define POLARSSL_SSL_COOKIE_TIMEOUT MBEDTLS_SSL_COOKIE_TIMEOUT
+#endif
+#if defined MBEDTLS_SSL_DEBUG_ALL
+#define POLARSSL_SSL_DEBUG_ALL MBEDTLS_SSL_DEBUG_ALL
+#endif
+#if defined MBEDTLS_SSL_DTLS_ANTI_REPLAY
+#define POLARSSL_SSL_DTLS_ANTI_REPLAY MBEDTLS_SSL_DTLS_ANTI_REPLAY
+#endif
+#if defined MBEDTLS_SSL_DTLS_BADMAC_LIMIT
+#define POLARSSL_SSL_DTLS_BADMAC_LIMIT MBEDTLS_SSL_DTLS_BADMAC_LIMIT
+#endif
+#if defined MBEDTLS_SSL_DTLS_HELLO_VERIFY
+#define POLARSSL_SSL_DTLS_HELLO_VERIFY MBEDTLS_SSL_DTLS_HELLO_VERIFY
+#endif
+#if defined MBEDTLS_SSL_ENCRYPT_THEN_MAC
+#define POLARSSL_SSL_ENCRYPT_THEN_MAC MBEDTLS_SSL_ENCRYPT_THEN_MAC
+#endif
+#if defined MBEDTLS_SSL_EXTENDED_MASTER_SECRET
+#define POLARSSL_SSL_EXTENDED_MASTER_SECRET MBEDTLS_SSL_EXTENDED_MASTER_SECRET
+#endif
+#if defined MBEDTLS_SSL_FALLBACK_SCSV
+#define POLARSSL_SSL_FALLBACK_SCSV MBEDTLS_SSL_FALLBACK_SCSV
+#endif
+#if defined MBEDTLS_SSL_HW_RECORD_ACCEL
+#define POLARSSL_SSL_HW_RECORD_ACCEL MBEDTLS_SSL_HW_RECORD_ACCEL
+#endif
+#if defined MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+#define POLARSSL_SSL_MAX_FRAGMENT_LENGTH MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+#endif
+#if defined MBEDTLS_SSL_PROTO_DTLS
+#define POLARSSL_SSL_PROTO_DTLS MBEDTLS_SSL_PROTO_DTLS
+#endif
+#if defined MBEDTLS_SSL_PROTO_SSL3
+#define POLARSSL_SSL_PROTO_SSL3 MBEDTLS_SSL_PROTO_SSL3
+#endif
+#if defined MBEDTLS_SSL_PROTO_TLS1
+#define POLARSSL_SSL_PROTO_TLS1 MBEDTLS_SSL_PROTO_TLS1
+#endif
+#if defined MBEDTLS_SSL_PROTO_TLS1_1
+#define POLARSSL_SSL_PROTO_TLS1_1 MBEDTLS_SSL_PROTO_TLS1_1
+#endif
+#if defined MBEDTLS_SSL_PROTO_TLS1_2
+#define POLARSSL_SSL_PROTO_TLS1_2 MBEDTLS_SSL_PROTO_TLS1_2
+#endif
+#if defined MBEDTLS_SSL_RENEGOTIATION
+#define POLARSSL_SSL_RENEGOTIATION MBEDTLS_SSL_RENEGOTIATION
+#endif
+#if defined MBEDTLS_SSL_SERVER_NAME_INDICATION
+#define POLARSSL_SSL_SERVER_NAME_INDICATION MBEDTLS_SSL_SERVER_NAME_INDICATION
+#endif
+#if defined MBEDTLS_SSL_SESSION_TICKETS
+#define POLARSSL_SSL_SESSION_TICKETS MBEDTLS_SSL_SESSION_TICKETS
+#endif
+#if defined MBEDTLS_SSL_SRV_C
+#define POLARSSL_SSL_SRV_C MBEDTLS_SSL_SRV_C
+#endif
+#if defined MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE
+#define POLARSSL_SSL_SRV_RESPECT_CLIENT_PREFERENCE MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE
+#endif
+#if defined MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO
+#define POLARSSL_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO
+#endif
+#if defined MBEDTLS_SSL_TLS_C
+#define POLARSSL_SSL_TLS_C MBEDTLS_SSL_TLS_C
+#endif
+#if defined MBEDTLS_SSL_TRUNCATED_HMAC
+#define POLARSSL_SSL_TRUNCATED_HMAC MBEDTLS_SSL_TRUNCATED_HMAC
+#endif
+#if defined MBEDTLS_THREADING_ALT
+#define POLARSSL_THREADING_ALT MBEDTLS_THREADING_ALT
+#endif
+#if defined MBEDTLS_THREADING_C
+#define POLARSSL_THREADING_C MBEDTLS_THREADING_C
+#endif
+#if defined MBEDTLS_THREADING_PTHREAD
+#define POLARSSL_THREADING_PTHREAD MBEDTLS_THREADING_PTHREAD
+#endif
+#if defined MBEDTLS_TIMING_ALT
+#define POLARSSL_TIMING_ALT MBEDTLS_TIMING_ALT
+#endif
+#if defined MBEDTLS_TIMING_C
+#define POLARSSL_TIMING_C MBEDTLS_TIMING_C
+#endif
+#if defined MBEDTLS_VERSION_C
+#define POLARSSL_VERSION_C MBEDTLS_VERSION_C
+#endif
+#if defined MBEDTLS_VERSION_FEATURES
+#define POLARSSL_VERSION_FEATURES MBEDTLS_VERSION_FEATURES
+#endif
+#if defined MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3
+#define POLARSSL_X509_ALLOW_EXTENSIONS_NON_V3 MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3
+#endif
+#if defined MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
+#define POLARSSL_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
+#endif
+#if defined MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+#define POLARSSL_X509_CHECK_EXTENDED_KEY_USAGE MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+#endif
+#if defined MBEDTLS_X509_CHECK_KEY_USAGE
+#define POLARSSL_X509_CHECK_KEY_USAGE MBEDTLS_X509_CHECK_KEY_USAGE
+#endif
+#if defined MBEDTLS_X509_CREATE_C
+#define POLARSSL_X509_CREATE_C MBEDTLS_X509_CREATE_C
+#endif
+#if defined MBEDTLS_X509_CRL_PARSE_C
+#define POLARSSL_X509_CRL_PARSE_C MBEDTLS_X509_CRL_PARSE_C
+#endif
+#if defined MBEDTLS_X509_CRT_PARSE_C
+#define POLARSSL_X509_CRT_PARSE_C MBEDTLS_X509_CRT_PARSE_C
+#endif
+#if defined MBEDTLS_X509_CRT_WRITE_C
+#define POLARSSL_X509_CRT_WRITE_C MBEDTLS_X509_CRT_WRITE_C
+#endif
+#if defined MBEDTLS_X509_CSR_PARSE_C
+#define POLARSSL_X509_CSR_PARSE_C MBEDTLS_X509_CSR_PARSE_C
+#endif
+#if defined MBEDTLS_X509_CSR_WRITE_C
+#define POLARSSL_X509_CSR_WRITE_C MBEDTLS_X509_CSR_WRITE_C
+#endif
+#if defined MBEDTLS_X509_MAX_INTERMEDIATE_CA
+#define POLARSSL_X509_MAX_INTERMEDIATE_CA MBEDTLS_X509_MAX_INTERMEDIATE_CA
+#endif
+#if defined MBEDTLS_X509_RSASSA_PSS_SUPPORT
+#define POLARSSL_X509_RSASSA_PSS_SUPPORT MBEDTLS_X509_RSASSA_PSS_SUPPORT
+#endif
+#if defined MBEDTLS_X509_USE_C
+#define POLARSSL_X509_USE_C MBEDTLS_X509_USE_C
+#endif
+#if defined MBEDTLS_XTEA_ALT
+#define POLARSSL_XTEA_ALT MBEDTLS_XTEA_ALT
+#endif
+#if defined MBEDTLS_XTEA_C
+#define POLARSSL_XTEA_C MBEDTLS_XTEA_C
+#endif
+#if defined MBEDTLS_ZLIB_SUPPORT
+#define POLARSSL_ZLIB_SUPPORT MBEDTLS_ZLIB_SUPPORT
+#endif
+
+/*
+ * Misc names (macros, types, functions, enum constants...)
+ */
+#define AES_DECRYPT MBEDTLS_AES_DECRYPT
+#define AES_ENCRYPT MBEDTLS_AES_ENCRYPT
+#define ASN1_BIT_STRING MBEDTLS_ASN1_BIT_STRING
+#define ASN1_BMP_STRING MBEDTLS_ASN1_BMP_STRING
+#define ASN1_BOOLEAN MBEDTLS_ASN1_BOOLEAN
+#define ASN1_CHK_ADD MBEDTLS_ASN1_CHK_ADD
+#define ASN1_CONSTRUCTED MBEDTLS_ASN1_CONSTRUCTED
+#define ASN1_CONTEXT_SPECIFIC MBEDTLS_ASN1_CONTEXT_SPECIFIC
+#define ASN1_GENERALIZED_TIME MBEDTLS_ASN1_GENERALIZED_TIME
+#define ASN1_IA5_STRING MBEDTLS_ASN1_IA5_STRING
+#define ASN1_INTEGER MBEDTLS_ASN1_INTEGER
+#define ASN1_NULL MBEDTLS_ASN1_NULL
+#define ASN1_OCTET_STRING MBEDTLS_ASN1_OCTET_STRING
+#define ASN1_OID MBEDTLS_ASN1_OID
+#define ASN1_PRIMITIVE MBEDTLS_ASN1_PRIMITIVE
+#define ASN1_PRINTABLE_STRING MBEDTLS_ASN1_PRINTABLE_STRING
+#define ASN1_SEQUENCE MBEDTLS_ASN1_SEQUENCE
+#define ASN1_SET MBEDTLS_ASN1_SET
+#define ASN1_T61_STRING MBEDTLS_ASN1_T61_STRING
+#define ASN1_UNIVERSAL_STRING MBEDTLS_ASN1_UNIVERSAL_STRING
+#define ASN1_UTC_TIME MBEDTLS_ASN1_UTC_TIME
+#define ASN1_UTF8_STRING MBEDTLS_ASN1_UTF8_STRING
+#define BADCERT_CN_MISMATCH MBEDTLS_X509_BADCERT_CN_MISMATCH
+#define BADCERT_EXPIRED MBEDTLS_X509_BADCERT_EXPIRED
+#define BADCERT_FUTURE MBEDTLS_X509_BADCERT_FUTURE
+#define BADCERT_MISSING MBEDTLS_X509_BADCERT_MISSING
+#define BADCERT_NOT_TRUSTED MBEDTLS_X509_BADCERT_NOT_TRUSTED
+#define BADCERT_OTHER MBEDTLS_X509_BADCERT_OTHER
+#define BADCERT_REVOKED MBEDTLS_X509_BADCERT_REVOKED
+#define BADCERT_SKIP_VERIFY MBEDTLS_X509_BADCERT_SKIP_VERIFY
+#define BADCRL_EXPIRED MBEDTLS_X509_BADCRL_EXPIRED
+#define BADCRL_FUTURE MBEDTLS_X509_BADCRL_FUTURE
+#define BADCRL_NOT_TRUSTED MBEDTLS_X509_BADCRL_NOT_TRUSTED
+#define BLOWFISH_BLOCKSIZE MBEDTLS_BLOWFISH_BLOCKSIZE
+#define BLOWFISH_DECRYPT MBEDTLS_BLOWFISH_DECRYPT
+#define BLOWFISH_ENCRYPT MBEDTLS_BLOWFISH_ENCRYPT
+#define BLOWFISH_MAX_KEY MBEDTLS_BLOWFISH_MAX_KEY_BITS
+#define BLOWFISH_MIN_KEY MBEDTLS_BLOWFISH_MIN_KEY_BITS
+#define BLOWFISH_ROUNDS MBEDTLS_BLOWFISH_ROUNDS
+#define CAMELLIA_DECRYPT MBEDTLS_CAMELLIA_DECRYPT
+#define CAMELLIA_ENCRYPT MBEDTLS_CAMELLIA_ENCRYPT
+#define COLLECT_SIZE MBEDTLS_HAVEGE_COLLECT_SIZE
+#define CTR_DRBG_BLOCKSIZE MBEDTLS_CTR_DRBG_BLOCKSIZE
+#define CTR_DRBG_ENTROPY_LEN MBEDTLS_CTR_DRBG_ENTROPY_LEN
+#define CTR_DRBG_KEYBITS MBEDTLS_CTR_DRBG_KEYBITS
+#define CTR_DRBG_KEYSIZE MBEDTLS_CTR_DRBG_KEYSIZE
+#define CTR_DRBG_MAX_INPUT MBEDTLS_CTR_DRBG_MAX_INPUT
+#define CTR_DRBG_MAX_REQUEST MBEDTLS_CTR_DRBG_MAX_REQUEST
+#define CTR_DRBG_MAX_SEED_INPUT MBEDTLS_CTR_DRBG_MAX_SEED_INPUT
+#define CTR_DRBG_PR_OFF MBEDTLS_CTR_DRBG_PR_OFF
+#define CTR_DRBG_PR_ON MBEDTLS_CTR_DRBG_PR_ON
+#define CTR_DRBG_RESEED_INTERVAL MBEDTLS_CTR_DRBG_RESEED_INTERVAL
+#define CTR_DRBG_SEEDLEN MBEDTLS_CTR_DRBG_SEEDLEN
+#define DEPRECATED MBEDTLS_DEPRECATED
+#define DES_DECRYPT MBEDTLS_DES_DECRYPT
+#define DES_ENCRYPT MBEDTLS_DES_ENCRYPT
+#define DES_KEY_SIZE MBEDTLS_DES_KEY_SIZE
+#define ENTROPY_BLOCK_SIZE MBEDTLS_ENTROPY_BLOCK_SIZE
+#define ENTROPY_MAX_GATHER MBEDTLS_ENTROPY_MAX_GATHER
+#define ENTROPY_MAX_SEED_SIZE MBEDTLS_ENTROPY_MAX_SEED_SIZE
+#define ENTROPY_MAX_SOURCES MBEDTLS_ENTROPY_MAX_SOURCES
+#define ENTROPY_MIN_HARDCLOCK MBEDTLS_ENTROPY_MIN_HARDCLOCK
+#define ENTROPY_MIN_HAVEGE MBEDTLS_ENTROPY_MIN_HAVEGE
+#define ENTROPY_MIN_PLATFORM MBEDTLS_ENTROPY_MIN_PLATFORM
+#define ENTROPY_SOURCE_MANUAL MBEDTLS_ENTROPY_SOURCE_MANUAL
+#define EXT_AUTHORITY_KEY_IDENTIFIER MBEDTLS_X509_EXT_AUTHORITY_KEY_IDENTIFIER
+#define EXT_BASIC_CONSTRAINTS MBEDTLS_X509_EXT_BASIC_CONSTRAINTS
+#define EXT_CERTIFICATE_POLICIES MBEDTLS_X509_EXT_CERTIFICATE_POLICIES
+#define EXT_CRL_DISTRIBUTION_POINTS MBEDTLS_X509_EXT_CRL_DISTRIBUTION_POINTS
+#define EXT_EXTENDED_KEY_USAGE MBEDTLS_X509_EXT_EXTENDED_KEY_USAGE
+#define EXT_FRESHEST_CRL MBEDTLS_X509_EXT_FRESHEST_CRL
+#define EXT_INIHIBIT_ANYPOLICY MBEDTLS_X509_EXT_INIHIBIT_ANYPOLICY
+#define EXT_ISSUER_ALT_NAME MBEDTLS_X509_EXT_ISSUER_ALT_NAME
+#define EXT_KEY_USAGE MBEDTLS_X509_EXT_KEY_USAGE
+#define EXT_NAME_CONSTRAINTS MBEDTLS_X509_EXT_NAME_CONSTRAINTS
+#define EXT_NS_CERT_TYPE MBEDTLS_X509_EXT_NS_CERT_TYPE
+#define EXT_POLICY_CONSTRAINTS MBEDTLS_X509_EXT_POLICY_CONSTRAINTS
+#define EXT_POLICY_MAPPINGS MBEDTLS_X509_EXT_POLICY_MAPPINGS
+#define EXT_SUBJECT_ALT_NAME MBEDTLS_X509_EXT_SUBJECT_ALT_NAME
+#define EXT_SUBJECT_DIRECTORY_ATTRS MBEDTLS_X509_EXT_SUBJECT_DIRECTORY_ATTRS
+#define EXT_SUBJECT_KEY_IDENTIFIER MBEDTLS_X509_EXT_SUBJECT_KEY_IDENTIFIER
+#define GCM_DECRYPT MBEDTLS_GCM_DECRYPT
+#define GCM_ENCRYPT MBEDTLS_GCM_ENCRYPT
+#define KU_CRL_SIGN MBEDTLS_X509_KU_CRL_SIGN
+#define KU_DATA_ENCIPHERMENT MBEDTLS_X509_KU_DATA_ENCIPHERMENT
+#define KU_DIGITAL_SIGNATURE MBEDTLS_X509_KU_DIGITAL_SIGNATURE
+#define KU_KEY_AGREEMENT MBEDTLS_X509_KU_KEY_AGREEMENT
+#define KU_KEY_CERT_SIGN MBEDTLS_X509_KU_KEY_CERT_SIGN
+#define KU_KEY_ENCIPHERMENT MBEDTLS_X509_KU_KEY_ENCIPHERMENT
+#define KU_NON_REPUDIATION MBEDTLS_X509_KU_NON_REPUDIATION
+#define LN_2_DIV_LN_10_SCALE100 MBEDTLS_LN_2_DIV_LN_10_SCALE100
+#define MEMORY_VERIFY_ALLOC MBEDTLS_MEMORY_VERIFY_ALLOC
+#define MEMORY_VERIFY_ALWAYS MBEDTLS_MEMORY_VERIFY_ALWAYS
+#define MEMORY_VERIFY_FREE MBEDTLS_MEMORY_VERIFY_FREE
+#define MEMORY_VERIFY_NONE MBEDTLS_MEMORY_VERIFY_NONE
+#define MPI_CHK MBEDTLS_MPI_CHK
+#define NET_PROTO_TCP MBEDTLS_NET_PROTO_TCP
+#define NET_PROTO_UDP MBEDTLS_NET_PROTO_UDP
+#define NS_CERT_TYPE_EMAIL MBEDTLS_X509_NS_CERT_TYPE_EMAIL
+#define NS_CERT_TYPE_EMAIL_CA MBEDTLS_X509_NS_CERT_TYPE_EMAIL_CA
+#define NS_CERT_TYPE_OBJECT_SIGNING MBEDTLS_X509_NS_CERT_TYPE_OBJECT_SIGNING
+#define NS_CERT_TYPE_OBJECT_SIGNING_CA MBEDTLS_X509_NS_CERT_TYPE_OBJECT_SIGNING_CA
+#define NS_CERT_TYPE_RESERVED MBEDTLS_X509_NS_CERT_TYPE_RESERVED
+#define NS_CERT_TYPE_SSL_CA MBEDTLS_X509_NS_CERT_TYPE_SSL_CA
+#define NS_CERT_TYPE_SSL_CLIENT MBEDTLS_X509_NS_CERT_TYPE_SSL_CLIENT
+#define NS_CERT_TYPE_SSL_SERVER MBEDTLS_X509_NS_CERT_TYPE_SSL_SERVER
+#define OID_ANSI_X9_62 MBEDTLS_OID_ANSI_X9_62
+#define OID_ANSI_X9_62_FIELD_TYPE MBEDTLS_OID_ANSI_X9_62_FIELD_TYPE
+#define OID_ANSI_X9_62_PRIME_FIELD MBEDTLS_OID_ANSI_X9_62_PRIME_FIELD
+#define OID_ANSI_X9_62_SIG MBEDTLS_OID_ANSI_X9_62_SIG
+#define OID_ANSI_X9_62_SIG_SHA2 MBEDTLS_OID_ANSI_X9_62_SIG_SHA2
+#define OID_ANY_EXTENDED_KEY_USAGE MBEDTLS_OID_ANY_EXTENDED_KEY_USAGE
+#define OID_AT MBEDTLS_OID_AT
+#define OID_AT_CN MBEDTLS_OID_AT_CN
+#define OID_AT_COUNTRY MBEDTLS_OID_AT_COUNTRY
+#define OID_AT_DN_QUALIFIER MBEDTLS_OID_AT_DN_QUALIFIER
+#define OID_AT_GENERATION_QUALIFIER MBEDTLS_OID_AT_GENERATION_QUALIFIER
+#define OID_AT_GIVEN_NAME MBEDTLS_OID_AT_GIVEN_NAME
+#define OID_AT_INITIALS MBEDTLS_OID_AT_INITIALS
+#define OID_AT_LOCALITY MBEDTLS_OID_AT_LOCALITY
+#define OID_AT_ORGANIZATION MBEDTLS_OID_AT_ORGANIZATION
+#define OID_AT_ORG_UNIT MBEDTLS_OID_AT_ORG_UNIT
+#define OID_AT_POSTAL_ADDRESS MBEDTLS_OID_AT_POSTAL_ADDRESS
+#define OID_AT_POSTAL_CODE MBEDTLS_OID_AT_POSTAL_CODE
+#define OID_AT_PSEUDONYM MBEDTLS_OID_AT_PSEUDONYM
+#define OID_AT_SERIAL_NUMBER MBEDTLS_OID_AT_SERIAL_NUMBER
+#define OID_AT_STATE MBEDTLS_OID_AT_STATE
+#define OID_AT_SUR_NAME MBEDTLS_OID_AT_SUR_NAME
+#define OID_AT_TITLE MBEDTLS_OID_AT_TITLE
+#define OID_AT_UNIQUE_IDENTIFIER MBEDTLS_OID_AT_UNIQUE_IDENTIFIER
+#define OID_AUTHORITY_KEY_IDENTIFIER MBEDTLS_OID_AUTHORITY_KEY_IDENTIFIER
+#define OID_BASIC_CONSTRAINTS MBEDTLS_OID_BASIC_CONSTRAINTS
+#define OID_CERTICOM MBEDTLS_OID_CERTICOM
+#define OID_CERTIFICATE_POLICIES MBEDTLS_OID_CERTIFICATE_POLICIES
+#define OID_CLIENT_AUTH MBEDTLS_OID_CLIENT_AUTH
+#define OID_CMP MBEDTLS_OID_CMP
+#define OID_CODE_SIGNING MBEDTLS_OID_CODE_SIGNING
+#define OID_COUNTRY_US MBEDTLS_OID_COUNTRY_US
+#define OID_CRL_DISTRIBUTION_POINTS MBEDTLS_OID_CRL_DISTRIBUTION_POINTS
+#define OID_CRL_NUMBER MBEDTLS_OID_CRL_NUMBER
+#define OID_DES_CBC MBEDTLS_OID_DES_CBC
+#define OID_DES_EDE3_CBC MBEDTLS_OID_DES_EDE3_CBC
+#define OID_DIGEST_ALG_MD2 MBEDTLS_OID_DIGEST_ALG_MD2
+#define OID_DIGEST_ALG_MD4 MBEDTLS_OID_DIGEST_ALG_MD4
+#define OID_DIGEST_ALG_MD5 MBEDTLS_OID_DIGEST_ALG_MD5
+#define OID_DIGEST_ALG_SHA1 MBEDTLS_OID_DIGEST_ALG_SHA1
+#define OID_DIGEST_ALG_SHA224 MBEDTLS_OID_DIGEST_ALG_SHA224
+#define OID_DIGEST_ALG_SHA256 MBEDTLS_OID_DIGEST_ALG_SHA256
+#define OID_DIGEST_ALG_SHA384 MBEDTLS_OID_DIGEST_ALG_SHA384
+#define OID_DIGEST_ALG_SHA512 MBEDTLS_OID_DIGEST_ALG_SHA512
+#define OID_DOMAIN_COMPONENT MBEDTLS_OID_DOMAIN_COMPONENT
+#define OID_ECDSA_SHA1 MBEDTLS_OID_ECDSA_SHA1
+#define OID_ECDSA_SHA224 MBEDTLS_OID_ECDSA_SHA224
+#define OID_ECDSA_SHA256 MBEDTLS_OID_ECDSA_SHA256
+#define OID_ECDSA_SHA384 MBEDTLS_OID_ECDSA_SHA384
+#define OID_ECDSA_SHA512 MBEDTLS_OID_ECDSA_SHA512
+#define OID_EC_ALG_ECDH MBEDTLS_OID_EC_ALG_ECDH
+#define OID_EC_ALG_UNRESTRICTED MBEDTLS_OID_EC_ALG_UNRESTRICTED
+#define OID_EC_BRAINPOOL_V1 MBEDTLS_OID_EC_BRAINPOOL_V1
+#define OID_EC_GRP_BP256R1 MBEDTLS_OID_EC_GRP_BP256R1
+#define OID_EC_GRP_BP384R1 MBEDTLS_OID_EC_GRP_BP384R1
+#define OID_EC_GRP_BP512R1 MBEDTLS_OID_EC_GRP_BP512R1
+#define OID_EC_GRP_SECP192K1 MBEDTLS_OID_EC_GRP_SECP192K1
+#define OID_EC_GRP_SECP192R1 MBEDTLS_OID_EC_GRP_SECP192R1
+#define OID_EC_GRP_SECP224K1 MBEDTLS_OID_EC_GRP_SECP224K1
+#define OID_EC_GRP_SECP224R1 MBEDTLS_OID_EC_GRP_SECP224R1
+#define OID_EC_GRP_SECP256K1 MBEDTLS_OID_EC_GRP_SECP256K1
+#define OID_EC_GRP_SECP256R1 MBEDTLS_OID_EC_GRP_SECP256R1
+#define OID_EC_GRP_SECP384R1 MBEDTLS_OID_EC_GRP_SECP384R1
+#define OID_EC_GRP_SECP521R1 MBEDTLS_OID_EC_GRP_SECP521R1
+#define OID_EMAIL_PROTECTION MBEDTLS_OID_EMAIL_PROTECTION
+#define OID_EXTENDED_KEY_USAGE MBEDTLS_OID_EXTENDED_KEY_USAGE
+#define OID_FRESHEST_CRL MBEDTLS_OID_FRESHEST_CRL
+#define OID_GOV MBEDTLS_OID_GOV
+#define OID_HMAC_SHA1 MBEDTLS_OID_HMAC_SHA1
+#define OID_ID_CE MBEDTLS_OID_ID_CE
+#define OID_INIHIBIT_ANYPOLICY MBEDTLS_OID_INIHIBIT_ANYPOLICY
+#define OID_ISO_CCITT_DS MBEDTLS_OID_ISO_CCITT_DS
+#define OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_ISO_IDENTIFIED_ORG
+#define OID_ISO_ITU_COUNTRY MBEDTLS_OID_ISO_ITU_COUNTRY
+#define OID_ISO_ITU_US_ORG MBEDTLS_OID_ISO_ITU_US_ORG
+#define OID_ISO_MEMBER_BODIES MBEDTLS_OID_ISO_MEMBER_BODIES
+#define OID_ISSUER_ALT_NAME MBEDTLS_OID_ISSUER_ALT_NAME
+#define OID_KEY_USAGE MBEDTLS_OID_KEY_USAGE
+#define OID_KP MBEDTLS_OID_KP
+#define OID_MGF1 MBEDTLS_OID_MGF1
+#define OID_NAME_CONSTRAINTS MBEDTLS_OID_NAME_CONSTRAINTS
+#define OID_NETSCAPE MBEDTLS_OID_NETSCAPE
+#define OID_NS_BASE_URL MBEDTLS_OID_NS_BASE_URL
+#define OID_NS_CA_POLICY_URL MBEDTLS_OID_NS_CA_POLICY_URL
+#define OID_NS_CA_REVOCATION_URL MBEDTLS_OID_NS_CA_REVOCATION_URL
+#define OID_NS_CERT MBEDTLS_OID_NS_CERT
+#define OID_NS_CERT_SEQUENCE MBEDTLS_OID_NS_CERT_SEQUENCE
+#define OID_NS_CERT_TYPE MBEDTLS_OID_NS_CERT_TYPE
+#define OID_NS_COMMENT MBEDTLS_OID_NS_COMMENT
+#define OID_NS_DATA_TYPE MBEDTLS_OID_NS_DATA_TYPE
+#define OID_NS_RENEWAL_URL MBEDTLS_OID_NS_RENEWAL_URL
+#define OID_NS_REVOCATION_URL MBEDTLS_OID_NS_REVOCATION_URL
+#define OID_NS_SSL_SERVER_NAME MBEDTLS_OID_NS_SSL_SERVER_NAME
+#define OID_OCSP_SIGNING MBEDTLS_OID_OCSP_SIGNING
+#define OID_OIW_SECSIG MBEDTLS_OID_OIW_SECSIG
+#define OID_OIW_SECSIG_ALG MBEDTLS_OID_OIW_SECSIG_ALG
+#define OID_OIW_SECSIG_SHA1 MBEDTLS_OID_OIW_SECSIG_SHA1
+#define OID_ORGANIZATION MBEDTLS_OID_ORGANIZATION
+#define OID_ORG_ANSI_X9_62 MBEDTLS_OID_ORG_ANSI_X9_62
+#define OID_ORG_CERTICOM MBEDTLS_OID_ORG_CERTICOM
+#define OID_ORG_DOD MBEDTLS_OID_ORG_DOD
+#define OID_ORG_GOV MBEDTLS_OID_ORG_GOV
+#define OID_ORG_NETSCAPE MBEDTLS_OID_ORG_NETSCAPE
+#define OID_ORG_OIW MBEDTLS_OID_ORG_OIW
+#define OID_ORG_RSA_DATA_SECURITY MBEDTLS_OID_ORG_RSA_DATA_SECURITY
+#define OID_ORG_TELETRUST MBEDTLS_OID_ORG_TELETRUST
+#define OID_PKCS MBEDTLS_OID_PKCS
+#define OID_PKCS1 MBEDTLS_OID_PKCS1
+#define OID_PKCS12 MBEDTLS_OID_PKCS12
+#define OID_PKCS12_PBE MBEDTLS_OID_PKCS12_PBE
+#define OID_PKCS12_PBE_SHA1_DES2_EDE_CBC MBEDTLS_OID_PKCS12_PBE_SHA1_DES2_EDE_CBC
+#define OID_PKCS12_PBE_SHA1_DES3_EDE_CBC MBEDTLS_OID_PKCS12_PBE_SHA1_DES3_EDE_CBC
+#define OID_PKCS12_PBE_SHA1_RC2_128_CBC MBEDTLS_OID_PKCS12_PBE_SHA1_RC2_128_CBC
+#define OID_PKCS12_PBE_SHA1_RC2_40_CBC MBEDTLS_OID_PKCS12_PBE_SHA1_RC2_40_CBC
+#define OID_PKCS12_PBE_SHA1_RC4_128 MBEDTLS_OID_PKCS12_PBE_SHA1_RC4_128
+#define OID_PKCS12_PBE_SHA1_RC4_40 MBEDTLS_OID_PKCS12_PBE_SHA1_RC4_40
+#define OID_PKCS1_MD2 MBEDTLS_OID_PKCS1_MD2
+#define OID_PKCS1_MD4 MBEDTLS_OID_PKCS1_MD4
+#define OID_PKCS1_MD5 MBEDTLS_OID_PKCS1_MD5
+#define OID_PKCS1_RSA MBEDTLS_OID_PKCS1_RSA
+#define OID_PKCS1_SHA1 MBEDTLS_OID_PKCS1_SHA1
+#define OID_PKCS1_SHA224 MBEDTLS_OID_PKCS1_SHA224
+#define OID_PKCS1_SHA256 MBEDTLS_OID_PKCS1_SHA256
+#define OID_PKCS1_SHA384 MBEDTLS_OID_PKCS1_SHA384
+#define OID_PKCS1_SHA512 MBEDTLS_OID_PKCS1_SHA512
+#define OID_PKCS5 MBEDTLS_OID_PKCS5
+#define OID_PKCS5_PBES2 MBEDTLS_OID_PKCS5_PBES2
+#define OID_PKCS5_PBE_MD2_DES_CBC MBEDTLS_OID_PKCS5_PBE_MD2_DES_CBC
+#define OID_PKCS5_PBE_MD2_RC2_CBC MBEDTLS_OID_PKCS5_PBE_MD2_RC2_CBC
+#define OID_PKCS5_PBE_MD5_DES_CBC MBEDTLS_OID_PKCS5_PBE_MD5_DES_CBC
+#define OID_PKCS5_PBE_MD5_RC2_CBC MBEDTLS_OID_PKCS5_PBE_MD5_RC2_CBC
+#define OID_PKCS5_PBE_SHA1_DES_CBC MBEDTLS_OID_PKCS5_PBE_SHA1_DES_CBC
+#define OID_PKCS5_PBE_SHA1_RC2_CBC MBEDTLS_OID_PKCS5_PBE_SHA1_RC2_CBC
+#define OID_PKCS5_PBKDF2 MBEDTLS_OID_PKCS5_PBKDF2
+#define OID_PKCS5_PBMAC1 MBEDTLS_OID_PKCS5_PBMAC1
+#define OID_PKCS9 MBEDTLS_OID_PKCS9
+#define OID_PKCS9_CSR_EXT_REQ MBEDTLS_OID_PKCS9_CSR_EXT_REQ
+#define OID_PKCS9_EMAIL MBEDTLS_OID_PKCS9_EMAIL
+#define OID_PKIX MBEDTLS_OID_PKIX
+#define OID_POLICY_CONSTRAINTS MBEDTLS_OID_POLICY_CONSTRAINTS
+#define OID_POLICY_MAPPINGS MBEDTLS_OID_POLICY_MAPPINGS
+#define OID_PRIVATE_KEY_USAGE_PERIOD MBEDTLS_OID_PRIVATE_KEY_USAGE_PERIOD
+#define OID_RSASSA_PSS MBEDTLS_OID_RSASSA_PSS
+#define OID_RSA_COMPANY MBEDTLS_OID_RSA_COMPANY
+#define OID_RSA_SHA_OBS MBEDTLS_OID_RSA_SHA_OBS
+#define OID_SERVER_AUTH MBEDTLS_OID_SERVER_AUTH
+#define OID_SIZE MBEDTLS_OID_SIZE
+#define OID_SUBJECT_ALT_NAME MBEDTLS_OID_SUBJECT_ALT_NAME
+#define OID_SUBJECT_DIRECTORY_ATTRS MBEDTLS_OID_SUBJECT_DIRECTORY_ATTRS
+#define OID_SUBJECT_KEY_IDENTIFIER MBEDTLS_OID_SUBJECT_KEY_IDENTIFIER
+#define OID_TELETRUST MBEDTLS_OID_TELETRUST
+#define OID_TIME_STAMPING MBEDTLS_OID_TIME_STAMPING
+#define PADLOCK_ACE MBEDTLS_PADLOCK_ACE
+#define PADLOCK_ALIGN16 MBEDTLS_PADLOCK_ALIGN16
+#define PADLOCK_PHE MBEDTLS_PADLOCK_PHE
+#define PADLOCK_PMM MBEDTLS_PADLOCK_PMM
+#define PADLOCK_RNG MBEDTLS_PADLOCK_RNG
+#define PKCS12_DERIVE_IV MBEDTLS_PKCS12_DERIVE_IV
+#define PKCS12_DERIVE_KEY MBEDTLS_PKCS12_DERIVE_KEY
+#define PKCS12_DERIVE_MAC_KEY MBEDTLS_PKCS12_DERIVE_MAC_KEY
+#define PKCS12_PBE_DECRYPT MBEDTLS_PKCS12_PBE_DECRYPT
+#define PKCS12_PBE_ENCRYPT MBEDTLS_PKCS12_PBE_ENCRYPT
+#define PKCS5_DECRYPT MBEDTLS_PKCS5_DECRYPT
+#define PKCS5_ENCRYPT MBEDTLS_PKCS5_ENCRYPT
+#define POLARSSL_AESNI_AES MBEDTLS_AESNI_AES
+#define POLARSSL_AESNI_CLMUL MBEDTLS_AESNI_CLMUL
+#define POLARSSL_AESNI_H MBEDTLS_AESNI_H
+#define POLARSSL_AES_H MBEDTLS_AES_H
+#define POLARSSL_ARC4_H MBEDTLS_ARC4_H
+#define POLARSSL_ASN1_H MBEDTLS_ASN1_H
+#define POLARSSL_ASN1_WRITE_H MBEDTLS_ASN1_WRITE_H
+#define POLARSSL_BASE64_H MBEDTLS_BASE64_H
+#define POLARSSL_BIGNUM_H MBEDTLS_BIGNUM_H
+#define POLARSSL_BLOWFISH_H MBEDTLS_BLOWFISH_H
+#define POLARSSL_BN_MUL_H MBEDTLS_BN_MUL_H
+#define POLARSSL_CAMELLIA_H MBEDTLS_CAMELLIA_H
+#define POLARSSL_CCM_H MBEDTLS_CCM_H
+#define POLARSSL_CERTS_H MBEDTLS_CERTS_H
+#define POLARSSL_CHECK_CONFIG_H MBEDTLS_CHECK_CONFIG_H
+#define POLARSSL_CIPHERSUITE_NODTLS MBEDTLS_CIPHERSUITE_NODTLS
+#define POLARSSL_CIPHERSUITE_SHORT_TAG MBEDTLS_CIPHERSUITE_SHORT_TAG
+#define POLARSSL_CIPHERSUITE_WEAK MBEDTLS_CIPHERSUITE_WEAK
+#define POLARSSL_CIPHER_AES_128_CBC MBEDTLS_CIPHER_AES_128_CBC
+#define POLARSSL_CIPHER_AES_128_CCM MBEDTLS_CIPHER_AES_128_CCM
+#define POLARSSL_CIPHER_AES_128_CFB128 MBEDTLS_CIPHER_AES_128_CFB128
+#define POLARSSL_CIPHER_AES_128_CTR MBEDTLS_CIPHER_AES_128_CTR
+#define POLARSSL_CIPHER_AES_128_ECB MBEDTLS_CIPHER_AES_128_ECB
+#define POLARSSL_CIPHER_AES_128_GCM MBEDTLS_CIPHER_AES_128_GCM
+#define POLARSSL_CIPHER_AES_192_CBC MBEDTLS_CIPHER_AES_192_CBC
+#define POLARSSL_CIPHER_AES_192_CCM MBEDTLS_CIPHER_AES_192_CCM
+#define POLARSSL_CIPHER_AES_192_CFB128 MBEDTLS_CIPHER_AES_192_CFB128
+#define POLARSSL_CIPHER_AES_192_CTR MBEDTLS_CIPHER_AES_192_CTR
+#define POLARSSL_CIPHER_AES_192_ECB MBEDTLS_CIPHER_AES_192_ECB
+#define POLARSSL_CIPHER_AES_192_GCM MBEDTLS_CIPHER_AES_192_GCM
+#define POLARSSL_CIPHER_AES_256_CBC MBEDTLS_CIPHER_AES_256_CBC
+#define POLARSSL_CIPHER_AES_256_CCM MBEDTLS_CIPHER_AES_256_CCM
+#define POLARSSL_CIPHER_AES_256_CFB128 MBEDTLS_CIPHER_AES_256_CFB128
+#define POLARSSL_CIPHER_AES_256_CTR MBEDTLS_CIPHER_AES_256_CTR
+#define POLARSSL_CIPHER_AES_256_ECB MBEDTLS_CIPHER_AES_256_ECB
+#define POLARSSL_CIPHER_AES_256_GCM MBEDTLS_CIPHER_AES_256_GCM
+#define POLARSSL_CIPHER_ARC4_128 MBEDTLS_CIPHER_ARC4_128
+#define POLARSSL_CIPHER_BLOWFISH_CBC MBEDTLS_CIPHER_BLOWFISH_CBC
+#define POLARSSL_CIPHER_BLOWFISH_CFB64 MBEDTLS_CIPHER_BLOWFISH_CFB64
+#define POLARSSL_CIPHER_BLOWFISH_CTR MBEDTLS_CIPHER_BLOWFISH_CTR
+#define POLARSSL_CIPHER_BLOWFISH_ECB MBEDTLS_CIPHER_BLOWFISH_ECB
+#define POLARSSL_CIPHER_CAMELLIA_128_CBC MBEDTLS_CIPHER_CAMELLIA_128_CBC
+#define POLARSSL_CIPHER_CAMELLIA_128_CCM MBEDTLS_CIPHER_CAMELLIA_128_CCM
+#define POLARSSL_CIPHER_CAMELLIA_128_CFB128 MBEDTLS_CIPHER_CAMELLIA_128_CFB128
+#define POLARSSL_CIPHER_CAMELLIA_128_CTR MBEDTLS_CIPHER_CAMELLIA_128_CTR
+#define POLARSSL_CIPHER_CAMELLIA_128_ECB MBEDTLS_CIPHER_CAMELLIA_128_ECB
+#define POLARSSL_CIPHER_CAMELLIA_128_GCM MBEDTLS_CIPHER_CAMELLIA_128_GCM
+#define POLARSSL_CIPHER_CAMELLIA_192_CBC MBEDTLS_CIPHER_CAMELLIA_192_CBC
+#define POLARSSL_CIPHER_CAMELLIA_192_CCM MBEDTLS_CIPHER_CAMELLIA_192_CCM
+#define POLARSSL_CIPHER_CAMELLIA_192_CFB128 MBEDTLS_CIPHER_CAMELLIA_192_CFB128
+#define POLARSSL_CIPHER_CAMELLIA_192_CTR MBEDTLS_CIPHER_CAMELLIA_192_CTR
+#define POLARSSL_CIPHER_CAMELLIA_192_ECB MBEDTLS_CIPHER_CAMELLIA_192_ECB
+#define POLARSSL_CIPHER_CAMELLIA_192_GCM MBEDTLS_CIPHER_CAMELLIA_192_GCM
+#define POLARSSL_CIPHER_CAMELLIA_256_CBC MBEDTLS_CIPHER_CAMELLIA_256_CBC
+#define POLARSSL_CIPHER_CAMELLIA_256_CCM MBEDTLS_CIPHER_CAMELLIA_256_CCM
+#define POLARSSL_CIPHER_CAMELLIA_256_CFB128 MBEDTLS_CIPHER_CAMELLIA_256_CFB128
+#define POLARSSL_CIPHER_CAMELLIA_256_CTR MBEDTLS_CIPHER_CAMELLIA_256_CTR
+#define POLARSSL_CIPHER_CAMELLIA_256_ECB MBEDTLS_CIPHER_CAMELLIA_256_ECB
+#define POLARSSL_CIPHER_CAMELLIA_256_GCM MBEDTLS_CIPHER_CAMELLIA_256_GCM
+#define POLARSSL_CIPHER_DES_CBC MBEDTLS_CIPHER_DES_CBC
+#define POLARSSL_CIPHER_DES_ECB MBEDTLS_CIPHER_DES_ECB
+#define POLARSSL_CIPHER_DES_EDE3_CBC MBEDTLS_CIPHER_DES_EDE3_CBC
+#define POLARSSL_CIPHER_DES_EDE3_ECB MBEDTLS_CIPHER_DES_EDE3_ECB
+#define POLARSSL_CIPHER_DES_EDE_CBC MBEDTLS_CIPHER_DES_EDE_CBC
+#define POLARSSL_CIPHER_DES_EDE_ECB MBEDTLS_CIPHER_DES_EDE_ECB
+#define POLARSSL_CIPHER_H MBEDTLS_CIPHER_H
+#define POLARSSL_CIPHER_ID_3DES MBEDTLS_CIPHER_ID_3DES
+#define POLARSSL_CIPHER_ID_AES MBEDTLS_CIPHER_ID_AES
+#define POLARSSL_CIPHER_ID_ARC4 MBEDTLS_CIPHER_ID_ARC4
+#define POLARSSL_CIPHER_ID_BLOWFISH MBEDTLS_CIPHER_ID_BLOWFISH
+#define POLARSSL_CIPHER_ID_CAMELLIA MBEDTLS_CIPHER_ID_CAMELLIA
+#define POLARSSL_CIPHER_ID_DES MBEDTLS_CIPHER_ID_DES
+#define POLARSSL_CIPHER_ID_NONE MBEDTLS_CIPHER_ID_NONE
+#define POLARSSL_CIPHER_ID_NULL MBEDTLS_CIPHER_ID_NULL
+#define POLARSSL_CIPHER_MODE_AEAD MBEDTLS_CIPHER_MODE_AEAD
+#define POLARSSL_CIPHER_MODE_STREAM MBEDTLS_CIPHER_MODE_STREAM
+#define POLARSSL_CIPHER_MODE_WITH_PADDING MBEDTLS_CIPHER_MODE_WITH_PADDING
+#define POLARSSL_CIPHER_NONE MBEDTLS_CIPHER_NONE
+#define POLARSSL_CIPHER_NULL MBEDTLS_CIPHER_NULL
+#define POLARSSL_CIPHER_VARIABLE_IV_LEN MBEDTLS_CIPHER_VARIABLE_IV_LEN
+#define POLARSSL_CIPHER_VARIABLE_KEY_LEN MBEDTLS_CIPHER_VARIABLE_KEY_LEN
+#define POLARSSL_CIPHER_WRAP_H MBEDTLS_CIPHER_WRAP_H
+#define POLARSSL_CONFIG_H MBEDTLS_CONFIG_H
+#define POLARSSL_CTR_DRBG_H MBEDTLS_CTR_DRBG_H
+#define POLARSSL_DEBUG_H MBEDTLS_DEBUG_H
+#define POLARSSL_DECRYPT MBEDTLS_DECRYPT
+#define POLARSSL_DES_H MBEDTLS_DES_H
+#define POLARSSL_DHM_H MBEDTLS_DHM_H
+#define POLARSSL_DHM_RFC3526_MODP_2048_G MBEDTLS_DHM_RFC3526_MODP_2048_G
+#define POLARSSL_DHM_RFC3526_MODP_2048_P MBEDTLS_DHM_RFC3526_MODP_2048_P
+#define POLARSSL_DHM_RFC3526_MODP_3072_G MBEDTLS_DHM_RFC3526_MODP_3072_G
+#define POLARSSL_DHM_RFC3526_MODP_3072_P MBEDTLS_DHM_RFC3526_MODP_3072_P
+#define POLARSSL_DHM_RFC5114_MODP_2048_G MBEDTLS_DHM_RFC5114_MODP_2048_G
+#define POLARSSL_DHM_RFC5114_MODP_2048_P MBEDTLS_DHM_RFC5114_MODP_2048_P
+#define POLARSSL_ECDH_H MBEDTLS_ECDH_H
+#define POLARSSL_ECDH_OURS MBEDTLS_ECDH_OURS
+#define POLARSSL_ECDH_THEIRS MBEDTLS_ECDH_THEIRS
+#define POLARSSL_ECDSA_H MBEDTLS_ECDSA_H
+#define POLARSSL_ECP_DP_BP256R1 MBEDTLS_ECP_DP_BP256R1
+#define POLARSSL_ECP_DP_BP384R1 MBEDTLS_ECP_DP_BP384R1
+#define POLARSSL_ECP_DP_BP512R1 MBEDTLS_ECP_DP_BP512R1
+#define POLARSSL_ECP_DP_M255 MBEDTLS_ECP_DP_CURVE25519
+#define POLARSSL_ECP_DP_MAX MBEDTLS_ECP_DP_MAX
+#define POLARSSL_ECP_DP_NONE MBEDTLS_ECP_DP_NONE
+#define POLARSSL_ECP_DP_SECP192K1 MBEDTLS_ECP_DP_SECP192K1
+#define POLARSSL_ECP_DP_SECP192R1 MBEDTLS_ECP_DP_SECP192R1
+#define POLARSSL_ECP_DP_SECP224K1 MBEDTLS_ECP_DP_SECP224K1
+#define POLARSSL_ECP_DP_SECP224R1 MBEDTLS_ECP_DP_SECP224R1
+#define POLARSSL_ECP_DP_SECP256K1 MBEDTLS_ECP_DP_SECP256K1
+#define POLARSSL_ECP_DP_SECP256R1 MBEDTLS_ECP_DP_SECP256R1
+#define POLARSSL_ECP_DP_SECP384R1 MBEDTLS_ECP_DP_SECP384R1
+#define POLARSSL_ECP_DP_SECP521R1 MBEDTLS_ECP_DP_SECP521R1
+#define POLARSSL_ECP_H MBEDTLS_ECP_H
+#define POLARSSL_ECP_MAX_BYTES MBEDTLS_ECP_MAX_BYTES
+#define POLARSSL_ECP_MAX_PT_LEN MBEDTLS_ECP_MAX_PT_LEN
+#define POLARSSL_ECP_PF_COMPRESSED MBEDTLS_ECP_PF_COMPRESSED
+#define POLARSSL_ECP_PF_UNCOMPRESSED MBEDTLS_ECP_PF_UNCOMPRESSED
+#define POLARSSL_ECP_TLS_NAMED_CURVE MBEDTLS_ECP_TLS_NAMED_CURVE
+#define POLARSSL_ENCRYPT MBEDTLS_ENCRYPT
+#define POLARSSL_ENTROPY_H MBEDTLS_ENTROPY_H
+#define POLARSSL_ENTROPY_POLL_H MBEDTLS_ENTROPY_POLL_H
+#define POLARSSL_ENTROPY_SHA256_ACCUMULATOR MBEDTLS_ENTROPY_SHA256_ACCUMULATOR
+#define POLARSSL_ENTROPY_SHA512_ACCUMULATOR MBEDTLS_ENTROPY_SHA512_ACCUMULATOR
+#define POLARSSL_ERROR_H MBEDTLS_ERROR_H
+#define POLARSSL_ERR_AES_INVALID_INPUT_LENGTH MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH
+#define POLARSSL_ERR_AES_INVALID_KEY_LENGTH MBEDTLS_ERR_AES_INVALID_KEY_LENGTH
+#define POLARSSL_ERR_ASN1_BUF_TOO_SMALL MBEDTLS_ERR_ASN1_BUF_TOO_SMALL
+#define POLARSSL_ERR_ASN1_INVALID_DATA MBEDTLS_ERR_ASN1_INVALID_DATA
+#define POLARSSL_ERR_ASN1_INVALID_LENGTH MBEDTLS_ERR_ASN1_INVALID_LENGTH
+#define POLARSSL_ERR_ASN1_LENGTH_MISMATCH MBEDTLS_ERR_ASN1_LENGTH_MISMATCH
+#define POLARSSL_ERR_ASN1_MALLOC_FAILED MBEDTLS_ERR_ASN1_ALLOC_FAILED
+#define POLARSSL_ERR_ASN1_OUT_OF_DATA MBEDTLS_ERR_ASN1_OUT_OF_DATA
+#define POLARSSL_ERR_ASN1_UNEXPECTED_TAG MBEDTLS_ERR_ASN1_UNEXPECTED_TAG
+#define POLARSSL_ERR_BASE64_BUFFER_TOO_SMALL MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL
+#define POLARSSL_ERR_BASE64_INVALID_CHARACTER MBEDTLS_ERR_BASE64_INVALID_CHARACTER
+#define POLARSSL_ERR_BLOWFISH_INVALID_INPUT_LENGTH MBEDTLS_ERR_BLOWFISH_INVALID_INPUT_LENGTH
+#define POLARSSL_ERR_BLOWFISH_INVALID_KEY_LENGTH MBEDTLS_ERR_BLOWFISH_INVALID_KEY_LENGTH
+#define POLARSSL_ERR_CAMELLIA_INVALID_INPUT_LENGTH MBEDTLS_ERR_CAMELLIA_INVALID_INPUT_LENGTH
+#define POLARSSL_ERR_CAMELLIA_INVALID_KEY_LENGTH MBEDTLS_ERR_CAMELLIA_INVALID_KEY_LENGTH
+#define POLARSSL_ERR_CCM_AUTH_FAILED MBEDTLS_ERR_CCM_AUTH_FAILED
+#define POLARSSL_ERR_CCM_BAD_INPUT MBEDTLS_ERR_CCM_BAD_INPUT
+#define POLARSSL_ERR_CIPHER_ALLOC_FAILED MBEDTLS_ERR_CIPHER_ALLOC_FAILED
+#define POLARSSL_ERR_CIPHER_AUTH_FAILED MBEDTLS_ERR_CIPHER_AUTH_FAILED
+#define POLARSSL_ERR_CIPHER_BAD_INPUT_DATA MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA
+#define POLARSSL_ERR_CIPHER_FEATURE_UNAVAILABLE MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE
+#define POLARSSL_ERR_CIPHER_FULL_BLOCK_EXPECTED MBEDTLS_ERR_CIPHER_FULL_BLOCK_EXPECTED
+#define POLARSSL_ERR_CIPHER_INVALID_PADDING MBEDTLS_ERR_CIPHER_INVALID_PADDING
+#define POLARSSL_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED
+#define POLARSSL_ERR_CTR_DRBG_FILE_IO_ERROR MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR
+#define POLARSSL_ERR_CTR_DRBG_INPUT_TOO_BIG MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG
+#define POLARSSL_ERR_CTR_DRBG_REQUEST_TOO_BIG MBEDTLS_ERR_CTR_DRBG_REQUEST_TOO_BIG
+#define POLARSSL_ERR_DES_INVALID_INPUT_LENGTH MBEDTLS_ERR_DES_INVALID_INPUT_LENGTH
+#define POLARSSL_ERR_DHM_BAD_INPUT_DATA MBEDTLS_ERR_DHM_BAD_INPUT_DATA
+#define POLARSSL_ERR_DHM_CALC_SECRET_FAILED MBEDTLS_ERR_DHM_CALC_SECRET_FAILED
+#define POLARSSL_ERR_DHM_FILE_IO_ERROR MBEDTLS_ERR_DHM_FILE_IO_ERROR
+#define POLARSSL_ERR_DHM_INVALID_FORMAT MBEDTLS_ERR_DHM_INVALID_FORMAT
+#define POLARSSL_ERR_DHM_MAKE_PARAMS_FAILED MBEDTLS_ERR_DHM_MAKE_PARAMS_FAILED
+#define POLARSSL_ERR_DHM_MAKE_PUBLIC_FAILED MBEDTLS_ERR_DHM_MAKE_PUBLIC_FAILED
+#define POLARSSL_ERR_DHM_MALLOC_FAILED MBEDTLS_ERR_DHM_ALLOC_FAILED
+#define POLARSSL_ERR_DHM_READ_PARAMS_FAILED MBEDTLS_ERR_DHM_READ_PARAMS_FAILED
+#define POLARSSL_ERR_DHM_READ_PUBLIC_FAILED MBEDTLS_ERR_DHM_READ_PUBLIC_FAILED
+#define POLARSSL_ERR_ECP_BAD_INPUT_DATA MBEDTLS_ERR_ECP_BAD_INPUT_DATA
+#define POLARSSL_ERR_ECP_BUFFER_TOO_SMALL MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL
+#define POLARSSL_ERR_ECP_FEATURE_UNAVAILABLE MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE
+#define POLARSSL_ERR_ECP_INVALID_KEY MBEDTLS_ERR_ECP_INVALID_KEY
+#define POLARSSL_ERR_ECP_MALLOC_FAILED MBEDTLS_ERR_ECP_ALLOC_FAILED
+#define POLARSSL_ERR_ECP_RANDOM_FAILED MBEDTLS_ERR_ECP_RANDOM_FAILED
+#define POLARSSL_ERR_ECP_SIG_LEN_MISMATCH MBEDTLS_ERR_ECP_SIG_LEN_MISMATCH
+#define POLARSSL_ERR_ECP_VERIFY_FAILED MBEDTLS_ERR_ECP_VERIFY_FAILED
+#define POLARSSL_ERR_ENTROPY_FILE_IO_ERROR MBEDTLS_ERR_ENTROPY_FILE_IO_ERROR
+#define POLARSSL_ERR_ENTROPY_MAX_SOURCES MBEDTLS_ERR_ENTROPY_MAX_SOURCES
+#define POLARSSL_ERR_ENTROPY_NO_SOURCES_DEFINED MBEDTLS_ERR_ENTROPY_NO_SOURCES_DEFINED
+#define POLARSSL_ERR_ENTROPY_SOURCE_FAILED MBEDTLS_ERR_ENTROPY_SOURCE_FAILED
+#define POLARSSL_ERR_GCM_AUTH_FAILED MBEDTLS_ERR_GCM_AUTH_FAILED
+#define POLARSSL_ERR_GCM_BAD_INPUT MBEDTLS_ERR_GCM_BAD_INPUT
+#define POLARSSL_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED
+#define POLARSSL_ERR_HMAC_DRBG_FILE_IO_ERROR MBEDTLS_ERR_HMAC_DRBG_FILE_IO_ERROR
+#define POLARSSL_ERR_HMAC_DRBG_INPUT_TOO_BIG MBEDTLS_ERR_HMAC_DRBG_INPUT_TOO_BIG
+#define POLARSSL_ERR_HMAC_DRBG_REQUEST_TOO_BIG MBEDTLS_ERR_HMAC_DRBG_REQUEST_TOO_BIG
+#define POLARSSL_ERR_MD_ALLOC_FAILED MBEDTLS_ERR_MD_ALLOC_FAILED
+#define POLARSSL_ERR_MD_BAD_INPUT_DATA MBEDTLS_ERR_MD_BAD_INPUT_DATA
+#define POLARSSL_ERR_MD_FEATURE_UNAVAILABLE MBEDTLS_ERR_MD_FEATURE_UNAVAILABLE
+#define POLARSSL_ERR_MD_FILE_IO_ERROR MBEDTLS_ERR_MD_FILE_IO_ERROR
+#define POLARSSL_ERR_MPI_BAD_INPUT_DATA MBEDTLS_ERR_MPI_BAD_INPUT_DATA
+#define POLARSSL_ERR_MPI_BUFFER_TOO_SMALL MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL
+#define POLARSSL_ERR_MPI_DIVISION_BY_ZERO MBEDTLS_ERR_MPI_DIVISION_BY_ZERO
+#define POLARSSL_ERR_MPI_FILE_IO_ERROR MBEDTLS_ERR_MPI_FILE_IO_ERROR
+#define POLARSSL_ERR_MPI_INVALID_CHARACTER MBEDTLS_ERR_MPI_INVALID_CHARACTER
+#define POLARSSL_ERR_MPI_MALLOC_FAILED MBEDTLS_ERR_MPI_ALLOC_FAILED
+#define POLARSSL_ERR_MPI_NEGATIVE_VALUE MBEDTLS_ERR_MPI_NEGATIVE_VALUE
+#define POLARSSL_ERR_MPI_NOT_ACCEPTABLE MBEDTLS_ERR_MPI_NOT_ACCEPTABLE
+#define POLARSSL_ERR_NET_ACCEPT_FAILED MBEDTLS_ERR_NET_ACCEPT_FAILED
+#define POLARSSL_ERR_NET_BIND_FAILED MBEDTLS_ERR_NET_BIND_FAILED
+#define POLARSSL_ERR_NET_CONNECT_FAILED MBEDTLS_ERR_NET_CONNECT_FAILED
+#define POLARSSL_ERR_NET_CONN_RESET MBEDTLS_ERR_NET_CONN_RESET
+#define POLARSSL_ERR_NET_LISTEN_FAILED MBEDTLS_ERR_NET_LISTEN_FAILED
+#define POLARSSL_ERR_NET_RECV_FAILED MBEDTLS_ERR_NET_RECV_FAILED
+#define POLARSSL_ERR_NET_SEND_FAILED MBEDTLS_ERR_NET_SEND_FAILED
+#define POLARSSL_ERR_NET_SOCKET_FAILED MBEDTLS_ERR_NET_SOCKET_FAILED
+#define POLARSSL_ERR_NET_TIMEOUT MBEDTLS_ERR_SSL_TIMEOUT
+#define POLARSSL_ERR_NET_UNKNOWN_HOST MBEDTLS_ERR_NET_UNKNOWN_HOST
+#define POLARSSL_ERR_NET_WANT_READ MBEDTLS_ERR_SSL_WANT_READ
+#define POLARSSL_ERR_NET_WANT_WRITE MBEDTLS_ERR_SSL_WANT_WRITE
+#define POLARSSL_ERR_OID_BUF_TOO_SMALL MBEDTLS_ERR_OID_BUF_TOO_SMALL
+#define POLARSSL_ERR_OID_NOT_FOUND MBEDTLS_ERR_OID_NOT_FOUND
+#define POLARSSL_ERR_PADLOCK_DATA_MISALIGNED MBEDTLS_ERR_PADLOCK_DATA_MISALIGNED
+#define POLARSSL_ERR_PEM_BAD_INPUT_DATA MBEDTLS_ERR_PEM_BAD_INPUT_DATA
+#define POLARSSL_ERR_PEM_FEATURE_UNAVAILABLE MBEDTLS_ERR_PEM_FEATURE_UNAVAILABLE
+#define POLARSSL_ERR_PEM_INVALID_DATA MBEDTLS_ERR_PEM_INVALID_DATA
+#define POLARSSL_ERR_PEM_INVALID_ENC_IV MBEDTLS_ERR_PEM_INVALID_ENC_IV
+#define POLARSSL_ERR_PEM_MALLOC_FAILED MBEDTLS_ERR_PEM_ALLOC_FAILED
+#define POLARSSL_ERR_PEM_NO_HEADER_FOOTER_PRESENT MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT
+#define POLARSSL_ERR_PEM_PASSWORD_MISMATCH MBEDTLS_ERR_PEM_PASSWORD_MISMATCH
+#define POLARSSL_ERR_PEM_PASSWORD_REQUIRED MBEDTLS_ERR_PEM_PASSWORD_REQUIRED
+#define POLARSSL_ERR_PEM_UNKNOWN_ENC_ALG MBEDTLS_ERR_PEM_UNKNOWN_ENC_ALG
+#define POLARSSL_ERR_PKCS12_BAD_INPUT_DATA MBEDTLS_ERR_PKCS12_BAD_INPUT_DATA
+#define POLARSSL_ERR_PKCS12_FEATURE_UNAVAILABLE MBEDTLS_ERR_PKCS12_FEATURE_UNAVAILABLE
+#define POLARSSL_ERR_PKCS12_PASSWORD_MISMATCH MBEDTLS_ERR_PKCS12_PASSWORD_MISMATCH
+#define POLARSSL_ERR_PKCS12_PBE_INVALID_FORMAT MBEDTLS_ERR_PKCS12_PBE_INVALID_FORMAT
+#define POLARSSL_ERR_PKCS5_BAD_INPUT_DATA MBEDTLS_ERR_PKCS5_BAD_INPUT_DATA
+#define POLARSSL_ERR_PKCS5_FEATURE_UNAVAILABLE MBEDTLS_ERR_PKCS5_FEATURE_UNAVAILABLE
+#define POLARSSL_ERR_PKCS5_INVALID_FORMAT MBEDTLS_ERR_PKCS5_INVALID_FORMAT
+#define POLARSSL_ERR_PKCS5_PASSWORD_MISMATCH MBEDTLS_ERR_PKCS5_PASSWORD_MISMATCH
+#define POLARSSL_ERR_PK_BAD_INPUT_DATA MBEDTLS_ERR_PK_BAD_INPUT_DATA
+#define POLARSSL_ERR_PK_FEATURE_UNAVAILABLE MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE
+#define POLARSSL_ERR_PK_FILE_IO_ERROR MBEDTLS_ERR_PK_FILE_IO_ERROR
+#define POLARSSL_ERR_PK_INVALID_ALG MBEDTLS_ERR_PK_INVALID_ALG
+#define POLARSSL_ERR_PK_INVALID_PUBKEY MBEDTLS_ERR_PK_INVALID_PUBKEY
+#define POLARSSL_ERR_PK_KEY_INVALID_FORMAT MBEDTLS_ERR_PK_KEY_INVALID_FORMAT
+#define POLARSSL_ERR_PK_KEY_INVALID_VERSION MBEDTLS_ERR_PK_KEY_INVALID_VERSION
+#define POLARSSL_ERR_PK_MALLOC_FAILED MBEDTLS_ERR_PK_ALLOC_FAILED
+#define POLARSSL_ERR_PK_PASSWORD_MISMATCH MBEDTLS_ERR_PK_PASSWORD_MISMATCH
+#define POLARSSL_ERR_PK_PASSWORD_REQUIRED MBEDTLS_ERR_PK_PASSWORD_REQUIRED
+#define POLARSSL_ERR_PK_SIG_LEN_MISMATCH MBEDTLS_ERR_PK_SIG_LEN_MISMATCH
+#define POLARSSL_ERR_PK_TYPE_MISMATCH MBEDTLS_ERR_PK_TYPE_MISMATCH
+#define POLARSSL_ERR_PK_UNKNOWN_NAMED_CURVE MBEDTLS_ERR_PK_UNKNOWN_NAMED_CURVE
+#define POLARSSL_ERR_PK_UNKNOWN_PK_ALG MBEDTLS_ERR_PK_UNKNOWN_PK_ALG
+#define POLARSSL_ERR_RSA_BAD_INPUT_DATA MBEDTLS_ERR_RSA_BAD_INPUT_DATA
+#define POLARSSL_ERR_RSA_INVALID_PADDING MBEDTLS_ERR_RSA_INVALID_PADDING
+#define POLARSSL_ERR_RSA_KEY_CHECK_FAILED MBEDTLS_ERR_RSA_KEY_CHECK_FAILED
+#define POLARSSL_ERR_RSA_KEY_GEN_FAILED MBEDTLS_ERR_RSA_KEY_GEN_FAILED
+#define POLARSSL_ERR_RSA_OUTPUT_TOO_LARGE MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE
+#define POLARSSL_ERR_RSA_PRIVATE_FAILED MBEDTLS_ERR_RSA_PRIVATE_FAILED
+#define POLARSSL_ERR_RSA_PUBLIC_FAILED MBEDTLS_ERR_RSA_PUBLIC_FAILED
+#define POLARSSL_ERR_RSA_RNG_FAILED MBEDTLS_ERR_RSA_RNG_FAILED
+#define POLARSSL_ERR_RSA_VERIFY_FAILED MBEDTLS_ERR_RSA_VERIFY_FAILED
+#define POLARSSL_ERR_SSL_BAD_HS_CERTIFICATE MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE
+#define POLARSSL_ERR_SSL_BAD_HS_CERTIFICATE_REQUEST MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_REQUEST
+#define POLARSSL_ERR_SSL_BAD_HS_CERTIFICATE_VERIFY MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_VERIFY
+#define POLARSSL_ERR_SSL_BAD_HS_CHANGE_CIPHER_SPEC MBEDTLS_ERR_SSL_BAD_HS_CHANGE_CIPHER_SPEC
+#define POLARSSL_ERR_SSL_BAD_HS_CLIENT_HELLO MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO
+#define POLARSSL_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE
+#define POLARSSL_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_CS MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_CS
+#define POLARSSL_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_RP MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_RP
+#define POLARSSL_ERR_SSL_BAD_HS_FINISHED MBEDTLS_ERR_SSL_BAD_HS_FINISHED
+#define POLARSSL_ERR_SSL_BAD_HS_NEW_SESSION_TICKET MBEDTLS_ERR_SSL_BAD_HS_NEW_SESSION_TICKET
+#define POLARSSL_ERR_SSL_BAD_HS_PROTOCOL_VERSION MBEDTLS_ERR_SSL_BAD_HS_PROTOCOL_VERSION
+#define POLARSSL_ERR_SSL_BAD_HS_SERVER_HELLO MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO
+#define POLARSSL_ERR_SSL_BAD_HS_SERVER_HELLO_DONE MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO_DONE
+#define POLARSSL_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE
+#define POLARSSL_ERR_SSL_BAD_INPUT_DATA MBEDTLS_ERR_SSL_BAD_INPUT_DATA
+#define POLARSSL_ERR_SSL_BUFFER_TOO_SMALL MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL
+#define POLARSSL_ERR_SSL_CA_CHAIN_REQUIRED MBEDTLS_ERR_SSL_CA_CHAIN_REQUIRED
+#define POLARSSL_ERR_SSL_CERTIFICATE_REQUIRED MBEDTLS_ERR_SSL_CERTIFICATE_REQUIRED
+#define POLARSSL_ERR_SSL_CERTIFICATE_TOO_LARGE MBEDTLS_ERR_SSL_CERTIFICATE_TOO_LARGE
+#define POLARSSL_ERR_SSL_COMPRESSION_FAILED MBEDTLS_ERR_SSL_COMPRESSION_FAILED
+#define POLARSSL_ERR_SSL_CONN_EOF MBEDTLS_ERR_SSL_CONN_EOF
+#define POLARSSL_ERR_SSL_COUNTER_WRAPPING MBEDTLS_ERR_SSL_COUNTER_WRAPPING
+#define POLARSSL_ERR_SSL_FATAL_ALERT_MESSAGE MBEDTLS_ERR_SSL_FATAL_ALERT_MESSAGE
+#define POLARSSL_ERR_SSL_FEATURE_UNAVAILABLE MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE
+#define POLARSSL_ERR_SSL_HELLO_VERIFY_REQUIRED MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED
+#define POLARSSL_ERR_SSL_HW_ACCEL_FAILED MBEDTLS_ERR_SSL_HW_ACCEL_FAILED
+#define POLARSSL_ERR_SSL_HW_ACCEL_FALLTHROUGH MBEDTLS_ERR_SSL_HW_ACCEL_FALLTHROUGH
+#define POLARSSL_ERR_SSL_INTERNAL_ERROR MBEDTLS_ERR_SSL_INTERNAL_ERROR
+#define POLARSSL_ERR_SSL_INVALID_MAC MBEDTLS_ERR_SSL_INVALID_MAC
+#define POLARSSL_ERR_SSL_INVALID_RECORD MBEDTLS_ERR_SSL_INVALID_RECORD
+#define POLARSSL_ERR_SSL_MALLOC_FAILED MBEDTLS_ERR_SSL_ALLOC_FAILED
+#define POLARSSL_ERR_SSL_NO_CIPHER_CHOSEN MBEDTLS_ERR_SSL_NO_CIPHER_CHOSEN
+#define POLARSSL_ERR_SSL_NO_CLIENT_CERTIFICATE MBEDTLS_ERR_SSL_NO_CLIENT_CERTIFICATE
+#define POLARSSL_ERR_SSL_NO_RNG MBEDTLS_ERR_SSL_NO_RNG
+#define POLARSSL_ERR_SSL_NO_USABLE_CIPHERSUITE MBEDTLS_ERR_SSL_NO_USABLE_CIPHERSUITE
+#define POLARSSL_ERR_SSL_PEER_CLOSE_NOTIFY MBEDTLS_ERR_SSL_PEER_CLOSE_NOTIFY
+#define POLARSSL_ERR_SSL_PEER_VERIFY_FAILED MBEDTLS_ERR_SSL_PEER_VERIFY_FAILED
+#define POLARSSL_ERR_SSL_PK_TYPE_MISMATCH MBEDTLS_ERR_SSL_PK_TYPE_MISMATCH
+#define POLARSSL_ERR_SSL_PRIVATE_KEY_REQUIRED MBEDTLS_ERR_SSL_PRIVATE_KEY_REQUIRED
+#define POLARSSL_ERR_SSL_SESSION_TICKET_EXPIRED MBEDTLS_ERR_SSL_SESSION_TICKET_EXPIRED
+#define POLARSSL_ERR_SSL_UNEXPECTED_MESSAGE MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE
+#define POLARSSL_ERR_SSL_UNKNOWN_CIPHER MBEDTLS_ERR_SSL_UNKNOWN_CIPHER
+#define POLARSSL_ERR_SSL_UNKNOWN_IDENTITY MBEDTLS_ERR_SSL_UNKNOWN_IDENTITY
+#define POLARSSL_ERR_SSL_WAITING_SERVER_HELLO_RENEGO MBEDTLS_ERR_SSL_WAITING_SERVER_HELLO_RENEGO
+#define POLARSSL_ERR_THREADING_BAD_INPUT_DATA MBEDTLS_ERR_THREADING_BAD_INPUT_DATA
+#define POLARSSL_ERR_THREADING_FEATURE_UNAVAILABLE MBEDTLS_ERR_THREADING_FEATURE_UNAVAILABLE
+#define POLARSSL_ERR_THREADING_MUTEX_ERROR MBEDTLS_ERR_THREADING_MUTEX_ERROR
+#define POLARSSL_ERR_X509_BAD_INPUT_DATA MBEDTLS_ERR_X509_BAD_INPUT_DATA
+#define POLARSSL_ERR_X509_CERT_UNKNOWN_FORMAT MBEDTLS_ERR_X509_CERT_UNKNOWN_FORMAT
+#define POLARSSL_ERR_X509_CERT_VERIFY_FAILED MBEDTLS_ERR_X509_CERT_VERIFY_FAILED
+#define POLARSSL_ERR_X509_FEATURE_UNAVAILABLE MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE
+#define POLARSSL_ERR_X509_FILE_IO_ERROR MBEDTLS_ERR_X509_FILE_IO_ERROR
+#define POLARSSL_ERR_X509_INVALID_ALG MBEDTLS_ERR_X509_INVALID_ALG
+#define POLARSSL_ERR_X509_INVALID_DATE MBEDTLS_ERR_X509_INVALID_DATE
+#define POLARSSL_ERR_X509_INVALID_EXTENSIONS MBEDTLS_ERR_X509_INVALID_EXTENSIONS
+#define POLARSSL_ERR_X509_INVALID_FORMAT MBEDTLS_ERR_X509_INVALID_FORMAT
+#define POLARSSL_ERR_X509_INVALID_NAME MBEDTLS_ERR_X509_INVALID_NAME
+#define POLARSSL_ERR_X509_INVALID_SERIAL MBEDTLS_ERR_X509_INVALID_SERIAL
+#define POLARSSL_ERR_X509_INVALID_SIGNATURE MBEDTLS_ERR_X509_INVALID_SIGNATURE
+#define POLARSSL_ERR_X509_INVALID_VERSION MBEDTLS_ERR_X509_INVALID_VERSION
+#define POLARSSL_ERR_X509_MALLOC_FAILED MBEDTLS_ERR_X509_ALLOC_FAILED
+#define POLARSSL_ERR_X509_SIG_MISMATCH MBEDTLS_ERR_X509_SIG_MISMATCH
+#define POLARSSL_ERR_X509_UNKNOWN_OID MBEDTLS_ERR_X509_UNKNOWN_OID
+#define POLARSSL_ERR_X509_UNKNOWN_SIG_ALG MBEDTLS_ERR_X509_UNKNOWN_SIG_ALG
+#define POLARSSL_ERR_X509_UNKNOWN_VERSION MBEDTLS_ERR_X509_UNKNOWN_VERSION
+#define POLARSSL_ERR_XTEA_INVALID_INPUT_LENGTH MBEDTLS_ERR_XTEA_INVALID_INPUT_LENGTH
+#define POLARSSL_GCM_H MBEDTLS_GCM_H
+#define POLARSSL_HAVEGE_H MBEDTLS_HAVEGE_H
+#define POLARSSL_HAVE_INT32 MBEDTLS_HAVE_INT32
+#define POLARSSL_HAVE_INT64 MBEDTLS_HAVE_INT64
+#define POLARSSL_HAVE_UDBL MBEDTLS_HAVE_UDBL
+#define POLARSSL_HAVE_X86 MBEDTLS_HAVE_X86
+#define POLARSSL_HAVE_X86_64 MBEDTLS_HAVE_X86_64
+#define POLARSSL_HMAC_DRBG_H MBEDTLS_HMAC_DRBG_H
+#define POLARSSL_HMAC_DRBG_PR_OFF MBEDTLS_HMAC_DRBG_PR_OFF
+#define POLARSSL_HMAC_DRBG_PR_ON MBEDTLS_HMAC_DRBG_PR_ON
+#define POLARSSL_KEY_EXCHANGE_DHE_PSK MBEDTLS_KEY_EXCHANGE_DHE_PSK
+#define POLARSSL_KEY_EXCHANGE_DHE_RSA MBEDTLS_KEY_EXCHANGE_DHE_RSA
+#define POLARSSL_KEY_EXCHANGE_ECDHE_ECDSA MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA
+#define POLARSSL_KEY_EXCHANGE_ECDHE_PSK MBEDTLS_KEY_EXCHANGE_ECDHE_PSK
+#define POLARSSL_KEY_EXCHANGE_ECDHE_RSA MBEDTLS_KEY_EXCHANGE_ECDHE_RSA
+#define POLARSSL_KEY_EXCHANGE_ECDH_ECDSA MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA
+#define POLARSSL_KEY_EXCHANGE_ECDH_RSA MBEDTLS_KEY_EXCHANGE_ECDH_RSA
+#define POLARSSL_KEY_EXCHANGE_NONE MBEDTLS_KEY_EXCHANGE_NONE
+#define POLARSSL_KEY_EXCHANGE_PSK MBEDTLS_KEY_EXCHANGE_PSK
+#define POLARSSL_KEY_EXCHANGE_RSA MBEDTLS_KEY_EXCHANGE_RSA
+#define POLARSSL_KEY_EXCHANGE_RSA_PSK MBEDTLS_KEY_EXCHANGE_RSA_PSK
+#define POLARSSL_KEY_EXCHANGE__SOME__ECDHE_ENABLED MBEDTLS_KEY_EXCHANGE__SOME__ECDHE_ENABLED
+#define POLARSSL_KEY_EXCHANGE__SOME__PSK_ENABLED MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED
+#define POLARSSL_KEY_EXCHANGE__WITH_CERT__ENABLED MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED
+#define POLARSSL_KEY_LENGTH_DES MBEDTLS_KEY_LENGTH_DES
+#define POLARSSL_KEY_LENGTH_DES_EDE MBEDTLS_KEY_LENGTH_DES_EDE
+#define POLARSSL_KEY_LENGTH_DES_EDE3 MBEDTLS_KEY_LENGTH_DES_EDE3
+#define POLARSSL_KEY_LENGTH_NONE MBEDTLS_KEY_LENGTH_NONE
+#define POLARSSL_MAX_BLOCK_LENGTH MBEDTLS_MAX_BLOCK_LENGTH
+#define POLARSSL_MAX_IV_LENGTH MBEDTLS_MAX_IV_LENGTH
+#define POLARSSL_MD2_H MBEDTLS_MD2_H
+#define POLARSSL_MD4_H MBEDTLS_MD4_H
+#define POLARSSL_MD5_H MBEDTLS_MD5_H
+#define POLARSSL_MD_H MBEDTLS_MD_H
+#define POLARSSL_MD_MAX_SIZE MBEDTLS_MD_MAX_SIZE
+#define POLARSSL_MD_MD2 MBEDTLS_MD_MD2
+#define POLARSSL_MD_MD4 MBEDTLS_MD_MD4
+#define POLARSSL_MD_MD5 MBEDTLS_MD_MD5
+#define POLARSSL_MD_NONE MBEDTLS_MD_NONE
+#define POLARSSL_MD_RIPEMD160 MBEDTLS_MD_RIPEMD160
+#define POLARSSL_MD_SHA1 MBEDTLS_MD_SHA1
+#define POLARSSL_MD_SHA224 MBEDTLS_MD_SHA224
+#define POLARSSL_MD_SHA256 MBEDTLS_MD_SHA256
+#define POLARSSL_MD_SHA384 MBEDTLS_MD_SHA384
+#define POLARSSL_MD_SHA512 MBEDTLS_MD_SHA512
+#define POLARSSL_MD_WRAP_H MBEDTLS_MD_WRAP_H
+#define POLARSSL_MEMORY_BUFFER_ALLOC_H MBEDTLS_MEMORY_BUFFER_ALLOC_H
+#define POLARSSL_MODE_CBC MBEDTLS_MODE_CBC
+#define POLARSSL_MODE_CCM MBEDTLS_MODE_CCM
+#define POLARSSL_MODE_CFB MBEDTLS_MODE_CFB
+#define POLARSSL_MODE_CTR MBEDTLS_MODE_CTR
+#define POLARSSL_MODE_ECB MBEDTLS_MODE_ECB
+#define POLARSSL_MODE_GCM MBEDTLS_MODE_GCM
+#define POLARSSL_MODE_NONE MBEDTLS_MODE_NONE
+#define POLARSSL_MODE_OFB MBEDTLS_MODE_OFB
+#define POLARSSL_MODE_STREAM MBEDTLS_MODE_STREAM
+#define POLARSSL_MPI_MAX_BITS MBEDTLS_MPI_MAX_BITS
+#define POLARSSL_MPI_MAX_BITS_SCALE100 MBEDTLS_MPI_MAX_BITS_SCALE100
+#define POLARSSL_MPI_MAX_LIMBS MBEDTLS_MPI_MAX_LIMBS
+#define POLARSSL_MPI_RW_BUFFER_SIZE MBEDTLS_MPI_RW_BUFFER_SIZE
+#define POLARSSL_NET_H MBEDTLS_NET_SOCKETS_H
+#define POLARSSL_NET_LISTEN_BACKLOG MBEDTLS_NET_LISTEN_BACKLOG
+#define POLARSSL_OID_H MBEDTLS_OID_H
+#define POLARSSL_OPERATION_NONE MBEDTLS_OPERATION_NONE
+#define POLARSSL_PADDING_NONE MBEDTLS_PADDING_NONE
+#define POLARSSL_PADDING_ONE_AND_ZEROS MBEDTLS_PADDING_ONE_AND_ZEROS
+#define POLARSSL_PADDING_PKCS7 MBEDTLS_PADDING_PKCS7
+#define POLARSSL_PADDING_ZEROS MBEDTLS_PADDING_ZEROS
+#define POLARSSL_PADDING_ZEROS_AND_LEN MBEDTLS_PADDING_ZEROS_AND_LEN
+#define POLARSSL_PADLOCK_H MBEDTLS_PADLOCK_H
+#define POLARSSL_PEM_H MBEDTLS_PEM_H
+#define POLARSSL_PKCS11_H MBEDTLS_PKCS11_H
+#define POLARSSL_PKCS12_H MBEDTLS_PKCS12_H
+#define POLARSSL_PKCS5_H MBEDTLS_PKCS5_H
+#define POLARSSL_PK_DEBUG_ECP MBEDTLS_PK_DEBUG_ECP
+#define POLARSSL_PK_DEBUG_MAX_ITEMS MBEDTLS_PK_DEBUG_MAX_ITEMS
+#define POLARSSL_PK_DEBUG_MPI MBEDTLS_PK_DEBUG_MPI
+#define POLARSSL_PK_DEBUG_NONE MBEDTLS_PK_DEBUG_NONE
+#define POLARSSL_PK_ECDSA MBEDTLS_PK_ECDSA
+#define POLARSSL_PK_ECKEY MBEDTLS_PK_ECKEY
+#define POLARSSL_PK_ECKEY_DH MBEDTLS_PK_ECKEY_DH
+#define POLARSSL_PK_H MBEDTLS_PK_H
+#define POLARSSL_PK_NONE MBEDTLS_PK_NONE
+#define POLARSSL_PK_RSA MBEDTLS_PK_RSA
+#define POLARSSL_PK_RSASSA_PSS MBEDTLS_PK_RSASSA_PSS
+#define POLARSSL_PK_RSA_ALT MBEDTLS_PK_RSA_ALT
+#define POLARSSL_PK_WRAP_H MBEDTLS_PK_WRAP_H
+#define POLARSSL_PLATFORM_H MBEDTLS_PLATFORM_H
+#define POLARSSL_PREMASTER_SIZE MBEDTLS_PREMASTER_SIZE
+#define POLARSSL_RIPEMD160_H MBEDTLS_RIPEMD160_H
+#define POLARSSL_RSA_H MBEDTLS_RSA_H
+#define POLARSSL_SHA1_H MBEDTLS_SHA1_H
+#define POLARSSL_SHA256_H MBEDTLS_SHA256_H
+#define POLARSSL_SHA512_H MBEDTLS_SHA512_H
+#define POLARSSL_SSL_CACHE_H MBEDTLS_SSL_CACHE_H
+#define POLARSSL_SSL_CIPHERSUITES_H MBEDTLS_SSL_CIPHERSUITES_H
+#define POLARSSL_SSL_COOKIE_H MBEDTLS_SSL_COOKIE_H
+#define POLARSSL_SSL_H MBEDTLS_SSL_H
+#define POLARSSL_THREADING_H MBEDTLS_THREADING_H
+#define POLARSSL_THREADING_IMPL MBEDTLS_THREADING_IMPL
+#define POLARSSL_TIMING_H MBEDTLS_TIMING_H
+#define POLARSSL_VERSION_H MBEDTLS_VERSION_H
+#define POLARSSL_VERSION_MAJOR MBEDTLS_VERSION_MAJOR
+#define POLARSSL_VERSION_MINOR MBEDTLS_VERSION_MINOR
+#define POLARSSL_VERSION_NUMBER MBEDTLS_VERSION_NUMBER
+#define POLARSSL_VERSION_PATCH MBEDTLS_VERSION_PATCH
+#define POLARSSL_VERSION_STRING MBEDTLS_VERSION_STRING
+#define POLARSSL_VERSION_STRING_FULL MBEDTLS_VERSION_STRING_FULL
+#define POLARSSL_X509_CRL_H MBEDTLS_X509_CRL_H
+#define POLARSSL_X509_CRT_H MBEDTLS_X509_CRT_H
+#define POLARSSL_X509_CSR_H MBEDTLS_X509_CSR_H
+#define POLARSSL_X509_H MBEDTLS_X509_H
+#define POLARSSL_XTEA_H MBEDTLS_XTEA_H
+#define RSA_CRYPT MBEDTLS_RSA_CRYPT
+#define RSA_PKCS_V15 MBEDTLS_RSA_PKCS_V15
+#define RSA_PKCS_V21 MBEDTLS_RSA_PKCS_V21
+#define RSA_PRIVATE MBEDTLS_RSA_PRIVATE
+#define RSA_PUBLIC MBEDTLS_RSA_PUBLIC
+#define RSA_SALT_LEN_ANY MBEDTLS_RSA_SALT_LEN_ANY
+#define RSA_SIGN MBEDTLS_RSA_SIGN
+#define SSL_ALERT_LEVEL_FATAL MBEDTLS_SSL_ALERT_LEVEL_FATAL
+#define SSL_ALERT_LEVEL_WARNING MBEDTLS_SSL_ALERT_LEVEL_WARNING
+#define SSL_ALERT_MSG_ACCESS_DENIED MBEDTLS_SSL_ALERT_MSG_ACCESS_DENIED
+#define SSL_ALERT_MSG_BAD_CERT MBEDTLS_SSL_ALERT_MSG_BAD_CERT
+#define SSL_ALERT_MSG_BAD_RECORD_MAC MBEDTLS_SSL_ALERT_MSG_BAD_RECORD_MAC
+#define SSL_ALERT_MSG_CERT_EXPIRED MBEDTLS_SSL_ALERT_MSG_CERT_EXPIRED
+#define SSL_ALERT_MSG_CERT_REVOKED MBEDTLS_SSL_ALERT_MSG_CERT_REVOKED
+#define SSL_ALERT_MSG_CERT_UNKNOWN MBEDTLS_SSL_ALERT_MSG_CERT_UNKNOWN
+#define SSL_ALERT_MSG_CLOSE_NOTIFY MBEDTLS_SSL_ALERT_MSG_CLOSE_NOTIFY
+#define SSL_ALERT_MSG_DECODE_ERROR MBEDTLS_SSL_ALERT_MSG_DECODE_ERROR
+#define SSL_ALERT_MSG_DECOMPRESSION_FAILURE MBEDTLS_SSL_ALERT_MSG_DECOMPRESSION_FAILURE
+#define SSL_ALERT_MSG_DECRYPTION_FAILED MBEDTLS_SSL_ALERT_MSG_DECRYPTION_FAILED
+#define SSL_ALERT_MSG_DECRYPT_ERROR MBEDTLS_SSL_ALERT_MSG_DECRYPT_ERROR
+#define SSL_ALERT_MSG_EXPORT_RESTRICTION MBEDTLS_SSL_ALERT_MSG_EXPORT_RESTRICTION
+#define SSL_ALERT_MSG_HANDSHAKE_FAILURE MBEDTLS_SSL_ALERT_MSG_HANDSHAKE_FAILURE
+#define SSL_ALERT_MSG_ILLEGAL_PARAMETER MBEDTLS_SSL_ALERT_MSG_ILLEGAL_PARAMETER
+#define SSL_ALERT_MSG_INAPROPRIATE_FALLBACK MBEDTLS_SSL_ALERT_MSG_INAPROPRIATE_FALLBACK
+#define SSL_ALERT_MSG_INSUFFICIENT_SECURITY MBEDTLS_SSL_ALERT_MSG_INSUFFICIENT_SECURITY
+#define SSL_ALERT_MSG_INTERNAL_ERROR MBEDTLS_SSL_ALERT_MSG_INTERNAL_ERROR
+#define SSL_ALERT_MSG_NO_APPLICATION_PROTOCOL MBEDTLS_SSL_ALERT_MSG_NO_APPLICATION_PROTOCOL
+#define SSL_ALERT_MSG_NO_CERT MBEDTLS_SSL_ALERT_MSG_NO_CERT
+#define SSL_ALERT_MSG_NO_RENEGOTIATION MBEDTLS_SSL_ALERT_MSG_NO_RENEGOTIATION
+#define SSL_ALERT_MSG_PROTOCOL_VERSION MBEDTLS_SSL_ALERT_MSG_PROTOCOL_VERSION
+#define SSL_ALERT_MSG_RECORD_OVERFLOW MBEDTLS_SSL_ALERT_MSG_RECORD_OVERFLOW
+#define SSL_ALERT_MSG_UNEXPECTED_MESSAGE MBEDTLS_SSL_ALERT_MSG_UNEXPECTED_MESSAGE
+#define SSL_ALERT_MSG_UNKNOWN_CA MBEDTLS_SSL_ALERT_MSG_UNKNOWN_CA
+#define SSL_ALERT_MSG_UNKNOWN_PSK_IDENTITY MBEDTLS_SSL_ALERT_MSG_UNKNOWN_PSK_IDENTITY
+#define SSL_ALERT_MSG_UNRECOGNIZED_NAME MBEDTLS_SSL_ALERT_MSG_UNRECOGNIZED_NAME
+#define SSL_ALERT_MSG_UNSUPPORTED_CERT MBEDTLS_SSL_ALERT_MSG_UNSUPPORTED_CERT
+#define SSL_ALERT_MSG_UNSUPPORTED_EXT MBEDTLS_SSL_ALERT_MSG_UNSUPPORTED_EXT
+#define SSL_ALERT_MSG_USER_CANCELED MBEDTLS_SSL_ALERT_MSG_USER_CANCELED
+#define SSL_ANTI_REPLAY_DISABLED MBEDTLS_SSL_ANTI_REPLAY_DISABLED
+#define SSL_ANTI_REPLAY_ENABLED MBEDTLS_SSL_ANTI_REPLAY_ENABLED
+#define SSL_ARC4_DISABLED MBEDTLS_SSL_ARC4_DISABLED
+#define SSL_ARC4_ENABLED MBEDTLS_SSL_ARC4_ENABLED
+#define SSL_BUFFER_LEN ( ( ( MBEDTLS_SSL_IN_BUFFER_LEN ) < ( MBEDTLS_SSL_OUT_BUFFER_LEN ) ) \
+ ? ( MBEDTLS_SSL_IN_BUFFER_LEN ) : ( MBEDTLS_SSL_OUT_BUFFER_LEN ) )
+#define SSL_CACHE_DEFAULT_MAX_ENTRIES MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES
+#define SSL_CACHE_DEFAULT_TIMEOUT MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT
+#define SSL_CBC_RECORD_SPLITTING_DISABLED MBEDTLS_SSL_CBC_RECORD_SPLITTING_DISABLED
+#define SSL_CBC_RECORD_SPLITTING_ENABLED MBEDTLS_SSL_CBC_RECORD_SPLITTING_ENABLED
+#define SSL_CERTIFICATE_REQUEST MBEDTLS_SSL_CERTIFICATE_REQUEST
+#define SSL_CERTIFICATE_VERIFY MBEDTLS_SSL_CERTIFICATE_VERIFY
+#define SSL_CERT_TYPE_ECDSA_SIGN MBEDTLS_SSL_CERT_TYPE_ECDSA_SIGN
+#define SSL_CERT_TYPE_RSA_SIGN MBEDTLS_SSL_CERT_TYPE_RSA_SIGN
+#define SSL_CHANNEL_INBOUND MBEDTLS_SSL_CHANNEL_INBOUND
+#define SSL_CHANNEL_OUTBOUND MBEDTLS_SSL_CHANNEL_OUTBOUND
+#define SSL_CIPHERSUITES MBEDTLS_SSL_CIPHERSUITES
+#define SSL_CLIENT_CERTIFICATE MBEDTLS_SSL_CLIENT_CERTIFICATE
+#define SSL_CLIENT_CHANGE_CIPHER_SPEC MBEDTLS_SSL_CLIENT_CHANGE_CIPHER_SPEC
+#define SSL_CLIENT_FINISHED MBEDTLS_SSL_CLIENT_FINISHED
+#define SSL_CLIENT_HELLO MBEDTLS_SSL_CLIENT_HELLO
+#define SSL_CLIENT_KEY_EXCHANGE MBEDTLS_SSL_CLIENT_KEY_EXCHANGE
+#define SSL_COMPRESSION_ADD MBEDTLS_SSL_COMPRESSION_ADD
+#define SSL_COMPRESS_DEFLATE MBEDTLS_SSL_COMPRESS_DEFLATE
+#define SSL_COMPRESS_NULL MBEDTLS_SSL_COMPRESS_NULL
+#define SSL_DEBUG_BUF MBEDTLS_SSL_DEBUG_BUF
+#define SSL_DEBUG_CRT MBEDTLS_SSL_DEBUG_CRT
+#define SSL_DEBUG_ECP MBEDTLS_SSL_DEBUG_ECP
+#define SSL_DEBUG_MPI MBEDTLS_SSL_DEBUG_MPI
+#define SSL_DEBUG_MSG MBEDTLS_SSL_DEBUG_MSG
+#define SSL_DEBUG_RET MBEDTLS_SSL_DEBUG_RET
+#define SSL_DEFAULT_TICKET_LIFETIME MBEDTLS_SSL_DEFAULT_TICKET_LIFETIME
+#define SSL_DTLS_TIMEOUT_DFL_MAX MBEDTLS_SSL_DTLS_TIMEOUT_DFL_MAX
+#define SSL_DTLS_TIMEOUT_DFL_MIN MBEDTLS_SSL_DTLS_TIMEOUT_DFL_MIN
+#define SSL_EMPTY_RENEGOTIATION_INFO MBEDTLS_SSL_EMPTY_RENEGOTIATION_INFO
+#define SSL_ETM_DISABLED MBEDTLS_SSL_ETM_DISABLED
+#define SSL_ETM_ENABLED MBEDTLS_SSL_ETM_ENABLED
+#define SSL_EXTENDED_MS_DISABLED MBEDTLS_SSL_EXTENDED_MS_DISABLED
+#define SSL_EXTENDED_MS_ENABLED MBEDTLS_SSL_EXTENDED_MS_ENABLED
+#define SSL_FALLBACK_SCSV MBEDTLS_SSL_FALLBACK_SCSV
+#define SSL_FLUSH_BUFFERS MBEDTLS_SSL_FLUSH_BUFFERS
+#define SSL_HANDSHAKE_OVER MBEDTLS_SSL_HANDSHAKE_OVER
+#define SSL_HANDSHAKE_WRAPUP MBEDTLS_SSL_HANDSHAKE_WRAPUP
+#define SSL_HASH_MD5 MBEDTLS_SSL_HASH_MD5
+#define SSL_HASH_NONE MBEDTLS_SSL_HASH_NONE
+#define SSL_HASH_SHA1 MBEDTLS_SSL_HASH_SHA1
+#define SSL_HASH_SHA224 MBEDTLS_SSL_HASH_SHA224
+#define SSL_HASH_SHA256 MBEDTLS_SSL_HASH_SHA256
+#define SSL_HASH_SHA384 MBEDTLS_SSL_HASH_SHA384
+#define SSL_HASH_SHA512 MBEDTLS_SSL_HASH_SHA512
+#define SSL_HELLO_REQUEST MBEDTLS_SSL_HELLO_REQUEST
+#define SSL_HS_CERTIFICATE MBEDTLS_SSL_HS_CERTIFICATE
+#define SSL_HS_CERTIFICATE_REQUEST MBEDTLS_SSL_HS_CERTIFICATE_REQUEST
+#define SSL_HS_CERTIFICATE_VERIFY MBEDTLS_SSL_HS_CERTIFICATE_VERIFY
+#define SSL_HS_CLIENT_HELLO MBEDTLS_SSL_HS_CLIENT_HELLO
+#define SSL_HS_CLIENT_KEY_EXCHANGE MBEDTLS_SSL_HS_CLIENT_KEY_EXCHANGE
+#define SSL_HS_FINISHED MBEDTLS_SSL_HS_FINISHED
+#define SSL_HS_HELLO_REQUEST MBEDTLS_SSL_HS_HELLO_REQUEST
+#define SSL_HS_HELLO_VERIFY_REQUEST MBEDTLS_SSL_HS_HELLO_VERIFY_REQUEST
+#define SSL_HS_NEW_SESSION_TICKET MBEDTLS_SSL_HS_NEW_SESSION_TICKET
+#define SSL_HS_SERVER_HELLO MBEDTLS_SSL_HS_SERVER_HELLO
+#define SSL_HS_SERVER_HELLO_DONE MBEDTLS_SSL_HS_SERVER_HELLO_DONE
+#define SSL_HS_SERVER_KEY_EXCHANGE MBEDTLS_SSL_HS_SERVER_KEY_EXCHANGE
+#define SSL_INITIAL_HANDSHAKE MBEDTLS_SSL_INITIAL_HANDSHAKE
+#define SSL_IS_CLIENT MBEDTLS_SSL_IS_CLIENT
+#define SSL_IS_FALLBACK MBEDTLS_SSL_IS_FALLBACK
+#define SSL_IS_NOT_FALLBACK MBEDTLS_SSL_IS_NOT_FALLBACK
+#define SSL_IS_SERVER MBEDTLS_SSL_IS_SERVER
+#define SSL_LEGACY_ALLOW_RENEGOTIATION MBEDTLS_SSL_LEGACY_ALLOW_RENEGOTIATION
+#define SSL_LEGACY_BREAK_HANDSHAKE MBEDTLS_SSL_LEGACY_BREAK_HANDSHAKE
+#define SSL_LEGACY_NO_RENEGOTIATION MBEDTLS_SSL_LEGACY_NO_RENEGOTIATION
+#define SSL_LEGACY_RENEGOTIATION MBEDTLS_SSL_LEGACY_RENEGOTIATION
+#define SSL_MAC_ADD MBEDTLS_SSL_MAC_ADD
+#define SSL_MAJOR_VERSION_3 MBEDTLS_SSL_MAJOR_VERSION_3
+#define SSL_MAX_CONTENT_LEN MBEDTLS_SSL_MAX_CONTENT_LEN
+#define SSL_MAX_FRAG_LEN_1024 MBEDTLS_SSL_MAX_FRAG_LEN_1024
+#define SSL_MAX_FRAG_LEN_2048 MBEDTLS_SSL_MAX_FRAG_LEN_2048
+#define SSL_MAX_FRAG_LEN_4096 MBEDTLS_SSL_MAX_FRAG_LEN_4096
+#define SSL_MAX_FRAG_LEN_512 MBEDTLS_SSL_MAX_FRAG_LEN_512
+#define SSL_MAX_FRAG_LEN_INVALID MBEDTLS_SSL_MAX_FRAG_LEN_INVALID
+#define SSL_MAX_FRAG_LEN_NONE MBEDTLS_SSL_MAX_FRAG_LEN_NONE
+#define SSL_MAX_MAJOR_VERSION MBEDTLS_SSL_MAX_MAJOR_VERSION
+#define SSL_MAX_MINOR_VERSION MBEDTLS_SSL_MAX_MINOR_VERSION
+#define SSL_MINOR_VERSION_0 MBEDTLS_SSL_MINOR_VERSION_0
+#define SSL_MINOR_VERSION_1 MBEDTLS_SSL_MINOR_VERSION_1
+#define SSL_MINOR_VERSION_2 MBEDTLS_SSL_MINOR_VERSION_2
+#define SSL_MINOR_VERSION_3 MBEDTLS_SSL_MINOR_VERSION_3
+#define SSL_MIN_MAJOR_VERSION MBEDTLS_SSL_MIN_MAJOR_VERSION
+#define SSL_MIN_MINOR_VERSION MBEDTLS_SSL_MIN_MINOR_VERSION
+#define SSL_MSG_ALERT MBEDTLS_SSL_MSG_ALERT
+#define SSL_MSG_APPLICATION_DATA MBEDTLS_SSL_MSG_APPLICATION_DATA
+#define SSL_MSG_CHANGE_CIPHER_SPEC MBEDTLS_SSL_MSG_CHANGE_CIPHER_SPEC
+#define SSL_MSG_HANDSHAKE MBEDTLS_SSL_MSG_HANDSHAKE
+#define SSL_PADDING_ADD MBEDTLS_SSL_PADDING_ADD
+#define SSL_RENEGOTIATION MBEDTLS_SSL_RENEGOTIATION
+#define SSL_RENEGOTIATION_DISABLED MBEDTLS_SSL_RENEGOTIATION_DISABLED
+#define SSL_RENEGOTIATION_DONE MBEDTLS_SSL_RENEGOTIATION_DONE
+#define SSL_RENEGOTIATION_ENABLED MBEDTLS_SSL_RENEGOTIATION_ENABLED
+#define SSL_RENEGOTIATION_NOT_ENFORCED MBEDTLS_SSL_RENEGOTIATION_NOT_ENFORCED
+#define SSL_RENEGOTIATION_PENDING MBEDTLS_SSL_RENEGOTIATION_PENDING
+#define SSL_RENEGO_MAX_RECORDS_DEFAULT MBEDTLS_SSL_RENEGO_MAX_RECORDS_DEFAULT
+#define SSL_RETRANS_FINISHED MBEDTLS_SSL_RETRANS_FINISHED
+#define SSL_RETRANS_PREPARING MBEDTLS_SSL_RETRANS_PREPARING
+#define SSL_RETRANS_SENDING MBEDTLS_SSL_RETRANS_SENDING
+#define SSL_RETRANS_WAITING MBEDTLS_SSL_RETRANS_WAITING
+#define SSL_SECURE_RENEGOTIATION MBEDTLS_SSL_SECURE_RENEGOTIATION
+#define SSL_SERVER_CERTIFICATE MBEDTLS_SSL_SERVER_CERTIFICATE
+#define SSL_SERVER_CHANGE_CIPHER_SPEC MBEDTLS_SSL_SERVER_CHANGE_CIPHER_SPEC
+#define SSL_SERVER_FINISHED MBEDTLS_SSL_SERVER_FINISHED
+#define SSL_SERVER_HELLO MBEDTLS_SSL_SERVER_HELLO
+#define SSL_SERVER_HELLO_DONE MBEDTLS_SSL_SERVER_HELLO_DONE
+#define SSL_SERVER_HELLO_VERIFY_REQUEST_SENT MBEDTLS_SSL_SERVER_HELLO_VERIFY_REQUEST_SENT
+#define SSL_SERVER_KEY_EXCHANGE MBEDTLS_SSL_SERVER_KEY_EXCHANGE
+#define SSL_SERVER_NEW_SESSION_TICKET MBEDTLS_SSL_SERVER_NEW_SESSION_TICKET
+#define SSL_SESSION_TICKETS_DISABLED MBEDTLS_SSL_SESSION_TICKETS_DISABLED
+#define SSL_SESSION_TICKETS_ENABLED MBEDTLS_SSL_SESSION_TICKETS_ENABLED
+#define SSL_SIG_ANON MBEDTLS_SSL_SIG_ANON
+#define SSL_SIG_ECDSA MBEDTLS_SSL_SIG_ECDSA
+#define SSL_SIG_RSA MBEDTLS_SSL_SIG_RSA
+#define SSL_TRANSPORT_DATAGRAM MBEDTLS_SSL_TRANSPORT_DATAGRAM
+#define SSL_TRANSPORT_STREAM MBEDTLS_SSL_TRANSPORT_STREAM
+#define SSL_TRUNCATED_HMAC_LEN MBEDTLS_SSL_TRUNCATED_HMAC_LEN
+#define SSL_TRUNC_HMAC_DISABLED MBEDTLS_SSL_TRUNC_HMAC_DISABLED
+#define SSL_TRUNC_HMAC_ENABLED MBEDTLS_SSL_TRUNC_HMAC_ENABLED
+#define SSL_VERIFY_DATA_MAX_LEN MBEDTLS_SSL_VERIFY_DATA_MAX_LEN
+#define SSL_VERIFY_NONE MBEDTLS_SSL_VERIFY_NONE
+#define SSL_VERIFY_OPTIONAL MBEDTLS_SSL_VERIFY_OPTIONAL
+#define SSL_VERIFY_REQUIRED MBEDTLS_SSL_VERIFY_REQUIRED
+#define TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA
+#define TLS_DHE_PSK_WITH_AES_128_CBC_SHA MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA
+#define TLS_DHE_PSK_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256
+#define TLS_DHE_PSK_WITH_AES_128_CCM MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CCM
+#define TLS_DHE_PSK_WITH_AES_128_CCM_8 MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CCM_8
+#define TLS_DHE_PSK_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256
+#define TLS_DHE_PSK_WITH_AES_256_CBC_SHA MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA
+#define TLS_DHE_PSK_WITH_AES_256_CBC_SHA384 MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384
+#define TLS_DHE_PSK_WITH_AES_256_CCM MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CCM
+#define TLS_DHE_PSK_WITH_AES_256_CCM_8 MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CCM_8
+#define TLS_DHE_PSK_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384
+#define TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+#define TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256
+#define TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+#define TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384
+#define TLS_DHE_PSK_WITH_NULL_SHA MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA
+#define TLS_DHE_PSK_WITH_NULL_SHA256 MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA256
+#define TLS_DHE_PSK_WITH_NULL_SHA384 MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA384
+#define TLS_DHE_PSK_WITH_RC4_128_SHA MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA
+#define TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA
+#define TLS_DHE_RSA_WITH_AES_128_CBC_SHA MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA
+#define TLS_DHE_RSA_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256
+#define TLS_DHE_RSA_WITH_AES_128_CCM MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CCM
+#define TLS_DHE_RSA_WITH_AES_128_CCM_8 MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CCM_8
+#define TLS_DHE_RSA_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256
+#define TLS_DHE_RSA_WITH_AES_256_CBC_SHA MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA
+#define TLS_DHE_RSA_WITH_AES_256_CBC_SHA256 MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256
+#define TLS_DHE_RSA_WITH_AES_256_CCM MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CCM
+#define TLS_DHE_RSA_WITH_AES_256_CCM_8 MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CCM_8
+#define TLS_DHE_RSA_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384
+#define TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA
+#define TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+#define TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+#define TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA
+#define TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256 MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256
+#define TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+#define TLS_DHE_RSA_WITH_DES_CBC_SHA MBEDTLS_TLS_DHE_RSA_WITH_DES_CBC_SHA
+#define TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA
+#define TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA
+#define TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256
+#define TLS_ECDHE_ECDSA_WITH_AES_128_CCM MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CCM
+#define TLS_ECDHE_ECDSA_WITH_AES_128_CCM_8 MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CCM_8
+#define TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
+#define TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA
+#define TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384 MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384
+#define TLS_ECDHE_ECDSA_WITH_AES_256_CCM MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CCM
+#define TLS_ECDHE_ECDSA_WITH_AES_256_CCM_8 MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CCM_8
+#define TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
+#define TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+#define TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+#define TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+#define TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+#define TLS_ECDHE_ECDSA_WITH_NULL_SHA MBEDTLS_TLS_ECDHE_ECDSA_WITH_NULL_SHA
+#define TLS_ECDHE_ECDSA_WITH_RC4_128_SHA MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA
+#define TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA
+#define TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA
+#define TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256
+#define TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA
+#define TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384 MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384
+#define TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+#define TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+#define TLS_ECDHE_PSK_WITH_NULL_SHA MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA
+#define TLS_ECDHE_PSK_WITH_NULL_SHA256 MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA256
+#define TLS_ECDHE_PSK_WITH_NULL_SHA384 MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA384
+#define TLS_ECDHE_PSK_WITH_RC4_128_SHA MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA
+#define TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA
+#define TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA
+#define TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256
+#define TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256
+#define TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA
+#define TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384 MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384
+#define TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384
+#define TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+#define TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+#define TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384 MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384
+#define TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+#define TLS_ECDHE_RSA_WITH_NULL_SHA MBEDTLS_TLS_ECDHE_RSA_WITH_NULL_SHA
+#define TLS_ECDHE_RSA_WITH_RC4_128_SHA MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA
+#define TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA
+#define TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA
+#define TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256
+#define TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256
+#define TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA
+#define TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384 MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384
+#define TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384
+#define TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+#define TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+#define TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+#define TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+#define TLS_ECDH_ECDSA_WITH_NULL_SHA MBEDTLS_TLS_ECDH_ECDSA_WITH_NULL_SHA
+#define TLS_ECDH_ECDSA_WITH_RC4_128_SHA MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA
+#define TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA
+#define TLS_ECDH_RSA_WITH_AES_128_CBC_SHA MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA
+#define TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256
+#define TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256
+#define TLS_ECDH_RSA_WITH_AES_256_CBC_SHA MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA
+#define TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384 MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384
+#define TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384
+#define TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256
+#define TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256
+#define TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384 MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384
+#define TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384
+#define TLS_ECDH_RSA_WITH_NULL_SHA MBEDTLS_TLS_ECDH_RSA_WITH_NULL_SHA
+#define TLS_ECDH_RSA_WITH_RC4_128_SHA MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA
+#define TLS_EXT_ALPN MBEDTLS_TLS_EXT_ALPN
+#define TLS_EXT_ENCRYPT_THEN_MAC MBEDTLS_TLS_EXT_ENCRYPT_THEN_MAC
+#define TLS_EXT_EXTENDED_MASTER_SECRET MBEDTLS_TLS_EXT_EXTENDED_MASTER_SECRET
+#define TLS_EXT_MAX_FRAGMENT_LENGTH MBEDTLS_TLS_EXT_MAX_FRAGMENT_LENGTH
+#define TLS_EXT_RENEGOTIATION_INFO MBEDTLS_TLS_EXT_RENEGOTIATION_INFO
+#define TLS_EXT_SERVERNAME MBEDTLS_TLS_EXT_SERVERNAME
+#define TLS_EXT_SERVERNAME_HOSTNAME MBEDTLS_TLS_EXT_SERVERNAME_HOSTNAME
+#define TLS_EXT_SESSION_TICKET MBEDTLS_TLS_EXT_SESSION_TICKET
+#define TLS_EXT_SIG_ALG MBEDTLS_TLS_EXT_SIG_ALG
+#define TLS_EXT_SUPPORTED_ELLIPTIC_CURVES MBEDTLS_TLS_EXT_SUPPORTED_ELLIPTIC_CURVES
+#define TLS_EXT_SUPPORTED_POINT_FORMATS MBEDTLS_TLS_EXT_SUPPORTED_POINT_FORMATS
+#define TLS_EXT_SUPPORTED_POINT_FORMATS_PRESENT MBEDTLS_TLS_EXT_SUPPORTED_POINT_FORMATS_PRESENT
+#define TLS_EXT_TRUNCATED_HMAC MBEDTLS_TLS_EXT_TRUNCATED_HMAC
+#define TLS_PSK_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA
+#define TLS_PSK_WITH_AES_128_CBC_SHA MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA
+#define TLS_PSK_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256
+#define TLS_PSK_WITH_AES_128_CCM MBEDTLS_TLS_PSK_WITH_AES_128_CCM
+#define TLS_PSK_WITH_AES_128_CCM_8 MBEDTLS_TLS_PSK_WITH_AES_128_CCM_8
+#define TLS_PSK_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256
+#define TLS_PSK_WITH_AES_256_CBC_SHA MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA
+#define TLS_PSK_WITH_AES_256_CBC_SHA384 MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384
+#define TLS_PSK_WITH_AES_256_CCM MBEDTLS_TLS_PSK_WITH_AES_256_CCM
+#define TLS_PSK_WITH_AES_256_CCM_8 MBEDTLS_TLS_PSK_WITH_AES_256_CCM_8
+#define TLS_PSK_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384
+#define TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256
+#define TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256
+#define TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384 MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384
+#define TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384
+#define TLS_PSK_WITH_NULL_SHA MBEDTLS_TLS_PSK_WITH_NULL_SHA
+#define TLS_PSK_WITH_NULL_SHA256 MBEDTLS_TLS_PSK_WITH_NULL_SHA256
+#define TLS_PSK_WITH_NULL_SHA384 MBEDTLS_TLS_PSK_WITH_NULL_SHA384
+#define TLS_PSK_WITH_RC4_128_SHA MBEDTLS_TLS_PSK_WITH_RC4_128_SHA
+#define TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA
+#define TLS_RSA_PSK_WITH_AES_128_CBC_SHA MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA
+#define TLS_RSA_PSK_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256
+#define TLS_RSA_PSK_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256
+#define TLS_RSA_PSK_WITH_AES_256_CBC_SHA MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA
+#define TLS_RSA_PSK_WITH_AES_256_CBC_SHA384 MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384
+#define TLS_RSA_PSK_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384
+#define TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256
+#define TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256
+#define TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384 MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384
+#define TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384
+#define TLS_RSA_PSK_WITH_NULL_SHA MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA
+#define TLS_RSA_PSK_WITH_NULL_SHA256 MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA256
+#define TLS_RSA_PSK_WITH_NULL_SHA384 MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA384
+#define TLS_RSA_PSK_WITH_RC4_128_SHA MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA
+#define TLS_RSA_WITH_3DES_EDE_CBC_SHA MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA
+#define TLS_RSA_WITH_AES_128_CBC_SHA MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA
+#define TLS_RSA_WITH_AES_128_CBC_SHA256 MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256
+#define TLS_RSA_WITH_AES_128_CCM MBEDTLS_TLS_RSA_WITH_AES_128_CCM
+#define TLS_RSA_WITH_AES_128_CCM_8 MBEDTLS_TLS_RSA_WITH_AES_128_CCM_8
+#define TLS_RSA_WITH_AES_128_GCM_SHA256 MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256
+#define TLS_RSA_WITH_AES_256_CBC_SHA MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA
+#define TLS_RSA_WITH_AES_256_CBC_SHA256 MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256
+#define TLS_RSA_WITH_AES_256_CCM MBEDTLS_TLS_RSA_WITH_AES_256_CCM
+#define TLS_RSA_WITH_AES_256_CCM_8 MBEDTLS_TLS_RSA_WITH_AES_256_CCM_8
+#define TLS_RSA_WITH_AES_256_GCM_SHA384 MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384
+#define TLS_RSA_WITH_CAMELLIA_128_CBC_SHA MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA
+#define TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256 MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256
+#define TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256 MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256
+#define TLS_RSA_WITH_CAMELLIA_256_CBC_SHA MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA
+#define TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256 MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256
+#define TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384 MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384
+#define TLS_RSA_WITH_DES_CBC_SHA MBEDTLS_TLS_RSA_WITH_DES_CBC_SHA
+#define TLS_RSA_WITH_NULL_MD5 MBEDTLS_TLS_RSA_WITH_NULL_MD5
+#define TLS_RSA_WITH_NULL_SHA MBEDTLS_TLS_RSA_WITH_NULL_SHA
+#define TLS_RSA_WITH_NULL_SHA256 MBEDTLS_TLS_RSA_WITH_NULL_SHA256
+#define TLS_RSA_WITH_RC4_128_MD5 MBEDTLS_TLS_RSA_WITH_RC4_128_MD5
+#define TLS_RSA_WITH_RC4_128_SHA MBEDTLS_TLS_RSA_WITH_RC4_128_SHA
+#define X509_CRT_VERSION_1 MBEDTLS_X509_CRT_VERSION_1
+#define X509_CRT_VERSION_2 MBEDTLS_X509_CRT_VERSION_2
+#define X509_CRT_VERSION_3 MBEDTLS_X509_CRT_VERSION_3
+#define X509_FORMAT_DER MBEDTLS_X509_FORMAT_DER
+#define X509_FORMAT_PEM MBEDTLS_X509_FORMAT_PEM
+#define X509_MAX_DN_NAME_SIZE MBEDTLS_X509_MAX_DN_NAME_SIZE
+#define X509_RFC5280_MAX_SERIAL_LEN MBEDTLS_X509_RFC5280_MAX_SERIAL_LEN
+#define X509_RFC5280_UTC_TIME_LEN MBEDTLS_X509_RFC5280_UTC_TIME_LEN
+#define XTEA_DECRYPT MBEDTLS_XTEA_DECRYPT
+#define XTEA_ENCRYPT MBEDTLS_XTEA_ENCRYPT
+#define _asn1_bitstring mbedtls_asn1_bitstring
+#define _asn1_buf mbedtls_asn1_buf
+#define _asn1_named_data mbedtls_asn1_named_data
+#define _asn1_sequence mbedtls_asn1_sequence
+#define _ssl_cache_context mbedtls_ssl_cache_context
+#define _ssl_cache_entry mbedtls_ssl_cache_entry
+#define _ssl_ciphersuite_t mbedtls_ssl_ciphersuite_t
+#define _ssl_context mbedtls_ssl_context
+#define _ssl_flight_item mbedtls_ssl_flight_item
+#define _ssl_handshake_params mbedtls_ssl_handshake_params
+#define _ssl_key_cert mbedtls_ssl_key_cert
+#define _ssl_premaster_secret mbedtls_ssl_premaster_secret
+#define _ssl_session mbedtls_ssl_session
+#define _ssl_transform mbedtls_ssl_transform
+#define _x509_crl mbedtls_x509_crl
+#define _x509_crl_entry mbedtls_x509_crl_entry
+#define _x509_crt mbedtls_x509_crt
+#define _x509_csr mbedtls_x509_csr
+#define _x509_time mbedtls_x509_time
+#define _x509write_cert mbedtls_x509write_cert
+#define _x509write_csr mbedtls_x509write_csr
+#define aes_context mbedtls_aes_context
+#define aes_crypt_cbc mbedtls_aes_crypt_cbc
+#define aes_crypt_cfb128 mbedtls_aes_crypt_cfb128
+#define aes_crypt_cfb8 mbedtls_aes_crypt_cfb8
+#define aes_crypt_ctr mbedtls_aes_crypt_ctr
+#define aes_crypt_ecb mbedtls_aes_crypt_ecb
+#define aes_free mbedtls_aes_free
+#define aes_init mbedtls_aes_init
+#define aes_self_test mbedtls_aes_self_test
+#define aes_setkey_dec mbedtls_aes_setkey_dec
+#define aes_setkey_enc mbedtls_aes_setkey_enc
+#define aesni_crypt_ecb mbedtls_aesni_crypt_ecb
+#define aesni_gcm_mult mbedtls_aesni_gcm_mult
+#define aesni_inverse_key mbedtls_aesni_inverse_key
+#define aesni_setkey_enc mbedtls_aesni_setkey_enc
+#define aesni_supports mbedtls_aesni_has_support
+#define alarmed mbedtls_timing_alarmed
+#define arc4_context mbedtls_arc4_context
+#define arc4_crypt mbedtls_arc4_crypt
+#define arc4_free mbedtls_arc4_free
+#define arc4_init mbedtls_arc4_init
+#define arc4_self_test mbedtls_arc4_self_test
+#define arc4_setup mbedtls_arc4_setup
+#define asn1_bitstring mbedtls_asn1_bitstring
+#define asn1_buf mbedtls_asn1_buf
+#define asn1_find_named_data mbedtls_asn1_find_named_data
+#define asn1_free_named_data mbedtls_asn1_free_named_data
+#define asn1_free_named_data_list mbedtls_asn1_free_named_data_list
+#define asn1_get_alg mbedtls_asn1_get_alg
+#define asn1_get_alg_null mbedtls_asn1_get_alg_null
+#define asn1_get_bitstring mbedtls_asn1_get_bitstring
+#define asn1_get_bitstring_null mbedtls_asn1_get_bitstring_null
+#define asn1_get_bool mbedtls_asn1_get_bool
+#define asn1_get_int mbedtls_asn1_get_int
+#define asn1_get_len mbedtls_asn1_get_len
+#define asn1_get_mpi mbedtls_asn1_get_mpi
+#define asn1_get_sequence_of mbedtls_asn1_get_sequence_of
+#define asn1_get_tag mbedtls_asn1_get_tag
+#define asn1_named_data mbedtls_asn1_named_data
+#define asn1_sequence mbedtls_asn1_sequence
+#define asn1_store_named_data mbedtls_asn1_store_named_data
+#define asn1_write_algorithm_identifier mbedtls_asn1_write_algorithm_identifier
+#define asn1_write_bitstring mbedtls_asn1_write_bitstring
+#define asn1_write_bool mbedtls_asn1_write_bool
+#define asn1_write_ia5_string mbedtls_asn1_write_ia5_string
+#define asn1_write_int mbedtls_asn1_write_int
+#define asn1_write_len mbedtls_asn1_write_len
+#define asn1_write_mpi mbedtls_asn1_write_mpi
+#define asn1_write_null mbedtls_asn1_write_null
+#define asn1_write_octet_string mbedtls_asn1_write_octet_string
+#define asn1_write_oid mbedtls_asn1_write_oid
+#define asn1_write_printable_string mbedtls_asn1_write_printable_string
+#define asn1_write_raw_buffer mbedtls_asn1_write_raw_buffer
+#define asn1_write_tag mbedtls_asn1_write_tag
+#define base64_decode mbedtls_base64_decode
+#define base64_encode mbedtls_base64_encode
+#define base64_self_test mbedtls_base64_self_test
+#define blowfish_context mbedtls_blowfish_context
+#define blowfish_crypt_cbc mbedtls_blowfish_crypt_cbc
+#define blowfish_crypt_cfb64 mbedtls_blowfish_crypt_cfb64
+#define blowfish_crypt_ctr mbedtls_blowfish_crypt_ctr
+#define blowfish_crypt_ecb mbedtls_blowfish_crypt_ecb
+#define blowfish_free mbedtls_blowfish_free
+#define blowfish_init mbedtls_blowfish_init
+#define blowfish_setkey mbedtls_blowfish_setkey
+#define camellia_context mbedtls_camellia_context
+#define camellia_crypt_cbc mbedtls_camellia_crypt_cbc
+#define camellia_crypt_cfb128 mbedtls_camellia_crypt_cfb128
+#define camellia_crypt_ctr mbedtls_camellia_crypt_ctr
+#define camellia_crypt_ecb mbedtls_camellia_crypt_ecb
+#define camellia_free mbedtls_camellia_free
+#define camellia_init mbedtls_camellia_init
+#define camellia_self_test mbedtls_camellia_self_test
+#define camellia_setkey_dec mbedtls_camellia_setkey_dec
+#define camellia_setkey_enc mbedtls_camellia_setkey_enc
+#define ccm_auth_decrypt mbedtls_ccm_auth_decrypt
+#define ccm_context mbedtls_ccm_context
+#define ccm_encrypt_and_tag mbedtls_ccm_encrypt_and_tag
+#define ccm_free mbedtls_ccm_free
+#define ccm_init mbedtls_ccm_init
+#define ccm_self_test mbedtls_ccm_self_test
+#define cipher_auth_decrypt mbedtls_cipher_auth_decrypt
+#define cipher_auth_encrypt mbedtls_cipher_auth_encrypt
+#define cipher_base_t mbedtls_cipher_base_t
+#define cipher_check_tag mbedtls_cipher_check_tag
+#define cipher_context_t mbedtls_cipher_context_t
+#define cipher_crypt mbedtls_cipher_crypt
+#define cipher_definition_t mbedtls_cipher_definition_t
+#define cipher_definitions mbedtls_cipher_definitions
+#define cipher_finish mbedtls_cipher_finish
+#define cipher_free mbedtls_cipher_free
+#define cipher_get_block_size mbedtls_cipher_get_block_size
+#define cipher_get_cipher_mode mbedtls_cipher_get_cipher_mode
+#define cipher_get_iv_size mbedtls_cipher_get_iv_size
+#define cipher_get_key_size mbedtls_cipher_get_key_bitlen
+#define cipher_get_name mbedtls_cipher_get_name
+#define cipher_get_operation mbedtls_cipher_get_operation
+#define cipher_get_type mbedtls_cipher_get_type
+#define cipher_id_t mbedtls_cipher_id_t
+#define cipher_info_from_string mbedtls_cipher_info_from_string
+#define cipher_info_from_type mbedtls_cipher_info_from_type
+#define cipher_info_from_values mbedtls_cipher_info_from_values
+#define cipher_info_t mbedtls_cipher_info_t
+#define cipher_init mbedtls_cipher_init
+#define cipher_init_ctx mbedtls_cipher_setup
+#define cipher_list mbedtls_cipher_list
+#define cipher_mode_t mbedtls_cipher_mode_t
+#define cipher_padding_t mbedtls_cipher_padding_t
+#define cipher_reset mbedtls_cipher_reset
+#define cipher_set_iv mbedtls_cipher_set_iv
+#define cipher_set_padding_mode mbedtls_cipher_set_padding_mode
+#define cipher_setkey mbedtls_cipher_setkey
+#define cipher_type_t mbedtls_cipher_type_t
+#define cipher_update mbedtls_cipher_update
+#define cipher_update_ad mbedtls_cipher_update_ad
+#define cipher_write_tag mbedtls_cipher_write_tag
+#define ctr_drbg_context mbedtls_ctr_drbg_context
+#define ctr_drbg_free mbedtls_ctr_drbg_free
+#define ctr_drbg_init mbedtls_ctr_drbg_init
+#define ctr_drbg_random mbedtls_ctr_drbg_random
+#define ctr_drbg_random_with_add mbedtls_ctr_drbg_random_with_add
+#define ctr_drbg_reseed mbedtls_ctr_drbg_reseed
+#define ctr_drbg_self_test mbedtls_ctr_drbg_self_test
+#define ctr_drbg_set_entropy_len mbedtls_ctr_drbg_set_entropy_len
+#define ctr_drbg_set_prediction_resistance mbedtls_ctr_drbg_set_prediction_resistance
+#define ctr_drbg_set_reseed_interval mbedtls_ctr_drbg_set_reseed_interval
+#define ctr_drbg_update mbedtls_ctr_drbg_update
+#define ctr_drbg_update_seed_file mbedtls_ctr_drbg_update_seed_file
+#define ctr_drbg_write_seed_file mbedtls_ctr_drbg_write_seed_file
+#define debug_print_buf mbedtls_debug_print_buf
+#define debug_print_crt mbedtls_debug_print_crt
+#define debug_print_ecp mbedtls_debug_print_ecp
+#define debug_print_mpi mbedtls_debug_print_mpi
+#define debug_print_msg mbedtls_debug_print_msg
+#define debug_print_ret mbedtls_debug_print_ret
+#define debug_set_threshold mbedtls_debug_set_threshold
+#define des3_context mbedtls_des3_context
+#define des3_crypt_cbc mbedtls_des3_crypt_cbc
+#define des3_crypt_ecb mbedtls_des3_crypt_ecb
+#define des3_free mbedtls_des3_free
+#define des3_init mbedtls_des3_init
+#define des3_set2key_dec mbedtls_des3_set2key_dec
+#define des3_set2key_enc mbedtls_des3_set2key_enc
+#define des3_set3key_dec mbedtls_des3_set3key_dec
+#define des3_set3key_enc mbedtls_des3_set3key_enc
+#define des_context mbedtls_des_context
+#define des_crypt_cbc mbedtls_des_crypt_cbc
+#define des_crypt_ecb mbedtls_des_crypt_ecb
+#define des_free mbedtls_des_free
+#define des_init mbedtls_des_init
+#define des_key_check_key_parity mbedtls_des_key_check_key_parity
+#define des_key_check_weak mbedtls_des_key_check_weak
+#define des_key_set_parity mbedtls_des_key_set_parity
+#define des_self_test mbedtls_des_self_test
+#define des_setkey_dec mbedtls_des_setkey_dec
+#define des_setkey_enc mbedtls_des_setkey_enc
+#define dhm_calc_secret mbedtls_dhm_calc_secret
+#define dhm_context mbedtls_dhm_context
+#define dhm_free mbedtls_dhm_free
+#define dhm_init mbedtls_dhm_init
+#define dhm_make_params mbedtls_dhm_make_params
+#define dhm_make_public mbedtls_dhm_make_public
+#define dhm_parse_dhm mbedtls_dhm_parse_dhm
+#define dhm_parse_dhmfile mbedtls_dhm_parse_dhmfile
+#define dhm_read_params mbedtls_dhm_read_params
+#define dhm_read_public mbedtls_dhm_read_public
+#define dhm_self_test mbedtls_dhm_self_test
+#define ecdh_calc_secret mbedtls_ecdh_calc_secret
+#define ecdh_compute_shared mbedtls_ecdh_compute_shared
+#define ecdh_context mbedtls_ecdh_context
+#define ecdh_free mbedtls_ecdh_free
+#define ecdh_gen_public mbedtls_ecdh_gen_public
+#define ecdh_get_params mbedtls_ecdh_get_params
+#define ecdh_init mbedtls_ecdh_init
+#define ecdh_make_params mbedtls_ecdh_make_params
+#define ecdh_make_public mbedtls_ecdh_make_public
+#define ecdh_read_params mbedtls_ecdh_read_params
+#define ecdh_read_public mbedtls_ecdh_read_public
+#define ecdh_side mbedtls_ecdh_side
+#define ecdsa_context mbedtls_ecdsa_context
+#define ecdsa_free mbedtls_ecdsa_free
+#define ecdsa_from_keypair mbedtls_ecdsa_from_keypair
+#define ecdsa_genkey mbedtls_ecdsa_genkey
+#define ecdsa_info mbedtls_ecdsa_info
+#define ecdsa_init mbedtls_ecdsa_init
+#define ecdsa_read_signature mbedtls_ecdsa_read_signature
+#define ecdsa_sign mbedtls_ecdsa_sign
+#define ecdsa_sign_det mbedtls_ecdsa_sign_det
+#define ecdsa_verify mbedtls_ecdsa_verify
+#define ecdsa_write_signature mbedtls_ecdsa_write_signature
+#define ecdsa_write_signature_det mbedtls_ecdsa_write_signature_det
+#define eckey_info mbedtls_eckey_info
+#define eckeydh_info mbedtls_eckeydh_info
+#define ecp_check_privkey mbedtls_ecp_check_privkey
+#define ecp_check_pub_priv mbedtls_ecp_check_pub_priv
+#define ecp_check_pubkey mbedtls_ecp_check_pubkey
+#define ecp_copy mbedtls_ecp_copy
+#define ecp_curve_info mbedtls_ecp_curve_info
+#define ecp_curve_info_from_grp_id mbedtls_ecp_curve_info_from_grp_id
+#define ecp_curve_info_from_name mbedtls_ecp_curve_info_from_name
+#define ecp_curve_info_from_tls_id mbedtls_ecp_curve_info_from_tls_id
+#define ecp_curve_list mbedtls_ecp_curve_list
+#define ecp_gen_key mbedtls_ecp_gen_key
+#define ecp_gen_keypair mbedtls_ecp_gen_keypair
+#define ecp_group mbedtls_ecp_group
+#define ecp_group_copy mbedtls_ecp_group_copy
+#define ecp_group_free mbedtls_ecp_group_free
+#define ecp_group_id mbedtls_ecp_group_id
+#define ecp_group_init mbedtls_ecp_group_init
+#define ecp_grp_id_list mbedtls_ecp_grp_id_list
+#define ecp_is_zero mbedtls_ecp_is_zero
+#define ecp_keypair mbedtls_ecp_keypair
+#define ecp_keypair_free mbedtls_ecp_keypair_free
+#define ecp_keypair_init mbedtls_ecp_keypair_init
+#define ecp_mul mbedtls_ecp_mul
+#define ecp_point mbedtls_ecp_point
+#define ecp_point_free mbedtls_ecp_point_free
+#define ecp_point_init mbedtls_ecp_point_init
+#define ecp_point_read_binary mbedtls_ecp_point_read_binary
+#define ecp_point_read_string mbedtls_ecp_point_read_string
+#define ecp_point_write_binary mbedtls_ecp_point_write_binary
+#define ecp_self_test mbedtls_ecp_self_test
+#define ecp_set_zero mbedtls_ecp_set_zero
+#define ecp_tls_read_group mbedtls_ecp_tls_read_group
+#define ecp_tls_read_point mbedtls_ecp_tls_read_point
+#define ecp_tls_write_group mbedtls_ecp_tls_write_group
+#define ecp_tls_write_point mbedtls_ecp_tls_write_point
+#define ecp_use_known_dp mbedtls_ecp_group_load
+#define entropy_add_source mbedtls_entropy_add_source
+#define entropy_context mbedtls_entropy_context
+#define entropy_free mbedtls_entropy_free
+#define entropy_func mbedtls_entropy_func
+#define entropy_gather mbedtls_entropy_gather
+#define entropy_init mbedtls_entropy_init
+#define entropy_self_test mbedtls_entropy_self_test
+#define entropy_update_manual mbedtls_entropy_update_manual
+#define entropy_update_seed_file mbedtls_entropy_update_seed_file
+#define entropy_write_seed_file mbedtls_entropy_write_seed_file
+#define error_strerror mbedtls_strerror
+#define f_source_ptr mbedtls_entropy_f_source_ptr
+#define gcm_auth_decrypt mbedtls_gcm_auth_decrypt
+#define gcm_context mbedtls_gcm_context
+#define gcm_crypt_and_tag mbedtls_gcm_crypt_and_tag
+#define gcm_finish mbedtls_gcm_finish
+#define gcm_free mbedtls_gcm_free
+#define gcm_init mbedtls_gcm_init
+#define gcm_self_test mbedtls_gcm_self_test
+#define gcm_starts mbedtls_gcm_starts
+#define gcm_update mbedtls_gcm_update
+#define get_timer mbedtls_timing_get_timer
+#define hardclock mbedtls_timing_hardclock
+#define hardclock_poll mbedtls_hardclock_poll
+#define havege_free mbedtls_havege_free
+#define havege_init mbedtls_havege_init
+#define havege_poll mbedtls_havege_poll
+#define havege_random mbedtls_havege_random
+#define havege_state mbedtls_havege_state
+#define hmac_drbg_context mbedtls_hmac_drbg_context
+#define hmac_drbg_free mbedtls_hmac_drbg_free
+#define hmac_drbg_init mbedtls_hmac_drbg_init
+#define hmac_drbg_random mbedtls_hmac_drbg_random
+#define hmac_drbg_random_with_add mbedtls_hmac_drbg_random_with_add
+#define hmac_drbg_reseed mbedtls_hmac_drbg_reseed
+#define hmac_drbg_self_test mbedtls_hmac_drbg_self_test
+#define hmac_drbg_set_entropy_len mbedtls_hmac_drbg_set_entropy_len
+#define hmac_drbg_set_prediction_resistance mbedtls_hmac_drbg_set_prediction_resistance
+#define hmac_drbg_set_reseed_interval mbedtls_hmac_drbg_set_reseed_interval
+#define hmac_drbg_update mbedtls_hmac_drbg_update
+#define hmac_drbg_update_seed_file mbedtls_hmac_drbg_update_seed_file
+#define hmac_drbg_write_seed_file mbedtls_hmac_drbg_write_seed_file
+#define hr_time mbedtls_timing_hr_time
+#define key_exchange_type_t mbedtls_key_exchange_type_t
+#define md mbedtls_md
+#define md2 mbedtls_md2
+#define md2_context mbedtls_md2_context
+#define md2_finish mbedtls_md2_finish
+#define md2_free mbedtls_md2_free
+#define md2_info mbedtls_md2_info
+#define md2_init mbedtls_md2_init
+#define md2_process mbedtls_md2_process
+#define md2_self_test mbedtls_md2_self_test
+#define md2_starts mbedtls_md2_starts
+#define md2_update mbedtls_md2_update
+#define md4 mbedtls_md4
+#define md4_context mbedtls_md4_context
+#define md4_finish mbedtls_md4_finish
+#define md4_free mbedtls_md4_free
+#define md4_info mbedtls_md4_info
+#define md4_init mbedtls_md4_init
+#define md4_process mbedtls_md4_process
+#define md4_self_test mbedtls_md4_self_test
+#define md4_starts mbedtls_md4_starts
+#define md4_update mbedtls_md4_update
+#define md5 mbedtls_md5
+#define md5_context mbedtls_md5_context
+#define md5_finish mbedtls_md5_finish
+#define md5_free mbedtls_md5_free
+#define md5_info mbedtls_md5_info
+#define md5_init mbedtls_md5_init
+#define md5_process mbedtls_md5_process
+#define md5_self_test mbedtls_md5_self_test
+#define md5_starts mbedtls_md5_starts
+#define md5_update mbedtls_md5_update
+#define md_context_t mbedtls_md_context_t
+#define md_file mbedtls_md_file
+#define md_finish mbedtls_md_finish
+#define md_free mbedtls_md_free
+#define md_get_name mbedtls_md_get_name
+#define md_get_size mbedtls_md_get_size
+#define md_get_type mbedtls_md_get_type
+#define md_hmac mbedtls_md_hmac
+#define md_hmac_finish mbedtls_md_hmac_finish
+#define md_hmac_reset mbedtls_md_hmac_reset
+#define md_hmac_starts mbedtls_md_hmac_starts
+#define md_hmac_update mbedtls_md_hmac_update
+#define md_info_from_string mbedtls_md_info_from_string
+#define md_info_from_type mbedtls_md_info_from_type
+#define md_info_t mbedtls_md_info_t
+#define md_init mbedtls_md_init
+#define md_init_ctx mbedtls_md_init_ctx
+#define md_list mbedtls_md_list
+#define md_process mbedtls_md_process
+#define md_starts mbedtls_md_starts
+#define md_type_t mbedtls_md_type_t
+#define md_update mbedtls_md_update
+#define memory_buffer_alloc_cur_get mbedtls_memory_buffer_alloc_cur_get
+#define memory_buffer_alloc_free mbedtls_memory_buffer_alloc_free
+#define memory_buffer_alloc_init mbedtls_memory_buffer_alloc_init
+#define memory_buffer_alloc_max_get mbedtls_memory_buffer_alloc_max_get
+#define memory_buffer_alloc_max_reset mbedtls_memory_buffer_alloc_max_reset
+#define memory_buffer_alloc_self_test mbedtls_memory_buffer_alloc_self_test
+#define memory_buffer_alloc_status mbedtls_memory_buffer_alloc_status
+#define memory_buffer_alloc_verify mbedtls_memory_buffer_alloc_verify
+#define memory_buffer_set_verify mbedtls_memory_buffer_set_verify
+#define mpi mbedtls_mpi
+#define mpi_add_abs mbedtls_mpi_add_abs
+#define mpi_add_int mbedtls_mpi_add_int
+#define mpi_add_mpi mbedtls_mpi_add_mpi
+#define mpi_cmp_abs mbedtls_mpi_cmp_abs
+#define mpi_cmp_int mbedtls_mpi_cmp_int
+#define mpi_cmp_mpi mbedtls_mpi_cmp_mpi
+#define mpi_copy mbedtls_mpi_copy
+#define mpi_div_int mbedtls_mpi_div_int
+#define mpi_div_mpi mbedtls_mpi_div_mpi
+#define mpi_exp_mod mbedtls_mpi_exp_mod
+#define mpi_fill_random mbedtls_mpi_fill_random
+#define mpi_free mbedtls_mpi_free
+#define mpi_gcd mbedtls_mpi_gcd
+#define mpi_gen_prime mbedtls_mpi_gen_prime
+#define mpi_get_bit mbedtls_mpi_get_bit
+#define mpi_grow mbedtls_mpi_grow
+#define mpi_init mbedtls_mpi_init
+#define mpi_inv_mod mbedtls_mpi_inv_mod
+#define mpi_is_prime mbedtls_mpi_is_prime
+#define mpi_lsb mbedtls_mpi_lsb
+#define mpi_lset mbedtls_mpi_lset
+#define mpi_mod_int mbedtls_mpi_mod_int
+#define mpi_mod_mpi mbedtls_mpi_mod_mpi
+#define mpi_msb mbedtls_mpi_bitlen
+#define mpi_mul_int mbedtls_mpi_mul_int
+#define mpi_mul_mpi mbedtls_mpi_mul_mpi
+#define mpi_read_binary mbedtls_mpi_read_binary
+#define mpi_read_file mbedtls_mpi_read_file
+#define mpi_read_string mbedtls_mpi_read_string
+#define mpi_safe_cond_assign mbedtls_mpi_safe_cond_assign
+#define mpi_safe_cond_swap mbedtls_mpi_safe_cond_swap
+#define mpi_self_test mbedtls_mpi_self_test
+#define mpi_set_bit mbedtls_mpi_set_bit
+#define mpi_shift_l mbedtls_mpi_shift_l
+#define mpi_shift_r mbedtls_mpi_shift_r
+#define mpi_shrink mbedtls_mpi_shrink
+#define mpi_size mbedtls_mpi_size
+#define mpi_sub_abs mbedtls_mpi_sub_abs
+#define mpi_sub_int mbedtls_mpi_sub_int
+#define mpi_sub_mpi mbedtls_mpi_sub_mpi
+#define mpi_swap mbedtls_mpi_swap
+#define mpi_write_binary mbedtls_mpi_write_binary
+#define mpi_write_file mbedtls_mpi_write_file
+#define mpi_write_string mbedtls_mpi_write_string
+#define net_accept mbedtls_net_accept
+#define net_bind mbedtls_net_bind
+#define net_close mbedtls_net_free
+#define net_connect mbedtls_net_connect
+#define net_recv mbedtls_net_recv
+#define net_recv_timeout mbedtls_net_recv_timeout
+#define net_send mbedtls_net_send
+#define net_set_block mbedtls_net_set_block
+#define net_set_nonblock mbedtls_net_set_nonblock
+#define net_usleep mbedtls_net_usleep
+#define oid_descriptor_t mbedtls_oid_descriptor_t
+#define oid_get_attr_short_name mbedtls_oid_get_attr_short_name
+#define oid_get_cipher_alg mbedtls_oid_get_cipher_alg
+#define oid_get_ec_grp mbedtls_oid_get_ec_grp
+#define oid_get_extended_key_usage mbedtls_oid_get_extended_key_usage
+#define oid_get_md_alg mbedtls_oid_get_md_alg
+#define oid_get_numeric_string mbedtls_oid_get_numeric_string
+#define oid_get_oid_by_ec_grp mbedtls_oid_get_oid_by_ec_grp
+#define oid_get_oid_by_md mbedtls_oid_get_oid_by_md
+#define oid_get_oid_by_pk_alg mbedtls_oid_get_oid_by_pk_alg
+#define oid_get_oid_by_sig_alg mbedtls_oid_get_oid_by_sig_alg
+#define oid_get_pk_alg mbedtls_oid_get_pk_alg
+#define oid_get_pkcs12_pbe_alg mbedtls_oid_get_pkcs12_pbe_alg
+#define oid_get_sig_alg mbedtls_oid_get_sig_alg
+#define oid_get_sig_alg_desc mbedtls_oid_get_sig_alg_desc
+#define oid_get_x509_ext_type mbedtls_oid_get_x509_ext_type
+#define operation_t mbedtls_operation_t
+#define padlock_supports mbedtls_padlock_has_support
+#define padlock_xcryptcbc mbedtls_padlock_xcryptcbc
+#define padlock_xcryptecb mbedtls_padlock_xcryptecb
+#define pem_context mbedtls_pem_context
+#define pem_free mbedtls_pem_free
+#define pem_init mbedtls_pem_init
+#define pem_read_buffer mbedtls_pem_read_buffer
+#define pem_write_buffer mbedtls_pem_write_buffer
+#define pk_can_do mbedtls_pk_can_do
+#define pk_check_pair mbedtls_pk_check_pair
+#define pk_context mbedtls_pk_context
+#define pk_debug mbedtls_pk_debug
+#define pk_debug_item mbedtls_pk_debug_item
+#define pk_debug_type mbedtls_pk_debug_type
+#define pk_decrypt mbedtls_pk_decrypt
+#define pk_ec mbedtls_pk_ec
+#define pk_encrypt mbedtls_pk_encrypt
+#define pk_free mbedtls_pk_free
+#define pk_get_len mbedtls_pk_get_len
+#define pk_get_name mbedtls_pk_get_name
+#define pk_get_size mbedtls_pk_get_bitlen
+#define pk_get_type mbedtls_pk_get_type
+#define pk_info_from_type mbedtls_pk_info_from_type
+#define pk_info_t mbedtls_pk_info_t
+#define pk_init mbedtls_pk_init
+#define pk_init_ctx mbedtls_pk_setup
+#define pk_init_ctx_rsa_alt mbedtls_pk_setup_rsa_alt
+#define pk_load_file mbedtls_pk_load_file
+#define pk_parse_key mbedtls_pk_parse_key
+#define pk_parse_keyfile mbedtls_pk_parse_keyfile
+#define pk_parse_public_key mbedtls_pk_parse_public_key
+#define pk_parse_public_keyfile mbedtls_pk_parse_public_keyfile
+#define pk_parse_subpubkey mbedtls_pk_parse_subpubkey
+#define pk_rsa mbedtls_pk_rsa
+#define pk_rsa_alt_decrypt_func mbedtls_pk_rsa_alt_decrypt_func
+#define pk_rsa_alt_key_len_func mbedtls_pk_rsa_alt_key_len_func
+#define pk_rsa_alt_sign_func mbedtls_pk_rsa_alt_sign_func
+#define pk_rsassa_pss_options mbedtls_pk_rsassa_pss_options
+#define pk_sign mbedtls_pk_sign
+#define pk_type_t mbedtls_pk_type_t
+#define pk_verify mbedtls_pk_verify
+#define pk_verify_ext mbedtls_pk_verify_ext
+#define pk_write_key_der mbedtls_pk_write_key_der
+#define pk_write_key_pem mbedtls_pk_write_key_pem
+#define pk_write_pubkey mbedtls_pk_write_pubkey
+#define pk_write_pubkey_der mbedtls_pk_write_pubkey_der
+#define pk_write_pubkey_pem mbedtls_pk_write_pubkey_pem
+#define pkcs11_context mbedtls_pkcs11_context
+#define pkcs11_decrypt mbedtls_pkcs11_decrypt
+#define pkcs11_priv_key_free mbedtls_pkcs11_priv_key_free
+#define pkcs11_priv_key_init mbedtls_pkcs11_priv_key_bind
+#define pkcs11_sign mbedtls_pkcs11_sign
+#define pkcs11_x509_cert_init mbedtls_pkcs11_x509_cert_bind
+#define pkcs12_derivation mbedtls_pkcs12_derivation
+#define pkcs12_pbe mbedtls_pkcs12_pbe
+#define pkcs12_pbe_sha1_rc4_128 mbedtls_pkcs12_pbe_sha1_rc4_128
+#define pkcs5_pbes2 mbedtls_pkcs5_pbes2
+#define pkcs5_pbkdf2_hmac mbedtls_pkcs5_pbkdf2_hmac
+#define pkcs5_self_test mbedtls_pkcs5_self_test
+#define platform_entropy_poll mbedtls_platform_entropy_poll
+#define platform_set_exit mbedtls_platform_set_exit
+#define platform_set_fprintf mbedtls_platform_set_fprintf
+#define platform_set_printf mbedtls_platform_set_printf
+#define platform_set_snprintf mbedtls_platform_set_snprintf
+#define polarssl_exit mbedtls_exit
+#define polarssl_fprintf mbedtls_fprintf
+#define polarssl_free mbedtls_free
+#define polarssl_mutex_free mbedtls_mutex_free
+#define polarssl_mutex_init mbedtls_mutex_init
+#define polarssl_mutex_lock mbedtls_mutex_lock
+#define polarssl_mutex_unlock mbedtls_mutex_unlock
+#define polarssl_printf mbedtls_printf
+#define polarssl_snprintf mbedtls_snprintf
+#define polarssl_strerror mbedtls_strerror
+#define ripemd160 mbedtls_ripemd160
+#define ripemd160_context mbedtls_ripemd160_context
+#define ripemd160_finish mbedtls_ripemd160_finish
+#define ripemd160_free mbedtls_ripemd160_free
+#define ripemd160_info mbedtls_ripemd160_info
+#define ripemd160_init mbedtls_ripemd160_init
+#define ripemd160_process mbedtls_ripemd160_process
+#define ripemd160_self_test mbedtls_ripemd160_self_test
+#define ripemd160_starts mbedtls_ripemd160_starts
+#define ripemd160_update mbedtls_ripemd160_update
+#define rsa_alt_context mbedtls_rsa_alt_context
+#define rsa_alt_info mbedtls_rsa_alt_info
+#define rsa_check_privkey mbedtls_rsa_check_privkey
+#define rsa_check_pub_priv mbedtls_rsa_check_pub_priv
+#define rsa_check_pubkey mbedtls_rsa_check_pubkey
+#define rsa_context mbedtls_rsa_context
+#define rsa_copy mbedtls_rsa_copy
+#define rsa_free mbedtls_rsa_free
+#define rsa_gen_key mbedtls_rsa_gen_key
+#define rsa_info mbedtls_rsa_info
+#define rsa_init mbedtls_rsa_init
+#define rsa_pkcs1_decrypt mbedtls_rsa_pkcs1_decrypt
+#define rsa_pkcs1_encrypt mbedtls_rsa_pkcs1_encrypt
+#define rsa_pkcs1_sign mbedtls_rsa_pkcs1_sign
+#define rsa_pkcs1_verify mbedtls_rsa_pkcs1_verify
+#define rsa_private mbedtls_rsa_private
+#define rsa_public mbedtls_rsa_public
+#define rsa_rsaes_oaep_decrypt mbedtls_rsa_rsaes_oaep_decrypt
+#define rsa_rsaes_oaep_encrypt mbedtls_rsa_rsaes_oaep_encrypt
+#define rsa_rsaes_pkcs1_v15_decrypt mbedtls_rsa_rsaes_pkcs1_v15_decrypt
+#define rsa_rsaes_pkcs1_v15_encrypt mbedtls_rsa_rsaes_pkcs1_v15_encrypt
+#define rsa_rsassa_pkcs1_v15_sign mbedtls_rsa_rsassa_pkcs1_v15_sign
+#define rsa_rsassa_pkcs1_v15_verify mbedtls_rsa_rsassa_pkcs1_v15_verify
+#define rsa_rsassa_pss_sign mbedtls_rsa_rsassa_pss_sign
+#define rsa_rsassa_pss_verify mbedtls_rsa_rsassa_pss_verify
+#define rsa_rsassa_pss_verify_ext mbedtls_rsa_rsassa_pss_verify_ext
+#define rsa_self_test mbedtls_rsa_self_test
+#define rsa_set_padding mbedtls_rsa_set_padding
+#define safer_memcmp mbedtls_ssl_safer_memcmp
+#define set_alarm mbedtls_set_alarm
+#define sha1 mbedtls_sha1
+#define sha1_context mbedtls_sha1_context
+#define sha1_finish mbedtls_sha1_finish
+#define sha1_free mbedtls_sha1_free
+#define sha1_info mbedtls_sha1_info
+#define sha1_init mbedtls_sha1_init
+#define sha1_process mbedtls_sha1_process
+#define sha1_self_test mbedtls_sha1_self_test
+#define sha1_starts mbedtls_sha1_starts
+#define sha1_update mbedtls_sha1_update
+#define sha224_info mbedtls_sha224_info
+#define sha256 mbedtls_sha256
+#define sha256_context mbedtls_sha256_context
+#define sha256_finish mbedtls_sha256_finish
+#define sha256_free mbedtls_sha256_free
+#define sha256_info mbedtls_sha256_info
+#define sha256_init mbedtls_sha256_init
+#define sha256_process mbedtls_sha256_process
+#define sha256_self_test mbedtls_sha256_self_test
+#define sha256_starts mbedtls_sha256_starts
+#define sha256_update mbedtls_sha256_update
+#define sha384_info mbedtls_sha384_info
+#define sha512 mbedtls_sha512
+#define sha512_context mbedtls_sha512_context
+#define sha512_finish mbedtls_sha512_finish
+#define sha512_free mbedtls_sha512_free
+#define sha512_info mbedtls_sha512_info
+#define sha512_init mbedtls_sha512_init
+#define sha512_process mbedtls_sha512_process
+#define sha512_self_test mbedtls_sha512_self_test
+#define sha512_starts mbedtls_sha512_starts
+#define sha512_update mbedtls_sha512_update
+#define source_state mbedtls_entropy_source_state
+#define ssl_cache_context mbedtls_ssl_cache_context
+#define ssl_cache_entry mbedtls_ssl_cache_entry
+#define ssl_cache_free mbedtls_ssl_cache_free
+#define ssl_cache_get mbedtls_ssl_cache_get
+#define ssl_cache_init mbedtls_ssl_cache_init
+#define ssl_cache_set mbedtls_ssl_cache_set
+#define ssl_cache_set_max_entries mbedtls_ssl_cache_set_max_entries
+#define ssl_cache_set_timeout mbedtls_ssl_cache_set_timeout
+#define ssl_check_cert_usage mbedtls_ssl_check_cert_usage
+#define ssl_ciphersuite_from_id mbedtls_ssl_ciphersuite_from_id
+#define ssl_ciphersuite_from_string mbedtls_ssl_ciphersuite_from_string
+#define ssl_ciphersuite_t mbedtls_ssl_ciphersuite_t
+#define ssl_ciphersuite_uses_ec mbedtls_ssl_ciphersuite_uses_ec
+#define ssl_ciphersuite_uses_psk mbedtls_ssl_ciphersuite_uses_psk
+#define ssl_close_notify mbedtls_ssl_close_notify
+#define ssl_context mbedtls_ssl_context
+#define ssl_cookie_check mbedtls_ssl_cookie_check
+#define ssl_cookie_check_t mbedtls_ssl_cookie_check_t
+#define ssl_cookie_ctx mbedtls_ssl_cookie_ctx
+#define ssl_cookie_free mbedtls_ssl_cookie_free
+#define ssl_cookie_init mbedtls_ssl_cookie_init
+#define ssl_cookie_set_timeout mbedtls_ssl_cookie_set_timeout
+#define ssl_cookie_setup mbedtls_ssl_cookie_setup
+#define ssl_cookie_write mbedtls_ssl_cookie_write
+#define ssl_cookie_write_t mbedtls_ssl_cookie_write_t
+#define ssl_derive_keys mbedtls_ssl_derive_keys
+#define ssl_dtls_replay_check mbedtls_ssl_dtls_replay_check
+#define ssl_dtls_replay_update mbedtls_ssl_dtls_replay_update
+#define ssl_fetch_input mbedtls_ssl_fetch_input
+#define ssl_flight_item mbedtls_ssl_flight_item
+#define ssl_flush_output mbedtls_ssl_flush_output
+#define ssl_free mbedtls_ssl_free
+#define ssl_get_alpn_protocol mbedtls_ssl_get_alpn_protocol
+#define ssl_get_bytes_avail mbedtls_ssl_get_bytes_avail
+#define ssl_get_ciphersuite mbedtls_ssl_get_ciphersuite
+#define ssl_get_ciphersuite_id mbedtls_ssl_get_ciphersuite_id
+#define ssl_get_ciphersuite_name mbedtls_ssl_get_ciphersuite_name
+#define ssl_get_ciphersuite_sig_pk_alg mbedtls_ssl_get_ciphersuite_sig_pk_alg
+#define ssl_get_peer_cert mbedtls_ssl_get_peer_cert
+#define ssl_get_record_expansion mbedtls_ssl_get_record_expansion
+#define ssl_get_session mbedtls_ssl_get_session
+#define ssl_get_verify_result mbedtls_ssl_get_verify_result
+#define ssl_get_version mbedtls_ssl_get_version
+#define ssl_handshake mbedtls_ssl_handshake
+#define ssl_handshake_client_step mbedtls_ssl_handshake_client_step
+#define ssl_handshake_free mbedtls_ssl_handshake_free
+#define ssl_handshake_params mbedtls_ssl_handshake_params
+#define ssl_handshake_server_step mbedtls_ssl_handshake_server_step
+#define ssl_handshake_step mbedtls_ssl_handshake_step
+#define ssl_handshake_wrapup mbedtls_ssl_handshake_wrapup
+#define ssl_hdr_len mbedtls_ssl_hdr_len
+#define ssl_hs_hdr_len mbedtls_ssl_hs_hdr_len
+#define ssl_hw_record_activate mbedtls_ssl_hw_record_activate
+#define ssl_hw_record_finish mbedtls_ssl_hw_record_finish
+#define ssl_hw_record_init mbedtls_ssl_hw_record_init
+#define ssl_hw_record_read mbedtls_ssl_hw_record_read
+#define ssl_hw_record_reset mbedtls_ssl_hw_record_reset
+#define ssl_hw_record_write mbedtls_ssl_hw_record_write
+#define ssl_init mbedtls_ssl_init
+#define ssl_key_cert mbedtls_ssl_key_cert
+#define ssl_legacy_renegotiation mbedtls_ssl_conf_legacy_renegotiation
+#define ssl_list_ciphersuites mbedtls_ssl_list_ciphersuites
+#define ssl_md_alg_from_hash mbedtls_ssl_md_alg_from_hash
+#define ssl_optimize_checksum mbedtls_ssl_optimize_checksum
+#define ssl_own_cert mbedtls_ssl_own_cert
+#define ssl_own_key mbedtls_ssl_own_key
+#define ssl_parse_certificate mbedtls_ssl_parse_certificate
+#define ssl_parse_change_cipher_spec mbedtls_ssl_parse_change_cipher_spec
+#define ssl_parse_finished mbedtls_ssl_parse_finished
+#define ssl_pk_alg_from_sig mbedtls_ssl_pk_alg_from_sig
+#define ssl_pkcs11_decrypt mbedtls_ssl_pkcs11_decrypt
+#define ssl_pkcs11_key_len mbedtls_ssl_pkcs11_key_len
+#define ssl_pkcs11_sign mbedtls_ssl_pkcs11_sign
+#define ssl_psk_derive_premaster mbedtls_ssl_psk_derive_premaster
+#define ssl_read mbedtls_ssl_read
+#define ssl_read_record mbedtls_ssl_read_record
+#define ssl_read_version mbedtls_ssl_read_version
+#define ssl_recv_flight_completed mbedtls_ssl_recv_flight_completed
+#define ssl_renegotiate mbedtls_ssl_renegotiate
+#define ssl_resend mbedtls_ssl_resend
+#define ssl_reset_checksum mbedtls_ssl_reset_checksum
+#define ssl_send_alert_message mbedtls_ssl_send_alert_message
+#define ssl_send_fatal_handshake_failure mbedtls_ssl_send_fatal_handshake_failure
+#define ssl_send_flight_completed mbedtls_ssl_send_flight_completed
+#define ssl_session mbedtls_ssl_session
+#define ssl_session_free mbedtls_ssl_session_free
+#define ssl_session_init mbedtls_ssl_session_init
+#define ssl_session_reset mbedtls_ssl_session_reset
+#define ssl_set_alpn_protocols mbedtls_ssl_conf_alpn_protocols
+#define ssl_set_arc4_support mbedtls_ssl_conf_arc4_support
+#define ssl_set_authmode mbedtls_ssl_conf_authmode
+#define ssl_set_bio mbedtls_ssl_set_bio
+#define ssl_set_ca_chain mbedtls_ssl_conf_ca_chain
+#define ssl_set_cbc_record_splitting mbedtls_ssl_conf_cbc_record_splitting
+#define ssl_set_ciphersuites mbedtls_ssl_conf_ciphersuites
+#define ssl_set_ciphersuites_for_version mbedtls_ssl_conf_ciphersuites_for_version
+#define ssl_set_client_transport_id mbedtls_ssl_set_client_transport_id
+#define ssl_set_curves mbedtls_ssl_conf_curves
+#define ssl_set_dbg mbedtls_ssl_conf_dbg
+#define ssl_set_dh_param mbedtls_ssl_conf_dh_param
+#define ssl_set_dh_param_ctx mbedtls_ssl_conf_dh_param_ctx
+#define ssl_set_dtls_anti_replay mbedtls_ssl_conf_dtls_anti_replay
+#define ssl_set_dtls_badmac_limit mbedtls_ssl_conf_dtls_badmac_limit
+#define ssl_set_dtls_cookies mbedtls_ssl_conf_dtls_cookies
+#define ssl_set_encrypt_then_mac mbedtls_ssl_conf_encrypt_then_mac
+#define ssl_set_endpoint mbedtls_ssl_conf_endpoint
+#define ssl_set_extended_master_secret mbedtls_ssl_conf_extended_master_secret
+#define ssl_set_fallback mbedtls_ssl_conf_fallback
+#define ssl_set_handshake_timeout mbedtls_ssl_conf_handshake_timeout
+#define ssl_set_hostname mbedtls_ssl_set_hostname
+#define ssl_set_max_frag_len mbedtls_ssl_conf_max_frag_len
+#define ssl_set_max_version mbedtls_ssl_conf_max_version
+#define ssl_set_min_version mbedtls_ssl_conf_min_version
+#define ssl_set_own_cert mbedtls_ssl_conf_own_cert
+#define ssl_set_psk mbedtls_ssl_conf_psk
+#define ssl_set_psk_cb mbedtls_ssl_conf_psk_cb
+#define ssl_set_renegotiation mbedtls_ssl_conf_renegotiation
+#define ssl_set_renegotiation_enforced mbedtls_ssl_conf_renegotiation_enforced
+#define ssl_set_renegotiation_period mbedtls_ssl_conf_renegotiation_period
+#define ssl_set_rng mbedtls_ssl_conf_rng
+#define ssl_set_session mbedtls_ssl_set_session
+#define ssl_set_session_cache mbedtls_ssl_conf_session_cache
+#define ssl_set_session_tickets mbedtls_ssl_conf_session_tickets
+#define ssl_set_sni mbedtls_ssl_conf_sni
+#define ssl_set_transport mbedtls_ssl_conf_transport
+#define ssl_set_truncated_hmac mbedtls_ssl_conf_truncated_hmac
+#define ssl_set_verify mbedtls_ssl_conf_verify
+#define ssl_sig_from_pk mbedtls_ssl_sig_from_pk
+#define ssl_states mbedtls_ssl_states
+#define ssl_transform mbedtls_ssl_transform
+#define ssl_transform_free mbedtls_ssl_transform_free
+#define ssl_write mbedtls_ssl_write
+#define ssl_write_certificate mbedtls_ssl_write_certificate
+#define ssl_write_change_cipher_spec mbedtls_ssl_write_change_cipher_spec
+#define ssl_write_finished mbedtls_ssl_write_finished
+#define ssl_write_record mbedtls_ssl_write_record
+#define ssl_write_version mbedtls_ssl_write_version
+#define supported_ciphers mbedtls_cipher_supported
+#define t_sint mbedtls_mpi_sint
+#define t_udbl mbedtls_t_udbl
+#define t_uint mbedtls_mpi_uint
+#define test_ca_crt mbedtls_test_ca_crt
+#define test_ca_crt_ec mbedtls_test_ca_crt_ec
+#define test_ca_crt_rsa mbedtls_test_ca_crt_rsa
+#define test_ca_key mbedtls_test_ca_key
+#define test_ca_key_ec mbedtls_test_ca_key_ec
+#define test_ca_key_rsa mbedtls_test_ca_key_rsa
+#define test_ca_list mbedtls_test_cas_pem
+#define test_ca_pwd mbedtls_test_ca_pwd
+#define test_ca_pwd_ec mbedtls_test_ca_pwd_ec
+#define test_ca_pwd_rsa mbedtls_test_ca_pwd_rsa
+#define test_cli_crt mbedtls_test_cli_crt
+#define test_cli_crt_ec mbedtls_test_cli_crt_ec
+#define test_cli_crt_rsa mbedtls_test_cli_crt_rsa
+#define test_cli_key mbedtls_test_cli_key
+#define test_cli_key_ec mbedtls_test_cli_key_ec
+#define test_cli_key_rsa mbedtls_test_cli_key_rsa
+#define test_srv_crt mbedtls_test_srv_crt
+#define test_srv_crt_ec mbedtls_test_srv_crt_ec
+#define test_srv_crt_rsa mbedtls_test_srv_crt_rsa
+#define test_srv_key mbedtls_test_srv_key
+#define test_srv_key_ec mbedtls_test_srv_key_ec
+#define test_srv_key_rsa mbedtls_test_srv_key_rsa
+#define threading_mutex_t mbedtls_threading_mutex_t
+#define threading_set_alt mbedtls_threading_set_alt
+#define timing_self_test mbedtls_timing_self_test
+#define version_check_feature mbedtls_version_check_feature
+#define version_get_number mbedtls_version_get_number
+#define version_get_string mbedtls_version_get_string
+#define version_get_string_full mbedtls_version_get_string_full
+#define x509_bitstring mbedtls_x509_bitstring
+#define x509_buf mbedtls_x509_buf
+#define x509_crl mbedtls_x509_crl
+#define x509_crl_entry mbedtls_x509_crl_entry
+#define x509_crl_free mbedtls_x509_crl_free
+#define x509_crl_info mbedtls_x509_crl_info
+#define x509_crl_init mbedtls_x509_crl_init
+#define x509_crl_parse mbedtls_x509_crl_parse
+#define x509_crl_parse_der mbedtls_x509_crl_parse_der
+#define x509_crl_parse_file mbedtls_x509_crl_parse_file
+#define x509_crt mbedtls_x509_crt
+#define x509_crt_check_extended_key_usage mbedtls_x509_crt_check_extended_key_usage
+#define x509_crt_check_key_usage mbedtls_x509_crt_check_key_usage
+#define x509_crt_free mbedtls_x509_crt_free
+#define x509_crt_info mbedtls_x509_crt_info
+#define x509_crt_init mbedtls_x509_crt_init
+#define x509_crt_parse mbedtls_x509_crt_parse
+#define x509_crt_parse_der mbedtls_x509_crt_parse_der
+#define x509_crt_parse_file mbedtls_x509_crt_parse_file
+#define x509_crt_parse_path mbedtls_x509_crt_parse_path
+#define x509_crt_revoked mbedtls_x509_crt_is_revoked
+#define x509_crt_verify mbedtls_x509_crt_verify
+#define x509_csr mbedtls_x509_csr
+#define x509_csr_free mbedtls_x509_csr_free
+#define x509_csr_info mbedtls_x509_csr_info
+#define x509_csr_init mbedtls_x509_csr_init
+#define x509_csr_parse mbedtls_x509_csr_parse
+#define x509_csr_parse_der mbedtls_x509_csr_parse_der
+#define x509_csr_parse_file mbedtls_x509_csr_parse_file
+#define x509_dn_gets mbedtls_x509_dn_gets
+#define x509_get_alg mbedtls_x509_get_alg
+#define x509_get_alg_null mbedtls_x509_get_alg_null
+#define x509_get_ext mbedtls_x509_get_ext
+#define x509_get_name mbedtls_x509_get_name
+#define x509_get_rsassa_pss_params mbedtls_x509_get_rsassa_pss_params
+#define x509_get_serial mbedtls_x509_get_serial
+#define x509_get_sig mbedtls_x509_get_sig
+#define x509_get_sig_alg mbedtls_x509_get_sig_alg
+#define x509_get_time mbedtls_x509_get_time
+#define x509_key_size_helper mbedtls_x509_key_size_helper
+#define x509_name mbedtls_x509_name
+#define x509_self_test mbedtls_x509_self_test
+#define x509_sequence mbedtls_x509_sequence
+#define x509_serial_gets mbedtls_x509_serial_gets
+#define x509_set_extension mbedtls_x509_set_extension
+#define x509_sig_alg_gets mbedtls_x509_sig_alg_gets
+#define x509_string_to_names mbedtls_x509_string_to_names
+#define x509_time mbedtls_x509_time
+#define x509_time_expired mbedtls_x509_time_is_past
+#define x509_time_future mbedtls_x509_time_is_future
+#define x509_write_extensions mbedtls_x509_write_extensions
+#define x509_write_names mbedtls_x509_write_names
+#define x509_write_sig mbedtls_x509_write_sig
+#define x509write_cert mbedtls_x509write_cert
+#define x509write_crt_der mbedtls_x509write_crt_der
+#define x509write_crt_free mbedtls_x509write_crt_free
+#define x509write_crt_init mbedtls_x509write_crt_init
+#define x509write_crt_pem mbedtls_x509write_crt_pem
+#define x509write_crt_set_authority_key_identifier mbedtls_x509write_crt_set_authority_key_identifier
+#define x509write_crt_set_basic_constraints mbedtls_x509write_crt_set_basic_constraints
+#define x509write_crt_set_extension mbedtls_x509write_crt_set_extension
+#define x509write_crt_set_issuer_key mbedtls_x509write_crt_set_issuer_key
+#define x509write_crt_set_issuer_name mbedtls_x509write_crt_set_issuer_name
+#define x509write_crt_set_key_usage mbedtls_x509write_crt_set_key_usage
+#define x509write_crt_set_md_alg mbedtls_x509write_crt_set_md_alg
+#define x509write_crt_set_ns_cert_type mbedtls_x509write_crt_set_ns_cert_type
+#define x509write_crt_set_serial mbedtls_x509write_crt_set_serial
+#define x509write_crt_set_subject_key mbedtls_x509write_crt_set_subject_key
+#define x509write_crt_set_subject_key_identifier mbedtls_x509write_crt_set_subject_key_identifier
+#define x509write_crt_set_subject_name mbedtls_x509write_crt_set_subject_name
+#define x509write_crt_set_validity mbedtls_x509write_crt_set_validity
+#define x509write_crt_set_version mbedtls_x509write_crt_set_version
+#define x509write_csr mbedtls_x509write_csr
+#define x509write_csr_der mbedtls_x509write_csr_der
+#define x509write_csr_free mbedtls_x509write_csr_free
+#define x509write_csr_init mbedtls_x509write_csr_init
+#define x509write_csr_pem mbedtls_x509write_csr_pem
+#define x509write_csr_set_extension mbedtls_x509write_csr_set_extension
+#define x509write_csr_set_key mbedtls_x509write_csr_set_key
+#define x509write_csr_set_key_usage mbedtls_x509write_csr_set_key_usage
+#define x509write_csr_set_md_alg mbedtls_x509write_csr_set_md_alg
+#define x509write_csr_set_ns_cert_type mbedtls_x509write_csr_set_ns_cert_type
+#define x509write_csr_set_subject_name mbedtls_x509write_csr_set_subject_name
+#define xtea_context mbedtls_xtea_context
+#define xtea_crypt_cbc mbedtls_xtea_crypt_cbc
+#define xtea_crypt_ecb mbedtls_xtea_crypt_ecb
+#define xtea_free mbedtls_xtea_free
+#define xtea_init mbedtls_xtea_init
+#define xtea_self_test mbedtls_xtea_self_test
+#define xtea_setup mbedtls_xtea_setup
+
+#endif /* compat-1.3.h */
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/config.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/config.h
new file mode 100644
index 0000000..654f972
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/config.h
@@ -0,0 +1,3294 @@
+/**
+ * \file config.h
+ *
+ * \brief Configuration options (set of defines)
+ *
+ * This set of compile-time options may be used to enable
+ * or disable features selectively, and reduce the global
+ * memory footprint.
+ */
+/*
+ * Copyright (C) 2006-2018, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+
+#ifndef MBEDTLS_CONFIG_H
+#define MBEDTLS_CONFIG_H
+
+#if defined(_MSC_VER) && !defined(_CRT_SECURE_NO_DEPRECATE)
+#define _CRT_SECURE_NO_DEPRECATE 1
+#endif
+
+/**
+ * \name SECTION: System support
+ *
+ * This section sets system specific settings.
+ * \{
+ */
+
+/**
+ * \def MBEDTLS_HAVE_ASM
+ *
+ * The compiler has support for asm().
+ *
+ * Requires support for asm() in compiler.
+ *
+ * Used in:
+ * library/aria.c
+ * library/timing.c
+ * include/mbedtls/bn_mul.h
+ *
+ * Required by:
+ * MBEDTLS_AESNI_C
+ * MBEDTLS_PADLOCK_C
+ *
+ * Comment to disable the use of assembly code.
+ */
+#define MBEDTLS_HAVE_ASM
+
+/**
+ * \def MBEDTLS_NO_UDBL_DIVISION
+ *
+ * The platform lacks support for double-width integer division (64-bit
+ * division on a 32-bit platform, 128-bit division on a 64-bit platform).
+ *
+ * Used in:
+ * include/mbedtls/bignum.h
+ * library/bignum.c
+ *
+ * The bignum code uses double-width division to speed up some operations.
+ * Double-width division is often implemented in software that needs to
+ * be linked with the program. The presence of a double-width integer
+ * type is usually detected automatically through preprocessor macros,
+ * but the automatic detection cannot know whether the code needs to
+ * and can be linked with an implementation of division for that type.
+ * By default division is assumed to be usable if the type is present.
+ * Uncomment this option to prevent the use of double-width division.
+ *
+ * Note that division for the native integer type is always required.
+ * Furthermore, a 64-bit type is always required even on a 32-bit
+ * platform, but it need not support multiplication or division. In some
+ * cases it is also desirable to disable some double-width operations. For
+ * example, if double-width division is implemented in software, disabling
+ * it can reduce code size in some embedded targets.
+ */
+//#define MBEDTLS_NO_UDBL_DIVISION
+
+/**
+ * \def MBEDTLS_NO_64BIT_MULTIPLICATION
+ *
+ * The platform lacks support for 32x32 -> 64-bit multiplication.
+ *
+ * Used in:
+ * library/poly1305.c
+ *
+ * Some parts of the library may use multiplication of two unsigned 32-bit
+ * operands with a 64-bit result in order to speed up computations. On some
+ * platforms, this is not available in hardware and has to be implemented in
+ * software, usually in a library provided by the toolchain.
+ *
+ * Sometimes it is not desirable to have to link to that library. This option
+ * removes the dependency of that library on platforms that lack a hardware
+ * 64-bit multiplier by embedding a software implementation in Mbed TLS.
+ *
+ * Note that depending on the compiler, this may decrease performance compared
+ * to using the library function provided by the toolchain.
+ */
+//#define MBEDTLS_NO_64BIT_MULTIPLICATION
+
+/**
+ * \def MBEDTLS_HAVE_SSE2
+ *
+ * CPU supports SSE2 instruction set.
+ *
+ * Uncomment if the CPU supports SSE2 (IA-32 specific).
+ */
+//#define MBEDTLS_HAVE_SSE2
+
+/**
+ * \def MBEDTLS_HAVE_TIME
+ *
+ * System has time.h and time().
+ * The time does not need to be correct, only time differences are used,
+ * by contrast with MBEDTLS_HAVE_TIME_DATE
+ *
+ * Defining MBEDTLS_HAVE_TIME allows you to specify MBEDTLS_PLATFORM_TIME_ALT,
+ * MBEDTLS_PLATFORM_TIME_MACRO, MBEDTLS_PLATFORM_TIME_TYPE_MACRO and
+ * MBEDTLS_PLATFORM_STD_TIME.
+ *
+ * Comment if your system does not support time functions
+ */
+#define MBEDTLS_HAVE_TIME
+
+/**
+ * \def MBEDTLS_HAVE_TIME_DATE
+ *
+ * System has time.h, time(), and an implementation for
+ * mbedtls_platform_gmtime_r() (see below).
+ * The time needs to be correct (not necesarily very accurate, but at least
+ * the date should be correct). This is used to verify the validity period of
+ * X.509 certificates.
+ *
+ * Comment if your system does not have a correct clock.
+ *
+ * \note mbedtls_platform_gmtime_r() is an abstraction in platform_util.h that
+ * behaves similarly to the gmtime_r() function from the C standard. Refer to
+ * the documentation for mbedtls_platform_gmtime_r() for more information.
+ *
+ * \note It is possible to configure an implementation for
+ * mbedtls_platform_gmtime_r() at compile-time by using the macro
+ * MBEDTLS_PLATFORM_GMTIME_R_ALT.
+ */
+#define MBEDTLS_HAVE_TIME_DATE
+
+/**
+ * \def MBEDTLS_PLATFORM_MEMORY
+ *
+ * Enable the memory allocation layer.
+ *
+ * By default mbed TLS uses the system-provided calloc() and free().
+ * This allows different allocators (self-implemented or provided) to be
+ * provided to the platform abstraction layer.
+ *
+ * Enabling MBEDTLS_PLATFORM_MEMORY without the
+ * MBEDTLS_PLATFORM_{FREE,CALLOC}_MACROs will provide
+ * "mbedtls_platform_set_calloc_free()" allowing you to set an alternative calloc() and
+ * free() function pointer at runtime.
+ *
+ * Enabling MBEDTLS_PLATFORM_MEMORY and specifying
+ * MBEDTLS_PLATFORM_{CALLOC,FREE}_MACROs will allow you to specify the
+ * alternate function at compile time.
+ *
+ * Requires: MBEDTLS_PLATFORM_C
+ *
+ * Enable this layer to allow use of alternative memory allocators.
+ */
+//#define MBEDTLS_PLATFORM_MEMORY
+
+/**
+ * \def MBEDTLS_PLATFORM_NO_STD_FUNCTIONS
+ *
+ * Do not assign standard functions in the platform layer (e.g. calloc() to
+ * MBEDTLS_PLATFORM_STD_CALLOC and printf() to MBEDTLS_PLATFORM_STD_PRINTF)
+ *
+ * This makes sure there are no linking errors on platforms that do not support
+ * these functions. You will HAVE to provide alternatives, either at runtime
+ * via the platform_set_xxx() functions or at compile time by setting
+ * the MBEDTLS_PLATFORM_STD_XXX defines, or enabling a
+ * MBEDTLS_PLATFORM_XXX_MACRO.
+ *
+ * Requires: MBEDTLS_PLATFORM_C
+ *
+ * Uncomment to prevent default assignment of standard functions in the
+ * platform layer.
+ */
+//#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS
+
+/**
+ * \def MBEDTLS_PLATFORM_EXIT_ALT
+ *
+ * MBEDTLS_PLATFORM_XXX_ALT: Uncomment a macro to let mbed TLS support the
+ * function in the platform abstraction layer.
+ *
+ * Example: In case you uncomment MBEDTLS_PLATFORM_PRINTF_ALT, mbed TLS will
+ * provide a function "mbedtls_platform_set_printf()" that allows you to set an
+ * alternative printf function pointer.
+ *
+ * All these define require MBEDTLS_PLATFORM_C to be defined!
+ *
+ * \note MBEDTLS_PLATFORM_SNPRINTF_ALT is required on Windows;
+ * it will be enabled automatically by check_config.h
+ *
+ * \warning MBEDTLS_PLATFORM_XXX_ALT cannot be defined at the same time as
+ * MBEDTLS_PLATFORM_XXX_MACRO!
+ *
+ * Requires: MBEDTLS_PLATFORM_TIME_ALT requires MBEDTLS_HAVE_TIME
+ *
+ * Uncomment a macro to enable alternate implementation of specific base
+ * platform function
+ */
+//#define MBEDTLS_PLATFORM_EXIT_ALT
+//#define MBEDTLS_PLATFORM_TIME_ALT
+//#define MBEDTLS_PLATFORM_FPRINTF_ALT
+//#define MBEDTLS_PLATFORM_PRINTF_ALT
+//#define MBEDTLS_PLATFORM_SNPRINTF_ALT
+//#define MBEDTLS_PLATFORM_NV_SEED_ALT
+//#define MBEDTLS_PLATFORM_SETUP_TEARDOWN_ALT
+
+/**
+ * \def MBEDTLS_DEPRECATED_WARNING
+ *
+ * Mark deprecated functions so that they generate a warning if used.
+ * Functions deprecated in one version will usually be removed in the next
+ * version. You can enable this to help you prepare the transition to a new
+ * major version by making sure your code is not using these functions.
+ *
+ * This only works with GCC and Clang. With other compilers, you may want to
+ * use MBEDTLS_DEPRECATED_REMOVED
+ *
+ * Uncomment to get warnings on using deprecated functions.
+ */
+//#define MBEDTLS_DEPRECATED_WARNING
+
+/**
+ * \def MBEDTLS_DEPRECATED_REMOVED
+ *
+ * Remove deprecated functions so that they generate an error if used.
+ * Functions deprecated in one version will usually be removed in the next
+ * version. You can enable this to help you prepare the transition to a new
+ * major version by making sure your code is not using these functions.
+ *
+ * Uncomment to get errors on using deprecated functions.
+ */
+//#define MBEDTLS_DEPRECATED_REMOVED
+
+/**
+ * \def MBEDTLS_CHECK_PARAMS
+ *
+ * This configuration option controls whether the library validates more of
+ * the parameters passed to it.
+ *
+ * When this flag is not defined, the library only attempts to validate an
+ * input parameter if: (1) they may come from the outside world (such as the
+ * network, the filesystem, etc.) or (2) not validating them could result in
+ * internal memory errors such as overflowing a buffer controlled by the
+ * library. On the other hand, it doesn't attempt to validate parameters whose
+ * values are fully controlled by the application (such as pointers).
+ *
+ * When this flag is defined, the library additionally attempts to validate
+ * parameters that are fully controlled by the application, and should always
+ * be valid if the application code is fully correct and trusted.
+ *
+ * For example, when a function accepts as input a pointer to a buffer that may
+ * contain untrusted data, and its documentation mentions that this pointer
+ * must not be NULL:
+ * - the pointer is checked to be non-NULL only if this option is enabled
+ * - the content of the buffer is always validated
+ *
+ * When this flag is defined, if a library function receives a parameter that
+ * is invalid, it will:
+ * - invoke the macro MBEDTLS_PARAM_FAILED() which by default expands to a
+ * call to the function mbedtls_param_failed()
+ * - immediately return (with a specific error code unless the function
+ * returns void and can't communicate an error).
+ *
+ * When defining this flag, you also need to:
+ * - either provide a definition of the function mbedtls_param_failed() in
+ * your application (see platform_util.h for its prototype) as the library
+ * calls that function, but does not provide a default definition for it,
+ * - or provide a different definition of the macro MBEDTLS_PARAM_FAILED()
+ * below if the above mechanism is not flexible enough to suit your needs.
+ * See the documentation of this macro later in this file.
+ *
+ * Uncomment to enable validation of application-controlled parameters.
+ */
+//#define MBEDTLS_CHECK_PARAMS
+
+/* \} name SECTION: System support */
+
+/**
+ * \name SECTION: mbed TLS feature support
+ *
+ * This section sets support for features that are or are not needed
+ * within the modules that are enabled.
+ * \{
+ */
+
+/**
+ * \def MBEDTLS_TIMING_ALT
+ *
+ * Uncomment to provide your own alternate implementation for mbedtls_timing_hardclock(),
+ * mbedtls_timing_get_timer(), mbedtls_set_alarm(), mbedtls_set/get_delay()
+ *
+ * Only works if you have MBEDTLS_TIMING_C enabled.
+ *
+ * You will need to provide a header "timing_alt.h" and an implementation at
+ * compile time.
+ */
+//#define MBEDTLS_TIMING_ALT
+
+/**
+ * \def MBEDTLS_AES_ALT
+ *
+ * MBEDTLS__MODULE_NAME__ALT: Uncomment a macro to let mbed TLS use your
+ * alternate core implementation of a symmetric crypto, an arithmetic or hash
+ * module (e.g. platform specific assembly optimized implementations). Keep
+ * in mind that the function prototypes should remain the same.
+ *
+ * This replaces the whole module. If you only want to replace one of the
+ * functions, use one of the MBEDTLS__FUNCTION_NAME__ALT flags.
+ *
+ * Example: In case you uncomment MBEDTLS_AES_ALT, mbed TLS will no longer
+ * provide the "struct mbedtls_aes_context" definition and omit the base
+ * function declarations and implementations. "aes_alt.h" will be included from
+ * "aes.h" to include the new function definitions.
+ *
+ * Uncomment a macro to enable alternate implementation of the corresponding
+ * module.
+ *
+ * \warning MD2, MD4, MD5, ARC4, DES and SHA-1 are considered weak and their
+ * use constitutes a security risk. If possible, we recommend
+ * avoiding dependencies on them, and considering stronger message
+ * digests and ciphers instead.
+ *
+ */
+//#define MBEDTLS_AES_ALT
+//#define MBEDTLS_ARC4_ALT
+//#define MBEDTLS_ARIA_ALT
+//#define MBEDTLS_BLOWFISH_ALT
+//#define MBEDTLS_CAMELLIA_ALT
+//#define MBEDTLS_CCM_ALT
+//#define MBEDTLS_CHACHA20_ALT
+//#define MBEDTLS_CHACHAPOLY_ALT
+//#define MBEDTLS_CMAC_ALT
+//#define MBEDTLS_DES_ALT
+//#define MBEDTLS_DHM_ALT
+//#define MBEDTLS_ECJPAKE_ALT
+//#define MBEDTLS_GCM_ALT
+//#define MBEDTLS_NIST_KW_ALT
+//#define MBEDTLS_MD2_ALT
+//#define MBEDTLS_MD4_ALT
+//#define MBEDTLS_MD5_ALT
+//#define MBEDTLS_POLY1305_ALT
+//#define MBEDTLS_RIPEMD160_ALT
+//#define MBEDTLS_RSA_ALT
+//#define MBEDTLS_SHA1_ALT
+//#define MBEDTLS_SHA256_ALT
+//#define MBEDTLS_SHA512_ALT
+//#define MBEDTLS_XTEA_ALT
+
+/*
+ * When replacing the elliptic curve module, pleace consider, that it is
+ * implemented with two .c files:
+ * - ecp.c
+ * - ecp_curves.c
+ * You can replace them very much like all the other MBEDTLS__MODULE_NAME__ALT
+ * macros as described above. The only difference is that you have to make sure
+ * that you provide functionality for both .c files.
+ */
+//#define MBEDTLS_ECP_ALT
+
+/**
+ * \def MBEDTLS_MD2_PROCESS_ALT
+ *
+ * MBEDTLS__FUNCTION_NAME__ALT: Uncomment a macro to let mbed TLS use you
+ * alternate core implementation of symmetric crypto or hash function. Keep in
+ * mind that function prototypes should remain the same.
+ *
+ * This replaces only one function. The header file from mbed TLS is still
+ * used, in contrast to the MBEDTLS__MODULE_NAME__ALT flags.
+ *
+ * Example: In case you uncomment MBEDTLS_SHA256_PROCESS_ALT, mbed TLS will
+ * no longer provide the mbedtls_sha1_process() function, but it will still provide
+ * the other function (using your mbedtls_sha1_process() function) and the definition
+ * of mbedtls_sha1_context, so your implementation of mbedtls_sha1_process must be compatible
+ * with this definition.
+ *
+ * \note Because of a signature change, the core AES encryption and decryption routines are
+ * currently named mbedtls_aes_internal_encrypt and mbedtls_aes_internal_decrypt,
+ * respectively. When setting up alternative implementations, these functions should
+ * be overriden, but the wrapper functions mbedtls_aes_decrypt and mbedtls_aes_encrypt
+ * must stay untouched.
+ *
+ * \note If you use the AES_xxx_ALT macros, then is is recommended to also set
+ * MBEDTLS_AES_ROM_TABLES in order to help the linker garbage-collect the AES
+ * tables.
+ *
+ * Uncomment a macro to enable alternate implementation of the corresponding
+ * function.
+ *
+ * \warning MD2, MD4, MD5, DES and SHA-1 are considered weak and their use
+ * constitutes a security risk. If possible, we recommend avoiding
+ * dependencies on them, and considering stronger message digests
+ * and ciphers instead.
+ *
+ */
+//#define MBEDTLS_MD2_PROCESS_ALT
+//#define MBEDTLS_MD4_PROCESS_ALT
+//#define MBEDTLS_MD5_PROCESS_ALT
+//#define MBEDTLS_RIPEMD160_PROCESS_ALT
+//#define MBEDTLS_SHA1_PROCESS_ALT
+//#define MBEDTLS_SHA256_PROCESS_ALT
+//#define MBEDTLS_SHA512_PROCESS_ALT
+//#define MBEDTLS_DES_SETKEY_ALT
+//#define MBEDTLS_DES_CRYPT_ECB_ALT
+//#define MBEDTLS_DES3_CRYPT_ECB_ALT
+//#define MBEDTLS_AES_SETKEY_ENC_ALT
+//#define MBEDTLS_AES_SETKEY_DEC_ALT
+//#define MBEDTLS_AES_ENCRYPT_ALT
+//#define MBEDTLS_AES_DECRYPT_ALT
+//#define MBEDTLS_ECDH_GEN_PUBLIC_ALT
+//#define MBEDTLS_ECDH_COMPUTE_SHARED_ALT
+//#define MBEDTLS_ECDSA_VERIFY_ALT
+//#define MBEDTLS_ECDSA_SIGN_ALT
+//#define MBEDTLS_ECDSA_GENKEY_ALT
+
+/**
+ * \def MBEDTLS_ECP_INTERNAL_ALT
+ *
+ * Expose a part of the internal interface of the Elliptic Curve Point module.
+ *
+ * MBEDTLS_ECP__FUNCTION_NAME__ALT: Uncomment a macro to let mbed TLS use your
+ * alternative core implementation of elliptic curve arithmetic. Keep in mind
+ * that function prototypes should remain the same.
+ *
+ * This partially replaces one function. The header file from mbed TLS is still
+ * used, in contrast to the MBEDTLS_ECP_ALT flag. The original implementation
+ * is still present and it is used for group structures not supported by the
+ * alternative.
+ *
+ * Any of these options become available by defining MBEDTLS_ECP_INTERNAL_ALT
+ * and implementing the following functions:
+ * unsigned char mbedtls_internal_ecp_grp_capable(
+ * const mbedtls_ecp_group *grp )
+ * int mbedtls_internal_ecp_init( const mbedtls_ecp_group *grp )
+ * void mbedtls_internal_ecp_free( const mbedtls_ecp_group *grp )
+ * The mbedtls_internal_ecp_grp_capable function should return 1 if the
+ * replacement functions implement arithmetic for the given group and 0
+ * otherwise.
+ * The functions mbedtls_internal_ecp_init and mbedtls_internal_ecp_free are
+ * called before and after each point operation and provide an opportunity to
+ * implement optimized set up and tear down instructions.
+ *
+ * Example: In case you uncomment MBEDTLS_ECP_INTERNAL_ALT and
+ * MBEDTLS_ECP_DOUBLE_JAC_ALT, mbed TLS will still provide the ecp_double_jac
+ * function, but will use your mbedtls_internal_ecp_double_jac if the group is
+ * supported (your mbedtls_internal_ecp_grp_capable function returns 1 when
+ * receives it as an argument). If the group is not supported then the original
+ * implementation is used. The other functions and the definition of
+ * mbedtls_ecp_group and mbedtls_ecp_point will not change, so your
+ * implementation of mbedtls_internal_ecp_double_jac and
+ * mbedtls_internal_ecp_grp_capable must be compatible with this definition.
+ *
+ * Uncomment a macro to enable alternate implementation of the corresponding
+ * function.
+ */
+/* Required for all the functions in this section */
+//#define MBEDTLS_ECP_INTERNAL_ALT
+/* Support for Weierstrass curves with Jacobi representation */
+//#define MBEDTLS_ECP_RANDOMIZE_JAC_ALT
+//#define MBEDTLS_ECP_ADD_MIXED_ALT
+//#define MBEDTLS_ECP_DOUBLE_JAC_ALT
+//#define MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT
+//#define MBEDTLS_ECP_NORMALIZE_JAC_ALT
+/* Support for curves with Montgomery arithmetic */
+//#define MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT
+//#define MBEDTLS_ECP_RANDOMIZE_MXZ_ALT
+//#define MBEDTLS_ECP_NORMALIZE_MXZ_ALT
+
+/**
+ * \def MBEDTLS_TEST_NULL_ENTROPY
+ *
+ * Enables testing and use of mbed TLS without any configured entropy sources.
+ * This permits use of the library on platforms before an entropy source has
+ * been integrated (see for example the MBEDTLS_ENTROPY_HARDWARE_ALT or the
+ * MBEDTLS_ENTROPY_NV_SEED switches).
+ *
+ * WARNING! This switch MUST be disabled in production builds, and is suitable
+ * only for development.
+ * Enabling the switch negates any security provided by the library.
+ *
+ * Requires MBEDTLS_ENTROPY_C, MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
+ *
+ */
+//#define MBEDTLS_TEST_NULL_ENTROPY
+
+/**
+ * \def MBEDTLS_ENTROPY_HARDWARE_ALT
+ *
+ * Uncomment this macro to let mbed TLS use your own implementation of a
+ * hardware entropy collector.
+ *
+ * Your function must be called \c mbedtls_hardware_poll(), have the same
+ * prototype as declared in entropy_poll.h, and accept NULL as first argument.
+ *
+ * Uncomment to use your own hardware entropy collector.
+ */
+//#define MBEDTLS_ENTROPY_HARDWARE_ALT
+
+/**
+ * \def MBEDTLS_AES_ROM_TABLES
+ *
+ * Use precomputed AES tables stored in ROM.
+ *
+ * Uncomment this macro to use precomputed AES tables stored in ROM.
+ * Comment this macro to generate AES tables in RAM at runtime.
+ *
+ * Tradeoff: Using precomputed ROM tables reduces RAM usage by ~8kb
+ * (or ~2kb if \c MBEDTLS_AES_FEWER_TABLES is used) and reduces the
+ * initialization time before the first AES operation can be performed.
+ * It comes at the cost of additional ~8kb ROM use (resp. ~2kb if \c
+ * MBEDTLS_AES_FEWER_TABLES below is used), and potentially degraded
+ * performance if ROM access is slower than RAM access.
+ *
+ * This option is independent of \c MBEDTLS_AES_FEWER_TABLES.
+ *
+ */
+//#define MBEDTLS_AES_ROM_TABLES
+
+/**
+ * \def MBEDTLS_AES_FEWER_TABLES
+ *
+ * Use less ROM/RAM for AES tables.
+ *
+ * Uncommenting this macro omits 75% of the AES tables from
+ * ROM / RAM (depending on the value of \c MBEDTLS_AES_ROM_TABLES)
+ * by computing their values on the fly during operations
+ * (the tables are entry-wise rotations of one another).
+ *
+ * Tradeoff: Uncommenting this reduces the RAM / ROM footprint
+ * by ~6kb but at the cost of more arithmetic operations during
+ * runtime. Specifically, one has to compare 4 accesses within
+ * different tables to 4 accesses with additional arithmetic
+ * operations within the same table. The performance gain/loss
+ * depends on the system and memory details.
+ *
+ * This option is independent of \c MBEDTLS_AES_ROM_TABLES.
+ *
+ */
+//#define MBEDTLS_AES_FEWER_TABLES
+
+/**
+ * \def MBEDTLS_CAMELLIA_SMALL_MEMORY
+ *
+ * Use less ROM for the Camellia implementation (saves about 768 bytes).
+ *
+ * Uncomment this macro to use less memory for Camellia.
+ */
+//#define MBEDTLS_CAMELLIA_SMALL_MEMORY
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_CBC
+ *
+ * Enable Cipher Block Chaining mode (CBC) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_CBC
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_CFB
+ *
+ * Enable Cipher Feedback mode (CFB) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_CFB
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_CTR
+ *
+ * Enable Counter Block Cipher mode (CTR) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_CTR
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_OFB
+ *
+ * Enable Output Feedback mode (OFB) for symmetric ciphers.
+ */
+#define MBEDTLS_CIPHER_MODE_OFB
+
+/**
+ * \def MBEDTLS_CIPHER_MODE_XTS
+ *
+ * Enable Xor-encrypt-xor with ciphertext stealing mode (XTS) for AES.
+ */
+#define MBEDTLS_CIPHER_MODE_XTS
+
+/**
+ * \def MBEDTLS_CIPHER_NULL_CIPHER
+ *
+ * Enable NULL cipher.
+ * Warning: Only do so when you know what you are doing. This allows for
+ * encryption or channels without any security!
+ *
+ * Requires MBEDTLS_ENABLE_WEAK_CIPHERSUITES as well to enable
+ * the following ciphersuites:
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA
+ * MBEDTLS_TLS_RSA_WITH_NULL_SHA256
+ * MBEDTLS_TLS_RSA_WITH_NULL_SHA
+ * MBEDTLS_TLS_RSA_WITH_NULL_MD5
+ * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA
+ * MBEDTLS_TLS_PSK_WITH_NULL_SHA384
+ * MBEDTLS_TLS_PSK_WITH_NULL_SHA256
+ * MBEDTLS_TLS_PSK_WITH_NULL_SHA
+ *
+ * Uncomment this macro to enable the NULL cipher and ciphersuites
+ */
+//#define MBEDTLS_CIPHER_NULL_CIPHER
+
+/**
+ * \def MBEDTLS_CIPHER_PADDING_PKCS7
+ *
+ * MBEDTLS_CIPHER_PADDING_XXX: Uncomment or comment macros to add support for
+ * specific padding modes in the cipher layer with cipher modes that support
+ * padding (e.g. CBC)
+ *
+ * If you disable all padding modes, only full blocks can be used with CBC.
+ *
+ * Enable padding modes in the cipher layer.
+ */
+#define MBEDTLS_CIPHER_PADDING_PKCS7
+#define MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS
+#define MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN
+#define MBEDTLS_CIPHER_PADDING_ZEROS
+
+/**
+ * \def MBEDTLS_ENABLE_WEAK_CIPHERSUITES
+ *
+ * Enable weak ciphersuites in SSL / TLS.
+ * Warning: Only do so when you know what you are doing. This allows for
+ * channels with virtually no security at all!
+ *
+ * This enables the following ciphersuites:
+ * MBEDTLS_TLS_RSA_WITH_DES_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_DES_CBC_SHA
+ *
+ * Uncomment this macro to enable weak ciphersuites
+ *
+ * \warning DES is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers instead.
+ */
+//#define MBEDTLS_ENABLE_WEAK_CIPHERSUITES
+
+/**
+ * \def MBEDTLS_REMOVE_ARC4_CIPHERSUITES
+ *
+ * Remove RC4 ciphersuites by default in SSL / TLS.
+ * This flag removes the ciphersuites based on RC4 from the default list as
+ * returned by mbedtls_ssl_list_ciphersuites(). However, it is still possible to
+ * enable (some of) them with mbedtls_ssl_conf_ciphersuites() by including them
+ * explicitly.
+ *
+ * Uncomment this macro to remove RC4 ciphersuites by default.
+ */
+#define MBEDTLS_REMOVE_ARC4_CIPHERSUITES
+
+/**
+ * \def MBEDTLS_REMOVE_3DES_CIPHERSUITES
+ *
+ * Remove 3DES ciphersuites by default in SSL / TLS.
+ * This flag removes the ciphersuites based on 3DES from the default list as
+ * returned by mbedtls_ssl_list_ciphersuites(). However, it is still possible
+ * to enable (some of) them with mbedtls_ssl_conf_ciphersuites() by including
+ * them explicitly.
+ *
+ * A man-in-the-browser attacker can recover authentication tokens sent through
+ * a TLS connection using a 3DES based cipher suite (see "On the Practical
+ * (In-)Security of 64-bit Block Ciphers" by Karthikeyan Bhargavan and Gaëtan
+ * Leurent, see https://sweet32.info/SWEET32_CCS16.pdf). If this attack falls
+ * in your threat model or you are unsure, then you should keep this option
+ * enabled to remove 3DES based cipher suites.
+ *
+ * Comment this macro to keep 3DES in the default ciphersuite list.
+ */
+#define MBEDTLS_REMOVE_3DES_CIPHERSUITES
+
+/**
+ * \def MBEDTLS_ECP_DP_SECP192R1_ENABLED
+ *
+ * MBEDTLS_ECP_XXXX_ENABLED: Enables specific curves within the Elliptic Curve
+ * module. By default all supported curves are enabled.
+ *
+ * Comment macros to disable the curve and functions for it
+ */
+#define MBEDTLS_ECP_DP_SECP192R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP224R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP256R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP384R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP521R1_ENABLED
+#define MBEDTLS_ECP_DP_SECP192K1_ENABLED
+#define MBEDTLS_ECP_DP_SECP224K1_ENABLED
+#define MBEDTLS_ECP_DP_SECP256K1_ENABLED
+#define MBEDTLS_ECP_DP_BP256R1_ENABLED
+#define MBEDTLS_ECP_DP_BP384R1_ENABLED
+#define MBEDTLS_ECP_DP_BP512R1_ENABLED
+#define MBEDTLS_ECP_DP_CURVE25519_ENABLED
+#define MBEDTLS_ECP_DP_CURVE448_ENABLED
+
+/**
+ * \def MBEDTLS_ECP_NIST_OPTIM
+ *
+ * Enable specific 'modulo p' routines for each NIST prime.
+ * Depending on the prime and architecture, makes operations 4 to 8 times
+ * faster on the corresponding curve.
+ *
+ * Comment this macro to disable NIST curves optimisation.
+ */
+#define MBEDTLS_ECP_NIST_OPTIM
+
+/**
+ * \def MBEDTLS_ECP_RESTARTABLE
+ *
+ * Enable "non-blocking" ECC operations that can return early and be resumed.
+ *
+ * This allows various functions to pause by returning
+ * #MBEDTLS_ERR_ECP_IN_PROGRESS (or, for functions in the SSL module,
+ * #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS) and then be called later again in
+ * order to further progress and eventually complete their operation. This is
+ * controlled through mbedtls_ecp_set_max_ops() which limits the maximum
+ * number of ECC operations a function may perform before pausing; see
+ * mbedtls_ecp_set_max_ops() for more information.
+ *
+ * This is useful in non-threaded environments if you want to avoid blocking
+ * for too long on ECC (and, hence, X.509 or SSL/TLS) operations.
+ *
+ * Uncomment this macro to enable restartable ECC computations.
+ *
+ * \note This option only works with the default software implementation of
+ * elliptic curve functionality. It is incompatible with
+ * MBEDTLS_ECP_ALT, MBEDTLS_ECDH_XXX_ALT and MBEDTLS_ECDSA_XXX_ALT.
+ */
+//#define MBEDTLS_ECP_RESTARTABLE
+
+/**
+ * \def MBEDTLS_ECDSA_DETERMINISTIC
+ *
+ * Enable deterministic ECDSA (RFC 6979).
+ * Standard ECDSA is "fragile" in the sense that lack of entropy when signing
+ * may result in a compromise of the long-term signing key. This is avoided by
+ * the deterministic variant.
+ *
+ * Requires: MBEDTLS_HMAC_DRBG_C
+ *
+ * Comment this macro to disable deterministic ECDSA.
+ */
+#define MBEDTLS_ECDSA_DETERMINISTIC
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+ *
+ * Enable the PSK based ciphersuite modes in SSL / TLS.
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_RC4_128_SHA
+ */
+#define MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED
+ *
+ * Enable the DHE-PSK based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_DHM_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA
+ *
+ * \warning Using DHE constitutes a security risk as it
+ * is not possible to validate custom DH parameters.
+ * If possible, it is recommended users should consider
+ * preferring other methods of key exchange.
+ * See dhm.h for more details.
+ *
+ */
+#define MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED
+ *
+ * Enable the ECDHE-PSK based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA
+ */
+#define MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED
+ *
+ * Enable the RSA-PSK based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ * MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA
+ */
+#define MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_RSA_ENABLED
+ *
+ * Enable the RSA-only based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ * MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_RSA_WITH_RC4_128_MD5
+ */
+#define MBEDTLS_KEY_EXCHANGE_RSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED
+ *
+ * Enable the DHE-RSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_DHM_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ * MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA
+ *
+ * \warning Using DHE constitutes a security risk as it
+ * is not possible to validate custom DH parameters.
+ * If possible, it is recommended users should consider
+ * preferring other methods of key exchange.
+ * See dhm.h for more details.
+ *
+ */
+#define MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED
+ *
+ * Enable the ECDHE-RSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
+ * MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA
+ */
+#define MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+ *
+ * Enable the ECDHE-ECDSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_ECDSA_C, MBEDTLS_X509_CRT_PARSE_C,
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA
+ */
+#define MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED
+ *
+ * Enable the ECDH-ECDSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ */
+#define MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED
+ *
+ * Enable the ECDH-RSA based ciphersuite modes in SSL / TLS.
+ *
+ * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ */
+#define MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED
+
+/**
+ * \def MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED
+ *
+ * Enable the ECJPAKE based ciphersuite modes in SSL / TLS.
+ *
+ * \warning This is currently experimental. EC J-PAKE support is based on the
+ * Thread v1.0.0 specification; incompatible changes to the specification
+ * might still happen. For this reason, this is disabled by default.
+ *
+ * Requires: MBEDTLS_ECJPAKE_C
+ * MBEDTLS_SHA256_C
+ * MBEDTLS_ECP_DP_SECP256R1_ENABLED
+ *
+ * This enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8
+ */
+//#define MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED
+
+/**
+ * \def MBEDTLS_PK_PARSE_EC_EXTENDED
+ *
+ * Enhance support for reading EC keys using variants of SEC1 not allowed by
+ * RFC 5915 and RFC 5480.
+ *
+ * Currently this means parsing the SpecifiedECDomain choice of EC
+ * parameters (only known groups are supported, not arbitrary domains, to
+ * avoid validation issues).
+ *
+ * Disable if you only need to support RFC 5915 + 5480 key formats.
+ */
+#define MBEDTLS_PK_PARSE_EC_EXTENDED
+
+/**
+ * \def MBEDTLS_ERROR_STRERROR_DUMMY
+ *
+ * Enable a dummy error function to make use of mbedtls_strerror() in
+ * third party libraries easier when MBEDTLS_ERROR_C is disabled
+ * (no effect when MBEDTLS_ERROR_C is enabled).
+ *
+ * You can safely disable this if MBEDTLS_ERROR_C is enabled, or if you're
+ * not using mbedtls_strerror() or error_strerror() in your application.
+ *
+ * Disable if you run into name conflicts and want to really remove the
+ * mbedtls_strerror()
+ */
+#define MBEDTLS_ERROR_STRERROR_DUMMY
+
+/**
+ * \def MBEDTLS_GENPRIME
+ *
+ * Enable the prime-number generation code.
+ *
+ * Requires: MBEDTLS_BIGNUM_C
+ */
+#define MBEDTLS_GENPRIME
+
+/**
+ * \def MBEDTLS_FS_IO
+ *
+ * Enable functions that use the filesystem.
+ */
+#define MBEDTLS_FS_IO
+
+/**
+ * \def MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
+ *
+ * Do not add default entropy sources. These are the platform specific,
+ * mbedtls_timing_hardclock and HAVEGE based poll functions.
+ *
+ * This is useful to have more control over the added entropy sources in an
+ * application.
+ *
+ * Uncomment this macro to prevent loading of default entropy functions.
+ */
+//#define MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
+
+/**
+ * \def MBEDTLS_NO_PLATFORM_ENTROPY
+ *
+ * Do not use built-in platform entropy functions.
+ * This is useful if your platform does not support
+ * standards like the /dev/urandom or Windows CryptoAPI.
+ *
+ * Uncomment this macro to disable the built-in platform entropy functions.
+ */
+//#define MBEDTLS_NO_PLATFORM_ENTROPY
+
+/**
+ * \def MBEDTLS_ENTROPY_FORCE_SHA256
+ *
+ * Force the entropy accumulator to use a SHA-256 accumulator instead of the
+ * default SHA-512 based one (if both are available).
+ *
+ * Requires: MBEDTLS_SHA256_C
+ *
+ * On 32-bit systems SHA-256 can be much faster than SHA-512. Use this option
+ * if you have performance concerns.
+ *
+ * This option is only useful if both MBEDTLS_SHA256_C and
+ * MBEDTLS_SHA512_C are defined. Otherwise the available hash module is used.
+ */
+//#define MBEDTLS_ENTROPY_FORCE_SHA256
+
+/**
+ * \def MBEDTLS_ENTROPY_NV_SEED
+ *
+ * Enable the non-volatile (NV) seed file-based entropy source.
+ * (Also enables the NV seed read/write functions in the platform layer)
+ *
+ * This is crucial (if not required) on systems that do not have a
+ * cryptographic entropy source (in hardware or kernel) available.
+ *
+ * Requires: MBEDTLS_ENTROPY_C, MBEDTLS_PLATFORM_C
+ *
+ * \note The read/write functions that are used by the entropy source are
+ * determined in the platform layer, and can be modified at runtime and/or
+ * compile-time depending on the flags (MBEDTLS_PLATFORM_NV_SEED_*) used.
+ *
+ * \note If you use the default implementation functions that read a seedfile
+ * with regular fopen(), please make sure you make a seedfile with the
+ * proper name (defined in MBEDTLS_PLATFORM_STD_NV_SEED_FILE) and at
+ * least MBEDTLS_ENTROPY_BLOCK_SIZE bytes in size that can be read from
+ * and written to or you will get an entropy source error! The default
+ * implementation will only use the first MBEDTLS_ENTROPY_BLOCK_SIZE
+ * bytes from the file.
+ *
+ * \note The entropy collector will write to the seed file before entropy is
+ * given to an external source, to update it.
+ */
+//#define MBEDTLS_ENTROPY_NV_SEED
+
+/**
+ * \def MBEDTLS_MEMORY_DEBUG
+ *
+ * Enable debugging of buffer allocator memory issues. Automatically prints
+ * (to stderr) all (fatal) messages on memory allocation issues. Enables
+ * function for 'debug output' of allocated memory.
+ *
+ * Requires: MBEDTLS_MEMORY_BUFFER_ALLOC_C
+ *
+ * Uncomment this macro to let the buffer allocator print out error messages.
+ */
+//#define MBEDTLS_MEMORY_DEBUG
+
+/**
+ * \def MBEDTLS_MEMORY_BACKTRACE
+ *
+ * Include backtrace information with each allocated block.
+ *
+ * Requires: MBEDTLS_MEMORY_BUFFER_ALLOC_C
+ * GLIBC-compatible backtrace() an backtrace_symbols() support
+ *
+ * Uncomment this macro to include backtrace information
+ */
+//#define MBEDTLS_MEMORY_BACKTRACE
+
+/**
+ * \def MBEDTLS_PK_RSA_ALT_SUPPORT
+ *
+ * Support external private RSA keys (eg from a HSM) in the PK layer.
+ *
+ * Comment this macro to disable support for external private RSA keys.
+ */
+#define MBEDTLS_PK_RSA_ALT_SUPPORT
+
+/**
+ * \def MBEDTLS_PKCS1_V15
+ *
+ * Enable support for PKCS#1 v1.5 encoding.
+ *
+ * Requires: MBEDTLS_RSA_C
+ *
+ * This enables support for PKCS#1 v1.5 operations.
+ */
+#define MBEDTLS_PKCS1_V15
+
+/**
+ * \def MBEDTLS_PKCS1_V21
+ *
+ * Enable support for PKCS#1 v2.1 encoding.
+ *
+ * Requires: MBEDTLS_MD_C, MBEDTLS_RSA_C
+ *
+ * This enables support for RSAES-OAEP and RSASSA-PSS operations.
+ */
+#define MBEDTLS_PKCS1_V21
+
+/**
+ * \def MBEDTLS_RSA_NO_CRT
+ *
+ * Do not use the Chinese Remainder Theorem
+ * for the RSA private operation.
+ *
+ * Uncomment this macro to disable the use of CRT in RSA.
+ *
+ */
+//#define MBEDTLS_RSA_NO_CRT
+
+/**
+ * \def MBEDTLS_SELF_TEST
+ *
+ * Enable the checkup functions (*_self_test).
+ */
+#define MBEDTLS_SELF_TEST
+
+/**
+ * \def MBEDTLS_SHA256_SMALLER
+ *
+ * Enable an implementation of SHA-256 that has lower ROM footprint but also
+ * lower performance.
+ *
+ * The default implementation is meant to be a reasonnable compromise between
+ * performance and size. This version optimizes more aggressively for size at
+ * the expense of performance. Eg on Cortex-M4 it reduces the size of
+ * mbedtls_sha256_process() from ~2KB to ~0.5KB for a performance hit of about
+ * 30%.
+ *
+ * Uncomment to enable the smaller implementation of SHA256.
+ */
+//#define MBEDTLS_SHA256_SMALLER
+
+/**
+ * \def MBEDTLS_SSL_ALL_ALERT_MESSAGES
+ *
+ * Enable sending of alert messages in case of encountered errors as per RFC.
+ * If you choose not to send the alert messages, mbed TLS can still communicate
+ * with other servers, only debugging of failures is harder.
+ *
+ * The advantage of not sending alert messages, is that no information is given
+ * about reasons for failures thus preventing adversaries of gaining intel.
+ *
+ * Enable sending of all alert messages
+ */
+#define MBEDTLS_SSL_ALL_ALERT_MESSAGES
+
+/**
+ * \def MBEDTLS_SSL_ASYNC_PRIVATE
+ *
+ * Enable asynchronous external private key operations in SSL. This allows
+ * you to configure an SSL connection to call an external cryptographic
+ * module to perform private key operations instead of performing the
+ * operation inside the library.
+ *
+ */
+//#define MBEDTLS_SSL_ASYNC_PRIVATE
+
+/**
+ * \def MBEDTLS_SSL_DEBUG_ALL
+ *
+ * Enable the debug messages in SSL module for all issues.
+ * Debug messages have been disabled in some places to prevent timing
+ * attacks due to (unbalanced) debugging function calls.
+ *
+ * If you need all error reporting you should enable this during debugging,
+ * but remove this for production servers that should log as well.
+ *
+ * Uncomment this macro to report all debug messages on errors introducing
+ * a timing side-channel.
+ *
+ */
+//#define MBEDTLS_SSL_DEBUG_ALL
+
+/** \def MBEDTLS_SSL_ENCRYPT_THEN_MAC
+ *
+ * Enable support for Encrypt-then-MAC, RFC 7366.
+ *
+ * This allows peers that both support it to use a more robust protection for
+ * ciphersuites using CBC, providing deep resistance against timing attacks
+ * on the padding or underlying cipher.
+ *
+ * This only affects CBC ciphersuites, and is useless if none is defined.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_TLS1 or
+ * MBEDTLS_SSL_PROTO_TLS1_1 or
+ * MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Comment this macro to disable support for Encrypt-then-MAC
+ */
+#define MBEDTLS_SSL_ENCRYPT_THEN_MAC
+
+/** \def MBEDTLS_SSL_EXTENDED_MASTER_SECRET
+ *
+ * Enable support for Extended Master Secret, aka Session Hash
+ * (draft-ietf-tls-session-hash-02).
+ *
+ * This was introduced as "the proper fix" to the Triple Handshake familiy of
+ * attacks, but it is recommended to always use it (even if you disable
+ * renegotiation), since it actually fixes a more fundamental issue in the
+ * original SSL/TLS design, and has implications beyond Triple Handshake.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_TLS1 or
+ * MBEDTLS_SSL_PROTO_TLS1_1 or
+ * MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Comment this macro to disable support for Extended Master Secret.
+ */
+#define MBEDTLS_SSL_EXTENDED_MASTER_SECRET
+
+/**
+ * \def MBEDTLS_SSL_FALLBACK_SCSV
+ *
+ * Enable support for FALLBACK_SCSV (draft-ietf-tls-downgrade-scsv-00).
+ *
+ * For servers, it is recommended to always enable this, unless you support
+ * only one version of TLS, or know for sure that none of your clients
+ * implements a fallback strategy.
+ *
+ * For clients, you only need this if you're using a fallback strategy, which
+ * is not recommended in the first place, unless you absolutely need it to
+ * interoperate with buggy (version-intolerant) servers.
+ *
+ * Comment this macro to disable support for FALLBACK_SCSV
+ */
+#define MBEDTLS_SSL_FALLBACK_SCSV
+
+/**
+ * \def MBEDTLS_SSL_HW_RECORD_ACCEL
+ *
+ * Enable hooking functions in SSL module for hardware acceleration of
+ * individual records.
+ *
+ * Uncomment this macro to enable hooking functions.
+ */
+//#define MBEDTLS_SSL_HW_RECORD_ACCEL
+
+/**
+ * \def MBEDTLS_SSL_CBC_RECORD_SPLITTING
+ *
+ * Enable 1/n-1 record splitting for CBC mode in SSLv3 and TLS 1.0.
+ *
+ * This is a countermeasure to the BEAST attack, which also minimizes the risk
+ * of interoperability issues compared to sending 0-length records.
+ *
+ * Comment this macro to disable 1/n-1 record splitting.
+ */
+#define MBEDTLS_SSL_CBC_RECORD_SPLITTING
+
+/**
+ * \def MBEDTLS_SSL_RENEGOTIATION
+ *
+ * Enable support for TLS renegotiation.
+ *
+ * The two main uses of renegotiation are (1) refresh keys on long-lived
+ * connections and (2) client authentication after the initial handshake.
+ * If you don't need renegotiation, it's probably better to disable it, since
+ * it has been associated with security issues in the past and is easy to
+ * misuse/misunderstand.
+ *
+ * Comment this to disable support for renegotiation.
+ *
+ * \note Even if this option is disabled, both client and server are aware
+ * of the Renegotiation Indication Extension (RFC 5746) used to
+ * prevent the SSL renegotiation attack (see RFC 5746 Sect. 1).
+ * (See \c mbedtls_ssl_conf_legacy_renegotiation for the
+ * configuration of this extension).
+ *
+ */
+#define MBEDTLS_SSL_RENEGOTIATION
+
+/**
+ * \def MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO
+ *
+ * Enable support for receiving and parsing SSLv2 Client Hello messages for the
+ * SSL Server module (MBEDTLS_SSL_SRV_C).
+ *
+ * Uncomment this macro to enable support for SSLv2 Client Hello messages.
+ */
+//#define MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO
+
+/**
+ * \def MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE
+ *
+ * Pick the ciphersuite according to the client's preferences rather than ours
+ * in the SSL Server module (MBEDTLS_SSL_SRV_C).
+ *
+ * Uncomment this macro to respect client's ciphersuite order
+ */
+//#define MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE
+
+/**
+ * \def MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+ *
+ * Enable support for RFC 6066 max_fragment_length extension in SSL.
+ *
+ * Comment this macro to disable support for the max_fragment_length extension
+ */
+#define MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
+
+/**
+ * \def MBEDTLS_SSL_PROTO_SSL3
+ *
+ * Enable support for SSL 3.0.
+ *
+ * Requires: MBEDTLS_MD5_C
+ * MBEDTLS_SHA1_C
+ *
+ * Comment this macro to disable support for SSL 3.0
+ */
+//#define MBEDTLS_SSL_PROTO_SSL3
+
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1
+ *
+ * Enable support for TLS 1.0.
+ *
+ * Requires: MBEDTLS_MD5_C
+ * MBEDTLS_SHA1_C
+ *
+ * Comment this macro to disable support for TLS 1.0
+ */
+#define MBEDTLS_SSL_PROTO_TLS1
+
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1_1
+ *
+ * Enable support for TLS 1.1 (and DTLS 1.0 if DTLS is enabled).
+ *
+ * Requires: MBEDTLS_MD5_C
+ * MBEDTLS_SHA1_C
+ *
+ * Comment this macro to disable support for TLS 1.1 / DTLS 1.0
+ */
+#define MBEDTLS_SSL_PROTO_TLS1_1
+
+/**
+ * \def MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Enable support for TLS 1.2 (and DTLS 1.2 if DTLS is enabled).
+ *
+ * Requires: MBEDTLS_SHA1_C or MBEDTLS_SHA256_C or MBEDTLS_SHA512_C
+ * (Depends on ciphersuites)
+ *
+ * Comment this macro to disable support for TLS 1.2 / DTLS 1.2
+ */
+#define MBEDTLS_SSL_PROTO_TLS1_2
+
+/**
+ * \def MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Enable support for DTLS (all available versions).
+ *
+ * Enable this and MBEDTLS_SSL_PROTO_TLS1_1 to enable DTLS 1.0,
+ * and/or this and MBEDTLS_SSL_PROTO_TLS1_2 to enable DTLS 1.2.
+ *
+ * Requires: MBEDTLS_SSL_PROTO_TLS1_1
+ * or MBEDTLS_SSL_PROTO_TLS1_2
+ *
+ * Comment this macro to disable support for DTLS
+ */
+#define MBEDTLS_SSL_PROTO_DTLS
+
+/**
+ * \def MBEDTLS_SSL_ALPN
+ *
+ * Enable support for RFC 7301 Application Layer Protocol Negotiation.
+ *
+ * Comment this macro to disable support for ALPN.
+ */
+#define MBEDTLS_SSL_ALPN
+
+/**
+ * \def MBEDTLS_SSL_DTLS_ANTI_REPLAY
+ *
+ * Enable support for the anti-replay mechanism in DTLS.
+ *
+ * Requires: MBEDTLS_SSL_TLS_C
+ * MBEDTLS_SSL_PROTO_DTLS
+ *
+ * \warning Disabling this is often a security risk!
+ * See mbedtls_ssl_conf_dtls_anti_replay() for details.
+ *
+ * Comment this to disable anti-replay in DTLS.
+ */
+#define MBEDTLS_SSL_DTLS_ANTI_REPLAY
+
+/**
+ * \def MBEDTLS_SSL_DTLS_HELLO_VERIFY
+ *
+ * Enable support for HelloVerifyRequest on DTLS servers.
+ *
+ * This feature is highly recommended to prevent DTLS servers being used as
+ * amplifiers in DoS attacks against other hosts. It should always be enabled
+ * unless you know for sure amplification cannot be a problem in the
+ * environment in which your server operates.
+ *
+ * \warning Disabling this can ba a security risk! (see above)
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ *
+ * Comment this to disable support for HelloVerifyRequest.
+ */
+#define MBEDTLS_SSL_DTLS_HELLO_VERIFY
+
+/**
+ * \def MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE
+ *
+ * Enable server-side support for clients that reconnect from the same port.
+ *
+ * Some clients unexpectedly close the connection and try to reconnect using the
+ * same source port. This needs special support from the server to handle the
+ * new connection securely, as described in section 4.2.8 of RFC 6347. This
+ * flag enables that support.
+ *
+ * Requires: MBEDTLS_SSL_DTLS_HELLO_VERIFY
+ *
+ * Comment this to disable support for clients reusing the source port.
+ */
+#define MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE
+
+/**
+ * \def MBEDTLS_SSL_DTLS_BADMAC_LIMIT
+ *
+ * Enable support for a limit of records with bad MAC.
+ *
+ * See mbedtls_ssl_conf_dtls_badmac_limit().
+ *
+ * Requires: MBEDTLS_SSL_PROTO_DTLS
+ */
+#define MBEDTLS_SSL_DTLS_BADMAC_LIMIT
+
+/**
+ * \def MBEDTLS_SSL_SESSION_TICKETS
+ *
+ * Enable support for RFC 5077 session tickets in SSL.
+ * Client-side, provides full support for session tickets (maintainance of a
+ * session store remains the responsibility of the application, though).
+ * Server-side, you also need to provide callbacks for writing and parsing
+ * tickets, including authenticated encryption and key management. Example
+ * callbacks are provided by MBEDTLS_SSL_TICKET_C.
+ *
+ * Comment this macro to disable support for SSL session tickets
+ */
+#define MBEDTLS_SSL_SESSION_TICKETS
+
+/**
+ * \def MBEDTLS_SSL_EXPORT_KEYS
+ *
+ * Enable support for exporting key block and master secret.
+ * This is required for certain users of TLS, e.g. EAP-TLS.
+ *
+ * Comment this macro to disable support for key export
+ */
+#define MBEDTLS_SSL_EXPORT_KEYS
+
+/**
+ * \def MBEDTLS_SSL_SERVER_NAME_INDICATION
+ *
+ * Enable support for RFC 6066 server name indication (SNI) in SSL.
+ *
+ * Requires: MBEDTLS_X509_CRT_PARSE_C
+ *
+ * Comment this macro to disable support for server name indication in SSL
+ */
+#define MBEDTLS_SSL_SERVER_NAME_INDICATION
+
+/**
+ * \def MBEDTLS_SSL_TRUNCATED_HMAC
+ *
+ * Enable support for RFC 6066 truncated HMAC in SSL.
+ *
+ * Comment this macro to disable support for truncated HMAC in SSL
+ */
+#define MBEDTLS_SSL_TRUNCATED_HMAC
+
+/**
+ * \def MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT
+ *
+ * Fallback to old (pre-2.7), non-conforming implementation of the truncated
+ * HMAC extension which also truncates the HMAC key. Note that this option is
+ * only meant for a transitory upgrade period and is likely to be removed in
+ * a future version of the library.
+ *
+ * \warning The old implementation is non-compliant and has a security weakness
+ * (2^80 brute force attack on the HMAC key used for a single,
+ * uninterrupted connection). This should only be enabled temporarily
+ * when (1) the use of truncated HMAC is essential in order to save
+ * bandwidth, and (2) the peer is an Mbed TLS stack that doesn't use
+ * the fixed implementation yet (pre-2.7).
+ *
+ * \deprecated This option is deprecated and will likely be removed in a
+ * future version of Mbed TLS.
+ *
+ * Uncomment to fallback to old, non-compliant truncated HMAC implementation.
+ *
+ * Requires: MBEDTLS_SSL_TRUNCATED_HMAC
+ */
+//#define MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT
+
+/**
+ * \def MBEDTLS_THREADING_ALT
+ *
+ * Provide your own alternate threading implementation.
+ *
+ * Requires: MBEDTLS_THREADING_C
+ *
+ * Uncomment this to allow your own alternate threading implementation.
+ */
+//#define MBEDTLS_THREADING_ALT
+
+/**
+ * \def MBEDTLS_THREADING_PTHREAD
+ *
+ * Enable the pthread wrapper layer for the threading layer.
+ *
+ * Requires: MBEDTLS_THREADING_C
+ *
+ * Uncomment this to enable pthread mutexes.
+ */
+//#define MBEDTLS_THREADING_PTHREAD
+
+/**
+ * \def MBEDTLS_VERSION_FEATURES
+ *
+ * Allow run-time checking of compile-time enabled features. Thus allowing users
+ * to check at run-time if the library is for instance compiled with threading
+ * support via mbedtls_version_check_feature().
+ *
+ * Requires: MBEDTLS_VERSION_C
+ *
+ * Comment this to disable run-time checking and save ROM space
+ */
+#define MBEDTLS_VERSION_FEATURES
+
+/**
+ * \def MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3
+ *
+ * If set, the X509 parser will not break-off when parsing an X509 certificate
+ * and encountering an extension in a v1 or v2 certificate.
+ *
+ * Uncomment to prevent an error.
+ */
+//#define MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3
+
+/**
+ * \def MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
+ *
+ * If set, the X509 parser will not break-off when parsing an X509 certificate
+ * and encountering an unknown critical extension.
+ *
+ * \warning Depending on your PKI use, enabling this can be a security risk!
+ *
+ * Uncomment to prevent an error.
+ */
+//#define MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
+
+/**
+ * \def MBEDTLS_X509_CHECK_KEY_USAGE
+ *
+ * Enable verification of the keyUsage extension (CA and leaf certificates).
+ *
+ * Disabling this avoids problems with mis-issued and/or misused
+ * (intermediate) CA and leaf certificates.
+ *
+ * \warning Depending on your PKI use, disabling this can be a security risk!
+ *
+ * Comment to skip keyUsage checking for both CA and leaf certificates.
+ */
+#define MBEDTLS_X509_CHECK_KEY_USAGE
+
+/**
+ * \def MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+ *
+ * Enable verification of the extendedKeyUsage extension (leaf certificates).
+ *
+ * Disabling this avoids problems with mis-issued and/or misused certificates.
+ *
+ * \warning Depending on your PKI use, disabling this can be a security risk!
+ *
+ * Comment to skip extendedKeyUsage checking for certificates.
+ */
+#define MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
+
+/**
+ * \def MBEDTLS_X509_RSASSA_PSS_SUPPORT
+ *
+ * Enable parsing and verification of X.509 certificates, CRLs and CSRS
+ * signed with RSASSA-PSS (aka PKCS#1 v2.1).
+ *
+ * Comment this macro to disallow using RSASSA-PSS in certificates.
+ */
+#define MBEDTLS_X509_RSASSA_PSS_SUPPORT
+
+/**
+ * \def MBEDTLS_ZLIB_SUPPORT
+ *
+ * If set, the SSL/TLS module uses ZLIB to support compression and
+ * decompression of packet data.
+ *
+ * \warning TLS-level compression MAY REDUCE SECURITY! See for example the
+ * CRIME attack. Before enabling this option, you should examine with care if
+ * CRIME or similar exploits may be a applicable to your use case.
+ *
+ * \note Currently compression can't be used with DTLS.
+ *
+ * \deprecated This feature is deprecated and will be removed
+ * in the next major revision of the library.
+ *
+ * Used in: library/ssl_tls.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * This feature requires zlib library and headers to be present.
+ *
+ * Uncomment to enable use of ZLIB
+ */
+//#define MBEDTLS_ZLIB_SUPPORT
+/* \} name SECTION: mbed TLS feature support */
+
+/**
+ * \name SECTION: mbed TLS modules
+ *
+ * This section enables or disables entire modules in mbed TLS
+ * \{
+ */
+
+/**
+ * \def MBEDTLS_AESNI_C
+ *
+ * Enable AES-NI support on x86-64.
+ *
+ * Module: library/aesni.c
+ * Caller: library/aes.c
+ *
+ * Requires: MBEDTLS_HAVE_ASM
+ *
+ * This modules adds support for the AES-NI instructions on x86-64
+ */
+#define MBEDTLS_AESNI_C
+
+/**
+ * \def MBEDTLS_AES_C
+ *
+ * Enable the AES block cipher.
+ *
+ * Module: library/aes.c
+ * Caller: library/cipher.c
+ * library/pem.c
+ * library/ctr_drbg.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA
+ *
+ * PEM_PARSE uses AES for decrypting encrypted keys.
+ */
+#define MBEDTLS_AES_C
+
+/**
+ * \def MBEDTLS_ARC4_C
+ *
+ * Enable the ARCFOUR stream cipher.
+ *
+ * Module: library/arc4.c
+ * Caller: library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_RSA_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_RSA_WITH_RC4_128_MD5
+ * MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA
+ * MBEDTLS_TLS_PSK_WITH_RC4_128_SHA
+ *
+ * \warning ARC4 is considered a weak cipher and its use constitutes a
+ * security risk. If possible, we recommend avoidng dependencies on
+ * it, and considering stronger ciphers instead.
+ *
+ */
+#define MBEDTLS_ARC4_C
+
+/**
+ * \def MBEDTLS_ASN1_PARSE_C
+ *
+ * Enable the generic ASN1 parser.
+ *
+ * Module: library/asn1.c
+ * Caller: library/x509.c
+ * library/dhm.c
+ * library/pkcs12.c
+ * library/pkcs5.c
+ * library/pkparse.c
+ */
+#define MBEDTLS_ASN1_PARSE_C
+
+/**
+ * \def MBEDTLS_ASN1_WRITE_C
+ *
+ * Enable the generic ASN1 writer.
+ *
+ * Module: library/asn1write.c
+ * Caller: library/ecdsa.c
+ * library/pkwrite.c
+ * library/x509_create.c
+ * library/x509write_crt.c
+ * library/x509write_csr.c
+ */
+#define MBEDTLS_ASN1_WRITE_C
+
+/**
+ * \def MBEDTLS_BASE64_C
+ *
+ * Enable the Base64 module.
+ *
+ * Module: library/base64.c
+ * Caller: library/pem.c
+ *
+ * This module is required for PEM support (required by X.509).
+ */
+#define MBEDTLS_BASE64_C
+
+/**
+ * \def MBEDTLS_BIGNUM_C
+ *
+ * Enable the multi-precision integer library.
+ *
+ * Module: library/bignum.c
+ * Caller: library/dhm.c
+ * library/ecp.c
+ * library/ecdsa.c
+ * library/rsa.c
+ * library/rsa_internal.c
+ * library/ssl_tls.c
+ *
+ * This module is required for RSA, DHM and ECC (ECDH, ECDSA) support.
+ */
+#define MBEDTLS_BIGNUM_C
+
+/**
+ * \def MBEDTLS_BLOWFISH_C
+ *
+ * Enable the Blowfish block cipher.
+ *
+ * Module: library/blowfish.c
+ */
+#define MBEDTLS_BLOWFISH_C
+
+/**
+ * \def MBEDTLS_CAMELLIA_C
+ *
+ * Enable the Camellia block cipher.
+ *
+ * Module: library/camellia.c
+ * Caller: library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256
+ */
+#define MBEDTLS_CAMELLIA_C
+
+/**
+ * \def MBEDTLS_ARIA_C
+ *
+ * Enable the ARIA block cipher.
+ *
+ * Module: library/aria.c
+ * Caller: library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ *
+ * MBEDTLS_TLS_RSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_PSK_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_PSK_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_256_CBC_SHA384
+ * MBEDTLS_TLS_PSK_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_PSK_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_128_GCM_SHA256
+ * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_256_GCM_SHA384
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_ARIA_128_CBC_SHA256
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_ARIA_256_CBC_SHA384
+ */
+//#define MBEDTLS_ARIA_C
+
+/**
+ * \def MBEDTLS_CCM_C
+ *
+ * Enable the Counter with CBC-MAC (CCM) mode for 128-bit block cipher.
+ *
+ * Module: library/ccm.c
+ *
+ * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C
+ *
+ * This module enables the AES-CCM ciphersuites, if other requisites are
+ * enabled as well.
+ */
+#define MBEDTLS_CCM_C
+
+/**
+ * \def MBEDTLS_CERTS_C
+ *
+ * Enable the test certificates.
+ *
+ * Module: library/certs.c
+ * Caller:
+ *
+ * This module is used for testing (ssl_client/server).
+ */
+#define MBEDTLS_CERTS_C
+
+/**
+ * \def MBEDTLS_CHACHA20_C
+ *
+ * Enable the ChaCha20 stream cipher.
+ *
+ * Module: library/chacha20.c
+ */
+#define MBEDTLS_CHACHA20_C
+
+/**
+ * \def MBEDTLS_CHACHAPOLY_C
+ *
+ * Enable the ChaCha20-Poly1305 AEAD algorithm.
+ *
+ * Module: library/chachapoly.c
+ *
+ * This module requires: MBEDTLS_CHACHA20_C, MBEDTLS_POLY1305_C
+ */
+#define MBEDTLS_CHACHAPOLY_C
+
+/**
+ * \def MBEDTLS_CIPHER_C
+ *
+ * Enable the generic cipher layer.
+ *
+ * Module: library/cipher.c
+ * Caller: library/ssl_tls.c
+ *
+ * Uncomment to enable generic cipher wrappers.
+ */
+#define MBEDTLS_CIPHER_C
+
+/**
+ * \def MBEDTLS_CMAC_C
+ *
+ * Enable the CMAC (Cipher-based Message Authentication Code) mode for block
+ * ciphers.
+ *
+ * Module: library/cmac.c
+ *
+ * Requires: MBEDTLS_AES_C or MBEDTLS_DES_C
+ *
+ */
+//#define MBEDTLS_CMAC_C
+
+/**
+ * \def MBEDTLS_CTR_DRBG_C
+ *
+ * Enable the CTR_DRBG AES-based random generator.
+ * The CTR_DRBG generator uses AES-256 by default.
+ * To use AES-128 instead, enable MBEDTLS_CTR_DRBG_USE_128_BIT_KEY below.
+ *
+ * Module: library/ctr_drbg.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_AES_C
+ *
+ * This module provides the CTR_DRBG AES random number generator.
+ */
+#define MBEDTLS_CTR_DRBG_C
+
+/**
+ * \def MBEDTLS_DEBUG_C
+ *
+ * Enable the debug functions.
+ *
+ * Module: library/debug.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ *
+ * This module provides debugging functions.
+ */
+#define MBEDTLS_DEBUG_C
+
+/**
+ * \def MBEDTLS_DES_C
+ *
+ * Enable the DES block cipher.
+ *
+ * Module: library/des.c
+ * Caller: library/pem.c
+ * library/cipher.c
+ *
+ * This module enables the following ciphersuites (if other requisites are
+ * enabled as well):
+ * MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA
+ * MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA
+ *
+ * PEM_PARSE uses DES/3DES for decrypting encrypted keys.
+ *
+ * \warning DES is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers instead.
+ */
+#define MBEDTLS_DES_C
+
+/**
+ * \def MBEDTLS_DHM_C
+ *
+ * Enable the Diffie-Hellman-Merkle module.
+ *
+ * Module: library/dhm.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * This module is used by the following key exchanges:
+ * DHE-RSA, DHE-PSK
+ *
+ * \warning Using DHE constitutes a security risk as it
+ * is not possible to validate custom DH parameters.
+ * If possible, it is recommended users should consider
+ * preferring other methods of key exchange.
+ * See dhm.h for more details.
+ *
+ */
+#define MBEDTLS_DHM_C
+
+/**
+ * \def MBEDTLS_ECDH_C
+ *
+ * Enable the elliptic curve Diffie-Hellman library.
+ *
+ * Module: library/ecdh.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * This module is used by the following key exchanges:
+ * ECDHE-ECDSA, ECDHE-RSA, DHE-PSK
+ *
+ * Requires: MBEDTLS_ECP_C
+ */
+#define MBEDTLS_ECDH_C
+
+/**
+ * \def MBEDTLS_ECDSA_C
+ *
+ * Enable the elliptic curve DSA library.
+ *
+ * Module: library/ecdsa.c
+ * Caller:
+ *
+ * This module is used by the following key exchanges:
+ * ECDHE-ECDSA
+ *
+ * Requires: MBEDTLS_ECP_C, MBEDTLS_ASN1_WRITE_C, MBEDTLS_ASN1_PARSE_C
+ */
+#define MBEDTLS_ECDSA_C
+
+/**
+ * \def MBEDTLS_ECJPAKE_C
+ *
+ * Enable the elliptic curve J-PAKE library.
+ *
+ * \warning This is currently experimental. EC J-PAKE support is based on the
+ * Thread v1.0.0 specification; incompatible changes to the specification
+ * might still happen. For this reason, this is disabled by default.
+ *
+ * Module: library/ecjpake.c
+ * Caller:
+ *
+ * This module is used by the following key exchanges:
+ * ECJPAKE
+ *
+ * Requires: MBEDTLS_ECP_C, MBEDTLS_MD_C
+ */
+//#define MBEDTLS_ECJPAKE_C
+
+/**
+ * \def MBEDTLS_ECP_C
+ *
+ * Enable the elliptic curve over GF(p) library.
+ *
+ * Module: library/ecp.c
+ * Caller: library/ecdh.c
+ * library/ecdsa.c
+ * library/ecjpake.c
+ *
+ * Requires: MBEDTLS_BIGNUM_C and at least one MBEDTLS_ECP_DP_XXX_ENABLED
+ */
+#define MBEDTLS_ECP_C
+
+/**
+ * \def MBEDTLS_ENTROPY_C
+ *
+ * Enable the platform-specific entropy code.
+ *
+ * Module: library/entropy.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SHA512_C or MBEDTLS_SHA256_C
+ *
+ * This module provides a generic entropy pool
+ */
+#define MBEDTLS_ENTROPY_C
+
+/**
+ * \def MBEDTLS_ERROR_C
+ *
+ * Enable error code to error string conversion.
+ *
+ * Module: library/error.c
+ * Caller:
+ *
+ * This module enables mbedtls_strerror().
+ */
+#define MBEDTLS_ERROR_C
+
+/**
+ * \def MBEDTLS_GCM_C
+ *
+ * Enable the Galois/Counter Mode (GCM) for AES.
+ *
+ * Module: library/gcm.c
+ *
+ * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C
+ *
+ * This module enables the AES-GCM and CAMELLIA-GCM ciphersuites, if other
+ * requisites are enabled as well.
+ */
+#define MBEDTLS_GCM_C
+
+/**
+ * \def MBEDTLS_HAVEGE_C
+ *
+ * Enable the HAVEGE random generator.
+ *
+ * Warning: the HAVEGE random generator is not suitable for virtualized
+ * environments
+ *
+ * Warning: the HAVEGE random generator is dependent on timing and specific
+ * processor traits. It is therefore not advised to use HAVEGE as
+ * your applications primary random generator or primary entropy pool
+ * input. As a secondary input to your entropy pool, it IS able add
+ * the (limited) extra entropy it provides.
+ *
+ * Module: library/havege.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_TIMING_C
+ *
+ * Uncomment to enable the HAVEGE random generator.
+ */
+//#define MBEDTLS_HAVEGE_C
+
+/**
+ * \def MBEDTLS_HKDF_C
+ *
+ * Enable the HKDF algorithm (RFC 5869).
+ *
+ * Module: library/hkdf.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_MD_C
+ *
+ * This module adds support for the Hashed Message Authentication Code
+ * (HMAC)-based key derivation function (HKDF).
+ */
+#define MBEDTLS_HKDF_C
+
+/**
+ * \def MBEDTLS_HMAC_DRBG_C
+ *
+ * Enable the HMAC_DRBG random generator.
+ *
+ * Module: library/hmac_drbg.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_MD_C
+ *
+ * Uncomment to enable the HMAC_DRBG random number geerator.
+ */
+#define MBEDTLS_HMAC_DRBG_C
+
+/**
+ * \def MBEDTLS_NIST_KW_C
+ *
+ * Enable the Key Wrapping mode for 128-bit block ciphers,
+ * as defined in NIST SP 800-38F. Only KW and KWP modes
+ * are supported. At the moment, only AES is approved by NIST.
+ *
+ * Module: library/nist_kw.c
+ *
+ * Requires: MBEDTLS_AES_C and MBEDTLS_CIPHER_C
+ */
+//#define MBEDTLS_NIST_KW_C
+
+/**
+ * \def MBEDTLS_MD_C
+ *
+ * Enable the generic message digest layer.
+ *
+ * Module: library/md.c
+ * Caller:
+ *
+ * Uncomment to enable generic message digest wrappers.
+ */
+#define MBEDTLS_MD_C
+
+/**
+ * \def MBEDTLS_MD2_C
+ *
+ * Enable the MD2 hash algorithm.
+ *
+ * Module: library/md2.c
+ * Caller:
+ *
+ * Uncomment to enable support for (rare) MD2-signed X.509 certs.
+ *
+ * \warning MD2 is considered a weak message digest and its use constitutes a
+ * security risk. If possible, we recommend avoiding dependencies on
+ * it, and considering stronger message digests instead.
+ *
+ */
+//#define MBEDTLS_MD2_C
+
+/**
+ * \def MBEDTLS_MD4_C
+ *
+ * Enable the MD4 hash algorithm.
+ *
+ * Module: library/md4.c
+ * Caller:
+ *
+ * Uncomment to enable support for (rare) MD4-signed X.509 certs.
+ *
+ * \warning MD4 is considered a weak message digest and its use constitutes a
+ * security risk. If possible, we recommend avoiding dependencies on
+ * it, and considering stronger message digests instead.
+ *
+ */
+//#define MBEDTLS_MD4_C
+
+/**
+ * \def MBEDTLS_MD5_C
+ *
+ * Enable the MD5 hash algorithm.
+ *
+ * Module: library/md5.c
+ * Caller: library/md.c
+ * library/pem.c
+ * library/ssl_tls.c
+ *
+ * This module is required for SSL/TLS up to version 1.1, and for TLS 1.2
+ * depending on the handshake parameters. Further, it is used for checking
+ * MD5-signed certificates, and for PBKDF1 when decrypting PEM-encoded
+ * encrypted keys.
+ *
+ * \warning MD5 is considered a weak message digest and its use constitutes a
+ * security risk. If possible, we recommend avoiding dependencies on
+ * it, and considering stronger message digests instead.
+ *
+ */
+#define MBEDTLS_MD5_C
+
+/**
+ * \def MBEDTLS_MEMORY_BUFFER_ALLOC_C
+ *
+ * Enable the buffer allocator implementation that makes use of a (stack)
+ * based buffer to 'allocate' dynamic memory. (replaces calloc() and free()
+ * calls)
+ *
+ * Module: library/memory_buffer_alloc.c
+ *
+ * Requires: MBEDTLS_PLATFORM_C
+ * MBEDTLS_PLATFORM_MEMORY (to use it within mbed TLS)
+ *
+ * Enable this module to enable the buffer memory allocator.
+ */
+//#define MBEDTLS_MEMORY_BUFFER_ALLOC_C
+
+/**
+ * \def MBEDTLS_NET_C
+ *
+ * Enable the TCP and UDP over IPv6/IPv4 networking routines.
+ *
+ * \note This module only works on POSIX/Unix (including Linux, BSD and OS X)
+ * and Windows. For other platforms, you'll want to disable it, and write your
+ * own networking callbacks to be passed to \c mbedtls_ssl_set_bio().
+ *
+ * \note See also our Knowledge Base article about porting to a new
+ * environment:
+ * https://tls.mbed.org/kb/how-to/how-do-i-port-mbed-tls-to-a-new-environment-OS
+ *
+ * Module: library/net_sockets.c
+ *
+ * This module provides networking routines.
+ */
+#define MBEDTLS_NET_C
+
+/**
+ * \def MBEDTLS_OID_C
+ *
+ * Enable the OID database.
+ *
+ * Module: library/oid.c
+ * Caller: library/asn1write.c
+ * library/pkcs5.c
+ * library/pkparse.c
+ * library/pkwrite.c
+ * library/rsa.c
+ * library/x509.c
+ * library/x509_create.c
+ * library/x509_crl.c
+ * library/x509_crt.c
+ * library/x509_csr.c
+ * library/x509write_crt.c
+ * library/x509write_csr.c
+ *
+ * This modules translates between OIDs and internal values.
+ */
+#define MBEDTLS_OID_C
+
+/**
+ * \def MBEDTLS_PADLOCK_C
+ *
+ * Enable VIA Padlock support on x86.
+ *
+ * Module: library/padlock.c
+ * Caller: library/aes.c
+ *
+ * Requires: MBEDTLS_HAVE_ASM
+ *
+ * This modules adds support for the VIA PadLock on x86.
+ */
+#define MBEDTLS_PADLOCK_C
+
+/**
+ * \def MBEDTLS_PEM_PARSE_C
+ *
+ * Enable PEM decoding / parsing.
+ *
+ * Module: library/pem.c
+ * Caller: library/dhm.c
+ * library/pkparse.c
+ * library/x509_crl.c
+ * library/x509_crt.c
+ * library/x509_csr.c
+ *
+ * Requires: MBEDTLS_BASE64_C
+ *
+ * This modules adds support for decoding / parsing PEM files.
+ */
+#define MBEDTLS_PEM_PARSE_C
+
+/**
+ * \def MBEDTLS_PEM_WRITE_C
+ *
+ * Enable PEM encoding / writing.
+ *
+ * Module: library/pem.c
+ * Caller: library/pkwrite.c
+ * library/x509write_crt.c
+ * library/x509write_csr.c
+ *
+ * Requires: MBEDTLS_BASE64_C
+ *
+ * This modules adds support for encoding / writing PEM files.
+ */
+#define MBEDTLS_PEM_WRITE_C
+
+/**
+ * \def MBEDTLS_PK_C
+ *
+ * Enable the generic public (asymetric) key layer.
+ *
+ * Module: library/pk.c
+ * Caller: library/ssl_tls.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * Requires: MBEDTLS_RSA_C or MBEDTLS_ECP_C
+ *
+ * Uncomment to enable generic public key wrappers.
+ */
+#define MBEDTLS_PK_C
+
+/**
+ * \def MBEDTLS_PK_PARSE_C
+ *
+ * Enable the generic public (asymetric) key parser.
+ *
+ * Module: library/pkparse.c
+ * Caller: library/x509_crt.c
+ * library/x509_csr.c
+ *
+ * Requires: MBEDTLS_PK_C
+ *
+ * Uncomment to enable generic public key parse functions.
+ */
+#define MBEDTLS_PK_PARSE_C
+
+/**
+ * \def MBEDTLS_PK_WRITE_C
+ *
+ * Enable the generic public (asymetric) key writer.
+ *
+ * Module: library/pkwrite.c
+ * Caller: library/x509write.c
+ *
+ * Requires: MBEDTLS_PK_C
+ *
+ * Uncomment to enable generic public key write functions.
+ */
+#define MBEDTLS_PK_WRITE_C
+
+/**
+ * \def MBEDTLS_PKCS5_C
+ *
+ * Enable PKCS#5 functions.
+ *
+ * Module: library/pkcs5.c
+ *
+ * Requires: MBEDTLS_MD_C
+ *
+ * This module adds support for the PKCS#5 functions.
+ */
+#define MBEDTLS_PKCS5_C
+
+/**
+ * \def MBEDTLS_PKCS11_C
+ *
+ * Enable wrapper for PKCS#11 smartcard support.
+ *
+ * Module: library/pkcs11.c
+ * Caller: library/pk.c
+ *
+ * Requires: MBEDTLS_PK_C
+ *
+ * This module enables SSL/TLS PKCS #11 smartcard support.
+ * Requires the presence of the PKCS#11 helper library (libpkcs11-helper)
+ */
+//#define MBEDTLS_PKCS11_C
+
+/**
+ * \def MBEDTLS_PKCS12_C
+ *
+ * Enable PKCS#12 PBE functions.
+ * Adds algorithms for parsing PKCS#8 encrypted private keys
+ *
+ * Module: library/pkcs12.c
+ * Caller: library/pkparse.c
+ *
+ * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_CIPHER_C, MBEDTLS_MD_C
+ * Can use: MBEDTLS_ARC4_C
+ *
+ * This module enables PKCS#12 functions.
+ */
+#define MBEDTLS_PKCS12_C
+
+/**
+ * \def MBEDTLS_PLATFORM_C
+ *
+ * Enable the platform abstraction layer that allows you to re-assign
+ * functions like calloc(), free(), snprintf(), printf(), fprintf(), exit().
+ *
+ * Enabling MBEDTLS_PLATFORM_C enables to use of MBEDTLS_PLATFORM_XXX_ALT
+ * or MBEDTLS_PLATFORM_XXX_MACRO directives, allowing the functions mentioned
+ * above to be specified at runtime or compile time respectively.
+ *
+ * \note This abstraction layer must be enabled on Windows (including MSYS2)
+ * as other module rely on it for a fixed snprintf implementation.
+ *
+ * Module: library/platform.c
+ * Caller: Most other .c files
+ *
+ * This module enables abstraction of common (libc) functions.
+ */
+#define MBEDTLS_PLATFORM_C
+
+/**
+ * \def MBEDTLS_POLY1305_C
+ *
+ * Enable the Poly1305 MAC algorithm.
+ *
+ * Module: library/poly1305.c
+ * Caller: library/chachapoly.c
+ */
+#define MBEDTLS_POLY1305_C
+
+/**
+ * \def MBEDTLS_RIPEMD160_C
+ *
+ * Enable the RIPEMD-160 hash algorithm.
+ *
+ * Module: library/ripemd160.c
+ * Caller: library/md.c
+ *
+ */
+#define MBEDTLS_RIPEMD160_C
+
+/**
+ * \def MBEDTLS_RSA_C
+ *
+ * Enable the RSA public-key cryptosystem.
+ *
+ * Module: library/rsa.c
+ * library/rsa_internal.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ * library/x509.c
+ *
+ * This module is used by the following key exchanges:
+ * RSA, DHE-RSA, ECDHE-RSA, RSA-PSK
+ *
+ * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C
+ */
+#define MBEDTLS_RSA_C
+
+/**
+ * \def MBEDTLS_SHA1_C
+ *
+ * Enable the SHA1 cryptographic hash algorithm.
+ *
+ * Module: library/sha1.c
+ * Caller: library/md.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ * library/x509write_crt.c
+ *
+ * This module is required for SSL/TLS up to version 1.1, for TLS 1.2
+ * depending on the handshake parameters, and for SHA1-signed certificates.
+ *
+ * \warning SHA-1 is considered a weak message digest and its use constitutes
+ * a security risk. If possible, we recommend avoiding dependencies
+ * on it, and considering stronger message digests instead.
+ *
+ */
+#define MBEDTLS_SHA1_C
+
+/**
+ * \def MBEDTLS_SHA256_C
+ *
+ * Enable the SHA-224 and SHA-256 cryptographic hash algorithms.
+ *
+ * Module: library/sha256.c
+ * Caller: library/entropy.c
+ * library/md.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ *
+ * This module adds support for SHA-224 and SHA-256.
+ * This module is required for the SSL/TLS 1.2 PRF function.
+ */
+#define MBEDTLS_SHA256_C
+
+/**
+ * \def MBEDTLS_SHA512_C
+ *
+ * Enable the SHA-384 and SHA-512 cryptographic hash algorithms.
+ *
+ * Module: library/sha512.c
+ * Caller: library/entropy.c
+ * library/md.c
+ * library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * This module adds support for SHA-384 and SHA-512.
+ */
+#define MBEDTLS_SHA512_C
+
+/**
+ * \def MBEDTLS_SSL_CACHE_C
+ *
+ * Enable simple SSL cache implementation.
+ *
+ * Module: library/ssl_cache.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SSL_CACHE_C
+ */
+#define MBEDTLS_SSL_CACHE_C
+
+/**
+ * \def MBEDTLS_SSL_COOKIE_C
+ *
+ * Enable basic implementation of DTLS cookies for hello verification.
+ *
+ * Module: library/ssl_cookie.c
+ * Caller:
+ */
+#define MBEDTLS_SSL_COOKIE_C
+
+/**
+ * \def MBEDTLS_SSL_TICKET_C
+ *
+ * Enable an implementation of TLS server-side callbacks for session tickets.
+ *
+ * Module: library/ssl_ticket.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_CIPHER_C
+ */
+#define MBEDTLS_SSL_TICKET_C
+
+/**
+ * \def MBEDTLS_SSL_CLI_C
+ *
+ * Enable the SSL/TLS client code.
+ *
+ * Module: library/ssl_cli.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SSL_TLS_C
+ *
+ * This module is required for SSL/TLS client support.
+ */
+#define MBEDTLS_SSL_CLI_C
+
+/**
+ * \def MBEDTLS_SSL_SRV_C
+ *
+ * Enable the SSL/TLS server code.
+ *
+ * Module: library/ssl_srv.c
+ * Caller:
+ *
+ * Requires: MBEDTLS_SSL_TLS_C
+ *
+ * This module is required for SSL/TLS server support.
+ */
+#define MBEDTLS_SSL_SRV_C
+
+/**
+ * \def MBEDTLS_SSL_TLS_C
+ *
+ * Enable the generic SSL/TLS code.
+ *
+ * Module: library/ssl_tls.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ *
+ * Requires: MBEDTLS_CIPHER_C, MBEDTLS_MD_C
+ * and at least one of the MBEDTLS_SSL_PROTO_XXX defines
+ *
+ * This module is required for SSL/TLS.
+ */
+#define MBEDTLS_SSL_TLS_C
+
+/**
+ * \def MBEDTLS_THREADING_C
+ *
+ * Enable the threading abstraction layer.
+ * By default mbed TLS assumes it is used in a non-threaded environment or that
+ * contexts are not shared between threads. If you do intend to use contexts
+ * between threads, you will need to enable this layer to prevent race
+ * conditions. See also our Knowledge Base article about threading:
+ * https://tls.mbed.org/kb/development/thread-safety-and-multi-threading
+ *
+ * Module: library/threading.c
+ *
+ * This allows different threading implementations (self-implemented or
+ * provided).
+ *
+ * You will have to enable either MBEDTLS_THREADING_ALT or
+ * MBEDTLS_THREADING_PTHREAD.
+ *
+ * Enable this layer to allow use of mutexes within mbed TLS
+ */
+//#define MBEDTLS_THREADING_C
+
+/**
+ * \def MBEDTLS_TIMING_C
+ *
+ * Enable the semi-portable timing interface.
+ *
+ * \note The provided implementation only works on POSIX/Unix (including Linux,
+ * BSD and OS X) and Windows. On other platforms, you can either disable that
+ * module and provide your own implementations of the callbacks needed by
+ * \c mbedtls_ssl_set_timer_cb() for DTLS, or leave it enabled and provide
+ * your own implementation of the whole module by setting
+ * \c MBEDTLS_TIMING_ALT in the current file.
+ *
+ * \note See also our Knowledge Base article about porting to a new
+ * environment:
+ * https://tls.mbed.org/kb/how-to/how-do-i-port-mbed-tls-to-a-new-environment-OS
+ *
+ * Module: library/timing.c
+ * Caller: library/havege.c
+ *
+ * This module is used by the HAVEGE random number generator.
+ */
+#define MBEDTLS_TIMING_C
+
+/**
+ * \def MBEDTLS_VERSION_C
+ *
+ * Enable run-time version information.
+ *
+ * Module: library/version.c
+ *
+ * This module provides run-time version information.
+ */
+#define MBEDTLS_VERSION_C
+
+/**
+ * \def MBEDTLS_X509_USE_C
+ *
+ * Enable X.509 core for using certificates.
+ *
+ * Module: library/x509.c
+ * Caller: library/x509_crl.c
+ * library/x509_crt.c
+ * library/x509_csr.c
+ *
+ * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_BIGNUM_C, MBEDTLS_OID_C,
+ * MBEDTLS_PK_PARSE_C
+ *
+ * This module is required for the X.509 parsing modules.
+ */
+#define MBEDTLS_X509_USE_C
+
+/**
+ * \def MBEDTLS_X509_CRT_PARSE_C
+ *
+ * Enable X.509 certificate parsing.
+ *
+ * Module: library/x509_crt.c
+ * Caller: library/ssl_cli.c
+ * library/ssl_srv.c
+ * library/ssl_tls.c
+ *
+ * Requires: MBEDTLS_X509_USE_C
+ *
+ * This module is required for X.509 certificate parsing.
+ */
+#define MBEDTLS_X509_CRT_PARSE_C
+
+/**
+ * \def MBEDTLS_X509_CRL_PARSE_C
+ *
+ * Enable X.509 CRL parsing.
+ *
+ * Module: library/x509_crl.c
+ * Caller: library/x509_crt.c
+ *
+ * Requires: MBEDTLS_X509_USE_C
+ *
+ * This module is required for X.509 CRL parsing.
+ */
+#define MBEDTLS_X509_CRL_PARSE_C
+
+/**
+ * \def MBEDTLS_X509_CSR_PARSE_C
+ *
+ * Enable X.509 Certificate Signing Request (CSR) parsing.
+ *
+ * Module: library/x509_csr.c
+ * Caller: library/x509_crt_write.c
+ *
+ * Requires: MBEDTLS_X509_USE_C
+ *
+ * This module is used for reading X.509 certificate request.
+ */
+#define MBEDTLS_X509_CSR_PARSE_C
+
+/**
+ * \def MBEDTLS_X509_CREATE_C
+ *
+ * Enable X.509 core for creating certificates.
+ *
+ * Module: library/x509_create.c
+ *
+ * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C, MBEDTLS_PK_WRITE_C
+ *
+ * This module is the basis for creating X.509 certificates and CSRs.
+ */
+#define MBEDTLS_X509_CREATE_C
+
+/**
+ * \def MBEDTLS_X509_CRT_WRITE_C
+ *
+ * Enable creating X.509 certificates.
+ *
+ * Module: library/x509_crt_write.c
+ *
+ * Requires: MBEDTLS_X509_CREATE_C
+ *
+ * This module is required for X.509 certificate creation.
+ */
+#define MBEDTLS_X509_CRT_WRITE_C
+
+/**
+ * \def MBEDTLS_X509_CSR_WRITE_C
+ *
+ * Enable creating X.509 Certificate Signing Requests (CSR).
+ *
+ * Module: library/x509_csr_write.c
+ *
+ * Requires: MBEDTLS_X509_CREATE_C
+ *
+ * This module is required for X.509 certificate request writing.
+ */
+#define MBEDTLS_X509_CSR_WRITE_C
+
+/**
+ * \def MBEDTLS_XTEA_C
+ *
+ * Enable the XTEA block cipher.
+ *
+ * Module: library/xtea.c
+ * Caller:
+ */
+#define MBEDTLS_XTEA_C
+
+/* \} name SECTION: mbed TLS modules */
+
+/**
+ * \name SECTION: Module configuration options
+ *
+ * This section allows for the setting of module specific sizes and
+ * configuration options. The default values are already present in the
+ * relevant header files and should suffice for the regular use cases.
+ *
+ * Our advice is to enable options and change their values here
+ * only if you have a good reason and know the consequences.
+ *
+ * Please check the respective header file for documentation on these
+ * parameters (to prevent duplicate documentation).
+ * \{
+ */
+
+/* MPI / BIGNUM options */
+//#define MBEDTLS_MPI_WINDOW_SIZE 6 /**< Maximum windows size used. */
+//#define MBEDTLS_MPI_MAX_SIZE 1024 /**< Maximum number of bytes for usable MPIs. */
+
+/* CTR_DRBG options */
+//#define MBEDTLS_CTR_DRBG_ENTROPY_LEN 48 /**< Amount of entropy used per seed by default (48 with SHA-512, 32 with SHA-256) */
+//#define MBEDTLS_CTR_DRBG_RESEED_INTERVAL 10000 /**< Interval before reseed is performed by default */
+//#define MBEDTLS_CTR_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */
+//#define MBEDTLS_CTR_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */
+//#define MBEDTLS_CTR_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */
+//#define MBEDTLS_CTR_DRBG_USE_128_BIT_KEY /**< Use 128-bit key for CTR_DRBG - may reduce security (see ctr_drbg.h) */
+
+/* HMAC_DRBG options */
+//#define MBEDTLS_HMAC_DRBG_RESEED_INTERVAL 10000 /**< Interval before reseed is performed by default */
+//#define MBEDTLS_HMAC_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */
+//#define MBEDTLS_HMAC_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */
+//#define MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */
+
+/* ECP options */
+//#define MBEDTLS_ECP_MAX_BITS 521 /**< Maximum bit size of groups */
+//#define MBEDTLS_ECP_WINDOW_SIZE 6 /**< Maximum window size used */
+//#define MBEDTLS_ECP_FIXED_POINT_OPTIM 1 /**< Enable fixed-point speed-up */
+
+/* Entropy options */
+//#define MBEDTLS_ENTROPY_MAX_SOURCES 20 /**< Maximum number of sources supported */
+//#define MBEDTLS_ENTROPY_MAX_GATHER 128 /**< Maximum amount requested from entropy sources */
+//#define MBEDTLS_ENTROPY_MIN_HARDWARE 32 /**< Default minimum number of bytes required for the hardware entropy source mbedtls_hardware_poll() before entropy is released */
+
+/* Memory buffer allocator options */
+//#define MBEDTLS_MEMORY_ALIGN_MULTIPLE 4 /**< Align on multiples of this value */
+
+/* Platform options */
+//#define MBEDTLS_PLATFORM_STD_MEM_HDR <stdlib.h> /**< Header to include if MBEDTLS_PLATFORM_NO_STD_FUNCTIONS is defined. Don't define if no header is needed. */
+//#define MBEDTLS_PLATFORM_STD_CALLOC calloc /**< Default allocator to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_FREE free /**< Default free to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_EXIT exit /**< Default exit to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_TIME time /**< Default time to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */
+//#define MBEDTLS_PLATFORM_STD_FPRINTF fprintf /**< Default fprintf to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_PRINTF printf /**< Default printf to use, can be undefined */
+/* Note: your snprintf must correclty zero-terminate the buffer! */
+//#define MBEDTLS_PLATFORM_STD_SNPRINTF snprintf /**< Default snprintf to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_EXIT_SUCCESS 0 /**< Default exit value to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_EXIT_FAILURE 1 /**< Default exit value to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_NV_SEED_READ mbedtls_platform_std_nv_seed_read /**< Default nv_seed_read function to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_NV_SEED_WRITE mbedtls_platform_std_nv_seed_write /**< Default nv_seed_write function to use, can be undefined */
+//#define MBEDTLS_PLATFORM_STD_NV_SEED_FILE "seedfile" /**< Seed file to read/write with default implementation */
+
+/* To Use Function Macros MBEDTLS_PLATFORM_C must be enabled */
+/* MBEDTLS_PLATFORM_XXX_MACRO and MBEDTLS_PLATFORM_XXX_ALT cannot both be defined */
+//#define MBEDTLS_PLATFORM_CALLOC_MACRO calloc /**< Default allocator macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_FREE_MACRO free /**< Default free macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_EXIT_MACRO exit /**< Default exit macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_TIME_MACRO time /**< Default time macro to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */
+//#define MBEDTLS_PLATFORM_TIME_TYPE_MACRO time_t /**< Default time macro to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */
+//#define MBEDTLS_PLATFORM_FPRINTF_MACRO fprintf /**< Default fprintf macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_PRINTF_MACRO printf /**< Default printf macro to use, can be undefined */
+/* Note: your snprintf must correclty zero-terminate the buffer! */
+//#define MBEDTLS_PLATFORM_SNPRINTF_MACRO snprintf /**< Default snprintf macro to use, can be undefined */
+//#define MBEDTLS_PLATFORM_NV_SEED_READ_MACRO mbedtls_platform_std_nv_seed_read /**< Default nv_seed_read function to use, can be undefined */
+//#define MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO mbedtls_platform_std_nv_seed_write /**< Default nv_seed_write function to use, can be undefined */
+
+/**
+ * \brief This macro is invoked by the library when an invalid parameter
+ * is detected that is only checked with MBEDTLS_CHECK_PARAMS
+ * (see the documentation of that option for context).
+ *
+ * When you leave this undefined here, a default definition is
+ * provided that invokes the function mbedtls_param_failed(),
+ * which is declared in platform_util.h for the benefit of the
+ * library, but that you need to define in your application.
+ *
+ * When you define this here, this replaces the default
+ * definition in platform_util.h (which no longer declares the
+ * function mbedtls_param_failed()) and it is your responsibility
+ * to make sure this macro expands to something suitable (in
+ * particular, that all the necessary declarations are visible
+ * from within the library - you can ensure that by providing
+ * them in this file next to the macro definition).
+ *
+ * Note that you may define this macro to expand to nothing, in
+ * which case you don't have to worry about declarations or
+ * definitions. However, you will then be notified about invalid
+ * parameters only in non-void functions, and void function will
+ * just silently return early on invalid parameters, which
+ * partially negates the benefits of enabling
+ * #MBEDTLS_CHECK_PARAMS in the first place, so is discouraged.
+ *
+ * \param cond The expression that should evaluate to true, but doesn't.
+ */
+//#define MBEDTLS_PARAM_FAILED( cond ) assert( cond )
+
+/* SSL Cache options */
+//#define MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT 86400 /**< 1 day */
+//#define MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES 50 /**< Maximum entries in cache */
+
+/* SSL options */
+
+/** \def MBEDTLS_SSL_MAX_CONTENT_LEN
+ *
+ * Maximum length (in bytes) of incoming and outgoing plaintext fragments.
+ *
+ * This determines the size of both the incoming and outgoing TLS I/O buffers
+ * in such a way that both are capable of holding the specified amount of
+ * plaintext data, regardless of the protection mechanism used.
+ *
+ * To configure incoming and outgoing I/O buffers separately, use
+ * #MBEDTLS_SSL_IN_CONTENT_LEN and #MBEDTLS_SSL_OUT_CONTENT_LEN,
+ * which overwrite the value set by this option.
+ *
+ * \note When using a value less than the default of 16KB on the client, it is
+ * recommended to use the Maximum Fragment Length (MFL) extension to
+ * inform the server about this limitation. On the server, there
+ * is no supported, standardized way of informing the client about
+ * restriction on the maximum size of incoming messages, and unless
+ * the limitation has been communicated by other means, it is recommended
+ * to only change the outgoing buffer size #MBEDTLS_SSL_OUT_CONTENT_LEN
+ * while keeping the default value of 16KB for the incoming buffer.
+ *
+ * Uncomment to set the maximum plaintext size of both
+ * incoming and outgoing I/O buffers.
+ */
+//#define MBEDTLS_SSL_MAX_CONTENT_LEN 16384
+
+/** \def MBEDTLS_SSL_IN_CONTENT_LEN
+ *
+ * Maximum length (in bytes) of incoming plaintext fragments.
+ *
+ * This determines the size of the incoming TLS I/O buffer in such a way
+ * that it is capable of holding the specified amount of plaintext data,
+ * regardless of the protection mechanism used.
+ *
+ * If this option is undefined, it inherits its value from
+ * #MBEDTLS_SSL_MAX_CONTENT_LEN.
+ *
+ * \note When using a value less than the default of 16KB on the client, it is
+ * recommended to use the Maximum Fragment Length (MFL) extension to
+ * inform the server about this limitation. On the server, there
+ * is no supported, standardized way of informing the client about
+ * restriction on the maximum size of incoming messages, and unless
+ * the limitation has been communicated by other means, it is recommended
+ * to only change the outgoing buffer size #MBEDTLS_SSL_OUT_CONTENT_LEN
+ * while keeping the default value of 16KB for the incoming buffer.
+ *
+ * Uncomment to set the maximum plaintext size of the incoming I/O buffer
+ * independently of the outgoing I/O buffer.
+ */
+//#define MBEDTLS_SSL_IN_CONTENT_LEN 16384
+
+/** \def MBEDTLS_SSL_OUT_CONTENT_LEN
+ *
+ * Maximum length (in bytes) of outgoing plaintext fragments.
+ *
+ * This determines the size of the outgoing TLS I/O buffer in such a way
+ * that it is capable of holding the specified amount of plaintext data,
+ * regardless of the protection mechanism used.
+ *
+ * If this option undefined, it inherits its value from
+ * #MBEDTLS_SSL_MAX_CONTENT_LEN.
+ *
+ * It is possible to save RAM by setting a smaller outward buffer, while keeping
+ * the default inward 16384 byte buffer to conform to the TLS specification.
+ *
+ * The minimum required outward buffer size is determined by the handshake
+ * protocol's usage. Handshaking will fail if the outward buffer is too small.
+ * The specific size requirement depends on the configured ciphers and any
+ * certificate data which is sent during the handshake.
+ *
+ * Uncomment to set the maximum plaintext size of the outgoing I/O buffer
+ * independently of the incoming I/O buffer.
+ */
+//#define MBEDTLS_SSL_OUT_CONTENT_LEN 16384
+
+/** \def MBEDTLS_SSL_DTLS_MAX_BUFFERING
+ *
+ * Maximum number of heap-allocated bytes for the purpose of
+ * DTLS handshake message reassembly and future message buffering.
+ *
+ * This should be at least 9/8 * MBEDTLSSL_IN_CONTENT_LEN
+ * to account for a reassembled handshake message of maximum size,
+ * together with its reassembly bitmap.
+ *
+ * A value of 2 * MBEDTLS_SSL_IN_CONTENT_LEN (32768 by default)
+ * should be sufficient for all practical situations as it allows
+ * to reassembly a large handshake message (such as a certificate)
+ * while buffering multiple smaller handshake messages.
+ *
+ */
+//#define MBEDTLS_SSL_DTLS_MAX_BUFFERING 32768
+
+//#define MBEDTLS_SSL_DEFAULT_TICKET_LIFETIME 86400 /**< Lifetime of session tickets (if enabled) */
+//#define MBEDTLS_PSK_MAX_LEN 32 /**< Max size of TLS pre-shared keys, in bytes (default 256 bits) */
+//#define MBEDTLS_SSL_COOKIE_TIMEOUT 60 /**< Default expiration delay of DTLS cookies, in seconds if HAVE_TIME, or in number of cookies issued */
+
+/**
+ * Complete list of ciphersuites to use, in order of preference.
+ *
+ * \warning No dependency checking is done on that field! This option can only
+ * be used to restrict the set of available ciphersuites. It is your
+ * responsibility to make sure the needed modules are active.
+ *
+ * Use this to save a few hundred bytes of ROM (default ordering of all
+ * available ciphersuites) and a few to a few hundred bytes of RAM.
+ *
+ * The value below is only an example, not the default.
+ */
+//#define MBEDTLS_SSL_CIPHERSUITES MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384,MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
+
+/* X509 options */
+//#define MBEDTLS_X509_MAX_INTERMEDIATE_CA 8 /**< Maximum number of intermediate CAs in a verification chain. */
+//#define MBEDTLS_X509_MAX_FILE_PATH_LEN 512 /**< Maximum length of a path/filename string in bytes including the null terminator character ('\0'). */
+
+/**
+ * Allow SHA-1 in the default TLS configuration for certificate signing.
+ * Without this build-time option, SHA-1 support must be activated explicitly
+ * through mbedtls_ssl_conf_cert_profile. Turning on this option is not
+ * recommended because of it is possible to generate SHA-1 collisions, however
+ * this may be safe for legacy infrastructure where additional controls apply.
+ *
+ * \warning SHA-1 is considered a weak message digest and its use constitutes
+ * a security risk. If possible, we recommend avoiding dependencies
+ * on it, and considering stronger message digests instead.
+ *
+ */
+// #define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_CERTIFICATES
+
+/**
+ * Allow SHA-1 in the default TLS configuration for TLS 1.2 handshake
+ * signature and ciphersuite selection. Without this build-time option, SHA-1
+ * support must be activated explicitly through mbedtls_ssl_conf_sig_hashes.
+ * The use of SHA-1 in TLS <= 1.1 and in HMAC-SHA-1 is always allowed by
+ * default. At the time of writing, there is no practical attack on the use
+ * of SHA-1 in handshake signatures, hence this option is turned on by default
+ * to preserve compatibility with existing peers, but the general
+ * warning applies nonetheless:
+ *
+ * \warning SHA-1 is considered a weak message digest and its use constitutes
+ * a security risk. If possible, we recommend avoiding dependencies
+ * on it, and considering stronger message digests instead.
+ *
+ */
+#define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE
+
+/**
+ * Uncomment the macro to let mbed TLS use your alternate implementation of
+ * mbedtls_platform_zeroize(). This replaces the default implementation in
+ * platform_util.c.
+ *
+ * mbedtls_platform_zeroize() is a widely used function across the library to
+ * zero a block of memory. The implementation is expected to be secure in the
+ * sense that it has been written to prevent the compiler from removing calls
+ * to mbedtls_platform_zeroize() as part of redundant code elimination
+ * optimizations. However, it is difficult to guarantee that calls to
+ * mbedtls_platform_zeroize() will not be optimized by the compiler as older
+ * versions of the C language standards do not provide a secure implementation
+ * of memset(). Therefore, MBEDTLS_PLATFORM_ZEROIZE_ALT enables users to
+ * configure their own implementation of mbedtls_platform_zeroize(), for
+ * example by using directives specific to their compiler, features from newer
+ * C standards (e.g using memset_s() in C11) or calling a secure memset() from
+ * their system (e.g explicit_bzero() in BSD).
+ */
+//#define MBEDTLS_PLATFORM_ZEROIZE_ALT
+
+/**
+ * Uncomment the macro to let Mbed TLS use your alternate implementation of
+ * mbedtls_platform_gmtime_r(). This replaces the default implementation in
+ * platform_util.c.
+ *
+ * gmtime() is not a thread-safe function as defined in the C standard. The
+ * library will try to use safer implementations of this function, such as
+ * gmtime_r() when available. However, if Mbed TLS cannot identify the target
+ * system, the implementation of mbedtls_platform_gmtime_r() will default to
+ * using the standard gmtime(). In this case, calls from the library to
+ * gmtime() will be guarded by the global mutex mbedtls_threading_gmtime_mutex
+ * if MBEDTLS_THREADING_C is enabled. We recommend that calls from outside the
+ * library are also guarded with this mutex to avoid race conditions. However,
+ * if the macro MBEDTLS_PLATFORM_GMTIME_R_ALT is defined, Mbed TLS will
+ * unconditionally use the implementation for mbedtls_platform_gmtime_r()
+ * supplied at compile time.
+ */
+//#define MBEDTLS_PLATFORM_GMTIME_R_ALT
+
+/* \} name SECTION: Customisation configuration options */
+
+/* Target and application specific configurations
+ *
+ * Allow user to override any previous default.
+ *
+ */
+#if defined(MBEDTLS_USER_CONFIG_FILE)
+#include MBEDTLS_USER_CONFIG_FILE
+#endif
+
+#include "check_config.h"
+
+#endif /* MBEDTLS_CONFIG_H */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ctr_drbg.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ctr_drbg.h
new file mode 100644
index 0000000..cc3df7b
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ctr_drbg.h
@@ -0,0 +1,380 @@
+/**
+ * \file ctr_drbg.h
+ *
+ * \brief This file contains CTR_DRBG definitions and functions.
+ *
+ * CTR_DRBG is a standardized way of building a PRNG from a block-cipher
+ * in counter mode operation, as defined in <em>NIST SP 800-90A:
+ * Recommendation for Random Number Generation Using Deterministic Random
+ * Bit Generators</em>.
+ *
+ * The Mbed TLS implementation of CTR_DRBG uses AES-256 (default) or AES-128
+ * as the underlying block cipher.
+ *
+ * \warning Using 128-bit keys for CTR_DRBG limits the security of generated
+ * keys and operations that use random values generated to 128-bit security.
+ */
+/*
+ * Copyright (C) 2006-2018, Arm Limited (or its affiliates), All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of Mbed TLS (https://tls.mbed.org)
+ */
+
+#ifndef MBEDTLS_CTR_DRBG_H
+#define MBEDTLS_CTR_DRBG_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "aes.h"
+
+#if defined(MBEDTLS_THREADING_C)
+#include "threading.h"
+#endif
+
+#define MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED -0x0034 /**< The entropy source failed. */
+#define MBEDTLS_ERR_CTR_DRBG_REQUEST_TOO_BIG -0x0036 /**< The requested random buffer length is too big. */
+#define MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG -0x0038 /**< The input (entropy + additional data) is too large. */
+#define MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR -0x003A /**< Read or write error in file. */
+
+#define MBEDTLS_CTR_DRBG_BLOCKSIZE 16 /**< The block size used by the cipher. */
+
+#if defined(MBEDTLS_CTR_DRBG_USE_128_BIT_KEY)
+#define MBEDTLS_CTR_DRBG_KEYSIZE 16 /**< The key size used by the cipher (compile-time choice: 128 bits). */
+#else
+#define MBEDTLS_CTR_DRBG_KEYSIZE 32 /**< The key size used by the cipher (compile-time choice: 256 bits). */
+#endif
+
+#define MBEDTLS_CTR_DRBG_KEYBITS ( MBEDTLS_CTR_DRBG_KEYSIZE * 8 ) /**< The key size for the DRBG operation, in bits. */
+#define MBEDTLS_CTR_DRBG_SEEDLEN ( MBEDTLS_CTR_DRBG_KEYSIZE + MBEDTLS_CTR_DRBG_BLOCKSIZE ) /**< The seed length, calculated as (counter + AES key). */
+
+/**
+ * \name SECTION: Module settings
+ *
+ * The configuration options you can set for this module are in this section.
+ * Either change them in config.h or define them using the compiler command
+ * line.
+ * \{
+ */
+
+#if !defined(MBEDTLS_CTR_DRBG_ENTROPY_LEN)
+#if defined(MBEDTLS_SHA512_C) && !defined(MBEDTLS_ENTROPY_FORCE_SHA256)
+#define MBEDTLS_CTR_DRBG_ENTROPY_LEN 48
+/**< The amount of entropy used per seed by default:
+ * <ul><li>48 with SHA-512.</li>
+ * <li>32 with SHA-256.</li></ul>
+ */
+#else
+#define MBEDTLS_CTR_DRBG_ENTROPY_LEN 32
+/**< Amount of entropy used per seed by default:
+ * <ul><li>48 with SHA-512.</li>
+ * <li>32 with SHA-256.</li></ul>
+ */
+#endif
+#endif
+
+#if !defined(MBEDTLS_CTR_DRBG_RESEED_INTERVAL)
+#define MBEDTLS_CTR_DRBG_RESEED_INTERVAL 10000
+/**< The interval before reseed is performed by default. */
+#endif
+
+#if !defined(MBEDTLS_CTR_DRBG_MAX_INPUT)
+#define MBEDTLS_CTR_DRBG_MAX_INPUT 256
+/**< The maximum number of additional input Bytes. */
+#endif
+
+#if !defined(MBEDTLS_CTR_DRBG_MAX_REQUEST)
+#define MBEDTLS_CTR_DRBG_MAX_REQUEST 1024
+/**< The maximum number of requested Bytes per call. */
+#endif
+
+#if !defined(MBEDTLS_CTR_DRBG_MAX_SEED_INPUT)
+#define MBEDTLS_CTR_DRBG_MAX_SEED_INPUT 384
+/**< The maximum size of seed or reseed buffer. */
+#endif
+
+/* \} name SECTION: Module settings */
+
+#define MBEDTLS_CTR_DRBG_PR_OFF 0
+/**< Prediction resistance is disabled. */
+#define MBEDTLS_CTR_DRBG_PR_ON 1
+/**< Prediction resistance is enabled. */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief The CTR_DRBG context structure.
+ */
+typedef struct mbedtls_ctr_drbg_context
+{
+ unsigned char counter[16]; /*!< The counter (V). */
+ int reseed_counter; /*!< The reseed counter. */
+ int prediction_resistance; /*!< This determines whether prediction
+ resistance is enabled, that is
+ whether to systematically reseed before
+ each random generation. */
+ size_t entropy_len; /*!< The amount of entropy grabbed on each
+ seed or reseed operation. */
+ int reseed_interval; /*!< The reseed interval. */
+
+ mbedtls_aes_context aes_ctx; /*!< The AES context. */
+
+ /*
+ * Callbacks (Entropy)
+ */
+ int (*f_entropy)(void *, unsigned char *, size_t);
+ /*!< The entropy callback function. */
+
+ void *p_entropy; /*!< The context for the entropy function. */
+
+#if defined(MBEDTLS_THREADING_C)
+ mbedtls_threading_mutex_t mutex;
+#endif
+}
+mbedtls_ctr_drbg_context;
+
+/**
+ * \brief This function initializes the CTR_DRBG context,
+ * and prepares it for mbedtls_ctr_drbg_seed()
+ * or mbedtls_ctr_drbg_free().
+ *
+ * \param ctx The CTR_DRBG context to initialize.
+ */
+void mbedtls_ctr_drbg_init( mbedtls_ctr_drbg_context *ctx );
+
+/**
+ * \brief This function seeds and sets up the CTR_DRBG
+ * entropy source for future reseeds.
+ *
+ * \note Personalization data can be provided in addition to the more generic
+ * entropy source, to make this instantiation as unique as possible.
+ *
+ * \param ctx The CTR_DRBG context to seed.
+ * \param f_entropy The entropy callback, taking as arguments the
+ * \p p_entropy context, the buffer to fill, and the
+ length of the buffer.
+ * \param p_entropy The entropy context.
+ * \param custom Personalization data, that is device-specific
+ identifiers. Can be NULL.
+ * \param len The length of the personalization data.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED on failure.
+ */
+int mbedtls_ctr_drbg_seed( mbedtls_ctr_drbg_context *ctx,
+ int (*f_entropy)(void *, unsigned char *, size_t),
+ void *p_entropy,
+ const unsigned char *custom,
+ size_t len );
+
+/**
+ * \brief This function clears CTR_CRBG context data.
+ *
+ * \param ctx The CTR_DRBG context to clear.
+ */
+void mbedtls_ctr_drbg_free( mbedtls_ctr_drbg_context *ctx );
+
+/**
+ * \brief This function turns prediction resistance on or off.
+ * The default value is off.
+ *
+ * \note If enabled, entropy is gathered at the beginning of
+ * every call to mbedtls_ctr_drbg_random_with_add().
+ * Only use this if your entropy source has sufficient
+ * throughput.
+ *
+ * \param ctx The CTR_DRBG context.
+ * \param resistance #MBEDTLS_CTR_DRBG_PR_ON or #MBEDTLS_CTR_DRBG_PR_OFF.
+ */
+void mbedtls_ctr_drbg_set_prediction_resistance( mbedtls_ctr_drbg_context *ctx,
+ int resistance );
+
+/**
+ * \brief This function sets the amount of entropy grabbed on each
+ * seed or reseed. The default value is
+ * #MBEDTLS_CTR_DRBG_ENTROPY_LEN.
+ *
+ * \param ctx The CTR_DRBG context.
+ * \param len The amount of entropy to grab.
+ */
+void mbedtls_ctr_drbg_set_entropy_len( mbedtls_ctr_drbg_context *ctx,
+ size_t len );
+
+/**
+ * \brief This function sets the reseed interval.
+ * The default value is #MBEDTLS_CTR_DRBG_RESEED_INTERVAL.
+ *
+ * \param ctx The CTR_DRBG context.
+ * \param interval The reseed interval.
+ */
+void mbedtls_ctr_drbg_set_reseed_interval( mbedtls_ctr_drbg_context *ctx,
+ int interval );
+
+/**
+ * \brief This function reseeds the CTR_DRBG context, that is
+ * extracts data from the entropy source.
+ *
+ * \param ctx The CTR_DRBG context.
+ * \param additional Additional data to add to the state. Can be NULL.
+ * \param len The length of the additional data.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED on failure.
+ */
+int mbedtls_ctr_drbg_reseed( mbedtls_ctr_drbg_context *ctx,
+ const unsigned char *additional, size_t len );
+
+/**
+ * \brief This function updates the state of the CTR_DRBG context.
+ *
+ * \param ctx The CTR_DRBG context.
+ * \param additional The data to update the state with.
+ * \param add_len Length of \p additional in bytes. This must be at
+ * most #MBEDTLS_CTR_DRBG_MAX_SEED_INPUT.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG if
+ * \p add_len is more than
+ * #MBEDTLS_CTR_DRBG_MAX_SEED_INPUT.
+ * \return An error from the underlying AES cipher on failure.
+ */
+int mbedtls_ctr_drbg_update_ret( mbedtls_ctr_drbg_context *ctx,
+ const unsigned char *additional,
+ size_t add_len );
+
+/**
+ * \brief This function updates a CTR_DRBG instance with additional
+ * data and uses it to generate random data.
+ *
+ * \note The function automatically reseeds if the reseed counter is exceeded.
+ *
+ * \param p_rng The CTR_DRBG context. This must be a pointer to a
+ * #mbedtls_ctr_drbg_context structure.
+ * \param output The buffer to fill.
+ * \param output_len The length of the buffer.
+ * \param additional Additional data to update. Can be NULL.
+ * \param add_len The length of the additional data.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED or
+ * #MBEDTLS_ERR_CTR_DRBG_REQUEST_TOO_BIG on failure.
+ */
+int mbedtls_ctr_drbg_random_with_add( void *p_rng,
+ unsigned char *output, size_t output_len,
+ const unsigned char *additional, size_t add_len );
+
+/**
+ * \brief This function uses CTR_DRBG to generate random data.
+ *
+ * \note The function automatically reseeds if the reseed counter is exceeded.
+ *
+ * \param p_rng The CTR_DRBG context. This must be a pointer to a
+ * #mbedtls_ctr_drbg_context structure.
+ * \param output The buffer to fill.
+ * \param output_len The length of the buffer.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED or
+ * #MBEDTLS_ERR_CTR_DRBG_REQUEST_TOO_BIG on failure.
+ */
+int mbedtls_ctr_drbg_random( void *p_rng,
+ unsigned char *output, size_t output_len );
+
+
+#if ! defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief This function updates the state of the CTR_DRBG context.
+ *
+ * \deprecated Superseded by mbedtls_ctr_drbg_update_ret()
+ * in 2.16.0.
+ *
+ * \note If \p add_len is greater than
+ * #MBEDTLS_CTR_DRBG_MAX_SEED_INPUT, only the first
+ * #MBEDTLS_CTR_DRBG_MAX_SEED_INPUT Bytes are used.
+ * The remaining Bytes are silently discarded.
+ *
+ * \param ctx The CTR_DRBG context.
+ * \param additional The data to update the state with.
+ * \param add_len Length of \p additional data.
+ */
+MBEDTLS_DEPRECATED void mbedtls_ctr_drbg_update(
+ mbedtls_ctr_drbg_context *ctx,
+ const unsigned char *additional,
+ size_t add_len );
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+#if defined(MBEDTLS_FS_IO)
+/**
+ * \brief This function writes a seed file.
+ *
+ * \param ctx The CTR_DRBG context.
+ * \param path The name of the file.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR on file error.
+ * \return #MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED on
+ * failure.
+ */
+int mbedtls_ctr_drbg_write_seed_file( mbedtls_ctr_drbg_context *ctx, const char *path );
+
+/**
+ * \brief This function reads and updates a seed file. The seed
+ * is added to this instance.
+ *
+ * \param ctx The CTR_DRBG context.
+ * \param path The name of the file.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_CTR_DRBG_FILE_IO_ERROR on file error.
+ * \return #MBEDTLS_ERR_CTR_DRBG_ENTROPY_SOURCE_FAILED or
+ * #MBEDTLS_ERR_CTR_DRBG_INPUT_TOO_BIG on failure.
+ */
+int mbedtls_ctr_drbg_update_seed_file( mbedtls_ctr_drbg_context *ctx, const char *path );
+#endif /* MBEDTLS_FS_IO */
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief The CTR_DRBG checkup routine.
+ *
+ * \return \c 0 on success.
+ * \return \c 1 on failure.
+ */
+int mbedtls_ctr_drbg_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+/* Internal functions (do not call directly) */
+int mbedtls_ctr_drbg_seed_entropy_len( mbedtls_ctr_drbg_context *,
+ int (*)(void *, unsigned char *, size_t), void *,
+ const unsigned char *, size_t, size_t );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ctr_drbg.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/debug.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/debug.h
new file mode 100644
index 0000000..736444b
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/debug.h
@@ -0,0 +1,265 @@
+/**
+ * \file debug.h
+ *
+ * \brief Functions for controlling and providing debug output from the library.
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_DEBUG_H
+#define MBEDTLS_DEBUG_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "ssl.h"
+
+#if defined(MBEDTLS_ECP_C)
+#include "ecp.h"
+#endif
+
+#if defined(MBEDTLS_DEBUG_C)
+
+#define MBEDTLS_DEBUG_STRIP_PARENS( ... ) __VA_ARGS__
+
+#define MBEDTLS_SSL_DEBUG_MSG( level, args ) \
+ mbedtls_debug_print_msg( ssl, level, __FILE__, __LINE__, \
+ MBEDTLS_DEBUG_STRIP_PARENS args )
+
+#define MBEDTLS_SSL_DEBUG_RET( level, text, ret ) \
+ mbedtls_debug_print_ret( ssl, level, __FILE__, __LINE__, text, ret )
+
+#define MBEDTLS_SSL_DEBUG_BUF( level, text, buf, len ) \
+ mbedtls_debug_print_buf( ssl, level, __FILE__, __LINE__, text, buf, len )
+
+#if defined(MBEDTLS_BIGNUM_C)
+#define MBEDTLS_SSL_DEBUG_MPI( level, text, X ) \
+ mbedtls_debug_print_mpi( ssl, level, __FILE__, __LINE__, text, X )
+#endif
+
+#if defined(MBEDTLS_ECP_C)
+#define MBEDTLS_SSL_DEBUG_ECP( level, text, X ) \
+ mbedtls_debug_print_ecp( ssl, level, __FILE__, __LINE__, text, X )
+#endif
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+#define MBEDTLS_SSL_DEBUG_CRT( level, text, crt ) \
+ mbedtls_debug_print_crt( ssl, level, __FILE__, __LINE__, text, crt )
+#endif
+
+#if defined(MBEDTLS_ECDH_C)
+#define MBEDTLS_SSL_DEBUG_ECDH( level, ecdh, attr ) \
+ mbedtls_debug_printf_ecdh( ssl, level, __FILE__, __LINE__, ecdh, attr )
+#endif
+
+#else /* MBEDTLS_DEBUG_C */
+
+#define MBEDTLS_SSL_DEBUG_MSG( level, args ) do { } while( 0 )
+#define MBEDTLS_SSL_DEBUG_RET( level, text, ret ) do { } while( 0 )
+#define MBEDTLS_SSL_DEBUG_BUF( level, text, buf, len ) do { } while( 0 )
+#define MBEDTLS_SSL_DEBUG_MPI( level, text, X ) do { } while( 0 )
+#define MBEDTLS_SSL_DEBUG_ECP( level, text, X ) do { } while( 0 )
+#define MBEDTLS_SSL_DEBUG_CRT( level, text, crt ) do { } while( 0 )
+#define MBEDTLS_SSL_DEBUG_ECDH( level, ecdh, attr ) do { } while( 0 )
+
+#endif /* MBEDTLS_DEBUG_C */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief Set the threshold error level to handle globally all debug output.
+ * Debug messages that have a level over the threshold value are
+ * discarded.
+ * (Default value: 0 = No debug )
+ *
+ * \param threshold theshold level of messages to filter on. Messages at a
+ * higher level will be discarded.
+ * - Debug levels
+ * - 0 No debug
+ * - 1 Error
+ * - 2 State change
+ * - 3 Informational
+ * - 4 Verbose
+ */
+void mbedtls_debug_set_threshold( int threshold );
+
+/**
+ * \brief Print a message to the debug output. This function is always used
+ * through the MBEDTLS_SSL_DEBUG_MSG() macro, which supplies the ssl
+ * context, file and line number parameters.
+ *
+ * \param ssl SSL context
+ * \param level error level of the debug message
+ * \param file file the message has occurred in
+ * \param line line number the message has occurred at
+ * \param format format specifier, in printf format
+ * \param ... variables used by the format specifier
+ *
+ * \attention This function is intended for INTERNAL usage within the
+ * library only.
+ */
+void mbedtls_debug_print_msg( const mbedtls_ssl_context *ssl, int level,
+ const char *file, int line,
+ const char *format, ... );
+
+/**
+ * \brief Print the return value of a function to the debug output. This
+ * function is always used through the MBEDTLS_SSL_DEBUG_RET() macro,
+ * which supplies the ssl context, file and line number parameters.
+ *
+ * \param ssl SSL context
+ * \param level error level of the debug message
+ * \param file file the error has occurred in
+ * \param line line number the error has occurred in
+ * \param text the name of the function that returned the error
+ * \param ret the return code value
+ *
+ * \attention This function is intended for INTERNAL usage within the
+ * library only.
+ */
+void mbedtls_debug_print_ret( const mbedtls_ssl_context *ssl, int level,
+ const char *file, int line,
+ const char *text, int ret );
+
+/**
+ * \brief Output a buffer of size len bytes to the debug output. This function
+ * is always used through the MBEDTLS_SSL_DEBUG_BUF() macro,
+ * which supplies the ssl context, file and line number parameters.
+ *
+ * \param ssl SSL context
+ * \param level error level of the debug message
+ * \param file file the error has occurred in
+ * \param line line number the error has occurred in
+ * \param text a name or label for the buffer being dumped. Normally the
+ * variable or buffer name
+ * \param buf the buffer to be outputted
+ * \param len length of the buffer
+ *
+ * \attention This function is intended for INTERNAL usage within the
+ * library only.
+ */
+void mbedtls_debug_print_buf( const mbedtls_ssl_context *ssl, int level,
+ const char *file, int line, const char *text,
+ const unsigned char *buf, size_t len );
+
+#if defined(MBEDTLS_BIGNUM_C)
+/**
+ * \brief Print a MPI variable to the debug output. This function is always
+ * used through the MBEDTLS_SSL_DEBUG_MPI() macro, which supplies the
+ * ssl context, file and line number parameters.
+ *
+ * \param ssl SSL context
+ * \param level error level of the debug message
+ * \param file file the error has occurred in
+ * \param line line number the error has occurred in
+ * \param text a name or label for the MPI being output. Normally the
+ * variable name
+ * \param X the MPI variable
+ *
+ * \attention This function is intended for INTERNAL usage within the
+ * library only.
+ */
+void mbedtls_debug_print_mpi( const mbedtls_ssl_context *ssl, int level,
+ const char *file, int line,
+ const char *text, const mbedtls_mpi *X );
+#endif
+
+#if defined(MBEDTLS_ECP_C)
+/**
+ * \brief Print an ECP point to the debug output. This function is always
+ * used through the MBEDTLS_SSL_DEBUG_ECP() macro, which supplies the
+ * ssl context, file and line number parameters.
+ *
+ * \param ssl SSL context
+ * \param level error level of the debug message
+ * \param file file the error has occurred in
+ * \param line line number the error has occurred in
+ * \param text a name or label for the ECP point being output. Normally the
+ * variable name
+ * \param X the ECP point
+ *
+ * \attention This function is intended for INTERNAL usage within the
+ * library only.
+ */
+void mbedtls_debug_print_ecp( const mbedtls_ssl_context *ssl, int level,
+ const char *file, int line,
+ const char *text, const mbedtls_ecp_point *X );
+#endif
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+/**
+ * \brief Print a X.509 certificate structure to the debug output. This
+ * function is always used through the MBEDTLS_SSL_DEBUG_CRT() macro,
+ * which supplies the ssl context, file and line number parameters.
+ *
+ * \param ssl SSL context
+ * \param level error level of the debug message
+ * \param file file the error has occurred in
+ * \param line line number the error has occurred in
+ * \param text a name or label for the certificate being output
+ * \param crt X.509 certificate structure
+ *
+ * \attention This function is intended for INTERNAL usage within the
+ * library only.
+ */
+void mbedtls_debug_print_crt( const mbedtls_ssl_context *ssl, int level,
+ const char *file, int line,
+ const char *text, const mbedtls_x509_crt *crt );
+#endif
+
+#if defined(MBEDTLS_ECDH_C)
+typedef enum
+{
+ MBEDTLS_DEBUG_ECDH_Q,
+ MBEDTLS_DEBUG_ECDH_QP,
+ MBEDTLS_DEBUG_ECDH_Z,
+} mbedtls_debug_ecdh_attr;
+
+/**
+ * \brief Print a field of the ECDH structure in the SSL context to the debug
+ * output. This function is always used through the
+ * MBEDTLS_SSL_DEBUG_ECDH() macro, which supplies the ssl context, file
+ * and line number parameters.
+ *
+ * \param ssl SSL context
+ * \param level error level of the debug message
+ * \param file file the error has occurred in
+ * \param line line number the error has occurred in
+ * \param ecdh the ECDH context
+ * \param attr the identifier of the attribute being output
+ *
+ * \attention This function is intended for INTERNAL usage within the
+ * library only.
+ */
+void mbedtls_debug_printf_ecdh( const mbedtls_ssl_context *ssl, int level,
+ const char *file, int line,
+ const mbedtls_ecdh_context *ecdh,
+ mbedtls_debug_ecdh_attr attr );
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* debug.h */
+
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/des.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/des.h
new file mode 100644
index 0000000..54e6b78
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/des.h
@@ -0,0 +1,356 @@
+/**
+ * \file des.h
+ *
+ * \brief DES block cipher
+ *
+ * \warning DES is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers
+ * instead.
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ *
+ */
+#ifndef MBEDTLS_DES_H
+#define MBEDTLS_DES_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+
+#define MBEDTLS_DES_ENCRYPT 1
+#define MBEDTLS_DES_DECRYPT 0
+
+#define MBEDTLS_ERR_DES_INVALID_INPUT_LENGTH -0x0032 /**< The data input has an invalid length. */
+
+/* MBEDTLS_ERR_DES_HW_ACCEL_FAILED is deprecated and should not be used. */
+#define MBEDTLS_ERR_DES_HW_ACCEL_FAILED -0x0033 /**< DES hardware accelerator failed. */
+
+#define MBEDTLS_DES_KEY_SIZE 8
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_DES_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief DES context structure
+ *
+ * \warning DES is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers
+ * instead.
+ */
+typedef struct mbedtls_des_context
+{
+ uint32_t sk[32]; /*!< DES subkeys */
+}
+mbedtls_des_context;
+
+/**
+ * \brief Triple-DES context structure
+ */
+typedef struct mbedtls_des3_context
+{
+ uint32_t sk[96]; /*!< 3DES subkeys */
+}
+mbedtls_des3_context;
+
+#else /* MBEDTLS_DES_ALT */
+#include "des_alt.h"
+#endif /* MBEDTLS_DES_ALT */
+
+/**
+ * \brief Initialize DES context
+ *
+ * \param ctx DES context to be initialized
+ *
+ * \warning DES is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers
+ * instead.
+ */
+void mbedtls_des_init( mbedtls_des_context *ctx );
+
+/**
+ * \brief Clear DES context
+ *
+ * \param ctx DES context to be cleared
+ *
+ * \warning DES is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers
+ * instead.
+ */
+void mbedtls_des_free( mbedtls_des_context *ctx );
+
+/**
+ * \brief Initialize Triple-DES context
+ *
+ * \param ctx DES3 context to be initialized
+ */
+void mbedtls_des3_init( mbedtls_des3_context *ctx );
+
+/**
+ * \brief Clear Triple-DES context
+ *
+ * \param ctx DES3 context to be cleared
+ */
+void mbedtls_des3_free( mbedtls_des3_context *ctx );
+
+/**
+ * \brief Set key parity on the given key to odd.
+ *
+ * DES keys are 56 bits long, but each byte is padded with
+ * a parity bit to allow verification.
+ *
+ * \param key 8-byte secret key
+ *
+ * \warning DES is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers
+ * instead.
+ */
+void mbedtls_des_key_set_parity( unsigned char key[MBEDTLS_DES_KEY_SIZE] );
+
+/**
+ * \brief Check that key parity on the given key is odd.
+ *
+ * DES keys are 56 bits long, but each byte is padded with
+ * a parity bit to allow verification.
+ *
+ * \param key 8-byte secret key
+ *
+ * \return 0 is parity was ok, 1 if parity was not correct.
+ *
+ * \warning DES is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers
+ * instead.
+ */
+int mbedtls_des_key_check_key_parity( const unsigned char key[MBEDTLS_DES_KEY_SIZE] );
+
+/**
+ * \brief Check that key is not a weak or semi-weak DES key
+ *
+ * \param key 8-byte secret key
+ *
+ * \return 0 if no weak key was found, 1 if a weak key was identified.
+ *
+ * \warning DES is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers
+ * instead.
+ */
+int mbedtls_des_key_check_weak( const unsigned char key[MBEDTLS_DES_KEY_SIZE] );
+
+/**
+ * \brief DES key schedule (56-bit, encryption)
+ *
+ * \param ctx DES context to be initialized
+ * \param key 8-byte secret key
+ *
+ * \return 0
+ *
+ * \warning DES is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers
+ * instead.
+ */
+int mbedtls_des_setkey_enc( mbedtls_des_context *ctx, const unsigned char key[MBEDTLS_DES_KEY_SIZE] );
+
+/**
+ * \brief DES key schedule (56-bit, decryption)
+ *
+ * \param ctx DES context to be initialized
+ * \param key 8-byte secret key
+ *
+ * \return 0
+ *
+ * \warning DES is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers
+ * instead.
+ */
+int mbedtls_des_setkey_dec( mbedtls_des_context *ctx, const unsigned char key[MBEDTLS_DES_KEY_SIZE] );
+
+/**
+ * \brief Triple-DES key schedule (112-bit, encryption)
+ *
+ * \param ctx 3DES context to be initialized
+ * \param key 16-byte secret key
+ *
+ * \return 0
+ */
+int mbedtls_des3_set2key_enc( mbedtls_des3_context *ctx,
+ const unsigned char key[MBEDTLS_DES_KEY_SIZE * 2] );
+
+/**
+ * \brief Triple-DES key schedule (112-bit, decryption)
+ *
+ * \param ctx 3DES context to be initialized
+ * \param key 16-byte secret key
+ *
+ * \return 0
+ */
+int mbedtls_des3_set2key_dec( mbedtls_des3_context *ctx,
+ const unsigned char key[MBEDTLS_DES_KEY_SIZE * 2] );
+
+/**
+ * \brief Triple-DES key schedule (168-bit, encryption)
+ *
+ * \param ctx 3DES context to be initialized
+ * \param key 24-byte secret key
+ *
+ * \return 0
+ */
+int mbedtls_des3_set3key_enc( mbedtls_des3_context *ctx,
+ const unsigned char key[MBEDTLS_DES_KEY_SIZE * 3] );
+
+/**
+ * \brief Triple-DES key schedule (168-bit, decryption)
+ *
+ * \param ctx 3DES context to be initialized
+ * \param key 24-byte secret key
+ *
+ * \return 0
+ */
+int mbedtls_des3_set3key_dec( mbedtls_des3_context *ctx,
+ const unsigned char key[MBEDTLS_DES_KEY_SIZE * 3] );
+
+/**
+ * \brief DES-ECB block encryption/decryption
+ *
+ * \param ctx DES context
+ * \param input 64-bit input block
+ * \param output 64-bit output block
+ *
+ * \return 0 if successful
+ *
+ * \warning DES is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers
+ * instead.
+ */
+int mbedtls_des_crypt_ecb( mbedtls_des_context *ctx,
+ const unsigned char input[8],
+ unsigned char output[8] );
+
+#if defined(MBEDTLS_CIPHER_MODE_CBC)
+/**
+ * \brief DES-CBC buffer encryption/decryption
+ *
+ * \note Upon exit, the content of the IV is updated so that you can
+ * call the function same function again on the following
+ * block(s) of data and get the same result as if it was
+ * encrypted in one call. This allows a "streaming" usage.
+ * If on the other hand you need to retain the contents of the
+ * IV, you should either save it manually or use the cipher
+ * module instead.
+ *
+ * \param ctx DES context
+ * \param mode MBEDTLS_DES_ENCRYPT or MBEDTLS_DES_DECRYPT
+ * \param length length of the input data
+ * \param iv initialization vector (updated after use)
+ * \param input buffer holding the input data
+ * \param output buffer holding the output data
+ *
+ * \warning DES is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers
+ * instead.
+ */
+int mbedtls_des_crypt_cbc( mbedtls_des_context *ctx,
+ int mode,
+ size_t length,
+ unsigned char iv[8],
+ const unsigned char *input,
+ unsigned char *output );
+#endif /* MBEDTLS_CIPHER_MODE_CBC */
+
+/**
+ * \brief 3DES-ECB block encryption/decryption
+ *
+ * \param ctx 3DES context
+ * \param input 64-bit input block
+ * \param output 64-bit output block
+ *
+ * \return 0 if successful
+ */
+int mbedtls_des3_crypt_ecb( mbedtls_des3_context *ctx,
+ const unsigned char input[8],
+ unsigned char output[8] );
+
+#if defined(MBEDTLS_CIPHER_MODE_CBC)
+/**
+ * \brief 3DES-CBC buffer encryption/decryption
+ *
+ * \note Upon exit, the content of the IV is updated so that you can
+ * call the function same function again on the following
+ * block(s) of data and get the same result as if it was
+ * encrypted in one call. This allows a "streaming" usage.
+ * If on the other hand you need to retain the contents of the
+ * IV, you should either save it manually or use the cipher
+ * module instead.
+ *
+ * \param ctx 3DES context
+ * \param mode MBEDTLS_DES_ENCRYPT or MBEDTLS_DES_DECRYPT
+ * \param length length of the input data
+ * \param iv initialization vector (updated after use)
+ * \param input buffer holding the input data
+ * \param output buffer holding the output data
+ *
+ * \return 0 if successful, or MBEDTLS_ERR_DES_INVALID_INPUT_LENGTH
+ */
+int mbedtls_des3_crypt_cbc( mbedtls_des3_context *ctx,
+ int mode,
+ size_t length,
+ unsigned char iv[8],
+ const unsigned char *input,
+ unsigned char *output );
+#endif /* MBEDTLS_CIPHER_MODE_CBC */
+
+/**
+ * \brief Internal function for key expansion.
+ * (Only exposed to allow overriding it,
+ * see MBEDTLS_DES_SETKEY_ALT)
+ *
+ * \param SK Round keys
+ * \param key Base key
+ *
+ * \warning DES is considered a weak cipher and its use constitutes a
+ * security risk. We recommend considering stronger ciphers
+ * instead.
+ */
+void mbedtls_des_setkey( uint32_t SK[32],
+ const unsigned char key[MBEDTLS_DES_KEY_SIZE] );
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief Checkup routine
+ *
+ * \return 0 if successful, or 1 if the test failed
+ */
+int mbedtls_des_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* des.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/dhm.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/dhm.h
new file mode 100644
index 0000000..2909f5f
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/dhm.h
@@ -0,0 +1,1096 @@
+/**
+ * \file dhm.h
+ *
+ * \brief This file contains Diffie-Hellman-Merkle (DHM) key exchange
+ * definitions and functions.
+ *
+ * Diffie-Hellman-Merkle (DHM) key exchange is defined in
+ * <em>RFC-2631: Diffie-Hellman Key Agreement Method</em> and
+ * <em>Public-Key Cryptography Standards (PKCS) #3: Diffie
+ * Hellman Key Agreement Standard</em>.
+ *
+ * <em>RFC-3526: More Modular Exponential (MODP) Diffie-Hellman groups for
+ * Internet Key Exchange (IKE)</em> defines a number of standardized
+ * Diffie-Hellman groups for IKE.
+ *
+ * <em>RFC-5114: Additional Diffie-Hellman Groups for Use with IETF
+ * Standards</em> defines a number of standardized Diffie-Hellman
+ * groups that can be used.
+ *
+ * \warning The security of the DHM key exchange relies on the proper choice
+ * of prime modulus - optimally, it should be a safe prime. The usage
+ * of non-safe primes both decreases the difficulty of the underlying
+ * discrete logarithm problem and can lead to small subgroup attacks
+ * leaking private exponent bits when invalid public keys are used
+ * and not detected. This is especially relevant if the same DHM
+ * parameters are reused for multiple key exchanges as in static DHM,
+ * while the criticality of small-subgroup attacks is lower for
+ * ephemeral DHM.
+ *
+ * \warning For performance reasons, the code does neither perform primality
+ * nor safe primality tests, nor the expensive checks for invalid
+ * subgroups. Moreover, even if these were performed, non-standardized
+ * primes cannot be trusted because of the possibility of backdoors
+ * that can't be effectively checked for.
+ *
+ * \warning Diffie-Hellman-Merkle is therefore a security risk when not using
+ * standardized primes generated using a trustworthy ("nothing up
+ * my sleeve") method, such as the RFC 3526 / 7919 primes. In the TLS
+ * protocol, DH parameters need to be negotiated, so using the default
+ * primes systematically is not always an option. If possible, use
+ * Elliptic Curve Diffie-Hellman (ECDH), which has better performance,
+ * and for which the TLS protocol mandates the use of standard
+ * parameters.
+ *
+ */
+/*
+ * Copyright (C) 2006-2018, Arm Limited (or its affiliates), All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of Mbed TLS (https://tls.mbed.org)
+ */
+
+#ifndef MBEDTLS_DHM_H
+#define MBEDTLS_DHM_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+#include "bignum.h"
+
+/*
+ * DHM Error codes
+ */
+#define MBEDTLS_ERR_DHM_BAD_INPUT_DATA -0x3080 /**< Bad input parameters. */
+#define MBEDTLS_ERR_DHM_READ_PARAMS_FAILED -0x3100 /**< Reading of the DHM parameters failed. */
+#define MBEDTLS_ERR_DHM_MAKE_PARAMS_FAILED -0x3180 /**< Making of the DHM parameters failed. */
+#define MBEDTLS_ERR_DHM_READ_PUBLIC_FAILED -0x3200 /**< Reading of the public values failed. */
+#define MBEDTLS_ERR_DHM_MAKE_PUBLIC_FAILED -0x3280 /**< Making of the public value failed. */
+#define MBEDTLS_ERR_DHM_CALC_SECRET_FAILED -0x3300 /**< Calculation of the DHM secret failed. */
+#define MBEDTLS_ERR_DHM_INVALID_FORMAT -0x3380 /**< The ASN.1 data is not formatted correctly. */
+#define MBEDTLS_ERR_DHM_ALLOC_FAILED -0x3400 /**< Allocation of memory failed. */
+#define MBEDTLS_ERR_DHM_FILE_IO_ERROR -0x3480 /**< Read or write of file failed. */
+
+/* MBEDTLS_ERR_DHM_HW_ACCEL_FAILED is deprecated and should not be used. */
+#define MBEDTLS_ERR_DHM_HW_ACCEL_FAILED -0x3500 /**< DHM hardware accelerator failed. */
+
+#define MBEDTLS_ERR_DHM_SET_GROUP_FAILED -0x3580 /**< Setting the modulus and generator failed. */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_DHM_ALT)
+
+/**
+ * \brief The DHM context structure.
+ */
+typedef struct mbedtls_dhm_context
+{
+ size_t len; /*!< The size of \p P in Bytes. */
+ mbedtls_mpi P; /*!< The prime modulus. */
+ mbedtls_mpi G; /*!< The generator. */
+ mbedtls_mpi X; /*!< Our secret value. */
+ mbedtls_mpi GX; /*!< Our public key = \c G^X mod \c P. */
+ mbedtls_mpi GY; /*!< The public key of the peer = \c G^Y mod \c P. */
+ mbedtls_mpi K; /*!< The shared secret = \c G^(XY) mod \c P. */
+ mbedtls_mpi RP; /*!< The cached value = \c R^2 mod \c P. */
+ mbedtls_mpi Vi; /*!< The blinding value. */
+ mbedtls_mpi Vf; /*!< The unblinding value. */
+ mbedtls_mpi pX; /*!< The previous \c X. */
+}
+mbedtls_dhm_context;
+
+#else /* MBEDTLS_DHM_ALT */
+#include "dhm_alt.h"
+#endif /* MBEDTLS_DHM_ALT */
+
+/**
+ * \brief This function initializes the DHM context.
+ *
+ * \param ctx The DHM context to initialize.
+ */
+void mbedtls_dhm_init( mbedtls_dhm_context *ctx );
+
+/**
+ * \brief This function parses the DHM parameters in a
+ * TLS ServerKeyExchange handshake message
+ * (DHM modulus, generator, and public key).
+ *
+ * \note In a TLS handshake, this is the how the client
+ * sets up its DHM context from the server's public
+ * DHM key material.
+ *
+ * \param ctx The DHM context to use. This must be initialized.
+ * \param p On input, *p must be the start of the input buffer.
+ * On output, *p is updated to point to the end of the data
+ * that has been read. On success, this is the first byte
+ * past the end of the ServerKeyExchange parameters.
+ * On error, this is the point at which an error has been
+ * detected, which is usually not useful except to debug
+ * failures.
+ * \param end The end of the input buffer.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_DHM_XXX error code on failure.
+ */
+int mbedtls_dhm_read_params( mbedtls_dhm_context *ctx,
+ unsigned char **p,
+ const unsigned char *end );
+
+/**
+ * \brief This function generates a DHM key pair and exports its
+ * public part together with the DHM parameters in the format
+ * used in a TLS ServerKeyExchange handshake message.
+ *
+ * \note This function assumes that the DHM parameters \c ctx->P
+ * and \c ctx->G have already been properly set. For that, use
+ * mbedtls_dhm_set_group() below in conjunction with
+ * mbedtls_mpi_read_binary() and mbedtls_mpi_read_string().
+ *
+ * \note In a TLS handshake, this is the how the server generates
+ * and exports its DHM key material.
+ *
+ * \param ctx The DHM context to use. This must be initialized
+ * and have the DHM parameters set. It may or may not
+ * already have imported the peer's public key.
+ * \param x_size The private key size in Bytes.
+ * \param olen The address at which to store the number of Bytes
+ * written on success. This must not be \c NULL.
+ * \param output The destination buffer. This must be a writable buffer of
+ * sufficient size to hold the reduced binary presentation of
+ * the modulus, the generator and the public key, each wrapped
+ * with a 2-byte length field. It is the responsibility of the
+ * caller to ensure that enough space is available. Refer to
+ * mbedtls_mpi_size() to computing the byte-size of an MPI.
+ * \param f_rng The RNG function. Must not be \c NULL.
+ * \param p_rng The RNG context to be passed to \p f_rng. This may be
+ * \c NULL if \p f_rng doesn't need a context parameter.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_DHM_XXX error code on failure.
+ */
+int mbedtls_dhm_make_params( mbedtls_dhm_context *ctx, int x_size,
+ unsigned char *output, size_t *olen,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+/**
+ * \brief This function sets the prime modulus and generator.
+ *
+ * \note This function can be used to set \c ctx->P, \c ctx->G
+ * in preparation for mbedtls_dhm_make_params().
+ *
+ * \param ctx The DHM context to configure. This must be initialized.
+ * \param P The MPI holding the DHM prime modulus. This must be
+ * an initialized MPI.
+ * \param G The MPI holding the DHM generator. This must be an
+ * initialized MPI.
+ *
+ * \return \c 0 if successful.
+ * \return An \c MBEDTLS_ERR_DHM_XXX error code on failure.
+ */
+int mbedtls_dhm_set_group( mbedtls_dhm_context *ctx,
+ const mbedtls_mpi *P,
+ const mbedtls_mpi *G );
+
+/**
+ * \brief This function imports the raw public value of the peer.
+ *
+ * \note In a TLS handshake, this is the how the server imports
+ * the Client's public DHM key.
+ *
+ * \param ctx The DHM context to use. This must be initialized and have
+ * its DHM parameters set, e.g. via mbedtls_dhm_set_group().
+ * It may or may not already have generated its own private key.
+ * \param input The input buffer containing the \c G^Y value of the peer.
+ * This must be a readable buffer of size \p ilen Bytes.
+ * \param ilen The size of the input buffer \p input in Bytes.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_DHM_XXX error code on failure.
+ */
+int mbedtls_dhm_read_public( mbedtls_dhm_context *ctx,
+ const unsigned char *input, size_t ilen );
+
+/**
+ * \brief This function creates a DHM key pair and exports
+ * the raw public key in big-endian format.
+ *
+ * \note The destination buffer is always fully written
+ * so as to contain a big-endian representation of G^X mod P.
+ * If it is larger than \c ctx->len, it is padded accordingly
+ * with zero-bytes at the beginning.
+ *
+ * \param ctx The DHM context to use. This must be initialized and
+ * have the DHM parameters set. It may or may not already
+ * have imported the peer's public key.
+ * \param x_size The private key size in Bytes.
+ * \param output The destination buffer. This must be a writable buffer of
+ * size \p olen Bytes.
+ * \param olen The length of the destination buffer. This must be at least
+ * equal to `ctx->len` (the size of \c P).
+ * \param f_rng The RNG function. This must not be \c NULL.
+ * \param p_rng The RNG context to be passed to \p f_rng. This may be \c NULL
+ * if \p f_rng doesn't need a context argument.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_DHM_XXX error code on failure.
+ */
+int mbedtls_dhm_make_public( mbedtls_dhm_context *ctx, int x_size,
+ unsigned char *output, size_t olen,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+/**
+ * \brief This function derives and exports the shared secret
+ * \c (G^Y)^X mod \c P.
+ *
+ * \note If \p f_rng is not \c NULL, it is used to blind the input as
+ * a countermeasure against timing attacks. Blinding is used
+ * only if our private key \c X is re-used, and not used
+ * otherwise. We recommend always passing a non-NULL
+ * \p f_rng argument.
+ *
+ * \param ctx The DHM context to use. This must be initialized
+ * and have its own private key generated and the peer's
+ * public key imported.
+ * \param output The buffer to write the generated shared key to. This
+ * must be a writable buffer of size \p output_size Bytes.
+ * \param output_size The size of the destination buffer. This must be at
+ * least the size of \c ctx->len (the size of \c P).
+ * \param olen On exit, holds the actual number of Bytes written.
+ * \param f_rng The RNG function, for blinding purposes. This may
+ * b \c NULL if blinding isn't needed.
+ * \param p_rng The RNG context. This may be \c NULL if \p f_rng
+ * doesn't need a context argument.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_DHM_XXX error code on failure.
+ */
+int mbedtls_dhm_calc_secret( mbedtls_dhm_context *ctx,
+ unsigned char *output, size_t output_size, size_t *olen,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+/**
+ * \brief This function frees and clears the components
+ * of a DHM context.
+ *
+ * \param ctx The DHM context to free and clear. This may be \c NULL,
+ * in which case this function is a no-op. If it is not \c NULL,
+ * it must point to an initialized DHM context.
+ */
+void mbedtls_dhm_free( mbedtls_dhm_context *ctx );
+
+#if defined(MBEDTLS_ASN1_PARSE_C)
+/** \ingroup x509_module */
+/**
+ * \brief This function parses DHM parameters in PEM or DER format.
+ *
+ * \param dhm The DHM context to import the DHM parameters into.
+ * This must be initialized.
+ * \param dhmin The input buffer. This must be a readable buffer of
+ * length \p dhminlen Bytes.
+ * \param dhminlen The size of the input buffer \p dhmin, including the
+ * terminating \c NULL Byte for PEM data.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_DHM_XXX or \c MBEDTLS_ERR_PEM_XXX error
+ * code on failure.
+ */
+int mbedtls_dhm_parse_dhm( mbedtls_dhm_context *dhm, const unsigned char *dhmin,
+ size_t dhminlen );
+
+#if defined(MBEDTLS_FS_IO)
+/** \ingroup x509_module */
+/**
+ * \brief This function loads and parses DHM parameters from a file.
+ *
+ * \param dhm The DHM context to load the parameters to.
+ * This must be initialized.
+ * \param path The filename to read the DHM parameters from.
+ * This must not be \c NULL.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_DHM_XXX or \c MBEDTLS_ERR_PEM_XXX
+ * error code on failure.
+ */
+int mbedtls_dhm_parse_dhmfile( mbedtls_dhm_context *dhm, const char *path );
+#endif /* MBEDTLS_FS_IO */
+#endif /* MBEDTLS_ASN1_PARSE_C */
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief The DMH checkup routine.
+ *
+ * \return \c 0 on success.
+ * \return \c 1 on failure.
+ */
+int mbedtls_dhm_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+#ifdef __cplusplus
+}
+#endif
+
+/**
+ * RFC 3526, RFC 5114 and RFC 7919 standardize a number of
+ * Diffie-Hellman groups, some of which are included here
+ * for use within the SSL/TLS module and the user's convenience
+ * when configuring the Diffie-Hellman parameters by hand
+ * through \c mbedtls_ssl_conf_dh_param.
+ *
+ * The following lists the source of the above groups in the standards:
+ * - RFC 5114 section 2.2: 2048-bit MODP Group with 224-bit Prime Order Subgroup
+ * - RFC 3526 section 3: 2048-bit MODP Group
+ * - RFC 3526 section 4: 3072-bit MODP Group
+ * - RFC 3526 section 5: 4096-bit MODP Group
+ * - RFC 7919 section A.1: ffdhe2048
+ * - RFC 7919 section A.2: ffdhe3072
+ * - RFC 7919 section A.3: ffdhe4096
+ * - RFC 7919 section A.4: ffdhe6144
+ * - RFC 7919 section A.5: ffdhe8192
+ *
+ * The constants with suffix "_p" denote the chosen prime moduli, while
+ * the constants with suffix "_g" denote the chosen generator
+ * of the associated prime field.
+ *
+ * The constants further suffixed with "_bin" are provided in binary format,
+ * while all other constants represent null-terminated strings holding the
+ * hexadecimal presentation of the respective numbers.
+ *
+ * The primes from RFC 3526 and RFC 7919 have been generating by the following
+ * trust-worthy procedure:
+ * - Fix N in { 2048, 3072, 4096, 6144, 8192 } and consider the N-bit number
+ * the first and last 64 bits are all 1, and the remaining N - 128 bits of
+ * which are 0x7ff...ff.
+ * - Add the smallest multiple of the first N - 129 bits of the binary expansion
+ * of pi (for RFC 5236) or e (for RFC 7919) to this intermediate bit-string
+ * such that the resulting integer is a safe-prime.
+ * - The result is the respective RFC 3526 / 7919 prime, and the corresponding
+ * generator is always chosen to be 2 (which is a square for these prime,
+ * hence the corresponding subgroup has order (p-1)/2 and avoids leaking a
+ * bit in the private exponent).
+ *
+ */
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+
+/**
+ * \warning The origin of the primes in RFC 5114 is not documented and
+ * their use therefore constitutes a security risk!
+ *
+ * \deprecated The hex-encoded primes from RFC 5114 are deprecated and are
+ * likely to be removed in a future version of the library without
+ * replacement.
+ */
+
+/**
+ * The hexadecimal presentation of the prime underlying the
+ * 2048-bit MODP Group with 224-bit Prime Order Subgroup, as defined
+ * in <em>RFC-5114: Additional Diffie-Hellman Groups for Use with
+ * IETF Standards</em>.
+ */
+#define MBEDTLS_DHM_RFC5114_MODP_2048_P \
+ MBEDTLS_DEPRECATED_STRING_CONSTANT( \
+ "AD107E1E9123A9D0D660FAA79559C51FA20D64E5683B9FD1" \
+ "B54B1597B61D0A75E6FA141DF95A56DBAF9A3C407BA1DF15" \
+ "EB3D688A309C180E1DE6B85A1274A0A66D3F8152AD6AC212" \
+ "9037C9EDEFDA4DF8D91E8FEF55B7394B7AD5B7D0B6C12207" \
+ "C9F98D11ED34DBF6C6BA0B2C8BBC27BE6A00E0A0B9C49708" \
+ "B3BF8A317091883681286130BC8985DB1602E714415D9330" \
+ "278273C7DE31EFDC7310F7121FD5A07415987D9ADC0A486D" \
+ "CDF93ACC44328387315D75E198C641A480CD86A1B9E587E8" \
+ "BE60E69CC928B2B9C52172E413042E9B23F10B0E16E79763" \
+ "C9B53DCF4BA80A29E3FB73C16B8E75B97EF363E2FFA31F71" \
+ "CF9DE5384E71B81C0AC4DFFE0C10E64F" )
+
+/**
+ * The hexadecimal presentation of the chosen generator of the 2048-bit MODP
+ * Group with 224-bit Prime Order Subgroup, as defined in <em>RFC-5114:
+ * Additional Diffie-Hellman Groups for Use with IETF Standards</em>.
+ */
+#define MBEDTLS_DHM_RFC5114_MODP_2048_G \
+ MBEDTLS_DEPRECATED_STRING_CONSTANT( \
+ "AC4032EF4F2D9AE39DF30B5C8FFDAC506CDEBE7B89998CAF" \
+ "74866A08CFE4FFE3A6824A4E10B9A6F0DD921F01A70C4AFA" \
+ "AB739D7700C29F52C57DB17C620A8652BE5E9001A8D66AD7" \
+ "C17669101999024AF4D027275AC1348BB8A762D0521BC98A" \
+ "E247150422EA1ED409939D54DA7460CDB5F6C6B250717CBE" \
+ "F180EB34118E98D119529A45D6F834566E3025E316A330EF" \
+ "BB77A86F0C1AB15B051AE3D428C8F8ACB70A8137150B8EEB" \
+ "10E183EDD19963DDD9E263E4770589EF6AA21E7F5F2FF381" \
+ "B539CCE3409D13CD566AFBB48D6C019181E1BCFE94B30269" \
+ "EDFE72FE9B6AA4BD7B5A0F1C71CFFF4C19C418E1F6EC0179" \
+ "81BC087F2A7065B384B890D3191F2BFA" )
+
+/**
+ * The hexadecimal presentation of the prime underlying the 2048-bit MODP
+ * Group, as defined in <em>RFC-3526: More Modular Exponential (MODP)
+ * Diffie-Hellman groups for Internet Key Exchange (IKE)</em>.
+ *
+ * \deprecated The hex-encoded primes from RFC 3625 are deprecated and
+ * superseded by the corresponding macros providing them as
+ * binary constants. Their hex-encoded constants are likely
+ * to be removed in a future version of the library.
+ *
+ */
+#define MBEDTLS_DHM_RFC3526_MODP_2048_P \
+ MBEDTLS_DEPRECATED_STRING_CONSTANT( \
+ "FFFFFFFFFFFFFFFFC90FDAA22168C234C4C6628B80DC1CD1" \
+ "29024E088A67CC74020BBEA63B139B22514A08798E3404DD" \
+ "EF9519B3CD3A431B302B0A6DF25F14374FE1356D6D51C245" \
+ "E485B576625E7EC6F44C42E9A637ED6B0BFF5CB6F406B7ED" \
+ "EE386BFB5A899FA5AE9F24117C4B1FE649286651ECE45B3D" \
+ "C2007CB8A163BF0598DA48361C55D39A69163FA8FD24CF5F" \
+ "83655D23DCA3AD961C62F356208552BB9ED529077096966D" \
+ "670C354E4ABC9804F1746C08CA18217C32905E462E36CE3B" \
+ "E39E772C180E86039B2783A2EC07A28FB5C55DF06F4C52C9" \
+ "DE2BCBF6955817183995497CEA956AE515D2261898FA0510" \
+ "15728E5A8AACAA68FFFFFFFFFFFFFFFF" )
+
+/**
+ * The hexadecimal presentation of the chosen generator of the 2048-bit MODP
+ * Group, as defined in <em>RFC-3526: More Modular Exponential (MODP)
+ * Diffie-Hellman groups for Internet Key Exchange (IKE)</em>.
+ */
+#define MBEDTLS_DHM_RFC3526_MODP_2048_G \
+ MBEDTLS_DEPRECATED_STRING_CONSTANT( "02" )
+
+/**
+ * The hexadecimal presentation of the prime underlying the 3072-bit MODP
+ * Group, as defined in <em>RFC-3072: More Modular Exponential (MODP)
+ * Diffie-Hellman groups for Internet Key Exchange (IKE)</em>.
+ */
+#define MBEDTLS_DHM_RFC3526_MODP_3072_P \
+ MBEDTLS_DEPRECATED_STRING_CONSTANT( \
+ "FFFFFFFFFFFFFFFFC90FDAA22168C234C4C6628B80DC1CD1" \
+ "29024E088A67CC74020BBEA63B139B22514A08798E3404DD" \
+ "EF9519B3CD3A431B302B0A6DF25F14374FE1356D6D51C245" \
+ "E485B576625E7EC6F44C42E9A637ED6B0BFF5CB6F406B7ED" \
+ "EE386BFB5A899FA5AE9F24117C4B1FE649286651ECE45B3D" \
+ "C2007CB8A163BF0598DA48361C55D39A69163FA8FD24CF5F" \
+ "83655D23DCA3AD961C62F356208552BB9ED529077096966D" \
+ "670C354E4ABC9804F1746C08CA18217C32905E462E36CE3B" \
+ "E39E772C180E86039B2783A2EC07A28FB5C55DF06F4C52C9" \
+ "DE2BCBF6955817183995497CEA956AE515D2261898FA0510" \
+ "15728E5A8AAAC42DAD33170D04507A33A85521ABDF1CBA64" \
+ "ECFB850458DBEF0A8AEA71575D060C7DB3970F85A6E1E4C7" \
+ "ABF5AE8CDB0933D71E8C94E04A25619DCEE3D2261AD2EE6B" \
+ "F12FFA06D98A0864D87602733EC86A64521F2B18177B200C" \
+ "BBE117577A615D6C770988C0BAD946E208E24FA074E5AB31" \
+ "43DB5BFCE0FD108E4B82D120A93AD2CAFFFFFFFFFFFFFFFF" )
+
+/**
+ * The hexadecimal presentation of the chosen generator of the 3072-bit MODP
+ * Group, as defined in <em>RFC-3526: More Modular Exponential (MODP)
+ * Diffie-Hellman groups for Internet Key Exchange (IKE)</em>.
+ */
+#define MBEDTLS_DHM_RFC3526_MODP_3072_G \
+ MBEDTLS_DEPRECATED_STRING_CONSTANT( "02" )
+
+/**
+ * The hexadecimal presentation of the prime underlying the 4096-bit MODP
+ * Group, as defined in <em>RFC-3526: More Modular Exponential (MODP)
+ * Diffie-Hellman groups for Internet Key Exchange (IKE)</em>.
+ */
+#define MBEDTLS_DHM_RFC3526_MODP_4096_P \
+ MBEDTLS_DEPRECATED_STRING_CONSTANT( \
+ "FFFFFFFFFFFFFFFFC90FDAA22168C234C4C6628B80DC1CD1" \
+ "29024E088A67CC74020BBEA63B139B22514A08798E3404DD" \
+ "EF9519B3CD3A431B302B0A6DF25F14374FE1356D6D51C245" \
+ "E485B576625E7EC6F44C42E9A637ED6B0BFF5CB6F406B7ED" \
+ "EE386BFB5A899FA5AE9F24117C4B1FE649286651ECE45B3D" \
+ "C2007CB8A163BF0598DA48361C55D39A69163FA8FD24CF5F" \
+ "83655D23DCA3AD961C62F356208552BB9ED529077096966D" \
+ "670C354E4ABC9804F1746C08CA18217C32905E462E36CE3B" \
+ "E39E772C180E86039B2783A2EC07A28FB5C55DF06F4C52C9" \
+ "DE2BCBF6955817183995497CEA956AE515D2261898FA0510" \
+ "15728E5A8AAAC42DAD33170D04507A33A85521ABDF1CBA64" \
+ "ECFB850458DBEF0A8AEA71575D060C7DB3970F85A6E1E4C7" \
+ "ABF5AE8CDB0933D71E8C94E04A25619DCEE3D2261AD2EE6B" \
+ "F12FFA06D98A0864D87602733EC86A64521F2B18177B200C" \
+ "BBE117577A615D6C770988C0BAD946E208E24FA074E5AB31" \
+ "43DB5BFCE0FD108E4B82D120A92108011A723C12A787E6D7" \
+ "88719A10BDBA5B2699C327186AF4E23C1A946834B6150BDA" \
+ "2583E9CA2AD44CE8DBBBC2DB04DE8EF92E8EFC141FBECAA6" \
+ "287C59474E6BC05D99B2964FA090C3A2233BA186515BE7ED" \
+ "1F612970CEE2D7AFB81BDD762170481CD0069127D5B05AA9" \
+ "93B4EA988D8FDDC186FFB7DC90A6C08F4DF435C934063199" \
+ "FFFFFFFFFFFFFFFF" )
+
+/**
+ * The hexadecimal presentation of the chosen generator of the 4096-bit MODP
+ * Group, as defined in <em>RFC-3526: More Modular Exponential (MODP)
+ * Diffie-Hellman groups for Internet Key Exchange (IKE)</em>.
+ */
+#define MBEDTLS_DHM_RFC3526_MODP_4096_G \
+ MBEDTLS_DEPRECATED_STRING_CONSTANT( "02" )
+
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+
+/*
+ * Trustworthy DHM parameters in binary form
+ */
+
+#define MBEDTLS_DHM_RFC3526_MODP_2048_P_BIN { \
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, \
+ 0xC9, 0x0F, 0xDA, 0xA2, 0x21, 0x68, 0xC2, 0x34, \
+ 0xC4, 0xC6, 0x62, 0x8B, 0x80, 0xDC, 0x1C, 0xD1, \
+ 0x29, 0x02, 0x4E, 0x08, 0x8A, 0x67, 0xCC, 0x74, \
+ 0x02, 0x0B, 0xBE, 0xA6, 0x3B, 0x13, 0x9B, 0x22, \
+ 0x51, 0x4A, 0x08, 0x79, 0x8E, 0x34, 0x04, 0xDD, \
+ 0xEF, 0x95, 0x19, 0xB3, 0xCD, 0x3A, 0x43, 0x1B, \
+ 0x30, 0x2B, 0x0A, 0x6D, 0xF2, 0x5F, 0x14, 0x37, \
+ 0x4F, 0xE1, 0x35, 0x6D, 0x6D, 0x51, 0xC2, 0x45, \
+ 0xE4, 0x85, 0xB5, 0x76, 0x62, 0x5E, 0x7E, 0xC6, \
+ 0xF4, 0x4C, 0x42, 0xE9, 0xA6, 0x37, 0xED, 0x6B, \
+ 0x0B, 0xFF, 0x5C, 0xB6, 0xF4, 0x06, 0xB7, 0xED, \
+ 0xEE, 0x38, 0x6B, 0xFB, 0x5A, 0x89, 0x9F, 0xA5, \
+ 0xAE, 0x9F, 0x24, 0x11, 0x7C, 0x4B, 0x1F, 0xE6, \
+ 0x49, 0x28, 0x66, 0x51, 0xEC, 0xE4, 0x5B, 0x3D, \
+ 0xC2, 0x00, 0x7C, 0xB8, 0xA1, 0x63, 0xBF, 0x05, \
+ 0x98, 0xDA, 0x48, 0x36, 0x1C, 0x55, 0xD3, 0x9A, \
+ 0x69, 0x16, 0x3F, 0xA8, 0xFD, 0x24, 0xCF, 0x5F, \
+ 0x83, 0x65, 0x5D, 0x23, 0xDC, 0xA3, 0xAD, 0x96, \
+ 0x1C, 0x62, 0xF3, 0x56, 0x20, 0x85, 0x52, 0xBB, \
+ 0x9E, 0xD5, 0x29, 0x07, 0x70, 0x96, 0x96, 0x6D, \
+ 0x67, 0x0C, 0x35, 0x4E, 0x4A, 0xBC, 0x98, 0x04, \
+ 0xF1, 0x74, 0x6C, 0x08, 0xCA, 0x18, 0x21, 0x7C, \
+ 0x32, 0x90, 0x5E, 0x46, 0x2E, 0x36, 0xCE, 0x3B, \
+ 0xE3, 0x9E, 0x77, 0x2C, 0x18, 0x0E, 0x86, 0x03, \
+ 0x9B, 0x27, 0x83, 0xA2, 0xEC, 0x07, 0xA2, 0x8F, \
+ 0xB5, 0xC5, 0x5D, 0xF0, 0x6F, 0x4C, 0x52, 0xC9, \
+ 0xDE, 0x2B, 0xCB, 0xF6, 0x95, 0x58, 0x17, 0x18, \
+ 0x39, 0x95, 0x49, 0x7C, 0xEA, 0x95, 0x6A, 0xE5, \
+ 0x15, 0xD2, 0x26, 0x18, 0x98, 0xFA, 0x05, 0x10, \
+ 0x15, 0x72, 0x8E, 0x5A, 0x8A, 0xAC, 0xAA, 0x68, \
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }
+
+#define MBEDTLS_DHM_RFC3526_MODP_2048_G_BIN { 0x02 }
+
+#define MBEDTLS_DHM_RFC3526_MODP_3072_P_BIN { \
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, \
+ 0xC9, 0x0F, 0xDA, 0xA2, 0x21, 0x68, 0xC2, 0x34, \
+ 0xC4, 0xC6, 0x62, 0x8B, 0x80, 0xDC, 0x1C, 0xD1, \
+ 0x29, 0x02, 0x4E, 0x08, 0x8A, 0x67, 0xCC, 0x74, \
+ 0x02, 0x0B, 0xBE, 0xA6, 0x3B, 0x13, 0x9B, 0x22, \
+ 0x51, 0x4A, 0x08, 0x79, 0x8E, 0x34, 0x04, 0xDD, \
+ 0xEF, 0x95, 0x19, 0xB3, 0xCD, 0x3A, 0x43, 0x1B, \
+ 0x30, 0x2B, 0x0A, 0x6D, 0xF2, 0x5F, 0x14, 0x37, \
+ 0x4F, 0xE1, 0x35, 0x6D, 0x6D, 0x51, 0xC2, 0x45, \
+ 0xE4, 0x85, 0xB5, 0x76, 0x62, 0x5E, 0x7E, 0xC6, \
+ 0xF4, 0x4C, 0x42, 0xE9, 0xA6, 0x37, 0xED, 0x6B, \
+ 0x0B, 0xFF, 0x5C, 0xB6, 0xF4, 0x06, 0xB7, 0xED, \
+ 0xEE, 0x38, 0x6B, 0xFB, 0x5A, 0x89, 0x9F, 0xA5, \
+ 0xAE, 0x9F, 0x24, 0x11, 0x7C, 0x4B, 0x1F, 0xE6, \
+ 0x49, 0x28, 0x66, 0x51, 0xEC, 0xE4, 0x5B, 0x3D, \
+ 0xC2, 0x00, 0x7C, 0xB8, 0xA1, 0x63, 0xBF, 0x05, \
+ 0x98, 0xDA, 0x48, 0x36, 0x1C, 0x55, 0xD3, 0x9A, \
+ 0x69, 0x16, 0x3F, 0xA8, 0xFD, 0x24, 0xCF, 0x5F, \
+ 0x83, 0x65, 0x5D, 0x23, 0xDC, 0xA3, 0xAD, 0x96, \
+ 0x1C, 0x62, 0xF3, 0x56, 0x20, 0x85, 0x52, 0xBB, \
+ 0x9E, 0xD5, 0x29, 0x07, 0x70, 0x96, 0x96, 0x6D, \
+ 0x67, 0x0C, 0x35, 0x4E, 0x4A, 0xBC, 0x98, 0x04, \
+ 0xF1, 0x74, 0x6C, 0x08, 0xCA, 0x18, 0x21, 0x7C, \
+ 0x32, 0x90, 0x5E, 0x46, 0x2E, 0x36, 0xCE, 0x3B, \
+ 0xE3, 0x9E, 0x77, 0x2C, 0x18, 0x0E, 0x86, 0x03, \
+ 0x9B, 0x27, 0x83, 0xA2, 0xEC, 0x07, 0xA2, 0x8F, \
+ 0xB5, 0xC5, 0x5D, 0xF0, 0x6F, 0x4C, 0x52, 0xC9, \
+ 0xDE, 0x2B, 0xCB, 0xF6, 0x95, 0x58, 0x17, 0x18, \
+ 0x39, 0x95, 0x49, 0x7C, 0xEA, 0x95, 0x6A, 0xE5, \
+ 0x15, 0xD2, 0x26, 0x18, 0x98, 0xFA, 0x05, 0x10, \
+ 0x15, 0x72, 0x8E, 0x5A, 0x8A, 0xAA, 0xC4, 0x2D, \
+ 0xAD, 0x33, 0x17, 0x0D, 0x04, 0x50, 0x7A, 0x33, \
+ 0xA8, 0x55, 0x21, 0xAB, 0xDF, 0x1C, 0xBA, 0x64, \
+ 0xEC, 0xFB, 0x85, 0x04, 0x58, 0xDB, 0xEF, 0x0A, \
+ 0x8A, 0xEA, 0x71, 0x57, 0x5D, 0x06, 0x0C, 0x7D, \
+ 0xB3, 0x97, 0x0F, 0x85, 0xA6, 0xE1, 0xE4, 0xC7, \
+ 0xAB, 0xF5, 0xAE, 0x8C, 0xDB, 0x09, 0x33, 0xD7, \
+ 0x1E, 0x8C, 0x94, 0xE0, 0x4A, 0x25, 0x61, 0x9D, \
+ 0xCE, 0xE3, 0xD2, 0x26, 0x1A, 0xD2, 0xEE, 0x6B, \
+ 0xF1, 0x2F, 0xFA, 0x06, 0xD9, 0x8A, 0x08, 0x64, \
+ 0xD8, 0x76, 0x02, 0x73, 0x3E, 0xC8, 0x6A, 0x64, \
+ 0x52, 0x1F, 0x2B, 0x18, 0x17, 0x7B, 0x20, 0x0C, \
+ 0xBB, 0xE1, 0x17, 0x57, 0x7A, 0x61, 0x5D, 0x6C, \
+ 0x77, 0x09, 0x88, 0xC0, 0xBA, 0xD9, 0x46, 0xE2, \
+ 0x08, 0xE2, 0x4F, 0xA0, 0x74, 0xE5, 0xAB, 0x31, \
+ 0x43, 0xDB, 0x5B, 0xFC, 0xE0, 0xFD, 0x10, 0x8E, \
+ 0x4B, 0x82, 0xD1, 0x20, 0xA9, 0x3A, 0xD2, 0xCA, \
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }
+
+#define MBEDTLS_DHM_RFC3526_MODP_3072_G_BIN { 0x02 }
+
+#define MBEDTLS_DHM_RFC3526_MODP_4096_P_BIN { \
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, \
+ 0xC9, 0x0F, 0xDA, 0xA2, 0x21, 0x68, 0xC2, 0x34, \
+ 0xC4, 0xC6, 0x62, 0x8B, 0x80, 0xDC, 0x1C, 0xD1, \
+ 0x29, 0x02, 0x4E, 0x08, 0x8A, 0x67, 0xCC, 0x74, \
+ 0x02, 0x0B, 0xBE, 0xA6, 0x3B, 0x13, 0x9B, 0x22, \
+ 0x51, 0x4A, 0x08, 0x79, 0x8E, 0x34, 0x04, 0xDD, \
+ 0xEF, 0x95, 0x19, 0xB3, 0xCD, 0x3A, 0x43, 0x1B, \
+ 0x30, 0x2B, 0x0A, 0x6D, 0xF2, 0x5F, 0x14, 0x37, \
+ 0x4F, 0xE1, 0x35, 0x6D, 0x6D, 0x51, 0xC2, 0x45, \
+ 0xE4, 0x85, 0xB5, 0x76, 0x62, 0x5E, 0x7E, 0xC6, \
+ 0xF4, 0x4C, 0x42, 0xE9, 0xA6, 0x37, 0xED, 0x6B, \
+ 0x0B, 0xFF, 0x5C, 0xB6, 0xF4, 0x06, 0xB7, 0xED, \
+ 0xEE, 0x38, 0x6B, 0xFB, 0x5A, 0x89, 0x9F, 0xA5, \
+ 0xAE, 0x9F, 0x24, 0x11, 0x7C, 0x4B, 0x1F, 0xE6, \
+ 0x49, 0x28, 0x66, 0x51, 0xEC, 0xE4, 0x5B, 0x3D, \
+ 0xC2, 0x00, 0x7C, 0xB8, 0xA1, 0x63, 0xBF, 0x05, \
+ 0x98, 0xDA, 0x48, 0x36, 0x1C, 0x55, 0xD3, 0x9A, \
+ 0x69, 0x16, 0x3F, 0xA8, 0xFD, 0x24, 0xCF, 0x5F, \
+ 0x83, 0x65, 0x5D, 0x23, 0xDC, 0xA3, 0xAD, 0x96, \
+ 0x1C, 0x62, 0xF3, 0x56, 0x20, 0x85, 0x52, 0xBB, \
+ 0x9E, 0xD5, 0x29, 0x07, 0x70, 0x96, 0x96, 0x6D, \
+ 0x67, 0x0C, 0x35, 0x4E, 0x4A, 0xBC, 0x98, 0x04, \
+ 0xF1, 0x74, 0x6C, 0x08, 0xCA, 0x18, 0x21, 0x7C, \
+ 0x32, 0x90, 0x5E, 0x46, 0x2E, 0x36, 0xCE, 0x3B, \
+ 0xE3, 0x9E, 0x77, 0x2C, 0x18, 0x0E, 0x86, 0x03, \
+ 0x9B, 0x27, 0x83, 0xA2, 0xEC, 0x07, 0xA2, 0x8F, \
+ 0xB5, 0xC5, 0x5D, 0xF0, 0x6F, 0x4C, 0x52, 0xC9, \
+ 0xDE, 0x2B, 0xCB, 0xF6, 0x95, 0x58, 0x17, 0x18, \
+ 0x39, 0x95, 0x49, 0x7C, 0xEA, 0x95, 0x6A, 0xE5, \
+ 0x15, 0xD2, 0x26, 0x18, 0x98, 0xFA, 0x05, 0x10, \
+ 0x15, 0x72, 0x8E, 0x5A, 0x8A, 0xAA, 0xC4, 0x2D, \
+ 0xAD, 0x33, 0x17, 0x0D, 0x04, 0x50, 0x7A, 0x33, \
+ 0xA8, 0x55, 0x21, 0xAB, 0xDF, 0x1C, 0xBA, 0x64, \
+ 0xEC, 0xFB, 0x85, 0x04, 0x58, 0xDB, 0xEF, 0x0A, \
+ 0x8A, 0xEA, 0x71, 0x57, 0x5D, 0x06, 0x0C, 0x7D, \
+ 0xB3, 0x97, 0x0F, 0x85, 0xA6, 0xE1, 0xE4, 0xC7, \
+ 0xAB, 0xF5, 0xAE, 0x8C, 0xDB, 0x09, 0x33, 0xD7, \
+ 0x1E, 0x8C, 0x94, 0xE0, 0x4A, 0x25, 0x61, 0x9D, \
+ 0xCE, 0xE3, 0xD2, 0x26, 0x1A, 0xD2, 0xEE, 0x6B, \
+ 0xF1, 0x2F, 0xFA, 0x06, 0xD9, 0x8A, 0x08, 0x64, \
+ 0xD8, 0x76, 0x02, 0x73, 0x3E, 0xC8, 0x6A, 0x64, \
+ 0x52, 0x1F, 0x2B, 0x18, 0x17, 0x7B, 0x20, 0x0C, \
+ 0xBB, 0xE1, 0x17, 0x57, 0x7A, 0x61, 0x5D, 0x6C, \
+ 0x77, 0x09, 0x88, 0xC0, 0xBA, 0xD9, 0x46, 0xE2, \
+ 0x08, 0xE2, 0x4F, 0xA0, 0x74, 0xE5, 0xAB, 0x31, \
+ 0x43, 0xDB, 0x5B, 0xFC, 0xE0, 0xFD, 0x10, 0x8E, \
+ 0x4B, 0x82, 0xD1, 0x20, 0xA9, 0x21, 0x08, 0x01, \
+ 0x1A, 0x72, 0x3C, 0x12, 0xA7, 0x87, 0xE6, 0xD7, \
+ 0x88, 0x71, 0x9A, 0x10, 0xBD, 0xBA, 0x5B, 0x26, \
+ 0x99, 0xC3, 0x27, 0x18, 0x6A, 0xF4, 0xE2, 0x3C, \
+ 0x1A, 0x94, 0x68, 0x34, 0xB6, 0x15, 0x0B, 0xDA, \
+ 0x25, 0x83, 0xE9, 0xCA, 0x2A, 0xD4, 0x4C, 0xE8, \
+ 0xDB, 0xBB, 0xC2, 0xDB, 0x04, 0xDE, 0x8E, 0xF9, \
+ 0x2E, 0x8E, 0xFC, 0x14, 0x1F, 0xBE, 0xCA, 0xA6, \
+ 0x28, 0x7C, 0x59, 0x47, 0x4E, 0x6B, 0xC0, 0x5D, \
+ 0x99, 0xB2, 0x96, 0x4F, 0xA0, 0x90, 0xC3, 0xA2, \
+ 0x23, 0x3B, 0xA1, 0x86, 0x51, 0x5B, 0xE7, 0xED, \
+ 0x1F, 0x61, 0x29, 0x70, 0xCE, 0xE2, 0xD7, 0xAF, \
+ 0xB8, 0x1B, 0xDD, 0x76, 0x21, 0x70, 0x48, 0x1C, \
+ 0xD0, 0x06, 0x91, 0x27, 0xD5, 0xB0, 0x5A, 0xA9, \
+ 0x93, 0xB4, 0xEA, 0x98, 0x8D, 0x8F, 0xDD, 0xC1, \
+ 0x86, 0xFF, 0xB7, 0xDC, 0x90, 0xA6, 0xC0, 0x8F, \
+ 0x4D, 0xF4, 0x35, 0xC9, 0x34, 0x06, 0x31, 0x99, \
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }
+
+#define MBEDTLS_DHM_RFC3526_MODP_4096_G_BIN { 0x02 }
+
+#define MBEDTLS_DHM_RFC7919_FFDHE2048_P_BIN { \
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, \
+ 0xAD, 0xF8, 0x54, 0x58, 0xA2, 0xBB, 0x4A, 0x9A, \
+ 0xAF, 0xDC, 0x56, 0x20, 0x27, 0x3D, 0x3C, 0xF1, \
+ 0xD8, 0xB9, 0xC5, 0x83, 0xCE, 0x2D, 0x36, 0x95, \
+ 0xA9, 0xE1, 0x36, 0x41, 0x14, 0x64, 0x33, 0xFB, \
+ 0xCC, 0x93, 0x9D, 0xCE, 0x24, 0x9B, 0x3E, 0xF9, \
+ 0x7D, 0x2F, 0xE3, 0x63, 0x63, 0x0C, 0x75, 0xD8, \
+ 0xF6, 0x81, 0xB2, 0x02, 0xAE, 0xC4, 0x61, 0x7A, \
+ 0xD3, 0xDF, 0x1E, 0xD5, 0xD5, 0xFD, 0x65, 0x61, \
+ 0x24, 0x33, 0xF5, 0x1F, 0x5F, 0x06, 0x6E, 0xD0, \
+ 0x85, 0x63, 0x65, 0x55, 0x3D, 0xED, 0x1A, 0xF3, \
+ 0xB5, 0x57, 0x13, 0x5E, 0x7F, 0x57, 0xC9, 0x35, \
+ 0x98, 0x4F, 0x0C, 0x70, 0xE0, 0xE6, 0x8B, 0x77, \
+ 0xE2, 0xA6, 0x89, 0xDA, 0xF3, 0xEF, 0xE8, 0x72, \
+ 0x1D, 0xF1, 0x58, 0xA1, 0x36, 0xAD, 0xE7, 0x35, \
+ 0x30, 0xAC, 0xCA, 0x4F, 0x48, 0x3A, 0x79, 0x7A, \
+ 0xBC, 0x0A, 0xB1, 0x82, 0xB3, 0x24, 0xFB, 0x61, \
+ 0xD1, 0x08, 0xA9, 0x4B, 0xB2, 0xC8, 0xE3, 0xFB, \
+ 0xB9, 0x6A, 0xDA, 0xB7, 0x60, 0xD7, 0xF4, 0x68, \
+ 0x1D, 0x4F, 0x42, 0xA3, 0xDE, 0x39, 0x4D, 0xF4, \
+ 0xAE, 0x56, 0xED, 0xE7, 0x63, 0x72, 0xBB, 0x19, \
+ 0x0B, 0x07, 0xA7, 0xC8, 0xEE, 0x0A, 0x6D, 0x70, \
+ 0x9E, 0x02, 0xFC, 0xE1, 0xCD, 0xF7, 0xE2, 0xEC, \
+ 0xC0, 0x34, 0x04, 0xCD, 0x28, 0x34, 0x2F, 0x61, \
+ 0x91, 0x72, 0xFE, 0x9C, 0xE9, 0x85, 0x83, 0xFF, \
+ 0x8E, 0x4F, 0x12, 0x32, 0xEE, 0xF2, 0x81, 0x83, \
+ 0xC3, 0xFE, 0x3B, 0x1B, 0x4C, 0x6F, 0xAD, 0x73, \
+ 0x3B, 0xB5, 0xFC, 0xBC, 0x2E, 0xC2, 0x20, 0x05, \
+ 0xC5, 0x8E, 0xF1, 0x83, 0x7D, 0x16, 0x83, 0xB2, \
+ 0xC6, 0xF3, 0x4A, 0x26, 0xC1, 0xB2, 0xEF, 0xFA, \
+ 0x88, 0x6B, 0x42, 0x38, 0x61, 0x28, 0x5C, 0x97, \
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, }
+
+#define MBEDTLS_DHM_RFC7919_FFDHE2048_G_BIN { 0x02 }
+
+#define MBEDTLS_DHM_RFC7919_FFDHE3072_P_BIN { \
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, \
+ 0xAD, 0xF8, 0x54, 0x58, 0xA2, 0xBB, 0x4A, 0x9A, \
+ 0xAF, 0xDC, 0x56, 0x20, 0x27, 0x3D, 0x3C, 0xF1, \
+ 0xD8, 0xB9, 0xC5, 0x83, 0xCE, 0x2D, 0x36, 0x95, \
+ 0xA9, 0xE1, 0x36, 0x41, 0x14, 0x64, 0x33, 0xFB, \
+ 0xCC, 0x93, 0x9D, 0xCE, 0x24, 0x9B, 0x3E, 0xF9, \
+ 0x7D, 0x2F, 0xE3, 0x63, 0x63, 0x0C, 0x75, 0xD8, \
+ 0xF6, 0x81, 0xB2, 0x02, 0xAE, 0xC4, 0x61, 0x7A, \
+ 0xD3, 0xDF, 0x1E, 0xD5, 0xD5, 0xFD, 0x65, 0x61, \
+ 0x24, 0x33, 0xF5, 0x1F, 0x5F, 0x06, 0x6E, 0xD0, \
+ 0x85, 0x63, 0x65, 0x55, 0x3D, 0xED, 0x1A, 0xF3, \
+ 0xB5, 0x57, 0x13, 0x5E, 0x7F, 0x57, 0xC9, 0x35, \
+ 0x98, 0x4F, 0x0C, 0x70, 0xE0, 0xE6, 0x8B, 0x77, \
+ 0xE2, 0xA6, 0x89, 0xDA, 0xF3, 0xEF, 0xE8, 0x72, \
+ 0x1D, 0xF1, 0x58, 0xA1, 0x36, 0xAD, 0xE7, 0x35, \
+ 0x30, 0xAC, 0xCA, 0x4F, 0x48, 0x3A, 0x79, 0x7A, \
+ 0xBC, 0x0A, 0xB1, 0x82, 0xB3, 0x24, 0xFB, 0x61, \
+ 0xD1, 0x08, 0xA9, 0x4B, 0xB2, 0xC8, 0xE3, 0xFB, \
+ 0xB9, 0x6A, 0xDA, 0xB7, 0x60, 0xD7, 0xF4, 0x68, \
+ 0x1D, 0x4F, 0x42, 0xA3, 0xDE, 0x39, 0x4D, 0xF4, \
+ 0xAE, 0x56, 0xED, 0xE7, 0x63, 0x72, 0xBB, 0x19, \
+ 0x0B, 0x07, 0xA7, 0xC8, 0xEE, 0x0A, 0x6D, 0x70, \
+ 0x9E, 0x02, 0xFC, 0xE1, 0xCD, 0xF7, 0xE2, 0xEC, \
+ 0xC0, 0x34, 0x04, 0xCD, 0x28, 0x34, 0x2F, 0x61, \
+ 0x91, 0x72, 0xFE, 0x9C, 0xE9, 0x85, 0x83, 0xFF, \
+ 0x8E, 0x4F, 0x12, 0x32, 0xEE, 0xF2, 0x81, 0x83, \
+ 0xC3, 0xFE, 0x3B, 0x1B, 0x4C, 0x6F, 0xAD, 0x73, \
+ 0x3B, 0xB5, 0xFC, 0xBC, 0x2E, 0xC2, 0x20, 0x05, \
+ 0xC5, 0x8E, 0xF1, 0x83, 0x7D, 0x16, 0x83, 0xB2, \
+ 0xC6, 0xF3, 0x4A, 0x26, 0xC1, 0xB2, 0xEF, 0xFA, \
+ 0x88, 0x6B, 0x42, 0x38, 0x61, 0x1F, 0xCF, 0xDC, \
+ 0xDE, 0x35, 0x5B, 0x3B, 0x65, 0x19, 0x03, 0x5B, \
+ 0xBC, 0x34, 0xF4, 0xDE, 0xF9, 0x9C, 0x02, 0x38, \
+ 0x61, 0xB4, 0x6F, 0xC9, 0xD6, 0xE6, 0xC9, 0x07, \
+ 0x7A, 0xD9, 0x1D, 0x26, 0x91, 0xF7, 0xF7, 0xEE, \
+ 0x59, 0x8C, 0xB0, 0xFA, 0xC1, 0x86, 0xD9, 0x1C, \
+ 0xAE, 0xFE, 0x13, 0x09, 0x85, 0x13, 0x92, 0x70, \
+ 0xB4, 0x13, 0x0C, 0x93, 0xBC, 0x43, 0x79, 0x44, \
+ 0xF4, 0xFD, 0x44, 0x52, 0xE2, 0xD7, 0x4D, 0xD3, \
+ 0x64, 0xF2, 0xE2, 0x1E, 0x71, 0xF5, 0x4B, 0xFF, \
+ 0x5C, 0xAE, 0x82, 0xAB, 0x9C, 0x9D, 0xF6, 0x9E, \
+ 0xE8, 0x6D, 0x2B, 0xC5, 0x22, 0x36, 0x3A, 0x0D, \
+ 0xAB, 0xC5, 0x21, 0x97, 0x9B, 0x0D, 0xEA, 0xDA, \
+ 0x1D, 0xBF, 0x9A, 0x42, 0xD5, 0xC4, 0x48, 0x4E, \
+ 0x0A, 0xBC, 0xD0, 0x6B, 0xFA, 0x53, 0xDD, 0xEF, \
+ 0x3C, 0x1B, 0x20, 0xEE, 0x3F, 0xD5, 0x9D, 0x7C, \
+ 0x25, 0xE4, 0x1D, 0x2B, 0x66, 0xC6, 0x2E, 0x37, \
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }
+
+#define MBEDTLS_DHM_RFC7919_FFDHE3072_G_BIN { 0x02 }
+
+#define MBEDTLS_DHM_RFC7919_FFDHE4096_P_BIN { \
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, \
+ 0xAD, 0xF8, 0x54, 0x58, 0xA2, 0xBB, 0x4A, 0x9A, \
+ 0xAF, 0xDC, 0x56, 0x20, 0x27, 0x3D, 0x3C, 0xF1, \
+ 0xD8, 0xB9, 0xC5, 0x83, 0xCE, 0x2D, 0x36, 0x95, \
+ 0xA9, 0xE1, 0x36, 0x41, 0x14, 0x64, 0x33, 0xFB, \
+ 0xCC, 0x93, 0x9D, 0xCE, 0x24, 0x9B, 0x3E, 0xF9, \
+ 0x7D, 0x2F, 0xE3, 0x63, 0x63, 0x0C, 0x75, 0xD8, \
+ 0xF6, 0x81, 0xB2, 0x02, 0xAE, 0xC4, 0x61, 0x7A, \
+ 0xD3, 0xDF, 0x1E, 0xD5, 0xD5, 0xFD, 0x65, 0x61, \
+ 0x24, 0x33, 0xF5, 0x1F, 0x5F, 0x06, 0x6E, 0xD0, \
+ 0x85, 0x63, 0x65, 0x55, 0x3D, 0xED, 0x1A, 0xF3, \
+ 0xB5, 0x57, 0x13, 0x5E, 0x7F, 0x57, 0xC9, 0x35, \
+ 0x98, 0x4F, 0x0C, 0x70, 0xE0, 0xE6, 0x8B, 0x77, \
+ 0xE2, 0xA6, 0x89, 0xDA, 0xF3, 0xEF, 0xE8, 0x72, \
+ 0x1D, 0xF1, 0x58, 0xA1, 0x36, 0xAD, 0xE7, 0x35, \
+ 0x30, 0xAC, 0xCA, 0x4F, 0x48, 0x3A, 0x79, 0x7A, \
+ 0xBC, 0x0A, 0xB1, 0x82, 0xB3, 0x24, 0xFB, 0x61, \
+ 0xD1, 0x08, 0xA9, 0x4B, 0xB2, 0xC8, 0xE3, 0xFB, \
+ 0xB9, 0x6A, 0xDA, 0xB7, 0x60, 0xD7, 0xF4, 0x68, \
+ 0x1D, 0x4F, 0x42, 0xA3, 0xDE, 0x39, 0x4D, 0xF4, \
+ 0xAE, 0x56, 0xED, 0xE7, 0x63, 0x72, 0xBB, 0x19, \
+ 0x0B, 0x07, 0xA7, 0xC8, 0xEE, 0x0A, 0x6D, 0x70, \
+ 0x9E, 0x02, 0xFC, 0xE1, 0xCD, 0xF7, 0xE2, 0xEC, \
+ 0xC0, 0x34, 0x04, 0xCD, 0x28, 0x34, 0x2F, 0x61, \
+ 0x91, 0x72, 0xFE, 0x9C, 0xE9, 0x85, 0x83, 0xFF, \
+ 0x8E, 0x4F, 0x12, 0x32, 0xEE, 0xF2, 0x81, 0x83, \
+ 0xC3, 0xFE, 0x3B, 0x1B, 0x4C, 0x6F, 0xAD, 0x73, \
+ 0x3B, 0xB5, 0xFC, 0xBC, 0x2E, 0xC2, 0x20, 0x05, \
+ 0xC5, 0x8E, 0xF1, 0x83, 0x7D, 0x16, 0x83, 0xB2, \
+ 0xC6, 0xF3, 0x4A, 0x26, 0xC1, 0xB2, 0xEF, 0xFA, \
+ 0x88, 0x6B, 0x42, 0x38, 0x61, 0x1F, 0xCF, 0xDC, \
+ 0xDE, 0x35, 0x5B, 0x3B, 0x65, 0x19, 0x03, 0x5B, \
+ 0xBC, 0x34, 0xF4, 0xDE, 0xF9, 0x9C, 0x02, 0x38, \
+ 0x61, 0xB4, 0x6F, 0xC9, 0xD6, 0xE6, 0xC9, 0x07, \
+ 0x7A, 0xD9, 0x1D, 0x26, 0x91, 0xF7, 0xF7, 0xEE, \
+ 0x59, 0x8C, 0xB0, 0xFA, 0xC1, 0x86, 0xD9, 0x1C, \
+ 0xAE, 0xFE, 0x13, 0x09, 0x85, 0x13, 0x92, 0x70, \
+ 0xB4, 0x13, 0x0C, 0x93, 0xBC, 0x43, 0x79, 0x44, \
+ 0xF4, 0xFD, 0x44, 0x52, 0xE2, 0xD7, 0x4D, 0xD3, \
+ 0x64, 0xF2, 0xE2, 0x1E, 0x71, 0xF5, 0x4B, 0xFF, \
+ 0x5C, 0xAE, 0x82, 0xAB, 0x9C, 0x9D, 0xF6, 0x9E, \
+ 0xE8, 0x6D, 0x2B, 0xC5, 0x22, 0x36, 0x3A, 0x0D, \
+ 0xAB, 0xC5, 0x21, 0x97, 0x9B, 0x0D, 0xEA, 0xDA, \
+ 0x1D, 0xBF, 0x9A, 0x42, 0xD5, 0xC4, 0x48, 0x4E, \
+ 0x0A, 0xBC, 0xD0, 0x6B, 0xFA, 0x53, 0xDD, 0xEF, \
+ 0x3C, 0x1B, 0x20, 0xEE, 0x3F, 0xD5, 0x9D, 0x7C, \
+ 0x25, 0xE4, 0x1D, 0x2B, 0x66, 0x9E, 0x1E, 0xF1, \
+ 0x6E, 0x6F, 0x52, 0xC3, 0x16, 0x4D, 0xF4, 0xFB, \
+ 0x79, 0x30, 0xE9, 0xE4, 0xE5, 0x88, 0x57, 0xB6, \
+ 0xAC, 0x7D, 0x5F, 0x42, 0xD6, 0x9F, 0x6D, 0x18, \
+ 0x77, 0x63, 0xCF, 0x1D, 0x55, 0x03, 0x40, 0x04, \
+ 0x87, 0xF5, 0x5B, 0xA5, 0x7E, 0x31, 0xCC, 0x7A, \
+ 0x71, 0x35, 0xC8, 0x86, 0xEF, 0xB4, 0x31, 0x8A, \
+ 0xED, 0x6A, 0x1E, 0x01, 0x2D, 0x9E, 0x68, 0x32, \
+ 0xA9, 0x07, 0x60, 0x0A, 0x91, 0x81, 0x30, 0xC4, \
+ 0x6D, 0xC7, 0x78, 0xF9, 0x71, 0xAD, 0x00, 0x38, \
+ 0x09, 0x29, 0x99, 0xA3, 0x33, 0xCB, 0x8B, 0x7A, \
+ 0x1A, 0x1D, 0xB9, 0x3D, 0x71, 0x40, 0x00, 0x3C, \
+ 0x2A, 0x4E, 0xCE, 0xA9, 0xF9, 0x8D, 0x0A, 0xCC, \
+ 0x0A, 0x82, 0x91, 0xCD, 0xCE, 0xC9, 0x7D, 0xCF, \
+ 0x8E, 0xC9, 0xB5, 0x5A, 0x7F, 0x88, 0xA4, 0x6B, \
+ 0x4D, 0xB5, 0xA8, 0x51, 0xF4, 0x41, 0x82, 0xE1, \
+ 0xC6, 0x8A, 0x00, 0x7E, 0x5E, 0x65, 0x5F, 0x6A, \
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }
+
+#define MBEDTLS_DHM_RFC7919_FFDHE4096_G_BIN { 0x02 }
+
+#define MBEDTLS_DHM_RFC7919_FFDHE6144_P_BIN { \
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, \
+ 0xAD, 0xF8, 0x54, 0x58, 0xA2, 0xBB, 0x4A, 0x9A, \
+ 0xAF, 0xDC, 0x56, 0x20, 0x27, 0x3D, 0x3C, 0xF1, \
+ 0xD8, 0xB9, 0xC5, 0x83, 0xCE, 0x2D, 0x36, 0x95, \
+ 0xA9, 0xE1, 0x36, 0x41, 0x14, 0x64, 0x33, 0xFB, \
+ 0xCC, 0x93, 0x9D, 0xCE, 0x24, 0x9B, 0x3E, 0xF9, \
+ 0x7D, 0x2F, 0xE3, 0x63, 0x63, 0x0C, 0x75, 0xD8, \
+ 0xF6, 0x81, 0xB2, 0x02, 0xAE, 0xC4, 0x61, 0x7A, \
+ 0xD3, 0xDF, 0x1E, 0xD5, 0xD5, 0xFD, 0x65, 0x61, \
+ 0x24, 0x33, 0xF5, 0x1F, 0x5F, 0x06, 0x6E, 0xD0, \
+ 0x85, 0x63, 0x65, 0x55, 0x3D, 0xED, 0x1A, 0xF3, \
+ 0xB5, 0x57, 0x13, 0x5E, 0x7F, 0x57, 0xC9, 0x35, \
+ 0x98, 0x4F, 0x0C, 0x70, 0xE0, 0xE6, 0x8B, 0x77, \
+ 0xE2, 0xA6, 0x89, 0xDA, 0xF3, 0xEF, 0xE8, 0x72, \
+ 0x1D, 0xF1, 0x58, 0xA1, 0x36, 0xAD, 0xE7, 0x35, \
+ 0x30, 0xAC, 0xCA, 0x4F, 0x48, 0x3A, 0x79, 0x7A, \
+ 0xBC, 0x0A, 0xB1, 0x82, 0xB3, 0x24, 0xFB, 0x61, \
+ 0xD1, 0x08, 0xA9, 0x4B, 0xB2, 0xC8, 0xE3, 0xFB, \
+ 0xB9, 0x6A, 0xDA, 0xB7, 0x60, 0xD7, 0xF4, 0x68, \
+ 0x1D, 0x4F, 0x42, 0xA3, 0xDE, 0x39, 0x4D, 0xF4, \
+ 0xAE, 0x56, 0xED, 0xE7, 0x63, 0x72, 0xBB, 0x19, \
+ 0x0B, 0x07, 0xA7, 0xC8, 0xEE, 0x0A, 0x6D, 0x70, \
+ 0x9E, 0x02, 0xFC, 0xE1, 0xCD, 0xF7, 0xE2, 0xEC, \
+ 0xC0, 0x34, 0x04, 0xCD, 0x28, 0x34, 0x2F, 0x61, \
+ 0x91, 0x72, 0xFE, 0x9C, 0xE9, 0x85, 0x83, 0xFF, \
+ 0x8E, 0x4F, 0x12, 0x32, 0xEE, 0xF2, 0x81, 0x83, \
+ 0xC3, 0xFE, 0x3B, 0x1B, 0x4C, 0x6F, 0xAD, 0x73, \
+ 0x3B, 0xB5, 0xFC, 0xBC, 0x2E, 0xC2, 0x20, 0x05, \
+ 0xC5, 0x8E, 0xF1, 0x83, 0x7D, 0x16, 0x83, 0xB2, \
+ 0xC6, 0xF3, 0x4A, 0x26, 0xC1, 0xB2, 0xEF, 0xFA, \
+ 0x88, 0x6B, 0x42, 0x38, 0x61, 0x1F, 0xCF, 0xDC, \
+ 0xDE, 0x35, 0x5B, 0x3B, 0x65, 0x19, 0x03, 0x5B, \
+ 0xBC, 0x34, 0xF4, 0xDE, 0xF9, 0x9C, 0x02, 0x38, \
+ 0x61, 0xB4, 0x6F, 0xC9, 0xD6, 0xE6, 0xC9, 0x07, \
+ 0x7A, 0xD9, 0x1D, 0x26, 0x91, 0xF7, 0xF7, 0xEE, \
+ 0x59, 0x8C, 0xB0, 0xFA, 0xC1, 0x86, 0xD9, 0x1C, \
+ 0xAE, 0xFE, 0x13, 0x09, 0x85, 0x13, 0x92, 0x70, \
+ 0xB4, 0x13, 0x0C, 0x93, 0xBC, 0x43, 0x79, 0x44, \
+ 0xF4, 0xFD, 0x44, 0x52, 0xE2, 0xD7, 0x4D, 0xD3, \
+ 0x64, 0xF2, 0xE2, 0x1E, 0x71, 0xF5, 0x4B, 0xFF, \
+ 0x5C, 0xAE, 0x82, 0xAB, 0x9C, 0x9D, 0xF6, 0x9E, \
+ 0xE8, 0x6D, 0x2B, 0xC5, 0x22, 0x36, 0x3A, 0x0D, \
+ 0xAB, 0xC5, 0x21, 0x97, 0x9B, 0x0D, 0xEA, 0xDA, \
+ 0x1D, 0xBF, 0x9A, 0x42, 0xD5, 0xC4, 0x48, 0x4E, \
+ 0x0A, 0xBC, 0xD0, 0x6B, 0xFA, 0x53, 0xDD, 0xEF, \
+ 0x3C, 0x1B, 0x20, 0xEE, 0x3F, 0xD5, 0x9D, 0x7C, \
+ 0x25, 0xE4, 0x1D, 0x2B, 0x66, 0x9E, 0x1E, 0xF1, \
+ 0x6E, 0x6F, 0x52, 0xC3, 0x16, 0x4D, 0xF4, 0xFB, \
+ 0x79, 0x30, 0xE9, 0xE4, 0xE5, 0x88, 0x57, 0xB6, \
+ 0xAC, 0x7D, 0x5F, 0x42, 0xD6, 0x9F, 0x6D, 0x18, \
+ 0x77, 0x63, 0xCF, 0x1D, 0x55, 0x03, 0x40, 0x04, \
+ 0x87, 0xF5, 0x5B, 0xA5, 0x7E, 0x31, 0xCC, 0x7A, \
+ 0x71, 0x35, 0xC8, 0x86, 0xEF, 0xB4, 0x31, 0x8A, \
+ 0xED, 0x6A, 0x1E, 0x01, 0x2D, 0x9E, 0x68, 0x32, \
+ 0xA9, 0x07, 0x60, 0x0A, 0x91, 0x81, 0x30, 0xC4, \
+ 0x6D, 0xC7, 0x78, 0xF9, 0x71, 0xAD, 0x00, 0x38, \
+ 0x09, 0x29, 0x99, 0xA3, 0x33, 0xCB, 0x8B, 0x7A, \
+ 0x1A, 0x1D, 0xB9, 0x3D, 0x71, 0x40, 0x00, 0x3C, \
+ 0x2A, 0x4E, 0xCE, 0xA9, 0xF9, 0x8D, 0x0A, 0xCC, \
+ 0x0A, 0x82, 0x91, 0xCD, 0xCE, 0xC9, 0x7D, 0xCF, \
+ 0x8E, 0xC9, 0xB5, 0x5A, 0x7F, 0x88, 0xA4, 0x6B, \
+ 0x4D, 0xB5, 0xA8, 0x51, 0xF4, 0x41, 0x82, 0xE1, \
+ 0xC6, 0x8A, 0x00, 0x7E, 0x5E, 0x0D, 0xD9, 0x02, \
+ 0x0B, 0xFD, 0x64, 0xB6, 0x45, 0x03, 0x6C, 0x7A, \
+ 0x4E, 0x67, 0x7D, 0x2C, 0x38, 0x53, 0x2A, 0x3A, \
+ 0x23, 0xBA, 0x44, 0x42, 0xCA, 0xF5, 0x3E, 0xA6, \
+ 0x3B, 0xB4, 0x54, 0x32, 0x9B, 0x76, 0x24, 0xC8, \
+ 0x91, 0x7B, 0xDD, 0x64, 0xB1, 0xC0, 0xFD, 0x4C, \
+ 0xB3, 0x8E, 0x8C, 0x33, 0x4C, 0x70, 0x1C, 0x3A, \
+ 0xCD, 0xAD, 0x06, 0x57, 0xFC, 0xCF, 0xEC, 0x71, \
+ 0x9B, 0x1F, 0x5C, 0x3E, 0x4E, 0x46, 0x04, 0x1F, \
+ 0x38, 0x81, 0x47, 0xFB, 0x4C, 0xFD, 0xB4, 0x77, \
+ 0xA5, 0x24, 0x71, 0xF7, 0xA9, 0xA9, 0x69, 0x10, \
+ 0xB8, 0x55, 0x32, 0x2E, 0xDB, 0x63, 0x40, 0xD8, \
+ 0xA0, 0x0E, 0xF0, 0x92, 0x35, 0x05, 0x11, 0xE3, \
+ 0x0A, 0xBE, 0xC1, 0xFF, 0xF9, 0xE3, 0xA2, 0x6E, \
+ 0x7F, 0xB2, 0x9F, 0x8C, 0x18, 0x30, 0x23, 0xC3, \
+ 0x58, 0x7E, 0x38, 0xDA, 0x00, 0x77, 0xD9, 0xB4, \
+ 0x76, 0x3E, 0x4E, 0x4B, 0x94, 0xB2, 0xBB, 0xC1, \
+ 0x94, 0xC6, 0x65, 0x1E, 0x77, 0xCA, 0xF9, 0x92, \
+ 0xEE, 0xAA, 0xC0, 0x23, 0x2A, 0x28, 0x1B, 0xF6, \
+ 0xB3, 0xA7, 0x39, 0xC1, 0x22, 0x61, 0x16, 0x82, \
+ 0x0A, 0xE8, 0xDB, 0x58, 0x47, 0xA6, 0x7C, 0xBE, \
+ 0xF9, 0xC9, 0x09, 0x1B, 0x46, 0x2D, 0x53, 0x8C, \
+ 0xD7, 0x2B, 0x03, 0x74, 0x6A, 0xE7, 0x7F, 0x5E, \
+ 0x62, 0x29, 0x2C, 0x31, 0x15, 0x62, 0xA8, 0x46, \
+ 0x50, 0x5D, 0xC8, 0x2D, 0xB8, 0x54, 0x33, 0x8A, \
+ 0xE4, 0x9F, 0x52, 0x35, 0xC9, 0x5B, 0x91, 0x17, \
+ 0x8C, 0xCF, 0x2D, 0xD5, 0xCA, 0xCE, 0xF4, 0x03, \
+ 0xEC, 0x9D, 0x18, 0x10, 0xC6, 0x27, 0x2B, 0x04, \
+ 0x5B, 0x3B, 0x71, 0xF9, 0xDC, 0x6B, 0x80, 0xD6, \
+ 0x3F, 0xDD, 0x4A, 0x8E, 0x9A, 0xDB, 0x1E, 0x69, \
+ 0x62, 0xA6, 0x95, 0x26, 0xD4, 0x31, 0x61, 0xC1, \
+ 0xA4, 0x1D, 0x57, 0x0D, 0x79, 0x38, 0xDA, 0xD4, \
+ 0xA4, 0x0E, 0x32, 0x9C, 0xD0, 0xE4, 0x0E, 0x65, \
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }
+
+#define MBEDTLS_DHM_RFC7919_FFDHE6144_G_BIN { 0x02 }
+
+#define MBEDTLS_DHM_RFC7919_FFDHE8192_P_BIN { \
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, \
+ 0xAD, 0xF8, 0x54, 0x58, 0xA2, 0xBB, 0x4A, 0x9A, \
+ 0xAF, 0xDC, 0x56, 0x20, 0x27, 0x3D, 0x3C, 0xF1, \
+ 0xD8, 0xB9, 0xC5, 0x83, 0xCE, 0x2D, 0x36, 0x95, \
+ 0xA9, 0xE1, 0x36, 0x41, 0x14, 0x64, 0x33, 0xFB, \
+ 0xCC, 0x93, 0x9D, 0xCE, 0x24, 0x9B, 0x3E, 0xF9, \
+ 0x7D, 0x2F, 0xE3, 0x63, 0x63, 0x0C, 0x75, 0xD8, \
+ 0xF6, 0x81, 0xB2, 0x02, 0xAE, 0xC4, 0x61, 0x7A, \
+ 0xD3, 0xDF, 0x1E, 0xD5, 0xD5, 0xFD, 0x65, 0x61, \
+ 0x24, 0x33, 0xF5, 0x1F, 0x5F, 0x06, 0x6E, 0xD0, \
+ 0x85, 0x63, 0x65, 0x55, 0x3D, 0xED, 0x1A, 0xF3, \
+ 0xB5, 0x57, 0x13, 0x5E, 0x7F, 0x57, 0xC9, 0x35, \
+ 0x98, 0x4F, 0x0C, 0x70, 0xE0, 0xE6, 0x8B, 0x77, \
+ 0xE2, 0xA6, 0x89, 0xDA, 0xF3, 0xEF, 0xE8, 0x72, \
+ 0x1D, 0xF1, 0x58, 0xA1, 0x36, 0xAD, 0xE7, 0x35, \
+ 0x30, 0xAC, 0xCA, 0x4F, 0x48, 0x3A, 0x79, 0x7A, \
+ 0xBC, 0x0A, 0xB1, 0x82, 0xB3, 0x24, 0xFB, 0x61, \
+ 0xD1, 0x08, 0xA9, 0x4B, 0xB2, 0xC8, 0xE3, 0xFB, \
+ 0xB9, 0x6A, 0xDA, 0xB7, 0x60, 0xD7, 0xF4, 0x68, \
+ 0x1D, 0x4F, 0x42, 0xA3, 0xDE, 0x39, 0x4D, 0xF4, \
+ 0xAE, 0x56, 0xED, 0xE7, 0x63, 0x72, 0xBB, 0x19, \
+ 0x0B, 0x07, 0xA7, 0xC8, 0xEE, 0x0A, 0x6D, 0x70, \
+ 0x9E, 0x02, 0xFC, 0xE1, 0xCD, 0xF7, 0xE2, 0xEC, \
+ 0xC0, 0x34, 0x04, 0xCD, 0x28, 0x34, 0x2F, 0x61, \
+ 0x91, 0x72, 0xFE, 0x9C, 0xE9, 0x85, 0x83, 0xFF, \
+ 0x8E, 0x4F, 0x12, 0x32, 0xEE, 0xF2, 0x81, 0x83, \
+ 0xC3, 0xFE, 0x3B, 0x1B, 0x4C, 0x6F, 0xAD, 0x73, \
+ 0x3B, 0xB5, 0xFC, 0xBC, 0x2E, 0xC2, 0x20, 0x05, \
+ 0xC5, 0x8E, 0xF1, 0x83, 0x7D, 0x16, 0x83, 0xB2, \
+ 0xC6, 0xF3, 0x4A, 0x26, 0xC1, 0xB2, 0xEF, 0xFA, \
+ 0x88, 0x6B, 0x42, 0x38, 0x61, 0x1F, 0xCF, 0xDC, \
+ 0xDE, 0x35, 0x5B, 0x3B, 0x65, 0x19, 0x03, 0x5B, \
+ 0xBC, 0x34, 0xF4, 0xDE, 0xF9, 0x9C, 0x02, 0x38, \
+ 0x61, 0xB4, 0x6F, 0xC9, 0xD6, 0xE6, 0xC9, 0x07, \
+ 0x7A, 0xD9, 0x1D, 0x26, 0x91, 0xF7, 0xF7, 0xEE, \
+ 0x59, 0x8C, 0xB0, 0xFA, 0xC1, 0x86, 0xD9, 0x1C, \
+ 0xAE, 0xFE, 0x13, 0x09, 0x85, 0x13, 0x92, 0x70, \
+ 0xB4, 0x13, 0x0C, 0x93, 0xBC, 0x43, 0x79, 0x44, \
+ 0xF4, 0xFD, 0x44, 0x52, 0xE2, 0xD7, 0x4D, 0xD3, \
+ 0x64, 0xF2, 0xE2, 0x1E, 0x71, 0xF5, 0x4B, 0xFF, \
+ 0x5C, 0xAE, 0x82, 0xAB, 0x9C, 0x9D, 0xF6, 0x9E, \
+ 0xE8, 0x6D, 0x2B, 0xC5, 0x22, 0x36, 0x3A, 0x0D, \
+ 0xAB, 0xC5, 0x21, 0x97, 0x9B, 0x0D, 0xEA, 0xDA, \
+ 0x1D, 0xBF, 0x9A, 0x42, 0xD5, 0xC4, 0x48, 0x4E, \
+ 0x0A, 0xBC, 0xD0, 0x6B, 0xFA, 0x53, 0xDD, 0xEF, \
+ 0x3C, 0x1B, 0x20, 0xEE, 0x3F, 0xD5, 0x9D, 0x7C, \
+ 0x25, 0xE4, 0x1D, 0x2B, 0x66, 0x9E, 0x1E, 0xF1, \
+ 0x6E, 0x6F, 0x52, 0xC3, 0x16, 0x4D, 0xF4, 0xFB, \
+ 0x79, 0x30, 0xE9, 0xE4, 0xE5, 0x88, 0x57, 0xB6, \
+ 0xAC, 0x7D, 0x5F, 0x42, 0xD6, 0x9F, 0x6D, 0x18, \
+ 0x77, 0x63, 0xCF, 0x1D, 0x55, 0x03, 0x40, 0x04, \
+ 0x87, 0xF5, 0x5B, 0xA5, 0x7E, 0x31, 0xCC, 0x7A, \
+ 0x71, 0x35, 0xC8, 0x86, 0xEF, 0xB4, 0x31, 0x8A, \
+ 0xED, 0x6A, 0x1E, 0x01, 0x2D, 0x9E, 0x68, 0x32, \
+ 0xA9, 0x07, 0x60, 0x0A, 0x91, 0x81, 0x30, 0xC4, \
+ 0x6D, 0xC7, 0x78, 0xF9, 0x71, 0xAD, 0x00, 0x38, \
+ 0x09, 0x29, 0x99, 0xA3, 0x33, 0xCB, 0x8B, 0x7A, \
+ 0x1A, 0x1D, 0xB9, 0x3D, 0x71, 0x40, 0x00, 0x3C, \
+ 0x2A, 0x4E, 0xCE, 0xA9, 0xF9, 0x8D, 0x0A, 0xCC, \
+ 0x0A, 0x82, 0x91, 0xCD, 0xCE, 0xC9, 0x7D, 0xCF, \
+ 0x8E, 0xC9, 0xB5, 0x5A, 0x7F, 0x88, 0xA4, 0x6B, \
+ 0x4D, 0xB5, 0xA8, 0x51, 0xF4, 0x41, 0x82, 0xE1, \
+ 0xC6, 0x8A, 0x00, 0x7E, 0x5E, 0x0D, 0xD9, 0x02, \
+ 0x0B, 0xFD, 0x64, 0xB6, 0x45, 0x03, 0x6C, 0x7A, \
+ 0x4E, 0x67, 0x7D, 0x2C, 0x38, 0x53, 0x2A, 0x3A, \
+ 0x23, 0xBA, 0x44, 0x42, 0xCA, 0xF5, 0x3E, 0xA6, \
+ 0x3B, 0xB4, 0x54, 0x32, 0x9B, 0x76, 0x24, 0xC8, \
+ 0x91, 0x7B, 0xDD, 0x64, 0xB1, 0xC0, 0xFD, 0x4C, \
+ 0xB3, 0x8E, 0x8C, 0x33, 0x4C, 0x70, 0x1C, 0x3A, \
+ 0xCD, 0xAD, 0x06, 0x57, 0xFC, 0xCF, 0xEC, 0x71, \
+ 0x9B, 0x1F, 0x5C, 0x3E, 0x4E, 0x46, 0x04, 0x1F, \
+ 0x38, 0x81, 0x47, 0xFB, 0x4C, 0xFD, 0xB4, 0x77, \
+ 0xA5, 0x24, 0x71, 0xF7, 0xA9, 0xA9, 0x69, 0x10, \
+ 0xB8, 0x55, 0x32, 0x2E, 0xDB, 0x63, 0x40, 0xD8, \
+ 0xA0, 0x0E, 0xF0, 0x92, 0x35, 0x05, 0x11, 0xE3, \
+ 0x0A, 0xBE, 0xC1, 0xFF, 0xF9, 0xE3, 0xA2, 0x6E, \
+ 0x7F, 0xB2, 0x9F, 0x8C, 0x18, 0x30, 0x23, 0xC3, \
+ 0x58, 0x7E, 0x38, 0xDA, 0x00, 0x77, 0xD9, 0xB4, \
+ 0x76, 0x3E, 0x4E, 0x4B, 0x94, 0xB2, 0xBB, 0xC1, \
+ 0x94, 0xC6, 0x65, 0x1E, 0x77, 0xCA, 0xF9, 0x92, \
+ 0xEE, 0xAA, 0xC0, 0x23, 0x2A, 0x28, 0x1B, 0xF6, \
+ 0xB3, 0xA7, 0x39, 0xC1, 0x22, 0x61, 0x16, 0x82, \
+ 0x0A, 0xE8, 0xDB, 0x58, 0x47, 0xA6, 0x7C, 0xBE, \
+ 0xF9, 0xC9, 0x09, 0x1B, 0x46, 0x2D, 0x53, 0x8C, \
+ 0xD7, 0x2B, 0x03, 0x74, 0x6A, 0xE7, 0x7F, 0x5E, \
+ 0x62, 0x29, 0x2C, 0x31, 0x15, 0x62, 0xA8, 0x46, \
+ 0x50, 0x5D, 0xC8, 0x2D, 0xB8, 0x54, 0x33, 0x8A, \
+ 0xE4, 0x9F, 0x52, 0x35, 0xC9, 0x5B, 0x91, 0x17, \
+ 0x8C, 0xCF, 0x2D, 0xD5, 0xCA, 0xCE, 0xF4, 0x03, \
+ 0xEC, 0x9D, 0x18, 0x10, 0xC6, 0x27, 0x2B, 0x04, \
+ 0x5B, 0x3B, 0x71, 0xF9, 0xDC, 0x6B, 0x80, 0xD6, \
+ 0x3F, 0xDD, 0x4A, 0x8E, 0x9A, 0xDB, 0x1E, 0x69, \
+ 0x62, 0xA6, 0x95, 0x26, 0xD4, 0x31, 0x61, 0xC1, \
+ 0xA4, 0x1D, 0x57, 0x0D, 0x79, 0x38, 0xDA, 0xD4, \
+ 0xA4, 0x0E, 0x32, 0x9C, 0xCF, 0xF4, 0x6A, 0xAA, \
+ 0x36, 0xAD, 0x00, 0x4C, 0xF6, 0x00, 0xC8, 0x38, \
+ 0x1E, 0x42, 0x5A, 0x31, 0xD9, 0x51, 0xAE, 0x64, \
+ 0xFD, 0xB2, 0x3F, 0xCE, 0xC9, 0x50, 0x9D, 0x43, \
+ 0x68, 0x7F, 0xEB, 0x69, 0xED, 0xD1, 0xCC, 0x5E, \
+ 0x0B, 0x8C, 0xC3, 0xBD, 0xF6, 0x4B, 0x10, 0xEF, \
+ 0x86, 0xB6, 0x31, 0x42, 0xA3, 0xAB, 0x88, 0x29, \
+ 0x55, 0x5B, 0x2F, 0x74, 0x7C, 0x93, 0x26, 0x65, \
+ 0xCB, 0x2C, 0x0F, 0x1C, 0xC0, 0x1B, 0xD7, 0x02, \
+ 0x29, 0x38, 0x88, 0x39, 0xD2, 0xAF, 0x05, 0xE4, \
+ 0x54, 0x50, 0x4A, 0xC7, 0x8B, 0x75, 0x82, 0x82, \
+ 0x28, 0x46, 0xC0, 0xBA, 0x35, 0xC3, 0x5F, 0x5C, \
+ 0x59, 0x16, 0x0C, 0xC0, 0x46, 0xFD, 0x82, 0x51, \
+ 0x54, 0x1F, 0xC6, 0x8C, 0x9C, 0x86, 0xB0, 0x22, \
+ 0xBB, 0x70, 0x99, 0x87, 0x6A, 0x46, 0x0E, 0x74, \
+ 0x51, 0xA8, 0xA9, 0x31, 0x09, 0x70, 0x3F, 0xEE, \
+ 0x1C, 0x21, 0x7E, 0x6C, 0x38, 0x26, 0xE5, 0x2C, \
+ 0x51, 0xAA, 0x69, 0x1E, 0x0E, 0x42, 0x3C, 0xFC, \
+ 0x99, 0xE9, 0xE3, 0x16, 0x50, 0xC1, 0x21, 0x7B, \
+ 0x62, 0x48, 0x16, 0xCD, 0xAD, 0x9A, 0x95, 0xF9, \
+ 0xD5, 0xB8, 0x01, 0x94, 0x88, 0xD9, 0xC0, 0xA0, \
+ 0xA1, 0xFE, 0x30, 0x75, 0xA5, 0x77, 0xE2, 0x31, \
+ 0x83, 0xF8, 0x1D, 0x4A, 0x3F, 0x2F, 0xA4, 0x57, \
+ 0x1E, 0xFC, 0x8C, 0xE0, 0xBA, 0x8A, 0x4F, 0xE8, \
+ 0xB6, 0x85, 0x5D, 0xFE, 0x72, 0xB0, 0xA6, 0x6E, \
+ 0xDE, 0xD2, 0xFB, 0xAB, 0xFB, 0xE5, 0x8A, 0x30, \
+ 0xFA, 0xFA, 0xBE, 0x1C, 0x5D, 0x71, 0xA8, 0x7E, \
+ 0x2F, 0x74, 0x1E, 0xF8, 0xC1, 0xFE, 0x86, 0xFE, \
+ 0xA6, 0xBB, 0xFD, 0xE5, 0x30, 0x67, 0x7F, 0x0D, \
+ 0x97, 0xD1, 0x1D, 0x49, 0xF7, 0xA8, 0x44, 0x3D, \
+ 0x08, 0x22, 0xE5, 0x06, 0xA9, 0xF4, 0x61, 0x4E, \
+ 0x01, 0x1E, 0x2A, 0x94, 0x83, 0x8F, 0xF8, 0x8C, \
+ 0xD6, 0x8C, 0x8B, 0xB7, 0xC5, 0xC6, 0x42, 0x4C, \
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }
+
+#define MBEDTLS_DHM_RFC7919_FFDHE8192_G_BIN { 0x02 }
+
+#endif /* dhm.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/dhm_alt.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/dhm_alt.h
new file mode 100644
index 0000000..19967c9
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/dhm_alt.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause OR Arm’s non-OSI source license
+ */
+
+#ifndef MBEDTLS_DHM_ALT_H
+#define MBEDTLS_DHM_ALT_H
+
+
+#if defined(MBEDTLS_DHM_ALT)
+
+
+#if defined(MBEDTLS_CONFIG_FILE)
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+
+/*
+ * DHM Error codes
+ */
+#define MBEDTLS_ERR_DHM_BAD_INPUT_DATA -0x3080 /**< Bad input parameters. */
+#define MBEDTLS_ERR_DHM_READ_PARAMS_FAILED -0x3100 /**< Reading of the DHM parameters failed. */
+#define MBEDTLS_ERR_DHM_MAKE_PARAMS_FAILED -0x3180 /**< Making of the DHM parameters failed. */
+#define MBEDTLS_ERR_DHM_READ_PUBLIC_FAILED -0x3200 /**< Reading of the public values failed. */
+#define MBEDTLS_ERR_DHM_MAKE_PUBLIC_FAILED -0x3280 /**< Making of the public value failed. */
+#define MBEDTLS_ERR_DHM_CALC_SECRET_FAILED -0x3300 /**< Calculation of the DHM secret failed. */
+#define MBEDTLS_ERR_DHM_INVALID_FORMAT -0x3380 /**< The ASN.1 data is not formatted correctly. */
+#define MBEDTLS_ERR_DHM_ALLOC_FAILED -0x3400 /**< Allocation of memory failed. */
+#define MBEDTLS_ERR_DHM_FILE_IO_ERROR -0x3480 /**< Read or write of file failed. */
+#define MBEDTLS_ERR_DHM_HW_ACCEL_FAILED -0x3500 /**< DHM hardware accelerator failed. */
+#define MBEDTLS_ERR_DHM_SET_GROUP_FAILED -0x3580 /**< Setting the modulus and generator failed. */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief The DHM context structure.
+ */
+typedef struct
+{
+ size_t len; /*!< The size of \p P in Bytes. */
+ mbedtls_mpi P; /*!< The prime modulus. */
+ mbedtls_mpi G; /*!< The generator. */
+ mbedtls_mpi X; /*!< Our secret value. */
+ mbedtls_mpi GX; /*!< Our public key = \c G^X mod \c P. */
+ mbedtls_mpi GY; /*!< The public key of the peer = \c G^Y mod \c P. */
+ mbedtls_mpi K; /*!< The shared secret = \c G^(XY) mod \c P. */
+ mbedtls_mpi RP; /*!< The cached value = \c R^2 mod \c P. */
+ mbedtls_mpi Vi; /*!< The blinding value. */
+ mbedtls_mpi Vf; /*!< The unblinding value. */
+ mbedtls_mpi pX; /*!< The previous \c X. */
+}
+mbedtls_dhm_context;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_DHM_ALT - use alternative code */
+#endif /* MBEDTLS_DHM_ALT_H - include only once */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ecdh.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ecdh.h
new file mode 100644
index 0000000..4479a1d
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ecdh.h
@@ -0,0 +1,440 @@
+/**
+ * \file ecdh.h
+ *
+ * \brief This file contains ECDH definitions and functions.
+ *
+ * The Elliptic Curve Diffie-Hellman (ECDH) protocol is an anonymous
+ * key agreement protocol allowing two parties to establish a shared
+ * secret over an insecure channel. Each party must have an
+ * elliptic-curve public–private key pair.
+ *
+ * For more information, see <em>NIST SP 800-56A Rev. 2: Recommendation for
+ * Pair-Wise Key Establishment Schemes Using Discrete Logarithm
+ * Cryptography</em>.
+ */
+/*
+ * Copyright (C) 2006-2018, Arm Limited (or its affiliates), All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of Mbed TLS (https://tls.mbed.org)
+ */
+
+#ifndef MBEDTLS_ECDH_H
+#define MBEDTLS_ECDH_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "ecp.h"
+
+/*
+ * Use a backward compatible ECDH context.
+ *
+ * This flag is always enabled for now and future versions might add a
+ * configuration option that conditionally undefines this flag.
+ * The configuration option in question may have a different name.
+ *
+ * Features undefining this flag, must have a warning in their description in
+ * config.h stating that the feature breaks backward compatibility.
+ */
+#define MBEDTLS_ECDH_LEGACY_CONTEXT
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Defines the source of the imported EC key.
+ */
+typedef enum
+{
+ MBEDTLS_ECDH_OURS, /**< Our key. */
+ MBEDTLS_ECDH_THEIRS, /**< The key of the peer. */
+} mbedtls_ecdh_side;
+
+#if !defined(MBEDTLS_ECDH_LEGACY_CONTEXT)
+/**
+ * Defines the ECDH implementation used.
+ *
+ * Later versions of the library may add new variants, therefore users should
+ * not make any assumptions about them.
+ */
+typedef enum
+{
+ MBEDTLS_ECDH_VARIANT_NONE = 0, /*!< Implementation not defined. */
+ MBEDTLS_ECDH_VARIANT_MBEDTLS_2_0,/*!< The default Mbed TLS implementation */
+} mbedtls_ecdh_variant;
+
+/**
+ * The context used by the default ECDH implementation.
+ *
+ * Later versions might change the structure of this context, therefore users
+ * should not make any assumptions about the structure of
+ * mbedtls_ecdh_context_mbed.
+ */
+typedef struct mbedtls_ecdh_context_mbed
+{
+ mbedtls_ecp_group grp; /*!< The elliptic curve used. */
+ mbedtls_mpi d; /*!< The private key. */
+ mbedtls_ecp_point Q; /*!< The public key. */
+ mbedtls_ecp_point Qp; /*!< The value of the public key of the peer. */
+ mbedtls_mpi z; /*!< The shared secret. */
+#if defined(MBEDTLS_ECP_RESTARTABLE)
+ mbedtls_ecp_restart_ctx rs; /*!< The restart context for EC computations. */
+#endif
+} mbedtls_ecdh_context_mbed;
+#endif
+
+/**
+ *
+ * \warning Performing multiple operations concurrently on the same
+ * ECDSA context is not supported; objects of this type
+ * should not be shared between multiple threads.
+ * \brief The ECDH context structure.
+ */
+typedef struct mbedtls_ecdh_context
+{
+#if defined(MBEDTLS_ECDH_LEGACY_CONTEXT)
+ mbedtls_ecp_group grp; /*!< The elliptic curve used. */
+ mbedtls_mpi d; /*!< The private key. */
+ mbedtls_ecp_point Q; /*!< The public key. */
+ mbedtls_ecp_point Qp; /*!< The value of the public key of the peer. */
+ mbedtls_mpi z; /*!< The shared secret. */
+ int point_format; /*!< The format of point export in TLS messages. */
+ mbedtls_ecp_point Vi; /*!< The blinding value. */
+ mbedtls_ecp_point Vf; /*!< The unblinding value. */
+ mbedtls_mpi _d; /*!< The previous \p d. */
+#if defined(MBEDTLS_ECP_RESTARTABLE)
+ int restart_enabled; /*!< The flag for restartable mode. */
+ mbedtls_ecp_restart_ctx rs; /*!< The restart context for EC computations. */
+#endif /* MBEDTLS_ECP_RESTARTABLE */
+#else
+ uint8_t point_format; /*!< The format of point export in TLS messages
+ as defined in RFC 4492. */
+ mbedtls_ecp_group_id grp_id;/*!< The elliptic curve used. */
+ mbedtls_ecdh_variant var; /*!< The ECDH implementation/structure used. */
+ union
+ {
+ mbedtls_ecdh_context_mbed mbed_ecdh;
+ } ctx; /*!< Implementation-specific context. The
+ context in use is specified by the \c var
+ field. */
+#if defined(MBEDTLS_ECP_RESTARTABLE)
+ uint8_t restart_enabled; /*!< The flag for restartable mode. Functions of
+ an alternative implementation not supporting
+ restartable mode must return
+ MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED error
+ if this flag is set. */
+#endif /* MBEDTLS_ECP_RESTARTABLE */
+#endif /* MBEDTLS_ECDH_LEGACY_CONTEXT */
+}
+mbedtls_ecdh_context;
+
+/**
+ * \brief This function generates an ECDH keypair on an elliptic
+ * curve.
+ *
+ * This function performs the first of two core computations
+ * implemented during the ECDH key exchange. The second core
+ * computation is performed by mbedtls_ecdh_compute_shared().
+ *
+ * \see ecp.h
+ *
+ * \param grp The ECP group to use. This must be initialized and have
+ * domain parameters loaded, for example through
+ * mbedtls_ecp_load() or mbedtls_ecp_tls_read_group().
+ * \param d The destination MPI (private key).
+ * This must be initialized.
+ * \param Q The destination point (public key).
+ * This must be initialized.
+ * \param f_rng The RNG function to use. This must not be \c NULL.
+ * \param p_rng The RNG context to be passed to \p f_rng. This may be
+ * \c NULL in case \p f_rng doesn't need a context argument.
+ *
+ * \return \c 0 on success.
+ * \return Another \c MBEDTLS_ERR_ECP_XXX or
+ * \c MBEDTLS_MPI_XXX error code on failure.
+ */
+int mbedtls_ecdh_gen_public( mbedtls_ecp_group *grp, mbedtls_mpi *d, mbedtls_ecp_point *Q,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+/**
+ * \brief This function computes the shared secret.
+ *
+ * This function performs the second of two core computations
+ * implemented during the ECDH key exchange. The first core
+ * computation is performed by mbedtls_ecdh_gen_public().
+ *
+ * \see ecp.h
+ *
+ * \note If \p f_rng is not NULL, it is used to implement
+ * countermeasures against side-channel attacks.
+ * For more information, see mbedtls_ecp_mul().
+ *
+ * \param grp The ECP group to use. This must be initialized and have
+ * domain parameters loaded, for example through
+ * mbedtls_ecp_load() or mbedtls_ecp_tls_read_group().
+ * \param z The destination MPI (shared secret).
+ * This must be initialized.
+ * \param Q The public key from another party.
+ * This must be initialized.
+ * \param d Our secret exponent (private key).
+ * This must be initialized.
+ * \param f_rng The RNG function. This may be \c NULL if randomization
+ * of intermediate results during the ECP computations is
+ * not needed (discouraged). See the documentation of
+ * mbedtls_ecp_mul() for more.
+ * \param p_rng The RNG context to be passed to \p f_rng. This may be
+ * \c NULL if \p f_rng is \c NULL or doesn't need a
+ * context argument.
+ *
+ * \return \c 0 on success.
+ * \return Another \c MBEDTLS_ERR_ECP_XXX or
+ * \c MBEDTLS_MPI_XXX error code on failure.
+ */
+int mbedtls_ecdh_compute_shared( mbedtls_ecp_group *grp, mbedtls_mpi *z,
+ const mbedtls_ecp_point *Q, const mbedtls_mpi *d,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+/**
+ * \brief This function initializes an ECDH context.
+ *
+ * \param ctx The ECDH context to initialize. This must not be \c NULL.
+ */
+void mbedtls_ecdh_init( mbedtls_ecdh_context *ctx );
+
+/**
+ * \brief This function sets up the ECDH context with the information
+ * given.
+ *
+ * This function should be called after mbedtls_ecdh_init() but
+ * before mbedtls_ecdh_make_params(). There is no need to call
+ * this function before mbedtls_ecdh_read_params().
+ *
+ * This is the first function used by a TLS server for ECDHE
+ * ciphersuites.
+ *
+ * \param ctx The ECDH context to set up. This must be initialized.
+ * \param grp_id The group id of the group to set up the context for.
+ *
+ * \return \c 0 on success.
+ */
+int mbedtls_ecdh_setup( mbedtls_ecdh_context *ctx,
+ mbedtls_ecp_group_id grp_id );
+
+/**
+ * \brief This function frees a context.
+ *
+ * \param ctx The context to free. This may be \c NULL, in which
+ * case this function does nothing. If it is not \c NULL,
+ * it must point to an initialized ECDH context.
+ */
+void mbedtls_ecdh_free( mbedtls_ecdh_context *ctx );
+
+/**
+ * \brief This function generates an EC key pair and exports its
+ * in the format used in a TLS ServerKeyExchange handshake
+ * message.
+ *
+ * This is the second function used by a TLS server for ECDHE
+ * ciphersuites. (It is called after mbedtls_ecdh_setup().)
+ *
+ * \see ecp.h
+ *
+ * \param ctx The ECDH context to use. This must be initialized
+ * and bound to a group, for example via mbedtls_ecdh_setup().
+ * \param olen The address at which to store the number of Bytes written.
+ * \param buf The destination buffer. This must be a writable buffer of
+ * length \p blen Bytes.
+ * \param blen The length of the destination buffer \p buf in Bytes.
+ * \param f_rng The RNG function to use. This must not be \c NULL.
+ * \param p_rng The RNG context to be passed to \p f_rng. This may be
+ * \c NULL in case \p f_rng doesn't need a context argument.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
+ * operations was reached: see \c mbedtls_ecp_set_max_ops().
+ * \return Another \c MBEDTLS_ERR_ECP_XXX error code on failure.
+ */
+int mbedtls_ecdh_make_params( mbedtls_ecdh_context *ctx, size_t *olen,
+ unsigned char *buf, size_t blen,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+/**
+ * \brief This function parses the ECDHE parameters in a
+ * TLS ServerKeyExchange handshake message.
+ *
+ * \note In a TLS handshake, this is the how the client
+ * sets up its ECDHE context from the server's public
+ * ECDHE key material.
+ *
+ * \see ecp.h
+ *
+ * \param ctx The ECDHE context to use. This must be initialized.
+ * \param buf On input, \c *buf must be the start of the input buffer.
+ * On output, \c *buf is updated to point to the end of the
+ * data that has been read. On success, this is the first byte
+ * past the end of the ServerKeyExchange parameters.
+ * On error, this is the point at which an error has been
+ * detected, which is usually not useful except to debug
+ * failures.
+ * \param end The end of the input buffer.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_ECP_XXX error code on failure.
+ *
+ */
+int mbedtls_ecdh_read_params( mbedtls_ecdh_context *ctx,
+ const unsigned char **buf,
+ const unsigned char *end );
+
+/**
+ * \brief This function sets up an ECDH context from an EC key.
+ *
+ * It is used by clients and servers in place of the
+ * ServerKeyEchange for static ECDH, and imports ECDH
+ * parameters from the EC key information of a certificate.
+ *
+ * \see ecp.h
+ *
+ * \param ctx The ECDH context to set up. This must be initialized.
+ * \param key The EC key to use. This must be initialized.
+ * \param side Defines the source of the key. Possible values are:
+ * - #MBEDTLS_ECDH_OURS: The key is ours.
+ * - #MBEDTLS_ECDH_THEIRS: The key is that of the peer.
+ *
+ * \return \c 0 on success.
+ * \return Another \c MBEDTLS_ERR_ECP_XXX error code on failure.
+ *
+ */
+int mbedtls_ecdh_get_params( mbedtls_ecdh_context *ctx,
+ const mbedtls_ecp_keypair *key,
+ mbedtls_ecdh_side side );
+
+/**
+ * \brief This function generates a public key and exports it
+ * as a TLS ClientKeyExchange payload.
+ *
+ * This is the second function used by a TLS client for ECDH(E)
+ * ciphersuites.
+ *
+ * \see ecp.h
+ *
+ * \param ctx The ECDH context to use. This must be initialized
+ * and bound to a group, the latter usually by
+ * mbedtls_ecdh_read_params().
+ * \param olen The address at which to store the number of Bytes written.
+ * This must not be \c NULL.
+ * \param buf The destination buffer. This must be a writable buffer
+ * of length \p blen Bytes.
+ * \param blen The size of the destination buffer \p buf in Bytes.
+ * \param f_rng The RNG function to use. This must not be \c NULL.
+ * \param p_rng The RNG context to be passed to \p f_rng. This may be
+ * \c NULL in case \p f_rng doesn't need a context argument.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
+ * operations was reached: see \c mbedtls_ecp_set_max_ops().
+ * \return Another \c MBEDTLS_ERR_ECP_XXX error code on failure.
+ */
+int mbedtls_ecdh_make_public( mbedtls_ecdh_context *ctx, size_t *olen,
+ unsigned char *buf, size_t blen,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+/**
+ * \brief This function parses and processes the ECDHE payload of a
+ * TLS ClientKeyExchange message.
+ *
+ * This is the third function used by a TLS server for ECDH(E)
+ * ciphersuites. (It is called after mbedtls_ecdh_setup() and
+ * mbedtls_ecdh_make_params().)
+ *
+ * \see ecp.h
+ *
+ * \param ctx The ECDH context to use. This must be initialized
+ * and bound to a group, for example via mbedtls_ecdh_setup().
+ * \param buf The pointer to the ClientKeyExchange payload. This must
+ * be a readable buffer of length \p blen Bytes.
+ * \param blen The length of the input buffer \p buf in Bytes.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_ECP_XXX error code on failure.
+ */
+int mbedtls_ecdh_read_public( mbedtls_ecdh_context *ctx,
+ const unsigned char *buf, size_t blen );
+
+/**
+ * \brief This function derives and exports the shared secret.
+ *
+ * This is the last function used by both TLS client
+ * and servers.
+ *
+ * \note If \p f_rng is not NULL, it is used to implement
+ * countermeasures against side-channel attacks.
+ * For more information, see mbedtls_ecp_mul().
+ *
+ * \see ecp.h
+
+ * \param ctx The ECDH context to use. This must be initialized
+ * and have its own private key generated and the peer's
+ * public key imported.
+ * \param olen The address at which to store the total number of
+ * Bytes written on success. This must not be \c NULL.
+ * \param buf The buffer to write the generated shared key to. This
+ * must be a writable buffer of size \p blen Bytes.
+ * \param blen The length of the destination buffer \p buf in Bytes.
+ * \param f_rng The RNG function, for blinding purposes. This may
+ * b \c NULL if blinding isn't needed.
+ * \param p_rng The RNG context. This may be \c NULL if \p f_rng
+ * doesn't need a context argument.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
+ * operations was reached: see \c mbedtls_ecp_set_max_ops().
+ * \return Another \c MBEDTLS_ERR_ECP_XXX error code on failure.
+ */
+int mbedtls_ecdh_calc_secret( mbedtls_ecdh_context *ctx, size_t *olen,
+ unsigned char *buf, size_t blen,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+#if defined(MBEDTLS_ECP_RESTARTABLE)
+/**
+ * \brief This function enables restartable EC computations for this
+ * context. (Default: disabled.)
+ *
+ * \see \c mbedtls_ecp_set_max_ops()
+ *
+ * \note It is not possible to safely disable restartable
+ * computations once enabled, except by free-ing the context,
+ * which cancels possible in-progress operations.
+ *
+ * \param ctx The ECDH context to use. This must be initialized.
+ */
+void mbedtls_ecdh_enable_restart( mbedtls_ecdh_context *ctx );
+#endif /* MBEDTLS_ECP_RESTARTABLE */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ecdh.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ecdsa.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ecdsa.h
new file mode 100644
index 0000000..f8b2850
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ecdsa.h
@@ -0,0 +1,545 @@
+/**
+ * \file ecdsa.h
+ *
+ * \brief This file contains ECDSA definitions and functions.
+ *
+ * The Elliptic Curve Digital Signature Algorithm (ECDSA) is defined in
+ * <em>Standards for Efficient Cryptography Group (SECG):
+ * SEC1 Elliptic Curve Cryptography</em>.
+ * The use of ECDSA for TLS is defined in <em>RFC-4492: Elliptic Curve
+ * Cryptography (ECC) Cipher Suites for Transport Layer Security (TLS)</em>.
+ *
+ */
+/*
+ * Copyright (C) 2006-2018, Arm Limited (or its affiliates), All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of Mbed TLS (https://tls.mbed.org)
+ */
+
+#ifndef MBEDTLS_ECDSA_H
+#define MBEDTLS_ECDSA_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "ecp.h"
+#include "md.h"
+
+/*
+ * RFC-4492 page 20:
+ *
+ * Ecdsa-Sig-Value ::= SEQUENCE {
+ * r INTEGER,
+ * s INTEGER
+ * }
+ *
+ * Size is at most
+ * 1 (tag) + 1 (len) + 1 (initial 0) + ECP_MAX_BYTES for each of r and s,
+ * twice that + 1 (tag) + 2 (len) for the sequence
+ * (assuming ECP_MAX_BYTES is less than 126 for r and s,
+ * and less than 124 (total len <= 255) for the sequence)
+ */
+#if MBEDTLS_ECP_MAX_BYTES > 124
+#error "MBEDTLS_ECP_MAX_BYTES bigger than expected, please fix MBEDTLS_ECDSA_MAX_LEN"
+#endif
+/** The maximal size of an ECDSA signature in Bytes. */
+#define MBEDTLS_ECDSA_MAX_LEN ( 3 + 2 * ( 3 + MBEDTLS_ECP_MAX_BYTES ) )
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief The ECDSA context structure.
+ *
+ * \warning Performing multiple operations concurrently on the same
+ * ECDSA context is not supported; objects of this type
+ * should not be shared between multiple threads.
+ */
+typedef mbedtls_ecp_keypair mbedtls_ecdsa_context;
+
+#if defined(MBEDTLS_ECP_RESTARTABLE)
+
+/**
+ * \brief Internal restart context for ecdsa_verify()
+ *
+ * \note Opaque struct, defined in ecdsa.c
+ */
+typedef struct mbedtls_ecdsa_restart_ver mbedtls_ecdsa_restart_ver_ctx;
+
+/**
+ * \brief Internal restart context for ecdsa_sign()
+ *
+ * \note Opaque struct, defined in ecdsa.c
+ */
+typedef struct mbedtls_ecdsa_restart_sig mbedtls_ecdsa_restart_sig_ctx;
+
+#if defined(MBEDTLS_ECDSA_DETERMINISTIC)
+/**
+ * \brief Internal restart context for ecdsa_sign_det()
+ *
+ * \note Opaque struct, defined in ecdsa.c
+ */
+typedef struct mbedtls_ecdsa_restart_det mbedtls_ecdsa_restart_det_ctx;
+#endif
+
+/**
+ * \brief General context for resuming ECDSA operations
+ */
+typedef struct
+{
+ mbedtls_ecp_restart_ctx ecp; /*!< base context for ECP restart and
+ shared administrative info */
+ mbedtls_ecdsa_restart_ver_ctx *ver; /*!< ecdsa_verify() sub-context */
+ mbedtls_ecdsa_restart_sig_ctx *sig; /*!< ecdsa_sign() sub-context */
+#if defined(MBEDTLS_ECDSA_DETERMINISTIC)
+ mbedtls_ecdsa_restart_det_ctx *det; /*!< ecdsa_sign_det() sub-context */
+#endif
+} mbedtls_ecdsa_restart_ctx;
+
+#else /* MBEDTLS_ECP_RESTARTABLE */
+
+/* Now we can declare functions that take a pointer to that */
+typedef void mbedtls_ecdsa_restart_ctx;
+
+#endif /* MBEDTLS_ECP_RESTARTABLE */
+
+/**
+ * \brief This function computes the ECDSA signature of a
+ * previously-hashed message.
+ *
+ * \note The deterministic version implemented in
+ * mbedtls_ecdsa_sign_det() is usually preferred.
+ *
+ * \note If the bitlength of the message hash is larger than the
+ * bitlength of the group order, then the hash is truncated
+ * as defined in <em>Standards for Efficient Cryptography Group
+ * (SECG): SEC1 Elliptic Curve Cryptography</em>, section
+ * 4.1.3, step 5.
+ *
+ * \see ecp.h
+ *
+ * \param grp The context for the elliptic curve to use.
+ * This must be initialized and have group parameters
+ * set, for example through mbedtls_ecp_group_load().
+ * \param r The MPI context in which to store the first part
+ * the signature. This must be initialized.
+ * \param s The MPI context in which to store the second part
+ * the signature. This must be initialized.
+ * \param d The private signing key. This must be initialized.
+ * \param buf The content to be signed. This is usually the hash of
+ * the original data to be signed. This must be a readable
+ * buffer of length \p blen Bytes. It may be \c NULL if
+ * \p blen is zero.
+ * \param blen The length of \p buf in Bytes.
+ * \param f_rng The RNG function. This must not be \c NULL.
+ * \param p_rng The RNG context to be passed to \p f_rng. This may be
+ * \c NULL if \p f_rng doesn't need a context parameter.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_ECP_XXX
+ * or \c MBEDTLS_MPI_XXX error code on failure.
+ */
+int mbedtls_ecdsa_sign( mbedtls_ecp_group *grp, mbedtls_mpi *r, mbedtls_mpi *s,
+ const mbedtls_mpi *d, const unsigned char *buf, size_t blen,
+ int (*f_rng)(void *, unsigned char *, size_t), void *p_rng );
+
+#if defined(MBEDTLS_ECDSA_DETERMINISTIC)
+/**
+ * \brief This function computes the ECDSA signature of a
+ * previously-hashed message, deterministic version.
+ *
+ * For more information, see <em>RFC-6979: Deterministic
+ * Usage of the Digital Signature Algorithm (DSA) and Elliptic
+ * Curve Digital Signature Algorithm (ECDSA)</em>.
+ *
+ * \note If the bitlength of the message hash is larger than the
+ * bitlength of the group order, then the hash is truncated as
+ * defined in <em>Standards for Efficient Cryptography Group
+ * (SECG): SEC1 Elliptic Curve Cryptography</em>, section
+ * 4.1.3, step 5.
+ *
+ * \see ecp.h
+ *
+ * \param grp The context for the elliptic curve to use.
+ * This must be initialized and have group parameters
+ * set, for example through mbedtls_ecp_group_load().
+ * \param r The MPI context in which to store the first part
+ * the signature. This must be initialized.
+ * \param s The MPI context in which to store the second part
+ * the signature. This must be initialized.
+ * \param d The private signing key. This must be initialized
+ * and setup, for example through mbedtls_ecp_gen_privkey().
+ * \param buf The hashed content to be signed. This must be a readable
+ * buffer of length \p blen Bytes. It may be \c NULL if
+ * \p blen is zero.
+ * \param blen The length of \p buf in Bytes.
+ * \param md_alg The hash algorithm used to hash the original data.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_MPI_XXX
+ * error code on failure.
+ */
+int mbedtls_ecdsa_sign_det( mbedtls_ecp_group *grp, mbedtls_mpi *r,
+ mbedtls_mpi *s, const mbedtls_mpi *d,
+ const unsigned char *buf, size_t blen,
+ mbedtls_md_type_t md_alg );
+#endif /* MBEDTLS_ECDSA_DETERMINISTIC */
+
+/**
+ * \brief This function verifies the ECDSA signature of a
+ * previously-hashed message.
+ *
+ * \note If the bitlength of the message hash is larger than the
+ * bitlength of the group order, then the hash is truncated as
+ * defined in <em>Standards for Efficient Cryptography Group
+ * (SECG): SEC1 Elliptic Curve Cryptography</em>, section
+ * 4.1.4, step 3.
+ *
+ * \see ecp.h
+ *
+ * \param grp The ECP group to use.
+ * This must be initialized and have group parameters
+ * set, for example through mbedtls_ecp_group_load().
+ * \param buf The hashed content that was signed. This must be a readable
+ * buffer of length \p blen Bytes. It may be \c NULL if
+ * \p blen is zero.
+ * \param blen The length of \p buf in Bytes.
+ * \param Q The public key to use for verification. This must be
+ * initialized and setup.
+ * \param r The first integer of the signature.
+ * This must be initialized.
+ * \param s The second integer of the signature.
+ * This must be initialized.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if the signature
+ * is invalid.
+ * \return An \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_MPI_XXX
+ * error code on failure for any other reason.
+ */
+int mbedtls_ecdsa_verify( mbedtls_ecp_group *grp,
+ const unsigned char *buf, size_t blen,
+ const mbedtls_ecp_point *Q, const mbedtls_mpi *r,
+ const mbedtls_mpi *s);
+
+/**
+ * \brief This function computes the ECDSA signature and writes it
+ * to a buffer, serialized as defined in <em>RFC-4492:
+ * Elliptic Curve Cryptography (ECC) Cipher Suites for
+ * Transport Layer Security (TLS)</em>.
+ *
+ * \warning It is not thread-safe to use the same context in
+ * multiple threads.
+ *
+ * \note The deterministic version is used if
+ * #MBEDTLS_ECDSA_DETERMINISTIC is defined. For more
+ * information, see <em>RFC-6979: Deterministic Usage
+ * of the Digital Signature Algorithm (DSA) and Elliptic
+ * Curve Digital Signature Algorithm (ECDSA)</em>.
+ *
+ * \note If the bitlength of the message hash is larger than the
+ * bitlength of the group order, then the hash is truncated as
+ * defined in <em>Standards for Efficient Cryptography Group
+ * (SECG): SEC1 Elliptic Curve Cryptography</em>, section
+ * 4.1.3, step 5.
+ *
+ * \see ecp.h
+ *
+ * \param ctx The ECDSA context to use. This must be initialized
+ * and have a group and private key bound to it, for example
+ * via mbedtls_ecdsa_genkey() or mbedtls_ecdsa_from_keypair().
+ * \param md_alg The message digest that was used to hash the message.
+ * \param hash The message hash to be signed. This must be a readable
+ * buffer of length \p blen Bytes.
+ * \param hlen The length of the hash \p hash in Bytes.
+ * \param sig The buffer to which to write the signature. This must be a
+ * writable buffer of length at least twice as large as the
+ * size of the curve used, plus 9. For example, 73 Bytes if
+ * a 256-bit curve is used. A buffer length of
+ * #MBEDTLS_ECDSA_MAX_LEN is always safe.
+ * \param slen The address at which to store the actual length of
+ * the signature written. Must not be \c NULL.
+ * \param f_rng The RNG function. This must not be \c NULL if
+ * #MBEDTLS_ECDSA_DETERMINISTIC is unset. Otherwise,
+ * it is unused and may be set to \c NULL.
+ * \param p_rng The RNG context to be passed to \p f_rng. This may be
+ * \c NULL if \p f_rng is \c NULL or doesn't use a context.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_ECP_XXX, \c MBEDTLS_ERR_MPI_XXX or
+ * \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_ecdsa_write_signature( mbedtls_ecdsa_context *ctx,
+ mbedtls_md_type_t md_alg,
+ const unsigned char *hash, size_t hlen,
+ unsigned char *sig, size_t *slen,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+/**
+ * \brief This function computes the ECDSA signature and writes it
+ * to a buffer, in a restartable way.
+ *
+ * \see \c mbedtls_ecdsa_write_signature()
+ *
+ * \note This function is like \c mbedtls_ecdsa_write_signature()
+ * but it can return early and restart according to the limit
+ * set with \c mbedtls_ecp_set_max_ops() to reduce blocking.
+ *
+ * \param ctx The ECDSA context to use. This must be initialized
+ * and have a group and private key bound to it, for example
+ * via mbedtls_ecdsa_genkey() or mbedtls_ecdsa_from_keypair().
+ * \param md_alg The message digest that was used to hash the message.
+ * \param hash The message hash to be signed. This must be a readable
+ * buffer of length \p blen Bytes.
+ * \param hlen The length of the hash \p hash in Bytes.
+ * \param sig The buffer to which to write the signature. This must be a
+ * writable buffer of length at least twice as large as the
+ * size of the curve used, plus 9. For example, 73 Bytes if
+ * a 256-bit curve is used. A buffer length of
+ * #MBEDTLS_ECDSA_MAX_LEN is always safe.
+ * \param slen The address at which to store the actual length of
+ * the signature written. Must not be \c NULL.
+ * \param f_rng The RNG function. This must not be \c NULL if
+ * #MBEDTLS_ECDSA_DETERMINISTIC is unset. Otherwise,
+ * it is unused and may be set to \c NULL.
+ * \param p_rng The RNG context to be passed to \p f_rng. This may be
+ * \c NULL if \p f_rng is \c NULL or doesn't use a context.
+ * \param rs_ctx The restart context to use. This may be \c NULL to disable
+ * restarting. If it is not \c NULL, it must point to an
+ * initialized restart context.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
+ * operations was reached: see \c mbedtls_ecp_set_max_ops().
+ * \return Another \c MBEDTLS_ERR_ECP_XXX, \c MBEDTLS_ERR_MPI_XXX or
+ * \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_ecdsa_write_signature_restartable( mbedtls_ecdsa_context *ctx,
+ mbedtls_md_type_t md_alg,
+ const unsigned char *hash, size_t hlen,
+ unsigned char *sig, size_t *slen,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng,
+ mbedtls_ecdsa_restart_ctx *rs_ctx );
+
+#if defined(MBEDTLS_ECDSA_DETERMINISTIC)
+#if ! defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief This function computes an ECDSA signature and writes
+ * it to a buffer, serialized as defined in <em>RFC-4492:
+ * Elliptic Curve Cryptography (ECC) Cipher Suites for
+ * Transport Layer Security (TLS)</em>.
+ *
+ * The deterministic version is defined in <em>RFC-6979:
+ * Deterministic Usage of the Digital Signature Algorithm (DSA)
+ * and Elliptic Curve Digital Signature Algorithm (ECDSA)</em>.
+ *
+ * \warning It is not thread-safe to use the same context in
+ * multiple threads.
+ *
+ * \note If the bitlength of the message hash is larger than the
+ * bitlength of the group order, then the hash is truncated as
+ * defined in <em>Standards for Efficient Cryptography Group
+ * (SECG): SEC1 Elliptic Curve Cryptography</em>, section
+ * 4.1.3, step 5.
+ *
+ * \see ecp.h
+ *
+ * \deprecated Superseded by mbedtls_ecdsa_write_signature() in
+ * Mbed TLS version 2.0 and later.
+ *
+ * \param ctx The ECDSA context to use. This must be initialized
+ * and have a group and private key bound to it, for example
+ * via mbedtls_ecdsa_genkey() or mbedtls_ecdsa_from_keypair().
+ * \param hash The message hash to be signed. This must be a readable
+ * buffer of length \p blen Bytes.
+ * \param hlen The length of the hash \p hash in Bytes.
+ * \param sig The buffer to which to write the signature. This must be a
+ * writable buffer of length at least twice as large as the
+ * size of the curve used, plus 9. For example, 73 Bytes if
+ * a 256-bit curve is used. A buffer length of
+ * #MBEDTLS_ECDSA_MAX_LEN is always safe.
+ * \param slen The address at which to store the actual length of
+ * the signature written. Must not be \c NULL.
+ * \param md_alg The message digest that was used to hash the message.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_ECP_XXX, \c MBEDTLS_ERR_MPI_XXX or
+ * \c MBEDTLS_ERR_ASN1_XXX error code on failure.
+ */
+int mbedtls_ecdsa_write_signature_det( mbedtls_ecdsa_context *ctx,
+ const unsigned char *hash, size_t hlen,
+ unsigned char *sig, size_t *slen,
+ mbedtls_md_type_t md_alg ) MBEDTLS_DEPRECATED;
+#undef MBEDTLS_DEPRECATED
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+#endif /* MBEDTLS_ECDSA_DETERMINISTIC */
+
+/**
+ * \brief This function reads and verifies an ECDSA signature.
+ *
+ * \note If the bitlength of the message hash is larger than the
+ * bitlength of the group order, then the hash is truncated as
+ * defined in <em>Standards for Efficient Cryptography Group
+ * (SECG): SEC1 Elliptic Curve Cryptography</em>, section
+ * 4.1.4, step 3.
+ *
+ * \see ecp.h
+ *
+ * \param ctx The ECDSA context to use. This must be initialized
+ * and have a group and public key bound to it.
+ * \param hash The message hash that was signed. This must be a readable
+ * buffer of length \p size Bytes.
+ * \param hlen The size of the hash \p hash.
+ * \param sig The signature to read and verify. This must be a readable
+ * buffer of length \p slen Bytes.
+ * \param slen The size of \p sig in Bytes.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if signature is invalid.
+ * \return #MBEDTLS_ERR_ECP_SIG_LEN_MISMATCH if there is a valid
+ * signature in \p sig, but its length is less than \p siglen.
+ * \return An \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_ERR_MPI_XXX
+ * error code on failure for any other reason.
+ */
+int mbedtls_ecdsa_read_signature( mbedtls_ecdsa_context *ctx,
+ const unsigned char *hash, size_t hlen,
+ const unsigned char *sig, size_t slen );
+
+/**
+ * \brief This function reads and verifies an ECDSA signature,
+ * in a restartable way.
+ *
+ * \see \c mbedtls_ecdsa_read_signature()
+ *
+ * \note This function is like \c mbedtls_ecdsa_read_signature()
+ * but it can return early and restart according to the limit
+ * set with \c mbedtls_ecp_set_max_ops() to reduce blocking.
+ *
+ * \param ctx The ECDSA context to use. This must be initialized
+ * and have a group and public key bound to it.
+ * \param hash The message hash that was signed. This must be a readable
+ * buffer of length \p size Bytes.
+ * \param hlen The size of the hash \p hash.
+ * \param sig The signature to read and verify. This must be a readable
+ * buffer of length \p slen Bytes.
+ * \param slen The size of \p sig in Bytes.
+ * \param rs_ctx The restart context to use. This may be \c NULL to disable
+ * restarting. If it is not \c NULL, it must point to an
+ * initialized restart context.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if signature is invalid.
+ * \return #MBEDTLS_ERR_ECP_SIG_LEN_MISMATCH if there is a valid
+ * signature in \p sig, but its length is less than \p siglen.
+ * \return #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
+ * operations was reached: see \c mbedtls_ecp_set_max_ops().
+ * \return Another \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_ERR_MPI_XXX
+ * error code on failure for any other reason.
+ */
+int mbedtls_ecdsa_read_signature_restartable( mbedtls_ecdsa_context *ctx,
+ const unsigned char *hash, size_t hlen,
+ const unsigned char *sig, size_t slen,
+ mbedtls_ecdsa_restart_ctx *rs_ctx );
+
+/**
+ * \brief This function generates an ECDSA keypair on the given curve.
+ *
+ * \see ecp.h
+ *
+ * \param ctx The ECDSA context to store the keypair in.
+ * This must be initialized.
+ * \param gid The elliptic curve to use. One of the various
+ * \c MBEDTLS_ECP_DP_XXX macros depending on configuration.
+ * \param f_rng The RNG function to use. This must not be \c NULL.
+ * \param p_rng The RNG context to be passed to \p f_rng. This may be
+ * \c NULL if \p f_rng doesn't need a context argument.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_ECP_XXX code on failure.
+ */
+int mbedtls_ecdsa_genkey( mbedtls_ecdsa_context *ctx, mbedtls_ecp_group_id gid,
+ int (*f_rng)(void *, unsigned char *, size_t), void *p_rng );
+
+/**
+ * \brief This function sets up an ECDSA context from an EC key pair.
+ *
+ * \see ecp.h
+ *
+ * \param ctx The ECDSA context to setup. This must be initialized.
+ * \param key The EC key to use. This must be initialized and hold
+ * a private-public key pair or a public key. In the former
+ * case, the ECDSA context may be used for signature creation
+ * and verification after this call. In the latter case, it
+ * may be used for signature verification.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_ECP_XXX code on failure.
+ */
+int mbedtls_ecdsa_from_keypair( mbedtls_ecdsa_context *ctx,
+ const mbedtls_ecp_keypair *key );
+
+/**
+ * \brief This function initializes an ECDSA context.
+ *
+ * \param ctx The ECDSA context to initialize.
+ * This must not be \c NULL.
+ */
+void mbedtls_ecdsa_init( mbedtls_ecdsa_context *ctx );
+
+/**
+ * \brief This function frees an ECDSA context.
+ *
+ * \param ctx The ECDSA context to free. This may be \c NULL,
+ * in which case this function does nothing. If it
+ * is not \c NULL, it must be initialized.
+ */
+void mbedtls_ecdsa_free( mbedtls_ecdsa_context *ctx );
+
+#if defined(MBEDTLS_ECP_RESTARTABLE)
+/**
+ * \brief Initialize a restart context.
+ *
+ * \param ctx The restart context to initialize.
+ * This must not be \c NULL.
+ */
+void mbedtls_ecdsa_restart_init( mbedtls_ecdsa_restart_ctx *ctx );
+
+/**
+ * \brief Free the components of a restart context.
+ *
+ * \param ctx The restart context to free. This may be \c NULL,
+ * in which case this function does nothing. If it
+ * is not \c NULL, it must be initialized.
+ */
+void mbedtls_ecdsa_restart_free( mbedtls_ecdsa_restart_ctx *ctx );
+#endif /* MBEDTLS_ECP_RESTARTABLE */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ecdsa.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ecjpake.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ecjpake.h
new file mode 100644
index 0000000..3d8d02a
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ecjpake.h
@@ -0,0 +1,277 @@
+/**
+ * \file ecjpake.h
+ *
+ * \brief Elliptic curve J-PAKE
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_ECJPAKE_H
+#define MBEDTLS_ECJPAKE_H
+
+/*
+ * J-PAKE is a password-authenticated key exchange that allows deriving a
+ * strong shared secret from a (potentially low entropy) pre-shared
+ * passphrase, with forward secrecy and mutual authentication.
+ * https://en.wikipedia.org/wiki/Password_Authenticated_Key_Exchange_by_Juggling
+ *
+ * This file implements the Elliptic Curve variant of J-PAKE,
+ * as defined in Chapter 7.4 of the Thread v1.0 Specification,
+ * available to members of the Thread Group http://threadgroup.org/
+ *
+ * As the J-PAKE algorithm is inherently symmetric, so is our API.
+ * Each party needs to send its first round message, in any order, to the
+ * other party, then each sends its second round message, in any order.
+ * The payloads are serialized in a way suitable for use in TLS, but could
+ * also be use outside TLS.
+ */
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "ecp.h"
+#include "md.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Roles in the EC J-PAKE exchange
+ */
+typedef enum {
+ MBEDTLS_ECJPAKE_CLIENT = 0, /**< Client */
+ MBEDTLS_ECJPAKE_SERVER, /**< Server */
+} mbedtls_ecjpake_role;
+
+#if !defined(MBEDTLS_ECJPAKE_ALT)
+/**
+ * EC J-PAKE context structure.
+ *
+ * J-PAKE is a symmetric protocol, except for the identifiers used in
+ * Zero-Knowledge Proofs, and the serialization of the second message
+ * (KeyExchange) as defined by the Thread spec.
+ *
+ * In order to benefit from this symmetry, we choose a different naming
+ * convetion from the Thread v1.0 spec. Correspondance is indicated in the
+ * description as a pair C: client name, S: server name
+ */
+typedef struct mbedtls_ecjpake_context
+{
+ const mbedtls_md_info_t *md_info; /**< Hash to use */
+ mbedtls_ecp_group grp; /**< Elliptic curve */
+ mbedtls_ecjpake_role role; /**< Are we client or server? */
+ int point_format; /**< Format for point export */
+
+ mbedtls_ecp_point Xm1; /**< My public key 1 C: X1, S: X3 */
+ mbedtls_ecp_point Xm2; /**< My public key 2 C: X2, S: X4 */
+ mbedtls_ecp_point Xp1; /**< Peer public key 1 C: X3, S: X1 */
+ mbedtls_ecp_point Xp2; /**< Peer public key 2 C: X4, S: X2 */
+ mbedtls_ecp_point Xp; /**< Peer public key C: Xs, S: Xc */
+
+ mbedtls_mpi xm1; /**< My private key 1 C: x1, S: x3 */
+ mbedtls_mpi xm2; /**< My private key 2 C: x2, S: x4 */
+
+ mbedtls_mpi s; /**< Pre-shared secret (passphrase) */
+} mbedtls_ecjpake_context;
+
+#else /* MBEDTLS_ECJPAKE_ALT */
+#include "ecjpake_alt.h"
+#endif /* MBEDTLS_ECJPAKE_ALT */
+
+/**
+ * \brief Initialize an ECJPAKE context.
+ *
+ * \param ctx The ECJPAKE context to initialize.
+ * This must not be \c NULL.
+ */
+void mbedtls_ecjpake_init( mbedtls_ecjpake_context *ctx );
+
+/**
+ * \brief Set up an ECJPAKE context for use.
+ *
+ * \note Currently the only values for hash/curve allowed by the
+ * standard are #MBEDTLS_MD_SHA256/#MBEDTLS_ECP_DP_SECP256R1.
+ *
+ * \param ctx The ECJPAKE context to set up. This must be initialized.
+ * \param role The role of the caller. This must be either
+ * #MBEDTLS_ECJPAKE_CLIENT or #MBEDTLS_ECJPAKE_SERVER.
+ * \param hash The identifier of the hash function to use,
+ * for example #MBEDTLS_MD_SHA256.
+ * \param curve The identifier of the elliptic curve to use,
+ * for example #MBEDTLS_ECP_DP_SECP256R1.
+ * \param secret The pre-shared secret (passphrase). This must be
+ * a readable buffer of length \p len Bytes. It need
+ * only be valid for the duration of this call.
+ * \param len The length of the pre-shared secret \p secret.
+ *
+ * \return \c 0 if successful.
+ * \return A negative error code on failure.
+ */
+int mbedtls_ecjpake_setup( mbedtls_ecjpake_context *ctx,
+ mbedtls_ecjpake_role role,
+ mbedtls_md_type_t hash,
+ mbedtls_ecp_group_id curve,
+ const unsigned char *secret,
+ size_t len );
+
+/**
+ * \brief Check if an ECJPAKE context is ready for use.
+ *
+ * \param ctx The ECJPAKE context to check. This must be
+ * initialized.
+ *
+ * \return \c 0 if the context is ready for use.
+ * \return #MBEDTLS_ERR_ECP_BAD_INPUT_DATA otherwise.
+ */
+int mbedtls_ecjpake_check( const mbedtls_ecjpake_context *ctx );
+
+/**
+ * \brief Generate and write the first round message
+ * (TLS: contents of the Client/ServerHello extension,
+ * excluding extension type and length bytes).
+ *
+ * \param ctx The ECJPAKE context to use. This must be
+ * initialized and set up.
+ * \param buf The buffer to write the contents to. This must be a
+ * writable buffer of length \p len Bytes.
+ * \param len The length of \p buf in Bytes.
+ * \param olen The address at which to store the total number
+ * of Bytes written to \p buf. This must not be \c NULL.
+ * \param f_rng The RNG function to use. This must not be \c NULL.
+ * \param p_rng The RNG parameter to be passed to \p f_rng. This
+ * may be \c NULL if \p f_rng doesn't use a context.
+ *
+ * \return \c 0 if successful.
+ * \return A negative error code on failure.
+ */
+int mbedtls_ecjpake_write_round_one( mbedtls_ecjpake_context *ctx,
+ unsigned char *buf, size_t len, size_t *olen,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+/**
+ * \brief Read and process the first round message
+ * (TLS: contents of the Client/ServerHello extension,
+ * excluding extension type and length bytes).
+ *
+ * \param ctx The ECJPAKE context to use. This must be initialized
+ * and set up.
+ * \param buf The buffer holding the first round message. This must
+ * be a readable buffer of length \p len Bytes.
+ * \param len The length in Bytes of \p buf.
+ *
+ * \return \c 0 if successful.
+ * \return A negative error code on failure.
+ */
+int mbedtls_ecjpake_read_round_one( mbedtls_ecjpake_context *ctx,
+ const unsigned char *buf,
+ size_t len );
+
+/**
+ * \brief Generate and write the second round message
+ * (TLS: contents of the Client/ServerKeyExchange).
+ *
+ * \param ctx The ECJPAKE context to use. This must be initialized,
+ * set up, and already have performed round one.
+ * \param buf The buffer to write the round two contents to.
+ * This must be a writable buffer of length \p len Bytes.
+ * \param len The size of \p buf in Bytes.
+ * \param olen The address at which to store the total number of Bytes
+ * written to \p buf. This must not be \c NULL.
+ * \param f_rng The RNG function to use. This must not be \c NULL.
+ * \param p_rng The RNG parameter to be passed to \p f_rng. This
+ * may be \c NULL if \p f_rng doesn't use a context.
+ *
+ * \return \c 0 if successful.
+ * \return A negative error code on failure.
+ */
+int mbedtls_ecjpake_write_round_two( mbedtls_ecjpake_context *ctx,
+ unsigned char *buf, size_t len, size_t *olen,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+/**
+ * \brief Read and process the second round message
+ * (TLS: contents of the Client/ServerKeyExchange).
+ *
+ * \param ctx The ECJPAKE context to use. This must be initialized
+ * and set up and already have performed round one.
+ * \param buf The buffer holding the second round message. This must
+ * be a readable buffer of length \p len Bytes.
+ * \param len The length in Bytes of \p buf.
+ *
+ * \return \c 0 if successful.
+ * \return A negative error code on failure.
+ */
+int mbedtls_ecjpake_read_round_two( mbedtls_ecjpake_context *ctx,
+ const unsigned char *buf,
+ size_t len );
+
+/**
+ * \brief Derive the shared secret
+ * (TLS: Pre-Master Secret).
+ *
+ * \param ctx The ECJPAKE context to use. This must be initialized,
+ * set up and have performed both round one and two.
+ * \param buf The buffer to write the derived secret to. This must
+ * be a writable buffer of length \p len Bytes.
+ * \param len The length of \p buf in Bytes.
+ * \param olen The address at which to store the total number of Bytes
+ * written to \p buf. This must not be \c NULL.
+ * \param f_rng The RNG function to use. This must not be \c NULL.
+ * \param p_rng The RNG parameter to be passed to \p f_rng. This
+ * may be \c NULL if \p f_rng doesn't use a context.
+ *
+ * \return \c 0 if successful.
+ * \return A negative error code on failure.
+ */
+int mbedtls_ecjpake_derive_secret( mbedtls_ecjpake_context *ctx,
+ unsigned char *buf, size_t len, size_t *olen,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+/**
+ * \brief This clears an ECJPAKE context and frees any
+ * embedded data structure.
+ *
+ * \param ctx The ECJPAKE context to free. This may be \c NULL,
+ * in which case this function does nothing. If it is not
+ * \c NULL, it must point to an initialized ECJPAKE context.
+ */
+void mbedtls_ecjpake_free( mbedtls_ecjpake_context *ctx );
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief Checkup routine
+ *
+ * \return 0 if successful, or 1 if a test failed
+ */
+int mbedtls_ecjpake_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* ecjpake.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ecp.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ecp.h
new file mode 100644
index 0000000..065a4cc
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ecp.h
@@ -0,0 +1,1132 @@
+/**
+ * \file ecp.h
+ *
+ * \brief This file provides an API for Elliptic Curves over GF(P) (ECP).
+ *
+ * The use of ECP in cryptography and TLS is defined in
+ * <em>Standards for Efficient Cryptography Group (SECG): SEC1
+ * Elliptic Curve Cryptography</em> and
+ * <em>RFC-4492: Elliptic Curve Cryptography (ECC) Cipher Suites
+ * for Transport Layer Security (TLS)</em>.
+ *
+ * <em>RFC-2409: The Internet Key Exchange (IKE)</em> defines ECP
+ * group types.
+ *
+ */
+
+/*
+ * Copyright (C) 2006-2018, Arm Limited (or its affiliates), All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of Mbed TLS (https://tls.mbed.org)
+ */
+
+#ifndef MBEDTLS_ECP_H
+#define MBEDTLS_ECP_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "bignum.h"
+
+/*
+ * ECP error codes
+ */
+#define MBEDTLS_ERR_ECP_BAD_INPUT_DATA -0x4F80 /**< Bad input parameters to function. */
+#define MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL -0x4F00 /**< The buffer is too small to write to. */
+#define MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE -0x4E80 /**< The requested feature is not available, for example, the requested curve is not supported. */
+#define MBEDTLS_ERR_ECP_VERIFY_FAILED -0x4E00 /**< The signature is not valid. */
+#define MBEDTLS_ERR_ECP_ALLOC_FAILED -0x4D80 /**< Memory allocation failed. */
+#define MBEDTLS_ERR_ECP_RANDOM_FAILED -0x4D00 /**< Generation of random value, such as ephemeral key, failed. */
+#define MBEDTLS_ERR_ECP_INVALID_KEY -0x4C80 /**< Invalid private or public key. */
+#define MBEDTLS_ERR_ECP_SIG_LEN_MISMATCH -0x4C00 /**< The buffer contains a valid signature followed by more data. */
+
+/* MBEDTLS_ERR_ECP_HW_ACCEL_FAILED is deprecated and should not be used. */
+#define MBEDTLS_ERR_ECP_HW_ACCEL_FAILED -0x4B80 /**< The ECP hardware accelerator failed. */
+
+#define MBEDTLS_ERR_ECP_IN_PROGRESS -0x4B00 /**< Operation in progress, call again with the same parameters to continue. */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Domain-parameter identifiers: curve, subgroup, and generator.
+ *
+ * \note Only curves over prime fields are supported.
+ *
+ * \warning This library does not support validation of arbitrary domain
+ * parameters. Therefore, only standardized domain parameters from trusted
+ * sources should be used. See mbedtls_ecp_group_load().
+ */
+typedef enum
+{
+ MBEDTLS_ECP_DP_NONE = 0, /*!< Curve not defined. */
+ MBEDTLS_ECP_DP_SECP192R1, /*!< Domain parameters for the 192-bit curve defined by FIPS 186-4 and SEC1. */
+ MBEDTLS_ECP_DP_SECP224R1, /*!< Domain parameters for the 224-bit curve defined by FIPS 186-4 and SEC1. */
+ MBEDTLS_ECP_DP_SECP256R1, /*!< Domain parameters for the 256-bit curve defined by FIPS 186-4 and SEC1. */
+ MBEDTLS_ECP_DP_SECP384R1, /*!< Domain parameters for the 384-bit curve defined by FIPS 186-4 and SEC1. */
+ MBEDTLS_ECP_DP_SECP521R1, /*!< Domain parameters for the 521-bit curve defined by FIPS 186-4 and SEC1. */
+ MBEDTLS_ECP_DP_BP256R1, /*!< Domain parameters for 256-bit Brainpool curve. */
+ MBEDTLS_ECP_DP_BP384R1, /*!< Domain parameters for 384-bit Brainpool curve. */
+ MBEDTLS_ECP_DP_BP512R1, /*!< Domain parameters for 512-bit Brainpool curve. */
+ MBEDTLS_ECP_DP_CURVE25519, /*!< Domain parameters for Curve25519. */
+ MBEDTLS_ECP_DP_SECP192K1, /*!< Domain parameters for 192-bit "Koblitz" curve. */
+ MBEDTLS_ECP_DP_SECP224K1, /*!< Domain parameters for 224-bit "Koblitz" curve. */
+ MBEDTLS_ECP_DP_SECP256K1, /*!< Domain parameters for 256-bit "Koblitz" curve. */
+ MBEDTLS_ECP_DP_CURVE448, /*!< Domain parameters for Curve448. */
+} mbedtls_ecp_group_id;
+
+/**
+ * The number of supported curves, plus one for #MBEDTLS_ECP_DP_NONE.
+ *
+ * \note Montgomery curves are currently excluded.
+ */
+#define MBEDTLS_ECP_DP_MAX 12
+
+/**
+ * Curve information, for use by other modules.
+ */
+typedef struct mbedtls_ecp_curve_info
+{
+ mbedtls_ecp_group_id grp_id; /*!< An internal identifier. */
+ uint16_t tls_id; /*!< The TLS NamedCurve identifier. */
+ uint16_t bit_size; /*!< The curve size in bits. */
+ const char *name; /*!< A human-friendly name. */
+} mbedtls_ecp_curve_info;
+
+/**
+ * \brief The ECP point structure, in Jacobian coordinates.
+ *
+ * \note All functions expect and return points satisfying
+ * the following condition: <code>Z == 0</code> or
+ * <code>Z == 1</code>. Other values of \p Z are
+ * used only by internal functions.
+ * The point is zero, or "at infinity", if <code>Z == 0</code>.
+ * Otherwise, \p X and \p Y are its standard (affine)
+ * coordinates.
+ */
+typedef struct mbedtls_ecp_point
+{
+ mbedtls_mpi X; /*!< The X coordinate of the ECP point. */
+ mbedtls_mpi Y; /*!< The Y coordinate of the ECP point. */
+ mbedtls_mpi Z; /*!< The Z coordinate of the ECP point. */
+}
+mbedtls_ecp_point;
+
+#if !defined(MBEDTLS_ECP_ALT)
+/*
+ * default mbed TLS elliptic curve arithmetic implementation
+ *
+ * (in case MBEDTLS_ECP_ALT is defined then the developer has to provide an
+ * alternative implementation for the whole module and it will replace this
+ * one.)
+ */
+
+/**
+ * \brief The ECP group structure.
+ *
+ * We consider two types of curve equations:
+ * <ul><li>Short Weierstrass: <code>y^2 = x^3 + A x + B mod P</code>
+ * (SEC1 + RFC-4492)</li>
+ * <li>Montgomery: <code>y^2 = x^3 + A x^2 + x mod P</code> (Curve25519,
+ * Curve448)</li></ul>
+ * In both cases, the generator (\p G) for a prime-order subgroup is fixed.
+ *
+ * For Short Weierstrass, this subgroup is the whole curve, and its
+ * cardinality is denoted by \p N. Our code requires that \p N is an
+ * odd prime as mbedtls_ecp_mul() requires an odd number, and
+ * mbedtls_ecdsa_sign() requires that it is prime for blinding purposes.
+ *
+ * For Montgomery curves, we do not store \p A, but <code>(A + 2) / 4</code>,
+ * which is the quantity used in the formulas. Additionally, \p nbits is
+ * not the size of \p N but the required size for private keys.
+ *
+ * If \p modp is NULL, reduction modulo \p P is done using a generic algorithm.
+ * Otherwise, \p modp must point to a function that takes an \p mbedtls_mpi in the
+ * range of <code>0..2^(2*pbits)-1</code>, and transforms it in-place to an integer
+ * which is congruent mod \p P to the given MPI, and is close enough to \p pbits
+ * in size, so that it may be efficiently brought in the 0..P-1 range by a few
+ * additions or subtractions. Therefore, it is only an approximative modular
+ * reduction. It must return 0 on success and non-zero on failure.
+ *
+ * \note Alternative implementations must keep the group IDs distinct. If
+ * two group structures have the same ID, then they must be
+ * identical.
+ *
+ */
+typedef struct mbedtls_ecp_group
+{
+ mbedtls_ecp_group_id id; /*!< An internal group identifier. */
+ mbedtls_mpi P; /*!< The prime modulus of the base field. */
+ mbedtls_mpi A; /*!< For Short Weierstrass: \p A in the equation. For
+ Montgomery curves: <code>(A + 2) / 4</code>. */
+ mbedtls_mpi B; /*!< For Short Weierstrass: \p B in the equation.
+ For Montgomery curves: unused. */
+ mbedtls_ecp_point G; /*!< The generator of the subgroup used. */
+ mbedtls_mpi N; /*!< The order of \p G. */
+ size_t pbits; /*!< The number of bits in \p P.*/
+ size_t nbits; /*!< For Short Weierstrass: The number of bits in \p P.
+ For Montgomery curves: the number of bits in the
+ private keys. */
+ unsigned int h; /*!< \internal 1 if the constants are static. */
+ int (*modp)(mbedtls_mpi *); /*!< The function for fast pseudo-reduction
+ mod \p P (see above).*/
+ int (*t_pre)(mbedtls_ecp_point *, void *); /*!< Unused. */
+ int (*t_post)(mbedtls_ecp_point *, void *); /*!< Unused. */
+ void *t_data; /*!< Unused. */
+ mbedtls_ecp_point *T; /*!< Pre-computed points for ecp_mul_comb(). */
+ size_t T_size; /*!< The number of pre-computed points. */
+}
+mbedtls_ecp_group;
+
+/**
+ * \name SECTION: Module settings
+ *
+ * The configuration options you can set for this module are in this section.
+ * Either change them in config.h, or define them using the compiler command line.
+ * \{
+ */
+
+#if !defined(MBEDTLS_ECP_MAX_BITS)
+/**
+ * The maximum size of the groups, that is, of \c N and \c P.
+ */
+#define MBEDTLS_ECP_MAX_BITS 521 /**< The maximum size of groups, in bits. */
+#endif
+
+#define MBEDTLS_ECP_MAX_BYTES ( ( MBEDTLS_ECP_MAX_BITS + 7 ) / 8 )
+#define MBEDTLS_ECP_MAX_PT_LEN ( 2 * MBEDTLS_ECP_MAX_BYTES + 1 )
+
+#if !defined(MBEDTLS_ECP_WINDOW_SIZE)
+/*
+ * Maximum "window" size used for point multiplication.
+ * Default: 6.
+ * Minimum value: 2. Maximum value: 7.
+ *
+ * Result is an array of at most ( 1 << ( MBEDTLS_ECP_WINDOW_SIZE - 1 ) )
+ * points used for point multiplication. This value is directly tied to EC
+ * peak memory usage, so decreasing it by one should roughly cut memory usage
+ * by two (if large curves are in use).
+ *
+ * Reduction in size may reduce speed, but larger curves are impacted first.
+ * Sample performances (in ECDHE handshakes/s, with FIXED_POINT_OPTIM = 1):
+ * w-size: 6 5 4 3 2
+ * 521 145 141 135 120 97
+ * 384 214 209 198 177 146
+ * 256 320 320 303 262 226
+ * 224 475 475 453 398 342
+ * 192 640 640 633 587 476
+ */
+#define MBEDTLS_ECP_WINDOW_SIZE 6 /**< The maximum window size used. */
+#endif /* MBEDTLS_ECP_WINDOW_SIZE */
+
+#if !defined(MBEDTLS_ECP_FIXED_POINT_OPTIM)
+/*
+ * Trade memory for speed on fixed-point multiplication.
+ *
+ * This speeds up repeated multiplication of the generator (that is, the
+ * multiplication in ECDSA signatures, and half of the multiplications in
+ * ECDSA verification and ECDHE) by a factor roughly 3 to 4.
+ *
+ * The cost is increasing EC peak memory usage by a factor roughly 2.
+ *
+ * Change this value to 0 to reduce peak memory usage.
+ */
+#define MBEDTLS_ECP_FIXED_POINT_OPTIM 1 /**< Enable fixed-point speed-up. */
+#endif /* MBEDTLS_ECP_FIXED_POINT_OPTIM */
+
+/* \} name SECTION: Module settings */
+
+#else /* MBEDTLS_ECP_ALT */
+#include "ecp_alt.h"
+#endif /* MBEDTLS_ECP_ALT */
+
+#if defined(MBEDTLS_ECP_RESTARTABLE)
+
+/**
+ * \brief Internal restart context for multiplication
+ *
+ * \note Opaque struct
+ */
+typedef struct mbedtls_ecp_restart_mul mbedtls_ecp_restart_mul_ctx;
+
+/**
+ * \brief Internal restart context for ecp_muladd()
+ *
+ * \note Opaque struct
+ */
+typedef struct mbedtls_ecp_restart_muladd mbedtls_ecp_restart_muladd_ctx;
+
+/**
+ * \brief General context for resuming ECC operations
+ */
+typedef struct
+{
+ unsigned ops_done; /*!< current ops count */
+ unsigned depth; /*!< call depth (0 = top-level) */
+ mbedtls_ecp_restart_mul_ctx *rsm; /*!< ecp_mul_comb() sub-context */
+ mbedtls_ecp_restart_muladd_ctx *ma; /*!< ecp_muladd() sub-context */
+} mbedtls_ecp_restart_ctx;
+
+/*
+ * Operation counts for restartable functions
+ */
+#define MBEDTLS_ECP_OPS_CHK 3 /*!< basic ops count for ecp_check_pubkey() */
+#define MBEDTLS_ECP_OPS_DBL 8 /*!< basic ops count for ecp_double_jac() */
+#define MBEDTLS_ECP_OPS_ADD 11 /*!< basic ops count for see ecp_add_mixed() */
+#define MBEDTLS_ECP_OPS_INV 120 /*!< empirical equivalent for mpi_mod_inv() */
+
+/**
+ * \brief Internal; for restartable functions in other modules.
+ * Check and update basic ops budget.
+ *
+ * \param grp Group structure
+ * \param rs_ctx Restart context
+ * \param ops Number of basic ops to do
+ *
+ * \return \c 0 if doing \p ops basic ops is still allowed,
+ * \return #MBEDTLS_ERR_ECP_IN_PROGRESS otherwise.
+ */
+int mbedtls_ecp_check_budget( const mbedtls_ecp_group *grp,
+ mbedtls_ecp_restart_ctx *rs_ctx,
+ unsigned ops );
+
+/* Utility macro for checking and updating ops budget */
+#define MBEDTLS_ECP_BUDGET( ops ) \
+ MBEDTLS_MPI_CHK( mbedtls_ecp_check_budget( grp, rs_ctx, \
+ (unsigned) (ops) ) );
+
+#else /* MBEDTLS_ECP_RESTARTABLE */
+
+#define MBEDTLS_ECP_BUDGET( ops ) /* no-op; for compatibility */
+
+/* We want to declare restartable versions of existing functions anyway */
+typedef void mbedtls_ecp_restart_ctx;
+
+#endif /* MBEDTLS_ECP_RESTARTABLE */
+
+/**
+ * \brief The ECP key-pair structure.
+ *
+ * A generic key-pair that may be used for ECDSA and fixed ECDH, for example.
+ *
+ * \note Members are deliberately in the same order as in the
+ * ::mbedtls_ecdsa_context structure.
+ */
+typedef struct mbedtls_ecp_keypair
+{
+ mbedtls_ecp_group grp; /*!< Elliptic curve and base point */
+ mbedtls_mpi d; /*!< our secret value */
+ mbedtls_ecp_point Q; /*!< our public value */
+}
+mbedtls_ecp_keypair;
+
+/*
+ * Point formats, from RFC 4492's enum ECPointFormat
+ */
+#define MBEDTLS_ECP_PF_UNCOMPRESSED 0 /**< Uncompressed point format. */
+#define MBEDTLS_ECP_PF_COMPRESSED 1 /**< Compressed point format. */
+
+/*
+ * Some other constants from RFC 4492
+ */
+#define MBEDTLS_ECP_TLS_NAMED_CURVE 3 /**< The named_curve of ECCurveType. */
+
+#if defined(MBEDTLS_ECP_RESTARTABLE)
+/**
+ * \brief Set the maximum number of basic operations done in a row.
+ *
+ * If more operations are needed to complete a computation,
+ * #MBEDTLS_ERR_ECP_IN_PROGRESS will be returned by the
+ * function performing the computation. It is then the
+ * caller's responsibility to either call again with the same
+ * parameters until it returns 0 or an error code; or to free
+ * the restart context if the operation is to be aborted.
+ *
+ * It is strictly required that all input parameters and the
+ * restart context be the same on successive calls for the
+ * same operation, but output parameters need not be the
+ * same; they must not be used until the function finally
+ * returns 0.
+ *
+ * This only applies to functions whose documentation
+ * mentions they may return #MBEDTLS_ERR_ECP_IN_PROGRESS (or
+ * #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS for functions in the
+ * SSL module). For functions that accept a "restart context"
+ * argument, passing NULL disables restart and makes the
+ * function equivalent to the function with the same name
+ * with \c _restartable removed. For functions in the ECDH
+ * module, restart is disabled unless the function accepts
+ * an "ECDH context" argument and
+ * mbedtls_ecdh_enable_restart() was previously called on
+ * that context. For function in the SSL module, restart is
+ * only enabled for specific sides and key exchanges
+ * (currently only for clients and ECDHE-ECDSA).
+ *
+ * \param max_ops Maximum number of basic operations done in a row.
+ * Default: 0 (unlimited).
+ * Lower (non-zero) values mean ECC functions will block for
+ * a lesser maximum amount of time.
+ *
+ * \note A "basic operation" is defined as a rough equivalent of a
+ * multiplication in GF(p) for the NIST P-256 curve.
+ * As an indication, with default settings, a scalar
+ * multiplication (full run of \c mbedtls_ecp_mul()) is:
+ * - about 3300 basic operations for P-256
+ * - about 9400 basic operations for P-384
+ *
+ * \note Very low values are not always respected: sometimes
+ * functions need to block for a minimum number of
+ * operations, and will do so even if max_ops is set to a
+ * lower value. That minimum depends on the curve size, and
+ * can be made lower by decreasing the value of
+ * \c MBEDTLS_ECP_WINDOW_SIZE. As an indication, here is the
+ * lowest effective value for various curves and values of
+ * that parameter (w for short):
+ * w=6 w=5 w=4 w=3 w=2
+ * P-256 208 208 160 136 124
+ * P-384 682 416 320 272 248
+ * P-521 1364 832 640 544 496
+ *
+ * \note This setting is currently ignored by Curve25519.
+ */
+void mbedtls_ecp_set_max_ops( unsigned max_ops );
+
+/**
+ * \brief Check if restart is enabled (max_ops != 0)
+ *
+ * \return \c 0 if \c max_ops == 0 (restart disabled)
+ * \return \c 1 otherwise (restart enabled)
+ */
+int mbedtls_ecp_restart_is_enabled( void );
+#endif /* MBEDTLS_ECP_RESTARTABLE */
+
+/**
+ * \brief This function retrieves the information defined in
+ * mbedtls_ecp_curve_info() for all supported curves in order
+ * of preference.
+ *
+ * \return A statically allocated array. The last entry is 0.
+ */
+const mbedtls_ecp_curve_info *mbedtls_ecp_curve_list( void );
+
+/**
+ * \brief This function retrieves the list of internal group
+ * identifiers of all supported curves in the order of
+ * preference.
+ *
+ * \return A statically allocated array,
+ * terminated with MBEDTLS_ECP_DP_NONE.
+ */
+const mbedtls_ecp_group_id *mbedtls_ecp_grp_id_list( void );
+
+/**
+ * \brief This function retrieves curve information from an internal
+ * group identifier.
+ *
+ * \param grp_id An \c MBEDTLS_ECP_DP_XXX value.
+ *
+ * \return The associated curve information on success.
+ * \return NULL on failure.
+ */
+const mbedtls_ecp_curve_info *mbedtls_ecp_curve_info_from_grp_id( mbedtls_ecp_group_id grp_id );
+
+/**
+ * \brief This function retrieves curve information from a TLS
+ * NamedCurve value.
+ *
+ * \param tls_id An \c MBEDTLS_ECP_DP_XXX value.
+ *
+ * \return The associated curve information on success.
+ * \return NULL on failure.
+ */
+const mbedtls_ecp_curve_info *mbedtls_ecp_curve_info_from_tls_id( uint16_t tls_id );
+
+/**
+ * \brief This function retrieves curve information from a
+ * human-readable name.
+ *
+ * \param name The human-readable name.
+ *
+ * \return The associated curve information on success.
+ * \return NULL on failure.
+ */
+const mbedtls_ecp_curve_info *mbedtls_ecp_curve_info_from_name( const char *name );
+
+/**
+ * \brief This function initializes a point as zero.
+ *
+ * \param pt The point to initialize.
+ */
+void mbedtls_ecp_point_init( mbedtls_ecp_point *pt );
+
+/**
+ * \brief This function initializes an ECP group context
+ * without loading any domain parameters.
+ *
+ * \note After this function is called, domain parameters
+ * for various ECP groups can be loaded through the
+ * mbedtls_ecp_group_load() or mbedtls_ecp_tls_read_group()
+ * functions.
+ */
+void mbedtls_ecp_group_init( mbedtls_ecp_group *grp );
+
+/**
+ * \brief This function initializes a key pair as an invalid one.
+ *
+ * \param key The key pair to initialize.
+ */
+void mbedtls_ecp_keypair_init( mbedtls_ecp_keypair *key );
+
+/**
+ * \brief This function frees the components of a point.
+ *
+ * \param pt The point to free.
+ */
+void mbedtls_ecp_point_free( mbedtls_ecp_point *pt );
+
+/**
+ * \brief This function frees the components of an ECP group.
+ *
+ * \param grp The group to free. This may be \c NULL, in which
+ * case this function returns immediately. If it is not
+ * \c NULL, it must point to an initialized ECP group.
+ */
+void mbedtls_ecp_group_free( mbedtls_ecp_group *grp );
+
+/**
+ * \brief This function frees the components of a key pair.
+ *
+ * \param key The key pair to free. This may be \c NULL, in which
+ * case this function returns immediately. If it is not
+ * \c NULL, it must point to an initialized ECP key pair.
+ */
+void mbedtls_ecp_keypair_free( mbedtls_ecp_keypair *key );
+
+#if defined(MBEDTLS_ECP_RESTARTABLE)
+/**
+ * \brief Initialize a restart context.
+ *
+ * \param ctx The restart context to initialize. This must
+ * not be \c NULL.
+ */
+void mbedtls_ecp_restart_init( mbedtls_ecp_restart_ctx *ctx );
+
+/**
+ * \brief Free the components of a restart context.
+ *
+ * \param ctx The restart context to free. This may be \c NULL, in which
+ * case this function returns immediately. If it is not
+ * \c NULL, it must point to an initialized restart context.
+ */
+void mbedtls_ecp_restart_free( mbedtls_ecp_restart_ctx *ctx );
+#endif /* MBEDTLS_ECP_RESTARTABLE */
+
+/**
+ * \brief This function copies the contents of point \p Q into
+ * point \p P.
+ *
+ * \param P The destination point. This must be initialized.
+ * \param Q The source point. This must be initialized.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure.
+ * \return Another negative error code for other kinds of failure.
+ */
+int mbedtls_ecp_copy( mbedtls_ecp_point *P, const mbedtls_ecp_point *Q );
+
+/**
+ * \brief This function copies the contents of group \p src into
+ * group \p dst.
+ *
+ * \param dst The destination group. This must be initialized.
+ * \param src The source group. This must be initialized.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure.
+ * \return Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_group_copy( mbedtls_ecp_group *dst,
+ const mbedtls_ecp_group *src );
+
+/**
+ * \brief This function sets a point to the point at infinity.
+ *
+ * \param pt The point to set. This must be initialized.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure.
+ * \return Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_set_zero( mbedtls_ecp_point *pt );
+
+/**
+ * \brief This function checks if a point is the point at infinity.
+ *
+ * \param pt The point to test. This must be initialized.
+ *
+ * \return \c 1 if the point is zero.
+ * \return \c 0 if the point is non-zero.
+ * \return A negative error code on failure.
+ */
+int mbedtls_ecp_is_zero( mbedtls_ecp_point *pt );
+
+/**
+ * \brief This function compares two points.
+ *
+ * \note This assumes that the points are normalized. Otherwise,
+ * they may compare as "not equal" even if they are.
+ *
+ * \param P The first point to compare. This must be initialized.
+ * \param Q The second point to compare. This must be initialized.
+ *
+ * \return \c 0 if the points are equal.
+ * \return #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if the points are not equal.
+ */
+int mbedtls_ecp_point_cmp( const mbedtls_ecp_point *P,
+ const mbedtls_ecp_point *Q );
+
+/**
+ * \brief This function imports a non-zero point from two ASCII
+ * strings.
+ *
+ * \param P The destination point. This must be initialized.
+ * \param radix The numeric base of the input.
+ * \param x The first affine coordinate, as a null-terminated string.
+ * \param y The second affine coordinate, as a null-terminated string.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_MPI_XXX error code on failure.
+ */
+int mbedtls_ecp_point_read_string( mbedtls_ecp_point *P, int radix,
+ const char *x, const char *y );
+
+/**
+ * \brief This function exports a point into unsigned binary data.
+ *
+ * \param grp The group to which the point should belong.
+ * This must be initialized and have group parameters
+ * set, for example through mbedtls_ecp_group_load().
+ * \param P The point to export. This must be initialized.
+ * \param format The point format. This must be either
+ * #MBEDTLS_ECP_PF_COMPRESSED or #MBEDTLS_ECP_PF_UNCOMPRESSED.
+ * \param olen The address at which to store the length of
+ * the output in Bytes. This must not be \c NULL.
+ * \param buf The output buffer. This must be a writable buffer
+ * of length \p buflen Bytes.
+ * \param buflen The length of the output buffer \p buf in Bytes.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL if the output buffer
+ * is too small to hold the point.
+ * \return Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_point_write_binary( const mbedtls_ecp_group *grp, const mbedtls_ecp_point *P,
+ int format, size_t *olen,
+ unsigned char *buf, size_t buflen );
+
+/**
+ * \brief This function imports a point from unsigned binary data.
+ *
+ * \note This function does not check that the point actually
+ * belongs to the given group, see mbedtls_ecp_check_pubkey()
+ * for that.
+ *
+ * \param grp The group to which the point should belong.
+ * This must be initialized and have group parameters
+ * set, for example through mbedtls_ecp_group_load().
+ * \param P The destination context to import the point to.
+ * This must be initialized.
+ * \param buf The input buffer. This must be a readable buffer
+ * of length \p ilen Bytes.
+ * \param ilen The length of the input buffer \p buf in Bytes.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if the input is invalid.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure.
+ * \return #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the point format
+ * is not implemented.
+ */
+int mbedtls_ecp_point_read_binary( const mbedtls_ecp_group *grp,
+ mbedtls_ecp_point *P,
+ const unsigned char *buf, size_t ilen );
+
+/**
+ * \brief This function imports a point from a TLS ECPoint record.
+ *
+ * \note On function return, \p *buf is updated to point immediately
+ * after the ECPoint record.
+ *
+ * \param grp The ECP group to use.
+ * This must be initialized and have group parameters
+ * set, for example through mbedtls_ecp_group_load().
+ * \param pt The destination point.
+ * \param buf The address of the pointer to the start of the input buffer.
+ * \param len The length of the buffer.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_MPI_XXX error code on initialization
+ * failure.
+ * \return #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if input is invalid.
+ */
+int mbedtls_ecp_tls_read_point( const mbedtls_ecp_group *grp,
+ mbedtls_ecp_point *pt,
+ const unsigned char **buf, size_t len );
+
+/**
+ * \brief This function exports a point as a TLS ECPoint record
+ * defined in RFC 4492, Section 5.4.
+ *
+ * \param grp The ECP group to use.
+ * This must be initialized and have group parameters
+ * set, for example through mbedtls_ecp_group_load().
+ * \param pt The point to be exported. This must be initialized.
+ * \param format The point format to use. This must be either
+ * #MBEDTLS_ECP_PF_COMPRESSED or #MBEDTLS_ECP_PF_UNCOMPRESSED.
+ * \param olen The address at which to store the length in Bytes
+ * of the data written.
+ * \param buf The target buffer. This must be a writable buffer of
+ * length \p blen Bytes.
+ * \param blen The length of the target buffer \p buf in Bytes.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if the input is invalid.
+ * \return #MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL if the target buffer
+ * is too small to hold the exported point.
+ * \return Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_tls_write_point( const mbedtls_ecp_group *grp,
+ const mbedtls_ecp_point *pt,
+ int format, size_t *olen,
+ unsigned char *buf, size_t blen );
+
+/**
+ * \brief This function sets up an ECP group context
+ * from a standardized set of domain parameters.
+ *
+ * \note The index should be a value of the NamedCurve enum,
+ * as defined in <em>RFC-4492: Elliptic Curve Cryptography
+ * (ECC) Cipher Suites for Transport Layer Security (TLS)</em>,
+ * usually in the form of an \c MBEDTLS_ECP_DP_XXX macro.
+ *
+ * \param grp The group context to setup. This must be initialized.
+ * \param id The identifier of the domain parameter set to load.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if \p id doesn't
+ * correspond to a known group.
+ * \return Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_group_load( mbedtls_ecp_group *grp, mbedtls_ecp_group_id id );
+
+/**
+ * \brief This function sets up an ECP group context from a TLS
+ * ECParameters record as defined in RFC 4492, Section 5.4.
+ *
+ * \note The read pointer \p buf is updated to point right after
+ * the ECParameters record on exit.
+ *
+ * \param grp The group context to setup. This must be initialized.
+ * \param buf The address of the pointer to the start of the input buffer.
+ * \param len The length of the input buffer \c *buf in Bytes.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if input is invalid.
+ * \return #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the group is not
+ * recognized.
+ * \return Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_tls_read_group( mbedtls_ecp_group *grp,
+ const unsigned char **buf, size_t len );
+
+/**
+ * \brief This function extracts an elliptic curve group ID from a
+ * TLS ECParameters record as defined in RFC 4492, Section 5.4.
+ *
+ * \note The read pointer \p buf is updated to point right after
+ * the ECParameters record on exit.
+ *
+ * \param grp The address at which to store the group id.
+ * This must not be \c NULL.
+ * \param buf The address of the pointer to the start of the input buffer.
+ * \param len The length of the input buffer \c *buf in Bytes.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if input is invalid.
+ * \return #MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE if the group is not
+ * recognized.
+ * \return Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_tls_read_group_id( mbedtls_ecp_group_id *grp,
+ const unsigned char **buf,
+ size_t len );
+/**
+ * \brief This function exports an elliptic curve as a TLS
+ * ECParameters record as defined in RFC 4492, Section 5.4.
+ *
+ * \param grp The ECP group to be exported.
+ * This must be initialized and have group parameters
+ * set, for example through mbedtls_ecp_group_load().
+ * \param olen The address at which to store the number of Bytes written.
+ * This must not be \c NULL.
+ * \param buf The buffer to write to. This must be a writable buffer
+ * of length \p blen Bytes.
+ * \param blen The length of the output buffer \p buf in Bytes.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_ECP_BUFFER_TOO_SMALL if the output
+ * buffer is too small to hold the exported group.
+ * \return Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_tls_write_group( const mbedtls_ecp_group *grp,
+ size_t *olen,
+ unsigned char *buf, size_t blen );
+
+/**
+ * \brief This function performs a scalar multiplication of a point
+ * by an integer: \p R = \p m * \p P.
+ *
+ * It is not thread-safe to use same group in multiple threads.
+ *
+ * \note To prevent timing attacks, this function
+ * executes the exact same sequence of base-field
+ * operations for any valid \p m. It avoids any if-branch or
+ * array index depending on the value of \p m.
+ *
+ * \note If \p f_rng is not NULL, it is used to randomize
+ * intermediate results to prevent potential timing attacks
+ * targeting these results. We recommend always providing
+ * a non-NULL \p f_rng. The overhead is negligible.
+ *
+ * \param grp The ECP group to use.
+ * This must be initialized and have group parameters
+ * set, for example through mbedtls_ecp_group_load().
+ * \param R The point in which to store the result of the calculation.
+ * This must be initialized.
+ * \param m The integer by which to multiply. This must be initialized.
+ * \param P The point to multiply. This must be initialized.
+ * \param f_rng The RNG function. This may be \c NULL if randomization
+ * of intermediate results isn't desired (discouraged).
+ * \param p_rng The RNG context to be passed to \p p_rng.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_ECP_INVALID_KEY if \p m is not a valid private
+ * key, or \p P is not a valid public key.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure.
+ * \return Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_mul( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
+ const mbedtls_mpi *m, const mbedtls_ecp_point *P,
+ int (*f_rng)(void *, unsigned char *, size_t), void *p_rng );
+
+/**
+ * \brief This function performs multiplication of a point by
+ * an integer: \p R = \p m * \p P in a restartable way.
+ *
+ * \see mbedtls_ecp_mul()
+ *
+ * \note This function does the same as \c mbedtls_ecp_mul(), but
+ * it can return early and restart according to the limit set
+ * with \c mbedtls_ecp_set_max_ops() to reduce blocking.
+ *
+ * \param grp The ECP group to use.
+ * This must be initialized and have group parameters
+ * set, for example through mbedtls_ecp_group_load().
+ * \param R The point in which to store the result of the calculation.
+ * This must be initialized.
+ * \param m The integer by which to multiply. This must be initialized.
+ * \param P The point to multiply. This must be initialized.
+ * \param f_rng The RNG function. This may be \c NULL if randomization
+ * of intermediate results isn't desired (discouraged).
+ * \param p_rng The RNG context to be passed to \p p_rng.
+ * \param rs_ctx The restart context (NULL disables restart).
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_ECP_INVALID_KEY if \p m is not a valid private
+ * key, or \p P is not a valid public key.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure.
+ * \return #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
+ * operations was reached: see \c mbedtls_ecp_set_max_ops().
+ * \return Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_mul_restartable( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
+ const mbedtls_mpi *m, const mbedtls_ecp_point *P,
+ int (*f_rng)(void *, unsigned char *, size_t), void *p_rng,
+ mbedtls_ecp_restart_ctx *rs_ctx );
+
+/**
+ * \brief This function performs multiplication and addition of two
+ * points by integers: \p R = \p m * \p P + \p n * \p Q
+ *
+ * It is not thread-safe to use same group in multiple threads.
+ *
+ * \note In contrast to mbedtls_ecp_mul(), this function does not
+ * guarantee a constant execution flow and timing.
+ *
+ * \param grp The ECP group to use.
+ * This must be initialized and have group parameters
+ * set, for example through mbedtls_ecp_group_load().
+ * \param R The point in which to store the result of the calculation.
+ * This must be initialized.
+ * \param m The integer by which to multiply \p P.
+ * This must be initialized.
+ * \param P The point to multiply by \p m. This must be initialized.
+ * \param n The integer by which to multiply \p Q.
+ * This must be initialized.
+ * \param Q The point to be multiplied by \p n.
+ * This must be initialized.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_ECP_INVALID_KEY if \p m or \p n are not
+ * valid private keys, or \p P or \p Q are not valid public
+ * keys.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure.
+ * \return Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_muladd( mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
+ const mbedtls_mpi *m, const mbedtls_ecp_point *P,
+ const mbedtls_mpi *n, const mbedtls_ecp_point *Q );
+
+/**
+ * \brief This function performs multiplication and addition of two
+ * points by integers: \p R = \p m * \p P + \p n * \p Q in a
+ * restartable way.
+ *
+ * \see \c mbedtls_ecp_muladd()
+ *
+ * \note This function works the same as \c mbedtls_ecp_muladd(),
+ * but it can return early and restart according to the limit
+ * set with \c mbedtls_ecp_set_max_ops() to reduce blocking.
+ *
+ * \param grp The ECP group to use.
+ * This must be initialized and have group parameters
+ * set, for example through mbedtls_ecp_group_load().
+ * \param R The point in which to store the result of the calculation.
+ * This must be initialized.
+ * \param m The integer by which to multiply \p P.
+ * This must be initialized.
+ * \param P The point to multiply by \p m. This must be initialized.
+ * \param n The integer by which to multiply \p Q.
+ * This must be initialized.
+ * \param Q The point to be multiplied by \p n.
+ * This must be initialized.
+ * \param rs_ctx The restart context (NULL disables restart).
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_ECP_INVALID_KEY if \p m or \p n are not
+ * valid private keys, or \p P or \p Q are not valid public
+ * keys.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory-allocation failure.
+ * \return #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
+ * operations was reached: see \c mbedtls_ecp_set_max_ops().
+ * \return Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_muladd_restartable(
+ mbedtls_ecp_group *grp, mbedtls_ecp_point *R,
+ const mbedtls_mpi *m, const mbedtls_ecp_point *P,
+ const mbedtls_mpi *n, const mbedtls_ecp_point *Q,
+ mbedtls_ecp_restart_ctx *rs_ctx );
+
+/**
+ * \brief This function checks that a point is a valid public key
+ * on this curve.
+ *
+ * It only checks that the point is non-zero, has
+ * valid coordinates and lies on the curve. It does not verify
+ * that it is indeed a multiple of \p G. This additional
+ * check is computationally more expensive, is not required
+ * by standards, and should not be necessary if the group
+ * used has a small cofactor. In particular, it is useless for
+ * the NIST groups which all have a cofactor of 1.
+ *
+ * \note This function uses bare components rather than an
+ * ::mbedtls_ecp_keypair structure, to ease use with other
+ * structures, such as ::mbedtls_ecdh_context or
+ * ::mbedtls_ecdsa_context.
+ *
+ * \param grp The ECP group the point should belong to.
+ * This must be initialized and have group parameters
+ * set, for example through mbedtls_ecp_group_load().
+ * \param pt The point to check. This must be initialized.
+ *
+ * \return \c 0 if the point is a valid public key.
+ * \return #MBEDTLS_ERR_ECP_INVALID_KEY if the point is not
+ * a valid public key for the given curve.
+ * \return Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_check_pubkey( const mbedtls_ecp_group *grp,
+ const mbedtls_ecp_point *pt );
+
+/**
+ * \brief This function checks that an \p mbedtls_mpi is a
+ * valid private key for this curve.
+ *
+ * \note This function uses bare components rather than an
+ * ::mbedtls_ecp_keypair structure to ease use with other
+ * structures, such as ::mbedtls_ecdh_context or
+ * ::mbedtls_ecdsa_context.
+ *
+ * \param grp The ECP group the private key should belong to.
+ * This must be initialized and have group parameters
+ * set, for example through mbedtls_ecp_group_load().
+ * \param d The integer to check. This must be initialized.
+ *
+ * \return \c 0 if the point is a valid private key.
+ * \return #MBEDTLS_ERR_ECP_INVALID_KEY if the point is not a valid
+ * private key for the given curve.
+ * \return Another negative error code on other kinds of failure.
+ */
+int mbedtls_ecp_check_privkey( const mbedtls_ecp_group *grp,
+ const mbedtls_mpi *d );
+
+/**
+ * \brief This function generates a private key.
+ *
+ * \param grp The ECP group to generate a private key for.
+ * This must be initialized and have group parameters
+ * set, for example through mbedtls_ecp_group_load().
+ * \param d The destination MPI (secret part). This must be initialized.
+ * \param f_rng The RNG function. This must not be \c NULL.
+ * \param p_rng The RNG parameter to be passed to \p f_rng. This may be
+ * \c NULL if \p f_rng doesn't need a context argument.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_MPI_XXX error code
+ * on failure.
+ */
+int mbedtls_ecp_gen_privkey( const mbedtls_ecp_group *grp,
+ mbedtls_mpi *d,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+/**
+ * \brief This function generates a keypair with a configurable base
+ * point.
+ *
+ * \note This function uses bare components rather than an
+ * ::mbedtls_ecp_keypair structure to ease use with other
+ * structures, such as ::mbedtls_ecdh_context or
+ * ::mbedtls_ecdsa_context.
+ *
+ * \param grp The ECP group to generate a key pair for.
+ * This must be initialized and have group parameters
+ * set, for example through mbedtls_ecp_group_load().
+ * \param G The base point to use. This must be initialized
+ * and belong to \p grp. It replaces the default base
+ * point \c grp->G used by mbedtls_ecp_gen_keypair().
+ * \param d The destination MPI (secret part).
+ * This must be initialized.
+ * \param Q The destination point (public part).
+ * This must be initialized.
+ * \param f_rng The RNG function. This must not be \c NULL.
+ * \param p_rng The RNG context to be passed to \p f_rng. This may
+ * be \c NULL if \p f_rng doesn't need a context argument.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_MPI_XXX error code
+ * on failure.
+ */
+int mbedtls_ecp_gen_keypair_base( mbedtls_ecp_group *grp,
+ const mbedtls_ecp_point *G,
+ mbedtls_mpi *d, mbedtls_ecp_point *Q,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+/**
+ * \brief This function generates an ECP keypair.
+ *
+ * \note This function uses bare components rather than an
+ * ::mbedtls_ecp_keypair structure to ease use with other
+ * structures, such as ::mbedtls_ecdh_context or
+ * ::mbedtls_ecdsa_context.
+ *
+ * \param grp The ECP group to generate a key pair for.
+ * This must be initialized and have group parameters
+ * set, for example through mbedtls_ecp_group_load().
+ * \param d The destination MPI (secret part).
+ * This must be initialized.
+ * \param Q The destination point (public part).
+ * This must be initialized.
+ * \param f_rng The RNG function. This must not be \c NULL.
+ * \param p_rng The RNG context to be passed to \p f_rng. This may
+ * be \c NULL if \p f_rng doesn't need a context argument.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_MPI_XXX error code
+ * on failure.
+ */
+int mbedtls_ecp_gen_keypair( mbedtls_ecp_group *grp, mbedtls_mpi *d,
+ mbedtls_ecp_point *Q,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+/**
+ * \brief This function generates an ECP key.
+ *
+ * \param grp_id The ECP group identifier.
+ * \param key The destination key. This must be initialized.
+ * \param f_rng The RNG function to use. This must not be \c NULL.
+ * \param p_rng The RNG context to be passed to \p f_rng. This may
+ * be \c NULL if \p f_rng doesn't need a context argument.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_ECP_XXX or \c MBEDTLS_MPI_XXX error code
+ * on failure.
+ */
+int mbedtls_ecp_gen_key( mbedtls_ecp_group_id grp_id, mbedtls_ecp_keypair *key,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+/**
+ * \brief This function checks that the keypair objects
+ * \p pub and \p prv have the same group and the
+ * same public point, and that the private key in
+ * \p prv is consistent with the public key.
+ *
+ * \param pub The keypair structure holding the public key. This
+ * must be initialized. If it contains a private key, that
+ * part is ignored.
+ * \param prv The keypair structure holding the full keypair.
+ * This must be initialized.
+ *
+ * \return \c 0 on success, meaning that the keys are valid and match.
+ * \return #MBEDTLS_ERR_ECP_BAD_INPUT_DATA if the keys are invalid or do not match.
+ * \return An \c MBEDTLS_ERR_ECP_XXX or an \c MBEDTLS_ERR_MPI_XXX
+ * error code on calculation failure.
+ */
+int mbedtls_ecp_check_pub_priv( const mbedtls_ecp_keypair *pub,
+ const mbedtls_ecp_keypair *prv );
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief The ECP checkup routine.
+ *
+ * \return \c 0 on success.
+ * \return \c 1 on failure.
+ */
+int mbedtls_ecp_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ecp.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ecp_alt.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ecp_alt.h
new file mode 100644
index 0000000..4a828f3
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ecp_alt.h
@@ -0,0 +1,144 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause OR Arm’s non-OSI source license
+ */
+#ifndef MBEDTLS_ECP_ALT_H
+#define MBEDTLS_ECP_ALT_H
+
+#if defined(MBEDTLS_ECP_ALT)
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * The content of the structure in this ALT implementation is
+ * exactly the same as ecp.h, but the type must be provided
+ * here as MBEDTLS_ECP_ALT is set
+ */
+
+/**
+ * \brief The ECP group structure.
+ *
+ * We consider two types of curve equations:
+ * <ul><li>Short Weierstrass: <code>y^2 = x^3 + A x + B mod P</code>
+ * (SEC1 + RFC-4492)</li>
+ * <li>Montgomery: <code>y^2 = x^3 + A x^2 + x mod P</code> (Curve25519,
+ * Curve448)</li></ul>
+ * In both cases, the generator (\p G) for a prime-order subgroup is fixed.
+ *
+ * For Short Weierstrass, this subgroup is the whole curve, and its
+ * cardinality is denoted by \p N. Our code requires that \p N is an
+ * odd prime as mbedtls_ecp_mul() requires an odd number, and
+ * mbedtls_ecdsa_sign() requires that it is prime for blinding purposes.
+ *
+ * For Montgomery curves, we do not store \p A, but <code>(A + 2) / 4</code>,
+ * which is the quantity used in the formulas. Additionally, \p nbits is
+ * not the size of \p N but the required size for private keys.
+ *
+ * If \p modp is NULL, reduction modulo \p P is done using a generic algorithm.
+ * Otherwise, \p modp must point to a function that takes an \p mbedtls_mpi in the
+ * range of <code>0..2^(2*pbits)-1</code>, and transforms it in-place to an integer
+ * which is congruent mod \p P to the given MPI, and is close enough to \p pbits
+ * in size, so that it may be efficiently brought in the 0..P-1 range by a few
+ * additions or subtractions. Therefore, it is only an approximative modular
+ * reduction. It must return 0 on success and non-zero on failure.
+ *
+ * \note Alternative implementations must keep the group IDs distinct. If
+ * two group structures have the same ID, then they must be
+ * identical.
+ *
+ */
+typedef struct mbedtls_ecp_group
+{
+ mbedtls_ecp_group_id id; /*!< An internal group identifier. */
+ mbedtls_mpi P; /*!< The prime modulus of the base field. */
+ mbedtls_mpi A; /*!< For Short Weierstrass: \p A in the equation. For
+ Montgomery curves: <code>(A + 2) / 4</code>. */
+ mbedtls_mpi B; /*!< For Short Weierstrass: \p B in the equation.
+ For Montgomery curves: unused. */
+ mbedtls_ecp_point G; /*!< The generator of the subgroup used. */
+ mbedtls_mpi N; /*!< The order of \p G. */
+ size_t pbits; /*!< The number of bits in \p P.*/
+ size_t nbits; /*!< For Short Weierstrass: The number of bits in \p P.
+ For Montgomery curves: the number of bits in the
+ private keys. */
+ unsigned int h; /*!< \internal 1 if the constants are static. */
+ int (*modp)(mbedtls_mpi *); /*!< The function for fast pseudo-reduction
+ mod \p P (see above).*/
+ int (*t_pre)(mbedtls_ecp_point *, void *); /*!< Unused. */
+ int (*t_post)(mbedtls_ecp_point *, void *); /*!< Unused. */
+ void *t_data; /*!< Unused. */
+ mbedtls_ecp_point *T; /*!< Pre-computed points for ecp_mul_comb(). */
+ size_t T_size; /*!< The number of pre-computed points. */
+}
+mbedtls_ecp_group;
+
+/**
+ * \name SECTION: Module settings
+ *
+ * The configuration options you can set for this module are in this section.
+ * Either change them in config.h, or define them using the compiler command line.
+ * \{
+ */
+
+#if !defined(MBEDTLS_ECP_MAX_BITS)
+/**
+ * The maximum size of the groups, that is, of \c N and \c P.
+ */
+#define MBEDTLS_ECP_MAX_BITS 521 /**< The maximum size of groups, in bits. */
+#endif
+
+#define MBEDTLS_ECP_MAX_BYTES ( ( MBEDTLS_ECP_MAX_BITS + 7 ) / 8 )
+#define MBEDTLS_ECP_MAX_PT_LEN ( 2 * MBEDTLS_ECP_MAX_BYTES + 1 )
+
+#if !defined(MBEDTLS_ECP_WINDOW_SIZE)
+/*
+ * Maximum "window" size used for point multiplication.
+ * Default: 6.
+ * Minimum value: 2. Maximum value: 7.
+ *
+ * Result is an array of at most ( 1 << ( MBEDTLS_ECP_WINDOW_SIZE - 1 ) )
+ * points used for point multiplication. This value is directly tied to EC
+ * peak memory usage, so decreasing it by one should roughly cut memory usage
+ * by two (if large curves are in use).
+ *
+ * Reduction in size may reduce speed, but larger curves are impacted first.
+ * Sample performances (in ECDHE handshakes/s, with FIXED_POINT_OPTIM = 1):
+ * w-size: 6 5 4 3 2
+ * 521 145 141 135 120 97
+ * 384 214 209 198 177 146
+ * 256 320 320 303 262 226
+ * 224 475 475 453 398 342
+ * 192 640 640 633 587 476
+ */
+#define MBEDTLS_ECP_WINDOW_SIZE 6 /**< The maximum window size used. */
+#endif /* MBEDTLS_ECP_WINDOW_SIZE */
+
+#if !defined(MBEDTLS_ECP_FIXED_POINT_OPTIM)
+/*
+ * Trade memory for speed on fixed-point multiplication.
+ *
+ * This speeds up repeated multiplication of the generator (that is, the
+ * multiplication in ECDSA signatures, and half of the multiplications in
+ * ECDSA verification and ECDHE) by a factor roughly 3 to 4.
+ *
+ * The cost is increasing EC peak memory usage by a factor roughly 2.
+ *
+ * Change this value to 0 to reduce peak memory usage.
+ */
+#define MBEDTLS_ECP_FIXED_POINT_OPTIM 1 /**< Enable fixed-point speed-up. */
+#endif /* MBEDTLS_ECP_FIXED_POINT_OPTIM */
+
+/* \} name SECTION: Module settings */
+
+#define MBEDTLS_ECP_BUDGET( ops ) /* no-op; for compatibility */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_ECP_ALT */
+
+#endif /* MBEDTLS_ECP_ALT_H */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ecp_internal.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ecp_internal.h
new file mode 100644
index 0000000..7625ed4
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ecp_internal.h
@@ -0,0 +1,299 @@
+/**
+ * \file ecp_internal.h
+ *
+ * \brief Function declarations for alternative implementation of elliptic curve
+ * point arithmetic.
+ */
+/*
+ * Copyright (C) 2016, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+
+/*
+ * References:
+ *
+ * [1] BERNSTEIN, Daniel J. Curve25519: new Diffie-Hellman speed records.
+ * <http://cr.yp.to/ecdh/curve25519-20060209.pdf>
+ *
+ * [2] CORON, Jean-S'ebastien. Resistance against differential power analysis
+ * for elliptic curve cryptosystems. In : Cryptographic Hardware and
+ * Embedded Systems. Springer Berlin Heidelberg, 1999. p. 292-302.
+ * <http://link.springer.com/chapter/10.1007/3-540-48059-5_25>
+ *
+ * [3] HEDABOU, Mustapha, PINEL, Pierre, et B'EN'ETEAU, Lucien. A comb method to
+ * render ECC resistant against Side Channel Attacks. IACR Cryptology
+ * ePrint Archive, 2004, vol. 2004, p. 342.
+ * <http://eprint.iacr.org/2004/342.pdf>
+ *
+ * [4] Certicom Research. SEC 2: Recommended Elliptic Curve Domain Parameters.
+ * <http://www.secg.org/sec2-v2.pdf>
+ *
+ * [5] HANKERSON, Darrel, MENEZES, Alfred J., VANSTONE, Scott. Guide to Elliptic
+ * Curve Cryptography.
+ *
+ * [6] Digital Signature Standard (DSS), FIPS 186-4.
+ * <http://nvlpubs.nist.gov/nistpubs/FIPS/NIST.FIPS.186-4.pdf>
+ *
+ * [7] Elliptic Curve Cryptography (ECC) Cipher Suites for Transport Layer
+ * Security (TLS), RFC 4492.
+ * <https://tools.ietf.org/search/rfc4492>
+ *
+ * [8] <http://www.hyperelliptic.org/EFD/g1p/auto-shortw-jacobian.html>
+ *
+ * [9] COHEN, Henri. A Course in Computational Algebraic Number Theory.
+ * Springer Science & Business Media, 1 Aug 2000
+ */
+
+#ifndef MBEDTLS_ECP_INTERNAL_H
+#define MBEDTLS_ECP_INTERNAL_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#if defined(MBEDTLS_ECP_INTERNAL_ALT)
+
+/**
+ * \brief Indicate if the Elliptic Curve Point module extension can
+ * handle the group.
+ *
+ * \param grp The pointer to the elliptic curve group that will be the
+ * basis of the cryptographic computations.
+ *
+ * \return Non-zero if successful.
+ */
+unsigned char mbedtls_internal_ecp_grp_capable( const mbedtls_ecp_group *grp );
+
+/**
+ * \brief Initialise the Elliptic Curve Point module extension.
+ *
+ * If mbedtls_internal_ecp_grp_capable returns true for a
+ * group, this function has to be able to initialise the
+ * module for it.
+ *
+ * This module can be a driver to a crypto hardware
+ * accelerator, for which this could be an initialise function.
+ *
+ * \param grp The pointer to the group the module needs to be
+ * initialised for.
+ *
+ * \return 0 if successful.
+ */
+int mbedtls_internal_ecp_init( const mbedtls_ecp_group *grp );
+
+/**
+ * \brief Frees and deallocates the Elliptic Curve Point module
+ * extension.
+ *
+ * \param grp The pointer to the group the module was initialised for.
+ */
+void mbedtls_internal_ecp_free( const mbedtls_ecp_group *grp );
+
+#if defined(ECP_SHORTWEIERSTRASS)
+
+#if defined(MBEDTLS_ECP_RANDOMIZE_JAC_ALT)
+/**
+ * \brief Randomize jacobian coordinates:
+ * (X, Y, Z) -> (l^2 X, l^3 Y, l Z) for random l.
+ *
+ * \param grp Pointer to the group representing the curve.
+ *
+ * \param pt The point on the curve to be randomised, given with Jacobian
+ * coordinates.
+ *
+ * \param f_rng A function pointer to the random number generator.
+ *
+ * \param p_rng A pointer to the random number generator state.
+ *
+ * \return 0 if successful.
+ */
+int mbedtls_internal_ecp_randomize_jac( const mbedtls_ecp_group *grp,
+ mbedtls_ecp_point *pt, int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+#endif
+
+#if defined(MBEDTLS_ECP_ADD_MIXED_ALT)
+/**
+ * \brief Addition: R = P + Q, mixed affine-Jacobian coordinates.
+ *
+ * The coordinates of Q must be normalized (= affine),
+ * but those of P don't need to. R is not normalized.
+ *
+ * This function is used only as a subrutine of
+ * ecp_mul_comb().
+ *
+ * Special cases: (1) P or Q is zero, (2) R is zero,
+ * (3) P == Q.
+ * None of these cases can happen as intermediate step in
+ * ecp_mul_comb():
+ * - at each step, P, Q and R are multiples of the base
+ * point, the factor being less than its order, so none of
+ * them is zero;
+ * - Q is an odd multiple of the base point, P an even
+ * multiple, due to the choice of precomputed points in the
+ * modified comb method.
+ * So branches for these cases do not leak secret information.
+ *
+ * We accept Q->Z being unset (saving memory in tables) as
+ * meaning 1.
+ *
+ * Cost in field operations if done by [5] 3.22:
+ * 1A := 8M + 3S
+ *
+ * \param grp Pointer to the group representing the curve.
+ *
+ * \param R Pointer to a point structure to hold the result.
+ *
+ * \param P Pointer to the first summand, given with Jacobian
+ * coordinates
+ *
+ * \param Q Pointer to the second summand, given with affine
+ * coordinates.
+ *
+ * \return 0 if successful.
+ */
+int mbedtls_internal_ecp_add_mixed( const mbedtls_ecp_group *grp,
+ mbedtls_ecp_point *R, const mbedtls_ecp_point *P,
+ const mbedtls_ecp_point *Q );
+#endif
+
+/**
+ * \brief Point doubling R = 2 P, Jacobian coordinates.
+ *
+ * Cost: 1D := 3M + 4S (A == 0)
+ * 4M + 4S (A == -3)
+ * 3M + 6S + 1a otherwise
+ * when the implementation is based on the "dbl-1998-cmo-2"
+ * doubling formulas in [8] and standard optimizations are
+ * applied when curve parameter A is one of { 0, -3 }.
+ *
+ * \param grp Pointer to the group representing the curve.
+ *
+ * \param R Pointer to a point structure to hold the result.
+ *
+ * \param P Pointer to the point that has to be doubled, given with
+ * Jacobian coordinates.
+ *
+ * \return 0 if successful.
+ */
+#if defined(MBEDTLS_ECP_DOUBLE_JAC_ALT)
+int mbedtls_internal_ecp_double_jac( const mbedtls_ecp_group *grp,
+ mbedtls_ecp_point *R, const mbedtls_ecp_point *P );
+#endif
+
+/**
+ * \brief Normalize jacobian coordinates of an array of (pointers to)
+ * points.
+ *
+ * Using Montgomery's trick to perform only one inversion mod P
+ * the cost is:
+ * 1N(t) := 1I + (6t - 3)M + 1S
+ * (See for example Algorithm 10.3.4. in [9])
+ *
+ * This function is used only as a subrutine of
+ * ecp_mul_comb().
+ *
+ * Warning: fails (returning an error) if one of the points is
+ * zero!
+ * This should never happen, see choice of w in ecp_mul_comb().
+ *
+ * \param grp Pointer to the group representing the curve.
+ *
+ * \param T Array of pointers to the points to normalise.
+ *
+ * \param t_len Number of elements in the array.
+ *
+ * \return 0 if successful,
+ * an error if one of the points is zero.
+ */
+#if defined(MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT)
+int mbedtls_internal_ecp_normalize_jac_many( const mbedtls_ecp_group *grp,
+ mbedtls_ecp_point *T[], size_t t_len );
+#endif
+
+/**
+ * \brief Normalize jacobian coordinates so that Z == 0 || Z == 1.
+ *
+ * Cost in field operations if done by [5] 3.2.1:
+ * 1N := 1I + 3M + 1S
+ *
+ * \param grp Pointer to the group representing the curve.
+ *
+ * \param pt pointer to the point to be normalised. This is an
+ * input/output parameter.
+ *
+ * \return 0 if successful.
+ */
+#if defined(MBEDTLS_ECP_NORMALIZE_JAC_ALT)
+int mbedtls_internal_ecp_normalize_jac( const mbedtls_ecp_group *grp,
+ mbedtls_ecp_point *pt );
+#endif
+
+#endif /* ECP_SHORTWEIERSTRASS */
+
+#if defined(ECP_MONTGOMERY)
+
+#if defined(MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT)
+int mbedtls_internal_ecp_double_add_mxz( const mbedtls_ecp_group *grp,
+ mbedtls_ecp_point *R, mbedtls_ecp_point *S, const mbedtls_ecp_point *P,
+ const mbedtls_ecp_point *Q, const mbedtls_mpi *d );
+#endif
+
+/**
+ * \brief Randomize projective x/z coordinates:
+ * (X, Z) -> (l X, l Z) for random l
+ *
+ * \param grp pointer to the group representing the curve
+ *
+ * \param P the point on the curve to be randomised given with
+ * projective coordinates. This is an input/output parameter.
+ *
+ * \param f_rng a function pointer to the random number generator
+ *
+ * \param p_rng a pointer to the random number generator state
+ *
+ * \return 0 if successful
+ */
+#if defined(MBEDTLS_ECP_RANDOMIZE_MXZ_ALT)
+int mbedtls_internal_ecp_randomize_mxz( const mbedtls_ecp_group *grp,
+ mbedtls_ecp_point *P, int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+#endif
+
+/**
+ * \brief Normalize Montgomery x/z coordinates: X = X/Z, Z = 1.
+ *
+ * \param grp pointer to the group representing the curve
+ *
+ * \param P pointer to the point to be normalised. This is an
+ * input/output parameter.
+ *
+ * \return 0 if successful
+ */
+#if defined(MBEDTLS_ECP_NORMALIZE_MXZ_ALT)
+int mbedtls_internal_ecp_normalize_mxz( const mbedtls_ecp_group *grp,
+ mbedtls_ecp_point *P );
+#endif
+
+#endif /* ECP_MONTGOMERY */
+
+#endif /* MBEDTLS_ECP_INTERNAL_ALT */
+
+#endif /* ecp_internal.h */
+
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/entropy.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/entropy.h
new file mode 100644
index 0000000..ca06dc3
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/entropy.h
@@ -0,0 +1,289 @@
+/**
+ * \file entropy.h
+ *
+ * \brief Entropy accumulator implementation
+ */
+/*
+ * Copyright (C) 2006-2016, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_ENTROPY_H
+#define MBEDTLS_ENTROPY_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+
+#if defined(MBEDTLS_SHA512_C) && !defined(MBEDTLS_ENTROPY_FORCE_SHA256)
+#include "sha512.h"
+#define MBEDTLS_ENTROPY_SHA512_ACCUMULATOR
+#else
+#if defined(MBEDTLS_SHA256_C)
+#define MBEDTLS_ENTROPY_SHA256_ACCUMULATOR
+#include "sha256.h"
+#endif
+#endif
+
+#if defined(MBEDTLS_THREADING_C)
+#include "threading.h"
+#endif
+
+#if defined(MBEDTLS_HAVEGE_C)
+#include "havege.h"
+#endif
+
+#define MBEDTLS_ERR_ENTROPY_SOURCE_FAILED -0x003C /**< Critical entropy source failure. */
+#define MBEDTLS_ERR_ENTROPY_MAX_SOURCES -0x003E /**< No more sources can be added. */
+#define MBEDTLS_ERR_ENTROPY_NO_SOURCES_DEFINED -0x0040 /**< No sources have been added to poll. */
+#define MBEDTLS_ERR_ENTROPY_NO_STRONG_SOURCE -0x003D /**< No strong sources have been added to poll. */
+#define MBEDTLS_ERR_ENTROPY_FILE_IO_ERROR -0x003F /**< Read/write error in file. */
+
+/**
+ * \name SECTION: Module settings
+ *
+ * The configuration options you can set for this module are in this section.
+ * Either change them in config.h or define them on the compiler command line.
+ * \{
+ */
+
+#if !defined(MBEDTLS_ENTROPY_MAX_SOURCES)
+#define MBEDTLS_ENTROPY_MAX_SOURCES 20 /**< Maximum number of sources supported */
+#endif
+
+#if !defined(MBEDTLS_ENTROPY_MAX_GATHER)
+#define MBEDTLS_ENTROPY_MAX_GATHER 128 /**< Maximum amount requested from entropy sources */
+#endif
+
+/* \} name SECTION: Module settings */
+
+#if defined(MBEDTLS_ENTROPY_SHA512_ACCUMULATOR)
+#define MBEDTLS_ENTROPY_BLOCK_SIZE 64 /**< Block size of entropy accumulator (SHA-512) */
+#else
+#define MBEDTLS_ENTROPY_BLOCK_SIZE 32 /**< Block size of entropy accumulator (SHA-256) */
+#endif
+
+#define MBEDTLS_ENTROPY_MAX_SEED_SIZE 1024 /**< Maximum size of seed we read from seed file */
+#define MBEDTLS_ENTROPY_SOURCE_MANUAL MBEDTLS_ENTROPY_MAX_SOURCES
+
+#define MBEDTLS_ENTROPY_SOURCE_STRONG 1 /**< Entropy source is strong */
+#define MBEDTLS_ENTROPY_SOURCE_WEAK 0 /**< Entropy source is weak */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief Entropy poll callback pointer
+ *
+ * \param data Callback-specific data pointer
+ * \param output Data to fill
+ * \param len Maximum size to provide
+ * \param olen The actual amount of bytes put into the buffer (Can be 0)
+ *
+ * \return 0 if no critical failures occurred,
+ * MBEDTLS_ERR_ENTROPY_SOURCE_FAILED otherwise
+ */
+typedef int (*mbedtls_entropy_f_source_ptr)(void *data, unsigned char *output, size_t len,
+ size_t *olen);
+
+/**
+ * \brief Entropy source state
+ */
+typedef struct mbedtls_entropy_source_state
+{
+ mbedtls_entropy_f_source_ptr f_source; /**< The entropy source callback */
+ void * p_source; /**< The callback data pointer */
+ size_t size; /**< Amount received in bytes */
+ size_t threshold; /**< Minimum bytes required before release */
+ int strong; /**< Is the source strong? */
+}
+mbedtls_entropy_source_state;
+
+/**
+ * \brief Entropy context structure
+ */
+typedef struct mbedtls_entropy_context
+{
+ int accumulator_started;
+#if defined(MBEDTLS_ENTROPY_SHA512_ACCUMULATOR)
+ mbedtls_sha512_context accumulator;
+#else
+ mbedtls_sha256_context accumulator;
+#endif
+ int source_count;
+ mbedtls_entropy_source_state source[MBEDTLS_ENTROPY_MAX_SOURCES];
+#if defined(MBEDTLS_HAVEGE_C)
+ mbedtls_havege_state havege_data;
+#endif
+#if defined(MBEDTLS_THREADING_C)
+ mbedtls_threading_mutex_t mutex; /*!< mutex */
+#endif
+#if defined(MBEDTLS_ENTROPY_NV_SEED)
+ int initial_entropy_run;
+#endif
+}
+mbedtls_entropy_context;
+
+/**
+ * \brief Initialize the context
+ *
+ * \param ctx Entropy context to initialize
+ */
+void mbedtls_entropy_init( mbedtls_entropy_context *ctx );
+
+/**
+ * \brief Free the data in the context
+ *
+ * \param ctx Entropy context to free
+ */
+void mbedtls_entropy_free( mbedtls_entropy_context *ctx );
+
+/**
+ * \brief Adds an entropy source to poll
+ * (Thread-safe if MBEDTLS_THREADING_C is enabled)
+ *
+ * \param ctx Entropy context
+ * \param f_source Entropy function
+ * \param p_source Function data
+ * \param threshold Minimum required from source before entropy is released
+ * ( with mbedtls_entropy_func() ) (in bytes)
+ * \param strong MBEDTLS_ENTROPY_SOURCE_STRONG or
+ * MBEDTLS_ENTROPY_SOURCE_WEAK.
+ * At least one strong source needs to be added.
+ * Weaker sources (such as the cycle counter) can be used as
+ * a complement.
+ *
+ * \return 0 if successful or MBEDTLS_ERR_ENTROPY_MAX_SOURCES
+ */
+int mbedtls_entropy_add_source( mbedtls_entropy_context *ctx,
+ mbedtls_entropy_f_source_ptr f_source, void *p_source,
+ size_t threshold, int strong );
+
+/**
+ * \brief Trigger an extra gather poll for the accumulator
+ * (Thread-safe if MBEDTLS_THREADING_C is enabled)
+ *
+ * \param ctx Entropy context
+ *
+ * \return 0 if successful, or MBEDTLS_ERR_ENTROPY_SOURCE_FAILED
+ */
+int mbedtls_entropy_gather( mbedtls_entropy_context *ctx );
+
+/**
+ * \brief Retrieve entropy from the accumulator
+ * (Maximum length: MBEDTLS_ENTROPY_BLOCK_SIZE)
+ * (Thread-safe if MBEDTLS_THREADING_C is enabled)
+ *
+ * \param data Entropy context
+ * \param output Buffer to fill
+ * \param len Number of bytes desired, must be at most MBEDTLS_ENTROPY_BLOCK_SIZE
+ *
+ * \return 0 if successful, or MBEDTLS_ERR_ENTROPY_SOURCE_FAILED
+ */
+int mbedtls_entropy_func( void *data, unsigned char *output, size_t len );
+
+/**
+ * \brief Add data to the accumulator manually
+ * (Thread-safe if MBEDTLS_THREADING_C is enabled)
+ *
+ * \param ctx Entropy context
+ * \param data Data to add
+ * \param len Length of data
+ *
+ * \return 0 if successful
+ */
+int mbedtls_entropy_update_manual( mbedtls_entropy_context *ctx,
+ const unsigned char *data, size_t len );
+
+#if defined(MBEDTLS_ENTROPY_NV_SEED)
+/**
+ * \brief Trigger an update of the seed file in NV by using the
+ * current entropy pool.
+ *
+ * \param ctx Entropy context
+ *
+ * \return 0 if successful
+ */
+int mbedtls_entropy_update_nv_seed( mbedtls_entropy_context *ctx );
+#endif /* MBEDTLS_ENTROPY_NV_SEED */
+
+#if defined(MBEDTLS_FS_IO)
+/**
+ * \brief Write a seed file
+ *
+ * \param ctx Entropy context
+ * \param path Name of the file
+ *
+ * \return 0 if successful,
+ * MBEDTLS_ERR_ENTROPY_FILE_IO_ERROR on file error, or
+ * MBEDTLS_ERR_ENTROPY_SOURCE_FAILED
+ */
+int mbedtls_entropy_write_seed_file( mbedtls_entropy_context *ctx, const char *path );
+
+/**
+ * \brief Read and update a seed file. Seed is added to this
+ * instance. No more than MBEDTLS_ENTROPY_MAX_SEED_SIZE bytes are
+ * read from the seed file. The rest is ignored.
+ *
+ * \param ctx Entropy context
+ * \param path Name of the file
+ *
+ * \return 0 if successful,
+ * MBEDTLS_ERR_ENTROPY_FILE_IO_ERROR on file error,
+ * MBEDTLS_ERR_ENTROPY_SOURCE_FAILED
+ */
+int mbedtls_entropy_update_seed_file( mbedtls_entropy_context *ctx, const char *path );
+#endif /* MBEDTLS_FS_IO */
+
+#if defined(MBEDTLS_SELF_TEST)
+/**
+ * \brief Checkup routine
+ *
+ * This module self-test also calls the entropy self-test,
+ * mbedtls_entropy_source_self_test();
+ *
+ * \return 0 if successful, or 1 if a test failed
+ */
+int mbedtls_entropy_self_test( int verbose );
+
+#if defined(MBEDTLS_ENTROPY_HARDWARE_ALT)
+/**
+ * \brief Checkup routine
+ *
+ * Verifies the integrity of the hardware entropy source
+ * provided by the function 'mbedtls_hardware_poll()'.
+ *
+ * Note this is the only hardware entropy source that is known
+ * at link time, and other entropy sources configured
+ * dynamically at runtime by the function
+ * mbedtls_entropy_add_source() will not be tested.
+ *
+ * \return 0 if successful, or 1 if a test failed
+ */
+int mbedtls_entropy_source_self_test( int verbose );
+#endif /* MBEDTLS_ENTROPY_HARDWARE_ALT */
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* entropy.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/entropy_poll.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/entropy_poll.h
new file mode 100644
index 0000000..94dd657
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/entropy_poll.h
@@ -0,0 +1,110 @@
+/**
+ * \file entropy_poll.h
+ *
+ * \brief Platform-specific and custom entropy polling functions
+ */
+/*
+ * Copyright (C) 2006-2016, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_ENTROPY_POLL_H
+#define MBEDTLS_ENTROPY_POLL_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * Default thresholds for built-in sources, in bytes
+ */
+#define MBEDTLS_ENTROPY_MIN_PLATFORM 32 /**< Minimum for platform source */
+#define MBEDTLS_ENTROPY_MIN_HAVEGE 32 /**< Minimum for HAVEGE */
+#define MBEDTLS_ENTROPY_MIN_HARDCLOCK 4 /**< Minimum for mbedtls_timing_hardclock() */
+#if !defined(MBEDTLS_ENTROPY_MIN_HARDWARE)
+#define MBEDTLS_ENTROPY_MIN_HARDWARE 32 /**< Minimum for the hardware source */
+#endif
+
+/**
+ * \brief Entropy poll callback that provides 0 entropy.
+ */
+#if defined(MBEDTLS_TEST_NULL_ENTROPY)
+ int mbedtls_null_entropy_poll( void *data,
+ unsigned char *output, size_t len, size_t *olen );
+#endif
+
+#if !defined(MBEDTLS_NO_PLATFORM_ENTROPY)
+/**
+ * \brief Platform-specific entropy poll callback
+ */
+int mbedtls_platform_entropy_poll( void *data,
+ unsigned char *output, size_t len, size_t *olen );
+#endif
+
+#if defined(MBEDTLS_HAVEGE_C)
+/**
+ * \brief HAVEGE based entropy poll callback
+ *
+ * Requires an HAVEGE state as its data pointer.
+ */
+int mbedtls_havege_poll( void *data,
+ unsigned char *output, size_t len, size_t *olen );
+#endif
+
+#if defined(MBEDTLS_TIMING_C)
+/**
+ * \brief mbedtls_timing_hardclock-based entropy poll callback
+ */
+int mbedtls_hardclock_poll( void *data,
+ unsigned char *output, size_t len, size_t *olen );
+#endif
+
+#if defined(MBEDTLS_ENTROPY_HARDWARE_ALT)
+/**
+ * \brief Entropy poll callback for a hardware source
+ *
+ * \warning This is not provided by mbed TLS!
+ * See \c MBEDTLS_ENTROPY_HARDWARE_ALT in config.h.
+ *
+ * \note This must accept NULL as its first argument.
+ */
+int mbedtls_hardware_poll( void *data,
+ unsigned char *output, size_t len, size_t *olen );
+#endif
+
+#if defined(MBEDTLS_ENTROPY_NV_SEED)
+/**
+ * \brief Entropy poll callback for a non-volatile seed file
+ *
+ * \note This must accept NULL as its first argument.
+ */
+int mbedtls_nv_seed_poll( void *data,
+ unsigned char *output, size_t len, size_t *olen );
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* entropy_poll.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/error.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/error.h
new file mode 100644
index 0000000..bee0fe4
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/error.h
@@ -0,0 +1,129 @@
+/**
+ * \file error.h
+ *
+ * \brief Error to string translation
+ */
+/*
+ * Copyright (C) 2006-2018, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_ERROR_H
+#define MBEDTLS_ERROR_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+
+/**
+ * Error code layout.
+ *
+ * Currently we try to keep all error codes within the negative space of 16
+ * bits signed integers to support all platforms (-0x0001 - -0x7FFF). In
+ * addition we'd like to give two layers of information on the error if
+ * possible.
+ *
+ * For that purpose the error codes are segmented in the following manner:
+ *
+ * 16 bit error code bit-segmentation
+ *
+ * 1 bit - Unused (sign bit)
+ * 3 bits - High level module ID
+ * 5 bits - Module-dependent error code
+ * 7 bits - Low level module errors
+ *
+ * For historical reasons, low-level error codes are divided in even and odd,
+ * even codes were assigned first, and -1 is reserved for other errors.
+ *
+ * Low-level module errors (0x0002-0x007E, 0x0003-0x007F)
+ *
+ * Module Nr Codes assigned
+ * MPI 7 0x0002-0x0010
+ * GCM 3 0x0012-0x0014 0x0013-0x0013
+ * BLOWFISH 3 0x0016-0x0018 0x0017-0x0017
+ * THREADING 3 0x001A-0x001E
+ * AES 5 0x0020-0x0022 0x0021-0x0025
+ * CAMELLIA 3 0x0024-0x0026 0x0027-0x0027
+ * XTEA 2 0x0028-0x0028 0x0029-0x0029
+ * BASE64 2 0x002A-0x002C
+ * OID 1 0x002E-0x002E 0x000B-0x000B
+ * PADLOCK 1 0x0030-0x0030
+ * DES 2 0x0032-0x0032 0x0033-0x0033
+ * CTR_DBRG 4 0x0034-0x003A
+ * ENTROPY 3 0x003C-0x0040 0x003D-0x003F
+ * NET 13 0x0042-0x0052 0x0043-0x0049
+ * ARIA 4 0x0058-0x005E
+ * ASN1 7 0x0060-0x006C
+ * CMAC 1 0x007A-0x007A
+ * PBKDF2 1 0x007C-0x007C
+ * HMAC_DRBG 4 0x0003-0x0009
+ * CCM 3 0x000D-0x0011
+ * ARC4 1 0x0019-0x0019
+ * MD2 1 0x002B-0x002B
+ * MD4 1 0x002D-0x002D
+ * MD5 1 0x002F-0x002F
+ * RIPEMD160 1 0x0031-0x0031
+ * SHA1 1 0x0035-0x0035 0x0073-0x0073
+ * SHA256 1 0x0037-0x0037 0x0074-0x0074
+ * SHA512 1 0x0039-0x0039 0x0075-0x0075
+ * CHACHA20 3 0x0051-0x0055
+ * POLY1305 3 0x0057-0x005B
+ * CHACHAPOLY 2 0x0054-0x0056
+ * PLATFORM 1 0x0070-0x0072
+ *
+ * High-level module nr (3 bits - 0x0...-0x7...)
+ * Name ID Nr of Errors
+ * PEM 1 9
+ * PKCS#12 1 4 (Started from top)
+ * X509 2 20
+ * PKCS5 2 4 (Started from top)
+ * DHM 3 11
+ * PK 3 15 (Started from top)
+ * RSA 4 11
+ * ECP 4 10 (Started from top)
+ * MD 5 5
+ * HKDF 5 1 (Started from top)
+ * CIPHER 6 8
+ * SSL 6 23 (Started from top)
+ * SSL 7 32
+ *
+ * Module dependent error code (5 bits 0x.00.-0x.F8.)
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief Translate a mbed TLS error code into a string representation,
+ * Result is truncated if necessary and always includes a terminating
+ * null byte.
+ *
+ * \param errnum error code
+ * \param buffer buffer to place representation in
+ * \param buflen length of the buffer
+ */
+void mbedtls_strerror( int errnum, char *buffer, size_t buflen );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* error.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/gcm.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/gcm.h
new file mode 100644
index 0000000..fd130ab
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/gcm.h
@@ -0,0 +1,326 @@
+/**
+ * \file gcm.h
+ *
+ * \brief This file contains GCM definitions and functions.
+ *
+ * The Galois/Counter Mode (GCM) for 128-bit block ciphers is defined
+ * in <em>D. McGrew, J. Viega, The Galois/Counter Mode of Operation
+ * (GCM), Natl. Inst. Stand. Technol.</em>
+ *
+ * For more information on GCM, see <em>NIST SP 800-38D: Recommendation for
+ * Block Cipher Modes of Operation: Galois/Counter Mode (GCM) and GMAC</em>.
+ *
+ */
+/*
+ * Copyright (C) 2006-2018, Arm Limited (or its affiliates), All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of Mbed TLS (https://tls.mbed.org)
+ */
+
+#ifndef MBEDTLS_GCM_H
+#define MBEDTLS_GCM_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "cipher.h"
+
+#include <stdint.h>
+
+#define MBEDTLS_GCM_ENCRYPT 1
+#define MBEDTLS_GCM_DECRYPT 0
+
+#define MBEDTLS_ERR_GCM_AUTH_FAILED -0x0012 /**< Authenticated decryption failed. */
+
+/* MBEDTLS_ERR_GCM_HW_ACCEL_FAILED is deprecated and should not be used. */
+#define MBEDTLS_ERR_GCM_HW_ACCEL_FAILED -0x0013 /**< GCM hardware accelerator failed. */
+
+#define MBEDTLS_ERR_GCM_BAD_INPUT -0x0014 /**< Bad input parameters to function. */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_GCM_ALT)
+
+/**
+ * \brief The GCM context structure.
+ */
+typedef struct mbedtls_gcm_context
+{
+ mbedtls_cipher_context_t cipher_ctx; /*!< The cipher context used. */
+ uint64_t HL[16]; /*!< Precalculated HTable low. */
+ uint64_t HH[16]; /*!< Precalculated HTable high. */
+ uint64_t len; /*!< The total length of the encrypted data. */
+ uint64_t add_len; /*!< The total length of the additional data. */
+ unsigned char base_ectr[16]; /*!< The first ECTR for tag. */
+ unsigned char y[16]; /*!< The Y working value. */
+ unsigned char buf[16]; /*!< The buf working value. */
+ int mode; /*!< The operation to perform:
+ #MBEDTLS_GCM_ENCRYPT or
+ #MBEDTLS_GCM_DECRYPT. */
+}
+mbedtls_gcm_context;
+
+#else /* !MBEDTLS_GCM_ALT */
+#include "gcm_alt.h"
+#endif /* !MBEDTLS_GCM_ALT */
+
+/**
+ * \brief This function initializes the specified GCM context,
+ * to make references valid, and prepares the context
+ * for mbedtls_gcm_setkey() or mbedtls_gcm_free().
+ *
+ * The function does not bind the GCM context to a particular
+ * cipher, nor set the key. For this purpose, use
+ * mbedtls_gcm_setkey().
+ *
+ * \param ctx The GCM context to initialize. This must not be \c NULL.
+ */
+void mbedtls_gcm_init( mbedtls_gcm_context *ctx );
+
+/**
+ * \brief This function associates a GCM context with a
+ * cipher algorithm and a key.
+ *
+ * \param ctx The GCM context. This must be initialized.
+ * \param cipher The 128-bit block cipher to use.
+ * \param key The encryption key. This must be a readable buffer of at
+ * least \p keybits bits.
+ * \param keybits The key size in bits. Valid options are:
+ * <ul><li>128 bits</li>
+ * <li>192 bits</li>
+ * <li>256 bits</li></ul>
+ *
+ * \return \c 0 on success.
+ * \return A cipher-specific error code on failure.
+ */
+int mbedtls_gcm_setkey( mbedtls_gcm_context *ctx,
+ mbedtls_cipher_id_t cipher,
+ const unsigned char *key,
+ unsigned int keybits );
+
+/**
+ * \brief This function performs GCM encryption or decryption of a buffer.
+ *
+ * \note For encryption, the output buffer can be the same as the
+ * input buffer. For decryption, the output buffer cannot be
+ * the same as input buffer. If the buffers overlap, the output
+ * buffer must trail at least 8 Bytes behind the input buffer.
+ *
+ * \warning When this function performs a decryption, it outputs the
+ * authentication tag and does not verify that the data is
+ * authentic. You should use this function to perform encryption
+ * only. For decryption, use mbedtls_gcm_auth_decrypt() instead.
+ *
+ * \param ctx The GCM context to use for encryption or decryption. This
+ * must be initialized.
+ * \param mode The operation to perform:
+ * - #MBEDTLS_GCM_ENCRYPT to perform authenticated encryption.
+ * The ciphertext is written to \p output and the
+ * authentication tag is written to \p tag.
+ * - #MBEDTLS_GCM_DECRYPT to perform decryption.
+ * The plaintext is written to \p output and the
+ * authentication tag is written to \p tag.
+ * Note that this mode is not recommended, because it does
+ * not verify the authenticity of the data. For this reason,
+ * you should use mbedtls_gcm_auth_decrypt() instead of
+ * calling this function in decryption mode.
+ * \param length The length of the input data, which is equal to the length
+ * of the output data.
+ * \param iv The initialization vector. This must be a readable buffer of
+ * at least \p iv_len Bytes.
+ * \param iv_len The length of the IV.
+ * \param add The buffer holding the additional data. This must be of at
+ * least that size in Bytes.
+ * \param add_len The length of the additional data.
+ * \param input The buffer holding the input data. If \p length is greater
+ * than zero, this must be a readable buffer of at least that
+ * size in Bytes.
+ * \param output The buffer for holding the output data. If \p length is greater
+ * than zero, this must be a writable buffer of at least that
+ * size in Bytes.
+ * \param tag_len The length of the tag to generate.
+ * \param tag The buffer for holding the tag. This must be a readable
+ * buffer of at least \p tag_len Bytes.
+ *
+ * \return \c 0 if the encryption or decryption was performed
+ * successfully. Note that in #MBEDTLS_GCM_DECRYPT mode,
+ * this does not indicate that the data is authentic.
+ * \return #MBEDTLS_ERR_GCM_BAD_INPUT if the lengths or pointers are
+ * not valid or a cipher-specific error code if the encryption
+ * or decryption failed.
+ */
+int mbedtls_gcm_crypt_and_tag( mbedtls_gcm_context *ctx,
+ int mode,
+ size_t length,
+ const unsigned char *iv,
+ size_t iv_len,
+ const unsigned char *add,
+ size_t add_len,
+ const unsigned char *input,
+ unsigned char *output,
+ size_t tag_len,
+ unsigned char *tag );
+
+/**
+ * \brief This function performs a GCM authenticated decryption of a
+ * buffer.
+ *
+ * \note For decryption, the output buffer cannot be the same as
+ * input buffer. If the buffers overlap, the output buffer
+ * must trail at least 8 Bytes behind the input buffer.
+ *
+ * \param ctx The GCM context. This must be initialized.
+ * \param length The length of the ciphertext to decrypt, which is also
+ * the length of the decrypted plaintext.
+ * \param iv The initialization vector. This must be a readable buffer
+ * of at least \p iv_len Bytes.
+ * \param iv_len The length of the IV.
+ * \param add The buffer holding the additional data. This must be of at
+ * least that size in Bytes.
+ * \param add_len The length of the additional data.
+ * \param tag The buffer holding the tag to verify. This must be a
+ * readable buffer of at least \p tag_len Bytes.
+ * \param tag_len The length of the tag to verify.
+ * \param input The buffer holding the ciphertext. If \p length is greater
+ * than zero, this must be a readable buffer of at least that
+ * size.
+ * \param output The buffer for holding the decrypted plaintext. If \p length
+ * is greater than zero, this must be a writable buffer of at
+ * least that size.
+ *
+ * \return \c 0 if successful and authenticated.
+ * \return #MBEDTLS_ERR_GCM_AUTH_FAILED if the tag does not match.
+ * \return #MBEDTLS_ERR_GCM_BAD_INPUT if the lengths or pointers are
+ * not valid or a cipher-specific error code if the decryption
+ * failed.
+ */
+int mbedtls_gcm_auth_decrypt( mbedtls_gcm_context *ctx,
+ size_t length,
+ const unsigned char *iv,
+ size_t iv_len,
+ const unsigned char *add,
+ size_t add_len,
+ const unsigned char *tag,
+ size_t tag_len,
+ const unsigned char *input,
+ unsigned char *output );
+
+/**
+ * \brief This function starts a GCM encryption or decryption
+ * operation.
+ *
+ * \param ctx The GCM context. This must be initialized.
+ * \param mode The operation to perform: #MBEDTLS_GCM_ENCRYPT or
+ * #MBEDTLS_GCM_DECRYPT.
+ * \param iv The initialization vector. This must be a readable buffer of
+ * at least \p iv_len Bytes.
+ * \param iv_len The length of the IV.
+ * \param add The buffer holding the additional data, or \c NULL
+ * if \p add_len is \c 0.
+ * \param add_len The length of the additional data. If \c 0,
+ * \p add may be \c NULL.
+ *
+ * \return \c 0 on success.
+ */
+int mbedtls_gcm_starts( mbedtls_gcm_context *ctx,
+ int mode,
+ const unsigned char *iv,
+ size_t iv_len,
+ const unsigned char *add,
+ size_t add_len );
+
+/**
+ * \brief This function feeds an input buffer into an ongoing GCM
+ * encryption or decryption operation.
+ *
+ * ` The function expects input to be a multiple of 16
+ * Bytes. Only the last call before calling
+ * mbedtls_gcm_finish() can be less than 16 Bytes.
+ *
+ * \note For decryption, the output buffer cannot be the same as
+ * input buffer. If the buffers overlap, the output buffer
+ * must trail at least 8 Bytes behind the input buffer.
+ *
+ * \param ctx The GCM context. This must be initialized.
+ * \param length The length of the input data. This must be a multiple of
+ * 16 except in the last call before mbedtls_gcm_finish().
+ * \param input The buffer holding the input data. If \p length is greater
+ * than zero, this must be a readable buffer of at least that
+ * size in Bytes.
+ * \param output The buffer for holding the output data. If \p length is
+ * greater than zero, this must be a writable buffer of at
+ * least that size in Bytes.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_GCM_BAD_INPUT on failure.
+ */
+int mbedtls_gcm_update( mbedtls_gcm_context *ctx,
+ size_t length,
+ const unsigned char *input,
+ unsigned char *output );
+
+/**
+ * \brief This function finishes the GCM operation and generates
+ * the authentication tag.
+ *
+ * It wraps up the GCM stream, and generates the
+ * tag. The tag can have a maximum length of 16 Bytes.
+ *
+ * \param ctx The GCM context. This must be initialized.
+ * \param tag The buffer for holding the tag. This must be a readable
+ * buffer of at least \p tag_len Bytes.
+ * \param tag_len The length of the tag to generate. This must be at least
+ * four.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_GCM_BAD_INPUT on failure.
+ */
+int mbedtls_gcm_finish( mbedtls_gcm_context *ctx,
+ unsigned char *tag,
+ size_t tag_len );
+
+/**
+ * \brief This function clears a GCM context and the underlying
+ * cipher sub-context.
+ *
+ * \param ctx The GCM context to clear. If this is \c NULL, the call has
+ * no effect. Otherwise, this must be initialized.
+ */
+void mbedtls_gcm_free( mbedtls_gcm_context *ctx );
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief The GCM checkup routine.
+ *
+ * \return \c 0 on success.
+ * \return \c 1 on failure.
+ */
+int mbedtls_gcm_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* gcm.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/havege.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/havege.h
new file mode 100644
index 0000000..4c1c860
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/havege.h
@@ -0,0 +1,81 @@
+/**
+ * \file havege.h
+ *
+ * \brief HAVEGE: HArdware Volatile Entropy Gathering and Expansion
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_HAVEGE_H
+#define MBEDTLS_HAVEGE_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+
+#define MBEDTLS_HAVEGE_COLLECT_SIZE 1024
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief HAVEGE state structure
+ */
+typedef struct mbedtls_havege_state
+{
+ int PT1, PT2, offset[2];
+ int pool[MBEDTLS_HAVEGE_COLLECT_SIZE];
+ int WALK[8192];
+}
+mbedtls_havege_state;
+
+/**
+ * \brief HAVEGE initialization
+ *
+ * \param hs HAVEGE state to be initialized
+ */
+void mbedtls_havege_init( mbedtls_havege_state *hs );
+
+/**
+ * \brief Clear HAVEGE state
+ *
+ * \param hs HAVEGE state to be cleared
+ */
+void mbedtls_havege_free( mbedtls_havege_state *hs );
+
+/**
+ * \brief HAVEGE rand function
+ *
+ * \param p_rng A HAVEGE state
+ * \param output Buffer to fill
+ * \param len Length of buffer
+ *
+ * \return 0
+ */
+int mbedtls_havege_random( void *p_rng, unsigned char *output, size_t len );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* havege.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/hkdf.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/hkdf.h
new file mode 100644
index 0000000..40ee64e
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/hkdf.h
@@ -0,0 +1,141 @@
+/**
+ * \file hkdf.h
+ *
+ * \brief This file contains the HKDF interface.
+ *
+ * The HMAC-based Extract-and-Expand Key Derivation Function (HKDF) is
+ * specified by RFC 5869.
+ */
+/*
+ * Copyright (C) 2016-2018, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_HKDF_H
+#define MBEDTLS_HKDF_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "md.h"
+
+/**
+ * \name HKDF Error codes
+ * \{
+ */
+#define MBEDTLS_ERR_HKDF_BAD_INPUT_DATA -0x5F80 /**< Bad input parameters to function. */
+/* \} name */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief This is the HMAC-based Extract-and-Expand Key Derivation Function
+ * (HKDF).
+ *
+ * \param md A hash function; md.size denotes the length of the hash
+ * function output in bytes.
+ * \param salt An optional salt value (a non-secret random value);
+ * if the salt is not provided, a string of all zeros of
+ * md.size length is used as the salt.
+ * \param salt_len The length in bytes of the optional \p salt.
+ * \param ikm The input keying material.
+ * \param ikm_len The length in bytes of \p ikm.
+ * \param info An optional context and application specific information
+ * string. This can be a zero-length string.
+ * \param info_len The length of \p info in bytes.
+ * \param okm The output keying material of \p okm_len bytes.
+ * \param okm_len The length of the output keying material in bytes. This
+ * must be less than or equal to 255 * md.size bytes.
+ *
+ * \return 0 on success.
+ * \return #MBEDTLS_ERR_HKDF_BAD_INPUT_DATA when the parameters are invalid.
+ * \return An MBEDTLS_ERR_MD_* error for errors returned from the underlying
+ * MD layer.
+ */
+int mbedtls_hkdf( const mbedtls_md_info_t *md, const unsigned char *salt,
+ size_t salt_len, const unsigned char *ikm, size_t ikm_len,
+ const unsigned char *info, size_t info_len,
+ unsigned char *okm, size_t okm_len );
+
+/**
+ * \brief Take the input keying material \p ikm and extract from it a
+ * fixed-length pseudorandom key \p prk.
+ *
+ * \warning This function should only be used if the security of it has been
+ * studied and established in that particular context (eg. TLS 1.3
+ * key schedule). For standard HKDF security guarantees use
+ * \c mbedtls_hkdf instead.
+ *
+ * \param md A hash function; md.size denotes the length of the
+ * hash function output in bytes.
+ * \param salt An optional salt value (a non-secret random value);
+ * if the salt is not provided, a string of all zeros
+ * of md.size length is used as the salt.
+ * \param salt_len The length in bytes of the optional \p salt.
+ * \param ikm The input keying material.
+ * \param ikm_len The length in bytes of \p ikm.
+ * \param[out] prk A pseudorandom key of at least md.size bytes.
+ *
+ * \return 0 on success.
+ * \return #MBEDTLS_ERR_HKDF_BAD_INPUT_DATA when the parameters are invalid.
+ * \return An MBEDTLS_ERR_MD_* error for errors returned from the underlying
+ * MD layer.
+ */
+int mbedtls_hkdf_extract( const mbedtls_md_info_t *md,
+ const unsigned char *salt, size_t salt_len,
+ const unsigned char *ikm, size_t ikm_len,
+ unsigned char *prk );
+
+/**
+ * \brief Expand the supplied \p prk into several additional pseudorandom
+ * keys, which is the output of the HKDF.
+ *
+ * \warning This function should only be used if the security of it has been
+ * studied and established in that particular context (eg. TLS 1.3
+ * key schedule). For standard HKDF security guarantees use
+ * \c mbedtls_hkdf instead.
+ *
+ * \param md A hash function; md.size denotes the length of the hash
+ * function output in bytes.
+ * \param prk A pseudorandom key of at least md.size bytes. \p prk is
+ * usually the output from the HKDF extract step.
+ * \param prk_len The length in bytes of \p prk.
+ * \param info An optional context and application specific information
+ * string. This can be a zero-length string.
+ * \param info_len The length of \p info in bytes.
+ * \param okm The output keying material of \p okm_len bytes.
+ * \param okm_len The length of the output keying material in bytes. This
+ * must be less than or equal to 255 * md.size bytes.
+ *
+ * \return 0 on success.
+ * \return #MBEDTLS_ERR_HKDF_BAD_INPUT_DATA when the parameters are invalid.
+ * \return An MBEDTLS_ERR_MD_* error for errors returned from the underlying
+ * MD layer.
+ */
+int mbedtls_hkdf_expand( const mbedtls_md_info_t *md, const unsigned char *prk,
+ size_t prk_len, const unsigned char *info,
+ size_t info_len, unsigned char *okm, size_t okm_len );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* hkdf.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/hmac_drbg.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/hmac_drbg.h
new file mode 100644
index 0000000..7eae32b
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/hmac_drbg.h
@@ -0,0 +1,334 @@
+/**
+ * \file hmac_drbg.h
+ *
+ * \brief HMAC_DRBG (NIST SP 800-90A)
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_HMAC_DRBG_H
+#define MBEDTLS_HMAC_DRBG_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "md.h"
+
+#if defined(MBEDTLS_THREADING_C)
+#include "threading.h"
+#endif
+
+/*
+ * Error codes
+ */
+#define MBEDTLS_ERR_HMAC_DRBG_REQUEST_TOO_BIG -0x0003 /**< Too many random requested in single call. */
+#define MBEDTLS_ERR_HMAC_DRBG_INPUT_TOO_BIG -0x0005 /**< Input too large (Entropy + additional). */
+#define MBEDTLS_ERR_HMAC_DRBG_FILE_IO_ERROR -0x0007 /**< Read/write error in file. */
+#define MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED -0x0009 /**< The entropy source failed. */
+
+/**
+ * \name SECTION: Module settings
+ *
+ * The configuration options you can set for this module are in this section.
+ * Either change them in config.h or define them on the compiler command line.
+ * \{
+ */
+
+#if !defined(MBEDTLS_HMAC_DRBG_RESEED_INTERVAL)
+#define MBEDTLS_HMAC_DRBG_RESEED_INTERVAL 10000 /**< Interval before reseed is performed by default */
+#endif
+
+#if !defined(MBEDTLS_HMAC_DRBG_MAX_INPUT)
+#define MBEDTLS_HMAC_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */
+#endif
+
+#if !defined(MBEDTLS_HMAC_DRBG_MAX_REQUEST)
+#define MBEDTLS_HMAC_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */
+#endif
+
+#if !defined(MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT)
+#define MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */
+#endif
+
+/* \} name SECTION: Module settings */
+
+#define MBEDTLS_HMAC_DRBG_PR_OFF 0 /**< No prediction resistance */
+#define MBEDTLS_HMAC_DRBG_PR_ON 1 /**< Prediction resistance enabled */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * HMAC_DRBG context.
+ */
+typedef struct mbedtls_hmac_drbg_context
+{
+ /* Working state: the key K is not stored explicitely,
+ * but is implied by the HMAC context */
+ mbedtls_md_context_t md_ctx; /*!< HMAC context (inc. K) */
+ unsigned char V[MBEDTLS_MD_MAX_SIZE]; /*!< V in the spec */
+ int reseed_counter; /*!< reseed counter */
+
+ /* Administrative state */
+ size_t entropy_len; /*!< entropy bytes grabbed on each (re)seed */
+ int prediction_resistance; /*!< enable prediction resistance (Automatic
+ reseed before every random generation) */
+ int reseed_interval; /*!< reseed interval */
+
+ /* Callbacks */
+ int (*f_entropy)(void *, unsigned char *, size_t); /*!< entropy function */
+ void *p_entropy; /*!< context for the entropy function */
+
+#if defined(MBEDTLS_THREADING_C)
+ mbedtls_threading_mutex_t mutex;
+#endif
+} mbedtls_hmac_drbg_context;
+
+/**
+ * \brief HMAC_DRBG context initialization
+ * Makes the context ready for mbedtls_hmac_drbg_seed(),
+ * mbedtls_hmac_drbg_seed_buf() or
+ * mbedtls_hmac_drbg_free().
+ *
+ * \param ctx HMAC_DRBG context to be initialized
+ */
+void mbedtls_hmac_drbg_init( mbedtls_hmac_drbg_context *ctx );
+
+/**
+ * \brief HMAC_DRBG initial seeding
+ * Seed and setup entropy source for future reseeds.
+ *
+ * \param ctx HMAC_DRBG context to be seeded
+ * \param md_info MD algorithm to use for HMAC_DRBG
+ * \param f_entropy Entropy callback (p_entropy, buffer to fill, buffer
+ * length)
+ * \param p_entropy Entropy context
+ * \param custom Personalization data (Device specific identifiers)
+ * (Can be NULL)
+ * \param len Length of personalization data
+ *
+ * \note The "security strength" as defined by NIST is set to:
+ * 128 bits if md_alg is SHA-1,
+ * 192 bits if md_alg is SHA-224,
+ * 256 bits if md_alg is SHA-256 or higher.
+ * Note that SHA-256 is just as efficient as SHA-224.
+ *
+ * \return 0 if successful, or
+ * MBEDTLS_ERR_MD_BAD_INPUT_DATA, or
+ * MBEDTLS_ERR_MD_ALLOC_FAILED, or
+ * MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED.
+ */
+int mbedtls_hmac_drbg_seed( mbedtls_hmac_drbg_context *ctx,
+ const mbedtls_md_info_t * md_info,
+ int (*f_entropy)(void *, unsigned char *, size_t),
+ void *p_entropy,
+ const unsigned char *custom,
+ size_t len );
+
+/**
+ * \brief Initilisation of simpified HMAC_DRBG (never reseeds).
+ * (For use with deterministic ECDSA.)
+ *
+ * \param ctx HMAC_DRBG context to be initialised
+ * \param md_info MD algorithm to use for HMAC_DRBG
+ * \param data Concatenation of entropy string and additional data
+ * \param data_len Length of data in bytes
+ *
+ * \return 0 if successful, or
+ * MBEDTLS_ERR_MD_BAD_INPUT_DATA, or
+ * MBEDTLS_ERR_MD_ALLOC_FAILED.
+ */
+int mbedtls_hmac_drbg_seed_buf( mbedtls_hmac_drbg_context *ctx,
+ const mbedtls_md_info_t * md_info,
+ const unsigned char *data, size_t data_len );
+
+/**
+ * \brief Enable / disable prediction resistance (Default: Off)
+ *
+ * Note: If enabled, entropy is used for ctx->entropy_len before each call!
+ * Only use this if you have ample supply of good entropy!
+ *
+ * \param ctx HMAC_DRBG context
+ * \param resistance MBEDTLS_HMAC_DRBG_PR_ON or MBEDTLS_HMAC_DRBG_PR_OFF
+ */
+void mbedtls_hmac_drbg_set_prediction_resistance( mbedtls_hmac_drbg_context *ctx,
+ int resistance );
+
+/**
+ * \brief Set the amount of entropy grabbed on each reseed
+ * (Default: given by the security strength, which
+ * depends on the hash used, see \c mbedtls_hmac_drbg_init() )
+ *
+ * \param ctx HMAC_DRBG context
+ * \param len Amount of entropy to grab, in bytes
+ */
+void mbedtls_hmac_drbg_set_entropy_len( mbedtls_hmac_drbg_context *ctx,
+ size_t len );
+
+/**
+ * \brief Set the reseed interval
+ * (Default: MBEDTLS_HMAC_DRBG_RESEED_INTERVAL)
+ *
+ * \param ctx HMAC_DRBG context
+ * \param interval Reseed interval
+ */
+void mbedtls_hmac_drbg_set_reseed_interval( mbedtls_hmac_drbg_context *ctx,
+ int interval );
+
+/**
+ * \brief HMAC_DRBG update state
+ *
+ * \param ctx HMAC_DRBG context
+ * \param additional Additional data to update state with, or NULL
+ * \param add_len Length of additional data, or 0
+ *
+ * \return \c 0 on success, or an error from the underlying
+ * hash calculation.
+ *
+ * \note Additional data is optional, pass NULL and 0 as second
+ * third argument if no additional data is being used.
+ */
+int mbedtls_hmac_drbg_update_ret( mbedtls_hmac_drbg_context *ctx,
+ const unsigned char *additional, size_t add_len );
+
+/**
+ * \brief HMAC_DRBG reseeding (extracts data from entropy source)
+ *
+ * \param ctx HMAC_DRBG context
+ * \param additional Additional data to add to state (Can be NULL)
+ * \param len Length of additional data
+ *
+ * \return 0 if successful, or
+ * MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED
+ */
+int mbedtls_hmac_drbg_reseed( mbedtls_hmac_drbg_context *ctx,
+ const unsigned char *additional, size_t len );
+
+/**
+ * \brief HMAC_DRBG generate random with additional update input
+ *
+ * Note: Automatically reseeds if reseed_counter is reached or PR is enabled.
+ *
+ * \param p_rng HMAC_DRBG context
+ * \param output Buffer to fill
+ * \param output_len Length of the buffer
+ * \param additional Additional data to update with (can be NULL)
+ * \param add_len Length of additional data (can be 0)
+ *
+ * \return 0 if successful, or
+ * MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED, or
+ * MBEDTLS_ERR_HMAC_DRBG_REQUEST_TOO_BIG, or
+ * MBEDTLS_ERR_HMAC_DRBG_INPUT_TOO_BIG.
+ */
+int mbedtls_hmac_drbg_random_with_add( void *p_rng,
+ unsigned char *output, size_t output_len,
+ const unsigned char *additional,
+ size_t add_len );
+
+/**
+ * \brief HMAC_DRBG generate random
+ *
+ * Note: Automatically reseeds if reseed_counter is reached or PR is enabled.
+ *
+ * \param p_rng HMAC_DRBG context
+ * \param output Buffer to fill
+ * \param out_len Length of the buffer
+ *
+ * \return 0 if successful, or
+ * MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED, or
+ * MBEDTLS_ERR_HMAC_DRBG_REQUEST_TOO_BIG
+ */
+int mbedtls_hmac_drbg_random( void *p_rng, unsigned char *output, size_t out_len );
+
+/**
+ * \brief Free an HMAC_DRBG context
+ *
+ * \param ctx HMAC_DRBG context to free.
+ */
+void mbedtls_hmac_drbg_free( mbedtls_hmac_drbg_context *ctx );
+
+#if ! defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief HMAC_DRBG update state
+ *
+ * \deprecated Superseded by mbedtls_hmac_drbg_update_ret()
+ * in 2.16.0.
+ *
+ * \param ctx HMAC_DRBG context
+ * \param additional Additional data to update state with, or NULL
+ * \param add_len Length of additional data, or 0
+ *
+ * \note Additional data is optional, pass NULL and 0 as second
+ * third argument if no additional data is being used.
+ */
+MBEDTLS_DEPRECATED void mbedtls_hmac_drbg_update(
+ mbedtls_hmac_drbg_context *ctx,
+ const unsigned char *additional, size_t add_len );
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+#if defined(MBEDTLS_FS_IO)
+/**
+ * \brief Write a seed file
+ *
+ * \param ctx HMAC_DRBG context
+ * \param path Name of the file
+ *
+ * \return 0 if successful, 1 on file error, or
+ * MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED
+ */
+int mbedtls_hmac_drbg_write_seed_file( mbedtls_hmac_drbg_context *ctx, const char *path );
+
+/**
+ * \brief Read and update a seed file. Seed is added to this
+ * instance
+ *
+ * \param ctx HMAC_DRBG context
+ * \param path Name of the file
+ *
+ * \return 0 if successful, 1 on file error,
+ * MBEDTLS_ERR_HMAC_DRBG_ENTROPY_SOURCE_FAILED or
+ * MBEDTLS_ERR_HMAC_DRBG_INPUT_TOO_BIG
+ */
+int mbedtls_hmac_drbg_update_seed_file( mbedtls_hmac_drbg_context *ctx, const char *path );
+#endif /* MBEDTLS_FS_IO */
+
+
+#if defined(MBEDTLS_SELF_TEST)
+/**
+ * \brief Checkup routine
+ *
+ * \return 0 if successful, or 1 if the test failed
+ */
+int mbedtls_hmac_drbg_self_test( int verbose );
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* hmac_drbg.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/md.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/md.h
new file mode 100644
index 0000000..8bcf766
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/md.h
@@ -0,0 +1,468 @@
+ /**
+ * \file md.h
+ *
+ * \brief This file contains the generic message-digest wrapper.
+ *
+ * \author Adriaan de Jong <dejong@fox-it.com>
+ */
+/*
+ * Copyright (C) 2006-2018, Arm Limited (or its affiliates), All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of Mbed TLS (https://tls.mbed.org)
+ */
+
+#ifndef MBEDTLS_MD_H
+#define MBEDTLS_MD_H
+
+#include <stddef.h>
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#define MBEDTLS_ERR_MD_FEATURE_UNAVAILABLE -0x5080 /**< The selected feature is not available. */
+#define MBEDTLS_ERR_MD_BAD_INPUT_DATA -0x5100 /**< Bad input parameters to function. */
+#define MBEDTLS_ERR_MD_ALLOC_FAILED -0x5180 /**< Failed to allocate memory. */
+#define MBEDTLS_ERR_MD_FILE_IO_ERROR -0x5200 /**< Opening or reading of file failed. */
+
+/* MBEDTLS_ERR_MD_HW_ACCEL_FAILED is deprecated and should not be used. */
+#define MBEDTLS_ERR_MD_HW_ACCEL_FAILED -0x5280 /**< MD hardware accelerator failed. */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief Supported message digests.
+ *
+ * \warning MD2, MD4, MD5 and SHA-1 are considered weak message digests and
+ * their use constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+typedef enum {
+ MBEDTLS_MD_NONE=0, /**< None. */
+ MBEDTLS_MD_MD2, /**< The MD2 message digest. */
+ MBEDTLS_MD_MD4, /**< The MD4 message digest. */
+ MBEDTLS_MD_MD5, /**< The MD5 message digest. */
+ MBEDTLS_MD_SHA1, /**< The SHA-1 message digest. */
+ MBEDTLS_MD_SHA224, /**< The SHA-224 message digest. */
+ MBEDTLS_MD_SHA256, /**< The SHA-256 message digest. */
+ MBEDTLS_MD_SHA384, /**< The SHA-384 message digest. */
+ MBEDTLS_MD_SHA512, /**< The SHA-512 message digest. */
+ MBEDTLS_MD_RIPEMD160, /**< The RIPEMD-160 message digest. */
+} mbedtls_md_type_t;
+
+#if defined(MBEDTLS_SHA512_C)
+#define MBEDTLS_MD_MAX_SIZE 64 /* longest known is SHA512 */
+#else
+#define MBEDTLS_MD_MAX_SIZE 32 /* longest known is SHA256 or less */
+#endif
+
+/**
+ * Opaque struct defined in md_internal.h.
+ */
+typedef struct mbedtls_md_info_t mbedtls_md_info_t;
+
+/**
+ * The generic message-digest context.
+ */
+typedef struct mbedtls_md_context_t
+{
+ /** Information about the associated message digest. */
+ const mbedtls_md_info_t *md_info;
+
+ /** The digest-specific context. */
+ void *md_ctx;
+
+ /** The HMAC part of the context. */
+ void *hmac_ctx;
+} mbedtls_md_context_t;
+
+/**
+ * \brief This function returns the list of digests supported by the
+ * generic digest module.
+ *
+ * \return A statically allocated array of digests. Each element
+ * in the returned list is an integer belonging to the
+ * message-digest enumeration #mbedtls_md_type_t.
+ * The last entry is 0.
+ */
+const int *mbedtls_md_list( void );
+
+/**
+ * \brief This function returns the message-digest information
+ * associated with the given digest name.
+ *
+ * \param md_name The name of the digest to search for.
+ *
+ * \return The message-digest information associated with \p md_name.
+ * \return NULL if the associated message-digest information is not found.
+ */
+const mbedtls_md_info_t *mbedtls_md_info_from_string( const char *md_name );
+
+/**
+ * \brief This function returns the message-digest information
+ * associated with the given digest type.
+ *
+ * \param md_type The type of digest to search for.
+ *
+ * \return The message-digest information associated with \p md_type.
+ * \return NULL if the associated message-digest information is not found.
+ */
+const mbedtls_md_info_t *mbedtls_md_info_from_type( mbedtls_md_type_t md_type );
+
+/**
+ * \brief This function initializes a message-digest context without
+ * binding it to a particular message-digest algorithm.
+ *
+ * This function should always be called first. It prepares the
+ * context for mbedtls_md_setup() for binding it to a
+ * message-digest algorithm.
+ */
+void mbedtls_md_init( mbedtls_md_context_t *ctx );
+
+/**
+ * \brief This function clears the internal structure of \p ctx and
+ * frees any embedded internal structure, but does not free
+ * \p ctx itself.
+ *
+ * If you have called mbedtls_md_setup() on \p ctx, you must
+ * call mbedtls_md_free() when you are no longer using the
+ * context.
+ * Calling this function if you have previously
+ * called mbedtls_md_init() and nothing else is optional.
+ * You must not call this function if you have not called
+ * mbedtls_md_init().
+ */
+void mbedtls_md_free( mbedtls_md_context_t *ctx );
+
+#if ! defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief This function selects the message digest algorithm to use,
+ * and allocates internal structures.
+ *
+ * It should be called after mbedtls_md_init() or mbedtls_md_free().
+ * Makes it necessary to call mbedtls_md_free() later.
+ *
+ * \deprecated Superseded by mbedtls_md_setup() in 2.0.0
+ *
+ * \param ctx The context to set up.
+ * \param md_info The information structure of the message-digest algorithm
+ * to use.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
+ * failure.
+ * \return #MBEDTLS_ERR_MD_ALLOC_FAILED on memory-allocation failure.
+ */
+int mbedtls_md_init_ctx( mbedtls_md_context_t *ctx, const mbedtls_md_info_t *md_info ) MBEDTLS_DEPRECATED;
+#undef MBEDTLS_DEPRECATED
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+
+/**
+ * \brief This function selects the message digest algorithm to use,
+ * and allocates internal structures.
+ *
+ * It should be called after mbedtls_md_init() or
+ * mbedtls_md_free(). Makes it necessary to call
+ * mbedtls_md_free() later.
+ *
+ * \param ctx The context to set up.
+ * \param md_info The information structure of the message-digest algorithm
+ * to use.
+ * \param hmac Defines if HMAC is used. 0: HMAC is not used (saves some memory),
+ * or non-zero: HMAC is used with this context.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
+ * failure.
+ * \return #MBEDTLS_ERR_MD_ALLOC_FAILED on memory-allocation failure.
+ */
+int mbedtls_md_setup( mbedtls_md_context_t *ctx, const mbedtls_md_info_t *md_info, int hmac );
+
+/**
+ * \brief This function clones the state of an message-digest
+ * context.
+ *
+ * \note You must call mbedtls_md_setup() on \c dst before calling
+ * this function.
+ *
+ * \note The two contexts must have the same type,
+ * for example, both are SHA-256.
+ *
+ * \warning This function clones the message-digest state, not the
+ * HMAC state.
+ *
+ * \param dst The destination context.
+ * \param src The context to be cloned.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification failure.
+ */
+int mbedtls_md_clone( mbedtls_md_context_t *dst,
+ const mbedtls_md_context_t *src );
+
+/**
+ * \brief This function extracts the message-digest size from the
+ * message-digest information structure.
+ *
+ * \param md_info The information structure of the message-digest algorithm
+ * to use.
+ *
+ * \return The size of the message-digest output in Bytes.
+ */
+unsigned char mbedtls_md_get_size( const mbedtls_md_info_t *md_info );
+
+/**
+ * \brief This function extracts the message-digest type from the
+ * message-digest information structure.
+ *
+ * \param md_info The information structure of the message-digest algorithm
+ * to use.
+ *
+ * \return The type of the message digest.
+ */
+mbedtls_md_type_t mbedtls_md_get_type( const mbedtls_md_info_t *md_info );
+
+/**
+ * \brief This function extracts the message-digest name from the
+ * message-digest information structure.
+ *
+ * \param md_info The information structure of the message-digest algorithm
+ * to use.
+ *
+ * \return The name of the message digest.
+ */
+const char *mbedtls_md_get_name( const mbedtls_md_info_t *md_info );
+
+/**
+ * \brief This function starts a message-digest computation.
+ *
+ * You must call this function after setting up the context
+ * with mbedtls_md_setup(), and before passing data with
+ * mbedtls_md_update().
+ *
+ * \param ctx The generic message-digest context.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
+ * failure.
+ */
+int mbedtls_md_starts( mbedtls_md_context_t *ctx );
+
+/**
+ * \brief This function feeds an input buffer into an ongoing
+ * message-digest computation.
+ *
+ * You must call mbedtls_md_starts() before calling this
+ * function. You may call this function multiple times.
+ * Afterwards, call mbedtls_md_finish().
+ *
+ * \param ctx The generic message-digest context.
+ * \param input The buffer holding the input data.
+ * \param ilen The length of the input data.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
+ * failure.
+ */
+int mbedtls_md_update( mbedtls_md_context_t *ctx, const unsigned char *input, size_t ilen );
+
+/**
+ * \brief This function finishes the digest operation,
+ * and writes the result to the output buffer.
+ *
+ * Call this function after a call to mbedtls_md_starts(),
+ * followed by any number of calls to mbedtls_md_update().
+ * Afterwards, you may either clear the context with
+ * mbedtls_md_free(), or call mbedtls_md_starts() to reuse
+ * the context for another digest operation with the same
+ * algorithm.
+ *
+ * \param ctx The generic message-digest context.
+ * \param output The buffer for the generic message-digest checksum result.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
+ * failure.
+ */
+int mbedtls_md_finish( mbedtls_md_context_t *ctx, unsigned char *output );
+
+/**
+ * \brief This function calculates the message-digest of a buffer,
+ * with respect to a configurable message-digest algorithm
+ * in a single call.
+ *
+ * The result is calculated as
+ * Output = message_digest(input buffer).
+ *
+ * \param md_info The information structure of the message-digest algorithm
+ * to use.
+ * \param input The buffer holding the data.
+ * \param ilen The length of the input data.
+ * \param output The generic message-digest checksum result.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
+ * failure.
+ */
+int mbedtls_md( const mbedtls_md_info_t *md_info, const unsigned char *input, size_t ilen,
+ unsigned char *output );
+
+#if defined(MBEDTLS_FS_IO)
+/**
+ * \brief This function calculates the message-digest checksum
+ * result of the contents of the provided file.
+ *
+ * The result is calculated as
+ * Output = message_digest(file contents).
+ *
+ * \param md_info The information structure of the message-digest algorithm
+ * to use.
+ * \param path The input file name.
+ * \param output The generic message-digest checksum result.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_MD_FILE_IO_ERROR on an I/O error accessing
+ * the file pointed by \p path.
+ * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA if \p md_info was NULL.
+ */
+int mbedtls_md_file( const mbedtls_md_info_t *md_info, const char *path,
+ unsigned char *output );
+#endif /* MBEDTLS_FS_IO */
+
+/**
+ * \brief This function sets the HMAC key and prepares to
+ * authenticate a new message.
+ *
+ * Call this function after mbedtls_md_setup(), to use
+ * the MD context for an HMAC calculation, then call
+ * mbedtls_md_hmac_update() to provide the input data, and
+ * mbedtls_md_hmac_finish() to get the HMAC value.
+ *
+ * \param ctx The message digest context containing an embedded HMAC
+ * context.
+ * \param key The HMAC secret key.
+ * \param keylen The length of the HMAC key in Bytes.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
+ * failure.
+ */
+int mbedtls_md_hmac_starts( mbedtls_md_context_t *ctx, const unsigned char *key,
+ size_t keylen );
+
+/**
+ * \brief This function feeds an input buffer into an ongoing HMAC
+ * computation.
+ *
+ * Call mbedtls_md_hmac_starts() or mbedtls_md_hmac_reset()
+ * before calling this function.
+ * You may call this function multiple times to pass the
+ * input piecewise.
+ * Afterwards, call mbedtls_md_hmac_finish().
+ *
+ * \param ctx The message digest context containing an embedded HMAC
+ * context.
+ * \param input The buffer holding the input data.
+ * \param ilen The length of the input data.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
+ * failure.
+ */
+int mbedtls_md_hmac_update( mbedtls_md_context_t *ctx, const unsigned char *input,
+ size_t ilen );
+
+/**
+ * \brief This function finishes the HMAC operation, and writes
+ * the result to the output buffer.
+ *
+ * Call this function after mbedtls_md_hmac_starts() and
+ * mbedtls_md_hmac_update() to get the HMAC value. Afterwards
+ * you may either call mbedtls_md_free() to clear the context,
+ * or call mbedtls_md_hmac_reset() to reuse the context with
+ * the same HMAC key.
+ *
+ * \param ctx The message digest context containing an embedded HMAC
+ * context.
+ * \param output The generic HMAC checksum result.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
+ * failure.
+ */
+int mbedtls_md_hmac_finish( mbedtls_md_context_t *ctx, unsigned char *output);
+
+/**
+ * \brief This function prepares to authenticate a new message with
+ * the same key as the previous HMAC operation.
+ *
+ * You may call this function after mbedtls_md_hmac_finish().
+ * Afterwards call mbedtls_md_hmac_update() to pass the new
+ * input.
+ *
+ * \param ctx The message digest context containing an embedded HMAC
+ * context.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
+ * failure.
+ */
+int mbedtls_md_hmac_reset( mbedtls_md_context_t *ctx );
+
+/**
+ * \brief This function calculates the full generic HMAC
+ * on the input buffer with the provided key.
+ *
+ * The function allocates the context, performs the
+ * calculation, and frees the context.
+ *
+ * The HMAC result is calculated as
+ * output = generic HMAC(hmac key, input buffer).
+ *
+ * \param md_info The information structure of the message-digest algorithm
+ * to use.
+ * \param key The HMAC secret key.
+ * \param keylen The length of the HMAC secret key in Bytes.
+ * \param input The buffer holding the input data.
+ * \param ilen The length of the input data.
+ * \param output The generic HMAC result.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_MD_BAD_INPUT_DATA on parameter-verification
+ * failure.
+ */
+int mbedtls_md_hmac( const mbedtls_md_info_t *md_info, const unsigned char *key, size_t keylen,
+ const unsigned char *input, size_t ilen,
+ unsigned char *output );
+
+/* Internal use */
+int mbedtls_md_process( mbedtls_md_context_t *ctx, const unsigned char *data );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_MD_H */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/md2.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/md2.h
new file mode 100644
index 0000000..fe97cf0
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/md2.h
@@ -0,0 +1,306 @@
+/**
+ * \file md2.h
+ *
+ * \brief MD2 message digest algorithm (hash function)
+ *
+ * \warning MD2 is considered a weak message digest and its use constitutes a
+ * security risk. We recommend considering stronger message digests
+ * instead.
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ *
+ */
+#ifndef MBEDTLS_MD2_H
+#define MBEDTLS_MD2_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+
+/* MBEDTLS_ERR_MD2_HW_ACCEL_FAILED is deprecated and should not be used. */
+#define MBEDTLS_ERR_MD2_HW_ACCEL_FAILED -0x002B /**< MD2 hardware accelerator failed */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_MD2_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief MD2 context structure
+ *
+ * \warning MD2 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+typedef struct mbedtls_md2_context
+{
+ unsigned char cksum[16]; /*!< checksum of the data block */
+ unsigned char state[48]; /*!< intermediate digest state */
+ unsigned char buffer[16]; /*!< data block being processed */
+ size_t left; /*!< amount of data in buffer */
+}
+mbedtls_md2_context;
+
+#else /* MBEDTLS_MD2_ALT */
+#include "md2_alt.h"
+#endif /* MBEDTLS_MD2_ALT */
+
+/**
+ * \brief Initialize MD2 context
+ *
+ * \param ctx MD2 context to be initialized
+ *
+ * \warning MD2 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+void mbedtls_md2_init( mbedtls_md2_context *ctx );
+
+/**
+ * \brief Clear MD2 context
+ *
+ * \param ctx MD2 context to be cleared
+ *
+ * \warning MD2 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+void mbedtls_md2_free( mbedtls_md2_context *ctx );
+
+/**
+ * \brief Clone (the state of) an MD2 context
+ *
+ * \param dst The destination context
+ * \param src The context to be cloned
+ *
+ * \warning MD2 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+void mbedtls_md2_clone( mbedtls_md2_context *dst,
+ const mbedtls_md2_context *src );
+
+/**
+ * \brief MD2 context setup
+ *
+ * \param ctx context to be initialized
+ *
+ * \return 0 if successful
+ *
+ * \warning MD2 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+int mbedtls_md2_starts_ret( mbedtls_md2_context *ctx );
+
+/**
+ * \brief MD2 process buffer
+ *
+ * \param ctx MD2 context
+ * \param input buffer holding the data
+ * \param ilen length of the input data
+ *
+ * \return 0 if successful
+ *
+ * \warning MD2 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+int mbedtls_md2_update_ret( mbedtls_md2_context *ctx,
+ const unsigned char *input,
+ size_t ilen );
+
+/**
+ * \brief MD2 final digest
+ *
+ * \param ctx MD2 context
+ * \param output MD2 checksum result
+ *
+ * \return 0 if successful
+ *
+ * \warning MD2 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+int mbedtls_md2_finish_ret( mbedtls_md2_context *ctx,
+ unsigned char output[16] );
+
+/**
+ * \brief MD2 process data block (internal use only)
+ *
+ * \param ctx MD2 context
+ *
+ * \return 0 if successful
+ *
+ * \warning MD2 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+int mbedtls_internal_md2_process( mbedtls_md2_context *ctx );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief MD2 context setup
+ *
+ * \deprecated Superseded by mbedtls_md2_starts_ret() in 2.7.0
+ *
+ * \param ctx context to be initialized
+ *
+ * \warning MD2 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md2_starts( mbedtls_md2_context *ctx );
+
+/**
+ * \brief MD2 process buffer
+ *
+ * \deprecated Superseded by mbedtls_md2_update_ret() in 2.7.0
+ *
+ * \param ctx MD2 context
+ * \param input buffer holding the data
+ * \param ilen length of the input data
+ *
+ * \warning MD2 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md2_update( mbedtls_md2_context *ctx,
+ const unsigned char *input,
+ size_t ilen );
+
+/**
+ * \brief MD2 final digest
+ *
+ * \deprecated Superseded by mbedtls_md2_finish_ret() in 2.7.0
+ *
+ * \param ctx MD2 context
+ * \param output MD2 checksum result
+ *
+ * \warning MD2 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md2_finish( mbedtls_md2_context *ctx,
+ unsigned char output[16] );
+
+/**
+ * \brief MD2 process data block (internal use only)
+ *
+ * \deprecated Superseded by mbedtls_internal_md2_process() in 2.7.0
+ *
+ * \param ctx MD2 context
+ *
+ * \warning MD2 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md2_process( mbedtls_md2_context *ctx );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+/**
+ * \brief Output = MD2( input buffer )
+ *
+ * \param input buffer holding the data
+ * \param ilen length of the input data
+ * \param output MD2 checksum result
+ *
+ * \warning MD2 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+int mbedtls_md2_ret( const unsigned char *input,
+ size_t ilen,
+ unsigned char output[16] );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief Output = MD2( input buffer )
+ *
+ * \deprecated Superseded by mbedtls_md2_ret() in 2.7.0
+ *
+ * \param input buffer holding the data
+ * \param ilen length of the input data
+ * \param output MD2 checksum result
+ *
+ * \warning MD2 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md2( const unsigned char *input,
+ size_t ilen,
+ unsigned char output[16] );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief Checkup routine
+ *
+ * \return 0 if successful, or 1 if the test failed
+ *
+ * \warning MD2 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+int mbedtls_md2_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* mbedtls_md2.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/md4.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/md4.h
new file mode 100644
index 0000000..ce703c0
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/md4.h
@@ -0,0 +1,311 @@
+/**
+ * \file md4.h
+ *
+ * \brief MD4 message digest algorithm (hash function)
+ *
+ * \warning MD4 is considered a weak message digest and its use constitutes a
+ * security risk. We recommend considering stronger message digests
+ * instead.
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ *
+ */
+#ifndef MBEDTLS_MD4_H
+#define MBEDTLS_MD4_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+
+/* MBEDTLS_ERR_MD4_HW_ACCEL_FAILED is deprecated and should not be used. */
+#define MBEDTLS_ERR_MD4_HW_ACCEL_FAILED -0x002D /**< MD4 hardware accelerator failed */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_MD4_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief MD4 context structure
+ *
+ * \warning MD4 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+typedef struct mbedtls_md4_context
+{
+ uint32_t total[2]; /*!< number of bytes processed */
+ uint32_t state[4]; /*!< intermediate digest state */
+ unsigned char buffer[64]; /*!< data block being processed */
+}
+mbedtls_md4_context;
+
+#else /* MBEDTLS_MD4_ALT */
+#include "md4_alt.h"
+#endif /* MBEDTLS_MD4_ALT */
+
+/**
+ * \brief Initialize MD4 context
+ *
+ * \param ctx MD4 context to be initialized
+ *
+ * \warning MD4 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+void mbedtls_md4_init( mbedtls_md4_context *ctx );
+
+/**
+ * \brief Clear MD4 context
+ *
+ * \param ctx MD4 context to be cleared
+ *
+ * \warning MD4 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+void mbedtls_md4_free( mbedtls_md4_context *ctx );
+
+/**
+ * \brief Clone (the state of) an MD4 context
+ *
+ * \param dst The destination context
+ * \param src The context to be cloned
+ *
+ * \warning MD4 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+void mbedtls_md4_clone( mbedtls_md4_context *dst,
+ const mbedtls_md4_context *src );
+
+/**
+ * \brief MD4 context setup
+ *
+ * \param ctx context to be initialized
+ *
+ * \return 0 if successful
+ *
+ * \warning MD4 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ */
+int mbedtls_md4_starts_ret( mbedtls_md4_context *ctx );
+
+/**
+ * \brief MD4 process buffer
+ *
+ * \param ctx MD4 context
+ * \param input buffer holding the data
+ * \param ilen length of the input data
+ *
+ * \return 0 if successful
+ *
+ * \warning MD4 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+int mbedtls_md4_update_ret( mbedtls_md4_context *ctx,
+ const unsigned char *input,
+ size_t ilen );
+
+/**
+ * \brief MD4 final digest
+ *
+ * \param ctx MD4 context
+ * \param output MD4 checksum result
+ *
+ * \return 0 if successful
+ *
+ * \warning MD4 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+int mbedtls_md4_finish_ret( mbedtls_md4_context *ctx,
+ unsigned char output[16] );
+
+/**
+ * \brief MD4 process data block (internal use only)
+ *
+ * \param ctx MD4 context
+ * \param data buffer holding one block of data
+ *
+ * \return 0 if successful
+ *
+ * \warning MD4 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+int mbedtls_internal_md4_process( mbedtls_md4_context *ctx,
+ const unsigned char data[64] );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief MD4 context setup
+ *
+ * \deprecated Superseded by mbedtls_md4_starts_ret() in 2.7.0
+ *
+ * \param ctx context to be initialized
+ *
+ * \warning MD4 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md4_starts( mbedtls_md4_context *ctx );
+
+/**
+ * \brief MD4 process buffer
+ *
+ * \deprecated Superseded by mbedtls_md4_update_ret() in 2.7.0
+ *
+ * \param ctx MD4 context
+ * \param input buffer holding the data
+ * \param ilen length of the input data
+ *
+ * \warning MD4 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md4_update( mbedtls_md4_context *ctx,
+ const unsigned char *input,
+ size_t ilen );
+
+/**
+ * \brief MD4 final digest
+ *
+ * \deprecated Superseded by mbedtls_md4_finish_ret() in 2.7.0
+ *
+ * \param ctx MD4 context
+ * \param output MD4 checksum result
+ *
+ * \warning MD4 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md4_finish( mbedtls_md4_context *ctx,
+ unsigned char output[16] );
+
+/**
+ * \brief MD4 process data block (internal use only)
+ *
+ * \deprecated Superseded by mbedtls_internal_md4_process() in 2.7.0
+ *
+ * \param ctx MD4 context
+ * \param data buffer holding one block of data
+ *
+ * \warning MD4 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md4_process( mbedtls_md4_context *ctx,
+ const unsigned char data[64] );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+/**
+ * \brief Output = MD4( input buffer )
+ *
+ * \param input buffer holding the data
+ * \param ilen length of the input data
+ * \param output MD4 checksum result
+ *
+ * \return 0 if successful
+ *
+ * \warning MD4 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+int mbedtls_md4_ret( const unsigned char *input,
+ size_t ilen,
+ unsigned char output[16] );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief Output = MD4( input buffer )
+ *
+ * \deprecated Superseded by mbedtls_md4_ret() in 2.7.0
+ *
+ * \param input buffer holding the data
+ * \param ilen length of the input data
+ * \param output MD4 checksum result
+ *
+ * \warning MD4 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md4( const unsigned char *input,
+ size_t ilen,
+ unsigned char output[16] );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief Checkup routine
+ *
+ * \return 0 if successful, or 1 if the test failed
+ *
+ * \warning MD4 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+int mbedtls_md4_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* mbedtls_md4.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/md5.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/md5.h
new file mode 100644
index 0000000..6eed6cc
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/md5.h
@@ -0,0 +1,311 @@
+/**
+ * \file md5.h
+ *
+ * \brief MD5 message digest algorithm (hash function)
+ *
+ * \warning MD5 is considered a weak message digest and its use constitutes a
+ * security risk. We recommend considering stronger message
+ * digests instead.
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_MD5_H
+#define MBEDTLS_MD5_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+
+/* MBEDTLS_ERR_MD5_HW_ACCEL_FAILED is deprecated and should not be used. */
+#define MBEDTLS_ERR_MD5_HW_ACCEL_FAILED -0x002F /**< MD5 hardware accelerator failed */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_MD5_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief MD5 context structure
+ *
+ * \warning MD5 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+typedef struct mbedtls_md5_context
+{
+ uint32_t total[2]; /*!< number of bytes processed */
+ uint32_t state[4]; /*!< intermediate digest state */
+ unsigned char buffer[64]; /*!< data block being processed */
+}
+mbedtls_md5_context;
+
+#else /* MBEDTLS_MD5_ALT */
+#include "md5_alt.h"
+#endif /* MBEDTLS_MD5_ALT */
+
+/**
+ * \brief Initialize MD5 context
+ *
+ * \param ctx MD5 context to be initialized
+ *
+ * \warning MD5 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+void mbedtls_md5_init( mbedtls_md5_context *ctx );
+
+/**
+ * \brief Clear MD5 context
+ *
+ * \param ctx MD5 context to be cleared
+ *
+ * \warning MD5 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+void mbedtls_md5_free( mbedtls_md5_context *ctx );
+
+/**
+ * \brief Clone (the state of) an MD5 context
+ *
+ * \param dst The destination context
+ * \param src The context to be cloned
+ *
+ * \warning MD5 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+void mbedtls_md5_clone( mbedtls_md5_context *dst,
+ const mbedtls_md5_context *src );
+
+/**
+ * \brief MD5 context setup
+ *
+ * \param ctx context to be initialized
+ *
+ * \return 0 if successful
+ *
+ * \warning MD5 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+int mbedtls_md5_starts_ret( mbedtls_md5_context *ctx );
+
+/**
+ * \brief MD5 process buffer
+ *
+ * \param ctx MD5 context
+ * \param input buffer holding the data
+ * \param ilen length of the input data
+ *
+ * \return 0 if successful
+ *
+ * \warning MD5 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+int mbedtls_md5_update_ret( mbedtls_md5_context *ctx,
+ const unsigned char *input,
+ size_t ilen );
+
+/**
+ * \brief MD5 final digest
+ *
+ * \param ctx MD5 context
+ * \param output MD5 checksum result
+ *
+ * \return 0 if successful
+ *
+ * \warning MD5 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+int mbedtls_md5_finish_ret( mbedtls_md5_context *ctx,
+ unsigned char output[16] );
+
+/**
+ * \brief MD5 process data block (internal use only)
+ *
+ * \param ctx MD5 context
+ * \param data buffer holding one block of data
+ *
+ * \return 0 if successful
+ *
+ * \warning MD5 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+int mbedtls_internal_md5_process( mbedtls_md5_context *ctx,
+ const unsigned char data[64] );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief MD5 context setup
+ *
+ * \deprecated Superseded by mbedtls_md5_starts_ret() in 2.7.0
+ *
+ * \param ctx context to be initialized
+ *
+ * \warning MD5 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md5_starts( mbedtls_md5_context *ctx );
+
+/**
+ * \brief MD5 process buffer
+ *
+ * \deprecated Superseded by mbedtls_md5_update_ret() in 2.7.0
+ *
+ * \param ctx MD5 context
+ * \param input buffer holding the data
+ * \param ilen length of the input data
+ *
+ * \warning MD5 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md5_update( mbedtls_md5_context *ctx,
+ const unsigned char *input,
+ size_t ilen );
+
+/**
+ * \brief MD5 final digest
+ *
+ * \deprecated Superseded by mbedtls_md5_finish_ret() in 2.7.0
+ *
+ * \param ctx MD5 context
+ * \param output MD5 checksum result
+ *
+ * \warning MD5 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md5_finish( mbedtls_md5_context *ctx,
+ unsigned char output[16] );
+
+/**
+ * \brief MD5 process data block (internal use only)
+ *
+ * \deprecated Superseded by mbedtls_internal_md5_process() in 2.7.0
+ *
+ * \param ctx MD5 context
+ * \param data buffer holding one block of data
+ *
+ * \warning MD5 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md5_process( mbedtls_md5_context *ctx,
+ const unsigned char data[64] );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+/**
+ * \brief Output = MD5( input buffer )
+ *
+ * \param input buffer holding the data
+ * \param ilen length of the input data
+ * \param output MD5 checksum result
+ *
+ * \return 0 if successful
+ *
+ * \warning MD5 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+int mbedtls_md5_ret( const unsigned char *input,
+ size_t ilen,
+ unsigned char output[16] );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief Output = MD5( input buffer )
+ *
+ * \deprecated Superseded by mbedtls_md5_ret() in 2.7.0
+ *
+ * \param input buffer holding the data
+ * \param ilen length of the input data
+ * \param output MD5 checksum result
+ *
+ * \warning MD5 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_md5( const unsigned char *input,
+ size_t ilen,
+ unsigned char output[16] );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief Checkup routine
+ *
+ * \return 0 if successful, or 1 if the test failed
+ *
+ * \warning MD5 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+int mbedtls_md5_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* mbedtls_md5.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/md_internal.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/md_internal.h
new file mode 100644
index 0000000..04de482
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/md_internal.h
@@ -0,0 +1,115 @@
+/**
+ * \file md_internal.h
+ *
+ * \brief Message digest wrappers.
+ *
+ * \warning This in an internal header. Do not include directly.
+ *
+ * \author Adriaan de Jong <dejong@fox-it.com>
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_MD_WRAP_H
+#define MBEDTLS_MD_WRAP_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "md.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Message digest information.
+ * Allows message digest functions to be called in a generic way.
+ */
+struct mbedtls_md_info_t
+{
+ /** Digest identifier */
+ mbedtls_md_type_t type;
+
+ /** Name of the message digest */
+ const char * name;
+
+ /** Output length of the digest function in bytes */
+ int size;
+
+ /** Block length of the digest function in bytes */
+ int block_size;
+
+ /** Digest initialisation function */
+ int (*starts_func)( void *ctx );
+
+ /** Digest update function */
+ int (*update_func)( void *ctx, const unsigned char *input, size_t ilen );
+
+ /** Digest finalisation function */
+ int (*finish_func)( void *ctx, unsigned char *output );
+
+ /** Generic digest function */
+ int (*digest_func)( const unsigned char *input, size_t ilen,
+ unsigned char *output );
+
+ /** Allocate a new context */
+ void * (*ctx_alloc_func)( void );
+
+ /** Free the given context */
+ void (*ctx_free_func)( void *ctx );
+
+ /** Clone state from a context */
+ void (*clone_func)( void *dst, const void *src );
+
+ /** Internal use only */
+ int (*process_func)( void *ctx, const unsigned char *input );
+};
+
+#if defined(MBEDTLS_MD2_C)
+extern const mbedtls_md_info_t mbedtls_md2_info;
+#endif
+#if defined(MBEDTLS_MD4_C)
+extern const mbedtls_md_info_t mbedtls_md4_info;
+#endif
+#if defined(MBEDTLS_MD5_C)
+extern const mbedtls_md_info_t mbedtls_md5_info;
+#endif
+#if defined(MBEDTLS_RIPEMD160_C)
+extern const mbedtls_md_info_t mbedtls_ripemd160_info;
+#endif
+#if defined(MBEDTLS_SHA1_C)
+extern const mbedtls_md_info_t mbedtls_sha1_info;
+#endif
+#if defined(MBEDTLS_SHA256_C)
+extern const mbedtls_md_info_t mbedtls_sha224_info;
+extern const mbedtls_md_info_t mbedtls_sha256_info;
+#endif
+#if defined(MBEDTLS_SHA512_C)
+extern const mbedtls_md_info_t mbedtls_sha384_info;
+extern const mbedtls_md_info_t mbedtls_sha512_info;
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_MD_WRAP_H */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/memory_buffer_alloc.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/memory_buffer_alloc.h
new file mode 100644
index 0000000..705f9a6
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/memory_buffer_alloc.h
@@ -0,0 +1,151 @@
+/**
+ * \file memory_buffer_alloc.h
+ *
+ * \brief Buffer-based memory allocator
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_MEMORY_BUFFER_ALLOC_H
+#define MBEDTLS_MEMORY_BUFFER_ALLOC_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+
+/**
+ * \name SECTION: Module settings
+ *
+ * The configuration options you can set for this module are in this section.
+ * Either change them in config.h or define them on the compiler command line.
+ * \{
+ */
+
+#if !defined(MBEDTLS_MEMORY_ALIGN_MULTIPLE)
+#define MBEDTLS_MEMORY_ALIGN_MULTIPLE 4 /**< Align on multiples of this value */
+#endif
+
+/* \} name SECTION: Module settings */
+
+#define MBEDTLS_MEMORY_VERIFY_NONE 0
+#define MBEDTLS_MEMORY_VERIFY_ALLOC (1 << 0)
+#define MBEDTLS_MEMORY_VERIFY_FREE (1 << 1)
+#define MBEDTLS_MEMORY_VERIFY_ALWAYS (MBEDTLS_MEMORY_VERIFY_ALLOC | MBEDTLS_MEMORY_VERIFY_FREE)
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief Initialize use of stack-based memory allocator.
+ * The stack-based allocator does memory management inside the
+ * presented buffer and does not call calloc() and free().
+ * It sets the global mbedtls_calloc() and mbedtls_free() pointers
+ * to its own functions.
+ * (Provided mbedtls_calloc() and mbedtls_free() are thread-safe if
+ * MBEDTLS_THREADING_C is defined)
+ *
+ * \note This code is not optimized and provides a straight-forward
+ * implementation of a stack-based memory allocator.
+ *
+ * \param buf buffer to use as heap
+ * \param len size of the buffer
+ */
+void mbedtls_memory_buffer_alloc_init( unsigned char *buf, size_t len );
+
+/**
+ * \brief Free the mutex for thread-safety and clear remaining memory
+ */
+void mbedtls_memory_buffer_alloc_free( void );
+
+/**
+ * \brief Determine when the allocator should automatically verify the state
+ * of the entire chain of headers / meta-data.
+ * (Default: MBEDTLS_MEMORY_VERIFY_NONE)
+ *
+ * \param verify One of MBEDTLS_MEMORY_VERIFY_NONE, MBEDTLS_MEMORY_VERIFY_ALLOC,
+ * MBEDTLS_MEMORY_VERIFY_FREE or MBEDTLS_MEMORY_VERIFY_ALWAYS
+ */
+void mbedtls_memory_buffer_set_verify( int verify );
+
+#if defined(MBEDTLS_MEMORY_DEBUG)
+/**
+ * \brief Print out the status of the allocated memory (primarily for use
+ * after a program should have de-allocated all memory)
+ * Prints out a list of 'still allocated' blocks and their stack
+ * trace if MBEDTLS_MEMORY_BACKTRACE is defined.
+ */
+void mbedtls_memory_buffer_alloc_status( void );
+
+/**
+ * \brief Get the peak heap usage so far
+ *
+ * \param max_used Peak number of bytes in use or committed. This
+ * includes bytes in allocated blocks too small to split
+ * into smaller blocks but larger than the requested size.
+ * \param max_blocks Peak number of blocks in use, including free and used
+ */
+void mbedtls_memory_buffer_alloc_max_get( size_t *max_used, size_t *max_blocks );
+
+/**
+ * \brief Reset peak statistics
+ */
+void mbedtls_memory_buffer_alloc_max_reset( void );
+
+/**
+ * \brief Get the current heap usage
+ *
+ * \param cur_used Current number of bytes in use or committed. This
+ * includes bytes in allocated blocks too small to split
+ * into smaller blocks but larger than the requested size.
+ * \param cur_blocks Current number of blocks in use, including free and used
+ */
+void mbedtls_memory_buffer_alloc_cur_get( size_t *cur_used, size_t *cur_blocks );
+#endif /* MBEDTLS_MEMORY_DEBUG */
+
+/**
+ * \brief Verifies that all headers in the memory buffer are correct
+ * and contain sane values. Helps debug buffer-overflow errors.
+ *
+ * Prints out first failure if MBEDTLS_MEMORY_DEBUG is defined.
+ * Prints out full header information if MBEDTLS_MEMORY_DEBUG
+ * is defined. (Includes stack trace information for each block if
+ * MBEDTLS_MEMORY_BACKTRACE is defined as well).
+ *
+ * \return 0 if verified, 1 otherwise
+ */
+int mbedtls_memory_buffer_alloc_verify( void );
+
+#if defined(MBEDTLS_SELF_TEST)
+/**
+ * \brief Checkup routine
+ *
+ * \return 0 if successful, or 1 if a test failed
+ */
+int mbedtls_memory_buffer_alloc_self_test( int verbose );
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* memory_buffer_alloc.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/net.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/net.h
new file mode 100644
index 0000000..8cead58
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/net.h
@@ -0,0 +1,37 @@
+/**
+ * \file net.h
+ *
+ * \brief Deprecated header file that includes net_sockets.h
+ *
+ * \deprecated Superseded by mbedtls/net_sockets.h
+ */
+/*
+ * Copyright (C) 2006-2016, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#include "net_sockets.h"
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#warning "Deprecated header file: Superseded by mbedtls/net_sockets.h"
+#endif /* MBEDTLS_DEPRECATED_WARNING */
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/net_sockets.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/net_sockets.h
new file mode 100644
index 0000000..4c7ef00
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/net_sockets.h
@@ -0,0 +1,271 @@
+/**
+ * \file net_sockets.h
+ *
+ * \brief Network sockets abstraction layer to integrate Mbed TLS into a
+ * BSD-style sockets API.
+ *
+ * The network sockets module provides an example integration of the
+ * Mbed TLS library into a BSD sockets implementation. The module is
+ * intended to be an example of how Mbed TLS can be integrated into a
+ * networking stack, as well as to be Mbed TLS's network integration
+ * for its supported platforms.
+ *
+ * The module is intended only to be used with the Mbed TLS library and
+ * is not intended to be used by third party application software
+ * directly.
+ *
+ * The supported platforms are as follows:
+ * * Microsoft Windows and Windows CE
+ * * POSIX/Unix platforms including Linux, OS X
+ *
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_NET_SOCKETS_H
+#define MBEDTLS_NET_SOCKETS_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "ssl.h"
+
+#include <stddef.h>
+#include <stdint.h>
+
+#define MBEDTLS_ERR_NET_SOCKET_FAILED -0x0042 /**< Failed to open a socket. */
+#define MBEDTLS_ERR_NET_CONNECT_FAILED -0x0044 /**< The connection to the given server / port failed. */
+#define MBEDTLS_ERR_NET_BIND_FAILED -0x0046 /**< Binding of the socket failed. */
+#define MBEDTLS_ERR_NET_LISTEN_FAILED -0x0048 /**< Could not listen on the socket. */
+#define MBEDTLS_ERR_NET_ACCEPT_FAILED -0x004A /**< Could not accept the incoming connection. */
+#define MBEDTLS_ERR_NET_RECV_FAILED -0x004C /**< Reading information from the socket failed. */
+#define MBEDTLS_ERR_NET_SEND_FAILED -0x004E /**< Sending information through the socket failed. */
+#define MBEDTLS_ERR_NET_CONN_RESET -0x0050 /**< Connection was reset by peer. */
+#define MBEDTLS_ERR_NET_UNKNOWN_HOST -0x0052 /**< Failed to get an IP address for the given hostname. */
+#define MBEDTLS_ERR_NET_BUFFER_TOO_SMALL -0x0043 /**< Buffer is too small to hold the data. */
+#define MBEDTLS_ERR_NET_INVALID_CONTEXT -0x0045 /**< The context is invalid, eg because it was free()ed. */
+#define MBEDTLS_ERR_NET_POLL_FAILED -0x0047 /**< Polling the net context failed. */
+#define MBEDTLS_ERR_NET_BAD_INPUT_DATA -0x0049 /**< Input invalid. */
+
+#define MBEDTLS_NET_LISTEN_BACKLOG 10 /**< The backlog that listen() should use. */
+
+#define MBEDTLS_NET_PROTO_TCP 0 /**< The TCP transport protocol */
+#define MBEDTLS_NET_PROTO_UDP 1 /**< The UDP transport protocol */
+
+#define MBEDTLS_NET_POLL_READ 1 /**< Used in \c mbedtls_net_poll to check for pending data */
+#define MBEDTLS_NET_POLL_WRITE 2 /**< Used in \c mbedtls_net_poll to check if write possible */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Wrapper type for sockets.
+ *
+ * Currently backed by just a file descriptor, but might be more in the future
+ * (eg two file descriptors for combined IPv4 + IPv6 support, or additional
+ * structures for hand-made UDP demultiplexing).
+ */
+typedef struct mbedtls_net_context
+{
+ int fd; /**< The underlying file descriptor */
+}
+mbedtls_net_context;
+
+/**
+ * \brief Initialize a context
+ * Just makes the context ready to be used or freed safely.
+ *
+ * \param ctx Context to initialize
+ */
+void mbedtls_net_init( mbedtls_net_context *ctx );
+
+/**
+ * \brief Initiate a connection with host:port in the given protocol
+ *
+ * \param ctx Socket to use
+ * \param host Host to connect to
+ * \param port Port to connect to
+ * \param proto Protocol: MBEDTLS_NET_PROTO_TCP or MBEDTLS_NET_PROTO_UDP
+ *
+ * \return 0 if successful, or one of:
+ * MBEDTLS_ERR_NET_SOCKET_FAILED,
+ * MBEDTLS_ERR_NET_UNKNOWN_HOST,
+ * MBEDTLS_ERR_NET_CONNECT_FAILED
+ *
+ * \note Sets the socket in connected mode even with UDP.
+ */
+int mbedtls_net_connect( mbedtls_net_context *ctx, const char *host, const char *port, int proto );
+
+/**
+ * \brief Create a receiving socket on bind_ip:port in the chosen
+ * protocol. If bind_ip == NULL, all interfaces are bound.
+ *
+ * \param ctx Socket to use
+ * \param bind_ip IP to bind to, can be NULL
+ * \param port Port number to use
+ * \param proto Protocol: MBEDTLS_NET_PROTO_TCP or MBEDTLS_NET_PROTO_UDP
+ *
+ * \return 0 if successful, or one of:
+ * MBEDTLS_ERR_NET_SOCKET_FAILED,
+ * MBEDTLS_ERR_NET_BIND_FAILED,
+ * MBEDTLS_ERR_NET_LISTEN_FAILED
+ *
+ * \note Regardless of the protocol, opens the sockets and binds it.
+ * In addition, make the socket listening if protocol is TCP.
+ */
+int mbedtls_net_bind( mbedtls_net_context *ctx, const char *bind_ip, const char *port, int proto );
+
+/**
+ * \brief Accept a connection from a remote client
+ *
+ * \param bind_ctx Relevant socket
+ * \param client_ctx Will contain the connected client socket
+ * \param client_ip Will contain the client IP address, can be NULL
+ * \param buf_size Size of the client_ip buffer
+ * \param ip_len Will receive the size of the client IP written,
+ * can be NULL if client_ip is null
+ *
+ * \return 0 if successful, or
+ * MBEDTLS_ERR_NET_ACCEPT_FAILED, or
+ * MBEDTLS_ERR_NET_BUFFER_TOO_SMALL if buf_size is too small,
+ * MBEDTLS_ERR_SSL_WANT_READ if bind_fd was set to
+ * non-blocking and accept() would block.
+ */
+int mbedtls_net_accept( mbedtls_net_context *bind_ctx,
+ mbedtls_net_context *client_ctx,
+ void *client_ip, size_t buf_size, size_t *ip_len );
+
+/**
+ * \brief Check and wait for the context to be ready for read/write
+ *
+ * \param ctx Socket to check
+ * \param rw Bitflag composed of MBEDTLS_NET_POLL_READ and
+ * MBEDTLS_NET_POLL_WRITE specifying the events
+ * to wait for:
+ * - If MBEDTLS_NET_POLL_READ is set, the function
+ * will return as soon as the net context is available
+ * for reading.
+ * - If MBEDTLS_NET_POLL_WRITE is set, the function
+ * will return as soon as the net context is available
+ * for writing.
+ * \param timeout Maximal amount of time to wait before returning,
+ * in milliseconds. If \c timeout is zero, the
+ * function returns immediately. If \c timeout is
+ * -1u, the function blocks potentially indefinitely.
+ *
+ * \return Bitmask composed of MBEDTLS_NET_POLL_READ/WRITE
+ * on success or timeout, or a negative return code otherwise.
+ */
+int mbedtls_net_poll( mbedtls_net_context *ctx, uint32_t rw, uint32_t timeout );
+
+/**
+ * \brief Set the socket blocking
+ *
+ * \param ctx Socket to set
+ *
+ * \return 0 if successful, or a non-zero error code
+ */
+int mbedtls_net_set_block( mbedtls_net_context *ctx );
+
+/**
+ * \brief Set the socket non-blocking
+ *
+ * \param ctx Socket to set
+ *
+ * \return 0 if successful, or a non-zero error code
+ */
+int mbedtls_net_set_nonblock( mbedtls_net_context *ctx );
+
+/**
+ * \brief Portable usleep helper
+ *
+ * \param usec Amount of microseconds to sleep
+ *
+ * \note Real amount of time slept will not be less than
+ * select()'s timeout granularity (typically, 10ms).
+ */
+void mbedtls_net_usleep( unsigned long usec );
+
+/**
+ * \brief Read at most 'len' characters. If no error occurs,
+ * the actual amount read is returned.
+ *
+ * \param ctx Socket
+ * \param buf The buffer to write to
+ * \param len Maximum length of the buffer
+ *
+ * \return the number of bytes received,
+ * or a non-zero error code; with a non-blocking socket,
+ * MBEDTLS_ERR_SSL_WANT_READ indicates read() would block.
+ */
+int mbedtls_net_recv( void *ctx, unsigned char *buf, size_t len );
+
+/**
+ * \brief Write at most 'len' characters. If no error occurs,
+ * the actual amount read is returned.
+ *
+ * \param ctx Socket
+ * \param buf The buffer to read from
+ * \param len The length of the buffer
+ *
+ * \return the number of bytes sent,
+ * or a non-zero error code; with a non-blocking socket,
+ * MBEDTLS_ERR_SSL_WANT_WRITE indicates write() would block.
+ */
+int mbedtls_net_send( void *ctx, const unsigned char *buf, size_t len );
+
+/**
+ * \brief Read at most 'len' characters, blocking for at most
+ * 'timeout' seconds. If no error occurs, the actual amount
+ * read is returned.
+ *
+ * \param ctx Socket
+ * \param buf The buffer to write to
+ * \param len Maximum length of the buffer
+ * \param timeout Maximum number of milliseconds to wait for data
+ * 0 means no timeout (wait forever)
+ *
+ * \return the number of bytes received,
+ * or a non-zero error code:
+ * MBEDTLS_ERR_SSL_TIMEOUT if the operation timed out,
+ * MBEDTLS_ERR_SSL_WANT_READ if interrupted by a signal.
+ *
+ * \note This function will block (until data becomes available or
+ * timeout is reached) even if the socket is set to
+ * non-blocking. Handling timeouts with non-blocking reads
+ * requires a different strategy.
+ */
+int mbedtls_net_recv_timeout( void *ctx, unsigned char *buf, size_t len,
+ uint32_t timeout );
+
+/**
+ * \brief Gracefully shutdown the connection and free associated data
+ *
+ * \param ctx The context to free
+ */
+void mbedtls_net_free( mbedtls_net_context *ctx );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* net_sockets.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/nist_kw.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/nist_kw.h
new file mode 100644
index 0000000..3b67b59
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/nist_kw.h
@@ -0,0 +1,184 @@
+/**
+ * \file nist_kw.h
+ *
+ * \brief This file provides an API for key wrapping (KW) and key wrapping with
+ * padding (KWP) as defined in NIST SP 800-38F.
+ * https://nvlpubs.nist.gov/nistpubs/SpecialPublications/NIST.SP.800-38F.pdf
+ *
+ * Key wrapping specifies a deterministic authenticated-encryption mode
+ * of operation, according to <em>NIST SP 800-38F: Recommendation for
+ * Block Cipher Modes of Operation: Methods for Key Wrapping</em>. Its
+ * purpose is to protect cryptographic keys.
+ *
+ * Its equivalent is RFC 3394 for KW, and RFC 5649 for KWP.
+ * https://tools.ietf.org/html/rfc3394
+ * https://tools.ietf.org/html/rfc5649
+ *
+ */
+/*
+ * Copyright (C) 2018, Arm Limited (or its affiliates), All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of Mbed TLS (https://tls.mbed.org)
+ */
+
+#ifndef MBEDTLS_NIST_KW_H
+#define MBEDTLS_NIST_KW_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "cipher.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum
+{
+ MBEDTLS_KW_MODE_KW = 0,
+ MBEDTLS_KW_MODE_KWP = 1
+} mbedtls_nist_kw_mode_t;
+
+#if !defined(MBEDTLS_NIST_KW_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief The key wrapping context-type definition. The key wrapping context is passed
+ * to the APIs called.
+ *
+ * \note The definition of this type may change in future library versions.
+ * Don't make any assumptions on this context!
+ */
+typedef struct {
+ mbedtls_cipher_context_t cipher_ctx; /*!< The cipher context used. */
+} mbedtls_nist_kw_context;
+
+#else /* MBEDTLS_NIST_key wrapping_ALT */
+#include "nist_kw_alt.h"
+#endif /* MBEDTLS_NIST_KW_ALT */
+
+/**
+ * \brief This function initializes the specified key wrapping context
+ * to make references valid and prepare the context
+ * for mbedtls_nist_kw_setkey() or mbedtls_nist_kw_free().
+ *
+ * \param ctx The key wrapping context to initialize.
+ *
+ */
+void mbedtls_nist_kw_init( mbedtls_nist_kw_context *ctx );
+
+/**
+ * \brief This function initializes the key wrapping context set in the
+ * \p ctx parameter and sets the encryption key.
+ *
+ * \param ctx The key wrapping context.
+ * \param cipher The 128-bit block cipher to use. Only AES is supported.
+ * \param key The Key Encryption Key (KEK).
+ * \param keybits The KEK size in bits. This must be acceptable by the cipher.
+ * \param is_wrap Specify whether the operation within the context is wrapping or unwrapping
+ *
+ * \return \c 0 on success.
+ * \return \c MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA for any invalid input.
+ * \return \c MBEDTLS_ERR_CIPHER_FEATURE_UNAVAILABLE for 128-bit block ciphers
+ * which are not supported.
+ * \return cipher-specific error code on failure of the underlying cipher.
+ */
+int mbedtls_nist_kw_setkey( mbedtls_nist_kw_context *ctx,
+ mbedtls_cipher_id_t cipher,
+ const unsigned char *key,
+ unsigned int keybits,
+ const int is_wrap );
+
+/**
+ * \brief This function releases and clears the specified key wrapping context
+ * and underlying cipher sub-context.
+ *
+ * \param ctx The key wrapping context to clear.
+ */
+void mbedtls_nist_kw_free( mbedtls_nist_kw_context *ctx );
+
+/**
+ * \brief This function encrypts a buffer using key wrapping.
+ *
+ * \param ctx The key wrapping context to use for encryption.
+ * \param mode The key wrapping mode to use (MBEDTLS_KW_MODE_KW or MBEDTLS_KW_MODE_KWP)
+ * \param input The buffer holding the input data.
+ * \param in_len The length of the input data in Bytes.
+ * The input uses units of 8 Bytes called semiblocks.
+ * <ul><li>For KW mode: a multiple of 8 bytes between 16 and 2^57-8 inclusive. </li>
+ * <li>For KWP mode: any length between 1 and 2^32-1 inclusive.</li></ul>
+ * \param[out] output The buffer holding the output data.
+ * <ul><li>For KW mode: Must be at least 8 bytes larger than \p in_len.</li>
+ * <li>For KWP mode: Must be at least 8 bytes larger rounded up to a multiple of
+ * 8 bytes for KWP (15 bytes at most).</li></ul>
+ * \param[out] out_len The number of bytes written to the output buffer. \c 0 on failure.
+ * \param[in] out_size The capacity of the output buffer.
+ *
+ * \return \c 0 on success.
+ * \return \c MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA for invalid input length.
+ * \return cipher-specific error code on failure of the underlying cipher.
+ */
+int mbedtls_nist_kw_wrap( mbedtls_nist_kw_context *ctx, mbedtls_nist_kw_mode_t mode,
+ const unsigned char *input, size_t in_len,
+ unsigned char *output, size_t* out_len, size_t out_size );
+
+/**
+ * \brief This function decrypts a buffer using key wrapping.
+ *
+ * \param ctx The key wrapping context to use for decryption.
+ * \param mode The key wrapping mode to use (MBEDTLS_KW_MODE_KW or MBEDTLS_KW_MODE_KWP)
+ * \param input The buffer holding the input data.
+ * \param in_len The length of the input data in Bytes.
+ * The input uses units of 8 Bytes called semiblocks.
+ * The input must be a multiple of semiblocks.
+ * <ul><li>For KW mode: a multiple of 8 bytes between 24 and 2^57 inclusive. </li>
+ * <li>For KWP mode: a multiple of 8 bytes between 16 and 2^32 inclusive.</li></ul>
+ * \param[out] output The buffer holding the output data.
+ * The output buffer's minimal length is 8 bytes shorter than \p in_len.
+ * \param[out] out_len The number of bytes written to the output buffer. \c 0 on failure.
+ * For KWP mode, the length could be up to 15 bytes shorter than \p in_len,
+ * depending on how much padding was added to the data.
+ * \param[in] out_size The capacity of the output buffer.
+ *
+ * \return \c 0 on success.
+ * \return \c MBEDTLS_ERR_CIPHER_BAD_INPUT_DATA for invalid input length.
+ * \return \c MBEDTLS_ERR_CIPHER_AUTH_FAILED for verification failure of the ciphertext.
+ * \return cipher-specific error code on failure of the underlying cipher.
+ */
+int mbedtls_nist_kw_unwrap( mbedtls_nist_kw_context *ctx, mbedtls_nist_kw_mode_t mode,
+ const unsigned char *input, size_t in_len,
+ unsigned char *output, size_t* out_len, size_t out_size);
+
+
+#if defined(MBEDTLS_SELF_TEST) && defined(MBEDTLS_AES_C)
+/**
+ * \brief The key wrapping checkup routine.
+ *
+ * \return \c 0 on success.
+ * \return \c 1 on failure.
+ */
+int mbedtls_nist_kw_self_test( int verbose );
+#endif /* MBEDTLS_SELF_TEST && MBEDTLS_AES_C */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_NIST_KW_H */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/oid.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/oid.h
new file mode 100644
index 0000000..6fbd018
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/oid.h
@@ -0,0 +1,605 @@
+/**
+ * \file oid.h
+ *
+ * \brief Object Identifier (OID) database
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_OID_H
+#define MBEDTLS_OID_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "asn1.h"
+#include "pk.h"
+
+#include <stddef.h>
+
+#if defined(MBEDTLS_CIPHER_C)
+#include "cipher.h"
+#endif
+
+#if defined(MBEDTLS_MD_C)
+#include "md.h"
+#endif
+
+#if defined(MBEDTLS_X509_USE_C) || defined(MBEDTLS_X509_CREATE_C)
+#include "x509.h"
+#endif
+
+#define MBEDTLS_ERR_OID_NOT_FOUND -0x002E /**< OID is not found. */
+#define MBEDTLS_ERR_OID_BUF_TOO_SMALL -0x000B /**< output buffer is too small */
+
+/*
+ * Top level OID tuples
+ */
+#define MBEDTLS_OID_ISO_MEMBER_BODIES "\x2a" /* {iso(1) member-body(2)} */
+#define MBEDTLS_OID_ISO_IDENTIFIED_ORG "\x2b" /* {iso(1) identified-organization(3)} */
+#define MBEDTLS_OID_ISO_CCITT_DS "\x55" /* {joint-iso-ccitt(2) ds(5)} */
+#define MBEDTLS_OID_ISO_ITU_COUNTRY "\x60" /* {joint-iso-itu-t(2) country(16)} */
+
+/*
+ * ISO Member bodies OID parts
+ */
+#define MBEDTLS_OID_COUNTRY_US "\x86\x48" /* {us(840)} */
+#define MBEDTLS_OID_ORG_RSA_DATA_SECURITY "\x86\xf7\x0d" /* {rsadsi(113549)} */
+#define MBEDTLS_OID_RSA_COMPANY MBEDTLS_OID_ISO_MEMBER_BODIES MBEDTLS_OID_COUNTRY_US \
+ MBEDTLS_OID_ORG_RSA_DATA_SECURITY /* {iso(1) member-body(2) us(840) rsadsi(113549)} */
+#define MBEDTLS_OID_ORG_ANSI_X9_62 "\xce\x3d" /* ansi-X9-62(10045) */
+#define MBEDTLS_OID_ANSI_X9_62 MBEDTLS_OID_ISO_MEMBER_BODIES MBEDTLS_OID_COUNTRY_US \
+ MBEDTLS_OID_ORG_ANSI_X9_62
+
+/*
+ * ISO Identified organization OID parts
+ */
+#define MBEDTLS_OID_ORG_DOD "\x06" /* {dod(6)} */
+#define MBEDTLS_OID_ORG_OIW "\x0e"
+#define MBEDTLS_OID_OIW_SECSIG MBEDTLS_OID_ORG_OIW "\x03"
+#define MBEDTLS_OID_OIW_SECSIG_ALG MBEDTLS_OID_OIW_SECSIG "\x02"
+#define MBEDTLS_OID_OIW_SECSIG_SHA1 MBEDTLS_OID_OIW_SECSIG_ALG "\x1a"
+#define MBEDTLS_OID_ORG_CERTICOM "\x81\x04" /* certicom(132) */
+#define MBEDTLS_OID_CERTICOM MBEDTLS_OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_ORG_CERTICOM
+#define MBEDTLS_OID_ORG_TELETRUST "\x24" /* teletrust(36) */
+#define MBEDTLS_OID_TELETRUST MBEDTLS_OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_ORG_TELETRUST
+
+/*
+ * ISO ITU OID parts
+ */
+#define MBEDTLS_OID_ORGANIZATION "\x01" /* {organization(1)} */
+#define MBEDTLS_OID_ISO_ITU_US_ORG MBEDTLS_OID_ISO_ITU_COUNTRY MBEDTLS_OID_COUNTRY_US MBEDTLS_OID_ORGANIZATION /* {joint-iso-itu-t(2) country(16) us(840) organization(1)} */
+
+#define MBEDTLS_OID_ORG_GOV "\x65" /* {gov(101)} */
+#define MBEDTLS_OID_GOV MBEDTLS_OID_ISO_ITU_US_ORG MBEDTLS_OID_ORG_GOV /* {joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101)} */
+
+#define MBEDTLS_OID_ORG_NETSCAPE "\x86\xF8\x42" /* {netscape(113730)} */
+#define MBEDTLS_OID_NETSCAPE MBEDTLS_OID_ISO_ITU_US_ORG MBEDTLS_OID_ORG_NETSCAPE /* Netscape OID {joint-iso-itu-t(2) country(16) us(840) organization(1) netscape(113730)} */
+
+/* ISO arc for standard certificate and CRL extensions */
+#define MBEDTLS_OID_ID_CE MBEDTLS_OID_ISO_CCITT_DS "\x1D" /**< id-ce OBJECT IDENTIFIER ::= {joint-iso-ccitt(2) ds(5) 29} */
+
+#define MBEDTLS_OID_NIST_ALG MBEDTLS_OID_GOV "\x03\x04" /** { joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101) csor(3) nistAlgorithm(4) */
+
+/**
+ * Private Internet Extensions
+ * { iso(1) identified-organization(3) dod(6) internet(1)
+ * security(5) mechanisms(5) pkix(7) }
+ */
+#define MBEDTLS_OID_PKIX MBEDTLS_OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_ORG_DOD "\x01\x05\x05\x07"
+
+/*
+ * Arc for standard naming attributes
+ */
+#define MBEDTLS_OID_AT MBEDTLS_OID_ISO_CCITT_DS "\x04" /**< id-at OBJECT IDENTIFIER ::= {joint-iso-ccitt(2) ds(5) 4} */
+#define MBEDTLS_OID_AT_CN MBEDTLS_OID_AT "\x03" /**< id-at-commonName AttributeType:= {id-at 3} */
+#define MBEDTLS_OID_AT_SUR_NAME MBEDTLS_OID_AT "\x04" /**< id-at-surName AttributeType:= {id-at 4} */
+#define MBEDTLS_OID_AT_SERIAL_NUMBER MBEDTLS_OID_AT "\x05" /**< id-at-serialNumber AttributeType:= {id-at 5} */
+#define MBEDTLS_OID_AT_COUNTRY MBEDTLS_OID_AT "\x06" /**< id-at-countryName AttributeType:= {id-at 6} */
+#define MBEDTLS_OID_AT_LOCALITY MBEDTLS_OID_AT "\x07" /**< id-at-locality AttributeType:= {id-at 7} */
+#define MBEDTLS_OID_AT_STATE MBEDTLS_OID_AT "\x08" /**< id-at-state AttributeType:= {id-at 8} */
+#define MBEDTLS_OID_AT_ORGANIZATION MBEDTLS_OID_AT "\x0A" /**< id-at-organizationName AttributeType:= {id-at 10} */
+#define MBEDTLS_OID_AT_ORG_UNIT MBEDTLS_OID_AT "\x0B" /**< id-at-organizationalUnitName AttributeType:= {id-at 11} */
+#define MBEDTLS_OID_AT_TITLE MBEDTLS_OID_AT "\x0C" /**< id-at-title AttributeType:= {id-at 12} */
+#define MBEDTLS_OID_AT_POSTAL_ADDRESS MBEDTLS_OID_AT "\x10" /**< id-at-postalAddress AttributeType:= {id-at 16} */
+#define MBEDTLS_OID_AT_POSTAL_CODE MBEDTLS_OID_AT "\x11" /**< id-at-postalCode AttributeType:= {id-at 17} */
+#define MBEDTLS_OID_AT_GIVEN_NAME MBEDTLS_OID_AT "\x2A" /**< id-at-givenName AttributeType:= {id-at 42} */
+#define MBEDTLS_OID_AT_INITIALS MBEDTLS_OID_AT "\x2B" /**< id-at-initials AttributeType:= {id-at 43} */
+#define MBEDTLS_OID_AT_GENERATION_QUALIFIER MBEDTLS_OID_AT "\x2C" /**< id-at-generationQualifier AttributeType:= {id-at 44} */
+#define MBEDTLS_OID_AT_UNIQUE_IDENTIFIER MBEDTLS_OID_AT "\x2D" /**< id-at-uniqueIdentifier AttributType:= {id-at 45} */
+#define MBEDTLS_OID_AT_DN_QUALIFIER MBEDTLS_OID_AT "\x2E" /**< id-at-dnQualifier AttributeType:= {id-at 46} */
+#define MBEDTLS_OID_AT_PSEUDONYM MBEDTLS_OID_AT "\x41" /**< id-at-pseudonym AttributeType:= {id-at 65} */
+
+#define MBEDTLS_OID_DOMAIN_COMPONENT "\x09\x92\x26\x89\x93\xF2\x2C\x64\x01\x19" /** id-domainComponent AttributeType:= {itu-t(0) data(9) pss(2342) ucl(19200300) pilot(100) pilotAttributeType(1) domainComponent(25)} */
+
+/*
+ * OIDs for standard certificate extensions
+ */
+#define MBEDTLS_OID_AUTHORITY_KEY_IDENTIFIER MBEDTLS_OID_ID_CE "\x23" /**< id-ce-authorityKeyIdentifier OBJECT IDENTIFIER ::= { id-ce 35 } */
+#define MBEDTLS_OID_SUBJECT_KEY_IDENTIFIER MBEDTLS_OID_ID_CE "\x0E" /**< id-ce-subjectKeyIdentifier OBJECT IDENTIFIER ::= { id-ce 14 } */
+#define MBEDTLS_OID_KEY_USAGE MBEDTLS_OID_ID_CE "\x0F" /**< id-ce-keyUsage OBJECT IDENTIFIER ::= { id-ce 15 } */
+#define MBEDTLS_OID_CERTIFICATE_POLICIES MBEDTLS_OID_ID_CE "\x20" /**< id-ce-certificatePolicies OBJECT IDENTIFIER ::= { id-ce 32 } */
+#define MBEDTLS_OID_POLICY_MAPPINGS MBEDTLS_OID_ID_CE "\x21" /**< id-ce-policyMappings OBJECT IDENTIFIER ::= { id-ce 33 } */
+#define MBEDTLS_OID_SUBJECT_ALT_NAME MBEDTLS_OID_ID_CE "\x11" /**< id-ce-subjectAltName OBJECT IDENTIFIER ::= { id-ce 17 } */
+#define MBEDTLS_OID_ISSUER_ALT_NAME MBEDTLS_OID_ID_CE "\x12" /**< id-ce-issuerAltName OBJECT IDENTIFIER ::= { id-ce 18 } */
+#define MBEDTLS_OID_SUBJECT_DIRECTORY_ATTRS MBEDTLS_OID_ID_CE "\x09" /**< id-ce-subjectDirectoryAttributes OBJECT IDENTIFIER ::= { id-ce 9 } */
+#define MBEDTLS_OID_BASIC_CONSTRAINTS MBEDTLS_OID_ID_CE "\x13" /**< id-ce-basicConstraints OBJECT IDENTIFIER ::= { id-ce 19 } */
+#define MBEDTLS_OID_NAME_CONSTRAINTS MBEDTLS_OID_ID_CE "\x1E" /**< id-ce-nameConstraints OBJECT IDENTIFIER ::= { id-ce 30 } */
+#define MBEDTLS_OID_POLICY_CONSTRAINTS MBEDTLS_OID_ID_CE "\x24" /**< id-ce-policyConstraints OBJECT IDENTIFIER ::= { id-ce 36 } */
+#define MBEDTLS_OID_EXTENDED_KEY_USAGE MBEDTLS_OID_ID_CE "\x25" /**< id-ce-extKeyUsage OBJECT IDENTIFIER ::= { id-ce 37 } */
+#define MBEDTLS_OID_CRL_DISTRIBUTION_POINTS MBEDTLS_OID_ID_CE "\x1F" /**< id-ce-cRLDistributionPoints OBJECT IDENTIFIER ::= { id-ce 31 } */
+#define MBEDTLS_OID_INIHIBIT_ANYPOLICY MBEDTLS_OID_ID_CE "\x36" /**< id-ce-inhibitAnyPolicy OBJECT IDENTIFIER ::= { id-ce 54 } */
+#define MBEDTLS_OID_FRESHEST_CRL MBEDTLS_OID_ID_CE "\x2E" /**< id-ce-freshestCRL OBJECT IDENTIFIER ::= { id-ce 46 } */
+
+/*
+ * Netscape certificate extensions
+ */
+#define MBEDTLS_OID_NS_CERT MBEDTLS_OID_NETSCAPE "\x01"
+#define MBEDTLS_OID_NS_CERT_TYPE MBEDTLS_OID_NS_CERT "\x01"
+#define MBEDTLS_OID_NS_BASE_URL MBEDTLS_OID_NS_CERT "\x02"
+#define MBEDTLS_OID_NS_REVOCATION_URL MBEDTLS_OID_NS_CERT "\x03"
+#define MBEDTLS_OID_NS_CA_REVOCATION_URL MBEDTLS_OID_NS_CERT "\x04"
+#define MBEDTLS_OID_NS_RENEWAL_URL MBEDTLS_OID_NS_CERT "\x07"
+#define MBEDTLS_OID_NS_CA_POLICY_URL MBEDTLS_OID_NS_CERT "\x08"
+#define MBEDTLS_OID_NS_SSL_SERVER_NAME MBEDTLS_OID_NS_CERT "\x0C"
+#define MBEDTLS_OID_NS_COMMENT MBEDTLS_OID_NS_CERT "\x0D"
+#define MBEDTLS_OID_NS_DATA_TYPE MBEDTLS_OID_NETSCAPE "\x02"
+#define MBEDTLS_OID_NS_CERT_SEQUENCE MBEDTLS_OID_NS_DATA_TYPE "\x05"
+
+/*
+ * OIDs for CRL extensions
+ */
+#define MBEDTLS_OID_PRIVATE_KEY_USAGE_PERIOD MBEDTLS_OID_ID_CE "\x10"
+#define MBEDTLS_OID_CRL_NUMBER MBEDTLS_OID_ID_CE "\x14" /**< id-ce-cRLNumber OBJECT IDENTIFIER ::= { id-ce 20 } */
+
+/*
+ * X.509 v3 Extended key usage OIDs
+ */
+#define MBEDTLS_OID_ANY_EXTENDED_KEY_USAGE MBEDTLS_OID_EXTENDED_KEY_USAGE "\x00" /**< anyExtendedKeyUsage OBJECT IDENTIFIER ::= { id-ce-extKeyUsage 0 } */
+
+#define MBEDTLS_OID_KP MBEDTLS_OID_PKIX "\x03" /**< id-kp OBJECT IDENTIFIER ::= { id-pkix 3 } */
+#define MBEDTLS_OID_SERVER_AUTH MBEDTLS_OID_KP "\x01" /**< id-kp-serverAuth OBJECT IDENTIFIER ::= { id-kp 1 } */
+#define MBEDTLS_OID_CLIENT_AUTH MBEDTLS_OID_KP "\x02" /**< id-kp-clientAuth OBJECT IDENTIFIER ::= { id-kp 2 } */
+#define MBEDTLS_OID_CODE_SIGNING MBEDTLS_OID_KP "\x03" /**< id-kp-codeSigning OBJECT IDENTIFIER ::= { id-kp 3 } */
+#define MBEDTLS_OID_EMAIL_PROTECTION MBEDTLS_OID_KP "\x04" /**< id-kp-emailProtection OBJECT IDENTIFIER ::= { id-kp 4 } */
+#define MBEDTLS_OID_TIME_STAMPING MBEDTLS_OID_KP "\x08" /**< id-kp-timeStamping OBJECT IDENTIFIER ::= { id-kp 8 } */
+#define MBEDTLS_OID_OCSP_SIGNING MBEDTLS_OID_KP "\x09" /**< id-kp-OCSPSigning OBJECT IDENTIFIER ::= { id-kp 9 } */
+
+/*
+ * PKCS definition OIDs
+ */
+
+#define MBEDTLS_OID_PKCS MBEDTLS_OID_RSA_COMPANY "\x01" /**< pkcs OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) 1 } */
+#define MBEDTLS_OID_PKCS1 MBEDTLS_OID_PKCS "\x01" /**< pkcs-1 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) pkcs(1) 1 } */
+#define MBEDTLS_OID_PKCS5 MBEDTLS_OID_PKCS "\x05" /**< pkcs-5 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) pkcs(1) 5 } */
+#define MBEDTLS_OID_PKCS9 MBEDTLS_OID_PKCS "\x09" /**< pkcs-9 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) pkcs(1) 9 } */
+#define MBEDTLS_OID_PKCS12 MBEDTLS_OID_PKCS "\x0c" /**< pkcs-12 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) pkcs(1) 12 } */
+
+/*
+ * PKCS#1 OIDs
+ */
+#define MBEDTLS_OID_PKCS1_RSA MBEDTLS_OID_PKCS1 "\x01" /**< rsaEncryption OBJECT IDENTIFIER ::= { pkcs-1 1 } */
+#define MBEDTLS_OID_PKCS1_MD2 MBEDTLS_OID_PKCS1 "\x02" /**< md2WithRSAEncryption ::= { pkcs-1 2 } */
+#define MBEDTLS_OID_PKCS1_MD4 MBEDTLS_OID_PKCS1 "\x03" /**< md4WithRSAEncryption ::= { pkcs-1 3 } */
+#define MBEDTLS_OID_PKCS1_MD5 MBEDTLS_OID_PKCS1 "\x04" /**< md5WithRSAEncryption ::= { pkcs-1 4 } */
+#define MBEDTLS_OID_PKCS1_SHA1 MBEDTLS_OID_PKCS1 "\x05" /**< sha1WithRSAEncryption ::= { pkcs-1 5 } */
+#define MBEDTLS_OID_PKCS1_SHA224 MBEDTLS_OID_PKCS1 "\x0e" /**< sha224WithRSAEncryption ::= { pkcs-1 14 } */
+#define MBEDTLS_OID_PKCS1_SHA256 MBEDTLS_OID_PKCS1 "\x0b" /**< sha256WithRSAEncryption ::= { pkcs-1 11 } */
+#define MBEDTLS_OID_PKCS1_SHA384 MBEDTLS_OID_PKCS1 "\x0c" /**< sha384WithRSAEncryption ::= { pkcs-1 12 } */
+#define MBEDTLS_OID_PKCS1_SHA512 MBEDTLS_OID_PKCS1 "\x0d" /**< sha512WithRSAEncryption ::= { pkcs-1 13 } */
+
+#define MBEDTLS_OID_RSA_SHA_OBS "\x2B\x0E\x03\x02\x1D"
+
+#define MBEDTLS_OID_PKCS9_EMAIL MBEDTLS_OID_PKCS9 "\x01" /**< emailAddress AttributeType ::= { pkcs-9 1 } */
+
+/* RFC 4055 */
+#define MBEDTLS_OID_RSASSA_PSS MBEDTLS_OID_PKCS1 "\x0a" /**< id-RSASSA-PSS ::= { pkcs-1 10 } */
+#define MBEDTLS_OID_MGF1 MBEDTLS_OID_PKCS1 "\x08" /**< id-mgf1 ::= { pkcs-1 8 } */
+
+/*
+ * Digest algorithms
+ */
+#define MBEDTLS_OID_DIGEST_ALG_MD2 MBEDTLS_OID_RSA_COMPANY "\x02\x02" /**< id-mbedtls_md2 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 2 } */
+#define MBEDTLS_OID_DIGEST_ALG_MD4 MBEDTLS_OID_RSA_COMPANY "\x02\x04" /**< id-mbedtls_md4 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 4 } */
+#define MBEDTLS_OID_DIGEST_ALG_MD5 MBEDTLS_OID_RSA_COMPANY "\x02\x05" /**< id-mbedtls_md5 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 5 } */
+#define MBEDTLS_OID_DIGEST_ALG_SHA1 MBEDTLS_OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_OIW_SECSIG_SHA1 /**< id-mbedtls_sha1 OBJECT IDENTIFIER ::= { iso(1) identified-organization(3) oiw(14) secsig(3) algorithms(2) 26 } */
+#define MBEDTLS_OID_DIGEST_ALG_SHA224 MBEDTLS_OID_NIST_ALG "\x02\x04" /**< id-sha224 OBJECT IDENTIFIER ::= { joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101) csor(3) nistalgorithm(4) hashalgs(2) 4 } */
+#define MBEDTLS_OID_DIGEST_ALG_SHA256 MBEDTLS_OID_NIST_ALG "\x02\x01" /**< id-mbedtls_sha256 OBJECT IDENTIFIER ::= { joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101) csor(3) nistalgorithm(4) hashalgs(2) 1 } */
+
+#define MBEDTLS_OID_DIGEST_ALG_SHA384 MBEDTLS_OID_NIST_ALG "\x02\x02" /**< id-sha384 OBJECT IDENTIFIER ::= { joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101) csor(3) nistalgorithm(4) hashalgs(2) 2 } */
+
+#define MBEDTLS_OID_DIGEST_ALG_SHA512 MBEDTLS_OID_NIST_ALG "\x02\x03" /**< id-mbedtls_sha512 OBJECT IDENTIFIER ::= { joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101) csor(3) nistalgorithm(4) hashalgs(2) 3 } */
+
+#define MBEDTLS_OID_HMAC_SHA1 MBEDTLS_OID_RSA_COMPANY "\x02\x07" /**< id-hmacWithSHA1 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 7 } */
+
+#define MBEDTLS_OID_HMAC_SHA224 MBEDTLS_OID_RSA_COMPANY "\x02\x08" /**< id-hmacWithSHA224 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 8 } */
+
+#define MBEDTLS_OID_HMAC_SHA256 MBEDTLS_OID_RSA_COMPANY "\x02\x09" /**< id-hmacWithSHA256 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 9 } */
+
+#define MBEDTLS_OID_HMAC_SHA384 MBEDTLS_OID_RSA_COMPANY "\x02\x0A" /**< id-hmacWithSHA384 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 10 } */
+
+#define MBEDTLS_OID_HMAC_SHA512 MBEDTLS_OID_RSA_COMPANY "\x02\x0B" /**< id-hmacWithSHA512 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 11 } */
+
+/*
+ * Encryption algorithms
+ */
+#define MBEDTLS_OID_DES_CBC MBEDTLS_OID_ISO_IDENTIFIED_ORG MBEDTLS_OID_OIW_SECSIG_ALG "\x07" /**< desCBC OBJECT IDENTIFIER ::= { iso(1) identified-organization(3) oiw(14) secsig(3) algorithms(2) 7 } */
+#define MBEDTLS_OID_DES_EDE3_CBC MBEDTLS_OID_RSA_COMPANY "\x03\x07" /**< des-ede3-cbc OBJECT IDENTIFIER ::= { iso(1) member-body(2) -- us(840) rsadsi(113549) encryptionAlgorithm(3) 7 } */
+#define MBEDTLS_OID_AES MBEDTLS_OID_NIST_ALG "\x01" /** aes OBJECT IDENTIFIER ::= { joint-iso-itu-t(2) country(16) us(840) organization(1) gov(101) csor(3) nistAlgorithm(4) 1 } */
+
+/*
+ * Key Wrapping algorithms
+ */
+/*
+ * RFC 5649
+ */
+#define MBEDTLS_OID_AES128_KW MBEDTLS_OID_AES "\x05" /** id-aes128-wrap OBJECT IDENTIFIER ::= { aes 5 } */
+#define MBEDTLS_OID_AES128_KWP MBEDTLS_OID_AES "\x08" /** id-aes128-wrap-pad OBJECT IDENTIFIER ::= { aes 8 } */
+#define MBEDTLS_OID_AES192_KW MBEDTLS_OID_AES "\x19" /** id-aes192-wrap OBJECT IDENTIFIER ::= { aes 25 } */
+#define MBEDTLS_OID_AES192_KWP MBEDTLS_OID_AES "\x1c" /** id-aes192-wrap-pad OBJECT IDENTIFIER ::= { aes 28 } */
+#define MBEDTLS_OID_AES256_KW MBEDTLS_OID_AES "\x2d" /** id-aes256-wrap OBJECT IDENTIFIER ::= { aes 45 } */
+#define MBEDTLS_OID_AES256_KWP MBEDTLS_OID_AES "\x30" /** id-aes256-wrap-pad OBJECT IDENTIFIER ::= { aes 48 } */
+/*
+ * PKCS#5 OIDs
+ */
+#define MBEDTLS_OID_PKCS5_PBKDF2 MBEDTLS_OID_PKCS5 "\x0c" /**< id-PBKDF2 OBJECT IDENTIFIER ::= {pkcs-5 12} */
+#define MBEDTLS_OID_PKCS5_PBES2 MBEDTLS_OID_PKCS5 "\x0d" /**< id-PBES2 OBJECT IDENTIFIER ::= {pkcs-5 13} */
+#define MBEDTLS_OID_PKCS5_PBMAC1 MBEDTLS_OID_PKCS5 "\x0e" /**< id-PBMAC1 OBJECT IDENTIFIER ::= {pkcs-5 14} */
+
+/*
+ * PKCS#5 PBES1 algorithms
+ */
+#define MBEDTLS_OID_PKCS5_PBE_MD2_DES_CBC MBEDTLS_OID_PKCS5 "\x01" /**< pbeWithMD2AndDES-CBC OBJECT IDENTIFIER ::= {pkcs-5 1} */
+#define MBEDTLS_OID_PKCS5_PBE_MD2_RC2_CBC MBEDTLS_OID_PKCS5 "\x04" /**< pbeWithMD2AndRC2-CBC OBJECT IDENTIFIER ::= {pkcs-5 4} */
+#define MBEDTLS_OID_PKCS5_PBE_MD5_DES_CBC MBEDTLS_OID_PKCS5 "\x03" /**< pbeWithMD5AndDES-CBC OBJECT IDENTIFIER ::= {pkcs-5 3} */
+#define MBEDTLS_OID_PKCS5_PBE_MD5_RC2_CBC MBEDTLS_OID_PKCS5 "\x06" /**< pbeWithMD5AndRC2-CBC OBJECT IDENTIFIER ::= {pkcs-5 6} */
+#define MBEDTLS_OID_PKCS5_PBE_SHA1_DES_CBC MBEDTLS_OID_PKCS5 "\x0a" /**< pbeWithSHA1AndDES-CBC OBJECT IDENTIFIER ::= {pkcs-5 10} */
+#define MBEDTLS_OID_PKCS5_PBE_SHA1_RC2_CBC MBEDTLS_OID_PKCS5 "\x0b" /**< pbeWithSHA1AndRC2-CBC OBJECT IDENTIFIER ::= {pkcs-5 11} */
+
+/*
+ * PKCS#8 OIDs
+ */
+#define MBEDTLS_OID_PKCS9_CSR_EXT_REQ MBEDTLS_OID_PKCS9 "\x0e" /**< extensionRequest OBJECT IDENTIFIER ::= {pkcs-9 14} */
+
+/*
+ * PKCS#12 PBE OIDs
+ */
+#define MBEDTLS_OID_PKCS12_PBE MBEDTLS_OID_PKCS12 "\x01" /**< pkcs-12PbeIds OBJECT IDENTIFIER ::= {pkcs-12 1} */
+
+#define MBEDTLS_OID_PKCS12_PBE_SHA1_RC4_128 MBEDTLS_OID_PKCS12_PBE "\x01" /**< pbeWithSHAAnd128BitRC4 OBJECT IDENTIFIER ::= {pkcs-12PbeIds 1} */
+#define MBEDTLS_OID_PKCS12_PBE_SHA1_RC4_40 MBEDTLS_OID_PKCS12_PBE "\x02" /**< pbeWithSHAAnd40BitRC4 OBJECT IDENTIFIER ::= {pkcs-12PbeIds 2} */
+#define MBEDTLS_OID_PKCS12_PBE_SHA1_DES3_EDE_CBC MBEDTLS_OID_PKCS12_PBE "\x03" /**< pbeWithSHAAnd3-KeyTripleDES-CBC OBJECT IDENTIFIER ::= {pkcs-12PbeIds 3} */
+#define MBEDTLS_OID_PKCS12_PBE_SHA1_DES2_EDE_CBC MBEDTLS_OID_PKCS12_PBE "\x04" /**< pbeWithSHAAnd2-KeyTripleDES-CBC OBJECT IDENTIFIER ::= {pkcs-12PbeIds 4} */
+#define MBEDTLS_OID_PKCS12_PBE_SHA1_RC2_128_CBC MBEDTLS_OID_PKCS12_PBE "\x05" /**< pbeWithSHAAnd128BitRC2-CBC OBJECT IDENTIFIER ::= {pkcs-12PbeIds 5} */
+#define MBEDTLS_OID_PKCS12_PBE_SHA1_RC2_40_CBC MBEDTLS_OID_PKCS12_PBE "\x06" /**< pbeWithSHAAnd40BitRC2-CBC OBJECT IDENTIFIER ::= {pkcs-12PbeIds 6} */
+
+/*
+ * EC key algorithms from RFC 5480
+ */
+
+/* id-ecPublicKey OBJECT IDENTIFIER ::= {
+ * iso(1) member-body(2) us(840) ansi-X9-62(10045) keyType(2) 1 } */
+#define MBEDTLS_OID_EC_ALG_UNRESTRICTED MBEDTLS_OID_ANSI_X9_62 "\x02\01"
+
+/* id-ecDH OBJECT IDENTIFIER ::= {
+ * iso(1) identified-organization(3) certicom(132)
+ * schemes(1) ecdh(12) } */
+#define MBEDTLS_OID_EC_ALG_ECDH MBEDTLS_OID_CERTICOM "\x01\x0c"
+
+/*
+ * ECParameters namedCurve identifiers, from RFC 5480, RFC 5639, and SEC2
+ */
+
+/* secp192r1 OBJECT IDENTIFIER ::= {
+ * iso(1) member-body(2) us(840) ansi-X9-62(10045) curves(3) prime(1) 1 } */
+#define MBEDTLS_OID_EC_GRP_SECP192R1 MBEDTLS_OID_ANSI_X9_62 "\x03\x01\x01"
+
+/* secp224r1 OBJECT IDENTIFIER ::= {
+ * iso(1) identified-organization(3) certicom(132) curve(0) 33 } */
+#define MBEDTLS_OID_EC_GRP_SECP224R1 MBEDTLS_OID_CERTICOM "\x00\x21"
+
+/* secp256r1 OBJECT IDENTIFIER ::= {
+ * iso(1) member-body(2) us(840) ansi-X9-62(10045) curves(3) prime(1) 7 } */
+#define MBEDTLS_OID_EC_GRP_SECP256R1 MBEDTLS_OID_ANSI_X9_62 "\x03\x01\x07"
+
+/* secp384r1 OBJECT IDENTIFIER ::= {
+ * iso(1) identified-organization(3) certicom(132) curve(0) 34 } */
+#define MBEDTLS_OID_EC_GRP_SECP384R1 MBEDTLS_OID_CERTICOM "\x00\x22"
+
+/* secp521r1 OBJECT IDENTIFIER ::= {
+ * iso(1) identified-organization(3) certicom(132) curve(0) 35 } */
+#define MBEDTLS_OID_EC_GRP_SECP521R1 MBEDTLS_OID_CERTICOM "\x00\x23"
+
+/* secp192k1 OBJECT IDENTIFIER ::= {
+ * iso(1) identified-organization(3) certicom(132) curve(0) 31 } */
+#define MBEDTLS_OID_EC_GRP_SECP192K1 MBEDTLS_OID_CERTICOM "\x00\x1f"
+
+/* secp224k1 OBJECT IDENTIFIER ::= {
+ * iso(1) identified-organization(3) certicom(132) curve(0) 32 } */
+#define MBEDTLS_OID_EC_GRP_SECP224K1 MBEDTLS_OID_CERTICOM "\x00\x20"
+
+/* secp256k1 OBJECT IDENTIFIER ::= {
+ * iso(1) identified-organization(3) certicom(132) curve(0) 10 } */
+#define MBEDTLS_OID_EC_GRP_SECP256K1 MBEDTLS_OID_CERTICOM "\x00\x0a"
+
+/* RFC 5639 4.1
+ * ecStdCurvesAndGeneration OBJECT IDENTIFIER::= {iso(1)
+ * identified-organization(3) teletrust(36) algorithm(3) signature-
+ * algorithm(3) ecSign(2) 8}
+ * ellipticCurve OBJECT IDENTIFIER ::= {ecStdCurvesAndGeneration 1}
+ * versionOne OBJECT IDENTIFIER ::= {ellipticCurve 1} */
+#define MBEDTLS_OID_EC_BRAINPOOL_V1 MBEDTLS_OID_TELETRUST "\x03\x03\x02\x08\x01\x01"
+
+/* brainpoolP256r1 OBJECT IDENTIFIER ::= {versionOne 7} */
+#define MBEDTLS_OID_EC_GRP_BP256R1 MBEDTLS_OID_EC_BRAINPOOL_V1 "\x07"
+
+/* brainpoolP384r1 OBJECT IDENTIFIER ::= {versionOne 11} */
+#define MBEDTLS_OID_EC_GRP_BP384R1 MBEDTLS_OID_EC_BRAINPOOL_V1 "\x0B"
+
+/* brainpoolP512r1 OBJECT IDENTIFIER ::= {versionOne 13} */
+#define MBEDTLS_OID_EC_GRP_BP512R1 MBEDTLS_OID_EC_BRAINPOOL_V1 "\x0D"
+
+/*
+ * SEC1 C.1
+ *
+ * prime-field OBJECT IDENTIFIER ::= { id-fieldType 1 }
+ * id-fieldType OBJECT IDENTIFIER ::= { ansi-X9-62 fieldType(1)}
+ */
+#define MBEDTLS_OID_ANSI_X9_62_FIELD_TYPE MBEDTLS_OID_ANSI_X9_62 "\x01"
+#define MBEDTLS_OID_ANSI_X9_62_PRIME_FIELD MBEDTLS_OID_ANSI_X9_62_FIELD_TYPE "\x01"
+
+/*
+ * ECDSA signature identifiers, from RFC 5480
+ */
+#define MBEDTLS_OID_ANSI_X9_62_SIG MBEDTLS_OID_ANSI_X9_62 "\x04" /* signatures(4) */
+#define MBEDTLS_OID_ANSI_X9_62_SIG_SHA2 MBEDTLS_OID_ANSI_X9_62_SIG "\x03" /* ecdsa-with-SHA2(3) */
+
+/* ecdsa-with-SHA1 OBJECT IDENTIFIER ::= {
+ * iso(1) member-body(2) us(840) ansi-X9-62(10045) signatures(4) 1 } */
+#define MBEDTLS_OID_ECDSA_SHA1 MBEDTLS_OID_ANSI_X9_62_SIG "\x01"
+
+/* ecdsa-with-SHA224 OBJECT IDENTIFIER ::= {
+ * iso(1) member-body(2) us(840) ansi-X9-62(10045) signatures(4)
+ * ecdsa-with-SHA2(3) 1 } */
+#define MBEDTLS_OID_ECDSA_SHA224 MBEDTLS_OID_ANSI_X9_62_SIG_SHA2 "\x01"
+
+/* ecdsa-with-SHA256 OBJECT IDENTIFIER ::= {
+ * iso(1) member-body(2) us(840) ansi-X9-62(10045) signatures(4)
+ * ecdsa-with-SHA2(3) 2 } */
+#define MBEDTLS_OID_ECDSA_SHA256 MBEDTLS_OID_ANSI_X9_62_SIG_SHA2 "\x02"
+
+/* ecdsa-with-SHA384 OBJECT IDENTIFIER ::= {
+ * iso(1) member-body(2) us(840) ansi-X9-62(10045) signatures(4)
+ * ecdsa-with-SHA2(3) 3 } */
+#define MBEDTLS_OID_ECDSA_SHA384 MBEDTLS_OID_ANSI_X9_62_SIG_SHA2 "\x03"
+
+/* ecdsa-with-SHA512 OBJECT IDENTIFIER ::= {
+ * iso(1) member-body(2) us(840) ansi-X9-62(10045) signatures(4)
+ * ecdsa-with-SHA2(3) 4 } */
+#define MBEDTLS_OID_ECDSA_SHA512 MBEDTLS_OID_ANSI_X9_62_SIG_SHA2 "\x04"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief Base OID descriptor structure
+ */
+typedef struct mbedtls_oid_descriptor_t
+{
+ const char *asn1; /*!< OID ASN.1 representation */
+ size_t asn1_len; /*!< length of asn1 */
+ const char *name; /*!< official name (e.g. from RFC) */
+ const char *description; /*!< human friendly description */
+} mbedtls_oid_descriptor_t;
+
+/**
+ * \brief Translate an ASN.1 OID into its numeric representation
+ * (e.g. "\x2A\x86\x48\x86\xF7\x0D" into "1.2.840.113549")
+ *
+ * \param buf buffer to put representation in
+ * \param size size of the buffer
+ * \param oid OID to translate
+ *
+ * \return Length of the string written (excluding final NULL) or
+ * MBEDTLS_ERR_OID_BUF_TOO_SMALL in case of error
+ */
+int mbedtls_oid_get_numeric_string( char *buf, size_t size, const mbedtls_asn1_buf *oid );
+
+#if defined(MBEDTLS_X509_USE_C) || defined(MBEDTLS_X509_CREATE_C)
+/**
+ * \brief Translate an X.509 extension OID into local values
+ *
+ * \param oid OID to use
+ * \param ext_type place to store the extension type
+ *
+ * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_x509_ext_type( const mbedtls_asn1_buf *oid, int *ext_type );
+#endif
+
+/**
+ * \brief Translate an X.509 attribute type OID into the short name
+ * (e.g. the OID for an X520 Common Name into "CN")
+ *
+ * \param oid OID to use
+ * \param short_name place to store the string pointer
+ *
+ * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_attr_short_name( const mbedtls_asn1_buf *oid, const char **short_name );
+
+/**
+ * \brief Translate PublicKeyAlgorithm OID into pk_type
+ *
+ * \param oid OID to use
+ * \param pk_alg place to store public key algorithm
+ *
+ * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_pk_alg( const mbedtls_asn1_buf *oid, mbedtls_pk_type_t *pk_alg );
+
+/**
+ * \brief Translate pk_type into PublicKeyAlgorithm OID
+ *
+ * \param pk_alg Public key type to look for
+ * \param oid place to store ASN.1 OID string pointer
+ * \param olen length of the OID
+ *
+ * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_oid_by_pk_alg( mbedtls_pk_type_t pk_alg,
+ const char **oid, size_t *olen );
+
+#if defined(MBEDTLS_ECP_C)
+/**
+ * \brief Translate NamedCurve OID into an EC group identifier
+ *
+ * \param oid OID to use
+ * \param grp_id place to store group id
+ *
+ * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_ec_grp( const mbedtls_asn1_buf *oid, mbedtls_ecp_group_id *grp_id );
+
+/**
+ * \brief Translate EC group identifier into NamedCurve OID
+ *
+ * \param grp_id EC group identifier
+ * \param oid place to store ASN.1 OID string pointer
+ * \param olen length of the OID
+ *
+ * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_oid_by_ec_grp( mbedtls_ecp_group_id grp_id,
+ const char **oid, size_t *olen );
+#endif /* MBEDTLS_ECP_C */
+
+#if defined(MBEDTLS_MD_C)
+/**
+ * \brief Translate SignatureAlgorithm OID into md_type and pk_type
+ *
+ * \param oid OID to use
+ * \param md_alg place to store message digest algorithm
+ * \param pk_alg place to store public key algorithm
+ *
+ * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_sig_alg( const mbedtls_asn1_buf *oid,
+ mbedtls_md_type_t *md_alg, mbedtls_pk_type_t *pk_alg );
+
+/**
+ * \brief Translate SignatureAlgorithm OID into description
+ *
+ * \param oid OID to use
+ * \param desc place to store string pointer
+ *
+ * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_sig_alg_desc( const mbedtls_asn1_buf *oid, const char **desc );
+
+/**
+ * \brief Translate md_type and pk_type into SignatureAlgorithm OID
+ *
+ * \param md_alg message digest algorithm
+ * \param pk_alg public key algorithm
+ * \param oid place to store ASN.1 OID string pointer
+ * \param olen length of the OID
+ *
+ * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_oid_by_sig_alg( mbedtls_pk_type_t pk_alg, mbedtls_md_type_t md_alg,
+ const char **oid, size_t *olen );
+
+/**
+ * \brief Translate hash algorithm OID into md_type
+ *
+ * \param oid OID to use
+ * \param md_alg place to store message digest algorithm
+ *
+ * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_md_alg( const mbedtls_asn1_buf *oid, mbedtls_md_type_t *md_alg );
+
+/**
+ * \brief Translate hmac algorithm OID into md_type
+ *
+ * \param oid OID to use
+ * \param md_hmac place to store message hmac algorithm
+ *
+ * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_md_hmac( const mbedtls_asn1_buf *oid, mbedtls_md_type_t *md_hmac );
+#endif /* MBEDTLS_MD_C */
+
+/**
+ * \brief Translate Extended Key Usage OID into description
+ *
+ * \param oid OID to use
+ * \param desc place to store string pointer
+ *
+ * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_extended_key_usage( const mbedtls_asn1_buf *oid, const char **desc );
+
+/**
+ * \brief Translate md_type into hash algorithm OID
+ *
+ * \param md_alg message digest algorithm
+ * \param oid place to store ASN.1 OID string pointer
+ * \param olen length of the OID
+ *
+ * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_oid_by_md( mbedtls_md_type_t md_alg, const char **oid, size_t *olen );
+
+#if defined(MBEDTLS_CIPHER_C)
+/**
+ * \brief Translate encryption algorithm OID into cipher_type
+ *
+ * \param oid OID to use
+ * \param cipher_alg place to store cipher algorithm
+ *
+ * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_cipher_alg( const mbedtls_asn1_buf *oid, mbedtls_cipher_type_t *cipher_alg );
+#endif /* MBEDTLS_CIPHER_C */
+
+#if defined(MBEDTLS_PKCS12_C)
+/**
+ * \brief Translate PKCS#12 PBE algorithm OID into md_type and
+ * cipher_type
+ *
+ * \param oid OID to use
+ * \param md_alg place to store message digest algorithm
+ * \param cipher_alg place to store cipher algorithm
+ *
+ * \return 0 if successful, or MBEDTLS_ERR_OID_NOT_FOUND
+ */
+int mbedtls_oid_get_pkcs12_pbe_alg( const mbedtls_asn1_buf *oid, mbedtls_md_type_t *md_alg,
+ mbedtls_cipher_type_t *cipher_alg );
+#endif /* MBEDTLS_PKCS12_C */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* oid.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/padlock.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/padlock.h
new file mode 100644
index 0000000..721a5d4
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/padlock.h
@@ -0,0 +1,126 @@
+/**
+ * \file padlock.h
+ *
+ * \brief VIA PadLock ACE for HW encryption/decryption supported by some
+ * processors
+ *
+ * \warning These functions are only for internal use by other library
+ * functions; you must not call them directly.
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_PADLOCK_H
+#define MBEDTLS_PADLOCK_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "aes.h"
+
+#define MBEDTLS_ERR_PADLOCK_DATA_MISALIGNED -0x0030 /**< Input data should be aligned. */
+
+#if defined(__has_feature)
+#if __has_feature(address_sanitizer)
+#define MBEDTLS_HAVE_ASAN
+#endif
+#endif
+
+/* Some versions of ASan result in errors about not enough registers */
+#if defined(MBEDTLS_HAVE_ASM) && defined(__GNUC__) && defined(__i386__) && \
+ !defined(MBEDTLS_HAVE_ASAN)
+
+#ifndef MBEDTLS_HAVE_X86
+#define MBEDTLS_HAVE_X86
+#endif
+
+#include <stdint.h>
+
+#define MBEDTLS_PADLOCK_RNG 0x000C
+#define MBEDTLS_PADLOCK_ACE 0x00C0
+#define MBEDTLS_PADLOCK_PHE 0x0C00
+#define MBEDTLS_PADLOCK_PMM 0x3000
+
+#define MBEDTLS_PADLOCK_ALIGN16(x) (uint32_t *) (16 + ((int32_t) (x) & ~15))
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief Internal PadLock detection routine
+ *
+ * \note This function is only for internal use by other library
+ * functions; you must not call it directly.
+ *
+ * \param feature The feature to detect
+ *
+ * \return 1 if CPU has support for the feature, 0 otherwise
+ */
+int mbedtls_padlock_has_support( int feature );
+
+/**
+ * \brief Internal PadLock AES-ECB block en(de)cryption
+ *
+ * \note This function is only for internal use by other library
+ * functions; you must not call it directly.
+ *
+ * \param ctx AES context
+ * \param mode MBEDTLS_AES_ENCRYPT or MBEDTLS_AES_DECRYPT
+ * \param input 16-byte input block
+ * \param output 16-byte output block
+ *
+ * \return 0 if success, 1 if operation failed
+ */
+int mbedtls_padlock_xcryptecb( mbedtls_aes_context *ctx,
+ int mode,
+ const unsigned char input[16],
+ unsigned char output[16] );
+
+/**
+ * \brief Internal PadLock AES-CBC buffer en(de)cryption
+ *
+ * \note This function is only for internal use by other library
+ * functions; you must not call it directly.
+ *
+ * \param ctx AES context
+ * \param mode MBEDTLS_AES_ENCRYPT or MBEDTLS_AES_DECRYPT
+ * \param length length of the input data
+ * \param iv initialization vector (updated after use)
+ * \param input buffer holding the input data
+ * \param output buffer holding the output data
+ *
+ * \return 0 if success, 1 if operation failed
+ */
+int mbedtls_padlock_xcryptcbc( mbedtls_aes_context *ctx,
+ int mode,
+ size_t length,
+ unsigned char iv[16],
+ const unsigned char *input,
+ unsigned char *output );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* HAVE_X86 */
+
+#endif /* padlock.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/pem.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/pem.h
new file mode 100644
index 0000000..a29e9ce
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/pem.h
@@ -0,0 +1,136 @@
+/**
+ * \file pem.h
+ *
+ * \brief Privacy Enhanced Mail (PEM) decoding
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_PEM_H
+#define MBEDTLS_PEM_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+
+/**
+ * \name PEM Error codes
+ * These error codes are returned in case of errors reading the
+ * PEM data.
+ * \{
+ */
+#define MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT -0x1080 /**< No PEM header or footer found. */
+#define MBEDTLS_ERR_PEM_INVALID_DATA -0x1100 /**< PEM string is not as expected. */
+#define MBEDTLS_ERR_PEM_ALLOC_FAILED -0x1180 /**< Failed to allocate memory. */
+#define MBEDTLS_ERR_PEM_INVALID_ENC_IV -0x1200 /**< RSA IV is not in hex-format. */
+#define MBEDTLS_ERR_PEM_UNKNOWN_ENC_ALG -0x1280 /**< Unsupported key encryption algorithm. */
+#define MBEDTLS_ERR_PEM_PASSWORD_REQUIRED -0x1300 /**< Private key password can't be empty. */
+#define MBEDTLS_ERR_PEM_PASSWORD_MISMATCH -0x1380 /**< Given private key password does not allow for correct decryption. */
+#define MBEDTLS_ERR_PEM_FEATURE_UNAVAILABLE -0x1400 /**< Unavailable feature, e.g. hashing/encryption combination. */
+#define MBEDTLS_ERR_PEM_BAD_INPUT_DATA -0x1480 /**< Bad input parameters to function. */
+/* \} name */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(MBEDTLS_PEM_PARSE_C)
+/**
+ * \brief PEM context structure
+ */
+typedef struct mbedtls_pem_context
+{
+ unsigned char *buf; /*!< buffer for decoded data */
+ size_t buflen; /*!< length of the buffer */
+ unsigned char *info; /*!< buffer for extra header information */
+}
+mbedtls_pem_context;
+
+/**
+ * \brief PEM context setup
+ *
+ * \param ctx context to be initialized
+ */
+void mbedtls_pem_init( mbedtls_pem_context *ctx );
+
+/**
+ * \brief Read a buffer for PEM information and store the resulting
+ * data into the specified context buffers.
+ *
+ * \param ctx context to use
+ * \param header header string to seek and expect
+ * \param footer footer string to seek and expect
+ * \param data source data to look in (must be nul-terminated)
+ * \param pwd password for decryption (can be NULL)
+ * \param pwdlen length of password
+ * \param use_len destination for total length used (set after header is
+ * correctly read, so unless you get
+ * MBEDTLS_ERR_PEM_BAD_INPUT_DATA or
+ * MBEDTLS_ERR_PEM_NO_HEADER_FOOTER_PRESENT, use_len is
+ * the length to skip)
+ *
+ * \note Attempts to check password correctness by verifying if
+ * the decrypted text starts with an ASN.1 sequence of
+ * appropriate length
+ *
+ * \return 0 on success, or a specific PEM error code
+ */
+int mbedtls_pem_read_buffer( mbedtls_pem_context *ctx, const char *header, const char *footer,
+ const unsigned char *data,
+ const unsigned char *pwd,
+ size_t pwdlen, size_t *use_len );
+
+/**
+ * \brief PEM context memory freeing
+ *
+ * \param ctx context to be freed
+ */
+void mbedtls_pem_free( mbedtls_pem_context *ctx );
+#endif /* MBEDTLS_PEM_PARSE_C */
+
+#if defined(MBEDTLS_PEM_WRITE_C)
+/**
+ * \brief Write a buffer of PEM information from a DER encoded
+ * buffer.
+ *
+ * \param header header string to write
+ * \param footer footer string to write
+ * \param der_data DER data to write
+ * \param der_len length of the DER data
+ * \param buf buffer to write to
+ * \param buf_len length of output buffer
+ * \param olen total length written / required (if buf_len is not enough)
+ *
+ * \return 0 on success, or a specific PEM or BASE64 error code. On
+ * MBEDTLS_ERR_BASE64_BUFFER_TOO_SMALL olen is the required
+ * size.
+ */
+int mbedtls_pem_write_buffer( const char *header, const char *footer,
+ const unsigned char *der_data, size_t der_len,
+ unsigned char *buf, size_t buf_len, size_t *olen );
+#endif /* MBEDTLS_PEM_WRITE_C */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* pem.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/pk.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/pk.h
new file mode 100644
index 0000000..91950f9
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/pk.h
@@ -0,0 +1,747 @@
+/**
+ * \file pk.h
+ *
+ * \brief Public Key abstraction layer
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+
+#ifndef MBEDTLS_PK_H
+#define MBEDTLS_PK_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "md.h"
+
+#if defined(MBEDTLS_RSA_C)
+#include "rsa.h"
+#endif
+
+#if defined(MBEDTLS_ECP_C)
+#include "ecp.h"
+#endif
+
+#if defined(MBEDTLS_ECDSA_C)
+#include "ecdsa.h"
+#endif
+
+#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
+ !defined(inline) && !defined(__cplusplus)
+#define inline __inline
+#endif
+
+#define MBEDTLS_ERR_PK_ALLOC_FAILED -0x3F80 /**< Memory allocation failed. */
+#define MBEDTLS_ERR_PK_TYPE_MISMATCH -0x3F00 /**< Type mismatch, eg attempt to encrypt with an ECDSA key */
+#define MBEDTLS_ERR_PK_BAD_INPUT_DATA -0x3E80 /**< Bad input parameters to function. */
+#define MBEDTLS_ERR_PK_FILE_IO_ERROR -0x3E00 /**< Read/write of file failed. */
+#define MBEDTLS_ERR_PK_KEY_INVALID_VERSION -0x3D80 /**< Unsupported key version */
+#define MBEDTLS_ERR_PK_KEY_INVALID_FORMAT -0x3D00 /**< Invalid key tag or value. */
+#define MBEDTLS_ERR_PK_UNKNOWN_PK_ALG -0x3C80 /**< Key algorithm is unsupported (only RSA and EC are supported). */
+#define MBEDTLS_ERR_PK_PASSWORD_REQUIRED -0x3C00 /**< Private key password can't be empty. */
+#define MBEDTLS_ERR_PK_PASSWORD_MISMATCH -0x3B80 /**< Given private key password does not allow for correct decryption. */
+#define MBEDTLS_ERR_PK_INVALID_PUBKEY -0x3B00 /**< The pubkey tag or value is invalid (only RSA and EC are supported). */
+#define MBEDTLS_ERR_PK_INVALID_ALG -0x3A80 /**< The algorithm tag or value is invalid. */
+#define MBEDTLS_ERR_PK_UNKNOWN_NAMED_CURVE -0x3A00 /**< Elliptic curve is unsupported (only NIST curves are supported). */
+#define MBEDTLS_ERR_PK_FEATURE_UNAVAILABLE -0x3980 /**< Unavailable feature, e.g. RSA disabled for RSA key. */
+#define MBEDTLS_ERR_PK_SIG_LEN_MISMATCH -0x3900 /**< The buffer contains a valid signature followed by more data. */
+
+/* MBEDTLS_ERR_PK_HW_ACCEL_FAILED is deprecated and should not be used. */
+#define MBEDTLS_ERR_PK_HW_ACCEL_FAILED -0x3880 /**< PK hardware accelerator failed. */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief Public key types
+ */
+typedef enum {
+ MBEDTLS_PK_NONE=0,
+ MBEDTLS_PK_RSA,
+ MBEDTLS_PK_ECKEY,
+ MBEDTLS_PK_ECKEY_DH,
+ MBEDTLS_PK_ECDSA,
+ MBEDTLS_PK_RSA_ALT,
+ MBEDTLS_PK_RSASSA_PSS,
+} mbedtls_pk_type_t;
+
+/**
+ * \brief Options for RSASSA-PSS signature verification.
+ * See \c mbedtls_rsa_rsassa_pss_verify_ext()
+ */
+typedef struct mbedtls_pk_rsassa_pss_options
+{
+ mbedtls_md_type_t mgf1_hash_id;
+ int expected_salt_len;
+
+} mbedtls_pk_rsassa_pss_options;
+
+/**
+ * \brief Types for interfacing with the debug module
+ */
+typedef enum
+{
+ MBEDTLS_PK_DEBUG_NONE = 0,
+ MBEDTLS_PK_DEBUG_MPI,
+ MBEDTLS_PK_DEBUG_ECP,
+} mbedtls_pk_debug_type;
+
+/**
+ * \brief Item to send to the debug module
+ */
+typedef struct mbedtls_pk_debug_item
+{
+ mbedtls_pk_debug_type type;
+ const char *name;
+ void *value;
+} mbedtls_pk_debug_item;
+
+/** Maximum number of item send for debugging, plus 1 */
+#define MBEDTLS_PK_DEBUG_MAX_ITEMS 3
+
+/**
+ * \brief Public key information and operations
+ */
+typedef struct mbedtls_pk_info_t mbedtls_pk_info_t;
+
+/**
+ * \brief Public key container
+ */
+typedef struct mbedtls_pk_context
+{
+ const mbedtls_pk_info_t * pk_info; /**< Public key information */
+ void * pk_ctx; /**< Underlying public key context */
+} mbedtls_pk_context;
+
+#if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE)
+/**
+ * \brief Context for resuming operations
+ */
+typedef struct
+{
+ const mbedtls_pk_info_t * pk_info; /**< Public key information */
+ void * rs_ctx; /**< Underlying restart context */
+} mbedtls_pk_restart_ctx;
+#else /* MBEDTLS_ECDSA_C && MBEDTLS_ECP_RESTARTABLE */
+/* Now we can declare functions that take a pointer to that */
+typedef void mbedtls_pk_restart_ctx;
+#endif /* MBEDTLS_ECDSA_C && MBEDTLS_ECP_RESTARTABLE */
+
+#if defined(MBEDTLS_RSA_C)
+/**
+ * Quick access to an RSA context inside a PK context.
+ *
+ * \warning You must make sure the PK context actually holds an RSA context
+ * before using this function!
+ */
+static inline mbedtls_rsa_context *mbedtls_pk_rsa( const mbedtls_pk_context pk )
+{
+ return( (mbedtls_rsa_context *) (pk).pk_ctx );
+}
+#endif /* MBEDTLS_RSA_C */
+
+#if defined(MBEDTLS_ECP_C)
+/**
+ * Quick access to an EC context inside a PK context.
+ *
+ * \warning You must make sure the PK context actually holds an EC context
+ * before using this function!
+ */
+static inline mbedtls_ecp_keypair *mbedtls_pk_ec( const mbedtls_pk_context pk )
+{
+ return( (mbedtls_ecp_keypair *) (pk).pk_ctx );
+}
+#endif /* MBEDTLS_ECP_C */
+
+#if defined(MBEDTLS_PK_RSA_ALT_SUPPORT)
+/**
+ * \brief Types for RSA-alt abstraction
+ */
+typedef int (*mbedtls_pk_rsa_alt_decrypt_func)( void *ctx, int mode, size_t *olen,
+ const unsigned char *input, unsigned char *output,
+ size_t output_max_len );
+typedef int (*mbedtls_pk_rsa_alt_sign_func)( void *ctx,
+ int (*f_rng)(void *, unsigned char *, size_t), void *p_rng,
+ int mode, mbedtls_md_type_t md_alg, unsigned int hashlen,
+ const unsigned char *hash, unsigned char *sig );
+typedef size_t (*mbedtls_pk_rsa_alt_key_len_func)( void *ctx );
+#endif /* MBEDTLS_PK_RSA_ALT_SUPPORT */
+
+/**
+ * \brief Return information associated with the given PK type
+ *
+ * \param pk_type PK type to search for.
+ *
+ * \return The PK info associated with the type or NULL if not found.
+ */
+const mbedtls_pk_info_t *mbedtls_pk_info_from_type( mbedtls_pk_type_t pk_type );
+
+/**
+ * \brief Initialize a #mbedtls_pk_context (as NONE).
+ *
+ * \param ctx The context to initialize.
+ * This must not be \c NULL.
+ */
+void mbedtls_pk_init( mbedtls_pk_context *ctx );
+
+/**
+ * \brief Free the components of a #mbedtls_pk_context.
+ *
+ * \param ctx The context to clear. It must have been initialized.
+ * If this is \c NULL, this function does nothing.
+ */
+void mbedtls_pk_free( mbedtls_pk_context *ctx );
+
+#if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE)
+/**
+ * \brief Initialize a restart context
+ *
+ * \param ctx The context to initialize.
+ * This must not be \c NULL.
+ */
+void mbedtls_pk_restart_init( mbedtls_pk_restart_ctx *ctx );
+
+/**
+ * \brief Free the components of a restart context
+ *
+ * \param ctx The context to clear. It must have been initialized.
+ * If this is \c NULL, this function does nothing.
+ */
+void mbedtls_pk_restart_free( mbedtls_pk_restart_ctx *ctx );
+#endif /* MBEDTLS_ECDSA_C && MBEDTLS_ECP_RESTARTABLE */
+
+/**
+ * \brief Initialize a PK context with the information given
+ * and allocates the type-specific PK subcontext.
+ *
+ * \param ctx Context to initialize. It must not have been set
+ * up yet (type #MBEDTLS_PK_NONE).
+ * \param info Information to use
+ *
+ * \return 0 on success,
+ * MBEDTLS_ERR_PK_BAD_INPUT_DATA on invalid input,
+ * MBEDTLS_ERR_PK_ALLOC_FAILED on allocation failure.
+ *
+ * \note For contexts holding an RSA-alt key, use
+ * \c mbedtls_pk_setup_rsa_alt() instead.
+ */
+int mbedtls_pk_setup( mbedtls_pk_context *ctx, const mbedtls_pk_info_t *info );
+
+#if defined(MBEDTLS_PK_RSA_ALT_SUPPORT)
+/**
+ * \brief Initialize an RSA-alt context
+ *
+ * \param ctx Context to initialize. It must not have been set
+ * up yet (type #MBEDTLS_PK_NONE).
+ * \param key RSA key pointer
+ * \param decrypt_func Decryption function
+ * \param sign_func Signing function
+ * \param key_len_func Function returning key length in bytes
+ *
+ * \return 0 on success, or MBEDTLS_ERR_PK_BAD_INPUT_DATA if the
+ * context wasn't already initialized as RSA_ALT.
+ *
+ * \note This function replaces \c mbedtls_pk_setup() for RSA-alt.
+ */
+int mbedtls_pk_setup_rsa_alt( mbedtls_pk_context *ctx, void * key,
+ mbedtls_pk_rsa_alt_decrypt_func decrypt_func,
+ mbedtls_pk_rsa_alt_sign_func sign_func,
+ mbedtls_pk_rsa_alt_key_len_func key_len_func );
+#endif /* MBEDTLS_PK_RSA_ALT_SUPPORT */
+
+/**
+ * \brief Get the size in bits of the underlying key
+ *
+ * \param ctx The context to query. It must have been initialized.
+ *
+ * \return Key size in bits, or 0 on error
+ */
+size_t mbedtls_pk_get_bitlen( const mbedtls_pk_context *ctx );
+
+/**
+ * \brief Get the length in bytes of the underlying key
+ *
+ * \param ctx The context to query. It must have been initialized.
+ *
+ * \return Key length in bytes, or 0 on error
+ */
+static inline size_t mbedtls_pk_get_len( const mbedtls_pk_context *ctx )
+{
+ return( ( mbedtls_pk_get_bitlen( ctx ) + 7 ) / 8 );
+}
+
+/**
+ * \brief Tell if a context can do the operation given by type
+ *
+ * \param ctx The context to query. It must have been initialized.
+ * \param type The desired type.
+ *
+ * \return 1 if the context can do operations on the given type.
+ * \return 0 if the context cannot do the operations on the given
+ * type. This is always the case for a context that has
+ * been initialized but not set up, or that has been
+ * cleared with mbedtls_pk_free().
+ */
+int mbedtls_pk_can_do( const mbedtls_pk_context *ctx, mbedtls_pk_type_t type );
+
+/**
+ * \brief Verify signature (including padding if relevant).
+ *
+ * \param ctx The PK context to use. It must have been set up.
+ * \param md_alg Hash algorithm used (see notes)
+ * \param hash Hash of the message to sign
+ * \param hash_len Hash length or 0 (see notes)
+ * \param sig Signature to verify
+ * \param sig_len Signature length
+ *
+ * \return 0 on success (signature is valid),
+ * #MBEDTLS_ERR_PK_SIG_LEN_MISMATCH if there is a valid
+ * signature in sig but its length is less than \p siglen,
+ * or a specific error code.
+ *
+ * \note For RSA keys, the default padding type is PKCS#1 v1.5.
+ * Use \c mbedtls_pk_verify_ext( MBEDTLS_PK_RSASSA_PSS, ... )
+ * to verify RSASSA_PSS signatures.
+ *
+ * \note If hash_len is 0, then the length associated with md_alg
+ * is used instead, or an error returned if it is invalid.
+ *
+ * \note md_alg may be MBEDTLS_MD_NONE, only if hash_len != 0
+ */
+int mbedtls_pk_verify( mbedtls_pk_context *ctx, mbedtls_md_type_t md_alg,
+ const unsigned char *hash, size_t hash_len,
+ const unsigned char *sig, size_t sig_len );
+
+/**
+ * \brief Restartable version of \c mbedtls_pk_verify()
+ *
+ * \note Performs the same job as \c mbedtls_pk_verify(), but can
+ * return early and restart according to the limit set with
+ * \c mbedtls_ecp_set_max_ops() to reduce blocking for ECC
+ * operations. For RSA, same as \c mbedtls_pk_verify().
+ *
+ * \param ctx The PK context to use. It must have been set up.
+ * \param md_alg Hash algorithm used (see notes)
+ * \param hash Hash of the message to sign
+ * \param hash_len Hash length or 0 (see notes)
+ * \param sig Signature to verify
+ * \param sig_len Signature length
+ * \param rs_ctx Restart context (NULL to disable restart)
+ *
+ * \return See \c mbedtls_pk_verify(), or
+ * \return #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
+ * operations was reached: see \c mbedtls_ecp_set_max_ops().
+ */
+int mbedtls_pk_verify_restartable( mbedtls_pk_context *ctx,
+ mbedtls_md_type_t md_alg,
+ const unsigned char *hash, size_t hash_len,
+ const unsigned char *sig, size_t sig_len,
+ mbedtls_pk_restart_ctx *rs_ctx );
+
+/**
+ * \brief Verify signature, with options.
+ * (Includes verification of the padding depending on type.)
+ *
+ * \param type Signature type (inc. possible padding type) to verify
+ * \param options Pointer to type-specific options, or NULL
+ * \param ctx The PK context to use. It must have been set up.
+ * \param md_alg Hash algorithm used (see notes)
+ * \param hash Hash of the message to sign
+ * \param hash_len Hash length or 0 (see notes)
+ * \param sig Signature to verify
+ * \param sig_len Signature length
+ *
+ * \return 0 on success (signature is valid),
+ * #MBEDTLS_ERR_PK_TYPE_MISMATCH if the PK context can't be
+ * used for this type of signatures,
+ * #MBEDTLS_ERR_PK_SIG_LEN_MISMATCH if there is a valid
+ * signature in sig but its length is less than \p siglen,
+ * or a specific error code.
+ *
+ * \note If hash_len is 0, then the length associated with md_alg
+ * is used instead, or an error returned if it is invalid.
+ *
+ * \note md_alg may be MBEDTLS_MD_NONE, only if hash_len != 0
+ *
+ * \note If type is MBEDTLS_PK_RSASSA_PSS, then options must point
+ * to a mbedtls_pk_rsassa_pss_options structure,
+ * otherwise it must be NULL.
+ */
+int mbedtls_pk_verify_ext( mbedtls_pk_type_t type, const void *options,
+ mbedtls_pk_context *ctx, mbedtls_md_type_t md_alg,
+ const unsigned char *hash, size_t hash_len,
+ const unsigned char *sig, size_t sig_len );
+
+/**
+ * \brief Make signature, including padding if relevant.
+ *
+ * \param ctx The PK context to use. It must have been set up
+ * with a private key.
+ * \param md_alg Hash algorithm used (see notes)
+ * \param hash Hash of the message to sign
+ * \param hash_len Hash length or 0 (see notes)
+ * \param sig Place to write the signature
+ * \param sig_len Number of bytes written
+ * \param f_rng RNG function
+ * \param p_rng RNG parameter
+ *
+ * \return 0 on success, or a specific error code.
+ *
+ * \note For RSA keys, the default padding type is PKCS#1 v1.5.
+ * There is no interface in the PK module to make RSASSA-PSS
+ * signatures yet.
+ *
+ * \note If hash_len is 0, then the length associated with md_alg
+ * is used instead, or an error returned if it is invalid.
+ *
+ * \note For RSA, md_alg may be MBEDTLS_MD_NONE if hash_len != 0.
+ * For ECDSA, md_alg may never be MBEDTLS_MD_NONE.
+ */
+int mbedtls_pk_sign( mbedtls_pk_context *ctx, mbedtls_md_type_t md_alg,
+ const unsigned char *hash, size_t hash_len,
+ unsigned char *sig, size_t *sig_len,
+ int (*f_rng)(void *, unsigned char *, size_t), void *p_rng );
+
+/**
+ * \brief Restartable version of \c mbedtls_pk_sign()
+ *
+ * \note Performs the same job as \c mbedtls_pk_sign(), but can
+ * return early and restart according to the limit set with
+ * \c mbedtls_ecp_set_max_ops() to reduce blocking for ECC
+ * operations. For RSA, same as \c mbedtls_pk_sign().
+ *
+ * \param ctx The PK context to use. It must have been set up
+ * with a private key.
+ * \param md_alg Hash algorithm used (see notes)
+ * \param hash Hash of the message to sign
+ * \param hash_len Hash length or 0 (see notes)
+ * \param sig Place to write the signature
+ * \param sig_len Number of bytes written
+ * \param f_rng RNG function
+ * \param p_rng RNG parameter
+ * \param rs_ctx Restart context (NULL to disable restart)
+ *
+ * \return See \c mbedtls_pk_sign(), or
+ * \return #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
+ * operations was reached: see \c mbedtls_ecp_set_max_ops().
+ */
+int mbedtls_pk_sign_restartable( mbedtls_pk_context *ctx,
+ mbedtls_md_type_t md_alg,
+ const unsigned char *hash, size_t hash_len,
+ unsigned char *sig, size_t *sig_len,
+ int (*f_rng)(void *, unsigned char *, size_t), void *p_rng,
+ mbedtls_pk_restart_ctx *rs_ctx );
+
+/**
+ * \brief Decrypt message (including padding if relevant).
+ *
+ * \param ctx The PK context to use. It must have been set up
+ * with a private key.
+ * \param input Input to decrypt
+ * \param ilen Input size
+ * \param output Decrypted output
+ * \param olen Decrypted message length
+ * \param osize Size of the output buffer
+ * \param f_rng RNG function
+ * \param p_rng RNG parameter
+ *
+ * \note For RSA keys, the default padding type is PKCS#1 v1.5.
+ *
+ * \return 0 on success, or a specific error code.
+ */
+int mbedtls_pk_decrypt( mbedtls_pk_context *ctx,
+ const unsigned char *input, size_t ilen,
+ unsigned char *output, size_t *olen, size_t osize,
+ int (*f_rng)(void *, unsigned char *, size_t), void *p_rng );
+
+/**
+ * \brief Encrypt message (including padding if relevant).
+ *
+ * \param ctx The PK context to use. It must have been set up.
+ * \param input Message to encrypt
+ * \param ilen Message size
+ * \param output Encrypted output
+ * \param olen Encrypted output length
+ * \param osize Size of the output buffer
+ * \param f_rng RNG function
+ * \param p_rng RNG parameter
+ *
+ * \note For RSA keys, the default padding type is PKCS#1 v1.5.
+ *
+ * \return 0 on success, or a specific error code.
+ */
+int mbedtls_pk_encrypt( mbedtls_pk_context *ctx,
+ const unsigned char *input, size_t ilen,
+ unsigned char *output, size_t *olen, size_t osize,
+ int (*f_rng)(void *, unsigned char *, size_t), void *p_rng );
+
+/**
+ * \brief Check if a public-private pair of keys matches.
+ *
+ * \param pub Context holding a public key.
+ * \param prv Context holding a private (and public) key.
+ *
+ * \return 0 on success or MBEDTLS_ERR_PK_BAD_INPUT_DATA
+ */
+int mbedtls_pk_check_pair( const mbedtls_pk_context *pub, const mbedtls_pk_context *prv );
+
+/**
+ * \brief Export debug information
+ *
+ * \param ctx The PK context to use. It must have been initialized.
+ * \param items Place to write debug items
+ *
+ * \return 0 on success or MBEDTLS_ERR_PK_BAD_INPUT_DATA
+ */
+int mbedtls_pk_debug( const mbedtls_pk_context *ctx, mbedtls_pk_debug_item *items );
+
+/**
+ * \brief Access the type name
+ *
+ * \param ctx The PK context to use. It must have been initialized.
+ *
+ * \return Type name on success, or "invalid PK"
+ */
+const char * mbedtls_pk_get_name( const mbedtls_pk_context *ctx );
+
+/**
+ * \brief Get the key type
+ *
+ * \param ctx The PK context to use. It must have been initialized.
+ *
+ * \return Type on success.
+ * \return #MBEDTLS_PK_NONE for a context that has not been set up.
+ */
+mbedtls_pk_type_t mbedtls_pk_get_type( const mbedtls_pk_context *ctx );
+
+#if defined(MBEDTLS_PK_PARSE_C)
+/** \ingroup pk_module */
+/**
+ * \brief Parse a private key in PEM or DER format
+ *
+ * \param ctx The PK context to fill. It must have been initialized
+ * but not set up.
+ * \param key Input buffer to parse.
+ * The buffer must contain the input exactly, with no
+ * extra trailing material. For PEM, the buffer must
+ * contain a null-terminated string.
+ * \param keylen Size of \b key in bytes.
+ * For PEM data, this includes the terminating null byte,
+ * so \p keylen must be equal to `strlen(key) + 1`.
+ * \param pwd Optional password for decryption.
+ * Pass \c NULL if expecting a non-encrypted key.
+ * Pass a string of \p pwdlen bytes if expecting an encrypted
+ * key; a non-encrypted key will also be accepted.
+ * The empty password is not supported.
+ * \param pwdlen Size of the password in bytes.
+ * Ignored if \p pwd is \c NULL.
+ *
+ * \note On entry, ctx must be empty, either freshly initialised
+ * with mbedtls_pk_init() or reset with mbedtls_pk_free(). If you need a
+ * specific key type, check the result with mbedtls_pk_can_do().
+ *
+ * \note The key is also checked for correctness.
+ *
+ * \return 0 if successful, or a specific PK or PEM error code
+ */
+int mbedtls_pk_parse_key( mbedtls_pk_context *ctx,
+ const unsigned char *key, size_t keylen,
+ const unsigned char *pwd, size_t pwdlen );
+
+/** \ingroup pk_module */
+/**
+ * \brief Parse a public key in PEM or DER format
+ *
+ * \param ctx The PK context to fill. It must have been initialized
+ * but not set up.
+ * \param key Input buffer to parse.
+ * The buffer must contain the input exactly, with no
+ * extra trailing material. For PEM, the buffer must
+ * contain a null-terminated string.
+ * \param keylen Size of \b key in bytes.
+ * For PEM data, this includes the terminating null byte,
+ * so \p keylen must be equal to `strlen(key) + 1`.
+ *
+ * \note On entry, ctx must be empty, either freshly initialised
+ * with mbedtls_pk_init() or reset with mbedtls_pk_free(). If you need a
+ * specific key type, check the result with mbedtls_pk_can_do().
+ *
+ * \note The key is also checked for correctness.
+ *
+ * \return 0 if successful, or a specific PK or PEM error code
+ */
+int mbedtls_pk_parse_public_key( mbedtls_pk_context *ctx,
+ const unsigned char *key, size_t keylen );
+
+#if defined(MBEDTLS_FS_IO)
+/** \ingroup pk_module */
+/**
+ * \brief Load and parse a private key
+ *
+ * \param ctx The PK context to fill. It must have been initialized
+ * but not set up.
+ * \param path filename to read the private key from
+ * \param password Optional password to decrypt the file.
+ * Pass \c NULL if expecting a non-encrypted key.
+ * Pass a null-terminated string if expecting an encrypted
+ * key; a non-encrypted key will also be accepted.
+ * The empty password is not supported.
+ *
+ * \note On entry, ctx must be empty, either freshly initialised
+ * with mbedtls_pk_init() or reset with mbedtls_pk_free(). If you need a
+ * specific key type, check the result with mbedtls_pk_can_do().
+ *
+ * \note The key is also checked for correctness.
+ *
+ * \return 0 if successful, or a specific PK or PEM error code
+ */
+int mbedtls_pk_parse_keyfile( mbedtls_pk_context *ctx,
+ const char *path, const char *password );
+
+/** \ingroup pk_module */
+/**
+ * \brief Load and parse a public key
+ *
+ * \param ctx The PK context to fill. It must have been initialized
+ * but not set up.
+ * \param path filename to read the public key from
+ *
+ * \note On entry, ctx must be empty, either freshly initialised
+ * with mbedtls_pk_init() or reset with mbedtls_pk_free(). If
+ * you need a specific key type, check the result with
+ * mbedtls_pk_can_do().
+ *
+ * \note The key is also checked for correctness.
+ *
+ * \return 0 if successful, or a specific PK or PEM error code
+ */
+int mbedtls_pk_parse_public_keyfile( mbedtls_pk_context *ctx, const char *path );
+#endif /* MBEDTLS_FS_IO */
+#endif /* MBEDTLS_PK_PARSE_C */
+
+#if defined(MBEDTLS_PK_WRITE_C)
+/**
+ * \brief Write a private key to a PKCS#1 or SEC1 DER structure
+ * Note: data is written at the end of the buffer! Use the
+ * return value to determine where you should start
+ * using the buffer
+ *
+ * \param ctx PK context which must contain a valid private key.
+ * \param buf buffer to write to
+ * \param size size of the buffer
+ *
+ * \return length of data written if successful, or a specific
+ * error code
+ */
+int mbedtls_pk_write_key_der( mbedtls_pk_context *ctx, unsigned char *buf, size_t size );
+
+/**
+ * \brief Write a public key to a SubjectPublicKeyInfo DER structure
+ * Note: data is written at the end of the buffer! Use the
+ * return value to determine where you should start
+ * using the buffer
+ *
+ * \param ctx PK context which must contain a valid public or private key.
+ * \param buf buffer to write to
+ * \param size size of the buffer
+ *
+ * \return length of data written if successful, or a specific
+ * error code
+ */
+int mbedtls_pk_write_pubkey_der( mbedtls_pk_context *ctx, unsigned char *buf, size_t size );
+
+#if defined(MBEDTLS_PEM_WRITE_C)
+/**
+ * \brief Write a public key to a PEM string
+ *
+ * \param ctx PK context which must contain a valid public or private key.
+ * \param buf Buffer to write to. The output includes a
+ * terminating null byte.
+ * \param size Size of the buffer in bytes.
+ *
+ * \return 0 if successful, or a specific error code
+ */
+int mbedtls_pk_write_pubkey_pem( mbedtls_pk_context *ctx, unsigned char *buf, size_t size );
+
+/**
+ * \brief Write a private key to a PKCS#1 or SEC1 PEM string
+ *
+ * \param ctx PK context which must contain a valid private key.
+ * \param buf Buffer to write to. The output includes a
+ * terminating null byte.
+ * \param size Size of the buffer in bytes.
+ *
+ * \return 0 if successful, or a specific error code
+ */
+int mbedtls_pk_write_key_pem( mbedtls_pk_context *ctx, unsigned char *buf, size_t size );
+#endif /* MBEDTLS_PEM_WRITE_C */
+#endif /* MBEDTLS_PK_WRITE_C */
+
+/*
+ * WARNING: Low-level functions. You probably do not want to use these unless
+ * you are certain you do ;)
+ */
+
+#if defined(MBEDTLS_PK_PARSE_C)
+/**
+ * \brief Parse a SubjectPublicKeyInfo DER structure
+ *
+ * \param p the position in the ASN.1 data
+ * \param end end of the buffer
+ * \param pk The PK context to fill. It must have been initialized
+ * but not set up.
+ *
+ * \return 0 if successful, or a specific PK error code
+ */
+int mbedtls_pk_parse_subpubkey( unsigned char **p, const unsigned char *end,
+ mbedtls_pk_context *pk );
+#endif /* MBEDTLS_PK_PARSE_C */
+
+#if defined(MBEDTLS_PK_WRITE_C)
+/**
+ * \brief Write a subjectPublicKey to ASN.1 data
+ * Note: function works backwards in data buffer
+ *
+ * \param p reference to current position pointer
+ * \param start start of the buffer (for bounds-checking)
+ * \param key PK context which must contain a valid public or private key.
+ *
+ * \return the length written or a negative error code
+ */
+int mbedtls_pk_write_pubkey( unsigned char **p, unsigned char *start,
+ const mbedtls_pk_context *key );
+#endif /* MBEDTLS_PK_WRITE_C */
+
+/*
+ * Internal module functions. You probably do not want to use these unless you
+ * know you do.
+ */
+#if defined(MBEDTLS_FS_IO)
+int mbedtls_pk_load_file( const char *path, unsigned char **buf, size_t *n );
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_PK_H */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/pk_internal.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/pk_internal.h
new file mode 100644
index 0000000..48b7a5f
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/pk_internal.h
@@ -0,0 +1,138 @@
+/**
+ * \file pk_internal.h
+ *
+ * \brief Public Key abstraction layer: wrapper functions
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+
+#ifndef MBEDTLS_PK_WRAP_H
+#define MBEDTLS_PK_WRAP_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "pk.h"
+
+struct mbedtls_pk_info_t
+{
+ /** Public key type */
+ mbedtls_pk_type_t type;
+
+ /** Type name */
+ const char *name;
+
+ /** Get key size in bits */
+ size_t (*get_bitlen)( const void * );
+
+ /** Tell if the context implements this type (e.g. ECKEY can do ECDSA) */
+ int (*can_do)( mbedtls_pk_type_t type );
+
+ /** Verify signature */
+ int (*verify_func)( void *ctx, mbedtls_md_type_t md_alg,
+ const unsigned char *hash, size_t hash_len,
+ const unsigned char *sig, size_t sig_len );
+
+ /** Make signature */
+ int (*sign_func)( void *ctx, mbedtls_md_type_t md_alg,
+ const unsigned char *hash, size_t hash_len,
+ unsigned char *sig, size_t *sig_len,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+#if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE)
+ /** Verify signature (restartable) */
+ int (*verify_rs_func)( void *ctx, mbedtls_md_type_t md_alg,
+ const unsigned char *hash, size_t hash_len,
+ const unsigned char *sig, size_t sig_len,
+ void *rs_ctx );
+
+ /** Make signature (restartable) */
+ int (*sign_rs_func)( void *ctx, mbedtls_md_type_t md_alg,
+ const unsigned char *hash, size_t hash_len,
+ unsigned char *sig, size_t *sig_len,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng, void *rs_ctx );
+#endif /* MBEDTLS_ECDSA_C && MBEDTLS_ECP_RESTARTABLE */
+
+ /** Decrypt message */
+ int (*decrypt_func)( void *ctx, const unsigned char *input, size_t ilen,
+ unsigned char *output, size_t *olen, size_t osize,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+ /** Encrypt message */
+ int (*encrypt_func)( void *ctx, const unsigned char *input, size_t ilen,
+ unsigned char *output, size_t *olen, size_t osize,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+ /** Check public-private key pair */
+ int (*check_pair_func)( const void *pub, const void *prv );
+
+ /** Allocate a new context */
+ void * (*ctx_alloc_func)( void );
+
+ /** Free the given context */
+ void (*ctx_free_func)( void *ctx );
+
+#if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE)
+ /** Allocate the restart context */
+ void * (*rs_alloc_func)( void );
+
+ /** Free the restart context */
+ void (*rs_free_func)( void *rs_ctx );
+#endif /* MBEDTLS_ECDSA_C && MBEDTLS_ECP_RESTARTABLE */
+
+ /** Interface with the debug module */
+ void (*debug_func)( const void *ctx, mbedtls_pk_debug_item *items );
+
+};
+#if defined(MBEDTLS_PK_RSA_ALT_SUPPORT)
+/* Container for RSA-alt */
+typedef struct
+{
+ void *key;
+ mbedtls_pk_rsa_alt_decrypt_func decrypt_func;
+ mbedtls_pk_rsa_alt_sign_func sign_func;
+ mbedtls_pk_rsa_alt_key_len_func key_len_func;
+} mbedtls_rsa_alt_context;
+#endif
+
+#if defined(MBEDTLS_RSA_C)
+extern const mbedtls_pk_info_t mbedtls_rsa_info;
+#endif
+
+#if defined(MBEDTLS_ECP_C)
+extern const mbedtls_pk_info_t mbedtls_eckey_info;
+extern const mbedtls_pk_info_t mbedtls_eckeydh_info;
+#endif
+
+#if defined(MBEDTLS_ECDSA_C)
+extern const mbedtls_pk_info_t mbedtls_ecdsa_info;
+#endif
+
+#if defined(MBEDTLS_PK_RSA_ALT_SUPPORT)
+extern const mbedtls_pk_info_t mbedtls_rsa_alt_info;
+#endif
+
+#endif /* MBEDTLS_PK_WRAP_H */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/pkcs11.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/pkcs11.h
new file mode 100644
index 0000000..02427dd
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/pkcs11.h
@@ -0,0 +1,175 @@
+/**
+ * \file pkcs11.h
+ *
+ * \brief Wrapper for PKCS#11 library libpkcs11-helper
+ *
+ * \author Adriaan de Jong <dejong@fox-it.com>
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_PKCS11_H
+#define MBEDTLS_PKCS11_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#if defined(MBEDTLS_PKCS11_C)
+
+#include "x509_crt.h"
+
+#include <pkcs11-helper-1.0/pkcs11h-certificate.h>
+
+#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
+ !defined(inline) && !defined(__cplusplus)
+#define inline __inline
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Context for PKCS #11 private keys.
+ */
+typedef struct mbedtls_pkcs11_context
+{
+ pkcs11h_certificate_t pkcs11h_cert;
+ int len;
+} mbedtls_pkcs11_context;
+
+/**
+ * Initialize a mbedtls_pkcs11_context.
+ * (Just making memory references valid.)
+ */
+void mbedtls_pkcs11_init( mbedtls_pkcs11_context *ctx );
+
+/**
+ * Fill in a mbed TLS certificate, based on the given PKCS11 helper certificate.
+ *
+ * \param cert X.509 certificate to fill
+ * \param pkcs11h_cert PKCS #11 helper certificate
+ *
+ * \return 0 on success.
+ */
+int mbedtls_pkcs11_x509_cert_bind( mbedtls_x509_crt *cert, pkcs11h_certificate_t pkcs11h_cert );
+
+/**
+ * Set up a mbedtls_pkcs11_context storing the given certificate. Note that the
+ * mbedtls_pkcs11_context will take over control of the certificate, freeing it when
+ * done.
+ *
+ * \param priv_key Private key structure to fill.
+ * \param pkcs11_cert PKCS #11 helper certificate
+ *
+ * \return 0 on success
+ */
+int mbedtls_pkcs11_priv_key_bind( mbedtls_pkcs11_context *priv_key,
+ pkcs11h_certificate_t pkcs11_cert );
+
+/**
+ * Free the contents of the given private key context. Note that the structure
+ * itself is not freed.
+ *
+ * \param priv_key Private key structure to cleanup
+ */
+void mbedtls_pkcs11_priv_key_free( mbedtls_pkcs11_context *priv_key );
+
+/**
+ * \brief Do an RSA private key decrypt, then remove the message
+ * padding
+ *
+ * \param ctx PKCS #11 context
+ * \param mode must be MBEDTLS_RSA_PRIVATE, for compatibility with rsa.c's signature
+ * \param input buffer holding the encrypted data
+ * \param output buffer that will hold the plaintext
+ * \param olen will contain the plaintext length
+ * \param output_max_len maximum length of the output buffer
+ *
+ * \return 0 if successful, or an MBEDTLS_ERR_RSA_XXX error code
+ *
+ * \note The output buffer must be as large as the size
+ * of ctx->N (eg. 128 bytes if RSA-1024 is used) otherwise
+ * an error is thrown.
+ */
+int mbedtls_pkcs11_decrypt( mbedtls_pkcs11_context *ctx,
+ int mode, size_t *olen,
+ const unsigned char *input,
+ unsigned char *output,
+ size_t output_max_len );
+
+/**
+ * \brief Do a private RSA to sign a message digest
+ *
+ * \param ctx PKCS #11 context
+ * \param mode must be MBEDTLS_RSA_PRIVATE, for compatibility with rsa.c's signature
+ * \param md_alg a MBEDTLS_MD_XXX (use MBEDTLS_MD_NONE for signing raw data)
+ * \param hashlen message digest length (for MBEDTLS_MD_NONE only)
+ * \param hash buffer holding the message digest
+ * \param sig buffer that will hold the ciphertext
+ *
+ * \return 0 if the signing operation was successful,
+ * or an MBEDTLS_ERR_RSA_XXX error code
+ *
+ * \note The "sig" buffer must be as large as the size
+ * of ctx->N (eg. 128 bytes if RSA-1024 is used).
+ */
+int mbedtls_pkcs11_sign( mbedtls_pkcs11_context *ctx,
+ int mode,
+ mbedtls_md_type_t md_alg,
+ unsigned int hashlen,
+ const unsigned char *hash,
+ unsigned char *sig );
+
+/**
+ * SSL/TLS wrappers for PKCS#11 functions
+ */
+static inline int mbedtls_ssl_pkcs11_decrypt( void *ctx, int mode, size_t *olen,
+ const unsigned char *input, unsigned char *output,
+ size_t output_max_len )
+{
+ return mbedtls_pkcs11_decrypt( (mbedtls_pkcs11_context *) ctx, mode, olen, input, output,
+ output_max_len );
+}
+
+static inline int mbedtls_ssl_pkcs11_sign( void *ctx,
+ int (*f_rng)(void *, unsigned char *, size_t), void *p_rng,
+ int mode, mbedtls_md_type_t md_alg, unsigned int hashlen,
+ const unsigned char *hash, unsigned char *sig )
+{
+ ((void) f_rng);
+ ((void) p_rng);
+ return mbedtls_pkcs11_sign( (mbedtls_pkcs11_context *) ctx, mode, md_alg,
+ hashlen, hash, sig );
+}
+
+static inline size_t mbedtls_ssl_pkcs11_key_len( void *ctx )
+{
+ return ( (mbedtls_pkcs11_context *) ctx )->len;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_PKCS11_C */
+
+#endif /* MBEDTLS_PKCS11_H */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/pkcs12.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/pkcs12.h
new file mode 100644
index 0000000..d441357
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/pkcs12.h
@@ -0,0 +1,130 @@
+/**
+ * \file pkcs12.h
+ *
+ * \brief PKCS#12 Personal Information Exchange Syntax
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_PKCS12_H
+#define MBEDTLS_PKCS12_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "md.h"
+#include "cipher.h"
+#include "asn1.h"
+
+#include <stddef.h>
+
+#define MBEDTLS_ERR_PKCS12_BAD_INPUT_DATA -0x1F80 /**< Bad input parameters to function. */
+#define MBEDTLS_ERR_PKCS12_FEATURE_UNAVAILABLE -0x1F00 /**< Feature not available, e.g. unsupported encryption scheme. */
+#define MBEDTLS_ERR_PKCS12_PBE_INVALID_FORMAT -0x1E80 /**< PBE ASN.1 data not as expected. */
+#define MBEDTLS_ERR_PKCS12_PASSWORD_MISMATCH -0x1E00 /**< Given private key password does not allow for correct decryption. */
+
+#define MBEDTLS_PKCS12_DERIVE_KEY 1 /**< encryption/decryption key */
+#define MBEDTLS_PKCS12_DERIVE_IV 2 /**< initialization vector */
+#define MBEDTLS_PKCS12_DERIVE_MAC_KEY 3 /**< integrity / MAC key */
+
+#define MBEDTLS_PKCS12_PBE_DECRYPT 0
+#define MBEDTLS_PKCS12_PBE_ENCRYPT 1
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(MBEDTLS_ASN1_PARSE_C)
+
+/**
+ * \brief PKCS12 Password Based function (encryption / decryption)
+ * for pbeWithSHAAnd128BitRC4
+ *
+ * \param pbe_params an ASN1 buffer containing the pkcs-12PbeParams structure
+ * \param mode either MBEDTLS_PKCS12_PBE_ENCRYPT or MBEDTLS_PKCS12_PBE_DECRYPT
+ * \param pwd the password used (may be NULL if no password is used)
+ * \param pwdlen length of the password (may be 0)
+ * \param input the input data
+ * \param len data length
+ * \param output the output buffer
+ *
+ * \return 0 if successful, or a MBEDTLS_ERR_XXX code
+ */
+int mbedtls_pkcs12_pbe_sha1_rc4_128( mbedtls_asn1_buf *pbe_params, int mode,
+ const unsigned char *pwd, size_t pwdlen,
+ const unsigned char *input, size_t len,
+ unsigned char *output );
+
+/**
+ * \brief PKCS12 Password Based function (encryption / decryption)
+ * for cipher-based and mbedtls_md-based PBE's
+ *
+ * \param pbe_params an ASN1 buffer containing the pkcs-12PbeParams structure
+ * \param mode either MBEDTLS_PKCS12_PBE_ENCRYPT or MBEDTLS_PKCS12_PBE_DECRYPT
+ * \param cipher_type the cipher used
+ * \param md_type the mbedtls_md used
+ * \param pwd the password used (may be NULL if no password is used)
+ * \param pwdlen length of the password (may be 0)
+ * \param input the input data
+ * \param len data length
+ * \param output the output buffer
+ *
+ * \return 0 if successful, or a MBEDTLS_ERR_XXX code
+ */
+int mbedtls_pkcs12_pbe( mbedtls_asn1_buf *pbe_params, int mode,
+ mbedtls_cipher_type_t cipher_type, mbedtls_md_type_t md_type,
+ const unsigned char *pwd, size_t pwdlen,
+ const unsigned char *input, size_t len,
+ unsigned char *output );
+
+#endif /* MBEDTLS_ASN1_PARSE_C */
+
+/**
+ * \brief The PKCS#12 derivation function uses a password and a salt
+ * to produce pseudo-random bits for a particular "purpose".
+ *
+ * Depending on the given id, this function can produce an
+ * encryption/decryption key, an nitialization vector or an
+ * integrity key.
+ *
+ * \param data buffer to store the derived data in
+ * \param datalen length to fill
+ * \param pwd password to use (may be NULL if no password is used)
+ * \param pwdlen length of the password (may be 0)
+ * \param salt salt buffer to use
+ * \param saltlen length of the salt
+ * \param mbedtls_md mbedtls_md type to use during the derivation
+ * \param id id that describes the purpose (can be MBEDTLS_PKCS12_DERIVE_KEY,
+ * MBEDTLS_PKCS12_DERIVE_IV or MBEDTLS_PKCS12_DERIVE_MAC_KEY)
+ * \param iterations number of iterations
+ *
+ * \return 0 if successful, or a MD, BIGNUM type error.
+ */
+int mbedtls_pkcs12_derivation( unsigned char *data, size_t datalen,
+ const unsigned char *pwd, size_t pwdlen,
+ const unsigned char *salt, size_t saltlen,
+ mbedtls_md_type_t mbedtls_md, int id, int iterations );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* pkcs12.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/pkcs5.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/pkcs5.h
new file mode 100644
index 0000000..c92185f
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/pkcs5.h
@@ -0,0 +1,109 @@
+/**
+ * \file pkcs5.h
+ *
+ * \brief PKCS#5 functions
+ *
+ * \author Mathias Olsson <mathias@kompetensum.com>
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_PKCS5_H
+#define MBEDTLS_PKCS5_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "asn1.h"
+#include "md.h"
+
+#include <stddef.h>
+#include <stdint.h>
+
+#define MBEDTLS_ERR_PKCS5_BAD_INPUT_DATA -0x2f80 /**< Bad input parameters to function. */
+#define MBEDTLS_ERR_PKCS5_INVALID_FORMAT -0x2f00 /**< Unexpected ASN.1 data. */
+#define MBEDTLS_ERR_PKCS5_FEATURE_UNAVAILABLE -0x2e80 /**< Requested encryption or digest alg not available. */
+#define MBEDTLS_ERR_PKCS5_PASSWORD_MISMATCH -0x2e00 /**< Given private key password does not allow for correct decryption. */
+
+#define MBEDTLS_PKCS5_DECRYPT 0
+#define MBEDTLS_PKCS5_ENCRYPT 1
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(MBEDTLS_ASN1_PARSE_C)
+
+/**
+ * \brief PKCS#5 PBES2 function
+ *
+ * \param pbe_params the ASN.1 algorithm parameters
+ * \param mode either MBEDTLS_PKCS5_DECRYPT or MBEDTLS_PKCS5_ENCRYPT
+ * \param pwd password to use when generating key
+ * \param pwdlen length of password
+ * \param data data to process
+ * \param datalen length of data
+ * \param output output buffer
+ *
+ * \returns 0 on success, or a MBEDTLS_ERR_XXX code if verification fails.
+ */
+int mbedtls_pkcs5_pbes2( const mbedtls_asn1_buf *pbe_params, int mode,
+ const unsigned char *pwd, size_t pwdlen,
+ const unsigned char *data, size_t datalen,
+ unsigned char *output );
+
+#endif /* MBEDTLS_ASN1_PARSE_C */
+
+/**
+ * \brief PKCS#5 PBKDF2 using HMAC
+ *
+ * \param ctx Generic HMAC context
+ * \param password Password to use when generating key
+ * \param plen Length of password
+ * \param salt Salt to use when generating key
+ * \param slen Length of salt
+ * \param iteration_count Iteration count
+ * \param key_length Length of generated key in bytes
+ * \param output Generated key. Must be at least as big as key_length
+ *
+ * \returns 0 on success, or a MBEDTLS_ERR_XXX code if verification fails.
+ */
+int mbedtls_pkcs5_pbkdf2_hmac( mbedtls_md_context_t *ctx, const unsigned char *password,
+ size_t plen, const unsigned char *salt, size_t slen,
+ unsigned int iteration_count,
+ uint32_t key_length, unsigned char *output );
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief Checkup routine
+ *
+ * \return 0 if successful, or 1 if the test failed
+ */
+int mbedtls_pkcs5_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* pkcs5.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/platform.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/platform.h
new file mode 100644
index 0000000..89fe8a7
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/platform.h
@@ -0,0 +1,367 @@
+/**
+ * \file platform.h
+ *
+ * \brief This file contains the definitions and functions of the
+ * Mbed TLS platform abstraction layer.
+ *
+ * The platform abstraction layer removes the need for the library
+ * to directly link to standard C library functions or operating
+ * system services, making the library easier to port and embed.
+ * Application developers and users of the library can provide their own
+ * implementations of these functions, or implementations specific to
+ * their platform, which can be statically linked to the library or
+ * dynamically configured at runtime.
+ */
+/*
+ * Copyright (C) 2006-2018, Arm Limited (or its affiliates), All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of Mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_PLATFORM_H
+#define MBEDTLS_PLATFORM_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#if defined(MBEDTLS_HAVE_TIME)
+#include "platform_time.h"
+#endif
+
+#define MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED -0x0070 /**< Hardware accelerator failed */
+#define MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED -0x0072 /**< The requested feature is not supported by the platform */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \name SECTION: Module settings
+ *
+ * The configuration options you can set for this module are in this section.
+ * Either change them in config.h or define them on the compiler command line.
+ * \{
+ */
+
+#if !defined(MBEDTLS_PLATFORM_NO_STD_FUNCTIONS)
+#include <stdio.h>
+#include <stdlib.h>
+#include <time.h>
+#if !defined(MBEDTLS_PLATFORM_STD_SNPRINTF)
+#if defined(_WIN32)
+#define MBEDTLS_PLATFORM_STD_SNPRINTF mbedtls_platform_win32_snprintf /**< The default \c snprintf function to use. */
+#else
+#define MBEDTLS_PLATFORM_STD_SNPRINTF snprintf /**< The default \c snprintf function to use. */
+#endif
+#endif
+#if !defined(MBEDTLS_PLATFORM_STD_PRINTF)
+#define MBEDTLS_PLATFORM_STD_PRINTF printf /**< The default \c printf function to use. */
+#endif
+#if !defined(MBEDTLS_PLATFORM_STD_FPRINTF)
+#define MBEDTLS_PLATFORM_STD_FPRINTF fprintf /**< The default \c fprintf function to use. */
+#endif
+#if !defined(MBEDTLS_PLATFORM_STD_CALLOC)
+#define MBEDTLS_PLATFORM_STD_CALLOC calloc /**< The default \c calloc function to use. */
+#endif
+#if !defined(MBEDTLS_PLATFORM_STD_FREE)
+#define MBEDTLS_PLATFORM_STD_FREE free /**< The default \c free function to use. */
+#endif
+#if !defined(MBEDTLS_PLATFORM_STD_EXIT)
+#define MBEDTLS_PLATFORM_STD_EXIT exit /**< The default \c exit function to use. */
+#endif
+#if !defined(MBEDTLS_PLATFORM_STD_TIME)
+#define MBEDTLS_PLATFORM_STD_TIME time /**< The default \c time function to use. */
+#endif
+#if !defined(MBEDTLS_PLATFORM_STD_EXIT_SUCCESS)
+#define MBEDTLS_PLATFORM_STD_EXIT_SUCCESS EXIT_SUCCESS /**< The default exit value to use. */
+#endif
+#if !defined(MBEDTLS_PLATFORM_STD_EXIT_FAILURE)
+#define MBEDTLS_PLATFORM_STD_EXIT_FAILURE EXIT_FAILURE /**< The default exit value to use. */
+#endif
+#if defined(MBEDTLS_FS_IO)
+#if !defined(MBEDTLS_PLATFORM_STD_NV_SEED_READ)
+#define MBEDTLS_PLATFORM_STD_NV_SEED_READ mbedtls_platform_std_nv_seed_read
+#endif
+#if !defined(MBEDTLS_PLATFORM_STD_NV_SEED_WRITE)
+#define MBEDTLS_PLATFORM_STD_NV_SEED_WRITE mbedtls_platform_std_nv_seed_write
+#endif
+#if !defined(MBEDTLS_PLATFORM_STD_NV_SEED_FILE)
+#define MBEDTLS_PLATFORM_STD_NV_SEED_FILE "seedfile"
+#endif
+#endif /* MBEDTLS_FS_IO */
+#else /* MBEDTLS_PLATFORM_NO_STD_FUNCTIONS */
+#if defined(MBEDTLS_PLATFORM_STD_MEM_HDR)
+#include MBEDTLS_PLATFORM_STD_MEM_HDR
+#endif
+#endif /* MBEDTLS_PLATFORM_NO_STD_FUNCTIONS */
+
+
+/* \} name SECTION: Module settings */
+
+/*
+ * The function pointers for calloc and free.
+ */
+#if defined(MBEDTLS_PLATFORM_MEMORY)
+#if defined(MBEDTLS_PLATFORM_FREE_MACRO) && \
+ defined(MBEDTLS_PLATFORM_CALLOC_MACRO)
+#define mbedtls_free MBEDTLS_PLATFORM_FREE_MACRO
+#define mbedtls_calloc MBEDTLS_PLATFORM_CALLOC_MACRO
+#else
+/* For size_t */
+#include <stddef.h>
+extern void *mbedtls_calloc( size_t n, size_t size );
+extern void mbedtls_free( void *ptr );
+
+/**
+ * \brief This function dynamically sets the memory-management
+ * functions used by the library, during runtime.
+ *
+ * \param calloc_func The \c calloc function implementation.
+ * \param free_func The \c free function implementation.
+ *
+ * \return \c 0.
+ */
+int mbedtls_platform_set_calloc_free( void * (*calloc_func)( size_t, size_t ),
+ void (*free_func)( void * ) );
+#endif /* MBEDTLS_PLATFORM_FREE_MACRO && MBEDTLS_PLATFORM_CALLOC_MACRO */
+#else /* !MBEDTLS_PLATFORM_MEMORY */
+#define mbedtls_free free
+#define mbedtls_calloc calloc
+#endif /* MBEDTLS_PLATFORM_MEMORY && !MBEDTLS_PLATFORM_{FREE,CALLOC}_MACRO */
+
+/*
+ * The function pointers for fprintf
+ */
+#if defined(MBEDTLS_PLATFORM_FPRINTF_ALT)
+/* We need FILE * */
+#include <stdio.h>
+extern int (*mbedtls_fprintf)( FILE *stream, const char *format, ... );
+
+/**
+ * \brief This function dynamically configures the fprintf
+ * function that is called when the
+ * mbedtls_fprintf() function is invoked by the library.
+ *
+ * \param fprintf_func The \c fprintf function implementation.
+ *
+ * \return \c 0.
+ */
+int mbedtls_platform_set_fprintf( int (*fprintf_func)( FILE *stream, const char *,
+ ... ) );
+#else
+#if defined(MBEDTLS_PLATFORM_FPRINTF_MACRO)
+#define mbedtls_fprintf MBEDTLS_PLATFORM_FPRINTF_MACRO
+#else
+#define mbedtls_fprintf fprintf
+#endif /* MBEDTLS_PLATFORM_FPRINTF_MACRO */
+#endif /* MBEDTLS_PLATFORM_FPRINTF_ALT */
+
+/*
+ * The function pointers for printf
+ */
+#if defined(MBEDTLS_PLATFORM_PRINTF_ALT)
+extern int (*mbedtls_printf)( const char *format, ... );
+
+/**
+ * \brief This function dynamically configures the snprintf
+ * function that is called when the mbedtls_snprintf()
+ * function is invoked by the library.
+ *
+ * \param printf_func The \c printf function implementation.
+ *
+ * \return \c 0 on success.
+ */
+int mbedtls_platform_set_printf( int (*printf_func)( const char *, ... ) );
+#else /* !MBEDTLS_PLATFORM_PRINTF_ALT */
+#if defined(MBEDTLS_PLATFORM_PRINTF_MACRO)
+#define mbedtls_printf MBEDTLS_PLATFORM_PRINTF_MACRO
+#else
+#define mbedtls_printf printf
+#endif /* MBEDTLS_PLATFORM_PRINTF_MACRO */
+#endif /* MBEDTLS_PLATFORM_PRINTF_ALT */
+
+/*
+ * The function pointers for snprintf
+ *
+ * The snprintf implementation should conform to C99:
+ * - it *must* always correctly zero-terminate the buffer
+ * (except when n == 0, then it must leave the buffer untouched)
+ * - however it is acceptable to return -1 instead of the required length when
+ * the destination buffer is too short.
+ */
+#if defined(_WIN32)
+/* For Windows (inc. MSYS2), we provide our own fixed implementation */
+int mbedtls_platform_win32_snprintf( char *s, size_t n, const char *fmt, ... );
+#endif
+
+#if defined(MBEDTLS_PLATFORM_SNPRINTF_ALT)
+extern int (*mbedtls_snprintf)( char * s, size_t n, const char * format, ... );
+
+/**
+ * \brief This function allows configuring a custom
+ * \c snprintf function pointer.
+ *
+ * \param snprintf_func The \c snprintf function implementation.
+ *
+ * \return \c 0 on success.
+ */
+int mbedtls_platform_set_snprintf( int (*snprintf_func)( char * s, size_t n,
+ const char * format, ... ) );
+#else /* MBEDTLS_PLATFORM_SNPRINTF_ALT */
+#if defined(MBEDTLS_PLATFORM_SNPRINTF_MACRO)
+#define mbedtls_snprintf MBEDTLS_PLATFORM_SNPRINTF_MACRO
+#else
+#define mbedtls_snprintf MBEDTLS_PLATFORM_STD_SNPRINTF
+#endif /* MBEDTLS_PLATFORM_SNPRINTF_MACRO */
+#endif /* MBEDTLS_PLATFORM_SNPRINTF_ALT */
+
+/*
+ * The function pointers for exit
+ */
+#if defined(MBEDTLS_PLATFORM_EXIT_ALT)
+extern void (*mbedtls_exit)( int status );
+
+/**
+ * \brief This function dynamically configures the exit
+ * function that is called when the mbedtls_exit()
+ * function is invoked by the library.
+ *
+ * \param exit_func The \c exit function implementation.
+ *
+ * \return \c 0 on success.
+ */
+int mbedtls_platform_set_exit( void (*exit_func)( int status ) );
+#else
+#if defined(MBEDTLS_PLATFORM_EXIT_MACRO)
+#define mbedtls_exit MBEDTLS_PLATFORM_EXIT_MACRO
+#else
+#define mbedtls_exit exit
+#endif /* MBEDTLS_PLATFORM_EXIT_MACRO */
+#endif /* MBEDTLS_PLATFORM_EXIT_ALT */
+
+/*
+ * The default exit values
+ */
+#if defined(MBEDTLS_PLATFORM_STD_EXIT_SUCCESS)
+#define MBEDTLS_EXIT_SUCCESS MBEDTLS_PLATFORM_STD_EXIT_SUCCESS
+#else
+#define MBEDTLS_EXIT_SUCCESS 0
+#endif
+#if defined(MBEDTLS_PLATFORM_STD_EXIT_FAILURE)
+#define MBEDTLS_EXIT_FAILURE MBEDTLS_PLATFORM_STD_EXIT_FAILURE
+#else
+#define MBEDTLS_EXIT_FAILURE 1
+#endif
+
+/*
+ * The function pointers for reading from and writing a seed file to
+ * Non-Volatile storage (NV) in a platform-independent way
+ *
+ * Only enabled when the NV seed entropy source is enabled
+ */
+#if defined(MBEDTLS_ENTROPY_NV_SEED)
+#if !defined(MBEDTLS_PLATFORM_NO_STD_FUNCTIONS) && defined(MBEDTLS_FS_IO)
+/* Internal standard platform definitions */
+int mbedtls_platform_std_nv_seed_read( unsigned char *buf, size_t buf_len );
+int mbedtls_platform_std_nv_seed_write( unsigned char *buf, size_t buf_len );
+#endif
+
+#if defined(MBEDTLS_PLATFORM_NV_SEED_ALT)
+extern int (*mbedtls_nv_seed_read)( unsigned char *buf, size_t buf_len );
+extern int (*mbedtls_nv_seed_write)( unsigned char *buf, size_t buf_len );
+
+/**
+ * \brief This function allows configuring custom seed file writing and
+ * reading functions.
+ *
+ * \param nv_seed_read_func The seed reading function implementation.
+ * \param nv_seed_write_func The seed writing function implementation.
+ *
+ * \return \c 0 on success.
+ */
+int mbedtls_platform_set_nv_seed(
+ int (*nv_seed_read_func)( unsigned char *buf, size_t buf_len ),
+ int (*nv_seed_write_func)( unsigned char *buf, size_t buf_len )
+ );
+#else
+#if defined(MBEDTLS_PLATFORM_NV_SEED_READ_MACRO) && \
+ defined(MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO)
+#define mbedtls_nv_seed_read MBEDTLS_PLATFORM_NV_SEED_READ_MACRO
+#define mbedtls_nv_seed_write MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO
+#else
+#define mbedtls_nv_seed_read mbedtls_platform_std_nv_seed_read
+#define mbedtls_nv_seed_write mbedtls_platform_std_nv_seed_write
+#endif
+#endif /* MBEDTLS_PLATFORM_NV_SEED_ALT */
+#endif /* MBEDTLS_ENTROPY_NV_SEED */
+
+#if !defined(MBEDTLS_PLATFORM_SETUP_TEARDOWN_ALT)
+
+/**
+ * \brief The platform context structure.
+ *
+ * \note This structure may be used to assist platform-specific
+ * setup or teardown operations.
+ */
+typedef struct mbedtls_platform_context
+{
+ char dummy; /**< A placeholder member, as empty structs are not portable. */
+}
+mbedtls_platform_context;
+
+#else
+#include "platform_alt.h"
+#endif /* !MBEDTLS_PLATFORM_SETUP_TEARDOWN_ALT */
+
+/**
+ * \brief This function performs any platform-specific initialization
+ * operations.
+ *
+ * \note This function should be called before any other library functions.
+ *
+ * Its implementation is platform-specific, and unless
+ * platform-specific code is provided, it does nothing.
+ *
+ * \note The usage and necessity of this function is dependent on the platform.
+ *
+ * \param ctx The platform context.
+ *
+ * \return \c 0 on success.
+ */
+int mbedtls_platform_setup( mbedtls_platform_context *ctx );
+/**
+ * \brief This function performs any platform teardown operations.
+ *
+ * \note This function should be called after every other Mbed TLS module
+ * has been correctly freed using the appropriate free function.
+ *
+ * Its implementation is platform-specific, and unless
+ * platform-specific code is provided, it does nothing.
+ *
+ * \note The usage and necessity of this function is dependent on the platform.
+ *
+ * \param ctx The platform context.
+ *
+ */
+void mbedtls_platform_teardown( mbedtls_platform_context *ctx );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* platform.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/platform_alt.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/platform_alt.h
new file mode 100644
index 0000000..bde4dfc
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/platform_alt.h
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause OR Arm’s non-OSI source license
+ */
+
+#ifndef MBEDTLS_PLATFORM_ALT_H
+#define MBEDTLS_PLATFORM_ALT_H
+
+#include <stddef.h>
+#include <stdint.h>
+
+#if defined(MBEDTLS_CONFIG_FILE)
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#if defined(MBEDTLS_PLATFORM_SETUP_TEARDOWN_ALT)
+
+#define MBEDTLS_ERR_PLATFORM_SUCCESS (0)
+#define MBEDTLS_ERR_PLATFORM_ERROR_PARAM_NULL (-0x7001)
+#define MBEDTLS_ERR_PLATFORM_ERROR_INTERNAL (-0x7002)
+#define MBEDTLS_ERR_PLATFORM_ERROR_RNG_TEST_FAILED (-0x7003)
+#define MBEDTLS_ERR_PLATFORM_ERROR_HW_VERSION_FAILED (-0x7004)
+#define MBEDTLS_ERR_PLATFORM_ERROR_PARAM_WRITE_FAILED (-0x7005)
+#define MBEDTLS_ERR_PLATFORM_ERROR_MUTEX_NOT_INITIALIZED (-0x7016)
+#define MBEDTLS_ERR_PLATFORM_ERROR_MUTEX_FAILED (-0x7017)
+#define MBEDTLS_ERR_PLATFORM_ERROR_ENTROPY_NOT_INITIALIZED (-0x7018)
+#define MBEDTLS_ERR_PLATFORM_ERROR_ENTROPY_TRNG_TOO_LONG (-0x7019)
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief The platform context structure.
+ *
+ */
+typedef struct {
+ char dummy; /**< A placeholder member, as empty structs are not portable. */
+}
+mbedtls_platform_context;
+
+
+/** @brief Function to initialize platform without rng support
+ *
+ * Call this function instead of mbedtls_platform_setup if RNG is not required.
+ * e.g. to conserve code size of improve startup time.
+ *
+ * @note It is possible to run mbedtls_platform_setup after calling
+ * this API if RNG is suddenly required. Calling mbedtls_platform_teardown
+ * is not required to be used, in this case.
+ *
+ * @warning Only deterministic cryptographic is supported if this API is used
+ * to initalize the HW.
+ */
+int mbedtls_platform_setup_no_rng(void);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_PLATFORM_SETUP_TEARDOWN_ALT */
+
+#endif /* MBEDTLS_PLATFORM_ALT_H */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/platform_time.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/platform_time.h
new file mode 100644
index 0000000..2ed36f5
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/platform_time.h
@@ -0,0 +1,82 @@
+/**
+ * \file platform_time.h
+ *
+ * \brief mbed TLS Platform time abstraction
+ */
+/*
+ * Copyright (C) 2006-2016, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_PLATFORM_TIME_H
+#define MBEDTLS_PLATFORM_TIME_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \name SECTION: Module settings
+ *
+ * The configuration options you can set for this module are in this section.
+ * Either change them in config.h or define them on the compiler command line.
+ * \{
+ */
+
+/*
+ * The time_t datatype
+ */
+#if defined(MBEDTLS_PLATFORM_TIME_TYPE_MACRO)
+typedef MBEDTLS_PLATFORM_TIME_TYPE_MACRO mbedtls_time_t;
+#else
+/* For time_t */
+#include <time.h>
+typedef time_t mbedtls_time_t;
+#endif /* MBEDTLS_PLATFORM_TIME_TYPE_MACRO */
+
+/*
+ * The function pointers for time
+ */
+#if defined(MBEDTLS_PLATFORM_TIME_ALT)
+extern mbedtls_time_t (*mbedtls_time)( mbedtls_time_t* time );
+
+/**
+ * \brief Set your own time function pointer
+ *
+ * \param time_func the time function implementation
+ *
+ * \return 0
+ */
+int mbedtls_platform_set_time( mbedtls_time_t (*time_func)( mbedtls_time_t* time ) );
+#else
+#if defined(MBEDTLS_PLATFORM_TIME_MACRO)
+#define mbedtls_time MBEDTLS_PLATFORM_TIME_MACRO
+#else
+#define mbedtls_time time
+#endif /* MBEDTLS_PLATFORM_TIME_MACRO */
+#endif /* MBEDTLS_PLATFORM_TIME_ALT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* platform_time.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/platform_util.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/platform_util.h
new file mode 100644
index 0000000..dba6d45
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/platform_util.h
@@ -0,0 +1,185 @@
+/**
+ * \file platform_util.h
+ *
+ * \brief Common and shared functions used by multiple modules in the Mbed TLS
+ * library.
+ */
+/*
+ * Copyright (C) 2018, Arm Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of Mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_PLATFORM_UTIL_H
+#define MBEDTLS_PLATFORM_UTIL_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#if defined(MBEDTLS_HAVE_TIME_DATE)
+#include "platform_time.h"
+#include <time.h>
+#endif /* MBEDTLS_HAVE_TIME_DATE */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(MBEDTLS_CHECK_PARAMS)
+
+#if defined(MBEDTLS_PARAM_FAILED)
+/** An alternative definition of MBEDTLS_PARAM_FAILED has been set in config.h.
+ *
+ * This flag can be used to check whether it is safe to assume that
+ * MBEDTLS_PARAM_FAILED() will expand to a call to mbedtls_param_failed().
+ */
+#define MBEDTLS_PARAM_FAILED_ALT
+#else /* MBEDTLS_PARAM_FAILED */
+#define MBEDTLS_PARAM_FAILED( cond ) \
+ mbedtls_param_failed( #cond, __FILE__, __LINE__ )
+
+/**
+ * \brief User supplied callback function for parameter validation failure.
+ * See #MBEDTLS_CHECK_PARAMS for context.
+ *
+ * This function will be called unless an alternative treatement
+ * is defined through the #MBEDTLS_PARAM_FAILED macro.
+ *
+ * This function can return, and the operation will be aborted, or
+ * alternatively, through use of setjmp()/longjmp() can resume
+ * execution in the application code.
+ *
+ * \param failure_condition The assertion that didn't hold.
+ * \param file The file where the assertion failed.
+ * \param line The line in the file where the assertion failed.
+ */
+void mbedtls_param_failed( const char *failure_condition,
+ const char *file,
+ int line );
+#endif /* MBEDTLS_PARAM_FAILED */
+
+/* Internal macro meant to be called only from within the library. */
+#define MBEDTLS_INTERNAL_VALIDATE_RET( cond, ret ) \
+ do { \
+ if( !(cond) ) \
+ { \
+ MBEDTLS_PARAM_FAILED( cond ); \
+ return( ret ); \
+ } \
+ } while( 0 )
+
+/* Internal macro meant to be called only from within the library. */
+#define MBEDTLS_INTERNAL_VALIDATE( cond ) \
+ do { \
+ if( !(cond) ) \
+ { \
+ MBEDTLS_PARAM_FAILED( cond ); \
+ return; \
+ } \
+ } while( 0 )
+
+#else /* MBEDTLS_CHECK_PARAMS */
+
+/* Internal macros meant to be called only from within the library. */
+#define MBEDTLS_INTERNAL_VALIDATE_RET( cond, ret ) do { } while( 0 )
+#define MBEDTLS_INTERNAL_VALIDATE( cond ) do { } while( 0 )
+
+#endif /* MBEDTLS_CHECK_PARAMS */
+
+/* Internal helper macros for deprecating API constants. */
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+/* Deliberately don't (yet) export MBEDTLS_DEPRECATED here
+ * to avoid conflict with other headers which define and use
+ * it, too. We might want to move all these definitions here at
+ * some point for uniformity. */
+#define MBEDTLS_DEPRECATED __attribute__((deprecated))
+MBEDTLS_DEPRECATED typedef char const * mbedtls_deprecated_string_constant_t;
+#define MBEDTLS_DEPRECATED_STRING_CONSTANT( VAL ) \
+ ( (mbedtls_deprecated_string_constant_t) ( VAL ) )
+MBEDTLS_DEPRECATED typedef int mbedtls_deprecated_numeric_constant_t;
+#define MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( VAL ) \
+ ( (mbedtls_deprecated_numeric_constant_t) ( VAL ) )
+#undef MBEDTLS_DEPRECATED
+#else /* MBEDTLS_DEPRECATED_WARNING */
+#define MBEDTLS_DEPRECATED_STRING_CONSTANT( VAL ) VAL
+#define MBEDTLS_DEPRECATED_NUMERIC_CONSTANT( VAL ) VAL
+#endif /* MBEDTLS_DEPRECATED_WARNING */
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+
+/**
+ * \brief Securely zeroize a buffer
+ *
+ * The function is meant to wipe the data contained in a buffer so
+ * that it can no longer be recovered even if the program memory
+ * is later compromised. Call this function on sensitive data
+ * stored on the stack before returning from a function, and on
+ * sensitive data stored on the heap before freeing the heap
+ * object.
+ *
+ * It is extremely difficult to guarantee that calls to
+ * mbedtls_platform_zeroize() are not removed by aggressive
+ * compiler optimizations in a portable way. For this reason, Mbed
+ * TLS provides the configuration option
+ * MBEDTLS_PLATFORM_ZEROIZE_ALT, which allows users to configure
+ * mbedtls_platform_zeroize() to use a suitable implementation for
+ * their platform and needs
+ *
+ * \param buf Buffer to be zeroized
+ * \param len Length of the buffer in bytes
+ *
+ */
+void mbedtls_platform_zeroize( void *buf, size_t len );
+
+#if defined(MBEDTLS_HAVE_TIME_DATE)
+/**
+ * \brief Platform-specific implementation of gmtime_r()
+ *
+ * The function is a thread-safe abstraction that behaves
+ * similarly to the gmtime_r() function from Unix/POSIX.
+ *
+ * Mbed TLS will try to identify the underlying platform and
+ * make use of an appropriate underlying implementation (e.g.
+ * gmtime_r() for POSIX and gmtime_s() for Windows). If this is
+ * not possible, then gmtime() will be used. In this case, calls
+ * from the library to gmtime() will be guarded by the mutex
+ * mbedtls_threading_gmtime_mutex if MBEDTLS_THREADING_C is
+ * enabled. It is recommended that calls from outside the library
+ * are also guarded by this mutex.
+ *
+ * If MBEDTLS_PLATFORM_GMTIME_R_ALT is defined, then Mbed TLS will
+ * unconditionally use the alternative implementation for
+ * mbedtls_platform_gmtime_r() supplied by the user at compile time.
+ *
+ * \param tt Pointer to an object containing time (in seconds) since the
+ * epoch to be converted
+ * \param tm_buf Pointer to an object where the results will be stored
+ *
+ * \return Pointer to an object of type struct tm on success, otherwise
+ * NULL
+ */
+struct tm *mbedtls_platform_gmtime_r( const mbedtls_time_t *tt,
+ struct tm *tm_buf );
+#endif /* MBEDTLS_HAVE_TIME_DATE */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_PLATFORM_UTIL_H */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/poly1305.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/poly1305.h
new file mode 100644
index 0000000..f0ec44c
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/poly1305.h
@@ -0,0 +1,192 @@
+/**
+ * \file poly1305.h
+ *
+ * \brief This file contains Poly1305 definitions and functions.
+ *
+ * Poly1305 is a one-time message authenticator that can be used to
+ * authenticate messages. Poly1305-AES was created by Daniel
+ * Bernstein https://cr.yp.to/mac/poly1305-20050329.pdf The generic
+ * Poly1305 algorithm (not tied to AES) was also standardized in RFC
+ * 7539.
+ *
+ * \author Daniel King <damaki.gh@gmail.com>
+ */
+
+/* Copyright (C) 2006-2018, Arm Limited (or its affiliates), All Rights Reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of Mbed TLS (https://tls.mbed.org)
+ */
+
+#ifndef MBEDTLS_POLY1305_H
+#define MBEDTLS_POLY1305_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stdint.h>
+#include <stddef.h>
+
+#define MBEDTLS_ERR_POLY1305_BAD_INPUT_DATA -0x0057 /**< Invalid input parameter(s). */
+
+/* MBEDTLS_ERR_POLY1305_FEATURE_UNAVAILABLE is deprecated and should not be
+ * used. */
+#define MBEDTLS_ERR_POLY1305_FEATURE_UNAVAILABLE -0x0059 /**< Feature not available. For example, s part of the API is not implemented. */
+
+/* MBEDTLS_ERR_POLY1305_HW_ACCEL_FAILED is deprecated and should not be used.
+ */
+#define MBEDTLS_ERR_POLY1305_HW_ACCEL_FAILED -0x005B /**< Poly1305 hardware accelerator failed. */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_POLY1305_ALT)
+
+typedef struct mbedtls_poly1305_context
+{
+ uint32_t r[4]; /** The value for 'r' (low 128 bits of the key). */
+ uint32_t s[4]; /** The value for 's' (high 128 bits of the key). */
+ uint32_t acc[5]; /** The accumulator number. */
+ uint8_t queue[16]; /** The current partial block of data. */
+ size_t queue_len; /** The number of bytes stored in 'queue'. */
+}
+mbedtls_poly1305_context;
+
+#else /* MBEDTLS_POLY1305_ALT */
+#include "poly1305_alt.h"
+#endif /* MBEDTLS_POLY1305_ALT */
+
+/**
+ * \brief This function initializes the specified Poly1305 context.
+ *
+ * It must be the first API called before using
+ * the context.
+ *
+ * It is usually followed by a call to
+ * \c mbedtls_poly1305_starts(), then one or more calls to
+ * \c mbedtls_poly1305_update(), then one call to
+ * \c mbedtls_poly1305_finish(), then finally
+ * \c mbedtls_poly1305_free().
+ *
+ * \param ctx The Poly1305 context to initialize. This must
+ * not be \c NULL.
+ */
+void mbedtls_poly1305_init( mbedtls_poly1305_context *ctx );
+
+/**
+ * \brief This function releases and clears the specified
+ * Poly1305 context.
+ *
+ * \param ctx The Poly1305 context to clear. This may be \c NULL, in which
+ * case this function is a no-op. If it is not \c NULL, it must
+ * point to an initialized Poly1305 context.
+ */
+void mbedtls_poly1305_free( mbedtls_poly1305_context *ctx );
+
+/**
+ * \brief This function sets the one-time authentication key.
+ *
+ * \warning The key must be unique and unpredictable for each
+ * invocation of Poly1305.
+ *
+ * \param ctx The Poly1305 context to which the key should be bound.
+ * This must be initialized.
+ * \param key The buffer containing the \c 32 Byte (\c 256 Bit) key.
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_poly1305_starts( mbedtls_poly1305_context *ctx,
+ const unsigned char key[32] );
+
+/**
+ * \brief This functions feeds an input buffer into an ongoing
+ * Poly1305 computation.
+ *
+ * It is called between \c mbedtls_cipher_poly1305_starts() and
+ * \c mbedtls_cipher_poly1305_finish().
+ * It can be called repeatedly to process a stream of data.
+ *
+ * \param ctx The Poly1305 context to use for the Poly1305 operation.
+ * This must be initialized and bound to a key.
+ * \param ilen The length of the input data in Bytes.
+ * Any value is accepted.
+ * \param input The buffer holding the input data.
+ * This pointer can be \c NULL if `ilen == 0`.
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_poly1305_update( mbedtls_poly1305_context *ctx,
+ const unsigned char *input,
+ size_t ilen );
+
+/**
+ * \brief This function generates the Poly1305 Message
+ * Authentication Code (MAC).
+ *
+ * \param ctx The Poly1305 context to use for the Poly1305 operation.
+ * This must be initialized and bound to a key.
+ * \param mac The buffer to where the MAC is written. This must
+ * be a writable buffer of length \c 16 Bytes.
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_poly1305_finish( mbedtls_poly1305_context *ctx,
+ unsigned char mac[16] );
+
+/**
+ * \brief This function calculates the Poly1305 MAC of the input
+ * buffer with the provided key.
+ *
+ * \warning The key must be unique and unpredictable for each
+ * invocation of Poly1305.
+ *
+ * \param key The buffer containing the \c 32 Byte (\c 256 Bit) key.
+ * \param ilen The length of the input data in Bytes.
+ * Any value is accepted.
+ * \param input The buffer holding the input data.
+ * This pointer can be \c NULL if `ilen == 0`.
+ * \param mac The buffer to where the MAC is written. This must be
+ * a writable buffer of length \c 16 Bytes.
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_poly1305_mac( const unsigned char key[32],
+ const unsigned char *input,
+ size_t ilen,
+ unsigned char mac[16] );
+
+#if defined(MBEDTLS_SELF_TEST)
+/**
+ * \brief The Poly1305 checkup routine.
+ *
+ * \return \c 0 on success.
+ * \return \c 1 on failure.
+ */
+int mbedtls_poly1305_self_test( int verbose );
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_POLY1305_H */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ripemd160.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ripemd160.h
new file mode 100644
index 0000000..b42f6d2
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ripemd160.h
@@ -0,0 +1,237 @@
+/**
+ * \file ripemd160.h
+ *
+ * \brief RIPE MD-160 message digest
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_RIPEMD160_H
+#define MBEDTLS_RIPEMD160_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+
+/* MBEDTLS_ERR_RIPEMD160_HW_ACCEL_FAILED is deprecated and should not be used.
+ */
+#define MBEDTLS_ERR_RIPEMD160_HW_ACCEL_FAILED -0x0031 /**< RIPEMD160 hardware accelerator failed */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_RIPEMD160_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief RIPEMD-160 context structure
+ */
+typedef struct mbedtls_ripemd160_context
+{
+ uint32_t total[2]; /*!< number of bytes processed */
+ uint32_t state[5]; /*!< intermediate digest state */
+ unsigned char buffer[64]; /*!< data block being processed */
+}
+mbedtls_ripemd160_context;
+
+#else /* MBEDTLS_RIPEMD160_ALT */
+#include "ripemd160.h"
+#endif /* MBEDTLS_RIPEMD160_ALT */
+
+/**
+ * \brief Initialize RIPEMD-160 context
+ *
+ * \param ctx RIPEMD-160 context to be initialized
+ */
+void mbedtls_ripemd160_init( mbedtls_ripemd160_context *ctx );
+
+/**
+ * \brief Clear RIPEMD-160 context
+ *
+ * \param ctx RIPEMD-160 context to be cleared
+ */
+void mbedtls_ripemd160_free( mbedtls_ripemd160_context *ctx );
+
+/**
+ * \brief Clone (the state of) an RIPEMD-160 context
+ *
+ * \param dst The destination context
+ * \param src The context to be cloned
+ */
+void mbedtls_ripemd160_clone( mbedtls_ripemd160_context *dst,
+ const mbedtls_ripemd160_context *src );
+
+/**
+ * \brief RIPEMD-160 context setup
+ *
+ * \param ctx context to be initialized
+ *
+ * \return 0 if successful
+ */
+int mbedtls_ripemd160_starts_ret( mbedtls_ripemd160_context *ctx );
+
+/**
+ * \brief RIPEMD-160 process buffer
+ *
+ * \param ctx RIPEMD-160 context
+ * \param input buffer holding the data
+ * \param ilen length of the input data
+ *
+ * \return 0 if successful
+ */
+int mbedtls_ripemd160_update_ret( mbedtls_ripemd160_context *ctx,
+ const unsigned char *input,
+ size_t ilen );
+
+/**
+ * \brief RIPEMD-160 final digest
+ *
+ * \param ctx RIPEMD-160 context
+ * \param output RIPEMD-160 checksum result
+ *
+ * \return 0 if successful
+ */
+int mbedtls_ripemd160_finish_ret( mbedtls_ripemd160_context *ctx,
+ unsigned char output[20] );
+
+/**
+ * \brief RIPEMD-160 process data block (internal use only)
+ *
+ * \param ctx RIPEMD-160 context
+ * \param data buffer holding one block of data
+ *
+ * \return 0 if successful
+ */
+int mbedtls_internal_ripemd160_process( mbedtls_ripemd160_context *ctx,
+ const unsigned char data[64] );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief RIPEMD-160 context setup
+ *
+ * \deprecated Superseded by mbedtls_ripemd160_starts_ret() in 2.7.0
+ *
+ * \param ctx context to be initialized
+ */
+MBEDTLS_DEPRECATED void mbedtls_ripemd160_starts(
+ mbedtls_ripemd160_context *ctx );
+
+/**
+ * \brief RIPEMD-160 process buffer
+ *
+ * \deprecated Superseded by mbedtls_ripemd160_update_ret() in 2.7.0
+ *
+ * \param ctx RIPEMD-160 context
+ * \param input buffer holding the data
+ * \param ilen length of the input data
+ */
+MBEDTLS_DEPRECATED void mbedtls_ripemd160_update(
+ mbedtls_ripemd160_context *ctx,
+ const unsigned char *input,
+ size_t ilen );
+
+/**
+ * \brief RIPEMD-160 final digest
+ *
+ * \deprecated Superseded by mbedtls_ripemd160_finish_ret() in 2.7.0
+ *
+ * \param ctx RIPEMD-160 context
+ * \param output RIPEMD-160 checksum result
+ */
+MBEDTLS_DEPRECATED void mbedtls_ripemd160_finish(
+ mbedtls_ripemd160_context *ctx,
+ unsigned char output[20] );
+
+/**
+ * \brief RIPEMD-160 process data block (internal use only)
+ *
+ * \deprecated Superseded by mbedtls_internal_ripemd160_process() in 2.7.0
+ *
+ * \param ctx RIPEMD-160 context
+ * \param data buffer holding one block of data
+ */
+MBEDTLS_DEPRECATED void mbedtls_ripemd160_process(
+ mbedtls_ripemd160_context *ctx,
+ const unsigned char data[64] );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+/**
+ * \brief Output = RIPEMD-160( input buffer )
+ *
+ * \param input buffer holding the data
+ * \param ilen length of the input data
+ * \param output RIPEMD-160 checksum result
+ *
+ * \return 0 if successful
+ */
+int mbedtls_ripemd160_ret( const unsigned char *input,
+ size_t ilen,
+ unsigned char output[20] );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief Output = RIPEMD-160( input buffer )
+ *
+ * \deprecated Superseded by mbedtls_ripemd160_ret() in 2.7.0
+ *
+ * \param input buffer holding the data
+ * \param ilen length of the input data
+ * \param output RIPEMD-160 checksum result
+ */
+MBEDTLS_DEPRECATED void mbedtls_ripemd160( const unsigned char *input,
+ size_t ilen,
+ unsigned char output[20] );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief Checkup routine
+ *
+ * \return 0 if successful, or 1 if the test failed
+ */
+int mbedtls_ripemd160_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* mbedtls_ripemd160.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/rsa.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/rsa.h
new file mode 100644
index 0000000..906c427
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/rsa.h
@@ -0,0 +1,1271 @@
+/**
+ * \file rsa.h
+ *
+ * \brief This file provides an API for the RSA public-key cryptosystem.
+ *
+ * The RSA public-key cryptosystem is defined in <em>Public-Key
+ * Cryptography Standards (PKCS) #1 v1.5: RSA Encryption</em>
+ * and <em>Public-Key Cryptography Standards (PKCS) #1 v2.1:
+ * RSA Cryptography Specifications</em>.
+ *
+ */
+/*
+ * Copyright (C) 2006-2018, Arm Limited (or its affiliates), All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of Mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_RSA_H
+#define MBEDTLS_RSA_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "bignum.h"
+#include "md.h"
+
+#if defined(MBEDTLS_THREADING_C)
+#include "threading.h"
+#endif
+
+/*
+ * RSA Error codes
+ */
+#define MBEDTLS_ERR_RSA_BAD_INPUT_DATA -0x4080 /**< Bad input parameters to function. */
+#define MBEDTLS_ERR_RSA_INVALID_PADDING -0x4100 /**< Input data contains invalid padding and is rejected. */
+#define MBEDTLS_ERR_RSA_KEY_GEN_FAILED -0x4180 /**< Something failed during generation of a key. */
+#define MBEDTLS_ERR_RSA_KEY_CHECK_FAILED -0x4200 /**< Key failed to pass the validity check of the library. */
+#define MBEDTLS_ERR_RSA_PUBLIC_FAILED -0x4280 /**< The public key operation failed. */
+#define MBEDTLS_ERR_RSA_PRIVATE_FAILED -0x4300 /**< The private key operation failed. */
+#define MBEDTLS_ERR_RSA_VERIFY_FAILED -0x4380 /**< The PKCS#1 verification failed. */
+#define MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE -0x4400 /**< The output buffer for decryption is not large enough. */
+#define MBEDTLS_ERR_RSA_RNG_FAILED -0x4480 /**< The random generator failed to generate non-zeros. */
+
+/* MBEDTLS_ERR_RSA_UNSUPPORTED_OPERATION is deprecated and should not be used.
+ */
+#define MBEDTLS_ERR_RSA_UNSUPPORTED_OPERATION -0x4500 /**< The implementation does not offer the requested operation, for example, because of security violations or lack of functionality. */
+
+/* MBEDTLS_ERR_RSA_HW_ACCEL_FAILED is deprecated and should not be used. */
+#define MBEDTLS_ERR_RSA_HW_ACCEL_FAILED -0x4580 /**< RSA hardware accelerator failed. */
+
+/*
+ * RSA constants
+ */
+#define MBEDTLS_RSA_PUBLIC 0 /**< Request private key operation. */
+#define MBEDTLS_RSA_PRIVATE 1 /**< Request public key operation. */
+
+#define MBEDTLS_RSA_PKCS_V15 0 /**< Use PKCS#1 v1.5 encoding. */
+#define MBEDTLS_RSA_PKCS_V21 1 /**< Use PKCS#1 v2.1 encoding. */
+
+#define MBEDTLS_RSA_SIGN 1 /**< Identifier for RSA signature operations. */
+#define MBEDTLS_RSA_CRYPT 2 /**< Identifier for RSA encryption and decryption operations. */
+
+#define MBEDTLS_RSA_SALT_LEN_ANY -1
+
+/*
+ * The above constants may be used even if the RSA module is compile out,
+ * eg for alternative (PKCS#11) RSA implemenations in the PK layers.
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_RSA_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief The RSA context structure.
+ *
+ * \note Direct manipulation of the members of this structure
+ * is deprecated. All manipulation should instead be done through
+ * the public interface functions.
+ */
+typedef struct mbedtls_rsa_context
+{
+ int ver; /*!< Always 0.*/
+ size_t len; /*!< The size of \p N in Bytes. */
+
+ mbedtls_mpi N; /*!< The public modulus. */
+ mbedtls_mpi E; /*!< The public exponent. */
+
+ mbedtls_mpi D; /*!< The private exponent. */
+ mbedtls_mpi P; /*!< The first prime factor. */
+ mbedtls_mpi Q; /*!< The second prime factor. */
+
+ mbedtls_mpi DP; /*!< <code>D % (P - 1)</code>. */
+ mbedtls_mpi DQ; /*!< <code>D % (Q - 1)</code>. */
+ mbedtls_mpi QP; /*!< <code>1 / (Q % P)</code>. */
+
+ mbedtls_mpi RN; /*!< cached <code>R^2 mod N</code>. */
+
+ mbedtls_mpi RP; /*!< cached <code>R^2 mod P</code>. */
+ mbedtls_mpi RQ; /*!< cached <code>R^2 mod Q</code>. */
+
+ mbedtls_mpi Vi; /*!< The cached blinding value. */
+ mbedtls_mpi Vf; /*!< The cached un-blinding value. */
+
+ int padding; /*!< Selects padding mode:
+ #MBEDTLS_RSA_PKCS_V15 for 1.5 padding and
+ #MBEDTLS_RSA_PKCS_V21 for OAEP or PSS. */
+ int hash_id; /*!< Hash identifier of mbedtls_md_type_t type,
+ as specified in md.h for use in the MGF
+ mask generating function used in the
+ EME-OAEP and EMSA-PSS encodings. */
+#if defined(MBEDTLS_THREADING_C)
+ mbedtls_threading_mutex_t mutex; /*!< Thread-safety mutex. */
+#endif
+}
+mbedtls_rsa_context;
+
+#else /* MBEDTLS_RSA_ALT */
+#include "rsa_alt.h"
+#endif /* MBEDTLS_RSA_ALT */
+
+/**
+ * \brief This function initializes an RSA context.
+ *
+ * \note Set padding to #MBEDTLS_RSA_PKCS_V21 for the RSAES-OAEP
+ * encryption scheme and the RSASSA-PSS signature scheme.
+ *
+ * \note The \p hash_id parameter is ignored when using
+ * #MBEDTLS_RSA_PKCS_V15 padding.
+ *
+ * \note The choice of padding mode is strictly enforced for private key
+ * operations, since there might be security concerns in
+ * mixing padding modes. For public key operations it is
+ * a default value, which can be overriden by calling specific
+ * \c rsa_rsaes_xxx or \c rsa_rsassa_xxx functions.
+ *
+ * \note The hash selected in \p hash_id is always used for OEAP
+ * encryption. For PSS signatures, it is always used for
+ * making signatures, but can be overriden for verifying them.
+ * If set to #MBEDTLS_MD_NONE, it is always overriden.
+ *
+ * \param ctx The RSA context to initialize. This must not be \c NULL.
+ * \param padding The padding mode to use. This must be either
+ * #MBEDTLS_RSA_PKCS_V15 or #MBEDTLS_RSA_PKCS_V21.
+ * \param hash_id The hash identifier of ::mbedtls_md_type_t type, if
+ * \p padding is #MBEDTLS_RSA_PKCS_V21. It is unused
+ * otherwise.
+ */
+void mbedtls_rsa_init( mbedtls_rsa_context *ctx,
+ int padding,
+ int hash_id );
+
+/**
+ * \brief This function imports a set of core parameters into an
+ * RSA context.
+ *
+ * \note This function can be called multiple times for successive
+ * imports, if the parameters are not simultaneously present.
+ *
+ * Any sequence of calls to this function should be followed
+ * by a call to mbedtls_rsa_complete(), which checks and
+ * completes the provided information to a ready-for-use
+ * public or private RSA key.
+ *
+ * \note See mbedtls_rsa_complete() for more information on which
+ * parameters are necessary to set up a private or public
+ * RSA key.
+ *
+ * \note The imported parameters are copied and need not be preserved
+ * for the lifetime of the RSA context being set up.
+ *
+ * \param ctx The initialized RSA context to store the parameters in.
+ * \param N The RSA modulus. This may be \c NULL.
+ * \param P The first prime factor of \p N. This may be \c NULL.
+ * \param Q The second prime factor of \p N. This may be \c NULL.
+ * \param D The private exponent. This may be \c NULL.
+ * \param E The public exponent. This may be \c NULL.
+ *
+ * \return \c 0 on success.
+ * \return A non-zero error code on failure.
+ */
+int mbedtls_rsa_import( mbedtls_rsa_context *ctx,
+ const mbedtls_mpi *N,
+ const mbedtls_mpi *P, const mbedtls_mpi *Q,
+ const mbedtls_mpi *D, const mbedtls_mpi *E );
+
+/**
+ * \brief This function imports core RSA parameters, in raw big-endian
+ * binary format, into an RSA context.
+ *
+ * \note This function can be called multiple times for successive
+ * imports, if the parameters are not simultaneously present.
+ *
+ * Any sequence of calls to this function should be followed
+ * by a call to mbedtls_rsa_complete(), which checks and
+ * completes the provided information to a ready-for-use
+ * public or private RSA key.
+ *
+ * \note See mbedtls_rsa_complete() for more information on which
+ * parameters are necessary to set up a private or public
+ * RSA key.
+ *
+ * \note The imported parameters are copied and need not be preserved
+ * for the lifetime of the RSA context being set up.
+ *
+ * \param ctx The initialized RSA context to store the parameters in.
+ * \param N The RSA modulus. This may be \c NULL.
+ * \param N_len The Byte length of \p N; it is ignored if \p N == NULL.
+ * \param P The first prime factor of \p N. This may be \c NULL.
+ * \param P_len The Byte length of \p P; it ns ignored if \p P == NULL.
+ * \param Q The second prime factor of \p N. This may be \c NULL.
+ * \param Q_len The Byte length of \p Q; it is ignored if \p Q == NULL.
+ * \param D The private exponent. This may be \c NULL.
+ * \param D_len The Byte length of \p D; it is ignored if \p D == NULL.
+ * \param E The public exponent. This may be \c NULL.
+ * \param E_len The Byte length of \p E; it is ignored if \p E == NULL.
+ *
+ * \return \c 0 on success.
+ * \return A non-zero error code on failure.
+ */
+int mbedtls_rsa_import_raw( mbedtls_rsa_context *ctx,
+ unsigned char const *N, size_t N_len,
+ unsigned char const *P, size_t P_len,
+ unsigned char const *Q, size_t Q_len,
+ unsigned char const *D, size_t D_len,
+ unsigned char const *E, size_t E_len );
+
+/**
+ * \brief This function completes an RSA context from
+ * a set of imported core parameters.
+ *
+ * To setup an RSA public key, precisely \p N and \p E
+ * must have been imported.
+ *
+ * To setup an RSA private key, sufficient information must
+ * be present for the other parameters to be derivable.
+ *
+ * The default implementation supports the following:
+ * <ul><li>Derive \p P, \p Q from \p N, \p D, \p E.</li>
+ * <li>Derive \p N, \p D from \p P, \p Q, \p E.</li></ul>
+ * Alternative implementations need not support these.
+ *
+ * If this function runs successfully, it guarantees that
+ * the RSA context can be used for RSA operations without
+ * the risk of failure or crash.
+ *
+ * \warning This function need not perform consistency checks
+ * for the imported parameters. In particular, parameters that
+ * are not needed by the implementation might be silently
+ * discarded and left unchecked. To check the consistency
+ * of the key material, see mbedtls_rsa_check_privkey().
+ *
+ * \param ctx The initialized RSA context holding imported parameters.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_RSA_BAD_INPUT_DATA if the attempted derivations
+ * failed.
+ *
+ */
+int mbedtls_rsa_complete( mbedtls_rsa_context *ctx );
+
+/**
+ * \brief This function exports the core parameters of an RSA key.
+ *
+ * If this function runs successfully, the non-NULL buffers
+ * pointed to by \p N, \p P, \p Q, \p D, and \p E are fully
+ * written, with additional unused space filled leading by
+ * zero Bytes.
+ *
+ * Possible reasons for returning
+ * #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED:<ul>
+ * <li>An alternative RSA implementation is in use, which
+ * stores the key externally, and either cannot or should
+ * not export it into RAM.</li>
+ * <li>A SW or HW implementation might not support a certain
+ * deduction. For example, \p P, \p Q from \p N, \p D,
+ * and \p E if the former are not part of the
+ * implementation.</li></ul>
+ *
+ * If the function fails due to an unsupported operation,
+ * the RSA context stays intact and remains usable.
+ *
+ * \param ctx The initialized RSA context.
+ * \param N The MPI to hold the RSA modulus.
+ * This may be \c NULL if this field need not be exported.
+ * \param P The MPI to hold the first prime factor of \p N.
+ * This may be \c NULL if this field need not be exported.
+ * \param Q The MPI to hold the second prime factor of \p N.
+ * This may be \c NULL if this field need not be exported.
+ * \param D The MPI to hold the private exponent.
+ * This may be \c NULL if this field need not be exported.
+ * \param E The MPI to hold the public exponent.
+ * This may be \c NULL if this field need not be exported.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED if exporting the
+ * requested parameters cannot be done due to missing
+ * functionality or because of security policies.
+ * \return A non-zero return code on any other failure.
+ *
+ */
+int mbedtls_rsa_export( const mbedtls_rsa_context *ctx,
+ mbedtls_mpi *N, mbedtls_mpi *P, mbedtls_mpi *Q,
+ mbedtls_mpi *D, mbedtls_mpi *E );
+
+/**
+ * \brief This function exports core parameters of an RSA key
+ * in raw big-endian binary format.
+ *
+ * If this function runs successfully, the non-NULL buffers
+ * pointed to by \p N, \p P, \p Q, \p D, and \p E are fully
+ * written, with additional unused space filled leading by
+ * zero Bytes.
+ *
+ * Possible reasons for returning
+ * #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED:<ul>
+ * <li>An alternative RSA implementation is in use, which
+ * stores the key externally, and either cannot or should
+ * not export it into RAM.</li>
+ * <li>A SW or HW implementation might not support a certain
+ * deduction. For example, \p P, \p Q from \p N, \p D,
+ * and \p E if the former are not part of the
+ * implementation.</li></ul>
+ * If the function fails due to an unsupported operation,
+ * the RSA context stays intact and remains usable.
+ *
+ * \note The length parameters are ignored if the corresponding
+ * buffer pointers are NULL.
+ *
+ * \param ctx The initialized RSA context.
+ * \param N The Byte array to store the RSA modulus,
+ * or \c NULL if this field need not be exported.
+ * \param N_len The size of the buffer for the modulus.
+ * \param P The Byte array to hold the first prime factor of \p N,
+ * or \c NULL if this field need not be exported.
+ * \param P_len The size of the buffer for the first prime factor.
+ * \param Q The Byte array to hold the second prime factor of \p N,
+ * or \c NULL if this field need not be exported.
+ * \param Q_len The size of the buffer for the second prime factor.
+ * \param D The Byte array to hold the private exponent,
+ * or \c NULL if this field need not be exported.
+ * \param D_len The size of the buffer for the private exponent.
+ * \param E The Byte array to hold the public exponent,
+ * or \c NULL if this field need not be exported.
+ * \param E_len The size of the buffer for the public exponent.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED if exporting the
+ * requested parameters cannot be done due to missing
+ * functionality or because of security policies.
+ * \return A non-zero return code on any other failure.
+ */
+int mbedtls_rsa_export_raw( const mbedtls_rsa_context *ctx,
+ unsigned char *N, size_t N_len,
+ unsigned char *P, size_t P_len,
+ unsigned char *Q, size_t Q_len,
+ unsigned char *D, size_t D_len,
+ unsigned char *E, size_t E_len );
+
+/**
+ * \brief This function exports CRT parameters of a private RSA key.
+ *
+ * \note Alternative RSA implementations not using CRT-parameters
+ * internally can implement this function based on
+ * mbedtls_rsa_deduce_opt().
+ *
+ * \param ctx The initialized RSA context.
+ * \param DP The MPI to hold \c D modulo `P-1`,
+ * or \c NULL if it need not be exported.
+ * \param DQ The MPI to hold \c D modulo `Q-1`,
+ * or \c NULL if it need not be exported.
+ * \param QP The MPI to hold modular inverse of \c Q modulo \c P,
+ * or \c NULL if it need not be exported.
+ *
+ * \return \c 0 on success.
+ * \return A non-zero error code on failure.
+ *
+ */
+int mbedtls_rsa_export_crt( const mbedtls_rsa_context *ctx,
+ mbedtls_mpi *DP, mbedtls_mpi *DQ, mbedtls_mpi *QP );
+
+/**
+ * \brief This function sets padding for an already initialized RSA
+ * context. See mbedtls_rsa_init() for details.
+ *
+ * \param ctx The initialized RSA context to be configured.
+ * \param padding The padding mode to use. This must be either
+ * #MBEDTLS_RSA_PKCS_V15 or #MBEDTLS_RSA_PKCS_V21.
+ * \param hash_id The #MBEDTLS_RSA_PKCS_V21 hash identifier.
+ */
+void mbedtls_rsa_set_padding( mbedtls_rsa_context *ctx, int padding,
+ int hash_id );
+
+/**
+ * \brief This function retrieves the length of RSA modulus in Bytes.
+ *
+ * \param ctx The initialized RSA context.
+ *
+ * \return The length of the RSA modulus in Bytes.
+ *
+ */
+size_t mbedtls_rsa_get_len( const mbedtls_rsa_context *ctx );
+
+/**
+ * \brief This function generates an RSA keypair.
+ *
+ * \note mbedtls_rsa_init() must be called before this function,
+ * to set up the RSA context.
+ *
+ * \param ctx The initialized RSA context used to hold the key.
+ * \param f_rng The RNG function to be used for key generation.
+ * This must not be \c NULL.
+ * \param p_rng The RNG context to be passed to \p f_rng.
+ * This may be \c NULL if \p f_rng doesn't need a context.
+ * \param nbits The size of the public key in bits.
+ * \param exponent The public exponent to use. For example, \c 65537.
+ * This must be odd and greater than \c 1.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_gen_key( mbedtls_rsa_context *ctx,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng,
+ unsigned int nbits, int exponent );
+
+/**
+ * \brief This function checks if a context contains at least an RSA
+ * public key.
+ *
+ * If the function runs successfully, it is guaranteed that
+ * enough information is present to perform an RSA public key
+ * operation using mbedtls_rsa_public().
+ *
+ * \param ctx The initialized RSA context to check.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ *
+ */
+int mbedtls_rsa_check_pubkey( const mbedtls_rsa_context *ctx );
+
+/**
+ * \brief This function checks if a context contains an RSA private key
+ * and perform basic consistency checks.
+ *
+ * \note The consistency checks performed by this function not only
+ * ensure that mbedtls_rsa_private() can be called successfully
+ * on the given context, but that the various parameters are
+ * mutually consistent with high probability, in the sense that
+ * mbedtls_rsa_public() and mbedtls_rsa_private() are inverses.
+ *
+ * \warning This function should catch accidental misconfigurations
+ * like swapping of parameters, but it cannot establish full
+ * trust in neither the quality nor the consistency of the key
+ * material that was used to setup the given RSA context:
+ * <ul><li>Consistency: Imported parameters that are irrelevant
+ * for the implementation might be silently dropped. If dropped,
+ * the current function does not have access to them,
+ * and therefore cannot check them. See mbedtls_rsa_complete().
+ * If you want to check the consistency of the entire
+ * content of an PKCS1-encoded RSA private key, for example, you
+ * should use mbedtls_rsa_validate_params() before setting
+ * up the RSA context.
+ * Additionally, if the implementation performs empirical checks,
+ * these checks substantiate but do not guarantee consistency.</li>
+ * <li>Quality: This function is not expected to perform
+ * extended quality assessments like checking that the prime
+ * factors are safe. Additionally, it is the responsibility of the
+ * user to ensure the trustworthiness of the source of his RSA
+ * parameters, which goes beyond what is effectively checkable
+ * by the library.</li></ul>
+ *
+ * \param ctx The initialized RSA context to check.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_check_privkey( const mbedtls_rsa_context *ctx );
+
+/**
+ * \brief This function checks a public-private RSA key pair.
+ *
+ * It checks each of the contexts, and makes sure they match.
+ *
+ * \param pub The initialized RSA context holding the public key.
+ * \param prv The initialized RSA context holding the private key.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_check_pub_priv( const mbedtls_rsa_context *pub,
+ const mbedtls_rsa_context *prv );
+
+/**
+ * \brief This function performs an RSA public key operation.
+ *
+ * \param ctx The initialized RSA context to use.
+ * \param input The input buffer. This must be a readable buffer
+ * of length \c ctx->len Bytes. For example, \c 256 Bytes
+ * for an 2048-bit RSA modulus.
+ * \param output The output buffer. This must be a writable buffer
+ * of length \c ctx->len Bytes. For example, \c 256 Bytes
+ * for an 2048-bit RSA modulus.
+ *
+ * \note This function does not handle message padding.
+ *
+ * \note Make sure to set \p input[0] = 0 or ensure that
+ * input is smaller than \p N.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_public( mbedtls_rsa_context *ctx,
+ const unsigned char *input,
+ unsigned char *output );
+
+/**
+ * \brief This function performs an RSA private key operation.
+ *
+ * \note Blinding is used if and only if a PRNG is provided.
+ *
+ * \note If blinding is used, both the base of exponentation
+ * and the exponent are blinded, providing protection
+ * against some side-channel attacks.
+ *
+ * \warning It is deprecated and a security risk to not provide
+ * a PRNG here and thereby prevent the use of blinding.
+ * Future versions of the library may enforce the presence
+ * of a PRNG.
+ *
+ * \param ctx The initialized RSA context to use.
+ * \param f_rng The RNG function, used for blinding. It is discouraged
+ * and deprecated to pass \c NULL here, in which case
+ * blinding will be omitted.
+ * \param p_rng The RNG context to pass to \p f_rng. This may be \c NULL
+ * if \p f_rng is \c NULL or if \p f_rng doesn't need a context.
+ * \param input The input buffer. This must be a readable buffer
+ * of length \c ctx->len Bytes. For example, \c 256 Bytes
+ * for an 2048-bit RSA modulus.
+ * \param output The output buffer. This must be a writable buffer
+ * of length \c ctx->len Bytes. For example, \c 256 Bytes
+ * for an 2048-bit RSA modulus.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ *
+ */
+int mbedtls_rsa_private( mbedtls_rsa_context *ctx,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng,
+ const unsigned char *input,
+ unsigned char *output );
+
+/**
+ * \brief This function adds the message padding, then performs an RSA
+ * operation.
+ *
+ * It is the generic wrapper for performing a PKCS#1 encryption
+ * operation using the \p mode from the context.
+ *
+ * \deprecated It is deprecated and discouraged to call this function
+ * in #MBEDTLS_RSA_PRIVATE mode. Future versions of the library
+ * are likely to remove the \p mode argument and have it
+ * implicitly set to #MBEDTLS_RSA_PUBLIC.
+ *
+ * \note Alternative implementations of RSA need not support
+ * mode being set to #MBEDTLS_RSA_PRIVATE and might instead
+ * return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED.
+ *
+ * \param ctx The initialized RSA context to use.
+ * \param f_rng The RNG to use. It is mandatory for PKCS#1 v2.1 padding
+ * encoding, and for PKCS#1 v1.5 padding encoding when used
+ * with \p mode set to #MBEDTLS_RSA_PUBLIC. For PKCS#1 v1.5
+ * padding encoding and \p mode set to #MBEDTLS_RSA_PRIVATE,
+ * it is used for blinding and should be provided in this
+ * case; see mbedtls_rsa_private() for more.
+ * \param p_rng The RNG context to be passed to \p f_rng. May be
+ * \c NULL if \p f_rng is \c NULL or if \p f_rng doesn't
+ * need a context argument.
+ * \param mode The mode of operation. This must be either
+ * #MBEDTLS_RSA_PUBLIC or #MBEDTLS_RSA_PRIVATE (deprecated).
+ * \param ilen The length of the plaintext in Bytes.
+ * \param input The input data to encrypt. This must be a readable
+ * buffer of size \p ilen Bytes. This must not be \c NULL.
+ * \param output The output buffer. This must be a writable buffer
+ * of length \c ctx->len Bytes. For example, \c 256 Bytes
+ * for an 2048-bit RSA modulus.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_pkcs1_encrypt( mbedtls_rsa_context *ctx,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng,
+ int mode, size_t ilen,
+ const unsigned char *input,
+ unsigned char *output );
+
+/**
+ * \brief This function performs a PKCS#1 v1.5 encryption operation
+ * (RSAES-PKCS1-v1_5-ENCRYPT).
+ *
+ * \deprecated It is deprecated and discouraged to call this function
+ * in #MBEDTLS_RSA_PRIVATE mode. Future versions of the library
+ * are likely to remove the \p mode argument and have it
+ * implicitly set to #MBEDTLS_RSA_PUBLIC.
+ *
+ * \note Alternative implementations of RSA need not support
+ * mode being set to #MBEDTLS_RSA_PRIVATE and might instead
+ * return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED.
+ *
+ * \param ctx The initialized RSA context to use.
+ * \param f_rng The RNG function to use. It is needed for padding generation
+ * if \p mode is #MBEDTLS_RSA_PUBLIC. If \p mode is
+ * #MBEDTLS_RSA_PRIVATE (discouraged), it is used for
+ * blinding and should be provided; see mbedtls_rsa_private().
+ * \param p_rng The RNG context to be passed to \p f_rng. This may
+ * be \c NULL if \p f_rng is \c NULL or if \p f_rng
+ * doesn't need a context argument.
+ * \param mode The mode of operation. This must be either
+ * #MBEDTLS_RSA_PUBLIC or #MBEDTLS_RSA_PRIVATE (deprecated).
+ * \param ilen The length of the plaintext in Bytes.
+ * \param input The input data to encrypt. This must be a readable
+ * buffer of size \p ilen Bytes. This must not be \c NULL.
+ * \param output The output buffer. This must be a writable buffer
+ * of length \c ctx->len Bytes. For example, \c 256 Bytes
+ * for an 2048-bit RSA modulus.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_rsaes_pkcs1_v15_encrypt( mbedtls_rsa_context *ctx,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng,
+ int mode, size_t ilen,
+ const unsigned char *input,
+ unsigned char *output );
+
+/**
+ * \brief This function performs a PKCS#1 v2.1 OAEP encryption
+ * operation (RSAES-OAEP-ENCRYPT).
+ *
+ * \note The output buffer must be as large as the size
+ * of ctx->N. For example, 128 Bytes if RSA-1024 is used.
+ *
+ * \deprecated It is deprecated and discouraged to call this function
+ * in #MBEDTLS_RSA_PRIVATE mode. Future versions of the library
+ * are likely to remove the \p mode argument and have it
+ * implicitly set to #MBEDTLS_RSA_PUBLIC.
+ *
+ * \note Alternative implementations of RSA need not support
+ * mode being set to #MBEDTLS_RSA_PRIVATE and might instead
+ * return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED.
+ *
+ * \param ctx The initnialized RSA context to use.
+ * \param f_rng The RNG function to use. This is needed for padding
+ * generation and must be provided.
+ * \param p_rng The RNG context to be passed to \p f_rng. This may
+ * be \c NULL if \p f_rng doesn't need a context argument.
+ * \param mode The mode of operation. This must be either
+ * #MBEDTLS_RSA_PUBLIC or #MBEDTLS_RSA_PRIVATE (deprecated).
+ * \param label The buffer holding the custom label to use.
+ * This must be a readable buffer of length \p label_len
+ * Bytes. It may be \c NULL if \p label_len is \c 0.
+ * \param label_len The length of the label in Bytes.
+ * \param ilen The length of the plaintext buffer \p input in Bytes.
+ * \param input The input data to encrypt. This must be a readable
+ * buffer of size \p ilen Bytes. This must not be \c NULL.
+ * \param output The output buffer. This must be a writable buffer
+ * of length \c ctx->len Bytes. For example, \c 256 Bytes
+ * for an 2048-bit RSA modulus.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_rsaes_oaep_encrypt( mbedtls_rsa_context *ctx,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng,
+ int mode,
+ const unsigned char *label, size_t label_len,
+ size_t ilen,
+ const unsigned char *input,
+ unsigned char *output );
+
+/**
+ * \brief This function performs an RSA operation, then removes the
+ * message padding.
+ *
+ * It is the generic wrapper for performing a PKCS#1 decryption
+ * operation using the \p mode from the context.
+ *
+ * \note The output buffer length \c output_max_len should be
+ * as large as the size \p ctx->len of \p ctx->N (for example,
+ * 128 Bytes if RSA-1024 is used) to be able to hold an
+ * arbitrary decrypted message. If it is not large enough to
+ * hold the decryption of the particular ciphertext provided,
+ * the function returns \c MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE.
+ *
+ * \deprecated It is deprecated and discouraged to call this function
+ * in #MBEDTLS_RSA_PUBLIC mode. Future versions of the library
+ * are likely to remove the \p mode argument and have it
+ * implicitly set to #MBEDTLS_RSA_PRIVATE.
+ *
+ * \note Alternative implementations of RSA need not support
+ * mode being set to #MBEDTLS_RSA_PUBLIC and might instead
+ * return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED.
+ *
+ * \param ctx The initialized RSA context to use.
+ * \param f_rng The RNG function. If \p mode is #MBEDTLS_RSA_PRIVATE,
+ * this is used for blinding and should be provided; see
+ * mbedtls_rsa_private() for more. If \p mode is
+ * #MBEDTLS_RSA_PUBLIC, it is ignored.
+ * \param p_rng The RNG context to be passed to \p f_rng. This may be
+ * \c NULL if \p f_rng is \c NULL or doesn't need a context.
+ * \param mode The mode of operation. This must be either
+ * #MBEDTLS_RSA_PRIVATE or #MBEDTLS_RSA_PUBLIC (deprecated).
+ * \param olen The address at which to store the length of
+ * the plaintext. This must not be \c NULL.
+ * \param input The ciphertext buffer. This must be a readable buffer
+ * of length \c ctx->len Bytes. For example, \c 256 Bytes
+ * for an 2048-bit RSA modulus.
+ * \param output The buffer used to hold the plaintext. This must
+ * be a writable buffer of length \p output_max_len Bytes.
+ * \param output_max_len The length in Bytes of the output buffer \p output.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_pkcs1_decrypt( mbedtls_rsa_context *ctx,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng,
+ int mode, size_t *olen,
+ const unsigned char *input,
+ unsigned char *output,
+ size_t output_max_len );
+
+/**
+ * \brief This function performs a PKCS#1 v1.5 decryption
+ * operation (RSAES-PKCS1-v1_5-DECRYPT).
+ *
+ * \note The output buffer length \c output_max_len should be
+ * as large as the size \p ctx->len of \p ctx->N, for example,
+ * 128 Bytes if RSA-1024 is used, to be able to hold an
+ * arbitrary decrypted message. If it is not large enough to
+ * hold the decryption of the particular ciphertext provided,
+ * the function returns #MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE.
+ *
+ * \deprecated It is deprecated and discouraged to call this function
+ * in #MBEDTLS_RSA_PUBLIC mode. Future versions of the library
+ * are likely to remove the \p mode argument and have it
+ * implicitly set to #MBEDTLS_RSA_PRIVATE.
+ *
+ * \note Alternative implementations of RSA need not support
+ * mode being set to #MBEDTLS_RSA_PUBLIC and might instead
+ * return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED.
+ *
+ * \param ctx The initialized RSA context to use.
+ * \param f_rng The RNG function. If \p mode is #MBEDTLS_RSA_PRIVATE,
+ * this is used for blinding and should be provided; see
+ * mbedtls_rsa_private() for more. If \p mode is
+ * #MBEDTLS_RSA_PUBLIC, it is ignored.
+ * \param p_rng The RNG context to be passed to \p f_rng. This may be
+ * \c NULL if \p f_rng is \c NULL or doesn't need a context.
+ * \param mode The mode of operation. This must be either
+ * #MBEDTLS_RSA_PRIVATE or #MBEDTLS_RSA_PUBLIC (deprecated).
+ * \param olen The address at which to store the length of
+ * the plaintext. This must not be \c NULL.
+ * \param input The ciphertext buffer. This must be a readable buffer
+ * of length \c ctx->len Bytes. For example, \c 256 Bytes
+ * for an 2048-bit RSA modulus.
+ * \param output The buffer used to hold the plaintext. This must
+ * be a writable buffer of length \p output_max_len Bytes.
+ * \param output_max_len The length in Bytes of the output buffer \p output.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ *
+ */
+int mbedtls_rsa_rsaes_pkcs1_v15_decrypt( mbedtls_rsa_context *ctx,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng,
+ int mode, size_t *olen,
+ const unsigned char *input,
+ unsigned char *output,
+ size_t output_max_len );
+
+/**
+ * \brief This function performs a PKCS#1 v2.1 OAEP decryption
+ * operation (RSAES-OAEP-DECRYPT).
+ *
+ * \note The output buffer length \c output_max_len should be
+ * as large as the size \p ctx->len of \p ctx->N, for
+ * example, 128 Bytes if RSA-1024 is used, to be able to
+ * hold an arbitrary decrypted message. If it is not
+ * large enough to hold the decryption of the particular
+ * ciphertext provided, the function returns
+ * #MBEDTLS_ERR_RSA_OUTPUT_TOO_LARGE.
+ *
+ * \deprecated It is deprecated and discouraged to call this function
+ * in #MBEDTLS_RSA_PUBLIC mode. Future versions of the library
+ * are likely to remove the \p mode argument and have it
+ * implicitly set to #MBEDTLS_RSA_PRIVATE.
+ *
+ * \note Alternative implementations of RSA need not support
+ * mode being set to #MBEDTLS_RSA_PUBLIC and might instead
+ * return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED.
+ *
+ * \param ctx The initialized RSA context to use.
+ * \param f_rng The RNG function. If \p mode is #MBEDTLS_RSA_PRIVATE,
+ * this is used for blinding and should be provided; see
+ * mbedtls_rsa_private() for more. If \p mode is
+ * #MBEDTLS_RSA_PUBLIC, it is ignored.
+ * \param p_rng The RNG context to be passed to \p f_rng. This may be
+ * \c NULL if \p f_rng is \c NULL or doesn't need a context.
+ * \param mode The mode of operation. This must be either
+ * #MBEDTLS_RSA_PRIVATE or #MBEDTLS_RSA_PUBLIC (deprecated).
+ * \param label The buffer holding the custom label to use.
+ * This must be a readable buffer of length \p label_len
+ * Bytes. It may be \c NULL if \p label_len is \c 0.
+ * \param label_len The length of the label in Bytes.
+ * \param olen The address at which to store the length of
+ * the plaintext. This must not be \c NULL.
+ * \param input The ciphertext buffer. This must be a readable buffer
+ * of length \c ctx->len Bytes. For example, \c 256 Bytes
+ * for an 2048-bit RSA modulus.
+ * \param output The buffer used to hold the plaintext. This must
+ * be a writable buffer of length \p output_max_len Bytes.
+ * \param output_max_len The length in Bytes of the output buffer \p output.
+ *
+ * \return \c 0 on success.
+ * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_rsaes_oaep_decrypt( mbedtls_rsa_context *ctx,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng,
+ int mode,
+ const unsigned char *label, size_t label_len,
+ size_t *olen,
+ const unsigned char *input,
+ unsigned char *output,
+ size_t output_max_len );
+
+/**
+ * \brief This function performs a private RSA operation to sign
+ * a message digest using PKCS#1.
+ *
+ * It is the generic wrapper for performing a PKCS#1
+ * signature using the \p mode from the context.
+ *
+ * \note The \p sig buffer must be as large as the size
+ * of \p ctx->N. For example, 128 Bytes if RSA-1024 is used.
+ *
+ * \note For PKCS#1 v2.1 encoding, see comments on
+ * mbedtls_rsa_rsassa_pss_sign() for details on
+ * \p md_alg and \p hash_id.
+ *
+ * \deprecated It is deprecated and discouraged to call this function
+ * in #MBEDTLS_RSA_PUBLIC mode. Future versions of the library
+ * are likely to remove the \p mode argument and have it
+ * implicitly set to #MBEDTLS_RSA_PRIVATE.
+ *
+ * \note Alternative implementations of RSA need not support
+ * mode being set to #MBEDTLS_RSA_PUBLIC and might instead
+ * return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED.
+ *
+ * \param ctx The initialized RSA context to use.
+ * \param f_rng The RNG function to use. If the padding mode is PKCS#1 v2.1,
+ * this must be provided. If the padding mode is PKCS#1 v1.5 and
+ * \p mode is #MBEDTLS_RSA_PRIVATE, it is used for blinding
+ * and should be provided; see mbedtls_rsa_private() for more
+ * more. It is ignored otherwise.
+ * \param p_rng The RNG context to be passed to \p f_rng. This may be \c NULL
+ * if \p f_rng is \c NULL or doesn't need a context argument.
+ * \param mode The mode of operation. This must be either
+ * #MBEDTLS_RSA_PRIVATE or #MBEDTLS_RSA_PUBLIC (deprecated).
+ * \param md_alg The message-digest algorithm used to hash the original data.
+ * Use #MBEDTLS_MD_NONE for signing raw data.
+ * \param hashlen The length of the message digest.
+ * Ths is only used if \p md_alg is #MBEDTLS_MD_NONE.
+ * \param hash The buffer holding the message digest or raw data.
+ * If \p md_alg is #MBEDTLS_MD_NONE, this must be a readable
+ * buffer of length \p hashlen Bytes. If \p md_alg is not
+ * #MBEDTLS_MD_NONE, it must be a readable buffer of length
+ * the size of the hash corresponding to \p md_alg.
+ * \param sig The buffer to hold the signature. This must be a writable
+ * buffer of length \c ctx->len Bytes. For example, \c 256 Bytes
+ * for an 2048-bit RSA modulus.
+ *
+ * \return \c 0 if the signing operation was successful.
+ * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_pkcs1_sign( mbedtls_rsa_context *ctx,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng,
+ int mode,
+ mbedtls_md_type_t md_alg,
+ unsigned int hashlen,
+ const unsigned char *hash,
+ unsigned char *sig );
+
+/**
+ * \brief This function performs a PKCS#1 v1.5 signature
+ * operation (RSASSA-PKCS1-v1_5-SIGN).
+ *
+ * \deprecated It is deprecated and discouraged to call this function
+ * in #MBEDTLS_RSA_PUBLIC mode. Future versions of the library
+ * are likely to remove the \p mode argument and have it
+ * implicitly set to #MBEDTLS_RSA_PRIVATE.
+ *
+ * \note Alternative implementations of RSA need not support
+ * mode being set to #MBEDTLS_RSA_PUBLIC and might instead
+ * return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED.
+ *
+ * \param ctx The initialized RSA context to use.
+ * \param f_rng The RNG function. If \p mode is #MBEDTLS_RSA_PRIVATE,
+ * this is used for blinding and should be provided; see
+ * mbedtls_rsa_private() for more. If \p mode is
+ * #MBEDTLS_RSA_PUBLIC, it is ignored.
+ * \param p_rng The RNG context to be passed to \p f_rng. This may be \c NULL
+ * if \p f_rng is \c NULL or doesn't need a context argument.
+ * \param mode The mode of operation. This must be either
+ * #MBEDTLS_RSA_PRIVATE or #MBEDTLS_RSA_PUBLIC (deprecated).
+ * \param md_alg The message-digest algorithm used to hash the original data.
+ * Use #MBEDTLS_MD_NONE for signing raw data.
+ * \param hashlen The length of the message digest.
+ * Ths is only used if \p md_alg is #MBEDTLS_MD_NONE.
+ * \param hash The buffer holding the message digest or raw data.
+ * If \p md_alg is #MBEDTLS_MD_NONE, this must be a readable
+ * buffer of length \p hashlen Bytes. If \p md_alg is not
+ * #MBEDTLS_MD_NONE, it must be a readable buffer of length
+ * the size of the hash corresponding to \p md_alg.
+ * \param sig The buffer to hold the signature. This must be a writable
+ * buffer of length \c ctx->len Bytes. For example, \c 256 Bytes
+ * for an 2048-bit RSA modulus.
+ *
+ * \return \c 0 if the signing operation was successful.
+ * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_rsassa_pkcs1_v15_sign( mbedtls_rsa_context *ctx,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng,
+ int mode,
+ mbedtls_md_type_t md_alg,
+ unsigned int hashlen,
+ const unsigned char *hash,
+ unsigned char *sig );
+
+/**
+ * \brief This function performs a PKCS#1 v2.1 PSS signature
+ * operation (RSASSA-PSS-SIGN).
+ *
+ * \note The \p hash_id in the RSA context is the one used for the
+ * encoding. \p md_alg in the function call is the type of hash
+ * that is encoded. According to <em>RFC-3447: Public-Key
+ * Cryptography Standards (PKCS) #1 v2.1: RSA Cryptography
+ * Specifications</em> it is advised to keep both hashes the
+ * same.
+ *
+ * \note This function always uses the maximum possible salt size,
+ * up to the length of the payload hash. This choice of salt
+ * size complies with FIPS 186-4 §5.5 (e) and RFC 8017 (PKCS#1
+ * v2.2) §9.1.1 step 3. Furthermore this function enforces a
+ * minimum salt size which is the hash size minus 2 bytes. If
+ * this minimum size is too large given the key size (the salt
+ * size, plus the hash size, plus 2 bytes must be no more than
+ * the key size in bytes), this function returns
+ * #MBEDTLS_ERR_RSA_BAD_INPUT_DATA.
+ *
+ * \deprecated It is deprecated and discouraged to call this function
+ * in #MBEDTLS_RSA_PUBLIC mode. Future versions of the library
+ * are likely to remove the \p mode argument and have it
+ * implicitly set to #MBEDTLS_RSA_PRIVATE.
+ *
+ * \note Alternative implementations of RSA need not support
+ * mode being set to #MBEDTLS_RSA_PUBLIC and might instead
+ * return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED.
+ *
+ * \param ctx The initialized RSA context to use.
+ * \param f_rng The RNG function. It must not be \c NULL.
+ * \param p_rng The RNG context to be passed to \p f_rng. This may be \c NULL
+ * if \p f_rng doesn't need a context argument.
+ * \param mode The mode of operation. This must be either
+ * #MBEDTLS_RSA_PRIVATE or #MBEDTLS_RSA_PUBLIC (deprecated).
+ * \param md_alg The message-digest algorithm used to hash the original data.
+ * Use #MBEDTLS_MD_NONE for signing raw data.
+ * \param hashlen The length of the message digest.
+ * Ths is only used if \p md_alg is #MBEDTLS_MD_NONE.
+ * \param hash The buffer holding the message digest or raw data.
+ * If \p md_alg is #MBEDTLS_MD_NONE, this must be a readable
+ * buffer of length \p hashlen Bytes. If \p md_alg is not
+ * #MBEDTLS_MD_NONE, it must be a readable buffer of length
+ * the size of the hash corresponding to \p md_alg.
+ * \param sig The buffer to hold the signature. This must be a writable
+ * buffer of length \c ctx->len Bytes. For example, \c 256 Bytes
+ * for an 2048-bit RSA modulus.
+ *
+ * \return \c 0 if the signing operation was successful.
+ * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_rsassa_pss_sign( mbedtls_rsa_context *ctx,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng,
+ int mode,
+ mbedtls_md_type_t md_alg,
+ unsigned int hashlen,
+ const unsigned char *hash,
+ unsigned char *sig );
+
+/**
+ * \brief This function performs a public RSA operation and checks
+ * the message digest.
+ *
+ * This is the generic wrapper for performing a PKCS#1
+ * verification using the mode from the context.
+ *
+ * \note For PKCS#1 v2.1 encoding, see comments on
+ * mbedtls_rsa_rsassa_pss_verify() about \p md_alg and
+ * \p hash_id.
+ *
+ * \deprecated It is deprecated and discouraged to call this function
+ * in #MBEDTLS_RSA_PRIVATE mode. Future versions of the library
+ * are likely to remove the \p mode argument and have it
+ * set to #MBEDTLS_RSA_PUBLIC.
+ *
+ * \note Alternative implementations of RSA need not support
+ * mode being set to #MBEDTLS_RSA_PRIVATE and might instead
+ * return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED.
+ *
+ * \param ctx The initialized RSA public key context to use.
+ * \param f_rng The RNG function to use. If \p mode is #MBEDTLS_RSA_PRIVATE,
+ * this is used for blinding and should be provided; see
+ * mbedtls_rsa_private() for more. Otherwise, it is ignored.
+ * \param p_rng The RNG context to be passed to \p f_rng. This may be
+ * \c NULL if \p f_rng is \c NULL or doesn't need a context.
+ * \param mode The mode of operation. This must be either
+ * #MBEDTLS_RSA_PUBLIC or #MBEDTLS_RSA_PRIVATE (deprecated).
+ * \param md_alg The message-digest algorithm used to hash the original data.
+ * Use #MBEDTLS_MD_NONE for signing raw data.
+ * \param hashlen The length of the message digest.
+ * This is only used if \p md_alg is #MBEDTLS_MD_NONE.
+ * \param hash The buffer holding the message digest or raw data.
+ * If \p md_alg is #MBEDTLS_MD_NONE, this must be a readable
+ * buffer of length \p hashlen Bytes. If \p md_alg is not
+ * #MBEDTLS_MD_NONE, it must be a readable buffer of length
+ * the size of the hash corresponding to \p md_alg.
+ * \param sig The buffer holding the signature. This must be a readable
+ * buffer of length \c ctx->len Bytes. For example, \c 256 Bytes
+ * for an 2048-bit RSA modulus.
+ *
+ * \return \c 0 if the verify operation was successful.
+ * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_pkcs1_verify( mbedtls_rsa_context *ctx,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng,
+ int mode,
+ mbedtls_md_type_t md_alg,
+ unsigned int hashlen,
+ const unsigned char *hash,
+ const unsigned char *sig );
+
+/**
+ * \brief This function performs a PKCS#1 v1.5 verification
+ * operation (RSASSA-PKCS1-v1_5-VERIFY).
+ *
+ * \deprecated It is deprecated and discouraged to call this function
+ * in #MBEDTLS_RSA_PRIVATE mode. Future versions of the library
+ * are likely to remove the \p mode argument and have it
+ * set to #MBEDTLS_RSA_PUBLIC.
+ *
+ * \note Alternative implementations of RSA need not support
+ * mode being set to #MBEDTLS_RSA_PRIVATE and might instead
+ * return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED.
+ *
+ * \param ctx The initialized RSA public key context to use.
+ * \param f_rng The RNG function to use. If \p mode is #MBEDTLS_RSA_PRIVATE,
+ * this is used for blinding and should be provided; see
+ * mbedtls_rsa_private() for more. Otherwise, it is ignored.
+ * \param p_rng The RNG context to be passed to \p f_rng. This may be
+ * \c NULL if \p f_rng is \c NULL or doesn't need a context.
+ * \param mode The mode of operation. This must be either
+ * #MBEDTLS_RSA_PUBLIC or #MBEDTLS_RSA_PRIVATE (deprecated).
+ * \param md_alg The message-digest algorithm used to hash the original data.
+ * Use #MBEDTLS_MD_NONE for signing raw data.
+ * \param hashlen The length of the message digest.
+ * This is only used if \p md_alg is #MBEDTLS_MD_NONE.
+ * \param hash The buffer holding the message digest or raw data.
+ * If \p md_alg is #MBEDTLS_MD_NONE, this must be a readable
+ * buffer of length \p hashlen Bytes. If \p md_alg is not
+ * #MBEDTLS_MD_NONE, it must be a readable buffer of length
+ * the size of the hash corresponding to \p md_alg.
+ * \param sig The buffer holding the signature. This must be a readable
+ * buffer of length \c ctx->len Bytes. For example, \c 256 Bytes
+ * for an 2048-bit RSA modulus.
+ *
+ * \return \c 0 if the verify operation was successful.
+ * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_rsassa_pkcs1_v15_verify( mbedtls_rsa_context *ctx,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng,
+ int mode,
+ mbedtls_md_type_t md_alg,
+ unsigned int hashlen,
+ const unsigned char *hash,
+ const unsigned char *sig );
+
+/**
+ * \brief This function performs a PKCS#1 v2.1 PSS verification
+ * operation (RSASSA-PSS-VERIFY).
+ *
+ * The hash function for the MGF mask generating function
+ * is that specified in the RSA context.
+ *
+ * \note The \p hash_id in the RSA context is the one used for the
+ * verification. \p md_alg in the function call is the type of
+ * hash that is verified. According to <em>RFC-3447: Public-Key
+ * Cryptography Standards (PKCS) #1 v2.1: RSA Cryptography
+ * Specifications</em> it is advised to keep both hashes the
+ * same. If \p hash_id in the RSA context is unset,
+ * the \p md_alg from the function call is used.
+ *
+ * \deprecated It is deprecated and discouraged to call this function
+ * in #MBEDTLS_RSA_PRIVATE mode. Future versions of the library
+ * are likely to remove the \p mode argument and have it
+ * implicitly set to #MBEDTLS_RSA_PUBLIC.
+ *
+ * \note Alternative implementations of RSA need not support
+ * mode being set to #MBEDTLS_RSA_PRIVATE and might instead
+ * return #MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED.
+ *
+ * \param ctx The initialized RSA public key context to use.
+ * \param f_rng The RNG function to use. If \p mode is #MBEDTLS_RSA_PRIVATE,
+ * this is used for blinding and should be provided; see
+ * mbedtls_rsa_private() for more. Otherwise, it is ignored.
+ * \param p_rng The RNG context to be passed to \p f_rng. This may be
+ * \c NULL if \p f_rng is \c NULL or doesn't need a context.
+ * \param mode The mode of operation. This must be either
+ * #MBEDTLS_RSA_PUBLIC or #MBEDTLS_RSA_PRIVATE (deprecated).
+ * \param md_alg The message-digest algorithm used to hash the original data.
+ * Use #MBEDTLS_MD_NONE for signing raw data.
+ * \param hashlen The length of the message digest.
+ * This is only used if \p md_alg is #MBEDTLS_MD_NONE.
+ * \param hash The buffer holding the message digest or raw data.
+ * If \p md_alg is #MBEDTLS_MD_NONE, this must be a readable
+ * buffer of length \p hashlen Bytes. If \p md_alg is not
+ * #MBEDTLS_MD_NONE, it must be a readable buffer of length
+ * the size of the hash corresponding to \p md_alg.
+ * \param sig The buffer holding the signature. This must be a readable
+ * buffer of length \c ctx->len Bytes. For example, \c 256 Bytes
+ * for an 2048-bit RSA modulus.
+ *
+ * \return \c 0 if the verify operation was successful.
+ * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_rsassa_pss_verify( mbedtls_rsa_context *ctx,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng,
+ int mode,
+ mbedtls_md_type_t md_alg,
+ unsigned int hashlen,
+ const unsigned char *hash,
+ const unsigned char *sig );
+
+/**
+ * \brief This function performs a PKCS#1 v2.1 PSS verification
+ * operation (RSASSA-PSS-VERIFY).
+ *
+ * The hash function for the MGF mask generating function
+ * is that specified in \p mgf1_hash_id.
+ *
+ * \note The \p sig buffer must be as large as the size
+ * of \p ctx->N. For example, 128 Bytes if RSA-1024 is used.
+ *
+ * \note The \p hash_id in the RSA context is ignored.
+ *
+ * \param ctx The initialized RSA public key context to use.
+ * \param f_rng The RNG function to use. If \p mode is #MBEDTLS_RSA_PRIVATE,
+ * this is used for blinding and should be provided; see
+ * mbedtls_rsa_private() for more. Otherwise, it is ignored.
+ * \param p_rng The RNG context to be passed to \p f_rng. This may be
+ * \c NULL if \p f_rng is \c NULL or doesn't need a context.
+ * \param mode The mode of operation. This must be either
+ * #MBEDTLS_RSA_PUBLIC or #MBEDTLS_RSA_PRIVATE.
+ * \param md_alg The message-digest algorithm used to hash the original data.
+ * Use #MBEDTLS_MD_NONE for signing raw data.
+ * \param hashlen The length of the message digest.
+ * This is only used if \p md_alg is #MBEDTLS_MD_NONE.
+ * \param hash The buffer holding the message digest or raw data.
+ * If \p md_alg is #MBEDTLS_MD_NONE, this must be a readable
+ * buffer of length \p hashlen Bytes. If \p md_alg is not
+ * #MBEDTLS_MD_NONE, it must be a readable buffer of length
+ * the size of the hash corresponding to \p md_alg.
+ * \param mgf1_hash_id The message digest used for mask generation.
+ * \param expected_salt_len The length of the salt used in padding. Use
+ * #MBEDTLS_RSA_SALT_LEN_ANY to accept any salt length.
+ * \param sig The buffer holding the signature. This must be a readable
+ * buffer of length \c ctx->len Bytes. For example, \c 256 Bytes
+ * for an 2048-bit RSA modulus.
+ *
+ * \return \c 0 if the verify operation was successful.
+ * \return An \c MBEDTLS_ERR_RSA_XXX error code on failure.
+ */
+int mbedtls_rsa_rsassa_pss_verify_ext( mbedtls_rsa_context *ctx,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng,
+ int mode,
+ mbedtls_md_type_t md_alg,
+ unsigned int hashlen,
+ const unsigned char *hash,
+ mbedtls_md_type_t mgf1_hash_id,
+ int expected_salt_len,
+ const unsigned char *sig );
+
+/**
+ * \brief This function copies the components of an RSA context.
+ *
+ * \param dst The destination context. This must be initialized.
+ * \param src The source context. This must be initialized.
+ *
+ * \return \c 0 on success.
+ * \return #MBEDTLS_ERR_MPI_ALLOC_FAILED on memory allocation failure.
+ */
+int mbedtls_rsa_copy( mbedtls_rsa_context *dst, const mbedtls_rsa_context *src );
+
+/**
+ * \brief This function frees the components of an RSA key.
+ *
+ * \param ctx The RSA context to free. May be \c NULL, in which case
+ * this function is a no-op. If it is not \c NULL, it must
+ * point to an initialized RSA context.
+ */
+void mbedtls_rsa_free( mbedtls_rsa_context *ctx );
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief The RSA checkup routine.
+ *
+ * \return \c 0 on success.
+ * \return \c 1 on failure.
+ */
+int mbedtls_rsa_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* rsa.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/rsa_internal.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/rsa_internal.h
new file mode 100644
index 0000000..53abd3c
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/rsa_internal.h
@@ -0,0 +1,226 @@
+/**
+ * \file rsa_internal.h
+ *
+ * \brief Context-independent RSA helper functions
+ *
+ * This module declares some RSA-related helper functions useful when
+ * implementing the RSA interface. These functions are provided in a separate
+ * compilation unit in order to make it easy for designers of alternative RSA
+ * implementations to use them in their own code, as it is conceived that the
+ * functionality they provide will be necessary for most complete
+ * implementations.
+ *
+ * End-users of Mbed TLS who are not providing their own alternative RSA
+ * implementations should not use these functions directly, and should instead
+ * use only the functions declared in rsa.h.
+ *
+ * The interface provided by this module will be maintained through LTS (Long
+ * Term Support) branches of Mbed TLS, but may otherwise be subject to change,
+ * and must be considered an internal interface of the library.
+ *
+ * There are two classes of helper functions:
+ *
+ * (1) Parameter-generating helpers. These are:
+ * - mbedtls_rsa_deduce_primes
+ * - mbedtls_rsa_deduce_private_exponent
+ * - mbedtls_rsa_deduce_crt
+ * Each of these functions takes a set of core RSA parameters and
+ * generates some other, or CRT related parameters.
+ *
+ * (2) Parameter-checking helpers. These are:
+ * - mbedtls_rsa_validate_params
+ * - mbedtls_rsa_validate_crt
+ * They take a set of core or CRT related RSA parameters and check their
+ * validity.
+ *
+ */
+/*
+ * Copyright (C) 2006-2017, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ *
+ */
+
+#ifndef MBEDTLS_RSA_INTERNAL_H
+#define MBEDTLS_RSA_INTERNAL_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "bignum.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/**
+ * \brief Compute RSA prime moduli P, Q from public modulus N=PQ
+ * and a pair of private and public key.
+ *
+ * \note This is a 'static' helper function not operating on
+ * an RSA context. Alternative implementations need not
+ * overwrite it.
+ *
+ * \param N RSA modulus N = PQ, with P, Q to be found
+ * \param E RSA public exponent
+ * \param D RSA private exponent
+ * \param P Pointer to MPI holding first prime factor of N on success
+ * \param Q Pointer to MPI holding second prime factor of N on success
+ *
+ * \return
+ * - 0 if successful. In this case, P and Q constitute a
+ * factorization of N.
+ * - A non-zero error code otherwise.
+ *
+ * \note It is neither checked that P, Q are prime nor that
+ * D, E are modular inverses wrt. P-1 and Q-1. For that,
+ * use the helper function \c mbedtls_rsa_validate_params.
+ *
+ */
+int mbedtls_rsa_deduce_primes( mbedtls_mpi const *N, mbedtls_mpi const *E,
+ mbedtls_mpi const *D,
+ mbedtls_mpi *P, mbedtls_mpi *Q );
+
+/**
+ * \brief Compute RSA private exponent from
+ * prime moduli and public key.
+ *
+ * \note This is a 'static' helper function not operating on
+ * an RSA context. Alternative implementations need not
+ * overwrite it.
+ *
+ * \param P First prime factor of RSA modulus
+ * \param Q Second prime factor of RSA modulus
+ * \param E RSA public exponent
+ * \param D Pointer to MPI holding the private exponent on success.
+ *
+ * \return
+ * - 0 if successful. In this case, D is set to a simultaneous
+ * modular inverse of E modulo both P-1 and Q-1.
+ * - A non-zero error code otherwise.
+ *
+ * \note This function does not check whether P and Q are primes.
+ *
+ */
+int mbedtls_rsa_deduce_private_exponent( mbedtls_mpi const *P,
+ mbedtls_mpi const *Q,
+ mbedtls_mpi const *E,
+ mbedtls_mpi *D );
+
+
+/**
+ * \brief Generate RSA-CRT parameters
+ *
+ * \note This is a 'static' helper function not operating on
+ * an RSA context. Alternative implementations need not
+ * overwrite it.
+ *
+ * \param P First prime factor of N
+ * \param Q Second prime factor of N
+ * \param D RSA private exponent
+ * \param DP Output variable for D modulo P-1
+ * \param DQ Output variable for D modulo Q-1
+ * \param QP Output variable for the modular inverse of Q modulo P.
+ *
+ * \return 0 on success, non-zero error code otherwise.
+ *
+ * \note This function does not check whether P, Q are
+ * prime and whether D is a valid private exponent.
+ *
+ */
+int mbedtls_rsa_deduce_crt( const mbedtls_mpi *P, const mbedtls_mpi *Q,
+ const mbedtls_mpi *D, mbedtls_mpi *DP,
+ mbedtls_mpi *DQ, mbedtls_mpi *QP );
+
+
+/**
+ * \brief Check validity of core RSA parameters
+ *
+ * \note This is a 'static' helper function not operating on
+ * an RSA context. Alternative implementations need not
+ * overwrite it.
+ *
+ * \param N RSA modulus N = PQ
+ * \param P First prime factor of N
+ * \param Q Second prime factor of N
+ * \param D RSA private exponent
+ * \param E RSA public exponent
+ * \param f_rng PRNG to be used for primality check, or NULL
+ * \param p_rng PRNG context for f_rng, or NULL
+ *
+ * \return
+ * - 0 if the following conditions are satisfied
+ * if all relevant parameters are provided:
+ * - P prime if f_rng != NULL (%)
+ * - Q prime if f_rng != NULL (%)
+ * - 1 < N = P * Q
+ * - 1 < D, E < N
+ * - D and E are modular inverses modulo P-1 and Q-1
+ * (%) This is only done if MBEDTLS_GENPRIME is defined.
+ * - A non-zero error code otherwise.
+ *
+ * \note The function can be used with a restricted set of arguments
+ * to perform specific checks only. E.g., calling it with
+ * (-,P,-,-,-) and a PRNG amounts to a primality check for P.
+ */
+int mbedtls_rsa_validate_params( const mbedtls_mpi *N, const mbedtls_mpi *P,
+ const mbedtls_mpi *Q, const mbedtls_mpi *D,
+ const mbedtls_mpi *E,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+/**
+ * \brief Check validity of RSA CRT parameters
+ *
+ * \note This is a 'static' helper function not operating on
+ * an RSA context. Alternative implementations need not
+ * overwrite it.
+ *
+ * \param P First prime factor of RSA modulus
+ * \param Q Second prime factor of RSA modulus
+ * \param D RSA private exponent
+ * \param DP MPI to check for D modulo P-1
+ * \param DQ MPI to check for D modulo P-1
+ * \param QP MPI to check for the modular inverse of Q modulo P.
+ *
+ * \return
+ * - 0 if the following conditions are satisfied:
+ * - D = DP mod P-1 if P, D, DP != NULL
+ * - Q = DQ mod P-1 if P, D, DQ != NULL
+ * - QP = Q^-1 mod P if P, Q, QP != NULL
+ * - \c MBEDTLS_ERR_RSA_KEY_CHECK_FAILED if check failed,
+ * potentially including \c MBEDTLS_ERR_MPI_XXX if some
+ * MPI calculations failed.
+ * - \c MBEDTLS_ERR_RSA_BAD_INPUT_DATA if insufficient
+ * data was provided to check DP, DQ or QP.
+ *
+ * \note The function can be used with a restricted set of arguments
+ * to perform specific checks only. E.g., calling it with the
+ * parameters (P, -, D, DP, -, -) will check DP = D mod P-1.
+ */
+int mbedtls_rsa_validate_crt( const mbedtls_mpi *P, const mbedtls_mpi *Q,
+ const mbedtls_mpi *D, const mbedtls_mpi *DP,
+ const mbedtls_mpi *DQ, const mbedtls_mpi *QP );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* rsa_internal.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/sha1.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/sha1.h
new file mode 100644
index 0000000..bb6ecf0
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/sha1.h
@@ -0,0 +1,352 @@
+/**
+ * \file sha1.h
+ *
+ * \brief This file contains SHA-1 definitions and functions.
+ *
+ * The Secure Hash Algorithm 1 (SHA-1) cryptographic hash function is defined in
+ * <em>FIPS 180-4: Secure Hash Standard (SHS)</em>.
+ *
+ * \warning SHA-1 is considered a weak message digest and its use constitutes
+ * a security risk. We recommend considering stronger message
+ * digests instead.
+ */
+/*
+ * Copyright (C) 2006-2018, Arm Limited (or its affiliates), All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of Mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_SHA1_H
+#define MBEDTLS_SHA1_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+
+/* MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED is deprecated and should not be used. */
+#define MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED -0x0035 /**< SHA-1 hardware accelerator failed */
+#define MBEDTLS_ERR_SHA1_BAD_INPUT_DATA -0x0073 /**< SHA-1 input data was malformed. */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_SHA1_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief The SHA-1 context structure.
+ *
+ * \warning SHA-1 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ */
+typedef struct mbedtls_sha1_context
+{
+ uint32_t total[2]; /*!< The number of Bytes processed. */
+ uint32_t state[5]; /*!< The intermediate digest state. */
+ unsigned char buffer[64]; /*!< The data block being processed. */
+}
+mbedtls_sha1_context;
+
+#else /* MBEDTLS_SHA1_ALT */
+#include "sha1_alt.h"
+#endif /* MBEDTLS_SHA1_ALT */
+
+/**
+ * \brief This function initializes a SHA-1 context.
+ *
+ * \warning SHA-1 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ * \param ctx The SHA-1 context to initialize.
+ * This must not be \c NULL.
+ *
+ */
+void mbedtls_sha1_init( mbedtls_sha1_context *ctx );
+
+/**
+ * \brief This function clears a SHA-1 context.
+ *
+ * \warning SHA-1 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ * \param ctx The SHA-1 context to clear. This may be \c NULL,
+ * in which case this function does nothing. If it is
+ * not \c NULL, it must point to an initialized
+ * SHA-1 context.
+ *
+ */
+void mbedtls_sha1_free( mbedtls_sha1_context *ctx );
+
+/**
+ * \brief This function clones the state of a SHA-1 context.
+ *
+ * \warning SHA-1 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ * \param dst The SHA-1 context to clone to. This must be initialized.
+ * \param src The SHA-1 context to clone from. This must be initialized.
+ *
+ */
+void mbedtls_sha1_clone( mbedtls_sha1_context *dst,
+ const mbedtls_sha1_context *src );
+
+/**
+ * \brief This function starts a SHA-1 checksum calculation.
+ *
+ * \warning SHA-1 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ * \param ctx The SHA-1 context to initialize. This must be initialized.
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ *
+ */
+int mbedtls_sha1_starts_ret( mbedtls_sha1_context *ctx );
+
+/**
+ * \brief This function feeds an input buffer into an ongoing SHA-1
+ * checksum calculation.
+ *
+ * \warning SHA-1 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ * \param ctx The SHA-1 context. This must be initialized
+ * and have a hash operation started.
+ * \param input The buffer holding the input data.
+ * This must be a readable buffer of length \p ilen Bytes.
+ * \param ilen The length of the input data \p input in Bytes.
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_sha1_update_ret( mbedtls_sha1_context *ctx,
+ const unsigned char *input,
+ size_t ilen );
+
+/**
+ * \brief This function finishes the SHA-1 operation, and writes
+ * the result to the output buffer.
+ *
+ * \warning SHA-1 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ * \param ctx The SHA-1 context to use. This must be initialized and
+ * have a hash operation started.
+ * \param output The SHA-1 checksum result. This must be a writable
+ * buffer of length \c 20 Bytes.
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_sha1_finish_ret( mbedtls_sha1_context *ctx,
+ unsigned char output[20] );
+
+/**
+ * \brief SHA-1 process data block (internal use only).
+ *
+ * \warning SHA-1 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ * \param ctx The SHA-1 context to use. This must be initialized.
+ * \param data The data block being processed. This must be a
+ * readable buffer of length \c 64 Bytes.
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ *
+ */
+int mbedtls_internal_sha1_process( mbedtls_sha1_context *ctx,
+ const unsigned char data[64] );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief This function starts a SHA-1 checksum calculation.
+ *
+ * \warning SHA-1 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ * \deprecated Superseded by mbedtls_sha1_starts_ret() in 2.7.0.
+ *
+ * \param ctx The SHA-1 context to initialize. This must be initialized.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha1_starts( mbedtls_sha1_context *ctx );
+
+/**
+ * \brief This function feeds an input buffer into an ongoing SHA-1
+ * checksum calculation.
+ *
+ * \warning SHA-1 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ * \deprecated Superseded by mbedtls_sha1_update_ret() in 2.7.0.
+ *
+ * \param ctx The SHA-1 context. This must be initialized and
+ * have a hash operation started.
+ * \param input The buffer holding the input data.
+ * This must be a readable buffer of length \p ilen Bytes.
+ * \param ilen The length of the input data \p input in Bytes.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha1_update( mbedtls_sha1_context *ctx,
+ const unsigned char *input,
+ size_t ilen );
+
+/**
+ * \brief This function finishes the SHA-1 operation, and writes
+ * the result to the output buffer.
+ *
+ * \warning SHA-1 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ * \deprecated Superseded by mbedtls_sha1_finish_ret() in 2.7.0.
+ *
+ * \param ctx The SHA-1 context. This must be initialized and
+ * have a hash operation started.
+ * \param output The SHA-1 checksum result.
+ * This must be a writable buffer of length \c 20 Bytes.
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha1_finish( mbedtls_sha1_context *ctx,
+ unsigned char output[20] );
+
+/**
+ * \brief SHA-1 process data block (internal use only).
+ *
+ * \warning SHA-1 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ * \deprecated Superseded by mbedtls_internal_sha1_process() in 2.7.0.
+ *
+ * \param ctx The SHA-1 context. This must be initialized.
+ * \param data The data block being processed.
+ * This must be a readable buffer of length \c 64 bytes.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha1_process( mbedtls_sha1_context *ctx,
+ const unsigned char data[64] );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+/**
+ * \brief This function calculates the SHA-1 checksum of a buffer.
+ *
+ * The function allocates the context, performs the
+ * calculation, and frees the context.
+ *
+ * The SHA-1 result is calculated as
+ * output = SHA-1(input buffer).
+ *
+ * \warning SHA-1 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ * \param input The buffer holding the input data.
+ * This must be a readable buffer of length \p ilen Bytes.
+ * \param ilen The length of the input data \p input in Bytes.
+ * \param output The SHA-1 checksum result.
+ * This must be a writable buffer of length \c 20 Bytes.
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ *
+ */
+int mbedtls_sha1_ret( const unsigned char *input,
+ size_t ilen,
+ unsigned char output[20] );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief This function calculates the SHA-1 checksum of a buffer.
+ *
+ * The function allocates the context, performs the
+ * calculation, and frees the context.
+ *
+ * The SHA-1 result is calculated as
+ * output = SHA-1(input buffer).
+ *
+ * \warning SHA-1 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ * \deprecated Superseded by mbedtls_sha1_ret() in 2.7.0
+ *
+ * \param input The buffer holding the input data.
+ * This must be a readable buffer of length \p ilen Bytes.
+ * \param ilen The length of the input data \p input in Bytes.
+ * \param output The SHA-1 checksum result. This must be a writable
+ * buffer of size \c 20 Bytes.
+ *
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha1( const unsigned char *input,
+ size_t ilen,
+ unsigned char output[20] );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief The SHA-1 checkup routine.
+ *
+ * \warning SHA-1 is considered a weak message digest and its use
+ * constitutes a security risk. We recommend considering
+ * stronger message digests instead.
+ *
+ * \return \c 0 on success.
+ * \return \c 1 on failure.
+ *
+ */
+int mbedtls_sha1_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* mbedtls_sha1.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/sha256.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/sha256.h
new file mode 100644
index 0000000..d647398
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/sha256.h
@@ -0,0 +1,297 @@
+/**
+ * \file sha256.h
+ *
+ * \brief This file contains SHA-224 and SHA-256 definitions and functions.
+ *
+ * The Secure Hash Algorithms 224 and 256 (SHA-224 and SHA-256) cryptographic
+ * hash functions are defined in <em>FIPS 180-4: Secure Hash Standard (SHS)</em>.
+ */
+/*
+ * Copyright (C) 2006-2018, Arm Limited (or its affiliates), All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of Mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_SHA256_H
+#define MBEDTLS_SHA256_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+
+/* MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED is deprecated and should not be used. */
+#define MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED -0x0037 /**< SHA-256 hardware accelerator failed */
+#define MBEDTLS_ERR_SHA256_BAD_INPUT_DATA -0x0074 /**< SHA-256 input data was malformed. */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_SHA256_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief The SHA-256 context structure.
+ *
+ * The structure is used both for SHA-256 and for SHA-224
+ * checksum calculations. The choice between these two is
+ * made in the call to mbedtls_sha256_starts_ret().
+ */
+typedef struct mbedtls_sha256_context
+{
+ uint32_t total[2]; /*!< The number of Bytes processed. */
+ uint32_t state[8]; /*!< The intermediate digest state. */
+ unsigned char buffer[64]; /*!< The data block being processed. */
+ int is224; /*!< Determines which function to use:
+ 0: Use SHA-256, or 1: Use SHA-224. */
+}
+mbedtls_sha256_context;
+
+#else /* MBEDTLS_SHA256_ALT */
+#include "sha256_alt.h"
+#endif /* MBEDTLS_SHA256_ALT */
+
+/**
+ * \brief This function initializes a SHA-256 context.
+ *
+ * \param ctx The SHA-256 context to initialize. This must not be \c NULL.
+ */
+void mbedtls_sha256_init( mbedtls_sha256_context *ctx );
+
+/**
+ * \brief This function clears a SHA-256 context.
+ *
+ * \param ctx The SHA-256 context to clear. This may be \c NULL, in which
+ * case this function returns immediately. If it is not \c NULL,
+ * it must point to an initialized SHA-256 context.
+ */
+void mbedtls_sha256_free( mbedtls_sha256_context *ctx );
+
+/**
+ * \brief This function clones the state of a SHA-256 context.
+ *
+ * \param dst The destination context. This must be initialized.
+ * \param src The context to clone. This must be initialized.
+ */
+void mbedtls_sha256_clone( mbedtls_sha256_context *dst,
+ const mbedtls_sha256_context *src );
+
+/**
+ * \brief This function starts a SHA-224 or SHA-256 checksum
+ * calculation.
+ *
+ * \param ctx The context to use. This must be initialized.
+ * \param is224 This determines which function to use. This must be
+ * either \c 0 for SHA-256, or \c 1 for SHA-224.
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_sha256_starts_ret( mbedtls_sha256_context *ctx, int is224 );
+
+/**
+ * \brief This function feeds an input buffer into an ongoing
+ * SHA-256 checksum calculation.
+ *
+ * \param ctx The SHA-256 context. This must be initialized
+ * and have a hash operation started.
+ * \param input The buffer holding the data. This must be a readable
+ * buffer of length \p ilen Bytes.
+ * \param ilen The length of the input data in Bytes.
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_sha256_update_ret( mbedtls_sha256_context *ctx,
+ const unsigned char *input,
+ size_t ilen );
+
+/**
+ * \brief This function finishes the SHA-256 operation, and writes
+ * the result to the output buffer.
+ *
+ * \param ctx The SHA-256 context. This must be initialized
+ * and have a hash operation started.
+ * \param output The SHA-224 or SHA-256 checksum result.
+ * This must be a writable buffer of length \c 32 Bytes.
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_sha256_finish_ret( mbedtls_sha256_context *ctx,
+ unsigned char output[32] );
+
+/**
+ * \brief This function processes a single data block within
+ * the ongoing SHA-256 computation. This function is for
+ * internal use only.
+ *
+ * \param ctx The SHA-256 context. This must be initialized.
+ * \param data The buffer holding one block of data. This must
+ * be a readable buffer of length \c 64 Bytes.
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_internal_sha256_process( mbedtls_sha256_context *ctx,
+ const unsigned char data[64] );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief This function starts a SHA-224 or SHA-256 checksum
+ * calculation.
+ *
+ * \deprecated Superseded by mbedtls_sha256_starts_ret() in 2.7.0.
+ *
+ * \param ctx The context to use. This must be initialized.
+ * \param is224 Determines which function to use. This must be
+ * either \c 0 for SHA-256, or \c 1 for SHA-224.
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha256_starts( mbedtls_sha256_context *ctx,
+ int is224 );
+
+/**
+ * \brief This function feeds an input buffer into an ongoing
+ * SHA-256 checksum calculation.
+ *
+ * \deprecated Superseded by mbedtls_sha256_update_ret() in 2.7.0.
+ *
+ * \param ctx The SHA-256 context to use. This must be
+ * initialized and have a hash operation started.
+ * \param input The buffer holding the data. This must be a readable
+ * buffer of length \p ilen Bytes.
+ * \param ilen The length of the input data in Bytes.
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha256_update( mbedtls_sha256_context *ctx,
+ const unsigned char *input,
+ size_t ilen );
+
+/**
+ * \brief This function finishes the SHA-256 operation, and writes
+ * the result to the output buffer.
+ *
+ * \deprecated Superseded by mbedtls_sha256_finish_ret() in 2.7.0.
+ *
+ * \param ctx The SHA-256 context. This must be initialized and
+ * have a hash operation started.
+ * \param output The SHA-224 or SHA-256 checksum result. This must be
+ * a writable buffer of length \c 32 Bytes.
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha256_finish( mbedtls_sha256_context *ctx,
+ unsigned char output[32] );
+
+/**
+ * \brief This function processes a single data block within
+ * the ongoing SHA-256 computation. This function is for
+ * internal use only.
+ *
+ * \deprecated Superseded by mbedtls_internal_sha256_process() in 2.7.0.
+ *
+ * \param ctx The SHA-256 context. This must be initialized.
+ * \param data The buffer holding one block of data. This must be
+ * a readable buffer of size \c 64 Bytes.
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha256_process( mbedtls_sha256_context *ctx,
+ const unsigned char data[64] );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+/**
+ * \brief This function calculates the SHA-224 or SHA-256
+ * checksum of a buffer.
+ *
+ * The function allocates the context, performs the
+ * calculation, and frees the context.
+ *
+ * The SHA-256 result is calculated as
+ * output = SHA-256(input buffer).
+ *
+ * \param input The buffer holding the data. This must be a readable
+ * buffer of length \p ilen Bytes.
+ * \param ilen The length of the input data in Bytes.
+ * \param output The SHA-224 or SHA-256 checksum result. This must
+ * be a writable buffer of length \c 32 Bytes.
+ * \param is224 Determines which function to use. This must be
+ * either \c 0 for SHA-256, or \c 1 for SHA-224.
+ */
+int mbedtls_sha256_ret( const unsigned char *input,
+ size_t ilen,
+ unsigned char output[32],
+ int is224 );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+
+/**
+ * \brief This function calculates the SHA-224 or SHA-256 checksum
+ * of a buffer.
+ *
+ * The function allocates the context, performs the
+ * calculation, and frees the context.
+ *
+ * The SHA-256 result is calculated as
+ * output = SHA-256(input buffer).
+ *
+ * \deprecated Superseded by mbedtls_sha256_ret() in 2.7.0.
+ *
+ * \param input The buffer holding the data. This must be a readable
+ * buffer of length \p ilen Bytes.
+ * \param ilen The length of the input data in Bytes.
+ * \param output The SHA-224 or SHA-256 checksum result. This must be
+ * a writable buffer of length \c 32 Bytes.
+ * \param is224 Determines which function to use. This must be either
+ * \c 0 for SHA-256, or \c 1 for SHA-224.
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha256( const unsigned char *input,
+ size_t ilen,
+ unsigned char output[32],
+ int is224 );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief The SHA-224 and SHA-256 checkup routine.
+ *
+ * \return \c 0 on success.
+ * \return \c 1 on failure.
+ */
+int mbedtls_sha256_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* mbedtls_sha256.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/sha256_alt.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/sha256_alt.h
new file mode 100644
index 0000000..f828afd
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/sha256_alt.h
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause OR Arm’s non-OSI source license
+ */
+
+#ifndef MBEDTLS_SHA256_ALT_H
+#define MBEDTLS_SHA256_ALT_H
+
+#include <stddef.h>
+#include <stdint.h>
+
+#if defined (MBEDTLS_CONFIG_FILE)
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#if defined (MBEDTLS_SHA256_ALT)
+
+#define CC_HASH_USER_CTX_SIZE_IN_WORDS 60
+
+#define MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED -0x0037 /**< SHA-256 hardware accelerator failed */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief SHA-256 context structure
+ */
+typedef struct mbedtls_sha256_context {
+ /*! Internal buffer */
+ uint32_t buff[CC_HASH_USER_CTX_SIZE_IN_WORDS]; // defined in cc_hash_defs.h
+} mbedtls_sha256_context;
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* MBEDTLS_SHA256_ALT */
+
+#endif /* MBEDTLS_SHA256_ALT_H */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/sha512.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/sha512.h
new file mode 100644
index 0000000..c06ceed
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/sha512.h
@@ -0,0 +1,300 @@
+/**
+ * \file sha512.h
+ * \brief This file contains SHA-384 and SHA-512 definitions and functions.
+ *
+ * The Secure Hash Algorithms 384 and 512 (SHA-384 and SHA-512) cryptographic
+ * hash functions are defined in <em>FIPS 180-4: Secure Hash Standard (SHS)</em>.
+ */
+/*
+ * Copyright (C) 2006-2018, Arm Limited (or its affiliates), All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of Mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_SHA512_H
+#define MBEDTLS_SHA512_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+
+/* MBEDTLS_ERR_SHA512_HW_ACCEL_FAILED is deprecated and should not be used. */
+#define MBEDTLS_ERR_SHA512_HW_ACCEL_FAILED -0x0039 /**< SHA-512 hardware accelerator failed */
+#define MBEDTLS_ERR_SHA512_BAD_INPUT_DATA -0x0075 /**< SHA-512 input data was malformed. */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_SHA512_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief The SHA-512 context structure.
+ *
+ * The structure is used both for SHA-384 and for SHA-512
+ * checksum calculations. The choice between these two is
+ * made in the call to mbedtls_sha512_starts_ret().
+ */
+typedef struct mbedtls_sha512_context
+{
+ uint64_t total[2]; /*!< The number of Bytes processed. */
+ uint64_t state[8]; /*!< The intermediate digest state. */
+ unsigned char buffer[128]; /*!< The data block being processed. */
+ int is384; /*!< Determines which function to use:
+ 0: Use SHA-512, or 1: Use SHA-384. */
+}
+mbedtls_sha512_context;
+
+#else /* MBEDTLS_SHA512_ALT */
+#include "sha512_alt.h"
+#endif /* MBEDTLS_SHA512_ALT */
+
+/**
+ * \brief This function initializes a SHA-512 context.
+ *
+ * \param ctx The SHA-512 context to initialize. This must
+ * not be \c NULL.
+ */
+void mbedtls_sha512_init( mbedtls_sha512_context *ctx );
+
+/**
+ * \brief This function clears a SHA-512 context.
+ *
+ * \param ctx The SHA-512 context to clear. This may be \c NULL,
+ * in which case this function does nothing. If it
+ * is not \c NULL, it must point to an initialized
+ * SHA-512 context.
+ */
+void mbedtls_sha512_free( mbedtls_sha512_context *ctx );
+
+/**
+ * \brief This function clones the state of a SHA-512 context.
+ *
+ * \param dst The destination context. This must be initialized.
+ * \param src The context to clone. This must be initialized.
+ */
+void mbedtls_sha512_clone( mbedtls_sha512_context *dst,
+ const mbedtls_sha512_context *src );
+
+/**
+ * \brief This function starts a SHA-384 or SHA-512 checksum
+ * calculation.
+ *
+ * \param ctx The SHA-512 context to use. This must be initialized.
+ * \param is384 Determines which function to use. This must be
+ * either \c for SHA-512, or \c 1 for SHA-384.
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_sha512_starts_ret( mbedtls_sha512_context *ctx, int is384 );
+
+/**
+ * \brief This function feeds an input buffer into an ongoing
+ * SHA-512 checksum calculation.
+ *
+ * \param ctx The SHA-512 context. This must be initialized
+ * and have a hash operation started.
+ * \param input The buffer holding the input data. This must
+ * be a readable buffer of length \p ilen Bytes.
+ * \param ilen The length of the input data in Bytes.
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_sha512_update_ret( mbedtls_sha512_context *ctx,
+ const unsigned char *input,
+ size_t ilen );
+
+/**
+ * \brief This function finishes the SHA-512 operation, and writes
+ * the result to the output buffer. This function is for
+ * internal use only.
+ *
+ * \param ctx The SHA-512 context. This must be initialized
+ * and have a hash operation started.
+ * \param output The SHA-384 or SHA-512 checksum result.
+ * This must be a writable buffer of length \c 64 Bytes.
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_sha512_finish_ret( mbedtls_sha512_context *ctx,
+ unsigned char output[64] );
+
+/**
+ * \brief This function processes a single data block within
+ * the ongoing SHA-512 computation.
+ *
+ * \param ctx The SHA-512 context. This must be initialized.
+ * \param data The buffer holding one block of data. This
+ * must be a readable buffer of length \c 128 Bytes.
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_internal_sha512_process( mbedtls_sha512_context *ctx,
+ const unsigned char data[128] );
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+/**
+ * \brief This function starts a SHA-384 or SHA-512 checksum
+ * calculation.
+ *
+ * \deprecated Superseded by mbedtls_sha512_starts_ret() in 2.7.0
+ *
+ * \param ctx The SHA-512 context to use. This must be initialized.
+ * \param is384 Determines which function to use. This must be either
+ * \c 0 for SHA-512 or \c 1 for SHA-384.
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha512_starts( mbedtls_sha512_context *ctx,
+ int is384 );
+
+/**
+ * \brief This function feeds an input buffer into an ongoing
+ * SHA-512 checksum calculation.
+ *
+ * \deprecated Superseded by mbedtls_sha512_update_ret() in 2.7.0.
+ *
+ * \param ctx The SHA-512 context. This must be initialized
+ * and have a hash operation started.
+ * \param input The buffer holding the data. This must be a readable
+ * buffer of length \p ilen Bytes.
+ * \param ilen The length of the input data in Bytes.
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha512_update( mbedtls_sha512_context *ctx,
+ const unsigned char *input,
+ size_t ilen );
+
+/**
+ * \brief This function finishes the SHA-512 operation, and writes
+ * the result to the output buffer.
+ *
+ * \deprecated Superseded by mbedtls_sha512_finish_ret() in 2.7.0.
+ *
+ * \param ctx The SHA-512 context. This must be initialized
+ * and have a hash operation started.
+ * \param output The SHA-384 or SHA-512 checksum result. This must
+ * be a writable buffer of size \c 64 Bytes.
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha512_finish( mbedtls_sha512_context *ctx,
+ unsigned char output[64] );
+
+/**
+ * \brief This function processes a single data block within
+ * the ongoing SHA-512 computation. This function is for
+ * internal use only.
+ *
+ * \deprecated Superseded by mbedtls_internal_sha512_process() in 2.7.0.
+ *
+ * \param ctx The SHA-512 context. This must be initialized.
+ * \param data The buffer holding one block of data. This must be
+ * a readable buffer of length \c 128 Bytes.
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha512_process(
+ mbedtls_sha512_context *ctx,
+ const unsigned char data[128] );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+/**
+ * \brief This function calculates the SHA-512 or SHA-384
+ * checksum of a buffer.
+ *
+ * The function allocates the context, performs the
+ * calculation, and frees the context.
+ *
+ * The SHA-512 result is calculated as
+ * output = SHA-512(input buffer).
+ *
+ * \param input The buffer holding the input data. This must be
+ * a readable buffer of length \p ilen Bytes.
+ * \param ilen The length of the input data in Bytes.
+ * \param output The SHA-384 or SHA-512 checksum result.
+ * This must be a writable buffer of length \c 64 Bytes.
+ * \param is384 Determines which function to use. This must be either
+ * \c 0 for SHA-512, or \c 1 for SHA-384.
+ *
+ * \return \c 0 on success.
+ * \return A negative error code on failure.
+ */
+int mbedtls_sha512_ret( const unsigned char *input,
+ size_t ilen,
+ unsigned char output[64],
+ int is384 );
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+
+/**
+ * \brief This function calculates the SHA-512 or SHA-384
+ * checksum of a buffer.
+ *
+ * The function allocates the context, performs the
+ * calculation, and frees the context.
+ *
+ * The SHA-512 result is calculated as
+ * output = SHA-512(input buffer).
+ *
+ * \deprecated Superseded by mbedtls_sha512_ret() in 2.7.0
+ *
+ * \param input The buffer holding the data. This must be a
+ * readable buffer of length \p ilen Bytes.
+ * \param ilen The length of the input data in Bytes.
+ * \param output The SHA-384 or SHA-512 checksum result. This must
+ * be a writable buffer of length \c 64 Bytes.
+ * \param is384 Determines which function to use. This must be either
+ * \c 0 for SHA-512, or \c 1 for SHA-384.
+ */
+MBEDTLS_DEPRECATED void mbedtls_sha512( const unsigned char *input,
+ size_t ilen,
+ unsigned char output[64],
+ int is384 );
+
+#undef MBEDTLS_DEPRECATED
+#endif /* !MBEDTLS_DEPRECATED_REMOVED */
+
+#if defined(MBEDTLS_SELF_TEST)
+
+ /**
+ * \brief The SHA-384 or SHA-512 checkup routine.
+ *
+ * \return \c 0 on success.
+ * \return \c 1 on failure.
+ */
+int mbedtls_sha512_self_test( int verbose );
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* mbedtls_sha512.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ssl.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ssl.h
new file mode 100644
index 0000000..d31f6cd
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ssl.h
@@ -0,0 +1,3262 @@
+/**
+ * \file ssl.h
+ *
+ * \brief SSL/TLS functions.
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_SSL_H
+#define MBEDTLS_SSL_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "bignum.h"
+#include "ecp.h"
+
+#include "ssl_ciphersuites.h"
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+#include "x509_crt.h"
+#include "x509_crl.h"
+#endif
+
+#if defined(MBEDTLS_DHM_C)
+#include "dhm.h"
+#endif
+
+#if defined(MBEDTLS_ECDH_C)
+#include "ecdh.h"
+#endif
+
+#if defined(MBEDTLS_ZLIB_SUPPORT)
+
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#warning "Record compression support via MBEDTLS_ZLIB_SUPPORT is deprecated and will be removed in the next major revision of the library"
+#endif
+
+#if defined(MBEDTLS_DEPRECATED_REMOVED)
+#error "Record compression support via MBEDTLS_ZLIB_SUPPORT is deprecated and cannot be used if MBEDTLS_DEPRECATED_REMOVED is set"
+#endif
+
+#include "zlib.h"
+#endif
+
+#if defined(MBEDTLS_HAVE_TIME)
+#include "platform_time.h"
+#endif
+
+/*
+ * SSL Error codes
+ */
+#define MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE -0x7080 /**< The requested feature is not available. */
+#define MBEDTLS_ERR_SSL_BAD_INPUT_DATA -0x7100 /**< Bad input parameters to function. */
+#define MBEDTLS_ERR_SSL_INVALID_MAC -0x7180 /**< Verification of the message MAC failed. */
+#define MBEDTLS_ERR_SSL_INVALID_RECORD -0x7200 /**< An invalid SSL record was received. */
+#define MBEDTLS_ERR_SSL_CONN_EOF -0x7280 /**< The connection indicated an EOF. */
+#define MBEDTLS_ERR_SSL_UNKNOWN_CIPHER -0x7300 /**< An unknown cipher was received. */
+#define MBEDTLS_ERR_SSL_NO_CIPHER_CHOSEN -0x7380 /**< The server has no ciphersuites in common with the client. */
+#define MBEDTLS_ERR_SSL_NO_RNG -0x7400 /**< No RNG was provided to the SSL module. */
+#define MBEDTLS_ERR_SSL_NO_CLIENT_CERTIFICATE -0x7480 /**< No client certification received from the client, but required by the authentication mode. */
+#define MBEDTLS_ERR_SSL_CERTIFICATE_TOO_LARGE -0x7500 /**< Our own certificate(s) is/are too large to send in an SSL message. */
+#define MBEDTLS_ERR_SSL_CERTIFICATE_REQUIRED -0x7580 /**< The own certificate is not set, but needed by the server. */
+#define MBEDTLS_ERR_SSL_PRIVATE_KEY_REQUIRED -0x7600 /**< The own private key or pre-shared key is not set, but needed. */
+#define MBEDTLS_ERR_SSL_CA_CHAIN_REQUIRED -0x7680 /**< No CA Chain is set, but required to operate. */
+#define MBEDTLS_ERR_SSL_UNEXPECTED_MESSAGE -0x7700 /**< An unexpected message was received from our peer. */
+#define MBEDTLS_ERR_SSL_FATAL_ALERT_MESSAGE -0x7780 /**< A fatal alert message was received from our peer. */
+#define MBEDTLS_ERR_SSL_PEER_VERIFY_FAILED -0x7800 /**< Verification of our peer failed. */
+#define MBEDTLS_ERR_SSL_PEER_CLOSE_NOTIFY -0x7880 /**< The peer notified us that the connection is going to be closed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_HELLO -0x7900 /**< Processing of the ClientHello handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO -0x7980 /**< Processing of the ServerHello handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE -0x7A00 /**< Processing of the Certificate handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_REQUEST -0x7A80 /**< Processing of the CertificateRequest handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_KEY_EXCHANGE -0x7B00 /**< Processing of the ServerKeyExchange handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_SERVER_HELLO_DONE -0x7B80 /**< Processing of the ServerHelloDone handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE -0x7C00 /**< Processing of the ClientKeyExchange handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_RP -0x7C80 /**< Processing of the ClientKeyExchange handshake message failed in DHM / ECDH Read Public. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CLIENT_KEY_EXCHANGE_CS -0x7D00 /**< Processing of the ClientKeyExchange handshake message failed in DHM / ECDH Calculate Secret. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CERTIFICATE_VERIFY -0x7D80 /**< Processing of the CertificateVerify handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_CHANGE_CIPHER_SPEC -0x7E00 /**< Processing of the ChangeCipherSpec handshake message failed. */
+#define MBEDTLS_ERR_SSL_BAD_HS_FINISHED -0x7E80 /**< Processing of the Finished handshake message failed. */
+#define MBEDTLS_ERR_SSL_ALLOC_FAILED -0x7F00 /**< Memory allocation failed */
+#define MBEDTLS_ERR_SSL_HW_ACCEL_FAILED -0x7F80 /**< Hardware acceleration function returned with error */
+#define MBEDTLS_ERR_SSL_HW_ACCEL_FALLTHROUGH -0x6F80 /**< Hardware acceleration function skipped / left alone data */
+#define MBEDTLS_ERR_SSL_COMPRESSION_FAILED -0x6F00 /**< Processing of the compression / decompression failed */
+#define MBEDTLS_ERR_SSL_BAD_HS_PROTOCOL_VERSION -0x6E80 /**< Handshake protocol not within min/max boundaries */
+#define MBEDTLS_ERR_SSL_BAD_HS_NEW_SESSION_TICKET -0x6E00 /**< Processing of the NewSessionTicket handshake message failed. */
+#define MBEDTLS_ERR_SSL_SESSION_TICKET_EXPIRED -0x6D80 /**< Session ticket has expired. */
+#define MBEDTLS_ERR_SSL_PK_TYPE_MISMATCH -0x6D00 /**< Public key type mismatch (eg, asked for RSA key exchange and presented EC key) */
+#define MBEDTLS_ERR_SSL_UNKNOWN_IDENTITY -0x6C80 /**< Unknown identity received (eg, PSK identity) */
+#define MBEDTLS_ERR_SSL_INTERNAL_ERROR -0x6C00 /**< Internal error (eg, unexpected failure in lower-level module) */
+#define MBEDTLS_ERR_SSL_COUNTER_WRAPPING -0x6B80 /**< A counter would wrap (eg, too many messages exchanged). */
+#define MBEDTLS_ERR_SSL_WAITING_SERVER_HELLO_RENEGO -0x6B00 /**< Unexpected message at ServerHello in renegotiation. */
+#define MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED -0x6A80 /**< DTLS client must retry for hello verification */
+#define MBEDTLS_ERR_SSL_BUFFER_TOO_SMALL -0x6A00 /**< A buffer is too small to receive or write a message */
+#define MBEDTLS_ERR_SSL_NO_USABLE_CIPHERSUITE -0x6980 /**< None of the common ciphersuites is usable (eg, no suitable certificate, see debug messages). */
+#define MBEDTLS_ERR_SSL_WANT_READ -0x6900 /**< No data of requested type currently available on underlying transport. */
+#define MBEDTLS_ERR_SSL_WANT_WRITE -0x6880 /**< Connection requires a write call. */
+#define MBEDTLS_ERR_SSL_TIMEOUT -0x6800 /**< The operation timed out. */
+#define MBEDTLS_ERR_SSL_CLIENT_RECONNECT -0x6780 /**< The client initiated a reconnect from the same port. */
+#define MBEDTLS_ERR_SSL_UNEXPECTED_RECORD -0x6700 /**< Record header looks valid but is not expected. */
+#define MBEDTLS_ERR_SSL_NON_FATAL -0x6680 /**< The alert message received indicates a non-fatal error. */
+#define MBEDTLS_ERR_SSL_INVALID_VERIFY_HASH -0x6600 /**< Couldn't set the hash for verifying CertificateVerify */
+#define MBEDTLS_ERR_SSL_CONTINUE_PROCESSING -0x6580 /**< Internal-only message signaling that further message-processing should be done */
+#define MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS -0x6500 /**< The asynchronous operation is not completed yet. */
+#define MBEDTLS_ERR_SSL_EARLY_MESSAGE -0x6480 /**< Internal-only message signaling that a message arrived early. */
+#define MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS -0x7000 /**< A cryptographic operation is in progress. Try again later. */
+
+/*
+ * Various constants
+ */
+#define MBEDTLS_SSL_MAJOR_VERSION_3 3
+#define MBEDTLS_SSL_MINOR_VERSION_0 0 /*!< SSL v3.0 */
+#define MBEDTLS_SSL_MINOR_VERSION_1 1 /*!< TLS v1.0 */
+#define MBEDTLS_SSL_MINOR_VERSION_2 2 /*!< TLS v1.1 */
+#define MBEDTLS_SSL_MINOR_VERSION_3 3 /*!< TLS v1.2 */
+
+#define MBEDTLS_SSL_TRANSPORT_STREAM 0 /*!< TLS */
+#define MBEDTLS_SSL_TRANSPORT_DATAGRAM 1 /*!< DTLS */
+
+#define MBEDTLS_SSL_MAX_HOST_NAME_LEN 255 /*!< Maximum host name defined in RFC 1035 */
+
+/* RFC 6066 section 4, see also mfl_code_to_length in ssl_tls.c
+ * NONE must be zero so that memset()ing structure to zero works */
+#define MBEDTLS_SSL_MAX_FRAG_LEN_NONE 0 /*!< don't use this extension */
+#define MBEDTLS_SSL_MAX_FRAG_LEN_512 1 /*!< MaxFragmentLength 2^9 */
+#define MBEDTLS_SSL_MAX_FRAG_LEN_1024 2 /*!< MaxFragmentLength 2^10 */
+#define MBEDTLS_SSL_MAX_FRAG_LEN_2048 3 /*!< MaxFragmentLength 2^11 */
+#define MBEDTLS_SSL_MAX_FRAG_LEN_4096 4 /*!< MaxFragmentLength 2^12 */
+#define MBEDTLS_SSL_MAX_FRAG_LEN_INVALID 5 /*!< first invalid value */
+
+#define MBEDTLS_SSL_IS_CLIENT 0
+#define MBEDTLS_SSL_IS_SERVER 1
+
+#define MBEDTLS_SSL_IS_NOT_FALLBACK 0
+#define MBEDTLS_SSL_IS_FALLBACK 1
+
+#define MBEDTLS_SSL_EXTENDED_MS_DISABLED 0
+#define MBEDTLS_SSL_EXTENDED_MS_ENABLED 1
+
+#define MBEDTLS_SSL_ETM_DISABLED 0
+#define MBEDTLS_SSL_ETM_ENABLED 1
+
+#define MBEDTLS_SSL_COMPRESS_NULL 0
+#define MBEDTLS_SSL_COMPRESS_DEFLATE 1
+
+#define MBEDTLS_SSL_VERIFY_NONE 0
+#define MBEDTLS_SSL_VERIFY_OPTIONAL 1
+#define MBEDTLS_SSL_VERIFY_REQUIRED 2
+#define MBEDTLS_SSL_VERIFY_UNSET 3 /* Used only for sni_authmode */
+
+#define MBEDTLS_SSL_LEGACY_RENEGOTIATION 0
+#define MBEDTLS_SSL_SECURE_RENEGOTIATION 1
+
+#define MBEDTLS_SSL_RENEGOTIATION_DISABLED 0
+#define MBEDTLS_SSL_RENEGOTIATION_ENABLED 1
+
+#define MBEDTLS_SSL_ANTI_REPLAY_DISABLED 0
+#define MBEDTLS_SSL_ANTI_REPLAY_ENABLED 1
+
+#define MBEDTLS_SSL_RENEGOTIATION_NOT_ENFORCED -1
+#define MBEDTLS_SSL_RENEGO_MAX_RECORDS_DEFAULT 16
+
+#define MBEDTLS_SSL_LEGACY_NO_RENEGOTIATION 0
+#define MBEDTLS_SSL_LEGACY_ALLOW_RENEGOTIATION 1
+#define MBEDTLS_SSL_LEGACY_BREAK_HANDSHAKE 2
+
+#define MBEDTLS_SSL_TRUNC_HMAC_DISABLED 0
+#define MBEDTLS_SSL_TRUNC_HMAC_ENABLED 1
+#define MBEDTLS_SSL_TRUNCATED_HMAC_LEN 10 /* 80 bits, rfc 6066 section 7 */
+
+#define MBEDTLS_SSL_SESSION_TICKETS_DISABLED 0
+#define MBEDTLS_SSL_SESSION_TICKETS_ENABLED 1
+
+#define MBEDTLS_SSL_CBC_RECORD_SPLITTING_DISABLED 0
+#define MBEDTLS_SSL_CBC_RECORD_SPLITTING_ENABLED 1
+
+#define MBEDTLS_SSL_ARC4_ENABLED 0
+#define MBEDTLS_SSL_ARC4_DISABLED 1
+
+#define MBEDTLS_SSL_PRESET_DEFAULT 0
+#define MBEDTLS_SSL_PRESET_SUITEB 2
+
+#define MBEDTLS_SSL_CERT_REQ_CA_LIST_ENABLED 1
+#define MBEDTLS_SSL_CERT_REQ_CA_LIST_DISABLED 0
+
+/*
+ * Default range for DTLS retransmission timer value, in milliseconds.
+ * RFC 6347 4.2.4.1 says from 1 second to 60 seconds.
+ */
+#define MBEDTLS_SSL_DTLS_TIMEOUT_DFL_MIN 1000
+#define MBEDTLS_SSL_DTLS_TIMEOUT_DFL_MAX 60000
+
+/**
+ * \name SECTION: Module settings
+ *
+ * The configuration options you can set for this module are in this section.
+ * Either change them in config.h or define them on the compiler command line.
+ * \{
+ */
+
+#if !defined(MBEDTLS_SSL_DEFAULT_TICKET_LIFETIME)
+#define MBEDTLS_SSL_DEFAULT_TICKET_LIFETIME 86400 /**< Lifetime of session tickets (if enabled) */
+#endif
+
+/*
+ * Maximum fragment length in bytes,
+ * determines the size of each of the two internal I/O buffers.
+ *
+ * Note: the RFC defines the default size of SSL / TLS messages. If you
+ * change the value here, other clients / servers may not be able to
+ * communicate with you anymore. Only change this value if you control
+ * both sides of the connection and have it reduced at both sides, or
+ * if you're using the Max Fragment Length extension and you know all your
+ * peers are using it too!
+ */
+#if !defined(MBEDTLS_SSL_MAX_CONTENT_LEN)
+#define MBEDTLS_SSL_MAX_CONTENT_LEN 16384 /**< Size of the input / output buffer */
+#endif
+
+#if !defined(MBEDTLS_SSL_IN_CONTENT_LEN)
+#define MBEDTLS_SSL_IN_CONTENT_LEN MBEDTLS_SSL_MAX_CONTENT_LEN
+#endif
+
+#if !defined(MBEDTLS_SSL_OUT_CONTENT_LEN)
+#define MBEDTLS_SSL_OUT_CONTENT_LEN MBEDTLS_SSL_MAX_CONTENT_LEN
+#endif
+
+/*
+ * Maximum number of heap-allocated bytes for the purpose of
+ * DTLS handshake message reassembly and future message buffering.
+ */
+#if !defined(MBEDTLS_SSL_DTLS_MAX_BUFFERING)
+#define MBEDTLS_SSL_DTLS_MAX_BUFFERING 32768
+#endif
+
+/* \} name SECTION: Module settings */
+
+/*
+ * Length of the verify data for secure renegotiation
+ */
+#if defined(MBEDTLS_SSL_PROTO_SSL3)
+#define MBEDTLS_SSL_VERIFY_DATA_MAX_LEN 36
+#else
+#define MBEDTLS_SSL_VERIFY_DATA_MAX_LEN 12
+#endif
+
+/*
+ * Signaling ciphersuite values (SCSV)
+ */
+#define MBEDTLS_SSL_EMPTY_RENEGOTIATION_INFO 0xFF /**< renegotiation info ext */
+#define MBEDTLS_SSL_FALLBACK_SCSV_VALUE 0x5600 /**< RFC 7507 section 2 */
+
+/*
+ * Supported Signature and Hash algorithms (For TLS 1.2)
+ * RFC 5246 section 7.4.1.4.1
+ */
+#define MBEDTLS_SSL_HASH_NONE 0
+#define MBEDTLS_SSL_HASH_MD5 1
+#define MBEDTLS_SSL_HASH_SHA1 2
+#define MBEDTLS_SSL_HASH_SHA224 3
+#define MBEDTLS_SSL_HASH_SHA256 4
+#define MBEDTLS_SSL_HASH_SHA384 5
+#define MBEDTLS_SSL_HASH_SHA512 6
+
+#define MBEDTLS_SSL_SIG_ANON 0
+#define MBEDTLS_SSL_SIG_RSA 1
+#define MBEDTLS_SSL_SIG_ECDSA 3
+
+/*
+ * Client Certificate Types
+ * RFC 5246 section 7.4.4 plus RFC 4492 section 5.5
+ */
+#define MBEDTLS_SSL_CERT_TYPE_RSA_SIGN 1
+#define MBEDTLS_SSL_CERT_TYPE_ECDSA_SIGN 64
+
+/*
+ * Message, alert and handshake types
+ */
+#define MBEDTLS_SSL_MSG_CHANGE_CIPHER_SPEC 20
+#define MBEDTLS_SSL_MSG_ALERT 21
+#define MBEDTLS_SSL_MSG_HANDSHAKE 22
+#define MBEDTLS_SSL_MSG_APPLICATION_DATA 23
+
+#define MBEDTLS_SSL_ALERT_LEVEL_WARNING 1
+#define MBEDTLS_SSL_ALERT_LEVEL_FATAL 2
+
+#define MBEDTLS_SSL_ALERT_MSG_CLOSE_NOTIFY 0 /* 0x00 */
+#define MBEDTLS_SSL_ALERT_MSG_UNEXPECTED_MESSAGE 10 /* 0x0A */
+#define MBEDTLS_SSL_ALERT_MSG_BAD_RECORD_MAC 20 /* 0x14 */
+#define MBEDTLS_SSL_ALERT_MSG_DECRYPTION_FAILED 21 /* 0x15 */
+#define MBEDTLS_SSL_ALERT_MSG_RECORD_OVERFLOW 22 /* 0x16 */
+#define MBEDTLS_SSL_ALERT_MSG_DECOMPRESSION_FAILURE 30 /* 0x1E */
+#define MBEDTLS_SSL_ALERT_MSG_HANDSHAKE_FAILURE 40 /* 0x28 */
+#define MBEDTLS_SSL_ALERT_MSG_NO_CERT 41 /* 0x29 */
+#define MBEDTLS_SSL_ALERT_MSG_BAD_CERT 42 /* 0x2A */
+#define MBEDTLS_SSL_ALERT_MSG_UNSUPPORTED_CERT 43 /* 0x2B */
+#define MBEDTLS_SSL_ALERT_MSG_CERT_REVOKED 44 /* 0x2C */
+#define MBEDTLS_SSL_ALERT_MSG_CERT_EXPIRED 45 /* 0x2D */
+#define MBEDTLS_SSL_ALERT_MSG_CERT_UNKNOWN 46 /* 0x2E */
+#define MBEDTLS_SSL_ALERT_MSG_ILLEGAL_PARAMETER 47 /* 0x2F */
+#define MBEDTLS_SSL_ALERT_MSG_UNKNOWN_CA 48 /* 0x30 */
+#define MBEDTLS_SSL_ALERT_MSG_ACCESS_DENIED 49 /* 0x31 */
+#define MBEDTLS_SSL_ALERT_MSG_DECODE_ERROR 50 /* 0x32 */
+#define MBEDTLS_SSL_ALERT_MSG_DECRYPT_ERROR 51 /* 0x33 */
+#define MBEDTLS_SSL_ALERT_MSG_EXPORT_RESTRICTION 60 /* 0x3C */
+#define MBEDTLS_SSL_ALERT_MSG_PROTOCOL_VERSION 70 /* 0x46 */
+#define MBEDTLS_SSL_ALERT_MSG_INSUFFICIENT_SECURITY 71 /* 0x47 */
+#define MBEDTLS_SSL_ALERT_MSG_INTERNAL_ERROR 80 /* 0x50 */
+#define MBEDTLS_SSL_ALERT_MSG_INAPROPRIATE_FALLBACK 86 /* 0x56 */
+#define MBEDTLS_SSL_ALERT_MSG_USER_CANCELED 90 /* 0x5A */
+#define MBEDTLS_SSL_ALERT_MSG_NO_RENEGOTIATION 100 /* 0x64 */
+#define MBEDTLS_SSL_ALERT_MSG_UNSUPPORTED_EXT 110 /* 0x6E */
+#define MBEDTLS_SSL_ALERT_MSG_UNRECOGNIZED_NAME 112 /* 0x70 */
+#define MBEDTLS_SSL_ALERT_MSG_UNKNOWN_PSK_IDENTITY 115 /* 0x73 */
+#define MBEDTLS_SSL_ALERT_MSG_NO_APPLICATION_PROTOCOL 120 /* 0x78 */
+
+#define MBEDTLS_SSL_HS_HELLO_REQUEST 0
+#define MBEDTLS_SSL_HS_CLIENT_HELLO 1
+#define MBEDTLS_SSL_HS_SERVER_HELLO 2
+#define MBEDTLS_SSL_HS_HELLO_VERIFY_REQUEST 3
+#define MBEDTLS_SSL_HS_NEW_SESSION_TICKET 4
+#define MBEDTLS_SSL_HS_CERTIFICATE 11
+#define MBEDTLS_SSL_HS_SERVER_KEY_EXCHANGE 12
+#define MBEDTLS_SSL_HS_CERTIFICATE_REQUEST 13
+#define MBEDTLS_SSL_HS_SERVER_HELLO_DONE 14
+#define MBEDTLS_SSL_HS_CERTIFICATE_VERIFY 15
+#define MBEDTLS_SSL_HS_CLIENT_KEY_EXCHANGE 16
+#define MBEDTLS_SSL_HS_FINISHED 20
+
+/*
+ * TLS extensions
+ */
+#define MBEDTLS_TLS_EXT_SERVERNAME 0
+#define MBEDTLS_TLS_EXT_SERVERNAME_HOSTNAME 0
+
+#define MBEDTLS_TLS_EXT_MAX_FRAGMENT_LENGTH 1
+
+#define MBEDTLS_TLS_EXT_TRUNCATED_HMAC 4
+
+#define MBEDTLS_TLS_EXT_SUPPORTED_ELLIPTIC_CURVES 10
+#define MBEDTLS_TLS_EXT_SUPPORTED_POINT_FORMATS 11
+
+#define MBEDTLS_TLS_EXT_SIG_ALG 13
+
+#define MBEDTLS_TLS_EXT_ALPN 16
+
+#define MBEDTLS_TLS_EXT_ENCRYPT_THEN_MAC 22 /* 0x16 */
+#define MBEDTLS_TLS_EXT_EXTENDED_MASTER_SECRET 0x0017 /* 23 */
+
+#define MBEDTLS_TLS_EXT_SESSION_TICKET 35
+
+#define MBEDTLS_TLS_EXT_ECJPAKE_KKPP 256 /* experimental */
+
+#define MBEDTLS_TLS_EXT_RENEGOTIATION_INFO 0xFF01
+
+/*
+ * Size defines
+ */
+#if !defined(MBEDTLS_PSK_MAX_LEN)
+#define MBEDTLS_PSK_MAX_LEN 32 /* 256 bits */
+#endif
+
+/* Dummy type used only for its size */
+union mbedtls_ssl_premaster_secret
+{
+#if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED)
+ unsigned char _pms_rsa[48]; /* RFC 5246 8.1.1 */
+#endif
+#if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED)
+ unsigned char _pms_dhm[MBEDTLS_MPI_MAX_SIZE]; /* RFC 5246 8.1.2 */
+#endif
+#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED)
+ unsigned char _pms_ecdh[MBEDTLS_ECP_MAX_BYTES]; /* RFC 4492 5.10 */
+#endif
+#if defined(MBEDTLS_KEY_EXCHANGE_PSK_ENABLED)
+ unsigned char _pms_psk[4 + 2 * MBEDTLS_PSK_MAX_LEN]; /* RFC 4279 2 */
+#endif
+#if defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED)
+ unsigned char _pms_dhe_psk[4 + MBEDTLS_MPI_MAX_SIZE
+ + MBEDTLS_PSK_MAX_LEN]; /* RFC 4279 3 */
+#endif
+#if defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED)
+ unsigned char _pms_rsa_psk[52 + MBEDTLS_PSK_MAX_LEN]; /* RFC 4279 4 */
+#endif
+#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED)
+ unsigned char _pms_ecdhe_psk[4 + MBEDTLS_ECP_MAX_BYTES
+ + MBEDTLS_PSK_MAX_LEN]; /* RFC 5489 2 */
+#endif
+#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED)
+ unsigned char _pms_ecjpake[32]; /* Thread spec: SHA-256 output */
+#endif
+};
+
+#define MBEDTLS_PREMASTER_SIZE sizeof( union mbedtls_ssl_premaster_secret )
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * SSL state machine
+ */
+typedef enum
+{
+ MBEDTLS_SSL_HELLO_REQUEST,
+ MBEDTLS_SSL_CLIENT_HELLO,
+ MBEDTLS_SSL_SERVER_HELLO,
+ MBEDTLS_SSL_SERVER_CERTIFICATE,
+ MBEDTLS_SSL_SERVER_KEY_EXCHANGE,
+ MBEDTLS_SSL_CERTIFICATE_REQUEST,
+ MBEDTLS_SSL_SERVER_HELLO_DONE,
+ MBEDTLS_SSL_CLIENT_CERTIFICATE,
+ MBEDTLS_SSL_CLIENT_KEY_EXCHANGE,
+ MBEDTLS_SSL_CERTIFICATE_VERIFY,
+ MBEDTLS_SSL_CLIENT_CHANGE_CIPHER_SPEC,
+ MBEDTLS_SSL_CLIENT_FINISHED,
+ MBEDTLS_SSL_SERVER_CHANGE_CIPHER_SPEC,
+ MBEDTLS_SSL_SERVER_FINISHED,
+ MBEDTLS_SSL_FLUSH_BUFFERS,
+ MBEDTLS_SSL_HANDSHAKE_WRAPUP,
+ MBEDTLS_SSL_HANDSHAKE_OVER,
+ MBEDTLS_SSL_SERVER_NEW_SESSION_TICKET,
+ MBEDTLS_SSL_SERVER_HELLO_VERIFY_REQUEST_SENT,
+}
+mbedtls_ssl_states;
+
+/**
+ * \brief Callback type: send data on the network.
+ *
+ * \note That callback may be either blocking or non-blocking.
+ *
+ * \param ctx Context for the send callback (typically a file descriptor)
+ * \param buf Buffer holding the data to send
+ * \param len Length of the data to send
+ *
+ * \return The callback must return the number of bytes sent if any,
+ * or a non-zero error code.
+ * If performing non-blocking I/O, \c MBEDTLS_ERR_SSL_WANT_WRITE
+ * must be returned when the operation would block.
+ *
+ * \note The callback is allowed to send fewer bytes than requested.
+ * It must always return the number of bytes actually sent.
+ */
+typedef int mbedtls_ssl_send_t( void *ctx,
+ const unsigned char *buf,
+ size_t len );
+
+/**
+ * \brief Callback type: receive data from the network.
+ *
+ * \note That callback may be either blocking or non-blocking.
+ *
+ * \param ctx Context for the receive callback (typically a file
+ * descriptor)
+ * \param buf Buffer to write the received data to
+ * \param len Length of the receive buffer
+ *
+ * \return The callback must return the number of bytes received,
+ * or a non-zero error code.
+ * If performing non-blocking I/O, \c MBEDTLS_ERR_SSL_WANT_READ
+ * must be returned when the operation would block.
+ *
+ * \note The callback may receive fewer bytes than the length of the
+ * buffer. It must always return the number of bytes actually
+ * received and written to the buffer.
+ */
+typedef int mbedtls_ssl_recv_t( void *ctx,
+ unsigned char *buf,
+ size_t len );
+
+/**
+ * \brief Callback type: receive data from the network, with timeout
+ *
+ * \note That callback must block until data is received, or the
+ * timeout delay expires, or the operation is interrupted by a
+ * signal.
+ *
+ * \param ctx Context for the receive callback (typically a file descriptor)
+ * \param buf Buffer to write the received data to
+ * \param len Length of the receive buffer
+ * \param timeout Maximum nomber of millisecondes to wait for data
+ * 0 means no timeout (potentially waiting forever)
+ *
+ * \return The callback must return the number of bytes received,
+ * or a non-zero error code:
+ * \c MBEDTLS_ERR_SSL_TIMEOUT if the operation timed out,
+ * \c MBEDTLS_ERR_SSL_WANT_READ if interrupted by a signal.
+ *
+ * \note The callback may receive fewer bytes than the length of the
+ * buffer. It must always return the number of bytes actually
+ * received and written to the buffer.
+ */
+typedef int mbedtls_ssl_recv_timeout_t( void *ctx,
+ unsigned char *buf,
+ size_t len,
+ uint32_t timeout );
+/**
+ * \brief Callback type: set a pair of timers/delays to watch
+ *
+ * \param ctx Context pointer
+ * \param int_ms Intermediate delay in milliseconds
+ * \param fin_ms Final delay in milliseconds
+ * 0 cancels the current timer.
+ *
+ * \note This callback must at least store the necessary information
+ * for the associated \c mbedtls_ssl_get_timer_t callback to
+ * return correct information.
+ *
+ * \note If using a event-driven style of programming, an event must
+ * be generated when the final delay is passed. The event must
+ * cause a call to \c mbedtls_ssl_handshake() with the proper
+ * SSL context to be scheduled. Care must be taken to ensure
+ * that at most one such call happens at a time.
+ *
+ * \note Only one timer at a time must be running. Calling this
+ * function while a timer is running must cancel it. Cancelled
+ * timers must not generate any event.
+ */
+typedef void mbedtls_ssl_set_timer_t( void * ctx,
+ uint32_t int_ms,
+ uint32_t fin_ms );
+
+/**
+ * \brief Callback type: get status of timers/delays
+ *
+ * \param ctx Context pointer
+ *
+ * \return This callback must return:
+ * -1 if cancelled (fin_ms == 0),
+ * 0 if none of the delays have passed,
+ * 1 if only the intermediate delay has passed,
+ * 2 if the final delay has passed.
+ */
+typedef int mbedtls_ssl_get_timer_t( void * ctx );
+
+/* Defined below */
+typedef struct mbedtls_ssl_session mbedtls_ssl_session;
+typedef struct mbedtls_ssl_context mbedtls_ssl_context;
+typedef struct mbedtls_ssl_config mbedtls_ssl_config;
+
+/* Defined in ssl_internal.h */
+typedef struct mbedtls_ssl_transform mbedtls_ssl_transform;
+typedef struct mbedtls_ssl_handshake_params mbedtls_ssl_handshake_params;
+typedef struct mbedtls_ssl_sig_hash_set_t mbedtls_ssl_sig_hash_set_t;
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+typedef struct mbedtls_ssl_key_cert mbedtls_ssl_key_cert;
+#endif
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+typedef struct mbedtls_ssl_flight_item mbedtls_ssl_flight_item;
+#endif
+
+#if defined(MBEDTLS_SSL_ASYNC_PRIVATE)
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+/**
+ * \brief Callback type: start external signature operation.
+ *
+ * This callback is called during an SSL handshake to start
+ * a signature decryption operation using an
+ * external processor. The parameter \p cert contains
+ * the public key; it is up to the callback function to
+ * determine how to access the associated private key.
+ *
+ * This function typically sends or enqueues a request, and
+ * does not wait for the operation to complete. This allows
+ * the handshake step to be non-blocking.
+ *
+ * The parameters \p ssl and \p cert are guaranteed to remain
+ * valid throughout the handshake. On the other hand, this
+ * function must save the contents of \p hash if the value
+ * is needed for later processing, because the \p hash buffer
+ * is no longer valid after this function returns.
+ *
+ * This function may call mbedtls_ssl_set_async_operation_data()
+ * to store an operation context for later retrieval
+ * by the resume or cancel callback.
+ *
+ * \note For RSA signatures, this function must produce output
+ * that is consistent with PKCS#1 v1.5 in the same way as
+ * mbedtls_rsa_pkcs1_sign(). Before the private key operation,
+ * apply the padding steps described in RFC 8017, section 9.2
+ * "EMSA-PKCS1-v1_5" as follows.
+ * - If \p md_alg is #MBEDTLS_MD_NONE, apply the PKCS#1 v1.5
+ * encoding, treating \p hash as the DigestInfo to be
+ * padded. In other words, apply EMSA-PKCS1-v1_5 starting
+ * from step 3, with `T = hash` and `tLen = hash_len`.
+ * - If `md_alg != MBEDTLS_MD_NONE`, apply the PKCS#1 v1.5
+ * encoding, treating \p hash as the hash to be encoded and
+ * padded. In other words, apply EMSA-PKCS1-v1_5 starting
+ * from step 2, with `digestAlgorithm` obtained by calling
+ * mbedtls_oid_get_oid_by_md() on \p md_alg.
+ *
+ * \note For ECDSA signatures, the output format is the DER encoding
+ * `Ecdsa-Sig-Value` defined in
+ * [RFC 4492 section 5.4](https://tools.ietf.org/html/rfc4492#section-5.4).
+ *
+ * \param ssl The SSL connection instance. It should not be
+ * modified other than via
+ * mbedtls_ssl_set_async_operation_data().
+ * \param cert Certificate containing the public key.
+ * In simple cases, this is one of the pointers passed to
+ * mbedtls_ssl_conf_own_cert() when configuring the SSL
+ * connection. However, if other callbacks are used, this
+ * property may not hold. For example, if an SNI callback
+ * is registered with mbedtls_ssl_conf_sni(), then
+ * this callback determines what certificate is used.
+ * \param md_alg Hash algorithm.
+ * \param hash Buffer containing the hash. This buffer is
+ * no longer valid when the function returns.
+ * \param hash_len Size of the \c hash buffer in bytes.
+ *
+ * \return 0 if the operation was started successfully and the SSL
+ * stack should call the resume callback immediately.
+ * \return #MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS if the operation
+ * was started successfully and the SSL stack should return
+ * immediately without calling the resume callback yet.
+ * \return #MBEDTLS_ERR_SSL_HW_ACCEL_FALLTHROUGH if the external
+ * processor does not support this key. The SSL stack will
+ * use the private key object instead.
+ * \return Any other error indicates a fatal failure and is
+ * propagated up the call chain. The callback should
+ * use \c MBEDTLS_ERR_PK_xxx error codes, and <b>must not</b>
+ * use \c MBEDTLS_ERR_SSL_xxx error codes except as
+ * directed in the documentation of this callback.
+ */
+typedef int mbedtls_ssl_async_sign_t( mbedtls_ssl_context *ssl,
+ mbedtls_x509_crt *cert,
+ mbedtls_md_type_t md_alg,
+ const unsigned char *hash,
+ size_t hash_len );
+
+/**
+ * \brief Callback type: start external decryption operation.
+ *
+ * This callback is called during an SSL handshake to start
+ * an RSA decryption operation using an
+ * external processor. The parameter \p cert contains
+ * the public key; it is up to the callback function to
+ * determine how to access the associated private key.
+ *
+ * This function typically sends or enqueues a request, and
+ * does not wait for the operation to complete. This allows
+ * the handshake step to be non-blocking.
+ *
+ * The parameters \p ssl and \p cert are guaranteed to remain
+ * valid throughout the handshake. On the other hand, this
+ * function must save the contents of \p input if the value
+ * is needed for later processing, because the \p input buffer
+ * is no longer valid after this function returns.
+ *
+ * This function may call mbedtls_ssl_set_async_operation_data()
+ * to store an operation context for later retrieval
+ * by the resume or cancel callback.
+ *
+ * \warning RSA decryption as used in TLS is subject to a potential
+ * timing side channel attack first discovered by Bleichenbacher
+ * in 1998. This attack can be remotely exploitable
+ * in practice. To avoid this attack, you must ensure that
+ * if the callback performs an RSA decryption, the time it
+ * takes to execute and return the result does not depend
+ * on whether the RSA decryption succeeded or reported
+ * invalid padding.
+ *
+ * \param ssl The SSL connection instance. It should not be
+ * modified other than via
+ * mbedtls_ssl_set_async_operation_data().
+ * \param cert Certificate containing the public key.
+ * In simple cases, this is one of the pointers passed to
+ * mbedtls_ssl_conf_own_cert() when configuring the SSL
+ * connection. However, if other callbacks are used, this
+ * property may not hold. For example, if an SNI callback
+ * is registered with mbedtls_ssl_conf_sni(), then
+ * this callback determines what certificate is used.
+ * \param input Buffer containing the input ciphertext. This buffer
+ * is no longer valid when the function returns.
+ * \param input_len Size of the \p input buffer in bytes.
+ *
+ * \return 0 if the operation was started successfully and the SSL
+ * stack should call the resume callback immediately.
+ * \return #MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS if the operation
+ * was started successfully and the SSL stack should return
+ * immediately without calling the resume callback yet.
+ * \return #MBEDTLS_ERR_SSL_HW_ACCEL_FALLTHROUGH if the external
+ * processor does not support this key. The SSL stack will
+ * use the private key object instead.
+ * \return Any other error indicates a fatal failure and is
+ * propagated up the call chain. The callback should
+ * use \c MBEDTLS_ERR_PK_xxx error codes, and <b>must not</b>
+ * use \c MBEDTLS_ERR_SSL_xxx error codes except as
+ * directed in the documentation of this callback.
+ */
+typedef int mbedtls_ssl_async_decrypt_t( mbedtls_ssl_context *ssl,
+ mbedtls_x509_crt *cert,
+ const unsigned char *input,
+ size_t input_len );
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+
+/**
+ * \brief Callback type: resume external operation.
+ *
+ * This callback is called during an SSL handshake to resume
+ * an external operation started by the
+ * ::mbedtls_ssl_async_sign_t or
+ * ::mbedtls_ssl_async_decrypt_t callback.
+ *
+ * This function typically checks the status of a pending
+ * request or causes the request queue to make progress, and
+ * does not wait for the operation to complete. This allows
+ * the handshake step to be non-blocking.
+ *
+ * This function may call mbedtls_ssl_get_async_operation_data()
+ * to retrieve an operation context set by the start callback.
+ * It may call mbedtls_ssl_set_async_operation_data() to modify
+ * this context.
+ *
+ * Note that when this function returns a status other than
+ * #MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS, it must free any
+ * resources associated with the operation.
+ *
+ * \param ssl The SSL connection instance. It should not be
+ * modified other than via
+ * mbedtls_ssl_set_async_operation_data().
+ * \param output Buffer containing the output (signature or decrypted
+ * data) on success.
+ * \param output_len On success, number of bytes written to \p output.
+ * \param output_size Size of the \p output buffer in bytes.
+ *
+ * \return 0 if output of the operation is available in the
+ * \p output buffer.
+ * \return #MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS if the operation
+ * is still in progress. Subsequent requests for progress
+ * on the SSL connection will call the resume callback
+ * again.
+ * \return Any other error means that the operation is aborted.
+ * The SSL handshake is aborted. The callback should
+ * use \c MBEDTLS_ERR_PK_xxx error codes, and <b>must not</b>
+ * use \c MBEDTLS_ERR_SSL_xxx error codes except as
+ * directed in the documentation of this callback.
+ */
+typedef int mbedtls_ssl_async_resume_t( mbedtls_ssl_context *ssl,
+ unsigned char *output,
+ size_t *output_len,
+ size_t output_size );
+
+/**
+ * \brief Callback type: cancel external operation.
+ *
+ * This callback is called if an SSL connection is closed
+ * while an asynchronous operation is in progress. Note that
+ * this callback is not called if the
+ * ::mbedtls_ssl_async_resume_t callback has run and has
+ * returned a value other than
+ * #MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS, since in that case
+ * the asynchronous operation has already completed.
+ *
+ * This function may call mbedtls_ssl_get_async_operation_data()
+ * to retrieve an operation context set by the start callback.
+ *
+ * \param ssl The SSL connection instance. It should not be
+ * modified.
+ */
+typedef void mbedtls_ssl_async_cancel_t( mbedtls_ssl_context *ssl );
+#endif /* MBEDTLS_SSL_ASYNC_PRIVATE */
+
+/*
+ * This structure is used for storing current session data.
+ */
+struct mbedtls_ssl_session
+{
+#if defined(MBEDTLS_HAVE_TIME)
+ mbedtls_time_t start; /*!< starting time */
+#endif
+ int ciphersuite; /*!< chosen ciphersuite */
+ int compression; /*!< chosen compression */
+ size_t id_len; /*!< session id length */
+ unsigned char id[32]; /*!< session identifier */
+ unsigned char master[48]; /*!< the master secret */
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+ mbedtls_x509_crt *peer_cert; /*!< peer X.509 cert chain */
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+ uint32_t verify_result; /*!< verification result */
+
+#if defined(MBEDTLS_SSL_SESSION_TICKETS) && defined(MBEDTLS_SSL_CLI_C)
+ unsigned char *ticket; /*!< RFC 5077 session ticket */
+ size_t ticket_len; /*!< session ticket length */
+ uint32_t ticket_lifetime; /*!< ticket lifetime hint */
+#endif /* MBEDTLS_SSL_SESSION_TICKETS && MBEDTLS_SSL_CLI_C */
+
+#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH)
+ unsigned char mfl_code; /*!< MaxFragmentLength negotiated by peer */
+#endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */
+
+#if defined(MBEDTLS_SSL_TRUNCATED_HMAC)
+ int trunc_hmac; /*!< flag for truncated hmac activation */
+#endif /* MBEDTLS_SSL_TRUNCATED_HMAC */
+
+#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC)
+ int encrypt_then_mac; /*!< flag for EtM activation */
+#endif
+};
+
+/**
+ * SSL/TLS configuration to be shared between mbedtls_ssl_context structures.
+ */
+struct mbedtls_ssl_config
+{
+ /* Group items by size (largest first) to minimize padding overhead */
+
+ /*
+ * Pointers
+ */
+
+ const int *ciphersuite_list[4]; /*!< allowed ciphersuites per version */
+
+ /** Callback for printing debug output */
+ void (*f_dbg)(void *, int, const char *, int, const char *);
+ void *p_dbg; /*!< context for the debug function */
+
+ /** Callback for getting (pseudo-)random numbers */
+ int (*f_rng)(void *, unsigned char *, size_t);
+ void *p_rng; /*!< context for the RNG function */
+
+ /** Callback to retrieve a session from the cache */
+ int (*f_get_cache)(void *, mbedtls_ssl_session *);
+ /** Callback to store a session into the cache */
+ int (*f_set_cache)(void *, const mbedtls_ssl_session *);
+ void *p_cache; /*!< context for cache callbacks */
+
+#if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION)
+ /** Callback for setting cert according to SNI extension */
+ int (*f_sni)(void *, mbedtls_ssl_context *, const unsigned char *, size_t);
+ void *p_sni; /*!< context for SNI callback */
+#endif
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+ /** Callback to customize X.509 certificate chain verification */
+ int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *);
+ void *p_vrfy; /*!< context for X.509 verify calllback */
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED)
+ /** Callback to retrieve PSK key from identity */
+ int (*f_psk)(void *, mbedtls_ssl_context *, const unsigned char *, size_t);
+ void *p_psk; /*!< context for PSK callback */
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_HELLO_VERIFY) && defined(MBEDTLS_SSL_SRV_C)
+ /** Callback to create & write a cookie for ClientHello veirifcation */
+ int (*f_cookie_write)( void *, unsigned char **, unsigned char *,
+ const unsigned char *, size_t );
+ /** Callback to verify validity of a ClientHello cookie */
+ int (*f_cookie_check)( void *, const unsigned char *, size_t,
+ const unsigned char *, size_t );
+ void *p_cookie; /*!< context for the cookie callbacks */
+#endif
+
+#if defined(MBEDTLS_SSL_SESSION_TICKETS) && defined(MBEDTLS_SSL_SRV_C)
+ /** Callback to create & write a session ticket */
+ int (*f_ticket_write)( void *, const mbedtls_ssl_session *,
+ unsigned char *, const unsigned char *, size_t *, uint32_t * );
+ /** Callback to parse a session ticket into a session structure */
+ int (*f_ticket_parse)( void *, mbedtls_ssl_session *, unsigned char *, size_t);
+ void *p_ticket; /*!< context for the ticket callbacks */
+#endif /* MBEDTLS_SSL_SESSION_TICKETS && MBEDTLS_SSL_SRV_C */
+
+#if defined(MBEDTLS_SSL_EXPORT_KEYS)
+ /** Callback to export key block and master secret */
+ int (*f_export_keys)( void *, const unsigned char *,
+ const unsigned char *, size_t, size_t, size_t );
+ void *p_export_keys; /*!< context for key export callback */
+#endif
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+ const mbedtls_x509_crt_profile *cert_profile; /*!< verification profile */
+ mbedtls_ssl_key_cert *key_cert; /*!< own certificate/key pair(s) */
+ mbedtls_x509_crt *ca_chain; /*!< trusted CAs */
+ mbedtls_x509_crl *ca_crl; /*!< trusted CAs CRLs */
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+
+#if defined(MBEDTLS_SSL_ASYNC_PRIVATE)
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+ mbedtls_ssl_async_sign_t *f_async_sign_start; /*!< start asynchronous signature operation */
+ mbedtls_ssl_async_decrypt_t *f_async_decrypt_start; /*!< start asynchronous decryption operation */
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+ mbedtls_ssl_async_resume_t *f_async_resume; /*!< resume asynchronous operation */
+ mbedtls_ssl_async_cancel_t *f_async_cancel; /*!< cancel asynchronous operation */
+ void *p_async_config_data; /*!< Configuration data set by mbedtls_ssl_conf_async_private_cb(). */
+#endif /* MBEDTLS_SSL_ASYNC_PRIVATE */
+
+#if defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
+ const int *sig_hashes; /*!< allowed signature hashes */
+#endif
+
+#if defined(MBEDTLS_ECP_C)
+ const mbedtls_ecp_group_id *curve_list; /*!< allowed curves */
+#endif
+
+#if defined(MBEDTLS_DHM_C)
+ mbedtls_mpi dhm_P; /*!< prime modulus for DHM */
+ mbedtls_mpi dhm_G; /*!< generator for DHM */
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED)
+ unsigned char *psk; /*!< pre-shared key. This field should
+ only be set via
+ mbedtls_ssl_conf_psk() */
+ size_t psk_len; /*!< length of the pre-shared key. This
+ field should only be set via
+ mbedtls_ssl_conf_psk() */
+ unsigned char *psk_identity; /*!< identity for PSK negotiation. This
+ field should only be set via
+ mbedtls_ssl_conf_psk() */
+ size_t psk_identity_len;/*!< length of identity. This field should
+ only be set via
+ mbedtls_ssl_conf_psk() */
+#endif
+
+#if defined(MBEDTLS_SSL_ALPN)
+ const char **alpn_list; /*!< ordered list of protocols */
+#endif
+
+ /*
+ * Numerical settings (int then char)
+ */
+
+ uint32_t read_timeout; /*!< timeout for mbedtls_ssl_read (ms) */
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+ uint32_t hs_timeout_min; /*!< initial value of the handshake
+ retransmission timeout (ms) */
+ uint32_t hs_timeout_max; /*!< maximum value of the handshake
+ retransmission timeout (ms) */
+#endif
+
+#if defined(MBEDTLS_SSL_RENEGOTIATION)
+ int renego_max_records; /*!< grace period for renegotiation */
+ unsigned char renego_period[8]; /*!< value of the record counters
+ that triggers renegotiation */
+#endif
+
+#if defined(MBEDTLS_SSL_DTLS_BADMAC_LIMIT)
+ unsigned int badmac_limit; /*!< limit of records with a bad MAC */
+#endif
+
+#if defined(MBEDTLS_DHM_C) && defined(MBEDTLS_SSL_CLI_C)
+ unsigned int dhm_min_bitlen; /*!< min. bit length of the DHM prime */
+#endif
+
+ unsigned char max_major_ver; /*!< max. major version used */
+ unsigned char max_minor_ver; /*!< max. minor version used */
+ unsigned char min_major_ver; /*!< min. major version used */
+ unsigned char min_minor_ver; /*!< min. minor version used */
+
+ /*
+ * Flags (bitfields)
+ */
+
+ unsigned int endpoint : 1; /*!< 0: client, 1: server */
+ unsigned int transport : 1; /*!< stream (TLS) or datagram (DTLS) */
+ unsigned int authmode : 2; /*!< MBEDTLS_SSL_VERIFY_XXX */
+ /* needed even with renego disabled for LEGACY_BREAK_HANDSHAKE */
+ unsigned int allow_legacy_renegotiation : 2 ; /*!< MBEDTLS_LEGACY_XXX */
+#if defined(MBEDTLS_ARC4_C)
+ unsigned int arc4_disabled : 1; /*!< blacklist RC4 ciphersuites? */
+#endif
+#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH)
+ unsigned int mfl_code : 3; /*!< desired fragment length */
+#endif
+#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC)
+ unsigned int encrypt_then_mac : 1 ; /*!< negotiate encrypt-then-mac? */
+#endif
+#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET)
+ unsigned int extended_ms : 1; /*!< negotiate extended master secret? */
+#endif
+#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY)
+ unsigned int anti_replay : 1; /*!< detect and prevent replay? */
+#endif
+#if defined(MBEDTLS_SSL_CBC_RECORD_SPLITTING)
+ unsigned int cbc_record_splitting : 1; /*!< do cbc record splitting */
+#endif
+#if defined(MBEDTLS_SSL_RENEGOTIATION)
+ unsigned int disable_renegotiation : 1; /*!< disable renegotiation? */
+#endif
+#if defined(MBEDTLS_SSL_TRUNCATED_HMAC)
+ unsigned int trunc_hmac : 1; /*!< negotiate truncated hmac? */
+#endif
+#if defined(MBEDTLS_SSL_SESSION_TICKETS)
+ unsigned int session_tickets : 1; /*!< use session tickets? */
+#endif
+#if defined(MBEDTLS_SSL_FALLBACK_SCSV) && defined(MBEDTLS_SSL_CLI_C)
+ unsigned int fallback : 1; /*!< is this a fallback? */
+#endif
+#if defined(MBEDTLS_SSL_SRV_C)
+ unsigned int cert_req_ca_list : 1; /*!< enable sending CA list in
+ Certificate Request messages? */
+#endif
+};
+
+
+struct mbedtls_ssl_context
+{
+ const mbedtls_ssl_config *conf; /*!< configuration information */
+
+ /*
+ * Miscellaneous
+ */
+ int state; /*!< SSL handshake: current state */
+#if defined(MBEDTLS_SSL_RENEGOTIATION)
+ int renego_status; /*!< Initial, in progress, pending? */
+ int renego_records_seen; /*!< Records since renego request, or with DTLS,
+ number of retransmissions of request if
+ renego_max_records is < 0 */
+#endif /* MBEDTLS_SSL_RENEGOTIATION */
+
+ int major_ver; /*!< equal to MBEDTLS_SSL_MAJOR_VERSION_3 */
+ int minor_ver; /*!< either 0 (SSL3) or 1 (TLS1.0) */
+
+#if defined(MBEDTLS_SSL_DTLS_BADMAC_LIMIT)
+ unsigned badmac_seen; /*!< records with a bad MAC received */
+#endif /* MBEDTLS_SSL_DTLS_BADMAC_LIMIT */
+
+ mbedtls_ssl_send_t *f_send; /*!< Callback for network send */
+ mbedtls_ssl_recv_t *f_recv; /*!< Callback for network receive */
+ mbedtls_ssl_recv_timeout_t *f_recv_timeout;
+ /*!< Callback for network receive with timeout */
+
+ void *p_bio; /*!< context for I/O operations */
+
+ /*
+ * Session layer
+ */
+ mbedtls_ssl_session *session_in; /*!< current session data (in) */
+ mbedtls_ssl_session *session_out; /*!< current session data (out) */
+ mbedtls_ssl_session *session; /*!< negotiated session data */
+ mbedtls_ssl_session *session_negotiate; /*!< session data in negotiation */
+
+ mbedtls_ssl_handshake_params *handshake; /*!< params required only during
+ the handshake process */
+
+ /*
+ * Record layer transformations
+ */
+ mbedtls_ssl_transform *transform_in; /*!< current transform params (in) */
+ mbedtls_ssl_transform *transform_out; /*!< current transform params (in) */
+ mbedtls_ssl_transform *transform; /*!< negotiated transform params */
+ mbedtls_ssl_transform *transform_negotiate; /*!< transform params in negotiation */
+
+ /*
+ * Timers
+ */
+ void *p_timer; /*!< context for the timer callbacks */
+
+ mbedtls_ssl_set_timer_t *f_set_timer; /*!< set timer callback */
+ mbedtls_ssl_get_timer_t *f_get_timer; /*!< get timer callback */
+
+ /*
+ * Record layer (incoming data)
+ */
+ unsigned char *in_buf; /*!< input buffer */
+ unsigned char *in_ctr; /*!< 64-bit incoming message counter
+ TLS: maintained by us
+ DTLS: read from peer */
+ unsigned char *in_hdr; /*!< start of record header */
+ unsigned char *in_len; /*!< two-bytes message length field */
+ unsigned char *in_iv; /*!< ivlen-byte IV */
+ unsigned char *in_msg; /*!< message contents (in_iv+ivlen) */
+ unsigned char *in_offt; /*!< read offset in application data */
+
+ int in_msgtype; /*!< record header: message type */
+ size_t in_msglen; /*!< record header: message length */
+ size_t in_left; /*!< amount of data read so far */
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+ uint16_t in_epoch; /*!< DTLS epoch for incoming records */
+ size_t next_record_offset; /*!< offset of the next record in datagram
+ (equal to in_left if none) */
+#endif /* MBEDTLS_SSL_PROTO_DTLS */
+#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY)
+ uint64_t in_window_top; /*!< last validated record seq_num */
+ uint64_t in_window; /*!< bitmask for replay detection */
+#endif /* MBEDTLS_SSL_DTLS_ANTI_REPLAY */
+
+ size_t in_hslen; /*!< current handshake message length,
+ including the handshake header */
+ int nb_zero; /*!< # of 0-length encrypted messages */
+
+ int keep_current_message; /*!< drop or reuse current message
+ on next call to record layer? */
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+ uint8_t disable_datagram_packing; /*!< Disable packing multiple records
+ * within a single datagram. */
+#endif /* MBEDTLS_SSL_PROTO_DTLS */
+
+ /*
+ * Record layer (outgoing data)
+ */
+ unsigned char *out_buf; /*!< output buffer */
+ unsigned char *out_ctr; /*!< 64-bit outgoing message counter */
+ unsigned char *out_hdr; /*!< start of record header */
+ unsigned char *out_len; /*!< two-bytes message length field */
+ unsigned char *out_iv; /*!< ivlen-byte IV */
+ unsigned char *out_msg; /*!< message contents (out_iv+ivlen) */
+
+ int out_msgtype; /*!< record header: message type */
+ size_t out_msglen; /*!< record header: message length */
+ size_t out_left; /*!< amount of data not yet written */
+
+ unsigned char cur_out_ctr[8]; /*!< Outgoing record sequence number. */
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+ uint16_t mtu; /*!< path mtu, used to fragment outgoing messages */
+#endif /* MBEDTLS_SSL_PROTO_DTLS */
+
+#if defined(MBEDTLS_ZLIB_SUPPORT)
+ unsigned char *compress_buf; /*!< zlib data buffer */
+#endif /* MBEDTLS_ZLIB_SUPPORT */
+#if defined(MBEDTLS_SSL_CBC_RECORD_SPLITTING)
+ signed char split_done; /*!< current record already splitted? */
+#endif /* MBEDTLS_SSL_CBC_RECORD_SPLITTING */
+
+ /*
+ * PKI layer
+ */
+ int client_auth; /*!< flag for client auth. */
+
+ /*
+ * User settings
+ */
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+ char *hostname; /*!< expected peer CN for verification
+ (and SNI if available) */
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+
+#if defined(MBEDTLS_SSL_ALPN)
+ const char *alpn_chosen; /*!< negotiated protocol */
+#endif /* MBEDTLS_SSL_ALPN */
+
+ /*
+ * Information for DTLS hello verify
+ */
+#if defined(MBEDTLS_SSL_DTLS_HELLO_VERIFY) && defined(MBEDTLS_SSL_SRV_C)
+ unsigned char *cli_id; /*!< transport-level ID of the client */
+ size_t cli_id_len; /*!< length of cli_id */
+#endif /* MBEDTLS_SSL_DTLS_HELLO_VERIFY && MBEDTLS_SSL_SRV_C */
+
+ /*
+ * Secure renegotiation
+ */
+ /* needed to know when to send extension on server */
+ int secure_renegotiation; /*!< does peer support legacy or
+ secure renegotiation */
+#if defined(MBEDTLS_SSL_RENEGOTIATION)
+ size_t verify_data_len; /*!< length of verify data stored */
+ char own_verify_data[MBEDTLS_SSL_VERIFY_DATA_MAX_LEN]; /*!< previous handshake verify data */
+ char peer_verify_data[MBEDTLS_SSL_VERIFY_DATA_MAX_LEN]; /*!< previous handshake verify data */
+#endif /* MBEDTLS_SSL_RENEGOTIATION */
+};
+
+#if defined(MBEDTLS_SSL_HW_RECORD_ACCEL)
+
+#define MBEDTLS_SSL_CHANNEL_OUTBOUND 0
+#define MBEDTLS_SSL_CHANNEL_INBOUND 1
+
+extern int (*mbedtls_ssl_hw_record_init)(mbedtls_ssl_context *ssl,
+ const unsigned char *key_enc, const unsigned char *key_dec,
+ size_t keylen,
+ const unsigned char *iv_enc, const unsigned char *iv_dec,
+ size_t ivlen,
+ const unsigned char *mac_enc, const unsigned char *mac_dec,
+ size_t maclen);
+extern int (*mbedtls_ssl_hw_record_activate)(mbedtls_ssl_context *ssl, int direction);
+extern int (*mbedtls_ssl_hw_record_reset)(mbedtls_ssl_context *ssl);
+extern int (*mbedtls_ssl_hw_record_write)(mbedtls_ssl_context *ssl);
+extern int (*mbedtls_ssl_hw_record_read)(mbedtls_ssl_context *ssl);
+extern int (*mbedtls_ssl_hw_record_finish)(mbedtls_ssl_context *ssl);
+#endif /* MBEDTLS_SSL_HW_RECORD_ACCEL */
+
+/**
+ * \brief Return the name of the ciphersuite associated with the
+ * given ID
+ *
+ * \param ciphersuite_id SSL ciphersuite ID
+ *
+ * \return a string containing the ciphersuite name
+ */
+const char *mbedtls_ssl_get_ciphersuite_name( const int ciphersuite_id );
+
+/**
+ * \brief Return the ID of the ciphersuite associated with the
+ * given name
+ *
+ * \param ciphersuite_name SSL ciphersuite name
+ *
+ * \return the ID with the ciphersuite or 0 if not found
+ */
+int mbedtls_ssl_get_ciphersuite_id( const char *ciphersuite_name );
+
+/**
+ * \brief Initialize an SSL context
+ * Just makes the context ready for mbedtls_ssl_setup() or
+ * mbedtls_ssl_free()
+ *
+ * \param ssl SSL context
+ */
+void mbedtls_ssl_init( mbedtls_ssl_context *ssl );
+
+/**
+ * \brief Set up an SSL context for use
+ *
+ * \note No copy of the configuration context is made, it can be
+ * shared by many mbedtls_ssl_context structures.
+ *
+ * \warning The conf structure will be accessed during the session.
+ * It must not be modified or freed as long as the session
+ * is active.
+ *
+ * \warning This function must be called exactly once per context.
+ * Calling mbedtls_ssl_setup again is not supported, even
+ * if no session is active.
+ *
+ * \param ssl SSL context
+ * \param conf SSL configuration to use
+ *
+ * \return 0 if successful, or MBEDTLS_ERR_SSL_ALLOC_FAILED if
+ * memory allocation failed
+ */
+int mbedtls_ssl_setup( mbedtls_ssl_context *ssl,
+ const mbedtls_ssl_config *conf );
+
+/**
+ * \brief Reset an already initialized SSL context for re-use
+ * while retaining application-set variables, function
+ * pointers and data.
+ *
+ * \param ssl SSL context
+ * \return 0 if successful, or MBEDTLS_ERR_SSL_ALLOC_FAILED,
+ MBEDTLS_ERR_SSL_HW_ACCEL_FAILED or
+ * MBEDTLS_ERR_SSL_COMPRESSION_FAILED
+ */
+int mbedtls_ssl_session_reset( mbedtls_ssl_context *ssl );
+
+/**
+ * \brief Set the current endpoint type
+ *
+ * \param conf SSL configuration
+ * \param endpoint must be MBEDTLS_SSL_IS_CLIENT or MBEDTLS_SSL_IS_SERVER
+ */
+void mbedtls_ssl_conf_endpoint( mbedtls_ssl_config *conf, int endpoint );
+
+/**
+ * \brief Set the transport type (TLS or DTLS).
+ * Default: TLS
+ *
+ * \note For DTLS, you must either provide a recv callback that
+ * doesn't block, or one that handles timeouts, see
+ * \c mbedtls_ssl_set_bio(). You also need to provide timer
+ * callbacks with \c mbedtls_ssl_set_timer_cb().
+ *
+ * \param conf SSL configuration
+ * \param transport transport type:
+ * MBEDTLS_SSL_TRANSPORT_STREAM for TLS,
+ * MBEDTLS_SSL_TRANSPORT_DATAGRAM for DTLS.
+ */
+void mbedtls_ssl_conf_transport( mbedtls_ssl_config *conf, int transport );
+
+/**
+ * \brief Set the certificate verification mode
+ * Default: NONE on server, REQUIRED on client
+ *
+ * \param conf SSL configuration
+ * \param authmode can be:
+ *
+ * MBEDTLS_SSL_VERIFY_NONE: peer certificate is not checked
+ * (default on server)
+ * (insecure on client)
+ *
+ * MBEDTLS_SSL_VERIFY_OPTIONAL: peer certificate is checked, however the
+ * handshake continues even if verification failed;
+ * mbedtls_ssl_get_verify_result() can be called after the
+ * handshake is complete.
+ *
+ * MBEDTLS_SSL_VERIFY_REQUIRED: peer *must* present a valid certificate,
+ * handshake is aborted if verification failed.
+ * (default on client)
+ *
+ * \note On client, MBEDTLS_SSL_VERIFY_REQUIRED is the recommended mode.
+ * With MBEDTLS_SSL_VERIFY_OPTIONAL, the user needs to call mbedtls_ssl_get_verify_result() at
+ * the right time(s), which may not be obvious, while REQUIRED always perform
+ * the verification as soon as possible. For example, REQUIRED was protecting
+ * against the "triple handshake" attack even before it was found.
+ */
+void mbedtls_ssl_conf_authmode( mbedtls_ssl_config *conf, int authmode );
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+/**
+ * \brief Set the verification callback (Optional).
+ *
+ * If set, the verify callback is called for each
+ * certificate in the chain. For implementation
+ * information, please see \c mbedtls_x509_crt_verify()
+ *
+ * \param conf SSL configuration
+ * \param f_vrfy verification function
+ * \param p_vrfy verification parameter
+ */
+void mbedtls_ssl_conf_verify( mbedtls_ssl_config *conf,
+ int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *),
+ void *p_vrfy );
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+
+/**
+ * \brief Set the random number generator callback
+ *
+ * \param conf SSL configuration
+ * \param f_rng RNG function
+ * \param p_rng RNG parameter
+ */
+void mbedtls_ssl_conf_rng( mbedtls_ssl_config *conf,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+/**
+ * \brief Set the debug callback
+ *
+ * The callback has the following argument:
+ * void * opaque context for the callback
+ * int debug level
+ * const char * file name
+ * int line number
+ * const char * message
+ *
+ * \param conf SSL configuration
+ * \param f_dbg debug function
+ * \param p_dbg debug parameter
+ */
+void mbedtls_ssl_conf_dbg( mbedtls_ssl_config *conf,
+ void (*f_dbg)(void *, int, const char *, int, const char *),
+ void *p_dbg );
+
+/**
+ * \brief Set the underlying BIO callbacks for write, read and
+ * read-with-timeout.
+ *
+ * \param ssl SSL context
+ * \param p_bio parameter (context) shared by BIO callbacks
+ * \param f_send write callback
+ * \param f_recv read callback
+ * \param f_recv_timeout blocking read callback with timeout.
+ *
+ * \note One of f_recv or f_recv_timeout can be NULL, in which case
+ * the other is used. If both are non-NULL, f_recv_timeout is
+ * used and f_recv is ignored (as if it were NULL).
+ *
+ * \note The two most common use cases are:
+ * - non-blocking I/O, f_recv != NULL, f_recv_timeout == NULL
+ * - blocking I/O, f_recv == NULL, f_recv_timout != NULL
+ *
+ * \note For DTLS, you need to provide either a non-NULL
+ * f_recv_timeout callback, or a f_recv that doesn't block.
+ *
+ * \note See the documentations of \c mbedtls_ssl_sent_t,
+ * \c mbedtls_ssl_recv_t and \c mbedtls_ssl_recv_timeout_t for
+ * the conventions those callbacks must follow.
+ *
+ * \note On some platforms, net_sockets.c provides
+ * \c mbedtls_net_send(), \c mbedtls_net_recv() and
+ * \c mbedtls_net_recv_timeout() that are suitable to be used
+ * here.
+ */
+void mbedtls_ssl_set_bio( mbedtls_ssl_context *ssl,
+ void *p_bio,
+ mbedtls_ssl_send_t *f_send,
+ mbedtls_ssl_recv_t *f_recv,
+ mbedtls_ssl_recv_timeout_t *f_recv_timeout );
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+/**
+ * \brief Set the Maximum Tranport Unit (MTU).
+ * Special value: 0 means unset (no limit).
+ * This represents the maximum size of a datagram payload
+ * handled by the transport layer (usually UDP) as determined
+ * by the network link and stack. In practice, this controls
+ * the maximum size datagram the DTLS layer will pass to the
+ * \c f_send() callback set using \c mbedtls_ssl_set_bio().
+ *
+ * \note The limit on datagram size is converted to a limit on
+ * record payload by subtracting the current overhead of
+ * encapsulation and encryption/authentication if any.
+ *
+ * \note This can be called at any point during the connection, for
+ * example when a Path Maximum Transfer Unit (PMTU)
+ * estimate becomes available from other sources,
+ * such as lower (or higher) protocol layers.
+ *
+ * \note This setting only controls the size of the packets we send,
+ * and does not restrict the size of the datagrams we're
+ * willing to receive. Client-side, you can request the
+ * server to use smaller records with \c
+ * mbedtls_ssl_conf_max_frag_len().
+ *
+ * \note If both a MTU and a maximum fragment length have been
+ * configured (or negotiated with the peer), the resulting
+ * lower limit on record payload (see first note) is used.
+ *
+ * \note This can only be used to decrease the maximum size
+ * of datagrams (hence records, see first note) sent. It
+ * cannot be used to increase the maximum size of records over
+ * the limit set by #MBEDTLS_SSL_OUT_CONTENT_LEN.
+ *
+ * \note Values lower than the current record layer expansion will
+ * result in an error when trying to send data.
+ *
+ * \note Using record compression together with a non-zero MTU value
+ * will result in an error when trying to send data.
+ *
+ * \param ssl SSL context
+ * \param mtu Value of the path MTU in bytes
+ */
+void mbedtls_ssl_set_mtu( mbedtls_ssl_context *ssl, uint16_t mtu );
+#endif /* MBEDTLS_SSL_PROTO_DTLS */
+
+/**
+ * \brief Set the timeout period for mbedtls_ssl_read()
+ * (Default: no timeout.)
+ *
+ * \param conf SSL configuration context
+ * \param timeout Timeout value in milliseconds.
+ * Use 0 for no timeout (default).
+ *
+ * \note With blocking I/O, this will only work if a non-NULL
+ * \c f_recv_timeout was set with \c mbedtls_ssl_set_bio().
+ * With non-blocking I/O, this will only work if timer
+ * callbacks were set with \c mbedtls_ssl_set_timer_cb().
+ *
+ * \note With non-blocking I/O, you may also skip this function
+ * altogether and handle timeouts at the application layer.
+ */
+void mbedtls_ssl_conf_read_timeout( mbedtls_ssl_config *conf, uint32_t timeout );
+
+/**
+ * \brief Set the timer callbacks (Mandatory for DTLS.)
+ *
+ * \param ssl SSL context
+ * \param p_timer parameter (context) shared by timer callbacks
+ * \param f_set_timer set timer callback
+ * \param f_get_timer get timer callback. Must return:
+ *
+ * \note See the documentation of \c mbedtls_ssl_set_timer_t and
+ * \c mbedtls_ssl_get_timer_t for the conventions this pair of
+ * callbacks must follow.
+ *
+ * \note On some platforms, timing.c provides
+ * \c mbedtls_timing_set_delay() and
+ * \c mbedtls_timing_get_delay() that are suitable for using
+ * here, except if using an event-driven style.
+ *
+ * \note See also the "DTLS tutorial" article in our knowledge base.
+ * https://tls.mbed.org/kb/how-to/dtls-tutorial
+ */
+void mbedtls_ssl_set_timer_cb( mbedtls_ssl_context *ssl,
+ void *p_timer,
+ mbedtls_ssl_set_timer_t *f_set_timer,
+ mbedtls_ssl_get_timer_t *f_get_timer );
+
+/**
+ * \brief Callback type: generate and write session ticket
+ *
+ * \note This describes what a callback implementation should do.
+ * This callback should generate an encrypted and
+ * authenticated ticket for the session and write it to the
+ * output buffer. Here, ticket means the opaque ticket part
+ * of the NewSessionTicket structure of RFC 5077.
+ *
+ * \param p_ticket Context for the callback
+ * \param session SSL session to be written in the ticket
+ * \param start Start of the output buffer
+ * \param end End of the output buffer
+ * \param tlen On exit, holds the length written
+ * \param lifetime On exit, holds the lifetime of the ticket in seconds
+ *
+ * \return 0 if successful, or
+ * a specific MBEDTLS_ERR_XXX code.
+ */
+typedef int mbedtls_ssl_ticket_write_t( void *p_ticket,
+ const mbedtls_ssl_session *session,
+ unsigned char *start,
+ const unsigned char *end,
+ size_t *tlen,
+ uint32_t *lifetime );
+
+#if defined(MBEDTLS_SSL_EXPORT_KEYS)
+/**
+ * \brief Callback type: Export key block and master secret
+ *
+ * \note This is required for certain uses of TLS, e.g. EAP-TLS
+ * (RFC 5216) and Thread. The key pointers are ephemeral and
+ * therefore must not be stored. The master secret and keys
+ * should not be used directly except as an input to a key
+ * derivation function.
+ *
+ * \param p_expkey Context for the callback
+ * \param ms Pointer to master secret (fixed length: 48 bytes)
+ * \param kb Pointer to key block, see RFC 5246 section 6.3
+ * (variable length: 2 * maclen + 2 * keylen + 2 * ivlen).
+ * \param maclen MAC length
+ * \param keylen Key length
+ * \param ivlen IV length
+ *
+ * \return 0 if successful, or
+ * a specific MBEDTLS_ERR_XXX code.
+ */
+typedef int mbedtls_ssl_export_keys_t( void *p_expkey,
+ const unsigned char *ms,
+ const unsigned char *kb,
+ size_t maclen,
+ size_t keylen,
+ size_t ivlen );
+#endif /* MBEDTLS_SSL_EXPORT_KEYS */
+
+/**
+ * \brief Callback type: parse and load session ticket
+ *
+ * \note This describes what a callback implementation should do.
+ * This callback should parse a session ticket as generated
+ * by the corresponding mbedtls_ssl_ticket_write_t function,
+ * and, if the ticket is authentic and valid, load the
+ * session.
+ *
+ * \note The implementation is allowed to modify the first len
+ * bytes of the input buffer, eg to use it as a temporary
+ * area for the decrypted ticket contents.
+ *
+ * \param p_ticket Context for the callback
+ * \param session SSL session to be loaded
+ * \param buf Start of the buffer containing the ticket
+ * \param len Length of the ticket.
+ *
+ * \return 0 if successful, or
+ * MBEDTLS_ERR_SSL_INVALID_MAC if not authentic, or
+ * MBEDTLS_ERR_SSL_SESSION_TICKET_EXPIRED if expired, or
+ * any other non-zero code for other failures.
+ */
+typedef int mbedtls_ssl_ticket_parse_t( void *p_ticket,
+ mbedtls_ssl_session *session,
+ unsigned char *buf,
+ size_t len );
+
+#if defined(MBEDTLS_SSL_SESSION_TICKETS) && defined(MBEDTLS_SSL_SRV_C)
+/**
+ * \brief Configure SSL session ticket callbacks (server only).
+ * (Default: none.)
+ *
+ * \note On server, session tickets are enabled by providing
+ * non-NULL callbacks.
+ *
+ * \note On client, use \c mbedtls_ssl_conf_session_tickets().
+ *
+ * \param conf SSL configuration context
+ * \param f_ticket_write Callback for writing a ticket
+ * \param f_ticket_parse Callback for parsing a ticket
+ * \param p_ticket Context shared by the two callbacks
+ */
+void mbedtls_ssl_conf_session_tickets_cb( mbedtls_ssl_config *conf,
+ mbedtls_ssl_ticket_write_t *f_ticket_write,
+ mbedtls_ssl_ticket_parse_t *f_ticket_parse,
+ void *p_ticket );
+#endif /* MBEDTLS_SSL_SESSION_TICKETS && MBEDTLS_SSL_SRV_C */
+
+#if defined(MBEDTLS_SSL_EXPORT_KEYS)
+/**
+ * \brief Configure key export callback.
+ * (Default: none.)
+ *
+ * \note See \c mbedtls_ssl_export_keys_t.
+ *
+ * \param conf SSL configuration context
+ * \param f_export_keys Callback for exporting keys
+ * \param p_export_keys Context for the callback
+ */
+void mbedtls_ssl_conf_export_keys_cb( mbedtls_ssl_config *conf,
+ mbedtls_ssl_export_keys_t *f_export_keys,
+ void *p_export_keys );
+#endif /* MBEDTLS_SSL_EXPORT_KEYS */
+
+#if defined(MBEDTLS_SSL_ASYNC_PRIVATE)
+/**
+ * \brief Configure asynchronous private key operation callbacks.
+ *
+ * \param conf SSL configuration context
+ * \param f_async_sign Callback to start a signature operation. See
+ * the description of ::mbedtls_ssl_async_sign_t
+ * for more information. This may be \c NULL if the
+ * external processor does not support any signature
+ * operation; in this case the private key object
+ * associated with the certificate will be used.
+ * \param f_async_decrypt Callback to start a decryption operation. See
+ * the description of ::mbedtls_ssl_async_decrypt_t
+ * for more information. This may be \c NULL if the
+ * external processor does not support any decryption
+ * operation; in this case the private key object
+ * associated with the certificate will be used.
+ * \param f_async_resume Callback to resume an asynchronous operation. See
+ * the description of ::mbedtls_ssl_async_resume_t
+ * for more information. This may not be \c NULL unless
+ * \p f_async_sign and \p f_async_decrypt are both
+ * \c NULL.
+ * \param f_async_cancel Callback to cancel an asynchronous operation. See
+ * the description of ::mbedtls_ssl_async_cancel_t
+ * for more information. This may be \c NULL if
+ * no cleanup is needed.
+ * \param config_data A pointer to configuration data which can be
+ * retrieved with
+ * mbedtls_ssl_conf_get_async_config_data(). The
+ * library stores this value without dereferencing it.
+ */
+void mbedtls_ssl_conf_async_private_cb( mbedtls_ssl_config *conf,
+ mbedtls_ssl_async_sign_t *f_async_sign,
+ mbedtls_ssl_async_decrypt_t *f_async_decrypt,
+ mbedtls_ssl_async_resume_t *f_async_resume,
+ mbedtls_ssl_async_cancel_t *f_async_cancel,
+ void *config_data );
+
+/**
+ * \brief Retrieve the configuration data set by
+ * mbedtls_ssl_conf_async_private_cb().
+ *
+ * \param conf SSL configuration context
+ * \return The configuration data set by
+ * mbedtls_ssl_conf_async_private_cb().
+ */
+void *mbedtls_ssl_conf_get_async_config_data( const mbedtls_ssl_config *conf );
+
+/**
+ * \brief Retrieve the asynchronous operation user context.
+ *
+ * \note This function may only be called while a handshake
+ * is in progress.
+ *
+ * \param ssl The SSL context to access.
+ *
+ * \return The asynchronous operation user context that was last
+ * set during the current handshake. If
+ * mbedtls_ssl_set_async_operation_data() has not yet been
+ * called during the current handshake, this function returns
+ * \c NULL.
+ */
+void *mbedtls_ssl_get_async_operation_data( const mbedtls_ssl_context *ssl );
+
+/**
+ * \brief Retrieve the asynchronous operation user context.
+ *
+ * \note This function may only be called while a handshake
+ * is in progress.
+ *
+ * \param ssl The SSL context to access.
+ * \param ctx The new value of the asynchronous operation user context.
+ * Call mbedtls_ssl_get_async_operation_data() later during the
+ * same handshake to retrieve this value.
+ */
+void mbedtls_ssl_set_async_operation_data( mbedtls_ssl_context *ssl,
+ void *ctx );
+#endif /* MBEDTLS_SSL_ASYNC_PRIVATE */
+
+/**
+ * \brief Callback type: generate a cookie
+ *
+ * \param ctx Context for the callback
+ * \param p Buffer to write to,
+ * must be updated to point right after the cookie
+ * \param end Pointer to one past the end of the output buffer
+ * \param info Client ID info that was passed to
+ * \c mbedtls_ssl_set_client_transport_id()
+ * \param ilen Length of info in bytes
+ *
+ * \return The callback must return 0 on success,
+ * or a negative error code.
+ */
+typedef int mbedtls_ssl_cookie_write_t( void *ctx,
+ unsigned char **p, unsigned char *end,
+ const unsigned char *info, size_t ilen );
+
+/**
+ * \brief Callback type: verify a cookie
+ *
+ * \param ctx Context for the callback
+ * \param cookie Cookie to verify
+ * \param clen Length of cookie
+ * \param info Client ID info that was passed to
+ * \c mbedtls_ssl_set_client_transport_id()
+ * \param ilen Length of info in bytes
+ *
+ * \return The callback must return 0 if cookie is valid,
+ * or a negative error code.
+ */
+typedef int mbedtls_ssl_cookie_check_t( void *ctx,
+ const unsigned char *cookie, size_t clen,
+ const unsigned char *info, size_t ilen );
+
+#if defined(MBEDTLS_SSL_DTLS_HELLO_VERIFY) && defined(MBEDTLS_SSL_SRV_C)
+/**
+ * \brief Register callbacks for DTLS cookies
+ * (Server only. DTLS only.)
+ *
+ * Default: dummy callbacks that fail, in order to force you to
+ * register working callbacks (and initialize their context).
+ *
+ * To disable HelloVerifyRequest, register NULL callbacks.
+ *
+ * \warning Disabling hello verification allows your server to be used
+ * for amplification in DoS attacks against other hosts.
+ * Only disable if you known this can't happen in your
+ * particular environment.
+ *
+ * \note See comments on \c mbedtls_ssl_handshake() about handling
+ * the MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED that is expected
+ * on the first handshake attempt when this is enabled.
+ *
+ * \note This is also necessary to handle client reconnection from
+ * the same port as described in RFC 6347 section 4.2.8 (only
+ * the variant with cookies is supported currently). See
+ * comments on \c mbedtls_ssl_read() for details.
+ *
+ * \param conf SSL configuration
+ * \param f_cookie_write Cookie write callback
+ * \param f_cookie_check Cookie check callback
+ * \param p_cookie Context for both callbacks
+ */
+void mbedtls_ssl_conf_dtls_cookies( mbedtls_ssl_config *conf,
+ mbedtls_ssl_cookie_write_t *f_cookie_write,
+ mbedtls_ssl_cookie_check_t *f_cookie_check,
+ void *p_cookie );
+
+/**
+ * \brief Set client's transport-level identification info.
+ * (Server only. DTLS only.)
+ *
+ * This is usually the IP address (and port), but could be
+ * anything identify the client depending on the underlying
+ * network stack. Used for HelloVerifyRequest with DTLS.
+ * This is *not* used to route the actual packets.
+ *
+ * \param ssl SSL context
+ * \param info Transport-level info identifying the client (eg IP + port)
+ * \param ilen Length of info in bytes
+ *
+ * \note An internal copy is made, so the info buffer can be reused.
+ *
+ * \return 0 on success,
+ * MBEDTLS_ERR_SSL_BAD_INPUT_DATA if used on client,
+ * MBEDTLS_ERR_SSL_ALLOC_FAILED if out of memory.
+ */
+int mbedtls_ssl_set_client_transport_id( mbedtls_ssl_context *ssl,
+ const unsigned char *info,
+ size_t ilen );
+
+#endif /* MBEDTLS_SSL_DTLS_HELLO_VERIFY && MBEDTLS_SSL_SRV_C */
+
+#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY)
+/**
+ * \brief Enable or disable anti-replay protection for DTLS.
+ * (DTLS only, no effect on TLS.)
+ * Default: enabled.
+ *
+ * \param conf SSL configuration
+ * \param mode MBEDTLS_SSL_ANTI_REPLAY_ENABLED or MBEDTLS_SSL_ANTI_REPLAY_DISABLED.
+ *
+ * \warning Disabling this is a security risk unless the application
+ * protocol handles duplicated packets in a safe way. You
+ * should not disable this without careful consideration.
+ * However, if your application already detects duplicated
+ * packets and needs information about them to adjust its
+ * transmission strategy, then you'll want to disable this.
+ */
+void mbedtls_ssl_conf_dtls_anti_replay( mbedtls_ssl_config *conf, char mode );
+#endif /* MBEDTLS_SSL_DTLS_ANTI_REPLAY */
+
+#if defined(MBEDTLS_SSL_DTLS_BADMAC_LIMIT)
+/**
+ * \brief Set a limit on the number of records with a bad MAC
+ * before terminating the connection.
+ * (DTLS only, no effect on TLS.)
+ * Default: 0 (disabled).
+ *
+ * \param conf SSL configuration
+ * \param limit Limit, or 0 to disable.
+ *
+ * \note If the limit is N, then the connection is terminated when
+ * the Nth non-authentic record is seen.
+ *
+ * \note Records with an invalid header are not counted, only the
+ * ones going through the authentication-decryption phase.
+ *
+ * \note This is a security trade-off related to the fact that it's
+ * often relatively easy for an active attacker ot inject UDP
+ * datagrams. On one hand, setting a low limit here makes it
+ * easier for such an attacker to forcibly terminated a
+ * connection. On the other hand, a high limit or no limit
+ * might make us waste resources checking authentication on
+ * many bogus packets.
+ */
+void mbedtls_ssl_conf_dtls_badmac_limit( mbedtls_ssl_config *conf, unsigned limit );
+#endif /* MBEDTLS_SSL_DTLS_BADMAC_LIMIT */
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+
+/**
+ * \brief Allow or disallow packing of multiple handshake records
+ * within a single datagram.
+ *
+ * \param ssl The SSL context to configure.
+ * \param allow_packing This determines whether datagram packing may
+ * be used or not. A value of \c 0 means that every
+ * record will be sent in a separate datagram; a
+ * value of \c 1 means that, if space permits,
+ * multiple handshake messages (including CCS) belonging to
+ * a single flight may be packed within a single datagram.
+ *
+ * \note This is enabled by default and should only be disabled
+ * for test purposes, or if datagram packing causes
+ * interoperability issues with peers that don't support it.
+ *
+ * \note Allowing datagram packing reduces the network load since
+ * there's less overhead if multiple messages share the same
+ * datagram. Also, it increases the handshake efficiency
+ * since messages belonging to a single datagram will not
+ * be reordered in transit, and so future message buffering
+ * or flight retransmission (if no buffering is used) as
+ * means to deal with reordering are needed less frequently.
+ *
+ * \note Application records are not affected by this option and
+ * are currently always sent in separate datagrams.
+ *
+ */
+void mbedtls_ssl_set_datagram_packing( mbedtls_ssl_context *ssl,
+ unsigned allow_packing );
+
+/**
+ * \brief Set retransmit timeout values for the DTLS handshake.
+ * (DTLS only, no effect on TLS.)
+ *
+ * \param conf SSL configuration
+ * \param min Initial timeout value in milliseconds.
+ * Default: 1000 (1 second).
+ * \param max Maximum timeout value in milliseconds.
+ * Default: 60000 (60 seconds).
+ *
+ * \note Default values are from RFC 6347 section 4.2.4.1.
+ *
+ * \note The 'min' value should typically be slightly above the
+ * expected round-trip time to your peer, plus whatever time
+ * it takes for the peer to process the message. For example,
+ * if your RTT is about 600ms and you peer needs up to 1s to
+ * do the cryptographic operations in the handshake, then you
+ * should set 'min' slightly above 1600. Lower values of 'min'
+ * might cause spurious resends which waste network resources,
+ * while larger value of 'min' will increase overall latency
+ * on unreliable network links.
+ *
+ * \note The more unreliable your network connection is, the larger
+ * your max / min ratio needs to be in order to achieve
+ * reliable handshakes.
+ *
+ * \note Messages are retransmitted up to log2(ceil(max/min)) times.
+ * For example, if min = 1s and max = 5s, the retransmit plan
+ * goes: send ... 1s -> resend ... 2s -> resend ... 4s ->
+ * resend ... 5s -> give up and return a timeout error.
+ */
+void mbedtls_ssl_conf_handshake_timeout( mbedtls_ssl_config *conf, uint32_t min, uint32_t max );
+#endif /* MBEDTLS_SSL_PROTO_DTLS */
+
+#if defined(MBEDTLS_SSL_SRV_C)
+/**
+ * \brief Set the session cache callbacks (server-side only)
+ * If not set, no session resuming is done (except if session
+ * tickets are enabled too).
+ *
+ * The session cache has the responsibility to check for stale
+ * entries based on timeout. See RFC 5246 for recommendations.
+ *
+ * Warning: session.peer_cert is cleared by the SSL/TLS layer on
+ * connection shutdown, so do not cache the pointer! Either set
+ * it to NULL or make a full copy of the certificate.
+ *
+ * The get callback is called once during the initial handshake
+ * to enable session resuming. The get function has the
+ * following parameters: (void *parameter, mbedtls_ssl_session *session)
+ * If a valid entry is found, it should fill the master of
+ * the session object with the cached values and return 0,
+ * return 1 otherwise. Optionally peer_cert can be set as well
+ * if it is properly present in cache entry.
+ *
+ * The set callback is called once during the initial handshake
+ * to enable session resuming after the entire handshake has
+ * been finished. The set function has the following parameters:
+ * (void *parameter, const mbedtls_ssl_session *session). The function
+ * should create a cache entry for future retrieval based on
+ * the data in the session structure and should keep in mind
+ * that the mbedtls_ssl_session object presented (and all its referenced
+ * data) is cleared by the SSL/TLS layer when the connection is
+ * terminated. It is recommended to add metadata to determine if
+ * an entry is still valid in the future. Return 0 if
+ * successfully cached, return 1 otherwise.
+ *
+ * \param conf SSL configuration
+ * \param p_cache parmater (context) for both callbacks
+ * \param f_get_cache session get callback
+ * \param f_set_cache session set callback
+ */
+void mbedtls_ssl_conf_session_cache( mbedtls_ssl_config *conf,
+ void *p_cache,
+ int (*f_get_cache)(void *, mbedtls_ssl_session *),
+ int (*f_set_cache)(void *, const mbedtls_ssl_session *) );
+#endif /* MBEDTLS_SSL_SRV_C */
+
+#if defined(MBEDTLS_SSL_CLI_C)
+/**
+ * \brief Request resumption of session (client-side only)
+ * Session data is copied from presented session structure.
+ *
+ * \param ssl SSL context
+ * \param session session context
+ *
+ * \return 0 if successful,
+ * MBEDTLS_ERR_SSL_ALLOC_FAILED if memory allocation failed,
+ * MBEDTLS_ERR_SSL_BAD_INPUT_DATA if used server-side or
+ * arguments are otherwise invalid
+ *
+ * \sa mbedtls_ssl_get_session()
+ */
+int mbedtls_ssl_set_session( mbedtls_ssl_context *ssl, const mbedtls_ssl_session *session );
+#endif /* MBEDTLS_SSL_CLI_C */
+
+/**
+ * \brief Set the list of allowed ciphersuites and the preference
+ * order. First in the list has the highest preference.
+ * (Overrides all version-specific lists)
+ *
+ * The ciphersuites array is not copied, and must remain
+ * valid for the lifetime of the ssl_config.
+ *
+ * Note: The server uses its own preferences
+ * over the preference of the client unless
+ * MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE is defined!
+ *
+ * \param conf SSL configuration
+ * \param ciphersuites 0-terminated list of allowed ciphersuites
+ */
+void mbedtls_ssl_conf_ciphersuites( mbedtls_ssl_config *conf,
+ const int *ciphersuites );
+
+/**
+ * \brief Set the list of allowed ciphersuites and the
+ * preference order for a specific version of the protocol.
+ * (Only useful on the server side)
+ *
+ * The ciphersuites array is not copied, and must remain
+ * valid for the lifetime of the ssl_config.
+ *
+ * \param conf SSL configuration
+ * \param ciphersuites 0-terminated list of allowed ciphersuites
+ * \param major Major version number (only MBEDTLS_SSL_MAJOR_VERSION_3
+ * supported)
+ * \param minor Minor version number (MBEDTLS_SSL_MINOR_VERSION_0,
+ * MBEDTLS_SSL_MINOR_VERSION_1 and MBEDTLS_SSL_MINOR_VERSION_2,
+ * MBEDTLS_SSL_MINOR_VERSION_3 supported)
+ *
+ * \note With DTLS, use MBEDTLS_SSL_MINOR_VERSION_2 for DTLS 1.0
+ * and MBEDTLS_SSL_MINOR_VERSION_3 for DTLS 1.2
+ */
+void mbedtls_ssl_conf_ciphersuites_for_version( mbedtls_ssl_config *conf,
+ const int *ciphersuites,
+ int major, int minor );
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+/**
+ * \brief Set the X.509 security profile used for verification
+ *
+ * \note The restrictions are enforced for all certificates in the
+ * chain. However, signatures in the handshake are not covered
+ * by this setting but by \b mbedtls_ssl_conf_sig_hashes().
+ *
+ * \param conf SSL configuration
+ * \param profile Profile to use
+ */
+void mbedtls_ssl_conf_cert_profile( mbedtls_ssl_config *conf,
+ const mbedtls_x509_crt_profile *profile );
+
+/**
+ * \brief Set the data required to verify peer certificate
+ *
+ * \note See \c mbedtls_x509_crt_verify() for notes regarding the
+ * parameters ca_chain (maps to trust_ca for that function)
+ * and ca_crl.
+ *
+ * \param conf SSL configuration
+ * \param ca_chain trusted CA chain (meaning all fully trusted top-level CAs)
+ * \param ca_crl trusted CA CRLs
+ */
+void mbedtls_ssl_conf_ca_chain( mbedtls_ssl_config *conf,
+ mbedtls_x509_crt *ca_chain,
+ mbedtls_x509_crl *ca_crl );
+
+/**
+ * \brief Set own certificate chain and private key
+ *
+ * \note own_cert should contain in order from the bottom up your
+ * certificate chain. The top certificate (self-signed)
+ * can be omitted.
+ *
+ * \note On server, this function can be called multiple times to
+ * provision more than one cert/key pair (eg one ECDSA, one
+ * RSA with SHA-256, one RSA with SHA-1). An adequate
+ * certificate will be selected according to the client's
+ * advertised capabilities. In case mutliple certificates are
+ * adequate, preference is given to the one set by the first
+ * call to this function, then second, etc.
+ *
+ * \note On client, only the first call has any effect. That is,
+ * only one client certificate can be provisioned. The
+ * server's preferences in its CertficateRequest message will
+ * be ignored and our only cert will be sent regardless of
+ * whether it matches those preferences - the server can then
+ * decide what it wants to do with it.
+ *
+ * \note The provided \p pk_key needs to match the public key in the
+ * first certificate in \p own_cert, or all handshakes using
+ * that certificate will fail. It is your responsibility
+ * to ensure that; this function will not perform any check.
+ * You may use mbedtls_pk_check_pair() in order to perform
+ * this check yourself, but be aware that this function can
+ * be computationally expensive on some key types.
+ *
+ * \param conf SSL configuration
+ * \param own_cert own public certificate chain
+ * \param pk_key own private key
+ *
+ * \return 0 on success or MBEDTLS_ERR_SSL_ALLOC_FAILED
+ */
+int mbedtls_ssl_conf_own_cert( mbedtls_ssl_config *conf,
+ mbedtls_x509_crt *own_cert,
+ mbedtls_pk_context *pk_key );
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+
+#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED)
+/**
+ * \brief Set the Pre Shared Key (PSK) and the expected identity name
+ *
+ * \note This is mainly useful for clients. Servers will usually
+ * want to use \c mbedtls_ssl_conf_psk_cb() instead.
+ *
+ * \note Currently clients can only register one pre-shared key.
+ * In other words, the servers' identity hint is ignored.
+ * Support for setting multiple PSKs on clients and selecting
+ * one based on the identity hint is not a planned feature but
+ * feedback is welcomed.
+ *
+ * \param conf SSL configuration
+ * \param psk pointer to the pre-shared key
+ * \param psk_len pre-shared key length
+ * \param psk_identity pointer to the pre-shared key identity
+ * \param psk_identity_len identity key length
+ *
+ * \return 0 if successful or MBEDTLS_ERR_SSL_ALLOC_FAILED
+ */
+int mbedtls_ssl_conf_psk( mbedtls_ssl_config *conf,
+ const unsigned char *psk, size_t psk_len,
+ const unsigned char *psk_identity, size_t psk_identity_len );
+
+
+/**
+ * \brief Set the Pre Shared Key (PSK) for the current handshake
+ *
+ * \note This should only be called inside the PSK callback,
+ * ie the function passed to \c mbedtls_ssl_conf_psk_cb().
+ *
+ * \param ssl SSL context
+ * \param psk pointer to the pre-shared key
+ * \param psk_len pre-shared key length
+ *
+ * \return 0 if successful or MBEDTLS_ERR_SSL_ALLOC_FAILED
+ */
+int mbedtls_ssl_set_hs_psk( mbedtls_ssl_context *ssl,
+ const unsigned char *psk, size_t psk_len );
+
+/**
+ * \brief Set the PSK callback (server-side only).
+ *
+ * If set, the PSK callback is called for each
+ * handshake where a PSK ciphersuite was negotiated.
+ * The caller provides the identity received and wants to
+ * receive the actual PSK data and length.
+ *
+ * The callback has the following parameters: (void *parameter,
+ * mbedtls_ssl_context *ssl, const unsigned char *psk_identity,
+ * size_t identity_len)
+ * If a valid PSK identity is found, the callback should use
+ * \c mbedtls_ssl_set_hs_psk() on the ssl context to set the
+ * correct PSK and return 0.
+ * Any other return value will result in a denied PSK identity.
+ *
+ * \note If you set a PSK callback using this function, then you
+ * don't need to set a PSK key and identity using
+ * \c mbedtls_ssl_conf_psk().
+ *
+ * \param conf SSL configuration
+ * \param f_psk PSK identity function
+ * \param p_psk PSK identity parameter
+ */
+void mbedtls_ssl_conf_psk_cb( mbedtls_ssl_config *conf,
+ int (*f_psk)(void *, mbedtls_ssl_context *, const unsigned char *,
+ size_t),
+ void *p_psk );
+#endif /* MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED */
+
+#if defined(MBEDTLS_DHM_C) && defined(MBEDTLS_SSL_SRV_C)
+
+#if !defined(MBEDTLS_DEPRECATED_REMOVED)
+
+#if defined(MBEDTLS_DEPRECATED_WARNING)
+#define MBEDTLS_DEPRECATED __attribute__((deprecated))
+#else
+#define MBEDTLS_DEPRECATED
+#endif
+
+/**
+ * \brief Set the Diffie-Hellman public P and G values,
+ * read as hexadecimal strings (server-side only)
+ * (Default values: MBEDTLS_DHM_RFC3526_MODP_2048_[PG])
+ *
+ * \param conf SSL configuration
+ * \param dhm_P Diffie-Hellman-Merkle modulus
+ * \param dhm_G Diffie-Hellman-Merkle generator
+ *
+ * \deprecated Superseded by \c mbedtls_ssl_conf_dh_param_bin.
+ *
+ * \return 0 if successful
+ */
+MBEDTLS_DEPRECATED int mbedtls_ssl_conf_dh_param( mbedtls_ssl_config *conf,
+ const char *dhm_P,
+ const char *dhm_G );
+
+#endif /* MBEDTLS_DEPRECATED_REMOVED */
+
+/**
+ * \brief Set the Diffie-Hellman public P and G values
+ * from big-endian binary presentations.
+ * (Default values: MBEDTLS_DHM_RFC3526_MODP_2048_[PG]_BIN)
+ *
+ * \param conf SSL configuration
+ * \param dhm_P Diffie-Hellman-Merkle modulus in big-endian binary form
+ * \param P_len Length of DHM modulus
+ * \param dhm_G Diffie-Hellman-Merkle generator in big-endian binary form
+ * \param G_len Length of DHM generator
+ *
+ * \return 0 if successful
+ */
+int mbedtls_ssl_conf_dh_param_bin( mbedtls_ssl_config *conf,
+ const unsigned char *dhm_P, size_t P_len,
+ const unsigned char *dhm_G, size_t G_len );
+
+/**
+ * \brief Set the Diffie-Hellman public P and G values,
+ * read from existing context (server-side only)
+ *
+ * \param conf SSL configuration
+ * \param dhm_ctx Diffie-Hellman-Merkle context
+ *
+ * \return 0 if successful
+ */
+int mbedtls_ssl_conf_dh_param_ctx( mbedtls_ssl_config *conf, mbedtls_dhm_context *dhm_ctx );
+#endif /* MBEDTLS_DHM_C && defined(MBEDTLS_SSL_SRV_C) */
+
+#if defined(MBEDTLS_DHM_C) && defined(MBEDTLS_SSL_CLI_C)
+/**
+ * \brief Set the minimum length for Diffie-Hellman parameters.
+ * (Client-side only.)
+ * (Default: 1024 bits.)
+ *
+ * \param conf SSL configuration
+ * \param bitlen Minimum bit length of the DHM prime
+ */
+void mbedtls_ssl_conf_dhm_min_bitlen( mbedtls_ssl_config *conf,
+ unsigned int bitlen );
+#endif /* MBEDTLS_DHM_C && MBEDTLS_SSL_CLI_C */
+
+#if defined(MBEDTLS_ECP_C)
+/**
+ * \brief Set the allowed curves in order of preference.
+ * (Default: all defined curves.)
+ *
+ * On server: this only affects selection of the ECDHE curve;
+ * the curves used for ECDH and ECDSA are determined by the
+ * list of available certificates instead.
+ *
+ * On client: this affects the list of curves offered for any
+ * use. The server can override our preference order.
+ *
+ * Both sides: limits the set of curves accepted for use in
+ * ECDHE and in the peer's end-entity certificate.
+ *
+ * \note This has no influence on which curves are allowed inside the
+ * certificate chains, see \c mbedtls_ssl_conf_cert_profile()
+ * for that. For the end-entity certificate however, the key
+ * will be accepted only if it is allowed both by this list
+ * and by the cert profile.
+ *
+ * \note This list should be ordered by decreasing preference
+ * (preferred curve first).
+ *
+ * \param conf SSL configuration
+ * \param curves Ordered list of allowed curves,
+ * terminated by MBEDTLS_ECP_DP_NONE.
+ */
+void mbedtls_ssl_conf_curves( mbedtls_ssl_config *conf,
+ const mbedtls_ecp_group_id *curves );
+#endif /* MBEDTLS_ECP_C */
+
+#if defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
+/**
+ * \brief Set the allowed hashes for signatures during the handshake.
+ * (Default: all available hashes except MD5.)
+ *
+ * \note This only affects which hashes are offered and can be used
+ * for signatures during the handshake. Hashes for message
+ * authentication and the TLS PRF are controlled by the
+ * ciphersuite, see \c mbedtls_ssl_conf_ciphersuites(). Hashes
+ * used for certificate signature are controlled by the
+ * verification profile, see \c mbedtls_ssl_conf_cert_profile().
+ *
+ * \note This list should be ordered by decreasing preference
+ * (preferred hash first).
+ *
+ * \param conf SSL configuration
+ * \param hashes Ordered list of allowed signature hashes,
+ * terminated by \c MBEDTLS_MD_NONE.
+ */
+void mbedtls_ssl_conf_sig_hashes( mbedtls_ssl_config *conf,
+ const int *hashes );
+#endif /* MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED */
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+/**
+ * \brief Set or reset the hostname to check against the received
+ * server certificate. It sets the ServerName TLS extension,
+ * too, if that extension is enabled. (client-side only)
+ *
+ * \param ssl SSL context
+ * \param hostname the server hostname, may be NULL to clear hostname
+
+ * \note Maximum hostname length MBEDTLS_SSL_MAX_HOST_NAME_LEN.
+ *
+ * \return 0 if successful, MBEDTLS_ERR_SSL_ALLOC_FAILED on
+ * allocation failure, MBEDTLS_ERR_SSL_BAD_INPUT_DATA on
+ * too long input hostname.
+ *
+ * Hostname set to the one provided on success (cleared
+ * when NULL). On allocation failure hostname is cleared.
+ * On too long input failure, old hostname is unchanged.
+ */
+int mbedtls_ssl_set_hostname( mbedtls_ssl_context *ssl, const char *hostname );
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+
+#if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION)
+/**
+ * \brief Set own certificate and key for the current handshake
+ *
+ * \note Same as \c mbedtls_ssl_conf_own_cert() but for use within
+ * the SNI callback.
+ *
+ * \param ssl SSL context
+ * \param own_cert own public certificate chain
+ * \param pk_key own private key
+ *
+ * \return 0 on success or MBEDTLS_ERR_SSL_ALLOC_FAILED
+ */
+int mbedtls_ssl_set_hs_own_cert( mbedtls_ssl_context *ssl,
+ mbedtls_x509_crt *own_cert,
+ mbedtls_pk_context *pk_key );
+
+/**
+ * \brief Set the data required to verify peer certificate for the
+ * current handshake
+ *
+ * \note Same as \c mbedtls_ssl_conf_ca_chain() but for use within
+ * the SNI callback.
+ *
+ * \param ssl SSL context
+ * \param ca_chain trusted CA chain (meaning all fully trusted top-level CAs)
+ * \param ca_crl trusted CA CRLs
+ */
+void mbedtls_ssl_set_hs_ca_chain( mbedtls_ssl_context *ssl,
+ mbedtls_x509_crt *ca_chain,
+ mbedtls_x509_crl *ca_crl );
+
+/**
+ * \brief Set authmode for the current handshake.
+ *
+ * \note Same as \c mbedtls_ssl_conf_authmode() but for use within
+ * the SNI callback.
+ *
+ * \param ssl SSL context
+ * \param authmode MBEDTLS_SSL_VERIFY_NONE, MBEDTLS_SSL_VERIFY_OPTIONAL or
+ * MBEDTLS_SSL_VERIFY_REQUIRED
+ */
+void mbedtls_ssl_set_hs_authmode( mbedtls_ssl_context *ssl,
+ int authmode );
+
+/**
+ * \brief Set server side ServerName TLS extension callback
+ * (optional, server-side only).
+ *
+ * If set, the ServerName callback is called whenever the
+ * server receives a ServerName TLS extension from the client
+ * during a handshake. The ServerName callback has the
+ * following parameters: (void *parameter, mbedtls_ssl_context *ssl,
+ * const unsigned char *hostname, size_t len). If a suitable
+ * certificate is found, the callback must set the
+ * certificate(s) and key(s) to use with \c
+ * mbedtls_ssl_set_hs_own_cert() (can be called repeatedly),
+ * and may optionally adjust the CA and associated CRL with \c
+ * mbedtls_ssl_set_hs_ca_chain() as well as the client
+ * authentication mode with \c mbedtls_ssl_set_hs_authmode(),
+ * then must return 0. If no matching name is found, the
+ * callback must either set a default cert, or
+ * return non-zero to abort the handshake at this point.
+ *
+ * \param conf SSL configuration
+ * \param f_sni verification function
+ * \param p_sni verification parameter
+ */
+void mbedtls_ssl_conf_sni( mbedtls_ssl_config *conf,
+ int (*f_sni)(void *, mbedtls_ssl_context *, const unsigned char *,
+ size_t),
+ void *p_sni );
+#endif /* MBEDTLS_SSL_SERVER_NAME_INDICATION */
+
+#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED)
+/**
+ * \brief Set the EC J-PAKE password for current handshake.
+ *
+ * \note An internal copy is made, and destroyed as soon as the
+ * handshake is completed, or when the SSL context is reset or
+ * freed.
+ *
+ * \note The SSL context needs to be already set up. The right place
+ * to call this function is between \c mbedtls_ssl_setup() or
+ * \c mbedtls_ssl_reset() and \c mbedtls_ssl_handshake().
+ *
+ * \param ssl SSL context
+ * \param pw EC J-PAKE password (pre-shared secret)
+ * \param pw_len length of pw in bytes
+ *
+ * \return 0 on success, or a negative error code.
+ */
+int mbedtls_ssl_set_hs_ecjpake_password( mbedtls_ssl_context *ssl,
+ const unsigned char *pw,
+ size_t pw_len );
+#endif /*MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED */
+
+#if defined(MBEDTLS_SSL_ALPN)
+/**
+ * \brief Set the supported Application Layer Protocols.
+ *
+ * \param conf SSL configuration
+ * \param protos Pointer to a NULL-terminated list of supported protocols,
+ * in decreasing preference order. The pointer to the list is
+ * recorded by the library for later reference as required, so
+ * the lifetime of the table must be atleast as long as the
+ * lifetime of the SSL configuration structure.
+ *
+ * \return 0 on success, or MBEDTLS_ERR_SSL_BAD_INPUT_DATA.
+ */
+int mbedtls_ssl_conf_alpn_protocols( mbedtls_ssl_config *conf, const char **protos );
+
+/**
+ * \brief Get the name of the negotiated Application Layer Protocol.
+ * This function should be called after the handshake is
+ * completed.
+ *
+ * \param ssl SSL context
+ *
+ * \return Protcol name, or NULL if no protocol was negotiated.
+ */
+const char *mbedtls_ssl_get_alpn_protocol( const mbedtls_ssl_context *ssl );
+#endif /* MBEDTLS_SSL_ALPN */
+
+/**
+ * \brief Set the maximum supported version sent from the client side
+ * and/or accepted at the server side
+ * (Default: MBEDTLS_SSL_MAX_MAJOR_VERSION, MBEDTLS_SSL_MAX_MINOR_VERSION)
+ *
+ * \note This ignores ciphersuites from higher versions.
+ *
+ * \note With DTLS, use MBEDTLS_SSL_MINOR_VERSION_2 for DTLS 1.0 and
+ * MBEDTLS_SSL_MINOR_VERSION_3 for DTLS 1.2
+ *
+ * \param conf SSL configuration
+ * \param major Major version number (only MBEDTLS_SSL_MAJOR_VERSION_3 supported)
+ * \param minor Minor version number (MBEDTLS_SSL_MINOR_VERSION_0,
+ * MBEDTLS_SSL_MINOR_VERSION_1 and MBEDTLS_SSL_MINOR_VERSION_2,
+ * MBEDTLS_SSL_MINOR_VERSION_3 supported)
+ */
+void mbedtls_ssl_conf_max_version( mbedtls_ssl_config *conf, int major, int minor );
+
+/**
+ * \brief Set the minimum accepted SSL/TLS protocol version
+ * (Default: TLS 1.0)
+ *
+ * \note Input outside of the SSL_MAX_XXXXX_VERSION and
+ * SSL_MIN_XXXXX_VERSION range is ignored.
+ *
+ * \note MBEDTLS_SSL_MINOR_VERSION_0 (SSL v3) should be avoided.
+ *
+ * \note With DTLS, use MBEDTLS_SSL_MINOR_VERSION_2 for DTLS 1.0 and
+ * MBEDTLS_SSL_MINOR_VERSION_3 for DTLS 1.2
+ *
+ * \param conf SSL configuration
+ * \param major Major version number (only MBEDTLS_SSL_MAJOR_VERSION_3 supported)
+ * \param minor Minor version number (MBEDTLS_SSL_MINOR_VERSION_0,
+ * MBEDTLS_SSL_MINOR_VERSION_1 and MBEDTLS_SSL_MINOR_VERSION_2,
+ * MBEDTLS_SSL_MINOR_VERSION_3 supported)
+ */
+void mbedtls_ssl_conf_min_version( mbedtls_ssl_config *conf, int major, int minor );
+
+#if defined(MBEDTLS_SSL_FALLBACK_SCSV) && defined(MBEDTLS_SSL_CLI_C)
+/**
+ * \brief Set the fallback flag (client-side only).
+ * (Default: MBEDTLS_SSL_IS_NOT_FALLBACK).
+ *
+ * \note Set to MBEDTLS_SSL_IS_FALLBACK when preparing a fallback
+ * connection, that is a connection with max_version set to a
+ * lower value than the value you're willing to use. Such
+ * fallback connections are not recommended but are sometimes
+ * necessary to interoperate with buggy (version-intolerant)
+ * servers.
+ *
+ * \warning You should NOT set this to MBEDTLS_SSL_IS_FALLBACK for
+ * non-fallback connections! This would appear to work for a
+ * while, then cause failures when the server is upgraded to
+ * support a newer TLS version.
+ *
+ * \param conf SSL configuration
+ * \param fallback MBEDTLS_SSL_IS_NOT_FALLBACK or MBEDTLS_SSL_IS_FALLBACK
+ */
+void mbedtls_ssl_conf_fallback( mbedtls_ssl_config *conf, char fallback );
+#endif /* MBEDTLS_SSL_FALLBACK_SCSV && MBEDTLS_SSL_CLI_C */
+
+#if defined(MBEDTLS_SSL_ENCRYPT_THEN_MAC)
+/**
+ * \brief Enable or disable Encrypt-then-MAC
+ * (Default: MBEDTLS_SSL_ETM_ENABLED)
+ *
+ * \note This should always be enabled, it is a security
+ * improvement, and should not cause any interoperability
+ * issue (used only if the peer supports it too).
+ *
+ * \param conf SSL configuration
+ * \param etm MBEDTLS_SSL_ETM_ENABLED or MBEDTLS_SSL_ETM_DISABLED
+ */
+void mbedtls_ssl_conf_encrypt_then_mac( mbedtls_ssl_config *conf, char etm );
+#endif /* MBEDTLS_SSL_ENCRYPT_THEN_MAC */
+
+#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET)
+/**
+ * \brief Enable or disable Extended Master Secret negotiation.
+ * (Default: MBEDTLS_SSL_EXTENDED_MS_ENABLED)
+ *
+ * \note This should always be enabled, it is a security fix to the
+ * protocol, and should not cause any interoperability issue
+ * (used only if the peer supports it too).
+ *
+ * \param conf SSL configuration
+ * \param ems MBEDTLS_SSL_EXTENDED_MS_ENABLED or MBEDTLS_SSL_EXTENDED_MS_DISABLED
+ */
+void mbedtls_ssl_conf_extended_master_secret( mbedtls_ssl_config *conf, char ems );
+#endif /* MBEDTLS_SSL_EXTENDED_MASTER_SECRET */
+
+#if defined(MBEDTLS_ARC4_C)
+/**
+ * \brief Disable or enable support for RC4
+ * (Default: MBEDTLS_SSL_ARC4_DISABLED)
+ *
+ * \warning Use of RC4 in DTLS/TLS has been prohibited by RFC 7465
+ * for security reasons. Use at your own risk.
+ *
+ * \note This function is deprecated and will likely be removed in
+ * a future version of the library.
+ * RC4 is disabled by default at compile time and needs to be
+ * actively enabled for use with legacy systems.
+ *
+ * \param conf SSL configuration
+ * \param arc4 MBEDTLS_SSL_ARC4_ENABLED or MBEDTLS_SSL_ARC4_DISABLED
+ */
+void mbedtls_ssl_conf_arc4_support( mbedtls_ssl_config *conf, char arc4 );
+#endif /* MBEDTLS_ARC4_C */
+
+#if defined(MBEDTLS_SSL_SRV_C)
+/**
+ * \brief Whether to send a list of acceptable CAs in
+ * CertificateRequest messages.
+ * (Default: do send)
+ *
+ * \param conf SSL configuration
+ * \param cert_req_ca_list MBEDTLS_SSL_CERT_REQ_CA_LIST_ENABLED or
+ * MBEDTLS_SSL_CERT_REQ_CA_LIST_DISABLED
+ */
+void mbedtls_ssl_conf_cert_req_ca_list( mbedtls_ssl_config *conf,
+ char cert_req_ca_list );
+#endif /* MBEDTLS_SSL_SRV_C */
+
+#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH)
+/**
+ * \brief Set the maximum fragment length to emit and/or negotiate.
+ * (Typical: the smaller of #MBEDTLS_SSL_IN_CONTENT_LEN and
+ * #MBEDTLS_SSL_OUT_CONTENT_LEN, usually `2^14` bytes)
+ * (Server: set maximum fragment length to emit,
+ * usually negotiated by the client during handshake)
+ * (Client: set maximum fragment length to emit *and*
+ * negotiate with the server during handshake)
+ * (Default: #MBEDTLS_SSL_MAX_FRAG_LEN_NONE)
+ *
+ * \note On the client side, the maximum fragment length extension
+ * *will not* be used, unless the maximum fragment length has
+ * been set via this function to a value different than
+ * #MBEDTLS_SSL_MAX_FRAG_LEN_NONE.
+ *
+ * \note This sets the maximum length for a record's payload,
+ * excluding record overhead that will be added to it, see
+ * \c mbedtls_ssl_get_record_expansion().
+ *
+ * \note With TLS, this currently only affects ApplicationData (sent
+ * with \c mbedtls_ssl_read()), not handshake messages.
+ * With DTLS, this affects both ApplicationData and handshake.
+ *
+ * \note For DTLS, it is also possible to set a limit for the total
+ * size of daragrams passed to the transport layer, including
+ * record overhead, see \c mbedtls_ssl_set_mtu().
+ *
+ * \param conf SSL configuration
+ * \param mfl_code Code for maximum fragment length (allowed values:
+ * MBEDTLS_SSL_MAX_FRAG_LEN_512, MBEDTLS_SSL_MAX_FRAG_LEN_1024,
+ * MBEDTLS_SSL_MAX_FRAG_LEN_2048, MBEDTLS_SSL_MAX_FRAG_LEN_4096)
+ *
+ * \return 0 if successful or MBEDTLS_ERR_SSL_BAD_INPUT_DATA
+ */
+int mbedtls_ssl_conf_max_frag_len( mbedtls_ssl_config *conf, unsigned char mfl_code );
+#endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */
+
+#if defined(MBEDTLS_SSL_TRUNCATED_HMAC)
+/**
+ * \brief Activate negotiation of truncated HMAC
+ * (Default: MBEDTLS_SSL_TRUNC_HMAC_DISABLED)
+ *
+ * \param conf SSL configuration
+ * \param truncate Enable or disable (MBEDTLS_SSL_TRUNC_HMAC_ENABLED or
+ * MBEDTLS_SSL_TRUNC_HMAC_DISABLED)
+ */
+void mbedtls_ssl_conf_truncated_hmac( mbedtls_ssl_config *conf, int truncate );
+#endif /* MBEDTLS_SSL_TRUNCATED_HMAC */
+
+#if defined(MBEDTLS_SSL_CBC_RECORD_SPLITTING)
+/**
+ * \brief Enable / Disable 1/n-1 record splitting
+ * (Default: MBEDTLS_SSL_CBC_RECORD_SPLITTING_ENABLED)
+ *
+ * \note Only affects SSLv3 and TLS 1.0, not higher versions.
+ * Does not affect non-CBC ciphersuites in any version.
+ *
+ * \param conf SSL configuration
+ * \param split MBEDTLS_SSL_CBC_RECORD_SPLITTING_ENABLED or
+ * MBEDTLS_SSL_CBC_RECORD_SPLITTING_DISABLED
+ */
+void mbedtls_ssl_conf_cbc_record_splitting( mbedtls_ssl_config *conf, char split );
+#endif /* MBEDTLS_SSL_CBC_RECORD_SPLITTING */
+
+#if defined(MBEDTLS_SSL_SESSION_TICKETS) && defined(MBEDTLS_SSL_CLI_C)
+/**
+ * \brief Enable / Disable session tickets (client only).
+ * (Default: MBEDTLS_SSL_SESSION_TICKETS_ENABLED.)
+ *
+ * \note On server, use \c mbedtls_ssl_conf_session_tickets_cb().
+ *
+ * \param conf SSL configuration
+ * \param use_tickets Enable or disable (MBEDTLS_SSL_SESSION_TICKETS_ENABLED or
+ * MBEDTLS_SSL_SESSION_TICKETS_DISABLED)
+ */
+void mbedtls_ssl_conf_session_tickets( mbedtls_ssl_config *conf, int use_tickets );
+#endif /* MBEDTLS_SSL_SESSION_TICKETS && MBEDTLS_SSL_CLI_C */
+
+#if defined(MBEDTLS_SSL_RENEGOTIATION)
+/**
+ * \brief Enable / Disable renegotiation support for connection when
+ * initiated by peer
+ * (Default: MBEDTLS_SSL_RENEGOTIATION_DISABLED)
+ *
+ * \warning It is recommended to always disable renegotation unless you
+ * know you need it and you know what you're doing. In the
+ * past, there have been several issues associated with
+ * renegotiation or a poor understanding of its properties.
+ *
+ * \note Server-side, enabling renegotiation also makes the server
+ * susceptible to a resource DoS by a malicious client.
+ *
+ * \param conf SSL configuration
+ * \param renegotiation Enable or disable (MBEDTLS_SSL_RENEGOTIATION_ENABLED or
+ * MBEDTLS_SSL_RENEGOTIATION_DISABLED)
+ */
+void mbedtls_ssl_conf_renegotiation( mbedtls_ssl_config *conf, int renegotiation );
+#endif /* MBEDTLS_SSL_RENEGOTIATION */
+
+/**
+ * \brief Prevent or allow legacy renegotiation.
+ * (Default: MBEDTLS_SSL_LEGACY_NO_RENEGOTIATION)
+ *
+ * MBEDTLS_SSL_LEGACY_NO_RENEGOTIATION allows connections to
+ * be established even if the peer does not support
+ * secure renegotiation, but does not allow renegotiation
+ * to take place if not secure.
+ * (Interoperable and secure option)
+ *
+ * MBEDTLS_SSL_LEGACY_ALLOW_RENEGOTIATION allows renegotiations
+ * with non-upgraded peers. Allowing legacy renegotiation
+ * makes the connection vulnerable to specific man in the
+ * middle attacks. (See RFC 5746)
+ * (Most interoperable and least secure option)
+ *
+ * MBEDTLS_SSL_LEGACY_BREAK_HANDSHAKE breaks off connections
+ * if peer does not support secure renegotiation. Results
+ * in interoperability issues with non-upgraded peers
+ * that do not support renegotiation altogether.
+ * (Most secure option, interoperability issues)
+ *
+ * \param conf SSL configuration
+ * \param allow_legacy Prevent or allow (SSL_NO_LEGACY_RENEGOTIATION,
+ * SSL_ALLOW_LEGACY_RENEGOTIATION or
+ * MBEDTLS_SSL_LEGACY_BREAK_HANDSHAKE)
+ */
+void mbedtls_ssl_conf_legacy_renegotiation( mbedtls_ssl_config *conf, int allow_legacy );
+
+#if defined(MBEDTLS_SSL_RENEGOTIATION)
+/**
+ * \brief Enforce renegotiation requests.
+ * (Default: enforced, max_records = 16)
+ *
+ * When we request a renegotiation, the peer can comply or
+ * ignore the request. This function allows us to decide
+ * whether to enforce our renegotiation requests by closing
+ * the connection if the peer doesn't comply.
+ *
+ * However, records could already be in transit from the peer
+ * when the request is emitted. In order to increase
+ * reliability, we can accept a number of records before the
+ * expected handshake records.
+ *
+ * The optimal value is highly dependent on the specific usage
+ * scenario.
+ *
+ * \note With DTLS and server-initiated renegotiation, the
+ * HelloRequest is retransmited every time mbedtls_ssl_read() times
+ * out or receives Application Data, until:
+ * - max_records records have beens seen, if it is >= 0, or
+ * - the number of retransmits that would happen during an
+ * actual handshake has been reached.
+ * Please remember the request might be lost a few times
+ * if you consider setting max_records to a really low value.
+ *
+ * \warning On client, the grace period can only happen during
+ * mbedtls_ssl_read(), as opposed to mbedtls_ssl_write() and mbedtls_ssl_renegotiate()
+ * which always behave as if max_record was 0. The reason is,
+ * if we receive application data from the server, we need a
+ * place to write it, which only happens during mbedtls_ssl_read().
+ *
+ * \param conf SSL configuration
+ * \param max_records Use MBEDTLS_SSL_RENEGOTIATION_NOT_ENFORCED if you don't want to
+ * enforce renegotiation, or a non-negative value to enforce
+ * it but allow for a grace period of max_records records.
+ */
+void mbedtls_ssl_conf_renegotiation_enforced( mbedtls_ssl_config *conf, int max_records );
+
+/**
+ * \brief Set record counter threshold for periodic renegotiation.
+ * (Default: 2^48 - 1)
+ *
+ * Renegotiation is automatically triggered when a record
+ * counter (outgoing or ingoing) crosses the defined
+ * threshold. The default value is meant to prevent the
+ * connection from being closed when the counter is about to
+ * reached its maximal value (it is not allowed to wrap).
+ *
+ * Lower values can be used to enforce policies such as "keys
+ * must be refreshed every N packets with cipher X".
+ *
+ * The renegotiation period can be disabled by setting
+ * conf->disable_renegotiation to
+ * MBEDTLS_SSL_RENEGOTIATION_DISABLED.
+ *
+ * \note When the configured transport is
+ * MBEDTLS_SSL_TRANSPORT_DATAGRAM the maximum renegotiation
+ * period is 2^48 - 1, and for MBEDTLS_SSL_TRANSPORT_STREAM,
+ * the maximum renegotiation period is 2^64 - 1.
+ *
+ * \param conf SSL configuration
+ * \param period The threshold value: a big-endian 64-bit number.
+ */
+void mbedtls_ssl_conf_renegotiation_period( mbedtls_ssl_config *conf,
+ const unsigned char period[8] );
+#endif /* MBEDTLS_SSL_RENEGOTIATION */
+
+/**
+ * \brief Check if there is data already read from the
+ * underlying transport but not yet processed.
+ *
+ * \param ssl SSL context
+ *
+ * \return 0 if nothing's pending, 1 otherwise.
+ *
+ * \note This is different in purpose and behaviour from
+ * \c mbedtls_ssl_get_bytes_avail in that it considers
+ * any kind of unprocessed data, not only unread
+ * application data. If \c mbedtls_ssl_get_bytes
+ * returns a non-zero value, this function will
+ * also signal pending data, but the converse does
+ * not hold. For example, in DTLS there might be
+ * further records waiting to be processed from
+ * the current underlying transport's datagram.
+ *
+ * \note If this function returns 1 (data pending), this
+ * does not imply that a subsequent call to
+ * \c mbedtls_ssl_read will provide any data;
+ * e.g., the unprocessed data might turn out
+ * to be an alert or a handshake message.
+ *
+ * \note This function is useful in the following situation:
+ * If the SSL/TLS module successfully returns from an
+ * operation - e.g. a handshake or an application record
+ * read - and you're awaiting incoming data next, you
+ * must not immediately idle on the underlying transport
+ * to have data ready, but you need to check the value
+ * of this function first. The reason is that the desired
+ * data might already be read but not yet processed.
+ * If, in contrast, a previous call to the SSL/TLS module
+ * returned MBEDTLS_ERR_SSL_WANT_READ, it is not necessary
+ * to call this function, as the latter error code entails
+ * that all internal data has been processed.
+ *
+ */
+int mbedtls_ssl_check_pending( const mbedtls_ssl_context *ssl );
+
+/**
+ * \brief Return the number of application data bytes
+ * remaining to be read from the current record.
+ *
+ * \param ssl SSL context
+ *
+ * \return How many bytes are available in the application
+ * data record read buffer.
+ *
+ * \note When working over a datagram transport, this is
+ * useful to detect the current datagram's boundary
+ * in case \c mbedtls_ssl_read has written the maximal
+ * amount of data fitting into the input buffer.
+ *
+ */
+size_t mbedtls_ssl_get_bytes_avail( const mbedtls_ssl_context *ssl );
+
+/**
+ * \brief Return the result of the certificate verification
+ *
+ * \param ssl The SSL context to use.
+ *
+ * \return \c 0 if the certificate verification was successful.
+ * \return \c -1u if the result is not available. This may happen
+ * e.g. if the handshake aborts early, or a verification
+ * callback returned a fatal error.
+ * \return A bitwise combination of \c MBEDTLS_X509_BADCERT_XXX
+ * and \c MBEDTLS_X509_BADCRL_XXX failure flags; see x509.h.
+ */
+uint32_t mbedtls_ssl_get_verify_result( const mbedtls_ssl_context *ssl );
+
+/**
+ * \brief Return the name of the current ciphersuite
+ *
+ * \param ssl SSL context
+ *
+ * \return a string containing the ciphersuite name
+ */
+const char *mbedtls_ssl_get_ciphersuite( const mbedtls_ssl_context *ssl );
+
+/**
+ * \brief Return the current SSL version (SSLv3/TLSv1/etc)
+ *
+ * \param ssl SSL context
+ *
+ * \return a string containing the SSL version
+ */
+const char *mbedtls_ssl_get_version( const mbedtls_ssl_context *ssl );
+
+/**
+ * \brief Return the (maximum) number of bytes added by the record
+ * layer: header + encryption/MAC overhead (inc. padding)
+ *
+ * \note This function is not available (always returns an error)
+ * when record compression is enabled.
+ *
+ * \param ssl SSL context
+ *
+ * \return Current maximum record expansion in bytes, or
+ * MBEDTLS_ERR_SSL_FEATURE_UNAVAILABLE if compression is
+ * enabled, which makes expansion much less predictable
+ */
+int mbedtls_ssl_get_record_expansion( const mbedtls_ssl_context *ssl );
+
+#if defined(MBEDTLS_SSL_MAX_FRAGMENT_LENGTH)
+/**
+ * \brief Return the maximum fragment length (payload, in bytes).
+ * This is the value negotiated with peer if any,
+ * or the locally configured value.
+ *
+ * \sa mbedtls_ssl_conf_max_frag_len()
+ * \sa mbedtls_ssl_get_max_record_payload()
+ *
+ * \param ssl SSL context
+ *
+ * \return Current maximum fragment length.
+ */
+size_t mbedtls_ssl_get_max_frag_len( const mbedtls_ssl_context *ssl );
+#endif /* MBEDTLS_SSL_MAX_FRAGMENT_LENGTH */
+
+/**
+ * \brief Return the current maximum outgoing record payload in bytes.
+ * This takes into account the config.h setting \c
+ * MBEDTLS_SSL_OUT_CONTENT_LEN, the configured and negotiated
+ * max fragment length extension if used, and for DTLS the
+ * path MTU as configured and current record expansion.
+ *
+ * \note With DTLS, \c mbedtls_ssl_write() will return an error if
+ * called with a larger length value.
+ * With TLS, \c mbedtls_ssl_write() will fragment the input if
+ * necessary and return the number of bytes written; it is up
+ * to the caller to call \c mbedtls_ssl_write() again in
+ * order to send the remaining bytes if any.
+ *
+ * \note This function is not available (always returns an error)
+ * when record compression is enabled.
+ *
+ * \sa mbedtls_ssl_set_mtu()
+ * \sa mbedtls_ssl_get_max_frag_len()
+ * \sa mbedtls_ssl_get_record_expansion()
+ *
+ * \param ssl SSL context
+ *
+ * \return Current maximum payload for an outgoing record,
+ * or a negative error code.
+ */
+int mbedtls_ssl_get_max_out_record_payload( const mbedtls_ssl_context *ssl );
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+/**
+ * \brief Return the peer certificate from the current connection
+ *
+ * Note: Can be NULL in case no certificate was sent during
+ * the handshake. Different calls for the same connection can
+ * return the same or different pointers for the same
+ * certificate and even a different certificate altogether.
+ * The peer cert CAN change in a single connection if
+ * renegotiation is performed.
+ *
+ * \param ssl SSL context
+ *
+ * \return the current peer certificate
+ */
+const mbedtls_x509_crt *mbedtls_ssl_get_peer_cert( const mbedtls_ssl_context *ssl );
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+
+#if defined(MBEDTLS_SSL_CLI_C)
+/**
+ * \brief Save session in order to resume it later (client-side only)
+ * Session data is copied to presented session structure.
+ *
+ *
+ * \param ssl SSL context
+ * \param session session context
+ *
+ * \return 0 if successful,
+ * MBEDTLS_ERR_SSL_ALLOC_FAILED if memory allocation failed,
+ * MBEDTLS_ERR_SSL_BAD_INPUT_DATA if used server-side or
+ * arguments are otherwise invalid.
+ *
+ * \note Only the server certificate is copied, and not the full chain,
+ * so you should not attempt to validate the certificate again
+ * by calling \c mbedtls_x509_crt_verify() on it.
+ * Instead, you should use the results from the verification
+ * in the original handshake by calling \c mbedtls_ssl_get_verify_result()
+ * after loading the session again into a new SSL context
+ * using \c mbedtls_ssl_set_session().
+ *
+ * \note Once the session object is not needed anymore, you should
+ * free it by calling \c mbedtls_ssl_session_free().
+ *
+ * \sa mbedtls_ssl_set_session()
+ */
+int mbedtls_ssl_get_session( const mbedtls_ssl_context *ssl, mbedtls_ssl_session *session );
+#endif /* MBEDTLS_SSL_CLI_C */
+
+/**
+ * \brief Perform the SSL handshake
+ *
+ * \param ssl SSL context
+ *
+ * \return \c 0 if successful.
+ * \return #MBEDTLS_ERR_SSL_WANT_READ or #MBEDTLS_ERR_SSL_WANT_WRITE
+ * if the handshake is incomplete and waiting for data to
+ * be available for reading from or writing to the underlying
+ * transport - in this case you must call this function again
+ * when the underlying transport is ready for the operation.
+ * \return #MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS if an asynchronous
+ * operation is in progress (see
+ * mbedtls_ssl_conf_async_private_cb()) - in this case you
+ * must call this function again when the operation is ready.
+ * \return #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS if a cryptographic
+ * operation is in progress (see mbedtls_ecp_set_max_ops()) -
+ * in this case you must call this function again to complete
+ * the handshake when you're done attending other tasks.
+ * \return #MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED if DTLS is in use
+ * and the client did not demonstrate reachability yet - in
+ * this case you must stop using the context (see below).
+ * \return Another SSL error code - in this case you must stop using
+ * the context (see below).
+ *
+ * \warning If this function returns something other than
+ * \c 0,
+ * #MBEDTLS_ERR_SSL_WANT_READ,
+ * #MBEDTLS_ERR_SSL_WANT_WRITE,
+ * #MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS or
+ * #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS,
+ * you must stop using the SSL context for reading or writing,
+ * and either free it or call \c mbedtls_ssl_session_reset()
+ * on it before re-using it for a new connection; the current
+ * connection must be closed.
+ *
+ * \note If DTLS is in use, then you may choose to handle
+ * #MBEDTLS_ERR_SSL_HELLO_VERIFY_REQUIRED specially for logging
+ * purposes, as it is an expected return value rather than an
+ * actual error, but you still need to reset/free the context.
+ *
+ * \note Remarks regarding event-driven DTLS:
+ * If the function returns #MBEDTLS_ERR_SSL_WANT_READ, no datagram
+ * from the underlying transport layer is currently being processed,
+ * and it is safe to idle until the timer or the underlying transport
+ * signal a new event. This is not true for a successful handshake,
+ * in which case the datagram of the underlying transport that is
+ * currently being processed might or might not contain further
+ * DTLS records.
+ */
+int mbedtls_ssl_handshake( mbedtls_ssl_context *ssl );
+
+/**
+ * \brief Perform a single step of the SSL handshake
+ *
+ * \note The state of the context (ssl->state) will be at
+ * the next state after this function returns \c 0. Do not
+ * call this function if state is MBEDTLS_SSL_HANDSHAKE_OVER.
+ *
+ * \param ssl SSL context
+ *
+ * \return See mbedtls_ssl_handshake().
+ *
+ * \warning If this function returns something other than \c 0,
+ * #MBEDTLS_ERR_SSL_WANT_READ, #MBEDTLS_ERR_SSL_WANT_WRITE,
+ * #MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS or
+ * #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS, you must stop using
+ * the SSL context for reading or writing, and either free it
+ * or call \c mbedtls_ssl_session_reset() on it before
+ * re-using it for a new connection; the current connection
+ * must be closed.
+ */
+int mbedtls_ssl_handshake_step( mbedtls_ssl_context *ssl );
+
+#if defined(MBEDTLS_SSL_RENEGOTIATION)
+/**
+ * \brief Initiate an SSL renegotiation on the running connection.
+ * Client: perform the renegotiation right now.
+ * Server: request renegotiation, which will be performed
+ * during the next call to mbedtls_ssl_read() if honored by
+ * client.
+ *
+ * \param ssl SSL context
+ *
+ * \return 0 if successful, or any mbedtls_ssl_handshake() return
+ * value except #MBEDTLS_ERR_SSL_CLIENT_RECONNECT that can't
+ * happen during a renegotiation.
+ *
+ * \warning If this function returns something other than \c 0,
+ * #MBEDTLS_ERR_SSL_WANT_READ, #MBEDTLS_ERR_SSL_WANT_WRITE,
+ * #MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS or
+ * #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS, you must stop using
+ * the SSL context for reading or writing, and either free it
+ * or call \c mbedtls_ssl_session_reset() on it before
+ * re-using it for a new connection; the current connection
+ * must be closed.
+ *
+ */
+int mbedtls_ssl_renegotiate( mbedtls_ssl_context *ssl );
+#endif /* MBEDTLS_SSL_RENEGOTIATION */
+
+/**
+ * \brief Read at most 'len' application data bytes
+ *
+ * \param ssl SSL context
+ * \param buf buffer that will hold the data
+ * \param len maximum number of bytes to read
+ *
+ * \return The (positive) number of bytes read if successful.
+ * \return \c 0 if the read end of the underlying transport was closed
+ * - in this case you must stop using the context (see below).
+ * \return #MBEDTLS_ERR_SSL_WANT_READ or #MBEDTLS_ERR_SSL_WANT_WRITE
+ * if the handshake is incomplete and waiting for data to
+ * be available for reading from or writing to the underlying
+ * transport - in this case you must call this function again
+ * when the underlying transport is ready for the operation.
+ * \return #MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS if an asynchronous
+ * operation is in progress (see
+ * mbedtls_ssl_conf_async_private_cb()) - in this case you
+ * must call this function again when the operation is ready.
+ * \return #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS if a cryptographic
+ * operation is in progress (see mbedtls_ecp_set_max_ops()) -
+ * in this case you must call this function again to complete
+ * the handshake when you're done attending other tasks.
+ * \return #MBEDTLS_ERR_SSL_CLIENT_RECONNECT if we're at the server
+ * side of a DTLS connection and the client is initiating a
+ * new connection using the same source port. See below.
+ * \return Another SSL error code - in this case you must stop using
+ * the context (see below).
+ *
+ * \warning If this function returns something other than
+ * a positive value,
+ * #MBEDTLS_ERR_SSL_WANT_READ,
+ * #MBEDTLS_ERR_SSL_WANT_WRITE,
+ * #MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS,
+ * #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS or
+ * #MBEDTLS_ERR_SSL_CLIENT_RECONNECT,
+ * you must stop using the SSL context for reading or writing,
+ * and either free it or call \c mbedtls_ssl_session_reset()
+ * on it before re-using it for a new connection; the current
+ * connection must be closed.
+ *
+ * \note When this function returns #MBEDTLS_ERR_SSL_CLIENT_RECONNECT
+ * (which can only happen server-side), it means that a client
+ * is initiating a new connection using the same source port.
+ * You can either treat that as a connection close and wait
+ * for the client to resend a ClientHello, or directly
+ * continue with \c mbedtls_ssl_handshake() with the same
+ * context (as it has been reset internally). Either way, you
+ * must make sure this is seen by the application as a new
+ * connection: application state, if any, should be reset, and
+ * most importantly the identity of the client must be checked
+ * again. WARNING: not validating the identity of the client
+ * again, or not transmitting the new identity to the
+ * application layer, would allow authentication bypass!
+ *
+ * \note Remarks regarding event-driven DTLS:
+ * - If the function returns #MBEDTLS_ERR_SSL_WANT_READ, no datagram
+ * from the underlying transport layer is currently being processed,
+ * and it is safe to idle until the timer or the underlying transport
+ * signal a new event.
+ * - This function may return MBEDTLS_ERR_SSL_WANT_READ even if data was
+ * initially available on the underlying transport, as this data may have
+ * been only e.g. duplicated messages or a renegotiation request.
+ * Therefore, you must be prepared to receive MBEDTLS_ERR_SSL_WANT_READ even
+ * when reacting to an incoming-data event from the underlying transport.
+ * - On success, the datagram of the underlying transport that is currently
+ * being processed may contain further DTLS records. You should call
+ * \c mbedtls_ssl_check_pending to check for remaining records.
+ *
+ */
+int mbedtls_ssl_read( mbedtls_ssl_context *ssl, unsigned char *buf, size_t len );
+
+/**
+ * \brief Try to write exactly 'len' application data bytes
+ *
+ * \warning This function will do partial writes in some cases. If the
+ * return value is non-negative but less than length, the
+ * function must be called again with updated arguments:
+ * buf + ret, len - ret (if ret is the return value) until
+ * it returns a value equal to the last 'len' argument.
+ *
+ * \param ssl SSL context
+ * \param buf buffer holding the data
+ * \param len how many bytes must be written
+ *
+ * \return The (non-negative) number of bytes actually written if
+ * successful (may be less than \p len).
+ * \return #MBEDTLS_ERR_SSL_WANT_READ or #MBEDTLS_ERR_SSL_WANT_WRITE
+ * if the handshake is incomplete and waiting for data to
+ * be available for reading from or writing to the underlying
+ * transport - in this case you must call this function again
+ * when the underlying transport is ready for the operation.
+ * \return #MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS if an asynchronous
+ * operation is in progress (see
+ * mbedtls_ssl_conf_async_private_cb()) - in this case you
+ * must call this function again when the operation is ready.
+ * \return #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS if a cryptographic
+ * operation is in progress (see mbedtls_ecp_set_max_ops()) -
+ * in this case you must call this function again to complete
+ * the handshake when you're done attending other tasks.
+ * \return Another SSL error code - in this case you must stop using
+ * the context (see below).
+ *
+ * \warning If this function returns something other than
+ * a non-negative value,
+ * #MBEDTLS_ERR_SSL_WANT_READ,
+ * #MBEDTLS_ERR_SSL_WANT_WRITE,
+ * #MBEDTLS_ERR_SSL_ASYNC_IN_PROGRESS or
+ * #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS,
+ * you must stop using the SSL context for reading or writing,
+ * and either free it or call \c mbedtls_ssl_session_reset()
+ * on it before re-using it for a new connection; the current
+ * connection must be closed.
+ *
+ * \note When this function returns #MBEDTLS_ERR_SSL_WANT_WRITE/READ,
+ * it must be called later with the *same* arguments,
+ * until it returns a value greater that or equal to 0. When
+ * the function returns #MBEDTLS_ERR_SSL_WANT_WRITE there may be
+ * some partial data in the output buffer, however this is not
+ * yet sent.
+ *
+ * \note If the requested length is greater than the maximum
+ * fragment length (either the built-in limit or the one set
+ * or negotiated with the peer), then:
+ * - with TLS, less bytes than requested are written.
+ * - with DTLS, MBEDTLS_ERR_SSL_BAD_INPUT_DATA is returned.
+ * \c mbedtls_ssl_get_max_frag_len() may be used to query the
+ * active maximum fragment length.
+ *
+ * \note Attempting to write 0 bytes will result in an empty TLS
+ * application record being sent.
+ */
+int mbedtls_ssl_write( mbedtls_ssl_context *ssl, const unsigned char *buf, size_t len );
+
+/**
+ * \brief Send an alert message
+ *
+ * \param ssl SSL context
+ * \param level The alert level of the message
+ * (MBEDTLS_SSL_ALERT_LEVEL_WARNING or MBEDTLS_SSL_ALERT_LEVEL_FATAL)
+ * \param message The alert message (SSL_ALERT_MSG_*)
+ *
+ * \return 0 if successful, or a specific SSL error code.
+ *
+ * \note If this function returns something other than 0 or
+ * MBEDTLS_ERR_SSL_WANT_READ/WRITE, you must stop using
+ * the SSL context for reading or writing, and either free it or
+ * call \c mbedtls_ssl_session_reset() on it before re-using it
+ * for a new connection; the current connection must be closed.
+ */
+int mbedtls_ssl_send_alert_message( mbedtls_ssl_context *ssl,
+ unsigned char level,
+ unsigned char message );
+/**
+ * \brief Notify the peer that the connection is being closed
+ *
+ * \param ssl SSL context
+ *
+ * \return 0 if successful, or a specific SSL error code.
+ *
+ * \note If this function returns something other than 0 or
+ * MBEDTLS_ERR_SSL_WANT_READ/WRITE, you must stop using
+ * the SSL context for reading or writing, and either free it or
+ * call \c mbedtls_ssl_session_reset() on it before re-using it
+ * for a new connection; the current connection must be closed.
+ */
+int mbedtls_ssl_close_notify( mbedtls_ssl_context *ssl );
+
+/**
+ * \brief Free referenced items in an SSL context and clear memory
+ *
+ * \param ssl SSL context
+ */
+void mbedtls_ssl_free( mbedtls_ssl_context *ssl );
+
+/**
+ * \brief Initialize an SSL configuration context
+ * Just makes the context ready for
+ * mbedtls_ssl_config_defaults() or mbedtls_ssl_config_free().
+ *
+ * \note You need to call mbedtls_ssl_config_defaults() unless you
+ * manually set all of the relevent fields yourself.
+ *
+ * \param conf SSL configuration context
+ */
+void mbedtls_ssl_config_init( mbedtls_ssl_config *conf );
+
+/**
+ * \brief Load reasonnable default SSL configuration values.
+ * (You need to call mbedtls_ssl_config_init() first.)
+ *
+ * \param conf SSL configuration context
+ * \param endpoint MBEDTLS_SSL_IS_CLIENT or MBEDTLS_SSL_IS_SERVER
+ * \param transport MBEDTLS_SSL_TRANSPORT_STREAM for TLS, or
+ * MBEDTLS_SSL_TRANSPORT_DATAGRAM for DTLS
+ * \param preset a MBEDTLS_SSL_PRESET_XXX value
+ *
+ * \note See \c mbedtls_ssl_conf_transport() for notes on DTLS.
+ *
+ * \return 0 if successful, or
+ * MBEDTLS_ERR_XXX_ALLOC_FAILED on memory allocation error.
+ */
+int mbedtls_ssl_config_defaults( mbedtls_ssl_config *conf,
+ int endpoint, int transport, int preset );
+
+/**
+ * \brief Free an SSL configuration context
+ *
+ * \param conf SSL configuration context
+ */
+void mbedtls_ssl_config_free( mbedtls_ssl_config *conf );
+
+/**
+ * \brief Initialize SSL session structure
+ *
+ * \param session SSL session
+ */
+void mbedtls_ssl_session_init( mbedtls_ssl_session *session );
+
+/**
+ * \brief Free referenced items in an SSL session including the
+ * peer certificate and clear memory
+ *
+ * \note A session object can be freed even if the SSL context
+ * that was used to retrieve the session is still in use.
+ *
+ * \param session SSL session
+ */
+void mbedtls_ssl_session_free( mbedtls_ssl_session *session );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ssl.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ssl_cache.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ssl_cache.h
new file mode 100644
index 0000000..52ba094
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ssl_cache.h
@@ -0,0 +1,150 @@
+/**
+ * \file ssl_cache.h
+ *
+ * \brief SSL session cache implementation
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_SSL_CACHE_H
+#define MBEDTLS_SSL_CACHE_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "ssl.h"
+
+#if defined(MBEDTLS_THREADING_C)
+#include "threading.h"
+#endif
+
+/**
+ * \name SECTION: Module settings
+ *
+ * The configuration options you can set for this module are in this section.
+ * Either change them in config.h or define them on the compiler command line.
+ * \{
+ */
+
+#if !defined(MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT)
+#define MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT 86400 /*!< 1 day */
+#endif
+
+#if !defined(MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES)
+#define MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES 50 /*!< Maximum entries in cache */
+#endif
+
+/* \} name SECTION: Module settings */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct mbedtls_ssl_cache_context mbedtls_ssl_cache_context;
+typedef struct mbedtls_ssl_cache_entry mbedtls_ssl_cache_entry;
+
+/**
+ * \brief This structure is used for storing cache entries
+ */
+struct mbedtls_ssl_cache_entry
+{
+#if defined(MBEDTLS_HAVE_TIME)
+ mbedtls_time_t timestamp; /*!< entry timestamp */
+#endif
+ mbedtls_ssl_session session; /*!< entry session */
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+ mbedtls_x509_buf peer_cert; /*!< entry peer_cert */
+#endif
+ mbedtls_ssl_cache_entry *next; /*!< chain pointer */
+};
+
+/**
+ * \brief Cache context
+ */
+struct mbedtls_ssl_cache_context
+{
+ mbedtls_ssl_cache_entry *chain; /*!< start of the chain */
+ int timeout; /*!< cache entry timeout */
+ int max_entries; /*!< maximum entries */
+#if defined(MBEDTLS_THREADING_C)
+ mbedtls_threading_mutex_t mutex; /*!< mutex */
+#endif
+};
+
+/**
+ * \brief Initialize an SSL cache context
+ *
+ * \param cache SSL cache context
+ */
+void mbedtls_ssl_cache_init( mbedtls_ssl_cache_context *cache );
+
+/**
+ * \brief Cache get callback implementation
+ * (Thread-safe if MBEDTLS_THREADING_C is enabled)
+ *
+ * \param data SSL cache context
+ * \param session session to retrieve entry for
+ */
+int mbedtls_ssl_cache_get( void *data, mbedtls_ssl_session *session );
+
+/**
+ * \brief Cache set callback implementation
+ * (Thread-safe if MBEDTLS_THREADING_C is enabled)
+ *
+ * \param data SSL cache context
+ * \param session session to store entry for
+ */
+int mbedtls_ssl_cache_set( void *data, const mbedtls_ssl_session *session );
+
+#if defined(MBEDTLS_HAVE_TIME)
+/**
+ * \brief Set the cache timeout
+ * (Default: MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT (1 day))
+ *
+ * A timeout of 0 indicates no timeout.
+ *
+ * \param cache SSL cache context
+ * \param timeout cache entry timeout in seconds
+ */
+void mbedtls_ssl_cache_set_timeout( mbedtls_ssl_cache_context *cache, int timeout );
+#endif /* MBEDTLS_HAVE_TIME */
+
+/**
+ * \brief Set the maximum number of cache entries
+ * (Default: MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES (50))
+ *
+ * \param cache SSL cache context
+ * \param max cache entry maximum
+ */
+void mbedtls_ssl_cache_set_max_entries( mbedtls_ssl_cache_context *cache, int max );
+
+/**
+ * \brief Free referenced items in a cache context and clear memory
+ *
+ * \param cache SSL cache context
+ */
+void mbedtls_ssl_cache_free( mbedtls_ssl_cache_context *cache );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ssl_cache.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ssl_ciphersuites.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ssl_ciphersuites.h
new file mode 100644
index 0000000..71053e5
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ssl_ciphersuites.h
@@ -0,0 +1,540 @@
+/**
+ * \file ssl_ciphersuites.h
+ *
+ * \brief SSL Ciphersuites for mbed TLS
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_SSL_CIPHERSUITES_H
+#define MBEDTLS_SSL_CIPHERSUITES_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "pk.h"
+#include "cipher.h"
+#include "md.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * Supported ciphersuites (Official IANA names)
+ */
+#define MBEDTLS_TLS_RSA_WITH_NULL_MD5 0x01 /**< Weak! */
+#define MBEDTLS_TLS_RSA_WITH_NULL_SHA 0x02 /**< Weak! */
+
+#define MBEDTLS_TLS_RSA_WITH_RC4_128_MD5 0x04
+#define MBEDTLS_TLS_RSA_WITH_RC4_128_SHA 0x05
+#define MBEDTLS_TLS_RSA_WITH_DES_CBC_SHA 0x09 /**< Weak! Not in TLS 1.2 */
+
+#define MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA 0x0A
+
+#define MBEDTLS_TLS_DHE_RSA_WITH_DES_CBC_SHA 0x15 /**< Weak! Not in TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA 0x16
+
+#define MBEDTLS_TLS_PSK_WITH_NULL_SHA 0x2C /**< Weak! */
+#define MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA 0x2D /**< Weak! */
+#define MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA 0x2E /**< Weak! */
+#define MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA 0x2F
+
+#define MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA 0x33
+#define MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA 0x35
+#define MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA 0x39
+
+#define MBEDTLS_TLS_RSA_WITH_NULL_SHA256 0x3B /**< Weak! */
+#define MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256 0x3C /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256 0x3D /**< TLS 1.2 */
+
+#define MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA 0x41
+#define MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA 0x45
+
+#define MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256 0x67 /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256 0x6B /**< TLS 1.2 */
+
+#define MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA 0x84
+#define MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA 0x88
+
+#define MBEDTLS_TLS_PSK_WITH_RC4_128_SHA 0x8A
+#define MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA 0x8B
+#define MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA 0x8C
+#define MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA 0x8D
+
+#define MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA 0x8E
+#define MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA 0x8F
+#define MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA 0x90
+#define MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA 0x91
+
+#define MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA 0x92
+#define MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA 0x93
+#define MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA 0x94
+#define MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA 0x95
+
+#define MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256 0x9C /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384 0x9D /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256 0x9E /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384 0x9F /**< TLS 1.2 */
+
+#define MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256 0xA8 /**< TLS 1.2 */
+#define MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384 0xA9 /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256 0xAA /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384 0xAB /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256 0xAC /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384 0xAD /**< TLS 1.2 */
+
+#define MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256 0xAE
+#define MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384 0xAF
+#define MBEDTLS_TLS_PSK_WITH_NULL_SHA256 0xB0 /**< Weak! */
+#define MBEDTLS_TLS_PSK_WITH_NULL_SHA384 0xB1 /**< Weak! */
+
+#define MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256 0xB2
+#define MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384 0xB3
+#define MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA256 0xB4 /**< Weak! */
+#define MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA384 0xB5 /**< Weak! */
+
+#define MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256 0xB6
+#define MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384 0xB7
+#define MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA256 0xB8 /**< Weak! */
+#define MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA384 0xB9 /**< Weak! */
+
+#define MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256 0xBA /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 0xBE /**< TLS 1.2 */
+
+#define MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256 0xC0 /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256 0xC4 /**< TLS 1.2 */
+
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_NULL_SHA 0xC001 /**< Weak! */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA 0xC002 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA 0xC003 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA 0xC004 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA 0xC005 /**< Not in SSL3! */
+
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_NULL_SHA 0xC006 /**< Weak! */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA 0xC007 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA 0xC008 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA 0xC009 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA 0xC00A /**< Not in SSL3! */
+
+#define MBEDTLS_TLS_ECDH_RSA_WITH_NULL_SHA 0xC00B /**< Weak! */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA 0xC00C /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA 0xC00D /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA 0xC00E /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA 0xC00F /**< Not in SSL3! */
+
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_NULL_SHA 0xC010 /**< Weak! */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA 0xC011 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA 0xC012 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA 0xC013 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA 0xC014 /**< Not in SSL3! */
+
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 0xC023 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384 0xC024 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256 0xC025 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384 0xC026 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256 0xC027 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384 0xC028 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256 0xC029 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384 0xC02A /**< TLS 1.2 */
+
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 0xC02B /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384 0xC02C /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256 0xC02D /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384 0xC02E /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 0xC02F /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 0xC030 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256 0xC031 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384 0xC032 /**< TLS 1.2 */
+
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA 0xC033 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA 0xC034 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA 0xC035 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA 0xC036 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256 0xC037 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384 0xC038 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA 0xC039 /**< Weak! No SSL3! */
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA256 0xC03A /**< Weak! No SSL3! */
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA384 0xC03B /**< Weak! No SSL3! */
+
+#define MBEDTLS_TLS_RSA_WITH_ARIA_128_CBC_SHA256 0xC03C /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_WITH_ARIA_256_CBC_SHA384 0xC03D /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_ARIA_128_CBC_SHA256 0xC044 /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_ARIA_256_CBC_SHA384 0xC045 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_128_CBC_SHA256 0xC048 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_256_CBC_SHA384 0xC049 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_128_CBC_SHA256 0xC04A /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_256_CBC_SHA384 0xC04B /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_128_CBC_SHA256 0xC04C /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_256_CBC_SHA384 0xC04D /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_128_CBC_SHA256 0xC04E /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_256_CBC_SHA384 0xC04F /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_WITH_ARIA_128_GCM_SHA256 0xC050 /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_WITH_ARIA_256_GCM_SHA384 0xC051 /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_ARIA_128_GCM_SHA256 0xC052 /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_ARIA_256_GCM_SHA384 0xC053 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_128_GCM_SHA256 0xC05C /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_256_GCM_SHA384 0xC05D /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_128_GCM_SHA256 0xC05E /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_256_GCM_SHA384 0xC05F /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_128_GCM_SHA256 0xC060 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_256_GCM_SHA384 0xC061 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_128_GCM_SHA256 0xC062 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_256_GCM_SHA384 0xC063 /**< TLS 1.2 */
+#define MBEDTLS_TLS_PSK_WITH_ARIA_128_CBC_SHA256 0xC064 /**< TLS 1.2 */
+#define MBEDTLS_TLS_PSK_WITH_ARIA_256_CBC_SHA384 0xC065 /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_PSK_WITH_ARIA_128_CBC_SHA256 0xC066 /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_PSK_WITH_ARIA_256_CBC_SHA384 0xC067 /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_PSK_WITH_ARIA_128_CBC_SHA256 0xC068 /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_PSK_WITH_ARIA_256_CBC_SHA384 0xC069 /**< TLS 1.2 */
+#define MBEDTLS_TLS_PSK_WITH_ARIA_128_GCM_SHA256 0xC06A /**< TLS 1.2 */
+#define MBEDTLS_TLS_PSK_WITH_ARIA_256_GCM_SHA384 0xC06B /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_PSK_WITH_ARIA_128_GCM_SHA256 0xC06C /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_PSK_WITH_ARIA_256_GCM_SHA384 0xC06D /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_PSK_WITH_ARIA_128_GCM_SHA256 0xC06E /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_PSK_WITH_ARIA_256_GCM_SHA384 0xC06F /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_ARIA_128_CBC_SHA256 0xC070 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_ARIA_256_CBC_SHA384 0xC071 /**< TLS 1.2 */
+
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 0xC072 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 0xC073 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 0xC074 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 0xC075 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 0xC076 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384 0xC077 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256 0xC078 /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384 0xC079 /**< Not in SSL3! */
+
+#define MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256 0xC07A /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384 0xC07B /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 0xC07C /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 0xC07D /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 0xC086 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 0xC087 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 0xC088 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 0xC089 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 0xC08A /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 0xC08B /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256 0xC08C /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384 0xC08D /**< TLS 1.2 */
+
+#define MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256 0xC08E /**< TLS 1.2 */
+#define MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384 0xC08F /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256 0xC090 /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384 0xC091 /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256 0xC092 /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384 0xC093 /**< TLS 1.2 */
+
+#define MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256 0xC094
+#define MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384 0xC095
+#define MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 0xC096
+#define MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 0xC097
+#define MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256 0xC098
+#define MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384 0xC099
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 0xC09A /**< Not in SSL3! */
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 0xC09B /**< Not in SSL3! */
+
+#define MBEDTLS_TLS_RSA_WITH_AES_128_CCM 0xC09C /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_WITH_AES_256_CCM 0xC09D /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CCM 0xC09E /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CCM 0xC09F /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_WITH_AES_128_CCM_8 0xC0A0 /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_WITH_AES_256_CCM_8 0xC0A1 /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CCM_8 0xC0A2 /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CCM_8 0xC0A3 /**< TLS 1.2 */
+#define MBEDTLS_TLS_PSK_WITH_AES_128_CCM 0xC0A4 /**< TLS 1.2 */
+#define MBEDTLS_TLS_PSK_WITH_AES_256_CCM 0xC0A5 /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CCM 0xC0A6 /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CCM 0xC0A7 /**< TLS 1.2 */
+#define MBEDTLS_TLS_PSK_WITH_AES_128_CCM_8 0xC0A8 /**< TLS 1.2 */
+#define MBEDTLS_TLS_PSK_WITH_AES_256_CCM_8 0xC0A9 /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CCM_8 0xC0AA /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CCM_8 0xC0AB /**< TLS 1.2 */
+/* The last two are named with PSK_DHE in the RFC, which looks like a typo */
+
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CCM 0xC0AC /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CCM 0xC0AD /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CCM_8 0xC0AE /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CCM_8 0xC0AF /**< TLS 1.2 */
+
+#define MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8 0xC0FF /**< experimental */
+
+/* RFC 7905 */
+#define MBEDTLS_TLS_ECDHE_RSA_WITH_CHACHA20_POLY1305_SHA256 0xCCA8 /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_ECDSA_WITH_CHACHA20_POLY1305_SHA256 0xCCA9 /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_RSA_WITH_CHACHA20_POLY1305_SHA256 0xCCAA /**< TLS 1.2 */
+#define MBEDTLS_TLS_PSK_WITH_CHACHA20_POLY1305_SHA256 0xCCAB /**< TLS 1.2 */
+#define MBEDTLS_TLS_ECDHE_PSK_WITH_CHACHA20_POLY1305_SHA256 0xCCAC /**< TLS 1.2 */
+#define MBEDTLS_TLS_DHE_PSK_WITH_CHACHA20_POLY1305_SHA256 0xCCAD /**< TLS 1.2 */
+#define MBEDTLS_TLS_RSA_PSK_WITH_CHACHA20_POLY1305_SHA256 0xCCAE /**< TLS 1.2 */
+
+/* Reminder: update mbedtls_ssl_premaster_secret when adding a new key exchange.
+ * Reminder: update MBEDTLS_KEY_EXCHANGE__xxx below
+ */
+typedef enum {
+ MBEDTLS_KEY_EXCHANGE_NONE = 0,
+ MBEDTLS_KEY_EXCHANGE_RSA,
+ MBEDTLS_KEY_EXCHANGE_DHE_RSA,
+ MBEDTLS_KEY_EXCHANGE_ECDHE_RSA,
+ MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA,
+ MBEDTLS_KEY_EXCHANGE_PSK,
+ MBEDTLS_KEY_EXCHANGE_DHE_PSK,
+ MBEDTLS_KEY_EXCHANGE_RSA_PSK,
+ MBEDTLS_KEY_EXCHANGE_ECDHE_PSK,
+ MBEDTLS_KEY_EXCHANGE_ECDH_RSA,
+ MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA,
+ MBEDTLS_KEY_EXCHANGE_ECJPAKE,
+} mbedtls_key_exchange_type_t;
+
+/* Key exchanges using a certificate */
+#if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED)
+#define MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED
+#endif
+
+/* Key exchanges allowing client certificate requests */
+#if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED)
+#define MBEDTLS_KEY_EXCHANGE__CERT_REQ_ALLOWED__ENABLED
+#endif
+
+/* Key exchanges involving server signature in ServerKeyExchange */
+#if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED)
+#define MBEDTLS_KEY_EXCHANGE__WITH_SERVER_SIGNATURE__ENABLED
+#endif
+
+/* Key exchanges using ECDH */
+#if defined(MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED)
+#define MBEDTLS_KEY_EXCHANGE__SOME__ECDH_ENABLED
+#endif
+
+/* Key exchanges that don't involve ephemeral keys */
+#if defined(MBEDTLS_KEY_EXCHANGE_RSA_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_PSK_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE__SOME__ECDH_ENABLED)
+#define MBEDTLS_KEY_EXCHANGE__SOME_NON_PFS__ENABLED
+#endif
+
+/* Key exchanges that involve ephemeral keys */
+#if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED)
+#define MBEDTLS_KEY_EXCHANGE__SOME_PFS__ENABLED
+#endif
+
+/* Key exchanges using a PSK */
+#if defined(MBEDTLS_KEY_EXCHANGE_PSK_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED)
+#define MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED
+#endif
+
+/* Key exchanges using DHE */
+#if defined(MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED)
+#define MBEDTLS_KEY_EXCHANGE__SOME__DHE_ENABLED
+#endif
+
+/* Key exchanges using ECDHE */
+#if defined(MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED) || \
+ defined(MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED)
+#define MBEDTLS_KEY_EXCHANGE__SOME__ECDHE_ENABLED
+#endif
+
+typedef struct mbedtls_ssl_ciphersuite_t mbedtls_ssl_ciphersuite_t;
+
+#define MBEDTLS_CIPHERSUITE_WEAK 0x01 /**< Weak ciphersuite flag */
+#define MBEDTLS_CIPHERSUITE_SHORT_TAG 0x02 /**< Short authentication tag,
+ eg for CCM_8 */
+#define MBEDTLS_CIPHERSUITE_NODTLS 0x04 /**< Can't be used with DTLS */
+
+/**
+ * \brief This structure is used for storing ciphersuite information
+ */
+struct mbedtls_ssl_ciphersuite_t
+{
+ int id;
+ const char * name;
+
+ mbedtls_cipher_type_t cipher;
+ mbedtls_md_type_t mac;
+ mbedtls_key_exchange_type_t key_exchange;
+
+ int min_major_ver;
+ int min_minor_ver;
+ int max_major_ver;
+ int max_minor_ver;
+
+ unsigned char flags;
+};
+
+const int *mbedtls_ssl_list_ciphersuites( void );
+
+const mbedtls_ssl_ciphersuite_t *mbedtls_ssl_ciphersuite_from_string( const char *ciphersuite_name );
+const mbedtls_ssl_ciphersuite_t *mbedtls_ssl_ciphersuite_from_id( int ciphersuite_id );
+
+#if defined(MBEDTLS_PK_C)
+mbedtls_pk_type_t mbedtls_ssl_get_ciphersuite_sig_pk_alg( const mbedtls_ssl_ciphersuite_t *info );
+mbedtls_pk_type_t mbedtls_ssl_get_ciphersuite_sig_alg( const mbedtls_ssl_ciphersuite_t *info );
+#endif
+
+int mbedtls_ssl_ciphersuite_uses_ec( const mbedtls_ssl_ciphersuite_t *info );
+int mbedtls_ssl_ciphersuite_uses_psk( const mbedtls_ssl_ciphersuite_t *info );
+
+#if defined(MBEDTLS_KEY_EXCHANGE__SOME_PFS__ENABLED)
+static inline int mbedtls_ssl_ciphersuite_has_pfs( const mbedtls_ssl_ciphersuite_t *info )
+{
+ switch( info->key_exchange )
+ {
+ case MBEDTLS_KEY_EXCHANGE_DHE_RSA:
+ case MBEDTLS_KEY_EXCHANGE_DHE_PSK:
+ case MBEDTLS_KEY_EXCHANGE_ECDHE_RSA:
+ case MBEDTLS_KEY_EXCHANGE_ECDHE_PSK:
+ case MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA:
+ case MBEDTLS_KEY_EXCHANGE_ECJPAKE:
+ return( 1 );
+
+ default:
+ return( 0 );
+ }
+}
+#endif /* MBEDTLS_KEY_EXCHANGE__SOME_PFS__ENABLED */
+
+#if defined(MBEDTLS_KEY_EXCHANGE__SOME_NON_PFS__ENABLED)
+static inline int mbedtls_ssl_ciphersuite_no_pfs( const mbedtls_ssl_ciphersuite_t *info )
+{
+ switch( info->key_exchange )
+ {
+ case MBEDTLS_KEY_EXCHANGE_ECDH_RSA:
+ case MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA:
+ case MBEDTLS_KEY_EXCHANGE_RSA:
+ case MBEDTLS_KEY_EXCHANGE_PSK:
+ case MBEDTLS_KEY_EXCHANGE_RSA_PSK:
+ return( 1 );
+
+ default:
+ return( 0 );
+ }
+}
+#endif /* MBEDTLS_KEY_EXCHANGE__SOME_NON_PFS__ENABLED */
+
+#if defined(MBEDTLS_KEY_EXCHANGE__SOME__ECDH_ENABLED)
+static inline int mbedtls_ssl_ciphersuite_uses_ecdh( const mbedtls_ssl_ciphersuite_t *info )
+{
+ switch( info->key_exchange )
+ {
+ case MBEDTLS_KEY_EXCHANGE_ECDH_RSA:
+ case MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA:
+ return( 1 );
+
+ default:
+ return( 0 );
+ }
+}
+#endif /* MBEDTLS_KEY_EXCHANGE__SOME__ECDH_ENABLED */
+
+static inline int mbedtls_ssl_ciphersuite_cert_req_allowed( const mbedtls_ssl_ciphersuite_t *info )
+{
+ switch( info->key_exchange )
+ {
+ case MBEDTLS_KEY_EXCHANGE_RSA:
+ case MBEDTLS_KEY_EXCHANGE_DHE_RSA:
+ case MBEDTLS_KEY_EXCHANGE_ECDH_RSA:
+ case MBEDTLS_KEY_EXCHANGE_ECDHE_RSA:
+ case MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA:
+ case MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA:
+ return( 1 );
+
+ default:
+ return( 0 );
+ }
+}
+
+#if defined(MBEDTLS_KEY_EXCHANGE__SOME__DHE_ENABLED)
+static inline int mbedtls_ssl_ciphersuite_uses_dhe( const mbedtls_ssl_ciphersuite_t *info )
+{
+ switch( info->key_exchange )
+ {
+ case MBEDTLS_KEY_EXCHANGE_DHE_RSA:
+ case MBEDTLS_KEY_EXCHANGE_DHE_PSK:
+ return( 1 );
+
+ default:
+ return( 0 );
+ }
+}
+#endif /* MBEDTLS_KEY_EXCHANGE__SOME__DHE_ENABLED) */
+
+#if defined(MBEDTLS_KEY_EXCHANGE__SOME__ECDHE_ENABLED)
+static inline int mbedtls_ssl_ciphersuite_uses_ecdhe( const mbedtls_ssl_ciphersuite_t *info )
+{
+ switch( info->key_exchange )
+ {
+ case MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA:
+ case MBEDTLS_KEY_EXCHANGE_ECDHE_RSA:
+ case MBEDTLS_KEY_EXCHANGE_ECDHE_PSK:
+ return( 1 );
+
+ default:
+ return( 0 );
+ }
+}
+#endif /* MBEDTLS_KEY_EXCHANGE__SOME__ECDHE_ENABLED) */
+
+#if defined(MBEDTLS_KEY_EXCHANGE__WITH_SERVER_SIGNATURE__ENABLED)
+static inline int mbedtls_ssl_ciphersuite_uses_server_signature( const mbedtls_ssl_ciphersuite_t *info )
+{
+ switch( info->key_exchange )
+ {
+ case MBEDTLS_KEY_EXCHANGE_DHE_RSA:
+ case MBEDTLS_KEY_EXCHANGE_ECDHE_RSA:
+ case MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA:
+ return( 1 );
+
+ default:
+ return( 0 );
+ }
+}
+#endif /* MBEDTLS_KEY_EXCHANGE__WITH_SERVER_SIGNATURE__ENABLED */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ssl_ciphersuites.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ssl_cookie.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ssl_cookie.h
new file mode 100644
index 0000000..e34760a
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ssl_cookie.h
@@ -0,0 +1,115 @@
+/**
+ * \file ssl_cookie.h
+ *
+ * \brief DTLS cookie callbacks implementation
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_SSL_COOKIE_H
+#define MBEDTLS_SSL_COOKIE_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "ssl.h"
+
+#if defined(MBEDTLS_THREADING_C)
+#include "threading.h"
+#endif
+
+/**
+ * \name SECTION: Module settings
+ *
+ * The configuration options you can set for this module are in this section.
+ * Either change them in config.h or define them on the compiler command line.
+ * \{
+ */
+#ifndef MBEDTLS_SSL_COOKIE_TIMEOUT
+#define MBEDTLS_SSL_COOKIE_TIMEOUT 60 /**< Default expiration delay of DTLS cookies, in seconds if HAVE_TIME, or in number of cookies issued */
+#endif
+
+/* \} name SECTION: Module settings */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief Context for the default cookie functions.
+ */
+typedef struct mbedtls_ssl_cookie_ctx
+{
+ mbedtls_md_context_t hmac_ctx; /*!< context for the HMAC portion */
+#if !defined(MBEDTLS_HAVE_TIME)
+ unsigned long serial; /*!< serial number for expiration */
+#endif
+ unsigned long timeout; /*!< timeout delay, in seconds if HAVE_TIME,
+ or in number of tickets issued */
+
+#if defined(MBEDTLS_THREADING_C)
+ mbedtls_threading_mutex_t mutex;
+#endif
+} mbedtls_ssl_cookie_ctx;
+
+/**
+ * \brief Initialize cookie context
+ */
+void mbedtls_ssl_cookie_init( mbedtls_ssl_cookie_ctx *ctx );
+
+/**
+ * \brief Setup cookie context (generate keys)
+ */
+int mbedtls_ssl_cookie_setup( mbedtls_ssl_cookie_ctx *ctx,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+/**
+ * \brief Set expiration delay for cookies
+ * (Default MBEDTLS_SSL_COOKIE_TIMEOUT)
+ *
+ * \param ctx Cookie contex
+ * \param delay Delay, in seconds if HAVE_TIME, or in number of cookies
+ * issued in the meantime.
+ * 0 to disable expiration (NOT recommended)
+ */
+void mbedtls_ssl_cookie_set_timeout( mbedtls_ssl_cookie_ctx *ctx, unsigned long delay );
+
+/**
+ * \brief Free cookie context
+ */
+void mbedtls_ssl_cookie_free( mbedtls_ssl_cookie_ctx *ctx );
+
+/**
+ * \brief Generate cookie, see \c mbedtls_ssl_cookie_write_t
+ */
+mbedtls_ssl_cookie_write_t mbedtls_ssl_cookie_write;
+
+/**
+ * \brief Verify cookie, see \c mbedtls_ssl_cookie_write_t
+ */
+mbedtls_ssl_cookie_check_t mbedtls_ssl_cookie_check;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ssl_cookie.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ssl_internal.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ssl_internal.h
new file mode 100644
index 0000000..bd5ad94
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ssl_internal.h
@@ -0,0 +1,782 @@
+/**
+ * \file ssl_internal.h
+ *
+ * \brief Internal functions shared by the SSL modules
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_SSL_INTERNAL_H
+#define MBEDTLS_SSL_INTERNAL_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "ssl.h"
+#include "cipher.h"
+
+#if defined(MBEDTLS_MD5_C)
+#include "md5.h"
+#endif
+
+#if defined(MBEDTLS_SHA1_C)
+#include "sha1.h"
+#endif
+
+#if defined(MBEDTLS_SHA256_C)
+#include "sha256.h"
+#endif
+
+#if defined(MBEDTLS_SHA512_C)
+#include "sha512.h"
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED)
+#include "ecjpake.h"
+#endif
+
+#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && \
+ !defined(inline) && !defined(__cplusplus)
+#define inline __inline
+#endif
+
+/* Determine minimum supported version */
+#define MBEDTLS_SSL_MIN_MAJOR_VERSION MBEDTLS_SSL_MAJOR_VERSION_3
+
+#if defined(MBEDTLS_SSL_PROTO_SSL3)
+#define MBEDTLS_SSL_MIN_MINOR_VERSION MBEDTLS_SSL_MINOR_VERSION_0
+#else
+#if defined(MBEDTLS_SSL_PROTO_TLS1)
+#define MBEDTLS_SSL_MIN_MINOR_VERSION MBEDTLS_SSL_MINOR_VERSION_1
+#else
+#if defined(MBEDTLS_SSL_PROTO_TLS1_1)
+#define MBEDTLS_SSL_MIN_MINOR_VERSION MBEDTLS_SSL_MINOR_VERSION_2
+#else
+#if defined(MBEDTLS_SSL_PROTO_TLS1_2)
+#define MBEDTLS_SSL_MIN_MINOR_VERSION MBEDTLS_SSL_MINOR_VERSION_3
+#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */
+#endif /* MBEDTLS_SSL_PROTO_TLS1_1 */
+#endif /* MBEDTLS_SSL_PROTO_TLS1 */
+#endif /* MBEDTLS_SSL_PROTO_SSL3 */
+
+#define MBEDTLS_SSL_MIN_VALID_MINOR_VERSION MBEDTLS_SSL_MINOR_VERSION_1
+#define MBEDTLS_SSL_MIN_VALID_MAJOR_VERSION MBEDTLS_SSL_MAJOR_VERSION_3
+
+/* Determine maximum supported version */
+#define MBEDTLS_SSL_MAX_MAJOR_VERSION MBEDTLS_SSL_MAJOR_VERSION_3
+
+#if defined(MBEDTLS_SSL_PROTO_TLS1_2)
+#define MBEDTLS_SSL_MAX_MINOR_VERSION MBEDTLS_SSL_MINOR_VERSION_3
+#else
+#if defined(MBEDTLS_SSL_PROTO_TLS1_1)
+#define MBEDTLS_SSL_MAX_MINOR_VERSION MBEDTLS_SSL_MINOR_VERSION_2
+#else
+#if defined(MBEDTLS_SSL_PROTO_TLS1)
+#define MBEDTLS_SSL_MAX_MINOR_VERSION MBEDTLS_SSL_MINOR_VERSION_1
+#else
+#if defined(MBEDTLS_SSL_PROTO_SSL3)
+#define MBEDTLS_SSL_MAX_MINOR_VERSION MBEDTLS_SSL_MINOR_VERSION_0
+#endif /* MBEDTLS_SSL_PROTO_SSL3 */
+#endif /* MBEDTLS_SSL_PROTO_TLS1 */
+#endif /* MBEDTLS_SSL_PROTO_TLS1_1 */
+#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */
+
+/* Shorthand for restartable ECC */
+#if defined(MBEDTLS_ECP_RESTARTABLE) && \
+ defined(MBEDTLS_SSL_CLI_C) && \
+ defined(MBEDTLS_SSL_PROTO_TLS1_2) && \
+ defined(MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED)
+#define MBEDTLS_SSL__ECP_RESTARTABLE
+#endif
+
+#define MBEDTLS_SSL_INITIAL_HANDSHAKE 0
+#define MBEDTLS_SSL_RENEGOTIATION_IN_PROGRESS 1 /* In progress */
+#define MBEDTLS_SSL_RENEGOTIATION_DONE 2 /* Done or aborted */
+#define MBEDTLS_SSL_RENEGOTIATION_PENDING 3 /* Requested (server only) */
+
+/*
+ * DTLS retransmission states, see RFC 6347 4.2.4
+ *
+ * The SENDING state is merged in PREPARING for initial sends,
+ * but is distinct for resends.
+ *
+ * Note: initial state is wrong for server, but is not used anyway.
+ */
+#define MBEDTLS_SSL_RETRANS_PREPARING 0
+#define MBEDTLS_SSL_RETRANS_SENDING 1
+#define MBEDTLS_SSL_RETRANS_WAITING 2
+#define MBEDTLS_SSL_RETRANS_FINISHED 3
+
+/*
+ * Allow extra bytes for record, authentication and encryption overhead:
+ * counter (8) + header (5) + IV(16) + MAC (16-48) + padding (0-256)
+ * and allow for a maximum of 1024 of compression expansion if
+ * enabled.
+ */
+#if defined(MBEDTLS_ZLIB_SUPPORT)
+#define MBEDTLS_SSL_COMPRESSION_ADD 1024
+#else
+#define MBEDTLS_SSL_COMPRESSION_ADD 0
+#endif
+
+#if defined(MBEDTLS_ARC4_C) || defined(MBEDTLS_CIPHER_MODE_CBC)
+/* Ciphersuites using HMAC */
+#if defined(MBEDTLS_SHA512_C)
+#define MBEDTLS_SSL_MAC_ADD 48 /* SHA-384 used for HMAC */
+#elif defined(MBEDTLS_SHA256_C)
+#define MBEDTLS_SSL_MAC_ADD 32 /* SHA-256 used for HMAC */
+#else
+#define MBEDTLS_SSL_MAC_ADD 20 /* SHA-1 used for HMAC */
+#endif
+#else
+/* AEAD ciphersuites: GCM and CCM use a 128 bits tag */
+#define MBEDTLS_SSL_MAC_ADD 16
+#endif
+
+#if defined(MBEDTLS_CIPHER_MODE_CBC)
+#define MBEDTLS_SSL_PADDING_ADD 256
+#else
+#define MBEDTLS_SSL_PADDING_ADD 0
+#endif
+
+#define MBEDTLS_SSL_PAYLOAD_OVERHEAD ( MBEDTLS_SSL_COMPRESSION_ADD + \
+ MBEDTLS_MAX_IV_LENGTH + \
+ MBEDTLS_SSL_MAC_ADD + \
+ MBEDTLS_SSL_PADDING_ADD \
+ )
+
+#define MBEDTLS_SSL_IN_PAYLOAD_LEN ( MBEDTLS_SSL_PAYLOAD_OVERHEAD + \
+ ( MBEDTLS_SSL_IN_CONTENT_LEN ) )
+
+#define MBEDTLS_SSL_OUT_PAYLOAD_LEN ( MBEDTLS_SSL_PAYLOAD_OVERHEAD + \
+ ( MBEDTLS_SSL_OUT_CONTENT_LEN ) )
+
+/* The maximum number of buffered handshake messages. */
+#define MBEDTLS_SSL_MAX_BUFFERED_HS 4
+
+/* Maximum length we can advertise as our max content length for
+ RFC 6066 max_fragment_length extension negotiation purposes
+ (the lesser of both sizes, if they are unequal.)
+ */
+#define MBEDTLS_TLS_EXT_ADV_CONTENT_LEN ( \
+ (MBEDTLS_SSL_IN_CONTENT_LEN > MBEDTLS_SSL_OUT_CONTENT_LEN) \
+ ? ( MBEDTLS_SSL_OUT_CONTENT_LEN ) \
+ : ( MBEDTLS_SSL_IN_CONTENT_LEN ) \
+ )
+
+/*
+ * Check that we obey the standard's message size bounds
+ */
+
+#if MBEDTLS_SSL_MAX_CONTENT_LEN > 16384
+#error "Bad configuration - record content too large."
+#endif
+
+#if MBEDTLS_SSL_IN_CONTENT_LEN > MBEDTLS_SSL_MAX_CONTENT_LEN
+#error "Bad configuration - incoming record content should not be larger than MBEDTLS_SSL_MAX_CONTENT_LEN."
+#endif
+
+#if MBEDTLS_SSL_OUT_CONTENT_LEN > MBEDTLS_SSL_MAX_CONTENT_LEN
+#error "Bad configuration - outgoing record content should not be larger than MBEDTLS_SSL_MAX_CONTENT_LEN."
+#endif
+
+#if MBEDTLS_SSL_IN_PAYLOAD_LEN > MBEDTLS_SSL_MAX_CONTENT_LEN + 2048
+#error "Bad configuration - incoming protected record payload too large."
+#endif
+
+#if MBEDTLS_SSL_OUT_PAYLOAD_LEN > MBEDTLS_SSL_MAX_CONTENT_LEN + 2048
+#error "Bad configuration - outgoing protected record payload too large."
+#endif
+
+/* Calculate buffer sizes */
+
+/* Note: Even though the TLS record header is only 5 bytes
+ long, we're internally using 8 bytes to store the
+ implicit sequence number. */
+#define MBEDTLS_SSL_HEADER_LEN 13
+
+#define MBEDTLS_SSL_IN_BUFFER_LEN \
+ ( ( MBEDTLS_SSL_HEADER_LEN ) + ( MBEDTLS_SSL_IN_PAYLOAD_LEN ) )
+
+#define MBEDTLS_SSL_OUT_BUFFER_LEN \
+ ( ( MBEDTLS_SSL_HEADER_LEN ) + ( MBEDTLS_SSL_OUT_PAYLOAD_LEN ) )
+
+#ifdef MBEDTLS_ZLIB_SUPPORT
+/* Compression buffer holds both IN and OUT buffers, so should be size of the larger */
+#define MBEDTLS_SSL_COMPRESS_BUFFER_LEN ( \
+ ( MBEDTLS_SSL_IN_BUFFER_LEN > MBEDTLS_SSL_OUT_BUFFER_LEN ) \
+ ? MBEDTLS_SSL_IN_BUFFER_LEN \
+ : MBEDTLS_SSL_OUT_BUFFER_LEN \
+ )
+#endif
+
+/*
+ * TLS extension flags (for extensions with outgoing ServerHello content
+ * that need it (e.g. for RENEGOTIATION_INFO the server already knows because
+ * of state of the renegotiation flag, so no indicator is required)
+ */
+#define MBEDTLS_TLS_EXT_SUPPORTED_POINT_FORMATS_PRESENT (1 << 0)
+#define MBEDTLS_TLS_EXT_ECJPAKE_KKPP_OK (1 << 1)
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(MBEDTLS_SSL_PROTO_TLS1_2) && \
+ defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
+/*
+ * Abstraction for a grid of allowed signature-hash-algorithm pairs.
+ */
+struct mbedtls_ssl_sig_hash_set_t
+{
+ /* At the moment, we only need to remember a single suitable
+ * hash algorithm per signature algorithm. As long as that's
+ * the case - and we don't need a general lookup function -
+ * we can implement the sig-hash-set as a map from signatures
+ * to hash algorithms. */
+ mbedtls_md_type_t rsa;
+ mbedtls_md_type_t ecdsa;
+};
+#endif /* MBEDTLS_SSL_PROTO_TLS1_2 &&
+ MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED */
+
+/*
+ * This structure contains the parameters only needed during handshake.
+ */
+struct mbedtls_ssl_handshake_params
+{
+ /*
+ * Handshake specific crypto variables
+ */
+
+#if defined(MBEDTLS_SSL_PROTO_TLS1_2) && \
+ defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
+ mbedtls_ssl_sig_hash_set_t hash_algs; /*!< Set of suitable sig-hash pairs */
+#endif
+#if defined(MBEDTLS_DHM_C)
+ mbedtls_dhm_context dhm_ctx; /*!< DHM key exchange */
+#endif
+#if defined(MBEDTLS_ECDH_C)
+ mbedtls_ecdh_context ecdh_ctx; /*!< ECDH key exchange */
+#endif
+#if defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED)
+ mbedtls_ecjpake_context ecjpake_ctx; /*!< EC J-PAKE key exchange */
+#if defined(MBEDTLS_SSL_CLI_C)
+ unsigned char *ecjpake_cache; /*!< Cache for ClientHello ext */
+ size_t ecjpake_cache_len; /*!< Length of cached data */
+#endif
+#endif /* MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED */
+#if defined(MBEDTLS_ECDH_C) || defined(MBEDTLS_ECDSA_C) || \
+ defined(MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED)
+ const mbedtls_ecp_curve_info **curves; /*!< Supported elliptic curves */
+#endif
+#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED)
+ unsigned char *psk; /*!< PSK from the callback */
+ size_t psk_len; /*!< Length of PSK from callback */
+#endif
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+ mbedtls_ssl_key_cert *key_cert; /*!< chosen key/cert pair (server) */
+#if defined(MBEDTLS_SSL_SERVER_NAME_INDICATION)
+ int sni_authmode; /*!< authmode from SNI callback */
+ mbedtls_ssl_key_cert *sni_key_cert; /*!< key/cert list from SNI */
+ mbedtls_x509_crt *sni_ca_chain; /*!< trusted CAs from SNI callback */
+ mbedtls_x509_crl *sni_ca_crl; /*!< trusted CAs CRLs from SNI */
+#endif /* MBEDTLS_SSL_SERVER_NAME_INDICATION */
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+#if defined(MBEDTLS_SSL__ECP_RESTARTABLE)
+ int ecrs_enabled; /*!< Handshake supports EC restart? */
+ mbedtls_x509_crt_restart_ctx ecrs_ctx; /*!< restart context */
+ enum { /* this complements ssl->state with info on intra-state operations */
+ ssl_ecrs_none = 0, /*!< nothing going on (yet) */
+ ssl_ecrs_crt_verify, /*!< Certificate: crt_verify() */
+ ssl_ecrs_ske_start_processing, /*!< ServerKeyExchange: pk_verify() */
+ ssl_ecrs_cke_ecdh_calc_secret, /*!< ClientKeyExchange: ECDH step 2 */
+ ssl_ecrs_crt_vrfy_sign, /*!< CertificateVerify: pk_sign() */
+ } ecrs_state; /*!< current (or last) operation */
+ size_t ecrs_n; /*!< place for saving a length */
+#endif
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+ unsigned int out_msg_seq; /*!< Outgoing handshake sequence number */
+ unsigned int in_msg_seq; /*!< Incoming handshake sequence number */
+
+ unsigned char *verify_cookie; /*!< Cli: HelloVerifyRequest cookie
+ Srv: unused */
+ unsigned char verify_cookie_len; /*!< Cli: cookie length
+ Srv: flag for sending a cookie */
+
+ uint32_t retransmit_timeout; /*!< Current value of timeout */
+ unsigned char retransmit_state; /*!< Retransmission state */
+ mbedtls_ssl_flight_item *flight; /*!< Current outgoing flight */
+ mbedtls_ssl_flight_item *cur_msg; /*!< Current message in flight */
+ unsigned char *cur_msg_p; /*!< Position in current message */
+ unsigned int in_flight_start_seq; /*!< Minimum message sequence in the
+ flight being received */
+ mbedtls_ssl_transform *alt_transform_out; /*!< Alternative transform for
+ resending messages */
+ unsigned char alt_out_ctr[8]; /*!< Alternative record epoch/counter
+ for resending messages */
+
+ struct
+ {
+ size_t total_bytes_buffered; /*!< Cumulative size of heap allocated
+ * buffers used for message buffering. */
+
+ uint8_t seen_ccs; /*!< Indicates if a CCS message has
+ * been seen in the current flight. */
+
+ struct mbedtls_ssl_hs_buffer
+ {
+ unsigned is_valid : 1;
+ unsigned is_fragmented : 1;
+ unsigned is_complete : 1;
+ unsigned char *data;
+ size_t data_len;
+ } hs[MBEDTLS_SSL_MAX_BUFFERED_HS];
+
+ struct
+ {
+ unsigned char *data;
+ size_t len;
+ unsigned epoch;
+ } future_record;
+
+ } buffering;
+
+ uint16_t mtu; /*!< Handshake mtu, used to fragment outgoing messages */
+#endif /* MBEDTLS_SSL_PROTO_DTLS */
+
+ /*
+ * Checksum contexts
+ */
+#if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) || \
+ defined(MBEDTLS_SSL_PROTO_TLS1_1)
+ mbedtls_md5_context fin_md5;
+ mbedtls_sha1_context fin_sha1;
+#endif
+#if defined(MBEDTLS_SSL_PROTO_TLS1_2)
+#if defined(MBEDTLS_SHA256_C)
+ mbedtls_sha256_context fin_sha256;
+#endif
+#if defined(MBEDTLS_SHA512_C)
+ mbedtls_sha512_context fin_sha512;
+#endif
+#endif /* MBEDTLS_SSL_PROTO_TLS1_2 */
+
+ void (*update_checksum)(mbedtls_ssl_context *, const unsigned char *, size_t);
+ void (*calc_verify)(mbedtls_ssl_context *, unsigned char *);
+ void (*calc_finished)(mbedtls_ssl_context *, unsigned char *, int);
+ int (*tls_prf)(const unsigned char *, size_t, const char *,
+ const unsigned char *, size_t,
+ unsigned char *, size_t);
+
+ size_t pmslen; /*!< premaster length */
+
+ unsigned char randbytes[64]; /*!< random bytes */
+ unsigned char premaster[MBEDTLS_PREMASTER_SIZE];
+ /*!< premaster secret */
+
+ int resume; /*!< session resume indicator*/
+ int max_major_ver; /*!< max. major version client*/
+ int max_minor_ver; /*!< max. minor version client*/
+ int cli_exts; /*!< client extension presence*/
+
+#if defined(MBEDTLS_SSL_SESSION_TICKETS)
+ int new_session_ticket; /*!< use NewSessionTicket? */
+#endif /* MBEDTLS_SSL_SESSION_TICKETS */
+#if defined(MBEDTLS_SSL_EXTENDED_MASTER_SECRET)
+ int extended_ms; /*!< use Extended Master Secret? */
+#endif
+
+#if defined(MBEDTLS_SSL_ASYNC_PRIVATE)
+ unsigned int async_in_progress : 1; /*!< an asynchronous operation is in progress */
+#endif /* MBEDTLS_SSL_ASYNC_PRIVATE */
+
+#if defined(MBEDTLS_SSL_ASYNC_PRIVATE)
+ /** Asynchronous operation context. This field is meant for use by the
+ * asynchronous operation callbacks (mbedtls_ssl_config::f_async_sign_start,
+ * mbedtls_ssl_config::f_async_decrypt_start,
+ * mbedtls_ssl_config::f_async_resume, mbedtls_ssl_config::f_async_cancel).
+ * The library does not use it internally. */
+ void *user_async_ctx;
+#endif /* MBEDTLS_SSL_ASYNC_PRIVATE */
+};
+
+typedef struct mbedtls_ssl_hs_buffer mbedtls_ssl_hs_buffer;
+
+/*
+ * This structure contains a full set of runtime transform parameters
+ * either in negotiation or active.
+ */
+struct mbedtls_ssl_transform
+{
+ /*
+ * Session specific crypto layer
+ */
+ const mbedtls_ssl_ciphersuite_t *ciphersuite_info;
+ /*!< Chosen cipersuite_info */
+ unsigned int keylen; /*!< symmetric key length (bytes) */
+ size_t minlen; /*!< min. ciphertext length */
+ size_t ivlen; /*!< IV length */
+ size_t fixed_ivlen; /*!< Fixed part of IV (AEAD) */
+ size_t maclen; /*!< MAC length */
+
+ unsigned char iv_enc[16]; /*!< IV (encryption) */
+ unsigned char iv_dec[16]; /*!< IV (decryption) */
+
+#if defined(MBEDTLS_SSL_PROTO_SSL3)
+ /* Needed only for SSL v3.0 secret */
+ unsigned char mac_enc[20]; /*!< SSL v3.0 secret (enc) */
+ unsigned char mac_dec[20]; /*!< SSL v3.0 secret (dec) */
+#endif /* MBEDTLS_SSL_PROTO_SSL3 */
+
+ mbedtls_md_context_t md_ctx_enc; /*!< MAC (encryption) */
+ mbedtls_md_context_t md_ctx_dec; /*!< MAC (decryption) */
+
+ mbedtls_cipher_context_t cipher_ctx_enc; /*!< encryption context */
+ mbedtls_cipher_context_t cipher_ctx_dec; /*!< decryption context */
+
+ /*
+ * Session specific compression layer
+ */
+#if defined(MBEDTLS_ZLIB_SUPPORT)
+ z_stream ctx_deflate; /*!< compression context */
+ z_stream ctx_inflate; /*!< decompression context */
+#endif
+};
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+/*
+ * List of certificate + private key pairs
+ */
+struct mbedtls_ssl_key_cert
+{
+ mbedtls_x509_crt *cert; /*!< cert */
+ mbedtls_pk_context *key; /*!< private key */
+ mbedtls_ssl_key_cert *next; /*!< next key/cert pair */
+};
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+/*
+ * List of handshake messages kept around for resending
+ */
+struct mbedtls_ssl_flight_item
+{
+ unsigned char *p; /*!< message, including handshake headers */
+ size_t len; /*!< length of p */
+ unsigned char type; /*!< type of the message: handshake or CCS */
+ mbedtls_ssl_flight_item *next; /*!< next handshake message(s) */
+};
+#endif /* MBEDTLS_SSL_PROTO_DTLS */
+
+#if defined(MBEDTLS_SSL_PROTO_TLS1_2) && \
+ defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
+
+/* Find an entry in a signature-hash set matching a given hash algorithm. */
+mbedtls_md_type_t mbedtls_ssl_sig_hash_set_find( mbedtls_ssl_sig_hash_set_t *set,
+ mbedtls_pk_type_t sig_alg );
+/* Add a signature-hash-pair to a signature-hash set */
+void mbedtls_ssl_sig_hash_set_add( mbedtls_ssl_sig_hash_set_t *set,
+ mbedtls_pk_type_t sig_alg,
+ mbedtls_md_type_t md_alg );
+/* Allow exactly one hash algorithm for each signature. */
+void mbedtls_ssl_sig_hash_set_const_hash( mbedtls_ssl_sig_hash_set_t *set,
+ mbedtls_md_type_t md_alg );
+
+/* Setup an empty signature-hash set */
+static inline void mbedtls_ssl_sig_hash_set_init( mbedtls_ssl_sig_hash_set_t *set )
+{
+ mbedtls_ssl_sig_hash_set_const_hash( set, MBEDTLS_MD_NONE );
+}
+
+#endif /* MBEDTLS_SSL_PROTO_TLS1_2) &&
+ MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED */
+
+/**
+ * \brief Free referenced items in an SSL transform context and clear
+ * memory
+ *
+ * \param transform SSL transform context
+ */
+void mbedtls_ssl_transform_free( mbedtls_ssl_transform *transform );
+
+/**
+ * \brief Free referenced items in an SSL handshake context and clear
+ * memory
+ *
+ * \param ssl SSL context
+ */
+void mbedtls_ssl_handshake_free( mbedtls_ssl_context *ssl );
+
+int mbedtls_ssl_handshake_client_step( mbedtls_ssl_context *ssl );
+int mbedtls_ssl_handshake_server_step( mbedtls_ssl_context *ssl );
+void mbedtls_ssl_handshake_wrapup( mbedtls_ssl_context *ssl );
+
+int mbedtls_ssl_send_fatal_handshake_failure( mbedtls_ssl_context *ssl );
+
+void mbedtls_ssl_reset_checksum( mbedtls_ssl_context *ssl );
+int mbedtls_ssl_derive_keys( mbedtls_ssl_context *ssl );
+
+int mbedtls_ssl_handle_message_type( mbedtls_ssl_context *ssl );
+int mbedtls_ssl_prepare_handshake_record( mbedtls_ssl_context *ssl );
+void mbedtls_ssl_update_handshake_status( mbedtls_ssl_context *ssl );
+
+/**
+ * \brief Update record layer
+ *
+ * This function roughly separates the implementation
+ * of the logic of (D)TLS from the implementation
+ * of the secure transport.
+ *
+ * \param ssl The SSL context to use.
+ * \param update_hs_digest This indicates if the handshake digest
+ * should be automatically updated in case
+ * a handshake message is found.
+ *
+ * \return 0 or non-zero error code.
+ *
+ * \note A clarification on what is called 'record layer' here
+ * is in order, as many sensible definitions are possible:
+ *
+ * The record layer takes as input an untrusted underlying
+ * transport (stream or datagram) and transforms it into
+ * a serially multiplexed, secure transport, which
+ * conceptually provides the following:
+ *
+ * (1) Three datagram based, content-agnostic transports
+ * for handshake, alert and CCS messages.
+ * (2) One stream- or datagram-based transport
+ * for application data.
+ * (3) Functionality for changing the underlying transform
+ * securing the contents.
+ *
+ * The interface to this functionality is given as follows:
+ *
+ * a Updating
+ * [Currently implemented by mbedtls_ssl_read_record]
+ *
+ * Check if and on which of the four 'ports' data is pending:
+ * Nothing, a controlling datagram of type (1), or application
+ * data (2). In any case data is present, internal buffers
+ * provide access to the data for the user to process it.
+ * Consumption of type (1) datagrams is done automatically
+ * on the next update, invalidating that the internal buffers
+ * for previous datagrams, while consumption of application
+ * data (2) is user-controlled.
+ *
+ * b Reading of application data
+ * [Currently manual adaption of ssl->in_offt pointer]
+ *
+ * As mentioned in the last paragraph, consumption of data
+ * is different from the automatic consumption of control
+ * datagrams (1) because application data is treated as a stream.
+ *
+ * c Tracking availability of application data
+ * [Currently manually through decreasing ssl->in_msglen]
+ *
+ * For efficiency and to retain datagram semantics for
+ * application data in case of DTLS, the record layer
+ * provides functionality for checking how much application
+ * data is still available in the internal buffer.
+ *
+ * d Changing the transformation securing the communication.
+ *
+ * Given an opaque implementation of the record layer in the
+ * above sense, it should be possible to implement the logic
+ * of (D)TLS on top of it without the need to know anything
+ * about the record layer's internals. This is done e.g.
+ * in all the handshake handling functions, and in the
+ * application data reading function mbedtls_ssl_read.
+ *
+ * \note The above tries to give a conceptual picture of the
+ * record layer, but the current implementation deviates
+ * from it in some places. For example, our implementation of
+ * the update functionality through mbedtls_ssl_read_record
+ * discards datagrams depending on the current state, which
+ * wouldn't fall under the record layer's responsibility
+ * following the above definition.
+ *
+ */
+int mbedtls_ssl_read_record( mbedtls_ssl_context *ssl,
+ unsigned update_hs_digest );
+int mbedtls_ssl_fetch_input( mbedtls_ssl_context *ssl, size_t nb_want );
+
+int mbedtls_ssl_write_handshake_msg( mbedtls_ssl_context *ssl );
+int mbedtls_ssl_write_record( mbedtls_ssl_context *ssl, uint8_t force_flush );
+int mbedtls_ssl_flush_output( mbedtls_ssl_context *ssl );
+
+int mbedtls_ssl_parse_certificate( mbedtls_ssl_context *ssl );
+int mbedtls_ssl_write_certificate( mbedtls_ssl_context *ssl );
+
+int mbedtls_ssl_parse_change_cipher_spec( mbedtls_ssl_context *ssl );
+int mbedtls_ssl_write_change_cipher_spec( mbedtls_ssl_context *ssl );
+
+int mbedtls_ssl_parse_finished( mbedtls_ssl_context *ssl );
+int mbedtls_ssl_write_finished( mbedtls_ssl_context *ssl );
+
+void mbedtls_ssl_optimize_checksum( mbedtls_ssl_context *ssl,
+ const mbedtls_ssl_ciphersuite_t *ciphersuite_info );
+
+#if defined(MBEDTLS_KEY_EXCHANGE__SOME__PSK_ENABLED)
+int mbedtls_ssl_psk_derive_premaster( mbedtls_ssl_context *ssl, mbedtls_key_exchange_type_t key_ex );
+#endif
+
+#if defined(MBEDTLS_PK_C)
+unsigned char mbedtls_ssl_sig_from_pk( mbedtls_pk_context *pk );
+unsigned char mbedtls_ssl_sig_from_pk_alg( mbedtls_pk_type_t type );
+mbedtls_pk_type_t mbedtls_ssl_pk_alg_from_sig( unsigned char sig );
+#endif
+
+mbedtls_md_type_t mbedtls_ssl_md_alg_from_hash( unsigned char hash );
+unsigned char mbedtls_ssl_hash_from_md_alg( int md );
+int mbedtls_ssl_set_calc_verify_md( mbedtls_ssl_context *ssl, int md );
+
+#if defined(MBEDTLS_ECP_C)
+int mbedtls_ssl_check_curve( const mbedtls_ssl_context *ssl, mbedtls_ecp_group_id grp_id );
+#endif
+
+#if defined(MBEDTLS_KEY_EXCHANGE__WITH_CERT__ENABLED)
+int mbedtls_ssl_check_sig_hash( const mbedtls_ssl_context *ssl,
+ mbedtls_md_type_t md );
+#endif
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+static inline mbedtls_pk_context *mbedtls_ssl_own_key( mbedtls_ssl_context *ssl )
+{
+ mbedtls_ssl_key_cert *key_cert;
+
+ if( ssl->handshake != NULL && ssl->handshake->key_cert != NULL )
+ key_cert = ssl->handshake->key_cert;
+ else
+ key_cert = ssl->conf->key_cert;
+
+ return( key_cert == NULL ? NULL : key_cert->key );
+}
+
+static inline mbedtls_x509_crt *mbedtls_ssl_own_cert( mbedtls_ssl_context *ssl )
+{
+ mbedtls_ssl_key_cert *key_cert;
+
+ if( ssl->handshake != NULL && ssl->handshake->key_cert != NULL )
+ key_cert = ssl->handshake->key_cert;
+ else
+ key_cert = ssl->conf->key_cert;
+
+ return( key_cert == NULL ? NULL : key_cert->cert );
+}
+
+/*
+ * Check usage of a certificate wrt extensions:
+ * keyUsage, extendedKeyUsage (later), and nSCertType (later).
+ *
+ * Warning: cert_endpoint is the endpoint of the cert (ie, of our peer when we
+ * check a cert we received from them)!
+ *
+ * Return 0 if everything is OK, -1 if not.
+ */
+int mbedtls_ssl_check_cert_usage( const mbedtls_x509_crt *cert,
+ const mbedtls_ssl_ciphersuite_t *ciphersuite,
+ int cert_endpoint,
+ uint32_t *flags );
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+
+void mbedtls_ssl_write_version( int major, int minor, int transport,
+ unsigned char ver[2] );
+void mbedtls_ssl_read_version( int *major, int *minor, int transport,
+ const unsigned char ver[2] );
+
+static inline size_t mbedtls_ssl_hdr_len( const mbedtls_ssl_context *ssl )
+{
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+ if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM )
+ return( 13 );
+#else
+ ((void) ssl);
+#endif
+ return( 5 );
+}
+
+static inline size_t mbedtls_ssl_hs_hdr_len( const mbedtls_ssl_context *ssl )
+{
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+ if( ssl->conf->transport == MBEDTLS_SSL_TRANSPORT_DATAGRAM )
+ return( 12 );
+#else
+ ((void) ssl);
+#endif
+ return( 4 );
+}
+
+#if defined(MBEDTLS_SSL_PROTO_DTLS)
+void mbedtls_ssl_send_flight_completed( mbedtls_ssl_context *ssl );
+void mbedtls_ssl_recv_flight_completed( mbedtls_ssl_context *ssl );
+int mbedtls_ssl_resend( mbedtls_ssl_context *ssl );
+int mbedtls_ssl_flight_transmit( mbedtls_ssl_context *ssl );
+#endif
+
+/* Visible for testing purposes only */
+#if defined(MBEDTLS_SSL_DTLS_ANTI_REPLAY)
+int mbedtls_ssl_dtls_replay_check( mbedtls_ssl_context *ssl );
+void mbedtls_ssl_dtls_replay_update( mbedtls_ssl_context *ssl );
+#endif
+
+/* constant-time buffer comparison */
+static inline int mbedtls_ssl_safer_memcmp( const void *a, const void *b, size_t n )
+{
+ size_t i;
+ volatile const unsigned char *A = (volatile const unsigned char *) a;
+ volatile const unsigned char *B = (volatile const unsigned char *) b;
+ volatile unsigned char diff = 0;
+
+ for( i = 0; i < n; i++ )
+ {
+ /* Read volatile data in order before computing diff.
+ * This avoids IAR compiler warning:
+ * 'the order of volatile accesses is undefined ..' */
+ unsigned char x = A[i], y = B[i];
+ diff |= x ^ y;
+ }
+
+ return( diff );
+}
+
+#if defined(MBEDTLS_SSL_PROTO_SSL3) || defined(MBEDTLS_SSL_PROTO_TLS1) || \
+ defined(MBEDTLS_SSL_PROTO_TLS1_1)
+int mbedtls_ssl_get_key_exchange_md_ssl_tls( mbedtls_ssl_context *ssl,
+ unsigned char *output,
+ unsigned char *data, size_t data_len );
+#endif /* MBEDTLS_SSL_PROTO_SSL3 || MBEDTLS_SSL_PROTO_TLS1 || \
+ MBEDTLS_SSL_PROTO_TLS1_1 */
+
+#if defined(MBEDTLS_SSL_PROTO_TLS1) || defined(MBEDTLS_SSL_PROTO_TLS1_1) || \
+ defined(MBEDTLS_SSL_PROTO_TLS1_2)
+int mbedtls_ssl_get_key_exchange_md_tls1_2( mbedtls_ssl_context *ssl,
+ unsigned char *hash, size_t *hashlen,
+ unsigned char *data, size_t data_len,
+ mbedtls_md_type_t md_alg );
+#endif /* MBEDTLS_SSL_PROTO_TLS1 || MBEDTLS_SSL_PROTO_TLS1_1 || \
+ MBEDTLS_SSL_PROTO_TLS1_2 */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ssl_internal.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ssl_ticket.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ssl_ticket.h
new file mode 100644
index 0000000..a84e781
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/ssl_ticket.h
@@ -0,0 +1,142 @@
+/**
+ * \file ssl_ticket.h
+ *
+ * \brief TLS server ticket callbacks implementation
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_SSL_TICKET_H
+#define MBEDTLS_SSL_TICKET_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+/*
+ * This implementation of the session ticket callbacks includes key
+ * management, rotating the keys periodically in order to preserve forward
+ * secrecy, when MBEDTLS_HAVE_TIME is defined.
+ */
+
+#include "ssl.h"
+#include "cipher.h"
+
+#if defined(MBEDTLS_THREADING_C)
+#include "threading.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief Information for session ticket protection
+ */
+typedef struct mbedtls_ssl_ticket_key
+{
+ unsigned char name[4]; /*!< random key identifier */
+ uint32_t generation_time; /*!< key generation timestamp (seconds) */
+ mbedtls_cipher_context_t ctx; /*!< context for auth enc/decryption */
+}
+mbedtls_ssl_ticket_key;
+
+/**
+ * \brief Context for session ticket handling functions
+ */
+typedef struct mbedtls_ssl_ticket_context
+{
+ mbedtls_ssl_ticket_key keys[2]; /*!< ticket protection keys */
+ unsigned char active; /*!< index of the currently active key */
+
+ uint32_t ticket_lifetime; /*!< lifetime of tickets in seconds */
+
+ /** Callback for getting (pseudo-)random numbers */
+ int (*f_rng)(void *, unsigned char *, size_t);
+ void *p_rng; /*!< context for the RNG function */
+
+#if defined(MBEDTLS_THREADING_C)
+ mbedtls_threading_mutex_t mutex;
+#endif
+}
+mbedtls_ssl_ticket_context;
+
+/**
+ * \brief Initialize a ticket context.
+ * (Just make it ready for mbedtls_ssl_ticket_setup()
+ * or mbedtls_ssl_ticket_free().)
+ *
+ * \param ctx Context to be initialized
+ */
+void mbedtls_ssl_ticket_init( mbedtls_ssl_ticket_context *ctx );
+
+/**
+ * \brief Prepare context to be actually used
+ *
+ * \param ctx Context to be set up
+ * \param f_rng RNG callback function
+ * \param p_rng RNG callback context
+ * \param cipher AEAD cipher to use for ticket protection.
+ * Recommended value: MBEDTLS_CIPHER_AES_256_GCM.
+ * \param lifetime Tickets lifetime in seconds
+ * Recommended value: 86400 (one day).
+ *
+ * \note It is highly recommended to select a cipher that is at
+ * least as strong as the the strongest ciphersuite
+ * supported. Usually that means a 256-bit key.
+ *
+ * \note The lifetime of the keys is twice the lifetime of tickets.
+ * It is recommended to pick a reasonnable lifetime so as not
+ * to negate the benefits of forward secrecy.
+ *
+ * \return 0 if successful,
+ * or a specific MBEDTLS_ERR_XXX error code
+ */
+int mbedtls_ssl_ticket_setup( mbedtls_ssl_ticket_context *ctx,
+ int (*f_rng)(void *, unsigned char *, size_t), void *p_rng,
+ mbedtls_cipher_type_t cipher,
+ uint32_t lifetime );
+
+/**
+ * \brief Implementation of the ticket write callback
+ *
+ * \note See \c mbedlts_ssl_ticket_write_t for description
+ */
+mbedtls_ssl_ticket_write_t mbedtls_ssl_ticket_write;
+
+/**
+ * \brief Implementation of the ticket parse callback
+ *
+ * \note See \c mbedlts_ssl_ticket_parse_t for description
+ */
+mbedtls_ssl_ticket_parse_t mbedtls_ssl_ticket_parse;
+
+/**
+ * \brief Free a context's content and zeroize it.
+ *
+ * \param ctx Context to be cleaned up
+ */
+void mbedtls_ssl_ticket_free( mbedtls_ssl_ticket_context *ctx );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ssl_ticket.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/threading.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/threading.h
new file mode 100644
index 0000000..92e6e6b
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/threading.h
@@ -0,0 +1,122 @@
+/**
+ * \file threading.h
+ *
+ * \brief Threading abstraction layer
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_THREADING_H
+#define MBEDTLS_THREADING_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stdlib.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* MBEDTLS_ERR_THREADING_FEATURE_UNAVAILABLE is deprecated and should not be
+ * used. */
+#define MBEDTLS_ERR_THREADING_FEATURE_UNAVAILABLE -0x001A /**< The selected feature is not available. */
+
+#define MBEDTLS_ERR_THREADING_BAD_INPUT_DATA -0x001C /**< Bad input parameters to function. */
+#define MBEDTLS_ERR_THREADING_MUTEX_ERROR -0x001E /**< Locking / unlocking / free failed with error code. */
+
+#if defined(MBEDTLS_THREADING_PTHREAD)
+#include <pthread.h>
+typedef struct mbedtls_threading_mutex_t
+{
+ pthread_mutex_t mutex;
+ char is_valid;
+} mbedtls_threading_mutex_t;
+#endif
+
+#if defined(MBEDTLS_THREADING_ALT)
+/* You should define the mbedtls_threading_mutex_t type in your header */
+#include "threading_alt.h"
+
+/**
+ * \brief Set your alternate threading implementation function
+ * pointers and initialize global mutexes. If used, this
+ * function must be called once in the main thread before any
+ * other mbed TLS function is called, and
+ * mbedtls_threading_free_alt() must be called once in the main
+ * thread after all other mbed TLS functions.
+ *
+ * \note mutex_init() and mutex_free() don't return a status code.
+ * If mutex_init() fails, it should leave its argument (the
+ * mutex) in a state such that mutex_lock() will fail when
+ * called with this argument.
+ *
+ * \param mutex_init the init function implementation
+ * \param mutex_free the free function implementation
+ * \param mutex_lock the lock function implementation
+ * \param mutex_unlock the unlock function implementation
+ */
+void mbedtls_threading_set_alt( void (*mutex_init)( mbedtls_threading_mutex_t * ),
+ void (*mutex_free)( mbedtls_threading_mutex_t * ),
+ int (*mutex_lock)( mbedtls_threading_mutex_t * ),
+ int (*mutex_unlock)( mbedtls_threading_mutex_t * ) );
+
+/**
+ * \brief Free global mutexes.
+ */
+void mbedtls_threading_free_alt( void );
+#endif /* MBEDTLS_THREADING_ALT */
+
+#if defined(MBEDTLS_THREADING_C)
+/*
+ * The function pointers for mutex_init, mutex_free, mutex_ and mutex_unlock
+ *
+ * All these functions are expected to work or the result will be undefined.
+ */
+extern void (*mbedtls_mutex_init)( mbedtls_threading_mutex_t *mutex );
+extern void (*mbedtls_mutex_free)( mbedtls_threading_mutex_t *mutex );
+extern int (*mbedtls_mutex_lock)( mbedtls_threading_mutex_t *mutex );
+extern int (*mbedtls_mutex_unlock)( mbedtls_threading_mutex_t *mutex );
+
+/*
+ * Global mutexes
+ */
+#if defined(MBEDTLS_FS_IO)
+extern mbedtls_threading_mutex_t mbedtls_threading_readdir_mutex;
+#endif
+
+#if defined(MBEDTLS_HAVE_TIME_DATE) && !defined(MBEDTLS_PLATFORM_GMTIME_R_ALT)
+/* This mutex may or may not be used in the default definition of
+ * mbedtls_platform_gmtime_r(), but in order to determine that,
+ * we need to check POSIX features, hence modify _POSIX_C_SOURCE.
+ * With the current approach, this declaration is orphaned, lacking
+ * an accompanying definition, in case mbedtls_platform_gmtime_r()
+ * doesn't need it, but that's not a problem. */
+extern mbedtls_threading_mutex_t mbedtls_threading_gmtime_mutex;
+#endif /* MBEDTLS_HAVE_TIME_DATE && !MBEDTLS_PLATFORM_GMTIME_R_ALT */
+
+#endif /* MBEDTLS_THREADING_C */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* threading.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/threading_alt.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/threading_alt.h
new file mode 100644
index 0000000..b5fecdb
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/threading_alt.h
@@ -0,0 +1,21 @@
+/*
+ * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause OR Arm’s non-OSI source license
+ */
+
+#ifndef MBEDTLS_THREADING_ALT_H
+#define MBEDTLS_THREADING_ALT_H
+
+#include <stdint.h>
+#include "nrf_cc310_platform_mutex.h"
+
+/** @brief Alternate declaration of mbedtls mutex type
+ *
+ * The RTOS may require allocation and freeing of resources
+ * as the inner type of the mutex is represented by an
+ * RTOS-friendly void pointer.
+ */
+typedef nrf_cc310_platform_mutex_t mbedtls_threading_mutex_t;
+
+#endif /* MBEDTLS_THREADING_ALT_H */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/timing.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/timing.h
new file mode 100644
index 0000000..a965fe0
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/timing.h
@@ -0,0 +1,153 @@
+/**
+ * \file timing.h
+ *
+ * \brief Portable interface to timeouts and to the CPU cycle counter
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_TIMING_H
+#define MBEDTLS_TIMING_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_TIMING_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief timer structure
+ */
+struct mbedtls_timing_hr_time
+{
+ unsigned char opaque[32];
+};
+
+/**
+ * \brief Context for mbedtls_timing_set/get_delay()
+ */
+typedef struct mbedtls_timing_delay_context
+{
+ struct mbedtls_timing_hr_time timer;
+ uint32_t int_ms;
+ uint32_t fin_ms;
+} mbedtls_timing_delay_context;
+
+#else /* MBEDTLS_TIMING_ALT */
+#include "timing_alt.h"
+#endif /* MBEDTLS_TIMING_ALT */
+
+extern volatile int mbedtls_timing_alarmed;
+
+/**
+ * \brief Return the CPU cycle counter value
+ *
+ * \warning This is only a best effort! Do not rely on this!
+ * In particular, it is known to be unreliable on virtual
+ * machines.
+ *
+ * \note This value starts at an unspecified origin and
+ * may wrap around.
+ */
+unsigned long mbedtls_timing_hardclock( void );
+
+/**
+ * \brief Return the elapsed time in milliseconds
+ *
+ * \param val points to a timer structure
+ * \param reset If 0, query the elapsed time. Otherwise (re)start the timer.
+ *
+ * \return Elapsed time since the previous reset in ms. When
+ * restarting, this is always 0.
+ *
+ * \note To initialize a timer, call this function with reset=1.
+ *
+ * Determining the elapsed time and resetting the timer is not
+ * atomic on all platforms, so after the sequence
+ * `{ get_timer(1); ...; time1 = get_timer(1); ...; time2 =
+ * get_timer(0) }` the value time1+time2 is only approximately
+ * the delay since the first reset.
+ */
+unsigned long mbedtls_timing_get_timer( struct mbedtls_timing_hr_time *val, int reset );
+
+/**
+ * \brief Setup an alarm clock
+ *
+ * \param seconds delay before the "mbedtls_timing_alarmed" flag is set
+ * (must be >=0)
+ *
+ * \warning Only one alarm at a time is supported. In a threaded
+ * context, this means one for the whole process, not one per
+ * thread.
+ */
+void mbedtls_set_alarm( int seconds );
+
+/**
+ * \brief Set a pair of delays to watch
+ * (See \c mbedtls_timing_get_delay().)
+ *
+ * \param data Pointer to timing data.
+ * Must point to a valid \c mbedtls_timing_delay_context struct.
+ * \param int_ms First (intermediate) delay in milliseconds.
+ * The effect if int_ms > fin_ms is unspecified.
+ * \param fin_ms Second (final) delay in milliseconds.
+ * Pass 0 to cancel the current delay.
+ *
+ * \note To set a single delay, either use \c mbedtls_timing_set_timer
+ * directly or use this function with int_ms == fin_ms.
+ */
+void mbedtls_timing_set_delay( void *data, uint32_t int_ms, uint32_t fin_ms );
+
+/**
+ * \brief Get the status of delays
+ * (Memory helper: number of delays passed.)
+ *
+ * \param data Pointer to timing data
+ * Must point to a valid \c mbedtls_timing_delay_context struct.
+ *
+ * \return -1 if cancelled (fin_ms = 0),
+ * 0 if none of the delays are passed,
+ * 1 if only the intermediate delay is passed,
+ * 2 if the final delay is passed.
+ */
+int mbedtls_timing_get_delay( void *data );
+
+#if defined(MBEDTLS_SELF_TEST)
+/**
+ * \brief Checkup routine
+ *
+ * \return 0 if successful, or 1 if a test failed
+ */
+int mbedtls_timing_self_test( int verbose );
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* timing.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/version.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/version.h
new file mode 100644
index 0000000..ef8e4c1
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/version.h
@@ -0,0 +1,112 @@
+/**
+ * \file version.h
+ *
+ * \brief Run-time version information
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+/*
+ * This set of compile-time defines and run-time variables can be used to
+ * determine the version number of the mbed TLS library used.
+ */
+#ifndef MBEDTLS_VERSION_H
+#define MBEDTLS_VERSION_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+/**
+ * The version number x.y.z is split into three parts.
+ * Major, Minor, Patchlevel
+ */
+#define MBEDTLS_VERSION_MAJOR 2
+#define MBEDTLS_VERSION_MINOR 16
+#define MBEDTLS_VERSION_PATCH 2
+
+/**
+ * The single version number has the following structure:
+ * MMNNPP00
+ * Major version | Minor version | Patch version
+ */
+#define MBEDTLS_VERSION_NUMBER 0x02100200
+#define MBEDTLS_VERSION_STRING "2.16.2"
+#define MBEDTLS_VERSION_STRING_FULL "mbed TLS 2.16.2"
+
+#if defined(MBEDTLS_VERSION_C)
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Get the version number.
+ *
+ * \return The constructed version number in the format
+ * MMNNPP00 (Major, Minor, Patch).
+ */
+unsigned int mbedtls_version_get_number( void );
+
+/**
+ * Get the version string ("x.y.z").
+ *
+ * \param string The string that will receive the value.
+ * (Should be at least 9 bytes in size)
+ */
+void mbedtls_version_get_string( char *string );
+
+/**
+ * Get the full version string ("mbed TLS x.y.z").
+ *
+ * \param string The string that will receive the value. The mbed TLS version
+ * string will use 18 bytes AT MOST including a terminating
+ * null byte.
+ * (So the buffer should be at least 18 bytes to receive this
+ * version string).
+ */
+void mbedtls_version_get_string_full( char *string );
+
+/**
+ * \brief Check if support for a feature was compiled into this
+ * mbed TLS binary. This allows you to see at runtime if the
+ * library was for instance compiled with or without
+ * Multi-threading support.
+ *
+ * \note only checks against defines in the sections "System
+ * support", "mbed TLS modules" and "mbed TLS feature
+ * support" in config.h
+ *
+ * \param feature The string for the define to check (e.g. "MBEDTLS_AES_C")
+ *
+ * \return 0 if the feature is present,
+ * -1 if the feature is not present and
+ * -2 if support for feature checking as a whole was not
+ * compiled in.
+ */
+int mbedtls_version_check_feature( const char *feature );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBEDTLS_VERSION_C */
+
+#endif /* version.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/x509.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/x509.h
new file mode 100644
index 0000000..9ae825c
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/x509.h
@@ -0,0 +1,337 @@
+/**
+ * \file x509.h
+ *
+ * \brief X.509 generic defines and structures
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_X509_H
+#define MBEDTLS_X509_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "asn1.h"
+#include "pk.h"
+
+#if defined(MBEDTLS_RSA_C)
+#include "rsa.h"
+#endif
+
+/**
+ * \addtogroup x509_module
+ * \{
+ */
+
+#if !defined(MBEDTLS_X509_MAX_INTERMEDIATE_CA)
+/**
+ * Maximum number of intermediate CAs in a verification chain.
+ * That is, maximum length of the chain, excluding the end-entity certificate
+ * and the trusted root certificate.
+ *
+ * Set this to a low value to prevent an adversary from making you waste
+ * resources verifying an overlong certificate chain.
+ */
+#define MBEDTLS_X509_MAX_INTERMEDIATE_CA 8
+#endif
+
+/**
+ * \name X509 Error codes
+ * \{
+ */
+#define MBEDTLS_ERR_X509_FEATURE_UNAVAILABLE -0x2080 /**< Unavailable feature, e.g. RSA hashing/encryption combination. */
+#define MBEDTLS_ERR_X509_UNKNOWN_OID -0x2100 /**< Requested OID is unknown. */
+#define MBEDTLS_ERR_X509_INVALID_FORMAT -0x2180 /**< The CRT/CRL/CSR format is invalid, e.g. different type expected. */
+#define MBEDTLS_ERR_X509_INVALID_VERSION -0x2200 /**< The CRT/CRL/CSR version element is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_SERIAL -0x2280 /**< The serial tag or value is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_ALG -0x2300 /**< The algorithm tag or value is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_NAME -0x2380 /**< The name tag or value is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_DATE -0x2400 /**< The date tag or value is invalid. */
+#define MBEDTLS_ERR_X509_INVALID_SIGNATURE -0x2480 /**< The signature tag or value invalid. */
+#define MBEDTLS_ERR_X509_INVALID_EXTENSIONS -0x2500 /**< The extension tag or value is invalid. */
+#define MBEDTLS_ERR_X509_UNKNOWN_VERSION -0x2580 /**< CRT/CRL/CSR has an unsupported version number. */
+#define MBEDTLS_ERR_X509_UNKNOWN_SIG_ALG -0x2600 /**< Signature algorithm (oid) is unsupported. */
+#define MBEDTLS_ERR_X509_SIG_MISMATCH -0x2680 /**< Signature algorithms do not match. (see \c ::mbedtls_x509_crt sig_oid) */
+#define MBEDTLS_ERR_X509_CERT_VERIFY_FAILED -0x2700 /**< Certificate verification failed, e.g. CRL, CA or signature check failed. */
+#define MBEDTLS_ERR_X509_CERT_UNKNOWN_FORMAT -0x2780 /**< Format not recognized as DER or PEM. */
+#define MBEDTLS_ERR_X509_BAD_INPUT_DATA -0x2800 /**< Input invalid. */
+#define MBEDTLS_ERR_X509_ALLOC_FAILED -0x2880 /**< Allocation of memory failed. */
+#define MBEDTLS_ERR_X509_FILE_IO_ERROR -0x2900 /**< Read/write of file failed. */
+#define MBEDTLS_ERR_X509_BUFFER_TOO_SMALL -0x2980 /**< Destination buffer is too small. */
+#define MBEDTLS_ERR_X509_FATAL_ERROR -0x3000 /**< A fatal error occured, eg the chain is too long or the vrfy callback failed. */
+/* \} name */
+
+/**
+ * \name X509 Verify codes
+ * \{
+ */
+/* Reminder: update x509_crt_verify_strings[] in library/x509_crt.c */
+#define MBEDTLS_X509_BADCERT_EXPIRED 0x01 /**< The certificate validity has expired. */
+#define MBEDTLS_X509_BADCERT_REVOKED 0x02 /**< The certificate has been revoked (is on a CRL). */
+#define MBEDTLS_X509_BADCERT_CN_MISMATCH 0x04 /**< The certificate Common Name (CN) does not match with the expected CN. */
+#define MBEDTLS_X509_BADCERT_NOT_TRUSTED 0x08 /**< The certificate is not correctly signed by the trusted CA. */
+#define MBEDTLS_X509_BADCRL_NOT_TRUSTED 0x10 /**< The CRL is not correctly signed by the trusted CA. */
+#define MBEDTLS_X509_BADCRL_EXPIRED 0x20 /**< The CRL is expired. */
+#define MBEDTLS_X509_BADCERT_MISSING 0x40 /**< Certificate was missing. */
+#define MBEDTLS_X509_BADCERT_SKIP_VERIFY 0x80 /**< Certificate verification was skipped. */
+#define MBEDTLS_X509_BADCERT_OTHER 0x0100 /**< Other reason (can be used by verify callback) */
+#define MBEDTLS_X509_BADCERT_FUTURE 0x0200 /**< The certificate validity starts in the future. */
+#define MBEDTLS_X509_BADCRL_FUTURE 0x0400 /**< The CRL is from the future */
+#define MBEDTLS_X509_BADCERT_KEY_USAGE 0x0800 /**< Usage does not match the keyUsage extension. */
+#define MBEDTLS_X509_BADCERT_EXT_KEY_USAGE 0x1000 /**< Usage does not match the extendedKeyUsage extension. */
+#define MBEDTLS_X509_BADCERT_NS_CERT_TYPE 0x2000 /**< Usage does not match the nsCertType extension. */
+#define MBEDTLS_X509_BADCERT_BAD_MD 0x4000 /**< The certificate is signed with an unacceptable hash. */
+#define MBEDTLS_X509_BADCERT_BAD_PK 0x8000 /**< The certificate is signed with an unacceptable PK alg (eg RSA vs ECDSA). */
+#define MBEDTLS_X509_BADCERT_BAD_KEY 0x010000 /**< The certificate is signed with an unacceptable key (eg bad curve, RSA too short). */
+#define MBEDTLS_X509_BADCRL_BAD_MD 0x020000 /**< The CRL is signed with an unacceptable hash. */
+#define MBEDTLS_X509_BADCRL_BAD_PK 0x040000 /**< The CRL is signed with an unacceptable PK alg (eg RSA vs ECDSA). */
+#define MBEDTLS_X509_BADCRL_BAD_KEY 0x080000 /**< The CRL is signed with an unacceptable key (eg bad curve, RSA too short). */
+
+/* \} name */
+/* \} addtogroup x509_module */
+
+/*
+ * X.509 v3 Key Usage Extension flags
+ * Reminder: update x509_info_key_usage() when adding new flags.
+ */
+#define MBEDTLS_X509_KU_DIGITAL_SIGNATURE (0x80) /* bit 0 */
+#define MBEDTLS_X509_KU_NON_REPUDIATION (0x40) /* bit 1 */
+#define MBEDTLS_X509_KU_KEY_ENCIPHERMENT (0x20) /* bit 2 */
+#define MBEDTLS_X509_KU_DATA_ENCIPHERMENT (0x10) /* bit 3 */
+#define MBEDTLS_X509_KU_KEY_AGREEMENT (0x08) /* bit 4 */
+#define MBEDTLS_X509_KU_KEY_CERT_SIGN (0x04) /* bit 5 */
+#define MBEDTLS_X509_KU_CRL_SIGN (0x02) /* bit 6 */
+#define MBEDTLS_X509_KU_ENCIPHER_ONLY (0x01) /* bit 7 */
+#define MBEDTLS_X509_KU_DECIPHER_ONLY (0x8000) /* bit 8 */
+
+/*
+ * Netscape certificate types
+ * (http://www.mozilla.org/projects/security/pki/nss/tech-notes/tn3.html)
+ */
+
+#define MBEDTLS_X509_NS_CERT_TYPE_SSL_CLIENT (0x80) /* bit 0 */
+#define MBEDTLS_X509_NS_CERT_TYPE_SSL_SERVER (0x40) /* bit 1 */
+#define MBEDTLS_X509_NS_CERT_TYPE_EMAIL (0x20) /* bit 2 */
+#define MBEDTLS_X509_NS_CERT_TYPE_OBJECT_SIGNING (0x10) /* bit 3 */
+#define MBEDTLS_X509_NS_CERT_TYPE_RESERVED (0x08) /* bit 4 */
+#define MBEDTLS_X509_NS_CERT_TYPE_SSL_CA (0x04) /* bit 5 */
+#define MBEDTLS_X509_NS_CERT_TYPE_EMAIL_CA (0x02) /* bit 6 */
+#define MBEDTLS_X509_NS_CERT_TYPE_OBJECT_SIGNING_CA (0x01) /* bit 7 */
+
+/*
+ * X.509 extension types
+ *
+ * Comments refer to the status for using certificates. Status can be
+ * different for writing certificates or reading CRLs or CSRs.
+ */
+#define MBEDTLS_X509_EXT_AUTHORITY_KEY_IDENTIFIER (1 << 0)
+#define MBEDTLS_X509_EXT_SUBJECT_KEY_IDENTIFIER (1 << 1)
+#define MBEDTLS_X509_EXT_KEY_USAGE (1 << 2)
+#define MBEDTLS_X509_EXT_CERTIFICATE_POLICIES (1 << 3)
+#define MBEDTLS_X509_EXT_POLICY_MAPPINGS (1 << 4)
+#define MBEDTLS_X509_EXT_SUBJECT_ALT_NAME (1 << 5) /* Supported (DNS) */
+#define MBEDTLS_X509_EXT_ISSUER_ALT_NAME (1 << 6)
+#define MBEDTLS_X509_EXT_SUBJECT_DIRECTORY_ATTRS (1 << 7)
+#define MBEDTLS_X509_EXT_BASIC_CONSTRAINTS (1 << 8) /* Supported */
+#define MBEDTLS_X509_EXT_NAME_CONSTRAINTS (1 << 9)
+#define MBEDTLS_X509_EXT_POLICY_CONSTRAINTS (1 << 10)
+#define MBEDTLS_X509_EXT_EXTENDED_KEY_USAGE (1 << 11)
+#define MBEDTLS_X509_EXT_CRL_DISTRIBUTION_POINTS (1 << 12)
+#define MBEDTLS_X509_EXT_INIHIBIT_ANYPOLICY (1 << 13)
+#define MBEDTLS_X509_EXT_FRESHEST_CRL (1 << 14)
+
+#define MBEDTLS_X509_EXT_NS_CERT_TYPE (1 << 16)
+
+/*
+ * Storage format identifiers
+ * Recognized formats: PEM and DER
+ */
+#define MBEDTLS_X509_FORMAT_DER 1
+#define MBEDTLS_X509_FORMAT_PEM 2
+
+#define MBEDTLS_X509_MAX_DN_NAME_SIZE 256 /**< Maximum value size of a DN entry */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \addtogroup x509_module
+ * \{ */
+
+/**
+ * \name Structures for parsing X.509 certificates, CRLs and CSRs
+ * \{
+ */
+
+/**
+ * Type-length-value structure that allows for ASN1 using DER.
+ */
+typedef mbedtls_asn1_buf mbedtls_x509_buf;
+
+/**
+ * Container for ASN1 bit strings.
+ */
+typedef mbedtls_asn1_bitstring mbedtls_x509_bitstring;
+
+/**
+ * Container for ASN1 named information objects.
+ * It allows for Relative Distinguished Names (e.g. cn=localhost,ou=code,etc.).
+ */
+typedef mbedtls_asn1_named_data mbedtls_x509_name;
+
+/**
+ * Container for a sequence of ASN.1 items
+ */
+typedef mbedtls_asn1_sequence mbedtls_x509_sequence;
+
+/** Container for date and time (precision in seconds). */
+typedef struct mbedtls_x509_time
+{
+ int year, mon, day; /**< Date. */
+ int hour, min, sec; /**< Time. */
+}
+mbedtls_x509_time;
+
+/** \} name Structures for parsing X.509 certificates, CRLs and CSRs */
+/** \} addtogroup x509_module */
+
+/**
+ * \brief Store the certificate DN in printable form into buf;
+ * no more than size characters will be written.
+ *
+ * \param buf Buffer to write to
+ * \param size Maximum size of buffer
+ * \param dn The X509 name to represent
+ *
+ * \return The length of the string written (not including the
+ * terminated nul byte), or a negative error code.
+ */
+int mbedtls_x509_dn_gets( char *buf, size_t size, const mbedtls_x509_name *dn );
+
+/**
+ * \brief Store the certificate serial in printable form into buf;
+ * no more than size characters will be written.
+ *
+ * \param buf Buffer to write to
+ * \param size Maximum size of buffer
+ * \param serial The X509 serial to represent
+ *
+ * \return The length of the string written (not including the
+ * terminated nul byte), or a negative error code.
+ */
+int mbedtls_x509_serial_gets( char *buf, size_t size, const mbedtls_x509_buf *serial );
+
+/**
+ * \brief Check a given mbedtls_x509_time against the system time
+ * and tell if it's in the past.
+ *
+ * \note Intended usage is "if( is_past( valid_to ) ) ERROR".
+ * Hence the return value of 1 if on internal errors.
+ *
+ * \param to mbedtls_x509_time to check
+ *
+ * \return 1 if the given time is in the past or an error occured,
+ * 0 otherwise.
+ */
+int mbedtls_x509_time_is_past( const mbedtls_x509_time *to );
+
+/**
+ * \brief Check a given mbedtls_x509_time against the system time
+ * and tell if it's in the future.
+ *
+ * \note Intended usage is "if( is_future( valid_from ) ) ERROR".
+ * Hence the return value of 1 if on internal errors.
+ *
+ * \param from mbedtls_x509_time to check
+ *
+ * \return 1 if the given time is in the future or an error occured,
+ * 0 otherwise.
+ */
+int mbedtls_x509_time_is_future( const mbedtls_x509_time *from );
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief Checkup routine
+ *
+ * \return 0 if successful, or 1 if the test failed
+ */
+int mbedtls_x509_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+/*
+ * Internal module functions. You probably do not want to use these unless you
+ * know you do.
+ */
+int mbedtls_x509_get_name( unsigned char **p, const unsigned char *end,
+ mbedtls_x509_name *cur );
+int mbedtls_x509_get_alg_null( unsigned char **p, const unsigned char *end,
+ mbedtls_x509_buf *alg );
+int mbedtls_x509_get_alg( unsigned char **p, const unsigned char *end,
+ mbedtls_x509_buf *alg, mbedtls_x509_buf *params );
+#if defined(MBEDTLS_X509_RSASSA_PSS_SUPPORT)
+int mbedtls_x509_get_rsassa_pss_params( const mbedtls_x509_buf *params,
+ mbedtls_md_type_t *md_alg, mbedtls_md_type_t *mgf_md,
+ int *salt_len );
+#endif
+int mbedtls_x509_get_sig( unsigned char **p, const unsigned char *end, mbedtls_x509_buf *sig );
+int mbedtls_x509_get_sig_alg( const mbedtls_x509_buf *sig_oid, const mbedtls_x509_buf *sig_params,
+ mbedtls_md_type_t *md_alg, mbedtls_pk_type_t *pk_alg,
+ void **sig_opts );
+int mbedtls_x509_get_time( unsigned char **p, const unsigned char *end,
+ mbedtls_x509_time *t );
+int mbedtls_x509_get_serial( unsigned char **p, const unsigned char *end,
+ mbedtls_x509_buf *serial );
+int mbedtls_x509_get_ext( unsigned char **p, const unsigned char *end,
+ mbedtls_x509_buf *ext, int tag );
+int mbedtls_x509_sig_alg_gets( char *buf, size_t size, const mbedtls_x509_buf *sig_oid,
+ mbedtls_pk_type_t pk_alg, mbedtls_md_type_t md_alg,
+ const void *sig_opts );
+int mbedtls_x509_key_size_helper( char *buf, size_t buf_size, const char *name );
+int mbedtls_x509_string_to_names( mbedtls_asn1_named_data **head, const char *name );
+int mbedtls_x509_set_extension( mbedtls_asn1_named_data **head, const char *oid, size_t oid_len,
+ int critical, const unsigned char *val,
+ size_t val_len );
+int mbedtls_x509_write_extensions( unsigned char **p, unsigned char *start,
+ mbedtls_asn1_named_data *first );
+int mbedtls_x509_write_names( unsigned char **p, unsigned char *start,
+ mbedtls_asn1_named_data *first );
+int mbedtls_x509_write_sig( unsigned char **p, unsigned char *start,
+ const char *oid, size_t oid_len,
+ unsigned char *sig, size_t size );
+
+#define MBEDTLS_X509_SAFE_SNPRINTF \
+ do { \
+ if( ret < 0 || (size_t) ret >= n ) \
+ return( MBEDTLS_ERR_X509_BUFFER_TOO_SMALL ); \
+ \
+ n -= (size_t) ret; \
+ p += (size_t) ret; \
+ } while( 0 )
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* x509.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/x509_crl.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/x509_crl.h
new file mode 100644
index 0000000..08a4283
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/x509_crl.h
@@ -0,0 +1,174 @@
+/**
+ * \file x509_crl.h
+ *
+ * \brief X.509 certificate revocation list parsing
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_X509_CRL_H
+#define MBEDTLS_X509_CRL_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "x509.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \addtogroup x509_module
+ * \{ */
+
+/**
+ * \name Structures and functions for parsing CRLs
+ * \{
+ */
+
+/**
+ * Certificate revocation list entry.
+ * Contains the CA-specific serial numbers and revocation dates.
+ */
+typedef struct mbedtls_x509_crl_entry
+{
+ mbedtls_x509_buf raw;
+
+ mbedtls_x509_buf serial;
+
+ mbedtls_x509_time revocation_date;
+
+ mbedtls_x509_buf entry_ext;
+
+ struct mbedtls_x509_crl_entry *next;
+}
+mbedtls_x509_crl_entry;
+
+/**
+ * Certificate revocation list structure.
+ * Every CRL may have multiple entries.
+ */
+typedef struct mbedtls_x509_crl
+{
+ mbedtls_x509_buf raw; /**< The raw certificate data (DER). */
+ mbedtls_x509_buf tbs; /**< The raw certificate body (DER). The part that is To Be Signed. */
+
+ int version; /**< CRL version (1=v1, 2=v2) */
+ mbedtls_x509_buf sig_oid; /**< CRL signature type identifier */
+
+ mbedtls_x509_buf issuer_raw; /**< The raw issuer data (DER). */
+
+ mbedtls_x509_name issuer; /**< The parsed issuer data (named information object). */
+
+ mbedtls_x509_time this_update;
+ mbedtls_x509_time next_update;
+
+ mbedtls_x509_crl_entry entry; /**< The CRL entries containing the certificate revocation times for this CA. */
+
+ mbedtls_x509_buf crl_ext;
+
+ mbedtls_x509_buf sig_oid2;
+ mbedtls_x509_buf sig;
+ mbedtls_md_type_t sig_md; /**< Internal representation of the MD algorithm of the signature algorithm, e.g. MBEDTLS_MD_SHA256 */
+ mbedtls_pk_type_t sig_pk; /**< Internal representation of the Public Key algorithm of the signature algorithm, e.g. MBEDTLS_PK_RSA */
+ void *sig_opts; /**< Signature options to be passed to mbedtls_pk_verify_ext(), e.g. for RSASSA-PSS */
+
+ struct mbedtls_x509_crl *next;
+}
+mbedtls_x509_crl;
+
+/**
+ * \brief Parse a DER-encoded CRL and append it to the chained list
+ *
+ * \param chain points to the start of the chain
+ * \param buf buffer holding the CRL data in DER format
+ * \param buflen size of the buffer
+ * (including the terminating null byte for PEM data)
+ *
+ * \return 0 if successful, or a specific X509 or PEM error code
+ */
+int mbedtls_x509_crl_parse_der( mbedtls_x509_crl *chain,
+ const unsigned char *buf, size_t buflen );
+/**
+ * \brief Parse one or more CRLs and append them to the chained list
+ *
+ * \note Mutliple CRLs are accepted only if using PEM format
+ *
+ * \param chain points to the start of the chain
+ * \param buf buffer holding the CRL data in PEM or DER format
+ * \param buflen size of the buffer
+ * (including the terminating null byte for PEM data)
+ *
+ * \return 0 if successful, or a specific X509 or PEM error code
+ */
+int mbedtls_x509_crl_parse( mbedtls_x509_crl *chain, const unsigned char *buf, size_t buflen );
+
+#if defined(MBEDTLS_FS_IO)
+/**
+ * \brief Load one or more CRLs and append them to the chained list
+ *
+ * \note Mutliple CRLs are accepted only if using PEM format
+ *
+ * \param chain points to the start of the chain
+ * \param path filename to read the CRLs from (in PEM or DER encoding)
+ *
+ * \return 0 if successful, or a specific X509 or PEM error code
+ */
+int mbedtls_x509_crl_parse_file( mbedtls_x509_crl *chain, const char *path );
+#endif /* MBEDTLS_FS_IO */
+
+/**
+ * \brief Returns an informational string about the CRL.
+ *
+ * \param buf Buffer to write to
+ * \param size Maximum size of buffer
+ * \param prefix A line prefix
+ * \param crl The X509 CRL to represent
+ *
+ * \return The length of the string written (not including the
+ * terminated nul byte), or a negative error code.
+ */
+int mbedtls_x509_crl_info( char *buf, size_t size, const char *prefix,
+ const mbedtls_x509_crl *crl );
+
+/**
+ * \brief Initialize a CRL (chain)
+ *
+ * \param crl CRL chain to initialize
+ */
+void mbedtls_x509_crl_init( mbedtls_x509_crl *crl );
+
+/**
+ * \brief Unallocate all CRL data
+ *
+ * \param crl CRL chain to free
+ */
+void mbedtls_x509_crl_free( mbedtls_x509_crl *crl );
+
+/* \} name */
+/* \} addtogroup x509_module */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* mbedtls_x509_crl.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/x509_crt.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/x509_crt.h
new file mode 100644
index 0000000..670bd10
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/x509_crt.h
@@ -0,0 +1,785 @@
+/**
+ * \file x509_crt.h
+ *
+ * \brief X.509 certificate parsing and writing
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_X509_CRT_H
+#define MBEDTLS_X509_CRT_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "x509.h"
+#include "x509_crl.h"
+
+/**
+ * \addtogroup x509_module
+ * \{
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \name Structures and functions for parsing and writing X.509 certificates
+ * \{
+ */
+
+/**
+ * Container for an X.509 certificate. The certificate may be chained.
+ */
+typedef struct mbedtls_x509_crt
+{
+ mbedtls_x509_buf raw; /**< The raw certificate data (DER). */
+ mbedtls_x509_buf tbs; /**< The raw certificate body (DER). The part that is To Be Signed. */
+
+ int version; /**< The X.509 version. (1=v1, 2=v2, 3=v3) */
+ mbedtls_x509_buf serial; /**< Unique id for certificate issued by a specific CA. */
+ mbedtls_x509_buf sig_oid; /**< Signature algorithm, e.g. sha1RSA */
+
+ mbedtls_x509_buf issuer_raw; /**< The raw issuer data (DER). Used for quick comparison. */
+ mbedtls_x509_buf subject_raw; /**< The raw subject data (DER). Used for quick comparison. */
+
+ mbedtls_x509_name issuer; /**< The parsed issuer data (named information object). */
+ mbedtls_x509_name subject; /**< The parsed subject data (named information object). */
+
+ mbedtls_x509_time valid_from; /**< Start time of certificate validity. */
+ mbedtls_x509_time valid_to; /**< End time of certificate validity. */
+
+ mbedtls_pk_context pk; /**< Container for the public key context. */
+
+ mbedtls_x509_buf issuer_id; /**< Optional X.509 v2/v3 issuer unique identifier. */
+ mbedtls_x509_buf subject_id; /**< Optional X.509 v2/v3 subject unique identifier. */
+ mbedtls_x509_buf v3_ext; /**< Optional X.509 v3 extensions. */
+ mbedtls_x509_sequence subject_alt_names; /**< Optional list of Subject Alternative Names (Only dNSName supported). */
+
+ int ext_types; /**< Bit string containing detected and parsed extensions */
+ int ca_istrue; /**< Optional Basic Constraint extension value: 1 if this certificate belongs to a CA, 0 otherwise. */
+ int max_pathlen; /**< Optional Basic Constraint extension value: The maximum path length to the root certificate. Path length is 1 higher than RFC 5280 'meaning', so 1+ */
+
+ unsigned int key_usage; /**< Optional key usage extension value: See the values in x509.h */
+
+ mbedtls_x509_sequence ext_key_usage; /**< Optional list of extended key usage OIDs. */
+
+ unsigned char ns_cert_type; /**< Optional Netscape certificate type extension value: See the values in x509.h */
+
+ mbedtls_x509_buf sig; /**< Signature: hash of the tbs part signed with the private key. */
+ mbedtls_md_type_t sig_md; /**< Internal representation of the MD algorithm of the signature algorithm, e.g. MBEDTLS_MD_SHA256 */
+ mbedtls_pk_type_t sig_pk; /**< Internal representation of the Public Key algorithm of the signature algorithm, e.g. MBEDTLS_PK_RSA */
+ void *sig_opts; /**< Signature options to be passed to mbedtls_pk_verify_ext(), e.g. for RSASSA-PSS */
+
+ struct mbedtls_x509_crt *next; /**< Next certificate in the CA-chain. */
+}
+mbedtls_x509_crt;
+
+/**
+ * Build flag from an algorithm/curve identifier (pk, md, ecp)
+ * Since 0 is always XXX_NONE, ignore it.
+ */
+#define MBEDTLS_X509_ID_FLAG( id ) ( 1 << ( (id) - 1 ) )
+
+/**
+ * Security profile for certificate verification.
+ *
+ * All lists are bitfields, built by ORing flags from MBEDTLS_X509_ID_FLAG().
+ */
+typedef struct mbedtls_x509_crt_profile
+{
+ uint32_t allowed_mds; /**< MDs for signatures */
+ uint32_t allowed_pks; /**< PK algs for signatures */
+ uint32_t allowed_curves; /**< Elliptic curves for ECDSA */
+ uint32_t rsa_min_bitlen; /**< Minimum size for RSA keys */
+}
+mbedtls_x509_crt_profile;
+
+#define MBEDTLS_X509_CRT_VERSION_1 0
+#define MBEDTLS_X509_CRT_VERSION_2 1
+#define MBEDTLS_X509_CRT_VERSION_3 2
+
+#define MBEDTLS_X509_RFC5280_MAX_SERIAL_LEN 32
+#define MBEDTLS_X509_RFC5280_UTC_TIME_LEN 15
+
+#if !defined( MBEDTLS_X509_MAX_FILE_PATH_LEN )
+#define MBEDTLS_X509_MAX_FILE_PATH_LEN 512
+#endif
+
+/**
+ * Container for writing a certificate (CRT)
+ */
+typedef struct mbedtls_x509write_cert
+{
+ int version;
+ mbedtls_mpi serial;
+ mbedtls_pk_context *subject_key;
+ mbedtls_pk_context *issuer_key;
+ mbedtls_asn1_named_data *subject;
+ mbedtls_asn1_named_data *issuer;
+ mbedtls_md_type_t md_alg;
+ char not_before[MBEDTLS_X509_RFC5280_UTC_TIME_LEN + 1];
+ char not_after[MBEDTLS_X509_RFC5280_UTC_TIME_LEN + 1];
+ mbedtls_asn1_named_data *extensions;
+}
+mbedtls_x509write_cert;
+
+/**
+ * Item in a verification chain: cert and flags for it
+ */
+typedef struct {
+ mbedtls_x509_crt *crt;
+ uint32_t flags;
+} mbedtls_x509_crt_verify_chain_item;
+
+/**
+ * Max size of verification chain: end-entity + intermediates + trusted root
+ */
+#define MBEDTLS_X509_MAX_VERIFY_CHAIN_SIZE ( MBEDTLS_X509_MAX_INTERMEDIATE_CA + 2 )
+
+/**
+ * Verification chain as built by \c mbedtls_crt_verify_chain()
+ */
+typedef struct
+{
+ mbedtls_x509_crt_verify_chain_item items[MBEDTLS_X509_MAX_VERIFY_CHAIN_SIZE];
+ unsigned len;
+} mbedtls_x509_crt_verify_chain;
+
+#if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE)
+
+/**
+ * \brief Context for resuming X.509 verify operations
+ */
+typedef struct
+{
+ /* for check_signature() */
+ mbedtls_pk_restart_ctx pk;
+
+ /* for find_parent_in() */
+ mbedtls_x509_crt *parent; /* non-null iff parent_in in progress */
+ mbedtls_x509_crt *fallback_parent;
+ int fallback_signature_is_good;
+
+ /* for find_parent() */
+ int parent_is_trusted; /* -1 if find_parent is not in progress */
+
+ /* for verify_chain() */
+ enum {
+ x509_crt_rs_none,
+ x509_crt_rs_find_parent,
+ } in_progress; /* none if no operation is in progress */
+ int self_cnt;
+ mbedtls_x509_crt_verify_chain ver_chain;
+
+} mbedtls_x509_crt_restart_ctx;
+
+#else /* MBEDTLS_ECDSA_C && MBEDTLS_ECP_RESTARTABLE */
+
+/* Now we can declare functions that take a pointer to that */
+typedef void mbedtls_x509_crt_restart_ctx;
+
+#endif /* MBEDTLS_ECDSA_C && MBEDTLS_ECP_RESTARTABLE */
+
+#if defined(MBEDTLS_X509_CRT_PARSE_C)
+/**
+ * Default security profile. Should provide a good balance between security
+ * and compatibility with current deployments.
+ */
+extern const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_default;
+
+/**
+ * Expected next default profile. Recommended for new deployments.
+ * Currently targets a 128-bit security level, except for RSA-2048.
+ */
+extern const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_next;
+
+/**
+ * NSA Suite B profile.
+ */
+extern const mbedtls_x509_crt_profile mbedtls_x509_crt_profile_suiteb;
+
+/**
+ * \brief Parse a single DER formatted certificate and add it
+ * to the chained list.
+ *
+ * \param chain points to the start of the chain
+ * \param buf buffer holding the certificate DER data
+ * \param buflen size of the buffer
+ *
+ * \return 0 if successful, or a specific X509 or PEM error code
+ */
+int mbedtls_x509_crt_parse_der( mbedtls_x509_crt *chain, const unsigned char *buf,
+ size_t buflen );
+
+/**
+ * \brief Parse one DER-encoded or one or more concatenated PEM-encoded
+ * certificates and add them to the chained list.
+ *
+ * For CRTs in PEM encoding, the function parses permissively:
+ * if at least one certificate can be parsed, the function
+ * returns the number of certificates for which parsing failed
+ * (hence \c 0 if all certificates were parsed successfully).
+ * If no certificate could be parsed, the function returns
+ * the first (negative) error encountered during parsing.
+ *
+ * PEM encoded certificates may be interleaved by other data
+ * such as human readable descriptions of their content, as
+ * long as the certificates are enclosed in the PEM specific
+ * '-----{BEGIN/END} CERTIFICATE-----' delimiters.
+ *
+ * \param chain The chain to which to add the parsed certificates.
+ * \param buf The buffer holding the certificate data in PEM or DER format.
+ * For certificates in PEM encoding, this may be a concatenation
+ * of multiple certificates; for DER encoding, the buffer must
+ * comprise exactly one certificate.
+ * \param buflen The size of \p buf, including the terminating \c NULL byte
+ * in case of PEM encoded data.
+ *
+ * \return \c 0 if all certificates were parsed successfully.
+ * \return The (positive) number of certificates that couldn't
+ * be parsed if parsing was partly successful (see above).
+ * \return A negative X509 or PEM error code otherwise.
+ *
+ */
+int mbedtls_x509_crt_parse( mbedtls_x509_crt *chain, const unsigned char *buf, size_t buflen );
+
+#if defined(MBEDTLS_FS_IO)
+/**
+ * \brief Load one or more certificates and add them
+ * to the chained list. Parses permissively. If some
+ * certificates can be parsed, the result is the number
+ * of failed certificates it encountered. If none complete
+ * correctly, the first error is returned.
+ *
+ * \param chain points to the start of the chain
+ * \param path filename to read the certificates from
+ *
+ * \return 0 if all certificates parsed successfully, a positive number
+ * if partly successful or a specific X509 or PEM error code
+ */
+int mbedtls_x509_crt_parse_file( mbedtls_x509_crt *chain, const char *path );
+
+/**
+ * \brief Load one or more certificate files from a path and add them
+ * to the chained list. Parses permissively. If some
+ * certificates can be parsed, the result is the number
+ * of failed certificates it encountered. If none complete
+ * correctly, the first error is returned.
+ *
+ * \param chain points to the start of the chain
+ * \param path directory / folder to read the certificate files from
+ *
+ * \return 0 if all certificates parsed successfully, a positive number
+ * if partly successful or a specific X509 or PEM error code
+ */
+int mbedtls_x509_crt_parse_path( mbedtls_x509_crt *chain, const char *path );
+#endif /* MBEDTLS_FS_IO */
+
+/**
+ * \brief Returns an informational string about the
+ * certificate.
+ *
+ * \param buf Buffer to write to
+ * \param size Maximum size of buffer
+ * \param prefix A line prefix
+ * \param crt The X509 certificate to represent
+ *
+ * \return The length of the string written (not including the
+ * terminated nul byte), or a negative error code.
+ */
+int mbedtls_x509_crt_info( char *buf, size_t size, const char *prefix,
+ const mbedtls_x509_crt *crt );
+
+/**
+ * \brief Returns an informational string about the
+ * verification status of a certificate.
+ *
+ * \param buf Buffer to write to
+ * \param size Maximum size of buffer
+ * \param prefix A line prefix
+ * \param flags Verification flags created by mbedtls_x509_crt_verify()
+ *
+ * \return The length of the string written (not including the
+ * terminated nul byte), or a negative error code.
+ */
+int mbedtls_x509_crt_verify_info( char *buf, size_t size, const char *prefix,
+ uint32_t flags );
+
+/**
+ * \brief Verify the certificate signature
+ *
+ * The verify callback is a user-supplied callback that
+ * can clear / modify / add flags for a certificate. If set,
+ * the verification callback is called for each
+ * certificate in the chain (from the trust-ca down to the
+ * presented crt). The parameters for the callback are:
+ * (void *parameter, mbedtls_x509_crt *crt, int certificate_depth,
+ * int *flags). With the flags representing current flags for
+ * that specific certificate and the certificate depth from
+ * the bottom (Peer cert depth = 0).
+ *
+ * All flags left after returning from the callback
+ * are also returned to the application. The function should
+ * return 0 for anything (including invalid certificates)
+ * other than fatal error, as a non-zero return code
+ * immediately aborts the verification process. For fatal
+ * errors, a specific error code should be used (different
+ * from MBEDTLS_ERR_X509_CERT_VERIFY_FAILED which should not
+ * be returned at this point), or MBEDTLS_ERR_X509_FATAL_ERROR
+ * can be used if no better code is available.
+ *
+ * \note In case verification failed, the results can be displayed
+ * using \c mbedtls_x509_crt_verify_info()
+ *
+ * \note Same as \c mbedtls_x509_crt_verify_with_profile() with the
+ * default security profile.
+ *
+ * \note It is your responsibility to provide up-to-date CRLs for
+ * all trusted CAs. If no CRL is provided for the CA that was
+ * used to sign the certificate, CRL verification is skipped
+ * silently, that is *without* setting any flag.
+ *
+ * \note The \c trust_ca list can contain two types of certificates:
+ * (1) those of trusted root CAs, so that certificates
+ * chaining up to those CAs will be trusted, and (2)
+ * self-signed end-entity certificates to be trusted (for
+ * specific peers you know) - in that case, the self-signed
+ * certificate doesn't need to have the CA bit set.
+ *
+ * \param crt a certificate (chain) to be verified
+ * \param trust_ca the list of trusted CAs (see note above)
+ * \param ca_crl the list of CRLs for trusted CAs (see note above)
+ * \param cn expected Common Name (can be set to
+ * NULL if the CN must not be verified)
+ * \param flags result of the verification
+ * \param f_vrfy verification function
+ * \param p_vrfy verification parameter
+ *
+ * \return 0 (and flags set to 0) if the chain was verified and valid,
+ * MBEDTLS_ERR_X509_CERT_VERIFY_FAILED if the chain was verified
+ * but found to be invalid, in which case *flags will have one
+ * or more MBEDTLS_X509_BADCERT_XXX or MBEDTLS_X509_BADCRL_XXX
+ * flags set, or another error (and flags set to 0xffffffff)
+ * in case of a fatal error encountered during the
+ * verification process.
+ */
+int mbedtls_x509_crt_verify( mbedtls_x509_crt *crt,
+ mbedtls_x509_crt *trust_ca,
+ mbedtls_x509_crl *ca_crl,
+ const char *cn, uint32_t *flags,
+ int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *),
+ void *p_vrfy );
+
+/**
+ * \brief Verify the certificate signature according to profile
+ *
+ * \note Same as \c mbedtls_x509_crt_verify(), but with explicit
+ * security profile.
+ *
+ * \note The restrictions on keys (RSA minimum size, allowed curves
+ * for ECDSA) apply to all certificates: trusted root,
+ * intermediate CAs if any, and end entity certificate.
+ *
+ * \param crt a certificate (chain) to be verified
+ * \param trust_ca the list of trusted CAs
+ * \param ca_crl the list of CRLs for trusted CAs
+ * \param profile security profile for verification
+ * \param cn expected Common Name (can be set to
+ * NULL if the CN must not be verified)
+ * \param flags result of the verification
+ * \param f_vrfy verification function
+ * \param p_vrfy verification parameter
+ *
+ * \return 0 if successful or MBEDTLS_ERR_X509_CERT_VERIFY_FAILED
+ * in which case *flags will have one or more
+ * MBEDTLS_X509_BADCERT_XXX or MBEDTLS_X509_BADCRL_XXX flags
+ * set,
+ * or another error in case of a fatal error encountered
+ * during the verification process.
+ */
+int mbedtls_x509_crt_verify_with_profile( mbedtls_x509_crt *crt,
+ mbedtls_x509_crt *trust_ca,
+ mbedtls_x509_crl *ca_crl,
+ const mbedtls_x509_crt_profile *profile,
+ const char *cn, uint32_t *flags,
+ int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *),
+ void *p_vrfy );
+
+/**
+ * \brief Restartable version of \c mbedtls_crt_verify_with_profile()
+ *
+ * \note Performs the same job as \c mbedtls_crt_verify_with_profile()
+ * but can return early and restart according to the limit
+ * set with \c mbedtls_ecp_set_max_ops() to reduce blocking.
+ *
+ * \param crt a certificate (chain) to be verified
+ * \param trust_ca the list of trusted CAs
+ * \param ca_crl the list of CRLs for trusted CAs
+ * \param profile security profile for verification
+ * \param cn expected Common Name (can be set to
+ * NULL if the CN must not be verified)
+ * \param flags result of the verification
+ * \param f_vrfy verification function
+ * \param p_vrfy verification parameter
+ * \param rs_ctx restart context (NULL to disable restart)
+ *
+ * \return See \c mbedtls_crt_verify_with_profile(), or
+ * \return #MBEDTLS_ERR_ECP_IN_PROGRESS if maximum number of
+ * operations was reached: see \c mbedtls_ecp_set_max_ops().
+ */
+int mbedtls_x509_crt_verify_restartable( mbedtls_x509_crt *crt,
+ mbedtls_x509_crt *trust_ca,
+ mbedtls_x509_crl *ca_crl,
+ const mbedtls_x509_crt_profile *profile,
+ const char *cn, uint32_t *flags,
+ int (*f_vrfy)(void *, mbedtls_x509_crt *, int, uint32_t *),
+ void *p_vrfy,
+ mbedtls_x509_crt_restart_ctx *rs_ctx );
+
+#if defined(MBEDTLS_X509_CHECK_KEY_USAGE)
+/**
+ * \brief Check usage of certificate against keyUsage extension.
+ *
+ * \param crt Leaf certificate used.
+ * \param usage Intended usage(s) (eg MBEDTLS_X509_KU_KEY_ENCIPHERMENT
+ * before using the certificate to perform an RSA key
+ * exchange).
+ *
+ * \note Except for decipherOnly and encipherOnly, a bit set in the
+ * usage argument means this bit MUST be set in the
+ * certificate. For decipherOnly and encipherOnly, it means
+ * that bit MAY be set.
+ *
+ * \return 0 is these uses of the certificate are allowed,
+ * MBEDTLS_ERR_X509_BAD_INPUT_DATA if the keyUsage extension
+ * is present but does not match the usage argument.
+ *
+ * \note You should only call this function on leaf certificates, on
+ * (intermediate) CAs the keyUsage extension is automatically
+ * checked by \c mbedtls_x509_crt_verify().
+ */
+int mbedtls_x509_crt_check_key_usage( const mbedtls_x509_crt *crt,
+ unsigned int usage );
+#endif /* MBEDTLS_X509_CHECK_KEY_USAGE) */
+
+#if defined(MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE)
+/**
+ * \brief Check usage of certificate against extendedKeyUsage.
+ *
+ * \param crt Leaf certificate used.
+ * \param usage_oid Intended usage (eg MBEDTLS_OID_SERVER_AUTH or
+ * MBEDTLS_OID_CLIENT_AUTH).
+ * \param usage_len Length of usage_oid (eg given by MBEDTLS_OID_SIZE()).
+ *
+ * \return 0 if this use of the certificate is allowed,
+ * MBEDTLS_ERR_X509_BAD_INPUT_DATA if not.
+ *
+ * \note Usually only makes sense on leaf certificates.
+ */
+int mbedtls_x509_crt_check_extended_key_usage( const mbedtls_x509_crt *crt,
+ const char *usage_oid,
+ size_t usage_len );
+#endif /* MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE */
+
+#if defined(MBEDTLS_X509_CRL_PARSE_C)
+/**
+ * \brief Verify the certificate revocation status
+ *
+ * \param crt a certificate to be verified
+ * \param crl the CRL to verify against
+ *
+ * \return 1 if the certificate is revoked, 0 otherwise
+ *
+ */
+int mbedtls_x509_crt_is_revoked( const mbedtls_x509_crt *crt, const mbedtls_x509_crl *crl );
+#endif /* MBEDTLS_X509_CRL_PARSE_C */
+
+/**
+ * \brief Initialize a certificate (chain)
+ *
+ * \param crt Certificate chain to initialize
+ */
+void mbedtls_x509_crt_init( mbedtls_x509_crt *crt );
+
+/**
+ * \brief Unallocate all certificate data
+ *
+ * \param crt Certificate chain to free
+ */
+void mbedtls_x509_crt_free( mbedtls_x509_crt *crt );
+
+#if defined(MBEDTLS_ECDSA_C) && defined(MBEDTLS_ECP_RESTARTABLE)
+/**
+ * \brief Initialize a restart context
+ */
+void mbedtls_x509_crt_restart_init( mbedtls_x509_crt_restart_ctx *ctx );
+
+/**
+ * \brief Free the components of a restart context
+ */
+void mbedtls_x509_crt_restart_free( mbedtls_x509_crt_restart_ctx *ctx );
+#endif /* MBEDTLS_ECDSA_C && MBEDTLS_ECP_RESTARTABLE */
+#endif /* MBEDTLS_X509_CRT_PARSE_C */
+
+/* \} name */
+/* \} addtogroup x509_module */
+
+#if defined(MBEDTLS_X509_CRT_WRITE_C)
+/**
+ * \brief Initialize a CRT writing context
+ *
+ * \param ctx CRT context to initialize
+ */
+void mbedtls_x509write_crt_init( mbedtls_x509write_cert *ctx );
+
+/**
+ * \brief Set the verion for a Certificate
+ * Default: MBEDTLS_X509_CRT_VERSION_3
+ *
+ * \param ctx CRT context to use
+ * \param version version to set (MBEDTLS_X509_CRT_VERSION_1, MBEDTLS_X509_CRT_VERSION_2 or
+ * MBEDTLS_X509_CRT_VERSION_3)
+ */
+void mbedtls_x509write_crt_set_version( mbedtls_x509write_cert *ctx, int version );
+
+/**
+ * \brief Set the serial number for a Certificate.
+ *
+ * \param ctx CRT context to use
+ * \param serial serial number to set
+ *
+ * \return 0 if successful
+ */
+int mbedtls_x509write_crt_set_serial( mbedtls_x509write_cert *ctx, const mbedtls_mpi *serial );
+
+/**
+ * \brief Set the validity period for a Certificate
+ * Timestamps should be in string format for UTC timezone
+ * i.e. "YYYYMMDDhhmmss"
+ * e.g. "20131231235959" for December 31st 2013
+ * at 23:59:59
+ *
+ * \param ctx CRT context to use
+ * \param not_before not_before timestamp
+ * \param not_after not_after timestamp
+ *
+ * \return 0 if timestamp was parsed successfully, or
+ * a specific error code
+ */
+int mbedtls_x509write_crt_set_validity( mbedtls_x509write_cert *ctx, const char *not_before,
+ const char *not_after );
+
+/**
+ * \brief Set the issuer name for a Certificate
+ * Issuer names should contain a comma-separated list
+ * of OID types and values:
+ * e.g. "C=UK,O=ARM,CN=mbed TLS CA"
+ *
+ * \param ctx CRT context to use
+ * \param issuer_name issuer name to set
+ *
+ * \return 0 if issuer name was parsed successfully, or
+ * a specific error code
+ */
+int mbedtls_x509write_crt_set_issuer_name( mbedtls_x509write_cert *ctx,
+ const char *issuer_name );
+
+/**
+ * \brief Set the subject name for a Certificate
+ * Subject names should contain a comma-separated list
+ * of OID types and values:
+ * e.g. "C=UK,O=ARM,CN=mbed TLS Server 1"
+ *
+ * \param ctx CRT context to use
+ * \param subject_name subject name to set
+ *
+ * \return 0 if subject name was parsed successfully, or
+ * a specific error code
+ */
+int mbedtls_x509write_crt_set_subject_name( mbedtls_x509write_cert *ctx,
+ const char *subject_name );
+
+/**
+ * \brief Set the subject public key for the certificate
+ *
+ * \param ctx CRT context to use
+ * \param key public key to include
+ */
+void mbedtls_x509write_crt_set_subject_key( mbedtls_x509write_cert *ctx, mbedtls_pk_context *key );
+
+/**
+ * \brief Set the issuer key used for signing the certificate
+ *
+ * \param ctx CRT context to use
+ * \param key private key to sign with
+ */
+void mbedtls_x509write_crt_set_issuer_key( mbedtls_x509write_cert *ctx, mbedtls_pk_context *key );
+
+/**
+ * \brief Set the MD algorithm to use for the signature
+ * (e.g. MBEDTLS_MD_SHA1)
+ *
+ * \param ctx CRT context to use
+ * \param md_alg MD algorithm to use
+ */
+void mbedtls_x509write_crt_set_md_alg( mbedtls_x509write_cert *ctx, mbedtls_md_type_t md_alg );
+
+/**
+ * \brief Generic function to add to or replace an extension in the
+ * CRT
+ *
+ * \param ctx CRT context to use
+ * \param oid OID of the extension
+ * \param oid_len length of the OID
+ * \param critical if the extension is critical (per the RFC's definition)
+ * \param val value of the extension OCTET STRING
+ * \param val_len length of the value data
+ *
+ * \return 0 if successful, or a MBEDTLS_ERR_X509_ALLOC_FAILED
+ */
+int mbedtls_x509write_crt_set_extension( mbedtls_x509write_cert *ctx,
+ const char *oid, size_t oid_len,
+ int critical,
+ const unsigned char *val, size_t val_len );
+
+/**
+ * \brief Set the basicConstraints extension for a CRT
+ *
+ * \param ctx CRT context to use
+ * \param is_ca is this a CA certificate
+ * \param max_pathlen maximum length of certificate chains below this
+ * certificate (only for CA certificates, -1 is
+ * inlimited)
+ *
+ * \return 0 if successful, or a MBEDTLS_ERR_X509_ALLOC_FAILED
+ */
+int mbedtls_x509write_crt_set_basic_constraints( mbedtls_x509write_cert *ctx,
+ int is_ca, int max_pathlen );
+
+#if defined(MBEDTLS_SHA1_C)
+/**
+ * \brief Set the subjectKeyIdentifier extension for a CRT
+ * Requires that mbedtls_x509write_crt_set_subject_key() has been
+ * called before
+ *
+ * \param ctx CRT context to use
+ *
+ * \return 0 if successful, or a MBEDTLS_ERR_X509_ALLOC_FAILED
+ */
+int mbedtls_x509write_crt_set_subject_key_identifier( mbedtls_x509write_cert *ctx );
+
+/**
+ * \brief Set the authorityKeyIdentifier extension for a CRT
+ * Requires that mbedtls_x509write_crt_set_issuer_key() has been
+ * called before
+ *
+ * \param ctx CRT context to use
+ *
+ * \return 0 if successful, or a MBEDTLS_ERR_X509_ALLOC_FAILED
+ */
+int mbedtls_x509write_crt_set_authority_key_identifier( mbedtls_x509write_cert *ctx );
+#endif /* MBEDTLS_SHA1_C */
+
+/**
+ * \brief Set the Key Usage Extension flags
+ * (e.g. MBEDTLS_X509_KU_DIGITAL_SIGNATURE | MBEDTLS_X509_KU_KEY_CERT_SIGN)
+ *
+ * \param ctx CRT context to use
+ * \param key_usage key usage flags to set
+ *
+ * \return 0 if successful, or MBEDTLS_ERR_X509_ALLOC_FAILED
+ */
+int mbedtls_x509write_crt_set_key_usage( mbedtls_x509write_cert *ctx,
+ unsigned int key_usage );
+
+/**
+ * \brief Set the Netscape Cert Type flags
+ * (e.g. MBEDTLS_X509_NS_CERT_TYPE_SSL_CLIENT | MBEDTLS_X509_NS_CERT_TYPE_EMAIL)
+ *
+ * \param ctx CRT context to use
+ * \param ns_cert_type Netscape Cert Type flags to set
+ *
+ * \return 0 if successful, or MBEDTLS_ERR_X509_ALLOC_FAILED
+ */
+int mbedtls_x509write_crt_set_ns_cert_type( mbedtls_x509write_cert *ctx,
+ unsigned char ns_cert_type );
+
+/**
+ * \brief Free the contents of a CRT write context
+ *
+ * \param ctx CRT context to free
+ */
+void mbedtls_x509write_crt_free( mbedtls_x509write_cert *ctx );
+
+/**
+ * \brief Write a built up certificate to a X509 DER structure
+ * Note: data is written at the end of the buffer! Use the
+ * return value to determine where you should start
+ * using the buffer
+ *
+ * \param ctx certificate to write away
+ * \param buf buffer to write to
+ * \param size size of the buffer
+ * \param f_rng RNG function (for signature, see note)
+ * \param p_rng RNG parameter
+ *
+ * \return length of data written if successful, or a specific
+ * error code
+ *
+ * \note f_rng may be NULL if RSA is used for signature and the
+ * signature is made offline (otherwise f_rng is desirable
+ * for countermeasures against timing attacks).
+ * ECDSA signatures always require a non-NULL f_rng.
+ */
+int mbedtls_x509write_crt_der( mbedtls_x509write_cert *ctx, unsigned char *buf, size_t size,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+#if defined(MBEDTLS_PEM_WRITE_C)
+/**
+ * \brief Write a built up certificate to a X509 PEM string
+ *
+ * \param ctx certificate to write away
+ * \param buf buffer to write to
+ * \param size size of the buffer
+ * \param f_rng RNG function (for signature, see note)
+ * \param p_rng RNG parameter
+ *
+ * \return 0 if successful, or a specific error code
+ *
+ * \note f_rng may be NULL if RSA is used for signature and the
+ * signature is made offline (otherwise f_rng is desirable
+ * for countermeasures against timing attacks).
+ * ECDSA signatures always require a non-NULL f_rng.
+ */
+int mbedtls_x509write_crt_pem( mbedtls_x509write_cert *ctx, unsigned char *buf, size_t size,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+#endif /* MBEDTLS_PEM_WRITE_C */
+#endif /* MBEDTLS_X509_CRT_WRITE_C */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* mbedtls_x509_crt.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/x509_csr.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/x509_csr.h
new file mode 100644
index 0000000..a3c2804
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/x509_csr.h
@@ -0,0 +1,307 @@
+/**
+ * \file x509_csr.h
+ *
+ * \brief X.509 certificate signing request parsing and writing
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_X509_CSR_H
+#define MBEDTLS_X509_CSR_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include "x509.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \addtogroup x509_module
+ * \{ */
+
+/**
+ * \name Structures and functions for X.509 Certificate Signing Requests (CSR)
+ * \{
+ */
+
+/**
+ * Certificate Signing Request (CSR) structure.
+ */
+typedef struct mbedtls_x509_csr
+{
+ mbedtls_x509_buf raw; /**< The raw CSR data (DER). */
+ mbedtls_x509_buf cri; /**< The raw CertificateRequestInfo body (DER). */
+
+ int version; /**< CSR version (1=v1). */
+
+ mbedtls_x509_buf subject_raw; /**< The raw subject data (DER). */
+ mbedtls_x509_name subject; /**< The parsed subject data (named information object). */
+
+ mbedtls_pk_context pk; /**< Container for the public key context. */
+
+ mbedtls_x509_buf sig_oid;
+ mbedtls_x509_buf sig;
+ mbedtls_md_type_t sig_md; /**< Internal representation of the MD algorithm of the signature algorithm, e.g. MBEDTLS_MD_SHA256 */
+ mbedtls_pk_type_t sig_pk; /**< Internal representation of the Public Key algorithm of the signature algorithm, e.g. MBEDTLS_PK_RSA */
+ void *sig_opts; /**< Signature options to be passed to mbedtls_pk_verify_ext(), e.g. for RSASSA-PSS */
+}
+mbedtls_x509_csr;
+
+/**
+ * Container for writing a CSR
+ */
+typedef struct mbedtls_x509write_csr
+{
+ mbedtls_pk_context *key;
+ mbedtls_asn1_named_data *subject;
+ mbedtls_md_type_t md_alg;
+ mbedtls_asn1_named_data *extensions;
+}
+mbedtls_x509write_csr;
+
+#if defined(MBEDTLS_X509_CSR_PARSE_C)
+/**
+ * \brief Load a Certificate Signing Request (CSR) in DER format
+ *
+ * \note CSR attributes (if any) are currently silently ignored.
+ *
+ * \param csr CSR context to fill
+ * \param buf buffer holding the CRL data
+ * \param buflen size of the buffer
+ *
+ * \return 0 if successful, or a specific X509 error code
+ */
+int mbedtls_x509_csr_parse_der( mbedtls_x509_csr *csr,
+ const unsigned char *buf, size_t buflen );
+
+/**
+ * \brief Load a Certificate Signing Request (CSR), DER or PEM format
+ *
+ * \note See notes for \c mbedtls_x509_csr_parse_der()
+ *
+ * \param csr CSR context to fill
+ * \param buf buffer holding the CRL data
+ * \param buflen size of the buffer
+ * (including the terminating null byte for PEM data)
+ *
+ * \return 0 if successful, or a specific X509 or PEM error code
+ */
+int mbedtls_x509_csr_parse( mbedtls_x509_csr *csr, const unsigned char *buf, size_t buflen );
+
+#if defined(MBEDTLS_FS_IO)
+/**
+ * \brief Load a Certificate Signing Request (CSR)
+ *
+ * \note See notes for \c mbedtls_x509_csr_parse()
+ *
+ * \param csr CSR context to fill
+ * \param path filename to read the CSR from
+ *
+ * \return 0 if successful, or a specific X509 or PEM error code
+ */
+int mbedtls_x509_csr_parse_file( mbedtls_x509_csr *csr, const char *path );
+#endif /* MBEDTLS_FS_IO */
+
+/**
+ * \brief Returns an informational string about the
+ * CSR.
+ *
+ * \param buf Buffer to write to
+ * \param size Maximum size of buffer
+ * \param prefix A line prefix
+ * \param csr The X509 CSR to represent
+ *
+ * \return The length of the string written (not including the
+ * terminated nul byte), or a negative error code.
+ */
+int mbedtls_x509_csr_info( char *buf, size_t size, const char *prefix,
+ const mbedtls_x509_csr *csr );
+
+/**
+ * \brief Initialize a CSR
+ *
+ * \param csr CSR to initialize
+ */
+void mbedtls_x509_csr_init( mbedtls_x509_csr *csr );
+
+/**
+ * \brief Unallocate all CSR data
+ *
+ * \param csr CSR to free
+ */
+void mbedtls_x509_csr_free( mbedtls_x509_csr *csr );
+#endif /* MBEDTLS_X509_CSR_PARSE_C */
+
+/* \} name */
+/* \} addtogroup x509_module */
+
+#if defined(MBEDTLS_X509_CSR_WRITE_C)
+/**
+ * \brief Initialize a CSR context
+ *
+ * \param ctx CSR context to initialize
+ */
+void mbedtls_x509write_csr_init( mbedtls_x509write_csr *ctx );
+
+/**
+ * \brief Set the subject name for a CSR
+ * Subject names should contain a comma-separated list
+ * of OID types and values:
+ * e.g. "C=UK,O=ARM,CN=mbed TLS Server 1"
+ *
+ * \param ctx CSR context to use
+ * \param subject_name subject name to set
+ *
+ * \return 0 if subject name was parsed successfully, or
+ * a specific error code
+ */
+int mbedtls_x509write_csr_set_subject_name( mbedtls_x509write_csr *ctx,
+ const char *subject_name );
+
+/**
+ * \brief Set the key for a CSR (public key will be included,
+ * private key used to sign the CSR when writing it)
+ *
+ * \param ctx CSR context to use
+ * \param key Asymetric key to include
+ */
+void mbedtls_x509write_csr_set_key( mbedtls_x509write_csr *ctx, mbedtls_pk_context *key );
+
+/**
+ * \brief Set the MD algorithm to use for the signature
+ * (e.g. MBEDTLS_MD_SHA1)
+ *
+ * \param ctx CSR context to use
+ * \param md_alg MD algorithm to use
+ */
+void mbedtls_x509write_csr_set_md_alg( mbedtls_x509write_csr *ctx, mbedtls_md_type_t md_alg );
+
+/**
+ * \brief Set the Key Usage Extension flags
+ * (e.g. MBEDTLS_X509_KU_DIGITAL_SIGNATURE | MBEDTLS_X509_KU_KEY_CERT_SIGN)
+ *
+ * \param ctx CSR context to use
+ * \param key_usage key usage flags to set
+ *
+ * \return 0 if successful, or MBEDTLS_ERR_X509_ALLOC_FAILED
+ *
+ * \note The <code>decipherOnly</code> flag from the Key Usage
+ * extension is represented by bit 8 (i.e.
+ * <code>0x8000</code>), which cannot typically be represented
+ * in an unsigned char. Therefore, the flag
+ * <code>decipherOnly</code> (i.e.
+ * #MBEDTLS_X509_KU_DECIPHER_ONLY) cannot be set using this
+ * function.
+ */
+int mbedtls_x509write_csr_set_key_usage( mbedtls_x509write_csr *ctx, unsigned char key_usage );
+
+/**
+ * \brief Set the Netscape Cert Type flags
+ * (e.g. MBEDTLS_X509_NS_CERT_TYPE_SSL_CLIENT | MBEDTLS_X509_NS_CERT_TYPE_EMAIL)
+ *
+ * \param ctx CSR context to use
+ * \param ns_cert_type Netscape Cert Type flags to set
+ *
+ * \return 0 if successful, or MBEDTLS_ERR_X509_ALLOC_FAILED
+ */
+int mbedtls_x509write_csr_set_ns_cert_type( mbedtls_x509write_csr *ctx,
+ unsigned char ns_cert_type );
+
+/**
+ * \brief Generic function to add to or replace an extension in the
+ * CSR
+ *
+ * \param ctx CSR context to use
+ * \param oid OID of the extension
+ * \param oid_len length of the OID
+ * \param val value of the extension OCTET STRING
+ * \param val_len length of the value data
+ *
+ * \return 0 if successful, or a MBEDTLS_ERR_X509_ALLOC_FAILED
+ */
+int mbedtls_x509write_csr_set_extension( mbedtls_x509write_csr *ctx,
+ const char *oid, size_t oid_len,
+ const unsigned char *val, size_t val_len );
+
+/**
+ * \brief Free the contents of a CSR context
+ *
+ * \param ctx CSR context to free
+ */
+void mbedtls_x509write_csr_free( mbedtls_x509write_csr *ctx );
+
+/**
+ * \brief Write a CSR (Certificate Signing Request) to a
+ * DER structure
+ * Note: data is written at the end of the buffer! Use the
+ * return value to determine where you should start
+ * using the buffer
+ *
+ * \param ctx CSR to write away
+ * \param buf buffer to write to
+ * \param size size of the buffer
+ * \param f_rng RNG function (for signature, see note)
+ * \param p_rng RNG parameter
+ *
+ * \return length of data written if successful, or a specific
+ * error code
+ *
+ * \note f_rng may be NULL if RSA is used for signature and the
+ * signature is made offline (otherwise f_rng is desirable
+ * for countermeasures against timing attacks).
+ * ECDSA signatures always require a non-NULL f_rng.
+ */
+int mbedtls_x509write_csr_der( mbedtls_x509write_csr *ctx, unsigned char *buf, size_t size,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+
+#if defined(MBEDTLS_PEM_WRITE_C)
+/**
+ * \brief Write a CSR (Certificate Signing Request) to a
+ * PEM string
+ *
+ * \param ctx CSR to write away
+ * \param buf buffer to write to
+ * \param size size of the buffer
+ * \param f_rng RNG function (for signature, see note)
+ * \param p_rng RNG parameter
+ *
+ * \return 0 if successful, or a specific error code
+ *
+ * \note f_rng may be NULL if RSA is used for signature and the
+ * signature is made offline (otherwise f_rng is desirable
+ * for countermeasures against timing attacks).
+ * ECDSA signatures always require a non-NULL f_rng.
+ */
+int mbedtls_x509write_csr_pem( mbedtls_x509write_csr *ctx, unsigned char *buf, size_t size,
+ int (*f_rng)(void *, unsigned char *, size_t),
+ void *p_rng );
+#endif /* MBEDTLS_PEM_WRITE_C */
+#endif /* MBEDTLS_X509_CSR_WRITE_C */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* mbedtls_x509_csr.h */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/xtea.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/xtea.h
new file mode 100644
index 0000000..b47f553
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/include/mbedtls/xtea.h
@@ -0,0 +1,139 @@
+/**
+ * \file xtea.h
+ *
+ * \brief XTEA block cipher (32-bit)
+ */
+/*
+ * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of mbed TLS (https://tls.mbed.org)
+ */
+#ifndef MBEDTLS_XTEA_H
+#define MBEDTLS_XTEA_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+
+#define MBEDTLS_XTEA_ENCRYPT 1
+#define MBEDTLS_XTEA_DECRYPT 0
+
+#define MBEDTLS_ERR_XTEA_INVALID_INPUT_LENGTH -0x0028 /**< The data input has an invalid length. */
+
+/* MBEDTLS_ERR_XTEA_HW_ACCEL_FAILED is deprecated and should not be used. */
+#define MBEDTLS_ERR_XTEA_HW_ACCEL_FAILED -0x0029 /**< XTEA hardware accelerator failed. */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(MBEDTLS_XTEA_ALT)
+// Regular implementation
+//
+
+/**
+ * \brief XTEA context structure
+ */
+typedef struct mbedtls_xtea_context
+{
+ uint32_t k[4]; /*!< key */
+}
+mbedtls_xtea_context;
+
+#else /* MBEDTLS_XTEA_ALT */
+#include "xtea_alt.h"
+#endif /* MBEDTLS_XTEA_ALT */
+
+/**
+ * \brief Initialize XTEA context
+ *
+ * \param ctx XTEA context to be initialized
+ */
+void mbedtls_xtea_init( mbedtls_xtea_context *ctx );
+
+/**
+ * \brief Clear XTEA context
+ *
+ * \param ctx XTEA context to be cleared
+ */
+void mbedtls_xtea_free( mbedtls_xtea_context *ctx );
+
+/**
+ * \brief XTEA key schedule
+ *
+ * \param ctx XTEA context to be initialized
+ * \param key the secret key
+ */
+void mbedtls_xtea_setup( mbedtls_xtea_context *ctx, const unsigned char key[16] );
+
+/**
+ * \brief XTEA cipher function
+ *
+ * \param ctx XTEA context
+ * \param mode MBEDTLS_XTEA_ENCRYPT or MBEDTLS_XTEA_DECRYPT
+ * \param input 8-byte input block
+ * \param output 8-byte output block
+ *
+ * \return 0 if successful
+ */
+int mbedtls_xtea_crypt_ecb( mbedtls_xtea_context *ctx,
+ int mode,
+ const unsigned char input[8],
+ unsigned char output[8] );
+
+#if defined(MBEDTLS_CIPHER_MODE_CBC)
+/**
+ * \brief XTEA CBC cipher function
+ *
+ * \param ctx XTEA context
+ * \param mode MBEDTLS_XTEA_ENCRYPT or MBEDTLS_XTEA_DECRYPT
+ * \param length the length of input, multiple of 8
+ * \param iv initialization vector for CBC mode
+ * \param input input block
+ * \param output output block
+ *
+ * \return 0 if successful,
+ * MBEDTLS_ERR_XTEA_INVALID_INPUT_LENGTH if the length % 8 != 0
+ */
+int mbedtls_xtea_crypt_cbc( mbedtls_xtea_context *ctx,
+ int mode,
+ size_t length,
+ unsigned char iv[8],
+ const unsigned char *input,
+ unsigned char *output);
+#endif /* MBEDTLS_CIPHER_MODE_CBC */
+
+#if defined(MBEDTLS_SELF_TEST)
+
+/**
+ * \brief Checkup routine
+ *
+ * \return 0 if successful, or 1 if the test failed
+ */
+int mbedtls_xtea_self_test( int verbose );
+
+#endif /* MBEDTLS_SELF_TEST */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* xtea.h */
diff --git a/third_party/NordicSemiconductor/libraries/crypto/threading_alt.h b/third_party/NordicSemiconductor/libraries/nrf_security/include/software-only-threading/threading_alt.h
similarity index 100%
rename from third_party/NordicSemiconductor/libraries/crypto/threading_alt.h
rename to third_party/NordicSemiconductor/libraries/nrf_security/include/software-only-threading/threading_alt.h
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_cc310_backend.a b/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_cc310_backend.a
new file mode 100644
index 0000000..8ce36c0
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_cc310_backend.a
Binary files differ
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_glue.a b/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_glue.a
new file mode 100644
index 0000000..4b50d30
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_glue.a
Binary files differ
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_glue_cc310.a b/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_glue_cc310.a
new file mode 100644
index 0000000..7638c6a
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_glue_cc310.a
Binary files differ
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_glue_vanilla.a b/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_glue_vanilla.a
new file mode 100644
index 0000000..fdf857e
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_glue_vanilla.a
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diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_vanilla_backend.a b/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_vanilla_backend.a
new file mode 100644
index 0000000..ebbdcd4
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedcrypto_vanilla_backend.a
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diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedtls_base_vanilla.a b/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedtls_base_vanilla.a
new file mode 100644
index 0000000..377cea9
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedtls_base_vanilla.a
Binary files differ
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedtls_tls_vanilla.a b/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedtls_tls_vanilla.a
new file mode 100644
index 0000000..b2f1adf
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedtls_tls_vanilla.a
Binary files differ
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedtls_x509_vanilla.a b/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedtls_x509_vanilla.a
new file mode 100644
index 0000000..77b0385
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/lib/libmbedtls_x509_vanilla.a
Binary files differ
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/lib/libnrf_cc310_platform_0.9.1.a b/third_party/NordicSemiconductor/libraries/nrf_security/lib/libnrf_cc310_platform_0.9.1.a
new file mode 100644
index 0000000..7ca2e31
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/lib/libnrf_cc310_platform_0.9.1.a
Binary files differ
diff --git a/third_party/NordicSemiconductor/libraries/crypto/nrf52811-mbedtls-config.h b/third_party/NordicSemiconductor/libraries/nrf_security/mbedtls_plat_config/nrf52811-mbedtls-config.h
similarity index 100%
rename from third_party/NordicSemiconductor/libraries/crypto/nrf52811-mbedtls-config.h
rename to third_party/NordicSemiconductor/libraries/nrf_security/mbedtls_plat_config/nrf52811-mbedtls-config.h
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/mbedtls_plat_config/nrf52833-mbedtls-config.h b/third_party/NordicSemiconductor/libraries/nrf_security/mbedtls_plat_config/nrf52833-mbedtls-config.h
new file mode 100644
index 0000000..90672cf
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/mbedtls_plat_config/nrf52833-mbedtls-config.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2019, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef NRF52833_MBEDTLS_CONFIG_H_
+#define NRF52833_MBEDTLS_CONFIG_H_
+
+#if defined(__ICCARM__)
+ _Pragma("diag_suppress=Pe550")
+#endif
+
+#if defined(__CC_ARM)
+ _Pragma("diag_suppress=550")
+ _Pragma("diag_suppress=68")
+#endif
+
+#endif // NRF52833_MBEDTLS_CONFIG_H_
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/mbedtls_plat_config/nrf52840-mbedtls-config.h b/third_party/NordicSemiconductor/libraries/nrf_security/mbedtls_plat_config/nrf52840-mbedtls-config.h
new file mode 100644
index 0000000..88aded9
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/mbedtls_plat_config/nrf52840-mbedtls-config.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2018, The OpenThread Authors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef NRF52840_MBEDTLS_CONFIG_H_
+#define NRF52840_MBEDTLS_CONFIG_H_
+
+#include <openthread/config.h>
+
+#if defined(__ICCARM__)
+ _Pragma("diag_suppress=Pe550")
+#endif
+
+#if defined(__CC_ARM)
+ _Pragma("diag_suppress=550")
+ _Pragma("diag_suppress=68")
+#endif
+
+#endif // NRF52840_MBEDTLS_CONFIG_H_
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/include/nrf_cc310_platform.h b/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/include/nrf_cc310_platform.h
new file mode 100644
index 0000000..0df7658
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/include/nrf_cc310_platform.h
@@ -0,0 +1,77 @@
+/**
+ * Copyright (c) 2019 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-BSD-5-Clause-Nordic
+ */
+/**@file
+ * @defgroup nrf_cc310_platform nRF CC310 Platform library
+ * @{
+ * @brief nrf_cc310_platform library containing CC310
+ * hardware initialization and entropy gathering APIs. The library also contains
+ * APIs and companion source-files to setus RTOS dependent mutex and abort
+ * functionality for the nrf_cc310_mbedcrypto library in Zephyr RTOS and FreeRTOS.
+ * @}
+ *
+ * @defgroup nrf_cc310_platform_init nrf_cc310_platform initialization APIs
+ * @ingroup nrf_cc310_platform
+ * @{
+ * @brief The nrf_cc310_platform APIs provides functions related to
+ * initialization of the Arm CC310 hardware accelerator for usage in
+ * nrf_cc310_platform and dependent libraries.
+ */
+#ifndef NRF_CC310_PLATFORM_H__
+#define NRF_CC310_PLATFORM_H__
+
+#include <stdint.h>
+#include <stddef.h>
+#include <stdbool.h>
+
+#include "nrf_cc310_platform_defines.h"
+#include "nrf_cc310_platform_abort.h"
+#include "nrf_cc310_platform_mutex.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**@brief Function to initialize the nrf_cc310_platform with rng support
+ *
+ * @return Zero on success, otherwise a non-zero error code.
+ */
+int nrf_cc310_platform_init(void);
+
+
+/**@brief Function to initialize the nrf_cc310_platform without rng support
+ *
+ * @return Zero on success, otherwise a non-zero error code.
+ */
+int nrf_cc310_platform_init_no_rng(void);
+
+
+/** @brief Function to deintialize the nrf_cc310_platform
+ *
+ * @return Zero on success, otherwise a non-zero error code.
+ */
+int nrf_cc310_platform_deinit(void);
+
+
+/** @brief Function to check if the nrf_cc310_platform is initialized
+ *
+ * @retval True if initialized, otherwise false.
+ */
+bool nrf_cc310_platform_is_initialized(void);
+
+
+/** @brief Function to check if the nrf_cc310_platform is initialized
+ * with RNG support
+ *
+ * @retval True if RNG is initialized, otherwise false.
+ */
+bool nrf_cc310_platform_rng_is_initialized(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* NRF_CC310_PLATFORM_H__ */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/include/nrf_cc310_platform_abort.h b/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/include/nrf_cc310_platform_abort.h
new file mode 100644
index 0000000..3810709
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/include/nrf_cc310_platform_abort.h
@@ -0,0 +1,76 @@
+/**
+ * Copyright (c) 2019 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-BSD-5-Clause-Nordic
+ */
+/**@file
+ * @defgroup nrf_cc310_platform_abort nrf_cc310_platform abort APIs
+ * @ingroup nrf_cc310_platform
+ * @{
+ * @brief The nrf_cc310_platform_entropy APIs provides callbacks to abort
+ * from nrf_cc310_platform and/or dependent libraries.
+ */
+#ifndef NRF_CC310_PLATFORM_ABORT_H__
+#define NRF_CC310_PLATFORM_ABORT_H__
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** @brief Type definition of handle used for abort
+ *
+ * This handle could point to the thread or task to abort or any other
+ * static memory required for aborting the on-going cryptographic routine(s).
+ */
+typedef void* nrf_cc310_platform_abort_handle_t;
+
+
+/** @brief Type definition of platform abort function
+ *
+ * @note This function pointer will be used when the nrf_cc310_platform
+ * and/or dependent libraries raises an error that can't be recovered.
+ */
+typedef void (*nrf_cc310_platform_abort_fn_t)(char const * const reason);
+
+
+/** @brief Type definition of structure holding platform abort APIs
+ */
+typedef struct nrf_cc310_platform_abort_apis_t
+{
+ nrf_cc310_platform_abort_handle_t abort_handle; //!< Handle to use when crypto operations are aborted.
+ nrf_cc310_platform_abort_fn_t abort_fn; //!< Function to use when crypto operations are aborted.
+
+} nrf_cc310_platform_abort_apis_t;
+
+
+/** @brief External reference to the platform abort APIs
+ */
+extern nrf_cc310_platform_abort_apis_t platform_abort_apis;
+
+
+/** @brief Function to set platform abort APIs
+ *
+ * @param[in] apis Pointer to platform APIs.
+ */
+void nrf_cc310_platform_set_abort(
+ nrf_cc310_platform_abort_apis_t const * const apis);
+
+
+/** @brief Function to initialize platform abort APIs
+ *
+ * @note This function must be called once before calling
+ * @ref nrf_cc310_platform_init or @ref nrf_cc310_platform_init_no_rng.
+ *
+ * @note This function is not expected to be thread-safe.
+ */
+void nrf_cc310_platform_abort_init(void);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* NRF_CC310_PLATFORM_ABORT_H__ */
+
+/** @} */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/include/nrf_cc310_platform_defines.h b/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/include/nrf_cc310_platform_defines.h
new file mode 100644
index 0000000..b82d643
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/include/nrf_cc310_platform_defines.h
@@ -0,0 +1,50 @@
+/**
+ * Copyright (c) 2019 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-BSD-5-Clause-Nordic
+ */
+/**@file
+ * @defgroup nrf_cc310_platform_defines nrf_cc310_platform shared defines
+ * @ingroup nrf_cc310_platform
+ * @{
+ * @brief nrf_cc310_platform shared defines and return codes.
+ */
+#ifndef NRF_CC310_PLATFORM_DEFINES_H__
+#define NRF_CC310_PLATFORM_DEFINES_H__
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/** @brief Definition of max number of entropy bits to gather for CTR_DRBG
+ */
+#define NRF_CC310_PLATFORM_ENTROPY_MAX_GATHER (144)
+
+
+/** @brief Definition of max count of concurrent usage
+ *
+ * @note The max value will never be reached.
+ */
+#define NRF_CC310_PLATFORM_USE_COUNT_MAX (10)
+
+
+#define NRF_CC310_PLATFORM_SUCCESS (0)
+#define NRF_CC310_PLATFORM_ERROR_PARAM_NULL (-0x7001)
+#define NRF_CC310_PLATFORM_ERROR_INTERNAL (-0x7002)
+#define NRF_CC310_PLATFORM_ERROR_RNG_TEST_FAILED (-0x7003)
+#define NRF_CC310_PLATFORM_ERROR_HW_VERSION_FAILED (-0x7004)
+#define NRF_CC310_PLATFORM_ERROR_PARAM_WRITE_FAILED (-0x7005)
+#define NRF_CC310_PLATFORM_ERROR_MUTEX_NOT_INITIALIZED (-0x7016)
+#define NRF_CC310_PLATFORM_ERROR_MUTEX_FAILED (-0x7017)
+#define NRF_CC310_PLATFORM_ERROR_ENTROPY_NOT_INITIALIZED (-0x7018)
+#define NRF_CC310_PLATFORM_ERROR_ENTROPY_TRNG_TOO_LONG (-0x7019)
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* NRF_CC310_PLATFORM_DEFINES_H__ */
+
+/** @} */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/include/nrf_cc310_platform_entropy.h b/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/include/nrf_cc310_platform_entropy.h
new file mode 100644
index 0000000..0727110
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/include/nrf_cc310_platform_entropy.h
@@ -0,0 +1,56 @@
+/**
+ * Copyright (c) 2019 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-BSD-5-Clause-Nordic
+ */
+/**@file
+ * @defgroup nrf_cc310_platform_entropy nrf_cc310_platform entropy generation APIs
+ * @ingroup nrf_cc310_platform
+ * @{
+ * @brief The nrf_cc310_platform_entropy APIs provides TRNG using Arm CC310
+ * hardware acceleration.
+ */
+#ifndef NRF_CC310_PLATFORM_ENTROPY_H__
+#define NRF_CC310_PLATFORM_ENTROPY_H__
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stddef.h>
+
+#include "nrf_cc310_platform_defines.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+
+
+/**@brief Function to generate entropy using Arm CryptoCell CC310
+ *
+ * This API corresponds to mbedtls_hardware_poll. It provides TRNG using
+ * the Arm CC310 hardware accelerator.
+ *
+ * @note This API is only usable if @ref nrf_cc310_platform_init was run
+ * prior to calling it.
+ *
+ * @param[out] buffer Pointer to buffer to hold the entropy data.
+ * @param[in] length Length of the buffer to fill with entropy data.
+ * @param[out] olen Pointer to variable that will hold the length of
+ * generated entropy.
+ *
+ * @retval 0 on success
+ * @return Any other error code returned from mbedtls_hardware_poll
+ */
+int nrf_cc310_platform_entropy_get(uint8_t *buffer,
+ size_t length,
+ size_t* olen);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* NRF_CC310_PLATFORM_ENTROPY_H__ */
+
+/** @} */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/include/nrf_cc310_platform_mutex.h b/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/include/nrf_cc310_platform_mutex.h
new file mode 100644
index 0000000..faaded8
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/include/nrf_cc310_platform_mutex.h
@@ -0,0 +1,156 @@
+/**
+ * Copyright (c) 2019 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-BSD-5-Clause-Nordic
+ */
+/**@file
+ * @defgroup nrf_cc310_platform_mutex nrf_cc310_platform mutex APIs
+ * @ingroup nrf_cc310_platform
+ * @{
+ * @brief The nrf_cc310_platform_mutex APIs provides RTOS integration for mutex
+ * usage in nrf_cc310_platform and dependent libraries.
+ */
+#ifndef NRF_CC310_PLATFORM_MUTEX_H__
+#define NRF_CC310_PLATFORM_MUTEX_H__
+
+#include <stdint.h>
+#include <stddef.h>
+
+#include "nrf_cc310_platform_abort.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#define NRF_CC310_PLATFORM_MUTEX_MASK_INVALID (0) /*!< Mask indicating that the mutex is invalid (not initialized or allocated). */
+#define NRF_CC310_PLATFORM_MUTEX_MASK_IS_VALID (1<<0) /*!< Mask value indicating that the mutex is valid for use. */
+#define NRF_CC310_PLATFORM_MUTEX_MASK_IS_ALLOCATED (1<<1) /*!< Mask value indicating that the mutex is allocated and requires deallocation once freed. */
+
+/** @brief Type definition of architecture neutral mutex type */
+typedef struct nrf_cc310_platform_mutex
+{
+ void * mutex;
+ uint32_t flags;
+
+} nrf_cc310_platform_mutex_t;
+
+/** @brief Type definition of function pointer to initialize a mutex
+ *
+ * Calling this function pointer should initialize a previously uninitialized
+ * mutex or do nothing if the mutex is already initialized.
+ *
+ * @note Initialization may not imply memory allocation, as this can be done
+ * using static allocation through other APIs in the RTOS.
+ *
+ * @param[in] mutex Pointer to a mutex to initialize.
+ */
+typedef void (*nrf_cc310_platform_mutex_init_fn_t)(nrf_cc310_platform_mutex_t *mutex);
+
+
+/** @brief Type definition of function pointer to free a mutex
+ *
+ * Calling this function pointer should free a mutex.
+ *
+ * @note If the RTOS does not provide an API to free the mutex it is advised
+ * to reset the mutex to an initialized state with no owner.
+ *
+ * @param[in] mutex Pointer to a mutex to free.
+ */
+typedef void (*nrf_cc310_platform_mutex_free_fn_t)(nrf_cc310_platform_mutex_t *mutex);
+
+
+/** @brief Type definition of function pointer to lock a mutex
+ *
+ * Calling this function pointer should lock a mutex.
+ *
+ * @param[in] mutex Pointer to a mutex to lock.
+ */
+typedef int (*nrf_cc310_platform_mutex_lock_fn_t)(nrf_cc310_platform_mutex_t *mutex);
+
+
+/** @brief Type definition of function pointer to unlock a mutex
+ *
+ * Calling this function pointer should unlock a mutex.
+ *
+ * @param[in] mutex Pointer to a mutex to unlock.
+ */
+typedef int (*nrf_cc310_platform_mutex_unlock_fn_t)(nrf_cc310_platform_mutex_t *mutex);
+
+
+/**@brief Type definition of structure holding platform mutex APIs
+ */
+typedef struct nrf_cc310_platform_mutex_apis_t
+{
+ /* The platform mutex init function */
+ nrf_cc310_platform_mutex_init_fn_t mutex_init_fn;
+
+ /* The platform mutex free function */
+ nrf_cc310_platform_mutex_free_fn_t mutex_free_fn;
+
+ /* The platform lock function */
+ nrf_cc310_platform_mutex_lock_fn_t mutex_lock_fn;
+
+ /* The platform unlock function */
+ nrf_cc310_platform_mutex_unlock_fn_t mutex_unlock_fn;
+} nrf_cc310_platform_mutex_apis_t;
+
+
+/** @brief Type definition of structure to platform hw mutexes
+ */
+typedef struct nrf_cc310_platform_mutexes_t
+{
+ /* Mutex for symmetric operations. */
+ void * sym_mutex;
+
+ /* Mutex for asymetric operations. */
+ void * asym_mutex;
+
+ /* Mutex for rng operations. */
+ void * rng_mutex;
+
+ /* Mutex reserved for future use. */
+ void * reserved;
+
+ /* Mutex for power mode changes */
+ void * power_mutex;
+} nrf_cc310_platform_mutexes_t;
+
+
+/**@brief External reference to structure holding the currently set platform
+ * mutexe APIs.
+ */
+extern nrf_cc310_platform_mutex_apis_t platform_mutex_apis;
+
+
+/**@brief External reference to currently set platform hw mutexes */
+extern nrf_cc310_platform_mutexes_t platform_mutexes;
+
+
+/** @brief Function to set platform mutex APIs and mutexes
+ *
+ * @param[in] apis Structure holding the mutex APIs.
+ * @param[in] mutexes Structure holding the mutexes.
+ */
+void nrf_cc310_platform_set_mutexes(
+ nrf_cc310_platform_mutex_apis_t const * const apis,
+ nrf_cc310_platform_mutexes_t const * const mutexes);
+
+
+/** @brief Function to initialize RTOS thread-safe mutexes
+ *
+ * This function must be implemented to set the platform mutex APIS,
+ * and platform mutexes.
+ *
+ * @note This function must be called once before calling
+ * @ref nrf_cc310_platform_init or @ref nrf_cc310_platform_init_no_rng.
+ *
+ * @note This function is not expected to be thread-safe.
+ */
+void nrf_cc310_platform_mutex_init(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* NRF_CC310_PLATFORM_MUTEX_H__ */
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/src/nrf_cc310_platform_abort_freertos.c b/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/src/nrf_cc310_platform_abort_freertos.c
new file mode 100644
index 0000000..a948870
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/src/nrf_cc310_platform_abort_freertos.c
@@ -0,0 +1,40 @@
+/**
+ * Copyright (c) 2019 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-BSD-5-Clause-Nordic
+ */
+#include <stdint.h>
+#include <stddef.h>
+
+#include "nrf_cc310_platform_abort.h"
+#include "FreeRTOS.h"
+
+/** @brief Definition of platform handle used during abort in FreeRTOS
+ *
+ * @note Currently not used
+ */
+static nrf_cc310_platform_abort_handle_t platform_abort_handle;
+
+
+/** @brief Definition of abort function used for FreeRTOS
+ */
+static void abort_function(char const * const reason)
+{
+ configASSERT(!reason);
+}
+
+
+/** @brief Definition of abort API to set in nrf_cc310_platform
+ */
+static const nrf_cc310_platform_abort_apis_t apis =
+{
+ .abort_handle = &platform_abort_handle,
+ .abort_fn = abort_function
+};
+
+/** @brief Function to initialize the nrf_cc310_platform abort APIs.
+ */
+void nrf_cc310_platform_abort_init(void)
+{
+ nrf_cc310_platform_set_abort(&apis);
+}
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/src/nrf_cc310_platform_abort_zephyr.c b/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/src/nrf_cc310_platform_abort_zephyr.c
new file mode 100644
index 0000000..7df6106
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/src/nrf_cc310_platform_abort_zephyr.c
@@ -0,0 +1,43 @@
+
+/**
+ * Copyright (c) 2019 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-BSD-5-Clause-Nordic
+ */
+#include <kernel.h>
+#include <misc/reboot.h>
+//#include <logging/log.h>
+//LOG_MODULE_DECLARE(cc310_platform);
+
+#include "nrf_cc310_platform_abort.h"
+
+
+/** @brief Definition of abort function used for Zephyr
+ */
+static void abort_function(char const * const reason)
+{
+ //LOG_ERR("Reason: %s", reason);
+#ifdef CONFIG_REBOOT
+ //LOG_ERR("Rebooting");
+ sys_reboot(SYS_REBOOT_WARM);
+#else
+ //LOG_ERR("Halted");
+ while(1);
+#endif
+}
+
+
+/** @brief Definition of abort API to set in nrf_cc310_platform
+ */
+static const nrf_cc310_platform_abort_apis_t apis =
+{
+ .abort_handle = NULL,
+ .abort_fn = abort_function,
+};
+
+/** @brief Function to initialize the nrf_cc310_platform abort APIs.
+ */
+void nrf_cc310_platform_abort_init(void)
+{
+ nrf_cc310_platform_set_abort(&apis);
+}
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/src/nrf_cc310_platform_mutex_freertos.c b/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/src/nrf_cc310_platform_mutex_freertos.c
new file mode 100644
index 0000000..71961c1
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/src/nrf_cc310_platform_mutex_freertos.c
@@ -0,0 +1,209 @@
+/**
+ * Copyright (c) 2019 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-BSD-5-Clause-Nordic
+ */
+#include <stdint.h>
+#include <stddef.h>
+
+#include "FreeRTOS.h"
+#include "semphr.h"
+
+#include "nrf_cc310_platform_defines.h"
+#include "nrf_cc310_platform_mutex.h"
+
+
+/** @brief external reference to the cc310 platform mutex APIs*/
+extern nrf_cc310_platform_mutex_apis_t platform_mutex_apis;
+
+/** @brief Definition of mutex for symmetric cryptography
+ */
+static SemaphoreHandle_t sym_mutex_int;
+
+/** @brief Definition of mutex for asymmetric cryptography
+ */
+static SemaphoreHandle_t asym_mutex_int;
+
+/** @brief Definition of mutex for random number generation
+ */
+static SemaphoreHandle_t rng_mutex_int;
+
+/** @brief Definition of mutex for power management changes
+ */
+static SemaphoreHandle_t power_mutex_int;
+
+
+/**@brief Definition of RTOS-independent symmetric cryptography mutex
+ * with NRF_CC310_PLATFORM_MUTEX_MASK_IS_VALID set to indicate that
+ * allocation is unneccesary
+*/
+nrf_cc310_platform_mutex_t sym_mutex =
+{
+ .mutex = &sym_mutex_int,
+ .flags = NRF_CC310_PLATFORM_MUTEX_MASK_IS_VALID
+};
+
+
+/**@brief Definition of RTOS-independent asymmetric cryptography mutex
+ * with NRF_CC310_PLATFORM_MUTEX_MASK_IS_VALID set to indicate that
+ * allocation is unneccesary
+*/
+nrf_cc310_platform_mutex_t asym_mutex =
+{
+ .mutex = &asym_mutex_int,
+ .flags = NRF_CC310_PLATFORM_MUTEX_MASK_IS_VALID
+};
+
+
+/**@brief Definition of RTOS-independent random number generation mutex
+ * with NRF_CC310_PLATFORM_MUTEX_MASK_IS_VALID set to indicate that
+ * allocation is unneccesary
+*/
+nrf_cc310_platform_mutex_t rng_mutex =
+{
+ .mutex = &rng_mutex_int,
+ .flags = NRF_CC310_PLATFORM_MUTEX_MASK_IS_VALID
+};
+
+
+/**@brief Definition of RTOS-independent power management mutex
+ * with NRF_CC310_PLATFORM_MUTEX_MASK_IS_VALID set to indicate that
+ * allocation is unneccesary
+*/
+nrf_cc310_platform_mutex_t power_mutex =
+{
+ .mutex = &power_mutex_int,
+ .flags = NRF_CC310_PLATFORM_MUTEX_MASK_IS_VALID
+};
+
+
+
+/** @brief Static function to unlock a mutex
+ */
+static void mutex_init(nrf_cc310_platform_mutex_t *mutex)
+{
+ /* Ensure that the mutex is valid (not NULL) */
+ if (mutex == NULL) {
+ platform_abort_apis.abort_fn("mutex_init called with NULL parameter");
+ }
+
+ mutex->mutex = (void*)xSemaphoreCreateMutex();
+ if (mutex->mutex == NULL) {
+ platform_abort_apis.abort_fn("Could not create mutex!");
+ }
+
+ /* Set the mask to indicate that the mutex is valid */
+ mutex->flags |= NRF_CC310_PLATFORM_MUTEX_MASK_IS_VALID;
+}
+
+
+/** @brief Static function to free a mutex
+ */
+static void mutex_free(nrf_cc310_platform_mutex_t *mutex)
+{
+ SemaphoreHandle_t p_mutex;
+
+ /* Ensure that the mutex is valid (not NULL) */
+ if (mutex == NULL) {
+ platform_abort_apis.abort_fn("mutex_free called with NULL parameter");
+ }
+
+ if (mutex->flags == NRF_CC310_PLATFORM_MUTEX_MASK_INVALID) {
+ /*Nothing to free*/
+ return;
+ }
+
+ p_mutex = (SemaphoreHandle_t)mutex->mutex;
+
+ vSemaphoreDelete(p_mutex);
+
+ /* Reset the mutex to invalid state */
+ mutex->flags = NRF_CC310_PLATFORM_MUTEX_MASK_INVALID;
+}
+
+
+/** @brief Static function to lock a mutex
+ */
+static int mutex_lock(nrf_cc310_platform_mutex_t *mutex)
+{
+ int ret;
+ SemaphoreHandle_t p_mutex;
+
+ /* Ensure that the mutex is valid (not NULL) */
+ if (mutex == NULL) {
+ platform_abort_apis.abort_fn("mutex_lock called with NULL parameter");
+ }
+
+ /* Ensure that the mutex has been initialized */
+ if (mutex->flags == NRF_CC310_PLATFORM_MUTEX_MASK_INVALID) {
+ return NRF_CC310_PLATFORM_ERROR_MUTEX_NOT_INITIALIZED;
+ }
+
+ p_mutex = (SemaphoreHandle_t)mutex->mutex;
+
+ ret = xSemaphoreTake(p_mutex, portMAX_DELAY);
+ if (ret == pdTRUE) {
+ return NRF_CC310_PLATFORM_SUCCESS;
+ }
+ else {
+ return NRF_CC310_PLATFORM_ERROR_MUTEX_FAILED;
+ }
+}
+
+
+/** @brief Static function to unlock a mutex
+ */
+static int mutex_unlock(nrf_cc310_platform_mutex_t * mutex)
+{
+ int ret;
+ SemaphoreHandle_t p_mutex;
+
+ /* Ensure that the mutex is valid (not NULL) */
+ if (mutex == NULL) {
+ platform_abort_apis.abort_fn("mutex_unlock called with NULL parameter");
+ }
+
+ /* Ensure that the mutex has been initialized */
+ if (mutex->flags == NRF_CC310_PLATFORM_MUTEX_MASK_INVALID) {
+ return NRF_CC310_PLATFORM_ERROR_MUTEX_NOT_INITIALIZED;
+ }
+
+ p_mutex = (SemaphoreHandle_t)mutex->mutex;
+
+ ret = xSemaphoreGive(p_mutex);
+ if (ret != pdTRUE) {
+ platform_abort_apis.abort_fn("Could not unlock mutex!");
+ }
+
+ return NRF_CC310_PLATFORM_SUCCESS;
+}
+
+
+/**@brief Constant definition of mutex APIs to set in nrf_cc310_platform
+ */
+const nrf_cc310_platform_mutex_apis_t mutex_apis =
+{
+ .mutex_init_fn = mutex_init,
+ .mutex_free_fn = mutex_free,
+ .mutex_lock_fn = mutex_lock,
+ .mutex_unlock_fn = mutex_unlock
+};
+
+
+/** @brief Constant definition of mutexes to set in nrf_cc310_platform
+ */
+const nrf_cc310_platform_mutexes_t mutexes =
+{
+ .sym_mutex = &sym_mutex,
+ .asym_mutex = &asym_mutex,
+ .rng_mutex = &rng_mutex,
+ .reserved = NULL,
+ .power_mutex = &power_mutex
+};
+
+/** @brief Function to initiialize the nrf_cc310_platform mutex APIs.
+ */
+void nrf_cc310_platform_mutex_init(void)
+{
+ nrf_cc310_platform_set_mutexes(&mutex_apis, &mutexes);
+}
diff --git a/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/src/nrf_cc310_platform_mutex_zephyr.c b/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/src/nrf_cc310_platform_mutex_zephyr.c
new file mode 100644
index 0000000..0f37e9b
--- /dev/null
+++ b/third_party/NordicSemiconductor/libraries/nrf_security/nrf_cc310_plat/src/nrf_cc310_platform_mutex_zephyr.c
@@ -0,0 +1,246 @@
+/**
+ * Copyright (c) 2019 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-BSD-5-Clause-Nordic
+ */
+#include <stdint.h>
+#include <stddef.h>
+#include <string.h>
+
+#include <zephyr.h>
+#include <kernel.h>
+
+#include "nrf_cc310_platform_defines.h"
+#include "nrf_cc310_platform_mutex.h"
+#include "nrf_cc310_platform_abort.h"
+
+/** @brief External reference to the platforms abort APIs
+ * This is used in case the mutex functions don't
+ * provide return values in their APIs.
+ */
+extern nrf_cc310_platform_abort_apis_t platform_abort_apis;
+
+/** @brief Definition of mutex for symmetric cryptography
+ */
+K_MUTEX_DEFINE(sym_mutex_int);
+
+/** @brief Definition of mutex for asymmetric cryptography
+ */
+K_MUTEX_DEFINE(asym_mutex_int);
+
+/** @brief Definition of mutex for random number generation
+*/
+K_MUTEX_DEFINE(rng_mutex_int);
+
+/** @brief Definition of mutex for power mode changes
+*/
+K_MUTEX_DEFINE(power_mutex_int);
+
+/** @brief Arbritary number of mutexes the system suppors
+ */
+#define NUM_MUTEXES 64
+
+/** @brief Structure definition of the mutex slab
+ */
+struct k_mem_slab mutex_slab;
+
+/** @brief Definition of buffer used for the mutex slabs
+ */
+char __aligned(4) mutex_slab_buffer[NUM_MUTEXES * sizeof(struct k_mutex)];
+
+/**@brief Definition of RTOS-independent symmetric cryptography mutex
+ * with NRF_CC310_PLATFORM_MUTEX_MASK_IS_VALID set to indicate that
+ * allocation is unneccesary
+*/
+nrf_cc310_platform_mutex_t sym_mutex =
+{
+ .mutex = &sym_mutex_int,
+ .flags = NRF_CC310_PLATFORM_MUTEX_MASK_IS_VALID
+};
+
+
+/**@brief Definition of RTOS-independent asymmetric cryptography mutex
+ * with NRF_CC310_PLATFORM_MUTEX_MASK_IS_VALID set to indicate that
+ * allocation is unneccesary
+*/
+nrf_cc310_platform_mutex_t asym_mutex =
+{
+ .mutex = &asym_mutex_int,
+ .flags = NRF_CC310_PLATFORM_MUTEX_MASK_IS_VALID
+};
+
+
+/**@brief Definition of RTOS-independent random number generation mutex
+ * with NRF_CC310_PLATFORM_MUTEX_MASK_IS_VALID set to indicate that
+ * allocation is unneccesary
+*/
+nrf_cc310_platform_mutex_t rng_mutex =
+{
+ .mutex = &rng_mutex_int,
+ .flags = NRF_CC310_PLATFORM_MUTEX_MASK_IS_VALID
+};
+
+
+/**@brief Definition of RTOS-independent power management mutex
+ * with NRF_CC310_PLATFORM_MUTEX_MASK_IS_VALID set to indicate that
+ * allocation is unneccesary
+*/
+nrf_cc310_platform_mutex_t power_mutex =
+{
+ .mutex = &power_mutex_int,
+ .flags = NRF_CC310_PLATFORM_MUTEX_MASK_IS_VALID
+};
+
+
+/**@brief static function to initialize a mutex
+ */
+static void mutex_init(nrf_cc310_platform_mutex_t *mutex) {
+ int ret;
+ struct k_mutex * p_mutex;
+
+ /* Ensure that the mutex is valid (not NULL) */
+ if (mutex == NULL) {
+ platform_abort_apis.abort_fn(
+ "mutex_init called with NULL parameter");
+ }
+
+ /* Allocate if this has not been initialized statically */
+ if (mutex->flags == NRF_CC310_PLATFORM_MUTEX_MASK_INVALID &&
+ mutex->mutex == NULL) {
+ /* allocate some memory for the mute*/
+ ret = k_mem_slab_alloc(&mutex_slab, &mutex->mutex, K_FOREVER);
+ if(ret != 0 || mutex->mutex == NULL)
+ {
+ /* Allocation failed. Abort all operations */
+ platform_abort_apis.abort_fn(
+ "Could not allocate mutex before initializing");
+ }
+
+ memset(mutex->mutex, 0, sizeof(struct k_mutex));
+
+ /** Set a flag to ensure that mutex is deallocated by the freeing
+ * operation
+ */
+ mutex->flags |= NRF_CC310_PLATFORM_MUTEX_MASK_IS_ALLOCATED;
+ }
+
+ p_mutex = (struct k_mutex *)mutex->mutex;
+ k_mutex_init(p_mutex);
+
+ /* Set the mask to indicate that the mutex is valid */
+ mutex->flags |= NRF_CC310_PLATFORM_MUTEX_MASK_IS_VALID;
+}
+
+
+/** @brief Static function to free a mutex
+ */
+static void mutex_free(nrf_cc310_platform_mutex_t *mutex) {
+ /* Ensure that the mutex is valid (not NULL) */
+ if (mutex == NULL) {
+ platform_abort_apis.abort_fn(
+ "mutex_init called with NULL parameter");
+ }
+
+ /* Check if we are freeing a mutex that isn't initialized */
+ if (mutex->flags == NRF_CC310_PLATFORM_MUTEX_MASK_INVALID) {
+ /*Nothing to free*/
+ return;
+ }
+
+ /* Check if the mutex was allocated or being statically defined */
+ if ((mutex->flags & NRF_CC310_PLATFORM_MUTEX_MASK_IS_ALLOCATED) == 0) {
+ k_mem_slab_free(&mutex_slab, mutex->mutex);
+ mutex->mutex = NULL;
+ }
+ else {
+ memset(mutex->mutex, 0, sizeof(struct k_mutex));
+ }
+
+ /* Reset the mutex to invalid state */
+ mutex->flags = NRF_CC310_PLATFORM_MUTEX_MASK_INVALID;
+}
+
+
+/** @brief Static function to lock a mutex
+ */
+static int32_t mutex_lock(nrf_cc310_platform_mutex_t *mutex) {
+ int ret;
+ struct k_mutex * p_mutex;
+
+ /* Ensure that the mutex param is valid (not NULL) */
+ if(mutex == NULL) {
+ return NRF_CC310_PLATFORM_ERROR_PARAM_NULL;
+ }
+
+ /* Ensure that the mutex has been initialized */
+ if (mutex->flags == NRF_CC310_PLATFORM_MUTEX_MASK_INVALID) {
+ return NRF_CC310_PLATFORM_ERROR_MUTEX_NOT_INITIALIZED;
+ }
+
+ p_mutex = (struct k_mutex *)mutex->mutex;
+
+ ret = k_mutex_lock(p_mutex, K_FOREVER);
+ if (ret == 0) {
+ return NRF_CC310_PLATFORM_SUCCESS;
+ }
+ else {
+ return NRF_CC310_PLATFORM_ERROR_MUTEX_FAILED;
+ }
+}
+
+
+/** @brief Static function to unlock a mutex
+ */
+static int32_t mutex_unlock(nrf_cc310_platform_mutex_t *mutex) {
+ struct k_mutex * p_mutex;
+
+ /* Ensure that the mutex param is valid (not NULL) */
+ if(mutex == NULL) {
+ return NRF_CC310_PLATFORM_ERROR_PARAM_NULL;
+ }
+
+ /* Ensure that the mutex has been initialized */
+ if (mutex->flags == NRF_CC310_PLATFORM_MUTEX_MASK_INVALID) {
+ return NRF_CC310_PLATFORM_ERROR_MUTEX_NOT_INITIALIZED;
+ }
+
+ p_mutex = (struct k_mutex *)mutex->mutex;
+
+ k_mutex_unlock(p_mutex);
+ return NRF_CC310_PLATFORM_SUCCESS;
+}
+
+
+/**@brief Constant definition of mutex APIs to set in nrf_cc310_platform
+ */
+static const nrf_cc310_platform_mutex_apis_t mutex_apis =
+{
+ .mutex_init_fn = mutex_init,
+ .mutex_free_fn = mutex_free,
+ .mutex_lock_fn = mutex_lock,
+ .mutex_unlock_fn = mutex_unlock
+};
+
+
+/** @brief Constant definition of mutexes to set in nrf_cc310_platform
+ */
+static const nrf_cc310_platform_mutexes_t mutexes =
+{
+ .sym_mutex = &sym_mutex,
+ .asym_mutex = &asym_mutex,
+ .rng_mutex = &rng_mutex,
+ .reserved = NULL,
+ .power_mutex = &power_mutex,
+};
+
+/** @brief Function to initialize the nrf_cc310_platform mutex APIs
+ */
+void nrf_cc310_platform_mutex_init(void)
+{
+ k_mem_slab_init(&mutex_slab,
+ mutex_slab_buffer,
+ sizeof(struct k_mutex),
+ NUM_MUTEXES);
+
+ nrf_cc310_platform_set_mutexes(&mutex_apis, &mutexes);
+}
diff --git a/third_party/NordicSemiconductor/libraries/usb/app_usbd.c b/third_party/NordicSemiconductor/libraries/usb/app_usbd.c
index 34dfe94..23a8c4b 100644
--- a/third_party/NordicSemiconductor/libraries/usb/app_usbd.c
+++ b/third_party/NordicSemiconductor/libraries/usb/app_usbd.c
@@ -1,1919 +1,1919 @@
-/**
- * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-#include "sdk_common.h"
-#if NRF_MODULE_ENABLED(APP_USBD)
-
-#include "app_usbd.h"
-#include "app_usbd_core.h"
-#include "app_usbd_request.h"
-#include "nrf_power.h"
-#include "nrf_drv_clock.h"
-#include "nrf_drv_power.h"
-#if APP_USBD_CONFIG_EVENT_QUEUE_ENABLE
-#include "nrf_atfifo.h"
-#include "nrf_atomic.h"
-#endif
-
-#define NRF_LOG_MODULE_NAME app_usbd
-
-#if APP_USBD_CONFIG_LOG_ENABLED
-#define NRF_LOG_LEVEL APP_USBD_CONFIG_LOG_LEVEL
-#define NRF_LOG_INFO_COLOR APP_USBD_CONFIG_INFO_COLOR
-#define NRF_LOG_DEBUG_COLOR APP_USBD_CONFIG_DEBUG_COLOR
-#else //APP_USBD_CONFIG_LOG_ENABLED
-#define NRF_LOG_LEVEL 0
-#endif //APP_USBD_CONFIG_LOG_ENABLED
-#include "nrf_log.h"
-NRF_LOG_MODULE_REGISTER();
-
-
-/* Base variables tests */
-
-/* Check event of app_usbd_event_type_t enumerator */
-STATIC_ASSERT((int32_t)APP_USBD_EVT_FIRST_POWER == (int32_t)NRF_DRV_USBD_EVT_CNT);
-STATIC_ASSERT(sizeof(app_usbd_event_type_t) == sizeof(nrf_drv_usbd_event_type_t));
-
-STATIC_ASSERT(sizeof(app_usbd_descriptor_header_t) == 2);
-STATIC_ASSERT(sizeof(app_usbd_descriptor_device_t) == 18);
-STATIC_ASSERT(sizeof(app_usbd_descriptor_configuration_t) == 9);
-STATIC_ASSERT(sizeof(app_usbd_descriptor_iface_t) == 9);
-STATIC_ASSERT(sizeof(app_usbd_descriptor_ep_t) == 7);
-STATIC_ASSERT(sizeof(app_usbd_descriptor_iad_t) == 8);
-
-STATIC_ASSERT(sizeof(app_usbd_setup_t) == sizeof(nrf_drv_usbd_setup_t));
-
-/**
- * @internal
- * @defgroup app_usbd_internals USBD library internals
- * @ingroup app_usbd
- *
- * Internal variables, auxiliary macros and functions of USBD library.
- * @{
- */
-
-#if (APP_USBD_PROVIDE_SOF_TIMESTAMP) || defined(__SDK_DOXYGEN__)
-/**
- * @brief The last received frame number.
- */
-static uint16_t m_last_frame;
-#endif
-
-/**
- * @brief Variable type for endpoint configuration.
- *
- * Each endpoint would have assigned this type of configuration structure.
- */
-typedef struct
-{
- /**
- * @brief The class instance.
- *
- * The pointer to the class instance that is connected to the endpoint.
- */
- app_usbd_class_inst_t const * p_cinst;
-
- /**
- * @brief Endpoint event handler.
- *
- * Event handler for the endpoint.
- * It is set to event handler for the class instance during connection by default,
- * but it can be then updated for as a reaction for @ref APP_USBD_EVT_ATTACHED event.
- * This way we can speed up the interpretation of endpoint related events.
- */
- app_usbd_ep_event_handler_t event_handler;
-}app_usbd_ep_conf_t;
-
-
-/**
- * @brief Internal event with SOF counter.
- */
-typedef struct
-{
- app_usbd_internal_evt_t evt; //!< Internal event type
-
-#if (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE) \
- || defined(__SDK_DOXYGEN__)
- uint16_t sof_cnt; //!< Number of the SOF events that appears before current event
- uint16_t start_frame; //!< Number of the SOF frame that starts this event
-#endif // (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE)
-
-} app_usbd_internal_queue_evt_t;
-
-#if (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE) || defined(__SDK_DOXYGEN__)
-/**
- * @brief Event queue.
- *
- * The queue with events to be processed.
- */
-NRF_ATFIFO_DEF(m_event_queue, app_usbd_internal_queue_evt_t, APP_USBD_CONFIG_EVENT_QUEUE_SIZE);
-
-#if (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE) \
- || defined(__SDK_DOXYGEN__)
-
-/** @brief SOF events counter */
-static nrf_atomic_u32_t m_sof_events_cnt;
-
-/** @brief SOF Frame counter */
-static uint16_t m_event_frame;
-
-/* Limit of SOF events stacked until warning message. */
-#define APP_USBD_SOF_WARNING_LIMIT 500
-#endif // (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE)
- // || defined(__SDK_DOXYGEN__)
-
-#endif
-
-/**
- * @brief Instances connected with IN endpoints.
- *
- * Array of instance pointers connected with every IN endpoint.
- * @sa m_epout_instances
- */
-static app_usbd_ep_conf_t m_epin_conf[NRF_USBD_EPIN_CNT];
-
-/**
- * @brief Instances connected with OUT endpoints.
- *
- * Array of instance pointers connected with every OUT endpoint.
- * @sa m_epin_instances
- */
-static app_usbd_ep_conf_t m_epout_conf[NRF_USBD_EPIN_CNT];
-
-/**
- * @brief Beginning of classes list.
- *
- * All enabled in current configuration instances are connected into
- * a single linked list chain.
- * This variable points to first element.
- * Core class instance (connected to endpoint 0) is not listed here.
- */
-static app_usbd_class_inst_t const * m_p_first_cinst;
-
-/**
- * @brief Classes list that requires SOF events.
- *
- * Pointer to first class that requires SOF events.
- */
-static app_usbd_class_inst_t const * m_p_first_sof_cinst;
-
-/**
- * @brief Classes list that require SOF events in interrupt.
- *
- * Pointer to first class that requires SOF events in interrupt.
- */
-static app_usbd_class_inst_t const * m_p_first_sof_interrupt_cinst;
-
-/**
- * @brief Default configuration (when NULL is passed to @ref app_usbd_init).
- */
-static const app_usbd_config_t m_default_conf = {
-#if (!(APP_USBD_CONFIG_EVENT_QUEUE_ENABLE)) || defined(__SDK_DOXYGEN__)
- .ev_handler = app_usbd_event_execute,
-#endif
-#if (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE) || defined(__SDK_DOXYGEN__)
- .ev_isr_handler = NULL,
-#endif
- .ev_state_proc = NULL,
- .enable_sof = false
-};
-
-/**
- * @brief SUSPEND state machine states.
- *
- * The enumeration of internal SUSPEND state machine states.
- */
-typedef enum
-{
- SUSTATE_STOPPED, /**< The USB driver was not started */
- SUSTATE_STARTED, /**< The USB driver was started - waiting for USB RESET */
- SUSTATE_ACTIVE, /**< Active state */
- SUSTATE_SUSPENDING, /**< Suspending - waiting for the user to acknowledge */
- SUSTATE_SUSPEND, /**< Suspended */
- SUSTATE_RESUMING, /**< Resuming - waiting for clock */
- SUSTATE_WAKINGUP_WAITING_HFCLK_WREQ, /**< Waking up - waiting for clock and WUREQ from driver */
- SUSTATE_WAKINGUP_WAITING_HFCLK, /**< Waking up - waiting for HFCLK (WUREQ detected) */
- SUSTATE_WAKINGUP_WAITING_WREQ, /**< Waking up - waiting for WREQ (HFCLK active) */
-}app_usbd_sustate_t;
-
-/**
- * @brief Current suspend state.
- *
- * The state of the suspend state machine.
- */
-static app_usbd_sustate_t m_sustate;
-
-/**
- * @brief Remote wake-up register/unregister.
- *
- * Counter incremented when appended instance required remote wake-up functionality.
- * It should be decremented when the class is removed.
- * When this counter is not zero, remote wake-up functionality is activated inside core.
- */
-static uint8_t m_rwu_registered_counter;
-
-/**
- * @brief Current configuration.
- */
-static app_usbd_config_t m_current_conf;
-
-/**
- * @brief Class interface call: event handler
- *
- * @ref app_usbd_class_interface_t::event_handler
- *
- * @param[in] p_cinst Class instance.
- * @param[in] p_event Event passed to class instance.
- *
- * @return Standard error code @ref ret_code_t
- * @retval NRF_SUCCESS event handled successfully.
- * @retval NRF_ERROR_NOT_SUPPORTED unsupported event.
- * */
-static inline ret_code_t class_event_handler(app_usbd_class_inst_t const * const p_cinst,
- app_usbd_complex_evt_t const * const p_event)
-{
- ASSERT(p_cinst != NULL);
- ASSERT(p_cinst->p_class_methods != NULL);
- ASSERT(p_cinst->p_class_methods->event_handler != NULL);
- return p_cinst->p_class_methods->event_handler(p_cinst, p_event);
-}
-
-#if (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE) || defined(__SDK_DOXYGEN__)
-static inline void class_sof_interrupt_handler(app_usbd_class_inst_t const * const p_cinst,
- app_usbd_complex_evt_t const * const p_event)
-{
- ASSERT(p_cinst != NULL);
- ASSERT(p_cinst->p_data != NULL);
- ASSERT(p_cinst->p_data->sof_handler != NULL);
- p_cinst->p_data->sof_handler(p_event->drv_evt.data.sof.framecnt);
-}
-
-/**
- * @brief User event handler call (passed via configuration).
- *
- * @param p_event Handler of an event that is going to be added into queue.
- * @param queued The event is visible in the queue.
- */
-static inline void user_event_handler(app_usbd_internal_evt_t const * const p_event, bool queued)
-{
- if ((m_current_conf.ev_isr_handler) != NULL)
- {
- m_current_conf.ev_isr_handler(p_event, queued);
- }
-}
-#endif
-
-/**
- * @brief User event processor call (passed via configuration).
- *
- * @param event Event type.
- */
-static inline void user_event_state_proc(app_usbd_event_type_t event)
-{
- if ((m_current_conf.ev_state_proc) != NULL)
- {
- m_current_conf.ev_state_proc(event);
- }
-}
-
-/**
- * @brief Find a specified descriptor.
- *
- * @param[in] p_cinst Class instance.
- * @param[in] desc_type Descriptor type @ref app_usbd_descriptor_t
- * @param[in] desc_index Descriptor index.
- * @param[out] p_desc Pointer to escriptor.
- * @param[out] p_desc_len Length of descriptor.
- *
- * @return Standard error code @ref ret_code_t
- * @retval NRF_SUCCESS Descriptor successfully found.
- * @retval NRF_ERROR_NOT_FOUND Descriptor not found.
- * */
-ret_code_t app_usbd_class_descriptor_find(app_usbd_class_inst_t const * const p_cinst,
- uint8_t desc_type,
- uint8_t desc_index,
- uint8_t * p_desc,
- size_t * p_desc_len)
-{
- app_usbd_class_descriptor_ctx_t siz;
- APP_USBD_CLASS_DESCRIPTOR_INIT(&siz);
- uint32_t total_size = 0;
- while(p_cinst->p_class_methods->feed_descriptors(&siz, p_cinst, NULL, sizeof(uint8_t)))
- {
- total_size++;
- }
-
- uint8_t cur_len = 0;
- uint32_t cur_size = 0;
-
- uint8_t index = 0;
- app_usbd_class_descriptor_ctx_t descr;
- APP_USBD_CLASS_DESCRIPTOR_INIT(&descr);
-
- while(cur_size < total_size)
- {
- /* First byte of a descriptor is its size */
- UNUSED_RETURN_VALUE(p_cinst->p_class_methods->feed_descriptors(&descr,
- p_cinst,
- &cur_len,
- sizeof(uint8_t)));
-
- /* Second byte is type of the descriptor */
- uint8_t type;
- UNUSED_RETURN_VALUE(p_cinst->p_class_methods->feed_descriptors(&descr,
- p_cinst,
- &type,
- sizeof(uint8_t)));
-
- if(type == desc_type)
- {
- if(index == desc_index)
- {
- /* Copy the length of descriptor to *p_desc_len */
- *p_desc_len = cur_len;
- /* Two first bytes of descriptor have already been fed - copy them to *p_desc */
- *p_desc++ = cur_len;
- *p_desc++ = desc_type;
- /* Copy the rest of descriptor to *p_desc */
- UNUSED_RETURN_VALUE(p_cinst->p_class_methods->feed_descriptors(&descr,
- p_cinst,
- p_desc,
- cur_len-2));
- return NRF_SUCCESS;
- }
- else
- {
- index++;
- }
- }
- /* Fast-forward through unmatched descriptor */
- UNUSED_RETURN_VALUE(p_cinst->p_class_methods->feed_descriptors(&descr,
- p_cinst,
- NULL,
- cur_len-2));
- cur_size += cur_len;
- }
- return NRF_ERROR_NOT_FOUND;
-}
-
-/**
- * @brief Access into selected endpoint configuration structure.
- *
- * @param ep Endpoint address.
- * @return A pointer to the endpoint configuration structure.
- *
- * @note This function would assert when endpoint number is not correct and debugging is enabled.
- */
-static app_usbd_ep_conf_t * app_usbd_ep_conf_access(nrf_drv_usbd_ep_t ep)
-{
- if (NRF_USBD_EPIN_CHECK(ep))
- {
- uint8_t nr = NRF_USBD_EP_NR_GET(ep);
- ASSERT(nr < NRF_USBD_EPIN_CNT);
- return &m_epin_conf[nr];
- }
- else
- {
- uint8_t nr = NRF_USBD_EP_NR_GET(ep);
- ASSERT(nr < NRF_USBD_EPOUT_CNT);
- return &m_epout_conf[nr];
- }
-}
-
-/**
- * @brief Accessing instance connected with selected endpoint.
- *
- * @param ep Endpoint number.
- *
- * @return The pointer to the instance connected with endpoint.
- */
-static inline app_usbd_class_inst_t const * app_usbd_ep_instance_get(nrf_drv_usbd_ep_t ep)
-{
- return app_usbd_ep_conf_access(ep)->p_cinst;
-}
-
-/**
- * @brief Connect instance with selected endpoint.
- *
- * This function configures instance connected to endpoint but also sets
- * default event handler function pointer.
- *
- * @param ep Endpoint number.
- * @param p_cinst The instance to connect into the selected endpoint.
- * NULL if endpoint is going to be disconnected.
- *
- * @note Disconnecting EP0 is not allowed and protected by assertion.
- */
-static void app_usbd_ep_instance_set(nrf_drv_usbd_ep_t ep, app_usbd_class_inst_t const * p_cinst)
-{
- app_usbd_ep_conf_t * p_ep_conf = app_usbd_ep_conf_access(ep);
- /* Set instance and default event handler */
- p_ep_conf->p_cinst = p_cinst;
- if (p_cinst == NULL)
- {
- ASSERT((ep != NRF_DRV_USBD_EPOUT0) && (ep != NRF_DRV_USBD_EPIN0)); /* EP0 should never be disconnected */
- p_ep_conf->event_handler = NULL;
- }
- else
- {
- p_ep_conf->event_handler = p_cinst->p_class_methods->event_handler;
- }
-}
-
-/**
- * @brief Call the core handler.
- *
- * Core instance is special kind of instance that is connected only to endpoint 0.
- * It is not present in instance list.
- * This auxiliary function makes future changes easier.
- * Just call the event instance for core module here.
- */
-static inline ret_code_t app_usbd_core_handler_call(app_usbd_internal_evt_t const * const p_event)
-{
- return m_epout_conf[0].event_handler(
- m_epout_conf[0].p_cinst,
- (app_usbd_complex_evt_t const *)p_event);
-}
-
-
-
-/**
- * @brief Add event for execution.
- *
- * Dependent on configuration event would be executed in place or would be added into queue
- * to be executed later.
- *
- * @param p_event_input Event to be executed.
- */
-static inline void app_usbd_event_add(app_usbd_internal_evt_t const * const p_event_input)
-{
- app_usbd_internal_evt_t const * p_event = p_event_input;
-
-
- if (p_event->type == APP_USBD_EVT_DRV_SETUP)
- {
- uint8_t bRequest = nrf_usbd_setup_brequest_get();
- uint8_t bmRequestType = nrf_usbd_setup_bmrequesttype_get();
-
- if ((bmRequestType == app_usbd_setup_req_val(
- APP_USBD_SETUP_REQREC_DEVICE,
- APP_USBD_SETUP_REQTYPE_STD,
- APP_USBD_SETUP_REQDIR_OUT))
- && (bRequest == APP_USBD_SETUP_STDREQ_SET_ADDRESS))
- {
- static const app_usbd_internal_evt_t event_setaddress =
- {
- .type = APP_USBD_EVT_SETUP_SETADDRESS,
- };
- p_event = &event_setaddress;
- }
- }
-
-#if (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE)
-
- if (p_event->app_evt.type == APP_USBD_EVT_DRV_SOF)
- {
- /* Propagate SOF event to classes that need it in interrupt */
- app_usbd_class_inst_t const * p_inst = app_usbd_class_sof_interrupt_first_get();
- while (NULL != p_inst)
- {
- class_sof_interrupt_handler(p_inst, (app_usbd_complex_evt_t const *)p_event);
- p_inst = app_usbd_class_sof_interrupt_next_get(p_inst);
- }
-
-#if (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE)
- CRITICAL_REGION_ENTER();
- if (m_sof_events_cnt == 0)
- {
- m_event_frame = p_event->drv_evt.data.sof.framecnt;
- }
- UNUSED_RETURN_VALUE(nrf_atomic_u32_add(&m_sof_events_cnt, 1));
- CRITICAL_REGION_EXIT();
-
- user_event_handler(p_event, true);
- if (m_sof_events_cnt == APP_USBD_SOF_WARNING_LIMIT)
- {
- NRF_LOG_WARNING("Stacked over %d SOF events.", APP_USBD_SOF_WARNING_LIMIT);
- }
- return;
-
-#endif // (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE)
-
-#if (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_INTERRUPT)
-
- user_event_handler(p_event, false);
- app_usbd_event_execute(p_event);
- return;
-
-#endif // (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_INTERRUPT)
- }
-
- nrf_atfifo_item_put_t cx;
- app_usbd_internal_queue_evt_t * p_event_item = nrf_atfifo_item_alloc(m_event_queue, &cx);
-
- if (NULL != p_event_item)
- {
- bool visible;
- p_event_item->evt = *p_event;
-
-#if (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE)
- CRITICAL_REGION_ENTER();
- p_event_item->start_frame = m_event_frame - m_sof_events_cnt + 1;
- p_event_item->sof_cnt = nrf_atomic_u32_fetch_store(&m_sof_events_cnt, 0);
- CRITICAL_REGION_EXIT();
-#endif // (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE)
-
- visible = nrf_atfifo_item_put(m_event_queue, &cx);
- user_event_handler(p_event, visible);
- }
- else
- {
- NRF_LOG_ERROR("Event queue full.");
- }
-#else
- m_current_conf.ev_handler(p_event);
-#endif
-}
-
-/**
- * @brief Power event handler.
- *
- * The function that pushes power events into the queue.
- * @param p_event Event from power driver to map into APP_USBD_EVT_POWER_ event.
- */
-#if APP_USBD_CONFIG_POWER_EVENTS_PROCESS
-static void app_usbd_power_event_handler(nrf_drv_power_usb_evt_t event)
-{
- switch(event)
- {
- case NRF_DRV_POWER_USB_EVT_DETECTED:
- {
- static const app_usbd_internal_evt_t ev = {
- .type = APP_USBD_EVT_POWER_DETECTED
- };
- app_usbd_event_add(&ev);
- break;
- }
- case NRF_DRV_POWER_USB_EVT_REMOVED:
- {
- static const app_usbd_internal_evt_t ev = {
- .type = APP_USBD_EVT_POWER_REMOVED
- };
- app_usbd_event_add(&ev);
- break;
- }
- case NRF_DRV_POWER_USB_EVT_READY:
- {
- static const app_usbd_internal_evt_t ev = {
- .type = APP_USBD_EVT_POWER_READY
- };
- app_usbd_event_add(&ev);
- break;
- }
- default:
- ASSERT(false);
- }
-}
-#endif
-
-/**
- * @brief Event handler.
- *
- * The function that pushes the event into the queue.
- * @param p_event Event to push.
- */
-static void app_usbd_event_handler(nrf_drv_usbd_evt_t const * const p_event)
-{
- app_usbd_event_add((app_usbd_internal_evt_t const *)p_event);
-}
-
-/**
- * @brief HF clock ready event handler.
- *
- * Function that is called when high frequency clock is started.
- *
- * @param event Event type that comes from clock driver.
- */
-static void app_usbd_hfclk_ready(nrf_drv_clock_evt_type_t event)
-{
- ASSERT(NRF_DRV_CLOCK_EVT_HFCLK_STARTED == event);
- static const app_usbd_evt_t evt_data = {
- .type = APP_USBD_EVT_HFCLK_READY
- };
- app_usbd_event_add((app_usbd_internal_evt_t const * )&evt_data);
-}
-
-/**
- * @brief Check if the HFCLK was requested in selected suspend state machine state.
- *
- *
- * @param sustate State to be checked.
- *
- * @retval true High frequency clock was requested in selected state.
- * @retval false High frequency clock was released in selected state.
- */
-static inline bool app_usbd_sustate_with_requested_hfclk(app_usbd_sustate_t sustate)
-{
- switch(sustate)
- {
- case SUSTATE_STOPPED: return false;
- case SUSTATE_STARTED: return false;
- case SUSTATE_ACTIVE: return true;
- case SUSTATE_SUSPENDING: return false;
- case SUSTATE_SUSPEND: return false;
- case SUSTATE_RESUMING: return true;
- case SUSTATE_WAKINGUP_WAITING_HFCLK_WREQ: return true;
- case SUSTATE_WAKINGUP_WAITING_HFCLK: return true;
- case SUSTATE_WAKINGUP_WAITING_WREQ: return true;
- default:
- return false;
- }
-}
-
-/**
- * @brief Check it the HFCLK is running in selected suspend state machine state.
- *
- * @param sustate State to be checked.
- *
- * @retval true High frequency clock is running in selected state.
- * @retval false High frequency clock is released in selected state.
- */
-static inline bool app_usbd_sustate_with_running_hfclk(app_usbd_sustate_t sustate)
-{
- switch(sustate)
- {
- case SUSTATE_STOPPED: return false;
- case SUSTATE_STARTED: return false;
- case SUSTATE_ACTIVE: return true;
- case SUSTATE_SUSPENDING: return false;
- case SUSTATE_SUSPEND: return false;
- case SUSTATE_RESUMING: return false;
- case SUSTATE_WAKINGUP_WAITING_HFCLK_WREQ: return false;
- case SUSTATE_WAKINGUP_WAITING_HFCLK: return false;
- case SUSTATE_WAKINGUP_WAITING_WREQ: return true;
- default:
- return false;
- }
-}
-
-/**
- * @brief Get current suspend state machine state.
- *
- * @return The state of the suspend state machine.
- */
-static inline app_usbd_sustate_t sustate_get(void)
-{
- return m_sustate;
-}
-
-/**
- * @brief Set current suspend state machine state.
- *
- * @param sustate The requested state of the state machine.
- */
-static inline void sustate_set(app_usbd_sustate_t sustate)
-{
- if (app_usbd_sustate_with_requested_hfclk(sustate) != app_usbd_sustate_with_requested_hfclk(m_sustate))
- {
- if (app_usbd_sustate_with_requested_hfclk(sustate))
- {
- static nrf_drv_clock_handler_item_t clock_handler_item =
- {
- .event_handler = app_usbd_hfclk_ready
- };
- nrf_drv_clock_hfclk_request(&clock_handler_item);
- }
- else
- {
- nrf_drv_clock_hfclk_release();
- }
- }
- if (app_usbd_sustate_with_running_hfclk(sustate) != app_usbd_sustate_with_running_hfclk(m_sustate))
- {
- if (app_usbd_sustate_with_running_hfclk(sustate))
- {
- nrf_drv_usbd_active_irq_config();
- }
- else
- {
- nrf_drv_usbd_suspend_irq_config();
- }
- }
- m_sustate = sustate;
-}
-
-/**
- * @brief Default selection function for interface.
- *
- * This function just enables and clears interface endpoints.
- *
- * @param[in] p_inst Class instance.
- * @param[in] iface_idx Interface index.
- * @param[in] alternate Interface alternate setting.
- *
- * @note Currently only alternate setting 0 is supported.
- *
- * @return Standard error code @ref ret_code_t
- * @retval NRF_SUCCESS Endpoints enabled and cleared.
- * @retval NRF_ERROR_INVALID_PARAM Unsupported alternate selected.
- */
-static inline ret_code_t default_iface_select(
- app_usbd_class_inst_t const * const p_inst,
- uint8_t iface_idx,
- uint8_t alternate)
-{
- ASSERT(iface_idx <= app_usbd_class_iface_count_get(p_inst));
-
- if (alternate != 0)
- {
- return NRF_ERROR_INVALID_PARAM;
- }
-
- app_usbd_class_iface_conf_t const * p_iface = app_usbd_class_iface_get(p_inst, iface_idx);
- uint8_t ep_count = app_usbd_class_iface_ep_count_get(p_iface);
-
- for (uint8_t i = 0; i < ep_count; ++i)
- {
- /* Enable every endpoint */
- app_usbd_class_ep_conf_t const * p_ep = app_usbd_class_iface_ep_get(p_iface, i);
- app_usbd_ep_enable(p_ep->address);
- }
- return NRF_SUCCESS;
-}
-
-/**
- * @brief Default deselection function for interface.
- *
- * This function just disables all interface endpoints.
- *
- * @param[in] p_inst Class instance.
- * @param[in] iface_idx Interface index.
- */
-static inline void default_iface_deselect(
- app_usbd_class_inst_t const * const p_inst,
- uint8_t iface_idx)
-{
- ASSERT(iface_idx <= app_usbd_class_iface_count_get(p_inst));
-
- app_usbd_class_iface_conf_t const * p_iface = app_usbd_class_iface_get(p_inst, iface_idx);
- uint8_t ep_count = app_usbd_class_iface_ep_count_get(p_iface);
-
- for (uint8_t i = 0; i < ep_count; ++i)
- {
- /* Disable every endpoint */
- app_usbd_class_ep_conf_t const * p_ep = app_usbd_class_iface_ep_get(p_iface, i);
- app_usbd_ep_disable(p_ep->address);
- }
-}
-
-
-/** @} */
-
-#if (APP_USBD_PROVIDE_SOF_TIMESTAMP) || defined(__SDK_DOXYGEN__)
-uint32_t app_usbd_sof_timestamp_get(void)
-{
- return m_last_frame;
-}
-#endif
-
-ret_code_t app_usbd_init(app_usbd_config_t const * p_config)
-{
- ASSERT(nrf_drv_clock_init_check());
- ret_code_t ret;
-
-#if (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE) || defined(__SDK_DOXYGEN__)
- ret = NRF_ATFIFO_INIT(m_event_queue);
- if (NRF_SUCCESS != ret)
- {
- return NRF_ERROR_INTERNAL;
- }
-#endif
-
- /* This is called at the beginning to secure multiple calls to init function */
- ret = nrf_drv_usbd_init(app_usbd_event_handler);
- if (NRF_SUCCESS != ret)
- {
- return ret;
- }
-
- /* Clear the variables */
- m_sustate = SUSTATE_STOPPED;
- m_p_first_cinst = NULL;
- m_p_first_sof_cinst = NULL;
- memset(m_epin_conf , 0, sizeof(m_epin_conf ));
- memset(m_epout_conf, 0, sizeof(m_epout_conf));
- /* Save the new configuration */
- if (p_config == NULL)
- {
- m_current_conf = m_default_conf;
- }
- else
- {
- m_current_conf = *p_config;
- }
-
-#if (!(APP_USBD_CONFIG_EVENT_QUEUE_ENABLE))
- if(m_current_conf.ev_handler == NULL)
- {
- m_current_conf.ev_handler = m_default_conf.ev_handler;
- }
-#endif
-
-#if APP_USBD_CONFIG_POWER_EVENTS_PROCESS
- ret = nrf_drv_power_init(NULL);
- if ((ret != NRF_SUCCESS) && (ret != NRF_ERROR_MODULE_ALREADY_INITIALIZED))
- {
- /* This should never happen */
- APP_ERROR_HANDLER(ret);
- }
-#endif
-
- /*Pin core class to required endpoints*/
- uint8_t iface_idx;
- app_usbd_class_iface_conf_t const * p_iface;
- app_usbd_class_inst_t const * const p_inst = app_usbd_core_instance_access();
- iface_idx = 0;
- while ((p_iface = app_usbd_class_iface_get(p_inst, iface_idx++)) != NULL)
- {
- uint8_t ep_idx = 0;
- app_usbd_class_ep_conf_t const * p_ep;
- while ((p_ep = app_usbd_class_iface_ep_get(p_iface, ep_idx++)) != NULL)
- {
- app_usbd_ep_instance_set(app_usbd_class_ep_address_get(p_ep), p_inst);
- }
- }
-
- /* Successfully attached */
- const app_usbd_evt_t evt_data = {
- .type = APP_USBD_EVT_INST_APPEND
- };
-
- ret = class_event_handler(p_inst, (app_usbd_complex_evt_t const *)(&evt_data));
- if (NRF_SUCCESS != ret)
- {
- UNUSED_RETURN_VALUE(nrf_drv_usbd_uninit());
- return ret;
- }
-
- return NRF_SUCCESS;
-}
-
-
-ret_code_t app_usbd_uninit(void)
-{
-#if APP_USBD_CONFIG_POWER_EVENTS_PROCESS
- nrf_drv_power_usbevt_uninit();
-#endif
-
- /* We get this error at very beginning but it would be used at the end of the function */
- const ret_code_t ret = nrf_drv_usbd_uninit();
-
- /* Unchain instance list */
- app_usbd_class_inst_t const * * pp_inst;
- pp_inst = &m_p_first_cinst;
- while (NULL != (*pp_inst))
- {
- app_usbd_class_inst_t const * * pp_next = &app_usbd_class_data_access(*pp_inst)->p_next;
- (*pp_inst) = NULL;
- pp_inst = pp_next;
- }
-
- /* Unchain SOF list */
- pp_inst = &m_p_first_sof_cinst;
- while (NULL != (*pp_inst))
- {
- app_usbd_class_inst_t const * * pp_next = &app_usbd_class_data_access(*pp_inst)->p_sof_next;
- (*pp_inst) = NULL;
- pp_inst = pp_next;
- }
-
- /* Unchain SOF interrupt list */
- pp_inst = &m_p_first_sof_interrupt_cinst;
- while (NULL != (*pp_inst))
- {
- app_usbd_class_inst_t const * * pp_next = &app_usbd_class_data_access(*pp_inst)->p_sof_next;
- (*pp_inst) = NULL;
- pp_inst = pp_next;
- }
-
- /* Clear all endpoints configurations */
- memset(m_epin_conf , 0, sizeof(m_epin_conf ));
- memset(m_epout_conf, 0, sizeof(m_epout_conf));
- /* Clear current configuration */
- memset(&m_current_conf, 0, sizeof(m_current_conf));
-
- return ret;
-}
-
-
-#if APP_USBD_CONFIG_POWER_EVENTS_PROCESS
-ret_code_t app_usbd_power_events_enable(void)
-{
- if (!nrf_drv_usbd_is_initialized() || nrf_drv_usbd_is_enabled())
- {
- return NRF_ERROR_INVALID_STATE;
- }
-
- ASSERT((!APP_USBD_CONFIG_EVENT_QUEUE_ENABLE) || (USBD_CONFIG_IRQ_PRIORITY == POWER_CONFIG_IRQ_PRIORITY));
-
- ret_code_t ret;
- static const nrf_drv_power_usbevt_config_t config =
- {
- .handler = app_usbd_power_event_handler
- };
-
- ret = nrf_drv_power_usbevt_init(&config);
- APP_ERROR_CHECK(ret);
-
- return NRF_SUCCESS;
-}
-#endif /* APP_USBD_CONFIG_POWER_EVENTS_PROCESS */
-
-
-void app_usbd_enable(void)
-{
- nrf_drv_usbd_enable();
-}
-
-
-void app_usbd_disable(void)
-{
- ASSERT(!nrf_drv_usbd_is_started());
- nrf_drv_usbd_disable();
-}
-
-
-void app_usbd_start(void)
-{
- ASSERT(nrf_drv_usbd_is_enabled());
-
- /* Check if interface numbers are in correct order */
- if (APP_USBD_CONFIG_LOG_ENABLED)
- {
- uint8_t next_iface = 0;
- for (app_usbd_class_inst_t const * * pp_inst = &m_p_first_cinst;
- (*pp_inst) != NULL;
- pp_inst = &(app_usbd_class_data_access(*pp_inst)->p_next))
- {
- uint8_t iface_idx = 0;
- app_usbd_class_iface_conf_t const * p_iface;
- while (NULL != (p_iface = app_usbd_class_iface_get(*pp_inst, iface_idx++)))
- {
- if (p_iface->number != next_iface)
- {
- NRF_LOG_WARNING("Unexpected interface number, expected %d, got %d",
- next_iface,
- p_iface->number);
- }
- ++next_iface;
- }
- }
- }
-
- /* Power should be already enabled - wait just in case if user calls
- * app_usbd_start just after app_usbd_enable without waiting for the event. */
- while (!nrf_power_usbregstatus_outrdy_get())
- {
- /* Wait for the power but terminate the function if USBD power disappears */
- if (!nrf_power_usbregstatus_vbusdet_get())
- return;
- }
-
- static const app_usbd_evt_t evt_data = {
- .type = APP_USBD_EVT_START_REQ
- };
- app_usbd_event_add((app_usbd_internal_evt_t const * )&evt_data);
-}
-
-
-void app_usbd_stop(void)
-{
- const app_usbd_evt_t evt_data = {
- .type = APP_USBD_EVT_STOP_REQ
- };
- app_usbd_event_add((app_usbd_internal_evt_t const * )&evt_data);
-}
-
-void app_usbd_suspend_req(void)
-{
- const app_usbd_evt_t evt_data = {
- .type = APP_USBD_EVT_SUSPEND_REQ
- };
- app_usbd_event_add((app_usbd_internal_evt_t const * )&evt_data);
-}
-
-bool app_usbd_wakeup_req(void)
-{
- ASSERT(app_usbd_class_rwu_enabled_check());
- if (!app_usbd_core_feature_state_get(APP_USBD_SETUP_STDFEATURE_DEVICE_REMOTE_WAKEUP))
- return false;
-
- const app_usbd_evt_t evt_data = {
- .type = APP_USBD_EVT_WAKEUP_REQ
- };
- app_usbd_event_add((app_usbd_internal_evt_t const * )&evt_data);
- return true;
-}
-
-bool app_usbd_active_check(void)
-{
- return (sustate_get() == SUSTATE_ACTIVE);
-}
-
-void app_usbd_event_execute(app_usbd_internal_evt_t const * const p_event)
-{
- ASSERT(NULL != m_p_first_cinst);
- /* If no event queue is implemented, it has to be ensured that this function is never called
- * from the context higher than USB interrupt level
- * If queue is implemented it would be called always from Thread level
- * if the library is used correctly.
- * NOTE: Higher interrupt level -> lower priority value.
- */
- ASSERT(USBD_CONFIG_IRQ_PRIORITY <= current_int_priority_get());
-
- /* Note - there should never be situation that event is generated on disconnected endpoint */
- switch (p_event->type)
- {
- case APP_USBD_EVT_START_REQ:
- {
- static const app_usbd_evt_t evt_data = {
- .type = APP_USBD_EVT_STARTED
- };
-
- /* Send event to all classes */
- UNUSED_RETURN_VALUE(app_usbd_core_handler_call((app_usbd_internal_evt_t const * )&evt_data));
- app_usbd_all_call((app_usbd_complex_evt_t const *)&evt_data);
- user_event_state_proc(APP_USBD_EVT_STARTED);
-
- app_usbd_all_iface_deselect();
- app_usbd_core_ep0_disable();
- nrf_drv_usbd_start((NULL != m_p_first_sof_cinst) || (m_current_conf.enable_sof) || (APP_USBD_PROVIDE_SOF_TIMESTAMP));
- sustate_set(SUSTATE_STARTED);
- break;
- }
- case APP_USBD_EVT_STOP_REQ:
- {
- static const app_usbd_evt_t evt_data = {
- .type = APP_USBD_EVT_STOPPED
- };
-
- app_usbd_all_iface_deselect();
- nrf_drv_usbd_stop();
- sustate_set(SUSTATE_STOPPED);
-
- /* Send event to all classes */
- app_usbd_all_call((app_usbd_complex_evt_t const * )&evt_data);
- UNUSED_RETURN_VALUE(app_usbd_core_handler_call((app_usbd_internal_evt_t const *)&evt_data));
- user_event_state_proc(APP_USBD_EVT_STOPPED);
- if (app_usbd_sustate_with_requested_hfclk(sustate_get()))
- {
- nrf_drv_clock_hfclk_release();
- }
-
- break;
- }
- case APP_USBD_EVT_HFCLK_READY:
- {
- switch(sustate_get())
- {
- case SUSTATE_RESUMING:
- {
- sustate_set(SUSTATE_ACTIVE);
- break;
- }
- case SUSTATE_WAKINGUP_WAITING_HFCLK_WREQ:
- {
- sustate_set(SUSTATE_WAKINGUP_WAITING_WREQ);
- break;
- }
- case SUSTATE_WAKINGUP_WAITING_HFCLK:
- {
- sustate_set(SUSTATE_ACTIVE);
- break;
- }
- default:
- break; // Just ignore - it can happen in specific situation
- }
- break;
- }
- case APP_USBD_EVT_SUSPEND_REQ:
- {
- /* Suspend request can be only processed when we are in suspending state */
- if (SUSTATE_SUSPENDING == sustate_get())
- {
- if (nrf_drv_usbd_suspend())
- {
- sustate_set(SUSTATE_SUSPEND);
- }
- }
- break;
- }
- case APP_USBD_EVT_WAKEUP_REQ:
- {
- /* Suspend temporary if no suspend function was called from the application.
- * This makes it possible to generate APP_USBD_EVT_DRV_WUREQ event from the driver */
- if (sustate_get() == SUSTATE_SUSPENDING)
- {
- if (nrf_drv_usbd_suspend())
- {
- sustate_set(SUSTATE_SUSPEND);
- }
- }
- if (nrf_drv_usbd_wakeup_req())
- {
- sustate_set(SUSTATE_WAKINGUP_WAITING_HFCLK_WREQ);
- }
- break;
- }
-
- case APP_USBD_EVT_DRV_SOF:
- {
-#if (APP_USBD_PROVIDE_SOF_TIMESTAMP) || defined(__SDK_DOXYGEN__)
- m_last_frame = p_event->drv_evt.data.sof.framecnt;
-#endif
- /* Wake up if suspended */
- if ((sustate_get() == SUSTATE_SUSPENDING) || (sustate_get() == SUSTATE_WAKINGUP_WAITING_WREQ))
- {
- static const app_usbd_evt_t evt_data = {
- .type = APP_USBD_EVT_DRV_RESUME
- };
- app_usbd_event_execute((app_usbd_internal_evt_t *)&evt_data);
- }
-
- user_event_state_proc(APP_USBD_EVT_DRV_SOF);
-
- app_usbd_class_inst_t const * p_inst = app_usbd_class_sof_first_get();
- while (NULL != p_inst)
- {
- ret_code_t r = class_event_handler(p_inst, (app_usbd_complex_evt_t const *)p_event);
- UNUSED_VARIABLE(r);
- p_inst = app_usbd_class_sof_next_get(p_inst);
- }
- break;
- }
-
- case APP_USBD_EVT_DRV_RESET:
- {
- app_usbd_all_iface_deselect();
- app_usbd_core_ep0_enable();
- sustate_set(SUSTATE_ACTIVE);
- user_event_state_proc(APP_USBD_EVT_DRV_RESET);
- /* Processing core interface (connected only to EP0) and then all instances from the list */
- UNUSED_RETURN_VALUE(app_usbd_core_handler_call(p_event));
- app_usbd_all_call((app_usbd_complex_evt_t const *)p_event);
- break;
- }
- case APP_USBD_EVT_DRV_RESUME:
- {
- if (sustate_get() == SUSTATE_WAKINGUP_WAITING_WREQ)
- {
- sustate_set(SUSTATE_ACTIVE);
- nrf_drv_usbd_force_bus_wakeup();
- }
- else
- {
- sustate_set(SUSTATE_RESUMING);
- }
- user_event_state_proc(APP_USBD_EVT_DRV_RESUME);
- /* Processing core interface (connected only to EP0) and then all instances from the list */
- UNUSED_RETURN_VALUE(app_usbd_core_handler_call(p_event));
- app_usbd_all_call((app_usbd_complex_evt_t const *)p_event);
- break;
- }
- case APP_USBD_EVT_DRV_WUREQ:
- {
- static const app_usbd_evt_t evt_data = {
- .type = APP_USBD_EVT_DRV_RESUME
- };
- user_event_state_proc(APP_USBD_EVT_DRV_RESUME);
- /* Processing core interface (connected only to EP0) and then all instances from the list */
- UNUSED_RETURN_VALUE(app_usbd_core_handler_call((app_usbd_internal_evt_t const *)&evt_data));
- app_usbd_all_call((app_usbd_complex_evt_t const *)&evt_data);
-
- switch(sustate_get())
- {
- case SUSTATE_WAKINGUP_WAITING_HFCLK_WREQ:
- sustate_set(SUSTATE_WAKINGUP_WAITING_HFCLK);
- break;
- case SUSTATE_WAKINGUP_WAITING_WREQ:
- sustate_set(SUSTATE_ACTIVE);
- break;
- default:
- {
- /* This should not happen - but try to recover by setting directly active state */
- NRF_LOG_WARNING("Unexpected state on WUREQ event (%u)", sustate_get());
- sustate_set(SUSTATE_ACTIVE);
- }
- }
- break;
- }
- case APP_USBD_EVT_DRV_SUSPEND:
- {
- sustate_set(SUSTATE_SUSPENDING);
-
- user_event_state_proc(APP_USBD_EVT_DRV_SUSPEND);
-
- /* Processing all instances from the list and then core interface (connected only to EP0) */
- app_usbd_all_call((app_usbd_complex_evt_t const *)p_event);
- UNUSED_RETURN_VALUE(app_usbd_core_handler_call(p_event));
- break;
- }
-
- case APP_USBD_EVT_STATE_CHANGED:
- {
- user_event_state_proc(APP_USBD_EVT_STATE_CHANGED);
- /* Processing all instances from the list and then core interface (connected only to EP0) */
- app_usbd_all_call((app_usbd_complex_evt_t const *)p_event);
- break;
- }
-
- case APP_USBD_EVT_DRV_SETUP:
- {
- UNUSED_RETURN_VALUE(app_usbd_core_handler_call(p_event));
- break;
- }
-
- case APP_USBD_EVT_SETUP_SETADDRESS:
- {
- UNUSED_RETURN_VALUE(app_usbd_core_handler_call(p_event));
- break;
- }
-
- case APP_USBD_EVT_DRV_EPTRANSFER:
- {
- app_usbd_ep_conf_t const * p_ep_conf =
- app_usbd_ep_conf_access(p_event->drv_evt.data.eptransfer.ep);
- ASSERT(NULL != p_ep_conf->p_cinst);
- ASSERT(NULL != p_ep_conf->event_handler);
-
- if (NRF_SUCCESS != p_ep_conf->event_handler(p_ep_conf->p_cinst,
- (app_usbd_complex_evt_t const *)p_event))
- {
- /* If error returned, every bulk/interrupt endpoint would be stalled */
- if (!(0 == NRF_USBD_EP_NR_GET(p_event->drv_evt.data.eptransfer.ep) ||
- NRF_USBD_EPISO_CHECK(p_event->drv_evt.data.eptransfer.ep)))
- {
- nrf_drv_usbd_ep_stall(p_event->drv_evt.data.eptransfer.ep);
- }
- }
- break;
- }
-#if APP_USBD_CONFIG_POWER_EVENTS_PROCESS
- case APP_USBD_EVT_POWER_DETECTED:
- {
- user_event_state_proc(APP_USBD_EVT_POWER_DETECTED);
- app_usbd_all_call((app_usbd_complex_evt_t const *)p_event);
- break;
- }
- case APP_USBD_EVT_POWER_REMOVED:
- {
- user_event_state_proc(APP_USBD_EVT_POWER_REMOVED);
- app_usbd_all_call((app_usbd_complex_evt_t const *)p_event);
- break;
- }
- case APP_USBD_EVT_POWER_READY:
- {
- user_event_state_proc(APP_USBD_EVT_POWER_READY);
- app_usbd_all_call((app_usbd_complex_evt_t const *)p_event);
- break;
- }
-#endif
- default:
- ASSERT(0);
- break;
- }
-}
-
-
-#if (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE) || defined(__SDK_DOXYGEN__)
-bool app_usbd_event_queue_process(void)
-{
-#if (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE)
- app_usbd_internal_evt_t sof_event = {
- .app_evt.type = APP_USBD_EVT_DRV_SOF
- };
-#endif // (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE)
- static nrf_atfifo_item_get_t cx;
- static app_usbd_internal_queue_evt_t * p_event_item = NULL;
- if (NULL == p_event_item)
- {
- p_event_item = nrf_atfifo_item_get(m_event_queue, &cx);
- }
-
- if (NULL != p_event_item)
- {
-
-#if (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE)
- if (p_event_item->sof_cnt > 0)
- {
- if (p_event_item->start_frame > USBD_FRAMECNTR_FRAMECNTR_Msk)
- {
- p_event_item->start_frame = 0;
- }
- sof_event.drv_evt.data.sof.framecnt = (p_event_item->start_frame)++;
- --(p_event_item->sof_cnt);
- app_usbd_event_execute(&sof_event);
- return true;
- }
-#endif // (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE)
-
- app_usbd_event_execute(&(p_event_item->evt));
- UNUSED_RETURN_VALUE(nrf_atfifo_item_free(m_event_queue, &cx));
- p_event_item = NULL;
- return true;
- }
-#if (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE)
- else if (m_sof_events_cnt > 0)
- {
- CRITICAL_REGION_ENTER();
- if (m_event_frame > USBD_FRAMECNTR_FRAMECNTR_Msk)
- {
- m_event_frame = 0;
- }
- sof_event.drv_evt.data.sof.framecnt = m_event_frame++;
- UNUSED_RETURN_VALUE(nrf_atomic_u32_sub_hs(&m_sof_events_cnt, 1));
- CRITICAL_REGION_EXIT();
- app_usbd_event_execute(&sof_event);
- return true;
- }
-#endif // (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE)
- else
- {
- return false;
- }
-}
-#endif
-
-
-ret_code_t app_usbd_class_append(app_usbd_class_inst_t const * p_cinst)
-{
- ASSERT(NULL != p_cinst);
- ASSERT(NULL != p_cinst->p_class_methods);
- ASSERT(NULL != p_cinst->p_class_methods->event_handler);
- ASSERT(NULL == app_usbd_class_data_access(p_cinst)->p_next);
-
- /* This should be only called if USBD is disabled
- * We simply assume that USBD is enabled if its interrupts are */
- ASSERT(!nrf_drv_usbd_is_enabled() && nrf_drv_usbd_is_initialized());
-
- /* Check if all required endpoints are available
- * Checking is splitted from setting to avoid situation that anything
- * is modified and then operation finishes with error */
- uint8_t iface_idx;
- app_usbd_class_iface_conf_t const * p_iface;
-
- iface_idx = 0;
- while (NULL != (p_iface = app_usbd_class_iface_get(p_cinst, iface_idx++)))
- {
- uint8_t ep_idx = 0;
- app_usbd_class_ep_conf_t const * p_ep;
- while (NULL != (p_ep = app_usbd_class_iface_ep_get(p_iface, ep_idx++)))
- {
- if (NULL != app_usbd_ep_instance_get(app_usbd_class_ep_address_get(p_ep)))
- {
- return NRF_ERROR_BUSY;
- }
- }
- }
-
- /* Connecting all required endpoints */
- iface_idx = 0;
- while (NULL != (p_iface = app_usbd_class_iface_get(p_cinst, iface_idx++)))
- {
- uint8_t ep_idx = 0;
- app_usbd_class_ep_conf_t const * p_ep;
- while (NULL != (p_ep = app_usbd_class_iface_ep_get(p_iface, ep_idx++)))
- {
- app_usbd_ep_instance_set(app_usbd_class_ep_address_get(p_ep), p_cinst);
- }
- }
-
- /* Adding pointer to this instance to the end of the chain */
- app_usbd_class_inst_t const * * pp_last = &m_p_first_cinst;
- while (NULL != (*pp_last))
- {
- ASSERT((*pp_last) != p_cinst);
- pp_last = &(app_usbd_class_data_access(*pp_last)->p_next);
- }
- (*pp_last) = p_cinst;
-
- /* Successfully attached */
- const app_usbd_evt_t evt_data = {.type = APP_USBD_EVT_INST_APPEND };
- return class_event_handler(p_cinst, (app_usbd_complex_evt_t const *)(&evt_data));
-}
-
-
-ret_code_t app_usbd_class_remove(app_usbd_class_inst_t const * p_cinst)
-{
- ASSERT(NULL != p_cinst);
- ASSERT(NULL != p_cinst->p_class_methods);
- ASSERT(NULL != p_cinst->p_class_methods->event_handler);
- /* This function should be only called if USBD is disabled */
- ASSERT(!nrf_drv_usbd_is_enabled() && nrf_drv_usbd_is_initialized());
- ret_code_t ret;
- /* Remove this class from the chain */
- app_usbd_class_inst_t const * * pp_last = &m_p_first_cinst;
- while (NULL != (*pp_last))
- {
- if ((*pp_last) == p_cinst)
- {
- /* Inform class instance that removing process is going to be started */
- const app_usbd_evt_t evt_data = {
- .type = APP_USBD_EVT_INST_REMOVE
- };
- ret = class_event_handler(p_cinst, (app_usbd_complex_evt_t const *)(&evt_data));
- if (ret != NRF_SUCCESS)
- {
- return ret;
- }
-
- /* Breaking chain */
- (*pp_last) = (app_usbd_class_data_access(p_cinst)->p_next);
- app_usbd_class_data_access(p_cinst)->p_next = NULL;
-
- /* Disconnecting endpoints */
- uint8_t ep_idx;
- for (ep_idx = 0; ep_idx < NRF_USBD_EPIN_CNT; ++ep_idx)
- {
- nrf_drv_usbd_ep_t ep = NRF_DRV_USBD_EPIN(ep_idx);
- if (app_usbd_ep_instance_get(ep) == p_cinst)
- {
- app_usbd_ep_instance_set(ep, NULL);
- }
- }
- for (ep_idx = 0; ep_idx < NRF_USBD_EPOUT_CNT; ++ep_idx)
- {
- nrf_drv_usbd_ep_t ep = NRF_DRV_USBD_EPOUT(ep_idx);
- if (app_usbd_ep_instance_get(ep) == p_cinst)
- {
- app_usbd_ep_instance_set(ep, NULL);
- }
- }
-
- return NRF_SUCCESS;
- }
- pp_last = &(app_usbd_class_data_access(*pp_last)->p_next);
- }
-
- return NRF_ERROR_NOT_FOUND;
-}
-
-
-ret_code_t app_usbd_class_remove_all(void)
-{
- ret_code_t ret = NRF_SUCCESS;
- while (NULL != m_p_first_cinst)
- {
- ret = app_usbd_class_remove(m_p_first_cinst);
- if (ret != NRF_SUCCESS)
- {
- break;
- }
- }
-
- return ret;
-}
-
-
-ret_code_t app_usbd_ep_handler_set(app_usbd_class_inst_t const * const p_cinst,
- nrf_drv_usbd_ep_t ep,
- app_usbd_ep_event_handler_t handler)
-{
- ASSERT(NULL != p_cinst);
- ASSERT(NULL != handler);
- /* This function should be only called if USBD is disabled */
- ASSERT(!nrf_drv_usbd_is_enabled() && nrf_drv_usbd_is_initialized());
-
- if (p_cinst != app_usbd_ep_instance_get(ep))
- {
- return NRF_ERROR_INVALID_PARAM;
- }
-
- (app_usbd_ep_conf_access(ep))->event_handler = handler;
- return NRF_SUCCESS;
-}
-
-
-ret_code_t app_usbd_class_sof_register(app_usbd_class_inst_t const * p_cinst)
-{
- ASSERT(NULL != p_cinst);
- ASSERT(NULL != p_cinst->p_class_methods);
- ASSERT(NULL != p_cinst->p_class_methods->event_handler);
- /* This function should be only called if USBD is disabled */
- ASSERT(!nrf_drv_usbd_is_enabled() && nrf_drv_usbd_is_initialized());
-
- /* Make sure it's not in interrupt SOF list */
- app_usbd_class_inst_t const * * pp_last = &m_p_first_sof_interrupt_cinst;
- while (NULL != (*pp_last))
- {
- ASSERT((*pp_last) != p_cinst);
- pp_last = &(app_usbd_class_data_access(*pp_last)->p_sof_next);
- }
-
- /* Next SOF event requiring instance has to be NULL now */
- ASSERT(NULL == (app_usbd_class_data_access(p_cinst)->p_sof_next));
-
- /* Adding pointer to this instance to the end of the chain */
- pp_last = &m_p_first_sof_cinst;
- while (NULL != (*pp_last))
- {
- ASSERT((*pp_last) != p_cinst);
- pp_last = &(app_usbd_class_data_access(*pp_last)->p_sof_next);
- }
- (*pp_last) = p_cinst;
-
- return NRF_SUCCESS;
-}
-
-
-ret_code_t app_usbd_class_sof_unregister(app_usbd_class_inst_t const * p_cinst)
-{
- ASSERT(NULL != p_cinst);
- /** This function should be only called if USBD is disabled */
- ASSERT(!nrf_drv_usbd_is_enabled() && nrf_drv_usbd_is_initialized());
-
- app_usbd_class_inst_t const * * pp_last = &m_p_first_sof_cinst;
- while (NULL != (*pp_last))
- {
- if ((*pp_last) == p_cinst)
- {
- /* Breaking chain */
- (*pp_last) = (app_usbd_class_data_access(p_cinst)->p_sof_next);
- app_usbd_class_data_access(p_cinst)->p_sof_next = NULL;
-
- return NRF_SUCCESS;
- }
- pp_last = &(app_usbd_class_data_access(*pp_last)->p_sof_next);
- }
- return NRF_ERROR_NOT_FOUND;
-}
-
-ret_code_t app_usbd_class_sof_interrupt_register(app_usbd_class_inst_t const * p_cinst, app_usbd_sof_interrupt_handler_t handler)
-{
- ASSERT(NULL != p_cinst);
- ASSERT(NULL != p_cinst->p_class_methods);
- ASSERT(NULL != handler);
- /* This function should be only called if USBD is disabled */
- ASSERT(!nrf_drv_usbd_is_enabled() && nrf_drv_usbd_is_initialized());
-
- /* Next SOF event requiring instance has to be NULL now */
- ASSERT(NULL == (app_usbd_class_data_access(p_cinst)->p_sof_next));
-
- app_usbd_class_data_access(p_cinst)->sof_handler = handler;
-
- /* Make sure it's not in normal SOF list */
- app_usbd_class_inst_t const * * pp_last = &m_p_first_sof_cinst;
- while (NULL != (*pp_last))
- {
- ASSERT((*pp_last) != p_cinst);
- pp_last = &(app_usbd_class_data_access(*pp_last)->p_sof_next);
- }
-
- /* Adding pointer to this instance to the end of the interrupt chain */
- pp_last = &m_p_first_sof_interrupt_cinst;
- while (NULL != (*pp_last))
- {
-
- ASSERT((*pp_last) != p_cinst);
- pp_last = &(app_usbd_class_data_access(*pp_last)->p_sof_next);
- }
- (*pp_last) = p_cinst;
-
- return NRF_SUCCESS;
-}
-
-
-ret_code_t app_usbd_class_sof_interrupt_unregister(app_usbd_class_inst_t const * p_cinst)
-{
- ASSERT(NULL != p_cinst);
- /** This function should be only called if USBD is disabled */
- ASSERT(!nrf_drv_usbd_is_enabled() && nrf_drv_usbd_is_initialized());
-
- app_usbd_class_inst_t const * * pp_last = &m_p_first_sof_interrupt_cinst;
- while (NULL != (*pp_last))
- {
- if ((*pp_last) == p_cinst)
- {
- /* Breaking chain */
- (*pp_last) = (app_usbd_class_data_access(p_cinst)->p_sof_next);
- app_usbd_class_data_access(p_cinst)->p_sof_next = NULL;
-
- return NRF_SUCCESS;
- }
- pp_last = &(app_usbd_class_data_access(*pp_last)->p_sof_next);
- }
- return NRF_ERROR_NOT_FOUND;
-}
-
-ret_code_t app_usbd_class_rwu_register(app_usbd_class_inst_t const * const p_inst)
-{
- ASSERT(p_inst != NULL);
- ++m_rwu_registered_counter;
- /*Overflow check*/
- ASSERT(m_rwu_registered_counter != 0);
-
- return NRF_SUCCESS;
-}
-
-
-ret_code_t app_usbd_class_rwu_unregister(app_usbd_class_inst_t const * const p_inst)
-{
- ASSERT(p_inst != NULL);
- /* Usage validation. If counter is 0 unregister is not possible.*/
- ASSERT(m_rwu_registered_counter != 0);
- --m_rwu_registered_counter;
-
- return NRF_SUCCESS;
-}
-
-bool app_usbd_class_rwu_enabled_check(void)
-{
- return (m_rwu_registered_counter != 0);
-}
-
-ret_code_t app_usbd_interface_ep_reset(app_usbd_class_inst_t const * const p_cinst,
- uint8_t iface)
-{
- uint8_t iface_count = app_usbd_class_iface_count_get(p_cinst);
-
- app_usbd_class_iface_conf_t const * p_iface = NULL;
- for (uint8_t j = 0; j < iface_count; ++j)
- {
- p_iface = app_usbd_class_iface_get(p_cinst, j);
- if (app_usbd_class_iface_number_get(p_iface) == iface)
- {
- break;
- }
- }
-
- if (p_iface == NULL)
- {
- return NRF_ERROR_NOT_SUPPORTED;
- }
-
- uint8_t ep_count = app_usbd_class_iface_ep_count_get(p_iface);
-
- for (uint8_t j = 0; j < ep_count; ++j)
- {
- /*Clear stall for every endpoint*/
- app_usbd_class_ep_conf_t const * p_ep = app_usbd_class_iface_ep_get(p_iface, j);
-
- if (!NRF_USBD_EPISO_CHECK(p_ep->address))
- {
- nrf_drv_usbd_ep_dtoggle_clear(p_ep->address);
- nrf_drv_usbd_ep_stall_clear(p_ep->address);
- }
-
- }
-
- return NRF_SUCCESS;
-}
-
-void app_usbd_ep_enable(nrf_drv_usbd_ep_t ep)
-{
- if (!NRF_USBD_EPISO_CHECK(ep))
- {
- nrf_drv_usbd_ep_dtoggle_clear(ep);
- nrf_drv_usbd_ep_stall_clear(ep);
- }
- nrf_drv_usbd_ep_enable(ep);
-}
-
-void app_usbd_ep_disable(nrf_drv_usbd_ep_t ep)
-{
- nrf_drv_usbd_ep_disable(ep);
-}
-
-
-app_usbd_class_inst_t const * app_usbd_class_first_get(void)
-{
- return m_p_first_cinst;
-}
-
-app_usbd_class_inst_t const * app_usbd_class_sof_first_get(void)
-{
- return m_p_first_sof_cinst;
-}
-
-app_usbd_class_inst_t const * app_usbd_class_sof_interrupt_first_get(void)
-{
- return m_p_first_sof_interrupt_cinst;
-}
-
-app_usbd_class_inst_t const * app_usbd_iface_find(uint8_t iface, uint8_t * p_iface_idx)
-{
- app_usbd_class_inst_t const * p_inst = app_usbd_class_first_get();
- while (p_inst != NULL)
- {
- uint8_t iface_count = app_usbd_class_iface_count_get(p_inst);
- /* Iterate over interfaces */
- for (uint8_t i = 0; i < iface_count; ++i)
- {
- app_usbd_class_iface_conf_t const * p_iface;
- p_iface = app_usbd_class_iface_get(p_inst, i);
- if (app_usbd_class_iface_number_get(p_iface) == iface)
- {
- if (p_iface_idx != NULL)
- {
- (*p_iface_idx) = i;
- }
- return p_inst;
- }
- }
- p_inst = app_usbd_class_next_get(p_inst);
- }
- return NULL;
-}
-
-ret_code_t app_usbd_iface_call(
- app_usbd_class_inst_t const * const p_class_inst,
- uint8_t iface_idx,
- app_usbd_complex_evt_t const * const p_event)
-{
- UNUSED_PARAMETER(iface_idx);
- return class_event_handler(p_class_inst, p_event);
-}
-
-ret_code_t app_usbd_ep_call(nrf_drv_usbd_ep_t ep, app_usbd_complex_evt_t const * const p_event)
-{
- if (NRF_USBD_EP_VALIDATE(ep))
- {
- app_usbd_class_inst_t const * p_inst = app_usbd_ep_conf_access(ep)->p_cinst;
- if (p_inst != NULL)
- {
- return class_event_handler(p_inst, p_event);
- }
- }
- return NRF_ERROR_INVALID_ADDR;
-}
-
-void app_usbd_all_call(app_usbd_complex_evt_t const * const p_event)
-{
- app_usbd_class_inst_t const * p_inst;
- for (p_inst = app_usbd_class_first_get(); NULL != p_inst;
- p_inst = app_usbd_class_next_get(p_inst))
- {
- UNUSED_RETURN_VALUE(class_event_handler(p_inst, p_event));
- }
-}
-
-ret_code_t app_usbd_all_until_served_call(app_usbd_complex_evt_t const * const p_event)
-{
- app_usbd_class_inst_t const * p_inst;
- ret_code_t ret = NRF_ERROR_NOT_SUPPORTED;
- /* Try to process via every instance */
- for (p_inst = app_usbd_class_first_get(); NULL != p_inst;
- p_inst = app_usbd_class_next_get(p_inst))
- {
-
- ret = class_event_handler(p_inst, p_event);
- if (NRF_ERROR_NOT_SUPPORTED != ret)
- {
- /* Processing finished */
- break;
- }
- }
-
- return ret;
-}
-
-ret_code_t app_usbd_ep_transfer(
- nrf_drv_usbd_ep_t ep,
- nrf_drv_usbd_transfer_t const * const p_transfer)
-{
- if (!nrf_drv_usbd_ep_enable_check(ep))
- {
- return NRF_ERROR_INVALID_STATE;
- }
- if (m_sustate != SUSTATE_ACTIVE)
- {
- return NRF_ERROR_INVALID_STATE;
- }
- return nrf_drv_usbd_ep_transfer(ep, p_transfer);
-}
-
-ret_code_t app_usbd_ep_handled_transfer(
- nrf_drv_usbd_ep_t ep,
- nrf_drv_usbd_handler_desc_t const * const p_handler)
-{
- if (!nrf_drv_usbd_ep_enable_check(ep))
- {
- return NRF_ERROR_INVALID_STATE;
- }
- if (m_sustate != SUSTATE_ACTIVE)
- {
- return NRF_ERROR_INVALID_STATE;
- }
- return nrf_drv_usbd_ep_handled_transfer(ep, p_handler);
-}
-
-ret_code_t app_usbd_iface_select(
- app_usbd_class_inst_t const * const p_inst,
- uint8_t iface_idx,
- uint8_t alternate)
-{
- ret_code_t ret = NRF_ERROR_NOT_SUPPORTED;
-
- if (p_inst->p_class_methods->iface_select != NULL)
- {
- ret = p_inst->p_class_methods->iface_select(p_inst, iface_idx, alternate);
- }
-
- if(ret == NRF_ERROR_NOT_SUPPORTED)
- {
- ret = default_iface_select(p_inst, iface_idx, alternate);
- }
- return ret;
-}
-
-void app_usbd_iface_deselect(
- app_usbd_class_inst_t const * const p_inst,
- uint8_t iface_idx)
-{
- if (p_inst->p_class_methods->iface_deselect != NULL)
- {
- p_inst->p_class_methods->iface_deselect(p_inst, iface_idx);
- }
- default_iface_deselect(p_inst, iface_idx);
-}
-
-uint8_t app_usbd_iface_selection_get(
- app_usbd_class_inst_t const * const p_inst,
- uint8_t iface_idx)
-{
- uint8_t alt = 0;
- if (p_inst->p_class_methods->iface_selection_get != NULL)
- {
- alt = p_inst->p_class_methods->iface_selection_get(p_inst, iface_idx);
- }
- return alt;
-}
-
-void app_usbd_all_iface_select_0(void)
-{
- app_usbd_class_inst_t const * p_inst = app_usbd_class_first_get();
- while (p_inst != NULL)
- {
- uint8_t iface_count = app_usbd_class_iface_count_get(p_inst);
- for (uint8_t i = 0; i < iface_count; ++i)
- {
- ret_code_t ret;
- ret = app_usbd_iface_select(p_inst, i, 0);
- ASSERT(ret == NRF_SUCCESS);
- UNUSED_VARIABLE(ret);
- }
- p_inst = app_usbd_class_next_get(p_inst);
- }
-}
-
-void app_usbd_all_iface_deselect(void)
-{
- app_usbd_class_inst_t const * p_inst = app_usbd_class_first_get();
- while (p_inst != NULL)
- {
- uint8_t iface_count = app_usbd_class_iface_count_get(p_inst);
- for (uint8_t i = 0; i < iface_count; ++i)
- {
- app_usbd_iface_deselect(p_inst, i);
- }
- p_inst = app_usbd_class_next_get(p_inst);
- }
-}
-
-#endif //NRF_MODULE_ENABLED(APP_USBD)
+/**
+ * Copyright (c) 2016 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#include "sdk_common.h"
+#if NRF_MODULE_ENABLED(APP_USBD)
+
+#include "app_usbd.h"
+#include "app_usbd_core.h"
+#include "app_usbd_request.h"
+#include "nrf_power.h"
+#include "nrf_drv_clock.h"
+#include "nrf_drv_power.h"
+#if APP_USBD_CONFIG_EVENT_QUEUE_ENABLE
+#include "nrf_atfifo.h"
+#include "nrf_atomic.h"
+#endif
+
+#define NRF_LOG_MODULE_NAME app_usbd
+
+#if APP_USBD_CONFIG_LOG_ENABLED
+#define NRF_LOG_LEVEL APP_USBD_CONFIG_LOG_LEVEL
+#define NRF_LOG_INFO_COLOR APP_USBD_CONFIG_INFO_COLOR
+#define NRF_LOG_DEBUG_COLOR APP_USBD_CONFIG_DEBUG_COLOR
+#else //APP_USBD_CONFIG_LOG_ENABLED
+#define NRF_LOG_LEVEL 0
+#endif //APP_USBD_CONFIG_LOG_ENABLED
+#include "nrf_log.h"
+NRF_LOG_MODULE_REGISTER();
+
+
+/* Base variables tests */
+
+/* Check event of app_usbd_event_type_t enumerator */
+STATIC_ASSERT((int32_t)APP_USBD_EVT_FIRST_POWER == (int32_t)NRF_DRV_USBD_EVT_CNT);
+STATIC_ASSERT(sizeof(app_usbd_event_type_t) == sizeof(nrf_drv_usbd_event_type_t));
+
+STATIC_ASSERT(sizeof(app_usbd_descriptor_header_t) == 2);
+STATIC_ASSERT(sizeof(app_usbd_descriptor_device_t) == 18);
+STATIC_ASSERT(sizeof(app_usbd_descriptor_configuration_t) == 9);
+STATIC_ASSERT(sizeof(app_usbd_descriptor_iface_t) == 9);
+STATIC_ASSERT(sizeof(app_usbd_descriptor_ep_t) == 7);
+STATIC_ASSERT(sizeof(app_usbd_descriptor_iad_t) == 8);
+
+STATIC_ASSERT(sizeof(app_usbd_setup_t) == sizeof(nrf_drv_usbd_setup_t));
+
+/**
+ * @internal
+ * @defgroup app_usbd_internals USBD library internals
+ * @ingroup app_usbd
+ *
+ * Internal variables, auxiliary macros and functions of USBD library.
+ * @{
+ */
+
+#if (APP_USBD_PROVIDE_SOF_TIMESTAMP) || defined(__SDK_DOXYGEN__)
+/**
+ * @brief The last received frame number.
+ */
+static uint16_t m_last_frame;
+#endif
+
+/**
+ * @brief Variable type for endpoint configuration.
+ *
+ * Each endpoint would have assigned this type of configuration structure.
+ */
+typedef struct
+{
+ /**
+ * @brief The class instance.
+ *
+ * The pointer to the class instance that is connected to the endpoint.
+ */
+ app_usbd_class_inst_t const * p_cinst;
+
+ /**
+ * @brief Endpoint event handler.
+ *
+ * Event handler for the endpoint.
+ * It is set to event handler for the class instance during connection by default,
+ * but it can be then updated for as a reaction for @ref APP_USBD_EVT_ATTACHED event.
+ * This way we can speed up the interpretation of endpoint related events.
+ */
+ app_usbd_ep_event_handler_t event_handler;
+}app_usbd_ep_conf_t;
+
+
+/**
+ * @brief Internal event with SOF counter.
+ */
+typedef struct
+{
+ app_usbd_internal_evt_t evt; //!< Internal event type
+
+#if (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE) \
+ || defined(__SDK_DOXYGEN__)
+ uint16_t sof_cnt; //!< Number of the SOF events that appears before current event
+ uint16_t start_frame; //!< Number of the SOF frame that starts this event
+#endif // (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE)
+
+} app_usbd_internal_queue_evt_t;
+
+#if (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE) || defined(__SDK_DOXYGEN__)
+/**
+ * @brief Event queue.
+ *
+ * The queue with events to be processed.
+ */
+NRF_ATFIFO_DEF(m_event_queue, app_usbd_internal_queue_evt_t, APP_USBD_CONFIG_EVENT_QUEUE_SIZE);
+
+#if (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE) \
+ || defined(__SDK_DOXYGEN__)
+
+/** @brief SOF events counter */
+static nrf_atomic_u32_t m_sof_events_cnt;
+
+/** @brief SOF Frame counter */
+static uint16_t m_event_frame;
+
+/* Limit of SOF events stacked until warning message. */
+#define APP_USBD_SOF_WARNING_LIMIT 500
+#endif // (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE)
+ // || defined(__SDK_DOXYGEN__)
+
+#endif
+
+/**
+ * @brief Instances connected with IN endpoints.
+ *
+ * Array of instance pointers connected with every IN endpoint.
+ * @sa m_epout_instances
+ */
+static app_usbd_ep_conf_t m_epin_conf[NRF_USBD_EPIN_CNT];
+
+/**
+ * @brief Instances connected with OUT endpoints.
+ *
+ * Array of instance pointers connected with every OUT endpoint.
+ * @sa m_epin_instances
+ */
+static app_usbd_ep_conf_t m_epout_conf[NRF_USBD_EPIN_CNT];
+
+/**
+ * @brief Beginning of classes list.
+ *
+ * All enabled in current configuration instances are connected into
+ * a single linked list chain.
+ * This variable points to first element.
+ * Core class instance (connected to endpoint 0) is not listed here.
+ */
+static app_usbd_class_inst_t const * m_p_first_cinst;
+
+/**
+ * @brief Classes list that requires SOF events.
+ *
+ * Pointer to first class that requires SOF events.
+ */
+static app_usbd_class_inst_t const * m_p_first_sof_cinst;
+
+/**
+ * @brief Classes list that require SOF events in interrupt.
+ *
+ * Pointer to first class that requires SOF events in interrupt.
+ */
+static app_usbd_class_inst_t const * m_p_first_sof_interrupt_cinst;
+
+/**
+ * @brief Default configuration (when NULL is passed to @ref app_usbd_init).
+ */
+static const app_usbd_config_t m_default_conf = {
+#if (!(APP_USBD_CONFIG_EVENT_QUEUE_ENABLE)) || defined(__SDK_DOXYGEN__)
+ .ev_handler = app_usbd_event_execute,
+#endif
+#if (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE) || defined(__SDK_DOXYGEN__)
+ .ev_isr_handler = NULL,
+#endif
+ .ev_state_proc = NULL,
+ .enable_sof = false
+};
+
+/**
+ * @brief SUSPEND state machine states.
+ *
+ * The enumeration of internal SUSPEND state machine states.
+ */
+typedef enum
+{
+ SUSTATE_STOPPED, /**< The USB driver was not started */
+ SUSTATE_STARTED, /**< The USB driver was started - waiting for USB RESET */
+ SUSTATE_ACTIVE, /**< Active state */
+ SUSTATE_SUSPENDING, /**< Suspending - waiting for the user to acknowledge */
+ SUSTATE_SUSPEND, /**< Suspended */
+ SUSTATE_RESUMING, /**< Resuming - waiting for clock */
+ SUSTATE_WAKINGUP_WAITING_HFCLK_WREQ, /**< Waking up - waiting for clock and WUREQ from driver */
+ SUSTATE_WAKINGUP_WAITING_HFCLK, /**< Waking up - waiting for HFCLK (WUREQ detected) */
+ SUSTATE_WAKINGUP_WAITING_WREQ, /**< Waking up - waiting for WREQ (HFCLK active) */
+}app_usbd_sustate_t;
+
+/**
+ * @brief Current suspend state.
+ *
+ * The state of the suspend state machine.
+ */
+static app_usbd_sustate_t m_sustate;
+
+/**
+ * @brief Remote wake-up register/unregister.
+ *
+ * Counter incremented when appended instance required remote wake-up functionality.
+ * It should be decremented when the class is removed.
+ * When this counter is not zero, remote wake-up functionality is activated inside core.
+ */
+static uint8_t m_rwu_registered_counter;
+
+/**
+ * @brief Current configuration.
+ */
+static app_usbd_config_t m_current_conf;
+
+/**
+ * @brief Class interface call: event handler
+ *
+ * @ref app_usbd_class_interface_t::event_handler
+ *
+ * @param[in] p_cinst Class instance.
+ * @param[in] p_event Event passed to class instance.
+ *
+ * @return Standard error code @ref ret_code_t
+ * @retval NRF_SUCCESS event handled successfully.
+ * @retval NRF_ERROR_NOT_SUPPORTED unsupported event.
+ * */
+static inline ret_code_t class_event_handler(app_usbd_class_inst_t const * const p_cinst,
+ app_usbd_complex_evt_t const * const p_event)
+{
+ ASSERT(p_cinst != NULL);
+ ASSERT(p_cinst->p_class_methods != NULL);
+ ASSERT(p_cinst->p_class_methods->event_handler != NULL);
+ return p_cinst->p_class_methods->event_handler(p_cinst, p_event);
+}
+
+#if (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE) || defined(__SDK_DOXYGEN__)
+static inline void class_sof_interrupt_handler(app_usbd_class_inst_t const * const p_cinst,
+ app_usbd_complex_evt_t const * const p_event)
+{
+ ASSERT(p_cinst != NULL);
+ ASSERT(p_cinst->p_data != NULL);
+ ASSERT(p_cinst->p_data->sof_handler != NULL);
+ p_cinst->p_data->sof_handler(p_event->drv_evt.data.sof.framecnt);
+}
+
+/**
+ * @brief User event handler call (passed via configuration).
+ *
+ * @param p_event Handler of an event that is going to be added into queue.
+ * @param queued The event is visible in the queue.
+ */
+static inline void user_event_handler(app_usbd_internal_evt_t const * const p_event, bool queued)
+{
+ if ((m_current_conf.ev_isr_handler) != NULL)
+ {
+ m_current_conf.ev_isr_handler(p_event, queued);
+ }
+}
+#endif
+
+/**
+ * @brief User event processor call (passed via configuration).
+ *
+ * @param event Event type.
+ */
+static inline void user_event_state_proc(app_usbd_event_type_t event)
+{
+ if ((m_current_conf.ev_state_proc) != NULL)
+ {
+ m_current_conf.ev_state_proc(event);
+ }
+}
+
+/**
+ * @brief Find a specified descriptor.
+ *
+ * @param[in] p_cinst Class instance.
+ * @param[in] desc_type Descriptor type @ref app_usbd_descriptor_t
+ * @param[in] desc_index Descriptor index.
+ * @param[out] p_desc Pointer to escriptor.
+ * @param[out] p_desc_len Length of descriptor.
+ *
+ * @return Standard error code @ref ret_code_t
+ * @retval NRF_SUCCESS Descriptor successfully found.
+ * @retval NRF_ERROR_NOT_FOUND Descriptor not found.
+ * */
+ret_code_t app_usbd_class_descriptor_find(app_usbd_class_inst_t const * const p_cinst,
+ uint8_t desc_type,
+ uint8_t desc_index,
+ uint8_t * p_desc,
+ size_t * p_desc_len)
+{
+ app_usbd_class_descriptor_ctx_t siz;
+ APP_USBD_CLASS_DESCRIPTOR_INIT(&siz);
+ uint32_t total_size = 0;
+ while(p_cinst->p_class_methods->feed_descriptors(&siz, p_cinst, NULL, sizeof(uint8_t)))
+ {
+ total_size++;
+ }
+
+ uint8_t cur_len = 0;
+ uint32_t cur_size = 0;
+
+ uint8_t index = 0;
+ app_usbd_class_descriptor_ctx_t descr;
+ APP_USBD_CLASS_DESCRIPTOR_INIT(&descr);
+
+ while(cur_size < total_size)
+ {
+ /* First byte of a descriptor is its size */
+ UNUSED_RETURN_VALUE(p_cinst->p_class_methods->feed_descriptors(&descr,
+ p_cinst,
+ &cur_len,
+ sizeof(uint8_t)));
+
+ /* Second byte is type of the descriptor */
+ uint8_t type;
+ UNUSED_RETURN_VALUE(p_cinst->p_class_methods->feed_descriptors(&descr,
+ p_cinst,
+ &type,
+ sizeof(uint8_t)));
+
+ if(type == desc_type)
+ {
+ if(index == desc_index)
+ {
+ /* Copy the length of descriptor to *p_desc_len */
+ *p_desc_len = cur_len;
+ /* Two first bytes of descriptor have already been fed - copy them to *p_desc */
+ *p_desc++ = cur_len;
+ *p_desc++ = desc_type;
+ /* Copy the rest of descriptor to *p_desc */
+ UNUSED_RETURN_VALUE(p_cinst->p_class_methods->feed_descriptors(&descr,
+ p_cinst,
+ p_desc,
+ cur_len-2));
+ return NRF_SUCCESS;
+ }
+ else
+ {
+ index++;
+ }
+ }
+ /* Fast-forward through unmatched descriptor */
+ UNUSED_RETURN_VALUE(p_cinst->p_class_methods->feed_descriptors(&descr,
+ p_cinst,
+ NULL,
+ cur_len-2));
+ cur_size += cur_len;
+ }
+ return NRF_ERROR_NOT_FOUND;
+}
+
+/**
+ * @brief Access into selected endpoint configuration structure.
+ *
+ * @param ep Endpoint address.
+ * @return A pointer to the endpoint configuration structure.
+ *
+ * @note This function would assert when endpoint number is not correct and debugging is enabled.
+ */
+static app_usbd_ep_conf_t * app_usbd_ep_conf_access(nrf_drv_usbd_ep_t ep)
+{
+ if (NRF_USBD_EPIN_CHECK(ep))
+ {
+ uint8_t nr = NRF_USBD_EP_NR_GET(ep);
+ ASSERT(nr < NRF_USBD_EPIN_CNT);
+ return &m_epin_conf[nr];
+ }
+ else
+ {
+ uint8_t nr = NRF_USBD_EP_NR_GET(ep);
+ ASSERT(nr < NRF_USBD_EPOUT_CNT);
+ return &m_epout_conf[nr];
+ }
+}
+
+/**
+ * @brief Accessing instance connected with selected endpoint.
+ *
+ * @param ep Endpoint number.
+ *
+ * @return The pointer to the instance connected with endpoint.
+ */
+static inline app_usbd_class_inst_t const * app_usbd_ep_instance_get(nrf_drv_usbd_ep_t ep)
+{
+ return app_usbd_ep_conf_access(ep)->p_cinst;
+}
+
+/**
+ * @brief Connect instance with selected endpoint.
+ *
+ * This function configures instance connected to endpoint but also sets
+ * default event handler function pointer.
+ *
+ * @param ep Endpoint number.
+ * @param p_cinst The instance to connect into the selected endpoint.
+ * NULL if endpoint is going to be disconnected.
+ *
+ * @note Disconnecting EP0 is not allowed and protected by assertion.
+ */
+static void app_usbd_ep_instance_set(nrf_drv_usbd_ep_t ep, app_usbd_class_inst_t const * p_cinst)
+{
+ app_usbd_ep_conf_t * p_ep_conf = app_usbd_ep_conf_access(ep);
+ /* Set instance and default event handler */
+ p_ep_conf->p_cinst = p_cinst;
+ if (p_cinst == NULL)
+ {
+ ASSERT((ep != NRF_DRV_USBD_EPOUT0) && (ep != NRF_DRV_USBD_EPIN0)); /* EP0 should never be disconnected */
+ p_ep_conf->event_handler = NULL;
+ }
+ else
+ {
+ p_ep_conf->event_handler = p_cinst->p_class_methods->event_handler;
+ }
+}
+
+/**
+ * @brief Call the core handler.
+ *
+ * Core instance is special kind of instance that is connected only to endpoint 0.
+ * It is not present in instance list.
+ * This auxiliary function makes future changes easier.
+ * Just call the event instance for core module here.
+ */
+static inline ret_code_t app_usbd_core_handler_call(app_usbd_internal_evt_t const * const p_event)
+{
+ return m_epout_conf[0].event_handler(
+ m_epout_conf[0].p_cinst,
+ (app_usbd_complex_evt_t const *)p_event);
+}
+
+
+
+/**
+ * @brief Add event for execution.
+ *
+ * Dependent on configuration event would be executed in place or would be added into queue
+ * to be executed later.
+ *
+ * @param p_event_input Event to be executed.
+ */
+static inline void app_usbd_event_add(app_usbd_internal_evt_t const * const p_event_input)
+{
+ app_usbd_internal_evt_t const * p_event = p_event_input;
+
+
+ if (p_event->type == APP_USBD_EVT_DRV_SETUP)
+ {
+ uint8_t bRequest = nrf_usbd_setup_brequest_get();
+ uint8_t bmRequestType = nrf_usbd_setup_bmrequesttype_get();
+
+ if ((bmRequestType == app_usbd_setup_req_val(
+ APP_USBD_SETUP_REQREC_DEVICE,
+ APP_USBD_SETUP_REQTYPE_STD,
+ APP_USBD_SETUP_REQDIR_OUT))
+ && (bRequest == APP_USBD_SETUP_STDREQ_SET_ADDRESS))
+ {
+ static const app_usbd_internal_evt_t event_setaddress =
+ {
+ .type = APP_USBD_EVT_SETUP_SETADDRESS,
+ };
+ p_event = &event_setaddress;
+ }
+ }
+
+#if (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE)
+
+ if (p_event->app_evt.type == APP_USBD_EVT_DRV_SOF)
+ {
+ /* Propagate SOF event to classes that need it in interrupt */
+ app_usbd_class_inst_t const * p_inst = app_usbd_class_sof_interrupt_first_get();
+ while (NULL != p_inst)
+ {
+ class_sof_interrupt_handler(p_inst, (app_usbd_complex_evt_t const *)p_event);
+ p_inst = app_usbd_class_sof_interrupt_next_get(p_inst);
+ }
+
+#if (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE)
+ CRITICAL_REGION_ENTER();
+ if (m_sof_events_cnt == 0)
+ {
+ m_event_frame = p_event->drv_evt.data.sof.framecnt;
+ }
+ UNUSED_RETURN_VALUE(nrf_atomic_u32_add(&m_sof_events_cnt, 1));
+ CRITICAL_REGION_EXIT();
+
+ user_event_handler(p_event, true);
+ if (m_sof_events_cnt == APP_USBD_SOF_WARNING_LIMIT)
+ {
+ NRF_LOG_WARNING("Stacked over %d SOF events.", APP_USBD_SOF_WARNING_LIMIT);
+ }
+ return;
+
+#endif // (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE)
+
+#if (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_INTERRUPT)
+
+ user_event_handler(p_event, false);
+ app_usbd_event_execute(p_event);
+ return;
+
+#endif // (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_INTERRUPT)
+ }
+
+ nrf_atfifo_item_put_t cx;
+ app_usbd_internal_queue_evt_t * p_event_item = nrf_atfifo_item_alloc(m_event_queue, &cx);
+
+ if (NULL != p_event_item)
+ {
+ bool visible;
+ p_event_item->evt = *p_event;
+
+#if (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE)
+ CRITICAL_REGION_ENTER();
+ p_event_item->start_frame = m_event_frame - m_sof_events_cnt + 1;
+ p_event_item->sof_cnt = nrf_atomic_u32_fetch_store(&m_sof_events_cnt, 0);
+ CRITICAL_REGION_EXIT();
+#endif // (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE)
+
+ visible = nrf_atfifo_item_put(m_event_queue, &cx);
+ user_event_handler(p_event, visible);
+ }
+ else
+ {
+ NRF_LOG_ERROR("Event queue full.");
+ }
+#else
+ m_current_conf.ev_handler(p_event);
+#endif
+}
+
+/**
+ * @brief Power event handler.
+ *
+ * The function that pushes power events into the queue.
+ * @param p_event Event from power driver to map into APP_USBD_EVT_POWER_ event.
+ */
+#if APP_USBD_CONFIG_POWER_EVENTS_PROCESS
+static void app_usbd_power_event_handler(nrf_drv_power_usb_evt_t event)
+{
+ switch(event)
+ {
+ case NRF_DRV_POWER_USB_EVT_DETECTED:
+ {
+ static const app_usbd_internal_evt_t ev = {
+ .type = APP_USBD_EVT_POWER_DETECTED
+ };
+ app_usbd_event_add(&ev);
+ break;
+ }
+ case NRF_DRV_POWER_USB_EVT_REMOVED:
+ {
+ static const app_usbd_internal_evt_t ev = {
+ .type = APP_USBD_EVT_POWER_REMOVED
+ };
+ app_usbd_event_add(&ev);
+ break;
+ }
+ case NRF_DRV_POWER_USB_EVT_READY:
+ {
+ static const app_usbd_internal_evt_t ev = {
+ .type = APP_USBD_EVT_POWER_READY
+ };
+ app_usbd_event_add(&ev);
+ break;
+ }
+ default:
+ ASSERT(false);
+ }
+}
+#endif
+
+/**
+ * @brief Event handler.
+ *
+ * The function that pushes the event into the queue.
+ * @param p_event Event to push.
+ */
+static void app_usbd_event_handler(nrf_drv_usbd_evt_t const * const p_event)
+{
+ app_usbd_event_add((app_usbd_internal_evt_t const *)p_event);
+}
+
+/**
+ * @brief HF clock ready event handler.
+ *
+ * Function that is called when high frequency clock is started.
+ *
+ * @param event Event type that comes from clock driver.
+ */
+static void app_usbd_hfclk_ready(nrf_drv_clock_evt_type_t event)
+{
+ ASSERT(NRF_DRV_CLOCK_EVT_HFCLK_STARTED == event);
+ static const app_usbd_evt_t evt_data = {
+ .type = APP_USBD_EVT_HFCLK_READY
+ };
+ app_usbd_event_add((app_usbd_internal_evt_t const * )&evt_data);
+}
+
+/**
+ * @brief Check if the HFCLK was requested in selected suspend state machine state.
+ *
+ *
+ * @param sustate State to be checked.
+ *
+ * @retval true High frequency clock was requested in selected state.
+ * @retval false High frequency clock was released in selected state.
+ */
+static inline bool app_usbd_sustate_with_requested_hfclk(app_usbd_sustate_t sustate)
+{
+ switch(sustate)
+ {
+ case SUSTATE_STOPPED: return false;
+ case SUSTATE_STARTED: return false;
+ case SUSTATE_ACTIVE: return true;
+ case SUSTATE_SUSPENDING: return false;
+ case SUSTATE_SUSPEND: return false;
+ case SUSTATE_RESUMING: return true;
+ case SUSTATE_WAKINGUP_WAITING_HFCLK_WREQ: return true;
+ case SUSTATE_WAKINGUP_WAITING_HFCLK: return true;
+ case SUSTATE_WAKINGUP_WAITING_WREQ: return true;
+ default:
+ return false;
+ }
+}
+
+/**
+ * @brief Check it the HFCLK is running in selected suspend state machine state.
+ *
+ * @param sustate State to be checked.
+ *
+ * @retval true High frequency clock is running in selected state.
+ * @retval false High frequency clock is released in selected state.
+ */
+static inline bool app_usbd_sustate_with_running_hfclk(app_usbd_sustate_t sustate)
+{
+ switch(sustate)
+ {
+ case SUSTATE_STOPPED: return false;
+ case SUSTATE_STARTED: return false;
+ case SUSTATE_ACTIVE: return true;
+ case SUSTATE_SUSPENDING: return false;
+ case SUSTATE_SUSPEND: return false;
+ case SUSTATE_RESUMING: return false;
+ case SUSTATE_WAKINGUP_WAITING_HFCLK_WREQ: return false;
+ case SUSTATE_WAKINGUP_WAITING_HFCLK: return false;
+ case SUSTATE_WAKINGUP_WAITING_WREQ: return true;
+ default:
+ return false;
+ }
+}
+
+/**
+ * @brief Get current suspend state machine state.
+ *
+ * @return The state of the suspend state machine.
+ */
+static inline app_usbd_sustate_t sustate_get(void)
+{
+ return m_sustate;
+}
+
+/**
+ * @brief Set current suspend state machine state.
+ *
+ * @param sustate The requested state of the state machine.
+ */
+static inline void sustate_set(app_usbd_sustate_t sustate)
+{
+ if (app_usbd_sustate_with_requested_hfclk(sustate) != app_usbd_sustate_with_requested_hfclk(m_sustate))
+ {
+ if (app_usbd_sustate_with_requested_hfclk(sustate))
+ {
+ static nrf_drv_clock_handler_item_t clock_handler_item =
+ {
+ .event_handler = app_usbd_hfclk_ready
+ };
+ nrf_drv_clock_hfclk_request(&clock_handler_item);
+ }
+ else
+ {
+ nrf_drv_clock_hfclk_release();
+ }
+ }
+ if (app_usbd_sustate_with_running_hfclk(sustate) != app_usbd_sustate_with_running_hfclk(m_sustate))
+ {
+ if (app_usbd_sustate_with_running_hfclk(sustate))
+ {
+ nrf_drv_usbd_active_irq_config();
+ }
+ else
+ {
+ nrf_drv_usbd_suspend_irq_config();
+ }
+ }
+ m_sustate = sustate;
+}
+
+/**
+ * @brief Default selection function for interface.
+ *
+ * This function just enables and clears interface endpoints.
+ *
+ * @param[in] p_inst Class instance.
+ * @param[in] iface_idx Interface index.
+ * @param[in] alternate Interface alternate setting.
+ *
+ * @note Currently only alternate setting 0 is supported.
+ *
+ * @return Standard error code @ref ret_code_t
+ * @retval NRF_SUCCESS Endpoints enabled and cleared.
+ * @retval NRF_ERROR_INVALID_PARAM Unsupported alternate selected.
+ */
+static inline ret_code_t default_iface_select(
+ app_usbd_class_inst_t const * const p_inst,
+ uint8_t iface_idx,
+ uint8_t alternate)
+{
+ ASSERT(iface_idx <= app_usbd_class_iface_count_get(p_inst));
+
+ if (alternate != 0)
+ {
+ return NRF_ERROR_INVALID_PARAM;
+ }
+
+ app_usbd_class_iface_conf_t const * p_iface = app_usbd_class_iface_get(p_inst, iface_idx);
+ uint8_t ep_count = app_usbd_class_iface_ep_count_get(p_iface);
+
+ for (uint8_t i = 0; i < ep_count; ++i)
+ {
+ /* Enable every endpoint */
+ app_usbd_class_ep_conf_t const * p_ep = app_usbd_class_iface_ep_get(p_iface, i);
+ app_usbd_ep_enable(p_ep->address);
+ }
+ return NRF_SUCCESS;
+}
+
+/**
+ * @brief Default deselection function for interface.
+ *
+ * This function just disables all interface endpoints.
+ *
+ * @param[in] p_inst Class instance.
+ * @param[in] iface_idx Interface index.
+ */
+static inline void default_iface_deselect(
+ app_usbd_class_inst_t const * const p_inst,
+ uint8_t iface_idx)
+{
+ ASSERT(iface_idx <= app_usbd_class_iface_count_get(p_inst));
+
+ app_usbd_class_iface_conf_t const * p_iface = app_usbd_class_iface_get(p_inst, iface_idx);
+ uint8_t ep_count = app_usbd_class_iface_ep_count_get(p_iface);
+
+ for (uint8_t i = 0; i < ep_count; ++i)
+ {
+ /* Disable every endpoint */
+ app_usbd_class_ep_conf_t const * p_ep = app_usbd_class_iface_ep_get(p_iface, i);
+ app_usbd_ep_disable(p_ep->address);
+ }
+}
+
+
+/** @} */
+
+#if (APP_USBD_PROVIDE_SOF_TIMESTAMP) || defined(__SDK_DOXYGEN__)
+uint32_t app_usbd_sof_timestamp_get(void)
+{
+ return m_last_frame;
+}
+#endif
+
+ret_code_t app_usbd_init(app_usbd_config_t const * p_config)
+{
+ ASSERT(nrf_drv_clock_init_check());
+ ret_code_t ret;
+
+#if (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE) || defined(__SDK_DOXYGEN__)
+ ret = NRF_ATFIFO_INIT(m_event_queue);
+ if (NRF_SUCCESS != ret)
+ {
+ return NRF_ERROR_INTERNAL;
+ }
+#endif
+
+ /* This is called at the beginning to secure multiple calls to init function */
+ ret = nrf_drv_usbd_init(app_usbd_event_handler);
+ if (NRF_SUCCESS != ret)
+ {
+ return ret;
+ }
+
+ /* Clear the variables */
+ m_sustate = SUSTATE_STOPPED;
+ m_p_first_cinst = NULL;
+ m_p_first_sof_cinst = NULL;
+ memset(m_epin_conf , 0, sizeof(m_epin_conf ));
+ memset(m_epout_conf, 0, sizeof(m_epout_conf));
+ /* Save the new configuration */
+ if (p_config == NULL)
+ {
+ m_current_conf = m_default_conf;
+ }
+ else
+ {
+ m_current_conf = *p_config;
+ }
+
+#if (!(APP_USBD_CONFIG_EVENT_QUEUE_ENABLE))
+ if(m_current_conf.ev_handler == NULL)
+ {
+ m_current_conf.ev_handler = m_default_conf.ev_handler;
+ }
+#endif
+
+#if APP_USBD_CONFIG_POWER_EVENTS_PROCESS
+ ret = nrf_drv_power_init(NULL);
+ if ((ret != NRF_SUCCESS) && (ret != NRF_ERROR_MODULE_ALREADY_INITIALIZED))
+ {
+ /* This should never happen */
+ APP_ERROR_HANDLER(ret);
+ }
+#endif
+
+ /*Pin core class to required endpoints*/
+ uint8_t iface_idx;
+ app_usbd_class_iface_conf_t const * p_iface;
+ app_usbd_class_inst_t const * const p_inst = app_usbd_core_instance_access();
+ iface_idx = 0;
+ while ((p_iface = app_usbd_class_iface_get(p_inst, iface_idx++)) != NULL)
+ {
+ uint8_t ep_idx = 0;
+ app_usbd_class_ep_conf_t const * p_ep;
+ while ((p_ep = app_usbd_class_iface_ep_get(p_iface, ep_idx++)) != NULL)
+ {
+ app_usbd_ep_instance_set(app_usbd_class_ep_address_get(p_ep), p_inst);
+ }
+ }
+
+ /* Successfully attached */
+ const app_usbd_evt_t evt_data = {
+ .type = APP_USBD_EVT_INST_APPEND
+ };
+
+ ret = class_event_handler(p_inst, (app_usbd_complex_evt_t const *)(&evt_data));
+ if (NRF_SUCCESS != ret)
+ {
+ UNUSED_RETURN_VALUE(nrf_drv_usbd_uninit());
+ return ret;
+ }
+
+ return NRF_SUCCESS;
+}
+
+
+ret_code_t app_usbd_uninit(void)
+{
+#if APP_USBD_CONFIG_POWER_EVENTS_PROCESS
+ nrf_drv_power_usbevt_uninit();
+#endif
+
+ /* We get this error at very beginning but it would be used at the end of the function */
+ const ret_code_t ret = nrf_drv_usbd_uninit();
+
+ /* Unchain instance list */
+ app_usbd_class_inst_t const * * pp_inst;
+ pp_inst = &m_p_first_cinst;
+ while (NULL != (*pp_inst))
+ {
+ app_usbd_class_inst_t const * * pp_next = &app_usbd_class_data_access(*pp_inst)->p_next;
+ (*pp_inst) = NULL;
+ pp_inst = pp_next;
+ }
+
+ /* Unchain SOF list */
+ pp_inst = &m_p_first_sof_cinst;
+ while (NULL != (*pp_inst))
+ {
+ app_usbd_class_inst_t const * * pp_next = &app_usbd_class_data_access(*pp_inst)->p_sof_next;
+ (*pp_inst) = NULL;
+ pp_inst = pp_next;
+ }
+
+ /* Unchain SOF interrupt list */
+ pp_inst = &m_p_first_sof_interrupt_cinst;
+ while (NULL != (*pp_inst))
+ {
+ app_usbd_class_inst_t const * * pp_next = &app_usbd_class_data_access(*pp_inst)->p_sof_next;
+ (*pp_inst) = NULL;
+ pp_inst = pp_next;
+ }
+
+ /* Clear all endpoints configurations */
+ memset(m_epin_conf , 0, sizeof(m_epin_conf ));
+ memset(m_epout_conf, 0, sizeof(m_epout_conf));
+ /* Clear current configuration */
+ memset(&m_current_conf, 0, sizeof(m_current_conf));
+
+ return ret;
+}
+
+
+#if APP_USBD_CONFIG_POWER_EVENTS_PROCESS
+ret_code_t app_usbd_power_events_enable(void)
+{
+ if (!nrf_drv_usbd_is_initialized() || nrf_drv_usbd_is_enabled())
+ {
+ return NRF_ERROR_INVALID_STATE;
+ }
+
+ ASSERT((!APP_USBD_CONFIG_EVENT_QUEUE_ENABLE) || (USBD_CONFIG_IRQ_PRIORITY == POWER_CONFIG_IRQ_PRIORITY));
+
+ ret_code_t ret;
+ static const nrf_drv_power_usbevt_config_t config =
+ {
+ .handler = app_usbd_power_event_handler
+ };
+
+ ret = nrf_drv_power_usbevt_init(&config);
+ APP_ERROR_CHECK(ret);
+
+ return NRF_SUCCESS;
+}
+#endif /* APP_USBD_CONFIG_POWER_EVENTS_PROCESS */
+
+
+void app_usbd_enable(void)
+{
+ nrf_drv_usbd_enable();
+}
+
+
+void app_usbd_disable(void)
+{
+ ASSERT(!nrf_drv_usbd_is_started());
+ nrf_drv_usbd_disable();
+}
+
+
+void app_usbd_start(void)
+{
+ ASSERT(nrf_drv_usbd_is_enabled());
+
+ /* Check if interface numbers are in correct order */
+ if (APP_USBD_CONFIG_LOG_ENABLED)
+ {
+ uint8_t next_iface = 0;
+ for (app_usbd_class_inst_t const * * pp_inst = &m_p_first_cinst;
+ (*pp_inst) != NULL;
+ pp_inst = &(app_usbd_class_data_access(*pp_inst)->p_next))
+ {
+ uint8_t iface_idx = 0;
+ app_usbd_class_iface_conf_t const * p_iface;
+ while (NULL != (p_iface = app_usbd_class_iface_get(*pp_inst, iface_idx++)))
+ {
+ if (p_iface->number != next_iface)
+ {
+ NRF_LOG_WARNING("Unexpected interface number, expected %d, got %d",
+ next_iface,
+ p_iface->number);
+ }
+ ++next_iface;
+ }
+ }
+ }
+
+ /* Power should be already enabled - wait just in case if user calls
+ * app_usbd_start just after app_usbd_enable without waiting for the event. */
+ while (!nrf_power_usbregstatus_outrdy_get())
+ {
+ /* Wait for the power but terminate the function if USBD power disappears */
+ if (!nrf_power_usbregstatus_vbusdet_get())
+ return;
+ }
+
+ static const app_usbd_evt_t evt_data = {
+ .type = APP_USBD_EVT_START_REQ
+ };
+ app_usbd_event_add((app_usbd_internal_evt_t const * )&evt_data);
+}
+
+
+void app_usbd_stop(void)
+{
+ const app_usbd_evt_t evt_data = {
+ .type = APP_USBD_EVT_STOP_REQ
+ };
+ app_usbd_event_add((app_usbd_internal_evt_t const * )&evt_data);
+}
+
+void app_usbd_suspend_req(void)
+{
+ const app_usbd_evt_t evt_data = {
+ .type = APP_USBD_EVT_SUSPEND_REQ
+ };
+ app_usbd_event_add((app_usbd_internal_evt_t const * )&evt_data);
+}
+
+bool app_usbd_wakeup_req(void)
+{
+ ASSERT(app_usbd_class_rwu_enabled_check());
+ if (!app_usbd_core_feature_state_get(APP_USBD_SETUP_STDFEATURE_DEVICE_REMOTE_WAKEUP))
+ return false;
+
+ const app_usbd_evt_t evt_data = {
+ .type = APP_USBD_EVT_WAKEUP_REQ
+ };
+ app_usbd_event_add((app_usbd_internal_evt_t const * )&evt_data);
+ return true;
+}
+
+bool app_usbd_active_check(void)
+{
+ return (sustate_get() == SUSTATE_ACTIVE);
+}
+
+void app_usbd_event_execute(app_usbd_internal_evt_t const * const p_event)
+{
+ ASSERT(NULL != m_p_first_cinst);
+ /* If no event queue is implemented, it has to be ensured that this function is never called
+ * from the context higher than USB interrupt level
+ * If queue is implemented it would be called always from Thread level
+ * if the library is used correctly.
+ * NOTE: Higher interrupt level -> lower priority value.
+ */
+ ASSERT(USBD_CONFIG_IRQ_PRIORITY <= current_int_priority_get());
+
+ /* Note - there should never be situation that event is generated on disconnected endpoint */
+ switch (p_event->type)
+ {
+ case APP_USBD_EVT_START_REQ:
+ {
+ static const app_usbd_evt_t evt_data = {
+ .type = APP_USBD_EVT_STARTED
+ };
+
+ /* Send event to all classes */
+ UNUSED_RETURN_VALUE(app_usbd_core_handler_call((app_usbd_internal_evt_t const * )&evt_data));
+ app_usbd_all_call((app_usbd_complex_evt_t const *)&evt_data);
+ user_event_state_proc(APP_USBD_EVT_STARTED);
+
+ app_usbd_all_iface_deselect();
+ app_usbd_core_ep0_disable();
+ nrf_drv_usbd_start((NULL != m_p_first_sof_cinst) || (m_current_conf.enable_sof) || (APP_USBD_PROVIDE_SOF_TIMESTAMP));
+ sustate_set(SUSTATE_STARTED);
+ break;
+ }
+ case APP_USBD_EVT_STOP_REQ:
+ {
+ static const app_usbd_evt_t evt_data = {
+ .type = APP_USBD_EVT_STOPPED
+ };
+
+ app_usbd_all_iface_deselect();
+ nrf_drv_usbd_stop();
+ sustate_set(SUSTATE_STOPPED);
+
+ /* Send event to all classes */
+ app_usbd_all_call((app_usbd_complex_evt_t const * )&evt_data);
+ UNUSED_RETURN_VALUE(app_usbd_core_handler_call((app_usbd_internal_evt_t const *)&evt_data));
+ user_event_state_proc(APP_USBD_EVT_STOPPED);
+ if (app_usbd_sustate_with_requested_hfclk(sustate_get()))
+ {
+ nrf_drv_clock_hfclk_release();
+ }
+
+ break;
+ }
+ case APP_USBD_EVT_HFCLK_READY:
+ {
+ switch(sustate_get())
+ {
+ case SUSTATE_RESUMING:
+ {
+ sustate_set(SUSTATE_ACTIVE);
+ break;
+ }
+ case SUSTATE_WAKINGUP_WAITING_HFCLK_WREQ:
+ {
+ sustate_set(SUSTATE_WAKINGUP_WAITING_WREQ);
+ break;
+ }
+ case SUSTATE_WAKINGUP_WAITING_HFCLK:
+ {
+ sustate_set(SUSTATE_ACTIVE);
+ break;
+ }
+ default:
+ break; // Just ignore - it can happen in specific situation
+ }
+ break;
+ }
+ case APP_USBD_EVT_SUSPEND_REQ:
+ {
+ /* Suspend request can be only processed when we are in suspending state */
+ if (SUSTATE_SUSPENDING == sustate_get())
+ {
+ if (nrf_drv_usbd_suspend())
+ {
+ sustate_set(SUSTATE_SUSPEND);
+ }
+ }
+ break;
+ }
+ case APP_USBD_EVT_WAKEUP_REQ:
+ {
+ /* Suspend temporary if no suspend function was called from the application.
+ * This makes it possible to generate APP_USBD_EVT_DRV_WUREQ event from the driver */
+ if (sustate_get() == SUSTATE_SUSPENDING)
+ {
+ if (nrf_drv_usbd_suspend())
+ {
+ sustate_set(SUSTATE_SUSPEND);
+ }
+ }
+ if (nrf_drv_usbd_wakeup_req())
+ {
+ sustate_set(SUSTATE_WAKINGUP_WAITING_HFCLK_WREQ);
+ }
+ break;
+ }
+
+ case APP_USBD_EVT_DRV_SOF:
+ {
+#if (APP_USBD_PROVIDE_SOF_TIMESTAMP) || defined(__SDK_DOXYGEN__)
+ m_last_frame = p_event->drv_evt.data.sof.framecnt;
+#endif
+ /* Wake up if suspended */
+ if ((sustate_get() == SUSTATE_SUSPENDING) || (sustate_get() == SUSTATE_WAKINGUP_WAITING_WREQ))
+ {
+ static const app_usbd_evt_t evt_data = {
+ .type = APP_USBD_EVT_DRV_RESUME
+ };
+ app_usbd_event_execute((app_usbd_internal_evt_t *)&evt_data);
+ }
+
+ user_event_state_proc(APP_USBD_EVT_DRV_SOF);
+
+ app_usbd_class_inst_t const * p_inst = app_usbd_class_sof_first_get();
+ while (NULL != p_inst)
+ {
+ ret_code_t r = class_event_handler(p_inst, (app_usbd_complex_evt_t const *)p_event);
+ UNUSED_VARIABLE(r);
+ p_inst = app_usbd_class_sof_next_get(p_inst);
+ }
+ break;
+ }
+
+ case APP_USBD_EVT_DRV_RESET:
+ {
+ app_usbd_all_iface_deselect();
+ app_usbd_core_ep0_enable();
+ sustate_set(SUSTATE_ACTIVE);
+ user_event_state_proc(APP_USBD_EVT_DRV_RESET);
+ /* Processing core interface (connected only to EP0) and then all instances from the list */
+ UNUSED_RETURN_VALUE(app_usbd_core_handler_call(p_event));
+ app_usbd_all_call((app_usbd_complex_evt_t const *)p_event);
+ break;
+ }
+ case APP_USBD_EVT_DRV_RESUME:
+ {
+ if (sustate_get() == SUSTATE_WAKINGUP_WAITING_WREQ)
+ {
+ sustate_set(SUSTATE_ACTIVE);
+ nrf_drv_usbd_force_bus_wakeup();
+ }
+ else
+ {
+ sustate_set(SUSTATE_RESUMING);
+ }
+ user_event_state_proc(APP_USBD_EVT_DRV_RESUME);
+ /* Processing core interface (connected only to EP0) and then all instances from the list */
+ UNUSED_RETURN_VALUE(app_usbd_core_handler_call(p_event));
+ app_usbd_all_call((app_usbd_complex_evt_t const *)p_event);
+ break;
+ }
+ case APP_USBD_EVT_DRV_WUREQ:
+ {
+ static const app_usbd_evt_t evt_data = {
+ .type = APP_USBD_EVT_DRV_RESUME
+ };
+ user_event_state_proc(APP_USBD_EVT_DRV_RESUME);
+ /* Processing core interface (connected only to EP0) and then all instances from the list */
+ UNUSED_RETURN_VALUE(app_usbd_core_handler_call((app_usbd_internal_evt_t const *)&evt_data));
+ app_usbd_all_call((app_usbd_complex_evt_t const *)&evt_data);
+
+ switch(sustate_get())
+ {
+ case SUSTATE_WAKINGUP_WAITING_HFCLK_WREQ:
+ sustate_set(SUSTATE_WAKINGUP_WAITING_HFCLK);
+ break;
+ case SUSTATE_WAKINGUP_WAITING_WREQ:
+ sustate_set(SUSTATE_ACTIVE);
+ break;
+ default:
+ {
+ /* This should not happen - but try to recover by setting directly active state */
+ NRF_LOG_WARNING("Unexpected state on WUREQ event (%u)", sustate_get());
+ sustate_set(SUSTATE_ACTIVE);
+ }
+ }
+ break;
+ }
+ case APP_USBD_EVT_DRV_SUSPEND:
+ {
+ sustate_set(SUSTATE_SUSPENDING);
+
+ user_event_state_proc(APP_USBD_EVT_DRV_SUSPEND);
+
+ /* Processing all instances from the list and then core interface (connected only to EP0) */
+ app_usbd_all_call((app_usbd_complex_evt_t const *)p_event);
+ UNUSED_RETURN_VALUE(app_usbd_core_handler_call(p_event));
+ break;
+ }
+
+ case APP_USBD_EVT_STATE_CHANGED:
+ {
+ user_event_state_proc(APP_USBD_EVT_STATE_CHANGED);
+ /* Processing all instances from the list and then core interface (connected only to EP0) */
+ app_usbd_all_call((app_usbd_complex_evt_t const *)p_event);
+ break;
+ }
+
+ case APP_USBD_EVT_DRV_SETUP:
+ {
+ UNUSED_RETURN_VALUE(app_usbd_core_handler_call(p_event));
+ break;
+ }
+
+ case APP_USBD_EVT_SETUP_SETADDRESS:
+ {
+ UNUSED_RETURN_VALUE(app_usbd_core_handler_call(p_event));
+ break;
+ }
+
+ case APP_USBD_EVT_DRV_EPTRANSFER:
+ {
+ app_usbd_ep_conf_t const * p_ep_conf =
+ app_usbd_ep_conf_access(p_event->drv_evt.data.eptransfer.ep);
+ ASSERT(NULL != p_ep_conf->p_cinst);
+ ASSERT(NULL != p_ep_conf->event_handler);
+
+ if (NRF_SUCCESS != p_ep_conf->event_handler(p_ep_conf->p_cinst,
+ (app_usbd_complex_evt_t const *)p_event))
+ {
+ /* If error returned, every bulk/interrupt endpoint would be stalled */
+ if (!(0 == NRF_USBD_EP_NR_GET(p_event->drv_evt.data.eptransfer.ep) ||
+ NRF_USBD_EPISO_CHECK(p_event->drv_evt.data.eptransfer.ep)))
+ {
+ nrf_drv_usbd_ep_stall(p_event->drv_evt.data.eptransfer.ep);
+ }
+ }
+ break;
+ }
+#if APP_USBD_CONFIG_POWER_EVENTS_PROCESS
+ case APP_USBD_EVT_POWER_DETECTED:
+ {
+ user_event_state_proc(APP_USBD_EVT_POWER_DETECTED);
+ app_usbd_all_call((app_usbd_complex_evt_t const *)p_event);
+ break;
+ }
+ case APP_USBD_EVT_POWER_REMOVED:
+ {
+ user_event_state_proc(APP_USBD_EVT_POWER_REMOVED);
+ app_usbd_all_call((app_usbd_complex_evt_t const *)p_event);
+ break;
+ }
+ case APP_USBD_EVT_POWER_READY:
+ {
+ user_event_state_proc(APP_USBD_EVT_POWER_READY);
+ app_usbd_all_call((app_usbd_complex_evt_t const *)p_event);
+ break;
+ }
+#endif
+ default:
+ ASSERT(0);
+ break;
+ }
+}
+
+
+#if (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE) || defined(__SDK_DOXYGEN__)
+bool app_usbd_event_queue_process(void)
+{
+#if (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE)
+ app_usbd_internal_evt_t sof_event = {
+ .app_evt.type = APP_USBD_EVT_DRV_SOF
+ };
+#endif // (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE)
+ static nrf_atfifo_item_get_t cx;
+ static app_usbd_internal_queue_evt_t * p_event_item = NULL;
+ if (NULL == p_event_item)
+ {
+ p_event_item = nrf_atfifo_item_get(m_event_queue, &cx);
+ }
+
+ if (NULL != p_event_item)
+ {
+
+#if (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE)
+ if (p_event_item->sof_cnt > 0)
+ {
+ if (p_event_item->start_frame > USBD_FRAMECNTR_FRAMECNTR_Msk)
+ {
+ p_event_item->start_frame = 0;
+ }
+ sof_event.drv_evt.data.sof.framecnt = (p_event_item->start_frame)++;
+ --(p_event_item->sof_cnt);
+ app_usbd_event_execute(&sof_event);
+ return true;
+ }
+#endif // (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE)
+
+ app_usbd_event_execute(&(p_event_item->evt));
+ UNUSED_RETURN_VALUE(nrf_atfifo_item_free(m_event_queue, &cx));
+ p_event_item = NULL;
+ return true;
+ }
+#if (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE)
+ else if (m_sof_events_cnt > 0)
+ {
+ CRITICAL_REGION_ENTER();
+ if (m_event_frame > USBD_FRAMECNTR_FRAMECNTR_Msk)
+ {
+ m_event_frame = 0;
+ }
+ sof_event.drv_evt.data.sof.framecnt = m_event_frame++;
+ UNUSED_RETURN_VALUE(nrf_atomic_u32_sub_hs(&m_sof_events_cnt, 1));
+ CRITICAL_REGION_EXIT();
+ app_usbd_event_execute(&sof_event);
+ return true;
+ }
+#endif // (APP_USBD_CONFIG_SOF_HANDLING_MODE == APP_USBD_SOF_HANDLING_COMPRESS_QUEUE)
+ else
+ {
+ return false;
+ }
+}
+#endif
+
+
+ret_code_t app_usbd_class_append(app_usbd_class_inst_t const * p_cinst)
+{
+ ASSERT(NULL != p_cinst);
+ ASSERT(NULL != p_cinst->p_class_methods);
+ ASSERT(NULL != p_cinst->p_class_methods->event_handler);
+ ASSERT(NULL == app_usbd_class_data_access(p_cinst)->p_next);
+
+ /* This should be only called if USBD is disabled
+ * We simply assume that USBD is enabled if its interrupts are */
+ ASSERT(!nrf_drv_usbd_is_enabled() && nrf_drv_usbd_is_initialized());
+
+ /* Check if all required endpoints are available
+ * Checking is splitted from setting to avoid situation that anything
+ * is modified and then operation finishes with error */
+ uint8_t iface_idx;
+ app_usbd_class_iface_conf_t const * p_iface;
+
+ iface_idx = 0;
+ while (NULL != (p_iface = app_usbd_class_iface_get(p_cinst, iface_idx++)))
+ {
+ uint8_t ep_idx = 0;
+ app_usbd_class_ep_conf_t const * p_ep;
+ while (NULL != (p_ep = app_usbd_class_iface_ep_get(p_iface, ep_idx++)))
+ {
+ if (NULL != app_usbd_ep_instance_get(app_usbd_class_ep_address_get(p_ep)))
+ {
+ return NRF_ERROR_BUSY;
+ }
+ }
+ }
+
+ /* Connecting all required endpoints */
+ iface_idx = 0;
+ while (NULL != (p_iface = app_usbd_class_iface_get(p_cinst, iface_idx++)))
+ {
+ uint8_t ep_idx = 0;
+ app_usbd_class_ep_conf_t const * p_ep;
+ while (NULL != (p_ep = app_usbd_class_iface_ep_get(p_iface, ep_idx++)))
+ {
+ app_usbd_ep_instance_set(app_usbd_class_ep_address_get(p_ep), p_cinst);
+ }
+ }
+
+ /* Adding pointer to this instance to the end of the chain */
+ app_usbd_class_inst_t const * * pp_last = &m_p_first_cinst;
+ while (NULL != (*pp_last))
+ {
+ ASSERT((*pp_last) != p_cinst);
+ pp_last = &(app_usbd_class_data_access(*pp_last)->p_next);
+ }
+ (*pp_last) = p_cinst;
+
+ /* Successfully attached */
+ const app_usbd_evt_t evt_data = {.type = APP_USBD_EVT_INST_APPEND };
+ return class_event_handler(p_cinst, (app_usbd_complex_evt_t const *)(&evt_data));
+}
+
+
+ret_code_t app_usbd_class_remove(app_usbd_class_inst_t const * p_cinst)
+{
+ ASSERT(NULL != p_cinst);
+ ASSERT(NULL != p_cinst->p_class_methods);
+ ASSERT(NULL != p_cinst->p_class_methods->event_handler);
+ /* This function should be only called if USBD is disabled */
+ ASSERT(!nrf_drv_usbd_is_enabled() && nrf_drv_usbd_is_initialized());
+ ret_code_t ret;
+ /* Remove this class from the chain */
+ app_usbd_class_inst_t const * * pp_last = &m_p_first_cinst;
+ while (NULL != (*pp_last))
+ {
+ if ((*pp_last) == p_cinst)
+ {
+ /* Inform class instance that removing process is going to be started */
+ const app_usbd_evt_t evt_data = {
+ .type = APP_USBD_EVT_INST_REMOVE
+ };
+ ret = class_event_handler(p_cinst, (app_usbd_complex_evt_t const *)(&evt_data));
+ if (ret != NRF_SUCCESS)
+ {
+ return ret;
+ }
+
+ /* Breaking chain */
+ (*pp_last) = (app_usbd_class_data_access(p_cinst)->p_next);
+ app_usbd_class_data_access(p_cinst)->p_next = NULL;
+
+ /* Disconnecting endpoints */
+ uint8_t ep_idx;
+ for (ep_idx = 0; ep_idx < NRF_USBD_EPIN_CNT; ++ep_idx)
+ {
+ nrf_drv_usbd_ep_t ep = NRF_DRV_USBD_EPIN(ep_idx);
+ if (app_usbd_ep_instance_get(ep) == p_cinst)
+ {
+ app_usbd_ep_instance_set(ep, NULL);
+ }
+ }
+ for (ep_idx = 0; ep_idx < NRF_USBD_EPOUT_CNT; ++ep_idx)
+ {
+ nrf_drv_usbd_ep_t ep = NRF_DRV_USBD_EPOUT(ep_idx);
+ if (app_usbd_ep_instance_get(ep) == p_cinst)
+ {
+ app_usbd_ep_instance_set(ep, NULL);
+ }
+ }
+
+ return NRF_SUCCESS;
+ }
+ pp_last = &(app_usbd_class_data_access(*pp_last)->p_next);
+ }
+
+ return NRF_ERROR_NOT_FOUND;
+}
+
+
+ret_code_t app_usbd_class_remove_all(void)
+{
+ ret_code_t ret = NRF_SUCCESS;
+ while (NULL != m_p_first_cinst)
+ {
+ ret = app_usbd_class_remove(m_p_first_cinst);
+ if (ret != NRF_SUCCESS)
+ {
+ break;
+ }
+ }
+
+ return ret;
+}
+
+
+ret_code_t app_usbd_ep_handler_set(app_usbd_class_inst_t const * const p_cinst,
+ nrf_drv_usbd_ep_t ep,
+ app_usbd_ep_event_handler_t handler)
+{
+ ASSERT(NULL != p_cinst);
+ ASSERT(NULL != handler);
+ /* This function should be only called if USBD is disabled */
+ ASSERT(!nrf_drv_usbd_is_enabled() && nrf_drv_usbd_is_initialized());
+
+ if (p_cinst != app_usbd_ep_instance_get(ep))
+ {
+ return NRF_ERROR_INVALID_PARAM;
+ }
+
+ (app_usbd_ep_conf_access(ep))->event_handler = handler;
+ return NRF_SUCCESS;
+}
+
+
+ret_code_t app_usbd_class_sof_register(app_usbd_class_inst_t const * p_cinst)
+{
+ ASSERT(NULL != p_cinst);
+ ASSERT(NULL != p_cinst->p_class_methods);
+ ASSERT(NULL != p_cinst->p_class_methods->event_handler);
+ /* This function should be only called if USBD is disabled */
+ ASSERT(!nrf_drv_usbd_is_enabled() && nrf_drv_usbd_is_initialized());
+
+ /* Make sure it's not in interrupt SOF list */
+ app_usbd_class_inst_t const * * pp_last = &m_p_first_sof_interrupt_cinst;
+ while (NULL != (*pp_last))
+ {
+ ASSERT((*pp_last) != p_cinst);
+ pp_last = &(app_usbd_class_data_access(*pp_last)->p_sof_next);
+ }
+
+ /* Next SOF event requiring instance has to be NULL now */
+ ASSERT(NULL == (app_usbd_class_data_access(p_cinst)->p_sof_next));
+
+ /* Adding pointer to this instance to the end of the chain */
+ pp_last = &m_p_first_sof_cinst;
+ while (NULL != (*pp_last))
+ {
+ ASSERT((*pp_last) != p_cinst);
+ pp_last = &(app_usbd_class_data_access(*pp_last)->p_sof_next);
+ }
+ (*pp_last) = p_cinst;
+
+ return NRF_SUCCESS;
+}
+
+
+ret_code_t app_usbd_class_sof_unregister(app_usbd_class_inst_t const * p_cinst)
+{
+ ASSERT(NULL != p_cinst);
+ /** This function should be only called if USBD is disabled */
+ ASSERT(!nrf_drv_usbd_is_enabled() && nrf_drv_usbd_is_initialized());
+
+ app_usbd_class_inst_t const * * pp_last = &m_p_first_sof_cinst;
+ while (NULL != (*pp_last))
+ {
+ if ((*pp_last) == p_cinst)
+ {
+ /* Breaking chain */
+ (*pp_last) = (app_usbd_class_data_access(p_cinst)->p_sof_next);
+ app_usbd_class_data_access(p_cinst)->p_sof_next = NULL;
+
+ return NRF_SUCCESS;
+ }
+ pp_last = &(app_usbd_class_data_access(*pp_last)->p_sof_next);
+ }
+ return NRF_ERROR_NOT_FOUND;
+}
+
+ret_code_t app_usbd_class_sof_interrupt_register(app_usbd_class_inst_t const * p_cinst, app_usbd_sof_interrupt_handler_t handler)
+{
+ ASSERT(NULL != p_cinst);
+ ASSERT(NULL != p_cinst->p_class_methods);
+ ASSERT(NULL != handler);
+ /* This function should be only called if USBD is disabled */
+ ASSERT(!nrf_drv_usbd_is_enabled() && nrf_drv_usbd_is_initialized());
+
+ /* Next SOF event requiring instance has to be NULL now */
+ ASSERT(NULL == (app_usbd_class_data_access(p_cinst)->p_sof_next));
+
+ app_usbd_class_data_access(p_cinst)->sof_handler = handler;
+
+ /* Make sure it's not in normal SOF list */
+ app_usbd_class_inst_t const * * pp_last = &m_p_first_sof_cinst;
+ while (NULL != (*pp_last))
+ {
+ ASSERT((*pp_last) != p_cinst);
+ pp_last = &(app_usbd_class_data_access(*pp_last)->p_sof_next);
+ }
+
+ /* Adding pointer to this instance to the end of the interrupt chain */
+ pp_last = &m_p_first_sof_interrupt_cinst;
+ while (NULL != (*pp_last))
+ {
+
+ ASSERT((*pp_last) != p_cinst);
+ pp_last = &(app_usbd_class_data_access(*pp_last)->p_sof_next);
+ }
+ (*pp_last) = p_cinst;
+
+ return NRF_SUCCESS;
+}
+
+
+ret_code_t app_usbd_class_sof_interrupt_unregister(app_usbd_class_inst_t const * p_cinst)
+{
+ ASSERT(NULL != p_cinst);
+ /** This function should be only called if USBD is disabled */
+ ASSERT(!nrf_drv_usbd_is_enabled() && nrf_drv_usbd_is_initialized());
+
+ app_usbd_class_inst_t const * * pp_last = &m_p_first_sof_interrupt_cinst;
+ while (NULL != (*pp_last))
+ {
+ if ((*pp_last) == p_cinst)
+ {
+ /* Breaking chain */
+ (*pp_last) = (app_usbd_class_data_access(p_cinst)->p_sof_next);
+ app_usbd_class_data_access(p_cinst)->p_sof_next = NULL;
+
+ return NRF_SUCCESS;
+ }
+ pp_last = &(app_usbd_class_data_access(*pp_last)->p_sof_next);
+ }
+ return NRF_ERROR_NOT_FOUND;
+}
+
+ret_code_t app_usbd_class_rwu_register(app_usbd_class_inst_t const * const p_inst)
+{
+ ASSERT(p_inst != NULL);
+ ++m_rwu_registered_counter;
+ /*Overflow check*/
+ ASSERT(m_rwu_registered_counter != 0);
+
+ return NRF_SUCCESS;
+}
+
+
+ret_code_t app_usbd_class_rwu_unregister(app_usbd_class_inst_t const * const p_inst)
+{
+ ASSERT(p_inst != NULL);
+ /* Usage validation. If counter is 0 unregister is not possible.*/
+ ASSERT(m_rwu_registered_counter != 0);
+ --m_rwu_registered_counter;
+
+ return NRF_SUCCESS;
+}
+
+bool app_usbd_class_rwu_enabled_check(void)
+{
+ return (m_rwu_registered_counter != 0);
+}
+
+ret_code_t app_usbd_interface_ep_reset(app_usbd_class_inst_t const * const p_cinst,
+ uint8_t iface)
+{
+ uint8_t iface_count = app_usbd_class_iface_count_get(p_cinst);
+
+ app_usbd_class_iface_conf_t const * p_iface = NULL;
+ for (uint8_t j = 0; j < iface_count; ++j)
+ {
+ p_iface = app_usbd_class_iface_get(p_cinst, j);
+ if (app_usbd_class_iface_number_get(p_iface) == iface)
+ {
+ break;
+ }
+ }
+
+ if (p_iface == NULL)
+ {
+ return NRF_ERROR_NOT_SUPPORTED;
+ }
+
+ uint8_t ep_count = app_usbd_class_iface_ep_count_get(p_iface);
+
+ for (uint8_t j = 0; j < ep_count; ++j)
+ {
+ /*Clear stall for every endpoint*/
+ app_usbd_class_ep_conf_t const * p_ep = app_usbd_class_iface_ep_get(p_iface, j);
+
+ if (!NRF_USBD_EPISO_CHECK(p_ep->address))
+ {
+ nrf_drv_usbd_ep_dtoggle_clear(p_ep->address);
+ nrf_drv_usbd_ep_stall_clear(p_ep->address);
+ }
+
+ }
+
+ return NRF_SUCCESS;
+}
+
+void app_usbd_ep_enable(nrf_drv_usbd_ep_t ep)
+{
+ if (!NRF_USBD_EPISO_CHECK(ep))
+ {
+ nrf_drv_usbd_ep_dtoggle_clear(ep);
+ nrf_drv_usbd_ep_stall_clear(ep);
+ }
+ nrf_drv_usbd_ep_enable(ep);
+}
+
+void app_usbd_ep_disable(nrf_drv_usbd_ep_t ep)
+{
+ nrf_drv_usbd_ep_disable(ep);
+}
+
+
+app_usbd_class_inst_t const * app_usbd_class_first_get(void)
+{
+ return m_p_first_cinst;
+}
+
+app_usbd_class_inst_t const * app_usbd_class_sof_first_get(void)
+{
+ return m_p_first_sof_cinst;
+}
+
+app_usbd_class_inst_t const * app_usbd_class_sof_interrupt_first_get(void)
+{
+ return m_p_first_sof_interrupt_cinst;
+}
+
+app_usbd_class_inst_t const * app_usbd_iface_find(uint8_t iface, uint8_t * p_iface_idx)
+{
+ app_usbd_class_inst_t const * p_inst = app_usbd_class_first_get();
+ while (p_inst != NULL)
+ {
+ uint8_t iface_count = app_usbd_class_iface_count_get(p_inst);
+ /* Iterate over interfaces */
+ for (uint8_t i = 0; i < iface_count; ++i)
+ {
+ app_usbd_class_iface_conf_t const * p_iface;
+ p_iface = app_usbd_class_iface_get(p_inst, i);
+ if (app_usbd_class_iface_number_get(p_iface) == iface)
+ {
+ if (p_iface_idx != NULL)
+ {
+ (*p_iface_idx) = i;
+ }
+ return p_inst;
+ }
+ }
+ p_inst = app_usbd_class_next_get(p_inst);
+ }
+ return NULL;
+}
+
+ret_code_t app_usbd_iface_call(
+ app_usbd_class_inst_t const * const p_class_inst,
+ uint8_t iface_idx,
+ app_usbd_complex_evt_t const * const p_event)
+{
+ UNUSED_PARAMETER(iface_idx);
+ return class_event_handler(p_class_inst, p_event);
+}
+
+ret_code_t app_usbd_ep_call(nrf_drv_usbd_ep_t ep, app_usbd_complex_evt_t const * const p_event)
+{
+ if (NRF_USBD_EP_VALIDATE(ep))
+ {
+ app_usbd_class_inst_t const * p_inst = app_usbd_ep_conf_access(ep)->p_cinst;
+ if (p_inst != NULL)
+ {
+ return class_event_handler(p_inst, p_event);
+ }
+ }
+ return NRF_ERROR_INVALID_ADDR;
+}
+
+void app_usbd_all_call(app_usbd_complex_evt_t const * const p_event)
+{
+ app_usbd_class_inst_t const * p_inst;
+ for (p_inst = app_usbd_class_first_get(); NULL != p_inst;
+ p_inst = app_usbd_class_next_get(p_inst))
+ {
+ UNUSED_RETURN_VALUE(class_event_handler(p_inst, p_event));
+ }
+}
+
+ret_code_t app_usbd_all_until_served_call(app_usbd_complex_evt_t const * const p_event)
+{
+ app_usbd_class_inst_t const * p_inst;
+ ret_code_t ret = NRF_ERROR_NOT_SUPPORTED;
+ /* Try to process via every instance */
+ for (p_inst = app_usbd_class_first_get(); NULL != p_inst;
+ p_inst = app_usbd_class_next_get(p_inst))
+ {
+
+ ret = class_event_handler(p_inst, p_event);
+ if (NRF_ERROR_NOT_SUPPORTED != ret)
+ {
+ /* Processing finished */
+ break;
+ }
+ }
+
+ return ret;
+}
+
+ret_code_t app_usbd_ep_transfer(
+ nrf_drv_usbd_ep_t ep,
+ nrf_drv_usbd_transfer_t const * const p_transfer)
+{
+ if (!nrf_drv_usbd_ep_enable_check(ep))
+ {
+ return NRF_ERROR_INVALID_STATE;
+ }
+ if (m_sustate != SUSTATE_ACTIVE)
+ {
+ return NRF_ERROR_INVALID_STATE;
+ }
+ return nrf_drv_usbd_ep_transfer(ep, p_transfer);
+}
+
+ret_code_t app_usbd_ep_handled_transfer(
+ nrf_drv_usbd_ep_t ep,
+ nrf_drv_usbd_handler_desc_t const * const p_handler)
+{
+ if (!nrf_drv_usbd_ep_enable_check(ep))
+ {
+ return NRF_ERROR_INVALID_STATE;
+ }
+ if (m_sustate != SUSTATE_ACTIVE)
+ {
+ return NRF_ERROR_INVALID_STATE;
+ }
+ return nrf_drv_usbd_ep_handled_transfer(ep, p_handler);
+}
+
+ret_code_t app_usbd_iface_select(
+ app_usbd_class_inst_t const * const p_inst,
+ uint8_t iface_idx,
+ uint8_t alternate)
+{
+ ret_code_t ret = NRF_ERROR_NOT_SUPPORTED;
+
+ if (p_inst->p_class_methods->iface_select != NULL)
+ {
+ ret = p_inst->p_class_methods->iface_select(p_inst, iface_idx, alternate);
+ }
+
+ if(ret == NRF_ERROR_NOT_SUPPORTED)
+ {
+ ret = default_iface_select(p_inst, iface_idx, alternate);
+ }
+ return ret;
+}
+
+void app_usbd_iface_deselect(
+ app_usbd_class_inst_t const * const p_inst,
+ uint8_t iface_idx)
+{
+ if (p_inst->p_class_methods->iface_deselect != NULL)
+ {
+ p_inst->p_class_methods->iface_deselect(p_inst, iface_idx);
+ }
+ default_iface_deselect(p_inst, iface_idx);
+}
+
+uint8_t app_usbd_iface_selection_get(
+ app_usbd_class_inst_t const * const p_inst,
+ uint8_t iface_idx)
+{
+ uint8_t alt = 0;
+ if (p_inst->p_class_methods->iface_selection_get != NULL)
+ {
+ alt = p_inst->p_class_methods->iface_selection_get(p_inst, iface_idx);
+ }
+ return alt;
+}
+
+void app_usbd_all_iface_select_0(void)
+{
+ app_usbd_class_inst_t const * p_inst = app_usbd_class_first_get();
+ while (p_inst != NULL)
+ {
+ uint8_t iface_count = app_usbd_class_iface_count_get(p_inst);
+ for (uint8_t i = 0; i < iface_count; ++i)
+ {
+ ret_code_t ret;
+ ret = app_usbd_iface_select(p_inst, i, 0);
+ ASSERT(ret == NRF_SUCCESS);
+ UNUSED_VARIABLE(ret);
+ }
+ p_inst = app_usbd_class_next_get(p_inst);
+ }
+}
+
+void app_usbd_all_iface_deselect(void)
+{
+ app_usbd_class_inst_t const * p_inst = app_usbd_class_first_get();
+ while (p_inst != NULL)
+ {
+ uint8_t iface_count = app_usbd_class_iface_count_get(p_inst);
+ for (uint8_t i = 0; i < iface_count; ++i)
+ {
+ app_usbd_iface_deselect(p_inst, i);
+ }
+ p_inst = app_usbd_class_next_get(p_inst);
+ }
+}
+
+#endif //NRF_MODULE_ENABLED(APP_USBD)
diff --git a/third_party/NordicSemiconductor/libraries/usb/app_usbd.h b/third_party/NordicSemiconductor/libraries/usb/app_usbd.h
index 3913373..c5369fc 100644
--- a/third_party/NordicSemiconductor/libraries/usb/app_usbd.h
+++ b/third_party/NordicSemiconductor/libraries/usb/app_usbd.h
@@ -1,816 +1,816 @@
-/**
- * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#ifndef APP_USBD_H__
-#define APP_USBD_H__
-
-#include "nrf_drv_usbd.h"
-#include "app_usbd_types.h"
-#include "app_usbd_class_base.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @defgroup app_usbd USB Device high level library
- * @ingroup app_common
- *
- * @brief @tagAPI52840 Module for easy support for any USB device configuration.
- *
- * This module manages class instances that would create the USB device,
- * manages endpoints and interfaces transactions.
- * @{
- */
-
-/**
- * @brief Highest value of Frame Number in SOF packets.
- */
-#define APP_USBD_SOF_MAX 2047
-
-/**
- * @brief True if SOF timestamping is really provided.
- *
- * SOF timestamping is really provided if it was requested and if the logger is enabled.
- */
-#if ((APP_USBD_CONFIG_SOF_TIMESTAMP_PROVIDE) && (NRF_LOG_ENABLED))
-#define APP_USBD_PROVIDE_SOF_TIMESTAMP 1
-#else
-#define APP_USBD_PROVIDE_SOF_TIMESTAMP 0
-#endif
-
-/**
- * @brief SOF event handling modes.
- */
-#define APP_USBD_SOF_HANDLING_NORMAL_QUEUE 0 //!< Push SOF events into event queue.
-#define APP_USBD_SOF_HANDLING_COMPRESS_QUEUE 1 //!< Compress SOF events.
-#define APP_USBD_SOF_HANDLING_INTERRUPT 2 //!< Handle SOF events in interrupt.
-
-/**
- * @brief Configuration passed to @ref app_usbd_init.
- */
-typedef struct {
-#if (!(APP_USBD_CONFIG_EVENT_QUEUE_ENABLE)) || defined(__SDK_DOXYGEN__)
- /**
- * @brief User defined event handler.
- *
- * This function is called on every event from the interrupt.
- * It is prepared for external user function that would queue events to be processed
- * from the main context.
- * It should be used with operating systems with its own implementation of the queue.
- *
- * @param p_event The event structure pointer.
- *
- * @note This field is available only when USB internal queue is disabled
- * (see @ref APP_USBD_CONFIG_EVENT_QUEUE_ENABLE).
- */
- void (*ev_handler)(app_usbd_internal_evt_t const * const p_event);
-#endif
-
-#if (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE) || defined(__SDK_DOXYGEN__)
- /**
- * @brief User defined event handler.
- *
- * This function is called on every event from the interrupt.
- *
- * @param p_event The event structure pointer.
- * @param queued The event is visible in the queue.
- * If queue conflict is detected the event might not be accessible inside queue
- * until all write operations finish.
- * See @ref nrf_atfifo for more details.
- *
- * @note This field is available only when USBD internal queue is configured
- * (see @ref APP_USBD_CONFIG_EVENT_QUEUE_ENABLE).
- *
- * @note If is set to NULL no event would be called from interrupt.
- * @note This function is called before event is processed.
- * It means that if the event type is @ref APP_USBD_EVT_DRV_SETUP,
- * there would not be setup field present in the event structure.
- */
- void (*ev_isr_handler)(app_usbd_internal_evt_t const * const p_event, bool queued);
-#endif
-
- /**
- * @brief User defined event processor
- *
- * This function is called while state event is processed.
- *
- * * @note This field is available only when USBD internal queue is configured
- * (see @ref APP_USBD_CONFIG_EVENT_QUEUE_ENABLE).
- *
- * @param event Event type.
- * Only following events are sent into this function:
- * - APP_USBD_EVT_DRV_SOF
- * - APP_USBD_EVT_DRV_RESET - Note that it also exits suspend
- * - APP_USBD_EVT_DRV_SUSPEND
- * - APP_USBD_EVT_DRV_RESUME - It is also generated when remote wakeup is generated
- * - APP_USBD_EVT_START
- * - APP_USBD_EVT_STOP
- * - APP_USBD_EVT_STATE_CHANGED
- * - APP_USBD_EVT_POWER_DETECTED
- * - APP_USBD_EVT_POWER_REMOVED
- * - APP_USBD_EVT_POWER_READY
- */
- void (*ev_state_proc)(app_usbd_event_type_t event);
-
- /**
- * @brief SOF processing required by the user event processing.
- *
- * This flag would enable SOF processing for the user events regardless of the fact if any
- * of the implemented class requires SOF event.
- *
- * @note SOF event would be enabled anyway if any of the appended class requires SOF processing.
- */
- bool enable_sof;
-} app_usbd_config_t;
-
-
-#if (APP_USBD_PROVIDE_SOF_TIMESTAMP) || defined(__SDK_DOXYGEN__)
-/**
- * @brief Timestamp function for the logger.
- *
- * @return Current frame number taken directly from the last processed SOF.
- */
-uint32_t app_usbd_sof_timestamp_get(void);
-#endif
-
-/**
- * @brief USB library initialization.
- *
- * Call this function before any configuration or class attachment.
- * USBD peripheral would be ready to accept commands, and library would be ready,
- * but it would not be connected to the bus.
- * Call @ref app_usbd_enable to enable USBD communication with the host.
- *
- * @param p_config Configuration. NULL pointer might be passed here and default
- * configuration will be applied then.
- */
-ret_code_t app_usbd_init(app_usbd_config_t const * p_config);
-
-/**
- * @brief USB library un-initialization.
- *
- * @note Currently not supported.
- */
-ret_code_t app_usbd_uninit(void);
-
-#if (APP_USBD_CONFIG_POWER_EVENTS_PROCESS) || defined(__SDK_DOXYGEN__)
-/**
- * @brief Function to start USB related power events processing.
- *
- * This function should be called after @ref app_usbd_init and after all the
- * required classes were appended (@ref app_usbd_class_append).
- *
- * @retval NRF_SUCCESS Power events successfully initialized.
- * @retval NRF_ERROR_INVALID_STATE The state of the driver does not allow to enable
- * the power events processing.
- */
-ret_code_t app_usbd_power_events_enable(void);
-#endif
-
-/**
- * @brief Enable USBD.
- *
- * USBD is enabled.
- * Since now the high frequency clock may be requested when USB RESET would be detected.
- */
-void app_usbd_enable(void);
-
-/**
- * @brief Disable USBD.
- *
- * Disabled USDB peripheral cannot be accessed but also stops requesting
- * High Frequency clock and releases power regulator.
- *
- * @note This function cannot be called when USB is started. Stop it first.
- */
-void app_usbd_disable(void);
-
-/**
- * @brief Request USBD to start.
- *
- * The function sends start request to the event queue.
- * If the queue is enabled (@ref APP_USBD_CONFIG_EVENT_QUEUE_ENABLE) it would be processed
- * when the queue is processed.
- * If queue is disabled it would be processed immediately inside this function.
- * It means that if queue is disabled this function cannot be called from interrupt with priority
- * higher than USB interrupt.
- *
- * When start is processed it would:
- * 1. Start library.
- * 2. Enable interrupts.
- * 3. Enable USB pull-ups.
- *
- * @note
- * In some specific circumstances the library can be left not started and this function would
- * silently exit.
- * This may happen if some glitches appears on USB power line or if the plug was disconnected before
- * whole starting process finishes.
- * User would get the event from POWER peripheral then.
- * Also no @ref APP_USBD_EVT_STARTED event would be generated to the classes and user event handler.
- * For the safe code it is recommended to wait for @ref APP_USBD_EVT_STARTED event if anything
- * has to be initialized after USB driver is started (just before enabling the interrupts).
- * If library is properly started the @ref APP_USBD_EVT_STARTED event passed to the user handler
- * from this function body.
- */
-void app_usbd_start(void);
-
-/**
- * @brief Stop USB.
- *
- * The function sends stop request to the event queue.
- * If the queue is enabled (@ref APP_USBD_CONFIG_EVENT_QUEUE_ENABLE) it would be processed
- * when the queue is processed.
- * If queue is disabled it would be processed immediately inside this function.
- * It means that if queue is disabled this function cannot be called from interrupt with priority
- * higher than USB interrupt.
- *
- * When the event is processed interrupts and USB pull-ups are disabled.
- * The peripheral itself is left enabled so it can be programmed,
- * but a HOST sees it as a peripheral disconnection.
- *
- * @note
- * If the library is not started when this function is called it exits silently - also
- * no @ref APP_USBD_EVT_STOPPED is generated.
- */
-void app_usbd_stop(void);
-
-/**
- * @brief Request library to suspend.
- *
- * This function send suspend request to the event queue.
- *
- * @note This function should only be called after @ref APP_USBD_EVT_DRV_SUSPEND os received.
- * Internal suspend request processing would give no effect if the bus is not in suspend state.
- */
-void app_usbd_suspend_req(void);
-
-/**
- * @brief Request library to wake-up.
- *
- * This function send wakeup request to the event queue.
- *
- * @note Calling this function does not mean that peripheral is active - the wakeup request is sent
- * into message queue and needs to be processed.
- *
- * @retval true Wakeup generation has been started.
- * @retval false No wakeup would be generated becouse it is disabled by the host.
- */
-bool app_usbd_wakeup_req(void);
-
-/**
- * @brief Get information whether there is an active connection.
- *
- * Function to check if the communication with the bus is possible.
- *
- * @retval true The bus is active.
- * @retval false There is no connection or bus is suspended.
- */
-bool app_usbd_active_check(void);
-
-/**
- * @brief USBD event processor.
- *
- * Function to be called on each event to be processed by the library.
- */
-void app_usbd_event_execute(app_usbd_internal_evt_t const * const p_event);
-
-
-#if (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE) || defined(__SDK_DOXYGEN__)
-/**
- * @brief Function that process events from the queue.
- *
- * @note This function calls @ref app_usbd_event_execute internally.
- *
- * @retval true Event was processed.
- * @retval false The event queue is empty.
- */
-bool app_usbd_event_queue_process(void);
-#endif
-
-/**
- * @brief Add class instance.
- *
- * This function connects given instance into internal class instance chain and
- * into all required endpoints.
- * The instance event handler would be connected into endpoint by default,
- * but this can be overwritten by @ref app_usbd_ep_handler_set.
- *
- * After successful attachment @ref APP_USBD_EVT_INST_APPEND would be passed to class instance.
- *
- * @note This function can only be called after USBD library is initialized but still disabled.
- * Assertion would be generated otherwise.
- *
- * @param[in,out] p_cinst Instance to connect. Chain data would be written into writable instance data.
- *
- * @retval NRF_SUCCESS Instance successfully added.
- * @retval NRF_ERROR_BUSY Endpoint(s) not available.
- */
-ret_code_t app_usbd_class_append(app_usbd_class_inst_t const * p_cinst);
-
-/**
- * @brief Remove class instance.
- *
- * Instance is removed from instance chain.
- * Instance and event handlers are removed also from endpoints.
- * Endpoints used by by the class instance are left disabled.
- *
- * @note This function can only be called after USBD library is initialized but still disabled.
- * Assertion would be generated otherwise.
- *
- * @param p_cinst Instance pointer to remove.
- *
- * @retval NRF_SUCCESS Instance successfully removed.
- * @retval NRF_ERROR_NOT_FOUND Instance not found in the instance chain.
- */
-ret_code_t app_usbd_class_remove(app_usbd_class_inst_t const * p_cinst);
-
-/**
- * @brief Remove all class instances.
- *
- * This function basically calls @ref app_usbd_class_remove
- * on instances chain as long as there is any element left.
- *
- * @note This function can only be called after USBD library is initialized but still disabled.
- * Assertion would be generated otherwise.
- *
- * @sa app_usbd_class_remove
- *
- * @return Is should always return @ref NRF_SUCCESS.
- * Any error value returned would mean there is an error inside the library.
- */
-ret_code_t app_usbd_class_remove_all(void);
-
-/**
- * @brief Change endpoint handler.
- *
- * This function may be called for the endpoint only if the class instance is
- * already properly attached by the @ref app_usbd_class_append function.
- *
- * The endpoint event handler function can be only overwritten by the class instance
- * that was connected into the endpoint.
- *
- * @note This function can only be called after USBD library is initialized but still disabled.
- * Assertion would be generated otherwise.
- *
- * @param[in] p_cinst Instance of a class that wish to set new event handler.
- * It has to match currently configured instance for the selected endpoint.
- * In other situation error would be returned.
- * @param[in] ep Endpoint address to configure.
- * @param[in] handler Event handler function to set.
- *
- * @retval NRF_SUCCESS New handler successfully set
- * @retval NRF_ERROR_INVALID_PARAM p_cinst is not the same as currently set for the endpoint
- */
-ret_code_t app_usbd_ep_handler_set(app_usbd_class_inst_t const * p_cinst,
- nrf_drv_usbd_ep_t ep,
- app_usbd_ep_event_handler_t handler);
-
-/**
- * @brief Register class instance as the one that requires SOF events.
- *
- * This function should be called in reaction on APP_USBD_EVT_INST_APPEND event.
- * Connect the class instance to the list of instances that requires SOF processing.
- * If none of the appended instances requires SOF event - it is disabled.
- *
- * @param p_cinst Instance that requires SOF event.
- *
- * @retval NRF_SUCCESS Instance linked into SOF processing list.
- *
- * @sa app_usbd_class_sof_unregister
- */
-ret_code_t app_usbd_class_sof_register(app_usbd_class_inst_t const * p_cinst);
-
-/**
- * @brief Unregister class instance from SOF processing instances list.
- *
- * Every class that calls @ref app_usbd_class_sof_register have to call also unregistering function
- * in reaction to @ref APP_USBD_EVT_INST_REMOVE event.
- *
- * @param p_cinst Instance to be unregistered from SOF event processing list.
- *
- * @retval NRF_SUCCESS Instance linked into SOF processing list.
- * @retval NRF_ERROR_NOT_FOUND Instance not found in the SOF processing list.
- *
- * @sa app_usbd_class_sof_register
- */
-ret_code_t app_usbd_class_sof_unregister(app_usbd_class_inst_t const * p_cinst);
-
-/**
- * @brief Register class instance as the one that requires SOF events in interrupt.
- *
- * This function should be called in reaction on APP_USBD_EVT_INST_APPEND event.
- * Connect the class instance to the list of instances that requires SOF processing.
- * If none of the appended instances requires SOF event - it is disabled.
- *
- * @param p_cinst Instance that requires SOF event.
- * @param handler Handler to SOF event
- *
- * @retval NRF_SUCCESS Instance linked into SOF processing list.
- *
- * @sa app_usbd_class_sof_interrupt_unregister
- */
-ret_code_t app_usbd_class_sof_interrupt_register(app_usbd_class_inst_t const * p_cinst,
- app_usbd_sof_interrupt_handler_t handler);
-
-/**
- * @brief Unregister class instance from SOF processing in interrupt instances list.
- *
- * Every class that calls @ref app_usbd_class_sof_interrupt_register have to call
- * also unregistering function in reaction to @ref APP_USBD_EVT_INST_REMOVE event.
- *
- * @param p_cinst Instance to be unregistered from SOF processing in interrupt list.
- *
- * @retval NRF_SUCCESS Instance linked into SOF processing in interrupt list.
- * @retval NRF_ERROR_NOT_FOUND Instance not found in the SOF processing in interrupt list.
- *
- * @sa app_usbd_class_sof_interrupt_register
- */
-ret_code_t app_usbd_class_sof_interrupt_unregister(app_usbd_class_inst_t const * p_cinst);
-
-
-/**
- * @brief Register class on remote wake-up feature.
- *
- * @param[in] p_inst Instance of the class.
- *
- * @retval NRF_SUCCESS Instance that requires remote wake-up registered.
- */
-ret_code_t app_usbd_class_rwu_register(app_usbd_class_inst_t const * const p_inst);
-
-/**
- * @brief Unregister class from remote wake-up feature.
- *
- * @param[in] p_inst Instance of the class.
- *
- * @retval NRF_SUCCESS Instance that requires remote wake-up removed.
- */
-ret_code_t app_usbd_class_rwu_unregister(app_usbd_class_inst_t const * const p_inst);
-
-/**
- * @brief Check if there is any class with remote wakeup.
- *
- * The function checks internal registered class with remote wakeup counter.
- *
- * @sa app_usbd_class_rwu_register, app_usbd_class_rwu_unregister
- *
- * @retval true The remote wakeup functionality is required by some class instance.
- * @retval false There is no class instance that requires wakeup functionality.
- */
-bool app_usbd_class_rwu_enabled_check(void);
-
-/**
- * @brief Find a specified descriptor.
- *
- * @param[in] p_cinst Class instance.
- * @param[in] desc_type Descriptor type @ref app_usbd_descriptor_t
- * @param[in] desc_index Descriptor index.
- * @param[out] p_desc Pointer to escriptor.
- * @param[out] p_desc_len Length of descriptor.
- *
- * @return Standard error code @ref ret_code_t
- * @retval NRF_SUCCESS Descriptor successfully found.
- * @retval NRF_ERROR_NOT_FOUND Descriptor not found.
- * */
-ret_code_t app_usbd_class_descriptor_find(app_usbd_class_inst_t const * const p_cinst,
- uint8_t desc_type,
- uint8_t desc_index,
- uint8_t * p_desc,
- size_t * p_desc_len);
-
-/**
- * @brief Standard set interface request handle.
- *
- * This function should be called when processing SET_INTERFACE request.
- *
- * @param[in] p_cinst Instance of a class.
- * @param[in] iface Interface number.
- *
- * @return Standard error code.
- *
- * @note Selected interface to reset has to be part of given class.
- * */
-ret_code_t app_usbd_interface_ep_reset(app_usbd_class_inst_t const * const p_cinst,
- uint8_t iface);
-
-
-/**
- * @brief Enable selected endpoint.
- *
- * Selected endpoint is enabled and cleared.
- *
- * @param ep Endpoint number.
- */
-void app_usbd_ep_enable(nrf_drv_usbd_ep_t ep);
-
-/**
- * @brief Disable selected endpoint.
- *
- * @param ep Endpoint number.
- */
-void app_usbd_ep_disable(nrf_drv_usbd_ep_t ep);
-
-/**
- * @name Iterate through classes lists
- *
- * Functions that helps to iterate through internally chained classes.
- * @{
- */
- /**
- * @brief Get first class instance in the list.
- *
- * Get first instance from the list of active class instances.
- * That instance may be used then in @ref app_usbd_class_next_get function.
- *
- * @return First instance in the list or NULL if there are no instances available.
- */
- app_usbd_class_inst_t const * app_usbd_class_first_get(void);
-
- /**
- * @brief Get next instance in the list.
- *
- * Get the next instance from the list of active instances.
- * Used to iterate through all instances.
- *
- * @param[in] p_cinst The current instance from with next one is required.
- *
- * @return Next instance to the given one or NULL if there is no more instances in the list.
- */
- static inline app_usbd_class_inst_t const * app_usbd_class_next_get(
- app_usbd_class_inst_t const * const p_cinst)
- {
- ASSERT(NULL != p_cinst);
- return app_usbd_class_data_access(p_cinst)->p_next;
- }
-
- /**
- * @brief Get first instance in SOF list.
- *
- * Start iteration through the list of instances that require SOF event processing.
- *
- * @return First instance in the list or NULL if the list is empty.
- *
- * @sa app_usbd_class_first_get
- */
- app_usbd_class_inst_t const * app_usbd_class_sof_first_get(void);
-
- /**
- * @brief Get next instance in the SOF list.
- *
- * Get the next instance from the list of instances requiring SOF event processing.
- * Used to iterate through all SOF instances.
- *
- * @param p_cinst The current instance from with next one is required.
- *
- * @return Next instance to the given one or NULL if there is no more instances in the list.
- */
- static inline app_usbd_class_inst_t const * app_usbd_class_sof_next_get(
- app_usbd_class_inst_t const * const p_cinst)
- {
- ASSERT(NULL != p_cinst);
- return app_usbd_class_data_access(p_cinst)->p_sof_next;
- }
-
- /**
- * @brief Get first instance in SOF interrupt list.
- *
- * Start iteration through the list of instances that require SOF processing in interrupt.
- *
- * @return First instance in the list or NULL if the list is empty.
- *
- * @sa app_usbd_class_first_get
- */
- app_usbd_class_inst_t const * app_usbd_class_sof_interrupt_first_get(void);
-
- /**
- * @brief Get next instance in the SOF interrupt list.
- *
- * Get the next instance from the list of instances requiring SOF processing in interrupt.
- * Used to iterate through all SOF instances that have SOF handlers.
- *
- * @param p_cinst The current instance from with next one is required.
- *
- * @return Next instance to the given one or NULL if there is no more instances in the list.
- */
- static inline app_usbd_class_inst_t const * app_usbd_class_sof_interrupt_next_get(
- app_usbd_class_inst_t const * const p_cinst)
- {
- ASSERT(NULL != p_cinst);
- return app_usbd_class_data_access(p_cinst)->p_sof_next;
- }
-/** @} */
-
-/**
- * @brief Search for selected interface.
- *
- * Function searches for the given interface number and returns the class that contains it.
- * Optionally it can return interface index inside class instance.
- *
- * @param[in] iface Interface number.
- * @param[out] p_iface_idx Pointer to a variable that would hold interface index inside returned
- * class instance.
- *
- * @return Pointer to the class structure that cointain given interface or NULL if not found.
- */
-app_usbd_class_inst_t const * app_usbd_iface_find(uint8_t iface, uint8_t * p_iface_idx);
-
-
-/**
- * @name Communicate with interfaces, endpoints and instances inside usbd library
- *
- * @{
- */
-
- /**
- * @brief Call interface event handler.
- *
- * Call event handler for selected interface.
- * @param[in,out] p_class_inst Class instance that holds selected interface.
- * @param[in] iface_idx Index of the interface in class structure.
- * @param[in] p_event Event structure to be processed.
- *
- * @return Operation status.
- */
- ret_code_t app_usbd_iface_call(
- app_usbd_class_inst_t const * const p_class_inst,
- uint8_t iface_idx,
- app_usbd_complex_evt_t const * const p_event);
-
- /**
- * @brief Call endpoint event handler.
- *
- * Call event handler for the selected endpoint.
- * @param[in] ep Endpoint number.
- * @param[in] p_event Event structure to send.
- *
- * @return Operation status.
- */
- ret_code_t app_usbd_ep_call(nrf_drv_usbd_ep_t ep, app_usbd_complex_evt_t const * const p_event);
-
- /**
- * @brief Auxiliary function that process event by every instance in the list.
- *
- * This function ignores the result of called handler.
- *
- * @param p_event Event to pass to every instance.
- */
- void app_usbd_all_call(app_usbd_complex_evt_t const * const p_event);
-
- /**
- * @brief Call interface event handlers and stop when served.
- *
- * Call event handlers from instances as long as we get result different than @ref NRF_ERROR_NOT_SUPPORTED
- * @param[in] p_event Event structure to send.
- *
- * @return Operation status or @ref NRF_ERROR_NOT_SUPPORTED if none of instances in the list can support given event.
- */
- ret_code_t app_usbd_all_until_served_call(app_usbd_complex_evt_t const * const p_event);
-/** @} */
-
-/**
- * @brief Endpoint transfer.
- *
- * @param ep Endpoint number.
- * @param p_transfer Description of the transfer to be performed.
- * The direction of the transfer is determined by the
- * endpoint number.
- *
- * @retval NRF_ERROR_INVALID_STATE The state of the USB device does not allow
- * data transfer on the endpoint.
- * @return Values returned by @ref nrf_drv_usbd_ep_transfer.
- *
- * @sa app_usbd_ep_handled_transfer
- */
-ret_code_t app_usbd_ep_transfer(
- nrf_drv_usbd_ep_t ep,
- nrf_drv_usbd_transfer_t const * const p_transfer);
-
-/**
- * @brief Set up an endpoint handled transfer.
- *
- * Configures a transfer handled by the feedback function.
- *
- * @param ep Endpoint number.
- * @param p_handler Function called when the next chunk of data is requested.
- *
- * @retval NRF_ERROR_INVALID_STATE The state of the USB device does not allow
- * data transfer on the endpoint.
- * @return Values returned by @ref nrf_drv_usbd_ep_handled_transfer.
- */
-ret_code_t app_usbd_ep_handled_transfer(
- nrf_drv_usbd_ep_t ep,
- nrf_drv_usbd_handler_desc_t const * const p_handler);
-
-
-/**
- * @brief Select interface
- *
- * Select the given interface.
- * This function calls class interface selection function or default
- * interface selection function.
- *
- * After calling this function interface should be functional.
- *
- * @param[in,out] p_inst Instance of the class.
- * @param[in] iface_idx Index of the interface inside class structure.
- * @param[in] alternate Alternate setting that should be selected.
- *
- * @return Standard error code.
- */
-ret_code_t app_usbd_iface_select(
- app_usbd_class_inst_t const * const p_inst,
- uint8_t iface_idx,
- uint8_t alternate);
-
-
-/**
- * @brief Deselect interface.
- *
- * Disable the given interface.
- * This function calls class interface deselection function or
- * default interface selection function.
- *
- * After calling this function all the endpoints from the interface
- * have to be disabled.
- *
- * @param[in,out] p_inst Instance of the class.
- * @param[in] iface_idx Index of the interface inside class structure.
- */
-void app_usbd_iface_deselect(
- app_usbd_class_inst_t const * const p_inst,
- uint8_t iface_idx);
-
-/**
- * @brief Get selected interface.
- *
- * Function retieves currently selected interface.
- * If the class contains @ref app_usbd_class_methods_t::iface_selection_get it is called.
- * It it does not contain this function this function would return default, 0 value.
- *
- * @param[in] p_inst Instance of the class.
- * @param[in] iface_idx Index of the interface inside class structure.
- *
- * @return Selected alternate interface setting.
- */
-uint8_t app_usbd_iface_selection_get(
- app_usbd_class_inst_t const * const p_inst,
- uint8_t iface_idx);
-
-/**
- * @brief Select alternate configuration 0 for all interfaces.
- *
- * Auxiliary function that clears settings for all interfaces leaving them enabled.
- */
-void app_usbd_all_iface_select_0(void);
-
-/**
- * @brief Deselect all interfaces.
- *
- * Auxiliary function to disable all interfaces.
- */
-void app_usbd_all_iface_deselect(void);
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* APP_USBD_H__ */
+/**
+ * Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef APP_USBD_H__
+#define APP_USBD_H__
+
+#include "nrf_drv_usbd.h"
+#include "app_usbd_types.h"
+#include "app_usbd_class_base.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup app_usbd USB Device high level library
+ * @ingroup app_common
+ *
+ * @brief @tagAPI52840 Module for easy support for any USB device configuration.
+ *
+ * This module manages class instances that would create the USB device,
+ * manages endpoints and interfaces transactions.
+ * @{
+ */
+
+/**
+ * @brief Highest value of Frame Number in SOF packets.
+ */
+#define APP_USBD_SOF_MAX 2047
+
+/**
+ * @brief True if SOF timestamping is really provided.
+ *
+ * SOF timestamping is really provided if it was requested and if the logger is enabled.
+ */
+#if ((APP_USBD_CONFIG_SOF_TIMESTAMP_PROVIDE) && (NRF_LOG_ENABLED))
+#define APP_USBD_PROVIDE_SOF_TIMESTAMP 1
+#else
+#define APP_USBD_PROVIDE_SOF_TIMESTAMP 0
+#endif
+
+/**
+ * @brief SOF event handling modes.
+ */
+#define APP_USBD_SOF_HANDLING_NORMAL_QUEUE 0 //!< Push SOF events into event queue.
+#define APP_USBD_SOF_HANDLING_COMPRESS_QUEUE 1 //!< Compress SOF events.
+#define APP_USBD_SOF_HANDLING_INTERRUPT 2 //!< Handle SOF events in interrupt.
+
+/**
+ * @brief Configuration passed to @ref app_usbd_init.
+ */
+typedef struct {
+#if (!(APP_USBD_CONFIG_EVENT_QUEUE_ENABLE)) || defined(__SDK_DOXYGEN__)
+ /**
+ * @brief User defined event handler.
+ *
+ * This function is called on every event from the interrupt.
+ * It is prepared for external user function that would queue events to be processed
+ * from the main context.
+ * It should be used with operating systems with its own implementation of the queue.
+ *
+ * @param p_event The event structure pointer.
+ *
+ * @note This field is available only when USB internal queue is disabled
+ * (see @ref APP_USBD_CONFIG_EVENT_QUEUE_ENABLE).
+ */
+ void (*ev_handler)(app_usbd_internal_evt_t const * const p_event);
+#endif
+
+#if (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE) || defined(__SDK_DOXYGEN__)
+ /**
+ * @brief User defined event handler.
+ *
+ * This function is called on every event from the interrupt.
+ *
+ * @param p_event The event structure pointer.
+ * @param queued The event is visible in the queue.
+ * If queue conflict is detected the event might not be accessible inside queue
+ * until all write operations finish.
+ * See @ref nrf_atfifo for more details.
+ *
+ * @note This field is available only when USBD internal queue is configured
+ * (see @ref APP_USBD_CONFIG_EVENT_QUEUE_ENABLE).
+ *
+ * @note If is set to NULL no event would be called from interrupt.
+ * @note This function is called before event is processed.
+ * It means that if the event type is @ref APP_USBD_EVT_DRV_SETUP,
+ * there would not be setup field present in the event structure.
+ */
+ void (*ev_isr_handler)(app_usbd_internal_evt_t const * const p_event, bool queued);
+#endif
+
+ /**
+ * @brief User defined event processor
+ *
+ * This function is called while state event is processed.
+ *
+ * * @note This field is available only when USBD internal queue is configured
+ * (see @ref APP_USBD_CONFIG_EVENT_QUEUE_ENABLE).
+ *
+ * @param event Event type.
+ * Only following events are sent into this function:
+ * - APP_USBD_EVT_DRV_SOF
+ * - APP_USBD_EVT_DRV_RESET - Note that it also exits suspend
+ * - APP_USBD_EVT_DRV_SUSPEND
+ * - APP_USBD_EVT_DRV_RESUME - It is also generated when remote wakeup is generated
+ * - APP_USBD_EVT_START
+ * - APP_USBD_EVT_STOP
+ * - APP_USBD_EVT_STATE_CHANGED
+ * - APP_USBD_EVT_POWER_DETECTED
+ * - APP_USBD_EVT_POWER_REMOVED
+ * - APP_USBD_EVT_POWER_READY
+ */
+ void (*ev_state_proc)(app_usbd_event_type_t event);
+
+ /**
+ * @brief SOF processing required by the user event processing.
+ *
+ * This flag would enable SOF processing for the user events regardless of the fact if any
+ * of the implemented class requires SOF event.
+ *
+ * @note SOF event would be enabled anyway if any of the appended class requires SOF processing.
+ */
+ bool enable_sof;
+} app_usbd_config_t;
+
+
+#if (APP_USBD_PROVIDE_SOF_TIMESTAMP) || defined(__SDK_DOXYGEN__)
+/**
+ * @brief Timestamp function for the logger.
+ *
+ * @return Current frame number taken directly from the last processed SOF.
+ */
+uint32_t app_usbd_sof_timestamp_get(void);
+#endif
+
+/**
+ * @brief USB library initialization.
+ *
+ * Call this function before any configuration or class attachment.
+ * USBD peripheral would be ready to accept commands, and library would be ready,
+ * but it would not be connected to the bus.
+ * Call @ref app_usbd_enable to enable USBD communication with the host.
+ *
+ * @param p_config Configuration. NULL pointer might be passed here and default
+ * configuration will be applied then.
+ */
+ret_code_t app_usbd_init(app_usbd_config_t const * p_config);
+
+/**
+ * @brief USB library un-initialization.
+ *
+ * @note Currently not supported.
+ */
+ret_code_t app_usbd_uninit(void);
+
+#if (APP_USBD_CONFIG_POWER_EVENTS_PROCESS) || defined(__SDK_DOXYGEN__)
+/**
+ * @brief Function to start USB related power events processing.
+ *
+ * This function should be called after @ref app_usbd_init and after all the
+ * required classes were appended (@ref app_usbd_class_append).
+ *
+ * @retval NRF_SUCCESS Power events successfully initialized.
+ * @retval NRF_ERROR_INVALID_STATE The state of the driver does not allow to enable
+ * the power events processing.
+ */
+ret_code_t app_usbd_power_events_enable(void);
+#endif
+
+/**
+ * @brief Enable USBD.
+ *
+ * USBD is enabled.
+ * Since now the high frequency clock may be requested when USB RESET would be detected.
+ */
+void app_usbd_enable(void);
+
+/**
+ * @brief Disable USBD.
+ *
+ * Disabled USDB peripheral cannot be accessed but also stops requesting
+ * High Frequency clock and releases power regulator.
+ *
+ * @note This function cannot be called when USB is started. Stop it first.
+ */
+void app_usbd_disable(void);
+
+/**
+ * @brief Request USBD to start.
+ *
+ * The function sends start request to the event queue.
+ * If the queue is enabled (@ref APP_USBD_CONFIG_EVENT_QUEUE_ENABLE) it would be processed
+ * when the queue is processed.
+ * If queue is disabled it would be processed immediately inside this function.
+ * It means that if queue is disabled this function cannot be called from interrupt with priority
+ * higher than USB interrupt.
+ *
+ * When start is processed it would:
+ * 1. Start library.
+ * 2. Enable interrupts.
+ * 3. Enable USB pull-ups.
+ *
+ * @note
+ * In some specific circumstances the library can be left not started and this function would
+ * silently exit.
+ * This may happen if some glitches appears on USB power line or if the plug was disconnected before
+ * whole starting process finishes.
+ * User would get the event from POWER peripheral then.
+ * Also no @ref APP_USBD_EVT_STARTED event would be generated to the classes and user event handler.
+ * For the safe code it is recommended to wait for @ref APP_USBD_EVT_STARTED event if anything
+ * has to be initialized after USB driver is started (just before enabling the interrupts).
+ * If library is properly started the @ref APP_USBD_EVT_STARTED event passed to the user handler
+ * from this function body.
+ */
+void app_usbd_start(void);
+
+/**
+ * @brief Stop USB.
+ *
+ * The function sends stop request to the event queue.
+ * If the queue is enabled (@ref APP_USBD_CONFIG_EVENT_QUEUE_ENABLE) it would be processed
+ * when the queue is processed.
+ * If queue is disabled it would be processed immediately inside this function.
+ * It means that if queue is disabled this function cannot be called from interrupt with priority
+ * higher than USB interrupt.
+ *
+ * When the event is processed interrupts and USB pull-ups are disabled.
+ * The peripheral itself is left enabled so it can be programmed,
+ * but a HOST sees it as a peripheral disconnection.
+ *
+ * @note
+ * If the library is not started when this function is called it exits silently - also
+ * no @ref APP_USBD_EVT_STOPPED is generated.
+ */
+void app_usbd_stop(void);
+
+/**
+ * @brief Request library to suspend.
+ *
+ * This function send suspend request to the event queue.
+ *
+ * @note This function should only be called after @ref APP_USBD_EVT_DRV_SUSPEND os received.
+ * Internal suspend request processing would give no effect if the bus is not in suspend state.
+ */
+void app_usbd_suspend_req(void);
+
+/**
+ * @brief Request library to wake-up.
+ *
+ * This function send wakeup request to the event queue.
+ *
+ * @note Calling this function does not mean that peripheral is active - the wakeup request is sent
+ * into message queue and needs to be processed.
+ *
+ * @retval true Wakeup generation has been started.
+ * @retval false No wakeup would be generated becouse it is disabled by the host.
+ */
+bool app_usbd_wakeup_req(void);
+
+/**
+ * @brief Get information whether there is an active connection.
+ *
+ * Function to check if the communication with the bus is possible.
+ *
+ * @retval true The bus is active.
+ * @retval false There is no connection or bus is suspended.
+ */
+bool app_usbd_active_check(void);
+
+/**
+ * @brief USBD event processor.
+ *
+ * Function to be called on each event to be processed by the library.
+ */
+void app_usbd_event_execute(app_usbd_internal_evt_t const * const p_event);
+
+
+#if (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE) || defined(__SDK_DOXYGEN__)
+/**
+ * @brief Function that process events from the queue.
+ *
+ * @note This function calls @ref app_usbd_event_execute internally.
+ *
+ * @retval true Event was processed.
+ * @retval false The event queue is empty.
+ */
+bool app_usbd_event_queue_process(void);
+#endif
+
+/**
+ * @brief Add class instance.
+ *
+ * This function connects given instance into internal class instance chain and
+ * into all required endpoints.
+ * The instance event handler would be connected into endpoint by default,
+ * but this can be overwritten by @ref app_usbd_ep_handler_set.
+ *
+ * After successful attachment @ref APP_USBD_EVT_INST_APPEND would be passed to class instance.
+ *
+ * @note This function can only be called after USBD library is initialized but still disabled.
+ * Assertion would be generated otherwise.
+ *
+ * @param[in,out] p_cinst Instance to connect. Chain data would be written into writable instance data.
+ *
+ * @retval NRF_SUCCESS Instance successfully added.
+ * @retval NRF_ERROR_BUSY Endpoint(s) not available.
+ */
+ret_code_t app_usbd_class_append(app_usbd_class_inst_t const * p_cinst);
+
+/**
+ * @brief Remove class instance.
+ *
+ * Instance is removed from instance chain.
+ * Instance and event handlers are removed also from endpoints.
+ * Endpoints used by by the class instance are left disabled.
+ *
+ * @note This function can only be called after USBD library is initialized but still disabled.
+ * Assertion would be generated otherwise.
+ *
+ * @param p_cinst Instance pointer to remove.
+ *
+ * @retval NRF_SUCCESS Instance successfully removed.
+ * @retval NRF_ERROR_NOT_FOUND Instance not found in the instance chain.
+ */
+ret_code_t app_usbd_class_remove(app_usbd_class_inst_t const * p_cinst);
+
+/**
+ * @brief Remove all class instances.
+ *
+ * This function basically calls @ref app_usbd_class_remove
+ * on instances chain as long as there is any element left.
+ *
+ * @note This function can only be called after USBD library is initialized but still disabled.
+ * Assertion would be generated otherwise.
+ *
+ * @sa app_usbd_class_remove
+ *
+ * @return Is should always return @ref NRF_SUCCESS.
+ * Any error value returned would mean there is an error inside the library.
+ */
+ret_code_t app_usbd_class_remove_all(void);
+
+/**
+ * @brief Change endpoint handler.
+ *
+ * This function may be called for the endpoint only if the class instance is
+ * already properly attached by the @ref app_usbd_class_append function.
+ *
+ * The endpoint event handler function can be only overwritten by the class instance
+ * that was connected into the endpoint.
+ *
+ * @note This function can only be called after USBD library is initialized but still disabled.
+ * Assertion would be generated otherwise.
+ *
+ * @param[in] p_cinst Instance of a class that wish to set new event handler.
+ * It has to match currently configured instance for the selected endpoint.
+ * In other situation error would be returned.
+ * @param[in] ep Endpoint address to configure.
+ * @param[in] handler Event handler function to set.
+ *
+ * @retval NRF_SUCCESS New handler successfully set
+ * @retval NRF_ERROR_INVALID_PARAM p_cinst is not the same as currently set for the endpoint
+ */
+ret_code_t app_usbd_ep_handler_set(app_usbd_class_inst_t const * p_cinst,
+ nrf_drv_usbd_ep_t ep,
+ app_usbd_ep_event_handler_t handler);
+
+/**
+ * @brief Register class instance as the one that requires SOF events.
+ *
+ * This function should be called in reaction on APP_USBD_EVT_INST_APPEND event.
+ * Connect the class instance to the list of instances that requires SOF processing.
+ * If none of the appended instances requires SOF event - it is disabled.
+ *
+ * @param p_cinst Instance that requires SOF event.
+ *
+ * @retval NRF_SUCCESS Instance linked into SOF processing list.
+ *
+ * @sa app_usbd_class_sof_unregister
+ */
+ret_code_t app_usbd_class_sof_register(app_usbd_class_inst_t const * p_cinst);
+
+/**
+ * @brief Unregister class instance from SOF processing instances list.
+ *
+ * Every class that calls @ref app_usbd_class_sof_register have to call also unregistering function
+ * in reaction to @ref APP_USBD_EVT_INST_REMOVE event.
+ *
+ * @param p_cinst Instance to be unregistered from SOF event processing list.
+ *
+ * @retval NRF_SUCCESS Instance linked into SOF processing list.
+ * @retval NRF_ERROR_NOT_FOUND Instance not found in the SOF processing list.
+ *
+ * @sa app_usbd_class_sof_register
+ */
+ret_code_t app_usbd_class_sof_unregister(app_usbd_class_inst_t const * p_cinst);
+
+/**
+ * @brief Register class instance as the one that requires SOF events in interrupt.
+ *
+ * This function should be called in reaction on APP_USBD_EVT_INST_APPEND event.
+ * Connect the class instance to the list of instances that requires SOF processing.
+ * If none of the appended instances requires SOF event - it is disabled.
+ *
+ * @param p_cinst Instance that requires SOF event.
+ * @param handler Handler to SOF event
+ *
+ * @retval NRF_SUCCESS Instance linked into SOF processing list.
+ *
+ * @sa app_usbd_class_sof_interrupt_unregister
+ */
+ret_code_t app_usbd_class_sof_interrupt_register(app_usbd_class_inst_t const * p_cinst,
+ app_usbd_sof_interrupt_handler_t handler);
+
+/**
+ * @brief Unregister class instance from SOF processing in interrupt instances list.
+ *
+ * Every class that calls @ref app_usbd_class_sof_interrupt_register have to call
+ * also unregistering function in reaction to @ref APP_USBD_EVT_INST_REMOVE event.
+ *
+ * @param p_cinst Instance to be unregistered from SOF processing in interrupt list.
+ *
+ * @retval NRF_SUCCESS Instance linked into SOF processing in interrupt list.
+ * @retval NRF_ERROR_NOT_FOUND Instance not found in the SOF processing in interrupt list.
+ *
+ * @sa app_usbd_class_sof_interrupt_register
+ */
+ret_code_t app_usbd_class_sof_interrupt_unregister(app_usbd_class_inst_t const * p_cinst);
+
+
+/**
+ * @brief Register class on remote wake-up feature.
+ *
+ * @param[in] p_inst Instance of the class.
+ *
+ * @retval NRF_SUCCESS Instance that requires remote wake-up registered.
+ */
+ret_code_t app_usbd_class_rwu_register(app_usbd_class_inst_t const * const p_inst);
+
+/**
+ * @brief Unregister class from remote wake-up feature.
+ *
+ * @param[in] p_inst Instance of the class.
+ *
+ * @retval NRF_SUCCESS Instance that requires remote wake-up removed.
+ */
+ret_code_t app_usbd_class_rwu_unregister(app_usbd_class_inst_t const * const p_inst);
+
+/**
+ * @brief Check if there is any class with remote wakeup.
+ *
+ * The function checks internal registered class with remote wakeup counter.
+ *
+ * @sa app_usbd_class_rwu_register, app_usbd_class_rwu_unregister
+ *
+ * @retval true The remote wakeup functionality is required by some class instance.
+ * @retval false There is no class instance that requires wakeup functionality.
+ */
+bool app_usbd_class_rwu_enabled_check(void);
+
+/**
+ * @brief Find a specified descriptor.
+ *
+ * @param[in] p_cinst Class instance.
+ * @param[in] desc_type Descriptor type @ref app_usbd_descriptor_t
+ * @param[in] desc_index Descriptor index.
+ * @param[out] p_desc Pointer to escriptor.
+ * @param[out] p_desc_len Length of descriptor.
+ *
+ * @return Standard error code @ref ret_code_t
+ * @retval NRF_SUCCESS Descriptor successfully found.
+ * @retval NRF_ERROR_NOT_FOUND Descriptor not found.
+ * */
+ret_code_t app_usbd_class_descriptor_find(app_usbd_class_inst_t const * const p_cinst,
+ uint8_t desc_type,
+ uint8_t desc_index,
+ uint8_t * p_desc,
+ size_t * p_desc_len);
+
+/**
+ * @brief Standard set interface request handle.
+ *
+ * This function should be called when processing SET_INTERFACE request.
+ *
+ * @param[in] p_cinst Instance of a class.
+ * @param[in] iface Interface number.
+ *
+ * @return Standard error code.
+ *
+ * @note Selected interface to reset has to be part of given class.
+ * */
+ret_code_t app_usbd_interface_ep_reset(app_usbd_class_inst_t const * const p_cinst,
+ uint8_t iface);
+
+
+/**
+ * @brief Enable selected endpoint.
+ *
+ * Selected endpoint is enabled and cleared.
+ *
+ * @param ep Endpoint number.
+ */
+void app_usbd_ep_enable(nrf_drv_usbd_ep_t ep);
+
+/**
+ * @brief Disable selected endpoint.
+ *
+ * @param ep Endpoint number.
+ */
+void app_usbd_ep_disable(nrf_drv_usbd_ep_t ep);
+
+/**
+ * @name Iterate through classes lists
+ *
+ * Functions that helps to iterate through internally chained classes.
+ * @{
+ */
+ /**
+ * @brief Get first class instance in the list.
+ *
+ * Get first instance from the list of active class instances.
+ * That instance may be used then in @ref app_usbd_class_next_get function.
+ *
+ * @return First instance in the list or NULL if there are no instances available.
+ */
+ app_usbd_class_inst_t const * app_usbd_class_first_get(void);
+
+ /**
+ * @brief Get next instance in the list.
+ *
+ * Get the next instance from the list of active instances.
+ * Used to iterate through all instances.
+ *
+ * @param[in] p_cinst The current instance from with next one is required.
+ *
+ * @return Next instance to the given one or NULL if there is no more instances in the list.
+ */
+ static inline app_usbd_class_inst_t const * app_usbd_class_next_get(
+ app_usbd_class_inst_t const * const p_cinst)
+ {
+ ASSERT(NULL != p_cinst);
+ return app_usbd_class_data_access(p_cinst)->p_next;
+ }
+
+ /**
+ * @brief Get first instance in SOF list.
+ *
+ * Start iteration through the list of instances that require SOF event processing.
+ *
+ * @return First instance in the list or NULL if the list is empty.
+ *
+ * @sa app_usbd_class_first_get
+ */
+ app_usbd_class_inst_t const * app_usbd_class_sof_first_get(void);
+
+ /**
+ * @brief Get next instance in the SOF list.
+ *
+ * Get the next instance from the list of instances requiring SOF event processing.
+ * Used to iterate through all SOF instances.
+ *
+ * @param p_cinst The current instance from with next one is required.
+ *
+ * @return Next instance to the given one or NULL if there is no more instances in the list.
+ */
+ static inline app_usbd_class_inst_t const * app_usbd_class_sof_next_get(
+ app_usbd_class_inst_t const * const p_cinst)
+ {
+ ASSERT(NULL != p_cinst);
+ return app_usbd_class_data_access(p_cinst)->p_sof_next;
+ }
+
+ /**
+ * @brief Get first instance in SOF interrupt list.
+ *
+ * Start iteration through the list of instances that require SOF processing in interrupt.
+ *
+ * @return First instance in the list or NULL if the list is empty.
+ *
+ * @sa app_usbd_class_first_get
+ */
+ app_usbd_class_inst_t const * app_usbd_class_sof_interrupt_first_get(void);
+
+ /**
+ * @brief Get next instance in the SOF interrupt list.
+ *
+ * Get the next instance from the list of instances requiring SOF processing in interrupt.
+ * Used to iterate through all SOF instances that have SOF handlers.
+ *
+ * @param p_cinst The current instance from with next one is required.
+ *
+ * @return Next instance to the given one or NULL if there is no more instances in the list.
+ */
+ static inline app_usbd_class_inst_t const * app_usbd_class_sof_interrupt_next_get(
+ app_usbd_class_inst_t const * const p_cinst)
+ {
+ ASSERT(NULL != p_cinst);
+ return app_usbd_class_data_access(p_cinst)->p_sof_next;
+ }
+/** @} */
+
+/**
+ * @brief Search for selected interface.
+ *
+ * Function searches for the given interface number and returns the class that contains it.
+ * Optionally it can return interface index inside class instance.
+ *
+ * @param[in] iface Interface number.
+ * @param[out] p_iface_idx Pointer to a variable that would hold interface index inside returned
+ * class instance.
+ *
+ * @return Pointer to the class structure that cointain given interface or NULL if not found.
+ */
+app_usbd_class_inst_t const * app_usbd_iface_find(uint8_t iface, uint8_t * p_iface_idx);
+
+
+/**
+ * @name Communicate with interfaces, endpoints and instances inside usbd library
+ *
+ * @{
+ */
+
+ /**
+ * @brief Call interface event handler.
+ *
+ * Call event handler for selected interface.
+ * @param[in,out] p_class_inst Class instance that holds selected interface.
+ * @param[in] iface_idx Index of the interface in class structure.
+ * @param[in] p_event Event structure to be processed.
+ *
+ * @return Operation status.
+ */
+ ret_code_t app_usbd_iface_call(
+ app_usbd_class_inst_t const * const p_class_inst,
+ uint8_t iface_idx,
+ app_usbd_complex_evt_t const * const p_event);
+
+ /**
+ * @brief Call endpoint event handler.
+ *
+ * Call event handler for the selected endpoint.
+ * @param[in] ep Endpoint number.
+ * @param[in] p_event Event structure to send.
+ *
+ * @return Operation status.
+ */
+ ret_code_t app_usbd_ep_call(nrf_drv_usbd_ep_t ep, app_usbd_complex_evt_t const * const p_event);
+
+ /**
+ * @brief Auxiliary function that process event by every instance in the list.
+ *
+ * This function ignores the result of called handler.
+ *
+ * @param p_event Event to pass to every instance.
+ */
+ void app_usbd_all_call(app_usbd_complex_evt_t const * const p_event);
+
+ /**
+ * @brief Call interface event handlers and stop when served.
+ *
+ * Call event handlers from instances as long as we get result different than @ref NRF_ERROR_NOT_SUPPORTED
+ * @param[in] p_event Event structure to send.
+ *
+ * @return Operation status or @ref NRF_ERROR_NOT_SUPPORTED if none of instances in the list can support given event.
+ */
+ ret_code_t app_usbd_all_until_served_call(app_usbd_complex_evt_t const * const p_event);
+/** @} */
+
+/**
+ * @brief Endpoint transfer.
+ *
+ * @param ep Endpoint number.
+ * @param p_transfer Description of the transfer to be performed.
+ * The direction of the transfer is determined by the
+ * endpoint number.
+ *
+ * @retval NRF_ERROR_INVALID_STATE The state of the USB device does not allow
+ * data transfer on the endpoint.
+ * @return Values returned by @ref nrf_drv_usbd_ep_transfer.
+ *
+ * @sa app_usbd_ep_handled_transfer
+ */
+ret_code_t app_usbd_ep_transfer(
+ nrf_drv_usbd_ep_t ep,
+ nrf_drv_usbd_transfer_t const * const p_transfer);
+
+/**
+ * @brief Set up an endpoint handled transfer.
+ *
+ * Configures a transfer handled by the feedback function.
+ *
+ * @param ep Endpoint number.
+ * @param p_handler Function called when the next chunk of data is requested.
+ *
+ * @retval NRF_ERROR_INVALID_STATE The state of the USB device does not allow
+ * data transfer on the endpoint.
+ * @return Values returned by @ref nrf_drv_usbd_ep_handled_transfer.
+ */
+ret_code_t app_usbd_ep_handled_transfer(
+ nrf_drv_usbd_ep_t ep,
+ nrf_drv_usbd_handler_desc_t const * const p_handler);
+
+
+/**
+ * @brief Select interface
+ *
+ * Select the given interface.
+ * This function calls class interface selection function or default
+ * interface selection function.
+ *
+ * After calling this function interface should be functional.
+ *
+ * @param[in,out] p_inst Instance of the class.
+ * @param[in] iface_idx Index of the interface inside class structure.
+ * @param[in] alternate Alternate setting that should be selected.
+ *
+ * @return Standard error code.
+ */
+ret_code_t app_usbd_iface_select(
+ app_usbd_class_inst_t const * const p_inst,
+ uint8_t iface_idx,
+ uint8_t alternate);
+
+
+/**
+ * @brief Deselect interface.
+ *
+ * Disable the given interface.
+ * This function calls class interface deselection function or
+ * default interface selection function.
+ *
+ * After calling this function all the endpoints from the interface
+ * have to be disabled.
+ *
+ * @param[in,out] p_inst Instance of the class.
+ * @param[in] iface_idx Index of the interface inside class structure.
+ */
+void app_usbd_iface_deselect(
+ app_usbd_class_inst_t const * const p_inst,
+ uint8_t iface_idx);
+
+/**
+ * @brief Get selected interface.
+ *
+ * Function retieves currently selected interface.
+ * If the class contains @ref app_usbd_class_methods_t::iface_selection_get it is called.
+ * It it does not contain this function this function would return default, 0 value.
+ *
+ * @param[in] p_inst Instance of the class.
+ * @param[in] iface_idx Index of the interface inside class structure.
+ *
+ * @return Selected alternate interface setting.
+ */
+uint8_t app_usbd_iface_selection_get(
+ app_usbd_class_inst_t const * const p_inst,
+ uint8_t iface_idx);
+
+/**
+ * @brief Select alternate configuration 0 for all interfaces.
+ *
+ * Auxiliary function that clears settings for all interfaces leaving them enabled.
+ */
+void app_usbd_all_iface_select_0(void);
+
+/**
+ * @brief Deselect all interfaces.
+ *
+ * Auxiliary function to disable all interfaces.
+ */
+void app_usbd_all_iface_deselect(void);
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* APP_USBD_H__ */
diff --git a/third_party/NordicSemiconductor/libraries/usb/app_usbd_class_base.h b/third_party/NordicSemiconductor/libraries/usb/app_usbd_class_base.h
index 15b4ed3..a770b57 100644
--- a/third_party/NordicSemiconductor/libraries/usb/app_usbd_class_base.h
+++ b/third_party/NordicSemiconductor/libraries/usb/app_usbd_class_base.h
@@ -1,1103 +1,1103 @@
-/**
- * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#ifndef APP_USBD_CLASS_BASE_H__
-#define APP_USBD_CLASS_BASE_H__
-
-#include <stdint.h>
-#include <stddef.h>
-
-#include "app_usbd_types.h"
-#include "nrf_drv_usbd.h"
-#include "nrf_assert.h"
-#include "app_util.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @defgroup app_usbd_class_base USBD Class Base module
- * @ingroup app_usbd
- *
- * @brief @tagAPI52840 The base for any class instance is defined in this module.
- *
- * @details Any class instance must start from base class instance structure.
- * This makes them compatible with USBD library independently of the
- * implementation details.
- * @{
- */
-
-/**
- * @brief Endpoint configuration.
- */
-typedef struct
-{
- nrf_drv_usbd_ep_t address; //!< Endpoint address
-} app_usbd_class_ep_conf_t;
-
-/**
- * @brief Interface configuration.
- */
-typedef struct
-{
- uint8_t number; //!< Interface number
- uint8_t ep_cnt; //!< Endpoint number
- uint8_t ep_offset; //!< Offset of the first endpoint
- /**< Offset in bytes of the first endpoint.
- * The offset is calculated from the address of this interface structure
- */
-} app_usbd_class_iface_conf_t;
-
-/**
- * @brief Instance variable data.
- */
-typedef struct
-{
- app_usbd_class_inst_t const * p_next; //!< Pointer to the next instance
- app_usbd_class_inst_t const * p_sof_next; //!< Pointer to the next SOF event requiring instance
- app_usbd_sof_interrupt_handler_t sof_handler; //!< Instance specific SOF interrupt handler
-} app_usbd_class_data_t;
-
-/**
- * @brief Class descriptor context.
- */
-typedef struct
-{
- uint32_t line; //!< Number of line to resume writing descriptors from
- uint8_t data_buffer; //!< Data from last call of feeder
-} app_usbd_class_descriptor_ctx_t;
-
-/**
- * @brief Class descriptor state.
- */
-typedef struct
-{
- uint8_t * p_buffer; //!< Pointer to buffer
- uint32_t current_size; //!< Current size of descriptor
- uint32_t maximum_size; //!< Maximum size of descriptor
- app_usbd_class_descriptor_ctx_t * p_context; //!< Pointer to context
-} app_usbd_class_descriptor_state_t;
-
-/**
- * @brief Class interface function set.
- * */
-typedef struct {
- /**
- * @brief Instance callback function.
- *
- * The function used by every class instance.
- * @param[in,out] p_inst Instance of the class.
- * @param[in] p_event Event to process.
- *
- * @return Standard error code.
- *
- * @note If given event is not supported by class, return @ref NRF_ERROR_NOT_SUPPORTED
- */
- ret_code_t (* event_handler)(app_usbd_class_inst_t const * const p_inst,
- app_usbd_complex_evt_t const * const p_event);
-
- /**
- * @brief Instance feed descriptors.
- *
- * Feeds whole descriptor of the instance.
- * @param[in] p_ctx Class descriptor context.
- * @param[in,out] p_inst Instance of the class.
- * @param[out] p_buff Buffer for descriptor.
- * @param[in] max_size Requested size of the descriptor.
- *
- * @return True if not finished feeding the descriptor, false if done.
- */
- bool (* feed_descriptors)(app_usbd_class_descriptor_ctx_t * p_ctx,
- app_usbd_class_inst_t const * p_inst,
- uint8_t * p_buff,
- size_t max_size);
-
-
- /**
- * @brief Select interface
- *
- * Function called when class interface has to be selected.
- *
- * This function would be called for every interface when:
- * - SET_INTERFACE command is processed by the default handler
- * - SET_CONFIG(1) command is processed by the default handler
- *
- * @note Remember to disable all the endpoints that are not used
- * in the selected configuration.
- * @note If this function pointer is NULL default procedure would
- * just enable all the interface endpoints and selecting
- * alternate configurations other than 0 would generate error.
- * @note Calling the function with alternate setting 0 has to always succeed.
- *
- * @param[in,out] p_inst Instance of the class
- * @param[in] iface_idx Index of the interface inside class structure
- * @param[in] alternate Alternate setting that should be selected
- *
- * @return Function has to return @ref NRF_SUCCESS when it has successfully proceed
- * interface selection.
- * If it returns @ref NRF_ERROR_NOT_SUPPORTED, default function would be used
- * to proceed the request - just like there would be NULL pointer in this field.
- * Any other kind of error would make library to STALL the request.
- */
- ret_code_t (* iface_select)(app_usbd_class_inst_t const * const p_inst,
- uint8_t iface_idx,
- uint8_t alternate);
-
- /**
- * @brief Deselect interface.
- *
- * Function called when the class interface has to be deselected.
- *
- * This function would be called for every interface when:
- * - Library start internal event is processed by the default handler
- * - RESET event is processed by the default handler
- * - SET_ADDRESS is processed by the default handler
- * - SET_CONFIG(0) is processed by the default handler
- *
- * @note Just after this function is called all the interface
- * endpoints would be disabled.
- * This function does not has to take care about it.
- * @note If this function pointer is NULL default procedure would
- * just disable all the interface endpoints.
- *
- * @param[in,out] p_inst Instance of the class.
- * @param[in] iface_idx Index of the interface inside class structure.
- */
- void (* iface_deselect)(app_usbd_class_inst_t const * const p_inst, uint8_t iface_idx);
-
- /**
- * @brief Get current interface.
- *
- * Function called when class interface has to return its alternate settings
- * in reaction on GET_INTERFACE command.
- * It should be defined in a pair with @ref app_usbd_class_methods_t::iface_select.
- *
- * @param[in] p_inst Instance of the class.
- * @param[in] iface_idx Index of the interface inside class structure.
- *
- * @return Current alternate setting of the selected interface.
- *
- * @note For the classes that support this function, when an interface that has not alternate
- * configurations has been selected this function has to return 0 - default alternate setting.
- *
- * @note If this function pointer it NULL default procedure would return alternate interface
- * value 0.
- */
- uint8_t (* iface_selection_get)(app_usbd_class_inst_t const * const p_inst, uint8_t iface_idx);
-
-} app_usbd_class_methods_t;
-
-/**
- * @brief The instance structure itself.
- *
- * The structure of base class instance.
- */
-struct app_usbd_class_inst_s
-{
- app_usbd_class_data_t * p_data; //!< Pointer to non-constant data
- app_usbd_class_methods_t const * p_class_methods; //!< Class interface methods
- struct
- {
- uint8_t cnt; //!< Number of defined interfaces
- uint8_t config[]; //!< Interface configuration data followed by endpoint data
- } iface; //!< Interface structure
-};
-
-
-/**
- * @brief Get total number of interfaces.
- *
- *
- */
-static inline uint8_t app_usbd_class_iface_count_get(app_usbd_class_inst_t const * const p_inst)
-{
- return p_inst->iface.cnt;
-}
-
-/**
- * @brief Interface accessing function.
- *
- * Get interface pointer.
- * Interfaces create continuous array in the memory so it is possible to get
- * interface with index 0 and then just iterate to the next one.
- *
- * @param p_inst Pointer to the class instance
- * @param iface_idx Index of the instance to get.
- * This is not the interface identifier.
- * Technically it is the index of the interface in the class description array.
- * @return Pointer to the interface configuration parameters or NULL if given index is out of interface scope for given class.
- */
-static inline app_usbd_class_iface_conf_t const * app_usbd_class_iface_get(
- app_usbd_class_inst_t const * const p_inst,
- uint8_t iface_idx)
-{
- ASSERT(NULL != p_inst);
- if (iface_idx >= (app_usbd_class_iface_count_get(p_inst)))
- {
- return NULL;
- }
-
- app_usbd_class_iface_conf_t const * p_interface =
- (app_usbd_class_iface_conf_t const * )(p_inst->iface.config);
- return &(p_interface[iface_idx]);
-}
-
-/**
- * @brief Get interface number.
- *
- * @param p_iface Pointer to interface structure.
- *
- * @return Interface number from interface configuration structure.
- */
-static inline uint8_t app_usbd_class_iface_number_get(
- app_usbd_class_iface_conf_t const * const p_iface)
-{
- return p_iface->number;
-}
-
-/**
- * @brief Get number of endpoints in interface.
- *
- * @param p_iface Pointer to interface structure.
- *
- * @return Number of endpoints used by given interface.
- */
-static inline uint8_t app_usbd_class_iface_ep_count_get(
- app_usbd_class_iface_conf_t const * const p_iface)
-{
- return p_iface->ep_cnt;
-}
-
-/**
- * @brief Interface Endpoint accessing function.
- *
- * @param p_iface Interface configuration pointer.
- * @param ep_idx Endpoint index.
- *
- * @return Endpoint information structure pointer or NULL if given index is outside of endpoints for selected interface.
- *
- * @sa app_usbd_class_iface_get
- */
-static inline app_usbd_class_ep_conf_t const * app_usbd_class_iface_ep_get(
- app_usbd_class_iface_conf_t const * const p_iface,
- uint8_t ep_idx)
-{
- ASSERT(NULL != p_iface);
- if (ep_idx >= p_iface->ep_cnt)
- {
- return NULL;
- }
-
- app_usbd_class_ep_conf_t const * p_ep =
- (app_usbd_class_ep_conf_t const * )(((uint8_t const *)p_iface) + p_iface->ep_offset);
- return &(p_ep[ep_idx]);
-}
-
-/**
- * @brief Translate endpoint address to class index.
- *
- * @param p_iface Interface configuration pointer.
- * @param ep_address Endpoint address.
- *
- * @return Endpoint index or number of endpoints if not found.
- *
- */
-static inline uint8_t app_usbd_class_iface_ep_idx_get(
- app_usbd_class_iface_conf_t const * const p_iface,
- nrf_drv_usbd_ep_t ep_address)
-{
- ASSERT(NULL != p_iface);
- app_usbd_class_ep_conf_t const * p_ep =
- (app_usbd_class_ep_conf_t const * )(((uint8_t const *)p_iface) + p_iface->ep_offset);
-
- uint8_t i;
- for (i = 0; i < p_iface->ep_cnt; ++i)
- {
- if (ep_address == p_ep[i].address)
- {
- break;
- }
- }
-
- return i;
-}
-
-/**
- * @brief Get the selected endpoint address.
- *
- * @param p_ep Endpoint configuration structure.
- *
- * @return Endpoint address
- */
-static inline nrf_drv_usbd_ep_t app_usbd_class_ep_address_get(app_usbd_class_ep_conf_t const * p_ep)
-{
- return (nrf_drv_usbd_ep_t)p_ep->address;
-}
-
-/**
- * @brief Get the pointer to the writable instance data.
- *
- * @param p_inst Instance pointer.
- * @return Pointer to writable instance data.
- */
-static inline app_usbd_class_data_t * app_usbd_class_data_access(
- app_usbd_class_inst_t const * const p_inst)
-{
- return p_inst->p_data;
-}
-
-/**
- * @name Internal macros for argument mapping
- *
- * Functions to be used as a mapping macro for @ref MACRO_MAP, @ref MACRO_MAP_FOR or @ref MACRO_MAP_FOR_PARAM
- * @{
- */
- /**
- * @brief Count the number of endpoints in given configuration.
- *
- * Config should be given as a interface configuration in a brackets:
- * @code
- * (interface_nr, ep1, ep2, ep3)
- * @endcode
- * Number of endpoints may vary from 0 to a few (technically up to 16, but it seems not to make sense to use more than 4).
- * Interface number is always present.
- *
- * @param iface_config Single interface configuration (in brackets).
- *
- * @return Number of endpoints in interface. This is computed value - can be used by compiler but not by preprocessor.
- */
- #define APP_USBD_CLASS_CONF_IFACE_EP_COUNT_(iface_config) \
- (NUM_VA_ARGS(BRACKET_EXTRACT(iface_config)) - 1)
-
- /**
- * @brief Adds the number of endpoints in given config to the current value.
- *
- * This is basically @ref APP_USBD_CLASS_CONF_IFACE_EP_COUNT_ with plus sign added.
- *
- * @param iface_config See parameters documentation in @ref APP_USBD_CLASS_CONF_IFACE_EP_COUNT_
- *
- * @return Plus sign followed by number of endpoints in interface.
- *
- * @sa APP_USBD_CLASS_CONF_IFACE_EP_COUNT_
- */
- #define APP_USBD_CLASS_CONF_IFACE_EP_PLUS_COUNT_(iface_config) \
- + APP_USBD_CLASS_CONF_IFACE_EP_COUNT_(iface_config)
-
- /**
- * @brief Create variable for endpoint.
- */
-
- /**
- * @brief Extract endpoints given interface configuration.
- *
- * This macro gets single endpoint configuration and extracts all the endpoints.
- * It also adds comma on the end of extracted endpoints.
- * This way when this macro is called few times it generates nice list of all endpoints
- * that may be used to array initialization.
- *
- * @param iface_config Single interface configuration in brackets.
- * The format should be similar like described in @ref APP_USBD_CLASS_CONF_IFACE_EP_COUNT_.
- */
- #define APP_USBD_CLASS_IFACE_EP_EXTRACT_(iface_config) \
- CONCAT_2(APP_USBD_CLASS_IFACE_EP_EXTRACT_, \
- NUM_VA_ARGS_IS_MORE_THAN_1(BRACKET_EXTRACT(iface_config))) \
- (BRACKET_EXTRACT(iface_config))
-
- /**
- * @brief Auxiliary macro for @ref APP_USBD_CLASS_IFACE_EP_EXTRACT_
- *
- * This macro is called when interface has no endpoints.
- */
- #define APP_USBD_CLASS_IFACE_EP_EXTRACT_0(iface_nr)
-
- /**
- * @brief Auxiliary macro for @ref APP_USBD_CLASS_IFACE_EP_EXTRACT_
- *
- * This macro is called when interface has at least one endpoint.
- */
- #define APP_USBD_CLASS_IFACE_EP_EXTRACT_1(...) \
- APP_USBD_CLASS_IFACE_EP_EXTRACT_1_(__VA_ARGS__)
-
- #define APP_USBD_CLASS_IFACE_EP_EXTRACT_1_(iface_nr, ...) \
- MACRO_MAP_REC(APP_USBD_CLASS_IFACE_EP_EXTRACT_1__, __VA_ARGS__)
-
- #define APP_USBD_CLASS_IFACE_EP_EXTRACT_1__(ep) \
- {(nrf_drv_usbd_ep_t) (ep)},
-
- /**
- * @brief Generate configuration for single interface.
- *
- * This macro extract configuration for single interface.
- * The configuration is inside curly brackets and comma is added on the end.
- * This mean it can be directly used to init array of interface configurations.
- *
- * @param iface_config Single interface configuration.
- * @param N Currently processed configuration.
- * @param iface_configs All interfaces configuration in brackets.
- */
- #define APP_USBD_CLASS_IFACE_CONFIG_EXTRACT_(iface_config, N, iface_configs) \
- CONCAT_2(APP_USBD_CLASS_IFACE_CONFIG_EXTRACT_, \
- NUM_VA_ARGS_IS_MORE_THAN_1(BRACKET_EXTRACT(iface_config))) \
- (N, iface_configs, BRACKET_EXTRACT(iface_config))
-
- /**
- * @brief Macro used when there was an error extracting number of configs.
- *
- * Throws a syntax error.
- */
- #define APP_USBD_CLASS_IFACE_CONFIG_EXTRACT_x(iface_config, N, iface_configs) \
- [N] = !!!iface_config!!!
- /**
- * @brief Auxiliary macro for @ref APP_USBD_CLASS_IFACE_CONFIG_EXTRACT_
- *
- * This macro is called when interface has no endpoints.
- */
- #define APP_USBD_CLASS_IFACE_CONFIG_EXTRACT_0(N, iface_configs, iface_nr) \
- APP_USBD_CLASS_IFACE_CONFIG_EXTRACT_0_(N, iface_configs, iface_nr)
- #define APP_USBD_CLASS_IFACE_CONFIG_EXTRACT_0_(N, iface_configs, iface_nr) \
- { .number = iface_nr, .ep_cnt = 0, .ep_offset = 0 },
-
- /**
- * @brief Auxiliary macro for @ref APP_USBD_CLASS_IFACE_CONFIG_EXTRACT_
- *
- * This macro is called when interface has at last one endpoint.
- */
- #define APP_USBD_CLASS_IFACE_CONFIG_EXTRACT_1(N, iface_configs, ...) \
- APP_USBD_CLASS_IFACE_CONFIG_EXTRACT_1_(N, iface_configs, __VA_ARGS__)
- #define APP_USBD_CLASS_IFACE_CONFIG_EXTRACT_1_(N, iface_configs, iface_nr, ...) \
- { .number = iface_nr, .ep_cnt = NUM_VA_ARGS(__VA_ARGS__), \
- .ep_offset = APP_USBD_CLASS_CONF_TOTAL_EP_COUNT_N(N, iface_configs) * \
- sizeof(app_usbd_class_ep_conf_t) \
- + ((NUM_VA_ARGS(BRACKET_EXTRACT(iface_configs)) - N) * \
- sizeof(app_usbd_class_iface_conf_t)) \
- },
-
-/** @} */
-
-
-/**
- * @name Macros that uses mapping macros internally
- *
- * Auxiliary macros that uses mapping macros to make some calculations or realize other functionality.
- * Mapped here for easier unit testing and to hide complex mapping functions calling.
- * @{
- */
-
-/**
- * @brief Count total number of endpoints.
- *
- * @param iface_configs List of interface configurations like explained
- * in documentation for @ref APP_USBD_CLASS_INSTANCE_TYPEDEF
- *
- * @return The equation to calculate the number of endpoints by compiler.
- */
-#define APP_USBD_CLASS_CONF_TOTAL_EP_COUNT(iface_configs) \
- (0 MACRO_MAP(APP_USBD_CLASS_CONF_IFACE_EP_PLUS_COUNT_, BRACKET_EXTRACT(iface_configs)))
-
-/**
- * @brief Count total number of endpoint up-to interface index.
- *
- * The version of @ref APP_USBD_CLASS_CONF_TOTAL_EP_COUNT macro which takes the
- * number of interfaces to analyze.
- *
- * @param N Number of interfaces to analyze.
- * @param iface_configs List of interface configurations like explained
- * in documentation for @ref APP_USBD_CLASS_INSTANCE_TYPEDEF
- *
- * @return The equation to calculate the number of endpoints by compiler.
- */
-#define APP_USBD_CLASS_CONF_TOTAL_EP_COUNT_N(N, iface_configs) \
- (0 MACRO_MAP_N(N, APP_USBD_CLASS_CONF_IFACE_EP_PLUS_COUNT_, BRACKET_EXTRACT(iface_configs)))
-
-/**
- * @brief Extract configurations for interfaces.
- *
- * This macro extracts the configurations for every interface.
- * Basically uses the @ref APP_USBD_CLASS_IFACE_CONFIG_EXTRACT_ macro on every
- * configuration found.
- *
- * This should generate interface configuration initialization data
- * in comma separated initializers in curly braces.
- *
- * @param iface_configs List of interface configurations like explained
- * in documentation for @ref APP_USBD_CLASS_INSTANCE_TYPEDEF
- *
- * @return Comma separated initialization data for all interfaces.
- */
-/*lint -emacro( (40), APP_USBD_CLASS_IFACES_CONFIG_EXTRACT) */
-#define APP_USBD_CLASS_IFACES_CONFIG_EXTRACT(iface_configs) \
- MACRO_MAP_FOR_PARAM(iface_configs, \
- APP_USBD_CLASS_IFACE_CONFIG_EXTRACT_, \
- BRACKET_EXTRACT(iface_configs))
-
-/**
- * @brief Extract all endpoints.
- *
- * Macro that extracts all endpoints from every interface.
- *
- * @param iface_configs List of interface configurations like explained
- * in documentation for @ref APP_USBD_CLASS_INSTANCE_TYPEDEF
- *
- * @return Comma separated list of endpoints.
- */
-/*lint -emacro( (40), APP_USBD_CLASS_IFACES_EP_EXTRACT) */
-#define APP_USBD_CLASS_IFACES_EP_EXTRACT(iface_configs) \
- MACRO_MAP(APP_USBD_CLASS_IFACE_EP_EXTRACT_, BRACKET_EXTRACT(iface_configs))
-
-
-/** @} */
-
-
-/**
- * @brief USBD instance of class mnemonic.
- *
- * Macro that generates mnemonic for the name of the structure that describes instance for selected class.
- *
- * @param type_name The name of the instance without _t postfix.
- *
- * @return The name with the right postfix to create the name for the type for the class.
- */
-#define APP_USBD_CLASS_INSTANCE_TYPE(type_name) CONCAT_2(type_name, _t)
-
-/**
- * @brief USBD data for instance class mnemonic.
- *
- * The mnemonic of the variable type that holds writable part of the class instance.
- *
- * @param type_name The name of the instance without _t postfix.
- *
- * @return The name with the right postfix to create the name for the data type for the class.
- */
-#define APP_USBD_CLASS_DATA_TYPE(type_name) CONCAT_2(type_name, _data_t)
-
-/**
- * @brief Declare class specific member of class instance.
- *
- * @param type Type of the attached class configuration.
- *
- * @sa APP_USBD_CLASS_INSTANCE_TYPEDEF
- */
-#define APP_USBD_CLASS_INSTANCE_SPECIFIC_DEC(type) type class_part;
-
-/**
- * @brief Used if there is no class specific configuration.
- *
- * This constant can be used if there is no specific configuration inside created instance.
- *
- * @sa APP_USBD_CLASS_INSTANCE_TYPEDEF
- */
-#define APP_USBD_CLASS_INSTANCE_SPECIFIC_DEC_NONE
-
-/**
- * @brief Declare class specific member of class data.
- *
- * @param type Type of the attached class data.
- *
- * @sa APP_USBD_CLASS_DATA_TYPEDEF
- */
-#define APP_USBD_CLASS_DATA_SPECIFIC_DEC(type) APP_USBD_CLASS_INSTANCE_SPECIFIC_DEC(type)
-
-/**
- * @brief Used if there is no class specific data.
- *
- * This constant can be used if there is no specific writable data inside created instance.
- *
- * @sa APP_USBD_CLASS_DATA_TYPEDEF
- */
-#define APP_USBD_CLASS_DATA_SPECIFIC_DEC_NONE APP_USBD_CLASS_INSTANCE_SPECIFIC_DEC_NONE
-
-
-
-
-/**
- * @brief Instance structure declaration.
- *
- * The macro that declares a variable type that would be used to store given class instance.
- * Class instance stores all the data from @ref app_usbd_class_inst_t and overlaid data for specified class.
- *
- * The structure of interface configuration data:
- * @code
- * (
- * (iface1_nr, (ep1, ep2, ep3)),
- (iface2_nr),
- (iface3_nr, (ep4))
- * )
- * @endcode
- *
- * @param type_name The name of the instance without _t postfix.
- * @param interfaces_configs List of interface configurations like explained above.
- * @param class_config_dec Result of the macro
- * @ref APP_USBD_CLASS_INSTANCE_SPECIFIC_DEC or
- * @ref APP_USBD_CLASS_INSTANCE_SPECIFIC_DEC_NONE
- *
- * @return The definition of the structure type that holds all the required data.
- *
- * @note It should not be used directly in the final application. See @ref APP_USBD_CLASS_DATA_TYPEDEF instead.
- *
- * @note APP_USBD_CLASS_DATA_TYPEDEF has to be called first for the compilation to success.
- *
- * @sa APP_USBD_CLASS_TYPEDEF
- */
-#define APP_USBD_CLASS_INSTANCE_TYPEDEF(type_name, interfaces_configs, class_config_dec) \
- typedef union CONCAT_2(type_name, _u) \
- { \
- app_usbd_class_inst_t base; \
- struct \
- { \
- APP_USBD_CLASS_DATA_TYPE(type_name) * p_data; \
- app_usbd_class_methods_t const * p_class_methods; \
- struct \
- { \
- uint8_t cnt; \
- app_usbd_class_iface_conf_t \
- config[NUM_VA_ARGS(BRACKET_EXTRACT(interfaces_configs))]; \
- app_usbd_class_ep_conf_t \
- ep[APP_USBD_CLASS_CONF_TOTAL_EP_COUNT(interfaces_configs)]; \
- } iface; \
- class_config_dec \
- } specific; \
- } APP_USBD_CLASS_INSTANCE_TYPE(type_name)
-
-/**
- * @brief Same as @ref APP_USBD_CLASS_INSTANCE_TYPEDEF but for class with EP0 only.
- */
-#define APP_USBD_CLASS_INSTANCE_NO_EP_TYPEDEF(type_name, interfaces_configs, class_config_dec) \
- typedef union CONCAT_2(type_name, _u) \
- { \
- app_usbd_class_inst_t base; \
- struct \
- { \
- APP_USBD_CLASS_DATA_TYPE(type_name) * p_data; \
- app_usbd_class_methods_t const * p_class_methods; \
- struct \
- { \
- uint8_t cnt; \
- app_usbd_class_iface_conf_t \
- config[NUM_VA_ARGS(BRACKET_EXTRACT(interfaces_configs))]; \
- } iface; \
- class_config_dec \
- } specific; \
- } APP_USBD_CLASS_INSTANCE_TYPE(type_name)
-
-/**
- * @brief Writable data structure declaration.
- *
- * The macro that declares a variable type that would be used to store given class writable data.
- * Writable data contains base part of the type @ref app_usbd_class_data_t followed by
- * class specific data.
- *
- * @param type_name The name of the type without _t postfix.
- * @param class_data_dec Result of the macro
- * @ref APP_USBD_CLASS_DATA_SPECIFIC_DEC or
- * @ref APP_USBD_CLASS_DATA_SPECIFIC_DEC_NONE
- *
- * @return The definition of the structure type that holds all the required writable data.
- *
- * @note It should not be used directly in the final application. See @ref APP_USBD_CLASS_DATA_TYPEDEF instead.
- *
- * @sa APP_USBD_CLASS_TYPEDEF
- */
-#define APP_USBD_CLASS_DATA_TYPEDEF(type_name, class_data_dec) \
- typedef struct \
- { \
- app_usbd_class_data_t base; \
- class_data_dec \
- }APP_USBD_CLASS_DATA_TYPE(type_name)
-
-
-/**
- * @brief Declare all data types required by the class instance.
- *
- * Macro that declares data type first and then instance type.
- *
- * @param type_name The name of the type without _t postfix.
- * @param interface_configs List of interface configurations like in @ref APP_USBD_CLASS_INSTANCE_TYPEDEF.
- * @param class_config_dec Result of the macro
- * @ref APP_USBD_CLASS_INSTANCE_SPECIFIC_DEC or
- * @ref APP_USBD_CLASS_INSTANCE_SPECIFIC_DEC_NONE
- * @param class_data_dec Result of the macro
- * @ref APP_USBD_CLASS_DATA_SPECIFIC_DEC or
- * @ref APP_USBD_CLASS_DATA_SPECIFIC_DEC_NONE
- *
- * @return Declaration of the data type for the instance and instance itself.
- *
- * @sa APP_USBD_CLASS_DATA_TYPEDEF
- * @sa APP_USBD_CLASS_INSTANCE_TYPEDEF
- */
-#define APP_USBD_CLASS_TYPEDEF(type_name, interface_configs, class_config_dec, class_data_dec) \
- APP_USBD_CLASS_DATA_TYPEDEF(type_name, class_data_dec); \
- APP_USBD_CLASS_INSTANCE_TYPEDEF(type_name, interface_configs, class_config_dec)
-
-/**
- * @brief Same as @ref APP_USBD_CLASS_TYPEDEF but for class with EP0 only.
- */
-#define APP_USBD_CLASS_NO_EP_TYPEDEF(type_name, \
- interface_configs, \
- class_config_dec, \
- class_data_dec) \
- APP_USBD_CLASS_DATA_TYPEDEF(type_name, class_data_dec); \
- APP_USBD_CLASS_INSTANCE_NO_EP_TYPEDEF(type_name, interface_configs, class_config_dec)
-
-/**
- * @brief Forward declaration of type defined by @ref APP_USBD_CLASS_TYPEDEF
- *
- * @param type_name The name of the type without _t postfix.
- * */
-#define APP_USBD_CLASS_FORWARD(type_name) union CONCAT_2(type_name, _u)
-
-/**
- * @brief Generate the initialization data for.
- *
- * Macro that generates the initialization data for instance.
- *
- * @param p_ram_data Pointer to writable instance data structure.
- * @param class_methods Class methods.
- * @param interfaces_configs Exactly the same interface config data that in @ref APP_USBD_CLASS_INSTANCE_TYPEDEF
- * @param class_config_part Configuration part. The data should be inside brackets.
- * Any data here would be removed from brackets and then put as an initialization
- * data for class_part member of instance structure.
- *
- * @note It should not be used directly in the final application. See @ref APP_USBD_CLASS_INST_DEF instead.
- */
-#define APP_USBD_CLASS_INSTANCE_INITVAL(p_ram_data, \
- class_methods, \
- interfaces_configs, \
- class_config_part) \
- { \
- .specific = { \
- .p_data = p_ram_data, \
- .p_class_methods = class_methods, \
- .iface = { \
- .cnt = NUM_VA_ARGS(BRACKET_EXTRACT(interfaces_configs)), \
- .config = { APP_USBD_CLASS_IFACES_CONFIG_EXTRACT(interfaces_configs) }, \
- .ep = { APP_USBD_CLASS_IFACES_EP_EXTRACT(interfaces_configs) } \
- }, \
- BRACKET_EXTRACT(class_config_part) \
- } \
- }
-
-/**
- * @brief Same as @ref APP_USBD_CLASS_INSTANCE_INITVAL but for class with EP0 only.
- */
-#define APP_USBD_CLASS_INSTANCE_NO_EP_INITVAL(p_ram_data, \
- class_methods, \
- interfaces_configs, \
- class_config_part) \
- { \
- .specific = { \
- .p_data = p_ram_data, \
- .p_class_methods = class_methods, \
- .iface = { \
- .cnt = NUM_VA_ARGS(BRACKET_EXTRACT(interfaces_configs)), \
- .config = { APP_USBD_CLASS_IFACES_CONFIG_EXTRACT(interfaces_configs) } \
- }, \
- BRACKET_EXTRACT(class_config_part) \
- } \
- }
-
-/**
- * @brief Define the base class instance.
- *
- * Macro that defines whole instance variable and fill it with initialization data.
- *
- * The tricky part is @c class_config_part.
- * The configuration data here has to be placed inside brackets.
- * Then any type of values can be used depending on the type used in @ref APP_USBD_CLASS_TYPEDEF.
- * If instance does not has any specyfic data, use just empty bracket here.
- * @code
- * APP_USBD_CLASS_TYPEDEF(
- * some_base_class,
- * CLASS_BASE_CONFIGURATION,
- * APP_USBD_CLASS_INSTANCE_SPECIFIC_DEC_NONE,
- * APP_USBD_CLASS_DATA_SPECIFIC_DEC_NONE
- * );
- * APP_USBD_CLASS_INST_DEF(
- * some_base_class_inst,
- * some_base_class,
- * base_class_event_handler,
- * CLASS_BASE_CONFIGURATION,
- * () // Empty configuration
- * );
- * @endcode
- *
- * If the type of instance configuration is simple type, just provide initialization value:
- * @code
- * APP_USBD_CLASS_TYPEDEF(
- * some_base_class,
- * CLASS_BASE_CONFIGURATION,
- * APP_USBD_CLASS_INSTANCE_SPECIFIC_DEC_NONE,
- * APP_USBD_CLASS_DATA_SPECIFIC_DEC(uint8_t)
- * );
- * APP_USBD_CLASS_INST_DEF(
- * some_base_class_inst,
- * some_base_class,
- * base_class_event_handler,
- * CLASS_BASE_CONFIGURATION,
- * (12) // Example values
- * );
- * @endcode
- *
- * If the type of instance configuration is structure, provide initialization value for the whole structure:
- * @code
- * typedef structure
- * {
- * uint32_t p1;
- * uint8_t p2;
- * }my_config_t;
- *
- * APP_USBD_CLASS_TYPEDEF(
- * some_base_class,
- * CLASS_BASE_CONFIGURATION,
- * APP_USBD_CLASS_INSTANCE_SPECIFIC_DEC_NONE,
- * APP_USBD_CLASS_DATA_SPECIFIC_DEC(my_config_t)
- * );
- * APP_USBD_CLASS_INST_DEF(
- * some_base_class_inst,
- * some_base_class,
- * base_class_event_handler,
- * CLASS_BASE_CONFIGURATION,
- * ({12, 3}) // Example values
- * );
- * @endcode
- *
- * @param instance_name The name of created instance variable.
- * It would be constant variable and its type would be app_usbd_class_inst_t.
- * @param type_name The name of the variable type. It has to be the same type that was passed to
- * @ref APP_USBD_CLASS_TYPEDEF
- * @param class_methods Class unified interface.
- * @param interfaces_configs The same configuration data that the one passed to @ref APP_USBD_CLASS_TYPEDEF
- * @param class_config_part Configuration data to the type that was declared by class_data_dec when calling
- * @ref APP_USBD_CLASS_TYPEDEF.
- * Configuration data has to be provided in brackets.
- * It would be extracted from brackets and placed in initialization part of configuration structure.
- * See detailed description of this macro for more informations.
- */
-#define APP_USBD_CLASS_INST_DEF(instance_name, \
- type_name, \
- class_methods, \
- interfaces_configs, \
- class_config_part) \
- static APP_USBD_CLASS_DATA_TYPE(type_name) CONCAT_2(instance_name, _data); \
- static const APP_USBD_CLASS_INSTANCE_TYPE(type_name) instance_name = \
- APP_USBD_CLASS_INSTANCE_INITVAL( \
- &CONCAT_2(instance_name, _data), \
- class_methods, \
- interfaces_configs, \
- class_config_part)
-
-
-/**
- * @brief Define the base class instance in global scope.
- *
- * This is the same macro like @ref APP_USBD_CLASS_INST_DEF but it creates the instance
- * without static keyword.
- *
- * @param instance_name See documentation for @ref APP_USBD_CLASS_INST_DEF
- * @param type_name See documentation for @ref APP_USBD_CLASS_INST_DEF
- * @param class_methods See documentation for @ref APP_USBD_CLASS_INST_DEF
- * @param interfaces_configs See documentation for @ref APP_USBD_CLASS_INST_DEF
- * @param class_config_part See documentation for @ref APP_USBD_CLASS_INST_DEF
- */
-#define APP_USBD_CLASS_INST_GLOBAL_DEF(instance_name, \
- type_name, \
- class_methods, \
- interfaces_configs, \
- class_config_part) \
- static APP_USBD_CLASS_DATA_TYPE(type_name) CONCAT_2(instance_name, _data); \
- const APP_USBD_CLASS_INSTANCE_TYPE(type_name) instance_name = \
- APP_USBD_CLASS_INSTANCE_INITVAL( \
- &CONCAT_2(instance_name, _data), \
- class_methods, \
- interfaces_configs, \
- class_config_part)
-
-/**
- * @brief Same as @ref APP_USBD_CLASS_INST_GLOBAL_DEF but for class with EP0 only.
- */
-#define APP_USBD_CLASS_INST_NO_EP_GLOBAL_DEF(instance_name, \
- type_name, \
- class_methods, \
- interfaces_configs, \
- class_config_part) \
- static APP_USBD_CLASS_DATA_TYPE(type_name) CONCAT_2(instance_name, _data); \
- const APP_USBD_CLASS_INSTANCE_TYPE(type_name) instance_name = \
- APP_USBD_CLASS_INSTANCE_NO_EP_INITVAL( \
- &CONCAT_2(instance_name, _data), \
- class_methods, \
- interfaces_configs, \
- class_config_part)
-/**
- * @brief Access class specific configuration.
- *
- * Macro that returns class specific configuration.
- *
- * @param[in] p_inst Instance pointer.
- *
- * @return A pointer for class specific part of the instance.
- *
- * @note If macro is used on the instance that has no class specific configuration
- * an error would be generated during compilation.
- */
-#define APP_USBD_CLASS_GET_SPECIFIC_CONFIG(p_inst) (&((p_inst)->specific.class_part))
-
-/**
- * @brief Access class specific data.
- *
- * @param[in] p_inst Instance pointer.
- *
- * @return A pointer for class specific part of writable data.
- *
- * @note If macro is used on the instance that has no class specific data
- * an error would be generated during compilation.
- */
-#define APP_USBD_CLASS_GET_SPECIFIC_DATA(p_inst) (&(((p_inst)->specific.p_data)->class_part))
-
-/**
- * @brief Macro to get base instance from class specific instance.
- *
- * This macro may be used on class specific instance to get base instance that
- * can be processed by base instance access functions.
- * Class specific instance can be just casted to class base instance,
- * but then we would totally lost type safety.
- *
- * A little more safe is to use pointer to base member of class instance.
- * This would generate an error when used on any variable that has no base member
- * and would generate also error if this base member is wrong type.
- */
-#define APP_USBD_CLASS_BASE_INSTANCE(p_inst) (&((p_inst)->base))
-
-/*lint -emacro(142 438 616 646, APP_USBD_CLASS_DESCRIPTOR_INIT, APP_USBD_CLASS_DESCRIPTOR_BEGIN, APP_USBD_CLASS_DESCRIPTOR_YIELD, APP_USBD_CLASS_DESCRIPTOR_END, APP_USBD_CLASS_DESCRIPTOR_WRITE)*/
-
-/**
- * @brief Initialize class descriptor.
- *
- * @param[in] p_ctx Class descriptor context.
- */
-
-#define APP_USBD_CLASS_DESCRIPTOR_INIT(p_ctx) \
- (p_ctx)->line = 0;
-
-/**
- * @brief Begin class descriptor.
- *
- * @param[in] p_ctx Class descriptor context.
- * @param[in] p_buff Buffer to write into.
- * @param[in] max_size Size of the buffer.
- */
-
-#define APP_USBD_CLASS_DESCRIPTOR_BEGIN(p_ctx, p_buff, max_size) \
- ASSERT((p_ctx) != NULL); \
- app_usbd_class_descriptor_state_t this_descriptor_feed; \
- this_descriptor_feed.p_buffer = (p_buff); \
- this_descriptor_feed.current_size = 0; \
- this_descriptor_feed.maximum_size = (max_size); \
- this_descriptor_feed.p_context = (p_ctx); \
- switch ((this_descriptor_feed.p_context)->line) \
- { \
- case 0: \
- ;
-
-/**
- * @brief Yield class descriptor
- *
- */
-
-#define APP_USBD_CLASS_DESCRIPTOR_YIELD() \
-do \
-{ \
- (this_descriptor_feed.p_context)->line = __LINE__; \
- return true; \
- case __LINE__: \
- ; \
-} while (0)
-
-/*lint -emacro(438 527, APP_USBD_CLASS_DESCRIPTOR_END)*/
-
-/**
- * @brief End class descriptor.
- *
- * This function has to be called at the end of class descriptor feeder function.
- * No other operations in feeder function can be done after calling it.
- */
-
-#define APP_USBD_CLASS_DESCRIPTOR_END() \
- APP_USBD_CLASS_DESCRIPTOR_YIELD(); \
- } \
- (this_descriptor_feed.p_context)->line = 0; \
- return false;
-
-
-/**
- * @brief Write descriptor using protothreads.
- *
- * This function writes one byte to the buffer with offset. If buffer is full
- * it yields.
- *
- * It is used by the class descriptor feeders internally.
- *
- * @ref APP_USBD_CLASS_DESCRIPTOR_BEGIN has to be called before using this function.
- * @ref APP_USBD_CLASS_DESCRIPTOR_END has to be called after last use of this function.
- *
- * @param data Byte to be written to buffer.
- */
-#define APP_USBD_CLASS_DESCRIPTOR_WRITE(data) \
-do \
-{ \
- (this_descriptor_feed.p_context)->data_buffer = (data); \
- if (this_descriptor_feed.current_size >= this_descriptor_feed.maximum_size) \
- { \
- APP_USBD_CLASS_DESCRIPTOR_YIELD(); \
- } \
- if(this_descriptor_feed.p_buffer != NULL) \
- { \
- *(this_descriptor_feed.p_buffer + this_descriptor_feed.current_size) = \
- (this_descriptor_feed.p_context)->data_buffer; \
- } \
- this_descriptor_feed.current_size++; \
-} while(0);
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* APP_USBD_CLASS_BASE_H__ */
+/**
+ * Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef APP_USBD_CLASS_BASE_H__
+#define APP_USBD_CLASS_BASE_H__
+
+#include <stdint.h>
+#include <stddef.h>
+
+#include "app_usbd_types.h"
+#include "nrf_drv_usbd.h"
+#include "nrf_assert.h"
+#include "app_util.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup app_usbd_class_base USBD Class Base module
+ * @ingroup app_usbd
+ *
+ * @brief @tagAPI52840 The base for any class instance is defined in this module.
+ *
+ * @details Any class instance must start from base class instance structure.
+ * This makes them compatible with USBD library independently of the
+ * implementation details.
+ * @{
+ */
+
+/**
+ * @brief Endpoint configuration.
+ */
+typedef struct
+{
+ nrf_drv_usbd_ep_t address; //!< Endpoint address
+} app_usbd_class_ep_conf_t;
+
+/**
+ * @brief Interface configuration.
+ */
+typedef struct
+{
+ uint8_t number; //!< Interface number
+ uint8_t ep_cnt; //!< Endpoint number
+ uint8_t ep_offset; //!< Offset of the first endpoint
+ /**< Offset in bytes of the first endpoint.
+ * The offset is calculated from the address of this interface structure
+ */
+} app_usbd_class_iface_conf_t;
+
+/**
+ * @brief Instance variable data.
+ */
+typedef struct
+{
+ app_usbd_class_inst_t const * p_next; //!< Pointer to the next instance
+ app_usbd_class_inst_t const * p_sof_next; //!< Pointer to the next SOF event requiring instance
+ app_usbd_sof_interrupt_handler_t sof_handler; //!< Instance specific SOF interrupt handler
+} app_usbd_class_data_t;
+
+/**
+ * @brief Class descriptor context.
+ */
+typedef struct
+{
+ uint32_t line; //!< Number of line to resume writing descriptors from
+ uint8_t data_buffer; //!< Data from last call of feeder
+} app_usbd_class_descriptor_ctx_t;
+
+/**
+ * @brief Class descriptor state.
+ */
+typedef struct
+{
+ uint8_t * p_buffer; //!< Pointer to buffer
+ uint32_t current_size; //!< Current size of descriptor
+ uint32_t maximum_size; //!< Maximum size of descriptor
+ app_usbd_class_descriptor_ctx_t * p_context; //!< Pointer to context
+} app_usbd_class_descriptor_state_t;
+
+/**
+ * @brief Class interface function set.
+ * */
+typedef struct {
+ /**
+ * @brief Instance callback function.
+ *
+ * The function used by every class instance.
+ * @param[in,out] p_inst Instance of the class.
+ * @param[in] p_event Event to process.
+ *
+ * @return Standard error code.
+ *
+ * @note If given event is not supported by class, return @ref NRF_ERROR_NOT_SUPPORTED
+ */
+ ret_code_t (* event_handler)(app_usbd_class_inst_t const * const p_inst,
+ app_usbd_complex_evt_t const * const p_event);
+
+ /**
+ * @brief Instance feed descriptors.
+ *
+ * Feeds whole descriptor of the instance.
+ * @param[in] p_ctx Class descriptor context.
+ * @param[in,out] p_inst Instance of the class.
+ * @param[out] p_buff Buffer for descriptor.
+ * @param[in] max_size Requested size of the descriptor.
+ *
+ * @return True if not finished feeding the descriptor, false if done.
+ */
+ bool (* feed_descriptors)(app_usbd_class_descriptor_ctx_t * p_ctx,
+ app_usbd_class_inst_t const * p_inst,
+ uint8_t * p_buff,
+ size_t max_size);
+
+
+ /**
+ * @brief Select interface
+ *
+ * Function called when class interface has to be selected.
+ *
+ * This function would be called for every interface when:
+ * - SET_INTERFACE command is processed by the default handler
+ * - SET_CONFIG(1) command is processed by the default handler
+ *
+ * @note Remember to disable all the endpoints that are not used
+ * in the selected configuration.
+ * @note If this function pointer is NULL default procedure would
+ * just enable all the interface endpoints and selecting
+ * alternate configurations other than 0 would generate error.
+ * @note Calling the function with alternate setting 0 has to always succeed.
+ *
+ * @param[in,out] p_inst Instance of the class
+ * @param[in] iface_idx Index of the interface inside class structure
+ * @param[in] alternate Alternate setting that should be selected
+ *
+ * @return Function has to return @ref NRF_SUCCESS when it has successfully proceed
+ * interface selection.
+ * If it returns @ref NRF_ERROR_NOT_SUPPORTED, default function would be used
+ * to proceed the request - just like there would be NULL pointer in this field.
+ * Any other kind of error would make library to STALL the request.
+ */
+ ret_code_t (* iface_select)(app_usbd_class_inst_t const * const p_inst,
+ uint8_t iface_idx,
+ uint8_t alternate);
+
+ /**
+ * @brief Deselect interface.
+ *
+ * Function called when the class interface has to be deselected.
+ *
+ * This function would be called for every interface when:
+ * - Library start internal event is processed by the default handler
+ * - RESET event is processed by the default handler
+ * - SET_ADDRESS is processed by the default handler
+ * - SET_CONFIG(0) is processed by the default handler
+ *
+ * @note Just after this function is called all the interface
+ * endpoints would be disabled.
+ * This function does not has to take care about it.
+ * @note If this function pointer is NULL default procedure would
+ * just disable all the interface endpoints.
+ *
+ * @param[in,out] p_inst Instance of the class.
+ * @param[in] iface_idx Index of the interface inside class structure.
+ */
+ void (* iface_deselect)(app_usbd_class_inst_t const * const p_inst, uint8_t iface_idx);
+
+ /**
+ * @brief Get current interface.
+ *
+ * Function called when class interface has to return its alternate settings
+ * in reaction on GET_INTERFACE command.
+ * It should be defined in a pair with @ref app_usbd_class_methods_t::iface_select.
+ *
+ * @param[in] p_inst Instance of the class.
+ * @param[in] iface_idx Index of the interface inside class structure.
+ *
+ * @return Current alternate setting of the selected interface.
+ *
+ * @note For the classes that support this function, when an interface that has not alternate
+ * configurations has been selected this function has to return 0 - default alternate setting.
+ *
+ * @note If this function pointer it NULL default procedure would return alternate interface
+ * value 0.
+ */
+ uint8_t (* iface_selection_get)(app_usbd_class_inst_t const * const p_inst, uint8_t iface_idx);
+
+} app_usbd_class_methods_t;
+
+/**
+ * @brief The instance structure itself.
+ *
+ * The structure of base class instance.
+ */
+struct app_usbd_class_inst_s
+{
+ app_usbd_class_data_t * p_data; //!< Pointer to non-constant data
+ app_usbd_class_methods_t const * p_class_methods; //!< Class interface methods
+ struct
+ {
+ uint8_t cnt; //!< Number of defined interfaces
+ uint8_t config[]; //!< Interface configuration data followed by endpoint data
+ } iface; //!< Interface structure
+};
+
+
+/**
+ * @brief Get total number of interfaces.
+ *
+ *
+ */
+static inline uint8_t app_usbd_class_iface_count_get(app_usbd_class_inst_t const * const p_inst)
+{
+ return p_inst->iface.cnt;
+}
+
+/**
+ * @brief Interface accessing function.
+ *
+ * Get interface pointer.
+ * Interfaces create continuous array in the memory so it is possible to get
+ * interface with index 0 and then just iterate to the next one.
+ *
+ * @param p_inst Pointer to the class instance
+ * @param iface_idx Index of the instance to get.
+ * This is not the interface identifier.
+ * Technically it is the index of the interface in the class description array.
+ * @return Pointer to the interface configuration parameters or NULL if given index is out of interface scope for given class.
+ */
+static inline app_usbd_class_iface_conf_t const * app_usbd_class_iface_get(
+ app_usbd_class_inst_t const * const p_inst,
+ uint8_t iface_idx)
+{
+ ASSERT(NULL != p_inst);
+ if (iface_idx >= (app_usbd_class_iface_count_get(p_inst)))
+ {
+ return NULL;
+ }
+
+ app_usbd_class_iface_conf_t const * p_interface =
+ (app_usbd_class_iface_conf_t const * )(p_inst->iface.config);
+ return &(p_interface[iface_idx]);
+}
+
+/**
+ * @brief Get interface number.
+ *
+ * @param p_iface Pointer to interface structure.
+ *
+ * @return Interface number from interface configuration structure.
+ */
+static inline uint8_t app_usbd_class_iface_number_get(
+ app_usbd_class_iface_conf_t const * const p_iface)
+{
+ return p_iface->number;
+}
+
+/**
+ * @brief Get number of endpoints in interface.
+ *
+ * @param p_iface Pointer to interface structure.
+ *
+ * @return Number of endpoints used by given interface.
+ */
+static inline uint8_t app_usbd_class_iface_ep_count_get(
+ app_usbd_class_iface_conf_t const * const p_iface)
+{
+ return p_iface->ep_cnt;
+}
+
+/**
+ * @brief Interface Endpoint accessing function.
+ *
+ * @param p_iface Interface configuration pointer.
+ * @param ep_idx Endpoint index.
+ *
+ * @return Endpoint information structure pointer or NULL if given index is outside of endpoints for selected interface.
+ *
+ * @sa app_usbd_class_iface_get
+ */
+static inline app_usbd_class_ep_conf_t const * app_usbd_class_iface_ep_get(
+ app_usbd_class_iface_conf_t const * const p_iface,
+ uint8_t ep_idx)
+{
+ ASSERT(NULL != p_iface);
+ if (ep_idx >= p_iface->ep_cnt)
+ {
+ return NULL;
+ }
+
+ app_usbd_class_ep_conf_t const * p_ep =
+ (app_usbd_class_ep_conf_t const * )(((uint8_t const *)p_iface) + p_iface->ep_offset);
+ return &(p_ep[ep_idx]);
+}
+
+/**
+ * @brief Translate endpoint address to class index.
+ *
+ * @param p_iface Interface configuration pointer.
+ * @param ep_address Endpoint address.
+ *
+ * @return Endpoint index or number of endpoints if not found.
+ *
+ */
+static inline uint8_t app_usbd_class_iface_ep_idx_get(
+ app_usbd_class_iface_conf_t const * const p_iface,
+ nrf_drv_usbd_ep_t ep_address)
+{
+ ASSERT(NULL != p_iface);
+ app_usbd_class_ep_conf_t const * p_ep =
+ (app_usbd_class_ep_conf_t const * )(((uint8_t const *)p_iface) + p_iface->ep_offset);
+
+ uint8_t i;
+ for (i = 0; i < p_iface->ep_cnt; ++i)
+ {
+ if (ep_address == p_ep[i].address)
+ {
+ break;
+ }
+ }
+
+ return i;
+}
+
+/**
+ * @brief Get the selected endpoint address.
+ *
+ * @param p_ep Endpoint configuration structure.
+ *
+ * @return Endpoint address
+ */
+static inline nrf_drv_usbd_ep_t app_usbd_class_ep_address_get(app_usbd_class_ep_conf_t const * p_ep)
+{
+ return (nrf_drv_usbd_ep_t)p_ep->address;
+}
+
+/**
+ * @brief Get the pointer to the writable instance data.
+ *
+ * @param p_inst Instance pointer.
+ * @return Pointer to writable instance data.
+ */
+static inline app_usbd_class_data_t * app_usbd_class_data_access(
+ app_usbd_class_inst_t const * const p_inst)
+{
+ return p_inst->p_data;
+}
+
+/**
+ * @name Internal macros for argument mapping
+ *
+ * Functions to be used as a mapping macro for @ref MACRO_MAP, @ref MACRO_MAP_FOR or @ref MACRO_MAP_FOR_PARAM
+ * @{
+ */
+ /**
+ * @brief Count the number of endpoints in given configuration.
+ *
+ * Config should be given as a interface configuration in a brackets:
+ * @code
+ * (interface_nr, ep1, ep2, ep3)
+ * @endcode
+ * Number of endpoints may vary from 0 to a few (technically up to 16, but it seems not to make sense to use more than 4).
+ * Interface number is always present.
+ *
+ * @param iface_config Single interface configuration (in brackets).
+ *
+ * @return Number of endpoints in interface. This is computed value - can be used by compiler but not by preprocessor.
+ */
+ #define APP_USBD_CLASS_CONF_IFACE_EP_COUNT_(iface_config) \
+ (NUM_VA_ARGS(BRACKET_EXTRACT(iface_config)) - 1)
+
+ /**
+ * @brief Adds the number of endpoints in given config to the current value.
+ *
+ * This is basically @ref APP_USBD_CLASS_CONF_IFACE_EP_COUNT_ with plus sign added.
+ *
+ * @param iface_config See parameters documentation in @ref APP_USBD_CLASS_CONF_IFACE_EP_COUNT_
+ *
+ * @return Plus sign followed by number of endpoints in interface.
+ *
+ * @sa APP_USBD_CLASS_CONF_IFACE_EP_COUNT_
+ */
+ #define APP_USBD_CLASS_CONF_IFACE_EP_PLUS_COUNT_(iface_config) \
+ + APP_USBD_CLASS_CONF_IFACE_EP_COUNT_(iface_config)
+
+ /**
+ * @brief Create variable for endpoint.
+ */
+
+ /**
+ * @brief Extract endpoints given interface configuration.
+ *
+ * This macro gets single endpoint configuration and extracts all the endpoints.
+ * It also adds comma on the end of extracted endpoints.
+ * This way when this macro is called few times it generates nice list of all endpoints
+ * that may be used to array initialization.
+ *
+ * @param iface_config Single interface configuration in brackets.
+ * The format should be similar like described in @ref APP_USBD_CLASS_CONF_IFACE_EP_COUNT_.
+ */
+ #define APP_USBD_CLASS_IFACE_EP_EXTRACT_(iface_config) \
+ CONCAT_2(APP_USBD_CLASS_IFACE_EP_EXTRACT_, \
+ NUM_VA_ARGS_IS_MORE_THAN_1(BRACKET_EXTRACT(iface_config))) \
+ (BRACKET_EXTRACT(iface_config))
+
+ /**
+ * @brief Auxiliary macro for @ref APP_USBD_CLASS_IFACE_EP_EXTRACT_
+ *
+ * This macro is called when interface has no endpoints.
+ */
+ #define APP_USBD_CLASS_IFACE_EP_EXTRACT_0(iface_nr)
+
+ /**
+ * @brief Auxiliary macro for @ref APP_USBD_CLASS_IFACE_EP_EXTRACT_
+ *
+ * This macro is called when interface has at least one endpoint.
+ */
+ #define APP_USBD_CLASS_IFACE_EP_EXTRACT_1(...) \
+ APP_USBD_CLASS_IFACE_EP_EXTRACT_1_(__VA_ARGS__)
+
+ #define APP_USBD_CLASS_IFACE_EP_EXTRACT_1_(iface_nr, ...) \
+ MACRO_MAP_REC(APP_USBD_CLASS_IFACE_EP_EXTRACT_1__, __VA_ARGS__)
+
+ #define APP_USBD_CLASS_IFACE_EP_EXTRACT_1__(ep) \
+ {(nrf_drv_usbd_ep_t) (ep)},
+
+ /**
+ * @brief Generate configuration for single interface.
+ *
+ * This macro extract configuration for single interface.
+ * The configuration is inside curly brackets and comma is added on the end.
+ * This mean it can be directly used to init array of interface configurations.
+ *
+ * @param iface_config Single interface configuration.
+ * @param N Currently processed configuration.
+ * @param iface_configs All interfaces configuration in brackets.
+ */
+ #define APP_USBD_CLASS_IFACE_CONFIG_EXTRACT_(iface_config, N, iface_configs) \
+ CONCAT_2(APP_USBD_CLASS_IFACE_CONFIG_EXTRACT_, \
+ NUM_VA_ARGS_IS_MORE_THAN_1(BRACKET_EXTRACT(iface_config))) \
+ (N, iface_configs, BRACKET_EXTRACT(iface_config))
+
+ /**
+ * @brief Macro used when there was an error extracting number of configs.
+ *
+ * Throws a syntax error.
+ */
+ #define APP_USBD_CLASS_IFACE_CONFIG_EXTRACT_x(iface_config, N, iface_configs) \
+ [N] = !!!iface_config!!!
+ /**
+ * @brief Auxiliary macro for @ref APP_USBD_CLASS_IFACE_CONFIG_EXTRACT_
+ *
+ * This macro is called when interface has no endpoints.
+ */
+ #define APP_USBD_CLASS_IFACE_CONFIG_EXTRACT_0(N, iface_configs, iface_nr) \
+ APP_USBD_CLASS_IFACE_CONFIG_EXTRACT_0_(N, iface_configs, iface_nr)
+ #define APP_USBD_CLASS_IFACE_CONFIG_EXTRACT_0_(N, iface_configs, iface_nr) \
+ { .number = iface_nr, .ep_cnt = 0, .ep_offset = 0 },
+
+ /**
+ * @brief Auxiliary macro for @ref APP_USBD_CLASS_IFACE_CONFIG_EXTRACT_
+ *
+ * This macro is called when interface has at last one endpoint.
+ */
+ #define APP_USBD_CLASS_IFACE_CONFIG_EXTRACT_1(N, iface_configs, ...) \
+ APP_USBD_CLASS_IFACE_CONFIG_EXTRACT_1_(N, iface_configs, __VA_ARGS__)
+ #define APP_USBD_CLASS_IFACE_CONFIG_EXTRACT_1_(N, iface_configs, iface_nr, ...) \
+ { .number = iface_nr, .ep_cnt = NUM_VA_ARGS(__VA_ARGS__), \
+ .ep_offset = APP_USBD_CLASS_CONF_TOTAL_EP_COUNT_N(N, iface_configs) * \
+ sizeof(app_usbd_class_ep_conf_t) \
+ + ((NUM_VA_ARGS(BRACKET_EXTRACT(iface_configs)) - N) * \
+ sizeof(app_usbd_class_iface_conf_t)) \
+ },
+
+/** @} */
+
+
+/**
+ * @name Macros that uses mapping macros internally
+ *
+ * Auxiliary macros that uses mapping macros to make some calculations or realize other functionality.
+ * Mapped here for easier unit testing and to hide complex mapping functions calling.
+ * @{
+ */
+
+/**
+ * @brief Count total number of endpoints.
+ *
+ * @param iface_configs List of interface configurations like explained
+ * in documentation for @ref APP_USBD_CLASS_INSTANCE_TYPEDEF
+ *
+ * @return The equation to calculate the number of endpoints by compiler.
+ */
+#define APP_USBD_CLASS_CONF_TOTAL_EP_COUNT(iface_configs) \
+ (0 MACRO_MAP(APP_USBD_CLASS_CONF_IFACE_EP_PLUS_COUNT_, BRACKET_EXTRACT(iface_configs)))
+
+/**
+ * @brief Count total number of endpoint up-to interface index.
+ *
+ * The version of @ref APP_USBD_CLASS_CONF_TOTAL_EP_COUNT macro which takes the
+ * number of interfaces to analyze.
+ *
+ * @param N Number of interfaces to analyze.
+ * @param iface_configs List of interface configurations like explained
+ * in documentation for @ref APP_USBD_CLASS_INSTANCE_TYPEDEF
+ *
+ * @return The equation to calculate the number of endpoints by compiler.
+ */
+#define APP_USBD_CLASS_CONF_TOTAL_EP_COUNT_N(N, iface_configs) \
+ (0 MACRO_MAP_N(N, APP_USBD_CLASS_CONF_IFACE_EP_PLUS_COUNT_, BRACKET_EXTRACT(iface_configs)))
+
+/**
+ * @brief Extract configurations for interfaces.
+ *
+ * This macro extracts the configurations for every interface.
+ * Basically uses the @ref APP_USBD_CLASS_IFACE_CONFIG_EXTRACT_ macro on every
+ * configuration found.
+ *
+ * This should generate interface configuration initialization data
+ * in comma separated initializers in curly braces.
+ *
+ * @param iface_configs List of interface configurations like explained
+ * in documentation for @ref APP_USBD_CLASS_INSTANCE_TYPEDEF
+ *
+ * @return Comma separated initialization data for all interfaces.
+ */
+/*lint -emacro( (40), APP_USBD_CLASS_IFACES_CONFIG_EXTRACT) */
+#define APP_USBD_CLASS_IFACES_CONFIG_EXTRACT(iface_configs) \
+ MACRO_MAP_FOR_PARAM(iface_configs, \
+ APP_USBD_CLASS_IFACE_CONFIG_EXTRACT_, \
+ BRACKET_EXTRACT(iface_configs))
+
+/**
+ * @brief Extract all endpoints.
+ *
+ * Macro that extracts all endpoints from every interface.
+ *
+ * @param iface_configs List of interface configurations like explained
+ * in documentation for @ref APP_USBD_CLASS_INSTANCE_TYPEDEF
+ *
+ * @return Comma separated list of endpoints.
+ */
+/*lint -emacro( (40), APP_USBD_CLASS_IFACES_EP_EXTRACT) */
+#define APP_USBD_CLASS_IFACES_EP_EXTRACT(iface_configs) \
+ MACRO_MAP(APP_USBD_CLASS_IFACE_EP_EXTRACT_, BRACKET_EXTRACT(iface_configs))
+
+
+/** @} */
+
+
+/**
+ * @brief USBD instance of class mnemonic.
+ *
+ * Macro that generates mnemonic for the name of the structure that describes instance for selected class.
+ *
+ * @param type_name The name of the instance without _t postfix.
+ *
+ * @return The name with the right postfix to create the name for the type for the class.
+ */
+#define APP_USBD_CLASS_INSTANCE_TYPE(type_name) CONCAT_2(type_name, _t)
+
+/**
+ * @brief USBD data for instance class mnemonic.
+ *
+ * The mnemonic of the variable type that holds writable part of the class instance.
+ *
+ * @param type_name The name of the instance without _t postfix.
+ *
+ * @return The name with the right postfix to create the name for the data type for the class.
+ */
+#define APP_USBD_CLASS_DATA_TYPE(type_name) CONCAT_2(type_name, _data_t)
+
+/**
+ * @brief Declare class specific member of class instance.
+ *
+ * @param type Type of the attached class configuration.
+ *
+ * @sa APP_USBD_CLASS_INSTANCE_TYPEDEF
+ */
+#define APP_USBD_CLASS_INSTANCE_SPECIFIC_DEC(type) type class_part;
+
+/**
+ * @brief Used if there is no class specific configuration.
+ *
+ * This constant can be used if there is no specific configuration inside created instance.
+ *
+ * @sa APP_USBD_CLASS_INSTANCE_TYPEDEF
+ */
+#define APP_USBD_CLASS_INSTANCE_SPECIFIC_DEC_NONE
+
+/**
+ * @brief Declare class specific member of class data.
+ *
+ * @param type Type of the attached class data.
+ *
+ * @sa APP_USBD_CLASS_DATA_TYPEDEF
+ */
+#define APP_USBD_CLASS_DATA_SPECIFIC_DEC(type) APP_USBD_CLASS_INSTANCE_SPECIFIC_DEC(type)
+
+/**
+ * @brief Used if there is no class specific data.
+ *
+ * This constant can be used if there is no specific writable data inside created instance.
+ *
+ * @sa APP_USBD_CLASS_DATA_TYPEDEF
+ */
+#define APP_USBD_CLASS_DATA_SPECIFIC_DEC_NONE APP_USBD_CLASS_INSTANCE_SPECIFIC_DEC_NONE
+
+
+
+
+/**
+ * @brief Instance structure declaration.
+ *
+ * The macro that declares a variable type that would be used to store given class instance.
+ * Class instance stores all the data from @ref app_usbd_class_inst_t and overlaid data for specified class.
+ *
+ * The structure of interface configuration data:
+ * @code
+ * (
+ * (iface1_nr, (ep1, ep2, ep3)),
+ (iface2_nr),
+ (iface3_nr, (ep4))
+ * )
+ * @endcode
+ *
+ * @param type_name The name of the instance without _t postfix.
+ * @param interfaces_configs List of interface configurations like explained above.
+ * @param class_config_dec Result of the macro
+ * @ref APP_USBD_CLASS_INSTANCE_SPECIFIC_DEC or
+ * @ref APP_USBD_CLASS_INSTANCE_SPECIFIC_DEC_NONE
+ *
+ * @return The definition of the structure type that holds all the required data.
+ *
+ * @note It should not be used directly in the final application. See @ref APP_USBD_CLASS_DATA_TYPEDEF instead.
+ *
+ * @note APP_USBD_CLASS_DATA_TYPEDEF has to be called first for the compilation to success.
+ *
+ * @sa APP_USBD_CLASS_TYPEDEF
+ */
+#define APP_USBD_CLASS_INSTANCE_TYPEDEF(type_name, interfaces_configs, class_config_dec) \
+ typedef union CONCAT_2(type_name, _u) \
+ { \
+ app_usbd_class_inst_t base; \
+ struct \
+ { \
+ APP_USBD_CLASS_DATA_TYPE(type_name) * p_data; \
+ app_usbd_class_methods_t const * p_class_methods; \
+ struct \
+ { \
+ uint8_t cnt; \
+ app_usbd_class_iface_conf_t \
+ config[NUM_VA_ARGS(BRACKET_EXTRACT(interfaces_configs))]; \
+ app_usbd_class_ep_conf_t \
+ ep[APP_USBD_CLASS_CONF_TOTAL_EP_COUNT(interfaces_configs)]; \
+ } iface; \
+ class_config_dec \
+ } specific; \
+ } APP_USBD_CLASS_INSTANCE_TYPE(type_name)
+
+/**
+ * @brief Same as @ref APP_USBD_CLASS_INSTANCE_TYPEDEF but for class with EP0 only.
+ */
+#define APP_USBD_CLASS_INSTANCE_NO_EP_TYPEDEF(type_name, interfaces_configs, class_config_dec) \
+ typedef union CONCAT_2(type_name, _u) \
+ { \
+ app_usbd_class_inst_t base; \
+ struct \
+ { \
+ APP_USBD_CLASS_DATA_TYPE(type_name) * p_data; \
+ app_usbd_class_methods_t const * p_class_methods; \
+ struct \
+ { \
+ uint8_t cnt; \
+ app_usbd_class_iface_conf_t \
+ config[NUM_VA_ARGS(BRACKET_EXTRACT(interfaces_configs))]; \
+ } iface; \
+ class_config_dec \
+ } specific; \
+ } APP_USBD_CLASS_INSTANCE_TYPE(type_name)
+
+/**
+ * @brief Writable data structure declaration.
+ *
+ * The macro that declares a variable type that would be used to store given class writable data.
+ * Writable data contains base part of the type @ref app_usbd_class_data_t followed by
+ * class specific data.
+ *
+ * @param type_name The name of the type without _t postfix.
+ * @param class_data_dec Result of the macro
+ * @ref APP_USBD_CLASS_DATA_SPECIFIC_DEC or
+ * @ref APP_USBD_CLASS_DATA_SPECIFIC_DEC_NONE
+ *
+ * @return The definition of the structure type that holds all the required writable data.
+ *
+ * @note It should not be used directly in the final application. See @ref APP_USBD_CLASS_DATA_TYPEDEF instead.
+ *
+ * @sa APP_USBD_CLASS_TYPEDEF
+ */
+#define APP_USBD_CLASS_DATA_TYPEDEF(type_name, class_data_dec) \
+ typedef struct \
+ { \
+ app_usbd_class_data_t base; \
+ class_data_dec \
+ }APP_USBD_CLASS_DATA_TYPE(type_name)
+
+
+/**
+ * @brief Declare all data types required by the class instance.
+ *
+ * Macro that declares data type first and then instance type.
+ *
+ * @param type_name The name of the type without _t postfix.
+ * @param interface_configs List of interface configurations like in @ref APP_USBD_CLASS_INSTANCE_TYPEDEF.
+ * @param class_config_dec Result of the macro
+ * @ref APP_USBD_CLASS_INSTANCE_SPECIFIC_DEC or
+ * @ref APP_USBD_CLASS_INSTANCE_SPECIFIC_DEC_NONE
+ * @param class_data_dec Result of the macro
+ * @ref APP_USBD_CLASS_DATA_SPECIFIC_DEC or
+ * @ref APP_USBD_CLASS_DATA_SPECIFIC_DEC_NONE
+ *
+ * @return Declaration of the data type for the instance and instance itself.
+ *
+ * @sa APP_USBD_CLASS_DATA_TYPEDEF
+ * @sa APP_USBD_CLASS_INSTANCE_TYPEDEF
+ */
+#define APP_USBD_CLASS_TYPEDEF(type_name, interface_configs, class_config_dec, class_data_dec) \
+ APP_USBD_CLASS_DATA_TYPEDEF(type_name, class_data_dec); \
+ APP_USBD_CLASS_INSTANCE_TYPEDEF(type_name, interface_configs, class_config_dec)
+
+/**
+ * @brief Same as @ref APP_USBD_CLASS_TYPEDEF but for class with EP0 only.
+ */
+#define APP_USBD_CLASS_NO_EP_TYPEDEF(type_name, \
+ interface_configs, \
+ class_config_dec, \
+ class_data_dec) \
+ APP_USBD_CLASS_DATA_TYPEDEF(type_name, class_data_dec); \
+ APP_USBD_CLASS_INSTANCE_NO_EP_TYPEDEF(type_name, interface_configs, class_config_dec)
+
+/**
+ * @brief Forward declaration of type defined by @ref APP_USBD_CLASS_TYPEDEF
+ *
+ * @param type_name The name of the type without _t postfix.
+ * */
+#define APP_USBD_CLASS_FORWARD(type_name) union CONCAT_2(type_name, _u)
+
+/**
+ * @brief Generate the initialization data for.
+ *
+ * Macro that generates the initialization data for instance.
+ *
+ * @param p_ram_data Pointer to writable instance data structure.
+ * @param class_methods Class methods.
+ * @param interfaces_configs Exactly the same interface config data that in @ref APP_USBD_CLASS_INSTANCE_TYPEDEF
+ * @param class_config_part Configuration part. The data should be inside brackets.
+ * Any data here would be removed from brackets and then put as an initialization
+ * data for class_part member of instance structure.
+ *
+ * @note It should not be used directly in the final application. See @ref APP_USBD_CLASS_INST_DEF instead.
+ */
+#define APP_USBD_CLASS_INSTANCE_INITVAL(p_ram_data, \
+ class_methods, \
+ interfaces_configs, \
+ class_config_part) \
+ { \
+ .specific = { \
+ .p_data = p_ram_data, \
+ .p_class_methods = class_methods, \
+ .iface = { \
+ .cnt = NUM_VA_ARGS(BRACKET_EXTRACT(interfaces_configs)), \
+ .config = { APP_USBD_CLASS_IFACES_CONFIG_EXTRACT(interfaces_configs) }, \
+ .ep = { APP_USBD_CLASS_IFACES_EP_EXTRACT(interfaces_configs) } \
+ }, \
+ BRACKET_EXTRACT(class_config_part) \
+ } \
+ }
+
+/**
+ * @brief Same as @ref APP_USBD_CLASS_INSTANCE_INITVAL but for class with EP0 only.
+ */
+#define APP_USBD_CLASS_INSTANCE_NO_EP_INITVAL(p_ram_data, \
+ class_methods, \
+ interfaces_configs, \
+ class_config_part) \
+ { \
+ .specific = { \
+ .p_data = p_ram_data, \
+ .p_class_methods = class_methods, \
+ .iface = { \
+ .cnt = NUM_VA_ARGS(BRACKET_EXTRACT(interfaces_configs)), \
+ .config = { APP_USBD_CLASS_IFACES_CONFIG_EXTRACT(interfaces_configs) } \
+ }, \
+ BRACKET_EXTRACT(class_config_part) \
+ } \
+ }
+
+/**
+ * @brief Define the base class instance.
+ *
+ * Macro that defines whole instance variable and fill it with initialization data.
+ *
+ * The tricky part is @c class_config_part.
+ * The configuration data here has to be placed inside brackets.
+ * Then any type of values can be used depending on the type used in @ref APP_USBD_CLASS_TYPEDEF.
+ * If instance does not has any specyfic data, use just empty bracket here.
+ * @code
+ * APP_USBD_CLASS_TYPEDEF(
+ * some_base_class,
+ * CLASS_BASE_CONFIGURATION,
+ * APP_USBD_CLASS_INSTANCE_SPECIFIC_DEC_NONE,
+ * APP_USBD_CLASS_DATA_SPECIFIC_DEC_NONE
+ * );
+ * APP_USBD_CLASS_INST_DEF(
+ * some_base_class_inst,
+ * some_base_class,
+ * base_class_event_handler,
+ * CLASS_BASE_CONFIGURATION,
+ * () // Empty configuration
+ * );
+ * @endcode
+ *
+ * If the type of instance configuration is simple type, just provide initialization value:
+ * @code
+ * APP_USBD_CLASS_TYPEDEF(
+ * some_base_class,
+ * CLASS_BASE_CONFIGURATION,
+ * APP_USBD_CLASS_INSTANCE_SPECIFIC_DEC_NONE,
+ * APP_USBD_CLASS_DATA_SPECIFIC_DEC(uint8_t)
+ * );
+ * APP_USBD_CLASS_INST_DEF(
+ * some_base_class_inst,
+ * some_base_class,
+ * base_class_event_handler,
+ * CLASS_BASE_CONFIGURATION,
+ * (12) // Example values
+ * );
+ * @endcode
+ *
+ * If the type of instance configuration is structure, provide initialization value for the whole structure:
+ * @code
+ * typedef structure
+ * {
+ * uint32_t p1;
+ * uint8_t p2;
+ * }my_config_t;
+ *
+ * APP_USBD_CLASS_TYPEDEF(
+ * some_base_class,
+ * CLASS_BASE_CONFIGURATION,
+ * APP_USBD_CLASS_INSTANCE_SPECIFIC_DEC_NONE,
+ * APP_USBD_CLASS_DATA_SPECIFIC_DEC(my_config_t)
+ * );
+ * APP_USBD_CLASS_INST_DEF(
+ * some_base_class_inst,
+ * some_base_class,
+ * base_class_event_handler,
+ * CLASS_BASE_CONFIGURATION,
+ * ({12, 3}) // Example values
+ * );
+ * @endcode
+ *
+ * @param instance_name The name of created instance variable.
+ * It would be constant variable and its type would be app_usbd_class_inst_t.
+ * @param type_name The name of the variable type. It has to be the same type that was passed to
+ * @ref APP_USBD_CLASS_TYPEDEF
+ * @param class_methods Class unified interface.
+ * @param interfaces_configs The same configuration data that the one passed to @ref APP_USBD_CLASS_TYPEDEF
+ * @param class_config_part Configuration data to the type that was declared by class_data_dec when calling
+ * @ref APP_USBD_CLASS_TYPEDEF.
+ * Configuration data has to be provided in brackets.
+ * It would be extracted from brackets and placed in initialization part of configuration structure.
+ * See detailed description of this macro for more informations.
+ */
+#define APP_USBD_CLASS_INST_DEF(instance_name, \
+ type_name, \
+ class_methods, \
+ interfaces_configs, \
+ class_config_part) \
+ static APP_USBD_CLASS_DATA_TYPE(type_name) CONCAT_2(instance_name, _data); \
+ static const APP_USBD_CLASS_INSTANCE_TYPE(type_name) instance_name = \
+ APP_USBD_CLASS_INSTANCE_INITVAL( \
+ &CONCAT_2(instance_name, _data), \
+ class_methods, \
+ interfaces_configs, \
+ class_config_part)
+
+
+/**
+ * @brief Define the base class instance in global scope.
+ *
+ * This is the same macro like @ref APP_USBD_CLASS_INST_DEF but it creates the instance
+ * without static keyword.
+ *
+ * @param instance_name See documentation for @ref APP_USBD_CLASS_INST_DEF
+ * @param type_name See documentation for @ref APP_USBD_CLASS_INST_DEF
+ * @param class_methods See documentation for @ref APP_USBD_CLASS_INST_DEF
+ * @param interfaces_configs See documentation for @ref APP_USBD_CLASS_INST_DEF
+ * @param class_config_part See documentation for @ref APP_USBD_CLASS_INST_DEF
+ */
+#define APP_USBD_CLASS_INST_GLOBAL_DEF(instance_name, \
+ type_name, \
+ class_methods, \
+ interfaces_configs, \
+ class_config_part) \
+ static APP_USBD_CLASS_DATA_TYPE(type_name) CONCAT_2(instance_name, _data); \
+ const APP_USBD_CLASS_INSTANCE_TYPE(type_name) instance_name = \
+ APP_USBD_CLASS_INSTANCE_INITVAL( \
+ &CONCAT_2(instance_name, _data), \
+ class_methods, \
+ interfaces_configs, \
+ class_config_part)
+
+/**
+ * @brief Same as @ref APP_USBD_CLASS_INST_GLOBAL_DEF but for class with EP0 only.
+ */
+#define APP_USBD_CLASS_INST_NO_EP_GLOBAL_DEF(instance_name, \
+ type_name, \
+ class_methods, \
+ interfaces_configs, \
+ class_config_part) \
+ static APP_USBD_CLASS_DATA_TYPE(type_name) CONCAT_2(instance_name, _data); \
+ const APP_USBD_CLASS_INSTANCE_TYPE(type_name) instance_name = \
+ APP_USBD_CLASS_INSTANCE_NO_EP_INITVAL( \
+ &CONCAT_2(instance_name, _data), \
+ class_methods, \
+ interfaces_configs, \
+ class_config_part)
+/**
+ * @brief Access class specific configuration.
+ *
+ * Macro that returns class specific configuration.
+ *
+ * @param[in] p_inst Instance pointer.
+ *
+ * @return A pointer for class specific part of the instance.
+ *
+ * @note If macro is used on the instance that has no class specific configuration
+ * an error would be generated during compilation.
+ */
+#define APP_USBD_CLASS_GET_SPECIFIC_CONFIG(p_inst) (&((p_inst)->specific.class_part))
+
+/**
+ * @brief Access class specific data.
+ *
+ * @param[in] p_inst Instance pointer.
+ *
+ * @return A pointer for class specific part of writable data.
+ *
+ * @note If macro is used on the instance that has no class specific data
+ * an error would be generated during compilation.
+ */
+#define APP_USBD_CLASS_GET_SPECIFIC_DATA(p_inst) (&(((p_inst)->specific.p_data)->class_part))
+
+/**
+ * @brief Macro to get base instance from class specific instance.
+ *
+ * This macro may be used on class specific instance to get base instance that
+ * can be processed by base instance access functions.
+ * Class specific instance can be just casted to class base instance,
+ * but then we would totally lost type safety.
+ *
+ * A little more safe is to use pointer to base member of class instance.
+ * This would generate an error when used on any variable that has no base member
+ * and would generate also error if this base member is wrong type.
+ */
+#define APP_USBD_CLASS_BASE_INSTANCE(p_inst) (&((p_inst)->base))
+
+/*lint -emacro(142 438 616 646, APP_USBD_CLASS_DESCRIPTOR_INIT, APP_USBD_CLASS_DESCRIPTOR_BEGIN, APP_USBD_CLASS_DESCRIPTOR_YIELD, APP_USBD_CLASS_DESCRIPTOR_END, APP_USBD_CLASS_DESCRIPTOR_WRITE)*/
+
+/**
+ * @brief Initialize class descriptor.
+ *
+ * @param[in] p_ctx Class descriptor context.
+ */
+
+#define APP_USBD_CLASS_DESCRIPTOR_INIT(p_ctx) \
+ (p_ctx)->line = 0;
+
+/**
+ * @brief Begin class descriptor.
+ *
+ * @param[in] p_ctx Class descriptor context.
+ * @param[in] p_buff Buffer to write into.
+ * @param[in] max_size Size of the buffer.
+ */
+
+#define APP_USBD_CLASS_DESCRIPTOR_BEGIN(p_ctx, p_buff, max_size) \
+ ASSERT((p_ctx) != NULL); \
+ app_usbd_class_descriptor_state_t this_descriptor_feed; \
+ this_descriptor_feed.p_buffer = (p_buff); \
+ this_descriptor_feed.current_size = 0; \
+ this_descriptor_feed.maximum_size = (max_size); \
+ this_descriptor_feed.p_context = (p_ctx); \
+ switch ((this_descriptor_feed.p_context)->line) \
+ { \
+ case 0: \
+ ;
+
+/**
+ * @brief Yield class descriptor
+ *
+ */
+
+#define APP_USBD_CLASS_DESCRIPTOR_YIELD() \
+do \
+{ \
+ (this_descriptor_feed.p_context)->line = __LINE__; \
+ return true; \
+ case __LINE__: \
+ ; \
+} while (0)
+
+/*lint -emacro(438 527, APP_USBD_CLASS_DESCRIPTOR_END)*/
+
+/**
+ * @brief End class descriptor.
+ *
+ * This function has to be called at the end of class descriptor feeder function.
+ * No other operations in feeder function can be done after calling it.
+ */
+
+#define APP_USBD_CLASS_DESCRIPTOR_END() \
+ APP_USBD_CLASS_DESCRIPTOR_YIELD(); \
+ } \
+ (this_descriptor_feed.p_context)->line = 0; \
+ return false;
+
+
+/**
+ * @brief Write descriptor using protothreads.
+ *
+ * This function writes one byte to the buffer with offset. If buffer is full
+ * it yields.
+ *
+ * It is used by the class descriptor feeders internally.
+ *
+ * @ref APP_USBD_CLASS_DESCRIPTOR_BEGIN has to be called before using this function.
+ * @ref APP_USBD_CLASS_DESCRIPTOR_END has to be called after last use of this function.
+ *
+ * @param data Byte to be written to buffer.
+ */
+#define APP_USBD_CLASS_DESCRIPTOR_WRITE(data) \
+do \
+{ \
+ (this_descriptor_feed.p_context)->data_buffer = (data); \
+ if (this_descriptor_feed.current_size >= this_descriptor_feed.maximum_size) \
+ { \
+ APP_USBD_CLASS_DESCRIPTOR_YIELD(); \
+ } \
+ if(this_descriptor_feed.p_buffer != NULL) \
+ { \
+ *(this_descriptor_feed.p_buffer + this_descriptor_feed.current_size) = \
+ (this_descriptor_feed.p_context)->data_buffer; \
+ } \
+ this_descriptor_feed.current_size++; \
+} while(0);
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* APP_USBD_CLASS_BASE_H__ */
diff --git a/third_party/NordicSemiconductor/libraries/usb/app_usbd_core.c b/third_party/NordicSemiconductor/libraries/usb/app_usbd_core.c
index 0abcc17..6200bfe 100644
--- a/third_party/NordicSemiconductor/libraries/usb/app_usbd_core.c
+++ b/third_party/NordicSemiconductor/libraries/usb/app_usbd_core.c
@@ -1,1235 +1,1251 @@
-/**
- * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-#include "sdk_common.h"
-#if NRF_MODULE_ENABLED(APP_USBD)
-
-#include "app_usbd_core.h"
-#include "app_usbd.h"
-#include "app_usbd_request.h"
-#include "app_usbd_string_desc.h"
-#include "nrf.h"
-#include "nrf_atomic.h"
-#include "app_util_platform.h"
-#include "app_usbd.h"
-#include "app_usbd_class_base.h"
-
-#define NRF_LOG_MODULE_NAME app_usbd_core
-
-#if APP_USBD_CONFIG_LOG_ENABLED
-#define NRF_LOG_LEVEL APP_USBD_CONFIG_LOG_LEVEL
-#define NRF_LOG_INFO_COLOR APP_USBD_CONFIG_INFO_COLOR
-#define NRF_LOG_DEBUG_COLOR APP_USBD_CONFIG_DEBUG_COLOR
-#else //APP_USBD_CONFIG_LOG_ENABLED
-#define NRF_LOG_LEVEL 0
-#endif //APP_USBD_CONFIG_LOG_ENABLED
-#include "nrf_log.h"
-NRF_LOG_MODULE_REGISTER();
-
-/* Test if VID was configured */
-#ifndef APP_USBD_VID
-#error APP_USBD_VID not properly defined.
-#endif
-
-
-/* Device version checking */
-#if defined(APP_USBD_DEVICE_VER_MAJOR) && defined(APP_USBD_DEVICE_VER_MINOR)
- #if ((APP_USBD_DEVICE_VER_MAJOR)) > 99 || ((APP_USBD_DEVICE_VER_MINOR) > 99)
- #error Major and minor device version value have to be limited to 99.
- #endif
-#else
- #error The definition of a pair APP_USBD_DEVICE_VER_MAJOR and APP_USBD_DEVICE_VER_MINOR required.
-#endif
-
-/**
- * @internal
- * @defgroup app_usbd_core_internals USB Device high level library core module internals
- * @ingroup app_usbd_core
- *
- * Internal variables, auxiliary macros and functions of USBD high level core module.
- * @{
- */
-
-/** @brief Make USB power value */
-#define APP_USBD_POWER_MAKE(ma) (((ma) + 1) / 2)
-
-/**
- @brief Default device descriptor initializer @ref app_usbd_descriptor_device_t
-* */
-#define APP_USBD_CORE_DEVICE_DESCRIPTOR { \
- .bLength = sizeof(app_usbd_descriptor_device_t), /* descriptor size */ \
- .bDescriptorType = APP_USBD_DESCRIPTOR_DEVICE, /* descriptor type */ \
- .bcdUSB = APP_USBD_BCD_VER_MAKE(2,0), /* USB BCD version: 2.0 */ \
- .bDeviceClass = 0, /* device class: 0 - specified by interface */ \
- .bDeviceSubClass = 0, /* device subclass: 0 - specified by interface */ \
- .bDeviceProtocol = 0, /* device protocol: 0 - specified by interface */ \
- .bMaxPacketSize0 = NRF_DRV_USBD_EPSIZE, /* endpoint size: fixed to: NRF_DRV_USBD_EPSIZE*/ \
- .idVendor = APP_USBD_VID, /* Vendor ID*/ \
- .idProduct = APP_USBD_PID, /* Product ID*/ \
- .bcdDevice = APP_USBD_BCD_VER_MAKE( /* Device version BCD */ \
- APP_USBD_DEVICE_VER_MAJOR, \
- APP_USBD_DEVICE_VER_MINOR), \
- .iManufacturer = APP_USBD_STRING_ID_MANUFACTURER, /* String ID: manufacturer */ \
- .iProduct = APP_USBD_STRING_ID_PRODUCT, /* String ID: product */ \
- .iSerialNumber = APP_USBD_STRING_ID_SERIAL, /* String ID: serial */ \
- .bNumConfigurations = 1 /* Fixed value: only one configuration supported*/\
-}
-
-
-#define APP_USBD_CORE_CONFIGURATION_DESCRIPTOR { \
- .bLength = sizeof(app_usbd_descriptor_configuration_t), \
- .bDescriptorType = APP_USBD_DESCRIPTOR_CONFIGURATION, \
- .wTotalLength = 0, /*Calculated dynamically*/ \
- .bNumInterfaces = 0, /*Calculated dynamically*/ \
- .bConfigurationValue = 1, /*Value passed to set configuration*/ \
- .iConfiguration = APP_USBD_STRING_ID_CONFIGURATION, /*Configuration ID*/ \
- .bmAttributes = APP_USBD_DESCRIPTOR_CONFIGURATION_ATTRIBUTE_ALWAYS_SET_MASK | \
- ((APP_USBD_CONFIG_SELF_POWERED) ? \
- APP_USBD_DESCRIPTOR_CONFIGURATION_ATTRIBUTE_SELF_POWERED_MASK \
- : \
- 0), \
- .bMaxPower = APP_USBD_POWER_MAKE(APP_USBD_CONFIG_MAX_POWER), \
-}
-
-/**
- * @brief Device descriptor instance.
- *
- * @note
- * Constant part of the device descriptor.
- * Values that must be calculated are updated directly in the buffer
- * just before the transmission.
- */
-static const app_usbd_descriptor_device_t m_device_dsc =
- APP_USBD_CORE_DEVICE_DESCRIPTOR;
-
-/**
- * @brief Configuration descriptor instance.
- *
- * @note
- * Constant part of the device descriptor.
- * Values that must be calculated are updated directly in the buffer
- * just before the transmission.
- */
-static const app_usbd_descriptor_configuration_t m_configuration_dsc =
- APP_USBD_CORE_CONFIGURATION_DESCRIPTOR;
-
-/* Required early declaration of event handler function */
-static ret_code_t app_usbd_core_event_handler(app_usbd_class_inst_t const * const p_inst,
- app_usbd_complex_evt_t const * const p_event);
-
-/**
- * @brief Current USB device state.
- *
- * This variable is updated automatically by core library.
- */
-static app_usbd_state_t m_app_usbd_state = APP_USBD_STATE_Disabled;
-
-/**
- * @brief Active device features.
- *
- * @note Only @ref APP_USBD_SETUP_STDFEATURE_DEVICE_REMOTE_WAKEUP is supported for device.
- */
-static uint8_t m_device_features_state;
-
-/**
- * @brief Remote wake-up pending flag.
- */
-static nrf_atomic_flag_t m_rwu_pending;
-
-
-/**
- * @brief Core class methods.
- *
- * Base methods interface for core class.
- * This is quite specific class - it would be only connected into endpoint 0.
- * Not connected into instances list.
- */
-static const app_usbd_class_methods_t m_core_methods = {
- .event_handler = app_usbd_core_event_handler,
- .feed_descriptors = NULL,
-};
-
-/**
- * @brief Setup transfer buffer.
- */
-static uint8_t m_setup_transfer_buff[NRF_DRV_USBD_EPSIZE];
-
-
-/**
- * @brief Handler for outgoing setup data.
- *
- */
-static app_usbd_core_setup_data_handler_desc_t m_ep0_handler_desc;
-
-#define APP_USBD_CORE_CLASS_INSTANCE_CONFIG ()
-
-
-/*lint -u -save -e26 -e40 -e64 -e123 -e505 -e651*/
-
-/**
- * @brief Core instance.
- *
- * Create instance that would be connected into endpoints in USBD library.
- */
-APP_USBD_CLASS_INST_GLOBAL_DEF(
- app_usbd_core_inst,
- app_usbd_core,
- &m_core_methods,
- APP_USBD_CORE_CLASS_CONFIGURATION,
- () );
-/*lint -restore*/
-
-/**
- * @brief Set the new USB state.
- *
- * Function changes the internal status of the bus.
- * If the bus status is different than the one configured, an event is passed to all
- * the instances.
- *
- * @param state New state to be set.
- *
- * @sa usbd_core_state_get
- */
-static void usbd_core_state_set(app_usbd_state_t state)
-{
- if (m_app_usbd_state != state)
- {
- m_app_usbd_state = state;
- if(state != APP_USBD_STATE_Configured)
- {
- CLR_BIT(m_device_features_state, APP_USBD_SETUP_STDFEATURE_DEVICE_REMOTE_WAKEUP);
- }
- static const app_usbd_evt_t evt_data = {
- .type = APP_USBD_EVT_STATE_CHANGED
- };
- app_usbd_event_execute((app_usbd_internal_evt_t const *)&evt_data);
- }
-}
-
-/**
- * @brief Get the current USB state - internal function.
- *
- * This is just a wrapper for @ref app_usbd_core_state_get
- * to make symmetrical function to the internal @ref usbd_core_state_set.
- *
- * @return Current USB state.
- *
- * @sa usbd_core_state_set
- * @sa app_usbd_core_state_get
- */
-static inline app_usbd_state_t usbd_core_state_get(void)
-{
- return m_app_usbd_state;
-}
-
-/**
- * @brief Check current USBD power connection status.
- *
- */
-static inline bool usbd_core_power_is_detected(void)
-{
- return 0 != ( (NRF_POWER->USBREGSTATUS) & POWER_USBREGSTATUS_VBUSDETECT_Msk);
-}
-
-/**
- * @brief Clear current EP0 handler.
- *
- * Function just clears the EP0 handler without calling it.
- */
-static inline void usbd_core_ep0_handler_clear(void)
-{
- m_ep0_handler_desc.handler = NULL;
-}
-
-/**
- * @brief Safely call EP0 handler.
- *
- * Function calls EP0 handler only if its pointer is non-zero.
- *
- * @param status Status to send as a handler parameter.
- */
-static inline ret_code_t usbd_core_ep0_handler_call_and_clear(nrf_drv_usbd_ep_status_t status)
-{
- app_usbd_core_setup_data_handler_t handler = m_ep0_handler_desc.handler;
- if (NULL != handler)
- {
- usbd_core_ep0_handler_clear();
- return handler(status, m_ep0_handler_desc.p_context);
- }
-
- return NRF_ERROR_NULL;
-}
-
-/**
- * @brief Check if EP0 handler is configured.
- *
- * EP0 handler is configured is any instance that has processed SETUP command
- * expects some incoming / outgoing data.
- *
- * EP0 handler should be cleared automatically just before it is called
- * (see @ref usbd_core_ep0_handler_call_and_clear).
- * If instance requires more data - it has to setup EP0 handler once more time
- * (see @ref app_usbd_core_setup_data_handler_set).
- *
- * This function adds small layer of abstraction for checking if EP0 handler
- * is already configured.
- *
- * @retval true EP0 handler is set.
- * @retval false EP0 handler is cleared.
- */
-static inline bool usb_core_ep0_handler_check(void)
-{
- return (NULL != m_ep0_handler_desc.handler);
-}
-
-/**
- * @brief Empty data handler.
- *
- * Data handler used only to mark that there is requested data during SETUP.
- *
- * @return Always NRF_SUCCESS
- * @sa setup_empty_data_handler_desc
- */
-static ret_code_t setup_data_handler_empty(nrf_drv_usbd_ep_status_t status, void * p_contex)
-{
- UNUSED_PARAMETER(status);
- UNUSED_PARAMETER(p_contex);
- return NRF_SUCCESS;
-}
-
-/**
- * @brief
- *
- * Empty EP0 transfer transfer handler.
- */
-static app_usbd_core_setup_data_handler_desc_t const m_setup_data_handler_empty_desc =
-{
- .handler = setup_data_handler_empty,
- .p_context = NULL
-};
-
-/**
- * @brief Structure used as a context for descriptor feeder.
- *
- * Structure with all the data required to process instances to generate descriptor
- * data chunk.
- */
-typedef struct
-{
- app_usbd_class_inst_t const * p_cinst; //!< The class instance that is to be processed next.
- const uint8_t * p_desc; //!< Pointer at current descriptor or NULL if finished.
- /**<
- * If the value passed by @ref p_desc is NULL on transfer function enter it means that ZLP is required.
- * Or it is time to finish the transfer (depending on @c total_left).
- */
- size_t desc_left; //!< Number of bytes left in the current class descriptor to send
- size_t total_left; //!< Number of bytes left that was requested by the host
- app_usbd_class_descriptor_ctx_t feed_thread; //!< Class descriptor context
-} app_usbd_core_descriptor_conf_feed_data_t;
-
-/**
- * @brief Default data used by the feeder.
- *
- *
- */
-static app_usbd_core_descriptor_conf_feed_data_t m_descriptor_conf_feed_data;
-
-/**
- * @brief Descriptor feeder.
- *
- * Descriptor feeder is used as an callback function when descriptors are
- * transfered and buffer is ready for next data.
- * It prepares next chunk of data to be sent.
- *
- * @param p_next See @ref nrf_drv_usbd_next_transfer_handler_t documentation.
- * @param p_context Pointer to @ref app_usbd_core_descriptor_feed_data_t data type.
- * @param ep_size The size of the endpoint.
- *
- * @return See @ref nrf_drv_usbd_next_transfer_handler_t documentation.
- */
-static bool usbd_descriptor_conf_feeder(
- nrf_drv_usbd_ep_transfer_t * p_next,
- void * p_context,
- size_t ep_size)
-{
- bool continue_req = true;
-
- app_usbd_core_descriptor_conf_feed_data_t * p_data = p_context;
-
-
- if ((p_data->p_desc == NULL) && (app_usbd_class_next_get(p_data->p_cinst) == NULL)
- && (p_data->desc_left == 0))
- {
- /* ZLP */
- continue_req = false;
- p_next->p_data.tx = NULL;
- p_next->size = 0;
- }
- else
- {
- ASSERT(ep_size <= NRF_DRV_USBD_FEEDER_BUFFER_SIZE);
- uint8_t * p_tx_buff;
- size_t size = 0; /* Currently added number of bytes */
- size_t tx_size; /* Number of bytes to send right now */
- bool feeding = false;
-
- /* Feeder function can use the USBD driver internal buffer */
- p_tx_buff = nrf_drv_usbd_feeder_buffer_get();
-
- tx_size = MIN(ep_size, p_data->total_left);
-
- while (0 != tx_size)
- {
- size_t to_copy = MIN(tx_size, p_data->desc_left);
-
- /* First transfer */
- if (p_data->p_desc != NULL)
- {
- memcpy(p_tx_buff + size, p_data->p_desc, to_copy);
- p_data->p_desc = NULL;
- }
- /* Starting with second transfer */
- else if (0 < p_data->desc_left)
- {
- UNUSED_RETURN_VALUE(p_data->p_cinst->p_class_methods->feed_descriptors(
- &p_data->feed_thread, p_data->p_cinst,
- (uint8_t *)p_tx_buff + size, to_copy));
- feeding = true;
- }
- else
- {
- ;
- }
-
- p_data->desc_left -= to_copy;
- p_data->total_left -= to_copy;
- tx_size -= to_copy;
- size += to_copy;
-
- /* Switch to next class if no descriptor left and first feeding was done */
- if(p_data->desc_left == 0 && feeding)
- {
- p_data->p_cinst = app_usbd_class_next_get(p_data->p_cinst);
- }
-
- if (0 == p_data->total_left)
- {
- continue_req = false;
- }
- else if (0 == p_data->desc_left)
- {
- if (NULL == p_data->p_cinst)
- {
- p_data->p_desc = NULL;
- /* No more data - check if ZLP is required */
- if (size > 0)
- {
- if (size < ep_size)
- {
- continue_req = false;
- }
- }
- break;
- }
- else
- {
- /* New class - count descriptor size and initialize feeding thread */
- app_usbd_class_descriptor_ctx_t desiz;
- APP_USBD_CLASS_DESCRIPTOR_INIT(&desiz);
- while(p_data->p_cinst->p_class_methods->feed_descriptors(
- &desiz, p_data->p_cinst, NULL, sizeof(uint8_t)))
- {
- p_data->desc_left++;
- }
- APP_USBD_CLASS_DESCRIPTOR_INIT(&p_data->feed_thread);
- }
- }
- else
- {
- /* Nothing to do */
- }
- }
- p_next->p_data.tx = p_tx_buff;
- p_next->size = size;
- }
- return continue_req;
-}
-
-/**
- * @brief Standard endpoint request handle.
- *
- * @param[in] p_setup_ev Setup event.
- *
- * @return Standard error code.
- */
-static ret_code_t setup_endpoint_req_std(app_usbd_setup_evt_t const * p_setup_ev)
-{
- if (APP_USBD_SETUP_REQTYPE_STD != app_usbd_setup_req_typ(p_setup_ev->setup.bmRequestType))
- {
- return NRF_ERROR_NOT_SUPPORTED;
- }
-
- nrf_drv_usbd_ep_t ep_addr = (nrf_drv_usbd_ep_t)(p_setup_ev->setup.wIndex.lb);
- app_usbd_state_t usb_state = usbd_core_state_get();
-
- switch (p_setup_ev->setup.bmRequest)
- {
- case APP_USBD_SETUP_STDREQ_GET_STATUS:
- {
- if ((usb_state == APP_USBD_STATE_Configured) || (NRF_USBD_EP_NR_GET(ep_addr) == 0))
- {
- size_t tx_size;
- uint16_t * p_tx_buff = app_usbd_core_setup_transfer_buff_get(&tx_size);
-
- p_tx_buff[0] = nrf_drv_usbd_ep_stall_check(ep_addr) ? 1 : 0;
- return app_usbd_core_setup_rsp(&(p_setup_ev->setup), p_tx_buff, sizeof(uint16_t));
- }
- else
- {
- return NRF_ERROR_INVALID_STATE;
- }
- }
- case APP_USBD_SETUP_STDREQ_SET_FEATURE:
- {
- if ((!NRF_USBD_EPISO_CHECK(ep_addr)) &&
- (p_setup_ev->setup.wValue.w == APP_USBD_SETUP_STDFEATURE_ENDPOINT_HALT))
- {
- if ((usb_state == APP_USBD_STATE_Configured) || (NRF_USBD_EP_NR_GET(ep_addr) == 0))
- {
- nrf_drv_usbd_ep_stall(ep_addr);
- return NRF_SUCCESS;
- }
- else
- {
- return NRF_ERROR_INVALID_STATE;
- }
- }
- break;
- }
- case APP_USBD_SETUP_STDREQ_CLEAR_FEATURE:
- {
- if ((!NRF_USBD_EPISO_CHECK(ep_addr)) &&
- (p_setup_ev->setup.wValue.w == APP_USBD_SETUP_STDFEATURE_ENDPOINT_HALT))
- {
- if ((usb_state == APP_USBD_STATE_Configured) || (NRF_USBD_EP_NR_GET(ep_addr) == 0))
- {
- nrf_drv_usbd_ep_dtoggle_clear(ep_addr);
- nrf_drv_usbd_ep_stall_clear(ep_addr);
- return NRF_SUCCESS;
- }
- else
- {
- return NRF_ERROR_INVALID_STATE;
- }
- }
- break;
- }
- default:
- break;
- }
- return NRF_ERROR_NOT_SUPPORTED;
-}
-
-/**
- * @brief Standard interface request handle.
- *
- * @param[in,out] p_class_inst Class instance that holds selected interface.
- * @param[in] iface_idx Index of the interface in class structure.
- * @param[in] p_event Event structure to be processed.
- *
- * @return Operation status.
- */
-static ret_code_t setup_interface_req_std_handle(
- app_usbd_class_inst_t const * const p_class_inst,
- uint8_t iface_idx,
- app_usbd_setup_evt_t const * p_setup_ev)
-{
- if (APP_USBD_SETUP_REQTYPE_STD != app_usbd_setup_req_typ(p_setup_ev->setup.bmRequestType))
- {
- return NRF_ERROR_NOT_SUPPORTED;
- }
-
- app_usbd_state_t usb_state = usbd_core_state_get();
-
- if (app_usbd_setup_req_dir(p_setup_ev->setup.bmRequestType) == APP_USBD_SETUP_REQDIR_IN)
- {
- switch (p_setup_ev->setup.bmRequest)
- {
- case APP_USBD_SETUP_STDREQ_GET_STATUS:
- {
- if (!(usb_state == APP_USBD_STATE_Configured))
- {
- return NRF_ERROR_INVALID_STATE;
- }
- size_t tx_size;
- uint16_t * p_tx_buff = app_usbd_core_setup_transfer_buff_get(&tx_size);
- p_tx_buff[0] = 0;
- return app_usbd_core_setup_rsp(&(p_setup_ev->setup), p_tx_buff, sizeof(uint16_t));
- }
- case APP_USBD_SETUP_STDREQ_GET_INTERFACE:
- {
- if (!(usb_state == APP_USBD_STATE_Configured))
- {
- return NRF_ERROR_INVALID_STATE;
- }
- size_t tx_size;
- uint8_t * p_tx_buff = app_usbd_core_setup_transfer_buff_get(&tx_size);
- p_tx_buff[0] = app_usbd_iface_selection_get(p_class_inst, iface_idx);
- return app_usbd_core_setup_rsp(&(p_setup_ev->setup), p_tx_buff, sizeof(uint8_t));
- }
- }
- }
- else /* APP_USBD_SETUP_REQDIR_OUT */
- {
- switch (p_setup_ev->setup.bmRequest)
- {
- case APP_USBD_SETUP_STDREQ_SET_INTERFACE:
- {
- if (!(usb_state == APP_USBD_STATE_Configured))
- {
- return NRF_ERROR_INVALID_STATE;
- }
-
- if(p_setup_ev->setup.wValue.w > UINT8_MAX)
- {
- return NRF_ERROR_INVALID_PARAM;
- }
- uint8_t alt = p_setup_ev->setup.wValue.lb;
- return app_usbd_iface_select(p_class_inst, iface_idx, alt);
- }
- default:
- break;
- }
- }
- return NRF_ERROR_NOT_SUPPORTED;
-}
-
-/**
- * @brief
- *
- * Descriptors feeder handle structure.
- */
-static const nrf_drv_usbd_handler_desc_t usbd_descriptor_feeder_desc =
-{
- .handler = { .feeder = usbd_descriptor_conf_feeder },
- .p_context = &m_descriptor_conf_feed_data
-};
-
-static ret_code_t setup_device_req_get_status(
- app_usbd_class_inst_t const * const p_inst,
- app_usbd_setup_evt_t const * const p_setup_ev)
-{
- size_t max_size;
- uint8_t * p_trans_buff = app_usbd_core_setup_transfer_buff_get(&max_size);
- ASSERT(sizeof(uint16_t) <= max_size);
-
- memset(p_trans_buff, 0, sizeof(uint16_t));
- if (m_configuration_dsc.bmAttributes &
- APP_USBD_DESCRIPTOR_CONFIGURATION_ATTRIBUTE_SELF_POWERED_MASK)
- {
- SET_BIT(p_trans_buff[0], 0);
- }
- if (IS_SET(m_device_features_state, APP_USBD_SETUP_STDFEATURE_DEVICE_REMOTE_WAKEUP))
- {
- SET_BIT(p_trans_buff[0], 1);
- }
- return app_usbd_core_setup_rsp(&(p_setup_ev->setup), p_trans_buff, sizeof(uint16_t));
-}
-
-static ret_code_t setup_device_req_get_descriptor(app_usbd_class_inst_t const * const p_inst,
- app_usbd_setup_evt_t const * const p_setup_ev)
-{
- switch (p_setup_ev->setup.wValue.hb)
- {
- case APP_USBD_DESCRIPTOR_DEVICE:
- {
- return app_usbd_core_setup_rsp(&(p_setup_ev->setup),
- &m_device_dsc,
- sizeof(m_device_dsc));
- }
- case APP_USBD_DESCRIPTOR_CONFIGURATION:
- {
- /* The size equals the size of configuration descriptor and all classes descriptors */
- const size_t size = MIN(
- sizeof(app_usbd_descriptor_configuration_t),
- p_setup_ev->setup.wLength.w);
- size_t total_length = sizeof(app_usbd_descriptor_configuration_t);
- uint8_t iface_count = 0;
-
- /* Iterate over all registered classes count descriptors and total size */
- app_usbd_class_inst_t const * p_class;
- for (p_class = app_usbd_class_first_get(); p_class != NULL;
- p_class = app_usbd_class_next_get(p_class))
- {
- ASSERT(NULL != (p_class->p_class_methods));
- ASSERT(NULL != (p_class->p_class_methods->feed_descriptors));
- size_t dsc_size = 0;
- app_usbd_class_descriptor_ctx_t siz_desc;
- APP_USBD_CLASS_DESCRIPTOR_INIT(&siz_desc);
- while(p_class->p_class_methods->feed_descriptors(&siz_desc,
- p_class,
- NULL,
- sizeof(uint8_t))
- )
- {
- dsc_size++;
- }
- total_length += dsc_size;
- iface_count += app_usbd_class_iface_count_get(p_class);
- }
-
- /* Access transmission buffer */
- size_t max_size;
- app_usbd_descriptor_configuration_t * p_trans_buff =
- app_usbd_core_setup_transfer_buff_get(&max_size);
- /* Copy the configuration descriptor and update the fields that require it */
- ASSERT(size <= max_size);
- memcpy(p_trans_buff, &m_configuration_dsc, size);
-
- p_trans_buff->bNumInterfaces = iface_count;
- p_trans_buff->wTotalLength = total_length;
- if (app_usbd_class_rwu_enabled_check())
- {
- p_trans_buff->bmAttributes |=
- APP_USBD_DESCRIPTOR_CONFIGURATION_ATTRIBUTE_REMOTE_WAKEUP_MASK;
- }
-
-
- m_descriptor_conf_feed_data.p_cinst = app_usbd_class_first_get();
- m_descriptor_conf_feed_data.p_desc = (void *)p_trans_buff;
- m_descriptor_conf_feed_data.desc_left = size;
- m_descriptor_conf_feed_data.total_left = p_setup_ev->setup.wLength.w;
-
- /* Start first transfer */
- ret_code_t ret;
- CRITICAL_REGION_ENTER();
-
- ret = app_usbd_ep_handled_transfer(
- NRF_DRV_USBD_EPIN0,
- &usbd_descriptor_feeder_desc);
-
- if (NRF_SUCCESS == ret)
- {
- ret = app_usbd_core_setup_data_handler_set(
- NRF_DRV_USBD_EPIN0,
- &m_setup_data_handler_empty_desc);
- }
- CRITICAL_REGION_EXIT();
-
- return ret;
- }
- case APP_USBD_DESCRIPTOR_STRING:
- {
- app_usbd_string_desc_idx_t id =
- (app_usbd_string_desc_idx_t)(p_setup_ev->setup.wValue.lb);
- uint16_t langid = p_setup_ev->setup.wIndex.w;
- uint16_t const * p_string_dsc = app_usbd_string_desc_get(id, langid);
- if (p_string_dsc == NULL)
- {
- return NRF_ERROR_NOT_SUPPORTED;
- }
-
- return app_usbd_core_setup_rsp(
- &p_setup_ev->setup,
- p_string_dsc,
- app_usbd_string_desc_length(p_string_dsc));
- }
- default:
- break;
- }
-
-
- return NRF_ERROR_NOT_SUPPORTED;
-}
-
-static ret_code_t setup_device_req_get_configuration(
- app_usbd_class_inst_t const * const p_inst,
- app_usbd_setup_evt_t const * const p_setup_ev)
-{
- size_t max_size;
- uint8_t * p_trans_buff = app_usbd_core_setup_transfer_buff_get(&max_size);
- app_usbd_state_t usb_state = usbd_core_state_get();
- if (usb_state == APP_USBD_STATE_Configured)
- {
- p_trans_buff[0] = 1;
- }
- else if (usb_state == APP_USBD_STATE_Addressed)
- {
- p_trans_buff[0] = 0;
- }
- else
- {
- return NRF_ERROR_NOT_SUPPORTED;
- }
-
- return app_usbd_core_setup_rsp(&p_setup_ev->setup, p_trans_buff, sizeof(p_trans_buff[0]));
-}
-
-static ret_code_t setup_device_req_set_configuration(
- app_usbd_class_inst_t const * const p_inst,
- app_usbd_setup_evt_t const * const p_setup_ev)
-{
- app_usbd_state_t usb_state = usbd_core_state_get();
- if (!((usb_state == APP_USBD_STATE_Configured) ||
- (usb_state == APP_USBD_STATE_Addressed)))
- {
- return NRF_ERROR_INVALID_STATE;
- }
-
- if (p_setup_ev->setup.wValue.lb == 0)
- {
- app_usbd_all_iface_deselect();
- usbd_core_state_set(APP_USBD_STATE_Addressed);
- }
- else if (p_setup_ev->setup.wValue.lb == 1)
- {
- /*Clear all bulk/interrupt endpoint status and set toggle to DATA0*/
- app_usbd_all_iface_select_0();
- usbd_core_state_set(APP_USBD_STATE_Configured);
- }
- else
- {
- /*In this driver only one configuration is supported.*/
- return NRF_ERROR_INVALID_PARAM;
- }
-
- return NRF_SUCCESS;
-}
-
-/**
- * @brief Internal SETUP event handler.
- * @param[in] p_inst Instance of the class.
- * @param[in] p_setup_ev Setup request.
- * @return Standard error code.
- * @retval NRF_SUCCESS Request handled correctly.
- * @retval NRF_ERROR_NOT_SUPPORTED Request is not supported.
- */
-static ret_code_t setup_device_req_std_handler(app_usbd_class_inst_t const * const p_inst,
- app_usbd_setup_evt_t const * const p_setup_ev)
-{
- ASSERT(p_inst != NULL);
- ASSERT(p_setup_ev != NULL);
-
- if (APP_USBD_SETUP_REQTYPE_STD != app_usbd_setup_req_typ(p_setup_ev->setup.bmRequestType))
- {
- return NRF_ERROR_NOT_SUPPORTED;
- }
-
- if (app_usbd_setup_req_dir(p_setup_ev->setup.bmRequestType) == APP_USBD_SETUP_REQDIR_IN)
- {
- switch (p_setup_ev->setup.bmRequest)
- {
- case APP_USBD_SETUP_STDREQ_GET_STATUS:
- {
- return setup_device_req_get_status(p_inst, p_setup_ev);
- }
- case APP_USBD_SETUP_STDREQ_GET_DESCRIPTOR:
- {
- return setup_device_req_get_descriptor(p_inst, p_setup_ev);
- }
- case APP_USBD_SETUP_STDREQ_GET_CONFIGURATION:
- {
- return setup_device_req_get_configuration(p_inst, p_setup_ev);
- }
- default:
- /*Not supported*/
- break;
- }
- return NRF_ERROR_NOT_SUPPORTED;
- }
- else /* APP_USBD_SETUP_REQDIR_OUT */
- {
- switch (p_setup_ev->setup.bmRequest)
- {
- case APP_USBD_SETUP_STDREQ_SET_ADDRESS:
- {
- ASSERT(0); /* should never reach this point */
- break;
- }
- case APP_USBD_SETUP_STDREQ_SET_FEATURE:
- {
- if (p_setup_ev->setup.wValue.w == APP_USBD_SETUP_STDFEATURE_DEVICE_REMOTE_WAKEUP)
- {
- if (!app_usbd_class_rwu_enabled_check())
- {
- return NRF_ERROR_FORBIDDEN;
- }
- SET_BIT(m_device_features_state, APP_USBD_SETUP_STDFEATURE_DEVICE_REMOTE_WAKEUP);
- return NRF_SUCCESS;
- }
- break;
- }
- case APP_USBD_SETUP_STDREQ_CLEAR_FEATURE:
- {
- if (p_setup_ev->setup.wValue.w == APP_USBD_SETUP_STDFEATURE_DEVICE_REMOTE_WAKEUP)
- {
- if (!app_usbd_class_rwu_enabled_check())
- {
- return NRF_ERROR_FORBIDDEN;
- }
- CLR_BIT(m_device_features_state, APP_USBD_SETUP_STDFEATURE_DEVICE_REMOTE_WAKEUP);
- return NRF_SUCCESS;
- }
- break;
- }
- case APP_USBD_SETUP_STDREQ_SET_CONFIGURATION:
- {
- return setup_device_req_set_configuration(p_inst, p_setup_ev);
- }
- case APP_USBD_SETUP_STDREQ_SET_DESCRIPTOR:
- {
- /*Not supported yet.*/
- break;
- }
- default:
- /*Not supported*/
- break;
- }
- return NRF_ERROR_NOT_SUPPORTED;
- }
-}
-
-/**
- * @brief Process SETUP command.
- *
- * Auxiliary function for SETUP command processing.
- */
-static inline ret_code_t app_usbd_core_setup_req_handler(app_usbd_class_inst_t const * const p_inst)
-{
- app_usbd_setup_evt_t setup_ev;
- ret_code_t ret = NRF_ERROR_NOT_SUPPORTED; /* Final result of request processing function */
-
- setup_ev.type = APP_USBD_EVT_DRV_SETUP;
- nrf_drv_usbd_setup_get((nrf_drv_usbd_setup_t *)&(setup_ev.setup));
-
- NRF_LOG_DEBUG("SETUP: t: 0x%.2x r: 0x%.2x",
- setup_ev.setup.bmRequestType,
- setup_ev.setup.bmRequest);
- if (usb_core_ep0_handler_check())
- {
- NRF_LOG_WARNING("Previous setup not finished!");
- }
- /* Clear EP0 handler if there is anything in progress */
- usbd_core_ep0_handler_clear();
-
- switch (app_usbd_setup_req_rec(setup_ev.setup.bmRequestType))
- {
- case APP_USBD_SETUP_REQREC_DEVICE:
- {
- /* Endpoint 0 has core instance (that process device requests) connected */
- ret = setup_device_req_std_handler(p_inst, &setup_ev);
- if (ret == NRF_ERROR_NOT_SUPPORTED)
- {
- ret = app_usbd_all_until_served_call((app_usbd_complex_evt_t const *)&setup_ev);
- }
- break;
- }
- case APP_USBD_SETUP_REQREC_INTERFACE:
- {
- uint8_t const iface_number = setup_ev.setup.wIndex.lb;
- uint8_t iface_idx;
- app_usbd_class_inst_t const * p_inst_found = app_usbd_iface_find(
- iface_number,
- &iface_idx);
- if (p_inst_found == NULL)
- {
- ret = NRF_ERROR_INVALID_ADDR;
- }
- else
- {
- ret = app_usbd_iface_call(
- p_inst_found, iface_idx,
- (app_usbd_complex_evt_t const *)&setup_ev);
- if (ret == NRF_ERROR_NOT_SUPPORTED)
- {
- ret = setup_interface_req_std_handle(p_inst_found, iface_idx, &setup_ev);
- }
- }
- break;
- }
- case APP_USBD_SETUP_REQREC_ENDPOINT:
- {
- ret = NRF_ERROR_NOT_SUPPORTED;
- nrf_drv_usbd_ep_t ep = (nrf_drv_usbd_ep_t)setup_ev.setup.wIndex.lb;
- if ((NRF_USBD_EP_NR_GET(ep) != 0)) /* For EP0 we would call this function again! */
- {
- ret = app_usbd_ep_call(ep, (app_usbd_complex_evt_t const *)&setup_ev);
- }
- if (ret == NRF_ERROR_NOT_SUPPORTED)
- {
- ret = setup_endpoint_req_std(&setup_ev);
- }
- break;
- }
- case APP_USBD_SETUP_REQREC_OTHER:
- {
- /* Try to process via every instance */
- ret = app_usbd_all_until_served_call((app_usbd_complex_evt_t const *)&setup_ev);
- break;
- }
- default:
- break;
- }
-
- /* Processing result */
- if (ret == NRF_SUCCESS)
- {
- if (usb_core_ep0_handler_check())
- {
- if (NRF_DRV_USBD_EPOUT0 == nrf_drv_usbd_last_setup_dir_get())
- {
- /* Request processed successfully and requires SETUP data */
- nrf_drv_usbd_setup_data_clear();
- }
- }
- else
- {
- /* Request processed successfully */
- nrf_drv_usbd_setup_clear();
- }
- }
- else
- {
- /* Request finished with error */
- nrf_drv_usbd_setup_stall();
- }
- return ret;
-}
-
-/**
- * @brief Event handler for core module.
- *
- * The event handler that would process all events directed to device.
- *
- */
-static ret_code_t app_usbd_core_event_handler(app_usbd_class_inst_t const * const p_inst,
- app_usbd_complex_evt_t const * const p_event)
-{
- ret_code_t ret = NRF_ERROR_NOT_SUPPORTED;
- switch (p_event->type)
- {
- case APP_USBD_EVT_DRV_RESET:
- {
- usbd_core_state_set(APP_USBD_STATE_Default);
- break;
- }
- case APP_USBD_EVT_DRV_SUSPEND:
- {
- ret = NRF_SUCCESS;
- break;
- }
- case APP_USBD_EVT_DRV_RESUME:
- {
- if (nrf_atomic_flag_clear_fetch(&m_rwu_pending) != 0)
- {
- nrf_usbd_task_trigger(NRF_USBD_TASK_NODRIVEDPDM);
- }
-
- ASSERT(usbd_core_state_get() >= APP_USBD_STATE_Unattached);
- ret = NRF_SUCCESS;
- break;
- }
- case APP_USBD_EVT_SETUP_SETADDRESS:
- {
- app_usbd_state_t usb_state = usbd_core_state_get();
- if (usb_state == APP_USBD_STATE_Default)
- {
- usbd_core_state_set(APP_USBD_STATE_Addressed);
- }
- break;
- }
- case APP_USBD_EVT_DRV_SETUP:
- {
- ret = app_usbd_core_setup_req_handler(p_inst);
- break;
- }
- case APP_USBD_EVT_INST_APPEND:
- {
- ASSERT(usbd_core_state_get() == APP_USBD_STATE_Disabled);
- ret = NRF_SUCCESS;
- break;
- }
- case APP_USBD_EVT_INST_REMOVE:
- {
- ASSERT(usbd_core_state_get() == APP_USBD_STATE_Unattached);
- usbd_core_state_set(APP_USBD_STATE_Disabled);
- ret = NRF_SUCCESS;
- break;
- }
- case APP_USBD_EVT_STARTED:
- {
- if (usbd_core_power_is_detected())
- {
- usbd_core_state_set(APP_USBD_STATE_Powered);
- }
- else
- {
- usbd_core_state_set(APP_USBD_STATE_Unattached);
- }
- ret = NRF_SUCCESS;
- break;
- }
- case APP_USBD_EVT_STOPPED:
- {
- ASSERT(usbd_core_state_get() >= APP_USBD_STATE_Powered);
- usbd_core_state_set(APP_USBD_STATE_Unattached);
- ret = NRF_SUCCESS;
- break;
- }
- /* Data transfer on endpoint 0 */
- case APP_USBD_EVT_DRV_EPTRANSFER:
- {
- if (p_event->drv_evt.data.eptransfer.status == NRF_USBD_EP_ABORTED)
- {
- /* Just ignore aborting */
- break;
- }
- /* This EPTRANSFER event has to be called only for EP0 */
- ASSERT((p_event->drv_evt.data.eptransfer.ep == NRF_DRV_USBD_EPOUT0) ||
- (p_event->drv_evt.data.eptransfer.ep == NRF_DRV_USBD_EPIN0));
- ret = usbd_core_ep0_handler_call_and_clear(p_event->drv_evt.data.eptransfer.status);
- /* Processing result */
- if (ret == NRF_SUCCESS)
- {
- if (usb_core_ep0_handler_check())
- {
- if (p_event->drv_evt.data.eptransfer.ep == NRF_DRV_USBD_EPOUT0)
- {
- /* Request processed successfully and requires SETUP data */
- nrf_drv_usbd_setup_data_clear();
- }
- }
- else
- {
- if (!nrf_drv_usbd_errata_154())
- {
- nrf_drv_usbd_setup_clear();
- }
- }
- }
- else
- {
- /* Request finished with error */
- nrf_drv_usbd_setup_stall();
- }
- break;
- }
- default:
- break;
- }
-
- return ret;
-}
-
-/** @} */
-
-void app_usbd_core_ep0_enable(void)
-{
- app_usbd_ep_enable(NRF_DRV_USBD_EPOUT0);
- app_usbd_ep_enable(NRF_DRV_USBD_EPIN0);
-}
-
-void app_usbd_core_ep0_disable(void)
-{
- app_usbd_ep_disable(NRF_DRV_USBD_EPOUT0);
- app_usbd_ep_disable(NRF_DRV_USBD_EPIN0);
-}
-
-
-ret_code_t app_usbd_core_setup_rsp(app_usbd_setup_t const * p_setup,
- void const * p_data,
- size_t size)
-{
- size_t req_size = p_setup->wLength.w;
- size_t tx_size = MIN(req_size, size);
- bool zlp_required = (size < req_size) &&
- (0 == (size % nrf_drv_usbd_ep_max_packet_size_get(NRF_DRV_USBD_EPIN0)));
-
- NRF_DRV_USBD_TRANSFER_IN_FLAGS(
- transfer,
- p_data,
- tx_size,
- zlp_required ? NRF_DRV_USBD_TRANSFER_ZLP_FLAG : 0);
-
- ret_code_t ret;
- CRITICAL_REGION_ENTER();
- ret = app_usbd_ep_transfer(NRF_DRV_USBD_EPIN0, &transfer);
- if (NRF_SUCCESS == ret)
- {
- ret = app_usbd_core_setup_data_handler_set(NRF_DRV_USBD_EPIN0,
- &m_setup_data_handler_empty_desc);
- }
- CRITICAL_REGION_EXIT();
-
- return ret;
-}
-
-ret_code_t app_usbd_core_setup_data_handler_set(
- nrf_drv_usbd_ep_t ep,
- app_usbd_core_setup_data_handler_desc_t const * const p_handler_desc)
-{
- if (nrf_drv_usbd_last_setup_dir_get() != ep)
- {
- return NRF_ERROR_INVALID_ADDR;
- }
-
- m_ep0_handler_desc = *p_handler_desc;
- return NRF_SUCCESS;
-}
-
-void * app_usbd_core_setup_transfer_buff_get(size_t * p_size)
-{
- if (p_size != NULL)
- *p_size = sizeof(m_setup_transfer_buff);
-
- return m_setup_transfer_buff;
-}
-
-app_usbd_state_t app_usbd_core_state_get(void)
-{
- return usbd_core_state_get();
-}
-
-
-bool app_usbd_core_feature_state_get(app_usbd_setup_stdfeature_t feature)
-{
- return IS_SET(m_device_features_state, feature) ? true : false;
-}
-
-#endif //NRF_MODULE_ENABLED(APP_USBD)
+/**
+ * Copyright (c) 2016 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#include "sdk_common.h"
+#if NRF_MODULE_ENABLED(APP_USBD)
+
+#include "app_usbd_core.h"
+#include "app_usbd.h"
+#include "app_usbd_request.h"
+#include "app_usbd_string_desc.h"
+#include "nrf.h"
+#include "nrf_atomic.h"
+#include "app_util_platform.h"
+#include "app_usbd.h"
+#include "app_usbd_class_base.h"
+
+#define NRF_LOG_MODULE_NAME app_usbd_core
+
+#if APP_USBD_CONFIG_LOG_ENABLED
+#define NRF_LOG_LEVEL APP_USBD_CONFIG_LOG_LEVEL
+#define NRF_LOG_INFO_COLOR APP_USBD_CONFIG_INFO_COLOR
+#define NRF_LOG_DEBUG_COLOR APP_USBD_CONFIG_DEBUG_COLOR
+#else //APP_USBD_CONFIG_LOG_ENABLED
+#define NRF_LOG_LEVEL 0
+#endif //APP_USBD_CONFIG_LOG_ENABLED
+#include "nrf_log.h"
+NRF_LOG_MODULE_REGISTER();
+
+/* Test if VID was configured */
+#ifndef APP_USBD_VID
+#error APP_USBD_VID not properly defined.
+#endif
+
+
+/* Device version checking */
+#if defined(APP_USBD_DEVICE_VER_MAJOR) && defined(APP_USBD_DEVICE_VER_MINOR)
+ #if ((APP_USBD_DEVICE_VER_MAJOR)) > 99 || ((APP_USBD_DEVICE_VER_MINOR) > 99)
+ #error Major and minor device version value have to be limited to 99.
+ #endif
+#else
+ #error The definition of a pair APP_USBD_DEVICE_VER_MAJOR and APP_USBD_DEVICE_VER_MINOR required.
+#endif
+
+/**
+ * @internal
+ * @defgroup app_usbd_core_internals USB Device high level library core module internals
+ * @ingroup app_usbd_core
+ *
+ * Internal variables, auxiliary macros and functions of USBD high level core module.
+ * @{
+ */
+
+/** @brief Make USB power value */
+#define APP_USBD_POWER_MAKE(ma) (((ma) + 1) / 2)
+
+/**
+ @brief Default device descriptor initializer @ref app_usbd_descriptor_device_t
+* */
+#define APP_USBD_CORE_DEVICE_DESCRIPTOR { \
+ .bLength = sizeof(app_usbd_descriptor_device_t), /* descriptor size */ \
+ .bDescriptorType = APP_USBD_DESCRIPTOR_DEVICE, /* descriptor type */ \
+ .bcdUSB = APP_USBD_BCD_VER_MAKE(2,0,0), /* USB BCD version: 2.0 */ \
+ .bDeviceClass = 0, /* device class: 0 - specified by interface */ \
+ .bDeviceSubClass = 0, /* device subclass: 0 - specified by interface */ \
+ .bDeviceProtocol = 0, /* device protocol: 0 - specified by interface */ \
+ .bMaxPacketSize0 = NRF_DRV_USBD_EPSIZE, /* endpoint size: fixed to: NRF_DRV_USBD_EPSIZE*/ \
+ .idVendor = APP_USBD_VID, /* Vendor ID*/ \
+ .idProduct = APP_USBD_PID, /* Product ID*/ \
+ .bcdDevice = APP_USBD_BCD_VER_MAKE( /* Device version BCD */ \
+ APP_USBD_DEVICE_VER_MAJOR, \
+ APP_USBD_DEVICE_VER_MINOR, \
+ APP_USBD_DEVICE_VER_SUB), \
+ .iManufacturer = APP_USBD_STRING_ID_MANUFACTURER, /* String ID: manufacturer */ \
+ .iProduct = APP_USBD_STRING_ID_PRODUCT, /* String ID: product */ \
+ .iSerialNumber = APP_USBD_STRING_ID_SERIAL, /* String ID: serial */ \
+ .bNumConfigurations = 1 /* Fixed value: only one configuration supported*/\
+}
+
+
+#define APP_USBD_CORE_CONFIGURATION_DESCRIPTOR { \
+ .bLength = sizeof(app_usbd_descriptor_configuration_t), \
+ .bDescriptorType = APP_USBD_DESCRIPTOR_CONFIGURATION, \
+ .wTotalLength = 0, /*Calculated dynamically*/ \
+ .bNumInterfaces = 0, /*Calculated dynamically*/ \
+ .bConfigurationValue = 1, /*Value passed to set configuration*/ \
+ .iConfiguration = APP_USBD_STRING_ID_CONFIGURATION, /*Configuration ID*/ \
+ .bmAttributes = APP_USBD_DESCRIPTOR_CONFIGURATION_ATTRIBUTE_ALWAYS_SET_MASK | \
+ ((APP_USBD_CONFIG_SELF_POWERED) ? \
+ APP_USBD_DESCRIPTOR_CONFIGURATION_ATTRIBUTE_SELF_POWERED_MASK \
+ : \
+ 0), \
+ .bMaxPower = APP_USBD_POWER_MAKE(APP_USBD_CONFIG_MAX_POWER), \
+}
+
+/**
+ * @brief Device descriptor instance.
+ *
+ * @note
+ * Constant part of the device descriptor.
+ * Values that must be calculated are updated directly in the buffer
+ * just before the transmission.
+ */
+static const app_usbd_descriptor_device_t m_device_dsc =
+ APP_USBD_CORE_DEVICE_DESCRIPTOR;
+
+/**
+ * @brief Configuration descriptor instance.
+ *
+ * @note
+ * Constant part of the device descriptor.
+ * Values that must be calculated are updated directly in the buffer
+ * just before the transmission.
+ */
+static const app_usbd_descriptor_configuration_t m_configuration_dsc =
+ APP_USBD_CORE_CONFIGURATION_DESCRIPTOR;
+
+/* Required early declaration of event handler function */
+static ret_code_t app_usbd_core_event_handler(app_usbd_class_inst_t const * const p_inst,
+ app_usbd_complex_evt_t const * const p_event);
+
+/**
+ * @brief Current USB device state.
+ *
+ * This variable is updated automatically by core library.
+ */
+static app_usbd_state_t m_app_usbd_state = APP_USBD_STATE_Disabled;
+
+/**
+ * @brief Active device features.
+ *
+ * @note Only @ref APP_USBD_SETUP_STDFEATURE_DEVICE_REMOTE_WAKEUP is supported for device.
+ */
+static uint8_t m_device_features_state;
+
+/**
+ * @brief Remote wake-up pending flag.
+ */
+static nrf_atomic_flag_t m_rwu_pending;
+
+
+/**
+ * @brief Core class methods.
+ *
+ * Base methods interface for core class.
+ * This is quite specific class - it would be only connected into endpoint 0.
+ * Not connected into instances list.
+ */
+static const app_usbd_class_methods_t m_core_methods = {
+ .event_handler = app_usbd_core_event_handler,
+ .feed_descriptors = NULL,
+};
+
+/**
+ * @brief Setup transfer buffer.
+ */
+static uint8_t m_setup_transfer_buff[NRF_DRV_USBD_EPSIZE];
+
+
+/**
+ * @brief Handler for outgoing setup data.
+ *
+ */
+static app_usbd_core_setup_data_handler_desc_t m_ep0_handler_desc;
+
+#define APP_USBD_CORE_CLASS_INSTANCE_CONFIG ()
+
+
+/*lint -u -save -e26 -e40 -e64 -e123 -e505 -e651*/
+
+/**
+ * @brief Core instance.
+ *
+ * Create instance that would be connected into endpoints in USBD library.
+ */
+APP_USBD_CLASS_INST_GLOBAL_DEF(
+ app_usbd_core_inst,
+ app_usbd_core,
+ &m_core_methods,
+ APP_USBD_CORE_CLASS_CONFIGURATION,
+ () );
+/*lint -restore*/
+
+/**
+ * @brief Set the new USB state.
+ *
+ * Function changes the internal status of the bus.
+ * If the bus status is different than the one configured, an event is passed to all
+ * the instances.
+ *
+ * @param state New state to be set.
+ *
+ * @sa usbd_core_state_get
+ */
+static void usbd_core_state_set(app_usbd_state_t state)
+{
+ if (m_app_usbd_state != state)
+ {
+ m_app_usbd_state = state;
+ if(state != APP_USBD_STATE_Configured)
+ {
+ CLR_BIT(m_device_features_state, APP_USBD_SETUP_STDFEATURE_DEVICE_REMOTE_WAKEUP);
+ }
+ static const app_usbd_evt_t evt_data = {
+ .type = APP_USBD_EVT_STATE_CHANGED
+ };
+ app_usbd_event_execute((app_usbd_internal_evt_t const *)&evt_data);
+ }
+}
+
+/**
+ * @brief Get the current USB state - internal function.
+ *
+ * This is just a wrapper for @ref app_usbd_core_state_get
+ * to make symmetrical function to the internal @ref usbd_core_state_set.
+ *
+ * @return Current USB state.
+ *
+ * @sa usbd_core_state_set
+ * @sa app_usbd_core_state_get
+ */
+static inline app_usbd_state_t usbd_core_state_get(void)
+{
+ return m_app_usbd_state;
+}
+
+/**
+ * @brief Check current USBD power connection status.
+ *
+ */
+static inline bool usbd_core_power_is_detected(void)
+{
+ return 0 != ( (NRF_POWER->USBREGSTATUS) & POWER_USBREGSTATUS_VBUSDETECT_Msk);
+}
+
+/**
+ * @brief Clear current EP0 handler.
+ *
+ * Function just clears the EP0 handler without calling it.
+ */
+static inline void usbd_core_ep0_handler_clear(void)
+{
+ m_ep0_handler_desc.handler = NULL;
+}
+
+/**
+ * @brief Safely call EP0 handler.
+ *
+ * Function calls EP0 handler only if its pointer is non-zero.
+ *
+ * @param status Status to send as a handler parameter.
+ */
+static inline ret_code_t usbd_core_ep0_handler_call_and_clear(nrf_drv_usbd_ep_status_t status)
+{
+ app_usbd_core_setup_data_handler_t handler = m_ep0_handler_desc.handler;
+ if (NULL != handler)
+ {
+ usbd_core_ep0_handler_clear();
+ return handler(status, m_ep0_handler_desc.p_context);
+ }
+
+ return NRF_ERROR_NULL;
+}
+
+/**
+ * @brief Check if EP0 handler is configured.
+ *
+ * EP0 handler is configured is any instance that has processed SETUP command
+ * expects some incoming / outgoing data.
+ *
+ * EP0 handler should be cleared automatically just before it is called
+ * (see @ref usbd_core_ep0_handler_call_and_clear).
+ * If instance requires more data - it has to setup EP0 handler once more time
+ * (see @ref app_usbd_core_setup_data_handler_set).
+ *
+ * This function adds small layer of abstraction for checking if EP0 handler
+ * is already configured.
+ *
+ * @retval true EP0 handler is set.
+ * @retval false EP0 handler is cleared.
+ */
+static inline bool usb_core_ep0_handler_check(void)
+{
+ return (NULL != m_ep0_handler_desc.handler);
+}
+
+/**
+ * @brief Empty data handler.
+ *
+ * Data handler used only to mark that there is requested data during SETUP.
+ *
+ * @return Always NRF_SUCCESS
+ * @sa setup_empty_data_handler_desc
+ */
+static ret_code_t setup_data_handler_empty(nrf_drv_usbd_ep_status_t status, void * p_contex)
+{
+ UNUSED_PARAMETER(status);
+ UNUSED_PARAMETER(p_contex);
+ return NRF_SUCCESS;
+}
+
+/**
+ * @brief
+ *
+ * Empty EP0 transfer transfer handler.
+ */
+static app_usbd_core_setup_data_handler_desc_t const m_setup_data_handler_empty_desc =
+{
+ .handler = setup_data_handler_empty,
+ .p_context = NULL
+};
+
+/**
+ * @brief Structure used as a context for descriptor feeder.
+ *
+ * Structure with all the data required to process instances to generate descriptor
+ * data chunk.
+ */
+typedef struct
+{
+ app_usbd_class_inst_t const * p_cinst; //!< The class instance that is to be processed next.
+ const uint8_t * p_desc; //!< Pointer at current descriptor or NULL if finished.
+ /**<
+ * If the value passed by @ref p_desc is NULL on transfer function enter it means that ZLP is required.
+ * Or it is time to finish the transfer (depending on @c total_left).
+ */
+ size_t desc_left; //!< Number of bytes left in the current class descriptor to send
+ size_t total_left; //!< Number of bytes left that was requested by the host
+ app_usbd_class_descriptor_ctx_t feed_thread; //!< Class descriptor context
+} app_usbd_core_descriptor_conf_feed_data_t;
+
+/**
+ * @brief Default data used by the feeder.
+ *
+ *
+ */
+static app_usbd_core_descriptor_conf_feed_data_t m_descriptor_conf_feed_data;
+
+/**
+ * @brief Descriptor feeder.
+ *
+ * Descriptor feeder is used as an callback function when descriptors are
+ * transfered and buffer is ready for next data.
+ * It prepares next chunk of data to be sent.
+ *
+ * @param p_next See @ref nrf_drv_usbd_next_transfer_handler_t documentation.
+ * @param p_context Pointer to @ref app_usbd_core_descriptor_feed_data_t data type.
+ * @param ep_size The size of the endpoint.
+ *
+ * @return See @ref nrf_drv_usbd_next_transfer_handler_t documentation.
+ */
+static bool usbd_descriptor_conf_feeder(
+ nrf_drv_usbd_ep_transfer_t * p_next,
+ void * p_context,
+ size_t ep_size)
+{
+ bool continue_req = true;
+
+ app_usbd_core_descriptor_conf_feed_data_t * p_data = p_context;
+
+
+ if ((p_data->p_desc == NULL) && (app_usbd_class_next_get(p_data->p_cinst) == NULL)
+ && (p_data->desc_left == 0))
+ {
+ /* ZLP */
+ continue_req = false;
+ p_next->p_data.tx = NULL;
+ p_next->size = 0;
+ }
+ else
+ {
+ ASSERT(ep_size <= NRF_DRV_USBD_FEEDER_BUFFER_SIZE);
+ uint8_t * p_tx_buff;
+ size_t size = 0; /* Currently added number of bytes */
+ size_t tx_size; /* Number of bytes to send right now */
+ bool feeding = false;
+
+ /* Feeder function can use the USBD driver internal buffer */
+ p_tx_buff = nrf_drv_usbd_feeder_buffer_get();
+
+ tx_size = MIN(ep_size, p_data->total_left);
+
+ while (0 != tx_size)
+ {
+ size_t to_copy = MIN(tx_size, p_data->desc_left);
+
+ /* First transfer */
+ if (p_data->p_desc != NULL)
+ {
+ memcpy(p_tx_buff + size, p_data->p_desc, to_copy);
+ p_data->p_desc = NULL;
+ }
+ /* Starting with second transfer */
+ else if (0 < p_data->desc_left)
+ {
+ UNUSED_RETURN_VALUE(p_data->p_cinst->p_class_methods->feed_descriptors(
+ &p_data->feed_thread, p_data->p_cinst,
+ (uint8_t *)p_tx_buff + size, to_copy));
+ feeding = true;
+ }
+ else
+ {
+ ;
+ }
+
+ p_data->desc_left -= to_copy;
+ p_data->total_left -= to_copy;
+ tx_size -= to_copy;
+ size += to_copy;
+
+ /* Switch to next class if no descriptor left and first feeding was done */
+ if(p_data->desc_left == 0 && feeding)
+ {
+ p_data->p_cinst = app_usbd_class_next_get(p_data->p_cinst);
+ }
+
+ if (0 == p_data->total_left)
+ {
+ continue_req = false;
+ }
+ else if (0 == p_data->desc_left)
+ {
+ if (NULL == p_data->p_cinst)
+ {
+ p_data->p_desc = NULL;
+ /* No more data - check if ZLP is required */
+ if (size > 0)
+ {
+ if (size < ep_size)
+ {
+ continue_req = false;
+ }
+ }
+ break;
+ }
+ else
+ {
+ /* New class - count descriptor size and initialize feeding thread */
+ app_usbd_class_descriptor_ctx_t desiz;
+ APP_USBD_CLASS_DESCRIPTOR_INIT(&desiz);
+ while(p_data->p_cinst->p_class_methods->feed_descriptors(
+ &desiz, p_data->p_cinst, NULL, sizeof(uint8_t)))
+ {
+ p_data->desc_left++;
+ }
+ APP_USBD_CLASS_DESCRIPTOR_INIT(&p_data->feed_thread);
+ }
+ }
+ else
+ {
+ /* Nothing to do */
+ }
+ }
+ p_next->p_data.tx = p_tx_buff;
+ p_next->size = size;
+ }
+ return continue_req;
+}
+
+/**
+ * @brief Standard endpoint request handle.
+ *
+ * @param[in] p_setup_ev Setup event.
+ *
+ * @return Standard error code.
+ */
+static ret_code_t setup_endpoint_req_std(app_usbd_setup_evt_t const * p_setup_ev)
+{
+ if (APP_USBD_SETUP_REQTYPE_STD != app_usbd_setup_req_typ(p_setup_ev->setup.bmRequestType))
+ {
+ return NRF_ERROR_NOT_SUPPORTED;
+ }
+
+ nrf_drv_usbd_ep_t ep_addr = (nrf_drv_usbd_ep_t)(p_setup_ev->setup.wIndex.lb);
+ app_usbd_state_t usb_state = usbd_core_state_get();
+
+ switch (p_setup_ev->setup.bRequest)
+ {
+ case APP_USBD_SETUP_STDREQ_GET_STATUS:
+ {
+ if ((usb_state == APP_USBD_STATE_Configured) || (NRF_USBD_EP_NR_GET(ep_addr) == 0))
+ {
+ size_t tx_size;
+ uint16_t * p_tx_buff = app_usbd_core_setup_transfer_buff_get(&tx_size);
+
+ p_tx_buff[0] = nrf_drv_usbd_ep_stall_check(ep_addr) ? 1 : 0;
+ return app_usbd_core_setup_rsp(&(p_setup_ev->setup), p_tx_buff, sizeof(uint16_t));
+ }
+ else
+ {
+ return NRF_ERROR_INVALID_STATE;
+ }
+ }
+ case APP_USBD_SETUP_STDREQ_SET_FEATURE:
+ {
+ if ((!NRF_USBD_EPISO_CHECK(ep_addr)) &&
+ (p_setup_ev->setup.wValue.w == APP_USBD_SETUP_STDFEATURE_ENDPOINT_HALT))
+ {
+ if ((usb_state == APP_USBD_STATE_Configured) || (NRF_USBD_EP_NR_GET(ep_addr) == 0))
+ {
+ nrf_drv_usbd_ep_stall(ep_addr);
+ return NRF_SUCCESS;
+ }
+ else
+ {
+ return NRF_ERROR_INVALID_STATE;
+ }
+ }
+ break;
+ }
+ case APP_USBD_SETUP_STDREQ_CLEAR_FEATURE:
+ {
+ if ((!NRF_USBD_EPISO_CHECK(ep_addr)) &&
+ (p_setup_ev->setup.wValue.w == APP_USBD_SETUP_STDFEATURE_ENDPOINT_HALT))
+ {
+ if ((usb_state == APP_USBD_STATE_Configured) || (NRF_USBD_EP_NR_GET(ep_addr) == 0))
+ {
+ nrf_drv_usbd_ep_dtoggle_clear(ep_addr);
+ nrf_drv_usbd_ep_stall_clear(ep_addr);
+ return NRF_SUCCESS;
+ }
+ else
+ {
+ return NRF_ERROR_INVALID_STATE;
+ }
+ }
+ break;
+ }
+ default:
+ break;
+ }
+ return NRF_ERROR_NOT_SUPPORTED;
+}
+
+/**
+ * @brief Standard interface request handle.
+ *
+ * @param[in,out] p_class_inst Class instance that holds selected interface.
+ * @param[in] iface_idx Index of the interface in class structure.
+ * @param[in] p_event Event structure to be processed.
+ *
+ * @return Operation status.
+ */
+static ret_code_t setup_interface_req_std_handle(
+ app_usbd_class_inst_t const * const p_class_inst,
+ uint8_t iface_idx,
+ app_usbd_setup_evt_t const * p_setup_ev)
+{
+ if (APP_USBD_SETUP_REQTYPE_STD != app_usbd_setup_req_typ(p_setup_ev->setup.bmRequestType))
+ {
+ return NRF_ERROR_NOT_SUPPORTED;
+ }
+
+ app_usbd_state_t usb_state = usbd_core_state_get();
+
+ if (app_usbd_setup_req_dir(p_setup_ev->setup.bmRequestType) == APP_USBD_SETUP_REQDIR_IN)
+ {
+ switch (p_setup_ev->setup.bRequest)
+ {
+ case APP_USBD_SETUP_STDREQ_GET_STATUS:
+ {
+ if (!(usb_state == APP_USBD_STATE_Configured))
+ {
+ return NRF_ERROR_INVALID_STATE;
+ }
+ size_t tx_size;
+ uint16_t * p_tx_buff = app_usbd_core_setup_transfer_buff_get(&tx_size);
+ p_tx_buff[0] = 0;
+ return app_usbd_core_setup_rsp(&(p_setup_ev->setup), p_tx_buff, sizeof(uint16_t));
+ }
+ case APP_USBD_SETUP_STDREQ_GET_INTERFACE:
+ {
+ if (!(usb_state == APP_USBD_STATE_Configured))
+ {
+ return NRF_ERROR_INVALID_STATE;
+ }
+ size_t tx_size;
+ uint8_t * p_tx_buff = app_usbd_core_setup_transfer_buff_get(&tx_size);
+ p_tx_buff[0] = app_usbd_iface_selection_get(p_class_inst, iface_idx);
+ return app_usbd_core_setup_rsp(&(p_setup_ev->setup), p_tx_buff, sizeof(uint8_t));
+ }
+ }
+ }
+ else /* APP_USBD_SETUP_REQDIR_OUT */
+ {
+ switch (p_setup_ev->setup.bRequest)
+ {
+ case APP_USBD_SETUP_STDREQ_SET_INTERFACE:
+ {
+ if (!(usb_state == APP_USBD_STATE_Configured))
+ {
+ return NRF_ERROR_INVALID_STATE;
+ }
+
+ if(p_setup_ev->setup.wValue.w > UINT8_MAX)
+ {
+ return NRF_ERROR_INVALID_PARAM;
+ }
+ uint8_t alt = p_setup_ev->setup.wValue.lb;
+ return app_usbd_iface_select(p_class_inst, iface_idx, alt);
+ }
+ default:
+ break;
+ }
+ }
+ return NRF_ERROR_NOT_SUPPORTED;
+}
+
+/**
+ * @brief
+ *
+ * Descriptors feeder handle structure.
+ */
+static const nrf_drv_usbd_handler_desc_t usbd_descriptor_feeder_desc =
+{
+ .handler = { .feeder = usbd_descriptor_conf_feeder },
+ .p_context = &m_descriptor_conf_feed_data
+};
+
+static ret_code_t setup_device_req_get_status(
+ app_usbd_class_inst_t const * const p_inst,
+ app_usbd_setup_evt_t const * const p_setup_ev)
+{
+ size_t max_size;
+ uint8_t * p_trans_buff = app_usbd_core_setup_transfer_buff_get(&max_size);
+ ASSERT(sizeof(uint16_t) <= max_size);
+
+ memset(p_trans_buff, 0, sizeof(uint16_t));
+ if (m_configuration_dsc.bmAttributes &
+ APP_USBD_DESCRIPTOR_CONFIGURATION_ATTRIBUTE_SELF_POWERED_MASK)
+ {
+ SET_BIT(p_trans_buff[0], 0);
+ }
+ if (IS_SET(m_device_features_state, APP_USBD_SETUP_STDFEATURE_DEVICE_REMOTE_WAKEUP))
+ {
+ SET_BIT(p_trans_buff[0], 1);
+ }
+ return app_usbd_core_setup_rsp(&(p_setup_ev->setup), p_trans_buff, sizeof(uint16_t));
+}
+
+static ret_code_t setup_device_req_get_descriptor(app_usbd_class_inst_t const * const p_inst,
+ app_usbd_setup_evt_t const * const p_setup_ev)
+{
+ switch (p_setup_ev->setup.wValue.hb)
+ {
+ case APP_USBD_DESCRIPTOR_DEVICE:
+ {
+ if(p_setup_ev->setup.wLength.w == 0)
+ {
+ return NRF_SUCCESS;
+ }
+
+ return app_usbd_core_setup_rsp(&(p_setup_ev->setup),
+ &m_device_dsc,
+ sizeof(m_device_dsc));
+ }
+ case APP_USBD_DESCRIPTOR_CONFIGURATION:
+ {
+ if(p_setup_ev->setup.wLength.w == 0)
+ {
+ return NRF_SUCCESS;
+ }
+
+ /* The size equals the size of configuration descriptor and all classes descriptors */
+ const size_t size = MIN(
+ sizeof(app_usbd_descriptor_configuration_t),
+ p_setup_ev->setup.wLength.w);
+ size_t total_length = sizeof(app_usbd_descriptor_configuration_t);
+ uint8_t iface_count = 0;
+
+ /* Iterate over all registered classes count descriptors and total size */
+ app_usbd_class_inst_t const * p_class;
+ for (p_class = app_usbd_class_first_get(); p_class != NULL;
+ p_class = app_usbd_class_next_get(p_class))
+ {
+ ASSERT(NULL != (p_class->p_class_methods));
+ ASSERT(NULL != (p_class->p_class_methods->feed_descriptors));
+ size_t dsc_size = 0;
+ app_usbd_class_descriptor_ctx_t siz_desc;
+ APP_USBD_CLASS_DESCRIPTOR_INIT(&siz_desc);
+ while(p_class->p_class_methods->feed_descriptors(&siz_desc,
+ p_class,
+ NULL,
+ sizeof(uint8_t))
+ )
+ {
+ dsc_size++;
+ }
+ total_length += dsc_size;
+ iface_count += app_usbd_class_iface_count_get(p_class);
+ }
+
+ /* Access transmission buffer */
+ size_t max_size;
+ app_usbd_descriptor_configuration_t * p_trans_buff =
+ app_usbd_core_setup_transfer_buff_get(&max_size);
+ /* Copy the configuration descriptor and update the fields that require it */
+ ASSERT(size <= max_size);
+ memcpy(p_trans_buff, &m_configuration_dsc, size);
+
+ p_trans_buff->bNumInterfaces = iface_count;
+ p_trans_buff->wTotalLength = total_length;
+ if (app_usbd_class_rwu_enabled_check())
+ {
+ p_trans_buff->bmAttributes |=
+ APP_USBD_DESCRIPTOR_CONFIGURATION_ATTRIBUTE_REMOTE_WAKEUP_MASK;
+ }
+
+
+ m_descriptor_conf_feed_data.p_cinst = app_usbd_class_first_get();
+ m_descriptor_conf_feed_data.p_desc = (void *)p_trans_buff;
+ m_descriptor_conf_feed_data.desc_left = size;
+ m_descriptor_conf_feed_data.total_left = p_setup_ev->setup.wLength.w;
+
+ /* Start first transfer */
+ ret_code_t ret;
+ CRITICAL_REGION_ENTER();
+
+ ret = app_usbd_ep_handled_transfer(
+ NRF_DRV_USBD_EPIN0,
+ &usbd_descriptor_feeder_desc);
+
+ if (NRF_SUCCESS == ret)
+ {
+ ret = app_usbd_core_setup_data_handler_set(
+ NRF_DRV_USBD_EPIN0,
+ &m_setup_data_handler_empty_desc);
+ }
+ CRITICAL_REGION_EXIT();
+
+ return ret;
+ }
+ case APP_USBD_DESCRIPTOR_STRING:
+ {
+ if(p_setup_ev->setup.wLength.w == 0)
+ {
+ return NRF_SUCCESS;
+ }
+
+ app_usbd_string_desc_idx_t id =
+ (app_usbd_string_desc_idx_t)(p_setup_ev->setup.wValue.lb);
+ uint16_t langid = p_setup_ev->setup.wIndex.w;
+ uint16_t const * p_string_dsc = app_usbd_string_desc_get(id, langid);
+ if (p_string_dsc == NULL)
+ {
+ return NRF_ERROR_NOT_SUPPORTED;
+ }
+
+ return app_usbd_core_setup_rsp(
+ &p_setup_ev->setup,
+ p_string_dsc,
+ app_usbd_string_desc_length(p_string_dsc));
+ }
+ default:
+ break;
+ }
+
+
+ return NRF_ERROR_NOT_SUPPORTED;
+}
+
+static ret_code_t setup_device_req_get_configuration(
+ app_usbd_class_inst_t const * const p_inst,
+ app_usbd_setup_evt_t const * const p_setup_ev)
+{
+ size_t max_size;
+ uint8_t * p_trans_buff = app_usbd_core_setup_transfer_buff_get(&max_size);
+ app_usbd_state_t usb_state = usbd_core_state_get();
+ if (usb_state == APP_USBD_STATE_Configured)
+ {
+ p_trans_buff[0] = 1;
+ }
+ else if (usb_state == APP_USBD_STATE_Addressed)
+ {
+ p_trans_buff[0] = 0;
+ }
+ else
+ {
+ return NRF_ERROR_NOT_SUPPORTED;
+ }
+
+ return app_usbd_core_setup_rsp(&p_setup_ev->setup, p_trans_buff, sizeof(p_trans_buff[0]));
+}
+
+static ret_code_t setup_device_req_set_configuration(
+ app_usbd_class_inst_t const * const p_inst,
+ app_usbd_setup_evt_t const * const p_setup_ev)
+{
+ app_usbd_state_t usb_state = usbd_core_state_get();
+ if (!((usb_state == APP_USBD_STATE_Configured) ||
+ (usb_state == APP_USBD_STATE_Addressed)))
+ {
+ return NRF_ERROR_INVALID_STATE;
+ }
+
+ if (p_setup_ev->setup.wValue.lb == 0)
+ {
+ app_usbd_all_iface_deselect();
+ usbd_core_state_set(APP_USBD_STATE_Addressed);
+ }
+ else if (p_setup_ev->setup.wValue.lb == 1)
+ {
+ /*Clear all bulk/interrupt endpoint status and set toggle to DATA0*/
+ app_usbd_all_iface_select_0();
+ usbd_core_state_set(APP_USBD_STATE_Configured);
+ }
+ else
+ {
+ /*In this driver only one configuration is supported.*/
+ return NRF_ERROR_INVALID_PARAM;
+ }
+
+ return NRF_SUCCESS;
+}
+
+/**
+ * @brief Internal SETUP event handler.
+ * @param[in] p_inst Instance of the class.
+ * @param[in] p_setup_ev Setup request.
+ * @return Standard error code.
+ * @retval NRF_SUCCESS Request handled correctly.
+ * @retval NRF_ERROR_NOT_SUPPORTED Request is not supported.
+ */
+static ret_code_t setup_device_req_std_handler(app_usbd_class_inst_t const * const p_inst,
+ app_usbd_setup_evt_t const * const p_setup_ev)
+{
+ ASSERT(p_inst != NULL);
+ ASSERT(p_setup_ev != NULL);
+
+ if (APP_USBD_SETUP_REQTYPE_STD != app_usbd_setup_req_typ(p_setup_ev->setup.bmRequestType))
+ {
+ return NRF_ERROR_NOT_SUPPORTED;
+ }
+
+ if (app_usbd_setup_req_dir(p_setup_ev->setup.bmRequestType) == APP_USBD_SETUP_REQDIR_IN)
+ {
+ switch (p_setup_ev->setup.bRequest)
+ {
+ case APP_USBD_SETUP_STDREQ_GET_STATUS:
+ {
+ return setup_device_req_get_status(p_inst, p_setup_ev);
+ }
+ case APP_USBD_SETUP_STDREQ_GET_DESCRIPTOR:
+ {
+ return setup_device_req_get_descriptor(p_inst, p_setup_ev);
+ }
+ case APP_USBD_SETUP_STDREQ_GET_CONFIGURATION:
+ {
+ return setup_device_req_get_configuration(p_inst, p_setup_ev);
+ }
+ default:
+ /*Not supported*/
+ break;
+ }
+ return NRF_ERROR_NOT_SUPPORTED;
+ }
+ else /* APP_USBD_SETUP_REQDIR_OUT */
+ {
+ switch (p_setup_ev->setup.bRequest)
+ {
+ case APP_USBD_SETUP_STDREQ_SET_ADDRESS:
+ {
+ ASSERT(0); /* should never reach this point */
+ break;
+ }
+ case APP_USBD_SETUP_STDREQ_SET_FEATURE:
+ {
+ if (p_setup_ev->setup.wValue.w == APP_USBD_SETUP_STDFEATURE_DEVICE_REMOTE_WAKEUP)
+ {
+ if (!app_usbd_class_rwu_enabled_check())
+ {
+ return NRF_ERROR_FORBIDDEN;
+ }
+ SET_BIT(m_device_features_state, APP_USBD_SETUP_STDFEATURE_DEVICE_REMOTE_WAKEUP);
+ return NRF_SUCCESS;
+ }
+ break;
+ }
+ case APP_USBD_SETUP_STDREQ_CLEAR_FEATURE:
+ {
+ if (p_setup_ev->setup.wValue.w == APP_USBD_SETUP_STDFEATURE_DEVICE_REMOTE_WAKEUP)
+ {
+ if (!app_usbd_class_rwu_enabled_check())
+ {
+ return NRF_ERROR_FORBIDDEN;
+ }
+ CLR_BIT(m_device_features_state, APP_USBD_SETUP_STDFEATURE_DEVICE_REMOTE_WAKEUP);
+ return NRF_SUCCESS;
+ }
+ break;
+ }
+ case APP_USBD_SETUP_STDREQ_SET_CONFIGURATION:
+ {
+ return setup_device_req_set_configuration(p_inst, p_setup_ev);
+ }
+ case APP_USBD_SETUP_STDREQ_SET_DESCRIPTOR:
+ {
+ /*Not supported yet.*/
+ break;
+ }
+ default:
+ /*Not supported*/
+ break;
+ }
+ return NRF_ERROR_NOT_SUPPORTED;
+ }
+}
+
+/**
+ * @brief Process SETUP command.
+ *
+ * Auxiliary function for SETUP command processing.
+ */
+static inline ret_code_t app_usbd_core_setup_req_handler(app_usbd_class_inst_t const * const p_inst)
+{
+ app_usbd_setup_evt_t setup_ev;
+ ret_code_t ret = NRF_ERROR_NOT_SUPPORTED; /* Final result of request processing function */
+
+ setup_ev.type = APP_USBD_EVT_DRV_SETUP;
+ nrf_drv_usbd_setup_get((nrf_drv_usbd_setup_t *)&(setup_ev.setup));
+
+ NRF_LOG_DEBUG("SETUP: t: 0x%.2x r: 0x%.2x",
+ setup_ev.setup.bmRequestType,
+ setup_ev.setup.bRequest);
+ if (usb_core_ep0_handler_check())
+ {
+ NRF_LOG_WARNING("Previous setup not finished!");
+ }
+ /* Clear EP0 handler if there is anything in progress */
+ usbd_core_ep0_handler_clear();
+
+ switch (app_usbd_setup_req_rec(setup_ev.setup.bmRequestType))
+ {
+ case APP_USBD_SETUP_REQREC_DEVICE:
+ {
+ /* Endpoint 0 has core instance (that process device requests) connected */
+ ret = setup_device_req_std_handler(p_inst, &setup_ev);
+ if (ret == NRF_ERROR_NOT_SUPPORTED)
+ {
+ ret = app_usbd_all_until_served_call((app_usbd_complex_evt_t const *)&setup_ev);
+ }
+ break;
+ }
+ case APP_USBD_SETUP_REQREC_INTERFACE:
+ {
+ uint8_t const iface_number = setup_ev.setup.wIndex.lb;
+ uint8_t iface_idx;
+ app_usbd_class_inst_t const * p_inst_found = app_usbd_iface_find(
+ iface_number,
+ &iface_idx);
+ if (p_inst_found == NULL)
+ {
+ ret = NRF_ERROR_INVALID_ADDR;
+ }
+ else
+ {
+ ret = app_usbd_iface_call(
+ p_inst_found, iface_idx,
+ (app_usbd_complex_evt_t const *)&setup_ev);
+ if (ret == NRF_ERROR_NOT_SUPPORTED)
+ {
+ ret = setup_interface_req_std_handle(p_inst_found, iface_idx, &setup_ev);
+ }
+ }
+ break;
+ }
+ case APP_USBD_SETUP_REQREC_ENDPOINT:
+ {
+ ret = NRF_ERROR_NOT_SUPPORTED;
+ nrf_drv_usbd_ep_t ep = (nrf_drv_usbd_ep_t)setup_ev.setup.wIndex.lb;
+ if ((NRF_USBD_EP_NR_GET(ep) != 0)) /* For EP0 we would call this function again! */
+ {
+ ret = app_usbd_ep_call(ep, (app_usbd_complex_evt_t const *)&setup_ev);
+ }
+ if (ret == NRF_ERROR_NOT_SUPPORTED)
+ {
+ ret = setup_endpoint_req_std(&setup_ev);
+ }
+ break;
+ }
+ case APP_USBD_SETUP_REQREC_OTHER:
+ {
+ /* Try to process via every instance */
+ ret = app_usbd_all_until_served_call((app_usbd_complex_evt_t const *)&setup_ev);
+ break;
+ }
+ default:
+ break;
+ }
+
+ /* Processing result */
+ if (ret == NRF_SUCCESS)
+ {
+ if (usb_core_ep0_handler_check())
+ {
+ if (NRF_DRV_USBD_EPOUT0 == nrf_drv_usbd_last_setup_dir_get())
+ {
+ /* Request processed successfully and requires SETUP data */
+ nrf_drv_usbd_setup_data_clear();
+ }
+ }
+ else
+ {
+ /* Request processed successfully */
+ nrf_drv_usbd_setup_clear();
+ }
+ }
+ else
+ {
+ /* Request finished with error */
+ nrf_drv_usbd_setup_stall();
+ }
+ return ret;
+}
+
+/**
+ * @brief Event handler for core module.
+ *
+ * The event handler that would process all events directed to device.
+ *
+ */
+static ret_code_t app_usbd_core_event_handler(app_usbd_class_inst_t const * const p_inst,
+ app_usbd_complex_evt_t const * const p_event)
+{
+ ret_code_t ret = NRF_ERROR_NOT_SUPPORTED;
+ switch (p_event->type)
+ {
+ case APP_USBD_EVT_DRV_RESET:
+ {
+ usbd_core_state_set(APP_USBD_STATE_Default);
+ break;
+ }
+ case APP_USBD_EVT_DRV_SUSPEND:
+ {
+ ret = NRF_SUCCESS;
+ break;
+ }
+ case APP_USBD_EVT_DRV_RESUME:
+ {
+ if (nrf_atomic_flag_clear_fetch(&m_rwu_pending) != 0)
+ {
+ nrf_usbd_task_trigger(NRF_USBD_TASK_NODRIVEDPDM);
+ }
+
+ ASSERT(usbd_core_state_get() >= APP_USBD_STATE_Unattached);
+ ret = NRF_SUCCESS;
+ break;
+ }
+ case APP_USBD_EVT_SETUP_SETADDRESS:
+ {
+ app_usbd_state_t usb_state = usbd_core_state_get();
+ if (usb_state == APP_USBD_STATE_Default)
+ {
+ usbd_core_state_set(APP_USBD_STATE_Addressed);
+ }
+ break;
+ }
+ case APP_USBD_EVT_DRV_SETUP:
+ {
+ ret = app_usbd_core_setup_req_handler(p_inst);
+ break;
+ }
+ case APP_USBD_EVT_INST_APPEND:
+ {
+ ASSERT(usbd_core_state_get() == APP_USBD_STATE_Disabled);
+ ret = NRF_SUCCESS;
+ break;
+ }
+ case APP_USBD_EVT_INST_REMOVE:
+ {
+ ASSERT(usbd_core_state_get() == APP_USBD_STATE_Unattached);
+ usbd_core_state_set(APP_USBD_STATE_Disabled);
+ ret = NRF_SUCCESS;
+ break;
+ }
+ case APP_USBD_EVT_STARTED:
+ {
+ if (usbd_core_power_is_detected())
+ {
+ usbd_core_state_set(APP_USBD_STATE_Powered);
+ }
+ else
+ {
+ usbd_core_state_set(APP_USBD_STATE_Unattached);
+ }
+ ret = NRF_SUCCESS;
+ break;
+ }
+ case APP_USBD_EVT_STOPPED:
+ {
+ ASSERT(usbd_core_state_get() >= APP_USBD_STATE_Powered);
+ usbd_core_state_set(APP_USBD_STATE_Unattached);
+ ret = NRF_SUCCESS;
+ break;
+ }
+ /* Data transfer on endpoint 0 */
+ case APP_USBD_EVT_DRV_EPTRANSFER:
+ {
+ if (p_event->drv_evt.data.eptransfer.status == NRF_USBD_EP_ABORTED)
+ {
+ /* Just ignore aborting */
+ break;
+ }
+ /* This EPTRANSFER event has to be called only for EP0 */
+ ASSERT((p_event->drv_evt.data.eptransfer.ep == NRF_DRV_USBD_EPOUT0) ||
+ (p_event->drv_evt.data.eptransfer.ep == NRF_DRV_USBD_EPIN0));
+ ret = usbd_core_ep0_handler_call_and_clear(p_event->drv_evt.data.eptransfer.status);
+ /* Processing result */
+ if (ret == NRF_SUCCESS)
+ {
+ if (usb_core_ep0_handler_check())
+ {
+ if (p_event->drv_evt.data.eptransfer.ep == NRF_DRV_USBD_EPOUT0)
+ {
+ /* Request processed successfully and requires SETUP data */
+ nrf_drv_usbd_setup_data_clear();
+ }
+ }
+ else
+ {
+ if (!nrf_drv_usbd_errata_154())
+ {
+ nrf_drv_usbd_setup_clear();
+ }
+ }
+ }
+ else
+ {
+ /* Request finished with error */
+ nrf_drv_usbd_setup_stall();
+ }
+ break;
+ }
+ default:
+ break;
+ }
+
+ return ret;
+}
+
+/** @} */
+
+void app_usbd_core_ep0_enable(void)
+{
+ app_usbd_ep_enable(NRF_DRV_USBD_EPOUT0);
+ app_usbd_ep_enable(NRF_DRV_USBD_EPIN0);
+}
+
+void app_usbd_core_ep0_disable(void)
+{
+ app_usbd_ep_disable(NRF_DRV_USBD_EPOUT0);
+ app_usbd_ep_disable(NRF_DRV_USBD_EPIN0);
+}
+
+
+ret_code_t app_usbd_core_setup_rsp(app_usbd_setup_t const * p_setup,
+ void const * p_data,
+ size_t size)
+{
+ size_t req_size = p_setup->wLength.w;
+ size_t tx_size = MIN(req_size, size);
+ bool zlp_required = (size < req_size) &&
+ (0 == (size % nrf_drv_usbd_ep_max_packet_size_get(NRF_DRV_USBD_EPIN0)));
+
+ NRF_DRV_USBD_TRANSFER_IN_FLAGS(
+ transfer,
+ p_data,
+ tx_size,
+ zlp_required ? NRF_DRV_USBD_TRANSFER_ZLP_FLAG : 0);
+
+ ret_code_t ret;
+ CRITICAL_REGION_ENTER();
+ ret = app_usbd_ep_transfer(NRF_DRV_USBD_EPIN0, &transfer);
+ if (NRF_SUCCESS == ret)
+ {
+ ret = app_usbd_core_setup_data_handler_set(NRF_DRV_USBD_EPIN0,
+ &m_setup_data_handler_empty_desc);
+ }
+ CRITICAL_REGION_EXIT();
+
+ return ret;
+}
+
+ret_code_t app_usbd_core_setup_data_handler_set(
+ nrf_drv_usbd_ep_t ep,
+ app_usbd_core_setup_data_handler_desc_t const * const p_handler_desc)
+{
+ if (nrf_drv_usbd_last_setup_dir_get() != ep)
+ {
+ return NRF_ERROR_INVALID_ADDR;
+ }
+
+ m_ep0_handler_desc = *p_handler_desc;
+ return NRF_SUCCESS;
+}
+
+void * app_usbd_core_setup_transfer_buff_get(size_t * p_size)
+{
+ if (p_size != NULL)
+ *p_size = sizeof(m_setup_transfer_buff);
+
+ return m_setup_transfer_buff;
+}
+
+app_usbd_state_t app_usbd_core_state_get(void)
+{
+ return usbd_core_state_get();
+}
+
+
+bool app_usbd_core_feature_state_get(app_usbd_setup_stdfeature_t feature)
+{
+ return IS_SET(m_device_features_state, feature) ? true : false;
+}
+
+#endif //NRF_MODULE_ENABLED(APP_USBD)
diff --git a/third_party/NordicSemiconductor/libraries/usb/app_usbd_core.h b/third_party/NordicSemiconductor/libraries/usb/app_usbd_core.h
index 36b62c2..efa9d3e 100644
--- a/third_party/NordicSemiconductor/libraries/usb/app_usbd_core.h
+++ b/third_party/NordicSemiconductor/libraries/usb/app_usbd_core.h
@@ -1,222 +1,222 @@
-/**
- * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#ifndef APP_USBD_CORE_H__
-#define APP_USBD_CORE_H__
-
-#include <stdint.h>
-
-#include "sdk_common.h"
-#include "nrf_drv_usbd.h"
-#include "app_usbd_types.h"
-#include "app_usbd_class_base.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-
-/**
- * @defgroup app_usbd_core USB Device high level library core module
- * @ingroup app_usbd
- *
- * @brief @tagAPI52840 Core module that manages current USB state and process device requests.
- * @{
- */
-
-/**
- * @brief Core interface configuration.
- *
- * Core instance would have 2 endpoints (IN0 and OUT0).
- * The interface number does not matter because it is not used.
- */
-#define APP_USBD_CORE_CLASS_CONFIGURATION ((0, NRF_DRV_USBD_EPOUT0, NRF_DRV_USBD_EPIN0))
-
-/**
- * @brief USB Device state.
- *
- * Possible USB Device states according to specification.
- */
-typedef enum
-{
- APP_USBD_STATE_Disabled , /**< The whole USBD library is disabled */
- APP_USBD_STATE_Unattached, /**< Device is currently not connected to the host */
- APP_USBD_STATE_Powered , /**< Device is connected to the host but has not been enumerated */
- APP_USBD_STATE_Default , /**< USB Reset condition detected, waiting for the address */
- APP_USBD_STATE_Addressed , /**< Device has been addressed but has not been configured */
- APP_USBD_STATE_Configured, /**< Device is addressed and configured */
-}app_usbd_state_t;
-
-/**
- * @brief EP0 handler function pointer.
- *
- * Type of the variable that would hold the pointer to the handler for
- * endpoint 0 messages processing.
- *
- * @param p_contex Context variable configured with the transmission request.
- */
-typedef ret_code_t (*app_usbd_core_setup_data_handler_t)(nrf_drv_usbd_ep_status_t status,
- void * p_context);
-
-/**
- * @brief Variable type used to register EP0 transfer handler.
- *
- * EP0 messages are processed by core instance.
- * Another class can register itself to receive messages from EP0 when requesting
- * for Setup data transfer.
- */
-typedef struct
-{
- app_usbd_core_setup_data_handler_t handler; //!< Event handler to be called when transmission is ready
- void * p_context; //!< Context pointer to be send to every called event.
-} app_usbd_core_setup_data_handler_desc_t;
-
-/*lint -save -e10 -e26 -e93 -e123 -e505 */
-/**
- * @brief Declare Core instance type.
- *
- * USBD core instance type definition.
- */
-APP_USBD_CLASS_TYPEDEF(app_usbd_core,
- APP_USBD_CORE_CLASS_CONFIGURATION,
- APP_USBD_CLASS_INSTANCE_SPECIFIC_DEC_NONE,
- APP_USBD_CLASS_DATA_SPECIFIC_DEC_NONE);
-/*lint -restore*/
-
-/**
- * @brief Access to core instance.
- *
- * Function that returns pointer to the USBD core instance.
- *
- * @return pointer to the core instance.
- */
-static inline app_usbd_class_inst_t const * app_usbd_core_instance_access(void)
-{
- extern const APP_USBD_CLASS_INSTANCE_TYPE(app_usbd_core) app_usbd_core_inst;
- return (app_usbd_class_inst_t const *)&app_usbd_core_inst;
-}
-
-/**
- * @brief Enable endpoint 0
- *
- * Function enables endpoint OUT0 and IN0.
- * This makes the USB respond to SETUP transfers.
- */
-void app_usbd_core_ep0_enable(void);
-
-/**
- * @brief Disable endpoint 0
- *
- * Function disables endpoint OUT0 and IN0.
- * This makes the USB ignore SETUP transfers.
- */
-void app_usbd_core_ep0_disable(void);
-
-/**
- * @brief Default simple response to setup command.
- *
- * This function generates default simple response.
- * It sends ZLP when required and on takes care on allowing status stage when
- * transfer is finished.
- *
- * @param p_setup Pointer to original setup message.
- * @param p_data Pointer to the response. This has to be globaly aviable data.
- * @param size Total size of the answer - The function takes care about
- * limiting the size of transfered data to the size required
- * by setup command.
- */
-ret_code_t app_usbd_core_setup_rsp(app_usbd_setup_t const * p_setup,
- void const * p_data,
- size_t size);
-
-/**
- * @brief Configure the handler for the nearest setup data endpoint transfer.
- *
- * This function would be called on incomming setup data.
- * The correct place to set the handler for a data is when SETUP command
- * was received.
- *
- * @param ep Endpoint number (only IN0 and OUT0 are supported).
- * @param p_handler_desc Descriptor of the handler to be called.
- *
- * @retval NRF_SUCCESS Successfully configured.
- * @retval NRF_ERROR_INVALID_ADDR Last received setup direction does not match
- * configured endpoint.
- */
-ret_code_t app_usbd_core_setup_data_handler_set(
- nrf_drv_usbd_ep_t ep,
- app_usbd_core_setup_data_handler_desc_t const * const p_handler_desc);
-
-/**
- * @brief Set up a data transfer buffer.
- *
- * Returns special internal buffer that can be used in setup transfer.
- * @return Internal buffer pointer.
- */
-void * app_usbd_core_setup_transfer_buff_get(size_t * p_size);
-
-
-/**@brief Return internal USBD core state.
- *
- * @return Check @ref app_usbd_state_t to find possible USBD core states.
- */
-app_usbd_state_t app_usbd_core_state_get(void);
-
-
-/**
- * @brief Check current feature state.
- *
- * Function checks the state of the selected feature that was configured by the host.
- *
- * @param feature Feature to check. @ref app_usbd_setup_stdfeature_t
- * Only features related to the device should be checked by this function.
- *
- * @retval true Selected feature is set.
- * @retval false Selected feature is cleared.
- */
-bool app_usbd_core_feature_state_get(app_usbd_setup_stdfeature_t feature);
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* APP_USBD_CORE_H__ */
+/**
+ * Copyright (c) 2016 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef APP_USBD_CORE_H__
+#define APP_USBD_CORE_H__
+
+#include <stdint.h>
+
+#include "sdk_common.h"
+#include "nrf_drv_usbd.h"
+#include "app_usbd_types.h"
+#include "app_usbd_class_base.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/**
+ * @defgroup app_usbd_core USB Device high level library core module
+ * @ingroup app_usbd
+ *
+ * @brief @tagAPI52840 Core module that manages current USB state and process device requests.
+ * @{
+ */
+
+/**
+ * @brief Core interface configuration.
+ *
+ * Core instance would have 2 endpoints (IN0 and OUT0).
+ * The interface number does not matter because it is not used.
+ */
+#define APP_USBD_CORE_CLASS_CONFIGURATION ((0, NRF_DRV_USBD_EPOUT0, NRF_DRV_USBD_EPIN0))
+
+/**
+ * @brief USB Device state.
+ *
+ * Possible USB Device states according to specification.
+ */
+typedef enum
+{
+ APP_USBD_STATE_Disabled , /**< The whole USBD library is disabled */
+ APP_USBD_STATE_Unattached, /**< Device is currently not connected to the host */
+ APP_USBD_STATE_Powered , /**< Device is connected to the host but has not been enumerated */
+ APP_USBD_STATE_Default , /**< USB Reset condition detected, waiting for the address */
+ APP_USBD_STATE_Addressed , /**< Device has been addressed but has not been configured */
+ APP_USBD_STATE_Configured, /**< Device is addressed and configured */
+}app_usbd_state_t;
+
+/**
+ * @brief EP0 handler function pointer.
+ *
+ * Type of the variable that would hold the pointer to the handler for
+ * endpoint 0 messages processing.
+ *
+ * @param p_contex Context variable configured with the transmission request.
+ */
+typedef ret_code_t (*app_usbd_core_setup_data_handler_t)(nrf_drv_usbd_ep_status_t status,
+ void * p_context);
+
+/**
+ * @brief Variable type used to register EP0 transfer handler.
+ *
+ * EP0 messages are processed by core instance.
+ * Another class can register itself to receive messages from EP0 when requesting
+ * for Setup data transfer.
+ */
+typedef struct
+{
+ app_usbd_core_setup_data_handler_t handler; //!< Event handler to be called when transmission is ready
+ void * p_context; //!< Context pointer to be send to every called event.
+} app_usbd_core_setup_data_handler_desc_t;
+
+/*lint -save -e10 -e26 -e93 -e123 -e505 */
+/**
+ * @brief Declare Core instance type.
+ *
+ * USBD core instance type definition.
+ */
+APP_USBD_CLASS_TYPEDEF(app_usbd_core,
+ APP_USBD_CORE_CLASS_CONFIGURATION,
+ APP_USBD_CLASS_INSTANCE_SPECIFIC_DEC_NONE,
+ APP_USBD_CLASS_DATA_SPECIFIC_DEC_NONE);
+/*lint -restore*/
+
+/**
+ * @brief Access to core instance.
+ *
+ * Function that returns pointer to the USBD core instance.
+ *
+ * @return pointer to the core instance.
+ */
+static inline app_usbd_class_inst_t const * app_usbd_core_instance_access(void)
+{
+ extern const APP_USBD_CLASS_INSTANCE_TYPE(app_usbd_core) app_usbd_core_inst;
+ return (app_usbd_class_inst_t const *)&app_usbd_core_inst;
+}
+
+/**
+ * @brief Enable endpoint 0
+ *
+ * Function enables endpoint OUT0 and IN0.
+ * This makes the USB respond to SETUP transfers.
+ */
+void app_usbd_core_ep0_enable(void);
+
+/**
+ * @brief Disable endpoint 0
+ *
+ * Function disables endpoint OUT0 and IN0.
+ * This makes the USB ignore SETUP transfers.
+ */
+void app_usbd_core_ep0_disable(void);
+
+/**
+ * @brief Default simple response to setup command.
+ *
+ * This function generates default simple response.
+ * It sends ZLP when required and on takes care on allowing status stage when
+ * transfer is finished.
+ *
+ * @param p_setup Pointer to original setup message.
+ * @param p_data Pointer to the response. This has to be globaly aviable data.
+ * @param size Total size of the answer - The function takes care about
+ * limiting the size of transfered data to the size required
+ * by setup command.
+ */
+ret_code_t app_usbd_core_setup_rsp(app_usbd_setup_t const * p_setup,
+ void const * p_data,
+ size_t size);
+
+/**
+ * @brief Configure the handler for the nearest setup data endpoint transfer.
+ *
+ * This function would be called on incomming setup data.
+ * The correct place to set the handler for a data is when SETUP command
+ * was received.
+ *
+ * @param ep Endpoint number (only IN0 and OUT0 are supported).
+ * @param p_handler_desc Descriptor of the handler to be called.
+ *
+ * @retval NRF_SUCCESS Successfully configured.
+ * @retval NRF_ERROR_INVALID_ADDR Last received setup direction does not match
+ * configured endpoint.
+ */
+ret_code_t app_usbd_core_setup_data_handler_set(
+ nrf_drv_usbd_ep_t ep,
+ app_usbd_core_setup_data_handler_desc_t const * const p_handler_desc);
+
+/**
+ * @brief Set up a data transfer buffer.
+ *
+ * Returns special internal buffer that can be used in setup transfer.
+ * @return Internal buffer pointer.
+ */
+void * app_usbd_core_setup_transfer_buff_get(size_t * p_size);
+
+
+/**@brief Return internal USBD core state.
+ *
+ * @return Check @ref app_usbd_state_t to find possible USBD core states.
+ */
+app_usbd_state_t app_usbd_core_state_get(void);
+
+
+/**
+ * @brief Check current feature state.
+ *
+ * Function checks the state of the selected feature that was configured by the host.
+ *
+ * @param feature Feature to check. @ref app_usbd_setup_stdfeature_t
+ * Only features related to the device should be checked by this function.
+ *
+ * @retval true Selected feature is set.
+ * @retval false Selected feature is cleared.
+ */
+bool app_usbd_core_feature_state_get(app_usbd_setup_stdfeature_t feature);
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* APP_USBD_CORE_H__ */
diff --git a/third_party/NordicSemiconductor/libraries/usb/app_usbd_descriptor.h b/third_party/NordicSemiconductor/libraries/usb/app_usbd_descriptor.h
index 5c0d551..5c2e100 100644
--- a/third_party/NordicSemiconductor/libraries/usb/app_usbd_descriptor.h
+++ b/third_party/NordicSemiconductor/libraries/usb/app_usbd_descriptor.h
@@ -1,337 +1,337 @@
-/**
- * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#ifndef APP_USBD_DESCRIPTOR_H__
-#define APP_USBD_DESCRIPTOR_H__
-
-#include "nrf.h"
-#include "nrf_drv_usbd.h"
-#include "app_usbd_langid.h"
-#include "app_util_platform.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Compiler support for anonymous unions */
-ANON_UNIONS_ENABLE;
-
-/**
- * @defgroup app_usbd_descriptor USB standard descriptors
- * @ingroup app_usbd
- *
- * @brief @tagAPI52840 Module with types definitions used for standard descriptors.
- * @{
- */
-
-/**
- * @brief Helper macro for translating unsigned 24 bit value to 2 byte raw descriptor.
- * */
-#define APP_USBD_U16_TO_RAW_DSC(val) (uint8_t)(val), \
- (uint8_t)(((val) / (256)))
-
-/**
- * @brief Helper macro for translating unsigned 24 bit value to 3 byte raw descriptor.
- * */
-#define APP_USBD_U24_TO_RAW_DSC(val) (uint8_t)(val), \
- (uint8_t)(((val) / (256))), \
- (uint8_t)(((val) / (256 * 256)))
-
-/**
- * @brief Helper macro for translating unsigned 32 bit value to 4 byte raw descriptor.
- * */
-#define APP_USBD_U32_TO_RAW_DSC(val) (uint8_t)(val), \
- (uint8_t)(((val) / (256))), \
- (uint8_t)(((val) / (256 * 256))) \
- (uint8_t)(((val) / (256 * 256 * 256)))
-/**
- * @brief Descriptor types.
- *
- * Descriptor types used in two situations:
- * - when processing @ref APP_USBD_SETUP_STDREQ_GET_DESCRIPTOR SETUP request,
- * the required descriptor type may be placed in wValue in HighByte.
- * - As a descriptor identifier itself inside descriptor stream.
- *
- * According to chapter 9.6 of USB 2.0 specification, following descriptors may
- * be requested directly by GetDescriptor method:
- * - @ref APP_USBD_DESCRIPTOR_DEVICE
- * - @ref APP_USBD_DESCRIPTOR_DEVICE_QUALIFIER (not used for FullSpeed only device)
- * - @ref APP_USBD_DESCRIPTOR_CONFIGURATION
- * - @ref APP_USBD_DESCRIPTOR_STRING
- */
-typedef enum
-{
- APP_USBD_DESCRIPTOR_DEVICE = 1, /**< Device descriptor. */
- APP_USBD_DESCRIPTOR_CONFIGURATION = 2, /**<
- * Specific configuration descriptor.
- * Configuration descriptor is always followed by all the related interface
- * and endpoints descriptors.
- */
- APP_USBD_DESCRIPTOR_STRING = 3, /**< String descriptor. */
- APP_USBD_DESCRIPTOR_INTERFACE = 4, /**<
- * Interface descriptor followed by all the related endpoints descriptors.
- *
- * @note It is returned together with @ref APP_USBD_DESCRIPTOR_CONFIGURATION.
- * Cannot be accessed by GetDescriptor or SetDescriptor
- */
- APP_USBD_DESCRIPTOR_ENDPOINT = 5, /**<
- * Endpoint descriptor.
- *
- * @note It is returned together with @ref APP_USBD_DESCRIPTOR_CONFIGURATION.
- * Cannot be accessed by GetDescriptor or SetDescriptor
- */
- APP_USBD_DESCRIPTOR_DEVICE_QUALIFIER = 6, /**< @note Not supported - used only in HighSpeed capable devices. */
- APP_USBD_DESCRIPTOR_OTHER_SPEED_CONFIGURATION = 7, /**< @note Not supported - our USB implementation supports only one speed. */
- APP_USBD_DESCRIPTOR_INTERFACE_POWER = 8, /**< @note Not supported */
- APP_USBD_DESCRIPTOR_OTG = 9, /**< @note Not supported - Our USB have not OTG functionality */
- APP_USBD_DESCRIPTOR_DEBUG = 10, /**< Debug channel descriptor if available, can be only reached by GetDescriptor */
- APP_USBD_DESCRIPTOR_INTERFACE_ASSOCIATION = 11, /**<
- * Descriptor used to describe that two or more interfaces are associated to the same function.
- *
- * @note It is returned together with @ref APP_USBD_DESCRIPTOR_CONFIGURATION.
- * Cannot be accessed by GetDescriptor or SetDescriptor
- */
- APP_USBD_DESCRIPTOR_REPORT = 34, /**< HID Report descriptor. */
- APP_USBD_DESCRIPTOR_PHYSICAL = 35 /**< HID Physical descriptor. */
-
-} app_usbd_descriptor_t;
-
-/* Make all descriptors packed */
-#pragma pack(push, 1)
-
-/**
- * @brief Common descriptor header.
- *
- * The header that we can find on the beginning of all descriptors that contains
- * the descriptor length and type.
- */
-typedef struct
-{
- uint8_t bLength; //!< Size of the descriptor in bytes.
- uint8_t bDescriptorType; //!< Should equal one of @ref app_usbd_descriptor_t.
- /** Class specific descriptors values are defined inside classes. */
-} app_usbd_descriptor_header_t;
-
-/**
- * @brief Device descriptor.
- *
- * Descriptor used for the whole device.
- */
-typedef struct
-{
- uint8_t bLength; //!< Size of the descriptor in bytes.
- uint8_t bDescriptorType; //!< Should equal to @ref APP_USBD_DESCRIPTOR_DEVICE.
- uint16_t bcdUSB; //!< USB Specification Release Number in Binary-Coded Decimal
- uint8_t bDeviceClass; //!< Device class code.
- /**< If 0, each interface specifies its own class information.
- * 0xFF for vendor-specific.
- */
- uint8_t bDeviceSubClass; //!< Subclass code.
- /**< If bDevice Class is set to value other than 0xFF,
- * all values here are reserved for assignment by USB-IF.
- */
- uint8_t bDeviceProtocol; //!< Subclass code.
- /**< If 0, no specific protocol is defined on device basis.
- * Each interface may define its own protocol then.
- * If set to 0xFF, vendor-specific protocol is used.
- */
- uint8_t bMaxPacketSize0; //!< Maximum packet size for endpoint zero.
- uint16_t idVendor; //!< Vendor ID (Assigned by the USB-IF).
- uint16_t idProduct; //!< Product ID (assigned by manufacturer).
- uint16_t bcdDevice; //!< Device release number in binary-coded decimal.
- uint8_t iManufacturer; //!< Index of string descriptor in describing manufacturer.
- uint8_t iProduct; //!< Index of string descriptor in describing product.
- uint8_t iSerialNumber; //!< Index of string descriptor in describing the device's serial number.
- uint8_t bNumConfigurations; //!< Number of possible configurations.
-} app_usbd_descriptor_device_t;
-
-/**
- * @brief Attributes masks.
- *
- * Masks used for attributes in configuration.
- */
-typedef enum
-{
- /** This is reserved descriptor that has always to be set */
- APP_USBD_DESCRIPTOR_CONFIGURATION_ATTRIBUTE_ALWAYS_SET_MASK = 1U << 7,
- /** Attribute that informs that device is self powered */
- APP_USBD_DESCRIPTOR_CONFIGURATION_ATTRIBUTE_SELF_POWERED_MASK = 1U << 6,
- /** Attribute that informs that device has Remove Wakeup functionality */
- APP_USBD_DESCRIPTOR_CONFIGURATION_ATTRIBUTE_REMOTE_WAKEUP_MASK = 1U << 5
-} app_usbd_descriptor_configuration_attributes_t;
-
-/**
- * @brief Configuration descriptor.
- *
- * Descriptor used at the beginning of configuration response.
- */
-typedef struct
-{
- uint8_t bLength; //!< Size of the descriptor in bytes.
- uint8_t bDescriptorType; //!< Should equal to @ref APP_USBD_DESCRIPTOR_DEVICE.
- uint16_t wTotalLength; //!< Total length of configuration data, including all descriptors returned after configuration itself.
- uint8_t bNumInterfaces; //!< Number of interfaces supportedf by this configuration
- uint8_t bConfigurationValue; //!< Value to use as an argument to the SetConfiguration request.
- uint8_t iConfiguration; //!< Index of string descriptor describing this configuration.
- uint8_t bmAttributes; //!< Configuration characteristics.
- uint8_t bMaxPower; //!< Maximum power consumption. Expressed in 2 mA units.
-} app_usbd_descriptor_configuration_t;
-
-/**
- * @brief Raw descriptor - String descriptor zero.
- *
- * String descriptor sent only as a response for GetDescriptor.
- */
-typedef struct
-{
- uint8_t bLength; //!< Size of the descriptor in bytes.
- uint8_t bDescriptorType; //!< Should equal to @ref APP_USBD_DESCRIPTOR_STRING.
- uint16_t wLANGID[]; //!< The array of LANGID codes supported by the device.
-} app_usbd_descriptor_string0_t;
-
-/**
- * @brief Raw descriptor - Any normal string.
- *
- * String descriptor sent only as a response for GetDescriptor.
- */
-typedef struct
-{
- uint8_t bLength; //!< Size of the descriptor in bytes.
- uint8_t bDescriptorType; //!< Should equal to @ref APP_USBD_DESCRIPTOR_STRING.
- uint16_t bString[]; //!< UNICODE encoded string.
-} app_usbd_descriptor_string_t;
-
-
-/**
- * @brief Interface descriptor.
- *
- * Interface descriptor, returned as a part of configuration descriptor.
- */
-typedef struct
-{
- uint8_t bLength; //!< Size of the descriptor in bytes.
- uint8_t bDescriptorType; //!< Should equal to @ref APP_USBD_DESCRIPTOR_INTERFACE.
- uint8_t bInterfaceNumber; //!< Number of this interface.
- uint8_t bAlternateSetting; //!< Value used to select this alternate setting.
- uint8_t bNumEndpoints; //!< Number of endpoints used by this interface.
- uint8_t bInterfaceClass; //!< Class code (assigned by the USB-IF). 0xff for vendor specific.
- uint8_t bInterfaceSubClass; //!< Subclass code (assigned by the USB-IF).
- uint8_t bInterfaceProtocol; //!< Protocol code (assigned by the USB-IF). 0xff for vendor specific.
- uint8_t iInterface; //!< Index of string descriptor describing this interface.
-} app_usbd_descriptor_iface_t;
-
-/** Offset of endpoint type attribute bits */
-#define APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_OFFSET 0
-/** Mask of endpoint type attribute bits */
-#define APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_MASK BF_MASK(2, APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_OFFSET)
-
-/** Offset of endpoint synchronization type attribute bits */
-#define APP_USBD_DESCRIPTOR_EP_ATTR_SYNC_OFFSET 2
-/** Mask of endpoint synchronization type attribute bits */
-#define APP_USBD_DESCRIPTOR_EP_ATTR_SYNC_MASK BF_MASK(2, APP_USBD_DESCRIPTOR_EP_ATTR_SYNC_OFFSET)
-
-/** Offset of endpoint usage type attribute bits */
-#define APP_USBD_DESCRIPTOR_EP_ATTR_USAGE_OFFSET 4
-/** Mask of endpoint usage type attribute bits */
-#define APP_USBD_DESCRIPTOR_EP_ATTR_USAGE_MASK BF_MASK(2, APP_USBD_DESCRIPTOR_EP_ATTR_USAGE_OFFSET)
-
-/**
- * @brief Endpoint attributes mnemonics.
- *
- * @sa APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_OFFSET APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_MASK
- * @sa APP_USBD_DESCRIPTOR_EP_ATTR_SYNC_OFFSET APP_USBD_DESCRIPTOR_EP_ATTR_SYNC_MASK
- * @sa APP_USBD_DESCRIPTOR_EP_ATTR_USAGE_OFFSET APP_USBD_DESCRIPTOR_EP_ATTR_USAGE_MASK
- */
-typedef enum
-{
- APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_CONTROL = 0 << APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_OFFSET,
- APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_ISOCHRONOUS = 1 << APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_OFFSET,
- APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_BULK = 2 << APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_OFFSET,
- APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_INTERRUPT = 3 << APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_OFFSET,
-
- APP_USBD_DESCRIPTOR_EP_ATTR_SYNC_NONE = 0 << APP_USBD_DESCRIPTOR_EP_ATTR_SYNC_OFFSET,
- APP_USBD_DESCRIPTOR_EP_ATTR_SYNC_ASYNCHRONOUS = 1 << APP_USBD_DESCRIPTOR_EP_ATTR_SYNC_OFFSET,
- APP_USBD_DESCRIPTOR_EP_ATTR_SYNC_ADAPTIVE = 2 << APP_USBD_DESCRIPTOR_EP_ATTR_SYNC_OFFSET,
- APP_USBD_DESCRIPTOR_EP_ATTR_SYNC_SYNCHRONOUS = 3 << APP_USBD_DESCRIPTOR_EP_ATTR_SYNC_OFFSET,
-
- APP_USBD_DESCRIPTOR_EP_ATTR_USAGE_DATA = 0 << APP_USBD_DESCRIPTOR_EP_ATTR_USAGE_OFFSET,
- APP_USBD_DESCRIPTOR_EP_ATTR_USAGE_FEEDBACK = 1 << APP_USBD_DESCRIPTOR_EP_ATTR_USAGE_OFFSET,
- APP_USBD_DESCRIPTOR_EP_ATTR_USAGE_IMPLICIT = 2 << APP_USBD_DESCRIPTOR_EP_ATTR_USAGE_OFFSET
-} app_usbd_descriptor_ep_attr_bitmap_t;
-
-/**
- * @brief Endpoint descriptor.
- *
- * Endpoint descriptor, returned as a part of configuration descriptor.
- */
-typedef struct
-{
- uint8_t bLength; //!< Size of the descriptor in bytes.
- uint8_t bDescriptorType; //!< Should equal to @ref APP_USBD_DESCRIPTOR_ENDPOINT.
- uint8_t bEndpointAddress; //!< Endpoint address
- uint8_t bmAttributes; //!< Endpoint attributes
- uint16_t wMaxPacketSize; //!< Maximum packet size this endpoint is capable of handling.
- uint8_t bInterval; //!< Interval for pooling endpoint for data transfers.
-} app_usbd_descriptor_ep_t;
-
-/**
- * @brief Interface association descriptor.
- */
-typedef struct
-{
- uint8_t bLength; //!< size of this descriptor in bytes
- uint8_t bDescriptorType; //!< INTERFACE descriptor type
- uint8_t bFirstInterface; //!< Number of interface
- uint8_t bInterfaceCount; //!< value to select alternate setting
- uint8_t bFunctionClass; //!< Class code assigned by the USB
- uint8_t bFunctionSubClass;//!< Sub-class code assigned by the USB
- uint8_t bFunctionProtocol;//!< Protocol code assigned by the USB
- uint8_t iFunction; //!< Index of string descriptor
-} app_usbd_descriptor_iad_t;
-
-#pragma pack(pop)
-ANON_UNIONS_DISABLE;
-
-#ifdef __cplusplus
-}
-#endif
-
-/** @} */
-#endif /* APP_USBD_DESCRIPTOR_H__ */
+/**
+ * Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef APP_USBD_DESCRIPTOR_H__
+#define APP_USBD_DESCRIPTOR_H__
+
+#include "nrf.h"
+#include "nrf_drv_usbd.h"
+#include "app_usbd_langid.h"
+#include "app_util_platform.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Compiler support for anonymous unions */
+ANON_UNIONS_ENABLE;
+
+/**
+ * @defgroup app_usbd_descriptor USB standard descriptors
+ * @ingroup app_usbd
+ *
+ * @brief @tagAPI52840 Module with types definitions used for standard descriptors.
+ * @{
+ */
+
+/**
+ * @brief Helper macro for translating unsigned 24 bit value to 2 byte raw descriptor.
+ * */
+#define APP_USBD_U16_TO_RAW_DSC(val) (uint8_t)(val), \
+ (uint8_t)(((val) / (256)))
+
+/**
+ * @brief Helper macro for translating unsigned 24 bit value to 3 byte raw descriptor.
+ * */
+#define APP_USBD_U24_TO_RAW_DSC(val) (uint8_t)(val), \
+ (uint8_t)(((val) / (256))), \
+ (uint8_t)(((val) / (256 * 256)))
+
+/**
+ * @brief Helper macro for translating unsigned 32 bit value to 4 byte raw descriptor.
+ * */
+#define APP_USBD_U32_TO_RAW_DSC(val) (uint8_t)(val), \
+ (uint8_t)(((val) / (256))), \
+ (uint8_t)(((val) / (256 * 256))) \
+ (uint8_t)(((val) / (256 * 256 * 256)))
+/**
+ * @brief Descriptor types.
+ *
+ * Descriptor types used in two situations:
+ * - When processing @ref APP_USBD_SETUP_STDREQ_GET_DESCRIPTOR SETUP request,
+ * the required descriptor type may be placed in wValue in HighByte.
+ * - As a descriptor identifier itself inside descriptor stream.
+ *
+ * According to chapter 9.6 of USB 2.0 specification, following descriptors may
+ * be requested directly by GetDescriptor method:
+ * - @ref APP_USBD_DESCRIPTOR_DEVICE
+ * - @ref APP_USBD_DESCRIPTOR_DEVICE_QUALIFIER (not used for FullSpeed only device)
+ * - @ref APP_USBD_DESCRIPTOR_CONFIGURATION
+ * - @ref APP_USBD_DESCRIPTOR_STRING
+ */
+typedef enum
+{
+ APP_USBD_DESCRIPTOR_DEVICE = 1, /**< Device descriptor. */
+ APP_USBD_DESCRIPTOR_CONFIGURATION = 2, /**<
+ * Specific configuration descriptor.
+ * Configuration descriptor is always followed by all the related interface
+ * and endpoints descriptors.
+ */
+ APP_USBD_DESCRIPTOR_STRING = 3, /**< String descriptor. */
+ APP_USBD_DESCRIPTOR_INTERFACE = 4, /**<
+ * Interface descriptor followed by all the related endpoints descriptors.
+ *
+ * @note It is returned together with @ref APP_USBD_DESCRIPTOR_CONFIGURATION.
+ * Cannot be accessed by GetDescriptor or SetDescriptor
+ */
+ APP_USBD_DESCRIPTOR_ENDPOINT = 5, /**<
+ * Endpoint descriptor.
+ *
+ * @note It is returned together with @ref APP_USBD_DESCRIPTOR_CONFIGURATION.
+ * Cannot be accessed by GetDescriptor or SetDescriptor
+ */
+ APP_USBD_DESCRIPTOR_DEVICE_QUALIFIER = 6, /**< @note Not supported - used only in HighSpeed capable devices. */
+ APP_USBD_DESCRIPTOR_OTHER_SPEED_CONFIGURATION = 7, /**< @note Not supported - USB library supports only one speed. */
+ APP_USBD_DESCRIPTOR_INTERFACE_POWER = 8, /**< @note Not supported */
+ APP_USBD_DESCRIPTOR_OTG = 9, /**< @note Not supported - USB library does not have OTG functionality */
+ APP_USBD_DESCRIPTOR_DEBUG = 10, /**< Debug channel descriptor if available, can be only reached by GetDescriptor */
+ APP_USBD_DESCRIPTOR_INTERFACE_ASSOCIATION = 11, /**<
+ * Descriptor used to describe that two or more interfaces are associated to the same function.
+ *
+ * @note It is returned together with @ref APP_USBD_DESCRIPTOR_CONFIGURATION.
+ * Cannot be accessed by GetDescriptor or SetDescriptor
+ */
+ APP_USBD_DESCRIPTOR_REPORT = 34, /**< HID Report descriptor. */
+ APP_USBD_DESCRIPTOR_PHYSICAL = 35 /**< HID Physical descriptor. */
+
+} app_usbd_descriptor_t;
+
+/* Make all descriptors packed */
+#pragma pack(push, 1)
+
+/**
+ * @brief Common descriptor header.
+ *
+ * The header that we can find on the beginning of all descriptors that contains
+ * the descriptor length and type.
+ */
+typedef struct
+{
+ uint8_t bLength; //!< Size of the descriptor in bytes.
+ uint8_t bDescriptorType; //!< Should equal one of @ref app_usbd_descriptor_t.
+ /** Class specific descriptors values are defined inside classes. */
+} app_usbd_descriptor_header_t;
+
+/**
+ * @brief Device descriptor.
+ *
+ * Descriptor used for the whole device.
+ */
+typedef struct
+{
+ uint8_t bLength; //!< Size of the descriptor in bytes.
+ uint8_t bDescriptorType; //!< Should equal to @ref APP_USBD_DESCRIPTOR_DEVICE.
+ uint16_t bcdUSB; //!< USB Specification Release Number in Binary-Coded Decimal
+ uint8_t bDeviceClass; //!< Device class code.
+ /**< If 0, each interface specifies its own class information.
+ * 0xFF for vendor-specific.
+ */
+ uint8_t bDeviceSubClass; //!< Subclass code.
+ /**< If bDevice Class is set to value other than 0xFF,
+ * all values here are reserved for assignment by USB-IF.
+ */
+ uint8_t bDeviceProtocol; //!< Subclass code.
+ /**< If 0, no specific protocol is defined on device basis.
+ * Each interface may define its own protocol then.
+ * If set to 0xFF, vendor-specific protocol is used.
+ */
+ uint8_t bMaxPacketSize0; //!< Maximum packet size for endpoint zero.
+ uint16_t idVendor; //!< Vendor ID (Assigned by the USB-IF).
+ uint16_t idProduct; //!< Product ID (assigned by manufacturer).
+ uint16_t bcdDevice; //!< Device release number in binary-coded decimal.
+ uint8_t iManufacturer; //!< Index of string descriptor in describing manufacturer.
+ uint8_t iProduct; //!< Index of string descriptor in describing product.
+ uint8_t iSerialNumber; //!< Index of string descriptor in describing the device's serial number.
+ uint8_t bNumConfigurations; //!< Number of possible configurations.
+} app_usbd_descriptor_device_t;
+
+/**
+ * @brief Attributes masks.
+ *
+ * Masks used for attributes in configuration.
+ */
+typedef enum
+{
+ /** This is reserved descriptor that has always to be set */
+ APP_USBD_DESCRIPTOR_CONFIGURATION_ATTRIBUTE_ALWAYS_SET_MASK = 1U << 7,
+ /** Attribute that informs that device is self powered */
+ APP_USBD_DESCRIPTOR_CONFIGURATION_ATTRIBUTE_SELF_POWERED_MASK = 1U << 6,
+ /** Attribute that informs that device has Remove Wakeup functionality */
+ APP_USBD_DESCRIPTOR_CONFIGURATION_ATTRIBUTE_REMOTE_WAKEUP_MASK = 1U << 5
+} app_usbd_descriptor_configuration_attributes_t;
+
+/**
+ * @brief Configuration descriptor.
+ *
+ * Descriptor used at the beginning of configuration response.
+ */
+typedef struct
+{
+ uint8_t bLength; //!< Size of the descriptor in bytes.
+ uint8_t bDescriptorType; //!< Should equal to @ref APP_USBD_DESCRIPTOR_DEVICE.
+ uint16_t wTotalLength; //!< Total length of configuration data, including all descriptors returned after configuration itself.
+ uint8_t bNumInterfaces; //!< Number of interfaces supportedf by this configuration
+ uint8_t bConfigurationValue; //!< Value to use as an argument to the SetConfiguration request.
+ uint8_t iConfiguration; //!< Index of string descriptor describing this configuration.
+ uint8_t bmAttributes; //!< Configuration characteristics.
+ uint8_t bMaxPower; //!< Maximum power consumption. Expressed in 2 mA units.
+} app_usbd_descriptor_configuration_t;
+
+/**
+ * @brief Raw descriptor - String descriptor zero.
+ *
+ * String descriptor sent only as a response for GetDescriptor.
+ */
+typedef struct
+{
+ uint8_t bLength; //!< Size of the descriptor in bytes.
+ uint8_t bDescriptorType; //!< Should equal to @ref APP_USBD_DESCRIPTOR_STRING.
+ uint16_t wLANGID[]; //!< The array of LANGID codes supported by the device.
+} app_usbd_descriptor_string0_t;
+
+/**
+ * @brief Raw descriptor - Any normal string.
+ *
+ * String descriptor sent only as a response for GetDescriptor.
+ */
+typedef struct
+{
+ uint8_t bLength; //!< Size of the descriptor in bytes.
+ uint8_t bDescriptorType; //!< Should equal to @ref APP_USBD_DESCRIPTOR_STRING.
+ uint16_t bString[]; //!< UNICODE encoded string.
+} app_usbd_descriptor_string_t;
+
+
+/**
+ * @brief Interface descriptor.
+ *
+ * Interface descriptor, returned as a part of configuration descriptor.
+ */
+typedef struct
+{
+ uint8_t bLength; //!< Size of the descriptor in bytes.
+ uint8_t bDescriptorType; //!< Should equal to @ref APP_USBD_DESCRIPTOR_INTERFACE.
+ uint8_t bInterfaceNumber; //!< Number of this interface.
+ uint8_t bAlternateSetting; //!< Value used to select this alternate setting.
+ uint8_t bNumEndpoints; //!< Number of endpoints used by this interface.
+ uint8_t bInterfaceClass; //!< Class code (assigned by the USB-IF). 0xff for vendor specific.
+ uint8_t bInterfaceSubClass; //!< Subclass code (assigned by the USB-IF).
+ uint8_t bInterfaceProtocol; //!< Protocol code (assigned by the USB-IF). 0xff for vendor specific.
+ uint8_t iInterface; //!< Index of string descriptor describing this interface.
+} app_usbd_descriptor_iface_t;
+
+/** Offset of endpoint type attribute bits */
+#define APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_OFFSET 0
+/** Mask of endpoint type attribute bits */
+#define APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_MASK BF_MASK(2, APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_OFFSET)
+
+/** Offset of endpoint synchronization type attribute bits */
+#define APP_USBD_DESCRIPTOR_EP_ATTR_SYNC_OFFSET 2
+/** Mask of endpoint synchronization type attribute bits */
+#define APP_USBD_DESCRIPTOR_EP_ATTR_SYNC_MASK BF_MASK(2, APP_USBD_DESCRIPTOR_EP_ATTR_SYNC_OFFSET)
+
+/** Offset of endpoint usage type attribute bits */
+#define APP_USBD_DESCRIPTOR_EP_ATTR_USAGE_OFFSET 4
+/** Mask of endpoint usage type attribute bits */
+#define APP_USBD_DESCRIPTOR_EP_ATTR_USAGE_MASK BF_MASK(2, APP_USBD_DESCRIPTOR_EP_ATTR_USAGE_OFFSET)
+
+/**
+ * @brief Endpoint attributes mnemonics.
+ *
+ * @sa APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_OFFSET APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_MASK
+ * @sa APP_USBD_DESCRIPTOR_EP_ATTR_SYNC_OFFSET APP_USBD_DESCRIPTOR_EP_ATTR_SYNC_MASK
+ * @sa APP_USBD_DESCRIPTOR_EP_ATTR_USAGE_OFFSET APP_USBD_DESCRIPTOR_EP_ATTR_USAGE_MASK
+ */
+typedef enum
+{
+ APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_CONTROL = 0 << APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_OFFSET,
+ APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_ISOCHRONOUS = 1 << APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_OFFSET,
+ APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_BULK = 2 << APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_OFFSET,
+ APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_INTERRUPT = 3 << APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_OFFSET,
+
+ APP_USBD_DESCRIPTOR_EP_ATTR_SYNC_NONE = 0 << APP_USBD_DESCRIPTOR_EP_ATTR_SYNC_OFFSET,
+ APP_USBD_DESCRIPTOR_EP_ATTR_SYNC_ASYNCHRONOUS = 1 << APP_USBD_DESCRIPTOR_EP_ATTR_SYNC_OFFSET,
+ APP_USBD_DESCRIPTOR_EP_ATTR_SYNC_ADAPTIVE = 2 << APP_USBD_DESCRIPTOR_EP_ATTR_SYNC_OFFSET,
+ APP_USBD_DESCRIPTOR_EP_ATTR_SYNC_SYNCHRONOUS = 3 << APP_USBD_DESCRIPTOR_EP_ATTR_SYNC_OFFSET,
+
+ APP_USBD_DESCRIPTOR_EP_ATTR_USAGE_DATA = 0 << APP_USBD_DESCRIPTOR_EP_ATTR_USAGE_OFFSET,
+ APP_USBD_DESCRIPTOR_EP_ATTR_USAGE_FEEDBACK = 1 << APP_USBD_DESCRIPTOR_EP_ATTR_USAGE_OFFSET,
+ APP_USBD_DESCRIPTOR_EP_ATTR_USAGE_IMPLICIT = 2 << APP_USBD_DESCRIPTOR_EP_ATTR_USAGE_OFFSET
+} app_usbd_descriptor_ep_attr_bitmap_t;
+
+/**
+ * @brief Endpoint descriptor.
+ *
+ * Endpoint descriptor, returned as a part of configuration descriptor.
+ */
+typedef struct
+{
+ uint8_t bLength; //!< Size of the descriptor in bytes.
+ uint8_t bDescriptorType; //!< Should equal to @ref APP_USBD_DESCRIPTOR_ENDPOINT.
+ uint8_t bEndpointAddress; //!< Endpoint address
+ uint8_t bmAttributes; //!< Endpoint attributes
+ uint16_t wMaxPacketSize; //!< Maximum packet size this endpoint is capable of handling.
+ uint8_t bInterval; //!< Interval for pooling endpoint for data transfers.
+} app_usbd_descriptor_ep_t;
+
+/**
+ * @brief Interface association descriptor.
+ */
+typedef struct
+{
+ uint8_t bLength; //!< size of this descriptor in bytes
+ uint8_t bDescriptorType; //!< INTERFACE descriptor type
+ uint8_t bFirstInterface; //!< Number of interface
+ uint8_t bInterfaceCount; //!< value to select alternate setting
+ uint8_t bFunctionClass; //!< Class code assigned by the USB
+ uint8_t bFunctionSubClass;//!< Sub-class code assigned by the USB
+ uint8_t bFunctionProtocol;//!< Protocol code assigned by the USB
+ uint8_t iFunction; //!< Index of string descriptor
+} app_usbd_descriptor_iad_t;
+
+#pragma pack(pop)
+ANON_UNIONS_DISABLE;
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+#endif /* APP_USBD_DESCRIPTOR_H__ */
diff --git a/third_party/NordicSemiconductor/libraries/usb/app_usbd_langid.h b/third_party/NordicSemiconductor/libraries/usb/app_usbd_langid.h
index 7160502..14a464d 100644
--- a/third_party/NordicSemiconductor/libraries/usb/app_usbd_langid.h
+++ b/third_party/NordicSemiconductor/libraries/usb/app_usbd_langid.h
@@ -1,300 +1,300 @@
-/**
- * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#ifndef APP_USBD_LANGID_H__
-#define APP_USBD_LANGID_H__
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @file
- * @brief This file contains LANGID variable type with all defined values.
- *
- * This file was created using Language Identifiers (LANGIDs) 3/29/00 Version 1.0,
- * available on USB web page:
- * http://www.usb.org/developers/docs/USB_LANGIDs.pdf
- *
- * @note
- * Do not include this file directly to the project.
- * It is included by @file app_usbd_request.h.
- */
-
-/**
- * Offset of the lowest bit of primary language identifier.
- * @sa app_usbd_langid_t
- */
-#define APP_USB_LANG_OFFSET 0
-
-/**
- * Bitmask for a primary language identifier.
- * @sa app_usbd_langid_t
- */
-#define APP_USB_LANG_MASK BF_MASK(10, APP_USB_LANG_OFFSET)
-
-/**
- * Macro for defining language identifier.
- *
- * @param x Language identifier value.
- */
-#define APP_USB_LANG_DEF(x) ((x) << (APP_USB_LANG_OFFSET))
-
-/**
- * Offset of the lowest bit of sublanguage identifier.
- * @sa app_usbd_langid_t
- */
-#define APP_USB_SUBLANG_OFFSET 10
-
-/**
- * Bitmask for a sublanguage identifier.
- * @sa app_usbd_langid_t
- */
-#define APP_USB_SUBLANG_MASK BF_MASK(6, APP_USB_SUBLANG_OFFSET)
-
-/**
- * Macro for defining language identifier.
- *
- * @param x Language identifier value.
- */
-#define APP_USB_SUBLANG_DEF(x) ((x) << (APP_USB_SUBLANG_OFFSET))
-
-/**
- * @brief Primary language identifiers.
- *
- * Mnemonics for primary language identifiers.
- * This mnemonics can be combined using the logical OR operator with @ref app_usbd_langid_sub_t.
- */
-typedef enum
-{
- APP_USBD_LANG_ARABIC = APP_USB_LANG_DEF(0x01U), /**< Arabic */
- APP_USBD_LANG_BULGARIAN = APP_USB_LANG_DEF(0x02U), /**< Bulgarian */
- APP_USBD_LANG_CATALAN = APP_USB_LANG_DEF(0x03U), /**< Catalan */
- APP_USBD_LANG_CHINESE = APP_USB_LANG_DEF(0x04U), /**< Chinese */
- APP_USBD_LANG_CZECH = APP_USB_LANG_DEF(0x05U), /**< Czech */
- APP_USBD_LANG_DANISH = APP_USB_LANG_DEF(0x06U), /**< Danish */
- APP_USBD_LANG_GERMAN = APP_USB_LANG_DEF(0x07U), /**< German */
- APP_USBD_LANG_GREEK = APP_USB_LANG_DEF(0x08U), /**< Greek */
- APP_USBD_LANG_ENGLISH = APP_USB_LANG_DEF(0x09U), /**< English */
- APP_USBD_LANG_SPANISH = APP_USB_LANG_DEF(0x0aU), /**< Spanish */
- APP_USBD_LANG_FINNISH = APP_USB_LANG_DEF(0x0bU), /**< Finnish */
- APP_USBD_LANG_FRENCH = APP_USB_LANG_DEF(0x0cU), /**< French */
- APP_USBD_LANG_HEBREW = APP_USB_LANG_DEF(0x0dU), /**< Hebrew */
- APP_USBD_LANG_HUNGARIAN = APP_USB_LANG_DEF(0x0eU), /**< Hungarian */
- APP_USBD_LANG_ICELANDIC = APP_USB_LANG_DEF(0x0fU), /**< Icelandic */
- APP_USBD_LANG_ITALIAN = APP_USB_LANG_DEF(0x10U), /**< Italian */
- APP_USBD_LANG_JAPANESE = APP_USB_LANG_DEF(0x11U), /**< Japanese */
- APP_USBD_LANG_KOREAN = APP_USB_LANG_DEF(0x12U), /**< Korean */
- APP_USBD_LANG_DUTCH = APP_USB_LANG_DEF(0x13U), /**< Dutch */
- APP_USBD_LANG_NORWEGIAN = APP_USB_LANG_DEF(0x14U), /**< Norwegian */
- APP_USBD_LANG_POLISH = APP_USB_LANG_DEF(0x15U), /**< Polish */
- APP_USBD_LANG_PORTUGUESE = APP_USB_LANG_DEF(0x16U), /**< Portuguese */
- APP_USBD_LANG_ROMANIAN = APP_USB_LANG_DEF(0x18U), /**< Romanian */
- APP_USBD_LANG_RUSSIAN = APP_USB_LANG_DEF(0x19U), /**< Russian */
- APP_USBD_LANG_CROATIAN = APP_USB_LANG_DEF(0x1aU), /**< Croatian */
- APP_USBD_LANG_SERBIAN = APP_USB_LANG_DEF(0x1aU), /**< Serbian */
- APP_USBD_LANG_SLOVAK = APP_USB_LANG_DEF(0x1bU), /**< Slovak */
- APP_USBD_LANG_ALBANIAN = APP_USB_LANG_DEF(0x1cU), /**< Albanian */
- APP_USBD_LANG_SWEDISH = APP_USB_LANG_DEF(0x1dU), /**< Swedish */
- APP_USBD_LANG_THAI = APP_USB_LANG_DEF(0x1eU), /**< Thai */
- APP_USBD_LANG_TURKISH = APP_USB_LANG_DEF(0x1fU), /**< Turkish */
- APP_USBD_LANG_URDU = APP_USB_LANG_DEF(0x20U), /**< Urdu */
- APP_USBD_LANG_INDONESIAN = APP_USB_LANG_DEF(0x21U), /**< Indonesian */
- APP_USBD_LANG_UKRANIAN = APP_USB_LANG_DEF(0x22U), /**< Ukrainian */
- APP_USBD_LANG_BELARUSIAN = APP_USB_LANG_DEF(0x23U), /**< Belarusian */
- APP_USBD_LANG_SLOVENIAN = APP_USB_LANG_DEF(0x24U), /**< Slovenian */
- APP_USBD_LANG_ESTONIAN = APP_USB_LANG_DEF(0x25U), /**< Estonian */
- APP_USBD_LANG_LATVIAN = APP_USB_LANG_DEF(0x26U), /**< Latvian */
- APP_USBD_LANG_LITHUANIAN = APP_USB_LANG_DEF(0x27U), /**< Lithuanian */
- APP_USBD_LANG_FARSI = APP_USB_LANG_DEF(0x29U), /**< Farsi */
- APP_USBD_LANG_VIETNAMESE = APP_USB_LANG_DEF(0x2aU), /**< Vietnamese */
- APP_USBD_LANG_ARMENIAN = APP_USB_LANG_DEF(0x2bU), /**< Armenian */
- APP_USBD_LANG_AZERI = APP_USB_LANG_DEF(0x2cU), /**< Azeri */
- APP_USBD_LANG_BASQUE = APP_USB_LANG_DEF(0x2dU), /**< Basque */
- APP_USBD_LANG_MACEDONIAN = APP_USB_LANG_DEF(0x2fU), /**< Macedonian */
- APP_USBD_LANG_AFRIKAANS = APP_USB_LANG_DEF(0x36U), /**< Afrikaans */
- APP_USBD_LANG_GEORGIAN = APP_USB_LANG_DEF(0x37U), /**< Georgian */
- APP_USBD_LANG_FAEROESE = APP_USB_LANG_DEF(0x38U), /**< Faeroese */
- APP_USBD_LANG_HINDI = APP_USB_LANG_DEF(0x39U), /**< Hindi */
- APP_USBD_LANG_MALAY = APP_USB_LANG_DEF(0x3eU), /**< Malay */
- APP_USBD_LANG_KAZAK = APP_USB_LANG_DEF(0x3fU), /**< Kazak */
- APP_USBD_LANG_SWAHILI = APP_USB_LANG_DEF(0x41U), /**< Swahili */
- APP_USBD_LANG_UZBEK = APP_USB_LANG_DEF(0x43U), /**< Uzbek */
- APP_USBD_LANG_TATAR = APP_USB_LANG_DEF(0x44U), /**< Tatar */
- APP_USBD_LANG_BENGALI = APP_USB_LANG_DEF(0x45U), /**< Bengali */
- APP_USBD_LANG_PUNJABI = APP_USB_LANG_DEF(0x46U), /**< Punjabi */
- APP_USBD_LANG_GUJARATI = APP_USB_LANG_DEF(0x47U), /**< Gujarati */
- APP_USBD_LANG_ORIYA = APP_USB_LANG_DEF(0x48U), /**< Oriya */
- APP_USBD_LANG_TAMIL = APP_USB_LANG_DEF(0x49U), /**< Tamil */
- APP_USBD_LANG_TELUGU = APP_USB_LANG_DEF(0x4aU), /**< Telugu */
- APP_USBD_LANG_KANNADA = APP_USB_LANG_DEF(0x4bU), /**< Kannada */
- APP_USBD_LANG_MALAYALAM = APP_USB_LANG_DEF(0x4cU), /**< Malayalam */
- APP_USBD_LANG_ASSAMESE = APP_USB_LANG_DEF(0x4dU), /**< Assamese */
- APP_USBD_LANG_MARATHI = APP_USB_LANG_DEF(0x4eU), /**< Marathi */
- APP_USBD_LANG_SANSKRIT = APP_USB_LANG_DEF(0x4fU), /**< Sanskrit */
- APP_USBD_LANG_KONKANI = APP_USB_LANG_DEF(0x57U), /**< Konkani */
- APP_USBD_LANG_MANIPURI = APP_USB_LANG_DEF(0x58U), /**< Manipuri */
- APP_USBD_LANG_SINDHI = APP_USB_LANG_DEF(0x59U), /**< Sindhi */
- APP_USBD_LANG_KASHMIRI = APP_USB_LANG_DEF(0x60U), /**< Kashmiri */
- APP_USBD_LANG_NEPALI = APP_USB_LANG_DEF(0x61U), /**< Nepali */
- APP_USBD_LANG_HID = APP_USB_LANG_DEF(0xffU), /**< Reserved for USB HID Class use. */
-} app_usbd_langid_primary_t;
-
-/**
- * @brief Sublanguage identifiers.
- *
- * Mnemonics with sublanguage values.
- * Use them in combination with @ref app_usbd_langid_primary_t.
- */
-typedef enum
-{
- APP_USBD_SUBLANG_ARABIC_SAUDI_ARABIA = APP_USB_SUBLANG_DEF(0x01U), /**< Arabic (Saudi Arabia) */
- APP_USBD_SUBLANG_ARABIC_IRAQ = APP_USB_SUBLANG_DEF(0x02U), /**< Arabic (Iraq) */
- APP_USBD_SUBLANG_ARABIC_EGYPT = APP_USB_SUBLANG_DEF(0x03U), /**< Arabic (Egypt) */
- APP_USBD_SUBLANG_ARABIC_LIBYA = APP_USB_SUBLANG_DEF(0x04U), /**< Arabic (Libya) */
- APP_USBD_SUBLANG_ARABIC_ALGERIA = APP_USB_SUBLANG_DEF(0x05U), /**< Arabic (Algeria) */
- APP_USBD_SUBLANG_ARABIC_MOROCCO = APP_USB_SUBLANG_DEF(0x06U), /**< Arabic (Morocco) */
- APP_USBD_SUBLANG_ARABIC_TUNISIA = APP_USB_SUBLANG_DEF(0x07U), /**< Arabic (Tunisia) */
- APP_USBD_SUBLANG_ARABIC_OMAN = APP_USB_SUBLANG_DEF(0x08U), /**< Arabic (Oman) */
- APP_USBD_SUBLANG_ARABIC_YEMEN = APP_USB_SUBLANG_DEF(0x09U), /**< Arabic (Yemen) */
- APP_USBD_SUBLANG_ARABIC_SYRIA = APP_USB_SUBLANG_DEF(0x10U), /**< Arabic (Syria) */
- APP_USBD_SUBLANG_ARABIC_JORDAN = APP_USB_SUBLANG_DEF(0x11U), /**< Arabic (Jordan) */
- APP_USBD_SUBLANG_ARABIC_LEBANON = APP_USB_SUBLANG_DEF(0x12U), /**< Arabic (Lebanon) */
- APP_USBD_SUBLANG_ARABIC_KUWAIT = APP_USB_SUBLANG_DEF(0x13U), /**< Arabic (Kuwait) */
- APP_USBD_SUBLANG_ARABIC_UAE = APP_USB_SUBLANG_DEF(0x14U), /**< Arabic (U.A.E.) */
- APP_USBD_SUBLANG_ARABIC_BAHRAIN = APP_USB_SUBLANG_DEF(0x15U), /**< Arabic (Bahrain) */
- APP_USBD_SUBLANG_ARABIC_QATAR = APP_USB_SUBLANG_DEF(0x16U), /**< Arabic (Qatar) */
- APP_USBD_SUBLANG_AZERI_CYRILLIC = APP_USB_SUBLANG_DEF(0x01U), /**< Azeri (Cyrillic) */
- APP_USBD_SUBLANG_AZERI_LATIN = APP_USB_SUBLANG_DEF(0x02U), /**< Azeri (Latin) */
- APP_USBD_SUBLANG_CHINESE_TRADITIONAL = APP_USB_SUBLANG_DEF(0x01U), /**< Chinese (Traditional) */
- APP_USBD_SUBLANG_CHINESE_SIMPLIFIED = APP_USB_SUBLANG_DEF(0x02U), /**< Chinese (Simplified) */
- APP_USBD_SUBLANG_CHINESE_HONGKONG = APP_USB_SUBLANG_DEF(0x03U), /**< Chinese (Hong Kong SAR, PRC) */
- APP_USBD_SUBLANG_CHINESE_SINGAPORE = APP_USB_SUBLANG_DEF(0x04U), /**< Chinese (Singapore) */
- APP_USBD_SUBLANG_CHINESE_MACAU = APP_USB_SUBLANG_DEF(0x05U), /**< Chinese (Macau SAR) */
- APP_USBD_SUBLANG_DUTCH = APP_USB_SUBLANG_DEF(0x01U), /**< Dutch */
- APP_USBD_SUBLANG_DUTCH_BELGIAN = APP_USB_SUBLANG_DEF(0x02U), /**< Dutch (Belgian) */
- APP_USBD_SUBLANG_ENGLISH_US = APP_USB_SUBLANG_DEF(0x01U), /**< English (US) */
- APP_USBD_SUBLANG_ENGLISH_UK = APP_USB_SUBLANG_DEF(0x02U), /**< English (UK) */
- APP_USBD_SUBLANG_ENGLISH_AUS = APP_USB_SUBLANG_DEF(0x03U), /**< English (Australian) */
- APP_USBD_SUBLANG_ENGLISH_CAN = APP_USB_SUBLANG_DEF(0x04U), /**< English (Canadian) */
- APP_USBD_SUBLANG_ENGLISH_NZ = APP_USB_SUBLANG_DEF(0x05U), /**< English (New Zealand) */
- APP_USBD_SUBLANG_ENGLISH_EIRE = APP_USB_SUBLANG_DEF(0x06U), /**< English (Ireland) */
- APP_USBD_SUBLANG_ENGLISH_SOUTH_AFRICA = APP_USB_SUBLANG_DEF(0x07U), /**< English (South Africa) */
- APP_USBD_SUBLANG_ENGLISH_JAMAICA = APP_USB_SUBLANG_DEF(0x08U), /**< English (Jamaica) */
- APP_USBD_SUBLANG_ENGLISH_CARIBBEAN = APP_USB_SUBLANG_DEF(0x09U), /**< English (Caribbean) */
- APP_USBD_SUBLANG_ENGLISH_BELIZE = APP_USB_SUBLANG_DEF(0x0aU), /**< English (Belize) */
- APP_USBD_SUBLANG_ENGLISH_TRINIDAD = APP_USB_SUBLANG_DEF(0x0bU), /**< English (Trinidad) */
- APP_USBD_SUBLANG_ENGLISH_PHILIPPINES = APP_USB_SUBLANG_DEF(0x0cU), /**< English (Zimbabwe) */
- APP_USBD_SUBLANG_ENGLISH_ZIMBABWE = APP_USB_SUBLANG_DEF(0x0dU), /**< English (Philippines) */
- APP_USBD_SUBLANG_FRENCH = APP_USB_SUBLANG_DEF(0x01U), /**< French */
- APP_USBD_SUBLANG_FRENCH_BELGIAN = APP_USB_SUBLANG_DEF(0x02U), /**< French (Belgian) */
- APP_USBD_SUBLANG_FRENCH_CANADIAN = APP_USB_SUBLANG_DEF(0x03U), /**< French (Canadian) */
- APP_USBD_SUBLANG_FRENCH_SWISS = APP_USB_SUBLANG_DEF(0x04U), /**< French (Switzerland) */
- APP_USBD_SUBLANG_FRENCH_LUXEMBOURG = APP_USB_SUBLANG_DEF(0x05U), /**< French (Luxembourg) */
- APP_USBD_SUBLANG_FRENCH_MONACO = APP_USB_SUBLANG_DEF(0x06U), /**< French (Monaco) */
- APP_USBD_SUBLANG_GERMAN = APP_USB_SUBLANG_DEF(0x01U), /**< German */
- APP_USBD_SUBLANG_GERMAN_SWISS = APP_USB_SUBLANG_DEF(0x02U), /**< German (Switzerland) */
- APP_USBD_SUBLANG_GERMAN_AUSTRIAN = APP_USB_SUBLANG_DEF(0x03U), /**< German (Austria) */
- APP_USBD_SUBLANG_GERMAN_LUXEMBOURG = APP_USB_SUBLANG_DEF(0x04U), /**< German (Luxembourg) */
- APP_USBD_SUBLANG_GERMAN_LIECHTENSTEIN = APP_USB_SUBLANG_DEF(0x05U), /**< German (Liechtenstein) */
- APP_USBD_SUBLANG_ITALIAN = APP_USB_SUBLANG_DEF(0x01U), /**< Italian */
- APP_USBD_SUBLANG_ITALIAN_SWISS = APP_USB_SUBLANG_DEF(0x02U), /**< Italian (Switzerland) */
- APP_USBD_SUBLANG_KASHMIRI_INDIA = APP_USB_SUBLANG_DEF(0x02U), /**< Kashmiri (India) */
- APP_USBD_SUBLANG_KOREAN = APP_USB_SUBLANG_DEF(0x01U), /**< Korean */
- APP_USBD_SUBLANG_LITHUANIAN = APP_USB_SUBLANG_DEF(0x01U), /**< Lithuanian */
- APP_USBD_SUBLANG_MALAY_MALAYSIA = APP_USB_SUBLANG_DEF(0x01U), /**< Malay (Malaysia) */
- APP_USBD_SUBLANG_MALAY_BRUNEI_DARUSSALAM = APP_USB_SUBLANG_DEF(0x02U), /**< Malay (Brunei Darassalam) */
- APP_USBD_SUBLANG_NEPALI_INDIA = APP_USB_SUBLANG_DEF(0x02U), /**< Nepali (India) */
- APP_USBD_SUBLANG_NORWEGIAN_BOKMAL = APP_USB_SUBLANG_DEF(0x01U), /**< Norwegian (Bokmal) */
- APP_USBD_SUBLANG_NORWEGIAN_NYNORSK = APP_USB_SUBLANG_DEF(0x02U), /**< Norwegian (Nynorsk) */
- APP_USBD_SUBLANG_PORTUGUESE = APP_USB_SUBLANG_DEF(0x01U), /**< Portuguese */
- APP_USBD_SUBLANG_PORTUGUESE_BRAZILIAN = APP_USB_SUBLANG_DEF(0x02U), /**< Portuguese (Brazil) */
- APP_USBD_SUBLANG_SERBIAN_LATIN = APP_USB_SUBLANG_DEF(0x02U), /**< Serbian (Latin) */
- APP_USBD_SUBLANG_SERBIAN_CYRILLIC = APP_USB_SUBLANG_DEF(0x03U), /**< Serbian (Cyrillic) */
- APP_USBD_SUBLANG_SPANISH = APP_USB_SUBLANG_DEF(0x01U), /**< Spanish (Traditional) */
- APP_USBD_SUBLANG_SPANISH_MEXICAN = APP_USB_SUBLANG_DEF(0x02U), /**< Spanish (Mexican) */
- APP_USBD_SUBLANG_SPANISH_MODERN = APP_USB_SUBLANG_DEF(0x03U), /**< Spanish (Modern) */
- APP_USBD_SUBLANG_SPANISH_GUATEMALA = APP_USB_SUBLANG_DEF(0x04U), /**< Spanish (Guatemala) */
- APP_USBD_SUBLANG_SPANISH_COSTA_RICA = APP_USB_SUBLANG_DEF(0x05U), /**< Spanish (Costa Rica) */
- APP_USBD_SUBLANG_SPANISH_PANAMA = APP_USB_SUBLANG_DEF(0x06U), /**< Spanish (Panama) */
- APP_USBD_SUBLANG_SPANISH_DOMINICAN_REPUBLIC = APP_USB_SUBLANG_DEF(0x07U), /**< Spanish (Dominican Republic) */
- APP_USBD_SUBLANG_SPANISH_VENEZUELA = APP_USB_SUBLANG_DEF(0x08U), /**< Spanish (Venezuela) */
- APP_USBD_SUBLANG_SPANISH_COLOMBIA = APP_USB_SUBLANG_DEF(0x09U), /**< Spanish (Colombia) */
- APP_USBD_SUBLANG_SPANISH_PERU = APP_USB_SUBLANG_DEF(0x0aU), /**< Spanish (Peru) */
- APP_USBD_SUBLANG_SPANISH_ARGENTINA = APP_USB_SUBLANG_DEF(0x0bU), /**< Spanish (Argentina) */
- APP_USBD_SUBLANG_SPANISH_ECUADOR = APP_USB_SUBLANG_DEF(0x0cU), /**< Spanish (Ecuador) */
- APP_USBD_SUBLANG_SPANISH_CHILE = APP_USB_SUBLANG_DEF(0x0dU), /**< Spanish (Chile) */
- APP_USBD_SUBLANG_SPANISH_URUGUAY = APP_USB_SUBLANG_DEF(0x0eU), /**< Spanish (Uruguay) */
- APP_USBD_SUBLANG_SPANISH_PARAGUAY = APP_USB_SUBLANG_DEF(0x0fU), /**< Spanish (Paraguay) */
- APP_USBD_SUBLANG_SPANISH_BOLIVIA = APP_USB_SUBLANG_DEF(0x10U), /**< Spanish (Bolivia) */
- APP_USBD_SUBLANG_SPANISH_EL_SALVADOR = APP_USB_SUBLANG_DEF(0x11U), /**< Spanish (El Salvador) */
- APP_USBD_SUBLANG_SPANISH_HONDURAS = APP_USB_SUBLANG_DEF(0x12U), /**< Spanish (Honduras) */
- APP_USBD_SUBLANG_SPANISH_NICARAGUA = APP_USB_SUBLANG_DEF(0x13U), /**< Spanish (Nicaragua) */
- APP_USBD_SUBLANG_SPANISH_PUERTO_RICO = APP_USB_SUBLANG_DEF(0x14U), /**< Spanish (Puerto Rico) */
- APP_USBD_SUBLANG_SWEDISH = APP_USB_SUBLANG_DEF(0x01U), /**< Swedish */
- APP_USBD_SUBLANG_SWEDISH_FINLAND = APP_USB_SUBLANG_DEF(0x02U), /**< Swedish (Finland) */
- APP_USBD_SUBLANG_URDU_PAKISTAN = APP_USB_SUBLANG_DEF(0x01U), /**< Urdu (Pakistan) */
- APP_USBD_SUBLANG_URDU_INDIA = APP_USB_SUBLANG_DEF(0x02U), /**< Urdu (India) */
- APP_USBD_SUBLANG_UZBEK_LATIN = APP_USB_SUBLANG_DEF(0x01U), /**< Uzbek (Latin) */
- APP_USBD_SUBLANG_UZBEK_CYRILLIC = APP_USB_SUBLANG_DEF(0x02U), /**< Uzbek (Cyrillic) */
- APP_USBD_SUBLANG_HID_USAGE_DATA_DESCRIPTOR = APP_USB_SUBLANG_DEF(0x01U), /**< HID (Usage Data Descriptor) */
- APP_USBD_SUBLANG_HID_VENDOR_DEFINED_1 = APP_USB_SUBLANG_DEF(0x3cU), /**< HID (Vendor Defined 1) */
- APP_USBD_SUBLANG_HID_VENDOR_DEFINED_2 = APP_USB_SUBLANG_DEF(0x3dU), /**< HID (Vendor Defined 2) */
- APP_USBD_SUBLANG_HID_VENDOR_DEFINED_3 = APP_USB_SUBLANG_DEF(0x3eU), /**< HID (Vendor Defined 3) */
- APP_USBD_SUBLANG_HID_VENDOR_DEFINED_4 = APP_USB_SUBLANG_DEF(0x3fU), /**< HID (Vendor Defined 4) */
-} app_usbd_langid_sub_t;
-
-/**
- * @brief LANGID variable.
- *
- * The LANGID value is composed of:
- * - 10 bits (9-0) of Primary Language Identifier,
- * - 6 bits (15-10) of Sublanguage Identifier.
- *
- * @sa app_usbd_langid_primary_t
- * @sa app_usbd_langid_sub_t
- */
-typedef uint16_t app_usbd_langid_t;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* APP_USBD_LANGID_H__ */
+/**
+ * Copyright (c) 2016 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef APP_USBD_LANGID_H__
+#define APP_USBD_LANGID_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @file
+ * @brief This file contains LANGID variable type with all defined values.
+ *
+ * This file was created using Language Identifiers (LANGIDs) 3/29/00 Version 1.0,
+ * available on USB web page:
+ * http://www.usb.org/developers/docs/USB_LANGIDs.pdf
+ *
+ * @note
+ * Do not include this file directly to the project.
+ * It is included by @file app_usbd_request.h.
+ */
+
+/**
+ * Offset of the lowest bit of primary language identifier.
+ * @sa app_usbd_langid_t
+ */
+#define APP_USB_LANG_OFFSET 0
+
+/**
+ * Bitmask for a primary language identifier.
+ * @sa app_usbd_langid_t
+ */
+#define APP_USB_LANG_MASK BF_MASK(10, APP_USB_LANG_OFFSET)
+
+/**
+ * Macro for defining language identifier.
+ *
+ * @param x Language identifier value.
+ */
+#define APP_USB_LANG_DEF(x) ((x) << (APP_USB_LANG_OFFSET))
+
+/**
+ * Offset of the lowest bit of sublanguage identifier.
+ * @sa app_usbd_langid_t
+ */
+#define APP_USB_SUBLANG_OFFSET 10
+
+/**
+ * Bitmask for a sublanguage identifier.
+ * @sa app_usbd_langid_t
+ */
+#define APP_USB_SUBLANG_MASK BF_MASK(6, APP_USB_SUBLANG_OFFSET)
+
+/**
+ * Macro for defining language identifier.
+ *
+ * @param x Language identifier value.
+ */
+#define APP_USB_SUBLANG_DEF(x) ((x) << (APP_USB_SUBLANG_OFFSET))
+
+/**
+ * @brief Primary language identifiers.
+ *
+ * Mnemonics for primary language identifiers.
+ * This mnemonics can be combined using the logical OR operator with @ref app_usbd_langid_sub_t.
+ */
+typedef enum
+{
+ APP_USBD_LANG_ARABIC = APP_USB_LANG_DEF(0x01U), /**< Arabic */
+ APP_USBD_LANG_BULGARIAN = APP_USB_LANG_DEF(0x02U), /**< Bulgarian */
+ APP_USBD_LANG_CATALAN = APP_USB_LANG_DEF(0x03U), /**< Catalan */
+ APP_USBD_LANG_CHINESE = APP_USB_LANG_DEF(0x04U), /**< Chinese */
+ APP_USBD_LANG_CZECH = APP_USB_LANG_DEF(0x05U), /**< Czech */
+ APP_USBD_LANG_DANISH = APP_USB_LANG_DEF(0x06U), /**< Danish */
+ APP_USBD_LANG_GERMAN = APP_USB_LANG_DEF(0x07U), /**< German */
+ APP_USBD_LANG_GREEK = APP_USB_LANG_DEF(0x08U), /**< Greek */
+ APP_USBD_LANG_ENGLISH = APP_USB_LANG_DEF(0x09U), /**< English */
+ APP_USBD_LANG_SPANISH = APP_USB_LANG_DEF(0x0aU), /**< Spanish */
+ APP_USBD_LANG_FINNISH = APP_USB_LANG_DEF(0x0bU), /**< Finnish */
+ APP_USBD_LANG_FRENCH = APP_USB_LANG_DEF(0x0cU), /**< French */
+ APP_USBD_LANG_HEBREW = APP_USB_LANG_DEF(0x0dU), /**< Hebrew */
+ APP_USBD_LANG_HUNGARIAN = APP_USB_LANG_DEF(0x0eU), /**< Hungarian */
+ APP_USBD_LANG_ICELANDIC = APP_USB_LANG_DEF(0x0fU), /**< Icelandic */
+ APP_USBD_LANG_ITALIAN = APP_USB_LANG_DEF(0x10U), /**< Italian */
+ APP_USBD_LANG_JAPANESE = APP_USB_LANG_DEF(0x11U), /**< Japanese */
+ APP_USBD_LANG_KOREAN = APP_USB_LANG_DEF(0x12U), /**< Korean */
+ APP_USBD_LANG_DUTCH = APP_USB_LANG_DEF(0x13U), /**< Dutch */
+ APP_USBD_LANG_NORWEGIAN = APP_USB_LANG_DEF(0x14U), /**< Norwegian */
+ APP_USBD_LANG_POLISH = APP_USB_LANG_DEF(0x15U), /**< Polish */
+ APP_USBD_LANG_PORTUGUESE = APP_USB_LANG_DEF(0x16U), /**< Portuguese */
+ APP_USBD_LANG_ROMANIAN = APP_USB_LANG_DEF(0x18U), /**< Romanian */
+ APP_USBD_LANG_RUSSIAN = APP_USB_LANG_DEF(0x19U), /**< Russian */
+ APP_USBD_LANG_CROATIAN = APP_USB_LANG_DEF(0x1aU), /**< Croatian */
+ APP_USBD_LANG_SERBIAN = APP_USB_LANG_DEF(0x1aU), /**< Serbian */
+ APP_USBD_LANG_SLOVAK = APP_USB_LANG_DEF(0x1bU), /**< Slovak */
+ APP_USBD_LANG_ALBANIAN = APP_USB_LANG_DEF(0x1cU), /**< Albanian */
+ APP_USBD_LANG_SWEDISH = APP_USB_LANG_DEF(0x1dU), /**< Swedish */
+ APP_USBD_LANG_THAI = APP_USB_LANG_DEF(0x1eU), /**< Thai */
+ APP_USBD_LANG_TURKISH = APP_USB_LANG_DEF(0x1fU), /**< Turkish */
+ APP_USBD_LANG_URDU = APP_USB_LANG_DEF(0x20U), /**< Urdu */
+ APP_USBD_LANG_INDONESIAN = APP_USB_LANG_DEF(0x21U), /**< Indonesian */
+ APP_USBD_LANG_UKRANIAN = APP_USB_LANG_DEF(0x22U), /**< Ukrainian */
+ APP_USBD_LANG_BELARUSIAN = APP_USB_LANG_DEF(0x23U), /**< Belarusian */
+ APP_USBD_LANG_SLOVENIAN = APP_USB_LANG_DEF(0x24U), /**< Slovenian */
+ APP_USBD_LANG_ESTONIAN = APP_USB_LANG_DEF(0x25U), /**< Estonian */
+ APP_USBD_LANG_LATVIAN = APP_USB_LANG_DEF(0x26U), /**< Latvian */
+ APP_USBD_LANG_LITHUANIAN = APP_USB_LANG_DEF(0x27U), /**< Lithuanian */
+ APP_USBD_LANG_FARSI = APP_USB_LANG_DEF(0x29U), /**< Farsi */
+ APP_USBD_LANG_VIETNAMESE = APP_USB_LANG_DEF(0x2aU), /**< Vietnamese */
+ APP_USBD_LANG_ARMENIAN = APP_USB_LANG_DEF(0x2bU), /**< Armenian */
+ APP_USBD_LANG_AZERI = APP_USB_LANG_DEF(0x2cU), /**< Azeri */
+ APP_USBD_LANG_BASQUE = APP_USB_LANG_DEF(0x2dU), /**< Basque */
+ APP_USBD_LANG_MACEDONIAN = APP_USB_LANG_DEF(0x2fU), /**< Macedonian */
+ APP_USBD_LANG_AFRIKAANS = APP_USB_LANG_DEF(0x36U), /**< Afrikaans */
+ APP_USBD_LANG_GEORGIAN = APP_USB_LANG_DEF(0x37U), /**< Georgian */
+ APP_USBD_LANG_FAEROESE = APP_USB_LANG_DEF(0x38U), /**< Faeroese */
+ APP_USBD_LANG_HINDI = APP_USB_LANG_DEF(0x39U), /**< Hindi */
+ APP_USBD_LANG_MALAY = APP_USB_LANG_DEF(0x3eU), /**< Malay */
+ APP_USBD_LANG_KAZAK = APP_USB_LANG_DEF(0x3fU), /**< Kazak */
+ APP_USBD_LANG_SWAHILI = APP_USB_LANG_DEF(0x41U), /**< Swahili */
+ APP_USBD_LANG_UZBEK = APP_USB_LANG_DEF(0x43U), /**< Uzbek */
+ APP_USBD_LANG_TATAR = APP_USB_LANG_DEF(0x44U), /**< Tatar */
+ APP_USBD_LANG_BENGALI = APP_USB_LANG_DEF(0x45U), /**< Bengali */
+ APP_USBD_LANG_PUNJABI = APP_USB_LANG_DEF(0x46U), /**< Punjabi */
+ APP_USBD_LANG_GUJARATI = APP_USB_LANG_DEF(0x47U), /**< Gujarati */
+ APP_USBD_LANG_ORIYA = APP_USB_LANG_DEF(0x48U), /**< Oriya */
+ APP_USBD_LANG_TAMIL = APP_USB_LANG_DEF(0x49U), /**< Tamil */
+ APP_USBD_LANG_TELUGU = APP_USB_LANG_DEF(0x4aU), /**< Telugu */
+ APP_USBD_LANG_KANNADA = APP_USB_LANG_DEF(0x4bU), /**< Kannada */
+ APP_USBD_LANG_MALAYALAM = APP_USB_LANG_DEF(0x4cU), /**< Malayalam */
+ APP_USBD_LANG_ASSAMESE = APP_USB_LANG_DEF(0x4dU), /**< Assamese */
+ APP_USBD_LANG_MARATHI = APP_USB_LANG_DEF(0x4eU), /**< Marathi */
+ APP_USBD_LANG_SANSKRIT = APP_USB_LANG_DEF(0x4fU), /**< Sanskrit */
+ APP_USBD_LANG_KONKANI = APP_USB_LANG_DEF(0x57U), /**< Konkani */
+ APP_USBD_LANG_MANIPURI = APP_USB_LANG_DEF(0x58U), /**< Manipuri */
+ APP_USBD_LANG_SINDHI = APP_USB_LANG_DEF(0x59U), /**< Sindhi */
+ APP_USBD_LANG_KASHMIRI = APP_USB_LANG_DEF(0x60U), /**< Kashmiri */
+ APP_USBD_LANG_NEPALI = APP_USB_LANG_DEF(0x61U), /**< Nepali */
+ APP_USBD_LANG_HID = APP_USB_LANG_DEF(0xffU), /**< Reserved for USB HID Class use. */
+} app_usbd_langid_primary_t;
+
+/**
+ * @brief Sublanguage identifiers.
+ *
+ * Mnemonics with sublanguage values.
+ * Use them in combination with @ref app_usbd_langid_primary_t.
+ */
+typedef enum
+{
+ APP_USBD_SUBLANG_ARABIC_SAUDI_ARABIA = APP_USB_SUBLANG_DEF(0x01U), /**< Arabic (Saudi Arabia) */
+ APP_USBD_SUBLANG_ARABIC_IRAQ = APP_USB_SUBLANG_DEF(0x02U), /**< Arabic (Iraq) */
+ APP_USBD_SUBLANG_ARABIC_EGYPT = APP_USB_SUBLANG_DEF(0x03U), /**< Arabic (Egypt) */
+ APP_USBD_SUBLANG_ARABIC_LIBYA = APP_USB_SUBLANG_DEF(0x04U), /**< Arabic (Libya) */
+ APP_USBD_SUBLANG_ARABIC_ALGERIA = APP_USB_SUBLANG_DEF(0x05U), /**< Arabic (Algeria) */
+ APP_USBD_SUBLANG_ARABIC_MOROCCO = APP_USB_SUBLANG_DEF(0x06U), /**< Arabic (Morocco) */
+ APP_USBD_SUBLANG_ARABIC_TUNISIA = APP_USB_SUBLANG_DEF(0x07U), /**< Arabic (Tunisia) */
+ APP_USBD_SUBLANG_ARABIC_OMAN = APP_USB_SUBLANG_DEF(0x08U), /**< Arabic (Oman) */
+ APP_USBD_SUBLANG_ARABIC_YEMEN = APP_USB_SUBLANG_DEF(0x09U), /**< Arabic (Yemen) */
+ APP_USBD_SUBLANG_ARABIC_SYRIA = APP_USB_SUBLANG_DEF(0x10U), /**< Arabic (Syria) */
+ APP_USBD_SUBLANG_ARABIC_JORDAN = APP_USB_SUBLANG_DEF(0x11U), /**< Arabic (Jordan) */
+ APP_USBD_SUBLANG_ARABIC_LEBANON = APP_USB_SUBLANG_DEF(0x12U), /**< Arabic (Lebanon) */
+ APP_USBD_SUBLANG_ARABIC_KUWAIT = APP_USB_SUBLANG_DEF(0x13U), /**< Arabic (Kuwait) */
+ APP_USBD_SUBLANG_ARABIC_UAE = APP_USB_SUBLANG_DEF(0x14U), /**< Arabic (U.A.E.) */
+ APP_USBD_SUBLANG_ARABIC_BAHRAIN = APP_USB_SUBLANG_DEF(0x15U), /**< Arabic (Bahrain) */
+ APP_USBD_SUBLANG_ARABIC_QATAR = APP_USB_SUBLANG_DEF(0x16U), /**< Arabic (Qatar) */
+ APP_USBD_SUBLANG_AZERI_CYRILLIC = APP_USB_SUBLANG_DEF(0x01U), /**< Azeri (Cyrillic) */
+ APP_USBD_SUBLANG_AZERI_LATIN = APP_USB_SUBLANG_DEF(0x02U), /**< Azeri (Latin) */
+ APP_USBD_SUBLANG_CHINESE_TRADITIONAL = APP_USB_SUBLANG_DEF(0x01U), /**< Chinese (Traditional) */
+ APP_USBD_SUBLANG_CHINESE_SIMPLIFIED = APP_USB_SUBLANG_DEF(0x02U), /**< Chinese (Simplified) */
+ APP_USBD_SUBLANG_CHINESE_HONGKONG = APP_USB_SUBLANG_DEF(0x03U), /**< Chinese (Hong Kong SAR, PRC) */
+ APP_USBD_SUBLANG_CHINESE_SINGAPORE = APP_USB_SUBLANG_DEF(0x04U), /**< Chinese (Singapore) */
+ APP_USBD_SUBLANG_CHINESE_MACAU = APP_USB_SUBLANG_DEF(0x05U), /**< Chinese (Macau SAR) */
+ APP_USBD_SUBLANG_DUTCH = APP_USB_SUBLANG_DEF(0x01U), /**< Dutch */
+ APP_USBD_SUBLANG_DUTCH_BELGIAN = APP_USB_SUBLANG_DEF(0x02U), /**< Dutch (Belgian) */
+ APP_USBD_SUBLANG_ENGLISH_US = APP_USB_SUBLANG_DEF(0x01U), /**< English (US) */
+ APP_USBD_SUBLANG_ENGLISH_UK = APP_USB_SUBLANG_DEF(0x02U), /**< English (UK) */
+ APP_USBD_SUBLANG_ENGLISH_AUS = APP_USB_SUBLANG_DEF(0x03U), /**< English (Australian) */
+ APP_USBD_SUBLANG_ENGLISH_CAN = APP_USB_SUBLANG_DEF(0x04U), /**< English (Canadian) */
+ APP_USBD_SUBLANG_ENGLISH_NZ = APP_USB_SUBLANG_DEF(0x05U), /**< English (New Zealand) */
+ APP_USBD_SUBLANG_ENGLISH_EIRE = APP_USB_SUBLANG_DEF(0x06U), /**< English (Ireland) */
+ APP_USBD_SUBLANG_ENGLISH_SOUTH_AFRICA = APP_USB_SUBLANG_DEF(0x07U), /**< English (South Africa) */
+ APP_USBD_SUBLANG_ENGLISH_JAMAICA = APP_USB_SUBLANG_DEF(0x08U), /**< English (Jamaica) */
+ APP_USBD_SUBLANG_ENGLISH_CARIBBEAN = APP_USB_SUBLANG_DEF(0x09U), /**< English (Caribbean) */
+ APP_USBD_SUBLANG_ENGLISH_BELIZE = APP_USB_SUBLANG_DEF(0x0aU), /**< English (Belize) */
+ APP_USBD_SUBLANG_ENGLISH_TRINIDAD = APP_USB_SUBLANG_DEF(0x0bU), /**< English (Trinidad) */
+ APP_USBD_SUBLANG_ENGLISH_PHILIPPINES = APP_USB_SUBLANG_DEF(0x0cU), /**< English (Zimbabwe) */
+ APP_USBD_SUBLANG_ENGLISH_ZIMBABWE = APP_USB_SUBLANG_DEF(0x0dU), /**< English (Philippines) */
+ APP_USBD_SUBLANG_FRENCH = APP_USB_SUBLANG_DEF(0x01U), /**< French */
+ APP_USBD_SUBLANG_FRENCH_BELGIAN = APP_USB_SUBLANG_DEF(0x02U), /**< French (Belgian) */
+ APP_USBD_SUBLANG_FRENCH_CANADIAN = APP_USB_SUBLANG_DEF(0x03U), /**< French (Canadian) */
+ APP_USBD_SUBLANG_FRENCH_SWISS = APP_USB_SUBLANG_DEF(0x04U), /**< French (Switzerland) */
+ APP_USBD_SUBLANG_FRENCH_LUXEMBOURG = APP_USB_SUBLANG_DEF(0x05U), /**< French (Luxembourg) */
+ APP_USBD_SUBLANG_FRENCH_MONACO = APP_USB_SUBLANG_DEF(0x06U), /**< French (Monaco) */
+ APP_USBD_SUBLANG_GERMAN = APP_USB_SUBLANG_DEF(0x01U), /**< German */
+ APP_USBD_SUBLANG_GERMAN_SWISS = APP_USB_SUBLANG_DEF(0x02U), /**< German (Switzerland) */
+ APP_USBD_SUBLANG_GERMAN_AUSTRIAN = APP_USB_SUBLANG_DEF(0x03U), /**< German (Austria) */
+ APP_USBD_SUBLANG_GERMAN_LUXEMBOURG = APP_USB_SUBLANG_DEF(0x04U), /**< German (Luxembourg) */
+ APP_USBD_SUBLANG_GERMAN_LIECHTENSTEIN = APP_USB_SUBLANG_DEF(0x05U), /**< German (Liechtenstein) */
+ APP_USBD_SUBLANG_ITALIAN = APP_USB_SUBLANG_DEF(0x01U), /**< Italian */
+ APP_USBD_SUBLANG_ITALIAN_SWISS = APP_USB_SUBLANG_DEF(0x02U), /**< Italian (Switzerland) */
+ APP_USBD_SUBLANG_KASHMIRI_INDIA = APP_USB_SUBLANG_DEF(0x02U), /**< Kashmiri (India) */
+ APP_USBD_SUBLANG_KOREAN = APP_USB_SUBLANG_DEF(0x01U), /**< Korean */
+ APP_USBD_SUBLANG_LITHUANIAN = APP_USB_SUBLANG_DEF(0x01U), /**< Lithuanian */
+ APP_USBD_SUBLANG_MALAY_MALAYSIA = APP_USB_SUBLANG_DEF(0x01U), /**< Malay (Malaysia) */
+ APP_USBD_SUBLANG_MALAY_BRUNEI_DARUSSALAM = APP_USB_SUBLANG_DEF(0x02U), /**< Malay (Brunei Darassalam) */
+ APP_USBD_SUBLANG_NEPALI_INDIA = APP_USB_SUBLANG_DEF(0x02U), /**< Nepali (India) */
+ APP_USBD_SUBLANG_NORWEGIAN_BOKMAL = APP_USB_SUBLANG_DEF(0x01U), /**< Norwegian (Bokmal) */
+ APP_USBD_SUBLANG_NORWEGIAN_NYNORSK = APP_USB_SUBLANG_DEF(0x02U), /**< Norwegian (Nynorsk) */
+ APP_USBD_SUBLANG_PORTUGUESE = APP_USB_SUBLANG_DEF(0x01U), /**< Portuguese */
+ APP_USBD_SUBLANG_PORTUGUESE_BRAZILIAN = APP_USB_SUBLANG_DEF(0x02U), /**< Portuguese (Brazil) */
+ APP_USBD_SUBLANG_SERBIAN_LATIN = APP_USB_SUBLANG_DEF(0x02U), /**< Serbian (Latin) */
+ APP_USBD_SUBLANG_SERBIAN_CYRILLIC = APP_USB_SUBLANG_DEF(0x03U), /**< Serbian (Cyrillic) */
+ APP_USBD_SUBLANG_SPANISH = APP_USB_SUBLANG_DEF(0x01U), /**< Spanish (Traditional) */
+ APP_USBD_SUBLANG_SPANISH_MEXICAN = APP_USB_SUBLANG_DEF(0x02U), /**< Spanish (Mexican) */
+ APP_USBD_SUBLANG_SPANISH_MODERN = APP_USB_SUBLANG_DEF(0x03U), /**< Spanish (Modern) */
+ APP_USBD_SUBLANG_SPANISH_GUATEMALA = APP_USB_SUBLANG_DEF(0x04U), /**< Spanish (Guatemala) */
+ APP_USBD_SUBLANG_SPANISH_COSTA_RICA = APP_USB_SUBLANG_DEF(0x05U), /**< Spanish (Costa Rica) */
+ APP_USBD_SUBLANG_SPANISH_PANAMA = APP_USB_SUBLANG_DEF(0x06U), /**< Spanish (Panama) */
+ APP_USBD_SUBLANG_SPANISH_DOMINICAN_REPUBLIC = APP_USB_SUBLANG_DEF(0x07U), /**< Spanish (Dominican Republic) */
+ APP_USBD_SUBLANG_SPANISH_VENEZUELA = APP_USB_SUBLANG_DEF(0x08U), /**< Spanish (Venezuela) */
+ APP_USBD_SUBLANG_SPANISH_COLOMBIA = APP_USB_SUBLANG_DEF(0x09U), /**< Spanish (Colombia) */
+ APP_USBD_SUBLANG_SPANISH_PERU = APP_USB_SUBLANG_DEF(0x0aU), /**< Spanish (Peru) */
+ APP_USBD_SUBLANG_SPANISH_ARGENTINA = APP_USB_SUBLANG_DEF(0x0bU), /**< Spanish (Argentina) */
+ APP_USBD_SUBLANG_SPANISH_ECUADOR = APP_USB_SUBLANG_DEF(0x0cU), /**< Spanish (Ecuador) */
+ APP_USBD_SUBLANG_SPANISH_CHILE = APP_USB_SUBLANG_DEF(0x0dU), /**< Spanish (Chile) */
+ APP_USBD_SUBLANG_SPANISH_URUGUAY = APP_USB_SUBLANG_DEF(0x0eU), /**< Spanish (Uruguay) */
+ APP_USBD_SUBLANG_SPANISH_PARAGUAY = APP_USB_SUBLANG_DEF(0x0fU), /**< Spanish (Paraguay) */
+ APP_USBD_SUBLANG_SPANISH_BOLIVIA = APP_USB_SUBLANG_DEF(0x10U), /**< Spanish (Bolivia) */
+ APP_USBD_SUBLANG_SPANISH_EL_SALVADOR = APP_USB_SUBLANG_DEF(0x11U), /**< Spanish (El Salvador) */
+ APP_USBD_SUBLANG_SPANISH_HONDURAS = APP_USB_SUBLANG_DEF(0x12U), /**< Spanish (Honduras) */
+ APP_USBD_SUBLANG_SPANISH_NICARAGUA = APP_USB_SUBLANG_DEF(0x13U), /**< Spanish (Nicaragua) */
+ APP_USBD_SUBLANG_SPANISH_PUERTO_RICO = APP_USB_SUBLANG_DEF(0x14U), /**< Spanish (Puerto Rico) */
+ APP_USBD_SUBLANG_SWEDISH = APP_USB_SUBLANG_DEF(0x01U), /**< Swedish */
+ APP_USBD_SUBLANG_SWEDISH_FINLAND = APP_USB_SUBLANG_DEF(0x02U), /**< Swedish (Finland) */
+ APP_USBD_SUBLANG_URDU_PAKISTAN = APP_USB_SUBLANG_DEF(0x01U), /**< Urdu (Pakistan) */
+ APP_USBD_SUBLANG_URDU_INDIA = APP_USB_SUBLANG_DEF(0x02U), /**< Urdu (India) */
+ APP_USBD_SUBLANG_UZBEK_LATIN = APP_USB_SUBLANG_DEF(0x01U), /**< Uzbek (Latin) */
+ APP_USBD_SUBLANG_UZBEK_CYRILLIC = APP_USB_SUBLANG_DEF(0x02U), /**< Uzbek (Cyrillic) */
+ APP_USBD_SUBLANG_HID_USAGE_DATA_DESCRIPTOR = APP_USB_SUBLANG_DEF(0x01U), /**< HID (Usage Data Descriptor) */
+ APP_USBD_SUBLANG_HID_VENDOR_DEFINED_1 = APP_USB_SUBLANG_DEF(0x3cU), /**< HID (Vendor Defined 1) */
+ APP_USBD_SUBLANG_HID_VENDOR_DEFINED_2 = APP_USB_SUBLANG_DEF(0x3dU), /**< HID (Vendor Defined 2) */
+ APP_USBD_SUBLANG_HID_VENDOR_DEFINED_3 = APP_USB_SUBLANG_DEF(0x3eU), /**< HID (Vendor Defined 3) */
+ APP_USBD_SUBLANG_HID_VENDOR_DEFINED_4 = APP_USB_SUBLANG_DEF(0x3fU), /**< HID (Vendor Defined 4) */
+} app_usbd_langid_sub_t;
+
+/**
+ * @brief LANGID variable.
+ *
+ * The LANGID value is composed of:
+ * - 10 bits (9-0) of Primary Language Identifier,
+ * - 6 bits (15-10) of Sublanguage Identifier.
+ *
+ * @sa app_usbd_langid_primary_t
+ * @sa app_usbd_langid_sub_t
+ */
+typedef uint16_t app_usbd_langid_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* APP_USBD_LANGID_H__ */
diff --git a/third_party/NordicSemiconductor/libraries/usb/app_usbd_nrf_dfu_trigger.c b/third_party/NordicSemiconductor/libraries/usb/app_usbd_nrf_dfu_trigger.c
index 7ed4a2b..1f5c36f 100755
--- a/third_party/NordicSemiconductor/libraries/usb/app_usbd_nrf_dfu_trigger.c
+++ b/third_party/NordicSemiconductor/libraries/usb/app_usbd_nrf_dfu_trigger.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
+ * Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
*
* All rights reserved.
*
@@ -110,7 +110,7 @@
/* Only Get Descriptor standard IN request is supported by DFU class */
if ((app_usbd_setup_req_rec(p_setup_ev->setup.bmRequestType) == APP_USBD_SETUP_REQREC_INTERFACE)
&&
- (p_setup_ev->setup.bmRequest == APP_USBD_SETUP_STDREQ_GET_DESCRIPTOR))
+ (p_setup_ev->setup.bRequest == APP_USBD_SETUP_STDREQ_GET_DESCRIPTOR))
{
size_t dsc_len = 0;
size_t max_size;
@@ -146,7 +146,7 @@
app_usbd_setup_evt_t const * p_setup_ev)
{
- switch (p_setup_ev->setup.bmRequest)
+ switch (p_setup_ev->setup.bRequest)
{
default:
break;
@@ -185,7 +185,7 @@
{
app_usbd_nrf_dfu_trigger_t const * p_dfu = nrf_dfu_trigger_get(p_inst);
- switch (p_setup_ev->setup.bmRequest)
+ switch (p_setup_ev->setup.bRequest)
{
case APP_USBD_NRF_DFU_TRIGGER_REQ_NORDIC_INFO:
if (p_setup_ev->setup.wLength.w != sizeof(app_usbd_nrf_dfu_trigger_nordic_info_t))
@@ -224,7 +224,7 @@
app_usbd_nrf_dfu_trigger_t const * p_dfu = nrf_dfu_trigger_get(p_inst);
app_usbd_nrf_dfu_trigger_ctx_t * p_dfu_ctx = nrf_dfu_trigger_ctx_get(p_dfu);
- switch (p_setup_ev->setup.bmRequest)
+ switch (p_setup_ev->setup.bRequest)
{
case APP_USBD_NRF_DFU_TRIGGER_REQ_DETACH:
{
@@ -370,4 +370,5 @@
.feed_descriptors = nrf_dfu_trigger_feed_descriptors,
};
-#endif /* NRF_MODULE_ENABLED(APP_USBD_NRF_DFU_TRIGGER) */
+
+#endif //NRF_MODULE_ENABLED(APP_USBD_NRF_DFU_TRIGGER)
diff --git a/third_party/NordicSemiconductor/libraries/usb/app_usbd_nrf_dfu_trigger.h b/third_party/NordicSemiconductor/libraries/usb/app_usbd_nrf_dfu_trigger.h
index 82aa132..6345251 100644
--- a/third_party/NordicSemiconductor/libraries/usb/app_usbd_nrf_dfu_trigger.h
+++ b/third_party/NordicSemiconductor/libraries/usb/app_usbd_nrf_dfu_trigger.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
+ * Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
*
* All rights reserved.
*
@@ -44,6 +44,7 @@
#include <stdbool.h>
#include "nrf_drv_usbd.h"
+#include "nrf_block_dev.h"
#include "app_usbd_class_base.h"
#include "app_usbd.h"
#include "app_usbd_core.h"
diff --git a/third_party/NordicSemiconductor/libraries/usb/app_usbd_nrf_dfu_trigger_internal.h b/third_party/NordicSemiconductor/libraries/usb/app_usbd_nrf_dfu_trigger_internal.h
index b1bd290..551d880 100644
--- a/third_party/NordicSemiconductor/libraries/usb/app_usbd_nrf_dfu_trigger_internal.h
+++ b/third_party/NordicSemiconductor/libraries/usb/app_usbd_nrf_dfu_trigger_internal.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
+ * Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
*
* All rights reserved.
*
diff --git a/third_party/NordicSemiconductor/libraries/usb/app_usbd_nrf_dfu_trigger_types.h b/third_party/NordicSemiconductor/libraries/usb/app_usbd_nrf_dfu_trigger_types.h
index 928f0d8..77b4b2b 100644
--- a/third_party/NordicSemiconductor/libraries/usb/app_usbd_nrf_dfu_trigger_types.h
+++ b/third_party/NordicSemiconductor/libraries/usb/app_usbd_nrf_dfu_trigger_types.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
+ * Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
*
* All rights reserved.
*
diff --git a/third_party/NordicSemiconductor/libraries/usb/app_usbd_request.h b/third_party/NordicSemiconductor/libraries/usb/app_usbd_request.h
index a6918a8..8ef5494 100644
--- a/third_party/NordicSemiconductor/libraries/usb/app_usbd_request.h
+++ b/third_party/NordicSemiconductor/libraries/usb/app_usbd_request.h
@@ -1,356 +1,356 @@
-/**
- * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#ifndef APP_USBD_REQUEST_H__
-#define APP_USBD_REQUEST_H__
-
-#include "sdk_common.h"
-#include "nrf.h"
-#include "nrf_drv_usbd.h"
-#include "app_usbd_descriptor.h"
-#include "app_util_platform.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Compiler support for anonymous unions */
-ANON_UNIONS_ENABLE;
-
-#pragma pack(push, 1)
-
-/**
- * @defgroup app_usbd_request USB standard requests
- * @ingroup app_usbd
- *
- * @brief @tagAPI52840 Module with types definitions used for standard requests processing.
- * @{
- */
-
-/**
- * @brief Recipient bit-field in request type.
- *
- * Bits 4...0
- */
-#define APP_USBD_SETUP_REQ_BF_REC BF_CX(5, 0)
-
-/**
- * @brief Type bit-field in request type.
- *
- * Bits 6...5
- */
-#define APP_USBD_SETUP_REQ_BF_TYP BF_CX(2, 5)
-
-/**
- * @brief Direction bit-field in request type.
- *
- * Bit 7
- */
-#define APP_USBD_SETUP_REQ_BF_DIR BF_CX(1, 7)
-
-/**
- * @brief Recipient enumerator.
- *
- * @note It is part of @ref app_usbd_setup_reqtype_t variable type.
- */
-typedef enum {
- APP_USBD_SETUP_REQREC_DEVICE = 0x0, /**< The whole device is a request target */
- APP_USBD_SETUP_REQREC_INTERFACE = 0x1, /**< Selected interface is a request target */
- APP_USBD_SETUP_REQREC_ENDPOINT = 0x2, /**< Selected endpoint is a request target */
- APP_USBD_SETUP_REQREC_OTHER = 0x3 /**< Other element is a request target */
-} app_usbd_setup_reqrec_t;
-
-/**
- * @brief Request type enumerator.
- *
- * @note It is part of @ref app_usbd_setup_reqtype_t variable type.
- */
-typedef enum {
- APP_USBD_SETUP_REQTYPE_STD = 0x0, /**< Standard request */
- APP_USBD_SETUP_REQTYPE_CLASS = 0x1, /**< Class specific request */
- APP_USBD_SETUP_REQTYPE_VENDOR = 0x2 /**< Vendor specific request */
-} app_usbd_setup_reqtype_t;
-
-/**
- * @brief Direction of setup command.
- *
- * @note It is part of @ref app_usbd_setup_reqtype_t variable type.
- */
-typedef enum {
- APP_USBD_SETUP_REQDIR_OUT = 0x0, /**< Host to device */
- APP_USBD_SETUP_REQDIR_IN = 0x1, /**< Device to host */
-} app_usbd_setup_reqdir_t;
-
-
-/**
- * @brief Standard requests.
- *
- * Enumerator for standard requests values.
- */
-typedef enum {
- APP_USBD_SETUP_STDREQ_GET_STATUS = 0x00, /**<
- * Targets: Device, Interface, Endpoint
- * Expected SETUP frame format:
- * - wValue: Zero
- * - wIndex: Zero, (lb): Interface or Endpoint
- * - wLength: 2
- * - Data:2 bytes of data, depending on targets
- * - Device:
- * - D15..D2: Reserved (Reset to zero)
- * - D1: Remove Wakeup
- * - D0: Self Powered
- * - Interface:
- * - D15..D0: Reserved (Reset to zero)
- * - Endpoint:
- * - D15..D1: Reserved (Reset to zero)
- * - D0: Halt
- */
- APP_USBD_SETUP_STDREQ_CLEAR_FEATURE = 0x01, /**<
- * Targets: Device, Interface, Endpoint
- * Expected SETUP frame format:
- * - wValue: Feature selector (@ref app_usbd_setup_stdfeature_t)
- * - wIndex: Zero, Interface or Endpoint
- * - wLength: 0
- * - Data: None
- */
- APP_USBD_SETUP_STDREQ_SET_FEATURE = 0x03, /**<
- * Targets: Device, Interface, Endpoint
- * Expected SETUP frame format:
- * - wValue: Feature selector (@ref app_usbd_setup_stdfeature_t)
- * - wIndex: Zero, Interface or Endpoint
- * - wLength: 0
- * - Data: None
- */
- APP_USBD_SETUP_STDREQ_SET_ADDRESS = 0x05, /**<
- * @note This SETUP request is processed in hardware.
- * Use it only to mark current USB state.
- *
- * Targets: Device
- * Expected SETUP frame format:
- * - wValue: New device address
- * - wIndex: 0
- * - wLength: 0
- * - Data: None
- */
- APP_USBD_SETUP_STDREQ_GET_DESCRIPTOR = 0x06, /**<
- * Targets: Device
- * - wValue: (hb): Descriptor Type and (lb): Descriptor Index
- * - wIndex: Zero of Language ID
- * - wLength: Descriptor Length
- * - Data: Descriptor
- */
- APP_USBD_SETUP_STDREQ_SET_DESCRIPTOR = 0x07, /**<
- * Not supported - Stall when called.
- */
- APP_USBD_SETUP_STDREQ_GET_CONFIGURATION = 0x08, /**<
- * Target: Device
- * Expected SETUP frame format:
- * - wValue: 0
- * - wIndex: 0
- * - wLength: 1
- * - Data: Configuration value
- */
- APP_USBD_SETUP_STDREQ_SET_CONFIGURATION = 0x09, /**<
- * Target: Device
- * Expected SETUP frame format:
- * - wValue: (lb): Configuration value
- * - wIndex: 0
- * - wLength: 0
- * - Data: None
- */
- APP_USBD_SETUP_STDREQ_GET_INTERFACE = 0x0A, /**<
- * Target: Interface
- * Expected SETUP frame format:
- * - wValue: 0
- * - wIndex: Interface
- * - wLength: 1
- * - Data: Alternate setting
- */
- APP_USBD_SETUP_STDREQ_SET_INTERFACE = 0x0B, /**<
- * Target: Interface
- * Expected SETUP frame format:
- * - wValue: Alternate setting
- * - wIndex: Interface
- * - wLength: 0
- * - Data: None
- */
- APP_USBD_SETUP_STDREQ_SYNCH_FRAME = 0x0C /**<
- * Target: Endpoint
- * Expected SETUP frame format:
- * - wValue: 0
- * - wIndex: Endpoint
- * - wLength: 2
- * - Data: Frame Number
- *
- * @note
- * This request is used only in connection with isochronous endpoints.
- * This is rarely used and probably we would not need to support it.
- */
-} app_usbd_setup_stdrequest_t;
-
-/**
- * @brief Standard feature selectors.
- *
- * Standard features that may be disabled or enabled by
- * @ref APP_USBD_SETUP_STDREQ_CLEAR_FEATURE or @ref APP_USBD_SETUP_STDREQ_SET_FEATURE
- */
-typedef enum {
- APP_USBD_SETUP_STDFEATURE_DEVICE_REMOTE_WAKEUP = 1, /**<
- * Remote wakeup feature.
- * Target: Device only
- */
- APP_USBD_SETUP_STDFEATURE_ENDPOINT_HALT = 0, /**<
- * Stall or clear the endpoint.
- * Target: Endpoint different than default (0)
- */
- APP_USBD_SETUP_STDFEATURE_TEST_MODE = 2 /**<
- * Upstream port test mode.
- * Power has to be cycled to exit test mode.
- * This feature cannot be cleared.
- *
- * Target: Device only
- *
- * @note
- * It should only be supported by HighSpeed capable devices.
- * Not supported in this library.
- */
-} app_usbd_setup_stdfeature_t;
-
-
-/**
- * @brief Universal way to access 16 bit values and its parts.
- */
-typedef union {
- uint16_t w; //!< 16 bit access
- struct
- {
- uint8_t lb; //!< Low byte access
- uint8_t hb; //!< High byte access
- };
-} app_usbd_setup_w_t;
-
-/**
- * @brief Internal redefinition of setup structure.
- *
- * Redefinition of the structure to simplify changes in the future
- * if required - app_usbd API would present setup data using app_usbd_setup_t.
- *
- * The structure layout is always the same like @ref nrf_drv_usbd_setup_t
- */
-typedef struct {
- uint8_t bmRequestType; //!< Setup type bitfield
- uint8_t bmRequest; //!< One of @ref app_usbd_setup_stdrequest_t values or class dependent one.
- app_usbd_setup_w_t wValue; //!< byte 2, 3
- app_usbd_setup_w_t wIndex; //!< byte 4, 5
- app_usbd_setup_w_t wLength; //!< byte 6, 7
-} app_usbd_setup_t;
-
-#pragma pack(pop)
-
-
-/**
- * @brief Extract recipient from request type.
- *
- * @param[in] bmRequestType
- *
- * @return Extracted recipient field from request type value.
- */
-static inline app_usbd_setup_reqrec_t app_usbd_setup_req_rec(uint8_t bmRequestType)
-{
- return (app_usbd_setup_reqrec_t)BF_CX_GET(bmRequestType, APP_USBD_SETUP_REQ_BF_REC);
-}
-
-/**
- * @brief Extract type from request type.
- *
- * @param[in] bmRequestType
- *
- * @return Extracted type field from request type value.
- */
-static inline app_usbd_setup_reqtype_t app_usbd_setup_req_typ(uint8_t bmRequestType)
-{
- return (app_usbd_setup_reqtype_t)BF_CX_GET(bmRequestType, APP_USBD_SETUP_REQ_BF_TYP);
-}
-
-
-/**
- * @brief Extract direction from request type.
- *
- * @param[in] bmRequestType
- *
- * @return Extracted direction field from request type value.
- */
-static inline app_usbd_setup_reqdir_t app_usbd_setup_req_dir(uint8_t bmRequestType)
-{
- return (app_usbd_setup_reqdir_t)BF_CX_GET(bmRequestType, APP_USBD_SETUP_REQ_BF_DIR);
-}
-
-/**
- * @brief Make request type value.
- *
- * @param[in] rec Recipient.
- * @param[in] typ Request type.
- * @param[in] dir Direction.
- *
- * @return Assembled request type value.
- */
-static inline uint8_t app_usbd_setup_req_val(app_usbd_setup_reqrec_t rec,
- app_usbd_setup_reqtype_t typ,
- app_usbd_setup_reqdir_t dir)
-{
- uint32_t bmRequestType = (
- BF_CX_VAL(rec, APP_USBD_SETUP_REQ_BF_REC) |
- BF_CX_VAL(typ, APP_USBD_SETUP_REQ_BF_TYP) |
- BF_CX_VAL(dir, APP_USBD_SETUP_REQ_BF_DIR)
- );
-
- ASSERT(bmRequestType < 256U);
- return (uint8_t)bmRequestType;
-}
-
-
-ANON_UNIONS_DISABLE;
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* APP_USBD_REQUEST_H__ */
+/**
+ * Copyright (c) 2016 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef APP_USBD_REQUEST_H__
+#define APP_USBD_REQUEST_H__
+
+#include "sdk_common.h"
+#include "nrf.h"
+#include "nrf_drv_usbd.h"
+#include "app_usbd_descriptor.h"
+#include "app_util_platform.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Compiler support for anonymous unions */
+ANON_UNIONS_ENABLE;
+
+#pragma pack(push, 1)
+
+/**
+ * @defgroup app_usbd_request USB standard requests
+ * @ingroup app_usbd
+ *
+ * @brief @tagAPI52840 Module with types definitions used for standard requests processing.
+ * @{
+ */
+
+/**
+ * @brief Recipient bit-field in request type.
+ *
+ * Bits 4...0
+ */
+#define APP_USBD_SETUP_REQ_BF_REC BF_CX(5, 0)
+
+/**
+ * @brief Type bit-field in request type.
+ *
+ * Bits 6...5
+ */
+#define APP_USBD_SETUP_REQ_BF_TYP BF_CX(2, 5)
+
+/**
+ * @brief Direction bit-field in request type.
+ *
+ * Bit 7
+ */
+#define APP_USBD_SETUP_REQ_BF_DIR BF_CX(1, 7)
+
+/**
+ * @brief Recipient enumerator.
+ *
+ * @note It is part of @ref app_usbd_setup_reqtype_t variable type.
+ */
+typedef enum {
+ APP_USBD_SETUP_REQREC_DEVICE = 0x0, /**< The whole device is a request target */
+ APP_USBD_SETUP_REQREC_INTERFACE = 0x1, /**< Selected interface is a request target */
+ APP_USBD_SETUP_REQREC_ENDPOINT = 0x2, /**< Selected endpoint is a request target */
+ APP_USBD_SETUP_REQREC_OTHER = 0x3 /**< Other element is a request target */
+} app_usbd_setup_reqrec_t;
+
+/**
+ * @brief Request type enumerator.
+ *
+ * @note It is part of @ref app_usbd_setup_reqtype_t variable type.
+ */
+typedef enum {
+ APP_USBD_SETUP_REQTYPE_STD = 0x0, /**< Standard request */
+ APP_USBD_SETUP_REQTYPE_CLASS = 0x1, /**< Class specific request */
+ APP_USBD_SETUP_REQTYPE_VENDOR = 0x2 /**< Vendor specific request */
+} app_usbd_setup_reqtype_t;
+
+/**
+ * @brief Direction of setup command.
+ *
+ * @note It is part of @ref app_usbd_setup_reqtype_t variable type.
+ */
+typedef enum {
+ APP_USBD_SETUP_REQDIR_OUT = 0x0, /**< Host to device */
+ APP_USBD_SETUP_REQDIR_IN = 0x1, /**< Device to host */
+} app_usbd_setup_reqdir_t;
+
+
+/**
+ * @brief Standard requests.
+ *
+ * Enumerator for standard requests values.
+ */
+typedef enum {
+ APP_USBD_SETUP_STDREQ_GET_STATUS = 0x00, /**<
+ * Targets: Device, Interface, Endpoint
+ * Expected SETUP frame format:
+ * - wValue: Zero
+ * - wIndex: Zero, (lb): Interface or Endpoint
+ * - wLength: 2
+ * - Data:2 bytes of data, depending on targets
+ * - Device:
+ * - D15..D2: Reserved (Reset to zero)
+ * - D1: Remove Wakeup
+ * - D0: Self Powered
+ * - Interface:
+ * - D15..D0: Reserved (Reset to zero)
+ * - Endpoint:
+ * - D15..D1: Reserved (Reset to zero)
+ * - D0: Halt
+ */
+ APP_USBD_SETUP_STDREQ_CLEAR_FEATURE = 0x01, /**<
+ * Targets: Device, Interface, Endpoint
+ * Expected SETUP frame format:
+ * - wValue: Feature selector (@ref app_usbd_setup_stdfeature_t)
+ * - wIndex: Zero, Interface or Endpoint
+ * - wLength: 0
+ * - Data: None
+ */
+ APP_USBD_SETUP_STDREQ_SET_FEATURE = 0x03, /**<
+ * Targets: Device, Interface, Endpoint
+ * Expected SETUP frame format:
+ * - wValue: Feature selector (@ref app_usbd_setup_stdfeature_t)
+ * - wIndex: Zero, Interface or Endpoint
+ * - wLength: 0
+ * - Data: None
+ */
+ APP_USBD_SETUP_STDREQ_SET_ADDRESS = 0x05, /**<
+ * @note This SETUP request is processed in hardware.
+ * Use it only to mark current USB state.
+ *
+ * Targets: Device
+ * Expected SETUP frame format:
+ * - wValue: New device address
+ * - wIndex: 0
+ * - wLength: 0
+ * - Data: None
+ */
+ APP_USBD_SETUP_STDREQ_GET_DESCRIPTOR = 0x06, /**<
+ * Targets: Device
+ * - wValue: (hb): Descriptor Type and (lb): Descriptor Index
+ * - wIndex: Zero of Language ID
+ * - wLength: Descriptor Length
+ * - Data: Descriptor
+ */
+ APP_USBD_SETUP_STDREQ_SET_DESCRIPTOR = 0x07, /**<
+ * Not supported - Stall when called.
+ */
+ APP_USBD_SETUP_STDREQ_GET_CONFIGURATION = 0x08, /**<
+ * Target: Device
+ * Expected SETUP frame format:
+ * - wValue: 0
+ * - wIndex: 0
+ * - wLength: 1
+ * - Data: Configuration value
+ */
+ APP_USBD_SETUP_STDREQ_SET_CONFIGURATION = 0x09, /**<
+ * Target: Device
+ * Expected SETUP frame format:
+ * - wValue: (lb): Configuration value
+ * - wIndex: 0
+ * - wLength: 0
+ * - Data: None
+ */
+ APP_USBD_SETUP_STDREQ_GET_INTERFACE = 0x0A, /**<
+ * Target: Interface
+ * Expected SETUP frame format:
+ * - wValue: 0
+ * - wIndex: Interface
+ * - wLength: 1
+ * - Data: Alternate setting
+ */
+ APP_USBD_SETUP_STDREQ_SET_INTERFACE = 0x0B, /**<
+ * Target: Interface
+ * Expected SETUP frame format:
+ * - wValue: Alternate setting
+ * - wIndex: Interface
+ * - wLength: 0
+ * - Data: None
+ */
+ APP_USBD_SETUP_STDREQ_SYNCH_FRAME = 0x0C /**<
+ * Target: Endpoint
+ * Expected SETUP frame format:
+ * - wValue: 0
+ * - wIndex: Endpoint
+ * - wLength: 2
+ * - Data: Frame Number
+ *
+ * @note
+ * This request is used only in connection with isochronous endpoints.
+ * This is rarely used and probably we would not need to support it.
+ */
+} app_usbd_setup_stdrequest_t;
+
+/**
+ * @brief Standard feature selectors.
+ *
+ * Standard features that may be disabled or enabled by
+ * @ref APP_USBD_SETUP_STDREQ_CLEAR_FEATURE or @ref APP_USBD_SETUP_STDREQ_SET_FEATURE
+ */
+typedef enum {
+ APP_USBD_SETUP_STDFEATURE_DEVICE_REMOTE_WAKEUP = 1, /**<
+ * Remote wakeup feature.
+ * Target: Device only
+ */
+ APP_USBD_SETUP_STDFEATURE_ENDPOINT_HALT = 0, /**<
+ * Stall or clear the endpoint.
+ * Target: Endpoint different than default (0)
+ */
+ APP_USBD_SETUP_STDFEATURE_TEST_MODE = 2 /**<
+ * Upstream port test mode.
+ * Power has to be cycled to exit test mode.
+ * This feature cannot be cleared.
+ *
+ * Target: Device only
+ *
+ * @note
+ * It should only be supported by HighSpeed capable devices.
+ * Not supported in this library.
+ */
+} app_usbd_setup_stdfeature_t;
+
+
+/**
+ * @brief Universal way to access 16 bit values and its parts.
+ */
+typedef union {
+ uint16_t w; //!< 16 bit access
+ struct
+ {
+ uint8_t lb; //!< Low byte access
+ uint8_t hb; //!< High byte access
+ };
+} app_usbd_setup_w_t;
+
+/**
+ * @brief Internal redefinition of setup structure.
+ *
+ * Redefinition of the structure to simplify changes in the future
+ * if required - app_usbd API would present setup data using app_usbd_setup_t.
+ *
+ * The structure layout is always the same like @ref nrf_drv_usbd_setup_t
+ */
+typedef struct {
+ uint8_t bmRequestType; //!< Setup type bitfield
+ uint8_t bRequest; //!< One of @ref app_usbd_setup_stdrequest_t values or class dependent one.
+ app_usbd_setup_w_t wValue; //!< byte 2, 3
+ app_usbd_setup_w_t wIndex; //!< byte 4, 5
+ app_usbd_setup_w_t wLength; //!< byte 6, 7
+} app_usbd_setup_t;
+
+#pragma pack(pop)
+
+
+/**
+ * @brief Extract recipient from request type.
+ *
+ * @param[in] bmRequestType
+ *
+ * @return Extracted recipient field from request type value.
+ */
+static inline app_usbd_setup_reqrec_t app_usbd_setup_req_rec(uint8_t bmRequestType)
+{
+ return (app_usbd_setup_reqrec_t)BF_CX_GET(bmRequestType, APP_USBD_SETUP_REQ_BF_REC);
+}
+
+/**
+ * @brief Extract type from request type.
+ *
+ * @param[in] bmRequestType
+ *
+ * @return Extracted type field from request type value.
+ */
+static inline app_usbd_setup_reqtype_t app_usbd_setup_req_typ(uint8_t bmRequestType)
+{
+ return (app_usbd_setup_reqtype_t)BF_CX_GET(bmRequestType, APP_USBD_SETUP_REQ_BF_TYP);
+}
+
+
+/**
+ * @brief Extract direction from request type.
+ *
+ * @param[in] bmRequestType
+ *
+ * @return Extracted direction field from request type value.
+ */
+static inline app_usbd_setup_reqdir_t app_usbd_setup_req_dir(uint8_t bmRequestType)
+{
+ return (app_usbd_setup_reqdir_t)BF_CX_GET(bmRequestType, APP_USBD_SETUP_REQ_BF_DIR);
+}
+
+/**
+ * @brief Make request type value.
+ *
+ * @param[in] rec Recipient.
+ * @param[in] typ Request type.
+ * @param[in] dir Direction.
+ *
+ * @return Assembled request type value.
+ */
+static inline uint8_t app_usbd_setup_req_val(app_usbd_setup_reqrec_t rec,
+ app_usbd_setup_reqtype_t typ,
+ app_usbd_setup_reqdir_t dir)
+{
+ uint32_t bmRequestType = (
+ BF_CX_VAL(rec, APP_USBD_SETUP_REQ_BF_REC) |
+ BF_CX_VAL(typ, APP_USBD_SETUP_REQ_BF_TYP) |
+ BF_CX_VAL(dir, APP_USBD_SETUP_REQ_BF_DIR)
+ );
+
+ ASSERT(bmRequestType < 256U);
+ return (uint8_t)bmRequestType;
+}
+
+
+ANON_UNIONS_DISABLE;
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* APP_USBD_REQUEST_H__ */
diff --git a/third_party/NordicSemiconductor/libraries/usb/app_usbd_serial_num.c b/third_party/NordicSemiconductor/libraries/usb/app_usbd_serial_num.c
index 548a2fa..1f0b46a 100644
--- a/third_party/NordicSemiconductor/libraries/usb/app_usbd_serial_num.c
+++ b/third_party/NordicSemiconductor/libraries/usb/app_usbd_serial_num.c
@@ -1,84 +1,84 @@
-/**
- * Copyright (c) 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-#include "app_usbd_serial_num.h"
-
-#include <stdint.h>
-#include <stdio.h>
-#include <string.h>
-#include <inttypes.h>
-#include "app_usbd.h"
-
-#define SERIAL_NUMBER_STRING_SIZE (12)
-
-/**@brief Serial number generated.
- *
- * Serial number generated by the @ref serial_number_string_create function.
- */
-uint8_t g_extern_serial_number[SERIAL_NUMBER_STRING_SIZE + 1];
-
-
-/**@brief Function for creating the serial number string from a regular C string.
- *
- * @param[in] p_serial_number_string The serial number string. Must be terminated with \0.
- */
-static void string_create(char * p_serial_number_string)
-{
-
- for (uint32_t i = 0; i < strlen(p_serial_number_string); i++)
- {
- g_extern_serial_number[i] = (uint8_t)p_serial_number_string[i];
- }
-}
-
-
-void app_usbd_serial_num_generate(void)
-{
- char serial_number_string[SERIAL_NUMBER_STRING_SIZE + 1];
- const uint16_t serial_num_high_bytes = (uint16_t)NRF_FICR->DEVICEADDR[1] | 0xC000; // The masking makes the address match the Random Static BLE address.
- const uint32_t serial_num_low_bytes = NRF_FICR->DEVICEADDR[0];
-
- (void)snprintf(serial_number_string,
- SERIAL_NUMBER_STRING_SIZE + 1,
- "%04"PRIX16"%08"PRIX32,
- serial_num_high_bytes,
- serial_num_low_bytes);
-
- string_create(serial_number_string);
-}
+/**
+ * Copyright (c) 2018 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#include "app_usbd_serial_num.h"
+
+#include <stdint.h>
+#include <stdio.h>
+#include <string.h>
+#include <inttypes.h>
+#include "app_usbd.h"
+
+#define SERIAL_NUMBER_STRING_SIZE (12)
+
+/**@brief Serial number generated.
+ *
+ * Serial number generated by the @ref serial_number_string_create function.
+ */
+uint8_t g_extern_serial_number[SERIAL_NUMBER_STRING_SIZE + 1];
+
+
+/**@brief Function for creating the serial number string from a regular C string.
+ *
+ * @param[in] p_serial_number_string The serial number string. Must be terminated with \0.
+ */
+static void string_create(char * p_serial_number_string)
+{
+
+ for (uint32_t i = 0; i < strlen(p_serial_number_string); i++)
+ {
+ g_extern_serial_number[i] = (uint8_t)p_serial_number_string[i];
+ }
+}
+
+
+void app_usbd_serial_num_generate(void)
+{
+ char serial_number_string[SERIAL_NUMBER_STRING_SIZE + 1];
+ const uint16_t serial_num_high_bytes = (uint16_t)NRF_FICR->DEVICEADDR[1] | 0xC000; // The masking makes the address match the Random Static BLE address.
+ const uint32_t serial_num_low_bytes = NRF_FICR->DEVICEADDR[0];
+
+ (void)snprintf(serial_number_string,
+ SERIAL_NUMBER_STRING_SIZE + 1,
+ "%04"PRIX16"%08"PRIX32,
+ serial_num_high_bytes,
+ serial_num_low_bytes);
+
+ string_create(serial_number_string);
+}
diff --git a/third_party/NordicSemiconductor/libraries/usb/app_usbd_serial_num.h b/third_party/NordicSemiconductor/libraries/usb/app_usbd_serial_num.h
index 6c0e91d..59124bb 100644
--- a/third_party/NordicSemiconductor/libraries/usb/app_usbd_serial_num.h
+++ b/third_party/NordicSemiconductor/libraries/usb/app_usbd_serial_num.h
@@ -1,75 +1,75 @@
-/**
- * Copyright (c) 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#ifndef APP_USBD_SERIAL_NUM_H__
-#define APP_USBD_SERIAL_NUM_H__
-
-#include <stdint.h>
-#include <stdio.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @defgroup app_usbd_serial_num USBD serial number generator
- * @ingroup app_usbd
- *
- * @brief @tagAPI52840 Generate a standard USB serial number that is unique for each device.
- * @{
- */
-
-/**@brief Function for generating a default serial number string based on FIRC->DEVICEADDR.
- *
- * After calling this function, the serial number is ready for the USB driver.
- *
- * The generated serial number shows up as a 12-hexidecimal-digit string with no delimiters
- * (e.g 123456ABCDEF). The byte string is also printed on the PCA10059 dongle. It is also used as
- * the default advertising address in the SoftDevice.
- */
-void app_usbd_serial_num_generate(void);
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // APP_USBD_SERIAL_NUM_H__
+/**
+ * Copyright (c) 2018 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef APP_USBD_SERIAL_NUM_H__
+#define APP_USBD_SERIAL_NUM_H__
+
+#include <stdint.h>
+#include <stdio.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup app_usbd_serial_num USBD serial number generator
+ * @ingroup app_usbd
+ *
+ * @brief @tagAPI52840 Generate a standard USB serial number that is unique for each device.
+ * @{
+ */
+
+/**@brief Function for generating a default serial number string based on FIRC->DEVICEADDR.
+ *
+ * After calling this function, the serial number is ready for the USB driver.
+ *
+ * The generated serial number shows up as a 12-hexidecimal-digit string with no delimiters
+ * (e.g 123456ABCDEF). The byte string is also printed on the PCA10059 dongle. It is also used as
+ * the default advertising address in the SoftDevice.
+ */
+void app_usbd_serial_num_generate(void);
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // APP_USBD_SERIAL_NUM_H__
diff --git a/third_party/NordicSemiconductor/libraries/usb/app_usbd_string_desc.c b/third_party/NordicSemiconductor/libraries/usb/app_usbd_string_desc.c
index 4fd78e4..c808e81 100644
--- a/third_party/NordicSemiconductor/libraries/usb/app_usbd_string_desc.c
+++ b/third_party/NordicSemiconductor/libraries/usb/app_usbd_string_desc.c
@@ -1,295 +1,295 @@
-/**
- * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-#include "sdk_config.h"
-#if APP_USBD_ENABLED
-#include "app_usbd_string_desc.h"
-#include "app_usbd_langid.h"
-#include "app_usbd_core.h"
-#include "nordic_common.h"
-#include "utf.h"
-
-/**
- * @defgroup app_usbd_string_desc
- * @ingroup app_usbd
- *
- * USBD string descriptor management
- * @{
- */
-
-/**
- * @brief Array with language identifiers.
- *
- * This array is used to search the proper string for the selected language.
- */
-static uint16_t const m_langids[] = { APP_USBD_STRINGS_LANGIDS };
-
-/**
- * @brief Language ID descriptor.
- *
- * Language.
- */
-
-
-/**
- * @brief Mnemonics for the string positions in the array.
- *
- * The mnemonics for the indexes of the strings inside the string array.
- */
-enum {
- APP_USBD_STRING_ID_LANGIDS_ARRAY_POS = 0, /**< Supported language identifiers. */
-
-#if (APP_USBD_STRING_ID_MANUFACTURER != 0)
- APP_USBD_STRING_ID_MANUFACTURER_ARRAY_POS, /**< Manufacturer name. */
-#endif // (APP_USBD_STRING_ID_MANUFACTURER != 0)
-
-#if (APP_USBD_STRING_ID_PRODUCT != 0)
- APP_USBD_STRING_ID_PRODUCT_ARRAY_POS, /**< Product name. */
-#endif // (APP_USBD_STRING_ID_PRODUCT != 0)
-
-#if (APP_USBD_STRING_ID_SERIAL != 0)
- APP_USBD_STRING_ID_SERIAL_ARRAY_POS, /**< Serial number. */
-#endif // (APP_USBD_STRING_ID_SERIAL != 0)
-
-#if (APP_USBD_STRING_ID_CONFIGURATION != 0)
- APP_USBD_STRING_ID_CONFIGURATION_ARRAY_POS, /**< Configuration string. */
-#endif // (APP_USBD_STRING_ID_CONFIGURATION != 0)
-
-#define X(mnemonic, str_idx, ...) CONCAT_2(mnemonic, _ARRAY_POS),
- APP_USBD_STRINGS_USER
-#undef X
-};
-
-/**
- * @brief String index into internal array index conversion table.
- *
- * The array that transforms the USB string indexes into internal array position.
- * @note Value 0 is used to mark non-existing string.
- */
-static uint8_t const m_string_translation[APP_USBD_STRING_ID_CNT] =
-{
- [APP_USBD_STRING_ID_LANGIDS] = APP_USBD_STRING_ID_LANGIDS_ARRAY_POS,
-
-#if (APP_USBD_STRING_ID_MANUFACTURER != 0)
- [APP_USBD_STRING_ID_MANUFACTURER] = APP_USBD_STRING_ID_MANUFACTURER_ARRAY_POS,
-#endif // (APP_USBD_STRING_ID_MANUFACTURER != 0)
-
-#if (APP_USBD_STRING_ID_PRODUCT != 0)
- [APP_USBD_STRING_ID_PRODUCT] = APP_USBD_STRING_ID_PRODUCT_ARRAY_POS,
-#endif // (APP_USBD_STRING_ID_PRODUCT != 0)
-
-#if (APP_USBD_STRING_ID_SERIAL != 0)
- [APP_USBD_STRING_ID_SERIAL] = APP_USBD_STRING_ID_SERIAL_ARRAY_POS,
-#endif // (APP_USBD_STRING_ID_SERIAL != 0)
-
-#if (APP_USBD_STRING_ID_CONFIGURATION != 0)
- [APP_USBD_STRING_ID_CONFIGURATION] = APP_USBD_STRING_ID_CONFIGURATION_ARRAY_POS,
-#endif // (APP_USBD_STRING_ID_CONFIGURATION != 0)
-
-#define X(mnemonic, str_idx, ...) [mnemonic] = CONCAT_2(mnemonic, _ARRAY_POS),
- APP_USBD_STRINGS_USER
-#undef X
-};
-
-#ifndef APP_USBD_STRINGS_MANUFACTURER_EXTERN
-#define APP_USBD_STRINGS_MANUFACTURER_EXTERN 0
-#endif
-
-#if APP_USBD_STRINGS_MANUFACTURER_EXTERN
-extern uint8_t APP_USBD_STRINGS_MANUFACTURER[];
-#endif
-
-#ifndef APP_USBD_STRINGS_PRODUCT_EXTERN
-#define APP_USBD_STRINGS_PRODUCT_EXTERN 0
-#endif
-
-#if APP_USBD_STRINGS_PRODUCT_EXTERN
-extern uint8_t APP_USBD_STRINGS_PRODUCT[];
-#endif
-
-#ifndef APP_USBD_STRING_SERIAL_EXTERN
-#define APP_USBD_STRING_SERIAL_EXTERN 0
-#endif
-
-#if APP_USBD_STRING_SERIAL_EXTERN
-extern uint8_t APP_USBD_STRING_SERIAL[];
-#endif
-
-#ifndef APP_USBD_STRING_CONFIGURATION_EXTERN
-#define APP_USBD_STRING_CONFIGURATION_EXTERN 0
-#endif
-
-#if APP_USBD_STRING_CONFIGURATION_EXTERN
-extern uint8_t APP_USBD_STRING_CONFIGURATION[];
-#endif
-
-/**
- * @brief String descriptor table.
- * */
-static uint8_t const * m_string_dsc[APP_USBD_STRING_ID_CNT][ARRAY_SIZE(m_langids)] =
-{
- [APP_USBD_STRING_ID_LANGIDS_ARRAY_POS] = {APP_USBD_STRING_RAW16_DESC(APP_USBD_STRINGS_LANGIDS)},
-
-#if (APP_USBD_STRING_ID_MANUFACTURER != 0)
- [APP_USBD_STRING_ID_MANUFACTURER_ARRAY_POS] = { APP_USBD_STRINGS_MANUFACTURER },
-#endif // (APP_USBD_STRING_ID_MANUFACTURER != 0)
-
-#if (APP_USBD_STRING_ID_PRODUCT != 0)
- [APP_USBD_STRING_ID_PRODUCT_ARRAY_POS] = { APP_USBD_STRINGS_PRODUCT },
-#endif // (APP_USBD_STRING_ID_PRODUCT != 0)
-
-#if (APP_USBD_STRING_ID_SERIAL != 0)
- [APP_USBD_STRING_ID_SERIAL_ARRAY_POS] = { APP_USBD_STRING_SERIAL },
-#endif // (APP_USBD_STRING_ID_SERIAL != 0)
-
-#if (APP_USBD_STRING_ID_CONFIGURATION != 0)
- [APP_USBD_STRING_ID_CONFIGURATION_ARRAY_POS] = { APP_USBD_STRINGS_CONFIGURATION },
-#endif // (APP_USBD_STRING_ID_CONFIGURATION != 0)
-
-#define X(mnemonic, str_idx, ...) [CONCAT_2(mnemonic, _ARRAY_POS)] = {__VA_ARGS__},
- APP_USBD_STRINGS_USER
-#undef X
-};
-
-/**
- * @brief Function for preparing UTF16 string descriptor.
- *
- * @param idx String descriptor ID.
- * @param langid Language ID.
- *
- * @return Pointer to the string descriptor.
- */
-static uint16_t * app_usbd_prepare_string(uint8_t idx, uint16_t langid)
-{
- if (m_string_dsc[idx][langid][0] == 0x00)
- {
- return (uint16_t *) &(m_string_dsc[idx][langid][2]);
- }
-
-#if ((APP_USBD_CONFIG_DESC_STRING_SIZE * 2) + 2) <= NRF_DRV_USBD_EPSIZE
- uint16_t * string_buffer = app_usbd_core_setup_transfer_buff_get(NULL);
-#else
- static uint16_t string_buffer[APP_USBD_CONFIG_DESC_STRING_SIZE + 1];
- // + 1 element for string descriptor type and size
-#endif
-
- uint8_t size = 0;
- const uint8_t * p_pos = m_string_dsc[idx][langid];
-
-#if APP_USBD_CONFIG_DESC_STRING_UTF_ENABLED
- size = utf8UTF16Count((char *) p_pos, 0);
- ASSERT(size <= APP_USBD_CONFIG_DESC_STRING_SIZE);
-
- uint16_t * p_out = &(string_buffer[1]);
- uint32_t rune;
-
- while (*p_pos != 0)
- {
- p_pos = (uint8_t *) utf8DecodeRune((char *) p_pos, 0, &rune);
- p_out += utf16EncodeRune(rune, p_out);
- }
-#else
- while(*p_pos != 0)
- {
- ASSERT(size < APP_USBD_CONFIG_DESC_STRING_SIZE);
- ++size;
- string_buffer[size] = *p_pos;
- ++p_pos;
- }
-#endif
-
- // Descriptor size is length of the string times 2 bytes per character + 2 bytes for
- // descriptor type and size.
- string_buffer[0] = (0xff & (size * 2 + 2)) | ((uint16_t)APP_USBD_DESCRIPTOR_STRING) << 8;
-
- return string_buffer;
-}
-
-uint16_t const * app_usbd_string_desc_get(uint8_t idx, uint16_t langid)
-{
- /* LANGID string. */
- if (APP_USBD_STRING_ID_LANGIDS == idx)
- {
- return app_usbd_prepare_string(APP_USBD_STRING_ID_LANGIDS_ARRAY_POS, 0);
- }
-
- /* Searching for the language. */
- uint8_t lang_idx = 0;
- if (ARRAY_SIZE(m_langids) > 1)
- {
- while (m_langids[lang_idx] != langid)
- {
- ++lang_idx;
- if (lang_idx >= ARRAY_SIZE(m_langids))
- {
- return NULL;
- }
- }
- }
-
- /* Get the string index in array. */
- if (idx >= ARRAY_SIZE(m_string_translation))
- {
- return NULL;
- }
-
- uint8_t str_pos = m_string_translation[idx];
- if (str_pos == 0)
- {
- return NULL;
- }
-
- if ((ARRAY_SIZE(m_langids) > 1) && (lang_idx != 0))
- {
- if (m_string_dsc[str_pos][lang_idx] == NULL)
- {
- lang_idx = 0;
- }
- }
-
- if (m_string_dsc[str_pos][lang_idx] == NULL)
- {
- return NULL;
- }
-
- return app_usbd_prepare_string(str_pos, lang_idx);
-}
-
-/** @} */
-#endif // APP_USBD_ENABLED
+/**
+ * Copyright (c) 2016 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#include "sdk_config.h"
+#if APP_USBD_ENABLED
+#include "app_usbd_string_desc.h"
+#include "app_usbd_langid.h"
+#include "app_usbd_core.h"
+#include "nordic_common.h"
+#include "utf.h"
+
+/**
+ * @defgroup app_usbd_string_desc
+ * @ingroup app_usbd
+ *
+ * USBD string descriptor management
+ * @{
+ */
+
+/**
+ * @brief Array with language identifiers.
+ *
+ * This array is used to search the proper string for the selected language.
+ */
+static uint16_t const m_langids[] = { APP_USBD_STRINGS_LANGIDS };
+
+/**
+ * @brief Language ID descriptor.
+ *
+ * Language.
+ */
+
+
+/**
+ * @brief Mnemonics for the string positions in the array.
+ *
+ * The mnemonics for the indexes of the strings inside the string array.
+ */
+enum {
+ APP_USBD_STRING_ID_LANGIDS_ARRAY_POS = 0, /**< Supported language identifiers. */
+
+#if (APP_USBD_STRING_ID_MANUFACTURER != 0)
+ APP_USBD_STRING_ID_MANUFACTURER_ARRAY_POS, /**< Manufacturer name. */
+#endif // (APP_USBD_STRING_ID_MANUFACTURER != 0)
+
+#if (APP_USBD_STRING_ID_PRODUCT != 0)
+ APP_USBD_STRING_ID_PRODUCT_ARRAY_POS, /**< Product name. */
+#endif // (APP_USBD_STRING_ID_PRODUCT != 0)
+
+#if (APP_USBD_STRING_ID_SERIAL != 0)
+ APP_USBD_STRING_ID_SERIAL_ARRAY_POS, /**< Serial number. */
+#endif // (APP_USBD_STRING_ID_SERIAL != 0)
+
+#if (APP_USBD_STRING_ID_CONFIGURATION != 0)
+ APP_USBD_STRING_ID_CONFIGURATION_ARRAY_POS, /**< Configuration string. */
+#endif // (APP_USBD_STRING_ID_CONFIGURATION != 0)
+
+#define X(mnemonic, str_idx, ...) CONCAT_2(mnemonic, _ARRAY_POS),
+ APP_USBD_STRINGS_USER
+#undef X
+};
+
+/**
+ * @brief String index into internal array index conversion table.
+ *
+ * The array that transforms the USB string indexes into internal array position.
+ * @note Value 0 is used to mark non-existing string.
+ */
+static uint8_t const m_string_translation[APP_USBD_STRING_ID_CNT] =
+{
+ [APP_USBD_STRING_ID_LANGIDS] = APP_USBD_STRING_ID_LANGIDS_ARRAY_POS,
+
+#if (APP_USBD_STRING_ID_MANUFACTURER != 0)
+ [APP_USBD_STRING_ID_MANUFACTURER] = APP_USBD_STRING_ID_MANUFACTURER_ARRAY_POS,
+#endif // (APP_USBD_STRING_ID_MANUFACTURER != 0)
+
+#if (APP_USBD_STRING_ID_PRODUCT != 0)
+ [APP_USBD_STRING_ID_PRODUCT] = APP_USBD_STRING_ID_PRODUCT_ARRAY_POS,
+#endif // (APP_USBD_STRING_ID_PRODUCT != 0)
+
+#if (APP_USBD_STRING_ID_SERIAL != 0)
+ [APP_USBD_STRING_ID_SERIAL] = APP_USBD_STRING_ID_SERIAL_ARRAY_POS,
+#endif // (APP_USBD_STRING_ID_SERIAL != 0)
+
+#if (APP_USBD_STRING_ID_CONFIGURATION != 0)
+ [APP_USBD_STRING_ID_CONFIGURATION] = APP_USBD_STRING_ID_CONFIGURATION_ARRAY_POS,
+#endif // (APP_USBD_STRING_ID_CONFIGURATION != 0)
+
+#define X(mnemonic, str_idx, ...) [mnemonic] = CONCAT_2(mnemonic, _ARRAY_POS),
+ APP_USBD_STRINGS_USER
+#undef X
+};
+
+#ifndef APP_USBD_STRINGS_MANUFACTURER_EXTERN
+#define APP_USBD_STRINGS_MANUFACTURER_EXTERN 0
+#endif
+
+#if APP_USBD_STRINGS_MANUFACTURER_EXTERN
+extern uint8_t APP_USBD_STRINGS_MANUFACTURER[];
+#endif
+
+#ifndef APP_USBD_STRINGS_PRODUCT_EXTERN
+#define APP_USBD_STRINGS_PRODUCT_EXTERN 0
+#endif
+
+#if APP_USBD_STRINGS_PRODUCT_EXTERN
+extern uint8_t APP_USBD_STRINGS_PRODUCT[];
+#endif
+
+#ifndef APP_USBD_STRING_SERIAL_EXTERN
+#define APP_USBD_STRING_SERIAL_EXTERN 0
+#endif
+
+#if APP_USBD_STRING_SERIAL_EXTERN
+extern uint8_t APP_USBD_STRING_SERIAL[];
+#endif
+
+#ifndef APP_USBD_STRING_CONFIGURATION_EXTERN
+#define APP_USBD_STRING_CONFIGURATION_EXTERN 0
+#endif
+
+#if APP_USBD_STRING_CONFIGURATION_EXTERN
+extern uint8_t APP_USBD_STRING_CONFIGURATION[];
+#endif
+
+/**
+ * @brief String descriptor table.
+ * */
+static uint8_t const * m_string_dsc[APP_USBD_STRING_ID_CNT][ARRAY_SIZE(m_langids)] =
+{
+ [APP_USBD_STRING_ID_LANGIDS_ARRAY_POS] = {APP_USBD_STRING_RAW16_DESC(APP_USBD_STRINGS_LANGIDS)},
+
+#if (APP_USBD_STRING_ID_MANUFACTURER != 0)
+ [APP_USBD_STRING_ID_MANUFACTURER_ARRAY_POS] = { APP_USBD_STRINGS_MANUFACTURER },
+#endif // (APP_USBD_STRING_ID_MANUFACTURER != 0)
+
+#if (APP_USBD_STRING_ID_PRODUCT != 0)
+ [APP_USBD_STRING_ID_PRODUCT_ARRAY_POS] = { APP_USBD_STRINGS_PRODUCT },
+#endif // (APP_USBD_STRING_ID_PRODUCT != 0)
+
+#if (APP_USBD_STRING_ID_SERIAL != 0)
+ [APP_USBD_STRING_ID_SERIAL_ARRAY_POS] = { APP_USBD_STRING_SERIAL },
+#endif // (APP_USBD_STRING_ID_SERIAL != 0)
+
+#if (APP_USBD_STRING_ID_CONFIGURATION != 0)
+ [APP_USBD_STRING_ID_CONFIGURATION_ARRAY_POS] = { APP_USBD_STRINGS_CONFIGURATION },
+#endif // (APP_USBD_STRING_ID_CONFIGURATION != 0)
+
+#define X(mnemonic, str_idx, ...) [CONCAT_2(mnemonic, _ARRAY_POS)] = {__VA_ARGS__},
+ APP_USBD_STRINGS_USER
+#undef X
+};
+
+/**
+ * @brief Function for preparing UTF16 string descriptor.
+ *
+ * @param idx String descriptor ID.
+ * @param langid Language ID.
+ *
+ * @return Pointer to the string descriptor.
+ */
+static uint16_t * app_usbd_prepare_string(uint8_t idx, uint16_t langid)
+{
+ if (m_string_dsc[idx][langid][0] == 0x00)
+ {
+ return (uint16_t *) &(m_string_dsc[idx][langid][2]);
+ }
+
+#if ((APP_USBD_CONFIG_DESC_STRING_SIZE * 2) + 2) <= NRF_DRV_USBD_EPSIZE
+ uint16_t * string_buffer = app_usbd_core_setup_transfer_buff_get(NULL);
+#else
+ static uint16_t string_buffer[APP_USBD_CONFIG_DESC_STRING_SIZE + 1];
+ // + 1 element for string descriptor type and size
+#endif
+
+ uint8_t size = 0;
+ const uint8_t * p_pos = m_string_dsc[idx][langid];
+
+#if APP_USBD_CONFIG_DESC_STRING_UTF_ENABLED
+ size = utf8UTF16Count((char *) p_pos, 0);
+ ASSERT(size <= APP_USBD_CONFIG_DESC_STRING_SIZE);
+
+ uint16_t * p_out = &(string_buffer[1]);
+ uint32_t rune;
+
+ while (*p_pos != 0)
+ {
+ p_pos = (uint8_t *) utf8DecodeRune((char *) p_pos, 0, &rune);
+ p_out += utf16EncodeRune(rune, p_out);
+ }
+#else
+ while(*p_pos != 0)
+ {
+ ASSERT(size < APP_USBD_CONFIG_DESC_STRING_SIZE);
+ ++size;
+ string_buffer[size] = *p_pos;
+ ++p_pos;
+ }
+#endif
+
+ // Descriptor size is length of the string times 2 bytes per character + 2 bytes for
+ // descriptor type and size.
+ string_buffer[0] = (0xff & (size * 2 + 2)) | ((uint16_t)APP_USBD_DESCRIPTOR_STRING) << 8;
+
+ return string_buffer;
+}
+
+uint16_t const * app_usbd_string_desc_get(uint8_t idx, uint16_t langid)
+{
+ /* LANGID string. */
+ if (APP_USBD_STRING_ID_LANGIDS == idx)
+ {
+ return app_usbd_prepare_string(APP_USBD_STRING_ID_LANGIDS_ARRAY_POS, 0);
+ }
+
+ /* Searching for the language. */
+ uint8_t lang_idx = 0;
+ if (ARRAY_SIZE(m_langids) > 1)
+ {
+ while (m_langids[lang_idx] != langid)
+ {
+ ++lang_idx;
+ if (lang_idx >= ARRAY_SIZE(m_langids))
+ {
+ return NULL;
+ }
+ }
+ }
+
+ /* Get the string index in array. */
+ if (idx >= ARRAY_SIZE(m_string_translation))
+ {
+ return NULL;
+ }
+
+ uint8_t str_pos = m_string_translation[idx];
+ if (str_pos == 0)
+ {
+ return NULL;
+ }
+
+ if ((ARRAY_SIZE(m_langids) > 1) && (lang_idx != 0))
+ {
+ if (m_string_dsc[str_pos][lang_idx] == NULL)
+ {
+ lang_idx = 0;
+ }
+ }
+
+ if (m_string_dsc[str_pos][lang_idx] == NULL)
+ {
+ return NULL;
+ }
+
+ return app_usbd_prepare_string(str_pos, lang_idx);
+}
+
+/** @} */
+#endif // APP_USBD_ENABLED
diff --git a/third_party/NordicSemiconductor/libraries/usb/app_usbd_string_desc.h b/third_party/NordicSemiconductor/libraries/usb/app_usbd_string_desc.h
index 665cc0d..21d75e8 100644
--- a/third_party/NordicSemiconductor/libraries/usb/app_usbd_string_desc.h
+++ b/third_party/NordicSemiconductor/libraries/usb/app_usbd_string_desc.h
@@ -1,179 +1,179 @@
-/**
- * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-#ifndef APP_USBD_STRING_DESC_H__
-#define APP_USBD_STRING_DESC_H__
-
-#include <stdint.h>
-#include "sdk_common.h"
-#include "app_usbd.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @defgroup app_usbd_string_desc USBD string descriptors
- * @ingroup app_usbd
- *
- * @brief @tagAPI52840 USBD string descriptor management.
- * @{
- */
-
-/**
- * @brief USB Language identifier initialization.
- *
- * @param[in] lang Language identifier.
- */
-#define APP_USBD_LANG(lang) \
- ((app_usbd_langid_t) lang)
-
-/**
- * @brief USB Language identifier with sublanguage initialization.
- *
- * @param[in] lang Language identifier.
- * @param[in] sublang Sublanguage identifier.
- */
-#define APP_USBD_LANG_AND_SUBLANG(lang, sublang) \
- ((app_usbd_langid_t) lang | (app_usbd_langid_t) sublang)
-
-/**
- * @brief USB string initialization.
- *
- * Macro that creates initialization values for the USB string.
- * The string must be declared as a NULL-terminated string.
- *
- * @param[in] str NULL-terminated string.
- *
- * @return String descriptor initialization data.
- */
-#define APP_USBD_STRING_DESC(str) (const uint8_t *)(const char[]){str}
-
-/**
- * @brief USB raw 8-bit string initialization.
- *
- * Macro that creates header for raw values passed into descriptor.
- * Values must be of the uint8_t type and separated by commas.
- *
- * @param[in] ... comma-separated values.
- *
- * @return String descriptor initialization data.
- */
-#define APP_USBD_STRING_RAW8_DESC(...) (const uint8_t[]){ \
- 0x00, 0x00, /* NULL character at start to differentiate from normal string */ \
- (0xff & (sizeof((uint8_t[]){__VA_ARGS__}) + 2)), \
- (APP_USBD_DESCRIPTOR_STRING), \
- __VA_ARGS__ }
-
-/**
- * @brief USB raw 16-bit string initialization.
- *
- * Macro that creates header for raw values passed into descriptor.
- * Values must be of the uint16_t type and separated by commas.
- *
- * @param[in] ... comma-separated values.
- *
- * @return String descriptor initialization data.
- */
-#define APP_USBD_STRING_RAW16_DESC(...) (const uint8_t *) ((const uint16_t[]){ \
- 0x00, /* NULL character at start to differentiate from normal string */ \
- (0xff & (sizeof((uint16_t[]){__VA_ARGS__}) + 2)) | \
- ((uint16_t)APP_USBD_DESCRIPTOR_STRING) << 8, \
- __VA_ARGS__ })
-
-/**
- * @brief USB string descriptors IDs
- */
-typedef enum {
- APP_USBD_STRING_ID_LANGIDS = 0, /**< Supported language identifiers */
-
- /// Placeholders used only for alignement of user strings. Do not use or modify them.
-
-#if (APP_USBD_STRING_ID_MANUFACTURER != 0)
- APP_USBD_STRING_ID_MANUFACTURER_PLACEHOLDER = APP_USBD_STRING_ID_MANUFACTURER,
-#endif // (APP_USBD_STRING_ID_MANUFACTURER != 0)
-
-#if (APP_USBD_STRING_ID_PRODUCT != 0)
- APP_USBD_STRING_ID_PRODUCT_PLACEHOLDER = APP_USBD_STRING_ID_PRODUCT,
-#endif // (APP_USBD_STRING_ID_PRODUCT != 0)
-
-#if (APP_USBD_STRING_ID_SERIAL != 0)
- APP_USBD_STRING_ID_SERIAL_PLACEHOLDER = APP_USBD_STRING_ID_SERIAL,
-#endif // (APP_USBD_STRING_ID_SERIAL != 0)
-
-#if (APP_USBD_STRING_ID_CONFIGURATION != 0)
- APP_USBD_STRING_ID_CONFIGURATION_PLACEHOLDER = APP_USBD_STRING_ID_CONFIGURATION,
-#endif // (APP_USBD_STRING_ID_CONFIGURATION != 0)
-
-#define X(mnemonic, str_idx, ...) mnemonic str_idx,
- APP_USBD_STRINGS_USER
-#undef X
-
- APP_USBD_STRING_ID_CNT /**< Total number of identifiers. */
-} app_usbd_string_desc_idx_t;
-
-/**
- * @brief Get string descriptor.
- *
- * @param[in] idx String descriptor index.
- * @param[in] langid Selected language for the string.
- * @return String descriptor, or NULL if it does not exist.
- * */
-uint16_t const * app_usbd_string_desc_get(uint8_t idx, uint16_t langid);
-
-/**
- * @brief Get string length.
- *
- * Function for getting string length from descriptor (descriptor returned by @ref app_usbd_string_desc_get).
- *
- * @param[in] p_str String descriptor pointer.
- * @return Total descriptor length in bytes.
- */
-static inline size_t app_usbd_string_desc_length(uint16_t const * p_str)
-{
- return ((const app_usbd_descriptor_string_t *)p_str)->bLength;
-}
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* APP_USBD_STRING_DESC_H__ */
+/**
+ * Copyright (c) 2016 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#ifndef APP_USBD_STRING_DESC_H__
+#define APP_USBD_STRING_DESC_H__
+
+#include <stdint.h>
+#include "sdk_common.h"
+#include "app_usbd.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup app_usbd_string_desc USBD string descriptors
+ * @ingroup app_usbd
+ *
+ * @brief @tagAPI52840 USBD string descriptor management.
+ * @{
+ */
+
+/**
+ * @brief USB Language identifier initialization.
+ *
+ * @param[in] lang Language identifier.
+ */
+#define APP_USBD_LANG(lang) \
+ ((app_usbd_langid_t) lang)
+
+/**
+ * @brief USB Language identifier with sublanguage initialization.
+ *
+ * @param[in] lang Language identifier.
+ * @param[in] sublang Sublanguage identifier.
+ */
+#define APP_USBD_LANG_AND_SUBLANG(lang, sublang) \
+ ((app_usbd_langid_t) lang | (app_usbd_langid_t) sublang)
+
+/**
+ * @brief USB string initialization.
+ *
+ * Macro that creates initialization values for the USB string.
+ * The string must be declared as a NULL-terminated string.
+ *
+ * @param[in] str NULL-terminated string.
+ *
+ * @return String descriptor initialization data.
+ */
+#define APP_USBD_STRING_DESC(str) (const uint8_t *)(const char[]){str}
+
+/**
+ * @brief USB raw 8-bit string initialization.
+ *
+ * Macro that creates header for raw values passed into descriptor.
+ * Values must be of the uint8_t type and separated by commas.
+ *
+ * @param[in] ... comma-separated values.
+ *
+ * @return String descriptor initialization data.
+ */
+#define APP_USBD_STRING_RAW8_DESC(...) (const uint8_t[]){ \
+ 0x00, 0x00, /* NULL character at start to differentiate from normal string */ \
+ (0xff & (sizeof((uint8_t[]){__VA_ARGS__}) + 2)), \
+ (APP_USBD_DESCRIPTOR_STRING), \
+ __VA_ARGS__ }
+
+/**
+ * @brief USB raw 16-bit string initialization.
+ *
+ * Macro that creates header for raw values passed into descriptor.
+ * Values must be of the uint16_t type and separated by commas.
+ *
+ * @param[in] ... comma-separated values.
+ *
+ * @return String descriptor initialization data.
+ */
+#define APP_USBD_STRING_RAW16_DESC(...) (const uint8_t *) ((const uint16_t[]){ \
+ 0x00, /* NULL character at start to differentiate from normal string */ \
+ (0xff & (sizeof((uint16_t[]){__VA_ARGS__}) + 2)) | \
+ ((uint16_t)APP_USBD_DESCRIPTOR_STRING) << 8, \
+ __VA_ARGS__ })
+
+/**
+ * @brief USB string descriptors IDs
+ */
+typedef enum {
+ APP_USBD_STRING_ID_LANGIDS = 0, /**< Supported language identifiers */
+
+ /// Placeholders used only for alignement of user strings. Do not use or modify them.
+
+#if (APP_USBD_STRING_ID_MANUFACTURER != 0)
+ APP_USBD_STRING_ID_MANUFACTURER_PLACEHOLDER = APP_USBD_STRING_ID_MANUFACTURER,
+#endif // (APP_USBD_STRING_ID_MANUFACTURER != 0)
+
+#if (APP_USBD_STRING_ID_PRODUCT != 0)
+ APP_USBD_STRING_ID_PRODUCT_PLACEHOLDER = APP_USBD_STRING_ID_PRODUCT,
+#endif // (APP_USBD_STRING_ID_PRODUCT != 0)
+
+#if (APP_USBD_STRING_ID_SERIAL != 0)
+ APP_USBD_STRING_ID_SERIAL_PLACEHOLDER = APP_USBD_STRING_ID_SERIAL,
+#endif // (APP_USBD_STRING_ID_SERIAL != 0)
+
+#if (APP_USBD_STRING_ID_CONFIGURATION != 0)
+ APP_USBD_STRING_ID_CONFIGURATION_PLACEHOLDER = APP_USBD_STRING_ID_CONFIGURATION,
+#endif // (APP_USBD_STRING_ID_CONFIGURATION != 0)
+
+#define X(mnemonic, str_idx, ...) mnemonic str_idx,
+ APP_USBD_STRINGS_USER
+#undef X
+
+ APP_USBD_STRING_ID_CNT /**< Total number of identifiers. */
+} app_usbd_string_desc_idx_t;
+
+/**
+ * @brief Get string descriptor.
+ *
+ * @param[in] idx String descriptor index.
+ * @param[in] langid Selected language for the string.
+ * @return String descriptor, or NULL if it does not exist.
+ * */
+uint16_t const * app_usbd_string_desc_get(uint8_t idx, uint16_t langid);
+
+/**
+ * @brief Get string length.
+ *
+ * Function for getting string length from descriptor (descriptor returned by @ref app_usbd_string_desc_get).
+ *
+ * @param[in] p_str String descriptor pointer.
+ * @return Total descriptor length in bytes.
+ */
+static inline size_t app_usbd_string_desc_length(uint16_t const * p_str)
+{
+ return ((const app_usbd_descriptor_string_t *)p_str)->bLength;
+}
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* APP_USBD_STRING_DESC_H__ */
diff --git a/third_party/NordicSemiconductor/libraries/usb/app_usbd_types.h b/third_party/NordicSemiconductor/libraries/usb/app_usbd_types.h
index 494cb5f..0d4a0c2 100644
--- a/third_party/NordicSemiconductor/libraries/usb/app_usbd_types.h
+++ b/third_party/NordicSemiconductor/libraries/usb/app_usbd_types.h
@@ -1,278 +1,279 @@
-/**
- * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#ifndef APP_USBD_TYPES_H__
-#define APP_USBD_TYPES_H__
-
-#include <stdint.h>
-
-#include "sdk_errors.h"
-#include "nrf_drv_usbd.h"
-#include "app_usbd_request.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @defgroup app_usbd_types USB Device high level library variable types definition
- * @ingroup app_usbd
- *
- * @brief @tagAPI52840 All types used by @ref app_usbd are defined here.
- * This helps to avoid cross referencing into types in different files.
- * @{
- */
-
-/**
- * @brief Change given value to 2 digits in BCD notation.
- *
- * @param[in] val The decimal value to be converted in the range from 0 to 99.
- * @return Calculated BCD value.
- */
-#define APP_USBD_BCD_2_MAKE(val) ( \
- ((((val) % 100) / 10) * 0x10) + \
- ((((val) % 10) / 1) * 0x1) \
- )
-
-/**
- * @brief Change given decimal version values to 4 digits in BCD notation.
- *
- * USB specification uses 4 digits BCD version notation in many descriptors.
- * This macro changes 2 values to 4 BCD digits (one 16 bit value)
- * that describes version in USB standard.
- *
- * @param[in] major Major version.
- * @param[in] minor Minor version.
- *
- * @return Calculated 16 bit value with BCD representation of the version.
- */
-#define APP_USBD_BCD_VER_MAKE(major, minor) \
- ((APP_USBD_BCD_2_MAKE(major) << 8) | APP_USBD_BCD_2_MAKE(minor))
-
-/**
- * @brief Combine endpoint address and its interval.
- *
- * @param[in] address Endpoint address
- * @param[in] interval Endpoint interval
- * @return Combined address and interval.
- */
-#define APP_USBD_EP_WITH_INTERVAL(address, interval) \
- ((1UL << 16) | ((interval) << 8) | (address))
-
-#define APP_USBD_EXTRACT_INTERVAL_VALUE(combined) \
- (((combined) & 0xFF00) >> 8)
-
-#define APP_USBD_EXTRACT_INTERVAL_FLAG(combined) \
- (((combined) >> 16) & 0x01)
-
-/**
- * @brief Events codes.
- *
- * Redefined application event codes.
- */
-typedef enum
-{
- APP_USBD_EVT_DRV_SOF = NRF_DRV_USBD_EVT_SOF, /**< See documentation for @ref NRF_DRV_USBD_EVT_SOF */
- APP_USBD_EVT_DRV_RESET = NRF_DRV_USBD_EVT_RESET, /**< See documentation for @ref NRF_DRV_USBD_EVT_RESET */
- APP_USBD_EVT_DRV_SUSPEND = NRF_DRV_USBD_EVT_SUSPEND, /**< See documentation for @ref NRF_DRV_USBD_EVT_SUSPEND */
- APP_USBD_EVT_DRV_RESUME = NRF_DRV_USBD_EVT_RESUME, /**< See documentation for @ref NRF_DRV_USBD_EVT_RESUME */
- APP_USBD_EVT_DRV_WUREQ = NRF_DRV_USBD_EVT_WUREQ, /**< See documentation for @ref NRF_DRV_USBD_EVT_WUREQ */
- APP_USBD_EVT_DRV_SETUP = NRF_DRV_USBD_EVT_SETUP, /**< This event type has special structure. See @ref app_usbd_setup_evt_t */
- APP_USBD_EVT_DRV_EPTRANSFER = NRF_DRV_USBD_EVT_EPTRANSFER, /**< See documentation for @ref NRF_DRV_USBD_EVT_EPTRANSFER */
-
- APP_USBD_EVT_FIRST_POWER, /**< First power event code - for internal static assert checking */
-
- APP_USBD_EVT_POWER_DETECTED, /**< See documentation for @ref NRF_DRV_POWER_USB_EVT_DETECTED */
- APP_USBD_EVT_POWER_REMOVED, /**< See documentation for @ref NRF_DRV_POWER_USB_EVT_REMOVED */
- APP_USBD_EVT_POWER_READY, /**< See documentation for @ref NRF_DRV_POWER_USB_EVT_READY */
-
-
- APP_USBD_EVT_FIRST_APP, /**< First application event code - for internal static assert checking */
-
- APP_USBD_EVT_INST_APPEND = APP_USBD_EVT_FIRST_APP, /**< The instance was attached to the library, any configuration action can be done now */
- APP_USBD_EVT_INST_REMOVE, /**<
- * The instance is going to be removed, this event is called just before removing the instance.
- * This removing cannot be stopped.
- */
- APP_USBD_EVT_STARTED, /**< USBD library has just been started and functional - event passed to all instances, before USBD interrupts have been enabled */
- APP_USBD_EVT_STOPPED, /**< USBD library has just been stopped and is not functional - event passed to all instances, after USBD interrupts have been disabled*/
-
- APP_USBD_EVT_STATE_CHANGED, /**<
- * Informs all the classes that base state has been changed.
- * This event is processed before setup stage that caused the state change finishes (before acknowledging it).
- */
-
- APP_USBD_EVT_FIRST_INTERNAL = 0x80, /**< First internal event, used by the APP library internally. */
-
- APP_USBD_EVT_HFCLK_READY = APP_USBD_EVT_FIRST_INTERNAL, /**< High frequency clock started */
- APP_USBD_EVT_START_REQ, /**< Start requested */
- APP_USBD_EVT_STOP_REQ, /**< Stop requested */
- APP_USBD_EVT_SUSPEND_REQ, /**< Suspend request - HFCLK would be released and USBD peripheral clock would be disconnected */
- APP_USBD_EVT_WAKEUP_REQ, /**< Wakeup request - start the whole wakeup generation. */
- APP_USBD_EVT_SETUP_SETADDRESS, /**<
- * Setup request to set address, separated from
- * regular EVT_SETUP because this request is
- * fully handled by hardware and for the software
- * it is only a notification about what happened
- */
-
-} app_usbd_event_type_t;
-
-
-
-/**
- * @brief Specific application event structure.
- *
- * All the data required by the events that comes from the application level.
- */
-typedef struct
-{
- app_usbd_event_type_t type; //!< Event type
-} app_usbd_evt_t;
-
-/**
- * @brief Specific application event structure with setup structure included.
- *
- * This event structure would be used when @ref APP_USBD_EVT_DRV_SETUP
- * is passed to instance event handler.
- */
-typedef struct
-{
- app_usbd_event_type_t type; //!< Event type
- app_usbd_setup_t setup; //!< Setup structure
-} app_usbd_setup_evt_t;
-
-
-/**
- * @brief Complex event variable type.
- *
- * A variable that can store any kind of event.
- */
-typedef union
-{
- app_usbd_event_type_t type; //!< Event type
- nrf_drv_usbd_evt_t drv_evt; //!< Events that comes directly from the driver.
- /**< Use this event structure only for event
- * type < @ref APP_USBD_EVT_FIRST_APP
- */
- app_usbd_setup_evt_t setup_evt; //!< Event structure with SETUP structure included.
- /**< This structure is used in connection with
- * @ref APP_USBD_EVT_DRV_SETUP
- */
- app_usbd_evt_t app_evt; //!< Events that comes from the application driver.
- /**< Use this event structure only for event
- * type >= @ref APP_USBD_EVT_FIRST_APP
- */
-} app_usbd_complex_evt_t;
-
-
-/**
- * @brief Internal event variable type.
- *
- * The variable type used for internal event processing.
- * This kind of event is the one that goes into the event queue.
- *
- * @note There is no setup event structure.
- * This structure would be created when setup event is processed.
- * The reason for that is the fact that setup event structure has high memory printout.
- */
-typedef union
-{
- app_usbd_event_type_t type; //!< Event type
- nrf_drv_usbd_evt_t drv_evt; //!< Events that comes directly from the driver.
- /**< Use this event structure only for event
- * type < @ref APP_USBD_EVT_FIRST_APP
- */
- app_usbd_evt_t app_evt; //!< Events that comes from the application driver.
- /**< Use this event structure only for event
- * type >= @ref APP_USBD_EVT_FIRST_APP
- */
-} app_usbd_internal_evt_t;
-
-
-#ifdef DOXYGEN
-/**
- * @brief Base instance of a USBD class.
- *
- * Any USBD class instance have to begin with this instance.
- * This may then be followed by any implementation dependent data.
- *
- * For an instance it should be possible to put whole structure into FLASH.
- *
- * @note This type is early defined as incomplete type.
- * This is required for function declaration that takes the pointer
- * to this structure but in second hand - it is also placed inside
- * the instance structure.
- * @note The structure is defined in @file app_usbd_class_base.h.
- */
-typedef struct {} app_usbd_class_inst_t;
-#else
-typedef struct app_usbd_class_inst_s app_usbd_class_inst_t;
-#endif
-/**
- * @brief Endpoint callback function.
- *
- * The function used by every class instance.
- * @param[in,out] p_inst Instance of the class.
- * @param[in] p_event Event to process.
- *
- * @note If given event is not supported by class, return @ref NRF_ERROR_NOT_SUPPORTED
- */
-typedef ret_code_t (*app_usbd_ep_event_handler_t)(
- app_usbd_class_inst_t const * const p_inst,
- app_usbd_complex_evt_t const * const p_event
- );
-
-/**
- * @brief SOF interrupt callback function.
- *
- * @param[in] framecnt Number of current SOF frame.
- *
- * @sa app_usbd_class_sof_register
- */
-typedef void (*app_usbd_sof_interrupt_handler_t)(uint16_t framecnt);
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* APP_USBD_TYPES_H__ */
+/**
+ * Copyright (c) 2016 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef APP_USBD_TYPES_H__
+#define APP_USBD_TYPES_H__
+
+#include <stdint.h>
+
+#include "sdk_errors.h"
+#include "nrf_drv_usbd.h"
+#include "app_usbd_request.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup app_usbd_types USB Device high level library variable types definition
+ * @ingroup app_usbd
+ *
+ * @brief @tagAPI52840 All types used by @ref app_usbd are defined here.
+ * This helps to avoid cross referencing into types in different files.
+ * @{
+ */
+
+/**
+ * @brief Change given value to 2 digits in BCD notation.
+ *
+ * @param[in] val The decimal value to be converted in the range from 0 to 99.
+ * @return Calculated BCD value.
+ */
+#define APP_USBD_BCD_2_MAKE(val) ( \
+ ((((val) % 100) / 10) * 0x10) + \
+ ((((val) % 10) / 1) * 0x1) \
+ )
+
+/**
+ * @brief Change given decimal version values to 4 digits in BCD notation.
+ *
+ * USB specification uses 4 digits BCD version notation in many descriptors.
+ * This macro changes 3 values to 4 BCD digits (one 16 bit value)
+ * that describes version in USB standard.
+ *
+ * @param[in] major Major version.
+ * @param[in] minor Minor version.
+ * @param[in] sub Sub-minor version.
+ *
+ * @return Calculated 16 bit value with BCD representation of the version.
+ */
+#define APP_USBD_BCD_VER_MAKE(major, minor, sub) \
+ ((APP_USBD_BCD_2_MAKE(major) << 8) | (minor) << 4 | (sub))
+
+/**
+ * @brief Combine endpoint address and its interval.
+ *
+ * @param[in] address Endpoint address
+ * @param[in] interval Endpoint interval
+ * @return Combined address and interval.
+ */
+#define APP_USBD_EP_WITH_INTERVAL(address, interval) \
+ ((1UL << 16) | ((interval) << 8) | (address))
+
+#define APP_USBD_EXTRACT_INTERVAL_VALUE(combined) \
+ (((combined) & 0xFF00) >> 8)
+
+#define APP_USBD_EXTRACT_INTERVAL_FLAG(combined) \
+ (((combined) >> 16) & 0x01)
+
+/**
+ * @brief Events codes.
+ *
+ * Redefined application event codes.
+ */
+typedef enum
+{
+ APP_USBD_EVT_DRV_SOF = NRF_DRV_USBD_EVT_SOF, /**< See documentation for @ref NRF_DRV_USBD_EVT_SOF */
+ APP_USBD_EVT_DRV_RESET = NRF_DRV_USBD_EVT_RESET, /**< See documentation for @ref NRF_DRV_USBD_EVT_RESET */
+ APP_USBD_EVT_DRV_SUSPEND = NRF_DRV_USBD_EVT_SUSPEND, /**< See documentation for @ref NRF_DRV_USBD_EVT_SUSPEND */
+ APP_USBD_EVT_DRV_RESUME = NRF_DRV_USBD_EVT_RESUME, /**< See documentation for @ref NRF_DRV_USBD_EVT_RESUME */
+ APP_USBD_EVT_DRV_WUREQ = NRF_DRV_USBD_EVT_WUREQ, /**< See documentation for @ref NRF_DRV_USBD_EVT_WUREQ */
+ APP_USBD_EVT_DRV_SETUP = NRF_DRV_USBD_EVT_SETUP, /**< This event type has special structure. See @ref app_usbd_setup_evt_t */
+ APP_USBD_EVT_DRV_EPTRANSFER = NRF_DRV_USBD_EVT_EPTRANSFER, /**< See documentation for @ref NRF_DRV_USBD_EVT_EPTRANSFER */
+
+ APP_USBD_EVT_FIRST_POWER, /**< First power event code - for internal static assert checking */
+
+ APP_USBD_EVT_POWER_DETECTED, /**< See documentation for @ref NRF_DRV_POWER_USB_EVT_DETECTED */
+ APP_USBD_EVT_POWER_REMOVED, /**< See documentation for @ref NRF_DRV_POWER_USB_EVT_REMOVED */
+ APP_USBD_EVT_POWER_READY, /**< See documentation for @ref NRF_DRV_POWER_USB_EVT_READY */
+
+
+ APP_USBD_EVT_FIRST_APP, /**< First application event code - for internal static assert checking */
+
+ APP_USBD_EVT_INST_APPEND = APP_USBD_EVT_FIRST_APP, /**< The instance was attached to the library, any configuration action can be done now */
+ APP_USBD_EVT_INST_REMOVE, /**<
+ * The instance is going to be removed, this event is called just before removing the instance.
+ * This removing cannot be stopped.
+ */
+ APP_USBD_EVT_STARTED, /**< USBD library has just been started and functional - event passed to all instances, before USBD interrupts have been enabled */
+ APP_USBD_EVT_STOPPED, /**< USBD library has just been stopped and is not functional - event passed to all instances, after USBD interrupts have been disabled*/
+
+ APP_USBD_EVT_STATE_CHANGED, /**<
+ * Informs all the classes that base state has been changed.
+ * This event is processed before setup stage that caused the state change finishes (before acknowledging it).
+ */
+
+ APP_USBD_EVT_FIRST_INTERNAL = 0x80, /**< First internal event, used by the APP library internally. */
+
+ APP_USBD_EVT_HFCLK_READY = APP_USBD_EVT_FIRST_INTERNAL, /**< High frequency clock started */
+ APP_USBD_EVT_START_REQ, /**< Start requested */
+ APP_USBD_EVT_STOP_REQ, /**< Stop requested */
+ APP_USBD_EVT_SUSPEND_REQ, /**< Suspend request - HFCLK would be released and USBD peripheral clock would be disconnected */
+ APP_USBD_EVT_WAKEUP_REQ, /**< Wakeup request - start the whole wakeup generation. */
+ APP_USBD_EVT_SETUP_SETADDRESS, /**<
+ * Setup request to set address, separated from
+ * regular EVT_SETUP because this request is
+ * fully handled by hardware and for the software
+ * it is only a notification about what happened
+ */
+
+} app_usbd_event_type_t;
+
+
+
+/**
+ * @brief Specific application event structure.
+ *
+ * All the data required by the events that comes from the application level.
+ */
+typedef struct
+{
+ app_usbd_event_type_t type; //!< Event type
+} app_usbd_evt_t;
+
+/**
+ * @brief Specific application event structure with setup structure included.
+ *
+ * This event structure would be used when @ref APP_USBD_EVT_DRV_SETUP
+ * is passed to instance event handler.
+ */
+typedef struct
+{
+ app_usbd_event_type_t type; //!< Event type
+ app_usbd_setup_t setup; //!< Setup structure
+} app_usbd_setup_evt_t;
+
+
+/**
+ * @brief Complex event variable type.
+ *
+ * A variable that can store any kind of event.
+ */
+typedef union
+{
+ app_usbd_event_type_t type; //!< Event type
+ nrf_drv_usbd_evt_t drv_evt; //!< Events that comes directly from the driver.
+ /**< Use this event structure only for event
+ * type < @ref APP_USBD_EVT_FIRST_APP
+ */
+ app_usbd_setup_evt_t setup_evt; //!< Event structure with SETUP structure included.
+ /**< This structure is used in connection with
+ * @ref APP_USBD_EVT_DRV_SETUP
+ */
+ app_usbd_evt_t app_evt; //!< Events that comes from the application driver.
+ /**< Use this event structure only for event
+ * type >= @ref APP_USBD_EVT_FIRST_APP
+ */
+} app_usbd_complex_evt_t;
+
+
+/**
+ * @brief Internal event variable type.
+ *
+ * The variable type used for internal event processing.
+ * This kind of event is the one that goes into the event queue.
+ *
+ * @note There is no setup event structure.
+ * This structure would be created when setup event is processed.
+ * The reason for that is the fact that setup event structure has high memory printout.
+ */
+typedef union
+{
+ app_usbd_event_type_t type; //!< Event type
+ nrf_drv_usbd_evt_t drv_evt; //!< Events that comes directly from the driver.
+ /**< Use this event structure only for event
+ * type < @ref APP_USBD_EVT_FIRST_APP
+ */
+ app_usbd_evt_t app_evt; //!< Events that comes from the application driver.
+ /**< Use this event structure only for event
+ * type >= @ref APP_USBD_EVT_FIRST_APP
+ */
+} app_usbd_internal_evt_t;
+
+
+#ifdef DOXYGEN
+/**
+ * @brief Base instance of a USBD class.
+ *
+ * Any USBD class instance have to begin with this instance.
+ * This may then be followed by any implementation dependent data.
+ *
+ * For an instance it should be possible to put whole structure into FLASH.
+ *
+ * @note This type is early defined as incomplete type.
+ * This is required for function declaration that takes the pointer
+ * to this structure but in second hand - it is also placed inside
+ * the instance structure.
+ * @note The structure is defined in @file app_usbd_class_base.h.
+ */
+typedef struct {} app_usbd_class_inst_t;
+#else
+typedef struct app_usbd_class_inst_s app_usbd_class_inst_t;
+#endif
+/**
+ * @brief Endpoint callback function.
+ *
+ * The function used by every class instance.
+ * @param[in,out] p_inst Instance of the class.
+ * @param[in] p_event Event to process.
+ *
+ * @note If given event is not supported by class, return @ref NRF_ERROR_NOT_SUPPORTED
+ */
+typedef ret_code_t (*app_usbd_ep_event_handler_t)(
+ app_usbd_class_inst_t const * const p_inst,
+ app_usbd_complex_evt_t const * const p_event
+ );
+
+/**
+ * @brief SOF interrupt callback function.
+ *
+ * @param[in] framecnt Number of current SOF frame.
+ *
+ * @sa app_usbd_class_sof_register
+ */
+typedef void (*app_usbd_sof_interrupt_handler_t)(uint16_t framecnt);
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* APP_USBD_TYPES_H__ */
diff --git a/third_party/NordicSemiconductor/libraries/usb/class/cdc/acm/app_usbd_cdc_acm.c b/third_party/NordicSemiconductor/libraries/usb/class/cdc/acm/app_usbd_cdc_acm.c
index a151e60..249a909 100644
--- a/third_party/NordicSemiconductor/libraries/usb/class/cdc/acm/app_usbd_cdc_acm.c
+++ b/third_party/NordicSemiconductor/libraries/usb/class/cdc/acm/app_usbd_cdc_acm.c
@@ -1,1199 +1,1199 @@
-/**
- * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-#include "sdk_common.h"
-#if NRF_MODULE_ENABLED(APP_USBD_CDC_ACM)
-
-#include "app_usbd_cdc_acm.h"
-#include <inttypes.h>
-
-/**
- * @defgroup app_usbd_cdc_acm_internal CDC ACM internals
- * @{
- * @ingroup app_usbd_cdc
- * @internal
- */
-
-
-#define NRF_LOG_MODULE_NAME cdc_acm
-
-#if APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED
-#define NRF_LOG_LEVEL APP_USBD_CDC_ACM_CONFIG_LOG_LEVEL
-#define NRF_LOG_INFO_COLOR APP_USBD_CDC_ACM_CONFIG_INFO_COLOR
-#define NRF_LOG_DEBUG_COLOR APP_USBD_CDC_ACM_CONFIG_DEBUG_COLOR
-#else //APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED
-#define NRF_LOG_LEVEL 0
-#endif //APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED
-#include "nrf_log.h"
-NRF_LOG_MODULE_REGISTER();
-
-#define APP_USBD_CDC_ACM_COMM_IFACE_IDX 0 /**< CDC ACM class comm interface index. */
-#define APP_USBD_CDC_ACM_DATA_IFACE_IDX 1 /**< CDC ACM class data interface index. */
-
-#define APP_USBD_CDC_ACM_COMM_EPIN_IDX 0 /**< CDC ACM comm class endpoint IN index. */
-#define APP_USBD_CDC_ACM_DATA_EPIN_IDX 0 /**< CDC ACM data class endpoint IN index. */
-#define APP_USBD_CDC_ACM_DATA_EPOUT_IDX 1 /**< CDC ACM data class endpoint OUT index. */
-
-/**
- * @brief Auxiliary function to access cdc_acm class instance data.
- *
- * @param[in] p_inst Class instance data.
- *
- * @return CDC ACM class instance.
- */
-static inline app_usbd_cdc_acm_t const * cdc_acm_get(app_usbd_class_inst_t const * p_inst)
-{
- ASSERT(p_inst != NULL);
- return (app_usbd_cdc_acm_t const *)p_inst;
-}
-
-/**
- * @brief Auxiliary function to access cdc_acm class context data.
- *
- * @param[in] p_cdc_acm CDC ACM class instance data.
- *
- * @return CDC ACM class instance context.
- */
-static inline app_usbd_cdc_acm_ctx_t * cdc_acm_ctx_get(app_usbd_cdc_acm_t const * p_cdc_acm)
-{
- ASSERT(p_cdc_acm != NULL);
- ASSERT(p_cdc_acm->specific.p_data != NULL);
- return &p_cdc_acm->specific.p_data->ctx;
-}
-
-/**
- * @brief User event handler.
- *
- * @param[in] p_inst Class instance.
- * @param[in] event user Event type.
- */
-static inline void user_event_handler(app_usbd_class_inst_t const * p_inst,
- app_usbd_cdc_acm_user_event_t event)
-{
- app_usbd_cdc_acm_t const * p_cdc_acm = cdc_acm_get(p_inst);
- if (p_cdc_acm->specific.inst.user_ev_handler != NULL)
- {
- p_cdc_acm->specific.inst.user_ev_handler(p_inst, event);
- }
-}
-
-/**
- * @brief Auxiliary function to access CDC ACM COMM IN endpoint address.
- *
- * @param[in] p_inst Class instance data.
- *
- * @return IN endpoint address.
- */
-static inline nrf_drv_usbd_ep_t comm_ep_in_addr_get(app_usbd_class_inst_t const * p_inst)
-{
- app_usbd_class_iface_conf_t const * class_iface;
- class_iface = app_usbd_class_iface_get(p_inst, APP_USBD_CDC_ACM_COMM_IFACE_IDX);
-
- app_usbd_class_ep_conf_t const * ep_cfg;
- ep_cfg = app_usbd_class_iface_ep_get(class_iface, APP_USBD_CDC_ACM_COMM_EPIN_IDX);
-
- return app_usbd_class_ep_address_get(ep_cfg);
-}
-
-/**
- * @brief Auxiliary function to access CDC ACM DATA IN endpoint address.
- *
- * @param[in] p_inst Class instance data.
- *
- * @return IN endpoint address.
- */
-static inline nrf_drv_usbd_ep_t data_ep_in_addr_get(app_usbd_class_inst_t const * p_inst)
-{
- app_usbd_class_iface_conf_t const * class_iface;
- class_iface = app_usbd_class_iface_get(p_inst, APP_USBD_CDC_ACM_DATA_IFACE_IDX);
-
- app_usbd_class_ep_conf_t const * ep_cfg;
- ep_cfg = app_usbd_class_iface_ep_get(class_iface, APP_USBD_CDC_ACM_DATA_EPIN_IDX);
-
- return app_usbd_class_ep_address_get(ep_cfg);
-}
-
-/**
- * @brief Auxiliary function to access CDC ACM DATA OUT endpoint address.
- *
- * @param[in] p_inst Class instance data.
- *
- * @return OUT endpoint address.
- */
-static inline nrf_drv_usbd_ep_t data_ep_out_addr_get(app_usbd_class_inst_t const * p_inst)
-{
- app_usbd_class_iface_conf_t const * class_iface;
- class_iface = app_usbd_class_iface_get(p_inst, APP_USBD_CDC_ACM_DATA_IFACE_IDX);
-
- app_usbd_class_ep_conf_t const * ep_cfg;
- ep_cfg = app_usbd_class_iface_ep_get(class_iface, APP_USBD_CDC_ACM_DATA_EPOUT_IDX);
-
- return app_usbd_class_ep_address_get(ep_cfg);
-}
-
-/**
- * @brief Internal SETUP standard IN request handler.
- *
- * @param[in] p_inst Generic class instance.
- * @param[in] p_setup_ev Setup event.
- *
- * @return Standard error code.
- */
-static ret_code_t setup_req_std_in(app_usbd_class_inst_t const * p_inst,
- app_usbd_setup_evt_t const * p_setup_ev)
-{
- /* Only Get Descriptor standard IN request is supported by CDC class */
- if ((app_usbd_setup_req_rec(p_setup_ev->setup.bmRequestType) == APP_USBD_SETUP_REQREC_INTERFACE)
- &&
- (p_setup_ev->setup.bmRequest == APP_USBD_SETUP_STDREQ_GET_DESCRIPTOR))
- {
- size_t dsc_len = 0;
- size_t max_size;
-
- uint8_t * p_trans_buff = app_usbd_core_setup_transfer_buff_get(&max_size);
-
- /* Try to find descriptor in class internals*/
- ret_code_t ret = app_usbd_class_descriptor_find(
- p_inst,
- p_setup_ev->setup.wValue.hb,
- p_setup_ev->setup.wValue.lb,
- p_trans_buff,
- &dsc_len);
-
- if (ret != NRF_ERROR_NOT_FOUND)
- {
- ASSERT(dsc_len < NRF_DRV_USBD_EPSIZE);
- return app_usbd_core_setup_rsp(&(p_setup_ev->setup), p_trans_buff, dsc_len);
- }
- }
-
- return NRF_ERROR_NOT_SUPPORTED;
-}
-
-/**
- * @brief Internal SETUP standard OUT request handler.
- *
- * @param[in] p_inst Generic class instance.
- * @param[in] p_setup_ev Setup event.
- *
- * @return Standard error code.
- */
-static ret_code_t setup_req_std_out(app_usbd_class_inst_t const * p_inst,
- app_usbd_setup_evt_t const * p_setup_ev)
-{
-
- switch (p_setup_ev->setup.bmRequest)
- {
- default:
- break;
- }
-
- return NRF_ERROR_NOT_SUPPORTED;
-}
-
-/**
- * @brief Internal SETUP class IN request handler.
- *
- * @param[in] p_inst Generic class instance.
- * @param[in] p_setup_ev Setup event.
- *
- * @return Standard error code.
- */
-static ret_code_t setup_req_class_in(app_usbd_class_inst_t const * p_inst,
- app_usbd_setup_evt_t const * p_setup_ev)
-{
- app_usbd_cdc_acm_t const * p_cdc_acm = cdc_acm_get(p_inst);
- app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
-
- switch (p_setup_ev->setup.bmRequest)
- {
- case APP_USBD_CDC_REQ_GET_LINE_CODING:
- {
- if (p_setup_ev->setup.wLength.w != sizeof(app_usbd_cdc_line_coding_t))
- {
- return NRF_ERROR_NOT_SUPPORTED;
- }
-
- return app_usbd_core_setup_rsp(&p_setup_ev->setup,
- &p_cdc_acm_ctx->line_coding,
- sizeof(app_usbd_cdc_line_coding_t));
- }
- default:
- break;
- }
-
- return NRF_ERROR_NOT_SUPPORTED;
-}
-
-/**
- * @brief Class specific OUT request data callback.
- *
- * @param status Endpoint status.
- * @param p_context Context of transfer (set by @ref app_usbd_core_setup_data_handler_set).
- *
- * @return Standard error code.
- */
-static ret_code_t cdc_acm_req_out_data_cb(nrf_drv_usbd_ep_status_t status, void * p_context)
-{
- if (status != NRF_USBD_EP_OK)
- {
- return NRF_ERROR_INTERNAL;
- }
-
- app_usbd_cdc_acm_t const * p_cdc_acm = p_context;
- app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
-
- switch (p_cdc_acm_ctx->request.type)
- {
- case APP_USBD_CDC_REQ_SET_LINE_CODING:
- {
- memcpy(&p_cdc_acm_ctx->line_coding,
- &p_cdc_acm_ctx->request.payload.line_coding,
- sizeof(app_usbd_cdc_line_coding_t));
-
- NRF_LOG_INFO("REQ_SET_LINE_CODING: baudrate: %"PRIu32", databits: %u, "
- "format: %u, parity: %u",
- uint32_decode(p_cdc_acm_ctx->line_coding.dwDTERate),
- p_cdc_acm_ctx->line_coding.bDataBits,
- p_cdc_acm_ctx->line_coding.bCharFormat,
- p_cdc_acm_ctx->line_coding.bParityType);
- break;
- }
- default:
- return NRF_ERROR_NOT_SUPPORTED;
- }
-
- return NRF_SUCCESS;
-}
-
-
-/**
- * @brief Class specific request data stage setup.
- *
- * @param[in] p_inst Generic class instance.
- * @param[in] p_setup_ev Setup event.
- *
- * @return Standard error code.
- */
-static ret_code_t cdc_acm_req_out_datastage(app_usbd_class_inst_t const * p_inst,
- app_usbd_setup_evt_t const * p_setup_ev)
-{
- app_usbd_cdc_acm_t const * p_cdc_acm = cdc_acm_get(p_inst);
- app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
-
- p_cdc_acm_ctx->request.type = p_setup_ev->setup.bmRequest;
- p_cdc_acm_ctx->request.len = p_setup_ev->setup.wLength.w;
-
- /*Request setup data*/
- NRF_DRV_USBD_TRANSFER_OUT(transfer,
- &p_cdc_acm_ctx->request.payload,
- p_cdc_acm_ctx->request.len);
- ret_code_t ret;
- CRITICAL_REGION_ENTER();
- ret = app_usbd_ep_transfer(NRF_DRV_USBD_EPOUT0, &transfer);
- if (ret == NRF_SUCCESS)
- {
- const app_usbd_core_setup_data_handler_desc_t desc = {
- .handler = cdc_acm_req_out_data_cb,
- .p_context = (void*)p_cdc_acm
- };
-
- ret = app_usbd_core_setup_data_handler_set(NRF_DRV_USBD_EPOUT0, &desc);
- }
- CRITICAL_REGION_EXIT();
-
- return ret;
-}
-
-/**
- * @brief Reset port to default state.
- *
- * @param p_inst Generic class instance.
- */
-static void cdc_acm_reset_port(app_usbd_class_inst_t const * p_inst)
-{
- app_usbd_cdc_acm_t const * p_cdc_acm = cdc_acm_get(p_inst);
- app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
-
- p_cdc_acm_ctx->line_state = 0;
-
- // Set rx transfers configuration to default state.
- p_cdc_acm_ctx->rx_transfer[0].p_buf = NULL;
- p_cdc_acm_ctx->rx_transfer[1].p_buf = NULL;
- p_cdc_acm_ctx->bytes_left = 0;
- p_cdc_acm_ctx->bytes_read = 0;
- p_cdc_acm_ctx->last_read = 0;
- p_cdc_acm_ctx->cur_read = 0;
- p_cdc_acm_ctx->p_copy_pos = p_cdc_acm_ctx->internal_rx_buf;
-}
-
-/**
- * @brief Internal SETUP class OUT request handler.
- *
- * @param[in] p_inst Generic class instance.
- * @param[in] p_setup_ev Setup event.
- *
- * @return Standard error code.
- */
-static ret_code_t setup_req_class_out(app_usbd_class_inst_t const * p_inst,
- app_usbd_setup_evt_t const * p_setup_ev)
-{
- app_usbd_cdc_acm_t const * p_cdc_acm = cdc_acm_get(p_inst);
- app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
-
- switch (p_setup_ev->setup.bmRequest)
- {
- case APP_USBD_CDC_REQ_SET_LINE_CODING:
- {
- if (p_setup_ev->setup.wLength.w != sizeof(app_usbd_cdc_line_coding_t))
- {
- return NRF_ERROR_NOT_SUPPORTED;
- }
-
- return cdc_acm_req_out_datastage(p_inst, p_setup_ev);
- }
- case APP_USBD_CDC_REQ_SET_CONTROL_LINE_STATE:
- {
- if (p_setup_ev->setup.wLength.w != 0)
- {
- return NRF_ERROR_NOT_SUPPORTED;
- }
-
- NRF_LOG_INFO("REQ_SET_CONTROL_LINE_STATE: 0x%x", p_setup_ev->setup.wValue.w);
-
- bool old_dtr = (p_cdc_acm_ctx->line_state & APP_USBD_CDC_ACM_LINE_STATE_DTR) ?
- true : false;
- p_cdc_acm_ctx->line_state = p_setup_ev->setup.wValue.w;
-
- bool new_dtr = (p_cdc_acm_ctx->line_state & APP_USBD_CDC_ACM_LINE_STATE_DTR) ?
- true : false;
-
- if (old_dtr == new_dtr)
- {
- return NRF_SUCCESS;
- }
-
- const app_usbd_cdc_acm_user_event_t ev = new_dtr ?
- APP_USBD_CDC_ACM_USER_EVT_PORT_OPEN : APP_USBD_CDC_ACM_USER_EVT_PORT_CLOSE;
-
- user_event_handler(p_inst, ev);
-
- if (!new_dtr)
- {
- /*Abort DATA endpoints on port close */
- nrf_drv_usbd_ep_t ep;
- ep = data_ep_in_addr_get(p_inst);
- nrf_drv_usbd_ep_abort(ep);
- ep = data_ep_out_addr_get(p_inst);
- nrf_drv_usbd_ep_abort(ep);
-
- // Set rx transfers configuration to default state.
- p_cdc_acm_ctx->rx_transfer[0].p_buf = NULL;
- p_cdc_acm_ctx->rx_transfer[1].p_buf = NULL;
- p_cdc_acm_ctx->bytes_left = 0;
- p_cdc_acm_ctx->bytes_read = 0;
- p_cdc_acm_ctx->last_read = 0;
- p_cdc_acm_ctx->cur_read = 0;
- p_cdc_acm_ctx->p_copy_pos = p_cdc_acm_ctx->internal_rx_buf;
- }
-
- return NRF_SUCCESS;
- }
- default:
- break;
- }
-
- return NRF_ERROR_NOT_SUPPORTED;
-}
-
-/**
- * @brief Control endpoint handler.
- *
- * @param[in] p_inst Generic class instance.
- * @param[in] p_setup_ev Setup event.
- *
- * @return Standard error code.
- */
-static ret_code_t setup_event_handler(app_usbd_class_inst_t const * p_inst,
- app_usbd_setup_evt_t const * p_setup_ev)
-{
- ASSERT(p_inst != NULL);
- ASSERT(p_setup_ev != NULL);
-
- if (app_usbd_setup_req_dir(p_setup_ev->setup.bmRequestType) == APP_USBD_SETUP_REQDIR_IN)
- {
- switch (app_usbd_setup_req_typ(p_setup_ev->setup.bmRequestType))
- {
- case APP_USBD_SETUP_REQTYPE_STD:
- return setup_req_std_in(p_inst, p_setup_ev);
- case APP_USBD_SETUP_REQTYPE_CLASS:
- return setup_req_class_in(p_inst, p_setup_ev);
- default:
- break;
- }
- }
- else /*APP_USBD_SETUP_REQDIR_OUT*/
- {
- switch (app_usbd_setup_req_typ(p_setup_ev->setup.bmRequestType))
- {
- case APP_USBD_SETUP_REQTYPE_STD:
- return setup_req_std_out(p_inst, p_setup_ev);
- case APP_USBD_SETUP_REQTYPE_CLASS:
- return setup_req_class_out(p_inst, p_setup_ev);
- default:
- break;
- }
- }
-
- return NRF_ERROR_NOT_SUPPORTED;
-}
-
-
-/**
- * @brief CDC ACM consumer.
- *
- * @note See @ref nrf_drv_usbd_consumer_t
- */
-static bool cdc_acm_consumer(nrf_drv_usbd_ep_transfer_t * p_next,
- void * p_context,
- size_t ep_size,
- size_t data_size)
-{
- app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = (app_usbd_cdc_acm_ctx_t *) p_context;
- p_next->size = data_size;
-
- if (data_size <= p_cdc_acm_ctx->rx_transfer[0].read_left)
- {
- p_next->p_data.rx = p_cdc_acm_ctx->rx_transfer[0].p_buf;
-
- p_cdc_acm_ctx->rx_transfer[0].p_buf += data_size;
- p_cdc_acm_ctx->bytes_read += data_size;
- p_cdc_acm_ctx->rx_transfer[0].read_left -= data_size;
- NRF_LOG_DEBUG("Received %d bytes. Space left in user buffer: %d bytes.",
- data_size,
- p_cdc_acm_ctx->rx_transfer[0].read_left);
- return (p_cdc_acm_ctx->rx_transfer[0].read_left) != 0;
- }
- else
- {
- p_next->p_data.rx = p_cdc_acm_ctx->internal_rx_buf;
-
- p_cdc_acm_ctx->cur_read = data_size;
- NRF_LOG_DEBUG("Received %d bytes. Stored in internal buffer.", data_size);
- return false;
- }
-}
-
-/**
- * @brief CDC ACM single transfer consumer.
- *
- * This function finalizes transfer after any received block.
- *
- * @note See @ref nrf_drv_usbd_consumer_t
- */
-static bool cdc_acm_single_shoot_consumer(nrf_drv_usbd_ep_transfer_t * p_next,
- void * p_context,
- size_t ep_size,
- size_t data_size)
-{
- app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = (app_usbd_cdc_acm_ctx_t *) p_context;
- p_next->size = data_size;
-
- if (data_size <= p_cdc_acm_ctx->rx_transfer[0].read_left)
- {
- p_next->p_data.rx = p_cdc_acm_ctx->rx_transfer[0].p_buf;
-
- p_cdc_acm_ctx->bytes_read = data_size;
- p_cdc_acm_ctx->rx_transfer[0].read_left = data_size;
- NRF_LOG_DEBUG("Received %d bytes. Space left in user buffer: %d bytes.",
- data_size,
- p_cdc_acm_ctx->rx_transfer[0].read_left);
- }
- else
- {
- p_next->p_data.rx = p_cdc_acm_ctx->internal_rx_buf;
- p_cdc_acm_ctx->cur_read = data_size;
- NRF_LOG_DEBUG("Received %d bytes. Stored in internal buffer.", data_size);
- }
-
- return false;
-}
-
-/**
- * @brief Manage switching between user buffers and copying data from internal buffer.
- *
- * @param p_inst Generic USB class instance.
- *
- * @return Standard error code.
- */
-static ret_code_t cdc_acm_rx_block_finished(app_usbd_class_inst_t const * p_inst)
-{
- app_usbd_cdc_acm_t const * p_cdc_acm = cdc_acm_get(p_inst);
- app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
- nrf_drv_usbd_ep_t ep = data_ep_out_addr_get(p_inst);
-
- nrf_drv_usbd_handler_desc_t handler_desc = {
- .handler.consumer = cdc_acm_consumer,
- .p_context = p_cdc_acm_ctx
- };
-
- if (p_cdc_acm_ctx->rx_transfer[0].read_left == 0) // Buffer completely filled by consumer
- {
- p_cdc_acm_ctx->last_read = p_cdc_acm_ctx->bytes_read;
- p_cdc_acm_ctx->bytes_read = 0;
- p_cdc_acm_ctx->bytes_left = 0;
-
- if (p_cdc_acm_ctx->rx_transfer[1].p_buf != NULL)
- {
- p_cdc_acm_ctx->rx_transfer[0] = p_cdc_acm_ctx->rx_transfer[1];
- p_cdc_acm_ctx->rx_transfer[1].p_buf = NULL;
- return app_usbd_ep_handled_transfer(ep, &handler_desc);
- }
- else
- {
- p_cdc_acm_ctx->rx_transfer[0].p_buf = NULL;
- return NRF_SUCCESS;
- }
- }
-
- size_t bytes_read = p_cdc_acm_ctx->cur_read;
- size_t bytes_to_cpy = bytes_read;
-
- if (bytes_read > p_cdc_acm_ctx->rx_transfer[0].read_left)
- {
- bytes_to_cpy = p_cdc_acm_ctx->rx_transfer[0].read_left;
- }
- memcpy(p_cdc_acm_ctx->rx_transfer[0].p_buf,
- p_cdc_acm_ctx->internal_rx_buf,
- bytes_to_cpy);
-
- // First buffer is full
- p_cdc_acm_ctx->last_read = p_cdc_acm_ctx->bytes_read + bytes_to_cpy;
- p_cdc_acm_ctx->bytes_read = 0;
- p_cdc_acm_ctx->bytes_left = bytes_read - bytes_to_cpy;
- p_cdc_acm_ctx->p_copy_pos = p_cdc_acm_ctx->internal_rx_buf + bytes_to_cpy;
-
- if (p_cdc_acm_ctx->rx_transfer[1].p_buf != NULL)
- {
- // If there is second transfer, copy it to first
- p_cdc_acm_ctx->rx_transfer[0] = p_cdc_acm_ctx->rx_transfer[1];
- p_cdc_acm_ctx->rx_transfer[1].p_buf = NULL;
-
- while (p_cdc_acm_ctx->bytes_left > 0)
- {
-
- if (p_cdc_acm_ctx->bytes_left >= p_cdc_acm_ctx->rx_transfer[0].read_left)
- {
- // If there are enough bytes left in internal buffer to completely fill next transfer,
- // we call user event handler to obtain next buffer and continue double buffering.
- memcpy(p_cdc_acm_ctx->rx_transfer[0].p_buf,
- p_cdc_acm_ctx->p_copy_pos,
- p_cdc_acm_ctx->rx_transfer[0].read_left);
-
- p_cdc_acm_ctx->bytes_left -= p_cdc_acm_ctx->rx_transfer[0].read_left;
- p_cdc_acm_ctx->p_copy_pos += p_cdc_acm_ctx->rx_transfer[0].read_left;
- p_cdc_acm_ctx->last_read = p_cdc_acm_ctx->rx_transfer[0].read_left;
- user_event_handler(p_inst, APP_USBD_CDC_ACM_USER_EVT_RX_DONE);
-
- if (p_cdc_acm_ctx->rx_transfer[1].p_buf != NULL)
- {
- p_cdc_acm_ctx->rx_transfer[0] = p_cdc_acm_ctx->rx_transfer[1];
- p_cdc_acm_ctx->rx_transfer[1].p_buf = NULL;
- }
- else
- {
- // If user does not specify a second buffer, all data transfers are done
- // and data left in internal buffer is lost.
- p_cdc_acm_ctx->rx_transfer[0].p_buf = NULL;
- break;
- }
- }
- else
- {
- memcpy(p_cdc_acm_ctx->rx_transfer[0].p_buf,
- p_cdc_acm_ctx->p_copy_pos,
- p_cdc_acm_ctx->bytes_left);
- p_cdc_acm_ctx->bytes_read = p_cdc_acm_ctx->bytes_left;
-
- p_cdc_acm_ctx->rx_transfer[0].read_left -= p_cdc_acm_ctx->bytes_left;
- p_cdc_acm_ctx->rx_transfer[0].p_buf += p_cdc_acm_ctx->bytes_left;
- break;
- }
- }
-
-
- }
- else
- {
- p_cdc_acm_ctx->rx_transfer[0].p_buf = NULL;
- }
-
- if (p_cdc_acm_ctx->rx_transfer[0].p_buf != NULL)
- {
- return app_usbd_ep_handled_transfer(ep, &handler_desc);
- }
- return NRF_SUCCESS;
-}
-
-/**
- * @brief Class specific endpoint transfer handler.
- *
- * @param[in] p_inst Generic class instance.
- * @param[in] p_setup_ev Setup event.
- *
- * @return Standard error code.
- */
-static ret_code_t cdc_acm_endpoint_ev(app_usbd_class_inst_t const * p_inst,
- app_usbd_complex_evt_t const * p_event)
-{
- if (comm_ep_in_addr_get(p_inst) == p_event->drv_evt.data.eptransfer.ep)
- {
- NRF_LOG_INFO("EPIN_COMM: notify");
- return NRF_SUCCESS;
- }
- ret_code_t ret;
- if (NRF_USBD_EPIN_CHECK(p_event->drv_evt.data.eptransfer.ep))
- {
- switch (p_event->drv_evt.data.eptransfer.status)
- {
- case NRF_USBD_EP_OK:
- NRF_LOG_INFO("EPIN_DATA: %02x done", p_event->drv_evt.data.eptransfer.ep);
- user_event_handler(p_inst, APP_USBD_CDC_ACM_USER_EVT_TX_DONE);
- return NRF_SUCCESS;
- case NRF_USBD_EP_ABORTED:
- return NRF_SUCCESS;
- default:
- return NRF_ERROR_INTERNAL;
- }
- }
-
- if (NRF_USBD_EPOUT_CHECK(p_event->drv_evt.data.eptransfer.ep))
- {
- switch (p_event->drv_evt.data.eptransfer.status)
- {
- case NRF_USBD_EP_OK:
- ret = cdc_acm_rx_block_finished(p_inst);
- NRF_LOG_INFO("EPOUT_DATA: %02x done", p_event->drv_evt.data.eptransfer.ep);
- user_event_handler(p_inst, APP_USBD_CDC_ACM_USER_EVT_RX_DONE);
- return ret;
- case NRF_USBD_EP_WAITING:
- case NRF_USBD_EP_ABORTED:
- return NRF_SUCCESS;
- default:
- return NRF_ERROR_INTERNAL;
- }
- }
-
- return NRF_ERROR_NOT_SUPPORTED;
-}
-
-
-/**
- * @brief @ref app_usbd_class_methods_t::event_handler
- */
-static ret_code_t cdc_acm_event_handler(app_usbd_class_inst_t const * p_inst,
- app_usbd_complex_evt_t const * p_event)
-{
- ASSERT(p_inst != NULL);
- ASSERT(p_event != NULL);
-
- ret_code_t ret = NRF_SUCCESS;
- switch (p_event->app_evt.type)
- {
- case APP_USBD_EVT_DRV_SOF:
- break;
- case APP_USBD_EVT_DRV_RESET:
- cdc_acm_reset_port(p_inst);
- break;
- case APP_USBD_EVT_DRV_SETUP:
- ret = setup_event_handler(p_inst, (app_usbd_setup_evt_t const *)p_event);
- break;
- case APP_USBD_EVT_DRV_EPTRANSFER:
- ret = cdc_acm_endpoint_ev(p_inst, p_event);
- break;
- case APP_USBD_EVT_DRV_SUSPEND:
- break;
- case APP_USBD_EVT_DRV_RESUME:
- break;
- case APP_USBD_EVT_INST_APPEND:
- break;
- case APP_USBD_EVT_INST_REMOVE:
- break;
- case APP_USBD_EVT_STARTED:
- break;
- case APP_USBD_EVT_STOPPED:
- break;
- case APP_USBD_EVT_POWER_REMOVED:
- cdc_acm_reset_port(p_inst);
- break;
- default:
- ret = NRF_ERROR_NOT_SUPPORTED;
- break;
- }
-
- return ret;
-}
-
-
-static bool cdc_acm_feed_descriptors(app_usbd_class_descriptor_ctx_t * p_ctx,
- app_usbd_class_inst_t const * p_inst,
- uint8_t * p_buff,
- size_t max_size)
-{
- static uint8_t ifaces = 0;
- ifaces = app_usbd_class_iface_count_get(p_inst);
- app_usbd_cdc_acm_t const * p_cdc_acm = cdc_acm_get(p_inst);
-
- APP_USBD_CLASS_DESCRIPTOR_BEGIN(p_ctx, p_buff, max_size);
-
- /* INTERFACE ASSOCIATION DESCRIPTOR */
- APP_USBD_CLASS_DESCRIPTOR_WRITE(0x08); // bLength
- APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_DESCRIPTOR_INTERFACE_ASSOCIATION); // bDescriptorType = Interface Association
- APP_USBD_CLASS_DESCRIPTOR_WRITE(p_cdc_acm->specific.inst.comm_interface); // bFirstInterface
- APP_USBD_CLASS_DESCRIPTOR_WRITE(0x02); // bInterfaceCount
- APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_CDC_COMM_CLASS); // bFunctionClass
- APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_CDC_SUBCLASS_ACM); // bFunctionSubClass
- APP_USBD_CLASS_DESCRIPTOR_WRITE(p_cdc_acm->specific.inst.protocol); // bFunctionProtocol
- APP_USBD_CLASS_DESCRIPTOR_WRITE(0x00); // iFunction
-
- static uint8_t i = 0;
-
- for (i = 0; i < ifaces; i++)
- {
- /* INTERFACE DESCRIPTOR */
- APP_USBD_CLASS_DESCRIPTOR_WRITE(0x09); // bLength
- APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_DESCRIPTOR_INTERFACE); // bDescriptorType = Interface
-
- static app_usbd_class_iface_conf_t const * p_cur_iface = NULL;
- p_cur_iface = app_usbd_class_iface_get(p_inst, i);
-
- APP_USBD_CLASS_DESCRIPTOR_WRITE(app_usbd_class_iface_number_get(p_cur_iface)); // bInterfaceNumber
- APP_USBD_CLASS_DESCRIPTOR_WRITE(0x00); // bAlternateSetting
- APP_USBD_CLASS_DESCRIPTOR_WRITE(app_usbd_class_iface_ep_count_get(p_cur_iface)); // bNumEndpoints
-
- if (p_cdc_acm->specific.inst.comm_interface == app_usbd_class_iface_number_get(p_cur_iface))
- {
- APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_CDC_COMM_CLASS); // bInterfaceClass = CDC COMM
- APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_CDC_SUBCLASS_ACM); // bInterfaceSubclass
- APP_USBD_CLASS_DESCRIPTOR_WRITE(p_cdc_acm->specific.inst.protocol); // bInterfaceProtocol
- }
- else if (p_cdc_acm->specific.inst.data_interface ==
- app_usbd_class_iface_number_get(p_cur_iface))
- {
- APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_CDC_DATA_CLASS); // bInterfaceClass = CDC DATA
- APP_USBD_CLASS_DESCRIPTOR_WRITE(0x00); // bInterfaceSubclass
- APP_USBD_CLASS_DESCRIPTOR_WRITE(0x00); // bInterfaceProtocol
- }
- else
- {
- ASSERT(0);
- }
-
- APP_USBD_CLASS_DESCRIPTOR_WRITE(0x00); // iInterface
-
- if (p_cdc_acm->specific.inst.comm_interface == app_usbd_class_iface_number_get(p_cur_iface))
- {
- /* HEADER DESCRIPTOR */
- APP_USBD_CLASS_DESCRIPTOR_WRITE(0x05); // bLength
- APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_CDC_CS_INTERFACE); // bDescriptorType = Class Specific Interface
- APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_CDC_SCS_HEADER); // bDescriptorSubtype = Header Functional Descriptor
- APP_USBD_CLASS_DESCRIPTOR_WRITE(0x10); // bcdCDC LSB
- APP_USBD_CLASS_DESCRIPTOR_WRITE(0x01); // bcdCDC MSB
-
- /* CALL MANAGEMENT DESCRIPTOR */
- APP_USBD_CLASS_DESCRIPTOR_WRITE(0x05); // bLength
- APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_CDC_CS_INTERFACE); // bDescriptorType = Class Specific Interface
- APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_CDC_SCS_CALL_MGMT); // bDescriptorSubtype = Call Management Functional Descriptor
- APP_USBD_CLASS_DESCRIPTOR_WRITE(0x03); // bmCapabilities
- APP_USBD_CLASS_DESCRIPTOR_WRITE(p_cdc_acm->specific.inst.data_interface); // bDataInterface
-
- /* ABSTRACT CONTROL MANAGEMENT DESCRIPTOR */
- APP_USBD_CLASS_DESCRIPTOR_WRITE(0x04); // bLength
- APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_CDC_CS_INTERFACE); // bDescriptorType = Class Specific Interface
- APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_CDC_SCS_ACM); // bDescriptorSubtype = Abstract Control Management Functional Descriptor
- APP_USBD_CLASS_DESCRIPTOR_WRITE(0x02); // bmCapabilities
-
- /* UNION DESCRIPTOR */
- APP_USBD_CLASS_DESCRIPTOR_WRITE(0x05);
- APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_CDC_CS_INTERFACE); // bDescriptorType = Class Specific Interface
- APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_CDC_SCS_UNION); // bDescriptorSubtype = Union Functional Descriptor
- APP_USBD_CLASS_DESCRIPTOR_WRITE(p_cdc_acm->specific.inst.comm_interface); // bControlInterface
- APP_USBD_CLASS_DESCRIPTOR_WRITE(p_cdc_acm->specific.inst.data_interface); // bSubordinateInterface
- }
- else if (p_cdc_acm->specific.inst.data_interface ==
- app_usbd_class_iface_number_get(p_cur_iface))
- {
- ;
- }
- else
- {
- ASSERT(0);
- }
-
- /* ENDPOINT DESCRIPTORS */
- static uint8_t endpoints = 0;
- endpoints = app_usbd_class_iface_ep_count_get(p_cur_iface);
-
- static uint8_t j = 0;
-
- for (j = 0; j < endpoints; j++)
- {
- APP_USBD_CLASS_DESCRIPTOR_WRITE(0x07); // bLength
- APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_DESCRIPTOR_ENDPOINT); // bDescriptorType = Endpoint
-
- static app_usbd_class_ep_conf_t const * p_cur_ep = NULL;
- p_cur_ep = app_usbd_class_iface_ep_get(p_cur_iface, j);
- APP_USBD_CLASS_DESCRIPTOR_WRITE(app_usbd_class_ep_address_get(p_cur_ep)); // bEndpointAddress
-
- if (p_cdc_acm->specific.inst.comm_interface ==
- app_usbd_class_iface_number_get(p_cur_iface))
- {
- APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_INTERRUPT); // bmAttributes
- }
- else if (p_cdc_acm->specific.inst.data_interface ==
- app_usbd_class_iface_number_get(p_cur_iface))
- {
- APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_BULK); // bmAttributes
- }
- else
- {
- ASSERT(0);
- }
-
- APP_USBD_CLASS_DESCRIPTOR_WRITE(LSB_16(NRF_DRV_USBD_EPSIZE)); // wMaxPacketSize LSB
- APP_USBD_CLASS_DESCRIPTOR_WRITE(MSB_16(NRF_DRV_USBD_EPSIZE)); // wMaxPacketSize MSB
-
- if (p_cdc_acm->specific.inst.comm_interface ==
- app_usbd_class_iface_number_get(p_cur_iface))
- {
- APP_USBD_CLASS_DESCRIPTOR_WRITE(p_cdc_acm->specific.inst.p_ep_interval[0]); // bInterval
- }
- else if (p_cdc_acm->specific.inst.data_interface ==
- app_usbd_class_iface_number_get(p_cur_iface))
- {
- APP_USBD_CLASS_DESCRIPTOR_WRITE(0x00); // bInterval
- }
- else
- {
- ASSERT(0);
- }
-
- }
-
- }
-
- APP_USBD_CLASS_DESCRIPTOR_END();
-}
-
-/**
- * @brief Public cdc_acm class interface.
- *
- */
-const app_usbd_class_methods_t app_usbd_cdc_acm_class_methods = {
- .event_handler = cdc_acm_event_handler,
- .feed_descriptors = cdc_acm_feed_descriptors,
-};
-
-/** @} */
-
-ret_code_t app_usbd_cdc_acm_write(app_usbd_cdc_acm_t const * p_cdc_acm,
- const void * p_buf,
- size_t length)
-{
- app_usbd_class_inst_t const * p_inst = app_usbd_cdc_acm_class_inst_get(p_cdc_acm);
- app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
-
- bool dtr_state = (p_cdc_acm_ctx->line_state & APP_USBD_CDC_ACM_LINE_STATE_DTR) ?
- true : false;
- if (!dtr_state)
- {
- /*Port is not opened*/
- return NRF_ERROR_INVALID_STATE;
- }
-
- nrf_drv_usbd_ep_t ep = data_ep_in_addr_get(p_inst);
-
- if (APP_USBD_CDC_ACM_ZLP_ON_EPSIZE_WRITE && ((length % NRF_DRV_USBD_EPSIZE) == 0))
- {
- NRF_DRV_USBD_TRANSFER_IN_ZLP(transfer, p_buf, length);
- return app_usbd_ep_transfer(ep, &transfer);
- }
- else
- {
- NRF_DRV_USBD_TRANSFER_IN(transfer, p_buf, length);
- return app_usbd_ep_transfer(ep, &transfer);
- }
-}
-
-size_t app_usbd_cdc_acm_rx_size(app_usbd_cdc_acm_t const * p_cdc_acm)
-{
- app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
-
- return p_cdc_acm_ctx->last_read;
-}
-
-size_t app_usbd_cdc_acm_bytes_stored(app_usbd_cdc_acm_t const * p_cdc_acm)
-{
- app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
-
- return p_cdc_acm_ctx->bytes_left;
-}
-
-ret_code_t app_usbd_cdc_acm_read(app_usbd_cdc_acm_t const * p_cdc_acm,
- void * p_buf,
- size_t length)
-{
- ASSERT(p_buf != NULL);
- ret_code_t ret;
- app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
-
- if (0U == (p_cdc_acm_ctx->line_state & APP_USBD_CDC_ACM_LINE_STATE_DTR))
- {
- /*Port is not opened*/
- return NRF_ERROR_INVALID_STATE;
- }
-
-#if (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE == 0)
- CRITICAL_REGION_ENTER();
-#endif // (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE == 0)
-
- if (p_cdc_acm_ctx->rx_transfer[0].p_buf == NULL)
- {
- if (p_cdc_acm_ctx->bytes_left >= length)
- {
- memcpy(p_buf, p_cdc_acm_ctx->p_copy_pos, length);
- p_cdc_acm_ctx->bytes_left -= length;
- p_cdc_acm_ctx->p_copy_pos += length;
- p_cdc_acm_ctx->last_read = length;
- ret = NRF_SUCCESS;
- }
- else
- {
- p_cdc_acm_ctx->rx_transfer[0].p_buf = p_buf;
- p_cdc_acm_ctx->rx_transfer[0].read_left = length;
- nrf_drv_usbd_ep_t ep = data_ep_out_addr_get(app_usbd_cdc_acm_class_inst_get(p_cdc_acm));
- nrf_drv_usbd_handler_desc_t const handler_desc = {
- .handler.consumer = cdc_acm_consumer,
- .p_context = p_cdc_acm_ctx
- };
-
- if (p_cdc_acm_ctx->bytes_left > 0)
- {
- memcpy(p_cdc_acm_ctx->rx_transfer[0].p_buf,
- p_cdc_acm_ctx->p_copy_pos,
- p_cdc_acm_ctx->bytes_left);
- p_cdc_acm_ctx->rx_transfer[0].read_left -= p_cdc_acm_ctx->bytes_left;
- p_cdc_acm_ctx->rx_transfer[0].p_buf += p_cdc_acm_ctx->bytes_left;
- p_cdc_acm_ctx->bytes_read = p_cdc_acm_ctx->bytes_left;
- p_cdc_acm_ctx->bytes_left = 0;
-
- }
- ret = app_usbd_ep_handled_transfer(ep, &handler_desc);
- if (ret == NRF_SUCCESS)
- {
- ret = NRF_ERROR_IO_PENDING;
- }
- }
- }
- else if (p_cdc_acm_ctx->rx_transfer[1].p_buf == NULL)
- {
- p_cdc_acm_ctx->rx_transfer[1].p_buf = p_buf;
- p_cdc_acm_ctx->rx_transfer[1].read_left = length;
- ret = NRF_ERROR_IO_PENDING;
- }
- else
- {
- ret = NRF_ERROR_BUSY;
- }
-#if (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE == 0)
- CRITICAL_REGION_EXIT();
-#endif // (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE == 0)
-
- return ret;
-}
-
-ret_code_t app_usbd_cdc_acm_read_any(app_usbd_cdc_acm_t const * p_cdc_acm,
- void * p_buf,
- size_t length)
-{
- ASSERT(p_buf != NULL);
- ret_code_t ret;
- app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
-
- if (0U == (p_cdc_acm_ctx->line_state & APP_USBD_CDC_ACM_LINE_STATE_DTR))
- {
- /*Port is not opened*/
- return NRF_ERROR_INVALID_STATE;
- }
-
-#if (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE == 0)
- CRITICAL_REGION_ENTER();
-#endif // (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE == 0)
- if (p_cdc_acm_ctx->bytes_left > 0)
- {
- size_t to_copy = MIN(length, p_cdc_acm_ctx->bytes_left);
- memcpy(p_buf, p_cdc_acm_ctx->p_copy_pos, to_copy);
- p_cdc_acm_ctx->bytes_left -= to_copy;
- p_cdc_acm_ctx->p_copy_pos += to_copy;
- p_cdc_acm_ctx->last_read = to_copy;
- ret = NRF_SUCCESS;
- }
- else
- {
- if (p_cdc_acm_ctx->rx_transfer[0].p_buf == NULL)
- {
- p_cdc_acm_ctx->rx_transfer[0].p_buf = p_buf;
- p_cdc_acm_ctx->rx_transfer[0].read_left = length;
- nrf_drv_usbd_ep_t ep = data_ep_out_addr_get(app_usbd_cdc_acm_class_inst_get(p_cdc_acm));
- nrf_drv_usbd_handler_desc_t const handler_desc = {
- .handler.consumer = cdc_acm_single_shoot_consumer,
- .p_context = p_cdc_acm_ctx
- };
-
- ret = app_usbd_ep_handled_transfer(ep, &handler_desc);
- if (ret == NRF_SUCCESS)
- {
- ret = NRF_ERROR_IO_PENDING;
- }
- }
- else
- {
- ret = NRF_ERROR_BUSY;
- }
- }
-
-#if (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE == 0)
- CRITICAL_REGION_EXIT();
-#endif // (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE == 0)
-
- return ret;
-}
-
-static ret_code_t cdc_acm_serial_state_notify(app_usbd_cdc_acm_t const * p_cdc_acm)
-{
- app_usbd_class_inst_t const * p_inst = app_usbd_cdc_acm_class_inst_get(p_cdc_acm);
- app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
-
- nrf_drv_usbd_ep_t ep = comm_ep_in_addr_get(p_inst);
-
- NRF_DRV_USBD_TRANSFER_OUT(transfer,
- &p_cdc_acm_ctx->request.payload,
- sizeof(app_usbd_cdc_acm_notify_t));
- return app_usbd_ep_transfer(ep, &transfer);
-}
-
-ret_code_t app_usbd_cdc_acm_serial_state_notify(app_usbd_cdc_acm_t const * p_cdc_acm,
- app_usbd_cdc_acm_serial_state_t serial_state,
- bool value)
-{
- app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
-
- ret_code_t ret;
- CRITICAL_REGION_ENTER();
- ret = NRF_SUCCESS;
- switch (serial_state)
- {
- case APP_USBD_CDC_ACM_SERIAL_STATE_DCD:
- case APP_USBD_CDC_ACM_SERIAL_STATE_DSR:
- case APP_USBD_CDC_ACM_SERIAL_STATE_BREAK:
- case APP_USBD_CDC_ACM_SERIAL_STATE_RING:
- case APP_USBD_CDC_ACM_SERIAL_STATE_FRAMING:
- case APP_USBD_CDC_ACM_SERIAL_STATE_PARITY:
- case APP_USBD_CDC_ACM_SERIAL_STATE_OVERRUN:
-
- if (value)
- {
- p_cdc_acm_ctx->serial_state |= serial_state;
- }
- else
- {
- p_cdc_acm_ctx->serial_state &= ~serial_state;
- }
-
- break;
- default:
- ret = NRF_ERROR_NOT_SUPPORTED;
- break;
- }
-
- if (ret == NRF_SUCCESS)
- {
- app_usbd_cdc_acm_notify_t * notify = &p_cdc_acm_ctx->request.payload.notify;
- notify->cdc_notify.bmRequestType = app_usbd_setup_req_val(APP_USBD_SETUP_REQREC_INTERFACE,
- APP_USBD_SETUP_REQTYPE_CLASS,
- APP_USBD_SETUP_REQDIR_IN);
- notify->cdc_notify.bmRequest = APP_USBD_CDC_NOTIF_SERIAL_STATE;
- notify->cdc_notify.wValue = 0;
- notify->cdc_notify.wIndex = 0;
- notify->cdc_notify.wLength = sizeof(notify->serial_state);
-
- notify->serial_state = p_cdc_acm_ctx->serial_state;
-
- ret = cdc_acm_serial_state_notify(p_cdc_acm);
- }
- CRITICAL_REGION_EXIT();
-
- return ret;
-}
-
-ret_code_t app_usbd_cdc_acm_line_state_get(app_usbd_cdc_acm_t const * p_cdc_acm,
- app_usbd_cdc_acm_line_state_t line_state,
- uint32_t * value)
-{
- app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
-
- ret_code_t ret;
- CRITICAL_REGION_ENTER();
- ret = NRF_SUCCESS;
- switch (line_state)
- {
- case APP_USBD_CDC_ACM_LINE_STATE_DTR:
- case APP_USBD_CDC_ACM_LINE_STATE_RTS:
- *value = (p_cdc_acm_ctx->line_state & line_state) != 0;
- break;
- default:
- ret = NRF_ERROR_NOT_SUPPORTED;
- break;
- }
- CRITICAL_REGION_EXIT();
-
- return ret;
-}
-
-#endif //NRF_MODULE_ENABLED(APP_USBD_CDC_ACM)
+/**
+ * Copyright (c) 2016 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#include "sdk_common.h"
+#if NRF_MODULE_ENABLED(APP_USBD_CDC_ACM)
+
+#include "app_usbd_cdc_acm.h"
+#include <inttypes.h>
+
+/**
+ * @defgroup app_usbd_cdc_acm_internal CDC ACM internals
+ * @{
+ * @ingroup app_usbd_cdc
+ * @internal
+ */
+
+
+#define NRF_LOG_MODULE_NAME cdc_acm
+
+#if APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED
+#define NRF_LOG_LEVEL APP_USBD_CDC_ACM_CONFIG_LOG_LEVEL
+#define NRF_LOG_INFO_COLOR APP_USBD_CDC_ACM_CONFIG_INFO_COLOR
+#define NRF_LOG_DEBUG_COLOR APP_USBD_CDC_ACM_CONFIG_DEBUG_COLOR
+#else //APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED
+#define NRF_LOG_LEVEL 0
+#endif //APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED
+#include "nrf_log.h"
+NRF_LOG_MODULE_REGISTER();
+
+#define APP_USBD_CDC_ACM_COMM_IFACE_IDX 0 /**< CDC ACM class comm interface index. */
+#define APP_USBD_CDC_ACM_DATA_IFACE_IDX 1 /**< CDC ACM class data interface index. */
+
+#define APP_USBD_CDC_ACM_COMM_EPIN_IDX 0 /**< CDC ACM comm class endpoint IN index. */
+#define APP_USBD_CDC_ACM_DATA_EPIN_IDX 0 /**< CDC ACM data class endpoint IN index. */
+#define APP_USBD_CDC_ACM_DATA_EPOUT_IDX 1 /**< CDC ACM data class endpoint OUT index. */
+
+/**
+ * @brief Auxiliary function to access cdc_acm class instance data.
+ *
+ * @param[in] p_inst Class instance data.
+ *
+ * @return CDC ACM class instance.
+ */
+static inline app_usbd_cdc_acm_t const * cdc_acm_get(app_usbd_class_inst_t const * p_inst)
+{
+ ASSERT(p_inst != NULL);
+ return (app_usbd_cdc_acm_t const *)p_inst;
+}
+
+/**
+ * @brief Auxiliary function to access cdc_acm class context data.
+ *
+ * @param[in] p_cdc_acm CDC ACM class instance data.
+ *
+ * @return CDC ACM class instance context.
+ */
+static inline app_usbd_cdc_acm_ctx_t * cdc_acm_ctx_get(app_usbd_cdc_acm_t const * p_cdc_acm)
+{
+ ASSERT(p_cdc_acm != NULL);
+ ASSERT(p_cdc_acm->specific.p_data != NULL);
+ return &p_cdc_acm->specific.p_data->ctx;
+}
+
+/**
+ * @brief User event handler.
+ *
+ * @param[in] p_inst Class instance.
+ * @param[in] event user Event type.
+ */
+static inline void user_event_handler(app_usbd_class_inst_t const * p_inst,
+ app_usbd_cdc_acm_user_event_t event)
+{
+ app_usbd_cdc_acm_t const * p_cdc_acm = cdc_acm_get(p_inst);
+ if (p_cdc_acm->specific.inst.user_ev_handler != NULL)
+ {
+ p_cdc_acm->specific.inst.user_ev_handler(p_inst, event);
+ }
+}
+
+/**
+ * @brief Auxiliary function to access CDC ACM COMM IN endpoint address.
+ *
+ * @param[in] p_inst Class instance data.
+ *
+ * @return IN endpoint address.
+ */
+static inline nrf_drv_usbd_ep_t comm_ep_in_addr_get(app_usbd_class_inst_t const * p_inst)
+{
+ app_usbd_class_iface_conf_t const * class_iface;
+ class_iface = app_usbd_class_iface_get(p_inst, APP_USBD_CDC_ACM_COMM_IFACE_IDX);
+
+ app_usbd_class_ep_conf_t const * ep_cfg;
+ ep_cfg = app_usbd_class_iface_ep_get(class_iface, APP_USBD_CDC_ACM_COMM_EPIN_IDX);
+
+ return app_usbd_class_ep_address_get(ep_cfg);
+}
+
+/**
+ * @brief Auxiliary function to access CDC ACM DATA IN endpoint address.
+ *
+ * @param[in] p_inst Class instance data.
+ *
+ * @return IN endpoint address.
+ */
+static inline nrf_drv_usbd_ep_t data_ep_in_addr_get(app_usbd_class_inst_t const * p_inst)
+{
+ app_usbd_class_iface_conf_t const * class_iface;
+ class_iface = app_usbd_class_iface_get(p_inst, APP_USBD_CDC_ACM_DATA_IFACE_IDX);
+
+ app_usbd_class_ep_conf_t const * ep_cfg;
+ ep_cfg = app_usbd_class_iface_ep_get(class_iface, APP_USBD_CDC_ACM_DATA_EPIN_IDX);
+
+ return app_usbd_class_ep_address_get(ep_cfg);
+}
+
+/**
+ * @brief Auxiliary function to access CDC ACM DATA OUT endpoint address.
+ *
+ * @param[in] p_inst Class instance data.
+ *
+ * @return OUT endpoint address.
+ */
+static inline nrf_drv_usbd_ep_t data_ep_out_addr_get(app_usbd_class_inst_t const * p_inst)
+{
+ app_usbd_class_iface_conf_t const * class_iface;
+ class_iface = app_usbd_class_iface_get(p_inst, APP_USBD_CDC_ACM_DATA_IFACE_IDX);
+
+ app_usbd_class_ep_conf_t const * ep_cfg;
+ ep_cfg = app_usbd_class_iface_ep_get(class_iface, APP_USBD_CDC_ACM_DATA_EPOUT_IDX);
+
+ return app_usbd_class_ep_address_get(ep_cfg);
+}
+
+/**
+ * @brief Internal SETUP standard IN request handler.
+ *
+ * @param[in] p_inst Generic class instance.
+ * @param[in] p_setup_ev Setup event.
+ *
+ * @return Standard error code.
+ */
+static ret_code_t setup_req_std_in(app_usbd_class_inst_t const * p_inst,
+ app_usbd_setup_evt_t const * p_setup_ev)
+{
+ /* Only Get Descriptor standard IN request is supported by CDC class */
+ if ((app_usbd_setup_req_rec(p_setup_ev->setup.bmRequestType) == APP_USBD_SETUP_REQREC_INTERFACE)
+ &&
+ (p_setup_ev->setup.bRequest == APP_USBD_SETUP_STDREQ_GET_DESCRIPTOR))
+ {
+ size_t dsc_len = 0;
+ size_t max_size;
+
+ uint8_t * p_trans_buff = app_usbd_core_setup_transfer_buff_get(&max_size);
+
+ /* Try to find descriptor in class internals*/
+ ret_code_t ret = app_usbd_class_descriptor_find(
+ p_inst,
+ p_setup_ev->setup.wValue.hb,
+ p_setup_ev->setup.wValue.lb,
+ p_trans_buff,
+ &dsc_len);
+
+ if (ret != NRF_ERROR_NOT_FOUND)
+ {
+ ASSERT(dsc_len < NRF_DRV_USBD_EPSIZE);
+ return app_usbd_core_setup_rsp(&(p_setup_ev->setup), p_trans_buff, dsc_len);
+ }
+ }
+
+ return NRF_ERROR_NOT_SUPPORTED;
+}
+
+/**
+ * @brief Internal SETUP standard OUT request handler.
+ *
+ * @param[in] p_inst Generic class instance.
+ * @param[in] p_setup_ev Setup event.
+ *
+ * @return Standard error code.
+ */
+static ret_code_t setup_req_std_out(app_usbd_class_inst_t const * p_inst,
+ app_usbd_setup_evt_t const * p_setup_ev)
+{
+
+ switch (p_setup_ev->setup.bRequest)
+ {
+ default:
+ break;
+ }
+
+ return NRF_ERROR_NOT_SUPPORTED;
+}
+
+/**
+ * @brief Internal SETUP class IN request handler.
+ *
+ * @param[in] p_inst Generic class instance.
+ * @param[in] p_setup_ev Setup event.
+ *
+ * @return Standard error code.
+ */
+static ret_code_t setup_req_class_in(app_usbd_class_inst_t const * p_inst,
+ app_usbd_setup_evt_t const * p_setup_ev)
+{
+ app_usbd_cdc_acm_t const * p_cdc_acm = cdc_acm_get(p_inst);
+ app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
+
+ switch (p_setup_ev->setup.bRequest)
+ {
+ case APP_USBD_CDC_REQ_GET_LINE_CODING:
+ {
+ if (p_setup_ev->setup.wLength.w != sizeof(app_usbd_cdc_line_coding_t))
+ {
+ return NRF_ERROR_NOT_SUPPORTED;
+ }
+
+ return app_usbd_core_setup_rsp(&p_setup_ev->setup,
+ &p_cdc_acm_ctx->line_coding,
+ sizeof(app_usbd_cdc_line_coding_t));
+ }
+ default:
+ break;
+ }
+
+ return NRF_ERROR_NOT_SUPPORTED;
+}
+
+/**
+ * @brief Class specific OUT request data callback.
+ *
+ * @param status Endpoint status.
+ * @param p_context Context of transfer (set by @ref app_usbd_core_setup_data_handler_set).
+ *
+ * @return Standard error code.
+ */
+static ret_code_t cdc_acm_req_out_data_cb(nrf_drv_usbd_ep_status_t status, void * p_context)
+{
+ if (status != NRF_USBD_EP_OK)
+ {
+ return NRF_ERROR_INTERNAL;
+ }
+
+ app_usbd_cdc_acm_t const * p_cdc_acm = p_context;
+ app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
+
+ switch (p_cdc_acm_ctx->request.type)
+ {
+ case APP_USBD_CDC_REQ_SET_LINE_CODING:
+ {
+ memcpy(&p_cdc_acm_ctx->line_coding,
+ &p_cdc_acm_ctx->request.payload.line_coding,
+ sizeof(app_usbd_cdc_line_coding_t));
+
+ NRF_LOG_INFO("REQ_SET_LINE_CODING: baudrate: %"PRIu32", databits: %u, "
+ "format: %u, parity: %u",
+ uint32_decode(p_cdc_acm_ctx->line_coding.dwDTERate),
+ p_cdc_acm_ctx->line_coding.bDataBits,
+ p_cdc_acm_ctx->line_coding.bCharFormat,
+ p_cdc_acm_ctx->line_coding.bParityType);
+ break;
+ }
+ default:
+ return NRF_ERROR_NOT_SUPPORTED;
+ }
+
+ return NRF_SUCCESS;
+}
+
+
+/**
+ * @brief Class specific request data stage setup.
+ *
+ * @param[in] p_inst Generic class instance.
+ * @param[in] p_setup_ev Setup event.
+ *
+ * @return Standard error code.
+ */
+static ret_code_t cdc_acm_req_out_datastage(app_usbd_class_inst_t const * p_inst,
+ app_usbd_setup_evt_t const * p_setup_ev)
+{
+ app_usbd_cdc_acm_t const * p_cdc_acm = cdc_acm_get(p_inst);
+ app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
+
+ p_cdc_acm_ctx->request.type = p_setup_ev->setup.bRequest;
+ p_cdc_acm_ctx->request.len = p_setup_ev->setup.wLength.w;
+
+ /*Request setup data*/
+ NRF_DRV_USBD_TRANSFER_OUT(transfer,
+ &p_cdc_acm_ctx->request.payload,
+ p_cdc_acm_ctx->request.len);
+ ret_code_t ret;
+ CRITICAL_REGION_ENTER();
+ ret = app_usbd_ep_transfer(NRF_DRV_USBD_EPOUT0, &transfer);
+ if (ret == NRF_SUCCESS)
+ {
+ const app_usbd_core_setup_data_handler_desc_t desc = {
+ .handler = cdc_acm_req_out_data_cb,
+ .p_context = (void*)p_cdc_acm
+ };
+
+ ret = app_usbd_core_setup_data_handler_set(NRF_DRV_USBD_EPOUT0, &desc);
+ }
+ CRITICAL_REGION_EXIT();
+
+ return ret;
+}
+
+/**
+ * @brief Reset port to default state.
+ *
+ * @param p_inst Generic class instance.
+ */
+static void cdc_acm_reset_port(app_usbd_class_inst_t const * p_inst)
+{
+ app_usbd_cdc_acm_t const * p_cdc_acm = cdc_acm_get(p_inst);
+ app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
+
+ p_cdc_acm_ctx->line_state = 0;
+
+ // Set rx transfers configuration to default state.
+ p_cdc_acm_ctx->rx_transfer[0].p_buf = NULL;
+ p_cdc_acm_ctx->rx_transfer[1].p_buf = NULL;
+ p_cdc_acm_ctx->bytes_left = 0;
+ p_cdc_acm_ctx->bytes_read = 0;
+ p_cdc_acm_ctx->last_read = 0;
+ p_cdc_acm_ctx->cur_read = 0;
+ p_cdc_acm_ctx->p_copy_pos = p_cdc_acm_ctx->internal_rx_buf;
+}
+
+/**
+ * @brief Internal SETUP class OUT request handler.
+ *
+ * @param[in] p_inst Generic class instance.
+ * @param[in] p_setup_ev Setup event.
+ *
+ * @return Standard error code.
+ */
+static ret_code_t setup_req_class_out(app_usbd_class_inst_t const * p_inst,
+ app_usbd_setup_evt_t const * p_setup_ev)
+{
+ app_usbd_cdc_acm_t const * p_cdc_acm = cdc_acm_get(p_inst);
+ app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
+
+ switch (p_setup_ev->setup.bRequest)
+ {
+ case APP_USBD_CDC_REQ_SET_LINE_CODING:
+ {
+ if (p_setup_ev->setup.wLength.w != sizeof(app_usbd_cdc_line_coding_t))
+ {
+ return NRF_ERROR_NOT_SUPPORTED;
+ }
+
+ return cdc_acm_req_out_datastage(p_inst, p_setup_ev);
+ }
+ case APP_USBD_CDC_REQ_SET_CONTROL_LINE_STATE:
+ {
+ if (p_setup_ev->setup.wLength.w != 0)
+ {
+ return NRF_ERROR_NOT_SUPPORTED;
+ }
+
+ NRF_LOG_INFO("REQ_SET_CONTROL_LINE_STATE: 0x%x", p_setup_ev->setup.wValue.w);
+
+ bool old_dtr = (p_cdc_acm_ctx->line_state & APP_USBD_CDC_ACM_LINE_STATE_DTR) ?
+ true : false;
+ p_cdc_acm_ctx->line_state = p_setup_ev->setup.wValue.w;
+
+ bool new_dtr = (p_cdc_acm_ctx->line_state & APP_USBD_CDC_ACM_LINE_STATE_DTR) ?
+ true : false;
+
+ if (old_dtr == new_dtr)
+ {
+ return NRF_SUCCESS;
+ }
+
+ const app_usbd_cdc_acm_user_event_t ev = new_dtr ?
+ APP_USBD_CDC_ACM_USER_EVT_PORT_OPEN : APP_USBD_CDC_ACM_USER_EVT_PORT_CLOSE;
+
+ user_event_handler(p_inst, ev);
+
+ if (!new_dtr)
+ {
+ /*Abort DATA endpoints on port close */
+ nrf_drv_usbd_ep_t ep;
+ ep = data_ep_in_addr_get(p_inst);
+ nrf_drv_usbd_ep_abort(ep);
+ ep = data_ep_out_addr_get(p_inst);
+ nrf_drv_usbd_ep_abort(ep);
+
+ // Set rx transfers configuration to default state.
+ p_cdc_acm_ctx->rx_transfer[0].p_buf = NULL;
+ p_cdc_acm_ctx->rx_transfer[1].p_buf = NULL;
+ p_cdc_acm_ctx->bytes_left = 0;
+ p_cdc_acm_ctx->bytes_read = 0;
+ p_cdc_acm_ctx->last_read = 0;
+ p_cdc_acm_ctx->cur_read = 0;
+ p_cdc_acm_ctx->p_copy_pos = p_cdc_acm_ctx->internal_rx_buf;
+ }
+
+ return NRF_SUCCESS;
+ }
+ default:
+ break;
+ }
+
+ return NRF_ERROR_NOT_SUPPORTED;
+}
+
+/**
+ * @brief Control endpoint handler.
+ *
+ * @param[in] p_inst Generic class instance.
+ * @param[in] p_setup_ev Setup event.
+ *
+ * @return Standard error code.
+ */
+static ret_code_t setup_event_handler(app_usbd_class_inst_t const * p_inst,
+ app_usbd_setup_evt_t const * p_setup_ev)
+{
+ ASSERT(p_inst != NULL);
+ ASSERT(p_setup_ev != NULL);
+
+ if (app_usbd_setup_req_dir(p_setup_ev->setup.bmRequestType) == APP_USBD_SETUP_REQDIR_IN)
+ {
+ switch (app_usbd_setup_req_typ(p_setup_ev->setup.bmRequestType))
+ {
+ case APP_USBD_SETUP_REQTYPE_STD:
+ return setup_req_std_in(p_inst, p_setup_ev);
+ case APP_USBD_SETUP_REQTYPE_CLASS:
+ return setup_req_class_in(p_inst, p_setup_ev);
+ default:
+ break;
+ }
+ }
+ else /*APP_USBD_SETUP_REQDIR_OUT*/
+ {
+ switch (app_usbd_setup_req_typ(p_setup_ev->setup.bmRequestType))
+ {
+ case APP_USBD_SETUP_REQTYPE_STD:
+ return setup_req_std_out(p_inst, p_setup_ev);
+ case APP_USBD_SETUP_REQTYPE_CLASS:
+ return setup_req_class_out(p_inst, p_setup_ev);
+ default:
+ break;
+ }
+ }
+
+ return NRF_ERROR_NOT_SUPPORTED;
+}
+
+
+/**
+ * @brief CDC ACM consumer.
+ *
+ * @note See @ref nrf_drv_usbd_consumer_t
+ */
+static bool cdc_acm_consumer(nrf_drv_usbd_ep_transfer_t * p_next,
+ void * p_context,
+ size_t ep_size,
+ size_t data_size)
+{
+ app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = (app_usbd_cdc_acm_ctx_t *) p_context;
+ p_next->size = data_size;
+
+ if (data_size <= p_cdc_acm_ctx->rx_transfer[0].read_left)
+ {
+ p_next->p_data.rx = p_cdc_acm_ctx->rx_transfer[0].p_buf;
+
+ p_cdc_acm_ctx->rx_transfer[0].p_buf += data_size;
+ p_cdc_acm_ctx->bytes_read += data_size;
+ p_cdc_acm_ctx->rx_transfer[0].read_left -= data_size;
+ NRF_LOG_DEBUG("Received %d bytes. Space left in user buffer: %d bytes.",
+ data_size,
+ p_cdc_acm_ctx->rx_transfer[0].read_left);
+ return (p_cdc_acm_ctx->rx_transfer[0].read_left) != 0;
+ }
+ else
+ {
+ p_next->p_data.rx = p_cdc_acm_ctx->internal_rx_buf;
+
+ p_cdc_acm_ctx->cur_read = data_size;
+ NRF_LOG_DEBUG("Received %d bytes. Stored in internal buffer.", data_size);
+ return false;
+ }
+}
+
+/**
+ * @brief CDC ACM single transfer consumer.
+ *
+ * This function finalizes transfer after any received block.
+ *
+ * @note See @ref nrf_drv_usbd_consumer_t
+ */
+static bool cdc_acm_single_shoot_consumer(nrf_drv_usbd_ep_transfer_t * p_next,
+ void * p_context,
+ size_t ep_size,
+ size_t data_size)
+{
+ app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = (app_usbd_cdc_acm_ctx_t *) p_context;
+ p_next->size = data_size;
+
+ if (data_size <= p_cdc_acm_ctx->rx_transfer[0].read_left)
+ {
+ p_next->p_data.rx = p_cdc_acm_ctx->rx_transfer[0].p_buf;
+
+ p_cdc_acm_ctx->bytes_read = data_size;
+ p_cdc_acm_ctx->rx_transfer[0].read_left = data_size;
+ NRF_LOG_DEBUG("Received %d bytes. Space left in user buffer: %d bytes.",
+ data_size,
+ p_cdc_acm_ctx->rx_transfer[0].read_left);
+ }
+ else
+ {
+ p_next->p_data.rx = p_cdc_acm_ctx->internal_rx_buf;
+ p_cdc_acm_ctx->cur_read = data_size;
+ NRF_LOG_DEBUG("Received %d bytes. Stored in internal buffer.", data_size);
+ }
+
+ return false;
+}
+
+/**
+ * @brief Manage switching between user buffers and copying data from internal buffer.
+ *
+ * @param p_inst Generic USB class instance.
+ *
+ * @return Standard error code.
+ */
+static ret_code_t cdc_acm_rx_block_finished(app_usbd_class_inst_t const * p_inst)
+{
+ app_usbd_cdc_acm_t const * p_cdc_acm = cdc_acm_get(p_inst);
+ app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
+ nrf_drv_usbd_ep_t ep = data_ep_out_addr_get(p_inst);
+
+ nrf_drv_usbd_handler_desc_t handler_desc = {
+ .handler.consumer = cdc_acm_consumer,
+ .p_context = p_cdc_acm_ctx
+ };
+
+ if (p_cdc_acm_ctx->rx_transfer[0].read_left == 0) // Buffer completely filled by consumer
+ {
+ p_cdc_acm_ctx->last_read = p_cdc_acm_ctx->bytes_read;
+ p_cdc_acm_ctx->bytes_read = 0;
+ p_cdc_acm_ctx->bytes_left = 0;
+
+ if (p_cdc_acm_ctx->rx_transfer[1].p_buf != NULL)
+ {
+ p_cdc_acm_ctx->rx_transfer[0] = p_cdc_acm_ctx->rx_transfer[1];
+ p_cdc_acm_ctx->rx_transfer[1].p_buf = NULL;
+ return app_usbd_ep_handled_transfer(ep, &handler_desc);
+ }
+ else
+ {
+ p_cdc_acm_ctx->rx_transfer[0].p_buf = NULL;
+ return NRF_SUCCESS;
+ }
+ }
+
+ size_t bytes_read = p_cdc_acm_ctx->cur_read;
+ size_t bytes_to_cpy = bytes_read;
+
+ if (bytes_read > p_cdc_acm_ctx->rx_transfer[0].read_left)
+ {
+ bytes_to_cpy = p_cdc_acm_ctx->rx_transfer[0].read_left;
+ }
+ memcpy(p_cdc_acm_ctx->rx_transfer[0].p_buf,
+ p_cdc_acm_ctx->internal_rx_buf,
+ bytes_to_cpy);
+
+ // First buffer is full
+ p_cdc_acm_ctx->last_read = p_cdc_acm_ctx->bytes_read + bytes_to_cpy;
+ p_cdc_acm_ctx->bytes_read = 0;
+ p_cdc_acm_ctx->bytes_left = bytes_read - bytes_to_cpy;
+ p_cdc_acm_ctx->p_copy_pos = p_cdc_acm_ctx->internal_rx_buf + bytes_to_cpy;
+
+ if (p_cdc_acm_ctx->rx_transfer[1].p_buf != NULL)
+ {
+ // If there is second transfer, copy it to first
+ p_cdc_acm_ctx->rx_transfer[0] = p_cdc_acm_ctx->rx_transfer[1];
+ p_cdc_acm_ctx->rx_transfer[1].p_buf = NULL;
+
+ while (p_cdc_acm_ctx->bytes_left > 0)
+ {
+
+ if (p_cdc_acm_ctx->bytes_left >= p_cdc_acm_ctx->rx_transfer[0].read_left)
+ {
+ // If there are enough bytes left in internal buffer to completely fill next transfer,
+ // we call user event handler to obtain next buffer and continue double buffering.
+ memcpy(p_cdc_acm_ctx->rx_transfer[0].p_buf,
+ p_cdc_acm_ctx->p_copy_pos,
+ p_cdc_acm_ctx->rx_transfer[0].read_left);
+
+ p_cdc_acm_ctx->bytes_left -= p_cdc_acm_ctx->rx_transfer[0].read_left;
+ p_cdc_acm_ctx->p_copy_pos += p_cdc_acm_ctx->rx_transfer[0].read_left;
+ p_cdc_acm_ctx->last_read = p_cdc_acm_ctx->rx_transfer[0].read_left;
+ user_event_handler(p_inst, APP_USBD_CDC_ACM_USER_EVT_RX_DONE);
+
+ if (p_cdc_acm_ctx->rx_transfer[1].p_buf != NULL)
+ {
+ p_cdc_acm_ctx->rx_transfer[0] = p_cdc_acm_ctx->rx_transfer[1];
+ p_cdc_acm_ctx->rx_transfer[1].p_buf = NULL;
+ }
+ else
+ {
+ // If user does not specify a second buffer, all data transfers are done
+ // and data left in internal buffer is lost.
+ p_cdc_acm_ctx->rx_transfer[0].p_buf = NULL;
+ break;
+ }
+ }
+ else
+ {
+ memcpy(p_cdc_acm_ctx->rx_transfer[0].p_buf,
+ p_cdc_acm_ctx->p_copy_pos,
+ p_cdc_acm_ctx->bytes_left);
+ p_cdc_acm_ctx->bytes_read = p_cdc_acm_ctx->bytes_left;
+
+ p_cdc_acm_ctx->rx_transfer[0].read_left -= p_cdc_acm_ctx->bytes_left;
+ p_cdc_acm_ctx->rx_transfer[0].p_buf += p_cdc_acm_ctx->bytes_left;
+ break;
+ }
+ }
+
+
+ }
+ else
+ {
+ p_cdc_acm_ctx->rx_transfer[0].p_buf = NULL;
+ }
+
+ if (p_cdc_acm_ctx->rx_transfer[0].p_buf != NULL)
+ {
+ return app_usbd_ep_handled_transfer(ep, &handler_desc);
+ }
+ return NRF_SUCCESS;
+}
+
+/**
+ * @brief Class specific endpoint transfer handler.
+ *
+ * @param[in] p_inst Generic class instance.
+ * @param[in] p_setup_ev Setup event.
+ *
+ * @return Standard error code.
+ */
+static ret_code_t cdc_acm_endpoint_ev(app_usbd_class_inst_t const * p_inst,
+ app_usbd_complex_evt_t const * p_event)
+{
+ if (comm_ep_in_addr_get(p_inst) == p_event->drv_evt.data.eptransfer.ep)
+ {
+ NRF_LOG_INFO("EPIN_COMM: notify");
+ return NRF_SUCCESS;
+ }
+ ret_code_t ret;
+ if (NRF_USBD_EPIN_CHECK(p_event->drv_evt.data.eptransfer.ep))
+ {
+ switch (p_event->drv_evt.data.eptransfer.status)
+ {
+ case NRF_USBD_EP_OK:
+ NRF_LOG_INFO("EPIN_DATA: %02x done", p_event->drv_evt.data.eptransfer.ep);
+ user_event_handler(p_inst, APP_USBD_CDC_ACM_USER_EVT_TX_DONE);
+ return NRF_SUCCESS;
+ case NRF_USBD_EP_ABORTED:
+ return NRF_SUCCESS;
+ default:
+ return NRF_ERROR_INTERNAL;
+ }
+ }
+
+ if (NRF_USBD_EPOUT_CHECK(p_event->drv_evt.data.eptransfer.ep))
+ {
+ switch (p_event->drv_evt.data.eptransfer.status)
+ {
+ case NRF_USBD_EP_OK:
+ ret = cdc_acm_rx_block_finished(p_inst);
+ NRF_LOG_INFO("EPOUT_DATA: %02x done", p_event->drv_evt.data.eptransfer.ep);
+ user_event_handler(p_inst, APP_USBD_CDC_ACM_USER_EVT_RX_DONE);
+ return ret;
+ case NRF_USBD_EP_WAITING:
+ case NRF_USBD_EP_ABORTED:
+ return NRF_SUCCESS;
+ default:
+ return NRF_ERROR_INTERNAL;
+ }
+ }
+
+ return NRF_ERROR_NOT_SUPPORTED;
+}
+
+
+/**
+ * @brief @ref app_usbd_class_methods_t::event_handler
+ */
+static ret_code_t cdc_acm_event_handler(app_usbd_class_inst_t const * p_inst,
+ app_usbd_complex_evt_t const * p_event)
+{
+ ASSERT(p_inst != NULL);
+ ASSERT(p_event != NULL);
+
+ ret_code_t ret = NRF_SUCCESS;
+ switch (p_event->app_evt.type)
+ {
+ case APP_USBD_EVT_DRV_SOF:
+ break;
+ case APP_USBD_EVT_DRV_RESET:
+ cdc_acm_reset_port(p_inst);
+ break;
+ case APP_USBD_EVT_DRV_SETUP:
+ ret = setup_event_handler(p_inst, (app_usbd_setup_evt_t const *)p_event);
+ break;
+ case APP_USBD_EVT_DRV_EPTRANSFER:
+ ret = cdc_acm_endpoint_ev(p_inst, p_event);
+ break;
+ case APP_USBD_EVT_DRV_SUSPEND:
+ break;
+ case APP_USBD_EVT_DRV_RESUME:
+ break;
+ case APP_USBD_EVT_INST_APPEND:
+ break;
+ case APP_USBD_EVT_INST_REMOVE:
+ break;
+ case APP_USBD_EVT_STARTED:
+ break;
+ case APP_USBD_EVT_STOPPED:
+ break;
+ case APP_USBD_EVT_POWER_REMOVED:
+ cdc_acm_reset_port(p_inst);
+ break;
+ default:
+ ret = NRF_ERROR_NOT_SUPPORTED;
+ break;
+ }
+
+ return ret;
+}
+
+
+static bool cdc_acm_feed_descriptors(app_usbd_class_descriptor_ctx_t * p_ctx,
+ app_usbd_class_inst_t const * p_inst,
+ uint8_t * p_buff,
+ size_t max_size)
+{
+ static uint8_t ifaces = 0;
+ ifaces = app_usbd_class_iface_count_get(p_inst);
+ app_usbd_cdc_acm_t const * p_cdc_acm = cdc_acm_get(p_inst);
+
+ APP_USBD_CLASS_DESCRIPTOR_BEGIN(p_ctx, p_buff, max_size);
+
+ /* INTERFACE ASSOCIATION DESCRIPTOR */
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(0x08); // bLength
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_DESCRIPTOR_INTERFACE_ASSOCIATION); // bDescriptorType = Interface Association
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(p_cdc_acm->specific.inst.comm_interface); // bFirstInterface
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(0x02); // bInterfaceCount
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_CDC_COMM_CLASS); // bFunctionClass
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_CDC_SUBCLASS_ACM); // bFunctionSubClass
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(p_cdc_acm->specific.inst.protocol); // bFunctionProtocol
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(0x00); // iFunction
+
+ static uint8_t i = 0;
+
+ for (i = 0; i < ifaces; i++)
+ {
+ /* INTERFACE DESCRIPTOR */
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(0x09); // bLength
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_DESCRIPTOR_INTERFACE); // bDescriptorType = Interface
+
+ static app_usbd_class_iface_conf_t const * p_cur_iface = NULL;
+ p_cur_iface = app_usbd_class_iface_get(p_inst, i);
+
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(app_usbd_class_iface_number_get(p_cur_iface)); // bInterfaceNumber
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(0x00); // bAlternateSetting
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(app_usbd_class_iface_ep_count_get(p_cur_iface)); // bNumEndpoints
+
+ if (p_cdc_acm->specific.inst.comm_interface == app_usbd_class_iface_number_get(p_cur_iface))
+ {
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_CDC_COMM_CLASS); // bInterfaceClass = CDC COMM
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_CDC_SUBCLASS_ACM); // bInterfaceSubclass
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(p_cdc_acm->specific.inst.protocol); // bInterfaceProtocol
+ }
+ else if (p_cdc_acm->specific.inst.data_interface ==
+ app_usbd_class_iface_number_get(p_cur_iface))
+ {
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_CDC_DATA_CLASS); // bInterfaceClass = CDC DATA
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(0x00); // bInterfaceSubclass
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(0x00); // bInterfaceProtocol
+ }
+ else
+ {
+ ASSERT(0);
+ }
+
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(0x00); // iInterface
+
+ if (p_cdc_acm->specific.inst.comm_interface == app_usbd_class_iface_number_get(p_cur_iface))
+ {
+ /* HEADER DESCRIPTOR */
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(0x05); // bLength
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_CDC_CS_INTERFACE); // bDescriptorType = Class Specific Interface
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_CDC_SCS_HEADER); // bDescriptorSubtype = Header Functional Descriptor
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(0x10); // bcdCDC LSB
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(0x01); // bcdCDC MSB
+
+ /* CALL MANAGEMENT DESCRIPTOR */
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(0x05); // bLength
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_CDC_CS_INTERFACE); // bDescriptorType = Class Specific Interface
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_CDC_SCS_CALL_MGMT); // bDescriptorSubtype = Call Management Functional Descriptor
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(0x03); // bmCapabilities
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(p_cdc_acm->specific.inst.data_interface); // bDataInterface
+
+ /* ABSTRACT CONTROL MANAGEMENT DESCRIPTOR */
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(0x04); // bLength
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_CDC_CS_INTERFACE); // bDescriptorType = Class Specific Interface
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_CDC_SCS_ACM); // bDescriptorSubtype = Abstract Control Management Functional Descriptor
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(0x02); // bmCapabilities
+
+ /* UNION DESCRIPTOR */
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(0x05);
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_CDC_CS_INTERFACE); // bDescriptorType = Class Specific Interface
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_CDC_SCS_UNION); // bDescriptorSubtype = Union Functional Descriptor
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(p_cdc_acm->specific.inst.comm_interface); // bControlInterface
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(p_cdc_acm->specific.inst.data_interface); // bSubordinateInterface
+ }
+ else if (p_cdc_acm->specific.inst.data_interface ==
+ app_usbd_class_iface_number_get(p_cur_iface))
+ {
+ ;
+ }
+ else
+ {
+ ASSERT(0);
+ }
+
+ /* ENDPOINT DESCRIPTORS */
+ static uint8_t endpoints = 0;
+ endpoints = app_usbd_class_iface_ep_count_get(p_cur_iface);
+
+ static uint8_t j = 0;
+
+ for (j = 0; j < endpoints; j++)
+ {
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(0x07); // bLength
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_DESCRIPTOR_ENDPOINT); // bDescriptorType = Endpoint
+
+ static app_usbd_class_ep_conf_t const * p_cur_ep = NULL;
+ p_cur_ep = app_usbd_class_iface_ep_get(p_cur_iface, j);
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(app_usbd_class_ep_address_get(p_cur_ep)); // bEndpointAddress
+
+ if (p_cdc_acm->specific.inst.comm_interface ==
+ app_usbd_class_iface_number_get(p_cur_iface))
+ {
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_INTERRUPT); // bmAttributes
+ }
+ else if (p_cdc_acm->specific.inst.data_interface ==
+ app_usbd_class_iface_number_get(p_cur_iface))
+ {
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_BULK); // bmAttributes
+ }
+ else
+ {
+ ASSERT(0);
+ }
+
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(LSB_16(NRF_DRV_USBD_EPSIZE)); // wMaxPacketSize LSB
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(MSB_16(NRF_DRV_USBD_EPSIZE)); // wMaxPacketSize MSB
+
+ if (p_cdc_acm->specific.inst.comm_interface ==
+ app_usbd_class_iface_number_get(p_cur_iface))
+ {
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(p_cdc_acm->specific.inst.p_ep_interval[0]); // bInterval
+ }
+ else if (p_cdc_acm->specific.inst.data_interface ==
+ app_usbd_class_iface_number_get(p_cur_iface))
+ {
+ APP_USBD_CLASS_DESCRIPTOR_WRITE(0x00); // bInterval
+ }
+ else
+ {
+ ASSERT(0);
+ }
+
+ }
+
+ }
+
+ APP_USBD_CLASS_DESCRIPTOR_END();
+}
+
+/**
+ * @brief Public cdc_acm class interface.
+ *
+ */
+const app_usbd_class_methods_t app_usbd_cdc_acm_class_methods = {
+ .event_handler = cdc_acm_event_handler,
+ .feed_descriptors = cdc_acm_feed_descriptors,
+};
+
+/** @} */
+
+ret_code_t app_usbd_cdc_acm_write(app_usbd_cdc_acm_t const * p_cdc_acm,
+ const void * p_buf,
+ size_t length)
+{
+ app_usbd_class_inst_t const * p_inst = app_usbd_cdc_acm_class_inst_get(p_cdc_acm);
+ app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
+
+ bool dtr_state = (p_cdc_acm_ctx->line_state & APP_USBD_CDC_ACM_LINE_STATE_DTR) ?
+ true : false;
+ if (!dtr_state)
+ {
+ /*Port is not opened*/
+ return NRF_ERROR_INVALID_STATE;
+ }
+
+ nrf_drv_usbd_ep_t ep = data_ep_in_addr_get(p_inst);
+
+ if (APP_USBD_CDC_ACM_ZLP_ON_EPSIZE_WRITE && ((length % NRF_DRV_USBD_EPSIZE) == 0))
+ {
+ NRF_DRV_USBD_TRANSFER_IN_ZLP(transfer, p_buf, length);
+ return app_usbd_ep_transfer(ep, &transfer);
+ }
+ else
+ {
+ NRF_DRV_USBD_TRANSFER_IN(transfer, p_buf, length);
+ return app_usbd_ep_transfer(ep, &transfer);
+ }
+}
+
+size_t app_usbd_cdc_acm_rx_size(app_usbd_cdc_acm_t const * p_cdc_acm)
+{
+ app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
+
+ return p_cdc_acm_ctx->last_read;
+}
+
+size_t app_usbd_cdc_acm_bytes_stored(app_usbd_cdc_acm_t const * p_cdc_acm)
+{
+ app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
+
+ return p_cdc_acm_ctx->bytes_left;
+}
+
+ret_code_t app_usbd_cdc_acm_read(app_usbd_cdc_acm_t const * p_cdc_acm,
+ void * p_buf,
+ size_t length)
+{
+ ASSERT(p_buf != NULL);
+ ret_code_t ret;
+ app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
+
+ if (0U == (p_cdc_acm_ctx->line_state & APP_USBD_CDC_ACM_LINE_STATE_DTR))
+ {
+ /*Port is not opened*/
+ return NRF_ERROR_INVALID_STATE;
+ }
+
+#if (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE == 0)
+ CRITICAL_REGION_ENTER();
+#endif // (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE == 0)
+
+ if (p_cdc_acm_ctx->rx_transfer[0].p_buf == NULL)
+ {
+ if (p_cdc_acm_ctx->bytes_left >= length)
+ {
+ memcpy(p_buf, p_cdc_acm_ctx->p_copy_pos, length);
+ p_cdc_acm_ctx->bytes_left -= length;
+ p_cdc_acm_ctx->p_copy_pos += length;
+ p_cdc_acm_ctx->last_read = length;
+ ret = NRF_SUCCESS;
+ }
+ else
+ {
+ p_cdc_acm_ctx->rx_transfer[0].p_buf = p_buf;
+ p_cdc_acm_ctx->rx_transfer[0].read_left = length;
+ nrf_drv_usbd_ep_t ep = data_ep_out_addr_get(app_usbd_cdc_acm_class_inst_get(p_cdc_acm));
+ nrf_drv_usbd_handler_desc_t const handler_desc = {
+ .handler.consumer = cdc_acm_consumer,
+ .p_context = p_cdc_acm_ctx
+ };
+
+ if (p_cdc_acm_ctx->bytes_left > 0)
+ {
+ memcpy(p_cdc_acm_ctx->rx_transfer[0].p_buf,
+ p_cdc_acm_ctx->p_copy_pos,
+ p_cdc_acm_ctx->bytes_left);
+ p_cdc_acm_ctx->rx_transfer[0].read_left -= p_cdc_acm_ctx->bytes_left;
+ p_cdc_acm_ctx->rx_transfer[0].p_buf += p_cdc_acm_ctx->bytes_left;
+ p_cdc_acm_ctx->bytes_read = p_cdc_acm_ctx->bytes_left;
+ p_cdc_acm_ctx->bytes_left = 0;
+
+ }
+ ret = app_usbd_ep_handled_transfer(ep, &handler_desc);
+ if (ret == NRF_SUCCESS)
+ {
+ ret = NRF_ERROR_IO_PENDING;
+ }
+ }
+ }
+ else if (p_cdc_acm_ctx->rx_transfer[1].p_buf == NULL)
+ {
+ p_cdc_acm_ctx->rx_transfer[1].p_buf = p_buf;
+ p_cdc_acm_ctx->rx_transfer[1].read_left = length;
+ ret = NRF_ERROR_IO_PENDING;
+ }
+ else
+ {
+ ret = NRF_ERROR_BUSY;
+ }
+#if (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE == 0)
+ CRITICAL_REGION_EXIT();
+#endif // (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE == 0)
+
+ return ret;
+}
+
+ret_code_t app_usbd_cdc_acm_read_any(app_usbd_cdc_acm_t const * p_cdc_acm,
+ void * p_buf,
+ size_t length)
+{
+ ASSERT(p_buf != NULL);
+ ret_code_t ret;
+ app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
+
+ if (0U == (p_cdc_acm_ctx->line_state & APP_USBD_CDC_ACM_LINE_STATE_DTR))
+ {
+ /*Port is not opened*/
+ return NRF_ERROR_INVALID_STATE;
+ }
+
+#if (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE == 0)
+ CRITICAL_REGION_ENTER();
+#endif // (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE == 0)
+ if (p_cdc_acm_ctx->bytes_left > 0)
+ {
+ size_t to_copy = MIN(length, p_cdc_acm_ctx->bytes_left);
+ memcpy(p_buf, p_cdc_acm_ctx->p_copy_pos, to_copy);
+ p_cdc_acm_ctx->bytes_left -= to_copy;
+ p_cdc_acm_ctx->p_copy_pos += to_copy;
+ p_cdc_acm_ctx->last_read = to_copy;
+ ret = NRF_SUCCESS;
+ }
+ else
+ {
+ if (p_cdc_acm_ctx->rx_transfer[0].p_buf == NULL)
+ {
+ p_cdc_acm_ctx->rx_transfer[0].p_buf = p_buf;
+ p_cdc_acm_ctx->rx_transfer[0].read_left = length;
+ nrf_drv_usbd_ep_t ep = data_ep_out_addr_get(app_usbd_cdc_acm_class_inst_get(p_cdc_acm));
+ nrf_drv_usbd_handler_desc_t const handler_desc = {
+ .handler.consumer = cdc_acm_single_shoot_consumer,
+ .p_context = p_cdc_acm_ctx
+ };
+
+ ret = app_usbd_ep_handled_transfer(ep, &handler_desc);
+ if (ret == NRF_SUCCESS)
+ {
+ ret = NRF_ERROR_IO_PENDING;
+ }
+ }
+ else
+ {
+ ret = NRF_ERROR_BUSY;
+ }
+ }
+
+#if (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE == 0)
+ CRITICAL_REGION_EXIT();
+#endif // (APP_USBD_CONFIG_EVENT_QUEUE_ENABLE == 0)
+
+ return ret;
+}
+
+static ret_code_t cdc_acm_serial_state_notify(app_usbd_cdc_acm_t const * p_cdc_acm)
+{
+ app_usbd_class_inst_t const * p_inst = app_usbd_cdc_acm_class_inst_get(p_cdc_acm);
+ app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
+
+ nrf_drv_usbd_ep_t ep = comm_ep_in_addr_get(p_inst);
+
+ NRF_DRV_USBD_TRANSFER_OUT(transfer,
+ &p_cdc_acm_ctx->request.payload,
+ sizeof(app_usbd_cdc_acm_notify_t));
+ return app_usbd_ep_transfer(ep, &transfer);
+}
+
+ret_code_t app_usbd_cdc_acm_serial_state_notify(app_usbd_cdc_acm_t const * p_cdc_acm,
+ app_usbd_cdc_acm_serial_state_t serial_state,
+ bool value)
+{
+ app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
+
+ ret_code_t ret;
+ CRITICAL_REGION_ENTER();
+ ret = NRF_SUCCESS;
+ switch (serial_state)
+ {
+ case APP_USBD_CDC_ACM_SERIAL_STATE_DCD:
+ case APP_USBD_CDC_ACM_SERIAL_STATE_DSR:
+ case APP_USBD_CDC_ACM_SERIAL_STATE_BREAK:
+ case APP_USBD_CDC_ACM_SERIAL_STATE_RING:
+ case APP_USBD_CDC_ACM_SERIAL_STATE_FRAMING:
+ case APP_USBD_CDC_ACM_SERIAL_STATE_PARITY:
+ case APP_USBD_CDC_ACM_SERIAL_STATE_OVERRUN:
+
+ if (value)
+ {
+ p_cdc_acm_ctx->serial_state |= serial_state;
+ }
+ else
+ {
+ p_cdc_acm_ctx->serial_state &= ~serial_state;
+ }
+
+ break;
+ default:
+ ret = NRF_ERROR_NOT_SUPPORTED;
+ break;
+ }
+
+ if (ret == NRF_SUCCESS)
+ {
+ app_usbd_cdc_acm_notify_t * notify = &p_cdc_acm_ctx->request.payload.notify;
+ notify->cdc_notify.bmRequestType = app_usbd_setup_req_val(APP_USBD_SETUP_REQREC_INTERFACE,
+ APP_USBD_SETUP_REQTYPE_CLASS,
+ APP_USBD_SETUP_REQDIR_IN);
+ notify->cdc_notify.bRequest = APP_USBD_CDC_NOTIF_SERIAL_STATE;
+ notify->cdc_notify.wValue = 0;
+ notify->cdc_notify.wIndex = 0;
+ notify->cdc_notify.wLength = sizeof(notify->serial_state);
+
+ notify->serial_state = p_cdc_acm_ctx->serial_state;
+
+ ret = cdc_acm_serial_state_notify(p_cdc_acm);
+ }
+ CRITICAL_REGION_EXIT();
+
+ return ret;
+}
+
+ret_code_t app_usbd_cdc_acm_line_state_get(app_usbd_cdc_acm_t const * p_cdc_acm,
+ app_usbd_cdc_acm_line_state_t line_state,
+ uint32_t * value)
+{
+ app_usbd_cdc_acm_ctx_t * p_cdc_acm_ctx = cdc_acm_ctx_get(p_cdc_acm);
+
+ ret_code_t ret;
+ CRITICAL_REGION_ENTER();
+ ret = NRF_SUCCESS;
+ switch (line_state)
+ {
+ case APP_USBD_CDC_ACM_LINE_STATE_DTR:
+ case APP_USBD_CDC_ACM_LINE_STATE_RTS:
+ *value = (p_cdc_acm_ctx->line_state & line_state) != 0;
+ break;
+ default:
+ ret = NRF_ERROR_NOT_SUPPORTED;
+ break;
+ }
+ CRITICAL_REGION_EXIT();
+
+ return ret;
+}
+
+#endif //NRF_MODULE_ENABLED(APP_USBD_CDC_ACM)
diff --git a/third_party/NordicSemiconductor/libraries/usb/class/cdc/acm/app_usbd_cdc_acm.h b/third_party/NordicSemiconductor/libraries/usb/class/cdc/acm/app_usbd_cdc_acm.h
index f6c00d0..af81dc4 100644
--- a/third_party/NordicSemiconductor/libraries/usb/class/cdc/acm/app_usbd_cdc_acm.h
+++ b/third_party/NordicSemiconductor/libraries/usb/class/cdc/acm/app_usbd_cdc_acm.h
@@ -1,362 +1,362 @@
-/**
- * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-#ifndef APP_USBD_CDC_ACM_H__
-#define APP_USBD_CDC_ACM_H__
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <stdint.h>
-#include <stdbool.h>
-
-#include "nrf_drv_usbd.h"
-#include "app_usbd_class_base.h"
-#include "app_usbd.h"
-#include "app_usbd_core.h"
-#include "app_usbd_descriptor.h"
-
-#include "app_usbd_cdc_desc.h"
-#include "app_usbd_cdc_types.h"
-#include "app_usbd_cdc_acm_internal.h"
-
-/**
- * @defgroup app_usbd_cdc_acm USB CDC ACM class
- * @ingroup app_usbd
- *
- * @brief @tagAPI52840 Module with types, definitions and API used by CDC ACM class.
- *
- * @details References:
- * - "Universal Serial Bus Class Definitions for Communications Devices"
- * Revision 1.2, November 3, 2010
- * - "Universal Serial Bus Communications Class Subclass Specification for PSTN Devices"
- * Revision 1.2, February 9, 2007
- *
- * @{
- */
-
-#ifdef DOXYGEN
-/**
- * @brief CDC ACM class instance type.
- *
- * @ref APP_USBD_CLASS_TYPEDEF
- */
-typedef struct { } app_usbd_cdc_acm_t;
-#else
-/*lint -save -e10 -e26 -e123 -e505 */
-APP_USBD_CLASS_TYPEDEF(app_usbd_cdc_acm, \
- APP_USBD_CDC_ACM_CONFIG(0, 0, 0, 0, 0), \
- APP_USBD_CDC_ACM_INSTANCE_SPECIFIC_DEC, \
- APP_USBD_CDC_ACM_DATA_SPECIFIC_DEC \
-);
-/*lint -restore*/
-#endif
-
-
-/*lint -save -e407 */
-
-/**
- * @brief Events passed to user event handler.
- *
- * @note Example prototype of user event handler:
- *
- * @code
- void cdc_acm_user_ev_handler(app_usbd_class_inst_t const * p_inst,
- app_usbd_cdc_acm_user_event_t event);
- * @endcode
- */
-typedef enum app_usbd_cdc_acm_user_event_e {
- APP_USBD_CDC_ACM_USER_EVT_RX_DONE, /**< User event RX_DONE. */
- APP_USBD_CDC_ACM_USER_EVT_TX_DONE, /**< User event TX_DONE. */
-
- APP_USBD_CDC_ACM_USER_EVT_PORT_OPEN, /**< User event PORT_OPEN. */
- APP_USBD_CDC_ACM_USER_EVT_PORT_CLOSE, /**< User event PORT_CLOSE. */
-} app_usbd_cdc_acm_user_event_t;
-
-/*lint -restore*/
-
-/**
- * @brief Default CDC ACM descriptors.
- *
- * @param comm_interface COMM interface number.
- * @param comm_epin COMM interface IN endpoint.
- * @param data_interface DATA interface number.
- * @param data_epin DATA interface IN endpoint.
- * @param data_epout DATA interface OUT endpoint.
- */
-#define APP_USBD_CDC_ACM_DEFAULT_DESC(comm_interface, \
- comm_epin, \
- data_interface, \
- data_epin, \
- data_epout) \
- APP_USBD_CDC_IAD_DSC(comm_interface, \
- APP_USBD_CDC_SUBCLASS_ACM, \
- APP_USBD_CDC_COMM_PROTOCOL_AT_V250) \
- APP_USBD_CDC_COMM_INTERFACE_DSC(comm_interface, \
- APP_USBD_CDC_SUBCLASS_ACM, \
- APP_USBD_CDC_COMM_PROTOCOL_AT_V250) \
- APP_USBD_CDC_HEADER_DSC(0x0110) \
- APP_USBD_CDC_CALL_MGMT_DSC(0x03, data_interface) \
- APP_USBD_CDC_ACM_DSC(0x02) \
- APP_USBD_CDC_UNION_DSC(comm_interface, data_interface) \
- APP_USBD_CDC_COM_EP_DSC(comm_epin, NRF_DRV_USBD_EPSIZE) \
- APP_USBD_CDC_DATA_INTERFACE_DSC(data_interface, 0, 0) \
- APP_USBD_CDC_DATA_EP_DSC(data_epin, data_epout, NRF_DRV_USBD_EPSIZE)
-
-/**
- * @brief Global definition of app_usbd_cdc_acm_t class instance.
- *
- * @param instance_name Name of global instance.
- * @param user_ev_handler User event handler (optional).
- * @param comm_ifc Interface number of cdc_acm control.
- * @param data_ifc Interface number of cdc_acm DATA.
- * @param comm_ein COMM subclass IN endpoint.
- * @param data_ein DATA subclass IN endpoint.
- * @param data_eout DATA subclass OUT endpoint.
- * @param cdc_protocol CDC protocol @ref app_usbd_cdc_comm_protocol_t
- *
- * @note This macro is just simplified version of @ref APP_USBD_CDC_ACM_GLOBAL_DEF_INTERNAL.
- *
- */
-#define APP_USBD_CDC_ACM_GLOBAL_DEF(instance_name, \
- user_ev_handler, \
- comm_ifc, \
- data_ifc, \
- comm_ein, \
- data_ein, \
- data_eout, \
- cdc_protocol) \
- APP_USBD_CDC_ACM_GLOBAL_DEF_INTERNAL(instance_name, \
- user_ev_handler, \
- comm_ifc, \
- data_ifc, \
- comm_ein, \
- data_ein, \
- data_eout, \
- cdc_protocol) \
-
-/**
- * @brief Helper function to get class instance from CDC ACM class.
- *
- * @param[in] p_cdc_acm CDC ACM class instance (defined by @ref APP_USBD_CDC_ACM_GLOBAL_DEF).
- *
- * @return Base class instance.
- */
-static inline app_usbd_class_inst_t const *
-app_usbd_cdc_acm_class_inst_get(app_usbd_cdc_acm_t const * p_cdc_acm)
-{
- return &p_cdc_acm->base;
-}
-
-/**
- * @brief Helper function to get cdc_acm specific request from cdc_acm class.
- *
- * @param[in] p_cdc_acm CDC ACM class instance (defined by @ref APP_USBD_CDC_ACM_GLOBAL_DEF).
- *
- * @return CDC ACM class specific request.
- */
-static inline app_usbd_cdc_acm_req_t *
-app_usbd_cdc_acm_class_request_get(app_usbd_cdc_acm_t const * p_cdc_acm)
-{
- return &p_cdc_acm->specific.p_data->ctx.request;
-}
-
-/**
- * @brief Helper function to get cdc_acm from base class instance.
- *
- * @param[in] p_inst Base class instance.
- *
- * @return CDC ACM class handle.
- */
-static inline app_usbd_cdc_acm_t const *
-app_usbd_cdc_acm_class_get(app_usbd_class_inst_t const * p_inst)
-{
- return (app_usbd_cdc_acm_t const *)p_inst;
-}
-
-
-/**
- * @brief Writes data to CDC ACM serial port.
- *
- * This is asynchronous call. User should wait for @ref APP_USBD_CDC_ACM_USER_EVT_TX_DONE event
- * to be sure that all data has been sent and input buffer could be accessed again.
- *
- * @param[in] p_cdc_acm CDC ACM class instance (defined by @ref APP_USBD_CDC_ACM_GLOBAL_DEF).
- * @param[in] p_buf Input buffer.
- * @param[in] length Input buffer length.
- *
- * @return Standard error code.
- */
-ret_code_t app_usbd_cdc_acm_write(app_usbd_cdc_acm_t const * p_cdc_acm,
- const void * p_buf,
- size_t length);
-
-/**
- * @brief Returns the amount of data that was read.
- *
- * This function should be used on @ref APP_USBD_CDC_ACM_USER_EVT_RX_DONE event to get
- * information how many bytes have been transfered into user buffer.
- *
- * @param[in] p_cdc_acm CDC ACM class instance (defined by @ref APP_USBD_CDC_ACM_GLOBAL_DEF).
- *
- * @return Amount of data transfered.
- */
-size_t app_usbd_cdc_acm_rx_size(app_usbd_cdc_acm_t const * p_cdc_acm);
-
-/**
- * @brief Returns the amount of data that was stored into internal buffer
- *
- * This function should be used on @ref APP_USBD_CDC_ACM_USER_EVT_RX_DONE event to get
- * information how many bytes are waiting in internal buffer.
- *
- * @param[in] p_cdc_acm CDC ACM class instance (defined by @ref APP_USBD_CDC_ACM_GLOBAL_DEF).
- *
- * @return Amount of data waiting.
- */
-size_t app_usbd_cdc_acm_bytes_stored(app_usbd_cdc_acm_t const * p_cdc_acm);
-
-/**
- * @brief Reads data from CDC ACM serial port.
- *
- * This function uses internal buffer and double buffering for continuous transmission.
- *
- * If there is enough data in internal buffer to fill user buffer, NRF_SUCCESS is
- * returned and data is immediately available in the user buffer.
- *
- * If not, up to two user buffers can be scheduled, function returns NRF_ERROR_IO_PENDING
- * when first buffer is filled and @ref APP_USBD_CDC_ACM_USER_EVT_RX_DONE event is generated.
- *
- * @sa app_usbd_cdc_acm_read_any
- * @sa app_usbd_cdc_acm_rx_size
- *
- * @param[in] p_cdc_acm CDC ACM class instance (defined by @ref APP_USBD_CDC_ACM_GLOBAL_DEF).
- * @param[out] p_buf Output buffer.
- * @param[in] length Number of bytes to read.
- *
- * @retval NRF_SUCCESS Data is stored into user buffer.
- * @retval NRF_ERROR_IO_PENDING Awaiting transmission, when data is stored into user buffer,
- * @ref APP_USBD_CDC_ACM_USER_EVT_RX_DONE event will be raised.
- * @retval NRF_ERROR_BUSY There are already 2 buffers queued for transfers.
- * @retval other Standard error code.
- */
-ret_code_t app_usbd_cdc_acm_read(app_usbd_cdc_acm_t const * p_cdc_acm,
- void * p_buf,
- size_t length);
-
-/**
- * @brief Read any data from CDC ACM port up to given buffer size
- *
- * This function is very similar to the @ref app_usbd_cdc_acm_read but it returns
- * data as quick as any data is available, even if the given buffer was not totally full.
- *
- * @note This function cannot use double buffering.
- * @note To check the number of bytes really read use @ref app_usbd_cdc_acm_rx_size
- * function.
- *
- * @sa app_usbd_cdc_acm_read
- * @sa app_usbd_cdc_acm_rx_size
- *
- * @param p_cdc_acm CDC ACM class instance (defined by @ref APP_USBD_CDC_ACM_GLOBAL_DEF).
- * @param[out] p_buf Output buffer.
- * @param[in] length Maximum number of bytes to read.
- *
- * @retval NRF_SUCCESS Data is stored into user buffer.
- * @retval NRF_ERROR_IO_PENDING Awaiting transmission, when data is stored into user buffer,
- * @ref APP_USBD_CDC_ACM_USER_EVT_RX_DONE event will be raised.
- * @retval NRF_ERROR_BUSY There is already buffer set for a transfer.
- * @retval other Standard error code.
- */
-ret_code_t app_usbd_cdc_acm_read_any(app_usbd_cdc_acm_t const * p_cdc_acm,
- void * p_buf,
- size_t length);
-
-/**
- * @brief Serial state notifications.
- * */
-typedef enum {
- APP_USBD_CDC_ACM_SERIAL_STATE_DCD = (1u << 0), /**< Notification bit DCD. */
- APP_USBD_CDC_ACM_SERIAL_STATE_DSR = (1u << 1), /**< Notification bit DSR. */
- APP_USBD_CDC_ACM_SERIAL_STATE_BREAK = (1u << 2), /**< Notification bit BREAK. */
- APP_USBD_CDC_ACM_SERIAL_STATE_RING = (1u << 3), /**< Notification bit RING. */
- APP_USBD_CDC_ACM_SERIAL_STATE_FRAMING = (1u << 4), /**< Notification bit FRAMING.*/
- APP_USBD_CDC_ACM_SERIAL_STATE_PARITY = (1u << 5), /**< Notification bit PARITY. */
- APP_USBD_CDC_ACM_SERIAL_STATE_OVERRUN = (1u << 6), /**< Notification bit OVERRUN.*/
-} app_usbd_cdc_acm_serial_state_t;
-
-/**
- * @brief Serial line state.
- */
-typedef enum {
- APP_USBD_CDC_ACM_LINE_STATE_DTR = (1u << 0), /**< Line state bit DTR.*/
- APP_USBD_CDC_ACM_LINE_STATE_RTS = (1u << 1), /**< Line state bit RTS.*/
-} app_usbd_cdc_acm_line_state_t;
-
-/**
- * @brief Serial state notification via IN interrupt endpoint.
- *
- * @param[in] p_cdc_acm CDC ACM class instance (defined by @ref APP_USBD_CDC_ACM_GLOBAL_DEF).
- * @param[in] serial_state Serial state notification type.
- * @param[in] value Serial state value.
- *
- * @return Standard error code.
- */
-ret_code_t app_usbd_cdc_acm_serial_state_notify(app_usbd_cdc_acm_t const * p_cdc_acm,
- app_usbd_cdc_acm_serial_state_t serial_state,
- bool value);
-
-/**
- * @brief Control line value get.
- *
- * @param[in] p_cdc_acm CDC ACM class instance (defined by @ref APP_USBD_CDC_ACM_GLOBAL_DEF).
- * @param[in] line_state Line control value type.
- * @param[out] value Line control value.
- *
- * @return Standard error code.
- */
-ret_code_t app_usbd_cdc_acm_line_state_get(app_usbd_cdc_acm_t const * p_cdc_acm,
- app_usbd_cdc_acm_line_state_t line_state,
- uint32_t * value);
-
-/** @} */
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* APP_USBD_CDC_ACM_H__ */
+/**
+ * Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#ifndef APP_USBD_CDC_ACM_H__
+#define APP_USBD_CDC_ACM_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "nrf_drv_usbd.h"
+#include "app_usbd_class_base.h"
+#include "app_usbd.h"
+#include "app_usbd_core.h"
+#include "app_usbd_descriptor.h"
+
+#include "app_usbd_cdc_desc.h"
+#include "app_usbd_cdc_types.h"
+#include "app_usbd_cdc_acm_internal.h"
+
+/**
+ * @defgroup app_usbd_cdc_acm USB CDC ACM class
+ * @ingroup app_usbd
+ *
+ * @brief @tagAPI52840 Module with types, definitions and API used by CDC ACM class.
+ *
+ * @details References:
+ * - "Universal Serial Bus Class Definitions for Communications Devices"
+ * Revision 1.2, November 3, 2010
+ * - "Universal Serial Bus Communications Class Subclass Specification for PSTN Devices"
+ * Revision 1.2, February 9, 2007
+ *
+ * @{
+ */
+
+#ifdef DOXYGEN
+/**
+ * @brief CDC ACM class instance type.
+ *
+ * @ref APP_USBD_CLASS_TYPEDEF
+ */
+typedef struct { } app_usbd_cdc_acm_t;
+#else
+/*lint -save -e10 -e26 -e123 -e505 */
+APP_USBD_CLASS_TYPEDEF(app_usbd_cdc_acm, \
+ APP_USBD_CDC_ACM_CONFIG(0, 0, 0, 0, 0), \
+ APP_USBD_CDC_ACM_INSTANCE_SPECIFIC_DEC, \
+ APP_USBD_CDC_ACM_DATA_SPECIFIC_DEC \
+);
+/*lint -restore*/
+#endif
+
+
+/*lint -save -e407 */
+
+/**
+ * @brief Events passed to user event handler.
+ *
+ * @note Example prototype of user event handler:
+ *
+ * @code
+ void cdc_acm_user_ev_handler(app_usbd_class_inst_t const * p_inst,
+ app_usbd_cdc_acm_user_event_t event);
+ * @endcode
+ */
+typedef enum app_usbd_cdc_acm_user_event_e {
+ APP_USBD_CDC_ACM_USER_EVT_RX_DONE, /**< User event RX_DONE. */
+ APP_USBD_CDC_ACM_USER_EVT_TX_DONE, /**< User event TX_DONE. */
+
+ APP_USBD_CDC_ACM_USER_EVT_PORT_OPEN, /**< User event PORT_OPEN. */
+ APP_USBD_CDC_ACM_USER_EVT_PORT_CLOSE, /**< User event PORT_CLOSE. */
+} app_usbd_cdc_acm_user_event_t;
+
+/*lint -restore*/
+
+/**
+ * @brief Default CDC ACM descriptors.
+ *
+ * @param comm_interface COMM interface number.
+ * @param comm_epin COMM interface IN endpoint.
+ * @param data_interface DATA interface number.
+ * @param data_epin DATA interface IN endpoint.
+ * @param data_epout DATA interface OUT endpoint.
+ */
+#define APP_USBD_CDC_ACM_DEFAULT_DESC(comm_interface, \
+ comm_epin, \
+ data_interface, \
+ data_epin, \
+ data_epout) \
+ APP_USBD_CDC_IAD_DSC(comm_interface, \
+ APP_USBD_CDC_SUBCLASS_ACM, \
+ APP_USBD_CDC_COMM_PROTOCOL_AT_V250) \
+ APP_USBD_CDC_COMM_INTERFACE_DSC(comm_interface, \
+ APP_USBD_CDC_SUBCLASS_ACM, \
+ APP_USBD_CDC_COMM_PROTOCOL_AT_V250) \
+ APP_USBD_CDC_HEADER_DSC(0x0110) \
+ APP_USBD_CDC_CALL_MGMT_DSC(0x03, data_interface) \
+ APP_USBD_CDC_ACM_DSC(0x02) \
+ APP_USBD_CDC_UNION_DSC(comm_interface, data_interface) \
+ APP_USBD_CDC_COM_EP_DSC(comm_epin, NRF_DRV_USBD_EPSIZE) \
+ APP_USBD_CDC_DATA_INTERFACE_DSC(data_interface, 0, 0) \
+ APP_USBD_CDC_DATA_EP_DSC(data_epin, data_epout, NRF_DRV_USBD_EPSIZE)
+
+/**
+ * @brief Global definition of app_usbd_cdc_acm_t class instance.
+ *
+ * @param instance_name Name of global instance.
+ * @param user_ev_handler User event handler (optional).
+ * @param comm_ifc Interface number of cdc_acm control.
+ * @param data_ifc Interface number of cdc_acm DATA.
+ * @param comm_ein COMM subclass IN endpoint.
+ * @param data_ein DATA subclass IN endpoint.
+ * @param data_eout DATA subclass OUT endpoint.
+ * @param cdc_protocol CDC protocol @ref app_usbd_cdc_comm_protocol_t
+ *
+ * @note This macro is just simplified version of @ref APP_USBD_CDC_ACM_GLOBAL_DEF_INTERNAL.
+ *
+ */
+#define APP_USBD_CDC_ACM_GLOBAL_DEF(instance_name, \
+ user_ev_handler, \
+ comm_ifc, \
+ data_ifc, \
+ comm_ein, \
+ data_ein, \
+ data_eout, \
+ cdc_protocol) \
+ APP_USBD_CDC_ACM_GLOBAL_DEF_INTERNAL(instance_name, \
+ user_ev_handler, \
+ comm_ifc, \
+ data_ifc, \
+ comm_ein, \
+ data_ein, \
+ data_eout, \
+ cdc_protocol) \
+
+/**
+ * @brief Helper function to get class instance from CDC ACM class.
+ *
+ * @param[in] p_cdc_acm CDC ACM class instance (defined by @ref APP_USBD_CDC_ACM_GLOBAL_DEF).
+ *
+ * @return Base class instance.
+ */
+static inline app_usbd_class_inst_t const *
+app_usbd_cdc_acm_class_inst_get(app_usbd_cdc_acm_t const * p_cdc_acm)
+{
+ return &p_cdc_acm->base;
+}
+
+/**
+ * @brief Helper function to get cdc_acm specific request from cdc_acm class.
+ *
+ * @param[in] p_cdc_acm CDC ACM class instance (defined by @ref APP_USBD_CDC_ACM_GLOBAL_DEF).
+ *
+ * @return CDC ACM class specific request.
+ */
+static inline app_usbd_cdc_acm_req_t *
+app_usbd_cdc_acm_class_request_get(app_usbd_cdc_acm_t const * p_cdc_acm)
+{
+ return &p_cdc_acm->specific.p_data->ctx.request;
+}
+
+/**
+ * @brief Helper function to get cdc_acm from base class instance.
+ *
+ * @param[in] p_inst Base class instance.
+ *
+ * @return CDC ACM class handle.
+ */
+static inline app_usbd_cdc_acm_t const *
+app_usbd_cdc_acm_class_get(app_usbd_class_inst_t const * p_inst)
+{
+ return (app_usbd_cdc_acm_t const *)p_inst;
+}
+
+
+/**
+ * @brief Writes data to CDC ACM serial port.
+ *
+ * This is asynchronous call. User should wait for @ref APP_USBD_CDC_ACM_USER_EVT_TX_DONE event
+ * to be sure that all data has been sent and input buffer could be accessed again.
+ *
+ * @param[in] p_cdc_acm CDC ACM class instance (defined by @ref APP_USBD_CDC_ACM_GLOBAL_DEF).
+ * @param[in] p_buf Input buffer.
+ * @param[in] length Input buffer length.
+ *
+ * @return Standard error code.
+ */
+ret_code_t app_usbd_cdc_acm_write(app_usbd_cdc_acm_t const * p_cdc_acm,
+ const void * p_buf,
+ size_t length);
+
+/**
+ * @brief Returns the amount of data that was read.
+ *
+ * This function should be used on @ref APP_USBD_CDC_ACM_USER_EVT_RX_DONE event to get
+ * information how many bytes have been transfered into user buffer.
+ *
+ * @param[in] p_cdc_acm CDC ACM class instance (defined by @ref APP_USBD_CDC_ACM_GLOBAL_DEF).
+ *
+ * @return Amount of data transfered.
+ */
+size_t app_usbd_cdc_acm_rx_size(app_usbd_cdc_acm_t const * p_cdc_acm);
+
+/**
+ * @brief Returns the amount of data that was stored into internal buffer
+ *
+ * This function should be used on @ref APP_USBD_CDC_ACM_USER_EVT_RX_DONE event to get
+ * information how many bytes are waiting in internal buffer.
+ *
+ * @param[in] p_cdc_acm CDC ACM class instance (defined by @ref APP_USBD_CDC_ACM_GLOBAL_DEF).
+ *
+ * @return Amount of data waiting.
+ */
+size_t app_usbd_cdc_acm_bytes_stored(app_usbd_cdc_acm_t const * p_cdc_acm);
+
+/**
+ * @brief Reads data from CDC ACM serial port.
+ *
+ * This function uses internal buffer and double buffering for continuous transmission.
+ *
+ * If there is enough data in internal buffer to fill user buffer, NRF_SUCCESS is
+ * returned and data is immediately available in the user buffer.
+ *
+ * If not, up to two user buffers can be scheduled, function returns NRF_ERROR_IO_PENDING
+ * when first buffer is filled and @ref APP_USBD_CDC_ACM_USER_EVT_RX_DONE event is generated.
+ *
+ * @sa app_usbd_cdc_acm_read_any
+ * @sa app_usbd_cdc_acm_rx_size
+ *
+ * @param[in] p_cdc_acm CDC ACM class instance (defined by @ref APP_USBD_CDC_ACM_GLOBAL_DEF).
+ * @param[out] p_buf Output buffer.
+ * @param[in] length Number of bytes to read.
+ *
+ * @retval NRF_SUCCESS Data is stored into user buffer.
+ * @retval NRF_ERROR_IO_PENDING Awaiting transmission, when data is stored into user buffer,
+ * @ref APP_USBD_CDC_ACM_USER_EVT_RX_DONE event will be raised.
+ * @retval NRF_ERROR_BUSY There are already 2 buffers queued for transfers.
+ * @retval other Standard error code.
+ */
+ret_code_t app_usbd_cdc_acm_read(app_usbd_cdc_acm_t const * p_cdc_acm,
+ void * p_buf,
+ size_t length);
+
+/**
+ * @brief Read any data from CDC ACM port up to given buffer size
+ *
+ * This function is very similar to the @ref app_usbd_cdc_acm_read but it returns
+ * data as quick as any data is available, even if the given buffer was not totally full.
+ *
+ * @note This function cannot use double buffering.
+ * @note To check the number of bytes really read use @ref app_usbd_cdc_acm_rx_size
+ * function.
+ *
+ * @sa app_usbd_cdc_acm_read
+ * @sa app_usbd_cdc_acm_rx_size
+ *
+ * @param p_cdc_acm CDC ACM class instance (defined by @ref APP_USBD_CDC_ACM_GLOBAL_DEF).
+ * @param[out] p_buf Output buffer.
+ * @param[in] length Maximum number of bytes to read.
+ *
+ * @retval NRF_SUCCESS Data is stored into user buffer.
+ * @retval NRF_ERROR_IO_PENDING Awaiting transmission, when data is stored into user buffer,
+ * @ref APP_USBD_CDC_ACM_USER_EVT_RX_DONE event will be raised.
+ * @retval NRF_ERROR_BUSY There is already buffer set for a transfer.
+ * @retval other Standard error code.
+ */
+ret_code_t app_usbd_cdc_acm_read_any(app_usbd_cdc_acm_t const * p_cdc_acm,
+ void * p_buf,
+ size_t length);
+
+/**
+ * @brief Serial state notifications.
+ * */
+typedef enum {
+ APP_USBD_CDC_ACM_SERIAL_STATE_DCD = (1u << 0), /**< Notification bit DCD. */
+ APP_USBD_CDC_ACM_SERIAL_STATE_DSR = (1u << 1), /**< Notification bit DSR. */
+ APP_USBD_CDC_ACM_SERIAL_STATE_BREAK = (1u << 2), /**< Notification bit BREAK. */
+ APP_USBD_CDC_ACM_SERIAL_STATE_RING = (1u << 3), /**< Notification bit RING. */
+ APP_USBD_CDC_ACM_SERIAL_STATE_FRAMING = (1u << 4), /**< Notification bit FRAMING.*/
+ APP_USBD_CDC_ACM_SERIAL_STATE_PARITY = (1u << 5), /**< Notification bit PARITY. */
+ APP_USBD_CDC_ACM_SERIAL_STATE_OVERRUN = (1u << 6), /**< Notification bit OVERRUN.*/
+} app_usbd_cdc_acm_serial_state_t;
+
+/**
+ * @brief Serial line state.
+ */
+typedef enum {
+ APP_USBD_CDC_ACM_LINE_STATE_DTR = (1u << 0), /**< Line state bit DTR.*/
+ APP_USBD_CDC_ACM_LINE_STATE_RTS = (1u << 1), /**< Line state bit RTS.*/
+} app_usbd_cdc_acm_line_state_t;
+
+/**
+ * @brief Serial state notification via IN interrupt endpoint.
+ *
+ * @param[in] p_cdc_acm CDC ACM class instance (defined by @ref APP_USBD_CDC_ACM_GLOBAL_DEF).
+ * @param[in] serial_state Serial state notification type.
+ * @param[in] value Serial state value.
+ *
+ * @return Standard error code.
+ */
+ret_code_t app_usbd_cdc_acm_serial_state_notify(app_usbd_cdc_acm_t const * p_cdc_acm,
+ app_usbd_cdc_acm_serial_state_t serial_state,
+ bool value);
+
+/**
+ * @brief Control line value get.
+ *
+ * @param[in] p_cdc_acm CDC ACM class instance (defined by @ref APP_USBD_CDC_ACM_GLOBAL_DEF).
+ * @param[in] line_state Line control value type.
+ * @param[out] value Line control value.
+ *
+ * @return Standard error code.
+ */
+ret_code_t app_usbd_cdc_acm_line_state_get(app_usbd_cdc_acm_t const * p_cdc_acm,
+ app_usbd_cdc_acm_line_state_t line_state,
+ uint32_t * value);
+
+/** @} */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* APP_USBD_CDC_ACM_H__ */
diff --git a/third_party/NordicSemiconductor/libraries/usb/class/cdc/acm/app_usbd_cdc_acm_internal.h b/third_party/NordicSemiconductor/libraries/usb/class/cdc/acm/app_usbd_cdc_acm_internal.h
index 1d2d13c..8b7844d 100644
--- a/third_party/NordicSemiconductor/libraries/usb/class/cdc/acm/app_usbd_cdc_acm_internal.h
+++ b/third_party/NordicSemiconductor/libraries/usb/class/cdc/acm/app_usbd_cdc_acm_internal.h
@@ -1,287 +1,287 @@
-/**
- * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-#ifndef APP_USBD_CDC_ACM_INTERNAL_H__
-#define APP_USBD_CDC_ACM_INTERNAL_H__
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-
-#include "app_util.h"
-
-/**
- * @defgroup app_usbd_cdc_acm_internal USB CDC ACM internals
- * @ingroup app_usbd_cdc_acm
- * @brief @tagAPI52840 Internals of the USB ACM class implementation.
- * @{
- */
-
-/**
- * @brief Forward declaration of type defined by @ref APP_USBD_CLASS_TYPEDEF in cdc_acm class.
- *
- */
-APP_USBD_CLASS_FORWARD(app_usbd_cdc_acm);
-
-/*lint -save -e165*/
-/**
- * @brief Forward declaration of @ref app_usbd_cdc_acm_user_event_e.
- *
- */
-enum app_usbd_cdc_acm_user_event_e;
-
-/*lint -restore*/
-
-/**
- * @brief User event handler.
- *
- * @param[in] p_inst Class instance.
- * @param[in] event User event.
- *
- */
-typedef void (*app_usbd_cdc_acm_user_ev_handler_t)(app_usbd_class_inst_t const * p_inst,
- enum app_usbd_cdc_acm_user_event_e event);
-
-/**
- * @brief CDC ACM class part of class instance data.
- */
-typedef struct {
- uint8_t comm_interface; //!< Interface number of cdc_acm control.
- uint8_t comm_epin; //!< COMM subclass IN endpoint.
- uint8_t data_interface; //!< Interface number of cdc_acm DATA.
- uint8_t data_epout; //!< DATA subclass OUT endpoint.
- uint8_t data_epin; //!< DATA subclass IN endpoint.
-
- app_usbd_cdc_comm_protocol_t protocol; //!< User specified CDC protocol.
-
- app_usbd_cdc_acm_user_ev_handler_t user_ev_handler; //!< User event handler.
-
- uint8_t * p_ep_interval; //!< Endpoint intervals.
-} app_usbd_cdc_acm_inst_t;
-
-
-/**
- * @brief CDC ACM serial state class notify.
- */
-typedef struct {
- app_usbd_cdc_notify_t cdc_notify; //!< CDC notify.
- uint16_t serial_state; //!< Serial port state.
-} app_usbd_cdc_acm_notify_t;
-
-/**
- * @brief CDC ACM class specific request handled via control endpoint.
- */
-typedef struct {
- uint8_t type; //!< Request type.
- uint8_t len; //!< Request length.
-
- union {
- app_usbd_cdc_line_coding_t line_coding; //!< CDC ACM current line coding.
- app_usbd_cdc_acm_notify_t notify; //!< CDC ACM class notify.
- } payload;
-} app_usbd_cdc_acm_req_t;
-
-/**
- * @brief CDC ACM rx transfer buffer.
- */
-typedef struct {
- uint8_t * p_buf; //!< User buffer pointer.
- size_t read_left; //!< Bytes left to read into buffer.
-} cdc_rx_buffer_t;
-
-/**
- * @brief CDC ACM class context.
- */
-typedef struct {
- app_usbd_cdc_acm_req_t request; //!< CDC ACM class request.
- app_usbd_cdc_line_coding_t line_coding; //!< CDC ACM current line coding.
-
- uint16_t line_state; //!< CDC ACM line state bitmap, DTE side.
- uint16_t serial_state; //!< CDC ACM serial state bitmap, DCE side.
-
- cdc_rx_buffer_t rx_transfer[2]; //!< User receive transfers.
-
- uint8_t internal_rx_buf[NRF_DRV_USBD_EPSIZE]; //!< Internal receive buffer.
- uint8_t * p_copy_pos; //!< Current copy position from internal buffer.
-
- size_t bytes_left; //!< Bytes left in internal buffer to copy.
- size_t bytes_read; //!< Bytes currently written to user buffer.
- size_t last_read; //!< Bytes read in last transfer.
- size_t cur_read; //!< Bytes currently read to internal buffer.
-} app_usbd_cdc_acm_ctx_t;
-
-/**
- * @brief Default interval value for comm endpoint IN
- *
- */
-#define APP_USBD_CDC_ACM_DEFAULT_INTERVAL 0x10
-
-/**
- * @brief CDC ACM class configuration macro.
- *
- * Used by @ref APP_USBD_CDC_ACM_GLOBAL_DEF
- *
- * @param iface_comm Interface number of cdc_acm control.
- * @param epin_comm COMM subclass IN endpoint.
- * @param iface_data Interface number of cdc_acm DATA.
- * @param epin_data DATA subclass IN endpoint.
- * @param epout_data DATA subclass OUT endpoint.
- *
- */
-#define APP_USBD_CDC_ACM_CONFIG(iface_comm, epin_comm, iface_data, epin_data, epout_data) \
- ((iface_comm, epin_comm), \
- (iface_data, epin_data, epout_data))
-
-
-/**
- * @brief Specific class constant data for cdc_acm class.
- *
- * @ref app_usbd_cdc_acm_inst_t
- */
-#define APP_USBD_CDC_ACM_INSTANCE_SPECIFIC_DEC app_usbd_cdc_acm_inst_t inst;
-
-
-/**
- * @brief Configures cdc_acm class instance.
- *
- * @param user_event_handler User event handler.
- * @param comm_ifc Interface number of cdc_acm control.
- * @param comm_ein COMM subclass IN endpoint.
- * @param data_ifc Interface number of cdc_acm DATA.
- * @param data_ein DATA subclass IN endpoint.
- * @param data_eout DATA subclass OUT endpoint.
- * @param cdc_protocol CDC protocol.
- * @param ep_list List of endpoints and intervals
- */
-#define APP_USBD_CDC_ACM_INST_CONFIG(user_event_handler, \
- comm_ifc, \
- comm_ein, \
- data_ifc, \
- data_ein, \
- data_eout, \
- cdc_protocol, \
- ep_list) \
- .inst = { \
- .user_ev_handler = user_event_handler, \
- .comm_interface = comm_ifc, \
- .comm_epin = comm_ifc, \
- .data_interface = data_ifc, \
- .data_epin = data_ein, \
- .data_epout = data_eout, \
- .protocol = cdc_protocol, \
- .p_ep_interval = ep_list \
- }
-
-/**
- * @brief Specific class data for cdc_acm class.
- *
- * @ref app_usbd_cdc_acm_ctx_t
- */
-#define APP_USBD_CDC_ACM_DATA_SPECIFIC_DEC app_usbd_cdc_acm_ctx_t ctx;
-
-
-/**
- * @brief CDC ACM class descriptors config macro.
- *
- * @param interface_number Interface number.
- * @param ... Extracted endpoint list.
- */
-#define APP_USBD_CDC_ACM_DSC_CONFIG(interface_number, ...) { \
- APP_USBD_CDC_ACM_INTERFACE_DSC(interface_number, \
- 0, \
- 0, \
- APP_USBD_CDC_ACM_SUBCLASS_CDC_ACMCONTROL) \
-}
-
-/**
- * @brief Public cdc_acm class interface.
- *
- */
-extern const app_usbd_class_methods_t app_usbd_cdc_acm_class_methods;
-
-/**
- * @brief Global definition of @ref app_usbd_cdc_acm_t class.
- *
- * @param instance_name Name of global instance.
- * @param user_ev_handler User event handler.
- * @param comm_ifc Interface number of cdc_acm control.
- * @param data_ifc Interface number of cdc_acm DATA.
- * @param comm_ein COMM subclass IN endpoint.
- * @param data_ein DATA subclass IN endpoint.
- * @param data_eout DATA subclass OUT endpoint.
- * @param cdc_protocol CDC protocol @ref app_usbd_cdc_comm_protocol_t
- */
-/*lint -save -emacro(26 64 123 505 572 651, APP_USBD_CDC_ACM_GLOBAL_DEF_INTERNAL)*/
-#define APP_USBD_CDC_ACM_GLOBAL_DEF_INTERNAL(instance_name, \
- user_ev_handler, \
- comm_ifc, \
- data_ifc, \
- comm_ein, \
- data_ein, \
- data_eout, \
- cdc_protocol) \
- static uint8_t CONCAT_2(instance_name, _ep) = { \
- (APP_USBD_EXTRACT_INTERVAL_FLAG(comm_ein) ? APP_USBD_EXTRACT_INTERVAL_VALUE(comm_ein) \
- : APP_USBD_CDC_ACM_DEFAULT_INTERVAL)}; \
- APP_USBD_CLASS_INST_GLOBAL_DEF( \
- instance_name, \
- app_usbd_cdc_acm, \
- &app_usbd_cdc_acm_class_methods, \
- APP_USBD_CDC_ACM_CONFIG(comm_ifc, comm_ein, data_ifc, data_ein, data_eout), \
- (APP_USBD_CDC_ACM_INST_CONFIG(user_ev_handler, \
- comm_ifc, \
- comm_ein, \
- data_ifc, \
- data_ein, \
- data_eout, \
- cdc_protocol, \
- &CONCAT_2(instance_name, _ep))) \
- )
-/*lint -restore*/
-
-/** @} */
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* APP_USBD_CDC_ACM_INTERNAL_H__ */
+/**
+ * Copyright (c) 2016 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#ifndef APP_USBD_CDC_ACM_INTERNAL_H__
+#define APP_USBD_CDC_ACM_INTERNAL_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#include "app_util.h"
+
+/**
+ * @defgroup app_usbd_cdc_acm_internal USB CDC ACM internals
+ * @ingroup app_usbd_cdc_acm
+ * @brief @tagAPI52840 Internals of the USB ACM class implementation.
+ * @{
+ */
+
+/**
+ * @brief Forward declaration of type defined by @ref APP_USBD_CLASS_TYPEDEF in cdc_acm class.
+ *
+ */
+APP_USBD_CLASS_FORWARD(app_usbd_cdc_acm);
+
+/*lint -save -e165*/
+/**
+ * @brief Forward declaration of @ref app_usbd_cdc_acm_user_event_e.
+ *
+ */
+enum app_usbd_cdc_acm_user_event_e;
+
+/*lint -restore*/
+
+/**
+ * @brief User event handler.
+ *
+ * @param[in] p_inst Class instance.
+ * @param[in] event User event.
+ *
+ */
+typedef void (*app_usbd_cdc_acm_user_ev_handler_t)(app_usbd_class_inst_t const * p_inst,
+ enum app_usbd_cdc_acm_user_event_e event);
+
+/**
+ * @brief CDC ACM class part of class instance data.
+ */
+typedef struct {
+ uint8_t comm_interface; //!< Interface number of cdc_acm control.
+ uint8_t comm_epin; //!< COMM subclass IN endpoint.
+ uint8_t data_interface; //!< Interface number of cdc_acm DATA.
+ uint8_t data_epout; //!< DATA subclass OUT endpoint.
+ uint8_t data_epin; //!< DATA subclass IN endpoint.
+
+ app_usbd_cdc_comm_protocol_t protocol; //!< User specified CDC protocol.
+
+ app_usbd_cdc_acm_user_ev_handler_t user_ev_handler; //!< User event handler.
+
+ uint8_t * p_ep_interval; //!< Endpoint intervals.
+} app_usbd_cdc_acm_inst_t;
+
+
+/**
+ * @brief CDC ACM serial state class notify.
+ */
+typedef struct {
+ app_usbd_cdc_notify_t cdc_notify; //!< CDC notify.
+ uint16_t serial_state; //!< Serial port state.
+} app_usbd_cdc_acm_notify_t;
+
+/**
+ * @brief CDC ACM class specific request handled via control endpoint.
+ */
+typedef struct {
+ uint8_t type; //!< Request type.
+ uint8_t len; //!< Request length.
+
+ union {
+ app_usbd_cdc_line_coding_t line_coding; //!< CDC ACM current line coding.
+ app_usbd_cdc_acm_notify_t notify; //!< CDC ACM class notify.
+ } payload;
+} app_usbd_cdc_acm_req_t;
+
+/**
+ * @brief CDC ACM rx transfer buffer.
+ */
+typedef struct {
+ uint8_t * p_buf; //!< User buffer pointer.
+ size_t read_left; //!< Bytes left to read into buffer.
+} cdc_rx_buffer_t;
+
+/**
+ * @brief CDC ACM class context.
+ */
+typedef struct {
+ app_usbd_cdc_acm_req_t request; //!< CDC ACM class request.
+ app_usbd_cdc_line_coding_t line_coding; //!< CDC ACM current line coding.
+
+ uint16_t line_state; //!< CDC ACM line state bitmap, DTE side.
+ uint16_t serial_state; //!< CDC ACM serial state bitmap, DCE side.
+
+ cdc_rx_buffer_t rx_transfer[2]; //!< User receive transfers.
+
+ uint8_t internal_rx_buf[NRF_DRV_USBD_EPSIZE]; //!< Internal receive buffer.
+ uint8_t * p_copy_pos; //!< Current copy position from internal buffer.
+
+ size_t bytes_left; //!< Bytes left in internal buffer to copy.
+ size_t bytes_read; //!< Bytes currently written to user buffer.
+ size_t last_read; //!< Bytes read in last transfer.
+ size_t cur_read; //!< Bytes currently read to internal buffer.
+} app_usbd_cdc_acm_ctx_t;
+
+/**
+ * @brief Default interval value for comm endpoint IN
+ *
+ */
+#define APP_USBD_CDC_ACM_DEFAULT_INTERVAL 0x10
+
+/**
+ * @brief CDC ACM class configuration macro.
+ *
+ * Used by @ref APP_USBD_CDC_ACM_GLOBAL_DEF
+ *
+ * @param iface_comm Interface number of cdc_acm control.
+ * @param epin_comm COMM subclass IN endpoint.
+ * @param iface_data Interface number of cdc_acm DATA.
+ * @param epin_data DATA subclass IN endpoint.
+ * @param epout_data DATA subclass OUT endpoint.
+ *
+ */
+#define APP_USBD_CDC_ACM_CONFIG(iface_comm, epin_comm, iface_data, epin_data, epout_data) \
+ ((iface_comm, epin_comm), \
+ (iface_data, epin_data, epout_data))
+
+
+/**
+ * @brief Specific class constant data for cdc_acm class.
+ *
+ * @ref app_usbd_cdc_acm_inst_t
+ */
+#define APP_USBD_CDC_ACM_INSTANCE_SPECIFIC_DEC app_usbd_cdc_acm_inst_t inst;
+
+
+/**
+ * @brief Configures cdc_acm class instance.
+ *
+ * @param user_event_handler User event handler.
+ * @param comm_ifc Interface number of cdc_acm control.
+ * @param comm_ein COMM subclass IN endpoint.
+ * @param data_ifc Interface number of cdc_acm DATA.
+ * @param data_ein DATA subclass IN endpoint.
+ * @param data_eout DATA subclass OUT endpoint.
+ * @param cdc_protocol CDC protocol.
+ * @param ep_list List of endpoints and intervals
+ */
+#define APP_USBD_CDC_ACM_INST_CONFIG(user_event_handler, \
+ comm_ifc, \
+ comm_ein, \
+ data_ifc, \
+ data_ein, \
+ data_eout, \
+ cdc_protocol, \
+ ep_list) \
+ .inst = { \
+ .user_ev_handler = user_event_handler, \
+ .comm_interface = comm_ifc, \
+ .comm_epin = comm_ifc, \
+ .data_interface = data_ifc, \
+ .data_epin = data_ein, \
+ .data_epout = data_eout, \
+ .protocol = cdc_protocol, \
+ .p_ep_interval = ep_list \
+ }
+
+/**
+ * @brief Specific class data for cdc_acm class.
+ *
+ * @ref app_usbd_cdc_acm_ctx_t
+ */
+#define APP_USBD_CDC_ACM_DATA_SPECIFIC_DEC app_usbd_cdc_acm_ctx_t ctx;
+
+
+/**
+ * @brief CDC ACM class descriptors config macro.
+ *
+ * @param interface_number Interface number.
+ * @param ... Extracted endpoint list.
+ */
+#define APP_USBD_CDC_ACM_DSC_CONFIG(interface_number, ...) { \
+ APP_USBD_CDC_ACM_INTERFACE_DSC(interface_number, \
+ 0, \
+ 0, \
+ APP_USBD_CDC_ACM_SUBCLASS_CDC_ACMCONTROL) \
+}
+
+/**
+ * @brief Public cdc_acm class interface.
+ *
+ */
+extern const app_usbd_class_methods_t app_usbd_cdc_acm_class_methods;
+
+/**
+ * @brief Global definition of @ref app_usbd_cdc_acm_t class.
+ *
+ * @param instance_name Name of global instance.
+ * @param user_ev_handler User event handler.
+ * @param comm_ifc Interface number of cdc_acm control.
+ * @param data_ifc Interface number of cdc_acm DATA.
+ * @param comm_ein COMM subclass IN endpoint.
+ * @param data_ein DATA subclass IN endpoint.
+ * @param data_eout DATA subclass OUT endpoint.
+ * @param cdc_protocol CDC protocol @ref app_usbd_cdc_comm_protocol_t
+ */
+/*lint -save -emacro(26 64 123 505 572 651, APP_USBD_CDC_ACM_GLOBAL_DEF_INTERNAL)*/
+#define APP_USBD_CDC_ACM_GLOBAL_DEF_INTERNAL(instance_name, \
+ user_ev_handler, \
+ comm_ifc, \
+ data_ifc, \
+ comm_ein, \
+ data_ein, \
+ data_eout, \
+ cdc_protocol) \
+ static uint8_t CONCAT_2(instance_name, _ep) = { \
+ (APP_USBD_EXTRACT_INTERVAL_FLAG(comm_ein) ? APP_USBD_EXTRACT_INTERVAL_VALUE(comm_ein) \
+ : APP_USBD_CDC_ACM_DEFAULT_INTERVAL)}; \
+ APP_USBD_CLASS_INST_GLOBAL_DEF( \
+ instance_name, \
+ app_usbd_cdc_acm, \
+ &app_usbd_cdc_acm_class_methods, \
+ APP_USBD_CDC_ACM_CONFIG(comm_ifc, comm_ein, data_ifc, data_ein, data_eout), \
+ (APP_USBD_CDC_ACM_INST_CONFIG(user_ev_handler, \
+ comm_ifc, \
+ comm_ein, \
+ data_ifc, \
+ data_ein, \
+ data_eout, \
+ cdc_protocol, \
+ &CONCAT_2(instance_name, _ep))) \
+ )
+/*lint -restore*/
+
+/** @} */
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* APP_USBD_CDC_ACM_INTERNAL_H__ */
diff --git a/third_party/NordicSemiconductor/libraries/usb/class/cdc/app_usbd_cdc_desc.h b/third_party/NordicSemiconductor/libraries/usb/class/cdc/app_usbd_cdc_desc.h
index 4e0131c..c6c8375 100644
--- a/third_party/NordicSemiconductor/libraries/usb/class/cdc/app_usbd_cdc_desc.h
+++ b/third_party/NordicSemiconductor/libraries/usb/class/cdc/app_usbd_cdc_desc.h
@@ -1,208 +1,208 @@
-/**
- * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-#ifndef APP_USBD_CDC_DESC_H__
-#define APP_USBD_CDC_DESC_H__
-
-#include <stdint.h>
-#include <stdbool.h>
-
-#include "app_usbd_descriptor.h"
-#include "app_usbd_cdc_types.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @defgroup app_usbd_cdc_desc CDC class descriptors
- * @brief @tagAPI52840 Descriptors used in the USB CDC class implementation.
- * @ingroup app_usbd_cdc_acm
- *
- * A group of macros used to initialize CDC descriptors
- * @{
- */
-
-/**
- * @brief Initializer of IAD descriptor for CDC class.
- *
- * @param interface_number Interface number.
- * @param subclass Subclass, @ref app_usbd_cdc_subclass_t.
- * @param protocol Protocol, @ref app_usbd_cdc_comm_protocol_t.
- */
-#define APP_USBD_CDC_IAD_DSC(interface_number, subclass, protocol) \
- /*.bLength = */ sizeof(app_usbd_descriptor_iad_t), \
- /*.bDescriptorType = */ APP_USBD_DESCRIPTOR_INTERFACE_ASSOCIATION, \
- /*.bFirstInterface = */ interface_number, \
- /*.bInterfaceCount = */ 2, \
- /*.bFunctionClass = */ APP_USBD_CDC_COMM_CLASS, \
- /*.bFunctionSubClass = */ subclass, \
- /*.bFunctionProtocol = */ protocol, \
- /*.iFunction = */ 0, \
-
-/**
- * @brief Initializer of interface descriptor for CDC COMM class.
- *
- * @param interface_number Interface number.
- * @param subclass Subclass, @ref app_usbd_cdc_subclass_t.
- * @param protocol Protocol, @ref app_usbd_cdc_comm_protocol_t.
- */
-#define APP_USBD_CDC_COMM_INTERFACE_DSC(interface_number, subclass, protocol) \
- /*.bLength = */ sizeof(app_usbd_descriptor_iface_t), \
- /*.bDescriptorType = */ APP_USBD_DESCRIPTOR_INTERFACE, \
- /*.bInterfaceNumber = */ interface_number, \
- /*.bAlternateSetting = */ 0x00, \
- /*.bNumEndpoints = */ 1, \
- /*.bInterfaceClass = */ APP_USBD_CDC_COMM_CLASS, \
- /*.bInterfaceSubClass = */ subclass, \
- /*.bInterfaceProtocol = */ protocol, \
- /*.iInterface = 0, */ 0x00, \
-
-
-/**
- * @brief Initializer of interface descriptor for CDC DATA class.
- *
- * @param interface_number Interface number.
- * @param subclass Subclass, @ref app_usbd_cdc_subclass_t.
- * @param protocol Protocol, @ref app_usbd_cdc_data_protocol_t.
- */
-#define APP_USBD_CDC_DATA_INTERFACE_DSC(interface_number, subclass, protocol) \
- /*.bLength = */ sizeof(app_usbd_descriptor_iface_t), \
- /*.bDescriptorType = */ APP_USBD_DESCRIPTOR_INTERFACE, \
- /*.bInterfaceNumber = */ interface_number, \
- /*.bAlternateSetting = */ 0x00, \
- /*.bNumEndpoints = */ 2, \
- /*.bInterfaceClass = */ APP_USBD_CDC_DATA_CLASS, \
- /*.bInterfaceSubClass = */ subclass, \
- /*.bInterfaceProtocol = */ protocol, \
- /*.iInterface = 0, */ 0x00, \
-
-
-
-/**
- * @brief Initializer of endpoint descriptor for CDC COM class.
- *
- * @param endpoint_in IN endpoint.
- * @param ep_size Endpoint size.
- */
-#define APP_USBD_CDC_COM_EP_DSC(endpoint_in, ep_size) \
- /*.bLength = */ sizeof(app_usbd_descriptor_ep_t), \
- /*.bDescriptorType = */ APP_USBD_DESCRIPTOR_ENDPOINT, \
- /*.bEndpointAddress = */ endpoint_in, \
- /*.bmAttributes = */ APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_INTERRUPT, \
- /*.wMaxPacketSize = */ APP_USBD_U16_TO_RAW_DSC(ep_size), \
- /*.bInterval = */ 16, \
-
-/**
- * @brief Initializer of endpoint descriptors for CDC DATA class.
- *
- * @param endpoint_in IN endpoint.
- * @param endpoint_out OUT endpoint.
- * @param ep_size Endpoint size.
- */
-#define APP_USBD_CDC_DATA_EP_DSC(endpoint_in, endpoint_out, ep_size) \
- /*.bLength = */ sizeof(app_usbd_descriptor_ep_t), \
- /*.bDescriptorType = */ APP_USBD_DESCRIPTOR_ENDPOINT, \
- /*.bEndpointAddress = */ endpoint_in, \
- /*.bmAttributes = */ APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_BULK, \
- /*.wMaxPacketSize = */ APP_USBD_U16_TO_RAW_DSC(ep_size), \
- /*.bInterval = */ 0, \
- /*.bLength = */ sizeof(app_usbd_descriptor_ep_t), \
- /*.bDescriptorType = */ APP_USBD_DESCRIPTOR_ENDPOINT, \
- /*.bEndpointAddress = */ endpoint_out, \
- /*.bmAttributes = */ APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_BULK, \
- /*.wMaxPacketSize = */ APP_USBD_U16_TO_RAW_DSC(ep_size), \
- /*.bInterval = */ 0, \
-
-/**
- * @brief Initializer of endpoint descriptors for CDC header descriptor.
- *
- * @param bcd_cdc BCD CDC version.
- */
-#define APP_USBD_CDC_HEADER_DSC(bcd_cdc) \
- /*.bLength = */ sizeof(app_usbd_cdc_desc_header_t), \
- /*.bDescriptorType = */ APP_USBD_CDC_CS_INTERFACE, \
- /*.bDescriptorSubtype = */ APP_USBD_CDC_SCS_HEADER, \
- /*.bcdCDC = */ APP_USBD_U16_TO_RAW_DSC(bcd_cdc), \
-
-/**
- * @brief Initializer of endpoint descriptors for CDC call management descriptor.
- *
- * @param capabilities Capabilities.
- * @param data_interface Data interface.
- */
-#define APP_USBD_CDC_CALL_MGMT_DSC(capabilities, data_interface) \
- /*.bLength = */ sizeof(app_usbd_cdc_desc_call_mgmt_t), \
- /*.bDescriptorType = */ APP_USBD_CDC_CS_INTERFACE, \
- /*.bDescriptorSubtype = */ APP_USBD_CDC_SCS_CALL_MGMT, \
- /*.bmCapabilities = */ capabilities, \
- /*.bDataInterface = */ data_interface, \
-
-
-/**
- * @brief Initializer of endpoint descriptors for CDC DATA class.
- *
- * @param capabilities Capabilities.
- */
-#define APP_USBD_CDC_ACM_DSC(capabilities) \
- /*.bLength = */ sizeof(app_usbd_cdc_desc_acm_t), \
- /*.bDescriptorType = */ APP_USBD_CDC_CS_INTERFACE, \
- /*.bDescriptorSubtype = */ APP_USBD_CDC_SCS_ACM, \
- /*.bmCapabilities = */ capabilities, \
-
-/**
- * @brief Initializer of endpoint descriptors for CDC DATA class.
- *
- * @param control_interface Control interface.
- * @param ... Subordinate interfaces list.
- */
-#define APP_USBD_CDC_UNION_DSC(control_interface, ...) \
- /*.bLength = */ sizeof(app_usbd_cdc_desc_union_t) + (NUM_VA_ARGS(__VA_ARGS__)), \
- /*.bDescriptorType = */ APP_USBD_CDC_CS_INTERFACE, \
- /*.bDescriptorSubtype = */ APP_USBD_CDC_SCS_UNION, \
- /*.bControlInterface = */ control_interface, \
- /*.bSubordinateInterface = */ __VA_ARGS__, \
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* APP_USBD_CDC_H__ */
+/**
+ * Copyright (c) 2016 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#ifndef APP_USBD_CDC_DESC_H__
+#define APP_USBD_CDC_DESC_H__
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "app_usbd_descriptor.h"
+#include "app_usbd_cdc_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup app_usbd_cdc_desc CDC class descriptors
+ * @brief @tagAPI52840 Descriptors used in the USB CDC class implementation.
+ * @ingroup app_usbd_cdc_acm
+ *
+ * A group of macros used to initialize CDC descriptors
+ * @{
+ */
+
+/**
+ * @brief Initializer of IAD descriptor for CDC class.
+ *
+ * @param interface_number Interface number.
+ * @param subclass Subclass, @ref app_usbd_cdc_subclass_t.
+ * @param protocol Protocol, @ref app_usbd_cdc_comm_protocol_t.
+ */
+#define APP_USBD_CDC_IAD_DSC(interface_number, subclass, protocol) \
+ /*.bLength = */ sizeof(app_usbd_descriptor_iad_t), \
+ /*.bDescriptorType = */ APP_USBD_DESCRIPTOR_INTERFACE_ASSOCIATION, \
+ /*.bFirstInterface = */ interface_number, \
+ /*.bInterfaceCount = */ 2, \
+ /*.bFunctionClass = */ APP_USBD_CDC_COMM_CLASS, \
+ /*.bFunctionSubClass = */ subclass, \
+ /*.bFunctionProtocol = */ protocol, \
+ /*.iFunction = */ 0, \
+
+/**
+ * @brief Initializer of interface descriptor for CDC COMM class.
+ *
+ * @param interface_number Interface number.
+ * @param subclass Subclass, @ref app_usbd_cdc_subclass_t.
+ * @param protocol Protocol, @ref app_usbd_cdc_comm_protocol_t.
+ */
+#define APP_USBD_CDC_COMM_INTERFACE_DSC(interface_number, subclass, protocol) \
+ /*.bLength = */ sizeof(app_usbd_descriptor_iface_t), \
+ /*.bDescriptorType = */ APP_USBD_DESCRIPTOR_INTERFACE, \
+ /*.bInterfaceNumber = */ interface_number, \
+ /*.bAlternateSetting = */ 0x00, \
+ /*.bNumEndpoints = */ 1, \
+ /*.bInterfaceClass = */ APP_USBD_CDC_COMM_CLASS, \
+ /*.bInterfaceSubClass = */ subclass, \
+ /*.bInterfaceProtocol = */ protocol, \
+ /*.iInterface = 0, */ 0x00, \
+
+
+/**
+ * @brief Initializer of interface descriptor for CDC DATA class.
+ *
+ * @param interface_number Interface number.
+ * @param subclass Subclass, @ref app_usbd_cdc_subclass_t.
+ * @param protocol Protocol, @ref app_usbd_cdc_data_protocol_t.
+ */
+#define APP_USBD_CDC_DATA_INTERFACE_DSC(interface_number, subclass, protocol) \
+ /*.bLength = */ sizeof(app_usbd_descriptor_iface_t), \
+ /*.bDescriptorType = */ APP_USBD_DESCRIPTOR_INTERFACE, \
+ /*.bInterfaceNumber = */ interface_number, \
+ /*.bAlternateSetting = */ 0x00, \
+ /*.bNumEndpoints = */ 2, \
+ /*.bInterfaceClass = */ APP_USBD_CDC_DATA_CLASS, \
+ /*.bInterfaceSubClass = */ subclass, \
+ /*.bInterfaceProtocol = */ protocol, \
+ /*.iInterface = 0, */ 0x00, \
+
+
+
+/**
+ * @brief Initializer of endpoint descriptor for CDC COM class.
+ *
+ * @param endpoint_in IN endpoint.
+ * @param ep_size Endpoint size.
+ */
+#define APP_USBD_CDC_COM_EP_DSC(endpoint_in, ep_size) \
+ /*.bLength = */ sizeof(app_usbd_descriptor_ep_t), \
+ /*.bDescriptorType = */ APP_USBD_DESCRIPTOR_ENDPOINT, \
+ /*.bEndpointAddress = */ endpoint_in, \
+ /*.bmAttributes = */ APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_INTERRUPT, \
+ /*.wMaxPacketSize = */ APP_USBD_U16_TO_RAW_DSC(ep_size), \
+ /*.bInterval = */ 16, \
+
+/**
+ * @brief Initializer of endpoint descriptors for CDC DATA class.
+ *
+ * @param endpoint_in IN endpoint.
+ * @param endpoint_out OUT endpoint.
+ * @param ep_size Endpoint size.
+ */
+#define APP_USBD_CDC_DATA_EP_DSC(endpoint_in, endpoint_out, ep_size) \
+ /*.bLength = */ sizeof(app_usbd_descriptor_ep_t), \
+ /*.bDescriptorType = */ APP_USBD_DESCRIPTOR_ENDPOINT, \
+ /*.bEndpointAddress = */ endpoint_in, \
+ /*.bmAttributes = */ APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_BULK, \
+ /*.wMaxPacketSize = */ APP_USBD_U16_TO_RAW_DSC(ep_size), \
+ /*.bInterval = */ 0, \
+ /*.bLength = */ sizeof(app_usbd_descriptor_ep_t), \
+ /*.bDescriptorType = */ APP_USBD_DESCRIPTOR_ENDPOINT, \
+ /*.bEndpointAddress = */ endpoint_out, \
+ /*.bmAttributes = */ APP_USBD_DESCRIPTOR_EP_ATTR_TYPE_BULK, \
+ /*.wMaxPacketSize = */ APP_USBD_U16_TO_RAW_DSC(ep_size), \
+ /*.bInterval = */ 0, \
+
+/**
+ * @brief Initializer of endpoint descriptors for CDC header descriptor.
+ *
+ * @param bcd_cdc BCD CDC version.
+ */
+#define APP_USBD_CDC_HEADER_DSC(bcd_cdc) \
+ /*.bLength = */ sizeof(app_usbd_cdc_desc_header_t), \
+ /*.bDescriptorType = */ APP_USBD_CDC_CS_INTERFACE, \
+ /*.bDescriptorSubtype = */ APP_USBD_CDC_SCS_HEADER, \
+ /*.bcdCDC = */ APP_USBD_U16_TO_RAW_DSC(bcd_cdc), \
+
+/**
+ * @brief Initializer of endpoint descriptors for CDC call management descriptor.
+ *
+ * @param capabilities Capabilities.
+ * @param data_interface Data interface.
+ */
+#define APP_USBD_CDC_CALL_MGMT_DSC(capabilities, data_interface) \
+ /*.bLength = */ sizeof(app_usbd_cdc_desc_call_mgmt_t), \
+ /*.bDescriptorType = */ APP_USBD_CDC_CS_INTERFACE, \
+ /*.bDescriptorSubtype = */ APP_USBD_CDC_SCS_CALL_MGMT, \
+ /*.bmCapabilities = */ capabilities, \
+ /*.bDataInterface = */ data_interface, \
+
+
+/**
+ * @brief Initializer of endpoint descriptors for CDC DATA class.
+ *
+ * @param capabilities Capabilities.
+ */
+#define APP_USBD_CDC_ACM_DSC(capabilities) \
+ /*.bLength = */ sizeof(app_usbd_cdc_desc_acm_t), \
+ /*.bDescriptorType = */ APP_USBD_CDC_CS_INTERFACE, \
+ /*.bDescriptorSubtype = */ APP_USBD_CDC_SCS_ACM, \
+ /*.bmCapabilities = */ capabilities, \
+
+/**
+ * @brief Initializer of endpoint descriptors for CDC DATA class.
+ *
+ * @param control_interface Control interface.
+ * @param ... Subordinate interfaces list.
+ */
+#define APP_USBD_CDC_UNION_DSC(control_interface, ...) \
+ /*.bLength = */ sizeof(app_usbd_cdc_desc_union_t) + (NUM_VA_ARGS(__VA_ARGS__)), \
+ /*.bDescriptorType = */ APP_USBD_CDC_CS_INTERFACE, \
+ /*.bDescriptorSubtype = */ APP_USBD_CDC_SCS_UNION, \
+ /*.bControlInterface = */ control_interface, \
+ /*.bSubordinateInterface = */ __VA_ARGS__, \
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* APP_USBD_CDC_H__ */
diff --git a/third_party/NordicSemiconductor/libraries/usb/class/cdc/app_usbd_cdc_types.h b/third_party/NordicSemiconductor/libraries/usb/class/cdc/app_usbd_cdc_types.h
index 5ce083a..e880d82 100644
--- a/third_party/NordicSemiconductor/libraries/usb/class/cdc/app_usbd_cdc_types.h
+++ b/third_party/NordicSemiconductor/libraries/usb/class/cdc/app_usbd_cdc_types.h
@@ -1,360 +1,360 @@
-/**
- * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-#ifndef APP_USBD_CDC_TYPES_H__
-#define APP_USBD_CDC_TYPES_H__
-
-#include <stdint.h>
-#include <stdbool.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-
-/**
- * @defgroup app_usbd_cdc_types CDC class types
- * @ingroup app_usbd_cdc_acm
- *
- * @brief @tagAPI52840 Variable types used by the CDC class implementation.
- * @{
- */
-
-/**
- * @brief Communications Interface Class code.
- *
- * Used for control interface in communication class.
- * @ref app_usbd_descriptor_iface_t::bInterfaceClass
- */
-#define APP_USBD_CDC_COMM_CLASS 0x02
-
-/**
- * @brief Data Class Interface code.
- *
- * Used for data interface in communication class.
- * @ref app_usbd_descriptor_iface_t::bInterfaceClass
- */
-#define APP_USBD_CDC_DATA_CLASS 0x0A
-
-/**
- * @brief CDC subclass possible values.
- *
- * @ref app_usbd_descriptor_iface_t::bInterfaceSubClass
- */
-typedef enum {
- APP_USBD_CDC_SUBCLASS_RESERVED = 0x00, /**< Reserved in documentation. */
- APP_USBD_CDC_SUBCLASS_DLCM = 0x01, /**< Direct Line Control Model. */
- APP_USBD_CDC_SUBCLASS_ACM = 0x02, /**< Abstract Control Model. */
- APP_USBD_CDC_SUBCLASS_TCM = 0x03, /**< Telephone Control Model. */
- APP_USBD_CDC_SUBCLASS_MCCM = 0x04, /**< Multi-Channel Control Model. */
- APP_USBD_CDC_SUBCLASS_CAPI = 0x05, /**< CAPI Control Model. */
- APP_USBD_CDC_SUBCLASS_ENCM = 0x06, /**< Ethernet Networking Control Model. */
- APP_USBD_CDC_SUBCLASS_ATM = 0x07, /**< ATM Networking Control Model. */
- APP_USBD_CDC_SUBCLASS_WHCM = 0x08, /**< Wireless Handset Control Model. */
- APP_USBD_CDC_SUBCLASS_DM = 0x09, /**< Device Management. */
- APP_USBD_CDC_SUBCLASS_MDLM = 0x0A, /**< Mobile Direct Line Model. */
- APP_USBD_CDC_SUBCLASS_OBEX = 0x0B, /**< OBEX. */
- APP_USBD_CDC_SUBCLASS_EEM = 0x0C, /**< Ethernet Emulation Model. */
- APP_USBD_CDC_SUBCLASS_NCM = 0x0D /**< Network Control Model. */
-} app_usbd_cdc_subclass_t;
-
-/**
- * @brief CDC protocol possible values.
- *
- * @ref app_usbd_descriptor_iface_t::bInterfaceProtocol
- */
-typedef enum {
- APP_USBD_CDC_COMM_PROTOCOL_NONE = 0x00, /**< No class specific protocol required. */
- APP_USBD_CDC_COMM_PROTOCOL_AT_V250 = 0x01, /**< AT Commands: V.250 etc. */
- APP_USBD_CDC_COMM_PROTOCOL_AT_PCCA101 = 0x02, /**< AT Commands defined by PCCA-101. */
- APP_USBD_CDC_COMM_PROTOCOL_AT_PCCA101_ANNEXO = 0x03, /**< AT Commands defined by PCCA-101 & Annex O. */
- APP_USBD_CDC_COMM_PROTOCOL_AT_GSM707 = 0x04, /**< AT Commands defined by GSM 07.07. */
- APP_USBD_CDC_COMM_PROTOCOL_AT_3GPP_27007 = 0x05, /**< AT Commands defined by 3GPP 27.007. */
- APP_USBD_CDC_COMM_PROTOCOL_AT_CDMA = 0x06, /**< AT Commands defined by TIA for CDMA. */
- APP_USBD_CDC_COMM_PROTOCOL_EEM = 0x07, /**< Ethernet Emulation Model. */
- APP_USBD_CDC_COMM_PROTOCOL_EXTERNAL = 0xFE, /**< External Protocol: Commands defined by Command Set Functional Descriptor. */
- APP_USBD_CDC_COMM_PROTOCOL_VENDOR = 0xFF /**< Vendor-specific. */
-} app_usbd_cdc_comm_protocol_t;
-
-/**
- * @brief CDC data interface protocols possible values.
- */
-typedef enum {
- APP_USBD_CDC_DATA_PROTOCOL_NONE = 0x00, /**< No class specific protocol required. */
- APP_USBD_CDC_DATA_PROTOCOL_NTB = 0x01, /**< Network Transfer Block. */
- APP_USBD_CDC_DATA_PROTOCOL_ISDN_BRI = 0x30, /**< Physical interface protocol for ISDN BRI. */
- APP_USBD_CDC_DATA_PROTOCOL_HDLC = 0x31, /**< HDLC. */
- APP_USBD_CDC_DATA_PROTOCOL_TRANSPARENT = 0x32, /**< Transparent. */
- APP_USBD_CDC_DATA_PROTOCOL_Q921M = 0x50, /**< Management protocol for Q.921 data link protocol. */
- APP_USBD_CDC_DATA_PROTOCOL_Q921 = 0x51, /**< Data link protocol for Q.921. */
- APP_USBD_CDC_DATA_PROTOCOL_Q921TM = 0x52, /**< TEI-multiplexor for Q.921 data link protocol. */
- APP_USBD_CDC_DATA_PROTOCOL_V42BIS = 0x90, /**< Data compression procedures. */
- APP_USBD_CDC_DATA_PROTOCOL_Q931 = 0x91, /**< Euro-ISDN protocol control. */
- APP_USBD_CDC_DATA_PROTOCOL_V120 = 0x92, /**< V.24 rate adaptation to ISDN. */
- APP_USBD_CDC_DATA_PROTOCOL_CAPI20 = 0x93, /**< CAPI Commands. */
- APP_USBD_CDC_DATA_PROTOCOL_HOST = 0xFD, /**< Host based driver.
- * @note This protocol code should only be used in messages
- * between host and device to identify the host driver portion
- * of a protocol stack.
- */
- APP_USBD_CDC_DATA_PROTOCOL_EXTERNAL = 0xFE, /**< The protocol(s) are described using a Protocol Unit Functional
- * Descriptors on Communications Class Interface.
- */
- APP_USBD_CDC_DATA_PROTOCOL_VENDOR = 0xFF /**< Vendor-specific. */
-} app_usbd_cdc_data_protocol_t;
-
-/**
- * @brief CDC Functional Descriptor types.
- */
-typedef enum {
- APP_USBD_CDC_CS_INTERFACE = 0x24, /**< Class specific interface descriptor type.*/
- APP_USBD_CDC_CS_ENDPOINT = 0x25 /**< Class specific endpoint descriptor type.*/
-} app_usbd_cdc_func_type_t;
-
-/**
- * @brief CDC Functional Descriptor subtypes.
- */
-typedef enum {
- APP_USBD_CDC_SCS_HEADER = 0x00, /**< Header Functional Descriptor, which marks the beginning of the concatenated set of functional descriptors for the interface. */
- APP_USBD_CDC_SCS_CALL_MGMT = 0x01, /**< Call Management Functional Descriptor. */
- APP_USBD_CDC_SCS_ACM = 0x02, /**< Abstract Control Management Functional Descriptor. */
- APP_USBD_CDC_SCS_DLM = 0x03, /**< Direct Line Management Functional Descriptor. */
- APP_USBD_CDC_SCS_TEL_R = 0x04, /**< Telephone Ringer Functional Descriptor. */
- APP_USBD_CDC_SCS_TEL_CAP = 0x05, /**< Telephone Call and Line State Reporting Capabilities Functional Descriptor. */
- APP_USBD_CDC_SCS_UNION = 0x06, /**< Union Functional Descriptor. */
- APP_USBD_CDC_SCS_COUNTRY_SEL = 0x07, /**< Country Selection Functional Descriptor. */
- APP_USBD_CDC_SCS_TEL_OM = 0x08, /**< Telephone Operational Modes Functional Descriptor. */
- APP_USBD_CDC_SCS_USB_TERM = 0x09, /**< USB Terminal Functional Descriptor. */
- APP_USBD_CDC_SCS_NCT = 0x0A, /**< Network Channel Terminal Descriptor. */
- APP_USBD_CDC_SCS_PU = 0x0B, /**< Protocol Unit Functional Descriptor. */
- APP_USBD_CDC_SCS_EU = 0x0C, /**< Extension Unit Functional Descriptor. */
- APP_USBD_CDC_SCS_MCM = 0x0D, /**< Multi-Channel Management Functional Descriptor. */
- APP_USBD_CDC_SCS_CAPI = 0x0E, /**< CAPI Control Management Functional Descriptor. */
- APP_USBD_CDC_SCS_ETH = 0x0F, /**< Ethernet Networking Functional Descriptor. */
- APP_USBD_CDC_SCS_ATM = 0x10, /**< ATM Networking Functional Descriptor. */
- APP_USBD_CDC_SCS_WHCM = 0x11, /**< Wireless Handset Control Model Functional Descriptor. */
- APP_USBD_CDC_SCS_MDLM = 0x12, /**< Mobile Direct Line Model Functional Descriptor. */
- APP_USBD_CDC_SCS_MDLM_DET = 0x13, /**< MDLM Detail Functional Descriptor. */
- APP_USBD_CDC_SCS_DMM = 0x14, /**< Device Management Model Functional Descriptor. */
- APP_USBD_CDC_SCS_OBEX = 0x15, /**< OBEX Functional Descriptor. */
- APP_USBD_CDC_SCS_CS = 0x16, /**< Command Set Functional Descriptor. */
- APP_USBD_CDC_SCS_CS_DET = 0x17, /**< Command Set Detail Functional Descriptor. */
- APP_USBD_CDC_SCS_TEL_CM = 0x18, /**< Telephone Control Model Functional Descriptor. */
- APP_USBD_CDC_SCS_OBEX_SI = 0x19, /**< OBEX Service Identifier Functional Descriptor. */
- APP_USBD_CDC_SCS_NCM = 0x1A /**< NCM Functional Descriptor. */
-} app_usbd_cdc_func_subtype_t;
-
-/* Make all descriptors packed */
-#pragma pack(push, 1)
-
-/**
- * @brief Header Functional Descriptor.
- */
-typedef struct {
- uint8_t bFunctionLength; //!< Size of this descriptor in bytes.
- uint8_t bDescriptorType; //!< @ref APP_USBD_CDC_CS_INTERFACE descriptor type.
- uint8_t bDescriptorSubtype; //!< Descriptor subtype @ref APP_USBD_CDC_SCS_HEADER.
- uint8_t bcdCDC[2]; //!< USB Class Definitions for Communications Devices Specification release number in binary-coded decimal.
-} app_usbd_cdc_desc_header_t;
-
-/**
- * @brief Call management capabilities.
- *
- * @ref app_usbd_cdc_desc_call_mgmt_t::bmCapabilities bit.
- * */
-typedef enum {
- APP_USBD_CDC_CALL_MGMT_SUPPORTED = (1 << 0), /**< Call management capability bit 0.*/
- APP_USBD_CDC_CALL_MGMT_OVER_DCI = (1 << 1), /**< Call management capability bit 1.*/
-} app_subd_cdc_call_mgmt_cap_t;
-
-/**
- * @brief CDC Call Management Functional Descriptor.
- */
-typedef struct {
- uint8_t bFunctionLength; //!< Size of this functional descriptor, in bytes.
- uint8_t bDescriptorType; //!< Descriptor type @ref APP_USBD_CDC_CS_INTERFACE.
- uint8_t bDescriptorSubtype; //!< Descriptor subtype @ref APP_USBD_CDC_SCS_CALL_MGMT.
- uint8_t bmCapabilities; //!< Capabilities @ref app_subd_cdc_call_mgmt_cap_t.
- uint8_t bDataInterface; //!< Data interface number.
-} app_usbd_cdc_desc_call_mgmt_t;
-
-/**
- * @brief ACM capabilities.
- *
- * @ref app_usbd_cdc_desc_acm_t::bmCapabilities bit.
- * */
-typedef enum {
- APP_USBD_CDC_ACM_FEATURE_REQUESTS = (1 << 0), /**< ACM capability bit FEATURE_REQUESTS. */
- APP_USBD_CDC_ACM_LINE_REQUESTS = (1 << 1), /**< ACM capability bit LINE_REQUESTS. */
- APP_USBD_CDC_ACM_SENDBREAK_REQUESTS = (1 << 2), /**< ACM capability bit SENDBREAK_REQUESTS.*/
- APP_USBD_CDC_ACM_NOTIFY_REQUESTS = (1 << 3), /**< ACM capability bit NOTIFY_REQUESTS. */
-} app_subd_cdc_acm_cap_t;
-
-/**
- * @brief CDC ACM Functional Descriptor.
- */
-typedef struct {
- uint8_t bFunctionLength; //!< Size of this functional descriptor, in bytes.
- uint8_t bDescriptorType; //!< Descriptor type @ref APP_USBD_CDC_CS_INTERFACE.
- uint8_t bDescriptorSubtype; //!< Descriptor subtype @ref APP_USBD_CDC_SCS_ACM.
- uint8_t bmCapabilities; //!< Capabilities @ref app_subd_cdc_acm_cap_t.
-} app_usbd_cdc_desc_acm_t;
-
-/**
- * @brief Union Functional Descriptor.
- */
-typedef struct {
- uint8_t bFunctionLength; //!< Size of this functional descriptor, in bytes.
- uint8_t bDescriptorType; //!< Descriptor type @ref APP_USBD_CDC_CS_INTERFACE.
- uint8_t bDescriptorSubtype; //!< Descriptor subtype @ref APP_USBD_CDC_SCS_UNION.
- uint8_t bControlInterface; //!< The interface number of the Communications or Data Class interface, designated as the controlling interface for the union.
- uint8_t bSubordinateInterface[]; //!< Interface number of subordinate interfaces in the union. Number of interfaced depends on descriptor size.
-} app_usbd_cdc_desc_union_t;
-
-/**
- * @brief Country Selection Functional Descriptor.
- */
-typedef struct {
- uint8_t bFunctionLength; //!< Size of this functional descriptor, in bytes.
- uint8_t bDescriptorType; //!< Descriptor type @ref APP_USBD_CDC_CS_INTERFACE.
- uint8_t bDescriptorSubtype; //!< Descriptor subtype @ref APP_USBD_CDC_SCS_COUNTRY_SEL.
- uint8_t iCountryCodeRelDate; //!< Index of a string giving the release date for the implemented ISO 3166 Country Codes.
-} app_usbd_cdc_desc_country_sel_t;
-
-/**
- * @brief CDC Requests
- *
- */
-typedef enum {
- /* CDC General */
- APP_USBD_CDC_REQ_SEND_ENCAPSULATED_COMMAND = 0x00, /**< This request is used to issue a command in the format of the supported control protocol of the Communications Class interface. */
- APP_USBD_CDC_REQ_GET_ENCAPSULATED_RESPONSE = 0x01, /**< This request is used to request a response in the format of the supported control protocol of the Communications Class interface. */
- /* CDC PSTN */
- APP_USBD_CDC_REQ_SET_COMM_FEATURE = 0x02, /**< This request controls the settings for a particular communications feature of a particular target. */
- APP_USBD_CDC_REQ_GET_COMM_FEATURE = 0x03, /**< This request returns the current settings for the communications feature as selected. */
- APP_USBD_CDC_REQ_CLEAR_COMM_FEATURE = 0x04, /**< This request controls the settings for a particular communications feature of a particular target, setting the selected feature to its default state. */
- APP_USBD_CDC_REQ_SET_AUX_LINE_STATE = 0x10, /**< This request is used to connect or disconnect a secondary jack to POTS circuit or CODEC, depending on hook state. */
- APP_USBD_CDC_REQ_SET_HOOK_STATE = 0x11, /**< This request is used to set the necessary PSTN line relay code for on-hook, off-hook, and caller ID states. */
- APP_USBD_CDC_REQ_PULSE_SETUP = 0x12, /**< This request is used to prepare for a pulse-dialing cycle. */
- APP_USBD_CDC_REQ_SEND_PULSE = 0x13, /**< This request is used to generate a specified number of make/break pulse cycles. */
- APP_USBD_CDC_REQ_SET_PULSE_TIME = 0x14, /**< This request sets the timing of the make and break periods for pulse dialing. */
- APP_USBD_CDC_REQ_RING_AUX_JACK = 0x15, /**< This request is used to generate a ring signal on a secondary phone jack. */
- APP_USBD_CDC_REQ_SET_LINE_CODING = 0x20, /**< This request allows the host to specify typical asynchronous line-character formatting properties. */
- APP_USBD_CDC_REQ_GET_LINE_CODING = 0x21, /**< This request allows the host to find out the currently configured line coding. */
- APP_USBD_CDC_REQ_SET_CONTROL_LINE_STATE = 0x22, /**< This request generates RS-232/V.24 style control signals. */
- APP_USBD_CDC_REQ_SEND_BREAK = 0x23, /**< This request sends special carrier modulation that generates an RS-232 style break. */
- APP_USBD_CDC_REQ_SET_RINGER_PARMS = 0x30, /**< This request configures the ringer for the communications device. */
- APP_USBD_CDC_REQ_GET_RINGER_PARMS = 0x31, /**< This request returns the ringer capabilities of the device and the current status of the device’s ringer. */
- APP_USBD_CDC_REQ_SET_OPERATION_PARMS = 0x32, /**< Sets the operational mode for the device, between a simple mode, standalone mode and a host centric mode. */
- APP_USBD_CDC_REQ_GET_OPERATION_PARMS = 0x33, /**< This request gets the current operational mode for the device. */
- APP_USBD_CDC_REQ_SET_LINE_PARMS = 0x34, /**< This request is used to change the state of the line, corresponding to the interface or master interface of a union to which the command was sent. */
- APP_USBD_CDC_REQ_GET_LINE_PARMS = 0x35, /**< This request is used to report the state of the line that corresponds to the interface or master interface of a union to which the command was sent. */
- APP_USBD_CDC_REQ_DIAL_DIGITS = 0x36, /**< This request dials the DTMF digits over the specified line. */
-} app_usbd_cdc_req_id_t;
-
-/**
- * @brief CDC Notifications.
- */
-typedef enum {
- /* CDC General */
- APP_USBD_CDC_NOTIF_NETWORK_CONNECTION = 0x00, /**< This notification allows the device to notify the host about network connection status. */
- APP_USBD_CDC_NOTIF_RESPONSE_AVAILABLE = 0x01, /**< This notification allows the device to notify the host that a response is available.
- * This response can be retrieved with a subsequent GetEncapsulatedResponse request.
- _ */
- APP_USBD_CDC_NOTIF_CONNECTION_SPEED_CHANGE = 0x2A, /**< This notification allows the device to inform the host-networking driver
- * that a change in either the up-link or the down-link bit rate of the connection has occurred.
- */
- /* CDC PSTN */
- APP_USBD_CDC_NOTIF_AUX_JACK_HOOK_STATE = 0x08, /**< (DLM) This notification indicates the loop has changed on the auxiliary phone interface of the USB device. */
- APP_USBD_CDC_NOTIF_RING_DETECT = 0x09, /**< (DLM) This notification indicates ring voltage on the POTS line interface of the USB device. */
- APP_USBD_CDC_NOTIF_SERIAL_STATE = 0x20, /**< (ACM) This notification sends asynchronous notification of UART status. */
- APP_USBD_CDC_NOTIF_CALL_STATE_CHANGE = 0x28, /**< (TCM) This notification identifies that a change has occurred to the state of a call on the line corresponding to the interface or union for the line. */
- APP_USBD_CDC_NOTIF_LINE_STATE_CHANGE = 0x29 /**< (TCM) This notification identifies that a change has occurred to the state of the line corresponding to the interface or master interface of a union sending the notification message. */
-} app_usbd_cdc_notify_id_t;
-
-/**
- * @brief Notification sent via CDC COMM endpoint.
- * */
-typedef struct {
- uint8_t bmRequestType; //!< Request type.
- uint8_t bmRequest; //!< Request ID @ref app_usbd_cdc_req_id_t.
- uint16_t wValue; //!< Value field.
- uint16_t wIndex; //!< Index field.
- uint16_t wLength; //!< Length of payload following.
-} app_usbd_cdc_notify_t;
-
-/**
- * @brief CDC line coding structure.
- */
-typedef struct {
- uint8_t dwDTERate[4]; //!< Line baudrate.
- uint8_t bCharFormat; //!< Character format @ref app_usbd_cdc_line_stopbit_t.
- uint8_t bParityType; //!< Parity bits @ref app_usbd_cdc_line_parity_t.
- uint8_t bDataBits; //!< Number of data bits.
-} app_usbd_cdc_line_coding_t;
-
-/**
- * @brief Possible values of @ref app_usbd_cdc_line_coding_t::bCharFormat.
- */
-typedef enum {
- APP_USBD_CDC_LINE_STOPBIT_1 = 0, /**< 1 stop bit. */
- APP_USBD_CDC_LINE_STOPBIT_1_5 = 1, /**< 1.5 stop bits. */
- APP_USBD_CDC_LINE_STOPBIT_2 = 2, /**< 2 stop bits. */
-} app_usbd_cdc_line_stopbit_t;
-
-/**
- * @brief Possible values of @ref app_usbd_cdc_line_coding_t::bParityType.
- */
-typedef enum {
- APP_USBD_CDC_LINE_PARITY_NONE = 0, /**< No parity. */
- APP_USBD_CDC_LINE_PARITY_ODD = 1, /**< Odd parity. */
- APP_USBD_CDC_LINE_PARITY_EVEN = 2, /**< Even parity. */
- APP_USBD_CDC_LINE_PARITY_MARK = 3, /**< Parity forced to 0 (space).*/
- APP_USBD_CDC_LINE_PARITY_SPACE = 4, /**< Parity forced to 1 (mark). */
-} app_usbd_cdc_line_parity_t;
-
-
-#pragma pack(pop)
-
-/** @} */
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* APP_USBD_TYPES_H__ */
+/**
+ * Copyright (c) 2016 - 2019, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#ifndef APP_USBD_CDC_TYPES_H__
+#define APP_USBD_CDC_TYPES_H__
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/**
+ * @defgroup app_usbd_cdc_types CDC class types
+ * @ingroup app_usbd_cdc_acm
+ *
+ * @brief @tagAPI52840 Variable types used by the CDC class implementation.
+ * @{
+ */
+
+/**
+ * @brief Communications Interface Class code.
+ *
+ * Used for control interface in communication class.
+ * @ref app_usbd_descriptor_iface_t::bInterfaceClass
+ */
+#define APP_USBD_CDC_COMM_CLASS 0x02
+
+/**
+ * @brief Data Class Interface code.
+ *
+ * Used for data interface in communication class.
+ * @ref app_usbd_descriptor_iface_t::bInterfaceClass
+ */
+#define APP_USBD_CDC_DATA_CLASS 0x0A
+
+/**
+ * @brief CDC subclass possible values.
+ *
+ * @ref app_usbd_descriptor_iface_t::bInterfaceSubClass
+ */
+typedef enum {
+ APP_USBD_CDC_SUBCLASS_RESERVED = 0x00, /**< Reserved in documentation. */
+ APP_USBD_CDC_SUBCLASS_DLCM = 0x01, /**< Direct Line Control Model. */
+ APP_USBD_CDC_SUBCLASS_ACM = 0x02, /**< Abstract Control Model. */
+ APP_USBD_CDC_SUBCLASS_TCM = 0x03, /**< Telephone Control Model. */
+ APP_USBD_CDC_SUBCLASS_MCCM = 0x04, /**< Multi-Channel Control Model. */
+ APP_USBD_CDC_SUBCLASS_CAPI = 0x05, /**< CAPI Control Model. */
+ APP_USBD_CDC_SUBCLASS_ENCM = 0x06, /**< Ethernet Networking Control Model. */
+ APP_USBD_CDC_SUBCLASS_ATM = 0x07, /**< ATM Networking Control Model. */
+ APP_USBD_CDC_SUBCLASS_WHCM = 0x08, /**< Wireless Handset Control Model. */
+ APP_USBD_CDC_SUBCLASS_DM = 0x09, /**< Device Management. */
+ APP_USBD_CDC_SUBCLASS_MDLM = 0x0A, /**< Mobile Direct Line Model. */
+ APP_USBD_CDC_SUBCLASS_OBEX = 0x0B, /**< OBEX. */
+ APP_USBD_CDC_SUBCLASS_EEM = 0x0C, /**< Ethernet Emulation Model. */
+ APP_USBD_CDC_SUBCLASS_NCM = 0x0D /**< Network Control Model. */
+} app_usbd_cdc_subclass_t;
+
+/**
+ * @brief CDC protocol possible values.
+ *
+ * @ref app_usbd_descriptor_iface_t::bInterfaceProtocol
+ */
+typedef enum {
+ APP_USBD_CDC_COMM_PROTOCOL_NONE = 0x00, /**< No class specific protocol required. */
+ APP_USBD_CDC_COMM_PROTOCOL_AT_V250 = 0x01, /**< AT Commands: V.250 etc. */
+ APP_USBD_CDC_COMM_PROTOCOL_AT_PCCA101 = 0x02, /**< AT Commands defined by PCCA-101. */
+ APP_USBD_CDC_COMM_PROTOCOL_AT_PCCA101_ANNEXO = 0x03, /**< AT Commands defined by PCCA-101 & Annex O. */
+ APP_USBD_CDC_COMM_PROTOCOL_AT_GSM707 = 0x04, /**< AT Commands defined by GSM 07.07. */
+ APP_USBD_CDC_COMM_PROTOCOL_AT_3GPP_27007 = 0x05, /**< AT Commands defined by 3GPP 27.007. */
+ APP_USBD_CDC_COMM_PROTOCOL_AT_CDMA = 0x06, /**< AT Commands defined by TIA for CDMA. */
+ APP_USBD_CDC_COMM_PROTOCOL_EEM = 0x07, /**< Ethernet Emulation Model. */
+ APP_USBD_CDC_COMM_PROTOCOL_EXTERNAL = 0xFE, /**< External Protocol: Commands defined by Command Set Functional Descriptor. */
+ APP_USBD_CDC_COMM_PROTOCOL_VENDOR = 0xFF /**< Vendor-specific. */
+} app_usbd_cdc_comm_protocol_t;
+
+/**
+ * @brief CDC data interface protocols possible values.
+ */
+typedef enum {
+ APP_USBD_CDC_DATA_PROTOCOL_NONE = 0x00, /**< No class specific protocol required. */
+ APP_USBD_CDC_DATA_PROTOCOL_NTB = 0x01, /**< Network Transfer Block. */
+ APP_USBD_CDC_DATA_PROTOCOL_ISDN_BRI = 0x30, /**< Physical interface protocol for ISDN BRI. */
+ APP_USBD_CDC_DATA_PROTOCOL_HDLC = 0x31, /**< HDLC. */
+ APP_USBD_CDC_DATA_PROTOCOL_TRANSPARENT = 0x32, /**< Transparent. */
+ APP_USBD_CDC_DATA_PROTOCOL_Q921M = 0x50, /**< Management protocol for Q.921 data link protocol. */
+ APP_USBD_CDC_DATA_PROTOCOL_Q921 = 0x51, /**< Data link protocol for Q.921. */
+ APP_USBD_CDC_DATA_PROTOCOL_Q921TM = 0x52, /**< TEI-multiplexor for Q.921 data link protocol. */
+ APP_USBD_CDC_DATA_PROTOCOL_V42BIS = 0x90, /**< Data compression procedures. */
+ APP_USBD_CDC_DATA_PROTOCOL_Q931 = 0x91, /**< Euro-ISDN protocol control. */
+ APP_USBD_CDC_DATA_PROTOCOL_V120 = 0x92, /**< V.24 rate adaptation to ISDN. */
+ APP_USBD_CDC_DATA_PROTOCOL_CAPI20 = 0x93, /**< CAPI Commands. */
+ APP_USBD_CDC_DATA_PROTOCOL_HOST = 0xFD, /**< Host based driver.
+ * @note This protocol code should only be used in messages
+ * between host and device to identify the host driver portion
+ * of a protocol stack.
+ */
+ APP_USBD_CDC_DATA_PROTOCOL_EXTERNAL = 0xFE, /**< The protocol(s) are described using a Protocol Unit Functional
+ * Descriptors on Communications Class Interface.
+ */
+ APP_USBD_CDC_DATA_PROTOCOL_VENDOR = 0xFF /**< Vendor-specific. */
+} app_usbd_cdc_data_protocol_t;
+
+/**
+ * @brief CDC Functional Descriptor types.
+ */
+typedef enum {
+ APP_USBD_CDC_CS_INTERFACE = 0x24, /**< Class specific interface descriptor type.*/
+ APP_USBD_CDC_CS_ENDPOINT = 0x25 /**< Class specific endpoint descriptor type.*/
+} app_usbd_cdc_func_type_t;
+
+/**
+ * @brief CDC Functional Descriptor subtypes.
+ */
+typedef enum {
+ APP_USBD_CDC_SCS_HEADER = 0x00, /**< Header Functional Descriptor, which marks the beginning of the concatenated set of functional descriptors for the interface. */
+ APP_USBD_CDC_SCS_CALL_MGMT = 0x01, /**< Call Management Functional Descriptor. */
+ APP_USBD_CDC_SCS_ACM = 0x02, /**< Abstract Control Management Functional Descriptor. */
+ APP_USBD_CDC_SCS_DLM = 0x03, /**< Direct Line Management Functional Descriptor. */
+ APP_USBD_CDC_SCS_TEL_R = 0x04, /**< Telephone Ringer Functional Descriptor. */
+ APP_USBD_CDC_SCS_TEL_CAP = 0x05, /**< Telephone Call and Line State Reporting Capabilities Functional Descriptor. */
+ APP_USBD_CDC_SCS_UNION = 0x06, /**< Union Functional Descriptor. */
+ APP_USBD_CDC_SCS_COUNTRY_SEL = 0x07, /**< Country Selection Functional Descriptor. */
+ APP_USBD_CDC_SCS_TEL_OM = 0x08, /**< Telephone Operational Modes Functional Descriptor. */
+ APP_USBD_CDC_SCS_USB_TERM = 0x09, /**< USB Terminal Functional Descriptor. */
+ APP_USBD_CDC_SCS_NCT = 0x0A, /**< Network Channel Terminal Descriptor. */
+ APP_USBD_CDC_SCS_PU = 0x0B, /**< Protocol Unit Functional Descriptor. */
+ APP_USBD_CDC_SCS_EU = 0x0C, /**< Extension Unit Functional Descriptor. */
+ APP_USBD_CDC_SCS_MCM = 0x0D, /**< Multi-Channel Management Functional Descriptor. */
+ APP_USBD_CDC_SCS_CAPI = 0x0E, /**< CAPI Control Management Functional Descriptor. */
+ APP_USBD_CDC_SCS_ETH = 0x0F, /**< Ethernet Networking Functional Descriptor. */
+ APP_USBD_CDC_SCS_ATM = 0x10, /**< ATM Networking Functional Descriptor. */
+ APP_USBD_CDC_SCS_WHCM = 0x11, /**< Wireless Handset Control Model Functional Descriptor. */
+ APP_USBD_CDC_SCS_MDLM = 0x12, /**< Mobile Direct Line Model Functional Descriptor. */
+ APP_USBD_CDC_SCS_MDLM_DET = 0x13, /**< MDLM Detail Functional Descriptor. */
+ APP_USBD_CDC_SCS_DMM = 0x14, /**< Device Management Model Functional Descriptor. */
+ APP_USBD_CDC_SCS_OBEX = 0x15, /**< OBEX Functional Descriptor. */
+ APP_USBD_CDC_SCS_CS = 0x16, /**< Command Set Functional Descriptor. */
+ APP_USBD_CDC_SCS_CS_DET = 0x17, /**< Command Set Detail Functional Descriptor. */
+ APP_USBD_CDC_SCS_TEL_CM = 0x18, /**< Telephone Control Model Functional Descriptor. */
+ APP_USBD_CDC_SCS_OBEX_SI = 0x19, /**< OBEX Service Identifier Functional Descriptor. */
+ APP_USBD_CDC_SCS_NCM = 0x1A /**< NCM Functional Descriptor. */
+} app_usbd_cdc_func_subtype_t;
+
+/* Make all descriptors packed */
+#pragma pack(push, 1)
+
+/**
+ * @brief Header Functional Descriptor.
+ */
+typedef struct {
+ uint8_t bFunctionLength; //!< Size of this descriptor in bytes.
+ uint8_t bDescriptorType; //!< @ref APP_USBD_CDC_CS_INTERFACE descriptor type.
+ uint8_t bDescriptorSubtype; //!< Descriptor subtype @ref APP_USBD_CDC_SCS_HEADER.
+ uint8_t bcdCDC[2]; //!< USB Class Definitions for Communications Devices Specification release number in binary-coded decimal.
+} app_usbd_cdc_desc_header_t;
+
+/**
+ * @brief Call management capabilities.
+ *
+ * @ref app_usbd_cdc_desc_call_mgmt_t::bmCapabilities bit.
+ * */
+typedef enum {
+ APP_USBD_CDC_CALL_MGMT_SUPPORTED = (1 << 0), /**< Call management capability bit 0.*/
+ APP_USBD_CDC_CALL_MGMT_OVER_DCI = (1 << 1), /**< Call management capability bit 1.*/
+} app_subd_cdc_call_mgmt_cap_t;
+
+/**
+ * @brief CDC Call Management Functional Descriptor.
+ */
+typedef struct {
+ uint8_t bFunctionLength; //!< Size of this functional descriptor, in bytes.
+ uint8_t bDescriptorType; //!< Descriptor type @ref APP_USBD_CDC_CS_INTERFACE.
+ uint8_t bDescriptorSubtype; //!< Descriptor subtype @ref APP_USBD_CDC_SCS_CALL_MGMT.
+ uint8_t bmCapabilities; //!< Capabilities @ref app_subd_cdc_call_mgmt_cap_t.
+ uint8_t bDataInterface; //!< Data interface number.
+} app_usbd_cdc_desc_call_mgmt_t;
+
+/**
+ * @brief ACM capabilities.
+ *
+ * @ref app_usbd_cdc_desc_acm_t::bmCapabilities bit.
+ * */
+typedef enum {
+ APP_USBD_CDC_ACM_FEATURE_REQUESTS = (1 << 0), /**< ACM capability bit FEATURE_REQUESTS. */
+ APP_USBD_CDC_ACM_LINE_REQUESTS = (1 << 1), /**< ACM capability bit LINE_REQUESTS. */
+ APP_USBD_CDC_ACM_SENDBREAK_REQUESTS = (1 << 2), /**< ACM capability bit SENDBREAK_REQUESTS.*/
+ APP_USBD_CDC_ACM_NOTIFY_REQUESTS = (1 << 3), /**< ACM capability bit NOTIFY_REQUESTS. */
+} app_subd_cdc_acm_cap_t;
+
+/**
+ * @brief CDC ACM Functional Descriptor.
+ */
+typedef struct {
+ uint8_t bFunctionLength; //!< Size of this functional descriptor, in bytes.
+ uint8_t bDescriptorType; //!< Descriptor type @ref APP_USBD_CDC_CS_INTERFACE.
+ uint8_t bDescriptorSubtype; //!< Descriptor subtype @ref APP_USBD_CDC_SCS_ACM.
+ uint8_t bmCapabilities; //!< Capabilities @ref app_subd_cdc_acm_cap_t.
+} app_usbd_cdc_desc_acm_t;
+
+/**
+ * @brief Union Functional Descriptor.
+ */
+typedef struct {
+ uint8_t bFunctionLength; //!< Size of this functional descriptor, in bytes.
+ uint8_t bDescriptorType; //!< Descriptor type @ref APP_USBD_CDC_CS_INTERFACE.
+ uint8_t bDescriptorSubtype; //!< Descriptor subtype @ref APP_USBD_CDC_SCS_UNION.
+ uint8_t bControlInterface; //!< The interface number of the Communications or Data Class interface, designated as the controlling interface for the union.
+ uint8_t bSubordinateInterface[]; //!< Interface number of subordinate interfaces in the union. Number of interfaced depends on descriptor size.
+} app_usbd_cdc_desc_union_t;
+
+/**
+ * @brief Country Selection Functional Descriptor.
+ */
+typedef struct {
+ uint8_t bFunctionLength; //!< Size of this functional descriptor, in bytes.
+ uint8_t bDescriptorType; //!< Descriptor type @ref APP_USBD_CDC_CS_INTERFACE.
+ uint8_t bDescriptorSubtype; //!< Descriptor subtype @ref APP_USBD_CDC_SCS_COUNTRY_SEL.
+ uint8_t iCountryCodeRelDate; //!< Index of a string giving the release date for the implemented ISO 3166 Country Codes.
+} app_usbd_cdc_desc_country_sel_t;
+
+/**
+ * @brief CDC Requests
+ *
+ */
+typedef enum {
+ /* CDC General */
+ APP_USBD_CDC_REQ_SEND_ENCAPSULATED_COMMAND = 0x00, /**< This request is used to issue a command in the format of the supported control protocol of the Communications Class interface. */
+ APP_USBD_CDC_REQ_GET_ENCAPSULATED_RESPONSE = 0x01, /**< This request is used to request a response in the format of the supported control protocol of the Communications Class interface. */
+ /* CDC PSTN */
+ APP_USBD_CDC_REQ_SET_COMM_FEATURE = 0x02, /**< This request controls the settings for a particular communications feature of a particular target. */
+ APP_USBD_CDC_REQ_GET_COMM_FEATURE = 0x03, /**< This request returns the current settings for the communications feature as selected. */
+ APP_USBD_CDC_REQ_CLEAR_COMM_FEATURE = 0x04, /**< This request controls the settings for a particular communications feature of a particular target, setting the selected feature to its default state. */
+ APP_USBD_CDC_REQ_SET_AUX_LINE_STATE = 0x10, /**< This request is used to connect or disconnect a secondary jack to POTS circuit or CODEC, depending on hook state. */
+ APP_USBD_CDC_REQ_SET_HOOK_STATE = 0x11, /**< This request is used to set the necessary PSTN line relay code for on-hook, off-hook, and caller ID states. */
+ APP_USBD_CDC_REQ_PULSE_SETUP = 0x12, /**< This request is used to prepare for a pulse-dialing cycle. */
+ APP_USBD_CDC_REQ_SEND_PULSE = 0x13, /**< This request is used to generate a specified number of make/break pulse cycles. */
+ APP_USBD_CDC_REQ_SET_PULSE_TIME = 0x14, /**< This request sets the timing of the make and break periods for pulse dialing. */
+ APP_USBD_CDC_REQ_RING_AUX_JACK = 0x15, /**< This request is used to generate a ring signal on a secondary phone jack. */
+ APP_USBD_CDC_REQ_SET_LINE_CODING = 0x20, /**< This request allows the host to specify typical asynchronous line-character formatting properties. */
+ APP_USBD_CDC_REQ_GET_LINE_CODING = 0x21, /**< This request allows the host to find out the currently configured line coding. */
+ APP_USBD_CDC_REQ_SET_CONTROL_LINE_STATE = 0x22, /**< This request generates RS-232/V.24 style control signals. */
+ APP_USBD_CDC_REQ_SEND_BREAK = 0x23, /**< This request sends special carrier modulation that generates an RS-232 style break. */
+ APP_USBD_CDC_REQ_SET_RINGER_PARMS = 0x30, /**< This request configures the ringer for the communications device. */
+ APP_USBD_CDC_REQ_GET_RINGER_PARMS = 0x31, /**< This request returns the ringer capabilities of the device and the current status of the device’s ringer. */
+ APP_USBD_CDC_REQ_SET_OPERATION_PARMS = 0x32, /**< Sets the operational mode for the device, between a simple mode, standalone mode and a host centric mode. */
+ APP_USBD_CDC_REQ_GET_OPERATION_PARMS = 0x33, /**< This request gets the current operational mode for the device. */
+ APP_USBD_CDC_REQ_SET_LINE_PARMS = 0x34, /**< This request is used to change the state of the line, corresponding to the interface or master interface of a union to which the command was sent. */
+ APP_USBD_CDC_REQ_GET_LINE_PARMS = 0x35, /**< This request is used to report the state of the line that corresponds to the interface or master interface of a union to which the command was sent. */
+ APP_USBD_CDC_REQ_DIAL_DIGITS = 0x36, /**< This request dials the DTMF digits over the specified line. */
+} app_usbd_cdc_req_id_t;
+
+/**
+ * @brief CDC Notifications.
+ */
+typedef enum {
+ /* CDC General */
+ APP_USBD_CDC_NOTIF_NETWORK_CONNECTION = 0x00, /**< This notification allows the device to notify the host about network connection status. */
+ APP_USBD_CDC_NOTIF_RESPONSE_AVAILABLE = 0x01, /**< This notification allows the device to notify the host that a response is available.
+ * This response can be retrieved with a subsequent GetEncapsulatedResponse request.
+ _ */
+ APP_USBD_CDC_NOTIF_CONNECTION_SPEED_CHANGE = 0x2A, /**< This notification allows the device to inform the host-networking driver
+ * that a change in either the up-link or the down-link bit rate of the connection has occurred.
+ */
+ /* CDC PSTN */
+ APP_USBD_CDC_NOTIF_AUX_JACK_HOOK_STATE = 0x08, /**< (DLM) This notification indicates the loop has changed on the auxiliary phone interface of the USB device. */
+ APP_USBD_CDC_NOTIF_RING_DETECT = 0x09, /**< (DLM) This notification indicates ring voltage on the POTS line interface of the USB device. */
+ APP_USBD_CDC_NOTIF_SERIAL_STATE = 0x20, /**< (ACM) This notification sends asynchronous notification of UART status. */
+ APP_USBD_CDC_NOTIF_CALL_STATE_CHANGE = 0x28, /**< (TCM) This notification identifies that a change has occurred to the state of a call on the line corresponding to the interface or union for the line. */
+ APP_USBD_CDC_NOTIF_LINE_STATE_CHANGE = 0x29 /**< (TCM) This notification identifies that a change has occurred to the state of the line corresponding to the interface or master interface of a union sending the notification message. */
+} app_usbd_cdc_notify_id_t;
+
+/**
+ * @brief Notification sent via CDC COMM endpoint.
+ * */
+typedef struct {
+ uint8_t bmRequestType; //!< Request type.
+ uint8_t bRequest; //!< Request ID @ref app_usbd_cdc_req_id_t.
+ uint16_t wValue; //!< Value field.
+ uint16_t wIndex; //!< Index field.
+ uint16_t wLength; //!< Length of payload following.
+} app_usbd_cdc_notify_t;
+
+/**
+ * @brief CDC line coding structure.
+ */
+typedef struct {
+ uint8_t dwDTERate[4]; //!< Line baudrate.
+ uint8_t bCharFormat; //!< Character format @ref app_usbd_cdc_line_stopbit_t.
+ uint8_t bParityType; //!< Parity bits @ref app_usbd_cdc_line_parity_t.
+ uint8_t bDataBits; //!< Number of data bits.
+} app_usbd_cdc_line_coding_t;
+
+/**
+ * @brief Possible values of @ref app_usbd_cdc_line_coding_t::bCharFormat.
+ */
+typedef enum {
+ APP_USBD_CDC_LINE_STOPBIT_1 = 0, /**< 1 stop bit. */
+ APP_USBD_CDC_LINE_STOPBIT_1_5 = 1, /**< 1.5 stop bits. */
+ APP_USBD_CDC_LINE_STOPBIT_2 = 2, /**< 2 stop bits. */
+} app_usbd_cdc_line_stopbit_t;
+
+/**
+ * @brief Possible values of @ref app_usbd_cdc_line_coding_t::bParityType.
+ */
+typedef enum {
+ APP_USBD_CDC_LINE_PARITY_NONE = 0, /**< No parity. */
+ APP_USBD_CDC_LINE_PARITY_ODD = 1, /**< Odd parity. */
+ APP_USBD_CDC_LINE_PARITY_EVEN = 2, /**< Even parity. */
+ APP_USBD_CDC_LINE_PARITY_MARK = 3, /**< Parity forced to 0 (mark). */
+ APP_USBD_CDC_LINE_PARITY_SPACE = 4, /**< Parity forced to 1 (space). */
+} app_usbd_cdc_line_parity_t;
+
+
+#pragma pack(pop)
+
+/** @} */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* APP_USBD_TYPES_H__ */
diff --git a/third_party/NordicSemiconductor/libraries/usb/config/app_usbd_string_config.h b/third_party/NordicSemiconductor/libraries/usb/config/app_usbd_string_config.h
index 2dc8603..d90603c 100644
--- a/third_party/NordicSemiconductor/libraries/usb/config/app_usbd_string_config.h
+++ b/third_party/NordicSemiconductor/libraries/usb/config/app_usbd_string_config.h
@@ -1,130 +1,130 @@
-/**
- * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-#ifndef APP_USBD_STRING_CONFIG_H
-#define APP_USBD_STRING_CONFIG_H
-
-/**
- * @defgroup app_usbd_string_conf USBD string configuration
- * @ingroup app_usbd_string_desc
- *
- * @brief @tagAPI52840 Configuration of the string module that can be easily affected by the final
- * user.
- * @{
- */
-
-/**
- * @brief Supported languages identifiers
- *
- * Comma separated list of supported languages.
- */
-#define APP_USBD_STRINGS_LANGIDS \
- ((uint16_t)APP_USBD_LANG_ENGLISH | (uint16_t)APP_USBD_SUBLANG_ENGLISH_US)
-
-/**
- * @brief Manufacturer name string descriptor
- *
- * Comma separated list of manufacturer names for each defined language.
- * Use @ref APP_USBD_STRING_DESC macro to create string descriptor.
- *
- * The order of manufacturer names has to be the same like in
- * @ref APP_USBD_STRINGS_LANGIDS.
- */
-#define APP_USBD_STRINGS_MANUFACTURER \
- APP_USBD_STRING_DESC("Nordic Semiconductor")
-
-/**
- * @brief Define whether @ref APP_USBD_STRINGS_MANUFACTURER is created by @ref APP_USBD_STRING_DESC
- * or declared as global variable.
- * */
-#define APP_USBD_STRINGS_MANUFACTURER_EXTERN 0
-
-/**
- * @brief Product name string descriptor
- *
- * List of product names defined the same way like in @ref APP_USBD_STRINGS_MANUFACTURER
- */
-#define APP_USBD_STRINGS_PRODUCT \
- APP_USBD_STRING_DESC("nRF52840 OpenThread Device")
-
-
-/**
- * @brief Define whether @ref APP_USBD_STRINGS_PRODUCT is created by @ref APP_USBD_STRING_DESC
- * or declared as global variable.
- * */
-#define APP_USBD_STRINGS_PRODUCT_EXTERN 0
-
-/**
- * @brief Serial number string descriptor
- *
- * Create serial number string descriptor using @ref APP_USBD_STRING_DESC,
- * or configure it to point to any internal variable pointer filled with descriptor.
- *
- * @note
- * There is only one SERIAL number inside the library and it is Language independent.
- */
-#define APP_USBD_STRING_SERIAL g_extern_serial_number
-
-/**
- * @brief Define whether @ref APP_USBD_STRING_SERIAL is created by @ref APP_USBD_STRING_DESC
- * or declared as global variable.
- * */
-#define APP_USBD_STRING_SERIAL_EXTERN 1
-
-/**
- * @brief User strings default values
- *
- * This value stores all application specific user strings with its default initialization.
- * The setup is done by X-macros.
- * Expected macro parameters:
- * @code
- * X(mnemonic, [=str_idx], ...)
- * @endcode
- * - @c mnemonic: Mnemonic of the string descriptor that would be added to
- * @ref app_usbd_string_desc_idx_t enumerator.
- * - @c str_idx : String index value, may be set or left empty.
- * For example WinUSB driver requires descriptor to be present on 0xEE index.
- * Then use X(USBD_STRING_WINUSB, =0xEE, (APP_USBD_STRING_DESC(...)))
- * - @c ... : List of string descriptors for each defined language.
- */
-#define APP_USBD_STRINGS_USER \
- X(APP_USER_1, , APP_USBD_STRING_DESC("User 1"))
-
-/** @} */
-#endif /* APP_USBD_STRING_CONFIG_H */
+/**
+ * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#ifndef APP_USBD_STRING_CONFIG_H
+#define APP_USBD_STRING_CONFIG_H
+
+/**
+ * @defgroup app_usbd_string_conf USBD string configuration
+ * @ingroup app_usbd_string_desc
+ *
+ * @brief @tagAPI52840 Configuration of the string module that can be easily affected by the final
+ * user.
+ * @{
+ */
+
+/**
+ * @brief Supported languages identifiers
+ *
+ * Comma separated list of supported languages.
+ */
+#define APP_USBD_STRINGS_LANGIDS \
+ ((uint16_t)APP_USBD_LANG_ENGLISH | (uint16_t)APP_USBD_SUBLANG_ENGLISH_US)
+
+/**
+ * @brief Manufacturer name string descriptor
+ *
+ * Comma separated list of manufacturer names for each defined language.
+ * Use @ref APP_USBD_STRING_DESC macro to create string descriptor.
+ *
+ * The order of manufacturer names has to be the same like in
+ * @ref APP_USBD_STRINGS_LANGIDS.
+ */
+#define APP_USBD_STRINGS_MANUFACTURER \
+ APP_USBD_STRING_DESC("Nordic Semiconductor")
+
+/**
+ * @brief Define whether @ref APP_USBD_STRINGS_MANUFACTURER is created by @ref APP_USBD_STRING_DESC
+ * or declared as global variable.
+ * */
+#define APP_USBD_STRINGS_MANUFACTURER_EXTERN 0
+
+/**
+ * @brief Product name string descriptor
+ *
+ * List of product names defined the same way like in @ref APP_USBD_STRINGS_MANUFACTURER
+ */
+#define APP_USBD_STRINGS_PRODUCT \
+ APP_USBD_STRING_DESC("nRF52840 OpenThread Device")
+
+
+/**
+ * @brief Define whether @ref APP_USBD_STRINGS_PRODUCT is created by @ref APP_USBD_STRING_DESC
+ * or declared as global variable.
+ * */
+#define APP_USBD_STRINGS_PRODUCT_EXTERN 0
+
+/**
+ * @brief Serial number string descriptor
+ *
+ * Create serial number string descriptor using @ref APP_USBD_STRING_DESC,
+ * or configure it to point to any internal variable pointer filled with descriptor.
+ *
+ * @note
+ * There is only one SERIAL number inside the library and it is Language independent.
+ */
+#define APP_USBD_STRING_SERIAL g_extern_serial_number
+
+/**
+ * @brief Define whether @ref APP_USBD_STRING_SERIAL is created by @ref APP_USBD_STRING_DESC
+ * or declared as global variable.
+ * */
+#define APP_USBD_STRING_SERIAL_EXTERN 1
+
+/**
+ * @brief User strings default values
+ *
+ * This value stores all application specific user strings with its default initialization.
+ * The setup is done by X-macros.
+ * Expected macro parameters:
+ * @code
+ * X(mnemonic, [=str_idx], ...)
+ * @endcode
+ * - @c mnemonic: Mnemonic of the string descriptor that would be added to
+ * @ref app_usbd_string_desc_idx_t enumerator.
+ * - @c str_idx : String index value, may be set or left empty.
+ * For example WinUSB driver requires descriptor to be present on 0xEE index.
+ * Then use X(USBD_STRING_WINUSB, =0xEE, (APP_USBD_STRING_DESC(...)))
+ * - @c ... : List of string descriptors for each defined language.
+ */
+#define APP_USBD_STRINGS_USER \
+ X(APP_USER_1, , APP_USBD_STRING_DESC("User 1"))
+
+/** @} */
+#endif /* APP_USBD_STRING_CONFIG_H */
diff --git a/third_party/NordicSemiconductor/libraries/usb/nrf_dfu_trigger_usb.c b/third_party/NordicSemiconductor/libraries/usb/nrf_dfu_trigger_usb.c
index 68c6424..081eab4 100644
--- a/third_party/NordicSemiconductor/libraries/usb/nrf_dfu_trigger_usb.c
+++ b/third_party/NordicSemiconductor/libraries/usb/nrf_dfu_trigger_usb.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
+ * Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
*
* All rights reserved.
*
@@ -37,10 +37,6 @@
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
-
-#include "nordic_common.h"
-
-#if NRF_MODULE_ENABLED(APP_USBD_NRF_DFU_TRIGGER)
#include "nrf_dfu_trigger_usb.h"
#include "app_usbd.h"
#include "app_usbd_nrf_dfu_trigger.h"
@@ -53,11 +49,19 @@
#include "nrf_log.h"
NRF_LOG_MODULE_REGISTER();
-
#ifndef BSP_SELF_PINRESET_PIN
#error "This module is intended to be used with boards that have the GP pin shortened with the RESET pin."
#endif
+/**
+ * @brief Enable power USB detection.
+ *
+ * Configure if the example supports USB port connection.
+ */
+#ifndef USBD_POWER_DETECTION
+#define USBD_POWER_DETECTION true
+#endif
+
#define DFU_FLASH_PAGE_SIZE (NRF_FICR->CODEPAGESIZE)
#define DFU_FLASH_PAGE_COUNT (NRF_FICR->CODESIZE)
@@ -237,6 +241,3 @@
return ret;
}
-
-#endif /* NRF_MODULE_ENABLED(APP_USBD_NRF_DFU_TRIGGER) */
-
diff --git a/third_party/NordicSemiconductor/libraries/usb/nrf_dfu_trigger_usb.h b/third_party/NordicSemiconductor/libraries/usb/nrf_dfu_trigger_usb.h
index 7b0c0f1..895b59a 100644
--- a/third_party/NordicSemiconductor/libraries/usb/nrf_dfu_trigger_usb.h
+++ b/third_party/NordicSemiconductor/libraries/usb/nrf_dfu_trigger_usb.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
+ * Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
*
* All rights reserved.
*
diff --git a/third_party/NordicSemiconductor/libraries/utf_converter/LICENSE b/third_party/NordicSemiconductor/libraries/utf_converter/LICENSE
index 9f7df6b..fdee8ad 100644
--- a/third_party/NordicSemiconductor/libraries/utf_converter/LICENSE
+++ b/third_party/NordicSemiconductor/libraries/utf_converter/LICENSE
@@ -1,9 +1,9 @@
-Copyright (c) 2016 Pietro Gagliardi
-
-Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-(this is called the MIT License or Expat License; see http://www.opensource.org/licenses/MIT)
+Copyright (c) 2016 Pietro Gagliardi
+
+Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+(this is called the MIT License or Expat License; see http://www.opensource.org/licenses/MIT)
diff --git a/third_party/NordicSemiconductor/libraries/utf_converter/utf.c b/third_party/NordicSemiconductor/libraries/utf_converter/utf.c
index 63a36c9..e76afe7 100644
--- a/third_party/NordicSemiconductor/libraries/utf_converter/utf.c
+++ b/third_party/NordicSemiconductor/libraries/utf_converter/utf.c
@@ -1,350 +1,350 @@
-// utf by pietro gagliardi (andlabs) — https://github.com/andlabs/utf/
-// 10 november 2016
-#include "utf.h"
-
-// this code imitates Go's unicode/utf8 and unicode/utf16
-// the biggest difference is that a rune is unsigned instead of signed (because Go guarantees what a right shift on a signed number will do, whereas C does not)
-// it is also an imitation so we can license it under looser terms than the Go source
-#define badrune 0xFFFD
-
-// encoded must be at most 4 bytes
-// TODO clean this code up somehow
-size_t utf8EncodeRune(uint32_t rune, char *encoded)
-{
- uint8_t b;
- uint8_t c = 0;
- uint8_t d = 0;
- uint8_t e = 0;
- size_t n;
-
- // not in the valid range for Unicode
- if (rune > 0x10FFFF)
- rune = badrune;
- // surrogate runes cannot be encoded
- if (rune >= 0xD800 && rune < 0xE000)
- rune = badrune;
-
- if (rune < 0x80) { // ASCII bytes represent themselves
- b = (uint8_t) (rune & 0xFF);
- n = 1;
- goto done;
- }
- if (rune < 0x800) { // two-byte encoding
- c = (uint8_t) (rune & 0x3F);
- c |= 0x80;
- rune >>= 6;
- b = (uint8_t) (rune & 0x1F);
- b |= 0xC0;
- n = 2;
- goto done;
- }
- if (rune < 0x10000) { // three-byte encoding
- d = (uint8_t) (rune & 0x3F);
- d |= 0x80;
- rune >>= 6;
- c = (uint8_t) (rune & 0x3F);
- c |= 0x80;
- rune >>= 6;
- b = (uint8_t) (rune & 0x0F);
- b |= 0xE0;
- n = 3;
- goto done;
- }
- // otherwise use a four-byte encoding
- e = (uint8_t) (rune & 0x3F);
- e |= 0x80;
- rune >>= 6;
- d = (uint8_t) (rune & 0x3F);
- d |= 0x80;
- rune >>= 6;
- c = (uint8_t) (rune & 0x3F);
- c |= 0x80;
- rune >>= 6;
- b = (uint8_t) (rune & 0x07);
- b |= 0xF0;
- n = 4;
-
-done:
- encoded[0] = b;
- if (n > 1)
- encoded[1] = c;
- if (n > 2)
- encoded[2] = d;
- if (n > 3)
- encoded[3] = e;
- return n;
-}
-
-const char *utf8DecodeRune(const char *s, size_t nElem, uint32_t *rune)
-{
- uint8_t b, c;
- uint8_t lowestAllowed, highestAllowed;
- size_t i, expected;
- int bad;
-
- b = (uint8_t) (*s);
- if (b < 0x80) { // ASCII bytes represent themselves
- *rune = b;
- s++;
- return s;
- }
- // 0xC0 and 0xC1 cover 2-byte overlong equivalents
- // 0xF5 to 0xFD cover values > 0x10FFFF
- // 0xFE and 0xFF were never defined (always illegal)
- if (b < 0xC2 || b > 0xF4) { // invalid
- *rune = badrune;
- s++;
- return s;
- }
-
- // this determines the range of allowed first continuation bytes
- lowestAllowed = 0x80;
- highestAllowed = 0xBF;
- switch (b) {
- case 0xE0:
- // disallow 3-byte overlong equivalents
- lowestAllowed = 0xA0;
- break;
- case 0xED:
- // disallow surrogate characters
- highestAllowed = 0x9F;
- break;
- case 0xF0:
- // disallow 4-byte overlong equivalents
- lowestAllowed = 0x90;
- break;
- case 0xF4:
- // disallow values > 0x10FFFF
- highestAllowed = 0x8F;
- break;
- }
-
- // and this determines how many continuation bytes are expected
- expected = 1;
- if (b >= 0xE0)
- expected++;
- if (b >= 0xF0)
- expected++;
- if (nElem != 0) { // are there enough bytes?
- nElem--;
- if (nElem < expected) { // nope
- *rune = badrune;
- s++;
- return s;
- }
- }
-
- // ensure that everything is correct
- // if not, **only** consume the initial byte
- bad = 0;
- for (i = 0; i < expected; i++) {
- c = (uint8_t) (s[1 + i]);
- if (c < lowestAllowed || c > highestAllowed) {
- bad = 1;
- break;
- }
- // the old lowestAllowed and highestAllowed is only for the first continuation byte
- lowestAllowed = 0x80;
- highestAllowed = 0xBF;
- }
- if (bad) {
- *rune = badrune;
- s++;
- return s;
- }
-
- // now do the topmost bits
- if (b < 0xE0)
- *rune = b & 0x1F;
- else if (b < 0xF0)
- *rune = b & 0x0F;
- else
- *rune = b & 0x07;
- s++; // we can finally move on
-
- // now do the continuation bytes
- for (; expected; expected--) {
- c = (uint8_t) (*s);
- s++;
- c &= 0x3F; // strip continuation bits
- *rune <<= 6;
- *rune |= c;
- }
-
- return s;
-}
-
-// encoded must have at most 2 elements
-size_t utf16EncodeRune(uint32_t rune, uint16_t *encoded)
-{
- uint16_t low, high;
-
- // not in the valid range for Unicode
- if (rune > 0x10FFFF)
- rune = badrune;
- // surrogate runes cannot be encoded
- if (rune >= 0xD800 && rune < 0xE000)
- rune = badrune;
-
- if (rune < 0x10000) {
- encoded[0] = (uint16_t) rune;
- return 1;
- }
-
- rune -= 0x10000;
- low = (uint16_t) (rune & 0x3FF);
- rune >>= 10;
- high = (uint16_t) (rune & 0x3FF);
- encoded[0] = high | 0xD800;
- encoded[1] = low | 0xDC00;
- return 2;
-}
-
-// TODO see if this can be cleaned up somehow
-const uint16_t *utf16DecodeRune(const uint16_t *s, size_t nElem, uint32_t *rune)
-{
- uint16_t high, low;
-
- if (*s < 0xD800 || *s >= 0xE000) {
- // self-representing character
- *rune = *s;
- s++;
- return s;
- }
- if (*s >= 0xDC00) {
- // out-of-order surrogates
- *rune = badrune;
- s++;
- return s;
- }
- if (nElem == 1) { // not enough elements
- *rune = badrune;
- s++;
- return s;
- }
- high = *s;
- high &= 0x3FF;
- if (s[1] < 0xDC00 || s[1] >= 0xE000) {
- // bad surrogate pair
- *rune = badrune;
- s++;
- return s;
- }
- s++;
- low = *s;
- s++;
- low &= 0x3FF;
- *rune = high;
- *rune <<= 10;
- *rune |= low;
- *rune += 0x10000;
- return s;
-}
-
-// TODO find a way to reduce the code in all of these somehow
-// TODO find a way to remove u as well
-size_t utf8RuneCount(const char *s, size_t nElem)
-{
- size_t len;
- uint32_t rune;
-
- if (nElem != 0) {
- const char *t, *u;
-
- len = 0;
- t = s;
- while (nElem != 0) {
- u = utf8DecodeRune(t, nElem, &rune);
- len++;
- nElem -= u - t;
- t = u;
- }
- return len;
- }
- len = 0;
- while (*s) {
- s = utf8DecodeRune(s, nElem, &rune);
- len++;
- }
- return len;
-}
-
-size_t utf8UTF16Count(const char *s, size_t nElem)
-{
- size_t len;
- uint32_t rune;
- uint16_t encoded[2];
-
- if (nElem != 0) {
- const char *t, *u;
-
- len = 0;
- t = s;
- while (nElem != 0) {
- u = utf8DecodeRune(t, nElem, &rune);
- len += utf16EncodeRune(rune, encoded);
- nElem -= u - t;
- t = u;
- }
- return len;
- }
- len = 0;
- while (*s) {
- s = utf8DecodeRune(s, nElem, &rune);
- len += utf16EncodeRune(rune, encoded);
- }
- return len;
-}
-
-size_t utf16RuneCount(const uint16_t *s, size_t nElem)
-{
- size_t len;
- uint32_t rune;
-
- if (nElem != 0) {
- const uint16_t *t, *u;
-
- len = 0;
- t = s;
- while (nElem != 0) {
- u = utf16DecodeRune(t, nElem, &rune);
- len++;
- nElem -= u - t;
- t = u;
- }
- return len;
- }
- len = 0;
- while (*s) {
- s = utf16DecodeRune(s, nElem, &rune);
- len++;
- }
- return len;
-}
-
-size_t utf16UTF8Count(const uint16_t *s, size_t nElem)
-{
- size_t len;
- uint32_t rune;
- char encoded[4];
-
- if (nElem != 0) {
- const uint16_t *t, *u;
-
- len = 0;
- t = s;
- while (nElem != 0) {
- u = utf16DecodeRune(t, nElem, &rune);
- len += utf8EncodeRune(rune, encoded);
- nElem -= u - t;
- t = u;
- }
- return len;
- }
- len = 0;
- while (*s) {
- s = utf16DecodeRune(s, nElem, &rune);
- len += utf8EncodeRune(rune, encoded);
- }
- return len;
-}
+// utf by pietro gagliardi (andlabs) — https://github.com/andlabs/utf/
+// 10 november 2016
+#include "utf.h"
+
+// this code imitates Go's unicode/utf8 and unicode/utf16
+// the biggest difference is that a rune is unsigned instead of signed (because Go guarantees what a right shift on a signed number will do, whereas C does not)
+// it is also an imitation so we can license it under looser terms than the Go source
+#define badrune 0xFFFD
+
+// encoded must be at most 4 bytes
+// TODO clean this code up somehow
+size_t utf8EncodeRune(uint32_t rune, char *encoded)
+{
+ uint8_t b;
+ uint8_t c = 0;
+ uint8_t d = 0;
+ uint8_t e = 0;
+ size_t n;
+
+ // not in the valid range for Unicode
+ if (rune > 0x10FFFF)
+ rune = badrune;
+ // surrogate runes cannot be encoded
+ if (rune >= 0xD800 && rune < 0xE000)
+ rune = badrune;
+
+ if (rune < 0x80) { // ASCII bytes represent themselves
+ b = (uint8_t) (rune & 0xFF);
+ n = 1;
+ goto done;
+ }
+ if (rune < 0x800) { // two-byte encoding
+ c = (uint8_t) (rune & 0x3F);
+ c |= 0x80;
+ rune >>= 6;
+ b = (uint8_t) (rune & 0x1F);
+ b |= 0xC0;
+ n = 2;
+ goto done;
+ }
+ if (rune < 0x10000) { // three-byte encoding
+ d = (uint8_t) (rune & 0x3F);
+ d |= 0x80;
+ rune >>= 6;
+ c = (uint8_t) (rune & 0x3F);
+ c |= 0x80;
+ rune >>= 6;
+ b = (uint8_t) (rune & 0x0F);
+ b |= 0xE0;
+ n = 3;
+ goto done;
+ }
+ // otherwise use a four-byte encoding
+ e = (uint8_t) (rune & 0x3F);
+ e |= 0x80;
+ rune >>= 6;
+ d = (uint8_t) (rune & 0x3F);
+ d |= 0x80;
+ rune >>= 6;
+ c = (uint8_t) (rune & 0x3F);
+ c |= 0x80;
+ rune >>= 6;
+ b = (uint8_t) (rune & 0x07);
+ b |= 0xF0;
+ n = 4;
+
+done:
+ encoded[0] = b;
+ if (n > 1)
+ encoded[1] = c;
+ if (n > 2)
+ encoded[2] = d;
+ if (n > 3)
+ encoded[3] = e;
+ return n;
+}
+
+const char *utf8DecodeRune(const char *s, size_t nElem, uint32_t *rune)
+{
+ uint8_t b, c;
+ uint8_t lowestAllowed, highestAllowed;
+ size_t i, expected;
+ int bad;
+
+ b = (uint8_t) (*s);
+ if (b < 0x80) { // ASCII bytes represent themselves
+ *rune = b;
+ s++;
+ return s;
+ }
+ // 0xC0 and 0xC1 cover 2-byte overlong equivalents
+ // 0xF5 to 0xFD cover values > 0x10FFFF
+ // 0xFE and 0xFF were never defined (always illegal)
+ if (b < 0xC2 || b > 0xF4) { // invalid
+ *rune = badrune;
+ s++;
+ return s;
+ }
+
+ // this determines the range of allowed first continuation bytes
+ lowestAllowed = 0x80;
+ highestAllowed = 0xBF;
+ switch (b) {
+ case 0xE0:
+ // disallow 3-byte overlong equivalents
+ lowestAllowed = 0xA0;
+ break;
+ case 0xED:
+ // disallow surrogate characters
+ highestAllowed = 0x9F;
+ break;
+ case 0xF0:
+ // disallow 4-byte overlong equivalents
+ lowestAllowed = 0x90;
+ break;
+ case 0xF4:
+ // disallow values > 0x10FFFF
+ highestAllowed = 0x8F;
+ break;
+ }
+
+ // and this determines how many continuation bytes are expected
+ expected = 1;
+ if (b >= 0xE0)
+ expected++;
+ if (b >= 0xF0)
+ expected++;
+ if (nElem != 0) { // are there enough bytes?
+ nElem--;
+ if (nElem < expected) { // nope
+ *rune = badrune;
+ s++;
+ return s;
+ }
+ }
+
+ // ensure that everything is correct
+ // if not, **only** consume the initial byte
+ bad = 0;
+ for (i = 0; i < expected; i++) {
+ c = (uint8_t) (s[1 + i]);
+ if (c < lowestAllowed || c > highestAllowed) {
+ bad = 1;
+ break;
+ }
+ // the old lowestAllowed and highestAllowed is only for the first continuation byte
+ lowestAllowed = 0x80;
+ highestAllowed = 0xBF;
+ }
+ if (bad) {
+ *rune = badrune;
+ s++;
+ return s;
+ }
+
+ // now do the topmost bits
+ if (b < 0xE0)
+ *rune = b & 0x1F;
+ else if (b < 0xF0)
+ *rune = b & 0x0F;
+ else
+ *rune = b & 0x07;
+ s++; // we can finally move on
+
+ // now do the continuation bytes
+ for (; expected; expected--) {
+ c = (uint8_t) (*s);
+ s++;
+ c &= 0x3F; // strip continuation bits
+ *rune <<= 6;
+ *rune |= c;
+ }
+
+ return s;
+}
+
+// encoded must have at most 2 elements
+size_t utf16EncodeRune(uint32_t rune, uint16_t *encoded)
+{
+ uint16_t low, high;
+
+ // not in the valid range for Unicode
+ if (rune > 0x10FFFF)
+ rune = badrune;
+ // surrogate runes cannot be encoded
+ if (rune >= 0xD800 && rune < 0xE000)
+ rune = badrune;
+
+ if (rune < 0x10000) {
+ encoded[0] = (uint16_t) rune;
+ return 1;
+ }
+
+ rune -= 0x10000;
+ low = (uint16_t) (rune & 0x3FF);
+ rune >>= 10;
+ high = (uint16_t) (rune & 0x3FF);
+ encoded[0] = high | 0xD800;
+ encoded[1] = low | 0xDC00;
+ return 2;
+}
+
+// TODO see if this can be cleaned up somehow
+const uint16_t *utf16DecodeRune(const uint16_t *s, size_t nElem, uint32_t *rune)
+{
+ uint16_t high, low;
+
+ if (*s < 0xD800 || *s >= 0xE000) {
+ // self-representing character
+ *rune = *s;
+ s++;
+ return s;
+ }
+ if (*s >= 0xDC00) {
+ // out-of-order surrogates
+ *rune = badrune;
+ s++;
+ return s;
+ }
+ if (nElem == 1) { // not enough elements
+ *rune = badrune;
+ s++;
+ return s;
+ }
+ high = *s;
+ high &= 0x3FF;
+ if (s[1] < 0xDC00 || s[1] >= 0xE000) {
+ // bad surrogate pair
+ *rune = badrune;
+ s++;
+ return s;
+ }
+ s++;
+ low = *s;
+ s++;
+ low &= 0x3FF;
+ *rune = high;
+ *rune <<= 10;
+ *rune |= low;
+ *rune += 0x10000;
+ return s;
+}
+
+// TODO find a way to reduce the code in all of these somehow
+// TODO find a way to remove u as well
+size_t utf8RuneCount(const char *s, size_t nElem)
+{
+ size_t len;
+ uint32_t rune;
+
+ if (nElem != 0) {
+ const char *t, *u;
+
+ len = 0;
+ t = s;
+ while (nElem != 0) {
+ u = utf8DecodeRune(t, nElem, &rune);
+ len++;
+ nElem -= u - t;
+ t = u;
+ }
+ return len;
+ }
+ len = 0;
+ while (*s) {
+ s = utf8DecodeRune(s, nElem, &rune);
+ len++;
+ }
+ return len;
+}
+
+size_t utf8UTF16Count(const char *s, size_t nElem)
+{
+ size_t len;
+ uint32_t rune;
+ uint16_t encoded[2];
+
+ if (nElem != 0) {
+ const char *t, *u;
+
+ len = 0;
+ t = s;
+ while (nElem != 0) {
+ u = utf8DecodeRune(t, nElem, &rune);
+ len += utf16EncodeRune(rune, encoded);
+ nElem -= u - t;
+ t = u;
+ }
+ return len;
+ }
+ len = 0;
+ while (*s) {
+ s = utf8DecodeRune(s, nElem, &rune);
+ len += utf16EncodeRune(rune, encoded);
+ }
+ return len;
+}
+
+size_t utf16RuneCount(const uint16_t *s, size_t nElem)
+{
+ size_t len;
+ uint32_t rune;
+
+ if (nElem != 0) {
+ const uint16_t *t, *u;
+
+ len = 0;
+ t = s;
+ while (nElem != 0) {
+ u = utf16DecodeRune(t, nElem, &rune);
+ len++;
+ nElem -= u - t;
+ t = u;
+ }
+ return len;
+ }
+ len = 0;
+ while (*s) {
+ s = utf16DecodeRune(s, nElem, &rune);
+ len++;
+ }
+ return len;
+}
+
+size_t utf16UTF8Count(const uint16_t *s, size_t nElem)
+{
+ size_t len;
+ uint32_t rune;
+ char encoded[4];
+
+ if (nElem != 0) {
+ const uint16_t *t, *u;
+
+ len = 0;
+ t = s;
+ while (nElem != 0) {
+ u = utf16DecodeRune(t, nElem, &rune);
+ len += utf8EncodeRune(rune, encoded);
+ nElem -= u - t;
+ t = u;
+ }
+ return len;
+ }
+ len = 0;
+ while (*s) {
+ s = utf16DecodeRune(s, nElem, &rune);
+ len += utf8EncodeRune(rune, encoded);
+ }
+ return len;
+}
diff --git a/third_party/NordicSemiconductor/libraries/utf_converter/utf.h b/third_party/NordicSemiconductor/libraries/utf_converter/utf.h
index c805736..b810a49 100644
--- a/third_party/NordicSemiconductor/libraries/utf_converter/utf.h
+++ b/third_party/NordicSemiconductor/libraries/utf_converter/utf.h
@@ -1,61 +1,61 @@
-// utf by pietro gagliardi (andlabs) — https://github.com/andlabs/utf/
-// 10 november 2016
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <stddef.h>
-#include <stdint.h>
-
-// if nElem == 0, assume the buffer has no upper limit and is '\0' terminated
-// otherwise, assume buffer is NOT '\0' terminated but is bounded by nElem *elements*
-
-extern size_t utf8EncodeRune(uint32_t rune, char *encoded);
-extern const char *utf8DecodeRune(const char *s, size_t nElem, uint32_t *rune);
-extern size_t utf16EncodeRune(uint32_t rune, uint16_t *encoded);
-extern const uint16_t *utf16DecodeRune(const uint16_t *s, size_t nElem, uint32_t *rune);
-
-extern size_t utf8RuneCount(const char *s, size_t nElem);
-extern size_t utf8UTF16Count(const char *s, size_t nElem);
-extern size_t utf16RuneCount(const uint16_t *s, size_t nElem);
-extern size_t utf16UTF8Count(const uint16_t *s, size_t nElem);
-
-#ifdef __cplusplus
-}
-
-// Provide overloads on Windows for using these functions with wchar_t and WCHAR when wchar_t is a keyword in C++ mode (the default).
-// Otherwise, you'd need to cast to pass a wchar_t pointer, WCHAR pointer, or equivalent to these functions.
-// We use __wchar_t to be independent of the setting; see https://blogs.msdn.microsoft.com/oldnewthing/20161201-00/?p=94836 (ironically posted one day after I initially wrote this code!).
-// TODO check this on MinGW-w64
-// TODO check this under /Wall
-// TODO C-style casts enough? or will that fail in /Wall?
-// TODO same for UniChar/unichar on Mac? if both are unsigned then we have nothing to worry about
-#if defined(_MSC_VER)
-
-inline size_t utf16EncodeRune(uint32_t rune, __wchar_t *encoded)
-{
- return utf16EncodeRune(rune, reinterpret_cast<uint16_t *>(encoded));
-}
-
-inline const __wchar_t *utf16DecodeRune(const __wchar_t *s, size_t nElem, uint32_t *rune)
-{
- const uint16_t *ret;
-
- ret = utf16DecodeRune(reinterpret_cast<const uint16_t *>(s), nElem, rune);
- return reinterpret_cast<const __wchar_t *>(ret);
-}
-
-inline size_t utf16RuneCount(const __wchar_t *s, size_t nElem)
-{
- return utf16RuneCount(reinterpret_cast<const uint16_t *>(s), nElem);
-}
-
-inline size_t utf16UTF8Count(const __wchar_t *s, size_t nElem)
-{
- return utf16UTF8Count(reinterpret_cast<const uint16_t *>(s), nElem);
-}
-
-#endif
-
-#endif
+// utf by pietro gagliardi (andlabs) — https://github.com/andlabs/utf/
+// 10 november 2016
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+
+// if nElem == 0, assume the buffer has no upper limit and is '\0' terminated
+// otherwise, assume buffer is NOT '\0' terminated but is bounded by nElem *elements*
+
+extern size_t utf8EncodeRune(uint32_t rune, char *encoded);
+extern const char *utf8DecodeRune(const char *s, size_t nElem, uint32_t *rune);
+extern size_t utf16EncodeRune(uint32_t rune, uint16_t *encoded);
+extern const uint16_t *utf16DecodeRune(const uint16_t *s, size_t nElem, uint32_t *rune);
+
+extern size_t utf8RuneCount(const char *s, size_t nElem);
+extern size_t utf8UTF16Count(const char *s, size_t nElem);
+extern size_t utf16RuneCount(const uint16_t *s, size_t nElem);
+extern size_t utf16UTF8Count(const uint16_t *s, size_t nElem);
+
+#ifdef __cplusplus
+}
+
+// Provide overloads on Windows for using these functions with wchar_t and WCHAR when wchar_t is a keyword in C++ mode (the default).
+// Otherwise, you'd need to cast to pass a wchar_t pointer, WCHAR pointer, or equivalent to these functions.
+// We use __wchar_t to be independent of the setting; see https://blogs.msdn.microsoft.com/oldnewthing/20161201-00/?p=94836 (ironically posted one day after I initially wrote this code!).
+// TODO check this on MinGW-w64
+// TODO check this under /Wall
+// TODO C-style casts enough? or will that fail in /Wall?
+// TODO same for UniChar/unichar on Mac? if both are unsigned then we have nothing to worry about
+#if defined(_MSC_VER)
+
+inline size_t utf16EncodeRune(uint32_t rune, __wchar_t *encoded)
+{
+ return utf16EncodeRune(rune, reinterpret_cast<uint16_t *>(encoded));
+}
+
+inline const __wchar_t *utf16DecodeRune(const __wchar_t *s, size_t nElem, uint32_t *rune)
+{
+ const uint16_t *ret;
+
+ ret = utf16DecodeRune(reinterpret_cast<const uint16_t *>(s), nElem, rune);
+ return reinterpret_cast<const __wchar_t *>(ret);
+}
+
+inline size_t utf16RuneCount(const __wchar_t *s, size_t nElem)
+{
+ return utf16RuneCount(reinterpret_cast<const uint16_t *>(s), nElem);
+}
+
+inline size_t utf16UTF8Count(const __wchar_t *s, size_t nElem)
+{
+ return utf16UTF8Count(reinterpret_cast<const uint16_t *>(s), nElem);
+}
+
+#endif
+
+#endif
diff --git a/third_party/NordicSemiconductor/nrfx/CHANGELOG.md b/third_party/NordicSemiconductor/nrfx/CHANGELOG.md
index 8a10a07..a148f33 100644
--- a/third_party/NordicSemiconductor/nrfx/CHANGELOG.md
+++ b/third_party/NordicSemiconductor/nrfx/CHANGELOG.md
@@ -1,6 +1,74 @@
# Changelog
All notable changes to this project are documented in this file.
+## [1.8.0] - 2019-08-27
+### Added
+- Added support for nRF52833.
+- Added bus recovery feature in the TWI and TWIM drivers.
+- Added the nrfx_gppi helper layer to facilitate developing generic code that can utilize PPI or DPPI, depending on which interface is available in a given SoC.
+
+### Changed
+- Updated MDK to version 8.27.0.
+
+### Fixed
+- Fixed an issue in the TWIM driver that would make the driver stuck when a premature STOP condition was generated by a slave device. The driver now handles this situation properly and signals that a bus error occurred.
+- Fixed a frame timing bug in the NFCT driver. Previously, the timing of the SENS_RES response could be violated after the NFCT peripheral was put to the Sleep state with the SLP_REQ command.
+
+## [1.7.2] - 2019-07-25
+### Added
+- Added functions in the DPPI, GPIOTE, PPI, RTC, and TIMER HALs for getting tasks and events specified by index.
+- Added the possibility of suspending transfers in the TWI driver. This allows combining several transfers into one continuous TWI transaction.
+- Added termination of transfers at deinitialization of the UARTE driver.
+- Added buffer alignment checks in the QSPI driver.
+- Introduced the NRFX_OFFSETOF macro that duplicates the functionality of the built-in offsetof() mechanism, but can be used without issues also with non-constant expressions.
+- Added an alternative way of ending the DMA transfer loop in the USBD driver.
+- Added the CTSTARTED and CTSTOPPED events to the CLOCK HAL.
+
+### Changed
+- Removed an assertion that prevented setting the data payload size of isochronous endpoints to zero, to fulfill requirements of the USB 2.0 specification, paragraph 5.6.3.
+- Declared the tx_buffer_length field in the UART driver's control block as volatile to prevent issues in case of compilation with high optimization level.
+
+### Fixed
+- Fixed an incorrect conversion of frequency values in the RADIO HAL.
+- Fixed an incorrectly enabled interrupt in the QSPI driver.
+- Corrected the LFCLK source selection values in the template configuration file for nRF9160.
+- Fixed support for external LFCLK sources for nRF52811.
+
+## [1.7.1] - 2019-04-08
+### Added
+- Added functions in the NVMC driver for getting the flash page size, the count of pages and the total flash size.
+
+### Fixed
+- Fixed handling of short unaligned write requests (1 or 2 bytes in length) in the nrfx_nvmc_bytes_write() function.
+
+## [1.7.0] - 2019-03-29
+### Added
+- Added drivers for NVMC and TEMP.
+- Added HALs: AAR and FICR.
+- Added support for the custom instruction long frame mode in the QSPI driver.
+
+### Changed
+- Reworked HAL for NVMC. Now it can be used for all SoCs supported by nrfx.
+- Reworked HAL for TEMP.
+- Improved documentation. Now it is more precise and can be generated without warnings with newer versions of doxygen.
+- Improved the UARTE driver to consume less current after the TX operation. Now at the end of the transmission the transmitter is turned off by the STOPTX task.
+- Improved C++ support in drivers. Now fields in structures are filled up in the correct order.
+- Changed to size_t the type used for holding the amount of data in the TWIS driver.
+
+### Fixed
+- Fixed a race condition in the USBD driver. It could occur when an IN transfer was interrupted by an OUT transaction, which in turn was interrupted by a process with a higher priority.
+
+## [1.6.2] - 2019-02-12
+### Added
+- Added the possibility to use the macro NRFX_COREDEP_DELAY_US_LOOP_CYCLES to specify the number of cycles consumed by one iteration of the internal loop in the function nrfx_coredep_delay_us().
+
+### Changed
+- Updated MDK to version 8.24.1.
+
+## [1.6.1] - 2019-01-29
+### Fixed
+- Fixed an issue in the NFCT driver that caused a performance loss on nRF52832. The interrupt configuration is now properly restored after the NRFX_NFCT_EVT_FIELD_LOST event.
+
## [1.6.0] - 2019-01-18
### Added
- Added support for nRF52811.
diff --git a/third_party/NordicSemiconductor/nrfx/README.md b/third_party/NordicSemiconductor/nrfx/README.md
index ab233c0..597398c 100644
--- a/third_party/NordicSemiconductor/nrfx/README.md
+++ b/third_party/NordicSemiconductor/nrfx/README.md
@@ -16,6 +16,7 @@
* nRF52810
* nRF52811
* nRF52832
+* nRF52833
* nRF52840
* nRF9160
@@ -24,12 +25,13 @@
```
.
├── doc # Project documentation files
- ├── drivers # nrfx drivers files
- │ └── include # nrfx drivers headers
- │ └── src # nrfx drivers sources
+ ├── drivers # nrfx driver files
+ │ └── include # nrfx driver headers
+ │ └── src # nrfx driver sources
├── hal # Hardware Access Layer files
- ├── mdk # Nordic MDK files
- ├── soc # Nordic SoC related files
+ ├── helpers # nrfx driver helper files
+ ├── mdk # nRF MDK files
+ ├── soc # SoC specific files
└── templates # Templates of nrfx integration files
```
diff --git a/third_party/NordicSemiconductor/nrfx/doc/buildfiles/nordic_small.png b/third_party/NordicSemiconductor/nrfx/doc/buildfiles/nordic_small.png
index 7b6a313..9ebfb7b 100644
--- a/third_party/NordicSemiconductor/nrfx/doc/buildfiles/nordic_small.png
+++ b/third_party/NordicSemiconductor/nrfx/doc/buildfiles/nordic_small.png
Binary files differ
diff --git a/third_party/NordicSemiconductor/nrfx/doc/drv_supp_matrix.dox b/third_party/NordicSemiconductor/nrfx/doc/drv_supp_matrix.dox
index ea32f3c..de320a6 100644
--- a/third_party/NordicSemiconductor/nrfx/doc/drv_supp_matrix.dox
+++ b/third_party/NordicSemiconductor/nrfx/doc/drv_supp_matrix.dox
@@ -3,51 +3,53 @@
The following matrix shows which drivers are supported by specific Nordic SoCs.
@{
-Driver | nRF51 Series | nRF52810/nRF52811 | nRF52832 | nRF52840 | nRF9160 |
------------------|--------------|-------------------| -------------| -------------| -------------|
-@ref nrf_adc |@tagGreenTick |@tagRedCross |@tagRedCross |@tagRedCross |@tagRedCross |
-@ref nrf_acl |@tagRedCross |@tagRedCross |@tagRedCross |@tagGreenTick |@tagRedCross |
-@ref nrf_bprot |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagRedCross |@tagRedCross |
-@ref nrf_ccm |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
-@ref nrf_clock |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_comp |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
-@ref nrf_dppi |@tagRedCross |@tagRedCross |@tagRedCross |@tagRedCross |@tagGreenTick |
-@ref nrf_ecb |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
-@ref nrf_gpio |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_gpiote |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_i2s |@tagRedCross |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_kmu |@tagRedCross |@tagRedCross |@tagRedCross |@tagRedCross |@tagGreenTick |
-@ref nrf_lpcomp |@tagGreenTick |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagRedCross |
-@ref nrf_mpu |@tagGreenTick |@tagRedCross |@tagRedCross |@tagRedCross |@tagRedCross |
-@ref nrf_mwu |@tagRedCross |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagRedCross |
-@ref nrf_nfct |@tagRedCross |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagRedCross |
-@ref nrf_nvmc |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
-@ref nrf_pdm |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_power |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_ppi |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
-@ref nrf_pwm |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_qdec |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
-@ref nrf_qspi |@tagRedCross |@tagRedCross |@tagRedCross |@tagGreenTick |@tagRedCross |
-@ref nrf_radio |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
-@ref nrf_rng |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
-@ref nrf_rtc |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_saadc |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_spi |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
-@ref nrf_spim |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_spis |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_spu |@tagRedCross |@tagRedCross |@tagRedCross |@tagRedCross |@tagGreenTick |
-@ref nrf_systick |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_swi_egu |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_temp |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
-@ref nrf_timer |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_twi |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
-@ref nrf_twim |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_twis |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_uart |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
-@ref nrf_uarte |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
-@ref nrf_usbd |@tagRedCross |@tagRedCross |@tagRedCross |@tagGreenTick |@tagRedCross |
-@ref nrf_vmc |@tagRedCross |@tagRedCross |@tagRedCross |@tagRedCross |@tagGreenTick |
-@ref nrf_wdt |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+Driver | nRF51 Series | nRF52810/nRF52811 | nRF52832 | nRF52833 | nRF52840 | nRF9160 |
+-----------------|--------------|-------------------| -------------| -------------| -------------| -------------|
+@ref nrf_aar |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
+@ref nrf_adc |@tagGreenTick |@tagRedCross |@tagRedCross |@tagRedCross |@tagRedCross |@tagRedCross |
+@ref nrf_acl |@tagRedCross |@tagRedCross |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagRedCross |
+@ref nrf_bprot |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagRedCross |@tagRedCross |@tagRedCross |
+@ref nrf_ccm |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
+@ref nrf_clock |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_comp |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
+@ref nrf_dppi |@tagRedCross |@tagRedCross |@tagRedCross |@tagRedCross |@tagRedCross |@tagGreenTick |
+@ref nrf_ecb |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
+@ref nrf_ficr |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_gpio |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_gpiote |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_i2s |@tagRedCross |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_kmu |@tagRedCross |@tagRedCross |@tagRedCross |@tagRedCross |@tagRedCross |@tagGreenTick |
+@ref nrf_lpcomp |@tagGreenTick |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
+@ref nrf_mpu |@tagGreenTick |@tagRedCross |@tagRedCross |@tagRedCross |@tagRedCross |@tagRedCross |
+@ref nrf_mwu |@tagRedCross |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
+@ref nrf_nfct |@tagRedCross |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
+@ref nrf_nvmc |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
+@ref nrf_pdm |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_power |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_ppi |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
+@ref nrf_pwm |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_qdec |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
+@ref nrf_qspi |@tagRedCross |@tagRedCross |@tagRedCross |@tagRedCross |@tagGreenTick |@tagRedCross |
+@ref nrf_radio |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
+@ref nrf_rng |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
+@ref nrf_rtc |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_saadc |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_spi |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
+@ref nrf_spim |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_spis |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_spu |@tagRedCross |@tagRedCross |@tagRedCross |@tagRedCross |@tagRedCross |@tagGreenTick |
+@ref nrf_systick |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_swi_egu |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_temp |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
+@ref nrf_timer |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_twi |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
+@ref nrf_twim |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_twis |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_uart |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagRedCross |
+@ref nrf_uarte |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
+@ref nrf_usbd |@tagRedCross |@tagRedCross |@tagRedCross |@tagGreenTick |@tagGreenTick |@tagRedCross |
+@ref nrf_vmc |@tagRedCross |@tagRedCross |@tagRedCross |@tagRedCross |@tagRedCross |@tagGreenTick |
+@ref nrf_wdt |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |@tagGreenTick |
@}
*/
diff --git a/third_party/NordicSemiconductor/nrfx/doc/nrf51_series.dox b/third_party/NordicSemiconductor/nrfx/doc/nrf51_series.dox
index 2e9a505..3f8201f 100644
--- a/third_party/NordicSemiconductor/nrfx/doc/nrf51_series.dox
+++ b/third_party/NordicSemiconductor/nrfx/doc/nrf51_series.dox
@@ -2,6 +2,8 @@
@page nrf51_series_drivers nRF51 Series Drivers
@{
+@ref nrf_aar
+
@ref nrf_adc
@ref nrf_ccm
@@ -10,6 +12,8 @@
@ref nrf_ecb
+@ref nrf_ficr
+
@ref nrf_gpio
@ref nrf_gpiote
diff --git a/third_party/NordicSemiconductor/nrfx/doc/nrf52810.dox b/third_party/NordicSemiconductor/nrfx/doc/nrf52810.dox
index ab6aaef..6aba434 100644
--- a/third_party/NordicSemiconductor/nrfx/doc/nrf52810.dox
+++ b/third_party/NordicSemiconductor/nrfx/doc/nrf52810.dox
@@ -2,6 +2,8 @@
@page nrf52810_drivers nRF52810/nRF52811 Drivers
@{
+@ref nrf_aar
+
@ref nrf_bprot
@ref nrf_ccm
@@ -12,6 +14,8 @@
@ref nrf_ecb
+@ref nrf_ficr
+
@ref nrf_gpio
@ref nrf_gpiote
diff --git a/third_party/NordicSemiconductor/nrfx/doc/nrf52832.dox b/third_party/NordicSemiconductor/nrfx/doc/nrf52832.dox
index 5ddaea2..58f3bbd 100644
--- a/third_party/NordicSemiconductor/nrfx/doc/nrf52832.dox
+++ b/third_party/NordicSemiconductor/nrfx/doc/nrf52832.dox
@@ -2,6 +2,8 @@
@page nrf52832_drivers nRF52832 Drivers
@{
+@ref nrf_aar
+
@ref nrf_bprot
@ref nrf_ccm
@@ -12,6 +14,8 @@
@ref nrf_ecb
+@ref nrf_ficr
+
@ref nrf_gpio
@ref nrf_gpiote
diff --git a/third_party/NordicSemiconductor/nrfx/doc/nrf52833.dox b/third_party/NordicSemiconductor/nrfx/doc/nrf52833.dox
new file mode 100644
index 0000000..d2637d9
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/doc/nrf52833.dox
@@ -0,0 +1,80 @@
+/**
+@page nrf52833_drivers nRF52833 Drivers
+@{
+
+@ref nrf_aar
+
+@ref nrf_acl
+
+@ref nrf_ccm
+
+@ref nrf_clock
+
+@ref nrf_comp
+
+@ref nrf_ecb
+
+@ref nrf_ficr
+
+@ref nrf_gpio
+
+@ref nrf_gpiote
+
+@ref nrf_i2s
+
+@ref nrf_lpcomp
+
+@ref nrf_mwu
+
+@ref nrf_nfct
+
+@ref nrf_nvmc
+
+@ref nrf_pdm
+
+@ref nrf_power
+
+@ref nrf_ppi
+
+@ref nrf_pwm
+
+@ref nrf_qdec
+
+@ref nrf_radio
+
+@ref nrf_rng
+
+@ref nrf_rtc
+
+@ref nrf_saadc
+
+@ref nrf_spi
+
+@ref nrf_spim
+
+@ref nrf_spis
+
+@ref nrf_systick
+
+@ref nrf_swi_egu
+
+@ref nrf_temp
+
+@ref nrf_timer
+
+@ref nrf_twi
+
+@ref nrf_twim
+
+@ref nrf_twis
+
+@ref nrf_uart
+
+@ref nrf_uarte
+
+@ref nrf_usbd
+
+@ref nrf_wdt
+
+@}
+*/
diff --git a/third_party/NordicSemiconductor/nrfx/doc/nrf52840.dox b/third_party/NordicSemiconductor/nrfx/doc/nrf52840.dox
index a3595b0..7e9b51e 100644
--- a/third_party/NordicSemiconductor/nrfx/doc/nrf52840.dox
+++ b/third_party/NordicSemiconductor/nrfx/doc/nrf52840.dox
@@ -2,6 +2,8 @@
@page nrf52840_drivers nRF52840 Drivers
@{
+@ref nrf_aar
+
@ref nrf_acl
@ref nrf_ccm
@@ -12,6 +14,8 @@
@ref nrf_ecb
+@ref nrf_ficr
+
@ref nrf_gpio
@ref nrf_gpiote
diff --git a/third_party/NordicSemiconductor/nrfx/doc/nrf9160.dox b/third_party/NordicSemiconductor/nrfx/doc/nrf9160.dox
index 3bdd9d7..fd929ad 100644
--- a/third_party/NordicSemiconductor/nrfx/doc/nrf9160.dox
+++ b/third_party/NordicSemiconductor/nrfx/doc/nrf9160.dox
@@ -8,6 +8,8 @@
@ref nrf_dppi
+@ref nrf_ficr
+
@ref nrf_gpio
@ref nrf_gpiote
@@ -16,6 +18,8 @@
@ref nrf_kmu
+@ref nrf_nvmc
+
@ref nrf_pdm
@ref nrf_power
diff --git a/third_party/NordicSemiconductor/nrfx/doc/nrfx.doxyfile b/third_party/NordicSemiconductor/nrfx/doc/nrfx.doxyfile
index da96b81..3bf06cc 100644
--- a/third_party/NordicSemiconductor/nrfx/doc/nrfx.doxyfile
+++ b/third_party/NordicSemiconductor/nrfx/doc/nrfx.doxyfile
@@ -1,1553 +1,2030 @@
-# Doxyfile 1.8.3.1
+# Doxyfile 1.8.14
# This file describes the settings to be used by the documentation system
# doxygen (www.doxygen.org) for a project.
#
-# All text after a hash (#) is considered a comment and will be ignored.
+# All text after a double hash (##) is considered a comment and is placed in
+# front of the TAG it is preceding.
+#
+# All text after a single hash (#) is considered a comment and will be ignored.
# The format is:
-# TAG = value [value, ...]
-# For lists items can also be appended using:
-# TAG += value [value, ...]
-# Values that contain spaces should be placed between quotes (" ").
+# TAG = value [value, ...]
+# For lists, items can also be appended using:
+# TAG += value [value, ...]
+# Values that contain spaces should be placed between quotes (\" \").
#---------------------------------------------------------------------------
# Project related configuration options
#---------------------------------------------------------------------------
# This tag specifies the encoding used for all characters in the config file
-# that follow. The default is UTF-8 which is also the encoding used for all
-# text before the first occurrence of this tag. Doxygen uses libiconv (or the
-# iconv built into libc) for the transcoding. See
-# http://www.gnu.org/software/libiconv for the list of possible encodings.
+# that follow. The default is UTF-8 which is also the encoding used for all text
+# before the first occurrence of this tag. Doxygen uses libiconv (or the iconv
+# built into libc) for the transcoding. See
+# https://www.gnu.org/software/libiconv/ for the list of possible encodings.
+# The default value is: UTF-8.
-DOXYFILE_ENCODING = UTF-8
+DOXYFILE_ENCODING = UTF-8
-# The PROJECT_NAME tag is a single word (or sequence of words) that should
-# identify the project. Note that if you do not use Doxywizard you need
-# to put quotes around the project name if it contains spaces.
+# The PROJECT_NAME tag is a single word (or a sequence of words surrounded by
+# double-quotes, unless you are using Doxywizard) that should identify the
+# project for which the documentation is generated. This name is used in the
+# title of most generated pages and in a few other places.
+# The default value is: My Project.
-PROJECT_NAME = "nrfx"
+PROJECT_NAME = "nrfx"
+
+# The PROJECT_NUMBER tag can be used to enter a project or revision number. This
+# could be handy for archiving the generated documentation or if some version
+# control system is used.
+
### EDIT THIS ###
-# The PROJECT_NUMBER tag can be used to enter a project or revision number.
-# This could be handy for archiving the generated documentation or
-# if some version control system is used.
-
-PROJECT_NUMBER = "1.6"
-### EDIT THIS ###
+PROJECT_NUMBER = "1.8"
# Using the PROJECT_BRIEF tag one can provide an optional one line description
-# for a project that appears at the top of each page and should give viewer
-# a quick idea about the purpose of the project. Keep the description short.
+# for a project that appears at the top of each page and should give viewer a
+# quick idea about the purpose of the project. Keep the description short.
-PROJECT_BRIEF =
-
-# With the PROJECT_LOGO tag one can specify an logo or icon that is
-# included in the documentation. The maximum height of the logo should not
-# exceed 55 pixels and the maximum width should not exceed 200 pixels.
-# Doxygen will copy the logo to the output directory.
-
-PROJECT_LOGO = buildfiles/nordic_small.png
-
-# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute)
-# base path where the generated documentation will be put.
-# If a relative path is entered, it will be relative to the location
-# where doxygen was started. If left blank the current directory will be used.
-
-OUTPUT_DIRECTORY =
### EDIT THIS ###
-# If the CREATE_SUBDIRS tag is set to YES, then doxygen will create
-# 4096 sub-directories (in 2 levels) under the output directory of each output
-# format and will distribute the generated files over these directories.
-# Enabling this option can be useful when feeding doxygen a huge amount of
-# source files, where putting all generated files in the same directory would
-# otherwise cause performance problems for the file system.
+PROJECT_BRIEF =
-CREATE_SUBDIRS = NO
+# With the PROJECT_LOGO tag one can specify a logo or an icon that is included
+# in the documentation. The maximum height of the logo should not exceed 55
+# pixels and the maximum width should not exceed 200 pixels. Doxygen will copy
+# the logo to the output directory.
+
+PROJECT_LOGO = buildfiles/nordic_small.png
+
+# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute) path
+# into which the generated documentation will be written. If a relative path is
+# entered, it will be relative to the location where doxygen was started. If
+# left blank the current directory will be used.
+
+OUTPUT_DIRECTORY =
+
+# If the CREATE_SUBDIRS tag is set to YES then doxygen will create 4096 sub-
+# directories (in 2 levels) under the output directory of each output format and
+# will distribute the generated files over these directories. Enabling this
+# option can be useful when feeding doxygen a huge amount of source files, where
+# putting all generated files in the same directory would otherwise causes
+# performance problems for the file system.
+# The default value is: NO.
+
+### EDIT THIS ###
+
+CREATE_SUBDIRS = NO
+
+# If the ALLOW_UNICODE_NAMES tag is set to YES, doxygen will allow non-ASCII
+# characters to appear in the names of generated files. If set to NO, non-ASCII
+# characters will be escaped, for example _xE3_x81_x84 will be used for Unicode
+# U+3044.
+# The default value is: NO.
+
+#ALLOW_UNICODE_NAMES = NO
# The OUTPUT_LANGUAGE tag is used to specify the language in which all
# documentation generated by doxygen is written. Doxygen will use this
# information to generate all constant output in the proper language.
-# The default language is English, other supported languages are:
-# Afrikaans, Arabic, Brazilian, Catalan, Chinese, Chinese-Traditional,
-# Croatian, Czech, Danish, Dutch, Esperanto, Farsi, Finnish, French, German,
-# Greek, Hungarian, Italian, Japanese, Japanese-en (Japanese with English
-# messages), Korean, Korean-en, Lithuanian, Norwegian, Macedonian, Persian,
-# Polish, Portuguese, Romanian, Russian, Serbian, Serbian-Cyrillic, Slovak,
-# Slovene, Spanish, Swedish, Ukrainian, and Vietnamese.
+# Possible values are: Afrikaans, Arabic, Armenian, Brazilian, Catalan, Chinese,
+# Chinese-Traditional, Croatian, Czech, Danish, Dutch, English (United States),
+# Esperanto, Farsi (Persian), Finnish, French, German, Greek, Hungarian,
+# Indonesian, Italian, Japanese, Japanese-en (Japanese with English messages),
+# Korean, Korean-en (Korean with English messages), Latvian, Lithuanian,
+# Macedonian, Norwegian, Persian (Farsi), Polish, Portuguese, Romanian, Russian,
+# Serbian, Serbian-Cyrillic, Slovak, Slovene, Spanish, Swedish, Turkish,
+# Ukrainian and Vietnamese.
+# The default value is: English.
-OUTPUT_LANGUAGE = English
+OUTPUT_LANGUAGE = English
-# If the BRIEF_MEMBER_DESC tag is set to YES (the default) Doxygen will
-# include brief member descriptions after the members that are listed in
-# the file and class documentation (similar to JavaDoc).
-# Set to NO to disable this.
+# If the BRIEF_MEMBER_DESC tag is set to YES, doxygen will include brief member
+# descriptions after the members that are listed in the file and class
+# documentation (similar to Javadoc). Set to NO to disable this.
+# The default value is: YES.
-BRIEF_MEMBER_DESC = YES
+BRIEF_MEMBER_DESC = YES
-# If the REPEAT_BRIEF tag is set to YES (the default) Doxygen will prepend
-# the brief description of a member or function before the detailed description.
-# Note: if both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the
+# If the REPEAT_BRIEF tag is set to YES, doxygen will prepend the brief
+# description of a member or function before the detailed description
+#
+# Note: If both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the
# brief descriptions will be completely suppressed.
+# The default value is: YES.
-REPEAT_BRIEF = YES
+REPEAT_BRIEF = YES
-# This tag implements a quasi-intelligent brief description abbreviator
-# that is used to form the text in various listings. Each string
-# in this list, if found as the leading text of the brief description, will be
-# stripped from the text and the result after processing the whole list, is
-# used as the annotated text. Otherwise, the brief description is used as-is.
-# If left blank, the following values are used ("$name" is automatically
-# replaced with the name of the entity): "The $name class" "The $name widget"
-# "The $name file" "is" "provides" "specifies" "contains"
-# "represents" "a" "an" "the"
+# This tag implements a quasi-intelligent brief description abbreviator that is
+# used to form the text in various listings. Each string in this list, if found
+# as the leading text of the brief description, will be stripped from the text
+# and the result, after processing the whole list, is used as the annotated
+# text. Otherwise, the brief description is used as-is. If left blank, the
+# following values are used ($name is automatically replaced with the name of
+# the entity):The $name class, The $name widget, The $name file, is, provides,
+# specifies, contains, represents, a, an and the.
-ABBREVIATE_BRIEF =
+ABBREVIATE_BRIEF =
# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then
-# Doxygen will generate a detailed section even if there is only a brief
+# doxygen will generate a detailed section even if there is only a brief
# description.
+# The default value is: NO.
-ALWAYS_DETAILED_SEC = NO
+ALWAYS_DETAILED_SEC = NO
# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all
# inherited members of a class in the documentation of that class as if those
# members were ordinary class members. Constructors, destructors and assignment
# operators of the base classes will not be shown.
+# The default value is: NO.
-INLINE_INHERITED_MEMB = NO
+INLINE_INHERITED_MEMB = NO
-# If the FULL_PATH_NAMES tag is set to YES then Doxygen will prepend the full
-# path before files name in the file list and in the header files. If set
-# to NO the shortest path that makes the file name unique will be used.
+# If the FULL_PATH_NAMES tag is set to YES, doxygen will prepend the full path
+# before files name in the file list and in the header files. If set to NO the
+# shortest path that makes the file name unique will be used
+# The default value is: YES.
-FULL_PATH_NAMES = YES
+FULL_PATH_NAMES = YES
-# If the FULL_PATH_NAMES tag is set to YES then the STRIP_FROM_PATH tag
-# can be used to strip a user-defined part of the path. Stripping is
-# only done if one of the specified strings matches the left-hand part of
-# the path. The tag can be used to show relative paths in the file list.
-# If left blank the directory from which doxygen is run is used as the
-# path to strip. Note that you specify absolute paths here, but also
-# relative paths, which will be relative from the directory where doxygen is
-# started.
+# The STRIP_FROM_PATH tag can be used to strip a user-defined part of the path.
+# Stripping is only done if one of the specified strings matches the left-hand
+# part of the path. The tag can be used to show relative paths in the file list.
+# If left blank the directory from which doxygen is run is used as the path to
+# strip.
+#
+# Note that you can specify absolute paths here, but also relative paths, which
+# will be relative from the directory where doxygen is started.
+# This tag requires that the tag FULL_PATH_NAMES is set to YES.
-STRIP_FROM_PATH = ..
+STRIP_FROM_PATH = ..
-# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of
-# the path mentioned in the documentation of a class, which tells
-# the reader which header file to include in order to use a class.
-# If left blank only the name of the header file containing the class
-# definition is used. Otherwise one should specify the include paths that
-# are normally passed to the compiler using the -I flag.
+# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of the
+# path mentioned in the documentation of a class, which tells the reader which
+# header file to include in order to use a class. If left blank only the name of
+# the header file containing the class definition is used. Otherwise one should
+# specify the list of include paths that are normally passed to the compiler
+# using the -I flag.
-STRIP_FROM_INC_PATH =
+STRIP_FROM_INC_PATH =
-# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter
-# (but less readable) file names. This can be useful if your file system
-# doesn't support long names like on DOS, Mac, or CD-ROM.
+# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter (but
+# less readable) file names. This can be useful is your file systems doesn't
+# support long names like on DOS, Mac, or CD-ROM.
+# The default value is: NO.
-SHORT_NAMES = NO
+SHORT_NAMES = NO
-# If the JAVADOC_AUTOBRIEF tag is set to YES then Doxygen
-# will interpret the first line (until the first dot) of a JavaDoc-style
-# comment as the brief description. If set to NO, the JavaDoc
-# comments will behave just like regular Qt-style comments
-# (thus requiring an explicit @brief command for a brief description.)
+# If the JAVADOC_AUTOBRIEF tag is set to YES then doxygen will interpret the
+# first line (until the first dot) of a Javadoc-style comment as the brief
+# description. If set to NO, the Javadoc-style will behave just like regular Qt-
+# style comments (thus requiring an explicit @brief command for a brief
+# description.)
+# The default value is: NO.
-JAVADOC_AUTOBRIEF = NO
+JAVADOC_AUTOBRIEF = NO
-# If the QT_AUTOBRIEF tag is set to YES then Doxygen will
-# interpret the first line (until the first dot) of a Qt-style
-# comment as the brief description. If set to NO, the comments
-# will behave just like regular Qt-style comments (thus requiring
-# an explicit \brief command for a brief description.)
+# If the QT_AUTOBRIEF tag is set to YES then doxygen will interpret the first
+# line (until the first dot) of a Qt-style comment as the brief description. If
+# set to NO, the Qt-style will behave just like regular Qt-style comments (thus
+# requiring an explicit \brief command for a brief description.)
+# The default value is: NO.
-QT_AUTOBRIEF = NO
+QT_AUTOBRIEF = NO
-# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make Doxygen
-# treat a multi-line C++ special comment block (i.e. a block of //! or ///
-# comments) as a brief description. This used to be the default behaviour.
-# The new default is to treat a multi-line C++ comment block as a detailed
-# description. Set this tag to YES if you prefer the old behaviour instead.
+# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make doxygen treat a
+# multi-line C++ special comment block (i.e. a block of //! or /// comments) as
+# a brief description. This used to be the default behavior. The new default is
+# to treat a multi-line C++ comment block as a detailed description. Set this
+# tag to YES if you prefer the old behavior instead.
+#
+# Note that setting this tag to YES also means that rational rose comments are
+# not recognized any more.
+# The default value is: NO.
MULTILINE_CPP_IS_BRIEF = NO
-# If the INHERIT_DOCS tag is set to YES (the default) then an undocumented
-# member inherits the documentation from any documented member that it
-# re-implements.
+# If the INHERIT_DOCS tag is set to YES then an undocumented member inherits the
+# documentation from any documented member that it re-implements.
+# The default value is: YES.
-INHERIT_DOCS = YES
+INHERIT_DOCS = YES
-# If the SEPARATE_MEMBER_PAGES tag is set to YES, then doxygen will produce
-# a new page for each member. If set to NO, the documentation of a member will
-# be part of the file/class/namespace that contains it.
+# If the SEPARATE_MEMBER_PAGES tag is set to YES then doxygen will produce a new
+# page for each member. If set to NO, the documentation of a member will be part
+# of the file/class/namespace that contains it.
+# The default value is: NO.
-SEPARATE_MEMBER_PAGES = NO
+SEPARATE_MEMBER_PAGES = NO
-# The TAB_SIZE tag can be used to set the number of spaces in a tab.
-# Doxygen uses this value to replace tabs by spaces in code fragments.
+# The TAB_SIZE tag can be used to set the number of spaces in a tab. Doxygen
+# uses this value to replace tabs by spaces in code fragments.
+# Minimum value: 1, maximum value: 16, default value: 4.
-TAB_SIZE = 4
+TAB_SIZE = 4
-# This tag can be used to specify a number of aliases that acts
-# as commands in the documentation. An alias has the form "name=value".
-# For example adding "sideeffect=\par Side Effects:\n" will allow you to
-# put the command \sideeffect (or @sideeffect) in the documentation, which
-# will result in a user-defined paragraph with heading "Side Effects:".
-# You can put \n's in the value part of an alias to insert newlines.
+# This tag can be used to specify a number of aliases that act as commands in
+# the documentation. An alias has the form:
+# name=value
+# For example adding
+# "sideeffect=@par Side Effects:\n"
+# will allow you to put the command \sideeffect (or @sideeffect) in the
+# documentation, which will result in a user-defined paragraph with heading
+# "Side Effects:". You can put \n's in the value part of an alias to insert
+# newlines (in the resulting output). You can put ^^ in the value part of an
+# alias to insert a newline as if a physical newline was in the original file.
-ALIASES = \
-tagGreenTick="@htmlonly<CENTER><font color="green">✔</font></CENTER>@endhtmlonly" \
-tagRedCross="@htmlonly<CENTER><font color="red">✖</font></CENTER>@endhtmlonly" \
-linkProductSpecification52="[nRF52840 Product Specification](http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52/dita/nrf52/chips/nrf52840_ps.html) or [nRF52832 Product Specification](http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52/dita/nrf52/chips/nrf52832_ps.html)" \
-
+ALIASES = "tagGreenTick=@htmlonly<CENTER><font color= green>✔</font></CENTER>@endhtmlonly" \
+ "tagRedCross=@htmlonly<CENTER><font color= red>✖</font></CENTER>@endhtmlonly" \
+ "linkProductSpecification52=[nRF52840 Product Specification](http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52/dita/nrf52/chips/nrf52840_ps.html) or [nRF52832 Product Specification](http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52/dita/nrf52/chips/nrf52832_ps.html)"
# This tag can be used to specify a number of word-keyword mappings (TCL only).
-# A mapping has the form "name=value". For example adding
-# "class=itcl::class" will allow you to use the command class in the
-# itcl::class meaning.
+# A mapping has the form "name=value". For example adding "class=itcl::class"
+# will allow you to use the command class in the itcl::class meaning.
-TCL_SUBST =
+TCL_SUBST =
-# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C
-# sources only. Doxygen will then generate output that is more tailored for C.
-# For instance, some of the names that are used will be different. The list
-# of all members will be omitted, etc.
+# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C sources
+# only. Doxygen will then generate output that is more tailored for C. For
+# instance, some of the names that are used will be different. The list of all
+# members will be omitted, etc.
+# The default value is: NO.
-OPTIMIZE_OUTPUT_FOR_C = YES
+OPTIMIZE_OUTPUT_FOR_C = YES
-# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java
-# sources only. Doxygen will then generate output that is more tailored for
-# Java. For instance, namespaces will be presented as packages, qualified
-# scopes will look different, etc.
+# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java or
+# Python sources only. Doxygen will then generate output that is more tailored
+# for that language. For instance, namespaces will be presented as packages,
+# qualified scopes will look different, etc.
+# The default value is: NO.
-OPTIMIZE_OUTPUT_JAVA = NO
+OPTIMIZE_OUTPUT_JAVA = NO
# Set the OPTIMIZE_FOR_FORTRAN tag to YES if your project consists of Fortran
-# sources only. Doxygen will then generate output that is more tailored for
-# Fortran.
+# sources. Doxygen will then generate output that is tailored for Fortran.
+# The default value is: NO.
-OPTIMIZE_FOR_FORTRAN = NO
+OPTIMIZE_FOR_FORTRAN = NO
# Set the OPTIMIZE_OUTPUT_VHDL tag to YES if your project consists of VHDL
-# sources. Doxygen will then generate output that is tailored for
-# VHDL.
+# sources. Doxygen will then generate output that is tailored for VHDL.
+# The default value is: NO.
-OPTIMIZE_OUTPUT_VHDL = NO
+OPTIMIZE_OUTPUT_VHDL = NO
# Doxygen selects the parser to use depending on the extension of the files it
# parses. With this tag you can assign which parser to use for a given
# extension. Doxygen has a built-in mapping, but you can override or extend it
-# using this tag. The format is ext=language, where ext is a file extension,
-# and language is one of the parsers supported by doxygen: IDL, Java,
-# Javascript, CSharp, C, C++, D, PHP, Objective-C, Python, Fortran, VHDL, C,
-# C++. For instance to make doxygen treat .inc files as Fortran files (default
-# is PHP), and .f files as C (default is Fortran), use: inc=Fortran f=C. Note
-# that for custom extensions you also need to set FILE_PATTERNS otherwise the
-# files are not read by doxygen.
+# using this tag. The format is ext=language, where ext is a file extension, and
+# language is one of the parsers supported by doxygen: IDL, Java, Javascript,
+# C#, C, C++, D, PHP, Objective-C, Python, Fortran (fixed format Fortran:
+# FortranFixed, free formatted Fortran: FortranFree, unknown formatted Fortran:
+# Fortran. In the later case the parser tries to guess whether the code is fixed
+# or free formatted code, this is the default for Fortran type files), VHDL. For
+# instance to make doxygen treat .inc files as Fortran files (default is PHP),
+# and .f files as C (default is Fortran), use: inc=Fortran f=C.
+#
+# Note: For files without extension you can use no_extension as a placeholder.
+#
+# Note that for custom extensions you also need to set FILE_PATTERNS otherwise
+# the files are not read by doxygen.
-EXTENSION_MAPPING =
+EXTENSION_MAPPING =
-# If MARKDOWN_SUPPORT is enabled (the default) then doxygen pre-processes all
-# comments according to the Markdown format, which allows for more readable
+# If the MARKDOWN_SUPPORT tag is enabled then doxygen pre-processes all comments
+# according to the Markdown format, which allows for more readable
# documentation. See http://daringfireball.net/projects/markdown/ for details.
-# The output of markdown processing is further processed by doxygen, so you
-# can mix doxygen, HTML, and XML commands with Markdown formatting.
-# Disable only in case of backward compatibilities issues.
+# The output of markdown processing is further processed by doxygen, so you can
+# mix doxygen, HTML, and XML commands with Markdown formatting. Disable only in
+# case of backward compatibilities issues.
+# The default value is: YES.
-MARKDOWN_SUPPORT = YES
+MARKDOWN_SUPPORT = YES
-# When enabled doxygen tries to link words that correspond to documented classes,
-# or namespaces to their corresponding documentation. Such a link can be
-# prevented in individual cases by by putting a % sign in front of the word or
+# When the TOC_INCLUDE_HEADINGS tag is set to a non-zero value, all headings up
+# to that level are automatically included in the table of contents, even if
+# they do not have an id attribute.
+# Note: This feature currently applies only to Markdown headings.
+# Minimum value: 0, maximum value: 99, default value: 0.
+# This tag requires that the tag MARKDOWN_SUPPORT is set to YES.
+
+#TOC_INCLUDE_HEADINGS = 0
+
+# When enabled doxygen tries to link words that correspond to documented
+# classes, or namespaces to their corresponding documentation. Such a link can
+# be prevented in individual cases by putting a % sign in front of the word or
# globally by setting AUTOLINK_SUPPORT to NO.
+# The default value is: YES.
-AUTOLINK_SUPPORT = YES
+AUTOLINK_SUPPORT = YES
# If you use STL classes (i.e. std::string, std::vector, etc.) but do not want
-# to include (a tag file for) the STL sources as input, then you should
-# set this tag to YES in order to let doxygen match functions declarations and
-# definitions whose arguments contain STL classes (e.g. func(std::string); v.s.
-# func(std::string) {}). This also makes the inheritance and collaboration
+# to include (a tag file for) the STL sources as input, then you should set this
+# tag to YES in order to let doxygen match functions declarations and
+# definitions whose arguments contain STL classes (e.g. func(std::string);
+# versus func(std::string) {}). This also make the inheritance and collaboration
# diagrams that involve STL classes more complete and accurate.
+# The default value is: NO.
-BUILTIN_STL_SUPPORT = NO
+BUILTIN_STL_SUPPORT = NO
# If you use Microsoft's C++/CLI language, you should set this option to YES to
# enable parsing support.
+# The default value is: NO.
-CPP_CLI_SUPPORT = NO
+CPP_CLI_SUPPORT = NO
-# Set the SIP_SUPPORT tag to YES if your project consists of sip sources only.
-# Doxygen will parse them like normal C++ but will assume all classes use public
-# instead of private inheritance when no explicit protection keyword is present.
+# Set the SIP_SUPPORT tag to YES if your project consists of sip (see:
+# https://www.riverbankcomputing.com/software/sip/intro) sources only. Doxygen
+# will parse them like normal C++ but will assume all classes use public instead
+# of private inheritance when no explicit protection keyword is present.
+# The default value is: NO.
-SIP_SUPPORT = NO
+SIP_SUPPORT = NO
# For Microsoft's IDL there are propget and propput attributes to indicate
-# getter and setter methods for a property. Setting this option to YES (the
-# default) will make doxygen replace the get and set methods by a property in
-# the documentation. This will only work if the methods are indeed getting or
-# setting a simple type. If this is not the case, or you want to show the
-# methods anyway, you should set this option to NO.
+# getter and setter methods for a property. Setting this option to YES will make
+# doxygen to replace the get and set methods by a property in the documentation.
+# This will only work if the methods are indeed getting or setting a simple
+# type. If this is not the case, or you want to show the methods anyway, you
+# should set this option to NO.
+# The default value is: YES.
-IDL_PROPERTY_SUPPORT = YES
+IDL_PROPERTY_SUPPORT = YES
# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC
-# tag is set to YES, then doxygen will reuse the documentation of the first
+# tag is set to YES then doxygen will reuse the documentation of the first
# member in the group (if any) for the other members of the group. By default
# all members of a group must be documented explicitly.
+# The default value is: NO.
-DISTRIBUTE_GROUP_DOC = NO
+DISTRIBUTE_GROUP_DOC = NO
-# Set the SUBGROUPING tag to YES (the default) to allow class member groups of
-# the same type (for instance a group of public functions) to be put as a
-# subgroup of that type (e.g. under the Public Functions section). Set it to
-# NO to prevent subgrouping. Alternatively, this can be done per class using
-# the \nosubgrouping command.
+# If one adds a struct or class to a group and this option is enabled, then also
+# any nested class or struct is added to the same group. By default this option
+# is disabled and one has to add nested compounds explicitly via \ingroup.
+# The default value is: NO.
-SUBGROUPING = YES
+#GROUP_NESTED_COMPOUNDS = NO
-# When the INLINE_GROUPED_CLASSES tag is set to YES, classes, structs and
-# unions are shown inside the group in which they are included (e.g. using
-# @ingroup) instead of on a separate page (for HTML and Man pages) or
-# section (for LaTeX and RTF).
+# Set the SUBGROUPING tag to YES to allow class member groups of the same type
+# (for instance a group of public functions) to be put as a subgroup of that
+# type (e.g. under the Public Functions section). Set it to NO to prevent
+# subgrouping. Alternatively, this can be done per class using the
+# \nosubgrouping command.
+# The default value is: YES.
+
+SUBGROUPING = YES
+
+# When the INLINE_GROUPED_CLASSES tag is set to YES, classes, structs and unions
+# are shown inside the group in which they are included (e.g. using \ingroup)
+# instead of on a separate page (for HTML and Man pages) or section (for LaTeX
+# and RTF).
+#
+# Note that this feature does not work in combination with
+# SEPARATE_MEMBER_PAGES.
+# The default value is: NO.
INLINE_GROUPED_CLASSES = NO
-# When the INLINE_SIMPLE_STRUCTS tag is set to YES, structs, classes, and
-# unions with only public data fields will be shown inline in the documentation
-# of the scope in which they are defined (i.e. file, namespace, or group
-# documentation), provided this scope is documented. If set to NO (the default),
-# structs, classes, and unions are shown on a separate page (for HTML and Man
-# pages) or section (for LaTeX and RTF).
+# When the INLINE_SIMPLE_STRUCTS tag is set to YES, structs, classes, and unions
+# with only public data fields or simple typedef fields will be shown inline in
+# the documentation of the scope in which they are defined (i.e. file,
+# namespace, or group documentation), provided this scope is documented. If set
+# to NO, structs, classes, and unions are shown on a separate page (for HTML and
+# Man pages) or section (for LaTeX and RTF).
+# The default value is: NO.
-INLINE_SIMPLE_STRUCTS = NO
+INLINE_SIMPLE_STRUCTS = NO
-# When TYPEDEF_HIDES_STRUCT is enabled, a typedef of a struct, union, or enum
-# is documented as struct, union, or enum with the name of the typedef. So
+# When TYPEDEF_HIDES_STRUCT tag is enabled, a typedef of a struct, union, or
+# enum is documented as struct, union, or enum with the name of the typedef. So
# typedef struct TypeS {} TypeT, will appear in the documentation as a struct
# with name TypeT. When disabled the typedef will appear as a member of a file,
-# namespace, or class. And the struct will be named TypeS. This can typically
-# be useful for C code in case the coding convention dictates that all compound
+# namespace, or class. And the struct will be named TypeS. This can typically be
+# useful for C code in case the coding convention dictates that all compound
# types are typedef'ed and only the typedef is referenced, never the tag name.
+# The default value is: NO.
-TYPEDEF_HIDES_STRUCT = NO
+TYPEDEF_HIDES_STRUCT = NO
-# The SYMBOL_CACHE_SIZE determines the size of the internal cache use to
-# determine which symbols to keep in memory and which to flush to disk.
-# When the cache is full, less often used symbols will be written to disk.
-# For small to medium size projects (<1000 input files) the default value is
-# probably good enough. For larger projects a too small cache size can cause
-# doxygen to be busy swapping symbols to and from disk most of the time
-# causing a significant performance penalty.
-# If the system has enough physical memory increasing the cache will improve the
-# performance by keeping more symbols in memory. Note that the value works on
-# a logarithmic scale so increasing the size by one will roughly double the
-# memory usage. The cache size is given by this formula:
-# 2^(16+SYMBOL_CACHE_SIZE). The valid range is 0..9, the default is 0,
-# corresponding to a cache size of 2^16 = 65536 symbols.
+# The size of the symbol lookup cache can be set using LOOKUP_CACHE_SIZE. This
+# cache is used to resolve symbols given their name and scope. Since this can be
+# an expensive process and often the same symbol appears multiple times in the
+# code, doxygen keeps a cache of pre-resolved symbols. If the cache is too small
+# doxygen will become slower. If the cache is too large, memory is wasted. The
+# cache size is given by this formula: 2^(16+LOOKUP_CACHE_SIZE). The valid range
+# is 0..9, the default is 0, corresponding to a cache size of 2^16=65536
+# symbols. At the end of a run doxygen will report the cache usage and suggest
+# the optimal cache size from a speed point of view.
+# Minimum value: 0, maximum value: 9, default value: 0.
-SYMBOL_CACHE_SIZE = 0
-
-# Similar to the SYMBOL_CACHE_SIZE the size of the symbol lookup cache can be
-# set using LOOKUP_CACHE_SIZE. This cache is used to resolve symbols given
-# their name and scope. Since this can be an expensive process and often the
-# same symbol appear multiple times in the code, doxygen keeps a cache of
-# pre-resolved symbols. If the cache is too small doxygen will become slower.
-# If the cache is too large, memory is wasted. The cache size is given by this
-# formula: 2^(16+LOOKUP_CACHE_SIZE). The valid range is 0..9, the default is 0,
-# corresponding to a cache size of 2^16 = 65536 symbols.
-
-LOOKUP_CACHE_SIZE = 0
+LOOKUP_CACHE_SIZE = 0
#---------------------------------------------------------------------------
# Build related configuration options
#---------------------------------------------------------------------------
-# If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in
-# documentation are documented, even if no documentation was available.
-# Private class members and static file members will be hidden unless
-# the EXTRACT_PRIVATE and EXTRACT_STATIC tags are set to YES
+# If the EXTRACT_ALL tag is set to YES, doxygen will assume all entities in
+# documentation are documented, even if no documentation was available. Private
+# class members and static file members will be hidden unless the
+# EXTRACT_PRIVATE respectively EXTRACT_STATIC tags are set to YES.
+# Note: This will also disable the warnings about undocumented members that are
+# normally produced when WARNINGS is set to YES.
+# The default value is: NO.
-EXTRACT_ALL = NO
+EXTRACT_ALL = NO
-# If the EXTRACT_PRIVATE tag is set to YES all private members of a class
-# will be included in the documentation.
+# If the EXTRACT_PRIVATE tag is set to YES, all private members of a class will
+# be included in the documentation.
+# The default value is: NO.
-EXTRACT_PRIVATE = NO
+EXTRACT_PRIVATE = NO
-# If the EXTRACT_PACKAGE tag is set to YES all members with package or internal
+# If the EXTRACT_PACKAGE tag is set to YES, all members with package or internal
# scope will be included in the documentation.
+# The default value is: NO.
-EXTRACT_PACKAGE = NO
+EXTRACT_PACKAGE = NO
-# If the EXTRACT_STATIC tag is set to YES all static members of a file
-# will be included in the documentation.
+# If the EXTRACT_STATIC tag is set to YES, all static members of a file will be
+# included in the documentation.
+# The default value is: NO.
-EXTRACT_STATIC = YES
+EXTRACT_STATIC = YES
-# If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs)
-# defined locally in source files will be included in the documentation.
-# If set to NO only classes defined in header files are included.
+# If the EXTRACT_LOCAL_CLASSES tag is set to YES, classes (and structs) defined
+# locally in source files will be included in the documentation. If set to NO,
+# only classes defined in header files are included. Does not have any effect
+# for Java sources.
+# The default value is: YES.
-EXTRACT_LOCAL_CLASSES = YES
+EXTRACT_LOCAL_CLASSES = YES
-# This flag is only useful for Objective-C code. When set to YES local
-# methods, which are defined in the implementation section but not in
-# the interface are included in the documentation.
-# If set to NO (the default) only methods in the interface are included.
+# This flag is only useful for Objective-C code. If set to YES, local methods,
+# which are defined in the implementation section but not in the interface are
+# included in the documentation. If set to NO, only methods in the interface are
+# included.
+# The default value is: NO.
-EXTRACT_LOCAL_METHODS = NO
+EXTRACT_LOCAL_METHODS = NO
# If this flag is set to YES, the members of anonymous namespaces will be
# extracted and appear in the documentation as a namespace called
-# 'anonymous_namespace{file}', where file will be replaced with the base
-# name of the file that contains the anonymous namespace. By default
-# anonymous namespaces are hidden.
+# 'anonymous_namespace{file}', where file will be replaced with the base name of
+# the file that contains the anonymous namespace. By default anonymous namespace
+# are hidden.
+# The default value is: NO.
-EXTRACT_ANON_NSPACES = NO
+EXTRACT_ANON_NSPACES = NO
-# If the HIDE_UNDOC_MEMBERS tag is set to YES, Doxygen will hide all
-# undocumented members of documented classes, files or namespaces.
-# If set to NO (the default) these members will be included in the
-# various overviews, but no documentation section is generated.
-# This option has no effect if EXTRACT_ALL is enabled.
+# If the HIDE_UNDOC_MEMBERS tag is set to YES, doxygen will hide all
+# undocumented members inside documented classes or files. If set to NO these
+# members will be included in the various overviews, but no documentation
+# section is generated. This option has no effect if EXTRACT_ALL is enabled.
+# The default value is: NO.
-HIDE_UNDOC_MEMBERS = NO
+HIDE_UNDOC_MEMBERS = NO
-# If the HIDE_UNDOC_CLASSES tag is set to YES, Doxygen will hide all
-# undocumented classes that are normally visible in the class hierarchy.
-# If set to NO (the default) these classes will be included in the various
-# overviews. This option has no effect if EXTRACT_ALL is enabled.
+# If the HIDE_UNDOC_CLASSES tag is set to YES, doxygen will hide all
+# undocumented classes that are normally visible in the class hierarchy. If set
+# to NO, these classes will be included in the various overviews. This option
+# has no effect if EXTRACT_ALL is enabled.
+# The default value is: NO.
-HIDE_UNDOC_CLASSES = NO
+HIDE_UNDOC_CLASSES = NO
-# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, Doxygen will hide all
-# friend (class|struct|union) declarations.
-# If set to NO (the default) these declarations will be included in the
-# documentation.
+# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, doxygen will hide all friend
+# (class|struct|union) declarations. If set to NO, these declarations will be
+# included in the documentation.
+# The default value is: NO.
-HIDE_FRIEND_COMPOUNDS = NO
+HIDE_FRIEND_COMPOUNDS = NO
-# If the HIDE_IN_BODY_DOCS tag is set to YES, Doxygen will hide any
-# documentation blocks found inside the body of a function.
-# If set to NO (the default) these blocks will be appended to the
-# function's detailed documentation block.
+# If the HIDE_IN_BODY_DOCS tag is set to YES, doxygen will hide any
+# documentation blocks found inside the body of a function. If set to NO, these
+# blocks will be appended to the function's detailed documentation block.
+# The default value is: NO.
-HIDE_IN_BODY_DOCS = NO
+HIDE_IN_BODY_DOCS = NO
-# The INTERNAL_DOCS tag determines if documentation
-# that is typed after a \internal command is included. If the tag is set
-# to NO (the default) then the documentation will be excluded.
-# Set it to YES to include the internal documentation.
+# The INTERNAL_DOCS tag determines if documentation that is typed after a
+# \internal command is included. If the tag is set to NO then the documentation
+# will be excluded. Set it to YES to include the internal documentation.
+# The default value is: NO.
-INTERNAL_DOCS = NO
+INTERNAL_DOCS = NO
-# If the CASE_SENSE_NAMES tag is set to NO then Doxygen will only generate
-# file names in lower-case letters. If set to YES upper-case letters are also
+# If the CASE_SENSE_NAMES tag is set to NO then doxygen will only generate file
+# names in lower-case letters. If set to YES, upper-case letters are also
# allowed. This is useful if you have classes or files whose names only differ
# in case and if your file system supports case sensitive file names. Windows
# and Mac users are advised to set this option to NO.
+# The default value is: system dependent.
-CASE_SENSE_NAMES = NO
+CASE_SENSE_NAMES = NO
-# If the HIDE_SCOPE_NAMES tag is set to NO (the default) then Doxygen
-# will show members with their full class and namespace scopes in the
-# documentation. If set to YES the scope will be hidden.
+# If the HIDE_SCOPE_NAMES tag is set to NO then doxygen will show members with
+# their full class and namespace scopes in the documentation. If set to YES, the
+# scope will be hidden.
+# The default value is: NO.
-HIDE_SCOPE_NAMES = NO
+HIDE_SCOPE_NAMES = NO
-# If the SHOW_INCLUDE_FILES tag is set to YES (the default) then Doxygen
-# will put a list of the files that are included by a file in the documentation
-# of that file.
+# If the HIDE_COMPOUND_REFERENCE tag is set to NO (default) then doxygen will
+# append additional text to a page's title, such as Class Reference. If set to
+# YES the compound reference will be hidden.
+# The default value is: NO.
-SHOW_INCLUDE_FILES = YES
+#HIDE_COMPOUND_REFERENCE= NO
-# If the FORCE_LOCAL_INCLUDES tag is set to YES then Doxygen
-# will list include files with double quotes in the documentation
-# rather than with sharp brackets.
+# If the SHOW_INCLUDE_FILES tag is set to YES then doxygen will put a list of
+# the files that are included by a file in the documentation of that file.
+# The default value is: YES.
-FORCE_LOCAL_INCLUDES = NO
+SHOW_INCLUDE_FILES = YES
-# If the INLINE_INFO tag is set to YES (the default) then a tag [inline]
-# is inserted in the documentation for inline members.
+# If the SHOW_GROUPED_MEMB_INC tag is set to YES then Doxygen will add for each
+# grouped member an include statement to the documentation, telling the reader
+# which file to include in order to use the member.
+# The default value is: NO.
-INLINE_INFO = YES
+#SHOW_GROUPED_MEMB_INC = NO
-# If the SORT_MEMBER_DOCS tag is set to YES (the default) then doxygen
-# will sort the (detailed) documentation of file and class members
-# alphabetically by member name. If set to NO the members will appear in
-# declaration order.
+# If the FORCE_LOCAL_INCLUDES tag is set to YES then doxygen will list include
+# files with double quotes in the documentation rather than with sharp brackets.
+# The default value is: NO.
-SORT_MEMBER_DOCS = YES
+FORCE_LOCAL_INCLUDES = NO
-# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the
-# brief documentation of file, namespace and class members alphabetically
-# by member name. If set to NO (the default) the members will appear in
-# declaration order.
+# If the INLINE_INFO tag is set to YES then a tag [inline] is inserted in the
+# documentation for inline members.
+# The default value is: YES.
-SORT_BRIEF_DOCS = NO
+INLINE_INFO = YES
-# If the SORT_MEMBERS_CTORS_1ST tag is set to YES then doxygen
-# will sort the (brief and detailed) documentation of class members so that
-# constructors and destructors are listed first. If set to NO (the default)
-# the constructors will appear in the respective orders defined by
-# SORT_MEMBER_DOCS and SORT_BRIEF_DOCS.
-# This tag will be ignored for brief docs if SORT_BRIEF_DOCS is set to NO
-# and ignored for detailed docs if SORT_MEMBER_DOCS is set to NO.
+# If the SORT_MEMBER_DOCS tag is set to YES then doxygen will sort the
+# (detailed) documentation of file and class members alphabetically by member
+# name. If set to NO, the members will appear in declaration order.
+# The default value is: YES.
+
+SORT_MEMBER_DOCS = YES
+
+# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the brief
+# descriptions of file, namespace and class members alphabetically by member
+# name. If set to NO, the members will appear in declaration order. Note that
+# this will also influence the order of the classes in the class list.
+# The default value is: NO.
+
+SORT_BRIEF_DOCS = NO
+
+# If the SORT_MEMBERS_CTORS_1ST tag is set to YES then doxygen will sort the
+# (brief and detailed) documentation of class members so that constructors and
+# destructors are listed first. If set to NO the constructors will appear in the
+# respective orders defined by SORT_BRIEF_DOCS and SORT_MEMBER_DOCS.
+# Note: If SORT_BRIEF_DOCS is set to NO this option is ignored for sorting brief
+# member documentation.
+# Note: If SORT_MEMBER_DOCS is set to NO this option is ignored for sorting
+# detailed member documentation.
+# The default value is: NO.
SORT_MEMBERS_CTORS_1ST = NO
-# If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the
-# hierarchy of group names into alphabetical order. If set to NO (the default)
-# the group names will appear in their defined order.
+# If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the hierarchy
+# of group names into alphabetical order. If set to NO the group names will
+# appear in their defined order.
+# The default value is: NO.
-SORT_GROUP_NAMES = NO
+SORT_GROUP_NAMES = NO
-# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be
-# sorted by fully-qualified names, including namespaces. If set to
-# NO (the default), the class list will be sorted only by class name,
-# not including the namespace part.
+# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be sorted by
+# fully-qualified names, including namespaces. If set to NO, the class list will
+# be sorted only by class name, not including the namespace part.
# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES.
-# Note: This option applies only to the class list, not to the
-# alphabetical list.
+# Note: This option applies only to the class list, not to the alphabetical
+# list.
+# The default value is: NO.
-SORT_BY_SCOPE_NAME = NO
+SORT_BY_SCOPE_NAME = NO
-# If the STRICT_PROTO_MATCHING option is enabled and doxygen fails to
-# do proper type resolution of all parameters of a function it will reject a
-# match between the prototype and the implementation of a member function even
-# if there is only one candidate or it is obvious which candidate to choose
-# by doing a simple string match. By disabling STRICT_PROTO_MATCHING doxygen
-# will still accept a match between prototype and implementation in such cases.
+# If the STRICT_PROTO_MATCHING option is enabled and doxygen fails to do proper
+# type resolution of all parameters of a function it will reject a match between
+# the prototype and the implementation of a member function even if there is
+# only one candidate or it is obvious which candidate to choose by doing a
+# simple string match. By disabling STRICT_PROTO_MATCHING doxygen will still
+# accept a match between prototype and implementation in such cases.
+# The default value is: NO.
-STRICT_PROTO_MATCHING = NO
+STRICT_PROTO_MATCHING = NO
-# The GENERATE_TODOLIST tag can be used to enable (YES) or
-# disable (NO) the todo list. This list is created by putting \todo
-# commands in the documentation.
+# The GENERATE_TODOLIST tag can be used to enable (YES) or disable (NO) the todo
+# list. This list is created by putting \todo commands in the documentation.
+# The default value is: YES.
-GENERATE_TODOLIST = YES
+GENERATE_TODOLIST = YES
-# The GENERATE_TESTLIST tag can be used to enable (YES) or
-# disable (NO) the test list. This list is created by putting \test
-# commands in the documentation.
+# The GENERATE_TESTLIST tag can be used to enable (YES) or disable (NO) the test
+# list. This list is created by putting \test commands in the documentation.
+# The default value is: YES.
-GENERATE_TESTLIST = YES
+GENERATE_TESTLIST = YES
-# The GENERATE_BUGLIST tag can be used to enable (YES) or
-# disable (NO) the bug list. This list is created by putting \bug
-# commands in the documentation.
+# The GENERATE_BUGLIST tag can be used to enable (YES) or disable (NO) the bug
+# list. This list is created by putting \bug commands in the documentation.
+# The default value is: YES.
-GENERATE_BUGLIST = YES
+GENERATE_BUGLIST = YES
-# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or
-# disable (NO) the deprecated list. This list is created by putting
-# \deprecated commands in the documentation.
+# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or disable (NO)
+# the deprecated list. This list is created by putting \deprecated commands in
+# the documentation.
+# The default value is: YES.
-GENERATE_DEPRECATEDLIST = YES
+GENERATE_DEPRECATEDLIST= YES
-# The ENABLED_SECTIONS tag can be used to enable conditional
-# documentation sections, marked by \if section-label ... \endif
-# and \cond section-label ... \endcond blocks.
+# The ENABLED_SECTIONS tag can be used to enable conditional documentation
+# sections, marked by \if <section_label> ... \endif and \cond <section_label>
+# ... \endcond blocks.
-ENABLED_SECTIONS =
+ENABLED_SECTIONS =
-# The MAX_INITIALIZER_LINES tag determines the maximum number of lines
-# the initial value of a variable or macro consists of for it to appear in
-# the documentation. If the initializer consists of more lines than specified
-# here it will be hidden. Use a value of 0 to hide initializers completely.
-# The appearance of the initializer of individual variables and macros in the
-# documentation can be controlled using \showinitializer or \hideinitializer
-# command in the documentation regardless of this setting.
+# The MAX_INITIALIZER_LINES tag determines the maximum number of lines that the
+# initial value of a variable or macro / define can have for it to appear in the
+# documentation. If the initializer consists of more lines than specified here
+# it will be hidden. Use a value of 0 to hide initializers completely. The
+# appearance of the value of individual variables and macros / defines can be
+# controlled using \showinitializer or \hideinitializer command in the
+# documentation regardless of this setting.
+# Minimum value: 0, maximum value: 10000, default value: 30.
-MAX_INITIALIZER_LINES = 30
+MAX_INITIALIZER_LINES = 30
-# Set the SHOW_USED_FILES tag to NO to disable the list of files generated
-# at the bottom of the documentation of classes and structs. If set to YES the
+# Set the SHOW_USED_FILES tag to NO to disable the list of files generated at
+# the bottom of the documentation of classes and structs. If set to YES, the
# list will mention the files that were used to generate the documentation.
+# The default value is: YES.
-SHOW_USED_FILES = YES
+SHOW_USED_FILES = YES
-# Set the SHOW_FILES tag to NO to disable the generation of the Files page.
-# This will remove the Files entry from the Quick Index and from the
-# Folder Tree View (if specified). The default is YES.
+# Set the SHOW_FILES tag to NO to disable the generation of the Files page. This
+# will remove the Files entry from the Quick Index and from the Folder Tree View
+# (if specified).
+# The default value is: YES.
-SHOW_FILES = NO
+SHOW_FILES = NO
-# Set the SHOW_NAMESPACES tag to NO to disable the generation of the
-# Namespaces page.
-# This will remove the Namespaces entry from the Quick Index
-# and from the Folder Tree View (if specified). The default is YES.
+# Set the SHOW_NAMESPACES tag to NO to disable the generation of the Namespaces
+# page. This will remove the Namespaces entry from the Quick Index and from the
+# Folder Tree View (if specified).
+# The default value is: YES.
-SHOW_NAMESPACES = YES
+SHOW_NAMESPACES = YES
# The FILE_VERSION_FILTER tag can be used to specify a program or script that
# doxygen should invoke to get the current version for each file (typically from
# the version control system). Doxygen will invoke the program by executing (via
-# popen()) the command <command> <input-file>, where <command> is the value of
-# the FILE_VERSION_FILTER tag, and <input-file> is the name of an input file
-# provided by doxygen. Whatever the program writes to standard output
-# is used as the file version. See the manual for examples.
+# popen()) the command command input-file, where command is the value of the
+# FILE_VERSION_FILTER tag, and input-file is the name of an input file provided
+# by doxygen. Whatever the program writes to standard output is used as the file
+# version. For an example see the documentation.
-FILE_VERSION_FILTER =
+FILE_VERSION_FILTER =
# The LAYOUT_FILE tag can be used to specify a layout file which will be parsed
# by doxygen. The layout file controls the global structure of the generated
# output files in an output format independent way. To create the layout file
-# that represents doxygen's defaults, run doxygen with the -l option.
-# You can optionally specify a file name after the option, if omitted
-# DoxygenLayout.xml will be used as the name of the layout file.
+# that represents doxygen's defaults, run doxygen with the -l option. You can
+# optionally specify a file name after the option, if omitted DoxygenLayout.xml
+# will be used as the name of the layout file.
+#
+# Note that if you run doxygen from a directory containing a file called
+# DoxygenLayout.xml, doxygen will parse it automatically even if the LAYOUT_FILE
+# tag is left empty.
-LAYOUT_FILE = buildfiles/layout.xml
+LAYOUT_FILE = buildfiles/layout.xml
-# The CITE_BIB_FILES tag can be used to specify one or more bib files
-# containing the references data. This must be a list of .bib files. The
-# .bib extension is automatically appended if omitted. Using this command
-# requires the bibtex tool to be installed. See also
-# http://en.wikipedia.org/wiki/BibTeX for more info. For LaTeX the style
-# of the bibliography can be controlled using LATEX_BIB_STYLE. To use this
-# feature you need bibtex and perl available in the search path. Do not use
-# file names with spaces, bibtex cannot handle them.
+# The CITE_BIB_FILES tag can be used to specify one or more bib files containing
+# the reference definitions. This must be a list of .bib files. The .bib
+# extension is automatically appended if omitted. This requires the bibtex tool
+# to be installed. See also https://en.wikipedia.org/wiki/BibTeX for more info.
+# For LaTeX the style of the bibliography can be controlled using
+# LATEX_BIB_STYLE. To use this feature you need bibtex and perl available in the
+# search path. See also \cite for info how to create references.
-CITE_BIB_FILES =
+CITE_BIB_FILES =
#---------------------------------------------------------------------------
-# configuration options related to warning and progress messages
+# Configuration options related to warning and progress messages
#---------------------------------------------------------------------------
-# The QUIET tag can be used to turn on/off the messages that are generated
-# by doxygen. Possible values are YES and NO. If left blank NO is used.
+# The QUIET tag can be used to turn on/off the messages that are generated to
+# standard output by doxygen. If QUIET is set to YES this implies that the
+# messages are off.
+# The default value is: NO.
-QUIET = YES
+QUIET = YES
# The WARNINGS tag can be used to turn on/off the warning messages that are
-# generated by doxygen. Possible values are YES and NO. If left blank
-# NO is used.
+# generated to standard error (stderr) by doxygen. If WARNINGS is set to YES
+# this implies that the warnings are on.
+#
+# Tip: Turn warnings on while writing the documentation.
+# The default value is: YES.
-WARNINGS = YES
+WARNINGS = YES
-# If WARN_IF_UNDOCUMENTED is set to YES, then doxygen will generate warnings
-# for undocumented members. If EXTRACT_ALL is set to YES then this flag will
-# automatically be disabled.
+# If the WARN_IF_UNDOCUMENTED tag is set to YES then doxygen will generate
+# warnings for undocumented members. If EXTRACT_ALL is set to YES then this flag
+# will automatically be disabled.
+# The default value is: YES.
-WARN_IF_UNDOCUMENTED = NO
+WARN_IF_UNDOCUMENTED = YES
-# If WARN_IF_DOC_ERROR is set to YES, doxygen will generate warnings for
-# potential errors in the documentation, such as not documenting some
-# parameters in a documented function, or documenting parameters that
-# don't exist or using markup commands wrongly.
+# If the WARN_IF_DOC_ERROR tag is set to YES, doxygen will generate warnings for
+# potential errors in the documentation, such as not documenting some parameters
+# in a documented function, or documenting parameters that don't exist or using
+# markup commands wrongly.
+# The default value is: YES.
-WARN_IF_DOC_ERROR = YES
+WARN_IF_DOC_ERROR = YES
-# The WARN_NO_PARAMDOC option can be enabled to get warnings for
-# functions that are documented, but have no documentation for their parameters
-# or return value. If set to NO (the default) doxygen will only warn about
-# wrong or incomplete parameter documentation, but not about the absence of
-# documentation.
+# This WARN_NO_PARAMDOC option can be enabled to get warnings for functions that
+# are documented, but have no documentation for their parameters or return
+# value. If set to NO, doxygen will only warn about wrong or incomplete
+# parameter documentation, but not about the absence of documentation.
+# The default value is: NO.
-WARN_NO_PARAMDOC = NO
+WARN_NO_PARAMDOC = NO
-# The WARN_FORMAT tag determines the format of the warning messages that
-# doxygen can produce. The string should contain the $file, $line, and $text
-# tags, which will be replaced by the file and line number from which the
-# warning originated and the warning text. Optionally the format may contain
-# $version, which will be replaced by the version of the file (if it could
-# be obtained via FILE_VERSION_FILTER)
+# If the WARN_AS_ERROR tag is set to YES then doxygen will immediately stop when
+# a warning is encountered.
+# The default value is: NO.
-WARN_FORMAT = "$file:$line: $text"
+#WARN_AS_ERROR = NO
-# The WARN_LOGFILE tag can be used to specify a file to which warning
-# and error messages should be written. If left blank the output is written
-# to stderr.
+# The WARN_FORMAT tag determines the format of the warning messages that doxygen
+# can produce. The string should contain the $file, $line, and $text tags, which
+# will be replaced by the file and line number from which the warning originated
+# and the warning text. Optionally the format may contain $version, which will
+# be replaced by the version of the file (if it could be obtained via
+# FILE_VERSION_FILTER)
+# The default value is: $file:$line: $text.
-WARN_LOGFILE = warnings_nrfx.txt
+WARN_FORMAT = "$file:$line: $text"
+
+# The WARN_LOGFILE tag can be used to specify a file to which warning and error
+# messages should be written. If left blank the output is written to standard
+# error (stderr).
+
+WARN_LOGFILE = warnings_nrfx.txt
+
+#---------------------------------------------------------------------------
+# Configuration options related to the input files
+#---------------------------------------------------------------------------
+
+# The INPUT tag is used to specify the files and/or directories that contain
+# documented source files. You may enter file names like myfile.cpp or
+# directories like /usr/src/myproject. Separate the files or directories with
+# spaces. See also FILE_PATTERNS and EXTENSION_MAPPING
+# Note: If this tag is empty the current directory is searched.
+
### EDIT THIS ###
-#---------------------------------------------------------------------------
-# configuration options related to the input files
-#---------------------------------------------------------------------------
-
-# The INPUT tag can be used to specify the files and/or directories that contain
-# documented source files. You may enter file names like "myfile.cpp" or
-# directories like "/usr/src/myproject". Separate the files or directories
-# with spaces.
-
-INPUT = ../drivers \
- ../hal \
- ../soc \
- ../templates \
- config_dox \
- .
+INPUT = ../helpers \
+ ../drivers \
+ ../hal \
+ ../soc \
+ ../templates \
+ config_dox \
+ .
# This tag can be used to specify the character encoding of the source files
-# that doxygen parses. Internally doxygen uses the UTF-8 encoding, which is
-# also the default input encoding. Doxygen uses libiconv (or the iconv built
-# into libc) for the transcoding. See http://www.gnu.org/software/libiconv for
-# the list of possible encodings.
+# that doxygen parses. Internally doxygen uses the UTF-8 encoding. Doxygen uses
+# libiconv (or the iconv built into libc) for the transcoding. See the libiconv
+# documentation (see: https://www.gnu.org/software/libiconv/) for the list of
+# possible encodings.
+# The default value is: UTF-8.
-INPUT_ENCODING = UTF-8
+INPUT_ENCODING = UTF-8
# If the value of the INPUT tag contains directories, you can use the
-# FILE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp
-# and *.h) to filter out the source-files in the directories. If left
-# blank the following patterns are tested:
-# *.c *.cc *.cxx *.cpp *.c++ *.d *.java *.ii *.ixx *.ipp *.i++ *.inl *.h *.hh
-# *.hxx *.hpp *.h++ *.idl *.odl *.cs *.php *.php3 *.inc *.m *.mm *.dox *.py
-# *.f90 *.f *.for *.vhd *.vhdl
+# FILE_PATTERNS tag to specify one or more wildcard patterns (like *.cpp and
+# *.h) to filter out the source-files in the directories.
+#
+# Note that for custom extensions or not directly supported extensions you also
+# need to set EXTENSION_MAPPING for the extension otherwise the files are not
+# read by doxygen.
+#
+# If left blank the following patterns are tested:*.c, *.cc, *.cxx, *.cpp,
+# *.c++, *.java, *.ii, *.ixx, *.ipp, *.i++, *.inl, *.idl, *.ddl, *.odl, *.h,
+# *.hh, *.hxx, *.hpp, *.h++, *.cs, *.d, *.php, *.php4, *.php5, *.phtml, *.inc,
+# *.m, *.markdown, *.md, *.mm, *.dox, *.py, *.pyw, *.f90, *.f95, *.f03, *.f08,
+# *.f, *.for, *.tcl, *.vhd, *.vhdl, *.ucf and *.qsf.
-FILE_PATTERNS = *.h *.dox
+FILE_PATTERNS = *.h \
+ *.dox
-# The RECURSIVE tag can be used to turn specify whether or not subdirectories
-# should be searched for input files as well. Possible values are YES and NO.
-# If left blank NO is used.
+# The RECURSIVE tag can be used to specify whether or not subdirectories should
+# be searched for input files as well.
+# The default value is: NO.
-RECURSIVE = YES
+RECURSIVE = YES
# The EXCLUDE tag can be used to specify files and/or directories that should be
# excluded from the INPUT source files. This way you can easily exclude a
# subdirectory from a directory tree whose root is specified with the INPUT tag.
+#
# Note that relative paths are relative to the directory from which doxygen is
# run.
-EXCLUDE = # DO NOT ADD ANYTHING HERE - DEFINED IN SEPARATE FILE
+EXCLUDE =
# The EXCLUDE_SYMLINKS tag can be used to select whether or not files or
# directories that are symbolic links (a Unix file system feature) are excluded
# from the input.
+# The default value is: NO.
-EXCLUDE_SYMLINKS = NO
+EXCLUDE_SYMLINKS = NO
# If the value of the INPUT tag contains directories, you can use the
# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude
-# certain files from those directories. Note that the wildcards are matched
-# against the file with absolute path, so to exclude all test directories
-# for example use the pattern */test/*
+# certain files from those directories.
+#
+# Note that the wildcards are matched against the file with absolute path, so to
+# exclude all test directories for example use the pattern */test/*
-EXCLUDE_PATTERNS =
+EXCLUDE_PATTERNS =
# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names
# (namespaces, classes, functions, etc.) that should be excluded from the
# output. The symbol name can be a fully qualified name, a word, or if the
# wildcard * is used, a substring. Examples: ANamespace, AClass,
# AClass::ANamespace, ANamespace::*Test
+#
+# Note that the wildcards are matched against the file with absolute path, so to
+# exclude all test directories use the pattern */test/*
-EXCLUDE_SYMBOLS =
+EXCLUDE_SYMBOLS =
-# The EXAMPLE_PATH tag can be used to specify one or more files or
-# directories that contain example code fragments that are included (see
-# the \include command).
+# The EXAMPLE_PATH tag can be used to specify one or more files or directories
+# that contain example code fragments that are included (see the \include
+# command).
-EXAMPLE_PATH = # DO NOT ADD ANYTHING HERE - DEFINED IN SEPARATE FILE
+EXAMPLE_PATH =
# If the value of the EXAMPLE_PATH tag contains directories, you can use the
-# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp
-# and *.h) to filter out the source-files in the directories. If left
-# blank all files are included.
+# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp and
+# *.h) to filter out the source-files in the directories. If left blank all
+# files are included.
-EXAMPLE_PATTERNS =
+EXAMPLE_PATTERNS =
# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be
-# searched for input files to be used with the \include or \dontinclude
-# commands irrespective of the value of the RECURSIVE tag.
-# Possible values are YES and NO. If left blank NO is used.
+# searched for input files to be used with the \include or \dontinclude commands
+# irrespective of the value of the RECURSIVE tag.
+# The default value is: NO.
-EXAMPLE_RECURSIVE = NO
+EXAMPLE_RECURSIVE = NO
-# The IMAGE_PATH tag can be used to specify one or more files or
-# directories that contain image that are included in the documentation (see
-# the \image command).
+# The IMAGE_PATH tag can be used to specify one or more files or directories
+# that contain images that are to be included in the documentation (see the
+# \image command).
-IMAGE_PATH =
+IMAGE_PATH =
# The INPUT_FILTER tag can be used to specify a program that doxygen should
# invoke to filter for each input file. Doxygen will invoke the filter program
-# by executing (via popen()) the command <filter> <input-file>, where <filter>
-# is the value of the INPUT_FILTER tag, and <input-file> is the name of an
-# input file. Doxygen will then use the output that the filter program writes
-# to standard output.
-# If FILTER_PATTERNS is specified, this tag will be
-# ignored.
+# by executing (via popen()) the command:
+#
+# <filter> <input-file>
+#
+# where <filter> is the value of the INPUT_FILTER tag, and <input-file> is the
+# name of an input file. Doxygen will then use the output that the filter
+# program writes to standard output. If FILTER_PATTERNS is specified, this tag
+# will be ignored.
+#
+# Note that the filter must not add or remove lines; it is applied before the
+# code is scanned, but not when the output code is generated. If lines are added
+# or removed, the anchors will not be placed correctly.
+#
+# Note that for custom extensions or not directly supported extensions you also
+# need to set EXTENSION_MAPPING for the extension otherwise the files are not
+# properly processed by doxygen.
-INPUT_FILTER =
+INPUT_FILTER =
# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern
-# basis.
-# Doxygen will compare the file name with each pattern and apply the
-# filter if there is a match.
-# The filters are a list of the form:
-# pattern=filter (like *.cpp=my_cpp_filter). See INPUT_FILTER for further
-# info on how filters are used. If FILTER_PATTERNS is empty or if
-# non of the patterns match the file name, INPUT_FILTER is applied.
+# basis. Doxygen will compare the file name with each pattern and apply the
+# filter if there is a match. The filters are a list of the form: pattern=filter
+# (like *.cpp=my_cpp_filter). See INPUT_FILTER for further information on how
+# filters are used. If the FILTER_PATTERNS tag is empty or if none of the
+# patterns match the file name, INPUT_FILTER is applied.
+#
+# Note that for custom extensions or not directly supported extensions you also
+# need to set EXTENSION_MAPPING for the extension otherwise the files are not
+# properly processed by doxygen.
-FILTER_PATTERNS =
+FILTER_PATTERNS =
# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using
-# INPUT_FILTER) will be used to filter the input files when producing source
-# files to browse (i.e. when SOURCE_BROWSER is set to YES).
+# INPUT_FILTER) will also be used to filter the input files that are used for
+# producing the source files to browse (i.e. when SOURCE_BROWSER is set to YES).
+# The default value is: NO.
-FILTER_SOURCE_FILES = NO
+FILTER_SOURCE_FILES = NO
# The FILTER_SOURCE_PATTERNS tag can be used to specify source filters per file
-# pattern. A pattern will override the setting for FILTER_PATTERN (if any)
-# and it is also possible to disable source filtering for a specific pattern
-# using *.ext= (so without naming a filter). This option only has effect when
-# FILTER_SOURCE_FILES is enabled.
+# pattern. A pattern will override the setting for FILTER_PATTERN (if any) and
+# it is also possible to disable source filtering for a specific pattern using
+# *.ext= (so without naming a filter).
+# This tag requires that the tag FILTER_SOURCE_FILES is set to YES.
FILTER_SOURCE_PATTERNS =
-# If the USE_MD_FILE_AS_MAINPAGE tag refers to the name of a markdown file that
-# is part of the input, its contents will be placed on the main page (index.html).
-# This can be useful if you have a project on for instance GitHub and want reuse
-# the introduction page also for the doxygen output.
+# If the USE_MDFILE_AS_MAINPAGE tag refers to the name of a markdown file that
+# is part of the input, its contents will be placed on the main page
+# (index.html). This can be useful if you have a project on for instance GitHub
+# and want to reuse the introduction page also for the doxygen output.
USE_MDFILE_AS_MAINPAGE =
#---------------------------------------------------------------------------
-# configuration options related to source browsing
+# Configuration options related to source browsing
#---------------------------------------------------------------------------
-# If the SOURCE_BROWSER tag is set to YES then a list of source files will
-# be generated. Documented entities will be cross-referenced with these sources.
-# Note: To get rid of all source code in the generated output, make sure also
-# VERBATIM_HEADERS is set to NO.
+# If the SOURCE_BROWSER tag is set to YES then a list of source files will be
+# generated. Documented entities will be cross-referenced with these sources.
+#
+# Note: To get rid of all source code in the generated output, make sure that
+# also VERBATIM_HEADERS is set to NO.
+# The default value is: NO.
-SOURCE_BROWSER = NO
+SOURCE_BROWSER = NO
-# Setting the INLINE_SOURCES tag to YES will include the body
-# of functions and classes directly in the documentation.
+# Setting the INLINE_SOURCES tag to YES will include the body of functions,
+# classes and enums directly into the documentation.
+# The default value is: NO.
-INLINE_SOURCES = NO
+INLINE_SOURCES = NO
-# Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct
-# doxygen to hide any special comment blocks from generated source code
-# fragments. Normal C, C++ and Fortran comments will always remain visible.
+# Setting the STRIP_CODE_COMMENTS tag to YES will instruct doxygen to hide any
+# special comment blocks from generated source code fragments. Normal C, C++ and
+# Fortran comments will always remain visible.
+# The default value is: YES.
-STRIP_CODE_COMMENTS = NO
+STRIP_CODE_COMMENTS = NO
-# If the REFERENCED_BY_RELATION tag is set to YES
-# then for each documented function all documented
-# functions referencing it will be listed.
+# If the REFERENCED_BY_RELATION tag is set to YES then for each documented
+# function all documented functions referencing it will be listed.
+# The default value is: NO.
REFERENCED_BY_RELATION = NO
-# If the REFERENCES_RELATION tag is set to YES
-# then for each documented function all documented entities
-# called/used by that function will be listed.
+# If the REFERENCES_RELATION tag is set to YES then for each documented function
+# all documented entities called/used by that function will be listed.
+# The default value is: NO.
-REFERENCES_RELATION = NO
+REFERENCES_RELATION = NO
-# If the REFERENCES_LINK_SOURCE tag is set to YES (the default)
-# and SOURCE_BROWSER tag is set to YES, then the hyperlinks from
-# functions in REFERENCES_RELATION and REFERENCED_BY_RELATION lists will
-# link to the source code.
-# Otherwise they will link to the documentation.
+# If the REFERENCES_LINK_SOURCE tag is set to YES and SOURCE_BROWSER tag is set
+# to YES then the hyperlinks from functions in REFERENCES_RELATION and
+# REFERENCED_BY_RELATION lists will link to the source code. Otherwise they will
+# link to the documentation.
+# The default value is: YES.
REFERENCES_LINK_SOURCE = YES
-# If the USE_HTAGS tag is set to YES then the references to source code
-# will point to the HTML generated by the htags(1) tool instead of doxygen
-# built-in source browser. The htags tool is part of GNU's global source
-# tagging system (see http://www.gnu.org/software/global/global.html). You
-# will need version 4.8.6 or higher.
+# If SOURCE_TOOLTIPS is enabled (the default) then hovering a hyperlink in the
+# source code will show a tooltip with additional information such as prototype,
+# brief description and links to the definition and documentation. Since this
+# will make the HTML file larger and loading of large files a bit slower, you
+# can opt to disable this feature.
+# The default value is: YES.
+# This tag requires that the tag SOURCE_BROWSER is set to YES.
-USE_HTAGS = NO
+#SOURCE_TOOLTIPS = YES
-# If the VERBATIM_HEADERS tag is set to YES (the default) then Doxygen
-# will generate a verbatim copy of the header file for each class for
-# which an include is specified. Set to NO to disable this.
+# If the USE_HTAGS tag is set to YES then the references to source code will
+# point to the HTML generated by the htags(1) tool instead of doxygen built-in
+# source browser. The htags tool is part of GNU's global source tagging system
+# (see https://www.gnu.org/software/global/global.html). You will need version
+# 4.8.6 or higher.
+#
+# To use it do the following:
+# - Install the latest version of global
+# - Enable SOURCE_BROWSER and USE_HTAGS in the config file
+# - Make sure the INPUT points to the root of the source tree
+# - Run doxygen as normal
+#
+# Doxygen will invoke htags (and that will in turn invoke gtags), so these
+# tools must be available from the command line (i.e. in the search path).
+#
+# The result: instead of the source browser generated by doxygen, the links to
+# source code will now point to the output of htags.
+# The default value is: NO.
+# This tag requires that the tag SOURCE_BROWSER is set to YES.
-VERBATIM_HEADERS = NO
+USE_HTAGS = NO
+
+# If the VERBATIM_HEADERS tag is set the YES then doxygen will generate a
+# verbatim copy of the header file for each class for which an include is
+# specified. Set to NO to disable this.
+# See also: Section \class.
+# The default value is: YES.
+
+VERBATIM_HEADERS = NO
+
+# If the CLANG_ASSISTED_PARSING tag is set to YES then doxygen will use the
+# clang parser (see: http://clang.llvm.org/) for more accurate parsing at the
+# cost of reduced performance. This can be particularly helpful with template
+# rich C++ code for which doxygen's built-in parser lacks the necessary type
+# information.
+# Note: The availability of this option depends on whether or not doxygen was
+# generated with the -Duse-libclang=ON option for CMake.
+# The default value is: NO.
+
+#CLANG_ASSISTED_PARSING = NO
+
+# If clang assisted parsing is enabled you can provide the compiler with command
+# line options that you would normally use when invoking the compiler. Note that
+# the include paths will already be set by doxygen for the files and directories
+# specified with INPUT and INCLUDE_PATH.
+# This tag requires that the tag CLANG_ASSISTED_PARSING is set to YES.
+
+#CLANG_OPTIONS =
+
+# If clang assisted parsing is enabled you can provide the clang parser with the
+# path to the compilation database (see:
+# http://clang.llvm.org/docs/HowToSetupToolingForLLVM.html) used when the files
+# were built. This is equivalent to specifying the "-p" option to a clang tool,
+# such as clang-check. These options will then be passed to the parser.
+# Note: The availability of this option depends on whether or not doxygen was
+# generated with the -Duse-libclang=ON option for CMake.
+# The default value is: 0.
+
+#CLANG_COMPILATION_DATABASE_PATH = 0
#---------------------------------------------------------------------------
-# configuration options related to the alphabetical class index
+# Configuration options related to the alphabetical class index
#---------------------------------------------------------------------------
-# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index
-# of all compounds will be generated. Enable this if the project
-# contains a lot of classes, structs, unions or interfaces.
+# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index of all
+# compounds will be generated. Enable this if the project contains a lot of
+# classes, structs, unions or interfaces.
+# The default value is: YES.
-ALPHABETICAL_INDEX = NO
+ALPHABETICAL_INDEX = NO
-# If the alphabetical index is enabled (see ALPHABETICAL_INDEX) then
-# the COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns
-# in which this list will be split (can be a number in the range [1..20])
+# The COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns in
+# which the alphabetical index list will be split.
+# Minimum value: 1, maximum value: 20, default value: 5.
+# This tag requires that the tag ALPHABETICAL_INDEX is set to YES.
-COLS_IN_ALPHA_INDEX = 5
+COLS_IN_ALPHA_INDEX = 5
-# In case all classes in a project start with a common prefix, all
-# classes will be put under the same header in the alphabetical index.
-# The IGNORE_PREFIX tag can be used to specify one or more prefixes that
-# should be ignored while generating the index headers.
+# In case all classes in a project start with a common prefix, all classes will
+# be put under the same header in the alphabetical index. The IGNORE_PREFIX tag
+# can be used to specify a prefix (or a list of prefixes) that should be ignored
+# while generating the index headers.
+# This tag requires that the tag ALPHABETICAL_INDEX is set to YES.
-IGNORE_PREFIX =
+IGNORE_PREFIX =
#---------------------------------------------------------------------------
-# configuration options related to the HTML output
+# Configuration options related to the HTML output
#---------------------------------------------------------------------------
-# If the GENERATE_HTML tag is set to YES (the default) Doxygen will
-# generate HTML output.
+# If the GENERATE_HTML tag is set to YES, doxygen will generate HTML output
+# The default value is: YES.
-GENERATE_HTML = YES
+GENERATE_HTML = YES
-# The HTML_OUTPUT tag is used to specify where the HTML docs will be put.
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be
-# put in front of it. If left blank `html' will be used as the default path.
+# The HTML_OUTPUT tag is used to specify where the HTML docs will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it.
+# The default directory is: html.
+# This tag requires that the tag GENERATE_HTML is set to YES.
-HTML_OUTPUT = html
+HTML_OUTPUT = html
-# The HTML_FILE_EXTENSION tag can be used to specify the file extension for
-# each generated HTML page (for example: .htm,.php,.asp). If it is left blank
-# doxygen will generate files with .html extension.
+# The HTML_FILE_EXTENSION tag can be used to specify the file extension for each
+# generated HTML page (for example: .htm, .php, .asp).
+# The default value is: .html.
+# This tag requires that the tag GENERATE_HTML is set to YES.
-HTML_FILE_EXTENSION = .html
+HTML_FILE_EXTENSION = .html
-# The HTML_HEADER tag can be used to specify a personal HTML header for
-# each generated HTML page. If it is left blank doxygen will generate a
-# standard header. Note that when using a custom header you are responsible
-# for the proper inclusion of any scripts and style sheets that doxygen
-# needs, which is dependent on the configuration options used.
-# It is advised to generate a default header using "doxygen -w html
-# header.html footer.html stylesheet.css YourConfigFile" and then modify
-# that header. Note that the header is subject to change so you typically
-# have to redo this when upgrading to a newer version of doxygen or when
-# changing the value of configuration settings such as GENERATE_TREEVIEW!
+# The HTML_HEADER tag can be used to specify a user-defined HTML header file for
+# each generated HTML page. If the tag is left blank doxygen will generate a
+# standard header.
+#
+# To get valid HTML the header file that includes any scripts and style sheets
+# that doxygen needs, which is dependent on the configuration options used (e.g.
+# the setting GENERATE_TREEVIEW). It is highly recommended to start with a
+# default header using
+# doxygen -w html new_header.html new_footer.html new_stylesheet.css
+# YourConfigFile
+# and then modify the file new_header.html. See also section "Doxygen usage"
+# for information on how to generate the default header that doxygen normally
+# uses.
+# Note: The header is subject to change so you typically have to regenerate the
+# default header when upgrading to a newer version of doxygen. For a description
+# of the possible markers and block names see the documentation.
+# This tag requires that the tag GENERATE_HTML is set to YES.
-HTML_HEADER = buildfiles/header.html
+HTML_HEADER = buildfiles/header.html
-# The HTML_FOOTER tag can be used to specify a personal HTML footer for
-# each generated HTML page. If it is left blank doxygen will generate a
-# standard footer.
+# The HTML_FOOTER tag can be used to specify a user-defined HTML footer for each
+# generated HTML page. If the tag is left blank doxygen will generate a standard
+# footer. See HTML_HEADER for more information on how to generate a default
+# footer and what special commands can be used inside the footer. See also
+# section "Doxygen usage" for information on how to generate the default footer
+# that doxygen normally uses.
+# This tag requires that the tag GENERATE_HTML is set to YES.
-HTML_FOOTER = buildfiles/footer.html
+HTML_FOOTER = buildfiles/footer.html
-# The HTML_STYLESHEET tag can be used to specify a user-defined cascading
-# style sheet that is used by each HTML page. It can be used to
-# fine-tune the look of the HTML output. If left blank doxygen will
-# generate a default style sheet. Note that it is recommended to use
-# HTML_EXTRA_STYLESHEET instead of this one, as it is more robust and this
-# tag will in the future become obsolete.
+# The HTML_STYLESHEET tag can be used to specify a user-defined cascading style
+# sheet that is used by each HTML page. It can be used to fine-tune the look of
+# the HTML output. If left blank doxygen will generate a default style sheet.
+# See also section "Doxygen usage" for information on how to generate the style
+# sheet that doxygen normally uses.
+# Note: It is recommended to use HTML_EXTRA_STYLESHEET instead of this tag, as
+# it is more robust and this tag (HTML_STYLESHEET) will in the future become
+# obsolete.
+# This tag requires that the tag GENERATE_HTML is set to YES.
-HTML_STYLESHEET =
+HTML_STYLESHEET =
-# The HTML_EXTRA_STYLESHEET tag can be used to specify an additional
-# user-defined cascading style sheet that is included after the standard
-# style sheets created by doxygen. Using this option one can overrule
-# certain style aspects. This is preferred over using HTML_STYLESHEET
-# since it does not replace the standard style sheet and is therefor more
-# robust against future updates. Doxygen will copy the style sheet file to
-# the output directory.
+# The HTML_EXTRA_STYLESHEET tag can be used to specify additional user-defined
+# cascading style sheets that are included after the standard style sheets
+# created by doxygen. Using this option one can overrule certain style aspects.
+# This is preferred over using HTML_STYLESHEET since it does not replace the
+# standard style sheet and is therefore more robust against future updates.
+# Doxygen will copy the style sheet files to the output directory.
+# Note: The order of the extra style sheet files is of importance (e.g. the last
+# style sheet in the list overrules the setting of the previous ones in the
+# list). For an example see the documentation.
+# This tag requires that the tag GENERATE_HTML is set to YES.
-HTML_EXTRA_STYLESHEET = buildfiles/extra_stylesheet.css
+HTML_EXTRA_STYLESHEET = buildfiles/extra_stylesheet.css
# The HTML_EXTRA_FILES tag can be used to specify one or more extra images or
# other source files which should be copied to the HTML output directory. Note
# that these files will be copied to the base HTML output directory. Use the
-# $relpath$ marker in the HTML_HEADER and/or HTML_FOOTER files to load these
-# files. In the HTML_STYLESHEET file, use the file name only. Also note that
-# the files will be copied as-is; there are no commands or markers available.
+# $relpath^ marker in the HTML_HEADER and/or HTML_FOOTER files to load these
+# files. In the HTML_STYLESHEET file, use the file name only. Also note that the
+# files will be copied as-is; there are no commands or markers available.
+# This tag requires that the tag GENERATE_HTML is set to YES.
-HTML_EXTRA_FILES = buildfiles/favicon.ico
+HTML_EXTRA_FILES = buildfiles/favicon.ico
-# The HTML_COLORSTYLE_HUE tag controls the color of the HTML output.
-# Doxygen will adjust the colors in the style sheet and background images
-# according to this color. Hue is specified as an angle on a colorwheel,
-# see http://en.wikipedia.org/wiki/Hue for more information.
-# For instance the value 0 represents red, 60 is yellow, 120 is green,
-# 180 is cyan, 240 is blue, 300 purple, and 360 is red again.
-# The allowed range is 0 to 359.
+# The HTML_COLORSTYLE_HUE tag controls the color of the HTML output. Doxygen
+# will adjust the colors in the style sheet and background images according to
+# this color. Hue is specified as an angle on a colorwheel, see
+# https://en.wikipedia.org/wiki/Hue for more information. For instance the value
+# 0 represents red, 60 is yellow, 120 is green, 180 is cyan, 240 is blue, 300
+# purple, and 360 is red again.
+# Minimum value: 0, maximum value: 359, default value: 220.
+# This tag requires that the tag GENERATE_HTML is set to YES.
-HTML_COLORSTYLE_HUE = 196
+HTML_COLORSTYLE_HUE = 196
-# The HTML_COLORSTYLE_SAT tag controls the purity (or saturation) of
-# the colors in the HTML output. For a value of 0 the output will use
-# grayscales only. A value of 255 will produce the most vivid colors.
+# The HTML_COLORSTYLE_SAT tag controls the purity (or saturation) of the colors
+# in the HTML output. For a value of 0 the output will use grayscales only. A
+# value of 255 will produce the most vivid colors.
+# Minimum value: 0, maximum value: 255, default value: 100.
+# This tag requires that the tag GENERATE_HTML is set to YES.
-HTML_COLORSTYLE_SAT = 46
+HTML_COLORSTYLE_SAT = 46
-# The HTML_COLORSTYLE_GAMMA tag controls the gamma correction applied to
-# the luminance component of the colors in the HTML output. Values below
-# 100 gradually make the output lighter, whereas values above 100 make
-# the output darker. The value divided by 100 is the actual gamma applied,
-# so 80 represents a gamma of 0.8, The value 220 represents a gamma of 2.2,
-# and 100 does not change the gamma.
+# The HTML_COLORSTYLE_GAMMA tag controls the gamma correction applied to the
+# luminance component of the colors in the HTML output. Values below 100
+# gradually make the output lighter, whereas values above 100 make the output
+# darker. The value divided by 100 is the actual gamma applied, so 80 represents
+# a gamma of 0.8, The value 220 represents a gamma of 2.2, and 100 does not
+# change the gamma.
+# Minimum value: 40, maximum value: 240, default value: 80.
+# This tag requires that the tag GENERATE_HTML is set to YES.
-HTML_COLORSTYLE_GAMMA = 92
+HTML_COLORSTYLE_GAMMA = 92
# If the HTML_TIMESTAMP tag is set to YES then the footer of each generated HTML
-# page will contain the date and time when the page was generated. Setting
-# this to NO can help when comparing the output of multiple runs.
+# page will contain the date and time when the page was generated. Setting this
+# to YES can help to show when doxygen was last run and thus if the
+# documentation is up to date.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
-HTML_TIMESTAMP = YES
+HTML_TIMESTAMP = YES
+
+# If the HTML_DYNAMIC_MENUS tag is set to YES then the generated HTML
+# documentation will contain a main index with vertical navigation menus that
+# are dynamically created via Javascript. If disabled, the navigation index will
+# consists of multiple levels of tabs that are statically embedded in every HTML
+# page. Disable this option to support browsers that do not have Javascript,
+# like the Qt help browser.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+#HTML_DYNAMIC_MENUS = YES
# If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML
# documentation will contain sections that can be hidden and shown after the
# page has loaded.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
-HTML_DYNAMIC_SECTIONS = NO
+HTML_DYNAMIC_SECTIONS = NO
-# With HTML_INDEX_NUM_ENTRIES one can control the preferred number of
-# entries shown in the various tree structured indices initially; the user
-# can expand and collapse entries dynamically later on. Doxygen will expand
-# the tree to such a level that at most the specified number of entries are
-# visible (unless a fully collapsed tree already exceeds this amount).
-# So setting the number of entries 1 will produce a full collapsed tree by
-# default. 0 is a special value representing an infinite number of entries
-# and will result in a full expanded tree by default.
+# With HTML_INDEX_NUM_ENTRIES one can control the preferred number of entries
+# shown in the various tree structured indices initially; the user can expand
+# and collapse entries dynamically later on. Doxygen will expand the tree to
+# such a level that at most the specified number of entries are visible (unless
+# a fully collapsed tree already exceeds this amount). So setting the number of
+# entries 1 will produce a full collapsed tree by default. 0 is a special value
+# representing an infinite number of entries and will result in a full expanded
+# tree by default.
+# Minimum value: 0, maximum value: 9999, default value: 100.
+# This tag requires that the tag GENERATE_HTML is set to YES.
HTML_INDEX_NUM_ENTRIES = 100
-# If the GENERATE_DOCSET tag is set to YES, additional index files
-# will be generated that can be used as input for Apple's Xcode 3
-# integrated development environment, introduced with OSX 10.5 (Leopard).
-# To create a documentation set, doxygen will generate a Makefile in the
-# HTML output directory. Running make will produce the docset in that
-# directory and running "make install" will install the docset in
-# ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find
-# it at startup.
-# See http://developer.apple.com/tools/creatingdocsetswithdoxygen.html
+# If the GENERATE_DOCSET tag is set to YES, additional index files will be
+# generated that can be used as input for Apple's Xcode 3 integrated development
+# environment (see: https://developer.apple.com/tools/xcode/), introduced with
+# OSX 10.5 (Leopard). To create a documentation set, doxygen will generate a
+# Makefile in the HTML output directory. Running make will produce the docset in
+# that directory and running make install will install the docset in
+# ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find it at
+# startup. See https://developer.apple.com/tools/creatingdocsetswithdoxygen.html
# for more information.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
-GENERATE_DOCSET = NO
+GENERATE_DOCSET = NO
-# When GENERATE_DOCSET tag is set to YES, this tag determines the name of the
-# feed. A documentation feed provides an umbrella under which multiple
-# documentation sets from a single provider (such as a company or product suite)
-# can be grouped.
+# This tag determines the name of the docset feed. A documentation feed provides
+# an umbrella under which multiple documentation sets from a single provider
+# (such as a company or product suite) can be grouped.
+# The default value is: Doxygen generated docs.
+# This tag requires that the tag GENERATE_DOCSET is set to YES.
-DOCSET_FEEDNAME = "Doxygen generated docs"
+DOCSET_FEEDNAME = "Doxygen generated docs"
-# When GENERATE_DOCSET tag is set to YES, this tag specifies a string that
-# should uniquely identify the documentation set bundle. This should be a
-# reverse domain-name style string, e.g. com.mycompany.MyDocSet. Doxygen
-# will append .docset to the name.
+# This tag specifies a string that should uniquely identify the documentation
+# set bundle. This should be a reverse domain-name style string, e.g.
+# com.mycompany.MyDocSet. Doxygen will append .docset to the name.
+# The default value is: org.doxygen.Project.
+# This tag requires that the tag GENERATE_DOCSET is set to YES.
-DOCSET_BUNDLE_ID = org.doxygen.Project
+DOCSET_BUNDLE_ID = org.doxygen.Project
-# When GENERATE_PUBLISHER_ID tag specifies a string that should uniquely
-# identify the documentation publisher. This should be a reverse domain-name
-# style string, e.g. com.mycompany.MyDocSet.documentation.
+# The DOCSET_PUBLISHER_ID tag specifies a string that should uniquely identify
+# the documentation publisher. This should be a reverse domain-name style
+# string, e.g. com.mycompany.MyDocSet.documentation.
+# The default value is: org.doxygen.Publisher.
+# This tag requires that the tag GENERATE_DOCSET is set to YES.
-DOCSET_PUBLISHER_ID = org.doxygen.Publisher
+DOCSET_PUBLISHER_ID = org.doxygen.Publisher
-# The GENERATE_PUBLISHER_NAME tag identifies the documentation publisher.
+# The DOCSET_PUBLISHER_NAME tag identifies the documentation publisher.
+# The default value is: Publisher.
+# This tag requires that the tag GENERATE_DOCSET is set to YES.
-DOCSET_PUBLISHER_NAME = Publisher
+DOCSET_PUBLISHER_NAME = Publisher
-# If the GENERATE_HTMLHELP tag is set to YES, additional index files
-# will be generated that can be used as input for tools like the
-# Microsoft HTML help workshop to generate a compiled HTML help file (.chm)
-# of the generated HTML documentation.
+# If the GENERATE_HTMLHELP tag is set to YES then doxygen generates three
+# additional HTML index files: index.hhp, index.hhc, and index.hhk. The
+# index.hhp is a project file that can be read by Microsoft's HTML Help Workshop
+# (see: http://www.microsoft.com/en-us/download/details.aspx?id=21138) on
+# Windows.
+#
+# The HTML Help Workshop contains a compiler that can convert all HTML output
+# generated by doxygen into a single compiled HTML file (.chm). Compiled HTML
+# files are now used as the Windows 98 help format, and will replace the old
+# Windows help format (.hlp) on all Windows platforms in the future. Compressed
+# HTML files also contain an index, a table of contents, and you can search for
+# words in the documentation. The HTML workshop also contains a viewer for
+# compressed HTML files.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
-GENERATE_HTMLHELP = NO
+GENERATE_HTMLHELP = NO
-# If the GENERATE_HTMLHELP tag is set to YES, the CHM_FILE tag can
-# be used to specify the file name of the resulting .chm file. You
-# can add a path in front of the file if the result should not be
+# The CHM_FILE tag can be used to specify the file name of the resulting .chm
+# file. You can add a path in front of the file if the result should not be
# written to the html output directory.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
-CHM_FILE =
+CHM_FILE =
-# If the GENERATE_HTMLHELP tag is set to YES, the HHC_LOCATION tag can
-# be used to specify the location (absolute path including file name) of
-# the HTML help compiler (hhc.exe). If non-empty doxygen will try to run
-# the HTML help compiler on the generated index.hhp.
+# The HHC_LOCATION tag can be used to specify the location (absolute path
+# including file name) of the HTML help compiler (hhc.exe). If non-empty,
+# doxygen will try to run the HTML help compiler on the generated index.hhp.
+# The file has to be specified with full path.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
-HHC_LOCATION =
+HHC_LOCATION =
-# If the GENERATE_HTMLHELP tag is set to YES, the GENERATE_CHI flag
-# controls if a separate .chi index file is generated (YES) or that
-# it should be included in the master .chm file (NO).
+# The GENERATE_CHI flag controls if a separate .chi index file is generated
+# (YES) or that it should be included in the master .chm file (NO).
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
-GENERATE_CHI = NO
+GENERATE_CHI = NO
-# If the GENERATE_HTMLHELP tag is set to YES, the CHM_INDEX_ENCODING
-# is used to encode HtmlHelp index (hhk), content (hhc) and project file
-# content.
+# The CHM_INDEX_ENCODING is used to encode HtmlHelp index (hhk), content (hhc)
+# and project file content.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
-CHM_INDEX_ENCODING =
+CHM_INDEX_ENCODING =
-# If the GENERATE_HTMLHELP tag is set to YES, the BINARY_TOC flag
-# controls whether a binary table of contents is generated (YES) or a
-# normal table of contents (NO) in the .chm file.
+# The BINARY_TOC flag controls whether a binary table of contents is generated
+# (YES) or a normal table of contents (NO) in the .chm file. Furthermore it
+# enables the Previous and Next buttons.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
-BINARY_TOC = NO
+BINARY_TOC = NO
-# The TOC_EXPAND flag can be set to YES to add extra items for group members
-# to the contents of the HTML help documentation and to the tree view.
+# The TOC_EXPAND flag can be set to YES to add extra items for group members to
+# the table of contents of the HTML help documentation and to the tree view.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
-TOC_EXPAND = NO
+TOC_EXPAND = NO
# If the GENERATE_QHP tag is set to YES and both QHP_NAMESPACE and
-# QHP_VIRTUAL_FOLDER are set, an additional index file will be generated
-# that can be used as input for Qt's qhelpgenerator to generate a
-# Qt Compressed Help (.qch) of the generated HTML documentation.
+# QHP_VIRTUAL_FOLDER are set, an additional index file will be generated that
+# can be used as input for Qt's qhelpgenerator to generate a Qt Compressed Help
+# (.qch) of the generated HTML documentation.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
-GENERATE_QHP = NO
+GENERATE_QHP = NO
-# If the QHG_LOCATION tag is specified, the QCH_FILE tag can
-# be used to specify the file name of the resulting .qch file.
-# The path specified is relative to the HTML output folder.
+# If the QHG_LOCATION tag is specified, the QCH_FILE tag can be used to specify
+# the file name of the resulting .qch file. The path specified is relative to
+# the HTML output folder.
+# This tag requires that the tag GENERATE_QHP is set to YES.
-QCH_FILE =
+QCH_FILE =
-# The QHP_NAMESPACE tag specifies the namespace to use when generating
-# Qt Help Project output. For more information please see
-# http://doc.trolltech.com/qthelpproject.html#namespace
+# The QHP_NAMESPACE tag specifies the namespace to use when generating Qt Help
+# Project output. For more information please see Qt Help Project / Namespace
+# (see: http://doc.qt.io/qt-4.8/qthelpproject.html#namespace).
+# The default value is: org.doxygen.Project.
+# This tag requires that the tag GENERATE_QHP is set to YES.
-QHP_NAMESPACE = org.doxygen.Project
+QHP_NAMESPACE = org.doxygen.Project
-# The QHP_VIRTUAL_FOLDER tag specifies the namespace to use when generating
-# Qt Help Project output. For more information please see
-# http://doc.trolltech.com/qthelpproject.html#virtual-folders
+# The QHP_VIRTUAL_FOLDER tag specifies the namespace to use when generating Qt
+# Help Project output. For more information please see Qt Help Project / Virtual
+# Folders (see: http://doc.qt.io/qt-4.8/qthelpproject.html#virtual-folders).
+# The default value is: doc.
+# This tag requires that the tag GENERATE_QHP is set to YES.
-QHP_VIRTUAL_FOLDER = doc
+QHP_VIRTUAL_FOLDER = doc
-# If QHP_CUST_FILTER_NAME is set, it specifies the name of a custom filter to
-# add. For more information please see
-# http://doc.trolltech.com/qthelpproject.html#custom-filters
+# If the QHP_CUST_FILTER_NAME tag is set, it specifies the name of a custom
+# filter to add. For more information please see Qt Help Project / Custom
+# Filters (see: http://doc.qt.io/qt-4.8/qthelpproject.html#custom-filters).
+# This tag requires that the tag GENERATE_QHP is set to YES.
-QHP_CUST_FILTER_NAME =
+QHP_CUST_FILTER_NAME =
-# The QHP_CUST_FILT_ATTRS tag specifies the list of the attributes of the
-# custom filter to add. For more information please see
-# <a href="http://doc.trolltech.com/qthelpproject.html#custom-filters">
-# Qt Help Project / Custom Filters</a>.
+# The QHP_CUST_FILTER_ATTRS tag specifies the list of the attributes of the
+# custom filter to add. For more information please see Qt Help Project / Custom
+# Filters (see: http://doc.qt.io/qt-4.8/qthelpproject.html#custom-filters).
+# This tag requires that the tag GENERATE_QHP is set to YES.
-QHP_CUST_FILTER_ATTRS =
+QHP_CUST_FILTER_ATTRS =
# The QHP_SECT_FILTER_ATTRS tag specifies the list of the attributes this
-# project's
-# filter section matches.
-# <a href="http://doc.trolltech.com/qthelpproject.html#filter-attributes">
-# Qt Help Project / Filter Attributes</a>.
+# project's filter section matches. Qt Help Project / Filter Attributes (see:
+# http://doc.qt.io/qt-4.8/qthelpproject.html#filter-attributes).
+# This tag requires that the tag GENERATE_QHP is set to YES.
-QHP_SECT_FILTER_ATTRS =
+QHP_SECT_FILTER_ATTRS =
-# If the GENERATE_QHP tag is set to YES, the QHG_LOCATION tag can
-# be used to specify the location of Qt's qhelpgenerator.
-# If non-empty doxygen will try to run qhelpgenerator on the generated
-# .qhp file.
+# The QHG_LOCATION tag can be used to specify the location of Qt's
+# qhelpgenerator. If non-empty doxygen will try to run qhelpgenerator on the
+# generated .qhp file.
+# This tag requires that the tag GENERATE_QHP is set to YES.
-QHG_LOCATION =
+QHG_LOCATION =
-# If the GENERATE_ECLIPSEHELP tag is set to YES, additional index files
-# will be generated, which together with the HTML files, form an Eclipse help
-# plugin. To install this plugin and make it available under the help contents
-# menu in Eclipse, the contents of the directory containing the HTML and XML
-# files needs to be copied into the plugins directory of eclipse. The name of
-# the directory within the plugins directory should be the same as
-# the ECLIPSE_DOC_ID value. After copying Eclipse needs to be restarted before
-# the help appears.
+# If the GENERATE_ECLIPSEHELP tag is set to YES, additional index files will be
+# generated, together with the HTML files, they form an Eclipse help plugin. To
+# install this plugin and make it available under the help contents menu in
+# Eclipse, the contents of the directory containing the HTML and XML files needs
+# to be copied into the plugins directory of eclipse. The name of the directory
+# within the plugins directory should be the same as the ECLIPSE_DOC_ID value.
+# After copying Eclipse needs to be restarted before the help appears.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
-GENERATE_ECLIPSEHELP = YES
+GENERATE_ECLIPSEHELP = YES
-# A unique identifier for the eclipse help plugin. When installing the plugin
-# the directory name containing the HTML and XML files should also have
-# this name.
+# A unique identifier for the Eclipse help plugin. When installing the plugin
+# the directory name containing the HTML and XML files should also have this
+# name. Each documentation set should have its own identifier.
+# The default value is: org.doxygen.Project.
+# This tag requires that the tag GENERATE_ECLIPSEHELP is set to YES.
-ECLIPSE_DOC_ID = com.nordic.infocenter.nrfx
+ECLIPSE_DOC_ID = com.nordic.infocenter.nrfx
+
+# If you want full control over the layout of the generated HTML pages it might
+# be necessary to disable the index and replace it with your own. The
+# DISABLE_INDEX tag can be used to turn on/off the condensed index (tabs) at top
+# of each HTML page. A value of NO enables the index and the value YES disables
+# it. Since the tabs in the index contain the same information as the navigation
+# tree, you can set this option to YES if you also set GENERATE_TREEVIEW to YES.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
### EDIT THIS ###
-# The DISABLE_INDEX tag can be used to turn on/off the condensed index (tabs)
-# at top of each HTML page. The value NO (the default) enables the index and
-# the value YES disables it. Since the tabs have the same information as the
-# navigation tree you can set this option to NO if you already set
-# GENERATE_TREEVIEW to YES.
-
-DISABLE_INDEX = YES
+DISABLE_INDEX = YES
# The GENERATE_TREEVIEW tag is used to specify whether a tree-like index
-# structure should be generated to display hierarchical information.
-# If the tag value is set to YES, a side panel will be generated
-# containing a tree-like index structure (just like the one that
-# is generated for HTML Help). For this to work a browser that supports
-# JavaScript, DHTML, CSS and frames is required (i.e. any modern browser).
-# Windows users are probably better off using the HTML help feature.
-# Since the tree basically has the same information as the tab index you
-# could consider to set DISABLE_INDEX to NO when enabling this option.
+# structure should be generated to display hierarchical information. If the tag
+# value is set to YES, a side panel will be generated containing a tree-like
+# index structure (just like the one that is generated for HTML Help). For this
+# to work a browser that supports JavaScript, DHTML, CSS and frames is required
+# (i.e. any modern browser). Windows users are probably better off using the
+# HTML help feature. Via custom style sheets (see HTML_EXTRA_STYLESHEET) one can
+# further fine-tune the look of the index. As an example, the default style
+# sheet generated by doxygen has an example that shows how to put an image at
+# the root of the tree instead of the PROJECT_NAME. Since the tree basically has
+# the same information as the tab index, you could consider setting
+# DISABLE_INDEX to YES when enabling this option.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
-GENERATE_TREEVIEW = YES
+GENERATE_TREEVIEW = YES
-# The ENUM_VALUES_PER_LINE tag can be used to set the number of enum values
-# (range [0,1..20]) that doxygen will group on one line in the generated HTML
-# documentation. Note that a value of 0 will completely suppress the enum
-# values from appearing in the overview section.
+# The ENUM_VALUES_PER_LINE tag can be used to set the number of enum values that
+# doxygen will group on one line in the generated HTML documentation.
+#
+# Note that a value of 0 will completely suppress the enum values from appearing
+# in the overview section.
+# Minimum value: 0, maximum value: 20, default value: 4.
+# This tag requires that the tag GENERATE_HTML is set to YES.
-ENUM_VALUES_PER_LINE = 1
+ENUM_VALUES_PER_LINE = 1
-# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be
-# used to set the initial width (in pixels) of the frame in which the tree
-# is shown.
+# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be used
+# to set the initial width (in pixels) of the frame in which the tree is shown.
+# Minimum value: 0, maximum value: 1500, default value: 250.
+# This tag requires that the tag GENERATE_HTML is set to YES.
-TREEVIEW_WIDTH = 250
+TREEVIEW_WIDTH = 250
-# When the EXT_LINKS_IN_WINDOW option is set to YES doxygen will open
-# links to external symbols imported via tag files in a separate window.
+# If the EXT_LINKS_IN_WINDOW option is set to YES, doxygen will open links to
+# external symbols imported via tag files in a separate window.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
-EXT_LINKS_IN_WINDOW = NO
+EXT_LINKS_IN_WINDOW = NO
-# Use this tag to change the font size of Latex formulas included
-# as images in the HTML documentation. The default is 10. Note that
-# when you change the font size after a successful doxygen run you need
-# to manually remove any form_*.png images from the HTML output directory
-# to force them to be regenerated.
+# Use this tag to change the font size of LaTeX formulas included as images in
+# the HTML documentation. When you change the font size after a successful
+# doxygen run you need to manually remove any form_*.png images from the HTML
+# output directory to force them to be regenerated.
+# Minimum value: 8, maximum value: 50, default value: 10.
+# This tag requires that the tag GENERATE_HTML is set to YES.
-FORMULA_FONTSIZE = 10
+FORMULA_FONTSIZE = 10
-# Use the FORMULA_TRANPARENT tag to determine whether or not the images
-# generated for formulas are transparent PNGs. Transparent PNGs are
-# not supported properly for IE 6.0, but are supported on all modern browsers.
-# Note that when changing this option you need to delete any form_*.png files
-# in the HTML output before the changes have effect.
+# Use the FORMULA_TRANSPARENT tag to determine whether or not the images
+# generated for formulas are transparent PNGs. Transparent PNGs are not
+# supported properly for IE 6.0, but are supported on all modern browsers.
+#
+# Note that when changing this option you need to delete any form_*.png files in
+# the HTML output directory before the changes have effect.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_HTML is set to YES.
-FORMULA_TRANSPARENT = YES
+FORMULA_TRANSPARENT = YES
-# Enable the USE_MATHJAX option to render LaTeX formulas using MathJax
-# (see http://www.mathjax.org) which uses client side Javascript for the
-# rendering instead of using prerendered bitmaps. Use this if you do not
-# have LaTeX installed or if you want to formulas look prettier in the HTML
-# output. When enabled you may also need to install MathJax separately and
-# configure the path to it using the MATHJAX_RELPATH option.
+# Enable the USE_MATHJAX option to render LaTeX formulas using MathJax (see
+# https://www.mathjax.org) which uses client side Javascript for the rendering
+# instead of using pre-rendered bitmaps. Use this if you do not have LaTeX
+# installed or if you want to formulas look prettier in the HTML output. When
+# enabled you may also need to install MathJax separately and configure the path
+# to it using the MATHJAX_RELPATH option.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
-USE_MATHJAX = NO
+USE_MATHJAX = NO
# When MathJax is enabled you can set the default output format to be used for
-# thA MathJax output. Supported types are HTML-CSS, NativeMML (i.e. MathML) and
-# SVG. The default value is HTML-CSS, which is slower, but has the best
-# compatibility.
+# the MathJax output. See the MathJax site (see:
+# http://docs.mathjax.org/en/latest/output.html) for more details.
+# Possible values are: HTML-CSS (which is slower, but has the best
+# compatibility), NativeMML (i.e. MathML) and SVG.
+# The default value is: HTML-CSS.
+# This tag requires that the tag USE_MATHJAX is set to YES.
-MATHJAX_FORMAT = HTML-CSS
+MATHJAX_FORMAT = HTML-CSS
-# When MathJax is enabled you need to specify the location relative to the
-# HTML output directory using the MATHJAX_RELPATH option. The destination
-# directory should contain the MathJax.js script. For instance, if the mathjax
-# directory is located at the same level as the HTML output directory, then
-# MATHJAX_RELPATH should be ../mathjax. The default value points to
-# the MathJax Content Delivery Network so you can quickly see the result without
-# installing MathJax.
-# However, it is strongly recommended to install a local
-# copy of MathJax from http://www.mathjax.org before deployment.
+# When MathJax is enabled you need to specify the location relative to the HTML
+# output directory using the MATHJAX_RELPATH option. The destination directory
+# should contain the MathJax.js script. For instance, if the mathjax directory
+# is located at the same level as the HTML output directory, then
+# MATHJAX_RELPATH should be ../mathjax. The default value points to the MathJax
+# Content Delivery Network so you can quickly see the result without installing
+# MathJax. However, it is strongly recommended to install a local copy of
+# MathJax from https://www.mathjax.org before deployment.
+# The default value is: https://cdnjs.cloudflare.com/ajax/libs/mathjax/2.7.2/.
+# This tag requires that the tag USE_MATHJAX is set to YES.
-MATHJAX_RELPATH = http://cdn.mathjax.org/mathjax/latest
+MATHJAX_RELPATH = http://cdn.mathjax.org/mathjax/latest
-# The MATHJAX_EXTENSIONS tag can be used to specify one or MathJax extension
-# names that should be enabled during MathJax rendering.
+# The MATHJAX_EXTENSIONS tag can be used to specify one or more MathJax
+# extension names that should be enabled during MathJax rendering. For example
+# MATHJAX_EXTENSIONS = TeX/AMSmath TeX/AMSsymbols
+# This tag requires that the tag USE_MATHJAX is set to YES.
-MATHJAX_EXTENSIONS =
+MATHJAX_EXTENSIONS =
-# When the SEARCHENGINE tag is enabled doxygen will generate a search box
-# for the HTML output. The underlying search engine uses javascript
-# and DHTML and should work on any modern browser. Note that when using
-# HTML help (GENERATE_HTMLHELP), Qt help (GENERATE_QHP), or docsets
-# (GENERATE_DOCSET) there is already a search function so this one should
-# typically be disabled. For large projects the javascript based search engine
-# can be slow, then enabling SERVER_BASED_SEARCH may provide a better solution.
+# The MATHJAX_CODEFILE tag can be used to specify a file with javascript pieces
+# of code that will be used on startup of the MathJax code. See the MathJax site
+# (see: http://docs.mathjax.org/en/latest/output.html) for more details. For an
+# example see the documentation.
+# This tag requires that the tag USE_MATHJAX is set to YES.
-SEARCHENGINE =
+#MATHJAX_CODEFILE =
+
+# When the SEARCHENGINE tag is enabled doxygen will generate a search box for
+# the HTML output. The underlying search engine uses javascript and DHTML and
+# should work on any modern browser. Note that when using HTML help
+# (GENERATE_HTMLHELP), Qt help (GENERATE_QHP), or docsets (GENERATE_DOCSET)
+# there is already a search function so this one should typically be disabled.
+# For large projects the javascript based search engine can be slow, then
+# enabling SERVER_BASED_SEARCH may provide a better solution. It is possible to
+# search using the keyboard; to jump to the search box use <access key> + S
+# (what the <access key> is depends on the OS and browser, but it is typically
+# <CTRL>, <ALT>/<option>, or both). Inside the search box use the <cursor down
+# key> to jump into the search results window, the results can be navigated
+# using the <cursor keys>. Press <Enter> to select an item or <escape> to cancel
+# the search. The filter options can be selected when the cursor is inside the
+# search box by pressing <Shift>+<cursor down>. Also here use the <cursor keys>
+# to select a filter and <Enter> or <escape> to activate or cancel the filter
+# option.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+SEARCHENGINE = YES
# When the SERVER_BASED_SEARCH tag is enabled the search engine will be
-# implemented using a web server instead of a web client using Javascript.
-# There are two flavours of web server based search depending on the
-# EXTERNAL_SEARCH setting. When disabled, doxygen will generate a PHP script for
-# searching and an index file used by the script. When EXTERNAL_SEARCH is
-# enabled the indexing and searching needs to be provided by external tools.
-# See the manual for details.
+# implemented using a web server instead of a web client using Javascript. There
+# are two flavors of web server based searching depending on the EXTERNAL_SEARCH
+# setting. When disabled, doxygen will generate a PHP script for searching and
+# an index file used by the script. When EXTERNAL_SEARCH is enabled the indexing
+# and searching needs to be provided by external tools. See the section
+# "External Indexing and Searching" for details.
+# The default value is: NO.
+# This tag requires that the tag SEARCHENGINE is set to YES.
-SERVER_BASED_SEARCH = NO
+SERVER_BASED_SEARCH = NO
-# When EXTERNAL_SEARCH is enabled doxygen will no longer generate the PHP
+# When EXTERNAL_SEARCH tag is enabled doxygen will no longer generate the PHP
# script for searching. Instead the search results are written to an XML file
# which needs to be processed by an external indexer. Doxygen will invoke an
-# external search engine pointed to by the SEARCHENGINE_URL option to obtain
-# the search results. Doxygen ships with an example indexer (doxyindexer) and
-# search engine (doxysearch.cgi) which are based on the open source search engine
-# library Xapian. See the manual for configuration details.
+# external search engine pointed to by the SEARCHENGINE_URL option to obtain the
+# search results.
+#
+# Doxygen ships with an example indexer (doxyindexer) and search engine
+# (doxysearch.cgi) which are based on the open source search engine library
+# Xapian (see: https://xapian.org/).
+#
+# See the section "External Indexing and Searching" for details.
+# The default value is: NO.
+# This tag requires that the tag SEARCHENGINE is set to YES.
-EXTERNAL_SEARCH = NO
+EXTERNAL_SEARCH = NO
# The SEARCHENGINE_URL should point to a search engine hosted by a web server
-# which will returned the search results when EXTERNAL_SEARCH is enabled.
-# Doxygen ships with an example search engine (doxysearch) which is based on
-# the open source search engine library Xapian. See the manual for configuration
-# details.
+# which will return the search results when EXTERNAL_SEARCH is enabled.
+#
+# Doxygen ships with an example indexer (doxyindexer) and search engine
+# (doxysearch.cgi) which are based on the open source search engine library
+# Xapian (see: https://xapian.org/). See the section "External Indexing and
+# Searching" for details.
+# This tag requires that the tag SEARCHENGINE is set to YES.
-SEARCHENGINE_URL =
+SEARCHENGINE_URL =
# When SERVER_BASED_SEARCH and EXTERNAL_SEARCH are both enabled the unindexed
# search data is written to a file for indexing by an external tool. With the
# SEARCHDATA_FILE tag the name of this file can be specified.
+# The default file is: searchdata.xml.
+# This tag requires that the tag SEARCHENGINE is set to YES.
-SEARCHDATA_FILE = searchdata.xml
+SEARCHDATA_FILE = searchdata.xml
-# When SERVER_BASED_SEARCH AND EXTERNAL_SEARCH are both enabled the
+# When SERVER_BASED_SEARCH and EXTERNAL_SEARCH are both enabled the
# EXTERNAL_SEARCH_ID tag can be used as an identifier for the project. This is
# useful in combination with EXTRA_SEARCH_MAPPINGS to search through multiple
# projects and redirect the results back to the right project.
+# This tag requires that the tag SEARCHENGINE is set to YES.
-EXTERNAL_SEARCH_ID =
+EXTERNAL_SEARCH_ID =
# The EXTRA_SEARCH_MAPPINGS tag can be used to enable searching through doxygen
# projects other than the one defined by this configuration file, but that are
# all added to the same external search index. Each project needs to have a
-# unique id set via EXTERNAL_SEARCH_ID. The search mapping then maps the id
-# of to a relative location where the documentation can be found.
-# The format is: EXTRA_SEARCH_MAPPINGS = id1=loc1 id2=loc2 ...
+# unique id set via EXTERNAL_SEARCH_ID. The search mapping then maps the id of
+# to a relative location where the documentation can be found. The format is:
+# EXTRA_SEARCH_MAPPINGS = tagname1=loc1 tagname2=loc2 ...
+# This tag requires that the tag SEARCHENGINE is set to YES.
-EXTRA_SEARCH_MAPPINGS =
+EXTRA_SEARCH_MAPPINGS =
#---------------------------------------------------------------------------
-# configuration options related to the LaTeX output
+# Configuration options related to the LaTeX output
#---------------------------------------------------------------------------
-# If the GENERATE_LATEX tag is set to YES (the default) Doxygen will
-# generate Latex output.
+# If the GENERATE_LATEX tag is set to YES, doxygen will generate LaTeX output.
+# The default value is: YES.
-GENERATE_LATEX = NO
+GENERATE_LATEX = NO
-# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put.
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be
-# put in front of it. If left blank `latex' will be used as the default path.
+# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it.
+# The default directory is: latex.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
-LATEX_OUTPUT = latex
+LATEX_OUTPUT = latex
# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be
-# invoked. If left blank `latex' will be used as the default command name.
-# Note that when enabling USE_PDFLATEX this option is only used for
-# generating bitmaps for formulas in the HTML output, but not in the
-# Makefile that is written to the output directory.
+# invoked.
+#
+# Note that when enabling USE_PDFLATEX this option is only used for generating
+# bitmaps for formulas in the HTML output, but not in the Makefile that is
+# written to the output directory.
+# The default file is: latex.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
-LATEX_CMD_NAME = latex
+LATEX_CMD_NAME = latex
-# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to
-# generate index for LaTeX. If left blank `makeindex' will be used as the
-# default command name.
+# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to generate
+# index for LaTeX.
+# The default file is: makeindex.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
-MAKEINDEX_CMD_NAME = makeindex
+MAKEINDEX_CMD_NAME = makeindex
-# If the COMPACT_LATEX tag is set to YES Doxygen generates more compact
-# LaTeX documents. This may be useful for small projects and may help to
-# save some trees in general.
+# If the COMPACT_LATEX tag is set to YES, doxygen generates more compact LaTeX
+# documents. This may be useful for small projects and may help to save some
+# trees in general.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
-COMPACT_LATEX = NO
+COMPACT_LATEX = NO
-# The PAPER_TYPE tag can be used to set the paper type that is used
-# by the printer. Possible values are: a4, letter, legal and
-# executive. If left blank a4wide will be used.
+# The PAPER_TYPE tag can be used to set the paper type that is used by the
+# printer.
+# Possible values are: a4 (210 x 297 mm), letter (8.5 x 11 inches), legal (8.5 x
+# 14 inches) and executive (7.25 x 10.5 inches).
+# The default value is: a4.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
-PAPER_TYPE = a4
+PAPER_TYPE = a4
-# The EXTRA_PACKAGES tag can be to specify one or more names of LaTeX
-# packages that should be included in the LaTeX output.
+# The EXTRA_PACKAGES tag can be used to specify one or more LaTeX package names
+# that should be included in the LaTeX output. The package can be specified just
+# by its name or with the correct syntax as to be used with the LaTeX
+# \usepackage command. To get the times font for instance you can specify :
+# EXTRA_PACKAGES=times or EXTRA_PACKAGES={times}
+# To use the option intlimits with the amsmath package you can specify:
+# EXTRA_PACKAGES=[intlimits]{amsmath}
+# If left blank no extra packages will be included.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
-EXTRA_PACKAGES =
+EXTRA_PACKAGES =
-# The LATEX_HEADER tag can be used to specify a personal LaTeX header for
-# the generated latex document. The header should contain everything until
-# the first chapter. If it is left blank doxygen will generate a
-# standard header. Notice: only use this tag if you know what you are doing!
+# The LATEX_HEADER tag can be used to specify a personal LaTeX header for the
+# generated LaTeX document. The header should contain everything until the first
+# chapter. If it is left blank doxygen will generate a standard header. See
+# section "Doxygen usage" for information on how to let doxygen write the
+# default header to a separate file.
+#
+# Note: Only use a user-defined header if you know what you are doing! The
+# following commands have a special meaning inside the header: $title,
+# $datetime, $date, $doxygenversion, $projectname, $projectnumber,
+# $projectbrief, $projectlogo. Doxygen will replace $title with the empty
+# string, for the replacement values of the other commands the user is referred
+# to HTML_HEADER.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
-LATEX_HEADER =
+LATEX_HEADER =
-# The LATEX_FOOTER tag can be used to specify a personal LaTeX footer for
-# the generated latex document. The footer should contain everything after
-# the last chapter. If it is left blank doxygen will generate a
-# standard footer. Notice: only use this tag if you know what you are doing!
+# The LATEX_FOOTER tag can be used to specify a personal LaTeX footer for the
+# generated LaTeX document. The footer should contain everything after the last
+# chapter. If it is left blank doxygen will generate a standard footer. See
+# LATEX_HEADER for more information on how to generate a default footer and what
+# special commands can be used inside the footer.
+#
+# Note: Only use a user-defined footer if you know what you are doing!
+# This tag requires that the tag GENERATE_LATEX is set to YES.
-LATEX_FOOTER =
+LATEX_FOOTER =
-# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated
-# is prepared for conversion to pdf (using ps2pdf). The pdf file will
-# contain links (just like the HTML output) instead of page references
-# This makes the output suitable for online browsing using a pdf viewer.
+# The LATEX_EXTRA_STYLESHEET tag can be used to specify additional user-defined
+# LaTeX style sheets that are included after the standard style sheets created
+# by doxygen. Using this option one can overrule certain style aspects. Doxygen
+# will copy the style sheet files to the output directory.
+# Note: The order of the extra style sheet files is of importance (e.g. the last
+# style sheet in the list overrules the setting of the previous ones in the
+# list).
+# This tag requires that the tag GENERATE_LATEX is set to YES.
-PDF_HYPERLINKS = YES
+#LATEX_EXTRA_STYLESHEET =
-# If the USE_PDFLATEX tag is set to YES, pdflatex will be used instead of
-# plain latex in the generated Makefile. Set this option to YES to get a
+# The LATEX_EXTRA_FILES tag can be used to specify one or more extra images or
+# other source files which should be copied to the LATEX_OUTPUT output
+# directory. Note that the files will be copied as-is; there are no commands or
+# markers available.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+#LATEX_EXTRA_FILES =
+
+# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated is
+# prepared for conversion to PDF (using ps2pdf or pdflatex). The PDF file will
+# contain links (just like the HTML output) instead of page references. This
+# makes the output suitable for online browsing using a PDF viewer.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+PDF_HYPERLINKS = YES
+
+# If the USE_PDFLATEX tag is set to YES, doxygen will use pdflatex to generate
+# the PDF file directly from the LaTeX files. Set this option to YES, to get a
# higher quality PDF documentation.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
-USE_PDFLATEX = YES
+USE_PDFLATEX = YES
-# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \\batchmode.
-# command to the generated LaTeX files. This will instruct LaTeX to keep
-# running if errors occur, instead of asking the user for help.
-# This option is also used when generating formulas in HTML.
+# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \batchmode
+# command to the generated LaTeX files. This will instruct LaTeX to keep running
+# if errors occur, instead of asking the user for help. This option is also used
+# when generating formulas in HTML.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
-LATEX_BATCHMODE = NO
+LATEX_BATCHMODE = NO
-# If LATEX_HIDE_INDICES is set to YES then doxygen will not
-# include the index chapters (such as File Index, Compound Index, etc.)
-# in the output.
+# If the LATEX_HIDE_INDICES tag is set to YES then doxygen will not include the
+# index chapters (such as File Index, Compound Index, etc.) in the output.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
-LATEX_HIDE_INDICES = NO
+LATEX_HIDE_INDICES = NO
-# If LATEX_SOURCE_CODE is set to YES then doxygen will include
-# source code with syntax highlighting in the LaTeX output.
-# Note that which sources are shown also depends on other settings
-# such as SOURCE_BROWSER.
+# If the LATEX_SOURCE_CODE tag is set to YES then doxygen will include source
+# code with syntax highlighting in the LaTeX output.
+#
+# Note that which sources are shown also depends on other settings such as
+# SOURCE_BROWSER.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
-LATEX_SOURCE_CODE = NO
+LATEX_SOURCE_CODE = NO
# The LATEX_BIB_STYLE tag can be used to specify the style to use for the
-# bibliography, e.g. plainnat, or ieeetr. The default style is "plain". See
-# http://en.wikipedia.org/wiki/BibTeX for more info.
+# bibliography, e.g. plainnat, or ieeetr. See
+# https://en.wikipedia.org/wiki/BibTeX and \cite for more info.
+# The default value is: plain.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
-LATEX_BIB_STYLE = plain
+LATEX_BIB_STYLE = plain
+
+# If the LATEX_TIMESTAMP tag is set to YES then the footer of each generated
+# page will contain the date and time when the page was generated. Setting this
+# to NO can help when comparing the output of multiple runs.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+#LATEX_TIMESTAMP = NO
#---------------------------------------------------------------------------
-# configuration options related to the RTF output
+# Configuration options related to the RTF output
#---------------------------------------------------------------------------
-# If the GENERATE_RTF tag is set to YES Doxygen will generate RTF output
-# The RTF output is optimized for Word 97 and may not look very pretty with
-# other RTF readers or editors.
+# If the GENERATE_RTF tag is set to YES, doxygen will generate RTF output. The
+# RTF output is optimized for Word 97 and may not look too pretty with other RTF
+# readers/editors.
+# The default value is: NO.
-GENERATE_RTF = NO
+GENERATE_RTF = NO
-# The RTF_OUTPUT tag is used to specify where the RTF docs will be put.
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be
-# put in front of it. If left blank `rtf' will be used as the default path.
+# The RTF_OUTPUT tag is used to specify where the RTF docs will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it.
+# The default directory is: rtf.
+# This tag requires that the tag GENERATE_RTF is set to YES.
-RTF_OUTPUT = rtf
+RTF_OUTPUT = rtf
-# If the COMPACT_RTF tag is set to YES Doxygen generates more compact
-# RTF documents. This may be useful for small projects and may help to
-# save some trees in general.
+# If the COMPACT_RTF tag is set to YES, doxygen generates more compact RTF
+# documents. This may be useful for small projects and may help to save some
+# trees in general.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_RTF is set to YES.
-COMPACT_RTF = NO
+COMPACT_RTF = NO
-# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated
-# will contain hyperlink fields. The RTF file will
-# contain links (just like the HTML output) instead of page references.
-# This makes the output suitable for online browsing using WORD or other
-# programs which support those fields.
-# Note: wordpad (write) and others do not support links.
+# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated will
+# contain hyperlink fields. The RTF file will contain links (just like the HTML
+# output) instead of page references. This makes the output suitable for online
+# browsing using Word or some other Word compatible readers that support those
+# fields.
+#
+# Note: WordPad (write) and others do not support links.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_RTF is set to YES.
-RTF_HYPERLINKS = NO
+RTF_HYPERLINKS = NO
-# Load style sheet definitions from file. Syntax is similar to doxygen's
-# config file, i.e. a series of assignments. You only have to provide
-# replacements, missing definitions are set to their default value.
+# Load stylesheet definitions from file. Syntax is similar to doxygen's config
+# file, i.e. a series of assignments. You only have to provide replacements,
+# missing definitions are set to their default value.
+#
+# See also section "Doxygen usage" for information on how to generate the
+# default style sheet that doxygen normally uses.
+# This tag requires that the tag GENERATE_RTF is set to YES.
-RTF_STYLESHEET_FILE =
+RTF_STYLESHEET_FILE =
-# Set optional variables used in the generation of an rtf document.
-# Syntax is similar to doxygen's config file.
+# Set optional variables used in the generation of an RTF document. Syntax is
+# similar to doxygen's config file. A template extensions file can be generated
+# using doxygen -e rtf extensionFile.
+# This tag requires that the tag GENERATE_RTF is set to YES.
-RTF_EXTENSIONS_FILE =
+RTF_EXTENSIONS_FILE =
+
+# If the RTF_SOURCE_CODE tag is set to YES then doxygen will include source code
+# with syntax highlighting in the RTF output.
+#
+# Note that which sources are shown also depends on other settings such as
+# SOURCE_BROWSER.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+#RTF_SOURCE_CODE = NO
#---------------------------------------------------------------------------
-# configuration options related to the man page output
+# Configuration options related to the man page output
#---------------------------------------------------------------------------
-# If the GENERATE_MAN tag is set to YES (the default) Doxygen will
-# generate man pages
+# If the GENERATE_MAN tag is set to YES, doxygen will generate man pages for
+# classes and files.
+# The default value is: NO.
-GENERATE_MAN = NO
+GENERATE_MAN = NO
-# The MAN_OUTPUT tag is used to specify where the man pages will be put.
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be
-# put in front of it. If left blank `man' will be used as the default path.
+# The MAN_OUTPUT tag is used to specify where the man pages will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it. A directory man3 will be created inside the directory specified by
+# MAN_OUTPUT.
+# The default directory is: man.
+# This tag requires that the tag GENERATE_MAN is set to YES.
-MAN_OUTPUT = man
+MAN_OUTPUT = man
-# The MAN_EXTENSION tag determines the extension that is added to
-# the generated man pages (default is the subroutine's section .3)
+# The MAN_EXTENSION tag determines the extension that is added to the generated
+# man pages. In case the manual section does not start with a number, the number
+# 3 is prepended. The dot (.) at the beginning of the MAN_EXTENSION tag is
+# optional.
+# The default value is: .3.
+# This tag requires that the tag GENERATE_MAN is set to YES.
-MAN_EXTENSION = .3
+MAN_EXTENSION = .3
-# If the MAN_LINKS tag is set to YES and Doxygen generates man output,
-# then it will generate one additional man file for each entity
-# documented in the real man page(s). These additional files
-# only source the real man page, but without them the man command
-# would be unable to find the correct page. The default is NO.
+# The MAN_SUBDIR tag determines the name of the directory created within
+# MAN_OUTPUT in which the man pages are placed. If defaults to man followed by
+# MAN_EXTENSION with the initial . removed.
+# This tag requires that the tag GENERATE_MAN is set to YES.
-MAN_LINKS = NO
+#MAN_SUBDIR =
+
+# If the MAN_LINKS tag is set to YES and doxygen generates man output, then it
+# will generate one additional man file for each entity documented in the real
+# man page(s). These additional files only source the real man page, but without
+# them the man command would be unable to find the correct page.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_MAN is set to YES.
+
+MAN_LINKS = NO
#---------------------------------------------------------------------------
-# configuration options related to the XML output
+# Configuration options related to the XML output
#---------------------------------------------------------------------------
-# If the GENERATE_XML tag is set to YES Doxygen will
-# generate an XML file that captures the structure of
-# the code including all documentation.
+# If the GENERATE_XML tag is set to YES, doxygen will generate an XML file that
+# captures the structure of the code including all documentation.
+# The default value is: NO.
-GENERATE_XML = NO
+GENERATE_XML = NO
-# The XML_OUTPUT tag is used to specify where the XML pages will be put.
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be
-# put in front of it. If left blank `xml' will be used as the default path.
+# The XML_OUTPUT tag is used to specify where the XML pages will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it.
+# The default directory is: xml.
+# This tag requires that the tag GENERATE_XML is set to YES.
-XML_OUTPUT = xml
+XML_OUTPUT = xml
-# The XML_SCHEMA tag can be used to specify an XML schema,
-# which can be used by a validating XML parser to check the
-# syntax of the XML files.
+# If the XML_PROGRAMLISTING tag is set to YES, doxygen will dump the program
+# listings (including syntax highlighting and cross-referencing information) to
+# the XML output. Note that enabling this will significantly increase the size
+# of the XML output.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_XML is set to YES.
-XML_SCHEMA =
-
-# The XML_DTD tag can be used to specify an XML DTD,
-# which can be used by a validating XML parser to check the
-# syntax of the XML files.
-
-XML_DTD =
-
-# If the XML_PROGRAMLISTING tag is set to YES Doxygen will
-# dump the program listings (including syntax highlighting
-# and cross-referencing information) to the XML output. Note that
-# enabling this will significantly increase the size of the XML output.
-
-XML_PROGRAMLISTING = YES
+XML_PROGRAMLISTING = YES
#---------------------------------------------------------------------------
-# configuration options for the AutoGen Definitions output
+# Configuration options related to the DOCBOOK output
#---------------------------------------------------------------------------
-# If the GENERATE_AUTOGEN_DEF tag is set to YES Doxygen will
-# generate an AutoGen Definitions (see autogen.sf.net) file
-# that captures the structure of the code including all
-# documentation. Note that this feature is still experimental
-# and incomplete at the moment.
+# If the GENERATE_DOCBOOK tag is set to YES, doxygen will generate Docbook files
+# that can be used to generate PDF.
+# The default value is: NO.
-GENERATE_AUTOGEN_DEF = NO
+#GENERATE_DOCBOOK = NO
+
+# The DOCBOOK_OUTPUT tag is used to specify where the Docbook pages will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be put in
+# front of it.
+# The default directory is: docbook.
+# This tag requires that the tag GENERATE_DOCBOOK is set to YES.
+
+#DOCBOOK_OUTPUT = docbook
+
+# If the DOCBOOK_PROGRAMLISTING tag is set to YES, doxygen will include the
+# program listings (including syntax highlighting and cross-referencing
+# information) to the DOCBOOK output. Note that enabling this will significantly
+# increase the size of the DOCBOOK output.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_DOCBOOK is set to YES.
+
+#DOCBOOK_PROGRAMLISTING = NO
#---------------------------------------------------------------------------
-# configuration options related to the Perl module output
+# Configuration options for the AutoGen Definitions output
#---------------------------------------------------------------------------
-# If the GENERATE_PERLMOD tag is set to YES Doxygen will
-# generate a Perl module file that captures the structure of
-# the code including all documentation. Note that this
-# feature is still experimental and incomplete at the
-# moment.
+# If the GENERATE_AUTOGEN_DEF tag is set to YES, doxygen will generate an
+# AutoGen Definitions (see http://autogen.sourceforge.net/) file that captures
+# the structure of the code including all documentation. Note that this feature
+# is still experimental and incomplete at the moment.
+# The default value is: NO.
-GENERATE_PERLMOD = NO
+GENERATE_AUTOGEN_DEF = NO
-# If the PERLMOD_LATEX tag is set to YES Doxygen will generate
-# the necessary Makefile rules, Perl scripts and LaTeX code to be able
-# to generate PDF and DVI output from the Perl module output.
+#---------------------------------------------------------------------------
+# Configuration options related to the Perl module output
+#---------------------------------------------------------------------------
-PERLMOD_LATEX = NO
+# If the GENERATE_PERLMOD tag is set to YES, doxygen will generate a Perl module
+# file that captures the structure of the code including all documentation.
+#
+# Note that this feature is still experimental and incomplete at the moment.
+# The default value is: NO.
-# If the PERLMOD_PRETTY tag is set to YES the Perl module output will be
-# nicely formatted so it can be parsed by a human reader.
-# This is useful
-# if you want to understand what is going on.
-# On the other hand, if this
-# tag is set to NO the size of the Perl module output will be much smaller
-# and Perl will parse it just the same.
+GENERATE_PERLMOD = NO
-PERLMOD_PRETTY = YES
+# If the PERLMOD_LATEX tag is set to YES, doxygen will generate the necessary
+# Makefile rules, Perl scripts and LaTeX code to be able to generate PDF and DVI
+# output from the Perl module output.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_PERLMOD is set to YES.
-# The names of the make variables in the generated doxyrules.make file
-# are prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX.
-# This is useful so different doxyrules.make files included by the same
-# Makefile don't overwrite each other's variables.
+PERLMOD_LATEX = NO
+
+# If the PERLMOD_PRETTY tag is set to YES, the Perl module output will be nicely
+# formatted so it can be parsed by a human reader. This is useful if you want to
+# understand what is going on. On the other hand, if this tag is set to NO, the
+# size of the Perl module output will be much smaller and Perl will parse it
+# just the same.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_PERLMOD is set to YES.
+
+PERLMOD_PRETTY = YES
+
+# The names of the make variables in the generated doxyrules.make file are
+# prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX. This is useful
+# so different doxyrules.make files included by the same Makefile don't
+# overwrite each other's variables.
+# This tag requires that the tag GENERATE_PERLMOD is set to YES.
PERLMOD_MAKEVAR_PREFIX =
@@ -1555,338 +2032,474 @@
# Configuration options related to the preprocessor
#---------------------------------------------------------------------------
-# If the ENABLE_PREPROCESSING tag is set to YES (the default) Doxygen will
-# evaluate all C-preprocessor directives found in the sources and include
-# files.
+# If the ENABLE_PREPROCESSING tag is set to YES, doxygen will evaluate all
+# C-preprocessor directives found in the sources and include files.
+# The default value is: YES.
-ENABLE_PREPROCESSING = YES
+ENABLE_PREPROCESSING = YES
-# If the MACRO_EXPANSION tag is set to YES Doxygen will expand all macro
-# names in the source code. If set to NO (the default) only conditional
-# compilation will be performed. Macro expansion can be done in a controlled
-# way by setting EXPAND_ONLY_PREDEF to YES.
+# If the MACRO_EXPANSION tag is set to YES, doxygen will expand all macro names
+# in the source code. If set to NO, only conditional compilation will be
+# performed. Macro expansion can be done in a controlled way by setting
+# EXPAND_ONLY_PREDEF to YES.
+# The default value is: NO.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
-MACRO_EXPANSION = YES
+MACRO_EXPANSION = YES
-# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES
-# then the macro expansion is limited to the macros specified with the
-# PREDEFINED and EXPAND_AS_DEFINED tags.
+# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES then
+# the macro expansion is limited to the macros specified with the PREDEFINED and
+# EXPAND_AS_DEFINED tags.
+# The default value is: NO.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
-EXPAND_ONLY_PREDEF = NO
+EXPAND_ONLY_PREDEF = NO
-# If the SEARCH_INCLUDES tag is set to YES (the default) the includes files
-# pointed to by INCLUDE_PATH will be searched when a #include is found.
+# If the SEARCH_INCLUDES tag is set to YES, the include files in the
+# INCLUDE_PATH will be searched if a #include is found.
+# The default value is: YES.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
-SEARCH_INCLUDES = YES
+SEARCH_INCLUDES = YES
# The INCLUDE_PATH tag can be used to specify one or more directories that
-# contain include files that are not input files but should be processed by
-# the preprocessor.
+# contain include files that are not input files but should be processed by the
+# preprocessor.
+# This tag requires that the tag SEARCH_INCLUDES is set to YES.
-INCLUDE_PATH =
+INCLUDE_PATH =
# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard
# patterns (like *.h and *.hpp) to filter out the header-files in the
-# directories. If left blank, the patterns specified with FILE_PATTERNS will
-# be used.
+# directories. If left blank, the patterns specified with FILE_PATTERNS will be
+# used.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
-INCLUDE_FILE_PATTERNS =
+INCLUDE_FILE_PATTERNS =
-# The PREDEFINED tag can be used to specify one or more macro names that
-# are defined before the preprocessor is started (similar to the -D option of
-# gcc). The argument of the tag is a list of macros of the form: name
-# or name=definition (no spaces). If the definition and the = are
-# omitted =1 is assumed. To prevent a macro definition from being
-# undefined via #undef or recursively expanded use the := operator
-# instead of the = operator.
+# The PREDEFINED tag can be used to specify one or more macro names that are
+# defined before the preprocessor is started (similar to the -D option of e.g.
+# gcc). The argument of the tag is a list of macros of the form: name or
+# name=definition (no spaces). If the definition and the "=" are omitted, "=1"
+# is assumed. To prevent a macro definition from being undefined via #undef or
+# recursively expanded use the := operator instead of the = operator.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
-PREDEFINED = SUPPRESS_INLINE_IMPLEMENTATION __NRFX_DOXYGEN__ \
- CONFIG_PURGE_ENABLED == 1 \
- CONFIG_DISASSOCIATE_ENABLED == 1 \
- CONFIG_GTS_ENABLED == 1 \
- CONFIG_ORPHAN_ENABLED == 1 \
- CONFIG_RXE_ENABLED == 1 \
- CONFIG_START_ENABLED == 1 \
- CONFIG_SYNC_ENABLED == 1 \
- CONFIG_PANID_CONFLICT_ENABLED == 1 \
+PREDEFINED = SUPPRESS_INLINE_IMPLEMENTATION \
+ __NRFX_DOXYGEN__ \
+ CONFIG_PURGE_ENABLED \
+ == \
+ 1 \
+ CONFIG_DISASSOCIATE_ENABLED \
+ == \
+ 1 \
+ CONFIG_GTS_ENABLED \
+ == \
+ 1 \
+ CONFIG_ORPHAN_ENABLED \
+ == \
+ 1 \
+ CONFIG_RXE_ENABLED \
+ == \
+ 1 \
+ CONFIG_START_ENABLED \
+ == \
+ 1 \
+ CONFIG_SYNC_ENABLED \
+ == \
+ 1 \
+ CONFIG_PANID_CONFLICT_ENABLED \
+ == \
+ 1
-# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then
-# this tag can be used to specify a list of macro names that should be expanded.
-# The macro definition that is found in the sources will be used.
-# Use the PREDEFINED tag if you want to use a different macro definition that
-# overrules the definition found in the source code.
+# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then this
+# tag can be used to specify a list of macro names that should be expanded. The
+# macro definition that is found in the sources will be used. Use the PREDEFINED
+# tag if you want to use a different macro definition that overrules the
+# definition found in the source code.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
-EXPAND_AS_DEFINED =
+EXPAND_AS_DEFINED =
-# If the SKIP_FUNCTION_MACROS tag is set to YES (the default) then
-# doxygen's preprocessor will remove all references to function-like macros
-# that are alone on a line, have an all uppercase name, and do not end with a
-# semicolon, because these will confuse the parser if not removed.
+# If the SKIP_FUNCTION_MACROS tag is set to YES then doxygen's preprocessor will
+# remove all references to function-like macros that are alone on a line, have
+# an all uppercase name, and do not end with a semicolon. Such function macros
+# are typically used for boiler-plate code, and will confuse the parser if not
+# removed.
+# The default value is: YES.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
-SKIP_FUNCTION_MACROS = YES
+SKIP_FUNCTION_MACROS = YES
#---------------------------------------------------------------------------
-# Configuration::additions related to external references
+# Configuration options related to external references
#---------------------------------------------------------------------------
-# The TAGFILES option can be used to specify one or more tagfiles. For each
-# tag file the location of the external documentation should be added. The
-# format of a tag file without this location is as follows:
-#
+# The TAGFILES tag can be used to specify one or more tag files. For each tag
+# file the location of the external documentation should be added. The format of
+# a tag file without this location is as follows:
# TAGFILES = file1 file2 ...
# Adding location for the tag files is done as follows:
-#
# TAGFILES = file1=loc1 "file2 = loc2" ...
-# where "loc1" and "loc2" can be relative or absolute paths
-# or URLs. Note that each tag file must have a unique name (where the name does
-# NOT include the path). If a tag file is not located in the directory in which
-# doxygen is run, you must also specify the path to the tagfile here.
+# where loc1 and loc2 can be relative or absolute paths or URLs. See the
+# section "Linking to external documentation" for more information about the use
+# of tag files.
+# Note: Each tag file must have a unique name (where the name does NOT include
+# the path). If a tag file is not located in the directory in which doxygen is
+# run, you must also specify the path to the tagfile here.
-TAGFILES =
+TAGFILES =
+
+# When a file name is specified after GENERATE_TAGFILE, doxygen will create a
+# tag file that is based on the input files it reads. See section "Linking to
+# external documentation" for more information about the usage of tag files.
+
### EDIT THIS ###
-# When a file name is specified after GENERATE_TAGFILE, doxygen will create
-# a tag file that is based on the input files it reads.
+GENERATE_TAGFILE =
-GENERATE_TAGFILE =
+# If the ALLEXTERNALS tag is set to YES, all external class will be listed in
+# the class index. If set to NO, only the inherited external classes will be
+# listed.
+# The default value is: NO.
-# If the ALLEXTERNALS tag is set to YES all external classes will be listed
-# in the class index. If set to NO only the inherited external classes
-# will be listed.
+ALLEXTERNALS = NO
-ALLEXTERNALS = NO
+# If the EXTERNAL_GROUPS tag is set to YES, all external groups will be listed
+# in the modules index. If set to NO, only the current project's groups will be
+# listed.
+# The default value is: YES.
-# If the EXTERNAL_GROUPS tag is set to YES all external groups will be listed
-# in the modules index. If set to NO, only the current project's groups will
+EXTERNAL_GROUPS = NO
+
+# If the EXTERNAL_PAGES tag is set to YES, all external pages will be listed in
+# the related pages index. If set to NO, only the current project's pages will
# be listed.
+# The default value is: YES.
-EXTERNAL_GROUPS = NO
+#EXTERNAL_PAGES = YES
# The PERL_PATH should be the absolute path and name of the perl script
-# interpreter (i.e. the result of `which perl').
+# interpreter (i.e. the result of 'which perl').
+# The default file (with absolute path) is: /usr/bin/perl.
-PERL_PATH = /usr/bin/perl
+PERL_PATH = /usr/bin/perl
#---------------------------------------------------------------------------
# Configuration options related to the dot tool
#---------------------------------------------------------------------------
-# If the CLASS_DIAGRAMS tag is set to YES (the default) Doxygen will
-# generate a inheritance diagram (in HTML, RTF and LaTeX) for classes with base
-# or super classes. Setting the tag to NO turns the diagrams off. Note that
-# this option also works with HAVE_DOT disabled, but it is recommended to
-# install and use dot, since it yields more powerful graphs.
+# If the CLASS_DIAGRAMS tag is set to YES, doxygen will generate a class diagram
+# (in HTML and LaTeX) for classes with base or super classes. Setting the tag to
+# NO turns the diagrams off. Note that this option also works with HAVE_DOT
+# disabled, but it is recommended to install and use dot, since it yields more
+# powerful graphs.
+# The default value is: YES.
-CLASS_DIAGRAMS = YES
+CLASS_DIAGRAMS = YES
# You can define message sequence charts within doxygen comments using the \msc
-# command. Doxygen will then run the mscgen tool (see
-# http://www.mcternan.me.uk/mscgen/) to produce the chart and insert it in the
+# command. Doxygen will then run the mscgen tool (see:
+# http://www.mcternan.me.uk/mscgen/)) to produce the chart and insert it in the
# documentation. The MSCGEN_PATH tag allows you to specify the directory where
# the mscgen tool resides. If left empty the tool is assumed to be found in the
# default search path.
-MSCGEN_PATH =
+MSCGEN_PATH =
-# If set to YES, the inheritance and collaboration graphs will hide
-# inheritance and usage relations if the target is undocumented
-# or is not a class.
+# You can include diagrams made with dia in doxygen documentation. Doxygen will
+# then run dia to produce the diagram and insert it in the documentation. The
+# DIA_PATH tag allows you to specify the directory where the dia binary resides.
+# If left empty dia is assumed to be found in the default search path.
-HIDE_UNDOC_RELATIONS = YES
+#DIA_PATH =
+
+# If set to YES the inheritance and collaboration graphs will hide inheritance
+# and usage relations if the target is undocumented or is not a class.
+# The default value is: YES.
+
+HIDE_UNDOC_RELATIONS = YES
# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is
-# available from the path. This tool is part of Graphviz, a graph visualization
-# toolkit from AT&T and Lucent Bell Labs. The other options in this section
-# have no effect if this option is set to NO (the default)
+# available from the path. This tool is part of Graphviz (see:
+# http://www.graphviz.org/), a graph visualization toolkit from AT&T and Lucent
+# Bell Labs. The other options in this section have no effect if this option is
+# set to NO
+# The default value is: NO.
-HAVE_DOT = NO
+HAVE_DOT = NO
-# The DOT_NUM_THREADS specifies the number of dot invocations doxygen is
-# allowed to run in parallel. When set to 0 (the default) doxygen will
-# base this on the number of processors available in the system. You can set it
-# explicitly to a value larger than 0 to get control over the balance
-# between CPU load and processing speed.
+# The DOT_NUM_THREADS specifies the number of dot invocations doxygen is allowed
+# to run in parallel. When set to 0 doxygen will base this on the number of
+# processors available in the system. You can set it explicitly to a value
+# larger than 0 to get control over the balance between CPU load and processing
+# speed.
+# Minimum value: 0, maximum value: 32, default value: 0.
+# This tag requires that the tag HAVE_DOT is set to YES.
-DOT_NUM_THREADS = 0
+DOT_NUM_THREADS = 0
-# By default doxygen will use the Helvetica font for all dot files that
-# doxygen generates. When you want a differently looking font you can specify
-# the font name using DOT_FONTNAME. You need to make sure dot is able to find
-# the font, which can be done by putting it in a standard location or by setting
-# the DOTFONTPATH environment variable or by setting DOT_FONTPATH to the
-# directory containing the font.
+# When you want a differently looking font in the dot files that doxygen
+# generates you can specify the font name using DOT_FONTNAME. You need to make
+# sure dot is able to find the font, which can be done by putting it in a
+# standard location or by setting the DOTFONTPATH environment variable or by
+# setting DOT_FONTPATH to the directory containing the font.
+# The default value is: Helvetica.
+# This tag requires that the tag HAVE_DOT is set to YES.
-DOT_FONTNAME = Helvetica
+DOT_FONTNAME = Helvetica
-# The DOT_FONTSIZE tag can be used to set the size of the font of dot graphs.
-# The default size is 10pt.
+# The DOT_FONTSIZE tag can be used to set the size (in points) of the font of
+# dot graphs.
+# Minimum value: 4, maximum value: 24, default value: 10.
+# This tag requires that the tag HAVE_DOT is set to YES.
-DOT_FONTSIZE = 10
+DOT_FONTSIZE = 10
-# By default doxygen will tell dot to use the Helvetica font.
-# If you specify a different font using DOT_FONTNAME you can use DOT_FONTPATH to
-# set the path where dot can find it.
+# By default doxygen will tell dot to use the default font as specified with
+# DOT_FONTNAME. If you specify a different font using DOT_FONTNAME you can set
+# the path where dot can find it using this tag.
+# This tag requires that the tag HAVE_DOT is set to YES.
-DOT_FONTPATH =
+DOT_FONTPATH =
-# If the CLASS_GRAPH and HAVE_DOT tags are set to YES then doxygen
-# will generate a graph for each documented class showing the direct and
-# indirect inheritance relations. Setting this tag to YES will force the
-# CLASS_DIAGRAMS tag to NO.
+# If the CLASS_GRAPH tag is set to YES then doxygen will generate a graph for
+# each documented class showing the direct and indirect inheritance relations.
+# Setting this tag to YES will force the CLASS_DIAGRAMS tag to NO.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
-CLASS_GRAPH = YES
+CLASS_GRAPH = YES
-# If the COLLABORATION_GRAPH and HAVE_DOT tags are set to YES then doxygen
-# will generate a graph for each documented class showing the direct and
-# indirect implementation dependencies (inheritance, containment, and
-# class references variables) of the class with other documented classes.
+# If the COLLABORATION_GRAPH tag is set to YES then doxygen will generate a
+# graph for each documented class showing the direct and indirect implementation
+# dependencies (inheritance, containment, and class references variables) of the
+# class with other documented classes.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
-COLLABORATION_GRAPH = YES
+COLLABORATION_GRAPH = YES
-# If the GROUP_GRAPHS and HAVE_DOT tags are set to YES then doxygen
-# will generate a graph for groups, showing the direct groups dependencies
+# If the GROUP_GRAPHS tag is set to YES then doxygen will generate a graph for
+# groups, showing the direct groups dependencies.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
-GROUP_GRAPHS = YES
+GROUP_GRAPHS = YES
-# If the UML_LOOK tag is set to YES doxygen will generate inheritance and
+# If the UML_LOOK tag is set to YES, doxygen will generate inheritance and
# collaboration diagrams in a style similar to the OMG's Unified Modeling
# Language.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
-UML_LOOK = NO
+UML_LOOK = NO
-# If the UML_LOOK tag is enabled, the fields and methods are shown inside
-# the class node. If there are many fields or methods and many nodes the
-# graph may become too big to be useful. The UML_LIMIT_NUM_FIELDS
-# threshold limits the number of items for each type to make the size more
-# managable. Set this to 0 for no limit. Note that the threshold may be
-# exceeded by 50% before the limit is enforced.
+# If the UML_LOOK tag is enabled, the fields and methods are shown inside the
+# class node. If there are many fields or methods and many nodes the graph may
+# become too big to be useful. The UML_LIMIT_NUM_FIELDS threshold limits the
+# number of items for each type to make the size more manageable. Set this to 0
+# for no limit. Note that the threshold may be exceeded by 50% before the limit
+# is enforced. So when you set the threshold to 10, up to 15 fields may appear,
+# but if the number exceeds 15, the total amount of fields shown is limited to
+# 10.
+# Minimum value: 0, maximum value: 100, default value: 10.
+# This tag requires that the tag HAVE_DOT is set to YES.
-UML_LIMIT_NUM_FIELDS = 10
+UML_LIMIT_NUM_FIELDS = 10
-# If set to YES, the inheritance and collaboration graphs will show the
-# relations between templates and their instances.
+# If the TEMPLATE_RELATIONS tag is set to YES then the inheritance and
+# collaboration graphs will show the relations between templates and their
+# instances.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
-TEMPLATE_RELATIONS = NO
+TEMPLATE_RELATIONS = NO
-# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDE_GRAPH, and HAVE_DOT
-# tags are set to YES then doxygen will generate a graph for each documented
-# file showing the direct and indirect include dependencies of the file with
-# other documented files.
+# If the INCLUDE_GRAPH, ENABLE_PREPROCESSING and SEARCH_INCLUDES tags are set to
+# YES then doxygen will generate a graph for each documented file showing the
+# direct and indirect include dependencies of the file with other documented
+# files.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
-INCLUDE_GRAPH = YES
+INCLUDE_GRAPH = YES
-# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDED_BY_GRAPH, and
-# HAVE_DOT tags are set to YES then doxygen will generate a graph for each
-# documented header file showing the documented files that directly or
-# indirectly include this file.
+# If the INCLUDED_BY_GRAPH, ENABLE_PREPROCESSING and SEARCH_INCLUDES tags are
+# set to YES then doxygen will generate a graph for each documented file showing
+# the direct and indirect include dependencies of the file with other documented
+# files.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
-INCLUDED_BY_GRAPH = YES
+INCLUDED_BY_GRAPH = YES
-# If the CALL_GRAPH and HAVE_DOT options are set to YES then
-# doxygen will generate a call dependency graph for every global function
-# or class method. Note that enabling this option will significantly increase
-# the time of a run. So in most cases it will be better to enable call graphs
-# for selected functions only using the \callgraph command.
+# If the CALL_GRAPH tag is set to YES then doxygen will generate a call
+# dependency graph for every global function or class method.
+#
+# Note that enabling this option will significantly increase the time of a run.
+# So in most cases it will be better to enable call graphs for selected
+# functions only using the \callgraph command. Disabling a call graph can be
+# accomplished by means of the command \hidecallgraph.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
-CALL_GRAPH = NO
+CALL_GRAPH = NO
-# If the CALLER_GRAPH and HAVE_DOT tags are set to YES then
-# doxygen will generate a caller dependency graph for every global function
-# or class method. Note that enabling this option will significantly increase
-# the time of a run. So in most cases it will be better to enable caller
-# graphs for selected functions only using the \callergraph command.
+# If the CALLER_GRAPH tag is set to YES then doxygen will generate a caller
+# dependency graph for every global function or class method.
+#
+# Note that enabling this option will significantly increase the time of a run.
+# So in most cases it will be better to enable caller graphs for selected
+# functions only using the \callergraph command. Disabling a caller graph can be
+# accomplished by means of the command \hidecallergraph.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
-CALLER_GRAPH = NO
+CALLER_GRAPH = NO
-# If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen
-# will generate a graphical hierarchy of all classes instead of a textual one.
+# If the GRAPHICAL_HIERARCHY tag is set to YES then doxygen will graphical
+# hierarchy of all classes instead of a textual one.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
-GRAPHICAL_HIERARCHY = YES
+GRAPHICAL_HIERARCHY = YES
-# If the DIRECTORY_GRAPH and HAVE_DOT tags are set to YES
-# then doxygen will show the dependencies a directory has on other directories
-# in a graphical way. The dependency relations are determined by the #include
-# relations between the files in the directories.
+# If the DIRECTORY_GRAPH tag is set to YES then doxygen will show the
+# dependencies a directory has on other directories in a graphical way. The
+# dependency relations are determined by the #include relations between the
+# files in the directories.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
-DIRECTORY_GRAPH = YES
+DIRECTORY_GRAPH = YES
# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images
-# generated by dot. Possible values are svg, png, jpg, or gif.
-# If left blank png will be used. If you choose svg you need to set
-# HTML_FILE_EXTENSION to xhtml in order to make the SVG files
-# visible in IE 9+ (other browsers do not have this requirement).
+# generated by dot. For an explanation of the image formats see the section
+# output formats in the documentation of the dot tool (Graphviz (see:
+# http://www.graphviz.org/)).
+# Note: If you choose svg you need to set HTML_FILE_EXTENSION to xhtml in order
+# to make the SVG files visible in IE 9+ (other browsers do not have this
+# requirement).
+# Possible values are: png, jpg, gif, svg, png:gd, png:gd:gd, png:cairo,
+# png:cairo:gd, png:cairo:cairo, png:cairo:gdiplus, png:gdiplus and
+# png:gdiplus:gdiplus.
+# The default value is: png.
+# This tag requires that the tag HAVE_DOT is set to YES.
-DOT_IMAGE_FORMAT = svg
+DOT_IMAGE_FORMAT = svg
# If DOT_IMAGE_FORMAT is set to svg, then this option can be set to YES to
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-# need to set HTML_FILE_EXTENSION to xhtml in order to make the SVG files
-# visible. Older versions of IE do not have SVG support.
+#
+# Note that this requires a modern browser other than Internet Explorer. Tested
+# and working are Firefox, Chrome, Safari, and Opera.
+# Note: For IE 9+ you need to set HTML_FILE_EXTENSION to xhtml in order to make
+# the SVG files visible. Older versions of IE do not have SVG support.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
-INTERACTIVE_SVG = NO
+INTERACTIVE_SVG = NO
-# The tag DOT_PATH can be used to specify the path where the dot tool can be
+# The DOT_PATH tag can be used to specify the path where the dot tool can be
# found. If left blank, it is assumed the dot tool can be found in the path.
+# This tag requires that the tag HAVE_DOT is set to YES.
-DOT_PATH =
+DOT_PATH =
# The DOTFILE_DIRS tag can be used to specify one or more directories that
-# contain dot files that are included in the documentation (see the
-# \dotfile command).
+# contain dot files that are included in the documentation (see the \dotfile
+# command).
+# This tag requires that the tag HAVE_DOT is set to YES.
-DOTFILE_DIRS =
+DOTFILE_DIRS =
# The MSCFILE_DIRS tag can be used to specify one or more directories that
-# contain msc files that are included in the documentation (see the
-# \mscfile command).
+# contain msc files that are included in the documentation (see the \mscfile
+# command).
-MSCFILE_DIRS =
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-# nodes that will be shown in the graph. If the number of nodes in a graph
-# becomes larger than this value, doxygen will truncate the graph, which is
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-# DOT_GRAPH_MAX_NODES then the graph will not be shown at all. Also note
-# that the size of a graph can be further restricted by MAX_DOT_GRAPH_DEPTH.
+# The DIAFILE_DIRS tag can be used to specify one or more directories that
+# contain dia files that are included in the documentation (see the \diafile
+# command).
-DOT_GRAPH_MAX_NODES = 50
+#DIAFILE_DIRS =
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-# graphs generated by dot. A depth value of 3 means that only nodes reachable
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-# option to 1 or 2 may greatly reduce the computation time needed for large
-# code bases. Also note that the size of a graph can be further restricted by
+# When using plantuml, the PLANTUML_JAR_PATH tag should be used to specify the
+# path where java can find the plantuml.jar file. If left blank, it is assumed
+# PlantUML is not used or called during a preprocessing step. Doxygen will
+# generate a warning when it encounters a \startuml command in this case and
+# will not generate output for the diagram.
+
+#PLANTUML_JAR_PATH =
+
+# When using plantuml, the PLANTUML_CFG_FILE tag can be used to specify a
+# configuration file for plantuml.
+
+#PLANTUML_CFG_FILE =
+
+# When using plantuml, the specified paths are searched for files specified by
+# the !include statement in a plantuml block.
+
+#PLANTUML_INCLUDE_PATH =
+
+# The DOT_GRAPH_MAX_NODES tag can be used to set the maximum number of nodes
+# that will be shown in the graph. If the number of nodes in a graph becomes
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+# by representing a node as a red box. Note that doxygen if the number of direct
+# children of the root node in a graph is already larger than
+# DOT_GRAPH_MAX_NODES then the graph will not be shown at all. Also note that
+# the size of a graph can be further restricted by MAX_DOT_GRAPH_DEPTH.
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+# This tag requires that the tag HAVE_DOT is set to YES.
+
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+
+# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the graphs
+# generated by dot. A depth value of 3 means that only nodes reachable from the
+# root by following a path via at most 3 edges will be shown. Nodes that lay
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# DOT_GRAPH_MAX_NODES. Using a depth of 0 means no depth restriction.
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+# to support this out of the box.
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+# badly anti-aliased labels on the edges of a graph (i.e. they become hard to
+# read).
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+# Set the DOT_MULTI_TARGETS tag to YES to allow dot to generate multiple output
# files in one run (i.e. multiple -o and -T options on the command line). This
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-# generate a legend page explaining the meaning of the various boxes and
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+# explaining the meaning of the various boxes and arrows in the dot generated
+# graphs.
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+# files that are used to generate the various graphs.
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diff --git a/third_party/NordicSemiconductor/nrfx/doc/nrfx_api.dox b/third_party/NordicSemiconductor/nrfx/doc/nrfx_api.dox
index 0de2dcc..3020a43 100644
--- a/third_party/NordicSemiconductor/nrfx/doc/nrfx_api.dox
+++ b/third_party/NordicSemiconductor/nrfx/doc/nrfx_api.dox
@@ -2,6 +2,9 @@
@defgroup nrfx_drivers Drivers
@{
@brief List of all drivers available in nrfx.
+
+@defgroup nrf_aar AAR
+
@defgroup nrf_adc ADC
@defgroup nrf_acl ACL
@@ -18,6 +21,8 @@
@defgroup nrf_ecb ECB
+@defgroup nrf_ficr FICR
+
@defgroup nrf_gpio GPIO
@defgroup nrf_gpiote GPIOTE
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrf_bitmask.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrf_bitmask.h
index 9b71271..2fa69ac 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrf_bitmask.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrf_bitmask.h
@@ -45,14 +45,17 @@
* @brief Bitmask managing module.
*/
+/** @brief Macro for getting index of byte in byte stream where @c abs_bit is put. */
#define BITMASK_BYTE_GET(abs_bit) ((abs_bit)/8)
+
+/** @brief Macro for getting relative index of bit in byte. */
#define BITMASK_RELBIT_GET(abs_bit) ((abs_bit) & 0x00000007)
/**
- * Function for checking if bit in the multi-byte bit mask is set.
+ * @brief Function for checking if bit in the multi-byte bit mask is set.
*
- * @param bit Bit index.
- * @param p_mask A pointer to mask with bit fields.
+ * @param[in] bit Bit index.
+ * @param[in] p_mask Pointer to mask with bit fields.
*
* @return 0 if bit is not set, positive value otherwise.
*/
@@ -65,10 +68,10 @@
}
/**
- * Function for setting a bit in the multi-byte bit mask.
+ * @brief Function for setting a bit in the multi-byte bit mask.
*
- * @param bit Bit index.
- * @param p_mask A pointer to mask with bit fields.
+ * @param[in] bit Bit index.
+ * @param[in] p_mask Pointer to mask with bit fields.
*/
__STATIC_INLINE void nrf_bitmask_bit_set(uint32_t bit, void * p_mask)
{
@@ -79,10 +82,10 @@
}
/**
- * Function for clearing a bit in the multi-byte bit mask.
+ * @brief Function for clearing a bit in the multi-byte bit mask.
*
- * @param bit Bit index.
- * @param p_mask A pointer to mask with bit fields.
+ * @param[in] bit Bit index.
+ * @param[in] p_mask Pointer to mask with bit fields.
*/
__STATIC_INLINE void nrf_bitmask_bit_clear(uint32_t bit, void * p_mask)
{
@@ -93,12 +96,12 @@
}
/**
- * Function for performing bitwise OR operation on two multi-byte bit masks.
+ * @brief Function for performing bitwise OR operation on two multi-byte bit masks.
*
- * @param p_mask1 A pointer to the first bit mask.
- * @param p_mask2 A pointer to the second bit mask.
- * @param p_out_mask A pointer to the output bit mask.
- * @param length Length of output mask in bytes.
+ * @param[in] p_mask1 Pointer to the first bit mask.
+ * @param[in] p_mask2 Pointer to the second bit mask.
+ * @param[in] p_out_mask Pointer to the output bit mask.
+ * @param[in] length Length of output mask in bytes.
*/
__STATIC_INLINE void nrf_bitmask_masks_or(void const * p_mask1,
void const * p_mask2,
@@ -116,12 +119,12 @@
}
/**
- * Function for performing bitwise AND operation on two multi-byte bit masks.
+ * @brief Function for performing bitwise AND operation on two multi-byte bit masks.
*
- * @param p_mask1 A pointer to the first bit mask.
- * @param p_mask2 A pointer to the second bit mask.
- * @param p_out_mask A pointer to the output bit mask.
- * @param length Length of output mask in bytes.
+ * @param[in] p_mask1 Pointer to the first bit mask.
+ * @param[in] p_mask2 Pointer to the second bit mask.
+ * @param[in] p_out_mask Pointer to the output bit mask.
+ * @param[in] length Length of output mask in bytes.
*/
__STATIC_INLINE void nrf_bitmask_masks_and(void const * p_mask1,
void const * p_mask2,
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_adc.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_adc.h
index 589fed7..a042d87 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_adc.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_adc.h
@@ -46,35 +46,27 @@
* @brief Analog-to-Digital Converter (ADC) peripheral driver.
*/
-/**
- * @brief Driver event types.
- */
+/** @brief Driver event types. */
typedef enum
{
NRFX_ADC_EVT_DONE, ///< Event generated when the buffer is filled with samples.
NRFX_ADC_EVT_SAMPLE, ///< Event generated when the requested channel is sampled.
} nrfx_adc_evt_type_t;
-/**
- * @brief Analog-to-digital converter driver DONE event.
- */
+/** @brief ADC driver DONE event structure. */
typedef struct
{
nrf_adc_value_t * p_buffer; ///< Pointer to the buffer with converted samples.
uint16_t size; ///< Number of samples in the buffer.
} nrfx_adc_done_evt_t;
-/**
- * @brief Analog-to-digital converter driver SAMPLE event.
- */
+/** @brief SAMPLE event structure. */
typedef struct
{
nrf_adc_value_t sample; ///< Converted sample.
} nrfx_adc_sample_evt_t;
-/**
- * @brief Analog-to-digital converter driver event.
- */
+/** @brief ADC driver event. */
typedef struct
{
nrfx_adc_evt_type_t type; ///< Event type.
@@ -82,10 +74,10 @@
{
nrfx_adc_done_evt_t done; ///< Data for DONE event.
nrfx_adc_sample_evt_t sample; ///< Data for SAMPLE event.
- } data;
+ } data; ///< Union to store event data.
} nrfx_adc_evt_t;
-/**@brief Macro for initializing the ADC channel with the default configuration. */
+/** @brief Macro for initializing the ADC channel with the default configuration. */
#define NRFX_ADC_DEFAULT_CHANNEL(analog_input) \
{ \
NULL, \
@@ -98,7 +90,7 @@
} \
}
-// Forward declaration of the nrfx_adc_channel_t type.
+/** @brief Forward declaration of the nrfx_adc_channel_t type. */
typedef struct nrfx_adc_channel_s nrfx_adc_channel_t;
/**
@@ -113,9 +105,7 @@
nrf_adc_config_t config; ///< ADC configuration for the current channel.
};
-/**
- * @brief ADC configuration.
- */
+/** @brief ADC configuration. */
typedef struct
{
uint8_t interrupt_priority; ///< Priority of ADC interrupt.
@@ -142,11 +132,11 @@
* If a valid event handler is provided, the driver is initialized in non-blocking mode.
* If event_handler is NULL, the driver works in blocking mode.
*
- * @param[in] p_config Pointer to the structure with initial configuration.
+ * @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] event_handler Event handler provided by the user.
*
- * @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_INVALID_STATE If the driver is already initialized.
+ * @retval NRFX_SUCCESS Initialization was successful.
+ * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized.
*/
nrfx_err_t nrfx_adc_init(nrfx_adc_config_t const * p_config,
nrfx_adc_event_handler_t event_handler);
@@ -169,6 +159,8 @@
*
* @note The channel instance variable @p p_channel is used by the driver as an item
* in a list. Therefore, it cannot be an automatic variable that is located on the stack.
+ *
+ * @param[in] p_channel Pointer to the channel instance.
*/
void nrfx_adc_channel_enable(nrfx_adc_channel_t * const p_channel);
@@ -177,6 +169,8 @@
*
* This function can be called only when there is no conversion in progress
* (the ADC is not busy).
+ *
+ * @param p_channel Pointer to the channel instance.
*/
void nrfx_adc_channel_disable(nrfx_adc_channel_t * const p_channel);
@@ -206,11 +200,11 @@
* fail if ADC is busy. The channel does not need to be enabled to perform a single conversion.
*
* @param[in] p_channel Channel.
- * @param[out] p_value Pointer to the location where the result should be placed. Unless NULL is
+ * @param[out] p_value Pointer to the location where the result is to be placed. Unless NULL is
* provided, the function is blocking.
*
- * @retval NRFX_SUCCESS If conversion was successful.
- * @retval NRFX_ERROR_BUSY If the ADC driver is busy.
+ * @retval NRFX_SUCCESS Conversion was successful.
+ * @retval NRFX_ERROR_BUSY The ADC driver is busy.
*/
nrfx_err_t nrfx_adc_sample_convert(nrfx_adc_channel_t const * const p_channel,
nrf_adc_value_t * p_value);
@@ -241,16 +235,16 @@
* @param[in] buffer Result buffer.
* @param[in] size Buffer size in samples.
*
- * @retval NRFX_SUCCESS If conversion was successful.
- * @retval NRFX_ERROR_BUSY If the driver is busy.
+ * @retval NRFX_SUCCESS Conversion was successful.
+ * @retval NRFX_ERROR_BUSY The driver is busy.
*/
nrfx_err_t nrfx_adc_buffer_convert(nrf_adc_value_t * buffer, uint16_t size);
/**
* @brief Function for retrieving the ADC state.
*
- * @retval true If the ADC is busy.
- * @retval false If the ADC is ready.
+ * @retval true The ADC is busy.
+ * @retval false The ADC is ready.
*/
bool nrfx_adc_is_busy(void);
@@ -273,12 +267,12 @@
#endif
+/** @} */
+
void nrfx_adc_irq_handler(void);
-/** @} */
-
#ifdef __cplusplus
}
#endif
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_clock.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_clock.h
index 0e6cd98..c782b02 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_clock.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_clock.h
@@ -47,9 +47,7 @@
* @brief CLOCK peripheral driver.
*/
-/**
- * @brief Clock events.
- */
+/** @brief Clock events. */
typedef enum
{
NRFX_CLOCK_EVT_HFCLK_STARTED, ///< HFCLK has been started.
@@ -61,7 +59,7 @@
/**
* @brief Clock event handler.
*
- * @param[in] event Event.
+ * @param[in] event Event.
*/
typedef void (*nrfx_clock_event_handler_t)(nrfx_clock_evt_type_t event);
@@ -73,71 +71,57 @@
* @param[in] event_handler Event handler provided by the user.
* Must not be NULL.
*
- * @retval NRFX_SUCCESS If the procedure was successful.
- * @retval NRFX_ERROR_ALREADY_INITIALIZED If the driver was already initialized.
+ * @retval NRFX_SUCCESS The procedure is successful.
+ * @retval NRFX_ERROR_ALREADY_INITIALIZED The driver is already initialized.
*/
nrfx_err_t nrfx_clock_init(nrfx_clock_event_handler_t event_handler);
-/**
- * @brief Function for enabling interrupts in the clock module.
- */
+/** @brief Function for enabling interrupts in the clock module. */
void nrfx_clock_enable(void);
-/**
- * @brief Function for disabling interrupts in the clock module.
- */
+/** @brief Function for disabling interrupts in the clock module. */
void nrfx_clock_disable(void);
-/**
- * @brief Function for uninitializing the clock module.
- */
+/** @brief Function for uninitializing the clock module. */
void nrfx_clock_uninit(void);
-/**
- * @brief Function for starting the LFCLK.
- */
+/** @brief Function for starting the LFCLK. */
void nrfx_clock_lfclk_start(void);
-/**
- * @brief Function for stoping the LFCLK.
- */
+/** @brief Function for stopping the LFCLK. */
void nrfx_clock_lfclk_stop(void);
/**
* @brief Function for checking the LFCLK state.
*
- * @retval true If the LFCLK is running.
- * @retval false If the LFCLK is not running.
+ * @retval true The LFCLK is running.
+ * @retval false The LFCLK is not running.
*/
__STATIC_INLINE bool nrfx_clock_lfclk_is_running(void);
-/**
- * @brief Function for starting the high-accuracy source HFCLK.
- */
+/** @brief Function for starting the high-accuracy source HFCLK. */
void nrfx_clock_hfclk_start(void);
-/**
- * @brief Function for stoping external high-accuracy source HFCLK.
- */
+/** @brief Function for stopping the external high-accuracy source HFCLK. */
void nrfx_clock_hfclk_stop(void);
/**
* @brief Function for checking the HFCLK state.
*
- * @retval true If the HFCLK is running (XTAL source).
- * @retval false If the HFCLK is not running.
+ * @retval true The HFCLK is running (XTAL source).
+ * @retval false The HFCLK is not running.
*/
__STATIC_INLINE bool nrfx_clock_hfclk_is_running(void);
/**
- * @brief Function for starting calibration of internal LFCLK.
+ * @brief Function for starting the calibration of internal LFCLK.
*
* This function starts the calibration process. The process cannot be aborted. LFCLK and HFCLK
* must be running before this function is called.
*
- * @retval NRFX_SUCCESS If the procedure was successful.
- * @retval NRFX_ERROR_INVALID_STATE If the low-frequency of high-frequency clock is off.
- * @retval NRFX_ERROR_BUSY If calibration is in progress.
+ * @retval NRFX_SUCCESS The procedure is successful.
+ * @retval NRFX_ERROR_INVALID_STATE The low-frequency of high-frequency clock is off.
+ * @retval NRFX_ERROR_BUSY Clock is in the calibration phase.
*/
nrfx_err_t nrfx_clock_calibration_start(void);
@@ -146,35 +130,34 @@
*
* This function indicates that the system is in calibration phase.
*
- * @retval NRFX_SUCCESS If the procedure was successful.
- * @retval NRFX_ERROR_BUSY If calibration is in progress.
+ * @retval NRFX_SUCCESS The procedure is successful.
+ * @retval NRFX_ERROR_BUSY Clock is in the calibration phase.
*/
nrfx_err_t nrfx_clock_is_calibrating(void);
/**
* @brief Function for starting calibration timer.
- * @param interval Time after which the CTTO event and interrupt will be generated (in 0.25 s units).
+ *
+ * @param[in] interval Time after which the CTTO event and interrupt will be generated (in 0.25 s units).
*/
void nrfx_clock_calibration_timer_start(uint8_t interval);
-/**
- * @brief Function for stoping calibration timer.
- */
+/** @brief Function for stopping the calibration timer. */
void nrfx_clock_calibration_timer_stop(void);
/**@brief Function for returning a requested task address for the clock driver module.
*
- * @param[in] task One of the peripheral tasks.
+ * @param[in] task One of the peripheral tasks.
*
- * @return Task address.
+ * @return Task address.
*/
__STATIC_INLINE uint32_t nrfx_clock_ppi_task_addr(nrf_clock_task_t task);
/**@brief Function for returning a requested event address for the clock driver module.
*
- * @param[in] event One of the peripheral events.
+ * @param[in] event One of the peripheral events.
*
- * @return Event address.
+ * @return Event address.
*/
__STATIC_INLINE uint32_t nrfx_clock_ppi_event_addr(nrf_clock_event_t event);
@@ -201,12 +184,12 @@
}
#endif //SUPPRESS_INLINE_IMPLEMENTATION
+/** @} */
+
void nrfx_clock_irq_handler(void);
-/** @} */
-
#ifdef __cplusplus
}
#endif
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_comp.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_comp.h
index 1089d83..91efd42 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_comp.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_comp.h
@@ -47,19 +47,20 @@
*/
/**
- * @brief Macro to convert the threshold voltage to an integer value
+ * @brief Macro for converting the threshold voltage to an integer value
* (needed by the COMP_TH register).
*
- * @param[in] vol Voltage to be changed to COMP_TH register value. This value
- * must not be smaller than reference voltage divided by 64.
- * @param[in] ref Reference voltage.
+ * @param[in] vol Voltage to be changed to COMP_TH register value. This value
+ * must not be smaller than reference voltage divided by 64.
+ * @param[in] ref Reference voltage.
*/
#define NRFX_VOLTAGE_THRESHOLD_TO_INT(vol, ref) \
(uint8_t)(((vol) > ((ref) / 64)) ? (NRFX_ROUNDED_DIV((vol) * 64,(ref)) - 1) : 0)
/**
* @brief COMP event handler function type.
- * @param[in] event COMP event.
+ *
+ * @param[in] event COMP event.
*/
typedef void (* nrfx_comp_event_handler_t)(nrf_comp_event_t event);
@@ -88,7 +89,7 @@
nrf_comp_main_mode_t main_mode; /**< Main operation mode. */
nrf_comp_th_t threshold; /**< Structure holding THDOWN and THUP values needed by the COMP_TH register. */
nrf_comp_sp_mode_t speed_mode; /**< Speed and power mode. */
- nrf_comp_hyst_t hyst; /**< Comparator hysteresis.*/
+ nrf_comp_hyst_t hyst; /**< Comparator hysteresis. */
#if defined (COMP_ISOURCE_ISOURCE_Msk) || defined (__NRFX_DOXYGEN__)
nrf_isource_t isource; /**< Current source selected on analog input. */
#endif
@@ -108,6 +109,7 @@
#define NRFX_COMP_DEFAULT_CONFIG(_input) \
{ \
.reference = (nrf_comp_ref_t)NRFX_COMP_CONFIG_REF, \
+ .ext_ref = NRF_COMP_EXT_REF_0, \
.main_mode = (nrf_comp_main_mode_t)NRFX_COMP_CONFIG_MAIN_MODE, \
.threshold = NRFX_COMP_CONFIG_TH, \
.speed_mode = (nrf_comp_sp_mode_t)NRFX_COMP_CONFIG_SPEED_MODE, \
@@ -120,6 +122,7 @@
#define NRFX_COMP_DEFAULT_CONFIG(_input) \
{ \
.reference = (nrf_comp_ref_t)NRFX_COMP_CONFIG_REF, \
+ .ext_ref = NRF_COMP_EXT_REF_0, \
.main_mode = (nrf_comp_main_mode_t)NRFX_COMP_CONFIG_MAIN_MODE, \
.threshold = NRFX_COMP_CONFIG_TH, \
.speed_mode = (nrf_comp_sp_mode_t)NRFX_COMP_CONFIG_SPEED_MODE, \
@@ -135,35 +138,34 @@
* This function initializes the COMP driver, but does not enable the peripheral or any interrupts.
* To start the driver, call the function @ref nrfx_comp_start() after initialization.
*
- * @param[in] p_config Pointer to the structure with initial configuration.
+ * @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] event_handler Event handler provided by the user.
* Must not be NULL.
*
- * @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_INVALID_STATE If the driver has already been initialized.
- * @retval NRFX_ERROR_BUSY If the LPCOMP peripheral is already in use.
+ * @retval NRFX_SUCCESS Initialization was successful.
+ * @retval NRFX_ERROR_INVALID_STATE The driver has already been initialized.
+ * @retval NRFX_ERROR_BUSY The LPCOMP peripheral is already in use.
* This is possible only if @ref nrfx_prs module
* is enabled.
*/
nrfx_err_t nrfx_comp_init(nrfx_comp_config_t const * p_config,
nrfx_comp_event_handler_t event_handler);
-
/**
- * @brief Function for uninitializing the COMP driver.
+ * @brief Function for uninitializing the COMP driver.
*
- * This function uninitializes the COMP driver. The COMP peripheral and
- * its interrupts are disabled, and local variables are cleaned. After this call, you must
- * initialize the driver again by calling nrfx_comp_init() if you want to use it.
+ * This function uninitializes the COMP driver. The COMP peripheral and
+ * its interrupts are disabled, and local variables are cleaned. After this call, you must
+ * initialize the driver again by calling nrfx_comp_init() if you want to use it.
*
- * @sa nrfx_comp_stop()
+ * @sa nrfx_comp_stop
*/
void nrfx_comp_uninit(void);
/**
* @brief Function for setting the analog input.
*
- * @param[in] psel COMP analog pin selection.
+ * @param[in] psel COMP analog pin selection.
*/
void nrfx_comp_pin_select(nrf_comp_input_t psel);
@@ -173,38 +175,37 @@
* Before calling this function, the driver must be initialized. This function
* enables the COMP peripheral and its interrupts.
*
- * @param[in] comp_evt_en_mask Mask of events to be enabled. This parameter should be built as
- * 'or' of elements from @ref nrfx_comp_evt_en_mask_t.
- * @param[in] comp_shorts_mask Mask of shorts to be enabled. This parameter should be built as
- * 'or' of elements from @ref nrfx_comp_short_mask_t.
+ * @param[in] comp_evt_en_mask Mask of events to be enabled. This parameter is to be built as
+ * an OR of elements from @ref nrfx_comp_evt_en_mask_t.
+ * @param[in] comp_shorts_mask Mask of shortcuts to be enabled. This parameter is to be built as
+ * an OR of elements from @ref nrfx_comp_short_mask_t.
*
- * @sa nrfx_comp_init()
- *
+ * @sa nrfx_comp_init
*/
void nrfx_comp_start(uint32_t comp_evt_en_mask, uint32_t comp_shorts_mask);
-/**@brief Function for stopping the COMP peripheral.
+/**
+ * @brief Function for stopping the COMP peripheral.
*
* Before calling this function, the driver must be enabled. This function disables the COMP
* peripheral and its interrupts.
*
- * @sa nrfx_comp_uninit()
- *
+ * @sa nrfx_comp_uninit
*/
void nrfx_comp_stop(void);
/**
* @brief Function for copying the current state of the comparator result to the RESULT register.
*
- * @retval 0 If the input voltage is below the threshold (VIN+ < VIN-).
- * @retval 1 If the input voltage is above the threshold (VIN+ > VIN-).
+ * @retval 0 The input voltage is below the threshold (VIN+ < VIN-).
+ * @retval 1 The input voltage is above the threshold (VIN+ > VIN-).
*/
uint32_t nrfx_comp_sample(void);
/**
* @brief Function for getting the address of a COMP task.
*
- * @param[in] task COMP task.
+ * @param[in] task COMP task.
*
* @return Address of the given COMP task.
*/
@@ -225,12 +226,12 @@
return (uint32_t)nrf_comp_event_address_get(event);
}
+/** @} */
+
void nrfx_comp_irq_handler(void);
-/** @} **/
-
#ifdef __cplusplus
}
#endif
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_dppi.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_dppi.h
index d4dcbb5..84b1715 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_dppi.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_dppi.h
@@ -55,8 +55,8 @@
*
* @param[out] p_channel Pointer to the DPPI channel number that has been allocated.
*
- * @retval NRFX_SUCCESS If the channel was successfully allocated.
- * @retval NRFX_ERROR_NO_MEM If there is no available channel to be used.
+ * @retval NRFX_SUCCESS The channel was successfully allocated.
+ * @retval NRFX_ERROR_NO_MEM There is no available channel to be used.
*/
nrfx_err_t nrfx_dppi_channel_alloc(uint8_t * p_channel);
@@ -66,8 +66,8 @@
*
* @param[in] channel DPPI channel to be freed.
*
- * @retval NRFX_SUCCESS If the channel was successfully freed.
- * @retval NRFX_ERROR_INVALID_PARAM If the specified channel is not allocated.
+ * @retval NRFX_SUCCESS The channel was successfully freed.
+ * @retval NRFX_ERROR_INVALID_PARAM The specified channel is not allocated.
*/
nrfx_err_t nrfx_dppi_channel_free(uint8_t channel);
@@ -76,8 +76,8 @@
*
* @param[in] channel DPPI channel to be enabled.
*
- * @retval NRFX_SUCCESS If the channel was successfully enabled.
- * @retval NRFX_ERROR_INVALID_PARAM If the specified channel is not allocated.
+ * @retval NRFX_SUCCESS The channel was successfully enabled.
+ * @retval NRFX_ERROR_INVALID_PARAM The specified channel is not allocated.
*/
nrfx_err_t nrfx_dppi_channel_enable(uint8_t channel);
@@ -86,8 +86,8 @@
*
* @param[in] channel DPPI channel to be disabled.
*
- * @retval NRFX_SUCCESS If the channel was successfully disabled.
- * @retval NRFX_ERROR_INVALID_PARAM If the specified channel is not allocated.
+ * @retval NRFX_SUCCESS The channel was successfully disabled.
+ * @retval NRFX_ERROR_INVALID_PARAM The specified channel is not allocated.
*/
nrfx_err_t nrfx_dppi_channel_disable(uint8_t channel);
@@ -97,8 +97,8 @@
*
* @param[out] p_group Pointer to the DPPI channel group that has been allocated.
*
- * @retval NRFX_SUCCESS If the channel group was successfully allocated.
- * @retval NRFX_ERROR_NO_MEM If there is no available channel group to be used.
+ * @retval NRFX_SUCCESS The channel group was successfully allocated.
+ * @retval NRFX_ERROR_NO_MEM There is no available channel group to be used.
*/
nrfx_err_t nrfx_dppi_group_alloc(nrf_dppi_channel_group_t * p_group);
@@ -108,8 +108,8 @@
*
* @param[in] group DPPI channel group to be freed.
*
- * @retval NRFX_SUCCESS If the channel group was successfully freed.
- * @retval NRFX_ERROR_INVALID_PARAM If the specified group is not allocated.
+ * @retval NRFX_SUCCESS The channel group was successfully freed.
+ * @retval NRFX_ERROR_INVALID_PARAM The specified group is not allocated.
*/
nrfx_err_t nrfx_dppi_group_free(nrf_dppi_channel_group_t group);
@@ -119,8 +119,8 @@
* @param[in] channel DPPI channel to be added.
* @param[in] group Channel group in which to include the channel.
*
- * @retval NRFX_SUCCESS If the channel was successfully included.
- * @retval NRFX_ERROR_INVALID_PARAM If the specified group or channel is not allocated.
+ * @retval NRFX_SUCCESS The channel was successfully included.
+ * @retval NRFX_ERROR_INVALID_PARAM The specified group or channel is not allocated.
*/
nrfx_err_t nrfx_dppi_channel_include_in_group(uint8_t channel,
nrf_dppi_channel_group_t group);
@@ -131,8 +131,8 @@
* @param[in] channel DPPI channel to be removed.
* @param[in] group Channel group from which to remove the channel.
*
- * @retval NRFX_SUCCESS If the channel was successfully removed.
- * @retval NRFX_ERROR_INVALID_PARAM If the specified group or channel is not allocated.
+ * @retval NRFX_SUCCESS The channel was successfully removed.
+ * @retval NRFX_ERROR_INVALID_PARAM The specified group or channel is not allocated.
*/
nrfx_err_t nrfx_dppi_channel_remove_from_group(uint8_t channel,
nrf_dppi_channel_group_t group);
@@ -142,8 +142,8 @@
*
* @param[in] group Channel group to be cleared.
*
- * @retval NRFX_SUCCESS If the group was successfully cleared.
- * @retval NRFX_ERROR_INVALID_PARAM If the specified group is not allocated.
+ * @retval NRFX_SUCCESS The group was successfully cleared.
+ * @retval NRFX_ERROR_INVALID_PARAM The specified group is not allocated.
*/
nrfx_err_t nrfx_dppi_group_clear(nrf_dppi_channel_group_t group);
@@ -152,8 +152,8 @@
*
* @param[in] group Channel group to be enabled.
*
- * @retval NRFX_SUCCESS If the group was successfully enabled.
- * @retval NRFX_ERROR_INVALID_PARAM If the specified group is not allocated.
+ * @retval NRFX_SUCCESS The group was successfully enabled.
+ * @retval NRFX_ERROR_INVALID_PARAM The specified group is not allocated.
*/
nrfx_err_t nrfx_dppi_group_enable(nrf_dppi_channel_group_t group);
@@ -162,8 +162,8 @@
*
* @param[in] group Channel group to be disabled.
*
- * @retval NRFX_SUCCESS If the group was successfully disabled.
- * @retval NRFX_ERROR_INVALID_PARAM If the specified group is not allocated.
+ * @retval NRFX_SUCCESS The group was successfully disabled.
+ * @retval NRFX_ERROR_INVALID_PARAM The specified group is not allocated.
*/
nrfx_err_t nrfx_dppi_group_disable(nrf_dppi_channel_group_t group);
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_gpiote.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_gpiote.h
index e94d1f3..126f0f5 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_gpiote.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_gpiote.h
@@ -44,87 +44,102 @@
* @defgroup nrfx_gpiote GPIOTE driver
* @{
* @ingroup nrf_gpiote
- * @brief GPIOTE peripheral driver.
+ * @brief GPIO Task Event (GPIOTE) peripheral driver.
*/
-/**@brief Input pin configuration. */
+/** @brief Input pin configuration. */
typedef struct
{
- nrf_gpiote_polarity_t sense; /**< Transition that triggers interrupt. */
+ nrf_gpiote_polarity_t sense; /**< Transition that triggers the interrupt. */
nrf_gpio_pin_pull_t pull; /**< Pulling mode. */
bool is_watcher : 1; /**< True when the input pin is tracking an output pin. */
bool hi_accuracy : 1; /**< True when high accuracy (IN_EVENT) is used. */
bool skip_gpio_setup : 1; /**< Do not change GPIO configuration */
} nrfx_gpiote_in_config_t;
-/**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect low-to-high transition.
- * @details Set hi_accu to true to use IN_EVENT. */
+/**
+ * @brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect low-to-high transition.
+ * @details Set hi_accu to true to use IN_EVENT.
+ */
#define NRFX_GPIOTE_CONFIG_IN_SENSE_LOTOHI(hi_accu) \
- { \
- .is_watcher = false, \
- .hi_accuracy = hi_accu, \
- .pull = NRF_GPIO_PIN_NOPULL, \
- .sense = NRF_GPIOTE_POLARITY_LOTOHI, \
- }
+{ \
+ .sense = NRF_GPIOTE_POLARITY_LOTOHI, \
+ .pull = NRF_GPIO_PIN_NOPULL, \
+ .is_watcher = false, \
+ .hi_accuracy = hi_accu, \
+ .skip_gpio_setup = false, \
+}
-/**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect high-to-low transition.
- * @details Set hi_accu to true to use IN_EVENT. */
+/**
+ * @brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect high-to-low transition.
+ * @details Set hi_accu to true to use IN_EVENT.
+ */
#define NRFX_GPIOTE_CONFIG_IN_SENSE_HITOLO(hi_accu) \
- { \
- .is_watcher = false, \
- .hi_accuracy = hi_accu, \
- .pull = NRF_GPIO_PIN_NOPULL, \
- .sense = NRF_GPIOTE_POLARITY_HITOLO, \
- }
+{ \
+ .sense = NRF_GPIOTE_POLARITY_HITOLO, \
+ .pull = NRF_GPIO_PIN_NOPULL, \
+ .is_watcher = false, \
+ .hi_accuracy = hi_accu, \
+ .skip_gpio_setup = false, \
+}
-/**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect any change on the pin.
- * @details Set hi_accu to true to use IN_EVENT.*/
+/**
+ * @brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect any change on the pin.
+ * @details Set hi_accu to true to use IN_EVENT.
+ */
#define NRFX_GPIOTE_CONFIG_IN_SENSE_TOGGLE(hi_accu) \
- { \
- .is_watcher = false, \
- .hi_accuracy = hi_accu, \
- .pull = NRF_GPIO_PIN_NOPULL, \
- .sense = NRF_GPIOTE_POLARITY_TOGGLE, \
- }
+{ \
+ .sense = NRF_GPIOTE_POLARITY_TOGGLE, \
+ .pull = NRF_GPIO_PIN_NOPULL, \
+ .is_watcher = false, \
+ .hi_accuracy = hi_accu, \
+ .skip_gpio_setup = false, \
+}
-/**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect low-to-high transition.
+/**
+ * @brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect low-to-high transition.
* @details Set hi_accu to true to use IN_EVENT.
- * @note This macro prepares configuration that skips GPIO setup. */
+ * @note This macro prepares configuration that skips the GPIO setup.
+ */
#define NRFX_GPIOTE_RAW_CONFIG_IN_SENSE_LOTOHI(hi_accu) \
- { \
- .is_watcher = false, \
- .hi_accuracy = hi_accu, \
- .pull = NRF_GPIO_PIN_NOPULL, \
- .sense = NRF_GPIOTE_POLARITY_LOTOHI, \
- .skip_gpio_setup = true, \
- }
+{ \
+ .sense = NRF_GPIOTE_POLARITY_LOTOHI, \
+ .pull = NRF_GPIO_PIN_NOPULL, \
+ .is_watcher = false, \
+ .hi_accuracy = hi_accu, \
+ .skip_gpio_setup = true, \
+}
-/**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect high-to-low transition.
+/**
+ * @brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect high-to-low transition.
* @details Set hi_accu to true to use IN_EVENT.
- * @note This macro prepares configuration that skips GPIO setup. */
+ * @note This macro prepares configuration that skips the GPIO setup.
+ */
#define NRFX_GPIOTE_RAW_CONFIG_IN_SENSE_HITOLO(hi_accu) \
- { \
- .is_watcher = false, \
- .hi_accuracy = hi_accu, \
- .pull = NRF_GPIO_PIN_NOPULL, \
- .sense = NRF_GPIOTE_POLARITY_HITOLO, \
- .skip_gpio_setup = true, \
- }
+{ \
+ .sense = NRF_GPIOTE_POLARITY_HITOLO, \
+ .pull = NRF_GPIO_PIN_NOPULL, \
+ .is_watcher = false, \
+ .hi_accuracy = hi_accu, \
+ .skip_gpio_setup = true, \
+}
-/**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect any change on the pin.
+/**
+ * @brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect any change on the pin.
* @details Set hi_accu to true to use IN_EVENT.
- * @note This macro prepares configuration that skips GPIO setup. */
+ * @note This macro prepares configuration that skips the GPIO setup.
+ */
#define NRFX_GPIOTE_RAW_CONFIG_IN_SENSE_TOGGLE(hi_accu) \
- { \
- .is_watcher = false, \
- .hi_accuracy = hi_accu, \
- .pull = NRF_GPIO_PIN_NOPULL, \
- .sense = NRF_GPIOTE_POLARITY_TOGGLE, \
- .skip_gpio_setup = true, \
- }
+{ \
+ .sense = NRF_GPIOTE_POLARITY_TOGGLE, \
+ .pull = NRF_GPIO_PIN_NOPULL, \
+ .is_watcher = false, \
+ .hi_accuracy = hi_accu, \
+ .skip_gpio_setup = true, \
+}
-/**@brief Output pin configuration. */
+/** @brief Output pin configuration. */
typedef struct
{
nrf_gpiote_polarity_t action; /**< Configuration of the pin task. */
@@ -132,15 +147,18 @@
bool task_pin; /**< True if the pin is controlled by a GPIOTE task. */
} nrfx_gpiote_out_config_t;
-/**@brief Macro for configuring a pin to use as output. GPIOTE is not used for the pin. */
+/** @brief Macro for configuring a pin to use as output. GPIOTE is not used for the pin. */
#define NRFX_GPIOTE_CONFIG_OUT_SIMPLE(init_high) \
{ \
+ .action = NRF_GPIOTE_POLARITY_LOTOHI, \
.init_state = init_high ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW, \
- .task_pin = false, \
+ .task_pin = false, \
}
-/**@brief Macro for configuring a pin to use the GPIO OUT TASK to change the state from high to low.
- * @details The task will clear the pin. Therefore, the pin is set initially. */
+/**
+ * @brief Macro for configuring a pin to use the GPIO OUT TASK to change the state from high to low.
+ * @details The task will clear the pin. Therefore, the pin is set initially.
+ */
#define NRFX_GPIOTE_CONFIG_OUT_TASK_LOW \
{ \
.init_state = NRF_GPIOTE_INITIAL_VALUE_HIGH, \
@@ -148,22 +166,26 @@
.action = NRF_GPIOTE_POLARITY_HITOLO, \
}
-/**@brief Macro for configuring a pin to use the GPIO OUT TASK to change the state from low to high.
- * @details The task will set the pin. Therefore, the pin is cleared initially. */
+/**
+ * @brief Macro for configuring a pin to use the GPIO OUT TASK to change the state from low to high.
+ * @details The task will set the pin. Therefore, the pin is cleared initially.
+ */
#define NRFX_GPIOTE_CONFIG_OUT_TASK_HIGH \
{ \
+ .action = NRF_GPIOTE_POLARITY_LOTOHI, \
.init_state = NRF_GPIOTE_INITIAL_VALUE_LOW, \
.task_pin = true, \
- .action = NRF_GPIOTE_POLARITY_LOTOHI, \
}
-/**@brief Macro for configuring a pin to use the GPIO OUT TASK to toggle the pin state.
- * @details The initial pin state must be provided. */
+/**
+ * @brief Macro for configuring a pin to use the GPIO OUT TASK to toggle the pin state.
+ * @details The initial pin state must be provided.
+ */
#define NRFX_GPIOTE_CONFIG_OUT_TASK_TOGGLE(init_high) \
{ \
+ .action = NRF_GPIOTE_POLARITY_TOGGLE, \
.init_state = init_high ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW, \
.task_pin = true, \
- .action = NRF_GPIOTE_POLARITY_TOGGLE, \
}
/** @brief Pin. */
@@ -172,8 +194,8 @@
/**
* @brief Pin event handler prototype.
*
- * @param pin Pin that triggered this event.
- * @param action Action that lead to triggering this event.
+ * @param[in] pin Pin that triggered this event.
+ * @param[in] action Action that led to triggering this event.
*/
typedef void (*nrfx_gpiote_evt_handler_t)(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action);
@@ -183,25 +205,23 @@
* @details Only static configuration is supported to prevent the shared
* resource being customized by the initiator.
*
- * @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_INVALID_STATE If the driver was already initialized.
+ * @retval NRFX_SUCCESS Initialization was successful.
+ * @retval NRFX_ERROR_INVALID_STATE The driver was already initialized.
*/
nrfx_err_t nrfx_gpiote_init(void);
/**
* @brief Function for checking if the GPIOTE module is initialized.
*
- * @details The GPIOTE module is a shared module. Therefore, you should check if
+ * @details The GPIOTE module is a shared module. Therefore, check if
* the module is already initialized and skip initialization if it is.
*
- * @retval true If the module is already initialized.
- * @retval false If the module is not initialized.
+ * @retval true The module is already initialized.
+ * @retval false The module is not initialized.
*/
bool nrfx_gpiote_is_init(void);
-/**
- * @brief Function for uninitializing the GPIOTE module.
- */
+/** @brief Function for uninitializing the GPIOTE module. */
void nrfx_gpiote_uninit(void);
/**
@@ -214,9 +234,9 @@
* @param[in] pin Pin.
* @param[in] p_config Initial configuration.
*
- * @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_INVALID_STATE If the driver is not initialized or the pin is already used.
- * @retval NRFX_ERROR_NO_MEM If no GPIOTE channel is available.
+ * @retval NRFX_SUCCESS Initialization was successful.
+ * @retval NRFX_ERROR_INVALID_STATE The driver is not initialized or the pin is already used.
+ * @retval NRFX_ERROR_NO_MEM No GPIOTE channel is available.
*/
nrfx_err_t nrfx_gpiote_out_init(nrfx_gpiote_pin_t pin,
nrfx_gpiote_out_config_t const * p_config);
@@ -305,7 +325,7 @@
* If high-accuracy mode is used, the driver attempts to allocate one
* of the available GPIOTE channels. If no channel is
* available, an error is returned.
- * In low accuracy mode SENSE feature is used. In this case only one active pin
+ * In low accuracy mode SENSE feature is used. In this case, only one active pin
* can be detected at a time. It can be worked around by setting all of the used
* low accuracy pins to toggle mode.
* For more information about SENSE functionality, refer to Product Specification.
@@ -314,9 +334,9 @@
* @param[in] p_config Initial configuration.
* @param[in] evt_handler User function to be called when the configured transition occurs.
*
- * @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_INVALID_STATE If the driver is not initialized or the pin is already used.
- * @retval NRFX_ERROR_NO_MEM If no GPIOTE channel is available.
+ * @retval NRFX_SUCCESS Initialization was successful.
+ * @retval NRFX_ERROR_INVALID_STATE The driver is not initialized or the pin is already used.
+ * @retval NRFX_ERROR_NO_MEM No GPIOTE channel is available.
*/
nrfx_err_t nrfx_gpiote_in_init(nrfx_gpiote_pin_t pin,
nrfx_gpiote_in_config_t const * p_config,
@@ -335,8 +355,7 @@
*
* @details If the input pin is configured as high-accuracy pin, the function
* enables an IN_EVENT. Otherwise, the function enables the GPIO sense mechanism.
- * Note that a PORT event is shared between multiple pins, therefore the
- * interrupt is always enabled.
+ * The PORT event is shared between multiple pins, therefore the interrupt is always enabled.
*
* @param[in] pin Pin.
* @param[in] int_enable True to enable the interrupt. Always valid for a high-accuracy pin.
@@ -355,8 +374,8 @@
*
* @param[in] pin Pin.
*
- * @retval true If the input pin is set.
- * @retval false If the input pin is not set.
+ * @retval true The input pin is set.
+ * @retval false The input pin is not set.
*/
bool nrfx_gpiote_in_is_set(nrfx_gpiote_pin_t pin);
@@ -365,6 +384,8 @@
* @details If the pin is configured to use low-accuracy mode, the address of the PORT event is returned.
*
* @param[in] pin Pin.
+ *
+ * @return Address of the specified input pin event.
*/
uint32_t nrfx_gpiote_in_event_addr_get(nrfx_gpiote_pin_t pin);
@@ -401,12 +422,12 @@
void nrfx_gpiote_clr_task_trigger(nrfx_gpiote_pin_t pin);
#endif // defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__NRFX_DOXYGEN__)
+/** @} */
+
void nrfx_gpiote_irq_handler(void);
-/** @} */
-
#ifdef __cplusplus
}
#endif
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_i2s.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_i2s.h
index 2c4bf96..24acbdc 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_i2s.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_i2s.h
@@ -82,13 +82,11 @@
/** @brief I2S driver buffers structure. */
typedef struct
{
- uint32_t * p_rx_buffer;
- uint32_t const * p_tx_buffer;
+ uint32_t * p_rx_buffer; ///< Pointer to the buffer for received data.
+ uint32_t const * p_tx_buffer; ///< Pointer to the buffer with data to be sent.
} nrfx_i2s_buffers_t;
-/**
- * @brief I2S driver default configuration.
- */
+/** @brief I2S driver default configuration. */
#define NRFX_I2S_DEFAULT_CONFIG \
{ \
.sck_pin = NRFX_I2S_CONFIG_SCK_PIN, \
@@ -108,28 +106,28 @@
#define NRFX_I2S_STATUS_NEXT_BUFFERS_NEEDED (1UL << 0)
- /**< The application should provide buffers that are to be used in the next
- * part of the transfer. A call to @ref nrfx_i2s_next_buffers_set should
+ /**< The application must provide buffers that are to be used in the next
+ * part of the transfer. A call to @ref nrfx_i2s_next_buffers_set must
* be done before the currently used buffers are completely processed
- * (i.e. the time remaining for supplying the next buffers depends on
+ * (that is, the time remaining for supplying the next buffers depends on
* the used size of the buffers). */
/**
* @brief I2S driver data handler type.
*
- * A data handling function of this type must be specified during initialization
+ * A data handling function of this type must be specified during the initialization
* of the driver. The driver will call this function when it finishes using
* buffers passed to it by the application, and when it needs to be provided
* with buffers for the next part of the transfer.
*
* @note The @c p_released pointer passed to this function is temporary and
* will be invalid after the function returns, hence it cannot be stored
- * and used later. If needed, the pointed content (i.e. buffers pointers)
- * should be copied instead.
+ * and used later. If needed, the pointed content (that is, buffers pointers)
+ * must be copied instead.
*
* @param[in] p_released Pointer to a structure with pointers to buffers
* passed previously to the driver that will no longer
- * be access by it (they can be now safely released or
+ * be accessed by it (they can be now safely released or
* used for another purpose, in particular for a next
* part of the transfer).
* This pointer will be NULL if the application did not
@@ -158,13 +156,13 @@
/**
* @brief Function for initializing the I2S driver.
*
- * @param[in] p_config Pointer to the structure with initial configuration.
- * @param[in] handler Data handler provided by the user. Must not be NULL.
+ * @param[in] p_config Pointer to the structure with the initial configuration.
+ * @param[in] handler Data handler provided by the user. Must not be NULL.
*
- * @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_INVALID_STATE If the driver was already initialized.
- * @retval NRFX_ERROR_INVALID_PARAM If the requested combination of configuration
- * options is not allowed by the I2S peripheral.
+ * @retval NRFX_SUCCESS Initialization was successful.
+ * @retval NRFX_ERROR_INVALID_STATE The driver was already initialized.
+ * @retval NRFX_ERROR_INVALID_PARAM The requested combination of configuration
+ * options is not allowed by the I2S peripheral.
*/
nrfx_err_t nrfx_i2s_init(nrfx_i2s_config_t const * p_config,
nrfx_i2s_data_handler_t handler);
@@ -179,7 +177,7 @@
* only, TX (transmission) only, or in both directions simultaneously.
* The mode is selected by specifying a proper buffer for a given direction
* in the call to this function or by passing NULL instead if this direction
- * should be disabled.
+ * is to be disabled.
*
* The length of the buffer (which is a common value for RX and TX if both
* directions are enabled) is specified in 32-bit words. One 32-bit memory
@@ -192,20 +190,20 @@
* to be placed in the Data RAM region. If this condition is not met,
* this function will fail with the error code NRFX_ERROR_INVALID_ADDR.
*
- * @param[in] p_initial_buffers Pointer to a structure specifying the buffers
- * to be used in the initial part of the transfer
- * (buffers for all consecutive parts are provided
- * through the data handler).
- * @param[in] buffer_size Size of the buffers (in 32-bit words).
- * Must not be 0.
- * @param[in] flags Transfer options (0 for default settings).
- * Currently, no additional flags are available.
+ * @param[in] p_initial_buffers Pointer to a structure specifying the buffers
+ * to be used in the initial part of the transfer
+ * (buffers for all consecutive parts are provided
+ * through the data handler).
+ * @param[in] buffer_size Size of the buffers (in 32-bit words).
+ * Must not be 0.
+ * @param[in] flags Transfer options (0 for default settings).
+ * Currently, no additional flags are available.
*
- * @retval NRFX_SUCCESS If the operation was successful.
- * @retval NRFX_ERROR_INVALID_STATE If a transfer was already started or
- * the driver has not been initialized.
- * @retval NRFX_ERROR_INVALID_ADDR If the provided buffers are not placed
- * in the Data RAM region.
+ * @retval NRFX_SUCCESS The operation was successful.
+ * @retval NRFX_ERROR_INVALID_STATE Transfer was already started or
+ * the driver has not been initialized.
+ * @retval NRFX_ERROR_INVALID_ADDR The provided buffers are not placed
+ * in the Data RAM region.
*/
nrfx_err_t nrfx_i2s_start(nrfx_i2s_buffers_t const * p_initial_buffers,
uint16_t buffer_size,
@@ -215,7 +213,7 @@
* @brief Function for supplying the buffers to be used in the next part of
* the transfer.
*
- * The application should call this function when the data handler receives
+ * The application must call this function when the data handler receives
* @ref NRFX_I2S_STATUS_NEXT_BUFFERS_NEEDED in the @c status parameter.
* The call can be done immediately from the data handler function or later,
* but it has to be done before the I2S peripheral finishes processing the
@@ -223,9 +221,9 @@
*
* @sa nrfx_i2s_data_handler_t
*
- * @retval NRFX_SUCCESS If the operation was successful.
- * @retval NRFX_ERROR_INVALID_STATE If the buffers were already supplied or
- * the peripheral is currently being stopped.
+ * @retval NRFX_SUCCESS If the operation was successful.
+ * @retval NRFX_ERROR_INVALID_STATE If the buffers were already supplied or
+ * the peripheral is currently being stopped.
*/
nrfx_err_t nrfx_i2s_next_buffers_set(nrfx_i2s_buffers_t const * p_buffers);
@@ -243,3 +241,4 @@
#endif
#endif // NRFX_I2S_H__
+
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_lpcomp.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_lpcomp.h
index 1f4a4a0..f68ef1f 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_lpcomp.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_lpcomp.h
@@ -48,7 +48,7 @@
/**
* @brief LPCOMP event handler function type.
- * @param[in] event LPCOMP event.
+ * @param[in] event LPCOMP event.
*/
typedef void (* nrfx_lpcomp_event_handler_t)(nrf_lpcomp_event_t event);
@@ -60,24 +60,24 @@
uint8_t interrupt_priority; /**< LPCOMP interrupt priority. */
} nrfx_lpcomp_config_t;
-/** @brief LPCOMP driver default configuration including the LPCOMP HAL configuration. */
+/** @brief LPCOMP driver default configuration, including the LPCOMP HAL configuration. */
#ifdef NRF52_SERIES
-#define NRFX_LPCOMP_DEFAULT_CONFIG \
- { \
- .hal = { (nrf_lpcomp_ref_t)NRFX_LPCOMP_CONFIG_REFERENCE , \
- (nrf_lpcomp_detect_t)NRFX_LPCOMP_CONFIG_DETECTION, \
- (nrf_lpcomp_hysteresis_t)NRFX_LPCOMP_CONFIG_HYST }, \
- .input = (nrf_lpcomp_input_t)NRFX_LPCOMP_CONFIG_INPUT, \
- .interrupt_priority = NRFX_LPCOMP_CONFIG_IRQ_PRIORITY \
- }
+#define NRFX_LPCOMP_DEFAULT_CONFIG \
+{ \
+ .hal = { (nrf_lpcomp_ref_t)NRFX_LPCOMP_CONFIG_REFERENCE , \
+ (nrf_lpcomp_detect_t)NRFX_LPCOMP_CONFIG_DETECTION, \
+ (nrf_lpcomp_hysteresis_t)NRFX_LPCOMP_CONFIG_HYST }, \
+ .input = (nrf_lpcomp_input_t)NRFX_LPCOMP_CONFIG_INPUT, \
+ .interrupt_priority = NRFX_LPCOMP_CONFIG_IRQ_PRIORITY \
+}
#else
-#define NRFX_LPCOMP_DEFAULT_CONFIG \
- { \
- .hal = { (nrf_lpcomp_ref_t)NRFX_LPCOMP_CONFIG_REFERENCE , \
- (nrf_lpcomp_detect_t)NRFX_LPCOMP_CONFIG_DETECTION }, \
- .input = (nrf_lpcomp_input_t)NRFX_LPCOMP_CONFIG_INPUT, \
- .interrupt_priority = NRFX_LPCOMP_CONFIG_IRQ_PRIORITY \
- }
+#define NRFX_LPCOMP_DEFAULT_CONFIG \
+{ \
+ .hal = { (nrf_lpcomp_ref_t)NRFX_LPCOMP_CONFIG_REFERENCE , \
+ (nrf_lpcomp_detect_t)NRFX_LPCOMP_CONFIG_DETECTION }, \
+ .input = (nrf_lpcomp_input_t)NRFX_LPCOMP_CONFIG_INPUT, \
+ .interrupt_priority = NRFX_LPCOMP_CONFIG_IRQ_PRIORITY \
+}
#endif
/**
@@ -86,13 +86,13 @@
* This function initializes the LPCOMP driver, but does not enable the peripheral or any interrupts.
* To start the driver, call the function nrfx_lpcomp_enable() after initialization.
*
- * @param[in] p_config Pointer to the structure with initial configuration.
+ * @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] event_handler Event handler provided by the user.
* Must not be NULL.
*
- * @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_INVALID_STATE If the driver has already been initialized.
- * @retval NRFX_ERROR_BUSY If the COMP peripheral is already in use.
+ * @retval NRFX_SUCCESS Initialization was successful.
+ * @retval NRFX_ERROR_INVALID_STATE The driver has already been initialized.
+ * @retval NRFX_ERROR_BUSY The COMP peripheral is already in use.
* This is possible only if @ref nrfx_prs module
* is enabled.
*/
@@ -100,39 +100,42 @@
nrfx_lpcomp_event_handler_t event_handler);
/**
- * @brief Function for uninitializing the LCOMP driver.
+ * @brief Function for uninitializing the LCOMP driver.
*
- * This function uninitializes the LPCOMP driver. The LPCOMP peripheral and
- * its interrupts are disabled, and local variables are cleaned. After this call, you must
- * initialize the driver again by calling nrfx_lpcomp_init() if you want to use it.
+ * This function uninitializes the LPCOMP driver. The LPCOMP peripheral and
+ * its interrupts are disabled, and local variables are cleaned. After this call, you must
+ * initialize the driver again by calling nrfx_lpcomp_init() if you want to use it.
*
- * @sa nrfx_lpcomp_disable()
- * @sa nrfx_lpcomp_init()
+ * @sa nrfx_lpcomp_disable
+ * @sa nrfx_lpcomp_init
*/
void nrfx_lpcomp_uninit(void);
-/**@brief Function for enabling the LPCOMP peripheral and interrupts.
+/**
+ * @brief Function for enabling the LPCOMP peripheral and interrupts.
*
* Before calling this function, the driver must be initialized. This function
* enables the LPCOMP peripheral and its interrupts.
*
- * @sa nrfx_lpcomp_disable()
+ * @sa nrfx_lpcomp_disable
*/
void nrfx_lpcomp_enable(void);
-/**@brief Function for disabling the LPCOMP peripheral.
+/**
+ * @brief Function for disabling the LPCOMP peripheral.
*
* Before calling this function, the driver must be initialized. This function disables the LPCOMP
* peripheral and its interrupts.
*
- * @sa nrfx_lpcomp_enable()
+ * @sa nrfx_lpcomp_enable
*/
void nrfx_lpcomp_disable(void);
+/** @} */
+
void nrfx_lpcomp_irq_handler(void);
-/** @} **/
#ifdef __cplusplus
}
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_nfct.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_nfct.h
index c90ca3d..2bfa882 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_nfct.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_nfct.h
@@ -52,9 +52,7 @@
#define NRFX_NFCT_NFCID1_DEFAULT_LEN NRFX_NFCT_NFCID1_DOUBLE_SIZE ///< Default length of NFC ID. */
-/**
- * @brief NFCT hardware states.
- */
+/** @brief NFCT hardware states. */
typedef enum
{
NRFX_NFCT_STATE_DISABLED = NRF_NFCT_TASK_DISABLE, ///< NFC Tag is disabled (no sensing of an external NFC field).
@@ -74,7 +72,7 @@
NRFX_NFCT_ACTIVE_STATE_DEFAULT, ///< NFC Tag is either sleeping or idle, depending on the previous state before being selected by a poller.
} nrfx_nfct_active_state_t;
-/**
+/**
* @brief NFCT driver event types, passed to the upper-layer callback function
* provided during the initialization.
*/
@@ -90,18 +88,14 @@
NRFX_NFCT_EVT_ERROR = NRF_NFCT_INT_ERROR_MASK, ///< Error occurred in an NFC communication.
} nrfx_nfct_evt_id_t;
-/**
- * @brief NFCT timing-related error types.
- */
+/** @brief NFCT timing-related error types. */
typedef enum
{
NRFX_NFCT_ERROR_FRAMEDELAYTIMEOUT, ///< No response frame was transmitted to the poller in the transmit window.
NRFX_NFCT_ERROR_NUM, ///< Total number of possible errors.
} nrfx_nfct_error_t;
-/**
- * @brief NFCT driver parameter types.
- */
+/** @brief NFCT driver parameter types. */
typedef enum
{
NRFX_NFCT_PARAM_ID_FDT, ///< NFC-A Frame Delay Time parameter.
@@ -109,18 +103,14 @@
NRFX_NFCT_PARAM_ID_NFCID1, ///< NFC-A NFCID1 setting (NFC tag identifier).
} nrfx_nfct_param_id_t;
-/**
- * @brief NFCID1 descriptor.
- */
+/** @brief NFCID1 descriptor. */
typedef struct
{
uint8_t const * p_id; ///< NFCID1 data.
uint8_t id_size; ///< NFCID1 size.
} nrfx_nfct_nfcid1_t;
-/**
- * @brief NFCT driver parameter descriptor.
- */
+/** @brief NFCT driver parameter descriptor. */
typedef struct
{
nrfx_nfct_param_id_t id; ///< Type of parameter.
@@ -129,46 +119,36 @@
uint32_t fdt; ///< NFC-A Frame Delay Time. Filled when nrfx_nfct_param_t::id is @ref NRFX_NFCT_PARAM_ID_FDT.
uint8_t sel_res_protocol; ///< NFC-A value of the 'Protocol' field in the SEL_RES frame. Filled when nrfx_nfct_param_t::id is @ref NRFX_NFCT_PARAM_ID_SEL_RES.
nrfx_nfct_nfcid1_t nfcid1; ///< NFC-A NFCID1 value (tag identifier). Filled when nrfx_nfct_param_t::id is @ref NRFX_NFCT_PARAM_ID_NFCID1.
- } data;
+ } data; ///< Union to store parameter data.
} nrfx_nfct_param_t;
-/**
- * @brief NFCT driver RX/TX buffer descriptor.
- */
+/** @brief NFCT driver RX/TX buffer descriptor. */
typedef struct
{
uint32_t data_size; ///< RX/TX buffer size.
uint8_t const * p_data; ///< RX/TX buffer.
} nrfx_nfct_data_desc_t;
-/**
- * @brief Structure used to describe the @ref NRFX_NFCT_EVT_RX_FRAMEEND event type.
- */
+/** @brief Structure used to describe the @ref NRFX_NFCT_EVT_RX_FRAMEEND event type. */
typedef struct
{
uint32_t rx_status; ///< RX error status.
nrfx_nfct_data_desc_t rx_data; ///< RX buffer.
} nrfx_nfct_evt_rx_frameend_t;
-/**
- * @brief Structure used to describe the @ref NRFX_NFCT_EVT_TX_FRAMESTART event type.
- */
+/** @brief Structure used to describe the @ref NRFX_NFCT_EVT_TX_FRAMESTART event type. */
typedef struct
{
nrfx_nfct_data_desc_t tx_data; ///< TX buffer.
} nrfx_nfct_evt_tx_framestart_t;
-/**
- * @brief Structure used to describe the @ref NRFX_NFCT_EVT_ERROR event type.
- */
+/** @brief Structure used to describe the @ref NRFX_NFCT_EVT_ERROR event type. */
typedef struct
{
nrfx_nfct_error_t reason; ///< Reason for error.
} nrfx_nfct_evt_error_t;
-/**
- * @brief NFCT driver event.
- */
+/** @brief NFCT driver event. */
typedef struct
{
nrfx_nfct_evt_id_t evt_id; ///< Type of event.
@@ -177,32 +157,30 @@
nrfx_nfct_evt_rx_frameend_t rx_frameend; ///< End of the RX frame data. Filled when nrfx_nfct_evt_t::evt_id is @ref NRFX_NFCT_EVT_RX_FRAMEEND.
nrfx_nfct_evt_tx_framestart_t tx_framestart; ///< Start of the TX frame data. Filled when nrfx_nfct_evt_t::evt_id is @ref NRFX_NFCT_EVT_TX_FRAMESTART.
nrfx_nfct_evt_error_t error; ///< Error data. Filled when nrfx_nfct_evt_t::evt_id is @ref NRFX_NFCT_EVT_ERROR.
- } params;
+ } params; ///< Union to store event data.
} nrfx_nfct_evt_t;
-/**
+/**
* @brief Callback descriptor to pass events from the NFCT driver to the upper layer.
*
* @param[in] p_event Pointer to the event descriptor.
*/
typedef void (*nrfx_nfct_handler_t)(nrfx_nfct_evt_t const * p_event);
-/**
- * @brief NFCT driver configuration structure.
- */
+/** @brief NFCT driver configuration structure. */
typedef struct
{
uint32_t rxtx_int_mask; ///< Mask for enabling RX/TX events. Indicate which events must be forwarded to the upper layer by using @ref nrfx_nfct_evt_id_t. By default, no events are enabled. */
nrfx_nfct_handler_t cb; ///< Callback.
} nrfx_nfct_config_t;
-/**
+/**
* @brief Function for initializing the NFCT driver.
*
* @param[in] p_config Pointer to the NFCT driver configuration structure.
*
- * @retval NRFX_SUCCESS If the NFCT driver was initialized successfully.
- * @retval NRFX_ERROR_INVALID_STATE If the NFCT driver is already initialized.
+ * @retval NRFX_SUCCESS The NFCT driver was initialized successfully.
+ * @retval NRFX_ERROR_INVALID_STATE The NFCT driver is already initialized.
*/
nrfx_err_t nrfx_nfct_init(nrfx_nfct_config_t const * p_config);
@@ -231,26 +209,26 @@
/**
* @brief Function for checking whether the external NFC field is present in the range of the tag.
*
- * @retval true If the NFC field is present.
- * @retval false If no NFC field is present.
+ * @retval true The NFC field is present.
+ * @retval false No NFC field is present.
*/
bool nrfx_nfct_field_check(void);
-/**
+/**
* @brief Function for preparing the NFCT driver for receiving an NFC frame.
*
* @param[in] p_rx_data Pointer to the RX buffer.
*/
void nrfx_nfct_rx(nrfx_nfct_data_desc_t const * p_rx_data);
-/**
+/**
* @brief Function for transmitting an NFC frame.
*
* @param[in] p_tx_data Pointer to the TX buffer.
* @param[in] delay_mode Delay mode of the NFCT frame timer.
*
- * @retval NRFX_SUCCESS If the operation was successful.
- * @retval NRFX_ERROR_INVALID_LENGTH If the TX buffer size is invalid.
+ * @retval NRFX_SUCCESS The operation was successful.
+ * @retval NRFX_ERROR_INVALID_LENGTH The TX buffer size is invalid.
*/
nrfx_err_t nrfx_nfct_tx(nrfx_nfct_data_desc_t const * p_tx_data,
nrf_nfct_frame_delay_mode_t delay_mode);
@@ -265,7 +243,7 @@
*/
void nrfx_nfct_state_force(nrfx_nfct_state_t state);
-/**
+/**
* @brief Function for moving the NFCT to a new initial substate within @ref NRFX_NFCT_STATE_ACTIVATED.
*
* @param[in] sub_state The required substate.
@@ -279,12 +257,12 @@
*
* @param[in] p_param Pointer to parameter descriptor.
*
- * @retval NRFX_SUCCESS If the operation was successful.
- * @retval NRFX_ERROR_INVALID_PARAM If the parameter data is invalid.
+ * @retval NRFX_SUCCESS The operation was successful.
+ * @retval NRFX_ERROR_INVALID_PARAM The parameter data is invalid.
*/
nrfx_err_t nrfx_nfct_parameter_set(nrfx_nfct_param_t const * p_param);
-/**
+/**
* @brief Function for getting default bytes for NFCID1.
*
* @param[in,out] p_nfcid1_buff In: empty buffer for data;
@@ -292,8 +270,8 @@
* can be used to fill the Type 2 Tag Internal Bytes.
* @param[in] nfcid1_buff_len Length of the NFCID1 buffer.
*
- * @retval NRFX_SUCCESS If the operation was successful.
- * @retval NRFX_ERROR_INVALID_LENGTH If length of the NFCID buffer is different than
+ * @retval NRFX_SUCCESS The operation was successful.
+ * @retval NRFX_ERROR_INVALID_LENGTH Length of the NFCID buffer is different than
* @ref NRFX_NFCT_NFCID1_SINGLE_SIZE,
* @ref NRFX_NFCT_NFCID1_DOUBLE_SIZE, or
* @ref NRFX_NFCT_NFCID1_TRIPLE_SIZE.
@@ -301,7 +279,7 @@
nrfx_err_t nrfx_nfct_nfcid1_default_bytes_get(uint8_t * const p_nfcid1_buff,
uint32_t nfcid1_buff_len);
-/**
+/**
* @brief Function for enabling the automatic collision resolution.
*
* @details As defined by the NFC Forum Digital Protocol Technical Specification (and ISO 14443-3),
@@ -310,19 +288,19 @@
*/
void nrfx_nfct_autocolres_enable(void);
-/**
+/**
* @brief Function for disabling the automatic collision resolution.
*
* @details See also details in @ref nrfx_nfct_autocolres_enable.
*/
void nrfx_nfct_autocolres_disable(void);
+/** @} */
+
void nrfx_nfct_irq_handler(void);
-/** @} */
-
#ifdef __cplusplus
}
#endif
@@ -338,7 +316,7 @@
* - 79. NFCT: A false EVENTS_FIELDDETECTED event occurs after the field is lost.
* - 116. NFCT does not release HFCLK when switching from ACTIVATED to SENSE mode.
* To implement the first workaround, an instance of NRF_TIMER is used. After the NFC field is detected,
- * the timing module periodically polls its state to determine when the field is turned off.
+ * the timing module periodically polls its state to determine when the field is turned off.
* To implement the second workaround, power reset is used to release the clock acquired by NFCT
* after the field is turned off. Note that the NFCT register configuration is restored to defaults.
*
@@ -358,7 +336,7 @@
* The application of the implemented workarounds for the nRF52840 chip is determined at runtime and depends
* on the chip variant.
*
- * The current code contains a patch for the anomaly 25 (NFCT: Reset value of
+ * The current code contains a patch for the anomaly 25 (NFCT: Reset value of
* SENSRES register is incorrect), so that the module now works on Windows Phone.
* @}
*/
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_nvmc.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_nvmc.h
new file mode 100644
index 0000000..39e9bb4
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_nvmc.h
@@ -0,0 +1,286 @@
+/*
+ * Copyright (c) 2019, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef NRFX_NVMC_H__
+#define NRFX_NVMC_H__
+
+#include <nrfx.h>
+#include <hal/nrf_nvmc.h>
+#include <hal/nrf_ficr.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup nrfx_nvmc NVMC driver
+ * @{
+ * @ingroup nrf_nvmc
+ * @brief Non-Volatile Memory Controller (NVMC) peripheral driver.
+ */
+
+/**
+ * @brief Function for erasing a page in flash.
+ *
+ * This function blocks until the erase operation finishes.
+ *
+ * @note Depending on the source of the code being executed,
+ * the CPU may be halted during the operation.
+ * Refer to the Product Specification for more information.
+ *
+ * @param address Address of the first word in the page to erase.
+ *
+ * @retval NRFX_SUCCESS Page erase complete.
+ * @retval NRFX_ERROR_INVALID_ADDR Address is not aligned to the size of the page.
+ */
+nrfx_err_t nrfx_nvmc_page_erase(uint32_t address);
+
+/**
+ * @brief Function for erasing the user information configuration register (UICR).
+ *
+ * @note Depending on the source of the code being executed,
+ * the CPU may be halted during the operation.
+ * Refer to the Product Specification for more information.
+ *
+ * @retval NRFX_SUCCESS UICR has been successfully erased.
+ * @retval NRFX_ERROR_NOT_SUPPORTED UICR erase is not supported.
+ */
+nrfx_err_t nrfx_nvmc_uicr_erase(void);
+
+/**
+ * @brief Function for erasing the whole flash memory.
+ *
+ * @note All user code and UICR will be erased.
+ */
+void nrfx_nvmc_all_erase(void);
+
+#if defined(NRF_NVMC_PARTIAL_ERASE_PRESENT)
+/**
+ * @brief Function for initiating a complete page erase split into parts (also known as partial erase).
+ *
+ * This function initiates a partial erase with the specified duration.
+ * To execute each part of the partial erase, use @ref nrfx_nvmc_page_partial_erase_continue.
+ *
+ * @param address Address of the first word in the page to erase.
+ * @param duration_ms Time in milliseconds that each partial erase will take.
+ *
+ * @retval NRFX_SUCCESS Partial erase started.
+ * @retval NRFX_ERROR_INVALID_ADDR Address is not aligned to the size of the page.
+ *
+ * @sa nrfx_nvmc_page_partial_erase_continue()
+ */
+nrfx_err_t nrfx_nvmc_page_partial_erase_init(uint32_t address, uint32_t duration_ms);
+
+/**
+ * @brief Function for performing a part of the complete page erase (also known as partial erase).
+ *
+ * This function must be called several times to erase the whole page, once for each erase part.
+ *
+ * @note The actual time needed to perform each part of the page erase is longer than the partial
+ * erase duration specified in the call to @ref nrfx_nvmc_page_partial_erase_init,
+ * since the NVMC peripheral needs certain additional amount of time to handle the process.
+ * For details regarding this additional time, see the "Electrical specification" section
+ * for the NVMC peripheral in the Product Specification.
+ *
+ * @note Using a page that was not completely erased leads to undefined behavior.
+ * Depending on the source of the code being executed,
+ * the CPU may be halted during the operation.
+ * Refer to the Product Specification for more information.
+ *
+ * @retval true Partial erase finished.
+ * @retval false Partial erase not finished.
+ * Call the function again to process the next part.
+ */
+bool nrfx_nvmc_page_partial_erase_continue(void);
+
+#endif // defined(NRF_NVMC_PARTIAL_ERASE_PRESENT)
+
+/**
+ * @brief Function for checking whether a byte is writable at the specified address.
+ *
+ * The NVMC is only able to write '0' to bits in the flash that are erased (set to '1').
+ * It cannot rewrite a bit back to '1'. This function checks if the value currently
+ * residing at the specified address can be transformed to the desired value
+ * without any '0' to '1' transitions.
+ *
+ * @param address Address to be checked.
+ * @param value Value to be checked.
+ *
+ * @retval true Byte can be written at the specified address.
+ * @retval false Byte cannot be written at the specified address.
+ * Erase the page or change the address.
+ */
+bool nrfx_nvmc_byte_writable_check(uint32_t address, uint8_t value);
+
+/**
+ * @brief Function for writing a single byte to flash.
+ *
+ * To determine if the flash write has been completed, use @ref nrfx_nvmc_write_done_check().
+ *
+ * @note Depending on the source of the code being executed,
+ * the CPU may be halted during the operation.
+ * Refer to the Product Specification for more information.
+ *
+ * @param address Address to write to.
+ * @param value Value to write.
+ */
+void nrfx_nvmc_byte_write(uint32_t address, uint8_t value);
+
+/**
+ * @brief Function for checking whether a word is writable at the specified address.
+ *
+ * The NVMC is only able to write '0' to bits in the Flash that are erased (set to '1').
+ * It cannot rewrite a bit back to '1'. This function checks if the value currently
+ * residing at the specified address can be transformed to the desired value
+ * without any '0' to '1' transitions.
+ *
+ * @param address Address to be checked. Must be word-aligned.
+ * @param value Value to be checked.
+ *
+ * @retval true Word can be written at the specified address.
+ * @retval false Word cannot be written at the specified address.
+ * Erase page or change address.
+ */
+bool nrfx_nvmc_word_writable_check(uint32_t address, uint32_t value);
+
+/**
+ * @brief Function for writing a 32-bit word to flash.
+ *
+ * To determine if the flash write has been completed, use @ref nrfx_nvmc_write_done_check().
+ *
+ * @note Depending on the source of the code being executed,
+ * the CPU may be halted during the operation.
+ * Refer to the Product Specification for more information.
+ *
+ * @param address Address to write to. Must be word-aligned.
+ * @param value Value to write.
+ */
+void nrfx_nvmc_word_write(uint32_t address, uint32_t value);
+
+/**
+ * @brief Function for writing consecutive bytes to flash.
+ *
+ * To determine if the last flash write has been completed, use @ref nrfx_nvmc_write_done_check().
+ *
+ * @note Depending on the source of the code being executed,
+ * the CPU may be halted during the operation.
+ * Refer to the Product Specification for more information.
+ *
+ * @param address Address to write to.
+ * @param src Pointer to the data to copy from.
+ * @param num_bytes Number of bytes to write.
+ */
+void nrfx_nvmc_bytes_write(uint32_t address, void const * src, uint32_t num_bytes);
+
+/**
+ * @brief Function for writing consecutive words to flash.
+ *
+ * To determine if the last flash write has been completed, use @ref nrfx_nvmc_write_done_check().
+ *
+ * @note Depending on the source of the code being executed,
+ * the CPU may be halted during the operation.
+ * Refer to the Product Specification for more information.
+ *
+ * @param address Address to write to. Must be word-aligned.
+ * @param src Pointer to data to copy from. Must be word-aligned.
+ * @param num_words Number of words to write.
+ */
+void nrfx_nvmc_words_write(uint32_t address, void const * src, uint32_t num_words);
+
+/**
+ * @brief Function for getting the total flash size in bytes.
+ *
+ * @return Flash total size in bytes.
+ */
+uint32_t nrfx_nvmc_flash_size_get(void);
+
+/**
+ * @brief Function for getting the flash page size in bytes.
+ *
+ * @return Flash page size in bytes.
+ */
+uint32_t nrfx_nvmc_flash_page_size_get(void);
+
+/**
+ * @brief Function for getting the flash page count.
+ *
+ * @return Flash page count.
+ */
+uint32_t nrfx_nvmc_flash_page_count_get(void);
+
+/**
+ * @brief Function for checking if the last flash write has been completed.
+ *
+ * @retval true Last write completed successfully.
+ * @retval false Last write is still in progress.
+ */
+__STATIC_INLINE bool nrfx_nvmc_write_done_check(void);
+
+#if defined(NRF_NVMC_ICACHE_PRESENT)
+/**
+ * @brief Function for enabling the Instruction Cache (ICache).
+ *
+ * Enabling ICache reduces the amount of accesses to flash memory,
+ * which can boost performance and lower power consumption.
+ */
+__STATIC_INLINE void nrfx_nvmc_icache_enable(void);
+
+/** @brief Function for disabling ICache. */
+__STATIC_INLINE void nrfx_nvmc_icache_disable(void);
+
+#endif // defined(NRF_NVMC_ICACHE_PRESENT)
+
+#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+__STATIC_INLINE bool nrfx_nvmc_write_done_check(void)
+{
+ return nrf_nvmc_ready_check(NRF_NVMC);
+}
+
+#if defined(NRF_NVMC_ICACHE_PRESENT)
+__STATIC_INLINE void nrfx_nvmc_icache_enable(void)
+{
+ nrf_nvmc_icache_config_set(NRF_NVMC, NRF_NVMC_ICACHE_ENABLE_WITH_PROFILING);
+}
+
+__STATIC_INLINE void nrfx_nvmc_icache_disable(void)
+{
+ nrf_nvmc_icache_config_set(NRF_NVMC, NRF_NVMC_ICACHE_DISABLE);
+}
+#endif // defined(NRF_NVMC_ICACHE_PRESENT)
+#endif // SUPPRESS_INLINE_IMPLEMENTATION
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // NRF_NVMC_H__
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_pdm.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_pdm.h
index d7896dd..1fc2ee7 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_pdm.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_pdm.h
@@ -46,32 +46,25 @@
* @brief Pulse Density Modulation (PDM) peripheral driver.
*/
-
+/** @brief Maximum supported PDM buffer size. */
#define NRFX_PDM_MAX_BUFFER_SIZE 32767
-
-/**
- * @brief PDM error type.
- */
+/** @brief PDM error type. */
typedef enum
{
- NRFX_PDM_NO_ERROR = 0,
- NRFX_PDM_ERROR_OVERFLOW = 1
+ NRFX_PDM_NO_ERROR = 0, ///< No error.
+ NRFX_PDM_ERROR_OVERFLOW = 1 ///< Overflow error.
} nrfx_pdm_error_t;
-/**
- * @brief PDM event structure.
- */
+/** @brief PDM event structure. */
typedef struct
{
- bool buffer_requested; ///< Buffer request flag.
- int16_t * buffer_released; ///< Pointer to the released buffer. Can be NULL.
- nrfx_pdm_error_t error; ///< Error type.
+ bool buffer_requested; ///< Buffer request flag.
+ int16_t * buffer_released; ///< Pointer to the released buffer. Can be NULL.
+ nrfx_pdm_error_t error; ///< Error type.
} nrfx_pdm_evt_t;
-/**
- * @brief PDM interface driver configuration structure.
- */
+/** @brief PDM interface driver configuration structure. */
typedef struct
{
nrf_pdm_mode_t mode; ///< Interface operation mode.
@@ -86,7 +79,7 @@
/**
* @brief Macro for setting @ref nrfx_pdm_config_t to default settings
- * in single ended mode.
+ * in the single-ended mode.
*
* @param _pin_clk CLK output pin.
* @param _pin_din DIN input pin.
@@ -104,7 +97,7 @@
}
/**
- * @brief Handler for PDM interface ready events.
+ * @brief Handler for the PDM interface ready events.
*
* This event handler is called on a buffer request, an error or when a buffer
* is full and ready to be processed.
@@ -117,12 +110,12 @@
/**
* @brief Function for initializing the PDM interface.
*
- * @param[in] p_config Pointer to the structure with initial configuration.
+ * @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] event_handler Event handler provided by the user. Cannot be NULL.
*
- * @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_INVALID_STATE If the driver is already initialized.
- * @retval NRFX_ERROR_INVALID_PARAM If invalid configuration was specified.
+ * @retval NRFX_SUCCESS Initialization was successful.
+ * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized.
+ * @retval NRFX_ERROR_INVALID_PARAM Invalid configuration was specified.
*/
nrfx_err_t nrfx_pdm_init(nrfx_pdm_config_t const * p_config,
nrfx_pdm_event_handler_t event_handler);
@@ -137,9 +130,9 @@
/**
* @brief Function for getting the address of a PDM interface task.
*
- * @param[in] task Task.
+ * @param[in] task Task.
*
- * @return Task address.
+ * @return Task address.
*/
__STATIC_INLINE uint32_t nrfx_pdm_task_address_get(nrf_pdm_task_t task)
{
@@ -149,8 +142,8 @@
/**
* @brief Function for getting the state of the PDM interface.
*
- * @retval true If the PDM interface is enabled.
- * @retval false If the PDM interface is disabled.
+ * @retval true The PDM interface is enabled.
+ * @retval false The PDM interface is disabled.
*/
__STATIC_INLINE bool nrfx_pdm_enable_check(void)
{
@@ -158,46 +151,46 @@
}
/**
- * @brief Function for starting PDM sampling.
+ * @brief Function for starting the PDM sampling.
*
- * @retval NRFX_SUCCESS If sampling was started successfully or was already in progress.
- * @retval NRFX_ERROR_BUSY If a previous start/stop operation is in progress.
+ * @retval NRFX_SUCCESS Sampling was started successfully or was already in progress.
+ * @retval NRFX_ERROR_BUSY Previous start/stop operation is in progress.
*/
nrfx_err_t nrfx_pdm_start(void);
/**
- * @brief Function for stopping PDM sampling.
+ * @brief Function for stopping the PDM sampling.
*
* When this function is called, the PDM interface is stopped after finishing
* the current frame.
* The event handler function might be called once more after calling this function.
*
- * @retval NRFX_SUCCESS If sampling was stopped successfully or was already stopped before.
- * @retval NRFX_ERROR_BUSY If a previous start/stop operation is in progress.
+ * @retval NRFX_SUCCESS Sampling was stopped successfully or was already stopped before.
+ * @retval NRFX_ERROR_BUSY Previous start/stop operation is in progress.
*/
nrfx_err_t nrfx_pdm_stop(void);
/**
- * @brief Function for supplying the sample buffer.
+ * @brief Function for supplying the sample buffer.
*
* Call this function after every buffer request event.
*
- * @param[in] buffer Pointer to the receive buffer. Cannot be NULL.
- * @param[in] buffer_length Length of the receive buffer in 16-bit words.
+ * @param[in] buffer Pointer to the receive buffer. Cannot be NULL.
+ * @param[in] buffer_length Length of the receive buffer in 16-bit words.
*
- * @retval NRFX_SUCCESS If the buffer was applied successfully.
- * @retval NRFX_ERROR_BUSY If the buffer was already supplied or the peripheral is currently being stopped.
- * @retval NRFX_ERROR_INVALID_STATE If the driver was not initialized.
- * @retval NRFX_ERROR_INVALID_PARAM If invalid parameters were provided.
+ * @retval NRFX_SUCCESS The buffer was applied successfully.
+ * @retval NRFX_ERROR_BUSY The buffer was already supplied or the peripheral is currently being stopped.
+ * @retval NRFX_ERROR_INVALID_STATE The driver was not initialized.
+ * @retval NRFX_ERROR_INVALID_PARAM Invalid parameters were provided.
*/
nrfx_err_t nrfx_pdm_buffer_set(int16_t * buffer, uint16_t buffer_length);
+/** @} */
+
void nrfx_pdm_irq_handler(void);
-/** @} */
-
#ifdef __cplusplus
}
#endif
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_power.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_power.h
index ba87f29..adb65de 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_power.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_power.h
@@ -92,26 +92,26 @@
*/
typedef enum
{
- NRFX_POWER_USB_STATE_DISCONNECTED, /**< No power on USB lines detected */
- NRFX_POWER_USB_STATE_CONNECTED, /**< The USB power is detected, but USB power regulator is not ready */
- NRFX_POWER_USB_STATE_READY /**< From the power point of view USB is ready for working */
+ NRFX_POWER_USB_STATE_DISCONNECTED, /**< No power on USB lines detected. */
+ NRFX_POWER_USB_STATE_CONNECTED, /**< The USB power is detected, but USB power regulator is not ready. */
+ NRFX_POWER_USB_STATE_READY /**< From the power viewpoint, USB is ready for working. */
}nrfx_power_usb_state_t;
#endif /* NRF_POWER_HAS_USBREG */
/**
* @name Callback types
*
- * Defined types of callback functions
+ * Defined types of callback functions.
* @{
*/
/**
- * @brief Event handler for power failure warning
+ * @brief Event handler for power failure warning.
*/
typedef void (*nrfx_power_pofwarn_event_handler_t)(void);
#if NRF_POWER_HAS_SLEEPEVT || defined(__NRFX_DOXYGEN__)
/**
- * @brief Event handler for entering/exiting sleep
+ * @brief Event handler for the sleep events.
*
* @param event Event type
*/
@@ -120,7 +120,7 @@
#if NRF_POWER_HAS_USBREG || defined(__NRFX_DOXYGEN__)
/**
- * @brief Event handler for USB related power events
+ * @brief Event handler for the USB-related power events.
*
* @param event Event type
*/
@@ -136,22 +136,22 @@
typedef struct
{
/**
- * @brief Enable main DCDC regulator
+ * @brief Enable main DCDC regulator.
*
* This bit only informs the driver that elements for DCDC regulator
- * are installed and regulator can be used.
- * The regulator would be enabled or disabled automatically
+ * are installed and the regulator can be used.
+ * The regulator will be enabled or disabled automatically
* by the hardware, basing on current power requirement.
*/
bool dcdcen:1;
#if NRF_POWER_HAS_VDDH || defined(__NRFX_DOXYGEN__)
/**
- * @brief Enable HV DCDC regulator
+ * @brief Enable HV DCDC regulator.
*
* This bit only informs the driver that elements for DCDC regulator
- * are installed and regulator can be used.
- * The regulator would be enabled or disabled automatically
+ * are installed and the regulator can be used.
+ * The regulator will be enabled or disabled automatically
* by the hardware, basing on current power requirement.
*/
bool dcdcenhv: 1;
@@ -159,44 +159,44 @@
}nrfx_power_config_t;
/**
- * @brief The configuration for power failure comparator
+ * @brief The configuration for power failure comparator.
*
- * Configuration used to enable and configure power failure comparator
+ * Configuration used to enable and configure the power failure comparator.
*/
typedef struct
{
- nrfx_power_pofwarn_event_handler_t handler; //!< Event handler
+ nrfx_power_pofwarn_event_handler_t handler; //!< Event handler.
#if NRF_POWER_HAS_POFCON || defined(__NRFX_DOXYGEN__)
nrf_power_pof_thr_t thr; //!< Threshold for power failure detection
#endif
#if NRF_POWER_HAS_VDDH || defined(__NRFX_DOXYGEN__)
- nrf_power_pof_thrvddh_t thrvddh; //!< Threshold for power failure detection on VDDH pin
+ nrf_power_pof_thrvddh_t thrvddh; //!< Threshold for power failure detection on the VDDH pin.
#endif
}nrfx_power_pofwarn_config_t;
#if NRF_POWER_HAS_SLEEPEVT || defined(__NRFX_DOXYGEN__)
/**
- * @brief The configuration of sleep event processing
+ * @brief The configuration of sleep event processing.
*
- * Configuration used to enable and configure sleep event handling
+ * Configuration used to enable and configure sleep event handling.
*/
typedef struct
{
- nrfx_power_sleep_event_handler_t handler; //!< Event handler
- bool en_enter:1; //!< Enable event on sleep entering
- bool en_exit :1; //!< Enable event on sleep exiting
+ nrfx_power_sleep_event_handler_t handler; //!< Event handler.
+ bool en_enter:1; //!< Enable event on sleep entering.
+ bool en_exit :1; //!< Enable event on sleep exiting.
}nrfx_power_sleepevt_config_t;
#endif
#if NRF_POWER_HAS_USBREG || defined(__NRFX_DOXYGEN__)
/**
- * @brief The configuration of USB related power events
+ * @brief The configuration of the USB-related power events.
*
- * Configuration used to enable and configure USB power event handling
+ * Configuration used to enable and configure USB power event handling.
*/
typedef struct
{
- nrfx_power_usb_event_handler_t handler; //!< Event processing
+ nrfx_power_usb_event_handler_t handler; //!< Event processing.
}nrfx_power_usbevt_config_t;
#endif /* NRF_POWER_HAS_USBREG */
@@ -215,11 +215,11 @@
#endif
/**
- * @brief Initialize power module driver
+ * @brief Function for initializing the power module driver.
*
- * Enabled power module driver would process all the interrupts from power system.
+ * Enabled power module driver processes all the interrupts from the power system.
*
- * @param[in] p_config Pointer to the structure with initial configuration.
+ * @param[in] p_config Pointer to the structure with the initial configuration.
*
* @retval NRFX_SUCCESS Successfully initialized.
* @retval NRFX_ERROR_ALREADY_INITIALIZED Module was already initialized.
@@ -227,7 +227,7 @@
nrfx_err_t nrfx_power_init(nrfx_power_config_t const * p_config);
/**
- * @brief Unintialize power module driver
+ * @brief Function for unintializing the power module driver.
*
* Disables all the interrupt handling in the module.
*
@@ -237,36 +237,36 @@
#if NRF_POWER_HAS_POFCON || defined(__NRFX_DOXYGEN__)
/**
- * @brief Initialize power failure comparator
+ * @brief Function for initializing the power failure comparator.
*
- * Configures the power failure comparator. This function does not setup and enable it.
- * Those steps can be done with functions @ref nrfx_power_pof_enable and @ref nrfx_power_pof_disable
- * or with Softdevice API (when Softdevice is using).
+ * Configures the power failure comparator. This function does not set it up and enable it.
+ * These steps can be done with functions @ref nrfx_power_pof_enable and @ref nrfx_power_pof_disable
+ * or with the SoftDevice API (when in use).
*
* @param[in] p_config Configuration with values and event handler.
- * If event handler is set to NULL, interrupt would be disabled.
+ * If event handler is set to NULL, the interrupt will be disabled.
*/
void nrfx_power_pof_init(nrfx_power_pofwarn_config_t const * p_config);
/**
- * @brief Enable power failure comparator
- * Sets and enables interrupt of the power failure comparator. This functions cannot be using
- * when Softdevice is enabled. If event handler set in init function is set to NULL, interrupt
- * would be disabled.
+ * @brief Function for enabling the power failure comparator.
+ * Sets and enables the interrupt of the power failure comparator. This function cannot be in use
+ * when SoftDevice is enabled. If the event handler set in the init function is set to NULL, the interrupt
+ * will be disabled.
*
* @param[in] p_config Configuration with values and event handler.
*/
void nrfx_power_pof_enable(nrfx_power_pofwarn_config_t const * p_config);
/**
- * @brief Disable the power failure comparator
+ * @brief Function for disabling the power failure comparator.
*
* Disables the power failure comparator interrupt.
*/
void nrfx_power_pof_disable(void);
/**
- * @brief Clear the power failure comparator settings
+ * @brief Function for clearing the power failure comparator settings.
*
* Clears the settings of the power failure comparator.
*/
@@ -275,9 +275,9 @@
#if NRF_POWER_HAS_SLEEPEVT || defined(__NRFX_DOXYGEN__)
/**
- * @brief Initialize sleep entering and exiting events processing
+ * @brief Function for initializing the processing of the sleep events.
*
- * Configures and setups the sleep event processing.
+ * Configures and sets up the sleep event processing.
*
* @param[in] p_config Configuration with values and event handler.
*
@@ -287,19 +287,17 @@
void nrfx_power_sleepevt_init(nrfx_power_sleepevt_config_t const * p_config);
/**
- * @brief Enable sleep entering and exiting events processing
+ * @brief Function for enabling the processing of the sleep events.
*
* @param[in] p_config Configuration with values and event handler.
*/
void nrfx_power_sleepevt_enable(nrfx_power_sleepevt_config_t const * p_config);
-/**
- * @brief Disable sleep entering and exiting events processing
- */
+/** @brief Function for disabling the processing of the sleep events. */
void nrfx_power_sleepevt_disable(void);
/**
- * @brief Uninitialize sleep entering and exiting events processing
+ * @brief Function for uninitializing the processing of the sleep events.
*
* @sa nrfx_power_sleepevt_init
*/
@@ -308,9 +306,9 @@
#if NRF_POWER_HAS_USBREG || defined(__NRFX_DOXYGEN__)
/**
- * @brief Initialize USB power event processing
+ * @brief Function for initializing the processing of USB power event.
*
- * Configures and setups the USB power event processing.
+ * Configures and sets up the USB power event processing.
*
* @param[in] p_config Configuration with values and event handler.
*
@@ -318,27 +316,23 @@
*/
void nrfx_power_usbevt_init(nrfx_power_usbevt_config_t const * p_config);
-/**
- * @brief Enable USB power event processing
- */
+/** @brief Function for enabling the processing of USB power event. */
void nrfx_power_usbevt_enable(void);
-/**
- * @brief Disable USB power event processing
- */
+/** @brief Function for disabling the processing of USB power event. */
void nrfx_power_usbevt_disable(void);
/**
- * @brief Uninitalize USB power event processing
+ * @brief Function for uninitalizing the processing of USB power event.
*
* @sa nrfx_power_usbevt_init
*/
void nrfx_power_usbevt_uninit(void);
/**
- * @brief Get the status of USB power
+ * @brief Function for getting the status of USB power.
*
- * @return Current USB power status
+ * @return Current USB power status.
*/
__STATIC_INLINE nrfx_power_usb_state_t nrfx_power_usbstatus_get(void);
@@ -364,12 +358,12 @@
#endif /* SUPPRESS_INLINE_IMPLEMENTATION */
+/** @} */
+
void nrfx_power_irq_handler(void);
-/** @} */
-
#ifdef __cplusplus
}
#endif
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_power_clock.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_power_clock.h
index 043b0e4..e188582 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_power_clock.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_power_clock.h
@@ -47,13 +47,15 @@
uint8_t priority;
#if NRFX_CHECK(NRFX_POWER_ENABLED) && NRFX_CHECK(NRFX_CLOCK_ENABLED)
#if NRFX_POWER_CONFIG_IRQ_PRIORITY != NRFX_CLOCK_CONFIG_IRQ_PRIORITY
- #error "IRQ priority for POWER and CLOCK have to be the same. Check <nrfx_config.h>."
+ #error "IRQ priorities for POWER and CLOCK must be the same. Check <nrfx_config.h>."
#endif
priority = NRFX_POWER_CONFIG_IRQ_PRIORITY;
#elif NRFX_CHECK(NRFX_POWER_ENABLED)
priority = NRFX_POWER_CONFIG_IRQ_PRIORITY;
#elif NRFX_CHECK(NRFX_CLOCK_ENABLED)
priority = NRFX_CLOCK_CONFIG_IRQ_PRIORITY;
+#else
+ #error "This code is not supposed to be compiled when neither POWER nor CLOCK is enabled."
#endif
if (!NRFX_IRQ_IS_ENABLED(nrfx_get_irq_number(NRF_CLOCK)))
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_ppi.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_ppi.h
index cbd2690..e2f22cd 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_ppi.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_ppi.h
@@ -46,23 +46,28 @@
extern "C" {
#endif
-#ifndef NRFX_PPI_CHANNELS_USED
+#if !defined (NRFX_PPI_CHANNELS_USED) || defined(__NRFX_DOXYGEN__)
+/** @brief Bitfield representing PPI channels used by external modules. */
#define NRFX_PPI_CHANNELS_USED 0
#endif
-#ifndef NRFX_PPI_GROUPS_USED
+#if !defined(NRFX_PPI_GROUPS_USED) || defined(__NRFX_DOXYGEN__)
+/** @brief Bitfield representing PPI groups used by external modules. */
#define NRFX_PPI_GROUPS_USED 0
#endif
-#if PPI_CH_NUM > 16
-#define NRFX_PPI_ALL_APP_CHANNELS_MASK ((uint32_t)0xFFFFFFFFuL & ~(NRFX_PPI_CHANNELS_USED)) /**< All PPI channels available to the application. */
-#define NRFX_PPI_PROG_APP_CHANNELS_MASK ((uint32_t)0x000FFFFFuL & ~(NRFX_PPI_CHANNELS_USED)) /**< Programmable PPI channels available to the application. */
+#if (PPI_CH_NUM > 16) || defined(__NRFX_DOXYGEN__)
+/** @brief Bitfield representing all PPI channels available to the application. */
+#define NRFX_PPI_ALL_APP_CHANNELS_MASK ((uint32_t)0xFFFFFFFFuL & ~(NRFX_PPI_CHANNELS_USED))
+/** @brief Bitfield representing programmable PPI channels available to the application. */
+#define NRFX_PPI_PROG_APP_CHANNELS_MASK ((uint32_t)0x000FFFFFuL & ~(NRFX_PPI_CHANNELS_USED))
#else
-#define NRFX_PPI_ALL_APP_CHANNELS_MASK ((uint32_t)0xFFF0FFFFuL & ~(NRFX_PPI_CHANNELS_USED)) /**< All PPI channels available to the application. */
-#define NRFX_PPI_PROG_APP_CHANNELS_MASK ((uint32_t)0x0000FFFFuL & ~(NRFX_PPI_CHANNELS_USED)) /**< Programmable PPI channels available to the application. */
+#define NRFX_PPI_ALL_APP_CHANNELS_MASK ((uint32_t)0xFFF0FFFFuL & ~(NRFX_PPI_CHANNELS_USED))
+#define NRFX_PPI_PROG_APP_CHANNELS_MASK ((uint32_t)0x0000FFFFuL & ~(NRFX_PPI_CHANNELS_USED))
#endif
-#define NRFX_PPI_ALL_APP_GROUPS_MASK (((1uL << PPI_GROUP_NUM) - 1) & ~(NRFX_PPI_GROUPS_USED)) /**< All PPI groups available to the application. */
+/** @brief Bitfield representing all PPI groups available to the application. */
+#define NRFX_PPI_ALL_APP_GROUPS_MASK (((1uL << PPI_GROUP_NUM) - 1) & ~(NRFX_PPI_GROUPS_USED))
/**
* @brief Function for uninitializing the PPI module.
@@ -77,8 +82,8 @@
*
* @param[out] p_channel Pointer to the PPI channel that has been allocated.
*
- * @retval NRFX_SUCCESS If the channel was successfully allocated.
- * @retval NRFX_ERROR_NO_MEM If there is no available channel to be used.
+ * @retval NRFX_SUCCESS The channel was successfully allocated.
+ * @retval NRFX_ERROR_NO_MEM There is no available channel to be used.
*/
nrfx_err_t nrfx_ppi_channel_alloc(nrf_ppi_channel_t * p_channel);
@@ -88,8 +93,8 @@
*
* @param[in] channel PPI channel to be freed.
*
- * @retval NRFX_SUCCESS If the channel was successfully freed.
- * @retval NRFX_ERROR_INVALID_PARAM If the channel is not user-configurable.
+ * @retval NRFX_SUCCESS The channel was successfully freed.
+ * @retval NRFX_ERROR_INVALID_PARAM The channel is not user-configurable.
*/
nrfx_err_t nrfx_ppi_channel_free(nrf_ppi_channel_t channel);
@@ -100,21 +105,21 @@
* @param[in] eep Event endpoint address.
* @param[in] tep Task endpoint address.
*
- * @retval NRFX_SUCCESS If the channel was successfully assigned.
- * @retval NRFX_ERROR_INVALID_STATE If the channel is not allocated for the user.
- * @retval NRFX_ERROR_INVALID_PARAM If the channel is not user-configurable.
+ * @retval NRFX_SUCCESS The channel was successfully assigned.
+ * @retval NRFX_ERROR_INVALID_STATE The channel is not allocated for the user.
+ * @retval NRFX_ERROR_INVALID_PARAM The channel is not user-configurable.
*/
nrfx_err_t nrfx_ppi_channel_assign(nrf_ppi_channel_t channel, uint32_t eep, uint32_t tep);
/**
- * @brief Function for assigning or clearing fork endpoint to the PPI channel.
+ * @brief Function for assigning fork endpoint to the PPI channel or clearing it.
*
* @param[in] channel PPI channel to be assigned endpoints.
* @param[in] fork_tep Fork task endpoint address or 0 to clear.
*
- * @retval NRFX_SUCCESS If the channel was successfully assigned.
- * @retval NRFX_ERROR_INVALID_STATE If the channel is not allocated for the user.
- * @retval NRFX_ERROR_NOT_SUPPORTED If function is not supported.
+ * @retval NRFX_SUCCESS The channel was successfully assigned.
+ * @retval NRFX_ERROR_INVALID_STATE The channel is not allocated for the user.
+ * @retval NRFX_ERROR_NOT_SUPPORTED Function is not supported.
*/
nrfx_err_t nrfx_ppi_channel_fork_assign(nrf_ppi_channel_t channel, uint32_t fork_tep);
@@ -123,9 +128,9 @@
*
* @param[in] channel PPI channel to be enabled.
*
- * @retval NRFX_SUCCESS If the channel was successfully enabled.
- * @retval NRFX_ERROR_INVALID_STATE If the user-configurable channel is not allocated.
- * @retval NRFX_ERROR_INVALID_PARAM If the channel cannot be enabled by the user.
+ * @retval NRFX_SUCCESS The channel was successfully enabled.
+ * @retval NRFX_ERROR_INVALID_STATE The user-configurable channel is not allocated.
+ * @retval NRFX_ERROR_INVALID_PARAM The channel cannot be enabled by the user.
*/
nrfx_err_t nrfx_ppi_channel_enable(nrf_ppi_channel_t channel);
@@ -134,9 +139,9 @@
*
* @param[in] channel PPI channel to be disabled.
*
- * @retval NRFX_SUCCESS If the channel was successfully disabled.
- * @retval NRFX_ERROR_INVALID_STATE If the user-configurable channel is not allocated.
- * @retval NRFX_ERROR_INVALID_PARAM If the channel cannot be disabled by the user.
+ * @retval NRFX_SUCCESS The channel was successfully disabled.
+ * @retval NRFX_ERROR_INVALID_STATE The user-configurable channel is not allocated.
+ * @retval NRFX_ERROR_INVALID_PARAM The channel cannot be disabled by the user.
*/
nrfx_err_t nrfx_ppi_channel_disable(nrf_ppi_channel_t channel);
@@ -146,8 +151,8 @@
*
* @param[out] p_group Pointer to the PPI channel group that has been allocated.
*
- * @retval NRFX_SUCCESS If the channel group was successfully allocated.
- * @retval NRFX_ERROR_NO_MEM If there is no available channel group to be used.
+ * @retval NRFX_SUCCESS The channel group was successfully allocated.
+ * @retval NRFX_ERROR_NO_MEM There is no available channel group to be used.
*/
nrfx_err_t nrfx_ppi_group_alloc(nrf_ppi_channel_group_t * p_group);
@@ -157,8 +162,8 @@
*
* @param[in] group PPI channel group to be freed.
*
- * @retval NRFX_SUCCESS If the channel group was successfully freed.
- * @retval NRFX_ERROR_INVALID_PARAM If the channel group is not user-configurable.
+ * @retval NRFX_SUCCESS The channel group was successfully freed.
+ * @retval NRFX_ERROR_INVALID_PARAM The channel group is not user-configurable.
*/
nrfx_err_t nrfx_ppi_group_free(nrf_ppi_channel_group_t group);
@@ -167,7 +172,7 @@
*
* @param[in] channel Channel number to transform to a mask.
*
- * @retval Channel mask.
+ * @return Channel mask.
*/
__STATIC_INLINE uint32_t nrfx_ppi_channel_to_mask(nrf_ppi_channel_t channel)
{
@@ -180,10 +185,10 @@
* @param[in] channel_mask PPI channels to be added.
* @param[in] group Channel group in which to include the channels.
*
- * @retval NRFX_SUCCESS If the channels was successfully included.
- * @retval NRFX_ERROR_INVALID_PARAM If group is not an application group or channels are not an
+ * @retval NRFX_SUCCESS The channels was successfully included.
+ * @retval NRFX_ERROR_INVALID_PARAM Group is not an application group or channels are not an
* application channels.
- * @retval NRFX_ERROR_INVALID_STATE If group is not an allocated group.
+ * @retval NRFX_ERROR_INVALID_STATE Group is not an allocated group.
*/
nrfx_err_t nrfx_ppi_channels_include_in_group(uint32_t channel_mask,
nrf_ppi_channel_group_t group);
@@ -194,10 +199,10 @@
* @param[in] channel PPI channel to be added.
* @param[in] group Channel group in which to include the channel.
*
- * @retval NRFX_SUCCESS If the channel was successfully included.
- * @retval NRFX_ERROR_INVALID_PARAM If group is not an application group or channel is not an
+ * @retval NRFX_SUCCESS The channel was successfully included.
+ * @retval NRFX_ERROR_INVALID_PARAM Group is not an application group or channel is not an
* application channel.
- * @retval NRFX_ERROR_INVALID_STATE If group is not an allocated group.
+ * @retval NRFX_ERROR_INVALID_STATE Group is not an allocated group.
*/
__STATIC_INLINE nrfx_err_t nrfx_ppi_channel_include_in_group(nrf_ppi_channel_t channel,
nrf_ppi_channel_group_t group)
@@ -211,24 +216,24 @@
* @param[in] channel_mask PPI channels to be removed.
* @param[in] group Channel group from which to remove the channels.
*
- * @retval NRFX_SUCCESS If the channel was successfully removed.
- * @retval NRFX_ERROR_INVALID_PARAM If group is not an application group or channels are not an
+ * @retval NRFX_SUCCESS The channel was successfully removed.
+ * @retval NRFX_ERROR_INVALID_PARAM Group is not an application group or channels are not an
* application channels.
- * @retval NRFX_ERROR_INVALID_STATE If group is not an allocated group.
+ * @retval NRFX_ERROR_INVALID_STATE Group is not an allocated group.
*/
nrfx_err_t nrfx_ppi_channels_remove_from_group(uint32_t channel_mask,
nrf_ppi_channel_group_t group);
/**
- * @brief Function for removing a PPI channel from a channel group.
+ * @brief Function for removing a single PPI channel from a channel group.
*
* @param[in] channel PPI channel to be removed.
* @param[in] group Channel group from which to remove the channel.
*
- * @retval NRFX_SUCCESS If the channel was successfully removed.
- * @retval NRFX_ERROR_INVALID_PARAM If group is not an application group or channel is not an
+ * @retval NRFX_SUCCESS The channel was successfully removed.
+ * @retval NRFX_ERROR_INVALID_PARAM Group is not an application group or channel is not an
* application channel.
- * @retval NRFX_ERROR_INVALID_STATE If group is not an allocated group.
+ * @retval NRFX_ERROR_INVALID_STATE Group is not an allocated group.
*/
__STATIC_INLINE nrfx_err_t nrfx_ppi_channel_remove_from_group(nrf_ppi_channel_t channel,
nrf_ppi_channel_group_t group)
@@ -241,9 +246,9 @@
*
* @param[in] group Channel group to be cleared.
*
- * @retval NRFX_SUCCESS If the group was successfully cleared.
- * @retval NRFX_ERROR_INVALID_PARAM If group is not an application group.
- * @retval NRFX_ERROR_INVALID_STATE If group is not an allocated group.
+ * @retval NRFX_SUCCESS The group was successfully cleared.
+ * @retval NRFX_ERROR_INVALID_PARAM Group is not an application group.
+ * @retval NRFX_ERROR_INVALID_STATE Group is not an allocated group.
*/
__STATIC_INLINE nrfx_err_t nrfx_ppi_group_clear(nrf_ppi_channel_group_t group)
{
@@ -255,9 +260,9 @@
*
* @param[in] group Channel group to be enabled.
*
- * @retval NRFX_SUCCESS If the group was successfully enabled.
- * @retval NRFX_ERROR_INVALID_PARAM If group is not an application group.
- * @retval NRFX_ERROR_INVALID_STATE If group is not an allocated group.
+ * @retval NRFX_SUCCESS The group was successfully enabled.
+ * @retval NRFX_ERROR_INVALID_PARAM Group is not an application group.
+ * @retval NRFX_ERROR_INVALID_STATE Group is not an allocated group.
*/
nrfx_err_t nrfx_ppi_group_enable(nrf_ppi_channel_group_t group);
@@ -266,9 +271,9 @@
*
* @param[in] group Channel group to be disabled.
*
- * @retval NRFX_SUCCESS If the group was successfully disabled.
- * @retval NRFX_ERROR_INVALID_PARAM If group is not an application group.
- * @retval NRFX_ERROR_INVALID_STATE If group is not an allocated group.
+ * @retval NRFX_SUCCESS The group was successfully disabled.
+ * @retval NRFX_ERROR_INVALID_PARAM Group is not an application group.
+ * @retval NRFX_ERROR_INVALID_STATE Group is not an allocated group.
*/
nrfx_err_t nrfx_ppi_group_disable(nrf_ppi_channel_group_t group);
@@ -277,7 +282,7 @@
*
* @param[in] task Task.
*
- * @retval Task address.
+ * @return Task address.
*/
__STATIC_INLINE uint32_t nrfx_ppi_task_addr_get(nrf_ppi_task_t task)
{
@@ -285,11 +290,11 @@
}
/**
- * @brief Function for getting the address of a PPI group enable task.
+ * @brief Function for getting the address of the enable task of a PPI group.
*
* @param[in] group PPI channel group
*
- * @retval Task address.
+ * @return Task address.
*/
__STATIC_INLINE uint32_t nrfx_ppi_task_addr_group_enable_get(nrf_ppi_channel_group_t group)
{
@@ -297,11 +302,11 @@
}
/**
- * @brief Function for getting the address of a PPI group enable task.
+ * @brief Function for getting the address of the enable task of a PPI group.
*
* @param[in] group PPI channel group
*
- * @retval Task address.
+ * @return Task address.
*/
__STATIC_INLINE uint32_t nrfx_ppi_task_addr_group_disable_get(nrf_ppi_channel_group_t group)
{
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_pwm.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_pwm.h
index ec05b42..60cb6c5 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_pwm.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_pwm.h
@@ -46,24 +46,21 @@
* @brief Pulse Width Modulation (PWM) peripheral driver.
*/
-/**
- * @brief PWM driver instance data structure.
- */
+/** @brief PWM driver instance data structure. */
typedef struct
{
NRF_PWM_Type * p_registers; ///< Pointer to the structure with PWM peripheral instance registers.
- uint8_t drv_inst_idx; ///< Driver instance index.
+ uint8_t drv_inst_idx; ///< Index of the driver instance. For internal use only.
} nrfx_pwm_t;
-/**
- * @brief Macro for creating a PWM driver instance.
- */
+/** @brief Macro for creating a PWM driver instance. */
#define NRFX_PWM_INSTANCE(id) \
{ \
.p_registers = NRFX_CONCAT_2(NRF_PWM, id), \
.drv_inst_idx = NRFX_CONCAT_3(NRFX_PWM, id, _INST_IDX), \
}
+#ifndef __NRFX_DOXYGEN__
enum {
#if NRFX_CHECK(NRFX_PWM0_ENABLED)
NRFX_PWM0_INST_IDX,
@@ -79,6 +76,7 @@
#endif
NRFX_PWM_ENABLED_COUNT
};
+#endif
/**
* @brief This value can be provided instead of a pin number for any channel
@@ -87,15 +85,10 @@
*/
#define NRFX_PWM_PIN_NOT_USED 0xFF
-/**
- * @brief This value can be added to a pin number to inverse its polarity
- * (set idle state = 1).
- */
+/** @brief This value can be added to a pin number to invert its polarity (set idle state = 1). */
#define NRFX_PWM_PIN_INVERTED 0x80
-/**
- * @brief PWM driver configuration structure.
- */
+/** @brief PWM driver configuration structure. */
typedef struct
{
uint8_t output_pins[NRF_PWM_CHANNEL_COUNT]; ///< Pin numbers for individual output channels (optional).
@@ -109,9 +102,7 @@
nrf_pwm_dec_step_t step_mode; ///< Mode of advancing the active sequence.
} nrfx_pwm_config_t;
-/**
- * @brief PWM driver default configuration.
- */
+/** @brief PWM driver default configuration. */
#define NRFX_PWM_DEFAULT_CONFIG \
{ \
.output_pins = { NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN, \
@@ -126,14 +117,11 @@
.step_mode = (nrf_pwm_dec_step_t)NRFX_PWM_DEFAULT_CONFIG_STEP_MODE, \
}
-
-/**
- * @brief PWM flags providing additional playback options.
- */
+/** @brief PWM flags that provide additional playback options. */
typedef enum
{
NRFX_PWM_FLAG_STOP = 0x01, /**< When the requested playback is finished,
- the peripheral should be stopped.
+ the peripheral will be stopped.
@note The STOP task is triggered when
the last value of the final sequence is
loaded from RAM, and the peripheral stops
@@ -143,7 +131,7 @@
less than the requested number of repeats
of the last value. */
NRFX_PWM_FLAG_LOOP = 0x02, /**< When the requested playback is finished,
- it should be started from the beginning.
+ it will be started from the beginning.
This flag is ignored if used together
with @ref NRFX_PWM_FLAG_STOP.
@note The playback restart is done via a
@@ -157,28 +145,25 @@
the playback restart will occur right
after switching to the final value (this
final value will be played only once). */
- NRFX_PWM_FLAG_SIGNAL_END_SEQ0 = 0x04, /**< The event handler should be
+ NRFX_PWM_FLAG_SIGNAL_END_SEQ0 = 0x04, /**< The event handler is to be
called when the last value
from sequence 0 is loaded. */
- NRFX_PWM_FLAG_SIGNAL_END_SEQ1 = 0x08, /**< The event handler should be
+ NRFX_PWM_FLAG_SIGNAL_END_SEQ1 = 0x08, /**< The event handler is to be
called when the last value
from sequence 1 is loaded. */
NRFX_PWM_FLAG_NO_EVT_FINISHED = 0x10, /**< The playback finished event
- (enabled by default) should be
+ (enabled by default) is to be
suppressed. */
- NRFX_PWM_FLAG_START_VIA_TASK = 0x80, /**< The playback should not be
+ NRFX_PWM_FLAG_START_VIA_TASK = 0x80, /**< The playback must not be
started directly by the called
function. Instead, the function
- should only prepare it and
+ must only prepare it and
return the address of the task
to be triggered to start the
playback. */
} nrfx_pwm_flag_t;
-
-/**
- * @brief PWM driver event type.
- */
+/** @brief PWM driver event type. */
typedef enum
{
NRFX_PWM_EVT_FINISHED, ///< Sequence playback finished.
@@ -189,24 +174,20 @@
NRFX_PWM_EVT_STOPPED, ///< The PWM peripheral has been stopped.
} nrfx_pwm_evt_type_t;
-/**
- * @brief PWM driver event handler type.
- */
+/** @brief PWM driver event handler type. */
typedef void (* nrfx_pwm_handler_t)(nrfx_pwm_evt_type_t event_type);
-
/**
* @brief Function for initializing the PWM driver.
*
* @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] p_config Pointer to the structure with initial configuration.
- *
+ * @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] handler Event handler provided by the user. If NULL is passed
* instead, event notifications are not done and PWM
* interrupts are disabled.
*
- * @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_INVALID_STATE If the driver was already initialized.
+ * @retval NRFX_SUCCESS Initialization was successful.
+ * @retval NRFX_ERROR_INVALID_STATE The driver was already initialized.
*/
nrfx_err_t nrfx_pwm_init(nrfx_pwm_t const * const p_instance,
nrfx_pwm_config_t const * p_config,
@@ -227,20 +208,20 @@
* To take advantage of the looping mechanism in the PWM peripheral, both
* sequences must be used (single sequence can be played back only once by
* the peripheral). Therefore, the provided sequence is internally set and
- * played back as both sequence 0 and sequence 1. Consequently, if end of
- * sequence notifications are required, events for both sequences should be
- * used (that means that both the @ref NRFX_PWM_FLAG_SIGNAL_END_SEQ0 flag
- * and the @ref NRFX_PWM_FLAG_SIGNAL_END_SEQ1 flag should be specified and
+ * played back as both sequence 0 and sequence 1. Consequently, if the end of
+ * sequence notifications are required, events for both sequences must be
+ * used (that is, both the @ref NRFX_PWM_FLAG_SIGNAL_END_SEQ0 flag
+ * and the @ref NRFX_PWM_FLAG_SIGNAL_END_SEQ1 flag must be specified, and
* the @ref NRFX_PWM_EVT_END_SEQ0 event and the @ref NRFX_PWM_EVT_END_SEQ1
- * event should be handled in the same way).
+ * event must be handled in the same way).
*
* Use the @ref NRFX_PWM_FLAG_START_VIA_TASK flag if you want the playback
* to be only prepared by this function, and you want to start it later by
- * triggering a task (using PPI for instance). The function will then return
+ * triggering a task (for example, by using PPI). The function will then return
* the address of the task to be triggered.
*
* @note The array containing the duty cycle values for the specified sequence
- * must be in RAM and cannot be allocated on stack.
+ * must be in RAM and cannot be allocated on the stack.
* For detailed information, see @ref nrf_pwm_sequence_t.
*
* @param[in] p_instance Pointer to the driver instance structure.
@@ -267,7 +248,7 @@
* the address of the task to be triggered.
*
* @note The array containing the duty cycle values for the specified sequence
- * must be in RAM and cannot be allocated on stack.
+ * must be in RAM and cannot be allocated on the stack.
* For detailed information, see @ref nrf_pwm_sequence_t.
*
* @param[in] p_instance Pointer to the driver instance structure.
@@ -305,7 +286,7 @@
* might appear on the output less times than requested.
*
* @note This function can be instructed to wait until the playback is stopped
- * (by setting @p wait_until_stopped to true). Note that, depending on
+ * (by setting @p wait_until_stopped to true). Depending on
* the length of the PMW period, this might take a significant amount of
* time. Alternatively, the @ref nrfx_pwm_is_stopped function can be
* used to poll the status, or the @ref NRFX_PWM_EVT_STOPPED event can
@@ -316,19 +297,18 @@
* @param[in] wait_until_stopped If true, the function will not return until
* the playback is stopped.
*
- * @retval true If the PWM peripheral is stopped.
- * @retval false If the PWM peripheral is not stopped.
+ * @retval true The PWM peripheral is stopped.
+ * @retval false The PWM peripheral is not stopped.
*/
-bool nrfx_pwm_stop(nrfx_pwm_t const * const p_instance,
- bool wait_until_stopped);
+bool nrfx_pwm_stop(nrfx_pwm_t const * const p_instance, bool wait_until_stopped);
/**
* @brief Function for checking the status of the PWM peripheral.
*
* @param[in] p_instance Pointer to the driver instance structure.
*
- * @retval true If the PWM peripheral is stopped.
- * @retval false If the PWM peripheral is not stopped.
+ * @retval true The PWM peripheral is stopped.
+ * @retval false The PWM peripheral is not stopped.
*/
bool nrfx_pwm_is_stopped(nrfx_pwm_t const * const p_instance);
@@ -339,10 +319,9 @@
* @param[in] seq_id Identifier of the sequence (0 or 1).
* @param[in] p_sequence Pointer to the new sequence definition.
*/
-__STATIC_INLINE void nrfx_pwm_sequence_update(
- nrfx_pwm_t const * const p_instance,
- uint8_t seq_id,
- nrf_pwm_sequence_t const * p_sequence);
+__STATIC_INLINE void nrfx_pwm_sequence_update(nrfx_pwm_t const * const p_instance,
+ uint8_t seq_id,
+ nrf_pwm_sequence_t const * p_sequence);
/**
* @brief Function for updating the pointer to the duty cycle values
@@ -370,7 +349,7 @@
/**
* @brief Function for updating the number of repeats for duty cycle values
- * in specified sequence during playback.
+ * in the specified sequence during playback.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] seq_id Identifier of the sequence (0 or 1).
@@ -404,18 +383,18 @@
__STATIC_INLINE uint32_t nrfx_pwm_task_address_get(nrfx_pwm_t const * const p_instance,
nrf_pwm_task_t task);
-/**@brief Function for returning the address of a specified PWM event that can
+/**
+ * @brief Function for returning the address of a specified PWM event that can
* be used in PPI module.
*
- * @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] event Requested event.
+ * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] event Requested event.
*
* @return Event address.
*/
__STATIC_INLINE uint32_t nrfx_pwm_event_address_get(nrfx_pwm_t const * const p_instance,
nrf_pwm_event_t event);
-
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE void nrfx_pwm_step(nrfx_pwm_t const * const p_instance)
@@ -472,6 +451,8 @@
#endif // SUPPRESS_INLINE_IMPLEMENTATION
+/** @} */
+
void nrfx_pwm_0_irq_handler(void);
void nrfx_pwm_1_irq_handler(void);
@@ -479,8 +460,6 @@
void nrfx_pwm_3_irq_handler(void);
-/** @} */
-
#ifdef __cplusplus
}
#endif
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_qdec.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_qdec.h
index f1e5a85..a86fd60 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_qdec.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_qdec.h
@@ -46,7 +46,7 @@
* @brief Quadrature Decoder (QDEC) peripheral driver.
*/
-/**@brief QDEC configuration structure.*/
+/** @brief QDEC configuration structure. */
typedef struct
{
nrf_qdec_reportper_t reportper; /**< Report period in samples. */
@@ -62,91 +62,102 @@
} nrfx_qdec_config_t;
/**@brief QDEC default configuration. */
-#define NRFX_QDEC_DEFAULT_CONFIG \
- { \
- .reportper = (nrf_qdec_reportper_t)NRFX_QDEC_CONFIG_REPORTPER, \
- .sampleper = (nrf_qdec_sampleper_t)NRFX_QDEC_CONFIG_SAMPLEPER, \
- .psela = NRFX_QDEC_CONFIG_PIO_A, \
- .pselb = NRFX_QDEC_CONFIG_PIO_B, \
- .pselled = NRFX_QDEC_CONFIG_PIO_LED, \
- .ledpre = NRFX_QDEC_CONFIG_LEDPRE, \
- .ledpol = (nrf_qdec_ledpol_t)NRFX_QDEC_CONFIG_LEDPOL, \
- .interrupt_priority = NRFX_QDEC_CONFIG_IRQ_PRIORITY, \
- .dbfen = NRFX_QDEC_CONFIG_DBFEN, \
- .sample_inten = NRFX_QDEC_CONFIG_SAMPLE_INTEN \
- }
+#define NRFX_QDEC_DEFAULT_CONFIG \
+{ \
+ .reportper = (nrf_qdec_reportper_t)NRFX_QDEC_CONFIG_REPORTPER, \
+ .sampleper = (nrf_qdec_sampleper_t)NRFX_QDEC_CONFIG_SAMPLEPER, \
+ .psela = NRFX_QDEC_CONFIG_PIO_A, \
+ .pselb = NRFX_QDEC_CONFIG_PIO_B, \
+ .pselled = NRFX_QDEC_CONFIG_PIO_LED, \
+ .ledpre = NRFX_QDEC_CONFIG_LEDPRE, \
+ .ledpol = (nrf_qdec_ledpol_t)NRFX_QDEC_CONFIG_LEDPOL, \
+ .dbfen = NRFX_QDEC_CONFIG_DBFEN, \
+ .sample_inten = NRFX_QDEC_CONFIG_SAMPLE_INTEN, \
+ .interrupt_priority = NRFX_QDEC_CONFIG_IRQ_PRIORITY, \
+}
-/**@brief QDEC sample event data.*/
+/** @brief QDEC sample event data. */
typedef struct
{
int8_t value; /**< Sample value. */
} nrfx_qdec_sample_data_evt_t;
-/**@brief QDEC report event data.*/
+/** @brief QDEC report event data. */
typedef struct
{
int16_t acc; /**< Accumulated transitions. */
- uint16_t accdbl; /**< Accumulated double transitions. */
+ uint16_t accdbl; /**< Accumulated double transitions. */
} nrfx_qdec_report_data_evt_t;
-/**@brief QDEC event handler structure. */
+/** @brief QDEC event handler structure. */
typedef struct
{
- nrf_qdec_event_t type;
+ nrf_qdec_event_t type; /**< Event type. */
union
{
nrfx_qdec_sample_data_evt_t sample; /**< Sample event data. */
nrfx_qdec_report_data_evt_t report; /**< Report event data. */
- } data;
+ } data; /**< Union to store event data. */
} nrfx_qdec_event_t;
-/**@brief QDEC event handler.
- * @param[in] event QDEC event structure.
+/**
+ * @brief QDEC event handler.
+ *
+ * @param[in] event QDEC event structure.
*/
typedef void (*nrfx_qdec_event_handler_t)(nrfx_qdec_event_t event);
-/**@brief Function for initializing QDEC.
+/**
+ * @brief Function for initializing QDEC.
*
- * @param[in] p_config Pointer to the structure with initial configuration.
+ * @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] event_handler Event handler provided by the user.
* Must not be NULL.
*
- * @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_INVALID_STATE If QDEC was already initialized.
+ * @retval NRFX_SUCCESS Initialization was successful.
+ * @retval NRFX_ERROR_INVALID_STATE The QDEC was already initialized.
*/
nrfx_err_t nrfx_qdec_init(nrfx_qdec_config_t const * p_config,
nrfx_qdec_event_handler_t event_handler);
-/**@brief Function for uninitializing QDEC.
- * @note Function asserts if module is uninitialized.
+/**
+ * @brief Function for uninitializing QDEC.
+ *
+ * @note Function asserts if module is uninitialized.
*/
void nrfx_qdec_uninit(void);
-/**@brief Function for enabling QDEC.
- * @note Function asserts if module is uninitialized or enabled.
+/**
+ * @brief Function for enabling QDEC.
+ *
+ * @note Function asserts if module is uninitialized or enabled.
*/
void nrfx_qdec_enable(void);
-/**@brief Function for disabling QDEC.
- * @note Function asserts if module is uninitialized or disabled.
+/**
+ * @brief Function for disabling QDEC.
+ *
+ * @note Function asserts if module is uninitialized or disabled.
*/
void nrfx_qdec_disable(void);
-/**@brief Function for reading accumulated transitions QDEC.
- * @note Function asserts if module is not enabled.
- * @note Accumulators are cleared after reading.
+/**
+ * @brief Function for reading accumulated transitions from the QDEC peripheral.
*
- * @param[out] p_acc Pointer to store accumulated transitions.
- * @param[out] p_accdbl Pointer to store accumulated double transitions.
+ * @note Function asserts if module is not enabled.
+ * @note Accumulators are cleared after reading.
+ *
+ * @param[out] p_acc Pointer to store the accumulated transitions.
+ * @param[out] p_accdbl Pointer to store the accumulated double transitions.
*/
void nrfx_qdec_accumulators_read(int16_t * p_acc, int16_t * p_accdbl);
/**
- * @brief Function for returning the address of a specific QDEC task.
+ * @brief Function for returning the address of the specified QDEC task.
*
- * @param task QDEC task.
+ * @param task QDEC task.
*
- * @return Task address.
+ * @return Task address.
*/
__STATIC_INLINE uint32_t nrfx_qdec_task_address_get(nrf_qdec_task_t task)
{
@@ -154,21 +165,22 @@
}
/**
- * @brief Function for returning the address of a specific QDEC event.
+ * @brief Function for returning the address of the specified QDEC event.
*
- * @param event QDEC event.
+ * @param event QDEC event.
*
- * @return Event address.
+ * @return Event address.
*/
__STATIC_INLINE uint32_t nrfx_qdec_event_address_get(nrf_qdec_event_t event)
{
return (uint32_t)nrf_qdec_event_address_get(event);
}
+/** @} */
+
void nrfx_qdec_irq_handler(void);
-/** @} */
#ifdef __cplusplus
}
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_qspi.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_qspi.h
index 36bb579..e181cbf 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_qspi.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_qspi.h
@@ -46,21 +46,17 @@
* @brief Quad Serial Peripheral Interface (QSPI) peripheral driver.
*/
-/**
- * @brief QSPI driver instance configuration structure.
- */
+/** @brief QSPI driver instance configuration structure. */
typedef struct
{
uint32_t xip_offset; /**< Address offset into the external memory for Execute in Place operation. */
- nrf_qspi_pins_t pins; /**< Pins configuration structure. */
+ nrf_qspi_pins_t pins; /**< Pin configuration structure. */
nrf_qspi_prot_conf_t prot_if; /**< Protocol layer interface configuration structure. */
nrf_qspi_phy_conf_t phy_if; /**< Physical layer interface configuration structure. */
uint8_t irq_priority; /**< Interrupt priority. */
} nrfx_qspi_config_t;
-/**
- * @brief QSPI instance default configuration.
- */
+/** @brief QSPI instance default configuration. */
#define NRFX_QSPI_DEFAULT_CONFIG \
{ \
.xip_offset = NRFX_QSPI_CONFIG_XIP_OFFSET, \
@@ -72,7 +68,6 @@
.io2_pin = NRFX_QSPI_PIN_IO2, \
.io3_pin = NRFX_QSPI_PIN_IO3, \
}, \
- .irq_priority = (uint8_t)NRFX_QSPI_CONFIG_IRQ_PRIORITY, \
.prot_if = { \
.readoc = (nrf_qspi_readoc_t)NRFX_QSPI_CONFIG_READOC, \
.writeoc = (nrf_qspi_writeoc_t)NRFX_QSPI_CONFIG_WRITEOC, \
@@ -80,16 +75,15 @@
.dpmconfig = false, \
}, \
.phy_if = { \
- .sck_freq = (nrf_qspi_frequency_t)NRFX_QSPI_CONFIG_FREQUENCY, \
.sck_delay = (uint8_t)NRFX_QSPI_CONFIG_SCK_DELAY, \
+ .dpmen = false, \
.spi_mode = (nrf_qspi_spi_mode_t)NRFX_QSPI_CONFIG_MODE, \
- .dpmen = false \
+ .sck_freq = (nrf_qspi_frequency_t)NRFX_QSPI_CONFIG_FREQUENCY, \
}, \
+ .irq_priority = (uint8_t)NRFX_QSPI_CONFIG_IRQ_PRIORITY, \
}
-/**
- * @brief QSPI custom instruction helper with default configuration.
- */
+/** @brief QSPI custom instruction helper with the default configuration. */
#define NRFX_QSPI_DEFAULT_CINSTR(opc, len) \
{ \
.opcode = (opc), \
@@ -109,16 +103,14 @@
NRFX_QSPI_EVENT_DONE, /**< Transfer done. */
} nrfx_qspi_evt_t;
-/**
- * @brief QSPI driver event handler type.
- */
+/** @brief QSPI driver event handler type. */
typedef void (*nrfx_qspi_handler_t)(nrfx_qspi_evt_t event, void * p_context);
/**
* @brief Function for initializing the QSPI driver instance.
*
- * This function configures the peripheral and its interrupts and activates it. During the
- * activation process, the internal clocks are started and the QSPI peripheral tries to read
+ * This function configures the peripheral and its interrupts, and activates it. During the
+ * activation process, the internal clocks are started and the QSPI peripheral tries to read
* the status byte to read the busy bit. Reading the status byte is done in a simple poll and wait
* mechanism.
* If the busy bit is 1, this indicates issues with the external memory device. As a result,
@@ -129,32 +121,30 @@
* - Make sure that the memory device does not perform other operations like erasing or writing.
* - Check if there is a short circuit.
*
- * @param[in] p_config Pointer to the structure with initial configuration.
- * @param[in] handler Event handler provided by the user. If NULL, transfers
- * will be performed in blocking mode.
- * @param[in] p_context Pointer to context. Use in interrupt handler.
+ * @param[in] p_config Pointer to the structure with the initial configuration.
+ * @param[in] handler Event handler provided by the user. If NULL, transfers
+ * will be performed in blocking mode.
+ * @param[in] p_context Pointer to context. Use in the interrupt handler.
*
- * @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_TIMEOUT If the peripheral cannot connect with external memory.
- * @retval NRFX_ERROR_INVALID_STATE If the driver was already initialized.
- * @retval NRFX_ERROR_INVALID_PARAM If the pin configuration was incorrect.
+ * @retval NRFX_SUCCESS Initialization was successful.
+ * @retval NRFX_ERROR_TIMEOUT The peripheral cannot connect with external memory.
+ * @retval NRFX_ERROR_INVALID_STATE The driver was already initialized.
+ * @retval NRFX_ERROR_INVALID_PARAM The pin configuration was incorrect.
*/
nrfx_err_t nrfx_qspi_init(nrfx_qspi_config_t const * p_config,
nrfx_qspi_handler_t handler,
void * p_context);
-/**
- * @brief Function for uninitializing the QSPI driver instance.
- */
+/** @brief Function for uninitializing the QSPI driver instance. */
void nrfx_qspi_uninit(void);
/**
- * @brief Function for reading data from QSPI memory.
+ * @brief Function for reading data from the QSPI memory.
*
* Write, read, and erase operations check memory device busy state before starting the operation.
* If the memory is busy, the resulting action depends on the mode in which the read operation is used:
- * - blocking mode (without handler) - a delay occurs until the last operation still runs and
- * until operation data is still being read.
+ * - blocking mode (without handler) - a delay occurs until the last operation runs and
+ * until the operation data is being read.
* - interrupt mode (with handler) - event emission occurs after the last operation
* and reading of data are finished.
*
@@ -162,10 +152,11 @@
* @param[in] rx_buffer_length Size of the data to read.
* @param[in] src_address Address in memory to read from.
*
- * @retval NRFX_SUCCESS If the operation was successful (blocking mode) or operation
+ * @retval NRFX_SUCCESS The operation was successful (blocking mode) or operation
* was commissioned (handler mode).
- * @retval NRFX_ERROR_BUSY If the driver currently handles another operation.
- * @retval NRFX_ERROR_INVALID_ADDR If the provided buffer is not placed in the Data RAM region.
+ * @retval NRFX_ERROR_BUSY The driver currently handles another operation.
+ * @retval NRFX_ERROR_INVALID_ADDR The provided buffer is not placed in the Data RAM region
+ * or its address is not aligned to a 32-bit word.
*/
nrfx_err_t nrfx_qspi_read(void * p_rx_buffer,
size_t rx_buffer_length,
@@ -176,8 +167,8 @@
*
* Write, read, and erase operations check memory device busy state before starting the operation.
* If the memory is busy, the resulting action depends on the mode in which the write operation is used:
- * - blocking mode (without handler) - a delay occurs until the last operation still runs and
- * until operation data is still being sent.
+ * - blocking mode (without handler) - a delay occurs until the last operation runs or
+ * until the operation data is being sent.
* - interrupt mode (with handler) - event emission occurs after the last operation
* and sending of operation data are finished.
* To manually control operation execution in the memory device, use @ref nrfx_qspi_mem_busy_check
@@ -189,10 +180,11 @@
* @param[in] tx_buffer_length Size of the data to write.
* @param[in] dst_address Address in memory to write to.
*
- * @retval NRFX_SUCCESS If the operation was successful (blocking mode) or operation
+ * @retval NRFX_SUCCESS The operation was successful (blocking mode) or operation
* was commissioned (handler mode).
- * @retval NRFX_ERROR_BUSY If the driver currently handles other operation.
- * @retval NRFX_ERROR_INVALID_ADDR If the provided buffer is not placed in the Data RAM region.
+ * @retval NRFX_ERROR_BUSY The driver currently handles other operation.
+ * @retval NRFX_ERROR_INVALID_ADDR The provided buffer is not placed in the Data RAM region
+ * or its address is not aligned to a 32-bit word.
*/
nrfx_err_t nrfx_qspi_write(void const * p_tx_buffer,
size_t tx_buffer_length,
@@ -203,8 +195,8 @@
*
* Write, read, and erase operations check memory device busy state before starting the operation.
* If the memory is busy, the resulting action depends on the mode in which the erase operation is used:
- * - blocking mode (without handler) - a delay occurs until the last operation still runs and
- * until operation data is still being sent.
+ * - blocking mode (without handler) - a delay occurs until the last operation runs or
+ * until the operation data is being sent.
* - interrupt mode (with handler) - event emission occurs after the last operation
* and sending of operation data are finished.
* To manually control operation execution in the memory device, use @ref nrfx_qspi_mem_busy_check
@@ -216,9 +208,10 @@
* @param[in] start_address Memory address to start erasing. If chip erase is performed, address
* field is ommited.
*
- * @retval NRFX_SUCCESS If the operation was successful (blocking mode) or operation
- * was commissioned (handler mode).
- * @retval NRFX_ERROR_BUSY If the driver currently handles another operation.
+ * @retval NRFX_SUCCESS The operation was successful (blocking mode) or operation
+ * was commissioned (handler mode).
+ * @retval NRFX_ERROR_INVALID_ADDR The provided start address is not aligned to a 32-bit word.
+ * @retval NRFX_ERROR_BUSY The driver currently handles another operation.
*/
nrfx_err_t nrfx_qspi_erase(nrf_qspi_erase_len_t length,
uint32_t start_address);
@@ -226,9 +219,9 @@
/**
* @brief Function for starting an erase operation of the whole chip.
*
- * @retval NRFX_SUCCESS If the operation was successful (blocking mode) or operation
+ * @retval NRFX_SUCCESS The operation was successful (blocking mode) or operation
* was commissioned (handler mode).
- * @retval NRFX_ERROR_BUSY If the driver currently handles another operation.
+ * @retval NRFX_ERROR_BUSY The driver currently handles another operation.
*/
nrfx_err_t nrfx_qspi_chip_erase(void);
@@ -236,8 +229,8 @@
* @brief Function for getting the current driver status and status byte of memory device with
* testing WIP (write in progress) bit.
*
- * @retval NRFX_SUCCESS If the driver and memory are ready to handle a new operation.
- * @retval NRFX_ERROR_BUSY If the driver or memory currently handle another operation.
+ * @retval NRFX_SUCCESS The driver and memory are ready to handle a new operation.
+ * @retval NRFX_ERROR_BUSY The driver or memory currently handle another operation.
*/
nrfx_err_t nrfx_qspi_mem_busy_check(void);
@@ -252,13 +245,14 @@
* @param[in] p_tx_buffer Pointer to the array with data to send. Can be NULL if only opcode is transmitted.
* @param[out] p_rx_buffer Pointer to the array for data to receive. Can be NULL if there is nothing to receive.
*
- * @retval NRFX_SUCCESS If the operation was successful.
- * @retval NRFX_ERROR_TIMEOUT If the external memory is busy or there are connection issues.
- * @retval NRFX_ERROR_BUSY If the driver currently handles other operation.
+ * @retval NRFX_SUCCESS The operation was successful.
+ * @retval NRFX_ERROR_TIMEOUT The external memory is busy or there are connection issues.
+ * @retval NRFX_ERROR_BUSY The driver currently handles other operation.
*/
nrfx_err_t nrfx_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config,
void const * p_tx_buffer,
void * p_rx_buffer);
+
/**
* @brief Function for sending operation code and data to the memory device with simpler configuration.
*
@@ -269,17 +263,56 @@
* @param[in] length Length of the data to send and opcode. See @ref nrf_qspi_cinstr_len_t.
* @param[in] p_tx_buffer Pointer to input data array.
*
- * @retval NRFX_SUCCESS If the operation was successful.
- * @retval NRFX_ERROR_BUSY If the driver currently handles another operation.
+ * @retval NRFX_SUCCESS The operation was successful.
+ * @retval NRFX_ERROR_BUSY The driver currently handles another operation.
*/
nrfx_err_t nrfx_qspi_cinstr_quick_send(uint8_t opcode,
nrf_qspi_cinstr_len_t length,
void const * p_tx_buffer);
+/**
+ * @brief Function for starting the custom instruction long frame mode.
+ *
+ * The long frame mode is a mechanism that allows for arbitrary byte length custom instructions.
+ * Use this function to initiate a custom transaction by sending custom instruction opcode.
+ * To send and receive data, use @ref nrfx_qspi_lfm_xfer.
+ *
+ * @param[in] p_config Pointer to the structure with custom instruction opcode and transfer
+ * configuration. Transfer length must be set to @ref NRF_QSPI_CINSTR_LEN_1B.
+ *
+ * @retval NRFX_SUCCESS Operation was successful.
+ * @retval NRFX_ERROR_BUSY Driver currently handles other operation.
+ * @retval NRFX_ERROR_TIMEOUT External memory is busy or there are connection issues.
+ */
+nrfx_err_t nrfx_qspi_lfm_start(nrf_qspi_cinstr_conf_t const * p_config);
+
+/**
+ * @brief Function for sending and receiving data in the custom instruction long frame mode.
+ *
+ * Both specified buffers must be at least @p transfer_length bytes in size.
+ *
+ * @param[in] p_tx_buffer Pointer to the array with data to send.
+ * Can be NULL if there is nothing to send.
+ * @param[out] p_rx_buffer Pointer to the array for receiving data.
+ * Can be NULL if there is nothing to receive.
+ * @param[in] transfer_length Number of bytes to send and receive.
+ * @param[in] finalize True if custom instruction long frame mode is to be finalized
+ * after this transfer.
+ *
+ * @retval NRFX_SUCCESS Operation was successful.
+ * @retval NRFX_ERROR_TIMEOUT External memory is busy or there are connection issues.
+ * Long frame mode becomes deactivated.
+ */
+nrfx_err_t nrfx_qspi_lfm_xfer(void const * p_tx_buffer,
+ void * p_rx_buffer,
+ size_t transfer_length,
+ bool finalize);
+
+/** @} */
+
void nrfx_qspi_irq_handler(void);
-/** @} */
#ifdef __cplusplus
}
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_rng.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_rng.h
index 6add7f7..11968f3 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_rng.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_rng.h
@@ -45,13 +45,11 @@
* @brief Random Number Generator (RNG) peripheral driver.
*/
-/**
- * @brief Struct for RNG configuration.
- */
+/** @brief Struct for RNG configuration. */
typedef struct
{
bool error_correction : 1; /**< Error correction flag. */
- uint8_t interrupt_priority; /**< interrupt priority */
+ uint8_t interrupt_priority; /**< Interrupt priority. */
} nrfx_rng_config_t;
/**
@@ -63,53 +61,49 @@
* { ...
* @endcode
*/
-#define NRFX_RNG_DEFAULT_CONFIG \
- { \
- .error_correction = NRFX_RNG_CONFIG_ERROR_CORRECTION, \
- .interrupt_priority = NRFX_RNG_CONFIG_IRQ_PRIORITY, \
- }
+#define NRFX_RNG_DEFAULT_CONFIG \
+{ \
+ .error_correction = NRFX_RNG_CONFIG_ERROR_CORRECTION, \
+ .interrupt_priority = NRFX_RNG_CONFIG_IRQ_PRIORITY, \
+}
-/**
- * @brief RNG driver event handler type.
- */
+/** @brief RNG driver event handler type. */
typedef void (* nrfx_rng_evt_handler_t)(uint8_t rng_data);
/**
* @brief Function for initializing the nrfx_rng module.
*
- * @param[in] p_config Pointer to the structure with initial configuration.
- * @param[in] handler Event handler provided by the user. Must not be NULL.
+ * @param[in] p_config Pointer to the structure with the initial configuration.
+ * @param[in] handler Event handler provided by the user. Must not be NULL.
*
- * @retval NRFX_SUCCESS Driver was successfully initialized.
- * @retval NRFX_ERROR_ALREADY_INITIALIZED Driver was already initialized.
+ * @retval NRFX_SUCCESS Driver was successfully initialized.
+ * @retval NRFX_ERROR_ALREADY_INITIALIZED Driver was already initialized.
*/
nrfx_err_t nrfx_rng_init(nrfx_rng_config_t const * p_config, nrfx_rng_evt_handler_t handler);
/**
- * @brief Function for starting the random value generation.
+ * @brief Function for starting the generation of random values.
*
- * Function enables interrupts in perihperal and start them.
+ * New data should be handled by handler passed to the @ref nrfx_rng_init() function.
*/
void nrfx_rng_start(void);
/**
- * @brief Function for stoping the random value generation.
+ * @brief Function for stopping the generation of random values.
*
- * Function disables interrupts in perihperal and stop generation of new random values.
+ * Function disables interrupts in peripheral and stops the generation of new random values.
*/
void nrfx_rng_stop(void);
-/**
- * @brief Function for uninitializing the nrfx_rng module.
- */
+/** @brief Function for uninitializing the nrfx_rng module. */
void nrfx_rng_uninit(void);
+/** @} */
+
void nrfx_rng_irq_handler(void);
-/** @} */
-
#ifdef __cplusplus
}
#endif
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_rtc.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_rtc.h
index e41713b..5cc5d81 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_rtc.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_rtc.h
@@ -46,10 +46,10 @@
* @brief Real Timer Counter (RTC) peripheral driver.
*/
-/**@brief Macro to convert microseconds into ticks. */
+/** @brief Macro for converting microseconds into ticks. */
#define NRFX_RTC_US_TO_TICKS(us,freq) (((us) * (freq)) / 1000000U)
-/**@brief RTC driver interrupt types. */
+/** @brief RTC driver interrupt types. */
typedef enum
{
NRFX_RTC_INT_COMPARE0 = 0, /**< Interrupt from COMPARE0 event. */
@@ -60,16 +60,16 @@
NRFX_RTC_INT_OVERFLOW = 5 /**< Interrupt from OVERFLOW event. */
} nrfx_rtc_int_type_t;
-/**@brief RTC driver instance structure. */
+/** @brief RTC driver instance structure. */
typedef struct
{
NRF_RTC_Type * p_reg; /**< Pointer to instance register set. */
IRQn_Type irq; /**< Instance IRQ ID. */
- uint8_t instance_id; /**< Instance index. */
+ uint8_t instance_id; /**< Index of the driver instance. For internal use only. */
uint8_t cc_channel_count; /**< Number of capture/compare channels. */
} nrfx_rtc_t;
-/**@brief Macro for creating RTC driver instance.*/
+/** @brief Macro for creating an RTC driver instance. */
#define NRFX_RTC_INSTANCE(id) \
{ \
.p_reg = NRFX_CONCAT_2(NRF_RTC, id), \
@@ -78,6 +78,7 @@
.cc_channel_count = NRF_RTC_CC_CHANNEL_COUNT(id), \
}
+#ifndef __NRFX_DOXYGEN__
enum {
#if NRFX_CHECK(NRFX_RTC0_ENABLED)
NRFX_RTC0_INST_IDX,
@@ -90,215 +91,223 @@
#endif
NRFX_RTC_ENABLED_COUNT
};
+#endif
-/**@brief RTC driver instance configuration structure. */
+/** @brief RTC driver instance configuration structure. */
typedef struct
{
uint16_t prescaler; /**< Prescaler. */
uint8_t interrupt_priority; /**< Interrupt priority. */
- uint8_t tick_latency; /**< Maximum length of interrupt handler in ticks (max 7.7 ms). */
+ uint8_t tick_latency; /**< Maximum length of the interrupt handler in ticks (maximum 7.7 ms). */
bool reliable; /**< Reliable mode flag. */
} nrfx_rtc_config_t;
-/**@brief RTC instance default configuration. */
+/** @brief RTC instance default configuration. */
#define NRFX_RTC_DEFAULT_CONFIG \
{ \
.prescaler = RTC_FREQ_TO_PRESCALER(NRFX_RTC_DEFAULT_CONFIG_FREQUENCY), \
.interrupt_priority = NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY, \
- .reliable = NRFX_RTC_DEFAULT_CONFIG_RELIABLE, \
.tick_latency = NRFX_RTC_US_TO_TICKS(NRFX_RTC_MAXIMUM_LATENCY_US, \
NRFX_RTC_DEFAULT_CONFIG_FREQUENCY), \
+ .reliable = NRFX_RTC_DEFAULT_CONFIG_RELIABLE, \
}
-/**@brief RTC driver instance handler type. */
+/** @brief RTC driver instance handler type. */
typedef void (*nrfx_rtc_handler_t)(nrfx_rtc_int_type_t int_type);
-/**@brief Function for initializing the RTC driver instance.
+/**
+ * @brief Function for initializing the RTC driver instance.
*
* After initialization, the instance is in power off state.
*
- * @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] p_config Pointer to the structure with initial configuration.
- * @param[in] handler Event handler provided by the user.
- * Must not be NULL.
+ * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] p_config Pointer to the structure with the initial configuration.
+ * @param[in] handler Event handler provided by the user.
+ * Must not be NULL.
*
- * @retval NRFX_SUCCESS If successfully initialized.
- * @retval NRFX_ERROR_INVALID_STATE If the instance is already initialized.
+ * @retval NRFX_SUCCESS Successfully initialized.
+ * @retval NRFX_ERROR_INVALID_STATE The instance is already initialized.
*/
nrfx_err_t nrfx_rtc_init(nrfx_rtc_t const * const p_instance,
nrfx_rtc_config_t const * p_config,
nrfx_rtc_handler_t handler);
-/**@brief Function for uninitializing the RTC driver instance.
+/**
+ * @brief Function for uninitializing the RTC driver instance.
*
* After uninitialization, the instance is in idle state. The hardware should return to the state
- * before initialization. The function asserts if the instance is in idle state.
+ * before initialization.
*
- * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] p_instance Pointer to the driver instance structure.
*/
void nrfx_rtc_uninit(nrfx_rtc_t const * const p_instance);
-/**@brief Function for enabling the RTC driver instance.
+/**
+ * @brief Function for enabling the RTC driver instance.
*
- * @note Function asserts if instance is enabled.
- *
- * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] p_instance Pointer to the driver instance structure.
*/
void nrfx_rtc_enable(nrfx_rtc_t const * const p_instance);
-/**@brief Function for disabling the RTC driver instance.
+/**
+ * @brief Function for disabling the RTC driver instance.
*
- * @note Function asserts if instance is disabled.
- *
- * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] p_instance Pointer to the driver instance structure.
*/
void nrfx_rtc_disable(nrfx_rtc_t const * const p_instance);
-/**@brief Function for setting a compare channel.
+/**
+ * @brief Function for setting a compare channel.
*
- * The function asserts if the instance is not initialized or if the channel parameter is
- * wrong. The function powers on the instance if the instance was in power off state.
+ * The function powers on the instance if the instance was in power off state.
*
* The driver is not entering a critical section when configuring RTC, which means that it can be
- * preempted for a certain amount of time. When the driver was preempted and the value to be set
- * is short in time, there is a risk that the driver sets a compare value that is
- * behind. If RTCn_CONFIG_RELIABLE is 1 for the given instance, the Reliable mode handles that case.
- * However, to detect if the requested value is behind, this mode makes the following assumptions:
- * - The maximum preemption time in ticks (8 - bit value) is known and is less than 7.7 ms
- * (for prescaler = 0, RTC frequency 32 kHz).
- * - The requested absolute compare value is not bigger than (0x00FFFFFF) - tick_latency. It is
- * the user's responsibility to ensure that.
+ * preempted for a certain amount of time. When the driver was preempted and the value to be set
+ * is short in time, there is a risk that the driver sets a compare value that is
+ * behind. In this case, if the reliable mode is enabled for the specified instance,
+ * the risk is handled.
+ * However, to detect if the requested value is behind, this mode makes the following assumptions:
+ * - The maximum preemption time in ticks (8-bit value) is known and is less than 7.7 ms
+ * (for prescaler = 0, RTC frequency 32 kHz).
+ * - The requested absolute compare value is not bigger than (0x00FFFFFF)-tick_latency. It is
+ * the user's responsibility to ensure this.
*
- * @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] channel One of the instance's channels.
- * @param[in] val Absolute value to be set in the compare register.
- * @param[in] enable_irq True to enable the interrupt. False to disable the interrupt.
+ * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] channel One of the channels of the instance.
+ * @param[in] val Absolute value to be set in the compare register.
+ * @param[in] enable_irq True to enable the interrupt. False to disable the interrupt.
*
- * @retval NRFX_SUCCESS If the procedure was successful.
- * @retval NRFX_ERROR_TIMEOUT If the compare was not set because the request value is behind the current counter
- * value. This error can only be reported if RTCn_CONFIG_RELIABLE = 1.
+ * @retval NRFX_SUCCESS The procedure is successful.
+ * @retval NRFX_ERROR_TIMEOUT The compare is not set because the request value is behind the
+ * current counter value. This error can only be reported
+ * if the reliable mode is enabled.
*/
nrfx_err_t nrfx_rtc_cc_set(nrfx_rtc_t const * const p_instance,
uint32_t channel,
uint32_t val,
bool enable_irq);
-/**@brief Function for disabling a channel.
+/**
+ * @brief Function for disabling a channel.
*
- * This function disables channel events and channel interrupts. The function asserts if the instance is not
- * initialized or if the channel parameter is wrong.
+ * This function disables channel events and channel interrupts.
*
- * @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] channel One of the instance's channels.
+ * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] channel One of the channels of the instance.
*
- * @retval NRFX_SUCCESS If the procedure was successful.
- * @retval NRFX_ERROR_TIMEOUT If an interrupt was pending on the requested channel.
+ * @retval NRFX_SUCCESS The procedure is successful.
+ * @retval NRFX_ERROR_TIMEOUT Interrupt is pending on the requested channel.
*/
nrfx_err_t nrfx_rtc_cc_disable(nrfx_rtc_t const * const p_instance, uint32_t channel);
-/**@brief Function for enabling tick.
+/**
+ * @brief Function for enabling the TICK event.
*
- * This function enables the tick event and optionally the interrupt. The function asserts if the instance is not
- * powered on.
+ * This function enables the tick event and optionally the interrupt.
*
- * @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] enable_irq True to enable the interrupt. False to disable the interrupt.
+ * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] enable_irq True to enable the interrupt. False to disable the interrupt.
*/
void nrfx_rtc_tick_enable(nrfx_rtc_t const * const p_instance, bool enable_irq);
-/**@brief Function for disabling tick.
+/**
+ * @brief Function for disabling the TICK event.
*
- * This function disables the tick event and interrupt.
+ * This function disables the TICK event and interrupt.
*
- * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] p_instance Pointer to the driver instance structure.
*/
void nrfx_rtc_tick_disable(nrfx_rtc_t const * const p_instance);
-/**@brief Function for enabling overflow.
+/**
+ * @brief Function for enabling overflow.
*
- * This function enables the overflow event and optionally the interrupt. The function asserts if the instance is
- * not powered on.
+ * This function enables the overflow event and optionally the interrupt.
*
- * @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] enable_irq True to enable the interrupt. False to disable the interrupt.
+ * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] enable_irq True to enable the interrupt. False to disable the interrupt.
*/
void nrfx_rtc_overflow_enable(nrfx_rtc_t const * const p_instance, bool enable_irq);
-/**@brief Function for disabling overflow.
+/**
+ * @brief Function for disabling overflow.
*
* This function disables the overflow event and interrupt.
*
- * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] p_instance Pointer to the driver instance structure.
*/
void nrfx_rtc_overflow_disable(nrfx_rtc_t const * const p_instance);
-/**@brief Function for getting the maximum relative ticks value that can be set in the compare channel.
+/**
+ * @brief Function for getting the maximum relative tick value that can be set in the compare channel.
*
* When a stack (for example SoftDevice) is used and it occupies high priority interrupts,
* the application code can be interrupted at any moment for a certain period of time.
- * If Reliable mode is enabled, the provided maximum latency is taken into account
+ * If the reliable mode is enabled, the provided maximum latency is taken into account
* and the return value is smaller than the RTC counter resolution.
- * If Reliable mode is disabled, the return value equals the counter resolution.
+ * If the reliable mode is disabled, the return value equals the counter resolution.
*
- * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] p_instance Pointer to the driver instance structure.
*
- * @retval ticks Maximum ticks value.
+ * @return Maximum ticks value.
*/
uint32_t nrfx_rtc_max_ticks_get(nrfx_rtc_t const * const p_instance);
-/**@brief Function for disabling all instance interrupts.
+/**
+ * @brief Function for disabling all instance interrupts.
*
- * @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] p_mask Pointer to the location where the mask is filled.
+ * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] p_mask Pointer to the location where the mask is filled.
*/
__STATIC_INLINE void nrfx_rtc_int_disable(nrfx_rtc_t const * const p_instance,
uint32_t * p_mask);
-/**@brief Function for enabling instance interrupts.
+/**
+ * @brief Function for enabling instance interrupts.
*
- * @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] mask Mask of interrupts to enable.
+ * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] mask Mask of interrupts to enable.
*/
__STATIC_INLINE void nrfx_rtc_int_enable(nrfx_rtc_t const * const p_instance, uint32_t mask);
-/**@brief Function for retrieving the current counter value.
+/**
+ * @brief Function for retrieving the current counter value.
*
- * This function asserts if the instance is not powered on or if p_val is NULL.
+ * @param[in] p_instance Pointer to the driver instance structure.
*
- * @param[in] p_instance Pointer to the driver instance structure.
- *
- * @retval value Counter value.
+ * @return Counter value.
*/
__STATIC_INLINE uint32_t nrfx_rtc_counter_get(nrfx_rtc_t const * const p_instance);
-/**@brief Function for clearing the counter value.
+/**
+ * @brief Function for clearing the counter value.
*
- * This function asserts if the instance is not powered on.
- *
- * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] p_instance Pointer to the driver instance structure.
*/
__STATIC_INLINE void nrfx_rtc_counter_clear(nrfx_rtc_t const * const p_instance);
-/**@brief Function for returning a requested task address for the RTC driver instance.
+/**
+ * @brief Function for returning a requested task address for the RTC driver instance.
*
- * This function asserts if the output pointer is NULL. The task address can be used by the PPI module.
+ * The task address can be used by the PPI module.
*
- * @param[in] p_instance Pointer to the instance.
- * @param[in] task One of the peripheral tasks.
+ * @param[in] p_instance Pointer to the instance.
+ * @param[in] task One of the peripheral tasks.
*
- * @retval Address of task register.
+ * @return Address of task register.
*/
__STATIC_INLINE uint32_t nrfx_rtc_task_address_get(nrfx_rtc_t const * const p_instance,
nrf_rtc_task_t task);
-/**@brief Function for returning a requested event address for the RTC driver instance.
+/**
+ * @brief Function for returning a requested event address for the RTC driver instance.
*
- * This function asserts if the output pointer is NULL. The event address can be used by the PPI module.
+ * The event address can be used by the PPI module.
*
- * @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] event One of the peripheral events.
+ * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] event One of the peripheral events.
*
- * @retval Address of event register.
+ * @return Address of event register.
*/
__STATIC_INLINE uint32_t nrfx_rtc_event_address_get(nrfx_rtc_t const * const p_instance,
nrf_rtc_event_t event);
@@ -345,14 +354,14 @@
}
#endif // SUPPRESS_INLINE_IMPLEMENTATION
+/** @} */
+
void nrfx_rtc_0_irq_handler(void);
void nrfx_rtc_1_irq_handler(void);
void nrfx_rtc_2_irq_handler(void);
-/** @} */
-
#ifdef __cplusplus
}
#endif
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_saadc.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_saadc.h
index 0813526..addb974 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_saadc.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_saadc.h
@@ -46,18 +46,12 @@
* @brief Successive Approximation Analog-to-Digital Converter (SAADC) peripheral driver.
*/
-/**
- * @brief Value that should be set as high limit to disable limit detection.
- */
+/** @brief Value to be set as high limit to disable limit detection. */
#define NRFX_SAADC_LIMITH_DISABLED (2047)
-/**
- * @brief Value that should be set as low limit to disable limit detection.
- */
+/** @brief Value to be set as low limit to disable limit detection. */
#define NRFX_SAADC_LIMITL_DISABLED (-2048)
-/**
- * @brief Macro for setting @ref nrfx_saadc_config_t to default settings.
- */
+/** @brief Macro for setting @ref nrfx_saadc_config_t to default settings. */
#define NRFX_SAADC_DEFAULT_CONFIG \
{ \
.resolution = (nrf_saadc_resolution_t)NRFX_SAADC_CONFIG_RESOLUTION, \
@@ -68,7 +62,7 @@
/**
* @brief Macro for setting @ref nrf_saadc_channel_config_t to default settings
- * in single ended mode.
+ * in single-ended mode.
*
* @param PIN_P Analog input.
*/
@@ -100,13 +94,12 @@
.reference = NRF_SAADC_REFERENCE_INTERNAL, \
.acq_time = NRF_SAADC_ACQTIME_10US, \
.mode = NRF_SAADC_MODE_DIFFERENTIAL, \
+ .burst = NRF_SAADC_BURST_DISABLED, \
.pin_p = (nrf_saadc_input_t)(PIN_P), \
.pin_n = (nrf_saadc_input_t)(PIN_N) \
}
-/**
- * @brief Analog-to-digital converter driver configuration structure.
- */
+/** @brief SAADC driver configuration structure. */
typedef struct
{
nrf_saadc_resolution_t resolution; ///< Resolution configuration.
@@ -115,9 +108,7 @@
bool low_power_mode; ///< Indicates if low power mode is active.
} nrfx_saadc_config_t;
-/**
- * @brief Driver event types.
- */
+/** @brief SAADC driver event types. */
typedef enum
{
NRFX_SAADC_EVT_DONE, ///< Event generated when the buffer is filled with samples.
@@ -125,27 +116,21 @@
NRFX_SAADC_EVT_CALIBRATEDONE ///< Event generated when the calibration is complete.
} nrfx_saadc_evt_type_t;
-/**
- * @brief Analog-to-digital converter driver done event data.
- */
+/** @brief SAADC driver done event data. */
typedef struct
{
nrf_saadc_value_t * p_buffer; ///< Pointer to buffer with converted samples.
uint16_t size; ///< Number of samples in the buffer.
} nrfx_saadc_done_evt_t;
-/**
- * @brief Analog-to-digital converter driver limit event data.
- */
+/** @brief SAADC driver limit event data. */
typedef struct
{
uint8_t channel; ///< Channel on which the limit was detected.
nrf_saadc_limit_t limit_type; ///< Type of limit detected.
} nrfx_saadc_limit_evt_t;
-/**
- * @brief Analog-to-digital converter driver event structure.
- */
+/** @brief SAADC driver event structure. */
typedef struct
{
nrfx_saadc_evt_type_t type; ///< Event type.
@@ -153,15 +138,14 @@
{
nrfx_saadc_done_evt_t done; ///< Data for @ref NRFX_SAADC_EVT_DONE event.
nrfx_saadc_limit_evt_t limit; ///< Data for @ref NRFX_SAADC_EVT_LIMIT event.
- } data;
+ } data; ///< Union to store event data.
} nrfx_saadc_evt_t;
/**
- * @brief ADC event handler.
+ * @brief SAADC driver event handler.
*
- * @param[in] p_event Pointer to an ADC event. The event structure is allocated on
- * the stack, so it is valid only within the context of
- * the event handler.
+ * @param[in] p_event Pointer to an SAADC driver event. The event structure is allocated on
+ * the stack, so it is valid only within the context of the event handler.
*/
typedef void (* nrfx_saadc_event_handler_t)(nrfx_saadc_evt_t const * p_event);
@@ -172,8 +156,8 @@
* @param[in] event_handler Event handler provided by the user.
* Must not be NULL.
*
- * @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_INVALID_STATE If the driver is already initialized.
+ * @retval NRFX_SUCCESS Initialization was successful.
+ * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized.
*/
nrfx_err_t nrfx_saadc_init(nrfx_saadc_config_t const * p_config,
nrfx_saadc_event_handler_t event_handler);
@@ -189,7 +173,7 @@
/**
* @brief Function for getting the address of a SAMPLE SAADC task.
*
- * @return Task address.
+ * @return Task address.
*/
uint32_t nrfx_saadc_sample_task_get(void);
@@ -198,43 +182,47 @@
*
* This function configures and enables the channel.
*
- * @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_INVALID_STATE If the ADC was not initialized.
- * @retval NRFX_ERROR_NO_MEM If the specified channel was already allocated.
+ * @param[in] channel Channel index.
+ * @param[in] p_config Pointer to the structure with the initial configuration.
+ *
+ * @retval NRFX_SUCCESS Initialization was successful.
+ * @retval NRFX_ERROR_INVALID_STATE The SAADC was not initialized.
+ * @retval NRFX_ERROR_NO_MEM The specified channel was already allocated.
*/
nrfx_err_t nrfx_saadc_channel_init(uint8_t channel,
nrf_saadc_channel_config_t const * const p_config);
-
/**
* @brief Function for uninitializing an SAADC channel.
*
- * @retval NRFX_SUCCESS If uninitialization was successful.
- * @retval NRFX_ERROR_BUSY If the ADC is busy.
+ * @param[in] channel Channel index.
+ *
+ * @retval NRFX_SUCCESS Uninitialization was successful.
+ * @retval NRFX_ERROR_BUSY The SAADC is busy.
*/
nrfx_err_t nrfx_saadc_channel_uninit(uint8_t channel);
/**
- * @brief Function for starting SAADC sampling.
+ * @brief Function for starting the SAADC sampling.
*
- * @retval NRFX_SUCCESS If ADC sampling was triggered.
- * @retval NRFX_ERROR_INVALID_STATE If ADC is in idle state.
+ * @retval NRFX_SUCCESS The SAADC sampling was triggered.
+ * @retval NRFX_ERROR_INVALID_STATE The SAADC is in idle state.
*/
nrfx_err_t nrfx_saadc_sample(void);
/**
- * @brief Blocking function for executing a single ADC conversion.
+ * @brief Blocking function for executing a single SAADC conversion.
*
* This function selects the desired input, starts a single conversion,
* waits for it to finish, and returns the result.
*
- * The function will fail if ADC is busy.
+ * The function fails if the SAADC is busy.
*
* @param[in] channel Channel.
- * @param[out] p_value Pointer to the location where the result should be placed.
+ * @param[out] p_value Pointer to the location where the result is to be placed.
*
- * @retval NRFX_SUCCESS If conversion was successful.
- * @retval NRFX_ERROR_BUSY If the ADC driver is busy.
+ * @retval NRFX_SUCCESS The conversion was successful.
+ * @retval NRFX_ERROR_BUSY The SAADC driver is busy.
*/
nrfx_err_t nrfx_saadc_sample_convert(uint8_t channel, nrf_saadc_value_t * p_value);
@@ -242,45 +230,47 @@
* @brief Function for issuing conversion of data to the buffer.
*
* This function is non-blocking. The application is notified about filling the buffer by the event
- * handler. Conversion will be done on all enabled channels. If the ADC is in idle state, the
- * function will set up Easy DMA for the conversion. The ADC will be ready for sampling and wait for
- * the SAMPLE task. It can be triggered manually by the @ref nrfx_saadc_sample function or by PPI
- * using the @ref NRF_SAADC_TASK_SAMPLE task. If one buffer is already set and the conversion is
- * ongoing, calling this function will result in queuing the given buffer. The driver will start
- * filling the issued buffer when the first one is completed. If the function is called again before
- * the first buffer is filled or calibration is in progress, it will return with error.
+ * handler. Conversion will be done on all enabled channels. If the SAADC is in idle state, the
+ * function will set up EasyDMA for the conversion. The SAADC will be ready for sampling and wait
+ * for the SAMPLE task. It can be triggered manually by the @ref nrfx_saadc_sample function
+ * or by PPI using the @ref NRF_SAADC_TASK_SAMPLE task. If one buffer is already set and the
+ * conversion is ongoing, calling this function will result in queuing the given buffer.
+ * The driver will start filling the issued buffer when the first one is completed.
+ * If the function is called again before the first buffer is filled or calibration
+ * is in progress, it will return with error.
*
* @param[in] buffer Result buffer.
* @param[in] size Buffer size in words.
*
- * @retval NRFX_SUCCESS If conversion was successful.
- * @retval NRFX_ERROR_BUSY If the driver already has two buffers set or calibration is in progress.
+ * @retval NRFX_SUCCESS The conversion was successful.
+ * @retval NRFX_ERROR_BUSY The driver already has two buffers set or the calibration is in progress.
*/
nrfx_err_t nrfx_saadc_buffer_convert(nrf_saadc_value_t * buffer, uint16_t size);
/**
- * @brief Function for triggering the ADC offset calibration.
+ * @brief Function for triggering the SAADC offset calibration.
*
* This function is non-blocking. The application is notified about completion by the event handler.
* Calibration will also trigger DONE and RESULTDONE events.
*
- * The function will fail if ADC is busy or calibration is already in progress.
+ * The function will fail if the SAADC is busy or calibration is already in progress.
*
- * @retval NRFX_SUCCESS If calibration was started successfully.
- * @retval NRFX_ERROR_BUSY If the ADC driver is busy.
+ * @retval NRFX_SUCCESS The calibration was started successfully.
+ * @retval NRFX_ERROR_BUSY The SAADC driver is busy.
*/
nrfx_err_t nrfx_saadc_calibrate_offset(void);
/**
* @brief Function for retrieving the SAADC state.
*
- * @retval true If the ADC is busy.
- * @retval false If the ADC is ready.
+ * @retval true The SAADC is busy.
+ * @retval false The SAADC is ready.
*/
bool nrfx_saadc_is_busy(void);
/**
- * @brief Function for aborting ongoing and buffered conversions.
+ * @brief Function for aborting the ongoing and buffered conversions.
+ *
* @note @ref NRFX_SAADC_EVT_DONE event will be generated if there is a conversion in progress.
* Event will contain number of words in the sample buffer.
*/
@@ -303,12 +293,12 @@
*/
void nrfx_saadc_limits_set(uint8_t channel, int16_t limit_low, int16_t limit_high);
+/** @} */
+
void nrfx_saadc_irq_handler(void);
-/** @} */
-
#ifdef __cplusplus
}
#endif
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_spi.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_spi.h
index 91d0b0a..9128a2f 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_spi.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_spi.h
@@ -43,16 +43,14 @@
* @defgroup nrfx_spi SPI driver
* @{
* @ingroup nrf_spi
- * @brief SPI peripheral driver.
+ * @brief Serial Peripheral Interface master (SPI) driver.
*/
-/**
- * @brief SPI master driver instance data structure.
- */
+/** @brief Data structure of the Serial Peripheral Interface master (SPI) driver instance. */
typedef struct
{
NRF_SPI_Type * p_reg; ///< Pointer to a structure with SPI registers.
- uint8_t drv_inst_idx; ///< Driver instance index.
+ uint8_t drv_inst_idx; ///< Index of the driver instance. For internal use only.
} nrfx_spi_t;
enum {
@@ -68,9 +66,7 @@
NRFX_SPI_ENABLED_COUNT
};
-/**
- * @brief Macro for creating an SPI master driver instance.
- */
+/** @brief Macro for creating an instance of the SPI master driver. */
#define NRFX_SPI_INSTANCE(id) \
{ \
.p_reg = NRFX_CONCAT_2(NRF_SPI, id), \
@@ -84,9 +80,7 @@
*/
#define NRFX_SPI_PIN_NOT_USED 0xFF
-/**
- * @brief SPI master driver instance configuration structure.
- */
+/** @brief Configuration structure of the SPI master driver instance. */
typedef struct
{
uint8_t sck_pin; ///< SCK pin number.
@@ -100,10 +94,10 @@
/**< Set to @ref NRFX_SPI_PIN_NOT_USED
* if this signal is not needed. The driver
* supports only active low for this signal.
- * If the signal should be active high,
+ * If the signal must be active high,
* it must be controlled externally. */
uint8_t irq_priority; ///< Interrupt priority.
- uint8_t orc; ///< Over-run character.
+ uint8_t orc; ///< Overrun character.
/**< This character is used when all bytes from the TX buffer are sent,
but the transfer continues due to RX. */
nrf_spi_frequency_t frequency; ///< SPI frequency.
@@ -111,9 +105,7 @@
nrf_spi_bit_order_t bit_order; ///< SPI bit order.
} nrfx_spi_config_t;
-/**
- * @brief SPI master instance default configuration.
- */
+/** @brief SPI master instance default configuration. */
#define NRFX_SPI_DEFAULT_CONFIG \
{ \
.sck_pin = NRFX_SPI_PIN_NOT_USED, \
@@ -127,45 +119,37 @@
.bit_order = NRF_SPI_BIT_ORDER_MSB_FIRST, \
}
-/**
- * @brief Single transfer descriptor structure.
- */
+/** @brief Single transfer descriptor structure. */
typedef struct
{
uint8_t const * p_tx_buffer; ///< Pointer to TX buffer.
size_t tx_length; ///< TX buffer length.
uint8_t * p_rx_buffer; ///< Pointer to RX buffer.
size_t rx_length; ///< RX buffer length.
-} nrfx_spi_xfer_desc_t;
+}nrfx_spi_xfer_desc_t;
/**
* @brief Macro for setting up single transfer descriptor.
*
* This macro is for internal use only.
*/
-#define NRFX_SPI_SINGLE_XFER(p_tx, tx_len, p_rx, rx_len) \
- { \
- .p_tx_buffer = (uint8_t const *)(p_tx), \
- .tx_length = (tx_len), \
- .p_rx_buffer = (p_rx), \
- .rx_length = (rx_len), \
- }
+#define NRFX_SPI_SINGLE_XFER(p_tx, tx_len, p_rx, rx_len) \
+{ \
+ .p_tx_buffer = (uint8_t const *)(p_tx), \
+ .tx_length = (tx_len), \
+ .p_rx_buffer = (p_rx), \
+ .rx_length = (rx_len), \
+}
-/**
- * @brief Macro for setting duplex TX RX transfer.
- */
+/** @brief Macro for setting the duplex TX RX transfer. */
#define NRFX_SPI_XFER_TRX(p_tx_buf, tx_length, p_rx_buf, rx_length) \
NRFX_SPI_SINGLE_XFER(p_tx_buf, tx_length, p_rx_buf, rx_length)
-/**
- * @brief Macro for setting TX transfer.
- */
+/** @brief Macro for setting the TX transfer. */
#define NRFX_SPI_XFER_TX(p_buf, length) \
NRFX_SPI_SINGLE_XFER(p_buf, length, NULL, 0)
-/**
- * @brief Macro for setting RX transfer.
- */
+/** @brief Macro for setting the RX transfer. */
#define NRFX_SPI_XFER_RX(p_buf, length) \
NRFX_SPI_SINGLE_XFER(NULL, 0, p_buf, length)
@@ -178,15 +162,14 @@
NRFX_SPI_EVENT_DONE, ///< Transfer done.
} nrfx_spi_evt_type_t;
+/** @brief SPI master event description with transmission details. */
typedef struct
{
nrfx_spi_evt_type_t type; ///< Event type.
nrfx_spi_xfer_desc_t xfer_desc; ///< Transfer details.
} nrfx_spi_evt_t;
-/**
- * @brief SPI master driver event handler type.
- */
+/** @brief SPI master driver event handler type. */
typedef void (* nrfx_spi_evt_handler_t)(nrfx_spi_evt_t const * p_event,
void * p_context);
@@ -196,15 +179,14 @@
* This function configures and enables the specified peripheral.
*
* @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] p_config Pointer to the structure with initial configuration.
- *
- * @param handler Event handler provided by the user. If NULL, transfers
+ * @param[in] p_config Pointer to the structure with the initial configuration.
+ * @param[in] handler Event handler provided by the user. If NULL, transfers
* will be performed in blocking mode.
- * @param p_context Context passed to event handler.
+ * @param[in] p_context Context passed to the event handler.
*
- * @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_INVALID_STATE If the driver was already initialized.
- * @retval NRFX_ERROR_BUSY If some other peripheral with the same
+ * @retval NRFX_SUCCESS Initialization was successful.
+ * @retval NRFX_ERROR_INVALID_STATE The driver was already initialized.
+ * @retval NRFX_ERROR_BUSY Some other peripheral with the same
* instance ID is already in use. This is
* possible only if @ref nrfx_prs module
* is enabled.
@@ -219,7 +201,7 @@
*
* @param[in] p_instance Pointer to the driver instance structure.
*/
-void nrfx_spi_uninit(nrfx_spi_t const * const p_instance);
+void nrfx_spi_uninit(nrfx_spi_t const * const p_instance);
/**
* @brief Function for starting the SPI data transfer.
@@ -234,29 +216,29 @@
* @param flags Transfer options (0 for default settings).
* Currently, no additional flags are available.
*
- * @retval NRFX_SUCCESS If the procedure was successful.
- * @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer.
- * @retval NRFX_ERROR_NOT_SUPPORTED If the provided parameters are not supported.
+ * @retval NRFX_SUCCESS The procedure is successful.
+ * @retval NRFX_ERROR_BUSY The driver is not ready for a new transfer.
+ * @retval NRFX_ERROR_NOT_SUPPORTED The provided parameters are not supported.
*/
nrfx_err_t nrfx_spi_xfer(nrfx_spi_t const * const p_instance,
nrfx_spi_xfer_desc_t const * p_xfer_desc,
uint32_t flags);
/**
- * @brief Function for aborting ongoing transfer.
+ * @brief Function for aborting the ongoing transfer.
*
* @param[in] p_instance Pointer to the driver instance structure.
*/
void nrfx_spi_abort(nrfx_spi_t const * p_instance);
+/** @} */
+
void nrfx_spi_0_irq_handler(void);
void nrfx_spi_1_irq_handler(void);
void nrfx_spi_2_irq_handler(void);
-/** @} */
-
#ifdef __cplusplus
}
#endif
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_spim.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_spim.h
index 241f953..3efd4bd 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_spim.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_spim.h
@@ -43,18 +43,17 @@
* @defgroup nrfx_spim SPIM driver
* @{
* @ingroup nrf_spim
- * @brief SPIM peripheral driver.
+ * @brief Serial Peripheral Interface Master with EasyDMA (SPIM) driver.
*/
-/**
- * @brief SPIM master driver instance data structure.
- */
+/** @brief Data structure of the Serial Peripheral Interface Master with EasyDMA (SPIM) driver instance. */
typedef struct
{
NRF_SPIM_Type * p_reg; ///< Pointer to a structure with SPIM registers.
- uint8_t drv_inst_idx; ///< Driver instance index.
+ uint8_t drv_inst_idx; ///< Index of the driver instance. For internal use only.
} nrfx_spim_t;
+#ifndef __NRFX_DOXYGEN__
enum {
#if NRFX_CHECK(NRFX_SPIM0_ENABLED)
NRFX_SPIM0_INST_IDX,
@@ -70,10 +69,9 @@
#endif
NRFX_SPIM_ENABLED_COUNT
};
+#endif
-/**
- * @brief Macro for creating an SPIM master driver instance.
- */
+/** @brief Macro for creating an instance of the SPIM driver. */
#define NRFX_SPIM_INSTANCE(id) \
{ \
.p_reg = NRFX_CONCAT_2(NRF_SPIM, id), \
@@ -87,9 +85,7 @@
*/
#define NRFX_SPIM_PIN_NOT_USED 0xFF
-/**
- * @brief SPIM master driver instance configuration structure.
- */
+/** @brief Configuration structure of the SPIM driver instance. */
typedef struct
{
uint8_t sck_pin; ///< SCK pin number.
@@ -104,44 +100,42 @@
* if this signal is not needed. */
bool ss_active_high; ///< Polarity of the Slave Select pin during transmission.
uint8_t irq_priority; ///< Interrupt priority.
- uint8_t orc; ///< Over-run character.
+ uint8_t orc; ///< Overrun character.
/**< This character is used when all bytes from the TX buffer are sent,
but the transfer continues due to RX. */
- nrf_spim_frequency_t frequency; ///< SPI frequency.
- nrf_spim_mode_t mode; ///< SPI mode.
- nrf_spim_bit_order_t bit_order; ///< SPI bit order.
+ nrf_spim_frequency_t frequency; ///< SPIM frequency.
+ nrf_spim_mode_t mode; ///< SPIM mode.
+ nrf_spim_bit_order_t bit_order; ///< SPIM bit order.
#if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) || defined(__NRFX_DOXYGEN__)
uint8_t dcx_pin; ///< D/CX pin number (optional).
uint8_t rx_delay; ///< Sample delay for input serial data on MISO.
/**< The value specifies the delay, in number of 64 MHz clock cycles
* (15.625 ns), from the the sampling edge of SCK (leading edge for
* CONFIG.CPHA = 0, trailing edge for CONFIG.CPHA = 1) until
- * the input serial data is sampled.*/
+ * the input serial data is sampled. */
bool use_hw_ss; ///< Indication to use software or hardware controlled Slave Select pin.
uint8_t ss_duration; ///< Slave Select duration before and after transmission.
/**< Minimum duration between the edge of CSN and the edge of SCK and minimum
* duration of CSN must stay inactive between transactions.
* The value is specified in number of 64 MHz clock cycles (15.625 ns).
- * Supported only for hardware controlled Slave Select.*/
+ * Supported only for hardware-controlled Slave Select. */
#endif
} nrfx_spim_config_t;
#if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) || defined(__NRFX_DOXYGEN__)
/**
- * @brief SPIM master instance extended default configuration.
+ * @brief Extended default configuration of the SPIM instance.
*/
#define NRFX_SPIM_DEFAULT_EXTENDED_CONFIG \
.dcx_pin = NRFX_SPIM_PIN_NOT_USED, \
.rx_delay = 0x02, \
- .ss_duration = 0x02, \
- .use_hw_ss = false,
+ .use_hw_ss = false, \
+ .ss_duration = 0x02,
#else
#define NRFX_SPIM_DEFAULT_EXTENDED_CONFIG
#endif
-/**
- * @brief SPIM master instance default configuration.
- */
+/** @brief The default configuration of the SPIM master instance. */
#define NRFX_SPIM_DEFAULT_CONFIG \
{ \
.sck_pin = NRFX_SPIM_PIN_NOT_USED, \
@@ -157,15 +151,18 @@
NRFX_SPIM_DEFAULT_EXTENDED_CONFIG \
}
-#define NRFX_SPIM_FLAG_TX_POSTINC (1UL << 0) /**< TX buffer address incremented after transfer. */
-#define NRFX_SPIM_FLAG_RX_POSTINC (1UL << 1) /**< RX buffer address incremented after transfer. */
-#define NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER (1UL << 2) /**< Interrupt after each transfer is suppressed, and the event handler is not called. */
-#define NRFX_SPIM_FLAG_HOLD_XFER (1UL << 3) /**< Set up the transfer but do not start it. */
-#define NRFX_SPIM_FLAG_REPEATED_XFER (1UL << 4) /**< Flag indicating that the transfer will be executed multiple times. */
+/** @brief Flag indicating that TX buffer address will be incremented after transfer. */
+#define NRFX_SPIM_FLAG_TX_POSTINC (1UL << 0)
+/** @brief Flag indicating that RX buffer address will be incremented after transfer. */
+#define NRFX_SPIM_FLAG_RX_POSTINC (1UL << 1)
+/** @brief Flag indicating that the interrupt after each transfer will be suppressed, and the event handler will not be called. */
+#define NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER (1UL << 2)
+/** @brief Flag indicating that the transfer will be set up, but not started. */
+#define NRFX_SPIM_FLAG_HOLD_XFER (1UL << 3)
+/** @brief Flag indicating that the transfer will be executed multiple times. */
+#define NRFX_SPIM_FLAG_REPEATED_XFER (1UL << 4)
-/**
- * @brief Single transfer descriptor structure.
- */
+/** @brief Single transfer descriptor structure. */
typedef struct
{
uint8_t const * p_tx_buffer; ///< Pointer to TX buffer.
@@ -179,29 +176,23 @@
*
* This macro is for internal use only.
*/
-#define NRFX_SPIM_SINGLE_XFER(p_tx, tx_len, p_rx, rx_len) \
- { \
- .p_tx_buffer = (uint8_t const *)(p_tx), \
- .tx_length = (tx_len), \
- .p_rx_buffer = (p_rx), \
- .rx_length = (rx_len), \
+#define NRFX_SPIM_SINGLE_XFER(p_tx, tx_len, p_rx, rx_len) \
+ { \
+ .p_tx_buffer = (uint8_t const *)(p_tx), \
+ .tx_length = (tx_len), \
+ .p_rx_buffer = (p_rx), \
+ .rx_length = (rx_len), \
}
-/**
- * @brief Macro for setting duplex TX RX transfer.
- */
-#define NRFX_SPIM_XFER_TRX(p_tx_buf, tx_length, p_rx_buf, rx_length) \
+/** @brief Macro for setting the duplex TX RX transfer. */
+#define NRFX_SPIM_XFER_TRX(p_tx_buf, tx_length, p_rx_buf, rx_length) \
NRFX_SPIM_SINGLE_XFER(p_tx_buf, tx_length, p_rx_buf, rx_length)
-/**
- * @brief Macro for setting TX transfer.
- */
+/** @brief Macro for setting the TX transfer. */
#define NRFX_SPIM_XFER_TX(p_buf, length) \
NRFX_SPIM_SINGLE_XFER(p_buf, length, NULL, 0)
-/**
- * @brief Macro for setting RX transfer.
- */
+/** @brief Macro for setting the RX transfer. */
#define NRFX_SPIM_XFER_RX(p_buf, length) \
NRFX_SPIM_SINGLE_XFER(NULL, 0, p_buf, length)
@@ -214,37 +205,35 @@
NRFX_SPIM_EVENT_DONE, ///< Transfer done.
} nrfx_spim_evt_type_t;
+/** @brief SPIM event description with transmission details. */
typedef struct
{
nrfx_spim_evt_type_t type; ///< Event type.
nrfx_spim_xfer_desc_t xfer_desc; ///< Transfer details.
} nrfx_spim_evt_t;
-/**
- * @brief SPIM master driver event handler type.
- */
+/** @brief SPIM driver event handler type. */
typedef void (* nrfx_spim_evt_handler_t)(nrfx_spim_evt_t const * p_event,
void * p_context);
/**
- * @brief Function for initializing the SPI master driver instance.
+ * @brief Function for initializing the SPIM driver instance.
*
* This function configures and enables the specified peripheral.
*
* @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] p_config Pointer to the structure with initial configuration.
- *
- * @param handler Event handler provided by the user. If NULL, transfers
+ * @param[in] p_config Pointer to the structure with the initial configuration.
+ * @param[in] handler Event handler provided by the user. If NULL, transfers
* will be performed in blocking mode.
- * @param p_context Context passed to event handler.
+ * @param[in] p_context Context passed to event handler.
*
- * @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_INVALID_STATE If the driver was already initialized.
- * @retval NRFX_ERROR_BUSY If some other peripheral with the same
+ * @retval NRFX_SUCCESS Initialization was successful.
+ * @retval NRFX_ERROR_INVALID_STATE The driver was already initialized.
+ * @retval NRFX_ERROR_BUSY Some other peripheral with the same
* instance ID is already in use. This is
* possible only if @ref nrfx_prs module
* is enabled.
- * @retval NRFX_ERROR_NOT_SUPPORTED If requested configuration is not supported
+ * @retval NRFX_ERROR_NOT_SUPPORTED Requested configuration is not supported
* by the SPIM instance.
*/
nrfx_err_t nrfx_spim_init(nrfx_spim_t const * const p_instance,
@@ -253,30 +242,30 @@
void * p_context);
/**
- * @brief Function for uninitializing the SPI master driver instance.
+ * @brief Function for uninitializing the SPIM driver instance.
*
* @param[in] p_instance Pointer to the driver instance structure.
*/
void nrfx_spim_uninit(nrfx_spim_t const * const p_instance);
/**
- * @brief Function for starting the SPI data transfer.
+ * @brief Function for starting the SPIM data transfer.
*
* Additional options are provided using the @c flags parameter:
*
- * - @ref NRFX_SPIM_FLAG_TX_POSTINC and @ref NRFX_SPIM_FLAG_RX_POSTINC<span></span>:
- * Post-incrementation of buffer addresses. Supported only by SPIM.
- * - @ref NRFX_SPIM_FLAG_HOLD_XFER<span></span>: Driver is not starting the transfer. Use this
- * flag if the transfer is triggered externally by PPI. Supported only by SPIM. Use
+ * - @ref NRFX_SPIM_FLAG_TX_POSTINC and @ref NRFX_SPIM_FLAG_RX_POSTINC -
+ * Post-incrementation of buffer addresses.
+ * - @ref NRFX_SPIM_FLAG_HOLD_XFER - Driver is not starting the transfer. Use this
+ * flag if the transfer is triggered externally by PPI. Use
* @ref nrfx_spim_start_task_get to get the address of the start task.
- * - @ref NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER<span></span>: No user event handler after transfer
- * completion. This also means no interrupt at the end of the transfer. Supported only by SPIM.
+ * - @ref NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER - No user event handler after transfer
+ * completion. This also means no interrupt at the end of the transfer.
* If @ref NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER is used, the driver does not set the instance into
* busy state, so you must ensure that the next transfers are set up when SPIM is not active.
* @ref nrfx_spim_end_event_get function can be used to detect end of transfer. Option can be used
* together with @ref NRFX_SPIM_FLAG_REPEATED_XFER to prepare a sequence of SPI transfers
* without interruptions.
- * - @ref NRFX_SPIM_FLAG_REPEATED_XFER<span></span>: Prepare for repeated transfers. You can set
+ * - @ref NRFX_SPIM_FLAG_REPEATED_XFER - Prepare for repeated transfers. You can set
* up a number of transfers that will be triggered externally (for example by PPI). An example is
* a TXRX transfer with the options @ref NRFX_SPIM_FLAG_RX_POSTINC,
* @ref NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER, and @ref NRFX_SPIM_FLAG_REPEATED_XFER. After the
@@ -285,7 +274,7 @@
* @ref nrfx_spim_end_event_get can be used to get the address of the END event, which can be
* used to count the number of transfers. If @ref NRFX_SPIM_FLAG_REPEATED_XFER is used,
* the driver does not set the instance into busy state, so you must ensure that the next
- * transfers are set up when SPIM is not active. Supported only by SPIM.
+ * transfers are set up when SPIM is not active.
*
* @note Peripherals using EasyDMA (including SPIM) require the transfer buffers
* to be placed in the Data RAM region. If this condition is not met,
@@ -295,10 +284,10 @@
* @param p_xfer_desc Pointer to the transfer descriptor.
* @param flags Transfer options (0 for default settings).
*
- * @retval NRFX_SUCCESS If the procedure was successful.
- * @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer.
- * @retval NRFX_ERROR_NOT_SUPPORTED If the provided parameters are not supported.
- * @retval NRFX_ERROR_INVALID_ADDR If the provided buffers are not placed in the Data
+ * @retval NRFX_SUCCESS The procedure is successful.
+ * @retval NRFX_ERROR_BUSY The driver is not ready for a new transfer.
+ * @retval NRFX_ERROR_NOT_SUPPORTED The provided parameters are not supported.
+ * @retval NRFX_ERROR_INVALID_ADDR The provided buffers are not placed in the Data
* RAM region.
*/
nrfx_err_t nrfx_spim_xfer(nrfx_spim_t const * const p_instance,
@@ -307,7 +296,7 @@
#if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) || defined(__NRFX_DOXYGEN__)
/**
- * @brief Function for starting the SPI data transfer with DCX control.
+ * @brief Function for starting the SPIM data transfer with DCX control.
*
* See @ref nrfx_spim_xfer for description of additional options of transfer
* provided by the @c flags parameter.
@@ -328,11 +317,11 @@
* @c cmd_length parameter causes all transmitted bytes
* to be marked as command bytes.
*
- * @retval NRFX_SUCCESS If the procedure was successful.
- * @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer.
- * @retval NRFX_ERROR_NOT_SUPPORTED If the provided parameters are not supported.
- * @retval NRFX_ERROR_INVALID_ADDR If the provided buffers are not placed in the Data
- * RAM region.
+ * @retval NRFX_SUCCESS The procedure is successful.
+ * @retval NRFX_ERROR_BUSY The driver is not ready for a new transfer.
+ * @retval NRFX_ERROR_NOT_SUPPORTED The provided parameters are not supported.
+ * @retval NRFX_ERROR_INVALID_ADDR The provided buffers are not placed in the Data
+ * RAM region.
*/
nrfx_err_t nrfx_spim_xfer_dcx(nrfx_spim_t const * const p_instance,
nrfx_spim_xfer_desc_t const * p_xfer_desc,
@@ -343,12 +332,12 @@
/**
* @brief Function for returning the address of a SPIM start task.
*
- * This function should be used if @ref nrfx_spim_xfer was called with the flag @ref NRFX_SPIM_FLAG_HOLD_XFER.
+ * This function is to be used if @ref nrfx_spim_xfer was called with the flag @ref NRFX_SPIM_FLAG_HOLD_XFER.
* In that case, the transfer is not started by the driver, but it must be started externally by PPI.
*
- * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] p_instance Pointer to the driver instance structure.
*
- * @return Start task address.
+ * @return Start task address.
*/
uint32_t nrfx_spim_start_task_get(nrfx_spim_t const * p_instance);
@@ -367,10 +356,12 @@
/**
* @brief Function for aborting ongoing transfer.
*
- * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] p_instance Pointer to the driver instance structure.
*/
void nrfx_spim_abort(nrfx_spim_t const * p_instance);
+/** @} */
+
void nrfx_spim_0_irq_handler(void);
void nrfx_spim_1_irq_handler(void);
@@ -378,8 +369,6 @@
void nrfx_spim_3_irq_handler(void);
-/** @} */
-
#ifdef __cplusplus
}
#endif
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_spis.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_spis.h
index 370e124..aa68ce4 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_spis.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_spis.h
@@ -41,19 +41,20 @@
#endif
/**
- * @defgroup nrfx_spis SPI slave driver
+ * @defgroup nrfx_spis SPIS driver
* @{
* @ingroup nrf_spis
- * @brief SPI Slave peripheral driver.
+ * @brief Serial Peripheral Interface Slave with EasyDMA (SPIS) driver.
*/
-/** @brief SPI slave driver instance data structure. */
+/** @brief Data structure for the Serial Peripheral Interface Slave with EasyDMA (SPIS) driver instance. */
typedef struct
{
NRF_SPIS_Type * p_reg; //!< Pointer to a structure with SPIS registers.
- uint8_t drv_inst_idx; //!< Driver instance index.
+ uint8_t drv_inst_idx; //!< Index of the driver instance. For internal use only.
} nrfx_spis_t;
+#ifndef __NRFX_DOXYGEN__
enum {
#if NRFX_CHECK(NRFX_SPIS0_ENABLED)
NRFX_SPIS0_INST_IDX,
@@ -69,8 +70,9 @@
#endif
NRFX_SPIS_ENABLED_COUNT
};
+#endif
-/** @brief Macro for creating an SPI slave driver instance. */
+/** @brief Macro for creating an instance of the SPI slave driver. */
#define NRFX_SPIS_INSTANCE(id) \
{ \
.p_reg = NRFX_CONCAT_2(NRF_SPIS, id), \
@@ -105,12 +107,12 @@
size_t tx_amount; //!< Number of bytes transmitted in the last transaction. This parameter is only valid for @ref NRFX_SPIS_XFER_DONE events.
} nrfx_spis_evt_t;
-/** @brief SPI slave instance default configuration. */
+/** @brief The default configuration of the SPI slave instance. */
#define NRFX_SPIS_DEFAULT_CONFIG \
{ \
- .sck_pin = NRFX_SPIS_PIN_NOT_USED, \
- .mosi_pin = NRFX_SPIS_PIN_NOT_USED, \
.miso_pin = NRFX_SPIS_PIN_NOT_USED, \
+ .mosi_pin = NRFX_SPIS_PIN_NOT_USED, \
+ .sck_pin = NRFX_SPIS_PIN_NOT_USED, \
.csn_pin = NRFX_SPIS_PIN_NOT_USED, \
.mode = NRF_SPIS_MODE_0, \
.bit_order = NRF_SPIS_BIT_ORDER_MSB_FIRST, \
@@ -161,15 +163,15 @@
* to detect falling edges on CSN pin.
*
* @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] p_config Pointer to the structure with initial configuration.
+ * @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] event_handler Function to be called by the SPI slave driver upon event.
* Must not be NULL.
* @param[in] p_context Context passed to the event handler.
*
- * @retval NRFX_SUCCESS If the initialization was successful.
- * @retval NRFX_ERROR_INVALID_STATE If the instance is already initialized.
- * @retval NRFX_ERROR_INVALID_PARAM If an invalid parameter is supplied.
- * @retval NRFX_ERROR_BUSY If some other peripheral with the same
+ * @retval NRFX_SUCCESS The initialization was successful.
+ * @retval NRFX_ERROR_INVALID_STATE The instance is already initialized.
+ * @retval NRFX_ERROR_INVALID_PARAM Invalid parameter is supplied.
+ * @retval NRFX_ERROR_BUSY Some other peripheral with the same
* instance ID is already in use. This is
* possible only if @ref nrfx_prs module
* is enabled.
@@ -197,30 +199,30 @@
*
* When either the memory buffer configuration or the SPI transaction has been
* completed, the event callback function will be called with the appropriate event
- * @ref nrfx_spis_evt_type_t. Note that the callback function can be called before returning from
+ * @ref nrfx_spis_evt_type_t. The callback function can be called before returning from
* this function, because it is called from the SPI slave interrupt context.
*
* @note This function can be called from the callback function context.
*
* @note Client applications must call this function after every @ref NRFX_SPIS_XFER_DONE event if
- * the SPI slave driver should be prepared for a possible new SPI transaction.
+ * the SPI slave driver must be prepared for a possible new SPI transaction.
*
* @note Peripherals using EasyDMA (including SPIS) require the transfer buffers
* to be placed in the Data RAM region. If this condition is not met,
* this function will fail with the error code NRFX_ERROR_INVALID_ADDR.
*
- * @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] p_tx_buffer Pointer to the TX buffer. Can be NULL when the buffer length is zero.
- * @param[in] p_rx_buffer Pointer to the RX buffer. Can be NULL when the buffer length is zero.
- * @param[in] tx_buffer_length Length of the TX buffer in bytes.
- * @param[in] rx_buffer_length Length of the RX buffer in bytes.
+ * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] p_tx_buffer Pointer to the TX buffer. Can be NULL when the buffer length is zero.
+ * @param[in] p_rx_buffer Pointer to the RX buffer. Can be NULL when the buffer length is zero.
+ * @param[in] tx_buffer_length Length of the TX buffer in bytes.
+ * @param[in] rx_buffer_length Length of the RX buffer in bytes.
*
- * @retval NRFX_SUCCESS If the operation was successful.
- * @retval NRFX_ERROR_INVALID_STATE If the operation failed because the SPI slave device is in an incorrect state.
- * @retval NRFX_ERROR_INVALID_ADDR If the provided buffers are not placed in the Data
+ * @retval NRFX_SUCCESS The operation was successful.
+ * @retval NRFX_ERROR_INVALID_STATE The operation failed because the SPI slave device is in an incorrect state.
+ * @retval NRFX_ERROR_INVALID_ADDR The provided buffers are not placed in the Data
* RAM region.
- * @retval NRFX_ERROR_INVALID_LENGTH If provided lengths exceed the EasyDMA limits for the peripheral.
- * @retval NRFX_ERROR_INTERNAL If the operation failed because of an internal error.
+ * @retval NRFX_ERROR_INVALID_LENGTH Provided lengths exceed the EasyDMA limits for the peripheral.
+ * @retval NRFX_ERROR_INTERNAL The operation failed because of an internal error.
*/
nrfx_err_t nrfx_spis_buffers_set(nrfx_spis_t const * const p_instance,
uint8_t const * p_tx_buffer,
@@ -228,6 +230,8 @@
uint8_t * p_rx_buffer,
size_t rx_buffer_length);
+/** @} */
+
void nrfx_spis_0_irq_handler(void);
void nrfx_spis_1_irq_handler(void);
@@ -235,8 +239,6 @@
void nrfx_spis_3_irq_handler(void);
-/** @} */
-
#ifdef __cplusplus
}
#endif
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_swi.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_swi.h
index 653c3e7..16778a2 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_swi.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_swi.h
@@ -78,23 +78,22 @@
*/
typedef void (*nrfx_swi_handler_t)(nrfx_swi_t swi, nrfx_swi_flags_t flags);
-
/**
* @brief Function for allocating the first unused SWI instance and setting a handler.
*
* If provided handler is not NULL, an allocated SWI has its interrupt enabled by default.
* The interrupt can be disabled by @ref nrfx_swi_int_disable.
*
- * @param[out] p_swi Points to a place where the allocated SWI instance
- * number is to be stored.
- * @param[in] event_handler Event handler function.
- * If NULL, no interrupt will be enabled.
- * It can be NULL only if the EGU driver is enabled.
- * For classic SWI, it must be a valid handler pointer.
- * @param[in] irq_priority Interrupt priority.
+ * @param[out] p_swi Points to a place where the allocated SWI instance
+ * number is to be stored.
+ * @param[in] event_handler Event handler function.
+ * If NULL, no interrupt will be enabled.
+ * It can be NULL only if the EGU driver is enabled.
+ * For classic SWI, it must be a valid handler pointer.
+ * @param[in] irq_priority Interrupt priority.
*
- * @retval NRFX_SUCCESS If the SWI was successfully allocated.
- * @retval NRFX_ERROR_NO_MEM If there is no available SWI to be used.
+ * @retval NRFX_SUCCESS The SWI was successfully allocated.
+ * @retval NRFX_ERROR_NO_MEM There is no available SWI to be used.
*/
nrfx_err_t nrfx_swi_alloc(nrfx_swi_t * p_swi,
nrfx_swi_handler_t event_handler,
@@ -105,22 +104,22 @@
*
* Use @ref nrfx_swi_int_enable to re-enable the interrupt.
*
- * @param[in] swi SWI instance.
+ * @param[in] swi SWI instance.
*/
void nrfx_swi_int_disable(nrfx_swi_t swi);
/**
* @brief Function for enabling an allocated SWI interrupt.
*
- * @param[in] swi SWI instance.
+ * @param[in] swi SWI instance.
*/
void nrfx_swi_int_enable(nrfx_swi_t swi);
/**
* @brief Function for freeing a previously allocated SWI.
*
- * @param[in,out] p_swi SWI instance to free. The value is changed to
- * @ref NRFX_SWI_UNALLOCATED on success.
+ * @param[in,out] p_swi SWI instance to free. The value is changed to
+ * @ref NRFX_SWI_UNALLOCATED on success.
*/
void nrfx_swi_free(nrfx_swi_t * p_swi);
@@ -130,8 +129,8 @@
/**
* @brief Function for triggering the SWI.
*
- * @param[in] swi SWI to trigger.
- * @param[in] flag_number Number of user flag to trigger.
+ * @param[in] swi SWI to trigger.
+ * @param[in] flag_number Number of user flag to trigger.
*/
void nrfx_swi_trigger(nrfx_swi_t swi,
uint8_t flag_number);
@@ -139,10 +138,10 @@
/**
* @brief Function for checking if the specified SWI is currently allocated.
*
- * @param[in] swi SWI instance.
+ * @param[in] swi SWI instance.
*
- * @retval true If the SWI instance is allocated.
- * @retval false Otherwise.
+ * @retval true The SWI instance is allocated.
+ * @retval false The SWI instance is not allocated.
*/
bool nrfx_swi_is_allocated(nrfx_swi_t swi);
@@ -152,10 +151,10 @@
* @brief Function for returning the base address of the EGU peripheral
* associated with the specified SWI instance.
*
- * @param[in] swi SWI instance.
+ * @param[in] swi SWI instance.
*
- * @returns EGU base address or NULL if the specified SWI instance number
- * is too high.
+ * @return EGU base address or NULL if the specified SWI instance number
+ * is too high.
*/
__STATIC_INLINE NRF_EGU_Type * nrfx_swi_egu_instance_get(nrfx_swi_t swi)
{
@@ -172,10 +171,10 @@
/**
* @brief Function for returning the EGU trigger task address.
*
- * @param[in] swi SWI instance.
- * @param[in] channel Number of the EGU channel.
+ * @param[in] swi SWI instance.
+ * @param[in] channel Number of the EGU channel.
*
- * @returns Address of EGU trigger task.
+ * @return Address of the EGU trigger task.
*/
__STATIC_INLINE uint32_t nrfx_swi_task_trigger_address_get(nrfx_swi_t swi,
uint8_t channel)
@@ -194,12 +193,12 @@
}
/**
- * @brief Function for returning the EGU triggered event address.
+ * @brief Function for returning the EGU-triggered event address.
*
- * @param[in] swi SWI instance.
- * @param[in] channel Number of the EGU channel.
+ * @param[in] swi SWI instance.
+ * @param[in] channel Number of the EGU channel.
*
- * @returns Address of EGU triggered event.
+ * @return Address of the EGU-triggered event.
*/
__STATIC_INLINE uint32_t nrfx_swi_event_triggered_address_get(nrfx_swi_t swi,
uint8_t channel)
@@ -219,6 +218,8 @@
#endif // NRFX_CHECK(NRFX_EGU_ENABLED) || defined(__NRFX_DOXYGEN__)
+/** @} */
+
void nrfx_swi_0_irq_handler(void);
void nrfx_swi_1_irq_handler(void);
@@ -227,7 +228,6 @@
void nrfx_swi_4_irq_handler(void);
void nrfx_swi_5_irq_handler(void);
-/** @} */
#ifdef __cplusplus
}
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_systick.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_systick.h
index 0da2d60..5e8feda 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_systick.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_systick.h
@@ -49,71 +49,71 @@
* This driver configures ARM(R) SysTick as a free-running timer.
* This timer is used to generate delays and pool for timeouts.
* Only relatively short timeouts are supported.
- * The SysTick works on 64MHz and is 24-bits wide.
- * It means that it overflows around 4 times per second and around 250 ms
- * would be the highest supported time in the library.
- * But it would be really hard to detect if overflow was generated without
- * using interrupts. For safety we would limit the maximum delay range by half.
+ * The SysTick works on 64MHz and is 24-bit wide.
+ * This means that it overflows around 4 times per second and
+ * around 250 microseconds will be the highest supported time in the library.
+ * As it is hard to detect if the overflow is generated without
+ * using interrupts, the maximum delay range is halved for safety reasons.
*/
/**
- * @brief The value type that holds the SysTick state
+ * @brief The value type that holds the SysTick state.
*
* This variable is used to count the requested timeout.
* @sa nrfx_systick_get
*/
typedef struct {
- uint32_t time; //!< Registered time value
+ uint32_t time; //!< Registered time value.
} nrfx_systick_state_t;
/**
- * @brief Configure and start the timer
+ * @brief Function for configuring and starting the timer.
*
* Function configures SysTick as a free-running timer without interrupt.
*/
void nrfx_systick_init(void);
/**
- * @brief Get current SysTick state
+ * @brief Function for getting the current SysTick state.
*
- * Function gets current state of the SysTick timer.
+ * Function gets the current state of the SysTick timer.
* It can be used to check time-out by @ref nrfx_systick_test.
*
- * @param[out] p_state The pointer to the state variable to be filled
+ * @param[out] p_state The pointer to the state variable to be filled.
*/
void nrfx_systick_get(nrfx_systick_state_t * p_state);
/**
- * @brief Test if specified time is up in relation to remembered state
+ * @brief Function for testing if the current time is higher in relation to the remembered state.
*
* @param[in] p_state Remembered state set by @ref nrfx_systick_get
* @param[in] us Required time-out.
*
- * @retval true If current time is higher than specified state plus given time-out.
- * @retval false If current time is lower than specified state plus given time-out
+ * @retval true The current time is higher than the specified state plus the given time-out.
+ * @retval false The current time is lower than the specified state plus the given time-out.
*/
bool nrfx_systick_test(nrfx_systick_state_t const * p_state, uint32_t us);
/**
- * @brief Blocking delay in CPU ticks
+ * @brief Function for delaying the execution for the specified amount of CPU ticks.
*
- * @param[in] ticks Number of CPU ticks to delay.
+ * @param[in] ticks Number of CPU ticks when the execution is blocked.
*/
void nrfx_systick_delay_ticks(uint32_t ticks);
/**
- * @brief Blocking delay in us
+ * @brief Function for delaying the execution for the specified amount of microseconds.
*
- * @param[in] us Number of microseconds to delay.
+ * @param[in] us Number of microseconds when the execution is blocked.
*/
void nrfx_systick_delay_us(uint32_t us);
/**
- * @brief Blocking delay in ms
+ * @brief Function for delaying the execution for the specified amount of milliseconds.
*
* This delay function removes the limits of the highest possible delay value.
*
- * @param[in] ms Number of milliseconds to delay.
+ * @param[in] ms Number of milliseconds when the execution is blocked.
*/
void nrfx_systick_delay_ms(uint32_t ms);
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_temp.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_temp.h
new file mode 100644
index 0000000..e67a9fd
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_temp.h
@@ -0,0 +1,153 @@
+/*
+ * Copyright (c) 2019, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef NRFX_TEMP_H__
+#define NRFX_TEMP_H__
+
+#include <nrfx.h>
+#include <hal/nrf_temp.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup nrfx_temp TEMP driver
+ * @{
+ * @ingroup nrf_temp
+ * @brief Temperature sensor (TEMP) driver.
+ */
+
+/** @brief Structure for TEMP configuration. */
+typedef struct
+{
+ uint8_t interrupt_priority; /**< Interrupt priority. */
+} nrfx_temp_config_t;
+
+/** @brief TEMP default configuration. */
+#define NRFX_TEMP_DEFAULT_CONFIG \
+ { \
+ .interrupt_priority = NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY, \
+ }
+
+/**
+ * @brief TEMP driver data ready handler type.
+ *
+ * @param temperature Raw temperature in a 2's complement signed value
+ * representation. This value can be converted to Celsius
+ * scale using the @ref nrfx_temp_calculate() function.
+ */
+typedef void (* nrfx_temp_data_handler_t)(int32_t raw_temperature);
+
+/**
+ * @brief Function for initializing the TEMP driver.
+ *
+ * @param[in] p_config Pointer to the structure with initial configuration.
+ * @param[in] handler Data handler provided by the user. If not provided,
+ * the driver is initialized in blocking mode.
+ *
+ * @retval NRFX_SUCCESS Driver was successfully initialized.
+ * @retval NRFX_ERROR_ALREADY_INITIALIZED Driver was already initialized.
+ */
+nrfx_err_t nrfx_temp_init(nrfx_temp_config_t const * p_config, nrfx_temp_data_handler_t handler);
+
+/** @brief Function for uninitializing the TEMP driver. */
+void nrfx_temp_uninit(void);
+
+/**
+ * @brief Function for getting the temperature measurement in a 2's complement
+ * signed value representation.
+ *
+ * This function returns the last value prepared by the TEMP peripheral.
+ * In blocking mode, it should be used after calling the @ref nrfx_temp_measure()
+ * function. In non-blocking mode, it is called internally by the driver,
+ * and the value it returns is passed to the data handler.
+ *
+ * @return Temperature measurement result in a 2's complement signed value
+ * representation.
+ */
+__STATIC_INLINE int32_t nrfx_temp_result_get(void);
+
+/**
+ * @brief Function for calculating the temperature value in Celsius scale from raw data.
+ *
+ * The returned temperature value is in Celsius scale, multiplied by 100
+ * For example, the actual temperature of 25.75[C] will be returned as a 2575 signed integer.
+ * Measurement accuracy is 0.25[C].
+ *
+ * @param[in] raw_measurement Temperature value in a 2's complement signed
+ * value representation.
+ *
+ * @return Temperature measurement result.
+ */
+int32_t nrfx_temp_calculate(int32_t raw_measurement);
+
+/**
+ * @brief Function for starting the temperature measurement.
+ *
+ * Non-blocking mode:
+ * This function returns immediately. After a measurement, the handler specified
+ * during initialization is called, with measurement result as the parameter.
+ *
+ * Blocking mode:
+ * This function waits until the measurement is finished. The value should be read
+ * using the @ref nrfx_temp_result_get() function.
+ *
+ * @retval NRFX_SUCCESS In non-blocking mode: Measurement was started.
+ * An interrupt will be generated soon. <br>
+ * In blocking mode:
+ * Measurement was started and finished. Data can
+ * be read using the @ref nrfx_temp_result_get() function.
+ * @retval NRFX_ERROR_INTERNAL In non-blocking mode:
+ * Not applicable. <br>
+ * In blocking mode:
+ * Measurement data ready event did not occur.
+ */
+nrfx_err_t nrfx_temp_measure(void);
+
+#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+
+__STATIC_INLINE int32_t nrfx_temp_result_get(void)
+{
+ return nrf_temp_result_get(NRF_TEMP);
+}
+
+#endif // SUPPRESS_INLINE_IMPLEMENTATION
+
+/** @} */
+
+void nrfx_temp_irq_handler(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // NRFX_TEMP_H__
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_timer.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_timer.h
index 447b988..057bbd2 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_timer.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_timer.h
@@ -52,13 +52,11 @@
typedef struct
{
NRF_TIMER_Type * p_reg; ///< Pointer to the structure with TIMER peripheral instance registers.
- uint8_t instance_id; ///< Driver instance index.
+ uint8_t instance_id; ///< Index of the driver instance. For internal use only.
uint8_t cc_channel_count; ///< Number of capture/compare channels.
} nrfx_timer_t;
-/**
- * @brief Macro for creating a timer driver instance.
- */
+/** @brief Macro for creating a timer driver instance. */
#define NRFX_TIMER_INSTANCE(id) \
{ \
.p_reg = NRFX_CONCAT_2(NRF_TIMER, id), \
@@ -66,6 +64,7 @@
.cc_channel_count = NRF_TIMER_CC_CHANNEL_COUNT(id), \
}
+#ifndef __NRFX_DOXYGEN__
enum {
#if NRFX_CHECK(NRFX_TIMER0_ENABLED)
NRFX_TIMER0_INST_IDX,
@@ -84,10 +83,9 @@
#endif
NRFX_TIMER_ENABLED_COUNT
};
+#endif
-/**
- * @brief Timer driver instance configuration structure.
- */
+/** @brief The configuration structure of the timer driver instance. */
typedef struct
{
nrf_timer_frequency_t frequency; ///< Frequency.
@@ -97,9 +95,7 @@
void * p_context; ///< Context passed to interrupt handler.
} nrfx_timer_config_t;
-/**
- * @brief Timer driver instance default configuration.
- */
+/** @brief Timer driver instance default configuration. */
#define NRFX_TIMER_DEFAULT_CONFIG \
{ \
.frequency = (nrf_timer_frequency_t)NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY,\
@@ -125,12 +121,12 @@
* @brief Function for initializing the timer.
*
* @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] p_config Pointer to the structure with initial configuration.
+ * @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] timer_event_handler Event handler provided by the user.
* Must not be NULL.
*
- * @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_INVALID_STATE If the instance is already initialized.
+ * @retval NRFX_SUCCESS Initialization was successful.
+ * @retval NRFX_ERROR_INVALID_STATE The instance is already initialized.
*/
nrfx_err_t nrfx_timer_init(nrfx_timer_t const * const p_instance,
nrfx_timer_config_t const * p_config,
@@ -153,7 +149,7 @@
/**
* @brief Function for turning off the timer.
*
- * Note that the timer will allow to enter the lowest possible SYSTEM_ON state
+ * The timer will allow to enter the lowest possible SYSTEM_ON state
* only after this function is called.
*
* @param[in] p_instance Pointer to the driver instance structure.
@@ -165,7 +161,8 @@
*
* @param[in] p_instance Pointer to the driver instance structure.
*
- * @return True if timer is enabled, false otherwise.
+ * @retval true Timer is enabled.
+ * @retval false Timer is not enabled.
*/
bool nrfx_timer_is_enabled(nrfx_timer_t const * const p_instance);
@@ -198,7 +195,7 @@
void nrfx_timer_increment(nrfx_timer_t const * const p_instance);
/**
- * @brief Function for returning the address of a specific timer task.
+ * @brief Function for returning the address of the specified timer task.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] timer_task Timer task.
@@ -209,7 +206,7 @@
nrf_timer_task_t timer_task);
/**
- * @brief Function for returning the address of a specific timer capture task.
+ * @brief Function for returning the address of the specified timer capture task.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] channel Capture channel number.
@@ -220,7 +217,7 @@
uint32_t channel);
/**
- * @brief Function for returning the address of a specific timer event.
+ * @brief Function for returning the address of the specified timer event.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] timer_event Timer event.
@@ -231,7 +228,7 @@
nrf_timer_event_t timer_event);
/**
- * @brief Function for returning the address of a specific timer compare event.
+ * @brief Function for returning the address of the specified timer compare event.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] channel Compare channel number.
@@ -253,7 +250,7 @@
nrf_timer_cc_channel_t cc_channel);
/**
- * @brief Function for returning the capture value from a specific channel.
+ * @brief Function for returning the capture value from the specified channel.
*
* Use this function to read channel values when PPI is used for capturing.
*
@@ -279,15 +276,14 @@
bool enable_int);
/**
- * @brief Function for setting the timer channel in extended compare mode.
+ * @brief Function for setting the timer channel in the extended compare mode.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] cc_channel Compare channel number.
* @param[in] cc_value Compare value.
* @param[in] timer_short_mask Shortcut between the compare event on the channel
* and the timer task (STOP or CLEAR).
- * @param[in] enable_int Enable or disable the interrupt for the compare
- * channel.
+ * @param[in] enable_int Enable or disable the interrupt for the compare channel.
*/
void nrfx_timer_extended_compare(nrfx_timer_t const * const p_instance,
nrf_timer_cc_channel_t cc_channel,
@@ -386,6 +382,8 @@
#endif // SUPPRESS_INLINE_IMPLEMENTATION
+/** @} */
+
void nrfx_timer_0_irq_handler(void);
void nrfx_timer_1_irq_handler(void);
@@ -394,8 +392,6 @@
void nrfx_timer_4_irq_handler(void);
-/** @} */
-
#ifdef __cplusplus
}
#endif
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_twi.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_twi.h
index 512e2e3..5e39626 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_twi.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_twi.h
@@ -33,6 +33,7 @@
#define NRFX_TWI_H__
#include <nrfx.h>
+#include <nrfx_twi_twim.h>
#include <hal/nrf_twi.h>
#ifdef __cplusplus
@@ -43,7 +44,7 @@
* @defgroup nrfx_twi TWI driver
* @{
* @ingroup nrf_twi
- * @brief TWI peripheral driver.
+ * @brief Two Wire Interface master (TWI) peripheral driver.
*/
/**
@@ -52,18 +53,17 @@
typedef struct
{
NRF_TWI_Type * p_twi; ///< Pointer to a structure with TWI registers.
- uint8_t drv_inst_idx; ///< Driver instance index.
+ uint8_t drv_inst_idx; ///< Index of the driver instance. For internal use only.
} nrfx_twi_t;
-/**
- * @brief Macro for creating a TWI master driver instance.
- */
+/** @brief Macro for creating a TWI master driver instance. */
#define NRFX_TWI_INSTANCE(id) \
{ \
.p_twi = NRFX_CONCAT_2(NRF_TWI, id), \
.drv_inst_idx = NRFX_CONCAT_3(NRFX_TWI, id, _INST_IDX), \
}
+#ifndef __NRFX_DOXYGEN__
enum {
#if NRFX_CHECK(NRFX_TWI0_ENABLED)
NRFX_TWI0_INST_IDX,
@@ -73,22 +73,19 @@
#endif
NRFX_TWI_ENABLED_COUNT
};
+#endif
-/**
- * @brief Structure for the TWI master driver instance configuration.
- */
+/** @brief Structure for the configuration of the TWI master driver instance. */
typedef struct
{
- uint32_t scl; ///< SCL pin number.
- uint32_t sda; ///< SDA pin number.
- nrf_twi_frequency_t frequency; ///< TWI frequency.
- uint8_t interrupt_priority; ///< Interrupt priority.
- bool hold_bus_uninit; ///< Hold pull up state on gpio pins after uninit.
+ uint32_t scl; ///< SCL pin number.
+ uint32_t sda; ///< SDA pin number.
+ nrf_twi_frequency_t frequency; ///< TWI frequency.
+ uint8_t interrupt_priority; ///< Interrupt priority.
+ bool hold_bus_uninit; ///< Hold pull up state on GPIO pins after uninit.
} nrfx_twi_config_t;
-/**
- * @brief TWI master driver instance default configuration.
- */
+/** @brief The default configuration of the TWI master driver instance. */
#define NRFX_TWI_DEFAULT_CONFIG \
{ \
.frequency = (nrf_twi_frequency_t)NRFX_TWI_DEFAULT_CONFIG_FREQUENCY, \
@@ -98,33 +95,32 @@
.hold_bus_uninit = NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT, \
}
-#define NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER (1UL << 2) /**< Interrupt after each transfer is suppressed, and the event handler is not called. */
-#define NRFX_TWI_FLAG_TX_NO_STOP (1UL << 5) /**< Flag indicating that the TX transfer will not end with a stop condition. */
+/** @brief Flag indicating that the interrupt after each transfer will be suppressed, and the event handler will not be called. */
+#define NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER (1UL << 2)
+/** @brief Flag indicating that the TX transfer will not end with a stop condition. */
+#define NRFX_TWI_FLAG_TX_NO_STOP (1UL << 5)
+/** @brief Flag indicating that the transfer will be suspended. */
+#define NRFX_TWI_FLAG_SUSPEND (1UL << 6)
-/**
- * @brief TWI master driver event types.
- */
+/** @brief TWI master driver event types. */
typedef enum
{
NRFX_TWI_EVT_DONE, ///< Transfer completed event.
NRFX_TWI_EVT_ADDRESS_NACK, ///< Error event: NACK received after sending the address.
- NRFX_TWI_EVT_DATA_NACK ///< Error event: NACK received after sending a data byte.
+ NRFX_TWI_EVT_DATA_NACK, ///< Error event: NACK received after sending a data byte.
+ NRFX_TWI_EVT_OVERRUN ///< Error event: The unread data is replaced by new data.
} nrfx_twi_evt_type_t;
-/**
- * @brief TWI master driver transfer types.
- */
+/** @brief TWI master driver transfer types. */
typedef enum
{
- NRFX_TWI_XFER_TX, ///< TX transfer.
- NRFX_TWI_XFER_RX, ///< RX transfer.
- NRFX_TWI_XFER_TXRX, ///< TX transfer followed by RX transfer with repeated start.
- NRFX_TWI_XFER_TXTX ///< TX transfer followed by TX transfer with repeated start.
+ NRFX_TWI_XFER_TX, ///< TX transfer.
+ NRFX_TWI_XFER_RX, ///< RX transfer.
+ NRFX_TWI_XFER_TXRX, ///< TX transfer followed by RX transfer with repeated start.
+ NRFX_TWI_XFER_TXTX ///< TX transfer followed by TX transfer with repeated start.
} nrfx_twi_xfer_type_t;
-/**
- * @brief Structure for a TWI transfer descriptor.
- */
+/** @brief Structure for a TWI transfer descriptor. */
typedef struct
{
nrfx_twi_xfer_type_t type; ///< Type of transfer.
@@ -136,72 +132,72 @@
} nrfx_twi_xfer_desc_t;
-/**@brief Macro for setting the TX transfer descriptor. */
+/** @brief Macro for setting the TX transfer descriptor. */
#define NRFX_TWI_XFER_DESC_TX(addr, p_data, length) \
- { \
- .type = NRFX_TWI_XFER_TX, \
- .address = addr, \
- .primary_length = length, \
- .p_primary_buf = p_data, \
- }
+{ \
+ .type = NRFX_TWI_XFER_TX, \
+ .address = (addr), \
+ .primary_length = (length), \
+ .secondary_length = 0, \
+ .p_primary_buf = (p_data), \
+ .p_secondary_buf = NULL, \
+}
-/**@brief Macro for setting the RX transfer descriptor. */
+/** @brief Macro for setting the RX transfer descriptor. */
#define NRFX_TWI_XFER_DESC_RX(addr, p_data, length) \
- { \
- .type = NRFX_TWI_XFER_RX, \
- .address = addr, \
- .primary_length = length, \
- .p_primary_buf = p_data, \
- }
+{ \
+ .type = NRFX_TWI_XFER_RX, \
+ .address = (addr), \
+ .primary_length = (length), \
+ .secondary_length = 0, \
+ .p_primary_buf = (p_data), \
+ .p_secondary_buf = NULL, \
+}
-/**@brief Macro for setting the TXRX transfer descriptor. */
-#define NRFX_TWI_XFER_DESC_TXRX(addr, p_tx, tx_len, p_rx, rx_len) \
- { \
- .type = NRFX_TWI_XFER_TXRX, \
- .address = addr, \
- .primary_length = tx_len, \
- .secondary_length = rx_len, \
- .p_primary_buf = p_tx, \
- .p_secondary_buf = p_rx, \
- }
+/** @brief Macro for setting the TX-RX transfer descriptor. */
+#define NRFX_TWI_XFER_DESC_TXRX(addr, p_tx, tx_len, p_rx, rx_len) \
+{ \
+ .type = NRFX_TWI_XFER_TXRX, \
+ .address = (addr), \
+ .primary_length = (tx_len), \
+ .secondary_length = (rx_len), \
+ .p_primary_buf = (p_tx), \
+ .p_secondary_buf = (p_rx), \
+}
-/**@brief Macro for setting the TXTX transfer descriptor. */
+/** @brief Macro for setting the TX-TX transfer descriptor. */
#define NRFX_TWI_XFER_DESC_TXTX(addr, p_tx, tx_len, p_tx2, tx_len2) \
- { \
- .type = NRFX_TWI_XFER_TXTX, \
- .address = addr, \
- .primary_length = tx_len, \
- .secondary_length = tx_len2, \
- .p_primary_buf = p_tx, \
- .p_secondary_buf = p_tx2, \
- }
+{ \
+ .type = NRFX_TWI_XFER_TXTX, \
+ .address = (addr), \
+ .primary_length = (tx_len), \
+ .secondary_length = (tx_len2), \
+ .p_primary_buf = (p_tx), \
+ .p_secondary_buf = (p_tx2), \
+}
-/**
- * @brief Structure for a TWI event.
- */
+/** @brief Structure for a TWI event. */
typedef struct
{
nrfx_twi_evt_type_t type; ///< Event type.
nrfx_twi_xfer_desc_t xfer_desc; ///< Transfer details.
} nrfx_twi_evt_t;
-/**
- * @brief TWI event handler prototype.
- */
+/** @brief TWI event handler prototype. */
typedef void (* nrfx_twi_evt_handler_t)(nrfx_twi_evt_t const * p_event,
void * p_context);
/**
* @brief Function for initializing the TWI driver instance.
*
- * @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] p_config Pointer to the structure with initial configuration.
- * @param[in] event_handler Event handler provided by the user. If NULL, blocking mode is enabled.
- * @param[in] p_context Context passed to event handler.
+ * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] p_config Pointer to the structure with the initial configuration.
+ * @param[in] event_handler Event handler provided by the user. If NULL, blocking mode is enabled.
+ * @param[in] p_context Context passed to event handler.
*
- * @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_INVALID_STATE If the driver is in invalid state.
- * @retval NRFX_ERROR_BUSY If some other peripheral with the same
+ * @retval NRFX_SUCCESS Initialization is successful.
+ * @retval NRFX_ERROR_INVALID_STATE The driver is in invalid state.
+ * @retval NRFX_ERROR_BUSY Some other peripheral with the same
* instance ID is already in use. This is
* possible only if @ref nrfx_prs module
* is enabled.
@@ -238,6 +234,8 @@
* The transmission will be stopped when an error occurs. If a transfer is ongoing,
* the function returns the error code @ref NRFX_ERROR_BUSY.
*
+ * @note This function is deprecated. Use @ref nrfx_twi_xfer instead.
+ *
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] address Address of a specific slave device (only 7 LSB).
* @param[in] p_data Pointer to a transmit buffer.
@@ -246,11 +244,14 @@
* after the transfer has completed successfully (allowing
* for a repeated start in the next transfer).
*
- * @retval NRFX_SUCCESS If the procedure was successful.
- * @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer.
- * @retval NRFX_ERROR_INTERNAL If an error was detected by hardware.
- * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address in polling mode.
- * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte in polling mode.
+ * @retval NRFX_SUCCESS The procedure is successful.
+ * @retval NRFX_ERROR_BUSY The driver is not ready for a new transfer.
+ * @retval NRFX_ERROR_INTERNAL An error is detected by hardware.
+ * @retval NRFX_ERROR_INVALID_STATE RX transaction is suspended on bus.
+ * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK Negative acknowledgement (NACK) is received after sending
+ * the address in polling mode.
+ * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK Negative acknowledgement (NACK) is received after sending
+ * a data byte in polling mode.
*/
nrfx_err_t nrfx_twi_tx(nrfx_twi_t const * p_instance,
uint8_t address,
@@ -264,53 +265,64 @@
* The transmission will be stopped when an error occurs. If a transfer is ongoing,
* the function returns the error code @ref NRFX_ERROR_BUSY.
*
+ * @note This function is deprecated. Use @ref nrfx_twi_xfer instead.
+ *
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] address Address of a specific slave device (only 7 LSB).
* @param[in] p_data Pointer to a receive buffer.
* @param[in] length Number of bytes to be received.
*
- * @retval NRFX_SUCCESS If the procedure was successful.
- * @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer.
- * @retval NRFX_ERROR_INTERNAL If an error was detected by hardware.
- * @retval NRFX_ERROR_DRV_TWI_ERR_OVERRUN If the unread data was replaced by new data
- * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address in polling mode.
- * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte in polling mode.
+ * @retval NRFX_SUCCESS The procedure is successful.
+ * @retval NRFX_ERROR_BUSY The driver is not ready for a new transfer.
+ * @retval NRFX_ERROR_INTERNAL An error is detected by hardware.
+ * @retval NRFX_ERROR_INVALID_STATE TX transaction is suspended on bus.
+ * @retval NRFX_ERROR_DRV_TWI_ERR_OVERRUN The unread data is replaced by new data.
+ * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK Negative acknowledgement (NACK) is received after sending
+ * the address in polling mode.
+ * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK Negative acknowledgement (NACK) is received after sending
+ * a data byte in polling mode.
*/
nrfx_err_t nrfx_twi_rx(nrfx_twi_t const * p_instance,
uint8_t address,
uint8_t * p_data,
size_t length);
+
/**
- * @brief Function for preparing a TWI transfer.
+ * @brief Function for performing a TWI transfer.
*
* The following transfer types can be configured (@ref nrfx_twi_xfer_desc_t::type):
- * - @ref NRFX_TWI_XFER_TXRX<span></span>: Write operation followed by a read operation (without STOP condition in between).
- * - @ref NRFX_TWI_XFER_TXTX<span></span>: Write operation followed by a write operation (without STOP condition in between).
- * - @ref NRFX_TWI_XFER_TX<span></span>: Write operation (with or without STOP condition).
- * - @ref NRFX_TWI_XFER_RX<span></span>: Read operation (with STOP condition).
+ * - @ref NRFX_TWI_XFER_TXRX - Write operation followed by a read operation (without STOP condition in between).
+ * - @ref NRFX_TWI_XFER_TXTX - Write operation followed by a write operation (without STOP condition in between).
+ * - @ref NRFX_TWI_XFER_TX - Write operation (with or without STOP condition).
+ * - @ref NRFX_TWI_XFER_RX - Read operation (with STOP condition).
*
- * @note TXRX and TXTX transfers are supported only in non-blocking mode.
+ * @note TX-RX and TX-TX transfers are supported only in non-blocking mode.
*
* Additional options are provided using the flags parameter:
- * - @ref NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER<span></span>: No user event handler after transfer completion. In most cases, this also means no interrupt at the end of the transfer.
- * - @ref NRFX_TWI_FLAG_TX_NO_STOP<span></span>: No stop condition after TX transfer.
+ * - @ref NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER - No user event handler after transfer completion. In most cases, this also means no interrupt at the end of the transfer.
+ * - @ref NRFX_TWI_FLAG_TX_NO_STOP - No stop condition after TX transfer.
+ * - @ref NRFX_TWI_FLAG_SUSPEND - Transfer will be suspended. This allows for combining multiple transfers into one transaction.
+ * Only transactions with the same direction can be combined. To finish the transaction, call the function without this flag.
*
* @note
* Some flag combinations are invalid:
* - @ref NRFX_TWI_FLAG_TX_NO_STOP with @ref nrfx_twi_xfer_desc_t::type different than @ref NRFX_TWI_XFER_TX
*
- * @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] p_xfer_desc Pointer to the transfer descriptor.
- * @param[in] flags Transfer options (0 for default settings).
+ * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] p_xfer_desc Pointer to the transfer descriptor.
+ * @param[in] flags Transfer options (0 for default settings).
*
- * @retval NRFX_SUCCESS If the procedure was successful.
- * @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer.
- * @retval NRFX_ERROR_NOT_SUPPORTED If the provided parameters are not supported.
- * @retval NRFX_ERROR_INTERNAL If an error was detected by hardware.
- * @retval NRFX_ERROR_DRV_TWI_ERR_OVERRUN If the unread data was replaced by new data (TXRX and RX)
- * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address.
- * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte.
+ * @retval NRFX_SUCCESS The procedure is successful.
+ * @retval NRFX_ERROR_BUSY The driver is not ready for a new transfer.
+ * @retval NRFX_ERROR_NOT_SUPPORTED The provided parameters are not supported.
+ * @retval NRFX_ERROR_INTERNAL An error is detected by hardware.
+ * @retval NRFX_ERROR_INVALID_STATE Other direction of transaction is suspended on the bus.
+ * @retval NRFX_ERROR_DRV_TWI_ERR_OVERRUN The unread data is replaced by new data (TXRX and RX)
+ * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK Negative acknowledgement (NACK) is received after sending
+ * the address in polling mode.
+ * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK Negative acknowledgement (NACK) is received after sending
+ * a data byte in polling mode.
*/
nrfx_err_t nrfx_twi_xfer(nrfx_twi_t const * p_instance,
nrfx_twi_xfer_desc_t const * p_xfer_desc,
@@ -321,8 +333,8 @@
*
* @param[in] p_instance TWI instance.
*
- * @retval true If the TWI driver is currently busy performing a transfer.
- * @retval false If the TWI driver is ready for a new transfer.
+ * @retval true The TWI driver is currently busy performing a transfer.
+ * @retval false The TWI driver is ready for a new transfer.
*/
bool nrfx_twi_is_busy(nrfx_twi_t const * p_instance);
@@ -331,7 +343,7 @@
*
* @param[in] p_instance Pointer to the driver instance structure.
*
- * @return Data count.
+ * @return Data count.
*/
size_t nrfx_twi_data_count_get(nrfx_twi_t const * const p_instance);
@@ -341,16 +353,42 @@
* A STOPPED event can be used to detect the end of a transfer if the @ref NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER
* option is used.
*
- * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] p_instance Pointer to the driver instance structure.
*
- * @return STOPPED event address.
+ * @return STOPPED event address.
*/
uint32_t nrfx_twi_stopped_event_get(nrfx_twi_t const * p_instance);
+/**
+ * @brief Function for recovering the bus.
+ *
+ * This function checks if the bus is not stuck because of a slave holding the SDA line in the low state,
+ * and if needed it performs required number of pulses on the SCL line to make the slave release the SDA line.
+ * Finally, the function generates a STOP condition on the bus to put it into a known state.
+ *
+ * @note This function can be used only if the TWI driver is uninitialized.
+ *
+ * @param[in] scl_pin SCL pin number.
+ * @param[in] sda_pin SDA pin number.
+ *
+ * @retval NRFX_SUCCESS Bus recovery was successful.
+ * @retval NRFX_ERROR_INTERNAL Bus recovery failed.
+ */
+__STATIC_INLINE nrfx_err_t nrfx_twi_bus_recover(uint32_t scl_pin, uint32_t sda_pin);
+
+#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+__STATIC_INLINE nrfx_err_t nrfx_twi_bus_recover(uint32_t scl_pin, uint32_t sda_pin)
+{
+ return nrfx_twi_twim_bus_recover(scl_pin, sda_pin);
+}
+#endif
+
+/** @} */
+
+
void nrfx_twi_0_irq_handler(void);
void nrfx_twi_1_irq_handler(void);
-/** @} */
#ifdef __cplusplus
}
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_twi_twim.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_twi_twim.h
new file mode 100644
index 0000000..1c6ebcd
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_twi_twim.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2019, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef NRFX_TWI_TWIM_H
+#define NRFX_TWI_TWIM_H
+
+#include <nrfx.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+nrfx_err_t nrfx_twi_twim_bus_recover(uint32_t scl_pin, uint32_t sda_pin);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // NRFX_TWI_TWIM_H
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_twim.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_twim.h
index 73aa445..2ef1dfd 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_twim.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_twim.h
@@ -33,6 +33,7 @@
#define NRFX_TWIM_H__
#include <nrfx.h>
+#include <nrfx_twi_twim.h>
#include <hal/nrf_twim.h>
#ifdef __cplusplus
@@ -43,27 +44,24 @@
* @defgroup nrfx_twim TWIM driver
* @{
* @ingroup nrf_twim
- * @brief TWIM peripheral driver.
+ * @brief Two Wire Interface Master with EasyDMA (TWIM) peripheral driver.
*/
-/**
- * @brief Structure for the TWI master driver instance.
- */
+/** @brief Structure for the TWI master driver instance. */
typedef struct
{
NRF_TWIM_Type * p_twim; ///< Pointer to a structure with TWIM registers.
- uint8_t drv_inst_idx; ///< Driver instance index.
+ uint8_t drv_inst_idx; ///< Index of the driver instance. For internal use only.
} nrfx_twim_t;
-/**
- * @brief Macro for creating a TWI master driver instance.
- */
+/** @brief Macro for creating a TWI master driver instance. */
#define NRFX_TWIM_INSTANCE(id) \
{ \
.p_twim = NRFX_CONCAT_2(NRF_TWIM, id), \
.drv_inst_idx = NRFX_CONCAT_3(NRFX_TWIM, id, _INST_IDX), \
}
+#ifndef __NRFX_DOXYGEN__
enum {
#if NRFX_CHECK(NRFX_TWIM0_ENABLED)
NRFX_TWIM0_INST_IDX,
@@ -79,139 +77,138 @@
#endif
NRFX_TWIM_ENABLED_COUNT
};
+#endif
-/**
- * @brief Structure for the TWI master driver instance configuration.
- */
+/** @brief Structure for the TWI master driver instance configuration. */
typedef struct
{
- uint32_t scl; ///< SCL pin number.
- uint32_t sda; ///< SDA pin number.
- nrf_twim_frequency_t frequency; ///< TWIM frequency.
- uint8_t interrupt_priority; ///< Interrupt priority.
- bool hold_bus_uninit; ///< Hold pull up state on gpio pins after uninit.
+ uint32_t scl; ///< SCL pin number.
+ uint32_t sda; ///< SDA pin number.
+ nrf_twim_frequency_t frequency; ///< TWIM frequency.
+ uint8_t interrupt_priority; ///< Interrupt priority.
+ bool hold_bus_uninit; ///< Hold pull up state on GPIO pins after uninit.
} nrfx_twim_config_t;
-/**
- * @brief TWI master driver instance default configuration.
- */
+/** @brief TWI master driver instance default configuration. */
#define NRFX_TWIM_DEFAULT_CONFIG \
{ \
- .frequency = (nrf_twim_frequency_t)NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY, \
.scl = 31, \
.sda = 31, \
+ .frequency = (nrf_twim_frequency_t)NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY, \
.interrupt_priority = NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY, \
.hold_bus_uninit = NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT, \
}
-#define NRFX_TWIM_FLAG_TX_POSTINC (1UL << 0) /**< TX buffer address incremented after transfer. */
-#define NRFX_TWIM_FLAG_RX_POSTINC (1UL << 1) /**< RX buffer address incremented after transfer. */
-#define NRFX_TWIM_FLAG_NO_XFER_EVT_HANDLER (1UL << 2) /**< Interrupt after each transfer is suppressed, and the event handler is not called. */
-#define NRFX_TWIM_FLAG_HOLD_XFER (1UL << 3) /**< Set up the transfer but do not start it. */
-#define NRFX_TWIM_FLAG_REPEATED_XFER (1UL << 4) /**< Flag indicating that the transfer will be executed multiple times. */
-#define NRFX_TWIM_FLAG_TX_NO_STOP (1UL << 5) /**< Flag indicating that the TX transfer will not end with a stop condition. */
+/** @brief Flag indicating that TX buffer address will be incremented after the transfer. */
+#define NRFX_TWIM_FLAG_TX_POSTINC (1UL << 0)
+/** @brief Flag indicating that RX buffer address will be incremented after the transfer. */
+#define NRFX_TWIM_FLAG_RX_POSTINC (1UL << 1)
+/** @brief Flag indicating that the interrupt after each transfer will be suppressed, and the event handler will not be called. */
+#define NRFX_TWIM_FLAG_NO_XFER_EVT_HANDLER (1UL << 2)
+/** @brief Flag indicating that the transfer will be set up, but not started. */
+#define NRFX_TWIM_FLAG_HOLD_XFER (1UL << 3)
+/** @brief Flag indicating that the transfer will be executed multiple times. */
+#define NRFX_TWIM_FLAG_REPEATED_XFER (1UL << 4)
+/** @brief Flag indicating that the TX transfer will not end with a stop condition. */
+#define NRFX_TWIM_FLAG_TX_NO_STOP (1UL << 5)
-/**
- * @brief TWI master driver event types.
- */
+/** @brief TWI master driver event types. */
typedef enum
{
NRFX_TWIM_EVT_DONE, ///< Transfer completed event.
NRFX_TWIM_EVT_ADDRESS_NACK, ///< Error event: NACK received after sending the address.
- NRFX_TWIM_EVT_DATA_NACK ///< Error event: NACK received after sending a data byte.
+ NRFX_TWIM_EVT_DATA_NACK, ///< Error event: NACK received after sending a data byte.
+ NRFX_TWIM_EVT_OVERRUN, ///< Error event: The unread data is replaced by new data.
+ NRFX_TWIM_EVT_BUS_ERROR ///< Error event: An unexpected transition occurred on the bus.
} nrfx_twim_evt_type_t;
-/**
- * @brief TWI master driver transfer types.
- */
+/** @brief TWI master driver transfer types. */
typedef enum
{
- NRFX_TWIM_XFER_TX, ///< TX transfer.
- NRFX_TWIM_XFER_RX, ///< RX transfer.
- NRFX_TWIM_XFER_TXRX, ///< TX transfer followed by RX transfer with repeated start.
- NRFX_TWIM_XFER_TXTX ///< TX transfer followed by TX transfer with repeated start.
+ NRFX_TWIM_XFER_TX, ///< TX transfer.
+ NRFX_TWIM_XFER_RX, ///< RX transfer.
+ NRFX_TWIM_XFER_TXRX, ///< TX transfer followed by RX transfer with repeated start.
+ NRFX_TWIM_XFER_TXTX ///< TX transfer followed by TX transfer with repeated start.
} nrfx_twim_xfer_type_t;
-/**
- * @brief Structure for a TWI transfer descriptor.
- */
+/** @brief Structure for a TWI transfer descriptor. */
typedef struct
{
- nrfx_twim_xfer_type_t type; ///< Type of transfer.
- uint8_t address; ///< Slave address.
- size_t primary_length; ///< Number of bytes transferred.
- size_t secondary_length; ///< Number of bytes transferred.
- uint8_t * p_primary_buf; ///< Pointer to transferred data.
- uint8_t * p_secondary_buf; ///< Pointer to transferred data.
+ nrfx_twim_xfer_type_t type; ///< Type of transfer.
+ uint8_t address; ///< Slave address.
+ size_t primary_length; ///< Number of bytes transferred.
+ size_t secondary_length; ///< Number of bytes transferred.
+ uint8_t * p_primary_buf; ///< Pointer to transferred data.
+ uint8_t * p_secondary_buf; ///< Pointer to transferred data.
} nrfx_twim_xfer_desc_t;
-/**@brief Macro for setting the TX transfer descriptor. */
+/** @brief Macro for setting the TX transfer descriptor. */
#define NRFX_TWIM_XFER_DESC_TX(addr, p_data, length) \
- { \
- .type = NRFX_TWIM_XFER_TX, \
- .address = addr, \
- .primary_length = length, \
- .p_primary_buf = p_data, \
- }
+{ \
+ .type = NRFX_TWIM_XFER_TX, \
+ .address = (addr), \
+ .primary_length = (length), \
+ .secondary_length = 0, \
+ .p_primary_buf = (p_data), \
+ .p_secondary_buf = NULL, \
+}
-/**@brief Macro for setting the RX transfer descriptor. */
+/** @brief Macro for setting the RX transfer descriptor. */
#define NRFX_TWIM_XFER_DESC_RX(addr, p_data, length) \
- { \
- .type = NRFX_TWIM_XFER_RX, \
- .address = addr, \
- .primary_length = length, \
- .p_primary_buf = p_data, \
- }
+{ \
+ .type = NRFX_TWIM_XFER_RX, \
+ .address = (addr), \
+ .primary_length = (length), \
+ .secondary_length = 0, \
+ .p_primary_buf = (p_data), \
+ .p_secondary_buf = NULL, \
+}
-/**@brief Macro for setting the TXRX transfer descriptor. */
+/** @brief Macro for setting the TX-RX transfer descriptor. */
#define NRFX_TWIM_XFER_DESC_TXRX(addr, p_tx, tx_len, p_rx, rx_len) \
- { \
- .type = NRFX_TWIM_XFER_TXRX, \
- .address = addr, \
- .primary_length = tx_len, \
- .secondary_length = rx_len, \
- .p_primary_buf = p_tx, \
- .p_secondary_buf = p_rx, \
- }
+{ \
+ .type = NRFX_TWIM_XFER_TXRX, \
+ .address = (addr), \
+ .primary_length = (tx_len), \
+ .secondary_length = (rx_len), \
+ .p_primary_buf = (p_tx), \
+ .p_secondary_buf = (p_rx), \
+}
-/**@brief Macro for setting the TXTX transfer descriptor. */
+/** @brief Macro for setting the TX-TX transfer descriptor. */
#define NRFX_TWIM_XFER_DESC_TXTX(addr, p_tx, tx_len, p_tx2, tx_len2) \
- { \
- .type = NRFX_TWIM_XFER_TXTX, \
- .address = addr, \
- .primary_length = tx_len, \
- .secondary_length = tx_len2, \
- .p_primary_buf = p_tx, \
- .p_secondary_buf = p_tx2, \
- }
+{ \
+ .type = NRFX_TWIM_XFER_TXTX, \
+ .address = (addr), \
+ .primary_length = (tx_len), \
+ .secondary_length = (tx_len2), \
+ .p_primary_buf = (p_tx), \
+ .p_secondary_buf = (p_tx2), \
+}
-/**
- * @brief Structure for a TWI event.
- */
+/** @brief Structure for a TWI event. */
typedef struct
{
nrfx_twim_evt_type_t type; ///< Event type.
nrfx_twim_xfer_desc_t xfer_desc; ///< Transfer details.
} nrfx_twim_evt_t;
-/**
- * @brief TWI event handler prototype.
- */
+/** @brief TWI event handler prototype. */
typedef void (* nrfx_twim_evt_handler_t)(nrfx_twim_evt_t const * p_event,
void * p_context);
/**
* @brief Function for initializing the TWI driver instance.
*
- * @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] p_config Pointer to the structure with initial configuration.
- * @param[in] event_handler Event handler provided by the user. If NULL, blocking mode is enabled.
- * @param[in] p_context Context passed to event handler.
+ * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] p_config Pointer to the structure with the initial configuration.
+ * @param[in] event_handler Event handler provided by the user. If NULL, blocking mode is enabled.
+ * @param[in] p_context Context passed to event handler.
*
- * @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_INVALID_STATE If the driver is in invalid state.
- * @retval NRFX_ERROR_BUSY If some other peripheral with the same
+ * @retval NRFX_SUCCESS Initialization was successful.
+ * @retval NRFX_ERROR_INVALID_STATE The driver is in invalid state.
+ * @retval NRFX_ERROR_BUSY Some other peripheral with the same
* instance ID is already in use. This is
* possible only if @ref nrfx_prs module
* is enabled.
@@ -248,9 +245,11 @@
* The transmission will be stopped when an error occurs. If a transfer is ongoing,
* the function returns the error code @ref NRFX_ERROR_BUSY.
*
+ * @note This function is deprecated. Use @ref nrfx_twim_xfer instead.
+ *
* @note Peripherals using EasyDMA (including TWIM) require the transfer buffers
* to be placed in the Data RAM region. If this condition is not met,
- * this function will fail with the error code NRFX_ERROR_INVALID_ADDR.
+ * this function fails with the error code NRFX_ERROR_INVALID_ADDR.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] address Address of a specific slave device (only 7 LSB).
@@ -263,12 +262,12 @@
* after the transfer has completed successfully (allowing
* for a repeated start in the next transfer).
*
- * @retval NRFX_SUCCESS If the procedure was successful.
- * @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer.
- * @retval NRFX_ERROR_INTERNAL If an error was detected by hardware.
- * @retval NRFX_ERROR_INVALID_ADDR If the provided buffer is not placed in the Data RAM region.
- * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address in polling mode.
- * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte in polling mode.
+ * @retval NRFX_SUCCESS The procedure is successful.
+ * @retval NRFX_ERROR_BUSY The driver is not ready for a new transfer.
+ * @retval NRFX_ERROR_INTERNAL An unexpected transition occurred on the bus.
+ * @retval NRFX_ERROR_INVALID_ADDR The provided buffer is not placed in the Data RAM region.
+ * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK NACK is received after sending the address in polling mode.
+ * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK NACK is received after sending a data byte in polling mode.
*/
nrfx_err_t nrfx_twim_tx(nrfx_twim_t const * p_instance,
uint8_t address,
@@ -282,6 +281,8 @@
* The transmission will be stopped when an error occurs. If a transfer is ongoing,
* the function returns the error code @ref NRFX_ERROR_BUSY.
*
+ * @note This function is deprecated. Use @ref nrfx_twim_xfer instead.
+ *
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] address Address of a specific slave device (only 7 LSB).
* @param[in] p_data Pointer to a receive buffer.
@@ -290,11 +291,12 @@
* description in the Product Specification). The driver
* checks it with assertion.
*
- * @retval NRFX_SUCCESS If the procedure was successful.
- * @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer.
- * @retval NRFX_ERROR_INTERNAL If an error was detected by hardware.
- * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address in polling mode.
- * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte in polling mode.
+ * @retval NRFX_SUCCESS The procedure is successful.
+ * @retval NRFX_ERROR_BUSY The driver is not ready for a new transfer.
+ * @retval NRFX_ERROR_INTERNAL An unexpected transition occurred on the bus.
+ * @retval NRFX_ERROR_DRV_TWI_ERR_OVERRUN The unread data is replaced by new data.
+ * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK NACK is received after sending the address in polling mode.
+ * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK NACK is received after sending a data byte in polling mode.
*/
nrfx_err_t nrfx_twim_rx(nrfx_twim_t const * p_instance,
uint8_t address,
@@ -302,29 +304,29 @@
size_t length);
/**
- * @brief Function for preparing a TWI transfer.
+ * @brief Function for performing a TWI transfer.
*
* The following transfer types can be configured (@ref nrfx_twim_xfer_desc_t::type):
- * - @ref NRFX_TWIM_XFER_TXRX<span></span>: Write operation followed by a read operation (without STOP condition in between).
- * - @ref NRFX_TWIM_XFER_TXTX<span></span>: Write operation followed by a write operation (without STOP condition in between).
- * - @ref NRFX_TWIM_XFER_TX<span></span>: Write operation (with or without STOP condition).
- * - @ref NRFX_TWIM_XFER_RX<span></span>: Read operation (with STOP condition).
+ * - @ref NRFX_TWIM_XFER_TXRX - Write operation followed by a read operation (without STOP condition in between).
+ * - @ref NRFX_TWIM_XFER_TXTX - Write operation followed by a write operation (without STOP condition in between).
+ * - @ref NRFX_TWIM_XFER_TX - Write operation (with or without STOP condition).
+ * - @ref NRFX_TWIM_XFER_RX - Read operation (with STOP condition).
*
- * @note TXRX and TXTX transfers are supported only in non-blocking mode.
+ * @note TX-RX and TX-TX transfers are supported only in non-blocking mode.
*
* Additional options are provided using the flags parameter:
- * - @ref NRFX_TWIM_FLAG_TX_POSTINC and @ref NRFX_TWIM_FLAG_RX_POSTINC<span></span>: Post-incrementation of buffer addresses. Supported only by TWIM.
- * - @ref NRFX_TWIM_FLAG_NO_XFER_EVT_HANDLER<span></span>: No user event handler after transfer completion. In most cases, this also means no interrupt at the end of the transfer.
- * - @ref NRFX_TWIM_FLAG_HOLD_XFER<span></span>: Driver is not starting the transfer. Use this flag if the transfer is triggered externally by PPI. Supported only by TWIM.
+ * - @ref NRFX_TWIM_FLAG_TX_POSTINC and @ref NRFX_TWIM_FLAG_RX_POSTINC - Post-incrementation of buffer addresses.
+ * - @ref NRFX_TWIM_FLAG_NO_XFER_EVT_HANDLER - No user event handler after the transfer completion. In most cases, this also means no interrupt at the end of the transfer.
+ * - @ref NRFX_TWIM_FLAG_HOLD_XFER - Driver is not starting the transfer. Use this flag if the transfer is triggered externally by PPI.
* Use @ref nrfx_twim_start_task_get to get the address of the start task.
- * - @ref NRFX_TWIM_FLAG_REPEATED_XFER<span></span>: Prepare for repeated transfers. You can set up a number of transfers that will be triggered externally (for example by PPI).
+ * - @ref NRFX_TWIM_FLAG_REPEATED_XFER - Prepare for repeated transfers. You can set up a number of transfers that will be triggered externally (for example by PPI).
* An example is a TXRX transfer with the options @ref NRFX_TWIM_FLAG_RX_POSTINC, @ref NRFX_TWIM_FLAG_NO_XFER_EVT_HANDLER, and @ref NRFX_TWIM_FLAG_REPEATED_XFER.
* After the transfer is set up, a set of transfers can be triggered by PPI that will read, for example, the same register of an
* external component and put it into a RAM buffer without any interrupts. @ref nrfx_twim_stopped_event_get can be used to get the
* address of the STOPPED event, which can be used to count the number of transfers. If @ref NRFX_TWIM_FLAG_REPEATED_XFER is used,
* the driver does not set the driver instance into busy state, so you must ensure that the next transfers are set up
- * when TWIM is not active. Supported only by TWIM.
- * - @ref NRFX_TWIM_FLAG_TX_NO_STOP<span></span>: No stop condition after TX transfer.
+ * when TWIM is not active.
+ * - @ref NRFX_TWIM_FLAG_TX_NO_STOP - No stop condition after the TX transfer.
*
* @note
* Some flag combinations are invalid:
@@ -339,17 +341,18 @@
* to be placed in the Data RAM region. If this condition is not met,
* this function will fail with the error code NRFX_ERROR_INVALID_ADDR.
*
- * @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] p_xfer_desc Pointer to the transfer descriptor.
- * @param[in] flags Transfer options (0 for default settings).
+ * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] p_xfer_desc Pointer to the transfer descriptor.
+ * @param[in] flags Transfer options (0 for default settings).
*
- * @retval NRFX_SUCCESS If the procedure was successful.
- * @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer.
- * @retval NRFX_ERROR_NOT_SUPPORTED If the provided parameters are not supported.
- * @retval NRFX_ERROR_INTERNAL If an error was detected by hardware.
- * @retval NRFX_ERROR_INVALID_ADDR If the provided buffers are not placed in the Data RAM region.
- * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address.
- * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte.
+ * @retval NRFX_SUCCESS The procedure is successful.
+ * @retval NRFX_ERROR_BUSY The driver is not ready for a new transfer.
+ * @retval NRFX_ERROR_NOT_SUPPORTED The provided parameters are not supported.
+ * @retval NRFX_ERROR_INTERNAL An unexpected transition occurred on the bus.
+ * @retval NRFX_ERROR_INVALID_ADDR The provided buffers are not placed in the Data RAM region.
+ * @retval NRFX_ERROR_DRV_TWI_ERR_OVERRUN The unread data is replaced by new data.
+ * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK NACK is received after sending the address.
+ * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK NACK is received after sending a data byte.
*/
nrfx_err_t nrfx_twim_xfer(nrfx_twim_t const * p_instance,
nrfx_twim_xfer_desc_t const * p_xfer_desc,
@@ -360,8 +363,8 @@
*
* @param[in] p_instance TWI instance.
*
- * @retval true If the TWI driver is currently busy performing a transfer.
- * @retval false If the TWI driver is ready for a new transfer.
+ * @retval true The TWI driver is currently busy performing a transfer.
+ * @retval false The TWI driver is ready for a new transfer.
*/
bool nrfx_twim_is_busy(nrfx_twim_t const * p_instance);
@@ -369,13 +372,13 @@
/**
* @brief Function for returning the address of a TWIM start task.
*
- * This function should be used if @ref nrfx_twim_xfer was called with the flag @ref NRFX_TWIM_FLAG_HOLD_XFER.
+ * This function is to be used if @ref nrfx_twim_xfer was called with the flag @ref NRFX_TWIM_FLAG_HOLD_XFER.
* In that case, the transfer is not started by the driver, but it must be started externally by PPI.
*
- * @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] xfer_type Transfer type used in the last call of the @ref nrfx_twim_xfer function.
+ * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] xfer_type Transfer type used in the last call of the @ref nrfx_twim_xfer function.
*
- * @return Start task address (TX or RX) depending on the value of xfer_type.
+ * @return Start task address (TX or RX) depending on the value of xfer_type.
*/
uint32_t nrfx_twim_start_task_get(nrfx_twim_t const * p_instance, nrfx_twim_xfer_type_t xfer_type);
@@ -385,12 +388,37 @@
* A STOPPED event can be used to detect the end of a transfer if the @ref NRFX_TWIM_FLAG_NO_XFER_EVT_HANDLER
* option is used.
*
- * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] p_instance Pointer to the driver instance structure.
*
- * @return STOPPED event address.
+ * @return STOPPED event address.
*/
uint32_t nrfx_twim_stopped_event_get(nrfx_twim_t const * p_instance);
+/**
+ * @brief Function for recovering the bus.
+ *
+ * This function checks if the bus is not stuck because of a slave holding the SDA line in the low state,
+ * and if needed it performs required number of pulses on the SCL line to make the slave release the SDA line.
+ * Finally, the function generates a STOP condition on the bus to put it into a known state.
+ *
+ * @note This function can be used only if the TWIM driver is uninitialized.
+ *
+ * @param[in] scl_pin SCL pin number.
+ * @param[in] sda_pin SDA pin number.
+ *
+ * @retval NRFX_SUCCESS Bus recovery was successful.
+ * @retval NRFX_ERROR_INTERNAL Bus recovery failed.
+ */
+__STATIC_INLINE nrfx_err_t nrfx_twim_bus_recover(uint32_t scl_pin, uint32_t sda_pin);
+
+#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+__STATIC_INLINE nrfx_err_t nrfx_twim_bus_recover(uint32_t scl_pin, uint32_t sda_pin)
+{
+ return nrfx_twi_twim_bus_recover(scl_pin, sda_pin);
+}
+#endif
+
+/** @} */
void nrfx_twim_0_irq_handler(void);
void nrfx_twim_1_irq_handler(void);
@@ -398,8 +426,6 @@
void nrfx_twim_3_irq_handler(void);
-/** @} */
-
#ifdef __cplusplus
}
#endif
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_twis.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_twis.h
index a9ba5fb..4c3d0ca 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_twis.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_twis.h
@@ -44,18 +44,17 @@
* @defgroup nrfx_twis TWIS driver
* @{
* @ingroup nrf_twis
- * @brief Two Wire Slave interface (TWIS) peripheral driver.
+ * @brief Two Wire Interface Slave with EasyDMA (TWIS) peripheral driver.
*/
-/**
- * @brief TWIS driver instance data structure.
- */
+/** @brief TWIS driver instance data structure. */
typedef struct
{
NRF_TWIS_Type * p_reg; ///< Pointer to a structure with TWIS registers.
- uint8_t drv_inst_idx; ///< Driver instance index.
+ uint8_t drv_inst_idx; ///< Index of the driver instance. For internal use only.
} nrfx_twis_t;
+#ifndef __NRFX_DOXYGEN__
enum {
#if NRFX_CHECK(NRFX_TWIS0_ENABLED)
NRFX_TWIS0_INST_IDX,
@@ -71,32 +70,29 @@
#endif
NRFX_TWIS_ENABLED_COUNT
};
+#endif
-/**
- * @brief Macro for creating a TWIS driver instance.
- */
+/** @brief Macro for creating a TWIS driver instance. */
#define NRFX_TWIS_INSTANCE(id) \
{ \
.p_reg = NRFX_CONCAT_2(NRF_TWIS, id), \
.drv_inst_idx = NRFX_CONCAT_3(NRFX_TWIS, id, _INST_IDX), \
}
-/**
- * @brief Event callback function event definitions.
- */
+/** @brief Event callback function event definitions. */
typedef enum
{
NRFX_TWIS_EVT_READ_REQ, ///< Read request detected.
/**< If there is no buffer prepared, buf_req flag in the even will be set.
Call then @ref nrfx_twis_tx_prepare to give parameters for buffer.
*/
- NRFX_TWIS_EVT_READ_DONE, ///< Read request has finished - free any data.
+ NRFX_TWIS_EVT_READ_DONE, ///< Read request finished - free any data.
NRFX_TWIS_EVT_READ_ERROR, ///< Read request finished with error.
NRFX_TWIS_EVT_WRITE_REQ, ///< Write request detected.
/**< If there is no buffer prepared, buf_req flag in the even will be set.
Call then @ref nrfx_twis_rx_prepare to give parameters for buffer.
*/
- NRFX_TWIS_EVT_WRITE_DONE, ///< Write request has finished - process data.
+ NRFX_TWIS_EVT_WRITE_DONE, ///< Write request finished - process data.
NRFX_TWIS_EVT_WRITE_ERROR, ///< Write request finished with error.
NRFX_TWIS_EVT_GENERAL_ERROR ///< Error that happens not inside WRITE or READ transaction.
} nrfx_twis_evt_type_t;
@@ -106,7 +102,7 @@
*
* This is flag enum - values from this enum can be connected using logical or operator.
* @note
- * We could use directly @ref nrf_twis_error_t. Error type enum is redefined here because
+ * You can use directly @ref nrf_twis_error_t. Error type enum is redefined here because
* of possible future extension (eg. supporting timeouts and synchronous mode).
*/
typedef enum
@@ -117,9 +113,7 @@
NRFX_TWIS_ERROR_UNEXPECTED_EVENT = 1 << 8 /**< Unexpected event detected by state machine. */
} nrfx_twis_error_t;
-/**
- * @brief TWIS driver event structure.
- */
+/** @brief TWIS driver event structure. */
typedef struct
{
nrfx_twis_evt_type_t type; ///< Event type.
@@ -130,7 +124,7 @@
uint32_t tx_amount; ///< Data for @ref NRFX_TWIS_EVT_READ_DONE.
uint32_t rx_amount; ///< Data for @ref NRFX_TWIS_EVT_WRITE_DONE.
uint32_t error; ///< Data for @ref NRFX_TWIS_EVT_GENERAL_ERROR.
- } data;
+ } data; ///< Union to store event data.
} nrfx_twis_evt_t;
/**
@@ -140,9 +134,7 @@
*/
typedef void (*nrfx_twis_event_handler_t)(nrfx_twis_evt_t const * p_event);
-/**
- * @brief Structure for TWIS configuration.
- */
+/** @brief Structure for TWIS configuration. */
typedef struct
{
uint32_t addr[2]; //!< Set addresses that this slave should respond. Set 0 to disable.
@@ -150,19 +142,17 @@
uint32_t sda; //!< SDA pin number.
nrf_gpio_pin_pull_t scl_pull; //!< SCL pin pull.
nrf_gpio_pin_pull_t sda_pull; //!< SDA pin pull.
- uint8_t interrupt_priority; //!< The priority of interrupt for the module to set.
+ uint8_t interrupt_priority; //!< The priority of interrupt for the module to be set.
} nrfx_twis_config_t;
-/**
- * @brief Generate default configuration for TWIS driver instance.
- */
-#define NRFX_TWIS_DEFAULT_CONFIG \
-{ \
+/** @brief Generate the default configuration for the TWIS driver instance. */
+#define NRFX_TWIS_DEFAULT_CONFIG \
+{ \
.addr = { NRFX_TWIS_DEFAULT_CONFIG_ADDR0, \
NRFX_TWIS_DEFAULT_CONFIG_ADDR1 }, \
.scl = 31, \
- .scl_pull = (nrf_gpio_pin_pull_t)NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL, \
.sda = 31, \
+ .scl_pull = (nrf_gpio_pin_pull_t)NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL, \
.sda_pull = (nrf_gpio_pin_pull_t)NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL, \
.interrupt_priority = NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY \
}
@@ -170,19 +160,19 @@
/**
* @brief Function for initializing the TWIS driver instance.
*
- * Function initializes and enables TWIS driver.
- * @attention After driver initialization enable it by @ref nrfx_twis_enable.
+ * Function initializes and enables the TWIS driver.
+ * @attention After driver initialization enable it with @ref nrfx_twis_enable.
*
- * @param[in] p_instance Pointer to the driver instance structure.
- * @attention @em p_instance has to be global object.
- * It would be used by interrupts so make it sure that object
- * would not be destroyed when function is leaving.
- * @param[in] p_config Pointer to the structure with initial configuration.
- * @param[in] event_handler Event handler provided by the user.
+ * @param[in] p_instance Pointer to the driver instance structure.
+ * @attention @em p_instance has to be global object.
+ * It will be used by interrupts so make it sure that object
+ * is not destroyed when function is leaving.
+ * @param[in] p_config Pointer to the structure with the initial configuration.
+ * @param[in] event_handler Event handler provided by the user.
*
- * @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_INVALID_STATE If the driver is already initialized.
- * @retval NRFX_ERROR_BUSY If some other peripheral with the same
+ * @retval NRFX_SUCCESS Initialization is successful.
+ * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized.
+ * @retval NRFX_ERROR_BUSY Some other peripheral with the same
* instance ID is already in use. This is
* possible only if NRFX_PRS_ENABLED
* is set to a value other than zero.
@@ -194,24 +184,25 @@
/**
* @brief Function for uninitializing the TWIS driver instance.
*
- * Function initializes the peripheral and resets all registers to default values.
+ * Function uninitializes the peripheral and resets all registers to default values.
*
- * @param[in] p_instance Pointer to the driver instance structure.
* @note
* It is safe to call nrfx_twis_uninit even before initialization.
- * Actually @ref nrfx_twis_init function calls this function to
+ * Actually, @ref nrfx_twis_init function calls this function to
* make sure that TWIS state is known.
* @note
* If TWIS driver was in uninitialized state before calling this function,
- * selected pins would not be reset to default configuration.
+ * the selected pins would not be reset to default configuration.
+ *
+ * @param[in] p_instance Pointer to the driver instance structure.
*/
void nrfx_twis_uninit(nrfx_twis_t const * p_instance);
/**
- * @brief Enable TWIS instance.
+ * @brief Function for enabling the TWIS instance.
*
- * This function enables TWIS instance.
- * Function defined if there is needs for dynamically enabling and disabling the peripheral.
+ * This function enables the TWIS instance.
+ * Function defined if there is need for dynamically enabling and disabling the peripheral.
* Use @ref nrfx_twis_enable and @ref nrfx_twis_disable functions.
* They do not change any configuration registers.
*
@@ -220,9 +211,9 @@
void nrfx_twis_enable(nrfx_twis_t const * p_instance);
/**
- * @brief Disable TWIS instance.
+ * @brief Function for disabling the TWIS instance.
*
- * Disabling TWIS instance gives possibility to turn off the TWIS while
+ * This function disables the TWIS instance, which gives possibility to turn off the TWIS while
* holding configuration done by @ref nrfx_twis_init.
*
* @param p_instance Pointer to the driver instance structure.
@@ -230,47 +221,47 @@
void nrfx_twis_disable(nrfx_twis_t const * p_instance);
/**
- * @brief Get and clear last error flags.
+ * @brief Function for getting and clearing the last error flags.
*
- * Function gets information about errors.
- * This is also the only possibility to exit from error substate of the internal state machine.
- *
- * @param[in] p_instance Pointer to the driver instance structure.
- * @return Error flags defined in @ref nrfx_twis_error_t.
+ * This function gets the information about errors.
+ * This is also the only possibility to exit from the error substate of the internal state machine.
* @attention
* This function clears error state and flags.
+ *
+ * @param[in] p_instance Pointer to the driver instance structure.
+ *
+ * @return Error flags defined in @ref nrfx_twis_error_t.
*/
uint32_t nrfx_twis_error_get_and_clear(nrfx_twis_t const * p_instance);
-
/**
- * @brief Prepare data for sending.
+ * @brief Function for preparing the data for sending.
*
- * This function should be used in response for @ref NRFX_TWIS_EVT_READ_REQ event.
+ * This function is to be used in response to the @ref NRFX_TWIS_EVT_READ_REQ event.
*
* @note Peripherals using EasyDMA (including TWIS) require the transfer buffers
* to be placed in the Data RAM region. If this condition is not met,
* this function will fail with the error code NRFX_ERROR_INVALID_ADDR.
+ * @attention Transmission buffer must be placed in RAM.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_buf Transmission buffer.
- * @attention Transmission buffer has to be placed in RAM.
- * @param size Maximum number of bytes that master may read from buffer given.
+ * @param[in] size Maximum number of bytes that master may read from buffer given.
*
- * @retval NRFX_SUCCESS Preparation finished properly.
- * @retval NRFX_ERROR_INVALID_ADDR Given @em p_buf is not placed inside the RAM.
- * @retval NRFX_ERROR_INVALID_LENGTH Wrong value in @em size parameter.
- * @retval NRFX_ERROR_INVALID_STATE Module not initialized or not enabled.
+ * @retval NRFX_SUCCESS The preparation finished properly.
+ * @retval NRFX_ERROR_INVALID_ADDR The given @em p_buf is not placed inside the RAM.
+ * @retval NRFX_ERROR_INVALID_LENGTH There is a wrong value in the @em size parameter.
+ * @retval NRFX_ERROR_INVALID_STATE The module is not initialized or not enabled.
*/
nrfx_err_t nrfx_twis_tx_prepare(nrfx_twis_t const * p_instance,
void const * p_buf,
size_t size);
/**
- * @brief Get number of transmitted bytes.
+ * @brief Function for getting the number of transmitted bytes.
*
- * Function returns number of bytes sent.
- * This function may be called after @ref NRFX_TWIS_EVT_READ_DONE or @ref NRFX_TWIS_EVT_READ_ERROR events.
+ * This function returns the number of bytes sent.
+ * This function can be called after @ref NRFX_TWIS_EVT_READ_DONE or @ref NRFX_TWIS_EVT_READ_ERROR events.
*
* @param[in] p_instance Pointer to the driver instance structure.
*
@@ -279,33 +270,32 @@
__STATIC_INLINE size_t nrfx_twis_tx_amount(nrfx_twis_t const * p_instance);
/**
- * @brief Prepare data for receiving
+ * @brief Function for preparing the data for receiving.
*
- * This function should be used in response for @ref NRFX_TWIS_EVT_WRITE_REQ event.
+ * This function must be used in response to the @ref NRFX_TWIS_EVT_WRITE_REQ event.
*
* @note Peripherals using EasyDMA (including TWIS) require the transfer buffers
* to be placed in the Data RAM region. If this condition is not met,
- * this function will fail with the error code NRFX_ERROR_INVALID_ADDR.
+ * this function fails with the error code NRFX_ERROR_INVALID_ADDR.
*
* @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] p_buf Buffer that would be filled with received data.
- * @attention Receiving buffer has to be placed in RAM.
- * @param size Size of the buffer (maximum amount of data to receive).
+ * @param[in] p_buf Buffer that is to be filled with received data.
+ * @param[in] size Size of the buffer (maximum amount of data to receive).
*
- * @retval NRFX_SUCCESS Preparation finished properly.
- * @retval NRFX_ERROR_INVALID_ADDR Given @em p_buf is not placed inside the RAM.
- * @retval NRFX_ERROR_INVALID_LENGTH Wrong value in @em size parameter.
- * @retval NRFX_ERROR_INVALID_STATE Module not initialized or not enabled.
+ * @retval NRFX_SUCCESS The preparation finished properly.
+ * @retval NRFX_ERROR_INVALID_ADDR The given @em p_buf is not placed inside the RAM.
+ * @retval NRFX_ERROR_INVALID_LENGTH There is a wrong value in the @em size parameter.
+ * @retval NRFX_ERROR_INVALID_STATE The module is not initialized or not enabled.
*/
nrfx_err_t nrfx_twis_rx_prepare(nrfx_twis_t const * p_instance,
void * p_buf,
size_t size);
/**
- * @brief Get number of received bytes.
+ * @brief Function for getting the number of received bytes.
*
- * Function returns number of bytes received.
- * This function may be called after @ref NRFX_TWIS_EVT_WRITE_DONE or @ref NRFX_TWIS_EVT_WRITE_ERROR events.
+ * This function returns number of bytes received.
+ * It can be called after @ref NRFX_TWIS_EVT_WRITE_DONE or @ref NRFX_TWIS_EVT_WRITE_ERROR events.
*
* @param[in] p_instance Pointer to the driver instance structure.
*
@@ -314,65 +304,65 @@
__STATIC_INLINE size_t nrfx_twis_rx_amount(nrfx_twis_t const * p_instance);
/**
- * @brief Function checks if driver is busy right now.
+ * @brief Function for checking if the driver is busy right now.
*
- * Actual driver substate is tested.
- * If driver is in any other state than IDLE or ERROR this function returns true.
+ * This function tests the actual driver substate.
+ * If the driver is in any other state than IDLE or ERROR, this function returns true.
*
* @param[in] p_instance Pointer to the driver instance structure.
*
- * @retval true Driver is in state other than ERROR or IDLE.
+ * @retval true The driver is in state other than ERROR or IDLE.
* @retval false There is no transmission pending.
*/
bool nrfx_twis_is_busy(nrfx_twis_t const * p_instance);
/**
- * @brief Function checks if driver is waiting for tx buffer.
+ * @brief Function for checking if the driver is waiting for a TX buffer.
*
- * If this function returns true, it means that driver is stalled expecting
+ * If this function returns true, the driver is stalled expecting
* of the @ref nrfx_twis_tx_prepare function call.
*
* @param[in] p_instance Pointer to the driver instance structure.
*
- * @retval true Driver waits for @ref nrfx_twis_tx_prepare.
- * @retval false Driver is not in the state where it waits for preparing tx buffer.
+ * @retval true The driver is waiting for @ref nrfx_twis_tx_prepare.
+ * @retval false The driver is not in the state where it is waiting for preparing a TX buffer.
*/
bool nrfx_twis_is_waiting_tx_buff(nrfx_twis_t const * p_instance);
/**
- * @brief Function checks if driver is waiting for rx buffer.
+ * @brief Function for checking if the driver is waiting for an RX buffer.
*
- * If this function returns true, it means that driver is staled expecting
+ * If this function returns true, the driver is stalled expecting
* of the @ref nrfx_twis_rx_prepare function call.
*
* @param[in] p_instance Pointer to the driver instance structure.
*
- * @retval true Driver waits for @ref nrfx_twis_rx_prepare.
- * @retval false Driver is not in the state where it waits for preparing rx buffer.
+ * @retval true The driver is waiting for @ref nrfx_twis_rx_prepare.
+ * @retval false The driver is not in the state where it is waiting for preparing an RX buffer.
*/
bool nrfx_twis_is_waiting_rx_buff(nrfx_twis_t const * p_instance);
/**
- * @brief Check if driver is sending data.
+ * @brief Function for checking if the driver is sending data.
*
- * If this function returns true, it means that there is ongoing output transmission.
+ * If this function returns true, there is an ongoing output transmission.
*
* @param[in] p_instance Pointer to the driver instance structure.
*
- * @retval true There is ongoing output transmission.
- * @retval false Driver is in other state.
+ * @retval true There is an ongoing output transmission.
+ * @retval false The driver is in other state.
*/
bool nrfx_twis_is_pending_tx(nrfx_twis_t const * p_instance);
/**
- * @brief Check if driver is receiving data.
+ * @brief Function for checking if the driver is receiving data.
*
- * If this function returns true, it means that there is ongoing input transmission.
+ * If this function returns true, there is an ongoing input transmission.
*
* @param[in] p_instance Pointer to the driver instance structure.
*
- * @retval true There is ongoing input transmission.
- * @retval false Driver is in other state.
+ * @retval true There is an ongoing input transmission.
+ * @retval false The driver is in other state.
*/
bool nrfx_twis_is_pending_rx(nrfx_twis_t const * p_instance);
@@ -388,6 +378,8 @@
}
#endif // SUPPRESS_INLINE_IMPLEMENTATION
+/** @} */
+
void nrfx_twis_0_irq_handler(void);
void nrfx_twis_1_irq_handler(void);
@@ -395,8 +387,6 @@
void nrfx_twis_3_irq_handler(void);
-/** @} */
-
#ifdef __cplusplus
}
#endif
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_uart.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_uart.h
index adbb9d3..a96df3c 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_uart.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_uart.h
@@ -46,34 +46,30 @@
* @brief UART peripheral driver.
*/
-/**
- * @brief UART driver instance data structure.
- */
+/** @brief Data structure of the UART driver instance. */
typedef struct
{
NRF_UART_Type * p_reg; ///< Pointer to a structure with UART registers.
- uint8_t drv_inst_idx; ///< Driver instance index.
+ uint8_t drv_inst_idx; ///< Index of the driver instance. For internal use only.
} nrfx_uart_t;
+#ifndef __NRFX_DOXYGEN__
enum {
#if NRFX_CHECK(NRFX_UART0_ENABLED)
NRFX_UART0_INST_IDX,
#endif
NRFX_UART_ENABLED_COUNT
};
+#endif
-/**
- * @brief Macro for creating a UART driver instance.
- */
+/** @brief Macro for creating a UART driver instance. */
#define NRFX_UART_INSTANCE(id) \
{ \
.p_reg = NRFX_CONCAT_2(NRF_UART, id), \
.drv_inst_idx = NRFX_CONCAT_3(NRFX_UART, id, _INST_IDX), \
}
-/**
- * @brief Types of UART driver events.
- */
+/** @brief Types of UART driver events. */
typedef enum
{
NRFX_UART_EVT_TX_DONE, ///< Requested TX transfer completed.
@@ -81,9 +77,7 @@
NRFX_UART_EVT_ERROR, ///< Error reported by UART peripheral.
} nrfx_uart_evt_type_t;
-/**
- * @brief Structure for UART configuration.
- */
+/** @brief Structure for the UART configuration. */
typedef struct
{
uint32_t pseltxd; ///< TXD pin number.
@@ -93,13 +87,11 @@
void * p_context; ///< Context passed to interrupt handler.
nrf_uart_hwfc_t hwfc; ///< Flow control configuration.
nrf_uart_parity_t parity; ///< Parity configuration.
- nrf_uart_baudrate_t baudrate; ///< Baudrate.
+ nrf_uart_baudrate_t baudrate; ///< Baud rate.
uint8_t interrupt_priority; ///< Interrupt priority.
} nrfx_uart_config_t;
-/**
- * @brief UART default configuration.
- */
+/** @brief UART default configuration. */
#define NRFX_UART_DEFAULT_CONFIG \
{ \
.pseltxd = NRF_UART_PSEL_DISCONNECTED, \
@@ -113,27 +105,21 @@
.interrupt_priority = NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY, \
}
-/**
- * @brief Structure for UART transfer completion event.
- */
+/** @brief Structure for the UART transfer completion event. */
typedef struct
{
uint8_t * p_data; ///< Pointer to memory used for transfer.
uint32_t bytes; ///< Number of bytes transfered.
} nrfx_uart_xfer_evt_t;
-/**
- * @brief Structure for UART error event.
- */
+/** @brief Structure for the UART error event. */
typedef struct
{
- nrfx_uart_xfer_evt_t rxtx; ///< Transfer details includes number of bytes transferred.
+ nrfx_uart_xfer_evt_t rxtx; ///< Transfer details, including number of bytes transferred.
uint32_t error_mask; ///< Mask of error flags that generated the event.
} nrfx_uart_error_evt_t;
-/**
- * @brief Structure for UART event.
- */
+/** @brief Structure for the UART event. */
typedef struct
{
nrfx_uart_evt_type_t type; ///< Event type.
@@ -141,15 +127,15 @@
{
nrfx_uart_xfer_evt_t rxtx; ///< Data provided for transfer completion events.
nrfx_uart_error_evt_t error; ///< Data provided for error event.
- } data;
+ } data; ///< Union to store event data.
} nrfx_uart_event_t;
/**
* @brief UART interrupt event handler.
*
- * @param[in] p_event Pointer to event structure. Event is allocated on the stack so it is available
- * only within the context of the event handler.
- * @param[in] p_context Context passed to interrupt handler, set on initialization.
+ * @param[in] p_event Pointer to event structure. Event is allocated on the stack so it is available
+ * only within the context of the event handler.
+ * @param[in] p_context Context passed to the interrupt handler, set on initialization.
*/
typedef void (*nrfx_uart_event_handler_t)(nrfx_uart_event_t const * p_event,
void * p_context);
@@ -160,45 +146,46 @@
* This function configures and enables UART. After this function GPIO pins are controlled by UART.
*
* @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] p_config Pointer to the structure with initial configuration.
- * @param[in] event_handler Event handler provided by the user. If not provided driver works in
+ * @param[in] p_config Pointer to the structure with the initial configuration.
+ * @param[in] event_handler Event handler provided by the user. If not provided, the driver works in
* blocking mode.
*
- * @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_INVALID_STATE If driver is already initialized.
- * @retval NRFX_ERROR_BUSY If some other peripheral with the same
- * instance ID is already in use. This is
- * possible only if @ref nrfx_prs module
- * is enabled.
+ * @retval NRFX_SUCCESS Initialization is successful.
+ * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized.
+ * @retval NRFX_ERROR_BUSY Some other peripheral with the same
+ * instance ID is already in use. This is
+ * possible only if @ref nrfx_prs module
+ * is enabled.
*/
nrfx_err_t nrfx_uart_init(nrfx_uart_t const * p_instance,
nrfx_uart_config_t const * p_config,
nrfx_uart_event_handler_t event_handler);
/**
- * @brief Function for uninitializing the UART driver.
+ * @brief Function for uninitializing the UART driver.
+ *
* @param[in] p_instance Pointer to the driver instance structure.
*/
void nrfx_uart_uninit(nrfx_uart_t const * p_instance);
/**
- * @brief Function for getting the address of a specific UART task.
+ * @brief Function for getting the address of the specified UART task.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] task Task.
*
- * @return Task address.
+ * @return Task address.
*/
__STATIC_INLINE uint32_t nrfx_uart_task_address_get(nrfx_uart_t const * p_instance,
nrf_uart_task_t task);
/**
- * @brief Function for getting the address of a specific UART event.
+ * @brief Function for getting the address of the specified UART event.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] event Event.
*
- * @return Event address.
+ * @return Event address.
*/
__STATIC_INLINE uint32_t nrfx_uart_event_address_get(nrfx_uart_t const * p_instance,
nrf_uart_event_t event);
@@ -208,7 +195,7 @@
*
* If an event handler was provided in nrfx_uart_init() call, this function
* returns immediately and the handler is called when the transfer is done.
- * Otherwise, the transfer is performed in blocking mode, i.e. this function
+ * Otherwise, the transfer is performed in blocking mode, that is this function
* returns when the transfer is finished. Blocking mode is not using interrupt
* so there is no context switching inside the function.
*
@@ -216,10 +203,10 @@
* @param[in] p_data Pointer to data.
* @param[in] length Number of bytes to send.
*
- * @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_BUSY If driver is already transferring.
- * @retval NRFX_ERROR_FORBIDDEN If the transfer was aborted from a different context
- * (blocking mode only).
+ * @retval NRFX_SUCCESS Initialization was successful.
+ * @retval NRFX_ERROR_BUSY Driver is already transferring.
+ * @retval NRFX_ERROR_FORBIDDEN The transfer was aborted from a different context
+ * (blocking mode only).
*/
nrfx_err_t nrfx_uart_tx(nrfx_uart_t const * p_instance,
uint8_t const * p_data,
@@ -230,15 +217,15 @@
*
* @param[in] p_instance Pointer to the driver instance structure.
*
- * @retval true If UART is transmitting.
- * @retval false If UART is not transmitting.
+ * @retval true The UART is transmitting.
+ * @retval false The UART is not transmitting.
*/
bool nrfx_uart_tx_in_progress(nrfx_uart_t const * p_instance);
/**
* @brief Function for aborting any ongoing transmission.
* @note @ref NRFX_UART_EVT_TX_DONE event will be generated in non-blocking mode.
- * It will contain number of bytes sent until abort was called. The event
+ * It will contain number of bytes sent until the abort was called. The event
* handler will be called from the function context.
*
* @param[in] p_instance Pointer to the driver instance structure.
@@ -248,15 +235,14 @@
/**
* @brief Function for receiving data over UART.
*
- * If an event handler was provided in the nrfx_uart_init() call, this function
+ * If an event handler is provided in the nrfx_uart_init() call, this function
* returns immediately and the handler is called when the transfer is done.
- * Otherwise, the transfer is performed in blocking mode, meaning that this function
+ * Otherwise, the transfer is performed in blocking mode, that is this function
* returns when the transfer is finished. Blocking mode is not using interrupt so
* there is no context switching inside the function.
- *
- * The receive buffer pointer is double buffered in non-blocking mode. The secondary
+ * The receive buffer pointer is double-buffered in non-blocking mode. The secondary
* buffer can be set immediately after starting the transfer and will be filled
- * when the primary buffer is full. The double buffering feature allows
+ * when the primary buffer is full. The double-buffering feature allows
* receiving data continuously.
*
* If this function is used without a previous call to @ref nrfx_uart_rx_enable, the reception
@@ -272,28 +258,26 @@
* @param[in] p_data Pointer to data.
* @param[in] length Number of bytes to receive.
*
- * @retval NRFX_SUCCESS If reception is complete (in case of blocking mode) or it is
+ * @retval NRFX_SUCCESS Reception is complete (in case of blocking mode) or it is
* successfully started (in case of non-blocking mode).
- * @retval NRFX_ERROR_BUSY If the driver is already receiving
+ * @retval NRFX_ERROR_BUSY The driver is already receiving
* (and the secondary buffer has already been set
* in non-blocking mode).
- * @retval NRFX_ERROR_FORBIDDEN If the transfer was aborted from a different context
+ * @retval NRFX_ERROR_FORBIDDEN The transfer was aborted from a different context
* (blocking mode only, also see @ref nrfx_uart_rx_disable).
- * @retval NRFX_ERROR_INTERNAL If UART peripheral reported an error.
+ * @retval NRFX_ERROR_INTERNAL The UART peripheral reported an error.
*/
nrfx_err_t nrfx_uart_rx(nrfx_uart_t const * p_instance,
uint8_t * p_data,
size_t length);
-
-
/**
* @brief Function for testing the receiver state in blocking mode.
*
* @param[in] p_instance Pointer to the driver instance structure.
*
- * @retval true If the receiver has at least one byte of data to get.
- * @retval false If the receiver is empty.
+ * @retval true The receiver has at least one byte of data to get.
+ * @retval false The receiver is empty.
*/
bool nrfx_uart_rx_ready(nrfx_uart_t const * p_instance);
@@ -321,7 +305,7 @@
/**
* @brief Function for aborting any ongoing reception.
* @note @ref NRFX_UART_EVT_TX_DONE event will be generated in non-blocking mode.
- * It will contain number of bytes received until abort was called. The event
+ * It will contain number of bytes received until the abort was called. The event
* handler will be called from the UART interrupt context.
*
* @param[in] p_instance Pointer to the driver instance structure.
@@ -330,12 +314,12 @@
/**
* @brief Function for reading error source mask. Mask contains values from @ref nrf_uart_error_mask_t.
- * @note Function should be used in blocking mode only. In case of non-blocking mode, an error event is
+ * @note Function must be used in blocking mode only. In case of non-blocking mode, an error event is
* generated. Function clears error sources after reading.
*
* @param[in] p_instance Pointer to the driver instance structure.
*
- * @retval Mask of reported errors.
+ * @return Mask of reported errors.
*/
uint32_t nrfx_uart_errorsrc_get(nrfx_uart_t const * p_instance);
@@ -354,12 +338,12 @@
}
#endif // SUPPRESS_INLINE_IMPLEMENTATION
+/** @} */
+
void nrfx_uart_0_irq_handler(void);
-/** @} */
-
#ifdef __cplusplus
}
#endif
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_uarte.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_uarte.h
index da767cd..b5eb109 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_uarte.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_uarte.h
@@ -46,15 +46,14 @@
* @brief UARTE peripheral driver.
*/
-/**
- * @brief Structure for the UARTE driver instance.
- */
+/** @brief Structure for the UARTE driver instance. */
typedef struct
{
NRF_UARTE_Type * p_reg; ///< Pointer to a structure with UARTE registers.
- uint8_t drv_inst_idx; ///< Driver instance index.
+ uint8_t drv_inst_idx; ///< Index of the driver instance. For internal use only.
} nrfx_uarte_t;
+#ifndef __NRFX_DOXYGEN__
enum {
#if NRFX_CHECK(NRFX_UARTE0_ENABLED)
NRFX_UARTE0_INST_IDX,
@@ -70,19 +69,16 @@
#endif
NRFX_UARTE_ENABLED_COUNT
};
+#endif
-/**
- * @brief Macro for creating a UARTE driver instance.
- */
+/** @brief Macro for creating a UARTE driver instance. */
#define NRFX_UARTE_INSTANCE(id) \
{ \
.p_reg = NRFX_CONCAT_2(NRF_UARTE, id), \
.drv_inst_idx = NRFX_CONCAT_3(NRFX_UARTE, id, _INST_IDX), \
}
-/**
- * @brief Types of UARTE driver events.
- */
+/** @brief Types of UARTE driver events. */
typedef enum
{
NRFX_UARTE_EVT_TX_DONE, ///< Requested TX transfer completed.
@@ -90,9 +86,7 @@
NRFX_UARTE_EVT_ERROR, ///< Error reported by UART peripheral.
} nrfx_uarte_evt_type_t;
-/**
- * @brief Structure for UARTE configuration.
- */
+/** @brief Structure for the UARTE configuration. */
typedef struct
{
uint32_t pseltxd; ///< TXD pin number.
@@ -102,13 +96,11 @@
void * p_context; ///< Context passed to interrupt handler.
nrf_uarte_hwfc_t hwfc; ///< Flow control configuration.
nrf_uarte_parity_t parity; ///< Parity configuration.
- nrf_uarte_baudrate_t baudrate; ///< Baudrate.
+ nrf_uarte_baudrate_t baudrate; ///< Baud rate.
uint8_t interrupt_priority; ///< Interrupt priority.
} nrfx_uarte_config_t;
-/**
- * @brief UARTE default configuration.
- */
+/** @brief UARTE default configuration. */
#define NRFX_UARTE_DEFAULT_CONFIG \
{ \
.pseltxd = NRF_UARTE_PSEL_DISCONNECTED, \
@@ -122,27 +114,21 @@
.interrupt_priority = NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY, \
}
-/**
- * @brief Structure for UARTE transfer completion event.
- */
+/** @brief Structure for the UARTE transfer completion event. */
typedef struct
{
uint8_t * p_data; ///< Pointer to memory used for transfer.
size_t bytes; ///< Number of bytes transfered.
} nrfx_uarte_xfer_evt_t;
-/**
- * @brief Structure for UARTE error event.
- */
+/** @brief Structure for UARTE error event. */
typedef struct
{
- nrfx_uarte_xfer_evt_t rxtx; ///< Transfer details includes number of bytes transferred.
+ nrfx_uarte_xfer_evt_t rxtx; ///< Transfer details, including number of bytes transferred.
uint32_t error_mask; ///< Mask of error flags that generated the event.
} nrfx_uarte_error_evt_t;
-/**
- * @brief Structure for UARTE event.
- */
+/** @brief Structure for UARTE event. */
typedef struct
{
nrfx_uarte_evt_type_t type; ///< Event type.
@@ -150,15 +136,15 @@
{
nrfx_uarte_xfer_evt_t rxtx; ///< Data provided for transfer completion events.
nrfx_uarte_error_evt_t error; ///< Data provided for error event.
- } data;
+ } data; ///< Union to store event data.
} nrfx_uarte_event_t;
/**
* @brief UARTE interrupt event handler.
*
- * @param[in] p_event Pointer to event structure. Event is allocated on the stack so it is available
- * only within the context of the event handler.
- * @param[in] p_context Context passed to interrupt handler, set on initialization.
+ * @param[in] p_event Pointer to event structure. Event is allocated on the stack so it is available
+ * only within the context of the event handler.
+ * @param[in] p_context Context passed to the interrupt handler, set on initialization.
*/
typedef void (*nrfx_uarte_event_handler_t)(nrfx_uarte_event_t const * p_event,
void * p_context);
@@ -169,45 +155,46 @@
* This function configures and enables UARTE. After this function GPIO pins are controlled by UARTE.
*
* @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] p_config Pointer to the structure with initial configuration.
+ * @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] event_handler Event handler provided by the user. If not provided driver works in
* blocking mode.
*
- * @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_INVALID_STATE If driver is already initialized.
- * @retval NRFX_ERROR_BUSY If some other peripheral with the same
- * instance ID is already in use. This is
- * possible only if @ref nrfx_prs module
- * is enabled.
+ * @retval NRFX_SUCCESS Initialization was successful.
+ * @retval NRFX_ERROR_INVALID_STATE Driver is already initialized.
+ * @retval NRFX_ERROR_BUSY Some other peripheral with the same
+ * instance ID is already in use. This is
+ * possible only if @ref nrfx_prs module
+ * is enabled.
*/
nrfx_err_t nrfx_uarte_init(nrfx_uarte_t const * p_instance,
nrfx_uarte_config_t const * p_config,
nrfx_uarte_event_handler_t event_handler);
/**
- * @brief Function for uninitializing the UARTE driver.
+ * @brief Function for uninitializing the UARTE driver.
+ *
* @param[in] p_instance Pointer to the driver instance structure.
*/
void nrfx_uarte_uninit(nrfx_uarte_t const * p_instance);
/**
- * @brief Function for getting the address of a specific UARTE task.
+ * @brief Function for getting the address of the specified UARTE task.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] task Task.
*
- * @return Task address.
+ * @return Task address.
*/
__STATIC_INLINE uint32_t nrfx_uarte_task_address_get(nrfx_uarte_t const * p_instance,
nrf_uarte_task_t task);
/**
- * @brief Function for getting the address of a specific UARTE event.
+ * @brief Function for getting the address of the specified UARTE event.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] event Event.
*
- * @return Event address.
+ * @return Event address.
*/
__STATIC_INLINE uint32_t nrfx_uarte_event_address_get(nrfx_uarte_t const * p_instance,
nrf_uarte_event_t event);
@@ -215,9 +202,9 @@
/**
* @brief Function for sending data over UARTE.
*
- * If an event handler was provided in nrfx_uarte_init() call, this function
+ * If an event handler is provided in nrfx_uarte_init() call, this function
* returns immediately and the handler is called when the transfer is done.
- * Otherwise, the transfer is performed in blocking mode, i.e. this function
+ * Otherwise, the transfer is performed in blocking mode, that is this function
* returns when the transfer is finished. Blocking mode is not using interrupt
* so there is no context switching inside the function.
*
@@ -232,11 +219,11 @@
* description in the Product Specification). The driver
* checks it with assertion.
*
- * @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_BUSY If driver is already transferring.
- * @retval NRFX_ERROR_FORBIDDEN If the transfer was aborted from a different context
- * (blocking mode only).
- * @retval NRFX_ERROR_INVALID_ADDR If p_data does not point to RAM buffer.
+ * @retval NRFX_SUCCESS Initialization was successful.
+ * @retval NRFX_ERROR_BUSY Driver is already transferring.
+ * @retval NRFX_ERROR_FORBIDDEN The transfer was aborted from a different context
+ * (blocking mode only).
+ * @retval NRFX_ERROR_INVALID_ADDR p_data does not point to RAM buffer.
*/
nrfx_err_t nrfx_uarte_tx(nrfx_uarte_t const * p_instance,
uint8_t const * p_data,
@@ -247,16 +234,16 @@
*
* @param[in] p_instance Pointer to the driver instance structure.
*
- * @retval true If UARTE is transmitting.
- * @retval false If UARTE is not transmitting.
+ * @retval true The UARTE is transmitting.
+ * @retval false The UARTE is not transmitting.
*/
bool nrfx_uarte_tx_in_progress(nrfx_uarte_t const * p_instance);
/**
* @brief Function for aborting any ongoing transmission.
* @note @ref NRFX_UARTE_EVT_TX_DONE event will be generated in non-blocking mode.
- * It will contain number of bytes sent until abort was called. The event
- * handler will be called from UARTE interrupt context.
+ * It will contain number of bytes sent until the abort was called. The event
+ * handler will be called from the UARTE interrupt context.
*
* @param[in] p_instance Pointer to the driver instance structure.
*/
@@ -265,19 +252,19 @@
/**
* @brief Function for receiving data over UARTE.
*
- * If an event handler was provided in the nrfx_uarte_init() call, this function
+ * If an event handler is provided in the nrfx_uarte_init() call, this function
* returns immediately and the handler is called when the transfer is done.
- * Otherwise, the transfer is performed in blocking mode, i.e. this function
+ * Otherwise, the transfer is performed in blocking mode, that is this function
* returns when the transfer is finished. Blocking mode is not using interrupt so
* there is no context switching inside the function.
- * The receive buffer pointer is double buffered in non-blocking mode. The secondary
+ * The receive buffer pointer is double-buffered in non-blocking mode. The secondary
* buffer can be set immediately after starting the transfer and will be filled
- * when the primary buffer is full. The double buffering feature allows
+ * when the primary buffer is full. The double-buffering feature allows
* receiving data continuously.
*
* @note Peripherals using EasyDMA (including UARTE) require the transfer buffers
* to be placed in the Data RAM region. If this condition is not met,
- * this function will fail with the error code NRFX_ERROR_INVALID_ADDR.
+ * this function fails with the error code NRFX_ERROR_INVALID_ADDR.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_data Pointer to data.
@@ -286,14 +273,14 @@
* description in the Product Specification). The driver
* checks it with assertion.
*
- * @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_BUSY If the driver is already receiving
- * (and the secondary buffer has already been set
- * in non-blocking mode).
- * @retval NRFX_ERROR_FORBIDDEN If the transfer was aborted from a different context
- * (blocking mode only).
- * @retval NRFX_ERROR_INTERNAL If UARTE peripheral reported an error.
- * @retval NRFX_ERROR_INVALID_ADDR If p_data does not point to RAM buffer.
+ * @retval NRFX_SUCCESS Initialization is successful.
+ * @retval NRFX_ERROR_BUSY The driver is already receiving
+ * (and the secondary buffer has already been set
+ * in non-blocking mode).
+ * @retval NRFX_ERROR_FORBIDDEN The transfer is aborted from a different context
+ * (blocking mode only).
+ * @retval NRFX_ERROR_INTERNAL The UARTE peripheral reports an error.
+ * @retval NRFX_ERROR_INVALID_ADDR p_data does not point to RAM buffer.
*/
nrfx_err_t nrfx_uarte_rx(nrfx_uarte_t const * p_instance,
uint8_t * p_data,
@@ -306,16 +293,16 @@
*
* @param[in] p_instance Pointer to the driver instance structure.
*
- * @retval true If the receiver has at least one byte of data to get.
- * @retval false If the receiver is empty.
+ * @retval true The receiver has at least one byte of data to get.
+ * @retval false The receiver is empty.
*/
bool nrfx_uarte_rx_ready(nrfx_uarte_t const * p_instance);
/**
* @brief Function for aborting any ongoing reception.
* @note @ref NRFX_UARTE_EVT_RX_DONE event will be generated in non-blocking mode.
- * It will contain number of bytes received until abort was called. The event
- * handler will be called from UARTE interrupt context.
+ * It will contain number of bytes received until the abort was called. The event
+ * handler will be called from the UARTE interrupt context.
*
* @param[in] p_instance Pointer to the driver instance structure.
*/
@@ -323,12 +310,12 @@
/**
* @brief Function for reading error source mask. Mask contains values from @ref nrf_uarte_error_mask_t.
- * @note Function should be used in blocking mode only. In case of non-blocking mode, an error event is
+ * @note Function must be used in the blocking mode only. In case of non-blocking mode, an error event is
* generated. Function clears error sources after reading.
*
* @param[in] p_instance Pointer to the driver instance structure.
*
- * @retval Mask of reported errors.
+ * @return Mask of reported errors.
*/
uint32_t nrfx_uarte_errorsrc_get(nrfx_uarte_t const * p_instance);
@@ -347,13 +334,14 @@
}
#endif // SUPPRESS_INLINE_IMPLEMENTATION
+/** @} */
+
void nrfx_uarte_0_irq_handler(void);
void nrfx_uarte_1_irq_handler(void);
void nrfx_uarte_2_irq_handler(void);
void nrfx_uarte_3_irq_handler(void);
-/** @} */
#ifdef __cplusplus
}
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_usbd.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_usbd.h
index 0b2aa3f..ec34c55 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_usbd.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_usbd.h
@@ -169,7 +169,7 @@
NRFX_USBD_EP_ABORTED, /**< EP0 transfer can be aborted when new setup comes.
* Any other transfer can be aborted by USB reset or driver stopping.
*/
- NRFX_USBD_EP_BUSY, /**< A transfer is in progress. */
+ NRFX_USBD_EP_BUSY, /**< Transfer is in progress. */
} nrfx_usbd_ep_status_t;
/**
@@ -179,12 +179,12 @@
*/
typedef struct
{
- nrfx_usbd_event_type_t type;
+ nrfx_usbd_event_type_t type; /**< Event type. */
union
{
struct {
- uint16_t framecnt; /**< Current value of frame counter. */
- } sof; /**< Data available for @ref NRFX_USBD_EVT_SOF. */
+ uint16_t framecnt; /**< Current value of frame counter. */
+ } sof; /**< Data available for @ref NRFX_USBD_EVT_SOF. */
struct {
nrfx_usbd_ep_t ep; /**< Endpoint number. */
} isocrc;
@@ -192,7 +192,7 @@
nrfx_usbd_ep_t ep; /**< Endpoint number. */
nrfx_usbd_ep_status_t status; /**< Status for the endpoint. */
} eptransfer;
- } data;
+ } data; /**< Union to store event data. */
} nrfx_usbd_evt_t;
/**
@@ -850,12 +850,12 @@
*/
void nrfx_usbd_transfer_out_drop(nrfx_usbd_ep_t ep);
+/** @} */
+
void nrfx_usbd_irq_handler(void);
-/** @} */
-
#ifdef __cplusplus
}
#endif
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_wdt.h b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_wdt.h
index 023ae8b..c3d1c61 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_wdt.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/include/nrfx_wdt.h
@@ -47,9 +47,7 @@
*/
#if !NRFX_CHECK(NRFX_WDT_CONFIG_NO_IRQ) || defined(__NRFX_DOXYGEN__)
-/**
- * @brief WDT instance interrupt priority configuration.
- */
+/** @brief WDT instance interrupt priority configuration. */
#define NRFX_WDT_IRQ_CONFIG .interrupt_priority = NRFX_WDT_CONFIG_IRQ_PRIORITY
#else
#define NRFX_WDT_IRQ_CONFIG
@@ -65,12 +63,13 @@
#endif
} nrfx_wdt_config_t;
-/**@brief WDT event handler function type. */
+/** @brief WDT event handler function type. */
typedef void (*nrfx_wdt_event_handler_t)(void);
-/**@brief WDT channel id type. */
+/** @brief WDT channel ID type. */
typedef nrf_wdt_rr_register_t nrfx_wdt_channel_id;
+/** @brief WDT driver default configuration. */
#define NRFX_WDT_DEAFULT_CONFIG \
{ \
.behaviour = (nrf_wdt_behaviour_t)NRFX_WDT_CONFIG_BEHAVIOUR, \
@@ -78,80 +77,80 @@
NRFX_WDT_IRQ_CONFIG \
}
/**
- * @brief This function initializes watchdog.
+ * @brief This function initializes the watchdog.
*
- * @param[in] p_config Pointer to the structure with initial configuration.
+ * @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] wdt_event_handler Event handler provided by the user. Ignored when
* @ref NRFX_WDT_CONFIG_NO_IRQ option is enabled.
*
- * @return NRFX_SUCCESS on success, otherwise an error code.
+ * @return NRFX_SUCCESS on success, otherwise an error code.
*/
nrfx_err_t nrfx_wdt_init(nrfx_wdt_config_t const * p_config,
nrfx_wdt_event_handler_t wdt_event_handler);
/**
- * @brief This function allocate watchdog channel.
+ * @brief Function for allocating a watchdog channel.
*
* @note This function can not be called after nrfx_wdt_start(void).
*
- * @param[out] p_channel_id ID of granted channel.
+ * @param[out] p_channel_id ID of granted channel.
*
- * @return NRFX_SUCCESS on success, otherwise an error code.
+ * @return NRFX_SUCCESS on success, otherwise an error code.
*/
nrfx_err_t nrfx_wdt_channel_alloc(nrfx_wdt_channel_id * p_channel_id);
/**
- * @brief This function starts watchdog.
+ * @brief Function for starting the watchdog.
*
* @note After calling this function the watchdog is started, so the user needs to feed all allocated
- * watchdog channels to avoid reset. At least one watchdog channel has to be allocated.
+ * watchdog channels to avoid reset. At least one watchdog channel must be allocated.
*/
void nrfx_wdt_enable(void);
/**
- * @brief This function feeds the watchdog.
+ * @brief Function for feeding the watchdog.
*
* @details Function feeds all allocated watchdog channels.
*/
void nrfx_wdt_feed(void);
/**
- * @brief This function feeds the invidual watchdog channel.
+ * @brief Function for feeding an invidual watchdog channel.
*
- * @param[in] channel_id ID of watchdog channel.
+ * @param[in] channel_id ID of watchdog channel.
*/
void nrfx_wdt_channel_feed(nrfx_wdt_channel_id channel_id);
-/**@brief Function for returning a requested task address for the wdt driver module.
+/**
+ * @brief Function for returning a requested task address for the WDT driver module.
*
- * @param[in] task One of the peripheral tasks.
+ * @param[in] task One of the peripheral tasks.
*
- * @retval Task address.
+ * @return Task address.
*/
__STATIC_INLINE uint32_t nrfx_wdt_ppi_task_addr(nrf_wdt_task_t task)
{
return nrf_wdt_task_address_get(task);
}
-/**@brief Function for returning a requested event address for the wdt driver module.
+/**
+ * @brief Function for returning a requested event address for the wdt driver module.
*
- * @param[in] event One of the peripheral events.
+ * @param[in] event One of the peripheral events.
*
- * @retval Event address
+ * @return Event address.
*/
__STATIC_INLINE uint32_t nrfx_wdt_ppi_event_addr(nrf_wdt_event_t event)
{
return nrf_wdt_event_address_get(event);
}
-
-#if !NRFX_CHECK(NRFX_WDT_CONFIG_NO_IRQ)
-void nrfx_wdt_irq_handler(void);
-#endif
-
-
/** @} */
+
+void nrfx_wdt_irq_handler(void);
+
+
#ifdef __cplusplus
}
#endif
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/nrfx_common.h b/third_party/NordicSemiconductor/nrfx/drivers/nrfx_common.h
index e988a7d..087da5c 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/nrfx_common.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/nrfx_common.h
@@ -55,7 +55,7 @@
* a non-zero value.
*
* Normally, preprocessors treat all undefined identifiers as having the value
- * zero. However, some tools, like static code analyzers, may issue a warning
+ * zero. However, some tools, like static code analyzers, can issue a warning
* when such identifier is evaluated. This macro gives the possibility to suppress
* such warnings only in places where this macro is used for evaluation, not in
* the whole analyzed code.
@@ -68,8 +68,8 @@
* @note This macro is expanded in two steps so that tokens given as macros
* themselves are fully expanded before they are merged.
*
- * @param p1 First token.
- * @param p2 Second token.
+ * @param[in] p1 First token.
+ * @param[in] p2 Second token.
*
* @return The two tokens merged into one, unless they cannot together form
* a valid token (in such case, the preprocessor issues a warning and
@@ -78,10 +78,8 @@
* @sa NRFX_CONCAT_3
*/
#define NRFX_CONCAT_2(p1, p2) NRFX_CONCAT_2_(p1, p2)
-/**
- * @brief Internal macro used by @ref NRFX_CONCAT_2 to perform the expansion
- * in two steps.
- */
+
+/** @brief Internal macro used by @ref NRFX_CONCAT_2 to perform the expansion in two steps. */
#define NRFX_CONCAT_2_(p1, p2) p1 ## p2
/**
@@ -90,9 +88,9 @@
* @note This macro is expanded in two steps so that tokens given as macros
* themselves are fully expanded before they are merged.
*
- * @param p1 First token.
- * @param p2 Second token.
- * @param p3 Third token.
+ * @param[in] p1 First token.
+ * @param[in] p2 Second token.
+ * @param[in] p3 Third token.
*
* @return The three tokens merged into one, unless they cannot together form
* a valid token (in such case, the preprocessor issues a warning and
@@ -101,29 +99,29 @@
* @sa NRFX_CONCAT_2
*/
#define NRFX_CONCAT_3(p1, p2, p3) NRFX_CONCAT_3_(p1, p2, p3)
-/**
- * @brief Internal macro used by @ref NRFX_CONCAT_3 to perform the expansion
- * in two steps.
- */
+
+/** @brief Internal macro used by @ref NRFX_CONCAT_3 to perform the expansion in two steps. */
#define NRFX_CONCAT_3_(p1, p2, p3) p1 ## p2 ## p3
-/**@brief Macro for performing rounded integer division (as opposed to
+/**
+ * @brief Macro for performing rounded integer division (as opposed to
* truncating the result).
*
- * @param a Numerator.
- * @param b Denominator.
+ * @param[in] a Numerator.
+ * @param[in] b Denominator.
*
* @return Rounded (integer) result of dividing @c a by @c b.
*/
#define NRFX_ROUNDED_DIV(a, b) (((a) + ((b) / 2)) / (b))
-/**@brief Macro for performing integer division, making sure the result is rounded up.
+/**
+ * @brief Macro for performing integer division, making sure the result is rounded up.
*
- * @details A typical use case for this macro is to compute the number of objects
+ * @details A typical use case for this macro is to compute the number of objects
* with size @c b required to hold @c a number of bytes.
*
- * @param a Numerator.
- * @param b Denominator.
+ * @param[in] a Numerator.
+ * @param[in] b Denominator.
*
* @return Integer result of dividing @c a by @c b, rounded up.
*/
@@ -132,26 +130,39 @@
/**
* @brief Macro for getting the number of elements in an array.
*
- * @param array Name of the array.
+ * @param[in] array Name of the array.
*
* @return Array element count.
*/
#define NRFX_ARRAY_SIZE(array) (sizeof(array) / sizeof((array)[0]))
+/**
+ * @brief Macro for getting the offset (in bytes) from the beginning of a structure
+ * of the specified type to its specified member.
+ *
+ * @param[in] type Structure type.
+ * @param[in] member Structure member whose offset is searched for.
+ *
+ * @return Member offset in bytes.
+ */
+#define NRFX_OFFSETOF(type, member) ((size_t)&(((type *)0)->member))
+
/**@brief Macro for checking if given lengths of EasyDMA transfers do not exceed
* the limit of the specified peripheral.
*
- * @param peripheral Peripheral to check the lengths against.
- * @param length1 First length to be checked.
- * @param length2 Second length to be checked (pass 0 if not needed).
+ * @param[in] peripheral Peripheral to check the lengths against.
+ * @param[in] length1 First length to be checked.
+ * @param[in] length2 Second length to be checked (pass 0 if not needed).
*
- * @return
+ * @retval true The length of buffers does not exceed the limit of the specified peripheral.
+ * @retval false The length of buffers exceeds the limit of the specified peripheral.
*/
#define NRFX_EASYDMA_LENGTH_VALIDATE(peripheral, length1, length2) \
(((length1) < (1U << NRFX_CONCAT_2(peripheral, _EASYDMA_MAXCNT_SIZE))) && \
((length2) < (1U << NRFX_CONCAT_2(peripheral, _EASYDMA_MAXCNT_SIZE))))
-/**@brief Macro for waiting until condition is met.
+/**
+ * @brief Macro for waiting until condition is met.
*
* @param[in] condition Condition to meet.
* @param[in] attempts Maximum number of condition checks. Must not be 0.
@@ -180,7 +191,7 @@
* ID numbers and their base addresses. See the chapter "Peripheral interface"
* (section "Peripheral ID") in the Product Specification.
*
- * @param[in] base_addr Peripheral base address or pointer.
+ * @param[in] base_addr Peripheral base address or pointer.
*
* @return ID number associated with the specified peripheral.
*/
@@ -194,20 +205,16 @@
* equal to its ID number. See the chapter "Peripheral interface" (sections
* "Peripheral ID" and "Interrupts") in the Product Specification.
*
- * @param[in] base_addr Peripheral base address or pointer.
+ * @param[in] base_addr Peripheral base address or pointer.
*
* @return Interrupt number associated with the specified peripheral.
*/
#define NRFX_IRQ_NUMBER_GET(base_addr) NRFX_PERIPHERAL_ID_GET(base_addr)
-/**
- * @brief IRQ handler type.
- */
+/** @brief IRQ handler type. */
typedef void (* nrfx_irq_handler_t)(void);
-/**
- * @brief Driver state.
- */
+/** @brief Driver state. */
typedef enum
{
NRFX_DRV_STATE_UNINITIALIZED, ///< Uninitialized.
@@ -223,14 +230,13 @@
* to be placed in the Data RAM region. This function can be used to check if
* this condition is met.
*
- * @param[in] p_object Pointer to an object whose location is to be checked.
+ * @param[in] p_object Pointer to an object whose location is to be checked.
*
- * @retval true If the pointed object is located in the Data RAM region.
- * @retval false Otherwise.
+ * @retval true The pointed object is located in the Data RAM region.
+ * @retval false The pointed object is not located in the Data RAM region.
*/
__STATIC_INLINE bool nrfx_is_in_ram(void const * p_object);
-
/**
* @brief Function for checking if an object is aligned to a 32-bit word
*
@@ -240,16 +246,15 @@
*
* @param[in] p_object Pointer to an object whose location is to be checked.
*
- * @retval true if the pointed object is aligned to a 32-bit word.
- * @retval false otherwise.
+ * @retval true The pointed object is aligned to a 32-bit word.
+ * @retval false The pointed object is not aligned to a 32-bit word.
*/
__STATIC_INLINE bool nrfx_is_word_aligned(void const * p_object);
-
/**
- * @brief Function for getting the interrupt number for a specific peripheral.
+ * @brief Function for getting the interrupt number for the specified peripheral.
*
- * @param[in] p_reg Peripheral base pointer.
+ * @param[in] p_reg Peripheral base pointer.
*
* @return Interrupt number associated with the pointed peripheral.
*/
@@ -262,8 +267,8 @@
* The event identifier is the offset between the event register address and
* the peripheral base address, and is equal (thus, can be directly cast) to
* the corresponding value of the enumerated type from HAL (nrf_*_event_t).
-
- * @param bit INTEN register bit position.
+ *
+ * @param[in] bit INTEN register bit position.
*
* @return Event identifier.
*
@@ -279,7 +284,7 @@
* the peripheral base address, and is equal (thus, can be directly cast) to
* the corresponding value of the enumerated type from HAL (nrf_*_event_t).
*
- * @param event Event identifier.
+ * @param[in] event Event identifier.
*
* @return INTEN register bit position.
*
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/nrfx_errors.h b/third_party/NordicSemiconductor/nrfx/drivers/nrfx_errors.h
index f503227..35645fa 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/nrfx_errors.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/nrfx_errors.h
@@ -39,10 +39,13 @@
* @{
* @ingroup nrfx
*
- * @brief Global error codes definitions.
+ * @brief Global error code definitions.
*/
+/** @brief Base number of error codes. */
#define NRFX_ERROR_BASE_NUM 0x0BAD0000
+
+/** @brief Base number of driver error codes. */
#define NRFX_ERROR_DRIVERS_BASE_NUM (NRFX_ERROR_BASE_NUM + 0x10000)
/** @brief Enumerated type for error codes. */
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_clock.c b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_clock.c
index 46e3885..1769c38 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_clock.c
+++ b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_clock.c
@@ -58,15 +58,31 @@
#endif
#endif
-#if defined(NRF52810_XXAA) || \
- defined(NRF52832_XXAA) || defined(NRF52832_XXAB) || \
- defined(NRF52840_XXAA)
-// Enable workaround for nRF52 anomaly 192 (LFRC oscillator frequency is wrong
-// after calibration, exceeding 500 ppm).
-#define USE_WORKAROUND_FOR_ANOMALY_192
+#if !defined(USE_WORKAROUND_FOR_ANOMALY_132) && \
+ (defined(NRF52832_XXAA) || defined(NRF52832_XXAB))
+ // ANOMALY 132 - LFCLK needs to avoid frame from 66us to 138us after LFCLK stop. This solution
+ // applies delay of 138us before starting LFCLK.
+ #define USE_WORKAROUND_FOR_ANOMALY_132 1
-// Enable workaround for nRF52 anomaly 201 (EVENTS_HFCLKSTARTED might be generated twice).
-#define USE_WORKAROUND_FOR_ANOMALY_201
+ // Convert time to cycles (nRF52832 is clocked with 64 MHz, use delay of 138 us).
+ #define ANOMALY_132_DELAY_CYCLES (64UL * 138)
+#endif
+
+#if !defined(USE_WORKAROUND_FOR_ANOMALY_192) && \
+ (defined(NRF52810_XXAA) || \
+ defined(NRF52832_XXAA) || defined(NRF52832_XXAB) || \
+ defined(NRF52840_XXAA))
+ // Enable workaround for nRF52 anomaly 192 (LFRC oscillator frequency is wrong
+ // after calibration, exceeding 500 ppm).
+ #define USE_WORKAROUND_FOR_ANOMALY_192 1
+#endif
+
+#if !defined(USE_WORKAROUND_FOR_ANOMALY_201) && \
+ (defined(NRF52810_XXAA) || \
+ defined(NRF52832_XXAA) || defined(NRF52832_XXAB) || \
+ defined(NRF52840_XXAA))
+ // Enable workaround for nRF52 anomaly 201 (EVENTS_HFCLKSTARTED might be generated twice).
+ #define USE_WORKAROUND_FOR_ANOMALY_201 1
#endif
#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED)
@@ -82,7 +98,7 @@
{
nrfx_clock_event_handler_t event_handler;
bool module_initialized; /*< Indicate the state of module */
-#if defined(USE_WORKAROUND_FOR_ANOMALY_201)
+#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_201)
bool hfclk_started; /*< Anomaly 201 workaround. */
#endif
@@ -101,18 +117,7 @@
bool nrfx_clock_irq_enabled;
#endif
-#if defined(NRF52832_XXAA) || defined(NRF52832_XXAB)
-
-// ANOMALY 132 - LFCLK needs to avoid frame from 66us to 138us after LFCLK stop. This solution
-// applies delay of 138us before starting LFCLK.
-#define ANOMALY_132_REQ_DELAY_US 138UL
-
-// nRF52832 is clocked with 64MHz.
-#define ANOMALY_132_NRF52832_FREQ_MHZ 64UL
-
-// Convert time to cycles.
-#define ANOMALY_132_DELAY_CYCLES (ANOMALY_132_REQ_DELAY_US * ANOMALY_132_NRF52832_FREQ_MHZ)
-
+#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_132)
/**
* @brief Function for applying delay of 138us before starting LFCLK.
*/
@@ -143,8 +148,7 @@
DWT->CTRL = dwt_ctrl;
CoreDebug->DEMCR = core_debug;
}
-
-#endif // defined(NRF52832_XXAA) || defined(NRF52832_XXAB)
+#endif // NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_132)
nrfx_err_t nrfx_clock_init(nrfx_clock_event_handler_t event_handler)
{
@@ -162,7 +166,7 @@
#endif
m_clock_cb.event_handler = event_handler;
m_clock_cb.module_initialized = true;
-#if defined(USE_WORKAROUND_FOR_ANOMALY_201)
+#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_201)
m_clock_cb.hfclk_started = false;
#endif
}
@@ -222,7 +226,7 @@
nrf_clock_event_clear(NRF_CLOCK_EVENT_LFCLKSTARTED);
nrf_clock_int_enable(NRF_CLOCK_INT_LF_STARTED_MASK);
-#if defined(NRF52832_XXAA) || defined(NRF52832_XXAB)
+#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_132)
nrfx_clock_anomaly_132();
#endif
@@ -251,7 +255,7 @@
nrf_clock_task_trigger(NRF_CLOCK_TASK_HFCLKSTOP);
while (nrf_clock_hf_is_running(NRF_CLOCK_HFCLK_HIGH_ACCURACY))
{}
-#if defined(USE_WORKAROUND_FOR_ANOMALY_201)
+#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_201)
m_clock_cb.hfclk_started = false;
#endif
}
@@ -276,7 +280,7 @@
nrf_clock_event_clear(NRF_CLOCK_EVENT_DONE);
nrf_clock_int_enable(NRF_CLOCK_INT_DONE_MASK);
m_clock_cb.cal_state = CAL_STATE_CAL;
-#if defined(USE_WORKAROUND_FOR_ANOMALY_192)
+#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_192)
*(volatile uint32_t *)0x40000C34 = 0x00000002;
#endif
nrf_clock_task_trigger(NRF_CLOCK_TASK_CAL);
@@ -330,7 +334,7 @@
NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_CLOCK_EVENT_HFCLKSTARTED));
nrf_clock_int_disable(NRF_CLOCK_INT_HF_STARTED_MASK);
-#if defined(USE_WORKAROUND_FOR_ANOMALY_201)
+#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_201)
if (!m_clock_cb.hfclk_started)
{
m_clock_cb.hfclk_started = true;
@@ -361,7 +365,7 @@
if (nrf_clock_event_check(NRF_CLOCK_EVENT_DONE))
{
-#if defined(USE_WORKAROUND_FOR_ANOMALY_192)
+#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_192)
*(volatile uint32_t *)0x40000C34 = 0x00000000;
#endif
nrf_clock_event_clear(NRF_CLOCK_EVENT_DONE);
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_nfct.c b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_nfct.c
index 5b83bec..354a8cb 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_nfct.c
+++ b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_nfct.c
@@ -38,43 +38,44 @@
#define NRFX_LOG_MODULE NFCT
#include <nrfx_log.h>
-#if defined(NRF52832_XXAA) || defined(NRF52832_XXAB) || defined(NRF52840_XXAA)
+#if defined(NRF52832_XXAA) || defined(NRF52832_XXAB) || \
+ defined(NRF52833_XXAA) || defined(NRF52840_XXAA)
#define USE_TIMER_WORKAROUND
#endif
-#ifdef USE_TIMER_WORKAROUND
+#if defined(USE_TIMER_WORKAROUND)
#include <nrfx_timer.h>
typedef struct
{
const nrfx_timer_t timer; /**< Timer instance that supports the correct NFC field detection. */
-#ifdef NRF52840_XXAA
+#if defined(NRF52833_XXAA) || defined(NRF52840_XXAA)
bool fieldevents_filter_active; /**< Flag that indicates that the field events are ignored. */
bool is_hfclk_on; /**< HFCLK has started - one of the NFC activation conditions. */
bool is_delayed; /**< Required time delay has passed - one of the NFC activation conditions. */
#else
uint32_t field_state_cnt; /**< Counter of the FIELDLOST events. */
-#endif // NRF52840_XXAA
+#endif // defined(NRF52833_XXAA) || defined(NRF52840_XXAA)
} nrfx_nfct_timer_workaround_t;
-#ifdef NRF52840_XXAA
+#if defined(NRF52833_XXAA) || defined(NRF52840_XXAA)
#define NRFX_NFCT_ACTIVATE_DELAY 1000 /**< Minimal delay in us between NFC field detection and activation of NFCT. */
#define NRFX_NFCT_TIMER_PERIOD NRFX_NFCT_ACTIVATE_DELAY
#else
#define NRFX_NFCT_FIELDLOST_THR 7
#define NRFX_NFCT_FIELD_TIMER_PERIOD 100 /**< Field polling period in us. */
#define NRFX_NFCT_TIMER_PERIOD NRFX_NFCT_FIELD_TIMER_PERIOD
-#endif // NRF52840_XXAA
+#endif // defined(NRF52833_XXAA) || defined(NRF52840_XXAA)
#define NRFX_NFCT_TIMER_INSTANCE 4 /**< Timer instance used for various workarounds for the NFCT HW issues.*/
static nrfx_nfct_timer_workaround_t m_timer_workaround =
{
.timer = NRFX_TIMER_INSTANCE(NRFX_NFCT_TIMER_INSTANCE),
};
-#endif // USE_TIMER_WORKAROUND
+#endif // defined(USE_TIMER_WORKAROUND)
-#define NRFX_NFCT_FRAMEDELAYMAX_52840S (0xFFFFUL) /**< Bit mask of the FRAMEDELAYMAX field for the first sample of 52840.*/
-#define NRFX_NFCT_FWT_MAX_DIFF 1u /**< The maximal difference between the requested FWT and HW-limited FWT settings.*/
+#define NRFX_NFCT_FWT_MAX_DIFF 1u /**< The maximal difference between the requested FWT and HW-limited FWT settings.*/
+#define NFCT_FRAMEDELAYMAX_DEFAULT (0x00001000UL) /**< Default value of the FRAMEDELAYMAX. */
/* Mask of all possible interrupts that are relevant for data reception. */
#define NRFX_NFCT_RX_INT_MASK (NRF_NFCT_INT_RXFRAMESTART_MASK | \
@@ -123,62 +124,13 @@
NRFX_NFC_FIELD_STATE_UNKNOWN /**< Both NFCT field events have been set - ambiguous state. */
} nrfx_nfct_field_state_t;
-#ifdef NRF52840_XXAA
-/**
- * @brief Internal auxiliary function for checking whether the program is running on the NRF52840 chip.
- *
- * @retval true It is NRF52480 chip.
- * @retval false It is an other chip.
- */
-static inline bool nrfx_nfct_type_52840_check(void)
-{
- return ((((*(uint32_t *)0xF0000FE0) & 0xFF) == 0x08) &&
- (((*(uint32_t *)0xF0000FE4) & 0x0F) == 0x0));
-}
-
-/**
- * @brief Internal auxiliary function for checking whether the program is running on the first sample of
- * the nRF52840 chip.
- *
- * @retval true It is the nRF52480 chip and it is the first sample version.
- * @retval false It is an other chip.
- */
-static inline bool nrfx_nfct_type_52840_sample_check(void)
-{
- return ( nrfx_nfct_type_52840_check() &&
- ( ((*(uint32_t *)0xF0000FE8) & 0xF0) == 0x00 ) &&
- ( ((*(uint32_t *)0xF0000FEC) & 0xF0) == 0x00 ) );
-}
-
-/**
- * @brief Internal auxiliary function for checking whether the program is running on the final version of
- * the nRF52840 chip.
- *
- * @retval true It is the nRF52480 chip and it is the final version.
- * @retval false It is an other chip.
- */
-static inline bool nrfx_nfct_type_52840_final_check(void)
-{
- return ( nrfx_nfct_type_52840_check() &&
- ( ( ((*(uint32_t *)0xF0000FE8) & 0xF0) != 0x00 ) ||
- ( ((*(uint32_t *)0xF0000FEC) & 0xF0) != 0x00 ) ));
-}
-
-typedef struct
-{
- bool eng_a; /**< Engineering sample A of the NRF52840 chip. */
- bool eng_bc; /**< Engineering sample B, C of the NRF52840 chip, or its final version. */
-} nrfx_nfct_nrf52840_ver_t;
-
-static nrfx_nfct_nrf52840_ver_t m_nrf52840;
-#endif // NRF52840_XXAA
-
/**@brief NFCT control block. */
typedef struct
{
nrfx_nfct_config_t config;
nrfx_drv_state_t state;
volatile bool field_on;
+ uint32_t frame_delay_max;
} nrfx_nfct_control_block_t;
static nrfx_nfct_control_block_t m_nfct_cb;
@@ -188,20 +140,6 @@
*/
static void nrfx_nfct_hw_init_setup(void)
{
-#ifdef NRF52840_XXAA
- if (m_nrf52840.eng_a)
- {
- /* Begin: Bugfix for FTPAN-98 */
- *(volatile uint32_t *) 0x4000568C = 0x00038148;
- /* End: Bugfix for FTPAN-98 */
- /* Begin: Bugfix for FTPAN-144 */
- *(volatile uint32_t *) 0x4000561c = 0x01;
- *(volatile uint32_t *) 0x4000562c = 0x3F;
- *(volatile uint32_t *) 0x4000563c = 0x0;
- /* End: Bugfix for FTPAN-144 */
- }
-#endif // NRF52840_XXAA
-
// Use Window Grid frame delay mode.
nrf_nfct_frame_delay_mode_set(NRF_NFCT_FRAME_DELAY_MODE_WINDOWGRID);
@@ -212,6 +150,18 @@
/* End: Bugfix for FTPAN-25 (IC-9929) */
}
+static void nrfx_nfct_frame_delay_max_set(bool default_delay)
+{
+ if (default_delay)
+ {
+ nrf_nfct_frame_delay_max_set(NFCT_FRAMEDELAYMAX_DEFAULT);
+ }
+ else
+ {
+ nrf_nfct_frame_delay_max_set(m_nfct_cb.frame_delay_max);
+ }
+}
+
/**@brief Function for evaluating and handling the NFC field events.
*
* @param[in] field_state Current field state.
@@ -220,12 +170,12 @@
{
nrfx_nfct_evt_t nfct_evt;
-#ifdef NRF52840_XXAA
- if((!m_nrf52840.eng_a) && (m_timer_workaround.fieldevents_filter_active))
+#if defined(NRF52833_XXAA) || defined(NRF52840_XXAA)
+ if(m_timer_workaround.fieldevents_filter_active)
{
return;
}
-#endif // NRF52840_XXAA
+#endif // defined(NRF52833_XXAA) || defined(NRF52840_XXAA)
if (field_state == NRFX_NFC_FIELD_STATE_UNKNOWN)
{
@@ -239,23 +189,20 @@
case NRFX_NFC_FIELD_STATE_ON:
if (!m_nfct_cb.field_on)
{
-#ifdef NRF52840_XXAA
+#if defined(NRF52833_XXAA) || defined(NRF52840_XXAA)
/* Begin: Bugfix for FTPAN-190 */
- if (!m_nrf52840.eng_a)
- {
- m_timer_workaround.is_hfclk_on = false;
- m_timer_workaround.is_delayed = false;
- m_timer_workaround.fieldevents_filter_active = true;
+ m_timer_workaround.is_hfclk_on = false;
+ m_timer_workaround.is_delayed = false;
+ m_timer_workaround.fieldevents_filter_active = true;
- nrfx_timer_clear(&m_timer_workaround.timer);
- nrfx_timer_enable(&m_timer_workaround.timer);
- }
+ nrfx_timer_clear(&m_timer_workaround.timer);
+ nrfx_timer_enable(&m_timer_workaround.timer);
/* END: Bugfix for FTPAN-190 */
#elif defined(NRF52832_XXAA) || defined(NRF52832_XXAB)
nrfx_timer_clear(&m_timer_workaround.timer);
nrfx_timer_enable(&m_timer_workaround.timer);
m_timer_workaround.field_state_cnt = 0;
-#endif // NRF52840_XXAA
+#endif // defined(NRF52833_XXAA) || defined(NRF52840_XXAA)
m_nfct_cb.field_on = true;
nfct_evt.evt_id = NRFX_NFCT_EVT_FIELD_DETECTED;
@@ -265,18 +212,14 @@
case NRFX_NFC_FIELD_STATE_OFF:
nrfx_nfct_state_force(NRFX_NFCT_STATE_SENSING);
-#ifdef NRF52840_XXAA
- /* Begin: Bugfix for FTPAN-116 (IC-12886) */
- if (m_nrf52840.eng_a)
- {
- *(volatile uint32_t *)0x40005010 = 1;
- }
- /* END: Bugfix for FTPAN-116 (IC-12886) */
-#endif // NRF52840_XXAA
nrf_nfct_int_disable(NRFX_NFCT_RX_INT_MASK | NRFX_NFCT_TX_INT_MASK);
m_nfct_cb.field_on = false;
nfct_evt.evt_id = NRFX_NFCT_EVT_FIELD_LOST;
+ /* Begin: Bugfix for FTPAN-218 */
+ nrfx_nfct_frame_delay_max_set(true);
+ /* End: Bugfix for FTPAN-218 */
+
NRFX_NFCT_CB_HANDLE(m_nfct_cb.config.cb, nfct_evt);
break;
@@ -286,9 +229,9 @@
}
}
-#ifdef USE_TIMER_WORKAROUND
+#if defined(USE_TIMER_WORKAROUND)
-#ifdef NRF52840_XXAA
+#if defined(NRF52833_XXAA) || defined(NRF52840_XXAA)
static void nrfx_nfct_activate_check(void)
{
static bool is_field_validation_pending = false;
@@ -313,7 +256,7 @@
nrfx_timer_enable(&m_timer_workaround.timer);
}
}
-#endif // NRF52840_XXAA
+#endif // defined(NRF52833_XXAA) || defined(NRF52840_XXAA)
#if defined(NRF52832_XXAA) || defined(NRF52832_XXAB)
static inline void nrfx_nfct_reset(void)
@@ -346,6 +289,9 @@
// Restore interrupts.
nrf_nfct_int_enable(int_enabled);
+ // Disable interrupts associated with data exchange.
+ nrf_nfct_int_disable(NRFX_NFCT_RX_INT_MASK | NRFX_NFCT_TX_INT_MASK);
+
NRFX_LOG_INFO("Reinitialize");
}
@@ -363,6 +309,10 @@
nrfx_timer_disable(&m_timer_workaround.timer);
m_nfct_cb.field_on = false;
+ /* Begin: Bugfix for FTPAN-218 */
+ nrfx_nfct_frame_delay_max_set(true);
+ /* End: Bugfix for FTPAN-218 */
+
/* Begin: Bugfix for FTPAN-116 */
// resume the NFCT to initialized state
nrfx_nfct_reset();
@@ -386,14 +336,14 @@
return;
}
-#ifdef NRF52840_XXAA
+#if defined(NRF52833_XXAA) || defined(NRF52840_XXAA)
m_timer_workaround.is_delayed = true;
nrfx_timer_disable(&m_timer_workaround.timer);
nrfx_nfct_activate_check();
#else
nrfx_nfct_field_poll();
-#endif //NRF52840_XXAA
+#endif // defined(NRF52833_XXAA) || defined(NRF52840_XXAA)
}
static inline nrfx_err_t nrfx_nfct_field_timer_config(void)
@@ -421,7 +371,7 @@
return err_code;
}
-#endif // USE_TIMER_WORKAROUND
+#endif // defined(USE_TIMER_WORKAROUND)
static inline nrf_nfct_sensres_nfcid1_size_t nrf_nfct_nfcid1_size_to_sensres_size(uint8_t nfcid1_size)
{
@@ -457,11 +407,6 @@
return NRFX_ERROR_INVALID_STATE;
}
-#ifdef NRF52840_XXAA
- m_nrf52840.eng_a = nrfx_nfct_type_52840_sample_check();
- m_nrf52840.eng_bc = nrfx_nfct_type_52840_final_check();
-#endif // NRF52840_XXAA
-
m_nfct_cb.config = *p_config;
nrfx_nfct_hw_init_setup();
@@ -469,15 +414,10 @@
NRFX_IRQ_PRIORITY_SET(NFCT_IRQn, NRFX_NFCT_CONFIG_IRQ_PRIORITY);
NRFX_IRQ_ENABLE(NFCT_IRQn);
-#ifdef USE_TIMER_WORKAROUND
+#if defined(USE_TIMER_WORKAROUND)
/* Initialize Timer module as the workaround for NFCT HW issues. */
- #ifdef NRF52840_XXAA
- if (!m_nrf52840.eng_a)
- #endif // NRF52840_XXAA
- {
- err_code = nrfx_nfct_field_timer_config();
- }
-#endif // USE_TIMER_WORKAROUND
+ err_code = nrfx_nfct_field_timer_config();
+#endif // defined(USE_TIMER_WORKAROUND)
if (err_code == NRFX_SUCCESS)
{
@@ -491,7 +431,8 @@
return err_code;
}
- m_nfct_cb.state = NRFX_DRV_STATE_INITIALIZED;
+ m_nfct_cb.state = NRFX_DRV_STATE_INITIALIZED;
+ m_nfct_cb.frame_delay_max = NFCT_FRAMEDELAYMAX_DEFAULT;
NRFX_LOG_INFO("Initialized");
return err_code;
@@ -504,15 +445,10 @@
NRFX_IRQ_DISABLE(NFCT_IRQn);
NRFX_IRQ_PENDING_CLEAR(NFCT_IRQn);
-#ifdef USE_TIMER_WORKAROUND
- /* Initialize Timer module as the workaround for NFCT HW issues. */
- #ifdef NRF52840_XXAA
- if (!m_nrf52840.eng_a)
- #endif // NRF52840_XXAA
- {
+#if defined(USE_TIMER_WORKAROUND)
+ /* De-initialize Timer module as the workaround for NFCT HW issues. */
nrfx_timer_uninit(&m_timer_workaround.timer);
- }
-#endif // USE_TIMER_WORKAROUND
+#endif // defined(USE_TIMER_WORKAROUND)
m_nfct_cb.state = NRFX_DRV_STATE_UNINITIALIZED;
}
@@ -587,16 +523,14 @@
void nrfx_nfct_state_force(nrfx_nfct_state_t state)
{
-#ifdef NRF52840_XXAA
- if ((m_nrf52840.eng_bc) && (state == NRFX_NFCT_STATE_ACTIVATED))
+#if defined(NRF52833_XXAA) || defined(NRF52840_XXAA)
+ if (state == NRFX_NFCT_STATE_ACTIVATED)
{
m_timer_workaround.is_hfclk_on = true;
nrfx_nfct_activate_check();
}
-#endif
- {
- nrf_nfct_task_trigger((nrf_nfct_task_t) state);
- }
+#endif // defined(NRF52833_XXAA) || defined(NRF52840_XXAA)
+ nrf_nfct_task_trigger((nrf_nfct_task_t) state);
}
void nrfx_nfct_init_substate_force(nrfx_nfct_active_state_t sub_state)
@@ -623,6 +557,10 @@
nrf_nfct_task_trigger((nrf_nfct_task_t) sub_state);
}
+ /* Begin: Bugfix for FTPAN-218 */
+ nrfx_nfct_frame_delay_max_set(true);
+ /* End: Bugfix for FTPAN-218 */
+
/* Disable TX/RX here (will be enabled at SELECTED) */
nrf_nfct_int_disable(NRFX_NFCT_RX_INT_MASK | NRFX_NFCT_TX_INT_MASK);
}
@@ -638,10 +576,6 @@
uint32_t delay = p_param->data.fdt;
uint32_t delay_thr = NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Msk;
-#ifdef NRF52840_XXAA
- delay_thr = (m_nrf52840.eng_a) ? NRFX_NFCT_FRAMEDELAYMAX_52840S : delay_thr;
-#endif // NRF52840_XXAA
-
// Delay validation.
if (delay > (delay_thr + NRFX_NFCT_FWT_MAX_DIFF))
{
@@ -649,7 +583,7 @@
}
delay = (delay > delay_thr) ? delay_thr : delay;
- nrf_nfct_frame_delay_max_set(delay);
+ m_nfct_cb.frame_delay_max = delay;
break;
}
@@ -830,6 +764,10 @@
nrf_nfct_event_clear(NRF_NFCT_EVENT_TXFRAMESTART);
nrf_nfct_event_clear(NRF_NFCT_EVENT_TXFRAMEEND);
+ /* Begin: Bugfix for FTPAN-218 */
+ nrfx_nfct_frame_delay_max_set(false);
+ /* End: Bugfix for FTPAN-218 */
+
/* At this point any previous error status can be ignored. */
nrf_nfct_rx_frame_status_clear(NRFX_NFCT_FRAME_STATUS_RX_ALL_MASK);
nrf_nfct_error_status_clear(NRFX_NFCT_ERROR_STATUS_ALL_MASK);
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_nvmc.c b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_nvmc.c
new file mode 100644
index 0000000..13e8998
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_nvmc.c
@@ -0,0 +1,421 @@
+/*
+ * Copyright (c) 2019, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <nrfx.h>
+
+#if NRFX_CHECK(NRFX_NVMC_ENABLED)
+
+#include <nrfx_nvmc.h>
+
+/**
+ * Value representing the number of bytes in a word.
+ *
+ * It is used in loops iterating over bytes contained in a word
+ * or in word-alignment checks.
+ */
+#define NVMC_BYTES_IN_WORD 4
+
+/**
+ * Value representing non-volatile memory (NVM) page count.
+ *
+ * This symbol is needed to determine NVM page count for chips that cannot
+ * always access FICR for this information.
+ */
+#if defined(NRF9160_XXAA)
+ #define NVMC_FLASH_PAGE_COUNT 256
+#endif
+
+/**
+ * Value representing non-volatile memory (NVM) page size in bytes.
+ *
+ * This symbol is needed to determine NVM page size for chips that cannot
+ * always access FICR for this information.
+ */
+#if defined(NRF9160_XXAA)
+ #define NVMC_FLASH_PAGE_SIZE 0x1000 ///< 4 kB
+#endif
+
+#if defined(NRF_NVMC_PARTIAL_ERASE_PRESENT)
+/**
+ * Value representing the page erase time.
+ *
+ * This value is used to determine whether the partial erase is still in progress.
+ */
+#if defined(NRF52810_XXAA) || defined(NRF52811_XXAA) || defined(NRF52840_XXAA)
+ #define NVMC_PAGE_ERASE_DURATION_MS 85
+#elif defined(NRF52833_XXAA) || defined(NRF9160_XXAA)
+ #define NVMC_PAGE_ERASE_DURATION_MS 87
+#else
+ #error "Page partial erase present but could not determine its total duration for given SoC"
+#endif
+
+/**
+ * Value representing the invalid page partial erase address.
+ *
+ * This value is used for representing a NULL pointer for
+ * partial erase, as that address 0 can be a valid
+ * memory address in flash.
+ */
+#define NVMC_PARTIAL_ERASE_INVALID_ADDR 0xFFFFFFFF
+
+/** Internal counter for page partial erase. */
+static uint32_t m_partial_erase_time_elapsed;
+
+/** Partial erase page address. */
+static uint32_t m_partial_erase_page_addr = NVMC_PARTIAL_ERASE_INVALID_ADDR;
+
+#endif // defined(NRF_NVMC_PARTIAL_ERASE_PRESENT)
+
+static uint32_t flash_page_size_get(void)
+{
+ uint32_t flash_page_size = 0;
+
+#if defined(NRF51) || defined(NRF52_SERIES)
+ flash_page_size = nrf_ficr_codepagesize_get(NRF_FICR);
+#elif defined(NVMC_FLASH_PAGE_SIZE)
+ flash_page_size = NVMC_FLASH_PAGE_SIZE;
+#else
+ #error "Cannot determine flash page size for a given SoC."
+#endif
+
+ return flash_page_size;
+}
+
+static uint32_t flash_page_count_get(void)
+{
+ uint32_t page_count = 0;
+
+#if defined(NRF51) || defined(NRF52_SERIES)
+ page_count = nrf_ficr_codesize_get(NRF_FICR);
+#elif defined(NVMC_FLASH_PAGE_COUNT)
+ page_count = NVMC_FLASH_PAGE_COUNT;
+#else
+ #error "Cannot determine flash page count for a given SoC."
+#endif
+
+ return page_count;
+}
+
+static uint32_t flash_total_size_get(void)
+{
+ return flash_page_size_get() * flash_page_count_get();
+}
+
+
+static bool is_page_aligned_check(uint32_t addr)
+{
+ /* If the modulo operation returns '0', then the address is aligned. */
+ return !(addr % flash_page_size_get());
+}
+
+static uint32_t partial_word_create(uint32_t addr, uint8_t const * bytes, uint32_t bytes_count)
+{
+ uint32_t value32;
+ uint32_t byte_shift;
+
+ byte_shift = addr % NVMC_BYTES_IN_WORD;
+
+ NRFX_ASSERT(bytes_count <= (NVMC_BYTES_IN_WORD - byte_shift));
+
+ value32 = 0xFFFFFFFF;
+ for (uint32_t i = 0; i < bytes_count; i++)
+ {
+ ((uint8_t *)&value32)[byte_shift] = bytes[i];
+ byte_shift++;
+ }
+
+ return value32;
+}
+
+static void nvmc_readonly_mode_set(void)
+{
+#if defined(NRF_TRUSTZONE_NONSECURE)
+ nrf_nvmc_nonsecure_mode_set(NRF_NVMC, NRF_NVMC_NS_MODE_READONLY);
+#else
+ nrf_nvmc_mode_set(NRF_NVMC, NRF_NVMC_MODE_READONLY);
+#endif
+}
+
+static void nvmc_write_mode_set(void)
+{
+#if defined(NRF_TRUSTZONE_NONSECURE)
+ nrf_nvmc_nonsecure_mode_set(NRF_NVMC, NRF_NVMC_NS_MODE_WRITE);
+#else
+ nrf_nvmc_mode_set(NRF_NVMC, NRF_NVMC_MODE_WRITE);
+#endif
+}
+
+static void nvmc_erase_mode_set(void)
+{
+#if defined(NRF_TRUSTZONE_NONSECURE)
+ nrf_nvmc_nonsecure_mode_set(NRF_NVMC, NRF_NVMC_NS_MODE_ERASE);
+#else
+ nrf_nvmc_mode_set(NRF_NVMC, NRF_NVMC_MODE_ERASE);
+#endif
+}
+
+static void nvmc_word_write(uint32_t addr, uint32_t value)
+{
+#if defined(NRF9160_XXAA)
+ while (!nrf_nvmc_write_ready_check(NRF_NVMC))
+ {}
+#else
+ while (!nrf_nvmc_ready_check(NRF_NVMC))
+ {}
+#endif
+
+ *(volatile uint32_t *)addr = value;
+ __DMB();
+}
+
+static void nvmc_words_write(uint32_t addr, void const * src, uint32_t num_words)
+{
+ for (uint32_t i = 0; i < num_words; i++)
+ {
+ nvmc_word_write(addr + (NVMC_BYTES_IN_WORD * i), ((uint32_t const *)src)[i]);
+ }
+}
+
+nrfx_err_t nrfx_nvmc_page_erase(uint32_t addr)
+{
+ NRFX_ASSERT(addr < flash_total_size_get());
+
+ if (!is_page_aligned_check(addr))
+ {
+ return NRFX_ERROR_INVALID_ADDR;
+ }
+
+ nvmc_erase_mode_set();
+ nrf_nvmc_page_erase_start(NRF_NVMC, addr);
+ while (!nrf_nvmc_ready_check(NRF_NVMC))
+ {}
+ nvmc_readonly_mode_set();
+
+ return NRFX_SUCCESS;
+}
+
+nrfx_err_t nrfx_nvmc_uicr_erase(void)
+{
+#if defined(NVMC_ERASEUICR_ERASEUICR_Msk)
+ nvmc_erase_mode_set();
+ nrf_nvmc_uicr_erase_start(NRF_NVMC);
+ while (!nrf_nvmc_ready_check(NRF_NVMC))
+ {}
+ nvmc_readonly_mode_set();
+ return NRFX_SUCCESS;
+#else
+ return NRFX_ERROR_NOT_SUPPORTED;
+#endif
+}
+
+void nrfx_nvmc_all_erase(void)
+{
+ nvmc_erase_mode_set();
+ nrf_nvmc_erase_all_start(NRF_NVMC);
+ while (!nrf_nvmc_ready_check(NRF_NVMC))
+ {}
+ nvmc_readonly_mode_set();
+}
+
+#if defined(NRF_NVMC_PARTIAL_ERASE_PRESENT)
+nrfx_err_t nrfx_nvmc_page_partial_erase_init(uint32_t addr, uint32_t duration_ms)
+{
+ NRFX_ASSERT(addr < flash_total_size_get());
+
+ if (!is_page_aligned_check(addr))
+ {
+ return NRFX_ERROR_INVALID_ADDR;
+ }
+
+ m_partial_erase_time_elapsed = 0;
+ m_partial_erase_page_addr = addr;
+ nrf_nvmc_partial_erase_duration_set(NRF_NVMC, duration_ms);
+
+ return NRFX_SUCCESS;
+}
+
+bool nrfx_nvmc_page_partial_erase_continue(void)
+{
+ NRFX_ASSERT(m_partial_erase_page_addr != NVMC_PARTIAL_ERASE_INVALID_ADDR);
+
+ uint32_t duration_ms = nrf_nvmc_partial_erase_duration_get(NRF_NVMC);
+
+#if defined(NVMC_CONFIG_WEN_PEen)
+ nrf_nvmc_mode_set(NRF_NVMC, NRF_NVMC_MODE_PARTIAL_ERASE);
+#else
+ nrf_nvmc_mode_set(NRF_NVMC, NRF_NVMC_MODE_ERASE);
+#endif
+
+ nrf_nvmc_page_partial_erase_start(NRF_NVMC, m_partial_erase_page_addr);
+ while (!nrf_nvmc_ready_check(NRF_NVMC))
+ {}
+ nvmc_readonly_mode_set();
+
+ m_partial_erase_time_elapsed += duration_ms;
+ if (m_partial_erase_time_elapsed < NVMC_PAGE_ERASE_DURATION_MS)
+ {
+ return false;
+ }
+ else
+ {
+ m_partial_erase_page_addr = NVMC_PARTIAL_ERASE_INVALID_ADDR;
+ return true;
+ }
+}
+#endif // defined(NRF_NVMC_PARTIAL_ERASE_PRESENT)
+
+bool nrfx_nvmc_byte_writable_check(uint32_t addr, uint8_t val_to_check)
+{
+ NRFX_ASSERT(addr < flash_total_size_get());
+
+ uint8_t val_on_addr = *(uint8_t const *)addr;
+ return (val_to_check & val_on_addr) == val_to_check;
+}
+
+bool nrfx_nvmc_word_writable_check(uint32_t addr, uint32_t val_to_check)
+{
+ NRFX_ASSERT(addr < flash_total_size_get());
+ NRFX_ASSERT(nrfx_is_word_aligned((void const *)addr));
+
+ uint32_t val_on_addr = *(uint32_t const *)addr;
+ return (val_to_check & val_on_addr) == val_to_check;
+}
+
+void nrfx_nvmc_byte_write(uint32_t addr, uint8_t value)
+{
+ uint32_t aligned_addr = addr & ~(0x03UL);
+
+ nrfx_nvmc_word_write(aligned_addr, partial_word_create(addr, &value, 1));
+}
+
+void nrfx_nvmc_word_write(uint32_t addr, uint32_t value)
+{
+ NRFX_ASSERT(addr < flash_total_size_get());
+ NRFX_ASSERT(nrfx_is_word_aligned((void const *)addr));
+
+ nvmc_write_mode_set();
+
+ nvmc_word_write(addr, value);
+
+ nvmc_readonly_mode_set();
+}
+
+void nrfx_nvmc_bytes_write(uint32_t addr, void const * src, uint32_t num_bytes)
+{
+ NRFX_ASSERT(addr < flash_total_size_get());
+
+ nvmc_write_mode_set();
+
+ uint8_t const * bytes_src = (uint8_t const *)src;
+
+ uint32_t unaligned_bytes = addr % NVMC_BYTES_IN_WORD;
+ if (unaligned_bytes != 0)
+ {
+ uint32_t leading_bytes = NVMC_BYTES_IN_WORD - unaligned_bytes;
+ if (leading_bytes > num_bytes)
+ {
+ leading_bytes = num_bytes;
+ }
+
+ nvmc_word_write(addr - unaligned_bytes,
+ partial_word_create(addr, bytes_src, leading_bytes));
+ num_bytes -= leading_bytes;
+ addr += leading_bytes;
+ bytes_src += leading_bytes;
+ }
+
+#if defined(__CORTEX_M) && (__CORTEX_M == 0U)
+ if (!nrfx_is_word_aligned((void const *)bytes_src))
+ {
+ /* Cortex-M0 allows only word-aligned RAM access.
+ If source address is not word-aligned, bytes are combined
+ into words explicitly. */
+ for (uint32_t i = 0; i < num_bytes / NVMC_BYTES_IN_WORD; i++)
+ {
+ uint32_t word = (uint32_t)bytes_src[0]
+ | ((uint32_t)bytes_src[1]) << 8
+ | ((uint32_t)bytes_src[2]) << 16
+ | ((uint32_t)bytes_src[3]) << 24;
+
+ nvmc_word_write(addr, word);
+ bytes_src += NVMC_BYTES_IN_WORD;
+ addr += NVMC_BYTES_IN_WORD;
+ }
+ }
+ else
+#endif
+ {
+ uint32_t word_count = num_bytes / NVMC_BYTES_IN_WORD;
+
+ nvmc_words_write(addr, (uint32_t const *)bytes_src, word_count);
+
+ addr += word_count * NVMC_BYTES_IN_WORD;
+ bytes_src += word_count * NVMC_BYTES_IN_WORD;
+ }
+
+ uint32_t trailing_bytes = num_bytes % NVMC_BYTES_IN_WORD;
+ if (trailing_bytes != 0)
+ {
+ nvmc_word_write(addr, partial_word_create(addr, bytes_src, trailing_bytes));
+ }
+
+ nvmc_readonly_mode_set();
+}
+
+void nrfx_nvmc_words_write(uint32_t addr, void const * src, uint32_t num_words)
+{
+ NRFX_ASSERT(addr < flash_total_size_get());
+ NRFX_ASSERT(nrfx_is_word_aligned((void const *)addr));
+ NRFX_ASSERT(nrfx_is_word_aligned(src));
+
+ nvmc_write_mode_set();
+
+ nvmc_words_write(addr, src, num_words);
+
+ nvmc_readonly_mode_set();
+}
+
+uint32_t nrfx_nvmc_flash_size_get(void)
+{
+ return flash_total_size_get();
+}
+
+uint32_t nrfx_nvmc_flash_page_size_get(void)
+{
+ return flash_page_size_get();
+}
+
+uint32_t nrfx_nvmc_flash_page_count_get(void)
+{
+ return flash_page_count_get();
+}
+
+#endif // NRFX_CHECK(NRFX_NVMC_ENABLED)
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_power.c b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_power.c
index a12a64e..ebfd710 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_power.c
+++ b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_power.c
@@ -106,7 +106,7 @@
return NRFX_ERROR_ALREADY_INITIALIZED;
}
-#if NRF_POWER_HAS_VDDH
+#if NRF_POWER_HAS_DCDCEN_VDDH
nrf_power_dcdcen_vddh_set(p_config->dcdcenhv);
#endif
#if NRF_POWER_HAS_DCDCEN
@@ -225,6 +225,8 @@
#if NRF_POWER_HAS_USBREG
void nrfx_power_usbevt_init(nrfx_power_usbevt_config_t const * p_config)
{
+ NRFX_ASSERT(p_config != NULL);
+
nrfx_power_usbevt_uninit();
if (p_config->handler != NULL)
{
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_qspi.c b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_qspi.c
index 1b339bf..4583017 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_qspi.c
+++ b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_qspi.c
@@ -35,38 +35,25 @@
#include <nrfx_qspi.h>
-
-/**
- * @brief Command byte used to read status register.
- *
- */
+/** @brief Command byte used to read status register. */
#define QSPI_STD_CMD_RDSR 0x05
-/**
- * @brief Byte used to mask status register and retrieve the write-in-progess bit.
- *
- */
+/** @brief Byte used to mask status register and retrieve the write-in-progess bit. */
#define QSPI_MEM_STATUSREG_WIP_Pos 0x01
-/**
- * @brief Default time used in timeout function.
- */
+/** @brief Default time used in timeout function. */
#define QSPI_DEF_WAIT_TIME_US 10
-/**
- * @brief Default number of tries in timeout function.
- */
+/** @brief Default number of tries in timeout function. */
#define QSPI_DEF_WAIT_ATTEMPTS 100
-/**
- * @brief Control block - driver instance local data.
- */
+/** @brief Control block - driver instance local data. */
typedef struct
{
- nrfx_qspi_handler_t handler; /**< Handler. */
- nrfx_drv_state_t state; /**< Driver state. */
- volatile bool interrupt_driven; /**< Information if the current operation is performed and is interrupt-driven. */
- void * p_context; /**< Driver context used in interrupt. */
+ nrfx_qspi_handler_t handler; /**< Handler. */
+ nrfx_drv_state_t state; /**< Driver state. */
+ volatile bool is_busy; /**< Flag indicating that an operation is currently being performed. */
+ void * p_context; /**< Driver context used in interrupt. */
} qspi_control_block_t;
static qspi_control_block_t m_cb;
@@ -74,7 +61,7 @@
static nrfx_err_t qspi_task_perform(nrf_qspi_task_t task)
{
// Wait for peripheral
- if (m_cb.interrupt_driven)
+ if (m_cb.is_busy)
{
return NRFX_ERROR_BUSY;
}
@@ -83,7 +70,7 @@
if (m_cb.handler)
{
- m_cb.interrupt_driven = true;
+ m_cb.is_busy = true;
nrf_qspi_int_enable(NRF_QSPI, NRF_QSPI_INT_READY_MASK);
}
@@ -113,6 +100,21 @@
return true;
}
+static nrfx_err_t qspi_ready_wait(void)
+{
+ bool result;
+ NRFX_WAIT_FOR(nrf_qspi_event_check(NRF_QSPI, NRF_QSPI_EVENT_READY),
+ QSPI_DEF_WAIT_ATTEMPTS,
+ QSPI_DEF_WAIT_TIME_US,
+ result);
+ if (!result)
+ {
+ return NRFX_ERROR_TIMEOUT;
+ }
+
+ return NRFX_SUCCESS;
+}
+
nrfx_err_t nrfx_qspi_init(nrfx_qspi_config_t const * p_config,
nrfx_qspi_handler_t handler,
void * p_context)
@@ -132,7 +134,7 @@
nrf_qspi_ifconfig0_set(NRF_QSPI, &p_config->prot_if);
nrf_qspi_ifconfig1_set(NRF_QSPI, &p_config->phy_if);
- m_cb.interrupt_driven = false;
+ m_cb.is_busy = false;
m_cb.handler = handler;
m_cb.p_context = p_context;
@@ -154,18 +156,8 @@
nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_ACTIVATE);
// Waiting for the peripheral to activate
- bool result;
- NRFX_WAIT_FOR(nrf_qspi_event_check(NRF_QSPI, NRF_QSPI_EVENT_READY),
- QSPI_DEF_WAIT_ATTEMPTS,
- QSPI_DEF_WAIT_TIME_US,
- result);
- if (!result)
- {
- return NRFX_ERROR_TIMEOUT;
- }
-
- return NRFX_SUCCESS;
+ return qspi_ready_wait();
}
nrfx_err_t nrfx_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config,
@@ -174,7 +166,7 @@
{
NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED);
- if (m_cb.interrupt_driven)
+ if (m_cb.is_busy)
{
return NRFX_ERROR_BUSY;
}
@@ -187,17 +179,12 @@
{
nrf_qspi_cinstrdata_set(NRF_QSPI, p_config->length, p_tx_buffer);
}
+
nrf_qspi_int_disable(NRF_QSPI, NRF_QSPI_INT_READY_MASK);
nrf_qspi_cinstr_transfer_start(NRF_QSPI, p_config);
- bool result;
- NRFX_WAIT_FOR(nrf_qspi_event_check(NRF_QSPI, NRF_QSPI_EVENT_READY),
- QSPI_DEF_WAIT_ATTEMPTS,
- QSPI_DEF_WAIT_TIME_US,
- result);
-
- if (!result)
+ if (qspi_ready_wait() == NRFX_ERROR_TIMEOUT)
{
// This timeout should never occur when WIPWAIT is not active, since in this
// case the QSPI peripheral should send the command immediately, without any
@@ -207,7 +194,6 @@
return NRFX_ERROR_TIMEOUT;
}
nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY);
- nrf_qspi_int_enable(NRF_QSPI, NRF_QSPI_INT_READY_MASK);
if (p_rx_buffer)
{
@@ -225,6 +211,93 @@
return nrfx_qspi_cinstr_xfer(&config, p_tx_buffer, NULL);
}
+nrfx_err_t nrfx_qspi_lfm_start(nrf_qspi_cinstr_conf_t const * p_config)
+{
+ NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED);
+ NRFX_ASSERT(!(nrf_qspi_cinstr_long_transfer_is_ongoing(NRF_QSPI)));
+ NRFX_ASSERT(p_config->length == NRF_QSPI_CINSTR_LEN_1B);
+
+ if (m_cb.is_busy)
+ {
+ return NRFX_ERROR_BUSY;
+ }
+
+ nrf_qspi_cinstr_long_transfer_start(NRF_QSPI, p_config);
+
+ if (qspi_ready_wait() == NRFX_ERROR_TIMEOUT)
+ {
+ /* In case of error, abort long frame mode */
+ nrf_qspi_cinstr_long_transfer_continue(NRF_QSPI, NRF_QSPI_CINSTR_LEN_1B, true);
+ return NRFX_ERROR_TIMEOUT;
+ }
+
+ m_cb.is_busy = true;
+ return NRFX_SUCCESS;
+}
+
+nrfx_err_t nrfx_qspi_lfm_xfer(void const * p_tx_buffer,
+ void * p_rx_buffer,
+ size_t transfer_length,
+ bool finalize)
+{
+ NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED);
+ NRFX_ASSERT(nrf_qspi_cinstr_long_transfer_is_ongoing(NRF_QSPI));
+
+ nrfx_err_t status = NRFX_SUCCESS;
+
+ /* Perform transfers in packets of 8 bytes. Last transfer may be shorter. */
+ nrf_qspi_cinstr_len_t length = NRF_QSPI_CINSTR_LEN_9B;
+ for (uint32_t curr_byte = 0; curr_byte < transfer_length; curr_byte += 8)
+ {
+ uint32_t remaining_bytes = transfer_length - curr_byte;
+ if (remaining_bytes < 8)
+ {
+ length = (nrf_qspi_cinstr_len_t)(remaining_bytes + 1);
+ }
+
+ if (p_tx_buffer)
+ {
+ nrf_qspi_cinstrdata_set(NRF_QSPI,
+ length,
+ &((uint8_t const *)p_tx_buffer)[curr_byte]);
+ }
+
+ nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY);
+
+ if (remaining_bytes <= 8)
+ {
+ nrf_qspi_cinstr_long_transfer_continue(NRF_QSPI, length, finalize);
+ }
+ else
+ {
+ nrf_qspi_cinstr_long_transfer_continue(NRF_QSPI, length, false);
+ }
+
+ if (qspi_ready_wait() == NRFX_ERROR_TIMEOUT)
+ {
+ /* In case of error, abort long frame mode */
+ nrf_qspi_cinstr_long_transfer_continue(NRF_QSPI, NRF_QSPI_CINSTR_LEN_1B, true);
+ status = NRFX_ERROR_TIMEOUT;
+ break;
+ }
+
+ if (p_rx_buffer)
+ {
+ nrf_qspi_cinstrdata_get(NRF_QSPI,
+ length,
+ &((uint8_t *)p_rx_buffer)[curr_byte]);
+ }
+ }
+ nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY);
+
+ if ((finalize) || (status == NRFX_ERROR_TIMEOUT))
+ {
+ m_cb.is_busy = false;
+ }
+
+ return status;
+}
+
nrfx_err_t nrfx_qspi_mem_busy_check(void)
{
nrfx_err_t ret_code;
@@ -252,6 +325,11 @@
{
NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED);
+ if (nrf_qspi_cinstr_long_transfer_is_ongoing(NRF_QSPI))
+ {
+ nrf_qspi_cinstr_long_transfer_continue(NRF_QSPI, NRF_QSPI_CINSTR_LEN_1B, true);
+ }
+
nrf_qspi_int_disable(NRF_QSPI, NRF_QSPI_INT_READY_MASK);
nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_DEACTIVATE);
@@ -271,17 +349,14 @@
{
NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED);
NRFX_ASSERT(p_tx_buffer != NULL);
- NRFX_ASSERT(nrfx_is_in_ram(p_tx_buffer));
- NRFX_ASSERT(nrfx_is_word_aligned(p_tx_buffer));
- if (!nrfx_is_in_ram(p_tx_buffer))
+ if (!nrfx_is_in_ram(p_tx_buffer) || !nrfx_is_word_aligned(p_tx_buffer))
{
return NRFX_ERROR_INVALID_ADDR;
}
nrf_qspi_write_buffer_set(NRF_QSPI, p_tx_buffer, tx_buffer_length, dst_address);
return qspi_task_perform(NRF_QSPI_TASK_WRITESTART);
-
}
nrfx_err_t nrfx_qspi_read(void * p_rx_buffer,
@@ -290,10 +365,8 @@
{
NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED);
NRFX_ASSERT(p_rx_buffer != NULL);
- NRFX_ASSERT(nrfx_is_in_ram(p_rx_buffer));
- NRFX_ASSERT(nrfx_is_word_aligned(p_rx_buffer));
- if (!nrfx_is_in_ram(p_rx_buffer))
+ if (!nrfx_is_in_ram(p_rx_buffer) || !nrfx_is_word_aligned(p_rx_buffer))
{
return NRFX_ERROR_INVALID_ADDR;
}
@@ -306,6 +379,12 @@
uint32_t start_address)
{
NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED);
+
+ if (!nrfx_is_word_aligned((void const *)start_address))
+ {
+ return NRFX_ERROR_INVALID_ADDR;
+ }
+
nrf_qspi_erase_ptr_set(NRF_QSPI, start_address, length);
return qspi_task_perform(NRF_QSPI_TASK_ERASESTART);
}
@@ -320,7 +399,7 @@
// Catch Event ready interrupts
if (nrf_qspi_event_check(NRF_QSPI, NRF_QSPI_EVENT_READY))
{
- m_cb.interrupt_driven = false;
+ m_cb.is_busy = false;
nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY);
m_cb.handler(NRFX_QSPI_EVENT_DONE, m_cb.p_context);
}
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_temp.c b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_temp.c
new file mode 100644
index 0000000..a481df7
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_temp.c
@@ -0,0 +1,146 @@
+/*
+ * Copyright (c) 2019, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <nrfx.h>
+
+#if NRFX_CHECK(NRFX_TEMP_ENABLED)
+
+#include <nrfx_temp.h>
+
+#if !defined(USE_WORKAROUND_FOR_TEMP_OFFSET_ANOMALY) && defined(NRF51)
+// Enable workaround for nRF51 series anomaly 28
+// (TEMP: Temperature offset value has to be manually loaded to the TEMP module).
+#define USE_WORKAROUND_FOR_TEMP_OFFSET_ANOMALY 1
+#endif
+
+/** @brief Time of one check attempt.*/
+#define NRFX_TEMP_TIME_US 4
+
+/** @brief Maximum attempts to check whether conversion passed.*/
+#define NRFX_TEMP_ATTEMPTS 10
+
+/** @brief Internal state of TEMP driver. */
+static nrfx_drv_state_t m_temp_state;
+
+/** @brief Pointer to handler to be called from interrupt routine. */
+static nrfx_temp_data_handler_t m_data_handler;
+
+nrfx_err_t nrfx_temp_init(nrfx_temp_config_t const * p_config, nrfx_temp_data_handler_t handler)
+{
+ NRFX_ASSERT(p_config);
+
+ if (m_temp_state != NRFX_DRV_STATE_UNINITIALIZED)
+ {
+ return NRFX_ERROR_ALREADY_INITIALIZED;
+ }
+
+#if NRFX_CHECK(USE_WORKAROUND_FOR_TEMP_OFFSET_ANOMALY)
+ *(uint32_t volatile *)0x4000C504 = 0;
+#endif
+
+ m_data_handler = handler;
+
+ if (m_data_handler)
+ {
+ nrf_temp_int_enable(NRF_TEMP, NRF_TEMP_INT_DATARDY_MASK);
+ NRFX_IRQ_PRIORITY_SET(TEMP_IRQn, p_config->interrupt_priority);
+ NRFX_IRQ_ENABLE(TEMP_IRQn);
+ }
+
+ m_temp_state = NRFX_DRV_STATE_INITIALIZED;
+ return NRFX_SUCCESS;
+}
+
+void nrfx_temp_uninit(void)
+{
+ NRFX_ASSERT(m_temp_state == NRFX_DRV_STATE_INITIALIZED);
+ nrf_temp_task_trigger(NRF_TEMP, NRF_TEMP_TASK_STOP);
+
+ if (m_data_handler)
+ {
+ nrf_temp_int_disable(NRF_TEMP, NRF_TEMP_INT_DATARDY_MASK);
+ NRFX_IRQ_DISABLE(TEMP_IRQn);
+ }
+
+ m_temp_state = NRFX_DRV_STATE_UNINITIALIZED;
+}
+
+int32_t nrfx_temp_calculate(int32_t raw_measurement)
+{
+ /* Raw temperature is a 2's complement signed value. Moreover, it is represented
+ * by 0.25[C] intervals, so division by 4 is needed. To preserve
+ * fractional part, raw value is multiplied by 100 before division.*/
+
+ return (raw_measurement * 100) / 4;
+}
+
+nrfx_err_t nrfx_temp_measure(void)
+{
+ NRFX_ASSERT(m_temp_state == NRFX_DRV_STATE_INITIALIZED);
+
+ nrfx_err_t result = NRFX_SUCCESS;
+ nrf_temp_event_clear(NRF_TEMP, NRF_TEMP_EVENT_DATARDY);
+ nrf_temp_task_trigger(NRF_TEMP, NRF_TEMP_TASK_START);
+
+ if (!m_data_handler)
+ {
+ bool ev_result;
+ NRFX_WAIT_FOR(nrf_temp_event_check(NRF_TEMP, NRF_TEMP_EVENT_DATARDY),
+ NRFX_TEMP_ATTEMPTS,
+ NRFX_TEMP_TIME_US,
+ ev_result);
+ if (!ev_result)
+ {
+ result = NRFX_ERROR_INTERNAL;
+ }
+ else
+ {
+ nrf_temp_event_clear(NRF_TEMP, NRF_TEMP_EVENT_DATARDY);
+ }
+ nrf_temp_task_trigger(NRF_TEMP, NRF_TEMP_TASK_STOP);
+ }
+
+ return result;
+}
+
+void nrfx_temp_irq_handler(void)
+{
+ NRFX_ASSERT(m_data_handler);
+
+ nrf_temp_task_trigger(NRF_TEMP, NRF_TEMP_TASK_STOP);
+ nrf_temp_event_clear(NRF_TEMP, NRF_TEMP_EVENT_DATARDY);
+
+ uint32_t raw_temp = nrfx_temp_result_get();
+
+ m_data_handler(raw_temp);
+}
+
+#endif // NRFX_CHECK(NRFX_TEMP_ENABLED)
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_twi.c b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_twi.c
index a4e85d8..5563167 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_twi.c
+++ b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_twi.c
@@ -48,7 +48,8 @@
(event == NRFX_TWI_EVT_DONE ? "EVT_DONE" : \
(event == NRFX_TWI_EVT_ADDRESS_NACK ? "EVT_ADDRESS_NACK" : \
(event == NRFX_TWI_EVT_DATA_NACK ? "EVT_DATA_NACK" : \
- "UNKNOWN ERROR")))
+ (event == NRFX_TWI_EVT_OVERRUN ? "EVT_OVERRUN" : \
+ "UNKNOWN ERROR"))))
#define EVT_TO_STR_TWI(event) \
(event == NRF_TWI_EVENT_STOPPED ? "NRF_TWI_EVENT_STOPPED" : \
@@ -73,8 +74,20 @@
NRF_GPIO_PIN_S0D1, \
NRF_GPIO_PIN_NOSENSE)
+#define TWI_FLAG_NO_STOP(flags) (flags & NRFX_TWI_FLAG_TX_NO_STOP)
+#define TWI_FLAG_SUSPEND(flags) (flags & NRFX_TWI_FLAG_SUSPEND)
+#define TWI_FLAG_NO_HANDLER_IN_USE(flags) (flags & NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER)
+
#define HW_TIMEOUT 100000
+/* TWI master driver suspend types. */
+typedef enum
+{
+ TWI_NO_SUSPEND, //< Last transfer was not suspended.
+ TWI_SUSPEND_TX, //< Last transfer was TX and was suspended.
+ TWI_SUSPEND_RX //< Last transfer was RX and was suspended.
+} twi_suspend_t;
+
// Control block - driver instance local data.
typedef struct
{
@@ -85,7 +98,8 @@
uint32_t flags;
uint8_t * p_curr_buf;
size_t curr_length;
- bool curr_no_stop;
+ bool curr_tx_no_stop;
+ twi_suspend_t prev_suspend;
nrfx_drv_state_t state;
bool error;
volatile bool busy;
@@ -162,6 +176,7 @@
p_cb->handler = event_handler;
p_cb->p_context = p_context;
p_cb->int_mask = 0;
+ p_cb->prev_suspend = TWI_NO_SUSPEND;
p_cb->repeated = false;
p_cb->busy = false;
p_cb->hold_bus_uninit = p_config->hold_bus_uninit;
@@ -243,24 +258,27 @@
NRFX_LOG_INFO("Instance disabled: %d.", p_instance->drv_inst_idx);
}
-static bool twi_send_byte(NRF_TWI_Type * p_twi,
- uint8_t const * p_data,
- size_t length,
- size_t * p_bytes_transferred,
- bool no_stop)
+static bool twi_send_byte(NRF_TWI_Type * p_twi,
+ twi_control_block_t * p_cb)
{
- if (*p_bytes_transferred < length)
+ if (p_cb->bytes_transferred < p_cb->curr_length)
{
- nrf_twi_txd_set(p_twi, p_data[*p_bytes_transferred]);
- ++(*p_bytes_transferred);
+ nrf_twi_txd_set(p_twi, p_cb->p_curr_buf[p_cb->bytes_transferred]);
+ ++(p_cb->bytes_transferred);
}
else
{
- if (no_stop)
+ if (p_cb->curr_tx_no_stop)
{
nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_SUSPEND);
return false;
}
+ else if(TWI_FLAG_SUSPEND(p_cb->flags))
+ {
+ nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_SUSPEND);
+ p_cb->prev_suspend = TWI_SUSPEND_TX;
+ return false;
+ }
else
{
nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STOP);
@@ -269,40 +287,40 @@
return true;
}
-static void twi_receive_byte(NRF_TWI_Type * p_twi,
- uint8_t * p_data,
- size_t length,
- size_t * p_bytes_transferred)
+static bool twi_receive_byte(NRF_TWI_Type * p_twi,
+ twi_control_block_t * p_cb)
{
- if (*p_bytes_transferred < length)
+ if (p_cb->bytes_transferred < p_cb->curr_length)
{
- p_data[*p_bytes_transferred] = nrf_twi_rxd_get(p_twi);
+ p_cb->p_curr_buf[p_cb->bytes_transferred] = nrf_twi_rxd_get(p_twi);
- ++(*p_bytes_transferred);
+ ++(p_cb->bytes_transferred);
- if (*p_bytes_transferred == length - 1)
+ if ((p_cb->bytes_transferred == p_cb->curr_length - 1) && (!TWI_FLAG_SUSPEND(p_cb->flags)))
{
nrf_twi_shorts_set(p_twi, NRF_TWI_SHORT_BB_STOP_MASK);
}
- else if (*p_bytes_transferred == length)
+ else if (p_cb->bytes_transferred == p_cb->curr_length && (!TWI_FLAG_SUSPEND(p_cb->flags)))
{
- return;
+ return true;
+ }
+ else if (p_cb->bytes_transferred == p_cb->curr_length && TWI_FLAG_SUSPEND(p_cb->flags))
+ {
+ p_cb->prev_suspend = TWI_SUSPEND_RX;
+ return false;
}
nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_RESUME);
}
+ return true;
}
-static bool twi_transfer(NRF_TWI_Type * p_twi,
- bool * p_error,
- size_t * p_bytes_transferred,
- uint8_t * p_data,
- size_t length,
- bool no_stop)
+static bool twi_transfer(NRF_TWI_Type * p_twi,
+ twi_control_block_t * p_cb)
{
- bool do_stop_check = ((*p_error) || ((*p_bytes_transferred) == length));
+ bool do_stop_check = ((p_cb->error) || ((p_cb->bytes_transferred) == p_cb->curr_length));
- if (*p_error)
+ if (p_cb->error)
{
nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_ERROR);
nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_TXDSENT);
@@ -313,7 +331,7 @@
nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_ERROR);
NRFX_LOG_DEBUG("TWI: Event: %s.", EVT_TO_STR_TWI(NRF_TWI_EVENT_ERROR));
nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STOP);
- *p_error = true;
+ p_cb->error = true;
}
else
{
@@ -326,11 +344,11 @@
nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_ERROR);
NRFX_LOG_DEBUG("TWI: Event: %s.", EVT_TO_STR_TWI(NRF_TWI_EVENT_ERROR));
nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STOP);
- *p_error = true;
+ p_cb->error = true;
}
else
{
- if (!twi_send_byte(p_twi, p_data, length, p_bytes_transferred, no_stop))
+ if (!twi_send_byte(p_twi, p_cb))
{
return false;
}
@@ -345,11 +363,14 @@
NRFX_LOG_DEBUG("TWI: Event: %s.", EVT_TO_STR_TWI(NRF_TWI_EVENT_ERROR));
nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_ERROR);
nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STOP);
- *p_error = true;
+ p_cb->error = true;
}
else
{
- twi_receive_byte(p_twi, p_data, length, p_bytes_transferred);
+ if (!twi_receive_byte(p_twi, p_cb))
+ {
+ return false;
+ }
}
}
}
@@ -357,6 +378,7 @@
if (do_stop_check && nrf_twi_event_check(p_twi, NRF_TWI_EVENT_STOPPED))
{
nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_STOPPED);
+ p_cb->prev_suspend = TWI_NO_SUSPEND;
NRFX_LOG_DEBUG("TWI: Event: %s.", EVT_TO_STR_TWI(NRF_TWI_EVENT_STOPPED));
return false;
}
@@ -364,11 +386,8 @@
return true;
}
-static nrfx_err_t twi_tx_start_transfer(twi_control_block_t * p_cb,
- NRF_TWI_Type * p_twi,
- uint8_t const * p_data,
- size_t length,
- bool no_stop)
+static nrfx_err_t twi_tx_start_transfer(NRF_TWI_Type * p_twi,
+ twi_control_block_t * p_cb)
{
nrfx_err_t ret_code = NRFX_SUCCESS;
volatile int32_t hw_timeout;
@@ -386,9 +405,13 @@
// In case TWI is suspended resume its operation.
nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_RESUME);
- nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STARTTX);
- (void)twi_send_byte(p_twi, p_data, length, &p_cb->bytes_transferred, no_stop);
+ if (p_cb->prev_suspend != TWI_SUSPEND_TX)
+ {
+ nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STARTTX);
+ }
+
+ (void)twi_send_byte(p_twi, p_cb);
if (p_cb->handler)
{
@@ -396,17 +419,13 @@
NRF_TWI_INT_ERROR_MASK |
NRF_TWI_INT_TXDSENT_MASK |
NRF_TWI_INT_RXDREADY_MASK;
+
nrf_twi_int_enable(p_twi, p_cb->int_mask);
}
else
{
while ((hw_timeout > 0) &&
- twi_transfer(p_twi,
- &p_cb->error,
- &p_cb->bytes_transferred,
- (uint8_t *)p_data,
- length,
- no_stop))
+ twi_transfer(p_twi, p_cb))
{
hw_timeout--;
}
@@ -432,10 +451,8 @@
return ret_code;
}
-static nrfx_err_t twi_rx_start_transfer(twi_control_block_t * p_cb,
- NRF_TWI_Type * p_twi,
- uint8_t const * p_data,
- size_t length)
+static nrfx_err_t twi_rx_start_transfer(NRF_TWI_Type * p_twi,
+ twi_control_block_t * p_cb)
{
nrfx_err_t ret_code = NRFX_SUCCESS;
volatile int32_t hw_timeout;
@@ -450,7 +467,7 @@
p_cb->bytes_transferred = 0;
p_cb->error = false;
- if (length == 1)
+ if ((p_cb->curr_length == 1) && (!TWI_FLAG_SUSPEND(p_cb->flags)))
{
nrf_twi_shorts_set(p_twi, NRF_TWI_SHORT_BB_STOP_MASK);
}
@@ -460,7 +477,11 @@
}
// In case TWI is suspended resume its operation.
nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_RESUME);
- nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STARTRX);
+
+ if (p_cb->prev_suspend != TWI_SUSPEND_RX)
+ {
+ nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STARTRX);
+ }
if (p_cb->handler)
{
@@ -473,12 +494,7 @@
else
{
while ((hw_timeout > 0) &&
- twi_transfer(p_twi,
- &p_cb->error,
- &p_cb->bytes_transferred,
- (uint8_t*)p_data,
- length,
- false))
+ twi_transfer(p_twi, p_cb))
{
hw_timeout--;
}
@@ -502,14 +518,25 @@
return ret_code;
}
-__STATIC_INLINE nrfx_err_t twi_xfer(twi_control_block_t * p_cb,
- NRF_TWI_Type * p_twi,
+__STATIC_INLINE nrfx_err_t twi_xfer(NRF_TWI_Type * p_twi,
+ twi_control_block_t * p_cb,
nrfx_twi_xfer_desc_t const * p_xfer_desc,
uint32_t flags)
{
nrfx_err_t err_code = NRFX_SUCCESS;
+ if ((p_cb->prev_suspend == TWI_SUSPEND_TX) && (p_xfer_desc->type == NRFX_TWI_XFER_RX))
+ {
+ /* RX is invalid after TX suspend */
+ return NRFX_ERROR_INVALID_STATE;
+ }
+ else if ((p_cb->prev_suspend == TWI_SUSPEND_RX) && (p_xfer_desc->type != NRFX_TWI_XFER_RX))
+ {
+ /* TX, TXRX and TXTX are invalid after RX suspend */
+ return NRFX_ERROR_INVALID_STATE;
+ }
+
/* Block TWI interrupts to ensure that function is not interrupted by TWI interrupt. */
nrf_twi_int_disable(p_twi, NRF_TWI_ALL_INTS_MASK);
@@ -524,7 +551,7 @@
}
else
{
- p_cb->busy = (NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER & flags) ? false : true;
+ p_cb->busy = (TWI_FLAG_NO_HANDLER_IN_USE(flags)) ? false : true;
}
p_cb->flags = flags;
@@ -535,23 +562,14 @@
if (p_xfer_desc->type != NRFX_TWI_XFER_RX)
{
- p_cb->curr_no_stop = ((p_xfer_desc->type == NRFX_TWI_XFER_TX) &&
- !(flags & NRFX_TWI_FLAG_TX_NO_STOP)) ? false : true;
+ p_cb->curr_tx_no_stop = ((p_xfer_desc->type == NRFX_TWI_XFER_TX) &&
+ !(flags & NRFX_TWI_FLAG_TX_NO_STOP)) ? false : true;
- err_code = twi_tx_start_transfer(p_cb,
- p_twi,
- p_xfer_desc->p_primary_buf,
- p_xfer_desc->primary_length,
- p_cb->curr_no_stop);
+ err_code = twi_tx_start_transfer(p_twi, p_cb);
}
else
{
- p_cb->curr_no_stop = false;
-
- err_code = twi_rx_start_transfer(p_cb,
- p_twi,
- p_xfer_desc->p_primary_buf,
- p_xfer_desc->primary_length);
+ err_code = twi_rx_start_transfer(p_twi, p_cb);
}
if (p_cb->handler == NULL)
{
@@ -589,7 +607,7 @@
NRFX_LOG_HEXDUMP_DEBUG(p_xfer_desc->p_secondary_buf,
p_xfer_desc->secondary_length * sizeof(p_xfer_desc->p_secondary_buf[0]));
- err_code = twi_xfer(p_cb, (NRF_TWI_Type *)p_instance->p_twi, p_xfer_desc, flags);
+ err_code = twi_xfer((NRF_TWI_Type *)p_instance->p_twi, p_cb, p_xfer_desc, flags);
NRFX_LOG_WARNING("Function: %s, error code: %s.",
__func__,
NRFX_LOG_ERROR_STRING_GET(err_code));
@@ -603,7 +621,6 @@
bool no_stop)
{
nrfx_twi_xfer_desc_t xfer = NRFX_TWI_XFER_DESC_TX(address, (uint8_t*)p_data, length);
-
return nrfx_twi_xfer(p_instance, &xfer, no_stop ? NRFX_TWI_FLAG_TX_NO_STOP : 0);
}
@@ -630,12 +647,7 @@
{
NRFX_ASSERT(p_cb->handler);
- if (twi_transfer(p_twi,
- &p_cb->error,
- &p_cb->bytes_transferred,
- p_cb->p_curr_buf,
- p_cb->curr_length,
- p_cb->curr_no_stop ))
+ if (twi_transfer(p_twi, p_cb))
{
return;
}
@@ -645,21 +657,18 @@
(p_cb->xfer_desc.type == NRFX_TWI_XFER_TXTX)) &&
p_cb->p_curr_buf == p_cb->xfer_desc.p_primary_buf)
{
- p_cb->p_curr_buf = p_cb->xfer_desc.p_secondary_buf;
- p_cb->curr_length = p_cb->xfer_desc.secondary_length;
- p_cb->curr_no_stop = (p_cb->flags & NRFX_TWI_FLAG_TX_NO_STOP);
+ p_cb->p_curr_buf = p_cb->xfer_desc.p_secondary_buf;
+ p_cb->curr_length = p_cb->xfer_desc.secondary_length;
+ p_cb->curr_tx_no_stop = (p_cb->flags & NRFX_TWI_FLAG_TX_NO_STOP);
+ p_cb->prev_suspend = TWI_NO_SUSPEND;
if (p_cb->xfer_desc.type == NRFX_TWI_XFER_TXTX)
{
- (void)twi_tx_start_transfer(p_cb,
- p_twi,
- p_cb->p_curr_buf,
- p_cb->curr_length,
- p_cb->curr_no_stop);
+ (void)twi_tx_start_transfer(p_twi, p_cb);
}
else
{
- (void)twi_rx_start_transfer(p_cb, p_twi, p_cb->p_curr_buf, p_cb->curr_length);
+ (void)twi_rx_start_transfer(p_twi, p_cb);
}
}
else
@@ -680,6 +689,11 @@
event.type = NRFX_TWI_EVT_DATA_NACK;
NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRFX_TWI_EVT_DATA_NACK));
}
+ else if (errorsrc & NRF_TWI_ERROR_OVERRUN)
+ {
+ event.type = NRFX_TWI_EVT_OVERRUN;
+ NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRFX_TWI_EVT_OVERRUN));
+ }
}
else
{
@@ -689,7 +703,7 @@
p_cb->busy = false;
- if (!(NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER & p_cb->flags))
+ if (!(TWI_FLAG_NO_HANDLER_IN_USE(p_cb->flags)))
{
p_cb->handler(&event, p_cb->p_context);
}
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_twi_twim.c b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_twi_twim.c
new file mode 100644
index 0000000..ca6fc16
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_twi_twim.c
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2019, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <nrfx.h>
+#include <nrf_gpio.h>
+
+#define TWI_TWIM_PIN_CONFIGURE(_pin) nrf_gpio_cfg((_pin), \
+ NRF_GPIO_PIN_DIR_OUTPUT, \
+ NRF_GPIO_PIN_INPUT_CONNECT, \
+ NRF_GPIO_PIN_PULLUP, \
+ NRF_GPIO_PIN_S0D1, \
+ NRF_GPIO_PIN_NOSENSE)
+
+nrfx_err_t nrfx_twi_twim_bus_recover(uint32_t scl_pin, uint32_t sda_pin)
+{
+ nrf_gpio_pin_set(scl_pin);
+ nrf_gpio_pin_set(sda_pin);
+
+ TWI_TWIM_PIN_CONFIGURE(scl_pin);
+ TWI_TWIM_PIN_CONFIGURE(sda_pin);
+ NRFX_DELAY_US(4);
+
+ for (uint8_t i = 0; i < 9; i++)
+ {
+ if (nrf_gpio_pin_read(sda_pin))
+ {
+ break;
+ }
+ else
+ {
+ // Pulse CLOCK signal
+ nrf_gpio_pin_clear(scl_pin);
+ NRFX_DELAY_US(4);
+ nrf_gpio_pin_set(scl_pin);
+ NRFX_DELAY_US(4);
+ }
+ }
+
+ // Generate a STOP condition on the bus
+ nrf_gpio_pin_clear(sda_pin);
+ NRFX_DELAY_US(4);
+ nrf_gpio_pin_set(sda_pin);
+ NRFX_DELAY_US(4);
+
+ if (nrf_gpio_pin_read(sda_pin))
+ {
+ return NRFX_SUCCESS;
+ }
+ else
+ {
+ return NRFX_ERROR_INTERNAL;
+ }
+}
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_twim.c b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_twim.c
index 69f1974..e608996 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_twim.c
+++ b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_twim.c
@@ -139,6 +139,11 @@
{
nrfx_err_t ret = NRFX_ERROR_INTERNAL;
+ if (errorsrc & NRF_TWIM_ERROR_OVERRUN)
+ {
+ ret = NRFX_ERROR_DRV_TWI_ERR_OVERRUN;
+ }
+
if (errorsrc & NRF_TWIM_ERROR_ADDRESS_NACK)
{
ret = NRFX_ERROR_DRV_TWI_ERR_ANACK;
@@ -152,6 +157,58 @@
return ret;
}
+static bool xfer_completeness_check(NRF_TWIM_Type * p_twim, twim_control_block_t * p_cb)
+{
+ // If the actual number of transferred bytes is not equal to what was requested,
+ // but there was no error signaled by the peripheral, this means that something
+ // unexpected, like a premature STOP condition, happened on the bus.
+ // In such case the peripheral has to be disabled and re-enabled, so that its
+ // internal state machine is reinitialized.
+
+ bool transfer_complete = true;
+ switch (p_cb->xfer_desc.type)
+ {
+ case NRFX_TWIM_XFER_TXTX:
+ if (((p_cb->int_mask == (NRF_TWIM_INT_SUSPENDED_MASK | NRF_TWIM_INT_ERROR_MASK)) &&
+ (nrf_twim_txd_amount_get(p_twim) != p_cb->xfer_desc.primary_length)) ||
+ ((p_cb->int_mask == (NRF_TWIM_INT_STOPPED_MASK | NRF_TWIM_INT_ERROR_MASK)) &&
+ (nrf_twim_txd_amount_get(p_twim) != p_cb->xfer_desc.secondary_length)))
+ {
+ transfer_complete = false;
+ }
+ break;
+ case NRFX_TWIM_XFER_TXRX:
+ if ((nrf_twim_txd_amount_get(p_twim) != p_cb->xfer_desc.primary_length) ||
+ (nrf_twim_rxd_amount_get(p_twim) != p_cb->xfer_desc.secondary_length))
+ {
+ transfer_complete = false;
+ }
+ break;
+ case NRFX_TWIM_XFER_TX:
+ if (nrf_twim_txd_amount_get(p_twim) != p_cb->xfer_desc.primary_length)
+ {
+ transfer_complete = false;
+ }
+ break;
+ case NRFX_TWIM_XFER_RX:
+ if (nrf_twim_rxd_amount_get(p_twim) != p_cb->xfer_desc.primary_length)
+ {
+ transfer_complete = false;
+ }
+ break;
+ default:
+ break;
+ }
+
+ if (!transfer_complete)
+ {
+ nrf_twim_disable(p_twim);
+ nrf_twim_enable(p_twim);
+ }
+
+ return transfer_complete;
+}
+
nrfx_err_t nrfx_twim_init(nrfx_twim_t const * p_instance,
nrfx_twim_config_t const * p_config,
nrfx_twim_evt_handler_t event_handler,
@@ -320,6 +377,7 @@
nrfx_err_t err_code = NRFX_SUCCESS;
nrf_twim_task_t start_task = NRF_TWIM_TASK_STARTTX;
nrf_twim_event_t evt_to_wait = NRF_TWIM_EVENT_STOPPED;
+ p_cb->error = false;
if (!nrfx_is_in_ram(p_xfer_desc->p_primary_buf))
{
@@ -473,6 +531,13 @@
{
err_code = twi_process_error(errorsrc);
}
+ else
+ {
+ if (!xfer_completeness_check(p_twim, p_cb))
+ {
+ err_code = NRFX_ERROR_INTERNAL;
+ }
+ }
}
return err_code;
}
@@ -583,6 +648,8 @@
nrf_twim_task_trigger(p_twim, NRF_TWIM_TASK_RESUME);
nrf_twim_task_trigger(p_twim, NRF_TWIM_TASK_STOP);
+
+ p_cb->error = true;
return;
}
}
@@ -594,14 +661,9 @@
NRFX_LOG_DEBUG("TWIM: Event: %s.", EVT_TO_STR_TWIM(NRF_TWIM_EVENT_STOPPED));
nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_STOPPED);
event.xfer_desc = p_cb->xfer_desc;
- if (p_cb->error)
+ if (!p_cb->error)
{
-
- event.xfer_desc.primary_length = (p_cb->xfer_desc.type == NRFX_TWIM_XFER_RX) ?
- nrf_twim_rxd_amount_get(p_twim) : nrf_twim_txd_amount_get(p_twim);
- event.xfer_desc.secondary_length = (p_cb->xfer_desc.type == NRFX_TWIM_XFER_TXRX) ?
- nrf_twim_rxd_amount_get(p_twim) : nrf_twim_txd_amount_get(p_twim);
-
+ p_cb->error = !xfer_completeness_check(p_twim, p_cb);
}
nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_LASTTX);
nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_LASTRX);
@@ -649,9 +711,21 @@
event.type = NRFX_TWIM_EVT_DATA_NACK;
NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRFX_TWIM_EVT_DATA_NACK));
}
+ else if (errorsrc & NRF_TWIM_ERROR_OVERRUN)
+ {
+ event.type = NRFX_TWIM_EVT_DATA_NACK;
+ NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRFX_TWIM_EVT_DATA_NACK));
+ }
else
{
- event.type = NRFX_TWIM_EVT_DONE;
+ if (p_cb->error)
+ {
+ event.type = NRFX_TWIM_EVT_BUS_ERROR;
+ }
+ else
+ {
+ event.type = NRFX_TWIM_EVT_DONE;
+ }
NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRFX_TWIM_EVT_DONE));
}
@@ -659,6 +733,7 @@
{
p_cb->busy = false;
}
+
p_cb->handler(&event, p_cb->p_context);
}
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_twis.c b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_twis.c
index 09c875c..10b827f 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_twis.c
+++ b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_twis.c
@@ -730,7 +730,7 @@
nrf_twis_tx_prepare(p_instance->p_reg,
(uint8_t const *)p_buf,
- (nrf_twis_amount_t)size);
+ size);
err_code = NRFX_SUCCESS;
NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
return err_code;
@@ -774,7 +774,7 @@
nrf_twis_rx_prepare(p_instance->p_reg,
(uint8_t *)p_buf,
- (nrf_twis_amount_t)size);
+ size);
err_code = NRFX_SUCCESS;
NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
return err_code;
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_uart.c b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_uart.c
index 8e3c377..709038c 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_uart.c
+++ b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_uart.c
@@ -58,7 +58,7 @@
uint8_t const * p_tx_buffer;
uint8_t * p_rx_buffer;
uint8_t * p_rx_secondary_buffer;
- size_t tx_buffer_length;
+ volatile size_t tx_buffer_length;
size_t rx_buffer_length;
size_t rx_secondary_buffer_length;
volatile size_t tx_counter;
@@ -242,7 +242,10 @@
static bool tx_blocking(NRF_UART_Type * p_uart, uart_control_block_t * p_cb)
{
- while (p_cb->tx_counter < p_cb->tx_buffer_length)
+ // Use a local variable to avoid undefined order of accessing two volatile variables
+ // in one statement.
+ size_t const tx_buffer_length = p_cb->tx_buffer_length;
+ while (p_cb->tx_counter < tx_buffer_length)
{
// Wait until the transmitter is ready to accept a new byte.
// Exit immediately if the transfer has been aborted.
@@ -598,8 +601,10 @@
if (nrf_uart_event_check(p_uart, NRF_UART_EVENT_TXDRDY))
{
- if (p_cb->tx_counter < p_cb->tx_buffer_length &&
- !p_cb->tx_abort)
+ // Use a local variable to avoid undefined order of accessing two volatile variables
+ // in one statement.
+ size_t const tx_buffer_length = p_cb->tx_buffer_length;
+ if (p_cb->tx_counter < tx_buffer_length && !p_cb->tx_abort)
{
tx_byte(p_uart, p_cb);
}
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_uarte.c b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_uarte.c
index a74ac6e..8d2d21b 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_uarte.c
+++ b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_uarte.c
@@ -85,7 +85,6 @@
UARTE2_LENGTH_VALIDATE(drv_inst_idx, length, 0) || \
UARTE3_LENGTH_VALIDATE(drv_inst_idx, length, 0))
-
typedef struct
{
void * p_context;
@@ -138,10 +137,12 @@
nrf_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_ENDTX);
nrf_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_ERROR);
nrf_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_RXTO);
+ nrf_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_TXSTOPPED);
nrf_uarte_int_enable(p_instance->p_reg, NRF_UARTE_INT_ENDRX_MASK |
NRF_UARTE_INT_ENDTX_MASK |
NRF_UARTE_INT_ERROR_MASK |
- NRF_UARTE_INT_RXTO_MASK);
+ NRF_UARTE_INT_RXTO_MASK |
+ NRF_UARTE_INT_TXSTOPPED_MASK);
NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number((void *)p_instance->p_reg),
interrupt_priority);
NRFX_IRQ_ENABLE(nrfx_get_irq_number((void *)p_instance->p_reg));
@@ -152,7 +153,8 @@
nrf_uarte_int_disable(p_instance->p_reg, NRF_UARTE_INT_ENDRX_MASK |
NRF_UARTE_INT_ENDTX_MASK |
NRF_UARTE_INT_ERROR_MASK |
- NRF_UARTE_INT_RXTO_MASK);
+ NRF_UARTE_INT_RXTO_MASK |
+ NRF_UARTE_INT_TXSTOPPED_MASK);
NRFX_IRQ_DISABLE(nrfx_get_irq_number((void *)p_instance->p_reg));
}
@@ -257,13 +259,20 @@
{
uarte_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx];
- nrf_uarte_disable(p_instance->p_reg);
-
if (p_cb->handler)
{
interrupts_disable(p_instance);
}
+ // Make sure all transfers are finished before UARTE is disabled
+ // to achieve the lowest power consumption.
+ nrf_uarte_shorts_disable(p_instance->p_reg, NRF_UARTE_SHORT_ENDRX_STARTRX);
+ nrf_uarte_task_trigger(p_instance->p_reg, NRF_UARTE_TASK_STOPRX);
+ nrf_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_TXSTOPPED);
+ nrf_uarte_task_trigger(p_instance->p_reg, NRF_UARTE_TASK_STOPTX);
+ while (!nrf_uarte_event_check(p_instance->p_reg, NRF_UARTE_EVENT_TXSTOPPED))
+ {}
+ nrf_uarte_disable(p_instance->p_reg);
pins_to_default(p_instance);
#if NRFX_CHECK(NRFX_PRS_ENABLED)
@@ -336,6 +345,15 @@
{
err_code = NRFX_ERROR_FORBIDDEN;
}
+ else
+ {
+ // Transmitter has to be stopped by triggering the STOPTX task to achieve
+ // the lowest possible level of the UARTE power consumption.
+ nrf_uarte_task_trigger(p_instance->p_reg, NRF_UARTE_TASK_STOPTX);
+
+ while (!nrf_uarte_event_check(p_instance->p_reg, NRF_UARTE_EVENT_TXSTOPPED))
+ {}
+ }
p_cb->tx_buffer_length = 0;
}
@@ -585,6 +603,20 @@
if (nrf_uarte_event_check(p_uarte, NRF_UARTE_EVENT_ENDTX))
{
nrf_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_ENDTX);
+
+ // Transmitter has to be stopped by triggering STOPTX task to achieve
+ // the lowest possible level of the UARTE power consumption.
+ nrf_uarte_task_trigger(p_uarte, NRF_UARTE_TASK_STOPTX);
+
+ if (p_cb->tx_buffer_length != 0)
+ {
+ tx_done_event(p_cb, nrf_uarte_tx_amount_get(p_uarte));
+ }
+ }
+
+ if (nrf_uarte_event_check(p_uarte, NRF_UARTE_EVENT_TXSTOPPED))
+ {
+ nrf_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_TXSTOPPED);
if (p_cb->tx_buffer_length != 0)
{
tx_done_event(p_cb, nrf_uarte_tx_amount_get(p_uarte));
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_usbd.c b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_usbd.c
index 302ae9b..5827b17 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_usbd.c
+++ b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_usbd.c
@@ -1155,6 +1155,25 @@
if (NRF_USBD_EPIN_CHECK(ep))
{
/* IN endpoint (Device -> Host) */
+
+ /* Secure against the race condition that occurs when an IN transfer is interrupted
+ * by an OUT transaction, which in turn is interrupted by a process with higher priority.
+ * If the IN events ENDEPIN and EPDATA arrive during that high priority process,
+ * the OUT handler might call usbd_ep_data_handler without calling
+ * nrf_usbd_epin_dma_handler (or nrf_usbd_ep0in_dma_handler) for the IN transaction.
+ */
+ if (nrf_usbd_event_get_and_clear(nrfx_usbd_ep_to_endevent(ep)))
+ {
+ if (ep != NRFX_USBD_EPIN0)
+ {
+ nrf_usbd_epin_dma_handler(ep);
+ }
+ else
+ {
+ nrf_usbd_ep0in_dma_handler();
+ }
+ }
+
if (0 == (m_ep_dma_waiting & (1U << bitpos)))
{
NRFX_LOG_DEBUG("USBD event: EndpointData: In finished");
@@ -1199,7 +1218,7 @@
}
m_last_setup_dir =
- ((bmRequestType & USBD_BMREQUESTTYPE_DIRECTION_Msk) ==
+ ((bmRequestType & USBD_BMREQUESTTYPE_DIRECTION_Msk) ==
(USBD_BMREQUESTTYPE_DIRECTION_HostToDevice << USBD_BMREQUESTTYPE_DIRECTION_Pos)) ?
NRFX_USBD_EPOUT0 : NRFX_USBD_EPIN0;
@@ -1466,7 +1485,8 @@
/* There is a lot of USBD registers that cannot be accessed during EasyDMA transfer.
* This is quick fix to maintain stability of the stack.
* It cost some performance but makes stack stable. */
- while (!nrf_usbd_event_check(nrfx_usbd_ep_to_endevent(ep)))
+ while (!nrf_usbd_event_check(nrfx_usbd_ep_to_endevent(ep)) &&
+ !nrf_usbd_event_check(NRF_USBD_EVENT_USBRESET))
{
/* Empty */
}
@@ -1725,7 +1745,7 @@
}
NRFX_CRITICAL_SECTION_EXIT();
}
-
+
if (nrfx_usbd_errata_171())
{
NRFX_CRITICAL_SECTION_ENTER();
@@ -1750,7 +1770,7 @@
/* Empty loop */
}
nrf_usbd_eventcause_clear(NRF_USBD_EVENTCAUSE_READY_MASK);
-
+
if (nrfx_usbd_errata_171())
{
NRFX_CRITICAL_SECTION_ENTER();
@@ -1979,7 +1999,9 @@
void nrfx_usbd_ep_max_packet_size_set(nrfx_usbd_ep_t ep, uint16_t size)
{
/* Only power of 2 size allowed */
- NRFX_ASSERT((size != 0) && (size & (size - 1)) == 0);
+ NRFX_ASSERT((size & 0x01) == 0);
+ /* 0 allowed only for ISO endpoints */
+ NRFX_ASSERT((size != 0) || NRF_USBD_EPISO_CHECK(ep));
/* Packet size cannot be higher than maximum buffer size */
NRFX_ASSERT((NRF_USBD_EPISO_CHECK(ep) && (size <= usbd_ep_iso_capacity(ep))) ||
(!NRF_USBD_EPISO_CHECK(ep) && (size <= NRFX_USBD_EPSIZE)));
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_usbd_errata.h b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_usbd_errata.h
index fb21852..c50d9de 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_usbd_errata.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_usbd_errata.h
@@ -45,69 +45,104 @@
static inline bool nrfx_usbd_errata_type_52840(void)
{
- return (*(uint32_t *)0x10000130UL == 0x8UL);
+ return (*(uint32_t const *)0x10000130UL == 0x8UL);
}
-static inline bool nrfx_usbd_errata_type_52840_eng_a(void)
+static inline bool nrfx_usbd_errata_type_52840_eng_a_or_later(void)
{
return nrfx_usbd_errata_type_52840();
}
-static inline bool nrfx_usbd_errata_type_52840_eng_b(void)
+static inline bool nrfx_usbd_errata_type_52840_eng_b_or_later(void)
{
- return (nrfx_usbd_errata_type_52840() && (*(uint32_t *)0x10000134UL >= 0x1UL));
+ return (nrfx_usbd_errata_type_52840() && (*(uint32_t const *)0x10000134UL >= 0x1UL));
}
-static inline bool nrfx_usbd_errata_type_52840_eng_c(void)
+static inline bool nrfx_usbd_errata_type_52840_eng_c_or_later(void)
{
- return (nrfx_usbd_errata_type_52840() && (*(uint32_t *)0x10000134UL >= 0x2UL));
+ return (nrfx_usbd_errata_type_52840() && (*(uint32_t const *)0x10000134UL >= 0x2UL));
}
-static inline bool nrfx_usbd_errata_type_52840_eng_d(void)
+static inline bool nrfx_usbd_errata_type_52840_eng_d_or_later(void)
{
- return (nrfx_usbd_errata_type_52840() && (*(uint32_t *)0x10000134UL >= 0x3UL));
+ return (nrfx_usbd_errata_type_52840() && (*(uint32_t const *)0x10000134UL >= 0x3UL));
}
-/* Errata: USBD: EPDATA event is not always generated. */
+static inline bool nrfx_usbd_errata_type_52833(void)
+{
+ return (*(uint32_t const *)0x10000130UL == 0x0DUL);
+}
+
+static inline bool nrfx_usbd_errata_type_52833_eng_a_or_later(void)
+{
+ return nrfx_usbd_errata_type_52833();
+}
+
+/* Errata: USBD: EPDATA event is not always generated.
+ *
+ * Applies to nRF52840 Engineering A.
+ **/
static inline bool nrfx_usbd_errata_104(void)
{
- return (NRFX_USBD_ERRATA_ENABLE && (!nrfx_usbd_errata_type_52840_eng_b()));
+ return (NRFX_USBD_ERRATA_ENABLE && (nrfx_usbd_errata_type_52840()
+ && !nrfx_usbd_errata_type_52840_eng_b_or_later()));
}
-/* Errata: During setup read/write transfer USBD acknowledges setup stage without SETUP task. */
+/* Errata: During setup read/write transfer USBD acknowledges setup stage without SETUP task.
+ *
+ * Applies to nRF52840 Engineering A.
+ **/
static inline bool nrfx_usbd_errata_154(void)
{
- return (NRFX_USBD_ERRATA_ENABLE && (!nrfx_usbd_errata_type_52840_eng_b()));
+ return (NRFX_USBD_ERRATA_ENABLE && (nrfx_usbd_errata_type_52840()
+ && !nrfx_usbd_errata_type_52840_eng_b_or_later()));
}
-/* Errata: ISO double buffering not functional. */
+/* Errata: ISO double buffering not functional.
+ *
+ * Applies to nRF52840.
+ **/
static inline bool nrfx_usbd_errata_166(void)
{
- return (NRFX_USBD_ERRATA_ENABLE && true);
+ return (NRFX_USBD_ERRATA_ENABLE && nrfx_usbd_errata_type_52840());
}
-/* Errata: USBD might not reach its active state. */
+/* Errata: USBD might not reach its active state.
+ *
+ * Applies to nRF52840.
+ **/
static inline bool nrfx_usbd_errata_171(void)
{
- return (NRFX_USBD_ERRATA_ENABLE && true);
+ return (NRFX_USBD_ERRATA_ENABLE && nrfx_usbd_errata_type_52840());
}
-/* Errata: USB cannot be enabled. */
+/* Errata: USB cannot be enabled.
+ *
+ * Applies to nRF52840 Engineering B or later and nRF52833.
+ **/
static inline bool nrfx_usbd_errata_187(void)
{
- return (NRFX_USBD_ERRATA_ENABLE && nrfx_usbd_errata_type_52840_eng_b());
+ return (NRFX_USBD_ERRATA_ENABLE && (nrfx_usbd_errata_type_52840_eng_b_or_later()
+ || nrfx_usbd_errata_type_52833()));
}
-/* Errata: USBD cannot receive tasks during DMA. */
+/* Errata: USBD cannot receive tasks during DMA.
+ *
+ * Applies to nRF52840.
+ **/
static inline bool nrfx_usbd_errata_199(void)
{
- return (NRFX_USBD_ERRATA_ENABLE && true);
+ return (NRFX_USBD_ERRATA_ENABLE && nrfx_usbd_errata_type_52840());
}
-/* Errata: SIZE.EPOUT not writable. */
+/* Errata: SIZE.EPOUT not writable.
+ *
+ * Applies to nRF52840 Engineering A.
+ **/
static inline bool nrfx_usbd_errata_200(void)
{
- return (NRFX_USBD_ERRATA_ENABLE && (!nrfx_usbd_errata_type_52840_eng_b()));
+ return (NRFX_USBD_ERRATA_ENABLE && (nrfx_usbd_errata_type_52840()
+ && !nrfx_usbd_errata_type_52840_eng_b_or_later()));
}
#endif // NRFX_USBD_ERRATA_H__
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_wdt.c b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_wdt.c
index feb9a3c..ffd85b7 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_wdt.c
+++ b/third_party/NordicSemiconductor/nrfx/drivers/src/nrfx_wdt.c
@@ -87,7 +87,10 @@
nrf_wdt_behaviour_set(p_config->behaviour);
- nrf_wdt_reload_value_set((p_config->reload_value * 32768) / 1000);
+ uint64_t ticks = (p_config->reload_value * 32768ULL) / 1000;
+ NRFX_ASSERT(ticks <= UINT32_MAX);
+
+ nrf_wdt_reload_value_set((uint32_t) ticks);
#if !NRFX_CHECK(NRFX_WDT_CONFIG_NO_IRQ)
NRFX_IRQ_PRIORITY_SET(WDT_IRQn, p_config->interrupt_priority);
diff --git a/third_party/NordicSemiconductor/nrfx/drivers/src/prs/nrfx_prs.h b/third_party/NordicSemiconductor/nrfx/drivers/src/prs/nrfx_prs.h
index 33003c8..5641f71 100644
--- a/third_party/NordicSemiconductor/nrfx/drivers/src/prs/nrfx_prs.h
+++ b/third_party/NordicSemiconductor/nrfx/drivers/src/prs/nrfx_prs.h
@@ -65,18 +65,8 @@
#define NRFX_PRS_BOX_1_ADDR NRF_SPIM0
// UART0, UARTE0
#define NRFX_PRS_BOX_2_ADDR NRF_UART0
-#elif defined(NRF52832_XXAA) || defined (NRF52832_XXAB)
- // SPIM0, SPIS0, TWIM0, TWIS0, SPI0, TWI0
- #define NRFX_PRS_BOX_0_ADDR NRF_SPIM0
- // SPIM1, SPIS1, TWIM1, TWIS1, SPI1, TWI1
- #define NRFX_PRS_BOX_1_ADDR NRF_SPIM1
- // SPIM2, SPIS2, SPI2
- #define NRFX_PRS_BOX_2_ADDR NRF_SPIM2
- // COMP, LPCOMP
- #define NRFX_PRS_BOX_3_ADDR NRF_COMP
- // UARTE0, UART0
- #define NRFX_PRS_BOX_4_ADDR NRF_UARTE0
-#elif defined(NRF52840_XXAA)
+#elif defined(NRF52832_XXAA) || defined(NRF52832_XXAB) || \
+ defined(NRF52833_XXAA) || defined(NRF52840_XXAA)
// SPIM0, SPIS0, TWIM0, TWIS0, SPI0, TWI0
#define NRFX_PRS_BOX_0_ADDR NRF_SPIM0
// SPIM1, SPIS1, TWIM1, TWIS1, SPI1, TWI1
@@ -133,6 +123,7 @@
*/
void nrfx_prs_release(void const * p_base_addr);
+/** @} */
void nrfx_prs_box_0_irq_handler(void);
void nrfx_prs_box_1_irq_handler(void);
@@ -140,7 +131,6 @@
void nrfx_prs_box_3_irq_handler(void);
void nrfx_prs_box_4_irq_handler(void);
-/** @} */
#ifdef __cplusplus
}
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_aar.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_aar.h
new file mode 100644
index 0000000..3c2af2c
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_aar.h
@@ -0,0 +1,376 @@
+/*
+ * Copyright (c) 2019, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef NRF_AAR_H__
+#define NRF_AAR_H__
+
+#include <nrfx.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup nrf_aar_hal AAR HAL
+ * @{
+ * @ingroup nrf_aar
+ * @brief Hardware access layer for managing the Accelerated Address Resolver (AAR) peripheral.
+ */
+
+/** @brief AAR events. */
+typedef enum
+{
+ NRF_AAR_EVENT_END = offsetof(NRF_AAR_Type, EVENTS_END), ///< Address resolution procedure complete.
+ NRF_AAR_EVENT_RESOLVED = offsetof(NRF_AAR_Type, EVENTS_RESOLVED), ///< Address resolved.
+ NRF_AAR_EVENT_NOTRESOLVED = offsetof(NRF_AAR_Type, EVENTS_NOTRESOLVED), ///< Address not resolved.
+} nrf_aar_event_t;
+
+/** @brief AAR interrupts. */
+typedef enum
+{
+ NRF_AAR_INT_END_MASK = AAR_INTENSET_END_Msk, ///< Interrupt on END event.
+ NRF_AAR_INT_RESOLVED_MASK = AAR_INTENSET_RESOLVED_Msk, ///< Interrupt on RESOLVED event.
+ NRF_AAR_INT_NOTRESOLVED_MASK = AAR_INTENSET_NOTRESOLVED_Msk, ///< Interrupt on NOTRESOLVED event.
+} nrf_aar_int_mask_t;
+
+/** @brief AAR tasks. */
+typedef enum
+{
+ NRF_AAR_TASK_START = offsetof(NRF_AAR_Type, TASKS_START), ///< Start address resolution procedure.
+ NRF_AAR_TASK_STOP = offsetof(NRF_AAR_Type, TASKS_STOP), ///< Stop address resolution procedure.
+} nrf_aar_task_t;
+
+/**
+ * @brief Function for retrieving the state of the AAR event.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to be checked.
+ *
+ * @retval true Event is set.
+ * @retval false Event is not set.
+ */
+__STATIC_INLINE bool nrf_aar_event_check(NRF_AAR_Type const * p_reg,
+ nrf_aar_event_t event);
+
+/**
+ * @brief Function for clearing the specified AAR event.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to be cleared.
+ */
+__STATIC_INLINE void nrf_aar_event_clear(NRF_AAR_Type * p_reg,
+ nrf_aar_event_t event);
+
+/**
+ * @brief Function for getting the address of the specified AAR event register.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to get the address of.
+ *
+ * @return Address of the specified event register.
+ */
+__STATIC_INLINE uint32_t nrf_aar_event_address_get(NRF_AAR_Type const * p_reg,
+ nrf_aar_event_t event);
+
+/**
+ * @brief Function for enabling the specified interrupts.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of interrupts to be enabled.
+ */
+__STATIC_INLINE void nrf_aar_int_enable(NRF_AAR_Type * p_reg, uint32_t mask);
+
+/**
+ * @brief Function for retrieving the state of the specified interrupt.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of the interrupt to be checked.
+ *
+ * @retval true Interrupt is enabled.
+ * @retval false Interrupt is not enabled.
+ */
+__STATIC_INLINE bool nrf_aar_int_enable_check(NRF_AAR_Type const * p_reg,
+ nrf_aar_int_mask_t mask);
+
+/**
+ * @brief Function for disabling the specified interrupts.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of interrupts to be disabled.
+ */
+__STATIC_INLINE void nrf_aar_int_disable(NRF_AAR_Type * p_reg, uint32_t mask);
+
+/**
+ * @brief Function for starting an AAR task.
+ *
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param task Task to be activated.
+ */
+__STATIC_INLINE void nrf_aar_task_trigger(NRF_AAR_Type * p_reg, nrf_aar_task_t task);
+
+/**
+ * @brief Function for getting the address of a specific AAR task register.
+ *
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param task Requested AAR task.
+ *
+ * @return Address of the specified task register.
+ */
+__STATIC_INLINE uint32_t nrf_aar_task_address_get(NRF_AAR_Type const * p_reg,
+ nrf_aar_task_t task);
+
+/**
+ * @brief Function for enabling AAR.
+ *
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ */
+__STATIC_INLINE void nrf_aar_enable(NRF_AAR_Type * p_reg);
+
+/**
+ * @brief Function for disabling AAR.
+ *
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ */
+__STATIC_INLINE void nrf_aar_disable(NRF_AAR_Type * p_reg);
+
+/**
+ * @brief Function for setting the pointer to the Identity Resolving Keys (IRK) data structure.
+ *
+ * The size of the provided data structure must correspond to the number of keys available.
+ * Each key occupies 16 bytes.
+ *
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param irk_ptr Pointer to the IRK data structure. Must point to the Data RAM region.
+ *
+ * @sa nrf_aar_irk_number_set
+ */
+__STATIC_INLINE void nrf_aar_irk_pointer_set(NRF_AAR_Type * p_reg, uint8_t const * irk_ptr);
+
+/**
+ * @brief Function for getting the pointer to the Identity Resolving Keys
+ * data structure.
+ *
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @return Pointer to the IRK data structure.
+ */
+__STATIC_INLINE uint8_t const * nrf_aar_irk_pointer_get(NRF_AAR_Type const * p_reg);
+
+/**
+ * @brief Function for setting the number of keys available in the Identity Resolving Keys
+ * data structure.
+ *
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param irk_num Number of keys available in the IRK data structure. Maximum is 16.
+ * Must correspond to the size of the provided IRK data structure.
+ *
+ * @sa nrf_aar_irk_pointer_set
+ */
+__STATIC_INLINE void nrf_aar_irk_number_set(NRF_AAR_Type * p_reg, uint8_t irk_num);
+
+/**
+ * @brief Function for getting the number of keys available in the Identity Resolving Keys
+ * data structure.
+ *
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @return Number of keys in the IRK data structure.
+ */
+__STATIC_INLINE uint8_t nrf_aar_irk_number_get(NRF_AAR_Type const * p_reg);
+
+/**
+ * @brief Function for setting the pointer to the resolvable address.
+ *
+ * The resolvable address must consist of 6 bytes.
+ *
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param addr_ptr Pointer to the address to resolve using the available IRK keys.
+ * Must point to the Data RAM region.
+ */
+__STATIC_INLINE void nrf_aar_addr_pointer_set(NRF_AAR_Type * p_reg, uint8_t const * addr_ptr);
+
+/**
+ * @brief Function for getting the pointer to the resolvable address.
+ *
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @return Pointer to the address to resolve.
+ */
+__STATIC_INLINE uint8_t const * nrf_aar_addr_pointer_get(NRF_AAR_Type const * p_reg);
+
+/**
+ * @brief Function for setting the pointer to the scratch data area.
+ *
+ * The scratch data area is used for temporary storage during the address resolution procedure.
+ * A space of minimum 3 bytes must be reserved for the scratch data area.
+ *
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param scratch_ptr Pointer to the scratch data area. Must point to the Data RAM region.
+ */
+__STATIC_INLINE void nrf_aar_scratch_pointer_set(NRF_AAR_Type * p_reg, uint8_t * scratch_ptr);
+
+/**
+ * @brief Function for getting the pointer to the scratch data area.
+ *
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @return Pointer to the scratch data area.
+ */
+__STATIC_INLINE uint8_t * nrf_aar_scratch_pointer_get(NRF_AAR_Type const * p_reg);
+
+/**
+ * @brief Function for getting the index of the Identity Resolving Key that was used
+ * the last time an address was resolved.
+ *
+ * This function can be used to get the IRK index that matched the resolvable address,
+ * provided that @ref NRF_AAR_EVENT_RESOLVED occured. Otherwise, it will return
+ * the index of the last IRK stored in the IRK data structure.
+ *
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @return The index of the IRK that was used the last time an address was resolved.
+ */
+__STATIC_INLINE uint8_t nrf_aar_resolution_status_get(NRF_AAR_Type const * p_reg);
+
+#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+__STATIC_INLINE bool nrf_aar_event_check(NRF_AAR_Type const * p_reg,
+ nrf_aar_event_t aar_event)
+{
+ return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)aar_event);
+}
+
+__STATIC_INLINE void nrf_aar_event_clear(NRF_AAR_Type * p_reg,
+ nrf_aar_event_t aar_event)
+{
+ *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)aar_event)) = 0;
+#if __CORTEX_M == 0x04
+ volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)aar_event));
+ (void)dummy;
+#endif
+}
+
+__STATIC_INLINE uint32_t nrf_aar_event_address_get(NRF_AAR_Type const * p_reg,
+ nrf_aar_event_t aar_event)
+{
+ return (uint32_t)((uint8_t *)p_reg + (uint32_t)aar_event);
+}
+
+__STATIC_INLINE void nrf_aar_int_enable(NRF_AAR_Type * p_reg, uint32_t mask)
+{
+ p_reg->INTENSET = mask;
+}
+
+__STATIC_INLINE bool nrf_aar_int_enable_check(NRF_AAR_Type const * p_reg,
+ nrf_aar_int_mask_t mask)
+{
+ return (bool)(p_reg->INTENSET & mask);
+}
+
+__STATIC_INLINE void nrf_aar_int_disable(NRF_AAR_Type * p_reg, uint32_t mask)
+{
+ p_reg->INTENCLR = mask;
+}
+
+__STATIC_INLINE void nrf_aar_task_trigger(NRF_AAR_Type * p_reg, nrf_aar_task_t task)
+{
+ *(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task) = 1;
+}
+
+__STATIC_INLINE uint32_t nrf_aar_task_address_get(NRF_AAR_Type const * p_reg,
+ nrf_aar_task_t task)
+{
+ return (uint32_t)((uint8_t *)p_reg + (uint32_t)task);
+}
+
+__STATIC_INLINE void nrf_aar_enable(NRF_AAR_Type * p_reg)
+{
+ p_reg->ENABLE = AAR_ENABLE_ENABLE_Enabled << AAR_ENABLE_ENABLE_Pos;
+}
+
+__STATIC_INLINE void nrf_aar_disable(NRF_AAR_Type * p_reg)
+{
+ p_reg->ENABLE = AAR_ENABLE_ENABLE_Disabled << AAR_ENABLE_ENABLE_Pos;
+}
+
+__STATIC_INLINE void nrf_aar_irk_pointer_set(NRF_AAR_Type * p_reg, uint8_t const * irk_ptr)
+{
+ p_reg->IRKPTR = (uint32_t)irk_ptr;
+}
+
+__STATIC_INLINE uint8_t const * nrf_aar_irk_pointer_get(NRF_AAR_Type const * p_reg)
+{
+ return (uint8_t const *)(p_reg->IRKPTR);
+}
+
+__STATIC_INLINE void nrf_aar_irk_number_set(NRF_AAR_Type * p_reg, uint8_t irk_num)
+{
+ p_reg->NIRK = irk_num;
+}
+
+__STATIC_INLINE uint8_t nrf_aar_irk_number_get(NRF_AAR_Type const * p_reg)
+{
+ return (uint8_t)(p_reg->NIRK);
+}
+
+__STATIC_INLINE void nrf_aar_addr_pointer_set(NRF_AAR_Type * p_reg, uint8_t const * addr_ptr)
+{
+ p_reg->ADDRPTR = (uint32_t)addr_ptr;
+}
+
+__STATIC_INLINE uint8_t const * nrf_aar_addr_pointer_get(NRF_AAR_Type const * p_reg)
+{
+ return (uint8_t const *)(p_reg->ADDRPTR);
+}
+
+__STATIC_INLINE void nrf_aar_scratch_pointer_set(NRF_AAR_Type * p_reg, uint8_t * scratch_ptr)
+{
+ p_reg->SCRATCHPTR = (uint32_t)scratch_ptr;
+}
+
+__STATIC_INLINE uint8_t * nrf_aar_scratch_pointer_get(NRF_AAR_Type const * p_reg)
+{
+ return (uint8_t *)(p_reg->SCRATCHPTR);
+}
+
+__STATIC_INLINE uint8_t nrf_aar_resolution_status_get(NRF_AAR_Type const * p_reg)
+{
+ return (uint8_t)(p_reg->STATUS);
+}
+
+#endif // SUPPRESS_INLINE_IMPLEMENTATION
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // NRF_AAR_H__
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_acl.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_acl.h
index 3c29724..ca15b54 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_acl.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_acl.h
@@ -38,6 +38,8 @@
extern "C" {
#endif
+#define NRF_ACL_REGION_SIZE_MAX (512 * 1024UL)
+
/**
* @defgroup nrf_acl_hal ACL HAL
* @{
@@ -45,8 +47,6 @@
* @brief Hardware access layer for managing the Access Control List (ACL) peripheral.
*/
-#define NRF_ACL_REGION_SIZE_MAX (512 * 1024UL)
-
/** @brief ACL permissions. */
typedef enum
{
@@ -56,11 +56,11 @@
} nrf_acl_perm_t;
/**
- * @brief Function for setting region parameters for given ACL region.
+ * @brief Function for setting region parameters for given ACL region.
*
* Address must be word and page aligned. Size must be page aligned.
*
- * @param[in] p_reg Pointer to the peripheral register structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] region_id ACL region index.
* @param[in] address Start address.
* @param[in] size Size of region to protect in bytes.
@@ -75,7 +75,7 @@
/**
* @brief Function for getting the configured region address of a specific ACL region.
*
- * @param[in] p_reg Pointer to the peripheral register structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] region_id ACL region index.
*
* @return Configured region address of given ACL region.
@@ -85,7 +85,7 @@
/**
* @brief Function for getting the configured region size of a specific ACL region.
*
- * @param[in] p_reg Pointer to the peripheral register structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] region_id ACL region index.
*
* @return Configured region size of given ACL region.
@@ -95,7 +95,7 @@
/**
* @brief Function for getting the configured region permissions of a specific ACL region.
*
- * @param[in] p_reg Pointer to the peripheral register structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] region_id ACL region index.
*
* @return Configured region permissions of given ACL region.
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_adc.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_adc.h
index eb3e1a8..3e60483 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_adc.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_adc.h
@@ -72,9 +72,7 @@
} nrf_adc_config_scaling_t;
-/**
- * @brief External reference selection of the analog-to-digital converter.
- */
+/** @brief External reference selection of the analog-to-digital converter. */
typedef enum
{
NRF_ADC_CONFIG_EXTREFSEL_NONE = ADC_CONFIG_EXTREFSEL_None, /**< Analog reference inputs disabled. */
@@ -82,15 +80,13 @@
NRF_ADC_CONFIG_EXTREFSEL_AREF1 = ADC_CONFIG_EXTREFSEL_AnalogReference1 /**< AREF1 as analog reference. */
} nrf_adc_config_extref_t;
-/**
- * @brief Reference selection of the analog-to-digital converter.
- */
+/** @brief Reference selection of the analog-to-digital converter. */
typedef enum
{
NRF_ADC_CONFIG_REF_VBG = ADC_CONFIG_REFSEL_VBG, /**< 1.2 V reference. */
NRF_ADC_CONFIG_REF_SUPPLY_ONE_HALF = ADC_CONFIG_REFSEL_SupplyOneHalfPrescaling, /**< 1/2 of power supply. */
NRF_ADC_CONFIG_REF_SUPPLY_ONE_THIRD = ADC_CONFIG_REFSEL_SupplyOneThirdPrescaling, /**< 1/3 of power supply. */
- NRF_ADC_CONFIG_REF_EXT = ADC_CONFIG_REFSEL_External /**< External reference. See @ref nrf_adc_config_extref_t for further configuration.*/
+ NRF_ADC_CONFIG_REF_EXT = ADC_CONFIG_REFSEL_External /**< External reference. See @ref nrf_adc_config_extref_t for further configuration. */
} nrf_adc_config_reference_t;
/** @brief Input selection of the analog-to-digital converter. */
@@ -110,21 +106,17 @@
/** @brief Analog-to-digital converter tasks. */
typedef enum
{
- /*lint -save -e30*/
NRF_ADC_TASK_START = offsetof(NRF_ADC_Type, TASKS_START), /**< ADC start sampling task. */
NRF_ADC_TASK_STOP = offsetof(NRF_ADC_Type, TASKS_STOP) /**< ADC stop sampling task. */
- /*lint -restore*/
} nrf_adc_task_t;
/** @brief Analog-to-digital converter events. */
-typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
+typedef enum
{
- /*lint -save -e30*/
NRF_ADC_EVENT_END = offsetof(NRF_ADC_Type, EVENTS_END) /**< End of a conversion event. */
- /*lint -restore*/
} nrf_adc_event_t;
-/**@brief Analog-to-digital converter configuration. */
+/** @brief Analog-to-digital converter configuration. */
typedef struct
{
nrf_adc_config_resolution_t resolution; /**< ADC resolution. */
@@ -134,13 +126,14 @@
nrf_adc_config_extref_t extref; /**< ADC external reference selection. */
} nrf_adc_config_t;
-/**@brief Analog-to-digital value type. */
+/** @brief Analog-to-digital value type. */
typedef uint16_t nrf_adc_value_t;
+
/**
- * @brief Function for activating a specific ADC task.
+ * @brief Function for activating the specified ADC task.
*
- * @param[in] task Task to activate.
+ * @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_adc_task_trigger(nrf_adc_task_t task);
@@ -154,12 +147,12 @@
__STATIC_INLINE uint32_t nrf_adc_task_address_get(nrf_adc_task_t task);
/**
- * @brief Function for checking the state of an ADC event.
+ * @brief Function for retrieving the state of an ADC event.
*
- * @param[in] event Event to check.
+ * @param[in] event Event to be checked.
*
- * @retval true If the event is set.
- * @retval false If the event is not set.
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_adc_event_check(nrf_adc_event_t event);
@@ -171,7 +164,7 @@
__STATIC_INLINE void nrf_adc_event_clear(nrf_adc_event_t event);
/**
- * @brief Function for getting the address of a specific ADC event register.
+ * @brief Function for getting the address of the specified ADC event register.
*
* @param[in] adc_event ADC event.
*
@@ -182,54 +175,48 @@
/**
* @brief Function for enabling the specified interrupts.
*
- * @param[in] int_mask Interrupts to enable.
+ * @param[in] mask Mask of interrupts to be enabled.
*/
-__STATIC_INLINE void nrf_adc_int_enable(uint32_t int_mask);
+__STATIC_INLINE void nrf_adc_int_enable(uint32_t mask);
/**
* @brief Function for disabling the specified interrupts.
*
- * @param[in] int_mask Interrupts to disable.
+ * @param[in] mask Mask of interrupts to be disabled.
*/
-__STATIC_INLINE void nrf_adc_int_disable(uint32_t int_mask);
+__STATIC_INLINE void nrf_adc_int_disable(uint32_t mask);
/**
* @brief Function for retrieving the state of the specified ADC interrupts.
*
- * @param[in] int_mask Interrupts to check.
+ * @param[in] mask Mask of interrupts to be checked.
*
- * @retval true If all specified interrupts are enabled.
- * @retval false If at least one of the given interrupts is not enabled.
+ * @retval true All specified interrupts are enabled.
+ * @retval false At least one of the given interrupts is not enabled.
*/
-__STATIC_INLINE bool nrf_adc_int_enable_check(uint32_t int_mask);
+__STATIC_INLINE bool nrf_adc_int_enable_check(uint32_t mask);
/**
* @brief Function for checking whether the ADC is busy.
*
* This function checks whether the ADC converter is busy with a conversion.
*
- * @retval true If the ADC is busy.
- * @retval false If the ADC is not busy.
+ * @retval true The ADC is busy.
+ * @retval false The ADC is not busy.
*/
__STATIC_INLINE bool nrf_adc_busy_check(void);
-/**
- * @brief Function for enabling the ADC.
- *
- */
+/** @brief Function for enabling the ADC. */
__STATIC_INLINE void nrf_adc_enable(void);
-/**
- * @brief Function for disabling the ADC.
- *
- */
+/** @brief Function for disabling the ADC. */
__STATIC_INLINE void nrf_adc_disable(void);
/**
* @brief Function for checking if the ADC is enabled.
*
- * @retval true If the ADC is enabled.
- * @retval false If the ADC is not enabled.
+ * @retval true The ADC is enabled.
+ * @retval false The ADC is not enabled.
*/
__STATIC_INLINE bool nrf_adc_enable_check(void);
@@ -252,6 +239,7 @@
*/
__STATIC_INLINE void nrf_adc_init(nrf_adc_config_t const * p_config);
+
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE void nrf_adc_task_trigger(nrf_adc_task_t task)
@@ -279,19 +267,19 @@
return (uint32_t)((uint8_t *)NRF_ADC + (uint32_t)adc_event);
}
-__STATIC_INLINE void nrf_adc_int_enable(uint32_t int_mask)
+__STATIC_INLINE void nrf_adc_int_enable(uint32_t mask)
{
- NRF_ADC->INTENSET = int_mask;
+ NRF_ADC->INTENSET = mask;
}
-__STATIC_INLINE void nrf_adc_int_disable(uint32_t int_mask)
+__STATIC_INLINE void nrf_adc_int_disable(uint32_t mask)
{
- NRF_ADC->INTENCLR = int_mask;
+ NRF_ADC->INTENCLR = mask;
}
-__STATIC_INLINE bool nrf_adc_int_enable_check(uint32_t int_mask)
+__STATIC_INLINE bool nrf_adc_int_enable_check(uint32_t mask)
{
- return (bool)(NRF_ADC->INTENSET & int_mask);
+ return (bool)(NRF_ADC->INTENSET & mask);
}
__STATIC_INLINE bool nrf_adc_busy_check(void)
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_ccm.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_ccm.h
index 0583ac7..560ced2 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_ccm.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_ccm.h
@@ -45,36 +45,26 @@
* @brief Hardware access layer for managing the AES CCM peripheral.
*/
-/**
- * @brief CCM tasks.
- */
+/** @brief CCM tasks. */
typedef enum
{
- /*lint -save -e30*/
NRF_CCM_TASK_KSGEN = offsetof(NRF_CCM_Type, TASKS_KSGEN), ///< Start generation of key-stream.
NRF_CCM_TASK_CRYPT = offsetof(NRF_CCM_Type, TASKS_CRYPT), ///< Start encryption/decryption.
NRF_CCM_TASK_STOP = offsetof(NRF_CCM_Type, TASKS_STOP), ///< Stop encryption/decryption.
#if defined(CCM_RATEOVERRIDE_RATEOVERRIDE_Pos) || defined(__NRFX_DOXYGEN__)
NRF_CCM_TASK_RATEOVERRIDE = offsetof(NRF_CCM_Type, TASKS_RATEOVERRIDE), ///< Override DATARATE setting in MODE register.
#endif
- /*lint -restore*/
} nrf_ccm_task_t;
-/**
- * @brief CCM events.
- */
+/** @brief CCM events. */
typedef enum
{
- /*lint -save -e30*/
NRF_CCM_EVENT_ENDKSGEN = offsetof(NRF_CCM_Type, EVENTS_ENDKSGEN), ///< Keystream generation complete.
NRF_CCM_EVENT_ENDCRYPT = offsetof(NRF_CCM_Type, EVENTS_ENDCRYPT), ///< Encrypt/decrypt complete.
NRF_CCM_EVENT_ERROR = offsetof(NRF_CCM_Type, EVENTS_ERROR), ///< CCM error event.
- /*lint -restore*/
} nrf_ccm_event_t;
-/**
- * @brief CCM interrupts.
- */
+/** @brief CCM interrupts. */
typedef enum
{
NRF_CCM_INT_ENDKSGEN_MASK = CCM_INTENSET_ENDKSGEN_Msk, ///< Interrupt on ENDKSGEN event.
@@ -82,9 +72,7 @@
NRF_CCM_INT_ERROR_MASK = CCM_INTENSET_ERROR_Msk, ///< Interrupt on ERROR event.
} nrf_ccm_int_mask_t;
-/**
- * @brief CCM modes of operation.
- */
+/** @brief CCM modes of operation. */
typedef enum
{
NRF_CCM_MODE_ENCRYPTION = CCM_MODE_MODE_Encryption, ///< Encryption mode.
@@ -92,9 +80,7 @@
} nrf_ccm_mode_t;
#if defined(CCM_MODE_DATARATE_Pos) || defined(__NRFX_DOXYGEN__)
-/**
- * @brief CCM data rates.
- */
+/** @brief CCM data rates. */
typedef enum
{
NRF_CCM_DATARATE_1M = CCM_MODE_DATARATE_1Mbit, ///< 1 Mbps.
@@ -109,9 +95,7 @@
#endif // defined(CCM_MODE_DATARATE_Pos) || defined(__NRFX_DOXYGEN__)
#if defined(CCM_MODE_LENGTH_Pos) || defined(__NRFX_DOXYGEN__)
-/**
- * @brief CCM packet length options.
- */
+/** @brief CCM packet length options. */
typedef enum
{
NRF_CCM_LENGTH_DEFAULT = CCM_MODE_LENGTH_Default, ///< Default length.
@@ -119,24 +103,22 @@
} nrf_ccm_length_t;
#endif // defined(CCM_MODE_LENGTH_Pos) || defined(__NRFX_DOXYGEN__)
-/**
- * @brief CCM configuration.
- */
+/** @brief CCM configuration. */
typedef struct {
- nrf_ccm_mode_t mode;
+ nrf_ccm_mode_t mode; ///< Operation mode.
#if defined(CCM_MODE_DATARATE_Pos) || defined(__NRFX_DOXYGEN__)
- nrf_ccm_datarate_t datarate;
+ nrf_ccm_datarate_t datarate; ///< Data rate.
#endif
#if defined(CCM_MODE_LENGTH_Pos) || defined(__NRFX_DOXYGEN__)
- nrf_ccm_length_t length;
+ nrf_ccm_length_t length; ///< Lenght of the CCM packet.
#endif
} nrf_ccm_config_t;
/**
* @brief Function for activating a specific CCM task.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] task Task to activate.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_ccm_task_trigger(NRF_CCM_Type * p_reg,
nrf_ccm_task_t task);
@@ -144,7 +126,7 @@
/**
* @brief Function for getting the address of a specific CCM task register.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task Requested task.
*
* @return Address of the specified task register.
@@ -155,20 +137,20 @@
/**
* @brief Function for clearing a specific CCM event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to clear.
*/
__STATIC_INLINE void nrf_ccm_event_clear(NRF_CCM_Type * p_reg,
nrf_ccm_event_t event);
/**
- * @brief Function for checking the state of a specific CCM event.
+ * @brief Function for retrieving the state of a specific CCM event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] event Event to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to be checked.
*
- * @retval true If the event is set.
- * @retval false If the event is not set.
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_ccm_event_check(NRF_CCM_Type const * p_reg,
nrf_ccm_event_t event);
@@ -176,7 +158,7 @@
/**
* @brief Function for getting the address of a specific CCM event register.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Requested event.
*
* @return Address of the specified event register.
@@ -187,27 +169,27 @@
/**
* @brief Function for enabling specified interrupts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] mask Interrupts to enable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Interrupts to be enabled.
*/
__STATIC_INLINE void nrf_ccm_int_enable(NRF_CCM_Type * p_reg, uint32_t mask);
/**
* @brief Function for disabling specified interrupts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] mask Interrupts to disable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Interrupts to be disabled.
*/
__STATIC_INLINE void nrf_ccm_int_disable(NRF_CCM_Type * p_reg, uint32_t mask);
/**
* @brief Function for retrieving the state of a given interrupt.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] ccm_int Interrupt to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] ccm_int Interrupt to be checked.
*
- * @retval true If the interrupt is enabled.
- * @retval false If the interrupt is not enabled.
+ * @retval true The interrupt is enabled.
+ * @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_ccm_int_enable_check(NRF_CCM_Type const * p_reg,
nrf_ccm_int_mask_t ccm_int);
@@ -215,21 +197,21 @@
/**
* @brief Function for enabling the CCM peripheral.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_ccm_enable(NRF_CCM_Type * p_reg);
/**
* @brief Function for disabling the CCM peripheral.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_ccm_disable(NRF_CCM_Type * p_reg);
/**
* @brief Function for setting the CCM peripheral configuration.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_config Pointer to the structure with configuration to be set.
*/
__STATIC_INLINE void nrf_ccm_configure(NRF_CCM_Type * p_reg,
@@ -240,7 +222,7 @@
* @brief Function for setting the length of key-stream generated
* when the packet length is configured as extended.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] size Maximum length of the key-stream.
*/
__STATIC_INLINE void nrf_ccm_maxpacketsize_set(NRF_CCM_Type * p_reg,
@@ -250,10 +232,10 @@
/**
* @brief Function for getting the MIC check result.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
- * @retval true If the MIC check passed.
- * @retval false If the MIC check failed.
+ * @retval true The MIC check passed.
+ * @retval false The MIC check failed.
*/
__STATIC_INLINE bool nrf_ccm_micstatus_get(NRF_CCM_Type const * p_reg);
@@ -261,7 +243,7 @@
* @brief Function for setting the pointer to the data structure
* holding the AES key and the CCM NONCE vector.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_data Pointer to the data structure.
*/
__STATIC_INLINE void nrf_ccm_cnfptr_set(NRF_CCM_Type * p_reg,
@@ -271,7 +253,7 @@
* @brief Function for getting the pointer to the data structure
* holding the AES key and the CCM NONCE vector.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Pointer to the data structure.
*/
@@ -280,7 +262,7 @@
/**
* @brief Function for setting the input data pointer.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_data Input data pointer.
*/
__STATIC_INLINE void nrf_ccm_inptr_set(NRF_CCM_Type * p_reg,
@@ -289,7 +271,7 @@
/**
* @brief Function for getting the input data pointer.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Input data pointer.
*/
@@ -298,7 +280,7 @@
/**
* @brief Function for setting the output data pointer.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_data Output data pointer.
*/
__STATIC_INLINE void nrf_ccm_outptr_set(NRF_CCM_Type * p_reg,
@@ -307,7 +289,7 @@
/**
* @brief Function for getting the output data pointer.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Output data pointer.
*/
@@ -317,7 +299,7 @@
* @brief Function for setting the pointer to the scratch area used for
* temporary storage.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_area Pointer to the scratch area.
*/
__STATIC_INLINE void nrf_ccm_scratchptr_set(NRF_CCM_Type * p_reg,
@@ -326,7 +308,7 @@
/**
* @brief Function for getting the pointer to the scratch area.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Pointer to the scratch area.
*/
@@ -336,7 +318,7 @@
/**
* @brief Function for setting the data rate override value.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] datarate Override value to be applied when the RATEOVERRIDE task
* is triggered.
*/
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_clock.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_clock.h
index a694156..1c8eb6f 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_clock.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_clock.h
@@ -48,12 +48,7 @@
* (HFCLK) settings.
*/
-#define NRF_CLOCK_TASK_TRIGGER (1UL)
-#define NRF_CLOCK_EVENT_CLEAR (0UL)
-
-#if defined(NRF52810_XXAA) || \
- defined(NRF52832_XXAA) || defined(NRF52832_XXAB) || \
- defined(NRF52840_XXAA)
+#if defined(CLOCK_LFCLKSRC_BYPASS_Msk) && defined(CLOCK_LFCLKSRC_EXTERNAL_Msk)
// Enable support for external LFCLK sources. Read more in the Product Specification.
#define NRF_CLOCK_USE_EXTERNAL_LFCLK_SOURCES
#endif
@@ -107,9 +102,7 @@
#endif // defined(NRF_CLOCK_USE_EXTERNAL_LFCLK_SOURCES) || defined(__NRFX_DOXYGEN__)
} nrf_clock_lfclk_t;
-/**
- * @brief High-frequency clock sources.
- */
+/** @brief High-frequency clock sources. */
typedef enum
{
#if defined(CLOCK_HFCLKSTAT_SRC_RC) || defined(__NRFX_DOXYGEN__)
@@ -132,16 +125,18 @@
NRF_CLOCK_START_TASK_TRIGGERED = CLOCK_LFCLKRUN_STATUS_Triggered /**< Task LFCLKSTART/HFCLKSTART has been triggered. */
} nrf_clock_start_task_status_t;
-/**
- * @brief Interrupts.
- */
+/** @brief Interrupts. */
typedef enum
{
NRF_CLOCK_INT_HF_STARTED_MASK = CLOCK_INTENSET_HFCLKSTARTED_Msk, /**< Interrupt on HFCLKSTARTED event. */
NRF_CLOCK_INT_LF_STARTED_MASK = CLOCK_INTENSET_LFCLKSTARTED_Msk, /**< Interrupt on LFCLKSTARTED event. */
#if (NRF_CLOCK_HAS_CALIBRATION) || defined(__NRFX_DOXYGEN__)
NRF_CLOCK_INT_DONE_MASK = CLOCK_INTENSET_DONE_Msk, /**< Interrupt on DONE event. */
- NRF_CLOCK_INT_CTTO_MASK = CLOCK_INTENSET_CTTO_Msk /**< Interrupt on CTTO event. */
+ NRF_CLOCK_INT_CTTO_MASK = CLOCK_INTENSET_CTTO_Msk, /**< Interrupt on CTTO event. */
+#endif
+#if defined(CLOCK_INTENSET_CTSTARTED_Msk) || defined(__NRFX_DOXYGEN__)
+ NRF_CLOCK_INT_CTSTARTED_MASK = CLOCK_INTENSET_CTSTARTED_Msk, /**< Interrupt on CTSTARTED event. */
+ NRF_CLOCK_INT_CTSTOPPED_MASK = CLOCK_INTENSET_CTSTOPPED_Msk /**< Interrupt on CTSTOPPED event. */
#endif
} nrf_clock_int_mask_t;
@@ -151,7 +146,7 @@
* @details The NRF_CLOCK_TASK_LFCLKSTOP task cannot be set when the low-frequency clock is not running.
* The NRF_CLOCK_TASK_HFCLKSTOP task cannot be set when the high-frequency clock is not running.
*/
-typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
+typedef enum
{
NRF_CLOCK_TASK_HFCLKSTART = offsetof(NRF_CLOCK_Type, TASKS_HFCLKSTART), /**< Start HFCLK clock source.*/
NRF_CLOCK_TASK_HFCLKSTOP = offsetof(NRF_CLOCK_Type, TASKS_HFCLKSTOP), /**< Stop HFCLK clock source.*/
@@ -162,86 +157,88 @@
NRF_CLOCK_TASK_CTSTART = offsetof(NRF_CLOCK_Type, TASKS_CTSTART), /**< Start calibration timer.*/
NRF_CLOCK_TASK_CTSTOP = offsetof(NRF_CLOCK_Type, TASKS_CTSTOP) /**< Stop calibration timer.*/
#endif
-} nrf_clock_task_t; /*lint -restore */
+} nrf_clock_task_t;
-/**
- * @brief Events.
- */
-typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
+/** @brief Events. */
+typedef enum
{
NRF_CLOCK_EVENT_HFCLKSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_HFCLKSTARTED), /**< HFCLK oscillator started.*/
NRF_CLOCK_EVENT_LFCLKSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_LFCLKSTARTED), /**< LFCLK oscillator started.*/
#if (NRF_CLOCK_HAS_CALIBRATION) || defined(__NRFX_DOXYGEN__)
NRF_CLOCK_EVENT_DONE = offsetof(NRF_CLOCK_Type, EVENTS_DONE), /**< Calibration of LFCLK RC oscillator completed.*/
- NRF_CLOCK_EVENT_CTTO = offsetof(NRF_CLOCK_Type, EVENTS_CTTO) /**< Calibration timer time-out.*/
+ NRF_CLOCK_EVENT_CTTO = offsetof(NRF_CLOCK_Type, EVENTS_CTTO), /**< Calibration timer time-out.*/
#endif
-} nrf_clock_event_t; /*lint -restore */
+#if defined(CLOCK_INTENSET_CTSTARTED_Msk) || defined(__NRFX_DOXYGEN__)
+ NRF_CLOCK_EVENT_CTSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_CTSTARTED), /**< Calibration timer started.*/
+ NRF_CLOCK_EVENT_CTSTOPPED = offsetof(NRF_CLOCK_Type, EVENTS_CTSTOPPED) /**< Calibration timer stopped.*/
+#endif
+} nrf_clock_event_t;
/**
- * @brief Function for enabling a specific interrupt.
+ * @brief Function for enabling the specified interrupt.
*
* @param[in] int_mask Interrupt.
*/
__STATIC_INLINE void nrf_clock_int_enable(uint32_t int_mask);
/**
- * @brief Function for disabling a specific interrupt.
+ * @brief Function for disabling the specified interrupt.
*
* @param[in] int_mask Interrupt.
*/
__STATIC_INLINE void nrf_clock_int_disable(uint32_t int_mask);
/**
- * @brief Function for retrieving the state of a specific interrupt.
+ * @brief Function for retrieving the state of the specified interrupt.
*
* @param[in] int_mask Interrupt.
*
- * @retval true If the interrupt is enabled.
- * @retval false If the interrupt is not enabled.
+ * @retval true The interrupt is enabled.
+ * @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_clock_int_enable_check(nrf_clock_int_mask_t int_mask);
/**
- * @brief Function for retrieving the address of a specific task.
+ * @brief Function for retrieving the address of the specified task.
* @details This function can be used by the PPI module.
*
- * @param[in] task Task.
+ * @param[in] task CLOCK Task.
*
* @return Address of the requested task register.
*/
__STATIC_INLINE uint32_t nrf_clock_task_address_get(nrf_clock_task_t task);
/**
- * @brief Function for setting a specific task.
+ * @brief Function for setting the specified task.
*
- * @param[in] task Task.
+ * @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_clock_task_trigger(nrf_clock_task_t task);
/**
- * @brief Function for retrieving the address of a specific event.
+ * @brief Function for retrieving the address of the specified event.
* @details This function can be used by the PPI module.
*
- * @param[in] event Event.
+ * @param[in] event CLOCK Event.
*
- * @return Address of the requested event register.
+ * @return Address of the specified event register.
*/
__STATIC_INLINE uint32_t nrf_clock_event_address_get(nrf_clock_event_t event);
/**
- * @brief Function for clearing a specific event.
+ * @brief Function for clearing the specified event.
*
- * @param[in] event Event.
+ * @param[in] event Event to clear.
*/
__STATIC_INLINE void nrf_clock_event_clear(nrf_clock_event_t event);
/**
- * @brief Function for retrieving the state of a specific event.
+ * @brief Function for retrieving the state of the specified event.
*
- * @param[in] event Event.
+ * @param[in] event Event to be checked.
*
- * @retval true If the event is set.
- * @retval false If the event is not set.
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_clock_event_check(nrf_clock_event_t event);
@@ -256,11 +253,11 @@
/**
* @brief Function for retrieving the selected source for the low-frequency clock.
*
- * @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator
+ * @retval NRF_CLOCK_LFCLK_RC The internal 32 kHz RC oscillator
* is the selected source for the low-frequency clock.
- * @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator
+ * @retval NRF_CLOCK_LFCLK_Xtal An external 32 kHz crystal oscillator
* is the selected source for the low-frequency clock.
- * @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from
+ * @retval NRF_CLOCK_LFCLK_Synth The internal 32 kHz synthesizer from
* the HFCLK is the selected source for the low-frequency clock.
*/
__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_src_get(void);
@@ -268,11 +265,11 @@
/**
* @brief Function for retrieving the active source of the low-frequency clock.
*
- * @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator
+ * @retval NRF_CLOCK_LFCLK_RC The internal 32 kHz RC oscillator
* is the active source of the low-frequency clock.
- * @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator
+ * @retval NRF_CLOCK_LFCLK_Xtal An external 32 kHz crystal oscillator
* is the active source of the low-frequency clock.
- * @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from
+ * @retval NRF_CLOCK_LFCLK_Synth The internal 32 kHz synthesizer from
* the HFCLK is the active source of the low-frequency clock.
*/
__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_actv_src_get(void);
@@ -281,11 +278,11 @@
* @brief Function for retrieving the clock source for the LFCLK clock when
* the task LKCLKSTART is triggered.
*
- * @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator
+ * @retval NRF_CLOCK_LFCLK_RC The internal 32 kHz RC oscillator
* is running and generating the LFCLK clock.
- * @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator
+ * @retval NRF_CLOCK_LFCLK_Xtal An external 32 kHz crystal oscillator
* is running and generating the LFCLK clock.
- * @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from
+ * @retval NRF_CLOCK_LFCLK_Synth The internal 32 kHz synthesizer from
* the HFCLK is running and generating the LFCLK clock.
*/
__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_srccopy_get(void);
@@ -293,25 +290,25 @@
/**
* @brief Function for retrieving the state of the LFCLK clock.
*
- * @retval false If the LFCLK clock is not running.
- * @retval true If the LFCLK clock is running.
+ * @retval false The LFCLK clock is not running.
+ * @retval true The LFCLK clock is running.
*/
__STATIC_INLINE bool nrf_clock_lf_is_running(void);
/**
* @brief Function for retrieving the trigger status of the task LFCLKSTART.
*
- * @retval NRF_CLOCK_START_TASK_NOT_TRIGGERED If the task LFCLKSTART has not been triggered.
- * @retval NRF_CLOCK_START_TASK_TRIGGERED If the task LFCLKSTART has been triggered.
+ * @retval NRF_CLOCK_START_TASK_NOT_TRIGGERED The task LFCLKSTART has not been triggered.
+ * @retval NRF_CLOCK_START_TASK_TRIGGERED The task LFCLKSTART has been triggered.
*/
__STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_lf_start_task_status_get(void);
/**
* @brief Function for retrieving the active source of the high-frequency clock.
*
- * @retval NRF_CLOCK_HFCLK_LOW_ACCURACY If the internal RC oscillator is the active
+ * @retval NRF_CLOCK_HFCLK_LOW_ACCURACY The internal RC oscillator is the active
* source of the high-frequency clock.
- * @retval NRF_CLOCK_HFCLK_HIGH_ACCURACY If an external crystal oscillator is the active
+ * @retval NRF_CLOCK_HFCLK_HIGH_ACCURACY An external crystal oscillator is the active
* source of the high-frequency clock.
*/
__STATIC_INLINE nrf_clock_hfclk_t nrf_clock_hf_src_get(void);
@@ -321,16 +318,16 @@
*
* @param[in] clk_src Clock source to be checked.
*
- * @retval false If the HFCLK clock is not running.
- * @retval true If the HFCLK clock is running.
+ * @retval false The HFCLK clock is not running.
+ * @retval true The HFCLK clock is running.
*/
__STATIC_INLINE bool nrf_clock_hf_is_running(nrf_clock_hfclk_t clk_src);
/**
* @brief Function for retrieving the trigger status of the task HFCLKSTART.
*
- * @retval NRF_CLOCK_START_TASK_NOT_TRIGGERED If the task HFCLKSTART has not been triggered.
- * @retval NRF_CLOCK_START_TASK_TRIGGERED If the task HFCLKSTART has been triggered.
+ * @retval NRF_CLOCK_START_TASK_NOT_TRIGGERED The task HFCLKSTART has not been triggered.
+ * @retval NRF_CLOCK_START_TASK_TRIGGERED The task HFCLKSTART has been triggered.
*/
__STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_hf_start_task_status_get(void);
@@ -406,7 +403,7 @@
__STATIC_INLINE void nrf_clock_task_trigger(nrf_clock_task_t task)
{
- *((volatile uint32_t *)((uint8_t *)NRF_CLOCK + task)) = NRF_CLOCK_TASK_TRIGGER;
+ *((volatile uint32_t *)((uint8_t *)NRF_CLOCK + task)) = 0x1UL;
}
__STATIC_INLINE uint32_t nrf_clock_event_address_get(nrf_clock_event_t event)
@@ -416,7 +413,7 @@
__STATIC_INLINE void nrf_clock_event_clear(nrf_clock_event_t event)
{
- *((volatile uint32_t *)((uint8_t *)NRF_CLOCK + event)) = NRF_CLOCK_EVENT_CLEAR;
+ *((volatile uint32_t *)((uint8_t *)NRF_CLOCK + event)) = 0x0UL;
#if __CORTEX_M == 0x04
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_CLOCK + (uint32_t)event));
(void)dummy;
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_comp.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_comp.h
index f0725cf..6a7bc90 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_comp.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_comp.h
@@ -42,221 +42,174 @@
* @defgroup nrf_comp_hal COMP HAL
* @{
* @ingroup nrf_comp
- * @brief Hardware access layer for managing the Comparator (COMP) peripheral.
+ * @brief Hardware access layer (HAL) for managing the Comparator (COMP) peripheral.
*/
-/**
- * @enum nrf_comp_input_t
- * @brief COMP analog pin selection.
- */
+/** @brief COMP analog pin selection. */
typedef enum
{
- NRF_COMP_INPUT_0 = COMP_PSEL_PSEL_AnalogInput0, /*!< AIN0 selected as analog input. */
- NRF_COMP_INPUT_1 = COMP_PSEL_PSEL_AnalogInput1, /*!< AIN1 selected as analog input. */
- NRF_COMP_INPUT_2 = COMP_PSEL_PSEL_AnalogInput2, /*!< AIN2 selected as analog input. */
- NRF_COMP_INPUT_3 = COMP_PSEL_PSEL_AnalogInput3, /*!< AIN3 selected as analog input. */
- NRF_COMP_INPUT_4 = COMP_PSEL_PSEL_AnalogInput4, /*!< AIN4 selected as analog input. */
- NRF_COMP_INPUT_5 = COMP_PSEL_PSEL_AnalogInput5, /*!< AIN5 selected as analog input. */
- NRF_COMP_INPUT_6 = COMP_PSEL_PSEL_AnalogInput6, /*!< AIN6 selected as analog input. */
+ NRF_COMP_INPUT_0 = COMP_PSEL_PSEL_AnalogInput0, /*!< AIN0 selected as analog input. */
+ NRF_COMP_INPUT_1 = COMP_PSEL_PSEL_AnalogInput1, /*!< AIN1 selected as analog input. */
+ NRF_COMP_INPUT_2 = COMP_PSEL_PSEL_AnalogInput2, /*!< AIN2 selected as analog input. */
+ NRF_COMP_INPUT_3 = COMP_PSEL_PSEL_AnalogInput3, /*!< AIN3 selected as analog input. */
+ NRF_COMP_INPUT_4 = COMP_PSEL_PSEL_AnalogInput4, /*!< AIN4 selected as analog input. */
+ NRF_COMP_INPUT_5 = COMP_PSEL_PSEL_AnalogInput5, /*!< AIN5 selected as analog input. */
+ NRF_COMP_INPUT_6 = COMP_PSEL_PSEL_AnalogInput6, /*!< AIN6 selected as analog input. */
#if defined (COMP_PSEL_PSEL_AnalogInput7) || defined (__NRFX_DOXYGEN__)
- NRF_COMP_INPUT_7 = COMP_PSEL_PSEL_AnalogInput7, /*!< AIN7 selected as analog input. */
+ NRF_COMP_INPUT_7 = COMP_PSEL_PSEL_AnalogInput7, /*!< AIN7 selected as analog input. */
#endif
#if defined (COMP_PSEL_PSEL_VddDiv2) || defined (__NRFX_DOXYGEN__)
- NRF_COMP_VDD_DIV2 = COMP_PSEL_PSEL_VddDiv2, /*!< VDD/2 selected as analog input. */
+ NRF_COMP_VDD_DIV2 = COMP_PSEL_PSEL_VddDiv2, /*!< VDD/2 selected as analog input. */
#endif
-}nrf_comp_input_t;
+} nrf_comp_input_t;
-/**
- * @enum nrf_comp_ref_t
- * @brief COMP reference selection.
- */
+/** @brief COMP reference selection. */
typedef enum
{
- NRF_COMP_REF_Int1V2 = COMP_REFSEL_REFSEL_Int1V2, /*!< VREF = internal 1.2 V reference (VDD >= 1.7 V). */
- NRF_COMP_REF_Int1V8 = COMP_REFSEL_REFSEL_Int1V8, /*!< VREF = internal 1.8 V reference (VDD >= VREF + 0.2 V). */
- NRF_COMP_REF_Int2V4 = COMP_REFSEL_REFSEL_Int2V4, /*!< VREF = internal 2.4 V reference (VDD >= VREF + 0.2 V). */
- NRF_COMP_REF_VDD = COMP_REFSEL_REFSEL_VDD, /*!< VREF = VDD. */
- NRF_COMP_REF_ARef = COMP_REFSEL_REFSEL_ARef /*!< VREF = AREF (VDD >= VREF >= AREFMIN). */
-}nrf_comp_ref_t;
+ NRF_COMP_REF_Int1V2 = COMP_REFSEL_REFSEL_Int1V2, /*!< VREF = internal 1.2 V reference (VDD >= 1.7 V). */
+ NRF_COMP_REF_Int1V8 = COMP_REFSEL_REFSEL_Int1V8, /*!< VREF = internal 1.8 V reference (VDD >= VREF + 0.2 V). */
+ NRF_COMP_REF_Int2V4 = COMP_REFSEL_REFSEL_Int2V4, /*!< VREF = internal 2.4 V reference (VDD >= VREF + 0.2 V). */
+ NRF_COMP_REF_VDD = COMP_REFSEL_REFSEL_VDD, /*!< VREF = VDD. */
+ NRF_COMP_REF_ARef = COMP_REFSEL_REFSEL_ARef /*!< VREF = AREF (VDD >= VREF >= AREFMIN). */
+} nrf_comp_ref_t;
-/**
- * @enum nrf_comp_ext_ref_t
- * @brief COMP external analog reference selection.
- */
+/** @brief COMP external analog reference selection. */
typedef enum
{
- NRF_COMP_EXT_REF_0 = COMP_EXTREFSEL_EXTREFSEL_AnalogReference0, /*!< Use AIN0 as external analog reference. */
- NRF_COMP_EXT_REF_1 = COMP_EXTREFSEL_EXTREFSEL_AnalogReference1 /*!< Use AIN1 as external analog reference. */
-}nrf_comp_ext_ref_t;
+ NRF_COMP_EXT_REF_0 = COMP_EXTREFSEL_EXTREFSEL_AnalogReference0, /*!< Use AIN0 as external analog reference. */
+ NRF_COMP_EXT_REF_1 = COMP_EXTREFSEL_EXTREFSEL_AnalogReference1 /*!< Use AIN1 as external analog reference. */
+} nrf_comp_ext_ref_t;
-/**
- * @brief COMP THDOWN and THUP values that are used to calculate the threshold voltages VDOWN and VUP.
- */
+/** @brief COMP THDOWN and THUP values that are used to calculate the threshold voltages VDOWN and VUP. */
typedef struct
{
uint8_t th_down; /*!< THDOWN value. */
uint8_t th_up; /*!< THUP value. */
-}nrf_comp_th_t;
+} nrf_comp_th_t;
-/**
- * @enum nrf_comp_main_mode_t
- * @brief COMP main operation mode.
- */
+/** @brief COMP main operation mode. */
typedef enum
{
- NRF_COMP_MAIN_MODE_SE = COMP_MODE_MAIN_SE, /*!< Single ended mode. */
- NRF_COMP_MAIN_MODE_Diff = COMP_MODE_MAIN_Diff /*!< Differential mode. */
-}nrf_comp_main_mode_t;
+ NRF_COMP_MAIN_MODE_SE = COMP_MODE_MAIN_SE, /*!< Single-ended mode. */
+ NRF_COMP_MAIN_MODE_Diff = COMP_MODE_MAIN_Diff /*!< Differential mode. */
+} nrf_comp_main_mode_t;
-/**
- * @enum nrf_comp_sp_mode_t
- * @brief COMP speed and power mode.
- */
+/** @brief COMP speed and power mode. */
typedef enum
{
- NRF_COMP_SP_MODE_Low = COMP_MODE_SP_Low, /*!< Low power mode. */
- NRF_COMP_SP_MODE_Normal = COMP_MODE_SP_Normal, /*!< Normal mode. */
- NRF_COMP_SP_MODE_High = COMP_MODE_SP_High /*!< High speed mode. */
-}nrf_comp_sp_mode_t;
+ NRF_COMP_SP_MODE_Low = COMP_MODE_SP_Low, /*!< Low power mode. */
+ NRF_COMP_SP_MODE_Normal = COMP_MODE_SP_Normal, /*!< Normal mode. */
+ NRF_COMP_SP_MODE_High = COMP_MODE_SP_High /*!< High-speed mode. */
+} nrf_comp_sp_mode_t;
-/**
- * @enum nrf_comp_hyst_t
- * @brief COMP comparator hysteresis.
- */
+/** @brief COMP comparator hysteresis. */
typedef enum
{
- NRF_COMP_HYST_NoHyst = COMP_HYST_HYST_NoHyst, /*!< Comparator hysteresis disabled. */
- NRF_COMP_HYST_50mV = COMP_HYST_HYST_Hyst50mV /*!< Comparator hysteresis enabled. */
-}nrf_comp_hyst_t;
+ NRF_COMP_HYST_NoHyst = COMP_HYST_HYST_NoHyst, /*!< Comparator hysteresis disabled. */
+ NRF_COMP_HYST_50mV = COMP_HYST_HYST_Hyst50mV /*!< Comparator hysteresis enabled. */
+} nrf_comp_hyst_t;
#if defined (COMP_ISOURCE_ISOURCE_Msk) || defined (__NRFX_DOXYGEN__)
-/**
- * @brief COMP current source selection on analog input.
- */
+/** @brief COMP current source selection on analog input. */
typedef enum
{
- NRF_COMP_ISOURCE_Off = COMP_ISOURCE_ISOURCE_Off, /*!< Current source disabled. */
- NRF_COMP_ISOURCE_Ien2uA5 = COMP_ISOURCE_ISOURCE_Ien2mA5, /*!< Current source enabled (+/- 2.5 uA). */
- NRF_COMP_ISOURCE_Ien5uA = COMP_ISOURCE_ISOURCE_Ien5mA, /*!< Current source enabled (+/- 5 uA). */
- NRF_COMP_ISOURCE_Ien10uA = COMP_ISOURCE_ISOURCE_Ien10mA /*!< Current source enabled (+/- 10 uA). */
-}nrf_isource_t;
+ NRF_COMP_ISOURCE_Off = COMP_ISOURCE_ISOURCE_Off, /*!< Current source disabled. */
+ NRF_COMP_ISOURCE_Ien2uA5 = COMP_ISOURCE_ISOURCE_Ien2mA5, /*!< Current source enabled (+/- 2.5 uA). */
+ NRF_COMP_ISOURCE_Ien5uA = COMP_ISOURCE_ISOURCE_Ien5mA, /*!< Current source enabled (+/- 5 uA). */
+ NRF_COMP_ISOURCE_Ien10uA = COMP_ISOURCE_ISOURCE_Ien10mA /*!< Current source enabled (+/- 10 uA). */
+} nrf_isource_t;
#endif
-/**
- * @enum nrf_comp_task_t
- * @brief COMP tasks.
- */
+/** @brief COMP tasks. */
typedef enum
{
- /*lint -save -e30*/
NRF_COMP_TASK_START = offsetof(NRF_COMP_Type, TASKS_START), /*!< COMP start sampling task. */
NRF_COMP_TASK_STOP = offsetof(NRF_COMP_Type, TASKS_STOP), /*!< COMP stop sampling task. */
NRF_COMP_TASK_SAMPLE = offsetof(NRF_COMP_Type, TASKS_SAMPLE) /*!< Sample comparator value. */
- /*lint -restore*/
-}nrf_comp_task_t;
+} nrf_comp_task_t;
-/**
- * @enum nrf_comp_event_t
- * @brief COMP events.
- */
+/** @brief COMP events. */
typedef enum
{
- /*lint -save -e30*/
NRF_COMP_EVENT_READY = offsetof(NRF_COMP_Type, EVENTS_READY), /*!< COMP is ready and output is valid. */
NRF_COMP_EVENT_DOWN = offsetof(NRF_COMP_Type, EVENTS_DOWN), /*!< Input voltage crossed the threshold going down. */
NRF_COMP_EVENT_UP = offsetof(NRF_COMP_Type, EVENTS_UP), /*!< Input voltage crossed the threshold going up. */
NRF_COMP_EVENT_CROSS = offsetof(NRF_COMP_Type, EVENTS_CROSS) /*!< Input voltage crossed the threshold in any direction. */
- /*lint -restore*/
-}nrf_comp_event_t;
+} nrf_comp_event_t;
-/**
- * @brief COMP reference configuration.
- */
+/** @brief COMP reference configuration. */
typedef struct
{
- nrf_comp_ref_t reference; /*!< COMP reference selection. */
- nrf_comp_ext_ref_t external; /*!< COMP external analog reference selection. */
-}nrf_comp_ref_conf_t;
+ nrf_comp_ref_t reference; /*!< COMP reference selection. */
+ nrf_comp_ext_ref_t external; /*!< COMP external analog reference selection. */
+} nrf_comp_ref_conf_t;
-/**
- * @brief Function for enabling the COMP peripheral.
- */
+/** @brief Function for enabling the COMP peripheral. */
__STATIC_INLINE void nrf_comp_enable(void);
-
-/**
- * @brief Function for disabling the COMP peripheral.
- */
-
+/** @brief Function for disabling the COMP peripheral. */
__STATIC_INLINE void nrf_comp_disable(void);
/**
* @brief Function for checking if the COMP peripheral is enabled.
*
- * @retval true If the COMP peripheral is enabled.
- * @retval false If the COMP peripheral is not enabled.
+ * @retval true The COMP peripheral is enabled.
+ * @retval false The COMP peripheral is not enabled.
*/
__STATIC_INLINE bool nrf_comp_enable_check(void);
/**
* @brief Function for setting the reference source.
*
- * @param[in] reference COMP reference selection.
+ * @param[in] reference COMP reference selection.
*/
__STATIC_INLINE void nrf_comp_ref_set(nrf_comp_ref_t reference);
-
/**
* @brief Function for setting the external analog reference source.
*
- * @param[in] ext_ref COMP external analog reference selection.
+ * @param[in] ext_ref COMP external analog reference selection.
*/
__STATIC_INLINE void nrf_comp_ext_ref_set(nrf_comp_ext_ref_t ext_ref);
-
/**
* @brief Function for setting threshold voltages.
*
- * @param[in] threshold COMP VDOWN and VUP thresholds.
+ * @param[in] threshold COMP VDOWN and VUP thresholds.
*/
__STATIC_INLINE void nrf_comp_th_set(nrf_comp_th_t threshold);
-
/**
* @brief Function for setting the main mode.
*
- * @param[in] main_mode COMP main operation mode.
+ * @param[in] main_mode COMP main operation mode.
*/
__STATIC_INLINE void nrf_comp_main_mode_set(nrf_comp_main_mode_t main_mode);
-
/**
* @brief Function for setting the speed mode.
*
- * @param[in] speed_mode COMP speed and power mode.
+ * @param[in] speed_mode COMP speed and power mode.
*/
__STATIC_INLINE void nrf_comp_speed_mode_set(nrf_comp_sp_mode_t speed_mode);
-
/**
* @brief Function for setting the hysteresis.
*
- * @param[in] hyst COMP comparator hysteresis.
+ * @param[in] hyst COMP comparator hysteresis.
*/
__STATIC_INLINE void nrf_comp_hysteresis_set(nrf_comp_hyst_t hyst);
-
#if defined (COMP_ISOURCE_ISOURCE_Msk) || defined (__NRFX_DOXYGEN__)
/**
* @brief Function for setting the current source on the analog input.
*
- * @param[in] isource COMP current source selection on analog input.
+ * @param[in] isource COMP current source selection on analog input.
*/
__STATIC_INLINE void nrf_comp_isource_set(nrf_isource_t isource);
#endif
-
/**
* @brief Function for selecting the active input of the COMP.
*
@@ -264,110 +217,99 @@
*/
__STATIC_INLINE void nrf_comp_input_select(nrf_comp_input_t input);
-
/**
* @brief Function for getting the last COMP compare result.
*
- * @return The last compare result. If 0, then VIN+ < VIN-. If 1, then VIN+ > VIN-.
- *
* @note If VIN+ == VIN-, the return value depends on the previous result.
+ *
+ * @return The last compare result. If 0, then VIN+ < VIN-. If 1, then VIN+ > VIN-.
*/
__STATIC_INLINE uint32_t nrf_comp_result_get(void);
-
/**
* @brief Function for enabling interrupts from COMP.
*
- * @param[in] comp_int_mask Mask of interrupts to be enabled.
+ * @param[in] mask Mask of interrupts to be enabled.
*
- * @sa nrf_comp_int_enable_check()
+ * @sa nrf_comp_int_enable_check
*/
-__STATIC_INLINE void nrf_comp_int_enable(uint32_t comp_int_mask);
+__STATIC_INLINE void nrf_comp_int_enable(uint32_t mask);
/**
* @brief Function for disabling interrupts from COMP.
*
- * @param[in] comp_int_mask Mask of interrupts to be disabled.
+ * @param[in] mask Mask of interrupts to be disabled.
*
- * @sa nrf_comp_int_enable_check()
+ * @sa nrf_comp_int_enable_check
*/
-__STATIC_INLINE void nrf_comp_int_disable(uint32_t comp_int_mask);
-
+__STATIC_INLINE void nrf_comp_int_disable(uint32_t mask);
/**
* @brief Function for getting the enabled interrupts of COMP.
*
- * @param[in] comp_int_mask Mask of interrupts to be checked.
+ * @param[in] mask Mask of interrupts to be checked.
*
- * @retval true If any interrupts of the specified mask are enabled.
+ * @retval true At least one interrupt from the specified mask is enabled.
+ * @retval false No interrupt provided by the specified mask are enabled.
*/
-__STATIC_INLINE bool nrf_comp_int_enable_check(uint32_t comp_int_mask);
-
-
+__STATIC_INLINE bool nrf_comp_int_enable_check(uint32_t mask);
/**
- * @brief Function for getting the address of a specific COMP task register.
+ * @brief Function for getting the address of the specified COMP task register.
*
- * @param[in] comp_task COMP task.
+ * @param[in] task COMP task.
*
* @return Address of the specified COMP task.
*/
-__STATIC_INLINE uint32_t * nrf_comp_task_address_get(nrf_comp_task_t comp_task);
-
+__STATIC_INLINE uint32_t * nrf_comp_task_address_get(nrf_comp_task_t task);
/**
- * @brief Function for getting the address of a specific COMP event register.
+ * @brief Function for getting the address of the specified COMP event register.
*
- * @param[in] comp_event COMP event.
+ * @param[in] event COMP event.
*
* @return Address of the specified COMP event.
*/
-__STATIC_INLINE uint32_t * nrf_comp_event_address_get(nrf_comp_event_t comp_event);
-
+__STATIC_INLINE uint32_t * nrf_comp_event_address_get(nrf_comp_event_t event);
/**
- * @brief Function for setting COMP shorts.
+ * @brief Function for setting COMP shortcuts.
*
- * @param[in] comp_short_mask COMP shorts by mask.
- *
+ * @param[in] mask Mask of shortcuts.
*/
-__STATIC_INLINE void nrf_comp_shorts_enable(uint32_t comp_short_mask);
-
+__STATIC_INLINE void nrf_comp_shorts_enable(uint32_t mask);
/**
- * @brief Function for clearing COMP shorts by mask.
+ * @brief Function for clearing COMP shortcuts by mask.
*
- * @param[in] comp_short_mask COMP shorts to be cleared.
- *
+ * @param[in] mask Mask of shortcuts.
*/
-__STATIC_INLINE void nrf_comp_shorts_disable(uint32_t comp_short_mask);
-
+__STATIC_INLINE void nrf_comp_shorts_disable(uint32_t mask);
/**
- * @brief Function for setting a specific COMP task.
+ * @brief Function for setting the specified COMP task.
*
- * @param[in] comp_task COMP task to be set.
- *
+ * @param[in] task Task to be activated.
*/
-__STATIC_INLINE void nrf_comp_task_trigger(nrf_comp_task_t comp_task);
-
+__STATIC_INLINE void nrf_comp_task_trigger(nrf_comp_task_t task);
/**
- * @brief Function for clearing a specific COMP event.
+ * @brief Function for clearing the specified COMP event.
*
- * @param[in] comp_event COMP event to be cleared.
- *
+ * @param[in] event COMP event to be cleared.
*/
-__STATIC_INLINE void nrf_comp_event_clear(nrf_comp_event_t comp_event);
-
+__STATIC_INLINE void nrf_comp_event_clear(nrf_comp_event_t event);
/**
- * @brief Function for getting the state of a specific COMP event.
+ * @brief Function for retrieving the state of the UARTE event.
*
- * @retval true If the specified COMP event is active.
+ * @param[in] event Event to be checked.
*
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
-__STATIC_INLINE bool nrf_comp_event_check(nrf_comp_event_t comp_event);
+__STATIC_INLINE bool nrf_comp_event_check(nrf_comp_event_t event);
+
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
@@ -399,8 +341,8 @@
__STATIC_INLINE void nrf_comp_th_set(nrf_comp_th_t threshold)
{
NRF_COMP->TH =
- ((threshold.th_down << COMP_TH_THDOWN_Pos) & COMP_TH_THDOWN_Msk) |
- ((threshold.th_up << COMP_TH_THUP_Pos) & COMP_TH_THUP_Msk);
+ (((uint32_t)threshold.th_down << COMP_TH_THDOWN_Pos) & COMP_TH_THDOWN_Msk) |
+ (((uint32_t)threshold.th_up << COMP_TH_THUP_Pos) & COMP_TH_THUP_Msk);
}
__STATIC_INLINE void nrf_comp_main_mode_set(nrf_comp_main_mode_t main_mode)
@@ -435,58 +377,58 @@
return (uint32_t)NRF_COMP->RESULT;
}
-__STATIC_INLINE void nrf_comp_int_enable(uint32_t comp_int_mask)
+__STATIC_INLINE void nrf_comp_int_enable(uint32_t mask)
{
- NRF_COMP->INTENSET = comp_int_mask;
+ NRF_COMP->INTENSET = mask;
}
-__STATIC_INLINE void nrf_comp_int_disable(uint32_t comp_int_mask)
+__STATIC_INLINE void nrf_comp_int_disable(uint32_t mask)
{
- NRF_COMP->INTENCLR = comp_int_mask;
+ NRF_COMP->INTENCLR = mask;
}
-__STATIC_INLINE bool nrf_comp_int_enable_check(uint32_t comp_int_mask)
+__STATIC_INLINE bool nrf_comp_int_enable_check(uint32_t mask)
{
- return (NRF_COMP->INTENSET & comp_int_mask); // when read this register will return the value of INTEN.
+ return (NRF_COMP->INTENSET & mask); // When read, this register returns the value of INTEN.
}
-__STATIC_INLINE uint32_t * nrf_comp_task_address_get(nrf_comp_task_t comp_task)
+__STATIC_INLINE uint32_t * nrf_comp_task_address_get(nrf_comp_task_t task)
{
- return (uint32_t *)((uint8_t *)NRF_COMP + (uint32_t)comp_task);
+ return (uint32_t *)((uint8_t *)NRF_COMP + (uint32_t)task);
}
-__STATIC_INLINE uint32_t * nrf_comp_event_address_get(nrf_comp_event_t comp_event)
+__STATIC_INLINE uint32_t * nrf_comp_event_address_get(nrf_comp_event_t event)
{
- return (uint32_t *)((uint8_t *)NRF_COMP + (uint32_t)comp_event);
+ return (uint32_t *)((uint8_t *)NRF_COMP + (uint32_t)event);
}
-__STATIC_INLINE void nrf_comp_shorts_enable(uint32_t comp_short_mask)
+__STATIC_INLINE void nrf_comp_shorts_enable(uint32_t mask)
{
- NRF_COMP->SHORTS |= comp_short_mask;
+ NRF_COMP->SHORTS |= mask;
}
-__STATIC_INLINE void nrf_comp_shorts_disable(uint32_t comp_short_mask)
+__STATIC_INLINE void nrf_comp_shorts_disable(uint32_t mask)
{
- NRF_COMP->SHORTS &= ~comp_short_mask;
+ NRF_COMP->SHORTS &= ~mask;
}
-__STATIC_INLINE void nrf_comp_task_trigger(nrf_comp_task_t comp_task)
+__STATIC_INLINE void nrf_comp_task_trigger(nrf_comp_task_t task)
{
- *( (volatile uint32_t *)( (uint8_t *)NRF_COMP + comp_task) ) = 1;
+ *( (volatile uint32_t *)( (uint8_t *)NRF_COMP + (uint32_t)task) ) = 1;
}
-__STATIC_INLINE void nrf_comp_event_clear(nrf_comp_event_t comp_event)
+__STATIC_INLINE void nrf_comp_event_clear(nrf_comp_event_t event)
{
- *( (volatile uint32_t *)( (uint8_t *)NRF_COMP + (uint32_t)comp_event) ) = 0;
+ *( (volatile uint32_t *)( (uint8_t *)NRF_COMP + (uint32_t)event) ) = 0;
#if __CORTEX_M == 0x04
- volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_COMP + (uint32_t)comp_event));
+ volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_COMP + (uint32_t)event));
(void)dummy;
#endif
}
-__STATIC_INLINE bool nrf_comp_event_check(nrf_comp_event_t comp_event)
+__STATIC_INLINE bool nrf_comp_event_check(nrf_comp_event_t event)
{
- return (bool) (*(volatile uint32_t *)( (uint8_t *)NRF_COMP + comp_event));
+ return (bool) (*(volatile uint32_t *)( (uint8_t *)NRF_COMP + (uint32_t)event));
}
#endif // SUPPRESS_INLINE_IMPLEMENTATION
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_dppi.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_dppi.h
index b1ee7da..bae9f22 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_dppi.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_dppi.h
@@ -78,18 +78,29 @@
* @brief Function for activating a DPPI task.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
- * @param[in] dppi_task Task to activate.
+ * @param[in] dppi_task Task to be activated.
*/
__STATIC_INLINE void nrf_dppi_task_trigger(NRF_DPPIC_Type * p_reg, nrf_dppi_task_t dppi_task);
/**
+ * @brief Function for getting the address of the specified DPPI task register.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] task Requested task.
+ *
+ * @return Address of the specified task register.
+ */
+__STATIC_INLINE uint32_t nrf_dppi_task_address_get(NRF_DPPIC_Type const * p_reg,
+ nrf_dppi_task_t task);
+
+/**
* @brief Function for checking the state of a specific DPPI channel.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
- * @param[in] channel Channel to check.
+ * @param[in] channel Channel to be checked.
*
- * @retval true If the channel is enabled.
- * @retval false If the channel is not enabled.
+ * @retval true The channel is enabled.
+ * @retval false The channel is not enabled.
*/
__STATIC_INLINE bool nrf_dppi_channel_check(NRF_DPPIC_Type const * p_reg, uint8_t channel);
@@ -200,6 +211,24 @@
__STATIC_INLINE void nrf_dppi_group_disable(NRF_DPPIC_Type * p_reg,
nrf_dppi_channel_group_t group);
+/**
+ * @brief Function for getting the ENABLE task associated with the specified channel group.
+ *
+ * @param[in] index Channel group index.
+ *
+ * @return Requested ENABLE task.
+ */
+__STATIC_INLINE nrf_dppi_task_t nrf_dppi_group_enable_task_get(uint8_t index);
+
+/**
+ * @brief Function for getting the DISABLE task associated with the specified channel group.
+ *
+ * @param[in] index Channel group index.
+ *
+ * @return Requested DISABLE task.
+ */
+__STATIC_INLINE nrf_dppi_task_t nrf_dppi_group_disable_task_get(uint8_t index);
+
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
@@ -208,6 +237,12 @@
*((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) dppi_task)) = 1;
}
+__STATIC_INLINE uint32_t nrf_dppi_task_address_get(NRF_DPPIC_Type const * p_reg,
+ nrf_dppi_task_t task)
+{
+ return (uint32_t) ((uint8_t *) p_reg + (uint32_t ) task);
+}
+
__STATIC_INLINE bool nrf_dppi_channel_check(NRF_DPPIC_Type const * p_reg, uint8_t channel)
{
return ((p_reg->CHEN & (DPPIC_CHEN_CH0_Enabled << (DPPIC_CHEN_CH0_Pos + channel))) != 0);
@@ -274,6 +309,18 @@
p_reg->TASKS_CHG[(uint32_t) group].DIS = 1;
}
+__STATIC_INLINE nrf_dppi_task_t nrf_dppi_group_enable_task_get(uint8_t index)
+{
+ NRFX_ASSERT(index < NRFX_ARRAY_SIZE(NRF_DPPIC->TASKS_CHG));
+ return (nrf_dppi_task_t)NRFX_OFFSETOF(NRF_DPPIC_Type, TASKS_CHG[index].EN);
+}
+
+__STATIC_INLINE nrf_dppi_task_t nrf_dppi_group_disable_task_get(uint8_t index)
+{
+ NRFX_ASSERT(index < NRFX_ARRAY_SIZE(NRF_DPPIC->TASKS_CHG));
+ return (nrf_dppi_task_t)NRFX_OFFSETOF(NRF_DPPIC_Type, TASKS_CHG[index].DIS);
+}
+
#endif // SUPPRESS_INLINE_IMPLEMENTATION
/** @} */
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_ecb.c b/third_party/NordicSemiconductor/nrfx/hal/nrf_ecb.c
index 1a19605..76fbf1e 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_ecb.c
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_ecb.c
@@ -29,8 +29,6 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
-//lint -e438
-
#include <nrfx.h>
#include "nrf_ecb.h"
#include <string.h>
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_ecb.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_ecb.h
index 40064a9..d226245 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_ecb.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_ecb.h
@@ -42,7 +42,7 @@
* @defgroup nrf_ecb_drv AES ECB encryption driver
* @{
* @ingroup nrf_ecb
- * @brief Driver for the AES Electronic Code Book (ECB) peripheral.
+ * @brief Driver for the Advanced Encryption Standard (AES) Electronic Code Book (ECB) peripheral.
*
* To encrypt data, the peripheral must first be powered on
* using @ref nrf_ecb_init. Next, the key must be set using @ref nrf_ecb_set_key.
@@ -52,8 +52,9 @@
* @brief Function for initializing and powering on the ECB peripheral.
*
* This function allocates memory for the ECBDATAPTR.
- * @retval true If initialization was successful.
- * @retval false If powering on failed.
+ *
+ * @retval true The initialization was successful.
+ * @retval false The power-on failed.
*/
bool nrf_ecb_init(void);
@@ -66,8 +67,8 @@
* @param dst Result of encryption, 16 bytes will be written.
* @param src Source with 16-byte data to be encrypted.
*
- * @retval true If the encryption operation completed.
- * @retval false If the encryption operation did not complete.
+ * @retval true The encryption operation completed.
+ * @retval false The encryption operation did not complete.
*/
bool nrf_ecb_crypt(uint8_t * dst, const uint8_t * src);
@@ -84,34 +85,24 @@
* @defgroup nrf_ecb_hal AES ECB encryption HAL
* @{
* @ingroup nrf_ecb
- * @brief Hardware access layer for managing the AES Electronic Codebook (ECB) peripheral.
+ * @brief Hardware access layer (HAL) for managing the Advanced Encryption Standard (AES) Electronic Codebook (ECB) peripheral.
*/
-/**
- * @brief ECB tasks.
- */
+/** @brief ECB tasks. */
typedef enum
{
- /*lint -save -e30 -esym(628,__INTADDR__)*/
- NRF_ECB_TASK_STARTECB = offsetof(NRF_ECB_Type, TASKS_STARTECB), /**< Task for starting ECB block encryption. */
- NRF_ECB_TASK_STOPECB = offsetof(NRF_ECB_Type, TASKS_STOPECB), /**< Task for stopping ECB block encryption. */
- /*lint -restore*/
+ NRF_ECB_TASK_STARTECB = offsetof(NRF_ECB_Type, TASKS_STARTECB), /**< Task for starting the ECB block encryption. */
+ NRF_ECB_TASK_STOPECB = offsetof(NRF_ECB_Type, TASKS_STOPECB), /**< Task for stopping the ECB block encryption. */
} nrf_ecb_task_t;
-/**
- * @brief ECB events.
- */
+/** @brief ECB events. */
typedef enum
{
- /*lint -save -e30*/
NRF_ECB_EVENT_ENDECB = offsetof(NRF_ECB_Type, EVENTS_ENDECB), /**< ECB block encrypt complete. */
NRF_ECB_EVENT_ERRORECB = offsetof(NRF_ECB_Type, EVENTS_ERRORECB), /**< ECB block encrypt aborted because of a STOPECB task or due to an error. */
- /*lint -restore*/
} nrf_ecb_event_t;
-/**
- * @brief ECB interrupts.
- */
+/** @brief ECB interrupts. */
typedef enum
{
NRF_ECB_INT_ENDECB_MASK = ECB_INTENSET_ENDECB_Msk, ///< Interrupt on ENDECB event.
@@ -120,15 +111,15 @@
/**
- * @brief Function for activating a specific ECB task.
+ * @brief Function for activating the specified ECB task.
*
* @param[in] p_reg Pointer to the peripheral register structure.
- * @param[in] task Task to activate.
+ * @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_ecb_task_trigger(NRF_ECB_Type * p_reg, nrf_ecb_task_t task);
/**
- * @brief Function for getting the address of a specific ECB task register.
+ * @brief Function for getting the address of the specified ECB task register.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] task Requested task.
@@ -139,7 +130,7 @@
nrf_ecb_task_t task);
/**
- * @brief Function for clearing a specific ECB event.
+ * @brief Function for clearing the specified ECB event.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] event Event to clear.
@@ -147,18 +138,18 @@
__STATIC_INLINE void nrf_ecb_event_clear(NRF_ECB_Type * p_reg, nrf_ecb_event_t event);
/**
- * @brief Function for checking the state of a specific ECB event.
+ * @brief Function for retrieving the state of the ECB event.
*
- * @param[in] p_reg Pointer to the peripheral register structure.
- * @param[in] event Event to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to be checked.
*
- * @retval true If the event is set.
- * @retval false If the event is not set.
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_ecb_event_check(NRF_ECB_Type const * p_reg, nrf_ecb_event_t event);
/**
- * @brief Function for getting the address of a specific ECB event register.
+ * @brief Function for getting the address of the specified ECB event register.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] event Requested event.
@@ -169,18 +160,18 @@
nrf_ecb_event_t event);
/**
- * @brief Function for enabling specified interrupts.
+ * @brief Function for enabling the specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral register structure.
- * @param[in] mask Interrupts to enable.
+ * @param[in] mask Interrupts to be enabled.
*/
__STATIC_INLINE void nrf_ecb_int_enable(NRF_ECB_Type * p_reg, uint32_t mask);
/**
- * @brief Function for disabling specified interrupts.
+ * @brief Function for disabling the specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral register structure.
- * @param[in] mask Interrupts to disable.
+ * @param[in] mask Interrupts to be disabled.
*/
__STATIC_INLINE void nrf_ecb_int_disable(NRF_ECB_Type * p_reg, uint32_t mask);
@@ -188,10 +179,10 @@
* @brief Function for retrieving the state of a given interrupt.
*
* @param[in] p_reg Pointer to the peripheral register structure.
- * @param[in] ecb_int Interrupt to check.
+ * @param[in] ecb_int Interrupt to be checked.
*
- * @retval true If the interrupt is enabled.
- * @retval false If the interrupt is not enabled.
+ * @retval true The interrupt is enabled.
+ * @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_ecb_int_enable_check(NRF_ECB_Type const * p_reg,
nrf_ecb_int_mask_t ecb_int);
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_egu.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_egu.h
index 5fb9ce6..74744e9 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_egu.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_egu.h
@@ -45,13 +45,9 @@
* @brief Hardware access layer for managing the Event Generator Unit (EGU) peripheral.
*/
-/**
- * @enum nrf_egu_task_t
- * @brief EGU tasks.
- */
+/** @brief EGU tasks. */
typedef enum
{
- /*lint -save -e30 -esym(628,__INTADDR__)*/
NRF_EGU_TASK_TRIGGER0 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[0]), /**< Trigger 0 for triggering the corresponding TRIGGERED[0] event. */
NRF_EGU_TASK_TRIGGER1 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[1]), /**< Trigger 1 for triggering the corresponding TRIGGERED[1] event. */
NRF_EGU_TASK_TRIGGER2 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[2]), /**< Trigger 2 for triggering the corresponding TRIGGERED[2] event. */
@@ -68,16 +64,11 @@
NRF_EGU_TASK_TRIGGER13 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[13]), /**< Trigger 13 for triggering the corresponding TRIGGERED[13] event. */
NRF_EGU_TASK_TRIGGER14 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[14]), /**< Trigger 14 for triggering the corresponding TRIGGERED[14] event. */
NRF_EGU_TASK_TRIGGER15 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[15]) /**< Trigger 15 for triggering the corresponding TRIGGERED[15] event. */
- /*lint -restore*/
} nrf_egu_task_t;
-/**
- * @enum nrf_egu_event_t
- * @brief EGU events.
- */
+/** @brief EGU events. */
typedef enum
{
- /*lint -save -e30 -esym(628,__INTADDR__)*/
NRF_EGU_EVENT_TRIGGERED0 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[0]), /**< Event number 0 generated by triggering the corresponding TRIGGER[0] task. */
NRF_EGU_EVENT_TRIGGERED1 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[1]), /**< Event number 1 generated by triggering the corresponding TRIGGER[1] task. */
NRF_EGU_EVENT_TRIGGERED2 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[2]), /**< Event number 2 generated by triggering the corresponding TRIGGER[2] task. */
@@ -94,13 +85,9 @@
NRF_EGU_EVENT_TRIGGERED13 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[13]), /**< Event number 13 generated by triggering the corresponding TRIGGER[13] task. */
NRF_EGU_EVENT_TRIGGERED14 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[14]), /**< Event number 14 generated by triggering the corresponding TRIGGER[14] task. */
NRF_EGU_EVENT_TRIGGERED15 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[15]) /**< Event number 15 generated by triggering the corresponding TRIGGER[15] task. */
- /*lint -restore*/
} nrf_egu_event_t;
-/**
- * @enum nrf_egu_int_mask_t
- * @brief EGU interrupts.
- */
+/** @brief EGU interrupts. */
typedef enum
{
NRF_EGU_INT_TRIGGERED0 = EGU_INTENSET_TRIGGERED0_Msk, /**< Interrupt on EVENTS_TRIGGERED[0] event. */
@@ -122,16 +109,18 @@
NRF_EGU_INT_ALL = 0xFFFFuL
} nrf_egu_int_mask_t;
-/**@brief Function for getting max channel number of given EGU.
+
+/**
+ * @brief Function for getting the maximum channel number of the given EGU.
*
* @param NRF_EGUx EGU instance.
*
- * @returns number of available channels.
+ * @return Number of available channels.
*/
__STATIC_INLINE uint32_t nrf_egu_channel_count(NRF_EGU_Type * NRF_EGUx);
/**
- * @brief Function for triggering a specific EGU task.
+ * @brief Function for triggering the specified EGU task.
*
* @param NRF_EGUx EGU instance.
* @param egu_task EGU task.
@@ -139,110 +128,125 @@
__STATIC_INLINE void nrf_egu_task_trigger(NRF_EGU_Type * NRF_EGUx, nrf_egu_task_t egu_task);
/**
- * @brief Function for returning the address of a specific EGU task register.
+ * @brief Function for returning the address of the specified EGU task register.
*
* @param NRF_EGUx EGU instance.
* @param egu_task EGU task.
+ *
+ * @return Address of the specified EGU task register.
*/
__STATIC_INLINE uint32_t * nrf_egu_task_address_get(NRF_EGU_Type * NRF_EGUx,
nrf_egu_task_t egu_task);
/**
- * @brief Function for returning the address of a specific EGU TRIGGER task register.
+ * @brief Function for returning the address of the specified EGU TRIGGER task register.
*
* @param NRF_EGUx EGU instance.
* @param channel Channel number.
+ *
+ * @return Address of the specified EGU TRIGGER task register.
*/
__STATIC_INLINE uint32_t * nrf_egu_task_trigger_address_get(NRF_EGU_Type * NRF_EGUx,
- uint8_t channel);
+ uint8_t channel);
/**
- * @brief Function for returning the specific EGU TRIGGER task.
+ * @brief Function for returning the specified EGU TRIGGER task.
*
* @param NRF_EGUx EGU instance.
* @param channel Channel number.
+ *
+ * @return The specified EGU TRIGGER task.
*/
__STATIC_INLINE nrf_egu_task_t nrf_egu_task_trigger_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel);
/**
- * @brief Function for returning the state of a specific EGU event.
+ * @brief Function for retrieving the state of the UARTE event.
*
* @param NRF_EGUx EGU instance.
- * @param egu_event EGU event to check.
+ * @param egu_event EGU event to be checked.
+ *
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
-__STATIC_INLINE bool nrf_egu_event_check(NRF_EGU_Type * NRF_EGUx,
+__STATIC_INLINE bool nrf_egu_event_check(NRF_EGU_Type * NRF_EGUx,
nrf_egu_event_t egu_event);
/**
- * @brief Function for clearing a specific EGU event.
+ * @brief Function for clearing the specified EGU event.
*
* @param NRF_EGUx EGU instance.
* @param egu_event EGU event to clear.
*/
-__STATIC_INLINE void nrf_egu_event_clear(NRF_EGU_Type * NRF_EGUx,
+__STATIC_INLINE void nrf_egu_event_clear(NRF_EGU_Type * NRF_EGUx,
nrf_egu_event_t egu_event);
/**
- * @brief Function for returning the address of a specific EGU event register.
+ * @brief Function for returning the address of the specified EGU event register.
*
* @param NRF_EGUx EGU instance.
* @param egu_event EGU event.
+ *
+ * @return Address of the specified EGU event register.
*/
-__STATIC_INLINE uint32_t * nrf_egu_event_address_get(NRF_EGU_Type * NRF_EGUx,
+__STATIC_INLINE uint32_t * nrf_egu_event_address_get(NRF_EGU_Type * NRF_EGUx,
nrf_egu_event_t egu_event);
/**
- * @brief Function for returning the address of a specific EGU TRIGGERED event register.
+ * @brief Function for returning address of the specified EGU TRIGGERED event register.
*
* @param NRF_EGUx EGU instance.
* @param channel Channel number.
+ *
+ * @return Address of the specified EGU TRIGGERED event register.
*/
__STATIC_INLINE uint32_t * nrf_egu_event_triggered_address_get(NRF_EGU_Type * NRF_EGUx,
- uint8_t channel);
+ uint8_t channel);
/**
- * @brief Function for returning the specific EGU TRIGGERED event.
+ * @brief Function for returning the specified EGU TRIGGERED event.
*
* @param NRF_EGUx EGU instance.
* @param channel Channel number.
+ *
+ * @return The specified EGU TRIGGERED event.
*/
__STATIC_INLINE nrf_egu_event_t nrf_egu_event_triggered_get(NRF_EGU_Type * NRF_EGUx,
- uint8_t channel);
+ uint8_t channel);
/**
- * @brief Function for enabling one or more specific EGU interrupts.
- *
- * @param NRF_EGUx EGU instance.
- * @param egu_int_mask Interrupts to enable.
- */
-__STATIC_INLINE void nrf_egu_int_enable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask);
-
-/**
- * @brief Function for retrieving the state of one or more EGU interrupts.
+ * @brief Function for enabling one or more of the EGU interrupts.
*
* @param NRF_EGUx EGU instance.
- * @param egu_int_mask Interrupts to check.
- *
- * @retval true If all of the specified interrupts are enabled.
- * @retval false If at least one of the specified interrupts is disabled.
+ * @param mask Mask of interrupts to be enabled.
*/
-__STATIC_INLINE bool nrf_egu_int_enable_check(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask);
+__STATIC_INLINE void nrf_egu_int_enable(NRF_EGU_Type * NRF_EGUx, uint32_t mask);
/**
- * @brief Function for disabling one or more specific EGU interrupts.
- *
- * @param NRF_EGUx EGU instance.
- * @param egu_int_mask Interrupts to disable.
- */
-__STATIC_INLINE void nrf_egu_int_disable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask);
-
-/**
- * @brief Function for retrieving one or more specific EGU interrupts.
+ * @brief Function for retrieving the state of one or more of the EGU interrupts.
*
* @param NRF_EGUx EGU instance.
- * @param channel Channel number.
+ * @param mask Mask of interrupts to be checked.
*
- * @returns EGU interrupt mask.
+ * @retval true All of the specified interrupts are enabled.
+ * @retval false At least one of the specified interrupts is disabled.
+ */
+__STATIC_INLINE bool nrf_egu_int_enable_check(NRF_EGU_Type * NRF_EGUx, uint32_t mask);
+
+/**
+ * @brief Function for disabling one or more of the EGU interrupts.
+ *
+ * @param NRF_EGUx EGU instance.
+ * @param mask Mask of interrupts to be disabled.
+ */
+__STATIC_INLINE void nrf_egu_int_disable(NRF_EGU_Type * NRF_EGUx, uint32_t mask);
+
+/**
+ * @brief Function for retrieving one or more of the EGU interrupts.
+ *
+ * @param NRF_EGUx EGU instance.
+ * @param channel Channel number.
+ *
+ * @return EGU interrupt mask.
*/
__STATIC_INLINE nrf_egu_int_mask_t nrf_egu_int_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel);
@@ -388,22 +392,22 @@
return (nrf_egu_event_t)((uint32_t) NRF_EGU_EVENT_TRIGGERED0 + (channel * sizeof(uint32_t)));
}
-__STATIC_INLINE void nrf_egu_int_enable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask)
+__STATIC_INLINE void nrf_egu_int_enable(NRF_EGU_Type * NRF_EGUx, uint32_t mask)
{
NRFX_ASSERT(NRF_EGUx);
- NRF_EGUx->INTENSET = egu_int_mask;
+ NRF_EGUx->INTENSET = mask;
}
-__STATIC_INLINE bool nrf_egu_int_enable_check(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask)
+__STATIC_INLINE bool nrf_egu_int_enable_check(NRF_EGU_Type * NRF_EGUx, uint32_t mask)
{
NRFX_ASSERT(NRF_EGUx);
- return (bool)(NRF_EGUx->INTENSET & egu_int_mask);
+ return (bool)(NRF_EGUx->INTENSET & mask);
}
-__STATIC_INLINE void nrf_egu_int_disable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask)
+__STATIC_INLINE void nrf_egu_int_disable(NRF_EGU_Type * NRF_EGUx, uint32_t mask)
{
NRFX_ASSERT(NRF_EGUx);
- NRF_EGUx->INTENCLR = egu_int_mask;
+ NRF_EGUx->INTENCLR = mask;
}
__STATIC_INLINE nrf_egu_int_mask_t nrf_egu_int_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel)
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_ficr.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_ficr.h
new file mode 100644
index 0000000..40b5698
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_ficr.h
@@ -0,0 +1,150 @@
+/*
+ * Copyright (c) 2018 - 2019, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef NRF_FICR_H__
+#define NRF_FICR_H__
+
+#include <nrfx.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup nrf_ficr_hal FICR HAL
+ * @{
+ * @ingroup nrf_ficr
+ * @brief Hardware access layer (HAL) for getting data from
+ * the Factory Information Configuration Registers (FICR).
+ */
+
+/**
+ * @brief Function for getting the size of the code memory page.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @return Code memory page size in bytes.
+ */
+__STATIC_INLINE uint32_t nrf_ficr_codepagesize_get(NRF_FICR_Type const * p_reg);
+
+/**
+ * @brief Function for getting the size of the code memory rendered as number of pages.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @return Code memory size rendered as number of pages.
+ */
+__STATIC_INLINE uint32_t nrf_ficr_codesize_get(NRF_FICR_Type const * p_reg);
+
+/**
+ * @brief Function for getting the unique device identifier.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] reg_id Register index.
+ *
+ * @return Unique device identifier.
+ */
+__STATIC_INLINE uint32_t nrf_ficr_deviceid_get(NRF_FICR_Type const * p_reg, uint32_t reg_id);
+
+#if defined(FICR_NFC_TAGHEADER0_MFGID_Msk) || defined(__NRFX_DOXYGEN__)
+/**
+ * @brief Function for getting the default header values for the NFC tag.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] tagheader_id Tag header index.
+ *
+ * @return The default header value of the NFC tag for the specified header index.
+ */
+__STATIC_INLINE uint32_t nrf_ficr_nfc_tagheader_get(NRF_FICR_Type const * p_reg,
+ uint32_t tagheader_id);
+#endif // defined(FICR_NFC_TAGHEADER0_MFGID_Msk) || defined(__NRFX_DOXYGEN__)
+
+#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+
+__STATIC_INLINE uint32_t nrf_ficr_codepagesize_get(NRF_FICR_Type const * p_reg)
+{
+#if defined(FICR_INFO_CODEPAGESIZE_CODEPAGESIZE_Msk)
+ return p_reg->INFO.CODEPAGESIZE;
+#else
+ return p_reg->CODEPAGESIZE;
+#endif
+}
+
+__STATIC_INLINE uint32_t nrf_ficr_codesize_get(NRF_FICR_Type const * p_reg)
+{
+#if defined(FICR_INFO_CODESIZE_CODESIZE_Msk)
+ return p_reg->INFO.CODESIZE;
+#else
+ return p_reg->CODESIZE;
+#endif
+}
+
+__STATIC_INLINE uint32_t nrf_ficr_deviceid_get(NRF_FICR_Type const * p_reg, uint32_t reg_id)
+{
+#if defined(FICR_INFO_DEVICEID_DEVICEID_Msk)
+ return p_reg->INFO.DEVICEID[reg_id];
+#else
+ return p_reg->DEVICEID[reg_id];
+#endif
+}
+
+#if defined(FICR_NFC_TAGHEADER0_MFGID_Msk)
+__STATIC_INLINE uint32_t nrf_ficr_nfc_tagheader_get(NRF_FICR_Type const * p_reg,
+ uint32_t tagheader_id)
+{
+ switch(tagheader_id) {
+ case 0:
+ return p_reg->NFC.TAGHEADER0;
+ break;
+ case 1:
+ return p_reg->NFC.TAGHEADER1;
+ break;
+ case 2:
+ return p_reg->NFC.TAGHEADER2;
+ break;
+ case 3:
+ return p_reg->NFC.TAGHEADER3;
+ break;
+ default:
+ return 0;
+ }
+}
+#endif // defined(FICR_NFC_TAGHEADER0_MFGID_Msk)
+
+#endif // SUPPRESS_INLINE_IMPLEMENTATION
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // NRF_FICR_H__
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_gpio.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_gpio.h
index 7af4c54..06a643c 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_gpio.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_gpio.h
@@ -38,13 +38,6 @@
extern "C" {
#endif
-/**
- * @defgroup nrf_gpio_hal GPIO HAL
- * @{
- * @ingroup nrf_gpio
- * @brief Hardware access layer for managing the GPIO peripheral.
- */
-
#ifndef NRF_P0
#define NRF_P0 NRF_GPIO
#endif
@@ -59,24 +52,25 @@
#error "Not supported."
#endif
-
/**
- * @brief Macro for mapping port and pin numbers to values understandable for nrf_gpio functions.
+ * @defgroup nrf_gpio_hal GPIO HAL
+ * @{
+ * @ingroup nrf_gpio
+ * @brief Hardware access layer for managing the GPIO peripheral.
*/
+
+/** @brief Macro for mapping port and pin numbers to values understandable for nrf_gpio functions. */
#define NRF_GPIO_PIN_MAP(port, pin) (((port) << 5) | ((pin) & 0x1F))
-/**
- * @brief Pin direction definitions.
- */
+
+/** @brief Pin direction definitions. */
typedef enum
{
NRF_GPIO_PIN_DIR_INPUT = GPIO_PIN_CNF_DIR_Input, ///< Input.
NRF_GPIO_PIN_DIR_OUTPUT = GPIO_PIN_CNF_DIR_Output ///< Output.
} nrf_gpio_pin_dir_t;
-/**
- * @brief Connection of input buffer.
- */
+/** @brief Connection of input buffer. */
typedef enum
{
NRF_GPIO_PIN_INPUT_CONNECT = GPIO_PIN_CNF_INPUT_Connect, ///< Connect input buffer.
@@ -84,7 +78,8 @@
} nrf_gpio_pin_input_t;
/**
- * @brief Enumerator used for selecting the pin to be pulled down or up at the time of pin configuration.
+ * @brief Enumerator used for selecting the pin to be pulled down or up at the time of pin
+ * configuration.
*/
typedef enum
{
@@ -93,9 +88,7 @@
NRF_GPIO_PIN_PULLUP = GPIO_PIN_CNF_PULL_Pullup, ///< Pin pull-up resistor enabled.
} nrf_gpio_pin_pull_t;
-/**
- * @brief Enumerator used for selecting output drive mode.
- */
+/** @brief Enumerator used for selecting output drive mode. */
typedef enum
{
NRF_GPIO_PIN_S0S1 = GPIO_PIN_CNF_DRIVE_S0S1, ///< !< Standard '0', standard '1'.
@@ -108,9 +101,7 @@
NRF_GPIO_PIN_H0D1 = GPIO_PIN_CNF_DRIVE_H0D1, ///< !< High-drive '0', disconnect '1'.
} nrf_gpio_pin_drive_t;
-/**
- * @brief Enumerator used for selecting the pin to sense high or low level on the pin input.
- */
+/** @brief Enumerator used for selecting the pin to sense high or low level on the pin input. */
typedef enum
{
NRF_GPIO_PIN_NOSENSE = GPIO_PIN_CNF_SENSE_Disabled, ///< Pin sense level disabled.
@@ -118,16 +109,16 @@
NRF_GPIO_PIN_SENSE_HIGH = GPIO_PIN_CNF_SENSE_High, ///< Pin sense high level.
} nrf_gpio_pin_sense_t;
+
/**
* @brief Function for configuring the GPIO pin range as output pins with normal drive strength.
* This function can be used to configure pin range as simple output with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
*
- * @param pin_range_start Specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30).
- *
- * @param pin_range_end Specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30).
- *
* @note For configuring only one pin as output, use @ref nrf_gpio_cfg_output.
* Sense capability on the pin is disabled and input is disconnected from the buffer as the pins are configured as output.
+ *
+ * @param pin_range_start Specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30).
+ * @param pin_range_end Specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30).
*/
__STATIC_INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_t pin_range_end);
@@ -135,14 +126,12 @@
* @brief Function for configuring the GPIO pin range as input pins with given initial value set, hiding inner details.
* This function can be used to configure pin range as simple input.
*
- * @param pin_range_start Specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30).
- *
- * @param pin_range_end Specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30).
- *
- * @param pull_config State of the pin range pull resistor (no pull, pulled down, or pulled high).
- *
* @note For configuring only one pin as input, use @ref nrf_gpio_cfg_input.
* Sense capability on the pin is disabled and input is connected to buffer so that the GPIO->IN register is readable.
+ *
+ * @param pin_range_start Specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30).
+ * @param pin_range_end Specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30).
+ * @param pull_config State of the pin range pull resistor (no pull, pulled down, or pulled high).
*/
__STATIC_INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start,
uint32_t pin_range_end,
@@ -153,6 +142,7 @@
*
* The main pin configuration function.
* This function allows to set any aspect in PIN_CNF register.
+ *
* @param pin_number Specifies the pin number.
* @param dir Pin direction.
* @param input Connect or disconnect the input buffer.
@@ -172,9 +162,9 @@
* @brief Function for configuring the given GPIO pin number as output, hiding inner details.
* This function can be used to configure a pin as simple output with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
*
- * @param pin_number Specifies the pin number.
- *
* @note Sense capability on the pin is disabled and input is disconnected from the buffer as the pins are configured as output.
+ *
+ * @param pin_number Specifies the pin number.
*/
__STATIC_INLINE void nrf_gpio_cfg_output(uint32_t pin_number);
@@ -182,10 +172,10 @@
* @brief Function for configuring the given GPIO pin number as input, hiding inner details.
* This function can be used to configure a pin as simple input.
*
- * @param pin_number Specifies the pin number.
- * @param pull_config State of the pin range pull resistor (no pull, pulled down, or pulled high).
- *
* @note Sense capability on the pin is disabled and input is connected to buffer so that the GPIO->IN register is readable.
+ *
+ * @param pin_number Specifies the pin number.
+ * @param pull_config State of the pin range pull resistor (no pull, pulled down, or pulled high).
*/
__STATIC_INLINE void nrf_gpio_cfg_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config);
@@ -208,7 +198,6 @@
* @brief Function for disconnecting input for the given GPIO.
*
* @param pin_number Specifies the pin number.
- *
*/
__STATIC_INLINE void nrf_gpio_input_disconnect(uint32_t pin_number);
@@ -230,7 +219,6 @@
*
* @param pin_number Specifies the pin number.
* @param sense_config Sense configuration.
- *
*/
__STATIC_INLINE void nrf_gpio_cfg_sense_set(uint32_t pin_number, nrf_gpio_pin_sense_t sense_config);
@@ -238,25 +226,23 @@
* @brief Function for setting the direction for a GPIO pin.
*
* @param pin_number Specifies the pin number for which to set the direction.
- *
- * @param direction Specifies the direction.
+ * @param direction Specifies the direction.
*/
__STATIC_INLINE void nrf_gpio_pin_dir_set(uint32_t pin_number, nrf_gpio_pin_dir_t direction);
/**
* @brief Function for setting a GPIO pin.
*
- * Note that the pin must be configured as an output for this function to have any effect.
+ * For this function to have any effect, the pin must be configured as an output.
*
- * @param pin_number Specifies the pin number to set.
+ * @param pin_number Specifies the pin number to be set.
*/
__STATIC_INLINE void nrf_gpio_pin_set(uint32_t pin_number);
/**
* @brief Function for clearing a GPIO pin.
*
- * Note that the pin must be configured as an output for this
- * function to have any effect.
+ * For this function to have any effect, the pin must be configured as an output.
*
* @param pin_number Specifies the pin number to clear.
*/
@@ -265,8 +251,7 @@
/**
* @brief Function for toggling a GPIO pin.
*
- * Note that the pin must be configured as an output for this
- * function to have any effect.
+ * For this function to have any effect, the pin must be configured as an output.
*
* @param pin_number Specifies the pin number to toggle.
*/
@@ -275,12 +260,10 @@
/**
* @brief Function for writing a value to a GPIO pin.
*
- * Note that the pin must be configured as an output for this
- * function to have any effect.
+ * For this function to have any effect, the pin must be configured as an output.
*
* @param pin_number Specifies the pin number to write.
- *
- * @param value Specifies the value to be written to the pin.
+ * @param value Specifies the value to be written to the pin.
* @arg 0 Clears the pin.
* @arg >=1 Sets the pin.
*/
@@ -289,8 +272,7 @@
/**
* @brief Function for reading the input level of a GPIO pin.
*
- * Note that the pin must have input connected for the value
- * returned from this function to be valid.
+ * If the value returned by this function is to be valid, the pin's input buffer must be connected.
*
* @param pin_number Specifies the pin number to read.
*
@@ -312,7 +294,7 @@
*
* @param pin_number Specifies the pin number to read.
*
- * @retval Sense configuration.
+ * @return Sense configuration.
*/
__STATIC_INLINE nrf_gpio_pin_sense_t nrf_gpio_pin_sense_get(uint32_t pin_number);
@@ -321,7 +303,7 @@
*
* @param pin_number Specifies the pin number to read.
*
- * @retval Direction configuration.
+ * @return Direction configuration.
*/
__STATIC_INLINE nrf_gpio_pin_dir_t nrf_gpio_pin_dir_get(uint32_t pin_number);
@@ -344,88 +326,82 @@
__STATIC_INLINE nrf_gpio_pin_pull_t nrf_gpio_pin_pull_get(uint32_t pin_number);
/**
- * @brief Function for setting output direction on selected pins on a given port.
+ * @brief Function for setting output direction on the selected pins on the given port.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
* @param out_mask Mask specifying the pins to set as output.
- *
*/
__STATIC_INLINE void nrf_gpio_port_dir_output_set(NRF_GPIO_Type * p_reg, uint32_t out_mask);
/**
* @brief Function for setting input direction on selected pins on a given port.
*
- * @param p_reg Pointer to the peripheral registers structure.
- * @param in_mask Mask specifying the pins to set as input.
- *
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param in_mask Mask that specifies the pins to be set as input.
*/
__STATIC_INLINE void nrf_gpio_port_dir_input_set(NRF_GPIO_Type * p_reg, uint32_t in_mask);
/**
- * @brief Function for writing the direction configuration of GPIO pins in a given port.
+ * @brief Function for writing the direction configuration of the GPIO pins in the given port.
*
- * @param p_reg Pointer to the peripheral registers structure.
- * @param dir_mask Mask specifying the direction of pins. Bit set means that the given pin is configured as output.
- *
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param dir_mask Mask that specifies the direction of pins. Bit set means that the given pin is configured as output.
*/
__STATIC_INLINE void nrf_gpio_port_dir_write(NRF_GPIO_Type * p_reg, uint32_t dir_mask);
/**
* @brief Function for reading the direction configuration of a GPIO port.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
*
- * @retval Pin configuration of the current direction settings. Bit set means that the given pin is configured as output.
+ * @return Pin configuration of the current direction settings. Bit set means that the given pin is configured as output.
*/
__STATIC_INLINE uint32_t nrf_gpio_port_dir_read(NRF_GPIO_Type const * p_reg);
/**
- * @brief Function for reading the input signals of GPIO pins on a given port.
+ * @brief Function for reading the input signals of the GPIO pins on the given port.
*
* @param p_reg Pointer to the peripheral registers structure.
*
- * @retval Port input values.
+ * @return Port input values.
*/
__STATIC_INLINE uint32_t nrf_gpio_port_in_read(NRF_GPIO_Type const * p_reg);
/**
- * @brief Function for reading the output signals of GPIO pins of a given port.
+ * @brief Function for reading the output signals of the GPIO pins on the given port.
*
* @param p_reg Pointer to the peripheral registers structure.
*
- * @retval Port output values.
+ * @return Port output values.
*/
__STATIC_INLINE uint32_t nrf_gpio_port_out_read(NRF_GPIO_Type const * p_reg);
/**
* @brief Function for writing the GPIO pins output on a given port.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
* @param value Output port mask.
- *
*/
__STATIC_INLINE void nrf_gpio_port_out_write(NRF_GPIO_Type * p_reg, uint32_t value);
/**
- * @brief Function for setting high level on selected GPIO pins of a given port.
+ * @brief Function for setting high level on selected the GPIO pins on the given port.
*
- * @param p_reg Pointer to the peripheral registers structure.
- * @param set_mask Mask with pins to set as logical high level.
- *
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param set_mask Mask with pins to be set as logical high level.
*/
__STATIC_INLINE void nrf_gpio_port_out_set(NRF_GPIO_Type * p_reg, uint32_t set_mask);
/**
- * @brief Function for setting low level on selected GPIO pins of a given port.
+ * @brief Function for setting low level on selected the GPIO pins on the given port.
*
- * @param p_reg Pointer to the peripheral registers structure.
- * @param clr_mask Mask with pins to set as logical low level.
- *
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param clr_mask Mask with pins to be set as logical low level.
*/
__STATIC_INLINE void nrf_gpio_port_out_clear(NRF_GPIO_Type * p_reg, uint32_t clr_mask);
/**
- * @brief Function for reading pins state of multiple consecutive ports.
+ * @brief Function for reading pin state of multiple consecutive ports.
*
* @param start_port Index of the first port to read.
* @param length Number of ports to read.
@@ -448,8 +424,8 @@
* @brief Function for reading latch state of single pin.
*
* @param pin_number Pin number.
- * @return 0 if latch is not set. Positive value otherwise.
*
+ * @return 0 if latch is not set. Positive value otherwise.
*/
__STATIC_INLINE uint32_t nrf_gpio_pin_latch_get(uint32_t pin_number);
@@ -457,20 +433,19 @@
* @brief Function for clearing latch state of a single pin.
*
* @param pin_number Pin number.
- *
*/
__STATIC_INLINE void nrf_gpio_pin_latch_clear(uint32_t pin_number);
#endif
+
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
/**
- * @brief Function for extracting port and relative pin number from absolute pin number.
+ * @brief Function for extracting port and the relative pin number from the absolute pin number.
*
- * @param[inout] Pointer to absolute pin number which is overriden by relative to port pin number.
+ * @param[in,out] p_pin Pointer to the absolute pin number overriden by the pin number that is relative to the port.
*
* @return Pointer to port register set.
- *
*/
__STATIC_INLINE NRF_GPIO_Type * nrf_gpio_pin_port_decode(uint32_t * p_pin)
{
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_gpiote.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_gpiote.h
index 346e950..294f079 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_gpiote.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_gpiote.h
@@ -42,19 +42,18 @@
* @defgroup nrf_gpiote_hal GPIOTE HAL
* @{
* @ingroup nrf_gpiote
-* @brief Hardware access layer for managing the GPIOTE peripheral.
+* @brief Hardware access layer (HAL) for managing the GPIOTE peripheral.
*/
-#ifdef GPIOTE_CONFIG_PORT_Msk
+#if defined(GPIOTE_CONFIG_PORT_Msk) || defined(__NRFX_DOXYGEN__)
+/** @brief Mask for covering port and pin bits in registers. */
#define GPIOTE_CONFIG_PORT_PIN_Msk (GPIOTE_CONFIG_PORT_Msk | GPIOTE_CONFIG_PSEL_Msk)
#else
#define GPIOTE_CONFIG_PORT_PIN_Msk GPIOTE_CONFIG_PSEL_Msk
#endif
- /**
- * @enum nrf_gpiote_polarity_t
- * @brief Polarity for the GPIOTE channel.
- */
+
+ /** @brief Polarity for the GPIOTE channel. */
typedef enum
{
NRF_GPIOTE_POLARITY_LOTOHI = GPIOTE_CONFIG_POLARITY_LoToHi, ///< Low to high.
@@ -62,78 +61,65 @@
NRF_GPIOTE_POLARITY_TOGGLE = GPIOTE_CONFIG_POLARITY_Toggle ///< Toggle.
} nrf_gpiote_polarity_t;
-
- /**
- * @enum nrf_gpiote_outinit_t
- * @brief Initial output value for the GPIOTE channel.
- */
+/** @brief Initial output value for the GPIOTE channel. */
typedef enum
{
NRF_GPIOTE_INITIAL_VALUE_LOW = GPIOTE_CONFIG_OUTINIT_Low, ///< Low to high.
NRF_GPIOTE_INITIAL_VALUE_HIGH = GPIOTE_CONFIG_OUTINIT_High ///< High to low.
} nrf_gpiote_outinit_t;
-/**
- * @brief Tasks.
- */
-typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
+/** @brief GPIOTE tasks. */
+typedef enum
{
- NRF_GPIOTE_TASKS_OUT_0 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[0]), /**< Out task 0.*/
- NRF_GPIOTE_TASKS_OUT_1 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[1]), /**< Out task 1.*/
- NRF_GPIOTE_TASKS_OUT_2 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[2]), /**< Out task 2.*/
- NRF_GPIOTE_TASKS_OUT_3 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[3]), /**< Out task 3.*/
+ NRF_GPIOTE_TASKS_OUT_0 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[0]), /**< Out task 0. */
+ NRF_GPIOTE_TASKS_OUT_1 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[1]), /**< Out task 1. */
+ NRF_GPIOTE_TASKS_OUT_2 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[2]), /**< Out task 2. */
+ NRF_GPIOTE_TASKS_OUT_3 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[3]), /**< Out task 3. */
#if (GPIOTE_CH_NUM > 4) || defined(__NRFX_DOXYGEN__)
- NRF_GPIOTE_TASKS_OUT_4 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[4]), /**< Out task 4.*/
- NRF_GPIOTE_TASKS_OUT_5 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[5]), /**< Out task 5.*/
- NRF_GPIOTE_TASKS_OUT_6 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[6]), /**< Out task 6.*/
- NRF_GPIOTE_TASKS_OUT_7 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[7]), /**< Out task 7.*/
+ NRF_GPIOTE_TASKS_OUT_4 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[4]), /**< Out task 4. */
+ NRF_GPIOTE_TASKS_OUT_5 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[5]), /**< Out task 5. */
+ NRF_GPIOTE_TASKS_OUT_6 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[6]), /**< Out task 6. */
+ NRF_GPIOTE_TASKS_OUT_7 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[7]), /**< Out task 7. */
#endif
#if defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__NRFX_DOXYGEN__)
- NRF_GPIOTE_TASKS_SET_0 = offsetof(NRF_GPIOTE_Type, TASKS_SET[0]), /**< Set task 0.*/
- NRF_GPIOTE_TASKS_SET_1 = offsetof(NRF_GPIOTE_Type, TASKS_SET[1]), /**< Set task 1.*/
- NRF_GPIOTE_TASKS_SET_2 = offsetof(NRF_GPIOTE_Type, TASKS_SET[2]), /**< Set task 2.*/
- NRF_GPIOTE_TASKS_SET_3 = offsetof(NRF_GPIOTE_Type, TASKS_SET[3]), /**< Set task 3.*/
- NRF_GPIOTE_TASKS_SET_4 = offsetof(NRF_GPIOTE_Type, TASKS_SET[4]), /**< Set task 4.*/
- NRF_GPIOTE_TASKS_SET_5 = offsetof(NRF_GPIOTE_Type, TASKS_SET[5]), /**< Set task 5.*/
- NRF_GPIOTE_TASKS_SET_6 = offsetof(NRF_GPIOTE_Type, TASKS_SET[6]), /**< Set task 6.*/
- NRF_GPIOTE_TASKS_SET_7 = offsetof(NRF_GPIOTE_Type, TASKS_SET[7]), /**< Set task 7.*/
+ NRF_GPIOTE_TASKS_SET_0 = offsetof(NRF_GPIOTE_Type, TASKS_SET[0]), /**< Set task 0. */
+ NRF_GPIOTE_TASKS_SET_1 = offsetof(NRF_GPIOTE_Type, TASKS_SET[1]), /**< Set task 1. */
+ NRF_GPIOTE_TASKS_SET_2 = offsetof(NRF_GPIOTE_Type, TASKS_SET[2]), /**< Set task 2. */
+ NRF_GPIOTE_TASKS_SET_3 = offsetof(NRF_GPIOTE_Type, TASKS_SET[3]), /**< Set task 3. */
+ NRF_GPIOTE_TASKS_SET_4 = offsetof(NRF_GPIOTE_Type, TASKS_SET[4]), /**< Set task 4. */
+ NRF_GPIOTE_TASKS_SET_5 = offsetof(NRF_GPIOTE_Type, TASKS_SET[5]), /**< Set task 5. */
+ NRF_GPIOTE_TASKS_SET_6 = offsetof(NRF_GPIOTE_Type, TASKS_SET[6]), /**< Set task 6. */
+ NRF_GPIOTE_TASKS_SET_7 = offsetof(NRF_GPIOTE_Type, TASKS_SET[7]), /**< Set task 7. */
#endif
#if defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__NRFX_DOXYGEN__)
- NRF_GPIOTE_TASKS_CLR_0 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[0]), /**< Clear task 0.*/
- NRF_GPIOTE_TASKS_CLR_1 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[1]), /**< Clear task 1.*/
- NRF_GPIOTE_TASKS_CLR_2 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[2]), /**< Clear task 2.*/
- NRF_GPIOTE_TASKS_CLR_3 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[3]), /**< Clear task 3.*/
- NRF_GPIOTE_TASKS_CLR_4 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[4]), /**< Clear task 4.*/
- NRF_GPIOTE_TASKS_CLR_5 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[5]), /**< Clear task 5.*/
- NRF_GPIOTE_TASKS_CLR_6 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[6]), /**< Clear task 6.*/
- NRF_GPIOTE_TASKS_CLR_7 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[7]), /**< Clear task 7.*/
+ NRF_GPIOTE_TASKS_CLR_0 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[0]), /**< Clear task 0. */
+ NRF_GPIOTE_TASKS_CLR_1 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[1]), /**< Clear task 1. */
+ NRF_GPIOTE_TASKS_CLR_2 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[2]), /**< Clear task 2. */
+ NRF_GPIOTE_TASKS_CLR_3 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[3]), /**< Clear task 3. */
+ NRF_GPIOTE_TASKS_CLR_4 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[4]), /**< Clear task 4. */
+ NRF_GPIOTE_TASKS_CLR_5 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[5]), /**< Clear task 5. */
+ NRF_GPIOTE_TASKS_CLR_6 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[6]), /**< Clear task 6. */
+ NRF_GPIOTE_TASKS_CLR_7 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[7]), /**< Clear task 7. */
#endif
- /*lint -restore*/
} nrf_gpiote_tasks_t;
-/**
- * @brief Events.
- */
-typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
+/** @brief GPIOTE events. */
+typedef enum
{
- NRF_GPIOTE_EVENTS_IN_0 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[0]), /**< In event 0.*/
- NRF_GPIOTE_EVENTS_IN_1 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[1]), /**< In event 1.*/
- NRF_GPIOTE_EVENTS_IN_2 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[2]), /**< In event 2.*/
- NRF_GPIOTE_EVENTS_IN_3 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[3]), /**< In event 3.*/
+ NRF_GPIOTE_EVENTS_IN_0 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[0]), /**< In event 0. */
+ NRF_GPIOTE_EVENTS_IN_1 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[1]), /**< In event 1. */
+ NRF_GPIOTE_EVENTS_IN_2 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[2]), /**< In event 2. */
+ NRF_GPIOTE_EVENTS_IN_3 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[3]), /**< In event 3. */
#if (GPIOTE_CH_NUM > 4) || defined(__NRFX_DOXYGEN__)
- NRF_GPIOTE_EVENTS_IN_4 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[4]), /**< In event 4.*/
- NRF_GPIOTE_EVENTS_IN_5 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[5]), /**< In event 5.*/
- NRF_GPIOTE_EVENTS_IN_6 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[6]), /**< In event 6.*/
- NRF_GPIOTE_EVENTS_IN_7 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[7]), /**< In event 7.*/
+ NRF_GPIOTE_EVENTS_IN_4 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[4]), /**< In event 4. */
+ NRF_GPIOTE_EVENTS_IN_5 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[5]), /**< In event 5. */
+ NRF_GPIOTE_EVENTS_IN_6 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[6]), /**< In event 6. */
+ NRF_GPIOTE_EVENTS_IN_7 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[7]), /**< In event 7. */
#endif
- NRF_GPIOTE_EVENTS_PORT = offsetof(NRF_GPIOTE_Type, EVENTS_PORT), /**< Port event.*/
- /*lint -restore*/
+ NRF_GPIOTE_EVENTS_PORT = offsetof(NRF_GPIOTE_Type, EVENTS_PORT), /**< Port event. */
} nrf_gpiote_events_t;
-/**
- * @enum nrf_gpiote_int_t
- * @brief GPIOTE interrupts.
- */
+/** @brief GPIOTE interrupts. */
typedef enum
{
NRF_GPIOTE_INT_IN0_MASK = GPIOTE_INTENSET_IN0_Msk, /**< GPIOTE interrupt from IN0. */
@@ -149,10 +135,11 @@
NRF_GPIOTE_INT_PORT_MASK = (int)GPIOTE_INTENSET_PORT_Msk, /**< GPIOTE interrupt from PORT event. */
} nrf_gpiote_int_t;
+#if (GPIOTE_CH_NUM == 4) || defined(__NRFX_DOXYGEN__)
+/** @brief Mask holding positions of available GPIOTE input interrupts. */
#define NRF_GPIOTE_INT_IN_MASK (NRF_GPIOTE_INT_IN0_MASK | NRF_GPIOTE_INT_IN1_MASK |\
NRF_GPIOTE_INT_IN2_MASK | NRF_GPIOTE_INT_IN3_MASK)
-#if (GPIOTE_CH_NUM > 4)
-#undef NRF_GPIOTE_INT_IN_MASK
+#else
#define NRF_GPIOTE_INT_IN_MASK (NRF_GPIOTE_INT_IN0_MASK | NRF_GPIOTE_INT_IN1_MASK |\
NRF_GPIOTE_INT_IN2_MASK | NRF_GPIOTE_INT_IN3_MASK |\
NRF_GPIOTE_INT_IN4_MASK | NRF_GPIOTE_INT_IN5_MASK |\
@@ -160,61 +147,67 @@
#endif
/**
- * @brief Function for activating a specific GPIOTE task.
+ * @brief Function for activating the specified GPIOTE task.
*
- * @param[in] task Task.
+ * @param[in] task Task.
*/
__STATIC_INLINE void nrf_gpiote_task_set(nrf_gpiote_tasks_t task);
/**
- * @brief Function for getting the address of a specific GPIOTE task.
+ * @brief Function for getting the address of the specified GPIOTE task.
*
* @param[in] task Task.
*
- * @returns Address.
+ * @return Address of the specified task.
*/
__STATIC_INLINE uint32_t nrf_gpiote_task_addr_get(nrf_gpiote_tasks_t task);
/**
- * @brief Function for getting the state of a specific GPIOTE event.
+ * @brief Function for getting the state of the specified GPIOTE event.
*
* @param[in] event Event.
+ *
+ * @retval true The event is set.
+ * @retval false The event is not set.
*/
__STATIC_INLINE bool nrf_gpiote_event_is_set(nrf_gpiote_events_t event);
/**
- * @brief Function for clearing a specific GPIOTE event.
+ * @brief Function for clearing the specified GPIOTE event.
*
* @param[in] event Event.
*/
__STATIC_INLINE void nrf_gpiote_event_clear(nrf_gpiote_events_t event);
/**
- * @brief Function for getting the address of a specific GPIOTE event.
+ * @brief Function for getting the address of the specified GPIOTE event.
*
* @param[in] event Event.
*
- * @return Address
+ * @return Address of the specified event.
*/
__STATIC_INLINE uint32_t nrf_gpiote_event_addr_get(nrf_gpiote_events_t event);
-/**@brief Function for enabling interrupts.
+/**
+ * @brief Function for enabling interrupts.
*
- * @param[in] mask Interrupt mask to be enabled.
+ * @param[in] mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_gpiote_int_enable(uint32_t mask);
-/**@brief Function for disabling interrupts.
+/**
+ * @brief Function for disabling interrupts.
*
- * @param[in] mask Interrupt mask to be disabled.
+ * @param[in] mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_gpiote_int_disable(uint32_t mask);
-/**@brief Function for checking if interrupts are enabled.
+/**
+ * @brief Function for checking if interrupts are enabled.
*
- * @param[in] mask Mask of interrupt flags to check.
+ * @param[in] mask Mask of interrupts to be checked.
*
- * @return Mask with enabled interrupts.
+ * @return Mask with enabled interrupts.
*/
__STATIC_INLINE uint32_t nrf_gpiote_int_is_enabled(uint32_t mask);
@@ -256,77 +249,90 @@
__STATIC_INLINE void nrf_gpiote_publish_clear(nrf_gpiote_events_t event);
#endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
-/**@brief Function for enabling a GPIOTE event.
+/**
+ * @brief Function for enabling a GPIOTE event.
*
- * @param[in] idx Task-Event index.
+ * @param[in] idx Task-Event index.
*/
__STATIC_INLINE void nrf_gpiote_event_enable(uint32_t idx);
-/**@brief Function for disabling a GPIOTE event.
+/**
+ * @brief Function for disabling a GPIOTE event.
*
- * @param[in] idx Task-Event index.
+ * @param[in] idx Task-Event index.
*/
__STATIC_INLINE void nrf_gpiote_event_disable(uint32_t idx);
-/**@brief Function for configuring a GPIOTE event.
+/**
+ * @brief Function for configuring a GPIOTE event.
*
- * @param[in] idx Task-Event index.
- * @param[in] pin Pin associated with event.
- * @param[in] polarity Transition that should generate an event.
+ * @param[in] idx Task-Event index.
+ * @param[in] pin Pin associated with event.
+ * @param[in] polarity Transition that should generate an event.
*/
-__STATIC_INLINE void nrf_gpiote_event_configure(uint32_t idx, uint32_t pin,
+__STATIC_INLINE void nrf_gpiote_event_configure(uint32_t idx,
+ uint32_t pin,
nrf_gpiote_polarity_t polarity);
-/**@brief Function for getting the pin associated with a GPIOTE event.
+/**
+ * @brief Function for getting the pin associated with a GPIOTE event.
*
- * @param[in] idx Task-Event index.
+ * @param[in] idx Task-Event index.
*
* @return Pin number.
*/
__STATIC_INLINE uint32_t nrf_gpiote_event_pin_get(uint32_t idx);
-/**@brief Function for getting the polarity associated with a GPIOTE event.
+/**
+ * @brief Function for getting the polarity associated with a GPIOTE event.
*
- * @param[in] idx Task-Event index.
+ * @param[in] idx Task-Event index.
*
* @return Polarity.
*/
__STATIC_INLINE nrf_gpiote_polarity_t nrf_gpiote_event_polarity_get(uint32_t idx);
-/**@brief Function for enabling a GPIOTE task.
+/**
+ * @brief Function for enabling a GPIOTE task.
*
- * @param[in] idx Task-Event index.
+ * @param[in] idx Task-Event index.
*/
__STATIC_INLINE void nrf_gpiote_task_enable(uint32_t idx);
-/**@brief Function for disabling a GPIOTE task.
+/**
+ * @brief Function for disabling a GPIOTE task.
*
- * @param[in] idx Task-Event index.
+ * @param[in] idx Task-Event index.
*/
__STATIC_INLINE void nrf_gpiote_task_disable(uint32_t idx);
-/**@brief Function for configuring a GPIOTE task.
+/**
+ * @brief Function for configuring a GPIOTE task.
+ *
* @note Function is not configuring mode field so task is disabled after this function is called.
*
- * @param[in] idx Task-Event index.
- * @param[in] pin Pin associated with event.
- * @param[in] polarity Transition that should generate an event.
- * @param[in] init_val Initial value of the pin.
+ * @param[in] idx Task-Event index.
+ * @param[in] pin Pin associated with event.
+ * @param[in] polarity Transition that should generate an event.
+ * @param[in] init_val Initial value of the pin.
*/
-__STATIC_INLINE void nrf_gpiote_task_configure(uint32_t idx, uint32_t pin,
+__STATIC_INLINE void nrf_gpiote_task_configure(uint32_t idx,
+ uint32_t pin,
nrf_gpiote_polarity_t polarity,
nrf_gpiote_outinit_t init_val);
-/**@brief Function for forcing a specific state on the pin connected to GPIOTE.
+/**
+ * @brief Function for forcing the specified state on the pin connected to GPIOTE.
*
- * @param[in] idx Task-Event index.
- * @param[in] init_val Pin state.
+ * @param[in] idx Task-Event index.
+ * @param[in] init_val Pin state.
*/
__STATIC_INLINE void nrf_gpiote_task_force(uint32_t idx, nrf_gpiote_outinit_t init_val);
-/**@brief Function for resetting a GPIOTE task event configuration to the default state.
+/**
+ * @brief Function for resetting a GPIOTE task event configuration to the default state.
*
- * @param[in] idx Task-Event index.
+ * @param[in] idx Task-Event index.
*/
__STATIC_INLINE void nrf_gpiote_te_default(uint32_t idx);
@@ -334,12 +340,53 @@
*
* @param[in] idx Task-Event index.
*
- * @retval true If the Task-Event mode is set to Task or Event.
- * @retval false If the Task-Event mode is set to Disabled.
+ * @retval true The Task-Event mode is set to Task or Event.
+ * @retval false The Task-Event mode is set to Disabled.
*/
__STATIC_INLINE bool nrf_gpiote_te_is_enabled(uint32_t idx);
+/**
+ * @brief Function for getting the OUT task associated with the specified GPIOTE channel.
+ *
+ * @param[in] index Channel index.
+ *
+ * @return Requested OUT task.
+ */
+__STATIC_INLINE nrf_gpiote_tasks_t nrf_gpiote_out_task_get(uint8_t index);
+
+#if defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__NRFX_DOXYGEN__)
+/**
+ * @brief Function for getting the SET task associated with the specified GPIOTE channel.
+ *
+ * @param[in] index Channel index.
+ *
+ * @return Requested SET task.
+ */
+__STATIC_INLINE nrf_gpiote_tasks_t nrf_gpiote_set_task_get(uint8_t index);
+#endif
+
+#if defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__NRFX_DOXYGEN__)
+/**
+ * @brief Function for getting the CLR task associated with the specified GPIOTE channel.
+ *
+ * @param[in] index Channel index.
+ *
+ * @return Requested CLR task.
+ */
+__STATIC_INLINE nrf_gpiote_tasks_t nrf_gpiote_clr_task_get(uint8_t index);
+#endif
+
+/**
+ * @brief Function for getting the IN event associated with the specified GPIOTE channel.
+ *
+ * @param[in] index Channel index.
+ *
+ * @return Requested IN event.
+ */
+__STATIC_INLINE nrf_gpiote_events_t nrf_gpiote_in_event_get(uint8_t index);
+
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+
__STATIC_INLINE void nrf_gpiote_task_set(nrf_gpiote_tasks_t task)
{
*(__IO uint32_t *)((uint32_t)NRF_GPIOTE + task) = 0x1UL;
@@ -443,7 +490,7 @@
#ifdef NRF51
/* Workaround for the OUTINIT PAN. When nrf_gpiote_task_config() is called a glitch happens
on the GPIO if the GPIO in question is already assigned to GPIOTE and the pin is in the
- correct state in GPIOTE but not in the OUT register. */
+ correct state in GPIOTE, but not in the OUT register. */
/* Configure channel to not existing, not connected to the pin, and configure as a tasks that will set it to proper level */
NRF_GPIOTE->CONFIG[idx] = final_config | (((31) << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk);
__NOP();
@@ -486,6 +533,35 @@
{
return (NRF_GPIOTE->CONFIG[idx] & GPIOTE_CONFIG_MODE_Msk) != GPIOTE_CONFIG_MODE_Disabled;
}
+
+__STATIC_INLINE nrf_gpiote_tasks_t nrf_gpiote_out_task_get(uint8_t index)
+{
+ NRFX_ASSERT(index < NRFX_ARRAY_SIZE(NRF_GPIOTE->TASKS_OUT));
+ return (nrf_gpiote_tasks_t)NRFX_OFFSETOF(NRF_GPIOTE_Type, TASKS_OUT[index]);
+}
+
+#if defined(GPIOTE_FEATURE_SET_PRESENT)
+__STATIC_INLINE nrf_gpiote_tasks_t nrf_gpiote_set_task_get(uint8_t index)
+{
+ NRFX_ASSERT(index < NRFX_ARRAY_SIZE(NRF_GPIOTE->TASKS_SET));
+ return (nrf_gpiote_tasks_t)NRFX_OFFSETOF(NRF_GPIOTE_Type, TASKS_SET[index]);
+}
+#endif
+
+#if defined(GPIOTE_FEATURE_CLR_PRESENT)
+__STATIC_INLINE nrf_gpiote_tasks_t nrf_gpiote_clr_task_get(uint8_t index)
+{
+ NRFX_ASSERT(index < NRFX_ARRAY_SIZE(NRF_GPIOTE->TASKS_CLR));
+ return (nrf_gpiote_tasks_t)NRFX_OFFSETOF(NRF_GPIOTE_Type, TASKS_CLR[index]);
+}
+#endif
+
+__STATIC_INLINE nrf_gpiote_events_t nrf_gpiote_in_event_get(uint8_t index)
+{
+ NRFX_ASSERT(index < NRFX_ARRAY_SIZE(NRF_GPIOTE->EVENTS_IN));
+ return (nrf_gpiote_events_t)NRFX_OFFSETOF(NRF_GPIOTE_Type, EVENTS_IN[index]);
+}
+
#endif //SUPPRESS_INLINE_IMPLEMENTATION
/** @} */
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_i2s.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_i2s.h
index 4e141ef..96c8b09 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_i2s.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_i2s.h
@@ -47,38 +47,28 @@
/**
* @brief This value can be provided as a parameter for the @ref nrf_i2s_pins_set
- * function call to specify that a given I2S signal (SDOUT, SDIN, or MCK)
+ * function call to specify that the given I2S signal (SDOUT, SDIN, or MCK)
* shall not be connected to a physical pin.
*/
#define NRF_I2S_PIN_NOT_CONNECTED 0xFFFFFFFF
-/**
- * @brief I2S tasks.
- */
+/** @brief I2S tasks. */
typedef enum
{
- /*lint -save -e30*/
NRF_I2S_TASK_START = offsetof(NRF_I2S_Type, TASKS_START), ///< Starts continuous I2S transfer. Also starts the MCK generator if this is enabled.
NRF_I2S_TASK_STOP = offsetof(NRF_I2S_Type, TASKS_STOP) ///< Stops I2S transfer. Also stops the MCK generator.
- /*lint -restore*/
} nrf_i2s_task_t;
-/**
- * @brief I2S events.
- */
+/** @brief I2S events. */
typedef enum
{
- /*lint -save -e30*/
- NRF_I2S_EVENT_RXPTRUPD = offsetof(NRF_I2S_Type, EVENTS_RXPTRUPD), ///< The RXD.PTR register has been copied to internal double-buffers.
- NRF_I2S_EVENT_TXPTRUPD = offsetof(NRF_I2S_Type, EVENTS_TXPTRUPD), ///< The TXD.PTR register has been copied to internal double-buffers.
+ NRF_I2S_EVENT_RXPTRUPD = offsetof(NRF_I2S_Type, EVENTS_RXPTRUPD), ///< The RXD.PTR register has been copied to internal double buffers.
+ NRF_I2S_EVENT_TXPTRUPD = offsetof(NRF_I2S_Type, EVENTS_TXPTRUPD), ///< The TXD.PTR register has been copied to internal double buffers.
NRF_I2S_EVENT_STOPPED = offsetof(NRF_I2S_Type, EVENTS_STOPPED) ///< I2S transfer stopped.
- /*lint -restore*/
} nrf_i2s_event_t;
-/**
- * @brief I2S interrupts.
- */
+/** @brief I2S interrupts. */
typedef enum
{
NRF_I2S_INT_RXPTRUPD_MASK = I2S_INTENSET_RXPTRUPD_Msk, ///< Interrupt on RXPTRUPD event.
@@ -86,18 +76,14 @@
NRF_I2S_INT_STOPPED_MASK = I2S_INTENSET_STOPPED_Msk ///< Interrupt on STOPPED event.
} nrf_i2s_int_mask_t;
-/**
- * @brief I2S modes of operation.
- */
+/** @brief I2S modes of operation. */
typedef enum
{
NRF_I2S_MODE_MASTER = I2S_CONFIG_MODE_MODE_Master, ///< Master mode.
NRF_I2S_MODE_SLAVE = I2S_CONFIG_MODE_MODE_Slave ///< Slave mode.
} nrf_i2s_mode_t;
-/**
- * @brief I2S master clock generator settings.
- */
+/** @brief I2S master clock generator settings. */
typedef enum
{
NRF_I2S_MCK_DISABLED = 0, ///< MCK disabled.
@@ -125,15 +111,15 @@
NRF_I2S_MCK_32MDIV16 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV16, ///< 32 MHz / 16 = 2.0 MHz.
NRF_I2S_MCK_32MDIV21 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV21, ///< 32 MHz / 21 = 1.5238095 MHz.
NRF_I2S_MCK_32MDIV23 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV23, ///< 32 MHz / 23 = 1.3913043 MHz.
+ NRF_I2S_MCK_32MDIV30 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV30, ///< 32 MHz / 30 = 1.0666667 MHz.
NRF_I2S_MCK_32MDIV31 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV31, ///< 32 MHz / 31 = 1.0322581 MHz.
+ NRF_I2S_MCK_32MDIV32 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV32, ///< 32 MHz / 32 = 1.0 MHz.
NRF_I2S_MCK_32MDIV42 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV42, ///< 32 MHz / 42 = 0.7619048 MHz.
NRF_I2S_MCK_32MDIV63 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV63, ///< 32 MHz / 63 = 0.5079365 MHz.
NRF_I2S_MCK_32MDIV125 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV125 ///< 32 MHz / 125 = 0.256 MHz.
} nrf_i2s_mck_t;
-/**
- * @brief I2S MCK/LRCK ratios.
- */
+/** @brief I2S MCK/LRCK ratios. */
typedef enum
{
NRF_I2S_RATIO_32X = I2S_CONFIG_RATIO_RATIO_32X, ///< LRCK = MCK / 32.
@@ -147,9 +133,7 @@
NRF_I2S_RATIO_512X = I2S_CONFIG_RATIO_RATIO_512X ///< LRCK = MCK / 512.
} nrf_i2s_ratio_t;
-/**
- * @brief I2S sample widths.
- */
+/** @brief I2S sample widths. */
typedef enum
{
NRF_I2S_SWIDTH_8BIT = I2S_CONFIG_SWIDTH_SWIDTH_8Bit, ///< 8 bit.
@@ -157,27 +141,21 @@
NRF_I2S_SWIDTH_24BIT = I2S_CONFIG_SWIDTH_SWIDTH_24Bit ///< 24 bit.
} nrf_i2s_swidth_t;
-/**
- * @brief I2S alignments of sample within a frame.
- */
+/** @brief I2S alignments of sample within a frame. */
typedef enum
{
NRF_I2S_ALIGN_LEFT = I2S_CONFIG_ALIGN_ALIGN_Left, ///< Left-aligned.
NRF_I2S_ALIGN_RIGHT = I2S_CONFIG_ALIGN_ALIGN_Right ///< Right-aligned.
} nrf_i2s_align_t;
-/**
- * @brief I2S frame formats.
- */
+/** @brief I2S frame formats. */
typedef enum
{
NRF_I2S_FORMAT_I2S = I2S_CONFIG_FORMAT_FORMAT_I2S, ///< Original I2S format.
- NRF_I2S_FORMAT_ALIGNED = I2S_CONFIG_FORMAT_FORMAT_Aligned ///< Alternate (left- or right-aligned) format.
+ NRF_I2S_FORMAT_ALIGNED = I2S_CONFIG_FORMAT_FORMAT_Aligned ///< Alternate (left-aligned or right-aligned) format.
} nrf_i2s_format_t;
-/**
- * @brief I2S enabled channels.
- */
+/** @brief I2S enabled channels. */
typedef enum
{
NRF_I2S_CHANNELS_STEREO = I2S_CONFIG_CHANNELS_CHANNELS_Stereo, ///< Stereo.
@@ -187,19 +165,19 @@
/**
- * @brief Function for activating a specific I2S task.
+ * @brief Function for activating the specified I2S task.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
- * @param[in] task Task to activate.
+ * @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_i2s_task_trigger(NRF_I2S_Type * p_reg,
nrf_i2s_task_t task);
/**
- * @brief Function for getting the address of a specific I2S task register.
+ * @brief Function for getting the address of the specified I2S task register.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
- * @param[in] task Requested task.
+ * @param[in] task Specified task.
*
* @return Address of the specified task register.
*/
@@ -207,31 +185,31 @@
nrf_i2s_task_t task);
/**
- * @brief Function for clearing a specific I2S event.
+ * @brief Function for clearing the specified I2S event.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to clear.
*/
-__STATIC_INLINE void nrf_i2s_event_clear(NRF_I2S_Type * p_reg,
+__STATIC_INLINE void nrf_i2s_event_clear(NRF_I2S_Type * p_reg,
nrf_i2s_event_t event);
/**
- * @brief Function for checking the state of a specific I2S event.
+ * @brief Function for retrieving the state of the I2S event.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
- * @param[in] event Event to check.
+ * @param[in] event Event to be checked.
*
- * @retval true If the event is set.
- * @retval false If the event is not set.
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_i2s_event_check(NRF_I2S_Type const * p_reg,
nrf_i2s_event_t event);
/**
- * @brief Function for getting the address of a specific I2S event register.
+ * @brief Function for getting the address of the specified I2S event register.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
- * @param[in] event Requested event.
+ * @param[in] event Specified event.
*
* @return Address of the specified event register.
*/
@@ -242,7 +220,7 @@
* @brief Function for enabling specified interrupts.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
- * @param[in] mask Interrupts to enable.
+ * @param[in] mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_i2s_int_enable(NRF_I2S_Type * p_reg, uint32_t mask);
@@ -250,18 +228,18 @@
* @brief Function for disabling specified interrupts.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
- * @param[in] mask Interrupts to disable.
+ * @param[in] mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_i2s_int_disable(NRF_I2S_Type * p_reg, uint32_t mask);
/**
* @brief Function for retrieving the state of a given interrupt.
*
- * @param[in] p_reg Pointer to the structure of registers of the peripheral.
- * @param[in] i2s_int Interrupt to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] i2s_int Interrupt to be checked.
*
- * @retval true If the interrupt is enabled.
- * @retval false If the interrupt is not enabled.
+ * @retval true The interrupt is enabled.
+ * @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_i2s_int_enable_check(NRF_I2S_Type const * p_reg,
nrf_i2s_int_mask_t i2s_int);
@@ -359,8 +337,8 @@
* @param[in] mck_setup Master clock generator setup.
* @param[in] ratio MCK/LRCK ratio.
*
- * @retval true If the configuration has been set successfully.
- * @retval false If the requested configuration is not allowed.
+ * @retval true The configuration has been set successfully.
+ * @retval false The specified configuration is not allowed.
*/
__STATIC_INLINE bool nrf_i2s_configure(NRF_I2S_Type * p_reg,
nrf_i2s_mode_t mode,
@@ -374,8 +352,8 @@
/**
* @brief Function for setting up the I2S transfer.
*
- * This function sets up the RX and TX buffers and enables reception and/or
- * transmission accordingly. If the transfer in a given direction is not
+ * This function sets up the RX and TX buffers and enables reception or
+ * transmission (or both) accordingly. If the transfer in a given direction is not
* required, pass NULL instead of the pointer to the corresponding buffer.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
@@ -550,7 +528,7 @@
{
if (mode == NRF_I2S_MODE_MASTER)
{
- // The MCK/LRCK ratio shall be a multiple of 2 * sample width.
+ // The MCK/LRCK ratio must be a multiple of 2 * sample width.
if (((sample_width == NRF_I2S_SWIDTH_16BIT) &&
(ratio == NRF_I2S_RATIO_48X))
||
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_kmu.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_kmu.h
index 3bfbcf4..064820f 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_kmu.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_kmu.h
@@ -78,15 +78,15 @@
/**
* @brief Function for activating a specific KMU task.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] task Task to activate.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_kmu_task_trigger(NRF_KMU_Type * p_reg, nrf_kmu_task_t task);
/**
* @brief Function for getting the address of a specific KMU task register.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task Requested task.
*
* @return Address of the specified task register.
@@ -96,26 +96,26 @@
/**
* @brief Function for clearing a specific KMU event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to clear.
*/
__STATIC_INLINE void nrf_kmu_event_clear(NRF_KMU_Type * p_reg, nrf_kmu_event_t event);
/**
- * @brief Function for checking the state of a specific KMU event.
+ * @brief Function for retrieving the state of the KMU event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] event Event to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to be checked.
*
- * @retval true If the event is set.
- * @retval false If the event is not set.
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_kmu_event_check(NRF_KMU_Type const * p_reg, nrf_kmu_event_t event);
/**
* @brief Function for getting the address of a specific KMU event register.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Requested event.
*
* @return Address of the specified event register.
@@ -126,27 +126,27 @@
/**
* @brief Function for enabling specified interrupts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] mask Interrupts to enable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Interrupts to be enabled.
*/
__STATIC_INLINE void nrf_kmu_int_enable(NRF_KMU_Type * p_reg, uint32_t mask);
/**
* @brief Function for disabling specified interrupts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] mask Interrupts to disable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Interrupts to be disabled.
*/
__STATIC_INLINE void nrf_kmu_int_disable(NRF_KMU_Type * p_reg, uint32_t mask);
/**
* @brief Function for retrieving the state of a given interrupt.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] kmu_int Interrupt to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] kmu_int Interrupt to be checked.
*
- * @retval true If the interrupt is enabled.
- * @retval false If the interrupt is not enabled.
+ * @retval true The interrupt is enabled.
+ * @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_kmu_int_enable_check(NRF_KMU_Type const * p_reg,
nrf_kmu_int_mask_t kmu_int);
@@ -156,7 +156,7 @@
*
* Function returns bitmask. Please use @ref nrf_kmu_int_mask_t to check interrupts status.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Bitmask with pending interrupts bits.
*/
@@ -167,7 +167,7 @@
*
* Function returns bitmask. Please use @ref nrf_kmu_status_t to check operations status.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Bitmask with operation status bits.
*/
@@ -176,7 +176,7 @@
/**
* @brief Function for selecting the key slot ID.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] keyslot_id Key slot ID to be read over AHB or pushed over
* secure APB when TASKS_PUSH_KEYSLOT is started.
*/
@@ -185,7 +185,7 @@
/**
* @brief Function for getting the key slot ID.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Key slot ID.
*/
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_lpcomp.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_lpcomp.h
index d1d249c..7afdf62 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_lpcomp.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_lpcomp.h
@@ -45,10 +45,7 @@
* @brief Hardware access layer for managing the Low Power Comparator (LPCOMP) peripheral.
*/
-/**
- * @enum nrf_lpcomp_ref_t
- * @brief LPCOMP reference selection.
- */
+/** @brief LPCOMP reference selection. */
typedef enum
{
#if (LPCOMP_REFSEL_RESOLUTION == 8) || defined(__NRFX_DOXYGEN__)
@@ -60,32 +57,29 @@
NRF_LPCOMP_REF_SUPPLY_6_8 = LPCOMP_REFSEL_REFSEL_SupplySixEighthsPrescaling, /**< Use supply with a 6/8 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_7_8 = LPCOMP_REFSEL_REFSEL_SupplySevenEighthsPrescaling, /**< Use supply with a 7/8 prescaler as reference. */
#elif (LPCOMP_REFSEL_RESOLUTION == 16) || defined(__NRFX_DOXYGEN__)
- NRF_LPCOMP_REF_SUPPLY_1_8 = LPCOMP_REFSEL_REFSEL_Ref1_8Vdd, /**< Use supply with a 1/8 prescaler as reference. */
- NRF_LPCOMP_REF_SUPPLY_2_8 = LPCOMP_REFSEL_REFSEL_Ref2_8Vdd, /**< Use supply with a 2/8 prescaler as reference. */
- NRF_LPCOMP_REF_SUPPLY_3_8 = LPCOMP_REFSEL_REFSEL_Ref3_8Vdd, /**< Use supply with a 3/8 prescaler as reference. */
- NRF_LPCOMP_REF_SUPPLY_4_8 = LPCOMP_REFSEL_REFSEL_Ref4_8Vdd, /**< Use supply with a 4/8 prescaler as reference. */
- NRF_LPCOMP_REF_SUPPLY_5_8 = LPCOMP_REFSEL_REFSEL_Ref5_8Vdd, /**< Use supply with a 5/8 prescaler as reference. */
- NRF_LPCOMP_REF_SUPPLY_6_8 = LPCOMP_REFSEL_REFSEL_Ref6_8Vdd, /**< Use supply with a 6/8 prescaler as reference. */
- NRF_LPCOMP_REF_SUPPLY_7_8 = LPCOMP_REFSEL_REFSEL_Ref7_8Vdd, /**< Use supply with a 7/8 prescaler as reference. */
- NRF_LPCOMP_REF_SUPPLY_1_16 = LPCOMP_REFSEL_REFSEL_Ref1_16Vdd, /**< Use supply with a 1/16 prescaler as reference. */
- NRF_LPCOMP_REF_SUPPLY_3_16 = LPCOMP_REFSEL_REFSEL_Ref3_16Vdd, /**< Use supply with a 3/16 prescaler as reference. */
- NRF_LPCOMP_REF_SUPPLY_5_16 = LPCOMP_REFSEL_REFSEL_Ref5_16Vdd, /**< Use supply with a 5/16 prescaler as reference. */
- NRF_LPCOMP_REF_SUPPLY_7_16 = LPCOMP_REFSEL_REFSEL_Ref7_16Vdd, /**< Use supply with a 7/16 prescaler as reference. */
- NRF_LPCOMP_REF_SUPPLY_9_16 = LPCOMP_REFSEL_REFSEL_Ref9_16Vdd, /**< Use supply with a 9/16 prescaler as reference. */
+ NRF_LPCOMP_REF_SUPPLY_1_8 = LPCOMP_REFSEL_REFSEL_Ref1_8Vdd, /**< Use supply with a 1/8 prescaler as reference. */
+ NRF_LPCOMP_REF_SUPPLY_2_8 = LPCOMP_REFSEL_REFSEL_Ref2_8Vdd, /**< Use supply with a 2/8 prescaler as reference. */
+ NRF_LPCOMP_REF_SUPPLY_3_8 = LPCOMP_REFSEL_REFSEL_Ref3_8Vdd, /**< Use supply with a 3/8 prescaler as reference. */
+ NRF_LPCOMP_REF_SUPPLY_4_8 = LPCOMP_REFSEL_REFSEL_Ref4_8Vdd, /**< Use supply with a 4/8 prescaler as reference. */
+ NRF_LPCOMP_REF_SUPPLY_5_8 = LPCOMP_REFSEL_REFSEL_Ref5_8Vdd, /**< Use supply with a 5/8 prescaler as reference. */
+ NRF_LPCOMP_REF_SUPPLY_6_8 = LPCOMP_REFSEL_REFSEL_Ref6_8Vdd, /**< Use supply with a 6/8 prescaler as reference. */
+ NRF_LPCOMP_REF_SUPPLY_7_8 = LPCOMP_REFSEL_REFSEL_Ref7_8Vdd, /**< Use supply with a 7/8 prescaler as reference. */
+ NRF_LPCOMP_REF_SUPPLY_1_16 = LPCOMP_REFSEL_REFSEL_Ref1_16Vdd, /**< Use supply with a 1/16 prescaler as reference. */
+ NRF_LPCOMP_REF_SUPPLY_3_16 = LPCOMP_REFSEL_REFSEL_Ref3_16Vdd, /**< Use supply with a 3/16 prescaler as reference. */
+ NRF_LPCOMP_REF_SUPPLY_5_16 = LPCOMP_REFSEL_REFSEL_Ref5_16Vdd, /**< Use supply with a 5/16 prescaler as reference. */
+ NRF_LPCOMP_REF_SUPPLY_7_16 = LPCOMP_REFSEL_REFSEL_Ref7_16Vdd, /**< Use supply with a 7/16 prescaler as reference. */
+ NRF_LPCOMP_REF_SUPPLY_9_16 = LPCOMP_REFSEL_REFSEL_Ref9_16Vdd, /**< Use supply with a 9/16 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_11_16 = LPCOMP_REFSEL_REFSEL_Ref11_16Vdd, /**< Use supply with a 11/16 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_13_16 = LPCOMP_REFSEL_REFSEL_Ref13_16Vdd, /**< Use supply with a 13/16 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_15_16 = LPCOMP_REFSEL_REFSEL_Ref15_16Vdd, /**< Use supply with a 15/16 prescaler as reference. */
#endif
NRF_LPCOMP_REF_EXT_REF0 = LPCOMP_REFSEL_REFSEL_ARef |
- (LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference0 << 16), /**< External reference 0. */
+ (LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference0 << 16), /**< External reference 0. */
NRF_LPCOMP_CONFIG_REF_EXT_REF1 = LPCOMP_REFSEL_REFSEL_ARef |
(LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference1 << 16), /**< External reference 1. */
} nrf_lpcomp_ref_t;
-/**
- * @enum nrf_lpcomp_input_t
- * @brief LPCOMP input selection.
- */
+/** @brief LPCOMP input selection. */
typedef enum
{
NRF_LPCOMP_INPUT_0 = LPCOMP_PSEL_PSEL_AnalogInput0, /**< Input 0. */
@@ -98,10 +92,7 @@
NRF_LPCOMP_INPUT_7 = LPCOMP_PSEL_PSEL_AnalogInput7 /**< Input 7. */
} nrf_lpcomp_input_t;
-/**
- * @enum nrf_lpcomp_detect_t
- * @brief LPCOMP detection type selection.
- */
+/** @brief LPCOMP detection type selection. */
typedef enum
{
NRF_LPCOMP_DETECT_CROSS = LPCOMP_ANADETECT_ANADETECT_Cross, /**< Generate ANADETEC on crossing, both upwards and downwards crossing. */
@@ -109,52 +100,40 @@
NRF_LPCOMP_DETECT_DOWN = LPCOMP_ANADETECT_ANADETECT_Down /**< Generate ANADETEC on downwards crossing only. */
} nrf_lpcomp_detect_t;
-/**
- * @enum nrf_lpcomp_task_t
- * @brief LPCOMP tasks.
- */
-typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
+/** @brief LPCOMP tasks. */
+typedef enum
{
NRF_LPCOMP_TASK_START = offsetof(NRF_LPCOMP_Type, TASKS_START), /**< LPCOMP start sampling task. */
NRF_LPCOMP_TASK_STOP = offsetof(NRF_LPCOMP_Type, TASKS_STOP), /**< LPCOMP stop sampling task. */
NRF_LPCOMP_TASK_SAMPLE = offsetof(NRF_LPCOMP_Type, TASKS_SAMPLE) /**< Sample comparator value. */
-} nrf_lpcomp_task_t; /*lint -restore*/
+} nrf_lpcomp_task_t;
-/**
- * @enum nrf_lpcomp_event_t
- * @brief LPCOMP events.
- */
-typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
+/** @brief LPCOMP events. */
+typedef enum
{
NRF_LPCOMP_EVENT_READY = offsetof(NRF_LPCOMP_Type, EVENTS_READY), /**< LPCOMP is ready and output is valid. */
NRF_LPCOMP_EVENT_DOWN = offsetof(NRF_LPCOMP_Type, EVENTS_DOWN), /**< Input voltage crossed the threshold going down. */
NRF_LPCOMP_EVENT_UP = offsetof(NRF_LPCOMP_Type, EVENTS_UP), /**< Input voltage crossed the threshold going up. */
NRF_LPCOMP_EVENT_CROSS = offsetof(NRF_LPCOMP_Type, EVENTS_CROSS) /**< Input voltage crossed the threshold in any direction. */
-} nrf_lpcomp_event_t; /*lint -restore*/
+} nrf_lpcomp_event_t;
-/**
- * @enum nrf_lpcomp_short_mask_t
- * @brief LPCOMP shorts masks.
- */
+/** @brief LPCOMP shortcut masks. */
typedef enum
{
- NRF_LPCOMP_SHORT_CROSS_STOP_MASK = LPCOMP_SHORTS_CROSS_STOP_Msk, /*!< Short between CROSS event and STOP task. */
- NRF_LPCOMP_SHORT_UP_STOP_MASK = LPCOMP_SHORTS_UP_STOP_Msk, /*!< Short between UP event and STOP task. */
- NRF_LPCOMP_SHORT_DOWN_STOP_MASK = LPCOMP_SHORTS_DOWN_STOP_Msk, /*!< Short between DOWN event and STOP task. */
- NRF_LPCOMP_SHORT_READY_STOP_MASK = LPCOMP_SHORTS_READY_STOP_Msk, /*!< Short between READY event and STOP task. */
- NRF_LPCOMP_SHORT_READY_SAMPLE_MASK = LPCOMP_SHORTS_READY_SAMPLE_Msk /*!< Short between READY event and SAMPLE task. */
+ NRF_LPCOMP_SHORT_CROSS_STOP_MASK = LPCOMP_SHORTS_CROSS_STOP_Msk, /*!< Shortcut between CROSS event and STOP task. */
+ NRF_LPCOMP_SHORT_UP_STOP_MASK = LPCOMP_SHORTS_UP_STOP_Msk, /*!< Shortcut between UP event and STOP task. */
+ NRF_LPCOMP_SHORT_DOWN_STOP_MASK = LPCOMP_SHORTS_DOWN_STOP_Msk, /*!< Shortcut between DOWN event and STOP task. */
+ NRF_LPCOMP_SHORT_READY_STOP_MASK = LPCOMP_SHORTS_READY_STOP_Msk, /*!< Shortcut between READY event and STOP task. */
+ NRF_LPCOMP_SHORT_READY_SAMPLE_MASK = LPCOMP_SHORTS_READY_SAMPLE_Msk /*!< Shortcut between READY event and SAMPLE task. */
} nrf_lpcomp_short_mask_t;
#ifdef LPCOMP_FEATURE_HYST_PRESENT
-/**
- * @enum nrf_lpcomp_hysteresis_t
- * @brief LPCOMP hysteresis.
- */
+/** @brief LPCOMP hysteresis. */
typedef enum
{
NRF_LPCOMP_HYST_NOHYST = LPCOMP_HYST_HYST_NoHyst, /**< Comparator hysteresis disabled. */
- NRF_LPCOMP_HYST_50mV = LPCOMP_HYST_HYST_Hyst50mV /**< Comparator hysteresis enabled (typ. 50 mV). */
+ NRF_LPCOMP_HYST_50mV = LPCOMP_HYST_HYST_Hyst50mV /**< Comparator hysteresis enabled (typically 50 mV). */
}nrf_lpcomp_hysteresis_t;
#endif // LPCOMP_FEATURE_HYST_PRESENT
@@ -168,9 +147,11 @@
#endif // LPCOMP_FEATURE_HYST_PRESENT
} nrf_lpcomp_config_t;
+
/** Default LPCOMP configuration. */
#define NRF_LPCOMP_CONFIG_DEFAULT { NRF_LPCOMP_REF_SUPPLY_FOUR_EIGHT, NRF_LPCOMP_DETECT_DOWN }
+
/**
* @brief Function for configuring LPCOMP.
*
@@ -194,7 +175,6 @@
* @brief Function for enabling the Low Power Comparator.
*
* This function enables LPCOMP.
- *
*/
__STATIC_INLINE void nrf_lpcomp_enable(void);
@@ -202,7 +182,6 @@
* @brief Function for disabling the Low Power Comparator.
*
* This function disables LPCOMP.
- *
*/
__STATIC_INLINE void nrf_lpcomp_disable(void);
@@ -216,92 +195,91 @@
/**
* @brief Function for enabling interrupts from LPCOMP.
*
- * @param[in] lpcomp_int_mask Mask of interrupts to be enabled.
+ * @param[in] int_mask Mask of interrupts to be enabled.
*
- * @sa nrf_lpcomp_int_disable()
- * @sa nrf_lpcomp_int_enable_check()
+ * @sa nrf_lpcomp_int_disable
+ * @sa nrf_lpcomp_int_enable_check
*/
-__STATIC_INLINE void nrf_lpcomp_int_enable(uint32_t lpcomp_int_mask);
+__STATIC_INLINE void nrf_lpcomp_int_enable(uint32_t int_mask);
/**
* @brief Function for disabling interrupts from LPCOMP.
*
- * @param[in] lpcomp_int_mask Mask of interrupts to be disabled.
+ * @param[in] int_mask Mask of interrupts to be disabled.
*
- * @sa nrf_lpcomp_int_enable()
- * @sa nrf_lpcomp_int_enable_check()
+ * @sa nrf_lpcomp_int_enable
+ * @sa nrf_lpcomp_int_enable_check
*/
-__STATIC_INLINE void nrf_lpcomp_int_disable(uint32_t lpcomp_int_mask);
+__STATIC_INLINE void nrf_lpcomp_int_disable(uint32_t int_mask);
/**
* @brief Function for getting the enabled interrupts of LPCOMP.
*
- * @param[in] lpcomp_int_mask Mask of interrupts to be checked.
+ * @param[in] int_mask Mask of interrupts to be checked.
*
- * @retval true If any of interrupts of the specified mask are enabled.
+ * @retval true Any of interrupts of the specified mask are enabled.
+ * @retval false None interrupt specified by the mask are enabled.
*
- * @sa nrf_lpcomp_int_enable()
- * @sa nrf_lpcomp_int_disable()
+ * @sa nrf_lpcomp_int_enable
+ * @sa nrf_lpcomp_int_disable
*/
-__STATIC_INLINE bool nrf_lpcomp_int_enable_check(uint32_t lpcomp_int_mask);
+__STATIC_INLINE bool nrf_lpcomp_int_enable_check(uint32_t int_mask);
/**
- * @brief Function for getting the address of a specific LPCOMP task register.
+ * @brief Function for getting the address of the specified LPCOMP task register.
*
- * @param[in] lpcomp_task LPCOMP task.
+ * @param[in] task LPCOMP task.
*
* @return The address of the specified LPCOMP task.
*/
-__STATIC_INLINE uint32_t * nrf_lpcomp_task_address_get(nrf_lpcomp_task_t lpcomp_task);
+__STATIC_INLINE uint32_t * nrf_lpcomp_task_address_get(nrf_lpcomp_task_t task);
/**
- * @brief Function for getting the address of a specific LPCOMP event register.
+ * @brief Function for getting the address of the specified LPCOMP event register.
*
- * @param[in] lpcomp_event LPCOMP event.
+ * @param[in] event LPCOMP event.
*
* @return The address of the specified LPCOMP event.
*/
-__STATIC_INLINE uint32_t * nrf_lpcomp_event_address_get(nrf_lpcomp_event_t lpcomp_event);
+__STATIC_INLINE uint32_t * nrf_lpcomp_event_address_get(nrf_lpcomp_event_t event);
/**
* @brief Function for setting LPCOMP shorts.
*
- * @param[in] lpcomp_short_mask LPCOMP shorts by mask.
- *
+ * @param[in] mask Mask of shortcuts.
*/
-__STATIC_INLINE void nrf_lpcomp_shorts_enable(uint32_t lpcomp_short_mask);
+__STATIC_INLINE void nrf_lpcomp_shorts_enable(uint32_t mask);
/**
* @brief Function for clearing LPCOMP shorts by mask.
*
- * @param[in] lpcomp_short_mask LPCOMP shorts to be cleared.
- *
+ * @param[in] mask Mask of shortcuts.
*/
-__STATIC_INLINE void nrf_lpcomp_shorts_disable(uint32_t lpcomp_short_mask);
+__STATIC_INLINE void nrf_lpcomp_shorts_disable(uint32_t mask);
/**
- * @brief Function for setting a specific LPCOMP task.
+ * @brief Function for setting the specified LPCOMP task.
*
- * @param[in] lpcomp_task LPCOMP task to be set.
- *
+ * @param[in] task LPCOMP task to be set.
*/
-__STATIC_INLINE void nrf_lpcomp_task_trigger(nrf_lpcomp_task_t lpcomp_task);
+__STATIC_INLINE void nrf_lpcomp_task_trigger(nrf_lpcomp_task_t task);
/**
- * @brief Function for clearing a specific LPCOMP event.
+ * @brief Function for clearing the specified LPCOMP event.
*
- * @param[in] lpcomp_event LPCOMP event to be cleared.
- *
+ * @param[in] event LPCOMP event to be cleared.
*/
-__STATIC_INLINE void nrf_lpcomp_event_clear(nrf_lpcomp_event_t lpcomp_event);
+__STATIC_INLINE void nrf_lpcomp_event_clear(nrf_lpcomp_event_t event);
/**
- * @brief Function for getting the state of a specific LPCOMP event.
+ * @brief Function for retrieving the state of the LPCOMP event.
*
- * @retval true If the specified LPCOMP event is active.
+ * @param[in] event Event to be checked.
*
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
-__STATIC_INLINE bool nrf_lpcomp_event_check(nrf_lpcomp_event_t lpcomp_event);
+__STATIC_INLINE bool nrf_lpcomp_event_check(nrf_lpcomp_event_t event);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
@@ -316,7 +294,8 @@
if ((p_config->reference & LPCOMP_REFSEL_REFSEL_ARef)==LPCOMP_REFSEL_REFSEL_ARef)
{
uint32_t extref = p_config->reference >> 16;
- NRF_LPCOMP->EXTREFSEL = (extref << LPCOMP_EXTREFSEL_EXTREFSEL_Pos) & LPCOMP_EXTREFSEL_EXTREFSEL_Msk;
+ NRF_LPCOMP->EXTREFSEL = (extref << LPCOMP_EXTREFSEL_EXTREFSEL_Pos) &
+ LPCOMP_EXTREFSEL_EXTREFSEL_Msk;
}
NRF_LPCOMP->ANADETECT =
@@ -358,58 +337,58 @@
return (uint32_t)NRF_LPCOMP->RESULT;
}
-__STATIC_INLINE void nrf_lpcomp_int_enable(uint32_t lpcomp_int_mask)
+__STATIC_INLINE void nrf_lpcomp_int_enable(uint32_t int_mask)
{
- NRF_LPCOMP->INTENSET = lpcomp_int_mask;
+ NRF_LPCOMP->INTENSET = int_mask;
}
-__STATIC_INLINE void nrf_lpcomp_int_disable(uint32_t lpcomp_int_mask)
+__STATIC_INLINE void nrf_lpcomp_int_disable(uint32_t int_mask)
{
- NRF_LPCOMP->INTENCLR = lpcomp_int_mask;
+ NRF_LPCOMP->INTENCLR = int_mask;
}
-__STATIC_INLINE bool nrf_lpcomp_int_enable_check(uint32_t lpcomp_int_mask)
+__STATIC_INLINE bool nrf_lpcomp_int_enable_check(uint32_t int_mask)
{
- return (NRF_LPCOMP->INTENSET & lpcomp_int_mask); // when read this register will return the value of INTEN.
+ return (NRF_LPCOMP->INTENSET & int_mask); // when read this register will return the value of INTEN.
}
-__STATIC_INLINE uint32_t * nrf_lpcomp_task_address_get(nrf_lpcomp_task_t lpcomp_task)
+__STATIC_INLINE uint32_t * nrf_lpcomp_task_address_get(nrf_lpcomp_task_t task)
{
- return (uint32_t *)((uint8_t *)NRF_LPCOMP + lpcomp_task);
+ return (uint32_t *)((uint8_t *)NRF_LPCOMP + task);
}
-__STATIC_INLINE uint32_t * nrf_lpcomp_event_address_get(nrf_lpcomp_event_t lpcomp_event)
+__STATIC_INLINE uint32_t * nrf_lpcomp_event_address_get(nrf_lpcomp_event_t event)
{
- return (uint32_t *)((uint8_t *)NRF_LPCOMP + lpcomp_event);
+ return (uint32_t *)((uint8_t *)NRF_LPCOMP + event);
}
-__STATIC_INLINE void nrf_lpcomp_shorts_enable(uint32_t lpcomp_short_mask)
+__STATIC_INLINE void nrf_lpcomp_shorts_enable(uint32_t short_mask)
{
- NRF_LPCOMP->SHORTS |= lpcomp_short_mask;
+ NRF_LPCOMP->SHORTS |= short_mask;
}
-__STATIC_INLINE void nrf_lpcomp_shorts_disable(uint32_t lpcomp_short_mask)
+__STATIC_INLINE void nrf_lpcomp_shorts_disable(uint32_t short_mask)
{
- NRF_LPCOMP->SHORTS &= ~lpcomp_short_mask;
+ NRF_LPCOMP->SHORTS &= ~short_mask;
}
-__STATIC_INLINE void nrf_lpcomp_task_trigger(nrf_lpcomp_task_t lpcomp_task)
+__STATIC_INLINE void nrf_lpcomp_task_trigger(nrf_lpcomp_task_t task)
{
- *( (volatile uint32_t *)( (uint8_t *)NRF_LPCOMP + lpcomp_task) ) = 1;
+ *( (volatile uint32_t *)( (uint8_t *)NRF_LPCOMP + (uint32_t)task) ) = 1;
}
-__STATIC_INLINE void nrf_lpcomp_event_clear(nrf_lpcomp_event_t lpcomp_event)
+__STATIC_INLINE void nrf_lpcomp_event_clear(nrf_lpcomp_event_t event)
{
- *( (volatile uint32_t *)( (uint8_t *)NRF_LPCOMP + lpcomp_event) ) = 0;
+ *( (volatile uint32_t *)( (uint8_t *)NRF_LPCOMP + (uint32_t)event) ) = 0;
#if __CORTEX_M == 0x04
- volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_LPCOMP + lpcomp_event));
+ volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_LPCOMP + (uint32_t)event));
(void)dummy;
#endif
}
-__STATIC_INLINE bool nrf_lpcomp_event_check(nrf_lpcomp_event_t lpcomp_event)
+__STATIC_INLINE bool nrf_lpcomp_event_check(nrf_lpcomp_event_t event)
{
- return (bool) (*(volatile uint32_t *)( (uint8_t *)NRF_LPCOMP + lpcomp_event));
+ return (bool) (*(volatile uint32_t *)( (uint8_t *)NRF_LPCOMP + (uint32_t)event));
}
#endif // SUPPRESS_INLINE_IMPLEMENTATION
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_mwu.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_mwu.h
index 6495468..8312269 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_mwu.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_mwu.h
@@ -82,57 +82,57 @@
/** @brief MWU region watch masks. */
typedef enum
{
- NRF_MWU_WATCH_REGION0_WRITE = MWU_REGIONEN_RGN0WA_Msk, ///< Region 0 write access watch mask
- NRF_MWU_WATCH_REGION0_READ = MWU_REGIONEN_RGN0RA_Msk, ///< Region 0 read access watch mask
- NRF_MWU_WATCH_REGION1_WRITE = MWU_REGIONEN_RGN1WA_Msk, ///< Region 1 write access watch mask
- NRF_MWU_WATCH_REGION1_READ = MWU_REGIONEN_RGN1RA_Msk, ///< Region 1 read access watch mask
- NRF_MWU_WATCH_REGION2_WRITE = MWU_REGIONEN_RGN2WA_Msk, ///< Region 2 write access watch mask
- NRF_MWU_WATCH_REGION2_READ = MWU_REGIONEN_RGN2RA_Msk, ///< Region 2 read access watch mask
- NRF_MWU_WATCH_REGION3_WRITE = MWU_REGIONEN_RGN3WA_Msk, ///< Region 3 write access watch mask
- NRF_MWU_WATCH_REGION3_READ = MWU_REGIONEN_RGN3RA_Msk, ///< Region 3 read access watch mask
- NRF_MWU_WATCH_PREGION0_WRITE = MWU_REGIONEN_PRGN0WA_Msk, ///< Peripheral region 0 write access watch mask
- NRF_MWU_WATCH_PREGION0_READ = MWU_REGIONEN_PRGN0RA_Msk, ///< Peripheral region 0 read access watch mask
- NRF_MWU_WATCH_PREGION1_WRITE = MWU_REGIONEN_PRGN1WA_Msk, ///< Peripheral region 1 write access watch mask
- NRF_MWU_WATCH_PREGION1_READ = MWU_REGIONEN_PRGN1RA_Msk, ///< Peripheral region 1 read access watch mask
+ NRF_MWU_WATCH_REGION0_WRITE = MWU_REGIONEN_RGN0WA_Msk, ///< Region 0 write access watch mask.
+ NRF_MWU_WATCH_REGION0_READ = MWU_REGIONEN_RGN0RA_Msk, ///< Region 0 read access watch mask.
+ NRF_MWU_WATCH_REGION1_WRITE = MWU_REGIONEN_RGN1WA_Msk, ///< Region 1 write access watch mask.
+ NRF_MWU_WATCH_REGION1_READ = MWU_REGIONEN_RGN1RA_Msk, ///< Region 1 read access watch mask.
+ NRF_MWU_WATCH_REGION2_WRITE = MWU_REGIONEN_RGN2WA_Msk, ///< Region 2 write access watch mask.
+ NRF_MWU_WATCH_REGION2_READ = MWU_REGIONEN_RGN2RA_Msk, ///< Region 2 read access watch mask.
+ NRF_MWU_WATCH_REGION3_WRITE = MWU_REGIONEN_RGN3WA_Msk, ///< Region 3 write access watch mask.
+ NRF_MWU_WATCH_REGION3_READ = MWU_REGIONEN_RGN3RA_Msk, ///< Region 3 read access watch mask.
+ NRF_MWU_WATCH_PREGION0_WRITE = MWU_REGIONEN_PRGN0WA_Msk, ///< Peripheral region 0 write access watch mask.
+ NRF_MWU_WATCH_PREGION0_READ = MWU_REGIONEN_PRGN0RA_Msk, ///< Peripheral region 0 read access watch mask.
+ NRF_MWU_WATCH_PREGION1_WRITE = MWU_REGIONEN_PRGN1WA_Msk, ///< Peripheral region 1 write access watch mask.
+ NRF_MWU_WATCH_PREGION1_READ = MWU_REGIONEN_PRGN1RA_Msk, ///< Peripheral region 1 read access watch mask.
} nrf_mwu_region_watch_t;
/**
- * @brief Function for checking the state of a specific MWU event.
+ * @brief Function for retrieving the state of the MWU event.
*
- * @param[in] p_reg Pointer to the structure of registers of the peripheral.
- * @param[in] mwu_event Event to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to be checked.
*
- * @retval true If the event is set.
- * @retval false If the event is not set.
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_mwu_event_check(NRF_MWU_Type const * p_reg,
- nrf_mwu_event_t mwu_event);
+ nrf_mwu_event_t event);
/**
* @brief Function for clearing a specific MWU event.
*
- * @param[in] p_reg Pointer to the structure of registers of the peripheral.
- * @param[in] mwu_event Event to clear.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to clear.
*/
__STATIC_INLINE void nrf_mwu_event_clear(NRF_MWU_Type * p_reg,
- nrf_mwu_event_t mwu_event);
+ nrf_mwu_event_t event);
/**
* @brief Function for getting the address of a specific MWU event register.
*
- * @param[in] p_reg Pointer to the structure of registers of the peripheral.
- * @param[in] mwu_event Requested event.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Requested event.
*
* @return Address of the specified event register.
*/
__STATIC_INLINE uint32_t nrf_mwu_event_address_get(NRF_MWU_Type const * p_reg,
- nrf_mwu_event_t mwu_event);
+ nrf_mwu_event_t event);
/**
* @brief Function for enabling specified interrupts.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
- * @param[in] int_mask Interrupts to enable.
+ * @param[in] int_mask Interrupts to be enabled.
*/
__STATIC_INLINE void nrf_mwu_int_enable(NRF_MWU_Type * p_reg, uint32_t int_mask);
@@ -140,10 +140,10 @@
* @brief Function for retrieving the state of a specific interrupt.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
- * @param[in] mwu_int Interrupt to check.
+ * @param[in] mwu_int Interrupt to be checked.
*
- * @retval true If the interrupt is enabled.
- * @retval false If the interrupt is not enabled.
+ * @retval true The interrupt is enabled.
+ * @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_mwu_int_enable_check(NRF_MWU_Type const * p_reg,
nrf_mwu_int_mask_t mwu_int);
@@ -152,7 +152,7 @@
* @brief Function for disabling specified interrupts.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
- * @param[in] int_mask Interrupts to disable.
+ * @param[in] int_mask Interrupts to be disabled.
*/
__STATIC_INLINE void nrf_mwu_int_disable(NRF_MWU_Type * p_reg, uint32_t int_mask);
@@ -160,7 +160,7 @@
* @brief Function for enabling specified non-maskable interrupts.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
- * @param[in] int_mask Interrupts to enable.
+ * @param[in] int_mask Interrupts to be enabled.
*/
__STATIC_INLINE void nrf_mwu_nmi_enable(NRF_MWU_Type * p_reg, uint32_t int_mask);
@@ -168,10 +168,10 @@
* @brief Function for retrieving the state of a specific non-maskable interrupt.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
- * @param[in] mwu_int Interrupt to check.
+ * @param[in] mwu_int Interrupt to be checked.
*
- * @retval true If the interrupt is enabled.
- * @retval false If the interrupt is not enabled.
+ * @retval true The interrupt is enabled.
+ * @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_mwu_nmi_enable_check(NRF_MWU_Type const * p_reg,
nrf_mwu_int_mask_t mwu_int);
@@ -180,7 +180,7 @@
* @brief Function for disabling specified non-maskable interrupts.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
- * @param[in] int_mask Interrupts to disable.
+ * @param[in] int_mask Interrupts to be disabled.
*/
__STATIC_INLINE void nrf_mwu_nmi_disable(NRF_MWU_Type * p_reg, uint32_t int_mask);
@@ -239,7 +239,7 @@
* @brief Function for getting the mask of the write access flags of peripheral subregions
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
- * @param[in] per_reg_idx Peripheral region containing subregions to check.
+ * @param[in] per_reg_idx Peripheral region containing subregions to be checked.
*
* @return Mask specifying subregions that were write accessed.
*/
@@ -261,7 +261,7 @@
* @brief Function for getting the mask of the read access flags of peripheral subregions
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
- * @param[in] per_reg_idx Peripheral region containing subregions to check.
+ * @param[in] per_reg_idx Peripheral region containing subregions to be checked.
*
* @return Mask specifying subregions that were read accessed.
*/
@@ -282,25 +282,25 @@
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE bool nrf_mwu_event_check(NRF_MWU_Type const * p_reg,
- nrf_mwu_event_t mwu_event)
+ nrf_mwu_event_t event)
{
- return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)mwu_event);
+ return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
}
__STATIC_INLINE void nrf_mwu_event_clear(NRF_MWU_Type * p_reg,
- nrf_mwu_event_t mwu_event)
+ nrf_mwu_event_t event)
{
- *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)mwu_event)) = 0;
+ *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0;
#if __CORTEX_M == 0x04
- volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)mwu_event));
+ volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
(void)dummy;
#endif
}
__STATIC_INLINE uint32_t nrf_mwu_event_address_get(NRF_MWU_Type const * p_reg,
- nrf_mwu_event_t mwu_event)
+ nrf_mwu_event_t event)
{
- return (uint32_t)((uint8_t *)p_reg + (uint32_t)mwu_event);
+ return (uint32_t)((uint8_t *)p_reg + (uint32_t)event);
}
__STATIC_INLINE void nrf_mwu_int_enable(NRF_MWU_Type * p_reg, uint32_t int_mask)
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_nfct.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_nfct.h
index e6f44db..278affe 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_nfct.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_nfct.h
@@ -49,10 +49,8 @@
#define NRF_NFCT_CRC_SIZE 2 /**< CRC size in bytes. */
#define NRF_NFCT_DISABLE_ALL_INT 0xFFFFFFFF /**< Value to disable all interrupts. */
-/**
- * @brief NFCT tasks
- */
-typedef enum /*lint -save -e30 */
+/** @brief NFCT tasks. */
+typedef enum
{
NRF_NFCT_TASK_ACTIVATE = offsetof(NRF_NFCT_Type, TASKS_ACTIVATE), /**< Activate the NFCT peripheral for the incoming and outgoing frames, change state to activated. */
NRF_NFCT_TASK_DISABLE = offsetof(NRF_NFCT_Type, TASKS_DISABLE), /**< Disable the NFCT peripheral. */
@@ -61,12 +59,10 @@
NRF_NFCT_TASK_ENABLERXDATA = offsetof(NRF_NFCT_Type, TASKS_ENABLERXDATA), /**< Initialize EasyDMA for receive. */
NRF_NFCT_TASK_GOIDLE = offsetof(NRF_NFCT_Type, TASKS_GOIDLE), /**< Force state machine to the IDLE state. */
NRF_NFCT_TASK_GOSLEEP = offsetof(NRF_NFCT_Type, TASKS_GOSLEEP), /**< Force state machine to the SLEEP_A state. */
-} nrf_nfct_task_t; /*lint -restore */
+} nrf_nfct_task_t;
-/**
- * @brief NFCT events
- */
-typedef enum /*lint -save -e30 */
+/** @brief NFCT events. */
+typedef enum
{
NRF_NFCT_EVENT_READY = offsetof(NRF_NFCT_Type, EVENTS_READY), /**< The NFCT peripheral is ready to receive and send frames. */
NRF_NFCT_EVENT_FIELDDETECTED = offsetof(NRF_NFCT_Type, EVENTS_FIELDDETECTED), /**< Remote NFC field is detected. */
@@ -83,11 +79,9 @@
NRF_NFCT_EVENT_COLLISION = offsetof(NRF_NFCT_Type, EVENTS_COLLISION), /**< NFC auto collision resolution error reported. */
NRF_NFCT_EVENT_SELECTED = offsetof(NRF_NFCT_Type, EVENTS_SELECTED), /**< NFC auto collision resolution successfully completed. */
NRF_NFCT_EVENT_STARTED = offsetof(NRF_NFCT_Type, EVENTS_STARTED), /**< EasyDMA is ready to receive or send frames. */
-} nrf_nfct_event_t; /*lint -restore */
+} nrf_nfct_event_t;
-/**
- * @brief NFCT shorts
- */
+/** @brief NFCT shortcuts. */
typedef enum
{
NRF_NFCT_SHORT_FIELDDETECTED_ACTIVATE_MASK = NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Msk, /**< Shortcut between the FIELDDETECTED event and the ACTIVATE task. */
@@ -97,9 +91,7 @@
#endif // defined(NFCT_SHORTS_TXFRAMEEND_ENABLERXDATA_Msk) || defined(__NRFX_DOXYGEN__)
} nrf_nfct_short_mask_t;
-/**
- * @brief NFCT interrupts
- */
+/** @brief NFCT interrupts. */
typedef enum
{
NRF_NFCT_INT_READY_MASK = NFCT_INTEN_READY_Msk, /**< Interrupt on READY event. */
@@ -119,9 +111,7 @@
NRF_NFCT_INT_STARTED_MASK = NFCT_INTEN_STARTED_Msk, /**< Interrupt on STARTED event. */
} nrf_nfct_int_mask_t;
-/**
- * @brief NFC error status bit masks.
- */
+/** @brief NFC error status bit masks. */
typedef enum
{
NRF_NFCT_ERROR_FRAMEDELAYTIMEOUT_MASK = NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Msk, /**< Timeout of the Frame Delay Timer (no frame transmission started in the FDT window). */
@@ -133,9 +123,7 @@
#endif // defined(NFCT_ERRORSTATUS_NFCFIELDTOOWEAK_Msk) || defined(__NRFX_DOXYGEN__)
} nrf_nfct_error_status_t;
-/**
- * @brief NFC received frame status bit masks.
- */
+/** @brief NFC received frame status bit masks. */
typedef enum
{
NRF_NFCT_RX_FRAME_STATUS_CRC_MASK = NFCT_FRAMESTATUS_RX_CRCERROR_Msk, /**< CRC status mask. */
@@ -144,9 +132,7 @@
} nrf_nfct_rx_frame_status_t;
#if defined(NFCT_NFCTAGSTATE_NFCTAGSTATE_Msk) || defined(__NRFX_DOXYGEN__)
-/**
- * @brief NFC tag state.
- */
+/** @brief NFC tag state. */
typedef enum
{
NRF_NFCT_TAG_STATE_DISABLED = NFCT_NFCTAGSTATE_NFCTAGSTATE_Disabled, /**< Disabled or sensing NFC field. */
@@ -172,18 +158,14 @@
} nrf_nfct_sleep_state_t;
#endif // defined (NFCT_SLEEPSTATE_SLEEPSTATE_Msk) || defined(__NRFX_DOXYGEN__)
-/**
- * @brief NFC field state bit masks.
- */
+/** @brief NFC field state bit masks. */
typedef enum
{
NRF_NFCT_FIELD_STATE_PRESENT_MASK = NFCT_FIELDPRESENT_FIELDPRESENT_Msk, /**< Field presence mask. */
NRF_NFCT_FIELD_STATE_LOCK_MASK = NFCT_FIELDPRESENT_LOCKDETECT_Msk /**< Field lock mask. */
} nrf_nfct_field_state_t;
-/**
- * @brief NFC frame delay mode for data transmission.
- */
+/** @brief NFC frame delay mode for data transmission. */
typedef enum
{
NRF_NFCT_FRAME_DELAY_MODE_FREERUN = NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_FreeRun, /**< Frame transmission starts when @ref NRF_NFCT_TASK_STARTTX is set (delay timer is not used). */
@@ -192,9 +174,7 @@
NRF_NFCT_FRAME_DELAY_MODE_WINDOWGRID = NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_WindowGrid /**< Frame transmission starts in a bit grid between FRAMEDELAYMIN and FRAMEDELAYMAX. */
} nrf_nfct_frame_delay_mode_t;
-/**
- * @brief Bit masks for NFC transmission frame configuration.
- */
+/** @brief Bit masks for NFC transmission frame configuration. */
typedef enum
{
NRF_NFCT_TX_FRAME_CONFIG_PARITY = NFCT_TXD_FRAMECONFIG_PARITY_Msk, /**< Indicates whether parity is added in the transmitted frames. */
@@ -203,9 +183,7 @@
NRF_NFCT_TX_FRAME_CONFIG_CRC16 = NFCT_TXD_FRAMECONFIG_CRCMODETX_Msk /**< Indicates whether CRC is added in the transmitted frames. */
} nrf_nfct_tx_frame_config_t;
-/**
- * @brief Bit masks for NFC reception frame configuration.
- */
+/** @brief Bit masks for NFC reception frame configuration. */
typedef enum
{
NRF_NFCT_RX_FRAME_CONFIG_PARITY = NFCT_RXD_FRAMECONFIG_PARITY_Msk, /**< Indicates whether parity is expected in the received frames. */
@@ -214,7 +192,8 @@
} nrf_nfct_rx_frame_config_t;
/**
- * @brief 'NFCI1 size' NFC field configuration for the SENS_RES frame according to the NFC Forum Digital Protocol Technical Specification.
+ * @brief 'NFCI1 size' NFC field configuration for the SENS_RES frame according to the NFC Forum
+ * Digital Protocol Technical Specification.
*/
typedef enum
{
@@ -229,7 +208,8 @@
} nrf_nfct_sensres_nfcid1_size_t;
/**
- * @brief 'Bit frame SDD' NFC field configuration for the SENS_RES frame according to the NFC Forum Digital Protocol Technical Specification.
+ * @brief 'Bit frame SDD' NFC field configuration for the SENS_RES frame according to the NFC
+ * Forum Digital Protocol Technical Specification.
*/
typedef enum
{
@@ -248,7 +228,8 @@
} nrf_nfct_sensres_bit_frame_sdd_t;
/**
- * @brief 'Platofrm Config' NFC field configuration for the SENS_RES frame according to the NFC Forum Digital Protocol Technical Specification.
+ * @brief 'Platofrm Config' NFC field configuration for the SENS_RES frame according to the NFC
+ * Forum Digital Protocol Technical Specification.
*/
typedef enum
{
@@ -258,9 +239,7 @@
NRF_NFCT_SENSRES_PLATFORM_CONFIG_OTHER = 0 << NFCT_SENSRES_PLATFCONFIG_Pos
} nrf_nfct_sensres_platform_config_t;
-/**
- * @brief Bit masks for SEL_RES NFC frame configuration.
- */
+/** @brief Bit masks for SEL_RES NFC frame configuration. */
typedef enum
{
NRF_NFCT_SELRES_CASCADE_MASK = NFCT_SELRES_CASCADE_Msk, /**< SEL_RES Cascade field bit mask. */
@@ -268,7 +247,8 @@
} nrf_nfct_selres_t;
/**
- * @brief Protocol NFC field (bits b7 and b6) configuration for the SEL_RES frame according to the NFC Forum Digital Protocol Technical Specification.
+ * @brief Protocol NFC field (bits b7 and b6) configuration for the SEL_RES frame according to
+ * the NFC Forum Digital Protocol Technical Specification.
*/
typedef enum
{
@@ -281,7 +261,7 @@
/**
* @brief Function for activating a specific NFCT task.
*
- * @param[in] task Task.
+ * @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_nfct_task_trigger(nrf_nfct_task_t task);
@@ -302,12 +282,12 @@
__STATIC_INLINE void nrf_nfct_event_clear(nrf_nfct_event_t event);
/**
- * @brief Function for returning the state of a specific event.
+ * @brief Function for retrieving the state of the NFCT event.
*
- * @param[in] event Event.
+ * @param[in] event Event to be checked.
*
- * @retval true If the event is set.
- * @retval false If the event is not set.
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_nfct_event_check(nrf_nfct_event_t event);
@@ -323,14 +303,14 @@
/**
* @brief Function for enabling selected shortcuts.
*
- * @param[in] short_mask Shortcut mask.
+ * @param[in] short_mask Mask of shortcuts.
*/
__STATIC_INLINE void nrf_nfct_shorts_enable(uint32_t short_mask);
/**
* @brief Function for disabling selected shortcuts.
*
- * @param[in] short_mask Shortcut mask.
+ * @param[in] short_mask Mask of shortcuts.
*/
__STATIC_INLINE void nrf_nfct_shorts_disable(uint32_t short_mask);
@@ -360,8 +340,8 @@
*
* @param[in] int_mask Interrupt mask.
*
- * @retval true If any of the selected interrupts is enabled.
- * @retval false If none of the selected interrupts is enabled.
+ * @retval true Any of the selected interrupts is enabled.
+ * @retval false None of the selected interrupts is enabled.
*/
__STATIC_INLINE bool nrf_nfct_int_enable_check(uint32_t int_mask);
@@ -403,7 +383,8 @@
/**
* @brief Function for clearing the NFC frame reception status.
*
- * @param[in] framestatus_flags Status flags to be cleared, defined in @ref nrf_nfct_rx_frame_status_t.
+ * @param[in] framestatus_flags Status flags to be cleared, defined in
+ * @ref nrf_nfct_rx_frame_status_t.
*/
__STATIC_INLINE void nrf_nfct_rx_frame_status_clear(uint32_t framestatus_flags);
@@ -428,8 +409,10 @@
*
* @details The returned value is the last state before the autimatic collision resolution started.
*
- * @retval NRF_NFCT_SLEEP_STATE_IDLE NFC tag was in IDLE state before the automatic collision resolution started.
- * @retval NRF_NFCT_SLEEP_STATE_SLEEP_A NFC tag was in SLEEP_A state before the automatic collision resolution started.
+ * @retval NRF_NFCT_SLEEP_STATE_IDLE NFC tag was in IDLE state before the automatic
+ * collision resolution started.
+ * @retval NRF_NFCT_SLEEP_STATE_SLEEP_A NFC tag was in SLEEP_A state before the automatic
+ * collision resolution started.
*/
__STATIC_INLINE nrf_nfct_sleep_state_t nrf_nfct_sleep_state_get(void);
#endif // defined (NFCT_SLEEPSTATE_SLEEPSTATE_Msk) || defined(__NRFX_DOXYGEN__)
@@ -437,7 +420,8 @@
/**
* @brief Function for getting the status of the external NFC field detection.
*
- * @return The NFC field detection status. Status bits can be checked by using @ref nrf_nfct_field_state_t.
+ * @return The NFC field detection status. Status bits can be checked by using
+ * @ref nrf_nfct_field_state_t.
*/
__STATIC_INLINE uint8_t nrf_nfct_field_status_get(void);
@@ -445,8 +429,8 @@
* @brief Function for getting the minimum Frame Delay Time value.
*
* @details This is the minimum value for Frame Delay Timer. It controls the shortest time between
- * the last symbol of the last received frame and the start of the transmission of a new TX frame.
- *
+ * the last symbol of the last received frame and the start of the transmission of a new
+ * TX frame.
*
* @return The minimum Frame Delay Time value in 13.56-MHz clock ticks.
*/
@@ -456,7 +440,8 @@
* @brief Function for setting the minimum Frame Delay Time value.
*
* @details This is the minimum value for Frame Delay Timer. It controls the shortest time between
- * the last symbol of the last received frame and the start of the transmission of a new TX frame.
+ * the last symbol of the last received frame and the start of the transmission of a new
+ * TX frame.
*
* @param[in] frame_delay_min Minimum Frame Delay Time value in 13.56-MHz clock ticks.
*/
@@ -466,8 +451,8 @@
* @brief Function for getting the maximum Frame Delay Time value.
*
* @details This is the maximum value for Frame Delay Timer. It controls the longest time between
- * the last symbol of the last received frame and the start of the transmission of a new TX frame.
- * If no transmission starts before the Frame Delay Timer timeout,
+ * the last symbol of the last received frame and the start of the transmission of a new
+ * TX frame. If no transmission starts before the Frame Delay Timer timeout,
* @ref NRF_NFCT_ERROR_FRAMEDELAYTIMEOUT_MASK is set.
*
* @return The maximum Frame Delay Time value in 13.56-MHz clock ticks.
@@ -478,8 +463,8 @@
* @brief Function for setting the maximum Frame Delay Time value.
*
* @details This is the maximum value for Frame Delay Timer. It controls the longest time between
- * the last symbol of the last received frame and the start of the transmission of a new TX frame.
- * If no transmission starts before the Frame Delay Timer timeout,
+ * the last symbol of the last received frame and the start of the transmission of a new
+ * TX frame. If no transmission starts before the Frame Delay Timer timeout,
* @ref NRF_NFCT_ERROR_FRAMEDELAYTIMEOUT_MASK is set.
*
* @param[in] frame_delay_max Maximum Frame Delay Time value in 13.56-MHz clock ticks.
@@ -513,7 +498,8 @@
* @note Buffer for the NFC RX/TX data is used by EasyDMA and must be located in RAM.
*
* @param[in] p_rxtx_buf Pointer to the receive or transmit buffer.
- * @param[in] max_txrx_len Maximum receive or transmit length in bytes (size of the RAM buffer for EasyDMA).
+ * @param[in] max_txrx_len Maximum receive or transmit length in bytes (size of the RAM
+ * buffer for EasyDMA).
*/
__STATIC_INLINE void nrf_nfct_rxtx_buffer_set(uint8_t * p_rxtx_buf,
uint16_t max_txrx_len);
@@ -521,29 +507,32 @@
/**
* @brief Function for getting the NFCT RX/TX maximum buffer length.
*
- * @return The configured maximum receive or transmit length in bytes (size of the RX/TX buffer for EasyDMA).
+ * @return The configured maximum receive or transmit length in bytes (size of the RX/TX
+ * buffer for EasyDMA).
*/
__STATIC_INLINE uint16_t nrf_nfct_max_rxtx_length_get(void);
/**
* @brief Function for getting the flags for NFC frame transmission configuration.
*
- * @return The flags of the NFCT frame transmission configuration, defined in @ref nrf_nfct_tx_frame_config_t.
+ * @return The flags of the NFCT frame transmission configuration, defined in
+ * @ref nrf_nfct_tx_frame_config_t.
*/
__STATIC_INLINE uint8_t nrf_nfct_tx_frame_config_get(void);
/**
* @brief Function for setting up the flags of the NFC frame transmission configuration.
*
- * @param[in] flags Flags for NFCT TX configuration. Use @ref nrf_nfct_tx_frame_config_t for setting.
+ * @param[in] flags Flags for NFCT TX configuration. Use @ref nrf_nfct_tx_frame_config_t for
+ * setting.
*/
__STATIC_INLINE void nrf_nfct_tx_frame_config_set(uint8_t flags);
/**
* @brief Function for getting the length of the configured transmission frame.
*
- * @note NFC frames do not have to consist of full bytes only, therefore data amount for transmission
- * is configured in number of bits.
+ * @note NFC frames do not have to consist of full bytes only, therefore data amount
+ * for transmission is configured in number of bits.
*
* @return Number of bits to be sent excluding CRC, parity, SoF, and EoF.
*/
@@ -555,8 +544,8 @@
* @details Set the number of TX bits excluding CRC, parity, SoF, and EoF.
*
* @note Source of data for transmission is set by using @ref nrf_nfct_rxtx_buffer_set.
- * @note NFC frames do not have to consist of full bytes only, therefore data amount for transmission
- * is configured in number of bits.
+ * @note NFC frames do not have to consist of full bytes only, therefore data amount
+ * for transmission is configured in number of bits.
*
* @param[in] tx_bits Overall number of bits to be sent.
*/
@@ -565,7 +554,8 @@
/**
* @brief Function for getting the flags of the NFC frame reception configuration.
*
- * @return The flags for NFCT frame reception configuration, defined in @ref nrf_nfct_rx_frame_config_t.
+ * @return The flags for NFCT frame reception configuration, defined in
+ * @ref nrf_nfct_rx_frame_config_t.
*/
__STATIC_INLINE uint8_t nrf_nfct_rx_frame_config_get(void);
@@ -584,19 +574,21 @@
*
* @param[in] crc_excluded Flag for excluding CRC size from calculation.
*
- * @return Number of received bits including or excluding CRC, and excluding parity and SoF/EoF framing.
+ * @return Number of received bits including or excluding CRC, and excluding parity
+ * and SoF/EoF framing.
*/
__STATIC_INLINE uint16_t nrf_nfct_rx_bits_get(bool crc_excluded);
/**
* @brief Function for getting the NFCID1 (NFC tag identifier).
*
- * @note This function always returns the full configuration of the NFCID1 setting (10 bytes), regardless
- * of the NFCID1 size. The NFCID1 size can be configured using @ref nrf_nfct_sensres_nfcid1_size_set or
- * @ref nrf_nfct_nfcid1_set.
+ * @note This function always returns the full configuration of the NFCID1 setting (10 bytes),
+ * regardless of the NFCID1 size. The NFCID1 size can be configured using
+ * @ref nrf_nfct_sensres_nfcid1_size_set or @ref nrf_nfct_nfcid1_set.
*
- * @param[out] p_nfcid1_buf Pointer to a buffer for the NDFCID1 parameter. The NFCID1 values are in
- * little endian order, that is: |NFCID1_3RD_LAST|NFCID1_2ND_LAST|NFCID1_LAST|.
+ * @param[out] p_nfcid1_buf Pointer to a buffer for the NDFCID1 parameter.
+ * The NFCID1 values are in little endian order,
+ * that is: |NFCID1_3RD_LAST|NFCID1_2ND_LAST|NFCID1_LAST|.
*
* @return Configured NFCID1 length
*/
@@ -605,7 +597,8 @@
/**
* @brief Function for setting the NFCID1 (NFC tag identifier).
*
- * @note This function also configures the NFCIDSIZE field in the SENSRES register of the NRF_NFCT peripheral.
+ * @note This function also configures the NFCIDSIZE field in the SENSRES
+ * register of the NRF_NFCT peripheral.
*
* @param[in] p_nfcid1_buf Pointer to the buffer with NDFCID1 bytes.
* @param[in] nfcid1_size Size of the NFCID1 in bytes.
@@ -1001,7 +994,7 @@
__STATIC_INLINE void nrf_nfct_autocolres_enable(void)
{
- NRF_NFCT->AUTOCOLRESCONFIG =
+ NRF_NFCT->AUTOCOLRESCONFIG =
(NRF_NFCT->AUTOCOLRESCONFIG & ~NFCT_AUTOCOLRESCONFIG_MODE_Msk) |
(NFCT_AUTOCOLRESCONFIG_MODE_Enabled << NFCT_AUTOCOLRESCONFIG_MODE_Pos);
}
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_nvmc.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_nvmc.h
index 506f358..3575e5f 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_nvmc.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_nvmc.h
@@ -38,49 +38,42 @@
extern "C" {
#endif
-
/**
- * @defgroup nrf_nvmc_hal NVMC HAL
+ * @defgroup nrf_nvmc_hal_deprecated NVMC HAL (deprecated)
* @{
* @ingroup nrf_nvmc
- * @brief Hardware access layer for managing the Non-Volatile Memory Controller (NVMC) peripheral.
+ * @brief Hardware access layer (HAL) for managing the Non-Volatile Memory Controller (NVMC) peripheral.
*
* This driver allows writing to the non-volatile memory (NVM) regions
- * of the chip. In order to write to NVM the controller must be powered
+ * of the chip. To write to NVM, the controller must be powered
* on and the relevant page must be erased.
- *
*/
-
/**
- * @brief Erase a page in flash. This is required before writing to any
- * address in the page.
+ * @brief Erase a page in flash. This is required before writing to any address in the page.
*
* @param address Start address of the page.
*/
void nrf_nvmc_page_erase(uint32_t address);
-
/**
* @brief Write a single byte to flash.
*
- * The function reads the word containing the byte, and then
- * rewrites the entire word.
+ * The function reads the word containing the byte, and then rewrites the entire word.
*
* @param address Address to write to.
* @param value Value to write.
*/
void nrf_nvmc_write_byte(uint32_t address , uint8_t value);
-
/**
* @brief Write a 32-bit word to flash.
+ *
* @param address Address to write to.
* @param value Value to write.
*/
void nrf_nvmc_write_word(uint32_t address, uint32_t value);
-
/**
* @brief Write consecutive bytes to flash.
*
@@ -90,7 +83,6 @@
*/
void nrf_nvmc_write_bytes(uint32_t address, const uint8_t * src, uint32_t num_bytes);
-
/**
* @brief Write consecutive words to flash.
*
@@ -100,6 +92,355 @@
*/
void nrf_nvmc_write_words(uint32_t address, const uint32_t * src, uint32_t num_words);
+/** @} */
+
+/**
+ * @defgroup nrf_nvmc_hal NVMC HAL
+ * @{
+ * @ingroup nrf_nvmc
+ * @brief Hardware access layer (HAL) for managing the Non-Volatile Memory Controller (NVMC) peripheral.
+ */
+
+#if defined(NVMC_ICACHECNF_CACHEEN_Msk) || defined(__NRFX_DOXYGEN__)
+/** @brief Symbol indicating whether Instruction Cache (ICache) is present. */
+#define NRF_NVMC_ICACHE_PRESENT
+#endif
+
+#if defined(NVMC_ERASEPAGEPARTIALCFG_DURATION_Msk) || defined(__NRFX_DOXYGEN__)
+/** @brief Symbol indicating whether the option of page partial erase is present. */
+#define NRF_NVMC_PARTIAL_ERASE_PRESENT
+#endif
+
+/** @brief NVMC modes. */
+typedef enum
+{
+ NRF_NVMC_MODE_READONLY = NVMC_CONFIG_WEN_Ren, ///< NVMC in read-only mode.
+ NRF_NVMC_MODE_WRITE = NVMC_CONFIG_WEN_Wen, ///< NVMC in read and write mode.
+ NRF_NVMC_MODE_ERASE = NVMC_CONFIG_WEN_Een, ///< NVMC in read and erase mode.
+#if defined(NVMC_CONFIG_WEN_PEen)
+ NRF_NVMC_MODE_PARTIAL_ERASE = NVMC_CONFIG_WEN_PEen ///< NVMC in read and partial erase mode.
+#endif
+} nrf_nvmc_mode_t;
+
+#if defined(NVMC_CONFIGNS_WEN_Msk) || defined(__NRFX_DOXYGEN__)
+/** @brief Non-secure NVMC modes. */
+typedef enum
+{
+ NRF_NVMC_NS_MODE_READONLY = NVMC_CONFIGNS_WEN_Ren, ///< Non-secure NVMC in read-only mode.
+ NRF_NVMC_NS_MODE_WRITE = NVMC_CONFIGNS_WEN_Wen, ///< Non-secure NVMC in read and write mode.
+ NRF_NVMC_NS_MODE_ERASE = NVMC_CONFIGNS_WEN_Een, ///< Non-secure NVMC in read and erase mode.
+} nrf_nvmc_ns_mode_t;
+#endif
+
+#if defined(NRF_NVMC_ICACHE_PRESENT)
+/** @brief NVMC ICache configuration. */
+typedef enum
+{
+ NRF_NVMC_ICACHE_DISABLE = NVMC_ICACHECNF_CACHEEN_Disabled, ///< Instruction Cache disabled.
+ NRF_NVMC_ICACHE_ENABLE = NVMC_ICACHECNF_CACHEEN_Enabled, ///< Instruction Cache enabled.
+ NRF_NVMC_ICACHE_ENABLE_WITH_PROFILING = NVMC_ICACHECNF_CACHEEN_Enabled | ///< Instruction Cache with cache profiling enabled.
+ NVMC_ICACHECNF_CACHEPROFEN_Msk
+} nrf_nvmc_icache_config_t;
+#endif // defined(NRF_NVMC_ICACHE_PRESENT)
+
+/**
+ * @brief Function for checking if NVMC is ready to perform write or erase operation.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @retval true NVMC can perform write or erase.
+ * @retval false NVMC is busy and cannot perform next operation yet.
+ */
+__STATIC_INLINE bool nrf_nvmc_ready_check(NRF_NVMC_Type const * p_reg);
+
+#if defined(NVMC_READYNEXT_READYNEXT_Msk) || defined(__NRFX_DOXYGEN__)
+/**
+ * @brief Function for checking if NVMC is ready to accept the next write operation.
+ *
+ * NVM writing time can be reduced by using this function.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @retval true NVMC can accept the next write. It will be buffered and will be taken
+ * into account as soon as the ongoing write operation is completed.
+ * @retval false NVMC is busy and cannot accept the next write yet.
+ */
+__STATIC_INLINE bool nrf_nvmc_write_ready_check(NRF_NVMC_Type const * p_reg);
+#endif // defined(NVMC_READYNEXT_READYNEXT_Msk) || defined(__NRFX_DOXYGEN__)
+
+/**
+ * @brief Function for setting the NVMC mode.
+ *
+ * Only activate erase and write modes when they are actively used.
+ * If Instruction Cache (ICache) is present, enabling write or erase will
+ * invalidate the cache and keep it invalidated.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mode Desired operating mode for NVMC.
+ */
+__STATIC_INLINE void nrf_nvmc_mode_set(NRF_NVMC_Type * p_reg,
+ nrf_nvmc_mode_t mode);
+
+#if defined(NVMC_CONFIGNS_WEN_Msk) || defined(__NRFX_DOXYGEN__)
+/**
+ * @brief Function for setting the NVMC mode for non-secure Flash page operations.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mode Desired operating mode for NVMC.
+ */
+__STATIC_INLINE void nrf_nvmc_nonsecure_mode_set(NRF_NVMC_Type * p_reg,
+ nrf_nvmc_ns_mode_t mode);
+#endif
+
+/**
+ * @brief Function for starting a single page erase in the Flash memory.
+ *
+ * The NVMC mode must be correctly configured with @ref nrf_nvmc_mode_set
+ * before starting the erase operation.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] page_addr Address of the first word of the page to erase.
+ */
+__STATIC_INLINE void nrf_nvmc_page_erase_start(NRF_NVMC_Type * p_reg,
+ uint32_t page_addr);
+
+#if defined(NVMC_ERASEUICR_ERASEUICR_Msk) || defined(__NRFX_DOXYGEN__)
+/**
+ * @brief Function for starting the user information configuration registers (UICR) erase.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ */
+__STATIC_INLINE void nrf_nvmc_uicr_erase_start(NRF_NVMC_Type * p_reg);
+#endif
+
+/**
+ * @brief Function for starting the erase of the whole NVM, including UICR.
+ *
+ * This function purges all user code.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ */
+__STATIC_INLINE void nrf_nvmc_erase_all_start(NRF_NVMC_Type * p_reg);
+
+#if defined(NRF_NVMC_PARTIAL_ERASE_PRESENT)
+/**
+ * @brief Function for configuring the page partial erase duration in milliseconds.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] duration_ms Page partial erase duration in milliseconds.
+ */
+__STATIC_INLINE void nrf_nvmc_partial_erase_duration_set(NRF_NVMC_Type * p_reg,
+ uint32_t duration_ms);
+
+/**
+ * @brief Function for getting the current setting for the page partial erase duration.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @retval Interval duration setting in milliseconds.
+ */
+__STATIC_INLINE uint32_t nrf_nvmc_partial_erase_duration_get(NRF_NVMC_Type const * p_reg);
+
+/**
+ * @brief Function for starting a partial erase operation.
+ *
+ * It must be called successively until the page erase time is reached.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] page_addr Address of the first word of the page to erase.
+ */
+__STATIC_INLINE void nrf_nvmc_page_partial_erase_start(NRF_NVMC_Type * p_reg,
+ uint32_t page_addr);
+#endif // defined(NRF_NVMC_PARTIAL_ERASE_PRESENT)
+
+#if defined(NRF_NVMC_ICACHE_PRESENT)
+/**
+ * @brief Function for applying the Instruction Cache (ICache) configuration.
+ *
+ * Enabling the cache can increase CPU performance and reduce power
+ * consumption by reducing the number of wait cycles and the number
+ * of flash accesses.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] config ICache configuration.
+ */
+__STATIC_INLINE void nrf_nvmc_icache_config_set(NRF_NVMC_Type * p_reg,
+ nrf_nvmc_icache_config_t config);
+
+/**
+ * @brief Function for checking if ICache is enabled.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @retval true ICache enabled.
+ * @retval false ICache disabled.
+ */
+__STATIC_INLINE bool nrf_nvmc_icache_enable_check(NRF_NVMC_Type const * p_reg);
+
+/**
+ * @brief Function for checking if the ICache profiling option is enabled.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @retval true ICache profiling enabled.
+ * @retval false ICache profiling disabled.
+ */
+__STATIC_INLINE bool nrf_nvmc_icache_profiling_enable_check(NRF_NVMC_Type const * p_reg);
+
+/**
+ * @brief Function for getting the number of ICache hits.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @retval Number of the ICache hits.
+ */
+__STATIC_INLINE uint32_t nrf_nvmc_icache_hit_get(NRF_NVMC_Type const * p_reg);
+
+/**
+ * @brief Function for getting the number of ICache misses.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @retval Number of the ICache misses.
+ */
+__STATIC_INLINE uint32_t nrf_nvmc_icache_miss_get(NRF_NVMC_Type const * p_reg);
+
+/**
+ * @brief Function for resetting the ICache hit and miss counters.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ */
+ __STATIC_INLINE void nrf_nvmc_icache_hit_miss_reset(NRF_NVMC_Type * p_reg);
+#endif // defined(NRF_NVMC_ICACHE_PRESENT)
+
+#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+
+__STATIC_INLINE bool nrf_nvmc_ready_check(NRF_NVMC_Type const * p_reg)
+{
+ return (bool)(p_reg->READY & NVMC_READY_READY_Msk);
+}
+
+#if defined(NVMC_READYNEXT_READYNEXT_Msk)
+__STATIC_INLINE bool nrf_nvmc_write_ready_check(NRF_NVMC_Type const * p_reg)
+{
+ return (bool)(p_reg->READYNEXT & NVMC_READYNEXT_READYNEXT_Msk);
+}
+#endif
+
+__STATIC_INLINE void nrf_nvmc_mode_set(NRF_NVMC_Type * p_reg,
+ nrf_nvmc_mode_t mode)
+{
+ p_reg->CONFIG = (uint32_t)mode;
+}
+
+#if defined(NVMC_CONFIGNS_WEN_Msk)
+__STATIC_INLINE void nrf_nvmc_nonsecure_mode_set(NRF_NVMC_Type * p_reg,
+ nrf_nvmc_ns_mode_t mode)
+{
+ p_reg->CONFIGNS = (uint32_t)mode;
+}
+#endif
+
+__STATIC_INLINE void nrf_nvmc_page_erase_start(NRF_NVMC_Type * p_reg,
+ uint32_t page_addr)
+{
+#if defined(NRF51)
+ /* On nRF51, the code area can be divided into two regions: CR0 and CR1.
+ * The length of CR0 is specified in the CLENR0 register of UICR.
+ * If CLENR0 contains the 0xFFFFFFFF value, CR0 is not set.
+ * Moreover, the page from CR0 can be written or erased only from code
+ * running in CR0.*/
+ uint32_t cr0_len = NRF_UICR->CLENR0 == 0xFFFFFFFF ? 0 : NRF_UICR->CLENR0;
+ if (page_addr < cr0_len)
+ {
+ p_reg->ERASEPCR0 = page_addr;
+ }
+ else
+ {
+ p_reg->ERASEPCR1 = page_addr;
+ }
+#elif defined(NRF52_SERIES)
+ p_reg->ERASEPAGE = page_addr;
+#elif defined(NRF9160_XXAA)
+ *(volatile uint32_t *)page_addr = 0xFFFFFFFF;
+ (void)p_reg;
+#else
+ #error "Unknown device."
+#endif
+}
+
+#if defined(NVMC_ERASEUICR_ERASEUICR_Msk)
+__STATIC_INLINE void nrf_nvmc_uicr_erase_start(NRF_NVMC_Type * p_reg)
+{
+ p_reg->ERASEUICR = 1;
+}
+#endif
+
+__STATIC_INLINE void nrf_nvmc_erase_all_start(NRF_NVMC_Type * p_reg)
+{
+ p_reg->ERASEALL = 1;
+}
+
+#if defined(NRF_NVMC_PARTIAL_ERASE_PRESENT)
+__STATIC_INLINE void nrf_nvmc_partial_erase_duration_set(NRF_NVMC_Type * p_reg,
+ uint32_t duration_ms)
+{
+ p_reg->ERASEPAGEPARTIALCFG = duration_ms;
+}
+
+__STATIC_INLINE uint32_t nrf_nvmc_partial_erase_duration_get(NRF_NVMC_Type const * p_reg)
+{
+ return p_reg->ERASEPAGEPARTIALCFG;
+}
+
+__STATIC_INLINE void nrf_nvmc_page_partial_erase_start(NRF_NVMC_Type * p_reg,
+ uint32_t page_addr)
+{
+#if defined(NVMC_ERASEPAGEPARTIAL_ERASEPAGEPARTIAL_Msk)
+ p_reg->ERASEPAGEPARTIAL = page_addr;
+#elif defined(NRF9160_XXAA)
+ nrf_nvmc_page_erase_start(p_reg, page_addr);
+#else
+ #error "Unknown device."
+#endif
+}
+#endif // defined(NRF_NVMC_PARTIAL_ERASE_PRESENT)
+
+#if defined(NRF_NVMC_ICACHE_PRESENT)
+__STATIC_INLINE void nrf_nvmc_icache_config_set(NRF_NVMC_Type * p_reg,
+ nrf_nvmc_icache_config_t config)
+{
+ p_reg->ICACHECNF = (uint32_t)config;
+}
+
+__STATIC_INLINE bool nrf_nvmc_icache_enable_check(NRF_NVMC_Type const * p_reg)
+{
+ return (bool)(p_reg->ICACHECNF & NVMC_ICACHECNF_CACHEEN_Msk);
+}
+
+__STATIC_INLINE bool nrf_nvmc_icache_profiling_enable_check(NRF_NVMC_Type const * p_reg)
+{
+ return (bool)(p_reg->ICACHECNF & NVMC_ICACHECNF_CACHEPROFEN_Msk);
+}
+
+__STATIC_INLINE uint32_t nrf_nvmc_icache_hit_get(NRF_NVMC_Type const * p_reg)
+{
+ return p_reg->IHIT;
+}
+
+__STATIC_INLINE uint32_t nrf_nvmc_icache_miss_get(NRF_NVMC_Type const * p_reg)
+{
+ return p_reg->IMISS;
+}
+
+__STATIC_INLINE void nrf_nvmc_icache_hit_miss_reset(NRF_NVMC_Type * p_reg)
+{
+ p_reg->IHIT = 0;
+ p_reg->IMISS = 0;
+}
+#endif // defined(NRF_NVMC_ICACHE_PRESENT)
+
+#endif // SUPPRESS_INLINE_IMPLEMENTATION
/** @} */
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_pdm.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_pdm.h
index 3e726c0..63105ad 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_pdm.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_pdm.h
@@ -44,68 +44,56 @@
* @brief Hardware access layer for managing the Pulse Density Modulation (PDM) peripheral.
*/
+/** @brief Minimum value of PDM gain. */
#define NRF_PDM_GAIN_MINIMUM 0x00
+/** @brief Default value of PDM gain. */
#define NRF_PDM_GAIN_DEFAULT 0x28
+/** @brief Maximum value of PDM gain. */
#define NRF_PDM_GAIN_MAXIMUM 0x50
+
+/** @brief PDM gain type. */
typedef uint8_t nrf_pdm_gain_t;
-
-/**
- * @brief PDM tasks.
- */
-typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
+/** @brief PDM tasks. */
+typedef enum
{
- NRF_PDM_TASK_START = offsetof(NRF_PDM_Type, TASKS_START), ///< Starts continuous PDM transfer.
- NRF_PDM_TASK_STOP = offsetof(NRF_PDM_Type, TASKS_STOP) ///< Stops PDM transfer.
+ NRF_PDM_TASK_START = offsetof(NRF_PDM_Type, TASKS_START), ///< Starts continuous PDM transfer.
+ NRF_PDM_TASK_STOP = offsetof(NRF_PDM_Type, TASKS_STOP) ///< Stops PDM transfer.
} nrf_pdm_task_t;
-
-/**
- * @brief PDM events.
- */
-typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
+/** @brief PDM events. */
+typedef enum
{
- NRF_PDM_EVENT_STARTED = offsetof(NRF_PDM_Type, EVENTS_STARTED), ///< PDM transfer has started.
- NRF_PDM_EVENT_STOPPED = offsetof(NRF_PDM_Type, EVENTS_STOPPED), ///< PDM transfer has finished.
- NRF_PDM_EVENT_END = offsetof(NRF_PDM_Type, EVENTS_END) ///< The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM.
+ NRF_PDM_EVENT_STARTED = offsetof(NRF_PDM_Type, EVENTS_STARTED), ///< PDM transfer is started.
+ NRF_PDM_EVENT_STOPPED = offsetof(NRF_PDM_Type, EVENTS_STOPPED), ///< PDM transfer is finished.
+ NRF_PDM_EVENT_END = offsetof(NRF_PDM_Type, EVENTS_END) ///< The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM.
} nrf_pdm_event_t;
-
-/**
- * @brief PDM interrupt masks.
- */
+/** @brief PDM interrupt masks. */
typedef enum
{
- NRF_PDM_INT_STARTED = PDM_INTENSET_STARTED_Msk, ///< Interrupt on EVENTS_STARTED event.
- NRF_PDM_INT_STOPPED = PDM_INTENSET_STOPPED_Msk, ///< Interrupt on EVENTS_STOPPED event.
- NRF_PDM_INT_END = PDM_INTENSET_END_Msk ///< Interrupt on EVENTS_END event.
+ NRF_PDM_INT_STARTED = PDM_INTENSET_STARTED_Msk, ///< Interrupt on EVENTS_STARTED event.
+ NRF_PDM_INT_STOPPED = PDM_INTENSET_STOPPED_Msk, ///< Interrupt on EVENTS_STOPPED event.
+ NRF_PDM_INT_END = PDM_INTENSET_END_Msk ///< Interrupt on EVENTS_END event.
} nrf_pdm_int_mask_t;
-/**
- * @brief PDM clock frequency.
- */
+/** @brief PDM clock frequency. */
typedef enum
{
- NRF_PDM_FREQ_1000K = PDM_PDMCLKCTRL_FREQ_1000K, ///< PDM_CLK = 1.000 MHz.
- NRF_PDM_FREQ_1032K = PDM_PDMCLKCTRL_FREQ_Default, ///< PDM_CLK = 1.032 MHz.
- NRF_PDM_FREQ_1067K = PDM_PDMCLKCTRL_FREQ_1067K ///< PDM_CLK = 1.067 MHz.
+ NRF_PDM_FREQ_1000K = PDM_PDMCLKCTRL_FREQ_1000K, ///< PDM_CLK = 1.000 MHz.
+ NRF_PDM_FREQ_1032K = PDM_PDMCLKCTRL_FREQ_Default, ///< PDM_CLK = 1.032 MHz.
+ NRF_PDM_FREQ_1067K = PDM_PDMCLKCTRL_FREQ_1067K ///< PDM_CLK = 1.067 MHz.
} nrf_pdm_freq_t;
-
-/**
- * @brief PDM operation mode.
- */
+/** @brief PDM operation mode. */
typedef enum
{
NRF_PDM_MODE_STEREO = PDM_MODE_OPERATION_Stereo, ///< Sample and store one pair (Left + Right) of 16-bit samples per RAM word.
NRF_PDM_MODE_MONO = PDM_MODE_OPERATION_Mono ///< Sample and store two successive Left samples (16 bit each) per RAM word.
} nrf_pdm_mode_t;
-
-/**
- * @brief PDM sampling mode.
- */
+/** @brief PDM sampling mode. */
typedef enum
{
NRF_PDM_EDGE_LEFTFALLING = PDM_MODE_EDGE_LeftFalling, ///< Left (or mono) is sampled on falling edge of PDM_CLK.
@@ -116,67 +104,68 @@
/**
* @brief Function for triggering a PDM task.
*
- * @param[in] pdm_task PDM task.
+ * @param[in] task PDM task.
*/
-__STATIC_INLINE void nrf_pdm_task_trigger(nrf_pdm_task_t pdm_task);
+__STATIC_INLINE void nrf_pdm_task_trigger(nrf_pdm_task_t task);
/**
* @brief Function for getting the address of a PDM task register.
*
- * @param[in] pdm_task PDM task.
+ * @param[in] task PDM task.
*
* @return Address of the specified PDM task.
*/
-__STATIC_INLINE uint32_t nrf_pdm_task_address_get(nrf_pdm_task_t pdm_task);
+__STATIC_INLINE uint32_t nrf_pdm_task_address_get(nrf_pdm_task_t task);
/**
- * @brief Function for getting the state of a PDM event.
+ * @brief Function for retrieving the state of the PDM event.
*
- * @param[in] pdm_event PDM event.
+ * @param[in] event Event to be checked.
*
- * @return State of the specified PDM event.
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
-__STATIC_INLINE bool nrf_pdm_event_check(nrf_pdm_event_t pdm_event);
+__STATIC_INLINE bool nrf_pdm_event_check(nrf_pdm_event_t event);
/**
* @brief Function for clearing a PDM event.
*
- * @param[in] pdm_event PDM event.
+ * @param[in] event PDM event.
*/
-__STATIC_INLINE void nrf_pdm_event_clear(nrf_pdm_event_t pdm_event);
+__STATIC_INLINE void nrf_pdm_event_clear(nrf_pdm_event_t event);
/**
* @brief Function for getting the address of a PDM event register.
*
- * @param[in] pdm_event PDM event.
+ * @param[in] event PDM event.
*
* @return Address of the specified PDM event.
*/
-__STATIC_INLINE volatile uint32_t * nrf_pdm_event_address_get(nrf_pdm_event_t pdm_event);
+__STATIC_INLINE volatile uint32_t * nrf_pdm_event_address_get(nrf_pdm_event_t event);
/**
* @brief Function for enabling PDM interrupts.
*
- * @param[in] pdm_int_mask Interrupts to enable.
+ * @param[in] int_mask Mask of interrupts to be enabled.
*/
-__STATIC_INLINE void nrf_pdm_int_enable(uint32_t pdm_int_mask);
+__STATIC_INLINE void nrf_pdm_int_enable(uint32_t int_mask);
/**
* @brief Function for retrieving the state of PDM interrupts.
*
- * @param[in] pdm_int_mask Interrupts to check.
+ * @param[in] int_mask Mask of interrupts to be checked.
*
- * @retval true If all specified interrupts are enabled.
- * @retval false If at least one of the given interrupts is not enabled.
+ * @retval true All specified interrupts are enabled.
+ * @retval false At least one of the given interrupts is not enabled.
*/
-__STATIC_INLINE bool nrf_pdm_int_enable_check(uint32_t pdm_int_mask);
+__STATIC_INLINE bool nrf_pdm_int_enable_check(uint32_t int_mask);
/**
* @brief Function for disabling interrupts.
*
- * @param pdm_int_mask Interrupts to disable.
+ * @param[in] int_mask Mask of interrupts to be disabled.
*/
-__STATIC_INLINE void nrf_pdm_int_disable(uint32_t pdm_int_mask);
+__STATIC_INLINE void nrf_pdm_int_disable(uint32_t int_mask);
#if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
@@ -193,7 +182,7 @@
* @brief Function for clearing the subscribe configuration for a given
* PDM task.
*
- * @param[in] task Task for which to clear the configuration.
+ * @param[in] task Task for which to clear the configuration.
*/
__STATIC_INLINE void nrf_pdm_subscribe_clear(nrf_pdm_task_t task);
@@ -223,16 +212,14 @@
*/
__STATIC_INLINE void nrf_pdm_enable(void);
-/**
- * @brief Function for disabling the PDM peripheral.
- */
+/** @brief Function for disabling the PDM peripheral. */
__STATIC_INLINE void nrf_pdm_disable(void);
/**
* @brief Function for checking if the PDM peripheral is enabled.
*
- * @retval true If the PDM peripheral is enabled.
- * @retval false If the PDM peripheral is not enabled.
+ * @retval true The PDM peripheral is enabled.
+ * @retval false The PDM peripheral is not enabled.
*/
__STATIC_INLINE bool nrf_pdm_enable_check(void);
@@ -261,6 +248,8 @@
/**
* @brief Function for getting the PDM clock frequency.
+ *
+ * @return PDM clock frequency.
*/
__STATIC_INLINE nrf_pdm_freq_t nrf_pdm_clock_get(void);
@@ -272,9 +261,7 @@
*/
__STATIC_INLINE void nrf_pdm_psel_connect(uint32_t psel_clk, uint32_t psel_din);
-/**
- * @brief Function for disconnecting the PDM pins.
- */
+/** @brief Function for disconnecting the PDM pins. */
__STATIC_INLINE void nrf_pdm_psel_disconnect(void);
/**
@@ -296,12 +283,12 @@
/**
* @brief Function for setting the PDM sample buffer.
*
- * @param[in] p_buffer Pointer to the RAM address where samples should be written with EasyDMA.
- * @param[in] num Number of samples to allocate memory for in EasyDMA mode.
- *
* The amount of allocated RAM depends on the operation mode.
* - For stereo mode: N 32-bit words.
* - For mono mode: Ceil(N/2) 32-bit words.
+ *
+ * @param[in] p_buffer Pointer to the RAM address where samples are to be written with EasyDMA.
+ * @param[in] num Number of samples to allocate memory for in EasyDMA mode.
*/
__STATIC_INLINE void nrf_pdm_buffer_set(uint32_t * p_buffer, uint32_t num);
@@ -313,48 +300,48 @@
__STATIC_INLINE uint32_t * nrf_pdm_buffer_get(void);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
-__STATIC_INLINE void nrf_pdm_task_trigger(nrf_pdm_task_t pdm_task)
+__STATIC_INLINE void nrf_pdm_task_trigger(nrf_pdm_task_t task)
{
- *((volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_task)) = 0x1UL;
+ *((volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)task)) = 0x1UL;
}
-__STATIC_INLINE uint32_t nrf_pdm_task_address_get(nrf_pdm_task_t pdm_task)
+__STATIC_INLINE uint32_t nrf_pdm_task_address_get(nrf_pdm_task_t task)
{
- return (uint32_t)((uint8_t *)NRF_PDM + (uint32_t)pdm_task);
+ return (uint32_t)((uint8_t *)NRF_PDM + (uint32_t)task);
}
-__STATIC_INLINE bool nrf_pdm_event_check(nrf_pdm_event_t pdm_event)
+__STATIC_INLINE bool nrf_pdm_event_check(nrf_pdm_event_t event)
{
- return (bool)*(volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_event);
+ return (bool)*(volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)event);
}
-__STATIC_INLINE void nrf_pdm_event_clear(nrf_pdm_event_t pdm_event)
+__STATIC_INLINE void nrf_pdm_event_clear(nrf_pdm_event_t event)
{
- *((volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_event)) = 0x0UL;
+ *((volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)event)) = 0x0UL;
#if __CORTEX_M == 0x04
- volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_event));
+ volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)event));
(void)dummy;
#endif
}
-__STATIC_INLINE volatile uint32_t * nrf_pdm_event_address_get(nrf_pdm_event_t pdm_event)
+__STATIC_INLINE volatile uint32_t * nrf_pdm_event_address_get(nrf_pdm_event_t event)
{
- return (volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_event);
+ return (volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)event);
}
-__STATIC_INLINE void nrf_pdm_int_enable(uint32_t pdm_int_mask)
+__STATIC_INLINE void nrf_pdm_int_enable(uint32_t int_mask)
{
- NRF_PDM->INTENSET = pdm_int_mask;
+ NRF_PDM->INTENSET = int_mask;
}
-__STATIC_INLINE bool nrf_pdm_int_enable_check(uint32_t pdm_int_mask)
+__STATIC_INLINE bool nrf_pdm_int_enable_check(uint32_t int_mask)
{
- return (bool)(NRF_PDM->INTENSET & pdm_int_mask);
+ return (bool)(NRF_PDM->INTENSET & int_mask);
}
-__STATIC_INLINE void nrf_pdm_int_disable(uint32_t pdm_int_mask)
+__STATIC_INLINE void nrf_pdm_int_disable(uint32_t int_mask)
{
- NRF_PDM->INTENCLR = pdm_int_mask;
+ NRF_PDM->INTENCLR = int_mask;
}
#if defined(DPPI_PRESENT)
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_power.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_power.h
index 9e4d162..f56626b 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_power.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_power.h
@@ -46,78 +46,85 @@
*/
#if defined(POWER_INTENSET_SLEEPENTER_Msk) || defined(__NRFX_DOXYGEN__)
-/** @brief Auxiliary definition to mark the fact that sleep events are present */
+/** @brief Symbol indicating whether sleep events are present. */
#define NRF_POWER_HAS_SLEEPEVT 1
#else
#define NRF_POWER_HAS_SLEEPEVT 0
#endif // defined(POWER_INTENSET_SLEEPENTER_Msk) || defined(__NRFX_DOXYGEN__)
#if defined(POWER_USBREGSTATUS_VBUSDETECT_Msk) || defined(__NRFX_DOXYGEN__)
-/** @brief Auxiliary definition to mark the fact that power module manages USB regulator */
+/** @brief Symbol indicating whether the POWER peripheral controls the USB regulator. */
#define NRF_POWER_HAS_USBREG 1
#else
#define NRF_POWER_HAS_USBREG 0
#endif // defined(POWER_USBREGSTATUS_VBUSDETECT_Msk) || defined(__NRFX_DOXYGEN__)
#if defined(POWER_POFCON_THRESHOLDVDDH_Msk) || defined(__NRFX_DOXYGEN__)
-/** @brief Auxiliary definition to mark the fact that VDDH is present */
+/** @brief Symbol indicating whether VDDH is present. */
#define NRF_POWER_HAS_VDDH 1
#else
#define NRF_POWER_HAS_VDDH 0
#endif // defined(POWER_POFCON_THRESHOLDVDDH_Msk) || defined(__NRFX_DOXYGEN__)
+#if defined(POWER_DCDCEN0_DCDCEN_Msk) || defined(__NRFX_DOXYGEN__)
+/** @brief Symbol indicating whether DCDCEN for REG0 is present. */
+#define NRF_POWER_HAS_DCDCEN_VDDH 1
+#else
+#define NRF_POWER_HAS_DCDCEN_VDDH 0
+#endif
+
#if defined(POWER_DCDCEN_DCDCEN_Msk) || defined(__NRFX_DOXYGEN__)
-/** @brief Auxiliary definition to mark the fact that DCDCEN is present */
+/** @brief Symbol indicating whether DCDCEN for REG1 is present. */
#define NRF_POWER_HAS_DCDCEN 1
#else
#define NRF_POWER_HAS_DCDCEN 0
#endif
#if defined(POWER_POFCON_THRESHOLD_Msk) || defined(__NRFX_DOXYGEN__)
-/** @brief Auxiliary definition to mark the fact that POFCON is present */
+/** @brief Symbol indicating whether POFCON is present. */
#define NRF_POWER_HAS_POFCON 1
#else
#define NRF_POWER_HAS_POFCON 0
#endif
/** @brief POWER tasks. */
-typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
+typedef enum
{
- NRF_POWER_TASK_CONSTLAT = offsetof(NRF_POWER_Type, TASKS_CONSTLAT), /**< Enable constant latency mode */
- NRF_POWER_TASK_LOWPWR = offsetof(NRF_POWER_Type, TASKS_LOWPWR ), /**< Enable low power mode (variable latency) */
-} nrf_power_task_t; /*lint -restore */
+ NRF_POWER_TASK_CONSTLAT = offsetof(NRF_POWER_Type, TASKS_CONSTLAT), /**< Enable constant latency mode. */
+ NRF_POWER_TASK_LOWPWR = offsetof(NRF_POWER_Type, TASKS_LOWPWR ), /**< Enable low-power mode (variable latency). */
+} nrf_power_task_t;
/** @brief POWER events. */
-typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
+typedef enum
{
#if NRF_POWER_HAS_POFCON
- NRF_POWER_EVENT_POFWARN = offsetof(NRF_POWER_Type, EVENTS_POFWARN ), /**< Power failure warning */
+ NRF_POWER_EVENT_POFWARN = offsetof(NRF_POWER_Type, EVENTS_POFWARN ), /**< Power failure warning. */
#endif
#if NRF_POWER_HAS_SLEEPEVT
- NRF_POWER_EVENT_SLEEPENTER = offsetof(NRF_POWER_Type, EVENTS_SLEEPENTER ), /**< CPU entered WFI/WFE sleep */
- NRF_POWER_EVENT_SLEEPEXIT = offsetof(NRF_POWER_Type, EVENTS_SLEEPEXIT ), /**< CPU exited WFI/WFE sleep */
+ NRF_POWER_EVENT_SLEEPENTER = offsetof(NRF_POWER_Type, EVENTS_SLEEPENTER ), /**< CPU entered WFI/WFE sleep. */
+ NRF_POWER_EVENT_SLEEPEXIT = offsetof(NRF_POWER_Type, EVENTS_SLEEPEXIT ), /**< CPU exited WFI/WFE sleep. */
#endif
#if NRF_POWER_HAS_USBREG
- NRF_POWER_EVENT_USBDETECTED = offsetof(NRF_POWER_Type, EVENTS_USBDETECTED), /**< Voltage supply detected on VBUS */
- NRF_POWER_EVENT_USBREMOVED = offsetof(NRF_POWER_Type, EVENTS_USBREMOVED ), /**< Voltage supply removed from VBUS */
- NRF_POWER_EVENT_USBPWRRDY = offsetof(NRF_POWER_Type, EVENTS_USBPWRRDY ), /**< USB 3.3 V supply ready */
+ NRF_POWER_EVENT_USBDETECTED = offsetof(NRF_POWER_Type, EVENTS_USBDETECTED), /**< Voltage supply detected on VBUS. */
+ NRF_POWER_EVENT_USBREMOVED = offsetof(NRF_POWER_Type, EVENTS_USBREMOVED ), /**< Voltage supply removed from VBUS. */
+ NRF_POWER_EVENT_USBPWRRDY = offsetof(NRF_POWER_Type, EVENTS_USBPWRRDY ), /**< USB 3.3 V supply ready. */
#endif
-} nrf_power_event_t; /*lint -restore */
+} nrf_power_event_t;
/** @brief POWER interrupts. */
typedef enum
{
#if NRF_POWER_HAS_POFCON
- NRF_POWER_INT_POFWARN_MASK = POWER_INTENSET_POFWARN_Msk , /**< Write '1' to Enable interrupt for POFWARN event */
+ NRF_POWER_INT_POFWARN_MASK = POWER_INTENSET_POFWARN_Msk , /**< Write '1' to Enable interrupt for POFWARN event. */
#endif
#if NRF_POWER_HAS_SLEEPEVT
- NRF_POWER_INT_SLEEPENTER_MASK = POWER_INTENSET_SLEEPENTER_Msk , /**< Write '1' to Enable interrupt for SLEEPENTER event */
- NRF_POWER_INT_SLEEPEXIT_MASK = POWER_INTENSET_SLEEPEXIT_Msk , /**< Write '1' to Enable interrupt for SLEEPEXIT event */
+ NRF_POWER_INT_SLEEPENTER_MASK = POWER_INTENSET_SLEEPENTER_Msk , /**< Write '1' to Enable interrupt for SLEEPENTER event. */
+ NRF_POWER_INT_SLEEPEXIT_MASK = POWER_INTENSET_SLEEPEXIT_Msk , /**< Write '1' to Enable interrupt for SLEEPEXIT event. */
#endif
#if NRF_POWER_HAS_USBREG
- NRF_POWER_INT_USBDETECTED_MASK = POWER_INTENSET_USBDETECTED_Msk, /**< Write '1' to Enable interrupt for USBDETECTED event */
- NRF_POWER_INT_USBREMOVED_MASK = POWER_INTENSET_USBREMOVED_Msk , /**< Write '1' to Enable interrupt for USBREMOVED event */
- NRF_POWER_INT_USBPWRRDY_MASK = POWER_INTENSET_USBPWRRDY_Msk , /**< Write '1' to Enable interrupt for USBPWRRDY event */
+ NRF_POWER_INT_USBDETECTED_MASK = POWER_INTENSET_USBDETECTED_Msk, /**< Write '1' to Enable interrupt for USBDETECTED event. */
+ NRF_POWER_INT_USBREMOVED_MASK = POWER_INTENSET_USBREMOVED_Msk , /**< Write '1' to Enable interrupt for USBREMOVED event. */
+ NRF_POWER_INT_USBPWRRDY_MASK = POWER_INTENSET_USBPWRRDY_Msk , /**< Write '1' to Enable interrupt for USBPWRRDY event. */
#endif
} nrf_power_int_mask_t;
@@ -149,22 +156,21 @@
*/
typedef enum
{
- NRF_POWER_USBREGSTATUS_VBUSDETECT_MASK = POWER_USBREGSTATUS_VBUSDETECT_Msk, /**< USB detected or removed */
- NRF_POWER_USBREGSTATUS_OUTPUTRDY_MASK = POWER_USBREGSTATUS_OUTPUTRDY_Msk /**< USB 3.3 V supply ready */
+ NRF_POWER_USBREGSTATUS_VBUSDETECT_MASK = POWER_USBREGSTATUS_VBUSDETECT_Msk, /**< USB detected or removed. */
+ NRF_POWER_USBREGSTATUS_OUTPUTRDY_MASK = POWER_USBREGSTATUS_OUTPUTRDY_Msk /**< USB 3.3 V supply ready. */
} nrf_power_usbregstatus_mask_t;
#endif // NRF_POWER_HAS_USBREG
#if defined(POWER_RAMSTATUS_RAMBLOCK0_Msk) || defined(__NRFX_DOXYGEN__)
/**
- * @brief RAM blocks numbers
+ * @brief Numbers of RAM blocks
*
* @sa nrf_power_ramblock_mask_t
* @note
- * Ram blocks has to been used in nrf51.
- * In new CPU ram is divided into segments and this functionality is depreciated.
- * For the newer MCU see the PS for mapping between internal RAM and RAM blocks,
- * because this mapping is not 1:1, and functions related to old style blocks
- * should not be used.
+ * RAM blocks must be used in nRF51.
+ * In newer SoCs, RAM is divided into segments and this functionality is not supported.
+ * See the PS for mapping between the internal RAM and RAM blocks, because this
+ * mapping is not 1:1, and functions related to old style blocks must not be used.
*/
typedef enum
{
@@ -175,7 +181,7 @@
} nrf_power_ramblock_t;
/**
- * @brief RAM blocks masks
+ * @brief Masks of RAM blocks.
*
* @sa nrf_power_ramblock_t
*/
@@ -195,15 +201,15 @@
*/
typedef enum
{
- NRF_POWER_ONRAM0, /**< Keep RAM block 0 on or off in system ON Mode */
- NRF_POWER_OFFRAM0, /**< Keep retention on RAM block 0 when RAM block is switched off */
- NRF_POWER_ONRAM1, /**< Keep RAM block 1 on or off in system ON Mode */
- NRF_POWER_OFFRAM1, /**< Keep retention on RAM block 1 when RAM block is switched off */
- NRF_POWER_ONRAM2, /**< Keep RAM block 2 on or off in system ON Mode */
- NRF_POWER_OFFRAM2, /**< Keep retention on RAM block 2 when RAM block is switched off */
- NRF_POWER_ONRAM3, /**< Keep RAM block 3 on or off in system ON Mode */
- NRF_POWER_OFFRAM3, /**< Keep retention on RAM block 3 when RAM block is switched off */
-} nrf_power_onoffram_t;
+ NRF_POWER_ONRAM0, /**< Keep RAM block 0 ON or OFF in System ON mode. */
+ NRF_POWER_OFFRAM0, /**< Keep retention on RAM block 0 when RAM block is switched OFF. */
+ NRF_POWER_ONRAM1, /**< Keep RAM block 1 ON or OFF in System ON mode. */
+ NRF_POWER_OFFRAM1, /**< Keep retention on RAM block 1 when RAM block is switched OFF. */
+ NRF_POWER_ONRAM2, /**< Keep RAM block 2 ON or OFF in System ON mode. */
+ NRF_POWER_OFFRAM2, /**< Keep retention on RAM block 2 when RAM block is switched OFF. */
+ NRF_POWER_ONRAM3, /**< Keep RAM block 3 ON or OFF in System ON mode. */
+ NRF_POWER_OFFRAM3, /**< Keep retention on RAM block 3 when RAM block is switched OFF. */
+}nrf_power_onoffram_t;
/**
* @brief RAM power state bit masks
@@ -212,33 +218,33 @@
*/
typedef enum
{
- NRF_POWER_ONRAM0_MASK = 1U << NRF_POWER_ONRAM0, /**< Keep RAM block 0 on or off in system ON Mode */
- NRF_POWER_OFFRAM0_MASK = 1U << NRF_POWER_OFFRAM0, /**< Keep retention on RAM block 0 when RAM block is switched off */
- NRF_POWER_ONRAM1_MASK = 1U << NRF_POWER_ONRAM1, /**< Keep RAM block 1 on or off in system ON Mode */
- NRF_POWER_OFFRAM1_MASK = 1U << NRF_POWER_OFFRAM1, /**< Keep retention on RAM block 1 when RAM block is switched off */
- NRF_POWER_ONRAM2_MASK = 1U << NRF_POWER_ONRAM2, /**< Keep RAM block 2 on or off in system ON Mode */
- NRF_POWER_OFFRAM2_MASK = 1U << NRF_POWER_OFFRAM2, /**< Keep retention on RAM block 2 when RAM block is switched off */
- NRF_POWER_ONRAM3_MASK = 1U << NRF_POWER_ONRAM3, /**< Keep RAM block 3 on or off in system ON Mode */
- NRF_POWER_OFFRAM3_MASK = 1U << NRF_POWER_OFFRAM3, /**< Keep retention on RAM block 3 when RAM block is switched off */
-} nrf_power_onoffram_mask_t;
+ NRF_POWER_ONRAM0_MASK = 1U << NRF_POWER_ONRAM0, /**< Keep RAM block 0 ON or OFF in System ON mode. */
+ NRF_POWER_OFFRAM0_MASK = 1U << NRF_POWER_OFFRAM0, /**< Keep retention on RAM block 0 when RAM block is switched OFF. */
+ NRF_POWER_ONRAM1_MASK = 1U << NRF_POWER_ONRAM1, /**< Keep RAM block 1 ON or OFF in System ON mode. */
+ NRF_POWER_OFFRAM1_MASK = 1U << NRF_POWER_OFFRAM1, /**< Keep retention on RAM block 1 when RAM block is switched OFF. */
+ NRF_POWER_ONRAM2_MASK = 1U << NRF_POWER_ONRAM2, /**< Keep RAM block 2 ON or OFF in System ON mode. */
+ NRF_POWER_OFFRAM2_MASK = 1U << NRF_POWER_OFFRAM2, /**< Keep retention on RAM block 2 when RAM block is switched OFF. */
+ NRF_POWER_ONRAM3_MASK = 1U << NRF_POWER_ONRAM3, /**< Keep RAM block 3 ON or OFF in System ON mode. */
+ NRF_POWER_OFFRAM3_MASK = 1U << NRF_POWER_OFFRAM3, /**< Keep retention on RAM block 3 when RAM block is switched OFF. */
+}nrf_power_onoffram_mask_t;
#if NRF_POWER_HAS_POFCON
/** @brief Power failure comparator thresholds. */
typedef enum
{
- NRF_POWER_POFTHR_V21 = POWER_POFCON_THRESHOLD_V21, /**< Set threshold to 2.1 V */
- NRF_POWER_POFTHR_V23 = POWER_POFCON_THRESHOLD_V23, /**< Set threshold to 2.3 V */
- NRF_POWER_POFTHR_V25 = POWER_POFCON_THRESHOLD_V25, /**< Set threshold to 2.5 V */
- NRF_POWER_POFTHR_V27 = POWER_POFCON_THRESHOLD_V27, /**< Set threshold to 2.7 V */
+ NRF_POWER_POFTHR_V21 = POWER_POFCON_THRESHOLD_V21, /**< Set threshold to 2.1 V. */
+ NRF_POWER_POFTHR_V23 = POWER_POFCON_THRESHOLD_V23, /**< Set threshold to 2.3 V. */
+ NRF_POWER_POFTHR_V25 = POWER_POFCON_THRESHOLD_V25, /**< Set threshold to 2.5 V. */
+ NRF_POWER_POFTHR_V27 = POWER_POFCON_THRESHOLD_V27, /**< Set threshold to 2.7 V. */
#if defined(POWER_POFCON_THRESHOLD_V17) || defined(__NRFX_DOXYGEN__)
- NRF_POWER_POFTHR_V17 = POWER_POFCON_THRESHOLD_V17, /**< Set threshold to 1.7 V */
- NRF_POWER_POFTHR_V18 = POWER_POFCON_THRESHOLD_V18, /**< Set threshold to 1.8 V */
- NRF_POWER_POFTHR_V19 = POWER_POFCON_THRESHOLD_V19, /**< Set threshold to 1.9 V */
- NRF_POWER_POFTHR_V20 = POWER_POFCON_THRESHOLD_V20, /**< Set threshold to 2.0 V */
- NRF_POWER_POFTHR_V22 = POWER_POFCON_THRESHOLD_V22, /**< Set threshold to 2.2 V */
- NRF_POWER_POFTHR_V24 = POWER_POFCON_THRESHOLD_V24, /**< Set threshold to 2.4 V */
- NRF_POWER_POFTHR_V26 = POWER_POFCON_THRESHOLD_V26, /**< Set threshold to 2.6 V */
- NRF_POWER_POFTHR_V28 = POWER_POFCON_THRESHOLD_V28, /**< Set threshold to 2.8 V */
+ NRF_POWER_POFTHR_V17 = POWER_POFCON_THRESHOLD_V17, /**< Set threshold to 1.7 V. */
+ NRF_POWER_POFTHR_V18 = POWER_POFCON_THRESHOLD_V18, /**< Set threshold to 1.8 V. */
+ NRF_POWER_POFTHR_V19 = POWER_POFCON_THRESHOLD_V19, /**< Set threshold to 1.9 V. */
+ NRF_POWER_POFTHR_V20 = POWER_POFCON_THRESHOLD_V20, /**< Set threshold to 2.0 V. */
+ NRF_POWER_POFTHR_V22 = POWER_POFCON_THRESHOLD_V22, /**< Set threshold to 2.2 V. */
+ NRF_POWER_POFTHR_V24 = POWER_POFCON_THRESHOLD_V24, /**< Set threshold to 2.4 V. */
+ NRF_POWER_POFTHR_V26 = POWER_POFCON_THRESHOLD_V26, /**< Set threshold to 2.6 V. */
+ NRF_POWER_POFTHR_V28 = POWER_POFCON_THRESHOLD_V28, /**< Set threshold to 2.8 V. */
#endif // defined(POWER_POFCON_THRESHOLD_V17) || defined(__NRFX_DOXYGEN__)
} nrf_power_pof_thr_t;
#endif // NRF_POWER_HAS_POFCON
@@ -247,22 +253,22 @@
/** @brief Power failure comparator thresholds for VDDH. */
typedef enum
{
- NRF_POWER_POFTHRVDDH_V27 = POWER_POFCON_THRESHOLDVDDH_V27, /**< Set threshold to 2.7 V */
- NRF_POWER_POFTHRVDDH_V28 = POWER_POFCON_THRESHOLDVDDH_V28, /**< Set threshold to 2.8 V */
- NRF_POWER_POFTHRVDDH_V29 = POWER_POFCON_THRESHOLDVDDH_V29, /**< Set threshold to 2.9 V */
- NRF_POWER_POFTHRVDDH_V30 = POWER_POFCON_THRESHOLDVDDH_V30, /**< Set threshold to 3.0 V */
- NRF_POWER_POFTHRVDDH_V31 = POWER_POFCON_THRESHOLDVDDH_V31, /**< Set threshold to 3.1 V */
- NRF_POWER_POFTHRVDDH_V32 = POWER_POFCON_THRESHOLDVDDH_V32, /**< Set threshold to 3.2 V */
- NRF_POWER_POFTHRVDDH_V33 = POWER_POFCON_THRESHOLDVDDH_V33, /**< Set threshold to 3.3 V */
- NRF_POWER_POFTHRVDDH_V34 = POWER_POFCON_THRESHOLDVDDH_V34, /**< Set threshold to 3.4 V */
- NRF_POWER_POFTHRVDDH_V35 = POWER_POFCON_THRESHOLDVDDH_V35, /**< Set threshold to 3.5 V */
- NRF_POWER_POFTHRVDDH_V36 = POWER_POFCON_THRESHOLDVDDH_V36, /**< Set threshold to 3.6 V */
- NRF_POWER_POFTHRVDDH_V37 = POWER_POFCON_THRESHOLDVDDH_V37, /**< Set threshold to 3.7 V */
- NRF_POWER_POFTHRVDDH_V38 = POWER_POFCON_THRESHOLDVDDH_V38, /**< Set threshold to 3.8 V */
- NRF_POWER_POFTHRVDDH_V39 = POWER_POFCON_THRESHOLDVDDH_V39, /**< Set threshold to 3.9 V */
- NRF_POWER_POFTHRVDDH_V40 = POWER_POFCON_THRESHOLDVDDH_V40, /**< Set threshold to 4.0 V */
- NRF_POWER_POFTHRVDDH_V41 = POWER_POFCON_THRESHOLDVDDH_V41, /**< Set threshold to 4.1 V */
- NRF_POWER_POFTHRVDDH_V42 = POWER_POFCON_THRESHOLDVDDH_V42, /**< Set threshold to 4.2 V */
+ NRF_POWER_POFTHRVDDH_V27 = POWER_POFCON_THRESHOLDVDDH_V27, /**< Set threshold to 2.7 V. */
+ NRF_POWER_POFTHRVDDH_V28 = POWER_POFCON_THRESHOLDVDDH_V28, /**< Set threshold to 2.8 V. */
+ NRF_POWER_POFTHRVDDH_V29 = POWER_POFCON_THRESHOLDVDDH_V29, /**< Set threshold to 2.9 V. */
+ NRF_POWER_POFTHRVDDH_V30 = POWER_POFCON_THRESHOLDVDDH_V30, /**< Set threshold to 3.0 V. */
+ NRF_POWER_POFTHRVDDH_V31 = POWER_POFCON_THRESHOLDVDDH_V31, /**< Set threshold to 3.1 V. */
+ NRF_POWER_POFTHRVDDH_V32 = POWER_POFCON_THRESHOLDVDDH_V32, /**< Set threshold to 3.2 V. */
+ NRF_POWER_POFTHRVDDH_V33 = POWER_POFCON_THRESHOLDVDDH_V33, /**< Set threshold to 3.3 V. */
+ NRF_POWER_POFTHRVDDH_V34 = POWER_POFCON_THRESHOLDVDDH_V34, /**< Set threshold to 3.4 V. */
+ NRF_POWER_POFTHRVDDH_V35 = POWER_POFCON_THRESHOLDVDDH_V35, /**< Set threshold to 3.5 V. */
+ NRF_POWER_POFTHRVDDH_V36 = POWER_POFCON_THRESHOLDVDDH_V36, /**< Set threshold to 3.6 V. */
+ NRF_POWER_POFTHRVDDH_V37 = POWER_POFCON_THRESHOLDVDDH_V37, /**< Set threshold to 3.7 V. */
+ NRF_POWER_POFTHRVDDH_V38 = POWER_POFCON_THRESHOLDVDDH_V38, /**< Set threshold to 3.8 V. */
+ NRF_POWER_POFTHRVDDH_V39 = POWER_POFCON_THRESHOLDVDDH_V39, /**< Set threshold to 3.9 V. */
+ NRF_POWER_POFTHRVDDH_V40 = POWER_POFCON_THRESHOLDVDDH_V40, /**< Set threshold to 4.0 V. */
+ NRF_POWER_POFTHRVDDH_V41 = POWER_POFCON_THRESHOLDVDDH_V41, /**< Set threshold to 4.1 V. */
+ NRF_POWER_POFTHRVDDH_V42 = POWER_POFCON_THRESHOLDVDDH_V42, /**< Set threshold to 4.2 V. */
} nrf_power_pof_thrvddh_t;
/** @brief Main regulator status. */
@@ -284,39 +290,39 @@
{
/** Keep RAM section S0 ON in System ON mode */
NRF_POWER_RAMPOWER_S0POWER = POWER_RAM_POWER_S0POWER_Pos,
- NRF_POWER_RAMPOWER_S1POWER, /**< Keep RAM section S1 ON in System ON mode */
- NRF_POWER_RAMPOWER_S2POWER, /**< Keep RAM section S2 ON in System ON mode */
- NRF_POWER_RAMPOWER_S3POWER, /**< Keep RAM section S3 ON in System ON mode */
- NRF_POWER_RAMPOWER_S4POWER, /**< Keep RAM section S4 ON in System ON mode */
- NRF_POWER_RAMPOWER_S5POWER, /**< Keep RAM section S5 ON in System ON mode */
- NRF_POWER_RAMPOWER_S6POWER, /**< Keep RAM section S6 ON in System ON mode */
- NRF_POWER_RAMPOWER_S7POWER, /**< Keep RAM section S7 ON in System ON mode */
- NRF_POWER_RAMPOWER_S8POWER, /**< Keep RAM section S8 ON in System ON mode */
- NRF_POWER_RAMPOWER_S9POWER, /**< Keep RAM section S9 ON in System ON mode */
- NRF_POWER_RAMPOWER_S10POWER, /**< Keep RAM section S10 ON in System ON mode */
- NRF_POWER_RAMPOWER_S11POWER, /**< Keep RAM section S11 ON in System ON mode */
- NRF_POWER_RAMPOWER_S12POWER, /**< Keep RAM section S12 ON in System ON mode */
- NRF_POWER_RAMPOWER_S13POWER, /**< Keep RAM section S13 ON in System ON mode */
- NRF_POWER_RAMPOWER_S14POWER, /**< Keep RAM section S14 ON in System ON mode */
- NRF_POWER_RAMPOWER_S15POWER, /**< Keep RAM section S15 ON in System ON mode */
+ NRF_POWER_RAMPOWER_S1POWER, /**< Keep RAM section S1 ON in System ON mode. */
+ NRF_POWER_RAMPOWER_S2POWER, /**< Keep RAM section S2 ON in System ON mode. */
+ NRF_POWER_RAMPOWER_S3POWER, /**< Keep RAM section S3 ON in System ON mode. */
+ NRF_POWER_RAMPOWER_S4POWER, /**< Keep RAM section S4 ON in System ON mode. */
+ NRF_POWER_RAMPOWER_S5POWER, /**< Keep RAM section S5 ON in System ON mode. */
+ NRF_POWER_RAMPOWER_S6POWER, /**< Keep RAM section S6 ON in System ON mode. */
+ NRF_POWER_RAMPOWER_S7POWER, /**< Keep RAM section S7 ON in System ON mode. */
+ NRF_POWER_RAMPOWER_S8POWER, /**< Keep RAM section S8 ON in System ON mode. */
+ NRF_POWER_RAMPOWER_S9POWER, /**< Keep RAM section S9 ON in System ON mode. */
+ NRF_POWER_RAMPOWER_S10POWER, /**< Keep RAM section S10 ON in System ON mode. */
+ NRF_POWER_RAMPOWER_S11POWER, /**< Keep RAM section S11 ON in System ON mode. */
+ NRF_POWER_RAMPOWER_S12POWER, /**< Keep RAM section S12 ON in System ON mode. */
+ NRF_POWER_RAMPOWER_S13POWER, /**< Keep RAM section S13 ON in System ON mode. */
+ NRF_POWER_RAMPOWER_S14POWER, /**< Keep RAM section S14 ON in System ON mode. */
+ NRF_POWER_RAMPOWER_S15POWER, /**< Keep RAM section S15 ON in System ON mode. */
/** Keep section retention in OFF mode when section is OFF */
NRF_POWER_RAMPOWER_S0RETENTION = POWER_RAM_POWER_S0RETENTION_Pos,
- NRF_POWER_RAMPOWER_S1RETENTION, /**< Keep section retention in OFF mode when section is OFF */
- NRF_POWER_RAMPOWER_S2RETENTION, /**< Keep section retention in OFF mode when section is OFF */
- NRF_POWER_RAMPOWER_S3RETENTION, /**< Keep section retention in OFF mode when section is OFF */
- NRF_POWER_RAMPOWER_S4RETENTION, /**< Keep section retention in OFF mode when section is OFF */
- NRF_POWER_RAMPOWER_S5RETENTION, /**< Keep section retention in OFF mode when section is OFF */
- NRF_POWER_RAMPOWER_S6RETENTION, /**< Keep section retention in OFF mode when section is OFF */
- NRF_POWER_RAMPOWER_S7RETENTION, /**< Keep section retention in OFF mode when section is OFF */
- NRF_POWER_RAMPOWER_S8RETENTION, /**< Keep section retention in OFF mode when section is OFF */
- NRF_POWER_RAMPOWER_S9RETENTION, /**< Keep section retention in OFF mode when section is OFF */
- NRF_POWER_RAMPOWER_S10RETENTION, /**< Keep section retention in OFF mode when section is OFF */
- NRF_POWER_RAMPOWER_S11RETENTION, /**< Keep section retention in OFF mode when section is OFF */
- NRF_POWER_RAMPOWER_S12RETENTION, /**< Keep section retention in OFF mode when section is OFF */
- NRF_POWER_RAMPOWER_S13RETENTION, /**< Keep section retention in OFF mode when section is OFF */
- NRF_POWER_RAMPOWER_S14RETENTION, /**< Keep section retention in OFF mode when section is OFF */
- NRF_POWER_RAMPOWER_S15RETENTION, /**< Keep section retention in OFF mode when section is OFF */
+ NRF_POWER_RAMPOWER_S1RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
+ NRF_POWER_RAMPOWER_S2RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
+ NRF_POWER_RAMPOWER_S3RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
+ NRF_POWER_RAMPOWER_S4RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
+ NRF_POWER_RAMPOWER_S5RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
+ NRF_POWER_RAMPOWER_S6RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
+ NRF_POWER_RAMPOWER_S7RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
+ NRF_POWER_RAMPOWER_S8RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
+ NRF_POWER_RAMPOWER_S9RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
+ NRF_POWER_RAMPOWER_S10RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
+ NRF_POWER_RAMPOWER_S11RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
+ NRF_POWER_RAMPOWER_S12RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
+ NRF_POWER_RAMPOWER_S13RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
+ NRF_POWER_RAMPOWER_S14RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
+ NRF_POWER_RAMPOWER_S15RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
} nrf_power_rampower_t;
/**
@@ -384,12 +390,12 @@
__STATIC_INLINE void nrf_power_event_clear(nrf_power_event_t event);
/**
- * @brief Function for returning the state of a specific event.
+ * @brief Function for retrieving the state of the POWER event.
*
- * @param[in] event Event.
+ * @param[in] event Event to be checked.
*
- * @retval true If the event is set.
- * @retval false If the event is not set.
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_power_event_check(nrf_power_event_t event);
@@ -400,8 +406,8 @@
*
* @param[in] event Event.
*
- * @retval true If the event was set.
- * @retval false If the event was not set.
+ * @retval true The event was set.
+ * @retval false The event was not set.
*/
__STATIC_INLINE bool nrf_power_event_get_and_clear(nrf_power_event_t event);
@@ -426,8 +432,8 @@
*
* @param[in] int_mask Interrupts mask.
*
- * @retval true If any of selected interrupts is enabled.
- * @retval false If none of selected interrupts is enabled.
+ * @retval true Any of selected interrupts is enabled.
+ * @retval false None of selected interrupts is enabled.
*/
__STATIC_INLINE bool nrf_power_int_enable_check(uint32_t int_mask);
@@ -484,13 +490,13 @@
#endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
- * @brief Get reset reason mask
+ * @brief Function for getting the reset reason bitmask.
*
- * Function returns the reset reason.
+ * This function returns the reset reason bitmask.
* Unless cleared, the RESETREAS register is cumulative.
* A field is cleared by writing '1' to it (see @ref nrf_power_resetreas_clear).
- * If none of the reset sources are flagged,
- * this indicates that the chip was reset from the on-chip reset generator,
+ * If none of the reset sources is flagged,
+ * the chip was reset from the on-chip reset generator,
* which indicates a power-on-reset or a brown out reset.
*
* @return The mask of reset reasons constructed with @ref nrf_power_resetreas_mask_t.
@@ -498,9 +504,9 @@
__STATIC_INLINE uint32_t nrf_power_resetreas_get(void);
/**
- * @brief Clear selected reset reason field
+ * @brief Function for clearing the selected reset reason field.
*
- * Function clears selected reset reason fields.
+ * This function clears the selected reset reason field.
*
* @param[in] mask The mask constructed from @ref nrf_power_resetreas_mask_t enumerator values.
* @sa nrf_power_resetreas_get
@@ -511,28 +517,26 @@
/**
* @brief Function for getting power status of the LTE Modem domain.
*
- * @retval true If the LTE Modem domain is powered on.
- * @retval false If the LTE Modem domain is powered off.
+ * @retval true The LTE Modem domain is powered on.
+ * @retval false The LTE Modem domain is powered off.
*/
__STATIC_INLINE bool nrf_power_powerstatus_get(void);
#endif
#if defined(POWER_RAMSTATUS_RAMBLOCK0_Msk) || defined(__NRFX_DOXYGEN__)
/**
- * @brief Get RAMSTATUS register
+ * @brief Function for getting the RAMSTATUS register.
*
- * Returns the masks of RAM blocks that are powered ON.
- *
- * @return Value with bits sets according to masks in @ref nrf_power_ramblock_mask_t.
+ * @return Value with bits set according to the masks in @ref nrf_power_ramblock_mask_t.
*/
__STATIC_INLINE uint32_t nrf_power_ramstatus_get(void);
#endif // defined(POWER_RAMSTATUS_RAMBLOCK0_Msk) || defined(__NRFX_DOXYGEN__)
#if defined(POWER_SYSTEMOFF_SYSTEMOFF_Enter)
/**
- * @brief Go to system OFF
+ * @brief Function for going into System OFF mode.
*
- * This function puts the CPU into system off mode.
+ * This function puts the CPU in System OFF mode.
* The only way to wake up the CPU is by reset.
*
* @note This function never returns.
@@ -542,80 +546,78 @@
#if NRF_POWER_HAS_POFCON
/**
- * @brief Set power failure comparator configuration
+ * @brief Function for setting the power failure comparator configuration.
*
- * Sets power failure comparator threshold and enable/disable flag.
- *
- * @param[in] enabled Set to true if power failure comparator should be enabled.
- * @param[in] thr Set the voltage threshold value.
- *
+ * This function sets the power failure comparator threshold and enables or disables flag.
* @note
- * If VDDH settings is present in the device, this function would
- * clear it settings (set to the lowest voltage).
+ * If VDDH settings are present in the device, this function will
+ * clear its settings (set to the lowest voltage).
* Use @ref nrf_power_pofcon_vddh_set function to set new value.
+ *
+ * @param enabled Sets to true if power failure comparator is to be enabled.
+ * @param thr Sets the voltage threshold value.
+ *
*/
__STATIC_INLINE void nrf_power_pofcon_set(bool enabled, nrf_power_pof_thr_t thr);
/**
- * @brief Get power failure comparator configuration
+ * @brief Function for getting the power failure comparator configuration.
*
- * Get power failure comparator threshold and enable bit.
- *
- * @param[out] p_enabled Function would set this boolean variable to true
+ * @param[out] p_enabled Function sets this boolean variable to true
* if power failure comparator is enabled.
* The pointer can be NULL if we do not need this information.
*
- * @return Threshold setting for power failure comparator
+ * @return Threshold setting for power failure comparator.
*/
__STATIC_INLINE nrf_power_pof_thr_t nrf_power_pofcon_get(bool * p_enabled);
#endif // NRF_POWER_HAS_POFCON
#if NRF_POWER_HAS_VDDH
/**
- * @brief Set VDDH power failure comparator threshold
+ * @brief Function for setting the VDDH power failure comparator threshold.
*
- * @param[in] thr Threshold to be set
+ * @param thr Threshold to be set.
*/
__STATIC_INLINE void nrf_power_pofcon_vddh_set(nrf_power_pof_thrvddh_t thr);
/**
- * @brief Get VDDH power failure comparator threshold
+ * @brief Function for getting the VDDH power failure comparator threshold.
*
- * @return VDDH threshold currently configured
+ * @return VDDH threshold currently configured.
*/
__STATIC_INLINE nrf_power_pof_thrvddh_t nrf_power_pofcon_vddh_get(void);
#endif // NRF_POWER_HAS_VDDH
/**
- * @brief Set general purpose retention register
+ * @brief Function for setting the general purpose retention register.
*
- * @param[in] val Value to be set in the register
+ * @param[in] val Value to be set in the register.
*/
__STATIC_INLINE void nrf_power_gpregret_set(uint8_t val);
/**
- * @brief Get general purpose retention register
+ * @brief Function for getting general purpose retention register.
*
- * @return The value from the register
+ * @return The value from the register.
*/
__STATIC_INLINE uint8_t nrf_power_gpregret_get(void);
#if defined(POWER_GPREGRET2_GPREGRET_Msk) || defined(__NRFX_DOXYGEN__)
/**
- * @brief Set general purpose retention register 2
+ * @brief Function for setting the general purpose retention register 2.
*
- * @note This register is not available in nrf51 MCU family
+ * @note This register is not available in the nRF51 MCU family.
*
- * @param[in] val Value to be set in the register
+ * @param[in] val Value to be set in the register.
*/
__STATIC_INLINE void nrf_power_gpregret2_set(uint8_t val);
/**
- * @brief Get general purpose retention register 2
+ * @brief Function for getting the general purpose retention register 2.
*
* @note This register is not available in all MCUs.
*
- * @return The value from the register
+ * @return The value from the register.
*/
__STATIC_INLINE uint8_t nrf_power_gpregret2_get(void);
#endif // defined(POWER_GPREGRET2_GPREGRET_Msk) || defined(__NRFX_DOXYGEN__)
@@ -643,31 +645,31 @@
* @brief Enable or disable DCDC converter
*
* @note
- * If the device consist of high voltage power input (VDDH) this setting
- * would relate to the converter on low voltage side (1.3 V output).
+ * If the device consist of high voltage power input (VDDH), this setting
+ * will relate to the converter on low voltage side (1.3 V output).
*
- * @param[in] enable Set true to enable or false to disable DCDC converter.
+ * @param[in] enable Set true to enable the DCDC converter or false to disable the DCDC converter.
*/
__STATIC_INLINE void nrf_power_dcdcen_set(bool enable);
/**
- * @brief Get the state of DCDC converter
+ * @brief Function for getting the state of the DCDC converter.
*
* @note
- * If the device consist of high voltage power input (VDDH) this setting
- * would relate to the converter on low voltage side (1.3 V output).
+ * If the device consist of high voltage power input (VDDH), this setting
+ * will relate to the converter on low voltage side (1.3 V output).
*
- * @retval true Converter is enabled
- * @retval false Converter is disabled
+ * @retval true Converter is enabled.
+ * @retval false Converter is disabled.
*/
__STATIC_INLINE bool nrf_power_dcdcen_get(void);
#endif // NRF_POWER_HAS_DCDCEN
#if defined(POWER_RAM_POWER_S0POWER_Msk) || defined(__NRFX_DOXYGEN__)
/**
- * @brief Turn ON sections in selected RAM block.
+ * @brief Turn ON sections in the selected RAM block.
*
- * This function turns ON sections in block and also block retention.
+ * This function turns ON several sections in one block and also block retention.
*
* @sa nrf_power_rampower_mask_t
* @sa nrf_power_rampower_mask_off
@@ -679,9 +681,9 @@
__STATIC_INLINE void nrf_power_rampower_mask_on(uint8_t block, uint32_t section_mask);
/**
- * @brief Turn ON sections in selected RAM block.
+ * @brief Turn ON sections in the selected RAM block.
*
- * This function turns OFF sections in block and also block retention.
+ * This function turns OFF several sections in one block and also block retention.
*
* @sa nrf_power_rampower_mask_t
* @sa nrf_power_rampower_mask_off
@@ -693,7 +695,7 @@
__STATIC_INLINE void nrf_power_rampower_mask_off(uint8_t block, uint32_t section_mask);
/**
- * @brief Get the mask of ON and retention sections in selected RAM block.
+ * @brief Function for getting the ON mask and retention sections in the selected RAM block.
*
* @param[in] block RAM block index.
*
@@ -702,33 +704,35 @@
__STATIC_INLINE uint32_t nrf_power_rampower_mask_get(uint8_t block);
#endif /* defined(POWER_RAM_POWER_S0POWER_Msk) || defined(__NRFX_DOXYGEN__) */
-#if NRF_POWER_HAS_VDDH
+#if NRF_POWER_HAS_DCDCEN_VDDH
/**
- * @brief Enable of disable DCDC converter on VDDH
+ * @brief Function for enabling or disabling the DCDC converter on VDDH.
*
- * @param[in] enable Set true to enable or false to disable DCDC converter.
+ * @param enable Set true to enable the DCDC converter or false to disable the DCDC converter.
*/
__STATIC_INLINE void nrf_power_dcdcen_vddh_set(bool enable);
/**
- * @brief Get the state of DCDC converter on VDDH
+ * @brief Function for getting the state of DCDC converter on VDDH.
*
- * @retval true Converter is enabled
- * @retval false Converter is disabled
+ * @retval true Converter is enabled.
+ * @retval false Converter is disabled.
*/
__STATIC_INLINE bool nrf_power_dcdcen_vddh_get(void);
+#endif // NRF_POWER_HAS_DCDCEN_VDDH
+#if NRF_POWER_HAS_VDDH
/**
- * @brief Get main supply status
+ * @brief Function for getting the main supply status.
*
- * @return Current main supply status
+ * @return The current main supply status.
*/
__STATIC_INLINE nrf_power_mainregstatus_t nrf_power_mainregstatus_get(void);
#endif // NRF_POWER_HAS_VDDH
#if NRF_POWER_HAS_USBREG
/**
- * @brief Get the whole USBREGSTATUS register
+ * @brief Function for getting the whole USBREGSTATUS register.
*
* @return The USBREGSTATUS register value.
* Use @ref nrf_power_usbregstatus_mask_t values for bit masking.
@@ -739,23 +743,23 @@
__STATIC_INLINE uint32_t nrf_power_usbregstatus_get(void);
/**
- * @brief VBUS input detection status
+ * @brief Function for getting the VBUS input detection status.
*
* USBDETECTED and USBREMOVED events are derived from this information
*
- * @retval false VBUS voltage below valid threshold
- * @retval true VBUS voltage above valid threshold
+ * @retval false VBUS voltage below valid threshold.
+ * @retval true VBUS voltage above valid threshold.
*
* @sa nrf_power_usbregstatus_get
*/
__STATIC_INLINE bool nrf_power_usbregstatus_vbusdet_get(void);
/**
- * @brief USB supply output settling time elapsed
+ * @brief Function for getting the state of the elapsed time for the USB supply output settling.
*
- * @retval false USBREG output settling time not elapsed
+ * @retval false USBREG output settling time not elapsed.
* @retval true USBREG output settling time elapsed
- * (same information as USBPWRRDY event)
+ * (same information as USBPWRRDY event).
*
* @sa nrf_power_usbregstatus_get
*/
@@ -1035,7 +1039,7 @@
}
#endif /* defined(POWER_RAM_POWER_S0POWER_Msk) */
-#if NRF_POWER_HAS_VDDH
+#if NRF_POWER_HAS_DCDCEN_VDDH
__STATIC_INLINE void nrf_power_dcdcen_vddh_set(bool enable)
{
NRF_POWER->DCDCEN0 = (enable ?
@@ -1049,7 +1053,9 @@
==
(POWER_DCDCEN0_DCDCEN_Enabled << POWER_DCDCEN0_DCDCEN_Pos);
}
+#endif // NRF_POWER_HAS_DCDCEN_VDDH
+#if NRF_POWER_HAS_VDDH
__STATIC_INLINE nrf_power_mainregstatus_t nrf_power_mainregstatus_get(void)
{
return (nrf_power_mainregstatus_t)(((NRF_POWER->MAINREGSTATUS) &
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_ppi.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_ppi.h
index c87c7ed..16a52bf 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_ppi.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_ppi.h
@@ -42,16 +42,11 @@
* @defgroup nrf_ppi_hal PPI HAL
* @{
* @ingroup nrf_ppi
- * @brief Hardware access layer for managing the Programmable Peripheral Interconnect (PPI)
+ * @brief Hardware access layer (HAL) for managing the Programmable Peripheral Interconnect (PPI)
* channels.
*/
-#define NRF_PPI_TASK_SET (1UL)
-
-/**
- * @enum nrf_ppi_channel_t
- * @brief PPI channels.
- */
+/** @brief PPI channels. */
typedef enum
{
NRF_PPI_CHANNEL0 = PPI_CHEN_CH0_Pos, /**< Channel 0. */
@@ -90,10 +85,7 @@
NRF_PPI_CHANNEL31 = PPI_CHEN_CH31_Pos /**< Channel 31. */
} nrf_ppi_channel_t;
-/**
- * @enum nrf_ppi_channel_group_t
- * @brief PPI channel groups.
- */
+/** @brief PPI channel groups. */
typedef enum
{
NRF_PPI_CHANNEL_GROUP0 = 0, /**< Channel group 0. */
@@ -106,58 +98,47 @@
#endif
} nrf_ppi_channel_group_t;
-/**
- * @enum nrf_ppi_channel_include_t
- * @brief Definition of which PPI channels belong to a group.
- */
+/** @brief Definition of whether a PPI channel belongs to a group. */
typedef enum
{
NRF_PPI_CHANNEL_EXCLUDE = PPI_CHG_CH0_Excluded, /**< Channel excluded from a group. */
NRF_PPI_CHANNEL_INCLUDE = PPI_CHG_CH0_Included /**< Channel included in a group. */
} nrf_ppi_channel_include_t;
-/**
- * @enum nrf_ppi_channel_enable_t
- * @brief Definition if a PPI channel is enabled.
- */
+/** @brief Definition of whether a PPI channel is enabled. */
typedef enum
{
NRF_PPI_CHANNEL_DISABLED = PPI_CHEN_CH0_Disabled, /**< Channel disabled. */
NRF_PPI_CHANNEL_ENABLED = PPI_CHEN_CH0_Enabled /**< Channel enabled. */
} nrf_ppi_channel_enable_t;
-/**
- * @enum nrf_ppi_task_t
- * @brief PPI tasks.
- */
+/** @brief PPI tasks. */
typedef enum
{
- /*lint -save -e30 -esym(628,__INTADDR__)*/
- NRF_PPI_TASK_CHG0_EN = offsetof(NRF_PPI_Type, TASKS_CHG[0].EN), /**< Task for enabling channel group 0 */
- NRF_PPI_TASK_CHG0_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[0].DIS), /**< Task for disabling channel group 0 */
- NRF_PPI_TASK_CHG1_EN = offsetof(NRF_PPI_Type, TASKS_CHG[1].EN), /**< Task for enabling channel group 1 */
- NRF_PPI_TASK_CHG1_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[1].DIS), /**< Task for disabling channel group 1 */
- NRF_PPI_TASK_CHG2_EN = offsetof(NRF_PPI_Type, TASKS_CHG[2].EN), /**< Task for enabling channel group 2 */
- NRF_PPI_TASK_CHG2_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[2].DIS), /**< Task for disabling channel group 2 */
- NRF_PPI_TASK_CHG3_EN = offsetof(NRF_PPI_Type, TASKS_CHG[3].EN), /**< Task for enabling channel group 3 */
- NRF_PPI_TASK_CHG3_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[3].DIS), /**< Task for disabling channel group 3 */
+ NRF_PPI_TASK_CHG0_EN = offsetof(NRF_PPI_Type, TASKS_CHG[0].EN), /**< Task for enabling channel group 0. */
+ NRF_PPI_TASK_CHG0_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[0].DIS), /**< Task for disabling channel group 0. */
+ NRF_PPI_TASK_CHG1_EN = offsetof(NRF_PPI_Type, TASKS_CHG[1].EN), /**< Task for enabling channel group 1. */
+ NRF_PPI_TASK_CHG1_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[1].DIS), /**< Task for disabling channel group 1. */
+ NRF_PPI_TASK_CHG2_EN = offsetof(NRF_PPI_Type, TASKS_CHG[2].EN), /**< Task for enabling channel group 2. */
+ NRF_PPI_TASK_CHG2_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[2].DIS), /**< Task for disabling channel group 2. */
+ NRF_PPI_TASK_CHG3_EN = offsetof(NRF_PPI_Type, TASKS_CHG[3].EN), /**< Task for enabling channel group 3. */
+ NRF_PPI_TASK_CHG3_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[3].DIS), /**< Task for disabling channel group 3. */
#if (PPI_GROUP_NUM > 4) || defined(__NRFX_DOXYGEN__)
- NRF_PPI_TASK_CHG4_EN = offsetof(NRF_PPI_Type, TASKS_CHG[4].EN), /**< Task for enabling channel group 4 */
- NRF_PPI_TASK_CHG4_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[4].DIS), /**< Task for disabling channel group 4 */
- NRF_PPI_TASK_CHG5_EN = offsetof(NRF_PPI_Type, TASKS_CHG[5].EN), /**< Task for enabling channel group 5 */
- NRF_PPI_TASK_CHG5_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[5].DIS) /**< Task for disabling channel group 5 */
+ NRF_PPI_TASK_CHG4_EN = offsetof(NRF_PPI_Type, TASKS_CHG[4].EN), /**< Task for enabling channel group 4. */
+ NRF_PPI_TASK_CHG4_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[4].DIS), /**< Task for disabling channel group 4. */
+ NRF_PPI_TASK_CHG5_EN = offsetof(NRF_PPI_Type, TASKS_CHG[5].EN), /**< Task for enabling channel group 5. */
+ NRF_PPI_TASK_CHG5_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[5].DIS) /**< Task for disabling channel group 5. */
#endif
- /*lint -restore*/
} nrf_ppi_task_t;
+
/**
* @brief Function for enabling a given PPI channel.
*
* @details This function enables only one channel.
*
- * @param[in] channel Channel to enable.
- *
- * */
+ * @param[in] channel Channel to be enabled.
+ */
__STATIC_INLINE void nrf_ppi_channel_enable(nrf_ppi_channel_t channel);
/**
@@ -165,7 +146,7 @@
*
* @details This function disables only one channel.
*
- * @param[in] channel Channel to disable.
+ * @param[in] channel Channel to be disabled.
*/
__STATIC_INLINE void nrf_ppi_channel_disable(nrf_ppi_channel_t channel);
@@ -174,17 +155,15 @@
*
* @details This function checks only one channel.
*
- * @param[in] channel Channel to check.
+ * @param[in] channel Channel to be checked.
*
- * @retval NRF_PPI_CHANNEL_ENABLED If the channel is enabled.
- * @retval NRF_PPI_CHANNEL_DISABLED If the channel is not enabled.
+ * @retval NRF_PPI_CHANNEL_ENABLED The channel is enabled.
+ * @retval NRF_PPI_CHANNEL_DISABLED The channel is not enabled.
*
*/
__STATIC_INLINE nrf_ppi_channel_enable_t nrf_ppi_channel_enable_get(nrf_ppi_channel_t channel);
-/**
- * @brief Function for disabling all PPI channels.
- */
+/** @brief Function for disabling all PPI channels. */
__STATIC_INLINE void nrf_ppi_channel_disable_all(void);
/**
@@ -204,10 +183,8 @@
/**
* @brief Function for setting up event and task endpoints for a given PPI channel.
*
- * @param[in] eep Event register address.
- *
- * @param[in] tep Task register address.
- *
+ * @param[in] eep Event register address.
+ * @param[in] tep Task register address.
* @param[in] channel Channel to which the given endpoints are assigned.
*/
__STATIC_INLINE void nrf_ppi_channel_endpoint_setup(nrf_ppi_channel_t channel,
@@ -217,7 +194,7 @@
/**
* @brief Function for setting up the event endpoint for a given PPI channel.
*
- * @param[in] eep Event register address.
+ * @param[in] eep Event register address.
* @param[in] channel Channel to which the given endpoint is assigned.
*/
__STATIC_INLINE void nrf_ppi_event_endpoint_setup(nrf_ppi_channel_t channel,
@@ -226,7 +203,7 @@
/**
* @brief Function for setting up the task endpoint for a given PPI channel.
*
- * @param[in] tep Task register address.
+ * @param[in] tep Task register address.
* @param[in] channel Channel to which the given endpoint is assigned.
*/
__STATIC_INLINE void nrf_ppi_task_endpoint_setup(nrf_ppi_channel_t channel,
@@ -238,8 +215,7 @@
* @brief Function for setting up task endpoint for a given PPI fork.
*
* @param[in] fork_tep Task register address.
- *
- * @param[in] channel Channel to which the given fork endpoint is assigned.
+ * @param[in] channel Channel to which the given fork endpoint is assigned.
*/
__STATIC_INLINE void nrf_ppi_fork_endpoint_setup(nrf_ppi_channel_t channel,
uint32_t fork_tep);
@@ -247,13 +223,10 @@
/**
* @brief Function for setting up event and task endpoints for a given PPI channel and fork.
*
- * @param[in] eep Event register address.
- *
- * @param[in] tep Task register address.
- *
+ * @param[in] eep Event register address.
+ * @param[in] tep Task register address.
* @param[in] fork_tep Fork task register address (register value).
- *
- * @param[in] channel Channel to which the given endpoints are assigned.
+ * @param[in] channel Channel to which the given endpoints are assigned.
*/
__STATIC_INLINE void nrf_ppi_channel_and_fork_endpoint_setup(nrf_ppi_channel_t channel,
uint32_t eep,
@@ -267,9 +240,7 @@
* @details This function adds only one channel to the group.
*
* @param[in] channel Channel to be included in the group.
- *
* @param[in] channel_group Channel group.
- *
*/
__STATIC_INLINE void nrf_ppi_channel_include_in_group(nrf_ppi_channel_t channel,
nrf_ppi_channel_group_t channel_group);
@@ -280,9 +251,7 @@
* @details This function adds all specified channels to the group.
*
* @param[in] channel_mask Channels to be included in the group.
- *
* @param[in] channel_group Channel group.
- *
*/
__STATIC_INLINE void nrf_ppi_channels_include_in_group(uint32_t channel_mask,
nrf_ppi_channel_group_t channel_group);
@@ -293,7 +262,6 @@
* @details This function removes only one channel from the group.
*
* @param[in] channel Channel to be removed from the group.
- *
* @param[in] channel_group Channel group.
*/
__STATIC_INLINE void nrf_ppi_channel_remove_from_group(nrf_ppi_channel_t channel,
@@ -305,7 +273,6 @@
* @details This function removes all specified channels from the group.
*
* @param[in] channel_mask Channels to be removed from the group.
- *
* @param[in] channel_group Channel group.
*/
__STATIC_INLINE void nrf_ppi_channels_remove_from_group(uint32_t channel_mask,
@@ -315,7 +282,6 @@
* @brief Function for removing all PPI channels from a channel group.
*
* @param[in] group Channel group.
- *
*/
__STATIC_INLINE void nrf_ppi_channel_group_clear(nrf_ppi_channel_group_t group);
@@ -323,7 +289,6 @@
* @brief Function for enabling a channel group.
*
* @param[in] group Channel group.
- *
*/
__STATIC_INLINE void nrf_ppi_group_enable(nrf_ppi_channel_group_t group);
@@ -331,38 +296,61 @@
* @brief Function for disabling a channel group.
*
* @param[in] group Channel group.
- *
*/
__STATIC_INLINE void nrf_ppi_group_disable(nrf_ppi_channel_group_t group);
/**
* @brief Function for setting a PPI task.
*
- * @param[in] ppi_task PPI task to set.
+ * @param[in] ppi_task PPI task to be set.
*/
__STATIC_INLINE void nrf_ppi_task_trigger(nrf_ppi_task_t ppi_task);
/**
- * @brief Function for returning the address of a specific PPI task register.
+ * @brief Function for getting the address of the specified PPI task register.
*
* @param[in] ppi_task PPI task.
+ *
+ * @return Address of the requested PPI task register.
*/
__STATIC_INLINE uint32_t * nrf_ppi_task_address_get(nrf_ppi_task_t ppi_task);
/**
- * @brief Function for returning the PPI enable task address of a specific group.
+ * @brief Function for getting the PPI enable task address of the specified group.
*
- * @param[in] group PPI group.
+ * @param[in] group PPI group.
+ *
+ * @return PPI enable task address of the specified group.
*/
__STATIC_INLINE uint32_t * nrf_ppi_task_group_enable_address_get(nrf_ppi_channel_group_t group);
/**
- * @brief Function for returning the PPI disable task address of a specific group.
+ * @brief Function for getting the PPI disable task address of the specified group.
*
- * @param[in] group PPI group.
+ * @param[in] group PPI group.
+ *
+ * @return PPI disable task address of the specified group.
*/
__STATIC_INLINE uint32_t * nrf_ppi_task_group_disable_address_get(nrf_ppi_channel_group_t group);
+/**
+ * @brief Function for getting the ENABLE task associated with the specified channel group.
+ *
+ * @param[in] index Channel group index.
+ *
+ * @return Requested ENABLE task.
+ */
+__STATIC_INLINE nrf_ppi_task_t nrf_ppi_group_enable_task_get(uint8_t index);
+
+/**
+ * @brief Function for getting the DISABLE task associated with the specified channel group.
+ *
+ * @param[in] index Channel group index.
+ *
+ * @return Requested DISABLE task.
+ */
+__STATIC_INLINE nrf_ppi_task_t nrf_ppi_group_disable_task_get(uint8_t index);
+
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
@@ -476,17 +464,17 @@
__STATIC_INLINE void nrf_ppi_group_enable(nrf_ppi_channel_group_t group)
{
- NRF_PPI->TASKS_CHG[(uint32_t) group].EN = NRF_PPI_TASK_SET;
+ NRF_PPI->TASKS_CHG[(uint32_t) group].EN = 1UL;
}
__STATIC_INLINE void nrf_ppi_group_disable(nrf_ppi_channel_group_t group)
{
- NRF_PPI->TASKS_CHG[(uint32_t) group].DIS = NRF_PPI_TASK_SET;
+ NRF_PPI->TASKS_CHG[(uint32_t) group].DIS = 1UL;
}
__STATIC_INLINE void nrf_ppi_task_trigger(nrf_ppi_task_t ppi_task)
{
- *((volatile uint32_t *) ((uint8_t *) NRF_PPI_BASE + (uint32_t) ppi_task)) = NRF_PPI_TASK_SET;
+ *((volatile uint32_t *) ((uint8_t *) NRF_PPI_BASE + (uint32_t) ppi_task)) = 1UL;
}
__STATIC_INLINE uint32_t * nrf_ppi_task_address_get(nrf_ppi_task_t ppi_task)
@@ -504,6 +492,18 @@
return (uint32_t *) &NRF_PPI->TASKS_CHG[(uint32_t) group].DIS;
}
+__STATIC_INLINE nrf_ppi_task_t nrf_ppi_group_enable_task_get(uint8_t index)
+{
+ NRFX_ASSERT(index < NRFX_ARRAY_SIZE(NRF_PPI->TASKS_CHG));
+ return (nrf_ppi_task_t)NRFX_OFFSETOF(NRF_PPI_Type, TASKS_CHG[index].EN);
+}
+
+__STATIC_INLINE nrf_ppi_task_t nrf_ppi_group_disable_task_get(uint8_t index)
+{
+ NRFX_ASSERT(index < NRFX_ARRAY_SIZE(NRF_PPI->TASKS_CHG));
+ return (nrf_ppi_task_t)NRFX_OFFSETOF(NRF_PPI_Type, TASKS_CHG[index].DIS);
+}
+
#endif // SUPPRESS_INLINE_IMPLEMENTATION
/** @} */
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_pwm.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_pwm.h
index a852164..55a74b5 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_pwm.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_pwm.h
@@ -50,46 +50,40 @@
* function call to specify that a given output channel shall not be
* connected to a physical pin.
*/
-#define NRF_PWM_PIN_NOT_CONNECTED 0xFFFFFFFF
+#define NRF_PWM_PIN_NOT_CONNECTED 0xFFFFFFFF
+
+/** @brief Number of channels in each PWM instance. */
+#define NRF_PWM_CHANNEL_COUNT 4
/**
- * @brief Number of channels in each Pointer to the peripheral registers structure.
+ * @brief Helper macro for calculating the number of 16-bit values in the specified
+ * array of duty cycle values.
*/
-#define NRF_PWM_CHANNEL_COUNT 4
+#define NRF_PWM_VALUES_LENGTH(array) (sizeof(array) / sizeof(uint16_t))
-/**
- * @brief PWM tasks.
- */
+/** @brief PWM tasks. */
typedef enum
{
- /*lint -save -e30*/
NRF_PWM_TASK_STOP = offsetof(NRF_PWM_Type, TASKS_STOP), ///< Stops PWM pulse generation on all channels at the end of the current PWM period, and stops the sequence playback.
NRF_PWM_TASK_SEQSTART0 = offsetof(NRF_PWM_Type, TASKS_SEQSTART[0]), ///< Starts playback of sequence 0.
NRF_PWM_TASK_SEQSTART1 = offsetof(NRF_PWM_Type, TASKS_SEQSTART[1]), ///< Starts playback of sequence 1.
NRF_PWM_TASK_NEXTSTEP = offsetof(NRF_PWM_Type, TASKS_NEXTSTEP) ///< Steps by one value in the current sequence if the decoder is set to @ref NRF_PWM_STEP_TRIGGERED mode.
- /*lint -restore*/
} nrf_pwm_task_t;
-/**
- * @brief PWM events.
- */
+/** @brief PWM events. */
typedef enum
{
- /*lint -save -e30*/
NRF_PWM_EVENT_STOPPED = offsetof(NRF_PWM_Type, EVENTS_STOPPED), ///< Response to STOP task, emitted when PWM pulses are no longer generated.
NRF_PWM_EVENT_SEQSTARTED0 = offsetof(NRF_PWM_Type, EVENTS_SEQSTARTED[0]), ///< First PWM period started on sequence 0.
NRF_PWM_EVENT_SEQSTARTED1 = offsetof(NRF_PWM_Type, EVENTS_SEQSTARTED[1]), ///< First PWM period started on sequence 1.
NRF_PWM_EVENT_SEQEND0 = offsetof(NRF_PWM_Type, EVENTS_SEQEND[0]), ///< Emitted at the end of every sequence 0 when its last value has been read from RAM.
NRF_PWM_EVENT_SEQEND1 = offsetof(NRF_PWM_Type, EVENTS_SEQEND[1]), ///< Emitted at the end of every sequence 1 when its last value has been read from RAM.
NRF_PWM_EVENT_PWMPERIODEND = offsetof(NRF_PWM_Type, EVENTS_PWMPERIODEND), ///< Emitted at the end of each PWM period.
- NRF_PWM_EVENT_LOOPSDONE = offsetof(NRF_PWM_Type, EVENTS_LOOPSDONE) ///< Concatenated sequences have been played the requested number of times.
- /*lint -restore*/
+ NRF_PWM_EVENT_LOOPSDONE = offsetof(NRF_PWM_Type, EVENTS_LOOPSDONE) ///< Concatenated sequences have been played the specified number of times.
} nrf_pwm_event_t;
-/**
- * @brief PWM interrupts.
- */
+/** @brief PWM interrupts. */
typedef enum
{
NRF_PWM_INT_STOPPED_MASK = PWM_INTENSET_STOPPED_Msk, ///< Interrupt on STOPPED event.
@@ -101,9 +95,7 @@
NRF_PWM_INT_LOOPSDONE_MASK = PWM_INTENSET_LOOPSDONE_Msk ///< Interrupt on LOOPSDONE event.
} nrf_pwm_int_mask_t;
-/**
- * @brief PWM shortcuts.
- */
+/** @brief PWM shortcuts. */
typedef enum
{
NRF_PWM_SHORT_SEQEND0_STOP_MASK = PWM_SHORTS_SEQEND0_STOP_Msk, ///< Shortcut between SEQEND[0] event and STOP task.
@@ -113,18 +105,14 @@
NRF_PWM_SHORT_LOOPSDONE_STOP_MASK = PWM_SHORTS_LOOPSDONE_STOP_Msk ///< Shortcut between LOOPSDONE event and STOP task.
} nrf_pwm_short_mask_t;
-/**
- * @brief PWM modes of operation.
- */
+/** @brief PWM modes of operation. */
typedef enum
{
NRF_PWM_MODE_UP = PWM_MODE_UPDOWN_Up, ///< Up counter (edge-aligned PWM duty cycle).
NRF_PWM_MODE_UP_AND_DOWN = PWM_MODE_UPDOWN_UpAndDown, ///< Up and down counter (center-aligned PWM duty cycle).
} nrf_pwm_mode_t;
-/**
- * @brief PWM base clock frequencies.
- */
+/** @brief PWM base clock frequencies. */
typedef enum
{
NRF_PWM_CLK_16MHz = PWM_PRESCALER_PRESCALER_DIV_1, ///< 16 MHz / 1 = 16 MHz.
@@ -163,7 +151,6 @@
NRF_PWM_STEP_TRIGGERED = PWM_DECODER_MODE_NextStep ///< When the @ref NRF_PWM_TASK_NEXTSTEP task is triggered.
} nrf_pwm_dec_step_t;
-
/**
* @brief Type used for defining duty cycle values for a sequence
* loaded in @ref NRF_PWM_LOAD_COMMON mode.
@@ -219,11 +206,11 @@
*
* When the sequence is set (by a call to @ref nrf_pwm_sequence_set), the
* provided duty cycle values are not copied. The @p values pointer is stored
- * in the peripheral's internal register, and the values are loaded from RAM
+ * in the internal register of the peripheral, and the values are loaded from RAM
* during the sequence playback. Therefore, you must ensure that the values
* do not change before and during the sequence playback (for example,
* the values cannot be placed in a local variable that is allocated on stack).
- * If the sequence is played in a loop and the values should be updated
+ * If the sequence is played in a loop and the values are to be updated
* before the next iteration, it is safe to modify them when the corresponding
* event signaling the end of sequence occurs (@ref NRF_PWM_EVENT_SEQEND0
* or @ref NRF_PWM_EVENT_SEQEND1, respectively).
@@ -246,134 +233,128 @@
* others (14-0) compose the 15-bit value to be
* compared with the pulse generator counter. */
uint16_t length; ///< Number of 16-bit values in the array pointed by @p values.
- uint32_t repeats; ///< Number of times that each duty cycle should be repeated (after being played once). Ignored in @ref NRF_PWM_STEP_TRIGGERED mode.
+ uint32_t repeats; ///< Number of times that each duty cycle is to be repeated (after being played once). Ignored in @ref NRF_PWM_STEP_TRIGGERED mode.
uint32_t end_delay; ///< Additional time (in PWM periods) that the last duty cycle is to be kept after the sequence is played. Ignored in @ref NRF_PWM_STEP_TRIGGERED mode.
} nrf_pwm_sequence_t;
-/**
- * @brief Helper macro for calculating the number of 16-bit values in specified
- * array of duty cycle values.
- */
-#define NRF_PWM_VALUES_LENGTH(array) (sizeof(array) / sizeof(uint16_t))
-
/**
- * @brief Function for activating a specific PWM task.
+ * @brief Function for activating the specified PWM task.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] task Task to activate.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_pwm_task_trigger(NRF_PWM_Type * p_reg,
nrf_pwm_task_t task);
/**
- * @brief Function for getting the address of a specific PWM task register.
+ * @brief Function for getting the address of the specified PWM task register.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] task Requested task.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] task PWM task.
*
* @return Address of the specified task register.
*/
__STATIC_INLINE uint32_t nrf_pwm_task_address_get(NRF_PWM_Type const * p_reg,
- nrf_pwm_task_t task);
+ nrf_pwm_task_t task);
/**
- * @brief Function for clearing a specific PWM event.
+ * @brief Function for clearing the specified PWM event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to clear.
*/
-__STATIC_INLINE void nrf_pwm_event_clear(NRF_PWM_Type * p_reg,
+__STATIC_INLINE void nrf_pwm_event_clear(NRF_PWM_Type * p_reg,
nrf_pwm_event_t event);
/**
- * @brief Function for checking the state of a specific PWM event.
+ * @brief Function for retrieving the state of the PWM event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] event Event to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to be checked.
*
- * @retval true If the event is set.
- * @retval false If the event is not set.
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_pwm_event_check(NRF_PWM_Type const * p_reg,
- nrf_pwm_event_t event);
+ nrf_pwm_event_t event);
/**
- * @brief Function for getting the address of a specific PWM event register.
+ * @brief Function for getting the address of the specified PWM event register.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] event Requested event.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event PWM event.
*
* @return Address of the specified event register.
*/
__STATIC_INLINE uint32_t nrf_pwm_event_address_get(NRF_PWM_Type const * p_reg,
- nrf_pwm_event_t event);
+ nrf_pwm_event_t event);
/**
- * @brief Function for enabling specified shortcuts.
+ * @brief Function for enabling the specified shortcuts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] pwm_shorts_mask Shortcuts to enable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of shortcuts to be enabled.
*/
__STATIC_INLINE void nrf_pwm_shorts_enable(NRF_PWM_Type * p_reg,
- uint32_t pwm_shorts_mask);
+ uint32_t mask);
/**
- * @brief Function for disabling specified shortcuts.
+ * @brief Function for disabling the specified shortcuts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] pwm_shorts_mask Shortcuts to disable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of shortcuts to be disabled.
*/
__STATIC_INLINE void nrf_pwm_shorts_disable(NRF_PWM_Type * p_reg,
- uint32_t pwm_shorts_mask);
+ uint32_t mask);
/**
* @brief Function for setting the configuration of PWM shortcuts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] pwm_shorts_mask Shortcuts configuration to set.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Shortcuts configuration to be set.
*/
__STATIC_INLINE void nrf_pwm_shorts_set(NRF_PWM_Type * p_reg,
- uint32_t pwm_shorts_mask);
+ uint32_t mask);
/**
* @brief Function for enabling specified interrupts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] pwm_int_mask Interrupts to enable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_pwm_int_enable(NRF_PWM_Type * p_reg,
- uint32_t pwm_int_mask);
+ uint32_t mask);
/**
* @brief Function for disabling specified interrupts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] pwm_int_mask Interrupts to disable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_pwm_int_disable(NRF_PWM_Type * p_reg,
- uint32_t pwm_int_mask);
+ uint32_t mask);
/**
* @brief Function for setting the configuration of PWM interrupts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] pwm_int_mask Interrupts configuration to set.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of interrupts to be set.
*/
__STATIC_INLINE void nrf_pwm_int_set(NRF_PWM_Type * p_reg,
- uint32_t pwm_int_mask);
+ uint32_t mask);
/**
* @brief Function for retrieving the state of a given interrupt.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] pwm_int Interrupt to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] pwm_int Interrupt to be checked.
*
- * @retval true If the interrupt is enabled.
- * @retval false If the interrupt is not enabled.
+ * @retval true The interrupt is enabled.
+ * @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_pwm_int_enable_check(NRF_PWM_Type const * p_reg,
- nrf_pwm_int_mask_t pwm_int);
+ nrf_pwm_int_mask_t pwm_int);
#if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
@@ -424,14 +405,14 @@
/**
* @brief Function for enabling the PWM peripheral.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_pwm_enable(NRF_PWM_Type * p_reg);
/**
* @brief Function for disabling the PWM peripheral.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_pwm_disable(NRF_PWM_Type * p_reg);
@@ -442,16 +423,16 @@
* needed, pass the @ref NRF_PWM_PIN_NOT_CONNECTED value instead of its pin
* number.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] out_pins Array with pin numbers for individual PWM output channels.
*/
__STATIC_INLINE void nrf_pwm_pins_set(NRF_PWM_Type * p_reg,
- uint32_t out_pins[NRF_PWM_CHANNEL_COUNT]);
+ uint32_t out_pins[NRF_PWM_CHANNEL_COUNT]);
/**
* @brief Function for configuring the PWM peripheral.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] base_clock Base clock frequency.
* @param[in] mode Operating mode of the pulse generator counter.
* @param[in] top_value Value up to which the pulse generator counter counts.
@@ -464,11 +445,11 @@
/**
* @brief Function for defining a sequence of PWM duty cycles.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] seq_id Identifier of the sequence (0 or 1).
* @param[in] p_seq Pointer to the sequence definition.
*/
-__STATIC_INLINE void nrf_pwm_sequence_set(NRF_PWM_Type * p_reg,
+__STATIC_INLINE void nrf_pwm_sequence_set(NRF_PWM_Type * p_reg,
uint8_t seq_id,
nrf_pwm_sequence_t const * p_seq);
@@ -476,11 +457,11 @@
* @brief Function for modifying the pointer to the duty cycle values
* in the specified sequence.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] seq_id Identifier of the sequence (0 or 1).
* @param[in] p_values Pointer to an array with duty cycle values.
*/
-__STATIC_INLINE void nrf_pwm_seq_ptr_set(NRF_PWM_Type * p_reg,
+__STATIC_INLINE void nrf_pwm_seq_ptr_set(NRF_PWM_Type * p_reg,
uint8_t seq_id,
uint16_t const * p_values);
@@ -488,47 +469,47 @@
* @brief Function for modifying the total number of duty cycle values
* in the specified sequence.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] seq_id Identifier of the sequence (0 or 1).
* @param[in] length Number of duty cycle values.
*/
__STATIC_INLINE void nrf_pwm_seq_cnt_set(NRF_PWM_Type * p_reg,
- uint8_t seq_id,
- uint16_t length);
+ uint8_t seq_id,
+ uint16_t length);
/**
* @brief Function for modifying the additional number of PWM periods spent
* on each duty cycle value in the specified sequence.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] seq_id Identifier of the sequence (0 or 1).
* @param[in] refresh Number of additional PWM periods for each duty cycle value.
*/
__STATIC_INLINE void nrf_pwm_seq_refresh_set(NRF_PWM_Type * p_reg,
- uint8_t seq_id,
- uint32_t refresh);
+ uint8_t seq_id,
+ uint32_t refresh);
/**
* @brief Function for modifying the additional time added after the sequence
* is played.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] seq_id Identifier of the sequence (0 or 1).
* @param[in] end_delay Number of PWM periods added at the end of the sequence.
*/
__STATIC_INLINE void nrf_pwm_seq_end_delay_set(NRF_PWM_Type * p_reg,
- uint8_t seq_id,
- uint32_t end_delay);
+ uint8_t seq_id,
+ uint32_t end_delay);
/**
* @brief Function for setting the mode of loading sequence data from RAM
* and advancing the sequence.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] dec_load Mode of loading sequence data from RAM.
* @param[in] dec_step Mode of advancing the active sequence.
*/
-__STATIC_INLINE void nrf_pwm_decoder_set(NRF_PWM_Type * p_reg,
+__STATIC_INLINE void nrf_pwm_decoder_set(NRF_PWM_Type * p_reg,
nrf_pwm_dec_load_t dec_load,
nrf_pwm_dec_step_t dec_step);
@@ -539,11 +520,11 @@
* This function applies to two-sequence playback (concatenated sequence 0 and 1).
* A single sequence can be played back only once.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] loop_count Number of times to perform the sequence playback.
*/
__STATIC_INLINE void nrf_pwm_loop_set(NRF_PWM_Type * p_reg,
- uint16_t loop_count);
+ uint16_t loop_count);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
@@ -583,39 +564,39 @@
}
__STATIC_INLINE void nrf_pwm_shorts_enable(NRF_PWM_Type * p_reg,
- uint32_t pwm_shorts_mask)
+ uint32_t mask)
{
- p_reg->SHORTS |= pwm_shorts_mask;
+ p_reg->SHORTS |= mask;
}
__STATIC_INLINE void nrf_pwm_shorts_disable(NRF_PWM_Type * p_reg,
- uint32_t pwm_shorts_mask)
+ uint32_t mask)
{
- p_reg->SHORTS &= ~(pwm_shorts_mask);
+ p_reg->SHORTS &= ~(mask);
}
__STATIC_INLINE void nrf_pwm_shorts_set(NRF_PWM_Type * p_reg,
- uint32_t pwm_shorts_mask)
+ uint32_t mask)
{
- p_reg->SHORTS = pwm_shorts_mask;
+ p_reg->SHORTS = mask;
}
__STATIC_INLINE void nrf_pwm_int_enable(NRF_PWM_Type * p_reg,
- uint32_t pwm_int_mask)
+ uint32_t mask)
{
- p_reg->INTENSET = pwm_int_mask;
+ p_reg->INTENSET = mask;
}
__STATIC_INLINE void nrf_pwm_int_disable(NRF_PWM_Type * p_reg,
- uint32_t pwm_int_mask)
+ uint32_t mask)
{
- p_reg->INTENCLR = pwm_int_mask;
+ p_reg->INTENCLR = mask;
}
__STATIC_INLINE void nrf_pwm_int_set(NRF_PWM_Type * p_reg,
- uint32_t pwm_int_mask)
+ uint32_t mask)
{
- p_reg->INTEN = pwm_int_mask;
+ p_reg->INTEN = mask;
}
__STATIC_INLINE bool nrf_pwm_int_enable_check(NRF_PWM_Type const * p_reg,
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_qdec.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_qdec.h
index bd95f18..ee8f5f1 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_qdec.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_qdec.h
@@ -51,42 +51,30 @@
*/
#define NRF_QDEC_LED_NOT_CONNECTED 0xFFFFFFFF
-/**
- * @enum nrf_qdec_task_t
- * @brief QDEC tasks.
- */
-typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
+/** @brief QDEC tasks. */
+typedef enum
{
NRF_QDEC_TASK_START = offsetof(NRF_QDEC_Type, TASKS_START), /**< Starting the quadrature decoder. */
NRF_QDEC_TASK_STOP = offsetof(NRF_QDEC_Type, TASKS_STOP), /**< Stopping the quadrature decoder. */
NRF_QDEC_TASK_READCLRACC = offsetof(NRF_QDEC_Type, TASKS_READCLRACC) /**< Reading and clearing ACC and ACCDBL registers. */
} nrf_qdec_task_t;
-/**
- * @enum nrf_qdec_event_t
- * @brief QDEC events.
- */
+/** @brief QDEC events. */
typedef enum
{
NRF_QDEC_EVENT_SAMPLERDY = offsetof(NRF_QDEC_Type, EVENTS_SAMPLERDY), /**< Event generated for every new sample. */
NRF_QDEC_EVENT_REPORTRDY = offsetof(NRF_QDEC_Type, EVENTS_REPORTRDY), /**< Event generated for every new report. */
NRF_QDEC_EVENT_ACCOF = offsetof(NRF_QDEC_Type, EVENTS_ACCOF) /**< Event generated for every accumulator overflow. */
-} nrf_qdec_event_t; /*lint -restore */
+} nrf_qdec_event_t;
-/**
- * @enum nrf_qdec_short_mask_t
- * @brief QDEC shortcuts.
- */
+/** @brief QDEC shortcuts. */
typedef enum
{
NRF_QDEC_SHORT_REPORTRDY_READCLRACC_MASK = QDEC_SHORTS_REPORTRDY_READCLRACC_Msk, /**< Shortcut between REPORTRDY event and READCLRACC task. */
NRF_QDEC_SHORT_SAMPLERDY_STOP_MASK = QDEC_SHORTS_SAMPLERDY_STOP_Msk /**< Shortcut between SAMPLERDY event and STOP task. */
} nrf_qdec_short_mask_t;
-/**
- * @enum nrf_qdec_int_mask_t
- * @brief QDEC interrupts.
- */
+/** @brief QDEC interrupts. */
typedef enum
{
NRF_QDEC_INT_SAMPLERDY_MASK = QDEC_INTENSET_SAMPLERDY_Msk, /**< Mask for enabling or disabling an interrupt on SAMPLERDY event. */
@@ -94,42 +82,28 @@
NRF_QDEC_INT_ACCOF_MASK = QDEC_INTENSET_ACCOF_Msk /**< Mask for enabling or disabling an interrupt on ACCOF event. */
} nrf_qdec_int_mask_t;
-/**
- * @enum nrf_qdec_enable_t
- * @brief States of the enable bit.
- */
+/** @brief States of the enable bit. */
typedef enum
{
NRF_QDEC_DISABLE = QDEC_ENABLE_ENABLE_Disabled, /**< Mask for disabling the QDEC periperal. When disabled, the QDEC decoder pins are not active. */
NRF_QDEC_ENABLE = QDEC_ENABLE_ENABLE_Enabled /**< Mask for enabling the QDEC periperal. When enabled, the QDEC pins are active. */
} nrf_qdec_enable_t;
-
-/**
- * @enum nrf_qdec_dbfen_t
- * @brief States of the debounce filter enable bit.
- */
+/** @brief States of the debounce filter enable bit. */
typedef enum
{
NRF_QDEC_DBFEN_DISABLE = QDEC_DBFEN_DBFEN_Disabled, /**< Mask for disabling the debounce filter. */
NRF_QDEC_DBFEN_ENABLE = QDEC_DBFEN_DBFEN_Enabled /**< Mask for enabling the debounce filter. */
} nrf_qdec_dbfen_t;
-/**
- * @enum nrf_qdec_ledpol_t
- * @brief Active LED polarity.
- */
+/** @brief Active LED polarity. */
typedef enum
{
NRF_QDEC_LEPOL_ACTIVE_LOW = QDEC_LEDPOL_LEDPOL_ActiveLow, /**< QDEC LED active on output pin low. */
NRF_QDEC_LEPOL_ACTIVE_HIGH = QDEC_LEDPOL_LEDPOL_ActiveHigh /**< QDEC LED active on output pin high. */
} nrf_qdec_ledpol_t;
-
-/**
- * @enum nrf_qdec_sampleper_t
- * @brief Available sampling periods.
- */
+/** @brief Available sampling periods. */
typedef enum
{
NRF_QDEC_SAMPLEPER_128us = QDEC_SAMPLEPER_SAMPLEPER_128us, /**< QDEC sampling period 128 microseconds. */
@@ -142,10 +116,7 @@
NRF_QDEC_SAMPLEPER_16384us = QDEC_SAMPLEPER_SAMPLEPER_16384us /**< QDEC sampling period 16384 microseconds. */
} nrf_qdec_sampleper_t;
-/**
- * @enum nrf_qdec_reportper_t
- * @brief Available report periods.
- */
+/** @brief Available report periods. */
typedef enum
{
NRF_QDEC_REPORTPER_10 = QDEC_REPORTPER_REPORTPER_10Smpl, /**< QDEC report period 10 samples. */
@@ -159,59 +130,59 @@
NRF_QDEC_REPORTPER_DISABLED /**< QDEC reporting disabled. */
} nrf_qdec_reportper_t;
-/**
- * @brief Function for enabling QDEC.
- */
+/** @brief Function for enabling QDEC. */
__STATIC_INLINE void nrf_qdec_enable(void);
-/**
- * @brief Function for disabling QDEC.
- */
+/** @brief Function for disabling QDEC. */
__STATIC_INLINE void nrf_qdec_disable(void);
/**
* @brief Function for returning the enable state of QDEC.
+ *
* @return State of the register.
*/
__STATIC_INLINE uint32_t nrf_qdec_enable_get(void);
/**
* @brief Function for enabling QDEC interrupts by mask.
- * @param[in] qdec_int_mask Sources of the interrupts to enable.
+ *
+ * @param[in] mask Mask of interrupts to be enabled.
*/
-__STATIC_INLINE void nrf_qdec_int_enable(uint32_t qdec_int_mask);
+__STATIC_INLINE void nrf_qdec_int_enable(uint32_t mask);
/**
* @brief Function for disabling QDEC interrupts by mask.
- * @param[in] qdec_int_mask Sources of the interrupts to disable.
*
+ * @param[in] mask Mask of interrupts to be disabled.
*/
-__STATIC_INLINE void nrf_qdec_int_disable(uint32_t qdec_int_mask);
+__STATIC_INLINE void nrf_qdec_int_disable(uint32_t mask);
/**
* @brief Function for getting the enabled interrupts of the QDEC.
+ *
+ * @param[in] mask Mask of interrupts to be checked.
+ *
+ * @return Bitfield with enabled interrupts.
*/
-__STATIC_INLINE uint32_t nrf_qdec_int_enable_check(nrf_qdec_int_mask_t qdec_int_mask);
+__STATIC_INLINE uint32_t nrf_qdec_int_enable_check(nrf_qdec_int_mask_t mask);
-/**
- * @brief Function for enabling the debouncing filter of the QED.
- */
+/** @brief Function for enabling the QDEC debouncing filter. */
__STATIC_INLINE void nrf_qdec_dbfen_enable(void);
-/**
- * @brief Function for disabling the debouncing filter of the QED.
- */
+/** @brief Function for disabling the QDEC debouncing filter. */
__STATIC_INLINE void nrf_qdec_dbfen_disable(void);
/**
- * @brief Function for getting the state of the QDEC's debouncing filter.
- * @retval NRF_QDEC_DBFEN_DISABLE If the debouncing filter is disabled.
- * @retval NRF_QDEC_DBFEN_ENABLE If the debouncing filter is enabled.
+ * @brief Function for getting the state of the QDEC debouncing filter.
+ *
+ * @retval NRF_QDEC_DBFEN_DISABLE The debouncing filter is disabled.
+ * @retval NRF_QDEC_DBFEN_ENABLE The debouncing filter is enabled.
*/
__STATIC_INLINE uint32_t nrf_qdec_dbfen_get(void);
/**
* @brief Function for assigning QDEC pins.
+ *
* @param[in] psela Pin number.
* @param[in] pselb Pin number.
* @param[in] pselled Pin number.
@@ -219,139 +190,174 @@
__STATIC_INLINE void nrf_qdec_pio_assign( uint32_t psela, uint32_t pselb, uint32_t pselled);
/**
- * @brief Function for setting a specific QDEC task.
- * @param[in] qdec_task QDEC task to be set.
+ * @brief Function for setting the specified QDEC task.
+ *
+ * @param[in] task QDEC task to be triggered.
*/
-__STATIC_INLINE void nrf_qdec_task_trigger(nrf_qdec_task_t qdec_task);
+__STATIC_INLINE void nrf_qdec_task_trigger(nrf_qdec_task_t task);
/**
* @brief Function for retrieving the address of a QDEC task register.
- * @param[in] qdec_task QDEC task.
+ *
+ * @param[in] task QDEC task to get its address.
+ *
+ * @return Address of the specified QDEC task.
*/
-__STATIC_INLINE uint32_t * nrf_qdec_task_address_get(nrf_qdec_task_t qdec_task);
+__STATIC_INLINE uint32_t * nrf_qdec_task_address_get(nrf_qdec_task_t task);
/**
- * @brief Function for clearing a specific QDEC event.
- * @param[in] qdec_event QDEC event to clear.
+ * @brief Function for clearing the specified QDEC event.
+ *
+ * @param[in] event QDEC event to be cleared.
*/
-__STATIC_INLINE void nrf_qdec_event_clear(nrf_qdec_event_t qdec_event);
+__STATIC_INLINE void nrf_qdec_event_clear(nrf_qdec_event_t event);
/**
- * @brief Function for retrieving the state of a specific QDEC event.
- * @return State of the QDEC event.
+ * @brief Function for getting the state of the specified QDEC event.
+ *
+ * @param[in] event QDEC event to be checked.
+ *
+ * @return State of the specified QDEC event.
*/
-__STATIC_INLINE uint32_t nrf_qdec_event_check(nrf_qdec_event_t qdec_event);
+__STATIC_INLINE uint32_t nrf_qdec_event_check(nrf_qdec_event_t event);
/**
- * @brief Function for retrieving the address of a specific QDEC event register.
- * @param[in] qdec_event QDEC event.
+ * @brief Function for retrieving the address of the specified QDEC event register.
+ *
+ * @param[in] event QDEC event to get its address.
+ *
* @return Address of the specified QDEC event.
*/
-__STATIC_INLINE uint32_t * nrf_qdec_event_address_get(nrf_qdec_event_t qdec_event);
+__STATIC_INLINE uint32_t * nrf_qdec_event_address_get(nrf_qdec_event_t event);
/**
- * @brief Function for setting QDEC shortcuts.
- * @param[in] qdec_short_mask QDEC shortcut by mask.
+ * @brief Function for setting QDEC shortcuts.
+ *
+ * @param[in] mask Mask of QDEC shortcuts to be set.
*/
-__STATIC_INLINE void nrf_qdec_shorts_enable(uint32_t qdec_short_mask);
+__STATIC_INLINE void nrf_qdec_shorts_enable(uint32_t mask);
/**
* @brief Function for clearing shortcuts of the QDEC by mask.
- * @param[in] qdec_short_mask QDEC shortcute to be cleared.
+ *
+ * @param[in] mask Mask of QDEC shortcuts to be cleared.
*/
-__STATIC_INLINE void nrf_qdec_shorts_disable(uint32_t qdec_short_mask);
+__STATIC_INLINE void nrf_qdec_shorts_disable(uint32_t mask);
/**
- * @brief Function for retrieving the value of QDEC's SAMPLEPER register.
- * @return Value of the SAMPLEPER register.
+ * @brief Function for retrieving value of the sampling period.
+ *
+ * @return Sample period @ref nrf_qdec_sampleper_t.
*/
__STATIC_INLINE int32_t nrf_qdec_sampleper_reg_get(void);
/**
- * @brief Function for converting the value of QDEC's SAMPLE PERIOD to microseconds.
- * @retval sampling period in microseconds.
+ * @brief Function for converting return value of the @p nrf_qdec_sampleper_reg_get() function
+ * to microseconds.
+ *
+ * @param[in] sampleper The sampling period.
+ *
+ * @return Period in microseconds.
*/
__STATIC_INLINE uint32_t nrf_qdec_sampleper_to_value(uint32_t sampleper);
/**
- * @brief Function for setting the value of QDEC's SAMPLEPER register.
- * @param[in] sample_per Sampling period.
+ * @brief Function for setting value of the QDEC sampling period.
+ *
+ * @param[in] sample_per The sampling period.
*/
__STATIC_INLINE void nrf_qdec_sampleper_set(nrf_qdec_sampleper_t sample_per);
/**
- * @brief Function for retrieving the value of QDEC's SAMPLE register.
+ * @brief Function for retrieving value of the QDEC SAMPLE register.
+ *
* @return Value of the SAMPLE register.
*/
__STATIC_INLINE int32_t nrf_qdec_sample_get(void);
/**
- * @brief Function for retrieving the value of QDEC's ACC register.
+ * @brief Function for retrieving value of the QDEC ACC register.
+ *
* @return Value of the ACC register.
*/
__STATIC_INLINE int32_t nrf_qdec_acc_get(void);
/**
- * @brief Function for retrieving the value of QDEC's ACCREAD register.
+ * @brief Function for retrieving value of the QDEC ACCREAD register.
+ *
* @return Value of the ACCREAD register.
*/
__STATIC_INLINE int32_t nrf_qdec_accread_get(void);
/**
- * @brief Function for retrieving the value of QDEC's ACCDBL register.
+ * @brief Function for retrieving value of the QDEC ACCDBL register.
+ *
* @return Value of the ACCDBL register.
*/
__STATIC_INLINE uint32_t nrf_qdec_accdbl_get(void);
/**
- * @brief Function for retrieving the value of QDEC's ACCDBLREAD register.
+ * @brief Function for retrieving value of the QDEC ACCDBLREAD register.
+ *
* @return Value of the ACCDBLREAD register.
*/
__STATIC_INLINE uint32_t nrf_qdec_accdblread_get(void);
/**
- * @brief Function for setting how long the LED is switched on before sampling.
- * @param[in] time_us Time (in microseconds) how long the LED is switched on before sampling.
+ * @brief Function for setting delay time between setting LED active state and start sampling.
+ *
+ * @param[in] time_us Delay time (in microseconds) between setting LED active state
+ * and start sampling.
*/
__STATIC_INLINE void nrf_qdec_ledpre_set(uint32_t time_us);
/**
* @brief Function for retrieving how long the LED is switched on before sampling.
- * @retval time_us Time (in microseconds) how long the LED is switched on before sampling.
+ *
+ * @return The gap in time in microseconds between switched LED to active state and start sampling.
*/
__STATIC_INLINE uint32_t nrf_qdec_ledpre_get(void);
/**
* @brief Function for setting the report period (in samples).
- * @param[in] reportper Number of samples.
+ *
+ * @param[in] reportper The number of samples.
*/
__STATIC_INLINE void nrf_qdec_reportper_set(nrf_qdec_reportper_t reportper);
/**
* @brief Function for retrieving the report period.
- * @retval reportper Number of samples as encoded in the register.
+ *
+ * @return The report period.
*/
__STATIC_INLINE uint32_t nrf_qdec_reportper_reg_get(void);
/**
- * @brief Function for retrieving the value of QDEC's SAMPLEPER register.
- * @param [in] reportper Reportper to be converted to amount of samples per report.
+ * @brief Function for retrieving the value of QDEC SAMPLEPER register.
+ *
+ * @param [in] reportper Reportper to be converted to amount of samples per report.
+ *
+ * @return Number of samples per report.
*/
__STATIC_INLINE uint32_t nrf_qdec_reportper_to_value(uint32_t reportper);
/**
* @brief Function for setting the active level for the LED.
- * @param[in] pol Active level for the LED.
+ *
+ * @param[in] pol Level of the active signal of the LED.
*/
__STATIC_INLINE void nrf_qdec_ledpol_set(nrf_qdec_ledpol_t pol);
/**
* @brief Function for retrieving the active level for the LED.
- * @return Active level for the LED.
+ *
+ * @return Level of the active signal of the LED.
*/
__STATIC_INLINE uint32_t nrf_qdec_ledpol_get(void);
+
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+
__STATIC_INLINE void nrf_qdec_enable(void)
{
NRF_QDEC->ENABLE = NRF_QDEC_ENABLE;
@@ -367,19 +373,19 @@
return NRF_QDEC->ENABLE;
}
-__STATIC_INLINE void nrf_qdec_int_enable(uint32_t qdec_int_mask)
+__STATIC_INLINE void nrf_qdec_int_enable(uint32_t mask)
{
- NRF_QDEC->INTENSET = qdec_int_mask; // writing 0 has no effect
+ NRF_QDEC->INTENSET = mask; // writing 0 has no effect
}
-__STATIC_INLINE void nrf_qdec_int_disable(uint32_t qdec_int_mask)
+__STATIC_INLINE void nrf_qdec_int_disable(uint32_t mask)
{
- NRF_QDEC->INTENCLR = qdec_int_mask; // writing 0 has no effect
+ NRF_QDEC->INTENCLR = mask; // writing 0 has no effect
}
-__STATIC_INLINE uint32_t nrf_qdec_int_enable_check(nrf_qdec_int_mask_t qdec_int_mask)
+__STATIC_INLINE uint32_t nrf_qdec_int_enable_check(nrf_qdec_int_mask_t mask)
{
- return NRF_QDEC->INTENSET & qdec_int_mask; // when read this register will return the value of INTEN.
+ return NRF_QDEC->INTENSET & mask; // when read this register will return the value of INTEN.
}
__STATIC_INLINE void nrf_qdec_dbfen_enable(void)
@@ -418,43 +424,43 @@
#endif
}
-__STATIC_INLINE void nrf_qdec_task_trigger(nrf_qdec_task_t qdec_task)
+__STATIC_INLINE void nrf_qdec_task_trigger(nrf_qdec_task_t task)
{
- *( (volatile uint32_t *)( (uint8_t *)NRF_QDEC + qdec_task) ) = 1;
+ *( (volatile uint32_t *)( (uint8_t *)NRF_QDEC + (uint32_t)task) ) = 1;
}
-__STATIC_INLINE uint32_t * nrf_qdec_task_address_get(nrf_qdec_task_t qdec_task)
+__STATIC_INLINE uint32_t * nrf_qdec_task_address_get(nrf_qdec_task_t task)
{
- return (uint32_t *)( (uint8_t *)NRF_QDEC + qdec_task);
+ return (uint32_t *)( (uint8_t *)NRF_QDEC + (uint32_t)task);
}
-__STATIC_INLINE void nrf_qdec_event_clear(nrf_qdec_event_t qdec_event)
+__STATIC_INLINE void nrf_qdec_event_clear(nrf_qdec_event_t event)
{
- *( (volatile uint32_t *)( (uint8_t *)NRF_QDEC + qdec_event) ) = 0;
+ *( (volatile uint32_t *)( (uint8_t *)NRF_QDEC + (uint32_t)event) ) = 0;
#if __CORTEX_M == 0x04
- volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_QDEC + qdec_event));
+ volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_QDEC + event));
(void)dummy;
#endif
}
-__STATIC_INLINE uint32_t nrf_qdec_event_check(nrf_qdec_event_t qdec_event)
+__STATIC_INLINE uint32_t nrf_qdec_event_check(nrf_qdec_event_t event)
{
- return *(volatile uint32_t *)( (uint8_t *)NRF_QDEC + qdec_event);
+ return *(volatile uint32_t *)( (uint8_t *)NRF_QDEC + (uint32_t)event);
}
-__STATIC_INLINE uint32_t * nrf_qdec_event_address_get(nrf_qdec_event_t qdec_event)
+__STATIC_INLINE uint32_t * nrf_qdec_event_address_get(nrf_qdec_event_t event)
{
- return (uint32_t *)( (uint8_t *)NRF_QDEC + qdec_event);
+ return (uint32_t *)( (uint8_t *)NRF_QDEC + (uint32_t)event);
}
-__STATIC_INLINE void nrf_qdec_shorts_enable(uint32_t qdec_short_mask)
+__STATIC_INLINE void nrf_qdec_shorts_enable(uint32_t mask)
{
- NRF_QDEC->SHORTS |= qdec_short_mask;
+ NRF_QDEC->SHORTS |= mask;
}
-__STATIC_INLINE void nrf_qdec_shorts_disable(uint32_t qdec_short_mask)
+__STATIC_INLINE void nrf_qdec_shorts_disable(uint32_t mask)
{
- NRF_QDEC->SHORTS &= ~qdec_short_mask;
+ NRF_QDEC->SHORTS &= ~mask;
}
__STATIC_INLINE int32_t nrf_qdec_sampleper_reg_get(void)
@@ -533,6 +539,7 @@
}
#endif // SUPPRESS_INLINE_IMPLEMENTATION
+
/** @} */
#ifdef __cplusplus
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_qspi.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_qspi.h
index c7982bd..5761b1d 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_qspi.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_qspi.h
@@ -52,47 +52,33 @@
*/
#define NRF_QSPI_PIN_NOT_CONNECTED 0xFF
-/**
- * @brief Macro for setting proper values to pin registers.
- */
-
+/** @brief Macro for setting proper values to pin registers. */
#define NRF_QSPI_PIN_VAL(pin) (pin) == NRF_QSPI_PIN_NOT_CONNECTED ? 0xFFFFFFFF : (pin)
-/**
- * @brief QSPI tasks.
- */
+
+/** @brief QSPI tasks. */
typedef enum
{
- /*lint -save -e30*/
NRF_QSPI_TASK_ACTIVATE = offsetof(NRF_QSPI_Type, TASKS_ACTIVATE), /**< Activate the QSPI interface. */
NRF_QSPI_TASK_READSTART = offsetof(NRF_QSPI_Type, TASKS_READSTART), /**< Start transfer from external flash memory to internal RAM. */
NRF_QSPI_TASK_WRITESTART = offsetof(NRF_QSPI_Type, TASKS_WRITESTART), /**< Start transfer from internal RAM to external flash memory. */
NRF_QSPI_TASK_ERASESTART = offsetof(NRF_QSPI_Type, TASKS_ERASESTART), /**< Start external flash memory erase operation. */
NRF_QSPI_TASK_DEACTIVATE = offsetof(NRF_QSPI_Type, TASKS_DEACTIVATE), /**< Deactivate the QSPI interface. */
- /*lint -restore*/
} nrf_qspi_task_t;
-/**
- * @brief QSPI events.
- */
+/** @brief QSPI events. */
typedef enum
{
- /*lint -save -e30*/
NRF_QSPI_EVENT_READY = offsetof(NRF_QSPI_Type, EVENTS_READY) /**< QSPI peripheral is ready after it executes any task. */
- /*lint -restore*/
} nrf_qspi_event_t;
-/**
- * @brief QSPI interrupts.
- */
+/** @brief QSPI interrupts. */
typedef enum
{
NRF_QSPI_INT_READY_MASK = QSPI_INTENSET_READY_Msk /**< Interrupt on READY event. */
} nrf_qspi_int_mask_t;
-/**
- * @brief QSPI frequency divider values.
- */
+/** @brief QSPI frequency divider values. */
typedef enum
{
NRF_QSPI_FREQ_32MDIV1, /**< 32.0 MHz. */
@@ -113,9 +99,7 @@
NRF_QSPI_FREQ_32MDIV16, /**< 2.00 MHz. */
} nrf_qspi_frequency_t;
-/**
- * @brief Interface configuration for a read operation.
- */
+/** @brief Interface configuration for a read operation. */
typedef enum
{
NRF_QSPI_READOC_FASTREAD = QSPI_IFCONFIG0_READOC_FASTREAD, /**< Single data line SPI. FAST_READ (opcode 0x0B). */
@@ -125,9 +109,7 @@
NRF_QSPI_READOC_READ4IO = QSPI_IFCONFIG0_READOC_READ4IO /**< Quad data line SPI. READ4IO (opcode 0xEB). */
} nrf_qspi_readoc_t;
-/**
- * @brief Interface configuration for a write operation.
- */
+/** @brief Interface configuration for a write operation. */
typedef enum
{
NRF_QSPI_WRITEOC_PP = QSPI_IFCONFIG0_WRITEOC_PP, /**< Single data line SPI. PP (opcode 0x02). */
@@ -136,27 +118,21 @@
NRF_QSPI_WRITEOC_PP4IO = QSPI_IFCONFIG0_WRITEOC_PP4IO, /**< Quad data line SPI. READ4O (opcode 0x38). */
} nrf_qspi_writeoc_t;
-/**
- * @brief Interface configuration for addressing mode.
- */
+/** @brief Interface configuration for addressing mode. */
typedef enum
{
NRF_QSPI_ADDRMODE_24BIT = QSPI_IFCONFIG0_ADDRMODE_24BIT, /**< 24-bit addressing. */
NRF_QSPI_ADDRMODE_32BIT = QSPI_IFCONFIG0_ADDRMODE_32BIT /**< 32-bit addressing. */
} nrf_qspi_addrmode_t;
-/**
- * @brief QSPI SPI mode. Polarization and phase configuration.
- */
+/** @brief QSPI SPI mode. Polarization and phase configuration. */
typedef enum
{
NRF_QSPI_MODE_0 = QSPI_IFCONFIG1_SPIMODE_MODE0, /**< Mode 0 (CPOL=0, CPHA=0). */
NRF_QSPI_MODE_1 = QSPI_IFCONFIG1_SPIMODE_MODE3 /**< Mode 1 (CPOL=1, CPHA=1). */
} nrf_qspi_spi_mode_t;
-/**
- * @brief Addressing configuration mode.
- */
+/** @brief Addressing configuration mode. */
typedef enum
{
NRF_QSPI_ADDRCONF_MODE_NOINSTR = QSPI_ADDRCONF_MODE_NoInstr, /**< Do not send any instruction. */
@@ -165,9 +141,7 @@
NRF_QSPI_ADDRCONF_MODE_ALL = QSPI_ADDRCONF_MODE_All /**< Send opcode, byte0, byte1. */
} nrf_qspi_addrconfig_mode_t;
-/**
- * @brief Erasing data length.
- */
+/** @brief Erasing data length. */
typedef enum
{
NRF_QSPI_ERASE_LEN_4KB = QSPI_ERASE_LEN_LEN_4KB, /**< Erase 4 kB block (flash command 0x20). */
@@ -175,9 +149,7 @@
NRF_QSPI_ERASE_LEN_ALL = QSPI_ERASE_LEN_LEN_All /**< Erase all (flash command 0xC7). */
} nrf_qspi_erase_len_t;
-/**
- * @brief Custom instruction length.
- */
+/** @brief Custom instruction length. */
typedef enum
{
NRF_QSPI_CINSTR_LEN_1B = QSPI_CINSTRCONF_LENGTH_1B, /**< Send opcode only. */
@@ -191,9 +163,7 @@
NRF_QSPI_CINSTR_LEN_9B = QSPI_CINSTRCONF_LENGTH_9B /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE7. */
} nrf_qspi_cinstr_len_t;
-/**
- * @brief Pins configuration.
- */
+/** @brief Pin configuration. */
typedef struct
{
uint8_t sck_pin; /**< SCK pin number. */
@@ -208,9 +178,7 @@
*/
} nrf_qspi_pins_t;
-/**
- * @brief Custom instruction configuration.
- */
+/** @brief Custom instruction configuration. */
typedef struct
{
uint8_t opcode; /**< Opcode used in custom instruction transmission. */
@@ -221,22 +189,18 @@
bool wren; /**< Send write enable before instruction. */
} nrf_qspi_cinstr_conf_t;
-/**
- * @brief Addressing mode register configuration. See @ref nrf_qspi_addrconfig_set
- */
+/** @brief Addressing mode register configuration. See @ref nrf_qspi_addrconfig_set */
typedef struct
{
- uint8_t opcode; /**< Opcode used to enter proper addressing mode. */
+ uint8_t opcode; /**< Opcode used to enter the proper addressing mode. */
uint8_t byte0; /**< Byte following the opcode. */
uint8_t byte1; /**< Byte following byte0. */
nrf_qspi_addrconfig_mode_t mode; /**< Extended addresing mode. */
- bool wipwait; /**< Enable/disable waiting for complete operation execution. */
+ bool wipwait; /**< Enable or disable waiting for complete operation execution. */
bool wren; /**< Send write enable before instruction. */
} nrf_qspi_addrconfig_conf_t;
-/**
- * @brief Structure with QSPI protocol interface configuration.
- */
+/** @brief Structure with QSPI protocol interface configuration. */
typedef struct
{
nrf_qspi_readoc_t readoc; /**< Read operation code. */
@@ -245,9 +209,7 @@
bool dpmconfig; /**< Enable the Deep Power-down Mode (DPM) feature. */
} nrf_qspi_prot_conf_t;
-/**
- * @brief QSPI physical interface configuration.
- */
+/** @brief QSPI physical interface configuration. */
typedef struct
{
uint8_t sck_delay; /**< tSHSL, tWHSL, and tSHWL in number of 16 MHz periods (62.5ns). */
@@ -256,19 +218,20 @@
nrf_qspi_frequency_t sck_freq; /**< SCK frequency given as enum @ref nrf_qspi_frequency_t. */
} nrf_qspi_phy_conf_t;
+
/**
- * @brief Function for activating a specific QSPI task.
+ * @brief Function for activating the specified QSPI task.
*
- * @param[in] p_reg Pointer to the peripheral register structure.
- * @param[in] task Task to activate.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_qspi_task_trigger(NRF_QSPI_Type * p_reg, nrf_qspi_task_t task);
/**
- * @brief Function for getting the address of a specific QSPI task register.
+ * @brief Function for getting the address of the specified QSPI task register.
*
- * @param[in] p_reg Pointer to the peripheral register structure.
- * @param[in] task Requested task.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] task QSPI task.
*
* @return Address of the specified task register.
*/
@@ -276,59 +239,59 @@
nrf_qspi_task_t task);
/**
- * @brief Function for clearing a specific QSPI event.
+ * @brief Function for clearing the specified QSPI event.
*
- * @param[in] p_reg Pointer to the peripheral register structure.
- * @param[in] qspi_event Event to clear.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to be cleared.
*/
-__STATIC_INLINE void nrf_qspi_event_clear(NRF_QSPI_Type * p_reg, nrf_qspi_event_t qspi_event);
+__STATIC_INLINE void nrf_qspi_event_clear(NRF_QSPI_Type * p_reg, nrf_qspi_event_t event);
/**
- * @brief Function for checking the state of a specific SPI event.
+ * @brief Function for retrieving the state of the QSPI event.
*
- * @param[in] p_reg Pointer to the peripheral register structure.
- * @param[in] qspi_event Event to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to be checked.
*
- * @retval true If the event is set.
- * @retval false If the event is not set.
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
-__STATIC_INLINE bool nrf_qspi_event_check(NRF_QSPI_Type const * p_reg, nrf_qspi_event_t qspi_event);
+__STATIC_INLINE bool nrf_qspi_event_check(NRF_QSPI_Type const * p_reg, nrf_qspi_event_t event);
/**
- * @brief Function for getting the address of a specific QSPI event register.
+ * @brief Function for getting the address of the specified QSPI event register.
*
- * @param[in] p_reg Pointer to the peripheral register structure.
- * @param[in] qspi_event Requested event.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event The specified event.
*
* @return Address of the specified event register.
*/
__STATIC_INLINE uint32_t * nrf_qspi_event_address_get(NRF_QSPI_Type const * p_reg,
- nrf_qspi_event_t qspi_event);
+ nrf_qspi_event_t event);
/**
* @brief Function for enabling specified interrupts.
*
- * @param[in] p_reg Pointer to the peripheral register structure.
- * @param[in] qspi_int_mask Interrupts to enable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of interrupts to be enabled.
*/
-__STATIC_INLINE void nrf_qspi_int_enable(NRF_QSPI_Type * p_reg, uint32_t qspi_int_mask);
+__STATIC_INLINE void nrf_qspi_int_enable(NRF_QSPI_Type * p_reg, uint32_t mask);
/**
* @brief Function for disabling specified interrupts.
*
- * @param[in] p_reg Pointer to the peripheral register structure.
- * @param[in] qspi_int_mask Interrupts to disable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of interrupts to be disabled.
*/
-__STATIC_INLINE void nrf_qspi_int_disable(NRF_QSPI_Type * p_reg, uint32_t qspi_int_mask);
+__STATIC_INLINE void nrf_qspi_int_disable(NRF_QSPI_Type * p_reg, uint32_t mask);
/**
* @brief Function for retrieving the state of a given interrupt.
*
- * @param[in] p_reg Pointer to the peripheral register structure.
- * @param[in] qspi_int Interrupt to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] qspi_int Interrupt to be checked.
*
- * @retval true If the interrupt is enabled.
- * @retval false If the interrupt is not enabled.
+ * @retval true The interrupt is enabled.
+ * @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_qspi_int_enable_check(NRF_QSPI_Type const * p_reg,
nrf_qspi_int_mask_t qspi_int);
@@ -336,14 +299,14 @@
/**
* @brief Function for enabling the QSPI peripheral.
*
- * @param[in] p_reg Pointer to the peripheral register structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_qspi_enable(NRF_QSPI_Type * p_reg);
/**
* @brief Function for disabling the QSPI peripheral.
*
- * @param[in] p_reg Pointer to the peripheral register structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_qspi_disable(NRF_QSPI_Type * p_reg);
@@ -353,7 +316,7 @@
* If a given signal is not needed, pass the @ref NRF_QSPI_PIN_NOT_CONNECTED
* value instead of its pin number.
*
- * @param[in] p_reg Pointer to the peripheral register structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_pins Pointer to the pins configuration structure. See @ref nrf_qspi_pins_t.
*/
__STATIC_INLINE void nrf_qspi_pins_set(NRF_QSPI_Type * p_reg,
@@ -362,7 +325,7 @@
/**
* @brief Function for setting the QSPI XIPOFFSET register.
*
- * @param[in] p_reg Pointer to the peripheral register structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] xip_offset Address offset in the external memory for Execute in Place operation.
*/
__STATIC_INLINE void nrf_qspi_xip_offset_set(NRF_QSPI_Type * p_reg,
@@ -371,8 +334,9 @@
/**
* @brief Function for setting the QSPI IFCONFIG0 register.
*
- * @param[in] p_reg Pointer to the peripheral register structure.
- * @param[in] p_config Pointer to the QSPI protocol interface configuration structure. See @ref nrf_qspi_prot_conf_t.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] p_config Pointer to the QSPI protocol interface configuration structure.
+ * See @ref nrf_qspi_prot_conf_t.
*/
__STATIC_INLINE void nrf_qspi_ifconfig0_set(NRF_QSPI_Type * p_reg,
const nrf_qspi_prot_conf_t * p_config);
@@ -380,8 +344,9 @@
/**
* @brief Function for setting the QSPI IFCONFIG1 register.
*
- * @param[in] p_reg Pointer to the peripheral register structure.
- * @param[in] p_config Pointer to the QSPI physical interface configuration structure. See @ref nrf_qspi_phy_conf_t.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] p_config Pointer to the QSPI physical interface configuration structure.
+ * See @ref nrf_qspi_phy_conf_t.
*/
__STATIC_INLINE void nrf_qspi_ifconfig1_set(NRF_QSPI_Type * p_reg,
const nrf_qspi_phy_conf_t * p_config);
@@ -389,7 +354,7 @@
/**
* @brief Function for setting the QSPI ADDRCONF register.
*
- * Function must be executed before sending task NRF_QSPI_TASK_ACTIVATE. Data stored in the structure
+ * This function must be executed before sending task NRF_QSPI_TASK_ACTIVATE. Data stored in the structure
* is sent during the start of the peripheral. Remember that the reset instruction can set
* addressing mode to default in the memory device. If memory reset is necessary before configuring
* the addressing mode, use custom instruction feature instead of this function.
@@ -397,8 +362,9 @@
* using a custom instruction feature (reset enable and then reset), set proper addressing mode
* using the custom instruction feature.
*
- * @param[in] p_reg Pointer to the peripheral register structure.
- * @param[in] p_config Pointer to the addressing mode configuration structure. See @ref nrf_qspi_addrconfig_conf_t.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] p_config Pointer to the addressing mode configuration structure.
+ * See @ref nrf_qspi_addrconfig_conf_t.
*/
__STATIC_INLINE void nrf_qspi_addrconfig_set(NRF_QSPI_Type * p_reg,
const nrf_qspi_addrconfig_conf_t * p_config);
@@ -406,7 +372,7 @@
/**
* @brief Function for setting write data into the peripheral register (without starting the process).
*
- * @param[in] p_reg Pointer to the peripheral register structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_buffer Pointer to the writing buffer.
* @param[in] length Lenght of the writing data.
* @param[in] dest_addr Address in memory to write to.
@@ -419,7 +385,7 @@
/**
* @brief Function for setting read data into the peripheral register (without starting the process).
*
- * @param[in] p_reg Pointer to the peripheral register structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[out] p_buffer Pointer to the reading buffer.
* @param[in] length Length of the read data.
* @param[in] src_addr Address in memory to read from.
@@ -432,7 +398,7 @@
/**
* @brief Function for setting erase data into the peripheral register (without starting the process).
*
- * @param[in] p_reg Pointer to the peripheral register structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] erase_addr Start address to erase. Address must have padding set to 4 bytes.
* @param[in] len Size of erasing area.
*/
@@ -443,7 +409,7 @@
/**
* @brief Function for getting the peripheral status register.
*
- * @param[in] p_reg Pointer to the peripheral register structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Peripheral status register.
*/
@@ -452,7 +418,7 @@
/**
* @brief Function for getting the device status register stored in the peripheral status register.
*
- * @param[in] p_reg Pointer to the peripheral register structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Device status register (lower byte).
*/
@@ -461,10 +427,10 @@
/**
* @brief Function for checking if the peripheral is busy or not.
*
- * @param[in] p_reg Pointer to the peripheral register structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
- * @retval true If QSPI is busy.
- * @retval false If QSPI is ready.
+ * @retval true The QSPI is busy.
+ * @retval false The QSPI is ready.
*/
__STATIC_INLINE bool nrf_qspi_busy_check(NRF_QSPI_Type const * p_reg);
@@ -474,7 +440,7 @@
* This function can be ommited when using NRF_QSPI_CINSTR_LEN_1B as the length argument
* (sending only opcode without data).
*
- * @param[in] p_reg Pointer to the peripheral register structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] length Length of the custom instruction data.
* @param[in] p_tx_data Pointer to the data to send with the custom instruction.
*/
@@ -484,7 +450,8 @@
/**
* @brief Function for getting data from register after custom instruction transmission.
- * @param[in] p_reg Pointer to the peripheral register structure.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] length Length of the custom instruction data.
* @param[in] p_rx_data Pointer to the reading buffer.
*/
@@ -495,13 +462,46 @@
/**
* @brief Function for sending custom instruction to external memory.
*
- * @param[in] p_reg Pointer to the peripheral register structure.
- * @param[in] p_config Pointer to the custom instruction configuration structure. See @ref nrf_qspi_cinstr_conf_t.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] p_config Pointer to the custom instruction configuration structure.
+ * See @ref nrf_qspi_cinstr_conf_t.
*/
__STATIC_INLINE void nrf_qspi_cinstr_transfer_start(NRF_QSPI_Type * p_reg,
const nrf_qspi_cinstr_conf_t * p_config);
+/**
+ * @brief Function for starting a custom instruction long transfer.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] p_config Pointer to the custom instruction configuration structure.
+ * See @ref nrf_qspi_cinstr_conf_t.
+ */
+__STATIC_INLINE void nrf_qspi_cinstr_long_transfer_start(NRF_QSPI_Type * p_reg,
+ const nrf_qspi_cinstr_conf_t * p_config);
+
+/**
+ * @brief Function for checking whether a custom instruction long transfer is ongoing.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @retval true Custom instruction long transfer is ongoing.
+ * @retval false Custom instruction long transfer is not ongoing.
+ */
+__STATIC_INLINE bool nrf_qspi_cinstr_long_transfer_is_ongoing(NRF_QSPI_Type const * p_reg);
+
+/**
+ * @brief Function for continuing a custom instruction long transfer.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] length Length of the custom instruction data.
+ * @param[in] finalize True if the custom instruction long transfer is to be finalized.
+ * False if the custom instruction long transfer is to be continued.
+ */
+__STATIC_INLINE void nrf_qspi_cinstr_long_transfer_continue(NRF_QSPI_Type * p_reg,
+ nrf_qspi_cinstr_len_t length,
+ bool finalize);
+
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE void nrf_qspi_task_trigger(NRF_QSPI_Type * p_reg, nrf_qspi_task_t task)
@@ -515,30 +515,30 @@
return ((uint32_t)p_reg + (uint32_t)task);
}
-__STATIC_INLINE void nrf_qspi_event_clear(NRF_QSPI_Type * p_reg, nrf_qspi_event_t qspi_event)
+__STATIC_INLINE void nrf_qspi_event_clear(NRF_QSPI_Type * p_reg, nrf_qspi_event_t event)
{
- *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)qspi_event)) = 0x0UL;
+ *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
}
-__STATIC_INLINE bool nrf_qspi_event_check(NRF_QSPI_Type const * p_reg, nrf_qspi_event_t qspi_event)
+__STATIC_INLINE bool nrf_qspi_event_check(NRF_QSPI_Type const * p_reg, nrf_qspi_event_t event)
{
- return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)qspi_event);
+ return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
}
__STATIC_INLINE uint32_t * nrf_qspi_event_address_get(NRF_QSPI_Type const * p_reg,
- nrf_qspi_event_t qspi_event)
+ nrf_qspi_event_t event)
{
- return (uint32_t *)((uint8_t *)p_reg + (uint32_t)qspi_event);
+ return (uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
}
-__STATIC_INLINE void nrf_qspi_int_enable(NRF_QSPI_Type * p_reg, uint32_t qspi_int_mask)
+__STATIC_INLINE void nrf_qspi_int_enable(NRF_QSPI_Type * p_reg, uint32_t mask)
{
- p_reg->INTENSET = qspi_int_mask;
+ p_reg->INTENSET = mask;
}
-__STATIC_INLINE void nrf_qspi_int_disable(NRF_QSPI_Type * p_reg, uint32_t qspi_int_mask)
+__STATIC_INLINE void nrf_qspi_int_disable(NRF_QSPI_Type * p_reg, uint32_t mask)
{
- p_reg->INTENCLR = qspi_int_mask;
+ p_reg->INTENCLR = mask;
}
__STATIC_INLINE bool nrf_qspi_int_enable_check(NRF_QSPI_Type const * p_reg,
@@ -755,6 +755,34 @@
((uint32_t)p_config->wren << QSPI_CINSTRCONF_WREN_Pos));
}
+__STATIC_INLINE void nrf_qspi_cinstr_long_transfer_start(NRF_QSPI_Type * p_reg,
+ const nrf_qspi_cinstr_conf_t * p_config)
+{
+ p_reg->CINSTRCONF = (((uint32_t)p_config->opcode << QSPI_CINSTRCONF_OPCODE_Pos) |
+ ((uint32_t)p_config->length << QSPI_CINSTRCONF_LENGTH_Pos) |
+ ((uint32_t)p_config->io2_level << QSPI_CINSTRCONF_LIO2_Pos) |
+ ((uint32_t)p_config->io3_level << QSPI_CINSTRCONF_LIO3_Pos) |
+ ((uint32_t)p_config->wipwait << QSPI_CINSTRCONF_WIPWAIT_Pos) |
+ ((uint32_t)p_config->wren << QSPI_CINSTRCONF_WREN_Pos) |
+ (QSPI_CINSTRCONF_LFEN_Msk));
+}
+
+__STATIC_INLINE bool nrf_qspi_cinstr_long_transfer_is_ongoing(NRF_QSPI_Type const * p_reg)
+{
+ return (bool)((p_reg->CINSTRCONF & (QSPI_CINSTRCONF_LFEN_Msk | QSPI_CINSTRCONF_LFSTOP_Msk))
+ == QSPI_CINSTRCONF_LFEN_Msk);
+}
+
+__STATIC_INLINE void nrf_qspi_cinstr_long_transfer_continue(NRF_QSPI_Type * p_reg,
+ nrf_qspi_cinstr_len_t length,
+ bool finalize)
+{
+ uint32_t mask = (((uint32_t)length << QSPI_CINSTRCONF_LENGTH_Pos) | (QSPI_CINSTRCONF_LFEN_Msk));
+ mask |= (finalize ? QSPI_CINSTRCONF_LFSTOP_Msk : 0);
+
+ p_reg->CINSTRCONF = mask;
+}
+
#endif // SUPPRESS_INLINE_IMPLEMENTATION
/** @} */
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_radio.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_radio.h
index d42a71f..071fd71 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_radio.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_radio.h
@@ -45,12 +45,9 @@
* @brief Hardware access layer for managing the RADIO peripheral.
*/
-/**
- * @brief RADIO tasks.
- */
+/** @brief RADIO tasks. */
typedef enum
{
- /*lint -save -e30*/
NRF_RADIO_TASK_TXEN = offsetof(NRF_RADIO_Type, TASKS_TXEN), /**< Enable RADIO in TX mode. */
NRF_RADIO_TASK_RXEN = offsetof(NRF_RADIO_Type, TASKS_RXEN), /**< Enable RADIO in RX mode. */
NRF_RADIO_TASK_START = offsetof(NRF_RADIO_Type, TASKS_START), /**< Start RADIO. */
@@ -72,15 +69,11 @@
#if defined(RADIO_TASKS_CCASTOP_TASKS_CCASTOP_Msk) || defined(__NRFX_DOXYGEN__)
NRF_RADIO_TASK_CCASTOP = offsetof(NRF_RADIO_Type, TASKS_CCASTOP), /**< Stop the Clear Channel Assessment. */
#endif
- /*lint -restore*/
} nrf_radio_task_t;
-/**
- * @brief RADIO events.
- */
+/** @brief RADIO events. */
typedef enum
{
- /*lint -save -e30*/
NRF_RADIO_EVENT_READY = offsetof(NRF_RADIO_Type, EVENTS_READY), /**< Radio has ramped up and is ready to be started. */
NRF_RADIO_EVENT_ADDRESS = offsetof(NRF_RADIO_Type, EVENTS_ADDRESS), /**< Address sent or received. */
NRF_RADIO_EVENT_PAYLOAD = offsetof(NRF_RADIO_Type, EVENTS_PAYLOAD), /**< Packet payload sent or received. */
@@ -131,12 +124,9 @@
and BleIeee802154_250Kbit modes when last
bit is sent on the air. */
#endif
- /*lint -restore*/
} nrf_radio_event_t;
-/**
- * @brief RADIO interrupts.
- */
+/** @brief RADIO interrupts. */
typedef enum
{
NRF_RADIO_INT_READY_MASK = RADIO_INTENSET_READY_Msk, /**< Interrupt on READY event. */
@@ -189,9 +179,7 @@
#endif
} nrf_radio_int_mask_t;
-/**
- * @brief RADIO shortcuts.
- */
+/** @brief RADIO shortcuts. */
typedef enum
{
NRF_RADIO_SHORT_READY_START_MASK = RADIO_SHORTS_READY_START_Msk, /**< Shortcut between READY event and START task. */
@@ -238,9 +226,7 @@
} nrf_radio_short_mask_t;
#if defined(RADIO_CCACTRL_CCAMODE_Msk) || defined(__NRFX_DOXYGEN__)
-/**
- * @brief RADIO Clear Channel Assessment modes.
- */
+/** @brief RADIO Clear Channel Assessment modes. */
typedef enum
{
NRF_RADIO_CCA_MODE_ED = RADIO_CCACTRL_CCAMODE_EdMode, /**< Energy Above Threshold. Will report busy whenever energy is detected above set threshold. */
@@ -251,9 +237,7 @@
} nrf_radio_cca_mode_t;
#endif // defined(RADIO_CCACTRL_CCAMODE_Msk) || defined(__NRFX_DOXYGEN__)
-/**
- * @brief Types of RADIO States.
- */
+/** @brief Types of RADIO states. */
typedef enum
{
NRF_RADIO_STATE_DISABLED = RADIO_STATE_STATE_Disabled, /**< No operations are going on inside the radio and the power consumption is at a minimum. */
@@ -267,9 +251,7 @@
NRF_RADIO_STATE_TXDISABLE = RADIO_STATE_STATE_TxDisable, /**< The radio is disabling the transmitter. */
} nrf_radio_state_t;
-/**
- * @brief Types of RADIO TX power.
- */
+/** @brief Types of RADIO TX power. */
typedef enum
{
#if defined(RADIO_TXPOWER_TXPOWER_Pos8dBm) || defined(__NRFX_DOXYGEN__)
@@ -303,9 +285,7 @@
#endif
} nrf_radio_txpower_t;
-/**
- * @brief Types of RADIO modes (data rate and modulation).
- */
+/** @brief Types of RADIO modes (data rate and modulation). */
typedef enum
{
NRF_RADIO_MODE_NRF_1MBIT = RADIO_MODE_MODE_Nrf_1Mbit, /**< 1Mbit/s Nordic proprietary radio mode. */
@@ -329,9 +309,7 @@
} nrf_radio_mode_t;
#if defined(RADIO_PCNF0_PLEN_Msk) || defined(__NRFX_DOXYGEN__)
-/**
- * @brief Types of preamble length.
- */
+/** @brief Types of preamble length. */
typedef enum
{
NRF_RADIO_PREAMBLE_LENGTH_8BIT = RADIO_PCNF0_PLEN_8bit, /**< 8-bit preamble. */
@@ -345,9 +323,7 @@
} nrf_radio_preamble_length_t;
#endif // defined(RADIO_PCNF0_PLEN_Msk) || defined(__NRFX_DOXYGEN__)
-/**
- * @brief Types of CRC calculatons regarding address.
- */
+/** @brief Types of CRC calculatons regarding address. */
typedef enum
{
NRF_RADIO_CRC_ADDR_INCLUDE = RADIO_CRCCNF_SKIPADDR_Include, /**< CRC calculation includes address field. */
@@ -357,9 +333,7 @@
#endif
} nrf_radio_crc_addr_t;
-/**
- * @brief Packet configuration.
- */
+/** @brief Packet configuration. */
typedef struct
{
uint8_t lflen; /**< Length on air of LENGTH field in number of bits. */
@@ -390,70 +364,69 @@
/**
* @brief Function for activating a specific RADIO task.
*
- * @param[in] radio_task Task to activate.
+ * @param[in] task Task to be activated.
*/
-__STATIC_INLINE void nrf_radio_task_trigger(nrf_radio_task_t radio_task);
+__STATIC_INLINE void nrf_radio_task_trigger(nrf_radio_task_t task);
/**
* @brief Function for getting the address of a specific RADIO task register.
*
* This function can be used by the PPI module.
*
- * @param[in] radio_task Requested task.
+ * @param[in] task Requested task.
*
* @return Address of the specified task register.
*/
-__STATIC_INLINE uint32_t nrf_radio_task_address_get(nrf_radio_task_t radio_task);
+__STATIC_INLINE uint32_t nrf_radio_task_address_get(nrf_radio_task_t task);
/**
* @brief Function for clearing a specific RADIO event.
*
- * @param[in] radio_event Event to clean.
+ * @param[in] event Event to clean.
*/
-__STATIC_INLINE void nrf_radio_event_clear(nrf_radio_event_t radio_event);
+__STATIC_INLINE void nrf_radio_event_clear(nrf_radio_event_t event);
/**
- * @brief Function for checking the state of a specific RADIO event.
+ * @brief Function for retrieving the state of the RADIO event.
*
- * @param[in] radio_event Event to check.
+ * @param[in] event Event to be checked.
*
- * @retval true If the event is set.
- * @retval false If the event is not set.
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
-__STATIC_INLINE bool nrf_radio_event_check(nrf_radio_event_t radio_event);
+__STATIC_INLINE bool nrf_radio_event_check(nrf_radio_event_t event);
/**
* @brief Function for getting the address of a specific RADIO event register.
*
* This function can be used by the PPI module.
*
- * @param[in] radio_event Requested Event.
+ * @param[in] event Requested Event.
*
* @return Address of the specified event register.
*/
-__STATIC_INLINE uint32_t nrf_radio_event_address_get(nrf_radio_event_t radio_event);
+__STATIC_INLINE uint32_t nrf_radio_event_address_get(nrf_radio_event_t event);
/**
* @brief Function for enabling specified RADIO shortcuts.
*
- * @param[in] radio_shorts_mask Mask of shortcuts.
- *
+ * @param[in] shorts_mask Mask of shortcuts.
*/
-__STATIC_INLINE void nrf_radio_shorts_enable(uint32_t radio_shorts_mask);
+__STATIC_INLINE void nrf_radio_shorts_enable(uint32_t shorts_mask);
/**
* @brief Function for disabling specified RADIO shortcuts.
*
- * @param[in] radio_shorts_mask Mask of shortcuts.
+ * @param[in] shorts_mask Mask of shortcuts.
*/
-__STATIC_INLINE void nrf_radio_shorts_disable(uint32_t radio_shorts_mask);
+__STATIC_INLINE void nrf_radio_shorts_disable(uint32_t shorts_mask);
/**
* @brief Function for setting the configuration of RADIO shortcuts.
*
- * @param[in] radio_shorts_mask Shortcuts configuration to set.
+ * @param[in] shorts_mask Shortcuts configuration to set.
*/
-__STATIC_INLINE void nrf_radio_shorts_set(uint32_t radio_shorts_mask);
+__STATIC_INLINE void nrf_radio_shorts_set(uint32_t shorts_mask);
/**
* @brief Function for getting the configuration of RADIO shortcuts.
@@ -465,32 +438,32 @@
/**
* @brief Function for enabling specified RADIO interrupts.
*
- * @param[in] radio_int_mask Mask of interrupts.
+ * @param[in] int_mask Mask of interrupts.
*/
-__STATIC_INLINE void nrf_radio_int_enable(uint32_t radio_int_mask);
+__STATIC_INLINE void nrf_radio_int_enable(uint32_t int_mask);
/**
* @brief Function for disabling specified RADIO interrupts.
*
- * @param[in] radio_int_mask Mask of interrupts.
+ * @param[in] int_mask Mask of interrupts.
*/
-__STATIC_INLINE void nrf_radio_int_disable(uint32_t radio_int_mask);
+__STATIC_INLINE void nrf_radio_int_disable(uint32_t int_mask);
/**
* @brief Function for getting the state of a specific interrupt.
*
- * @param[in] radio_int_mask Interrupt to check.
+ * @param[in] int_mask Interrupt to be checked.
*
- * @retval true If the interrupt is enabled.
- * @retval false If the interrupt is not enabled.
+ * @retval true The interrupt is enabled.
+ * @retval false The interrupt is not enabled.
*/
-__STATIC_INLINE bool nrf_radio_int_enable_check(nrf_radio_int_mask_t radio_int_mask);
+__STATIC_INLINE bool nrf_radio_int_enable_check(nrf_radio_int_mask_t int_mask);
/**
* @brief Function for getting CRC status of last received packet.
*
- * @retval true If the packet was received without CRC error .
- * @retval false If the packet was received with CRC error.
+ * @retval true The packet was received without CRC error.
+ * @retval false The packet was received with CRC error.
*/
__STATIC_INLINE bool nrf_radio_crc_status_check(void);
@@ -519,16 +492,16 @@
/**
* @brief Function for getting status on payload length.
*
- * @retval 0 If the payload is lesser than PCNF1.MAXLEN.
- * @retval 1 If the payload is greater than PCNF1.MAXLEN.
+ * @retval 0 The payload is lesser than PCNF1.MAXLEN.
+ * @retval 1 The payload is greater than PCNF1.MAXLEN.
*/
__STATIC_INLINE uint8_t nrf_radio_pdustat_get(void);
/**
* @brief Function for getting status on what rate packet is received with in Long Range.
*
- * @retval 0 If the frame is received at 125kbps.
- * @retval 1 If the frame is received at 500kbps.
+ * @retval 0 The frame is received at 125kbps.
+ * @retval 1 The frame is received at 500kbps.
*/
__STATIC_INLINE uint8_t nrf_radio_cistat_get(void);
#endif // defined(RADIO_PDUSTAT_PDUSTAT_Msk) || defined(__NRFX_DOXYGEN__)
@@ -940,48 +913,48 @@
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
-__STATIC_INLINE void nrf_radio_task_trigger(nrf_radio_task_t radio_task)
+__STATIC_INLINE void nrf_radio_task_trigger(nrf_radio_task_t task)
{
- *((volatile uint32_t *)((uint8_t *)NRF_RADIO + radio_task)) = 0x1UL;
+ *((volatile uint32_t *)((uint8_t *)NRF_RADIO + (uint32_t)task)) = 0x1UL;
}
-__STATIC_INLINE uint32_t nrf_radio_task_address_get(nrf_radio_task_t radio_task)
+__STATIC_INLINE uint32_t nrf_radio_task_address_get(nrf_radio_task_t task)
{
- return ((uint32_t)NRF_RADIO + (uint32_t)radio_task);
+ return ((uint32_t)NRF_RADIO + (uint32_t)task);
}
-__STATIC_INLINE void nrf_radio_event_clear(nrf_radio_event_t radio_event)
+__STATIC_INLINE void nrf_radio_event_clear(nrf_radio_event_t event)
{
- *((volatile uint32_t *)((uint8_t *)NRF_RADIO + radio_event)) = 0x0UL;
+ *((volatile uint32_t *)((uint8_t *)NRF_RADIO + (uint32_t)event)) = 0x0UL;
#if __CORTEX_M == 0x04
- volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_RADIO + radio_event));
+ volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_RADIO + (uint32_t)event));
(void)dummy;
#endif
}
-__STATIC_INLINE bool nrf_radio_event_check(nrf_radio_event_t radio_event)
+__STATIC_INLINE bool nrf_radio_event_check(nrf_radio_event_t event)
{
- return (bool) *((volatile uint32_t *)((uint8_t *)NRF_RADIO + radio_event));
+ return (bool) *((volatile uint32_t *)((uint8_t *)NRF_RADIO + (uint32_t)event));
}
-__STATIC_INLINE uint32_t nrf_radio_event_address_get(nrf_radio_event_t radio_event)
+__STATIC_INLINE uint32_t nrf_radio_event_address_get(nrf_radio_event_t event)
{
- return ((uint32_t)NRF_RADIO + (uint32_t)radio_event);
+ return ((uint32_t)NRF_RADIO + (uint32_t)event);
}
-__STATIC_INLINE void nrf_radio_shorts_enable(uint32_t radio_shorts_mask)
+__STATIC_INLINE void nrf_radio_shorts_enable(uint32_t shorts_mask)
{
- NRF_RADIO->SHORTS |= radio_shorts_mask;
+ NRF_RADIO->SHORTS |= shorts_mask;
}
-__STATIC_INLINE void nrf_radio_shorts_disable(uint32_t radio_shorts_mask)
+__STATIC_INLINE void nrf_radio_shorts_disable(uint32_t shorts_mask)
{
- NRF_RADIO->SHORTS &= ~radio_shorts_mask;
+ NRF_RADIO->SHORTS &= ~shorts_mask;
}
-__STATIC_INLINE void nrf_radio_shorts_set(uint32_t radio_shorts_mask)
+__STATIC_INLINE void nrf_radio_shorts_set(uint32_t shorts_mask)
{
- NRF_RADIO->SHORTS = radio_shorts_mask;
+ NRF_RADIO->SHORTS = shorts_mask;
}
__STATIC_INLINE uint32_t nrf_radio_shorts_get(void)
@@ -989,19 +962,19 @@
return NRF_RADIO->SHORTS;
}
-__STATIC_INLINE void nrf_radio_int_enable(uint32_t radio_int_mask)
+__STATIC_INLINE void nrf_radio_int_enable(uint32_t int_mask)
{
- NRF_RADIO->INTENSET = radio_int_mask;
+ NRF_RADIO->INTENSET = int_mask;
}
-__STATIC_INLINE void nrf_radio_int_disable(uint32_t radio_int_mask)
+__STATIC_INLINE void nrf_radio_int_disable(uint32_t int_mask)
{
- NRF_RADIO->INTENCLR = radio_int_mask;
+ NRF_RADIO->INTENCLR = int_mask;
}
-__STATIC_INLINE bool nrf_radio_int_enable_check(nrf_radio_int_mask_t radio_int_mask)
+__STATIC_INLINE bool nrf_radio_int_enable_check(nrf_radio_int_mask_t int_mask)
{
- return (bool)(NRF_RADIO->INTENSET & radio_int_mask);
+ return (bool)(NRF_RADIO->INTENSET & int_mask);
}
__STATIC_INLINE bool nrf_radio_crc_status_check(void)
@@ -1069,7 +1042,7 @@
NRF_RADIO->FREQUENCY = delta;
#else
NRFX_ASSERT(radio_frequency >= 2400);
- NRF_RADIO->FREQUENCY = (uint32_t)(2400 - radio_frequency);
+ NRF_RADIO->FREQUENCY = (uint32_t)(radio_frequency - 2400);
#endif //defined(RADIO_FREQUENCY_MAP_Msk)
}
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_regulators.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_regulators.h
index 6af58bf..c2a18a7 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_regulators.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_regulators.h
@@ -48,7 +48,7 @@
/**
* @brief Function for enabling or disabling DCDC converter.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] enable Set true to enable or false to disable DCDC converter.
*/
__STATIC_INLINE void nrf_regulators_dcdcen_set(NRF_REGULATORS_Type * p_reg, bool enable);
@@ -61,7 +61,7 @@
*
* @note This function never returns.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_regulators_system_off(NRF_REGULATORS_Type * p_reg);
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_rng.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_rng.h
index 07b2858..4bed21a 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_rng.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_rng.h
@@ -42,201 +42,187 @@
* @defgroup nrf_rng_hal RNG HAL
* @{
* @ingroup nrf_rng
- * @brief Hardware access layer for managing the Random Number Generator (RNG) peripheral.
+ * @brief Hardware access layer (HAL) for managing the Random Number Generator (RNG) peripheral.
*/
-#define NRF_RNG_TASK_SET (1UL)
-#define NRF_RNG_EVENT_CLEAR (0UL)
-/**
- * @enum nrf_rng_task_t
- * @brief RNG tasks.
- */
-typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
+/** @brief RNG tasks. */
+typedef enum
{
NRF_RNG_TASK_START = offsetof(NRF_RNG_Type, TASKS_START), /**< Start the random number generator. */
NRF_RNG_TASK_STOP = offsetof(NRF_RNG_Type, TASKS_STOP) /**< Stop the random number generator. */
-} nrf_rng_task_t; /*lint -restore */
+} nrf_rng_task_t;
-/**
- * @enum nrf_rng_event_t
- * @brief RNG events.
- */
-typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
+/** @brief RNG events. */
+typedef enum
{
NRF_RNG_EVENT_VALRDY = offsetof(NRF_RNG_Type, EVENTS_VALRDY) /**< New random number generated event. */
-} nrf_rng_event_t; /*lint -restore */
+} nrf_rng_event_t;
-/**
- * @enum nrf_rng_int_mask_t
- * @brief RNG interrupts.
- */
+/** @brief RNG interrupts. */
typedef enum
{
- NRF_RNG_INT_VALRDY_MASK = RNG_INTENSET_VALRDY_Msk /**< Mask for enabling or disabling an interrupt on VALRDY event. */
+ NRF_RNG_INT_VALRDY_MASK = RNG_INTENSET_VALRDY_Msk /**< Mask for enabling or disabling an interrupt on VALRDY event. */
} nrf_rng_int_mask_t;
-/**
- * @enum nrf_rng_short_mask_t
- * @brief Types of RNG shortcuts.
- */
+/** @brief Types of RNG shortcuts. */
typedef enum
{
- NRF_RNG_SHORT_VALRDY_STOP_MASK = RNG_SHORTS_VALRDY_STOP_Msk /**< Mask for setting shortcut between EVENT_VALRDY and TASK_STOP. */
+ NRF_RNG_SHORT_VALRDY_STOP_MASK = RNG_SHORTS_VALRDY_STOP_Msk /**< Mask for setting shortcut between EVENT_VALRDY and TASK_STOP. */
} nrf_rng_short_mask_t;
+
/**
* @brief Function for enabling interrupts.
*
- * @param[in] rng_int_mask Mask of interrupts.
+ * @param[in] mask Mask of interrupts to be enabled.
*/
-__STATIC_INLINE void nrf_rng_int_enable(uint32_t rng_int_mask);
+__STATIC_INLINE void nrf_rng_int_enable(uint32_t mask);
/**
* @brief Function for disabling interrupts.
*
- * @param[in] rng_int_mask Mask of interrupts.
+ * @param[in] mask Mask of interrupts to be disabled.
*/
-__STATIC_INLINE void nrf_rng_int_disable(uint32_t rng_int_mask);
+__STATIC_INLINE void nrf_rng_int_disable(uint32_t mask);
/**
- * @brief Function for getting the state of a specific interrupt.
+ * @brief Function for getting the state of the specified interrupt.
*
- * @param[in] rng_int_mask Interrupt.
+ * @param[in] mask Interrupts to be checked.
*
- * @retval true If the interrupt is not enabled.
- * @retval false If the interrupt is enabled.
+ * @retval true The interrupt is not enabled.
+ * @retval false The interrupt is enabled.
*/
-__STATIC_INLINE bool nrf_rng_int_get(nrf_rng_int_mask_t rng_int_mask);
+__STATIC_INLINE bool nrf_rng_int_get(nrf_rng_int_mask_t mask);
/**
- * @brief Function for getting the address of a specific task.
+ * @brief Function for getting the address of the specified task.
*
* This function can be used by the PPI module.
*
- * @param[in] rng_task Task.
+ * @param[in] rng_task The specified task.
+ *
+ * @return Address of the specified task.
*/
__STATIC_INLINE uint32_t * nrf_rng_task_address_get(nrf_rng_task_t rng_task);
/**
- * @brief Function for setting a specific task.
+ * @brief Function for triggering the specified task.
*
- * @param[in] rng_task Task.
+ * @param[in] rng_task The specified Task.
*/
__STATIC_INLINE void nrf_rng_task_trigger(nrf_rng_task_t rng_task);
/**
- * @brief Function for getting address of a specific event.
+ * @brief Function for getting address of the specified event.
*
* This function can be used by the PPI module.
*
- * @param[in] rng_event Event.
+ * @param[in] rng_event The specified event.
+ *
+ * @return Address of the specified event.
*/
__STATIC_INLINE uint32_t * nrf_rng_event_address_get(nrf_rng_event_t rng_event);
/**
- * @brief Function for clearing a specific event.
+ * @brief Function for clearing the specified event.
*
- * @param[in] rng_event Event.
+ * @param[in] rng_event The specified event.
*/
__STATIC_INLINE void nrf_rng_event_clear(nrf_rng_event_t rng_event);
/**
- * @brief Function for getting the state of a specific event.
+ * @brief Function for getting the state of the specified event.
*
- * @param[in] rng_event Event.
+ * @param[in] rng_event The specified event.
*
- * @retval true If the event is not set.
- * @retval false If the event is set.
+ * @retval true The event is not set.
+ * @retval false The event is set.
*/
__STATIC_INLINE bool nrf_rng_event_get(nrf_rng_event_t rng_event);
/**
* @brief Function for setting shortcuts.
*
- * @param[in] rng_short_mask Mask of shortcuts.
- *
+ * @param[in] mask Mask of shortcuts.
*/
-__STATIC_INLINE void nrf_rng_shorts_enable(uint32_t rng_short_mask);
+__STATIC_INLINE void nrf_rng_shorts_enable(uint32_t mask);
/**
* @brief Function for clearing shortcuts.
*
- * @param[in] rng_short_mask Mask of shortcuts.
- *
+ * @param[in] mask Mask of shortcuts.
*/
-__STATIC_INLINE void nrf_rng_shorts_disable(uint32_t rng_short_mask);
+__STATIC_INLINE void nrf_rng_shorts_disable(uint32_t mask);
/**
* @brief Function for getting the previously generated random value.
*
- * @return Previously generated random value.
+ * @return Previously generated random value.
*/
__STATIC_INLINE uint8_t nrf_rng_random_value_get(void);
-/**
- * @brief Function for enabling digital error correction.
- */
+/** @brief Function for enabling digital error correction. */
__STATIC_INLINE void nrf_rng_error_correction_enable(void);
-/**
- * @brief Function for disabling digital error correction.
- */
+/** @brief Function for disabling digital error correction. */
__STATIC_INLINE void nrf_rng_error_correction_disable(void);
+
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
-__STATIC_INLINE void nrf_rng_int_enable(uint32_t rng_int_mask)
+__STATIC_INLINE void nrf_rng_int_enable(uint32_t mask)
{
- NRF_RNG->INTENSET = rng_int_mask;
+ NRF_RNG->INTENSET = mask;
}
-__STATIC_INLINE void nrf_rng_int_disable(uint32_t rng_int_mask)
+__STATIC_INLINE void nrf_rng_int_disable(uint32_t mask)
{
- NRF_RNG->INTENCLR = rng_int_mask;
+ NRF_RNG->INTENCLR = mask;
}
-__STATIC_INLINE bool nrf_rng_int_get(nrf_rng_int_mask_t rng_int_mask)
+__STATIC_INLINE bool nrf_rng_int_get(nrf_rng_int_mask_t mask)
{
- return (bool)(NRF_RNG->INTENCLR & rng_int_mask);
+ return (bool)(NRF_RNG->INTENCLR & mask);
}
__STATIC_INLINE uint32_t * nrf_rng_task_address_get(nrf_rng_task_t rng_task)
{
- return (uint32_t *)((uint8_t *)NRF_RNG + rng_task);
+ return (uint32_t *)((uint8_t *)NRF_RNG + (uint32_t)rng_task);
}
__STATIC_INLINE void nrf_rng_task_trigger(nrf_rng_task_t rng_task)
{
- *((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_task)) = NRF_RNG_TASK_SET;
+ *((volatile uint32_t *)((uint8_t *)NRF_RNG + (uint32_t)rng_task)) = 0x1UL;
}
__STATIC_INLINE uint32_t * nrf_rng_event_address_get(nrf_rng_event_t rng_event)
{
- return (uint32_t *)((uint8_t *)NRF_RNG + rng_event);
+ return (uint32_t *)((uint8_t *)NRF_RNG + (uint32_t)rng_event);
}
__STATIC_INLINE void nrf_rng_event_clear(nrf_rng_event_t rng_event)
{
- *((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_event)) = NRF_RNG_EVENT_CLEAR;
+ *((volatile uint32_t *)((uint8_t *)NRF_RNG + (uint32_t)rng_event)) = 0x0UL;
#if __CORTEX_M == 0x04
- volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_event));
+ volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_RNG + (uint32_t)rng_event));
(void)dummy;
#endif
}
__STATIC_INLINE bool nrf_rng_event_get(nrf_rng_event_t rng_event)
{
- return (bool) * ((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_event));
+ return (bool) * ((volatile uint32_t *)((uint8_t *)NRF_RNG + (uint32_t)rng_event));
}
-__STATIC_INLINE void nrf_rng_shorts_enable(uint32_t rng_short_mask)
+__STATIC_INLINE void nrf_rng_shorts_enable(uint32_t mask)
{
- NRF_RNG->SHORTS |= rng_short_mask;
+ NRF_RNG->SHORTS |= mask;
}
-__STATIC_INLINE void nrf_rng_shorts_disable(uint32_t rng_short_mask)
+__STATIC_INLINE void nrf_rng_shorts_disable(uint32_t mask)
{
- NRF_RNG->SHORTS &= ~rng_short_mask;
+ NRF_RNG->SHORTS &= ~mask;
}
__STATIC_INLINE uint8_t nrf_rng_random_value_get(void)
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_rtc.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_rtc.h
index 079898c..1987ea5 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_rtc.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_rtc.h
@@ -46,44 +46,42 @@
*/
/** @brief Macro for getting the number of compare channels available in a given RTC instance. */
-#define NRF_RTC_CC_CHANNEL_COUNT(id) NRFX_CONCAT_3(RTC, id, _CC_NUM)
+#define NRF_RTC_CC_CHANNEL_COUNT(id) NRFX_CONCAT_3(RTC, id, _CC_NUM)
-#define RTC_INPUT_FREQ 32768 /**< Input frequency of the RTC instance. */
+/** @brief Input frequency of the RTC instance. */
+#define RTC_INPUT_FREQ 32768
/** @brief Macro for converting expected frequency to prescaler setting. */
#define RTC_FREQ_TO_PRESCALER(FREQ) (uint16_t)(((RTC_INPUT_FREQ) / (FREQ)) - 1)
-/**< Macro for wrapping values to RTC capacity. */
+/** @brief Macro for trimming values to the RTC bit width. */
#define RTC_WRAP(val) ((val) & RTC_COUNTER_COUNTER_Msk)
-#define RTC_CHANNEL_INT_MASK(ch) \
- ((uint32_t)(NRF_RTC_INT_COMPARE0_MASK) << (ch))
+/** @brief Macro for creating the interrupt bitmask for the specified compare channel. */
+#define RTC_CHANNEL_INT_MASK(ch) ((uint32_t)(NRF_RTC_INT_COMPARE0_MASK) << (ch))
-#define RTC_CHANNEL_EVENT_ADDR(ch) \
- (nrf_rtc_event_t)((NRF_RTC_EVENT_COMPARE_0) + (ch) * sizeof(uint32_t))
+/** @brief Macro for obtaining the compare event for the specified channel. */
+#define RTC_CHANNEL_EVENT_ADDR(ch) (nrf_rtc_event_t)((NRF_RTC_EVENT_COMPARE_0) + (ch) * sizeof(uint32_t))
+
/** @brief RTC tasks. */
typedef enum
{
- /*lint -save -e30*/
NRF_RTC_TASK_START = offsetof(NRF_RTC_Type,TASKS_START), /**< Start. */
NRF_RTC_TASK_STOP = offsetof(NRF_RTC_Type,TASKS_STOP), /**< Stop. */
NRF_RTC_TASK_CLEAR = offsetof(NRF_RTC_Type,TASKS_CLEAR), /**< Clear. */
NRF_RTC_TASK_TRIGGER_OVERFLOW = offsetof(NRF_RTC_Type,TASKS_TRIGOVRFLW),/**< Trigger overflow. */
- /*lint -restore*/
} nrf_rtc_task_t;
/** @brief RTC events. */
typedef enum
{
- /*lint -save -e30*/
NRF_RTC_EVENT_TICK = offsetof(NRF_RTC_Type,EVENTS_TICK), /**< Tick event. */
NRF_RTC_EVENT_OVERFLOW = offsetof(NRF_RTC_Type,EVENTS_OVRFLW), /**< Overflow event. */
NRF_RTC_EVENT_COMPARE_0 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[0]), /**< Compare 0 event. */
NRF_RTC_EVENT_COMPARE_1 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[1]), /**< Compare 1 event. */
NRF_RTC_EVENT_COMPARE_2 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[2]), /**< Compare 2 event. */
NRF_RTC_EVENT_COMPARE_3 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[3]) /**< Compare 3 event. */
- /*lint -restore*/
} nrf_rtc_event_t;
/** @brief RTC interrupts. */
@@ -97,12 +95,13 @@
NRF_RTC_INT_COMPARE3_MASK = RTC_INTENSET_COMPARE3_Msk /**< RTC interrupt from compare event on channel 3. */
} nrf_rtc_int_t;
+
/**
* @brief Function for setting a compare value for a channel.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] ch Channel.
- * @param[in] cc_val Compare value to set.
+ * @param[in] cc_val Compare value to be set.
*/
__STATIC_INLINE void nrf_rtc_cc_set(NRF_RTC_Type * p_reg, uint32_t ch, uint32_t cc_val);
@@ -136,7 +135,7 @@
* @brief Function for checking if interrupts are enabled.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
- * @param[in] mask Mask of interrupt flags to check.
+ * @param[in] mask Mask of interrupt flags to be checked.
*
* @return Mask with enabled interrupts.
*/
@@ -211,7 +210,7 @@
* @brief Function for clearing an event.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
- * @param[in] event Event to clear.
+ * @param[in] event Event to be cleared.
*/
__STATIC_INLINE void nrf_rtc_event_clear(NRF_RTC_Type * p_reg, nrf_rtc_event_t event);
@@ -264,7 +263,7 @@
* @brief Function for enabling events.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
- * @param[in] mask Mask of event flags to enable.
+ * @param[in] mask Mask of event flags to be enabled.
*/
__STATIC_INLINE void nrf_rtc_event_enable(NRF_RTC_Type * p_reg, uint32_t mask);
@@ -276,6 +275,15 @@
*/
__STATIC_INLINE void nrf_rtc_event_disable(NRF_RTC_Type * p_reg, uint32_t event);
+/**
+ * @brief Function for getting the COMPARE event associated with the specified compare channel.
+ *
+ * @param[in] index Compare channel index.
+ *
+ * @return Requested COMPARE event.
+ */
+__STATIC_INLINE nrf_rtc_event_t nrf_rtc_compare_event_get(uint8_t index);
+
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
@@ -387,10 +395,17 @@
{
p_reg->EVTENSET = mask;
}
+
__STATIC_INLINE void nrf_rtc_event_disable(NRF_RTC_Type * p_reg, uint32_t mask)
{
p_reg->EVTENCLR = mask;
}
+
+__STATIC_INLINE nrf_rtc_event_t nrf_rtc_compare_event_get(uint8_t index)
+{
+ return (nrf_rtc_event_t)NRFX_OFFSETOF(NRF_RTC_Type, EVENTS_COMPARE[index]);
+}
+
#endif
/** @} */
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_saadc.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_saadc.h
index c63bb21..1bb00f9 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_saadc.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_saadc.h
@@ -45,11 +45,11 @@
* @brief Hardware access layer for managing the SAADC peripheral.
*/
+/** @brief Number of available SAADC channels. */
#define NRF_SAADC_CHANNEL_COUNT 8
-/**
- * @brief Resolution of the analog-to-digital converter.
- */
+
+/** @brief Resolution of the analog-to-digital converter. */
typedef enum
{
NRF_SAADC_RESOLUTION_8BIT = SAADC_RESOLUTION_VAL_8bit, ///< 8 bit resolution.
@@ -58,10 +58,7 @@
NRF_SAADC_RESOLUTION_14BIT = SAADC_RESOLUTION_VAL_14bit ///< 14 bit resolution.
} nrf_saadc_resolution_t;
-
-/**
- * @brief Input selection for the analog-to-digital converter.
- */
+/** @brief Input selection for the analog-to-digital converter. */
typedef enum
{
NRF_SAADC_INPUT_DISABLED = SAADC_CH_PSELP_PSELP_NC, ///< Not connected.
@@ -76,10 +73,7 @@
NRF_SAADC_INPUT_VDD = SAADC_CH_PSELP_PSELP_VDD ///< VDD as input.
} nrf_saadc_input_t;
-
-/**
- * @brief Analog-to-digital converter oversampling mode.
- */
+/** @brief Analog-to-digital converter oversampling mode. */
typedef enum
{
NRF_SAADC_OVERSAMPLE_DISABLED = SAADC_OVERSAMPLE_OVERSAMPLE_Bypass, ///< No oversampling.
@@ -93,10 +87,7 @@
NRF_SAADC_OVERSAMPLE_256X = SAADC_OVERSAMPLE_OVERSAMPLE_Over256x ///< Oversample 256x.
} nrf_saadc_oversample_t;
-
-/**
- * @brief Analog-to-digital converter channel resistor control.
- */
+/** @brief Analog-to-digital converter channel resistor control. */
typedef enum
{
NRF_SAADC_RESISTOR_DISABLED = SAADC_CH_CONFIG_RESP_Bypass, ///< Bypass resistor ladder.
@@ -105,10 +96,7 @@
NRF_SAADC_RESISTOR_VDD1_2 = SAADC_CH_CONFIG_RESP_VDD1_2 ///< Set input at VDD/2.
} nrf_saadc_resistor_t;
-
-/**
- * @brief Gain factor of the analog-to-digital converter input.
- */
+/** @brief Gain factor of the analog-to-digital converter input. */
typedef enum
{
NRF_SAADC_GAIN1_6 = SAADC_CH_CONFIG_GAIN_Gain1_6, ///< Gain factor 1/6.
@@ -121,20 +109,14 @@
NRF_SAADC_GAIN4 = SAADC_CH_CONFIG_GAIN_Gain4, ///< Gain factor 4.
} nrf_saadc_gain_t;
-
-/**
- * @brief Reference selection for the analog-to-digital converter.
- */
+/** @brief Reference selection for the analog-to-digital converter. */
typedef enum
{
NRF_SAADC_REFERENCE_INTERNAL = SAADC_CH_CONFIG_REFSEL_Internal, ///< Internal reference (0.6 V).
NRF_SAADC_REFERENCE_VDD4 = SAADC_CH_CONFIG_REFSEL_VDD1_4 ///< VDD/4 as reference.
} nrf_saadc_reference_t;
-
-/**
- * @brief Analog-to-digital converter acquisition time.
- */
+/** @brief Analog-to-digital converter acquisition time. */
typedef enum
{
NRF_SAADC_ACQTIME_3US = SAADC_CH_CONFIG_TACQ_3us, ///< 3 us.
@@ -145,43 +127,31 @@
NRF_SAADC_ACQTIME_40US = SAADC_CH_CONFIG_TACQ_40us ///< 40 us.
} nrf_saadc_acqtime_t;
-
-/**
- * @brief Analog-to-digital converter channel mode.
- */
+/** @brief Analog-to-digital converter channel mode. */
typedef enum
{
- NRF_SAADC_MODE_SINGLE_ENDED = SAADC_CH_CONFIG_MODE_SE, ///< Single ended, PSELN will be ignored, negative input to ADC shorted to GND.
+ NRF_SAADC_MODE_SINGLE_ENDED = SAADC_CH_CONFIG_MODE_SE, ///< Single-ended mode. PSELN will be ignored, negative input to ADC shorted to GND.
NRF_SAADC_MODE_DIFFERENTIAL = SAADC_CH_CONFIG_MODE_Diff ///< Differential mode.
} nrf_saadc_mode_t;
-
-/**
- * @brief Analog-to-digital converter channel burst mode.
- */
+/** @brief Analog-to-digital converter channel burst mode. */
typedef enum
{
NRF_SAADC_BURST_DISABLED = SAADC_CH_CONFIG_BURST_Disabled, ///< Burst mode is disabled (normal operation).
NRF_SAADC_BURST_ENABLED = SAADC_CH_CONFIG_BURST_Enabled ///< Burst mode is enabled. SAADC takes 2^OVERSAMPLE number of samples as fast as it can, and sends the average to Data RAM.
} nrf_saadc_burst_t;
-
-/**
- * @brief Analog-to-digital converter tasks.
- */
-typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
+/** @brief Analog-to-digital converter tasks. */
+typedef enum
{
NRF_SAADC_TASK_START = offsetof(NRF_SAADC_Type, TASKS_START), ///< Start the ADC and prepare the result buffer in RAM.
NRF_SAADC_TASK_SAMPLE = offsetof(NRF_SAADC_Type, TASKS_SAMPLE), ///< Take one ADC sample. If scan is enabled, all channels are sampled.
- NRF_SAADC_TASK_STOP = offsetof(NRF_SAADC_Type, TASKS_STOP), ///< Stop the ADC and terminate any on-going conversion.
+ NRF_SAADC_TASK_STOP = offsetof(NRF_SAADC_Type, TASKS_STOP), ///< Stop the ADC and terminate any ongoing conversion.
NRF_SAADC_TASK_CALIBRATEOFFSET = offsetof(NRF_SAADC_Type, TASKS_CALIBRATEOFFSET), ///< Starts offset auto-calibration.
} nrf_saadc_task_t;
-
-/**
- * @brief Analog-to-digital converter events.
- */
-typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
+/** @brief Analog-to-digital converter events. */
+typedef enum
{
NRF_SAADC_EVENT_STARTED = offsetof(NRF_SAADC_Type, EVENTS_STARTED), ///< The ADC has started.
NRF_SAADC_EVENT_END = offsetof(NRF_SAADC_Type, EVENTS_END), ///< The ADC has filled up the result buffer.
@@ -207,10 +177,7 @@
NRF_SAADC_EVENT_CH7_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[7].LIMITL) ///< Last result is equal or below CH[7].LIMIT.LOW.
} nrf_saadc_event_t;
-
-/**
- * @brief Analog-to-digital converter interrupt masks.
- */
+/** @brief Analog-to-digital converter interrupt masks. */
typedef enum
{
NRF_SAADC_INT_STARTED = SAADC_INTENSET_STARTED_Msk, ///< Interrupt on EVENTS_STARTED event.
@@ -238,88 +205,81 @@
NRF_SAADC_INT_ALL = 0x7FFFFFFFUL ///< Mask of all interrupts.
} nrf_saadc_int_mask_t;
-
-/**
- * @brief Analog-to-digital converter value limit type.
- */
+/** @brief Analog-to-digital converter value limit type. */
typedef enum
{
- NRF_SAADC_LIMIT_LOW = 0,
- NRF_SAADC_LIMIT_HIGH = 1
+ NRF_SAADC_LIMIT_LOW = 0, ///< Low limit type.
+ NRF_SAADC_LIMIT_HIGH = 1 ///< High limit type.
} nrf_saadc_limit_t;
+/** @brief Type of a single ADC conversion result. */
+typedef int16_t nrf_saadc_value_t;
-typedef int16_t nrf_saadc_value_t; ///< Type of a single ADC conversion result.
-
-
-/**
- * @brief Analog-to-digital converter configuration structure.
- */
+/** @brief Analog-to-digital converter configuration structure. */
typedef struct
{
- nrf_saadc_resolution_t resolution;
- nrf_saadc_oversample_t oversample;
- nrf_saadc_value_t * buffer;
- uint32_t buffer_size;
+ nrf_saadc_resolution_t resolution; ///< Resolution of samples.
+ nrf_saadc_oversample_t oversample; ///< Oversampling configuration.
+ nrf_saadc_value_t * buffer; ///< Pointer to sample buffer.
+ uint32_t buffer_size; ///< Size of the sample buffer.
} nrf_saadc_config_t;
-
-/**
- * @brief Analog-to-digital converter channel configuration structure.
- */
+/** @brief Analog-to-digital converter channel configuration structure. */
typedef struct
{
- nrf_saadc_resistor_t resistor_p;
- nrf_saadc_resistor_t resistor_n;
- nrf_saadc_gain_t gain;
- nrf_saadc_reference_t reference;
- nrf_saadc_acqtime_t acq_time;
- nrf_saadc_mode_t mode;
- nrf_saadc_burst_t burst;
- nrf_saadc_input_t pin_p;
- nrf_saadc_input_t pin_n;
+ nrf_saadc_resistor_t resistor_p; ///< Resistor value on positive input.
+ nrf_saadc_resistor_t resistor_n; ///< Resistor value on negative input.
+ nrf_saadc_gain_t gain; ///< Gain control value.
+ nrf_saadc_reference_t reference; ///< Reference control value.
+ nrf_saadc_acqtime_t acq_time; ///< Acquisition time.
+ nrf_saadc_mode_t mode; ///< SAADC mode. Single-ended or differential.
+ nrf_saadc_burst_t burst; ///< Burst mode configuration.
+ nrf_saadc_input_t pin_p; ///< Input positive pin selection.
+ nrf_saadc_input_t pin_n; ///< Input negative pin selection.
} nrf_saadc_channel_config_t;
-/**
- * @brief Function for triggering a specific SAADC task.
- *
- * @param[in] saadc_task SAADC task.
- */
-__STATIC_INLINE void nrf_saadc_task_trigger(nrf_saadc_task_t saadc_task);
/**
- * @brief Function for getting the address of a specific SAADC task register.
+ * @brief Function for triggering the specified SAADC task.
*
- * @param[in] saadc_task SAADC task.
+ * @param[in] task SAADC task.
+ */
+__STATIC_INLINE void nrf_saadc_task_trigger(nrf_saadc_task_t task);
+
+/**
+ * @brief Function for getting the address of the specified SAADC task register.
+ *
+ * @param[in] task SAADC task.
*
* @return Address of the specified SAADC task.
*/
-__STATIC_INLINE uint32_t nrf_saadc_task_address_get(nrf_saadc_task_t saadc_task);
+__STATIC_INLINE uint32_t nrf_saadc_task_address_get(nrf_saadc_task_t task);
/**
- * @brief Function for getting the state of a specific SAADC event.
+ * @brief Function for retrieving the state of the UARTE event.
*
- * @param[in] saadc_event SAADC event.
+ * @param[in] event Event to be checked.
*
- * @return State of the specified SAADC event.
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
-__STATIC_INLINE bool nrf_saadc_event_check(nrf_saadc_event_t saadc_event);
+__STATIC_INLINE bool nrf_saadc_event_check(nrf_saadc_event_t event);
/**
* @brief Function for clearing the specific SAADC event.
*
- * @param[in] saadc_event SAADC event.
+ * @param[in] event SAADC event.
*/
-__STATIC_INLINE void nrf_saadc_event_clear(nrf_saadc_event_t saadc_event);
+__STATIC_INLINE void nrf_saadc_event_clear(nrf_saadc_event_t event);
/**
- * @brief Function for getting the address of a specific SAADC event register.
+ * @brief Function for getting the address of the specified SAADC event register.
*
- * @param[in] saadc_event SAADC event.
+ * @param[in] event SAADC event.
*
* @return Address of the specified SAADC event.
*/
-__STATIC_INLINE uint32_t nrf_saadc_event_address_get(nrf_saadc_event_t saadc_event);
+__STATIC_INLINE uint32_t nrf_saadc_event_address_get(nrf_saadc_event_t event);
#if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
@@ -360,25 +320,30 @@
#endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
- * @brief Function for getting the address of a specific SAADC limit event register.
+ * @brief Function for getting the address of the SAADC limit event register,
+ * as specified by the channel and the limit type.
*
- * @param[in] channel Channel number.
+ * @param[in] channel Channel number.
* @param[in] limit_type Low limit or high limit.
*
* @return Address of the specified SAADC limit event.
*/
-__STATIC_INLINE volatile uint32_t * nrf_saadc_event_limit_address_get(uint8_t channel, nrf_saadc_limit_t limit_type);
+__STATIC_INLINE volatile uint32_t * nrf_saadc_event_limit_address_get(uint8_t channel,
+ nrf_saadc_limit_t limit_type);
/**
* @brief Function for getting the SAADC channel monitoring limit events.
*
* @param[in] channel Channel number.
* @param[in] limit_type Low limit or high limit.
+ *
+ * @return The SAADC channel monitoring limit event.
*/
-__STATIC_INLINE nrf_saadc_event_t nrf_saadc_event_limit_get(uint8_t channel, nrf_saadc_limit_t limit_type);
+__STATIC_INLINE nrf_saadc_event_t nrf_saadc_event_limit_get(uint8_t channel,
+ nrf_saadc_limit_t limit_type);
/**
- * @brief Function for configuring the input pins for a specific SAADC channel.
+ * @brief Function for configuring the input pins for the specified SAADC channel.
*
* @param[in] channel Channel number.
* @param[in] pselp Positive input.
@@ -389,7 +354,7 @@
nrf_saadc_input_t pseln);
/**
- * @brief Function for configuring the positive input pin for a specific SAADC channel.
+ * @brief Function for configuring the positive input pin for the specified SAADC channel.
*
* @param[in] channel Channel number.
* @param[in] pselp Positive input.
@@ -409,24 +374,24 @@
/**
* @brief Function for enabling specified SAADC interrupts.
*
- * @param[in] saadc_int_mask Interrupt(s) to enable.
+ * @param[in] saadc_int_mask Interrupt(s) to be enabled.
*/
__STATIC_INLINE void nrf_saadc_int_enable(uint32_t saadc_int_mask);
/**
* @brief Function for retrieving the state of specified SAADC interrupts.
*
- * @param[in] saadc_int_mask Interrupt(s) to check.
+ * @param[in] saadc_int_mask Interrupt(s) to be checked.
*
- * @retval true If all specified interrupts are enabled.
- * @retval false If at least one of the given interrupts is not enabled.
+ * @retval true All specified interrupts are enabled.
+ * @retval false At least one of the given interrupts is not enabled.
*/
__STATIC_INLINE bool nrf_saadc_int_enable_check(uint32_t saadc_int_mask);
/**
* @brief Function for disabling specified interrupts.
*
- * @param saadc_int_mask Interrupt(s) to disable.
+ * @param saadc_int_mask Interrupt(s) to be disabled.
*/
__STATIC_INLINE void nrf_saadc_int_disable(uint32_t saadc_int_mask);
@@ -436,7 +401,7 @@
* @param[in] channel SAADC channel number.
* @param[in] limit_type Limit type.
*
- * @returns Interrupt mask.
+ * @return Interrupt mask.
*/
__STATIC_INLINE uint32_t nrf_saadc_limit_int_get(uint8_t channel, nrf_saadc_limit_t limit_type);
@@ -445,8 +410,8 @@
*
* This function checks whether the analog-to-digital converter is busy with a conversion.
*
- * @retval true If the SAADC is busy.
- * @retval false If the SAADC is not busy.
+ * @retval true The SAADC is busy.
+ * @retval false The SAADC is not busy.
*/
__STATIC_INLINE bool nrf_saadc_busy_check(void);
@@ -465,8 +430,8 @@
/**
* @brief Function for checking if the SAADC is enabled.
*
- * @retval true If the SAADC is enabled.
- * @retval false If the SAADC is not enabled.
+ * @retval true The SAADC is enabled.
+ * @retval false The SAADC is not enabled.
*/
__STATIC_INLINE bool nrf_saadc_enable_check(void);
@@ -563,33 +528,33 @@
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
-__STATIC_INLINE void nrf_saadc_task_trigger(nrf_saadc_task_t saadc_task)
+__STATIC_INLINE void nrf_saadc_task_trigger(nrf_saadc_task_t task)
{
- *((volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)saadc_task)) = 0x1UL;
+ *((volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)task)) = 0x1UL;
}
-__STATIC_INLINE uint32_t nrf_saadc_task_address_get(nrf_saadc_task_t saadc_task)
+__STATIC_INLINE uint32_t nrf_saadc_task_address_get(nrf_saadc_task_t task)
{
- return (uint32_t)((uint8_t *)NRF_SAADC + (uint32_t)saadc_task);
+ return (uint32_t)((uint8_t *)NRF_SAADC + (uint32_t)task);
}
-__STATIC_INLINE bool nrf_saadc_event_check(nrf_saadc_event_t saadc_event)
+__STATIC_INLINE bool nrf_saadc_event_check(nrf_saadc_event_t event)
{
- return (bool)*(volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)saadc_event);
+ return (bool)*(volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)event);
}
-__STATIC_INLINE void nrf_saadc_event_clear(nrf_saadc_event_t saadc_event)
+__STATIC_INLINE void nrf_saadc_event_clear(nrf_saadc_event_t event)
{
- *((volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)saadc_event)) = 0x0UL;
+ *((volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)event)) = 0x0UL;
#if __CORTEX_M == 0x04
- volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)saadc_event));
+ volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)event));
(void)dummy;
#endif
}
-__STATIC_INLINE uint32_t nrf_saadc_event_address_get(nrf_saadc_event_t saadc_event)
+__STATIC_INLINE uint32_t nrf_saadc_event_address_get(nrf_saadc_event_t event)
{
- return (uint32_t )((uint8_t *)NRF_SAADC + (uint32_t)saadc_event);
+ return (uint32_t )((uint8_t *)NRF_SAADC + (uint32_t)event);
}
#if defined(DPPI_PRESENT)
@@ -618,7 +583,8 @@
}
#endif // defined(DPPI_PRESENT)
-__STATIC_INLINE volatile uint32_t * nrf_saadc_event_limit_address_get(uint8_t channel, nrf_saadc_limit_t limit_type)
+__STATIC_INLINE volatile uint32_t * nrf_saadc_event_limit_address_get(uint8_t channel,
+ nrf_saadc_limit_t limit_type)
{
NRFX_ASSERT(channel < NRF_SAADC_CHANNEL_COUNT);
if (limit_type == NRF_SAADC_LIMIT_HIGH)
@@ -631,7 +597,8 @@
}
}
-__STATIC_INLINE nrf_saadc_event_t nrf_saadc_event_limit_get(uint8_t channel, nrf_saadc_limit_t limit_type)
+__STATIC_INLINE nrf_saadc_event_t nrf_saadc_event_limit_get(uint8_t channel,
+ nrf_saadc_limit_t limit_type)
{
if (limit_type == NRF_SAADC_LIMIT_HIGH)
{
@@ -647,7 +614,7 @@
}
}
-__STATIC_INLINE void nrf_saadc_channel_input_set(uint8_t channel,
+__STATIC_INLINE void nrf_saadc_channel_input_set(uint8_t channel,
nrf_saadc_input_t pselp,
nrf_saadc_input_t pseln)
{
@@ -655,7 +622,7 @@
NRF_SAADC->CH[channel].PSELP = pselp;
}
-__STATIC_INLINE void nrf_saadc_channel_pos_input_set(uint8_t channel,
+__STATIC_INLINE void nrf_saadc_channel_pos_input_set(uint8_t channel,
nrf_saadc_input_t pselp)
{
NRF_SAADC->CH[channel].PSELP = pselp;
@@ -686,7 +653,8 @@
__STATIC_INLINE uint32_t nrf_saadc_limit_int_get(uint8_t channel, nrf_saadc_limit_t limit_type)
{
NRFX_ASSERT(channel < NRF_SAADC_CHANNEL_COUNT);
- uint32_t mask = (limit_type == NRF_SAADC_LIMIT_LOW) ? NRF_SAADC_INT_CH0LIMITL : NRF_SAADC_INT_CH0LIMITH;
+ uint32_t mask = (limit_type == NRF_SAADC_LIMIT_LOW) ?
+ NRF_SAADC_INT_CH0LIMITL : NRF_SAADC_INT_CH0LIMITH;
return mask << (channel * 2);
}
@@ -776,7 +744,7 @@
nrf_saadc_channel_input_set(channel, config->pin_p, config->pin_n);
}
-__STATIC_INLINE void nrf_saadc_burst_set(uint8_t channel,
+__STATIC_INLINE void nrf_saadc_burst_set(uint8_t channel,
nrf_saadc_burst_t burst)
{
NRF_SAADC->CH[channel].CONFIG =
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_spi.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_spi.h
index 8366deb..88b6b6b 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_spi.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_spi.h
@@ -53,28 +53,20 @@
#define NRF_SPI_PIN_NOT_CONNECTED 0xFFFFFFFF
-/**
- * @brief SPI events.
- */
+/** @brief SPI events. */
typedef enum
{
- /*lint -save -e30*/
NRF_SPI_EVENT_READY = offsetof(NRF_SPI_Type, EVENTS_READY) ///< TXD byte sent and RXD byte received.
- /*lint -restore*/
} nrf_spi_event_t;
-/**
- * @brief SPI interrupts.
- */
+/** @brief SPI interrupts. */
typedef enum
{
NRF_SPI_INT_READY_MASK = SPI_INTENSET_READY_Msk, ///< Interrupt on READY event.
NRF_SPI_ALL_INTS_MASK = SPI_INTENSET_READY_Msk ///< All SPI interrupts.
} nrf_spi_int_mask_t;
-/**
- * @brief SPI data rates.
- */
+/** @brief SPI data rates. */
typedef enum
{
NRF_SPI_FREQ_125K = SPI_FREQUENCY_FREQUENCY_K125, ///< 125 kbps.
@@ -88,9 +80,7 @@
NRF_SPI_FREQ_8M = (int)SPI_FREQUENCY_FREQUENCY_M8 ///< 8 Mbps.
} nrf_spi_frequency_t;
-/**
- * @brief SPI modes.
- */
+/** @brief SPI modes. */
typedef enum
{
NRF_SPI_MODE_0, ///< SCK active high, sample on leading edge of clock.
@@ -99,9 +89,7 @@
NRF_SPI_MODE_3 ///< SCK active low, sample on trailing edge of clock.
} nrf_spi_mode_t;
-/**
- * @brief SPI bit orders.
- */
+/** @brief SPI bit orders. */
typedef enum
{
NRF_SPI_BIT_ORDER_MSB_FIRST = SPI_CONFIG_ORDER_MsbFirst, ///< Most significant bit shifted out first.
@@ -110,78 +98,78 @@
/**
- * @brief Function for clearing a specific SPI event.
+ * @brief Function for clearing the specified SPI event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spi_event Event to clear.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to be cleared.
*/
-__STATIC_INLINE void nrf_spi_event_clear(NRF_SPI_Type * p_reg,
- nrf_spi_event_t spi_event);
+__STATIC_INLINE void nrf_spi_event_clear(NRF_SPI_Type * p_reg,
+ nrf_spi_event_t event);
/**
- * @brief Function for checking the state of a specific SPI event.
+ * @brief Function for retrieving the state of the SPI event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spi_event Event to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to be checked.
*
- * @retval true If the event is set.
- * @retval false If the event is not set.
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
-__STATIC_INLINE bool nrf_spi_event_check(NRF_SPI_Type * p_reg,
- nrf_spi_event_t spi_event);
+__STATIC_INLINE bool nrf_spi_event_check(NRF_SPI_Type * p_reg,
+ nrf_spi_event_t event);
/**
- * @brief Function for getting the address of a specific SPI event register.
+ * @brief Function for getting the address of the specified SPI event register.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spi_event Requested event.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event The specified event.
*
* @return Address of the specified event register.
*/
-__STATIC_INLINE uint32_t * nrf_spi_event_address_get(NRF_SPI_Type * p_reg,
- nrf_spi_event_t spi_event);
+__STATIC_INLINE uint32_t * nrf_spi_event_address_get(NRF_SPI_Type * p_reg,
+ nrf_spi_event_t event);
/**
- * @brief Function for enabling specified interrupts.
+ * @brief Function for enabling the specified interrupts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spi_int_mask Interrupts to enable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_spi_int_enable(NRF_SPI_Type * p_reg,
- uint32_t spi_int_mask);
+ uint32_t mask);
/**
- * @brief Function for disabling specified interrupts.
+ * @brief Function for disabling the specified interrupts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spi_int_mask Interrupts to disable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_spi_int_disable(NRF_SPI_Type * p_reg,
- uint32_t spi_int_mask);
+ uint32_t mask);
/**
* @brief Function for retrieving the state of a given interrupt.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spi_int Interrupt to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] spi_int Interrupt to be checked.
*
- * @retval true If the interrupt is enabled.
- * @retval false If the interrupt is not enabled.
+ * @retval true The interrupt is enabled.
+ * @retval false The interrupt is not enabled.
*/
-__STATIC_INLINE bool nrf_spi_int_enable_check(NRF_SPI_Type * p_reg,
+__STATIC_INLINE bool nrf_spi_int_enable_check(NRF_SPI_Type * p_reg,
nrf_spi_int_mask_t spi_int);
/**
* @brief Function for enabling the SPI peripheral.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_spi_enable(NRF_SPI_Type * p_reg);
/**
* @brief Function for disabling the SPI peripheral.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_spi_disable(NRF_SPI_Type * p_reg);
@@ -191,20 +179,20 @@
* If a given signal is not needed, pass the @ref NRF_SPI_PIN_NOT_CONNECTED
* value instead of its pin number.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] sck_pin SCK pin number.
- * @param[in] mosi_pin MOSI pin number.
- * @param[in] miso_pin MISO pin number.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] sck_pin SCK pin number.
+ * @param[in] mosi_pin MOSI pin number.
+ * @param[in] miso_pin MISO pin number.
*/
__STATIC_INLINE void nrf_spi_pins_set(NRF_SPI_Type * p_reg,
- uint32_t sck_pin,
- uint32_t mosi_pin,
- uint32_t miso_pin);
+ uint32_t sck_pin,
+ uint32_t mosi_pin,
+ uint32_t miso_pin);
/**
* @brief Function for writing data to the SPI transmitter register.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] data TX data to send.
*/
__STATIC_INLINE void nrf_spi_txd_set(NRF_SPI_Type * p_reg, uint8_t data);
@@ -212,7 +200,7 @@
/**
* @brief Function for reading data from the SPI receiver register.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return RX data received.
*/
@@ -221,61 +209,61 @@
/**
* @brief Function for setting the SPI master data rate.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] frequency SPI frequency.
*/
-__STATIC_INLINE void nrf_spi_frequency_set(NRF_SPI_Type * p_reg,
+__STATIC_INLINE void nrf_spi_frequency_set(NRF_SPI_Type * p_reg,
nrf_spi_frequency_t frequency);
/**
* @brief Function for setting the SPI configuration.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] spi_mode SPI mode.
* @param[in] spi_bit_order SPI bit order.
*/
-__STATIC_INLINE void nrf_spi_configure(NRF_SPI_Type * p_reg,
- nrf_spi_mode_t spi_mode,
+__STATIC_INLINE void nrf_spi_configure(NRF_SPI_Type * p_reg,
+ nrf_spi_mode_t spi_mode,
nrf_spi_bit_order_t spi_bit_order);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
-__STATIC_INLINE void nrf_spi_event_clear(NRF_SPI_Type * p_reg,
- nrf_spi_event_t spi_event)
+__STATIC_INLINE void nrf_spi_event_clear(NRF_SPI_Type * p_reg,
+ nrf_spi_event_t event)
{
- *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spi_event)) = 0x0UL;
+ *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
#if __CORTEX_M == 0x04
- volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spi_event));
+ volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
(void)dummy;
#endif
}
-__STATIC_INLINE bool nrf_spi_event_check(NRF_SPI_Type * p_reg,
- nrf_spi_event_t spi_event)
+__STATIC_INLINE bool nrf_spi_event_check(NRF_SPI_Type * p_reg,
+ nrf_spi_event_t event)
{
- return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spi_event);
+ return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
}
-__STATIC_INLINE uint32_t * nrf_spi_event_address_get(NRF_SPI_Type * p_reg,
- nrf_spi_event_t spi_event)
+__STATIC_INLINE uint32_t * nrf_spi_event_address_get(NRF_SPI_Type * p_reg,
+ nrf_spi_event_t event)
{
- return (uint32_t *)((uint8_t *)p_reg + (uint32_t)spi_event);
+ return (uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
}
__STATIC_INLINE void nrf_spi_int_enable(NRF_SPI_Type * p_reg,
- uint32_t spi_int_mask)
+ uint32_t mask)
{
- p_reg->INTENSET = spi_int_mask;
+ p_reg->INTENSET = mask;
}
__STATIC_INLINE void nrf_spi_int_disable(NRF_SPI_Type * p_reg,
- uint32_t spi_int_mask)
+ uint32_t mask)
{
- p_reg->INTENCLR = spi_int_mask;
+ p_reg->INTENCLR = mask;
}
-__STATIC_INLINE bool nrf_spi_int_enable_check(NRF_SPI_Type * p_reg,
+__STATIC_INLINE bool nrf_spi_int_enable_check(NRF_SPI_Type * p_reg,
nrf_spi_int_mask_t spi_int)
{
return (bool)(p_reg->INTENSET & spi_int);
@@ -292,9 +280,9 @@
}
__STATIC_INLINE void nrf_spi_pins_set(NRF_SPI_Type * p_reg,
- uint32_t sck_pin,
- uint32_t mosi_pin,
- uint32_t miso_pin)
+ uint32_t sck_pin,
+ uint32_t mosi_pin,
+ uint32_t miso_pin)
{
#if defined(SPI_PSEL_SCK_CONNECT_Pos)
p_reg->PSEL.SCK = sck_pin;
@@ -325,14 +313,14 @@
return p_reg->RXD;
}
-__STATIC_INLINE void nrf_spi_frequency_set(NRF_SPI_Type * p_reg,
+__STATIC_INLINE void nrf_spi_frequency_set(NRF_SPI_Type * p_reg,
nrf_spi_frequency_t frequency)
{
p_reg->FREQUENCY = frequency;
}
-__STATIC_INLINE void nrf_spi_configure(NRF_SPI_Type * p_reg,
- nrf_spi_mode_t spi_mode,
+__STATIC_INLINE void nrf_spi_configure(NRF_SPI_Type * p_reg,
+ nrf_spi_mode_t spi_mode,
nrf_spi_bit_order_t spi_bit_order)
{
uint32_t config = (spi_bit_order == NRF_SPI_BIT_ORDER_MSB_FIRST ?
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_spim.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_spim.h
index d49cb94..261f64f 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_spim.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_spim.h
@@ -63,37 +63,31 @@
#define NRF_SPIM_DCX_CNT_ALL_CMD 0xF
#endif
+/** @brief Macro for checking if the hardware chip select function is available. */
#define NRF_SPIM_HW_CSN_PRESENT \
(NRFX_CHECK(SPIM0_FEATURE_HARDWARE_CSN_PRESENT) || \
NRFX_CHECK(SPIM1_FEATURE_HARDWARE_CSN_PRESENT) || \
NRFX_CHECK(SPIM2_FEATURE_HARDWARE_CSN_PRESENT) || \
NRFX_CHECK(SPIM3_FEATURE_HARDWARE_CSN_PRESENT))
-/**
- * @brief SPIM tasks.
- */
+
+/** @brief SPIM tasks. */
typedef enum
{
- /*lint -save -e30*/
NRF_SPIM_TASK_START = offsetof(NRF_SPIM_Type, TASKS_START), ///< Start SPI transaction.
NRF_SPIM_TASK_STOP = offsetof(NRF_SPIM_Type, TASKS_STOP), ///< Stop SPI transaction.
NRF_SPIM_TASK_SUSPEND = offsetof(NRF_SPIM_Type, TASKS_SUSPEND), ///< Suspend SPI transaction.
NRF_SPIM_TASK_RESUME = offsetof(NRF_SPIM_Type, TASKS_RESUME) ///< Resume SPI transaction.
- /*lint -restore*/
} nrf_spim_task_t;
-/**
- * @brief SPIM events.
- */
+/** @brief SPIM events. */
typedef enum
{
- /*lint -save -e30*/
NRF_SPIM_EVENT_STOPPED = offsetof(NRF_SPIM_Type, EVENTS_STOPPED), ///< SPI transaction has stopped.
NRF_SPIM_EVENT_ENDRX = offsetof(NRF_SPIM_Type, EVENTS_ENDRX), ///< End of RXD buffer reached.
NRF_SPIM_EVENT_END = offsetof(NRF_SPIM_Type, EVENTS_END), ///< End of RXD buffer and TXD buffer reached.
NRF_SPIM_EVENT_ENDTX = offsetof(NRF_SPIM_Type, EVENTS_ENDTX), ///< End of TXD buffer reached.
NRF_SPIM_EVENT_STARTED = offsetof(NRF_SPIM_Type, EVENTS_STARTED) ///< Transaction started.
- /*lint -restore*/
} nrf_spim_event_t;
/**
@@ -105,9 +99,7 @@
NRF_SPIM_ALL_SHORTS_MASK = SPIM_SHORTS_END_START_Msk ///< All SPIM shortcuts.
} nrf_spim_short_mask_t;
-/**
- * @brief SPIM interrupts.
- */
+/** @brief SPIM interrupts. */
typedef enum
{
NRF_SPIM_INT_STOPPED_MASK = SPIM_INTENSET_STOPPED_Msk, ///< Interrupt on STOPPED event.
@@ -122,9 +114,7 @@
SPIM_INTENSET_STARTED_Msk ///< All SPIM interrupts.
} nrf_spim_int_mask_t;
-/**
- * @brief SPI master data rates.
- */
+/** @brief SPI master data rates. */
typedef enum
{
NRF_SPIM_FREQ_125K = SPIM_FREQUENCY_FREQUENCY_K125, ///< 125 kbps.
@@ -144,9 +134,7 @@
#endif
} nrf_spim_frequency_t;
-/**
- * @brief SPI modes.
- */
+/** @brief SPI modes. */
typedef enum
{
NRF_SPIM_MODE_0, ///< SCK active high, sample on leading edge of clock.
@@ -155,9 +143,7 @@
NRF_SPIM_MODE_3 ///< SCK active low, sample on trailing edge of clock.
} nrf_spim_mode_t;
-/**
- * @brief SPI bit orders.
- */
+/** @brief SPI bit orders. */
typedef enum
{
NRF_SPIM_BIT_ORDER_MSB_FIRST = SPIM_CONFIG_ORDER_MsbFirst, ///< Most significant bit shifted out first.
@@ -165,9 +151,7 @@
} nrf_spim_bit_order_t;
#if (NRF_SPIM_HW_CSN_PRESENT) || defined(__NRFX_DOXYGEN__)
-/**
- * @brief SPI CSN pin polarity.
- */
+/** @brief SPI CSN pin polarity. */
typedef enum
{
NRF_SPIM_CSN_POL_LOW = SPIM_CSNPOL_CSNPOL_LOW, ///< Active low (idle state high).
@@ -175,110 +159,113 @@
} nrf_spim_csn_pol_t;
#endif // (NRF_SPIM_HW_CSN_PRESENT) || defined(__NRFX_DOXYGEN__)
-/**
- * @brief Function for activating a specific SPIM task.
- *
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spim_task Task to activate.
- */
-__STATIC_INLINE void nrf_spim_task_trigger(NRF_SPIM_Type * p_reg,
- nrf_spim_task_t spim_task);
/**
- * @brief Function for getting the address of a specific SPIM task register.
+ * @brief Function for activating the specified SPIM task.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spim_task Requested task.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] task Task to be activated.
+ */
+__STATIC_INLINE void nrf_spim_task_trigger(NRF_SPIM_Type * p_reg,
+ nrf_spim_task_t task);
+
+/**
+ * @brief Function for getting the address of the specified SPIM task register.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] task The specified task.
*
* @return Address of the specified task register.
*/
__STATIC_INLINE uint32_t nrf_spim_task_address_get(NRF_SPIM_Type * p_reg,
- nrf_spim_task_t spim_task);
+ nrf_spim_task_t task);
/**
- * @brief Function for clearing a specific SPIM event.
+ * @brief Function for clearing the specified SPIM event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spim_event Event to clear.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to be cleared.
*/
-__STATIC_INLINE void nrf_spim_event_clear(NRF_SPIM_Type * p_reg,
- nrf_spim_event_t spim_event);
+__STATIC_INLINE void nrf_spim_event_clear(NRF_SPIM_Type * p_reg,
+ nrf_spim_event_t event);
/**
- * @brief Function for checking the state of a specific SPIM event.
+ * @brief Function for retrieving the state of the SPIM event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spim_event Event to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to be checked.
*
- * @retval true If the event is set.
- * @retval false If the event is not set.
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
-__STATIC_INLINE bool nrf_spim_event_check(NRF_SPIM_Type * p_reg,
- nrf_spim_event_t spim_event);
+__STATIC_INLINE bool nrf_spim_event_check(NRF_SPIM_Type * p_reg,
+ nrf_spim_event_t event);
/**
- * @brief Function for getting the address of a specific SPIM event register.
+ * @brief Function for getting the address of the specified SPIM event register.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spim_event Requested event.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event The specified event.
*
* @return Address of the specified event register.
*/
__STATIC_INLINE uint32_t nrf_spim_event_address_get(NRF_SPIM_Type * p_reg,
- nrf_spim_event_t spim_event);
+ nrf_spim_event_t event);
/**
- * @brief Function for enabling specified shortcuts.
+ * @brief Function for enabling the specified shortcuts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spim_shorts_mask Shortcuts to enable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Shortcuts to be enabled.
*/
__STATIC_INLINE void nrf_spim_shorts_enable(NRF_SPIM_Type * p_reg,
- uint32_t spim_shorts_mask);
+ uint32_t mask);
/**
- * @brief Function for disabling specified shortcuts.
+ * @brief Function for disabling the specified shortcuts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spim_shorts_mask Shortcuts to disable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Shortcuts to be disabled.
*/
__STATIC_INLINE void nrf_spim_shorts_disable(NRF_SPIM_Type * p_reg,
- uint32_t spim_shorts_mask);
+ uint32_t mask);
/**
- * @brief Function for getting shorts setting.
+ * @brief Function for getting the shortcut setting.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @return Current shortcut configuration.
*/
__STATIC_INLINE uint32_t nrf_spim_shorts_get(NRF_SPIM_Type * p_reg);
/**
- * @brief Function for enabling specified interrupts.
+ * @brief Function for enabling the specified interrupts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spim_int_mask Interrupts to enable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_spim_int_enable(NRF_SPIM_Type * p_reg,
- uint32_t spim_int_mask);
+ uint32_t mask);
/**
- * @brief Function for disabling specified interrupts.
+ * @brief Function for disabling the specified interrupts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spim_int_mask Interrupts to disable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_spim_int_disable(NRF_SPIM_Type * p_reg,
- uint32_t spim_int_mask);
+ uint32_t mask);
/**
* @brief Function for retrieving the state of a given interrupt.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spim_int Interrupt to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] spim_int Interrupt to be checked.
*
- * @retval true If the interrupt is enabled.
- * @retval false If the interrupt is not enabled.
+ * @retval true The interrupt is enabled.
+ * @retval false The interrupt is not enabled.
*/
-__STATIC_INLINE bool nrf_spim_int_enable_check(NRF_SPIM_Type * p_reg,
+__STATIC_INLINE bool nrf_spim_int_enable_check(NRF_SPIM_Type * p_reg,
nrf_spim_int_mask_t spim_int);
#if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
@@ -314,7 +301,7 @@
*/
__STATIC_INLINE void nrf_spim_publish_set(NRF_SPIM_Type * p_reg,
nrf_spim_event_t event,
- uint8_t channel);
+ uint8_t channel);
/**
* @brief Function for clearing the publish configuration for a given
@@ -330,14 +317,14 @@
/**
* @brief Function for enabling the SPIM peripheral.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_spim_enable(NRF_SPIM_Type * p_reg);
/**
* @brief Function for disabling the SPIM peripheral.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_spim_disable(NRF_SPIM_Type * p_reg);
@@ -347,15 +334,15 @@
* If a given signal is not needed, pass the @ref NRF_SPIM_PIN_NOT_CONNECTED
* value instead of its pin number.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] sck_pin SCK pin number.
* @param[in] mosi_pin MOSI pin number.
* @param[in] miso_pin MISO pin number.
*/
__STATIC_INLINE void nrf_spim_pins_set(NRF_SPIM_Type * p_reg,
- uint32_t sck_pin,
- uint32_t mosi_pin,
- uint32_t miso_pin);
+ uint32_t sck_pin,
+ uint32_t mosi_pin,
+ uint32_t miso_pin);
#if (NRF_SPIM_HW_CSN_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
@@ -364,17 +351,17 @@
* If this signal is not needed, pass the @ref NRF_SPIM_PIN_NOT_CONNECTED
* value instead of its pin number.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] pin CSN pin number.
* @param[in] polarity CSN pin polarity.
* @param[in] duration Minimum duration between the edge of CSN and the edge of SCK
* and minimum duration of CSN must stay unselected between transactions.
* The value is specified in number of 64 MHz clock cycles (15.625 ns).
*/
-__STATIC_INLINE void nrf_spim_csn_configure(NRF_SPIM_Type * p_reg,
- uint32_t pin,
+__STATIC_INLINE void nrf_spim_csn_configure(NRF_SPIM_Type * p_reg,
+ uint32_t pin,
nrf_spim_csn_pol_t polarity,
- uint32_t duration);
+ uint32_t duration);
#endif // (NRF_SPIM_HW_CSN_PRESENT) || defined(__NRFX_DOXYGEN__)
#if defined(SPIM_PSELDCX_CONNECT_Msk) || defined(__NRFX_DOXYGEN__)
@@ -384,11 +371,11 @@
* If this signal is not needed, pass the @ref NRF_SPIM_PIN_NOT_CONNECTED
* value instead of its pin number.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] dcx_pin DCX pin number.
*/
__STATIC_INLINE void nrf_spim_dcx_pin_set(NRF_SPIM_Type * p_reg,
- uint32_t dcx_pin);
+ uint32_t dcx_pin);
/**
* @brief Function for configuring the number of command bytes.
@@ -398,36 +385,37 @@
* The @ref NRF_SPIM_DCX_CNT_ALL_CMD value passed as the @c count parameter
* causes all transmitted bytes to be marked as command bytes.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] count Number of command bytes preceding the data bytes.
*/
__STATIC_INLINE void nrf_spim_dcx_cnt_set(NRF_SPIM_Type * p_reg,
- uint32_t count);
+ uint32_t count);
#endif // defined(SPIM_PSELDCX_CONNECT_Msk) || defined(__NRFX_DOXYGEN__)
#if defined(SPIM_IFTIMING_RXDELAY_RXDELAY_Msk) || defined(__NRFX_DOXYGEN__)
/**
* @brief Function for configuring the extended SPIM interface.
- * @param p_reg Pointer to the peripheral registers structure.
+ *
+ * @param p_reg Pointer to the structure of registers of the peripheral.
* @param rxdelay Sample delay for input serial data on MISO,
* specified in 64 MHz clock cycles (15.625 ns) from the sampling edge of SCK.
*/
__STATIC_INLINE void nrf_spim_iftiming_set(NRF_SPIM_Type * p_reg,
- uint32_t rxdelay);
+ uint32_t rxdelay);
#endif // defined(SPIM_IFTIMING_RXDELAY_RXDELAY_Msk) || defined(__NRFX_DOXYGEN__)
#if defined(SPIM_STALLSTAT_RX_Msk) || defined(__NRFX_DOXYGEN__)
/**
* @brief Function for clearing stall status for RX EasyDMA RAM accesses.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_spim_stallstat_rx_clear(NRF_SPIM_Type * p_reg);
/**
* @brief Function for getting stall status for RX EasyDMA RAM accesses.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
*
* @return Stall status of RX EasyDMA RAM accesses.
*/
@@ -438,14 +426,14 @@
/**
* @brief Function for clearing stall status for TX EasyDMA RAM accesses.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_spim_stallstat_tx_clear(NRF_SPIM_Type * p_reg);
/**
* @brief Function for getting stall status for TX EasyDMA RAM accesses.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
*
* @return Stall status of TX EasyDMA RAM accesses.
*/
@@ -455,16 +443,16 @@
/**
* @brief Function for setting the SPI master data rate.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] frequency SPI frequency.
*/
-__STATIC_INLINE void nrf_spim_frequency_set(NRF_SPIM_Type * p_reg,
+__STATIC_INLINE void nrf_spim_frequency_set(NRF_SPIM_Type * p_reg,
nrf_spim_frequency_t frequency);
/**
* @brief Function for setting the transmit buffer.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_buffer Pointer to the buffer with data to send.
* @param[in] length Maximum number of data bytes to transmit.
*/
@@ -475,109 +463,110 @@
/**
* @brief Function for setting the receive buffer.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_buffer Pointer to the buffer for received data.
* @param[in] length Maximum number of data bytes to receive.
*/
__STATIC_INLINE void nrf_spim_rx_buffer_set(NRF_SPIM_Type * p_reg,
- uint8_t * p_buffer,
- size_t length);
+ uint8_t * p_buffer,
+ size_t length);
/**
* @brief Function for setting the SPI configuration.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] spi_mode SPI mode.
* @param[in] spi_bit_order SPI bit order.
*/
-__STATIC_INLINE void nrf_spim_configure(NRF_SPIM_Type * p_reg,
- nrf_spim_mode_t spi_mode,
+__STATIC_INLINE void nrf_spim_configure(NRF_SPIM_Type * p_reg,
+ nrf_spim_mode_t spi_mode,
nrf_spim_bit_order_t spi_bit_order);
/**
* @brief Function for setting the over-read character.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] orc Over-read character that is clocked out in case of
- * an over-read of the TXD buffer.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] orc Over-read character that is clocked out in case of
+ * an over-read of the TXD buffer.
*/
__STATIC_INLINE void nrf_spim_orc_set(NRF_SPIM_Type * p_reg,
- uint8_t orc);
+ uint8_t orc);
/**
* @brief Function for enabling the TX list feature.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_spim_tx_list_enable(NRF_SPIM_Type * p_reg);
/**
* @brief Function for disabling the TX list feature.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_spim_tx_list_disable(NRF_SPIM_Type * p_reg);
/**
* @brief Function for enabling the RX list feature.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_spim_rx_list_enable(NRF_SPIM_Type * p_reg);
/**
* @brief Function for disabling the RX list feature.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_spim_rx_list_disable(NRF_SPIM_Type * p_reg);
+
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE void nrf_spim_task_trigger(NRF_SPIM_Type * p_reg,
- nrf_spim_task_t spim_task)
+ nrf_spim_task_t task)
{
- *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spim_task)) = 0x1UL;
+ *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
}
__STATIC_INLINE uint32_t nrf_spim_task_address_get(NRF_SPIM_Type * p_reg,
- nrf_spim_task_t spim_task)
+ nrf_spim_task_t task)
{
- return (uint32_t)((uint8_t *)p_reg + (uint32_t)spim_task);
+ return (uint32_t)((uint8_t *)p_reg + (uint32_t)task);
}
-__STATIC_INLINE void nrf_spim_event_clear(NRF_SPIM_Type * p_reg,
- nrf_spim_event_t spim_event)
+__STATIC_INLINE void nrf_spim_event_clear(NRF_SPIM_Type * p_reg,
+ nrf_spim_event_t event)
{
- *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spim_event)) = 0x0UL;
+ *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
#if __CORTEX_M == 0x04
- volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spim_event));
+ volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
(void)dummy;
#endif
}
-__STATIC_INLINE bool nrf_spim_event_check(NRF_SPIM_Type * p_reg,
- nrf_spim_event_t spim_event)
+__STATIC_INLINE bool nrf_spim_event_check(NRF_SPIM_Type * p_reg,
+ nrf_spim_event_t event)
{
- return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spim_event);
+ return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
}
-__STATIC_INLINE uint32_t nrf_spim_event_address_get(NRF_SPIM_Type * p_reg,
- nrf_spim_event_t spim_event)
+__STATIC_INLINE uint32_t nrf_spim_event_address_get(NRF_SPIM_Type * p_reg,
+ nrf_spim_event_t event)
{
- return (uint32_t)((uint8_t *)p_reg + (uint32_t)spim_event);
+ return (uint32_t)((uint8_t *)p_reg + (uint32_t)event);
}
__STATIC_INLINE void nrf_spim_shorts_enable(NRF_SPIM_Type * p_reg,
- uint32_t spim_shorts_mask)
+ uint32_t mask)
{
- p_reg->SHORTS |= spim_shorts_mask;
+ p_reg->SHORTS |= mask;
}
__STATIC_INLINE void nrf_spim_shorts_disable(NRF_SPIM_Type * p_reg,
- uint32_t spim_shorts_mask)
+ uint32_t mask)
{
- p_reg->SHORTS &= ~(spim_shorts_mask);
+ p_reg->SHORTS &= ~(mask);
}
__STATIC_INLINE uint32_t nrf_spim_shorts_get(NRF_SPIM_Type * p_reg)
@@ -586,18 +575,18 @@
}
__STATIC_INLINE void nrf_spim_int_enable(NRF_SPIM_Type * p_reg,
- uint32_t spim_int_mask)
+ uint32_t mask)
{
- p_reg->INTENSET = spim_int_mask;
+ p_reg->INTENSET = mask;
}
__STATIC_INLINE void nrf_spim_int_disable(NRF_SPIM_Type * p_reg,
- uint32_t spim_int_mask)
+ uint32_t mask)
{
- p_reg->INTENCLR = spim_int_mask;
+ p_reg->INTENCLR = mask;
}
-__STATIC_INLINE bool nrf_spim_int_enable_check(NRF_SPIM_Type * p_reg,
+__STATIC_INLINE bool nrf_spim_int_enable_check(NRF_SPIM_Type * p_reg,
nrf_spim_int_mask_t spim_int)
{
return (bool)(p_reg->INTENSET & spim_int);
@@ -644,9 +633,9 @@
}
__STATIC_INLINE void nrf_spim_pins_set(NRF_SPIM_Type * p_reg,
- uint32_t sck_pin,
- uint32_t mosi_pin,
- uint32_t miso_pin)
+ uint32_t sck_pin,
+ uint32_t mosi_pin,
+ uint32_t miso_pin)
{
p_reg->PSEL.SCK = sck_pin;
p_reg->PSEL.MOSI = mosi_pin;
@@ -654,10 +643,10 @@
}
#if (NRF_SPIM_HW_CSN_PRESENT)
-__STATIC_INLINE void nrf_spim_csn_configure(NRF_SPIM_Type * p_reg,
- uint32_t pin,
+__STATIC_INLINE void nrf_spim_csn_configure(NRF_SPIM_Type * p_reg,
+ uint32_t pin,
nrf_spim_csn_pol_t polarity,
- uint32_t duration)
+ uint32_t duration)
{
p_reg->PSEL.CSN = pin;
p_reg->CSNPOL = polarity;
@@ -667,13 +656,13 @@
#if defined(SPIM_PSELDCX_CONNECT_Msk)
__STATIC_INLINE void nrf_spim_dcx_pin_set(NRF_SPIM_Type * p_reg,
- uint32_t dcx_pin)
+ uint32_t dcx_pin)
{
p_reg->PSELDCX = dcx_pin;
}
__STATIC_INLINE void nrf_spim_dcx_cnt_set(NRF_SPIM_Type * p_reg,
- uint32_t dcx_cnt)
+ uint32_t dcx_cnt)
{
p_reg->DCXCNT = dcx_cnt;
}
@@ -681,7 +670,7 @@
#if defined(SPIM_IFTIMING_RXDELAY_RXDELAY_Msk)
__STATIC_INLINE void nrf_spim_iftiming_set(NRF_SPIM_Type * p_reg,
- uint32_t rxdelay)
+ uint32_t rxdelay)
{
p_reg->IFTIMING.RXDELAY = rxdelay;
}
@@ -711,10 +700,10 @@
}
#endif // defined(SPIM_STALLSTAT_TX_Msk)
-__STATIC_INLINE void nrf_spim_frequency_set(NRF_SPIM_Type * p_reg,
+__STATIC_INLINE void nrf_spim_frequency_set(NRF_SPIM_Type * p_reg,
nrf_spim_frequency_t frequency)
{
- p_reg->FREQUENCY = frequency;
+ p_reg->FREQUENCY = (uint32_t)frequency;
}
__STATIC_INLINE void nrf_spim_tx_buffer_set(NRF_SPIM_Type * p_reg,
@@ -733,8 +722,8 @@
p_reg->RXD.MAXCNT = length;
}
-__STATIC_INLINE void nrf_spim_configure(NRF_SPIM_Type * p_reg,
- nrf_spim_mode_t spi_mode,
+__STATIC_INLINE void nrf_spim_configure(NRF_SPIM_Type * p_reg,
+ nrf_spim_mode_t spi_mode,
nrf_spim_bit_order_t spi_bit_order)
{
uint32_t config = (spi_bit_order == NRF_SPIM_BIT_ORDER_MSB_FIRST ?
@@ -766,7 +755,7 @@
}
__STATIC_INLINE void nrf_spim_orc_set(NRF_SPIM_Type * p_reg,
- uint8_t orc)
+ uint8_t orc)
{
p_reg->ORC = orc;
}
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_spis.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_spis.h
index 5896bb2..c9578a6 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_spis.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_spis.h
@@ -53,48 +53,34 @@
#define NRF_SPIS_PIN_NOT_CONNECTED 0xFFFFFFFF
-/**
- * @brief SPIS tasks.
- */
+/** @brief SPIS tasks. */
typedef enum
{
- /*lint -save -e30*/
NRF_SPIS_TASK_ACQUIRE = offsetof(NRF_SPIS_Type, TASKS_ACQUIRE), ///< Acquire SPI semaphore.
NRF_SPIS_TASK_RELEASE = offsetof(NRF_SPIS_Type, TASKS_RELEASE), ///< Release SPI semaphore, enabling the SPI slave to acquire it.
- /*lint -restore*/
} nrf_spis_task_t;
-/**
- * @brief SPIS events.
- */
+/** @brief SPIS events. */
typedef enum
{
- /*lint -save -e30*/
NRF_SPIS_EVENT_END = offsetof(NRF_SPIS_Type, EVENTS_END), ///< Granted transaction completed.
NRF_SPIS_EVENT_ACQUIRED = offsetof(NRF_SPIS_Type, EVENTS_ACQUIRED) ///< Semaphore acquired.
- /*lint -restore*/
} nrf_spis_event_t;
-/**
- * @brief SPIS shortcuts.
- */
+/** @brief SPIS shortcuts. */
typedef enum
{
NRF_SPIS_SHORT_END_ACQUIRE = SPIS_SHORTS_END_ACQUIRE_Msk ///< Shortcut between END event and ACQUIRE task.
} nrf_spis_short_mask_t;
-/**
- * @brief SPIS interrupts.
- */
+/** @brief SPIS interrupts. */
typedef enum
{
NRF_SPIS_INT_END_MASK = SPIS_INTENSET_END_Msk, ///< Interrupt on END event.
NRF_SPIS_INT_ACQUIRED_MASK = SPIS_INTENSET_ACQUIRED_Msk ///< Interrupt on ACQUIRED event.
} nrf_spis_int_mask_t;
-/**
- * @brief SPI modes.
- */
+/** @brief SPI modes. */
typedef enum
{
NRF_SPIS_MODE_0, ///< SCK active high, sample on leading edge of clock.
@@ -103,18 +89,14 @@
NRF_SPIS_MODE_3 ///< SCK active low, sample on trailing edge of clock.
} nrf_spis_mode_t;
-/**
- * @brief SPI bit orders.
- */
+/** @brief SPI bit orders. */
typedef enum
{
NRF_SPIS_BIT_ORDER_MSB_FIRST = SPIS_CONFIG_ORDER_MsbFirst, ///< Most significant bit shifted out first.
NRF_SPIS_BIT_ORDER_LSB_FIRST = SPIS_CONFIG_ORDER_LsbFirst ///< Least significant bit shifted out first.
} nrf_spis_bit_order_t;
-/**
- * @brief SPI semaphore status.
- */
+/** @brief SPI semaphore status. */
typedef enum
{
NRF_SPIS_SEMSTAT_FREE = 0, ///< Semaphore is free.
@@ -123,114 +105,113 @@
NRF_SPIS_SEMSTAT_CPUPENDING = 3 ///< Semaphore is assigned to the SPI, but a handover to the CPU is pending.
} nrf_spis_semstat_t;
-/**
- * @brief SPIS status.
- */
+/** @brief SPIS status. */
typedef enum
{
NRF_SPIS_STATUS_OVERREAD = SPIS_STATUS_OVERREAD_Msk, ///< TX buffer over-read detected and prevented.
NRF_SPIS_STATUS_OVERFLOW = SPIS_STATUS_OVERFLOW_Msk ///< RX buffer overflow detected and prevented.
} nrf_spis_status_mask_t;
-/**
- * @brief Function for activating a specific SPIS task.
- *
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spis_task Task to activate.
- */
-__STATIC_INLINE void nrf_spis_task_trigger(NRF_SPIS_Type * p_reg,
- nrf_spis_task_t spis_task);
/**
- * @brief Function for getting the address of a specific SPIS task register.
+ * @brief Function for activating the specified SPIS task.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spis_task Requested task.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] task Task to be activated.
+ */
+__STATIC_INLINE void nrf_spis_task_trigger(NRF_SPIS_Type * p_reg,
+ nrf_spis_task_t task);
+
+/**
+ * @brief Function for getting the address of the specified SPIS task register.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] task The specified task.
*
* @return Address of the specified task register.
*/
__STATIC_INLINE uint32_t nrf_spis_task_address_get(NRF_SPIS_Type const * p_reg,
- nrf_spis_task_t spis_task);
+ nrf_spis_task_t task);
/**
- * @brief Function for clearing a specific SPIS event.
+ * @brief Function for clearing the specified SPIS event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spis_event Event to clear.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to be cleared.
*/
-__STATIC_INLINE void nrf_spis_event_clear(NRF_SPIS_Type * p_reg,
- nrf_spis_event_t spis_event);
+__STATIC_INLINE void nrf_spis_event_clear(NRF_SPIS_Type * p_reg,
+ nrf_spis_event_t event);
/**
- * @brief Function for checking the state of a specific SPIS event.
+ * @brief Function for retrieving the state of the SPIS event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spis_event Event to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to be checked.
*
- * @retval true If the event is set.
- * @retval false If the event is not set.
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_spis_event_check(NRF_SPIS_Type const * p_reg,
- nrf_spis_event_t spis_event);
+ nrf_spis_event_t event);
/**
- * @brief Function for getting the address of a specific SPIS event register.
+ * @brief Function for getting the address of the specified SPIS event register.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spis_event Requested event.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event The specified event.
*
* @return Address of the specified event register.
*/
__STATIC_INLINE uint32_t nrf_spis_event_address_get(NRF_SPIS_Type const * p_reg,
- nrf_spis_event_t spis_event);
+ nrf_spis_event_t event);
/**
- * @brief Function for enabling specified shortcuts.
+ * @brief Function for enabling the specified shortcuts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spis_shorts_mask Shortcuts to enable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Shortcuts to be enabled.
*/
__STATIC_INLINE void nrf_spis_shorts_enable(NRF_SPIS_Type * p_reg,
- uint32_t spis_shorts_mask);
+ uint32_t mask);
/**
- * @brief Function for disabling specified shortcuts.
+ * @brief Function for disabling the specified shortcuts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spis_shorts_mask Shortcuts to disable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Shortcuts to be disabled.
*/
__STATIC_INLINE void nrf_spis_shorts_disable(NRF_SPIS_Type * p_reg,
- uint32_t spis_shorts_mask);
+ uint32_t mask);
/**
- * @brief Function for enabling specified interrupts.
+ * @brief Function for enabling the specified interrupts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spis_int_mask Interrupts to enable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_spis_int_enable(NRF_SPIS_Type * p_reg,
- uint32_t spis_int_mask);
+ uint32_t mask);
/**
- * @brief Function for disabling specified interrupts.
+ * @brief Function for disabling the specified interrupts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spis_int_mask Interrupts to disable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_spis_int_disable(NRF_SPIS_Type * p_reg,
- uint32_t spis_int_mask);
+ uint32_t mask);
/**
* @brief Function for retrieving the state of a given interrupt.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spis_int Interrupt to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] spis_int Interrupt to be checked.
*
- * @retval true If the interrupt is enabled.
- * @retval false If the interrupt is not enabled.
+ * @retval true The interrupt is enabled.
+ * @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_spis_int_enable_check(NRF_SPIS_Type const * p_reg,
- nrf_spis_int_mask_t spis_int);
+ nrf_spis_int_mask_t spis_int);
#if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
@@ -281,21 +262,21 @@
/**
* @brief Function for enabling the SPIS peripheral.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_spis_enable(NRF_SPIS_Type * p_reg);
/**
* @brief Function for disabling the SPIS peripheral.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_spis_disable(NRF_SPIS_Type * p_reg);
/**
* @brief Function for retrieving the SPIS semaphore status.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @returns Current semaphore status.
*/
@@ -304,7 +285,7 @@
/**
* @brief Function for retrieving the SPIS status.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @returns Current SPIS status.
*/
@@ -316,24 +297,24 @@
* If a given signal is not needed, pass the @ref NRF_SPIS_PIN_NOT_CONNECTED
* value instead of its pin number.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] sck_pin SCK pin number.
- * @param[in] mosi_pin MOSI pin number.
- * @param[in] miso_pin MISO pin number.
- * @param[in] csn_pin CSN pin number.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] sck_pin SCK pin number.
+ * @param[in] mosi_pin MOSI pin number.
+ * @param[in] miso_pin MISO pin number.
+ * @param[in] csn_pin CSN pin number.
*/
__STATIC_INLINE void nrf_spis_pins_set(NRF_SPIS_Type * p_reg,
- uint32_t sck_pin,
- uint32_t mosi_pin,
- uint32_t miso_pin,
- uint32_t csn_pin);
+ uint32_t sck_pin,
+ uint32_t mosi_pin,
+ uint32_t miso_pin,
+ uint32_t csn_pin);
/**
* @brief Function for setting the transmit buffer.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] p_buffer Pointer to the buffer that contains the data to send.
- * @param[in] length Maximum number of data bytes to transmit.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] p_buffer Pointer to the buffer that contains the data to send.
+ * @param[in] length Maximum number of data bytes to transmit.
*/
__STATIC_INLINE void nrf_spis_tx_buffer_set(NRF_SPIS_Type * p_reg,
uint8_t const * p_buffer,
@@ -342,19 +323,19 @@
/**
* @brief Function for setting the receive buffer.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_buffer Pointer to the buffer for received data.
* @param[in] length Maximum number of data bytes to receive.
*/
__STATIC_INLINE void nrf_spis_rx_buffer_set(NRF_SPIS_Type * p_reg,
- uint8_t * p_buffer,
- size_t length);
+ uint8_t * p_buffer,
+ size_t length);
/**
* @brief Function for getting the number of bytes transmitted
* in the last granted transaction.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @returns Number of bytes transmitted.
*/
@@ -364,7 +345,7 @@
* @brief Function for getting the number of bytes received
* in the last granted transaction.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @returns Number of bytes received.
*/
@@ -373,97 +354,97 @@
/**
* @brief Function for setting the SPI configuration.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] spi_mode SPI mode.
* @param[in] spi_bit_order SPI bit order.
*/
-__STATIC_INLINE void nrf_spis_configure(NRF_SPIS_Type * p_reg,
- nrf_spis_mode_t spi_mode,
+__STATIC_INLINE void nrf_spis_configure(NRF_SPIS_Type * p_reg,
+ nrf_spis_mode_t spi_mode,
nrf_spis_bit_order_t spi_bit_order);
/**
* @brief Function for setting the default character.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] def Default character that is clocked out in case of
- * an overflow of the RXD buffer.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] def Default character that is clocked out in case of
+ * an overflow of the RXD buffer.
*/
__STATIC_INLINE void nrf_spis_def_set(NRF_SPIS_Type * p_reg,
- uint8_t def);
+ uint8_t def);
/**
* @brief Function for setting the over-read character.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] orc Over-read character that is clocked out in case of
- * an over-read of the TXD buffer.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] orc Over-read character that is clocked out in case of
+ * an over-read of the TXD buffer.
*/
__STATIC_INLINE void nrf_spis_orc_set(NRF_SPIS_Type * p_reg,
- uint8_t orc);
+ uint8_t orc);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE void nrf_spis_task_trigger(NRF_SPIS_Type * p_reg,
- nrf_spis_task_t spis_task)
+ nrf_spis_task_t task)
{
- *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spis_task)) = 0x1UL;
+ *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
}
__STATIC_INLINE uint32_t nrf_spis_task_address_get(NRF_SPIS_Type const * p_reg,
- nrf_spis_task_t spis_task)
+ nrf_spis_task_t task)
{
- return (uint32_t)p_reg + (uint32_t)spis_task;
+ return (uint32_t)p_reg + (uint32_t)task;
}
__STATIC_INLINE void nrf_spis_event_clear(NRF_SPIS_Type * p_reg,
- nrf_spis_event_t spis_event)
+ nrf_spis_event_t event)
{
- *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spis_event)) = 0x0UL;
+ *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
#if __CORTEX_M == 0x04
- volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spis_event));
+ volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
(void)dummy;
#endif
}
__STATIC_INLINE bool nrf_spis_event_check(NRF_SPIS_Type const * p_reg,
- nrf_spis_event_t spis_event)
+ nrf_spis_event_t event)
{
- return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spis_event);
+ return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
}
__STATIC_INLINE uint32_t nrf_spis_event_address_get(NRF_SPIS_Type const * p_reg,
- nrf_spis_event_t spis_event)
+ nrf_spis_event_t event)
{
- return (uint32_t)p_reg + (uint32_t)spis_event;
+ return (uint32_t)p_reg + (uint32_t)event;
}
__STATIC_INLINE void nrf_spis_shorts_enable(NRF_SPIS_Type * p_reg,
- uint32_t spis_shorts_mask)
+ uint32_t mask)
{
- p_reg->SHORTS |= spis_shorts_mask;
+ p_reg->SHORTS |= mask;
}
__STATIC_INLINE void nrf_spis_shorts_disable(NRF_SPIS_Type * p_reg,
- uint32_t spis_shorts_mask)
+ uint32_t mask)
{
- p_reg->SHORTS &= ~(spis_shorts_mask);
+ p_reg->SHORTS &= ~(mask);
}
__STATIC_INLINE void nrf_spis_int_enable(NRF_SPIS_Type * p_reg,
- uint32_t spis_int_mask)
+ uint32_t mask)
{
- p_reg->INTENSET = spis_int_mask;
+ p_reg->INTENSET = mask;
}
__STATIC_INLINE void nrf_spis_int_disable(NRF_SPIS_Type * p_reg,
- uint32_t spis_int_mask)
+ uint32_t mask)
{
- p_reg->INTENCLR = spis_int_mask;
+ p_reg->INTENCLR = mask;
}
__STATIC_INLINE bool nrf_spis_int_enable_check(NRF_SPIS_Type const * p_reg,
- nrf_spis_int_mask_t spis_int)
+ nrf_spis_int_mask_t spis_int)
{
return (bool)(p_reg->INTENSET & spis_int);
}
@@ -471,7 +452,7 @@
#if defined(DPPI_PRESENT)
__STATIC_INLINE void nrf_spis_subscribe_set(NRF_SPIS_Type * p_reg,
nrf_spis_task_t task,
- uint8_t channel)
+ uint8_t channel)
{
*((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) =
((uint32_t)channel | SPIS_SUBSCRIBE_ACQUIRE_EN_Msk);
@@ -485,7 +466,7 @@
__STATIC_INLINE void nrf_spis_publish_set(NRF_SPIS_Type * p_reg,
nrf_spis_event_t event,
- uint8_t channel)
+ uint8_t channel)
{
*((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) =
((uint32_t)channel | SPIS_PUBLISH_END_EN_Msk);
@@ -520,10 +501,10 @@
}
__STATIC_INLINE void nrf_spis_pins_set(NRF_SPIS_Type * p_reg,
- uint32_t sck_pin,
- uint32_t mosi_pin,
- uint32_t miso_pin,
- uint32_t csn_pin)
+ uint32_t sck_pin,
+ uint32_t mosi_pin,
+ uint32_t miso_pin,
+ uint32_t csn_pin)
{
#if defined (NRF51)
p_reg->PSELSCK = sck_pin;
@@ -552,8 +533,8 @@
}
__STATIC_INLINE void nrf_spis_rx_buffer_set(NRF_SPIS_Type * p_reg,
- uint8_t * p_buffer,
- size_t length)
+ uint8_t * p_buffer,
+ size_t length)
{
#if defined (NRF51)
p_reg->RXDPTR = (uint32_t)p_buffer;
@@ -582,8 +563,8 @@
#endif
}
-__STATIC_INLINE void nrf_spis_configure(NRF_SPIS_Type * p_reg,
- nrf_spis_mode_t spi_mode,
+__STATIC_INLINE void nrf_spis_configure(NRF_SPIS_Type * p_reg,
+ nrf_spis_mode_t spi_mode,
nrf_spis_bit_order_t spi_bit_order)
{
uint32_t config = (spi_bit_order == NRF_SPIS_BIT_ORDER_MSB_FIRST ?
@@ -616,13 +597,13 @@
}
__STATIC_INLINE void nrf_spis_orc_set(NRF_SPIS_Type * p_reg,
- uint8_t orc)
+ uint8_t orc)
{
p_reg->ORC = orc;
}
__STATIC_INLINE void nrf_spis_def_set(NRF_SPIS_Type * p_reg,
- uint8_t def)
+ uint8_t def)
{
p_reg->DEF = def;
}
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_spu.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_spu.h
index e188e07..823dedb 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_spu.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_spu.h
@@ -86,20 +86,20 @@
/**
* @brief Function for clearing a specific SPU event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to clear.
*/
__STATIC_INLINE void nrf_spu_event_clear(NRF_SPU_Type * p_reg,
nrf_spu_event_t event);
/**
- * @brief Function for checking the state of a specific SPU event.
+ * @brief Function for retrieving the state of the SPU event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] event Event to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to be checked.
*
- * @retval true If the event is set.
- * @retval false If the event is not set.
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_spu_event_check(NRF_SPU_Type const * p_reg,
nrf_spu_event_t event);
@@ -107,8 +107,8 @@
/**
* @brief Function for enabling specified interrupts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] mask Interrupts to enable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Interrupts to be enabled.
*/
__STATIC_INLINE void nrf_spu_int_enable(NRF_SPU_Type * p_reg,
uint32_t mask);
@@ -116,8 +116,8 @@
/**
* @brief Function for disabling specified interrupts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] mask Interrupts to disable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Interrupts to be disabled.
*/
__STATIC_INLINE void nrf_spu_int_disable(NRF_SPU_Type * p_reg,
uint32_t mask);
@@ -125,11 +125,11 @@
/**
* @brief Function for retrieving the state of a given interrupt.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] spu_int Interrupt to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] spu_int Interrupt to be checked.
*
- * @retval true If the interrupt is enabled.
- * @retval false If the interrupt is not enabled.
+ * @retval true The interrupt is enabled.
+ * @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_spu_int_enable_check(NRF_SPU_Type const * p_reg,
uint32_t spu_int);
@@ -137,7 +137,7 @@
/**
* @brief Function for setting up publication configuration of a given SPU event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to configure.
* @param[in] channel Channel to connect with published event.
*/
@@ -148,7 +148,7 @@
/**
* @brief Function for clearing publication configuration of a given SPU event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to clear.
*/
__STATIC_INLINE void nrf_spu_publish_clear(NRF_SPU_Type * p_reg,
@@ -157,10 +157,10 @@
/**
* @brief Function for retrieving the capabilities of the current device.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
- * @retval true If ARM TrustZone support is available.
- * @retval false If ARM TrustZone support is not available.
+ * @retval true ARM TrustZone support is available.
+ * @retval false ARM TrustZone support is not available.
*/
__STATIC_INLINE bool nrf_spu_tz_is_available(NRF_SPU_Type const * p_reg);
@@ -170,7 +170,7 @@
* Channels are configured as bitmask. Set one in bitmask to make channels available only in secure
* domain. Set zero to make it available in secure and non-secure domains.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] dppi_id DPPI peripheral id.
* @param[in] channels_mask Bitmask with channels configuration.
* @param[in] lock_conf Lock configuration until next SoC reset.
@@ -186,7 +186,7 @@
* GPIO pins are configured as bitmask. Set one in bitmask to make particular pin available only
* in secure domain. Set zero to make it available in secure and non-secure domains.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] gpio_port Port number.
* @param[in] gpio_mask Bitmask with gpio configuration.
* @param[in] lock_conf Lock configuration until next SoC reset.
@@ -199,7 +199,7 @@
/**
* @brief Function for configuring non-secure callable flash region.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] flash_nsc_id Non-secure callable flash region ID.
* @param[in] flash_nsc_size Non-secure callable flash region size.
* @param[in] region_number Flash region number.
@@ -214,7 +214,7 @@
/**
* @brief Function for configuring non-secure callable RAM region.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] ram_nsc_id Non-secure callable RAM region ID.
* @param[in] ram_nsc_size Non-secure callable RAM region size.
* @param[in] region_number RAM region number.
@@ -231,7 +231,7 @@
*
* Permissions parameter must be set by using the logical OR on the @ref nrf_spu_mem_perm_t values.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] region_id Flash region index.
* @param[in] secure_attr Set region attribute to secure.
* @param[in] permissions Flash region permissions.
@@ -248,7 +248,7 @@
*
* Permissions parameter must be set by using the logical OR on the @ref nrf_spu_mem_perm_t values.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] region_id RAM region index.
* @param[in] secure_attr Set region attribute to secure.
* @param[in] permissions RAM region permissions.
@@ -263,7 +263,7 @@
/**
* @brief Function for configuring access permissions of the peripheral.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] peripheral_id ID number of a particular peripheral.
* @param[in] secure_attr Peripheral registers accessible only from secure domain.
* @param[in] secure_dma DMA transfers possible only from RAM memory in secure domain.
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_systick.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_systick.h
index d99e614..9b13858 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_systick.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_systick.h
@@ -42,18 +42,18 @@
* @defgroup nrf_systick_hal SYSTICK HAL
* @{
* @ingroup nrf_systick
- * @brief Hardware access layer for managing the SYSTICK peripheral.
+ * @brief Hardware access layer (HAL) for managing the SYSTICK peripheral.
*
- * SYSTICK is ARM peripheral, not Nordic design.
- * It means that it has no Nordic-typical interface with Tasks and Events.
+ * SYSTICK is a peripheral designed by ARM.
+ * This means that it does not feature the typical Nordic interface with Tasks and Events.
*
- * Its usage is limited here to implement simple delays.
- * Also keep in mind that this timer would be stopped when CPU is sleeping
+ * Its usage is limited here to the implementation of simple delays.
+ * Moreover, keep in mind that this timer will be stopped when CPU is sleeping
* (WFE/WFI instruction is successfully executed).
*/
/**
- * @brief Mask of usable bits in the SysTick value
+ * @brief Mask of usable bits in the SysTick value.
*/
#define NRF_SYSTICK_VAL_MASK SysTick_VAL_CURRENT_Msk
@@ -80,36 +80,36 @@
} nrf_systick_csr_flags_t;
/**
- * @brief Get Configuration and Status Register
+ * @brief Function for getting Configuration and Status Register.
*
- * @return Values composed by @ref nrf_systick_csr_flags_t.
* @note The @ref NRF_SYSTICK_CSR_COUNTFLAG_MASK value is cleared when CSR register is read.
+ * @return Values composed by @ref nrf_systick_csr_flags_t.
*/
__STATIC_INLINE uint32_t nrf_systick_csr_get(void);
/**
- * @brief Set Configuration and Status Register
+ * @brief Function for setting Configuration and Status Register.
*
* @param[in] val The value composed from @ref nrf_systick_csr_flags_t.
*/
__STATIC_INLINE void nrf_systick_csr_set(uint32_t val);
/**
- * @brief Get the current reload value.
+ * @brief Function for getting the current reload value.
*
* @return The reload register value.
*/
__STATIC_INLINE uint32_t nrf_systick_load_get(void);
/**
- * @brief Configure the reload value.
+ * @brief Function for configuring the reload value.
*
- * @param[in] val The value to set in the reload register.
+ * @param[in] val The value to be set in the reload register.
*/
__STATIC_INLINE void nrf_systick_load_set(uint32_t val);
/**
- * @brief Read the SysTick current value
+ * @brief Function for reading the SysTick current value.
*
* @return The current SysTick value
* @sa NRF_SYSTICK_VAL_MASK
@@ -117,7 +117,7 @@
__STATIC_INLINE uint32_t nrf_systick_val_get(void);
/**
- * @brief Clear the SysTick current value
+ * @brief Function for clearing the SysTick current value.
*
* @note The SysTick does not allow setting current value.
* Any write to VAL register would clear the timer.
@@ -125,14 +125,13 @@
__STATIC_INLINE void nrf_systick_val_clear(void);
/**
- * @brief Read the calibration register
+ * @brief Function for reading the calibration register.
*
- * @return The calibration register value
+ * @return The calibration register value.
*/
__STATIC_INLINE uint32_t nrf_systick_calib_get(void);
-
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE uint32_t nrf_systick_csr_get(void)
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_temp.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_temp.h
index c39c2e0..2fcc699 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_temp.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_temp.h
@@ -39,17 +39,20 @@
#endif
/**
-* @defgroup nrf_temp_hal TEMP HAL
+* @defgroup nrf_temp_hal_deprecated TEMP HAL (deprecated)
* @{
-* @ingroup nrf_temp temperature_example
+* @ingroup nrf_temp
* @brief Temperature module init and read functions.
*/
+/** @brief Workaround specific define - sign mask.*/
#define MASK_SIGN (0x00000200UL)
+
+/** @brief Workaround specific define - sign extension mask.*/
#define MASK_SIGN_EXTENSION (0xFFFFFC00UL)
/**
- * @brief Function for preparing the temp module for temperature measurement.
+ * @brief Function for preparing the TEMP module for temperature measurement.
*
* This function initializes the TEMP module and writes to the hidden configuration register.
*/
@@ -62,18 +65,201 @@
/**
* @brief Function for reading temperature measurement.
*
- * The function reads the 10 bit 2's complement value and transforms it to a 32 bit 2's complement value.
+ * The function reads the 10-bit 2's complement value and transforms it to a 32-bit 2's complement value.
*/
static __INLINE int32_t nrf_temp_read(void)
{
/**@note Workaround for PAN_028 rev2.0A anomaly 28 - TEMP: Negative measured values are not represented correctly */
- return ((NRF_TEMP->TEMP & MASK_SIGN) != 0) ? (int32_t)(NRF_TEMP->TEMP | MASK_SIGN_EXTENSION) : (NRF_TEMP->TEMP);
+ return ((NRF_TEMP->TEMP & MASK_SIGN) != 0) ?
+ (int32_t)(NRF_TEMP->TEMP | MASK_SIGN_EXTENSION) : (NRF_TEMP->TEMP);
}
/** @} */
+/**
+* @defgroup nrf_temp_hal TEMP HAL
+* @{
+* @ingroup nrf_temp
+* @brief Hardware access layer for managing the Temperature sensor (TEMP).
+*/
+
+/** @brief TEMP tasks. */
+typedef enum
+{
+ NRF_TEMP_TASK_START = offsetof(NRF_TEMP_Type, TASKS_START), /**< Start temperature measurement. */
+ NRF_TEMP_TASK_STOP = offsetof(NRF_TEMP_Type, TASKS_STOP) /**< Stop temperature measurement. */
+} nrf_temp_task_t;
+
+/** @brief TEMP events. */
+typedef enum
+{
+ NRF_TEMP_EVENT_DATARDY = offsetof(NRF_TEMP_Type, EVENTS_DATARDY) /**< Temperature measurement complete, data ready. */
+} nrf_temp_event_t;
+
+/** @brief TEMP interrupts. */
+typedef enum
+{
+ NRF_TEMP_INT_DATARDY_MASK = TEMP_INTENSET_DATARDY_Msk /**< Interrupt on DATARDY event. */
+} nrf_temp_int_mask_t;
+
+/**
+ * @brief Function for enabling specified interrupts.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of interrupts to be enabled.
+ */
+__STATIC_INLINE void nrf_temp_int_enable(NRF_TEMP_Type * p_reg, uint32_t mask);
+
+/**
+ * @brief Function for disabling specified interrupts.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of interrupts to be disabled.
+ */
+__STATIC_INLINE void nrf_temp_int_disable(NRF_TEMP_Type * p_reg, uint32_t mask);
+
+/**
+ * @brief Function for retrieving the state of a given interrupt.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] temp_int Interrupt to be checked.
+ *
+ * @retval true The interrupt is enabled.
+ * @retval false The interrupt is not enabled.
+ */
+__STATIC_INLINE bool nrf_temp_int_enable_check(NRF_TEMP_Type const * p_reg,
+ nrf_temp_int_mask_t temp_int);
+
+/**
+ * @brief Function for getting the address of the specified TEMP task register.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] task Requested task.
+ *
+ * @return Address of the requested task register.
+ */
+__STATIC_INLINE uint32_t nrf_temp_task_address_get(NRF_TEMP_Type const * p_reg,
+ nrf_temp_task_t task);
+
+/**
+ * @brief Function for activating the specified TEMP task.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] task Task to be activated.
+ */
+__STATIC_INLINE void nrf_temp_task_trigger(NRF_TEMP_Type * p_reg, nrf_temp_task_t task);
+
+/**
+ * @brief Function for getting the address of the specified TEMP event register.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Requested event.
+ *
+ * @return Address of the requested event register.
+ */
+__STATIC_INLINE uint32_t nrf_temp_event_address_get(NRF_TEMP_Type const * p_reg,
+ nrf_temp_event_t event);
+
+/**
+ * @brief Function for clearing the specified TEMP event.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to clear.
+ */
+__STATIC_INLINE void nrf_temp_event_clear(NRF_TEMP_Type * p_reg, nrf_temp_event_t event);
+
+/**
+ * @brief Function for getting the state of a specific event.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to be checked.
+ *
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
+ */
+__STATIC_INLINE bool nrf_temp_event_check(NRF_TEMP_Type const * p_reg, nrf_temp_event_t event);
+
+/**
+ * @brief Function for getting the result of temperature measurement.
+ *
+ * @note Returned value is in 2's complement format, 0.25 °C steps
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @return Temperature value register contents.
+ */
+__STATIC_INLINE int32_t nrf_temp_result_get(NRF_TEMP_Type const * p_reg);
+
+#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+
+__STATIC_INLINE void nrf_temp_int_enable(NRF_TEMP_Type * p_reg, uint32_t mask)
+{
+ p_reg->INTENSET = mask;
+}
+
+__STATIC_INLINE void nrf_temp_int_disable(NRF_TEMP_Type * p_reg, uint32_t mask)
+{
+ p_reg->INTENCLR = mask;
+}
+
+__STATIC_INLINE bool nrf_temp_int_enable_check(NRF_TEMP_Type const * p_reg,
+ nrf_temp_int_mask_t temp_int)
+{
+ return (bool)(p_reg->INTENSET & temp_int);
+}
+
+__STATIC_INLINE uint32_t nrf_temp_task_address_get(NRF_TEMP_Type const * p_reg,
+ nrf_temp_task_t task)
+{
+ return (uint32_t)((uint8_t *)p_reg + (uint32_t)task);
+}
+
+__STATIC_INLINE void nrf_temp_task_trigger(NRF_TEMP_Type * p_reg, nrf_temp_task_t task)
+{
+ *(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task) = 1;
+}
+
+__STATIC_INLINE uint32_t nrf_temp_event_address_get(NRF_TEMP_Type const * p_reg,
+ nrf_temp_event_t event)
+{
+ return (uint32_t)((uint8_t *)p_reg + (uint32_t)event);
+}
+
+__STATIC_INLINE void nrf_temp_event_clear(NRF_TEMP_Type * p_reg, nrf_temp_event_t event)
+{
+ *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0;
+#if __CORTEX_M == 0x04
+ volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
+ (void)dummy;
+#endif
+}
+
+__STATIC_INLINE bool nrf_temp_event_check(NRF_TEMP_Type const * p_reg, nrf_temp_event_t event)
+{
+ return (bool)*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
+}
+
+__STATIC_INLINE int32_t nrf_temp_result_get(NRF_TEMP_Type const * p_reg)
+{
+ int32_t raw_measurement = p_reg->TEMP;
+
+#if defined(NRF51)
+ /* Apply workaround for the nRF51 series anomaly 28 - TEMP: Negative measured values are not represented correctly. */
+ if ((raw_measurement & 0x00000200) != 0)
+ {
+ raw_measurement |= 0xFFFFFC00UL;
+ }
+#endif
+
+ return raw_measurement;
+}
+
+#endif
+
+/** @} */
+
#ifdef __cplusplus
}
#endif
-#endif
+#endif // NRF_TEMP_H__
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_timer.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_timer.h
index 7f2e7bc..477bb3a 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_timer.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_timer.h
@@ -46,11 +46,23 @@
*/
/**
- * @brief Macro for validating the correctness of the BIT_WIDTH setting.
+ * @brief Macro for getting the maximum bit resolution of the specified timer instance.
+ *
+ * @param[in] id Index of the specified timer instance.
+ *
+ * @retval Maximum bit resolution of the specified timer instance.
*/
-
#define TIMER_MAX_SIZE(id) NRFX_CONCAT_3(TIMER, id, _MAX_SIZE)
+/**
+ * @brief Macro for validating the correctness of the bit width resolution setting.
+ *
+ * @param[in] id Index of the specified timer instance.
+ * @param[in] bit_width Bit width resolution value to be checked.
+ *
+ * @retval true Timer instance supports the specified bit width resolution value.
+ * @retval false Timer instance does not support the specified bit width resolution value.
+ */
#define TIMER_BIT_WIDTH_MAX(id, bit_width) \
(TIMER_MAX_SIZE(id) == 8 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) : \
(TIMER_MAX_SIZE(id) == 16 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) || \
@@ -64,7 +76,16 @@
(bit_width == NRF_TIMER_BIT_WIDTH_32) : \
false))))
-#if TIMER_COUNT > 3
+#if (TIMER_COUNT > 3) || defined(__NRFX_DOXYGEN__)
+/**
+ * @brief Macro for checking correctness of bit width configuration for the specified timer.
+ *
+ * @param[in] p_reg Timer instance register.
+ * @param[in] bit_width Bit width resolution value to be checked.
+ *
+ * @retval true Timer instance supports the specified bit width resolution value.
+ * @retval false Timer instance does not support the specified bit width resolution value.
+ */
#define NRF_TIMER_IS_BIT_WIDTH_VALID(p_reg, bit_width) ( \
((p_reg == NRF_TIMER0) && (TIMER_BIT_WIDTH_MAX(0, bit_width))) \
|| ((p_reg == NRF_TIMER1) && (TIMER_BIT_WIDTH_MAX(1, bit_width))) \
@@ -83,15 +104,15 @@
/**
* @brief Macro for getting the number of capture/compare channels available
* in a given timer instance.
+ *
+ * @param[in] id Index of the specified timer instance.
*/
#define NRF_TIMER_CC_CHANNEL_COUNT(id) NRFX_CONCAT_3(TIMER, id, _CC_NUM)
-/**
- * @brief Timer tasks.
- */
+
+/** @brief Timer tasks. */
typedef enum
{
- /*lint -save -e30 -esym(628,__INTADDR__)*/
NRF_TIMER_TASK_START = offsetof(NRF_TIMER_Type, TASKS_START), ///< Task for starting the timer.
NRF_TIMER_TASK_STOP = offsetof(NRF_TIMER_Type, TASKS_STOP), ///< Task for stopping the timer.
NRF_TIMER_TASK_COUNT = offsetof(NRF_TIMER_Type, TASKS_COUNT), ///< Task for incrementing the timer (in counter mode).
@@ -107,15 +128,11 @@
#if defined(TIMER_INTENSET_COMPARE5_Msk) || defined(__NRFX_DOXYGEN__)
NRF_TIMER_TASK_CAPTURE5 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[5]), ///< Task for capturing the timer value on channel 5.
#endif
- /*lint -restore*/
} nrf_timer_task_t;
-/**
- * @brief Timer events.
- */
+/** @brief Timer events. */
typedef enum
{
- /*lint -save -e30*/
NRF_TIMER_EVENT_COMPARE0 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[0]), ///< Event from compare channel 0.
NRF_TIMER_EVENT_COMPARE1 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[1]), ///< Event from compare channel 1.
NRF_TIMER_EVENT_COMPARE2 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[2]), ///< Event from compare channel 2.
@@ -126,12 +143,9 @@
#if defined(TIMER_INTENSET_COMPARE5_Msk) || defined(__NRFX_DOXYGEN__)
NRF_TIMER_EVENT_COMPARE5 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[5]), ///< Event from compare channel 5.
#endif
- /*lint -restore*/
} nrf_timer_event_t;
-/**
- * @brief Types of timer shortcuts.
- */
+/** @brief Types of timer shortcuts. */
typedef enum
{
NRF_TIMER_SHORT_COMPARE0_STOP_MASK = TIMER_SHORTS_COMPARE0_STOP_Msk, ///< Shortcut for stopping the timer based on compare 0.
@@ -156,9 +170,7 @@
#endif
} nrf_timer_short_mask_t;
-/**
- * @brief Timer modes.
- */
+/** @brief Timer modes. */
typedef enum
{
NRF_TIMER_MODE_TIMER = TIMER_MODE_MODE_Timer, ///< Timer mode: timer.
@@ -168,9 +180,7 @@
#endif
} nrf_timer_mode_t;
-/**
- * @brief Timer bit width.
- */
+/** @brief Timer bit width. */
typedef enum
{
NRF_TIMER_BIT_WIDTH_8 = TIMER_BITMODE_BITMODE_08Bit, ///< Timer bit width 8 bit.
@@ -179,9 +189,7 @@
NRF_TIMER_BIT_WIDTH_32 = TIMER_BITMODE_BITMODE_32Bit ///< Timer bit width 32 bit.
} nrf_timer_bit_width_t;
-/**
- * @brief Timer prescalers.
- */
+/** @brief Timer prescalers. */
typedef enum
{
NRF_TIMER_FREQ_16MHz = 0, ///< Timer frequency 16 MHz.
@@ -196,9 +204,7 @@
NRF_TIMER_FREQ_31250Hz ///< Timer frequency 31250 Hz.
} nrf_timer_frequency_t;
-/**
- * @brief Timer capture/compare channels.
- */
+/** @brief Timer capture/compare channels. */
typedef enum
{
NRF_TIMER_CC_CHANNEL0 = 0, ///< Timer capture/compare channel 0.
@@ -213,9 +219,7 @@
#endif
} nrf_timer_cc_channel_t;
-/**
- * @brief Timer interrupts.
- */
+/** @brief Timer interrupts. */
typedef enum
{
NRF_TIMER_INT_COMPARE0_MASK = TIMER_INTENSET_COMPARE0_Msk, ///< Timer interrupt from compare event on channel 0.
@@ -232,19 +236,19 @@
/**
- * @brief Function for activating a specific timer task.
+ * @brief Function for activating the specified timer task.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] task Task to activate.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_timer_task_trigger(NRF_TIMER_Type * p_reg,
nrf_timer_task_t task);
/**
- * @brief Function for getting the address of a specific timer task register.
+ * @brief Function for getting the address of the specified timer task register.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] task Requested task.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] task The specified task.
*
* @return Address of the specified task register.
*/
@@ -252,84 +256,84 @@
nrf_timer_task_t task);
/**
- * @brief Function for clearing a specific timer event.
+ * @brief Function for clearing the specified timer event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] event Event to clear.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to clear.
*/
-__STATIC_INLINE void nrf_timer_event_clear(NRF_TIMER_Type * p_reg,
+__STATIC_INLINE void nrf_timer_event_clear(NRF_TIMER_Type * p_reg,
nrf_timer_event_t event);
/**
- * @brief Function for checking the state of a specific timer event.
+ * @brief Function for retrieving the state of the TIMER event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] event Event to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to be checked.
*
- * @retval true If the event is set.
- * @retval false If the event is not set.
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
-__STATIC_INLINE bool nrf_timer_event_check(NRF_TIMER_Type * p_reg,
+__STATIC_INLINE bool nrf_timer_event_check(NRF_TIMER_Type * p_reg,
nrf_timer_event_t event);
/**
- * @brief Function for getting the address of a specific timer event register.
+ * @brief Function for getting the address of the specified timer event register.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] event Requested event.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event The specified event.
*
* @return Address of the specified event register.
*/
-__STATIC_INLINE uint32_t * nrf_timer_event_address_get(NRF_TIMER_Type * p_reg,
+__STATIC_INLINE uint32_t * nrf_timer_event_address_get(NRF_TIMER_Type * p_reg,
nrf_timer_event_t event);
/**
- * @brief Function for enabling specified shortcuts.
+ * @brief Function for enabling the specified shortcuts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] timer_shorts_mask Shortcuts to enable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Shortcuts to be enabled.
*/
__STATIC_INLINE void nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg,
- uint32_t timer_shorts_mask);
+ uint32_t mask);
/**
- * @brief Function for disabling specified shortcuts.
+ * @brief Function for disabling the specified shortcuts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] timer_shorts_mask Shortcuts to disable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Shortcuts to be disabled.
*/
__STATIC_INLINE void nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg,
- uint32_t timer_shorts_mask);
+ uint32_t mask);
/**
- * @brief Function for enabling specified interrupts.
+ * @brief Function for enabling the specified interrupts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] timer_int_mask Interrupts to enable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_timer_int_enable(NRF_TIMER_Type * p_reg,
- uint32_t timer_int_mask);
+ uint32_t mask);
/**
- * @brief Function for disabling specified interrupts.
+ * @brief Function for disabling the specified interrupts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] timer_int_mask Interrupts to disable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_timer_int_disable(NRF_TIMER_Type * p_reg,
- uint32_t timer_int_mask);
+ uint32_t mask);
/**
* @brief Function for retrieving the state of a given interrupt.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] timer_int Interrupt to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] timer_int Interrupt to be checked.
*
- * @retval true If the interrupt is enabled.
- * @retval false If the interrupt is not enabled.
+ * @retval true The interrupt is enabled.
+ * @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_timer_int_enable_check(NRF_TIMER_Type * p_reg,
- uint32_t timer_int);
+ uint32_t timer_int);
#if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
@@ -380,8 +384,8 @@
/**
* @brief Function for setting the timer mode.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] mode Timer mode.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mode Timer mode.
*/
__STATIC_INLINE void nrf_timer_mode_set(NRF_TIMER_Type * p_reg,
nrf_timer_mode_t mode);
@@ -389,7 +393,7 @@
/**
* @brief Function for retrieving the timer mode.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Timer mode.
*/
@@ -398,16 +402,16 @@
/**
* @brief Function for setting the timer bit width.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] bit_width Timer bit width.
*/
-__STATIC_INLINE void nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg,
+__STATIC_INLINE void nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg,
nrf_timer_bit_width_t bit_width);
/**
* @brief Function for retrieving the timer bit width.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Timer bit width.
*/
@@ -416,45 +420,45 @@
/**
* @brief Function for setting the timer frequency.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] frequency Timer frequency.
*/
-__STATIC_INLINE void nrf_timer_frequency_set(NRF_TIMER_Type * p_reg,
+__STATIC_INLINE void nrf_timer_frequency_set(NRF_TIMER_Type * p_reg,
nrf_timer_frequency_t frequency);
/**
* @brief Function for retrieving the timer frequency.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Timer frequency.
*/
__STATIC_INLINE nrf_timer_frequency_t nrf_timer_frequency_get(NRF_TIMER_Type * p_reg);
/**
- * @brief Function for writing the capture/compare register for a specified channel.
+ * @brief Function for writing the capture/compare register for the specified channel.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] cc_channel Requested capture/compare channel.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] cc_channel The specified capture/compare channel.
* @param[in] cc_value Value to write to the capture/compare register.
*/
-__STATIC_INLINE void nrf_timer_cc_write(NRF_TIMER_Type * p_reg,
+__STATIC_INLINE void nrf_timer_cc_write(NRF_TIMER_Type * p_reg,
nrf_timer_cc_channel_t cc_channel,
uint32_t cc_value);
/**
* @brief Function for retrieving the capture/compare value for a specified channel.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] cc_channel Requested capture/compare channel.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] cc_channel The specified capture/compare channel.
*
- * @return Value from the requested capture/compare register.
+ * @return Value from the specified capture/compare register.
*/
-__STATIC_INLINE uint32_t nrf_timer_cc_read(NRF_TIMER_Type * p_reg,
+__STATIC_INLINE uint32_t nrf_timer_cc_read(NRF_TIMER_Type * p_reg,
nrf_timer_cc_channel_t cc_channel);
/**
- * @brief Function for getting a specific timer capture task.
+ * @brief Function for getting the specified timer capture task.
*
* @param[in] channel Capture channel.
*
@@ -463,7 +467,7 @@
__STATIC_INLINE nrf_timer_task_t nrf_timer_capture_task_get(uint32_t channel);
/**
- * @brief Function for getting a specific timer compare event.
+ * @brief Function for getting the specified timer compare event.
*
* @param[in] channel Compare channel.
*
@@ -472,7 +476,7 @@
__STATIC_INLINE nrf_timer_event_t nrf_timer_compare_event_get(uint32_t channel);
/**
- * @brief Function for getting a specific timer compare interrupt.
+ * @brief Function for getting the specified timer compare interrupt.
*
* @param[in] channel Compare channel.
*
@@ -489,7 +493,7 @@
*
* @return Number of timer ticks.
*/
-__STATIC_INLINE uint32_t nrf_timer_us_to_ticks(uint32_t time_us,
+__STATIC_INLINE uint32_t nrf_timer_us_to_ticks(uint32_t time_us,
nrf_timer_frequency_t frequency);
/**
@@ -501,7 +505,7 @@
*
* @return Number of timer ticks.
*/
-__STATIC_INLINE uint32_t nrf_timer_ms_to_ticks(uint32_t time_ms,
+__STATIC_INLINE uint32_t nrf_timer_ms_to_ticks(uint32_t time_ms,
nrf_timer_frequency_t frequency);
@@ -542,27 +546,27 @@
}
__STATIC_INLINE void nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg,
- uint32_t timer_shorts_mask)
+ uint32_t mask)
{
- p_reg->SHORTS |= timer_shorts_mask;
+ p_reg->SHORTS |= mask;
}
__STATIC_INLINE void nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg,
- uint32_t timer_shorts_mask)
+ uint32_t mask)
{
- p_reg->SHORTS &= ~(timer_shorts_mask);
+ p_reg->SHORTS &= ~(mask);
}
__STATIC_INLINE void nrf_timer_int_enable(NRF_TIMER_Type * p_reg,
- uint32_t timer_int_mask)
+ uint32_t mask)
{
- p_reg->INTENSET = timer_int_mask;
+ p_reg->INTENSET = mask;
}
__STATIC_INLINE void nrf_timer_int_disable(NRF_TIMER_Type * p_reg,
- uint32_t timer_int_mask)
+ uint32_t mask)
{
- p_reg->INTENCLR = timer_int_mask;
+ p_reg->INTENCLR = mask;
}
__STATIC_INLINE bool nrf_timer_int_enable_check(NRF_TIMER_Type * p_reg,
@@ -654,14 +658,12 @@
__STATIC_INLINE nrf_timer_task_t nrf_timer_capture_task_get(uint32_t channel)
{
- return (nrf_timer_task_t)
- ((uint32_t)NRF_TIMER_TASK_CAPTURE0 + (channel * sizeof(uint32_t)));
+ return (nrf_timer_task_t)NRFX_OFFSETOF(NRF_TIMER_Type, TASKS_CAPTURE[channel]);
}
__STATIC_INLINE nrf_timer_event_t nrf_timer_compare_event_get(uint32_t channel)
{
- return (nrf_timer_event_t)
- ((uint32_t)NRF_TIMER_EVENT_COMPARE0 + (channel * sizeof(uint32_t)));
+ return (nrf_timer_event_t)NRFX_OFFSETOF(NRF_TIMER_Type, EVENTS_COMPARE[channel]);
}
__STATIC_INLINE nrf_timer_int_mask_t nrf_timer_compare_int_get(uint32_t channel)
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_twi.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_twi.h
index d668e3f..81411cb 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_twi.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_twi.h
@@ -45,38 +45,28 @@
* @brief Hardware access layer for managing the TWI peripheral.
*/
-/**
- * @brief TWI tasks.
- */
+/** @brief TWI tasks. */
typedef enum
{
- /*lint -save -e30*/
NRF_TWI_TASK_STARTRX = offsetof(NRF_TWI_Type, TASKS_STARTRX), ///< Start TWI receive sequence.
NRF_TWI_TASK_STARTTX = offsetof(NRF_TWI_Type, TASKS_STARTTX), ///< Start TWI transmit sequence.
NRF_TWI_TASK_STOP = offsetof(NRF_TWI_Type, TASKS_STOP), ///< Stop TWI transaction.
NRF_TWI_TASK_SUSPEND = offsetof(NRF_TWI_Type, TASKS_SUSPEND), ///< Suspend TWI transaction.
NRF_TWI_TASK_RESUME = offsetof(NRF_TWI_Type, TASKS_RESUME) ///< Resume TWI transaction.
- /*lint -restore*/
} nrf_twi_task_t;
-/**
- * @brief TWI events.
- */
+/** @brief TWI events. */
typedef enum
{
- /*lint -save -e30*/
NRF_TWI_EVENT_STOPPED = offsetof(NRF_TWI_Type, EVENTS_STOPPED), ///< TWI stopped.
NRF_TWI_EVENT_RXDREADY = offsetof(NRF_TWI_Type, EVENTS_RXDREADY), ///< TWI RXD byte received.
NRF_TWI_EVENT_TXDSENT = offsetof(NRF_TWI_Type, EVENTS_TXDSENT), ///< TWI TXD byte sent.
NRF_TWI_EVENT_ERROR = offsetof(NRF_TWI_Type, EVENTS_ERROR), ///< TWI error.
NRF_TWI_EVENT_BB = offsetof(NRF_TWI_Type, EVENTS_BB), ///< TWI byte boundary, generated before each byte that is sent or received.
NRF_TWI_EVENT_SUSPENDED = offsetof(NRF_TWI_Type, EVENTS_SUSPENDED) ///< TWI entered the suspended state.
- /*lint -restore*/
} nrf_twi_event_t;
-/**
- * @brief TWI shortcuts.
- */
+/** @brief TWI shortcuts. */
typedef enum
{
NRF_TWI_SHORT_BB_SUSPEND_MASK = TWI_SHORTS_BB_SUSPEND_Msk, ///< Shortcut between BB event and SUSPEND task.
@@ -85,9 +75,7 @@
TWI_SHORTS_BB_STOP_Msk ///< All TWI shortcuts.
} nrf_twi_short_mask_t;
-/**
- * @brief TWI interrupts.
- */
+/** @brief TWI interrupts. */
typedef enum
{
NRF_TWI_INT_STOPPED_MASK = TWI_INTENSET_STOPPED_Msk, ///< Interrupt on STOPPED event.
@@ -104,9 +92,7 @@
TWI_INTENSET_SUSPENDED_Msk ///< All TWI interrupts.
} nrf_twi_int_mask_t;
-/**
- * @brief TWI error source.
- */
+/** @brief TWI error source. */
typedef enum
{
NRF_TWI_ERROR_ADDRESS_NACK = TWI_ERRORSRC_ANACK_Msk, ///< NACK received after sending the address.
@@ -116,9 +102,7 @@
* from the RXD register (previous data is lost). */
} nrf_twi_error_t;
-/**
- * @brief TWI master clock frequency.
- */
+/** @brief TWI master clock frequency. */
typedef enum
{
NRF_TWI_FREQ_100K = TWI_FREQUENCY_FREQUENCY_K100, ///< 100 kbps.
@@ -128,19 +112,19 @@
/**
- * @brief Function for activating a specific TWI task.
+ * @brief Function for activating the specified TWI task.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] task Task to activate.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_twi_task_trigger(NRF_TWI_Type * p_reg,
nrf_twi_task_t task);
/**
- * @brief Function for getting the address of a specific TWI task register.
+ * @brief Function for getting the address of the specified TWI task register.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] task Requested task.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] task The specified task.
*
* @return Address of the specified task register.
*/
@@ -148,31 +132,31 @@
nrf_twi_task_t task);
/**
- * @brief Function for clearing a specific TWI event.
+ * @brief Function for clearing the specified TWI event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to clear.
*/
-__STATIC_INLINE void nrf_twi_event_clear(NRF_TWI_Type * p_reg,
+__STATIC_INLINE void nrf_twi_event_clear(NRF_TWI_Type * p_reg,
nrf_twi_event_t event);
/**
- * @brief Function for checking the state of a specific event.
+ * @brief Function for retrieving the state of the TWI event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] event Event to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to be checked.
*
- * @retval true If the event is set.
- * @retval false If the event is not set.
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_twi_event_check(NRF_TWI_Type * p_reg,
nrf_twi_event_t event);
/**
- * @brief Function for getting the address of a specific TWI event register.
+ * @brief Function for getting the address of the specified TWI event register.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] event Requested event.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event The specified event.
*
* @return Address of the specified event register.
*/
@@ -180,71 +164,71 @@
nrf_twi_event_t event);
/**
- * @brief Function for enabling specified shortcuts.
+ * @brief Function for enabling the specified shortcuts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] shorts_mask Shortcuts to enable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Shortcuts to be enabled.
*/
__STATIC_INLINE void nrf_twi_shorts_enable(NRF_TWI_Type * p_reg,
- uint32_t shorts_mask);
+ uint32_t mask);
/**
- * @brief Function for disabling specified shortcuts.
+ * @brief Function for disabling the specified shortcuts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] shorts_mask Shortcuts to disable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Shortcuts to be disabled.
*/
__STATIC_INLINE void nrf_twi_shorts_disable(NRF_TWI_Type * p_reg,
- uint32_t shorts_mask);
+ uint32_t mask);
/**
- * @brief Function for enabling specified interrupts.
+ * @brief Function for enabling the specified interrupts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] int_mask Interrupts to enable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_twi_int_enable(NRF_TWI_Type * p_reg,
- uint32_t int_mask);
+ uint32_t mask);
/**
- * @brief Function for disabling specified interrupts.
+ * @brief Function for disabling the specified interrupts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] int_mask Interrupts to disable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_twi_int_disable(NRF_TWI_Type * p_reg,
- uint32_t int_mask);
+ uint32_t mask);
/**
* @brief Function for retrieving the state of a given interrupt.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] int_mask Interrupt to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] twi_int Interrupt to be checked.
*
- * @retval true If the interrupt is enabled.
- * @retval false If the interrupt is not enabled.
+ * @retval true The interrupt is enabled.
+ * @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_twi_int_enable_check(NRF_TWI_Type * p_reg,
- nrf_twi_int_mask_t int_mask);
+ nrf_twi_int_mask_t twi_int);
/**
* @brief Function for enabling the TWI peripheral.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_twi_enable(NRF_TWI_Type * p_reg);
/**
* @brief Function for disabling the TWI peripheral.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_twi_disable(NRF_TWI_Type * p_reg);
/**
* @brief Function for configuring TWI pins.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] scl_pin SCL pin number.
* @param[in] sda_pin SDA pin number.
*/
@@ -255,25 +239,25 @@
/**
* @brief Function for retrieving the SCL pin number.
*
- * @param[in] p_reg Pointer to the peripheral registers structure
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
- * @retval pin SCL pin number.
+ * @return SCL pin number.
*/
__STATIC_INLINE uint32_t nrf_twi_scl_pin_get(NRF_TWI_Type * p_reg);
/**
* @brief Function for retrieving the SDA pin number.
*
- * @param[in] p_reg Pointer to the peripheral registers structure
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
- * @retval pin SDA pin number.
+ * @return SDA pin number.
*/
__STATIC_INLINE uint32_t nrf_twi_sda_pin_get(NRF_TWI_Type * p_reg);
/**
* @brief Function for setting the TWI master clock frequency.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] frequency TWI frequency.
*/
__STATIC_INLINE void nrf_twi_frequency_set(NRF_TWI_Type * p_reg,
@@ -284,7 +268,7 @@
*
* The error flags are cleared after reading.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Mask with error source flags.
*/
@@ -293,7 +277,7 @@
/**
* @brief Function for setting the address to be used in TWI transfers.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] address Address to be used in transfers.
*/
__STATIC_INLINE void nrf_twi_address_set(NRF_TWI_Type * p_reg, uint8_t address);
@@ -301,7 +285,7 @@
/**
* @brief Function for reading data received by TWI.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Received data.
*/
@@ -310,13 +294,19 @@
/**
* @brief Function for writing data to be transmitted by TWI.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] data Data to be transmitted.
*/
__STATIC_INLINE void nrf_twi_txd_set(NRF_TWI_Type * p_reg, uint8_t data);
+/**
+ * @brief Function for setting the specified shortcuts.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Shortcuts to be set.
+ */
__STATIC_INLINE void nrf_twi_shorts_set(NRF_TWI_Type * p_reg,
- uint32_t shorts_mask);
+ uint32_t mask);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
@@ -355,33 +345,33 @@
}
__STATIC_INLINE void nrf_twi_shorts_enable(NRF_TWI_Type * p_reg,
- uint32_t shorts_mask)
+ uint32_t mask)
{
- p_reg->SHORTS |= shorts_mask;
+ p_reg->SHORTS |= mask;
}
__STATIC_INLINE void nrf_twi_shorts_disable(NRF_TWI_Type * p_reg,
- uint32_t shorts_mask)
+ uint32_t mask)
{
- p_reg->SHORTS &= ~(shorts_mask);
+ p_reg->SHORTS &= ~(mask);
}
__STATIC_INLINE void nrf_twi_int_enable(NRF_TWI_Type * p_reg,
- uint32_t int_mask)
+ uint32_t mask)
{
- p_reg->INTENSET = int_mask;
+ p_reg->INTENSET = mask;
}
__STATIC_INLINE void nrf_twi_int_disable(NRF_TWI_Type * p_reg,
- uint32_t int_mask)
+ uint32_t mask)
{
- p_reg->INTENCLR = int_mask;
+ p_reg->INTENCLR = mask;
}
__STATIC_INLINE bool nrf_twi_int_enable_check(NRF_TWI_Type * p_reg,
- nrf_twi_int_mask_t int_mask)
+ nrf_twi_int_mask_t twi_int)
{
- return (bool)(p_reg->INTENSET & int_mask);
+ return (bool)(p_reg->INTENSET & twi_int);
}
__STATIC_INLINE void nrf_twi_enable(NRF_TWI_Type * p_reg)
@@ -461,9 +451,9 @@
}
__STATIC_INLINE void nrf_twi_shorts_set(NRF_TWI_Type * p_reg,
- uint32_t shorts_mask)
+ uint32_t mask)
{
- p_reg->SHORTS = shorts_mask;
+ p_reg->SHORTS = mask;
}
#endif // SUPPRESS_INLINE_IMPLEMENTATION
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_twim.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_twim.h
index ffe18f0..437281d 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_twim.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_twim.h
@@ -45,26 +45,19 @@
* @brief Hardware access layer for managing the TWIM peripheral.
*/
-/**
- * @brief TWIM tasks.
- */
+/** @brief TWIM tasks. */
typedef enum
{
- /*lint -save -e30*/
NRF_TWIM_TASK_STARTRX = offsetof(NRF_TWIM_Type, TASKS_STARTRX), ///< Start TWI receive sequence.
NRF_TWIM_TASK_STARTTX = offsetof(NRF_TWIM_Type, TASKS_STARTTX), ///< Start TWI transmit sequence.
NRF_TWIM_TASK_STOP = offsetof(NRF_TWIM_Type, TASKS_STOP), ///< Stop TWI transaction.
NRF_TWIM_TASK_SUSPEND = offsetof(NRF_TWIM_Type, TASKS_SUSPEND), ///< Suspend TWI transaction.
NRF_TWIM_TASK_RESUME = offsetof(NRF_TWIM_Type, TASKS_RESUME) ///< Resume TWI transaction.
- /*lint -restore*/
} nrf_twim_task_t;
-/**
- * @brief TWIM events.
- */
+/** @brief TWIM events. */
typedef enum
{
- /*lint -save -e30*/
NRF_TWIM_EVENT_STOPPED = offsetof(NRF_TWIM_Type, EVENTS_STOPPED), ///< TWI stopped.
NRF_TWIM_EVENT_ERROR = offsetof(NRF_TWIM_Type, EVENTS_ERROR), ///< TWI error.
NRF_TWIM_EVENT_SUSPENDED = 0x148, ///< TWI suspended.
@@ -72,12 +65,9 @@
NRF_TWIM_EVENT_TXSTARTED = offsetof(NRF_TWIM_Type, EVENTS_TXSTARTED), ///< Transmit sequence started.
NRF_TWIM_EVENT_LASTRX = offsetof(NRF_TWIM_Type, EVENTS_LASTRX), ///< Byte boundary, starting to receive the last byte.
NRF_TWIM_EVENT_LASTTX = offsetof(NRF_TWIM_Type, EVENTS_LASTTX) ///< Byte boundary, starting to transmit the last byte.
- /*lint -restore*/
} nrf_twim_event_t;
-/**
- * @brief TWIM shortcuts.
- */
+/** @brief TWIM shortcuts. */
typedef enum
{
NRF_TWIM_SHORT_LASTTX_STARTRX_MASK = TWIM_SHORTS_LASTTX_STARTRX_Msk, ///< Shortcut between LASTTX event and STARTRX task.
@@ -92,9 +82,7 @@
TWIM_SHORTS_LASTRX_STOP_Msk ///< All TWIM shortcuts.
} nrf_twim_short_mask_t;
-/**
- * @brief TWIM interrupts.
- */
+/** @brief TWIM interrupts. */
typedef enum
{
NRF_TWIM_INT_STOPPED_MASK = TWIM_INTENSET_STOPPED_Msk, ///< Interrupt on STOPPED event.
@@ -103,19 +91,17 @@
NRF_TWIM_INT_RXSTARTED_MASK = TWIM_INTENSET_RXSTARTED_Msk, ///< Interrupt on RXSTARTED event.
NRF_TWIM_INT_TXSTARTED_MASK = TWIM_INTENSET_TXSTARTED_Msk, ///< Interrupt on TXSTARTED event.
NRF_TWIM_INT_LASTRX_MASK = TWIM_INTENSET_LASTRX_Msk, ///< Interrupt on LASTRX event.
- NRF_TWIM_INT_LASTTX_MASK = TWIM_INTENSET_LASTTX_Msk, ///< Interrupt on LASTTX event.
+ NRF_TWIM_INT_LASTTX_MASK = TWIM_INTENSET_LASTTX_Msk, ///< Interrupt on LASTTX event.
NRF_TWIM_ALL_INTS_MASK = TWIM_INTENSET_STOPPED_Msk |
TWIM_INTENSET_ERROR_Msk |
TWIM_INTENSET_SUSPENDED_Msk |
TWIM_INTENSET_RXSTARTED_Msk |
TWIM_INTENSET_TXSTARTED_Msk |
TWIM_INTENSET_LASTRX_Msk |
- TWIM_INTENSET_LASTTX_Msk ///< Interrupt on LASTTX event.
+ TWIM_INTENSET_LASTTX_Msk ///< All TWIM interrupts.
} nrf_twim_int_mask_t;
-/**
- * @brief TWIM master clock frequency.
- */
+/** @brief TWIM master clock frequency. */
typedef enum
{
NRF_TWIM_FREQ_100K = TWIM_FREQUENCY_FREQUENCY_K100, ///< 100 kbps.
@@ -123,30 +109,31 @@
NRF_TWIM_FREQ_400K = TWIM_FREQUENCY_FREQUENCY_K400 ///< 400 kbps.
} nrf_twim_frequency_t;
-/**
- * @brief TWIM error source.
- */
+/** @brief TWIM error source. */
typedef enum
{
- NRF_TWIM_ERROR_ADDRESS_NACK = TWIM_ERRORSRC_ANACK_Msk, ///< NACK received after sending the address.
- NRF_TWIM_ERROR_DATA_NACK = TWIM_ERRORSRC_DNACK_Msk ///< NACK received after sending a data byte.
+ NRF_TWIM_ERROR_ADDRESS_NACK = TWIM_ERRORSRC_ANACK_Msk, ///< NACK received after sending the address.
+ NRF_TWIM_ERROR_DATA_NACK = TWIM_ERRORSRC_DNACK_Msk, ///< NACK received after sending a data byte.
+ NRF_TWIM_ERROR_OVERRUN = TWIM_ERRORSRC_OVERRUN_Msk ///< Overrun error.
+ /**< A new byte was received before the previous byte was
+ * handled by peripheral. (previous data is lost). */
} nrf_twim_error_t;
/**
- * @brief Function for activating a specific TWIM task.
+ * @brief Function for activating the specified TWIM task.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] task Task to activate.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_twim_task_trigger(NRF_TWIM_Type * p_reg,
nrf_twim_task_t task);
/**
- * @brief Function for getting the address of a specific TWIM task register.
+ * @brief Function for getting the address of the specified TWIM task register.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] task Requested task.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] task The specified task.
*
* @return Address of the specified task register.
*/
@@ -154,31 +141,31 @@
nrf_twim_task_t task);
/**
- * @brief Function for clearing a specific TWIM event.
+ * @brief Function for clearing the specified TWIM event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] event Event to clear.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to clear.
*/
-__STATIC_INLINE void nrf_twim_event_clear(NRF_TWIM_Type * p_reg,
+__STATIC_INLINE void nrf_twim_event_clear(NRF_TWIM_Type * p_reg,
nrf_twim_event_t event);
/**
- * @brief Function for checking the state of a specific TWIM event.
+ * @brief Function for retrieving the state of the TWIM event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] event Event to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to be checked.
*
- * @retval true If the event is set.
- * @retval false If the event is not set.
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
-__STATIC_INLINE bool nrf_twim_event_check(NRF_TWIM_Type * p_reg,
+__STATIC_INLINE bool nrf_twim_event_check(NRF_TWIM_Type * p_reg,
nrf_twim_event_t event);
/**
- * @brief Function for getting the address of a specific TWIM event register.
+ * @brief Function for getting the address of the specified TWIM event register.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] event Requested event.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event The specified event.
*
* @return Address of the specified event register.
*/
@@ -186,52 +173,52 @@
nrf_twim_event_t event);
/**
- * @brief Function for enabling specified shortcuts.
+ * @brief Function for enabling the specified shortcuts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] shorts_mask Shortcuts to enable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Shortcuts to be enabled.
*/
__STATIC_INLINE void nrf_twim_shorts_enable(NRF_TWIM_Type * p_reg,
- uint32_t shorts_mask);
+ uint32_t mask);
/**
- * @brief Function for disabling specified shortcuts.
+ * @brief Function for disabling the specified shortcuts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] shorts_mask Shortcuts to disable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Shortcuts to be disabled.
*/
__STATIC_INLINE void nrf_twim_shorts_disable(NRF_TWIM_Type * p_reg,
- uint32_t shorts_mask);
+ uint32_t mask);
/**
- * @brief Function for enabling specified interrupts.
+ * @brief Function for enabling the specified interrupts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] int_mask Interrupts to enable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_twim_int_enable(NRF_TWIM_Type * p_reg,
- uint32_t int_mask);
+ uint32_t mask);
/**
- * @brief Function for disabling specified interrupts.
+ * @brief Function for disabling the specified interrupts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] int_mask Interrupts to disable.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_twim_int_disable(NRF_TWIM_Type * p_reg,
- uint32_t int_mask);
+ uint32_t mask);
/**
* @brief Function for checking the state of a given interrupt.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] int_mask Interrupt to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] twim_int Interrupt to be checked.
*
- * @retval true If the interrupt is enabled.
- * @retval false If the interrupt is not enabled.
+ * @retval true The interrupt is enabled.
+ * @retval false The interrupt is not enabled.
*/
-__STATIC_INLINE bool nrf_twim_int_enable_check(NRF_TWIM_Type * p_reg,
- nrf_twim_int_mask_t int_mask);
+__STATIC_INLINE bool nrf_twim_int_enable_check(NRF_TWIM_Type * p_reg,
+ nrf_twim_int_mask_t twim_int);
#if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
@@ -282,36 +269,35 @@
/**
* @brief Function for enabling the TWIM peripheral.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_twim_enable(NRF_TWIM_Type * p_reg);
/**
* @brief Function for disabling the TWIM peripheral.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_twim_disable(NRF_TWIM_Type * p_reg);
/**
* @brief Function for configuring TWI pins.
*
- *
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] scl_pin SCL pin number.
* @param[in] sda_pin SDA pin number.
*/
__STATIC_INLINE void nrf_twim_pins_set(NRF_TWIM_Type * p_reg,
- uint32_t scl_pin,
- uint32_t sda_pin);
+ uint32_t scl_pin,
+ uint32_t sda_pin);
/**
* @brief Function for setting the TWI master clock frequency.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] frequency TWI frequency.
*/
-__STATIC_INLINE void nrf_twim_frequency_set(NRF_TWIM_Type * p_reg,
+__STATIC_INLINE void nrf_twim_frequency_set(NRF_TWIM_Type * p_reg,
nrf_twim_frequency_t frequency);
/**
@@ -319,7 +305,7 @@
*
* The error flags are cleared after reading.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Mask with error source flags.
*/
@@ -328,18 +314,18 @@
/**
* @brief Function for setting the address to be used in TWI transfers.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] address Address to be used in transfers.
*/
__STATIC_INLINE void nrf_twim_address_set(NRF_TWIM_Type * p_reg,
- uint8_t address);
+ uint8_t address);
/**
* @brief Function for setting the transmit buffer.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] p_buffer Pointer to the buffer with data to send.
- * @param[in] length Maximum number of data bytes to transmit.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] p_buffer Pointer to the buffer with data to send.
+ * @param[in] length Maximum number of data bytes to transmit.
*/
__STATIC_INLINE void nrf_twim_tx_buffer_set(NRF_TWIM_Type * p_reg,
uint8_t const * p_buffer,
@@ -348,49 +334,70 @@
/**
* @brief Function for setting the receive buffer.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_buffer Pointer to the buffer for received data.
* @param[in] length Maximum number of data bytes to receive.
*/
__STATIC_INLINE void nrf_twim_rx_buffer_set(NRF_TWIM_Type * p_reg,
- uint8_t * p_buffer,
- size_t length);
+ uint8_t * p_buffer,
+ size_t length);
+/**
+ * @brief Function for setting the specified shortcuts.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Shortcuts to be set.
+ */
__STATIC_INLINE void nrf_twim_shorts_set(NRF_TWIM_Type * p_reg,
- uint32_t shorts_mask);
+ uint32_t mask);
+/**
+ * @brief Function for getting the amount of transmitted bytes.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @return Amount of transmitted bytes.
+ */
__STATIC_INLINE size_t nrf_twim_txd_amount_get(NRF_TWIM_Type * p_reg);
+/**
+ * @brief Function for getting the amount of received bytes.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @return Amount of received bytes.
+ */
__STATIC_INLINE size_t nrf_twim_rxd_amount_get(NRF_TWIM_Type * p_reg);
/**
* @brief Function for enabling the TX list feature.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_twim_tx_list_enable(NRF_TWIM_Type * p_reg);
/**
* @brief Function for disabling the TX list feature.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_twim_tx_list_disable(NRF_TWIM_Type * p_reg);
/**
* @brief Function for enabling the RX list feature.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_twim_rx_list_enable(NRF_TWIM_Type * p_reg);
/**
* @brief Function for disabling the RX list feature.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_twim_rx_list_disable(NRF_TWIM_Type * p_reg);
+
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE void nrf_twim_task_trigger(NRF_TWIM_Type * p_reg,
@@ -428,33 +435,33 @@
}
__STATIC_INLINE void nrf_twim_shorts_enable(NRF_TWIM_Type * p_reg,
- uint32_t shorts_mask)
+ uint32_t mask)
{
- p_reg->SHORTS |= shorts_mask;
+ p_reg->SHORTS |= mask;
}
__STATIC_INLINE void nrf_twim_shorts_disable(NRF_TWIM_Type * p_reg,
- uint32_t shorts_mask)
+ uint32_t mask)
{
- p_reg->SHORTS &= ~(shorts_mask);
+ p_reg->SHORTS &= ~(mask);
}
__STATIC_INLINE void nrf_twim_int_enable(NRF_TWIM_Type * p_reg,
- uint32_t int_mask)
+ uint32_t mask)
{
- p_reg->INTENSET = int_mask;
+ p_reg->INTENSET = mask;
}
__STATIC_INLINE void nrf_twim_int_disable(NRF_TWIM_Type * p_reg,
- uint32_t int_mask)
+ uint32_t mask)
{
- p_reg->INTENCLR = int_mask;
+ p_reg->INTENCLR = mask;
}
__STATIC_INLINE bool nrf_twim_int_enable_check(NRF_TWIM_Type * p_reg,
- nrf_twim_int_mask_t int_mask)
+ nrf_twim_int_mask_t twim_int)
{
- return (bool)(p_reg->INTENSET & int_mask);
+ return (bool)(p_reg->INTENSET & twim_int);
}
#if defined(DPPI_PRESENT)
@@ -544,9 +551,9 @@
}
__STATIC_INLINE void nrf_twim_shorts_set(NRF_TWIM_Type * p_reg,
- uint32_t shorts_mask)
+ uint32_t mask)
{
- p_reg->SHORTS = shorts_mask;
+ p_reg->SHORTS = mask;
}
__STATIC_INLINE size_t nrf_twim_txd_amount_get(NRF_TWIM_Type * p_reg)
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_twis.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_twis.h
index 1b47014..bc9f040 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_twis.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_twis.h
@@ -46,221 +46,200 @@
* (TWIS) peripheral.
*/
-/**
- * @brief TWIS tasks
- */
+/** @brief TWIS tasks. */
typedef enum
{
- /*lint -save -e30*/
- NRF_TWIS_TASK_STOP = offsetof(NRF_TWIS_Type, TASKS_STOP), /**< Stop TWIS transaction */
- NRF_TWIS_TASK_SUSPEND = offsetof(NRF_TWIS_Type, TASKS_SUSPEND), /**< Suspend TWIS transaction */
- NRF_TWIS_TASK_RESUME = offsetof(NRF_TWIS_Type, TASKS_RESUME), /**< Resume TWIS transaction */
- NRF_TWIS_TASK_PREPARERX = offsetof(NRF_TWIS_Type, TASKS_PREPARERX), /**< Prepare the TWIS slave to respond to a write command */
- NRF_TWIS_TASK_PREPARETX = offsetof(NRF_TWIS_Type, TASKS_PREPARETX) /**< Prepare the TWIS slave to respond to a read command */
- /*lint -restore*/
+ NRF_TWIS_TASK_STOP = offsetof(NRF_TWIS_Type, TASKS_STOP), /**< Stop TWIS transaction. */
+ NRF_TWIS_TASK_SUSPEND = offsetof(NRF_TWIS_Type, TASKS_SUSPEND), /**< Suspend TWIS transaction. */
+ NRF_TWIS_TASK_RESUME = offsetof(NRF_TWIS_Type, TASKS_RESUME), /**< Resume TWIS transaction. */
+ NRF_TWIS_TASK_PREPARERX = offsetof(NRF_TWIS_Type, TASKS_PREPARERX), /**< Prepare the TWIS slave to respond to a write command. */
+ NRF_TWIS_TASK_PREPARETX = offsetof(NRF_TWIS_Type, TASKS_PREPARETX) /**< Prepare the TWIS slave to respond to a read command. */
} nrf_twis_task_t;
-/**
- * @brief TWIS events
- */
+/** @brief TWIS events. */
typedef enum
{
- /*lint -save -e30*/
- NRF_TWIS_EVENT_STOPPED = offsetof(NRF_TWIS_Type, EVENTS_STOPPED), /**< TWIS stopped */
- NRF_TWIS_EVENT_ERROR = offsetof(NRF_TWIS_Type, EVENTS_ERROR), /**< TWIS error */
- NRF_TWIS_EVENT_RXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_RXSTARTED), /**< Receive sequence started */
- NRF_TWIS_EVENT_TXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_TXSTARTED), /**< Transmit sequence started */
- NRF_TWIS_EVENT_WRITE = offsetof(NRF_TWIS_Type, EVENTS_WRITE), /**< Write command received */
- NRF_TWIS_EVENT_READ = offsetof(NRF_TWIS_Type, EVENTS_READ) /**< Read command received */
- /*lint -restore*/
+ NRF_TWIS_EVENT_STOPPED = offsetof(NRF_TWIS_Type, EVENTS_STOPPED), /**< TWIS stopped. */
+ NRF_TWIS_EVENT_ERROR = offsetof(NRF_TWIS_Type, EVENTS_ERROR), /**< TWIS error. */
+ NRF_TWIS_EVENT_RXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_RXSTARTED), /**< Receive sequence started. */
+ NRF_TWIS_EVENT_TXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_TXSTARTED), /**< Transmit sequence started. */
+ NRF_TWIS_EVENT_WRITE = offsetof(NRF_TWIS_Type, EVENTS_WRITE), /**< Write command received. */
+ NRF_TWIS_EVENT_READ = offsetof(NRF_TWIS_Type, EVENTS_READ) /**< Read command received. */
} nrf_twis_event_t;
-/**
- * @brief TWIS shortcuts
- */
+/** @brief TWIS shortcuts. */
typedef enum
{
- NRF_TWIS_SHORT_WRITE_SUSPEND_MASK = TWIS_SHORTS_WRITE_SUSPEND_Msk, /**< Shortcut between WRITE event and SUSPEND task */
- NRF_TWIS_SHORT_READ_SUSPEND_MASK = TWIS_SHORTS_READ_SUSPEND_Msk, /**< Shortcut between READ event and SUSPEND task */
+ NRF_TWIS_SHORT_WRITE_SUSPEND_MASK = TWIS_SHORTS_WRITE_SUSPEND_Msk, /**< Shortcut between WRITE event and SUSPEND task. */
+ NRF_TWIS_SHORT_READ_SUSPEND_MASK = TWIS_SHORTS_READ_SUSPEND_Msk, /**< Shortcut between READ event and SUSPEND task. */
} nrf_twis_short_mask_t;
-/**
- * @brief TWIS interrupts
- */
+/** @brief TWIS interrupts. */
typedef enum
{
- NRF_TWIS_INT_STOPPED_MASK = TWIS_INTEN_STOPPED_Msk, /**< Interrupt on STOPPED event */
- NRF_TWIS_INT_ERROR_MASK = TWIS_INTEN_ERROR_Msk, /**< Interrupt on ERROR event */
- NRF_TWIS_INT_RXSTARTED_MASK = TWIS_INTEN_RXSTARTED_Msk, /**< Interrupt on RXSTARTED event */
- NRF_TWIS_INT_TXSTARTED_MASK = TWIS_INTEN_TXSTARTED_Msk, /**< Interrupt on TXSTARTED event */
- NRF_TWIS_INT_WRITE_MASK = TWIS_INTEN_WRITE_Msk, /**< Interrupt on WRITE event */
- NRF_TWIS_INT_READ_MASK = TWIS_INTEN_READ_Msk, /**< Interrupt on READ event */
+ NRF_TWIS_INT_STOPPED_MASK = TWIS_INTEN_STOPPED_Msk, /**< Interrupt on STOPPED event. */
+ NRF_TWIS_INT_ERROR_MASK = TWIS_INTEN_ERROR_Msk, /**< Interrupt on ERROR event. */
+ NRF_TWIS_INT_RXSTARTED_MASK = TWIS_INTEN_RXSTARTED_Msk, /**< Interrupt on RXSTARTED event. */
+ NRF_TWIS_INT_TXSTARTED_MASK = TWIS_INTEN_TXSTARTED_Msk, /**< Interrupt on TXSTARTED event. */
+ NRF_TWIS_INT_WRITE_MASK = TWIS_INTEN_WRITE_Msk, /**< Interrupt on WRITE event. */
+ NRF_TWIS_INT_READ_MASK = TWIS_INTEN_READ_Msk, /**< Interrupt on READ event. */
} nrf_twis_int_mask_t;
-/**
- * @brief TWIS error source
- */
+/** @brief TWIS error source. */
typedef enum
{
- NRF_TWIS_ERROR_OVERFLOW = TWIS_ERRORSRC_OVERFLOW_Msk, /**< RX buffer overflow detected, and prevented */
- NRF_TWIS_ERROR_DATA_NACK = TWIS_ERRORSRC_DNACK_Msk, /**< NACK sent after receiving a data byte */
- NRF_TWIS_ERROR_OVERREAD = TWIS_ERRORSRC_OVERREAD_Msk /**< TX buffer over-read detected, and prevented */
+ NRF_TWIS_ERROR_OVERFLOW = TWIS_ERRORSRC_OVERFLOW_Msk, /**< RX buffer overflow detected, and prevented. */
+ NRF_TWIS_ERROR_DATA_NACK = TWIS_ERRORSRC_DNACK_Msk, /**< NACK sent after receiving a data byte. */
+ NRF_TWIS_ERROR_OVERREAD = TWIS_ERRORSRC_OVERREAD_Msk /**< TX buffer over-read detected, and prevented. */
} nrf_twis_error_t;
-/**
- * @brief TWIS address matching configuration
- */
+/** @brief TWIS address matching configuration. */
typedef enum
{
- NRF_TWIS_CONFIG_ADDRESS0_MASK = TWIS_CONFIG_ADDRESS0_Msk, /**< Enable or disable address matching on ADDRESS[0] */
- NRF_TWIS_CONFIG_ADDRESS1_MASK = TWIS_CONFIG_ADDRESS1_Msk, /**< Enable or disable address matching on ADDRESS[1] */
- NRF_TWIS_CONFIG_ADDRESS01_MASK = TWIS_CONFIG_ADDRESS0_Msk | TWIS_CONFIG_ADDRESS1_Msk /**< Enable both address matching */
+ NRF_TWIS_CONFIG_ADDRESS0_MASK = TWIS_CONFIG_ADDRESS0_Msk, /**< Enable or disable address matching on ADDRESS[0]. */
+ NRF_TWIS_CONFIG_ADDRESS1_MASK = TWIS_CONFIG_ADDRESS1_Msk, /**< Enable or disable address matching on ADDRESS[1]. */
+ NRF_TWIS_CONFIG_ADDRESS01_MASK = TWIS_CONFIG_ADDRESS0_Msk | TWIS_CONFIG_ADDRESS1_Msk /**< Enable both address matching. */
} nrf_twis_config_addr_mask_t;
/**
- * @brief Variable type to hold amount of data for EasyDMA
+ * @brief Variable type to hold the amount of data for EasyDMA.
*
* Variable of the minimum size that can hold the amount of data to transfer.
*
- * @note
- * Defined to make it simple to change if EasyDMA would be updated to support more data in
- * the future devices to.
+ * @note Defined to make it simple to change if EasyDMA is updated to support more data in
+ * the future devices.
*/
typedef uint8_t nrf_twis_amount_t;
/**
- * @brief Smallest variable type to hold TWI address
+ * @brief Smallest variable type to hold the TWI address.
*
- * Variable of the minimum size that can hold single TWI address.
+ * Variable of the minimum size that can hold a single TWI address.
*
- * @note
- * Defined to make it simple to change if new TWI would support for example
- * 10 bit addressing mode.
+ * @note Defined to make it simple to change if the new TWI supports for example
+ * 10 bit addressing mode.
*/
typedef uint8_t nrf_twis_address_t;
/**
- * @brief Function for activating a specific TWIS task.
+ * @brief Function for activating the specified TWIS task.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param task Task.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] task Task to be activated.
*/
-__STATIC_INLINE void nrf_twis_task_trigger(NRF_TWIS_Type * const p_reg, nrf_twis_task_t task);
+__STATIC_INLINE void nrf_twis_task_trigger(NRF_TWIS_Type * p_reg, nrf_twis_task_t task);
/**
- * @brief Function for returning the address of a specific TWIS task register.
+ * @brief Function for returning the address of the specified TWIS task register.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param task Task.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] task The specified task.
*
* @return Task address.
*/
-__STATIC_INLINE uint32_t nrf_twis_task_address_get(
- NRF_TWIS_Type const * const p_reg,
- nrf_twis_task_t task);
+__STATIC_INLINE uint32_t nrf_twis_task_address_get(NRF_TWIS_Type const * p_reg,
+ nrf_twis_task_t task);
/**
- * @brief Function for clearing a specific event.
+ * @brief Function for clearing the specified event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param event Event.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event The specified event.
*/
-__STATIC_INLINE void nrf_twis_event_clear(
- NRF_TWIS_Type * const p_reg,
- nrf_twis_event_t event);
+__STATIC_INLINE void nrf_twis_event_clear(NRF_TWIS_Type * p_reg,
+ nrf_twis_event_t event);
+
/**
- * @brief Function for returning the state of a specific event.
+ * @brief Function for retrieving the state of the TWIS event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param event Event.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to be checked.
*
- * @retval true If the event is set.
- * @retval false If the event is not set.
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
-__STATIC_INLINE bool nrf_twis_event_check(
- NRF_TWIS_Type const * const p_reg,
- nrf_twis_event_t event);
-
+__STATIC_INLINE bool nrf_twis_event_check(NRF_TWIS_Type const * p_reg,
+ nrf_twis_event_t event);
/**
- * @brief Function for getting and clearing the state of specific event
+ * @brief Function for getting and clearing the state of the specified event.
*
* This function checks the state of the event and clears it.
- * @param[in,out] p_reg Pointer to the peripheral registers structure.
- * @param event Event.
*
- * @retval true If the event was set.
- * @retval false If the event was not set.
+ * @param[in,out] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event.
+ *
+ * @retval true The event was set.
+ * @retval false The event was not set.
*/
-__STATIC_INLINE bool nrf_twis_event_get_and_clear(
- NRF_TWIS_Type * const p_reg,
- nrf_twis_event_t event);
-
+__STATIC_INLINE bool nrf_twis_event_get_and_clear(NRF_TWIS_Type * p_reg,
+ nrf_twis_event_t event);
/**
- * @brief Function for returning the address of a specific TWIS event register.
+ * @brief Function for returning the address of the specified TWIS event register.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param event Event.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event.
*
* @return Address.
*/
-__STATIC_INLINE uint32_t nrf_twis_event_address_get(
- NRF_TWIS_Type const * const p_reg,
- nrf_twis_event_t event);
+__STATIC_INLINE uint32_t nrf_twis_event_address_get(NRF_TWIS_Type const * p_reg,
+ nrf_twis_event_t event);
/**
* @brief Function for setting a shortcut.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param short_mask Shortcuts mask.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of shortcuts to be enabled.
*/
-__STATIC_INLINE void nrf_twis_shorts_enable(NRF_TWIS_Type * const p_reg, uint32_t short_mask);
+__STATIC_INLINE void nrf_twis_shorts_enable(NRF_TWIS_Type * p_reg, uint32_t mask);
/**
* @brief Function for clearing shortcuts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param short_mask Shortcuts mask.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of shortcuts to be disabled.
*/
-__STATIC_INLINE void nrf_twis_shorts_disable(NRF_TWIS_Type * const p_reg, uint32_t short_mask);
+__STATIC_INLINE void nrf_twis_shorts_disable(NRF_TWIS_Type * p_reg, uint32_t mask);
/**
- * @brief Get the shorts mask
+ * @brief Function for getting the shorts mask.
*
* Function returns shorts register.
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ *
* @return Flags of currently enabled shortcuts
*/
-__STATIC_INLINE uint32_t nrf_twis_shorts_get(NRF_TWIS_Type * const p_reg);
+__STATIC_INLINE uint32_t nrf_twis_shorts_get(NRF_TWIS_Type const * p_reg);
/**
- * @brief Function for enabling selected interrupts.
+ * @brief Function for enabling the specified interrupts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param int_mask Interrupts mask.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of interrupts to be enabled.
*/
-__STATIC_INLINE void nrf_twis_int_enable(NRF_TWIS_Type * const p_reg, uint32_t int_mask);
+__STATIC_INLINE void nrf_twis_int_enable(NRF_TWIS_Type * p_reg, uint32_t mask);
/**
- * @brief Function for retrieving the state of selected interrupts.
+ * @brief Function for retrieving the state of the specified interrupts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param int_mask Interrupts mask.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of interrupts to be checked.
*
- * @retval true If any of selected interrupts is enabled.
- * @retval false If none of selected interrupts is enabled.
+ * @retval true Any of the specified interrupts is enabled.
+ * @retval false None of the specified interrupts is enabled.
*/
-__STATIC_INLINE bool nrf_twis_int_enable_check(NRF_TWIS_Type const * const p_reg, uint32_t int_mask);
+__STATIC_INLINE bool nrf_twis_int_enable_check(NRF_TWIS_Type const * p_reg, uint32_t mask);
/**
- * @brief Function for disabling selected interrupts.
+ * @brief Function for disabling the specified interrupts.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param int_mask Interrupts mask.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] mask Mask of interrupts to be disabled.
*/
-__STATIC_INLINE void nrf_twis_int_disable(NRF_TWIS_Type * const p_reg, uint32_t int_mask);
+__STATIC_INLINE void nrf_twis_int_disable(NRF_TWIS_Type * p_reg, uint32_t mask);
#if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
@@ -312,177 +291,182 @@
* @brief Function for retrieving and clearing the TWIS error source.
*
* @attention Error sources are cleared after read.
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ *
* @return Error source mask with values from @ref nrf_twis_error_t.
*/
__STATIC_INLINE uint32_t nrf_twis_error_source_get_and_clear(NRF_TWIS_Type * const p_reg);
/**
- * @brief Get information which of addresses matched
+ * @brief Function for getting information about which of the addresses matched.
*
* Function returns index in the address table
* that points to the address that already matched.
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @return Index of matched address
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @return Index of matched address.
*/
__STATIC_INLINE uint_fast8_t nrf_twis_match_get(NRF_TWIS_Type const * p_reg);
/**
* @brief Function for enabling TWIS.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
-__STATIC_INLINE void nrf_twis_enable(NRF_TWIS_Type * const p_reg);
+__STATIC_INLINE void nrf_twis_enable(NRF_TWIS_Type * p_reg);
/**
* @brief Function for disabling TWIS.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
-__STATIC_INLINE void nrf_twis_disable(NRF_TWIS_Type * const p_reg);
+__STATIC_INLINE void nrf_twis_disable(NRF_TWIS_Type * p_reg);
/**
* @brief Function for configuring TWIS pins.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param scl SCL pin number.
- * @param sda SDA pin number.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] scl SCL pin number.
+ * @param[in] sda SDA pin number.
*/
-__STATIC_INLINE void nrf_twis_pins_set(NRF_TWIS_Type * const p_reg, uint32_t scl, uint32_t sda);
+__STATIC_INLINE void nrf_twis_pins_set(NRF_TWIS_Type * p_reg, uint32_t scl, uint32_t sda);
/**
* @brief Function for setting the receive buffer.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param p_buf Pointer to the buffer for received data.
- * @param length Maximum number of data bytes to receive.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] p_buf Pointer to the buffer for received data.
+ * @param[in] length Maximum number of data bytes to receive.
*/
-__STATIC_INLINE void nrf_twis_rx_buffer_set(
- NRF_TWIS_Type * const p_reg,
- uint8_t * p_buf,
- nrf_twis_amount_t length);
+__STATIC_INLINE void nrf_twis_rx_buffer_set(NRF_TWIS_Type * p_reg,
+ uint8_t * p_buf,
+ size_t length);
/**
* @brief Function that prepares TWIS for receiving
*
* This function sets receive buffer and then sets NRF_TWIS_TASK_PREPARERX task.
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param p_buf Pointer to the buffer for received data.
- * @param length Maximum number of data bytes to receive.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] p_buf Pointer to the buffer for received data.
+ * @param[in] length Maximum number of data bytes to receive.
*/
-__STATIC_INLINE void nrf_twis_rx_prepare(
- NRF_TWIS_Type * const p_reg,
- uint8_t * p_buf,
- nrf_twis_amount_t length);
+__STATIC_INLINE void nrf_twis_rx_prepare(NRF_TWIS_Type * p_reg,
+ uint8_t * p_buf,
+ size_t length);
/**
* @brief Function for getting number of bytes received in the last transaction.
*
* @param[in] p_reg TWIS instance.
+ *
* @return Amount of bytes received.
* */
-__STATIC_INLINE nrf_twis_amount_t nrf_twis_rx_amount_get(NRF_TWIS_Type const * const p_reg);
+__STATIC_INLINE size_t nrf_twis_rx_amount_get(NRF_TWIS_Type const * p_reg);
/**
* @brief Function for setting the transmit buffer.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param p_buf Pointer to the buffer with data to send.
- * @param length Maximum number of data bytes to transmit.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] p_buf Pointer to the buffer with data to send.
+ * @param[in] length Maximum number of data bytes to transmit.
*/
-__STATIC_INLINE void nrf_twis_tx_buffer_set(
- NRF_TWIS_Type * const p_reg,
- uint8_t const * p_buf,
- nrf_twis_amount_t length);
+__STATIC_INLINE void nrf_twis_tx_buffer_set(NRF_TWIS_Type * p_reg,
+ uint8_t const * p_buf,
+ size_t length);
/**
- * @brief Function that prepares TWIS for transmitting
+ * @brief Function for preparing TWIS for transmitting.
*
* This function sets transmit buffer and then sets NRF_TWIS_TASK_PREPARETX task.
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param p_buf Pointer to the buffer with data to send.
- * @param length Maximum number of data bytes to transmit.
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] p_buf Pointer to the buffer with data to send.
+ * @param[in] length Maximum number of data bytes to transmit.
*/
-__STATIC_INLINE void nrf_twis_tx_prepare(
- NRF_TWIS_Type * const p_reg,
- uint8_t const * p_buf,
- nrf_twis_amount_t length);
+__STATIC_INLINE void nrf_twis_tx_prepare(NRF_TWIS_Type * p_reg,
+ uint8_t const * p_buf,
+ size_t length);
/**
- * @brief Function for getting number of bytes transmitted in the last transaction.
+ * @brief Function for getting the number of bytes transmitted in the last transaction.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ *
* @return Amount of bytes transmitted.
*/
-__STATIC_INLINE nrf_twis_amount_t nrf_twis_tx_amount_get(NRF_TWIS_Type const * const p_reg);
+__STATIC_INLINE size_t nrf_twis_tx_amount_get(NRF_TWIS_Type const * p_reg);
/**
- * @brief Function for setting slave address
+ * @brief Function for setting the slave address.
*
* Function sets the selected address for this TWI interface.
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param n Index of address to set
- * @param addr Addres to set
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] n Index of address to be set.
+ * @param[in] addr Addres to be set.
+ *
* @sa nrf_twis_config_address_set
* @sa nrf_twis_config_address_get
*/
-__STATIC_INLINE void nrf_twis_address_set(
- NRF_TWIS_Type * const p_reg,
- uint_fast8_t n,
- nrf_twis_address_t addr);
+__STATIC_INLINE void nrf_twis_address_set(NRF_TWIS_Type * p_reg,
+ uint_fast8_t n,
+ nrf_twis_address_t addr);
/**
- * @brief Function for retrieving configured slave address
+ * @brief Function for retrieving configured slave address.
*
* Function gets the selected address for this TWI interface.
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param n Index of address to get
+ *
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] n Index of address to get.
+ *
+ * @return Configured slave address.
*/
-__STATIC_INLINE nrf_twis_address_t nrf_twis_address_get(
- NRF_TWIS_Type const * const p_reg,
- uint_fast8_t n);
+__STATIC_INLINE nrf_twis_address_t nrf_twis_address_get(NRF_TWIS_Type const * p_reg,
+ uint_fast8_t n);
/**
* @brief Function for setting the device address configuration.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param addr_mask Mask of address indexes of what device should answer to.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] addr_mask Mask of address indexes of what device should answer to.
*
* @sa nrf_twis_address_set
*/
-__STATIC_INLINE void nrf_twis_config_address_set(
- NRF_TWIS_Type * const p_reg,
- nrf_twis_config_addr_mask_t addr_mask);
+__STATIC_INLINE void nrf_twis_config_address_set(NRF_TWIS_Type * p_reg,
+ nrf_twis_config_addr_mask_t addr_mask);
/**
* @brief Function for retrieving the device address configuration.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Mask of address indexes of what device should answer to.
*/
__STATIC_INLINE nrf_twis_config_addr_mask_t nrf_twis_config_address_get(
- NRF_TWIS_Type const * const p_reg);
+ NRF_TWIS_Type const * p_reg);
/**
* @brief Function for setting the over-read character.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] orc Over-read character. Character clocked out in case of
- * over-read of the TXD buffer.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] orc Over-read character. Character clocked out in case of
+ * over-read of the TXD buffer.
*/
-__STATIC_INLINE void nrf_twis_orc_set(
- NRF_TWIS_Type * const p_reg,
- uint8_t orc);
+__STATIC_INLINE void nrf_twis_orc_set(NRF_TWIS_Type * p_reg,
+ uint8_t orc);
/**
* @brief Function for setting the over-read character.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Over-read character configured for selected instance.
*/
-__STATIC_INLINE uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * const p_reg);
+__STATIC_INLINE uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * p_reg);
/** @} */ /* End of nrf_twis_hal */
@@ -495,30 +479,31 @@
/**
* @internal
- * @brief Internal function for getting task/event register address
+ * @brief Internal function for getting task or event register address.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @oaram offset Offset of the register from the instance beginning
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] offset Offset of the register from the beginning of the instance.
*
- * @attention offset has to be modulo 4 value. In other case we can get hardware fault.
- * @return Pointer to the register
+ * @attention Offset must be modulo 4 value. In other case, hardware fault can occur.
+ * @return Pointer to the register.
*/
-__STATIC_INLINE volatile uint32_t* nrf_twis_getRegPtr(NRF_TWIS_Type * const p_reg, uint32_t offset)
+__STATIC_INLINE volatile uint32_t* nrf_twis_getRegPtr(NRF_TWIS_Type const * p_reg, uint32_t offset)
{
return (volatile uint32_t*)((uint8_t *)p_reg + (uint32_t)offset);
}
/**
* @internal
- * @brief Internal function for getting task/event register address - constant version
+ * @brief Internal function for getting task/event register address - constant version.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @oaram offset Offset of the register from the instance beginning
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] offset Offset of the register from the beginning of the instance.
*
- * @attention offset has to be modulo 4 value. In other case we can get hardware fault.
- * @return Pointer to the register
+ * @attention Offset must be modulo 4 value. In other case, hardware fault can occur.
+ * @return Pointer to the register.
*/
-__STATIC_INLINE volatile const uint32_t* nrf_twis_getRegPtr_c(NRF_TWIS_Type const * const p_reg, uint32_t offset)
+__STATIC_INLINE volatile const uint32_t* nrf_twis_getRegPtr_c(NRF_TWIS_Type const * p_reg,
+ uint32_t offset)
{
return (volatile const uint32_t*)((uint8_t *)p_reg + (uint32_t)offset);
}
@@ -529,21 +514,18 @@
*/
-void nrf_twis_task_trigger(NRF_TWIS_Type * const p_reg, nrf_twis_task_t task)
+__STATIC_INLINE void nrf_twis_task_trigger(NRF_TWIS_Type * p_reg, nrf_twis_task_t task)
{
*(nrf_twis_getRegPtr(p_reg, (uint32_t)task)) = 1UL;
}
-uint32_t nrf_twis_task_address_get(
- NRF_TWIS_Type const * const p_reg,
- nrf_twis_task_t task)
+__STATIC_INLINE uint32_t nrf_twis_task_address_get(NRF_TWIS_Type const * p_reg,
+ nrf_twis_task_t task)
{
return (uint32_t)nrf_twis_getRegPtr_c(p_reg, (uint32_t)task);
}
-void nrf_twis_event_clear(
- NRF_TWIS_Type * const p_reg,
- nrf_twis_event_t event)
+__STATIC_INLINE void nrf_twis_event_clear(NRF_TWIS_Type * p_reg, nrf_twis_event_t event)
{
*(nrf_twis_getRegPtr(p_reg, (uint32_t)event)) = 0UL;
#if __CORTEX_M == 0x04
@@ -552,16 +534,12 @@
#endif
}
-bool nrf_twis_event_check(
- NRF_TWIS_Type const * const p_reg,
- nrf_twis_event_t event)
+__STATIC_INLINE bool nrf_twis_event_check(NRF_TWIS_Type const * p_reg, nrf_twis_event_t event)
{
return (bool)*nrf_twis_getRegPtr_c(p_reg, (uint32_t)event);
}
-bool nrf_twis_event_get_and_clear(
- NRF_TWIS_Type * const p_reg,
- nrf_twis_event_t event)
+__STATIC_INLINE bool nrf_twis_event_get_and_clear(NRF_TWIS_Type * p_reg, nrf_twis_event_t event)
{
bool ret = nrf_twis_event_check(p_reg, event);
if (ret)
@@ -571,55 +549,54 @@
return ret;
}
-uint32_t nrf_twis_event_address_get(
- NRF_TWIS_Type const * const p_reg,
- nrf_twis_event_t event)
+__STATIC_INLINE uint32_t nrf_twis_event_address_get(NRF_TWIS_Type const * p_reg,
+ nrf_twis_event_t event)
{
return (uint32_t)nrf_twis_getRegPtr_c(p_reg, (uint32_t)event);
}
-void nrf_twis_shorts_enable(NRF_TWIS_Type * const p_reg, uint32_t short_mask)
+__STATIC_INLINE void nrf_twis_shorts_enable(NRF_TWIS_Type * p_reg, uint32_t mask)
{
- p_reg->SHORTS |= short_mask;
+ p_reg->SHORTS |= mask;
}
-void nrf_twis_shorts_disable(NRF_TWIS_Type * const p_reg, uint32_t short_mask)
+__STATIC_INLINE void nrf_twis_shorts_disable(NRF_TWIS_Type * p_reg, uint32_t mask)
{
- if (~0U == short_mask)
+ if (~0U == mask)
{
/* Optimized version for "disable all" */
p_reg->SHORTS = 0;
}
else
{
- p_reg->SHORTS &= ~short_mask;
+ p_reg->SHORTS &= ~mask;
}
}
-uint32_t nrf_twis_shorts_get(NRF_TWIS_Type * const p_reg)
+__STATIC_INLINE uint32_t nrf_twis_shorts_get(NRF_TWIS_Type const * p_reg)
{
return p_reg->SHORTS;
}
-void nrf_twis_int_enable(NRF_TWIS_Type * const p_reg, uint32_t int_mask)
+__STATIC_INLINE void nrf_twis_int_enable(NRF_TWIS_Type * p_reg, uint32_t mask)
{
- p_reg->INTENSET = int_mask;
+ p_reg->INTENSET = mask;
}
-bool nrf_twis_int_enable_check(NRF_TWIS_Type const * const p_reg, uint32_t int_mask)
+__STATIC_INLINE bool nrf_twis_int_enable_check(NRF_TWIS_Type const * p_reg, uint32_t mask)
{
- return (bool)(p_reg->INTENSET & int_mask);
+ return (bool)(p_reg->INTENSET & mask);
}
-void nrf_twis_int_disable(NRF_TWIS_Type * const p_reg, uint32_t int_mask)
+__STATIC_INLINE void nrf_twis_int_disable(NRF_TWIS_Type * const p_reg, uint32_t mask)
{
- p_reg->INTENCLR = int_mask;
+ p_reg->INTENCLR = mask;
}
#if defined(DPPI_PRESENT)
__STATIC_INLINE void nrf_twis_subscribe_set(NRF_TWIS_Type * p_reg,
nrf_twis_task_t task,
- uint8_t channel)
+ uint8_t channel)
{
*((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) =
((uint32_t)channel | TWIS_SUBSCRIBE_STOP_EN_Msk);
@@ -633,7 +610,7 @@
__STATIC_INLINE void nrf_twis_publish_set(NRF_TWIS_Type * p_reg,
nrf_twis_event_t event,
- uint8_t channel)
+ uint8_t channel)
{
*((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) =
((uint32_t)channel | TWIS_PUBLISH_STOPPED_EN_Msk);
@@ -646,115 +623,105 @@
}
#endif // defined(DPPI_PRESENT)
-uint32_t nrf_twis_error_source_get_and_clear(NRF_TWIS_Type * const p_reg)
+__STATIC_INLINE uint32_t nrf_twis_error_source_get_and_clear(NRF_TWIS_Type * p_reg)
{
uint32_t ret = p_reg->ERRORSRC;
p_reg->ERRORSRC = ret;
return ret;
}
-uint_fast8_t nrf_twis_match_get(NRF_TWIS_Type const * p_reg)
+__STATIC_INLINE uint_fast8_t nrf_twis_match_get(NRF_TWIS_Type const * p_reg)
{
return (uint_fast8_t)p_reg->MATCH;
}
-void nrf_twis_enable(NRF_TWIS_Type * const p_reg)
+__STATIC_INLINE void nrf_twis_enable(NRF_TWIS_Type * p_reg)
{
p_reg->ENABLE = (TWIS_ENABLE_ENABLE_Enabled << TWIS_ENABLE_ENABLE_Pos);
}
-void nrf_twis_disable(NRF_TWIS_Type * const p_reg)
+__STATIC_INLINE void nrf_twis_disable(NRF_TWIS_Type * p_reg)
{
p_reg->ENABLE = (TWIS_ENABLE_ENABLE_Disabled << TWIS_ENABLE_ENABLE_Pos);
}
-void nrf_twis_pins_set(NRF_TWIS_Type * const p_reg, uint32_t scl, uint32_t sda)
+__STATIC_INLINE void nrf_twis_pins_set(NRF_TWIS_Type * p_reg, uint32_t scl, uint32_t sda)
{
p_reg->PSEL.SCL = scl;
p_reg->PSEL.SDA = sda;
}
-void nrf_twis_rx_buffer_set(
- NRF_TWIS_Type * const p_reg,
- uint8_t * p_buf,
- nrf_twis_amount_t length)
+__STATIC_INLINE void nrf_twis_rx_buffer_set(NRF_TWIS_Type * p_reg,
+ uint8_t * p_buf,
+ size_t length)
{
p_reg->RXD.PTR = (uint32_t)p_buf;
p_reg->RXD.MAXCNT = length;
}
-__STATIC_INLINE void nrf_twis_rx_prepare(
- NRF_TWIS_Type * const p_reg,
- uint8_t * p_buf,
- nrf_twis_amount_t length)
+__STATIC_INLINE void nrf_twis_rx_prepare(NRF_TWIS_Type * p_reg,
+ uint8_t * p_buf,
+ size_t length)
{
nrf_twis_rx_buffer_set(p_reg, p_buf, length);
nrf_twis_task_trigger(p_reg, NRF_TWIS_TASK_PREPARERX);
}
-nrf_twis_amount_t nrf_twis_rx_amount_get(NRF_TWIS_Type const * const p_reg)
+__STATIC_INLINE size_t nrf_twis_rx_amount_get(NRF_TWIS_Type const * p_reg)
{
- return (nrf_twis_amount_t)p_reg->RXD.AMOUNT;
+ return p_reg->RXD.AMOUNT;
}
-void nrf_twis_tx_buffer_set(
- NRF_TWIS_Type * const p_reg,
- uint8_t const * p_buf,
- nrf_twis_amount_t length)
+__STATIC_INLINE void nrf_twis_tx_buffer_set(NRF_TWIS_Type * p_reg,
+ uint8_t const * p_buf,
+ size_t length)
{
p_reg->TXD.PTR = (uint32_t)p_buf;
p_reg->TXD.MAXCNT = length;
}
-__STATIC_INLINE void nrf_twis_tx_prepare(
- NRF_TWIS_Type * const p_reg,
- uint8_t const * p_buf,
- nrf_twis_amount_t length)
+__STATIC_INLINE void nrf_twis_tx_prepare(NRF_TWIS_Type * p_reg,
+ uint8_t const * p_buf,
+ size_t length)
{
nrf_twis_tx_buffer_set(p_reg, p_buf, length);
nrf_twis_task_trigger(p_reg, NRF_TWIS_TASK_PREPARETX);
}
-nrf_twis_amount_t nrf_twis_tx_amount_get(NRF_TWIS_Type const * const p_reg)
+__STATIC_INLINE size_t nrf_twis_tx_amount_get(NRF_TWIS_Type const * p_reg)
{
- return (nrf_twis_amount_t)p_reg->TXD.AMOUNT;
+ return p_reg->TXD.AMOUNT;
}
-void nrf_twis_address_set(
- NRF_TWIS_Type * const p_reg,
- uint_fast8_t n,
- nrf_twis_address_t addr)
+__STATIC_INLINE void nrf_twis_address_set(NRF_TWIS_Type * p_reg,
+ uint_fast8_t n,
+ nrf_twis_address_t addr)
{
p_reg->ADDRESS[n] = addr;
}
-nrf_twis_address_t nrf_twis_address_get(
- NRF_TWIS_Type const * const p_reg,
- uint_fast8_t n)
+__STATIC_INLINE nrf_twis_address_t nrf_twis_address_get(NRF_TWIS_Type const * p_reg, uint_fast8_t n)
{
return (nrf_twis_address_t)p_reg->ADDRESS[n];
}
-void nrf_twis_config_address_set(
- NRF_TWIS_Type * const p_reg,
- nrf_twis_config_addr_mask_t addr_mask)
+__STATIC_INLINE void nrf_twis_config_address_set(NRF_TWIS_Type * p_reg,
+ nrf_twis_config_addr_mask_t addr_mask)
{
/* This is the only configuration in TWIS - just write it without masking */
p_reg->CONFIG = addr_mask;
}
-nrf_twis_config_addr_mask_t nrf_twis_config_address_get(NRF_TWIS_Type const * const p_reg)
+__STATIC_INLINE nrf_twis_config_addr_mask_t nrf_twis_config_address_get(NRF_TWIS_Type const * p_reg)
{
return (nrf_twis_config_addr_mask_t)(p_reg->CONFIG & TWIS_ADDRESS_ADDRESS_Msk);
}
-void nrf_twis_orc_set(
- NRF_TWIS_Type * const p_reg,
- uint8_t orc)
+__STATIC_INLINE void nrf_twis_orc_set(NRF_TWIS_Type * p_reg, uint8_t orc)
{
p_reg->ORC = orc;
}
-uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * const p_reg)
+__STATIC_INLINE uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * p_reg)
{
return (uint8_t)p_reg->ORC;
}
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_uart.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_uart.h
index cd894ea..afd9c79 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_uart.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_uart.h
@@ -45,59 +45,42 @@
* @brief Hardware access layer for managing the UART peripheral.
*/
+/** @brief Pin disconnected value. */
#define NRF_UART_PSEL_DISCONNECTED 0xFFFFFFFF
-/**
- * @enum nrf_uart_task_t
- * @brief UART tasks.
- */
+/** @brief UART tasks. */
typedef enum
{
- /*lint -save -e30 -esym(628,__INTADDR__)*/
NRF_UART_TASK_STARTRX = offsetof(NRF_UART_Type, TASKS_STARTRX), /**< Task for starting reception. */
NRF_UART_TASK_STOPRX = offsetof(NRF_UART_Type, TASKS_STOPRX), /**< Task for stopping reception. */
NRF_UART_TASK_STARTTX = offsetof(NRF_UART_Type, TASKS_STARTTX), /**< Task for starting transmission. */
NRF_UART_TASK_STOPTX = offsetof(NRF_UART_Type, TASKS_STOPTX), /**< Task for stopping transmission. */
NRF_UART_TASK_SUSPEND = offsetof(NRF_UART_Type, TASKS_SUSPEND), /**< Task for suspending UART. */
- /*lint -restore*/
} nrf_uart_task_t;
-/**
- * @enum nrf_uart_event_t
- * @brief UART events.
- */
+/** @brief UART events. */
typedef enum
{
- /*lint -save -e30*/
NRF_UART_EVENT_CTS = offsetof(NRF_UART_Type, EVENTS_CTS), /**< Event from CTS line activation. */
NRF_UART_EVENT_NCTS = offsetof(NRF_UART_Type, EVENTS_NCTS), /**< Event from CTS line deactivation. */
NRF_UART_EVENT_RXDRDY = offsetof(NRF_UART_Type, EVENTS_RXDRDY),/**< Event from data ready in RXD. */
NRF_UART_EVENT_TXDRDY = offsetof(NRF_UART_Type, EVENTS_TXDRDY),/**< Event from data sent from TXD. */
NRF_UART_EVENT_ERROR = offsetof(NRF_UART_Type, EVENTS_ERROR), /**< Event from error detection. */
NRF_UART_EVENT_RXTO = offsetof(NRF_UART_Type, EVENTS_RXTO) /**< Event from receiver timeout. */
- /*lint -restore*/
} nrf_uart_event_t;
-/**
- * @enum nrf_uart_int_mask_t
- * @brief UART interrupts.
- */
+/** @brief UART interrupts. */
typedef enum
{
- /*lint -save -e30*/
NRF_UART_INT_MASK_CTS = UART_INTENCLR_CTS_Msk, /**< CTS line activation interrupt. */
NRF_UART_INT_MASK_NCTS = UART_INTENCLR_NCTS_Msk, /**< CTS line deactivation interrupt. */
NRF_UART_INT_MASK_RXDRDY = UART_INTENCLR_RXDRDY_Msk, /**< Data ready in RXD interrupt. */
- NRF_UART_INT_MASK_TXDRDY = UART_INTENCLR_TXDRDY_Msk, /**< Data sent from TXD interrupt. */
+ NRF_UART_INT_MASK_TXDRDY = UART_INTENCLR_TXDRDY_Msk, /**< Data sent from TXD interrupt. */
NRF_UART_INT_MASK_ERROR = UART_INTENCLR_ERROR_Msk, /**< Error detection interrupt. */
NRF_UART_INT_MASK_RXTO = UART_INTENCLR_RXTO_Msk /**< Receiver timeout interrupt. */
- /*lint -restore*/
} nrf_uart_int_mask_t;
-/**
- * @enum nrf_uart_baudrate_t
- * @brief Baudrates supported by UART.
- */
+/** @brief Baudrates supported by UART. */
typedef enum
{
NRF_UART_BAUDRATE_1200 = UART_BAUDRATE_BAUDRATE_Baud1200, /**< 1200 baud. */
@@ -120,10 +103,7 @@
NRF_UART_BAUDRATE_1000000 = UART_BAUDRATE_BAUDRATE_Baud1M, /**< 1000000 baud. */
} nrf_uart_baudrate_t;
-/**
- * @enum nrf_uart_error_mask_t
- * @brief Types of UART error masks.
- */
+/** @brief Types of UART error masks. */
typedef enum
{
NRF_UART_ERROR_OVERRUN_MASK = UART_ERRORSRC_OVERRUN_Msk, /**< Overrun error. */
@@ -132,155 +112,158 @@
NRF_UART_ERROR_BREAK_MASK = UART_ERRORSRC_BREAK_Msk, /**< Break error. */
} nrf_uart_error_mask_t;
-/**
- * @enum nrf_uart_parity_t
- * @brief Types of UART parity modes.
- */
+/** @brief Types of UART parity modes. */
typedef enum
{
NRF_UART_PARITY_EXCLUDED = UART_CONFIG_PARITY_Excluded << UART_CONFIG_PARITY_Pos, /**< Parity excluded. */
NRF_UART_PARITY_INCLUDED = UART_CONFIG_PARITY_Included << UART_CONFIG_PARITY_Pos, /**< Parity included. */
} nrf_uart_parity_t;
-/**
- * @enum nrf_uart_hwfc_t
- * @brief Types of UART flow control modes.
- */
+/** @brief Types of UART flow control modes. */
typedef enum
{
- NRF_UART_HWFC_DISABLED = UART_CONFIG_HWFC_Disabled, /**< HW flow control disabled. */
- NRF_UART_HWFC_ENABLED = UART_CONFIG_HWFC_Enabled, /**< HW flow control enabled. */
+ NRF_UART_HWFC_DISABLED = UART_CONFIG_HWFC_Disabled, /**< Hardware flow control disabled. */
+ NRF_UART_HWFC_ENABLED = UART_CONFIG_HWFC_Enabled, /**< Hardware flow control enabled. */
} nrf_uart_hwfc_t;
/**
- * @brief Function for clearing a specific UART event.
+ * @brief Function for clearing the specified UART event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] event Event to clear.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to clear.
*/
__STATIC_INLINE void nrf_uart_event_clear(NRF_UART_Type * p_reg, nrf_uart_event_t event);
/**
- * @brief Function for checking the state of a specific UART event.
+ * @brief Function for retrieving the state of the UART event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] event Event to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to be checked.
*
- * @retval True if event is set, False otherwise.
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_uart_event_check(NRF_UART_Type * p_reg, nrf_uart_event_t event);
/**
- * @brief Function for returning the address of a specific UART event register.
+ * @brief Function for returning the address of the specified UART event register.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] event Desired event.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Desired event.
*
- * @retval Address of specified event register.
+ * @return Address of the specified event register.
*/
__STATIC_INLINE uint32_t nrf_uart_event_address_get(NRF_UART_Type * p_reg,
- nrf_uart_event_t event);
+ nrf_uart_event_t event);
/**
- * @brief Function for enabling a specific interrupt.
+ * @brief Function for enabling the specified interrupt.
*
- * @param p_reg Pointer to the peripheral registers structure.
- * @param int_mask Interrupts to enable.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param mask Mask of interrupts to be enabled.
*/
-__STATIC_INLINE void nrf_uart_int_enable(NRF_UART_Type * p_reg, uint32_t int_mask);
+__STATIC_INLINE void nrf_uart_int_enable(NRF_UART_Type * p_reg, uint32_t mask);
/**
* @brief Function for retrieving the state of a given interrupt.
*
- * @param p_reg Pointer to the peripheral registers structure.
- * @param int_mask Mask of interrupt to check.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param mask Mask of interrupts to be checked.
*
- * @retval true If the interrupt is enabled.
- * @retval false If the interrupt is not enabled.
+ * @retval true The interrupt is enabled.
+ * @retval false The interrupt is not enabled.
*/
-__STATIC_INLINE bool nrf_uart_int_enable_check(NRF_UART_Type * p_reg, uint32_t int_mask);
+__STATIC_INLINE bool nrf_uart_int_enable_check(NRF_UART_Type * p_reg, uint32_t mask);
/**
- * @brief Function for disabling specific interrupts.
+ * @brief Function for disabling the specified interrupts.
*
- * @param p_reg Pointer to the peripheral registers structure.
- * @param int_mask Interrupts to disable.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param mask Mask of interrupts to be disabled.
*/
-__STATIC_INLINE void nrf_uart_int_disable(NRF_UART_Type * p_reg, uint32_t int_mask);
+__STATIC_INLINE void nrf_uart_int_disable(NRF_UART_Type * p_reg, uint32_t mask);
/**
* @brief Function for getting error source mask. Function is clearing error source flags after reading.
*
- * @param p_reg Pointer to the peripheral registers structure.
- * @return Mask with error source flags.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @return Mask with error source flags.
*/
__STATIC_INLINE uint32_t nrf_uart_errorsrc_get_and_clear(NRF_UART_Type * p_reg);
/**
* @brief Function for enabling UART.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_uart_enable(NRF_UART_Type * p_reg);
/**
* @brief Function for disabling UART.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_uart_disable(NRF_UART_Type * p_reg);
/**
* @brief Function for configuring TX/RX pins.
*
- * @param p_reg Pointer to the peripheral registers structure.
- * @param pseltxd TXD pin number.
- * @param pselrxd RXD pin number.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param pseltxd TXD pin number.
+ * @param pselrxd RXD pin number.
*/
__STATIC_INLINE void nrf_uart_txrx_pins_set(NRF_UART_Type * p_reg, uint32_t pseltxd, uint32_t pselrxd);
/**
* @brief Function for disconnecting TX/RX pins.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_uart_txrx_pins_disconnect(NRF_UART_Type * p_reg);
/**
* @brief Function for getting TX pin.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @return TX pin number.
*/
__STATIC_INLINE uint32_t nrf_uart_tx_pin_get(NRF_UART_Type * p_reg);
/**
* @brief Function for getting RX pin.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @return RX pin number.
*/
__STATIC_INLINE uint32_t nrf_uart_rx_pin_get(NRF_UART_Type * p_reg);
/**
* @brief Function for getting RTS pin.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @return RTS pin number.
*/
__STATIC_INLINE uint32_t nrf_uart_rts_pin_get(NRF_UART_Type * p_reg);
/**
* @brief Function for getting CTS pin.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @return CTS pin number.
*/
__STATIC_INLINE uint32_t nrf_uart_cts_pin_get(NRF_UART_Type * p_reg);
-
/**
* @brief Function for configuring flow control pins.
*
- * @param p_reg Pointer to the peripheral registers structure.
- * @param pselrts RTS pin number.
- * @param pselcts CTS pin number.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param pselrts RTS pin number.
+ * @param pselcts CTS pin number.
*/
__STATIC_INLINE void nrf_uart_hwfc_pins_set(NRF_UART_Type * p_reg,
uint32_t pselrts,
@@ -289,64 +272,67 @@
/**
* @brief Function for disconnecting flow control pins.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_uart_hwfc_pins_disconnect(NRF_UART_Type * p_reg);
/**
* @brief Function for reading RX data.
*
- * @param p_reg Pointer to the peripheral registers structure.
- * @return Received byte.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @return Received byte.
*/
__STATIC_INLINE uint8_t nrf_uart_rxd_get(NRF_UART_Type * p_reg);
/**
* @brief Function for setting Tx data.
*
- * @param p_reg Pointer to the peripheral registers structure.
- * @param txd Byte.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param txd Byte.
*/
__STATIC_INLINE void nrf_uart_txd_set(NRF_UART_Type * p_reg, uint8_t txd);
/**
* @brief Function for starting an UART task.
*
- * @param p_reg Pointer to the peripheral registers structure.
- * @param task Task.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param task Task.
*/
__STATIC_INLINE void nrf_uart_task_trigger(NRF_UART_Type * p_reg, nrf_uart_task_t task);
/**
- * @brief Function for returning the address of a specific task register.
+ * @brief Function for returning the address of the specified task register.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
* @param task Task.
*
- * @return Task address.
+ * @return Task address.
*/
__STATIC_INLINE uint32_t nrf_uart_task_address_get(NRF_UART_Type * p_reg, nrf_uart_task_t task);
/**
* @brief Function for configuring UART.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
* @param hwfc Hardware flow control. Enabled if true.
* @param parity Parity. Included if true.
*/
__STATIC_INLINE void nrf_uart_configure(NRF_UART_Type * p_reg,
- nrf_uart_parity_t parity,
- nrf_uart_hwfc_t hwfc);
+ nrf_uart_parity_t parity,
+ nrf_uart_hwfc_t hwfc);
/**
- * @brief Function for setting UART baudrate.
+ * @brief Function for setting UART baud rate.
*
- * @param p_reg Pointer to the peripheral registers structure.
- * @param baudrate Baudrate.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param baudrate Baud rate.
*/
-__STATIC_INLINE void nrf_uart_baudrate_set(NRF_UART_Type * p_reg, nrf_uart_baudrate_t baudrate);
+__STATIC_INLINE void nrf_uart_baudrate_set(NRF_UART_Type * p_reg, nrf_uart_baudrate_t baudrate);
+
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+
__STATIC_INLINE void nrf_uart_event_clear(NRF_UART_Type * p_reg, nrf_uart_event_t event)
{
*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
@@ -354,7 +340,6 @@
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
(void)dummy;
#endif
-
}
__STATIC_INLINE bool nrf_uart_event_check(NRF_UART_Type * p_reg, nrf_uart_event_t event)
@@ -363,24 +348,24 @@
}
__STATIC_INLINE uint32_t nrf_uart_event_address_get(NRF_UART_Type * p_reg,
- nrf_uart_event_t event)
+ nrf_uart_event_t event)
{
return (uint32_t)((uint8_t *)p_reg + (uint32_t)event);
}
-__STATIC_INLINE void nrf_uart_int_enable(NRF_UART_Type * p_reg, uint32_t int_mask)
+__STATIC_INLINE void nrf_uart_int_enable(NRF_UART_Type * p_reg, uint32_t mask)
{
- p_reg->INTENSET = int_mask;
+ p_reg->INTENSET = mask;
}
-__STATIC_INLINE bool nrf_uart_int_enable_check(NRF_UART_Type * p_reg, uint32_t int_mask)
+__STATIC_INLINE bool nrf_uart_int_enable_check(NRF_UART_Type * p_reg, uint32_t mask)
{
- return (bool)(p_reg->INTENSET & int_mask);
+ return (bool)(p_reg->INTENSET & mask);
}
-__STATIC_INLINE void nrf_uart_int_disable(NRF_UART_Type * p_reg, uint32_t int_mask)
+__STATIC_INLINE void nrf_uart_int_disable(NRF_UART_Type * p_reg, uint32_t mask)
{
- p_reg->INTENCLR = int_mask;
+ p_reg->INTENCLR = mask;
}
__STATIC_INLINE uint32_t nrf_uart_errorsrc_get_and_clear(NRF_UART_Type * p_reg)
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_uarte.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_uarte.h
index b1e2feb..19a38c7 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_uarte.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_uarte.h
@@ -47,28 +47,19 @@
* @brief Hardware access layer for managing the UARTE peripheral.
*/
-/**
- * @enum nrf_uarte_task_t
- * @brief UARTE tasks.
- */
+/** @brief UARTE tasks. */
typedef enum
{
- /*lint -save -e30*/
NRF_UARTE_TASK_STARTRX = offsetof(NRF_UARTE_Type, TASKS_STARTRX), ///< Start UART receiver.
NRF_UARTE_TASK_STOPRX = offsetof(NRF_UARTE_Type, TASKS_STOPRX), ///< Stop UART receiver.
NRF_UARTE_TASK_STARTTX = offsetof(NRF_UARTE_Type, TASKS_STARTTX), ///< Start UART transmitter.
NRF_UARTE_TASK_STOPTX = offsetof(NRF_UARTE_Type, TASKS_STOPTX), ///< Stop UART transmitter.
NRF_UARTE_TASK_FLUSHRX = offsetof(NRF_UARTE_Type, TASKS_FLUSHRX) ///< Flush RX FIFO in RX buffer.
- /*lint -restore*/
} nrf_uarte_task_t;
-/**
- * @enum nrf_uarte_event_t
- * @brief UARTE events.
- */
+/** @brief UARTE events. */
typedef enum
{
- /*lint -save -e30*/
NRF_UARTE_EVENT_CTS = offsetof(NRF_UARTE_Type, EVENTS_CTS), ///< CTS is activated.
NRF_UARTE_EVENT_NCTS = offsetof(NRF_UARTE_Type, EVENTS_NCTS), ///< CTS is deactivated.
NRF_UARTE_EVENT_RXDRDY = offsetof(NRF_UARTE_Type, EVENTS_RXDRDY), ///< Data received in RXD (but potentially not yet transferred to Data RAM).
@@ -80,12 +71,9 @@
NRF_UARTE_EVENT_RXSTARTED = offsetof(NRF_UARTE_Type, EVENTS_RXSTARTED), ///< Receiver has started.
NRF_UARTE_EVENT_TXSTARTED = offsetof(NRF_UARTE_Type, EVENTS_TXSTARTED), ///< Transmitter has started.
NRF_UARTE_EVENT_TXSTOPPED = offsetof(NRF_UARTE_Type, EVENTS_TXSTOPPED) ///< Transmitted stopped.
- /*lint -restore*/
} nrf_uarte_event_t;
-/**
- * @brief Types of UARTE shortcuts.
- */
+/** @brief Types of UARTE shortcuts. */
typedef enum
{
NRF_UARTE_SHORT_ENDRX_STARTRX = UARTE_SHORTS_ENDRX_STARTRX_Msk, ///< Shortcut between ENDRX event and STARTRX task.
@@ -93,10 +81,7 @@
} nrf_uarte_short_t;
-/**
- * @enum nrf_uarte_int_mask_t
- * @brief UARTE interrupts.
- */
+/** @brief UARTE interrupts. */
typedef enum
{
NRF_UARTE_INT_CTS_MASK = UARTE_INTENSET_CTS_Msk, ///< Interrupt on CTS event.
@@ -112,10 +97,7 @@
NRF_UARTE_INT_TXSTOPPED_MASK = UARTE_INTENSET_TXSTOPPED_Msk ///< Interrupt on TXSTOPPED event.
} nrf_uarte_int_mask_t;
-/**
- * @enum nrf_uarte_baudrate_t
- * @brief Baudrates supported by UARTE.
- */
+/** @brief Baudrates supported by UARTE. */
typedef enum
{
NRF_UARTE_BAUDRATE_1200 = UARTE_BAUDRATE_BAUDRATE_Baud1200, ///< 1200 baud.
@@ -138,10 +120,7 @@
NRF_UARTE_BAUDRATE_1000000 = UARTE_BAUDRATE_BAUDRATE_Baud1M ///< 1000000 baud.
} nrf_uarte_baudrate_t;
-/**
- * @enum nrf_uarte_error_mask_t
- * @brief Types of UARTE error masks.
- */
+/** @brief Types of UARTE error masks. */
typedef enum
{
NRF_UARTE_ERROR_OVERRUN_MASK = UARTE_ERRORSRC_OVERRUN_Msk, ///< Overrun error.
@@ -150,98 +129,93 @@
NRF_UARTE_ERROR_BREAK_MASK = UARTE_ERRORSRC_BREAK_Msk ///< Break error.
} nrf_uarte_error_mask_t;
-/**
- * @enum nrf_uarte_parity_t
- * @brief Types of UARTE parity modes.
- */
+/** @brief Types of UARTE parity modes. */
typedef enum
{
NRF_UARTE_PARITY_EXCLUDED = UARTE_CONFIG_PARITY_Excluded << UARTE_CONFIG_PARITY_Pos, ///< Parity excluded.
NRF_UARTE_PARITY_INCLUDED = UARTE_CONFIG_PARITY_Included << UARTE_CONFIG_PARITY_Pos ///< Parity included.
} nrf_uarte_parity_t;
-/**
- * @enum nrf_uarte_hwfc_t
- * @brief Types of UARTE flow control modes.
- */
+/** @brief Types of UARTE flow control modes. */
typedef enum
{
- NRF_UARTE_HWFC_DISABLED = UARTE_CONFIG_HWFC_Disabled << UARTE_CONFIG_HWFC_Pos, ///< HW flow control disabled.
- NRF_UARTE_HWFC_ENABLED = UARTE_CONFIG_HWFC_Enabled << UARTE_CONFIG_HWFC_Pos ///< HW flow control enabled.
+ NRF_UARTE_HWFC_DISABLED = UARTE_CONFIG_HWFC_Disabled << UARTE_CONFIG_HWFC_Pos, ///< Hardware flow control disabled.
+ NRF_UARTE_HWFC_ENABLED = UARTE_CONFIG_HWFC_Enabled << UARTE_CONFIG_HWFC_Pos ///< Hardware flow control enabled.
} nrf_uarte_hwfc_t;
/**
- * @brief Function for clearing a specific UARTE event.
+ * @brief Function for clearing the specified UARTE event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] event Event to clear.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to clear.
*/
__STATIC_INLINE void nrf_uarte_event_clear(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event);
/**
- * @brief Function for checking the state of a specific UARTE event.
+ * @brief Function for retrieving the state of the UARTE event.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] event Event to check.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event Event to be checked.
*
- * @retval True if event is set, False otherwise.
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_uarte_event_check(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event);
/**
- * @brief Function for returning the address of a specific UARTE event register.
+ * @brief Function for returning the address of the specified UARTE event register.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] event Desired event.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] event The specified event.
*
- * @retval Address of specified event register.
+ * @return Address of specified event register.
*/
-__STATIC_INLINE uint32_t nrf_uarte_event_address_get(NRF_UARTE_Type * p_reg,
- nrf_uarte_event_t event);
+__STATIC_INLINE uint32_t nrf_uarte_event_address_get(NRF_UARTE_Type * p_reg,
+ nrf_uarte_event_t event);
/**
* @brief Function for enabling UARTE shortcuts.
*
- * @param p_reg Pointer to the peripheral registers structure.
- * @param shorts_mask Shortcuts to enable.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param mask Shortcuts to be enabled.
*/
-__STATIC_INLINE void nrf_uarte_shorts_enable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask);
+__STATIC_INLINE void nrf_uarte_shorts_enable(NRF_UARTE_Type * p_reg, uint32_t mask);
/**
* @brief Function for disabling UARTE shortcuts.
*
- * @param p_reg Pointer to the peripheral registers structure.
- * @param shorts_mask Shortcuts to disable.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param mask Shortcuts to be disabled.
*/
-__STATIC_INLINE void nrf_uarte_shorts_disable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask);
+__STATIC_INLINE void nrf_uarte_shorts_disable(NRF_UARTE_Type * p_reg, uint32_t mask);
/**
* @brief Function for enabling UARTE interrupts.
*
- * @param p_reg Pointer to the peripheral registers structure.
- * @param int_mask Interrupts to enable.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param mask Mask of interrupts to be enabled.
*/
-__STATIC_INLINE void nrf_uarte_int_enable(NRF_UARTE_Type * p_reg, uint32_t int_mask);
+__STATIC_INLINE void nrf_uarte_int_enable(NRF_UARTE_Type * p_reg, uint32_t mask);
/**
- * @brief Function for retrieving the state of a given interrupt.
+ * @brief Function for retrieving the state of the specified interrupt.
*
- * @param p_reg Pointer to the peripheral registers structure.
- * @param int_mask Mask of interrupt to check.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param mask Mask of interrupts to be checked.
*
- * @retval true If the interrupt is enabled.
- * @retval false If the interrupt is not enabled.
+ * @retval true The interrupt is enabled.
+ * @retval false The interrupt is not enabled.
*/
-__STATIC_INLINE bool nrf_uarte_int_enable_check(NRF_UARTE_Type * p_reg, nrf_uarte_int_mask_t int_mask);
+__STATIC_INLINE bool nrf_uarte_int_enable_check(NRF_UARTE_Type * p_reg, nrf_uarte_int_mask_t mask);
/**
- * @brief Function for disabling specific interrupts.
+ * @brief Function for disabling the specified interrupts.
*
- * @param p_reg Instance.
- * @param int_mask Interrupts to disable.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param mask Mask of interrupts to be disabled.
*/
-__STATIC_INLINE void nrf_uarte_int_disable(NRF_UARTE_Type * p_reg, uint32_t int_mask);
+__STATIC_INLINE void nrf_uarte_int_disable(NRF_UARTE_Type * p_reg, uint32_t mask);
#if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
@@ -292,132 +266,141 @@
/**
* @brief Function for getting error source mask. Function is clearing error source flags after reading.
*
- * @param p_reg Pointer to the peripheral registers structure.
- * @return Mask with error source flags.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @return Mask with error source flags.
*/
__STATIC_INLINE uint32_t nrf_uarte_errorsrc_get_and_clear(NRF_UARTE_Type * p_reg);
/**
* @brief Function for enabling UARTE.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_uarte_enable(NRF_UARTE_Type * p_reg);
/**
* @brief Function for disabling UARTE.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_uarte_disable(NRF_UARTE_Type * p_reg);
/**
* @brief Function for configuring TX/RX pins.
*
- * @param p_reg Pointer to the peripheral registers structure.
- * @param pseltxd TXD pin number.
- * @param pselrxd RXD pin number.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param pseltxd TXD pin number.
+ * @param pselrxd RXD pin number.
*/
-__STATIC_INLINE void nrf_uarte_txrx_pins_set(NRF_UARTE_Type * p_reg, uint32_t pseltxd, uint32_t pselrxd);
+__STATIC_INLINE void nrf_uarte_txrx_pins_set(NRF_UARTE_Type * p_reg,
+ uint32_t pseltxd,
+ uint32_t pselrxd);
/**
* @brief Function for disconnecting TX/RX pins.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_uarte_txrx_pins_disconnect(NRF_UARTE_Type * p_reg);
/**
* @brief Function for getting TX pin.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @return TX pin number.
*/
__STATIC_INLINE uint32_t nrf_uarte_tx_pin_get(NRF_UARTE_Type * p_reg);
/**
* @brief Function for getting RX pin.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @return RX pin number.
*/
__STATIC_INLINE uint32_t nrf_uarte_rx_pin_get(NRF_UARTE_Type * p_reg);
/**
* @brief Function for getting RTS pin.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @return RTS pin number.
*/
__STATIC_INLINE uint32_t nrf_uarte_rts_pin_get(NRF_UARTE_Type * p_reg);
/**
* @brief Function for getting CTS pin.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ *
+ * @return CTS pin number.
*/
__STATIC_INLINE uint32_t nrf_uarte_cts_pin_get(NRF_UARTE_Type * p_reg);
-
/**
* @brief Function for configuring flow control pins.
*
- * @param p_reg Pointer to the peripheral registers structure.
- * @param pselrts RTS pin number.
- * @param pselcts CTS pin number.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param pselrts RTS pin number.
+ * @param pselcts CTS pin number.
*/
__STATIC_INLINE void nrf_uarte_hwfc_pins_set(NRF_UARTE_Type * p_reg,
- uint32_t pselrts,
- uint32_t pselcts);
+ uint32_t pselrts,
+ uint32_t pselcts);
/**
* @brief Function for disconnecting flow control pins.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_uarte_hwfc_pins_disconnect(NRF_UARTE_Type * p_reg);
/**
* @brief Function for starting an UARTE task.
*
- * @param p_reg Pointer to the peripheral registers structure.
- * @param task Task.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param task Task.
*/
__STATIC_INLINE void nrf_uarte_task_trigger(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task);
/**
- * @brief Function for returning the address of a specific task register.
+ * @brief Function for returning the address of the specified task register.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
* @param task Task.
*
- * @return Task address.
+ * @return Task address.
*/
__STATIC_INLINE uint32_t nrf_uarte_task_address_get(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task);
/**
* @brief Function for configuring UARTE.
*
- * @param p_reg Pointer to the peripheral registers structure.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
* @param hwfc Hardware flow control. Enabled if true.
* @param parity Parity. Included if true.
*/
__STATIC_INLINE void nrf_uarte_configure(NRF_UARTE_Type * p_reg,
- nrf_uarte_parity_t parity,
- nrf_uarte_hwfc_t hwfc);
-
+ nrf_uarte_parity_t parity,
+ nrf_uarte_hwfc_t hwfc);
/**
- * @brief Function for setting UARTE baudrate.
+ * @brief Function for setting UARTE baud rate.
*
- * @param p_reg Instance.
- * @param baudrate Baudrate.
+ * @param p_reg Pointer to the structure of registers of the peripheral.
+ * @param baudrate Baud rate.
*/
__STATIC_INLINE void nrf_uarte_baudrate_set(NRF_UARTE_Type * p_reg, nrf_uarte_baudrate_t baudrate);
/**
* @brief Function for setting the transmit buffer.
*
- * @param[in] p_reg Instance.
- * @param[in] p_buffer Pointer to the buffer with data to send.
- * @param[in] length Maximum number of data bytes to transmit.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] p_buffer Pointer to the buffer with data to send.
+ * @param[in] length Maximum number of data bytes to transmit.
*/
__STATIC_INLINE void nrf_uarte_tx_buffer_set(NRF_UARTE_Type * p_reg,
uint8_t const * p_buffer,
@@ -426,7 +409,7 @@
/**
* @brief Function for getting number of bytes transmitted in the last transaction.
*
- * @param[in] p_reg Instance.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @retval Amount of bytes transmitted.
*/
@@ -435,18 +418,18 @@
/**
* @brief Function for setting the receive buffer.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
- * @param[in] p_buffer Pointer to the buffer for received data.
- * @param[in] length Maximum number of data bytes to receive.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
+ * @param[in] p_buffer Pointer to the buffer for received data.
+ * @param[in] length Maximum number of data bytes to receive.
*/
__STATIC_INLINE void nrf_uarte_rx_buffer_set(NRF_UARTE_Type * p_reg,
- uint8_t * p_buffer,
- size_t length);
+ uint8_t * p_buffer,
+ size_t length);
/**
* @brief Function for getting number of bytes received in the last transaction.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @retval Amount of bytes received.
*/
@@ -460,7 +443,6 @@
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
(void)dummy;
#endif
-
}
__STATIC_INLINE bool nrf_uarte_event_check(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event)
@@ -474,29 +456,29 @@
return (uint32_t)((uint8_t *)p_reg + (uint32_t)event);
}
-__STATIC_INLINE void nrf_uarte_shorts_enable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask)
+__STATIC_INLINE void nrf_uarte_shorts_enable(NRF_UARTE_Type * p_reg, uint32_t mask)
{
- p_reg->SHORTS |= shorts_mask;
+ p_reg->SHORTS |= mask;
}
-__STATIC_INLINE void nrf_uarte_shorts_disable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask)
+__STATIC_INLINE void nrf_uarte_shorts_disable(NRF_UARTE_Type * p_reg, uint32_t mask)
{
- p_reg->SHORTS &= ~(shorts_mask);
+ p_reg->SHORTS &= ~(mask);
}
-__STATIC_INLINE void nrf_uarte_int_enable(NRF_UARTE_Type * p_reg, uint32_t int_mask)
+__STATIC_INLINE void nrf_uarte_int_enable(NRF_UARTE_Type * p_reg, uint32_t mask)
{
- p_reg->INTENSET = int_mask;
+ p_reg->INTENSET = mask;
}
-__STATIC_INLINE bool nrf_uarte_int_enable_check(NRF_UARTE_Type * p_reg, nrf_uarte_int_mask_t int_mask)
+__STATIC_INLINE bool nrf_uarte_int_enable_check(NRF_UARTE_Type * p_reg, nrf_uarte_int_mask_t mask)
{
- return (bool)(p_reg->INTENSET & int_mask);
+ return (bool)(p_reg->INTENSET & mask);
}
-__STATIC_INLINE void nrf_uarte_int_disable(NRF_UARTE_Type * p_reg, uint32_t int_mask)
+__STATIC_INLINE void nrf_uarte_int_disable(NRF_UARTE_Type * p_reg, uint32_t mask)
{
- p_reg->INTENCLR = int_mask;
+ p_reg->INTENCLR = mask;
}
#if defined(DPPI_PRESENT)
@@ -599,8 +581,8 @@
}
__STATIC_INLINE void nrf_uarte_configure(NRF_UARTE_Type * p_reg,
- nrf_uarte_parity_t parity,
- nrf_uarte_hwfc_t hwfc)
+ nrf_uarte_parity_t parity,
+ nrf_uarte_hwfc_t hwfc)
{
p_reg->CONFIG = (uint32_t)parity | (uint32_t)hwfc;
}
@@ -624,8 +606,8 @@
}
__STATIC_INLINE void nrf_uarte_rx_buffer_set(NRF_UARTE_Type * p_reg,
- uint8_t * p_buffer,
- size_t length)
+ uint8_t * p_buffer,
+ size_t length)
{
p_reg->RXD.PTR = (uint32_t)p_buffer;
p_reg->RXD.MAXCNT = length;
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_usbd.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_usbd.h
index 1f87cc7..99dde35 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_usbd.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_usbd.h
@@ -46,46 +46,39 @@
* peripheral.
*/
-/**
- * @brief USBD tasks
- */
+/** @brief USBD tasks. */
typedef enum
{
- /*lint -save -e30*/
- NRF_USBD_TASK_STARTEPIN0 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[0] ), /**< Captures the EPIN[0].PTR, EPIN[0].MAXCNT and EPIN[0].CONFIG registers values, and enables control endpoint IN 0 to respond to traffic from host */
- NRF_USBD_TASK_STARTEPIN1 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[1] ), /**< Captures the EPIN[1].PTR, EPIN[1].MAXCNT and EPIN[1].CONFIG registers values, and enables data endpoint IN 1 to respond to traffic from host */
- NRF_USBD_TASK_STARTEPIN2 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[2] ), /**< Captures the EPIN[2].PTR, EPIN[2].MAXCNT and EPIN[2].CONFIG registers values, and enables data endpoint IN 2 to respond to traffic from host */
- NRF_USBD_TASK_STARTEPIN3 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[3] ), /**< Captures the EPIN[3].PTR, EPIN[3].MAXCNT and EPIN[3].CONFIG registers values, and enables data endpoint IN 3 to respond to traffic from host */
- NRF_USBD_TASK_STARTEPIN4 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[4] ), /**< Captures the EPIN[4].PTR, EPIN[4].MAXCNT and EPIN[4].CONFIG registers values, and enables data endpoint IN 4 to respond to traffic from host */
- NRF_USBD_TASK_STARTEPIN5 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[5] ), /**< Captures the EPIN[5].PTR, EPIN[5].MAXCNT and EPIN[5].CONFIG registers values, and enables data endpoint IN 5 to respond to traffic from host */
- NRF_USBD_TASK_STARTEPIN6 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[6] ), /**< Captures the EPIN[6].PTR, EPIN[6].MAXCNT and EPIN[6].CONFIG registers values, and enables data endpoint IN 6 to respond to traffic from host */
- NRF_USBD_TASK_STARTEPIN7 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[7] ), /**< Captures the EPIN[7].PTR, EPIN[7].MAXCNT and EPIN[7].CONFIG registers values, and enables data endpoint IN 7 to respond to traffic from host */
- NRF_USBD_TASK_STARTISOIN = offsetof(NRF_USBD_Type, TASKS_STARTISOIN ), /**< Captures the ISOIN.PTR, ISOIN.MAXCNT and ISOIN.CONFIG registers values, and enables sending data on iso endpoint 8 */
- NRF_USBD_TASK_STARTEPOUT0 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[0]), /**< Captures the EPOUT[0].PTR, EPOUT[0].MAXCNT and EPOUT[0].CONFIG registers values, and enables control endpoint 0 to respond to traffic from host */
- NRF_USBD_TASK_STARTEPOUT1 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[1]), /**< Captures the EPOUT[1].PTR, EPOUT[1].MAXCNT and EPOUT[1].CONFIG registers values, and enables data endpoint 1 to respond to traffic from host */
- NRF_USBD_TASK_STARTEPOUT2 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[2]), /**< Captures the EPOUT[2].PTR, EPOUT[2].MAXCNT and EPOUT[2].CONFIG registers values, and enables data endpoint 2 to respond to traffic from host */
- NRF_USBD_TASK_STARTEPOUT3 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[3]), /**< Captures the EPOUT[3].PTR, EPOUT[3].MAXCNT and EPOUT[3].CONFIG registers values, and enables data endpoint 3 to respond to traffic from host */
- NRF_USBD_TASK_STARTEPOUT4 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[4]), /**< Captures the EPOUT[4].PTR, EPOUT[4].MAXCNT and EPOUT[4].CONFIG registers values, and enables data endpoint 4 to respond to traffic from host */
- NRF_USBD_TASK_STARTEPOUT5 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[5]), /**< Captures the EPOUT[5].PTR, EPOUT[5].MAXCNT and EPOUT[5].CONFIG registers values, and enables data endpoint 5 to respond to traffic from host */
- NRF_USBD_TASK_STARTEPOUT6 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[6]), /**< Captures the EPOUT[6].PTR, EPOUT[6].MAXCNT and EPOUT[6].CONFIG registers values, and enables data endpoint 6 to respond to traffic from host */
- NRF_USBD_TASK_STARTEPOUT7 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[7]), /**< Captures the EPOUT[7].PTR, EPOUT[7].MAXCNT and EPOUT[7].CONFIG registers values, and enables data endpoint 7 to respond to traffic from host */
- NRF_USBD_TASK_STARTISOOUT = offsetof(NRF_USBD_Type, TASKS_STARTISOOUT ), /**< Captures the ISOOUT.PTR, ISOOUT.MAXCNT and ISOOUT.CONFIG registers values, and enables receiving of data on iso endpoint 8 */
- NRF_USBD_TASK_EP0RCVOUT = offsetof(NRF_USBD_Type, TASKS_EP0RCVOUT ), /**< Allows OUT data stage on control endpoint 0 */
- NRF_USBD_TASK_EP0STATUS = offsetof(NRF_USBD_Type, TASKS_EP0STATUS ), /**< Allows status stage on control endpoint 0 */
- NRF_USBD_TASK_EP0STALL = offsetof(NRF_USBD_Type, TASKS_EP0STALL ), /**< STALLs data and status stage on control endpoint 0 */
- NRF_USBD_TASK_DRIVEDPDM = offsetof(NRF_USBD_Type, TASKS_DPDMDRIVE ), /**< Forces D+ and D-lines to the state defined in the DPDMVALUE register */
- NRF_USBD_TASK_NODRIVEDPDM = offsetof(NRF_USBD_Type, TASKS_DPDMNODRIVE ), /**< Stops forcing D+ and D- lines to any state (USB engine takes control) */
- /*lint -restore*/
+ NRF_USBD_TASK_STARTEPIN0 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[0] ), /**< Captures the EPIN[0].PTR, EPIN[0].MAXCNT, and EPIN[0].CONFIG registers values, and enables control endpoint IN 0 to respond to traffic from host. */
+ NRF_USBD_TASK_STARTEPIN1 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[1] ), /**< Captures the EPIN[1].PTR, EPIN[1].MAXCNT, and EPIN[1].CONFIG registers values, and enables data endpoint IN 1 to respond to traffic from host. */
+ NRF_USBD_TASK_STARTEPIN2 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[2] ), /**< Captures the EPIN[2].PTR, EPIN[2].MAXCNT, and EPIN[2].CONFIG registers values, and enables data endpoint IN 2 to respond to traffic from host. */
+ NRF_USBD_TASK_STARTEPIN3 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[3] ), /**< Captures the EPIN[3].PTR, EPIN[3].MAXCNT, and EPIN[3].CONFIG registers values, and enables data endpoint IN 3 to respond to traffic from host. */
+ NRF_USBD_TASK_STARTEPIN4 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[4] ), /**< Captures the EPIN[4].PTR, EPIN[4].MAXCNT, and EPIN[4].CONFIG registers values, and enables data endpoint IN 4 to respond to traffic from host. */
+ NRF_USBD_TASK_STARTEPIN5 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[5] ), /**< Captures the EPIN[5].PTR, EPIN[5].MAXCNT, and EPIN[5].CONFIG registers values, and enables data endpoint IN 5 to respond to traffic from host. */
+ NRF_USBD_TASK_STARTEPIN6 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[6] ), /**< Captures the EPIN[6].PTR, EPIN[6].MAXCNT, and EPIN[6].CONFIG registers values, and enables data endpoint IN 6 to respond to traffic from host. */
+ NRF_USBD_TASK_STARTEPIN7 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[7] ), /**< Captures the EPIN[7].PTR, EPIN[7].MAXCNT, and EPIN[7].CONFIG registers values, and enables data endpoint IN 7 to respond to traffic from host. */
+ NRF_USBD_TASK_STARTISOIN = offsetof(NRF_USBD_Type, TASKS_STARTISOIN ), /**< Captures the ISOIN.PTR, ISOIN.MAXCNT, and ISOIN.CONFIG registers values, and enables sending data on ISO endpoint 8. */
+ NRF_USBD_TASK_STARTEPOUT0 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[0]), /**< Captures the EPOUT[0].PTR, EPOUT[0].MAXCNT, and EPOUT[0].CONFIG registers values, and enables control endpoint 0 to respond to traffic from host. */
+ NRF_USBD_TASK_STARTEPOUT1 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[1]), /**< Captures the EPOUT[1].PTR, EPOUT[1].MAXCNT, and EPOUT[1].CONFIG registers values, and enables data endpoint 1 to respond to traffic from host. */
+ NRF_USBD_TASK_STARTEPOUT2 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[2]), /**< Captures the EPOUT[2].PTR, EPOUT[2].MAXCNT, and EPOUT[2].CONFIG registers values, and enables data endpoint 2 to respond to traffic from host. */
+ NRF_USBD_TASK_STARTEPOUT3 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[3]), /**< Captures the EPOUT[3].PTR, EPOUT[3].MAXCNT, and EPOUT[3].CONFIG registers values, and enables data endpoint 3 to respond to traffic from host. */
+ NRF_USBD_TASK_STARTEPOUT4 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[4]), /**< Captures the EPOUT[4].PTR, EPOUT[4].MAXCNT, and EPOUT[4].CONFIG registers values, and enables data endpoint 4 to respond to traffic from host. */
+ NRF_USBD_TASK_STARTEPOUT5 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[5]), /**< Captures the EPOUT[5].PTR, EPOUT[5].MAXCNT, and EPOUT[5].CONFIG registers values, and enables data endpoint 5 to respond to traffic from host. */
+ NRF_USBD_TASK_STARTEPOUT6 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[6]), /**< Captures the EPOUT[6].PTR, EPOUT[6].MAXCNT, and EPOUT[6].CONFIG registers values, and enables data endpoint 6 to respond to traffic from host. */
+ NRF_USBD_TASK_STARTEPOUT7 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[7]), /**< Captures the EPOUT[7].PTR, EPOUT[7].MAXCNT, and EPOUT[7].CONFIG registers values, and enables data endpoint 7 to respond to traffic from host. */
+ NRF_USBD_TASK_STARTISOOUT = offsetof(NRF_USBD_Type, TASKS_STARTISOOUT ), /**< Captures the ISOOUT.PTR, ISOOUT.MAXCNT, and ISOOUT.CONFIG registers values, and enables receiving of data on ISO endpoint 8. */
+ NRF_USBD_TASK_EP0RCVOUT = offsetof(NRF_USBD_Type, TASKS_EP0RCVOUT ), /**< Allows OUT data stage on the control endpoint 0. */
+ NRF_USBD_TASK_EP0STATUS = offsetof(NRF_USBD_Type, TASKS_EP0STATUS ), /**< Allows status stage on the control endpoint 0. */
+ NRF_USBD_TASK_EP0STALL = offsetof(NRF_USBD_Type, TASKS_EP0STALL ), /**< STALLs data and status stage on the control endpoint 0. */
+ NRF_USBD_TASK_DRIVEDPDM = offsetof(NRF_USBD_Type, TASKS_DPDMDRIVE ), /**< Forces D+ and D-lines to the state defined in the DPDMVALUE register. */
+ NRF_USBD_TASK_NODRIVEDPDM = offsetof(NRF_USBD_Type, TASKS_DPDMNODRIVE ), /**< Stops forcing D+ and D- lines to any state (USB engine takes control). */
}nrf_usbd_task_t;
-/**
- * @brief USBD events
- */
+/** @brief USBD events. */
typedef enum
{
- /*lint -save -e30*/
- NRF_USBD_EVENT_USBRESET = offsetof(NRF_USBD_Type, EVENTS_USBRESET ), /**< Signals that a USB reset condition has been detected on the USB lines */
- NRF_USBD_EVENT_STARTED = offsetof(NRF_USBD_Type, EVENTS_STARTED ), /**< Confirms that the EPIN[n].PTR, EPIN[n].MAXCNT, EPIN[n].CONFIG, or EPOUT[n].PTR, EPOUT[n].MAXCNT and EPOUT[n].CONFIG registers have been captured on all endpoints reported in the EPSTATUS register */
+ NRF_USBD_EVENT_USBRESET = offsetof(NRF_USBD_Type, EVENTS_USBRESET ), /**< Signals that a USB reset condition is detected on the USB lines. */
+ NRF_USBD_EVENT_STARTED = offsetof(NRF_USBD_Type, EVENTS_STARTED ), /**< Confirms that the EPIN[n].PTR, EPIN[n].MAXCNT, EPIN[n].CONFIG, or EPOUT[n].PTR, EPOUT[n].MAXCNT, and EPOUT[n].CONFIG registers have been captured on all endpoints reported in the EPSTATUS register. */
NRF_USBD_EVENT_ENDEPIN0 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[0] ), /**< The whole EPIN[0] buffer has been consumed. The RAM buffer can be accessed safely by software. */
NRF_USBD_EVENT_ENDEPIN1 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[1] ), /**< The whole EPIN[1] buffer has been consumed. The RAM buffer can be accessed safely by software. */
NRF_USBD_EVENT_ENDEPIN2 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[2] ), /**< The whole EPIN[2] buffer has been consumed. The RAM buffer can be accessed safely by software. */
@@ -94,7 +87,7 @@
NRF_USBD_EVENT_ENDEPIN5 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[5] ), /**< The whole EPIN[5] buffer has been consumed. The RAM buffer can be accessed safely by software. */
NRF_USBD_EVENT_ENDEPIN6 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[6] ), /**< The whole EPIN[6] buffer has been consumed. The RAM buffer can be accessed safely by software. */
NRF_USBD_EVENT_ENDEPIN7 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[7] ), /**< The whole EPIN[7] buffer has been consumed. The RAM buffer can be accessed safely by software. */
- NRF_USBD_EVENT_EP0DATADONE = offsetof(NRF_USBD_Type, EVENTS_EP0DATADONE), /**< An acknowledged data transfer has taken place on the control endpoint */
+ NRF_USBD_EVENT_EP0DATADONE = offsetof(NRF_USBD_Type, EVENTS_EP0DATADONE), /**< An acknowledged data transfer has taken place on the control endpoint. */
NRF_USBD_EVENT_ENDISOIN0 = offsetof(NRF_USBD_Type, EVENTS_ENDISOIN ), /**< The whole ISOIN buffer has been consumed. The RAM buffer can be accessed safely by software. */
NRF_USBD_EVENT_ENDEPOUT0 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[0]), /**< The whole EPOUT[0] buffer has been consumed. The RAM buffer can be accessed safely by software. */
NRF_USBD_EVENT_ENDEPOUT1 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[1]), /**< The whole EPOUT[1] buffer has been consumed. The RAM buffer can be accessed safely by software. */
@@ -105,67 +98,62 @@
NRF_USBD_EVENT_ENDEPOUT6 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[6]), /**< The whole EPOUT[6] buffer has been consumed. The RAM buffer can be accessed safely by software. */
NRF_USBD_EVENT_ENDEPOUT7 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[7]), /**< The whole EPOUT[7] buffer has been consumed. The RAM buffer can be accessed safely by software. */
NRF_USBD_EVENT_ENDISOOUT0 = offsetof(NRF_USBD_Type, EVENTS_ENDISOOUT ), /**< The whole ISOOUT buffer has been consumed. The RAM buffer can be accessed safely by software. */
- NRF_USBD_EVENT_SOF = offsetof(NRF_USBD_Type, EVENTS_SOF ), /**< Signals that a SOF (start of frame) condition has been detected on the USB lines */
- NRF_USBD_EVENT_USBEVENT = offsetof(NRF_USBD_Type, EVENTS_USBEVENT ), /**< An event or an error not covered by specific events has occurred, check EVENTCAUSE register to find the cause */
- NRF_USBD_EVENT_EP0SETUP = offsetof(NRF_USBD_Type, EVENTS_EP0SETUP ), /**< A valid SETUP token has been received (and acknowledged) on the control endpoint */
- NRF_USBD_EVENT_DATAEP = offsetof(NRF_USBD_Type, EVENTS_EPDATA ), /**< A data transfer has occurred on a data endpoint, indicated by the EPDATASTATUS register */
- /*lint -restore*/
+ NRF_USBD_EVENT_SOF = offsetof(NRF_USBD_Type, EVENTS_SOF ), /**< Signals that a SOF (start of frame) condition has been detected on the USB lines. */
+ NRF_USBD_EVENT_USBEVENT = offsetof(NRF_USBD_Type, EVENTS_USBEVENT ), /**< An event or an error not covered by the specified events has occurred, check EVENTCAUSE register to find the cause. */
+ NRF_USBD_EVENT_EP0SETUP = offsetof(NRF_USBD_Type, EVENTS_EP0SETUP ), /**< A valid SETUP token has been received (and acknowledged) on the control endpoint. */
+ NRF_USBD_EVENT_DATAEP = offsetof(NRF_USBD_Type, EVENTS_EPDATA ), /**< A data transfer has occurred on a data endpoint, indicated by the EPDATASTATUS register. */
}nrf_usbd_event_t;
-/**
- * @brief USBD shorts
- */
+/** @brief USBD shorts. */
typedef enum
{
- NRF_USBD_SHORT_EP0DATADONE_STARTEPIN0_MASK = USBD_SHORTS_EP0DATADONE_STARTEPIN0_Msk , /**< Shortcut between EP0DATADONE event and STARTEPIN0 task */
- NRF_USBD_SHORT_EP0DATADONE_STARTEPOUT0_MASK = USBD_SHORTS_EP0DATADONE_STARTEPOUT0_Msk, /**< Shortcut between EP0DATADONE event and STARTEPOUT0 task */
- NRF_USBD_SHORT_EP0DATADONE_EP0STATUS_MASK = USBD_SHORTS_EP0DATADONE_EP0STATUS_Msk , /**< Shortcut between EP0DATADONE event and EP0STATUS task */
- NRF_USBD_SHORT_ENDEPOUT0_EP0STATUS_MASK = USBD_SHORTS_ENDEPOUT0_EP0STATUS_Msk , /**< Shortcut between ENDEPOUT[0] event and EP0STATUS task */
- NRF_USBD_SHORT_ENDEPOUT0_EP0RCVOUT_MASK = USBD_SHORTS_ENDEPOUT0_EP0RCVOUT_Msk , /**< Shortcut between ENDEPOUT[0] event and EP0RCVOUT task */
+ NRF_USBD_SHORT_EP0DATADONE_STARTEPIN0_MASK = USBD_SHORTS_EP0DATADONE_STARTEPIN0_Msk , /**< Shortcut between EP0DATADONE event and STARTEPIN0 task. */
+ NRF_USBD_SHORT_EP0DATADONE_STARTEPOUT0_MASK = USBD_SHORTS_EP0DATADONE_STARTEPOUT0_Msk, /**< Shortcut between EP0DATADONE event and STARTEPOUT0 task. */
+ NRF_USBD_SHORT_EP0DATADONE_EP0STATUS_MASK = USBD_SHORTS_EP0DATADONE_EP0STATUS_Msk , /**< Shortcut between EP0DATADONE event and EP0STATUS task. */
+ NRF_USBD_SHORT_ENDEPOUT0_EP0STATUS_MASK = USBD_SHORTS_ENDEPOUT0_EP0STATUS_Msk , /**< Shortcut between ENDEPOUT[0] event and EP0STATUS task. */
+ NRF_USBD_SHORT_ENDEPOUT0_EP0RCVOUT_MASK = USBD_SHORTS_ENDEPOUT0_EP0RCVOUT_Msk , /**< Shortcut between ENDEPOUT[0] event and EP0RCVOUT task. */
}nrf_usbd_short_mask_t;
-/**
- * @brief USBD interrupts
- */
+/** @brief USBD interrupts. */
typedef enum
{
- NRF_USBD_INT_USBRESET_MASK = USBD_INTEN_USBRESET_Msk , /**< Enable or disable interrupt for USBRESET event */
- NRF_USBD_INT_STARTED_MASK = USBD_INTEN_STARTED_Msk , /**< Enable or disable interrupt for STARTED event */
- NRF_USBD_INT_ENDEPIN0_MASK = USBD_INTEN_ENDEPIN0_Msk , /**< Enable or disable interrupt for ENDEPIN[0] event */
- NRF_USBD_INT_ENDEPIN1_MASK = USBD_INTEN_ENDEPIN1_Msk , /**< Enable or disable interrupt for ENDEPIN[1] event */
- NRF_USBD_INT_ENDEPIN2_MASK = USBD_INTEN_ENDEPIN2_Msk , /**< Enable or disable interrupt for ENDEPIN[2] event */
- NRF_USBD_INT_ENDEPIN3_MASK = USBD_INTEN_ENDEPIN3_Msk , /**< Enable or disable interrupt for ENDEPIN[3] event */
- NRF_USBD_INT_ENDEPIN4_MASK = USBD_INTEN_ENDEPIN4_Msk , /**< Enable or disable interrupt for ENDEPIN[4] event */
- NRF_USBD_INT_ENDEPIN5_MASK = USBD_INTEN_ENDEPIN5_Msk , /**< Enable or disable interrupt for ENDEPIN[5] event */
- NRF_USBD_INT_ENDEPIN6_MASK = USBD_INTEN_ENDEPIN6_Msk , /**< Enable or disable interrupt for ENDEPIN[6] event */
- NRF_USBD_INT_ENDEPIN7_MASK = USBD_INTEN_ENDEPIN7_Msk , /**< Enable or disable interrupt for ENDEPIN[7] event */
- NRF_USBD_INT_EP0DATADONE_MASK = USBD_INTEN_EP0DATADONE_Msk, /**< Enable or disable interrupt for EP0DATADONE event */
- NRF_USBD_INT_ENDISOIN0_MASK = USBD_INTEN_ENDISOIN_Msk , /**< Enable or disable interrupt for ENDISOIN[0] event */
- NRF_USBD_INT_ENDEPOUT0_MASK = USBD_INTEN_ENDEPOUT0_Msk , /**< Enable or disable interrupt for ENDEPOUT[0] event */
- NRF_USBD_INT_ENDEPOUT1_MASK = USBD_INTEN_ENDEPOUT1_Msk , /**< Enable or disable interrupt for ENDEPOUT[1] event */
- NRF_USBD_INT_ENDEPOUT2_MASK = USBD_INTEN_ENDEPOUT2_Msk , /**< Enable or disable interrupt for ENDEPOUT[2] event */
- NRF_USBD_INT_ENDEPOUT3_MASK = USBD_INTEN_ENDEPOUT3_Msk , /**< Enable or disable interrupt for ENDEPOUT[3] event */
- NRF_USBD_INT_ENDEPOUT4_MASK = USBD_INTEN_ENDEPOUT4_Msk , /**< Enable or disable interrupt for ENDEPOUT[4] event */
- NRF_USBD_INT_ENDEPOUT5_MASK = USBD_INTEN_ENDEPOUT5_Msk , /**< Enable or disable interrupt for ENDEPOUT[5] event */
- NRF_USBD_INT_ENDEPOUT6_MASK = USBD_INTEN_ENDEPOUT6_Msk , /**< Enable or disable interrupt for ENDEPOUT[6] event */
- NRF_USBD_INT_ENDEPOUT7_MASK = USBD_INTEN_ENDEPOUT7_Msk , /**< Enable or disable interrupt for ENDEPOUT[7] event */
- NRF_USBD_INT_ENDISOOUT0_MASK = USBD_INTEN_ENDISOOUT_Msk , /**< Enable or disable interrupt for ENDISOOUT[0] event */
- NRF_USBD_INT_SOF_MASK = USBD_INTEN_SOF_Msk , /**< Enable or disable interrupt for SOF event */
- NRF_USBD_INT_USBEVENT_MASK = USBD_INTEN_USBEVENT_Msk , /**< Enable or disable interrupt for USBEVENT event */
- NRF_USBD_INT_EP0SETUP_MASK = USBD_INTEN_EP0SETUP_Msk , /**< Enable or disable interrupt for EP0SETUP event */
- NRF_USBD_INT_DATAEP_MASK = USBD_INTEN_EPDATA_Msk , /**< Enable or disable interrupt for EPDATA event */
+ NRF_USBD_INT_USBRESET_MASK = USBD_INTEN_USBRESET_Msk , /**< Enable or disable interrupt for USBRESET event. */
+ NRF_USBD_INT_STARTED_MASK = USBD_INTEN_STARTED_Msk , /**< Enable or disable interrupt for STARTED event. */
+ NRF_USBD_INT_ENDEPIN0_MASK = USBD_INTEN_ENDEPIN0_Msk , /**< Enable or disable interrupt for ENDEPIN[0] event. */
+ NRF_USBD_INT_ENDEPIN1_MASK = USBD_INTEN_ENDEPIN1_Msk , /**< Enable or disable interrupt for ENDEPIN[1] event. */
+ NRF_USBD_INT_ENDEPIN2_MASK = USBD_INTEN_ENDEPIN2_Msk , /**< Enable or disable interrupt for ENDEPIN[2] event. */
+ NRF_USBD_INT_ENDEPIN3_MASK = USBD_INTEN_ENDEPIN3_Msk , /**< Enable or disable interrupt for ENDEPIN[3] event. */
+ NRF_USBD_INT_ENDEPIN4_MASK = USBD_INTEN_ENDEPIN4_Msk , /**< Enable or disable interrupt for ENDEPIN[4] event. */
+ NRF_USBD_INT_ENDEPIN5_MASK = USBD_INTEN_ENDEPIN5_Msk , /**< Enable or disable interrupt for ENDEPIN[5] event. */
+ NRF_USBD_INT_ENDEPIN6_MASK = USBD_INTEN_ENDEPIN6_Msk , /**< Enable or disable interrupt for ENDEPIN[6] event. */
+ NRF_USBD_INT_ENDEPIN7_MASK = USBD_INTEN_ENDEPIN7_Msk , /**< Enable or disable interrupt for ENDEPIN[7] event. */
+ NRF_USBD_INT_EP0DATADONE_MASK = USBD_INTEN_EP0DATADONE_Msk, /**< Enable or disable interrupt for EP0DATADONE event. */
+ NRF_USBD_INT_ENDISOIN0_MASK = USBD_INTEN_ENDISOIN_Msk , /**< Enable or disable interrupt for ENDISOIN[0] event. */
+ NRF_USBD_INT_ENDEPOUT0_MASK = USBD_INTEN_ENDEPOUT0_Msk , /**< Enable or disable interrupt for ENDEPOUT[0] event. */
+ NRF_USBD_INT_ENDEPOUT1_MASK = USBD_INTEN_ENDEPOUT1_Msk , /**< Enable or disable interrupt for ENDEPOUT[1] event. */
+ NRF_USBD_INT_ENDEPOUT2_MASK = USBD_INTEN_ENDEPOUT2_Msk , /**< Enable or disable interrupt for ENDEPOUT[2] event. */
+ NRF_USBD_INT_ENDEPOUT3_MASK = USBD_INTEN_ENDEPOUT3_Msk , /**< Enable or disable interrupt for ENDEPOUT[3] event. */
+ NRF_USBD_INT_ENDEPOUT4_MASK = USBD_INTEN_ENDEPOUT4_Msk , /**< Enable or disable interrupt for ENDEPOUT[4] event. */
+ NRF_USBD_INT_ENDEPOUT5_MASK = USBD_INTEN_ENDEPOUT5_Msk , /**< Enable or disable interrupt for ENDEPOUT[5] event. */
+ NRF_USBD_INT_ENDEPOUT6_MASK = USBD_INTEN_ENDEPOUT6_Msk , /**< Enable or disable interrupt for ENDEPOUT[6] event. */
+ NRF_USBD_INT_ENDEPOUT7_MASK = USBD_INTEN_ENDEPOUT7_Msk , /**< Enable or disable interrupt for ENDEPOUT[7] event. */
+ NRF_USBD_INT_ENDISOOUT0_MASK = USBD_INTEN_ENDISOOUT_Msk , /**< Enable or disable interrupt for ENDISOOUT[0] event. */
+ NRF_USBD_INT_SOF_MASK = USBD_INTEN_SOF_Msk , /**< Enable or disable interrupt for SOF event. */
+ NRF_USBD_INT_USBEVENT_MASK = USBD_INTEN_USBEVENT_Msk , /**< Enable or disable interrupt for USBEVENT event. */
+ NRF_USBD_INT_EP0SETUP_MASK = USBD_INTEN_EP0SETUP_Msk , /**< Enable or disable interrupt for EP0SETUP event. */
+ NRF_USBD_INT_DATAEP_MASK = USBD_INTEN_EPDATA_Msk , /**< Enable or disable interrupt for EPDATA event. */
}nrf_usbd_int_mask_t;
/**
- * @brief Function for activating a specific USBD task.
+ * @brief Function for activating the specified USBD task.
*
- * @param task Task.
+ * @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_usbd_task_trigger(nrf_usbd_task_t task);
/**
- * @brief Function for returning the address of a specific USBD task register.
+ * @brief Function for returning the address of the specified USBD task register.
*
* @param task Task.
*
@@ -174,96 +162,96 @@
__STATIC_INLINE uint32_t nrf_usbd_task_address_get(nrf_usbd_task_t task);
/**
- * @brief Function for clearing a specific event.
+ * @brief Function for clearing the specified event.
*
* @param event Event.
*/
__STATIC_INLINE void nrf_usbd_event_clear(nrf_usbd_event_t event);
/**
- * @brief Function for returning the state of a specific event.
+ * @brief Function for retrieving the state of the USBD event.
*
- * @param event Event.
+ * @param[in] event Event to be checked.
*
- * @retval true If the event is set.
- * @retval false If the event is not set.
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_usbd_event_check(nrf_usbd_event_t event);
/**
- * @brief Function for getting and clearing the state of specific event
+ * @brief Function for getting and clearing the state of the specified event.
*
* This function checks the state of the event and clears it.
*
- * @param event Event.
+ * @param event Event.
*
- * @retval true If the event was set.
- * @retval false If the event was not set.
+ * @retval true The event was set.
+ * @retval false The event was not set.
*/
__STATIC_INLINE bool nrf_usbd_event_get_and_clear(nrf_usbd_event_t event);
/**
- * @brief Function for returning the address of a specific USBD event register.
+ * @brief Function for returning the address of the specified USBD event register.
*
- * @param event Event.
+ * @param event Event.
*
* @return Address.
*/
__STATIC_INLINE uint32_t nrf_usbd_event_address_get(nrf_usbd_event_t event);
/**
- * @brief Function for setting a shortcut.
+ * @brief Function for setting shortcuts.
*
- * @param short_mask Shortcuts mask.
+ * @param mask Shortcut mask.
*/
-__STATIC_INLINE void nrf_usbd_shorts_enable(uint32_t short_mask);
+__STATIC_INLINE void nrf_usbd_shorts_enable(uint32_t mask);
/**
* @brief Function for clearing shortcuts.
*
- * @param short_mask Shortcuts mask.
+ * @param mask Shortcut mask.
*/
-__STATIC_INLINE void nrf_usbd_shorts_disable(uint32_t short_mask);
+__STATIC_INLINE void nrf_usbd_shorts_disable(uint32_t mask);
/**
- * @brief Get the shorts mask
+ * @brief Function for getting the shortcut mask.
*
- * Function returns shorts register.
+ * Function returns shortcut register.
*
- * @return Flags of currently enabled shortcuts
+ * @return Flags of the currently enabled shortcuts.
*/
__STATIC_INLINE uint32_t nrf_usbd_shorts_get(void);
/**
- * @brief Function for enabling selected interrupts.
+ * @brief Function for enabling the selected interrupts.
*
- * @param int_mask Interrupts mask.
+ * @param mask Mask of interrupts to be enabled.
*/
-__STATIC_INLINE void nrf_usbd_int_enable(uint32_t int_mask);
+__STATIC_INLINE void nrf_usbd_int_enable(uint32_t mask);
/**
- * @brief Function for retrieving the state of selected interrupts.
+ * @brief Function for retrieving the state of the selected interrupts.
*
- * @param int_mask Interrupts mask.
+ * @param mask Mask of interrupts to be checked.
*
- * @retval true If any of selected interrupts is enabled.
- * @retval false If none of selected interrupts is enabled.
+ * @retval true Any of selected interrupts is enabled.
+ * @retval false None of selected interrupts is enabled.
*/
-__STATIC_INLINE bool nrf_usbd_int_enable_check(uint32_t int_mask);
+__STATIC_INLINE bool nrf_usbd_int_enable_check(uint32_t mask);
/**
- * @brief Function for retrieving the information about enabled interrupts.
+ * @brief Function for retrieving the information about the enabled interrupts.
*
- * @return The flags of enabled interrupts.
+ * @return The flags of the enabled interrupts.
*/
__STATIC_INLINE uint32_t nrf_usbd_int_enable_get(void);
/**
- * @brief Function for disabling selected interrupts.
+ * @brief Function for disabling the selected interrupts.
*
- * @param int_mask Interrupts mask.
+ * @param mask Mask of interrupts to be disabled.
*/
-__STATIC_INLINE void nrf_usbd_int_disable(uint32_t int_mask);
+__STATIC_INLINE void nrf_usbd_int_disable(uint32_t mask);
/** @} */ /* End of nrf_usbd_hal */
@@ -277,12 +265,12 @@
/**
* @internal
- * @brief Internal function for getting task/event register address
+ * @brief Internal function for getting the register address of task or event.
*
- * @oaram offset Offset of the register from the instance beginning
+ * @param[in] offset Offset of the register from the beginning of the instance.
*
- * @attention offset has to be modulo 4 value. In other case we can get hardware fault.
- * @return Pointer to the register
+ * @attention The offset must be aligned to 4. In other case, hardware fault can occur.
+ * @return Pointer to the register.
*/
__STATIC_INLINE volatile uint32_t* nrf_usbd_getRegPtr(uint32_t offset)
{
@@ -291,12 +279,12 @@
/**
* @internal
- * @brief Internal function for getting task/event register address - constant version
+ * @brief Internal function for getting the register address of task or event - constant version.
*
- * @oaram offset Offset of the register from the instance beginning
+ * @param[in] offset Offset of the register from the beginning of the instance.
*
- * @attention offset has to be modulo 4 value. In other case we can get hardware fault.
- * @return Pointer to the register
+ * @attention The offset must be aligned to 4. In other case, hardware fault can occur.
+ * @return Pointer to the register.
*/
__STATIC_INLINE volatile const uint32_t* nrf_usbd_getRegPtr_c(uint32_t offset)
{
@@ -346,21 +334,21 @@
return (uint32_t)nrf_usbd_getRegPtr_c((uint32_t)event);
}
-void nrf_usbd_shorts_enable(uint32_t short_mask)
+void nrf_usbd_shorts_enable(uint32_t mask)
{
- NRF_USBD->SHORTS |= short_mask;
+ NRF_USBD->SHORTS |= mask;
}
-void nrf_usbd_shorts_disable(uint32_t short_mask)
+void nrf_usbd_shorts_disable(uint32_t mask)
{
- if (~0U == short_mask)
+ if (~0U == mask)
{
/* Optimized version for "disable all" */
NRF_USBD->SHORTS = 0;
}
else
{
- NRF_USBD->SHORTS &= ~short_mask;
+ NRF_USBD->SHORTS &= ~mask;
}
}
@@ -369,14 +357,14 @@
return NRF_USBD->SHORTS;
}
-void nrf_usbd_int_enable(uint32_t int_mask)
+void nrf_usbd_int_enable(uint32_t mask)
{
- NRF_USBD->INTENSET = int_mask;
+ NRF_USBD->INTENSET = mask;
}
-bool nrf_usbd_int_enable_check(uint32_t int_mask)
+bool nrf_usbd_int_enable_check(uint32_t mask)
{
- return !!(NRF_USBD->INTENSET & int_mask);
+ return !!(NRF_USBD->INTENSET & mask);
}
uint32_t nrf_usbd_int_enable_get(void)
@@ -384,9 +372,9 @@
return NRF_USBD->INTENSET;
}
-void nrf_usbd_int_disable(uint32_t int_mask)
+void nrf_usbd_int_disable(uint32_t mask)
{
- NRF_USBD->INTENCLR = int_mask;
+ NRF_USBD->INTENCLR = mask;
}
#endif /* SUPPRESS_INLINE_IMPLEMENTATION */
@@ -401,9 +389,9 @@
*/
/**
- * @brief Frame counter size
+ * @brief Frame counter size.
*
- * The number of counts that can be fitted into frame counter
+ * The number of counts that can be fitted into frame counter.
*/
#define NRF_USBD_FRAMECNTR_SIZE \
( (USBD_FRAMECNTR_FRAMECNTR_Msk >> USBD_FRAMECNTR_FRAMECNTR_Pos) + 1UL )
@@ -412,103 +400,105 @@
#endif
/**
- * @brief First isochronous endpoint number
+ * @brief First isochronous endpoint number.
*
- * The number of the first isochronous endpoint
+ * The number of the first isochronous endpoint.
*/
#define NRF_USBD_EPISO_FIRST 8
/**
- * @brief Total number of IN endpoints
+ * @brief Total number of IN endpoints.
*
* Total number of IN endpoint (including ISOCHRONOUS).
*/
#define NRF_USBD_EPIN_CNT 9
/**
- * @brief Total number of OUT endpoints
+ * @brief Total number of OUT endpoints.
*
* Total number of OUT endpoint (including ISOCHRONOUS).
*/
#define NRF_USBD_EPOUT_CNT 9
-/**
- * @brief Mask of the direction bit in endpoint number
- */
+/** @brief Mask of the direction bit in an endpoint number. */
#define NRF_USBD_EP_DIR_Msk (1U << 7)
-/**
- * @brief The value of direction bit for IN endpoint direction
- */
+/** @brief The value of direction bit for the IN endpoint direction. */
#define NRF_USBD_EP_DIR_IN (1U << 7)
-/**
- * @brief The value of direction bit for OUT endpoint direction
- */
+/** @brief The value of direction bit for the OUT endpoint direction. */
#define NRF_USBD_EP_DIR_OUT (0U << 7)
/**
- * @brief Macro for making IN endpoint identifier from endpoint number
+ * @brief Macro for making the IN endpoint identifier from endpoint number.
*
- * Macro that sets direction bit to make IN endpoint
- * @param[in] epnr Endpoint number
- * @return IN Endpoint identifier
+ * Macro that sets direction bit to make IN endpoint.
+ * @param[in] epnr Endpoint number.
+ * @return IN Endpoint identifier.
*/
#define NRF_USBD_EPIN(epnr) (((uint8_t)(epnr)) | NRF_USBD_EP_DIR_IN)
/**
- * @brief Macro for making OUT endpoint identifier from endpoint number
+ * @brief Macro for making the OUT endpoint identifier from endpoint number.
*
- * Macro that sets direction bit to make OUT endpoint
- * @param[in] epnr Endpoint number
- * @return OUT Endpoint identifier
+ * Macro that sets direction bit to make OUT endpoint.
+ * @param[in] epnr Endpoint number.
+ * @return OUT Endpoint identifier.
*/
#define NRF_USBD_EPOUT(epnr) (((uint8_t)(epnr)) | NRF_USBD_EP_DIR_OUT)
/**
- * @brief Macro for extracting the endpoint number from endpoint identifier
+ * @brief Macro for extracting the endpoint number from the specified endpoint identifier.
*
* Macro that strips out the information about endpoint direction.
- * @param[in] ep Endpoint identifier
- * @return Endpoint number
+ *
+ * @param[in] ep Endpoint identifier.
+ *
+ * @return Endpoint number.
*/
#define NRF_USBD_EP_NR_GET(ep) ((uint8_t)(((uint8_t)(ep)) & 0xFU))
/**
- * @brief Macro for checking endpoint direction
+ * @brief Macro for checking the endpoint direction.
*
- * This macro checks if given endpoint has IN direction
- * @param ep Endpoint identifier
- * @retval true If the endpoint direction is IN
- * @retval false If the endpoint direction is OUT
+ * This macro checks if the specified endpoint has the IN direction.
+ *
+ * @param ep Endpoint identifier.
+ *
+ * @retval true The endpoint direction is IN.
+ * @retval false The endpoint direction is OUT.
*/
#define NRF_USBD_EPIN_CHECK(ep) ( (((uint8_t)(ep)) & NRF_USBD_EP_DIR_Msk) == NRF_USBD_EP_DIR_IN )
/**
- * @brief Macro for checking endpoint direction
+ * @brief Macro for checking endpoint direction.
*
- * This macro checks if given endpoint has OUT direction
+ * This macro checks if given endpoint has OUT direction.
+ *
* @param ep Endpoint identifier
- * @retval true If the endpoint direction is OUT
- * @retval false If the endpoint direction is IN
+ *
+ * @retval true The endpoint direction is OUT
+ * @retval false The endpoint direction is IN
*/
#define NRF_USBD_EPOUT_CHECK(ep) ( (((uint8_t)(ep)) & NRF_USBD_EP_DIR_Msk) == NRF_USBD_EP_DIR_OUT )
/**
- * @brief Macro for checking if endpoint is isochronous
+ * @brief Macro for checking if endpoint is isochronous.
*
- * @param ep It can be endpoint identifier or just endpoint number to check
- * @retval true The endpoint is isochronous type
- * @retval false The endpoint is bulk of interrupt type
+ * @param ep It can be endpoint identifier or just endpoint number to be checked.
+ *
+ * @retval true The endpoint is isochronous type.
+ * @retval false The endpoint is bulk of interrupt type.
*/
#define NRF_USBD_EPISO_CHECK(ep) (NRF_USBD_EP_NR_GET(ep) >= NRF_USBD_EPISO_FIRST)
/**
- * @brief Macro for checking if given number is valid endpoint number
+ * @brief Macro for checking if given number is valid endpoint number.
*
- * @param ep Endpoint number to check
- * @retval true The endpoint is valid
- * @retval false The endpoint is not valid
+ * @param ep Endpoint number to be checked.
+ *
+ * @retval true The endpoint is valid.
+ * @retval false The endpoint is not valid.
*/
#define NRF_USBD_EP_VALIDATE(ep) ( \
(NRF_USBD_EPIN_CHECK(ep) && (NRF_USBD_EP_NR_GET(ep) < NRF_USBD_EPIN_CNT)) \
@@ -517,7 +507,7 @@
)
/**
- * @brief Not isochronous data frame received
+ * @brief Not isochronous data frame received.
*
* Special value returned by @ref nrf_usbd_episoout_size_get function that means that
* data frame was not received at all.
@@ -526,25 +516,21 @@
*/
#define NRF_USBD_EPISOOUT_NO_DATA ((size_t)(-1))
-/**
- * @brief EVENTCAUSE register bit masks
- */
+/** @brief EVENTCAUSE register bit masks. */
typedef enum
{
NRF_USBD_EVENTCAUSE_ISOOUTCRC_MASK = USBD_EVENTCAUSE_ISOOUTCRC_Msk, /**< CRC error was detected on isochronous OUT endpoint 8. */
NRF_USBD_EVENTCAUSE_SUSPEND_MASK = USBD_EVENTCAUSE_SUSPEND_Msk, /**< Signals that the USB lines have been seen idle long enough for the device to enter suspend. */
NRF_USBD_EVENTCAUSE_RESUME_MASK = USBD_EVENTCAUSE_RESUME_Msk, /**< Signals that a RESUME condition (K state or activity restart) has been detected on the USB lines. */
- NRF_USBD_EVENTCAUSE_WUREQ_MASK = USBD_EVENTCAUSE_USBWUALLOWED_Msk, /**< The USBD peripheral has exited Low Power mode */
- NRF_USBD_EVENTCAUSE_READY_MASK = USBD_EVENTCAUSE_READY_Msk, /**< MAC is ready for normal operation, rised few us after USBD enabling */
+ NRF_USBD_EVENTCAUSE_WUREQ_MASK = USBD_EVENTCAUSE_USBWUALLOWED_Msk, /**< The USBD peripheral has exited Low Power mode. */
+ NRF_USBD_EVENTCAUSE_READY_MASK = USBD_EVENTCAUSE_READY_Msk, /**< MAC is ready for normal operation, rised few us after USBD enabling. */
}nrf_usbd_eventcause_mask_t;
-/**
- * @brief DPDMVALUE register
- */
+/** @brief DPDMVALUE register. */
typedef enum
{
- /**Generate Resume signal. Signal is generated for 50 us or 5 ms,
- * depending on bus state */
+ /** Generate RESUME signal. Signal is generated for 50 us or 5 ms,
+ * depending on bus state. */
NRF_USBD_DPDMVALUE_RESUME = USBD_DPDMVALUE_STATE_Resume,
/** D+ Forced high, D- forced low (J state) */
NRF_USBD_DPDMVALUE_J = USBD_DPDMVALUE_STATE_J,
@@ -552,19 +538,15 @@
NRF_USBD_DPMVALUE_K = USBD_DPDMVALUE_STATE_K
}nrf_usbd_dpdmvalue_t;
-/**
- * @brief Dtoggle value or operation
- */
+/** @brief Data toggle value or operation. */
typedef enum
{
- NRF_USBD_DTOGGLE_NOP = USBD_DTOGGLE_VALUE_Nop, /**< No operation - do not change current data toggle on selected endpoint */
- NRF_USBD_DTOGGLE_DATA0 = USBD_DTOGGLE_VALUE_Data0,/**< Data toggle is DATA0 on selected endpoint */
- NRF_USBD_DTOGGLE_DATA1 = USBD_DTOGGLE_VALUE_Data1 /**< Data toggle is DATA1 on selected endpoint */
+ NRF_USBD_DTOGGLE_NOP = USBD_DTOGGLE_VALUE_Nop, /**< No operation - do not change the current data toggle on the selected endpoint. */
+ NRF_USBD_DTOGGLE_DATA0 = USBD_DTOGGLE_VALUE_Data0,/**< Data toggle is DATA0 on the selected endpoint. */
+ NRF_USBD_DTOGGLE_DATA1 = USBD_DTOGGLE_VALUE_Data1 /**< Data toggle is DATA1 on the selected endpoint. */
}nrf_usbd_dtoggle_t;
-/**
- * @brief EPSTATUS bit masks
- */
+/** @brief EPSTATUS bit masks. */
typedef enum
{
NRF_USBD_EPSTATUS_EPIN0_MASK = USBD_EPSTATUS_EPIN0_Msk,
@@ -586,9 +568,7 @@
NRF_USBD_EPSTATUS_EPOUT7_MASK = USBD_EPSTATUS_EPOUT7_Msk,
}nrf_usbd_epstatus_mask_t;
-/**
- * @brief DATAEPSTATUS bit masks
- */
+/** @brief DATAEPSTATUS bit masks. */
typedef enum
{
NRF_USBD_EPDATASTATUS_EPIN1_MASK = USBD_EPDATASTATUS_EPIN1_Msk,
@@ -608,50 +588,42 @@
NRF_USBD_EPDATASTATUS_EPOUT7_MASK = USBD_EPDATASTATUS_EPOUT7_Msk,
}nrf_usbd_dataepstatus_mask_t;
-/**
- * @brief ISOSPLIT configurations
- */
+/** @brief ISOSPLIT configurations. */
typedef enum
{
- NRF_USBD_ISOSPLIT_ONEDIR = USBD_ISOSPLIT_SPLIT_OneDir, /**< Full buffer dedicated to either iso IN or OUT */
- NRF_USBD_ISOSPLIT_HALF = USBD_ISOSPLIT_SPLIT_HalfIN, /**< Buffer divided in half */
+ NRF_USBD_ISOSPLIT_ONEDIR = USBD_ISOSPLIT_SPLIT_OneDir, /**< Full buffer dedicated to either ISO IN or OUT. */
+ NRF_USBD_ISOSPLIT_HALF = USBD_ISOSPLIT_SPLIT_HalfIN, /**< Buffer divided in half. */
}nrf_usbd_isosplit_t;
-/**
- * @brief ISOINCONFIG configurations
- */
+/** @brief ISOINCONFIG configurations. */
typedef enum
{
- NRF_USBD_ISOINCONFIG_NORESP = USBD_ISOINCONFIG_RESPONSE_NoResp, /**< Endpoint does not respond to an ISO IN token when no data is ready */
- NRF_USBD_ISOINCONFIG_ZERODATA = USBD_ISOINCONFIG_RESPONSE_ZeroData, /**< Endpoint responds with a zero-length data packet to an ISO IN token when no data is ready */
+ NRF_USBD_ISOINCONFIG_NORESP = USBD_ISOINCONFIG_RESPONSE_NoResp, /**< Endpoint does not respond to an ISO IN token when no data is ready. */
+ NRF_USBD_ISOINCONFIG_ZERODATA = USBD_ISOINCONFIG_RESPONSE_ZeroData, /**< Endpoint responds with a zero-length data packet to an ISO IN token when no data is ready. */
}nrf_usbd_isoinconfig_t;
-/**
- * @brief Function for enabling USBD
- */
+/** @brief Function for enabling the USBD. */
__STATIC_INLINE void nrf_usbd_enable(void);
-/**
- * @brief Function for disabling USBD
- */
+/** @brief Function for disabling the USBD. */
__STATIC_INLINE void nrf_usbd_disable(void);
/**
- * @brief Function for getting EVENTCAUSE register
+ * @brief Function for getting the EVENTCAUSE register.
*
- * @return Flag values defined in @ref nrf_usbd_eventcause_mask_t
+ * @return Flag values defined in @ref nrf_usbd_eventcause_mask_t.
*/
__STATIC_INLINE uint32_t nrf_usbd_eventcause_get(void);
/**
- * @brief Function for clearing EVENTCAUSE flags
+ * @brief Function for clearing the EVENTCAUSE flags.
*
- * @param flags Flags defined in @ref nrf_usbd_eventcause_mask_t
+ * @param flags Flags defined in @ref nrf_usbd_eventcause_mask_t.
*/
__STATIC_INLINE void nrf_usbd_eventcause_clear(uint32_t flags);
/**
- * @brief Function for getting EVENTCAUSE register and clear flags that are set
+ * @brief Function for getting the EVENTCAUSE register and clearing flags that are set.
*
* The safest way to return current EVENTCAUSE register.
* All the flags that are returned would be cleared inside EVENTCAUSE register.
@@ -661,276 +633,278 @@
__STATIC_INLINE uint32_t nrf_usbd_eventcause_get_and_clear(void);
/**
- * @brief Function for getting HALTEDEPIN register value
+ * @brief Function for getting the HALTEDEPIN register value.
*
- * @param ep Endpoint number with IN/OUT flag
+ * @note Use this function for the response for GetStatus() request to endpoint.
+ * To check whether the endpoint is stalled in the code, use @ref nrf_usbd_ep_is_stall.
*
- * @return The value of HALTEDEPIN or HALTEDOUT register for selected endpoint
+ * @param ep Endpoint number with IN or OUT flag.
*
- * @note
- * Use this function for the response for GetStatus() request to endpoint.
- * To check if endpoint is stalled in the code use @ref nrf_usbd_ep_is_stall.
+ * @return The value of the HALTEDEPIN or HALTEDOUT register for the selected endpoint.
*/
__STATIC_INLINE uint32_t nrf_usbd_haltedep(uint8_t ep);
/**
- * @brief Function for checking if selected endpoint is stalled
+ * @brief Function for checking whether the selected endpoint is stalled.
*
* Function to be used as a syntax sweeter for @ref nrf_usbd_haltedep.
*
* Also as the isochronous endpoint cannot be halted - it returns always false
* if isochronous endpoint is checked.
*
- * @param ep Endpoint number with IN/OUT flag
+ * @param ep Endpoint number with IN or OUT flag.
*
- * @return The information if the enepoint is halted.
+ * @retval true The endpoint is halted.
+ * @retval false The endpoint is not halted.
*/
__STATIC_INLINE bool nrf_usbd_ep_is_stall(uint8_t ep);
/**
- * @brief Function for getting EPSTATUS register value
+ * @brief Function for getting EPSTATUS register value.
*
- * @return Flag values defined in @ref nrf_usbd_epstatus_mask_t
+ * @return Flag values defined in @ref nrf_usbd_epstatus_mask_t.
*/
__STATIC_INLINE uint32_t nrf_usbd_epstatus_get(void);
/**
- * @brief Function for clearing EPSTATUS register value
+ * @brief Function for clearing EPSTATUS register value.
*
- * @param flags Flags defined in @ref nrf_usbd_epstatus_mask_t
+ * @param flags Flags defined in @ref nrf_usbd_epstatus_mask_t.
*/
__STATIC_INLINE void nrf_usbd_epstatus_clear(uint32_t flags);
/**
- * @brief Function for getting and clearing EPSTATUS register value
+ * @brief Function for getting and clearing EPSTATUS register value.
*
* Function clears all flags in register set before returning its value.
- * @return Flag values defined in @ref nrf_usbd_epstatus_mask_t
+ *
+ * @return Flag values defined in @ref nrf_usbd_epstatus_mask_t.
*/
__STATIC_INLINE uint32_t nrf_usbd_epstatus_get_and_clear(void);
/**
- * @brief Function for getting DATAEPSTATUS register value
+ * @brief Function for getting DATAEPSTATUS register value.
*
- * @return Flag values defined in @ref nrf_usbd_dataepstatus_mask_t
+ * @return Flag values defined in @ref nrf_usbd_dataepstatus_mask_t.
*/
__STATIC_INLINE uint32_t nrf_usbd_epdatastatus_get(void);
/**
- * @brief Function for clearing DATAEPSTATUS register value
+ * @brief Function for clearing DATAEPSTATUS register value.
*
- * @param flags Flags defined in @ref nrf_usbd_dataepstatus_mask_t
+ * @param flags Flags defined in @ref nrf_usbd_dataepstatus_mask_t.
*/
__STATIC_INLINE void nrf_usbd_epdatastatus_clear(uint32_t flags);
/**
- * @brief Function for getting and clearing DATAEPSTATUS register value
+ * @brief Function for getting and clearing DATAEPSTATUS register value.
*
* Function clears all flags in register set before returning its value.
- * @return Flag values defined in @ref nrf_usbd_dataepstatus_mask_t
+ * @return Flag values defined in @ref nrf_usbd_dataepstatus_mask_t.
*/
__STATIC_INLINE uint32_t nrf_usbd_epdatastatus_get_and_clear(void);
/**
- * @name Setup command frame functions
+ * @name Setup command frame functions.
*
- * Functions for setup command frame parts access
+ * Functions for setting up command frame part access.
* @{
*/
/**
- * @brief Function for reading BMREQUESTTYPE - part of SETUP packet
+ * @brief Function for reading BMREQUESTTYPE - part of the SETUP packet.
*
- * @return the value of BREQUESTTYPE on last received SETUP frame
+ * @return Value of BREQUESTTYPE on the last received SETUP frame.
*/
__STATIC_INLINE uint8_t nrf_usbd_setup_bmrequesttype_get(void);
/**
- * @brief Function for reading BMREQUEST - part of SETUP packet
+ * @brief Function for reading BMREQUEST - part of the SETUP packet.
*
- * @return the value of BREQUEST on last received SETUP frame
+ * @return Value of BREQUEST on the last received SETUP frame.
*/
__STATIC_INLINE uint8_t nrf_usbd_setup_brequest_get(void);
/**
- * @brief Function for reading WVALUE - part of SETUP packet
+ * @brief Function for reading WVALUE - part of the SETUP packet.
*
- * @return the value of WVALUE on last received SETUP frame
+ * @return Value of WVALUE on the last received SETUP frame.
*/
__STATIC_INLINE uint16_t nrf_usbd_setup_wvalue_get(void);
/**
- * @brief Function for reading WINDEX - part of SETUP packet
+ * @brief Function for reading WINDEX - part of the SETUP packet.
*
- * @return the value of WINDEX on last received SETUP frame
+ * @return Value of WINDEX on the last received SETUP frame.
*/
__STATIC_INLINE uint16_t nrf_usbd_setup_windex_get(void);
/**
- * @brief Function for reading WLENGTH - part of SETUP packet
+ * @brief Function for reading WLENGTH - part of the SETUP packet.
*
- * @return the value of WLENGTH on last received SETUP frame
+ * @return Value of WLENGTH on the last received SETUP frame.
*/
__STATIC_INLINE uint16_t nrf_usbd_setup_wlength_get(void);
/** @} */
/**
- * @brief Function for getting number of received bytes on selected endpoint
+ * @brief Function for getting the number of received bytes on the selected endpoint.
+ *
+ * @note This function can be used on bulk, interrupt, and isochronous endpoints.
+ * @note For the function that returns different value for the ISOOUT zero
+ * transfer or no transfer at all, see the @ref nrf_usbd_episoout_size_get
+ * function. This function will return 0 for both cases.
*
* @param ep Endpoint identifier.
*
* @return Number of received bytes.
- *
- * @note This function may be used on Bulk/Interrupt and Isochronous endpoints.
- * @note For the function that returns different value for ISOOUT zero transfer or no transfer at all,
- * see @ref nrf_usbd_episoout_size_get function. This function would return 0 for both cases.
*/
__STATIC_INLINE size_t nrf_usbd_epout_size_get(uint8_t ep);
/**
- * @brief Function for getting number of received bytes on isochronous endpoint.
+ * @brief Function for getting number of the received bytes on isochronous endpoint.
*
- * @param ep Endpoint identifier, has to be isochronous out endpoint.
+ * @param ep Endpoint identifier, must be an isochronous OUT endpoint.
*
- * @return Number of bytes received or @ref NRF_USBD_EPISOOUT_NO_DATA
+ * @return Number of bytes received or @ref NRF_USBD_EPISOOUT_NO_DATA.
*/
__STATIC_INLINE size_t nrf_usbd_episoout_size_get(uint8_t ep);
/**
- * @brief Function for clearing out endpoint to accept any new incoming traffic
+ * @brief Function for clearing OUT endpoint to accept any new incoming traffic.
*
- * @param ep ep Endpoint identifier. Only OUT Interrupt/Bulk endpoints are accepted.
+ * @param ep ep Endpoint identifier. Only OUT interrupt/bulk endpoints are accepted.
*/
__STATIC_INLINE void nrf_usbd_epout_clear(uint8_t ep);
-/**
- * @brief Function for enabling USB pullup
- */
+/** @brief Function for enabling the USB pullup. */
__STATIC_INLINE void nrf_usbd_pullup_enable(void);
-/**
- * @brief Function for disabling USB pullup
- */
+/** @brief Function for disabling the USB pullup. */
__STATIC_INLINE void nrf_usbd_pullup_disable(void);
/**
- * @brief Function for returning current USB pullup state
+ * @brief Function for returning the current the USB pullup state.
*
- * @retval true USB pullup is enabled
- * @retval false USB pullup is disabled
+ * @retval true The USB pullup is enabled.
+ * @retval false The USB pullup is disabled.
*/
__STATIC_INLINE bool nrf_usbd_pullup_check(void);
/**
- * @brief Function for configuring the value to be forced on the bus on DRIVEDPDM task
+ * @brief Function for configuring the value to be forced on the bus on the DRIVEDPDM task.
*
- * Selected state would be forced on the bus when @ref NRF_USBD_TASK_DRIVEDPDM is set.
- * The state would be removed from the bus on @ref NRF_USBD_TASK_NODRIVEDPDM and
- * the control would be returned to the USBD peripheral.
- * @param val State to be set
+ * The selected state will be forced on the bus when @ref NRF_USBD_TASK_DRIVEDPDM is set.
+ * The state will be removed from the bus on @ref NRF_USBD_TASK_NODRIVEDPDM and
+ * the control will be returned to the USBD peripheral.
+ * @param val State to be set.
*/
__STATIC_INLINE void nrf_usbd_dpdmvalue_set(nrf_usbd_dpdmvalue_t val);
/**
- * @brief Function for setting data toggle
+ * @brief Function for setting the data toggle.
*
- * Configuration of current state of data toggling
- * @param ep Endpoint number with the information about its direction
- * @param op Operation to execute
+ * Configuration of the current state of data toggling.
+ * @param ep Endpoint number with the information about its direction.
+ * @param op Operation to execute.
*/
__STATIC_INLINE void nrf_usbd_dtoggle_set(uint8_t ep, nrf_usbd_dtoggle_t op);
/**
- * @brief Function for getting data toggle
+ * @brief Function for getting the data toggle.
*
- * Get the current state of data toggling
- * @param ep Endpoint number to return the information about current data toggling
- * @retval NRF_USBD_DTOGGLE_DATA0 Data toggle is DATA0 on selected endpoint
- * @retval NRF_USBD_DTOGGLE_DATA1 Data toggle is DATA1 on selected endpoint
+ * Get the current state of data toggling.
+ *
+ * @param ep Endpoint number to return the information about current data toggling.
+ *
+ * @retval NRF_USBD_DTOGGLE_DATA0 Data toggle is DATA0 on selected endpoint.
+ * @retval NRF_USBD_DTOGGLE_DATA1 Data toggle is DATA1 on selected endpoint.
*/
__STATIC_INLINE nrf_usbd_dtoggle_t nrf_usbd_dtoggle_get(uint8_t ep);
/**
- * @brief Function for checking if endpoint is enabled
+ * @brief Function for checking whether the endpoint is enabled.
*
- * @param ep Endpoint id to check
+ * @param ep Endpoint ID to be checked.
*
- * @retval true Endpoint is enabled
- * @retval false Endpoint is disabled
+ * @retval true Endpoint is enabled.
+ * @retval false Endpoint is disabled.
*/
__STATIC_INLINE bool nrf_usbd_ep_enable_check(uint8_t ep);
/**
- * @brief Function for enabling selected endpoint
+ * @brief Function for enabling the selected endpoint.
*
- * Enabled endpoint responds for the tokens on the USB bus
+ * The enabled endpoint responds for the tokens on the USB bus.
*
- * @param ep Endpoint id to enable
+ * @param ep Endpoint ID to be enabled.
*/
__STATIC_INLINE void nrf_usbd_ep_enable(uint8_t ep);
/**
- * @brief Function for disabling selected endpoint
+ * @brief Function for disabling the selected endpoint.
*
- * Disabled endpoint does not respond for the tokens on the USB bus
+ * The disabled endpoint does not respond for the tokens on the USB bus.
*
- * @param ep Endpoint id to disable
+ * @param ep Endpoint ID to be disabled.
*/
__STATIC_INLINE void nrf_usbd_ep_disable(uint8_t ep);
/**
- * @brief Function for disabling all endpoints
+ * @brief Function for disabling all endpoints.
*
- * Auxiliary function to simply disable all aviable endpoints.
- * It lefts only EP0 IN and OUT enabled.
+ * An auxiliary function to disable all aviable endpoints.
+ * It leaves only EP0 IN and OUT enabled.
*/
__STATIC_INLINE void nrf_usbd_ep_all_disable(void);
/**
- * @brief Function for stalling selected endpoint
+ * @brief Function for stalling the selected endpoint.
*
- * @param ep Endpoint identifier
- * @note This function cannot be called on isochronous endpoint
+ * @note This function cannot be called on isochronous endpoint.
+ *
+ * @param ep Endpoint identifier.
*/
__STATIC_INLINE void nrf_usbd_ep_stall(uint8_t ep);
/**
- * @brief Function for unstalling selected endpoint
+ * @brief Function for unstalling the selected endpoint.
+ *
+ * @note This function cannot be called on isochronous endpoint.
*
* @param ep Endpoint identifier
- * @note This function cannot be called on isochronous endpoint
*/
__STATIC_INLINE void nrf_usbd_ep_unstall(uint8_t ep);
/**
- * @brief Function for configuration of isochronous buffer splitting
+ * @brief Function for configuring the isochronous buffer splitting.
*
- * Configure isochronous buffer splitting between IN and OUT endpoints.
+ * This function configures isochronous buffer splitting between IN and OUT endpoints.
*
- * @param split Required configuration
+ * @param split Required configuration.
*/
__STATIC_INLINE void nrf_usbd_isosplit_set(nrf_usbd_isosplit_t split);
/**
- * @brief Function for getting the isochronous buffer splitting configuration
+ * @brief Function for getting the isochronous buffer splitting configuration.
*
- * Get the current isochronous buffer splitting configuration.
+ * This function gets the current isochronous buffer splitting configuration.
*
- * @return Current configuration
+ * @return Current configuration.
*/
__STATIC_INLINE nrf_usbd_isosplit_t nrf_usbd_isosplit_get(void);
/**
- * @brief Function for getting current frame counter
+ * @brief Function for getting current frame counter.
*
- * @return Current frame counter
+ * @return Current frame counter.
*/
__STATIC_INLINE uint32_t nrf_usbd_framecntr_get(void);
/**
- * @brief Function for entering into low power mode
+ * @brief Function for entering into the USB low power mode.
*
- * After this function is called the clock source from the USBD is disconnected internally.
- * After this function is called most of the USBD registers cannot be accessed anymore.
+ * After this function is called, the clock source from the USBD is disconnected internally.
+ * After this function is called, most of the USBD registers cannot be accessed anymore.
*
* @sa nrf_usbd_lowpower_disable
* @sa nrf_usbd_lowpower_check
@@ -938,11 +912,11 @@
__STATIC_INLINE void nrf_usbd_lowpower_enable(void);
/**
- * @brief Function for exiting from low power mode
+ * @brief Function for exiting from the USB low power mode.
*
- * After this function is called the clock source for the USBD is connected internally.
- * The @ref NRF_USBD_EVENTCAUSE_WUREQ_MASK event would be generated and
- * then the USBD registers may be accessed.
+ * After this function is called, the clock source for the USBD is connected internally.
+ * The @ref NRF_USBD_EVENTCAUSE_WUREQ_MASK event will be generated and
+ * then the USBD registers can be accessed.
*
* @sa nrf_usbd_lowpower_enable
* @sa nrf_usbd_lowpower_check
@@ -950,46 +924,46 @@
__STATIC_INLINE void nrf_usbd_lowpower_disable(void);
/**
- * @brief Function for checking the state of the low power mode
+ * @brief Function for checking the state of the low power mode.
*
- * @retval true USBD is in low power mode
- * @retval false USBD is not in low power mode
+ * @retval true The USBD is in low power mode.
+ * @retval false The USBD is not in low power mode.
*/
__STATIC_INLINE bool nrf_usbd_lowpower_check(void);
/**
* @brief Function for configuring ISO IN endpoint response to an IN token when no data is ready to be sent.
*
- * @param config Required configuration
+ * @param config Required configuration.
*/
__STATIC_INLINE void nrf_usbd_isoinconfig_set(nrf_usbd_isoinconfig_t config);
/**
* @brief Function for getting the cofiguration of ISO IN endpoint response to an IN token when no data is ready to be sent.
*
- * @return Current configuration
+ * @return Current configuration.
*/
__STATIC_INLINE nrf_usbd_isoinconfig_t nrf_usbd_isoinconfig_get(void);
/**
- * @brief Function for configuring EasyDMA channel
+ * @brief Function for configuring the EasyDMA channel.
*
* Configures EasyDMA for the transfer.
*
- * @param ep Endpoint identifier (with direction)
- * @param ptr Pointer to the data
- * @param maxcnt Number of bytes to transfer
+ * @param ep Endpoint identifier (with direction).
+ * @param ptr Pointer to the data.
+ * @param maxcnt Number of bytes to transfer.
*/
__STATIC_INLINE void nrf_usbd_ep_easydma_set(uint8_t ep, uint32_t ptr, uint32_t maxcnt);
/**
- * @brief Function for getting number of transferred bytes
+ * @brief Function for getting number of transferred bytes.
*
- * Get number of transferred bytes in the last transaction
+ * This function gets the number of transferred bytes in the last transaction.
*
- * @param ep Endpoint identifier
+ * @param ep Endpoint identifier.
*
- * @return The content of the AMOUNT register
+ * @return The content of the AMOUNT register.
*/
__STATIC_INLINE uint32_t nrf_usbd_ep_amount_get(uint8_t ep);
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_vmc.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_vmc.h
index 957baa4..5f14874 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_vmc.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_vmc.h
@@ -68,7 +68,7 @@
*
* @note Overrides current configuration.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] ram_block_num RAM block number.
* @param[in] power_mask Bitmask with sections configuration of particular RAM block.
* @ref nrf_vmc_power_t should be use to prepare this bitmask.
@@ -83,7 +83,7 @@
/**
* @brief Function for clearing power configuration for the particular RAM block.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] ram_block_num RAM block number.
*/
__STATIC_INLINE void nrf_vmc_ram_block_clear(NRF_VMC_Type * p_reg, uint8_t ram_block_num);
@@ -91,7 +91,7 @@
/**
* @brief Function for setting power configuration for the particular RAM block.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] ram_block_num RAM block number.
* @param[in] sect_power Paricular section of the RAM block.
*/
@@ -102,7 +102,7 @@
/**
* @brief Function for clearing power configuration for the particular RAM block.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] ram_block_num RAM block number.
* @param[in] sect_power Paricular section of the RAM block.
*/
@@ -113,7 +113,7 @@
/**
* @brief Function for getting power configuration of the particular RAM block.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] ram_block_num RAM block number.
*
* @return Bitmask with power configuration of sections of particular RAM block.
@@ -124,7 +124,7 @@
/**
* @brief Function for setting retention configuration for the particular RAM block.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] ram_block_num RAM block number.
* @param[in] sect_retention Paricular section of the RAM block.
*/
@@ -135,7 +135,7 @@
/**
* @brief Function for clearing retention configuration for the particular RAM block.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] ram_block_num RAM block number.
* @param[in] sect_retention Paricular section of the RAM block.
*/
@@ -146,7 +146,7 @@
/**
* @brief Function for getting retention configuration of the particular RAM block.
*
- * @param[in] p_reg Pointer to the peripheral registers structure.
+ * @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] ram_block_num RAM block number.
*
* @return Bitmask with retention configuration of sections of particular RAM block
diff --git a/third_party/NordicSemiconductor/nrfx/hal/nrf_wdt.h b/third_party/NordicSemiconductor/nrfx/hal/nrf_wdt.h
index 4f1dfcc..9adb590 100644
--- a/third_party/NordicSemiconductor/nrfx/hal/nrf_wdt.h
+++ b/third_party/NordicSemiconductor/nrfx/hal/nrf_wdt.h
@@ -45,38 +45,26 @@
* @brief Hardware access layer for managing the Watchdog Timer (WDT) peripheral.
*/
+/** @brief Number of WDT channels. */
#define NRF_WDT_CHANNEL_NUMBER 0x8UL
-#define NRF_WDT_RR_VALUE 0x6E524635UL /* Fixed value, shouldn't be modified.*/
-#define NRF_WDT_TASK_SET 1UL
-#define NRF_WDT_EVENT_CLEAR 0UL
+/** @brief WDT register reload value. */
+#define NRF_WDT_RR_VALUE 0x6E524635UL /* Fixed value; should not be modified. */
-/**
- * @enum nrf_wdt_task_t
- * @brief WDT tasks.
- */
+
+/** @brief WDT tasks. */
typedef enum
{
- /*lint -save -e30 -esym(628,__INTADDR__)*/
NRF_WDT_TASK_START = offsetof(NRF_WDT_Type, TASKS_START), /**< Task for starting WDT. */
- /*lint -restore*/
} nrf_wdt_task_t;
-/**
- * @enum nrf_wdt_event_t
- * @brief WDT events.
- */
+/** @brief WDT events. */
typedef enum
{
- /*lint -save -e30*/
NRF_WDT_EVENT_TIMEOUT = offsetof(NRF_WDT_Type, EVENTS_TIMEOUT), /**< Event from WDT time-out. */
- /*lint -restore*/
} nrf_wdt_event_t;
-/**
- * @enum nrf_wdt_behaviour_t
- * @brief WDT behavior in CPU SLEEP or HALT mode.
- */
+/** @brief WDT behavior in the SLEEP or HALT CPU modes. */
typedef enum
{
NRF_WDT_BEHAVIOUR_RUN_SLEEP = WDT_CONFIG_SLEEP_Msk, /**< WDT will run when CPU is in SLEEP mode. */
@@ -85,10 +73,7 @@
NRF_WDT_BEHAVIOUR_PAUSE_SLEEP_HALT = 0, /**< WDT will be paused when CPU is in SLEEP or HALT mode. */
} nrf_wdt_behaviour_t;
-/**
- * @enum nrf_wdt_rr_register_t
- * @brief WDT reload request registers.
- */
+/** @brief WDT reload request registers. */
typedef enum
{
NRF_WDT_RR0 = 0, /**< Reload request register 0. */
@@ -101,15 +86,13 @@
NRF_WDT_RR7 /**< Reload request register 7. */
} nrf_wdt_rr_register_t;
-/**
- * @enum nrf_wdt_int_mask_t
- * @brief WDT interrupts.
- */
+/** @brief WDT interrupts. */
typedef enum
{
NRF_WDT_INT_TIMEOUT_MASK = WDT_INTENSET_TIMEOUT_Msk, /**< WDT interrupt from time-out event. */
} nrf_wdt_int_mask_t;
+
/**
* @brief Function for configuring the watchdog behavior when the CPU is sleeping or halted.
*
@@ -120,48 +103,48 @@
/**
* @brief Function for starting the WDT task.
*
- * @param[in] task Task.
+ * @param[in] task Task.
*/
__STATIC_INLINE void nrf_wdt_task_trigger(nrf_wdt_task_t task);
/**
- * @brief Function for clearing the WDT event.
+ * @brief Function for clearing the WDT event register.
*
- * @param[in] event Event.
+ * @param[in] event Event.
*/
__STATIC_INLINE void nrf_wdt_event_clear(nrf_wdt_event_t event);
/**
* @brief Function for retrieving the state of the WDT event.
*
- * @param[in] event Event.
+ * @param[in] event Event to be checked.
*
- * @retval true If the event is set.
- * @retval false If the event is not set.
+ * @retval true The event has been generated.
+ * @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_wdt_event_check(nrf_wdt_event_t event);
/**
- * @brief Function for enabling a specific interrupt.
+ * @brief Function for enabling the specified interrupt.
*
- * @param[in] int_mask Interrupt.
+ * @param[in] int_mask Interrupt.
*/
__STATIC_INLINE void nrf_wdt_int_enable(uint32_t int_mask);
/**
* @brief Function for retrieving the state of given interrupt.
*
- * @param[in] int_mask Interrupt.
+ * @param[in] int_mask Interrupt.
*
- * @retval true Interrupt is enabled.
- * @retval false Interrupt is not enabled.
+ * @retval true Interrupt is enabled.
+ * @retval false Interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_wdt_int_enable_check(uint32_t int_mask);
/**
* @brief Function for disabling a specific interrupt.
*
- * @param[in] int_mask Interrupt.
+ * @param[in] int_mask Interrupt.
*/
__STATIC_INLINE void nrf_wdt_int_disable(uint32_t int_mask);
@@ -206,72 +189,72 @@
/**
* @brief Function for returning the address of a specific WDT task register.
*
- * @param[in] task Task.
+ * @param[in] task Task.
*/
__STATIC_INLINE uint32_t nrf_wdt_task_address_get(nrf_wdt_task_t task);
/**
* @brief Function for returning the address of a specific WDT event register.
*
- * @param[in] event Event.
+ * @param[in] event Event.
*
- * @retval address of requested event register
+ * @return Address of requested event register
*/
__STATIC_INLINE uint32_t nrf_wdt_event_address_get(nrf_wdt_event_t event);
/**
* @brief Function for retrieving the watchdog status.
*
- * @retval true If the watchdog is started.
- * @retval false If the watchdog is not started.
+ * @retval true The watchdog is started.
+ * @retval false The watchdog is not started.
*/
__STATIC_INLINE bool nrf_wdt_started(void);
/**
* @brief Function for retrieving the watchdog reload request status.
*
- * @param[in] rr_register Reload request register to check.
+ * @param[in] rr_register Reload request register to be checked.
*
- * @retval true If a reload request is running.
- * @retval false If no reload request is running.
+ * @retval true Reload request is running.
+ * @retval false No reload requests are running.
*/
__STATIC_INLINE bool nrf_wdt_request_status(nrf_wdt_rr_register_t rr_register);
/**
* @brief Function for setting the watchdog reload value.
*
- * @param[in] reload_value Watchdog counter initial value.
+ * @param[in] reload_value Watchdog counter initial value.
*/
__STATIC_INLINE void nrf_wdt_reload_value_set(uint32_t reload_value);
/**
* @brief Function for retrieving the watchdog reload value.
*
- * @retval Reload value.
+ * @return Reload value.
*/
__STATIC_INLINE uint32_t nrf_wdt_reload_value_get(void);
/**
* @brief Function for enabling a specific reload request register.
*
- * @param[in] rr_register Reload request register to enable.
+ * @param[in] rr_register Reload request register to be enabled.
*/
__STATIC_INLINE void nrf_wdt_reload_request_enable(nrf_wdt_rr_register_t rr_register);
/**
* @brief Function for disabling a specific reload request register.
*
- * @param[in] rr_register Reload request register to disable.
+ * @param[in] rr_register Reload request register to be disabled.
*/
__STATIC_INLINE void nrf_wdt_reload_request_disable(nrf_wdt_rr_register_t rr_register);
/**
* @brief Function for retrieving the status of a specific reload request register.
*
- * @param[in] rr_register Reload request register to check.
+ * @param[in] rr_register Reload request register to be checked.
*
- * @retval true If the reload request register is enabled.
- * @retval false If the reload request register is not enabled.
+ * @retval true The reload request register is enabled.
+ * @retval false The reload request register is not enabled.
*/
__STATIC_INLINE bool nrf_wdt_reload_request_is_enabled(nrf_wdt_rr_register_t rr_register);
@@ -291,12 +274,12 @@
__STATIC_INLINE void nrf_wdt_task_trigger(nrf_wdt_task_t task)
{
- *((volatile uint32_t *)((uint8_t *)NRF_WDT + task)) = NRF_WDT_TASK_SET;
+ *((volatile uint32_t *)((uint8_t *)NRF_WDT + (uint32_t)task)) = 0x01UL;
}
__STATIC_INLINE void nrf_wdt_event_clear(nrf_wdt_event_t event)
{
- *((volatile uint32_t *)((uint8_t *)NRF_WDT + (uint32_t)event)) = NRF_WDT_EVENT_CLEAR;
+ *((volatile uint32_t *)((uint8_t *)NRF_WDT + (uint32_t)event)) = 0x0UL;
#if __CORTEX_M == 0x04
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_WDT + (uint32_t)event));
(void)dummy;
@@ -305,7 +288,7 @@
__STATIC_INLINE bool nrf_wdt_event_check(nrf_wdt_event_t event)
{
- return (bool)*((volatile uint32_t *)((uint8_t *)NRF_WDT + event));
+ return (bool)*((volatile uint32_t *)((uint8_t *)NRF_WDT + (uint32_t)event));
}
__STATIC_INLINE void nrf_wdt_int_enable(uint32_t int_mask)
@@ -351,12 +334,12 @@
__STATIC_INLINE uint32_t nrf_wdt_task_address_get(nrf_wdt_task_t task)
{
- return ((uint32_t)NRF_WDT + task);
+ return ((uint32_t)NRF_WDT + (uint32_t)task);
}
__STATIC_INLINE uint32_t nrf_wdt_event_address_get(nrf_wdt_event_t event)
{
- return ((uint32_t)NRF_WDT + event);
+ return ((uint32_t)NRF_WDT + (uint32_t)event);
}
__STATIC_INLINE bool nrf_wdt_started(void)
diff --git a/third_party/NordicSemiconductor/nrfx/helpers/nrfx_gppi/nrfx_gppi.h b/third_party/NordicSemiconductor/nrfx/helpers/nrfx_gppi/nrfx_gppi.h
new file mode 100644
index 0000000..a98858b
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/helpers/nrfx_gppi/nrfx_gppi.h
@@ -0,0 +1,577 @@
+/*
+ * Copyright (c) 2019, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef NRFX_GPPI_H
+#define NRFX_GPPI_H
+
+#include <nrfx.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup nrfx_gppi Generic PPI layer
+ * @{
+ * @ingroup nrfx
+ * @ingroup nrf_dppi
+ * @ingroup nrf_ppi
+ *
+ * @brief Helper layer that provides the common functionality of PPI and DPPI drivers.
+ *
+ * Use PPI and DPPI drivers directly.
+ * This layer is provided only to help create generic code that can be built
+ * for SoCs equipped with either of these peripherals. When using this layer,
+ * take into account that there are significant differences between the PPI and DPPI
+ * interfaces that affect the behavior of this layer.
+ *
+ * One difference is that PPI allows associating of one task or event with
+ * more than one channel, whereas DPPI does not allow this. In DPPI, the second
+ * association overwrites the first one. Consequently, this helper layer cannot
+ * be used in applications that need to connect a task or event to multiple
+ * channels.
+ *
+ * Another difference is that in DPPI one channel can be associated with
+ * multiple tasks and multiple events, while in PPI this is not possible (with
+ * the exception of the association of a second task as a fork). Because of
+ * this difference, it is important to clear the previous endpoints of the channel that
+ * is to be reused with some different ones. Otherwise, the behavior of this
+ * helper layer will be different, depending on the actual interface used:
+ * in DPPI the channel configuration will be extended with the new endpoints, and
+ * in PPI the new endpoints will replace the previous ones.
+ */
+
+#if defined(PPI_PRESENT)
+#include <hal/nrf_ppi.h>
+
+typedef enum
+{
+ NRFX_GPPI_CHANNEL_GROUP0 = NRF_PPI_CHANNEL_GROUP0,
+ NRFX_GPPI_CHANNEL_GROUP1 = NRF_PPI_CHANNEL_GROUP1,
+ NRFX_GPPI_CHANNEL_GROUP2 = NRF_PPI_CHANNEL_GROUP2,
+ NRFX_GPPI_CHANNEL_GROUP3 = NRF_PPI_CHANNEL_GROUP3,
+#if (PPI_GROUP_NUM > 4)
+ NRFX_GPPI_CHANNEL_GROUP4 = NRF_PPI_CHANNEL_GROUP4,
+ NRFX_GPPI_CHANNEL_GROUP5 = NRF_PPI_CHANNEL_GROUP5,
+#endif
+} nrfx_gppi_channel_group_t;
+
+typedef enum
+{
+ NRFX_GPPI_TASK_CHG0_EN = NRF_PPI_TASK_CHG0_EN,
+ NRFX_GPPI_TASK_CHG0_DIS = NRF_PPI_TASK_CHG0_DIS,
+ NRFX_GPPI_TASK_CHG1_EN = NRF_PPI_TASK_CHG1_EN,
+ NRFX_GPPI_TASK_CHG1_DIS = NRF_PPI_TASK_CHG1_DIS,
+ NRFX_GPPI_TASK_CHG2_EN = NRF_PPI_TASK_CHG2_EN,
+ NRFX_GPPI_TASK_CHG2_DIS = NRF_PPI_TASK_CHG2_DIS,
+ NRFX_GPPI_TASK_CHG3_EN = NRF_PPI_TASK_CHG3_EN,
+ NRFX_GPPI_TASK_CHG3_DIS = NRF_PPI_TASK_CHG3_DIS,
+#if (PPI_GROUP_NUM > 4)
+ NRFX_GPPI_TASK_CHG4_EN = NRF_PPI_TASK_CHG4_EN,
+ NRFX_GPPI_TASK_CHG4_DIS = NRF_PPI_TASK_CHG4_DIS,
+ NRFX_GPPI_TASK_CHG5_EN = NRF_PPI_TASK_CHG5_EN,
+ NRFX_GPPI_TASK_CHG5_DIS = NRF_PPI_TASK_CHG5_DIS
+#endif
+} nrfx_gppi_task_t;
+
+#elif defined(DPPI_PRESENT)
+#include <hal/nrf_dppi.h>
+
+typedef enum
+{
+ NRFX_GPPI_CHANNEL_GROUP0 = NRF_DPPI_CHANNEL_GROUP0,
+ NRFX_GPPI_CHANNEL_GROUP1 = NRF_DPPI_CHANNEL_GROUP1,
+ NRFX_GPPI_CHANNEL_GROUP2 = NRF_DPPI_CHANNEL_GROUP2,
+ NRFX_GPPI_CHANNEL_GROUP3 = NRF_DPPI_CHANNEL_GROUP3,
+ NRFX_GPPI_CHANNEL_GROUP4 = NRF_DPPI_CHANNEL_GROUP4,
+ NRFX_GPPI_CHANNEL_GROUP5 = NRF_DPPI_CHANNEL_GROUP5,
+} nrfx_gppi_channel_group_t;
+
+typedef enum
+{
+ NRFX_GPPI_TASK_CHG0_EN = NRF_DPPI_TASK_CHG0_EN,
+ NRFX_GPPI_TASK_CHG0_DIS = NRF_DPPI_TASK_CHG0_DIS,
+ NRFX_GPPI_TASK_CHG1_EN = NRF_DPPI_TASK_CHG1_EN,
+ NRFX_GPPI_TASK_CHG1_DIS = NRF_DPPI_TASK_CHG1_DIS,
+ NRFX_GPPI_TASK_CHG2_EN = NRF_DPPI_TASK_CHG2_EN,
+ NRFX_GPPI_TASK_CHG2_DIS = NRF_DPPI_TASK_CHG2_DIS,
+ NRFX_GPPI_TASK_CHG3_EN = NRF_DPPI_TASK_CHG3_EN,
+ NRFX_GPPI_TASK_CHG3_DIS = NRF_DPPI_TASK_CHG3_DIS,
+ NRFX_GPPI_TASK_CHG4_EN = NRF_DPPI_TASK_CHG4_EN,
+ NRFX_GPPI_TASK_CHG4_DIS = NRF_DPPI_TASK_CHG4_DIS,
+ NRFX_GPPI_TASK_CHG5_EN = NRF_DPPI_TASK_CHG5_EN,
+ NRFX_GPPI_TASK_CHG5_DIS = NRF_DPPI_TASK_CHG5_DIS
+} nrfx_gppi_task_t;
+
+#elif defined(__NRFX_DOXYGEN__)
+
+/** @brief Generic PPI channel groups. */
+typedef enum
+{
+ NRFX_GPPI_CHANNEL_GROUP0, /**< Channel group 0.*/
+ NRFX_GPPI_CHANNEL_GROUP1, /**< Channel group 1.*/
+ NRFX_GPPI_CHANNEL_GROUP2, /**< Channel group 2.*/
+ NRFX_GPPI_CHANNEL_GROUP3, /**< Channel group 3.*/
+ NRFX_GPPI_CHANNEL_GROUP4, /**< Channel group 4.*/
+ NRFX_GPPI_CHANNEL_GROUP5, /**< Channel group 5.*/
+} nrfx_gppi_channel_group_t;
+
+/** @brief Generic PPI tasks. */
+typedef enum
+{
+ NRFX_GPPI_TASK_CHG0_EN, /**< Task for enabling channel group 0 */
+ NRFX_GPPI_TASK_CHG0_DIS, /**< Task for disabling channel group 0 */
+ NRFX_GPPI_TASK_CHG1_EN, /**< Task for enabling channel group 1 */
+ NRFX_GPPI_TASK_CHG1_DIS, /**< Task for disabling channel group 1 */
+ NRFX_GPPI_TASK_CHG2_EN, /**< Task for enabling channel group 2 */
+ NRFX_GPPI_TASK_CHG2_DIS, /**< Task for disabling channel group 2 */
+ NRFX_GPPI_TASK_CHG3_EN, /**< Task for enabling channel group 3 */
+ NRFX_GPPI_TASK_CHG3_DIS, /**< Task for disabling channel group 3 */
+ NRFX_GPPI_TASK_CHG4_EN, /**< Task for enabling channel group 4 */
+ NRFX_GPPI_TASK_CHG4_DIS, /**< Task for disabling channel group 4 */
+ NRFX_GPPI_TASK_CHG5_EN, /**< Task for enabling channel group 5 */
+ NRFX_GPPI_TASK_CHG5_DIS, /**< Task for disabling channel group 5 */
+} nrfx_gppi_task_t;
+#endif // defined(__NRFX_DOXYGEN__)
+
+/**
+ * @brief Function for checking if a given channel is enabled.
+ *
+ * @param[in] channel Channel to check.
+ *
+ * @retval true The channel is enabled.
+ * @retval false The channel is not enabled.
+ */
+__STATIC_INLINE bool nrfx_gppi_channel_check(uint8_t channel);
+
+/** @brief Function for disabling all channels. */
+__STATIC_INLINE void nrfx_gppi_channels_disable_all(void);
+
+/**
+ * @brief Function for enabling multiple channels.
+ *
+ * The bits in @c mask value correspond to particular channels. This means that
+ * writing 1 to bit 0 enables channel 0, writing 1 to bit 1 enables channel 1, etc.
+ *
+ * @param[in] mask Channel mask.
+ */
+__STATIC_INLINE void nrfx_gppi_channels_enable(uint32_t mask);
+
+/**
+ * @brief Function for disabling multiple channels.
+ *
+ * The bits in @c mask value correspond to particular channels. This means that
+ * writing 1 to bit 0 disables channel 0, writing 1 to bit 1 disables channel 1, etc.
+ *
+ * @param[in] mask Channel mask.
+ */
+__STATIC_INLINE void nrfx_gppi_channels_disable(uint32_t mask);
+
+/**
+ * @brief Function for associating a given channel with the specified event register.
+ *
+ * This function sets the DPPI publish configuration for a given event
+ * or sets the PPI event endpoint register.
+ *
+ * @param[in] channel Channel to which to assign the event.
+ * @param[in] eep Address of the event register.
+ */
+__STATIC_INLINE void nrfx_gppi_event_endpoint_setup(uint8_t channel, uint32_t eep);
+
+/**
+ * @brief Function for associating a given channel with the specified task register.
+ *
+ * This function sets the DPPI subscribe configuration for a given task
+ * or sets the PPI task endpoint register.
+ *
+ * @param[in] channel Channel to which to assign the task.
+ * @param[in] tep Address of the task register.
+ */
+__STATIC_INLINE void nrfx_gppi_task_endpoint_setup(uint8_t channel, uint32_t tep);
+
+/**
+ * @brief Function for setting up the event and task endpoints for a given channel.
+ *
+ * @param[in] channel Channel to which the given endpoints are assigned.
+ * @param[in] eep Address of the event register.
+ * @param[in] tep Address of the task register.
+ */
+__STATIC_INLINE void nrfx_gppi_channel_endpoints_setup(uint8_t channel,
+ uint32_t eep,
+ uint32_t tep);
+
+/**
+ * @brief Function for clearing the DPPI publish configuration for a given event
+ * register or for clearing the PPI event endpoint register.
+ *
+ * @param[in] channel Channel for which to clear the event endpoint. Not used in DPPI.
+ * @param[in] eep Address of the event register. Not used in PPI.
+ */
+__STATIC_INLINE void nrfx_gppi_event_endpoint_clear(uint8_t channel, uint32_t eep);
+
+/**
+ * @brief Function for clearing the DPPI subscribe configuration for a given task
+ * register or for clearing the PPI task endpoint register.
+ *
+ * @param[in] channel Channel from which to disconnect the task enpoint. Not used in DPPI.
+ * @param[in] tep Address of the task register. Not used in PPI.
+ */
+__STATIC_INLINE void nrfx_gppi_task_endpoint_clear(uint8_t channel, uint32_t tep);
+
+
+#if defined(PPI_FEATURE_FORKS_PRESENT) || defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
+/**
+ * @brief Function for setting up the task endpoint for a given PPI fork or for
+ * associating the DPPI channel with an additional task register.
+ *
+ * @param[in] channel Channel to which the given fork endpoint is assigned.
+ * @param[in] fork_tep Address of the task register.
+ */
+__STATIC_INLINE void nrfx_gppi_fork_endpoint_setup(uint8_t channel, uint32_t fork_tep);
+
+/**
+ * @brief Function for clearing the task endpoint for a given PPI fork or for clearing
+ * the DPPI subscribe register.
+ *
+ * @param[in] channel Channel for which to clear the fork endpoint. Not used in DPPI.
+ * @param[in] fork_tep Address of the task register. Not used in PPI.
+ */
+__STATIC_INLINE void nrfx_gppi_fork_endpoint_clear(uint8_t channel, uint32_t fork_tep);
+#endif // defined(PPI_FEATURE_FORKS_PRESENT) || defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
+
+/**
+ * @brief Function for including multiple channels in a channel group.
+ *
+ * @param[in] channel_mask Channels to be included in the group.
+ * @param[in] channel_group Channel group.
+ */
+__STATIC_INLINE void nrfx_gppi_channels_include_in_group(uint32_t channel_mask,
+ nrfx_gppi_channel_group_t channel_group);
+
+/**
+ * @brief Function for removing multiple channels from a channel group.
+ *
+ * @param[in] channel_mask Channels to be removed from the group.
+ * @param[in] channel_group Channel group.
+ */
+__STATIC_INLINE void nrfx_gppi_channels_remove_from_group(uint32_t channel_mask,
+ nrfx_gppi_channel_group_t channel_group);
+
+/**
+ * @brief Function for removing all channels from a channel group.
+ *
+ * @param[in] channel_group Channel group.
+ */
+__STATIC_INLINE void nrfx_gppi_group_clear(nrfx_gppi_channel_group_t channel_group);
+
+/**
+ * @brief Function for enabling a channel group.
+ *
+ * @param[in] channel_group Channel group.
+ */
+__STATIC_INLINE void nrfx_gppi_group_enable(nrfx_gppi_channel_group_t channel_group);
+
+/**
+ * @brief Function for disabling a group.
+ *
+ * @param[in] channel_group Channel group.
+ */
+__STATIC_INLINE void nrfx_gppi_group_disable(nrfx_gppi_channel_group_t channel_group);
+
+/**
+ * @brief Function for activating a task.
+ *
+ * @param[in] task Task to be activated.
+ */
+__STATIC_INLINE void nrfx_gppi_task_trigger(nrfx_gppi_task_t task);
+
+/**
+ * @brief Function for returning the address of a specific task register.
+ *
+ * @param[in] task PPI or DPPI task.
+ *
+ * @return Address of the requested task register.
+ */
+__STATIC_INLINE uint32_t nrfx_gppi_task_address_get(nrfx_gppi_task_t task);
+
+/**
+ * @brief Function for returning the address of a channel group disable task.
+ *
+ * @param[in] group Channel group.
+ *
+ * @return Disable task address of the specified group.
+ */
+__STATIC_INLINE nrfx_gppi_task_t nrfx_gppi_group_disable_task_get(nrfx_gppi_channel_group_t group);
+
+/**
+ * @brief Function for returning the address of a channel group enable task.
+ *
+ * @param[in] group Channel group.
+ *
+ * @return Enable task address of the specified group.
+ */
+__STATIC_INLINE nrfx_gppi_task_t nrfx_gppi_group_enable_task_get(nrfx_gppi_channel_group_t group);
+
+/** @} */
+
+#if defined(PPI_PRESENT)
+
+__STATIC_INLINE bool nrfx_gppi_channel_check(uint8_t channel)
+{
+ return (nrf_ppi_channel_enable_get((nrf_ppi_channel_t)channel) == NRF_PPI_CHANNEL_ENABLED);
+}
+
+__STATIC_INLINE void nrfx_gppi_channels_disable_all(void)
+{
+ nrf_ppi_channel_disable_all();
+}
+
+__STATIC_INLINE void nrfx_gppi_channels_enable(uint32_t mask)
+{
+ nrf_ppi_channels_enable(mask);
+}
+
+__STATIC_INLINE void nrfx_gppi_channels_disable(uint32_t mask)
+{
+ nrf_ppi_channels_disable(mask);
+}
+
+__STATIC_INLINE void nrfx_gppi_event_endpoint_setup(uint8_t channel, uint32_t eep)
+{
+ nrf_ppi_event_endpoint_setup((nrf_ppi_channel_t)channel, eep);
+}
+
+__STATIC_INLINE void nrfx_gppi_task_endpoint_setup(uint8_t channel, uint32_t tep)
+{
+ nrf_ppi_task_endpoint_setup((nrf_ppi_channel_t)channel, tep);
+}
+
+__STATIC_INLINE void nrfx_gppi_channel_endpoints_setup(uint8_t channel,
+ uint32_t eep,
+ uint32_t tep)
+{
+ nrf_ppi_channel_endpoint_setup((nrf_ppi_channel_t)channel, eep, tep);
+}
+
+__STATIC_INLINE void nrfx_gppi_event_endpoint_clear(uint8_t channel, uint32_t eep)
+{
+ (void)eep;
+ nrf_ppi_event_endpoint_setup((nrf_ppi_channel_t)channel, 0);
+}
+
+__STATIC_INLINE void nrfx_gppi_task_endpoint_clear(uint8_t channel, uint32_t tep)
+{
+ (void)tep;
+ nrf_ppi_task_endpoint_setup((nrf_ppi_channel_t)channel, 0);
+}
+
+#if defined(PPI_FEATURE_FORKS_PRESENT)
+__STATIC_INLINE void nrfx_gppi_fork_endpoint_setup(uint8_t channel, uint32_t fork_tep)
+{
+ nrf_ppi_fork_endpoint_setup((nrf_ppi_channel_t)channel, fork_tep);
+}
+
+__STATIC_INLINE void nrfx_gppi_fork_endpoint_clear(uint8_t channel, uint32_t fork_tep)
+{
+ (void)fork_tep;
+ nrf_ppi_fork_endpoint_setup((nrf_ppi_channel_t)channel, 0);
+}
+#endif
+
+__STATIC_INLINE void nrfx_gppi_channels_include_in_group(uint32_t channel_mask,
+ nrfx_gppi_channel_group_t channel_group)
+{
+ nrf_ppi_channels_include_in_group(channel_mask, channel_group);
+}
+
+__STATIC_INLINE void nrfx_gppi_channels_remove_from_group(uint32_t channel_mask,
+ nrfx_gppi_channel_group_t channel_group)
+{
+ nrf_ppi_channels_remove_from_group(channel_mask, channel_group);
+}
+
+__STATIC_INLINE void nrfx_gppi_group_clear(nrfx_gppi_channel_group_t channel_group)
+{
+ nrf_ppi_channel_group_clear(channel_group);
+}
+
+__STATIC_INLINE void nrfx_gppi_group_enable(nrfx_gppi_channel_group_t channel_group)
+{
+ nrf_ppi_group_enable(channel_group);
+}
+
+__STATIC_INLINE void nrfx_gppi_group_disable(nrfx_gppi_channel_group_t channel_group)
+{
+ nrf_ppi_group_disable(channel_group);
+}
+
+__STATIC_INLINE void nrfx_gppi_task_trigger(nrfx_gppi_task_t task)
+{
+ nrf_ppi_task_trigger(task);
+}
+
+__STATIC_INLINE uint32_t nrfx_gppi_task_address_get(nrfx_gppi_task_t task)
+{
+ return (uint32_t)nrf_ppi_task_address_get(task);
+}
+
+__STATIC_INLINE nrfx_gppi_task_t nrfx_gppi_group_disable_task_get(nrfx_gppi_channel_group_t group)
+{
+ return (nrfx_gppi_task_t)nrf_ppi_group_disable_task_get((uint8_t)group);
+}
+
+__STATIC_INLINE nrfx_gppi_task_t nrfx_gppi_group_enable_task_get(nrfx_gppi_channel_group_t group)
+{
+ return (nrfx_gppi_task_t)nrf_ppi_group_enable_task_get((uint8_t)group);
+}
+
+#elif defined(DPPI_PRESENT)
+
+__STATIC_INLINE bool nrfx_gppi_channel_check(uint8_t channel)
+{
+ return nrf_dppi_channel_check(NRF_DPPIC, channel);
+}
+
+__STATIC_INLINE void nrfx_gppi_channels_disable_all(void)
+{
+ nrf_dppi_channels_disable_all(NRF_DPPIC);
+}
+
+__STATIC_INLINE void nrfx_gppi_channels_enable(uint32_t mask)
+{
+ nrf_dppi_channels_enable(NRF_DPPIC, mask);
+}
+
+__STATIC_INLINE void nrfx_gppi_channels_disable(uint32_t mask)
+{
+ nrf_dppi_channels_disable(NRF_DPPIC, mask);
+}
+
+__STATIC_INLINE void nrfx_gppi_task_trigger(nrfx_gppi_task_t task)
+{
+ nrf_dppi_task_trigger(NRF_DPPIC, task);
+}
+
+__STATIC_INLINE void nrfx_gppi_event_endpoint_setup(uint8_t channel, uint32_t eep)
+{
+ NRFX_ASSERT(eep);
+ *((volatile uint32_t *)(eep + 0x80uL)) = ((uint32_t)channel | DPPIC_SUBSCRIBE_CHG_EN_EN_Msk);
+}
+
+__STATIC_INLINE void nrfx_gppi_task_endpoint_setup(uint8_t channel, uint32_t tep)
+{
+ NRFX_ASSERT(tep);
+ *((volatile uint32_t *)(tep + 0x80uL)) = ((uint32_t)channel | DPPIC_SUBSCRIBE_CHG_EN_EN_Msk);
+}
+
+__STATIC_INLINE void nrfx_gppi_channel_endpoints_setup(uint8_t channel,
+ uint32_t eep,
+ uint32_t tep)
+{
+ nrfx_gppi_event_endpoint_setup(channel, eep);
+ nrfx_gppi_task_endpoint_setup(channel, tep);
+}
+
+__STATIC_INLINE void nrfx_gppi_event_endpoint_clear(uint8_t channel, uint32_t eep)
+{
+ NRFX_ASSERT(eep);
+ (void)channel;
+ *((volatile uint32_t *)(eep + 0x80uL)) = 0;
+}
+
+__STATIC_INLINE void nrfx_gppi_task_endpoint_clear(uint8_t channel, uint32_t tep)
+{
+ NRFX_ASSERT(tep);
+ (void)channel;
+ *((volatile uint32_t *)(tep + 0x80uL)) = 0;
+}
+
+__STATIC_INLINE void nrfx_gppi_fork_endpoint_setup(uint8_t channel, uint32_t fork_tep)
+{
+ nrfx_gppi_task_endpoint_setup(channel, fork_tep);
+}
+
+__STATIC_INLINE void nrfx_gppi_fork_endpoint_clear(uint8_t channel, uint32_t fork_tep)
+{
+ nrfx_gppi_task_endpoint_clear(channel, fork_tep);
+}
+
+__STATIC_INLINE void nrfx_gppi_channels_include_in_group(uint32_t channel_mask,
+ nrfx_gppi_channel_group_t channel_group)
+{
+ nrf_dppi_channels_include_in_group(NRF_DPPIC, channel_mask, channel_group);
+}
+
+__STATIC_INLINE void nrfx_gppi_channels_remove_from_group(uint32_t channel_mask,
+ nrfx_gppi_channel_group_t channel_group)
+{
+ nrf_dppi_channels_remove_from_group(NRF_DPPIC, channel_mask, channel_group);
+}
+
+__STATIC_INLINE void nrfx_gppi_group_clear(nrfx_gppi_channel_group_t channel_group)
+{
+ nrf_dppi_group_clear(NRF_DPPIC, channel_group);
+}
+
+__STATIC_INLINE void nrfx_gppi_group_enable(nrfx_gppi_channel_group_t channel_group)
+{
+ nrf_dppi_group_enable(NRF_DPPIC, channel_group);
+}
+
+__STATIC_INLINE void nrfx_gppi_group_disable(nrfx_gppi_channel_group_t channel_group)
+{
+ nrf_dppi_group_disable(NRF_DPPIC, channel_group);
+}
+
+__STATIC_INLINE uint32_t nrfx_gppi_task_address_get(nrfx_gppi_task_t gppi_task)
+{
+ return (uint32_t) ((uint8_t *) NRF_DPPIC + (uint32_t) gppi_task);
+}
+
+__STATIC_INLINE nrfx_gppi_task_t nrfx_gppi_group_disable_task_get(nrfx_gppi_channel_group_t group)
+{
+ return (nrfx_gppi_task_t) nrf_dppi_group_disable_task_get((uint8_t)group);
+}
+
+__STATIC_INLINE nrfx_gppi_task_t nrfx_gppi_group_enable_task_get(nrfx_gppi_channel_group_t group)
+{
+ return (nrfx_gppi_task_t) nrf_dppi_group_enable_task_get((uint8_t)group);
+}
+
+#else
+#error "Neither PPI nor DPPI is present in the SoC currently in use."
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // NRFX_GPPI_H
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/arm_startup_nrf52805.s b/third_party/NordicSemiconductor/nrfx/mdk/arm_startup_nrf52805.s
new file mode 100644
index 0000000..2a5c5ff
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/mdk/arm_startup_nrf52805.s
@@ -0,0 +1,343 @@
+; Copyright (c) 2009-2018 ARM Limited. All rights reserved.
+;
+; SPDX-License-Identifier: Apache-2.0
+;
+; Licensed under the Apache License, Version 2.0 (the License); you may
+; not use this file except in compliance with the License.
+; You may obtain a copy of the License at
+;
+; www.apache.org/licenses/LICENSE-2.0
+;
+; Unless required by applicable law or agreed to in writing, software
+; distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; See the License for the specific language governing permissions and
+; limitations under the License.
+;
+; NOTICE: This file has been modified by Nordic Semiconductor ASA.
+
+ IF :DEF: __STARTUP_CONFIG
+#ifdef __STARTUP_CONFIG
+#include "startup_config.h"
+#ifndef __STARTUP_CONFIG_STACK_ALIGNEMENT
+#define __STARTUP_CONFIG_STACK_ALIGNEMENT 3
+#endif
+#endif
+ ENDIF
+
+ IF :DEF: __STARTUP_CONFIG
+Stack_Size EQU __STARTUP_CONFIG_STACK_SIZE
+ ELIF :DEF: __STACK_SIZE
+Stack_Size EQU __STACK_SIZE
+ ELSE
+Stack_Size EQU 2048
+ ENDIF
+
+ IF :DEF: __STARTUP_CONFIG
+Stack_Align EQU __STARTUP_CONFIG_STACK_ALIGNEMENT
+ ELSE
+Stack_Align EQU 3
+ ENDIF
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=Stack_Align
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+ IF :DEF: __STARTUP_CONFIG
+Heap_Size EQU __STARTUP_CONFIG_HEAP_SIZE
+ ELIF :DEF: __HEAP_SIZE
+Heap_Size EQU __HEAP_SIZE
+ ELSE
+Heap_Size EQU 2048
+ ENDIF
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+; Vector Table Mapped to Address 0 at Reset
+
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler
+ DCD NMI_Handler
+ DCD HardFault_Handler
+ DCD MemoryManagement_Handler
+ DCD BusFault_Handler
+ DCD UsageFault_Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler
+ DCD DebugMon_Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler
+ DCD SysTick_Handler
+
+ ; External Interrupts
+ DCD POWER_CLOCK_IRQHandler
+ DCD RADIO_IRQHandler
+ DCD UARTE0_UART0_IRQHandler
+ DCD TWIM0_TWIS0_TWI0_IRQHandler
+ DCD SPIM0_SPIS0_SPI0_IRQHandler
+ DCD 0 ; Reserved
+ DCD GPIOTE_IRQHandler
+ DCD SAADC_IRQHandler
+ DCD TIMER0_IRQHandler
+ DCD TIMER1_IRQHandler
+ DCD TIMER2_IRQHandler
+ DCD RTC0_IRQHandler
+ DCD TEMP_IRQHandler
+ DCD RNG_IRQHandler
+ DCD ECB_IRQHandler
+ DCD CCM_AAR_IRQHandler
+ DCD WDT_IRQHandler
+ DCD RTC1_IRQHandler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SWI0_EGU0_IRQHandler
+ DCD SWI1_EGU1_IRQHandler
+ DCD SWI2_IRQHandler
+ DCD SWI3_IRQHandler
+ DCD SWI4_IRQHandler
+ DCD SWI5_IRQHandler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset Handler
+
+
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemoryManagement_Handler\
+ PROC
+ EXPORT MemoryManagement_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT POWER_CLOCK_IRQHandler [WEAK]
+ EXPORT RADIO_IRQHandler [WEAK]
+ EXPORT UARTE0_UART0_IRQHandler [WEAK]
+ EXPORT TWIM0_TWIS0_TWI0_IRQHandler [WEAK]
+ EXPORT SPIM0_SPIS0_SPI0_IRQHandler [WEAK]
+ EXPORT GPIOTE_IRQHandler [WEAK]
+ EXPORT SAADC_IRQHandler [WEAK]
+ EXPORT TIMER0_IRQHandler [WEAK]
+ EXPORT TIMER1_IRQHandler [WEAK]
+ EXPORT TIMER2_IRQHandler [WEAK]
+ EXPORT RTC0_IRQHandler [WEAK]
+ EXPORT TEMP_IRQHandler [WEAK]
+ EXPORT RNG_IRQHandler [WEAK]
+ EXPORT ECB_IRQHandler [WEAK]
+ EXPORT CCM_AAR_IRQHandler [WEAK]
+ EXPORT WDT_IRQHandler [WEAK]
+ EXPORT RTC1_IRQHandler [WEAK]
+ EXPORT SWI0_EGU0_IRQHandler [WEAK]
+ EXPORT SWI1_EGU1_IRQHandler [WEAK]
+ EXPORT SWI2_IRQHandler [WEAK]
+ EXPORT SWI3_IRQHandler [WEAK]
+ EXPORT SWI4_IRQHandler [WEAK]
+ EXPORT SWI5_IRQHandler [WEAK]
+POWER_CLOCK_IRQHandler
+RADIO_IRQHandler
+UARTE0_UART0_IRQHandler
+TWIM0_TWIS0_TWI0_IRQHandler
+SPIM0_SPIS0_SPI0_IRQHandler
+GPIOTE_IRQHandler
+SAADC_IRQHandler
+TIMER0_IRQHandler
+TIMER1_IRQHandler
+TIMER2_IRQHandler
+RTC0_IRQHandler
+TEMP_IRQHandler
+RNG_IRQHandler
+ECB_IRQHandler
+CCM_AAR_IRQHandler
+WDT_IRQHandler
+RTC1_IRQHandler
+SWI0_EGU0_IRQHandler
+SWI1_EGU1_IRQHandler
+SWI2_IRQHandler
+SWI3_IRQHandler
+SWI4_IRQHandler
+SWI5_IRQHandler
+ B .
+ ENDP
+ ALIGN
+
+; User Initial Stack & Heap
+
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap PROC
+
+ LDR R0, = Heap_Mem
+ LDR R1, = (Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+ ENDP
+
+ ALIGN
+
+ ENDIF
+
+ END
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/arm_startup_nrf52810.s b/third_party/NordicSemiconductor/nrfx/mdk/arm_startup_nrf52810.s
index 7f75459..2f0984a 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/arm_startup_nrf52810.s
+++ b/third_party/NordicSemiconductor/nrfx/mdk/arm_startup_nrf52810.s
@@ -211,6 +211,29 @@
IMPORT SystemInit
IMPORT __main
+ ; Workaround for Errata 185 RAM: RAM corruption at extreme corners
+ ; found at the Errata document for your device located
+ ; at https://infocenter.nordicsemi.com/index.jsp
+
+ LDR R0, =0x10000130
+ LDR R0, [R0]
+ LDR R1, =0x10000134
+ LDR R1, [R1]
+
+ CMP R0, #0xA
+ BNE skip
+ CMP R1, #0x0
+ BNE skip
+
+ LDR R0, =0x40000EE4
+ LDR R2, [R0]
+ LDR R3, =0xFFFFFF8F
+ ANDS R2, R2, R3
+ LDR R3, =0x00000040
+ ORRS R2, R2, R3
+ STR R2, [R0]
+
+skip
LDR R0, =SystemInit
BLX R0
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/arm_startup_nrf52833.s b/third_party/NordicSemiconductor/nrfx/mdk/arm_startup_nrf52833.s
new file mode 100644
index 0000000..a620996
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/mdk/arm_startup_nrf52833.s
@@ -0,0 +1,379 @@
+; Copyright (c) 2009-2018 ARM Limited. All rights reserved.
+;
+; SPDX-License-Identifier: Apache-2.0
+;
+; Licensed under the Apache License, Version 2.0 (the License); you may
+; not use this file except in compliance with the License.
+; You may obtain a copy of the License at
+;
+; www.apache.org/licenses/LICENSE-2.0
+;
+; Unless required by applicable law or agreed to in writing, software
+; distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; See the License for the specific language governing permissions and
+; limitations under the License.
+;
+; NOTICE: This file has been modified by Nordic Semiconductor ASA.
+
+ IF :DEF: __STARTUP_CONFIG
+#ifdef __STARTUP_CONFIG
+#include "startup_config.h"
+#ifndef __STARTUP_CONFIG_STACK_ALIGNEMENT
+#define __STARTUP_CONFIG_STACK_ALIGNEMENT 3
+#endif
+#endif
+ ENDIF
+
+ IF :DEF: __STARTUP_CONFIG
+Stack_Size EQU __STARTUP_CONFIG_STACK_SIZE
+ ELIF :DEF: __STACK_SIZE
+Stack_Size EQU __STACK_SIZE
+ ELSE
+Stack_Size EQU 8192
+ ENDIF
+
+ IF :DEF: __STARTUP_CONFIG
+Stack_Align EQU __STARTUP_CONFIG_STACK_ALIGNEMENT
+ ELSE
+Stack_Align EQU 3
+ ENDIF
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=Stack_Align
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+ IF :DEF: __STARTUP_CONFIG
+Heap_Size EQU __STARTUP_CONFIG_HEAP_SIZE
+ ELIF :DEF: __HEAP_SIZE
+Heap_Size EQU __HEAP_SIZE
+ ELSE
+Heap_Size EQU 8192
+ ENDIF
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+; Vector Table Mapped to Address 0 at Reset
+
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler
+ DCD NMI_Handler
+ DCD HardFault_Handler
+ DCD MemoryManagement_Handler
+ DCD BusFault_Handler
+ DCD UsageFault_Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler
+ DCD DebugMon_Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler
+ DCD SysTick_Handler
+
+ ; External Interrupts
+ DCD POWER_CLOCK_IRQHandler
+ DCD RADIO_IRQHandler
+ DCD UARTE0_UART0_IRQHandler
+ DCD SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+ DCD SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+ DCD NFCT_IRQHandler
+ DCD GPIOTE_IRQHandler
+ DCD SAADC_IRQHandler
+ DCD TIMER0_IRQHandler
+ DCD TIMER1_IRQHandler
+ DCD TIMER2_IRQHandler
+ DCD RTC0_IRQHandler
+ DCD TEMP_IRQHandler
+ DCD RNG_IRQHandler
+ DCD ECB_IRQHandler
+ DCD CCM_AAR_IRQHandler
+ DCD WDT_IRQHandler
+ DCD RTC1_IRQHandler
+ DCD QDEC_IRQHandler
+ DCD COMP_LPCOMP_IRQHandler
+ DCD SWI0_EGU0_IRQHandler
+ DCD SWI1_EGU1_IRQHandler
+ DCD SWI2_EGU2_IRQHandler
+ DCD SWI3_EGU3_IRQHandler
+ DCD SWI4_EGU4_IRQHandler
+ DCD SWI5_EGU5_IRQHandler
+ DCD TIMER3_IRQHandler
+ DCD TIMER4_IRQHandler
+ DCD PWM0_IRQHandler
+ DCD PDM_IRQHandler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD MWU_IRQHandler
+ DCD PWM1_IRQHandler
+ DCD PWM2_IRQHandler
+ DCD SPIM2_SPIS2_SPI2_IRQHandler
+ DCD RTC2_IRQHandler
+ DCD I2S_IRQHandler
+ DCD FPU_IRQHandler
+ DCD USBD_IRQHandler
+ DCD UARTE1_IRQHandler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD PWM3_IRQHandler
+ DCD 0 ; Reserved
+ DCD SPIM3_IRQHandler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset Handler
+
+
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemoryManagement_Handler\
+ PROC
+ EXPORT MemoryManagement_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT POWER_CLOCK_IRQHandler [WEAK]
+ EXPORT RADIO_IRQHandler [WEAK]
+ EXPORT UARTE0_UART0_IRQHandler [WEAK]
+ EXPORT SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler [WEAK]
+ EXPORT SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler [WEAK]
+ EXPORT NFCT_IRQHandler [WEAK]
+ EXPORT GPIOTE_IRQHandler [WEAK]
+ EXPORT SAADC_IRQHandler [WEAK]
+ EXPORT TIMER0_IRQHandler [WEAK]
+ EXPORT TIMER1_IRQHandler [WEAK]
+ EXPORT TIMER2_IRQHandler [WEAK]
+ EXPORT RTC0_IRQHandler [WEAK]
+ EXPORT TEMP_IRQHandler [WEAK]
+ EXPORT RNG_IRQHandler [WEAK]
+ EXPORT ECB_IRQHandler [WEAK]
+ EXPORT CCM_AAR_IRQHandler [WEAK]
+ EXPORT WDT_IRQHandler [WEAK]
+ EXPORT RTC1_IRQHandler [WEAK]
+ EXPORT QDEC_IRQHandler [WEAK]
+ EXPORT COMP_LPCOMP_IRQHandler [WEAK]
+ EXPORT SWI0_EGU0_IRQHandler [WEAK]
+ EXPORT SWI1_EGU1_IRQHandler [WEAK]
+ EXPORT SWI2_EGU2_IRQHandler [WEAK]
+ EXPORT SWI3_EGU3_IRQHandler [WEAK]
+ EXPORT SWI4_EGU4_IRQHandler [WEAK]
+ EXPORT SWI5_EGU5_IRQHandler [WEAK]
+ EXPORT TIMER3_IRQHandler [WEAK]
+ EXPORT TIMER4_IRQHandler [WEAK]
+ EXPORT PWM0_IRQHandler [WEAK]
+ EXPORT PDM_IRQHandler [WEAK]
+ EXPORT MWU_IRQHandler [WEAK]
+ EXPORT PWM1_IRQHandler [WEAK]
+ EXPORT PWM2_IRQHandler [WEAK]
+ EXPORT SPIM2_SPIS2_SPI2_IRQHandler [WEAK]
+ EXPORT RTC2_IRQHandler [WEAK]
+ EXPORT I2S_IRQHandler [WEAK]
+ EXPORT FPU_IRQHandler [WEAK]
+ EXPORT USBD_IRQHandler [WEAK]
+ EXPORT UARTE1_IRQHandler [WEAK]
+ EXPORT PWM3_IRQHandler [WEAK]
+ EXPORT SPIM3_IRQHandler [WEAK]
+POWER_CLOCK_IRQHandler
+RADIO_IRQHandler
+UARTE0_UART0_IRQHandler
+SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+NFCT_IRQHandler
+GPIOTE_IRQHandler
+SAADC_IRQHandler
+TIMER0_IRQHandler
+TIMER1_IRQHandler
+TIMER2_IRQHandler
+RTC0_IRQHandler
+TEMP_IRQHandler
+RNG_IRQHandler
+ECB_IRQHandler
+CCM_AAR_IRQHandler
+WDT_IRQHandler
+RTC1_IRQHandler
+QDEC_IRQHandler
+COMP_LPCOMP_IRQHandler
+SWI0_EGU0_IRQHandler
+SWI1_EGU1_IRQHandler
+SWI2_EGU2_IRQHandler
+SWI3_EGU3_IRQHandler
+SWI4_EGU4_IRQHandler
+SWI5_EGU5_IRQHandler
+TIMER3_IRQHandler
+TIMER4_IRQHandler
+PWM0_IRQHandler
+PDM_IRQHandler
+MWU_IRQHandler
+PWM1_IRQHandler
+PWM2_IRQHandler
+SPIM2_SPIS2_SPI2_IRQHandler
+RTC2_IRQHandler
+I2S_IRQHandler
+FPU_IRQHandler
+USBD_IRQHandler
+UARTE1_IRQHandler
+PWM3_IRQHandler
+SPIM3_IRQHandler
+ B .
+ ENDP
+ ALIGN
+
+; User Initial Stack & Heap
+
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap PROC
+
+ LDR R0, = Heap_Mem
+ LDR R1, = (Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+ ENDP
+
+ ALIGN
+
+ ENDIF
+
+ END
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/gcc_startup_nrf52805.S b/third_party/NordicSemiconductor/nrfx/mdk/gcc_startup_nrf52805.S
new file mode 100644
index 0000000..d725622
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/mdk/gcc_startup_nrf52805.S
@@ -0,0 +1,390 @@
+/*
+
+Copyright (c) 2009-2018 ARM Limited. All rights reserved.
+
+ SPDX-License-Identifier: Apache-2.0
+
+Licensed under the Apache License, Version 2.0 (the License); you may
+not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+ www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an AS IS BASIS, WITHOUT
+WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+NOTICE: This file has been modified by Nordic Semiconductor ASA.
+
+*/
+
+ .syntax unified
+ .arch armv7e-m
+
+#ifdef __STARTUP_CONFIG
+#include "startup_config.h"
+#ifndef __STARTUP_CONFIG_STACK_ALIGNEMENT
+#define __STARTUP_CONFIG_STACK_ALIGNEMENT 3
+#endif
+#endif
+
+ .section .stack
+#if defined(__STARTUP_CONFIG)
+ .align __STARTUP_CONFIG_STACK_ALIGNEMENT
+ .equ Stack_Size, __STARTUP_CONFIG_STACK_SIZE
+#elif defined(__STACK_SIZE)
+ .align 3
+ .equ Stack_Size, __STACK_SIZE
+#else
+ .align 3
+ .equ Stack_Size, 2048
+#endif
+ .globl __StackTop
+ .globl __StackLimit
+__StackLimit:
+ .space Stack_Size
+ .size __StackLimit, . - __StackLimit
+__StackTop:
+ .size __StackTop, . - __StackTop
+
+ .section .heap
+ .align 3
+#if defined(__STARTUP_CONFIG)
+ .equ Heap_Size, __STARTUP_CONFIG_HEAP_SIZE
+#elif defined(__HEAP_SIZE)
+ .equ Heap_Size, __HEAP_SIZE
+#else
+ .equ Heap_Size, 2048
+#endif
+ .globl __HeapBase
+ .globl __HeapLimit
+__HeapBase:
+ .if Heap_Size
+ .space Heap_Size
+ .endif
+ .size __HeapBase, . - __HeapBase
+__HeapLimit:
+ .size __HeapLimit, . - __HeapLimit
+
+ .section .isr_vector
+ .align 2
+ .globl __isr_vector
+__isr_vector:
+ .long __StackTop /* Top of Stack */
+ .long Reset_Handler
+ .long NMI_Handler
+ .long HardFault_Handler
+ .long MemoryManagement_Handler
+ .long BusFault_Handler
+ .long UsageFault_Handler
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long SVC_Handler
+ .long DebugMon_Handler
+ .long 0 /*Reserved */
+ .long PendSV_Handler
+ .long SysTick_Handler
+
+ /* External Interrupts */
+ .long POWER_CLOCK_IRQHandler
+ .long RADIO_IRQHandler
+ .long UARTE0_UART0_IRQHandler
+ .long TWIM0_TWIS0_TWI0_IRQHandler
+ .long SPIM0_SPIS0_SPI0_IRQHandler
+ .long 0 /*Reserved */
+ .long GPIOTE_IRQHandler
+ .long SAADC_IRQHandler
+ .long TIMER0_IRQHandler
+ .long TIMER1_IRQHandler
+ .long TIMER2_IRQHandler
+ .long RTC0_IRQHandler
+ .long TEMP_IRQHandler
+ .long RNG_IRQHandler
+ .long ECB_IRQHandler
+ .long CCM_AAR_IRQHandler
+ .long WDT_IRQHandler
+ .long RTC1_IRQHandler
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long SWI0_EGU0_IRQHandler
+ .long SWI1_EGU1_IRQHandler
+ .long SWI2_IRQHandler
+ .long SWI3_IRQHandler
+ .long SWI4_IRQHandler
+ .long SWI5_IRQHandler
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+
+ .size __isr_vector, . - __isr_vector
+
+/* Reset Handler */
+
+
+ .text
+ .thumb
+ .thumb_func
+ .align 1
+ .globl Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+
+
+/* Loop to copy data from read only memory to RAM.
+ * The ranges of copy from/to are specified by following symbols:
+ * __etext: LMA of start of the section to copy from. Usually end of text
+ * __data_start__: VMA of start of the section to copy to.
+ * __bss_start__: VMA of end of the section to copy to. Normally __data_end__ is used, but by using __bss_start__
+ * the user can add their own initialized data section before BSS section with the INTERT AFTER command.
+ *
+ * All addresses must be aligned to 4 bytes boundary.
+ */
+ ldr r1, =__etext
+ ldr r2, =__data_start__
+ ldr r3, =__bss_start__
+
+ subs r3, r3, r2
+ ble .L_loop1_done
+
+.L_loop1:
+ subs r3, r3, #4
+ ldr r0, [r1,r3]
+ str r0, [r2,r3]
+ bgt .L_loop1
+
+.L_loop1_done:
+
+/* This part of work usually is done in C library startup code. Otherwise,
+ * define __STARTUP_CLEAR_BSS to enable it in this startup. This section
+ * clears the RAM where BSS data is located.
+ *
+ * The BSS section is specified by following symbols
+ * __bss_start__: start of the BSS section.
+ * __bss_end__: end of the BSS section.
+ *
+ * All addresses must be aligned to 4 bytes boundary.
+ */
+#ifdef __STARTUP_CLEAR_BSS
+ ldr r1, =__bss_start__
+ ldr r2, =__bss_end__
+
+ movs r0, 0
+
+ subs r2, r2, r1
+ ble .L_loop3_done
+
+.L_loop3:
+ subs r2, r2, #4
+ str r0, [r1, r2]
+ bgt .L_loop3
+
+.L_loop3_done:
+#endif /* __STARTUP_CLEAR_BSS */
+
+/* Execute SystemInit function. */
+ bl SystemInit
+
+/* Call _start function provided by libraries.
+ * If those libraries are not accessible, define __START as your entry point.
+ */
+#ifndef __START
+#define __START _start
+#endif
+ bl __START
+
+ .pool
+ .size Reset_Handler,.-Reset_Handler
+
+ .section ".text"
+
+
+/* Dummy Exception Handlers (infinite loops which can be modified) */
+
+ .weak NMI_Handler
+ .type NMI_Handler, %function
+NMI_Handler:
+ b .
+ .size NMI_Handler, . - NMI_Handler
+
+
+ .weak HardFault_Handler
+ .type HardFault_Handler, %function
+HardFault_Handler:
+ b .
+ .size HardFault_Handler, . - HardFault_Handler
+
+
+ .weak MemoryManagement_Handler
+ .type MemoryManagement_Handler, %function
+MemoryManagement_Handler:
+ b .
+ .size MemoryManagement_Handler, . - MemoryManagement_Handler
+
+
+ .weak BusFault_Handler
+ .type BusFault_Handler, %function
+BusFault_Handler:
+ b .
+ .size BusFault_Handler, . - BusFault_Handler
+
+
+ .weak UsageFault_Handler
+ .type UsageFault_Handler, %function
+UsageFault_Handler:
+ b .
+ .size UsageFault_Handler, . - UsageFault_Handler
+
+
+ .weak SVC_Handler
+ .type SVC_Handler, %function
+SVC_Handler:
+ b .
+ .size SVC_Handler, . - SVC_Handler
+
+
+ .weak DebugMon_Handler
+ .type DebugMon_Handler, %function
+DebugMon_Handler:
+ b .
+ .size DebugMon_Handler, . - DebugMon_Handler
+
+
+ .weak PendSV_Handler
+ .type PendSV_Handler, %function
+PendSV_Handler:
+ b .
+ .size PendSV_Handler, . - PendSV_Handler
+
+
+ .weak SysTick_Handler
+ .type SysTick_Handler, %function
+SysTick_Handler:
+ b .
+ .size SysTick_Handler, . - SysTick_Handler
+
+
+/* IRQ Handlers */
+
+ .globl Default_Handler
+ .type Default_Handler, %function
+Default_Handler:
+ b .
+ .size Default_Handler, . - Default_Handler
+
+ .macro IRQ handler
+ .weak \handler
+ .set \handler, Default_Handler
+ .endm
+
+ IRQ POWER_CLOCK_IRQHandler
+ IRQ RADIO_IRQHandler
+ IRQ UARTE0_UART0_IRQHandler
+ IRQ TWIM0_TWIS0_TWI0_IRQHandler
+ IRQ SPIM0_SPIS0_SPI0_IRQHandler
+ IRQ GPIOTE_IRQHandler
+ IRQ SAADC_IRQHandler
+ IRQ TIMER0_IRQHandler
+ IRQ TIMER1_IRQHandler
+ IRQ TIMER2_IRQHandler
+ IRQ RTC0_IRQHandler
+ IRQ TEMP_IRQHandler
+ IRQ RNG_IRQHandler
+ IRQ ECB_IRQHandler
+ IRQ CCM_AAR_IRQHandler
+ IRQ WDT_IRQHandler
+ IRQ RTC1_IRQHandler
+ IRQ SWI0_EGU0_IRQHandler
+ IRQ SWI1_EGU1_IRQHandler
+ IRQ SWI2_IRQHandler
+ IRQ SWI3_IRQHandler
+ IRQ SWI4_IRQHandler
+ IRQ SWI5_IRQHandler
+
+ .end
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/gcc_startup_nrf52810.S b/third_party/NordicSemiconductor/nrfx/mdk/gcc_startup_nrf52810.S
index ab01718..4980201 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/gcc_startup_nrf52810.S
+++ b/third_party/NordicSemiconductor/nrfx/mdk/gcc_startup_nrf52810.S
@@ -216,6 +216,29 @@
.type Reset_Handler, %function
Reset_Handler:
+ /* Workaround for Errata 185 RAM: RAM corruption at extreme corners
+ * found at the Errata document for your device located
+ * at https://infocenter.nordicsemi.com/index.jsp */
+
+ LDR R0, =0x10000130
+ LDR R0, [R0]
+ LDR R1, =0x10000134
+ LDR R1, [R1]
+
+ CMP R0, #0xA
+ BNE skip
+ CMP R1, #0x0
+ BNE skip
+
+ LDR R0, =0x40000EE4
+ LDR R2, [R0]
+ LDR R3, =0xFFFFFF8F
+ ANDS R2, R2, R3
+ LDR R3, =0x00000040
+ ORRS R2, R2, R3
+ STR R2, [R0]
+
+skip:
/* Loop to copy data from read only memory to RAM.
* The ranges of copy from/to are specified by following symbols:
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/gcc_startup_nrf52833.S b/third_party/NordicSemiconductor/nrfx/mdk/gcc_startup_nrf52833.S
new file mode 100644
index 0000000..e781779
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/mdk/gcc_startup_nrf52833.S
@@ -0,0 +1,408 @@
+/*
+
+Copyright (c) 2009-2018 ARM Limited. All rights reserved.
+
+ SPDX-License-Identifier: Apache-2.0
+
+Licensed under the Apache License, Version 2.0 (the License); you may
+not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+ www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an AS IS BASIS, WITHOUT
+WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+NOTICE: This file has been modified by Nordic Semiconductor ASA.
+
+*/
+
+ .syntax unified
+ .arch armv7e-m
+
+#ifdef __STARTUP_CONFIG
+#include "startup_config.h"
+#ifndef __STARTUP_CONFIG_STACK_ALIGNEMENT
+#define __STARTUP_CONFIG_STACK_ALIGNEMENT 3
+#endif
+#endif
+
+ .section .stack
+#if defined(__STARTUP_CONFIG)
+ .align __STARTUP_CONFIG_STACK_ALIGNEMENT
+ .equ Stack_Size, __STARTUP_CONFIG_STACK_SIZE
+#elif defined(__STACK_SIZE)
+ .align 3
+ .equ Stack_Size, __STACK_SIZE
+#else
+ .align 3
+ .equ Stack_Size, 8192
+#endif
+ .globl __StackTop
+ .globl __StackLimit
+__StackLimit:
+ .space Stack_Size
+ .size __StackLimit, . - __StackLimit
+__StackTop:
+ .size __StackTop, . - __StackTop
+
+ .section .heap
+ .align 3
+#if defined(__STARTUP_CONFIG)
+ .equ Heap_Size, __STARTUP_CONFIG_HEAP_SIZE
+#elif defined(__HEAP_SIZE)
+ .equ Heap_Size, __HEAP_SIZE
+#else
+ .equ Heap_Size, 8192
+#endif
+ .globl __HeapBase
+ .globl __HeapLimit
+__HeapBase:
+ .if Heap_Size
+ .space Heap_Size
+ .endif
+ .size __HeapBase, . - __HeapBase
+__HeapLimit:
+ .size __HeapLimit, . - __HeapLimit
+
+ .section .isr_vector
+ .align 2
+ .globl __isr_vector
+__isr_vector:
+ .long __StackTop /* Top of Stack */
+ .long Reset_Handler
+ .long NMI_Handler
+ .long HardFault_Handler
+ .long MemoryManagement_Handler
+ .long BusFault_Handler
+ .long UsageFault_Handler
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long SVC_Handler
+ .long DebugMon_Handler
+ .long 0 /*Reserved */
+ .long PendSV_Handler
+ .long SysTick_Handler
+
+ /* External Interrupts */
+ .long POWER_CLOCK_IRQHandler
+ .long RADIO_IRQHandler
+ .long UARTE0_UART0_IRQHandler
+ .long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+ .long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+ .long NFCT_IRQHandler
+ .long GPIOTE_IRQHandler
+ .long SAADC_IRQHandler
+ .long TIMER0_IRQHandler
+ .long TIMER1_IRQHandler
+ .long TIMER2_IRQHandler
+ .long RTC0_IRQHandler
+ .long TEMP_IRQHandler
+ .long RNG_IRQHandler
+ .long ECB_IRQHandler
+ .long CCM_AAR_IRQHandler
+ .long WDT_IRQHandler
+ .long RTC1_IRQHandler
+ .long QDEC_IRQHandler
+ .long COMP_LPCOMP_IRQHandler
+ .long SWI0_EGU0_IRQHandler
+ .long SWI1_EGU1_IRQHandler
+ .long SWI2_EGU2_IRQHandler
+ .long SWI3_EGU3_IRQHandler
+ .long SWI4_EGU4_IRQHandler
+ .long SWI5_EGU5_IRQHandler
+ .long TIMER3_IRQHandler
+ .long TIMER4_IRQHandler
+ .long PWM0_IRQHandler
+ .long PDM_IRQHandler
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long MWU_IRQHandler
+ .long PWM1_IRQHandler
+ .long PWM2_IRQHandler
+ .long SPIM2_SPIS2_SPI2_IRQHandler
+ .long RTC2_IRQHandler
+ .long I2S_IRQHandler
+ .long FPU_IRQHandler
+ .long USBD_IRQHandler
+ .long UARTE1_IRQHandler
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long PWM3_IRQHandler
+ .long 0 /*Reserved */
+ .long SPIM3_IRQHandler
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+
+ .size __isr_vector, . - __isr_vector
+
+/* Reset Handler */
+
+
+ .text
+ .thumb
+ .thumb_func
+ .align 1
+ .globl Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+
+
+/* Loop to copy data from read only memory to RAM.
+ * The ranges of copy from/to are specified by following symbols:
+ * __etext: LMA of start of the section to copy from. Usually end of text
+ * __data_start__: VMA of start of the section to copy to.
+ * __bss_start__: VMA of end of the section to copy to. Normally __data_end__ is used, but by using __bss_start__
+ * the user can add their own initialized data section before BSS section with the INTERT AFTER command.
+ *
+ * All addresses must be aligned to 4 bytes boundary.
+ */
+ ldr r1, =__etext
+ ldr r2, =__data_start__
+ ldr r3, =__bss_start__
+
+ subs r3, r3, r2
+ ble .L_loop1_done
+
+.L_loop1:
+ subs r3, r3, #4
+ ldr r0, [r1,r3]
+ str r0, [r2,r3]
+ bgt .L_loop1
+
+.L_loop1_done:
+
+/* This part of work usually is done in C library startup code. Otherwise,
+ * define __STARTUP_CLEAR_BSS to enable it in this startup. This section
+ * clears the RAM where BSS data is located.
+ *
+ * The BSS section is specified by following symbols
+ * __bss_start__: start of the BSS section.
+ * __bss_end__: end of the BSS section.
+ *
+ * All addresses must be aligned to 4 bytes boundary.
+ */
+#ifdef __STARTUP_CLEAR_BSS
+ ldr r1, =__bss_start__
+ ldr r2, =__bss_end__
+
+ movs r0, 0
+
+ subs r2, r2, r1
+ ble .L_loop3_done
+
+.L_loop3:
+ subs r2, r2, #4
+ str r0, [r1, r2]
+ bgt .L_loop3
+
+.L_loop3_done:
+#endif /* __STARTUP_CLEAR_BSS */
+
+/* Execute SystemInit function. */
+ bl SystemInit
+
+/* Call _start function provided by libraries.
+ * If those libraries are not accessible, define __START as your entry point.
+ */
+#ifndef __START
+#define __START _start
+#endif
+ bl __START
+
+ .pool
+ .size Reset_Handler,.-Reset_Handler
+
+ .section ".text"
+
+
+/* Dummy Exception Handlers (infinite loops which can be modified) */
+
+ .weak NMI_Handler
+ .type NMI_Handler, %function
+NMI_Handler:
+ b .
+ .size NMI_Handler, . - NMI_Handler
+
+
+ .weak HardFault_Handler
+ .type HardFault_Handler, %function
+HardFault_Handler:
+ b .
+ .size HardFault_Handler, . - HardFault_Handler
+
+
+ .weak MemoryManagement_Handler
+ .type MemoryManagement_Handler, %function
+MemoryManagement_Handler:
+ b .
+ .size MemoryManagement_Handler, . - MemoryManagement_Handler
+
+
+ .weak BusFault_Handler
+ .type BusFault_Handler, %function
+BusFault_Handler:
+ b .
+ .size BusFault_Handler, . - BusFault_Handler
+
+
+ .weak UsageFault_Handler
+ .type UsageFault_Handler, %function
+UsageFault_Handler:
+ b .
+ .size UsageFault_Handler, . - UsageFault_Handler
+
+
+ .weak SVC_Handler
+ .type SVC_Handler, %function
+SVC_Handler:
+ b .
+ .size SVC_Handler, . - SVC_Handler
+
+
+ .weak DebugMon_Handler
+ .type DebugMon_Handler, %function
+DebugMon_Handler:
+ b .
+ .size DebugMon_Handler, . - DebugMon_Handler
+
+
+ .weak PendSV_Handler
+ .type PendSV_Handler, %function
+PendSV_Handler:
+ b .
+ .size PendSV_Handler, . - PendSV_Handler
+
+
+ .weak SysTick_Handler
+ .type SysTick_Handler, %function
+SysTick_Handler:
+ b .
+ .size SysTick_Handler, . - SysTick_Handler
+
+
+/* IRQ Handlers */
+
+ .globl Default_Handler
+ .type Default_Handler, %function
+Default_Handler:
+ b .
+ .size Default_Handler, . - Default_Handler
+
+ .macro IRQ handler
+ .weak \handler
+ .set \handler, Default_Handler
+ .endm
+
+ IRQ POWER_CLOCK_IRQHandler
+ IRQ RADIO_IRQHandler
+ IRQ UARTE0_UART0_IRQHandler
+ IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+ IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+ IRQ NFCT_IRQHandler
+ IRQ GPIOTE_IRQHandler
+ IRQ SAADC_IRQHandler
+ IRQ TIMER0_IRQHandler
+ IRQ TIMER1_IRQHandler
+ IRQ TIMER2_IRQHandler
+ IRQ RTC0_IRQHandler
+ IRQ TEMP_IRQHandler
+ IRQ RNG_IRQHandler
+ IRQ ECB_IRQHandler
+ IRQ CCM_AAR_IRQHandler
+ IRQ WDT_IRQHandler
+ IRQ RTC1_IRQHandler
+ IRQ QDEC_IRQHandler
+ IRQ COMP_LPCOMP_IRQHandler
+ IRQ SWI0_EGU0_IRQHandler
+ IRQ SWI1_EGU1_IRQHandler
+ IRQ SWI2_EGU2_IRQHandler
+ IRQ SWI3_EGU3_IRQHandler
+ IRQ SWI4_EGU4_IRQHandler
+ IRQ SWI5_EGU5_IRQHandler
+ IRQ TIMER3_IRQHandler
+ IRQ TIMER4_IRQHandler
+ IRQ PWM0_IRQHandler
+ IRQ PDM_IRQHandler
+ IRQ MWU_IRQHandler
+ IRQ PWM1_IRQHandler
+ IRQ PWM2_IRQHandler
+ IRQ SPIM2_SPIS2_SPI2_IRQHandler
+ IRQ RTC2_IRQHandler
+ IRQ I2S_IRQHandler
+ IRQ FPU_IRQHandler
+ IRQ USBD_IRQHandler
+ IRQ UARTE1_IRQHandler
+ IRQ PWM3_IRQHandler
+ IRQ SPIM3_IRQHandler
+
+ .end
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/gcc_startup_nrf52840.S b/third_party/NordicSemiconductor/nrfx/mdk/gcc_startup_nrf52840.S
index 0de37bb..1d3b6f5 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/gcc_startup_nrf52840.S
+++ b/third_party/NordicSemiconductor/nrfx/mdk/gcc_startup_nrf52840.S
@@ -268,6 +268,22 @@
.L_loop3_done:
#endif /* __STARTUP_CLEAR_BSS */
+.equ Stack_Pattern, 0xDEADBEEF
+ ldr r1, =__StackLimit
+ ldr r2, =__StackTop
+
+ ldr r0, =Stack_Pattern
+
+ subs r2, r2, r1
+ ble .L_loop4_done
+
+.L_loop4:
+ subs r2, r2, #4
+ str r0, [r1, r2]
+ bgt .L_loop4
+
+.L_loop4_done:
+
/* Execute SystemInit function. */
bl SystemInit
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/iar_startup_nrf52805.s b/third_party/NordicSemiconductor/nrfx/mdk/iar_startup_nrf52805.s
new file mode 100644
index 0000000..4b1200c
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/mdk/iar_startup_nrf52805.s
@@ -0,0 +1,386 @@
+; Copyright (c) 2009-2018 ARM Limited. All rights reserved.
+;
+; SPDX-License-Identifier: Apache-2.0
+;
+; Licensed under the Apache License, Version 2.0 (the License); you may
+; not use this file except in compliance with the License.
+; You may obtain a copy of the License at
+;
+; www.apache.org/licenses/LICENSE-2.0
+;
+; Unless required by applicable law or agreed to in writing, software
+; distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; See the License for the specific language governing permissions and
+; limitations under the License.
+;
+; NOTICE: This file has been modified by Nordic Semiconductor ASA.
+
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+
+ MODULE ?cstartup
+
+#if defined(__STARTUP_CONFIG)
+
+ #include "startup_config.h"
+
+ #ifndef __STARTUP_CONFIG_STACK_ALIGNEMENT
+ #define __STARTUP_CONFIG_STACK_ALIGNEMENT 3
+ #endif
+
+ SECTION CSTACK:DATA:NOROOT(__STARTUP_CONFIG_STACK_ALIGNEMENT)
+ DS8 __STARTUP_CONFIG_STACK_SIZE
+
+ SECTION HEAP:DATA:NOROOT(3)
+ DS8 __STARTUP_CONFIG_HEAP_SIZE
+
+#else
+
+ ;; Stack size default : Defined in *.icf (linker file). Can be modified inside EW.
+ ;; Heap size default : Defined in *.icf (linker file). Can be modified inside EW.
+
+ ;; Forward declaration of sections.
+ SECTION CSTACK:DATA:NOROOT(3)
+
+#endif
+
+
+ SECTION .intvec:CODE:NOROOT(2)
+
+ EXTERN __iar_program_start
+ EXTERN SystemInit
+ PUBLIC __vector_table
+ PUBLIC __Vectors
+ PUBLIC __Vectors_End
+ PUBLIC __Vectors_Size
+
+ DATA
+
+__vector_table
+ DCD sfe(CSTACK)
+ DCD Reset_Handler
+ DCD NMI_Handler
+ DCD HardFault_Handler
+ DCD MemoryManagement_Handler
+ DCD BusFault_Handler
+ DCD UsageFault_Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler
+ DCD DebugMon_Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler
+ DCD SysTick_Handler
+
+ ; External Interrupts
+ DCD POWER_CLOCK_IRQHandler
+ DCD RADIO_IRQHandler
+ DCD UARTE0_UART0_IRQHandler
+ DCD TWIM0_TWIS0_TWI0_IRQHandler
+ DCD SPIM0_SPIS0_SPI0_IRQHandler
+ DCD 0 ; Reserved
+ DCD GPIOTE_IRQHandler
+ DCD SAADC_IRQHandler
+ DCD TIMER0_IRQHandler
+ DCD TIMER1_IRQHandler
+ DCD TIMER2_IRQHandler
+ DCD RTC0_IRQHandler
+ DCD TEMP_IRQHandler
+ DCD RNG_IRQHandler
+ DCD ECB_IRQHandler
+ DCD CCM_AAR_IRQHandler
+ DCD WDT_IRQHandler
+ DCD RTC1_IRQHandler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SWI0_EGU0_IRQHandler
+ DCD SWI1_EGU1_IRQHandler
+ DCD SWI2_IRQHandler
+ DCD SWI3_IRQHandler
+ DCD SWI4_IRQHandler
+ DCD SWI5_IRQHandler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+
+__Vectors_End
+__Vectors EQU __vector_table
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+
+; Default handlers.
+ THUMB
+
+ PUBWEAK Reset_Handler
+ SECTION .text:CODE:REORDER:NOROOT(2)
+Reset_Handler
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__iar_program_start
+ BX R0
+
+ ; Dummy exception handlers
+
+
+ PUBWEAK NMI_Handler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+NMI_Handler
+ B .
+
+ PUBWEAK HardFault_Handler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+HardFault_Handler
+ B .
+
+ PUBWEAK MemoryManagement_Handler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+MemoryManagement_Handler
+ B .
+
+ PUBWEAK BusFault_Handler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+BusFault_Handler
+ B .
+
+ PUBWEAK UsageFault_Handler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+UsageFault_Handler
+ B .
+
+ PUBWEAK SVC_Handler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+SVC_Handler
+ B .
+
+ PUBWEAK DebugMon_Handler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+DebugMon_Handler
+ B .
+
+ PUBWEAK PendSV_Handler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+PendSV_Handler
+ B .
+
+ PUBWEAK SysTick_Handler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+SysTick_Handler
+ B .
+
+
+ ; Dummy interrupt handlers
+
+ PUBWEAK POWER_CLOCK_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+POWER_CLOCK_IRQHandler
+ B .
+
+ PUBWEAK RADIO_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+RADIO_IRQHandler
+ B .
+
+ PUBWEAK UARTE0_UART0_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+UARTE0_UART0_IRQHandler
+ B .
+
+ PUBWEAK TWIM0_TWIS0_TWI0_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+TWIM0_TWIS0_TWI0_IRQHandler
+ B .
+
+ PUBWEAK SPIM0_SPIS0_SPI0_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+SPIM0_SPIS0_SPI0_IRQHandler
+ B .
+
+ PUBWEAK GPIOTE_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+GPIOTE_IRQHandler
+ B .
+
+ PUBWEAK SAADC_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+SAADC_IRQHandler
+ B .
+
+ PUBWEAK TIMER0_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+TIMER0_IRQHandler
+ B .
+
+ PUBWEAK TIMER1_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+TIMER1_IRQHandler
+ B .
+
+ PUBWEAK TIMER2_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+TIMER2_IRQHandler
+ B .
+
+ PUBWEAK RTC0_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+RTC0_IRQHandler
+ B .
+
+ PUBWEAK TEMP_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+TEMP_IRQHandler
+ B .
+
+ PUBWEAK RNG_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+RNG_IRQHandler
+ B .
+
+ PUBWEAK ECB_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+ECB_IRQHandler
+ B .
+
+ PUBWEAK CCM_AAR_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+CCM_AAR_IRQHandler
+ B .
+
+ PUBWEAK WDT_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+WDT_IRQHandler
+ B .
+
+ PUBWEAK RTC1_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+RTC1_IRQHandler
+ B .
+
+ PUBWEAK SWI0_EGU0_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+SWI0_EGU0_IRQHandler
+ B .
+
+ PUBWEAK SWI1_EGU1_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+SWI1_EGU1_IRQHandler
+ B .
+
+ PUBWEAK SWI2_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+SWI2_IRQHandler
+ B .
+
+ PUBWEAK SWI3_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+SWI3_IRQHandler
+ B .
+
+ PUBWEAK SWI4_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+SWI4_IRQHandler
+ B .
+
+ PUBWEAK SWI5_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+SWI5_IRQHandler
+ B .
+
+ END
+
+
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/iar_startup_nrf52810.s b/third_party/NordicSemiconductor/nrfx/mdk/iar_startup_nrf52810.s
index e225858..43fe6ec 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/iar_startup_nrf52810.s
+++ b/third_party/NordicSemiconductor/nrfx/mdk/iar_startup_nrf52810.s
@@ -209,6 +209,29 @@
PUBWEAK Reset_Handler
SECTION .text:CODE:REORDER:NOROOT(2)
Reset_Handler
+ /* Workaround for Errata 185 RAM: RAM corruption at extreme corners
+ * found at the Errata document for your device located
+ * at https://infocenter.nordicsemi.com/index.jsp */
+
+ LDR R0, =0x10000130
+ LDR R0, [R0]
+ LDR R1, =0x10000134
+ LDR R1, [R1]
+
+ CMP R0, #0xA
+ BNE skip
+ CMP R1, #0x0
+ BNE skip
+
+ LDR R0, =0x40000EE4
+ LDR R2, [R0]
+ LDR R3, =0xFFFFFF8F
+ ANDS R2, R2, R3
+ LDR R3, =0x00000040
+ ORRS R2, R2, R3
+ STR R2, [R0]
+
+skip
LDR R0, =SystemInit
BLX R0
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/iar_startup_nrf52833.s b/third_party/NordicSemiconductor/nrfx/mdk/iar_startup_nrf52833.s
new file mode 100644
index 0000000..417014f
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/mdk/iar_startup_nrf52833.s
@@ -0,0 +1,476 @@
+; Copyright (c) 2009-2018 ARM Limited. All rights reserved.
+;
+; SPDX-License-Identifier: Apache-2.0
+;
+; Licensed under the Apache License, Version 2.0 (the License); you may
+; not use this file except in compliance with the License.
+; You may obtain a copy of the License at
+;
+; www.apache.org/licenses/LICENSE-2.0
+;
+; Unless required by applicable law or agreed to in writing, software
+; distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; See the License for the specific language governing permissions and
+; limitations under the License.
+;
+; NOTICE: This file has been modified by Nordic Semiconductor ASA.
+
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+
+ MODULE ?cstartup
+
+#if defined(__STARTUP_CONFIG)
+
+ #include "startup_config.h"
+
+ #ifndef __STARTUP_CONFIG_STACK_ALIGNEMENT
+ #define __STARTUP_CONFIG_STACK_ALIGNEMENT 3
+ #endif
+
+ SECTION CSTACK:DATA:NOROOT(__STARTUP_CONFIG_STACK_ALIGNEMENT)
+ DS8 __STARTUP_CONFIG_STACK_SIZE
+
+ SECTION HEAP:DATA:NOROOT(3)
+ DS8 __STARTUP_CONFIG_HEAP_SIZE
+
+#else
+
+ ;; Stack size default : Defined in *.icf (linker file). Can be modified inside EW.
+ ;; Heap size default : Defined in *.icf (linker file). Can be modified inside EW.
+
+ ;; Forward declaration of sections.
+ SECTION CSTACK:DATA:NOROOT(3)
+
+#endif
+
+
+ SECTION .intvec:CODE:NOROOT(2)
+
+ EXTERN __iar_program_start
+ EXTERN SystemInit
+ PUBLIC __vector_table
+ PUBLIC __Vectors
+ PUBLIC __Vectors_End
+ PUBLIC __Vectors_Size
+
+ DATA
+
+__vector_table
+ DCD sfe(CSTACK)
+ DCD Reset_Handler
+ DCD NMI_Handler
+ DCD HardFault_Handler
+ DCD MemoryManagement_Handler
+ DCD BusFault_Handler
+ DCD UsageFault_Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler
+ DCD DebugMon_Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler
+ DCD SysTick_Handler
+
+ ; External Interrupts
+ DCD POWER_CLOCK_IRQHandler
+ DCD RADIO_IRQHandler
+ DCD UARTE0_UART0_IRQHandler
+ DCD SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+ DCD SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+ DCD NFCT_IRQHandler
+ DCD GPIOTE_IRQHandler
+ DCD SAADC_IRQHandler
+ DCD TIMER0_IRQHandler
+ DCD TIMER1_IRQHandler
+ DCD TIMER2_IRQHandler
+ DCD RTC0_IRQHandler
+ DCD TEMP_IRQHandler
+ DCD RNG_IRQHandler
+ DCD ECB_IRQHandler
+ DCD CCM_AAR_IRQHandler
+ DCD WDT_IRQHandler
+ DCD RTC1_IRQHandler
+ DCD QDEC_IRQHandler
+ DCD COMP_LPCOMP_IRQHandler
+ DCD SWI0_EGU0_IRQHandler
+ DCD SWI1_EGU1_IRQHandler
+ DCD SWI2_EGU2_IRQHandler
+ DCD SWI3_EGU3_IRQHandler
+ DCD SWI4_EGU4_IRQHandler
+ DCD SWI5_EGU5_IRQHandler
+ DCD TIMER3_IRQHandler
+ DCD TIMER4_IRQHandler
+ DCD PWM0_IRQHandler
+ DCD PDM_IRQHandler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD MWU_IRQHandler
+ DCD PWM1_IRQHandler
+ DCD PWM2_IRQHandler
+ DCD SPIM2_SPIS2_SPI2_IRQHandler
+ DCD RTC2_IRQHandler
+ DCD I2S_IRQHandler
+ DCD FPU_IRQHandler
+ DCD USBD_IRQHandler
+ DCD UARTE1_IRQHandler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD PWM3_IRQHandler
+ DCD 0 ; Reserved
+ DCD SPIM3_IRQHandler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+
+__Vectors_End
+__Vectors EQU __vector_table
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+
+; Default handlers.
+ THUMB
+
+ PUBWEAK Reset_Handler
+ SECTION .text:CODE:REORDER:NOROOT(2)
+Reset_Handler
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__iar_program_start
+ BX R0
+
+ ; Dummy exception handlers
+
+
+ PUBWEAK NMI_Handler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+NMI_Handler
+ B .
+
+ PUBWEAK HardFault_Handler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+HardFault_Handler
+ B .
+
+ PUBWEAK MemoryManagement_Handler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+MemoryManagement_Handler
+ B .
+
+ PUBWEAK BusFault_Handler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+BusFault_Handler
+ B .
+
+ PUBWEAK UsageFault_Handler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+UsageFault_Handler
+ B .
+
+ PUBWEAK SVC_Handler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+SVC_Handler
+ B .
+
+ PUBWEAK DebugMon_Handler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+DebugMon_Handler
+ B .
+
+ PUBWEAK PendSV_Handler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+PendSV_Handler
+ B .
+
+ PUBWEAK SysTick_Handler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+SysTick_Handler
+ B .
+
+
+ ; Dummy interrupt handlers
+
+ PUBWEAK POWER_CLOCK_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+POWER_CLOCK_IRQHandler
+ B .
+
+ PUBWEAK RADIO_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+RADIO_IRQHandler
+ B .
+
+ PUBWEAK UARTE0_UART0_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+UARTE0_UART0_IRQHandler
+ B .
+
+ PUBWEAK SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+ B .
+
+ PUBWEAK SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+ B .
+
+ PUBWEAK NFCT_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+NFCT_IRQHandler
+ B .
+
+ PUBWEAK GPIOTE_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+GPIOTE_IRQHandler
+ B .
+
+ PUBWEAK SAADC_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+SAADC_IRQHandler
+ B .
+
+ PUBWEAK TIMER0_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+TIMER0_IRQHandler
+ B .
+
+ PUBWEAK TIMER1_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+TIMER1_IRQHandler
+ B .
+
+ PUBWEAK TIMER2_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+TIMER2_IRQHandler
+ B .
+
+ PUBWEAK RTC0_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+RTC0_IRQHandler
+ B .
+
+ PUBWEAK TEMP_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+TEMP_IRQHandler
+ B .
+
+ PUBWEAK RNG_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+RNG_IRQHandler
+ B .
+
+ PUBWEAK ECB_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+ECB_IRQHandler
+ B .
+
+ PUBWEAK CCM_AAR_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+CCM_AAR_IRQHandler
+ B .
+
+ PUBWEAK WDT_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+WDT_IRQHandler
+ B .
+
+ PUBWEAK RTC1_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+RTC1_IRQHandler
+ B .
+
+ PUBWEAK QDEC_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+QDEC_IRQHandler
+ B .
+
+ PUBWEAK COMP_LPCOMP_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+COMP_LPCOMP_IRQHandler
+ B .
+
+ PUBWEAK SWI0_EGU0_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+SWI0_EGU0_IRQHandler
+ B .
+
+ PUBWEAK SWI1_EGU1_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+SWI1_EGU1_IRQHandler
+ B .
+
+ PUBWEAK SWI2_EGU2_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+SWI2_EGU2_IRQHandler
+ B .
+
+ PUBWEAK SWI3_EGU3_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+SWI3_EGU3_IRQHandler
+ B .
+
+ PUBWEAK SWI4_EGU4_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+SWI4_EGU4_IRQHandler
+ B .
+
+ PUBWEAK SWI5_EGU5_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+SWI5_EGU5_IRQHandler
+ B .
+
+ PUBWEAK TIMER3_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+TIMER3_IRQHandler
+ B .
+
+ PUBWEAK TIMER4_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+TIMER4_IRQHandler
+ B .
+
+ PUBWEAK PWM0_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+PWM0_IRQHandler
+ B .
+
+ PUBWEAK PDM_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+PDM_IRQHandler
+ B .
+
+ PUBWEAK MWU_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+MWU_IRQHandler
+ B .
+
+ PUBWEAK PWM1_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+PWM1_IRQHandler
+ B .
+
+ PUBWEAK PWM2_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+PWM2_IRQHandler
+ B .
+
+ PUBWEAK SPIM2_SPIS2_SPI2_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+SPIM2_SPIS2_SPI2_IRQHandler
+ B .
+
+ PUBWEAK RTC2_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+RTC2_IRQHandler
+ B .
+
+ PUBWEAK I2S_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+I2S_IRQHandler
+ B .
+
+ PUBWEAK FPU_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+FPU_IRQHandler
+ B .
+
+ PUBWEAK USBD_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+USBD_IRQHandler
+ B .
+
+ PUBWEAK UARTE1_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+UARTE1_IRQHandler
+ B .
+
+ PUBWEAK PWM3_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+PWM3_IRQHandler
+ B .
+
+ PUBWEAK SPIM3_IRQHandler
+ SECTION .text:CODE:REORDER:NOROOT(1)
+SPIM3_IRQHandler
+ B .
+
+ END
+
+
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf.h b/third_party/NordicSemiconductor/nrfx/mdk/nrf.h
index 8649d0b..becee3d 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/nrf.h
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf.h
@@ -34,9 +34,27 @@
#define NRF_H
/* MDK version */
-#define MDK_MAJOR_VERSION 8
-#define MDK_MINOR_VERSION 23
-#define MDK_MICRO_VERSION 1
+#define MDK_MAJOR_VERSION 8
+#define MDK_MINOR_VERSION 27
+#define MDK_MICRO_VERSION 0
+
+/* Define NRF51_SERIES for common use in nRF51 series devices. Only if not previously defined. */
+#if defined (NRF51422_XXAA) ||\
+ defined (NRF51422_XXAB) ||\
+ defined (NRF51422_XXAC) ||\
+ defined (NRF51801_XXAB) ||\
+ defined (NRF51802_XXAA) ||\
+ defined (NRF51822_XXAA) ||\
+ defined (NRF51822_XXAB) ||\
+ defined (NRF51822_XXAC) ||\
+ defined (NRF51824_XXAA)
+ #ifndef NRF51_SERIES
+ #define NRF51_SERIES
+ #endif
+ #ifndef NRF51
+ #define NRF51
+ #endif
+#endif
/* Redefine "old" too-generic name NRF52 to NRF52832_XXAA to keep backwards compatibility. */
#if defined (NRF52)
@@ -46,7 +64,7 @@
#endif
/* Define NRF52_SERIES for common use in nRF52 series devices. Only if not previously defined. */
-#if defined (NRF52810_XXAA) || defined (NRF52811_XXAA) || defined (NRF52832_XXAA) || defined (NRF52832_XXAB) || defined (NRF52840_XXAA)
+#if defined (NRF52805_XXAA) || defined (NRF52810_XXAA) || defined (NRF52811_XXAA) || defined (NRF52832_XXAA) || defined (NRF52832_XXAB) || defined (NRF52833_XXAA) || defined (NRF52840_XXAA)
#ifndef NRF52_SERIES
#define NRF52_SERIES
#endif
@@ -58,7 +76,8 @@
#define NRF91_SERIES
#endif
#endif
-
+
+
#if defined(_WIN32)
/* Do not include nrf specific files when building for PC host */
#elif defined(__unix)
@@ -72,36 +91,49 @@
#include "nrf51.h"
#include "nrf51_bitfields.h"
#include "nrf51_deprecated.h"
-
+
+ #elif defined (NRF52805_XXAA)
+ #include "nrf52805.h"
+ #include "nrf52805_bitfields.h"
+ #include "nrf51_to_nrf52810.h"
+ #include "nrf52_to_nrf52810.h"
+ #include "nrf52810_to_nrf52811.h"
#elif defined (NRF52810_XXAA)
#include "nrf52810.h"
#include "nrf52810_bitfields.h"
#include "nrf51_to_nrf52810.h"
#include "nrf52_to_nrf52810.h"
+ #include "nrf52810_name_change.h"
#elif defined (NRF52811_XXAA)
#include "nrf52811.h"
#include "nrf52811_bitfields.h"
#include "nrf51_to_nrf52810.h"
- #include "nrf52_to_nrf52810.h"
- #include "nrf52810_to_nrf52811.h"
+ #include "nrf52_to_nrf52810.h"
+ #include "nrf52810_to_nrf52811.h"
#elif defined (NRF52832_XXAA) || defined (NRF52832_XXAB)
#include "nrf52.h"
#include "nrf52_bitfields.h"
#include "nrf51_to_nrf52.h"
#include "nrf52_name_change.h"
+ #elif defined (NRF52833_XXAA)
+ #include "nrf52833.h"
+ #include "nrf52833_bitfields.h"
+ #include "nrf52_to_nrf52833.h"
+ #include "nrf51_to_nrf52.h"
#elif defined (NRF52840_XXAA)
#include "nrf52840.h"
#include "nrf52840_bitfields.h"
#include "nrf51_to_nrf52840.h"
#include "nrf52_to_nrf52840.h"
-
+
#elif defined (NRF9160_XXAA)
#include "nrf9160.h"
#include "nrf9160_bitfields.h"
+ #include "nrf9160_name_change.h"
#else
#error "Device must be defined. See nrf.h."
- #endif /* NRF51, NRF52810_XXAA, NRF52811_XXAA, NRF52832_XXAA, NRF52832_XXAB, NRF52840_XXAA, NRF9160_XXAA */
+ #endif /* NRF51, NRF52805_XXAA, NRF52810_XXAA, NRF52811_XXAA, NRF52832_XXAA, NRF52832_XXAB, NRF52833_XXAA, NRF52840_XXAA, NRF9160_XXAA */
#include "compiler_abstraction.h"
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf51.h b/third_party/NordicSemiconductor/nrfx/mdk/nrf51.h
index 9034239..d8c101e 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/nrf51.h
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf51.h
@@ -30,10 +30,10 @@
* @file nrf51.h
* @brief CMSIS HeaderFile
* @version 522
- * @date 17. January 2019
- * @note Generated by SVDConv V3.3.18 on Thursday, 17.01.2019 17:25:39
+ * @date 23. August 2019
+ * @note Generated by SVDConv V3.3.25 on Friday, 23.08.2019 12:15:12
* from File 'nrf51.svd',
- * last modified on Thursday, 17.01.2019 16:25:34
+ * last modified on Friday, 23.08.2019 10:15:08
*/
@@ -111,10 +111,11 @@
/* =========================== Configuration of the ARM Cortex-M0 Processor and Core Peripherals =========================== */
#define __CM0_REV 0x0301U /*!< CM0 Core Revision */
#define __DSP_PRESENT 0 /*!< DSP present or not */
-#define __MPU_PRESENT 0 /*!< MPU present or not */
#define __VTOR_PRESENT 0 /*!< Set to 1 if CPU supports Vector Table Offset Register */
#define __NVIC_PRIO_BITS 2 /*!< Number of Bits used for Priority Levels */
#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
+#define __MPU_PRESENT 0 /*!< MPU present */
+#define __FPU_PRESENT 0 /*!< FPU present */
/** @} */ /* End of group Configuration_of_CMSIS */
@@ -1278,7 +1279,7 @@
#pragma pop
#elif defined (__ICCARM__)
/* leave anonymous unions enabled */
-#elif (__ARMCC_VERSION >= 6010050)
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#pragma clang diagnostic pop
#elif defined (__GNUC__)
/* anonymous unions are enabled by default */
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf51801_xxab.ld b/third_party/NordicSemiconductor/nrfx/mdk/nrf51801_xxab.ld
deleted file mode 100644
index 5406e58..0000000
--- a/third_party/NordicSemiconductor/nrfx/mdk/nrf51801_xxab.ld
+++ /dev/null
@@ -1,13 +0,0 @@
-/* Linker script to configure memory regions. */
-
-SEARCH_DIR(.)
-GROUP(-lgcc -lc -lnosys)
-
-MEMORY
-{
- FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x30000
- RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x4000
-}
-
-
-INCLUDE "nrf_common.ld"
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf52.h b/third_party/NordicSemiconductor/nrfx/mdk/nrf52.h
index 5e67f0b..7496083 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/nrf52.h
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf52.h
@@ -30,10 +30,10 @@
* @file nrf52.h
* @brief CMSIS HeaderFile
* @version 1
- * @date 17. January 2019
- * @note Generated by SVDConv V3.3.18 on Thursday, 17.01.2019 17:25:39
+ * @date 23. August 2019
+ * @note Generated by SVDConv V3.3.25 on Friday, 23.08.2019 12:15:13
* from File 'nrf52.svd',
- * last modified on Thursday, 17.01.2019 16:25:35
+ * last modified on Friday, 23.08.2019 10:15:08
*/
@@ -132,8 +132,8 @@
#define __VTOR_PRESENT 1 /*!< Set to 1 if CPU supports Vector Table Offset Register */
#define __NVIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels */
#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
-#define __MPU_PRESENT 1 /*!< MPU present or not */
-#define __FPU_PRESENT 1 /*!< FPU present or not */
+#define __MPU_PRESENT 1 /*!< MPU present */
+#define __FPU_PRESENT 1 /*!< FPU present */
/** @} */ /* End of group Configuration_of_CMSIS */
@@ -2418,7 +2418,7 @@
#pragma pop
#elif defined (__ICCARM__)
/* leave anonymous unions enabled */
-#elif (__ARMCC_VERSION >= 6010050)
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#pragma clang diagnostic pop
#elif defined (__GNUC__)
/* anonymous unions are enabled by default */
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf52805.h b/third_party/NordicSemiconductor/nrfx/mdk/nrf52805.h
new file mode 100644
index 0000000..e1f2b54
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf52805.h
@@ -0,0 +1,1766 @@
+/*
+ * Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @file nrf52805.h
+ * @brief CMSIS HeaderFile
+ * @version 1
+ * @date 23. August 2019
+ * @note Generated by SVDConv V3.3.25 on Friday, 23.08.2019 12:15:13
+ * from File 'nrf52805.svd',
+ * last modified on Friday, 23.08.2019 10:15:08
+ */
+
+
+
+/** @addtogroup Nordic Semiconductor
+ * @{
+ */
+
+
+/** @addtogroup nrf52805
+ * @{
+ */
+
+
+#ifndef NRF52805_H
+#define NRF52805_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/** @addtogroup Configuration_of_CMSIS
+ * @{
+ */
+
+
+
+/* =========================================================================================================================== */
+/* ================ Interrupt Number Definition ================ */
+/* =========================================================================================================================== */
+
+typedef enum {
+/* ======================================= ARM Cortex-M4 Specific Interrupt Numbers ======================================== */
+ Reset_IRQn = -15, /*!< -15 Reset Vector, invoked on Power up and warm reset */
+ NonMaskableInt_IRQn = -14, /*!< -14 Non maskable Interrupt, cannot be stopped or preempted */
+ HardFault_IRQn = -13, /*!< -13 Hard Fault, all classes of Fault */
+ MemoryManagement_IRQn = -12, /*!< -12 Memory Management, MPU mismatch, including Access Violation
+ and No Match */
+ BusFault_IRQn = -11, /*!< -11 Bus Fault, Pre-Fetch-, Memory Access Fault, other address/memory
+ related Fault */
+ UsageFault_IRQn = -10, /*!< -10 Usage Fault, i.e. Undef Instruction, Illegal State Transition */
+ SVCall_IRQn = -5, /*!< -5 System Service Call via SVC instruction */
+ DebugMonitor_IRQn = -4, /*!< -4 Debug Monitor */
+ PendSV_IRQn = -2, /*!< -2 Pendable request for system service */
+ SysTick_IRQn = -1, /*!< -1 System Tick Timer */
+/* ========================================== nrf52805 Specific Interrupt Numbers ========================================== */
+ POWER_CLOCK_IRQn = 0, /*!< 0 POWER_CLOCK */
+ RADIO_IRQn = 1, /*!< 1 RADIO */
+ UARTE0_UART0_IRQn = 2, /*!< 2 UARTE0_UART0 */
+ TWIM0_TWIS0_TWI0_IRQn = 3, /*!< 3 TWIM0_TWIS0_TWI0 */
+ SPIM0_SPIS0_SPI0_IRQn = 4, /*!< 4 SPIM0_SPIS0_SPI0 */
+ GPIOTE_IRQn = 6, /*!< 6 GPIOTE */
+ SAADC_IRQn = 7, /*!< 7 SAADC */
+ TIMER0_IRQn = 8, /*!< 8 TIMER0 */
+ TIMER1_IRQn = 9, /*!< 9 TIMER1 */
+ TIMER2_IRQn = 10, /*!< 10 TIMER2 */
+ RTC0_IRQn = 11, /*!< 11 RTC0 */
+ TEMP_IRQn = 12, /*!< 12 TEMP */
+ RNG_IRQn = 13, /*!< 13 RNG */
+ ECB_IRQn = 14, /*!< 14 ECB */
+ CCM_AAR_IRQn = 15, /*!< 15 CCM_AAR */
+ WDT_IRQn = 16, /*!< 16 WDT */
+ RTC1_IRQn = 17, /*!< 17 RTC1 */
+ SWI0_EGU0_IRQn = 20, /*!< 20 SWI0_EGU0 */
+ SWI1_EGU1_IRQn = 21, /*!< 21 SWI1_EGU1 */
+ SWI2_IRQn = 22, /*!< 22 SWI2 */
+ SWI3_IRQn = 23, /*!< 23 SWI3 */
+ SWI4_IRQn = 24, /*!< 24 SWI4 */
+ SWI5_IRQn = 25 /*!< 25 SWI5 */
+} IRQn_Type;
+
+
+
+/* =========================================================================================================================== */
+/* ================ Processor and Core Peripheral Section ================ */
+/* =========================================================================================================================== */
+
+/* =========================== Configuration of the ARM Cortex-M4 Processor and Core Peripherals =========================== */
+#define __CM4_REV 0x0001U /*!< CM4 Core Revision */
+#define __DSP_PRESENT 0 /*!< DSP present or not */
+#define __VTOR_PRESENT 1 /*!< Set to 1 if CPU supports Vector Table Offset Register */
+#define __NVIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels */
+#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
+#define __MPU_PRESENT 1 /*!< MPU present */
+#define __FPU_PRESENT 0 /*!< FPU present */
+
+
+/** @} */ /* End of group Configuration_of_CMSIS */
+
+#include "core_cm4.h" /*!< ARM Cortex-M4 processor and core peripherals */
+#include "system_nrf52805.h" /*!< nrf52805 System */
+
+#ifndef __IM /*!< Fallback for older CMSIS versions */
+ #define __IM __I
+#endif
+#ifndef __OM /*!< Fallback for older CMSIS versions */
+ #define __OM __O
+#endif
+#ifndef __IOM /*!< Fallback for older CMSIS versions */
+ #define __IOM __IO
+#endif
+
+
+/* ======================================== Start of section using anonymous unions ======================================== */
+#if defined (__CC_ARM)
+ #pragma push
+ #pragma anon_unions
+#elif defined (__ICCARM__)
+ #pragma language=extended
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #pragma clang diagnostic push
+ #pragma clang diagnostic ignored "-Wc11-extensions"
+ #pragma clang diagnostic ignored "-Wreserved-id-macro"
+ #pragma clang diagnostic ignored "-Wgnu-anonymous-struct"
+ #pragma clang diagnostic ignored "-Wnested-anon-types"
+#elif defined (__GNUC__)
+ /* anonymous unions are enabled by default */
+#elif defined (__TMS470__)
+ /* anonymous unions are enabled by default */
+#elif defined (__TASKING__)
+ #pragma warning 586
+#elif defined (__CSMC__)
+ /* anonymous unions are enabled by default */
+#else
+ #warning Not supported compiler type
+#endif
+
+
+/* =========================================================================================================================== */
+/* ================ Device Specific Cluster Section ================ */
+/* =========================================================================================================================== */
+
+
+/** @addtogroup Device_Peripheral_clusters
+ * @{
+ */
+
+
+/**
+ * @brief FICR_INFO [INFO] (Device info)
+ */
+typedef struct {
+ __IM uint32_t PART; /*!< (@ 0x00000000) Part code */
+ __IM uint32_t VARIANT; /*!< (@ 0x00000004) Part variant, hardware version and production
+ configuration */
+ __IM uint32_t PACKAGE; /*!< (@ 0x00000008) Package option */
+ __IM uint32_t RAM; /*!< (@ 0x0000000C) RAM variant */
+ __IM uint32_t FLASH; /*!< (@ 0x00000010) Flash variant */
+} FICR_INFO_Type; /*!< Size = 20 (0x14) */
+
+
+/**
+ * @brief FICR_TEMP [TEMP] (Registers storing factory TEMP module linearization coefficients)
+ */
+typedef struct {
+ __IM uint32_t A0; /*!< (@ 0x00000000) Slope definition A0 */
+ __IM uint32_t A1; /*!< (@ 0x00000004) Slope definition A1 */
+ __IM uint32_t A2; /*!< (@ 0x00000008) Slope definition A2 */
+ __IM uint32_t A3; /*!< (@ 0x0000000C) Slope definition A3 */
+ __IM uint32_t A4; /*!< (@ 0x00000010) Slope definition A4 */
+ __IM uint32_t A5; /*!< (@ 0x00000014) Slope definition A5 */
+ __IM uint32_t B0; /*!< (@ 0x00000018) Y-intercept B0 */
+ __IM uint32_t B1; /*!< (@ 0x0000001C) Y-intercept B1 */
+ __IM uint32_t B2; /*!< (@ 0x00000020) Y-intercept B2 */
+ __IM uint32_t B3; /*!< (@ 0x00000024) Y-intercept B3 */
+ __IM uint32_t B4; /*!< (@ 0x00000028) Y-intercept B4 */
+ __IM uint32_t B5; /*!< (@ 0x0000002C) Y-intercept B5 */
+ __IM uint32_t T0; /*!< (@ 0x00000030) Segment end T0 */
+ __IM uint32_t T1; /*!< (@ 0x00000034) Segment end T1 */
+ __IM uint32_t T2; /*!< (@ 0x00000038) Segment end T2 */
+ __IM uint32_t T3; /*!< (@ 0x0000003C) Segment end T3 */
+ __IM uint32_t T4; /*!< (@ 0x00000040) Segment end T4 */
+} FICR_TEMP_Type; /*!< Size = 68 (0x44) */
+
+
+/**
+ * @brief POWER_RAM [RAM] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t POWER; /*!< (@ 0x00000000) Description cluster: RAMn power control register.
+ The RAM size will vary depending on product
+ variant, and the RAMn register will only
+ be present if the corresponding RAM AHB
+ slave is present on the device. */
+ __OM uint32_t POWERSET; /*!< (@ 0x00000004) Description cluster: RAMn power control set register */
+ __OM uint32_t POWERCLR; /*!< (@ 0x00000008) Description cluster: RAMn power control clear
+ register */
+ __IM uint32_t RESERVED;
+} POWER_RAM_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief UART_PSEL [PSEL] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t RTS; /*!< (@ 0x00000000) Pin select for RTS */
+ __IOM uint32_t TXD; /*!< (@ 0x00000004) Pin select for TXD */
+ __IOM uint32_t CTS; /*!< (@ 0x00000008) Pin select for CTS */
+ __IOM uint32_t RXD; /*!< (@ 0x0000000C) Pin select for RXD */
+} UART_PSEL_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief UARTE_PSEL [PSEL] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t RTS; /*!< (@ 0x00000000) Pin select for RTS signal */
+ __IOM uint32_t TXD; /*!< (@ 0x00000004) Pin select for TXD signal */
+ __IOM uint32_t CTS; /*!< (@ 0x00000008) Pin select for CTS signal */
+ __IOM uint32_t RXD; /*!< (@ 0x0000000C) Pin select for RXD signal */
+} UARTE_PSEL_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief UARTE_RXD [RXD] (RXD EasyDMA channel)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) Data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of bytes in receive buffer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of bytes transferred in the last transaction */
+} UARTE_RXD_Type; /*!< Size = 12 (0xc) */
+
+
+/**
+ * @brief UARTE_TXD [TXD] (TXD EasyDMA channel)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) Data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of bytes in transmit buffer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of bytes transferred in the last transaction */
+} UARTE_TXD_Type; /*!< Size = 12 (0xc) */
+
+
+/**
+ * @brief TWI_PSEL [PSEL] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t SCL; /*!< (@ 0x00000000) Pin select for SCL */
+ __IOM uint32_t SDA; /*!< (@ 0x00000004) Pin select for SDA */
+} TWI_PSEL_Type; /*!< Size = 8 (0x8) */
+
+
+/**
+ * @brief TWIM_PSEL [PSEL] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t SCL; /*!< (@ 0x00000000) Pin select for SCL signal */
+ __IOM uint32_t SDA; /*!< (@ 0x00000004) Pin select for SDA signal */
+} TWIM_PSEL_Type; /*!< Size = 8 (0x8) */
+
+
+/**
+ * @brief TWIM_RXD [RXD] (RXD EasyDMA channel)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) Data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of bytes in receive buffer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of bytes transferred in the last transaction */
+ __IOM uint32_t LIST; /*!< (@ 0x0000000C) EasyDMA list type */
+} TWIM_RXD_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief TWIM_TXD [TXD] (TXD EasyDMA channel)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) Data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of bytes in transmit buffer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of bytes transferred in the last transaction */
+ __IOM uint32_t LIST; /*!< (@ 0x0000000C) EasyDMA list type */
+} TWIM_TXD_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief TWIS_PSEL [PSEL] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t SCL; /*!< (@ 0x00000000) Pin select for SCL signal */
+ __IOM uint32_t SDA; /*!< (@ 0x00000004) Pin select for SDA signal */
+} TWIS_PSEL_Type; /*!< Size = 8 (0x8) */
+
+
+/**
+ * @brief TWIS_RXD [RXD] (RXD EasyDMA channel)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) RXD Data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of bytes in RXD buffer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of bytes transferred in the last RXD transaction */
+ __IOM uint32_t LIST; /*!< (@ 0x0000000C) EasyDMA list type */
+} TWIS_RXD_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief TWIS_TXD [TXD] (TXD EasyDMA channel)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) TXD Data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of bytes in TXD buffer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of bytes transferred in the last TXD transaction */
+ __IOM uint32_t LIST; /*!< (@ 0x0000000C) EasyDMA list type */
+} TWIS_TXD_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief SPI_PSEL [PSEL] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t SCK; /*!< (@ 0x00000000) Pin select for SCK */
+ __IOM uint32_t MOSI; /*!< (@ 0x00000004) Pin select for MOSI signal */
+ __IOM uint32_t MISO; /*!< (@ 0x00000008) Pin select for MISO signal */
+} SPI_PSEL_Type; /*!< Size = 12 (0xc) */
+
+
+/**
+ * @brief SPIM_PSEL [PSEL] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t SCK; /*!< (@ 0x00000000) Pin select for SCK */
+ __IOM uint32_t MOSI; /*!< (@ 0x00000004) Pin select for MOSI signal */
+ __IOM uint32_t MISO; /*!< (@ 0x00000008) Pin select for MISO signal */
+} SPIM_PSEL_Type; /*!< Size = 12 (0xc) */
+
+
+/**
+ * @brief SPIM_RXD [RXD] (RXD EasyDMA channel)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) Data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of bytes in receive buffer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of bytes transferred in the last transaction */
+ __IOM uint32_t LIST; /*!< (@ 0x0000000C) EasyDMA list type */
+} SPIM_RXD_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief SPIM_TXD [TXD] (TXD EasyDMA channel)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) Data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of bytes in transmit buffer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of bytes transferred in the last transaction */
+ __IOM uint32_t LIST; /*!< (@ 0x0000000C) EasyDMA list type */
+} SPIM_TXD_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief SPIS_PSEL [PSEL] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t SCK; /*!< (@ 0x00000000) Pin select for SCK */
+ __IOM uint32_t MISO; /*!< (@ 0x00000004) Pin select for MISO signal */
+ __IOM uint32_t MOSI; /*!< (@ 0x00000008) Pin select for MOSI signal */
+ __IOM uint32_t CSN; /*!< (@ 0x0000000C) Pin select for CSN signal */
+} SPIS_PSEL_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief SPIS_RXD [RXD] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) RXD data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of bytes in receive buffer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of bytes received in last granted transaction */
+ __IOM uint32_t LIST; /*!< (@ 0x0000000C) EasyDMA list type */
+} SPIS_RXD_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief SPIS_TXD [TXD] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) TXD data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of bytes in transmit buffer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of bytes transmitted in last granted transaction */
+ __IOM uint32_t LIST; /*!< (@ 0x0000000C) EasyDMA list type */
+} SPIS_TXD_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief SAADC_EVENTS_CH [EVENTS_CH] (Peripheral events.)
+ */
+typedef struct {
+ __IOM uint32_t LIMITH; /*!< (@ 0x00000000) Description cluster: Last results is equal or
+ above CH[n].LIMIT.HIGH */
+ __IOM uint32_t LIMITL; /*!< (@ 0x00000004) Description cluster: Last results is equal or
+ below CH[n].LIMIT.LOW */
+} SAADC_EVENTS_CH_Type; /*!< Size = 8 (0x8) */
+
+
+/**
+ * @brief SAADC_CH [CH] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t PSELP; /*!< (@ 0x00000000) Description cluster: Input positive pin selection
+ for CH[n] */
+ __IOM uint32_t PSELN; /*!< (@ 0x00000004) Description cluster: Input negative pin selection
+ for CH[n] */
+ __IOM uint32_t CONFIG; /*!< (@ 0x00000008) Description cluster: Input configuration for
+ CH[n] */
+ __IOM uint32_t LIMIT; /*!< (@ 0x0000000C) Description cluster: High/low limits for event
+ monitoring a channel */
+} SAADC_CH_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief SAADC_RESULT [RESULT] (RESULT EasyDMA channel)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) Data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of buffer words to transfer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of buffer words transferred since last
+ START */
+} SAADC_RESULT_Type; /*!< Size = 12 (0xc) */
+
+
+/**
+ * @brief PPI_TASKS_CHG [TASKS_CHG] (Channel group tasks)
+ */
+typedef struct {
+ __OM uint32_t EN; /*!< (@ 0x00000000) Description cluster: Enable channel group n */
+ __OM uint32_t DIS; /*!< (@ 0x00000004) Description cluster: Disable channel group n */
+} PPI_TASKS_CHG_Type; /*!< Size = 8 (0x8) */
+
+
+/**
+ * @brief PPI_CH [CH] (PPI Channel)
+ */
+typedef struct {
+ __IOM uint32_t EEP; /*!< (@ 0x00000000) Description cluster: Channel n event end-point */
+ __IOM uint32_t TEP; /*!< (@ 0x00000004) Description cluster: Channel n task end-point */
+} PPI_CH_Type; /*!< Size = 8 (0x8) */
+
+
+/**
+ * @brief PPI_FORK [FORK] (Fork)
+ */
+typedef struct {
+ __IOM uint32_t TEP; /*!< (@ 0x00000000) Description cluster: Channel n task end-point */
+} PPI_FORK_Type; /*!< Size = 4 (0x4) */
+
+
+/** @} */ /* End of group Device_Peripheral_clusters */
+
+
+/* =========================================================================================================================== */
+/* ================ Device Specific Peripheral Section ================ */
+/* =========================================================================================================================== */
+
+
+/** @addtogroup Device_Peripheral_peripherals
+ * @{
+ */
+
+
+
+/* =========================================================================================================================== */
+/* ================ FICR ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Factory information configuration registers (FICR)
+ */
+
+typedef struct { /*!< (@ 0x10000000) FICR Structure */
+ __IM uint32_t RESERVED[4];
+ __IM uint32_t CODEPAGESIZE; /*!< (@ 0x00000010) Code memory page size */
+ __IM uint32_t CODESIZE; /*!< (@ 0x00000014) Code memory size */
+ __IM uint32_t RESERVED1[18];
+ __IM uint32_t DEVICEID[2]; /*!< (@ 0x00000060) Description collection: Device identifier */
+ __IM uint32_t RESERVED2[6];
+ __IM uint32_t ER[4]; /*!< (@ 0x00000080) Description collection: Encryption root, word
+ n */
+ __IM uint32_t IR[4]; /*!< (@ 0x00000090) Description collection: Identity root, word n */
+ __IM uint32_t DEVICEADDRTYPE; /*!< (@ 0x000000A0) Device address type */
+ __IM uint32_t DEVICEADDR[2]; /*!< (@ 0x000000A4) Description collection: Device address n */
+ __IM uint32_t RESERVED3[21];
+ __IM FICR_INFO_Type INFO; /*!< (@ 0x00000100) Device info */
+ __IM uint32_t RESERVED4[188];
+ __IM FICR_TEMP_Type TEMP; /*!< (@ 0x00000404) Registers storing factory TEMP module linearization
+ coefficients */
+} NRF_FICR_Type; /*!< Size = 1096 (0x448) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ UICR ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief User information configuration registers (UICR)
+ */
+
+typedef struct { /*!< (@ 0x10001000) UICR Structure */
+ __IM uint32_t RESERVED[5];
+ __IOM uint32_t NRFFW[13]; /*!< (@ 0x00000014) Description collection: Reserved for Nordic firmware
+ design */
+ __IM uint32_t RESERVED1[2];
+ __IOM uint32_t NRFHW[12]; /*!< (@ 0x00000050) Description collection: Reserved for Nordic hardware
+ design */
+ __IOM uint32_t CUSTOMER[32]; /*!< (@ 0x00000080) Description collection: Reserved for customer */
+ __IM uint32_t RESERVED2[64];
+ __IOM uint32_t PSELRESET[2]; /*!< (@ 0x00000200) Description collection: Mapping of the nRESET
+ function (see POWER chapter for details) */
+ __IOM uint32_t APPROTECT; /*!< (@ 0x00000208) Access port protection */
+} NRF_UICR_Type; /*!< Size = 524 (0x20c) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ BPROT ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Block Protect (BPROT)
+ */
+
+typedef struct { /*!< (@ 0x40000000) BPROT Structure */
+ __IM uint32_t RESERVED[384];
+ __IOM uint32_t CONFIG0; /*!< (@ 0x00000600) Block protect configuration register 0 */
+ __IOM uint32_t CONFIG1; /*!< (@ 0x00000604) Block protect configuration register 1 */
+ __IOM uint32_t DISABLEINDEBUG; /*!< (@ 0x00000608) Disable protection mechanism in debug mode */
+} NRF_BPROT_Type; /*!< Size = 1548 (0x60c) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ CLOCK ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Clock control (CLOCK)
+ */
+
+typedef struct { /*!< (@ 0x40000000) CLOCK Structure */
+ __OM uint32_t TASKS_HFCLKSTART; /*!< (@ 0x00000000) Start HFCLK crystal oscillator */
+ __OM uint32_t TASKS_HFCLKSTOP; /*!< (@ 0x00000004) Stop HFCLK crystal oscillator */
+ __OM uint32_t TASKS_LFCLKSTART; /*!< (@ 0x00000008) Start LFCLK source */
+ __OM uint32_t TASKS_LFCLKSTOP; /*!< (@ 0x0000000C) Stop LFCLK source */
+ __OM uint32_t TASKS_CAL; /*!< (@ 0x00000010) Start calibration of LFRC oscillator */
+ __OM uint32_t TASKS_CTSTART; /*!< (@ 0x00000014) Start calibration timer */
+ __OM uint32_t TASKS_CTSTOP; /*!< (@ 0x00000018) Stop calibration timer */
+ __IM uint32_t RESERVED[57];
+ __IOM uint32_t EVENTS_HFCLKSTARTED; /*!< (@ 0x00000100) HFCLK oscillator started */
+ __IOM uint32_t EVENTS_LFCLKSTARTED; /*!< (@ 0x00000104) LFCLK started */
+ __IM uint32_t RESERVED1;
+ __IOM uint32_t EVENTS_DONE; /*!< (@ 0x0000010C) Calibration of LFCLK RC oscillator complete event */
+ __IOM uint32_t EVENTS_CTTO; /*!< (@ 0x00000110) Calibration timer timeout */
+ __IM uint32_t RESERVED2[124];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED3[63];
+ __IM uint32_t HFCLKRUN; /*!< (@ 0x00000408) Status indicating that HFCLKSTART task has been
+ triggered */
+ __IM uint32_t HFCLKSTAT; /*!< (@ 0x0000040C) HFCLK status */
+ __IM uint32_t RESERVED4;
+ __IM uint32_t LFCLKRUN; /*!< (@ 0x00000414) Status indicating that LFCLKSTART task has been
+ triggered */
+ __IM uint32_t LFCLKSTAT; /*!< (@ 0x00000418) LFCLK status */
+ __IM uint32_t LFCLKSRCCOPY; /*!< (@ 0x0000041C) Copy of LFCLKSRC register, set when LFCLKSTART
+ task was triggered */
+ __IM uint32_t RESERVED5[62];
+ __IOM uint32_t LFCLKSRC; /*!< (@ 0x00000518) Clock source for the LFCLK */
+ __IM uint32_t RESERVED6[7];
+ __IOM uint32_t CTIV; /*!< (@ 0x00000538) Calibration timer interval */
+} NRF_CLOCK_Type; /*!< Size = 1340 (0x53c) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ POWER ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Power control (POWER)
+ */
+
+typedef struct { /*!< (@ 0x40000000) POWER Structure */
+ __IM uint32_t RESERVED[30];
+ __OM uint32_t TASKS_CONSTLAT; /*!< (@ 0x00000078) Enable Constant Latency mode */
+ __OM uint32_t TASKS_LOWPWR; /*!< (@ 0x0000007C) Enable Low-power mode (variable latency) */
+ __IM uint32_t RESERVED1[34];
+ __IOM uint32_t EVENTS_POFWARN; /*!< (@ 0x00000108) Power failure warning */
+ __IM uint32_t RESERVED2[2];
+ __IOM uint32_t EVENTS_SLEEPENTER; /*!< (@ 0x00000114) CPU entered WFI/WFE sleep */
+ __IOM uint32_t EVENTS_SLEEPEXIT; /*!< (@ 0x00000118) CPU exited WFI/WFE sleep */
+ __IM uint32_t RESERVED3[122];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED4[61];
+ __IOM uint32_t RESETREAS; /*!< (@ 0x00000400) Reset reason */
+ __IM uint32_t RESERVED5[63];
+ __OM uint32_t SYSTEMOFF; /*!< (@ 0x00000500) System OFF register */
+ __IM uint32_t RESERVED6[3];
+ __IOM uint32_t POFCON; /*!< (@ 0x00000510) Power failure comparator configuration */
+ __IM uint32_t RESERVED7[2];
+ __IOM uint32_t GPREGRET; /*!< (@ 0x0000051C) General purpose retention register */
+ __IOM uint32_t GPREGRET2; /*!< (@ 0x00000520) General purpose retention register */
+ __IM uint32_t RESERVED8[21];
+ __IOM uint32_t DCDCEN; /*!< (@ 0x00000578) DC/DC enable register */
+ __IM uint32_t RESERVED9[225];
+ __IOM POWER_RAM_Type RAM[8]; /*!< (@ 0x00000900) Unspecified */
+} NRF_POWER_Type; /*!< Size = 2432 (0x980) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ P0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief GPIO Port (P0)
+ */
+
+typedef struct { /*!< (@ 0x50000000) P0 Structure */
+ __IM uint32_t RESERVED[321];
+ __IOM uint32_t OUT; /*!< (@ 0x00000504) Write GPIO port */
+ __IOM uint32_t OUTSET; /*!< (@ 0x00000508) Set individual bits in GPIO port */
+ __IOM uint32_t OUTCLR; /*!< (@ 0x0000050C) Clear individual bits in GPIO port */
+ __IM uint32_t IN; /*!< (@ 0x00000510) Read GPIO port */
+ __IOM uint32_t DIR; /*!< (@ 0x00000514) Direction of GPIO pins */
+ __IOM uint32_t DIRSET; /*!< (@ 0x00000518) DIR set register */
+ __IOM uint32_t DIRCLR; /*!< (@ 0x0000051C) DIR clear register */
+ __IOM uint32_t LATCH; /*!< (@ 0x00000520) Latch register indicating what GPIO pins that
+ have met the criteria set in the PIN_CNF[n].SENSE
+ registers */
+ __IOM uint32_t DETECTMODE; /*!< (@ 0x00000524) Select between default DETECT signal behaviour
+ and LDETECT mode */
+ __IM uint32_t RESERVED1[118];
+ __IOM uint32_t PIN_CNF[32]; /*!< (@ 0x00000700) Description collection: Configuration of GPIO
+ pins */
+} NRF_GPIO_Type; /*!< Size = 1920 (0x780) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ RADIO ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief 2.4 GHz radio (RADIO)
+ */
+
+typedef struct { /*!< (@ 0x40001000) RADIO Structure */
+ __OM uint32_t TASKS_TXEN; /*!< (@ 0x00000000) Enable RADIO in TX mode */
+ __OM uint32_t TASKS_RXEN; /*!< (@ 0x00000004) Enable RADIO in RX mode */
+ __OM uint32_t TASKS_START; /*!< (@ 0x00000008) Start RADIO */
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x0000000C) Stop RADIO */
+ __OM uint32_t TASKS_DISABLE; /*!< (@ 0x00000010) Disable RADIO */
+ __OM uint32_t TASKS_RSSISTART; /*!< (@ 0x00000014) Start the RSSI and take one single sample of
+ the receive signal strength */
+ __OM uint32_t TASKS_RSSISTOP; /*!< (@ 0x00000018) Stop the RSSI measurement */
+ __OM uint32_t TASKS_BCSTART; /*!< (@ 0x0000001C) Start the bit counter */
+ __OM uint32_t TASKS_BCSTOP; /*!< (@ 0x00000020) Stop the bit counter */
+ __IM uint32_t RESERVED[55];
+ __IOM uint32_t EVENTS_READY; /*!< (@ 0x00000100) RADIO has ramped up and is ready to be started */
+ __IOM uint32_t EVENTS_ADDRESS; /*!< (@ 0x00000104) Address sent or received */
+ __IOM uint32_t EVENTS_PAYLOAD; /*!< (@ 0x00000108) Packet payload sent or received */
+ __IOM uint32_t EVENTS_END; /*!< (@ 0x0000010C) Packet sent or received */
+ __IOM uint32_t EVENTS_DISABLED; /*!< (@ 0x00000110) RADIO has been disabled */
+ __IOM uint32_t EVENTS_DEVMATCH; /*!< (@ 0x00000114) A device address match occurred on the last received
+ packet */
+ __IOM uint32_t EVENTS_DEVMISS; /*!< (@ 0x00000118) No device address match occurred on the last
+ received packet */
+ __IOM uint32_t EVENTS_RSSIEND; /*!< (@ 0x0000011C) Sampling of receive signal strength complete */
+ __IM uint32_t RESERVED1[2];
+ __IOM uint32_t EVENTS_BCMATCH; /*!< (@ 0x00000128) Bit counter reached bit count value */
+ __IM uint32_t RESERVED2;
+ __IOM uint32_t EVENTS_CRCOK; /*!< (@ 0x00000130) Packet received with CRC ok */
+ __IOM uint32_t EVENTS_CRCERROR; /*!< (@ 0x00000134) Packet received with CRC error */
+ __IM uint32_t RESERVED3[7];
+ __IOM uint32_t EVENTS_TXREADY; /*!< (@ 0x00000154) RADIO has ramped up and is ready to be started
+ TX path */
+ __IOM uint32_t EVENTS_RXREADY; /*!< (@ 0x00000158) RADIO has ramped up and is ready to be started
+ RX path */
+ __IOM uint32_t EVENTS_MHRMATCH; /*!< (@ 0x0000015C) MAC header match found */
+ __IM uint32_t RESERVED4[3];
+ __IOM uint32_t EVENTS_PHYEND; /*!< (@ 0x0000016C) Generated when last bit is sent on air */
+ __IM uint32_t RESERVED5[36];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED6[64];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED7[61];
+ __IM uint32_t CRCSTATUS; /*!< (@ 0x00000400) CRC status */
+ __IM uint32_t RESERVED8;
+ __IM uint32_t RXMATCH; /*!< (@ 0x00000408) Received address */
+ __IM uint32_t RXCRC; /*!< (@ 0x0000040C) CRC field of previously received packet */
+ __IM uint32_t DAI; /*!< (@ 0x00000410) Device address match index */
+ __IM uint32_t PDUSTAT; /*!< (@ 0x00000414) Payload status */
+ __IM uint32_t RESERVED9[59];
+ __IOM uint32_t PACKETPTR; /*!< (@ 0x00000504) Packet pointer */
+ __IOM uint32_t FREQUENCY; /*!< (@ 0x00000508) Frequency */
+ __IOM uint32_t TXPOWER; /*!< (@ 0x0000050C) Output power */
+ __IOM uint32_t MODE; /*!< (@ 0x00000510) Data rate and modulation */
+ __IOM uint32_t PCNF0; /*!< (@ 0x00000514) Packet configuration register 0 */
+ __IOM uint32_t PCNF1; /*!< (@ 0x00000518) Packet configuration register 1 */
+ __IOM uint32_t BASE0; /*!< (@ 0x0000051C) Base address 0 */
+ __IOM uint32_t BASE1; /*!< (@ 0x00000520) Base address 1 */
+ __IOM uint32_t PREFIX0; /*!< (@ 0x00000524) Prefixes bytes for logical addresses 0-3 */
+ __IOM uint32_t PREFIX1; /*!< (@ 0x00000528) Prefixes bytes for logical addresses 4-7 */
+ __IOM uint32_t TXADDRESS; /*!< (@ 0x0000052C) Transmit address select */
+ __IOM uint32_t RXADDRESSES; /*!< (@ 0x00000530) Receive address select */
+ __IOM uint32_t CRCCNF; /*!< (@ 0x00000534) CRC configuration */
+ __IOM uint32_t CRCPOLY; /*!< (@ 0x00000538) CRC polynomial */
+ __IOM uint32_t CRCINIT; /*!< (@ 0x0000053C) CRC initial value */
+ __IM uint32_t RESERVED10;
+ __IOM uint32_t TIFS; /*!< (@ 0x00000544) Interframe spacing in us */
+ __IM uint32_t RSSISAMPLE; /*!< (@ 0x00000548) RSSI sample */
+ __IM uint32_t RESERVED11;
+ __IM uint32_t STATE; /*!< (@ 0x00000550) Current radio state */
+ __IOM uint32_t DATAWHITEIV; /*!< (@ 0x00000554) Data whitening initial value */
+ __IM uint32_t RESERVED12[2];
+ __IOM uint32_t BCC; /*!< (@ 0x00000560) Bit counter compare */
+ __IM uint32_t RESERVED13[39];
+ __IOM uint32_t DAB[8]; /*!< (@ 0x00000600) Description collection: Device address base segment
+ n */
+ __IOM uint32_t DAP[8]; /*!< (@ 0x00000620) Description collection: Device address prefix
+ n */
+ __IOM uint32_t DACNF; /*!< (@ 0x00000640) Device address match configuration */
+ __IM uint32_t RESERVED14[3];
+ __IOM uint32_t MODECNF0; /*!< (@ 0x00000650) Radio mode configuration register 0 */
+ __IM uint32_t RESERVED15[618];
+ __IOM uint32_t POWER; /*!< (@ 0x00000FFC) Peripheral power control */
+} NRF_RADIO_Type; /*!< Size = 4096 (0x1000) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ UART0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Universal Asynchronous Receiver/Transmitter (UART0)
+ */
+
+typedef struct { /*!< (@ 0x40002000) UART0 Structure */
+ __OM uint32_t TASKS_STARTRX; /*!< (@ 0x00000000) Start UART receiver */
+ __OM uint32_t TASKS_STOPRX; /*!< (@ 0x00000004) Stop UART receiver */
+ __OM uint32_t TASKS_STARTTX; /*!< (@ 0x00000008) Start UART transmitter */
+ __OM uint32_t TASKS_STOPTX; /*!< (@ 0x0000000C) Stop UART transmitter */
+ __IM uint32_t RESERVED[3];
+ __OM uint32_t TASKS_SUSPEND; /*!< (@ 0x0000001C) Suspend UART */
+ __IM uint32_t RESERVED1[56];
+ __IOM uint32_t EVENTS_CTS; /*!< (@ 0x00000100) CTS is activated (set low). Clear To Send. */
+ __IOM uint32_t EVENTS_NCTS; /*!< (@ 0x00000104) CTS is deactivated (set high). Not Clear To Send. */
+ __IOM uint32_t EVENTS_RXDRDY; /*!< (@ 0x00000108) Data received in RXD */
+ __IM uint32_t RESERVED2[4];
+ __IOM uint32_t EVENTS_TXDRDY; /*!< (@ 0x0000011C) Data sent from TXD */
+ __IM uint32_t RESERVED3;
+ __IOM uint32_t EVENTS_ERROR; /*!< (@ 0x00000124) Error detected */
+ __IM uint32_t RESERVED4[7];
+ __IOM uint32_t EVENTS_RXTO; /*!< (@ 0x00000144) Receiver timeout */
+ __IM uint32_t RESERVED5[46];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED6[64];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED7[93];
+ __IOM uint32_t ERRORSRC; /*!< (@ 0x00000480) Error source */
+ __IM uint32_t RESERVED8[31];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable UART */
+ __IM uint32_t RESERVED9;
+ __IOM UART_PSEL_Type PSEL; /*!< (@ 0x00000508) Unspecified */
+ __IM uint32_t RXD; /*!< (@ 0x00000518) RXD register */
+ __OM uint32_t TXD; /*!< (@ 0x0000051C) TXD register */
+ __IM uint32_t RESERVED10;
+ __IOM uint32_t BAUDRATE; /*!< (@ 0x00000524) Baud rate. Accuracy depends on the HFCLK source
+ selected. */
+ __IM uint32_t RESERVED11[17];
+ __IOM uint32_t CONFIG; /*!< (@ 0x0000056C) Configuration of parity and hardware flow control */
+} NRF_UART_Type; /*!< Size = 1392 (0x570) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ UARTE0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief UART with EasyDMA (UARTE0)
+ */
+
+typedef struct { /*!< (@ 0x40002000) UARTE0 Structure */
+ __OM uint32_t TASKS_STARTRX; /*!< (@ 0x00000000) Start UART receiver */
+ __OM uint32_t TASKS_STOPRX; /*!< (@ 0x00000004) Stop UART receiver */
+ __OM uint32_t TASKS_STARTTX; /*!< (@ 0x00000008) Start UART transmitter */
+ __OM uint32_t TASKS_STOPTX; /*!< (@ 0x0000000C) Stop UART transmitter */
+ __IM uint32_t RESERVED[7];
+ __OM uint32_t TASKS_FLUSHRX; /*!< (@ 0x0000002C) Flush RX FIFO into RX buffer */
+ __IM uint32_t RESERVED1[52];
+ __IOM uint32_t EVENTS_CTS; /*!< (@ 0x00000100) CTS is activated (set low). Clear To Send. */
+ __IOM uint32_t EVENTS_NCTS; /*!< (@ 0x00000104) CTS is deactivated (set high). Not Clear To Send. */
+ __IOM uint32_t EVENTS_RXDRDY; /*!< (@ 0x00000108) Data received in RXD (but potentially not yet
+ transferred to Data RAM) */
+ __IM uint32_t RESERVED2;
+ __IOM uint32_t EVENTS_ENDRX; /*!< (@ 0x00000110) Receive buffer is filled up */
+ __IM uint32_t RESERVED3[2];
+ __IOM uint32_t EVENTS_TXDRDY; /*!< (@ 0x0000011C) Data sent from TXD */
+ __IOM uint32_t EVENTS_ENDTX; /*!< (@ 0x00000120) Last TX byte transmitted */
+ __IOM uint32_t EVENTS_ERROR; /*!< (@ 0x00000124) Error detected */
+ __IM uint32_t RESERVED4[7];
+ __IOM uint32_t EVENTS_RXTO; /*!< (@ 0x00000144) Receiver timeout */
+ __IM uint32_t RESERVED5;
+ __IOM uint32_t EVENTS_RXSTARTED; /*!< (@ 0x0000014C) UART receiver has started */
+ __IOM uint32_t EVENTS_TXSTARTED; /*!< (@ 0x00000150) UART transmitter has started */
+ __IM uint32_t RESERVED6;
+ __IOM uint32_t EVENTS_TXSTOPPED; /*!< (@ 0x00000158) Transmitter stopped */
+ __IM uint32_t RESERVED7[41];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED8[63];
+ __IOM uint32_t INTEN; /*!< (@ 0x00000300) Enable or disable interrupt */
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED9[93];
+ __IOM uint32_t ERRORSRC; /*!< (@ 0x00000480) Error source Note : this register is read / write
+ one to clear. */
+ __IM uint32_t RESERVED10[31];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable UART */
+ __IM uint32_t RESERVED11;
+ __IOM UARTE_PSEL_Type PSEL; /*!< (@ 0x00000508) Unspecified */
+ __IM uint32_t RESERVED12[3];
+ __IOM uint32_t BAUDRATE; /*!< (@ 0x00000524) Baud rate. Accuracy depends on the HFCLK source
+ selected. */
+ __IM uint32_t RESERVED13[3];
+ __IOM UARTE_RXD_Type RXD; /*!< (@ 0x00000534) RXD EasyDMA channel */
+ __IM uint32_t RESERVED14;
+ __IOM UARTE_TXD_Type TXD; /*!< (@ 0x00000544) TXD EasyDMA channel */
+ __IM uint32_t RESERVED15[7];
+ __IOM uint32_t CONFIG; /*!< (@ 0x0000056C) Configuration of parity and hardware flow control */
+} NRF_UARTE_Type; /*!< Size = 1392 (0x570) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ TWI0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief I2C compatible Two-Wire Interface (TWI0)
+ */
+
+typedef struct { /*!< (@ 0x40003000) TWI0 Structure */
+ __OM uint32_t TASKS_STARTRX; /*!< (@ 0x00000000) Start TWI receive sequence */
+ __IM uint32_t RESERVED;
+ __OM uint32_t TASKS_STARTTX; /*!< (@ 0x00000008) Start TWI transmit sequence */
+ __IM uint32_t RESERVED1[2];
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000014) Stop TWI transaction */
+ __IM uint32_t RESERVED2;
+ __OM uint32_t TASKS_SUSPEND; /*!< (@ 0x0000001C) Suspend TWI transaction */
+ __OM uint32_t TASKS_RESUME; /*!< (@ 0x00000020) Resume TWI transaction */
+ __IM uint32_t RESERVED3[56];
+ __IOM uint32_t EVENTS_STOPPED; /*!< (@ 0x00000104) TWI stopped */
+ __IOM uint32_t EVENTS_RXDREADY; /*!< (@ 0x00000108) TWI RXD byte received */
+ __IM uint32_t RESERVED4[4];
+ __IOM uint32_t EVENTS_TXDSENT; /*!< (@ 0x0000011C) TWI TXD byte sent */
+ __IM uint32_t RESERVED5;
+ __IOM uint32_t EVENTS_ERROR; /*!< (@ 0x00000124) TWI error */
+ __IM uint32_t RESERVED6[4];
+ __IOM uint32_t EVENTS_BB; /*!< (@ 0x00000138) TWI byte boundary, generated before each byte
+ that is sent or received */
+ __IM uint32_t RESERVED7[3];
+ __IOM uint32_t EVENTS_SUSPENDED; /*!< (@ 0x00000148) TWI entered the suspended state */
+ __IM uint32_t RESERVED8[45];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED9[64];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED10[110];
+ __IOM uint32_t ERRORSRC; /*!< (@ 0x000004C4) Error source */
+ __IM uint32_t RESERVED11[14];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable TWI */
+ __IM uint32_t RESERVED12;
+ __IOM TWI_PSEL_Type PSEL; /*!< (@ 0x00000508) Unspecified */
+ __IM uint32_t RESERVED13[2];
+ __IM uint32_t RXD; /*!< (@ 0x00000518) RXD register */
+ __IOM uint32_t TXD; /*!< (@ 0x0000051C) TXD register */
+ __IM uint32_t RESERVED14;
+ __IOM uint32_t FREQUENCY; /*!< (@ 0x00000524) TWI frequency. Accuracy depends on the HFCLK
+ source selected. */
+ __IM uint32_t RESERVED15[24];
+ __IOM uint32_t ADDRESS; /*!< (@ 0x00000588) Address used in the TWI transfer */
+} NRF_TWI_Type; /*!< Size = 1420 (0x58c) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ TWIM0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief I2C compatible Two-Wire Master Interface with EasyDMA (TWIM0)
+ */
+
+typedef struct { /*!< (@ 0x40003000) TWIM0 Structure */
+ __OM uint32_t TASKS_STARTRX; /*!< (@ 0x00000000) Start TWI receive sequence */
+ __IM uint32_t RESERVED;
+ __OM uint32_t TASKS_STARTTX; /*!< (@ 0x00000008) Start TWI transmit sequence */
+ __IM uint32_t RESERVED1[2];
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000014) Stop TWI transaction. Must be issued while the
+ TWI master is not suspended. */
+ __IM uint32_t RESERVED2;
+ __OM uint32_t TASKS_SUSPEND; /*!< (@ 0x0000001C) Suspend TWI transaction */
+ __OM uint32_t TASKS_RESUME; /*!< (@ 0x00000020) Resume TWI transaction */
+ __IM uint32_t RESERVED3[56];
+ __IOM uint32_t EVENTS_STOPPED; /*!< (@ 0x00000104) TWI stopped */
+ __IM uint32_t RESERVED4[7];
+ __IOM uint32_t EVENTS_ERROR; /*!< (@ 0x00000124) TWI error */
+ __IM uint32_t RESERVED5[8];
+ __IOM uint32_t EVENTS_SUSPENDED; /*!< (@ 0x00000148) Last byte has been sent out after the SUSPEND
+ task has been issued, TWI traffic is now
+ suspended. */
+ __IOM uint32_t EVENTS_RXSTARTED; /*!< (@ 0x0000014C) Receive sequence started */
+ __IOM uint32_t EVENTS_TXSTARTED; /*!< (@ 0x00000150) Transmit sequence started */
+ __IM uint32_t RESERVED6[2];
+ __IOM uint32_t EVENTS_LASTRX; /*!< (@ 0x0000015C) Byte boundary, starting to receive the last byte */
+ __IOM uint32_t EVENTS_LASTTX; /*!< (@ 0x00000160) Byte boundary, starting to transmit the last
+ byte */
+ __IM uint32_t RESERVED7[39];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED8[63];
+ __IOM uint32_t INTEN; /*!< (@ 0x00000300) Enable or disable interrupt */
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED9[110];
+ __IOM uint32_t ERRORSRC; /*!< (@ 0x000004C4) Error source */
+ __IM uint32_t RESERVED10[14];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable TWIM */
+ __IM uint32_t RESERVED11;
+ __IOM TWIM_PSEL_Type PSEL; /*!< (@ 0x00000508) Unspecified */
+ __IM uint32_t RESERVED12[5];
+ __IOM uint32_t FREQUENCY; /*!< (@ 0x00000524) TWI frequency. Accuracy depends on the HFCLK
+ source selected. */
+ __IM uint32_t RESERVED13[3];
+ __IOM TWIM_RXD_Type RXD; /*!< (@ 0x00000534) RXD EasyDMA channel */
+ __IOM TWIM_TXD_Type TXD; /*!< (@ 0x00000544) TXD EasyDMA channel */
+ __IM uint32_t RESERVED14[13];
+ __IOM uint32_t ADDRESS; /*!< (@ 0x00000588) Address used in the TWI transfer */
+} NRF_TWIM_Type; /*!< Size = 1420 (0x58c) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ TWIS0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief I2C compatible Two-Wire Slave Interface with EasyDMA (TWIS0)
+ */
+
+typedef struct { /*!< (@ 0x40003000) TWIS0 Structure */
+ __IM uint32_t RESERVED[5];
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000014) Stop TWI transaction */
+ __IM uint32_t RESERVED1;
+ __OM uint32_t TASKS_SUSPEND; /*!< (@ 0x0000001C) Suspend TWI transaction */
+ __OM uint32_t TASKS_RESUME; /*!< (@ 0x00000020) Resume TWI transaction */
+ __IM uint32_t RESERVED2[3];
+ __OM uint32_t TASKS_PREPARERX; /*!< (@ 0x00000030) Prepare the TWI slave to respond to a write command */
+ __OM uint32_t TASKS_PREPARETX; /*!< (@ 0x00000034) Prepare the TWI slave to respond to a read command */
+ __IM uint32_t RESERVED3[51];
+ __IOM uint32_t EVENTS_STOPPED; /*!< (@ 0x00000104) TWI stopped */
+ __IM uint32_t RESERVED4[7];
+ __IOM uint32_t EVENTS_ERROR; /*!< (@ 0x00000124) TWI error */
+ __IM uint32_t RESERVED5[9];
+ __IOM uint32_t EVENTS_RXSTARTED; /*!< (@ 0x0000014C) Receive sequence started */
+ __IOM uint32_t EVENTS_TXSTARTED; /*!< (@ 0x00000150) Transmit sequence started */
+ __IM uint32_t RESERVED6[4];
+ __IOM uint32_t EVENTS_WRITE; /*!< (@ 0x00000164) Write command received */
+ __IOM uint32_t EVENTS_READ; /*!< (@ 0x00000168) Read command received */
+ __IM uint32_t RESERVED7[37];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED8[63];
+ __IOM uint32_t INTEN; /*!< (@ 0x00000300) Enable or disable interrupt */
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED9[113];
+ __IOM uint32_t ERRORSRC; /*!< (@ 0x000004D0) Error source */
+ __IM uint32_t MATCH; /*!< (@ 0x000004D4) Status register indicating which address had
+ a match */
+ __IM uint32_t RESERVED10[10];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable TWIS */
+ __IM uint32_t RESERVED11;
+ __IOM TWIS_PSEL_Type PSEL; /*!< (@ 0x00000508) Unspecified */
+ __IM uint32_t RESERVED12[9];
+ __IOM TWIS_RXD_Type RXD; /*!< (@ 0x00000534) RXD EasyDMA channel */
+ __IOM TWIS_TXD_Type TXD; /*!< (@ 0x00000544) TXD EasyDMA channel */
+ __IM uint32_t RESERVED13[13];
+ __IOM uint32_t ADDRESS[2]; /*!< (@ 0x00000588) Description collection: TWI slave address n */
+ __IM uint32_t RESERVED14;
+ __IOM uint32_t CONFIG; /*!< (@ 0x00000594) Configuration register for the address match
+ mechanism */
+ __IM uint32_t RESERVED15[10];
+ __IOM uint32_t ORC; /*!< (@ 0x000005C0) Over-read character. Character sent out in case
+ of an over-read of the transmit buffer. */
+} NRF_TWIS_Type; /*!< Size = 1476 (0x5c4) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ SPI0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Serial Peripheral Interface (SPI0)
+ */
+
+typedef struct { /*!< (@ 0x40004000) SPI0 Structure */
+ __IM uint32_t RESERVED[66];
+ __IOM uint32_t EVENTS_READY; /*!< (@ 0x00000108) TXD byte sent and RXD byte received */
+ __IM uint32_t RESERVED1[126];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED2[125];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable SPI */
+ __IM uint32_t RESERVED3;
+ __IOM SPI_PSEL_Type PSEL; /*!< (@ 0x00000508) Unspecified */
+ __IM uint32_t RESERVED4;
+ __IM uint32_t RXD; /*!< (@ 0x00000518) RXD register */
+ __IOM uint32_t TXD; /*!< (@ 0x0000051C) TXD register */
+ __IM uint32_t RESERVED5;
+ __IOM uint32_t FREQUENCY; /*!< (@ 0x00000524) SPI frequency. Accuracy depends on the HFCLK
+ source selected. */
+ __IM uint32_t RESERVED6[11];
+ __IOM uint32_t CONFIG; /*!< (@ 0x00000554) Configuration register */
+} NRF_SPI_Type; /*!< Size = 1368 (0x558) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ SPIM0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Serial Peripheral Interface Master with EasyDMA (SPIM0)
+ */
+
+typedef struct { /*!< (@ 0x40004000) SPIM0 Structure */
+ __IM uint32_t RESERVED[4];
+ __OM uint32_t TASKS_START; /*!< (@ 0x00000010) Start SPI transaction */
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000014) Stop SPI transaction */
+ __IM uint32_t RESERVED1;
+ __OM uint32_t TASKS_SUSPEND; /*!< (@ 0x0000001C) Suspend SPI transaction */
+ __OM uint32_t TASKS_RESUME; /*!< (@ 0x00000020) Resume SPI transaction */
+ __IM uint32_t RESERVED2[56];
+ __IOM uint32_t EVENTS_STOPPED; /*!< (@ 0x00000104) SPI transaction has stopped */
+ __IM uint32_t RESERVED3[2];
+ __IOM uint32_t EVENTS_ENDRX; /*!< (@ 0x00000110) End of RXD buffer reached */
+ __IM uint32_t RESERVED4;
+ __IOM uint32_t EVENTS_END; /*!< (@ 0x00000118) End of RXD buffer and TXD buffer reached */
+ __IM uint32_t RESERVED5;
+ __IOM uint32_t EVENTS_ENDTX; /*!< (@ 0x00000120) End of TXD buffer reached */
+ __IM uint32_t RESERVED6[10];
+ __IOM uint32_t EVENTS_STARTED; /*!< (@ 0x0000014C) Transaction started */
+ __IM uint32_t RESERVED7[44];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED8[64];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED9[125];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable SPIM */
+ __IM uint32_t RESERVED10;
+ __IOM SPIM_PSEL_Type PSEL; /*!< (@ 0x00000508) Unspecified */
+ __IM uint32_t RESERVED11[4];
+ __IOM uint32_t FREQUENCY; /*!< (@ 0x00000524) SPI frequency. Accuracy depends on the HFCLK
+ source selected. */
+ __IM uint32_t RESERVED12[3];
+ __IOM SPIM_RXD_Type RXD; /*!< (@ 0x00000534) RXD EasyDMA channel */
+ __IOM SPIM_TXD_Type TXD; /*!< (@ 0x00000544) TXD EasyDMA channel */
+ __IOM uint32_t CONFIG; /*!< (@ 0x00000554) Configuration register */
+ __IM uint32_t RESERVED13[26];
+ __IOM uint32_t ORC; /*!< (@ 0x000005C0) Over-read character. Character clocked out in
+ case and over-read of the TXD buffer. */
+} NRF_SPIM_Type; /*!< Size = 1476 (0x5c4) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ SPIS0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief SPI Slave (SPIS0)
+ */
+
+typedef struct { /*!< (@ 0x40004000) SPIS0 Structure */
+ __IM uint32_t RESERVED[9];
+ __OM uint32_t TASKS_ACQUIRE; /*!< (@ 0x00000024) Acquire SPI semaphore */
+ __OM uint32_t TASKS_RELEASE; /*!< (@ 0x00000028) Release SPI semaphore, enabling the SPI slave
+ to acquire it */
+ __IM uint32_t RESERVED1[54];
+ __IOM uint32_t EVENTS_END; /*!< (@ 0x00000104) Granted transaction completed */
+ __IM uint32_t RESERVED2[2];
+ __IOM uint32_t EVENTS_ENDRX; /*!< (@ 0x00000110) End of RXD buffer reached */
+ __IM uint32_t RESERVED3[5];
+ __IOM uint32_t EVENTS_ACQUIRED; /*!< (@ 0x00000128) Semaphore acquired */
+ __IM uint32_t RESERVED4[53];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED5[64];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED6[61];
+ __IM uint32_t SEMSTAT; /*!< (@ 0x00000400) Semaphore status register */
+ __IM uint32_t RESERVED7[15];
+ __IOM uint32_t STATUS; /*!< (@ 0x00000440) Status from last transaction */
+ __IM uint32_t RESERVED8[47];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable SPI slave */
+ __IM uint32_t RESERVED9;
+ __IOM SPIS_PSEL_Type PSEL; /*!< (@ 0x00000508) Unspecified */
+ __IM uint32_t RESERVED10[7];
+ __IOM SPIS_RXD_Type RXD; /*!< (@ 0x00000534) Unspecified */
+ __IOM SPIS_TXD_Type TXD; /*!< (@ 0x00000544) Unspecified */
+ __IOM uint32_t CONFIG; /*!< (@ 0x00000554) Configuration register */
+ __IM uint32_t RESERVED11;
+ __IOM uint32_t DEF; /*!< (@ 0x0000055C) Default character. Character clocked out in case
+ of an ignored transaction. */
+ __IM uint32_t RESERVED12[24];
+ __IOM uint32_t ORC; /*!< (@ 0x000005C0) Over-read character */
+} NRF_SPIS_Type; /*!< Size = 1476 (0x5c4) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ GPIOTE ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief GPIO Tasks and Events (GPIOTE)
+ */
+
+typedef struct { /*!< (@ 0x40006000) GPIOTE Structure */
+ __OM uint32_t TASKS_OUT[8]; /*!< (@ 0x00000000) Description collection: Task for writing to pin
+ specified in CONFIG[n].PSEL. Action on pin
+ is configured in CONFIG[n].POLARITY. */
+ __IM uint32_t RESERVED[4];
+ __OM uint32_t TASKS_SET[8]; /*!< (@ 0x00000030) Description collection: Task for writing to pin
+ specified in CONFIG[n].PSEL. Action on pin
+ is to set it high. */
+ __IM uint32_t RESERVED1[4];
+ __OM uint32_t TASKS_CLR[8]; /*!< (@ 0x00000060) Description collection: Task for writing to pin
+ specified in CONFIG[n].PSEL. Action on pin
+ is to set it low. */
+ __IM uint32_t RESERVED2[32];
+ __IOM uint32_t EVENTS_IN[8]; /*!< (@ 0x00000100) Description collection: Event generated from
+ pin specified in CONFIG[n].PSEL */
+ __IM uint32_t RESERVED3[23];
+ __IOM uint32_t EVENTS_PORT; /*!< (@ 0x0000017C) Event generated from multiple input GPIO pins
+ with SENSE mechanism enabled */
+ __IM uint32_t RESERVED4[97];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED5[129];
+ __IOM uint32_t CONFIG[8]; /*!< (@ 0x00000510) Description collection: Configuration for OUT[n],
+ SET[n] and CLR[n] tasks and IN[n] event */
+} NRF_GPIOTE_Type; /*!< Size = 1328 (0x530) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ SAADC ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Analog to Digital Converter (SAADC)
+ */
+
+typedef struct { /*!< (@ 0x40007000) SAADC Structure */
+ __OM uint32_t TASKS_START; /*!< (@ 0x00000000) Start the ADC and prepare the result buffer in
+ RAM */
+ __OM uint32_t TASKS_SAMPLE; /*!< (@ 0x00000004) Take one ADC sample, if scan is enabled all channels
+ are sampled */
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000008) Stop the ADC and terminate any on-going conversion */
+ __OM uint32_t TASKS_CALIBRATEOFFSET; /*!< (@ 0x0000000C) Starts offset auto-calibration */
+ __IM uint32_t RESERVED[60];
+ __IOM uint32_t EVENTS_STARTED; /*!< (@ 0x00000100) The ADC has started */
+ __IOM uint32_t EVENTS_END; /*!< (@ 0x00000104) The ADC has filled up the Result buffer */
+ __IOM uint32_t EVENTS_DONE; /*!< (@ 0x00000108) A conversion task has been completed. Depending
+ on the mode, multiple conversions might
+ be needed for a result to be transferred
+ to RAM. */
+ __IOM uint32_t EVENTS_RESULTDONE; /*!< (@ 0x0000010C) A result is ready to get transferred to RAM. */
+ __IOM uint32_t EVENTS_CALIBRATEDONE; /*!< (@ 0x00000110) Calibration is complete */
+ __IOM uint32_t EVENTS_STOPPED; /*!< (@ 0x00000114) The ADC has stopped */
+ __IOM SAADC_EVENTS_CH_Type EVENTS_CH[8]; /*!< (@ 0x00000118) Peripheral events. */
+ __IM uint32_t RESERVED1[106];
+ __IOM uint32_t INTEN; /*!< (@ 0x00000300) Enable or disable interrupt */
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED2[61];
+ __IM uint32_t STATUS; /*!< (@ 0x00000400) Status */
+ __IM uint32_t RESERVED3[63];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable or disable ADC */
+ __IM uint32_t RESERVED4[3];
+ __IOM SAADC_CH_Type CH[8]; /*!< (@ 0x00000510) Unspecified */
+ __IM uint32_t RESERVED5[24];
+ __IOM uint32_t RESOLUTION; /*!< (@ 0x000005F0) Resolution configuration */
+ __IOM uint32_t OVERSAMPLE; /*!< (@ 0x000005F4) Oversampling configuration. OVERSAMPLE should
+ not be combined with SCAN. The RESOLUTION
+ is applied before averaging, thus for high
+ OVERSAMPLE a higher RESOLUTION should be
+ used. */
+ __IOM uint32_t SAMPLERATE; /*!< (@ 0x000005F8) Controls normal or continuous sample rate */
+ __IM uint32_t RESERVED6[12];
+ __IOM SAADC_RESULT_Type RESULT; /*!< (@ 0x0000062C) RESULT EasyDMA channel */
+} NRF_SAADC_Type; /*!< Size = 1592 (0x638) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ TIMER0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Timer/Counter 0 (TIMER0)
+ */
+
+typedef struct { /*!< (@ 0x40008000) TIMER0 Structure */
+ __OM uint32_t TASKS_START; /*!< (@ 0x00000000) Start Timer */
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stop Timer */
+ __OM uint32_t TASKS_COUNT; /*!< (@ 0x00000008) Increment Timer (Counter mode only) */
+ __OM uint32_t TASKS_CLEAR; /*!< (@ 0x0000000C) Clear time */
+ __OM uint32_t TASKS_SHUTDOWN; /*!< (@ 0x00000010) Deprecated register - Shut down timer */
+ __IM uint32_t RESERVED[11];
+ __OM uint32_t TASKS_CAPTURE[6]; /*!< (@ 0x00000040) Description collection: Capture Timer value to
+ CC[n] register */
+ __IM uint32_t RESERVED1[58];
+ __IOM uint32_t EVENTS_COMPARE[6]; /*!< (@ 0x00000140) Description collection: Compare event on CC[n]
+ match */
+ __IM uint32_t RESERVED2[42];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED3[64];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED4[126];
+ __IOM uint32_t MODE; /*!< (@ 0x00000504) Timer mode selection */
+ __IOM uint32_t BITMODE; /*!< (@ 0x00000508) Configure the number of bits used by the TIMER */
+ __IM uint32_t RESERVED5;
+ __IOM uint32_t PRESCALER; /*!< (@ 0x00000510) Timer prescaler register */
+ __IM uint32_t RESERVED6[11];
+ __IOM uint32_t CC[6]; /*!< (@ 0x00000540) Description collection: Capture/Compare register
+ n */
+} NRF_TIMER_Type; /*!< Size = 1368 (0x558) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ RTC0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Real time counter 0 (RTC0)
+ */
+
+typedef struct { /*!< (@ 0x4000B000) RTC0 Structure */
+ __OM uint32_t TASKS_START; /*!< (@ 0x00000000) Start RTC COUNTER */
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stop RTC COUNTER */
+ __OM uint32_t TASKS_CLEAR; /*!< (@ 0x00000008) Clear RTC COUNTER */
+ __OM uint32_t TASKS_TRIGOVRFLW; /*!< (@ 0x0000000C) Set COUNTER to 0xFFFFF0 */
+ __IM uint32_t RESERVED[60];
+ __IOM uint32_t EVENTS_TICK; /*!< (@ 0x00000100) Event on COUNTER increment */
+ __IOM uint32_t EVENTS_OVRFLW; /*!< (@ 0x00000104) Event on COUNTER overflow */
+ __IM uint32_t RESERVED1[14];
+ __IOM uint32_t EVENTS_COMPARE[4]; /*!< (@ 0x00000140) Description collection: Compare event on CC[n]
+ match */
+ __IM uint32_t RESERVED2[109];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED3[13];
+ __IOM uint32_t EVTEN; /*!< (@ 0x00000340) Enable or disable event routing */
+ __IOM uint32_t EVTENSET; /*!< (@ 0x00000344) Enable event routing */
+ __IOM uint32_t EVTENCLR; /*!< (@ 0x00000348) Disable event routing */
+ __IM uint32_t RESERVED4[110];
+ __IM uint32_t COUNTER; /*!< (@ 0x00000504) Current COUNTER value */
+ __IOM uint32_t PRESCALER; /*!< (@ 0x00000508) 12 bit prescaler for COUNTER frequency (32768/(PRESCALER+1)).Mu
+ t be written when RTC is stopped */
+ __IM uint32_t RESERVED5[13];
+ __IOM uint32_t CC[4]; /*!< (@ 0x00000540) Description collection: Compare register n */
+} NRF_RTC_Type; /*!< Size = 1360 (0x550) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ TEMP ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Temperature Sensor (TEMP)
+ */
+
+typedef struct { /*!< (@ 0x4000C000) TEMP Structure */
+ __OM uint32_t TASKS_START; /*!< (@ 0x00000000) Start temperature measurement */
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stop temperature measurement */
+ __IM uint32_t RESERVED[62];
+ __IOM uint32_t EVENTS_DATARDY; /*!< (@ 0x00000100) Temperature measurement complete, data ready */
+ __IM uint32_t RESERVED1[128];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED2[127];
+ __IM int32_t TEMP; /*!< (@ 0x00000508) Temperature in degC (0.25deg steps) */
+ __IM uint32_t RESERVED3[5];
+ __IOM uint32_t A0; /*!< (@ 0x00000520) Slope of 1st piece wise linear function */
+ __IOM uint32_t A1; /*!< (@ 0x00000524) Slope of 2nd piece wise linear function */
+ __IOM uint32_t A2; /*!< (@ 0x00000528) Slope of 3rd piece wise linear function */
+ __IOM uint32_t A3; /*!< (@ 0x0000052C) Slope of 4th piece wise linear function */
+ __IOM uint32_t A4; /*!< (@ 0x00000530) Slope of 5th piece wise linear function */
+ __IOM uint32_t A5; /*!< (@ 0x00000534) Slope of 6th piece wise linear function */
+ __IM uint32_t RESERVED4[2];
+ __IOM uint32_t B0; /*!< (@ 0x00000540) y-intercept of 1st piece wise linear function */
+ __IOM uint32_t B1; /*!< (@ 0x00000544) y-intercept of 2nd piece wise linear function */
+ __IOM uint32_t B2; /*!< (@ 0x00000548) y-intercept of 3rd piece wise linear function */
+ __IOM uint32_t B3; /*!< (@ 0x0000054C) y-intercept of 4th piece wise linear function */
+ __IOM uint32_t B4; /*!< (@ 0x00000550) y-intercept of 5th piece wise linear function */
+ __IOM uint32_t B5; /*!< (@ 0x00000554) y-intercept of 6th piece wise linear function */
+ __IM uint32_t RESERVED5[2];
+ __IOM uint32_t T0; /*!< (@ 0x00000560) End point of 1st piece wise linear function */
+ __IOM uint32_t T1; /*!< (@ 0x00000564) End point of 2nd piece wise linear function */
+ __IOM uint32_t T2; /*!< (@ 0x00000568) End point of 3rd piece wise linear function */
+ __IOM uint32_t T3; /*!< (@ 0x0000056C) End point of 4th piece wise linear function */
+ __IOM uint32_t T4; /*!< (@ 0x00000570) End point of 5th piece wise linear function */
+} NRF_TEMP_Type; /*!< Size = 1396 (0x574) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ RNG ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Random Number Generator (RNG)
+ */
+
+typedef struct { /*!< (@ 0x4000D000) RNG Structure */
+ __OM uint32_t TASKS_START; /*!< (@ 0x00000000) Task starting the random number generator */
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Task stopping the random number generator */
+ __IM uint32_t RESERVED[62];
+ __IOM uint32_t EVENTS_VALRDY; /*!< (@ 0x00000100) Event being generated for every new random number
+ written to the VALUE register */
+ __IM uint32_t RESERVED1[63];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED2[64];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED3[126];
+ __IOM uint32_t CONFIG; /*!< (@ 0x00000504) Configuration register */
+ __IM uint32_t VALUE; /*!< (@ 0x00000508) Output random number */
+} NRF_RNG_Type; /*!< Size = 1292 (0x50c) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ ECB ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief AES ECB Mode Encryption (ECB)
+ */
+
+typedef struct { /*!< (@ 0x4000E000) ECB Structure */
+ __OM uint32_t TASKS_STARTECB; /*!< (@ 0x00000000) Start ECB block encrypt */
+ __OM uint32_t TASKS_STOPECB; /*!< (@ 0x00000004) Abort a possible executing ECB operation */
+ __IM uint32_t RESERVED[62];
+ __IOM uint32_t EVENTS_ENDECB; /*!< (@ 0x00000100) ECB block encrypt complete */
+ __IOM uint32_t EVENTS_ERRORECB; /*!< (@ 0x00000104) ECB block encrypt aborted because of a STOPECB
+ task or due to an error */
+ __IM uint32_t RESERVED1[127];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED2[126];
+ __IOM uint32_t ECBDATAPTR; /*!< (@ 0x00000504) ECB block encrypt memory pointers */
+} NRF_ECB_Type; /*!< Size = 1288 (0x508) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ AAR ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Accelerated Address Resolver (AAR)
+ */
+
+typedef struct { /*!< (@ 0x4000F000) AAR Structure */
+ __OM uint32_t TASKS_START; /*!< (@ 0x00000000) Start resolving addresses based on IRKs specified
+ in the IRK data structure */
+ __IM uint32_t RESERVED;
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000008) Stop resolving addresses */
+ __IM uint32_t RESERVED1[61];
+ __IOM uint32_t EVENTS_END; /*!< (@ 0x00000100) Address resolution procedure complete */
+ __IOM uint32_t EVENTS_RESOLVED; /*!< (@ 0x00000104) Address resolved */
+ __IOM uint32_t EVENTS_NOTRESOLVED; /*!< (@ 0x00000108) Address not resolved */
+ __IM uint32_t RESERVED2[126];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED3[61];
+ __IM uint32_t STATUS; /*!< (@ 0x00000400) Resolution status */
+ __IM uint32_t RESERVED4[63];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable AAR */
+ __IOM uint32_t NIRK; /*!< (@ 0x00000504) Number of IRKs */
+ __IOM uint32_t IRKPTR; /*!< (@ 0x00000508) Pointer to IRK data structure */
+ __IM uint32_t RESERVED5;
+ __IOM uint32_t ADDRPTR; /*!< (@ 0x00000510) Pointer to the resolvable address */
+ __IOM uint32_t SCRATCHPTR; /*!< (@ 0x00000514) Pointer to data area used for temporary storage */
+} NRF_AAR_Type; /*!< Size = 1304 (0x518) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ CCM ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief AES CCM Mode Encryption (CCM)
+ */
+
+typedef struct { /*!< (@ 0x4000F000) CCM Structure */
+ __OM uint32_t TASKS_KSGEN; /*!< (@ 0x00000000) Start generation of key-stream. This operation
+ will stop by itself when completed. */
+ __OM uint32_t TASKS_CRYPT; /*!< (@ 0x00000004) Start encryption/decryption. This operation will
+ stop by itself when completed. */
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000008) Stop encryption/decryption */
+ __OM uint32_t TASKS_RATEOVERRIDE; /*!< (@ 0x0000000C) Override DATARATE setting in MODE register with
+ the contents of the RATEOVERRIDE register
+ for any ongoing encryption/decryption */
+ __IM uint32_t RESERVED[60];
+ __IOM uint32_t EVENTS_ENDKSGEN; /*!< (@ 0x00000100) Key-stream generation complete */
+ __IOM uint32_t EVENTS_ENDCRYPT; /*!< (@ 0x00000104) Encrypt/decrypt complete */
+ __IOM uint32_t EVENTS_ERROR; /*!< (@ 0x00000108) Deprecated register - CCM error event */
+ __IM uint32_t RESERVED1[61];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED2[64];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED3[61];
+ __IM uint32_t MICSTATUS; /*!< (@ 0x00000400) MIC check result */
+ __IM uint32_t RESERVED4[63];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable */
+ __IOM uint32_t MODE; /*!< (@ 0x00000504) Operation mode */
+ __IOM uint32_t CNFPTR; /*!< (@ 0x00000508) Pointer to data structure holding AES key and
+ NONCE vector */
+ __IOM uint32_t INPTR; /*!< (@ 0x0000050C) Input pointer */
+ __IOM uint32_t OUTPTR; /*!< (@ 0x00000510) Output pointer */
+ __IOM uint32_t SCRATCHPTR; /*!< (@ 0x00000514) Pointer to data area used for temporary storage */
+ __IOM uint32_t MAXPACKETSIZE; /*!< (@ 0x00000518) Length of key-stream generated when MODE.LENGTH
+ = Extended. */
+ __IOM uint32_t RATEOVERRIDE; /*!< (@ 0x0000051C) Data rate override setting. */
+} NRF_CCM_Type; /*!< Size = 1312 (0x520) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ WDT ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Watchdog Timer (WDT)
+ */
+
+typedef struct { /*!< (@ 0x40010000) WDT Structure */
+ __OM uint32_t TASKS_START; /*!< (@ 0x00000000) Start the watchdog */
+ __IM uint32_t RESERVED[63];
+ __IOM uint32_t EVENTS_TIMEOUT; /*!< (@ 0x00000100) Watchdog timeout */
+ __IM uint32_t RESERVED1[128];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED2[61];
+ __IM uint32_t RUNSTATUS; /*!< (@ 0x00000400) Run status */
+ __IM uint32_t REQSTATUS; /*!< (@ 0x00000404) Request status */
+ __IM uint32_t RESERVED3[63];
+ __IOM uint32_t CRV; /*!< (@ 0x00000504) Counter reload value */
+ __IOM uint32_t RREN; /*!< (@ 0x00000508) Enable register for reload request registers */
+ __IOM uint32_t CONFIG; /*!< (@ 0x0000050C) Configuration register */
+ __IM uint32_t RESERVED4[60];
+ __OM uint32_t RR[8]; /*!< (@ 0x00000600) Description collection: Reload request n */
+} NRF_WDT_Type; /*!< Size = 1568 (0x620) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ EGU0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Event Generator Unit 0 (EGU0)
+ */
+
+typedef struct { /*!< (@ 0x40014000) EGU0 Structure */
+ __OM uint32_t TASKS_TRIGGER[16]; /*!< (@ 0x00000000) Description collection: Trigger n for triggering
+ the corresponding TRIGGERED[n] event */
+ __IM uint32_t RESERVED[48];
+ __IOM uint32_t EVENTS_TRIGGERED[16]; /*!< (@ 0x00000100) Description collection: Event number n generated
+ by triggering the corresponding TRIGGER[n]
+ task */
+ __IM uint32_t RESERVED1[112];
+ __IOM uint32_t INTEN; /*!< (@ 0x00000300) Enable or disable interrupt */
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+} NRF_EGU_Type; /*!< Size = 780 (0x30c) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ SWI0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Software interrupt 0 (SWI0)
+ */
+
+typedef struct { /*!< (@ 0x40014000) SWI0 Structure */
+ __IM uint32_t UNUSED; /*!< (@ 0x00000000) Unused. */
+} NRF_SWI_Type; /*!< Size = 4 (0x4) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ NVMC ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Non-volatile memory controller (NVMC)
+ */
+
+typedef struct { /*!< (@ 0x4001E000) NVMC Structure */
+ __IM uint32_t RESERVED[256];
+ __IM uint32_t READY; /*!< (@ 0x00000400) Ready flag */
+ __IM uint32_t RESERVED1[64];
+ __IOM uint32_t CONFIG; /*!< (@ 0x00000504) Configuration register */
+
+ union {
+ __IOM uint32_t ERASEPAGE; /*!< (@ 0x00000508) Register for erasing a page in code area */
+ __IOM uint32_t ERASEPCR1; /*!< (@ 0x00000508) Deprecated register - Register for erasing a
+ page in code area. Equivalent to ERASEPAGE. */
+ };
+ __IOM uint32_t ERASEALL; /*!< (@ 0x0000050C) Register for erasing all non-volatile user memory */
+ __IOM uint32_t ERASEPCR0; /*!< (@ 0x00000510) Deprecated register - Register for erasing a
+ page in code area. Equivalent to ERASEPAGE. */
+ __IOM uint32_t ERASEUICR; /*!< (@ 0x00000514) Register for erasing user information configuration
+ registers */
+ __IOM uint32_t ERASEPAGEPARTIAL; /*!< (@ 0x00000518) Register for partial erase of a page in code
+ area */
+ __IOM uint32_t ERASEPAGEPARTIALCFG; /*!< (@ 0x0000051C) Register for partial erase configuration */
+} NRF_NVMC_Type; /*!< Size = 1312 (0x520) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ PPI ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Programmable Peripheral Interconnect (PPI)
+ */
+
+typedef struct { /*!< (@ 0x4001F000) PPI Structure */
+ __OM PPI_TASKS_CHG_Type TASKS_CHG[6]; /*!< (@ 0x00000000) Channel group tasks */
+ __IM uint32_t RESERVED[308];
+ __IOM uint32_t CHEN; /*!< (@ 0x00000500) Channel enable register */
+ __IOM uint32_t CHENSET; /*!< (@ 0x00000504) Channel enable set register */
+ __IOM uint32_t CHENCLR; /*!< (@ 0x00000508) Channel enable clear register */
+ __IM uint32_t RESERVED1;
+ __IOM PPI_CH_Type CH[20]; /*!< (@ 0x00000510) PPI Channel */
+ __IM uint32_t RESERVED2[148];
+ __IOM uint32_t CHG[6]; /*!< (@ 0x00000800) Description collection: Channel group n */
+ __IM uint32_t RESERVED3[62];
+ __IOM PPI_FORK_Type FORK[32]; /*!< (@ 0x00000910) Fork */
+} NRF_PPI_Type; /*!< Size = 2448 (0x990) */
+
+
+/** @} */ /* End of group Device_Peripheral_peripherals */
+
+
+/* =========================================================================================================================== */
+/* ================ Device Specific Peripheral Address Map ================ */
+/* =========================================================================================================================== */
+
+
+/** @addtogroup Device_Peripheral_peripheralAddr
+ * @{
+ */
+
+#define NRF_FICR_BASE 0x10000000UL
+#define NRF_UICR_BASE 0x10001000UL
+#define NRF_BPROT_BASE 0x40000000UL
+#define NRF_CLOCK_BASE 0x40000000UL
+#define NRF_POWER_BASE 0x40000000UL
+#define NRF_P0_BASE 0x50000000UL
+#define NRF_RADIO_BASE 0x40001000UL
+#define NRF_UART0_BASE 0x40002000UL
+#define NRF_UARTE0_BASE 0x40002000UL
+#define NRF_TWI0_BASE 0x40003000UL
+#define NRF_TWIM0_BASE 0x40003000UL
+#define NRF_TWIS0_BASE 0x40003000UL
+#define NRF_SPI0_BASE 0x40004000UL
+#define NRF_SPIM0_BASE 0x40004000UL
+#define NRF_SPIS0_BASE 0x40004000UL
+#define NRF_GPIOTE_BASE 0x40006000UL
+#define NRF_SAADC_BASE 0x40007000UL
+#define NRF_TIMER0_BASE 0x40008000UL
+#define NRF_TIMER1_BASE 0x40009000UL
+#define NRF_TIMER2_BASE 0x4000A000UL
+#define NRF_RTC0_BASE 0x4000B000UL
+#define NRF_TEMP_BASE 0x4000C000UL
+#define NRF_RNG_BASE 0x4000D000UL
+#define NRF_ECB_BASE 0x4000E000UL
+#define NRF_AAR_BASE 0x4000F000UL
+#define NRF_CCM_BASE 0x4000F000UL
+#define NRF_WDT_BASE 0x40010000UL
+#define NRF_RTC1_BASE 0x40011000UL
+#define NRF_EGU0_BASE 0x40014000UL
+#define NRF_SWI0_BASE 0x40014000UL
+#define NRF_EGU1_BASE 0x40015000UL
+#define NRF_SWI1_BASE 0x40015000UL
+#define NRF_SWI2_BASE 0x40016000UL
+#define NRF_SWI3_BASE 0x40017000UL
+#define NRF_SWI4_BASE 0x40018000UL
+#define NRF_SWI5_BASE 0x40019000UL
+#define NRF_NVMC_BASE 0x4001E000UL
+#define NRF_PPI_BASE 0x4001F000UL
+
+/** @} */ /* End of group Device_Peripheral_peripheralAddr */
+
+
+/* =========================================================================================================================== */
+/* ================ Peripheral declaration ================ */
+/* =========================================================================================================================== */
+
+
+/** @addtogroup Device_Peripheral_declaration
+ * @{
+ */
+
+#define NRF_FICR ((NRF_FICR_Type*) NRF_FICR_BASE)
+#define NRF_UICR ((NRF_UICR_Type*) NRF_UICR_BASE)
+#define NRF_BPROT ((NRF_BPROT_Type*) NRF_BPROT_BASE)
+#define NRF_CLOCK ((NRF_CLOCK_Type*) NRF_CLOCK_BASE)
+#define NRF_POWER ((NRF_POWER_Type*) NRF_POWER_BASE)
+#define NRF_P0 ((NRF_GPIO_Type*) NRF_P0_BASE)
+#define NRF_RADIO ((NRF_RADIO_Type*) NRF_RADIO_BASE)
+#define NRF_UART0 ((NRF_UART_Type*) NRF_UART0_BASE)
+#define NRF_UARTE0 ((NRF_UARTE_Type*) NRF_UARTE0_BASE)
+#define NRF_TWI0 ((NRF_TWI_Type*) NRF_TWI0_BASE)
+#define NRF_TWIM0 ((NRF_TWIM_Type*) NRF_TWIM0_BASE)
+#define NRF_TWIS0 ((NRF_TWIS_Type*) NRF_TWIS0_BASE)
+#define NRF_SPI0 ((NRF_SPI_Type*) NRF_SPI0_BASE)
+#define NRF_SPIM0 ((NRF_SPIM_Type*) NRF_SPIM0_BASE)
+#define NRF_SPIS0 ((NRF_SPIS_Type*) NRF_SPIS0_BASE)
+#define NRF_GPIOTE ((NRF_GPIOTE_Type*) NRF_GPIOTE_BASE)
+#define NRF_SAADC ((NRF_SAADC_Type*) NRF_SAADC_BASE)
+#define NRF_TIMER0 ((NRF_TIMER_Type*) NRF_TIMER0_BASE)
+#define NRF_TIMER1 ((NRF_TIMER_Type*) NRF_TIMER1_BASE)
+#define NRF_TIMER2 ((NRF_TIMER_Type*) NRF_TIMER2_BASE)
+#define NRF_RTC0 ((NRF_RTC_Type*) NRF_RTC0_BASE)
+#define NRF_TEMP ((NRF_TEMP_Type*) NRF_TEMP_BASE)
+#define NRF_RNG ((NRF_RNG_Type*) NRF_RNG_BASE)
+#define NRF_ECB ((NRF_ECB_Type*) NRF_ECB_BASE)
+#define NRF_AAR ((NRF_AAR_Type*) NRF_AAR_BASE)
+#define NRF_CCM ((NRF_CCM_Type*) NRF_CCM_BASE)
+#define NRF_WDT ((NRF_WDT_Type*) NRF_WDT_BASE)
+#define NRF_RTC1 ((NRF_RTC_Type*) NRF_RTC1_BASE)
+#define NRF_EGU0 ((NRF_EGU_Type*) NRF_EGU0_BASE)
+#define NRF_SWI0 ((NRF_SWI_Type*) NRF_SWI0_BASE)
+#define NRF_EGU1 ((NRF_EGU_Type*) NRF_EGU1_BASE)
+#define NRF_SWI1 ((NRF_SWI_Type*) NRF_SWI1_BASE)
+#define NRF_SWI2 ((NRF_SWI_Type*) NRF_SWI2_BASE)
+#define NRF_SWI3 ((NRF_SWI_Type*) NRF_SWI3_BASE)
+#define NRF_SWI4 ((NRF_SWI_Type*) NRF_SWI4_BASE)
+#define NRF_SWI5 ((NRF_SWI_Type*) NRF_SWI5_BASE)
+#define NRF_NVMC ((NRF_NVMC_Type*) NRF_NVMC_BASE)
+#define NRF_PPI ((NRF_PPI_Type*) NRF_PPI_BASE)
+
+/** @} */ /* End of group Device_Peripheral_declaration */
+
+
+/* ========================================= End of section using anonymous unions ========================================= */
+#if defined (__CC_ARM)
+ #pragma pop
+#elif defined (__ICCARM__)
+ /* leave anonymous unions enabled */
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #pragma clang diagnostic pop
+#elif defined (__GNUC__)
+ /* anonymous unions are enabled by default */
+#elif defined (__TMS470__)
+ /* anonymous unions are enabled by default */
+#elif defined (__TASKING__)
+ #pragma warning restore
+#elif defined (__CSMC__)
+ /* anonymous unions are enabled by default */
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* NRF52805_H */
+
+
+/** @} */ /* End of group nrf52805 */
+
+/** @} */ /* End of group Nordic Semiconductor */
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf52805.svd b/third_party/NordicSemiconductor/nrfx/mdk/nrf52805.svd
new file mode 100644
index 0000000..6a631c1
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf52805.svd
@@ -0,0 +1,32763 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!-- File naming: <vendor>_<part/series name>_svd.xml -->
+<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" noNamespaceSchemaLocation="CMSIS-SVD.xsd">
+ <vendor>Nordic Semiconductor</vendor>
+ <vendorID>Nordic</vendorID>
+ <name>nrf52805</name>
+ <series>nrf52</series>
+ <version>1</version>
+ <description>nRF52805 reference description for radio MCU with ARM 32-bit Cortex-M4 Microcontroller </description>
+ <licenseText>
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.\n
+\n
+Redistribution and use in source and binary forms, with or without\n
+modification, are permitted provided that the following conditions are met:\n
+\n
+1. Redistributions of source code must retain the above copyright notice, this\n
+ list of conditions and the following disclaimer.\n
+\n
+2. Redistributions in binary form must reproduce the above copyright\n
+ notice, this list of conditions and the following disclaimer in the\n
+ documentation and/or other materials provided with the distribution.\n
+\n
+3. Neither the name of Nordic Semiconductor ASA nor the names of its\n
+ contributors may be used to endorse or promote products derived from this\n
+ software without specific prior written permission.\n
+\n
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"\n
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n
+IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE\n
+ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE\n
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n
+POSSIBILITY OF SUCH DAMAGE.\n
+ </licenseText>
+ <addressUnitBits>8</addressUnitBits>
+ <width>32</width>
+ <size>32</size>
+ <resetValue>0x00000000</resetValue>
+ <resetMask>0xFFFFFFFF</resetMask>
+ <cpu>
+ <name>CM4</name>
+ <revision>r0p1</revision>
+ <endian>little</endian>
+ <mpuPresent>1</mpuPresent>
+ <fpuPresent>0</fpuPresent>
+ <nvicPrioBits>3</nvicPrioBits>
+ <vendorSystickConfig>0</vendorSystickConfig>
+ </cpu>
+ <headerSystemFilename>system_nrf52805</headerSystemFilename>
+ <headerDefinitionsPrefix>NRF_</headerDefinitionsPrefix>
+ <vendorExtensions>
+ <ExampleStackSize>2048</ExampleStackSize>
+ <ExampleHeapSize>2048</ExampleHeapSize>
+ <MaxInterrupts>112</MaxInterrupts>
+ </vendorExtensions>
+ <peripherals>
+ <peripheral>
+ <name>FICR</name>
+ <description>Factory information configuration registers</description>
+ <baseAddress>0x10000000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <groupName>FICR</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>CODEPAGESIZE</name>
+ <description>Code memory page size</description>
+ <addressOffset>0x010</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00001000</resetValue>
+ <fields>
+ <field>
+ <name>CODEPAGESIZE</name>
+ <description>Code memory page size</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CODESIZE</name>
+ <description>Code memory size</description>
+ <addressOffset>0x014</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00000030</resetValue>
+ <fields>
+ <field>
+ <name>CODESIZE</name>
+ <description>Code memory size in number of pages</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x2</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>DEVICEID[%s]</name>
+ <description>Description collection: Device identifier</description>
+ <addressOffset>0x060</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>DEVICEID</name>
+ <description>64 bit unique device identifier</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x4</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>ER[%s]</name>
+ <description>Description collection: Encryption root, word n</description>
+ <addressOffset>0x080</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>ER</name>
+ <description>Encryption root, word n</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x4</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>IR[%s]</name>
+ <description>Description collection: Identity root, word n</description>
+ <addressOffset>0x090</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>IR</name>
+ <description>Identity root, word n</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DEVICEADDRTYPE</name>
+ <description>Device address type</description>
+ <addressOffset>0x0A0</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>DEVICEADDRTYPE</name>
+ <description>Device address type</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Public</name>
+ <description>Public address</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Random</name>
+ <description>Random address</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x2</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>DEVICEADDR[%s]</name>
+ <description>Description collection: Device address n</description>
+ <addressOffset>0x0A4</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>DEVICEADDR</name>
+ <description>48 bit device address</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>INFO</name>
+ <description>Device info</description>
+ <headerStructName>FICR_INFO</headerStructName>
+ <access>read-only</access>
+ <addressOffset>0x100</addressOffset>
+ <register>
+ <name>PART</name>
+ <description>Part code</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00052805</resetValue>
+ <fields>
+ <field>
+ <name>PART</name>
+ <description>Part code</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>N52805</name>
+ <description>nRF52805</description>
+ <value>0x52805</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>N52810</name>
+ <description>nRF52810</description>
+ <value>0x52810</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>N52811</name>
+ <description>nRF52811</description>
+ <value>0x52811</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>N52832</name>
+ <description>nRF52832</description>
+ <value>0x52832</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Unspecified</name>
+ <description>Unspecified</description>
+ <value>0xFFFFFFFF</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>VARIANT</name>
+ <description>Part variant, hardware version and production configuration</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>VARIANT</name>
+ <description>Part variant, hardware version and production configuration, encoded as ASCII</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>AAAA</name>
+ <description>AAAA</description>
+ <value>0x41414141</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AAA0</name>
+ <description>AAA0</description>
+ <value>0x41414130</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AABA</name>
+ <description>AABA</description>
+ <value>0x41414241</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AABB</name>
+ <description>AABB</description>
+ <value>0x41414242</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AAB0</name>
+ <description>AAB0</description>
+ <value>0x41414230</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AACA</name>
+ <description>AACA</description>
+ <value>0x41414341</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AACB</name>
+ <description>AACB</description>
+ <value>0x41414342</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AAC0</name>
+ <description>AAC0</description>
+ <value>0x41414330</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Unspecified</name>
+ <description>Unspecified</description>
+ <value>0xFFFFFFFF</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PACKAGE</name>
+ <description>Package option</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PACKAGE</name>
+ <description>Package option</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>CA</name>
+ <description>CAxx - WLCSP</description>
+ <value>0x2004</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Unspecified</name>
+ <description>Unspecified</description>
+ <value>0xFFFFFFFF</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RAM</name>
+ <description>RAM variant</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00000018</resetValue>
+ <fields>
+ <field>
+ <name>RAM</name>
+ <description>RAM variant</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>K24</name>
+ <description>24 kByte RAM</description>
+ <value>0x18</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Unspecified</name>
+ <description>Unspecified</description>
+ <value>0xFFFFFFFF</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>FLASH</name>
+ <description>Flash variant</description>
+ <addressOffset>0x010</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x000000C0</resetValue>
+ <fields>
+ <field>
+ <name>FLASH</name>
+ <description>Flash variant</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>K192</name>
+ <description>192 kByte flash</description>
+ <value>0xC0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Unspecified</name>
+ <description>Unspecified</description>
+ <value>0xFFFFFFFF</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>TEMP</name>
+ <description>Registers storing factory TEMP module linearization coefficients</description>
+ <headerStructName>FICR_TEMP</headerStructName>
+ <access>read-only</access>
+ <addressOffset>0x404</addressOffset>
+ <register>
+ <name>A0</name>
+ <description>Slope definition A0</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>A</name>
+ <description>A (slope definition) register</description>
+ <lsb>0</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>A1</name>
+ <description>Slope definition A1</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>A</name>
+ <description>A (slope definition) register</description>
+ <lsb>0</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>A2</name>
+ <description>Slope definition A2</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>A</name>
+ <description>A (slope definition) register</description>
+ <lsb>0</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>A3</name>
+ <description>Slope definition A3</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>A</name>
+ <description>A (slope definition) register</description>
+ <lsb>0</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>A4</name>
+ <description>Slope definition A4</description>
+ <addressOffset>0x010</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>A</name>
+ <description>A (slope definition) register</description>
+ <lsb>0</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>A5</name>
+ <description>Slope definition A5</description>
+ <addressOffset>0x014</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>A</name>
+ <description>A (slope definition) register</description>
+ <lsb>0</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>B0</name>
+ <description>Y-intercept B0</description>
+ <addressOffset>0x018</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>B</name>
+ <description>B (y-intercept)</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>B1</name>
+ <description>Y-intercept B1</description>
+ <addressOffset>0x01C</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>B</name>
+ <description>B (y-intercept)</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>B2</name>
+ <description>Y-intercept B2</description>
+ <addressOffset>0x020</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>B</name>
+ <description>B (y-intercept)</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>B3</name>
+ <description>Y-intercept B3</description>
+ <addressOffset>0x024</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>B</name>
+ <description>B (y-intercept)</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>B4</name>
+ <description>Y-intercept B4</description>
+ <addressOffset>0x028</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>B</name>
+ <description>B (y-intercept)</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>B5</name>
+ <description>Y-intercept B5</description>
+ <addressOffset>0x02C</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>B</name>
+ <description>B (y-intercept)</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>T0</name>
+ <description>Segment end T0</description>
+ <addressOffset>0x030</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>T</name>
+ <description>T (segment end) register</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>T1</name>
+ <description>Segment end T1</description>
+ <addressOffset>0x034</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>T</name>
+ <description>T (segment end) register</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>T2</name>
+ <description>Segment end T2</description>
+ <addressOffset>0x038</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>T</name>
+ <description>T (segment end) register</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>T3</name>
+ <description>Segment end T3</description>
+ <addressOffset>0x03C</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>T</name>
+ <description>T (segment end) register</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>T4</name>
+ <description>Segment end T4</description>
+ <addressOffset>0x040</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>T</name>
+ <description>T (segment end) register</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>UICR</name>
+ <description>User information configuration registers</description>
+ <baseAddress>0x10001000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <groupName>UICR</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <dim>0xD</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>NRFFW[%s]</name>
+ <description>Description collection: Reserved for Nordic firmware design</description>
+ <addressOffset>0x014</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>NRFFW</name>
+ <description>Reserved for Nordic firmware design</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0xC</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>NRFHW[%s]</name>
+ <description>Description collection: Reserved for Nordic hardware design</description>
+ <addressOffset>0x050</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>NRFHW</name>
+ <description>Reserved for Nordic hardware design</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x20</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>CUSTOMER[%s]</name>
+ <description>Description collection: Reserved for customer</description>
+ <addressOffset>0x080</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>CUSTOMER</name>
+ <description>Reserved for customer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x2</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>PSELRESET[%s]</name>
+ <description>Description collection: Mapping of the nRESET function (see POWER chapter for details)</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>GPIO pin number onto which nRESET is exposed</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>APPROTECT</name>
+ <description>Access port protection</description>
+ <addressOffset>0x208</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PALL</name>
+ <description>Enable or disable access port protection.</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0xFF</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>0x00</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>BPROT</name>
+ <description>Block Protect</description>
+ <baseAddress>0x40000000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <groupName>BPROT</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>CONFIG0</name>
+ <description>Block protect configuration register 0</description>
+ <addressOffset>0x600</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>REGION0</name>
+ <description>Enable protection for region 0. Write '0' has no effect.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION1</name>
+ <description>Enable protection for region 1. Write '0' has no effect.</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION2</name>
+ <description>Enable protection for region 2. Write '0' has no effect.</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION3</name>
+ <description>Enable protection for region 3. Write '0' has no effect.</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION4</name>
+ <description>Enable protection for region 4. Write '0' has no effect.</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION5</name>
+ <description>Enable protection for region 5. Write '0' has no effect.</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION6</name>
+ <description>Enable protection for region 6. Write '0' has no effect.</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION7</name>
+ <description>Enable protection for region 7. Write '0' has no effect.</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION8</name>
+ <description>Enable protection for region 8. Write '0' has no effect.</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION9</name>
+ <description>Enable protection for region 9. Write '0' has no effect.</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION10</name>
+ <description>Enable protection for region 10. Write '0' has no effect.</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION11</name>
+ <description>Enable protection for region 11. Write '0' has no effect.</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION12</name>
+ <description>Enable protection for region 12. Write '0' has no effect.</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION13</name>
+ <description>Enable protection for region 13. Write '0' has no effect.</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION14</name>
+ <description>Enable protection for region 14. Write '0' has no effect.</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION15</name>
+ <description>Enable protection for region 15. Write '0' has no effect.</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION16</name>
+ <description>Enable protection for region 16. Write '0' has no effect.</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION17</name>
+ <description>Enable protection for region 17. Write '0' has no effect.</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION18</name>
+ <description>Enable protection for region 18. Write '0' has no effect.</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION19</name>
+ <description>Enable protection for region 19. Write '0' has no effect.</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION20</name>
+ <description>Enable protection for region 20. Write '0' has no effect.</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION21</name>
+ <description>Enable protection for region 21. Write '0' has no effect.</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION22</name>
+ <description>Enable protection for region 22. Write '0' has no effect.</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION23</name>
+ <description>Enable protection for region 23. Write '0' has no effect.</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION24</name>
+ <description>Enable protection for region 24. Write '0' has no effect.</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION25</name>
+ <description>Enable protection for region 25. Write '0' has no effect.</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION26</name>
+ <description>Enable protection for region 26. Write '0' has no effect.</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION27</name>
+ <description>Enable protection for region 27. Write '0' has no effect.</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION28</name>
+ <description>Enable protection for region 28. Write '0' has no effect.</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION29</name>
+ <description>Enable protection for region 29. Write '0' has no effect.</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION30</name>
+ <description>Enable protection for region 30. Write '0' has no effect.</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION31</name>
+ <description>Enable protection for region 31. Write '0' has no effect.</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CONFIG1</name>
+ <description>Block protect configuration register 1</description>
+ <addressOffset>0x604</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>REGION32</name>
+ <description>Enable protection for region 32. Write '0' has no effect.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION33</name>
+ <description>Enable protection for region 33. Write '0' has no effect.</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION34</name>
+ <description>Enable protection for region 34. Write '0' has no effect.</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION35</name>
+ <description>Enable protection for region 35. Write '0' has no effect.</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION36</name>
+ <description>Enable protection for region 36. Write '0' has no effect.</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION37</name>
+ <description>Enable protection for region 37. Write '0' has no effect.</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION38</name>
+ <description>Enable protection for region 38. Write '0' has no effect.</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION39</name>
+ <description>Enable protection for region 39. Write '0' has no effect.</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION40</name>
+ <description>Enable protection for region 40. Write '0' has no effect.</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION41</name>
+ <description>Enable protection for region 41. Write '0' has no effect.</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION42</name>
+ <description>Enable protection for region 42. Write '0' has no effect.</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION43</name>
+ <description>Enable protection for region 43. Write '0' has no effect.</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION44</name>
+ <description>Enable protection for region 44. Write '0' has no effect.</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION45</name>
+ <description>Enable protection for region 45. Write '0' has no effect.</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION46</name>
+ <description>Enable protection for region 46. Write '0' has no effect.</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION47</name>
+ <description>Enable protection for region 47. Write '0' has no effect.</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Protection disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Protection enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DISABLEINDEBUG</name>
+ <description>Disable protection mechanism in debug mode</description>
+ <addressOffset>0x608</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>DISABLEINDEBUG</name>
+ <description>Disable the protection mechanism for NVM regions while in debug mode. This register will only disable the protection mechanism if the device is in debug mode.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled in debug</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled in debug</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>CLOCK</name>
+ <description>Clock control</description>
+ <baseAddress>0x40000000</baseAddress>
+ <alternatePeripheral>BPROT</alternatePeripheral>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>POWER_CLOCK</name>
+ <value>0</value>
+ </interrupt>
+ <groupName>CLOCK</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_HFCLKSTART</name>
+ <description>Start HFCLK crystal oscillator</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_HFCLKSTART</name>
+ <description>Start HFCLK crystal oscillator</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_HFCLKSTOP</name>
+ <description>Stop HFCLK crystal oscillator</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_HFCLKSTOP</name>
+ <description>Stop HFCLK crystal oscillator</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_LFCLKSTART</name>
+ <description>Start LFCLK source</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_LFCLKSTART</name>
+ <description>Start LFCLK source</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_LFCLKSTOP</name>
+ <description>Stop LFCLK source</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_LFCLKSTOP</name>
+ <description>Stop LFCLK source</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_CAL</name>
+ <description>Start calibration of LFRC oscillator</description>
+ <addressOffset>0x010</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CAL</name>
+ <description>Start calibration of LFRC oscillator</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_CTSTART</name>
+ <description>Start calibration timer</description>
+ <addressOffset>0x014</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CTSTART</name>
+ <description>Start calibration timer</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_CTSTOP</name>
+ <description>Stop calibration timer</description>
+ <addressOffset>0x018</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CTSTOP</name>
+ <description>Stop calibration timer</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_HFCLKSTARTED</name>
+ <description>HFCLK oscillator started</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_HFCLKSTARTED</name>
+ <description>HFCLK oscillator started</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_LFCLKSTARTED</name>
+ <description>LFCLK started</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_LFCLKSTARTED</name>
+ <description>LFCLK started</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_DONE</name>
+ <description>Calibration of LFCLK RC oscillator complete event</description>
+ <addressOffset>0x10C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_DONE</name>
+ <description>Calibration of LFCLK RC oscillator complete event</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_CTTO</name>
+ <description>Calibration timer timeout</description>
+ <addressOffset>0x110</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CTTO</name>
+ <description>Calibration timer timeout</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>HFCLKSTARTED</name>
+ <description>Write '1' to enable interrupt for event HFCLKSTARTED</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LFCLKSTARTED</name>
+ <description>Write '1' to enable interrupt for event LFCLKSTARTED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DONE</name>
+ <description>Write '1' to enable interrupt for event DONE</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CTTO</name>
+ <description>Write '1' to enable interrupt for event CTTO</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>HFCLKSTARTED</name>
+ <description>Write '1' to disable interrupt for event HFCLKSTARTED</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LFCLKSTARTED</name>
+ <description>Write '1' to disable interrupt for event LFCLKSTARTED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DONE</name>
+ <description>Write '1' to disable interrupt for event DONE</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CTTO</name>
+ <description>Write '1' to disable interrupt for event CTTO</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>HFCLKRUN</name>
+ <description>Status indicating that HFCLKSTART task has been triggered</description>
+ <addressOffset>0x408</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>STATUS</name>
+ <description>HFCLKSTART task triggered or not</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotTriggered</name>
+ <description>Task not triggered</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Triggered</name>
+ <description>Task triggered</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>HFCLKSTAT</name>
+ <description>HFCLK status</description>
+ <addressOffset>0x40C</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>SRC</name>
+ <description>Source of HFCLK</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>RC</name>
+ <description>64 MHz internal oscillator (HFINT)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Xtal</name>
+ <description>64 MHz crystal oscillator (HFXO)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STATE</name>
+ <description>HFCLK state</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotRunning</name>
+ <description>HFCLK not running</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Running</name>
+ <description>HFCLK running</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LFCLKRUN</name>
+ <description>Status indicating that LFCLKSTART task has been triggered</description>
+ <addressOffset>0x414</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>STATUS</name>
+ <description>LFCLKSTART task triggered or not</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotTriggered</name>
+ <description>Task not triggered</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Triggered</name>
+ <description>Task triggered</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LFCLKSTAT</name>
+ <description>LFCLK status</description>
+ <addressOffset>0x418</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>SRC</name>
+ <description>Source of LFCLK</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>RC</name>
+ <description>32.768 kHz RC oscillator</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Xtal</name>
+ <description>32.768 kHz crystal oscillator</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Synth</name>
+ <description>32.768 kHz synthesized from HFCLK</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STATE</name>
+ <description>LFCLK state</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotRunning</name>
+ <description>LFCLK not running</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Running</name>
+ <description>LFCLK running</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LFCLKSRCCOPY</name>
+ <description>Copy of LFCLKSRC register, set when LFCLKSTART task was triggered</description>
+ <addressOffset>0x41C</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>SRC</name>
+ <description>Clock source</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>RC</name>
+ <description>32.768 kHz RC oscillator</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Xtal</name>
+ <description>32.768 kHz crystal oscillator</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Synth</name>
+ <description>32.768 kHz synthesized from HFCLK</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LFCLKSRC</name>
+ <description>Clock source for the LFCLK</description>
+ <addressOffset>0x518</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>SRC</name>
+ <description>Clock source</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>RC</name>
+ <description>32.768 kHz RC oscillator</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Xtal</name>
+ <description>32.768 kHz crystal oscillator</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Synth</name>
+ <description>32.768 kHz synthesized from HFCLK</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>BYPASS</name>
+ <description>Enable or disable bypass of LFCLK crystal oscillator with external clock source</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable (use with Xtal or low-swing external source)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable (use with rail-to-rail external source)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EXTERNAL</name>
+ <description>Enable or disable external source for LFCLK</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable external source (use with Xtal)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable use of external source instead of Xtal (SRC needs to be set to Xtal)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CTIV</name>
+ <description>Calibration timer interval</description>
+ <addressOffset>0x538</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CTIV</name>
+ <description>Calibration timer interval in multiple of 0.25 seconds. Range: 0.25 seconds to 31.75 seconds.</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>POWER</name>
+ <description>Power control</description>
+ <baseAddress>0x40000000</baseAddress>
+ <alternatePeripheral>BPROT</alternatePeripheral>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>POWER_CLOCK</name>
+ <value>0</value>
+ </interrupt>
+ <groupName>POWER</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_CONSTLAT</name>
+ <description>Enable Constant Latency mode</description>
+ <addressOffset>0x078</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CONSTLAT</name>
+ <description>Enable Constant Latency mode</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_LOWPWR</name>
+ <description>Enable Low-power mode (variable latency)</description>
+ <addressOffset>0x07C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_LOWPWR</name>
+ <description>Enable Low-power mode (variable latency)</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_POFWARN</name>
+ <description>Power failure warning</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_POFWARN</name>
+ <description>Power failure warning</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_SLEEPENTER</name>
+ <description>CPU entered WFI/WFE sleep</description>
+ <addressOffset>0x114</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_SLEEPENTER</name>
+ <description>CPU entered WFI/WFE sleep</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_SLEEPEXIT</name>
+ <description>CPU exited WFI/WFE sleep</description>
+ <addressOffset>0x118</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_SLEEPEXIT</name>
+ <description>CPU exited WFI/WFE sleep</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>POFWARN</name>
+ <description>Write '1' to enable interrupt for event POFWARN</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SLEEPENTER</name>
+ <description>Write '1' to enable interrupt for event SLEEPENTER</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SLEEPEXIT</name>
+ <description>Write '1' to enable interrupt for event SLEEPEXIT</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>POFWARN</name>
+ <description>Write '1' to disable interrupt for event POFWARN</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SLEEPENTER</name>
+ <description>Write '1' to disable interrupt for event SLEEPENTER</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SLEEPEXIT</name>
+ <description>Write '1' to disable interrupt for event SLEEPEXIT</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RESETREAS</name>
+ <description>Reset reason</description>
+ <addressOffset>0x400</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>RESETPIN</name>
+ <description>Reset from pin-reset detected</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Not detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DOG</name>
+ <description>Reset from watchdog detected</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Not detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SREQ</name>
+ <description>Reset from soft reset detected</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Not detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LOCKUP</name>
+ <description>Reset from CPU lock-up detected</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Not detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OFF</name>
+ <description>Reset due to wake up from System OFF mode when wakeup is triggered from DETECT signal from GPIO</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Not detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DIF</name>
+ <description>Reset due to wake up from System OFF mode when wakeup is triggered from entering into debug interface mode</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Not detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SYSTEMOFF</name>
+ <description>System OFF register</description>
+ <addressOffset>0x500</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>SYSTEMOFF</name>
+ <description>Enable System OFF mode</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Enter</name>
+ <description>Enable System OFF mode</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>POFCON</name>
+ <description>Power failure comparator configuration</description>
+ <addressOffset>0x510</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>POF</name>
+ <description>Enable or disable power failure comparator</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>THRESHOLD</name>
+ <description>Power failure comparator threshold setting</description>
+ <lsb>1</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>V17</name>
+ <description>Set threshold to 1.7 V</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V18</name>
+ <description>Set threshold to 1.8 V</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V19</name>
+ <description>Set threshold to 1.9 V</description>
+ <value>6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V20</name>
+ <description>Set threshold to 2.0 V</description>
+ <value>7</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V21</name>
+ <description>Set threshold to 2.1 V</description>
+ <value>8</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V22</name>
+ <description>Set threshold to 2.2 V</description>
+ <value>9</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V23</name>
+ <description>Set threshold to 2.3 V</description>
+ <value>10</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V24</name>
+ <description>Set threshold to 2.4 V</description>
+ <value>11</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V25</name>
+ <description>Set threshold to 2.5 V</description>
+ <value>12</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V26</name>
+ <description>Set threshold to 2.6 V</description>
+ <value>13</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V27</name>
+ <description>Set threshold to 2.7 V</description>
+ <value>14</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V28</name>
+ <description>Set threshold to 2.8 V</description>
+ <value>15</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>GPREGRET</name>
+ <description>General purpose retention register</description>
+ <addressOffset>0x51C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>GPREGRET</name>
+ <description>General purpose retention register</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>GPREGRET2</name>
+ <description>General purpose retention register</description>
+ <addressOffset>0x520</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>GPREGRET</name>
+ <description>General purpose retention register</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DCDCEN</name>
+ <description>DC/DC enable register</description>
+ <addressOffset>0x578</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>DCDCEN</name>
+ <description>Enable or disable DC/DC converter</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <dim>8</dim>
+ <dimIncrement>0x010</dimIncrement>
+ <name>RAM[%s]</name>
+ <description>Unspecified</description>
+ <headerStructName>POWER_RAM</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x900</addressOffset>
+ <register>
+ <name>POWER</name>
+ <description>Description cluster: RAMn power control register. The RAM size will vary depending on product variant, and the RAMn register will only be present if the corresponding RAM AHB slave is present on the device.</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x0000FFFF</resetValue>
+ <fields>
+ <field>
+ <name>S0POWER</name>
+ <description>Keep RAM section S0 ON or OFF in System ON mode.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S1POWER</name>
+ <description>Keep RAM section S1 ON or OFF in System ON mode.</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S0RETENTION</name>
+ <description>Keep retention on RAM section S0 when RAM section is in OFF</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S1RETENTION</name>
+ <description>Keep retention on RAM section S1 when RAM section is in OFF</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>POWERSET</name>
+ <description>Description cluster: RAMn power control set register</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <resetValue>0x0000FFFF</resetValue>
+ <fields>
+ <field>
+ <name>S0POWER</name>
+ <description>Keep RAM section S0 of RAMn on or off in System ON mode</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S1POWER</name>
+ <description>Keep RAM section S1 of RAMn on or off in System ON mode</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S0RETENTION</name>
+ <description>Keep retention on RAM section S0 when RAM section is switched off</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S1RETENTION</name>
+ <description>Keep retention on RAM section S1 when RAM section is switched off</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>POWERCLR</name>
+ <description>Description cluster: RAMn power control clear register</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <resetValue>0x0000FFFF</resetValue>
+ <fields>
+ <field>
+ <name>S0POWER</name>
+ <description>Keep RAM section S0 of RAMn on or off in System ON mode</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S1POWER</name>
+ <description>Keep RAM section S1 of RAMn on or off in System ON mode</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S0RETENTION</name>
+ <description>Keep retention on RAM section S0 when RAM section is switched off</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S1RETENTION</name>
+ <description>Keep retention on RAM section S1 when RAM section is switched off</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>P0</name>
+ <description>GPIO Port</description>
+ <baseAddress>0x50000000</baseAddress>
+ <headerStructName>GPIO</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <groupName>GPIO</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>OUT</name>
+ <description>Write GPIO port</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PIN0</name>
+ <description>Pin 0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN1</name>
+ <description>Pin 1</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN2</name>
+ <description>Pin 2</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN3</name>
+ <description>Pin 3</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN4</name>
+ <description>Pin 4</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN5</name>
+ <description>Pin 5</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN6</name>
+ <description>Pin 6</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN7</name>
+ <description>Pin 7</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN8</name>
+ <description>Pin 8</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN9</name>
+ <description>Pin 9</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN10</name>
+ <description>Pin 10</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN11</name>
+ <description>Pin 11</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN12</name>
+ <description>Pin 12</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN13</name>
+ <description>Pin 13</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN14</name>
+ <description>Pin 14</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN15</name>
+ <description>Pin 15</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN16</name>
+ <description>Pin 16</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN17</name>
+ <description>Pin 17</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN18</name>
+ <description>Pin 18</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN19</name>
+ <description>Pin 19</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN20</name>
+ <description>Pin 20</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN21</name>
+ <description>Pin 21</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN22</name>
+ <description>Pin 22</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN23</name>
+ <description>Pin 23</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN24</name>
+ <description>Pin 24</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN25</name>
+ <description>Pin 25</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN26</name>
+ <description>Pin 26</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN27</name>
+ <description>Pin 27</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN28</name>
+ <description>Pin 28</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN29</name>
+ <description>Pin 29</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN30</name>
+ <description>Pin 30</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN31</name>
+ <description>Pin 31</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>OUTSET</name>
+ <description>Set individual bits in GPIO port</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToSet</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>PIN0</name>
+ <description>Pin 0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN1</name>
+ <description>Pin 1</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN2</name>
+ <description>Pin 2</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN3</name>
+ <description>Pin 3</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN4</name>
+ <description>Pin 4</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN5</name>
+ <description>Pin 5</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN6</name>
+ <description>Pin 6</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN7</name>
+ <description>Pin 7</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN8</name>
+ <description>Pin 8</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN9</name>
+ <description>Pin 9</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN10</name>
+ <description>Pin 10</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN11</name>
+ <description>Pin 11</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN12</name>
+ <description>Pin 12</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN13</name>
+ <description>Pin 13</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN14</name>
+ <description>Pin 14</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN15</name>
+ <description>Pin 15</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN16</name>
+ <description>Pin 16</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN17</name>
+ <description>Pin 17</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN18</name>
+ <description>Pin 18</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN19</name>
+ <description>Pin 19</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN20</name>
+ <description>Pin 20</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN21</name>
+ <description>Pin 21</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN22</name>
+ <description>Pin 22</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN23</name>
+ <description>Pin 23</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN24</name>
+ <description>Pin 24</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN25</name>
+ <description>Pin 25</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN26</name>
+ <description>Pin 26</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN27</name>
+ <description>Pin 27</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN28</name>
+ <description>Pin 28</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN29</name>
+ <description>Pin 29</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN30</name>
+ <description>Pin 30</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN31</name>
+ <description>Pin 31</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>OUTCLR</name>
+ <description>Clear individual bits in GPIO port</description>
+ <addressOffset>0x50C</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToClear</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>PIN0</name>
+ <description>Pin 0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN1</name>
+ <description>Pin 1</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN2</name>
+ <description>Pin 2</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN3</name>
+ <description>Pin 3</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN4</name>
+ <description>Pin 4</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN5</name>
+ <description>Pin 5</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN6</name>
+ <description>Pin 6</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN7</name>
+ <description>Pin 7</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN8</name>
+ <description>Pin 8</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN9</name>
+ <description>Pin 9</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN10</name>
+ <description>Pin 10</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN11</name>
+ <description>Pin 11</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN12</name>
+ <description>Pin 12</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN13</name>
+ <description>Pin 13</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN14</name>
+ <description>Pin 14</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN15</name>
+ <description>Pin 15</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN16</name>
+ <description>Pin 16</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN17</name>
+ <description>Pin 17</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN18</name>
+ <description>Pin 18</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN19</name>
+ <description>Pin 19</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN20</name>
+ <description>Pin 20</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN21</name>
+ <description>Pin 21</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN22</name>
+ <description>Pin 22</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN23</name>
+ <description>Pin 23</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN24</name>
+ <description>Pin 24</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN25</name>
+ <description>Pin 25</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN26</name>
+ <description>Pin 26</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN27</name>
+ <description>Pin 27</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN28</name>
+ <description>Pin 28</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN29</name>
+ <description>Pin 29</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN30</name>
+ <description>Pin 30</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN31</name>
+ <description>Pin 31</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>IN</name>
+ <description>Read GPIO port</description>
+ <addressOffset>0x510</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>PIN0</name>
+ <description>Pin 0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN1</name>
+ <description>Pin 1</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN2</name>
+ <description>Pin 2</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN3</name>
+ <description>Pin 3</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN4</name>
+ <description>Pin 4</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN5</name>
+ <description>Pin 5</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN6</name>
+ <description>Pin 6</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN7</name>
+ <description>Pin 7</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN8</name>
+ <description>Pin 8</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN9</name>
+ <description>Pin 9</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN10</name>
+ <description>Pin 10</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN11</name>
+ <description>Pin 11</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN12</name>
+ <description>Pin 12</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN13</name>
+ <description>Pin 13</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN14</name>
+ <description>Pin 14</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN15</name>
+ <description>Pin 15</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN16</name>
+ <description>Pin 16</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN17</name>
+ <description>Pin 17</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN18</name>
+ <description>Pin 18</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN19</name>
+ <description>Pin 19</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN20</name>
+ <description>Pin 20</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN21</name>
+ <description>Pin 21</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN22</name>
+ <description>Pin 22</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN23</name>
+ <description>Pin 23</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN24</name>
+ <description>Pin 24</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN25</name>
+ <description>Pin 25</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN26</name>
+ <description>Pin 26</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN27</name>
+ <description>Pin 27</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN28</name>
+ <description>Pin 28</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN29</name>
+ <description>Pin 29</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN30</name>
+ <description>Pin 30</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN31</name>
+ <description>Pin 31</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DIR</name>
+ <description>Direction of GPIO pins</description>
+ <addressOffset>0x514</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PIN0</name>
+ <description>Pin 0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN1</name>
+ <description>Pin 1</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN2</name>
+ <description>Pin 2</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN3</name>
+ <description>Pin 3</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN4</name>
+ <description>Pin 4</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN5</name>
+ <description>Pin 5</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN6</name>
+ <description>Pin 6</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN7</name>
+ <description>Pin 7</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN8</name>
+ <description>Pin 8</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN9</name>
+ <description>Pin 9</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN10</name>
+ <description>Pin 10</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN11</name>
+ <description>Pin 11</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN12</name>
+ <description>Pin 12</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN13</name>
+ <description>Pin 13</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN14</name>
+ <description>Pin 14</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN15</name>
+ <description>Pin 15</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN16</name>
+ <description>Pin 16</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN17</name>
+ <description>Pin 17</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN18</name>
+ <description>Pin 18</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN19</name>
+ <description>Pin 19</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN20</name>
+ <description>Pin 20</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN21</name>
+ <description>Pin 21</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN22</name>
+ <description>Pin 22</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN23</name>
+ <description>Pin 23</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN24</name>
+ <description>Pin 24</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN25</name>
+ <description>Pin 25</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN26</name>
+ <description>Pin 26</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN27</name>
+ <description>Pin 27</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN28</name>
+ <description>Pin 28</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN29</name>
+ <description>Pin 29</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN30</name>
+ <description>Pin 30</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN31</name>
+ <description>Pin 31</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DIRSET</name>
+ <description>DIR set register</description>
+ <addressOffset>0x518</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToSet</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>PIN0</name>
+ <description>Set as output pin 0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN1</name>
+ <description>Set as output pin 1</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN2</name>
+ <description>Set as output pin 2</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN3</name>
+ <description>Set as output pin 3</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN4</name>
+ <description>Set as output pin 4</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN5</name>
+ <description>Set as output pin 5</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN6</name>
+ <description>Set as output pin 6</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN7</name>
+ <description>Set as output pin 7</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN8</name>
+ <description>Set as output pin 8</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN9</name>
+ <description>Set as output pin 9</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN10</name>
+ <description>Set as output pin 10</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN11</name>
+ <description>Set as output pin 11</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN12</name>
+ <description>Set as output pin 12</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN13</name>
+ <description>Set as output pin 13</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN14</name>
+ <description>Set as output pin 14</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN15</name>
+ <description>Set as output pin 15</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN16</name>
+ <description>Set as output pin 16</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN17</name>
+ <description>Set as output pin 17</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN18</name>
+ <description>Set as output pin 18</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN19</name>
+ <description>Set as output pin 19</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN20</name>
+ <description>Set as output pin 20</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN21</name>
+ <description>Set as output pin 21</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN22</name>
+ <description>Set as output pin 22</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN23</name>
+ <description>Set as output pin 23</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN24</name>
+ <description>Set as output pin 24</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN25</name>
+ <description>Set as output pin 25</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN26</name>
+ <description>Set as output pin 26</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN27</name>
+ <description>Set as output pin 27</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN28</name>
+ <description>Set as output pin 28</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN29</name>
+ <description>Set as output pin 29</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN30</name>
+ <description>Set as output pin 30</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN31</name>
+ <description>Set as output pin 31</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DIRCLR</name>
+ <description>DIR clear register</description>
+ <addressOffset>0x51C</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToClear</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>PIN0</name>
+ <description>Set as input pin 0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN1</name>
+ <description>Set as input pin 1</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN2</name>
+ <description>Set as input pin 2</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN3</name>
+ <description>Set as input pin 3</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN4</name>
+ <description>Set as input pin 4</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN5</name>
+ <description>Set as input pin 5</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN6</name>
+ <description>Set as input pin 6</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN7</name>
+ <description>Set as input pin 7</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN8</name>
+ <description>Set as input pin 8</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN9</name>
+ <description>Set as input pin 9</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN10</name>
+ <description>Set as input pin 10</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN11</name>
+ <description>Set as input pin 11</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN12</name>
+ <description>Set as input pin 12</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN13</name>
+ <description>Set as input pin 13</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN14</name>
+ <description>Set as input pin 14</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN15</name>
+ <description>Set as input pin 15</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN16</name>
+ <description>Set as input pin 16</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN17</name>
+ <description>Set as input pin 17</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN18</name>
+ <description>Set as input pin 18</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN19</name>
+ <description>Set as input pin 19</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN20</name>
+ <description>Set as input pin 20</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN21</name>
+ <description>Set as input pin 21</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN22</name>
+ <description>Set as input pin 22</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN23</name>
+ <description>Set as input pin 23</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN24</name>
+ <description>Set as input pin 24</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN25</name>
+ <description>Set as input pin 25</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN26</name>
+ <description>Set as input pin 26</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN27</name>
+ <description>Set as input pin 27</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN28</name>
+ <description>Set as input pin 28</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN29</name>
+ <description>Set as input pin 29</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN30</name>
+ <description>Set as input pin 30</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN31</name>
+ <description>Set as input pin 31</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LATCH</name>
+ <description>Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers</description>
+ <addressOffset>0x520</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PIN0</name>
+ <description>Status on whether PIN0 has met criteria set in PIN_CNF0.SENSE register. Write '1' to clear.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN1</name>
+ <description>Status on whether PIN1 has met criteria set in PIN_CNF1.SENSE register. Write '1' to clear.</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN2</name>
+ <description>Status on whether PIN2 has met criteria set in PIN_CNF2.SENSE register. Write '1' to clear.</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN3</name>
+ <description>Status on whether PIN3 has met criteria set in PIN_CNF3.SENSE register. Write '1' to clear.</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN4</name>
+ <description>Status on whether PIN4 has met criteria set in PIN_CNF4.SENSE register. Write '1' to clear.</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN5</name>
+ <description>Status on whether PIN5 has met criteria set in PIN_CNF5.SENSE register. Write '1' to clear.</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN6</name>
+ <description>Status on whether PIN6 has met criteria set in PIN_CNF6.SENSE register. Write '1' to clear.</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN7</name>
+ <description>Status on whether PIN7 has met criteria set in PIN_CNF7.SENSE register. Write '1' to clear.</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN8</name>
+ <description>Status on whether PIN8 has met criteria set in PIN_CNF8.SENSE register. Write '1' to clear.</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN9</name>
+ <description>Status on whether PIN9 has met criteria set in PIN_CNF9.SENSE register. Write '1' to clear.</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN10</name>
+ <description>Status on whether PIN10 has met criteria set in PIN_CNF10.SENSE register. Write '1' to clear.</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN11</name>
+ <description>Status on whether PIN11 has met criteria set in PIN_CNF11.SENSE register. Write '1' to clear.</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN12</name>
+ <description>Status on whether PIN12 has met criteria set in PIN_CNF12.SENSE register. Write '1' to clear.</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN13</name>
+ <description>Status on whether PIN13 has met criteria set in PIN_CNF13.SENSE register. Write '1' to clear.</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN14</name>
+ <description>Status on whether PIN14 has met criteria set in PIN_CNF14.SENSE register. Write '1' to clear.</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN15</name>
+ <description>Status on whether PIN15 has met criteria set in PIN_CNF15.SENSE register. Write '1' to clear.</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN16</name>
+ <description>Status on whether PIN16 has met criteria set in PIN_CNF16.SENSE register. Write '1' to clear.</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN17</name>
+ <description>Status on whether PIN17 has met criteria set in PIN_CNF17.SENSE register. Write '1' to clear.</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN18</name>
+ <description>Status on whether PIN18 has met criteria set in PIN_CNF18.SENSE register. Write '1' to clear.</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN19</name>
+ <description>Status on whether PIN19 has met criteria set in PIN_CNF19.SENSE register. Write '1' to clear.</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN20</name>
+ <description>Status on whether PIN20 has met criteria set in PIN_CNF20.SENSE register. Write '1' to clear.</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN21</name>
+ <description>Status on whether PIN21 has met criteria set in PIN_CNF21.SENSE register. Write '1' to clear.</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN22</name>
+ <description>Status on whether PIN22 has met criteria set in PIN_CNF22.SENSE register. Write '1' to clear.</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN23</name>
+ <description>Status on whether PIN23 has met criteria set in PIN_CNF23.SENSE register. Write '1' to clear.</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN24</name>
+ <description>Status on whether PIN24 has met criteria set in PIN_CNF24.SENSE register. Write '1' to clear.</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN25</name>
+ <description>Status on whether PIN25 has met criteria set in PIN_CNF25.SENSE register. Write '1' to clear.</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN26</name>
+ <description>Status on whether PIN26 has met criteria set in PIN_CNF26.SENSE register. Write '1' to clear.</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN27</name>
+ <description>Status on whether PIN27 has met criteria set in PIN_CNF27.SENSE register. Write '1' to clear.</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN28</name>
+ <description>Status on whether PIN28 has met criteria set in PIN_CNF28.SENSE register. Write '1' to clear.</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN29</name>
+ <description>Status on whether PIN29 has met criteria set in PIN_CNF29.SENSE register. Write '1' to clear.</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN30</name>
+ <description>Status on whether PIN30 has met criteria set in PIN_CNF30.SENSE register. Write '1' to clear.</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN31</name>
+ <description>Status on whether PIN31 has met criteria set in PIN_CNF31.SENSE register. Write '1' to clear.</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DETECTMODE</name>
+ <description>Select between default DETECT signal behaviour and LDETECT mode</description>
+ <addressOffset>0x524</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>DETECTMODE</name>
+ <description>Select between default DETECT signal behaviour and LDETECT mode</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Default</name>
+ <description>DETECT directly connected to PIN DETECT signals</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>LDETECT</name>
+ <description>Use the latched LDETECT behaviour</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x20</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>PIN_CNF[%s]</name>
+ <description>Description collection: Configuration of GPIO pins</description>
+ <addressOffset>0x700</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000002</resetValue>
+ <fields>
+ <field>
+ <name>DIR</name>
+ <description>Pin direction. Same physical register as DIR register</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Configure pin as an input pin</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Configure pin as an output pin</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>INPUT</name>
+ <description>Connect or disconnect input buffer</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Connect</name>
+ <description>Connect input buffer</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Disconnect</name>
+ <description>Disconnect input buffer</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PULL</name>
+ <description>Pull configuration</description>
+ <lsb>2</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>No pull</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Pulldown</name>
+ <description>Pull down on pin</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Pullup</name>
+ <description>Pull up on pin</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DRIVE</name>
+ <description>Drive configuration</description>
+ <lsb>8</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>S0S1</name>
+ <description>Standard '0', standard '1'</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>H0S1</name>
+ <description>High drive '0', standard '1'</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>S0H1</name>
+ <description>Standard '0', high drive '1'</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>H0H1</name>
+ <description>High drive '0', high 'drive '1''</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>D0S1</name>
+ <description>Disconnect '0' standard '1' (normally used for wired-or connections)</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>D0H1</name>
+ <description>Disconnect '0', high drive '1' (normally used for wired-or connections)</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>S0D1</name>
+ <description>Standard '0'. disconnect '1' (normally used for wired-and connections)</description>
+ <value>6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>H0D1</name>
+ <description>High drive '0', disconnect '1' (normally used for wired-and connections)</description>
+ <value>7</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SENSE</name>
+ <description>Pin sensing mechanism</description>
+ <lsb>16</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Sense for high level</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Sense for low level</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>RADIO</name>
+ <description>2.4 GHz radio</description>
+ <baseAddress>0x40001000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>RADIO</name>
+ <value>1</value>
+ </interrupt>
+ <groupName>RADIO</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_TXEN</name>
+ <description>Enable RADIO in TX mode</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_TXEN</name>
+ <description>Enable RADIO in TX mode</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_RXEN</name>
+ <description>Enable RADIO in RX mode</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_RXEN</name>
+ <description>Enable RADIO in RX mode</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_START</name>
+ <description>Start RADIO</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_START</name>
+ <description>Start RADIO</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stop RADIO</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stop RADIO</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_DISABLE</name>
+ <description>Disable RADIO</description>
+ <addressOffset>0x010</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_DISABLE</name>
+ <description>Disable RADIO</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_RSSISTART</name>
+ <description>Start the RSSI and take one single sample of the receive signal strength</description>
+ <addressOffset>0x014</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_RSSISTART</name>
+ <description>Start the RSSI and take one single sample of the receive signal strength</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_RSSISTOP</name>
+ <description>Stop the RSSI measurement</description>
+ <addressOffset>0x018</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_RSSISTOP</name>
+ <description>Stop the RSSI measurement</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_BCSTART</name>
+ <description>Start the bit counter</description>
+ <addressOffset>0x01C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_BCSTART</name>
+ <description>Start the bit counter</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_BCSTOP</name>
+ <description>Stop the bit counter</description>
+ <addressOffset>0x020</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_BCSTOP</name>
+ <description>Stop the bit counter</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_READY</name>
+ <description>RADIO has ramped up and is ready to be started</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_READY</name>
+ <description>RADIO has ramped up and is ready to be started</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ADDRESS</name>
+ <description>Address sent or received</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ADDRESS</name>
+ <description>Address sent or received</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_PAYLOAD</name>
+ <description>Packet payload sent or received</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_PAYLOAD</name>
+ <description>Packet payload sent or received</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_END</name>
+ <description>Packet sent or received</description>
+ <addressOffset>0x10C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_END</name>
+ <description>Packet sent or received</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_DISABLED</name>
+ <description>RADIO has been disabled</description>
+ <addressOffset>0x110</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_DISABLED</name>
+ <description>RADIO has been disabled</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_DEVMATCH</name>
+ <description>A device address match occurred on the last received packet</description>
+ <addressOffset>0x114</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_DEVMATCH</name>
+ <description>A device address match occurred on the last received packet</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_DEVMISS</name>
+ <description>No device address match occurred on the last received packet</description>
+ <addressOffset>0x118</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_DEVMISS</name>
+ <description>No device address match occurred on the last received packet</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RSSIEND</name>
+ <description>Sampling of receive signal strength complete</description>
+ <addressOffset>0x11C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RSSIEND</name>
+ <description>Sampling of receive signal strength complete</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_BCMATCH</name>
+ <description>Bit counter reached bit count value</description>
+ <addressOffset>0x128</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_BCMATCH</name>
+ <description>Bit counter reached bit count value</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_CRCOK</name>
+ <description>Packet received with CRC ok</description>
+ <addressOffset>0x130</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CRCOK</name>
+ <description>Packet received with CRC ok</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_CRCERROR</name>
+ <description>Packet received with CRC error</description>
+ <addressOffset>0x134</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CRCERROR</name>
+ <description>Packet received with CRC error</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_TXREADY</name>
+ <description>RADIO has ramped up and is ready to be started TX path</description>
+ <addressOffset>0x154</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TXREADY</name>
+ <description>RADIO has ramped up and is ready to be started TX path</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RXREADY</name>
+ <description>RADIO has ramped up and is ready to be started RX path</description>
+ <addressOffset>0x158</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RXREADY</name>
+ <description>RADIO has ramped up and is ready to be started RX path</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_MHRMATCH</name>
+ <description>MAC header match found</description>
+ <addressOffset>0x15C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_MHRMATCH</name>
+ <description>MAC header match found</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_PHYEND</name>
+ <description>Generated when last bit is sent on air</description>
+ <addressOffset>0x16C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_PHYEND</name>
+ <description>Generated when last bit is sent on air</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>READY_START</name>
+ <description>Shortcut between event READY and task START</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>END_DISABLE</name>
+ <description>Shortcut between event END and task DISABLE</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DISABLED_TXEN</name>
+ <description>Shortcut between event DISABLED and task TXEN</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DISABLED_RXEN</name>
+ <description>Shortcut between event DISABLED and task RXEN</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ADDRESS_RSSISTART</name>
+ <description>Shortcut between event ADDRESS and task RSSISTART</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>END_START</name>
+ <description>Shortcut between event END and task START</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ADDRESS_BCSTART</name>
+ <description>Shortcut between event ADDRESS and task BCSTART</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DISABLED_RSSISTOP</name>
+ <description>Shortcut between event DISABLED and task RSSISTOP</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXREADY_START</name>
+ <description>Shortcut between event TXREADY and task START</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXREADY_START</name>
+ <description>Shortcut between event RXREADY and task START</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PHYEND_DISABLE</name>
+ <description>Shortcut between event PHYEND and task DISABLE</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PHYEND_START</name>
+ <description>Shortcut between event PHYEND and task START</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>READY</name>
+ <description>Write '1' to enable interrupt for event READY</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ADDRESS</name>
+ <description>Write '1' to enable interrupt for event ADDRESS</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PAYLOAD</name>
+ <description>Write '1' to enable interrupt for event PAYLOAD</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>END</name>
+ <description>Write '1' to enable interrupt for event END</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DISABLED</name>
+ <description>Write '1' to enable interrupt for event DISABLED</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DEVMATCH</name>
+ <description>Write '1' to enable interrupt for event DEVMATCH</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DEVMISS</name>
+ <description>Write '1' to enable interrupt for event DEVMISS</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RSSIEND</name>
+ <description>Write '1' to enable interrupt for event RSSIEND</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>BCMATCH</name>
+ <description>Write '1' to enable interrupt for event BCMATCH</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CRCOK</name>
+ <description>Write '1' to enable interrupt for event CRCOK</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CRCERROR</name>
+ <description>Write '1' to enable interrupt for event CRCERROR</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXREADY</name>
+ <description>Write '1' to enable interrupt for event TXREADY</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXREADY</name>
+ <description>Write '1' to enable interrupt for event RXREADY</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>MHRMATCH</name>
+ <description>Write '1' to enable interrupt for event MHRMATCH</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PHYEND</name>
+ <description>Write '1' to enable interrupt for event PHYEND</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>READY</name>
+ <description>Write '1' to disable interrupt for event READY</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ADDRESS</name>
+ <description>Write '1' to disable interrupt for event ADDRESS</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PAYLOAD</name>
+ <description>Write '1' to disable interrupt for event PAYLOAD</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>END</name>
+ <description>Write '1' to disable interrupt for event END</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DISABLED</name>
+ <description>Write '1' to disable interrupt for event DISABLED</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DEVMATCH</name>
+ <description>Write '1' to disable interrupt for event DEVMATCH</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DEVMISS</name>
+ <description>Write '1' to disable interrupt for event DEVMISS</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RSSIEND</name>
+ <description>Write '1' to disable interrupt for event RSSIEND</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>BCMATCH</name>
+ <description>Write '1' to disable interrupt for event BCMATCH</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CRCOK</name>
+ <description>Write '1' to disable interrupt for event CRCOK</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CRCERROR</name>
+ <description>Write '1' to disable interrupt for event CRCERROR</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXREADY</name>
+ <description>Write '1' to disable interrupt for event TXREADY</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXREADY</name>
+ <description>Write '1' to disable interrupt for event RXREADY</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>MHRMATCH</name>
+ <description>Write '1' to disable interrupt for event MHRMATCH</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PHYEND</name>
+ <description>Write '1' to disable interrupt for event PHYEND</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CRCSTATUS</name>
+ <description>CRC status</description>
+ <addressOffset>0x400</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>CRCSTATUS</name>
+ <description>CRC status of packet received</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>CRCError</name>
+ <description>Packet received with CRC error</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>CRCOk</name>
+ <description>Packet received with CRC ok</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RXMATCH</name>
+ <description>Received address</description>
+ <addressOffset>0x408</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>RXMATCH</name>
+ <description>Received address</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RXCRC</name>
+ <description>CRC field of previously received packet</description>
+ <addressOffset>0x40C</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>RXCRC</name>
+ <description>CRC field of previously received packet</description>
+ <lsb>0</lsb>
+ <msb>23</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DAI</name>
+ <description>Device address match index</description>
+ <addressOffset>0x410</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>DAI</name>
+ <description>Device address match index</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PDUSTAT</name>
+ <description>Payload status</description>
+ <addressOffset>0x414</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>PDUSTAT</name>
+ <description>Status on payload length vs. PCNF1.MAXLEN</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>LessThan</name>
+ <description>Payload less than PCNF1.MAXLEN</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>GreaterThan</name>
+ <description>Payload greater than PCNF1.MAXLEN</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PACKETPTR</name>
+ <description>Packet pointer</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>PACKETPTR</name>
+ <description>Packet pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>FREQUENCY</name>
+ <description>Frequency</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000002</resetValue>
+ <fields>
+ <field>
+ <name>FREQUENCY</name>
+ <description>Radio channel frequency</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ </field>
+ <field>
+ <name>MAP</name>
+ <description>Channel map selection.</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Default</name>
+ <description>Channel map between 2400 MHZ .. 2500 MHz</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Channel map between 2360 MHZ .. 2460 MHz</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TXPOWER</name>
+ <description>Output power</description>
+ <addressOffset>0x50C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TXPOWER</name>
+ <description>RADIO output power</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Pos4dBm</name>
+ <description>+4 dBm</description>
+ <value>0x4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Pos3dBm</name>
+ <description>+3 dBm</description>
+ <value>0x3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>0dBm</name>
+ <description>0 dBm</description>
+ <value>0x0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Neg4dBm</name>
+ <description>-4 dBm</description>
+ <value>0xFC</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Neg8dBm</name>
+ <description>-8 dBm</description>
+ <value>0xF8</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Neg12dBm</name>
+ <description>-12 dBm</description>
+ <value>0xF4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Neg16dBm</name>
+ <description>-16 dBm</description>
+ <value>0xF0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Neg20dBm</name>
+ <description>-20 dBm</description>
+ <value>0xEC</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Neg30dBm</name>
+ <description>Deprecated enumerator - -40 dBm</description>
+ <value>0xE2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Neg40dBm</name>
+ <description>-40 dBm</description>
+ <value>0xD8</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MODE</name>
+ <description>Data rate and modulation</description>
+ <addressOffset>0x510</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MODE</name>
+ <description>Radio data rate and modulation setting. The radio supports frequency-shift keying (FSK) modulation.</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Nrf_1Mbit</name>
+ <description>1 Mbps Nordic proprietary radio mode</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Nrf_2Mbit</name>
+ <description>2 Mbps Nordic proprietary radio mode</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ble_1Mbit</name>
+ <description>1 Mbps BLE</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ble_2Mbit</name>
+ <description>2 Mbps BLE</description>
+ <value>4</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PCNF0</name>
+ <description>Packet configuration register 0</description>
+ <addressOffset>0x514</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LFLEN</name>
+ <description>Length on air of LENGTH field in number of bits.</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ </field>
+ <field>
+ <name>S0LEN</name>
+ <description>Length on air of S0 field in number of bytes.</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ </field>
+ <field>
+ <name>S1LEN</name>
+ <description>Length on air of S1 field in number of bits.</description>
+ <lsb>16</lsb>
+ <msb>19</msb>
+ </field>
+ <field>
+ <name>S1INCL</name>
+ <description>Include or exclude S1 field in RAM</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Automatic</name>
+ <description>Include S1 field in RAM only if S1LEN &gt; 0</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Always include S1 field in RAM independent of S1LEN</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PLEN</name>
+ <description>Length of preamble on air. Decision point: TASKS_START task</description>
+ <lsb>24</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>8bit</name>
+ <description>8-bit preamble</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>16bit</name>
+ <description>16-bit preamble</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CRCINC</name>
+ <description>Indicates if LENGTH field contains CRC or not</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>LENGTH does not contain CRC</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>LENGTH includes CRC</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PCNF1</name>
+ <description>Packet configuration register 1</description>
+ <addressOffset>0x518</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXLEN</name>
+ <description>Maximum length of packet payload. If the packet payload is larger than MAXLEN, the radio will truncate the payload to MAXLEN.</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ <field>
+ <name>STATLEN</name>
+ <description>Static length in number of bytes</description>
+ <lsb>8</lsb>
+ <msb>15</msb>
+ </field>
+ <field>
+ <name>BALEN</name>
+ <description>Base address length in number of bytes</description>
+ <lsb>16</lsb>
+ <msb>18</msb>
+ </field>
+ <field>
+ <name>ENDIAN</name>
+ <description>On-air endianness of packet, this applies to the S0, LENGTH, S1, and the PAYLOAD fields.</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Little</name>
+ <description>Least significant bit on air first</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Big</name>
+ <description>Most significant bit on air first</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>WHITEEN</name>
+ <description>Enable or disable packet whitening</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>BASE0</name>
+ <description>Base address 0</description>
+ <addressOffset>0x51C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>BASE0</name>
+ <description>Base address 0</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>BASE1</name>
+ <description>Base address 1</description>
+ <addressOffset>0x520</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>BASE1</name>
+ <description>Base address 1</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PREFIX0</name>
+ <description>Prefixes bytes for logical addresses 0-3</description>
+ <addressOffset>0x524</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>AP0</name>
+ <description>Address prefix 0.</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ <field>
+ <name>AP1</name>
+ <description>Address prefix 1.</description>
+ <lsb>8</lsb>
+ <msb>15</msb>
+ </field>
+ <field>
+ <name>AP2</name>
+ <description>Address prefix 2.</description>
+ <lsb>16</lsb>
+ <msb>23</msb>
+ </field>
+ <field>
+ <name>AP3</name>
+ <description>Address prefix 3.</description>
+ <lsb>24</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PREFIX1</name>
+ <description>Prefixes bytes for logical addresses 4-7</description>
+ <addressOffset>0x528</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>AP4</name>
+ <description>Address prefix 4.</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ <field>
+ <name>AP5</name>
+ <description>Address prefix 5.</description>
+ <lsb>8</lsb>
+ <msb>15</msb>
+ </field>
+ <field>
+ <name>AP6</name>
+ <description>Address prefix 6.</description>
+ <lsb>16</lsb>
+ <msb>23</msb>
+ </field>
+ <field>
+ <name>AP7</name>
+ <description>Address prefix 7.</description>
+ <lsb>24</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TXADDRESS</name>
+ <description>Transmit address select</description>
+ <addressOffset>0x52C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TXADDRESS</name>
+ <description>Transmit address select</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RXADDRESSES</name>
+ <description>Receive address select</description>
+ <addressOffset>0x530</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ADDR0</name>
+ <description>Enable or disable reception on logical address 0.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ADDR1</name>
+ <description>Enable or disable reception on logical address 1.</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ADDR2</name>
+ <description>Enable or disable reception on logical address 2.</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ADDR3</name>
+ <description>Enable or disable reception on logical address 3.</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ADDR4</name>
+ <description>Enable or disable reception on logical address 4.</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ADDR5</name>
+ <description>Enable or disable reception on logical address 5.</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ADDR6</name>
+ <description>Enable or disable reception on logical address 6.</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ADDR7</name>
+ <description>Enable or disable reception on logical address 7.</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CRCCNF</name>
+ <description>CRC configuration</description>
+ <addressOffset>0x534</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LEN</name>
+ <description>CRC length in number of bytes.</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>CRC length is zero and CRC calculation is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>One</name>
+ <description>CRC length is one byte and CRC calculation is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Two</name>
+ <description>CRC length is two bytes and CRC calculation is enabled</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Three</name>
+ <description>CRC length is three bytes and CRC calculation is enabled</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SKIPADDR</name>
+ <description>Include or exclude packet address field out of CRC calculation.</description>
+ <lsb>8</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>CRC calculation includes address field</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Skip</name>
+ <description>CRC calculation does not include address field. The CRC calculation will start at the first byte after the address.</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CRCPOLY</name>
+ <description>CRC polynomial</description>
+ <addressOffset>0x538</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>CRCPOLY</name>
+ <description>CRC polynomial</description>
+ <lsb>0</lsb>
+ <msb>23</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CRCINIT</name>
+ <description>CRC initial value</description>
+ <addressOffset>0x53C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CRCINIT</name>
+ <description>CRC initial value</description>
+ <lsb>0</lsb>
+ <msb>23</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TIFS</name>
+ <description>Interframe spacing in us</description>
+ <addressOffset>0x544</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TIFS</name>
+ <description>Interframe spacing in us</description>
+ <lsb>0</lsb>
+ <msb>9</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RSSISAMPLE</name>
+ <description>RSSI sample</description>
+ <addressOffset>0x548</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>RSSISAMPLE</name>
+ <description>RSSI sample</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>STATE</name>
+ <description>Current radio state</description>
+ <addressOffset>0x550</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>STATE</name>
+ <description>Current radio state</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>RADIO is in the Disabled state</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>RxRu</name>
+ <description>RADIO is in the RXRU state</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>RxIdle</name>
+ <description>RADIO is in the RXIDLE state</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Rx</name>
+ <description>RADIO is in the RX state</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>RxDisable</name>
+ <description>RADIO is in the RXDISABLED state</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>TxRu</name>
+ <description>RADIO is in the TXRU state</description>
+ <value>9</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>TxIdle</name>
+ <description>RADIO is in the TXIDLE state</description>
+ <value>10</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Tx</name>
+ <description>RADIO is in the TX state</description>
+ <value>11</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>TxDisable</name>
+ <description>RADIO is in the TXDISABLED state</description>
+ <value>12</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DATAWHITEIV</name>
+ <description>Data whitening initial value</description>
+ <addressOffset>0x554</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000040</resetValue>
+ <fields>
+ <field>
+ <name>DATAWHITEIV</name>
+ <description>Data whitening initial value. Bit 6 is hardwired to '1', writing '0' to it has no effect, and it will always be read back and used by the device as '1'.</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>BCC</name>
+ <description>Bit counter compare</description>
+ <addressOffset>0x560</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>BCC</name>
+ <description>Bit counter compare</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>DAB[%s]</name>
+ <description>Description collection: Device address base segment n</description>
+ <addressOffset>0x600</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>DAB</name>
+ <description>Device address base segment n</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>DAP[%s]</name>
+ <description>Description collection: Device address prefix n</description>
+ <addressOffset>0x620</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>DAP</name>
+ <description>Device address prefix n</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DACNF</name>
+ <description>Device address match configuration</description>
+ <addressOffset>0x640</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENA0</name>
+ <description>Enable or disable device address matching using device address 0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENA1</name>
+ <description>Enable or disable device address matching using device address 1</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENA2</name>
+ <description>Enable or disable device address matching using device address 2</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENA3</name>
+ <description>Enable or disable device address matching using device address 3</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENA4</name>
+ <description>Enable or disable device address matching using device address 4</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENA5</name>
+ <description>Enable or disable device address matching using device address 5</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENA6</name>
+ <description>Enable or disable device address matching using device address 6</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENA7</name>
+ <description>Enable or disable device address matching using device address 7</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXADD0</name>
+ <description>TxAdd for device address 0</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ </field>
+ <field>
+ <name>TXADD1</name>
+ <description>TxAdd for device address 1</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ </field>
+ <field>
+ <name>TXADD2</name>
+ <description>TxAdd for device address 2</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ </field>
+ <field>
+ <name>TXADD3</name>
+ <description>TxAdd for device address 3</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ </field>
+ <field>
+ <name>TXADD4</name>
+ <description>TxAdd for device address 4</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ </field>
+ <field>
+ <name>TXADD5</name>
+ <description>TxAdd for device address 5</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ </field>
+ <field>
+ <name>TXADD6</name>
+ <description>TxAdd for device address 6</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ </field>
+ <field>
+ <name>TXADD7</name>
+ <description>TxAdd for device address 7</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MODECNF0</name>
+ <description>Radio mode configuration register 0</description>
+ <addressOffset>0x650</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000200</resetValue>
+ <fields>
+ <field>
+ <name>RU</name>
+ <description>Radio ramp-up time</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Default</name>
+ <description>Default ramp-up time (tRXEN and tTXEN), compatible with firmware written for nRF51</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Fast</name>
+ <description>Fast ramp-up (tRXEN,FAST and tTXEN,FAST), see electrical specification for more information</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DTX</name>
+ <description>Default TX value</description>
+ <lsb>8</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>B1</name>
+ <description>Transmit '1'</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>B0</name>
+ <description>Transmit '0'</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Center</name>
+ <description>Transmit center frequency</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>POWER</name>
+ <description>Peripheral power control</description>
+ <addressOffset>0xFFC</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>POWER</name>
+ <description>Peripheral power control. The peripheral and its registers will be reset to its initial state by switching the peripheral off and then back on again.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Peripheral is powered off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Peripheral is powered on</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>UART0</name>
+ <description>Universal Asynchronous Receiver/Transmitter</description>
+ <baseAddress>0x40002000</baseAddress>
+ <headerStructName>UART</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>UARTE0_UART0</name>
+ <value>2</value>
+ </interrupt>
+ <groupName>UART</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_STARTRX</name>
+ <description>Start UART receiver</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STARTRX</name>
+ <description>Start UART receiver</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOPRX</name>
+ <description>Stop UART receiver</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOPRX</name>
+ <description>Stop UART receiver</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STARTTX</name>
+ <description>Start UART transmitter</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STARTTX</name>
+ <description>Start UART transmitter</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOPTX</name>
+ <description>Stop UART transmitter</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOPTX</name>
+ <description>Stop UART transmitter</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_SUSPEND</name>
+ <description>Suspend UART</description>
+ <addressOffset>0x01C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_SUSPEND</name>
+ <description>Suspend UART</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_CTS</name>
+ <description>CTS is activated (set low). Clear To Send.</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CTS</name>
+ <description>CTS is activated (set low). Clear To Send.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_NCTS</name>
+ <description>CTS is deactivated (set high). Not Clear To Send.</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_NCTS</name>
+ <description>CTS is deactivated (set high). Not Clear To Send.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RXDRDY</name>
+ <description>Data received in RXD</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RXDRDY</name>
+ <description>Data received in RXD</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_TXDRDY</name>
+ <description>Data sent from TXD</description>
+ <addressOffset>0x11C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TXDRDY</name>
+ <description>Data sent from TXD</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ERROR</name>
+ <description>Error detected</description>
+ <addressOffset>0x124</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ERROR</name>
+ <description>Error detected</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RXTO</name>
+ <description>Receiver timeout</description>
+ <addressOffset>0x144</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RXTO</name>
+ <description>Receiver timeout</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CTS_STARTRX</name>
+ <description>Shortcut between event CTS and task STARTRX</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>NCTS_STOPRX</name>
+ <description>Shortcut between event NCTS and task STOPRX</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CTS</name>
+ <description>Write '1' to enable interrupt for event CTS</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>NCTS</name>
+ <description>Write '1' to enable interrupt for event NCTS</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXDRDY</name>
+ <description>Write '1' to enable interrupt for event RXDRDY</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXDRDY</name>
+ <description>Write '1' to enable interrupt for event TXDRDY</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Write '1' to enable interrupt for event ERROR</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXTO</name>
+ <description>Write '1' to enable interrupt for event RXTO</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CTS</name>
+ <description>Write '1' to disable interrupt for event CTS</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>NCTS</name>
+ <description>Write '1' to disable interrupt for event NCTS</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXDRDY</name>
+ <description>Write '1' to disable interrupt for event RXDRDY</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXDRDY</name>
+ <description>Write '1' to disable interrupt for event TXDRDY</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Write '1' to disable interrupt for event ERROR</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXTO</name>
+ <description>Write '1' to disable interrupt for event RXTO</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ERRORSRC</name>
+ <description>Error source</description>
+ <addressOffset>0x480</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToClear</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>OVERRUN</name>
+ <description>Overrun error</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: error present</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PARITY</name>
+ <description>Parity error</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: error present</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>FRAMING</name>
+ <description>Framing error occurred</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: error present</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>BREAK</name>
+ <description>Break condition</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: error present</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>Enable UART</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable UART</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable UART</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable UART</description>
+ <value>4</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>PSEL</name>
+ <description>Unspecified</description>
+ <headerStructName>UART_PSEL</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x508</addressOffset>
+ <register>
+ <name>RTS</name>
+ <description>Pin select for RTS</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TXD</name>
+ <description>Pin select for TXD</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CTS</name>
+ <description>Pin select for CTS</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RXD</name>
+ <description>Pin select for RXD</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>RXD</name>
+ <description>RXD register</description>
+ <addressOffset>0x518</addressOffset>
+ <access>read-only</access>
+ <readAction>modifyExternal</readAction>
+ <fields>
+ <field>
+ <name>RXD</name>
+ <description>RX data received in previous transfers, double buffered</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TXD</name>
+ <description>TXD register</description>
+ <addressOffset>0x51C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TXD</name>
+ <description>TX data to be transferred</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>BAUDRATE</name>
+ <description>Baud rate. Accuracy depends on the HFCLK source selected.</description>
+ <addressOffset>0x524</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x04000000</resetValue>
+ <fields>
+ <field>
+ <name>BAUDRATE</name>
+ <description>Baud rate</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Baud1200</name>
+ <description>1200 baud (actual rate: 1205)</description>
+ <value>0x0004F000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud2400</name>
+ <description>2400 baud (actual rate: 2396)</description>
+ <value>0x0009D000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud4800</name>
+ <description>4800 baud (actual rate: 4808)</description>
+ <value>0x0013B000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud9600</name>
+ <description>9600 baud (actual rate: 9598)</description>
+ <value>0x00275000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud14400</name>
+ <description>14400 baud (actual rate: 14414)</description>
+ <value>0x003B0000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud19200</name>
+ <description>19200 baud (actual rate: 19208)</description>
+ <value>0x004EA000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud28800</name>
+ <description>28800 baud (actual rate: 28829)</description>
+ <value>0x0075F000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud31250</name>
+ <description>31250 baud</description>
+ <value>0x00800000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud38400</name>
+ <description>38400 baud (actual rate: 38462)</description>
+ <value>0x009D5000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud56000</name>
+ <description>56000 baud (actual rate: 55944)</description>
+ <value>0x00E50000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud57600</name>
+ <description>57600 baud (actual rate: 57762)</description>
+ <value>0x00EBF000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud76800</name>
+ <description>76800 baud (actual rate: 76923)</description>
+ <value>0x013A9000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud115200</name>
+ <description>115200 baud (actual rate: 115942)</description>
+ <value>0x01D7E000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud230400</name>
+ <description>230400 baud (actual rate: 231884)</description>
+ <value>0x03AFB000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud250000</name>
+ <description>250000 baud</description>
+ <value>0x04000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud460800</name>
+ <description>460800 baud (actual rate: 470588)</description>
+ <value>0x075F7000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud921600</name>
+ <description>921600 baud (actual rate: 941176)</description>
+ <value>0x0EBED000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud1M</name>
+ <description>1Mega baud</description>
+ <value>0x10000000</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CONFIG</name>
+ <description>Configuration of parity and hardware flow control</description>
+ <addressOffset>0x56C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>HWFC</name>
+ <description>Hardware flow control</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PARITY</name>
+ <description>Parity</description>
+ <lsb>1</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude parity bit</description>
+ <value>0x0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include parity bit</description>
+ <value>0x7</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STOP</name>
+ <description>Stop bits</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>One</name>
+ <description>One stop bit</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Two</name>
+ <description>Two stop bits</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>UARTE0</name>
+ <description>UART with EasyDMA</description>
+ <baseAddress>0x40002000</baseAddress>
+ <alternatePeripheral>UART0</alternatePeripheral>
+ <headerStructName>UARTE</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>UARTE0_UART0</name>
+ <value>2</value>
+ </interrupt>
+ <groupName>UARTE</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_STARTRX</name>
+ <description>Start UART receiver</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STARTRX</name>
+ <description>Start UART receiver</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOPRX</name>
+ <description>Stop UART receiver</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOPRX</name>
+ <description>Stop UART receiver</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STARTTX</name>
+ <description>Start UART transmitter</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STARTTX</name>
+ <description>Start UART transmitter</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOPTX</name>
+ <description>Stop UART transmitter</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOPTX</name>
+ <description>Stop UART transmitter</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_FLUSHRX</name>
+ <description>Flush RX FIFO into RX buffer</description>
+ <addressOffset>0x02C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_FLUSHRX</name>
+ <description>Flush RX FIFO into RX buffer</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_CTS</name>
+ <description>CTS is activated (set low). Clear To Send.</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CTS</name>
+ <description>CTS is activated (set low). Clear To Send.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_NCTS</name>
+ <description>CTS is deactivated (set high). Not Clear To Send.</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_NCTS</name>
+ <description>CTS is deactivated (set high). Not Clear To Send.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RXDRDY</name>
+ <description>Data received in RXD (but potentially not yet transferred to Data RAM)</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RXDRDY</name>
+ <description>Data received in RXD (but potentially not yet transferred to Data RAM)</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ENDRX</name>
+ <description>Receive buffer is filled up</description>
+ <addressOffset>0x110</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ENDRX</name>
+ <description>Receive buffer is filled up</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_TXDRDY</name>
+ <description>Data sent from TXD</description>
+ <addressOffset>0x11C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TXDRDY</name>
+ <description>Data sent from TXD</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ENDTX</name>
+ <description>Last TX byte transmitted</description>
+ <addressOffset>0x120</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ENDTX</name>
+ <description>Last TX byte transmitted</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ERROR</name>
+ <description>Error detected</description>
+ <addressOffset>0x124</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ERROR</name>
+ <description>Error detected</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RXTO</name>
+ <description>Receiver timeout</description>
+ <addressOffset>0x144</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RXTO</name>
+ <description>Receiver timeout</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RXSTARTED</name>
+ <description>UART receiver has started</description>
+ <addressOffset>0x14C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RXSTARTED</name>
+ <description>UART receiver has started</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_TXSTARTED</name>
+ <description>UART transmitter has started</description>
+ <addressOffset>0x150</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TXSTARTED</name>
+ <description>UART transmitter has started</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_TXSTOPPED</name>
+ <description>Transmitter stopped</description>
+ <addressOffset>0x158</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TXSTOPPED</name>
+ <description>Transmitter stopped</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENDRX_STARTRX</name>
+ <description>Shortcut between event ENDRX and task STARTRX</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDRX_STOPRX</name>
+ <description>Shortcut between event ENDRX and task STOPRX</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTEN</name>
+ <description>Enable or disable interrupt</description>
+ <addressOffset>0x300</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CTS</name>
+ <description>Enable or disable interrupt for event CTS</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>NCTS</name>
+ <description>Enable or disable interrupt for event NCTS</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXDRDY</name>
+ <description>Enable or disable interrupt for event RXDRDY</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDRX</name>
+ <description>Enable or disable interrupt for event ENDRX</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXDRDY</name>
+ <description>Enable or disable interrupt for event TXDRDY</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDTX</name>
+ <description>Enable or disable interrupt for event ENDTX</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Enable or disable interrupt for event ERROR</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXTO</name>
+ <description>Enable or disable interrupt for event RXTO</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXSTARTED</name>
+ <description>Enable or disable interrupt for event RXSTARTED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXSTARTED</name>
+ <description>Enable or disable interrupt for event TXSTARTED</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXSTOPPED</name>
+ <description>Enable or disable interrupt for event TXSTOPPED</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CTS</name>
+ <description>Write '1' to enable interrupt for event CTS</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>NCTS</name>
+ <description>Write '1' to enable interrupt for event NCTS</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXDRDY</name>
+ <description>Write '1' to enable interrupt for event RXDRDY</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDRX</name>
+ <description>Write '1' to enable interrupt for event ENDRX</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXDRDY</name>
+ <description>Write '1' to enable interrupt for event TXDRDY</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDTX</name>
+ <description>Write '1' to enable interrupt for event ENDTX</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Write '1' to enable interrupt for event ERROR</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXTO</name>
+ <description>Write '1' to enable interrupt for event RXTO</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXSTARTED</name>
+ <description>Write '1' to enable interrupt for event RXSTARTED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXSTARTED</name>
+ <description>Write '1' to enable interrupt for event TXSTARTED</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXSTOPPED</name>
+ <description>Write '1' to enable interrupt for event TXSTOPPED</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CTS</name>
+ <description>Write '1' to disable interrupt for event CTS</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>NCTS</name>
+ <description>Write '1' to disable interrupt for event NCTS</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXDRDY</name>
+ <description>Write '1' to disable interrupt for event RXDRDY</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDRX</name>
+ <description>Write '1' to disable interrupt for event ENDRX</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXDRDY</name>
+ <description>Write '1' to disable interrupt for event TXDRDY</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDTX</name>
+ <description>Write '1' to disable interrupt for event ENDTX</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Write '1' to disable interrupt for event ERROR</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXTO</name>
+ <description>Write '1' to disable interrupt for event RXTO</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXSTARTED</name>
+ <description>Write '1' to disable interrupt for event RXSTARTED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXSTARTED</name>
+ <description>Write '1' to disable interrupt for event TXSTARTED</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXSTOPPED</name>
+ <description>Write '1' to disable interrupt for event TXSTOPPED</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ERRORSRC</name>
+ <description>Error source Note : this register is read / write one to clear.</description>
+ <addressOffset>0x480</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToClear</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>OVERRUN</name>
+ <description>Overrun error</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: error present</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PARITY</name>
+ <description>Parity error</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: error present</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>FRAMING</name>
+ <description>Framing error occurred</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: error present</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>BREAK</name>
+ <description>Break condition</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: error present</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>Enable UART</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable UARTE</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable UARTE</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable UARTE</description>
+ <value>8</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>PSEL</name>
+ <description>Unspecified</description>
+ <headerStructName>UARTE_PSEL</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x508</addressOffset>
+ <register>
+ <name>RTS</name>
+ <description>Pin select for RTS signal</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TXD</name>
+ <description>Pin select for TXD signal</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CTS</name>
+ <description>Pin select for CTS signal</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RXD</name>
+ <description>Pin select for RXD signal</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>BAUDRATE</name>
+ <description>Baud rate. Accuracy depends on the HFCLK source selected.</description>
+ <addressOffset>0x524</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x04000000</resetValue>
+ <fields>
+ <field>
+ <name>BAUDRATE</name>
+ <description>Baud rate</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Baud1200</name>
+ <description>1200 baud (actual rate: 1205)</description>
+ <value>0x0004F000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud2400</name>
+ <description>2400 baud (actual rate: 2396)</description>
+ <value>0x0009D000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud4800</name>
+ <description>4800 baud (actual rate: 4808)</description>
+ <value>0x0013B000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud9600</name>
+ <description>9600 baud (actual rate: 9598)</description>
+ <value>0x00275000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud14400</name>
+ <description>14400 baud (actual rate: 14401)</description>
+ <value>0x003AF000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud19200</name>
+ <description>19200 baud (actual rate: 19208)</description>
+ <value>0x004EA000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud28800</name>
+ <description>28800 baud (actual rate: 28777)</description>
+ <value>0x0075C000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud31250</name>
+ <description>31250 baud</description>
+ <value>0x00800000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud38400</name>
+ <description>38400 baud (actual rate: 38369)</description>
+ <value>0x009D0000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud56000</name>
+ <description>56000 baud (actual rate: 55944)</description>
+ <value>0x00E50000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud57600</name>
+ <description>57600 baud (actual rate: 57554)</description>
+ <value>0x00EB0000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud76800</name>
+ <description>76800 baud (actual rate: 76923)</description>
+ <value>0x013A9000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud115200</name>
+ <description>115200 baud (actual rate: 115108)</description>
+ <value>0x01D60000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud230400</name>
+ <description>230400 baud (actual rate: 231884)</description>
+ <value>0x03B00000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud250000</name>
+ <description>250000 baud</description>
+ <value>0x04000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud460800</name>
+ <description>460800 baud (actual rate: 457143)</description>
+ <value>0x07400000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud921600</name>
+ <description>921600 baud (actual rate: 941176)</description>
+ <value>0x0F000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud1M</name>
+ <description>1Mega baud</description>
+ <value>0x10000000</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>RXD</name>
+ <description>RXD EasyDMA channel</description>
+ <headerStructName>UARTE_RXD</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x534</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in receive buffer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in receive buffer</description>
+ <lsb>0</lsb>
+ <msb>9</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction</description>
+ <lsb>0</lsb>
+ <msb>9</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>TXD</name>
+ <description>TXD EasyDMA channel</description>
+ <headerStructName>UARTE_TXD</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x544</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in transmit buffer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in transmit buffer</description>
+ <lsb>0</lsb>
+ <msb>9</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction</description>
+ <lsb>0</lsb>
+ <msb>9</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>CONFIG</name>
+ <description>Configuration of parity and hardware flow control</description>
+ <addressOffset>0x56C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>HWFC</name>
+ <description>Hardware flow control</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PARITY</name>
+ <description>Parity</description>
+ <lsb>1</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude parity bit</description>
+ <value>0x0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include even parity bit</description>
+ <value>0x7</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STOP</name>
+ <description>Stop bits</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>One</name>
+ <description>One stop bit</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Two</name>
+ <description>Two stop bits</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>TWI0</name>
+ <description>I2C compatible Two-Wire Interface</description>
+ <baseAddress>0x40003000</baseAddress>
+ <headerStructName>TWI</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>TWIM0_TWIS0_TWI0</name>
+ <value>3</value>
+ </interrupt>
+ <groupName>TWI</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_STARTRX</name>
+ <description>Start TWI receive sequence</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STARTRX</name>
+ <description>Start TWI receive sequence</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STARTTX</name>
+ <description>Start TWI transmit sequence</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STARTTX</name>
+ <description>Start TWI transmit sequence</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stop TWI transaction</description>
+ <addressOffset>0x014</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stop TWI transaction</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_SUSPEND</name>
+ <description>Suspend TWI transaction</description>
+ <addressOffset>0x01C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_SUSPEND</name>
+ <description>Suspend TWI transaction</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_RESUME</name>
+ <description>Resume TWI transaction</description>
+ <addressOffset>0x020</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_RESUME</name>
+ <description>Resume TWI transaction</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_STOPPED</name>
+ <description>TWI stopped</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_STOPPED</name>
+ <description>TWI stopped</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RXDREADY</name>
+ <description>TWI RXD byte received</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RXDREADY</name>
+ <description>TWI RXD byte received</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_TXDSENT</name>
+ <description>TWI TXD byte sent</description>
+ <addressOffset>0x11C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TXDSENT</name>
+ <description>TWI TXD byte sent</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ERROR</name>
+ <description>TWI error</description>
+ <addressOffset>0x124</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ERROR</name>
+ <description>TWI error</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_BB</name>
+ <description>TWI byte boundary, generated before each byte that is sent or received</description>
+ <addressOffset>0x138</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_BB</name>
+ <description>TWI byte boundary, generated before each byte that is sent or received</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_SUSPENDED</name>
+ <description>TWI entered the suspended state</description>
+ <addressOffset>0x148</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_SUSPENDED</name>
+ <description>TWI entered the suspended state</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>BB_SUSPEND</name>
+ <description>Shortcut between event BB and task SUSPEND</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>BB_STOP</name>
+ <description>Shortcut between event BB and task STOP</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to enable interrupt for event STOPPED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXDREADY</name>
+ <description>Write '1' to enable interrupt for event RXDREADY</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXDSENT</name>
+ <description>Write '1' to enable interrupt for event TXDSENT</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Write '1' to enable interrupt for event ERROR</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>BB</name>
+ <description>Write '1' to enable interrupt for event BB</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SUSPENDED</name>
+ <description>Write '1' to enable interrupt for event SUSPENDED</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to disable interrupt for event STOPPED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXDREADY</name>
+ <description>Write '1' to disable interrupt for event RXDREADY</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXDSENT</name>
+ <description>Write '1' to disable interrupt for event TXDSENT</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Write '1' to disable interrupt for event ERROR</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>BB</name>
+ <description>Write '1' to disable interrupt for event BB</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SUSPENDED</name>
+ <description>Write '1' to disable interrupt for event SUSPENDED</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ERRORSRC</name>
+ <description>Error source</description>
+ <addressOffset>0x4C4</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToClear</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>OVERRUN</name>
+ <description>Overrun error</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: no overrun occured</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: overrun occured</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ANACK</name>
+ <description>NACK received after sending the address (write '1' to clear)</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: error present</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DNACK</name>
+ <description>NACK received after sending a data byte (write '1' to clear)</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: error present</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>Enable TWI</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable TWI</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable TWI</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable TWI</description>
+ <value>5</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>PSEL</name>
+ <description>Unspecified</description>
+ <headerStructName>TWI_PSEL</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x508</addressOffset>
+ <register>
+ <name>SCL</name>
+ <description>Pin select for SCL</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SDA</name>
+ <description>Pin select for SDA</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>RXD</name>
+ <description>RXD register</description>
+ <addressOffset>0x518</addressOffset>
+ <access>read-only</access>
+ <readAction>modifyExternal</readAction>
+ <fields>
+ <field>
+ <name>RXD</name>
+ <description>RXD register</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TXD</name>
+ <description>TXD register</description>
+ <addressOffset>0x51C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TXD</name>
+ <description>TXD register</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>FREQUENCY</name>
+ <description>TWI frequency. Accuracy depends on the HFCLK source selected.</description>
+ <addressOffset>0x524</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x04000000</resetValue>
+ <fields>
+ <field>
+ <name>FREQUENCY</name>
+ <description>TWI master clock frequency</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>K100</name>
+ <description>100 kbps</description>
+ <value>0x01980000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>K250</name>
+ <description>250 kbps</description>
+ <value>0x04000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>K400</name>
+ <description>400 kbps (actual rate 410.256 kbps)</description>
+ <value>0x06680000</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ADDRESS</name>
+ <description>Address used in the TWI transfer</description>
+ <addressOffset>0x588</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ADDRESS</name>
+ <description>Address used in the TWI transfer</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>TWIM0</name>
+ <description>I2C compatible Two-Wire Master Interface with EasyDMA</description>
+ <baseAddress>0x40003000</baseAddress>
+ <alternatePeripheral>TWI0</alternatePeripheral>
+ <headerStructName>TWIM</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>TWIM0_TWIS0_TWI0</name>
+ <value>3</value>
+ </interrupt>
+ <groupName>TWIM</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_STARTRX</name>
+ <description>Start TWI receive sequence</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STARTRX</name>
+ <description>Start TWI receive sequence</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STARTTX</name>
+ <description>Start TWI transmit sequence</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STARTTX</name>
+ <description>Start TWI transmit sequence</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stop TWI transaction. Must be issued while the TWI master is not suspended.</description>
+ <addressOffset>0x014</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stop TWI transaction. Must be issued while the TWI master is not suspended.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_SUSPEND</name>
+ <description>Suspend TWI transaction</description>
+ <addressOffset>0x01C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_SUSPEND</name>
+ <description>Suspend TWI transaction</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_RESUME</name>
+ <description>Resume TWI transaction</description>
+ <addressOffset>0x020</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_RESUME</name>
+ <description>Resume TWI transaction</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_STOPPED</name>
+ <description>TWI stopped</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_STOPPED</name>
+ <description>TWI stopped</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ERROR</name>
+ <description>TWI error</description>
+ <addressOffset>0x124</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ERROR</name>
+ <description>TWI error</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_SUSPENDED</name>
+ <description>Last byte has been sent out after the SUSPEND task has been issued, TWI traffic is now suspended.</description>
+ <addressOffset>0x148</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_SUSPENDED</name>
+ <description>Last byte has been sent out after the SUSPEND task has been issued, TWI traffic is now suspended.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RXSTARTED</name>
+ <description>Receive sequence started</description>
+ <addressOffset>0x14C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RXSTARTED</name>
+ <description>Receive sequence started</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_TXSTARTED</name>
+ <description>Transmit sequence started</description>
+ <addressOffset>0x150</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TXSTARTED</name>
+ <description>Transmit sequence started</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_LASTRX</name>
+ <description>Byte boundary, starting to receive the last byte</description>
+ <addressOffset>0x15C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_LASTRX</name>
+ <description>Byte boundary, starting to receive the last byte</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_LASTTX</name>
+ <description>Byte boundary, starting to transmit the last byte</description>
+ <addressOffset>0x160</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_LASTTX</name>
+ <description>Byte boundary, starting to transmit the last byte</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LASTTX_STARTRX</name>
+ <description>Shortcut between event LASTTX and task STARTRX</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LASTTX_SUSPEND</name>
+ <description>Shortcut between event LASTTX and task SUSPEND</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LASTTX_STOP</name>
+ <description>Shortcut between event LASTTX and task STOP</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LASTRX_STARTTX</name>
+ <description>Shortcut between event LASTRX and task STARTTX</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LASTRX_SUSPEND</name>
+ <description>Shortcut between event LASTRX and task SUSPEND</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LASTRX_STOP</name>
+ <description>Shortcut between event LASTRX and task STOP</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTEN</name>
+ <description>Enable or disable interrupt</description>
+ <addressOffset>0x300</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STOPPED</name>
+ <description>Enable or disable interrupt for event STOPPED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Enable or disable interrupt for event ERROR</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SUSPENDED</name>
+ <description>Enable or disable interrupt for event SUSPENDED</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXSTARTED</name>
+ <description>Enable or disable interrupt for event RXSTARTED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXSTARTED</name>
+ <description>Enable or disable interrupt for event TXSTARTED</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LASTRX</name>
+ <description>Enable or disable interrupt for event LASTRX</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LASTTX</name>
+ <description>Enable or disable interrupt for event LASTTX</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to enable interrupt for event STOPPED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Write '1' to enable interrupt for event ERROR</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SUSPENDED</name>
+ <description>Write '1' to enable interrupt for event SUSPENDED</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXSTARTED</name>
+ <description>Write '1' to enable interrupt for event RXSTARTED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXSTARTED</name>
+ <description>Write '1' to enable interrupt for event TXSTARTED</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LASTRX</name>
+ <description>Write '1' to enable interrupt for event LASTRX</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LASTTX</name>
+ <description>Write '1' to enable interrupt for event LASTTX</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to disable interrupt for event STOPPED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Write '1' to disable interrupt for event ERROR</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SUSPENDED</name>
+ <description>Write '1' to disable interrupt for event SUSPENDED</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXSTARTED</name>
+ <description>Write '1' to disable interrupt for event RXSTARTED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXSTARTED</name>
+ <description>Write '1' to disable interrupt for event TXSTARTED</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LASTRX</name>
+ <description>Write '1' to disable interrupt for event LASTRX</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LASTTX</name>
+ <description>Write '1' to disable interrupt for event LASTTX</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ERRORSRC</name>
+ <description>Error source</description>
+ <addressOffset>0x4C4</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToClear</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>OVERRUN</name>
+ <description>Overrun error</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotReceived</name>
+ <description>Error did not occur</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Received</name>
+ <description>Error occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ANACK</name>
+ <description>NACK received after sending the address (write '1' to clear)</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotReceived</name>
+ <description>Error did not occur</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Received</name>
+ <description>Error occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DNACK</name>
+ <description>NACK received after sending a data byte (write '1' to clear)</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotReceived</name>
+ <description>Error did not occur</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Received</name>
+ <description>Error occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>Enable TWIM</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable TWIM</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable TWIM</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable TWIM</description>
+ <value>6</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>PSEL</name>
+ <description>Unspecified</description>
+ <headerStructName>TWIM_PSEL</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x508</addressOffset>
+ <register>
+ <name>SCL</name>
+ <description>Pin select for SCL signal</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SDA</name>
+ <description>Pin select for SDA signal</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>FREQUENCY</name>
+ <description>TWI frequency. Accuracy depends on the HFCLK source selected.</description>
+ <addressOffset>0x524</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x04000000</resetValue>
+ <fields>
+ <field>
+ <name>FREQUENCY</name>
+ <description>TWI master clock frequency</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>K100</name>
+ <description>100 kbps</description>
+ <value>0x01980000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>K250</name>
+ <description>250 kbps</description>
+ <value>0x04000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>K400</name>
+ <description>400 kbps</description>
+ <value>0x06400000</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>RXD</name>
+ <description>RXD EasyDMA channel</description>
+ <headerStructName>TWIM_RXD</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x534</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in receive buffer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in receive buffer</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction. In case of NACK error, includes the NACK'ed byte.</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LIST</name>
+ <description>EasyDMA list type</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LIST</name>
+ <description>List type</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable EasyDMA list</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ArrayList</name>
+ <description>Use array list</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>TXD</name>
+ <description>TXD EasyDMA channel</description>
+ <headerStructName>TWIM_TXD</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x544</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in transmit buffer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in transmit buffer</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction. In case of NACK error, includes the NACK'ed byte.</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LIST</name>
+ <description>EasyDMA list type</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LIST</name>
+ <description>List type</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable EasyDMA list</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ArrayList</name>
+ <description>Use array list</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>ADDRESS</name>
+ <description>Address used in the TWI transfer</description>
+ <addressOffset>0x588</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ADDRESS</name>
+ <description>Address used in the TWI transfer</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>TWIS0</name>
+ <description>I2C compatible Two-Wire Slave Interface with EasyDMA</description>
+ <baseAddress>0x40003000</baseAddress>
+ <alternatePeripheral>TWI0</alternatePeripheral>
+ <headerStructName>TWIS</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>TWIM0_TWIS0_TWI0</name>
+ <value>3</value>
+ </interrupt>
+ <groupName>TWIS</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stop TWI transaction</description>
+ <addressOffset>0x014</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stop TWI transaction</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_SUSPEND</name>
+ <description>Suspend TWI transaction</description>
+ <addressOffset>0x01C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_SUSPEND</name>
+ <description>Suspend TWI transaction</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_RESUME</name>
+ <description>Resume TWI transaction</description>
+ <addressOffset>0x020</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_RESUME</name>
+ <description>Resume TWI transaction</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_PREPARERX</name>
+ <description>Prepare the TWI slave to respond to a write command</description>
+ <addressOffset>0x030</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_PREPARERX</name>
+ <description>Prepare the TWI slave to respond to a write command</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_PREPARETX</name>
+ <description>Prepare the TWI slave to respond to a read command</description>
+ <addressOffset>0x034</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_PREPARETX</name>
+ <description>Prepare the TWI slave to respond to a read command</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_STOPPED</name>
+ <description>TWI stopped</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_STOPPED</name>
+ <description>TWI stopped</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ERROR</name>
+ <description>TWI error</description>
+ <addressOffset>0x124</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ERROR</name>
+ <description>TWI error</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RXSTARTED</name>
+ <description>Receive sequence started</description>
+ <addressOffset>0x14C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RXSTARTED</name>
+ <description>Receive sequence started</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_TXSTARTED</name>
+ <description>Transmit sequence started</description>
+ <addressOffset>0x150</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TXSTARTED</name>
+ <description>Transmit sequence started</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_WRITE</name>
+ <description>Write command received</description>
+ <addressOffset>0x164</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_WRITE</name>
+ <description>Write command received</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_READ</name>
+ <description>Read command received</description>
+ <addressOffset>0x168</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_READ</name>
+ <description>Read command received</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>WRITE_SUSPEND</name>
+ <description>Shortcut between event WRITE and task SUSPEND</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>READ_SUSPEND</name>
+ <description>Shortcut between event READ and task SUSPEND</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTEN</name>
+ <description>Enable or disable interrupt</description>
+ <addressOffset>0x300</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STOPPED</name>
+ <description>Enable or disable interrupt for event STOPPED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Enable or disable interrupt for event ERROR</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXSTARTED</name>
+ <description>Enable or disable interrupt for event RXSTARTED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXSTARTED</name>
+ <description>Enable or disable interrupt for event TXSTARTED</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>WRITE</name>
+ <description>Enable or disable interrupt for event WRITE</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>READ</name>
+ <description>Enable or disable interrupt for event READ</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to enable interrupt for event STOPPED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Write '1' to enable interrupt for event ERROR</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXSTARTED</name>
+ <description>Write '1' to enable interrupt for event RXSTARTED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXSTARTED</name>
+ <description>Write '1' to enable interrupt for event TXSTARTED</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>WRITE</name>
+ <description>Write '1' to enable interrupt for event WRITE</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>READ</name>
+ <description>Write '1' to enable interrupt for event READ</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to disable interrupt for event STOPPED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Write '1' to disable interrupt for event ERROR</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXSTARTED</name>
+ <description>Write '1' to disable interrupt for event RXSTARTED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXSTARTED</name>
+ <description>Write '1' to disable interrupt for event TXSTARTED</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>WRITE</name>
+ <description>Write '1' to disable interrupt for event WRITE</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>READ</name>
+ <description>Write '1' to disable interrupt for event READ</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ERRORSRC</name>
+ <description>Error source</description>
+ <addressOffset>0x4D0</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToClear</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>OVERFLOW</name>
+ <description>RX buffer overflow detected, and prevented</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Error did not occur</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Error occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DNACK</name>
+ <description>NACK sent after receiving a data byte</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotReceived</name>
+ <description>Error did not occur</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Received</name>
+ <description>Error occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OVERREAD</name>
+ <description>TX buffer over-read detected, and prevented</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Error did not occur</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Error occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MATCH</name>
+ <description>Status register indicating which address had a match</description>
+ <addressOffset>0x4D4</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>MATCH</name>
+ <description>Which of the addresses in {ADDRESS} matched the incoming address</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>Enable TWIS</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable TWIS</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable TWIS</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable TWIS</description>
+ <value>9</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>PSEL</name>
+ <description>Unspecified</description>
+ <headerStructName>TWIS_PSEL</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x508</addressOffset>
+ <register>
+ <name>SCL</name>
+ <description>Pin select for SCL signal</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SDA</name>
+ <description>Pin select for SDA signal</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>RXD</name>
+ <description>RXD EasyDMA channel</description>
+ <headerStructName>TWIS_RXD</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x534</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>RXD Data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>RXD Data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in RXD buffer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in RXD buffer</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last RXD transaction</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last RXD transaction</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LIST</name>
+ <description>EasyDMA list type</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LIST</name>
+ <description>List type</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable EasyDMA list</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ArrayList</name>
+ <description>Use array list</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>TXD</name>
+ <description>TXD EasyDMA channel</description>
+ <headerStructName>TWIS_TXD</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x544</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>TXD Data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>TXD Data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in TXD buffer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in TXD buffer</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last TXD transaction</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last TXD transaction</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LIST</name>
+ <description>EasyDMA list type</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LIST</name>
+ <description>List type</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable EasyDMA list</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ArrayList</name>
+ <description>Use array list</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <dim>0x2</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>ADDRESS[%s]</name>
+ <description>Description collection: TWI slave address n</description>
+ <addressOffset>0x588</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ADDRESS</name>
+ <description>TWI slave address</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CONFIG</name>
+ <description>Configuration register for the address match mechanism</description>
+ <addressOffset>0x594</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>ADDRESS0</name>
+ <description>Enable or disable address matching on ADDRESS[0]</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ADDRESS1</name>
+ <description>Enable or disable address matching on ADDRESS[1]</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ORC</name>
+ <description>Over-read character. Character sent out in case of an over-read of the transmit buffer.</description>
+ <addressOffset>0x5C0</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ORC</name>
+ <description>Over-read character. Character sent out in case of an over-read of the transmit buffer.</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>SPI0</name>
+ <description>Serial Peripheral Interface</description>
+ <baseAddress>0x40004000</baseAddress>
+ <headerStructName>SPI</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>SPIM0_SPIS0_SPI0</name>
+ <value>4</value>
+ </interrupt>
+ <groupName>SPI</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>EVENTS_READY</name>
+ <description>TXD byte sent and RXD byte received</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_READY</name>
+ <description>TXD byte sent and RXD byte received</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>READY</name>
+ <description>Write '1' to enable interrupt for event READY</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>READY</name>
+ <description>Write '1' to disable interrupt for event READY</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>Enable SPI</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable SPI</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable SPI</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable SPI</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>PSEL</name>
+ <description>Unspecified</description>
+ <headerStructName>SPI_PSEL</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x508</addressOffset>
+ <register>
+ <name>SCK</name>
+ <description>Pin select for SCK</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MOSI</name>
+ <description>Pin select for MOSI signal</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MISO</name>
+ <description>Pin select for MISO signal</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>RXD</name>
+ <description>RXD register</description>
+ <addressOffset>0x518</addressOffset>
+ <access>read-only</access>
+ <readAction>modifyExternal</readAction>
+ <fields>
+ <field>
+ <name>RXD</name>
+ <description>RX data received. Double buffered</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TXD</name>
+ <description>TXD register</description>
+ <addressOffset>0x51C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TXD</name>
+ <description>TX data to send. Double buffered</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>FREQUENCY</name>
+ <description>SPI frequency. Accuracy depends on the HFCLK source selected.</description>
+ <addressOffset>0x524</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x04000000</resetValue>
+ <fields>
+ <field>
+ <name>FREQUENCY</name>
+ <description>SPI master data rate</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>K125</name>
+ <description>125 kbps</description>
+ <value>0x02000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>K250</name>
+ <description>250 kbps</description>
+ <value>0x04000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>K500</name>
+ <description>500 kbps</description>
+ <value>0x08000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>M1</name>
+ <description>1 Mbps</description>
+ <value>0x10000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>M2</name>
+ <description>2 Mbps</description>
+ <value>0x20000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>M4</name>
+ <description>4 Mbps</description>
+ <value>0x40000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>M8</name>
+ <description>8 Mbps</description>
+ <value>0x80000000</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CONFIG</name>
+ <description>Configuration register</description>
+ <addressOffset>0x554</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ORDER</name>
+ <description>Bit order</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>MsbFirst</name>
+ <description>Most significant bit shifted out first</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>LsbFirst</name>
+ <description>Least significant bit shifted out first</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CPHA</name>
+ <description>Serial clock (SCK) phase</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Leading</name>
+ <description>Sample on leading edge of clock, shift serial data on trailing edge</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Trailing</name>
+ <description>Sample on trailing edge of clock, shift serial data on leading edge</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CPOL</name>
+ <description>Serial clock (SCK) polarity</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>ActiveHigh</name>
+ <description>Active high</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ActiveLow</name>
+ <description>Active low</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>SPIM0</name>
+ <description>Serial Peripheral Interface Master with EasyDMA</description>
+ <baseAddress>0x40004000</baseAddress>
+ <alternatePeripheral>SPI0</alternatePeripheral>
+ <headerStructName>SPIM</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>SPIM0_SPIS0_SPI0</name>
+ <value>4</value>
+ </interrupt>
+ <groupName>SPIM</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_START</name>
+ <description>Start SPI transaction</description>
+ <addressOffset>0x010</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_START</name>
+ <description>Start SPI transaction</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stop SPI transaction</description>
+ <addressOffset>0x014</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stop SPI transaction</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_SUSPEND</name>
+ <description>Suspend SPI transaction</description>
+ <addressOffset>0x01C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_SUSPEND</name>
+ <description>Suspend SPI transaction</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_RESUME</name>
+ <description>Resume SPI transaction</description>
+ <addressOffset>0x020</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_RESUME</name>
+ <description>Resume SPI transaction</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_STOPPED</name>
+ <description>SPI transaction has stopped</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_STOPPED</name>
+ <description>SPI transaction has stopped</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ENDRX</name>
+ <description>End of RXD buffer reached</description>
+ <addressOffset>0x110</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ENDRX</name>
+ <description>End of RXD buffer reached</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_END</name>
+ <description>End of RXD buffer and TXD buffer reached</description>
+ <addressOffset>0x118</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_END</name>
+ <description>End of RXD buffer and TXD buffer reached</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ENDTX</name>
+ <description>End of TXD buffer reached</description>
+ <addressOffset>0x120</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ENDTX</name>
+ <description>End of TXD buffer reached</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_STARTED</name>
+ <description>Transaction started</description>
+ <addressOffset>0x14C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_STARTED</name>
+ <description>Transaction started</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>END_START</name>
+ <description>Shortcut between event END and task START</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to enable interrupt for event STOPPED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDRX</name>
+ <description>Write '1' to enable interrupt for event ENDRX</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>END</name>
+ <description>Write '1' to enable interrupt for event END</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDTX</name>
+ <description>Write '1' to enable interrupt for event ENDTX</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STARTED</name>
+ <description>Write '1' to enable interrupt for event STARTED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to disable interrupt for event STOPPED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDRX</name>
+ <description>Write '1' to disable interrupt for event ENDRX</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>END</name>
+ <description>Write '1' to disable interrupt for event END</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDTX</name>
+ <description>Write '1' to disable interrupt for event ENDTX</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STARTED</name>
+ <description>Write '1' to disable interrupt for event STARTED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>Enable SPIM</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable SPIM</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable SPIM</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable SPIM</description>
+ <value>7</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>PSEL</name>
+ <description>Unspecified</description>
+ <headerStructName>SPIM_PSEL</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x508</addressOffset>
+ <register>
+ <name>SCK</name>
+ <description>Pin select for SCK</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MOSI</name>
+ <description>Pin select for MOSI signal</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MISO</name>
+ <description>Pin select for MISO signal</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>FREQUENCY</name>
+ <description>SPI frequency. Accuracy depends on the HFCLK source selected.</description>
+ <addressOffset>0x524</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x04000000</resetValue>
+ <fields>
+ <field>
+ <name>FREQUENCY</name>
+ <description>SPI master data rate</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>K125</name>
+ <description>125 kbps</description>
+ <value>0x02000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>K250</name>
+ <description>250 kbps</description>
+ <value>0x04000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>K500</name>
+ <description>500 kbps</description>
+ <value>0x08000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>M1</name>
+ <description>1 Mbps</description>
+ <value>0x10000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>M2</name>
+ <description>2 Mbps</description>
+ <value>0x20000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>M4</name>
+ <description>4 Mbps</description>
+ <value>0x40000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>M8</name>
+ <description>8 Mbps</description>
+ <value>0x80000000</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>RXD</name>
+ <description>RXD EasyDMA channel</description>
+ <headerStructName>SPIM_RXD</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x534</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in receive buffer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in receive buffer</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LIST</name>
+ <description>EasyDMA list type</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LIST</name>
+ <description>List type</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable EasyDMA list</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ArrayList</name>
+ <description>Use array list</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>TXD</name>
+ <description>TXD EasyDMA channel</description>
+ <headerStructName>SPIM_TXD</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x544</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in transmit buffer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in transmit buffer</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LIST</name>
+ <description>EasyDMA list type</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LIST</name>
+ <description>List type</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable EasyDMA list</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ArrayList</name>
+ <description>Use array list</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>CONFIG</name>
+ <description>Configuration register</description>
+ <addressOffset>0x554</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ORDER</name>
+ <description>Bit order</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>MsbFirst</name>
+ <description>Most significant bit shifted out first</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>LsbFirst</name>
+ <description>Least significant bit shifted out first</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CPHA</name>
+ <description>Serial clock (SCK) phase</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Leading</name>
+ <description>Sample on leading edge of clock, shift serial data on trailing edge</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Trailing</name>
+ <description>Sample on trailing edge of clock, shift serial data on leading edge</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CPOL</name>
+ <description>Serial clock (SCK) polarity</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>ActiveHigh</name>
+ <description>Active high</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ActiveLow</name>
+ <description>Active low</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ORC</name>
+ <description>Over-read character. Character clocked out in case and over-read of the TXD buffer.</description>
+ <addressOffset>0x5C0</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ORC</name>
+ <description>Over-read character. Character clocked out in case and over-read of the TXD buffer.</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>SPIS0</name>
+ <description>SPI Slave</description>
+ <baseAddress>0x40004000</baseAddress>
+ <alternatePeripheral>SPI0</alternatePeripheral>
+ <headerStructName>SPIS</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>SPIM0_SPIS0_SPI0</name>
+ <value>4</value>
+ </interrupt>
+ <groupName>SPIS</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_ACQUIRE</name>
+ <description>Acquire SPI semaphore</description>
+ <addressOffset>0x024</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_ACQUIRE</name>
+ <description>Acquire SPI semaphore</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_RELEASE</name>
+ <description>Release SPI semaphore, enabling the SPI slave to acquire it</description>
+ <addressOffset>0x028</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_RELEASE</name>
+ <description>Release SPI semaphore, enabling the SPI slave to acquire it</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_END</name>
+ <description>Granted transaction completed</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_END</name>
+ <description>Granted transaction completed</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ENDRX</name>
+ <description>End of RXD buffer reached</description>
+ <addressOffset>0x110</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ENDRX</name>
+ <description>End of RXD buffer reached</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ACQUIRED</name>
+ <description>Semaphore acquired</description>
+ <addressOffset>0x128</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ACQUIRED</name>
+ <description>Semaphore acquired</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>END_ACQUIRE</name>
+ <description>Shortcut between event END and task ACQUIRE</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>END</name>
+ <description>Write '1' to enable interrupt for event END</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDRX</name>
+ <description>Write '1' to enable interrupt for event ENDRX</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ACQUIRED</name>
+ <description>Write '1' to enable interrupt for event ACQUIRED</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>END</name>
+ <description>Write '1' to disable interrupt for event END</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDRX</name>
+ <description>Write '1' to disable interrupt for event ENDRX</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ACQUIRED</name>
+ <description>Write '1' to disable interrupt for event ACQUIRED</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SEMSTAT</name>
+ <description>Semaphore status register</description>
+ <addressOffset>0x400</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>SEMSTAT</name>
+ <description>Semaphore status</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Free</name>
+ <description>Semaphore is free</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>CPU</name>
+ <description>Semaphore is assigned to CPU</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>SPIS</name>
+ <description>Semaphore is assigned to SPI slave</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>CPUPending</name>
+ <description>Semaphore is assigned to SPI but a handover to the CPU is pending</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>STATUS</name>
+ <description>Status from last transaction</description>
+ <addressOffset>0x440</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>OVERREAD</name>
+ <description>TX buffer over-read detected, and prevented</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: error present</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: clear error on writing '1'</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OVERFLOW</name>
+ <description>RX buffer overflow detected, and prevented</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: error present</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: clear error on writing '1'</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>Enable SPI slave</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable SPI slave</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable SPI slave</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable SPI slave</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>PSEL</name>
+ <description>Unspecified</description>
+ <headerStructName>SPIS_PSEL</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x508</addressOffset>
+ <register>
+ <name>SCK</name>
+ <description>Pin select for SCK</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MISO</name>
+ <description>Pin select for MISO signal</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MOSI</name>
+ <description>Pin select for MOSI signal</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CSN</name>
+ <description>Pin select for CSN signal</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>RXD</name>
+ <description>Unspecified</description>
+ <headerStructName>SPIS_RXD</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x534</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>RXD data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>RXD data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in receive buffer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in receive buffer</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Number of bytes received in last granted transaction</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of bytes received in the last granted transaction</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LIST</name>
+ <description>EasyDMA list type</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LIST</name>
+ <description>List type</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable EasyDMA list</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ArrayList</name>
+ <description>Use array list</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>TXD</name>
+ <description>Unspecified</description>
+ <headerStructName>SPIS_TXD</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x544</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>TXD data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>TXD data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in transmit buffer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in transmit buffer</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Number of bytes transmitted in last granted transaction</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of bytes transmitted in last granted transaction</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LIST</name>
+ <description>EasyDMA list type</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LIST</name>
+ <description>List type</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable EasyDMA list</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ArrayList</name>
+ <description>Use array list</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>CONFIG</name>
+ <description>Configuration register</description>
+ <addressOffset>0x554</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ORDER</name>
+ <description>Bit order</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>MsbFirst</name>
+ <description>Most significant bit shifted out first</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>LsbFirst</name>
+ <description>Least significant bit shifted out first</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CPHA</name>
+ <description>Serial clock (SCK) phase</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Leading</name>
+ <description>Sample on leading edge of clock, shift serial data on trailing edge</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Trailing</name>
+ <description>Sample on trailing edge of clock, shift serial data on leading edge</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CPOL</name>
+ <description>Serial clock (SCK) polarity</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>ActiveHigh</name>
+ <description>Active high</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ActiveLow</name>
+ <description>Active low</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DEF</name>
+ <description>Default character. Character clocked out in case of an ignored transaction.</description>
+ <addressOffset>0x55C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>DEF</name>
+ <description>Default character. Character clocked out in case of an ignored transaction.</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ORC</name>
+ <description>Over-read character</description>
+ <addressOffset>0x5C0</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ORC</name>
+ <description>Over-read character. Character clocked out after an over-read of the transmit buffer.</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>GPIOTE</name>
+ <description>GPIO Tasks and Events</description>
+ <baseAddress>0x40006000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>GPIOTE</name>
+ <value>6</value>
+ </interrupt>
+ <groupName>GPIOTE</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>TASKS_OUT[%s]</name>
+ <description>Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY.</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_OUT</name>
+ <description>Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>TASKS_SET[%s]</name>
+ <description>Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high.</description>
+ <addressOffset>0x030</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_SET</name>
+ <description>Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>TASKS_CLR[%s]</name>
+ <description>Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low.</description>
+ <addressOffset>0x060</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CLR</name>
+ <description>Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>EVENTS_IN[%s]</name>
+ <description>Description collection: Event generated from pin specified in CONFIG[n].PSEL</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_IN</name>
+ <description>Event generated from pin specified in CONFIG[n].PSEL</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_PORT</name>
+ <description>Event generated from multiple input GPIO pins with SENSE mechanism enabled</description>
+ <addressOffset>0x17C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_PORT</name>
+ <description>Event generated from multiple input GPIO pins with SENSE mechanism enabled</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>IN0</name>
+ <description>Write '1' to enable interrupt for event IN[0]</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN1</name>
+ <description>Write '1' to enable interrupt for event IN[1]</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN2</name>
+ <description>Write '1' to enable interrupt for event IN[2]</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN3</name>
+ <description>Write '1' to enable interrupt for event IN[3]</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN4</name>
+ <description>Write '1' to enable interrupt for event IN[4]</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN5</name>
+ <description>Write '1' to enable interrupt for event IN[5]</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN6</name>
+ <description>Write '1' to enable interrupt for event IN[6]</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN7</name>
+ <description>Write '1' to enable interrupt for event IN[7]</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Write '1' to enable interrupt for event PORT</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>IN0</name>
+ <description>Write '1' to disable interrupt for event IN[0]</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN1</name>
+ <description>Write '1' to disable interrupt for event IN[1]</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN2</name>
+ <description>Write '1' to disable interrupt for event IN[2]</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN3</name>
+ <description>Write '1' to disable interrupt for event IN[3]</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN4</name>
+ <description>Write '1' to disable interrupt for event IN[4]</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN5</name>
+ <description>Write '1' to disable interrupt for event IN[5]</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN6</name>
+ <description>Write '1' to disable interrupt for event IN[6]</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN7</name>
+ <description>Write '1' to disable interrupt for event IN[7]</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Write '1' to disable interrupt for event PORT</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>CONFIG[%s]</name>
+ <description>Description collection: Configuration for OUT[n], SET[n] and CLR[n] tasks and IN[n] event</description>
+ <addressOffset>0x510</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MODE</name>
+ <description>Mode</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled. Pin specified by PSEL will not be acquired by the GPIOTE module.</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Event</name>
+ <description>Event mode</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Task</name>
+ <description>Task mode</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PSEL</name>
+ <description>GPIO number associated with SET[n], CLR[n] and OUT[n] tasks and IN[n] event</description>
+ <lsb>8</lsb>
+ <msb>12</msb>
+ </field>
+ <field>
+ <name>POLARITY</name>
+ <description>When In task mode: Operation to be performed on output when OUT[n] task is triggered. When In event mode: Operation on input that shall trigger IN[n] event.</description>
+ <lsb>16</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>None</name>
+ <description>Task mode: No effect on pin from OUT[n] task. Event mode: no IN[n] event generated on pin activity.</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>LoToHi</name>
+ <description>Task mode: Set pin from OUT[n] task. Event mode: Generate IN[n] event when rising edge on pin.</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>HiToLo</name>
+ <description>Task mode: Clear pin from OUT[n] task. Event mode: Generate IN[n] event when falling edge on pin.</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Toggle</name>
+ <description>Task mode: Toggle pin from OUT[n]. Event mode: Generate IN[n] when any change on pin.</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OUTINIT</name>
+ <description>When in task mode: Initial value of the output when the GPIOTE channel is configured. When in event mode: No effect.</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Task mode: Initial value of pin before task triggering is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Task mode: Initial value of pin before task triggering is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>SAADC</name>
+ <description>Analog to Digital Converter</description>
+ <baseAddress>0x40007000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>SAADC</name>
+ <value>7</value>
+ </interrupt>
+ <groupName>SAADC</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_START</name>
+ <description>Start the ADC and prepare the result buffer in RAM</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_START</name>
+ <description>Start the ADC and prepare the result buffer in RAM</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_SAMPLE</name>
+ <description>Take one ADC sample, if scan is enabled all channels are sampled</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_SAMPLE</name>
+ <description>Take one ADC sample, if scan is enabled all channels are sampled</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stop the ADC and terminate any on-going conversion</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stop the ADC and terminate any on-going conversion</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_CALIBRATEOFFSET</name>
+ <description>Starts offset auto-calibration</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CALIBRATEOFFSET</name>
+ <description>Starts offset auto-calibration</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_STARTED</name>
+ <description>The ADC has started</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_STARTED</name>
+ <description>The ADC has started</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_END</name>
+ <description>The ADC has filled up the Result buffer</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_END</name>
+ <description>The ADC has filled up the Result buffer</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_DONE</name>
+ <description>A conversion task has been completed. Depending on the mode, multiple conversions might be needed for a result to be transferred to RAM.</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_DONE</name>
+ <description>A conversion task has been completed. Depending on the mode, multiple conversions might be needed for a result to be transferred to RAM.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RESULTDONE</name>
+ <description>A result is ready to get transferred to RAM.</description>
+ <addressOffset>0x10C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RESULTDONE</name>
+ <description>A result is ready to get transferred to RAM.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_CALIBRATEDONE</name>
+ <description>Calibration is complete</description>
+ <addressOffset>0x110</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CALIBRATEDONE</name>
+ <description>Calibration is complete</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_STOPPED</name>
+ <description>The ADC has stopped</description>
+ <addressOffset>0x114</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_STOPPED</name>
+ <description>The ADC has stopped</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <dim>8</dim>
+ <dimIncrement>0x008</dimIncrement>
+ <name>EVENTS_CH[%s]</name>
+ <description>Peripheral events.</description>
+ <headerStructName>SAADC_EVENTS_CH</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x118</addressOffset>
+ <register>
+ <name>LIMITH</name>
+ <description>Description cluster: Last results is equal or above CH[n].LIMIT.HIGH</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LIMITH</name>
+ <description>Last results is equal or above CH[n].LIMIT.HIGH</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LIMITL</name>
+ <description>Description cluster: Last results is equal or below CH[n].LIMIT.LOW</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LIMITL</name>
+ <description>Last results is equal or below CH[n].LIMIT.LOW</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>INTEN</name>
+ <description>Enable or disable interrupt</description>
+ <addressOffset>0x300</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STARTED</name>
+ <description>Enable or disable interrupt for event STARTED</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>END</name>
+ <description>Enable or disable interrupt for event END</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DONE</name>
+ <description>Enable or disable interrupt for event DONE</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RESULTDONE</name>
+ <description>Enable or disable interrupt for event RESULTDONE</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CALIBRATEDONE</name>
+ <description>Enable or disable interrupt for event CALIBRATEDONE</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STOPPED</name>
+ <description>Enable or disable interrupt for event STOPPED</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH0LIMITH</name>
+ <description>Enable or disable interrupt for event CH0LIMITH</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH0LIMITL</name>
+ <description>Enable or disable interrupt for event CH0LIMITL</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH1LIMITH</name>
+ <description>Enable or disable interrupt for event CH1LIMITH</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH1LIMITL</name>
+ <description>Enable or disable interrupt for event CH1LIMITL</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH2LIMITH</name>
+ <description>Enable or disable interrupt for event CH2LIMITH</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH2LIMITL</name>
+ <description>Enable or disable interrupt for event CH2LIMITL</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH3LIMITH</name>
+ <description>Enable or disable interrupt for event CH3LIMITH</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH3LIMITL</name>
+ <description>Enable or disable interrupt for event CH3LIMITL</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH4LIMITH</name>
+ <description>Enable or disable interrupt for event CH4LIMITH</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH4LIMITL</name>
+ <description>Enable or disable interrupt for event CH4LIMITL</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH5LIMITH</name>
+ <description>Enable or disable interrupt for event CH5LIMITH</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH5LIMITL</name>
+ <description>Enable or disable interrupt for event CH5LIMITL</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH6LIMITH</name>
+ <description>Enable or disable interrupt for event CH6LIMITH</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH6LIMITL</name>
+ <description>Enable or disable interrupt for event CH6LIMITL</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH7LIMITH</name>
+ <description>Enable or disable interrupt for event CH7LIMITH</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH7LIMITL</name>
+ <description>Enable or disable interrupt for event CH7LIMITL</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STARTED</name>
+ <description>Write '1' to enable interrupt for event STARTED</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>END</name>
+ <description>Write '1' to enable interrupt for event END</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DONE</name>
+ <description>Write '1' to enable interrupt for event DONE</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RESULTDONE</name>
+ <description>Write '1' to enable interrupt for event RESULTDONE</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CALIBRATEDONE</name>
+ <description>Write '1' to enable interrupt for event CALIBRATEDONE</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to enable interrupt for event STOPPED</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH0LIMITH</name>
+ <description>Write '1' to enable interrupt for event CH0LIMITH</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH0LIMITL</name>
+ <description>Write '1' to enable interrupt for event CH0LIMITL</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH1LIMITH</name>
+ <description>Write '1' to enable interrupt for event CH1LIMITH</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH1LIMITL</name>
+ <description>Write '1' to enable interrupt for event CH1LIMITL</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH2LIMITH</name>
+ <description>Write '1' to enable interrupt for event CH2LIMITH</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH2LIMITL</name>
+ <description>Write '1' to enable interrupt for event CH2LIMITL</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH3LIMITH</name>
+ <description>Write '1' to enable interrupt for event CH3LIMITH</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH3LIMITL</name>
+ <description>Write '1' to enable interrupt for event CH3LIMITL</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH4LIMITH</name>
+ <description>Write '1' to enable interrupt for event CH4LIMITH</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH4LIMITL</name>
+ <description>Write '1' to enable interrupt for event CH4LIMITL</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH5LIMITH</name>
+ <description>Write '1' to enable interrupt for event CH5LIMITH</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH5LIMITL</name>
+ <description>Write '1' to enable interrupt for event CH5LIMITL</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH6LIMITH</name>
+ <description>Write '1' to enable interrupt for event CH6LIMITH</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH6LIMITL</name>
+ <description>Write '1' to enable interrupt for event CH6LIMITL</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH7LIMITH</name>
+ <description>Write '1' to enable interrupt for event CH7LIMITH</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH7LIMITL</name>
+ <description>Write '1' to enable interrupt for event CH7LIMITL</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STARTED</name>
+ <description>Write '1' to disable interrupt for event STARTED</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>END</name>
+ <description>Write '1' to disable interrupt for event END</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DONE</name>
+ <description>Write '1' to disable interrupt for event DONE</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RESULTDONE</name>
+ <description>Write '1' to disable interrupt for event RESULTDONE</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CALIBRATEDONE</name>
+ <description>Write '1' to disable interrupt for event CALIBRATEDONE</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to disable interrupt for event STOPPED</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH0LIMITH</name>
+ <description>Write '1' to disable interrupt for event CH0LIMITH</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH0LIMITL</name>
+ <description>Write '1' to disable interrupt for event CH0LIMITL</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH1LIMITH</name>
+ <description>Write '1' to disable interrupt for event CH1LIMITH</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH1LIMITL</name>
+ <description>Write '1' to disable interrupt for event CH1LIMITL</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH2LIMITH</name>
+ <description>Write '1' to disable interrupt for event CH2LIMITH</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH2LIMITL</name>
+ <description>Write '1' to disable interrupt for event CH2LIMITL</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH3LIMITH</name>
+ <description>Write '1' to disable interrupt for event CH3LIMITH</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH3LIMITL</name>
+ <description>Write '1' to disable interrupt for event CH3LIMITL</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH4LIMITH</name>
+ <description>Write '1' to disable interrupt for event CH4LIMITH</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH4LIMITL</name>
+ <description>Write '1' to disable interrupt for event CH4LIMITL</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH5LIMITH</name>
+ <description>Write '1' to disable interrupt for event CH5LIMITH</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH5LIMITL</name>
+ <description>Write '1' to disable interrupt for event CH5LIMITL</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH6LIMITH</name>
+ <description>Write '1' to disable interrupt for event CH6LIMITH</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH6LIMITL</name>
+ <description>Write '1' to disable interrupt for event CH6LIMITL</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH7LIMITH</name>
+ <description>Write '1' to disable interrupt for event CH7LIMITH</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH7LIMITL</name>
+ <description>Write '1' to disable interrupt for event CH7LIMITL</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>STATUS</name>
+ <description>Status</description>
+ <addressOffset>0x400</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>STATUS</name>
+ <description>Status</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Ready</name>
+ <description>ADC is ready. No on-going conversion.</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Busy</name>
+ <description>ADC is busy. Conversion in progress.</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>Enable or disable ADC</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable ADC</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable ADC</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable ADC</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <dim>8</dim>
+ <dimIncrement>0x010</dimIncrement>
+ <name>CH[%s]</name>
+ <description>Unspecified</description>
+ <headerStructName>SAADC_CH</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x510</addressOffset>
+ <register>
+ <name>PSELP</name>
+ <description>Description cluster: Input positive pin selection for CH[n]</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>PSELP</name>
+ <description>Analog positive input channel</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NC</name>
+ <description>Not connected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput0</name>
+ <description>AIN0</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput1</name>
+ <description>AIN1</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput2</name>
+ <description>AIN2</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput3</name>
+ <description>AIN3</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput4</name>
+ <description>AIN4</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput5</name>
+ <description>AIN5</description>
+ <value>6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput6</name>
+ <description>AIN6</description>
+ <value>7</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput7</name>
+ <description>AIN7</description>
+ <value>8</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>VDD</name>
+ <description>VDD</description>
+ <value>9</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PSELN</name>
+ <description>Description cluster: Input negative pin selection for CH[n]</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>PSELN</name>
+ <description>Analog negative input, enables differential channel</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NC</name>
+ <description>Not connected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput0</name>
+ <description>AIN0</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput1</name>
+ <description>AIN1</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput2</name>
+ <description>AIN2</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput3</name>
+ <description>AIN3</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput4</name>
+ <description>AIN4</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput5</name>
+ <description>AIN5</description>
+ <value>6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput6</name>
+ <description>AIN6</description>
+ <value>7</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput7</name>
+ <description>AIN7</description>
+ <value>8</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>VDD</name>
+ <description>VDD</description>
+ <value>9</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CONFIG</name>
+ <description>Description cluster: Input configuration for CH[n]</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00020000</resetValue>
+ <fields>
+ <field>
+ <name>RESP</name>
+ <description>Positive channel resistor control</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Bypass</name>
+ <description>Bypass resistor ladder</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Pulldown</name>
+ <description>Pull-down to GND</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Pullup</name>
+ <description>Pull-up to VDD</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>VDD1_2</name>
+ <description>Set input at VDD/2</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RESN</name>
+ <description>Negative channel resistor control</description>
+ <lsb>4</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Bypass</name>
+ <description>Bypass resistor ladder</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Pulldown</name>
+ <description>Pull-down to GND</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Pullup</name>
+ <description>Pull-up to VDD</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>VDD1_2</name>
+ <description>Set input at VDD/2</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>GAIN</name>
+ <description>Gain control</description>
+ <lsb>8</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Gain1_6</name>
+ <description>1/6</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Gain1_5</name>
+ <description>1/5</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Gain1_4</name>
+ <description>1/4</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Gain1_3</name>
+ <description>1/3</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Gain1_2</name>
+ <description>1/2</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Gain1</name>
+ <description>1</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Gain2</name>
+ <description>2</description>
+ <value>6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Gain4</name>
+ <description>4</description>
+ <value>7</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REFSEL</name>
+ <description>Reference control</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Internal</name>
+ <description>Internal reference (0.6 V)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>VDD1_4</name>
+ <description>VDD/4 as reference</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TACQ</name>
+ <description>Acquisition time, the time the ADC uses to sample the input voltage</description>
+ <lsb>16</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>3us</name>
+ <description>3 us</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>5us</name>
+ <description>5 us</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>10us</name>
+ <description>10 us</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>15us</name>
+ <description>15 us</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>20us</name>
+ <description>20 us</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>40us</name>
+ <description>40 us</description>
+ <value>5</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>MODE</name>
+ <description>Enable differential mode</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>SE</name>
+ <description>Single ended, PSELN will be ignored, negative input to ADC shorted to GND</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Diff</name>
+ <description>Differential</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>BURST</name>
+ <description>Enable burst mode</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Burst mode is disabled (normal operation)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Burst mode is enabled. SAADC takes 2^OVERSAMPLE number of samples as fast as it can, and sends the average to Data RAM.</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LIMIT</name>
+ <description>Description cluster: High/low limits for event monitoring a channel</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x7FFF8000</resetValue>
+ <fields>
+ <field>
+ <name>LOW</name>
+ <description>Low level limit</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ <field>
+ <name>HIGH</name>
+ <description>High level limit</description>
+ <lsb>16</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>RESOLUTION</name>
+ <description>Resolution configuration</description>
+ <addressOffset>0x5F0</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>VAL</name>
+ <description>Set the resolution</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>8bit</name>
+ <description>8 bit</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>10bit</name>
+ <description>10 bit</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>12bit</name>
+ <description>12 bit</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>14bit</name>
+ <description>14 bit</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>OVERSAMPLE</name>
+ <description>Oversampling configuration. OVERSAMPLE should not be combined with SCAN. The RESOLUTION is applied before averaging, thus for high OVERSAMPLE a higher RESOLUTION should be used.</description>
+ <addressOffset>0x5F4</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>OVERSAMPLE</name>
+ <description>Oversample control</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Bypass</name>
+ <description>Bypass oversampling</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Over2x</name>
+ <description>Oversample 2x</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Over4x</name>
+ <description>Oversample 4x</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Over8x</name>
+ <description>Oversample 8x</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Over16x</name>
+ <description>Oversample 16x</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Over32x</name>
+ <description>Oversample 32x</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Over64x</name>
+ <description>Oversample 64x</description>
+ <value>6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Over128x</name>
+ <description>Oversample 128x</description>
+ <value>7</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Over256x</name>
+ <description>Oversample 256x</description>
+ <value>8</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SAMPLERATE</name>
+ <description>Controls normal or continuous sample rate</description>
+ <addressOffset>0x5F8</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CC</name>
+ <description>Capture and compare value. Sample rate is 16 MHz/CC</description>
+ <lsb>0</lsb>
+ <msb>10</msb>
+ </field>
+ <field>
+ <name>MODE</name>
+ <description>Select mode for sample rate control</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Task</name>
+ <description>Rate is controlled from SAMPLE task</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Timers</name>
+ <description>Rate is controlled from local timer (use CC to control the rate)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>RESULT</name>
+ <description>RESULT EasyDMA channel</description>
+ <headerStructName>SAADC_RESULT</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x62C</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Maximum number of buffer words to transfer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of buffer words to transfer</description>
+ <lsb>0</lsb>
+ <msb>14</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Number of buffer words transferred since last START</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of buffer words transferred since last START. This register can be read after an END or STOPPED event.</description>
+ <lsb>0</lsb>
+ <msb>14</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>TIMER0</name>
+ <description>Timer/Counter 0</description>
+ <baseAddress>0x40008000</baseAddress>
+ <headerStructName>TIMER</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>TIMER0</name>
+ <value>8</value>
+ </interrupt>
+ <groupName>TIMER</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_START</name>
+ <description>Start Timer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_START</name>
+ <description>Start Timer</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stop Timer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stop Timer</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_COUNT</name>
+ <description>Increment Timer (Counter mode only)</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_COUNT</name>
+ <description>Increment Timer (Counter mode only)</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_CLEAR</name>
+ <description>Clear time</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CLEAR</name>
+ <description>Clear time</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_SHUTDOWN</name>
+ <description>Deprecated register - Shut down timer</description>
+ <addressOffset>0x010</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_SHUTDOWN</name>
+ <description>Deprecated field - Shut down timer</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x6</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>TASKS_CAPTURE[%s]</name>
+ <description>Description collection: Capture Timer value to CC[n] register</description>
+ <addressOffset>0x040</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CAPTURE</name>
+ <description>Capture Timer value to CC[n] register</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x6</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>EVENTS_COMPARE[%s]</name>
+ <description>Description collection: Compare event on CC[n] match</description>
+ <addressOffset>0x140</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_COMPARE</name>
+ <description>Compare event on CC[n] match</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>COMPARE0_CLEAR</name>
+ <description>Shortcut between event COMPARE[0] and task CLEAR</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE1_CLEAR</name>
+ <description>Shortcut between event COMPARE[1] and task CLEAR</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE2_CLEAR</name>
+ <description>Shortcut between event COMPARE[2] and task CLEAR</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE3_CLEAR</name>
+ <description>Shortcut between event COMPARE[3] and task CLEAR</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE4_CLEAR</name>
+ <description>Shortcut between event COMPARE[4] and task CLEAR</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE5_CLEAR</name>
+ <description>Shortcut between event COMPARE[5] and task CLEAR</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE0_STOP</name>
+ <description>Shortcut between event COMPARE[0] and task STOP</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE1_STOP</name>
+ <description>Shortcut between event COMPARE[1] and task STOP</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE2_STOP</name>
+ <description>Shortcut between event COMPARE[2] and task STOP</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE3_STOP</name>
+ <description>Shortcut between event COMPARE[3] and task STOP</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE4_STOP</name>
+ <description>Shortcut between event COMPARE[4] and task STOP</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE5_STOP</name>
+ <description>Shortcut between event COMPARE[5] and task STOP</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>COMPARE0</name>
+ <description>Write '1' to enable interrupt for event COMPARE[0]</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE1</name>
+ <description>Write '1' to enable interrupt for event COMPARE[1]</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE2</name>
+ <description>Write '1' to enable interrupt for event COMPARE[2]</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE3</name>
+ <description>Write '1' to enable interrupt for event COMPARE[3]</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE4</name>
+ <description>Write '1' to enable interrupt for event COMPARE[4]</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE5</name>
+ <description>Write '1' to enable interrupt for event COMPARE[5]</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>COMPARE0</name>
+ <description>Write '1' to disable interrupt for event COMPARE[0]</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE1</name>
+ <description>Write '1' to disable interrupt for event COMPARE[1]</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE2</name>
+ <description>Write '1' to disable interrupt for event COMPARE[2]</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE3</name>
+ <description>Write '1' to disable interrupt for event COMPARE[3]</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE4</name>
+ <description>Write '1' to disable interrupt for event COMPARE[4]</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE5</name>
+ <description>Write '1' to disable interrupt for event COMPARE[5]</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MODE</name>
+ <description>Timer mode selection</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MODE</name>
+ <description>Timer mode</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Timer</name>
+ <description>Select Timer mode</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Counter</name>
+ <description>Deprecated enumerator - Select Counter mode</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>LowPowerCounter</name>
+ <description>Select Low Power Counter mode</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>BITMODE</name>
+ <description>Configure the number of bits used by the TIMER</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>BITMODE</name>
+ <description>Timer bit width</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>16Bit</name>
+ <description>16 bit timer bit width</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>08Bit</name>
+ <description>8 bit timer bit width</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>24Bit</name>
+ <description>24 bit timer bit width</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>32Bit</name>
+ <description>32 bit timer bit width</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PRESCALER</name>
+ <description>Timer prescaler register</description>
+ <addressOffset>0x510</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000004</resetValue>
+ <fields>
+ <field>
+ <name>PRESCALER</name>
+ <description>Prescaler value</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x6</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>CC[%s]</name>
+ <description>Description collection: Capture/Compare register n</description>
+ <addressOffset>0x540</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CC</name>
+ <description>Capture/Compare value</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral derivedFrom="TIMER0">
+ <name>TIMER1</name>
+ <description>Timer/Counter 1</description>
+ <baseAddress>0x40009000</baseAddress>
+ <interrupt>
+ <name>TIMER1</name>
+ <value>9</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="TIMER0">
+ <name>TIMER2</name>
+ <description>Timer/Counter 2</description>
+ <baseAddress>0x4000A000</baseAddress>
+ <interrupt>
+ <name>TIMER2</name>
+ <value>10</value>
+ </interrupt>
+ </peripheral>
+ <peripheral>
+ <name>RTC0</name>
+ <description>Real time counter 0</description>
+ <baseAddress>0x4000B000</baseAddress>
+ <headerStructName>RTC</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>RTC0</name>
+ <value>11</value>
+ </interrupt>
+ <groupName>RTC</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_START</name>
+ <description>Start RTC COUNTER</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_START</name>
+ <description>Start RTC COUNTER</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stop RTC COUNTER</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stop RTC COUNTER</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_CLEAR</name>
+ <description>Clear RTC COUNTER</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CLEAR</name>
+ <description>Clear RTC COUNTER</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_TRIGOVRFLW</name>
+ <description>Set COUNTER to 0xFFFFF0</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_TRIGOVRFLW</name>
+ <description>Set COUNTER to 0xFFFFF0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_TICK</name>
+ <description>Event on COUNTER increment</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TICK</name>
+ <description>Event on COUNTER increment</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_OVRFLW</name>
+ <description>Event on COUNTER overflow</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_OVRFLW</name>
+ <description>Event on COUNTER overflow</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x4</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>EVENTS_COMPARE[%s]</name>
+ <description>Description collection: Compare event on CC[n] match</description>
+ <addressOffset>0x140</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_COMPARE</name>
+ <description>Compare event on CC[n] match</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TICK</name>
+ <description>Write '1' to enable interrupt for event TICK</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OVRFLW</name>
+ <description>Write '1' to enable interrupt for event OVRFLW</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE0</name>
+ <description>Write '1' to enable interrupt for event COMPARE[0]</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE1</name>
+ <description>Write '1' to enable interrupt for event COMPARE[1]</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE2</name>
+ <description>Write '1' to enable interrupt for event COMPARE[2]</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE3</name>
+ <description>Write '1' to enable interrupt for event COMPARE[3]</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TICK</name>
+ <description>Write '1' to disable interrupt for event TICK</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OVRFLW</name>
+ <description>Write '1' to disable interrupt for event OVRFLW</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE0</name>
+ <description>Write '1' to disable interrupt for event COMPARE[0]</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE1</name>
+ <description>Write '1' to disable interrupt for event COMPARE[1]</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE2</name>
+ <description>Write '1' to disable interrupt for event COMPARE[2]</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE3</name>
+ <description>Write '1' to disable interrupt for event COMPARE[3]</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVTEN</name>
+ <description>Enable or disable event routing</description>
+ <addressOffset>0x340</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TICK</name>
+ <description>Enable or disable event routing for event TICK</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OVRFLW</name>
+ <description>Enable or disable event routing for event OVRFLW</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE0</name>
+ <description>Enable or disable event routing for event COMPARE[0]</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE1</name>
+ <description>Enable or disable event routing for event COMPARE[1]</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE2</name>
+ <description>Enable or disable event routing for event COMPARE[2]</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE3</name>
+ <description>Enable or disable event routing for event COMPARE[3]</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVTENSET</name>
+ <description>Enable event routing</description>
+ <addressOffset>0x344</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TICK</name>
+ <description>Write '1' to enable event routing for event TICK</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OVRFLW</name>
+ <description>Write '1' to enable event routing for event OVRFLW</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE0</name>
+ <description>Write '1' to enable event routing for event COMPARE[0]</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE1</name>
+ <description>Write '1' to enable event routing for event COMPARE[1]</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE2</name>
+ <description>Write '1' to enable event routing for event COMPARE[2]</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE3</name>
+ <description>Write '1' to enable event routing for event COMPARE[3]</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVTENCLR</name>
+ <description>Disable event routing</description>
+ <addressOffset>0x348</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TICK</name>
+ <description>Write '1' to disable event routing for event TICK</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OVRFLW</name>
+ <description>Write '1' to disable event routing for event OVRFLW</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE0</name>
+ <description>Write '1' to disable event routing for event COMPARE[0]</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE1</name>
+ <description>Write '1' to disable event routing for event COMPARE[1]</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE2</name>
+ <description>Write '1' to disable event routing for event COMPARE[2]</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE3</name>
+ <description>Write '1' to disable event routing for event COMPARE[3]</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>COUNTER</name>
+ <description>Current COUNTER value</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>COUNTER</name>
+ <description>Counter value</description>
+ <lsb>0</lsb>
+ <msb>23</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PRESCALER</name>
+ <description>12 bit prescaler for COUNTER frequency (32768/(PRESCALER+1)).Must be written when RTC is stopped</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PRESCALER</name>
+ <description>Prescaler value</description>
+ <lsb>0</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x4</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>CC[%s]</name>
+ <description>Description collection: Compare register n</description>
+ <addressOffset>0x540</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>COMPARE</name>
+ <description>Compare value</description>
+ <lsb>0</lsb>
+ <msb>23</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>TEMP</name>
+ <description>Temperature Sensor</description>
+ <baseAddress>0x4000C000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>TEMP</name>
+ <value>12</value>
+ </interrupt>
+ <groupName>TEMP</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_START</name>
+ <description>Start temperature measurement</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_START</name>
+ <description>Start temperature measurement</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stop temperature measurement</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stop temperature measurement</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_DATARDY</name>
+ <description>Temperature measurement complete, data ready</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_DATARDY</name>
+ <description>Temperature measurement complete, data ready</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>DATARDY</name>
+ <description>Write '1' to enable interrupt for event DATARDY</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>DATARDY</name>
+ <description>Write '1' to disable interrupt for event DATARDY</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TEMP</name>
+ <description>Temperature in degC (0.25deg steps)</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-only</access>
+ <dataType>int32_t</dataType>
+ <fields>
+ <field>
+ <name>TEMP</name>
+ <description>Temperature in degC (0.25deg steps)</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>A0</name>
+ <description>Slope of 1st piece wise linear function</description>
+ <addressOffset>0x520</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000326</resetValue>
+ <fields>
+ <field>
+ <name>A0</name>
+ <description>Slope of 1st piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>A1</name>
+ <description>Slope of 2nd piece wise linear function</description>
+ <addressOffset>0x524</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000348</resetValue>
+ <fields>
+ <field>
+ <name>A1</name>
+ <description>Slope of 2nd piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>A2</name>
+ <description>Slope of 3rd piece wise linear function</description>
+ <addressOffset>0x528</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x000003AA</resetValue>
+ <fields>
+ <field>
+ <name>A2</name>
+ <description>Slope of 3rd piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>A3</name>
+ <description>Slope of 4th piece wise linear function</description>
+ <addressOffset>0x52C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x0000040E</resetValue>
+ <fields>
+ <field>
+ <name>A3</name>
+ <description>Slope of 4th piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>A4</name>
+ <description>Slope of 5th piece wise linear function</description>
+ <addressOffset>0x530</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x000004BD</resetValue>
+ <fields>
+ <field>
+ <name>A4</name>
+ <description>Slope of 5th piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>A5</name>
+ <description>Slope of 6th piece wise linear function</description>
+ <addressOffset>0x534</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x000005A3</resetValue>
+ <fields>
+ <field>
+ <name>A5</name>
+ <description>Slope of 6th piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>B0</name>
+ <description>y-intercept of 1st piece wise linear function</description>
+ <addressOffset>0x540</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00003FEF</resetValue>
+ <fields>
+ <field>
+ <name>B0</name>
+ <description>y-intercept of 1st piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>B1</name>
+ <description>y-intercept of 2nd piece wise linear function</description>
+ <addressOffset>0x544</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00003FBE</resetValue>
+ <fields>
+ <field>
+ <name>B1</name>
+ <description>y-intercept of 2nd piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>B2</name>
+ <description>y-intercept of 3rd piece wise linear function</description>
+ <addressOffset>0x548</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00003FBE</resetValue>
+ <fields>
+ <field>
+ <name>B2</name>
+ <description>y-intercept of 3rd piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>B3</name>
+ <description>y-intercept of 4th piece wise linear function</description>
+ <addressOffset>0x54C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000012</resetValue>
+ <fields>
+ <field>
+ <name>B3</name>
+ <description>y-intercept of 4th piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>B4</name>
+ <description>y-intercept of 5th piece wise linear function</description>
+ <addressOffset>0x550</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000124</resetValue>
+ <fields>
+ <field>
+ <name>B4</name>
+ <description>y-intercept of 5th piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>B5</name>
+ <description>y-intercept of 6th piece wise linear function</description>
+ <addressOffset>0x554</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x0000027C</resetValue>
+ <fields>
+ <field>
+ <name>B5</name>
+ <description>y-intercept of 6th piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>T0</name>
+ <description>End point of 1st piece wise linear function</description>
+ <addressOffset>0x560</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x000000E2</resetValue>
+ <fields>
+ <field>
+ <name>T0</name>
+ <description>End point of 1st piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>T1</name>
+ <description>End point of 2nd piece wise linear function</description>
+ <addressOffset>0x564</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>T1</name>
+ <description>End point of 2nd piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>T2</name>
+ <description>End point of 3rd piece wise linear function</description>
+ <addressOffset>0x568</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000019</resetValue>
+ <fields>
+ <field>
+ <name>T2</name>
+ <description>End point of 3rd piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>T3</name>
+ <description>End point of 4th piece wise linear function</description>
+ <addressOffset>0x56C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x0000003C</resetValue>
+ <fields>
+ <field>
+ <name>T3</name>
+ <description>End point of 4th piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>T4</name>
+ <description>End point of 5th piece wise linear function</description>
+ <addressOffset>0x570</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000050</resetValue>
+ <fields>
+ <field>
+ <name>T4</name>
+ <description>End point of 5th piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>RNG</name>
+ <description>Random Number Generator</description>
+ <baseAddress>0x4000D000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>RNG</name>
+ <value>13</value>
+ </interrupt>
+ <groupName>RNG</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_START</name>
+ <description>Task starting the random number generator</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_START</name>
+ <description>Task starting the random number generator</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Task stopping the random number generator</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Task stopping the random number generator</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_VALRDY</name>
+ <description>Event being generated for every new random number written to the VALUE register</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_VALRDY</name>
+ <description>Event being generated for every new random number written to the VALUE register</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>VALRDY_STOP</name>
+ <description>Shortcut between event VALRDY and task STOP</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>VALRDY</name>
+ <description>Write '1' to enable interrupt for event VALRDY</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>VALRDY</name>
+ <description>Write '1' to disable interrupt for event VALRDY</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CONFIG</name>
+ <description>Configuration register</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>DERCEN</name>
+ <description>Bias correction</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>VALUE</name>
+ <description>Output random number</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>VALUE</name>
+ <description>Generated random number</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>ECB</name>
+ <description>AES ECB Mode Encryption</description>
+ <baseAddress>0x4000E000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>ECB</name>
+ <value>14</value>
+ </interrupt>
+ <groupName>ECB</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_STARTECB</name>
+ <description>Start ECB block encrypt</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STARTECB</name>
+ <description>Start ECB block encrypt</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOPECB</name>
+ <description>Abort a possible executing ECB operation</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOPECB</name>
+ <description>Abort a possible executing ECB operation</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ENDECB</name>
+ <description>ECB block encrypt complete</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ENDECB</name>
+ <description>ECB block encrypt complete</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ERRORECB</name>
+ <description>ECB block encrypt aborted because of a STOPECB task or due to an error</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ERRORECB</name>
+ <description>ECB block encrypt aborted because of a STOPECB task or due to an error</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENDECB</name>
+ <description>Write '1' to enable interrupt for event ENDECB</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERRORECB</name>
+ <description>Write '1' to enable interrupt for event ERRORECB</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENDECB</name>
+ <description>Write '1' to disable interrupt for event ENDECB</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERRORECB</name>
+ <description>Write '1' to disable interrupt for event ERRORECB</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ECBDATAPTR</name>
+ <description>ECB block encrypt memory pointers</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ECBDATAPTR</name>
+ <description>Pointer to the ECB data structure (see Table 1 ECB data structure overview)</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>AAR</name>
+ <description>Accelerated Address Resolver</description>
+ <baseAddress>0x4000F000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>CCM_AAR</name>
+ <value>15</value>
+ </interrupt>
+ <groupName>AAR</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_START</name>
+ <description>Start resolving addresses based on IRKs specified in the IRK data structure</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_START</name>
+ <description>Start resolving addresses based on IRKs specified in the IRK data structure</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stop resolving addresses</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stop resolving addresses</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_END</name>
+ <description>Address resolution procedure complete</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_END</name>
+ <description>Address resolution procedure complete</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RESOLVED</name>
+ <description>Address resolved</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RESOLVED</name>
+ <description>Address resolved</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_NOTRESOLVED</name>
+ <description>Address not resolved</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_NOTRESOLVED</name>
+ <description>Address not resolved</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>END</name>
+ <description>Write '1' to enable interrupt for event END</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RESOLVED</name>
+ <description>Write '1' to enable interrupt for event RESOLVED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>NOTRESOLVED</name>
+ <description>Write '1' to enable interrupt for event NOTRESOLVED</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>END</name>
+ <description>Write '1' to disable interrupt for event END</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RESOLVED</name>
+ <description>Write '1' to disable interrupt for event RESOLVED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>NOTRESOLVED</name>
+ <description>Write '1' to disable interrupt for event NOTRESOLVED</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>STATUS</name>
+ <description>Resolution status</description>
+ <addressOffset>0x400</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>STATUS</name>
+ <description>The IRK that was used last time an address was resolved</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>Enable AAR</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable AAR</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>NIRK</name>
+ <description>Number of IRKs</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>NIRK</name>
+ <description>Number of Identity root keys available in the IRK data structure</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>IRKPTR</name>
+ <description>Pointer to IRK data structure</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>IRKPTR</name>
+ <description>Pointer to the IRK data structure</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ADDRPTR</name>
+ <description>Pointer to the resolvable address</description>
+ <addressOffset>0x510</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ADDRPTR</name>
+ <description>Pointer to the resolvable address (6-bytes)</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SCRATCHPTR</name>
+ <description>Pointer to data area used for temporary storage</description>
+ <addressOffset>0x514</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>SCRATCHPTR</name>
+ <description>Pointer to a scratch data area used for temporary storage during resolution. A space of minimum 3 bytes must be reserved.</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>CCM</name>
+ <description>AES CCM Mode Encryption</description>
+ <baseAddress>0x4000F000</baseAddress>
+ <alternatePeripheral>AAR</alternatePeripheral>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>CCM_AAR</name>
+ <value>15</value>
+ </interrupt>
+ <groupName>CCM</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_KSGEN</name>
+ <description>Start generation of key-stream. This operation will stop by itself when completed.</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_KSGEN</name>
+ <description>Start generation of key-stream. This operation will stop by itself when completed.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_CRYPT</name>
+ <description>Start encryption/decryption. This operation will stop by itself when completed.</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CRYPT</name>
+ <description>Start encryption/decryption. This operation will stop by itself when completed.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stop encryption/decryption</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stop encryption/decryption</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_RATEOVERRIDE</name>
+ <description>Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE register for any ongoing encryption/decryption</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_RATEOVERRIDE</name>
+ <description>Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE register for any ongoing encryption/decryption</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ENDKSGEN</name>
+ <description>Key-stream generation complete</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ENDKSGEN</name>
+ <description>Key-stream generation complete</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ENDCRYPT</name>
+ <description>Encrypt/decrypt complete</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ENDCRYPT</name>
+ <description>Encrypt/decrypt complete</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ERROR</name>
+ <description>Deprecated register - CCM error event</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ERROR</name>
+ <description>Deprecated field - CCM error event</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENDKSGEN_CRYPT</name>
+ <description>Shortcut between event ENDKSGEN and task CRYPT</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENDKSGEN</name>
+ <description>Write '1' to enable interrupt for event ENDKSGEN</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDCRYPT</name>
+ <description>Write '1' to enable interrupt for event ENDCRYPT</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Deprecated intsetfield - Write '1' to enable interrupt for event ERROR</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENDKSGEN</name>
+ <description>Write '1' to disable interrupt for event ENDKSGEN</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDCRYPT</name>
+ <description>Write '1' to disable interrupt for event ENDCRYPT</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Deprecated intclrfield - Write '1' to disable interrupt for event ERROR</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MICSTATUS</name>
+ <description>MIC check result</description>
+ <addressOffset>0x400</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>MICSTATUS</name>
+ <description>The result of the MIC check performed during the previous decryption operation</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>CheckFailed</name>
+ <description>MIC check failed</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>CheckPassed</name>
+ <description>MIC check passed</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>Enable</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable CCM</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MODE</name>
+ <description>Operation mode</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>MODE</name>
+ <description>The mode of operation to be used. The settings in this register apply whenever either the KSGEN or CRYPT tasks are triggered.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Encryption</name>
+ <description>AES CCM packet encryption mode</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Decryption</name>
+ <description>AES CCM packet decryption mode</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DATARATE</name>
+ <description>Radio data rate that the CCM shall run synchronous with</description>
+ <lsb>16</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>1Mbit</name>
+ <description>1 Mbps</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>2Mbit</name>
+ <description>2 Mbps</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>125Kbps</name>
+ <description>125 Kbps</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>500Kbps</name>
+ <description>500 Kbps</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LENGTH</name>
+ <description>Packet length configuration</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Default</name>
+ <description>Default length. Effective length of LENGTH field in encrypted/decrypted packet is 5 bits. A key-stream for packet payloads up to 27 bytes will be generated.</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Extended</name>
+ <description>Extended length. Effective length of LENGTH field in encrypted/decrypted packet is 8 bits. A key-stream for packet payloads up to MAXPACKETSIZE bytes will be generated.</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CNFPTR</name>
+ <description>Pointer to data structure holding AES key and NONCE vector</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CNFPTR</name>
+ <description>Pointer to the data structure holding the AES key and the CCM NONCE vector (see Table 1 CCM data structure overview)</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INPTR</name>
+ <description>Input pointer</description>
+ <addressOffset>0x50C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>INPTR</name>
+ <description>Input pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>OUTPTR</name>
+ <description>Output pointer</description>
+ <addressOffset>0x510</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>OUTPTR</name>
+ <description>Output pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SCRATCHPTR</name>
+ <description>Pointer to data area used for temporary storage</description>
+ <addressOffset>0x514</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>SCRATCHPTR</name>
+ <description>Pointer to a scratch data area used for temporary storage during key-stream generation,
+ MIC generation and encryption/decryption.</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXPACKETSIZE</name>
+ <description>Length of key-stream generated when MODE.LENGTH = Extended.</description>
+ <addressOffset>0x518</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x000000FB</resetValue>
+ <fields>
+ <field>
+ <name>MAXPACKETSIZE</name>
+ <description>Length of key-stream generated when MODE.LENGTH = Extended. This value must be greater or equal to the subsequent packet payload to be encrypted/decrypted.</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RATEOVERRIDE</name>
+ <description>Data rate override setting.</description>
+ <addressOffset>0x51C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>RATEOVERRIDE</name>
+ <description>Data rate override setting.</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>1Mbit</name>
+ <description>1 Mbps</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>2Mbit</name>
+ <description>2 Mbps</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>125Kbps</name>
+ <description>125 Kbps</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>500Kbps</name>
+ <description>500 Kbps</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>WDT</name>
+ <description>Watchdog Timer</description>
+ <baseAddress>0x40010000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>WDT</name>
+ <value>16</value>
+ </interrupt>
+ <groupName>WDT</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_START</name>
+ <description>Start the watchdog</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_START</name>
+ <description>Start the watchdog</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_TIMEOUT</name>
+ <description>Watchdog timeout</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TIMEOUT</name>
+ <description>Watchdog timeout</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TIMEOUT</name>
+ <description>Write '1' to enable interrupt for event TIMEOUT</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TIMEOUT</name>
+ <description>Write '1' to disable interrupt for event TIMEOUT</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RUNSTATUS</name>
+ <description>Run status</description>
+ <addressOffset>0x400</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>RUNSTATUS</name>
+ <description>Indicates whether or not the watchdog is running</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotRunning</name>
+ <description>Watchdog not running</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Running</name>
+ <description>Watchdog is running</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>REQSTATUS</name>
+ <description>Request status</description>
+ <addressOffset>0x404</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>RR0</name>
+ <description>Request status for RR[0] register</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>DisabledOrRequested</name>
+ <description>RR[0] register is not enabled, or are already requesting reload</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>EnabledAndUnrequested</name>
+ <description>RR[0] register is enabled, and are not yet requesting reload</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR1</name>
+ <description>Request status for RR[1] register</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>DisabledOrRequested</name>
+ <description>RR[1] register is not enabled, or are already requesting reload</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>EnabledAndUnrequested</name>
+ <description>RR[1] register is enabled, and are not yet requesting reload</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR2</name>
+ <description>Request status for RR[2] register</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>DisabledOrRequested</name>
+ <description>RR[2] register is not enabled, or are already requesting reload</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>EnabledAndUnrequested</name>
+ <description>RR[2] register is enabled, and are not yet requesting reload</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR3</name>
+ <description>Request status for RR[3] register</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>DisabledOrRequested</name>
+ <description>RR[3] register is not enabled, or are already requesting reload</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>EnabledAndUnrequested</name>
+ <description>RR[3] register is enabled, and are not yet requesting reload</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR4</name>
+ <description>Request status for RR[4] register</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>DisabledOrRequested</name>
+ <description>RR[4] register is not enabled, or are already requesting reload</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>EnabledAndUnrequested</name>
+ <description>RR[4] register is enabled, and are not yet requesting reload</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR5</name>
+ <description>Request status for RR[5] register</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>DisabledOrRequested</name>
+ <description>RR[5] register is not enabled, or are already requesting reload</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>EnabledAndUnrequested</name>
+ <description>RR[5] register is enabled, and are not yet requesting reload</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR6</name>
+ <description>Request status for RR[6] register</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>DisabledOrRequested</name>
+ <description>RR[6] register is not enabled, or are already requesting reload</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>EnabledAndUnrequested</name>
+ <description>RR[6] register is enabled, and are not yet requesting reload</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR7</name>
+ <description>Request status for RR[7] register</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>DisabledOrRequested</name>
+ <description>RR[7] register is not enabled, or are already requesting reload</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>EnabledAndUnrequested</name>
+ <description>RR[7] register is enabled, and are not yet requesting reload</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CRV</name>
+ <description>Counter reload value</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>CRV</name>
+ <description>Counter reload value in number of cycles of the 32.768 kHz clock</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RREN</name>
+ <description>Enable register for reload request registers</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>RR0</name>
+ <description>Enable or disable RR[0] register</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable RR[0] register</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable RR[0] register</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR1</name>
+ <description>Enable or disable RR[1] register</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable RR[1] register</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable RR[1] register</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR2</name>
+ <description>Enable or disable RR[2] register</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable RR[2] register</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable RR[2] register</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR3</name>
+ <description>Enable or disable RR[3] register</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable RR[3] register</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable RR[3] register</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR4</name>
+ <description>Enable or disable RR[4] register</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable RR[4] register</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable RR[4] register</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR5</name>
+ <description>Enable or disable RR[5] register</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable RR[5] register</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable RR[5] register</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR6</name>
+ <description>Enable or disable RR[6] register</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable RR[6] register</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable RR[6] register</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR7</name>
+ <description>Enable or disable RR[7] register</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable RR[7] register</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable RR[7] register</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CONFIG</name>
+ <description>Configuration register</description>
+ <addressOffset>0x50C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>SLEEP</name>
+ <description>Configure the watchdog to either be paused, or kept running, while the CPU is sleeping</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Pause</name>
+ <description>Pause watchdog while the CPU is sleeping</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Run</name>
+ <description>Keep the watchdog running while the CPU is sleeping</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>HALT</name>
+ <description>Configure the watchdog to either be paused, or kept running, while the CPU is halted by the debugger</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Pause</name>
+ <description>Pause watchdog while the CPU is halted by the debugger</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Run</name>
+ <description>Keep the watchdog running while the CPU is halted by the debugger</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>RR[%s]</name>
+ <description>Description collection: Reload request n</description>
+ <addressOffset>0x600</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>RR</name>
+ <description>Reload request register</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Reload</name>
+ <description>Value to request a reload of the watchdog timer</description>
+ <value>0x6E524635</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral derivedFrom="RTC0">
+ <name>RTC1</name>
+ <description>Real time counter 1</description>
+ <baseAddress>0x40011000</baseAddress>
+ <interrupt>
+ <name>RTC1</name>
+ <value>17</value>
+ </interrupt>
+ </peripheral>
+ <peripheral>
+ <name>EGU0</name>
+ <description>Event Generator Unit 0</description>
+ <baseAddress>0x40014000</baseAddress>
+ <headerStructName>EGU</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>SWI0_EGU0</name>
+ <value>20</value>
+ </interrupt>
+ <groupName>EGU</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <dim>0x10</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>TASKS_TRIGGER[%s]</name>
+ <description>Description collection: Trigger n for triggering the corresponding TRIGGERED[n] event</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_TRIGGER</name>
+ <description>Trigger n for triggering the corresponding TRIGGERED[n] event</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x10</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>EVENTS_TRIGGERED[%s]</name>
+ <description>Description collection: Event number n generated by triggering the corresponding TRIGGER[n] task</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TRIGGERED</name>
+ <description>Event number n generated by triggering the corresponding TRIGGER[n] task</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTEN</name>
+ <description>Enable or disable interrupt</description>
+ <addressOffset>0x300</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TRIGGERED0</name>
+ <description>Enable or disable interrupt for event TRIGGERED[0]</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED1</name>
+ <description>Enable or disable interrupt for event TRIGGERED[1]</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED2</name>
+ <description>Enable or disable interrupt for event TRIGGERED[2]</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED3</name>
+ <description>Enable or disable interrupt for event TRIGGERED[3]</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED4</name>
+ <description>Enable or disable interrupt for event TRIGGERED[4]</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED5</name>
+ <description>Enable or disable interrupt for event TRIGGERED[5]</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED6</name>
+ <description>Enable or disable interrupt for event TRIGGERED[6]</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED7</name>
+ <description>Enable or disable interrupt for event TRIGGERED[7]</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED8</name>
+ <description>Enable or disable interrupt for event TRIGGERED[8]</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED9</name>
+ <description>Enable or disable interrupt for event TRIGGERED[9]</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED10</name>
+ <description>Enable or disable interrupt for event TRIGGERED[10]</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED11</name>
+ <description>Enable or disable interrupt for event TRIGGERED[11]</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED12</name>
+ <description>Enable or disable interrupt for event TRIGGERED[12]</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED13</name>
+ <description>Enable or disable interrupt for event TRIGGERED[13]</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED14</name>
+ <description>Enable or disable interrupt for event TRIGGERED[14]</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED15</name>
+ <description>Enable or disable interrupt for event TRIGGERED[15]</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TRIGGERED0</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[0]</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED1</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[1]</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED2</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[2]</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED3</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[3]</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED4</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[4]</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED5</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[5]</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED6</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[6]</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED7</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[7]</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED8</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[8]</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED9</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[9]</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED10</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[10]</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED11</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[11]</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED12</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[12]</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED13</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[13]</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED14</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[14]</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED15</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[15]</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TRIGGERED0</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[0]</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED1</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[1]</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED2</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[2]</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED3</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[3]</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED4</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[4]</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED5</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[5]</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED6</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[6]</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED7</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[7]</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED8</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[8]</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED9</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[9]</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED10</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[10]</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED11</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[11]</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED12</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[12]</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED13</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[13]</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED14</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[14]</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED15</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[15]</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>SWI0</name>
+ <description>Software interrupt 0</description>
+ <baseAddress>0x40014000</baseAddress>
+ <alternatePeripheral>EGU0</alternatePeripheral>
+ <headerStructName>SWI</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>SWI0_EGU0</name>
+ <value>20</value>
+ </interrupt>
+ <groupName>SWI</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>UNUSED</name>
+ <description>Unused.</description>
+ <addressOffset>0x000</addressOffset>
+ <resetValue>0x00000000</resetValue>
+ <access>read-only</access>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral derivedFrom="EGU0">
+ <name>EGU1</name>
+ <description>Event Generator Unit 1</description>
+ <baseAddress>0x40015000</baseAddress>
+ <interrupt>
+ <name>SWI1_EGU1</name>
+ <value>21</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="SWI0">
+ <name>SWI1</name>
+ <description>Software interrupt 1</description>
+ <baseAddress>0x40015000</baseAddress>
+ <alternatePeripheral>EGU1</alternatePeripheral>
+ <interrupt>
+ <name>SWI1_EGU1</name>
+ <value>21</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="SWI0">
+ <name>SWI2</name>
+ <description>Software interrupt 2</description>
+ <baseAddress>0x40016000</baseAddress>
+ <interrupt>
+ <name>SWI2</name>
+ <value>22</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="SWI0">
+ <name>SWI3</name>
+ <description>Software interrupt 3</description>
+ <baseAddress>0x40017000</baseAddress>
+ <interrupt>
+ <name>SWI3</name>
+ <value>23</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="SWI0">
+ <name>SWI4</name>
+ <description>Software interrupt 4</description>
+ <baseAddress>0x40018000</baseAddress>
+ <interrupt>
+ <name>SWI4</name>
+ <value>24</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="SWI0">
+ <name>SWI5</name>
+ <description>Software interrupt 5</description>
+ <baseAddress>0x40019000</baseAddress>
+ <interrupt>
+ <name>SWI5</name>
+ <value>25</value>
+ </interrupt>
+ </peripheral>
+ <peripheral>
+ <name>NVMC</name>
+ <description>Non-volatile memory controller</description>
+ <baseAddress>0x4001E000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <groupName>NVMC</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>READY</name>
+ <description>Ready flag</description>
+ <addressOffset>0x400</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>READY</name>
+ <description>NVMC is ready or busy</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Busy</name>
+ <description>NVMC is busy (ongoing write or erase operation)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ready</name>
+ <description>NVMC is ready</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CONFIG</name>
+ <description>Configuration register</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>WEN</name>
+ <description>Program memory access mode. It is strongly recommended to activate erase and write modes only when they are actively used.</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Ren</name>
+ <description>Read only access</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Wen</name>
+ <description>Write enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Een</name>
+ <description>Erase enabled</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ERASEPAGE</name>
+ <description>Register for erasing a page in code area</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ERASEPAGE</name>
+ <description>Register for starting erase of a page in code area.</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ERASEPCR1</name>
+ <description>Deprecated register - Register for erasing a page in code area. Equivalent to ERASEPAGE.</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-write</access>
+ <alternateRegister>ERASEPAGE</alternateRegister>
+ <fields>
+ <field>
+ <name>ERASEPCR1</name>
+ <description>Register for erasing a page in code area. Equivalent to ERASEPAGE.</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ERASEALL</name>
+ <description>Register for erasing all non-volatile user memory</description>
+ <addressOffset>0x50C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ERASEALL</name>
+ <description>Erase all non-volatile memory including UICR registers. Note that the erase must be enabled using CONFIG.WEN before the non-volatile memory can be erased.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoOperation</name>
+ <description>No operation</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Erase</name>
+ <description>Start erase of chip</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ERASEPCR0</name>
+ <description>Deprecated register - Register for erasing a page in code area. Equivalent to ERASEPAGE.</description>
+ <addressOffset>0x510</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ERASEPCR0</name>
+ <description>Register for starting erase of a page in code area. Equivalent to ERASEPAGE.</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ERASEUICR</name>
+ <description>Register for erasing user information configuration registers</description>
+ <addressOffset>0x514</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ERASEUICR</name>
+ <description>Register starting erase of all user information configuration registers. Note that the erase must be enabled using CONFIG.WEN before the UICR can be erased.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoOperation</name>
+ <description>No operation</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Erase</name>
+ <description>Start erase of UICR</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ERASEPAGEPARTIAL</name>
+ <description>Register for partial erase of a page in code area</description>
+ <addressOffset>0x518</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ERASEPAGEPARTIAL</name>
+ <description>Register for starting partial erase of a page in code area</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ERASEPAGEPARTIALCFG</name>
+ <description>Register for partial erase configuration</description>
+ <addressOffset>0x51C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x0000000A</resetValue>
+ <fields>
+ <field>
+ <name>DURATION</name>
+ <description>Duration of the partial erase in milliseconds</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>PPI</name>
+ <description>Programmable Peripheral Interconnect</description>
+ <baseAddress>0x4001F000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <groupName>PPI</groupName>
+ <size>0x20</size>
+ <registers>
+ <cluster>
+ <dim>6</dim>
+ <dimIncrement>0x008</dimIncrement>
+ <name>TASKS_CHG[%s]</name>
+ <description>Channel group tasks</description>
+ <headerStructName>PPI_TASKS_CHG</headerStructName>
+ <access>write-only</access>
+ <addressOffset>0x000</addressOffset>
+ <register>
+ <name>EN</name>
+ <description>Description cluster: Enable channel group n</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>EN</name>
+ <description>Enable channel group n</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DIS</name>
+ <description>Description cluster: Disable channel group n</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>DIS</name>
+ <description>Disable channel group n</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>CHEN</name>
+ <description>Channel enable register</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CH0</name>
+ <description>Enable or disable channel 0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH1</name>
+ <description>Enable or disable channel 1</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH2</name>
+ <description>Enable or disable channel 2</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH3</name>
+ <description>Enable or disable channel 3</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH4</name>
+ <description>Enable or disable channel 4</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH5</name>
+ <description>Enable or disable channel 5</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH6</name>
+ <description>Enable or disable channel 6</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH7</name>
+ <description>Enable or disable channel 7</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH8</name>
+ <description>Enable or disable channel 8</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH9</name>
+ <description>Enable or disable channel 9</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH10</name>
+ <description>Enable or disable channel 10</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH11</name>
+ <description>Enable or disable channel 11</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH12</name>
+ <description>Enable or disable channel 12</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH13</name>
+ <description>Enable or disable channel 13</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH14</name>
+ <description>Enable or disable channel 14</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH15</name>
+ <description>Enable or disable channel 15</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH16</name>
+ <description>Enable or disable channel 16</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH17</name>
+ <description>Enable or disable channel 17</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH18</name>
+ <description>Enable or disable channel 18</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH19</name>
+ <description>Enable or disable channel 19</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH20</name>
+ <description>Enable or disable channel 20</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH21</name>
+ <description>Enable or disable channel 21</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH22</name>
+ <description>Enable or disable channel 22</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH23</name>
+ <description>Enable or disable channel 23</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH24</name>
+ <description>Enable or disable channel 24</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH25</name>
+ <description>Enable or disable channel 25</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH26</name>
+ <description>Enable or disable channel 26</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH27</name>
+ <description>Enable or disable channel 27</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH28</name>
+ <description>Enable or disable channel 28</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH29</name>
+ <description>Enable or disable channel 29</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH30</name>
+ <description>Enable or disable channel 30</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH31</name>
+ <description>Enable or disable channel 31</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CHENSET</name>
+ <description>Channel enable set register</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToSet</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>CH0</name>
+ <description>Channel 0 enable set register. Writing '0' has no effect</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH1</name>
+ <description>Channel 1 enable set register. Writing '0' has no effect</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH2</name>
+ <description>Channel 2 enable set register. Writing '0' has no effect</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH3</name>
+ <description>Channel 3 enable set register. Writing '0' has no effect</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH4</name>
+ <description>Channel 4 enable set register. Writing '0' has no effect</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH5</name>
+ <description>Channel 5 enable set register. Writing '0' has no effect</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH6</name>
+ <description>Channel 6 enable set register. Writing '0' has no effect</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH7</name>
+ <description>Channel 7 enable set register. Writing '0' has no effect</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH8</name>
+ <description>Channel 8 enable set register. Writing '0' has no effect</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH9</name>
+ <description>Channel 9 enable set register. Writing '0' has no effect</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH10</name>
+ <description>Channel 10 enable set register. Writing '0' has no effect</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH11</name>
+ <description>Channel 11 enable set register. Writing '0' has no effect</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH12</name>
+ <description>Channel 12 enable set register. Writing '0' has no effect</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH13</name>
+ <description>Channel 13 enable set register. Writing '0' has no effect</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH14</name>
+ <description>Channel 14 enable set register. Writing '0' has no effect</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH15</name>
+ <description>Channel 15 enable set register. Writing '0' has no effect</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH16</name>
+ <description>Channel 16 enable set register. Writing '0' has no effect</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH17</name>
+ <description>Channel 17 enable set register. Writing '0' has no effect</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH18</name>
+ <description>Channel 18 enable set register. Writing '0' has no effect</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH19</name>
+ <description>Channel 19 enable set register. Writing '0' has no effect</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH20</name>
+ <description>Channel 20 enable set register. Writing '0' has no effect</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH21</name>
+ <description>Channel 21 enable set register. Writing '0' has no effect</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH22</name>
+ <description>Channel 22 enable set register. Writing '0' has no effect</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH23</name>
+ <description>Channel 23 enable set register. Writing '0' has no effect</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH24</name>
+ <description>Channel 24 enable set register. Writing '0' has no effect</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH25</name>
+ <description>Channel 25 enable set register. Writing '0' has no effect</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH26</name>
+ <description>Channel 26 enable set register. Writing '0' has no effect</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH27</name>
+ <description>Channel 27 enable set register. Writing '0' has no effect</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH28</name>
+ <description>Channel 28 enable set register. Writing '0' has no effect</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH29</name>
+ <description>Channel 29 enable set register. Writing '0' has no effect</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH30</name>
+ <description>Channel 30 enable set register. Writing '0' has no effect</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH31</name>
+ <description>Channel 31 enable set register. Writing '0' has no effect</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CHENCLR</name>
+ <description>Channel enable clear register</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToClear</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>CH0</name>
+ <description>Channel 0 enable clear register. Writing '0' has no effect</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH1</name>
+ <description>Channel 1 enable clear register. Writing '0' has no effect</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH2</name>
+ <description>Channel 2 enable clear register. Writing '0' has no effect</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH3</name>
+ <description>Channel 3 enable clear register. Writing '0' has no effect</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH4</name>
+ <description>Channel 4 enable clear register. Writing '0' has no effect</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH5</name>
+ <description>Channel 5 enable clear register. Writing '0' has no effect</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH6</name>
+ <description>Channel 6 enable clear register. Writing '0' has no effect</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH7</name>
+ <description>Channel 7 enable clear register. Writing '0' has no effect</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH8</name>
+ <description>Channel 8 enable clear register. Writing '0' has no effect</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH9</name>
+ <description>Channel 9 enable clear register. Writing '0' has no effect</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH10</name>
+ <description>Channel 10 enable clear register. Writing '0' has no effect</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH11</name>
+ <description>Channel 11 enable clear register. Writing '0' has no effect</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH12</name>
+ <description>Channel 12 enable clear register. Writing '0' has no effect</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH13</name>
+ <description>Channel 13 enable clear register. Writing '0' has no effect</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH14</name>
+ <description>Channel 14 enable clear register. Writing '0' has no effect</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH15</name>
+ <description>Channel 15 enable clear register. Writing '0' has no effect</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH16</name>
+ <description>Channel 16 enable clear register. Writing '0' has no effect</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH17</name>
+ <description>Channel 17 enable clear register. Writing '0' has no effect</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH18</name>
+ <description>Channel 18 enable clear register. Writing '0' has no effect</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH19</name>
+ <description>Channel 19 enable clear register. Writing '0' has no effect</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH20</name>
+ <description>Channel 20 enable clear register. Writing '0' has no effect</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH21</name>
+ <description>Channel 21 enable clear register. Writing '0' has no effect</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH22</name>
+ <description>Channel 22 enable clear register. Writing '0' has no effect</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH23</name>
+ <description>Channel 23 enable clear register. Writing '0' has no effect</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH24</name>
+ <description>Channel 24 enable clear register. Writing '0' has no effect</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH25</name>
+ <description>Channel 25 enable clear register. Writing '0' has no effect</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH26</name>
+ <description>Channel 26 enable clear register. Writing '0' has no effect</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH27</name>
+ <description>Channel 27 enable clear register. Writing '0' has no effect</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH28</name>
+ <description>Channel 28 enable clear register. Writing '0' has no effect</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH29</name>
+ <description>Channel 29 enable clear register. Writing '0' has no effect</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH30</name>
+ <description>Channel 30 enable clear register. Writing '0' has no effect</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH31</name>
+ <description>Channel 31 enable clear register. Writing '0' has no effect</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <dim>20</dim>
+ <dimIncrement>0x008</dimIncrement>
+ <name>CH[%s]</name>
+ <description>PPI Channel</description>
+ <headerStructName>PPI_CH</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x510</addressOffset>
+ <register>
+ <name>EEP</name>
+ <description>Description cluster: Channel n event end-point</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EEP</name>
+ <description>Pointer to event register. Accepts only addresses to registers from the Event group.</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TEP</name>
+ <description>Description cluster: Channel n task end-point</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TEP</name>
+ <description>Pointer to task register. Accepts only addresses to registers from the Task group.</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <dim>0x6</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>CHG[%s]</name>
+ <description>Description collection: Channel group n</description>
+ <addressOffset>0x800</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CH0</name>
+ <description>Include or exclude channel 0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH1</name>
+ <description>Include or exclude channel 1</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH2</name>
+ <description>Include or exclude channel 2</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH3</name>
+ <description>Include or exclude channel 3</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH4</name>
+ <description>Include or exclude channel 4</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH5</name>
+ <description>Include or exclude channel 5</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH6</name>
+ <description>Include or exclude channel 6</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH7</name>
+ <description>Include or exclude channel 7</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH8</name>
+ <description>Include or exclude channel 8</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH9</name>
+ <description>Include or exclude channel 9</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH10</name>
+ <description>Include or exclude channel 10</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH11</name>
+ <description>Include or exclude channel 11</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH12</name>
+ <description>Include or exclude channel 12</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH13</name>
+ <description>Include or exclude channel 13</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH14</name>
+ <description>Include or exclude channel 14</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH15</name>
+ <description>Include or exclude channel 15</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH16</name>
+ <description>Include or exclude channel 16</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH17</name>
+ <description>Include or exclude channel 17</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH18</name>
+ <description>Include or exclude channel 18</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH19</name>
+ <description>Include or exclude channel 19</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH20</name>
+ <description>Include or exclude channel 20</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH21</name>
+ <description>Include or exclude channel 21</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH22</name>
+ <description>Include or exclude channel 22</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH23</name>
+ <description>Include or exclude channel 23</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH24</name>
+ <description>Include or exclude channel 24</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH25</name>
+ <description>Include or exclude channel 25</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH26</name>
+ <description>Include or exclude channel 26</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH27</name>
+ <description>Include or exclude channel 27</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH28</name>
+ <description>Include or exclude channel 28</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH29</name>
+ <description>Include or exclude channel 29</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH30</name>
+ <description>Include or exclude channel 30</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH31</name>
+ <description>Include or exclude channel 31</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <dim>32</dim>
+ <dimIncrement>0x004</dimIncrement>
+ <name>FORK[%s]</name>
+ <description>Fork</description>
+ <headerStructName>PPI_FORK</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x910</addressOffset>
+ <register>
+ <name>TEP</name>
+ <description>Description cluster: Channel n task end-point</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TEP</name>
+ <description>Pointer to task register</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ </registers>
+ </peripheral>
+ </peripherals>
+</device>
\ No newline at end of file
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf52805_bitfields.h b/third_party/NordicSemiconductor/nrfx/mdk/nrf52805_bitfields.h
new file mode 100644
index 0000000..8c7e024
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf52805_bitfields.h
@@ -0,0 +1,10267 @@
+/*
+
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+
+2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ contributors may be used to endorse or promote products derived from this
+ software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
+
+*/
+
+#ifndef __NRF52805_BITS_H
+#define __NRF52805_BITS_H
+
+/*lint ++flb "Enter library region" */
+
+/* Peripheral: AAR */
+/* Description: Accelerated Address Resolver */
+
+/* Register: AAR_TASKS_START */
+/* Description: Start resolving addresses based on IRKs specified in the IRK data structure */
+
+/* Bit 0 : Start resolving addresses based on IRKs specified in the IRK data structure */
+#define AAR_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */
+#define AAR_TASKS_START_TASKS_START_Msk (0x1UL << AAR_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */
+#define AAR_TASKS_START_TASKS_START_Trigger (1UL) /*!< Trigger task */
+
+/* Register: AAR_TASKS_STOP */
+/* Description: Stop resolving addresses */
+
+/* Bit 0 : Stop resolving addresses */
+#define AAR_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define AAR_TASKS_STOP_TASKS_STOP_Msk (0x1UL << AAR_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define AAR_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: AAR_EVENTS_END */
+/* Description: Address resolution procedure complete */
+
+/* Bit 0 : Address resolution procedure complete */
+#define AAR_EVENTS_END_EVENTS_END_Pos (0UL) /*!< Position of EVENTS_END field. */
+#define AAR_EVENTS_END_EVENTS_END_Msk (0x1UL << AAR_EVENTS_END_EVENTS_END_Pos) /*!< Bit mask of EVENTS_END field. */
+#define AAR_EVENTS_END_EVENTS_END_NotGenerated (0UL) /*!< Event not generated */
+#define AAR_EVENTS_END_EVENTS_END_Generated (1UL) /*!< Event generated */
+
+/* Register: AAR_EVENTS_RESOLVED */
+/* Description: Address resolved */
+
+/* Bit 0 : Address resolved */
+#define AAR_EVENTS_RESOLVED_EVENTS_RESOLVED_Pos (0UL) /*!< Position of EVENTS_RESOLVED field. */
+#define AAR_EVENTS_RESOLVED_EVENTS_RESOLVED_Msk (0x1UL << AAR_EVENTS_RESOLVED_EVENTS_RESOLVED_Pos) /*!< Bit mask of EVENTS_RESOLVED field. */
+#define AAR_EVENTS_RESOLVED_EVENTS_RESOLVED_NotGenerated (0UL) /*!< Event not generated */
+#define AAR_EVENTS_RESOLVED_EVENTS_RESOLVED_Generated (1UL) /*!< Event generated */
+
+/* Register: AAR_EVENTS_NOTRESOLVED */
+/* Description: Address not resolved */
+
+/* Bit 0 : Address not resolved */
+#define AAR_EVENTS_NOTRESOLVED_EVENTS_NOTRESOLVED_Pos (0UL) /*!< Position of EVENTS_NOTRESOLVED field. */
+#define AAR_EVENTS_NOTRESOLVED_EVENTS_NOTRESOLVED_Msk (0x1UL << AAR_EVENTS_NOTRESOLVED_EVENTS_NOTRESOLVED_Pos) /*!< Bit mask of EVENTS_NOTRESOLVED field. */
+#define AAR_EVENTS_NOTRESOLVED_EVENTS_NOTRESOLVED_NotGenerated (0UL) /*!< Event not generated */
+#define AAR_EVENTS_NOTRESOLVED_EVENTS_NOTRESOLVED_Generated (1UL) /*!< Event generated */
+
+/* Register: AAR_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 2 : Write '1' to enable interrupt for event NOTRESOLVED */
+#define AAR_INTENSET_NOTRESOLVED_Pos (2UL) /*!< Position of NOTRESOLVED field. */
+#define AAR_INTENSET_NOTRESOLVED_Msk (0x1UL << AAR_INTENSET_NOTRESOLVED_Pos) /*!< Bit mask of NOTRESOLVED field. */
+#define AAR_INTENSET_NOTRESOLVED_Disabled (0UL) /*!< Read: Disabled */
+#define AAR_INTENSET_NOTRESOLVED_Enabled (1UL) /*!< Read: Enabled */
+#define AAR_INTENSET_NOTRESOLVED_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event RESOLVED */
+#define AAR_INTENSET_RESOLVED_Pos (1UL) /*!< Position of RESOLVED field. */
+#define AAR_INTENSET_RESOLVED_Msk (0x1UL << AAR_INTENSET_RESOLVED_Pos) /*!< Bit mask of RESOLVED field. */
+#define AAR_INTENSET_RESOLVED_Disabled (0UL) /*!< Read: Disabled */
+#define AAR_INTENSET_RESOLVED_Enabled (1UL) /*!< Read: Enabled */
+#define AAR_INTENSET_RESOLVED_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event END */
+#define AAR_INTENSET_END_Pos (0UL) /*!< Position of END field. */
+#define AAR_INTENSET_END_Msk (0x1UL << AAR_INTENSET_END_Pos) /*!< Bit mask of END field. */
+#define AAR_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */
+#define AAR_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */
+#define AAR_INTENSET_END_Set (1UL) /*!< Enable */
+
+/* Register: AAR_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 2 : Write '1' to disable interrupt for event NOTRESOLVED */
+#define AAR_INTENCLR_NOTRESOLVED_Pos (2UL) /*!< Position of NOTRESOLVED field. */
+#define AAR_INTENCLR_NOTRESOLVED_Msk (0x1UL << AAR_INTENCLR_NOTRESOLVED_Pos) /*!< Bit mask of NOTRESOLVED field. */
+#define AAR_INTENCLR_NOTRESOLVED_Disabled (0UL) /*!< Read: Disabled */
+#define AAR_INTENCLR_NOTRESOLVED_Enabled (1UL) /*!< Read: Enabled */
+#define AAR_INTENCLR_NOTRESOLVED_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event RESOLVED */
+#define AAR_INTENCLR_RESOLVED_Pos (1UL) /*!< Position of RESOLVED field. */
+#define AAR_INTENCLR_RESOLVED_Msk (0x1UL << AAR_INTENCLR_RESOLVED_Pos) /*!< Bit mask of RESOLVED field. */
+#define AAR_INTENCLR_RESOLVED_Disabled (0UL) /*!< Read: Disabled */
+#define AAR_INTENCLR_RESOLVED_Enabled (1UL) /*!< Read: Enabled */
+#define AAR_INTENCLR_RESOLVED_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event END */
+#define AAR_INTENCLR_END_Pos (0UL) /*!< Position of END field. */
+#define AAR_INTENCLR_END_Msk (0x1UL << AAR_INTENCLR_END_Pos) /*!< Bit mask of END field. */
+#define AAR_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */
+#define AAR_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */
+#define AAR_INTENCLR_END_Clear (1UL) /*!< Disable */
+
+/* Register: AAR_STATUS */
+/* Description: Resolution status */
+
+/* Bits 3..0 : The IRK that was used last time an address was resolved */
+#define AAR_STATUS_STATUS_Pos (0UL) /*!< Position of STATUS field. */
+#define AAR_STATUS_STATUS_Msk (0xFUL << AAR_STATUS_STATUS_Pos) /*!< Bit mask of STATUS field. */
+
+/* Register: AAR_ENABLE */
+/* Description: Enable AAR */
+
+/* Bits 1..0 : Enable or disable AAR */
+#define AAR_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define AAR_ENABLE_ENABLE_Msk (0x3UL << AAR_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define AAR_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */
+#define AAR_ENABLE_ENABLE_Enabled (3UL) /*!< Enable */
+
+/* Register: AAR_NIRK */
+/* Description: Number of IRKs */
+
+/* Bits 4..0 : Number of Identity root keys available in the IRK data structure */
+#define AAR_NIRK_NIRK_Pos (0UL) /*!< Position of NIRK field. */
+#define AAR_NIRK_NIRK_Msk (0x1FUL << AAR_NIRK_NIRK_Pos) /*!< Bit mask of NIRK field. */
+
+/* Register: AAR_IRKPTR */
+/* Description: Pointer to IRK data structure */
+
+/* Bits 31..0 : Pointer to the IRK data structure */
+#define AAR_IRKPTR_IRKPTR_Pos (0UL) /*!< Position of IRKPTR field. */
+#define AAR_IRKPTR_IRKPTR_Msk (0xFFFFFFFFUL << AAR_IRKPTR_IRKPTR_Pos) /*!< Bit mask of IRKPTR field. */
+
+/* Register: AAR_ADDRPTR */
+/* Description: Pointer to the resolvable address */
+
+/* Bits 31..0 : Pointer to the resolvable address (6-bytes) */
+#define AAR_ADDRPTR_ADDRPTR_Pos (0UL) /*!< Position of ADDRPTR field. */
+#define AAR_ADDRPTR_ADDRPTR_Msk (0xFFFFFFFFUL << AAR_ADDRPTR_ADDRPTR_Pos) /*!< Bit mask of ADDRPTR field. */
+
+/* Register: AAR_SCRATCHPTR */
+/* Description: Pointer to data area used for temporary storage */
+
+/* Bits 31..0 : Pointer to a scratch data area used for temporary storage during resolution. A space of minimum 3 bytes must be reserved. */
+#define AAR_SCRATCHPTR_SCRATCHPTR_Pos (0UL) /*!< Position of SCRATCHPTR field. */
+#define AAR_SCRATCHPTR_SCRATCHPTR_Msk (0xFFFFFFFFUL << AAR_SCRATCHPTR_SCRATCHPTR_Pos) /*!< Bit mask of SCRATCHPTR field. */
+
+
+/* Peripheral: BPROT */
+/* Description: Block Protect */
+
+/* Register: BPROT_CONFIG0 */
+/* Description: Block protect configuration register 0 */
+
+/* Bit 31 : Enable protection for region 31. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION31_Pos (31UL) /*!< Position of REGION31 field. */
+#define BPROT_CONFIG0_REGION31_Msk (0x1UL << BPROT_CONFIG0_REGION31_Pos) /*!< Bit mask of REGION31 field. */
+#define BPROT_CONFIG0_REGION31_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION31_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 30 : Enable protection for region 30. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION30_Pos (30UL) /*!< Position of REGION30 field. */
+#define BPROT_CONFIG0_REGION30_Msk (0x1UL << BPROT_CONFIG0_REGION30_Pos) /*!< Bit mask of REGION30 field. */
+#define BPROT_CONFIG0_REGION30_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION30_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 29 : Enable protection for region 29. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION29_Pos (29UL) /*!< Position of REGION29 field. */
+#define BPROT_CONFIG0_REGION29_Msk (0x1UL << BPROT_CONFIG0_REGION29_Pos) /*!< Bit mask of REGION29 field. */
+#define BPROT_CONFIG0_REGION29_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION29_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 28 : Enable protection for region 28. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION28_Pos (28UL) /*!< Position of REGION28 field. */
+#define BPROT_CONFIG0_REGION28_Msk (0x1UL << BPROT_CONFIG0_REGION28_Pos) /*!< Bit mask of REGION28 field. */
+#define BPROT_CONFIG0_REGION28_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION28_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 27 : Enable protection for region 27. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION27_Pos (27UL) /*!< Position of REGION27 field. */
+#define BPROT_CONFIG0_REGION27_Msk (0x1UL << BPROT_CONFIG0_REGION27_Pos) /*!< Bit mask of REGION27 field. */
+#define BPROT_CONFIG0_REGION27_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION27_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 26 : Enable protection for region 26. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION26_Pos (26UL) /*!< Position of REGION26 field. */
+#define BPROT_CONFIG0_REGION26_Msk (0x1UL << BPROT_CONFIG0_REGION26_Pos) /*!< Bit mask of REGION26 field. */
+#define BPROT_CONFIG0_REGION26_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION26_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 25 : Enable protection for region 25. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION25_Pos (25UL) /*!< Position of REGION25 field. */
+#define BPROT_CONFIG0_REGION25_Msk (0x1UL << BPROT_CONFIG0_REGION25_Pos) /*!< Bit mask of REGION25 field. */
+#define BPROT_CONFIG0_REGION25_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION25_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 24 : Enable protection for region 24. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION24_Pos (24UL) /*!< Position of REGION24 field. */
+#define BPROT_CONFIG0_REGION24_Msk (0x1UL << BPROT_CONFIG0_REGION24_Pos) /*!< Bit mask of REGION24 field. */
+#define BPROT_CONFIG0_REGION24_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION24_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 23 : Enable protection for region 23. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION23_Pos (23UL) /*!< Position of REGION23 field. */
+#define BPROT_CONFIG0_REGION23_Msk (0x1UL << BPROT_CONFIG0_REGION23_Pos) /*!< Bit mask of REGION23 field. */
+#define BPROT_CONFIG0_REGION23_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION23_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 22 : Enable protection for region 22. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION22_Pos (22UL) /*!< Position of REGION22 field. */
+#define BPROT_CONFIG0_REGION22_Msk (0x1UL << BPROT_CONFIG0_REGION22_Pos) /*!< Bit mask of REGION22 field. */
+#define BPROT_CONFIG0_REGION22_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION22_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 21 : Enable protection for region 21. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION21_Pos (21UL) /*!< Position of REGION21 field. */
+#define BPROT_CONFIG0_REGION21_Msk (0x1UL << BPROT_CONFIG0_REGION21_Pos) /*!< Bit mask of REGION21 field. */
+#define BPROT_CONFIG0_REGION21_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION21_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 20 : Enable protection for region 20. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION20_Pos (20UL) /*!< Position of REGION20 field. */
+#define BPROT_CONFIG0_REGION20_Msk (0x1UL << BPROT_CONFIG0_REGION20_Pos) /*!< Bit mask of REGION20 field. */
+#define BPROT_CONFIG0_REGION20_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION20_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 19 : Enable protection for region 19. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION19_Pos (19UL) /*!< Position of REGION19 field. */
+#define BPROT_CONFIG0_REGION19_Msk (0x1UL << BPROT_CONFIG0_REGION19_Pos) /*!< Bit mask of REGION19 field. */
+#define BPROT_CONFIG0_REGION19_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION19_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 18 : Enable protection for region 18. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION18_Pos (18UL) /*!< Position of REGION18 field. */
+#define BPROT_CONFIG0_REGION18_Msk (0x1UL << BPROT_CONFIG0_REGION18_Pos) /*!< Bit mask of REGION18 field. */
+#define BPROT_CONFIG0_REGION18_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION18_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 17 : Enable protection for region 17. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION17_Pos (17UL) /*!< Position of REGION17 field. */
+#define BPROT_CONFIG0_REGION17_Msk (0x1UL << BPROT_CONFIG0_REGION17_Pos) /*!< Bit mask of REGION17 field. */
+#define BPROT_CONFIG0_REGION17_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION17_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 16 : Enable protection for region 16. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION16_Pos (16UL) /*!< Position of REGION16 field. */
+#define BPROT_CONFIG0_REGION16_Msk (0x1UL << BPROT_CONFIG0_REGION16_Pos) /*!< Bit mask of REGION16 field. */
+#define BPROT_CONFIG0_REGION16_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION16_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 15 : Enable protection for region 15. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION15_Pos (15UL) /*!< Position of REGION15 field. */
+#define BPROT_CONFIG0_REGION15_Msk (0x1UL << BPROT_CONFIG0_REGION15_Pos) /*!< Bit mask of REGION15 field. */
+#define BPROT_CONFIG0_REGION15_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION15_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 14 : Enable protection for region 14. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION14_Pos (14UL) /*!< Position of REGION14 field. */
+#define BPROT_CONFIG0_REGION14_Msk (0x1UL << BPROT_CONFIG0_REGION14_Pos) /*!< Bit mask of REGION14 field. */
+#define BPROT_CONFIG0_REGION14_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION14_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 13 : Enable protection for region 13. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION13_Pos (13UL) /*!< Position of REGION13 field. */
+#define BPROT_CONFIG0_REGION13_Msk (0x1UL << BPROT_CONFIG0_REGION13_Pos) /*!< Bit mask of REGION13 field. */
+#define BPROT_CONFIG0_REGION13_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION13_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 12 : Enable protection for region 12. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION12_Pos (12UL) /*!< Position of REGION12 field. */
+#define BPROT_CONFIG0_REGION12_Msk (0x1UL << BPROT_CONFIG0_REGION12_Pos) /*!< Bit mask of REGION12 field. */
+#define BPROT_CONFIG0_REGION12_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION12_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 11 : Enable protection for region 11. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION11_Pos (11UL) /*!< Position of REGION11 field. */
+#define BPROT_CONFIG0_REGION11_Msk (0x1UL << BPROT_CONFIG0_REGION11_Pos) /*!< Bit mask of REGION11 field. */
+#define BPROT_CONFIG0_REGION11_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION11_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 10 : Enable protection for region 10. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION10_Pos (10UL) /*!< Position of REGION10 field. */
+#define BPROT_CONFIG0_REGION10_Msk (0x1UL << BPROT_CONFIG0_REGION10_Pos) /*!< Bit mask of REGION10 field. */
+#define BPROT_CONFIG0_REGION10_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION10_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 9 : Enable protection for region 9. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION9_Pos (9UL) /*!< Position of REGION9 field. */
+#define BPROT_CONFIG0_REGION9_Msk (0x1UL << BPROT_CONFIG0_REGION9_Pos) /*!< Bit mask of REGION9 field. */
+#define BPROT_CONFIG0_REGION9_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION9_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 8 : Enable protection for region 8. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION8_Pos (8UL) /*!< Position of REGION8 field. */
+#define BPROT_CONFIG0_REGION8_Msk (0x1UL << BPROT_CONFIG0_REGION8_Pos) /*!< Bit mask of REGION8 field. */
+#define BPROT_CONFIG0_REGION8_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION8_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 7 : Enable protection for region 7. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION7_Pos (7UL) /*!< Position of REGION7 field. */
+#define BPROT_CONFIG0_REGION7_Msk (0x1UL << BPROT_CONFIG0_REGION7_Pos) /*!< Bit mask of REGION7 field. */
+#define BPROT_CONFIG0_REGION7_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION7_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 6 : Enable protection for region 6. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION6_Pos (6UL) /*!< Position of REGION6 field. */
+#define BPROT_CONFIG0_REGION6_Msk (0x1UL << BPROT_CONFIG0_REGION6_Pos) /*!< Bit mask of REGION6 field. */
+#define BPROT_CONFIG0_REGION6_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION6_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 5 : Enable protection for region 5. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION5_Pos (5UL) /*!< Position of REGION5 field. */
+#define BPROT_CONFIG0_REGION5_Msk (0x1UL << BPROT_CONFIG0_REGION5_Pos) /*!< Bit mask of REGION5 field. */
+#define BPROT_CONFIG0_REGION5_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION5_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 4 : Enable protection for region 4. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION4_Pos (4UL) /*!< Position of REGION4 field. */
+#define BPROT_CONFIG0_REGION4_Msk (0x1UL << BPROT_CONFIG0_REGION4_Pos) /*!< Bit mask of REGION4 field. */
+#define BPROT_CONFIG0_REGION4_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION4_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 3 : Enable protection for region 3. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION3_Pos (3UL) /*!< Position of REGION3 field. */
+#define BPROT_CONFIG0_REGION3_Msk (0x1UL << BPROT_CONFIG0_REGION3_Pos) /*!< Bit mask of REGION3 field. */
+#define BPROT_CONFIG0_REGION3_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION3_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 2 : Enable protection for region 2. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION2_Pos (2UL) /*!< Position of REGION2 field. */
+#define BPROT_CONFIG0_REGION2_Msk (0x1UL << BPROT_CONFIG0_REGION2_Pos) /*!< Bit mask of REGION2 field. */
+#define BPROT_CONFIG0_REGION2_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION2_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 1 : Enable protection for region 1. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION1_Pos (1UL) /*!< Position of REGION1 field. */
+#define BPROT_CONFIG0_REGION1_Msk (0x1UL << BPROT_CONFIG0_REGION1_Pos) /*!< Bit mask of REGION1 field. */
+#define BPROT_CONFIG0_REGION1_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION1_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 0 : Enable protection for region 0. Write '0' has no effect. */
+#define BPROT_CONFIG0_REGION0_Pos (0UL) /*!< Position of REGION0 field. */
+#define BPROT_CONFIG0_REGION0_Msk (0x1UL << BPROT_CONFIG0_REGION0_Pos) /*!< Bit mask of REGION0 field. */
+#define BPROT_CONFIG0_REGION0_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG0_REGION0_Enabled (1UL) /*!< Protection enabled */
+
+/* Register: BPROT_CONFIG1 */
+/* Description: Block protect configuration register 1 */
+
+/* Bit 15 : Enable protection for region 47. Write '0' has no effect. */
+#define BPROT_CONFIG1_REGION47_Pos (15UL) /*!< Position of REGION47 field. */
+#define BPROT_CONFIG1_REGION47_Msk (0x1UL << BPROT_CONFIG1_REGION47_Pos) /*!< Bit mask of REGION47 field. */
+#define BPROT_CONFIG1_REGION47_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG1_REGION47_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 14 : Enable protection for region 46. Write '0' has no effect. */
+#define BPROT_CONFIG1_REGION46_Pos (14UL) /*!< Position of REGION46 field. */
+#define BPROT_CONFIG1_REGION46_Msk (0x1UL << BPROT_CONFIG1_REGION46_Pos) /*!< Bit mask of REGION46 field. */
+#define BPROT_CONFIG1_REGION46_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG1_REGION46_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 13 : Enable protection for region 45. Write '0' has no effect. */
+#define BPROT_CONFIG1_REGION45_Pos (13UL) /*!< Position of REGION45 field. */
+#define BPROT_CONFIG1_REGION45_Msk (0x1UL << BPROT_CONFIG1_REGION45_Pos) /*!< Bit mask of REGION45 field. */
+#define BPROT_CONFIG1_REGION45_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG1_REGION45_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 12 : Enable protection for region 44. Write '0' has no effect. */
+#define BPROT_CONFIG1_REGION44_Pos (12UL) /*!< Position of REGION44 field. */
+#define BPROT_CONFIG1_REGION44_Msk (0x1UL << BPROT_CONFIG1_REGION44_Pos) /*!< Bit mask of REGION44 field. */
+#define BPROT_CONFIG1_REGION44_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG1_REGION44_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 11 : Enable protection for region 43. Write '0' has no effect. */
+#define BPROT_CONFIG1_REGION43_Pos (11UL) /*!< Position of REGION43 field. */
+#define BPROT_CONFIG1_REGION43_Msk (0x1UL << BPROT_CONFIG1_REGION43_Pos) /*!< Bit mask of REGION43 field. */
+#define BPROT_CONFIG1_REGION43_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG1_REGION43_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 10 : Enable protection for region 42. Write '0' has no effect. */
+#define BPROT_CONFIG1_REGION42_Pos (10UL) /*!< Position of REGION42 field. */
+#define BPROT_CONFIG1_REGION42_Msk (0x1UL << BPROT_CONFIG1_REGION42_Pos) /*!< Bit mask of REGION42 field. */
+#define BPROT_CONFIG1_REGION42_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG1_REGION42_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 9 : Enable protection for region 41. Write '0' has no effect. */
+#define BPROT_CONFIG1_REGION41_Pos (9UL) /*!< Position of REGION41 field. */
+#define BPROT_CONFIG1_REGION41_Msk (0x1UL << BPROT_CONFIG1_REGION41_Pos) /*!< Bit mask of REGION41 field. */
+#define BPROT_CONFIG1_REGION41_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG1_REGION41_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 8 : Enable protection for region 40. Write '0' has no effect. */
+#define BPROT_CONFIG1_REGION40_Pos (8UL) /*!< Position of REGION40 field. */
+#define BPROT_CONFIG1_REGION40_Msk (0x1UL << BPROT_CONFIG1_REGION40_Pos) /*!< Bit mask of REGION40 field. */
+#define BPROT_CONFIG1_REGION40_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG1_REGION40_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 7 : Enable protection for region 39. Write '0' has no effect. */
+#define BPROT_CONFIG1_REGION39_Pos (7UL) /*!< Position of REGION39 field. */
+#define BPROT_CONFIG1_REGION39_Msk (0x1UL << BPROT_CONFIG1_REGION39_Pos) /*!< Bit mask of REGION39 field. */
+#define BPROT_CONFIG1_REGION39_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG1_REGION39_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 6 : Enable protection for region 38. Write '0' has no effect. */
+#define BPROT_CONFIG1_REGION38_Pos (6UL) /*!< Position of REGION38 field. */
+#define BPROT_CONFIG1_REGION38_Msk (0x1UL << BPROT_CONFIG1_REGION38_Pos) /*!< Bit mask of REGION38 field. */
+#define BPROT_CONFIG1_REGION38_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG1_REGION38_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 5 : Enable protection for region 37. Write '0' has no effect. */
+#define BPROT_CONFIG1_REGION37_Pos (5UL) /*!< Position of REGION37 field. */
+#define BPROT_CONFIG1_REGION37_Msk (0x1UL << BPROT_CONFIG1_REGION37_Pos) /*!< Bit mask of REGION37 field. */
+#define BPROT_CONFIG1_REGION37_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG1_REGION37_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 4 : Enable protection for region 36. Write '0' has no effect. */
+#define BPROT_CONFIG1_REGION36_Pos (4UL) /*!< Position of REGION36 field. */
+#define BPROT_CONFIG1_REGION36_Msk (0x1UL << BPROT_CONFIG1_REGION36_Pos) /*!< Bit mask of REGION36 field. */
+#define BPROT_CONFIG1_REGION36_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG1_REGION36_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 3 : Enable protection for region 35. Write '0' has no effect. */
+#define BPROT_CONFIG1_REGION35_Pos (3UL) /*!< Position of REGION35 field. */
+#define BPROT_CONFIG1_REGION35_Msk (0x1UL << BPROT_CONFIG1_REGION35_Pos) /*!< Bit mask of REGION35 field. */
+#define BPROT_CONFIG1_REGION35_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG1_REGION35_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 2 : Enable protection for region 34. Write '0' has no effect. */
+#define BPROT_CONFIG1_REGION34_Pos (2UL) /*!< Position of REGION34 field. */
+#define BPROT_CONFIG1_REGION34_Msk (0x1UL << BPROT_CONFIG1_REGION34_Pos) /*!< Bit mask of REGION34 field. */
+#define BPROT_CONFIG1_REGION34_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG1_REGION34_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 1 : Enable protection for region 33. Write '0' has no effect. */
+#define BPROT_CONFIG1_REGION33_Pos (1UL) /*!< Position of REGION33 field. */
+#define BPROT_CONFIG1_REGION33_Msk (0x1UL << BPROT_CONFIG1_REGION33_Pos) /*!< Bit mask of REGION33 field. */
+#define BPROT_CONFIG1_REGION33_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG1_REGION33_Enabled (1UL) /*!< Protection enabled */
+
+/* Bit 0 : Enable protection for region 32. Write '0' has no effect. */
+#define BPROT_CONFIG1_REGION32_Pos (0UL) /*!< Position of REGION32 field. */
+#define BPROT_CONFIG1_REGION32_Msk (0x1UL << BPROT_CONFIG1_REGION32_Pos) /*!< Bit mask of REGION32 field. */
+#define BPROT_CONFIG1_REGION32_Disabled (0UL) /*!< Protection disabled */
+#define BPROT_CONFIG1_REGION32_Enabled (1UL) /*!< Protection enabled */
+
+/* Register: BPROT_DISABLEINDEBUG */
+/* Description: Disable protection mechanism in debug mode */
+
+/* Bit 0 : Disable the protection mechanism for NVM regions while in debug mode. This register will only disable the protection mechanism if the device is in debug mode. */
+#define BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Pos (0UL) /*!< Position of DISABLEINDEBUG field. */
+#define BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Msk (0x1UL << BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Pos) /*!< Bit mask of DISABLEINDEBUG field. */
+#define BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Enabled (0UL) /*!< Enabled in debug */
+#define BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Disabled (1UL) /*!< Disabled in debug */
+
+
+/* Peripheral: CCM */
+/* Description: AES CCM Mode Encryption */
+
+/* Register: CCM_TASKS_KSGEN */
+/* Description: Start generation of key-stream. This operation will stop by itself when completed. */
+
+/* Bit 0 : Start generation of key-stream. This operation will stop by itself when completed. */
+#define CCM_TASKS_KSGEN_TASKS_KSGEN_Pos (0UL) /*!< Position of TASKS_KSGEN field. */
+#define CCM_TASKS_KSGEN_TASKS_KSGEN_Msk (0x1UL << CCM_TASKS_KSGEN_TASKS_KSGEN_Pos) /*!< Bit mask of TASKS_KSGEN field. */
+#define CCM_TASKS_KSGEN_TASKS_KSGEN_Trigger (1UL) /*!< Trigger task */
+
+/* Register: CCM_TASKS_CRYPT */
+/* Description: Start encryption/decryption. This operation will stop by itself when completed. */
+
+/* Bit 0 : Start encryption/decryption. This operation will stop by itself when completed. */
+#define CCM_TASKS_CRYPT_TASKS_CRYPT_Pos (0UL) /*!< Position of TASKS_CRYPT field. */
+#define CCM_TASKS_CRYPT_TASKS_CRYPT_Msk (0x1UL << CCM_TASKS_CRYPT_TASKS_CRYPT_Pos) /*!< Bit mask of TASKS_CRYPT field. */
+#define CCM_TASKS_CRYPT_TASKS_CRYPT_Trigger (1UL) /*!< Trigger task */
+
+/* Register: CCM_TASKS_STOP */
+/* Description: Stop encryption/decryption */
+
+/* Bit 0 : Stop encryption/decryption */
+#define CCM_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define CCM_TASKS_STOP_TASKS_STOP_Msk (0x1UL << CCM_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define CCM_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: CCM_TASKS_RATEOVERRIDE */
+/* Description: Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE register for any ongoing encryption/decryption */
+
+/* Bit 0 : Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE register for any ongoing encryption/decryption */
+#define CCM_TASKS_RATEOVERRIDE_TASKS_RATEOVERRIDE_Pos (0UL) /*!< Position of TASKS_RATEOVERRIDE field. */
+#define CCM_TASKS_RATEOVERRIDE_TASKS_RATEOVERRIDE_Msk (0x1UL << CCM_TASKS_RATEOVERRIDE_TASKS_RATEOVERRIDE_Pos) /*!< Bit mask of TASKS_RATEOVERRIDE field. */
+#define CCM_TASKS_RATEOVERRIDE_TASKS_RATEOVERRIDE_Trigger (1UL) /*!< Trigger task */
+
+/* Register: CCM_EVENTS_ENDKSGEN */
+/* Description: Key-stream generation complete */
+
+/* Bit 0 : Key-stream generation complete */
+#define CCM_EVENTS_ENDKSGEN_EVENTS_ENDKSGEN_Pos (0UL) /*!< Position of EVENTS_ENDKSGEN field. */
+#define CCM_EVENTS_ENDKSGEN_EVENTS_ENDKSGEN_Msk (0x1UL << CCM_EVENTS_ENDKSGEN_EVENTS_ENDKSGEN_Pos) /*!< Bit mask of EVENTS_ENDKSGEN field. */
+#define CCM_EVENTS_ENDKSGEN_EVENTS_ENDKSGEN_NotGenerated (0UL) /*!< Event not generated */
+#define CCM_EVENTS_ENDKSGEN_EVENTS_ENDKSGEN_Generated (1UL) /*!< Event generated */
+
+/* Register: CCM_EVENTS_ENDCRYPT */
+/* Description: Encrypt/decrypt complete */
+
+/* Bit 0 : Encrypt/decrypt complete */
+#define CCM_EVENTS_ENDCRYPT_EVENTS_ENDCRYPT_Pos (0UL) /*!< Position of EVENTS_ENDCRYPT field. */
+#define CCM_EVENTS_ENDCRYPT_EVENTS_ENDCRYPT_Msk (0x1UL << CCM_EVENTS_ENDCRYPT_EVENTS_ENDCRYPT_Pos) /*!< Bit mask of EVENTS_ENDCRYPT field. */
+#define CCM_EVENTS_ENDCRYPT_EVENTS_ENDCRYPT_NotGenerated (0UL) /*!< Event not generated */
+#define CCM_EVENTS_ENDCRYPT_EVENTS_ENDCRYPT_Generated (1UL) /*!< Event generated */
+
+/* Register: CCM_EVENTS_ERROR */
+/* Description: Deprecated register - CCM error event */
+
+/* Bit 0 : Deprecated field - CCM error event */
+#define CCM_EVENTS_ERROR_EVENTS_ERROR_Pos (0UL) /*!< Position of EVENTS_ERROR field. */
+#define CCM_EVENTS_ERROR_EVENTS_ERROR_Msk (0x1UL << CCM_EVENTS_ERROR_EVENTS_ERROR_Pos) /*!< Bit mask of EVENTS_ERROR field. */
+#define CCM_EVENTS_ERROR_EVENTS_ERROR_NotGenerated (0UL) /*!< Event not generated */
+#define CCM_EVENTS_ERROR_EVENTS_ERROR_Generated (1UL) /*!< Event generated */
+
+/* Register: CCM_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 0 : Shortcut between event ENDKSGEN and task CRYPT */
+#define CCM_SHORTS_ENDKSGEN_CRYPT_Pos (0UL) /*!< Position of ENDKSGEN_CRYPT field. */
+#define CCM_SHORTS_ENDKSGEN_CRYPT_Msk (0x1UL << CCM_SHORTS_ENDKSGEN_CRYPT_Pos) /*!< Bit mask of ENDKSGEN_CRYPT field. */
+#define CCM_SHORTS_ENDKSGEN_CRYPT_Disabled (0UL) /*!< Disable shortcut */
+#define CCM_SHORTS_ENDKSGEN_CRYPT_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: CCM_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 2 : Deprecated intsetfield - Write '1' to enable interrupt for event ERROR */
+#define CCM_INTENSET_ERROR_Pos (2UL) /*!< Position of ERROR field. */
+#define CCM_INTENSET_ERROR_Msk (0x1UL << CCM_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define CCM_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */
+#define CCM_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */
+#define CCM_INTENSET_ERROR_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event ENDCRYPT */
+#define CCM_INTENSET_ENDCRYPT_Pos (1UL) /*!< Position of ENDCRYPT field. */
+#define CCM_INTENSET_ENDCRYPT_Msk (0x1UL << CCM_INTENSET_ENDCRYPT_Pos) /*!< Bit mask of ENDCRYPT field. */
+#define CCM_INTENSET_ENDCRYPT_Disabled (0UL) /*!< Read: Disabled */
+#define CCM_INTENSET_ENDCRYPT_Enabled (1UL) /*!< Read: Enabled */
+#define CCM_INTENSET_ENDCRYPT_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event ENDKSGEN */
+#define CCM_INTENSET_ENDKSGEN_Pos (0UL) /*!< Position of ENDKSGEN field. */
+#define CCM_INTENSET_ENDKSGEN_Msk (0x1UL << CCM_INTENSET_ENDKSGEN_Pos) /*!< Bit mask of ENDKSGEN field. */
+#define CCM_INTENSET_ENDKSGEN_Disabled (0UL) /*!< Read: Disabled */
+#define CCM_INTENSET_ENDKSGEN_Enabled (1UL) /*!< Read: Enabled */
+#define CCM_INTENSET_ENDKSGEN_Set (1UL) /*!< Enable */
+
+/* Register: CCM_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 2 : Deprecated intclrfield - Write '1' to disable interrupt for event ERROR */
+#define CCM_INTENCLR_ERROR_Pos (2UL) /*!< Position of ERROR field. */
+#define CCM_INTENCLR_ERROR_Msk (0x1UL << CCM_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define CCM_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */
+#define CCM_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */
+#define CCM_INTENCLR_ERROR_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event ENDCRYPT */
+#define CCM_INTENCLR_ENDCRYPT_Pos (1UL) /*!< Position of ENDCRYPT field. */
+#define CCM_INTENCLR_ENDCRYPT_Msk (0x1UL << CCM_INTENCLR_ENDCRYPT_Pos) /*!< Bit mask of ENDCRYPT field. */
+#define CCM_INTENCLR_ENDCRYPT_Disabled (0UL) /*!< Read: Disabled */
+#define CCM_INTENCLR_ENDCRYPT_Enabled (1UL) /*!< Read: Enabled */
+#define CCM_INTENCLR_ENDCRYPT_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event ENDKSGEN */
+#define CCM_INTENCLR_ENDKSGEN_Pos (0UL) /*!< Position of ENDKSGEN field. */
+#define CCM_INTENCLR_ENDKSGEN_Msk (0x1UL << CCM_INTENCLR_ENDKSGEN_Pos) /*!< Bit mask of ENDKSGEN field. */
+#define CCM_INTENCLR_ENDKSGEN_Disabled (0UL) /*!< Read: Disabled */
+#define CCM_INTENCLR_ENDKSGEN_Enabled (1UL) /*!< Read: Enabled */
+#define CCM_INTENCLR_ENDKSGEN_Clear (1UL) /*!< Disable */
+
+/* Register: CCM_MICSTATUS */
+/* Description: MIC check result */
+
+/* Bit 0 : The result of the MIC check performed during the previous decryption operation */
+#define CCM_MICSTATUS_MICSTATUS_Pos (0UL) /*!< Position of MICSTATUS field. */
+#define CCM_MICSTATUS_MICSTATUS_Msk (0x1UL << CCM_MICSTATUS_MICSTATUS_Pos) /*!< Bit mask of MICSTATUS field. */
+#define CCM_MICSTATUS_MICSTATUS_CheckFailed (0UL) /*!< MIC check failed */
+#define CCM_MICSTATUS_MICSTATUS_CheckPassed (1UL) /*!< MIC check passed */
+
+/* Register: CCM_ENABLE */
+/* Description: Enable */
+
+/* Bits 1..0 : Enable or disable CCM */
+#define CCM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define CCM_ENABLE_ENABLE_Msk (0x3UL << CCM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define CCM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */
+#define CCM_ENABLE_ENABLE_Enabled (2UL) /*!< Enable */
+
+/* Register: CCM_MODE */
+/* Description: Operation mode */
+
+/* Bit 24 : Packet length configuration */
+#define CCM_MODE_LENGTH_Pos (24UL) /*!< Position of LENGTH field. */
+#define CCM_MODE_LENGTH_Msk (0x1UL << CCM_MODE_LENGTH_Pos) /*!< Bit mask of LENGTH field. */
+#define CCM_MODE_LENGTH_Default (0UL) /*!< Default length. Effective length of LENGTH field in encrypted/decrypted packet is 5 bits. A key-stream for packet payloads up to 27 bytes will be generated. */
+#define CCM_MODE_LENGTH_Extended (1UL) /*!< Extended length. Effective length of LENGTH field in encrypted/decrypted packet is 8 bits. A key-stream for packet payloads up to MAXPACKETSIZE bytes will be generated. */
+
+/* Bits 17..16 : Radio data rate that the CCM shall run synchronous with */
+#define CCM_MODE_DATARATE_Pos (16UL) /*!< Position of DATARATE field. */
+#define CCM_MODE_DATARATE_Msk (0x3UL << CCM_MODE_DATARATE_Pos) /*!< Bit mask of DATARATE field. */
+#define CCM_MODE_DATARATE_1Mbit (0UL) /*!< 1 Mbps */
+#define CCM_MODE_DATARATE_2Mbit (1UL) /*!< 2 Mbps */
+#define CCM_MODE_DATARATE_125Kbps (2UL) /*!< 125 Kbps */
+#define CCM_MODE_DATARATE_500Kbps (3UL) /*!< 500 Kbps */
+
+/* Bit 0 : The mode of operation to be used. The settings in this register apply whenever either the KSGEN or CRYPT tasks are triggered. */
+#define CCM_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */
+#define CCM_MODE_MODE_Msk (0x1UL << CCM_MODE_MODE_Pos) /*!< Bit mask of MODE field. */
+#define CCM_MODE_MODE_Encryption (0UL) /*!< AES CCM packet encryption mode */
+#define CCM_MODE_MODE_Decryption (1UL) /*!< AES CCM packet decryption mode */
+
+/* Register: CCM_CNFPTR */
+/* Description: Pointer to data structure holding AES key and NONCE vector */
+
+/* Bits 31..0 : Pointer to the data structure holding the AES key and the CCM NONCE vector (see Table 1 CCM data structure overview) */
+#define CCM_CNFPTR_CNFPTR_Pos (0UL) /*!< Position of CNFPTR field. */
+#define CCM_CNFPTR_CNFPTR_Msk (0xFFFFFFFFUL << CCM_CNFPTR_CNFPTR_Pos) /*!< Bit mask of CNFPTR field. */
+
+/* Register: CCM_INPTR */
+/* Description: Input pointer */
+
+/* Bits 31..0 : Input pointer */
+#define CCM_INPTR_INPTR_Pos (0UL) /*!< Position of INPTR field. */
+#define CCM_INPTR_INPTR_Msk (0xFFFFFFFFUL << CCM_INPTR_INPTR_Pos) /*!< Bit mask of INPTR field. */
+
+/* Register: CCM_OUTPTR */
+/* Description: Output pointer */
+
+/* Bits 31..0 : Output pointer */
+#define CCM_OUTPTR_OUTPTR_Pos (0UL) /*!< Position of OUTPTR field. */
+#define CCM_OUTPTR_OUTPTR_Msk (0xFFFFFFFFUL << CCM_OUTPTR_OUTPTR_Pos) /*!< Bit mask of OUTPTR field. */
+
+/* Register: CCM_SCRATCHPTR */
+/* Description: Pointer to data area used for temporary storage */
+
+/* Bits 31..0 : Pointer to a scratch data area used for temporary storage during key-stream generation,
+ MIC generation and encryption/decryption. */
+#define CCM_SCRATCHPTR_SCRATCHPTR_Pos (0UL) /*!< Position of SCRATCHPTR field. */
+#define CCM_SCRATCHPTR_SCRATCHPTR_Msk (0xFFFFFFFFUL << CCM_SCRATCHPTR_SCRATCHPTR_Pos) /*!< Bit mask of SCRATCHPTR field. */
+
+/* Register: CCM_MAXPACKETSIZE */
+/* Description: Length of key-stream generated when MODE.LENGTH = Extended. */
+
+/* Bits 7..0 : Length of key-stream generated when MODE.LENGTH = Extended. This value must be greater or equal to the subsequent packet payload to be encrypted/decrypted. */
+#define CCM_MAXPACKETSIZE_MAXPACKETSIZE_Pos (0UL) /*!< Position of MAXPACKETSIZE field. */
+#define CCM_MAXPACKETSIZE_MAXPACKETSIZE_Msk (0xFFUL << CCM_MAXPACKETSIZE_MAXPACKETSIZE_Pos) /*!< Bit mask of MAXPACKETSIZE field. */
+
+/* Register: CCM_RATEOVERRIDE */
+/* Description: Data rate override setting. */
+
+/* Bits 1..0 : Data rate override setting. */
+#define CCM_RATEOVERRIDE_RATEOVERRIDE_Pos (0UL) /*!< Position of RATEOVERRIDE field. */
+#define CCM_RATEOVERRIDE_RATEOVERRIDE_Msk (0x3UL << CCM_RATEOVERRIDE_RATEOVERRIDE_Pos) /*!< Bit mask of RATEOVERRIDE field. */
+#define CCM_RATEOVERRIDE_RATEOVERRIDE_1Mbit (0UL) /*!< 1 Mbps */
+#define CCM_RATEOVERRIDE_RATEOVERRIDE_2Mbit (1UL) /*!< 2 Mbps */
+#define CCM_RATEOVERRIDE_RATEOVERRIDE_125Kbps (2UL) /*!< 125 Kbps */
+#define CCM_RATEOVERRIDE_RATEOVERRIDE_500Kbps (3UL) /*!< 500 Kbps */
+
+
+/* Peripheral: CLOCK */
+/* Description: Clock control */
+
+/* Register: CLOCK_TASKS_HFCLKSTART */
+/* Description: Start HFCLK crystal oscillator */
+
+/* Bit 0 : Start HFCLK crystal oscillator */
+#define CLOCK_TASKS_HFCLKSTART_TASKS_HFCLKSTART_Pos (0UL) /*!< Position of TASKS_HFCLKSTART field. */
+#define CLOCK_TASKS_HFCLKSTART_TASKS_HFCLKSTART_Msk (0x1UL << CLOCK_TASKS_HFCLKSTART_TASKS_HFCLKSTART_Pos) /*!< Bit mask of TASKS_HFCLKSTART field. */
+#define CLOCK_TASKS_HFCLKSTART_TASKS_HFCLKSTART_Trigger (1UL) /*!< Trigger task */
+
+/* Register: CLOCK_TASKS_HFCLKSTOP */
+/* Description: Stop HFCLK crystal oscillator */
+
+/* Bit 0 : Stop HFCLK crystal oscillator */
+#define CLOCK_TASKS_HFCLKSTOP_TASKS_HFCLKSTOP_Pos (0UL) /*!< Position of TASKS_HFCLKSTOP field. */
+#define CLOCK_TASKS_HFCLKSTOP_TASKS_HFCLKSTOP_Msk (0x1UL << CLOCK_TASKS_HFCLKSTOP_TASKS_HFCLKSTOP_Pos) /*!< Bit mask of TASKS_HFCLKSTOP field. */
+#define CLOCK_TASKS_HFCLKSTOP_TASKS_HFCLKSTOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: CLOCK_TASKS_LFCLKSTART */
+/* Description: Start LFCLK source */
+
+/* Bit 0 : Start LFCLK source */
+#define CLOCK_TASKS_LFCLKSTART_TASKS_LFCLKSTART_Pos (0UL) /*!< Position of TASKS_LFCLKSTART field. */
+#define CLOCK_TASKS_LFCLKSTART_TASKS_LFCLKSTART_Msk (0x1UL << CLOCK_TASKS_LFCLKSTART_TASKS_LFCLKSTART_Pos) /*!< Bit mask of TASKS_LFCLKSTART field. */
+#define CLOCK_TASKS_LFCLKSTART_TASKS_LFCLKSTART_Trigger (1UL) /*!< Trigger task */
+
+/* Register: CLOCK_TASKS_LFCLKSTOP */
+/* Description: Stop LFCLK source */
+
+/* Bit 0 : Stop LFCLK source */
+#define CLOCK_TASKS_LFCLKSTOP_TASKS_LFCLKSTOP_Pos (0UL) /*!< Position of TASKS_LFCLKSTOP field. */
+#define CLOCK_TASKS_LFCLKSTOP_TASKS_LFCLKSTOP_Msk (0x1UL << CLOCK_TASKS_LFCLKSTOP_TASKS_LFCLKSTOP_Pos) /*!< Bit mask of TASKS_LFCLKSTOP field. */
+#define CLOCK_TASKS_LFCLKSTOP_TASKS_LFCLKSTOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: CLOCK_TASKS_CAL */
+/* Description: Start calibration of LFRC oscillator */
+
+/* Bit 0 : Start calibration of LFRC oscillator */
+#define CLOCK_TASKS_CAL_TASKS_CAL_Pos (0UL) /*!< Position of TASKS_CAL field. */
+#define CLOCK_TASKS_CAL_TASKS_CAL_Msk (0x1UL << CLOCK_TASKS_CAL_TASKS_CAL_Pos) /*!< Bit mask of TASKS_CAL field. */
+#define CLOCK_TASKS_CAL_TASKS_CAL_Trigger (1UL) /*!< Trigger task */
+
+/* Register: CLOCK_TASKS_CTSTART */
+/* Description: Start calibration timer */
+
+/* Bit 0 : Start calibration timer */
+#define CLOCK_TASKS_CTSTART_TASKS_CTSTART_Pos (0UL) /*!< Position of TASKS_CTSTART field. */
+#define CLOCK_TASKS_CTSTART_TASKS_CTSTART_Msk (0x1UL << CLOCK_TASKS_CTSTART_TASKS_CTSTART_Pos) /*!< Bit mask of TASKS_CTSTART field. */
+#define CLOCK_TASKS_CTSTART_TASKS_CTSTART_Trigger (1UL) /*!< Trigger task */
+
+/* Register: CLOCK_TASKS_CTSTOP */
+/* Description: Stop calibration timer */
+
+/* Bit 0 : Stop calibration timer */
+#define CLOCK_TASKS_CTSTOP_TASKS_CTSTOP_Pos (0UL) /*!< Position of TASKS_CTSTOP field. */
+#define CLOCK_TASKS_CTSTOP_TASKS_CTSTOP_Msk (0x1UL << CLOCK_TASKS_CTSTOP_TASKS_CTSTOP_Pos) /*!< Bit mask of TASKS_CTSTOP field. */
+#define CLOCK_TASKS_CTSTOP_TASKS_CTSTOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: CLOCK_EVENTS_HFCLKSTARTED */
+/* Description: HFCLK oscillator started */
+
+/* Bit 0 : HFCLK oscillator started */
+#define CLOCK_EVENTS_HFCLKSTARTED_EVENTS_HFCLKSTARTED_Pos (0UL) /*!< Position of EVENTS_HFCLKSTARTED field. */
+#define CLOCK_EVENTS_HFCLKSTARTED_EVENTS_HFCLKSTARTED_Msk (0x1UL << CLOCK_EVENTS_HFCLKSTARTED_EVENTS_HFCLKSTARTED_Pos) /*!< Bit mask of EVENTS_HFCLKSTARTED field. */
+#define CLOCK_EVENTS_HFCLKSTARTED_EVENTS_HFCLKSTARTED_NotGenerated (0UL) /*!< Event not generated */
+#define CLOCK_EVENTS_HFCLKSTARTED_EVENTS_HFCLKSTARTED_Generated (1UL) /*!< Event generated */
+
+/* Register: CLOCK_EVENTS_LFCLKSTARTED */
+/* Description: LFCLK started */
+
+/* Bit 0 : LFCLK started */
+#define CLOCK_EVENTS_LFCLKSTARTED_EVENTS_LFCLKSTARTED_Pos (0UL) /*!< Position of EVENTS_LFCLKSTARTED field. */
+#define CLOCK_EVENTS_LFCLKSTARTED_EVENTS_LFCLKSTARTED_Msk (0x1UL << CLOCK_EVENTS_LFCLKSTARTED_EVENTS_LFCLKSTARTED_Pos) /*!< Bit mask of EVENTS_LFCLKSTARTED field. */
+#define CLOCK_EVENTS_LFCLKSTARTED_EVENTS_LFCLKSTARTED_NotGenerated (0UL) /*!< Event not generated */
+#define CLOCK_EVENTS_LFCLKSTARTED_EVENTS_LFCLKSTARTED_Generated (1UL) /*!< Event generated */
+
+/* Register: CLOCK_EVENTS_DONE */
+/* Description: Calibration of LFCLK RC oscillator complete event */
+
+/* Bit 0 : Calibration of LFCLK RC oscillator complete event */
+#define CLOCK_EVENTS_DONE_EVENTS_DONE_Pos (0UL) /*!< Position of EVENTS_DONE field. */
+#define CLOCK_EVENTS_DONE_EVENTS_DONE_Msk (0x1UL << CLOCK_EVENTS_DONE_EVENTS_DONE_Pos) /*!< Bit mask of EVENTS_DONE field. */
+#define CLOCK_EVENTS_DONE_EVENTS_DONE_NotGenerated (0UL) /*!< Event not generated */
+#define CLOCK_EVENTS_DONE_EVENTS_DONE_Generated (1UL) /*!< Event generated */
+
+/* Register: CLOCK_EVENTS_CTTO */
+/* Description: Calibration timer timeout */
+
+/* Bit 0 : Calibration timer timeout */
+#define CLOCK_EVENTS_CTTO_EVENTS_CTTO_Pos (0UL) /*!< Position of EVENTS_CTTO field. */
+#define CLOCK_EVENTS_CTTO_EVENTS_CTTO_Msk (0x1UL << CLOCK_EVENTS_CTTO_EVENTS_CTTO_Pos) /*!< Bit mask of EVENTS_CTTO field. */
+#define CLOCK_EVENTS_CTTO_EVENTS_CTTO_NotGenerated (0UL) /*!< Event not generated */
+#define CLOCK_EVENTS_CTTO_EVENTS_CTTO_Generated (1UL) /*!< Event generated */
+
+/* Register: CLOCK_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 4 : Write '1' to enable interrupt for event CTTO */
+#define CLOCK_INTENSET_CTTO_Pos (4UL) /*!< Position of CTTO field. */
+#define CLOCK_INTENSET_CTTO_Msk (0x1UL << CLOCK_INTENSET_CTTO_Pos) /*!< Bit mask of CTTO field. */
+#define CLOCK_INTENSET_CTTO_Disabled (0UL) /*!< Read: Disabled */
+#define CLOCK_INTENSET_CTTO_Enabled (1UL) /*!< Read: Enabled */
+#define CLOCK_INTENSET_CTTO_Set (1UL) /*!< Enable */
+
+/* Bit 3 : Write '1' to enable interrupt for event DONE */
+#define CLOCK_INTENSET_DONE_Pos (3UL) /*!< Position of DONE field. */
+#define CLOCK_INTENSET_DONE_Msk (0x1UL << CLOCK_INTENSET_DONE_Pos) /*!< Bit mask of DONE field. */
+#define CLOCK_INTENSET_DONE_Disabled (0UL) /*!< Read: Disabled */
+#define CLOCK_INTENSET_DONE_Enabled (1UL) /*!< Read: Enabled */
+#define CLOCK_INTENSET_DONE_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event LFCLKSTARTED */
+#define CLOCK_INTENSET_LFCLKSTARTED_Pos (1UL) /*!< Position of LFCLKSTARTED field. */
+#define CLOCK_INTENSET_LFCLKSTARTED_Msk (0x1UL << CLOCK_INTENSET_LFCLKSTARTED_Pos) /*!< Bit mask of LFCLKSTARTED field. */
+#define CLOCK_INTENSET_LFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define CLOCK_INTENSET_LFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define CLOCK_INTENSET_LFCLKSTARTED_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event HFCLKSTARTED */
+#define CLOCK_INTENSET_HFCLKSTARTED_Pos (0UL) /*!< Position of HFCLKSTARTED field. */
+#define CLOCK_INTENSET_HFCLKSTARTED_Msk (0x1UL << CLOCK_INTENSET_HFCLKSTARTED_Pos) /*!< Bit mask of HFCLKSTARTED field. */
+#define CLOCK_INTENSET_HFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define CLOCK_INTENSET_HFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define CLOCK_INTENSET_HFCLKSTARTED_Set (1UL) /*!< Enable */
+
+/* Register: CLOCK_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 4 : Write '1' to disable interrupt for event CTTO */
+#define CLOCK_INTENCLR_CTTO_Pos (4UL) /*!< Position of CTTO field. */
+#define CLOCK_INTENCLR_CTTO_Msk (0x1UL << CLOCK_INTENCLR_CTTO_Pos) /*!< Bit mask of CTTO field. */
+#define CLOCK_INTENCLR_CTTO_Disabled (0UL) /*!< Read: Disabled */
+#define CLOCK_INTENCLR_CTTO_Enabled (1UL) /*!< Read: Enabled */
+#define CLOCK_INTENCLR_CTTO_Clear (1UL) /*!< Disable */
+
+/* Bit 3 : Write '1' to disable interrupt for event DONE */
+#define CLOCK_INTENCLR_DONE_Pos (3UL) /*!< Position of DONE field. */
+#define CLOCK_INTENCLR_DONE_Msk (0x1UL << CLOCK_INTENCLR_DONE_Pos) /*!< Bit mask of DONE field. */
+#define CLOCK_INTENCLR_DONE_Disabled (0UL) /*!< Read: Disabled */
+#define CLOCK_INTENCLR_DONE_Enabled (1UL) /*!< Read: Enabled */
+#define CLOCK_INTENCLR_DONE_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event LFCLKSTARTED */
+#define CLOCK_INTENCLR_LFCLKSTARTED_Pos (1UL) /*!< Position of LFCLKSTARTED field. */
+#define CLOCK_INTENCLR_LFCLKSTARTED_Msk (0x1UL << CLOCK_INTENCLR_LFCLKSTARTED_Pos) /*!< Bit mask of LFCLKSTARTED field. */
+#define CLOCK_INTENCLR_LFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define CLOCK_INTENCLR_LFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define CLOCK_INTENCLR_LFCLKSTARTED_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event HFCLKSTARTED */
+#define CLOCK_INTENCLR_HFCLKSTARTED_Pos (0UL) /*!< Position of HFCLKSTARTED field. */
+#define CLOCK_INTENCLR_HFCLKSTARTED_Msk (0x1UL << CLOCK_INTENCLR_HFCLKSTARTED_Pos) /*!< Bit mask of HFCLKSTARTED field. */
+#define CLOCK_INTENCLR_HFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define CLOCK_INTENCLR_HFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define CLOCK_INTENCLR_HFCLKSTARTED_Clear (1UL) /*!< Disable */
+
+/* Register: CLOCK_HFCLKRUN */
+/* Description: Status indicating that HFCLKSTART task has been triggered */
+
+/* Bit 0 : HFCLKSTART task triggered or not */
+#define CLOCK_HFCLKRUN_STATUS_Pos (0UL) /*!< Position of STATUS field. */
+#define CLOCK_HFCLKRUN_STATUS_Msk (0x1UL << CLOCK_HFCLKRUN_STATUS_Pos) /*!< Bit mask of STATUS field. */
+#define CLOCK_HFCLKRUN_STATUS_NotTriggered (0UL) /*!< Task not triggered */
+#define CLOCK_HFCLKRUN_STATUS_Triggered (1UL) /*!< Task triggered */
+
+/* Register: CLOCK_HFCLKSTAT */
+/* Description: HFCLK status */
+
+/* Bit 16 : HFCLK state */
+#define CLOCK_HFCLKSTAT_STATE_Pos (16UL) /*!< Position of STATE field. */
+#define CLOCK_HFCLKSTAT_STATE_Msk (0x1UL << CLOCK_HFCLKSTAT_STATE_Pos) /*!< Bit mask of STATE field. */
+#define CLOCK_HFCLKSTAT_STATE_NotRunning (0UL) /*!< HFCLK not running */
+#define CLOCK_HFCLKSTAT_STATE_Running (1UL) /*!< HFCLK running */
+
+/* Bit 0 : Source of HFCLK */
+#define CLOCK_HFCLKSTAT_SRC_Pos (0UL) /*!< Position of SRC field. */
+#define CLOCK_HFCLKSTAT_SRC_Msk (0x1UL << CLOCK_HFCLKSTAT_SRC_Pos) /*!< Bit mask of SRC field. */
+#define CLOCK_HFCLKSTAT_SRC_RC (0UL) /*!< 64 MHz internal oscillator (HFINT) */
+#define CLOCK_HFCLKSTAT_SRC_Xtal (1UL) /*!< 64 MHz crystal oscillator (HFXO) */
+
+/* Register: CLOCK_LFCLKRUN */
+/* Description: Status indicating that LFCLKSTART task has been triggered */
+
+/* Bit 0 : LFCLKSTART task triggered or not */
+#define CLOCK_LFCLKRUN_STATUS_Pos (0UL) /*!< Position of STATUS field. */
+#define CLOCK_LFCLKRUN_STATUS_Msk (0x1UL << CLOCK_LFCLKRUN_STATUS_Pos) /*!< Bit mask of STATUS field. */
+#define CLOCK_LFCLKRUN_STATUS_NotTriggered (0UL) /*!< Task not triggered */
+#define CLOCK_LFCLKRUN_STATUS_Triggered (1UL) /*!< Task triggered */
+
+/* Register: CLOCK_LFCLKSTAT */
+/* Description: LFCLK status */
+
+/* Bit 16 : LFCLK state */
+#define CLOCK_LFCLKSTAT_STATE_Pos (16UL) /*!< Position of STATE field. */
+#define CLOCK_LFCLKSTAT_STATE_Msk (0x1UL << CLOCK_LFCLKSTAT_STATE_Pos) /*!< Bit mask of STATE field. */
+#define CLOCK_LFCLKSTAT_STATE_NotRunning (0UL) /*!< LFCLK not running */
+#define CLOCK_LFCLKSTAT_STATE_Running (1UL) /*!< LFCLK running */
+
+/* Bits 1..0 : Source of LFCLK */
+#define CLOCK_LFCLKSTAT_SRC_Pos (0UL) /*!< Position of SRC field. */
+#define CLOCK_LFCLKSTAT_SRC_Msk (0x3UL << CLOCK_LFCLKSTAT_SRC_Pos) /*!< Bit mask of SRC field. */
+#define CLOCK_LFCLKSTAT_SRC_RC (0UL) /*!< 32.768 kHz RC oscillator */
+#define CLOCK_LFCLKSTAT_SRC_Xtal (1UL) /*!< 32.768 kHz crystal oscillator */
+#define CLOCK_LFCLKSTAT_SRC_Synth (2UL) /*!< 32.768 kHz synthesized from HFCLK */
+
+/* Register: CLOCK_LFCLKSRCCOPY */
+/* Description: Copy of LFCLKSRC register, set when LFCLKSTART task was triggered */
+
+/* Bits 1..0 : Clock source */
+#define CLOCK_LFCLKSRCCOPY_SRC_Pos (0UL) /*!< Position of SRC field. */
+#define CLOCK_LFCLKSRCCOPY_SRC_Msk (0x3UL << CLOCK_LFCLKSRCCOPY_SRC_Pos) /*!< Bit mask of SRC field. */
+#define CLOCK_LFCLKSRCCOPY_SRC_RC (0UL) /*!< 32.768 kHz RC oscillator */
+#define CLOCK_LFCLKSRCCOPY_SRC_Xtal (1UL) /*!< 32.768 kHz crystal oscillator */
+#define CLOCK_LFCLKSRCCOPY_SRC_Synth (2UL) /*!< 32.768 kHz synthesized from HFCLK */
+
+/* Register: CLOCK_LFCLKSRC */
+/* Description: Clock source for the LFCLK */
+
+/* Bit 17 : Enable or disable external source for LFCLK */
+#define CLOCK_LFCLKSRC_EXTERNAL_Pos (17UL) /*!< Position of EXTERNAL field. */
+#define CLOCK_LFCLKSRC_EXTERNAL_Msk (0x1UL << CLOCK_LFCLKSRC_EXTERNAL_Pos) /*!< Bit mask of EXTERNAL field. */
+#define CLOCK_LFCLKSRC_EXTERNAL_Disabled (0UL) /*!< Disable external source (use with Xtal) */
+#define CLOCK_LFCLKSRC_EXTERNAL_Enabled (1UL) /*!< Enable use of external source instead of Xtal (SRC needs to be set to Xtal) */
+
+/* Bit 16 : Enable or disable bypass of LFCLK crystal oscillator with external clock source */
+#define CLOCK_LFCLKSRC_BYPASS_Pos (16UL) /*!< Position of BYPASS field. */
+#define CLOCK_LFCLKSRC_BYPASS_Msk (0x1UL << CLOCK_LFCLKSRC_BYPASS_Pos) /*!< Bit mask of BYPASS field. */
+#define CLOCK_LFCLKSRC_BYPASS_Disabled (0UL) /*!< Disable (use with Xtal or low-swing external source) */
+#define CLOCK_LFCLKSRC_BYPASS_Enabled (1UL) /*!< Enable (use with rail-to-rail external source) */
+
+/* Bits 1..0 : Clock source */
+#define CLOCK_LFCLKSRC_SRC_Pos (0UL) /*!< Position of SRC field. */
+#define CLOCK_LFCLKSRC_SRC_Msk (0x3UL << CLOCK_LFCLKSRC_SRC_Pos) /*!< Bit mask of SRC field. */
+#define CLOCK_LFCLKSRC_SRC_RC (0UL) /*!< 32.768 kHz RC oscillator */
+#define CLOCK_LFCLKSRC_SRC_Xtal (1UL) /*!< 32.768 kHz crystal oscillator */
+#define CLOCK_LFCLKSRC_SRC_Synth (2UL) /*!< 32.768 kHz synthesized from HFCLK */
+
+/* Register: CLOCK_CTIV */
+/* Description: Calibration timer interval */
+
+/* Bits 6..0 : Calibration timer interval in multiple of 0.25 seconds. Range: 0.25 seconds to 31.75 seconds. */
+#define CLOCK_CTIV_CTIV_Pos (0UL) /*!< Position of CTIV field. */
+#define CLOCK_CTIV_CTIV_Msk (0x7FUL << CLOCK_CTIV_CTIV_Pos) /*!< Bit mask of CTIV field. */
+
+
+/* Peripheral: ECB */
+/* Description: AES ECB Mode Encryption */
+
+/* Register: ECB_TASKS_STARTECB */
+/* Description: Start ECB block encrypt */
+
+/* Bit 0 : Start ECB block encrypt */
+#define ECB_TASKS_STARTECB_TASKS_STARTECB_Pos (0UL) /*!< Position of TASKS_STARTECB field. */
+#define ECB_TASKS_STARTECB_TASKS_STARTECB_Msk (0x1UL << ECB_TASKS_STARTECB_TASKS_STARTECB_Pos) /*!< Bit mask of TASKS_STARTECB field. */
+#define ECB_TASKS_STARTECB_TASKS_STARTECB_Trigger (1UL) /*!< Trigger task */
+
+/* Register: ECB_TASKS_STOPECB */
+/* Description: Abort a possible executing ECB operation */
+
+/* Bit 0 : Abort a possible executing ECB operation */
+#define ECB_TASKS_STOPECB_TASKS_STOPECB_Pos (0UL) /*!< Position of TASKS_STOPECB field. */
+#define ECB_TASKS_STOPECB_TASKS_STOPECB_Msk (0x1UL << ECB_TASKS_STOPECB_TASKS_STOPECB_Pos) /*!< Bit mask of TASKS_STOPECB field. */
+#define ECB_TASKS_STOPECB_TASKS_STOPECB_Trigger (1UL) /*!< Trigger task */
+
+/* Register: ECB_EVENTS_ENDECB */
+/* Description: ECB block encrypt complete */
+
+/* Bit 0 : ECB block encrypt complete */
+#define ECB_EVENTS_ENDECB_EVENTS_ENDECB_Pos (0UL) /*!< Position of EVENTS_ENDECB field. */
+#define ECB_EVENTS_ENDECB_EVENTS_ENDECB_Msk (0x1UL << ECB_EVENTS_ENDECB_EVENTS_ENDECB_Pos) /*!< Bit mask of EVENTS_ENDECB field. */
+#define ECB_EVENTS_ENDECB_EVENTS_ENDECB_NotGenerated (0UL) /*!< Event not generated */
+#define ECB_EVENTS_ENDECB_EVENTS_ENDECB_Generated (1UL) /*!< Event generated */
+
+/* Register: ECB_EVENTS_ERRORECB */
+/* Description: ECB block encrypt aborted because of a STOPECB task or due to an error */
+
+/* Bit 0 : ECB block encrypt aborted because of a STOPECB task or due to an error */
+#define ECB_EVENTS_ERRORECB_EVENTS_ERRORECB_Pos (0UL) /*!< Position of EVENTS_ERRORECB field. */
+#define ECB_EVENTS_ERRORECB_EVENTS_ERRORECB_Msk (0x1UL << ECB_EVENTS_ERRORECB_EVENTS_ERRORECB_Pos) /*!< Bit mask of EVENTS_ERRORECB field. */
+#define ECB_EVENTS_ERRORECB_EVENTS_ERRORECB_NotGenerated (0UL) /*!< Event not generated */
+#define ECB_EVENTS_ERRORECB_EVENTS_ERRORECB_Generated (1UL) /*!< Event generated */
+
+/* Register: ECB_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 1 : Write '1' to enable interrupt for event ERRORECB */
+#define ECB_INTENSET_ERRORECB_Pos (1UL) /*!< Position of ERRORECB field. */
+#define ECB_INTENSET_ERRORECB_Msk (0x1UL << ECB_INTENSET_ERRORECB_Pos) /*!< Bit mask of ERRORECB field. */
+#define ECB_INTENSET_ERRORECB_Disabled (0UL) /*!< Read: Disabled */
+#define ECB_INTENSET_ERRORECB_Enabled (1UL) /*!< Read: Enabled */
+#define ECB_INTENSET_ERRORECB_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event ENDECB */
+#define ECB_INTENSET_ENDECB_Pos (0UL) /*!< Position of ENDECB field. */
+#define ECB_INTENSET_ENDECB_Msk (0x1UL << ECB_INTENSET_ENDECB_Pos) /*!< Bit mask of ENDECB field. */
+#define ECB_INTENSET_ENDECB_Disabled (0UL) /*!< Read: Disabled */
+#define ECB_INTENSET_ENDECB_Enabled (1UL) /*!< Read: Enabled */
+#define ECB_INTENSET_ENDECB_Set (1UL) /*!< Enable */
+
+/* Register: ECB_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 1 : Write '1' to disable interrupt for event ERRORECB */
+#define ECB_INTENCLR_ERRORECB_Pos (1UL) /*!< Position of ERRORECB field. */
+#define ECB_INTENCLR_ERRORECB_Msk (0x1UL << ECB_INTENCLR_ERRORECB_Pos) /*!< Bit mask of ERRORECB field. */
+#define ECB_INTENCLR_ERRORECB_Disabled (0UL) /*!< Read: Disabled */
+#define ECB_INTENCLR_ERRORECB_Enabled (1UL) /*!< Read: Enabled */
+#define ECB_INTENCLR_ERRORECB_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event ENDECB */
+#define ECB_INTENCLR_ENDECB_Pos (0UL) /*!< Position of ENDECB field. */
+#define ECB_INTENCLR_ENDECB_Msk (0x1UL << ECB_INTENCLR_ENDECB_Pos) /*!< Bit mask of ENDECB field. */
+#define ECB_INTENCLR_ENDECB_Disabled (0UL) /*!< Read: Disabled */
+#define ECB_INTENCLR_ENDECB_Enabled (1UL) /*!< Read: Enabled */
+#define ECB_INTENCLR_ENDECB_Clear (1UL) /*!< Disable */
+
+/* Register: ECB_ECBDATAPTR */
+/* Description: ECB block encrypt memory pointers */
+
+/* Bits 31..0 : Pointer to the ECB data structure (see Table 1 ECB data structure overview) */
+#define ECB_ECBDATAPTR_ECBDATAPTR_Pos (0UL) /*!< Position of ECBDATAPTR field. */
+#define ECB_ECBDATAPTR_ECBDATAPTR_Msk (0xFFFFFFFFUL << ECB_ECBDATAPTR_ECBDATAPTR_Pos) /*!< Bit mask of ECBDATAPTR field. */
+
+
+/* Peripheral: EGU */
+/* Description: Event Generator Unit 0 */
+
+/* Register: EGU_TASKS_TRIGGER */
+/* Description: Description collection: Trigger n for triggering the corresponding TRIGGERED[n] event */
+
+/* Bit 0 : Trigger n for triggering the corresponding TRIGGERED[n] event */
+#define EGU_TASKS_TRIGGER_TASKS_TRIGGER_Pos (0UL) /*!< Position of TASKS_TRIGGER field. */
+#define EGU_TASKS_TRIGGER_TASKS_TRIGGER_Msk (0x1UL << EGU_TASKS_TRIGGER_TASKS_TRIGGER_Pos) /*!< Bit mask of TASKS_TRIGGER field. */
+#define EGU_TASKS_TRIGGER_TASKS_TRIGGER_Trigger (1UL) /*!< Trigger task */
+
+/* Register: EGU_EVENTS_TRIGGERED */
+/* Description: Description collection: Event number n generated by triggering the corresponding TRIGGER[n] task */
+
+/* Bit 0 : Event number n generated by triggering the corresponding TRIGGER[n] task */
+#define EGU_EVENTS_TRIGGERED_EVENTS_TRIGGERED_Pos (0UL) /*!< Position of EVENTS_TRIGGERED field. */
+#define EGU_EVENTS_TRIGGERED_EVENTS_TRIGGERED_Msk (0x1UL << EGU_EVENTS_TRIGGERED_EVENTS_TRIGGERED_Pos) /*!< Bit mask of EVENTS_TRIGGERED field. */
+#define EGU_EVENTS_TRIGGERED_EVENTS_TRIGGERED_NotGenerated (0UL) /*!< Event not generated */
+#define EGU_EVENTS_TRIGGERED_EVENTS_TRIGGERED_Generated (1UL) /*!< Event generated */
+
+/* Register: EGU_INTEN */
+/* Description: Enable or disable interrupt */
+
+/* Bit 15 : Enable or disable interrupt for event TRIGGERED[15] */
+#define EGU_INTEN_TRIGGERED15_Pos (15UL) /*!< Position of TRIGGERED15 field. */
+#define EGU_INTEN_TRIGGERED15_Msk (0x1UL << EGU_INTEN_TRIGGERED15_Pos) /*!< Bit mask of TRIGGERED15 field. */
+#define EGU_INTEN_TRIGGERED15_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED15_Enabled (1UL) /*!< Enable */
+
+/* Bit 14 : Enable or disable interrupt for event TRIGGERED[14] */
+#define EGU_INTEN_TRIGGERED14_Pos (14UL) /*!< Position of TRIGGERED14 field. */
+#define EGU_INTEN_TRIGGERED14_Msk (0x1UL << EGU_INTEN_TRIGGERED14_Pos) /*!< Bit mask of TRIGGERED14 field. */
+#define EGU_INTEN_TRIGGERED14_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED14_Enabled (1UL) /*!< Enable */
+
+/* Bit 13 : Enable or disable interrupt for event TRIGGERED[13] */
+#define EGU_INTEN_TRIGGERED13_Pos (13UL) /*!< Position of TRIGGERED13 field. */
+#define EGU_INTEN_TRIGGERED13_Msk (0x1UL << EGU_INTEN_TRIGGERED13_Pos) /*!< Bit mask of TRIGGERED13 field. */
+#define EGU_INTEN_TRIGGERED13_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED13_Enabled (1UL) /*!< Enable */
+
+/* Bit 12 : Enable or disable interrupt for event TRIGGERED[12] */
+#define EGU_INTEN_TRIGGERED12_Pos (12UL) /*!< Position of TRIGGERED12 field. */
+#define EGU_INTEN_TRIGGERED12_Msk (0x1UL << EGU_INTEN_TRIGGERED12_Pos) /*!< Bit mask of TRIGGERED12 field. */
+#define EGU_INTEN_TRIGGERED12_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED12_Enabled (1UL) /*!< Enable */
+
+/* Bit 11 : Enable or disable interrupt for event TRIGGERED[11] */
+#define EGU_INTEN_TRIGGERED11_Pos (11UL) /*!< Position of TRIGGERED11 field. */
+#define EGU_INTEN_TRIGGERED11_Msk (0x1UL << EGU_INTEN_TRIGGERED11_Pos) /*!< Bit mask of TRIGGERED11 field. */
+#define EGU_INTEN_TRIGGERED11_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED11_Enabled (1UL) /*!< Enable */
+
+/* Bit 10 : Enable or disable interrupt for event TRIGGERED[10] */
+#define EGU_INTEN_TRIGGERED10_Pos (10UL) /*!< Position of TRIGGERED10 field. */
+#define EGU_INTEN_TRIGGERED10_Msk (0x1UL << EGU_INTEN_TRIGGERED10_Pos) /*!< Bit mask of TRIGGERED10 field. */
+#define EGU_INTEN_TRIGGERED10_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED10_Enabled (1UL) /*!< Enable */
+
+/* Bit 9 : Enable or disable interrupt for event TRIGGERED[9] */
+#define EGU_INTEN_TRIGGERED9_Pos (9UL) /*!< Position of TRIGGERED9 field. */
+#define EGU_INTEN_TRIGGERED9_Msk (0x1UL << EGU_INTEN_TRIGGERED9_Pos) /*!< Bit mask of TRIGGERED9 field. */
+#define EGU_INTEN_TRIGGERED9_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED9_Enabled (1UL) /*!< Enable */
+
+/* Bit 8 : Enable or disable interrupt for event TRIGGERED[8] */
+#define EGU_INTEN_TRIGGERED8_Pos (8UL) /*!< Position of TRIGGERED8 field. */
+#define EGU_INTEN_TRIGGERED8_Msk (0x1UL << EGU_INTEN_TRIGGERED8_Pos) /*!< Bit mask of TRIGGERED8 field. */
+#define EGU_INTEN_TRIGGERED8_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED8_Enabled (1UL) /*!< Enable */
+
+/* Bit 7 : Enable or disable interrupt for event TRIGGERED[7] */
+#define EGU_INTEN_TRIGGERED7_Pos (7UL) /*!< Position of TRIGGERED7 field. */
+#define EGU_INTEN_TRIGGERED7_Msk (0x1UL << EGU_INTEN_TRIGGERED7_Pos) /*!< Bit mask of TRIGGERED7 field. */
+#define EGU_INTEN_TRIGGERED7_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED7_Enabled (1UL) /*!< Enable */
+
+/* Bit 6 : Enable or disable interrupt for event TRIGGERED[6] */
+#define EGU_INTEN_TRIGGERED6_Pos (6UL) /*!< Position of TRIGGERED6 field. */
+#define EGU_INTEN_TRIGGERED6_Msk (0x1UL << EGU_INTEN_TRIGGERED6_Pos) /*!< Bit mask of TRIGGERED6 field. */
+#define EGU_INTEN_TRIGGERED6_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED6_Enabled (1UL) /*!< Enable */
+
+/* Bit 5 : Enable or disable interrupt for event TRIGGERED[5] */
+#define EGU_INTEN_TRIGGERED5_Pos (5UL) /*!< Position of TRIGGERED5 field. */
+#define EGU_INTEN_TRIGGERED5_Msk (0x1UL << EGU_INTEN_TRIGGERED5_Pos) /*!< Bit mask of TRIGGERED5 field. */
+#define EGU_INTEN_TRIGGERED5_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED5_Enabled (1UL) /*!< Enable */
+
+/* Bit 4 : Enable or disable interrupt for event TRIGGERED[4] */
+#define EGU_INTEN_TRIGGERED4_Pos (4UL) /*!< Position of TRIGGERED4 field. */
+#define EGU_INTEN_TRIGGERED4_Msk (0x1UL << EGU_INTEN_TRIGGERED4_Pos) /*!< Bit mask of TRIGGERED4 field. */
+#define EGU_INTEN_TRIGGERED4_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED4_Enabled (1UL) /*!< Enable */
+
+/* Bit 3 : Enable or disable interrupt for event TRIGGERED[3] */
+#define EGU_INTEN_TRIGGERED3_Pos (3UL) /*!< Position of TRIGGERED3 field. */
+#define EGU_INTEN_TRIGGERED3_Msk (0x1UL << EGU_INTEN_TRIGGERED3_Pos) /*!< Bit mask of TRIGGERED3 field. */
+#define EGU_INTEN_TRIGGERED3_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED3_Enabled (1UL) /*!< Enable */
+
+/* Bit 2 : Enable or disable interrupt for event TRIGGERED[2] */
+#define EGU_INTEN_TRIGGERED2_Pos (2UL) /*!< Position of TRIGGERED2 field. */
+#define EGU_INTEN_TRIGGERED2_Msk (0x1UL << EGU_INTEN_TRIGGERED2_Pos) /*!< Bit mask of TRIGGERED2 field. */
+#define EGU_INTEN_TRIGGERED2_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED2_Enabled (1UL) /*!< Enable */
+
+/* Bit 1 : Enable or disable interrupt for event TRIGGERED[1] */
+#define EGU_INTEN_TRIGGERED1_Pos (1UL) /*!< Position of TRIGGERED1 field. */
+#define EGU_INTEN_TRIGGERED1_Msk (0x1UL << EGU_INTEN_TRIGGERED1_Pos) /*!< Bit mask of TRIGGERED1 field. */
+#define EGU_INTEN_TRIGGERED1_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED1_Enabled (1UL) /*!< Enable */
+
+/* Bit 0 : Enable or disable interrupt for event TRIGGERED[0] */
+#define EGU_INTEN_TRIGGERED0_Pos (0UL) /*!< Position of TRIGGERED0 field. */
+#define EGU_INTEN_TRIGGERED0_Msk (0x1UL << EGU_INTEN_TRIGGERED0_Pos) /*!< Bit mask of TRIGGERED0 field. */
+#define EGU_INTEN_TRIGGERED0_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED0_Enabled (1UL) /*!< Enable */
+
+/* Register: EGU_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 15 : Write '1' to enable interrupt for event TRIGGERED[15] */
+#define EGU_INTENSET_TRIGGERED15_Pos (15UL) /*!< Position of TRIGGERED15 field. */
+#define EGU_INTENSET_TRIGGERED15_Msk (0x1UL << EGU_INTENSET_TRIGGERED15_Pos) /*!< Bit mask of TRIGGERED15 field. */
+#define EGU_INTENSET_TRIGGERED15_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED15_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED15_Set (1UL) /*!< Enable */
+
+/* Bit 14 : Write '1' to enable interrupt for event TRIGGERED[14] */
+#define EGU_INTENSET_TRIGGERED14_Pos (14UL) /*!< Position of TRIGGERED14 field. */
+#define EGU_INTENSET_TRIGGERED14_Msk (0x1UL << EGU_INTENSET_TRIGGERED14_Pos) /*!< Bit mask of TRIGGERED14 field. */
+#define EGU_INTENSET_TRIGGERED14_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED14_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED14_Set (1UL) /*!< Enable */
+
+/* Bit 13 : Write '1' to enable interrupt for event TRIGGERED[13] */
+#define EGU_INTENSET_TRIGGERED13_Pos (13UL) /*!< Position of TRIGGERED13 field. */
+#define EGU_INTENSET_TRIGGERED13_Msk (0x1UL << EGU_INTENSET_TRIGGERED13_Pos) /*!< Bit mask of TRIGGERED13 field. */
+#define EGU_INTENSET_TRIGGERED13_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED13_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED13_Set (1UL) /*!< Enable */
+
+/* Bit 12 : Write '1' to enable interrupt for event TRIGGERED[12] */
+#define EGU_INTENSET_TRIGGERED12_Pos (12UL) /*!< Position of TRIGGERED12 field. */
+#define EGU_INTENSET_TRIGGERED12_Msk (0x1UL << EGU_INTENSET_TRIGGERED12_Pos) /*!< Bit mask of TRIGGERED12 field. */
+#define EGU_INTENSET_TRIGGERED12_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED12_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED12_Set (1UL) /*!< Enable */
+
+/* Bit 11 : Write '1' to enable interrupt for event TRIGGERED[11] */
+#define EGU_INTENSET_TRIGGERED11_Pos (11UL) /*!< Position of TRIGGERED11 field. */
+#define EGU_INTENSET_TRIGGERED11_Msk (0x1UL << EGU_INTENSET_TRIGGERED11_Pos) /*!< Bit mask of TRIGGERED11 field. */
+#define EGU_INTENSET_TRIGGERED11_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED11_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED11_Set (1UL) /*!< Enable */
+
+/* Bit 10 : Write '1' to enable interrupt for event TRIGGERED[10] */
+#define EGU_INTENSET_TRIGGERED10_Pos (10UL) /*!< Position of TRIGGERED10 field. */
+#define EGU_INTENSET_TRIGGERED10_Msk (0x1UL << EGU_INTENSET_TRIGGERED10_Pos) /*!< Bit mask of TRIGGERED10 field. */
+#define EGU_INTENSET_TRIGGERED10_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED10_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED10_Set (1UL) /*!< Enable */
+
+/* Bit 9 : Write '1' to enable interrupt for event TRIGGERED[9] */
+#define EGU_INTENSET_TRIGGERED9_Pos (9UL) /*!< Position of TRIGGERED9 field. */
+#define EGU_INTENSET_TRIGGERED9_Msk (0x1UL << EGU_INTENSET_TRIGGERED9_Pos) /*!< Bit mask of TRIGGERED9 field. */
+#define EGU_INTENSET_TRIGGERED9_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED9_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED9_Set (1UL) /*!< Enable */
+
+/* Bit 8 : Write '1' to enable interrupt for event TRIGGERED[8] */
+#define EGU_INTENSET_TRIGGERED8_Pos (8UL) /*!< Position of TRIGGERED8 field. */
+#define EGU_INTENSET_TRIGGERED8_Msk (0x1UL << EGU_INTENSET_TRIGGERED8_Pos) /*!< Bit mask of TRIGGERED8 field. */
+#define EGU_INTENSET_TRIGGERED8_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED8_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED8_Set (1UL) /*!< Enable */
+
+/* Bit 7 : Write '1' to enable interrupt for event TRIGGERED[7] */
+#define EGU_INTENSET_TRIGGERED7_Pos (7UL) /*!< Position of TRIGGERED7 field. */
+#define EGU_INTENSET_TRIGGERED7_Msk (0x1UL << EGU_INTENSET_TRIGGERED7_Pos) /*!< Bit mask of TRIGGERED7 field. */
+#define EGU_INTENSET_TRIGGERED7_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED7_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED7_Set (1UL) /*!< Enable */
+
+/* Bit 6 : Write '1' to enable interrupt for event TRIGGERED[6] */
+#define EGU_INTENSET_TRIGGERED6_Pos (6UL) /*!< Position of TRIGGERED6 field. */
+#define EGU_INTENSET_TRIGGERED6_Msk (0x1UL << EGU_INTENSET_TRIGGERED6_Pos) /*!< Bit mask of TRIGGERED6 field. */
+#define EGU_INTENSET_TRIGGERED6_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED6_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED6_Set (1UL) /*!< Enable */
+
+/* Bit 5 : Write '1' to enable interrupt for event TRIGGERED[5] */
+#define EGU_INTENSET_TRIGGERED5_Pos (5UL) /*!< Position of TRIGGERED5 field. */
+#define EGU_INTENSET_TRIGGERED5_Msk (0x1UL << EGU_INTENSET_TRIGGERED5_Pos) /*!< Bit mask of TRIGGERED5 field. */
+#define EGU_INTENSET_TRIGGERED5_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED5_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED5_Set (1UL) /*!< Enable */
+
+/* Bit 4 : Write '1' to enable interrupt for event TRIGGERED[4] */
+#define EGU_INTENSET_TRIGGERED4_Pos (4UL) /*!< Position of TRIGGERED4 field. */
+#define EGU_INTENSET_TRIGGERED4_Msk (0x1UL << EGU_INTENSET_TRIGGERED4_Pos) /*!< Bit mask of TRIGGERED4 field. */
+#define EGU_INTENSET_TRIGGERED4_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED4_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED4_Set (1UL) /*!< Enable */
+
+/* Bit 3 : Write '1' to enable interrupt for event TRIGGERED[3] */
+#define EGU_INTENSET_TRIGGERED3_Pos (3UL) /*!< Position of TRIGGERED3 field. */
+#define EGU_INTENSET_TRIGGERED3_Msk (0x1UL << EGU_INTENSET_TRIGGERED3_Pos) /*!< Bit mask of TRIGGERED3 field. */
+#define EGU_INTENSET_TRIGGERED3_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED3_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED3_Set (1UL) /*!< Enable */
+
+/* Bit 2 : Write '1' to enable interrupt for event TRIGGERED[2] */
+#define EGU_INTENSET_TRIGGERED2_Pos (2UL) /*!< Position of TRIGGERED2 field. */
+#define EGU_INTENSET_TRIGGERED2_Msk (0x1UL << EGU_INTENSET_TRIGGERED2_Pos) /*!< Bit mask of TRIGGERED2 field. */
+#define EGU_INTENSET_TRIGGERED2_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED2_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED2_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event TRIGGERED[1] */
+#define EGU_INTENSET_TRIGGERED1_Pos (1UL) /*!< Position of TRIGGERED1 field. */
+#define EGU_INTENSET_TRIGGERED1_Msk (0x1UL << EGU_INTENSET_TRIGGERED1_Pos) /*!< Bit mask of TRIGGERED1 field. */
+#define EGU_INTENSET_TRIGGERED1_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED1_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED1_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event TRIGGERED[0] */
+#define EGU_INTENSET_TRIGGERED0_Pos (0UL) /*!< Position of TRIGGERED0 field. */
+#define EGU_INTENSET_TRIGGERED0_Msk (0x1UL << EGU_INTENSET_TRIGGERED0_Pos) /*!< Bit mask of TRIGGERED0 field. */
+#define EGU_INTENSET_TRIGGERED0_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED0_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED0_Set (1UL) /*!< Enable */
+
+/* Register: EGU_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 15 : Write '1' to disable interrupt for event TRIGGERED[15] */
+#define EGU_INTENCLR_TRIGGERED15_Pos (15UL) /*!< Position of TRIGGERED15 field. */
+#define EGU_INTENCLR_TRIGGERED15_Msk (0x1UL << EGU_INTENCLR_TRIGGERED15_Pos) /*!< Bit mask of TRIGGERED15 field. */
+#define EGU_INTENCLR_TRIGGERED15_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED15_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED15_Clear (1UL) /*!< Disable */
+
+/* Bit 14 : Write '1' to disable interrupt for event TRIGGERED[14] */
+#define EGU_INTENCLR_TRIGGERED14_Pos (14UL) /*!< Position of TRIGGERED14 field. */
+#define EGU_INTENCLR_TRIGGERED14_Msk (0x1UL << EGU_INTENCLR_TRIGGERED14_Pos) /*!< Bit mask of TRIGGERED14 field. */
+#define EGU_INTENCLR_TRIGGERED14_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED14_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED14_Clear (1UL) /*!< Disable */
+
+/* Bit 13 : Write '1' to disable interrupt for event TRIGGERED[13] */
+#define EGU_INTENCLR_TRIGGERED13_Pos (13UL) /*!< Position of TRIGGERED13 field. */
+#define EGU_INTENCLR_TRIGGERED13_Msk (0x1UL << EGU_INTENCLR_TRIGGERED13_Pos) /*!< Bit mask of TRIGGERED13 field. */
+#define EGU_INTENCLR_TRIGGERED13_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED13_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED13_Clear (1UL) /*!< Disable */
+
+/* Bit 12 : Write '1' to disable interrupt for event TRIGGERED[12] */
+#define EGU_INTENCLR_TRIGGERED12_Pos (12UL) /*!< Position of TRIGGERED12 field. */
+#define EGU_INTENCLR_TRIGGERED12_Msk (0x1UL << EGU_INTENCLR_TRIGGERED12_Pos) /*!< Bit mask of TRIGGERED12 field. */
+#define EGU_INTENCLR_TRIGGERED12_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED12_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED12_Clear (1UL) /*!< Disable */
+
+/* Bit 11 : Write '1' to disable interrupt for event TRIGGERED[11] */
+#define EGU_INTENCLR_TRIGGERED11_Pos (11UL) /*!< Position of TRIGGERED11 field. */
+#define EGU_INTENCLR_TRIGGERED11_Msk (0x1UL << EGU_INTENCLR_TRIGGERED11_Pos) /*!< Bit mask of TRIGGERED11 field. */
+#define EGU_INTENCLR_TRIGGERED11_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED11_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED11_Clear (1UL) /*!< Disable */
+
+/* Bit 10 : Write '1' to disable interrupt for event TRIGGERED[10] */
+#define EGU_INTENCLR_TRIGGERED10_Pos (10UL) /*!< Position of TRIGGERED10 field. */
+#define EGU_INTENCLR_TRIGGERED10_Msk (0x1UL << EGU_INTENCLR_TRIGGERED10_Pos) /*!< Bit mask of TRIGGERED10 field. */
+#define EGU_INTENCLR_TRIGGERED10_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED10_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED10_Clear (1UL) /*!< Disable */
+
+/* Bit 9 : Write '1' to disable interrupt for event TRIGGERED[9] */
+#define EGU_INTENCLR_TRIGGERED9_Pos (9UL) /*!< Position of TRIGGERED9 field. */
+#define EGU_INTENCLR_TRIGGERED9_Msk (0x1UL << EGU_INTENCLR_TRIGGERED9_Pos) /*!< Bit mask of TRIGGERED9 field. */
+#define EGU_INTENCLR_TRIGGERED9_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED9_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED9_Clear (1UL) /*!< Disable */
+
+/* Bit 8 : Write '1' to disable interrupt for event TRIGGERED[8] */
+#define EGU_INTENCLR_TRIGGERED8_Pos (8UL) /*!< Position of TRIGGERED8 field. */
+#define EGU_INTENCLR_TRIGGERED8_Msk (0x1UL << EGU_INTENCLR_TRIGGERED8_Pos) /*!< Bit mask of TRIGGERED8 field. */
+#define EGU_INTENCLR_TRIGGERED8_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED8_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED8_Clear (1UL) /*!< Disable */
+
+/* Bit 7 : Write '1' to disable interrupt for event TRIGGERED[7] */
+#define EGU_INTENCLR_TRIGGERED7_Pos (7UL) /*!< Position of TRIGGERED7 field. */
+#define EGU_INTENCLR_TRIGGERED7_Msk (0x1UL << EGU_INTENCLR_TRIGGERED7_Pos) /*!< Bit mask of TRIGGERED7 field. */
+#define EGU_INTENCLR_TRIGGERED7_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED7_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED7_Clear (1UL) /*!< Disable */
+
+/* Bit 6 : Write '1' to disable interrupt for event TRIGGERED[6] */
+#define EGU_INTENCLR_TRIGGERED6_Pos (6UL) /*!< Position of TRIGGERED6 field. */
+#define EGU_INTENCLR_TRIGGERED6_Msk (0x1UL << EGU_INTENCLR_TRIGGERED6_Pos) /*!< Bit mask of TRIGGERED6 field. */
+#define EGU_INTENCLR_TRIGGERED6_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED6_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED6_Clear (1UL) /*!< Disable */
+
+/* Bit 5 : Write '1' to disable interrupt for event TRIGGERED[5] */
+#define EGU_INTENCLR_TRIGGERED5_Pos (5UL) /*!< Position of TRIGGERED5 field. */
+#define EGU_INTENCLR_TRIGGERED5_Msk (0x1UL << EGU_INTENCLR_TRIGGERED5_Pos) /*!< Bit mask of TRIGGERED5 field. */
+#define EGU_INTENCLR_TRIGGERED5_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED5_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED5_Clear (1UL) /*!< Disable */
+
+/* Bit 4 : Write '1' to disable interrupt for event TRIGGERED[4] */
+#define EGU_INTENCLR_TRIGGERED4_Pos (4UL) /*!< Position of TRIGGERED4 field. */
+#define EGU_INTENCLR_TRIGGERED4_Msk (0x1UL << EGU_INTENCLR_TRIGGERED4_Pos) /*!< Bit mask of TRIGGERED4 field. */
+#define EGU_INTENCLR_TRIGGERED4_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED4_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED4_Clear (1UL) /*!< Disable */
+
+/* Bit 3 : Write '1' to disable interrupt for event TRIGGERED[3] */
+#define EGU_INTENCLR_TRIGGERED3_Pos (3UL) /*!< Position of TRIGGERED3 field. */
+#define EGU_INTENCLR_TRIGGERED3_Msk (0x1UL << EGU_INTENCLR_TRIGGERED3_Pos) /*!< Bit mask of TRIGGERED3 field. */
+#define EGU_INTENCLR_TRIGGERED3_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED3_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED3_Clear (1UL) /*!< Disable */
+
+/* Bit 2 : Write '1' to disable interrupt for event TRIGGERED[2] */
+#define EGU_INTENCLR_TRIGGERED2_Pos (2UL) /*!< Position of TRIGGERED2 field. */
+#define EGU_INTENCLR_TRIGGERED2_Msk (0x1UL << EGU_INTENCLR_TRIGGERED2_Pos) /*!< Bit mask of TRIGGERED2 field. */
+#define EGU_INTENCLR_TRIGGERED2_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED2_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED2_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event TRIGGERED[1] */
+#define EGU_INTENCLR_TRIGGERED1_Pos (1UL) /*!< Position of TRIGGERED1 field. */
+#define EGU_INTENCLR_TRIGGERED1_Msk (0x1UL << EGU_INTENCLR_TRIGGERED1_Pos) /*!< Bit mask of TRIGGERED1 field. */
+#define EGU_INTENCLR_TRIGGERED1_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED1_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED1_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event TRIGGERED[0] */
+#define EGU_INTENCLR_TRIGGERED0_Pos (0UL) /*!< Position of TRIGGERED0 field. */
+#define EGU_INTENCLR_TRIGGERED0_Msk (0x1UL << EGU_INTENCLR_TRIGGERED0_Pos) /*!< Bit mask of TRIGGERED0 field. */
+#define EGU_INTENCLR_TRIGGERED0_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED0_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED0_Clear (1UL) /*!< Disable */
+
+
+/* Peripheral: FICR */
+/* Description: Factory information configuration registers */
+
+/* Register: FICR_CODEPAGESIZE */
+/* Description: Code memory page size */
+
+/* Bits 31..0 : Code memory page size */
+#define FICR_CODEPAGESIZE_CODEPAGESIZE_Pos (0UL) /*!< Position of CODEPAGESIZE field. */
+#define FICR_CODEPAGESIZE_CODEPAGESIZE_Msk (0xFFFFFFFFUL << FICR_CODEPAGESIZE_CODEPAGESIZE_Pos) /*!< Bit mask of CODEPAGESIZE field. */
+
+/* Register: FICR_CODESIZE */
+/* Description: Code memory size */
+
+/* Bits 31..0 : Code memory size in number of pages */
+#define FICR_CODESIZE_CODESIZE_Pos (0UL) /*!< Position of CODESIZE field. */
+#define FICR_CODESIZE_CODESIZE_Msk (0xFFFFFFFFUL << FICR_CODESIZE_CODESIZE_Pos) /*!< Bit mask of CODESIZE field. */
+
+/* Register: FICR_DEVICEID */
+/* Description: Description collection: Device identifier */
+
+/* Bits 31..0 : 64 bit unique device identifier */
+#define FICR_DEVICEID_DEVICEID_Pos (0UL) /*!< Position of DEVICEID field. */
+#define FICR_DEVICEID_DEVICEID_Msk (0xFFFFFFFFUL << FICR_DEVICEID_DEVICEID_Pos) /*!< Bit mask of DEVICEID field. */
+
+/* Register: FICR_ER */
+/* Description: Description collection: Encryption root, word n */
+
+/* Bits 31..0 : Encryption root, word n */
+#define FICR_ER_ER_Pos (0UL) /*!< Position of ER field. */
+#define FICR_ER_ER_Msk (0xFFFFFFFFUL << FICR_ER_ER_Pos) /*!< Bit mask of ER field. */
+
+/* Register: FICR_IR */
+/* Description: Description collection: Identity root, word n */
+
+/* Bits 31..0 : Identity root, word n */
+#define FICR_IR_IR_Pos (0UL) /*!< Position of IR field. */
+#define FICR_IR_IR_Msk (0xFFFFFFFFUL << FICR_IR_IR_Pos) /*!< Bit mask of IR field. */
+
+/* Register: FICR_DEVICEADDRTYPE */
+/* Description: Device address type */
+
+/* Bit 0 : Device address type */
+#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Pos (0UL) /*!< Position of DEVICEADDRTYPE field. */
+#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Msk (0x1UL << FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Pos) /*!< Bit mask of DEVICEADDRTYPE field. */
+#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Public (0UL) /*!< Public address */
+#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Random (1UL) /*!< Random address */
+
+/* Register: FICR_DEVICEADDR */
+/* Description: Description collection: Device address n */
+
+/* Bits 31..0 : 48 bit device address */
+#define FICR_DEVICEADDR_DEVICEADDR_Pos (0UL) /*!< Position of DEVICEADDR field. */
+#define FICR_DEVICEADDR_DEVICEADDR_Msk (0xFFFFFFFFUL << FICR_DEVICEADDR_DEVICEADDR_Pos) /*!< Bit mask of DEVICEADDR field. */
+
+/* Register: FICR_INFO_PART */
+/* Description: Part code */
+
+/* Bits 31..0 : Part code */
+#define FICR_INFO_PART_PART_Pos (0UL) /*!< Position of PART field. */
+#define FICR_INFO_PART_PART_Msk (0xFFFFFFFFUL << FICR_INFO_PART_PART_Pos) /*!< Bit mask of PART field. */
+#define FICR_INFO_PART_PART_N52805 (0x52805UL) /*!< nRF52805 */
+#define FICR_INFO_PART_PART_N52810 (0x52810UL) /*!< nRF52810 */
+#define FICR_INFO_PART_PART_N52811 (0x52811UL) /*!< nRF52811 */
+#define FICR_INFO_PART_PART_N52832 (0x52832UL) /*!< nRF52832 */
+#define FICR_INFO_PART_PART_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */
+
+/* Register: FICR_INFO_VARIANT */
+/* Description: Part variant, hardware version and production configuration */
+
+/* Bits 31..0 : Part variant, hardware version and production configuration, encoded as ASCII */
+#define FICR_INFO_VARIANT_VARIANT_Pos (0UL) /*!< Position of VARIANT field. */
+#define FICR_INFO_VARIANT_VARIANT_Msk (0xFFFFFFFFUL << FICR_INFO_VARIANT_VARIANT_Pos) /*!< Bit mask of VARIANT field. */
+#define FICR_INFO_VARIANT_VARIANT_AAA0 (0x41414130UL) /*!< AAA0 */
+#define FICR_INFO_VARIANT_VARIANT_AAAA (0x41414141UL) /*!< AAAA */
+#define FICR_INFO_VARIANT_VARIANT_AAB0 (0x41414230UL) /*!< AAB0 */
+#define FICR_INFO_VARIANT_VARIANT_AABA (0x41414241UL) /*!< AABA */
+#define FICR_INFO_VARIANT_VARIANT_AABB (0x41414242UL) /*!< AABB */
+#define FICR_INFO_VARIANT_VARIANT_AAC0 (0x41414330UL) /*!< AAC0 */
+#define FICR_INFO_VARIANT_VARIANT_AACA (0x41414341UL) /*!< AACA */
+#define FICR_INFO_VARIANT_VARIANT_AACB (0x41414342UL) /*!< AACB */
+#define FICR_INFO_VARIANT_VARIANT_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */
+
+/* Register: FICR_INFO_PACKAGE */
+/* Description: Package option */
+
+/* Bits 31..0 : Package option */
+#define FICR_INFO_PACKAGE_PACKAGE_Pos (0UL) /*!< Position of PACKAGE field. */
+#define FICR_INFO_PACKAGE_PACKAGE_Msk (0xFFFFFFFFUL << FICR_INFO_PACKAGE_PACKAGE_Pos) /*!< Bit mask of PACKAGE field. */
+#define FICR_INFO_PACKAGE_PACKAGE_CA (0x2004UL) /*!< CAxx - WLCSP */
+#define FICR_INFO_PACKAGE_PACKAGE_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */
+
+/* Register: FICR_INFO_RAM */
+/* Description: RAM variant */
+
+/* Bits 31..0 : RAM variant */
+#define FICR_INFO_RAM_RAM_Pos (0UL) /*!< Position of RAM field. */
+#define FICR_INFO_RAM_RAM_Msk (0xFFFFFFFFUL << FICR_INFO_RAM_RAM_Pos) /*!< Bit mask of RAM field. */
+#define FICR_INFO_RAM_RAM_K24 (0x18UL) /*!< 24 kByte RAM */
+#define FICR_INFO_RAM_RAM_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */
+
+/* Register: FICR_INFO_FLASH */
+/* Description: Flash variant */
+
+/* Bits 31..0 : Flash variant */
+#define FICR_INFO_FLASH_FLASH_Pos (0UL) /*!< Position of FLASH field. */
+#define FICR_INFO_FLASH_FLASH_Msk (0xFFFFFFFFUL << FICR_INFO_FLASH_FLASH_Pos) /*!< Bit mask of FLASH field. */
+#define FICR_INFO_FLASH_FLASH_K192 (0xC0UL) /*!< 192 kByte flash */
+#define FICR_INFO_FLASH_FLASH_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */
+
+/* Register: FICR_TEMP_A0 */
+/* Description: Slope definition A0 */
+
+/* Bits 11..0 : A (slope definition) register */
+#define FICR_TEMP_A0_A_Pos (0UL) /*!< Position of A field. */
+#define FICR_TEMP_A0_A_Msk (0xFFFUL << FICR_TEMP_A0_A_Pos) /*!< Bit mask of A field. */
+
+/* Register: FICR_TEMP_A1 */
+/* Description: Slope definition A1 */
+
+/* Bits 11..0 : A (slope definition) register */
+#define FICR_TEMP_A1_A_Pos (0UL) /*!< Position of A field. */
+#define FICR_TEMP_A1_A_Msk (0xFFFUL << FICR_TEMP_A1_A_Pos) /*!< Bit mask of A field. */
+
+/* Register: FICR_TEMP_A2 */
+/* Description: Slope definition A2 */
+
+/* Bits 11..0 : A (slope definition) register */
+#define FICR_TEMP_A2_A_Pos (0UL) /*!< Position of A field. */
+#define FICR_TEMP_A2_A_Msk (0xFFFUL << FICR_TEMP_A2_A_Pos) /*!< Bit mask of A field. */
+
+/* Register: FICR_TEMP_A3 */
+/* Description: Slope definition A3 */
+
+/* Bits 11..0 : A (slope definition) register */
+#define FICR_TEMP_A3_A_Pos (0UL) /*!< Position of A field. */
+#define FICR_TEMP_A3_A_Msk (0xFFFUL << FICR_TEMP_A3_A_Pos) /*!< Bit mask of A field. */
+
+/* Register: FICR_TEMP_A4 */
+/* Description: Slope definition A4 */
+
+/* Bits 11..0 : A (slope definition) register */
+#define FICR_TEMP_A4_A_Pos (0UL) /*!< Position of A field. */
+#define FICR_TEMP_A4_A_Msk (0xFFFUL << FICR_TEMP_A4_A_Pos) /*!< Bit mask of A field. */
+
+/* Register: FICR_TEMP_A5 */
+/* Description: Slope definition A5 */
+
+/* Bits 11..0 : A (slope definition) register */
+#define FICR_TEMP_A5_A_Pos (0UL) /*!< Position of A field. */
+#define FICR_TEMP_A5_A_Msk (0xFFFUL << FICR_TEMP_A5_A_Pos) /*!< Bit mask of A field. */
+
+/* Register: FICR_TEMP_B0 */
+/* Description: Y-intercept B0 */
+
+/* Bits 13..0 : B (y-intercept) */
+#define FICR_TEMP_B0_B_Pos (0UL) /*!< Position of B field. */
+#define FICR_TEMP_B0_B_Msk (0x3FFFUL << FICR_TEMP_B0_B_Pos) /*!< Bit mask of B field. */
+
+/* Register: FICR_TEMP_B1 */
+/* Description: Y-intercept B1 */
+
+/* Bits 13..0 : B (y-intercept) */
+#define FICR_TEMP_B1_B_Pos (0UL) /*!< Position of B field. */
+#define FICR_TEMP_B1_B_Msk (0x3FFFUL << FICR_TEMP_B1_B_Pos) /*!< Bit mask of B field. */
+
+/* Register: FICR_TEMP_B2 */
+/* Description: Y-intercept B2 */
+
+/* Bits 13..0 : B (y-intercept) */
+#define FICR_TEMP_B2_B_Pos (0UL) /*!< Position of B field. */
+#define FICR_TEMP_B2_B_Msk (0x3FFFUL << FICR_TEMP_B2_B_Pos) /*!< Bit mask of B field. */
+
+/* Register: FICR_TEMP_B3 */
+/* Description: Y-intercept B3 */
+
+/* Bits 13..0 : B (y-intercept) */
+#define FICR_TEMP_B3_B_Pos (0UL) /*!< Position of B field. */
+#define FICR_TEMP_B3_B_Msk (0x3FFFUL << FICR_TEMP_B3_B_Pos) /*!< Bit mask of B field. */
+
+/* Register: FICR_TEMP_B4 */
+/* Description: Y-intercept B4 */
+
+/* Bits 13..0 : B (y-intercept) */
+#define FICR_TEMP_B4_B_Pos (0UL) /*!< Position of B field. */
+#define FICR_TEMP_B4_B_Msk (0x3FFFUL << FICR_TEMP_B4_B_Pos) /*!< Bit mask of B field. */
+
+/* Register: FICR_TEMP_B5 */
+/* Description: Y-intercept B5 */
+
+/* Bits 13..0 : B (y-intercept) */
+#define FICR_TEMP_B5_B_Pos (0UL) /*!< Position of B field. */
+#define FICR_TEMP_B5_B_Msk (0x3FFFUL << FICR_TEMP_B5_B_Pos) /*!< Bit mask of B field. */
+
+/* Register: FICR_TEMP_T0 */
+/* Description: Segment end T0 */
+
+/* Bits 7..0 : T (segment end) register */
+#define FICR_TEMP_T0_T_Pos (0UL) /*!< Position of T field. */
+#define FICR_TEMP_T0_T_Msk (0xFFUL << FICR_TEMP_T0_T_Pos) /*!< Bit mask of T field. */
+
+/* Register: FICR_TEMP_T1 */
+/* Description: Segment end T1 */
+
+/* Bits 7..0 : T (segment end) register */
+#define FICR_TEMP_T1_T_Pos (0UL) /*!< Position of T field. */
+#define FICR_TEMP_T1_T_Msk (0xFFUL << FICR_TEMP_T1_T_Pos) /*!< Bit mask of T field. */
+
+/* Register: FICR_TEMP_T2 */
+/* Description: Segment end T2 */
+
+/* Bits 7..0 : T (segment end) register */
+#define FICR_TEMP_T2_T_Pos (0UL) /*!< Position of T field. */
+#define FICR_TEMP_T2_T_Msk (0xFFUL << FICR_TEMP_T2_T_Pos) /*!< Bit mask of T field. */
+
+/* Register: FICR_TEMP_T3 */
+/* Description: Segment end T3 */
+
+/* Bits 7..0 : T (segment end) register */
+#define FICR_TEMP_T3_T_Pos (0UL) /*!< Position of T field. */
+#define FICR_TEMP_T3_T_Msk (0xFFUL << FICR_TEMP_T3_T_Pos) /*!< Bit mask of T field. */
+
+/* Register: FICR_TEMP_T4 */
+/* Description: Segment end T4 */
+
+/* Bits 7..0 : T (segment end) register */
+#define FICR_TEMP_T4_T_Pos (0UL) /*!< Position of T field. */
+#define FICR_TEMP_T4_T_Msk (0xFFUL << FICR_TEMP_T4_T_Pos) /*!< Bit mask of T field. */
+
+
+/* Peripheral: GPIOTE */
+/* Description: GPIO Tasks and Events */
+
+/* Register: GPIOTE_TASKS_OUT */
+/* Description: Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY. */
+
+/* Bit 0 : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY. */
+#define GPIOTE_TASKS_OUT_TASKS_OUT_Pos (0UL) /*!< Position of TASKS_OUT field. */
+#define GPIOTE_TASKS_OUT_TASKS_OUT_Msk (0x1UL << GPIOTE_TASKS_OUT_TASKS_OUT_Pos) /*!< Bit mask of TASKS_OUT field. */
+#define GPIOTE_TASKS_OUT_TASKS_OUT_Trigger (1UL) /*!< Trigger task */
+
+/* Register: GPIOTE_TASKS_SET */
+/* Description: Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high. */
+
+/* Bit 0 : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high. */
+#define GPIOTE_TASKS_SET_TASKS_SET_Pos (0UL) /*!< Position of TASKS_SET field. */
+#define GPIOTE_TASKS_SET_TASKS_SET_Msk (0x1UL << GPIOTE_TASKS_SET_TASKS_SET_Pos) /*!< Bit mask of TASKS_SET field. */
+#define GPIOTE_TASKS_SET_TASKS_SET_Trigger (1UL) /*!< Trigger task */
+
+/* Register: GPIOTE_TASKS_CLR */
+/* Description: Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low. */
+
+/* Bit 0 : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low. */
+#define GPIOTE_TASKS_CLR_TASKS_CLR_Pos (0UL) /*!< Position of TASKS_CLR field. */
+#define GPIOTE_TASKS_CLR_TASKS_CLR_Msk (0x1UL << GPIOTE_TASKS_CLR_TASKS_CLR_Pos) /*!< Bit mask of TASKS_CLR field. */
+#define GPIOTE_TASKS_CLR_TASKS_CLR_Trigger (1UL) /*!< Trigger task */
+
+/* Register: GPIOTE_EVENTS_IN */
+/* Description: Description collection: Event generated from pin specified in CONFIG[n].PSEL */
+
+/* Bit 0 : Event generated from pin specified in CONFIG[n].PSEL */
+#define GPIOTE_EVENTS_IN_EVENTS_IN_Pos (0UL) /*!< Position of EVENTS_IN field. */
+#define GPIOTE_EVENTS_IN_EVENTS_IN_Msk (0x1UL << GPIOTE_EVENTS_IN_EVENTS_IN_Pos) /*!< Bit mask of EVENTS_IN field. */
+#define GPIOTE_EVENTS_IN_EVENTS_IN_NotGenerated (0UL) /*!< Event not generated */
+#define GPIOTE_EVENTS_IN_EVENTS_IN_Generated (1UL) /*!< Event generated */
+
+/* Register: GPIOTE_EVENTS_PORT */
+/* Description: Event generated from multiple input GPIO pins with SENSE mechanism enabled */
+
+/* Bit 0 : Event generated from multiple input GPIO pins with SENSE mechanism enabled */
+#define GPIOTE_EVENTS_PORT_EVENTS_PORT_Pos (0UL) /*!< Position of EVENTS_PORT field. */
+#define GPIOTE_EVENTS_PORT_EVENTS_PORT_Msk (0x1UL << GPIOTE_EVENTS_PORT_EVENTS_PORT_Pos) /*!< Bit mask of EVENTS_PORT field. */
+#define GPIOTE_EVENTS_PORT_EVENTS_PORT_NotGenerated (0UL) /*!< Event not generated */
+#define GPIOTE_EVENTS_PORT_EVENTS_PORT_Generated (1UL) /*!< Event generated */
+
+/* Register: GPIOTE_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 31 : Write '1' to enable interrupt for event PORT */
+#define GPIOTE_INTENSET_PORT_Pos (31UL) /*!< Position of PORT field. */
+#define GPIOTE_INTENSET_PORT_Msk (0x1UL << GPIOTE_INTENSET_PORT_Pos) /*!< Bit mask of PORT field. */
+#define GPIOTE_INTENSET_PORT_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENSET_PORT_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENSET_PORT_Set (1UL) /*!< Enable */
+
+/* Bit 7 : Write '1' to enable interrupt for event IN[7] */
+#define GPIOTE_INTENSET_IN7_Pos (7UL) /*!< Position of IN7 field. */
+#define GPIOTE_INTENSET_IN7_Msk (0x1UL << GPIOTE_INTENSET_IN7_Pos) /*!< Bit mask of IN7 field. */
+#define GPIOTE_INTENSET_IN7_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENSET_IN7_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENSET_IN7_Set (1UL) /*!< Enable */
+
+/* Bit 6 : Write '1' to enable interrupt for event IN[6] */
+#define GPIOTE_INTENSET_IN6_Pos (6UL) /*!< Position of IN6 field. */
+#define GPIOTE_INTENSET_IN6_Msk (0x1UL << GPIOTE_INTENSET_IN6_Pos) /*!< Bit mask of IN6 field. */
+#define GPIOTE_INTENSET_IN6_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENSET_IN6_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENSET_IN6_Set (1UL) /*!< Enable */
+
+/* Bit 5 : Write '1' to enable interrupt for event IN[5] */
+#define GPIOTE_INTENSET_IN5_Pos (5UL) /*!< Position of IN5 field. */
+#define GPIOTE_INTENSET_IN5_Msk (0x1UL << GPIOTE_INTENSET_IN5_Pos) /*!< Bit mask of IN5 field. */
+#define GPIOTE_INTENSET_IN5_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENSET_IN5_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENSET_IN5_Set (1UL) /*!< Enable */
+
+/* Bit 4 : Write '1' to enable interrupt for event IN[4] */
+#define GPIOTE_INTENSET_IN4_Pos (4UL) /*!< Position of IN4 field. */
+#define GPIOTE_INTENSET_IN4_Msk (0x1UL << GPIOTE_INTENSET_IN4_Pos) /*!< Bit mask of IN4 field. */
+#define GPIOTE_INTENSET_IN4_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENSET_IN4_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENSET_IN4_Set (1UL) /*!< Enable */
+
+/* Bit 3 : Write '1' to enable interrupt for event IN[3] */
+#define GPIOTE_INTENSET_IN3_Pos (3UL) /*!< Position of IN3 field. */
+#define GPIOTE_INTENSET_IN3_Msk (0x1UL << GPIOTE_INTENSET_IN3_Pos) /*!< Bit mask of IN3 field. */
+#define GPIOTE_INTENSET_IN3_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENSET_IN3_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENSET_IN3_Set (1UL) /*!< Enable */
+
+/* Bit 2 : Write '1' to enable interrupt for event IN[2] */
+#define GPIOTE_INTENSET_IN2_Pos (2UL) /*!< Position of IN2 field. */
+#define GPIOTE_INTENSET_IN2_Msk (0x1UL << GPIOTE_INTENSET_IN2_Pos) /*!< Bit mask of IN2 field. */
+#define GPIOTE_INTENSET_IN2_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENSET_IN2_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENSET_IN2_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event IN[1] */
+#define GPIOTE_INTENSET_IN1_Pos (1UL) /*!< Position of IN1 field. */
+#define GPIOTE_INTENSET_IN1_Msk (0x1UL << GPIOTE_INTENSET_IN1_Pos) /*!< Bit mask of IN1 field. */
+#define GPIOTE_INTENSET_IN1_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENSET_IN1_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENSET_IN1_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event IN[0] */
+#define GPIOTE_INTENSET_IN0_Pos (0UL) /*!< Position of IN0 field. */
+#define GPIOTE_INTENSET_IN0_Msk (0x1UL << GPIOTE_INTENSET_IN0_Pos) /*!< Bit mask of IN0 field. */
+#define GPIOTE_INTENSET_IN0_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENSET_IN0_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENSET_IN0_Set (1UL) /*!< Enable */
+
+/* Register: GPIOTE_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 31 : Write '1' to disable interrupt for event PORT */
+#define GPIOTE_INTENCLR_PORT_Pos (31UL) /*!< Position of PORT field. */
+#define GPIOTE_INTENCLR_PORT_Msk (0x1UL << GPIOTE_INTENCLR_PORT_Pos) /*!< Bit mask of PORT field. */
+#define GPIOTE_INTENCLR_PORT_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENCLR_PORT_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENCLR_PORT_Clear (1UL) /*!< Disable */
+
+/* Bit 7 : Write '1' to disable interrupt for event IN[7] */
+#define GPIOTE_INTENCLR_IN7_Pos (7UL) /*!< Position of IN7 field. */
+#define GPIOTE_INTENCLR_IN7_Msk (0x1UL << GPIOTE_INTENCLR_IN7_Pos) /*!< Bit mask of IN7 field. */
+#define GPIOTE_INTENCLR_IN7_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENCLR_IN7_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENCLR_IN7_Clear (1UL) /*!< Disable */
+
+/* Bit 6 : Write '1' to disable interrupt for event IN[6] */
+#define GPIOTE_INTENCLR_IN6_Pos (6UL) /*!< Position of IN6 field. */
+#define GPIOTE_INTENCLR_IN6_Msk (0x1UL << GPIOTE_INTENCLR_IN6_Pos) /*!< Bit mask of IN6 field. */
+#define GPIOTE_INTENCLR_IN6_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENCLR_IN6_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENCLR_IN6_Clear (1UL) /*!< Disable */
+
+/* Bit 5 : Write '1' to disable interrupt for event IN[5] */
+#define GPIOTE_INTENCLR_IN5_Pos (5UL) /*!< Position of IN5 field. */
+#define GPIOTE_INTENCLR_IN5_Msk (0x1UL << GPIOTE_INTENCLR_IN5_Pos) /*!< Bit mask of IN5 field. */
+#define GPIOTE_INTENCLR_IN5_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENCLR_IN5_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENCLR_IN5_Clear (1UL) /*!< Disable */
+
+/* Bit 4 : Write '1' to disable interrupt for event IN[4] */
+#define GPIOTE_INTENCLR_IN4_Pos (4UL) /*!< Position of IN4 field. */
+#define GPIOTE_INTENCLR_IN4_Msk (0x1UL << GPIOTE_INTENCLR_IN4_Pos) /*!< Bit mask of IN4 field. */
+#define GPIOTE_INTENCLR_IN4_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENCLR_IN4_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENCLR_IN4_Clear (1UL) /*!< Disable */
+
+/* Bit 3 : Write '1' to disable interrupt for event IN[3] */
+#define GPIOTE_INTENCLR_IN3_Pos (3UL) /*!< Position of IN3 field. */
+#define GPIOTE_INTENCLR_IN3_Msk (0x1UL << GPIOTE_INTENCLR_IN3_Pos) /*!< Bit mask of IN3 field. */
+#define GPIOTE_INTENCLR_IN3_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENCLR_IN3_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENCLR_IN3_Clear (1UL) /*!< Disable */
+
+/* Bit 2 : Write '1' to disable interrupt for event IN[2] */
+#define GPIOTE_INTENCLR_IN2_Pos (2UL) /*!< Position of IN2 field. */
+#define GPIOTE_INTENCLR_IN2_Msk (0x1UL << GPIOTE_INTENCLR_IN2_Pos) /*!< Bit mask of IN2 field. */
+#define GPIOTE_INTENCLR_IN2_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENCLR_IN2_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENCLR_IN2_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event IN[1] */
+#define GPIOTE_INTENCLR_IN1_Pos (1UL) /*!< Position of IN1 field. */
+#define GPIOTE_INTENCLR_IN1_Msk (0x1UL << GPIOTE_INTENCLR_IN1_Pos) /*!< Bit mask of IN1 field. */
+#define GPIOTE_INTENCLR_IN1_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENCLR_IN1_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENCLR_IN1_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event IN[0] */
+#define GPIOTE_INTENCLR_IN0_Pos (0UL) /*!< Position of IN0 field. */
+#define GPIOTE_INTENCLR_IN0_Msk (0x1UL << GPIOTE_INTENCLR_IN0_Pos) /*!< Bit mask of IN0 field. */
+#define GPIOTE_INTENCLR_IN0_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENCLR_IN0_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENCLR_IN0_Clear (1UL) /*!< Disable */
+
+/* Register: GPIOTE_CONFIG */
+/* Description: Description collection: Configuration for OUT[n], SET[n] and CLR[n] tasks and IN[n] event */
+
+/* Bit 20 : When in task mode: Initial value of the output when the GPIOTE channel is configured. When in event mode: No effect. */
+#define GPIOTE_CONFIG_OUTINIT_Pos (20UL) /*!< Position of OUTINIT field. */
+#define GPIOTE_CONFIG_OUTINIT_Msk (0x1UL << GPIOTE_CONFIG_OUTINIT_Pos) /*!< Bit mask of OUTINIT field. */
+#define GPIOTE_CONFIG_OUTINIT_Low (0UL) /*!< Task mode: Initial value of pin before task triggering is low */
+#define GPIOTE_CONFIG_OUTINIT_High (1UL) /*!< Task mode: Initial value of pin before task triggering is high */
+
+/* Bits 17..16 : When In task mode: Operation to be performed on output when OUT[n] task is triggered. When In event mode: Operation on input that shall trigger IN[n] event. */
+#define GPIOTE_CONFIG_POLARITY_Pos (16UL) /*!< Position of POLARITY field. */
+#define GPIOTE_CONFIG_POLARITY_Msk (0x3UL << GPIOTE_CONFIG_POLARITY_Pos) /*!< Bit mask of POLARITY field. */
+#define GPIOTE_CONFIG_POLARITY_None (0UL) /*!< Task mode: No effect on pin from OUT[n] task. Event mode: no IN[n] event generated on pin activity. */
+#define GPIOTE_CONFIG_POLARITY_LoToHi (1UL) /*!< Task mode: Set pin from OUT[n] task. Event mode: Generate IN[n] event when rising edge on pin. */
+#define GPIOTE_CONFIG_POLARITY_HiToLo (2UL) /*!< Task mode: Clear pin from OUT[n] task. Event mode: Generate IN[n] event when falling edge on pin. */
+#define GPIOTE_CONFIG_POLARITY_Toggle (3UL) /*!< Task mode: Toggle pin from OUT[n]. Event mode: Generate IN[n] when any change on pin. */
+
+/* Bits 12..8 : GPIO number associated with SET[n], CLR[n] and OUT[n] tasks and IN[n] event */
+#define GPIOTE_CONFIG_PSEL_Pos (8UL) /*!< Position of PSEL field. */
+#define GPIOTE_CONFIG_PSEL_Msk (0x1FUL << GPIOTE_CONFIG_PSEL_Pos) /*!< Bit mask of PSEL field. */
+
+/* Bits 1..0 : Mode */
+#define GPIOTE_CONFIG_MODE_Pos (0UL) /*!< Position of MODE field. */
+#define GPIOTE_CONFIG_MODE_Msk (0x3UL << GPIOTE_CONFIG_MODE_Pos) /*!< Bit mask of MODE field. */
+#define GPIOTE_CONFIG_MODE_Disabled (0UL) /*!< Disabled. Pin specified by PSEL will not be acquired by the GPIOTE module. */
+#define GPIOTE_CONFIG_MODE_Event (1UL) /*!< Event mode */
+#define GPIOTE_CONFIG_MODE_Task (3UL) /*!< Task mode */
+
+
+/* Peripheral: NVMC */
+/* Description: Non-volatile memory controller */
+
+/* Register: NVMC_READY */
+/* Description: Ready flag */
+
+/* Bit 0 : NVMC is ready or busy */
+#define NVMC_READY_READY_Pos (0UL) /*!< Position of READY field. */
+#define NVMC_READY_READY_Msk (0x1UL << NVMC_READY_READY_Pos) /*!< Bit mask of READY field. */
+#define NVMC_READY_READY_Busy (0UL) /*!< NVMC is busy (ongoing write or erase operation) */
+#define NVMC_READY_READY_Ready (1UL) /*!< NVMC is ready */
+
+/* Register: NVMC_CONFIG */
+/* Description: Configuration register */
+
+/* Bits 1..0 : Program memory access mode. It is strongly recommended to activate erase and write modes only when they are actively used. */
+#define NVMC_CONFIG_WEN_Pos (0UL) /*!< Position of WEN field. */
+#define NVMC_CONFIG_WEN_Msk (0x3UL << NVMC_CONFIG_WEN_Pos) /*!< Bit mask of WEN field. */
+#define NVMC_CONFIG_WEN_Ren (0UL) /*!< Read only access */
+#define NVMC_CONFIG_WEN_Wen (1UL) /*!< Write enabled */
+#define NVMC_CONFIG_WEN_Een (2UL) /*!< Erase enabled */
+
+/* Register: NVMC_ERASEPAGE */
+/* Description: Register for erasing a page in code area */
+
+/* Bits 31..0 : Register for starting erase of a page in code area. */
+#define NVMC_ERASEPAGE_ERASEPAGE_Pos (0UL) /*!< Position of ERASEPAGE field. */
+#define NVMC_ERASEPAGE_ERASEPAGE_Msk (0xFFFFFFFFUL << NVMC_ERASEPAGE_ERASEPAGE_Pos) /*!< Bit mask of ERASEPAGE field. */
+
+/* Register: NVMC_ERASEPCR1 */
+/* Description: Deprecated register - Register for erasing a page in code area. Equivalent to ERASEPAGE. */
+
+/* Bits 31..0 : Register for erasing a page in code area. Equivalent to ERASEPAGE. */
+#define NVMC_ERASEPCR1_ERASEPCR1_Pos (0UL) /*!< Position of ERASEPCR1 field. */
+#define NVMC_ERASEPCR1_ERASEPCR1_Msk (0xFFFFFFFFUL << NVMC_ERASEPCR1_ERASEPCR1_Pos) /*!< Bit mask of ERASEPCR1 field. */
+
+/* Register: NVMC_ERASEALL */
+/* Description: Register for erasing all non-volatile user memory */
+
+/* Bit 0 : Erase all non-volatile memory including UICR registers. Note that the erase must be enabled using CONFIG.WEN before the non-volatile memory can be erased. */
+#define NVMC_ERASEALL_ERASEALL_Pos (0UL) /*!< Position of ERASEALL field. */
+#define NVMC_ERASEALL_ERASEALL_Msk (0x1UL << NVMC_ERASEALL_ERASEALL_Pos) /*!< Bit mask of ERASEALL field. */
+#define NVMC_ERASEALL_ERASEALL_NoOperation (0UL) /*!< No operation */
+#define NVMC_ERASEALL_ERASEALL_Erase (1UL) /*!< Start erase of chip */
+
+/* Register: NVMC_ERASEPCR0 */
+/* Description: Deprecated register - Register for erasing a page in code area. Equivalent to ERASEPAGE. */
+
+/* Bits 31..0 : Register for starting erase of a page in code area. Equivalent to ERASEPAGE. */
+#define NVMC_ERASEPCR0_ERASEPCR0_Pos (0UL) /*!< Position of ERASEPCR0 field. */
+#define NVMC_ERASEPCR0_ERASEPCR0_Msk (0xFFFFFFFFUL << NVMC_ERASEPCR0_ERASEPCR0_Pos) /*!< Bit mask of ERASEPCR0 field. */
+
+/* Register: NVMC_ERASEUICR */
+/* Description: Register for erasing user information configuration registers */
+
+/* Bit 0 : Register starting erase of all user information configuration registers. Note that the erase must be enabled using CONFIG.WEN before the UICR can be erased. */
+#define NVMC_ERASEUICR_ERASEUICR_Pos (0UL) /*!< Position of ERASEUICR field. */
+#define NVMC_ERASEUICR_ERASEUICR_Msk (0x1UL << NVMC_ERASEUICR_ERASEUICR_Pos) /*!< Bit mask of ERASEUICR field. */
+#define NVMC_ERASEUICR_ERASEUICR_NoOperation (0UL) /*!< No operation */
+#define NVMC_ERASEUICR_ERASEUICR_Erase (1UL) /*!< Start erase of UICR */
+
+/* Register: NVMC_ERASEPAGEPARTIAL */
+/* Description: Register for partial erase of a page in code area */
+
+/* Bits 31..0 : Register for starting partial erase of a page in code area */
+#define NVMC_ERASEPAGEPARTIAL_ERASEPAGEPARTIAL_Pos (0UL) /*!< Position of ERASEPAGEPARTIAL field. */
+#define NVMC_ERASEPAGEPARTIAL_ERASEPAGEPARTIAL_Msk (0xFFFFFFFFUL << NVMC_ERASEPAGEPARTIAL_ERASEPAGEPARTIAL_Pos) /*!< Bit mask of ERASEPAGEPARTIAL field. */
+
+/* Register: NVMC_ERASEPAGEPARTIALCFG */
+/* Description: Register for partial erase configuration */
+
+/* Bits 6..0 : Duration of the partial erase in milliseconds */
+#define NVMC_ERASEPAGEPARTIALCFG_DURATION_Pos (0UL) /*!< Position of DURATION field. */
+#define NVMC_ERASEPAGEPARTIALCFG_DURATION_Msk (0x7FUL << NVMC_ERASEPAGEPARTIALCFG_DURATION_Pos) /*!< Bit mask of DURATION field. */
+
+
+/* Peripheral: GPIO */
+/* Description: GPIO Port */
+
+/* Register: GPIO_OUT */
+/* Description: Write GPIO port */
+
+/* Bit 31 : Pin 31 */
+#define GPIO_OUT_PIN31_Pos (31UL) /*!< Position of PIN31 field. */
+#define GPIO_OUT_PIN31_Msk (0x1UL << GPIO_OUT_PIN31_Pos) /*!< Bit mask of PIN31 field. */
+#define GPIO_OUT_PIN31_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN31_High (1UL) /*!< Pin driver is high */
+
+/* Bit 30 : Pin 30 */
+#define GPIO_OUT_PIN30_Pos (30UL) /*!< Position of PIN30 field. */
+#define GPIO_OUT_PIN30_Msk (0x1UL << GPIO_OUT_PIN30_Pos) /*!< Bit mask of PIN30 field. */
+#define GPIO_OUT_PIN30_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN30_High (1UL) /*!< Pin driver is high */
+
+/* Bit 29 : Pin 29 */
+#define GPIO_OUT_PIN29_Pos (29UL) /*!< Position of PIN29 field. */
+#define GPIO_OUT_PIN29_Msk (0x1UL << GPIO_OUT_PIN29_Pos) /*!< Bit mask of PIN29 field. */
+#define GPIO_OUT_PIN29_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN29_High (1UL) /*!< Pin driver is high */
+
+/* Bit 28 : Pin 28 */
+#define GPIO_OUT_PIN28_Pos (28UL) /*!< Position of PIN28 field. */
+#define GPIO_OUT_PIN28_Msk (0x1UL << GPIO_OUT_PIN28_Pos) /*!< Bit mask of PIN28 field. */
+#define GPIO_OUT_PIN28_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN28_High (1UL) /*!< Pin driver is high */
+
+/* Bit 27 : Pin 27 */
+#define GPIO_OUT_PIN27_Pos (27UL) /*!< Position of PIN27 field. */
+#define GPIO_OUT_PIN27_Msk (0x1UL << GPIO_OUT_PIN27_Pos) /*!< Bit mask of PIN27 field. */
+#define GPIO_OUT_PIN27_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN27_High (1UL) /*!< Pin driver is high */
+
+/* Bit 26 : Pin 26 */
+#define GPIO_OUT_PIN26_Pos (26UL) /*!< Position of PIN26 field. */
+#define GPIO_OUT_PIN26_Msk (0x1UL << GPIO_OUT_PIN26_Pos) /*!< Bit mask of PIN26 field. */
+#define GPIO_OUT_PIN26_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN26_High (1UL) /*!< Pin driver is high */
+
+/* Bit 25 : Pin 25 */
+#define GPIO_OUT_PIN25_Pos (25UL) /*!< Position of PIN25 field. */
+#define GPIO_OUT_PIN25_Msk (0x1UL << GPIO_OUT_PIN25_Pos) /*!< Bit mask of PIN25 field. */
+#define GPIO_OUT_PIN25_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN25_High (1UL) /*!< Pin driver is high */
+
+/* Bit 24 : Pin 24 */
+#define GPIO_OUT_PIN24_Pos (24UL) /*!< Position of PIN24 field. */
+#define GPIO_OUT_PIN24_Msk (0x1UL << GPIO_OUT_PIN24_Pos) /*!< Bit mask of PIN24 field. */
+#define GPIO_OUT_PIN24_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN24_High (1UL) /*!< Pin driver is high */
+
+/* Bit 23 : Pin 23 */
+#define GPIO_OUT_PIN23_Pos (23UL) /*!< Position of PIN23 field. */
+#define GPIO_OUT_PIN23_Msk (0x1UL << GPIO_OUT_PIN23_Pos) /*!< Bit mask of PIN23 field. */
+#define GPIO_OUT_PIN23_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN23_High (1UL) /*!< Pin driver is high */
+
+/* Bit 22 : Pin 22 */
+#define GPIO_OUT_PIN22_Pos (22UL) /*!< Position of PIN22 field. */
+#define GPIO_OUT_PIN22_Msk (0x1UL << GPIO_OUT_PIN22_Pos) /*!< Bit mask of PIN22 field. */
+#define GPIO_OUT_PIN22_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN22_High (1UL) /*!< Pin driver is high */
+
+/* Bit 21 : Pin 21 */
+#define GPIO_OUT_PIN21_Pos (21UL) /*!< Position of PIN21 field. */
+#define GPIO_OUT_PIN21_Msk (0x1UL << GPIO_OUT_PIN21_Pos) /*!< Bit mask of PIN21 field. */
+#define GPIO_OUT_PIN21_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN21_High (1UL) /*!< Pin driver is high */
+
+/* Bit 20 : Pin 20 */
+#define GPIO_OUT_PIN20_Pos (20UL) /*!< Position of PIN20 field. */
+#define GPIO_OUT_PIN20_Msk (0x1UL << GPIO_OUT_PIN20_Pos) /*!< Bit mask of PIN20 field. */
+#define GPIO_OUT_PIN20_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN20_High (1UL) /*!< Pin driver is high */
+
+/* Bit 19 : Pin 19 */
+#define GPIO_OUT_PIN19_Pos (19UL) /*!< Position of PIN19 field. */
+#define GPIO_OUT_PIN19_Msk (0x1UL << GPIO_OUT_PIN19_Pos) /*!< Bit mask of PIN19 field. */
+#define GPIO_OUT_PIN19_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN19_High (1UL) /*!< Pin driver is high */
+
+/* Bit 18 : Pin 18 */
+#define GPIO_OUT_PIN18_Pos (18UL) /*!< Position of PIN18 field. */
+#define GPIO_OUT_PIN18_Msk (0x1UL << GPIO_OUT_PIN18_Pos) /*!< Bit mask of PIN18 field. */
+#define GPIO_OUT_PIN18_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN18_High (1UL) /*!< Pin driver is high */
+
+/* Bit 17 : Pin 17 */
+#define GPIO_OUT_PIN17_Pos (17UL) /*!< Position of PIN17 field. */
+#define GPIO_OUT_PIN17_Msk (0x1UL << GPIO_OUT_PIN17_Pos) /*!< Bit mask of PIN17 field. */
+#define GPIO_OUT_PIN17_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN17_High (1UL) /*!< Pin driver is high */
+
+/* Bit 16 : Pin 16 */
+#define GPIO_OUT_PIN16_Pos (16UL) /*!< Position of PIN16 field. */
+#define GPIO_OUT_PIN16_Msk (0x1UL << GPIO_OUT_PIN16_Pos) /*!< Bit mask of PIN16 field. */
+#define GPIO_OUT_PIN16_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN16_High (1UL) /*!< Pin driver is high */
+
+/* Bit 15 : Pin 15 */
+#define GPIO_OUT_PIN15_Pos (15UL) /*!< Position of PIN15 field. */
+#define GPIO_OUT_PIN15_Msk (0x1UL << GPIO_OUT_PIN15_Pos) /*!< Bit mask of PIN15 field. */
+#define GPIO_OUT_PIN15_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN15_High (1UL) /*!< Pin driver is high */
+
+/* Bit 14 : Pin 14 */
+#define GPIO_OUT_PIN14_Pos (14UL) /*!< Position of PIN14 field. */
+#define GPIO_OUT_PIN14_Msk (0x1UL << GPIO_OUT_PIN14_Pos) /*!< Bit mask of PIN14 field. */
+#define GPIO_OUT_PIN14_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN14_High (1UL) /*!< Pin driver is high */
+
+/* Bit 13 : Pin 13 */
+#define GPIO_OUT_PIN13_Pos (13UL) /*!< Position of PIN13 field. */
+#define GPIO_OUT_PIN13_Msk (0x1UL << GPIO_OUT_PIN13_Pos) /*!< Bit mask of PIN13 field. */
+#define GPIO_OUT_PIN13_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN13_High (1UL) /*!< Pin driver is high */
+
+/* Bit 12 : Pin 12 */
+#define GPIO_OUT_PIN12_Pos (12UL) /*!< Position of PIN12 field. */
+#define GPIO_OUT_PIN12_Msk (0x1UL << GPIO_OUT_PIN12_Pos) /*!< Bit mask of PIN12 field. */
+#define GPIO_OUT_PIN12_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN12_High (1UL) /*!< Pin driver is high */
+
+/* Bit 11 : Pin 11 */
+#define GPIO_OUT_PIN11_Pos (11UL) /*!< Position of PIN11 field. */
+#define GPIO_OUT_PIN11_Msk (0x1UL << GPIO_OUT_PIN11_Pos) /*!< Bit mask of PIN11 field. */
+#define GPIO_OUT_PIN11_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN11_High (1UL) /*!< Pin driver is high */
+
+/* Bit 10 : Pin 10 */
+#define GPIO_OUT_PIN10_Pos (10UL) /*!< Position of PIN10 field. */
+#define GPIO_OUT_PIN10_Msk (0x1UL << GPIO_OUT_PIN10_Pos) /*!< Bit mask of PIN10 field. */
+#define GPIO_OUT_PIN10_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN10_High (1UL) /*!< Pin driver is high */
+
+/* Bit 9 : Pin 9 */
+#define GPIO_OUT_PIN9_Pos (9UL) /*!< Position of PIN9 field. */
+#define GPIO_OUT_PIN9_Msk (0x1UL << GPIO_OUT_PIN9_Pos) /*!< Bit mask of PIN9 field. */
+#define GPIO_OUT_PIN9_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN9_High (1UL) /*!< Pin driver is high */
+
+/* Bit 8 : Pin 8 */
+#define GPIO_OUT_PIN8_Pos (8UL) /*!< Position of PIN8 field. */
+#define GPIO_OUT_PIN8_Msk (0x1UL << GPIO_OUT_PIN8_Pos) /*!< Bit mask of PIN8 field. */
+#define GPIO_OUT_PIN8_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN8_High (1UL) /*!< Pin driver is high */
+
+/* Bit 7 : Pin 7 */
+#define GPIO_OUT_PIN7_Pos (7UL) /*!< Position of PIN7 field. */
+#define GPIO_OUT_PIN7_Msk (0x1UL << GPIO_OUT_PIN7_Pos) /*!< Bit mask of PIN7 field. */
+#define GPIO_OUT_PIN7_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN7_High (1UL) /*!< Pin driver is high */
+
+/* Bit 6 : Pin 6 */
+#define GPIO_OUT_PIN6_Pos (6UL) /*!< Position of PIN6 field. */
+#define GPIO_OUT_PIN6_Msk (0x1UL << GPIO_OUT_PIN6_Pos) /*!< Bit mask of PIN6 field. */
+#define GPIO_OUT_PIN6_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN6_High (1UL) /*!< Pin driver is high */
+
+/* Bit 5 : Pin 5 */
+#define GPIO_OUT_PIN5_Pos (5UL) /*!< Position of PIN5 field. */
+#define GPIO_OUT_PIN5_Msk (0x1UL << GPIO_OUT_PIN5_Pos) /*!< Bit mask of PIN5 field. */
+#define GPIO_OUT_PIN5_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN5_High (1UL) /*!< Pin driver is high */
+
+/* Bit 4 : Pin 4 */
+#define GPIO_OUT_PIN4_Pos (4UL) /*!< Position of PIN4 field. */
+#define GPIO_OUT_PIN4_Msk (0x1UL << GPIO_OUT_PIN4_Pos) /*!< Bit mask of PIN4 field. */
+#define GPIO_OUT_PIN4_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN4_High (1UL) /*!< Pin driver is high */
+
+/* Bit 3 : Pin 3 */
+#define GPIO_OUT_PIN3_Pos (3UL) /*!< Position of PIN3 field. */
+#define GPIO_OUT_PIN3_Msk (0x1UL << GPIO_OUT_PIN3_Pos) /*!< Bit mask of PIN3 field. */
+#define GPIO_OUT_PIN3_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN3_High (1UL) /*!< Pin driver is high */
+
+/* Bit 2 : Pin 2 */
+#define GPIO_OUT_PIN2_Pos (2UL) /*!< Position of PIN2 field. */
+#define GPIO_OUT_PIN2_Msk (0x1UL << GPIO_OUT_PIN2_Pos) /*!< Bit mask of PIN2 field. */
+#define GPIO_OUT_PIN2_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN2_High (1UL) /*!< Pin driver is high */
+
+/* Bit 1 : Pin 1 */
+#define GPIO_OUT_PIN1_Pos (1UL) /*!< Position of PIN1 field. */
+#define GPIO_OUT_PIN1_Msk (0x1UL << GPIO_OUT_PIN1_Pos) /*!< Bit mask of PIN1 field. */
+#define GPIO_OUT_PIN1_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN1_High (1UL) /*!< Pin driver is high */
+
+/* Bit 0 : Pin 0 */
+#define GPIO_OUT_PIN0_Pos (0UL) /*!< Position of PIN0 field. */
+#define GPIO_OUT_PIN0_Msk (0x1UL << GPIO_OUT_PIN0_Pos) /*!< Bit mask of PIN0 field. */
+#define GPIO_OUT_PIN0_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN0_High (1UL) /*!< Pin driver is high */
+
+/* Register: GPIO_OUTSET */
+/* Description: Set individual bits in GPIO port */
+
+/* Bit 31 : Pin 31 */
+#define GPIO_OUTSET_PIN31_Pos (31UL) /*!< Position of PIN31 field. */
+#define GPIO_OUTSET_PIN31_Msk (0x1UL << GPIO_OUTSET_PIN31_Pos) /*!< Bit mask of PIN31 field. */
+#define GPIO_OUTSET_PIN31_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN31_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN31_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 30 : Pin 30 */
+#define GPIO_OUTSET_PIN30_Pos (30UL) /*!< Position of PIN30 field. */
+#define GPIO_OUTSET_PIN30_Msk (0x1UL << GPIO_OUTSET_PIN30_Pos) /*!< Bit mask of PIN30 field. */
+#define GPIO_OUTSET_PIN30_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN30_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN30_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 29 : Pin 29 */
+#define GPIO_OUTSET_PIN29_Pos (29UL) /*!< Position of PIN29 field. */
+#define GPIO_OUTSET_PIN29_Msk (0x1UL << GPIO_OUTSET_PIN29_Pos) /*!< Bit mask of PIN29 field. */
+#define GPIO_OUTSET_PIN29_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN29_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN29_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 28 : Pin 28 */
+#define GPIO_OUTSET_PIN28_Pos (28UL) /*!< Position of PIN28 field. */
+#define GPIO_OUTSET_PIN28_Msk (0x1UL << GPIO_OUTSET_PIN28_Pos) /*!< Bit mask of PIN28 field. */
+#define GPIO_OUTSET_PIN28_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN28_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN28_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 27 : Pin 27 */
+#define GPIO_OUTSET_PIN27_Pos (27UL) /*!< Position of PIN27 field. */
+#define GPIO_OUTSET_PIN27_Msk (0x1UL << GPIO_OUTSET_PIN27_Pos) /*!< Bit mask of PIN27 field. */
+#define GPIO_OUTSET_PIN27_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN27_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN27_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 26 : Pin 26 */
+#define GPIO_OUTSET_PIN26_Pos (26UL) /*!< Position of PIN26 field. */
+#define GPIO_OUTSET_PIN26_Msk (0x1UL << GPIO_OUTSET_PIN26_Pos) /*!< Bit mask of PIN26 field. */
+#define GPIO_OUTSET_PIN26_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN26_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN26_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 25 : Pin 25 */
+#define GPIO_OUTSET_PIN25_Pos (25UL) /*!< Position of PIN25 field. */
+#define GPIO_OUTSET_PIN25_Msk (0x1UL << GPIO_OUTSET_PIN25_Pos) /*!< Bit mask of PIN25 field. */
+#define GPIO_OUTSET_PIN25_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN25_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN25_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 24 : Pin 24 */
+#define GPIO_OUTSET_PIN24_Pos (24UL) /*!< Position of PIN24 field. */
+#define GPIO_OUTSET_PIN24_Msk (0x1UL << GPIO_OUTSET_PIN24_Pos) /*!< Bit mask of PIN24 field. */
+#define GPIO_OUTSET_PIN24_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN24_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN24_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 23 : Pin 23 */
+#define GPIO_OUTSET_PIN23_Pos (23UL) /*!< Position of PIN23 field. */
+#define GPIO_OUTSET_PIN23_Msk (0x1UL << GPIO_OUTSET_PIN23_Pos) /*!< Bit mask of PIN23 field. */
+#define GPIO_OUTSET_PIN23_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN23_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN23_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 22 : Pin 22 */
+#define GPIO_OUTSET_PIN22_Pos (22UL) /*!< Position of PIN22 field. */
+#define GPIO_OUTSET_PIN22_Msk (0x1UL << GPIO_OUTSET_PIN22_Pos) /*!< Bit mask of PIN22 field. */
+#define GPIO_OUTSET_PIN22_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN22_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN22_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 21 : Pin 21 */
+#define GPIO_OUTSET_PIN21_Pos (21UL) /*!< Position of PIN21 field. */
+#define GPIO_OUTSET_PIN21_Msk (0x1UL << GPIO_OUTSET_PIN21_Pos) /*!< Bit mask of PIN21 field. */
+#define GPIO_OUTSET_PIN21_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN21_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN21_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 20 : Pin 20 */
+#define GPIO_OUTSET_PIN20_Pos (20UL) /*!< Position of PIN20 field. */
+#define GPIO_OUTSET_PIN20_Msk (0x1UL << GPIO_OUTSET_PIN20_Pos) /*!< Bit mask of PIN20 field. */
+#define GPIO_OUTSET_PIN20_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN20_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN20_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 19 : Pin 19 */
+#define GPIO_OUTSET_PIN19_Pos (19UL) /*!< Position of PIN19 field. */
+#define GPIO_OUTSET_PIN19_Msk (0x1UL << GPIO_OUTSET_PIN19_Pos) /*!< Bit mask of PIN19 field. */
+#define GPIO_OUTSET_PIN19_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN19_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN19_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 18 : Pin 18 */
+#define GPIO_OUTSET_PIN18_Pos (18UL) /*!< Position of PIN18 field. */
+#define GPIO_OUTSET_PIN18_Msk (0x1UL << GPIO_OUTSET_PIN18_Pos) /*!< Bit mask of PIN18 field. */
+#define GPIO_OUTSET_PIN18_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN18_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN18_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 17 : Pin 17 */
+#define GPIO_OUTSET_PIN17_Pos (17UL) /*!< Position of PIN17 field. */
+#define GPIO_OUTSET_PIN17_Msk (0x1UL << GPIO_OUTSET_PIN17_Pos) /*!< Bit mask of PIN17 field. */
+#define GPIO_OUTSET_PIN17_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN17_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN17_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 16 : Pin 16 */
+#define GPIO_OUTSET_PIN16_Pos (16UL) /*!< Position of PIN16 field. */
+#define GPIO_OUTSET_PIN16_Msk (0x1UL << GPIO_OUTSET_PIN16_Pos) /*!< Bit mask of PIN16 field. */
+#define GPIO_OUTSET_PIN16_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN16_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN16_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 15 : Pin 15 */
+#define GPIO_OUTSET_PIN15_Pos (15UL) /*!< Position of PIN15 field. */
+#define GPIO_OUTSET_PIN15_Msk (0x1UL << GPIO_OUTSET_PIN15_Pos) /*!< Bit mask of PIN15 field. */
+#define GPIO_OUTSET_PIN15_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN15_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN15_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 14 : Pin 14 */
+#define GPIO_OUTSET_PIN14_Pos (14UL) /*!< Position of PIN14 field. */
+#define GPIO_OUTSET_PIN14_Msk (0x1UL << GPIO_OUTSET_PIN14_Pos) /*!< Bit mask of PIN14 field. */
+#define GPIO_OUTSET_PIN14_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN14_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN14_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 13 : Pin 13 */
+#define GPIO_OUTSET_PIN13_Pos (13UL) /*!< Position of PIN13 field. */
+#define GPIO_OUTSET_PIN13_Msk (0x1UL << GPIO_OUTSET_PIN13_Pos) /*!< Bit mask of PIN13 field. */
+#define GPIO_OUTSET_PIN13_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN13_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN13_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 12 : Pin 12 */
+#define GPIO_OUTSET_PIN12_Pos (12UL) /*!< Position of PIN12 field. */
+#define GPIO_OUTSET_PIN12_Msk (0x1UL << GPIO_OUTSET_PIN12_Pos) /*!< Bit mask of PIN12 field. */
+#define GPIO_OUTSET_PIN12_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN12_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN12_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 11 : Pin 11 */
+#define GPIO_OUTSET_PIN11_Pos (11UL) /*!< Position of PIN11 field. */
+#define GPIO_OUTSET_PIN11_Msk (0x1UL << GPIO_OUTSET_PIN11_Pos) /*!< Bit mask of PIN11 field. */
+#define GPIO_OUTSET_PIN11_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN11_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN11_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 10 : Pin 10 */
+#define GPIO_OUTSET_PIN10_Pos (10UL) /*!< Position of PIN10 field. */
+#define GPIO_OUTSET_PIN10_Msk (0x1UL << GPIO_OUTSET_PIN10_Pos) /*!< Bit mask of PIN10 field. */
+#define GPIO_OUTSET_PIN10_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN10_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN10_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 9 : Pin 9 */
+#define GPIO_OUTSET_PIN9_Pos (9UL) /*!< Position of PIN9 field. */
+#define GPIO_OUTSET_PIN9_Msk (0x1UL << GPIO_OUTSET_PIN9_Pos) /*!< Bit mask of PIN9 field. */
+#define GPIO_OUTSET_PIN9_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN9_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN9_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 8 : Pin 8 */
+#define GPIO_OUTSET_PIN8_Pos (8UL) /*!< Position of PIN8 field. */
+#define GPIO_OUTSET_PIN8_Msk (0x1UL << GPIO_OUTSET_PIN8_Pos) /*!< Bit mask of PIN8 field. */
+#define GPIO_OUTSET_PIN8_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN8_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN8_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 7 : Pin 7 */
+#define GPIO_OUTSET_PIN7_Pos (7UL) /*!< Position of PIN7 field. */
+#define GPIO_OUTSET_PIN7_Msk (0x1UL << GPIO_OUTSET_PIN7_Pos) /*!< Bit mask of PIN7 field. */
+#define GPIO_OUTSET_PIN7_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN7_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN7_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 6 : Pin 6 */
+#define GPIO_OUTSET_PIN6_Pos (6UL) /*!< Position of PIN6 field. */
+#define GPIO_OUTSET_PIN6_Msk (0x1UL << GPIO_OUTSET_PIN6_Pos) /*!< Bit mask of PIN6 field. */
+#define GPIO_OUTSET_PIN6_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN6_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN6_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 5 : Pin 5 */
+#define GPIO_OUTSET_PIN5_Pos (5UL) /*!< Position of PIN5 field. */
+#define GPIO_OUTSET_PIN5_Msk (0x1UL << GPIO_OUTSET_PIN5_Pos) /*!< Bit mask of PIN5 field. */
+#define GPIO_OUTSET_PIN5_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN5_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN5_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 4 : Pin 4 */
+#define GPIO_OUTSET_PIN4_Pos (4UL) /*!< Position of PIN4 field. */
+#define GPIO_OUTSET_PIN4_Msk (0x1UL << GPIO_OUTSET_PIN4_Pos) /*!< Bit mask of PIN4 field. */
+#define GPIO_OUTSET_PIN4_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN4_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN4_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 3 : Pin 3 */
+#define GPIO_OUTSET_PIN3_Pos (3UL) /*!< Position of PIN3 field. */
+#define GPIO_OUTSET_PIN3_Msk (0x1UL << GPIO_OUTSET_PIN3_Pos) /*!< Bit mask of PIN3 field. */
+#define GPIO_OUTSET_PIN3_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN3_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN3_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 2 : Pin 2 */
+#define GPIO_OUTSET_PIN2_Pos (2UL) /*!< Position of PIN2 field. */
+#define GPIO_OUTSET_PIN2_Msk (0x1UL << GPIO_OUTSET_PIN2_Pos) /*!< Bit mask of PIN2 field. */
+#define GPIO_OUTSET_PIN2_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN2_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN2_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 1 : Pin 1 */
+#define GPIO_OUTSET_PIN1_Pos (1UL) /*!< Position of PIN1 field. */
+#define GPIO_OUTSET_PIN1_Msk (0x1UL << GPIO_OUTSET_PIN1_Pos) /*!< Bit mask of PIN1 field. */
+#define GPIO_OUTSET_PIN1_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN1_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN1_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 0 : Pin 0 */
+#define GPIO_OUTSET_PIN0_Pos (0UL) /*!< Position of PIN0 field. */
+#define GPIO_OUTSET_PIN0_Msk (0x1UL << GPIO_OUTSET_PIN0_Pos) /*!< Bit mask of PIN0 field. */
+#define GPIO_OUTSET_PIN0_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN0_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN0_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Register: GPIO_OUTCLR */
+/* Description: Clear individual bits in GPIO port */
+
+/* Bit 31 : Pin 31 */
+#define GPIO_OUTCLR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */
+#define GPIO_OUTCLR_PIN31_Msk (0x1UL << GPIO_OUTCLR_PIN31_Pos) /*!< Bit mask of PIN31 field. */
+#define GPIO_OUTCLR_PIN31_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN31_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN31_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 30 : Pin 30 */
+#define GPIO_OUTCLR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */
+#define GPIO_OUTCLR_PIN30_Msk (0x1UL << GPIO_OUTCLR_PIN30_Pos) /*!< Bit mask of PIN30 field. */
+#define GPIO_OUTCLR_PIN30_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN30_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN30_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 29 : Pin 29 */
+#define GPIO_OUTCLR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */
+#define GPIO_OUTCLR_PIN29_Msk (0x1UL << GPIO_OUTCLR_PIN29_Pos) /*!< Bit mask of PIN29 field. */
+#define GPIO_OUTCLR_PIN29_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN29_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN29_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 28 : Pin 28 */
+#define GPIO_OUTCLR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */
+#define GPIO_OUTCLR_PIN28_Msk (0x1UL << GPIO_OUTCLR_PIN28_Pos) /*!< Bit mask of PIN28 field. */
+#define GPIO_OUTCLR_PIN28_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN28_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN28_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 27 : Pin 27 */
+#define GPIO_OUTCLR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */
+#define GPIO_OUTCLR_PIN27_Msk (0x1UL << GPIO_OUTCLR_PIN27_Pos) /*!< Bit mask of PIN27 field. */
+#define GPIO_OUTCLR_PIN27_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN27_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN27_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 26 : Pin 26 */
+#define GPIO_OUTCLR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */
+#define GPIO_OUTCLR_PIN26_Msk (0x1UL << GPIO_OUTCLR_PIN26_Pos) /*!< Bit mask of PIN26 field. */
+#define GPIO_OUTCLR_PIN26_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN26_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN26_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 25 : Pin 25 */
+#define GPIO_OUTCLR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */
+#define GPIO_OUTCLR_PIN25_Msk (0x1UL << GPIO_OUTCLR_PIN25_Pos) /*!< Bit mask of PIN25 field. */
+#define GPIO_OUTCLR_PIN25_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN25_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN25_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 24 : Pin 24 */
+#define GPIO_OUTCLR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */
+#define GPIO_OUTCLR_PIN24_Msk (0x1UL << GPIO_OUTCLR_PIN24_Pos) /*!< Bit mask of PIN24 field. */
+#define GPIO_OUTCLR_PIN24_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN24_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN24_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 23 : Pin 23 */
+#define GPIO_OUTCLR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */
+#define GPIO_OUTCLR_PIN23_Msk (0x1UL << GPIO_OUTCLR_PIN23_Pos) /*!< Bit mask of PIN23 field. */
+#define GPIO_OUTCLR_PIN23_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN23_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN23_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 22 : Pin 22 */
+#define GPIO_OUTCLR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */
+#define GPIO_OUTCLR_PIN22_Msk (0x1UL << GPIO_OUTCLR_PIN22_Pos) /*!< Bit mask of PIN22 field. */
+#define GPIO_OUTCLR_PIN22_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN22_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN22_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 21 : Pin 21 */
+#define GPIO_OUTCLR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */
+#define GPIO_OUTCLR_PIN21_Msk (0x1UL << GPIO_OUTCLR_PIN21_Pos) /*!< Bit mask of PIN21 field. */
+#define GPIO_OUTCLR_PIN21_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN21_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN21_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 20 : Pin 20 */
+#define GPIO_OUTCLR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */
+#define GPIO_OUTCLR_PIN20_Msk (0x1UL << GPIO_OUTCLR_PIN20_Pos) /*!< Bit mask of PIN20 field. */
+#define GPIO_OUTCLR_PIN20_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN20_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN20_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 19 : Pin 19 */
+#define GPIO_OUTCLR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */
+#define GPIO_OUTCLR_PIN19_Msk (0x1UL << GPIO_OUTCLR_PIN19_Pos) /*!< Bit mask of PIN19 field. */
+#define GPIO_OUTCLR_PIN19_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN19_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN19_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 18 : Pin 18 */
+#define GPIO_OUTCLR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */
+#define GPIO_OUTCLR_PIN18_Msk (0x1UL << GPIO_OUTCLR_PIN18_Pos) /*!< Bit mask of PIN18 field. */
+#define GPIO_OUTCLR_PIN18_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN18_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN18_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 17 : Pin 17 */
+#define GPIO_OUTCLR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */
+#define GPIO_OUTCLR_PIN17_Msk (0x1UL << GPIO_OUTCLR_PIN17_Pos) /*!< Bit mask of PIN17 field. */
+#define GPIO_OUTCLR_PIN17_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN17_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN17_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 16 : Pin 16 */
+#define GPIO_OUTCLR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */
+#define GPIO_OUTCLR_PIN16_Msk (0x1UL << GPIO_OUTCLR_PIN16_Pos) /*!< Bit mask of PIN16 field. */
+#define GPIO_OUTCLR_PIN16_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN16_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN16_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 15 : Pin 15 */
+#define GPIO_OUTCLR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */
+#define GPIO_OUTCLR_PIN15_Msk (0x1UL << GPIO_OUTCLR_PIN15_Pos) /*!< Bit mask of PIN15 field. */
+#define GPIO_OUTCLR_PIN15_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN15_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN15_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 14 : Pin 14 */
+#define GPIO_OUTCLR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */
+#define GPIO_OUTCLR_PIN14_Msk (0x1UL << GPIO_OUTCLR_PIN14_Pos) /*!< Bit mask of PIN14 field. */
+#define GPIO_OUTCLR_PIN14_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN14_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN14_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 13 : Pin 13 */
+#define GPIO_OUTCLR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */
+#define GPIO_OUTCLR_PIN13_Msk (0x1UL << GPIO_OUTCLR_PIN13_Pos) /*!< Bit mask of PIN13 field. */
+#define GPIO_OUTCLR_PIN13_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN13_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN13_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 12 : Pin 12 */
+#define GPIO_OUTCLR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */
+#define GPIO_OUTCLR_PIN12_Msk (0x1UL << GPIO_OUTCLR_PIN12_Pos) /*!< Bit mask of PIN12 field. */
+#define GPIO_OUTCLR_PIN12_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN12_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN12_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 11 : Pin 11 */
+#define GPIO_OUTCLR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */
+#define GPIO_OUTCLR_PIN11_Msk (0x1UL << GPIO_OUTCLR_PIN11_Pos) /*!< Bit mask of PIN11 field. */
+#define GPIO_OUTCLR_PIN11_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN11_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN11_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 10 : Pin 10 */
+#define GPIO_OUTCLR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */
+#define GPIO_OUTCLR_PIN10_Msk (0x1UL << GPIO_OUTCLR_PIN10_Pos) /*!< Bit mask of PIN10 field. */
+#define GPIO_OUTCLR_PIN10_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN10_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN10_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 9 : Pin 9 */
+#define GPIO_OUTCLR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */
+#define GPIO_OUTCLR_PIN9_Msk (0x1UL << GPIO_OUTCLR_PIN9_Pos) /*!< Bit mask of PIN9 field. */
+#define GPIO_OUTCLR_PIN9_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN9_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN9_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 8 : Pin 8 */
+#define GPIO_OUTCLR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */
+#define GPIO_OUTCLR_PIN8_Msk (0x1UL << GPIO_OUTCLR_PIN8_Pos) /*!< Bit mask of PIN8 field. */
+#define GPIO_OUTCLR_PIN8_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN8_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN8_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 7 : Pin 7 */
+#define GPIO_OUTCLR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */
+#define GPIO_OUTCLR_PIN7_Msk (0x1UL << GPIO_OUTCLR_PIN7_Pos) /*!< Bit mask of PIN7 field. */
+#define GPIO_OUTCLR_PIN7_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN7_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN7_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 6 : Pin 6 */
+#define GPIO_OUTCLR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */
+#define GPIO_OUTCLR_PIN6_Msk (0x1UL << GPIO_OUTCLR_PIN6_Pos) /*!< Bit mask of PIN6 field. */
+#define GPIO_OUTCLR_PIN6_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN6_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN6_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 5 : Pin 5 */
+#define GPIO_OUTCLR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */
+#define GPIO_OUTCLR_PIN5_Msk (0x1UL << GPIO_OUTCLR_PIN5_Pos) /*!< Bit mask of PIN5 field. */
+#define GPIO_OUTCLR_PIN5_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN5_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN5_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 4 : Pin 4 */
+#define GPIO_OUTCLR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */
+#define GPIO_OUTCLR_PIN4_Msk (0x1UL << GPIO_OUTCLR_PIN4_Pos) /*!< Bit mask of PIN4 field. */
+#define GPIO_OUTCLR_PIN4_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN4_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN4_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 3 : Pin 3 */
+#define GPIO_OUTCLR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */
+#define GPIO_OUTCLR_PIN3_Msk (0x1UL << GPIO_OUTCLR_PIN3_Pos) /*!< Bit mask of PIN3 field. */
+#define GPIO_OUTCLR_PIN3_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN3_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN3_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 2 : Pin 2 */
+#define GPIO_OUTCLR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */
+#define GPIO_OUTCLR_PIN2_Msk (0x1UL << GPIO_OUTCLR_PIN2_Pos) /*!< Bit mask of PIN2 field. */
+#define GPIO_OUTCLR_PIN2_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN2_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN2_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 1 : Pin 1 */
+#define GPIO_OUTCLR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */
+#define GPIO_OUTCLR_PIN1_Msk (0x1UL << GPIO_OUTCLR_PIN1_Pos) /*!< Bit mask of PIN1 field. */
+#define GPIO_OUTCLR_PIN1_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN1_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN1_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 0 : Pin 0 */
+#define GPIO_OUTCLR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */
+#define GPIO_OUTCLR_PIN0_Msk (0x1UL << GPIO_OUTCLR_PIN0_Pos) /*!< Bit mask of PIN0 field. */
+#define GPIO_OUTCLR_PIN0_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN0_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN0_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Register: GPIO_IN */
+/* Description: Read GPIO port */
+
+/* Bit 31 : Pin 31 */
+#define GPIO_IN_PIN31_Pos (31UL) /*!< Position of PIN31 field. */
+#define GPIO_IN_PIN31_Msk (0x1UL << GPIO_IN_PIN31_Pos) /*!< Bit mask of PIN31 field. */
+#define GPIO_IN_PIN31_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN31_High (1UL) /*!< Pin input is high */
+
+/* Bit 30 : Pin 30 */
+#define GPIO_IN_PIN30_Pos (30UL) /*!< Position of PIN30 field. */
+#define GPIO_IN_PIN30_Msk (0x1UL << GPIO_IN_PIN30_Pos) /*!< Bit mask of PIN30 field. */
+#define GPIO_IN_PIN30_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN30_High (1UL) /*!< Pin input is high */
+
+/* Bit 29 : Pin 29 */
+#define GPIO_IN_PIN29_Pos (29UL) /*!< Position of PIN29 field. */
+#define GPIO_IN_PIN29_Msk (0x1UL << GPIO_IN_PIN29_Pos) /*!< Bit mask of PIN29 field. */
+#define GPIO_IN_PIN29_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN29_High (1UL) /*!< Pin input is high */
+
+/* Bit 28 : Pin 28 */
+#define GPIO_IN_PIN28_Pos (28UL) /*!< Position of PIN28 field. */
+#define GPIO_IN_PIN28_Msk (0x1UL << GPIO_IN_PIN28_Pos) /*!< Bit mask of PIN28 field. */
+#define GPIO_IN_PIN28_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN28_High (1UL) /*!< Pin input is high */
+
+/* Bit 27 : Pin 27 */
+#define GPIO_IN_PIN27_Pos (27UL) /*!< Position of PIN27 field. */
+#define GPIO_IN_PIN27_Msk (0x1UL << GPIO_IN_PIN27_Pos) /*!< Bit mask of PIN27 field. */
+#define GPIO_IN_PIN27_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN27_High (1UL) /*!< Pin input is high */
+
+/* Bit 26 : Pin 26 */
+#define GPIO_IN_PIN26_Pos (26UL) /*!< Position of PIN26 field. */
+#define GPIO_IN_PIN26_Msk (0x1UL << GPIO_IN_PIN26_Pos) /*!< Bit mask of PIN26 field. */
+#define GPIO_IN_PIN26_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN26_High (1UL) /*!< Pin input is high */
+
+/* Bit 25 : Pin 25 */
+#define GPIO_IN_PIN25_Pos (25UL) /*!< Position of PIN25 field. */
+#define GPIO_IN_PIN25_Msk (0x1UL << GPIO_IN_PIN25_Pos) /*!< Bit mask of PIN25 field. */
+#define GPIO_IN_PIN25_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN25_High (1UL) /*!< Pin input is high */
+
+/* Bit 24 : Pin 24 */
+#define GPIO_IN_PIN24_Pos (24UL) /*!< Position of PIN24 field. */
+#define GPIO_IN_PIN24_Msk (0x1UL << GPIO_IN_PIN24_Pos) /*!< Bit mask of PIN24 field. */
+#define GPIO_IN_PIN24_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN24_High (1UL) /*!< Pin input is high */
+
+/* Bit 23 : Pin 23 */
+#define GPIO_IN_PIN23_Pos (23UL) /*!< Position of PIN23 field. */
+#define GPIO_IN_PIN23_Msk (0x1UL << GPIO_IN_PIN23_Pos) /*!< Bit mask of PIN23 field. */
+#define GPIO_IN_PIN23_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN23_High (1UL) /*!< Pin input is high */
+
+/* Bit 22 : Pin 22 */
+#define GPIO_IN_PIN22_Pos (22UL) /*!< Position of PIN22 field. */
+#define GPIO_IN_PIN22_Msk (0x1UL << GPIO_IN_PIN22_Pos) /*!< Bit mask of PIN22 field. */
+#define GPIO_IN_PIN22_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN22_High (1UL) /*!< Pin input is high */
+
+/* Bit 21 : Pin 21 */
+#define GPIO_IN_PIN21_Pos (21UL) /*!< Position of PIN21 field. */
+#define GPIO_IN_PIN21_Msk (0x1UL << GPIO_IN_PIN21_Pos) /*!< Bit mask of PIN21 field. */
+#define GPIO_IN_PIN21_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN21_High (1UL) /*!< Pin input is high */
+
+/* Bit 20 : Pin 20 */
+#define GPIO_IN_PIN20_Pos (20UL) /*!< Position of PIN20 field. */
+#define GPIO_IN_PIN20_Msk (0x1UL << GPIO_IN_PIN20_Pos) /*!< Bit mask of PIN20 field. */
+#define GPIO_IN_PIN20_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN20_High (1UL) /*!< Pin input is high */
+
+/* Bit 19 : Pin 19 */
+#define GPIO_IN_PIN19_Pos (19UL) /*!< Position of PIN19 field. */
+#define GPIO_IN_PIN19_Msk (0x1UL << GPIO_IN_PIN19_Pos) /*!< Bit mask of PIN19 field. */
+#define GPIO_IN_PIN19_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN19_High (1UL) /*!< Pin input is high */
+
+/* Bit 18 : Pin 18 */
+#define GPIO_IN_PIN18_Pos (18UL) /*!< Position of PIN18 field. */
+#define GPIO_IN_PIN18_Msk (0x1UL << GPIO_IN_PIN18_Pos) /*!< Bit mask of PIN18 field. */
+#define GPIO_IN_PIN18_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN18_High (1UL) /*!< Pin input is high */
+
+/* Bit 17 : Pin 17 */
+#define GPIO_IN_PIN17_Pos (17UL) /*!< Position of PIN17 field. */
+#define GPIO_IN_PIN17_Msk (0x1UL << GPIO_IN_PIN17_Pos) /*!< Bit mask of PIN17 field. */
+#define GPIO_IN_PIN17_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN17_High (1UL) /*!< Pin input is high */
+
+/* Bit 16 : Pin 16 */
+#define GPIO_IN_PIN16_Pos (16UL) /*!< Position of PIN16 field. */
+#define GPIO_IN_PIN16_Msk (0x1UL << GPIO_IN_PIN16_Pos) /*!< Bit mask of PIN16 field. */
+#define GPIO_IN_PIN16_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN16_High (1UL) /*!< Pin input is high */
+
+/* Bit 15 : Pin 15 */
+#define GPIO_IN_PIN15_Pos (15UL) /*!< Position of PIN15 field. */
+#define GPIO_IN_PIN15_Msk (0x1UL << GPIO_IN_PIN15_Pos) /*!< Bit mask of PIN15 field. */
+#define GPIO_IN_PIN15_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN15_High (1UL) /*!< Pin input is high */
+
+/* Bit 14 : Pin 14 */
+#define GPIO_IN_PIN14_Pos (14UL) /*!< Position of PIN14 field. */
+#define GPIO_IN_PIN14_Msk (0x1UL << GPIO_IN_PIN14_Pos) /*!< Bit mask of PIN14 field. */
+#define GPIO_IN_PIN14_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN14_High (1UL) /*!< Pin input is high */
+
+/* Bit 13 : Pin 13 */
+#define GPIO_IN_PIN13_Pos (13UL) /*!< Position of PIN13 field. */
+#define GPIO_IN_PIN13_Msk (0x1UL << GPIO_IN_PIN13_Pos) /*!< Bit mask of PIN13 field. */
+#define GPIO_IN_PIN13_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN13_High (1UL) /*!< Pin input is high */
+
+/* Bit 12 : Pin 12 */
+#define GPIO_IN_PIN12_Pos (12UL) /*!< Position of PIN12 field. */
+#define GPIO_IN_PIN12_Msk (0x1UL << GPIO_IN_PIN12_Pos) /*!< Bit mask of PIN12 field. */
+#define GPIO_IN_PIN12_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN12_High (1UL) /*!< Pin input is high */
+
+/* Bit 11 : Pin 11 */
+#define GPIO_IN_PIN11_Pos (11UL) /*!< Position of PIN11 field. */
+#define GPIO_IN_PIN11_Msk (0x1UL << GPIO_IN_PIN11_Pos) /*!< Bit mask of PIN11 field. */
+#define GPIO_IN_PIN11_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN11_High (1UL) /*!< Pin input is high */
+
+/* Bit 10 : Pin 10 */
+#define GPIO_IN_PIN10_Pos (10UL) /*!< Position of PIN10 field. */
+#define GPIO_IN_PIN10_Msk (0x1UL << GPIO_IN_PIN10_Pos) /*!< Bit mask of PIN10 field. */
+#define GPIO_IN_PIN10_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN10_High (1UL) /*!< Pin input is high */
+
+/* Bit 9 : Pin 9 */
+#define GPIO_IN_PIN9_Pos (9UL) /*!< Position of PIN9 field. */
+#define GPIO_IN_PIN9_Msk (0x1UL << GPIO_IN_PIN9_Pos) /*!< Bit mask of PIN9 field. */
+#define GPIO_IN_PIN9_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN9_High (1UL) /*!< Pin input is high */
+
+/* Bit 8 : Pin 8 */
+#define GPIO_IN_PIN8_Pos (8UL) /*!< Position of PIN8 field. */
+#define GPIO_IN_PIN8_Msk (0x1UL << GPIO_IN_PIN8_Pos) /*!< Bit mask of PIN8 field. */
+#define GPIO_IN_PIN8_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN8_High (1UL) /*!< Pin input is high */
+
+/* Bit 7 : Pin 7 */
+#define GPIO_IN_PIN7_Pos (7UL) /*!< Position of PIN7 field. */
+#define GPIO_IN_PIN7_Msk (0x1UL << GPIO_IN_PIN7_Pos) /*!< Bit mask of PIN7 field. */
+#define GPIO_IN_PIN7_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN7_High (1UL) /*!< Pin input is high */
+
+/* Bit 6 : Pin 6 */
+#define GPIO_IN_PIN6_Pos (6UL) /*!< Position of PIN6 field. */
+#define GPIO_IN_PIN6_Msk (0x1UL << GPIO_IN_PIN6_Pos) /*!< Bit mask of PIN6 field. */
+#define GPIO_IN_PIN6_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN6_High (1UL) /*!< Pin input is high */
+
+/* Bit 5 : Pin 5 */
+#define GPIO_IN_PIN5_Pos (5UL) /*!< Position of PIN5 field. */
+#define GPIO_IN_PIN5_Msk (0x1UL << GPIO_IN_PIN5_Pos) /*!< Bit mask of PIN5 field. */
+#define GPIO_IN_PIN5_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN5_High (1UL) /*!< Pin input is high */
+
+/* Bit 4 : Pin 4 */
+#define GPIO_IN_PIN4_Pos (4UL) /*!< Position of PIN4 field. */
+#define GPIO_IN_PIN4_Msk (0x1UL << GPIO_IN_PIN4_Pos) /*!< Bit mask of PIN4 field. */
+#define GPIO_IN_PIN4_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN4_High (1UL) /*!< Pin input is high */
+
+/* Bit 3 : Pin 3 */
+#define GPIO_IN_PIN3_Pos (3UL) /*!< Position of PIN3 field. */
+#define GPIO_IN_PIN3_Msk (0x1UL << GPIO_IN_PIN3_Pos) /*!< Bit mask of PIN3 field. */
+#define GPIO_IN_PIN3_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN3_High (1UL) /*!< Pin input is high */
+
+/* Bit 2 : Pin 2 */
+#define GPIO_IN_PIN2_Pos (2UL) /*!< Position of PIN2 field. */
+#define GPIO_IN_PIN2_Msk (0x1UL << GPIO_IN_PIN2_Pos) /*!< Bit mask of PIN2 field. */
+#define GPIO_IN_PIN2_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN2_High (1UL) /*!< Pin input is high */
+
+/* Bit 1 : Pin 1 */
+#define GPIO_IN_PIN1_Pos (1UL) /*!< Position of PIN1 field. */
+#define GPIO_IN_PIN1_Msk (0x1UL << GPIO_IN_PIN1_Pos) /*!< Bit mask of PIN1 field. */
+#define GPIO_IN_PIN1_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN1_High (1UL) /*!< Pin input is high */
+
+/* Bit 0 : Pin 0 */
+#define GPIO_IN_PIN0_Pos (0UL) /*!< Position of PIN0 field. */
+#define GPIO_IN_PIN0_Msk (0x1UL << GPIO_IN_PIN0_Pos) /*!< Bit mask of PIN0 field. */
+#define GPIO_IN_PIN0_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN0_High (1UL) /*!< Pin input is high */
+
+/* Register: GPIO_DIR */
+/* Description: Direction of GPIO pins */
+
+/* Bit 31 : Pin 31 */
+#define GPIO_DIR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */
+#define GPIO_DIR_PIN31_Msk (0x1UL << GPIO_DIR_PIN31_Pos) /*!< Bit mask of PIN31 field. */
+#define GPIO_DIR_PIN31_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN31_Output (1UL) /*!< Pin set as output */
+
+/* Bit 30 : Pin 30 */
+#define GPIO_DIR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */
+#define GPIO_DIR_PIN30_Msk (0x1UL << GPIO_DIR_PIN30_Pos) /*!< Bit mask of PIN30 field. */
+#define GPIO_DIR_PIN30_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN30_Output (1UL) /*!< Pin set as output */
+
+/* Bit 29 : Pin 29 */
+#define GPIO_DIR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */
+#define GPIO_DIR_PIN29_Msk (0x1UL << GPIO_DIR_PIN29_Pos) /*!< Bit mask of PIN29 field. */
+#define GPIO_DIR_PIN29_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN29_Output (1UL) /*!< Pin set as output */
+
+/* Bit 28 : Pin 28 */
+#define GPIO_DIR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */
+#define GPIO_DIR_PIN28_Msk (0x1UL << GPIO_DIR_PIN28_Pos) /*!< Bit mask of PIN28 field. */
+#define GPIO_DIR_PIN28_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN28_Output (1UL) /*!< Pin set as output */
+
+/* Bit 27 : Pin 27 */
+#define GPIO_DIR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */
+#define GPIO_DIR_PIN27_Msk (0x1UL << GPIO_DIR_PIN27_Pos) /*!< Bit mask of PIN27 field. */
+#define GPIO_DIR_PIN27_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN27_Output (1UL) /*!< Pin set as output */
+
+/* Bit 26 : Pin 26 */
+#define GPIO_DIR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */
+#define GPIO_DIR_PIN26_Msk (0x1UL << GPIO_DIR_PIN26_Pos) /*!< Bit mask of PIN26 field. */
+#define GPIO_DIR_PIN26_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN26_Output (1UL) /*!< Pin set as output */
+
+/* Bit 25 : Pin 25 */
+#define GPIO_DIR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */
+#define GPIO_DIR_PIN25_Msk (0x1UL << GPIO_DIR_PIN25_Pos) /*!< Bit mask of PIN25 field. */
+#define GPIO_DIR_PIN25_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN25_Output (1UL) /*!< Pin set as output */
+
+/* Bit 24 : Pin 24 */
+#define GPIO_DIR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */
+#define GPIO_DIR_PIN24_Msk (0x1UL << GPIO_DIR_PIN24_Pos) /*!< Bit mask of PIN24 field. */
+#define GPIO_DIR_PIN24_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN24_Output (1UL) /*!< Pin set as output */
+
+/* Bit 23 : Pin 23 */
+#define GPIO_DIR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */
+#define GPIO_DIR_PIN23_Msk (0x1UL << GPIO_DIR_PIN23_Pos) /*!< Bit mask of PIN23 field. */
+#define GPIO_DIR_PIN23_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN23_Output (1UL) /*!< Pin set as output */
+
+/* Bit 22 : Pin 22 */
+#define GPIO_DIR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */
+#define GPIO_DIR_PIN22_Msk (0x1UL << GPIO_DIR_PIN22_Pos) /*!< Bit mask of PIN22 field. */
+#define GPIO_DIR_PIN22_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN22_Output (1UL) /*!< Pin set as output */
+
+/* Bit 21 : Pin 21 */
+#define GPIO_DIR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */
+#define GPIO_DIR_PIN21_Msk (0x1UL << GPIO_DIR_PIN21_Pos) /*!< Bit mask of PIN21 field. */
+#define GPIO_DIR_PIN21_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN21_Output (1UL) /*!< Pin set as output */
+
+/* Bit 20 : Pin 20 */
+#define GPIO_DIR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */
+#define GPIO_DIR_PIN20_Msk (0x1UL << GPIO_DIR_PIN20_Pos) /*!< Bit mask of PIN20 field. */
+#define GPIO_DIR_PIN20_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN20_Output (1UL) /*!< Pin set as output */
+
+/* Bit 19 : Pin 19 */
+#define GPIO_DIR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */
+#define GPIO_DIR_PIN19_Msk (0x1UL << GPIO_DIR_PIN19_Pos) /*!< Bit mask of PIN19 field. */
+#define GPIO_DIR_PIN19_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN19_Output (1UL) /*!< Pin set as output */
+
+/* Bit 18 : Pin 18 */
+#define GPIO_DIR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */
+#define GPIO_DIR_PIN18_Msk (0x1UL << GPIO_DIR_PIN18_Pos) /*!< Bit mask of PIN18 field. */
+#define GPIO_DIR_PIN18_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN18_Output (1UL) /*!< Pin set as output */
+
+/* Bit 17 : Pin 17 */
+#define GPIO_DIR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */
+#define GPIO_DIR_PIN17_Msk (0x1UL << GPIO_DIR_PIN17_Pos) /*!< Bit mask of PIN17 field. */
+#define GPIO_DIR_PIN17_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN17_Output (1UL) /*!< Pin set as output */
+
+/* Bit 16 : Pin 16 */
+#define GPIO_DIR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */
+#define GPIO_DIR_PIN16_Msk (0x1UL << GPIO_DIR_PIN16_Pos) /*!< Bit mask of PIN16 field. */
+#define GPIO_DIR_PIN16_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN16_Output (1UL) /*!< Pin set as output */
+
+/* Bit 15 : Pin 15 */
+#define GPIO_DIR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */
+#define GPIO_DIR_PIN15_Msk (0x1UL << GPIO_DIR_PIN15_Pos) /*!< Bit mask of PIN15 field. */
+#define GPIO_DIR_PIN15_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN15_Output (1UL) /*!< Pin set as output */
+
+/* Bit 14 : Pin 14 */
+#define GPIO_DIR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */
+#define GPIO_DIR_PIN14_Msk (0x1UL << GPIO_DIR_PIN14_Pos) /*!< Bit mask of PIN14 field. */
+#define GPIO_DIR_PIN14_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN14_Output (1UL) /*!< Pin set as output */
+
+/* Bit 13 : Pin 13 */
+#define GPIO_DIR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */
+#define GPIO_DIR_PIN13_Msk (0x1UL << GPIO_DIR_PIN13_Pos) /*!< Bit mask of PIN13 field. */
+#define GPIO_DIR_PIN13_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN13_Output (1UL) /*!< Pin set as output */
+
+/* Bit 12 : Pin 12 */
+#define GPIO_DIR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */
+#define GPIO_DIR_PIN12_Msk (0x1UL << GPIO_DIR_PIN12_Pos) /*!< Bit mask of PIN12 field. */
+#define GPIO_DIR_PIN12_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN12_Output (1UL) /*!< Pin set as output */
+
+/* Bit 11 : Pin 11 */
+#define GPIO_DIR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */
+#define GPIO_DIR_PIN11_Msk (0x1UL << GPIO_DIR_PIN11_Pos) /*!< Bit mask of PIN11 field. */
+#define GPIO_DIR_PIN11_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN11_Output (1UL) /*!< Pin set as output */
+
+/* Bit 10 : Pin 10 */
+#define GPIO_DIR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */
+#define GPIO_DIR_PIN10_Msk (0x1UL << GPIO_DIR_PIN10_Pos) /*!< Bit mask of PIN10 field. */
+#define GPIO_DIR_PIN10_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN10_Output (1UL) /*!< Pin set as output */
+
+/* Bit 9 : Pin 9 */
+#define GPIO_DIR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */
+#define GPIO_DIR_PIN9_Msk (0x1UL << GPIO_DIR_PIN9_Pos) /*!< Bit mask of PIN9 field. */
+#define GPIO_DIR_PIN9_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN9_Output (1UL) /*!< Pin set as output */
+
+/* Bit 8 : Pin 8 */
+#define GPIO_DIR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */
+#define GPIO_DIR_PIN8_Msk (0x1UL << GPIO_DIR_PIN8_Pos) /*!< Bit mask of PIN8 field. */
+#define GPIO_DIR_PIN8_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN8_Output (1UL) /*!< Pin set as output */
+
+/* Bit 7 : Pin 7 */
+#define GPIO_DIR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */
+#define GPIO_DIR_PIN7_Msk (0x1UL << GPIO_DIR_PIN7_Pos) /*!< Bit mask of PIN7 field. */
+#define GPIO_DIR_PIN7_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN7_Output (1UL) /*!< Pin set as output */
+
+/* Bit 6 : Pin 6 */
+#define GPIO_DIR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */
+#define GPIO_DIR_PIN6_Msk (0x1UL << GPIO_DIR_PIN6_Pos) /*!< Bit mask of PIN6 field. */
+#define GPIO_DIR_PIN6_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN6_Output (1UL) /*!< Pin set as output */
+
+/* Bit 5 : Pin 5 */
+#define GPIO_DIR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */
+#define GPIO_DIR_PIN5_Msk (0x1UL << GPIO_DIR_PIN5_Pos) /*!< Bit mask of PIN5 field. */
+#define GPIO_DIR_PIN5_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN5_Output (1UL) /*!< Pin set as output */
+
+/* Bit 4 : Pin 4 */
+#define GPIO_DIR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */
+#define GPIO_DIR_PIN4_Msk (0x1UL << GPIO_DIR_PIN4_Pos) /*!< Bit mask of PIN4 field. */
+#define GPIO_DIR_PIN4_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN4_Output (1UL) /*!< Pin set as output */
+
+/* Bit 3 : Pin 3 */
+#define GPIO_DIR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */
+#define GPIO_DIR_PIN3_Msk (0x1UL << GPIO_DIR_PIN3_Pos) /*!< Bit mask of PIN3 field. */
+#define GPIO_DIR_PIN3_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN3_Output (1UL) /*!< Pin set as output */
+
+/* Bit 2 : Pin 2 */
+#define GPIO_DIR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */
+#define GPIO_DIR_PIN2_Msk (0x1UL << GPIO_DIR_PIN2_Pos) /*!< Bit mask of PIN2 field. */
+#define GPIO_DIR_PIN2_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN2_Output (1UL) /*!< Pin set as output */
+
+/* Bit 1 : Pin 1 */
+#define GPIO_DIR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */
+#define GPIO_DIR_PIN1_Msk (0x1UL << GPIO_DIR_PIN1_Pos) /*!< Bit mask of PIN1 field. */
+#define GPIO_DIR_PIN1_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN1_Output (1UL) /*!< Pin set as output */
+
+/* Bit 0 : Pin 0 */
+#define GPIO_DIR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */
+#define GPIO_DIR_PIN0_Msk (0x1UL << GPIO_DIR_PIN0_Pos) /*!< Bit mask of PIN0 field. */
+#define GPIO_DIR_PIN0_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN0_Output (1UL) /*!< Pin set as output */
+
+/* Register: GPIO_DIRSET */
+/* Description: DIR set register */
+
+/* Bit 31 : Set as output pin 31 */
+#define GPIO_DIRSET_PIN31_Pos (31UL) /*!< Position of PIN31 field. */
+#define GPIO_DIRSET_PIN31_Msk (0x1UL << GPIO_DIRSET_PIN31_Pos) /*!< Bit mask of PIN31 field. */
+#define GPIO_DIRSET_PIN31_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN31_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN31_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 30 : Set as output pin 30 */
+#define GPIO_DIRSET_PIN30_Pos (30UL) /*!< Position of PIN30 field. */
+#define GPIO_DIRSET_PIN30_Msk (0x1UL << GPIO_DIRSET_PIN30_Pos) /*!< Bit mask of PIN30 field. */
+#define GPIO_DIRSET_PIN30_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN30_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN30_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 29 : Set as output pin 29 */
+#define GPIO_DIRSET_PIN29_Pos (29UL) /*!< Position of PIN29 field. */
+#define GPIO_DIRSET_PIN29_Msk (0x1UL << GPIO_DIRSET_PIN29_Pos) /*!< Bit mask of PIN29 field. */
+#define GPIO_DIRSET_PIN29_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN29_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN29_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 28 : Set as output pin 28 */
+#define GPIO_DIRSET_PIN28_Pos (28UL) /*!< Position of PIN28 field. */
+#define GPIO_DIRSET_PIN28_Msk (0x1UL << GPIO_DIRSET_PIN28_Pos) /*!< Bit mask of PIN28 field. */
+#define GPIO_DIRSET_PIN28_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN28_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN28_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 27 : Set as output pin 27 */
+#define GPIO_DIRSET_PIN27_Pos (27UL) /*!< Position of PIN27 field. */
+#define GPIO_DIRSET_PIN27_Msk (0x1UL << GPIO_DIRSET_PIN27_Pos) /*!< Bit mask of PIN27 field. */
+#define GPIO_DIRSET_PIN27_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN27_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN27_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 26 : Set as output pin 26 */
+#define GPIO_DIRSET_PIN26_Pos (26UL) /*!< Position of PIN26 field. */
+#define GPIO_DIRSET_PIN26_Msk (0x1UL << GPIO_DIRSET_PIN26_Pos) /*!< Bit mask of PIN26 field. */
+#define GPIO_DIRSET_PIN26_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN26_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN26_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 25 : Set as output pin 25 */
+#define GPIO_DIRSET_PIN25_Pos (25UL) /*!< Position of PIN25 field. */
+#define GPIO_DIRSET_PIN25_Msk (0x1UL << GPIO_DIRSET_PIN25_Pos) /*!< Bit mask of PIN25 field. */
+#define GPIO_DIRSET_PIN25_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN25_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN25_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 24 : Set as output pin 24 */
+#define GPIO_DIRSET_PIN24_Pos (24UL) /*!< Position of PIN24 field. */
+#define GPIO_DIRSET_PIN24_Msk (0x1UL << GPIO_DIRSET_PIN24_Pos) /*!< Bit mask of PIN24 field. */
+#define GPIO_DIRSET_PIN24_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN24_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN24_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 23 : Set as output pin 23 */
+#define GPIO_DIRSET_PIN23_Pos (23UL) /*!< Position of PIN23 field. */
+#define GPIO_DIRSET_PIN23_Msk (0x1UL << GPIO_DIRSET_PIN23_Pos) /*!< Bit mask of PIN23 field. */
+#define GPIO_DIRSET_PIN23_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN23_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN23_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 22 : Set as output pin 22 */
+#define GPIO_DIRSET_PIN22_Pos (22UL) /*!< Position of PIN22 field. */
+#define GPIO_DIRSET_PIN22_Msk (0x1UL << GPIO_DIRSET_PIN22_Pos) /*!< Bit mask of PIN22 field. */
+#define GPIO_DIRSET_PIN22_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN22_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN22_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 21 : Set as output pin 21 */
+#define GPIO_DIRSET_PIN21_Pos (21UL) /*!< Position of PIN21 field. */
+#define GPIO_DIRSET_PIN21_Msk (0x1UL << GPIO_DIRSET_PIN21_Pos) /*!< Bit mask of PIN21 field. */
+#define GPIO_DIRSET_PIN21_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN21_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN21_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 20 : Set as output pin 20 */
+#define GPIO_DIRSET_PIN20_Pos (20UL) /*!< Position of PIN20 field. */
+#define GPIO_DIRSET_PIN20_Msk (0x1UL << GPIO_DIRSET_PIN20_Pos) /*!< Bit mask of PIN20 field. */
+#define GPIO_DIRSET_PIN20_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN20_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN20_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 19 : Set as output pin 19 */
+#define GPIO_DIRSET_PIN19_Pos (19UL) /*!< Position of PIN19 field. */
+#define GPIO_DIRSET_PIN19_Msk (0x1UL << GPIO_DIRSET_PIN19_Pos) /*!< Bit mask of PIN19 field. */
+#define GPIO_DIRSET_PIN19_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN19_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN19_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 18 : Set as output pin 18 */
+#define GPIO_DIRSET_PIN18_Pos (18UL) /*!< Position of PIN18 field. */
+#define GPIO_DIRSET_PIN18_Msk (0x1UL << GPIO_DIRSET_PIN18_Pos) /*!< Bit mask of PIN18 field. */
+#define GPIO_DIRSET_PIN18_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN18_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN18_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 17 : Set as output pin 17 */
+#define GPIO_DIRSET_PIN17_Pos (17UL) /*!< Position of PIN17 field. */
+#define GPIO_DIRSET_PIN17_Msk (0x1UL << GPIO_DIRSET_PIN17_Pos) /*!< Bit mask of PIN17 field. */
+#define GPIO_DIRSET_PIN17_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN17_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN17_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 16 : Set as output pin 16 */
+#define GPIO_DIRSET_PIN16_Pos (16UL) /*!< Position of PIN16 field. */
+#define GPIO_DIRSET_PIN16_Msk (0x1UL << GPIO_DIRSET_PIN16_Pos) /*!< Bit mask of PIN16 field. */
+#define GPIO_DIRSET_PIN16_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN16_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN16_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 15 : Set as output pin 15 */
+#define GPIO_DIRSET_PIN15_Pos (15UL) /*!< Position of PIN15 field. */
+#define GPIO_DIRSET_PIN15_Msk (0x1UL << GPIO_DIRSET_PIN15_Pos) /*!< Bit mask of PIN15 field. */
+#define GPIO_DIRSET_PIN15_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN15_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN15_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 14 : Set as output pin 14 */
+#define GPIO_DIRSET_PIN14_Pos (14UL) /*!< Position of PIN14 field. */
+#define GPIO_DIRSET_PIN14_Msk (0x1UL << GPIO_DIRSET_PIN14_Pos) /*!< Bit mask of PIN14 field. */
+#define GPIO_DIRSET_PIN14_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN14_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN14_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 13 : Set as output pin 13 */
+#define GPIO_DIRSET_PIN13_Pos (13UL) /*!< Position of PIN13 field. */
+#define GPIO_DIRSET_PIN13_Msk (0x1UL << GPIO_DIRSET_PIN13_Pos) /*!< Bit mask of PIN13 field. */
+#define GPIO_DIRSET_PIN13_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN13_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN13_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 12 : Set as output pin 12 */
+#define GPIO_DIRSET_PIN12_Pos (12UL) /*!< Position of PIN12 field. */
+#define GPIO_DIRSET_PIN12_Msk (0x1UL << GPIO_DIRSET_PIN12_Pos) /*!< Bit mask of PIN12 field. */
+#define GPIO_DIRSET_PIN12_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN12_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN12_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 11 : Set as output pin 11 */
+#define GPIO_DIRSET_PIN11_Pos (11UL) /*!< Position of PIN11 field. */
+#define GPIO_DIRSET_PIN11_Msk (0x1UL << GPIO_DIRSET_PIN11_Pos) /*!< Bit mask of PIN11 field. */
+#define GPIO_DIRSET_PIN11_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN11_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN11_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 10 : Set as output pin 10 */
+#define GPIO_DIRSET_PIN10_Pos (10UL) /*!< Position of PIN10 field. */
+#define GPIO_DIRSET_PIN10_Msk (0x1UL << GPIO_DIRSET_PIN10_Pos) /*!< Bit mask of PIN10 field. */
+#define GPIO_DIRSET_PIN10_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN10_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN10_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 9 : Set as output pin 9 */
+#define GPIO_DIRSET_PIN9_Pos (9UL) /*!< Position of PIN9 field. */
+#define GPIO_DIRSET_PIN9_Msk (0x1UL << GPIO_DIRSET_PIN9_Pos) /*!< Bit mask of PIN9 field. */
+#define GPIO_DIRSET_PIN9_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN9_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN9_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 8 : Set as output pin 8 */
+#define GPIO_DIRSET_PIN8_Pos (8UL) /*!< Position of PIN8 field. */
+#define GPIO_DIRSET_PIN8_Msk (0x1UL << GPIO_DIRSET_PIN8_Pos) /*!< Bit mask of PIN8 field. */
+#define GPIO_DIRSET_PIN8_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN8_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN8_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 7 : Set as output pin 7 */
+#define GPIO_DIRSET_PIN7_Pos (7UL) /*!< Position of PIN7 field. */
+#define GPIO_DIRSET_PIN7_Msk (0x1UL << GPIO_DIRSET_PIN7_Pos) /*!< Bit mask of PIN7 field. */
+#define GPIO_DIRSET_PIN7_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN7_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN7_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 6 : Set as output pin 6 */
+#define GPIO_DIRSET_PIN6_Pos (6UL) /*!< Position of PIN6 field. */
+#define GPIO_DIRSET_PIN6_Msk (0x1UL << GPIO_DIRSET_PIN6_Pos) /*!< Bit mask of PIN6 field. */
+#define GPIO_DIRSET_PIN6_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN6_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN6_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 5 : Set as output pin 5 */
+#define GPIO_DIRSET_PIN5_Pos (5UL) /*!< Position of PIN5 field. */
+#define GPIO_DIRSET_PIN5_Msk (0x1UL << GPIO_DIRSET_PIN5_Pos) /*!< Bit mask of PIN5 field. */
+#define GPIO_DIRSET_PIN5_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN5_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN5_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 4 : Set as output pin 4 */
+#define GPIO_DIRSET_PIN4_Pos (4UL) /*!< Position of PIN4 field. */
+#define GPIO_DIRSET_PIN4_Msk (0x1UL << GPIO_DIRSET_PIN4_Pos) /*!< Bit mask of PIN4 field. */
+#define GPIO_DIRSET_PIN4_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN4_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN4_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 3 : Set as output pin 3 */
+#define GPIO_DIRSET_PIN3_Pos (3UL) /*!< Position of PIN3 field. */
+#define GPIO_DIRSET_PIN3_Msk (0x1UL << GPIO_DIRSET_PIN3_Pos) /*!< Bit mask of PIN3 field. */
+#define GPIO_DIRSET_PIN3_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN3_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN3_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 2 : Set as output pin 2 */
+#define GPIO_DIRSET_PIN2_Pos (2UL) /*!< Position of PIN2 field. */
+#define GPIO_DIRSET_PIN2_Msk (0x1UL << GPIO_DIRSET_PIN2_Pos) /*!< Bit mask of PIN2 field. */
+#define GPIO_DIRSET_PIN2_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN2_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN2_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 1 : Set as output pin 1 */
+#define GPIO_DIRSET_PIN1_Pos (1UL) /*!< Position of PIN1 field. */
+#define GPIO_DIRSET_PIN1_Msk (0x1UL << GPIO_DIRSET_PIN1_Pos) /*!< Bit mask of PIN1 field. */
+#define GPIO_DIRSET_PIN1_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN1_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN1_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 0 : Set as output pin 0 */
+#define GPIO_DIRSET_PIN0_Pos (0UL) /*!< Position of PIN0 field. */
+#define GPIO_DIRSET_PIN0_Msk (0x1UL << GPIO_DIRSET_PIN0_Pos) /*!< Bit mask of PIN0 field. */
+#define GPIO_DIRSET_PIN0_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN0_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN0_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Register: GPIO_DIRCLR */
+/* Description: DIR clear register */
+
+/* Bit 31 : Set as input pin 31 */
+#define GPIO_DIRCLR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */
+#define GPIO_DIRCLR_PIN31_Msk (0x1UL << GPIO_DIRCLR_PIN31_Pos) /*!< Bit mask of PIN31 field. */
+#define GPIO_DIRCLR_PIN31_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN31_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN31_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 30 : Set as input pin 30 */
+#define GPIO_DIRCLR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */
+#define GPIO_DIRCLR_PIN30_Msk (0x1UL << GPIO_DIRCLR_PIN30_Pos) /*!< Bit mask of PIN30 field. */
+#define GPIO_DIRCLR_PIN30_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN30_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN30_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 29 : Set as input pin 29 */
+#define GPIO_DIRCLR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */
+#define GPIO_DIRCLR_PIN29_Msk (0x1UL << GPIO_DIRCLR_PIN29_Pos) /*!< Bit mask of PIN29 field. */
+#define GPIO_DIRCLR_PIN29_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN29_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN29_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 28 : Set as input pin 28 */
+#define GPIO_DIRCLR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */
+#define GPIO_DIRCLR_PIN28_Msk (0x1UL << GPIO_DIRCLR_PIN28_Pos) /*!< Bit mask of PIN28 field. */
+#define GPIO_DIRCLR_PIN28_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN28_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN28_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 27 : Set as input pin 27 */
+#define GPIO_DIRCLR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */
+#define GPIO_DIRCLR_PIN27_Msk (0x1UL << GPIO_DIRCLR_PIN27_Pos) /*!< Bit mask of PIN27 field. */
+#define GPIO_DIRCLR_PIN27_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN27_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN27_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 26 : Set as input pin 26 */
+#define GPIO_DIRCLR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */
+#define GPIO_DIRCLR_PIN26_Msk (0x1UL << GPIO_DIRCLR_PIN26_Pos) /*!< Bit mask of PIN26 field. */
+#define GPIO_DIRCLR_PIN26_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN26_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN26_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 25 : Set as input pin 25 */
+#define GPIO_DIRCLR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */
+#define GPIO_DIRCLR_PIN25_Msk (0x1UL << GPIO_DIRCLR_PIN25_Pos) /*!< Bit mask of PIN25 field. */
+#define GPIO_DIRCLR_PIN25_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN25_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN25_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 24 : Set as input pin 24 */
+#define GPIO_DIRCLR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */
+#define GPIO_DIRCLR_PIN24_Msk (0x1UL << GPIO_DIRCLR_PIN24_Pos) /*!< Bit mask of PIN24 field. */
+#define GPIO_DIRCLR_PIN24_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN24_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN24_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 23 : Set as input pin 23 */
+#define GPIO_DIRCLR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */
+#define GPIO_DIRCLR_PIN23_Msk (0x1UL << GPIO_DIRCLR_PIN23_Pos) /*!< Bit mask of PIN23 field. */
+#define GPIO_DIRCLR_PIN23_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN23_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN23_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 22 : Set as input pin 22 */
+#define GPIO_DIRCLR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */
+#define GPIO_DIRCLR_PIN22_Msk (0x1UL << GPIO_DIRCLR_PIN22_Pos) /*!< Bit mask of PIN22 field. */
+#define GPIO_DIRCLR_PIN22_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN22_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN22_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 21 : Set as input pin 21 */
+#define GPIO_DIRCLR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */
+#define GPIO_DIRCLR_PIN21_Msk (0x1UL << GPIO_DIRCLR_PIN21_Pos) /*!< Bit mask of PIN21 field. */
+#define GPIO_DIRCLR_PIN21_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN21_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN21_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 20 : Set as input pin 20 */
+#define GPIO_DIRCLR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */
+#define GPIO_DIRCLR_PIN20_Msk (0x1UL << GPIO_DIRCLR_PIN20_Pos) /*!< Bit mask of PIN20 field. */
+#define GPIO_DIRCLR_PIN20_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN20_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN20_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 19 : Set as input pin 19 */
+#define GPIO_DIRCLR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */
+#define GPIO_DIRCLR_PIN19_Msk (0x1UL << GPIO_DIRCLR_PIN19_Pos) /*!< Bit mask of PIN19 field. */
+#define GPIO_DIRCLR_PIN19_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN19_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN19_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 18 : Set as input pin 18 */
+#define GPIO_DIRCLR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */
+#define GPIO_DIRCLR_PIN18_Msk (0x1UL << GPIO_DIRCLR_PIN18_Pos) /*!< Bit mask of PIN18 field. */
+#define GPIO_DIRCLR_PIN18_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN18_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN18_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 17 : Set as input pin 17 */
+#define GPIO_DIRCLR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */
+#define GPIO_DIRCLR_PIN17_Msk (0x1UL << GPIO_DIRCLR_PIN17_Pos) /*!< Bit mask of PIN17 field. */
+#define GPIO_DIRCLR_PIN17_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN17_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN17_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 16 : Set as input pin 16 */
+#define GPIO_DIRCLR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */
+#define GPIO_DIRCLR_PIN16_Msk (0x1UL << GPIO_DIRCLR_PIN16_Pos) /*!< Bit mask of PIN16 field. */
+#define GPIO_DIRCLR_PIN16_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN16_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN16_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 15 : Set as input pin 15 */
+#define GPIO_DIRCLR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */
+#define GPIO_DIRCLR_PIN15_Msk (0x1UL << GPIO_DIRCLR_PIN15_Pos) /*!< Bit mask of PIN15 field. */
+#define GPIO_DIRCLR_PIN15_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN15_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN15_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 14 : Set as input pin 14 */
+#define GPIO_DIRCLR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */
+#define GPIO_DIRCLR_PIN14_Msk (0x1UL << GPIO_DIRCLR_PIN14_Pos) /*!< Bit mask of PIN14 field. */
+#define GPIO_DIRCLR_PIN14_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN14_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN14_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 13 : Set as input pin 13 */
+#define GPIO_DIRCLR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */
+#define GPIO_DIRCLR_PIN13_Msk (0x1UL << GPIO_DIRCLR_PIN13_Pos) /*!< Bit mask of PIN13 field. */
+#define GPIO_DIRCLR_PIN13_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN13_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN13_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 12 : Set as input pin 12 */
+#define GPIO_DIRCLR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */
+#define GPIO_DIRCLR_PIN12_Msk (0x1UL << GPIO_DIRCLR_PIN12_Pos) /*!< Bit mask of PIN12 field. */
+#define GPIO_DIRCLR_PIN12_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN12_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN12_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 11 : Set as input pin 11 */
+#define GPIO_DIRCLR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */
+#define GPIO_DIRCLR_PIN11_Msk (0x1UL << GPIO_DIRCLR_PIN11_Pos) /*!< Bit mask of PIN11 field. */
+#define GPIO_DIRCLR_PIN11_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN11_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN11_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 10 : Set as input pin 10 */
+#define GPIO_DIRCLR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */
+#define GPIO_DIRCLR_PIN10_Msk (0x1UL << GPIO_DIRCLR_PIN10_Pos) /*!< Bit mask of PIN10 field. */
+#define GPIO_DIRCLR_PIN10_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN10_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN10_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 9 : Set as input pin 9 */
+#define GPIO_DIRCLR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */
+#define GPIO_DIRCLR_PIN9_Msk (0x1UL << GPIO_DIRCLR_PIN9_Pos) /*!< Bit mask of PIN9 field. */
+#define GPIO_DIRCLR_PIN9_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN9_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN9_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 8 : Set as input pin 8 */
+#define GPIO_DIRCLR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */
+#define GPIO_DIRCLR_PIN8_Msk (0x1UL << GPIO_DIRCLR_PIN8_Pos) /*!< Bit mask of PIN8 field. */
+#define GPIO_DIRCLR_PIN8_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN8_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN8_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 7 : Set as input pin 7 */
+#define GPIO_DIRCLR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */
+#define GPIO_DIRCLR_PIN7_Msk (0x1UL << GPIO_DIRCLR_PIN7_Pos) /*!< Bit mask of PIN7 field. */
+#define GPIO_DIRCLR_PIN7_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN7_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN7_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 6 : Set as input pin 6 */
+#define GPIO_DIRCLR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */
+#define GPIO_DIRCLR_PIN6_Msk (0x1UL << GPIO_DIRCLR_PIN6_Pos) /*!< Bit mask of PIN6 field. */
+#define GPIO_DIRCLR_PIN6_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN6_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN6_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 5 : Set as input pin 5 */
+#define GPIO_DIRCLR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */
+#define GPIO_DIRCLR_PIN5_Msk (0x1UL << GPIO_DIRCLR_PIN5_Pos) /*!< Bit mask of PIN5 field. */
+#define GPIO_DIRCLR_PIN5_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN5_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN5_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 4 : Set as input pin 4 */
+#define GPIO_DIRCLR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */
+#define GPIO_DIRCLR_PIN4_Msk (0x1UL << GPIO_DIRCLR_PIN4_Pos) /*!< Bit mask of PIN4 field. */
+#define GPIO_DIRCLR_PIN4_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN4_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN4_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 3 : Set as input pin 3 */
+#define GPIO_DIRCLR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */
+#define GPIO_DIRCLR_PIN3_Msk (0x1UL << GPIO_DIRCLR_PIN3_Pos) /*!< Bit mask of PIN3 field. */
+#define GPIO_DIRCLR_PIN3_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN3_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN3_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 2 : Set as input pin 2 */
+#define GPIO_DIRCLR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */
+#define GPIO_DIRCLR_PIN2_Msk (0x1UL << GPIO_DIRCLR_PIN2_Pos) /*!< Bit mask of PIN2 field. */
+#define GPIO_DIRCLR_PIN2_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN2_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN2_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 1 : Set as input pin 1 */
+#define GPIO_DIRCLR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */
+#define GPIO_DIRCLR_PIN1_Msk (0x1UL << GPIO_DIRCLR_PIN1_Pos) /*!< Bit mask of PIN1 field. */
+#define GPIO_DIRCLR_PIN1_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN1_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN1_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 0 : Set as input pin 0 */
+#define GPIO_DIRCLR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */
+#define GPIO_DIRCLR_PIN0_Msk (0x1UL << GPIO_DIRCLR_PIN0_Pos) /*!< Bit mask of PIN0 field. */
+#define GPIO_DIRCLR_PIN0_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN0_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN0_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Register: GPIO_LATCH */
+/* Description: Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers */
+
+/* Bit 31 : Status on whether PIN31 has met criteria set in PIN_CNF31.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN31_Pos (31UL) /*!< Position of PIN31 field. */
+#define GPIO_LATCH_PIN31_Msk (0x1UL << GPIO_LATCH_PIN31_Pos) /*!< Bit mask of PIN31 field. */
+#define GPIO_LATCH_PIN31_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN31_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 30 : Status on whether PIN30 has met criteria set in PIN_CNF30.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN30_Pos (30UL) /*!< Position of PIN30 field. */
+#define GPIO_LATCH_PIN30_Msk (0x1UL << GPIO_LATCH_PIN30_Pos) /*!< Bit mask of PIN30 field. */
+#define GPIO_LATCH_PIN30_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN30_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 29 : Status on whether PIN29 has met criteria set in PIN_CNF29.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN29_Pos (29UL) /*!< Position of PIN29 field. */
+#define GPIO_LATCH_PIN29_Msk (0x1UL << GPIO_LATCH_PIN29_Pos) /*!< Bit mask of PIN29 field. */
+#define GPIO_LATCH_PIN29_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN29_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 28 : Status on whether PIN28 has met criteria set in PIN_CNF28.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN28_Pos (28UL) /*!< Position of PIN28 field. */
+#define GPIO_LATCH_PIN28_Msk (0x1UL << GPIO_LATCH_PIN28_Pos) /*!< Bit mask of PIN28 field. */
+#define GPIO_LATCH_PIN28_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN28_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 27 : Status on whether PIN27 has met criteria set in PIN_CNF27.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN27_Pos (27UL) /*!< Position of PIN27 field. */
+#define GPIO_LATCH_PIN27_Msk (0x1UL << GPIO_LATCH_PIN27_Pos) /*!< Bit mask of PIN27 field. */
+#define GPIO_LATCH_PIN27_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN27_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 26 : Status on whether PIN26 has met criteria set in PIN_CNF26.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN26_Pos (26UL) /*!< Position of PIN26 field. */
+#define GPIO_LATCH_PIN26_Msk (0x1UL << GPIO_LATCH_PIN26_Pos) /*!< Bit mask of PIN26 field. */
+#define GPIO_LATCH_PIN26_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN26_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 25 : Status on whether PIN25 has met criteria set in PIN_CNF25.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN25_Pos (25UL) /*!< Position of PIN25 field. */
+#define GPIO_LATCH_PIN25_Msk (0x1UL << GPIO_LATCH_PIN25_Pos) /*!< Bit mask of PIN25 field. */
+#define GPIO_LATCH_PIN25_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN25_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 24 : Status on whether PIN24 has met criteria set in PIN_CNF24.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN24_Pos (24UL) /*!< Position of PIN24 field. */
+#define GPIO_LATCH_PIN24_Msk (0x1UL << GPIO_LATCH_PIN24_Pos) /*!< Bit mask of PIN24 field. */
+#define GPIO_LATCH_PIN24_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN24_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 23 : Status on whether PIN23 has met criteria set in PIN_CNF23.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN23_Pos (23UL) /*!< Position of PIN23 field. */
+#define GPIO_LATCH_PIN23_Msk (0x1UL << GPIO_LATCH_PIN23_Pos) /*!< Bit mask of PIN23 field. */
+#define GPIO_LATCH_PIN23_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN23_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 22 : Status on whether PIN22 has met criteria set in PIN_CNF22.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN22_Pos (22UL) /*!< Position of PIN22 field. */
+#define GPIO_LATCH_PIN22_Msk (0x1UL << GPIO_LATCH_PIN22_Pos) /*!< Bit mask of PIN22 field. */
+#define GPIO_LATCH_PIN22_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN22_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 21 : Status on whether PIN21 has met criteria set in PIN_CNF21.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN21_Pos (21UL) /*!< Position of PIN21 field. */
+#define GPIO_LATCH_PIN21_Msk (0x1UL << GPIO_LATCH_PIN21_Pos) /*!< Bit mask of PIN21 field. */
+#define GPIO_LATCH_PIN21_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN21_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 20 : Status on whether PIN20 has met criteria set in PIN_CNF20.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN20_Pos (20UL) /*!< Position of PIN20 field. */
+#define GPIO_LATCH_PIN20_Msk (0x1UL << GPIO_LATCH_PIN20_Pos) /*!< Bit mask of PIN20 field. */
+#define GPIO_LATCH_PIN20_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN20_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 19 : Status on whether PIN19 has met criteria set in PIN_CNF19.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN19_Pos (19UL) /*!< Position of PIN19 field. */
+#define GPIO_LATCH_PIN19_Msk (0x1UL << GPIO_LATCH_PIN19_Pos) /*!< Bit mask of PIN19 field. */
+#define GPIO_LATCH_PIN19_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN19_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 18 : Status on whether PIN18 has met criteria set in PIN_CNF18.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN18_Pos (18UL) /*!< Position of PIN18 field. */
+#define GPIO_LATCH_PIN18_Msk (0x1UL << GPIO_LATCH_PIN18_Pos) /*!< Bit mask of PIN18 field. */
+#define GPIO_LATCH_PIN18_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN18_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 17 : Status on whether PIN17 has met criteria set in PIN_CNF17.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN17_Pos (17UL) /*!< Position of PIN17 field. */
+#define GPIO_LATCH_PIN17_Msk (0x1UL << GPIO_LATCH_PIN17_Pos) /*!< Bit mask of PIN17 field. */
+#define GPIO_LATCH_PIN17_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN17_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 16 : Status on whether PIN16 has met criteria set in PIN_CNF16.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN16_Pos (16UL) /*!< Position of PIN16 field. */
+#define GPIO_LATCH_PIN16_Msk (0x1UL << GPIO_LATCH_PIN16_Pos) /*!< Bit mask of PIN16 field. */
+#define GPIO_LATCH_PIN16_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN16_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 15 : Status on whether PIN15 has met criteria set in PIN_CNF15.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN15_Pos (15UL) /*!< Position of PIN15 field. */
+#define GPIO_LATCH_PIN15_Msk (0x1UL << GPIO_LATCH_PIN15_Pos) /*!< Bit mask of PIN15 field. */
+#define GPIO_LATCH_PIN15_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN15_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 14 : Status on whether PIN14 has met criteria set in PIN_CNF14.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN14_Pos (14UL) /*!< Position of PIN14 field. */
+#define GPIO_LATCH_PIN14_Msk (0x1UL << GPIO_LATCH_PIN14_Pos) /*!< Bit mask of PIN14 field. */
+#define GPIO_LATCH_PIN14_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN14_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 13 : Status on whether PIN13 has met criteria set in PIN_CNF13.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN13_Pos (13UL) /*!< Position of PIN13 field. */
+#define GPIO_LATCH_PIN13_Msk (0x1UL << GPIO_LATCH_PIN13_Pos) /*!< Bit mask of PIN13 field. */
+#define GPIO_LATCH_PIN13_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN13_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 12 : Status on whether PIN12 has met criteria set in PIN_CNF12.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN12_Pos (12UL) /*!< Position of PIN12 field. */
+#define GPIO_LATCH_PIN12_Msk (0x1UL << GPIO_LATCH_PIN12_Pos) /*!< Bit mask of PIN12 field. */
+#define GPIO_LATCH_PIN12_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN12_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 11 : Status on whether PIN11 has met criteria set in PIN_CNF11.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN11_Pos (11UL) /*!< Position of PIN11 field. */
+#define GPIO_LATCH_PIN11_Msk (0x1UL << GPIO_LATCH_PIN11_Pos) /*!< Bit mask of PIN11 field. */
+#define GPIO_LATCH_PIN11_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN11_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 10 : Status on whether PIN10 has met criteria set in PIN_CNF10.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN10_Pos (10UL) /*!< Position of PIN10 field. */
+#define GPIO_LATCH_PIN10_Msk (0x1UL << GPIO_LATCH_PIN10_Pos) /*!< Bit mask of PIN10 field. */
+#define GPIO_LATCH_PIN10_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN10_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 9 : Status on whether PIN9 has met criteria set in PIN_CNF9.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN9_Pos (9UL) /*!< Position of PIN9 field. */
+#define GPIO_LATCH_PIN9_Msk (0x1UL << GPIO_LATCH_PIN9_Pos) /*!< Bit mask of PIN9 field. */
+#define GPIO_LATCH_PIN9_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN9_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 8 : Status on whether PIN8 has met criteria set in PIN_CNF8.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN8_Pos (8UL) /*!< Position of PIN8 field. */
+#define GPIO_LATCH_PIN8_Msk (0x1UL << GPIO_LATCH_PIN8_Pos) /*!< Bit mask of PIN8 field. */
+#define GPIO_LATCH_PIN8_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN8_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 7 : Status on whether PIN7 has met criteria set in PIN_CNF7.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN7_Pos (7UL) /*!< Position of PIN7 field. */
+#define GPIO_LATCH_PIN7_Msk (0x1UL << GPIO_LATCH_PIN7_Pos) /*!< Bit mask of PIN7 field. */
+#define GPIO_LATCH_PIN7_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN7_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 6 : Status on whether PIN6 has met criteria set in PIN_CNF6.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN6_Pos (6UL) /*!< Position of PIN6 field. */
+#define GPIO_LATCH_PIN6_Msk (0x1UL << GPIO_LATCH_PIN6_Pos) /*!< Bit mask of PIN6 field. */
+#define GPIO_LATCH_PIN6_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN6_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 5 : Status on whether PIN5 has met criteria set in PIN_CNF5.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN5_Pos (5UL) /*!< Position of PIN5 field. */
+#define GPIO_LATCH_PIN5_Msk (0x1UL << GPIO_LATCH_PIN5_Pos) /*!< Bit mask of PIN5 field. */
+#define GPIO_LATCH_PIN5_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN5_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 4 : Status on whether PIN4 has met criteria set in PIN_CNF4.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN4_Pos (4UL) /*!< Position of PIN4 field. */
+#define GPIO_LATCH_PIN4_Msk (0x1UL << GPIO_LATCH_PIN4_Pos) /*!< Bit mask of PIN4 field. */
+#define GPIO_LATCH_PIN4_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN4_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 3 : Status on whether PIN3 has met criteria set in PIN_CNF3.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN3_Pos (3UL) /*!< Position of PIN3 field. */
+#define GPIO_LATCH_PIN3_Msk (0x1UL << GPIO_LATCH_PIN3_Pos) /*!< Bit mask of PIN3 field. */
+#define GPIO_LATCH_PIN3_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN3_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 2 : Status on whether PIN2 has met criteria set in PIN_CNF2.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN2_Pos (2UL) /*!< Position of PIN2 field. */
+#define GPIO_LATCH_PIN2_Msk (0x1UL << GPIO_LATCH_PIN2_Pos) /*!< Bit mask of PIN2 field. */
+#define GPIO_LATCH_PIN2_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN2_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 1 : Status on whether PIN1 has met criteria set in PIN_CNF1.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN1_Pos (1UL) /*!< Position of PIN1 field. */
+#define GPIO_LATCH_PIN1_Msk (0x1UL << GPIO_LATCH_PIN1_Pos) /*!< Bit mask of PIN1 field. */
+#define GPIO_LATCH_PIN1_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN1_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 0 : Status on whether PIN0 has met criteria set in PIN_CNF0.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. */
+#define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. */
+#define GPIO_LATCH_PIN0_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN0_Latched (1UL) /*!< Criteria has been met */
+
+/* Register: GPIO_DETECTMODE */
+/* Description: Select between default DETECT signal behaviour and LDETECT mode */
+
+/* Bit 0 : Select between default DETECT signal behaviour and LDETECT mode */
+#define GPIO_DETECTMODE_DETECTMODE_Pos (0UL) /*!< Position of DETECTMODE field. */
+#define GPIO_DETECTMODE_DETECTMODE_Msk (0x1UL << GPIO_DETECTMODE_DETECTMODE_Pos) /*!< Bit mask of DETECTMODE field. */
+#define GPIO_DETECTMODE_DETECTMODE_Default (0UL) /*!< DETECT directly connected to PIN DETECT signals */
+#define GPIO_DETECTMODE_DETECTMODE_LDETECT (1UL) /*!< Use the latched LDETECT behaviour */
+
+/* Register: GPIO_PIN_CNF */
+/* Description: Description collection: Configuration of GPIO pins */
+
+/* Bits 17..16 : Pin sensing mechanism */
+#define GPIO_PIN_CNF_SENSE_Pos (16UL) /*!< Position of SENSE field. */
+#define GPIO_PIN_CNF_SENSE_Msk (0x3UL << GPIO_PIN_CNF_SENSE_Pos) /*!< Bit mask of SENSE field. */
+#define GPIO_PIN_CNF_SENSE_Disabled (0UL) /*!< Disabled */
+#define GPIO_PIN_CNF_SENSE_High (2UL) /*!< Sense for high level */
+#define GPIO_PIN_CNF_SENSE_Low (3UL) /*!< Sense for low level */
+
+/* Bits 10..8 : Drive configuration */
+#define GPIO_PIN_CNF_DRIVE_Pos (8UL) /*!< Position of DRIVE field. */
+#define GPIO_PIN_CNF_DRIVE_Msk (0x7UL << GPIO_PIN_CNF_DRIVE_Pos) /*!< Bit mask of DRIVE field. */
+#define GPIO_PIN_CNF_DRIVE_S0S1 (0UL) /*!< Standard '0', standard '1' */
+#define GPIO_PIN_CNF_DRIVE_H0S1 (1UL) /*!< High drive '0', standard '1' */
+#define GPIO_PIN_CNF_DRIVE_S0H1 (2UL) /*!< Standard '0', high drive '1' */
+#define GPIO_PIN_CNF_DRIVE_H0H1 (3UL) /*!< High drive '0', high 'drive '1'' */
+#define GPIO_PIN_CNF_DRIVE_D0S1 (4UL) /*!< Disconnect '0' standard '1' (normally used for wired-or connections) */
+#define GPIO_PIN_CNF_DRIVE_D0H1 (5UL) /*!< Disconnect '0', high drive '1' (normally used for wired-or connections) */
+#define GPIO_PIN_CNF_DRIVE_S0D1 (6UL) /*!< Standard '0'. disconnect '1' (normally used for wired-and connections) */
+#define GPIO_PIN_CNF_DRIVE_H0D1 (7UL) /*!< High drive '0', disconnect '1' (normally used for wired-and connections) */
+
+/* Bits 3..2 : Pull configuration */
+#define GPIO_PIN_CNF_PULL_Pos (2UL) /*!< Position of PULL field. */
+#define GPIO_PIN_CNF_PULL_Msk (0x3UL << GPIO_PIN_CNF_PULL_Pos) /*!< Bit mask of PULL field. */
+#define GPIO_PIN_CNF_PULL_Disabled (0UL) /*!< No pull */
+#define GPIO_PIN_CNF_PULL_Pulldown (1UL) /*!< Pull down on pin */
+#define GPIO_PIN_CNF_PULL_Pullup (3UL) /*!< Pull up on pin */
+
+/* Bit 1 : Connect or disconnect input buffer */
+#define GPIO_PIN_CNF_INPUT_Pos (1UL) /*!< Position of INPUT field. */
+#define GPIO_PIN_CNF_INPUT_Msk (0x1UL << GPIO_PIN_CNF_INPUT_Pos) /*!< Bit mask of INPUT field. */
+#define GPIO_PIN_CNF_INPUT_Connect (0UL) /*!< Connect input buffer */
+#define GPIO_PIN_CNF_INPUT_Disconnect (1UL) /*!< Disconnect input buffer */
+
+/* Bit 0 : Pin direction. Same physical register as DIR register */
+#define GPIO_PIN_CNF_DIR_Pos (0UL) /*!< Position of DIR field. */
+#define GPIO_PIN_CNF_DIR_Msk (0x1UL << GPIO_PIN_CNF_DIR_Pos) /*!< Bit mask of DIR field. */
+#define GPIO_PIN_CNF_DIR_Input (0UL) /*!< Configure pin as an input pin */
+#define GPIO_PIN_CNF_DIR_Output (1UL) /*!< Configure pin as an output pin */
+
+
+/* Peripheral: POWER */
+/* Description: Power control */
+
+/* Register: POWER_TASKS_CONSTLAT */
+/* Description: Enable Constant Latency mode */
+
+/* Bit 0 : Enable Constant Latency mode */
+#define POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Pos (0UL) /*!< Position of TASKS_CONSTLAT field. */
+#define POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Msk (0x1UL << POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Pos) /*!< Bit mask of TASKS_CONSTLAT field. */
+#define POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Trigger (1UL) /*!< Trigger task */
+
+/* Register: POWER_TASKS_LOWPWR */
+/* Description: Enable Low-power mode (variable latency) */
+
+/* Bit 0 : Enable Low-power mode (variable latency) */
+#define POWER_TASKS_LOWPWR_TASKS_LOWPWR_Pos (0UL) /*!< Position of TASKS_LOWPWR field. */
+#define POWER_TASKS_LOWPWR_TASKS_LOWPWR_Msk (0x1UL << POWER_TASKS_LOWPWR_TASKS_LOWPWR_Pos) /*!< Bit mask of TASKS_LOWPWR field. */
+#define POWER_TASKS_LOWPWR_TASKS_LOWPWR_Trigger (1UL) /*!< Trigger task */
+
+/* Register: POWER_EVENTS_POFWARN */
+/* Description: Power failure warning */
+
+/* Bit 0 : Power failure warning */
+#define POWER_EVENTS_POFWARN_EVENTS_POFWARN_Pos (0UL) /*!< Position of EVENTS_POFWARN field. */
+#define POWER_EVENTS_POFWARN_EVENTS_POFWARN_Msk (0x1UL << POWER_EVENTS_POFWARN_EVENTS_POFWARN_Pos) /*!< Bit mask of EVENTS_POFWARN field. */
+#define POWER_EVENTS_POFWARN_EVENTS_POFWARN_NotGenerated (0UL) /*!< Event not generated */
+#define POWER_EVENTS_POFWARN_EVENTS_POFWARN_Generated (1UL) /*!< Event generated */
+
+/* Register: POWER_EVENTS_SLEEPENTER */
+/* Description: CPU entered WFI/WFE sleep */
+
+/* Bit 0 : CPU entered WFI/WFE sleep */
+#define POWER_EVENTS_SLEEPENTER_EVENTS_SLEEPENTER_Pos (0UL) /*!< Position of EVENTS_SLEEPENTER field. */
+#define POWER_EVENTS_SLEEPENTER_EVENTS_SLEEPENTER_Msk (0x1UL << POWER_EVENTS_SLEEPENTER_EVENTS_SLEEPENTER_Pos) /*!< Bit mask of EVENTS_SLEEPENTER field. */
+#define POWER_EVENTS_SLEEPENTER_EVENTS_SLEEPENTER_NotGenerated (0UL) /*!< Event not generated */
+#define POWER_EVENTS_SLEEPENTER_EVENTS_SLEEPENTER_Generated (1UL) /*!< Event generated */
+
+/* Register: POWER_EVENTS_SLEEPEXIT */
+/* Description: CPU exited WFI/WFE sleep */
+
+/* Bit 0 : CPU exited WFI/WFE sleep */
+#define POWER_EVENTS_SLEEPEXIT_EVENTS_SLEEPEXIT_Pos (0UL) /*!< Position of EVENTS_SLEEPEXIT field. */
+#define POWER_EVENTS_SLEEPEXIT_EVENTS_SLEEPEXIT_Msk (0x1UL << POWER_EVENTS_SLEEPEXIT_EVENTS_SLEEPEXIT_Pos) /*!< Bit mask of EVENTS_SLEEPEXIT field. */
+#define POWER_EVENTS_SLEEPEXIT_EVENTS_SLEEPEXIT_NotGenerated (0UL) /*!< Event not generated */
+#define POWER_EVENTS_SLEEPEXIT_EVENTS_SLEEPEXIT_Generated (1UL) /*!< Event generated */
+
+/* Register: POWER_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 6 : Write '1' to enable interrupt for event SLEEPEXIT */
+#define POWER_INTENSET_SLEEPEXIT_Pos (6UL) /*!< Position of SLEEPEXIT field. */
+#define POWER_INTENSET_SLEEPEXIT_Msk (0x1UL << POWER_INTENSET_SLEEPEXIT_Pos) /*!< Bit mask of SLEEPEXIT field. */
+#define POWER_INTENSET_SLEEPEXIT_Disabled (0UL) /*!< Read: Disabled */
+#define POWER_INTENSET_SLEEPEXIT_Enabled (1UL) /*!< Read: Enabled */
+#define POWER_INTENSET_SLEEPEXIT_Set (1UL) /*!< Enable */
+
+/* Bit 5 : Write '1' to enable interrupt for event SLEEPENTER */
+#define POWER_INTENSET_SLEEPENTER_Pos (5UL) /*!< Position of SLEEPENTER field. */
+#define POWER_INTENSET_SLEEPENTER_Msk (0x1UL << POWER_INTENSET_SLEEPENTER_Pos) /*!< Bit mask of SLEEPENTER field. */
+#define POWER_INTENSET_SLEEPENTER_Disabled (0UL) /*!< Read: Disabled */
+#define POWER_INTENSET_SLEEPENTER_Enabled (1UL) /*!< Read: Enabled */
+#define POWER_INTENSET_SLEEPENTER_Set (1UL) /*!< Enable */
+
+/* Bit 2 : Write '1' to enable interrupt for event POFWARN */
+#define POWER_INTENSET_POFWARN_Pos (2UL) /*!< Position of POFWARN field. */
+#define POWER_INTENSET_POFWARN_Msk (0x1UL << POWER_INTENSET_POFWARN_Pos) /*!< Bit mask of POFWARN field. */
+#define POWER_INTENSET_POFWARN_Disabled (0UL) /*!< Read: Disabled */
+#define POWER_INTENSET_POFWARN_Enabled (1UL) /*!< Read: Enabled */
+#define POWER_INTENSET_POFWARN_Set (1UL) /*!< Enable */
+
+/* Register: POWER_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 6 : Write '1' to disable interrupt for event SLEEPEXIT */
+#define POWER_INTENCLR_SLEEPEXIT_Pos (6UL) /*!< Position of SLEEPEXIT field. */
+#define POWER_INTENCLR_SLEEPEXIT_Msk (0x1UL << POWER_INTENCLR_SLEEPEXIT_Pos) /*!< Bit mask of SLEEPEXIT field. */
+#define POWER_INTENCLR_SLEEPEXIT_Disabled (0UL) /*!< Read: Disabled */
+#define POWER_INTENCLR_SLEEPEXIT_Enabled (1UL) /*!< Read: Enabled */
+#define POWER_INTENCLR_SLEEPEXIT_Clear (1UL) /*!< Disable */
+
+/* Bit 5 : Write '1' to disable interrupt for event SLEEPENTER */
+#define POWER_INTENCLR_SLEEPENTER_Pos (5UL) /*!< Position of SLEEPENTER field. */
+#define POWER_INTENCLR_SLEEPENTER_Msk (0x1UL << POWER_INTENCLR_SLEEPENTER_Pos) /*!< Bit mask of SLEEPENTER field. */
+#define POWER_INTENCLR_SLEEPENTER_Disabled (0UL) /*!< Read: Disabled */
+#define POWER_INTENCLR_SLEEPENTER_Enabled (1UL) /*!< Read: Enabled */
+#define POWER_INTENCLR_SLEEPENTER_Clear (1UL) /*!< Disable */
+
+/* Bit 2 : Write '1' to disable interrupt for event POFWARN */
+#define POWER_INTENCLR_POFWARN_Pos (2UL) /*!< Position of POFWARN field. */
+#define POWER_INTENCLR_POFWARN_Msk (0x1UL << POWER_INTENCLR_POFWARN_Pos) /*!< Bit mask of POFWARN field. */
+#define POWER_INTENCLR_POFWARN_Disabled (0UL) /*!< Read: Disabled */
+#define POWER_INTENCLR_POFWARN_Enabled (1UL) /*!< Read: Enabled */
+#define POWER_INTENCLR_POFWARN_Clear (1UL) /*!< Disable */
+
+/* Register: POWER_RESETREAS */
+/* Description: Reset reason */
+
+/* Bit 18 : Reset due to wake up from System OFF mode when wakeup is triggered from entering into debug interface mode */
+#define POWER_RESETREAS_DIF_Pos (18UL) /*!< Position of DIF field. */
+#define POWER_RESETREAS_DIF_Msk (0x1UL << POWER_RESETREAS_DIF_Pos) /*!< Bit mask of DIF field. */
+#define POWER_RESETREAS_DIF_NotDetected (0UL) /*!< Not detected */
+#define POWER_RESETREAS_DIF_Detected (1UL) /*!< Detected */
+
+/* Bit 16 : Reset due to wake up from System OFF mode when wakeup is triggered from DETECT signal from GPIO */
+#define POWER_RESETREAS_OFF_Pos (16UL) /*!< Position of OFF field. */
+#define POWER_RESETREAS_OFF_Msk (0x1UL << POWER_RESETREAS_OFF_Pos) /*!< Bit mask of OFF field. */
+#define POWER_RESETREAS_OFF_NotDetected (0UL) /*!< Not detected */
+#define POWER_RESETREAS_OFF_Detected (1UL) /*!< Detected */
+
+/* Bit 3 : Reset from CPU lock-up detected */
+#define POWER_RESETREAS_LOCKUP_Pos (3UL) /*!< Position of LOCKUP field. */
+#define POWER_RESETREAS_LOCKUP_Msk (0x1UL << POWER_RESETREAS_LOCKUP_Pos) /*!< Bit mask of LOCKUP field. */
+#define POWER_RESETREAS_LOCKUP_NotDetected (0UL) /*!< Not detected */
+#define POWER_RESETREAS_LOCKUP_Detected (1UL) /*!< Detected */
+
+/* Bit 2 : Reset from soft reset detected */
+#define POWER_RESETREAS_SREQ_Pos (2UL) /*!< Position of SREQ field. */
+#define POWER_RESETREAS_SREQ_Msk (0x1UL << POWER_RESETREAS_SREQ_Pos) /*!< Bit mask of SREQ field. */
+#define POWER_RESETREAS_SREQ_NotDetected (0UL) /*!< Not detected */
+#define POWER_RESETREAS_SREQ_Detected (1UL) /*!< Detected */
+
+/* Bit 1 : Reset from watchdog detected */
+#define POWER_RESETREAS_DOG_Pos (1UL) /*!< Position of DOG field. */
+#define POWER_RESETREAS_DOG_Msk (0x1UL << POWER_RESETREAS_DOG_Pos) /*!< Bit mask of DOG field. */
+#define POWER_RESETREAS_DOG_NotDetected (0UL) /*!< Not detected */
+#define POWER_RESETREAS_DOG_Detected (1UL) /*!< Detected */
+
+/* Bit 0 : Reset from pin-reset detected */
+#define POWER_RESETREAS_RESETPIN_Pos (0UL) /*!< Position of RESETPIN field. */
+#define POWER_RESETREAS_RESETPIN_Msk (0x1UL << POWER_RESETREAS_RESETPIN_Pos) /*!< Bit mask of RESETPIN field. */
+#define POWER_RESETREAS_RESETPIN_NotDetected (0UL) /*!< Not detected */
+#define POWER_RESETREAS_RESETPIN_Detected (1UL) /*!< Detected */
+
+/* Register: POWER_SYSTEMOFF */
+/* Description: System OFF register */
+
+/* Bit 0 : Enable System OFF mode */
+#define POWER_SYSTEMOFF_SYSTEMOFF_Pos (0UL) /*!< Position of SYSTEMOFF field. */
+#define POWER_SYSTEMOFF_SYSTEMOFF_Msk (0x1UL << POWER_SYSTEMOFF_SYSTEMOFF_Pos) /*!< Bit mask of SYSTEMOFF field. */
+#define POWER_SYSTEMOFF_SYSTEMOFF_Enter (1UL) /*!< Enable System OFF mode */
+
+/* Register: POWER_POFCON */
+/* Description: Power failure comparator configuration */
+
+/* Bits 4..1 : Power failure comparator threshold setting */
+#define POWER_POFCON_THRESHOLD_Pos (1UL) /*!< Position of THRESHOLD field. */
+#define POWER_POFCON_THRESHOLD_Msk (0xFUL << POWER_POFCON_THRESHOLD_Pos) /*!< Bit mask of THRESHOLD field. */
+#define POWER_POFCON_THRESHOLD_V17 (4UL) /*!< Set threshold to 1.7 V */
+#define POWER_POFCON_THRESHOLD_V18 (5UL) /*!< Set threshold to 1.8 V */
+#define POWER_POFCON_THRESHOLD_V19 (6UL) /*!< Set threshold to 1.9 V */
+#define POWER_POFCON_THRESHOLD_V20 (7UL) /*!< Set threshold to 2.0 V */
+#define POWER_POFCON_THRESHOLD_V21 (8UL) /*!< Set threshold to 2.1 V */
+#define POWER_POFCON_THRESHOLD_V22 (9UL) /*!< Set threshold to 2.2 V */
+#define POWER_POFCON_THRESHOLD_V23 (10UL) /*!< Set threshold to 2.3 V */
+#define POWER_POFCON_THRESHOLD_V24 (11UL) /*!< Set threshold to 2.4 V */
+#define POWER_POFCON_THRESHOLD_V25 (12UL) /*!< Set threshold to 2.5 V */
+#define POWER_POFCON_THRESHOLD_V26 (13UL) /*!< Set threshold to 2.6 V */
+#define POWER_POFCON_THRESHOLD_V27 (14UL) /*!< Set threshold to 2.7 V */
+#define POWER_POFCON_THRESHOLD_V28 (15UL) /*!< Set threshold to 2.8 V */
+
+/* Bit 0 : Enable or disable power failure comparator */
+#define POWER_POFCON_POF_Pos (0UL) /*!< Position of POF field. */
+#define POWER_POFCON_POF_Msk (0x1UL << POWER_POFCON_POF_Pos) /*!< Bit mask of POF field. */
+#define POWER_POFCON_POF_Disabled (0UL) /*!< Disable */
+#define POWER_POFCON_POF_Enabled (1UL) /*!< Enable */
+
+/* Register: POWER_GPREGRET */
+/* Description: General purpose retention register */
+
+/* Bits 7..0 : General purpose retention register */
+#define POWER_GPREGRET_GPREGRET_Pos (0UL) /*!< Position of GPREGRET field. */
+#define POWER_GPREGRET_GPREGRET_Msk (0xFFUL << POWER_GPREGRET_GPREGRET_Pos) /*!< Bit mask of GPREGRET field. */
+
+/* Register: POWER_GPREGRET2 */
+/* Description: General purpose retention register */
+
+/* Bits 7..0 : General purpose retention register */
+#define POWER_GPREGRET2_GPREGRET_Pos (0UL) /*!< Position of GPREGRET field. */
+#define POWER_GPREGRET2_GPREGRET_Msk (0xFFUL << POWER_GPREGRET2_GPREGRET_Pos) /*!< Bit mask of GPREGRET field. */
+
+/* Register: POWER_DCDCEN */
+/* Description: DC/DC enable register */
+
+/* Bit 0 : Enable or disable DC/DC converter */
+#define POWER_DCDCEN_DCDCEN_Pos (0UL) /*!< Position of DCDCEN field. */
+#define POWER_DCDCEN_DCDCEN_Msk (0x1UL << POWER_DCDCEN_DCDCEN_Pos) /*!< Bit mask of DCDCEN field. */
+#define POWER_DCDCEN_DCDCEN_Disabled (0UL) /*!< Disable */
+#define POWER_DCDCEN_DCDCEN_Enabled (1UL) /*!< Enable */
+
+/* Register: POWER_RAM_POWER */
+/* Description: Description cluster: RAMn power control register. The RAM size will vary depending on product variant, and the RAMn register will only be present if the corresponding RAM AHB slave is present on the device. */
+
+/* Bit 17 : Keep retention on RAM section S1 when RAM section is in OFF */
+#define POWER_RAM_POWER_S1RETENTION_Pos (17UL) /*!< Position of S1RETENTION field. */
+#define POWER_RAM_POWER_S1RETENTION_Msk (0x1UL << POWER_RAM_POWER_S1RETENTION_Pos) /*!< Bit mask of S1RETENTION field. */
+#define POWER_RAM_POWER_S1RETENTION_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S1RETENTION_On (1UL) /*!< On */
+
+/* Bit 16 : Keep retention on RAM section S0 when RAM section is in OFF */
+#define POWER_RAM_POWER_S0RETENTION_Pos (16UL) /*!< Position of S0RETENTION field. */
+#define POWER_RAM_POWER_S0RETENTION_Msk (0x1UL << POWER_RAM_POWER_S0RETENTION_Pos) /*!< Bit mask of S0RETENTION field. */
+#define POWER_RAM_POWER_S0RETENTION_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S0RETENTION_On (1UL) /*!< On */
+
+/* Bit 1 : Keep RAM section S1 ON or OFF in System ON mode. */
+#define POWER_RAM_POWER_S1POWER_Pos (1UL) /*!< Position of S1POWER field. */
+#define POWER_RAM_POWER_S1POWER_Msk (0x1UL << POWER_RAM_POWER_S1POWER_Pos) /*!< Bit mask of S1POWER field. */
+#define POWER_RAM_POWER_S1POWER_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S1POWER_On (1UL) /*!< On */
+
+/* Bit 0 : Keep RAM section S0 ON or OFF in System ON mode. */
+#define POWER_RAM_POWER_S0POWER_Pos (0UL) /*!< Position of S0POWER field. */
+#define POWER_RAM_POWER_S0POWER_Msk (0x1UL << POWER_RAM_POWER_S0POWER_Pos) /*!< Bit mask of S0POWER field. */
+#define POWER_RAM_POWER_S0POWER_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S0POWER_On (1UL) /*!< On */
+
+/* Register: POWER_RAM_POWERSET */
+/* Description: Description cluster: RAMn power control set register */
+
+/* Bit 17 : Keep retention on RAM section S1 when RAM section is switched off */
+#define POWER_RAM_POWERSET_S1RETENTION_Pos (17UL) /*!< Position of S1RETENTION field. */
+#define POWER_RAM_POWERSET_S1RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S1RETENTION_Pos) /*!< Bit mask of S1RETENTION field. */
+#define POWER_RAM_POWERSET_S1RETENTION_On (1UL) /*!< On */
+
+/* Bit 16 : Keep retention on RAM section S0 when RAM section is switched off */
+#define POWER_RAM_POWERSET_S0RETENTION_Pos (16UL) /*!< Position of S0RETENTION field. */
+#define POWER_RAM_POWERSET_S0RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S0RETENTION_Pos) /*!< Bit mask of S0RETENTION field. */
+#define POWER_RAM_POWERSET_S0RETENTION_On (1UL) /*!< On */
+
+/* Bit 1 : Keep RAM section S1 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERSET_S1POWER_Pos (1UL) /*!< Position of S1POWER field. */
+#define POWER_RAM_POWERSET_S1POWER_Msk (0x1UL << POWER_RAM_POWERSET_S1POWER_Pos) /*!< Bit mask of S1POWER field. */
+#define POWER_RAM_POWERSET_S1POWER_On (1UL) /*!< On */
+
+/* Bit 0 : Keep RAM section S0 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERSET_S0POWER_Pos (0UL) /*!< Position of S0POWER field. */
+#define POWER_RAM_POWERSET_S0POWER_Msk (0x1UL << POWER_RAM_POWERSET_S0POWER_Pos) /*!< Bit mask of S0POWER field. */
+#define POWER_RAM_POWERSET_S0POWER_On (1UL) /*!< On */
+
+/* Register: POWER_RAM_POWERCLR */
+/* Description: Description cluster: RAMn power control clear register */
+
+/* Bit 17 : Keep retention on RAM section S1 when RAM section is switched off */
+#define POWER_RAM_POWERCLR_S1RETENTION_Pos (17UL) /*!< Position of S1RETENTION field. */
+#define POWER_RAM_POWERCLR_S1RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S1RETENTION_Pos) /*!< Bit mask of S1RETENTION field. */
+#define POWER_RAM_POWERCLR_S1RETENTION_Off (1UL) /*!< Off */
+
+/* Bit 16 : Keep retention on RAM section S0 when RAM section is switched off */
+#define POWER_RAM_POWERCLR_S0RETENTION_Pos (16UL) /*!< Position of S0RETENTION field. */
+#define POWER_RAM_POWERCLR_S0RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S0RETENTION_Pos) /*!< Bit mask of S0RETENTION field. */
+#define POWER_RAM_POWERCLR_S0RETENTION_Off (1UL) /*!< Off */
+
+/* Bit 1 : Keep RAM section S1 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERCLR_S1POWER_Pos (1UL) /*!< Position of S1POWER field. */
+#define POWER_RAM_POWERCLR_S1POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S1POWER_Pos) /*!< Bit mask of S1POWER field. */
+#define POWER_RAM_POWERCLR_S1POWER_Off (1UL) /*!< Off */
+
+/* Bit 0 : Keep RAM section S0 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERCLR_S0POWER_Pos (0UL) /*!< Position of S0POWER field. */
+#define POWER_RAM_POWERCLR_S0POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S0POWER_Pos) /*!< Bit mask of S0POWER field. */
+#define POWER_RAM_POWERCLR_S0POWER_Off (1UL) /*!< Off */
+
+
+/* Peripheral: PPI */
+/* Description: Programmable Peripheral Interconnect */
+
+/* Register: PPI_TASKS_CHG_EN */
+/* Description: Description cluster: Enable channel group n */
+
+/* Bit 0 : Enable channel group n */
+#define PPI_TASKS_CHG_EN_EN_Pos (0UL) /*!< Position of EN field. */
+#define PPI_TASKS_CHG_EN_EN_Msk (0x1UL << PPI_TASKS_CHG_EN_EN_Pos) /*!< Bit mask of EN field. */
+#define PPI_TASKS_CHG_EN_EN_Trigger (1UL) /*!< Trigger task */
+
+/* Register: PPI_TASKS_CHG_DIS */
+/* Description: Description cluster: Disable channel group n */
+
+/* Bit 0 : Disable channel group n */
+#define PPI_TASKS_CHG_DIS_DIS_Pos (0UL) /*!< Position of DIS field. */
+#define PPI_TASKS_CHG_DIS_DIS_Msk (0x1UL << PPI_TASKS_CHG_DIS_DIS_Pos) /*!< Bit mask of DIS field. */
+#define PPI_TASKS_CHG_DIS_DIS_Trigger (1UL) /*!< Trigger task */
+
+/* Register: PPI_CHEN */
+/* Description: Channel enable register */
+
+/* Bit 31 : Enable or disable channel 31 */
+#define PPI_CHEN_CH31_Pos (31UL) /*!< Position of CH31 field. */
+#define PPI_CHEN_CH31_Msk (0x1UL << PPI_CHEN_CH31_Pos) /*!< Bit mask of CH31 field. */
+#define PPI_CHEN_CH31_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH31_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 30 : Enable or disable channel 30 */
+#define PPI_CHEN_CH30_Pos (30UL) /*!< Position of CH30 field. */
+#define PPI_CHEN_CH30_Msk (0x1UL << PPI_CHEN_CH30_Pos) /*!< Bit mask of CH30 field. */
+#define PPI_CHEN_CH30_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH30_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 29 : Enable or disable channel 29 */
+#define PPI_CHEN_CH29_Pos (29UL) /*!< Position of CH29 field. */
+#define PPI_CHEN_CH29_Msk (0x1UL << PPI_CHEN_CH29_Pos) /*!< Bit mask of CH29 field. */
+#define PPI_CHEN_CH29_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH29_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 28 : Enable or disable channel 28 */
+#define PPI_CHEN_CH28_Pos (28UL) /*!< Position of CH28 field. */
+#define PPI_CHEN_CH28_Msk (0x1UL << PPI_CHEN_CH28_Pos) /*!< Bit mask of CH28 field. */
+#define PPI_CHEN_CH28_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH28_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 27 : Enable or disable channel 27 */
+#define PPI_CHEN_CH27_Pos (27UL) /*!< Position of CH27 field. */
+#define PPI_CHEN_CH27_Msk (0x1UL << PPI_CHEN_CH27_Pos) /*!< Bit mask of CH27 field. */
+#define PPI_CHEN_CH27_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH27_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 26 : Enable or disable channel 26 */
+#define PPI_CHEN_CH26_Pos (26UL) /*!< Position of CH26 field. */
+#define PPI_CHEN_CH26_Msk (0x1UL << PPI_CHEN_CH26_Pos) /*!< Bit mask of CH26 field. */
+#define PPI_CHEN_CH26_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH26_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 25 : Enable or disable channel 25 */
+#define PPI_CHEN_CH25_Pos (25UL) /*!< Position of CH25 field. */
+#define PPI_CHEN_CH25_Msk (0x1UL << PPI_CHEN_CH25_Pos) /*!< Bit mask of CH25 field. */
+#define PPI_CHEN_CH25_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH25_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 24 : Enable or disable channel 24 */
+#define PPI_CHEN_CH24_Pos (24UL) /*!< Position of CH24 field. */
+#define PPI_CHEN_CH24_Msk (0x1UL << PPI_CHEN_CH24_Pos) /*!< Bit mask of CH24 field. */
+#define PPI_CHEN_CH24_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH24_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 23 : Enable or disable channel 23 */
+#define PPI_CHEN_CH23_Pos (23UL) /*!< Position of CH23 field. */
+#define PPI_CHEN_CH23_Msk (0x1UL << PPI_CHEN_CH23_Pos) /*!< Bit mask of CH23 field. */
+#define PPI_CHEN_CH23_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH23_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 22 : Enable or disable channel 22 */
+#define PPI_CHEN_CH22_Pos (22UL) /*!< Position of CH22 field. */
+#define PPI_CHEN_CH22_Msk (0x1UL << PPI_CHEN_CH22_Pos) /*!< Bit mask of CH22 field. */
+#define PPI_CHEN_CH22_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH22_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 21 : Enable or disable channel 21 */
+#define PPI_CHEN_CH21_Pos (21UL) /*!< Position of CH21 field. */
+#define PPI_CHEN_CH21_Msk (0x1UL << PPI_CHEN_CH21_Pos) /*!< Bit mask of CH21 field. */
+#define PPI_CHEN_CH21_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH21_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 20 : Enable or disable channel 20 */
+#define PPI_CHEN_CH20_Pos (20UL) /*!< Position of CH20 field. */
+#define PPI_CHEN_CH20_Msk (0x1UL << PPI_CHEN_CH20_Pos) /*!< Bit mask of CH20 field. */
+#define PPI_CHEN_CH20_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH20_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 19 : Enable or disable channel 19 */
+#define PPI_CHEN_CH19_Pos (19UL) /*!< Position of CH19 field. */
+#define PPI_CHEN_CH19_Msk (0x1UL << PPI_CHEN_CH19_Pos) /*!< Bit mask of CH19 field. */
+#define PPI_CHEN_CH19_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH19_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 18 : Enable or disable channel 18 */
+#define PPI_CHEN_CH18_Pos (18UL) /*!< Position of CH18 field. */
+#define PPI_CHEN_CH18_Msk (0x1UL << PPI_CHEN_CH18_Pos) /*!< Bit mask of CH18 field. */
+#define PPI_CHEN_CH18_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH18_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 17 : Enable or disable channel 17 */
+#define PPI_CHEN_CH17_Pos (17UL) /*!< Position of CH17 field. */
+#define PPI_CHEN_CH17_Msk (0x1UL << PPI_CHEN_CH17_Pos) /*!< Bit mask of CH17 field. */
+#define PPI_CHEN_CH17_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH17_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 16 : Enable or disable channel 16 */
+#define PPI_CHEN_CH16_Pos (16UL) /*!< Position of CH16 field. */
+#define PPI_CHEN_CH16_Msk (0x1UL << PPI_CHEN_CH16_Pos) /*!< Bit mask of CH16 field. */
+#define PPI_CHEN_CH16_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH16_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 15 : Enable or disable channel 15 */
+#define PPI_CHEN_CH15_Pos (15UL) /*!< Position of CH15 field. */
+#define PPI_CHEN_CH15_Msk (0x1UL << PPI_CHEN_CH15_Pos) /*!< Bit mask of CH15 field. */
+#define PPI_CHEN_CH15_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH15_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 14 : Enable or disable channel 14 */
+#define PPI_CHEN_CH14_Pos (14UL) /*!< Position of CH14 field. */
+#define PPI_CHEN_CH14_Msk (0x1UL << PPI_CHEN_CH14_Pos) /*!< Bit mask of CH14 field. */
+#define PPI_CHEN_CH14_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH14_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 13 : Enable or disable channel 13 */
+#define PPI_CHEN_CH13_Pos (13UL) /*!< Position of CH13 field. */
+#define PPI_CHEN_CH13_Msk (0x1UL << PPI_CHEN_CH13_Pos) /*!< Bit mask of CH13 field. */
+#define PPI_CHEN_CH13_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH13_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 12 : Enable or disable channel 12 */
+#define PPI_CHEN_CH12_Pos (12UL) /*!< Position of CH12 field. */
+#define PPI_CHEN_CH12_Msk (0x1UL << PPI_CHEN_CH12_Pos) /*!< Bit mask of CH12 field. */
+#define PPI_CHEN_CH12_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH12_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 11 : Enable or disable channel 11 */
+#define PPI_CHEN_CH11_Pos (11UL) /*!< Position of CH11 field. */
+#define PPI_CHEN_CH11_Msk (0x1UL << PPI_CHEN_CH11_Pos) /*!< Bit mask of CH11 field. */
+#define PPI_CHEN_CH11_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH11_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 10 : Enable or disable channel 10 */
+#define PPI_CHEN_CH10_Pos (10UL) /*!< Position of CH10 field. */
+#define PPI_CHEN_CH10_Msk (0x1UL << PPI_CHEN_CH10_Pos) /*!< Bit mask of CH10 field. */
+#define PPI_CHEN_CH10_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH10_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 9 : Enable or disable channel 9 */
+#define PPI_CHEN_CH9_Pos (9UL) /*!< Position of CH9 field. */
+#define PPI_CHEN_CH9_Msk (0x1UL << PPI_CHEN_CH9_Pos) /*!< Bit mask of CH9 field. */
+#define PPI_CHEN_CH9_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH9_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 8 : Enable or disable channel 8 */
+#define PPI_CHEN_CH8_Pos (8UL) /*!< Position of CH8 field. */
+#define PPI_CHEN_CH8_Msk (0x1UL << PPI_CHEN_CH8_Pos) /*!< Bit mask of CH8 field. */
+#define PPI_CHEN_CH8_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH8_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 7 : Enable or disable channel 7 */
+#define PPI_CHEN_CH7_Pos (7UL) /*!< Position of CH7 field. */
+#define PPI_CHEN_CH7_Msk (0x1UL << PPI_CHEN_CH7_Pos) /*!< Bit mask of CH7 field. */
+#define PPI_CHEN_CH7_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH7_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 6 : Enable or disable channel 6 */
+#define PPI_CHEN_CH6_Pos (6UL) /*!< Position of CH6 field. */
+#define PPI_CHEN_CH6_Msk (0x1UL << PPI_CHEN_CH6_Pos) /*!< Bit mask of CH6 field. */
+#define PPI_CHEN_CH6_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH6_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 5 : Enable or disable channel 5 */
+#define PPI_CHEN_CH5_Pos (5UL) /*!< Position of CH5 field. */
+#define PPI_CHEN_CH5_Msk (0x1UL << PPI_CHEN_CH5_Pos) /*!< Bit mask of CH5 field. */
+#define PPI_CHEN_CH5_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH5_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 4 : Enable or disable channel 4 */
+#define PPI_CHEN_CH4_Pos (4UL) /*!< Position of CH4 field. */
+#define PPI_CHEN_CH4_Msk (0x1UL << PPI_CHEN_CH4_Pos) /*!< Bit mask of CH4 field. */
+#define PPI_CHEN_CH4_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH4_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 3 : Enable or disable channel 3 */
+#define PPI_CHEN_CH3_Pos (3UL) /*!< Position of CH3 field. */
+#define PPI_CHEN_CH3_Msk (0x1UL << PPI_CHEN_CH3_Pos) /*!< Bit mask of CH3 field. */
+#define PPI_CHEN_CH3_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH3_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 2 : Enable or disable channel 2 */
+#define PPI_CHEN_CH2_Pos (2UL) /*!< Position of CH2 field. */
+#define PPI_CHEN_CH2_Msk (0x1UL << PPI_CHEN_CH2_Pos) /*!< Bit mask of CH2 field. */
+#define PPI_CHEN_CH2_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH2_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 1 : Enable or disable channel 1 */
+#define PPI_CHEN_CH1_Pos (1UL) /*!< Position of CH1 field. */
+#define PPI_CHEN_CH1_Msk (0x1UL << PPI_CHEN_CH1_Pos) /*!< Bit mask of CH1 field. */
+#define PPI_CHEN_CH1_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH1_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 0 : Enable or disable channel 0 */
+#define PPI_CHEN_CH0_Pos (0UL) /*!< Position of CH0 field. */
+#define PPI_CHEN_CH0_Msk (0x1UL << PPI_CHEN_CH0_Pos) /*!< Bit mask of CH0 field. */
+#define PPI_CHEN_CH0_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH0_Enabled (1UL) /*!< Enable channel */
+
+/* Register: PPI_CHENSET */
+/* Description: Channel enable set register */
+
+/* Bit 31 : Channel 31 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH31_Pos (31UL) /*!< Position of CH31 field. */
+#define PPI_CHENSET_CH31_Msk (0x1UL << PPI_CHENSET_CH31_Pos) /*!< Bit mask of CH31 field. */
+#define PPI_CHENSET_CH31_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH31_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH31_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 30 : Channel 30 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH30_Pos (30UL) /*!< Position of CH30 field. */
+#define PPI_CHENSET_CH30_Msk (0x1UL << PPI_CHENSET_CH30_Pos) /*!< Bit mask of CH30 field. */
+#define PPI_CHENSET_CH30_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH30_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH30_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 29 : Channel 29 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH29_Pos (29UL) /*!< Position of CH29 field. */
+#define PPI_CHENSET_CH29_Msk (0x1UL << PPI_CHENSET_CH29_Pos) /*!< Bit mask of CH29 field. */
+#define PPI_CHENSET_CH29_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH29_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH29_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 28 : Channel 28 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH28_Pos (28UL) /*!< Position of CH28 field. */
+#define PPI_CHENSET_CH28_Msk (0x1UL << PPI_CHENSET_CH28_Pos) /*!< Bit mask of CH28 field. */
+#define PPI_CHENSET_CH28_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH28_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH28_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 27 : Channel 27 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH27_Pos (27UL) /*!< Position of CH27 field. */
+#define PPI_CHENSET_CH27_Msk (0x1UL << PPI_CHENSET_CH27_Pos) /*!< Bit mask of CH27 field. */
+#define PPI_CHENSET_CH27_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH27_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH27_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 26 : Channel 26 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH26_Pos (26UL) /*!< Position of CH26 field. */
+#define PPI_CHENSET_CH26_Msk (0x1UL << PPI_CHENSET_CH26_Pos) /*!< Bit mask of CH26 field. */
+#define PPI_CHENSET_CH26_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH26_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH26_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 25 : Channel 25 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH25_Pos (25UL) /*!< Position of CH25 field. */
+#define PPI_CHENSET_CH25_Msk (0x1UL << PPI_CHENSET_CH25_Pos) /*!< Bit mask of CH25 field. */
+#define PPI_CHENSET_CH25_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH25_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH25_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 24 : Channel 24 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH24_Pos (24UL) /*!< Position of CH24 field. */
+#define PPI_CHENSET_CH24_Msk (0x1UL << PPI_CHENSET_CH24_Pos) /*!< Bit mask of CH24 field. */
+#define PPI_CHENSET_CH24_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH24_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH24_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 23 : Channel 23 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH23_Pos (23UL) /*!< Position of CH23 field. */
+#define PPI_CHENSET_CH23_Msk (0x1UL << PPI_CHENSET_CH23_Pos) /*!< Bit mask of CH23 field. */
+#define PPI_CHENSET_CH23_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH23_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH23_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 22 : Channel 22 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH22_Pos (22UL) /*!< Position of CH22 field. */
+#define PPI_CHENSET_CH22_Msk (0x1UL << PPI_CHENSET_CH22_Pos) /*!< Bit mask of CH22 field. */
+#define PPI_CHENSET_CH22_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH22_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH22_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 21 : Channel 21 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH21_Pos (21UL) /*!< Position of CH21 field. */
+#define PPI_CHENSET_CH21_Msk (0x1UL << PPI_CHENSET_CH21_Pos) /*!< Bit mask of CH21 field. */
+#define PPI_CHENSET_CH21_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH21_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH21_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 20 : Channel 20 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH20_Pos (20UL) /*!< Position of CH20 field. */
+#define PPI_CHENSET_CH20_Msk (0x1UL << PPI_CHENSET_CH20_Pos) /*!< Bit mask of CH20 field. */
+#define PPI_CHENSET_CH20_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH20_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH20_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 19 : Channel 19 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH19_Pos (19UL) /*!< Position of CH19 field. */
+#define PPI_CHENSET_CH19_Msk (0x1UL << PPI_CHENSET_CH19_Pos) /*!< Bit mask of CH19 field. */
+#define PPI_CHENSET_CH19_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH19_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH19_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 18 : Channel 18 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH18_Pos (18UL) /*!< Position of CH18 field. */
+#define PPI_CHENSET_CH18_Msk (0x1UL << PPI_CHENSET_CH18_Pos) /*!< Bit mask of CH18 field. */
+#define PPI_CHENSET_CH18_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH18_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH18_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 17 : Channel 17 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH17_Pos (17UL) /*!< Position of CH17 field. */
+#define PPI_CHENSET_CH17_Msk (0x1UL << PPI_CHENSET_CH17_Pos) /*!< Bit mask of CH17 field. */
+#define PPI_CHENSET_CH17_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH17_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH17_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 16 : Channel 16 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH16_Pos (16UL) /*!< Position of CH16 field. */
+#define PPI_CHENSET_CH16_Msk (0x1UL << PPI_CHENSET_CH16_Pos) /*!< Bit mask of CH16 field. */
+#define PPI_CHENSET_CH16_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH16_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH16_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 15 : Channel 15 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH15_Pos (15UL) /*!< Position of CH15 field. */
+#define PPI_CHENSET_CH15_Msk (0x1UL << PPI_CHENSET_CH15_Pos) /*!< Bit mask of CH15 field. */
+#define PPI_CHENSET_CH15_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH15_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH15_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 14 : Channel 14 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH14_Pos (14UL) /*!< Position of CH14 field. */
+#define PPI_CHENSET_CH14_Msk (0x1UL << PPI_CHENSET_CH14_Pos) /*!< Bit mask of CH14 field. */
+#define PPI_CHENSET_CH14_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH14_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH14_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 13 : Channel 13 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH13_Pos (13UL) /*!< Position of CH13 field. */
+#define PPI_CHENSET_CH13_Msk (0x1UL << PPI_CHENSET_CH13_Pos) /*!< Bit mask of CH13 field. */
+#define PPI_CHENSET_CH13_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH13_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH13_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 12 : Channel 12 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH12_Pos (12UL) /*!< Position of CH12 field. */
+#define PPI_CHENSET_CH12_Msk (0x1UL << PPI_CHENSET_CH12_Pos) /*!< Bit mask of CH12 field. */
+#define PPI_CHENSET_CH12_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH12_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH12_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 11 : Channel 11 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH11_Pos (11UL) /*!< Position of CH11 field. */
+#define PPI_CHENSET_CH11_Msk (0x1UL << PPI_CHENSET_CH11_Pos) /*!< Bit mask of CH11 field. */
+#define PPI_CHENSET_CH11_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH11_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH11_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 10 : Channel 10 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH10_Pos (10UL) /*!< Position of CH10 field. */
+#define PPI_CHENSET_CH10_Msk (0x1UL << PPI_CHENSET_CH10_Pos) /*!< Bit mask of CH10 field. */
+#define PPI_CHENSET_CH10_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH10_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH10_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 9 : Channel 9 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH9_Pos (9UL) /*!< Position of CH9 field. */
+#define PPI_CHENSET_CH9_Msk (0x1UL << PPI_CHENSET_CH9_Pos) /*!< Bit mask of CH9 field. */
+#define PPI_CHENSET_CH9_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH9_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH9_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 8 : Channel 8 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH8_Pos (8UL) /*!< Position of CH8 field. */
+#define PPI_CHENSET_CH8_Msk (0x1UL << PPI_CHENSET_CH8_Pos) /*!< Bit mask of CH8 field. */
+#define PPI_CHENSET_CH8_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH8_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH8_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 7 : Channel 7 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH7_Pos (7UL) /*!< Position of CH7 field. */
+#define PPI_CHENSET_CH7_Msk (0x1UL << PPI_CHENSET_CH7_Pos) /*!< Bit mask of CH7 field. */
+#define PPI_CHENSET_CH7_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH7_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH7_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 6 : Channel 6 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH6_Pos (6UL) /*!< Position of CH6 field. */
+#define PPI_CHENSET_CH6_Msk (0x1UL << PPI_CHENSET_CH6_Pos) /*!< Bit mask of CH6 field. */
+#define PPI_CHENSET_CH6_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH6_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH6_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 5 : Channel 5 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH5_Pos (5UL) /*!< Position of CH5 field. */
+#define PPI_CHENSET_CH5_Msk (0x1UL << PPI_CHENSET_CH5_Pos) /*!< Bit mask of CH5 field. */
+#define PPI_CHENSET_CH5_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH5_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH5_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 4 : Channel 4 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH4_Pos (4UL) /*!< Position of CH4 field. */
+#define PPI_CHENSET_CH4_Msk (0x1UL << PPI_CHENSET_CH4_Pos) /*!< Bit mask of CH4 field. */
+#define PPI_CHENSET_CH4_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH4_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH4_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 3 : Channel 3 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH3_Pos (3UL) /*!< Position of CH3 field. */
+#define PPI_CHENSET_CH3_Msk (0x1UL << PPI_CHENSET_CH3_Pos) /*!< Bit mask of CH3 field. */
+#define PPI_CHENSET_CH3_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH3_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH3_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 2 : Channel 2 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH2_Pos (2UL) /*!< Position of CH2 field. */
+#define PPI_CHENSET_CH2_Msk (0x1UL << PPI_CHENSET_CH2_Pos) /*!< Bit mask of CH2 field. */
+#define PPI_CHENSET_CH2_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH2_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH2_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 1 : Channel 1 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH1_Pos (1UL) /*!< Position of CH1 field. */
+#define PPI_CHENSET_CH1_Msk (0x1UL << PPI_CHENSET_CH1_Pos) /*!< Bit mask of CH1 field. */
+#define PPI_CHENSET_CH1_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH1_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH1_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 0 : Channel 0 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH0_Pos (0UL) /*!< Position of CH0 field. */
+#define PPI_CHENSET_CH0_Msk (0x1UL << PPI_CHENSET_CH0_Pos) /*!< Bit mask of CH0 field. */
+#define PPI_CHENSET_CH0_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH0_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH0_Set (1UL) /*!< Write: Enable channel */
+
+/* Register: PPI_CHENCLR */
+/* Description: Channel enable clear register */
+
+/* Bit 31 : Channel 31 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH31_Pos (31UL) /*!< Position of CH31 field. */
+#define PPI_CHENCLR_CH31_Msk (0x1UL << PPI_CHENCLR_CH31_Pos) /*!< Bit mask of CH31 field. */
+#define PPI_CHENCLR_CH31_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH31_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH31_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 30 : Channel 30 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH30_Pos (30UL) /*!< Position of CH30 field. */
+#define PPI_CHENCLR_CH30_Msk (0x1UL << PPI_CHENCLR_CH30_Pos) /*!< Bit mask of CH30 field. */
+#define PPI_CHENCLR_CH30_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH30_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH30_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 29 : Channel 29 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH29_Pos (29UL) /*!< Position of CH29 field. */
+#define PPI_CHENCLR_CH29_Msk (0x1UL << PPI_CHENCLR_CH29_Pos) /*!< Bit mask of CH29 field. */
+#define PPI_CHENCLR_CH29_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH29_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH29_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 28 : Channel 28 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH28_Pos (28UL) /*!< Position of CH28 field. */
+#define PPI_CHENCLR_CH28_Msk (0x1UL << PPI_CHENCLR_CH28_Pos) /*!< Bit mask of CH28 field. */
+#define PPI_CHENCLR_CH28_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH28_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH28_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 27 : Channel 27 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH27_Pos (27UL) /*!< Position of CH27 field. */
+#define PPI_CHENCLR_CH27_Msk (0x1UL << PPI_CHENCLR_CH27_Pos) /*!< Bit mask of CH27 field. */
+#define PPI_CHENCLR_CH27_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH27_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH27_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 26 : Channel 26 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH26_Pos (26UL) /*!< Position of CH26 field. */
+#define PPI_CHENCLR_CH26_Msk (0x1UL << PPI_CHENCLR_CH26_Pos) /*!< Bit mask of CH26 field. */
+#define PPI_CHENCLR_CH26_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH26_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH26_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 25 : Channel 25 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH25_Pos (25UL) /*!< Position of CH25 field. */
+#define PPI_CHENCLR_CH25_Msk (0x1UL << PPI_CHENCLR_CH25_Pos) /*!< Bit mask of CH25 field. */
+#define PPI_CHENCLR_CH25_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH25_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH25_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 24 : Channel 24 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH24_Pos (24UL) /*!< Position of CH24 field. */
+#define PPI_CHENCLR_CH24_Msk (0x1UL << PPI_CHENCLR_CH24_Pos) /*!< Bit mask of CH24 field. */
+#define PPI_CHENCLR_CH24_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH24_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH24_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 23 : Channel 23 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH23_Pos (23UL) /*!< Position of CH23 field. */
+#define PPI_CHENCLR_CH23_Msk (0x1UL << PPI_CHENCLR_CH23_Pos) /*!< Bit mask of CH23 field. */
+#define PPI_CHENCLR_CH23_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH23_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH23_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 22 : Channel 22 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH22_Pos (22UL) /*!< Position of CH22 field. */
+#define PPI_CHENCLR_CH22_Msk (0x1UL << PPI_CHENCLR_CH22_Pos) /*!< Bit mask of CH22 field. */
+#define PPI_CHENCLR_CH22_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH22_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH22_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 21 : Channel 21 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH21_Pos (21UL) /*!< Position of CH21 field. */
+#define PPI_CHENCLR_CH21_Msk (0x1UL << PPI_CHENCLR_CH21_Pos) /*!< Bit mask of CH21 field. */
+#define PPI_CHENCLR_CH21_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH21_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH21_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 20 : Channel 20 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH20_Pos (20UL) /*!< Position of CH20 field. */
+#define PPI_CHENCLR_CH20_Msk (0x1UL << PPI_CHENCLR_CH20_Pos) /*!< Bit mask of CH20 field. */
+#define PPI_CHENCLR_CH20_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH20_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH20_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 19 : Channel 19 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH19_Pos (19UL) /*!< Position of CH19 field. */
+#define PPI_CHENCLR_CH19_Msk (0x1UL << PPI_CHENCLR_CH19_Pos) /*!< Bit mask of CH19 field. */
+#define PPI_CHENCLR_CH19_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH19_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH19_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 18 : Channel 18 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH18_Pos (18UL) /*!< Position of CH18 field. */
+#define PPI_CHENCLR_CH18_Msk (0x1UL << PPI_CHENCLR_CH18_Pos) /*!< Bit mask of CH18 field. */
+#define PPI_CHENCLR_CH18_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH18_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH18_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 17 : Channel 17 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH17_Pos (17UL) /*!< Position of CH17 field. */
+#define PPI_CHENCLR_CH17_Msk (0x1UL << PPI_CHENCLR_CH17_Pos) /*!< Bit mask of CH17 field. */
+#define PPI_CHENCLR_CH17_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH17_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH17_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 16 : Channel 16 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH16_Pos (16UL) /*!< Position of CH16 field. */
+#define PPI_CHENCLR_CH16_Msk (0x1UL << PPI_CHENCLR_CH16_Pos) /*!< Bit mask of CH16 field. */
+#define PPI_CHENCLR_CH16_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH16_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH16_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 15 : Channel 15 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH15_Pos (15UL) /*!< Position of CH15 field. */
+#define PPI_CHENCLR_CH15_Msk (0x1UL << PPI_CHENCLR_CH15_Pos) /*!< Bit mask of CH15 field. */
+#define PPI_CHENCLR_CH15_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH15_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH15_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 14 : Channel 14 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH14_Pos (14UL) /*!< Position of CH14 field. */
+#define PPI_CHENCLR_CH14_Msk (0x1UL << PPI_CHENCLR_CH14_Pos) /*!< Bit mask of CH14 field. */
+#define PPI_CHENCLR_CH14_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH14_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH14_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 13 : Channel 13 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH13_Pos (13UL) /*!< Position of CH13 field. */
+#define PPI_CHENCLR_CH13_Msk (0x1UL << PPI_CHENCLR_CH13_Pos) /*!< Bit mask of CH13 field. */
+#define PPI_CHENCLR_CH13_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH13_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH13_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 12 : Channel 12 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH12_Pos (12UL) /*!< Position of CH12 field. */
+#define PPI_CHENCLR_CH12_Msk (0x1UL << PPI_CHENCLR_CH12_Pos) /*!< Bit mask of CH12 field. */
+#define PPI_CHENCLR_CH12_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH12_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH12_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 11 : Channel 11 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH11_Pos (11UL) /*!< Position of CH11 field. */
+#define PPI_CHENCLR_CH11_Msk (0x1UL << PPI_CHENCLR_CH11_Pos) /*!< Bit mask of CH11 field. */
+#define PPI_CHENCLR_CH11_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH11_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH11_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 10 : Channel 10 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH10_Pos (10UL) /*!< Position of CH10 field. */
+#define PPI_CHENCLR_CH10_Msk (0x1UL << PPI_CHENCLR_CH10_Pos) /*!< Bit mask of CH10 field. */
+#define PPI_CHENCLR_CH10_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH10_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH10_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 9 : Channel 9 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH9_Pos (9UL) /*!< Position of CH9 field. */
+#define PPI_CHENCLR_CH9_Msk (0x1UL << PPI_CHENCLR_CH9_Pos) /*!< Bit mask of CH9 field. */
+#define PPI_CHENCLR_CH9_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH9_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH9_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 8 : Channel 8 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH8_Pos (8UL) /*!< Position of CH8 field. */
+#define PPI_CHENCLR_CH8_Msk (0x1UL << PPI_CHENCLR_CH8_Pos) /*!< Bit mask of CH8 field. */
+#define PPI_CHENCLR_CH8_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH8_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH8_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 7 : Channel 7 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH7_Pos (7UL) /*!< Position of CH7 field. */
+#define PPI_CHENCLR_CH7_Msk (0x1UL << PPI_CHENCLR_CH7_Pos) /*!< Bit mask of CH7 field. */
+#define PPI_CHENCLR_CH7_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH7_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH7_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 6 : Channel 6 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH6_Pos (6UL) /*!< Position of CH6 field. */
+#define PPI_CHENCLR_CH6_Msk (0x1UL << PPI_CHENCLR_CH6_Pos) /*!< Bit mask of CH6 field. */
+#define PPI_CHENCLR_CH6_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH6_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH6_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 5 : Channel 5 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH5_Pos (5UL) /*!< Position of CH5 field. */
+#define PPI_CHENCLR_CH5_Msk (0x1UL << PPI_CHENCLR_CH5_Pos) /*!< Bit mask of CH5 field. */
+#define PPI_CHENCLR_CH5_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH5_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH5_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 4 : Channel 4 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH4_Pos (4UL) /*!< Position of CH4 field. */
+#define PPI_CHENCLR_CH4_Msk (0x1UL << PPI_CHENCLR_CH4_Pos) /*!< Bit mask of CH4 field. */
+#define PPI_CHENCLR_CH4_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH4_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH4_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 3 : Channel 3 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH3_Pos (3UL) /*!< Position of CH3 field. */
+#define PPI_CHENCLR_CH3_Msk (0x1UL << PPI_CHENCLR_CH3_Pos) /*!< Bit mask of CH3 field. */
+#define PPI_CHENCLR_CH3_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH3_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH3_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 2 : Channel 2 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH2_Pos (2UL) /*!< Position of CH2 field. */
+#define PPI_CHENCLR_CH2_Msk (0x1UL << PPI_CHENCLR_CH2_Pos) /*!< Bit mask of CH2 field. */
+#define PPI_CHENCLR_CH2_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH2_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH2_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 1 : Channel 1 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH1_Pos (1UL) /*!< Position of CH1 field. */
+#define PPI_CHENCLR_CH1_Msk (0x1UL << PPI_CHENCLR_CH1_Pos) /*!< Bit mask of CH1 field. */
+#define PPI_CHENCLR_CH1_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH1_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH1_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 0 : Channel 0 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH0_Pos (0UL) /*!< Position of CH0 field. */
+#define PPI_CHENCLR_CH0_Msk (0x1UL << PPI_CHENCLR_CH0_Pos) /*!< Bit mask of CH0 field. */
+#define PPI_CHENCLR_CH0_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH0_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH0_Clear (1UL) /*!< Write: disable channel */
+
+/* Register: PPI_CH_EEP */
+/* Description: Description cluster: Channel n event end-point */
+
+/* Bits 31..0 : Pointer to event register. Accepts only addresses to registers from the Event group. */
+#define PPI_CH_EEP_EEP_Pos (0UL) /*!< Position of EEP field. */
+#define PPI_CH_EEP_EEP_Msk (0xFFFFFFFFUL << PPI_CH_EEP_EEP_Pos) /*!< Bit mask of EEP field. */
+
+/* Register: PPI_CH_TEP */
+/* Description: Description cluster: Channel n task end-point */
+
+/* Bits 31..0 : Pointer to task register. Accepts only addresses to registers from the Task group. */
+#define PPI_CH_TEP_TEP_Pos (0UL) /*!< Position of TEP field. */
+#define PPI_CH_TEP_TEP_Msk (0xFFFFFFFFUL << PPI_CH_TEP_TEP_Pos) /*!< Bit mask of TEP field. */
+
+/* Register: PPI_CHG */
+/* Description: Description collection: Channel group n */
+
+/* Bit 31 : Include or exclude channel 31 */
+#define PPI_CHG_CH31_Pos (31UL) /*!< Position of CH31 field. */
+#define PPI_CHG_CH31_Msk (0x1UL << PPI_CHG_CH31_Pos) /*!< Bit mask of CH31 field. */
+#define PPI_CHG_CH31_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH31_Included (1UL) /*!< Include */
+
+/* Bit 30 : Include or exclude channel 30 */
+#define PPI_CHG_CH30_Pos (30UL) /*!< Position of CH30 field. */
+#define PPI_CHG_CH30_Msk (0x1UL << PPI_CHG_CH30_Pos) /*!< Bit mask of CH30 field. */
+#define PPI_CHG_CH30_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH30_Included (1UL) /*!< Include */
+
+/* Bit 29 : Include or exclude channel 29 */
+#define PPI_CHG_CH29_Pos (29UL) /*!< Position of CH29 field. */
+#define PPI_CHG_CH29_Msk (0x1UL << PPI_CHG_CH29_Pos) /*!< Bit mask of CH29 field. */
+#define PPI_CHG_CH29_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH29_Included (1UL) /*!< Include */
+
+/* Bit 28 : Include or exclude channel 28 */
+#define PPI_CHG_CH28_Pos (28UL) /*!< Position of CH28 field. */
+#define PPI_CHG_CH28_Msk (0x1UL << PPI_CHG_CH28_Pos) /*!< Bit mask of CH28 field. */
+#define PPI_CHG_CH28_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH28_Included (1UL) /*!< Include */
+
+/* Bit 27 : Include or exclude channel 27 */
+#define PPI_CHG_CH27_Pos (27UL) /*!< Position of CH27 field. */
+#define PPI_CHG_CH27_Msk (0x1UL << PPI_CHG_CH27_Pos) /*!< Bit mask of CH27 field. */
+#define PPI_CHG_CH27_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH27_Included (1UL) /*!< Include */
+
+/* Bit 26 : Include or exclude channel 26 */
+#define PPI_CHG_CH26_Pos (26UL) /*!< Position of CH26 field. */
+#define PPI_CHG_CH26_Msk (0x1UL << PPI_CHG_CH26_Pos) /*!< Bit mask of CH26 field. */
+#define PPI_CHG_CH26_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH26_Included (1UL) /*!< Include */
+
+/* Bit 25 : Include or exclude channel 25 */
+#define PPI_CHG_CH25_Pos (25UL) /*!< Position of CH25 field. */
+#define PPI_CHG_CH25_Msk (0x1UL << PPI_CHG_CH25_Pos) /*!< Bit mask of CH25 field. */
+#define PPI_CHG_CH25_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH25_Included (1UL) /*!< Include */
+
+/* Bit 24 : Include or exclude channel 24 */
+#define PPI_CHG_CH24_Pos (24UL) /*!< Position of CH24 field. */
+#define PPI_CHG_CH24_Msk (0x1UL << PPI_CHG_CH24_Pos) /*!< Bit mask of CH24 field. */
+#define PPI_CHG_CH24_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH24_Included (1UL) /*!< Include */
+
+/* Bit 23 : Include or exclude channel 23 */
+#define PPI_CHG_CH23_Pos (23UL) /*!< Position of CH23 field. */
+#define PPI_CHG_CH23_Msk (0x1UL << PPI_CHG_CH23_Pos) /*!< Bit mask of CH23 field. */
+#define PPI_CHG_CH23_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH23_Included (1UL) /*!< Include */
+
+/* Bit 22 : Include or exclude channel 22 */
+#define PPI_CHG_CH22_Pos (22UL) /*!< Position of CH22 field. */
+#define PPI_CHG_CH22_Msk (0x1UL << PPI_CHG_CH22_Pos) /*!< Bit mask of CH22 field. */
+#define PPI_CHG_CH22_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH22_Included (1UL) /*!< Include */
+
+/* Bit 21 : Include or exclude channel 21 */
+#define PPI_CHG_CH21_Pos (21UL) /*!< Position of CH21 field. */
+#define PPI_CHG_CH21_Msk (0x1UL << PPI_CHG_CH21_Pos) /*!< Bit mask of CH21 field. */
+#define PPI_CHG_CH21_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH21_Included (1UL) /*!< Include */
+
+/* Bit 20 : Include or exclude channel 20 */
+#define PPI_CHG_CH20_Pos (20UL) /*!< Position of CH20 field. */
+#define PPI_CHG_CH20_Msk (0x1UL << PPI_CHG_CH20_Pos) /*!< Bit mask of CH20 field. */
+#define PPI_CHG_CH20_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH20_Included (1UL) /*!< Include */
+
+/* Bit 19 : Include or exclude channel 19 */
+#define PPI_CHG_CH19_Pos (19UL) /*!< Position of CH19 field. */
+#define PPI_CHG_CH19_Msk (0x1UL << PPI_CHG_CH19_Pos) /*!< Bit mask of CH19 field. */
+#define PPI_CHG_CH19_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH19_Included (1UL) /*!< Include */
+
+/* Bit 18 : Include or exclude channel 18 */
+#define PPI_CHG_CH18_Pos (18UL) /*!< Position of CH18 field. */
+#define PPI_CHG_CH18_Msk (0x1UL << PPI_CHG_CH18_Pos) /*!< Bit mask of CH18 field. */
+#define PPI_CHG_CH18_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH18_Included (1UL) /*!< Include */
+
+/* Bit 17 : Include or exclude channel 17 */
+#define PPI_CHG_CH17_Pos (17UL) /*!< Position of CH17 field. */
+#define PPI_CHG_CH17_Msk (0x1UL << PPI_CHG_CH17_Pos) /*!< Bit mask of CH17 field. */
+#define PPI_CHG_CH17_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH17_Included (1UL) /*!< Include */
+
+/* Bit 16 : Include or exclude channel 16 */
+#define PPI_CHG_CH16_Pos (16UL) /*!< Position of CH16 field. */
+#define PPI_CHG_CH16_Msk (0x1UL << PPI_CHG_CH16_Pos) /*!< Bit mask of CH16 field. */
+#define PPI_CHG_CH16_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH16_Included (1UL) /*!< Include */
+
+/* Bit 15 : Include or exclude channel 15 */
+#define PPI_CHG_CH15_Pos (15UL) /*!< Position of CH15 field. */
+#define PPI_CHG_CH15_Msk (0x1UL << PPI_CHG_CH15_Pos) /*!< Bit mask of CH15 field. */
+#define PPI_CHG_CH15_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH15_Included (1UL) /*!< Include */
+
+/* Bit 14 : Include or exclude channel 14 */
+#define PPI_CHG_CH14_Pos (14UL) /*!< Position of CH14 field. */
+#define PPI_CHG_CH14_Msk (0x1UL << PPI_CHG_CH14_Pos) /*!< Bit mask of CH14 field. */
+#define PPI_CHG_CH14_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH14_Included (1UL) /*!< Include */
+
+/* Bit 13 : Include or exclude channel 13 */
+#define PPI_CHG_CH13_Pos (13UL) /*!< Position of CH13 field. */
+#define PPI_CHG_CH13_Msk (0x1UL << PPI_CHG_CH13_Pos) /*!< Bit mask of CH13 field. */
+#define PPI_CHG_CH13_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH13_Included (1UL) /*!< Include */
+
+/* Bit 12 : Include or exclude channel 12 */
+#define PPI_CHG_CH12_Pos (12UL) /*!< Position of CH12 field. */
+#define PPI_CHG_CH12_Msk (0x1UL << PPI_CHG_CH12_Pos) /*!< Bit mask of CH12 field. */
+#define PPI_CHG_CH12_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH12_Included (1UL) /*!< Include */
+
+/* Bit 11 : Include or exclude channel 11 */
+#define PPI_CHG_CH11_Pos (11UL) /*!< Position of CH11 field. */
+#define PPI_CHG_CH11_Msk (0x1UL << PPI_CHG_CH11_Pos) /*!< Bit mask of CH11 field. */
+#define PPI_CHG_CH11_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH11_Included (1UL) /*!< Include */
+
+/* Bit 10 : Include or exclude channel 10 */
+#define PPI_CHG_CH10_Pos (10UL) /*!< Position of CH10 field. */
+#define PPI_CHG_CH10_Msk (0x1UL << PPI_CHG_CH10_Pos) /*!< Bit mask of CH10 field. */
+#define PPI_CHG_CH10_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH10_Included (1UL) /*!< Include */
+
+/* Bit 9 : Include or exclude channel 9 */
+#define PPI_CHG_CH9_Pos (9UL) /*!< Position of CH9 field. */
+#define PPI_CHG_CH9_Msk (0x1UL << PPI_CHG_CH9_Pos) /*!< Bit mask of CH9 field. */
+#define PPI_CHG_CH9_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH9_Included (1UL) /*!< Include */
+
+/* Bit 8 : Include or exclude channel 8 */
+#define PPI_CHG_CH8_Pos (8UL) /*!< Position of CH8 field. */
+#define PPI_CHG_CH8_Msk (0x1UL << PPI_CHG_CH8_Pos) /*!< Bit mask of CH8 field. */
+#define PPI_CHG_CH8_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH8_Included (1UL) /*!< Include */
+
+/* Bit 7 : Include or exclude channel 7 */
+#define PPI_CHG_CH7_Pos (7UL) /*!< Position of CH7 field. */
+#define PPI_CHG_CH7_Msk (0x1UL << PPI_CHG_CH7_Pos) /*!< Bit mask of CH7 field. */
+#define PPI_CHG_CH7_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH7_Included (1UL) /*!< Include */
+
+/* Bit 6 : Include or exclude channel 6 */
+#define PPI_CHG_CH6_Pos (6UL) /*!< Position of CH6 field. */
+#define PPI_CHG_CH6_Msk (0x1UL << PPI_CHG_CH6_Pos) /*!< Bit mask of CH6 field. */
+#define PPI_CHG_CH6_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH6_Included (1UL) /*!< Include */
+
+/* Bit 5 : Include or exclude channel 5 */
+#define PPI_CHG_CH5_Pos (5UL) /*!< Position of CH5 field. */
+#define PPI_CHG_CH5_Msk (0x1UL << PPI_CHG_CH5_Pos) /*!< Bit mask of CH5 field. */
+#define PPI_CHG_CH5_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH5_Included (1UL) /*!< Include */
+
+/* Bit 4 : Include or exclude channel 4 */
+#define PPI_CHG_CH4_Pos (4UL) /*!< Position of CH4 field. */
+#define PPI_CHG_CH4_Msk (0x1UL << PPI_CHG_CH4_Pos) /*!< Bit mask of CH4 field. */
+#define PPI_CHG_CH4_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH4_Included (1UL) /*!< Include */
+
+/* Bit 3 : Include or exclude channel 3 */
+#define PPI_CHG_CH3_Pos (3UL) /*!< Position of CH3 field. */
+#define PPI_CHG_CH3_Msk (0x1UL << PPI_CHG_CH3_Pos) /*!< Bit mask of CH3 field. */
+#define PPI_CHG_CH3_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH3_Included (1UL) /*!< Include */
+
+/* Bit 2 : Include or exclude channel 2 */
+#define PPI_CHG_CH2_Pos (2UL) /*!< Position of CH2 field. */
+#define PPI_CHG_CH2_Msk (0x1UL << PPI_CHG_CH2_Pos) /*!< Bit mask of CH2 field. */
+#define PPI_CHG_CH2_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH2_Included (1UL) /*!< Include */
+
+/* Bit 1 : Include or exclude channel 1 */
+#define PPI_CHG_CH1_Pos (1UL) /*!< Position of CH1 field. */
+#define PPI_CHG_CH1_Msk (0x1UL << PPI_CHG_CH1_Pos) /*!< Bit mask of CH1 field. */
+#define PPI_CHG_CH1_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH1_Included (1UL) /*!< Include */
+
+/* Bit 0 : Include or exclude channel 0 */
+#define PPI_CHG_CH0_Pos (0UL) /*!< Position of CH0 field. */
+#define PPI_CHG_CH0_Msk (0x1UL << PPI_CHG_CH0_Pos) /*!< Bit mask of CH0 field. */
+#define PPI_CHG_CH0_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH0_Included (1UL) /*!< Include */
+
+/* Register: PPI_FORK_TEP */
+/* Description: Description cluster: Channel n task end-point */
+
+/* Bits 31..0 : Pointer to task register */
+#define PPI_FORK_TEP_TEP_Pos (0UL) /*!< Position of TEP field. */
+#define PPI_FORK_TEP_TEP_Msk (0xFFFFFFFFUL << PPI_FORK_TEP_TEP_Pos) /*!< Bit mask of TEP field. */
+
+
+/* Peripheral: RADIO */
+/* Description: 2.4 GHz radio */
+
+/* Register: RADIO_TASKS_TXEN */
+/* Description: Enable RADIO in TX mode */
+
+/* Bit 0 : Enable RADIO in TX mode */
+#define RADIO_TASKS_TXEN_TASKS_TXEN_Pos (0UL) /*!< Position of TASKS_TXEN field. */
+#define RADIO_TASKS_TXEN_TASKS_TXEN_Msk (0x1UL << RADIO_TASKS_TXEN_TASKS_TXEN_Pos) /*!< Bit mask of TASKS_TXEN field. */
+#define RADIO_TASKS_TXEN_TASKS_TXEN_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RADIO_TASKS_RXEN */
+/* Description: Enable RADIO in RX mode */
+
+/* Bit 0 : Enable RADIO in RX mode */
+#define RADIO_TASKS_RXEN_TASKS_RXEN_Pos (0UL) /*!< Position of TASKS_RXEN field. */
+#define RADIO_TASKS_RXEN_TASKS_RXEN_Msk (0x1UL << RADIO_TASKS_RXEN_TASKS_RXEN_Pos) /*!< Bit mask of TASKS_RXEN field. */
+#define RADIO_TASKS_RXEN_TASKS_RXEN_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RADIO_TASKS_START */
+/* Description: Start RADIO */
+
+/* Bit 0 : Start RADIO */
+#define RADIO_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */
+#define RADIO_TASKS_START_TASKS_START_Msk (0x1UL << RADIO_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */
+#define RADIO_TASKS_START_TASKS_START_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RADIO_TASKS_STOP */
+/* Description: Stop RADIO */
+
+/* Bit 0 : Stop RADIO */
+#define RADIO_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define RADIO_TASKS_STOP_TASKS_STOP_Msk (0x1UL << RADIO_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define RADIO_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RADIO_TASKS_DISABLE */
+/* Description: Disable RADIO */
+
+/* Bit 0 : Disable RADIO */
+#define RADIO_TASKS_DISABLE_TASKS_DISABLE_Pos (0UL) /*!< Position of TASKS_DISABLE field. */
+#define RADIO_TASKS_DISABLE_TASKS_DISABLE_Msk (0x1UL << RADIO_TASKS_DISABLE_TASKS_DISABLE_Pos) /*!< Bit mask of TASKS_DISABLE field. */
+#define RADIO_TASKS_DISABLE_TASKS_DISABLE_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RADIO_TASKS_RSSISTART */
+/* Description: Start the RSSI and take one single sample of the receive signal strength */
+
+/* Bit 0 : Start the RSSI and take one single sample of the receive signal strength */
+#define RADIO_TASKS_RSSISTART_TASKS_RSSISTART_Pos (0UL) /*!< Position of TASKS_RSSISTART field. */
+#define RADIO_TASKS_RSSISTART_TASKS_RSSISTART_Msk (0x1UL << RADIO_TASKS_RSSISTART_TASKS_RSSISTART_Pos) /*!< Bit mask of TASKS_RSSISTART field. */
+#define RADIO_TASKS_RSSISTART_TASKS_RSSISTART_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RADIO_TASKS_RSSISTOP */
+/* Description: Stop the RSSI measurement */
+
+/* Bit 0 : Stop the RSSI measurement */
+#define RADIO_TASKS_RSSISTOP_TASKS_RSSISTOP_Pos (0UL) /*!< Position of TASKS_RSSISTOP field. */
+#define RADIO_TASKS_RSSISTOP_TASKS_RSSISTOP_Msk (0x1UL << RADIO_TASKS_RSSISTOP_TASKS_RSSISTOP_Pos) /*!< Bit mask of TASKS_RSSISTOP field. */
+#define RADIO_TASKS_RSSISTOP_TASKS_RSSISTOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RADIO_TASKS_BCSTART */
+/* Description: Start the bit counter */
+
+/* Bit 0 : Start the bit counter */
+#define RADIO_TASKS_BCSTART_TASKS_BCSTART_Pos (0UL) /*!< Position of TASKS_BCSTART field. */
+#define RADIO_TASKS_BCSTART_TASKS_BCSTART_Msk (0x1UL << RADIO_TASKS_BCSTART_TASKS_BCSTART_Pos) /*!< Bit mask of TASKS_BCSTART field. */
+#define RADIO_TASKS_BCSTART_TASKS_BCSTART_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RADIO_TASKS_BCSTOP */
+/* Description: Stop the bit counter */
+
+/* Bit 0 : Stop the bit counter */
+#define RADIO_TASKS_BCSTOP_TASKS_BCSTOP_Pos (0UL) /*!< Position of TASKS_BCSTOP field. */
+#define RADIO_TASKS_BCSTOP_TASKS_BCSTOP_Msk (0x1UL << RADIO_TASKS_BCSTOP_TASKS_BCSTOP_Pos) /*!< Bit mask of TASKS_BCSTOP field. */
+#define RADIO_TASKS_BCSTOP_TASKS_BCSTOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RADIO_EVENTS_READY */
+/* Description: RADIO has ramped up and is ready to be started */
+
+/* Bit 0 : RADIO has ramped up and is ready to be started */
+#define RADIO_EVENTS_READY_EVENTS_READY_Pos (0UL) /*!< Position of EVENTS_READY field. */
+#define RADIO_EVENTS_READY_EVENTS_READY_Msk (0x1UL << RADIO_EVENTS_READY_EVENTS_READY_Pos) /*!< Bit mask of EVENTS_READY field. */
+#define RADIO_EVENTS_READY_EVENTS_READY_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_READY_EVENTS_READY_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_ADDRESS */
+/* Description: Address sent or received */
+
+/* Bit 0 : Address sent or received */
+#define RADIO_EVENTS_ADDRESS_EVENTS_ADDRESS_Pos (0UL) /*!< Position of EVENTS_ADDRESS field. */
+#define RADIO_EVENTS_ADDRESS_EVENTS_ADDRESS_Msk (0x1UL << RADIO_EVENTS_ADDRESS_EVENTS_ADDRESS_Pos) /*!< Bit mask of EVENTS_ADDRESS field. */
+#define RADIO_EVENTS_ADDRESS_EVENTS_ADDRESS_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_ADDRESS_EVENTS_ADDRESS_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_PAYLOAD */
+/* Description: Packet payload sent or received */
+
+/* Bit 0 : Packet payload sent or received */
+#define RADIO_EVENTS_PAYLOAD_EVENTS_PAYLOAD_Pos (0UL) /*!< Position of EVENTS_PAYLOAD field. */
+#define RADIO_EVENTS_PAYLOAD_EVENTS_PAYLOAD_Msk (0x1UL << RADIO_EVENTS_PAYLOAD_EVENTS_PAYLOAD_Pos) /*!< Bit mask of EVENTS_PAYLOAD field. */
+#define RADIO_EVENTS_PAYLOAD_EVENTS_PAYLOAD_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_PAYLOAD_EVENTS_PAYLOAD_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_END */
+/* Description: Packet sent or received */
+
+/* Bit 0 : Packet sent or received */
+#define RADIO_EVENTS_END_EVENTS_END_Pos (0UL) /*!< Position of EVENTS_END field. */
+#define RADIO_EVENTS_END_EVENTS_END_Msk (0x1UL << RADIO_EVENTS_END_EVENTS_END_Pos) /*!< Bit mask of EVENTS_END field. */
+#define RADIO_EVENTS_END_EVENTS_END_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_END_EVENTS_END_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_DISABLED */
+/* Description: RADIO has been disabled */
+
+/* Bit 0 : RADIO has been disabled */
+#define RADIO_EVENTS_DISABLED_EVENTS_DISABLED_Pos (0UL) /*!< Position of EVENTS_DISABLED field. */
+#define RADIO_EVENTS_DISABLED_EVENTS_DISABLED_Msk (0x1UL << RADIO_EVENTS_DISABLED_EVENTS_DISABLED_Pos) /*!< Bit mask of EVENTS_DISABLED field. */
+#define RADIO_EVENTS_DISABLED_EVENTS_DISABLED_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_DISABLED_EVENTS_DISABLED_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_DEVMATCH */
+/* Description: A device address match occurred on the last received packet */
+
+/* Bit 0 : A device address match occurred on the last received packet */
+#define RADIO_EVENTS_DEVMATCH_EVENTS_DEVMATCH_Pos (0UL) /*!< Position of EVENTS_DEVMATCH field. */
+#define RADIO_EVENTS_DEVMATCH_EVENTS_DEVMATCH_Msk (0x1UL << RADIO_EVENTS_DEVMATCH_EVENTS_DEVMATCH_Pos) /*!< Bit mask of EVENTS_DEVMATCH field. */
+#define RADIO_EVENTS_DEVMATCH_EVENTS_DEVMATCH_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_DEVMATCH_EVENTS_DEVMATCH_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_DEVMISS */
+/* Description: No device address match occurred on the last received packet */
+
+/* Bit 0 : No device address match occurred on the last received packet */
+#define RADIO_EVENTS_DEVMISS_EVENTS_DEVMISS_Pos (0UL) /*!< Position of EVENTS_DEVMISS field. */
+#define RADIO_EVENTS_DEVMISS_EVENTS_DEVMISS_Msk (0x1UL << RADIO_EVENTS_DEVMISS_EVENTS_DEVMISS_Pos) /*!< Bit mask of EVENTS_DEVMISS field. */
+#define RADIO_EVENTS_DEVMISS_EVENTS_DEVMISS_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_DEVMISS_EVENTS_DEVMISS_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_RSSIEND */
+/* Description: Sampling of receive signal strength complete */
+
+/* Bit 0 : Sampling of receive signal strength complete */
+#define RADIO_EVENTS_RSSIEND_EVENTS_RSSIEND_Pos (0UL) /*!< Position of EVENTS_RSSIEND field. */
+#define RADIO_EVENTS_RSSIEND_EVENTS_RSSIEND_Msk (0x1UL << RADIO_EVENTS_RSSIEND_EVENTS_RSSIEND_Pos) /*!< Bit mask of EVENTS_RSSIEND field. */
+#define RADIO_EVENTS_RSSIEND_EVENTS_RSSIEND_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_RSSIEND_EVENTS_RSSIEND_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_BCMATCH */
+/* Description: Bit counter reached bit count value */
+
+/* Bit 0 : Bit counter reached bit count value */
+#define RADIO_EVENTS_BCMATCH_EVENTS_BCMATCH_Pos (0UL) /*!< Position of EVENTS_BCMATCH field. */
+#define RADIO_EVENTS_BCMATCH_EVENTS_BCMATCH_Msk (0x1UL << RADIO_EVENTS_BCMATCH_EVENTS_BCMATCH_Pos) /*!< Bit mask of EVENTS_BCMATCH field. */
+#define RADIO_EVENTS_BCMATCH_EVENTS_BCMATCH_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_BCMATCH_EVENTS_BCMATCH_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_CRCOK */
+/* Description: Packet received with CRC ok */
+
+/* Bit 0 : Packet received with CRC ok */
+#define RADIO_EVENTS_CRCOK_EVENTS_CRCOK_Pos (0UL) /*!< Position of EVENTS_CRCOK field. */
+#define RADIO_EVENTS_CRCOK_EVENTS_CRCOK_Msk (0x1UL << RADIO_EVENTS_CRCOK_EVENTS_CRCOK_Pos) /*!< Bit mask of EVENTS_CRCOK field. */
+#define RADIO_EVENTS_CRCOK_EVENTS_CRCOK_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_CRCOK_EVENTS_CRCOK_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_CRCERROR */
+/* Description: Packet received with CRC error */
+
+/* Bit 0 : Packet received with CRC error */
+#define RADIO_EVENTS_CRCERROR_EVENTS_CRCERROR_Pos (0UL) /*!< Position of EVENTS_CRCERROR field. */
+#define RADIO_EVENTS_CRCERROR_EVENTS_CRCERROR_Msk (0x1UL << RADIO_EVENTS_CRCERROR_EVENTS_CRCERROR_Pos) /*!< Bit mask of EVENTS_CRCERROR field. */
+#define RADIO_EVENTS_CRCERROR_EVENTS_CRCERROR_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_CRCERROR_EVENTS_CRCERROR_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_TXREADY */
+/* Description: RADIO has ramped up and is ready to be started TX path */
+
+/* Bit 0 : RADIO has ramped up and is ready to be started TX path */
+#define RADIO_EVENTS_TXREADY_EVENTS_TXREADY_Pos (0UL) /*!< Position of EVENTS_TXREADY field. */
+#define RADIO_EVENTS_TXREADY_EVENTS_TXREADY_Msk (0x1UL << RADIO_EVENTS_TXREADY_EVENTS_TXREADY_Pos) /*!< Bit mask of EVENTS_TXREADY field. */
+#define RADIO_EVENTS_TXREADY_EVENTS_TXREADY_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_TXREADY_EVENTS_TXREADY_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_RXREADY */
+/* Description: RADIO has ramped up and is ready to be started RX path */
+
+/* Bit 0 : RADIO has ramped up and is ready to be started RX path */
+#define RADIO_EVENTS_RXREADY_EVENTS_RXREADY_Pos (0UL) /*!< Position of EVENTS_RXREADY field. */
+#define RADIO_EVENTS_RXREADY_EVENTS_RXREADY_Msk (0x1UL << RADIO_EVENTS_RXREADY_EVENTS_RXREADY_Pos) /*!< Bit mask of EVENTS_RXREADY field. */
+#define RADIO_EVENTS_RXREADY_EVENTS_RXREADY_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_RXREADY_EVENTS_RXREADY_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_MHRMATCH */
+/* Description: MAC header match found */
+
+/* Bit 0 : MAC header match found */
+#define RADIO_EVENTS_MHRMATCH_EVENTS_MHRMATCH_Pos (0UL) /*!< Position of EVENTS_MHRMATCH field. */
+#define RADIO_EVENTS_MHRMATCH_EVENTS_MHRMATCH_Msk (0x1UL << RADIO_EVENTS_MHRMATCH_EVENTS_MHRMATCH_Pos) /*!< Bit mask of EVENTS_MHRMATCH field. */
+#define RADIO_EVENTS_MHRMATCH_EVENTS_MHRMATCH_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_MHRMATCH_EVENTS_MHRMATCH_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_PHYEND */
+/* Description: Generated when last bit is sent on air */
+
+/* Bit 0 : Generated when last bit is sent on air */
+#define RADIO_EVENTS_PHYEND_EVENTS_PHYEND_Pos (0UL) /*!< Position of EVENTS_PHYEND field. */
+#define RADIO_EVENTS_PHYEND_EVENTS_PHYEND_Msk (0x1UL << RADIO_EVENTS_PHYEND_EVENTS_PHYEND_Pos) /*!< Bit mask of EVENTS_PHYEND field. */
+#define RADIO_EVENTS_PHYEND_EVENTS_PHYEND_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_PHYEND_EVENTS_PHYEND_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 21 : Shortcut between event PHYEND and task START */
+#define RADIO_SHORTS_PHYEND_START_Pos (21UL) /*!< Position of PHYEND_START field. */
+#define RADIO_SHORTS_PHYEND_START_Msk (0x1UL << RADIO_SHORTS_PHYEND_START_Pos) /*!< Bit mask of PHYEND_START field. */
+#define RADIO_SHORTS_PHYEND_START_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_PHYEND_START_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 20 : Shortcut between event PHYEND and task DISABLE */
+#define RADIO_SHORTS_PHYEND_DISABLE_Pos (20UL) /*!< Position of PHYEND_DISABLE field. */
+#define RADIO_SHORTS_PHYEND_DISABLE_Msk (0x1UL << RADIO_SHORTS_PHYEND_DISABLE_Pos) /*!< Bit mask of PHYEND_DISABLE field. */
+#define RADIO_SHORTS_PHYEND_DISABLE_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_PHYEND_DISABLE_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 19 : Shortcut between event RXREADY and task START */
+#define RADIO_SHORTS_RXREADY_START_Pos (19UL) /*!< Position of RXREADY_START field. */
+#define RADIO_SHORTS_RXREADY_START_Msk (0x1UL << RADIO_SHORTS_RXREADY_START_Pos) /*!< Bit mask of RXREADY_START field. */
+#define RADIO_SHORTS_RXREADY_START_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_RXREADY_START_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 18 : Shortcut between event TXREADY and task START */
+#define RADIO_SHORTS_TXREADY_START_Pos (18UL) /*!< Position of TXREADY_START field. */
+#define RADIO_SHORTS_TXREADY_START_Msk (0x1UL << RADIO_SHORTS_TXREADY_START_Pos) /*!< Bit mask of TXREADY_START field. */
+#define RADIO_SHORTS_TXREADY_START_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_TXREADY_START_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 8 : Shortcut between event DISABLED and task RSSISTOP */
+#define RADIO_SHORTS_DISABLED_RSSISTOP_Pos (8UL) /*!< Position of DISABLED_RSSISTOP field. */
+#define RADIO_SHORTS_DISABLED_RSSISTOP_Msk (0x1UL << RADIO_SHORTS_DISABLED_RSSISTOP_Pos) /*!< Bit mask of DISABLED_RSSISTOP field. */
+#define RADIO_SHORTS_DISABLED_RSSISTOP_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_DISABLED_RSSISTOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 6 : Shortcut between event ADDRESS and task BCSTART */
+#define RADIO_SHORTS_ADDRESS_BCSTART_Pos (6UL) /*!< Position of ADDRESS_BCSTART field. */
+#define RADIO_SHORTS_ADDRESS_BCSTART_Msk (0x1UL << RADIO_SHORTS_ADDRESS_BCSTART_Pos) /*!< Bit mask of ADDRESS_BCSTART field. */
+#define RADIO_SHORTS_ADDRESS_BCSTART_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_ADDRESS_BCSTART_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 5 : Shortcut between event END and task START */
+#define RADIO_SHORTS_END_START_Pos (5UL) /*!< Position of END_START field. */
+#define RADIO_SHORTS_END_START_Msk (0x1UL << RADIO_SHORTS_END_START_Pos) /*!< Bit mask of END_START field. */
+#define RADIO_SHORTS_END_START_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_END_START_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 4 : Shortcut between event ADDRESS and task RSSISTART */
+#define RADIO_SHORTS_ADDRESS_RSSISTART_Pos (4UL) /*!< Position of ADDRESS_RSSISTART field. */
+#define RADIO_SHORTS_ADDRESS_RSSISTART_Msk (0x1UL << RADIO_SHORTS_ADDRESS_RSSISTART_Pos) /*!< Bit mask of ADDRESS_RSSISTART field. */
+#define RADIO_SHORTS_ADDRESS_RSSISTART_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_ADDRESS_RSSISTART_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 3 : Shortcut between event DISABLED and task RXEN */
+#define RADIO_SHORTS_DISABLED_RXEN_Pos (3UL) /*!< Position of DISABLED_RXEN field. */
+#define RADIO_SHORTS_DISABLED_RXEN_Msk (0x1UL << RADIO_SHORTS_DISABLED_RXEN_Pos) /*!< Bit mask of DISABLED_RXEN field. */
+#define RADIO_SHORTS_DISABLED_RXEN_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_DISABLED_RXEN_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 2 : Shortcut between event DISABLED and task TXEN */
+#define RADIO_SHORTS_DISABLED_TXEN_Pos (2UL) /*!< Position of DISABLED_TXEN field. */
+#define RADIO_SHORTS_DISABLED_TXEN_Msk (0x1UL << RADIO_SHORTS_DISABLED_TXEN_Pos) /*!< Bit mask of DISABLED_TXEN field. */
+#define RADIO_SHORTS_DISABLED_TXEN_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_DISABLED_TXEN_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 1 : Shortcut between event END and task DISABLE */
+#define RADIO_SHORTS_END_DISABLE_Pos (1UL) /*!< Position of END_DISABLE field. */
+#define RADIO_SHORTS_END_DISABLE_Msk (0x1UL << RADIO_SHORTS_END_DISABLE_Pos) /*!< Bit mask of END_DISABLE field. */
+#define RADIO_SHORTS_END_DISABLE_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_END_DISABLE_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 0 : Shortcut between event READY and task START */
+#define RADIO_SHORTS_READY_START_Pos (0UL) /*!< Position of READY_START field. */
+#define RADIO_SHORTS_READY_START_Msk (0x1UL << RADIO_SHORTS_READY_START_Pos) /*!< Bit mask of READY_START field. */
+#define RADIO_SHORTS_READY_START_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_READY_START_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: RADIO_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 27 : Write '1' to enable interrupt for event PHYEND */
+#define RADIO_INTENSET_PHYEND_Pos (27UL) /*!< Position of PHYEND field. */
+#define RADIO_INTENSET_PHYEND_Msk (0x1UL << RADIO_INTENSET_PHYEND_Pos) /*!< Bit mask of PHYEND field. */
+#define RADIO_INTENSET_PHYEND_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_PHYEND_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_PHYEND_Set (1UL) /*!< Enable */
+
+/* Bit 23 : Write '1' to enable interrupt for event MHRMATCH */
+#define RADIO_INTENSET_MHRMATCH_Pos (23UL) /*!< Position of MHRMATCH field. */
+#define RADIO_INTENSET_MHRMATCH_Msk (0x1UL << RADIO_INTENSET_MHRMATCH_Pos) /*!< Bit mask of MHRMATCH field. */
+#define RADIO_INTENSET_MHRMATCH_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_MHRMATCH_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_MHRMATCH_Set (1UL) /*!< Enable */
+
+/* Bit 22 : Write '1' to enable interrupt for event RXREADY */
+#define RADIO_INTENSET_RXREADY_Pos (22UL) /*!< Position of RXREADY field. */
+#define RADIO_INTENSET_RXREADY_Msk (0x1UL << RADIO_INTENSET_RXREADY_Pos) /*!< Bit mask of RXREADY field. */
+#define RADIO_INTENSET_RXREADY_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_RXREADY_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_RXREADY_Set (1UL) /*!< Enable */
+
+/* Bit 21 : Write '1' to enable interrupt for event TXREADY */
+#define RADIO_INTENSET_TXREADY_Pos (21UL) /*!< Position of TXREADY field. */
+#define RADIO_INTENSET_TXREADY_Msk (0x1UL << RADIO_INTENSET_TXREADY_Pos) /*!< Bit mask of TXREADY field. */
+#define RADIO_INTENSET_TXREADY_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_TXREADY_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_TXREADY_Set (1UL) /*!< Enable */
+
+/* Bit 13 : Write '1' to enable interrupt for event CRCERROR */
+#define RADIO_INTENSET_CRCERROR_Pos (13UL) /*!< Position of CRCERROR field. */
+#define RADIO_INTENSET_CRCERROR_Msk (0x1UL << RADIO_INTENSET_CRCERROR_Pos) /*!< Bit mask of CRCERROR field. */
+#define RADIO_INTENSET_CRCERROR_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_CRCERROR_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_CRCERROR_Set (1UL) /*!< Enable */
+
+/* Bit 12 : Write '1' to enable interrupt for event CRCOK */
+#define RADIO_INTENSET_CRCOK_Pos (12UL) /*!< Position of CRCOK field. */
+#define RADIO_INTENSET_CRCOK_Msk (0x1UL << RADIO_INTENSET_CRCOK_Pos) /*!< Bit mask of CRCOK field. */
+#define RADIO_INTENSET_CRCOK_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_CRCOK_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_CRCOK_Set (1UL) /*!< Enable */
+
+/* Bit 10 : Write '1' to enable interrupt for event BCMATCH */
+#define RADIO_INTENSET_BCMATCH_Pos (10UL) /*!< Position of BCMATCH field. */
+#define RADIO_INTENSET_BCMATCH_Msk (0x1UL << RADIO_INTENSET_BCMATCH_Pos) /*!< Bit mask of BCMATCH field. */
+#define RADIO_INTENSET_BCMATCH_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_BCMATCH_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_BCMATCH_Set (1UL) /*!< Enable */
+
+/* Bit 7 : Write '1' to enable interrupt for event RSSIEND */
+#define RADIO_INTENSET_RSSIEND_Pos (7UL) /*!< Position of RSSIEND field. */
+#define RADIO_INTENSET_RSSIEND_Msk (0x1UL << RADIO_INTENSET_RSSIEND_Pos) /*!< Bit mask of RSSIEND field. */
+#define RADIO_INTENSET_RSSIEND_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_RSSIEND_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_RSSIEND_Set (1UL) /*!< Enable */
+
+/* Bit 6 : Write '1' to enable interrupt for event DEVMISS */
+#define RADIO_INTENSET_DEVMISS_Pos (6UL) /*!< Position of DEVMISS field. */
+#define RADIO_INTENSET_DEVMISS_Msk (0x1UL << RADIO_INTENSET_DEVMISS_Pos) /*!< Bit mask of DEVMISS field. */
+#define RADIO_INTENSET_DEVMISS_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_DEVMISS_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_DEVMISS_Set (1UL) /*!< Enable */
+
+/* Bit 5 : Write '1' to enable interrupt for event DEVMATCH */
+#define RADIO_INTENSET_DEVMATCH_Pos (5UL) /*!< Position of DEVMATCH field. */
+#define RADIO_INTENSET_DEVMATCH_Msk (0x1UL << RADIO_INTENSET_DEVMATCH_Pos) /*!< Bit mask of DEVMATCH field. */
+#define RADIO_INTENSET_DEVMATCH_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_DEVMATCH_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_DEVMATCH_Set (1UL) /*!< Enable */
+
+/* Bit 4 : Write '1' to enable interrupt for event DISABLED */
+#define RADIO_INTENSET_DISABLED_Pos (4UL) /*!< Position of DISABLED field. */
+#define RADIO_INTENSET_DISABLED_Msk (0x1UL << RADIO_INTENSET_DISABLED_Pos) /*!< Bit mask of DISABLED field. */
+#define RADIO_INTENSET_DISABLED_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_DISABLED_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_DISABLED_Set (1UL) /*!< Enable */
+
+/* Bit 3 : Write '1' to enable interrupt for event END */
+#define RADIO_INTENSET_END_Pos (3UL) /*!< Position of END field. */
+#define RADIO_INTENSET_END_Msk (0x1UL << RADIO_INTENSET_END_Pos) /*!< Bit mask of END field. */
+#define RADIO_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_END_Set (1UL) /*!< Enable */
+
+/* Bit 2 : Write '1' to enable interrupt for event PAYLOAD */
+#define RADIO_INTENSET_PAYLOAD_Pos (2UL) /*!< Position of PAYLOAD field. */
+#define RADIO_INTENSET_PAYLOAD_Msk (0x1UL << RADIO_INTENSET_PAYLOAD_Pos) /*!< Bit mask of PAYLOAD field. */
+#define RADIO_INTENSET_PAYLOAD_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_PAYLOAD_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_PAYLOAD_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event ADDRESS */
+#define RADIO_INTENSET_ADDRESS_Pos (1UL) /*!< Position of ADDRESS field. */
+#define RADIO_INTENSET_ADDRESS_Msk (0x1UL << RADIO_INTENSET_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */
+#define RADIO_INTENSET_ADDRESS_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_ADDRESS_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_ADDRESS_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event READY */
+#define RADIO_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */
+#define RADIO_INTENSET_READY_Msk (0x1UL << RADIO_INTENSET_READY_Pos) /*!< Bit mask of READY field. */
+#define RADIO_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_READY_Set (1UL) /*!< Enable */
+
+/* Register: RADIO_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 27 : Write '1' to disable interrupt for event PHYEND */
+#define RADIO_INTENCLR_PHYEND_Pos (27UL) /*!< Position of PHYEND field. */
+#define RADIO_INTENCLR_PHYEND_Msk (0x1UL << RADIO_INTENCLR_PHYEND_Pos) /*!< Bit mask of PHYEND field. */
+#define RADIO_INTENCLR_PHYEND_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_PHYEND_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_PHYEND_Clear (1UL) /*!< Disable */
+
+/* Bit 23 : Write '1' to disable interrupt for event MHRMATCH */
+#define RADIO_INTENCLR_MHRMATCH_Pos (23UL) /*!< Position of MHRMATCH field. */
+#define RADIO_INTENCLR_MHRMATCH_Msk (0x1UL << RADIO_INTENCLR_MHRMATCH_Pos) /*!< Bit mask of MHRMATCH field. */
+#define RADIO_INTENCLR_MHRMATCH_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_MHRMATCH_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_MHRMATCH_Clear (1UL) /*!< Disable */
+
+/* Bit 22 : Write '1' to disable interrupt for event RXREADY */
+#define RADIO_INTENCLR_RXREADY_Pos (22UL) /*!< Position of RXREADY field. */
+#define RADIO_INTENCLR_RXREADY_Msk (0x1UL << RADIO_INTENCLR_RXREADY_Pos) /*!< Bit mask of RXREADY field. */
+#define RADIO_INTENCLR_RXREADY_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_RXREADY_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_RXREADY_Clear (1UL) /*!< Disable */
+
+/* Bit 21 : Write '1' to disable interrupt for event TXREADY */
+#define RADIO_INTENCLR_TXREADY_Pos (21UL) /*!< Position of TXREADY field. */
+#define RADIO_INTENCLR_TXREADY_Msk (0x1UL << RADIO_INTENCLR_TXREADY_Pos) /*!< Bit mask of TXREADY field. */
+#define RADIO_INTENCLR_TXREADY_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_TXREADY_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_TXREADY_Clear (1UL) /*!< Disable */
+
+/* Bit 13 : Write '1' to disable interrupt for event CRCERROR */
+#define RADIO_INTENCLR_CRCERROR_Pos (13UL) /*!< Position of CRCERROR field. */
+#define RADIO_INTENCLR_CRCERROR_Msk (0x1UL << RADIO_INTENCLR_CRCERROR_Pos) /*!< Bit mask of CRCERROR field. */
+#define RADIO_INTENCLR_CRCERROR_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_CRCERROR_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_CRCERROR_Clear (1UL) /*!< Disable */
+
+/* Bit 12 : Write '1' to disable interrupt for event CRCOK */
+#define RADIO_INTENCLR_CRCOK_Pos (12UL) /*!< Position of CRCOK field. */
+#define RADIO_INTENCLR_CRCOK_Msk (0x1UL << RADIO_INTENCLR_CRCOK_Pos) /*!< Bit mask of CRCOK field. */
+#define RADIO_INTENCLR_CRCOK_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_CRCOK_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_CRCOK_Clear (1UL) /*!< Disable */
+
+/* Bit 10 : Write '1' to disable interrupt for event BCMATCH */
+#define RADIO_INTENCLR_BCMATCH_Pos (10UL) /*!< Position of BCMATCH field. */
+#define RADIO_INTENCLR_BCMATCH_Msk (0x1UL << RADIO_INTENCLR_BCMATCH_Pos) /*!< Bit mask of BCMATCH field. */
+#define RADIO_INTENCLR_BCMATCH_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_BCMATCH_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_BCMATCH_Clear (1UL) /*!< Disable */
+
+/* Bit 7 : Write '1' to disable interrupt for event RSSIEND */
+#define RADIO_INTENCLR_RSSIEND_Pos (7UL) /*!< Position of RSSIEND field. */
+#define RADIO_INTENCLR_RSSIEND_Msk (0x1UL << RADIO_INTENCLR_RSSIEND_Pos) /*!< Bit mask of RSSIEND field. */
+#define RADIO_INTENCLR_RSSIEND_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_RSSIEND_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_RSSIEND_Clear (1UL) /*!< Disable */
+
+/* Bit 6 : Write '1' to disable interrupt for event DEVMISS */
+#define RADIO_INTENCLR_DEVMISS_Pos (6UL) /*!< Position of DEVMISS field. */
+#define RADIO_INTENCLR_DEVMISS_Msk (0x1UL << RADIO_INTENCLR_DEVMISS_Pos) /*!< Bit mask of DEVMISS field. */
+#define RADIO_INTENCLR_DEVMISS_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_DEVMISS_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_DEVMISS_Clear (1UL) /*!< Disable */
+
+/* Bit 5 : Write '1' to disable interrupt for event DEVMATCH */
+#define RADIO_INTENCLR_DEVMATCH_Pos (5UL) /*!< Position of DEVMATCH field. */
+#define RADIO_INTENCLR_DEVMATCH_Msk (0x1UL << RADIO_INTENCLR_DEVMATCH_Pos) /*!< Bit mask of DEVMATCH field. */
+#define RADIO_INTENCLR_DEVMATCH_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_DEVMATCH_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_DEVMATCH_Clear (1UL) /*!< Disable */
+
+/* Bit 4 : Write '1' to disable interrupt for event DISABLED */
+#define RADIO_INTENCLR_DISABLED_Pos (4UL) /*!< Position of DISABLED field. */
+#define RADIO_INTENCLR_DISABLED_Msk (0x1UL << RADIO_INTENCLR_DISABLED_Pos) /*!< Bit mask of DISABLED field. */
+#define RADIO_INTENCLR_DISABLED_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_DISABLED_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_DISABLED_Clear (1UL) /*!< Disable */
+
+/* Bit 3 : Write '1' to disable interrupt for event END */
+#define RADIO_INTENCLR_END_Pos (3UL) /*!< Position of END field. */
+#define RADIO_INTENCLR_END_Msk (0x1UL << RADIO_INTENCLR_END_Pos) /*!< Bit mask of END field. */
+#define RADIO_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_END_Clear (1UL) /*!< Disable */
+
+/* Bit 2 : Write '1' to disable interrupt for event PAYLOAD */
+#define RADIO_INTENCLR_PAYLOAD_Pos (2UL) /*!< Position of PAYLOAD field. */
+#define RADIO_INTENCLR_PAYLOAD_Msk (0x1UL << RADIO_INTENCLR_PAYLOAD_Pos) /*!< Bit mask of PAYLOAD field. */
+#define RADIO_INTENCLR_PAYLOAD_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_PAYLOAD_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_PAYLOAD_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event ADDRESS */
+#define RADIO_INTENCLR_ADDRESS_Pos (1UL) /*!< Position of ADDRESS field. */
+#define RADIO_INTENCLR_ADDRESS_Msk (0x1UL << RADIO_INTENCLR_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */
+#define RADIO_INTENCLR_ADDRESS_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_ADDRESS_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_ADDRESS_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event READY */
+#define RADIO_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */
+#define RADIO_INTENCLR_READY_Msk (0x1UL << RADIO_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */
+#define RADIO_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_READY_Clear (1UL) /*!< Disable */
+
+/* Register: RADIO_CRCSTATUS */
+/* Description: CRC status */
+
+/* Bit 0 : CRC status of packet received */
+#define RADIO_CRCSTATUS_CRCSTATUS_Pos (0UL) /*!< Position of CRCSTATUS field. */
+#define RADIO_CRCSTATUS_CRCSTATUS_Msk (0x1UL << RADIO_CRCSTATUS_CRCSTATUS_Pos) /*!< Bit mask of CRCSTATUS field. */
+#define RADIO_CRCSTATUS_CRCSTATUS_CRCError (0UL) /*!< Packet received with CRC error */
+#define RADIO_CRCSTATUS_CRCSTATUS_CRCOk (1UL) /*!< Packet received with CRC ok */
+
+/* Register: RADIO_RXMATCH */
+/* Description: Received address */
+
+/* Bits 2..0 : Received address */
+#define RADIO_RXMATCH_RXMATCH_Pos (0UL) /*!< Position of RXMATCH field. */
+#define RADIO_RXMATCH_RXMATCH_Msk (0x7UL << RADIO_RXMATCH_RXMATCH_Pos) /*!< Bit mask of RXMATCH field. */
+
+/* Register: RADIO_RXCRC */
+/* Description: CRC field of previously received packet */
+
+/* Bits 23..0 : CRC field of previously received packet */
+#define RADIO_RXCRC_RXCRC_Pos (0UL) /*!< Position of RXCRC field. */
+#define RADIO_RXCRC_RXCRC_Msk (0xFFFFFFUL << RADIO_RXCRC_RXCRC_Pos) /*!< Bit mask of RXCRC field. */
+
+/* Register: RADIO_DAI */
+/* Description: Device address match index */
+
+/* Bits 2..0 : Device address match index */
+#define RADIO_DAI_DAI_Pos (0UL) /*!< Position of DAI field. */
+#define RADIO_DAI_DAI_Msk (0x7UL << RADIO_DAI_DAI_Pos) /*!< Bit mask of DAI field. */
+
+/* Register: RADIO_PDUSTAT */
+/* Description: Payload status */
+
+/* Bit 0 : Status on payload length vs. PCNF1.MAXLEN */
+#define RADIO_PDUSTAT_PDUSTAT_Pos (0UL) /*!< Position of PDUSTAT field. */
+#define RADIO_PDUSTAT_PDUSTAT_Msk (0x1UL << RADIO_PDUSTAT_PDUSTAT_Pos) /*!< Bit mask of PDUSTAT field. */
+#define RADIO_PDUSTAT_PDUSTAT_LessThan (0UL) /*!< Payload less than PCNF1.MAXLEN */
+#define RADIO_PDUSTAT_PDUSTAT_GreaterThan (1UL) /*!< Payload greater than PCNF1.MAXLEN */
+
+/* Register: RADIO_PACKETPTR */
+/* Description: Packet pointer */
+
+/* Bits 31..0 : Packet pointer */
+#define RADIO_PACKETPTR_PACKETPTR_Pos (0UL) /*!< Position of PACKETPTR field. */
+#define RADIO_PACKETPTR_PACKETPTR_Msk (0xFFFFFFFFUL << RADIO_PACKETPTR_PACKETPTR_Pos) /*!< Bit mask of PACKETPTR field. */
+
+/* Register: RADIO_FREQUENCY */
+/* Description: Frequency */
+
+/* Bit 8 : Channel map selection. */
+#define RADIO_FREQUENCY_MAP_Pos (8UL) /*!< Position of MAP field. */
+#define RADIO_FREQUENCY_MAP_Msk (0x1UL << RADIO_FREQUENCY_MAP_Pos) /*!< Bit mask of MAP field. */
+#define RADIO_FREQUENCY_MAP_Default (0UL) /*!< Channel map between 2400 MHZ .. 2500 MHz */
+#define RADIO_FREQUENCY_MAP_Low (1UL) /*!< Channel map between 2360 MHZ .. 2460 MHz */
+
+/* Bits 6..0 : Radio channel frequency */
+#define RADIO_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */
+#define RADIO_FREQUENCY_FREQUENCY_Msk (0x7FUL << RADIO_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */
+
+/* Register: RADIO_TXPOWER */
+/* Description: Output power */
+
+/* Bits 7..0 : RADIO output power */
+#define RADIO_TXPOWER_TXPOWER_Pos (0UL) /*!< Position of TXPOWER field. */
+#define RADIO_TXPOWER_TXPOWER_Msk (0xFFUL << RADIO_TXPOWER_TXPOWER_Pos) /*!< Bit mask of TXPOWER field. */
+#define RADIO_TXPOWER_TXPOWER_0dBm (0x0UL) /*!< 0 dBm */
+#define RADIO_TXPOWER_TXPOWER_Pos3dBm (0x3UL) /*!< +3 dBm */
+#define RADIO_TXPOWER_TXPOWER_Pos4dBm (0x4UL) /*!< +4 dBm */
+#define RADIO_TXPOWER_TXPOWER_Neg40dBm (0xD8UL) /*!< -40 dBm */
+#define RADIO_TXPOWER_TXPOWER_Neg30dBm (0xE2UL) /*!< Deprecated enumerator - -40 dBm */
+#define RADIO_TXPOWER_TXPOWER_Neg20dBm (0xECUL) /*!< -20 dBm */
+#define RADIO_TXPOWER_TXPOWER_Neg16dBm (0xF0UL) /*!< -16 dBm */
+#define RADIO_TXPOWER_TXPOWER_Neg12dBm (0xF4UL) /*!< -12 dBm */
+#define RADIO_TXPOWER_TXPOWER_Neg8dBm (0xF8UL) /*!< -8 dBm */
+#define RADIO_TXPOWER_TXPOWER_Neg4dBm (0xFCUL) /*!< -4 dBm */
+
+/* Register: RADIO_MODE */
+/* Description: Data rate and modulation */
+
+/* Bits 3..0 : Radio data rate and modulation setting. The radio supports frequency-shift keying (FSK) modulation. */
+#define RADIO_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */
+#define RADIO_MODE_MODE_Msk (0xFUL << RADIO_MODE_MODE_Pos) /*!< Bit mask of MODE field. */
+#define RADIO_MODE_MODE_Nrf_1Mbit (0UL) /*!< 1 Mbps Nordic proprietary radio mode */
+#define RADIO_MODE_MODE_Nrf_2Mbit (1UL) /*!< 2 Mbps Nordic proprietary radio mode */
+#define RADIO_MODE_MODE_Ble_1Mbit (3UL) /*!< 1 Mbps BLE */
+#define RADIO_MODE_MODE_Ble_2Mbit (4UL) /*!< 2 Mbps BLE */
+
+/* Register: RADIO_PCNF0 */
+/* Description: Packet configuration register 0 */
+
+/* Bit 26 : Indicates if LENGTH field contains CRC or not */
+#define RADIO_PCNF0_CRCINC_Pos (26UL) /*!< Position of CRCINC field. */
+#define RADIO_PCNF0_CRCINC_Msk (0x1UL << RADIO_PCNF0_CRCINC_Pos) /*!< Bit mask of CRCINC field. */
+#define RADIO_PCNF0_CRCINC_Exclude (0UL) /*!< LENGTH does not contain CRC */
+#define RADIO_PCNF0_CRCINC_Include (1UL) /*!< LENGTH includes CRC */
+
+/* Bits 25..24 : Length of preamble on air. Decision point: TASKS_START task */
+#define RADIO_PCNF0_PLEN_Pos (24UL) /*!< Position of PLEN field. */
+#define RADIO_PCNF0_PLEN_Msk (0x3UL << RADIO_PCNF0_PLEN_Pos) /*!< Bit mask of PLEN field. */
+#define RADIO_PCNF0_PLEN_8bit (0UL) /*!< 8-bit preamble */
+#define RADIO_PCNF0_PLEN_16bit (1UL) /*!< 16-bit preamble */
+
+/* Bit 20 : Include or exclude S1 field in RAM */
+#define RADIO_PCNF0_S1INCL_Pos (20UL) /*!< Position of S1INCL field. */
+#define RADIO_PCNF0_S1INCL_Msk (0x1UL << RADIO_PCNF0_S1INCL_Pos) /*!< Bit mask of S1INCL field. */
+#define RADIO_PCNF0_S1INCL_Automatic (0UL) /*!< Include S1 field in RAM only if S1LEN > 0 */
+#define RADIO_PCNF0_S1INCL_Include (1UL) /*!< Always include S1 field in RAM independent of S1LEN */
+
+/* Bits 19..16 : Length on air of S1 field in number of bits. */
+#define RADIO_PCNF0_S1LEN_Pos (16UL) /*!< Position of S1LEN field. */
+#define RADIO_PCNF0_S1LEN_Msk (0xFUL << RADIO_PCNF0_S1LEN_Pos) /*!< Bit mask of S1LEN field. */
+
+/* Bit 8 : Length on air of S0 field in number of bytes. */
+#define RADIO_PCNF0_S0LEN_Pos (8UL) /*!< Position of S0LEN field. */
+#define RADIO_PCNF0_S0LEN_Msk (0x1UL << RADIO_PCNF0_S0LEN_Pos) /*!< Bit mask of S0LEN field. */
+
+/* Bits 3..0 : Length on air of LENGTH field in number of bits. */
+#define RADIO_PCNF0_LFLEN_Pos (0UL) /*!< Position of LFLEN field. */
+#define RADIO_PCNF0_LFLEN_Msk (0xFUL << RADIO_PCNF0_LFLEN_Pos) /*!< Bit mask of LFLEN field. */
+
+/* Register: RADIO_PCNF1 */
+/* Description: Packet configuration register 1 */
+
+/* Bit 25 : Enable or disable packet whitening */
+#define RADIO_PCNF1_WHITEEN_Pos (25UL) /*!< Position of WHITEEN field. */
+#define RADIO_PCNF1_WHITEEN_Msk (0x1UL << RADIO_PCNF1_WHITEEN_Pos) /*!< Bit mask of WHITEEN field. */
+#define RADIO_PCNF1_WHITEEN_Disabled (0UL) /*!< Disable */
+#define RADIO_PCNF1_WHITEEN_Enabled (1UL) /*!< Enable */
+
+/* Bit 24 : On-air endianness of packet, this applies to the S0, LENGTH, S1, and the PAYLOAD fields. */
+#define RADIO_PCNF1_ENDIAN_Pos (24UL) /*!< Position of ENDIAN field. */
+#define RADIO_PCNF1_ENDIAN_Msk (0x1UL << RADIO_PCNF1_ENDIAN_Pos) /*!< Bit mask of ENDIAN field. */
+#define RADIO_PCNF1_ENDIAN_Little (0UL) /*!< Least significant bit on air first */
+#define RADIO_PCNF1_ENDIAN_Big (1UL) /*!< Most significant bit on air first */
+
+/* Bits 18..16 : Base address length in number of bytes */
+#define RADIO_PCNF1_BALEN_Pos (16UL) /*!< Position of BALEN field. */
+#define RADIO_PCNF1_BALEN_Msk (0x7UL << RADIO_PCNF1_BALEN_Pos) /*!< Bit mask of BALEN field. */
+
+/* Bits 15..8 : Static length in number of bytes */
+#define RADIO_PCNF1_STATLEN_Pos (8UL) /*!< Position of STATLEN field. */
+#define RADIO_PCNF1_STATLEN_Msk (0xFFUL << RADIO_PCNF1_STATLEN_Pos) /*!< Bit mask of STATLEN field. */
+
+/* Bits 7..0 : Maximum length of packet payload. If the packet payload is larger than MAXLEN, the radio will truncate the payload to MAXLEN. */
+#define RADIO_PCNF1_MAXLEN_Pos (0UL) /*!< Position of MAXLEN field. */
+#define RADIO_PCNF1_MAXLEN_Msk (0xFFUL << RADIO_PCNF1_MAXLEN_Pos) /*!< Bit mask of MAXLEN field. */
+
+/* Register: RADIO_BASE0 */
+/* Description: Base address 0 */
+
+/* Bits 31..0 : Base address 0 */
+#define RADIO_BASE0_BASE0_Pos (0UL) /*!< Position of BASE0 field. */
+#define RADIO_BASE0_BASE0_Msk (0xFFFFFFFFUL << RADIO_BASE0_BASE0_Pos) /*!< Bit mask of BASE0 field. */
+
+/* Register: RADIO_BASE1 */
+/* Description: Base address 1 */
+
+/* Bits 31..0 : Base address 1 */
+#define RADIO_BASE1_BASE1_Pos (0UL) /*!< Position of BASE1 field. */
+#define RADIO_BASE1_BASE1_Msk (0xFFFFFFFFUL << RADIO_BASE1_BASE1_Pos) /*!< Bit mask of BASE1 field. */
+
+/* Register: RADIO_PREFIX0 */
+/* Description: Prefixes bytes for logical addresses 0-3 */
+
+/* Bits 31..24 : Address prefix 3. */
+#define RADIO_PREFIX0_AP3_Pos (24UL) /*!< Position of AP3 field. */
+#define RADIO_PREFIX0_AP3_Msk (0xFFUL << RADIO_PREFIX0_AP3_Pos) /*!< Bit mask of AP3 field. */
+
+/* Bits 23..16 : Address prefix 2. */
+#define RADIO_PREFIX0_AP2_Pos (16UL) /*!< Position of AP2 field. */
+#define RADIO_PREFIX0_AP2_Msk (0xFFUL << RADIO_PREFIX0_AP2_Pos) /*!< Bit mask of AP2 field. */
+
+/* Bits 15..8 : Address prefix 1. */
+#define RADIO_PREFIX0_AP1_Pos (8UL) /*!< Position of AP1 field. */
+#define RADIO_PREFIX0_AP1_Msk (0xFFUL << RADIO_PREFIX0_AP1_Pos) /*!< Bit mask of AP1 field. */
+
+/* Bits 7..0 : Address prefix 0. */
+#define RADIO_PREFIX0_AP0_Pos (0UL) /*!< Position of AP0 field. */
+#define RADIO_PREFIX0_AP0_Msk (0xFFUL << RADIO_PREFIX0_AP0_Pos) /*!< Bit mask of AP0 field. */
+
+/* Register: RADIO_PREFIX1 */
+/* Description: Prefixes bytes for logical addresses 4-7 */
+
+/* Bits 31..24 : Address prefix 7. */
+#define RADIO_PREFIX1_AP7_Pos (24UL) /*!< Position of AP7 field. */
+#define RADIO_PREFIX1_AP7_Msk (0xFFUL << RADIO_PREFIX1_AP7_Pos) /*!< Bit mask of AP7 field. */
+
+/* Bits 23..16 : Address prefix 6. */
+#define RADIO_PREFIX1_AP6_Pos (16UL) /*!< Position of AP6 field. */
+#define RADIO_PREFIX1_AP6_Msk (0xFFUL << RADIO_PREFIX1_AP6_Pos) /*!< Bit mask of AP6 field. */
+
+/* Bits 15..8 : Address prefix 5. */
+#define RADIO_PREFIX1_AP5_Pos (8UL) /*!< Position of AP5 field. */
+#define RADIO_PREFIX1_AP5_Msk (0xFFUL << RADIO_PREFIX1_AP5_Pos) /*!< Bit mask of AP5 field. */
+
+/* Bits 7..0 : Address prefix 4. */
+#define RADIO_PREFIX1_AP4_Pos (0UL) /*!< Position of AP4 field. */
+#define RADIO_PREFIX1_AP4_Msk (0xFFUL << RADIO_PREFIX1_AP4_Pos) /*!< Bit mask of AP4 field. */
+
+/* Register: RADIO_TXADDRESS */
+/* Description: Transmit address select */
+
+/* Bits 2..0 : Transmit address select */
+#define RADIO_TXADDRESS_TXADDRESS_Pos (0UL) /*!< Position of TXADDRESS field. */
+#define RADIO_TXADDRESS_TXADDRESS_Msk (0x7UL << RADIO_TXADDRESS_TXADDRESS_Pos) /*!< Bit mask of TXADDRESS field. */
+
+/* Register: RADIO_RXADDRESSES */
+/* Description: Receive address select */
+
+/* Bit 7 : Enable or disable reception on logical address 7. */
+#define RADIO_RXADDRESSES_ADDR7_Pos (7UL) /*!< Position of ADDR7 field. */
+#define RADIO_RXADDRESSES_ADDR7_Msk (0x1UL << RADIO_RXADDRESSES_ADDR7_Pos) /*!< Bit mask of ADDR7 field. */
+#define RADIO_RXADDRESSES_ADDR7_Disabled (0UL) /*!< Disable */
+#define RADIO_RXADDRESSES_ADDR7_Enabled (1UL) /*!< Enable */
+
+/* Bit 6 : Enable or disable reception on logical address 6. */
+#define RADIO_RXADDRESSES_ADDR6_Pos (6UL) /*!< Position of ADDR6 field. */
+#define RADIO_RXADDRESSES_ADDR6_Msk (0x1UL << RADIO_RXADDRESSES_ADDR6_Pos) /*!< Bit mask of ADDR6 field. */
+#define RADIO_RXADDRESSES_ADDR6_Disabled (0UL) /*!< Disable */
+#define RADIO_RXADDRESSES_ADDR6_Enabled (1UL) /*!< Enable */
+
+/* Bit 5 : Enable or disable reception on logical address 5. */
+#define RADIO_RXADDRESSES_ADDR5_Pos (5UL) /*!< Position of ADDR5 field. */
+#define RADIO_RXADDRESSES_ADDR5_Msk (0x1UL << RADIO_RXADDRESSES_ADDR5_Pos) /*!< Bit mask of ADDR5 field. */
+#define RADIO_RXADDRESSES_ADDR5_Disabled (0UL) /*!< Disable */
+#define RADIO_RXADDRESSES_ADDR5_Enabled (1UL) /*!< Enable */
+
+/* Bit 4 : Enable or disable reception on logical address 4. */
+#define RADIO_RXADDRESSES_ADDR4_Pos (4UL) /*!< Position of ADDR4 field. */
+#define RADIO_RXADDRESSES_ADDR4_Msk (0x1UL << RADIO_RXADDRESSES_ADDR4_Pos) /*!< Bit mask of ADDR4 field. */
+#define RADIO_RXADDRESSES_ADDR4_Disabled (0UL) /*!< Disable */
+#define RADIO_RXADDRESSES_ADDR4_Enabled (1UL) /*!< Enable */
+
+/* Bit 3 : Enable or disable reception on logical address 3. */
+#define RADIO_RXADDRESSES_ADDR3_Pos (3UL) /*!< Position of ADDR3 field. */
+#define RADIO_RXADDRESSES_ADDR3_Msk (0x1UL << RADIO_RXADDRESSES_ADDR3_Pos) /*!< Bit mask of ADDR3 field. */
+#define RADIO_RXADDRESSES_ADDR3_Disabled (0UL) /*!< Disable */
+#define RADIO_RXADDRESSES_ADDR3_Enabled (1UL) /*!< Enable */
+
+/* Bit 2 : Enable or disable reception on logical address 2. */
+#define RADIO_RXADDRESSES_ADDR2_Pos (2UL) /*!< Position of ADDR2 field. */
+#define RADIO_RXADDRESSES_ADDR2_Msk (0x1UL << RADIO_RXADDRESSES_ADDR2_Pos) /*!< Bit mask of ADDR2 field. */
+#define RADIO_RXADDRESSES_ADDR2_Disabled (0UL) /*!< Disable */
+#define RADIO_RXADDRESSES_ADDR2_Enabled (1UL) /*!< Enable */
+
+/* Bit 1 : Enable or disable reception on logical address 1. */
+#define RADIO_RXADDRESSES_ADDR1_Pos (1UL) /*!< Position of ADDR1 field. */
+#define RADIO_RXADDRESSES_ADDR1_Msk (0x1UL << RADIO_RXADDRESSES_ADDR1_Pos) /*!< Bit mask of ADDR1 field. */
+#define RADIO_RXADDRESSES_ADDR1_Disabled (0UL) /*!< Disable */
+#define RADIO_RXADDRESSES_ADDR1_Enabled (1UL) /*!< Enable */
+
+/* Bit 0 : Enable or disable reception on logical address 0. */
+#define RADIO_RXADDRESSES_ADDR0_Pos (0UL) /*!< Position of ADDR0 field. */
+#define RADIO_RXADDRESSES_ADDR0_Msk (0x1UL << RADIO_RXADDRESSES_ADDR0_Pos) /*!< Bit mask of ADDR0 field. */
+#define RADIO_RXADDRESSES_ADDR0_Disabled (0UL) /*!< Disable */
+#define RADIO_RXADDRESSES_ADDR0_Enabled (1UL) /*!< Enable */
+
+/* Register: RADIO_CRCCNF */
+/* Description: CRC configuration */
+
+/* Bits 9..8 : Include or exclude packet address field out of CRC calculation. */
+#define RADIO_CRCCNF_SKIPADDR_Pos (8UL) /*!< Position of SKIPADDR field. */
+#define RADIO_CRCCNF_SKIPADDR_Msk (0x3UL << RADIO_CRCCNF_SKIPADDR_Pos) /*!< Bit mask of SKIPADDR field. */
+#define RADIO_CRCCNF_SKIPADDR_Include (0UL) /*!< CRC calculation includes address field */
+#define RADIO_CRCCNF_SKIPADDR_Skip (1UL) /*!< CRC calculation does not include address field. The CRC calculation will start at the first byte after the address. */
+
+/* Bits 1..0 : CRC length in number of bytes. */
+#define RADIO_CRCCNF_LEN_Pos (0UL) /*!< Position of LEN field. */
+#define RADIO_CRCCNF_LEN_Msk (0x3UL << RADIO_CRCCNF_LEN_Pos) /*!< Bit mask of LEN field. */
+#define RADIO_CRCCNF_LEN_Disabled (0UL) /*!< CRC length is zero and CRC calculation is disabled */
+#define RADIO_CRCCNF_LEN_One (1UL) /*!< CRC length is one byte and CRC calculation is enabled */
+#define RADIO_CRCCNF_LEN_Two (2UL) /*!< CRC length is two bytes and CRC calculation is enabled */
+#define RADIO_CRCCNF_LEN_Three (3UL) /*!< CRC length is three bytes and CRC calculation is enabled */
+
+/* Register: RADIO_CRCPOLY */
+/* Description: CRC polynomial */
+
+/* Bits 23..0 : CRC polynomial */
+#define RADIO_CRCPOLY_CRCPOLY_Pos (0UL) /*!< Position of CRCPOLY field. */
+#define RADIO_CRCPOLY_CRCPOLY_Msk (0xFFFFFFUL << RADIO_CRCPOLY_CRCPOLY_Pos) /*!< Bit mask of CRCPOLY field. */
+
+/* Register: RADIO_CRCINIT */
+/* Description: CRC initial value */
+
+/* Bits 23..0 : CRC initial value */
+#define RADIO_CRCINIT_CRCINIT_Pos (0UL) /*!< Position of CRCINIT field. */
+#define RADIO_CRCINIT_CRCINIT_Msk (0xFFFFFFUL << RADIO_CRCINIT_CRCINIT_Pos) /*!< Bit mask of CRCINIT field. */
+
+/* Register: RADIO_TIFS */
+/* Description: Interframe spacing in us */
+
+/* Bits 9..0 : Interframe spacing in us */
+#define RADIO_TIFS_TIFS_Pos (0UL) /*!< Position of TIFS field. */
+#define RADIO_TIFS_TIFS_Msk (0x3FFUL << RADIO_TIFS_TIFS_Pos) /*!< Bit mask of TIFS field. */
+
+/* Register: RADIO_RSSISAMPLE */
+/* Description: RSSI sample */
+
+/* Bits 6..0 : RSSI sample */
+#define RADIO_RSSISAMPLE_RSSISAMPLE_Pos (0UL) /*!< Position of RSSISAMPLE field. */
+#define RADIO_RSSISAMPLE_RSSISAMPLE_Msk (0x7FUL << RADIO_RSSISAMPLE_RSSISAMPLE_Pos) /*!< Bit mask of RSSISAMPLE field. */
+
+/* Register: RADIO_STATE */
+/* Description: Current radio state */
+
+/* Bits 3..0 : Current radio state */
+#define RADIO_STATE_STATE_Pos (0UL) /*!< Position of STATE field. */
+#define RADIO_STATE_STATE_Msk (0xFUL << RADIO_STATE_STATE_Pos) /*!< Bit mask of STATE field. */
+#define RADIO_STATE_STATE_Disabled (0UL) /*!< RADIO is in the Disabled state */
+#define RADIO_STATE_STATE_RxRu (1UL) /*!< RADIO is in the RXRU state */
+#define RADIO_STATE_STATE_RxIdle (2UL) /*!< RADIO is in the RXIDLE state */
+#define RADIO_STATE_STATE_Rx (3UL) /*!< RADIO is in the RX state */
+#define RADIO_STATE_STATE_RxDisable (4UL) /*!< RADIO is in the RXDISABLED state */
+#define RADIO_STATE_STATE_TxRu (9UL) /*!< RADIO is in the TXRU state */
+#define RADIO_STATE_STATE_TxIdle (10UL) /*!< RADIO is in the TXIDLE state */
+#define RADIO_STATE_STATE_Tx (11UL) /*!< RADIO is in the TX state */
+#define RADIO_STATE_STATE_TxDisable (12UL) /*!< RADIO is in the TXDISABLED state */
+
+/* Register: RADIO_DATAWHITEIV */
+/* Description: Data whitening initial value */
+
+/* Bits 6..0 : Data whitening initial value. Bit 6 is hardwired to '1', writing '0' to it has no effect, and it will always be read back and used by the device as '1'. */
+#define RADIO_DATAWHITEIV_DATAWHITEIV_Pos (0UL) /*!< Position of DATAWHITEIV field. */
+#define RADIO_DATAWHITEIV_DATAWHITEIV_Msk (0x7FUL << RADIO_DATAWHITEIV_DATAWHITEIV_Pos) /*!< Bit mask of DATAWHITEIV field. */
+
+/* Register: RADIO_BCC */
+/* Description: Bit counter compare */
+
+/* Bits 31..0 : Bit counter compare */
+#define RADIO_BCC_BCC_Pos (0UL) /*!< Position of BCC field. */
+#define RADIO_BCC_BCC_Msk (0xFFFFFFFFUL << RADIO_BCC_BCC_Pos) /*!< Bit mask of BCC field. */
+
+/* Register: RADIO_DAB */
+/* Description: Description collection: Device address base segment n */
+
+/* Bits 31..0 : Device address base segment n */
+#define RADIO_DAB_DAB_Pos (0UL) /*!< Position of DAB field. */
+#define RADIO_DAB_DAB_Msk (0xFFFFFFFFUL << RADIO_DAB_DAB_Pos) /*!< Bit mask of DAB field. */
+
+/* Register: RADIO_DAP */
+/* Description: Description collection: Device address prefix n */
+
+/* Bits 15..0 : Device address prefix n */
+#define RADIO_DAP_DAP_Pos (0UL) /*!< Position of DAP field. */
+#define RADIO_DAP_DAP_Msk (0xFFFFUL << RADIO_DAP_DAP_Pos) /*!< Bit mask of DAP field. */
+
+/* Register: RADIO_DACNF */
+/* Description: Device address match configuration */
+
+/* Bit 15 : TxAdd for device address 7 */
+#define RADIO_DACNF_TXADD7_Pos (15UL) /*!< Position of TXADD7 field. */
+#define RADIO_DACNF_TXADD7_Msk (0x1UL << RADIO_DACNF_TXADD7_Pos) /*!< Bit mask of TXADD7 field. */
+
+/* Bit 14 : TxAdd for device address 6 */
+#define RADIO_DACNF_TXADD6_Pos (14UL) /*!< Position of TXADD6 field. */
+#define RADIO_DACNF_TXADD6_Msk (0x1UL << RADIO_DACNF_TXADD6_Pos) /*!< Bit mask of TXADD6 field. */
+
+/* Bit 13 : TxAdd for device address 5 */
+#define RADIO_DACNF_TXADD5_Pos (13UL) /*!< Position of TXADD5 field. */
+#define RADIO_DACNF_TXADD5_Msk (0x1UL << RADIO_DACNF_TXADD5_Pos) /*!< Bit mask of TXADD5 field. */
+
+/* Bit 12 : TxAdd for device address 4 */
+#define RADIO_DACNF_TXADD4_Pos (12UL) /*!< Position of TXADD4 field. */
+#define RADIO_DACNF_TXADD4_Msk (0x1UL << RADIO_DACNF_TXADD4_Pos) /*!< Bit mask of TXADD4 field. */
+
+/* Bit 11 : TxAdd for device address 3 */
+#define RADIO_DACNF_TXADD3_Pos (11UL) /*!< Position of TXADD3 field. */
+#define RADIO_DACNF_TXADD3_Msk (0x1UL << RADIO_DACNF_TXADD3_Pos) /*!< Bit mask of TXADD3 field. */
+
+/* Bit 10 : TxAdd for device address 2 */
+#define RADIO_DACNF_TXADD2_Pos (10UL) /*!< Position of TXADD2 field. */
+#define RADIO_DACNF_TXADD2_Msk (0x1UL << RADIO_DACNF_TXADD2_Pos) /*!< Bit mask of TXADD2 field. */
+
+/* Bit 9 : TxAdd for device address 1 */
+#define RADIO_DACNF_TXADD1_Pos (9UL) /*!< Position of TXADD1 field. */
+#define RADIO_DACNF_TXADD1_Msk (0x1UL << RADIO_DACNF_TXADD1_Pos) /*!< Bit mask of TXADD1 field. */
+
+/* Bit 8 : TxAdd for device address 0 */
+#define RADIO_DACNF_TXADD0_Pos (8UL) /*!< Position of TXADD0 field. */
+#define RADIO_DACNF_TXADD0_Msk (0x1UL << RADIO_DACNF_TXADD0_Pos) /*!< Bit mask of TXADD0 field. */
+
+/* Bit 7 : Enable or disable device address matching using device address 7 */
+#define RADIO_DACNF_ENA7_Pos (7UL) /*!< Position of ENA7 field. */
+#define RADIO_DACNF_ENA7_Msk (0x1UL << RADIO_DACNF_ENA7_Pos) /*!< Bit mask of ENA7 field. */
+#define RADIO_DACNF_ENA7_Disabled (0UL) /*!< Disabled */
+#define RADIO_DACNF_ENA7_Enabled (1UL) /*!< Enabled */
+
+/* Bit 6 : Enable or disable device address matching using device address 6 */
+#define RADIO_DACNF_ENA6_Pos (6UL) /*!< Position of ENA6 field. */
+#define RADIO_DACNF_ENA6_Msk (0x1UL << RADIO_DACNF_ENA6_Pos) /*!< Bit mask of ENA6 field. */
+#define RADIO_DACNF_ENA6_Disabled (0UL) /*!< Disabled */
+#define RADIO_DACNF_ENA6_Enabled (1UL) /*!< Enabled */
+
+/* Bit 5 : Enable or disable device address matching using device address 5 */
+#define RADIO_DACNF_ENA5_Pos (5UL) /*!< Position of ENA5 field. */
+#define RADIO_DACNF_ENA5_Msk (0x1UL << RADIO_DACNF_ENA5_Pos) /*!< Bit mask of ENA5 field. */
+#define RADIO_DACNF_ENA5_Disabled (0UL) /*!< Disabled */
+#define RADIO_DACNF_ENA5_Enabled (1UL) /*!< Enabled */
+
+/* Bit 4 : Enable or disable device address matching using device address 4 */
+#define RADIO_DACNF_ENA4_Pos (4UL) /*!< Position of ENA4 field. */
+#define RADIO_DACNF_ENA4_Msk (0x1UL << RADIO_DACNF_ENA4_Pos) /*!< Bit mask of ENA4 field. */
+#define RADIO_DACNF_ENA4_Disabled (0UL) /*!< Disabled */
+#define RADIO_DACNF_ENA4_Enabled (1UL) /*!< Enabled */
+
+/* Bit 3 : Enable or disable device address matching using device address 3 */
+#define RADIO_DACNF_ENA3_Pos (3UL) /*!< Position of ENA3 field. */
+#define RADIO_DACNF_ENA3_Msk (0x1UL << RADIO_DACNF_ENA3_Pos) /*!< Bit mask of ENA3 field. */
+#define RADIO_DACNF_ENA3_Disabled (0UL) /*!< Disabled */
+#define RADIO_DACNF_ENA3_Enabled (1UL) /*!< Enabled */
+
+/* Bit 2 : Enable or disable device address matching using device address 2 */
+#define RADIO_DACNF_ENA2_Pos (2UL) /*!< Position of ENA2 field. */
+#define RADIO_DACNF_ENA2_Msk (0x1UL << RADIO_DACNF_ENA2_Pos) /*!< Bit mask of ENA2 field. */
+#define RADIO_DACNF_ENA2_Disabled (0UL) /*!< Disabled */
+#define RADIO_DACNF_ENA2_Enabled (1UL) /*!< Enabled */
+
+/* Bit 1 : Enable or disable device address matching using device address 1 */
+#define RADIO_DACNF_ENA1_Pos (1UL) /*!< Position of ENA1 field. */
+#define RADIO_DACNF_ENA1_Msk (0x1UL << RADIO_DACNF_ENA1_Pos) /*!< Bit mask of ENA1 field. */
+#define RADIO_DACNF_ENA1_Disabled (0UL) /*!< Disabled */
+#define RADIO_DACNF_ENA1_Enabled (1UL) /*!< Enabled */
+
+/* Bit 0 : Enable or disable device address matching using device address 0 */
+#define RADIO_DACNF_ENA0_Pos (0UL) /*!< Position of ENA0 field. */
+#define RADIO_DACNF_ENA0_Msk (0x1UL << RADIO_DACNF_ENA0_Pos) /*!< Bit mask of ENA0 field. */
+#define RADIO_DACNF_ENA0_Disabled (0UL) /*!< Disabled */
+#define RADIO_DACNF_ENA0_Enabled (1UL) /*!< Enabled */
+
+/* Register: RADIO_MODECNF0 */
+/* Description: Radio mode configuration register 0 */
+
+/* Bits 9..8 : Default TX value */
+#define RADIO_MODECNF0_DTX_Pos (8UL) /*!< Position of DTX field. */
+#define RADIO_MODECNF0_DTX_Msk (0x3UL << RADIO_MODECNF0_DTX_Pos) /*!< Bit mask of DTX field. */
+#define RADIO_MODECNF0_DTX_B1 (0UL) /*!< Transmit '1' */
+#define RADIO_MODECNF0_DTX_B0 (1UL) /*!< Transmit '0' */
+#define RADIO_MODECNF0_DTX_Center (2UL) /*!< Transmit center frequency */
+
+/* Bit 0 : Radio ramp-up time */
+#define RADIO_MODECNF0_RU_Pos (0UL) /*!< Position of RU field. */
+#define RADIO_MODECNF0_RU_Msk (0x1UL << RADIO_MODECNF0_RU_Pos) /*!< Bit mask of RU field. */
+#define RADIO_MODECNF0_RU_Default (0UL) /*!< Default ramp-up time (tRXEN and tTXEN), compatible with firmware written for nRF51 */
+#define RADIO_MODECNF0_RU_Fast (1UL) /*!< Fast ramp-up (tRXEN,FAST and tTXEN,FAST), see electrical specification for more information */
+
+/* Register: RADIO_POWER */
+/* Description: Peripheral power control */
+
+/* Bit 0 : Peripheral power control. The peripheral and its registers will be reset to its initial state by switching the peripheral off and then back on again. */
+#define RADIO_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */
+#define RADIO_POWER_POWER_Msk (0x1UL << RADIO_POWER_POWER_Pos) /*!< Bit mask of POWER field. */
+#define RADIO_POWER_POWER_Disabled (0UL) /*!< Peripheral is powered off */
+#define RADIO_POWER_POWER_Enabled (1UL) /*!< Peripheral is powered on */
+
+
+/* Peripheral: RNG */
+/* Description: Random Number Generator */
+
+/* Register: RNG_TASKS_START */
+/* Description: Task starting the random number generator */
+
+/* Bit 0 : Task starting the random number generator */
+#define RNG_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */
+#define RNG_TASKS_START_TASKS_START_Msk (0x1UL << RNG_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */
+#define RNG_TASKS_START_TASKS_START_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RNG_TASKS_STOP */
+/* Description: Task stopping the random number generator */
+
+/* Bit 0 : Task stopping the random number generator */
+#define RNG_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define RNG_TASKS_STOP_TASKS_STOP_Msk (0x1UL << RNG_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define RNG_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RNG_EVENTS_VALRDY */
+/* Description: Event being generated for every new random number written to the VALUE register */
+
+/* Bit 0 : Event being generated for every new random number written to the VALUE register */
+#define RNG_EVENTS_VALRDY_EVENTS_VALRDY_Pos (0UL) /*!< Position of EVENTS_VALRDY field. */
+#define RNG_EVENTS_VALRDY_EVENTS_VALRDY_Msk (0x1UL << RNG_EVENTS_VALRDY_EVENTS_VALRDY_Pos) /*!< Bit mask of EVENTS_VALRDY field. */
+#define RNG_EVENTS_VALRDY_EVENTS_VALRDY_NotGenerated (0UL) /*!< Event not generated */
+#define RNG_EVENTS_VALRDY_EVENTS_VALRDY_Generated (1UL) /*!< Event generated */
+
+/* Register: RNG_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 0 : Shortcut between event VALRDY and task STOP */
+#define RNG_SHORTS_VALRDY_STOP_Pos (0UL) /*!< Position of VALRDY_STOP field. */
+#define RNG_SHORTS_VALRDY_STOP_Msk (0x1UL << RNG_SHORTS_VALRDY_STOP_Pos) /*!< Bit mask of VALRDY_STOP field. */
+#define RNG_SHORTS_VALRDY_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define RNG_SHORTS_VALRDY_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: RNG_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 0 : Write '1' to enable interrupt for event VALRDY */
+#define RNG_INTENSET_VALRDY_Pos (0UL) /*!< Position of VALRDY field. */
+#define RNG_INTENSET_VALRDY_Msk (0x1UL << RNG_INTENSET_VALRDY_Pos) /*!< Bit mask of VALRDY field. */
+#define RNG_INTENSET_VALRDY_Disabled (0UL) /*!< Read: Disabled */
+#define RNG_INTENSET_VALRDY_Enabled (1UL) /*!< Read: Enabled */
+#define RNG_INTENSET_VALRDY_Set (1UL) /*!< Enable */
+
+/* Register: RNG_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 0 : Write '1' to disable interrupt for event VALRDY */
+#define RNG_INTENCLR_VALRDY_Pos (0UL) /*!< Position of VALRDY field. */
+#define RNG_INTENCLR_VALRDY_Msk (0x1UL << RNG_INTENCLR_VALRDY_Pos) /*!< Bit mask of VALRDY field. */
+#define RNG_INTENCLR_VALRDY_Disabled (0UL) /*!< Read: Disabled */
+#define RNG_INTENCLR_VALRDY_Enabled (1UL) /*!< Read: Enabled */
+#define RNG_INTENCLR_VALRDY_Clear (1UL) /*!< Disable */
+
+/* Register: RNG_CONFIG */
+/* Description: Configuration register */
+
+/* Bit 0 : Bias correction */
+#define RNG_CONFIG_DERCEN_Pos (0UL) /*!< Position of DERCEN field. */
+#define RNG_CONFIG_DERCEN_Msk (0x1UL << RNG_CONFIG_DERCEN_Pos) /*!< Bit mask of DERCEN field. */
+#define RNG_CONFIG_DERCEN_Disabled (0UL) /*!< Disabled */
+#define RNG_CONFIG_DERCEN_Enabled (1UL) /*!< Enabled */
+
+/* Register: RNG_VALUE */
+/* Description: Output random number */
+
+/* Bits 7..0 : Generated random number */
+#define RNG_VALUE_VALUE_Pos (0UL) /*!< Position of VALUE field. */
+#define RNG_VALUE_VALUE_Msk (0xFFUL << RNG_VALUE_VALUE_Pos) /*!< Bit mask of VALUE field. */
+
+
+/* Peripheral: RTC */
+/* Description: Real time counter 0 */
+
+/* Register: RTC_TASKS_START */
+/* Description: Start RTC COUNTER */
+
+/* Bit 0 : Start RTC COUNTER */
+#define RTC_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */
+#define RTC_TASKS_START_TASKS_START_Msk (0x1UL << RTC_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */
+#define RTC_TASKS_START_TASKS_START_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RTC_TASKS_STOP */
+/* Description: Stop RTC COUNTER */
+
+/* Bit 0 : Stop RTC COUNTER */
+#define RTC_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define RTC_TASKS_STOP_TASKS_STOP_Msk (0x1UL << RTC_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define RTC_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RTC_TASKS_CLEAR */
+/* Description: Clear RTC COUNTER */
+
+/* Bit 0 : Clear RTC COUNTER */
+#define RTC_TASKS_CLEAR_TASKS_CLEAR_Pos (0UL) /*!< Position of TASKS_CLEAR field. */
+#define RTC_TASKS_CLEAR_TASKS_CLEAR_Msk (0x1UL << RTC_TASKS_CLEAR_TASKS_CLEAR_Pos) /*!< Bit mask of TASKS_CLEAR field. */
+#define RTC_TASKS_CLEAR_TASKS_CLEAR_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RTC_TASKS_TRIGOVRFLW */
+/* Description: Set COUNTER to 0xFFFFF0 */
+
+/* Bit 0 : Set COUNTER to 0xFFFFF0 */
+#define RTC_TASKS_TRIGOVRFLW_TASKS_TRIGOVRFLW_Pos (0UL) /*!< Position of TASKS_TRIGOVRFLW field. */
+#define RTC_TASKS_TRIGOVRFLW_TASKS_TRIGOVRFLW_Msk (0x1UL << RTC_TASKS_TRIGOVRFLW_TASKS_TRIGOVRFLW_Pos) /*!< Bit mask of TASKS_TRIGOVRFLW field. */
+#define RTC_TASKS_TRIGOVRFLW_TASKS_TRIGOVRFLW_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RTC_EVENTS_TICK */
+/* Description: Event on COUNTER increment */
+
+/* Bit 0 : Event on COUNTER increment */
+#define RTC_EVENTS_TICK_EVENTS_TICK_Pos (0UL) /*!< Position of EVENTS_TICK field. */
+#define RTC_EVENTS_TICK_EVENTS_TICK_Msk (0x1UL << RTC_EVENTS_TICK_EVENTS_TICK_Pos) /*!< Bit mask of EVENTS_TICK field. */
+#define RTC_EVENTS_TICK_EVENTS_TICK_NotGenerated (0UL) /*!< Event not generated */
+#define RTC_EVENTS_TICK_EVENTS_TICK_Generated (1UL) /*!< Event generated */
+
+/* Register: RTC_EVENTS_OVRFLW */
+/* Description: Event on COUNTER overflow */
+
+/* Bit 0 : Event on COUNTER overflow */
+#define RTC_EVENTS_OVRFLW_EVENTS_OVRFLW_Pos (0UL) /*!< Position of EVENTS_OVRFLW field. */
+#define RTC_EVENTS_OVRFLW_EVENTS_OVRFLW_Msk (0x1UL << RTC_EVENTS_OVRFLW_EVENTS_OVRFLW_Pos) /*!< Bit mask of EVENTS_OVRFLW field. */
+#define RTC_EVENTS_OVRFLW_EVENTS_OVRFLW_NotGenerated (0UL) /*!< Event not generated */
+#define RTC_EVENTS_OVRFLW_EVENTS_OVRFLW_Generated (1UL) /*!< Event generated */
+
+/* Register: RTC_EVENTS_COMPARE */
+/* Description: Description collection: Compare event on CC[n] match */
+
+/* Bit 0 : Compare event on CC[n] match */
+#define RTC_EVENTS_COMPARE_EVENTS_COMPARE_Pos (0UL) /*!< Position of EVENTS_COMPARE field. */
+#define RTC_EVENTS_COMPARE_EVENTS_COMPARE_Msk (0x1UL << RTC_EVENTS_COMPARE_EVENTS_COMPARE_Pos) /*!< Bit mask of EVENTS_COMPARE field. */
+#define RTC_EVENTS_COMPARE_EVENTS_COMPARE_NotGenerated (0UL) /*!< Event not generated */
+#define RTC_EVENTS_COMPARE_EVENTS_COMPARE_Generated (1UL) /*!< Event generated */
+
+/* Register: RTC_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 19 : Write '1' to enable interrupt for event COMPARE[3] */
+#define RTC_INTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */
+#define RTC_INTENSET_COMPARE3_Msk (0x1UL << RTC_INTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */
+#define RTC_INTENSET_COMPARE3_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_INTENSET_COMPARE3_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_INTENSET_COMPARE3_Set (1UL) /*!< Enable */
+
+/* Bit 18 : Write '1' to enable interrupt for event COMPARE[2] */
+#define RTC_INTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */
+#define RTC_INTENSET_COMPARE2_Msk (0x1UL << RTC_INTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */
+#define RTC_INTENSET_COMPARE2_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_INTENSET_COMPARE2_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_INTENSET_COMPARE2_Set (1UL) /*!< Enable */
+
+/* Bit 17 : Write '1' to enable interrupt for event COMPARE[1] */
+#define RTC_INTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */
+#define RTC_INTENSET_COMPARE1_Msk (0x1UL << RTC_INTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */
+#define RTC_INTENSET_COMPARE1_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_INTENSET_COMPARE1_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_INTENSET_COMPARE1_Set (1UL) /*!< Enable */
+
+/* Bit 16 : Write '1' to enable interrupt for event COMPARE[0] */
+#define RTC_INTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */
+#define RTC_INTENSET_COMPARE0_Msk (0x1UL << RTC_INTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */
+#define RTC_INTENSET_COMPARE0_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_INTENSET_COMPARE0_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_INTENSET_COMPARE0_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event OVRFLW */
+#define RTC_INTENSET_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */
+#define RTC_INTENSET_OVRFLW_Msk (0x1UL << RTC_INTENSET_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */
+#define RTC_INTENSET_OVRFLW_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_INTENSET_OVRFLW_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_INTENSET_OVRFLW_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event TICK */
+#define RTC_INTENSET_TICK_Pos (0UL) /*!< Position of TICK field. */
+#define RTC_INTENSET_TICK_Msk (0x1UL << RTC_INTENSET_TICK_Pos) /*!< Bit mask of TICK field. */
+#define RTC_INTENSET_TICK_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_INTENSET_TICK_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_INTENSET_TICK_Set (1UL) /*!< Enable */
+
+/* Register: RTC_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 19 : Write '1' to disable interrupt for event COMPARE[3] */
+#define RTC_INTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */
+#define RTC_INTENCLR_COMPARE3_Msk (0x1UL << RTC_INTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */
+#define RTC_INTENCLR_COMPARE3_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_INTENCLR_COMPARE3_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_INTENCLR_COMPARE3_Clear (1UL) /*!< Disable */
+
+/* Bit 18 : Write '1' to disable interrupt for event COMPARE[2] */
+#define RTC_INTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */
+#define RTC_INTENCLR_COMPARE2_Msk (0x1UL << RTC_INTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */
+#define RTC_INTENCLR_COMPARE2_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_INTENCLR_COMPARE2_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_INTENCLR_COMPARE2_Clear (1UL) /*!< Disable */
+
+/* Bit 17 : Write '1' to disable interrupt for event COMPARE[1] */
+#define RTC_INTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */
+#define RTC_INTENCLR_COMPARE1_Msk (0x1UL << RTC_INTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */
+#define RTC_INTENCLR_COMPARE1_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_INTENCLR_COMPARE1_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_INTENCLR_COMPARE1_Clear (1UL) /*!< Disable */
+
+/* Bit 16 : Write '1' to disable interrupt for event COMPARE[0] */
+#define RTC_INTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */
+#define RTC_INTENCLR_COMPARE0_Msk (0x1UL << RTC_INTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */
+#define RTC_INTENCLR_COMPARE0_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_INTENCLR_COMPARE0_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_INTENCLR_COMPARE0_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event OVRFLW */
+#define RTC_INTENCLR_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */
+#define RTC_INTENCLR_OVRFLW_Msk (0x1UL << RTC_INTENCLR_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */
+#define RTC_INTENCLR_OVRFLW_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_INTENCLR_OVRFLW_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_INTENCLR_OVRFLW_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event TICK */
+#define RTC_INTENCLR_TICK_Pos (0UL) /*!< Position of TICK field. */
+#define RTC_INTENCLR_TICK_Msk (0x1UL << RTC_INTENCLR_TICK_Pos) /*!< Bit mask of TICK field. */
+#define RTC_INTENCLR_TICK_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_INTENCLR_TICK_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_INTENCLR_TICK_Clear (1UL) /*!< Disable */
+
+/* Register: RTC_EVTEN */
+/* Description: Enable or disable event routing */
+
+/* Bit 19 : Enable or disable event routing for event COMPARE[3] */
+#define RTC_EVTEN_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */
+#define RTC_EVTEN_COMPARE3_Msk (0x1UL << RTC_EVTEN_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */
+#define RTC_EVTEN_COMPARE3_Disabled (0UL) /*!< Disable */
+#define RTC_EVTEN_COMPARE3_Enabled (1UL) /*!< Disable */
+
+/* Bit 18 : Enable or disable event routing for event COMPARE[2] */
+#define RTC_EVTEN_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */
+#define RTC_EVTEN_COMPARE2_Msk (0x1UL << RTC_EVTEN_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */
+#define RTC_EVTEN_COMPARE2_Disabled (0UL) /*!< Disable */
+#define RTC_EVTEN_COMPARE2_Enabled (1UL) /*!< Disable */
+
+/* Bit 17 : Enable or disable event routing for event COMPARE[1] */
+#define RTC_EVTEN_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */
+#define RTC_EVTEN_COMPARE1_Msk (0x1UL << RTC_EVTEN_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */
+#define RTC_EVTEN_COMPARE1_Disabled (0UL) /*!< Disable */
+#define RTC_EVTEN_COMPARE1_Enabled (1UL) /*!< Disable */
+
+/* Bit 16 : Enable or disable event routing for event COMPARE[0] */
+#define RTC_EVTEN_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */
+#define RTC_EVTEN_COMPARE0_Msk (0x1UL << RTC_EVTEN_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */
+#define RTC_EVTEN_COMPARE0_Disabled (0UL) /*!< Disable */
+#define RTC_EVTEN_COMPARE0_Enabled (1UL) /*!< Disable */
+
+/* Bit 1 : Enable or disable event routing for event OVRFLW */
+#define RTC_EVTEN_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */
+#define RTC_EVTEN_OVRFLW_Msk (0x1UL << RTC_EVTEN_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */
+#define RTC_EVTEN_OVRFLW_Disabled (0UL) /*!< Disable */
+#define RTC_EVTEN_OVRFLW_Enabled (1UL) /*!< Disable */
+
+/* Bit 0 : Enable or disable event routing for event TICK */
+#define RTC_EVTEN_TICK_Pos (0UL) /*!< Position of TICK field. */
+#define RTC_EVTEN_TICK_Msk (0x1UL << RTC_EVTEN_TICK_Pos) /*!< Bit mask of TICK field. */
+#define RTC_EVTEN_TICK_Disabled (0UL) /*!< Disable */
+#define RTC_EVTEN_TICK_Enabled (1UL) /*!< Disable */
+
+/* Register: RTC_EVTENSET */
+/* Description: Enable event routing */
+
+/* Bit 19 : Write '1' to enable event routing for event COMPARE[3] */
+#define RTC_EVTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */
+#define RTC_EVTENSET_COMPARE3_Msk (0x1UL << RTC_EVTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */
+#define RTC_EVTENSET_COMPARE3_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_EVTENSET_COMPARE3_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_EVTENSET_COMPARE3_Set (1UL) /*!< Enable */
+
+/* Bit 18 : Write '1' to enable event routing for event COMPARE[2] */
+#define RTC_EVTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */
+#define RTC_EVTENSET_COMPARE2_Msk (0x1UL << RTC_EVTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */
+#define RTC_EVTENSET_COMPARE2_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_EVTENSET_COMPARE2_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_EVTENSET_COMPARE2_Set (1UL) /*!< Enable */
+
+/* Bit 17 : Write '1' to enable event routing for event COMPARE[1] */
+#define RTC_EVTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */
+#define RTC_EVTENSET_COMPARE1_Msk (0x1UL << RTC_EVTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */
+#define RTC_EVTENSET_COMPARE1_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_EVTENSET_COMPARE1_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_EVTENSET_COMPARE1_Set (1UL) /*!< Enable */
+
+/* Bit 16 : Write '1' to enable event routing for event COMPARE[0] */
+#define RTC_EVTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */
+#define RTC_EVTENSET_COMPARE0_Msk (0x1UL << RTC_EVTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */
+#define RTC_EVTENSET_COMPARE0_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_EVTENSET_COMPARE0_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_EVTENSET_COMPARE0_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable event routing for event OVRFLW */
+#define RTC_EVTENSET_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */
+#define RTC_EVTENSET_OVRFLW_Msk (0x1UL << RTC_EVTENSET_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */
+#define RTC_EVTENSET_OVRFLW_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_EVTENSET_OVRFLW_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_EVTENSET_OVRFLW_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable event routing for event TICK */
+#define RTC_EVTENSET_TICK_Pos (0UL) /*!< Position of TICK field. */
+#define RTC_EVTENSET_TICK_Msk (0x1UL << RTC_EVTENSET_TICK_Pos) /*!< Bit mask of TICK field. */
+#define RTC_EVTENSET_TICK_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_EVTENSET_TICK_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_EVTENSET_TICK_Set (1UL) /*!< Enable */
+
+/* Register: RTC_EVTENCLR */
+/* Description: Disable event routing */
+
+/* Bit 19 : Write '1' to disable event routing for event COMPARE[3] */
+#define RTC_EVTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */
+#define RTC_EVTENCLR_COMPARE3_Msk (0x1UL << RTC_EVTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */
+#define RTC_EVTENCLR_COMPARE3_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_EVTENCLR_COMPARE3_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_EVTENCLR_COMPARE3_Clear (1UL) /*!< Disable */
+
+/* Bit 18 : Write '1' to disable event routing for event COMPARE[2] */
+#define RTC_EVTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */
+#define RTC_EVTENCLR_COMPARE2_Msk (0x1UL << RTC_EVTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */
+#define RTC_EVTENCLR_COMPARE2_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_EVTENCLR_COMPARE2_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_EVTENCLR_COMPARE2_Clear (1UL) /*!< Disable */
+
+/* Bit 17 : Write '1' to disable event routing for event COMPARE[1] */
+#define RTC_EVTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */
+#define RTC_EVTENCLR_COMPARE1_Msk (0x1UL << RTC_EVTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */
+#define RTC_EVTENCLR_COMPARE1_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_EVTENCLR_COMPARE1_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_EVTENCLR_COMPARE1_Clear (1UL) /*!< Disable */
+
+/* Bit 16 : Write '1' to disable event routing for event COMPARE[0] */
+#define RTC_EVTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */
+#define RTC_EVTENCLR_COMPARE0_Msk (0x1UL << RTC_EVTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */
+#define RTC_EVTENCLR_COMPARE0_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_EVTENCLR_COMPARE0_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_EVTENCLR_COMPARE0_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable event routing for event OVRFLW */
+#define RTC_EVTENCLR_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */
+#define RTC_EVTENCLR_OVRFLW_Msk (0x1UL << RTC_EVTENCLR_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */
+#define RTC_EVTENCLR_OVRFLW_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_EVTENCLR_OVRFLW_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_EVTENCLR_OVRFLW_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable event routing for event TICK */
+#define RTC_EVTENCLR_TICK_Pos (0UL) /*!< Position of TICK field. */
+#define RTC_EVTENCLR_TICK_Msk (0x1UL << RTC_EVTENCLR_TICK_Pos) /*!< Bit mask of TICK field. */
+#define RTC_EVTENCLR_TICK_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_EVTENCLR_TICK_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_EVTENCLR_TICK_Clear (1UL) /*!< Disable */
+
+/* Register: RTC_COUNTER */
+/* Description: Current COUNTER value */
+
+/* Bits 23..0 : Counter value */
+#define RTC_COUNTER_COUNTER_Pos (0UL) /*!< Position of COUNTER field. */
+#define RTC_COUNTER_COUNTER_Msk (0xFFFFFFUL << RTC_COUNTER_COUNTER_Pos) /*!< Bit mask of COUNTER field. */
+
+/* Register: RTC_PRESCALER */
+/* Description: 12 bit prescaler for COUNTER frequency (32768/(PRESCALER+1)).Must be written when RTC is stopped */
+
+/* Bits 11..0 : Prescaler value */
+#define RTC_PRESCALER_PRESCALER_Pos (0UL) /*!< Position of PRESCALER field. */
+#define RTC_PRESCALER_PRESCALER_Msk (0xFFFUL << RTC_PRESCALER_PRESCALER_Pos) /*!< Bit mask of PRESCALER field. */
+
+/* Register: RTC_CC */
+/* Description: Description collection: Compare register n */
+
+/* Bits 23..0 : Compare value */
+#define RTC_CC_COMPARE_Pos (0UL) /*!< Position of COMPARE field. */
+#define RTC_CC_COMPARE_Msk (0xFFFFFFUL << RTC_CC_COMPARE_Pos) /*!< Bit mask of COMPARE field. */
+
+
+/* Peripheral: SAADC */
+/* Description: Analog to Digital Converter */
+
+/* Register: SAADC_TASKS_START */
+/* Description: Start the ADC and prepare the result buffer in RAM */
+
+/* Bit 0 : Start the ADC and prepare the result buffer in RAM */
+#define SAADC_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */
+#define SAADC_TASKS_START_TASKS_START_Msk (0x1UL << SAADC_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */
+#define SAADC_TASKS_START_TASKS_START_Trigger (1UL) /*!< Trigger task */
+
+/* Register: SAADC_TASKS_SAMPLE */
+/* Description: Take one ADC sample, if scan is enabled all channels are sampled */
+
+/* Bit 0 : Take one ADC sample, if scan is enabled all channels are sampled */
+#define SAADC_TASKS_SAMPLE_TASKS_SAMPLE_Pos (0UL) /*!< Position of TASKS_SAMPLE field. */
+#define SAADC_TASKS_SAMPLE_TASKS_SAMPLE_Msk (0x1UL << SAADC_TASKS_SAMPLE_TASKS_SAMPLE_Pos) /*!< Bit mask of TASKS_SAMPLE field. */
+#define SAADC_TASKS_SAMPLE_TASKS_SAMPLE_Trigger (1UL) /*!< Trigger task */
+
+/* Register: SAADC_TASKS_STOP */
+/* Description: Stop the ADC and terminate any on-going conversion */
+
+/* Bit 0 : Stop the ADC and terminate any on-going conversion */
+#define SAADC_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define SAADC_TASKS_STOP_TASKS_STOP_Msk (0x1UL << SAADC_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define SAADC_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: SAADC_TASKS_CALIBRATEOFFSET */
+/* Description: Starts offset auto-calibration */
+
+/* Bit 0 : Starts offset auto-calibration */
+#define SAADC_TASKS_CALIBRATEOFFSET_TASKS_CALIBRATEOFFSET_Pos (0UL) /*!< Position of TASKS_CALIBRATEOFFSET field. */
+#define SAADC_TASKS_CALIBRATEOFFSET_TASKS_CALIBRATEOFFSET_Msk (0x1UL << SAADC_TASKS_CALIBRATEOFFSET_TASKS_CALIBRATEOFFSET_Pos) /*!< Bit mask of TASKS_CALIBRATEOFFSET field. */
+#define SAADC_TASKS_CALIBRATEOFFSET_TASKS_CALIBRATEOFFSET_Trigger (1UL) /*!< Trigger task */
+
+/* Register: SAADC_EVENTS_STARTED */
+/* Description: The ADC has started */
+
+/* Bit 0 : The ADC has started */
+#define SAADC_EVENTS_STARTED_EVENTS_STARTED_Pos (0UL) /*!< Position of EVENTS_STARTED field. */
+#define SAADC_EVENTS_STARTED_EVENTS_STARTED_Msk (0x1UL << SAADC_EVENTS_STARTED_EVENTS_STARTED_Pos) /*!< Bit mask of EVENTS_STARTED field. */
+#define SAADC_EVENTS_STARTED_EVENTS_STARTED_NotGenerated (0UL) /*!< Event not generated */
+#define SAADC_EVENTS_STARTED_EVENTS_STARTED_Generated (1UL) /*!< Event generated */
+
+/* Register: SAADC_EVENTS_END */
+/* Description: The ADC has filled up the Result buffer */
+
+/* Bit 0 : The ADC has filled up the Result buffer */
+#define SAADC_EVENTS_END_EVENTS_END_Pos (0UL) /*!< Position of EVENTS_END field. */
+#define SAADC_EVENTS_END_EVENTS_END_Msk (0x1UL << SAADC_EVENTS_END_EVENTS_END_Pos) /*!< Bit mask of EVENTS_END field. */
+#define SAADC_EVENTS_END_EVENTS_END_NotGenerated (0UL) /*!< Event not generated */
+#define SAADC_EVENTS_END_EVENTS_END_Generated (1UL) /*!< Event generated */
+
+/* Register: SAADC_EVENTS_DONE */
+/* Description: A conversion task has been completed. Depending on the mode, multiple conversions might be needed for a result to be transferred to RAM. */
+
+/* Bit 0 : A conversion task has been completed. Depending on the mode, multiple conversions might be needed for a result to be transferred to RAM. */
+#define SAADC_EVENTS_DONE_EVENTS_DONE_Pos (0UL) /*!< Position of EVENTS_DONE field. */
+#define SAADC_EVENTS_DONE_EVENTS_DONE_Msk (0x1UL << SAADC_EVENTS_DONE_EVENTS_DONE_Pos) /*!< Bit mask of EVENTS_DONE field. */
+#define SAADC_EVENTS_DONE_EVENTS_DONE_NotGenerated (0UL) /*!< Event not generated */
+#define SAADC_EVENTS_DONE_EVENTS_DONE_Generated (1UL) /*!< Event generated */
+
+/* Register: SAADC_EVENTS_RESULTDONE */
+/* Description: A result is ready to get transferred to RAM. */
+
+/* Bit 0 : A result is ready to get transferred to RAM. */
+#define SAADC_EVENTS_RESULTDONE_EVENTS_RESULTDONE_Pos (0UL) /*!< Position of EVENTS_RESULTDONE field. */
+#define SAADC_EVENTS_RESULTDONE_EVENTS_RESULTDONE_Msk (0x1UL << SAADC_EVENTS_RESULTDONE_EVENTS_RESULTDONE_Pos) /*!< Bit mask of EVENTS_RESULTDONE field. */
+#define SAADC_EVENTS_RESULTDONE_EVENTS_RESULTDONE_NotGenerated (0UL) /*!< Event not generated */
+#define SAADC_EVENTS_RESULTDONE_EVENTS_RESULTDONE_Generated (1UL) /*!< Event generated */
+
+/* Register: SAADC_EVENTS_CALIBRATEDONE */
+/* Description: Calibration is complete */
+
+/* Bit 0 : Calibration is complete */
+#define SAADC_EVENTS_CALIBRATEDONE_EVENTS_CALIBRATEDONE_Pos (0UL) /*!< Position of EVENTS_CALIBRATEDONE field. */
+#define SAADC_EVENTS_CALIBRATEDONE_EVENTS_CALIBRATEDONE_Msk (0x1UL << SAADC_EVENTS_CALIBRATEDONE_EVENTS_CALIBRATEDONE_Pos) /*!< Bit mask of EVENTS_CALIBRATEDONE field. */
+#define SAADC_EVENTS_CALIBRATEDONE_EVENTS_CALIBRATEDONE_NotGenerated (0UL) /*!< Event not generated */
+#define SAADC_EVENTS_CALIBRATEDONE_EVENTS_CALIBRATEDONE_Generated (1UL) /*!< Event generated */
+
+/* Register: SAADC_EVENTS_STOPPED */
+/* Description: The ADC has stopped */
+
+/* Bit 0 : The ADC has stopped */
+#define SAADC_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */
+#define SAADC_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << SAADC_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */
+#define SAADC_EVENTS_STOPPED_EVENTS_STOPPED_NotGenerated (0UL) /*!< Event not generated */
+#define SAADC_EVENTS_STOPPED_EVENTS_STOPPED_Generated (1UL) /*!< Event generated */
+
+/* Register: SAADC_EVENTS_CH_LIMITH */
+/* Description: Description cluster: Last results is equal or above CH[n].LIMIT.HIGH */
+
+/* Bit 0 : Last results is equal or above CH[n].LIMIT.HIGH */
+#define SAADC_EVENTS_CH_LIMITH_LIMITH_Pos (0UL) /*!< Position of LIMITH field. */
+#define SAADC_EVENTS_CH_LIMITH_LIMITH_Msk (0x1UL << SAADC_EVENTS_CH_LIMITH_LIMITH_Pos) /*!< Bit mask of LIMITH field. */
+#define SAADC_EVENTS_CH_LIMITH_LIMITH_NotGenerated (0UL) /*!< Event not generated */
+#define SAADC_EVENTS_CH_LIMITH_LIMITH_Generated (1UL) /*!< Event generated */
+
+/* Register: SAADC_EVENTS_CH_LIMITL */
+/* Description: Description cluster: Last results is equal or below CH[n].LIMIT.LOW */
+
+/* Bit 0 : Last results is equal or below CH[n].LIMIT.LOW */
+#define SAADC_EVENTS_CH_LIMITL_LIMITL_Pos (0UL) /*!< Position of LIMITL field. */
+#define SAADC_EVENTS_CH_LIMITL_LIMITL_Msk (0x1UL << SAADC_EVENTS_CH_LIMITL_LIMITL_Pos) /*!< Bit mask of LIMITL field. */
+#define SAADC_EVENTS_CH_LIMITL_LIMITL_NotGenerated (0UL) /*!< Event not generated */
+#define SAADC_EVENTS_CH_LIMITL_LIMITL_Generated (1UL) /*!< Event generated */
+
+/* Register: SAADC_INTEN */
+/* Description: Enable or disable interrupt */
+
+/* Bit 21 : Enable or disable interrupt for event CH7LIMITL */
+#define SAADC_INTEN_CH7LIMITL_Pos (21UL) /*!< Position of CH7LIMITL field. */
+#define SAADC_INTEN_CH7LIMITL_Msk (0x1UL << SAADC_INTEN_CH7LIMITL_Pos) /*!< Bit mask of CH7LIMITL field. */
+#define SAADC_INTEN_CH7LIMITL_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH7LIMITL_Enabled (1UL) /*!< Enable */
+
+/* Bit 20 : Enable or disable interrupt for event CH7LIMITH */
+#define SAADC_INTEN_CH7LIMITH_Pos (20UL) /*!< Position of CH7LIMITH field. */
+#define SAADC_INTEN_CH7LIMITH_Msk (0x1UL << SAADC_INTEN_CH7LIMITH_Pos) /*!< Bit mask of CH7LIMITH field. */
+#define SAADC_INTEN_CH7LIMITH_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH7LIMITH_Enabled (1UL) /*!< Enable */
+
+/* Bit 19 : Enable or disable interrupt for event CH6LIMITL */
+#define SAADC_INTEN_CH6LIMITL_Pos (19UL) /*!< Position of CH6LIMITL field. */
+#define SAADC_INTEN_CH6LIMITL_Msk (0x1UL << SAADC_INTEN_CH6LIMITL_Pos) /*!< Bit mask of CH6LIMITL field. */
+#define SAADC_INTEN_CH6LIMITL_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH6LIMITL_Enabled (1UL) /*!< Enable */
+
+/* Bit 18 : Enable or disable interrupt for event CH6LIMITH */
+#define SAADC_INTEN_CH6LIMITH_Pos (18UL) /*!< Position of CH6LIMITH field. */
+#define SAADC_INTEN_CH6LIMITH_Msk (0x1UL << SAADC_INTEN_CH6LIMITH_Pos) /*!< Bit mask of CH6LIMITH field. */
+#define SAADC_INTEN_CH6LIMITH_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH6LIMITH_Enabled (1UL) /*!< Enable */
+
+/* Bit 17 : Enable or disable interrupt for event CH5LIMITL */
+#define SAADC_INTEN_CH5LIMITL_Pos (17UL) /*!< Position of CH5LIMITL field. */
+#define SAADC_INTEN_CH5LIMITL_Msk (0x1UL << SAADC_INTEN_CH5LIMITL_Pos) /*!< Bit mask of CH5LIMITL field. */
+#define SAADC_INTEN_CH5LIMITL_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH5LIMITL_Enabled (1UL) /*!< Enable */
+
+/* Bit 16 : Enable or disable interrupt for event CH5LIMITH */
+#define SAADC_INTEN_CH5LIMITH_Pos (16UL) /*!< Position of CH5LIMITH field. */
+#define SAADC_INTEN_CH5LIMITH_Msk (0x1UL << SAADC_INTEN_CH5LIMITH_Pos) /*!< Bit mask of CH5LIMITH field. */
+#define SAADC_INTEN_CH5LIMITH_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH5LIMITH_Enabled (1UL) /*!< Enable */
+
+/* Bit 15 : Enable or disable interrupt for event CH4LIMITL */
+#define SAADC_INTEN_CH4LIMITL_Pos (15UL) /*!< Position of CH4LIMITL field. */
+#define SAADC_INTEN_CH4LIMITL_Msk (0x1UL << SAADC_INTEN_CH4LIMITL_Pos) /*!< Bit mask of CH4LIMITL field. */
+#define SAADC_INTEN_CH4LIMITL_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH4LIMITL_Enabled (1UL) /*!< Enable */
+
+/* Bit 14 : Enable or disable interrupt for event CH4LIMITH */
+#define SAADC_INTEN_CH4LIMITH_Pos (14UL) /*!< Position of CH4LIMITH field. */
+#define SAADC_INTEN_CH4LIMITH_Msk (0x1UL << SAADC_INTEN_CH4LIMITH_Pos) /*!< Bit mask of CH4LIMITH field. */
+#define SAADC_INTEN_CH4LIMITH_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH4LIMITH_Enabled (1UL) /*!< Enable */
+
+/* Bit 13 : Enable or disable interrupt for event CH3LIMITL */
+#define SAADC_INTEN_CH3LIMITL_Pos (13UL) /*!< Position of CH3LIMITL field. */
+#define SAADC_INTEN_CH3LIMITL_Msk (0x1UL << SAADC_INTEN_CH3LIMITL_Pos) /*!< Bit mask of CH3LIMITL field. */
+#define SAADC_INTEN_CH3LIMITL_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH3LIMITL_Enabled (1UL) /*!< Enable */
+
+/* Bit 12 : Enable or disable interrupt for event CH3LIMITH */
+#define SAADC_INTEN_CH3LIMITH_Pos (12UL) /*!< Position of CH3LIMITH field. */
+#define SAADC_INTEN_CH3LIMITH_Msk (0x1UL << SAADC_INTEN_CH3LIMITH_Pos) /*!< Bit mask of CH3LIMITH field. */
+#define SAADC_INTEN_CH3LIMITH_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH3LIMITH_Enabled (1UL) /*!< Enable */
+
+/* Bit 11 : Enable or disable interrupt for event CH2LIMITL */
+#define SAADC_INTEN_CH2LIMITL_Pos (11UL) /*!< Position of CH2LIMITL field. */
+#define SAADC_INTEN_CH2LIMITL_Msk (0x1UL << SAADC_INTEN_CH2LIMITL_Pos) /*!< Bit mask of CH2LIMITL field. */
+#define SAADC_INTEN_CH2LIMITL_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH2LIMITL_Enabled (1UL) /*!< Enable */
+
+/* Bit 10 : Enable or disable interrupt for event CH2LIMITH */
+#define SAADC_INTEN_CH2LIMITH_Pos (10UL) /*!< Position of CH2LIMITH field. */
+#define SAADC_INTEN_CH2LIMITH_Msk (0x1UL << SAADC_INTEN_CH2LIMITH_Pos) /*!< Bit mask of CH2LIMITH field. */
+#define SAADC_INTEN_CH2LIMITH_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH2LIMITH_Enabled (1UL) /*!< Enable */
+
+/* Bit 9 : Enable or disable interrupt for event CH1LIMITL */
+#define SAADC_INTEN_CH1LIMITL_Pos (9UL) /*!< Position of CH1LIMITL field. */
+#define SAADC_INTEN_CH1LIMITL_Msk (0x1UL << SAADC_INTEN_CH1LIMITL_Pos) /*!< Bit mask of CH1LIMITL field. */
+#define SAADC_INTEN_CH1LIMITL_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH1LIMITL_Enabled (1UL) /*!< Enable */
+
+/* Bit 8 : Enable or disable interrupt for event CH1LIMITH */
+#define SAADC_INTEN_CH1LIMITH_Pos (8UL) /*!< Position of CH1LIMITH field. */
+#define SAADC_INTEN_CH1LIMITH_Msk (0x1UL << SAADC_INTEN_CH1LIMITH_Pos) /*!< Bit mask of CH1LIMITH field. */
+#define SAADC_INTEN_CH1LIMITH_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH1LIMITH_Enabled (1UL) /*!< Enable */
+
+/* Bit 7 : Enable or disable interrupt for event CH0LIMITL */
+#define SAADC_INTEN_CH0LIMITL_Pos (7UL) /*!< Position of CH0LIMITL field. */
+#define SAADC_INTEN_CH0LIMITL_Msk (0x1UL << SAADC_INTEN_CH0LIMITL_Pos) /*!< Bit mask of CH0LIMITL field. */
+#define SAADC_INTEN_CH0LIMITL_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH0LIMITL_Enabled (1UL) /*!< Enable */
+
+/* Bit 6 : Enable or disable interrupt for event CH0LIMITH */
+#define SAADC_INTEN_CH0LIMITH_Pos (6UL) /*!< Position of CH0LIMITH field. */
+#define SAADC_INTEN_CH0LIMITH_Msk (0x1UL << SAADC_INTEN_CH0LIMITH_Pos) /*!< Bit mask of CH0LIMITH field. */
+#define SAADC_INTEN_CH0LIMITH_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH0LIMITH_Enabled (1UL) /*!< Enable */
+
+/* Bit 5 : Enable or disable interrupt for event STOPPED */
+#define SAADC_INTEN_STOPPED_Pos (5UL) /*!< Position of STOPPED field. */
+#define SAADC_INTEN_STOPPED_Msk (0x1UL << SAADC_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define SAADC_INTEN_STOPPED_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_STOPPED_Enabled (1UL) /*!< Enable */
+
+/* Bit 4 : Enable or disable interrupt for event CALIBRATEDONE */
+#define SAADC_INTEN_CALIBRATEDONE_Pos (4UL) /*!< Position of CALIBRATEDONE field. */
+#define SAADC_INTEN_CALIBRATEDONE_Msk (0x1UL << SAADC_INTEN_CALIBRATEDONE_Pos) /*!< Bit mask of CALIBRATEDONE field. */
+#define SAADC_INTEN_CALIBRATEDONE_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CALIBRATEDONE_Enabled (1UL) /*!< Enable */
+
+/* Bit 3 : Enable or disable interrupt for event RESULTDONE */
+#define SAADC_INTEN_RESULTDONE_Pos (3UL) /*!< Position of RESULTDONE field. */
+#define SAADC_INTEN_RESULTDONE_Msk (0x1UL << SAADC_INTEN_RESULTDONE_Pos) /*!< Bit mask of RESULTDONE field. */
+#define SAADC_INTEN_RESULTDONE_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_RESULTDONE_Enabled (1UL) /*!< Enable */
+
+/* Bit 2 : Enable or disable interrupt for event DONE */
+#define SAADC_INTEN_DONE_Pos (2UL) /*!< Position of DONE field. */
+#define SAADC_INTEN_DONE_Msk (0x1UL << SAADC_INTEN_DONE_Pos) /*!< Bit mask of DONE field. */
+#define SAADC_INTEN_DONE_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_DONE_Enabled (1UL) /*!< Enable */
+
+/* Bit 1 : Enable or disable interrupt for event END */
+#define SAADC_INTEN_END_Pos (1UL) /*!< Position of END field. */
+#define SAADC_INTEN_END_Msk (0x1UL << SAADC_INTEN_END_Pos) /*!< Bit mask of END field. */
+#define SAADC_INTEN_END_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_END_Enabled (1UL) /*!< Enable */
+
+/* Bit 0 : Enable or disable interrupt for event STARTED */
+#define SAADC_INTEN_STARTED_Pos (0UL) /*!< Position of STARTED field. */
+#define SAADC_INTEN_STARTED_Msk (0x1UL << SAADC_INTEN_STARTED_Pos) /*!< Bit mask of STARTED field. */
+#define SAADC_INTEN_STARTED_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_STARTED_Enabled (1UL) /*!< Enable */
+
+/* Register: SAADC_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 21 : Write '1' to enable interrupt for event CH7LIMITL */
+#define SAADC_INTENSET_CH7LIMITL_Pos (21UL) /*!< Position of CH7LIMITL field. */
+#define SAADC_INTENSET_CH7LIMITL_Msk (0x1UL << SAADC_INTENSET_CH7LIMITL_Pos) /*!< Bit mask of CH7LIMITL field. */
+#define SAADC_INTENSET_CH7LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH7LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH7LIMITL_Set (1UL) /*!< Enable */
+
+/* Bit 20 : Write '1' to enable interrupt for event CH7LIMITH */
+#define SAADC_INTENSET_CH7LIMITH_Pos (20UL) /*!< Position of CH7LIMITH field. */
+#define SAADC_INTENSET_CH7LIMITH_Msk (0x1UL << SAADC_INTENSET_CH7LIMITH_Pos) /*!< Bit mask of CH7LIMITH field. */
+#define SAADC_INTENSET_CH7LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH7LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH7LIMITH_Set (1UL) /*!< Enable */
+
+/* Bit 19 : Write '1' to enable interrupt for event CH6LIMITL */
+#define SAADC_INTENSET_CH6LIMITL_Pos (19UL) /*!< Position of CH6LIMITL field. */
+#define SAADC_INTENSET_CH6LIMITL_Msk (0x1UL << SAADC_INTENSET_CH6LIMITL_Pos) /*!< Bit mask of CH6LIMITL field. */
+#define SAADC_INTENSET_CH6LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH6LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH6LIMITL_Set (1UL) /*!< Enable */
+
+/* Bit 18 : Write '1' to enable interrupt for event CH6LIMITH */
+#define SAADC_INTENSET_CH6LIMITH_Pos (18UL) /*!< Position of CH6LIMITH field. */
+#define SAADC_INTENSET_CH6LIMITH_Msk (0x1UL << SAADC_INTENSET_CH6LIMITH_Pos) /*!< Bit mask of CH6LIMITH field. */
+#define SAADC_INTENSET_CH6LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH6LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH6LIMITH_Set (1UL) /*!< Enable */
+
+/* Bit 17 : Write '1' to enable interrupt for event CH5LIMITL */
+#define SAADC_INTENSET_CH5LIMITL_Pos (17UL) /*!< Position of CH5LIMITL field. */
+#define SAADC_INTENSET_CH5LIMITL_Msk (0x1UL << SAADC_INTENSET_CH5LIMITL_Pos) /*!< Bit mask of CH5LIMITL field. */
+#define SAADC_INTENSET_CH5LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH5LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH5LIMITL_Set (1UL) /*!< Enable */
+
+/* Bit 16 : Write '1' to enable interrupt for event CH5LIMITH */
+#define SAADC_INTENSET_CH5LIMITH_Pos (16UL) /*!< Position of CH5LIMITH field. */
+#define SAADC_INTENSET_CH5LIMITH_Msk (0x1UL << SAADC_INTENSET_CH5LIMITH_Pos) /*!< Bit mask of CH5LIMITH field. */
+#define SAADC_INTENSET_CH5LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH5LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH5LIMITH_Set (1UL) /*!< Enable */
+
+/* Bit 15 : Write '1' to enable interrupt for event CH4LIMITL */
+#define SAADC_INTENSET_CH4LIMITL_Pos (15UL) /*!< Position of CH4LIMITL field. */
+#define SAADC_INTENSET_CH4LIMITL_Msk (0x1UL << SAADC_INTENSET_CH4LIMITL_Pos) /*!< Bit mask of CH4LIMITL field. */
+#define SAADC_INTENSET_CH4LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH4LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH4LIMITL_Set (1UL) /*!< Enable */
+
+/* Bit 14 : Write '1' to enable interrupt for event CH4LIMITH */
+#define SAADC_INTENSET_CH4LIMITH_Pos (14UL) /*!< Position of CH4LIMITH field. */
+#define SAADC_INTENSET_CH4LIMITH_Msk (0x1UL << SAADC_INTENSET_CH4LIMITH_Pos) /*!< Bit mask of CH4LIMITH field. */
+#define SAADC_INTENSET_CH4LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH4LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH4LIMITH_Set (1UL) /*!< Enable */
+
+/* Bit 13 : Write '1' to enable interrupt for event CH3LIMITL */
+#define SAADC_INTENSET_CH3LIMITL_Pos (13UL) /*!< Position of CH3LIMITL field. */
+#define SAADC_INTENSET_CH3LIMITL_Msk (0x1UL << SAADC_INTENSET_CH3LIMITL_Pos) /*!< Bit mask of CH3LIMITL field. */
+#define SAADC_INTENSET_CH3LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH3LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH3LIMITL_Set (1UL) /*!< Enable */
+
+/* Bit 12 : Write '1' to enable interrupt for event CH3LIMITH */
+#define SAADC_INTENSET_CH3LIMITH_Pos (12UL) /*!< Position of CH3LIMITH field. */
+#define SAADC_INTENSET_CH3LIMITH_Msk (0x1UL << SAADC_INTENSET_CH3LIMITH_Pos) /*!< Bit mask of CH3LIMITH field. */
+#define SAADC_INTENSET_CH3LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH3LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH3LIMITH_Set (1UL) /*!< Enable */
+
+/* Bit 11 : Write '1' to enable interrupt for event CH2LIMITL */
+#define SAADC_INTENSET_CH2LIMITL_Pos (11UL) /*!< Position of CH2LIMITL field. */
+#define SAADC_INTENSET_CH2LIMITL_Msk (0x1UL << SAADC_INTENSET_CH2LIMITL_Pos) /*!< Bit mask of CH2LIMITL field. */
+#define SAADC_INTENSET_CH2LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH2LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH2LIMITL_Set (1UL) /*!< Enable */
+
+/* Bit 10 : Write '1' to enable interrupt for event CH2LIMITH */
+#define SAADC_INTENSET_CH2LIMITH_Pos (10UL) /*!< Position of CH2LIMITH field. */
+#define SAADC_INTENSET_CH2LIMITH_Msk (0x1UL << SAADC_INTENSET_CH2LIMITH_Pos) /*!< Bit mask of CH2LIMITH field. */
+#define SAADC_INTENSET_CH2LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH2LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH2LIMITH_Set (1UL) /*!< Enable */
+
+/* Bit 9 : Write '1' to enable interrupt for event CH1LIMITL */
+#define SAADC_INTENSET_CH1LIMITL_Pos (9UL) /*!< Position of CH1LIMITL field. */
+#define SAADC_INTENSET_CH1LIMITL_Msk (0x1UL << SAADC_INTENSET_CH1LIMITL_Pos) /*!< Bit mask of CH1LIMITL field. */
+#define SAADC_INTENSET_CH1LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH1LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH1LIMITL_Set (1UL) /*!< Enable */
+
+/* Bit 8 : Write '1' to enable interrupt for event CH1LIMITH */
+#define SAADC_INTENSET_CH1LIMITH_Pos (8UL) /*!< Position of CH1LIMITH field. */
+#define SAADC_INTENSET_CH1LIMITH_Msk (0x1UL << SAADC_INTENSET_CH1LIMITH_Pos) /*!< Bit mask of CH1LIMITH field. */
+#define SAADC_INTENSET_CH1LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH1LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH1LIMITH_Set (1UL) /*!< Enable */
+
+/* Bit 7 : Write '1' to enable interrupt for event CH0LIMITL */
+#define SAADC_INTENSET_CH0LIMITL_Pos (7UL) /*!< Position of CH0LIMITL field. */
+#define SAADC_INTENSET_CH0LIMITL_Msk (0x1UL << SAADC_INTENSET_CH0LIMITL_Pos) /*!< Bit mask of CH0LIMITL field. */
+#define SAADC_INTENSET_CH0LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH0LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH0LIMITL_Set (1UL) /*!< Enable */
+
+/* Bit 6 : Write '1' to enable interrupt for event CH0LIMITH */
+#define SAADC_INTENSET_CH0LIMITH_Pos (6UL) /*!< Position of CH0LIMITH field. */
+#define SAADC_INTENSET_CH0LIMITH_Msk (0x1UL << SAADC_INTENSET_CH0LIMITH_Pos) /*!< Bit mask of CH0LIMITH field. */
+#define SAADC_INTENSET_CH0LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH0LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH0LIMITH_Set (1UL) /*!< Enable */
+
+/* Bit 5 : Write '1' to enable interrupt for event STOPPED */
+#define SAADC_INTENSET_STOPPED_Pos (5UL) /*!< Position of STOPPED field. */
+#define SAADC_INTENSET_STOPPED_Msk (0x1UL << SAADC_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define SAADC_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_STOPPED_Set (1UL) /*!< Enable */
+
+/* Bit 4 : Write '1' to enable interrupt for event CALIBRATEDONE */
+#define SAADC_INTENSET_CALIBRATEDONE_Pos (4UL) /*!< Position of CALIBRATEDONE field. */
+#define SAADC_INTENSET_CALIBRATEDONE_Msk (0x1UL << SAADC_INTENSET_CALIBRATEDONE_Pos) /*!< Bit mask of CALIBRATEDONE field. */
+#define SAADC_INTENSET_CALIBRATEDONE_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CALIBRATEDONE_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CALIBRATEDONE_Set (1UL) /*!< Enable */
+
+/* Bit 3 : Write '1' to enable interrupt for event RESULTDONE */
+#define SAADC_INTENSET_RESULTDONE_Pos (3UL) /*!< Position of RESULTDONE field. */
+#define SAADC_INTENSET_RESULTDONE_Msk (0x1UL << SAADC_INTENSET_RESULTDONE_Pos) /*!< Bit mask of RESULTDONE field. */
+#define SAADC_INTENSET_RESULTDONE_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_RESULTDONE_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_RESULTDONE_Set (1UL) /*!< Enable */
+
+/* Bit 2 : Write '1' to enable interrupt for event DONE */
+#define SAADC_INTENSET_DONE_Pos (2UL) /*!< Position of DONE field. */
+#define SAADC_INTENSET_DONE_Msk (0x1UL << SAADC_INTENSET_DONE_Pos) /*!< Bit mask of DONE field. */
+#define SAADC_INTENSET_DONE_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_DONE_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_DONE_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event END */
+#define SAADC_INTENSET_END_Pos (1UL) /*!< Position of END field. */
+#define SAADC_INTENSET_END_Msk (0x1UL << SAADC_INTENSET_END_Pos) /*!< Bit mask of END field. */
+#define SAADC_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_END_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event STARTED */
+#define SAADC_INTENSET_STARTED_Pos (0UL) /*!< Position of STARTED field. */
+#define SAADC_INTENSET_STARTED_Msk (0x1UL << SAADC_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */
+#define SAADC_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_STARTED_Set (1UL) /*!< Enable */
+
+/* Register: SAADC_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 21 : Write '1' to disable interrupt for event CH7LIMITL */
+#define SAADC_INTENCLR_CH7LIMITL_Pos (21UL) /*!< Position of CH7LIMITL field. */
+#define SAADC_INTENCLR_CH7LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH7LIMITL_Pos) /*!< Bit mask of CH7LIMITL field. */
+#define SAADC_INTENCLR_CH7LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH7LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH7LIMITL_Clear (1UL) /*!< Disable */
+
+/* Bit 20 : Write '1' to disable interrupt for event CH7LIMITH */
+#define SAADC_INTENCLR_CH7LIMITH_Pos (20UL) /*!< Position of CH7LIMITH field. */
+#define SAADC_INTENCLR_CH7LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH7LIMITH_Pos) /*!< Bit mask of CH7LIMITH field. */
+#define SAADC_INTENCLR_CH7LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH7LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH7LIMITH_Clear (1UL) /*!< Disable */
+
+/* Bit 19 : Write '1' to disable interrupt for event CH6LIMITL */
+#define SAADC_INTENCLR_CH6LIMITL_Pos (19UL) /*!< Position of CH6LIMITL field. */
+#define SAADC_INTENCLR_CH6LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH6LIMITL_Pos) /*!< Bit mask of CH6LIMITL field. */
+#define SAADC_INTENCLR_CH6LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH6LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH6LIMITL_Clear (1UL) /*!< Disable */
+
+/* Bit 18 : Write '1' to disable interrupt for event CH6LIMITH */
+#define SAADC_INTENCLR_CH6LIMITH_Pos (18UL) /*!< Position of CH6LIMITH field. */
+#define SAADC_INTENCLR_CH6LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH6LIMITH_Pos) /*!< Bit mask of CH6LIMITH field. */
+#define SAADC_INTENCLR_CH6LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH6LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH6LIMITH_Clear (1UL) /*!< Disable */
+
+/* Bit 17 : Write '1' to disable interrupt for event CH5LIMITL */
+#define SAADC_INTENCLR_CH5LIMITL_Pos (17UL) /*!< Position of CH5LIMITL field. */
+#define SAADC_INTENCLR_CH5LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH5LIMITL_Pos) /*!< Bit mask of CH5LIMITL field. */
+#define SAADC_INTENCLR_CH5LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH5LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH5LIMITL_Clear (1UL) /*!< Disable */
+
+/* Bit 16 : Write '1' to disable interrupt for event CH5LIMITH */
+#define SAADC_INTENCLR_CH5LIMITH_Pos (16UL) /*!< Position of CH5LIMITH field. */
+#define SAADC_INTENCLR_CH5LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH5LIMITH_Pos) /*!< Bit mask of CH5LIMITH field. */
+#define SAADC_INTENCLR_CH5LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH5LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH5LIMITH_Clear (1UL) /*!< Disable */
+
+/* Bit 15 : Write '1' to disable interrupt for event CH4LIMITL */
+#define SAADC_INTENCLR_CH4LIMITL_Pos (15UL) /*!< Position of CH4LIMITL field. */
+#define SAADC_INTENCLR_CH4LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH4LIMITL_Pos) /*!< Bit mask of CH4LIMITL field. */
+#define SAADC_INTENCLR_CH4LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH4LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH4LIMITL_Clear (1UL) /*!< Disable */
+
+/* Bit 14 : Write '1' to disable interrupt for event CH4LIMITH */
+#define SAADC_INTENCLR_CH4LIMITH_Pos (14UL) /*!< Position of CH4LIMITH field. */
+#define SAADC_INTENCLR_CH4LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH4LIMITH_Pos) /*!< Bit mask of CH4LIMITH field. */
+#define SAADC_INTENCLR_CH4LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH4LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH4LIMITH_Clear (1UL) /*!< Disable */
+
+/* Bit 13 : Write '1' to disable interrupt for event CH3LIMITL */
+#define SAADC_INTENCLR_CH3LIMITL_Pos (13UL) /*!< Position of CH3LIMITL field. */
+#define SAADC_INTENCLR_CH3LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH3LIMITL_Pos) /*!< Bit mask of CH3LIMITL field. */
+#define SAADC_INTENCLR_CH3LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH3LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH3LIMITL_Clear (1UL) /*!< Disable */
+
+/* Bit 12 : Write '1' to disable interrupt for event CH3LIMITH */
+#define SAADC_INTENCLR_CH3LIMITH_Pos (12UL) /*!< Position of CH3LIMITH field. */
+#define SAADC_INTENCLR_CH3LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH3LIMITH_Pos) /*!< Bit mask of CH3LIMITH field. */
+#define SAADC_INTENCLR_CH3LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH3LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH3LIMITH_Clear (1UL) /*!< Disable */
+
+/* Bit 11 : Write '1' to disable interrupt for event CH2LIMITL */
+#define SAADC_INTENCLR_CH2LIMITL_Pos (11UL) /*!< Position of CH2LIMITL field. */
+#define SAADC_INTENCLR_CH2LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH2LIMITL_Pos) /*!< Bit mask of CH2LIMITL field. */
+#define SAADC_INTENCLR_CH2LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH2LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH2LIMITL_Clear (1UL) /*!< Disable */
+
+/* Bit 10 : Write '1' to disable interrupt for event CH2LIMITH */
+#define SAADC_INTENCLR_CH2LIMITH_Pos (10UL) /*!< Position of CH2LIMITH field. */
+#define SAADC_INTENCLR_CH2LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH2LIMITH_Pos) /*!< Bit mask of CH2LIMITH field. */
+#define SAADC_INTENCLR_CH2LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH2LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH2LIMITH_Clear (1UL) /*!< Disable */
+
+/* Bit 9 : Write '1' to disable interrupt for event CH1LIMITL */
+#define SAADC_INTENCLR_CH1LIMITL_Pos (9UL) /*!< Position of CH1LIMITL field. */
+#define SAADC_INTENCLR_CH1LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH1LIMITL_Pos) /*!< Bit mask of CH1LIMITL field. */
+#define SAADC_INTENCLR_CH1LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH1LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH1LIMITL_Clear (1UL) /*!< Disable */
+
+/* Bit 8 : Write '1' to disable interrupt for event CH1LIMITH */
+#define SAADC_INTENCLR_CH1LIMITH_Pos (8UL) /*!< Position of CH1LIMITH field. */
+#define SAADC_INTENCLR_CH1LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH1LIMITH_Pos) /*!< Bit mask of CH1LIMITH field. */
+#define SAADC_INTENCLR_CH1LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH1LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH1LIMITH_Clear (1UL) /*!< Disable */
+
+/* Bit 7 : Write '1' to disable interrupt for event CH0LIMITL */
+#define SAADC_INTENCLR_CH0LIMITL_Pos (7UL) /*!< Position of CH0LIMITL field. */
+#define SAADC_INTENCLR_CH0LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH0LIMITL_Pos) /*!< Bit mask of CH0LIMITL field. */
+#define SAADC_INTENCLR_CH0LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH0LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH0LIMITL_Clear (1UL) /*!< Disable */
+
+/* Bit 6 : Write '1' to disable interrupt for event CH0LIMITH */
+#define SAADC_INTENCLR_CH0LIMITH_Pos (6UL) /*!< Position of CH0LIMITH field. */
+#define SAADC_INTENCLR_CH0LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH0LIMITH_Pos) /*!< Bit mask of CH0LIMITH field. */
+#define SAADC_INTENCLR_CH0LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH0LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH0LIMITH_Clear (1UL) /*!< Disable */
+
+/* Bit 5 : Write '1' to disable interrupt for event STOPPED */
+#define SAADC_INTENCLR_STOPPED_Pos (5UL) /*!< Position of STOPPED field. */
+#define SAADC_INTENCLR_STOPPED_Msk (0x1UL << SAADC_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define SAADC_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */
+
+/* Bit 4 : Write '1' to disable interrupt for event CALIBRATEDONE */
+#define SAADC_INTENCLR_CALIBRATEDONE_Pos (4UL) /*!< Position of CALIBRATEDONE field. */
+#define SAADC_INTENCLR_CALIBRATEDONE_Msk (0x1UL << SAADC_INTENCLR_CALIBRATEDONE_Pos) /*!< Bit mask of CALIBRATEDONE field. */
+#define SAADC_INTENCLR_CALIBRATEDONE_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CALIBRATEDONE_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CALIBRATEDONE_Clear (1UL) /*!< Disable */
+
+/* Bit 3 : Write '1' to disable interrupt for event RESULTDONE */
+#define SAADC_INTENCLR_RESULTDONE_Pos (3UL) /*!< Position of RESULTDONE field. */
+#define SAADC_INTENCLR_RESULTDONE_Msk (0x1UL << SAADC_INTENCLR_RESULTDONE_Pos) /*!< Bit mask of RESULTDONE field. */
+#define SAADC_INTENCLR_RESULTDONE_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_RESULTDONE_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_RESULTDONE_Clear (1UL) /*!< Disable */
+
+/* Bit 2 : Write '1' to disable interrupt for event DONE */
+#define SAADC_INTENCLR_DONE_Pos (2UL) /*!< Position of DONE field. */
+#define SAADC_INTENCLR_DONE_Msk (0x1UL << SAADC_INTENCLR_DONE_Pos) /*!< Bit mask of DONE field. */
+#define SAADC_INTENCLR_DONE_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_DONE_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_DONE_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event END */
+#define SAADC_INTENCLR_END_Pos (1UL) /*!< Position of END field. */
+#define SAADC_INTENCLR_END_Msk (0x1UL << SAADC_INTENCLR_END_Pos) /*!< Bit mask of END field. */
+#define SAADC_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_END_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event STARTED */
+#define SAADC_INTENCLR_STARTED_Pos (0UL) /*!< Position of STARTED field. */
+#define SAADC_INTENCLR_STARTED_Msk (0x1UL << SAADC_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */
+#define SAADC_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_STARTED_Clear (1UL) /*!< Disable */
+
+/* Register: SAADC_STATUS */
+/* Description: Status */
+
+/* Bit 0 : Status */
+#define SAADC_STATUS_STATUS_Pos (0UL) /*!< Position of STATUS field. */
+#define SAADC_STATUS_STATUS_Msk (0x1UL << SAADC_STATUS_STATUS_Pos) /*!< Bit mask of STATUS field. */
+#define SAADC_STATUS_STATUS_Ready (0UL) /*!< ADC is ready. No on-going conversion. */
+#define SAADC_STATUS_STATUS_Busy (1UL) /*!< ADC is busy. Conversion in progress. */
+
+/* Register: SAADC_ENABLE */
+/* Description: Enable or disable ADC */
+
+/* Bit 0 : Enable or disable ADC */
+#define SAADC_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define SAADC_ENABLE_ENABLE_Msk (0x1UL << SAADC_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define SAADC_ENABLE_ENABLE_Disabled (0UL) /*!< Disable ADC */
+#define SAADC_ENABLE_ENABLE_Enabled (1UL) /*!< Enable ADC */
+
+/* Register: SAADC_CH_PSELP */
+/* Description: Description cluster: Input positive pin selection for CH[n] */
+
+/* Bits 4..0 : Analog positive input channel */
+#define SAADC_CH_PSELP_PSELP_Pos (0UL) /*!< Position of PSELP field. */
+#define SAADC_CH_PSELP_PSELP_Msk (0x1FUL << SAADC_CH_PSELP_PSELP_Pos) /*!< Bit mask of PSELP field. */
+#define SAADC_CH_PSELP_PSELP_NC (0UL) /*!< Not connected */
+#define SAADC_CH_PSELP_PSELP_AnalogInput0 (1UL) /*!< AIN0 */
+#define SAADC_CH_PSELP_PSELP_AnalogInput1 (2UL) /*!< AIN1 */
+#define SAADC_CH_PSELP_PSELP_AnalogInput2 (3UL) /*!< AIN2 */
+#define SAADC_CH_PSELP_PSELP_AnalogInput3 (4UL) /*!< AIN3 */
+#define SAADC_CH_PSELP_PSELP_AnalogInput4 (5UL) /*!< AIN4 */
+#define SAADC_CH_PSELP_PSELP_AnalogInput5 (6UL) /*!< AIN5 */
+#define SAADC_CH_PSELP_PSELP_AnalogInput6 (7UL) /*!< AIN6 */
+#define SAADC_CH_PSELP_PSELP_AnalogInput7 (8UL) /*!< AIN7 */
+#define SAADC_CH_PSELP_PSELP_VDD (9UL) /*!< VDD */
+
+/* Register: SAADC_CH_PSELN */
+/* Description: Description cluster: Input negative pin selection for CH[n] */
+
+/* Bits 4..0 : Analog negative input, enables differential channel */
+#define SAADC_CH_PSELN_PSELN_Pos (0UL) /*!< Position of PSELN field. */
+#define SAADC_CH_PSELN_PSELN_Msk (0x1FUL << SAADC_CH_PSELN_PSELN_Pos) /*!< Bit mask of PSELN field. */
+#define SAADC_CH_PSELN_PSELN_NC (0UL) /*!< Not connected */
+#define SAADC_CH_PSELN_PSELN_AnalogInput0 (1UL) /*!< AIN0 */
+#define SAADC_CH_PSELN_PSELN_AnalogInput1 (2UL) /*!< AIN1 */
+#define SAADC_CH_PSELN_PSELN_AnalogInput2 (3UL) /*!< AIN2 */
+#define SAADC_CH_PSELN_PSELN_AnalogInput3 (4UL) /*!< AIN3 */
+#define SAADC_CH_PSELN_PSELN_AnalogInput4 (5UL) /*!< AIN4 */
+#define SAADC_CH_PSELN_PSELN_AnalogInput5 (6UL) /*!< AIN5 */
+#define SAADC_CH_PSELN_PSELN_AnalogInput6 (7UL) /*!< AIN6 */
+#define SAADC_CH_PSELN_PSELN_AnalogInput7 (8UL) /*!< AIN7 */
+#define SAADC_CH_PSELN_PSELN_VDD (9UL) /*!< VDD */
+
+/* Register: SAADC_CH_CONFIG */
+/* Description: Description cluster: Input configuration for CH[n] */
+
+/* Bit 24 : Enable burst mode */
+#define SAADC_CH_CONFIG_BURST_Pos (24UL) /*!< Position of BURST field. */
+#define SAADC_CH_CONFIG_BURST_Msk (0x1UL << SAADC_CH_CONFIG_BURST_Pos) /*!< Bit mask of BURST field. */
+#define SAADC_CH_CONFIG_BURST_Disabled (0UL) /*!< Burst mode is disabled (normal operation) */
+#define SAADC_CH_CONFIG_BURST_Enabled (1UL) /*!< Burst mode is enabled. SAADC takes 2^OVERSAMPLE number of samples as fast as it can, and sends the average to Data RAM. */
+
+/* Bit 20 : Enable differential mode */
+#define SAADC_CH_CONFIG_MODE_Pos (20UL) /*!< Position of MODE field. */
+#define SAADC_CH_CONFIG_MODE_Msk (0x1UL << SAADC_CH_CONFIG_MODE_Pos) /*!< Bit mask of MODE field. */
+#define SAADC_CH_CONFIG_MODE_SE (0UL) /*!< Single ended, PSELN will be ignored, negative input to ADC shorted to GND */
+#define SAADC_CH_CONFIG_MODE_Diff (1UL) /*!< Differential */
+
+/* Bits 18..16 : Acquisition time, the time the ADC uses to sample the input voltage */
+#define SAADC_CH_CONFIG_TACQ_Pos (16UL) /*!< Position of TACQ field. */
+#define SAADC_CH_CONFIG_TACQ_Msk (0x7UL << SAADC_CH_CONFIG_TACQ_Pos) /*!< Bit mask of TACQ field. */
+#define SAADC_CH_CONFIG_TACQ_3us (0UL) /*!< 3 us */
+#define SAADC_CH_CONFIG_TACQ_5us (1UL) /*!< 5 us */
+#define SAADC_CH_CONFIG_TACQ_10us (2UL) /*!< 10 us */
+#define SAADC_CH_CONFIG_TACQ_15us (3UL) /*!< 15 us */
+#define SAADC_CH_CONFIG_TACQ_20us (4UL) /*!< 20 us */
+#define SAADC_CH_CONFIG_TACQ_40us (5UL) /*!< 40 us */
+
+/* Bit 12 : Reference control */
+#define SAADC_CH_CONFIG_REFSEL_Pos (12UL) /*!< Position of REFSEL field. */
+#define SAADC_CH_CONFIG_REFSEL_Msk (0x1UL << SAADC_CH_CONFIG_REFSEL_Pos) /*!< Bit mask of REFSEL field. */
+#define SAADC_CH_CONFIG_REFSEL_Internal (0UL) /*!< Internal reference (0.6 V) */
+#define SAADC_CH_CONFIG_REFSEL_VDD1_4 (1UL) /*!< VDD/4 as reference */
+
+/* Bits 10..8 : Gain control */
+#define SAADC_CH_CONFIG_GAIN_Pos (8UL) /*!< Position of GAIN field. */
+#define SAADC_CH_CONFIG_GAIN_Msk (0x7UL << SAADC_CH_CONFIG_GAIN_Pos) /*!< Bit mask of GAIN field. */
+#define SAADC_CH_CONFIG_GAIN_Gain1_6 (0UL) /*!< 1/6 */
+#define SAADC_CH_CONFIG_GAIN_Gain1_5 (1UL) /*!< 1/5 */
+#define SAADC_CH_CONFIG_GAIN_Gain1_4 (2UL) /*!< 1/4 */
+#define SAADC_CH_CONFIG_GAIN_Gain1_3 (3UL) /*!< 1/3 */
+#define SAADC_CH_CONFIG_GAIN_Gain1_2 (4UL) /*!< 1/2 */
+#define SAADC_CH_CONFIG_GAIN_Gain1 (5UL) /*!< 1 */
+#define SAADC_CH_CONFIG_GAIN_Gain2 (6UL) /*!< 2 */
+#define SAADC_CH_CONFIG_GAIN_Gain4 (7UL) /*!< 4 */
+
+/* Bits 5..4 : Negative channel resistor control */
+#define SAADC_CH_CONFIG_RESN_Pos (4UL) /*!< Position of RESN field. */
+#define SAADC_CH_CONFIG_RESN_Msk (0x3UL << SAADC_CH_CONFIG_RESN_Pos) /*!< Bit mask of RESN field. */
+#define SAADC_CH_CONFIG_RESN_Bypass (0UL) /*!< Bypass resistor ladder */
+#define SAADC_CH_CONFIG_RESN_Pulldown (1UL) /*!< Pull-down to GND */
+#define SAADC_CH_CONFIG_RESN_Pullup (2UL) /*!< Pull-up to VDD */
+#define SAADC_CH_CONFIG_RESN_VDD1_2 (3UL) /*!< Set input at VDD/2 */
+
+/* Bits 1..0 : Positive channel resistor control */
+#define SAADC_CH_CONFIG_RESP_Pos (0UL) /*!< Position of RESP field. */
+#define SAADC_CH_CONFIG_RESP_Msk (0x3UL << SAADC_CH_CONFIG_RESP_Pos) /*!< Bit mask of RESP field. */
+#define SAADC_CH_CONFIG_RESP_Bypass (0UL) /*!< Bypass resistor ladder */
+#define SAADC_CH_CONFIG_RESP_Pulldown (1UL) /*!< Pull-down to GND */
+#define SAADC_CH_CONFIG_RESP_Pullup (2UL) /*!< Pull-up to VDD */
+#define SAADC_CH_CONFIG_RESP_VDD1_2 (3UL) /*!< Set input at VDD/2 */
+
+/* Register: SAADC_CH_LIMIT */
+/* Description: Description cluster: High/low limits for event monitoring a channel */
+
+/* Bits 31..16 : High level limit */
+#define SAADC_CH_LIMIT_HIGH_Pos (16UL) /*!< Position of HIGH field. */
+#define SAADC_CH_LIMIT_HIGH_Msk (0xFFFFUL << SAADC_CH_LIMIT_HIGH_Pos) /*!< Bit mask of HIGH field. */
+
+/* Bits 15..0 : Low level limit */
+#define SAADC_CH_LIMIT_LOW_Pos (0UL) /*!< Position of LOW field. */
+#define SAADC_CH_LIMIT_LOW_Msk (0xFFFFUL << SAADC_CH_LIMIT_LOW_Pos) /*!< Bit mask of LOW field. */
+
+/* Register: SAADC_RESOLUTION */
+/* Description: Resolution configuration */
+
+/* Bits 2..0 : Set the resolution */
+#define SAADC_RESOLUTION_VAL_Pos (0UL) /*!< Position of VAL field. */
+#define SAADC_RESOLUTION_VAL_Msk (0x7UL << SAADC_RESOLUTION_VAL_Pos) /*!< Bit mask of VAL field. */
+#define SAADC_RESOLUTION_VAL_8bit (0UL) /*!< 8 bit */
+#define SAADC_RESOLUTION_VAL_10bit (1UL) /*!< 10 bit */
+#define SAADC_RESOLUTION_VAL_12bit (2UL) /*!< 12 bit */
+#define SAADC_RESOLUTION_VAL_14bit (3UL) /*!< 14 bit */
+
+/* Register: SAADC_OVERSAMPLE */
+/* Description: Oversampling configuration. OVERSAMPLE should not be combined with SCAN. The RESOLUTION is applied before averaging, thus for high OVERSAMPLE a higher RESOLUTION should be used. */
+
+/* Bits 3..0 : Oversample control */
+#define SAADC_OVERSAMPLE_OVERSAMPLE_Pos (0UL) /*!< Position of OVERSAMPLE field. */
+#define SAADC_OVERSAMPLE_OVERSAMPLE_Msk (0xFUL << SAADC_OVERSAMPLE_OVERSAMPLE_Pos) /*!< Bit mask of OVERSAMPLE field. */
+#define SAADC_OVERSAMPLE_OVERSAMPLE_Bypass (0UL) /*!< Bypass oversampling */
+#define SAADC_OVERSAMPLE_OVERSAMPLE_Over2x (1UL) /*!< Oversample 2x */
+#define SAADC_OVERSAMPLE_OVERSAMPLE_Over4x (2UL) /*!< Oversample 4x */
+#define SAADC_OVERSAMPLE_OVERSAMPLE_Over8x (3UL) /*!< Oversample 8x */
+#define SAADC_OVERSAMPLE_OVERSAMPLE_Over16x (4UL) /*!< Oversample 16x */
+#define SAADC_OVERSAMPLE_OVERSAMPLE_Over32x (5UL) /*!< Oversample 32x */
+#define SAADC_OVERSAMPLE_OVERSAMPLE_Over64x (6UL) /*!< Oversample 64x */
+#define SAADC_OVERSAMPLE_OVERSAMPLE_Over128x (7UL) /*!< Oversample 128x */
+#define SAADC_OVERSAMPLE_OVERSAMPLE_Over256x (8UL) /*!< Oversample 256x */
+
+/* Register: SAADC_SAMPLERATE */
+/* Description: Controls normal or continuous sample rate */
+
+/* Bit 12 : Select mode for sample rate control */
+#define SAADC_SAMPLERATE_MODE_Pos (12UL) /*!< Position of MODE field. */
+#define SAADC_SAMPLERATE_MODE_Msk (0x1UL << SAADC_SAMPLERATE_MODE_Pos) /*!< Bit mask of MODE field. */
+#define SAADC_SAMPLERATE_MODE_Task (0UL) /*!< Rate is controlled from SAMPLE task */
+#define SAADC_SAMPLERATE_MODE_Timers (1UL) /*!< Rate is controlled from local timer (use CC to control the rate) */
+
+/* Bits 10..0 : Capture and compare value. Sample rate is 16 MHz/CC */
+#define SAADC_SAMPLERATE_CC_Pos (0UL) /*!< Position of CC field. */
+#define SAADC_SAMPLERATE_CC_Msk (0x7FFUL << SAADC_SAMPLERATE_CC_Pos) /*!< Bit mask of CC field. */
+
+/* Register: SAADC_RESULT_PTR */
+/* Description: Data pointer */
+
+/* Bits 31..0 : Data pointer */
+#define SAADC_RESULT_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define SAADC_RESULT_PTR_PTR_Msk (0xFFFFFFFFUL << SAADC_RESULT_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: SAADC_RESULT_MAXCNT */
+/* Description: Maximum number of buffer words to transfer */
+
+/* Bits 14..0 : Maximum number of buffer words to transfer */
+#define SAADC_RESULT_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define SAADC_RESULT_MAXCNT_MAXCNT_Msk (0x7FFFUL << SAADC_RESULT_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: SAADC_RESULT_AMOUNT */
+/* Description: Number of buffer words transferred since last START */
+
+/* Bits 14..0 : Number of buffer words transferred since last START. This register can be read after an END or STOPPED event. */
+#define SAADC_RESULT_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define SAADC_RESULT_AMOUNT_AMOUNT_Msk (0x7FFFUL << SAADC_RESULT_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+
+/* Peripheral: SPI */
+/* Description: Serial Peripheral Interface */
+
+/* Register: SPI_EVENTS_READY */
+/* Description: TXD byte sent and RXD byte received */
+
+/* Bit 0 : TXD byte sent and RXD byte received */
+#define SPI_EVENTS_READY_EVENTS_READY_Pos (0UL) /*!< Position of EVENTS_READY field. */
+#define SPI_EVENTS_READY_EVENTS_READY_Msk (0x1UL << SPI_EVENTS_READY_EVENTS_READY_Pos) /*!< Bit mask of EVENTS_READY field. */
+#define SPI_EVENTS_READY_EVENTS_READY_NotGenerated (0UL) /*!< Event not generated */
+#define SPI_EVENTS_READY_EVENTS_READY_Generated (1UL) /*!< Event generated */
+
+/* Register: SPI_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 2 : Write '1' to enable interrupt for event READY */
+#define SPI_INTENSET_READY_Pos (2UL) /*!< Position of READY field. */
+#define SPI_INTENSET_READY_Msk (0x1UL << SPI_INTENSET_READY_Pos) /*!< Bit mask of READY field. */
+#define SPI_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */
+#define SPI_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */
+#define SPI_INTENSET_READY_Set (1UL) /*!< Enable */
+
+/* Register: SPI_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 2 : Write '1' to disable interrupt for event READY */
+#define SPI_INTENCLR_READY_Pos (2UL) /*!< Position of READY field. */
+#define SPI_INTENCLR_READY_Msk (0x1UL << SPI_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */
+#define SPI_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */
+#define SPI_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */
+#define SPI_INTENCLR_READY_Clear (1UL) /*!< Disable */
+
+/* Register: SPI_ENABLE */
+/* Description: Enable SPI */
+
+/* Bits 3..0 : Enable or disable SPI */
+#define SPI_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define SPI_ENABLE_ENABLE_Msk (0xFUL << SPI_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define SPI_ENABLE_ENABLE_Disabled (0UL) /*!< Disable SPI */
+#define SPI_ENABLE_ENABLE_Enabled (1UL) /*!< Enable SPI */
+
+/* Register: SPI_PSEL_SCK */
+/* Description: Pin select for SCK */
+
+/* Bit 31 : Connection */
+#define SPI_PSEL_SCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define SPI_PSEL_SCK_CONNECT_Msk (0x1UL << SPI_PSEL_SCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define SPI_PSEL_SCK_CONNECT_Connected (0UL) /*!< Connect */
+#define SPI_PSEL_SCK_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bits 4..0 : Pin number */
+#define SPI_PSEL_SCK_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define SPI_PSEL_SCK_PIN_Msk (0x1FUL << SPI_PSEL_SCK_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: SPI_PSEL_MOSI */
+/* Description: Pin select for MOSI signal */
+
+/* Bit 31 : Connection */
+#define SPI_PSEL_MOSI_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define SPI_PSEL_MOSI_CONNECT_Msk (0x1UL << SPI_PSEL_MOSI_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define SPI_PSEL_MOSI_CONNECT_Connected (0UL) /*!< Connect */
+#define SPI_PSEL_MOSI_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bits 4..0 : Pin number */
+#define SPI_PSEL_MOSI_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define SPI_PSEL_MOSI_PIN_Msk (0x1FUL << SPI_PSEL_MOSI_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: SPI_PSEL_MISO */
+/* Description: Pin select for MISO signal */
+
+/* Bit 31 : Connection */
+#define SPI_PSEL_MISO_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define SPI_PSEL_MISO_CONNECT_Msk (0x1UL << SPI_PSEL_MISO_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define SPI_PSEL_MISO_CONNECT_Connected (0UL) /*!< Connect */
+#define SPI_PSEL_MISO_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bits 4..0 : Pin number */
+#define SPI_PSEL_MISO_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define SPI_PSEL_MISO_PIN_Msk (0x1FUL << SPI_PSEL_MISO_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: SPI_RXD */
+/* Description: RXD register */
+
+/* Bits 7..0 : RX data received. Double buffered */
+#define SPI_RXD_RXD_Pos (0UL) /*!< Position of RXD field. */
+#define SPI_RXD_RXD_Msk (0xFFUL << SPI_RXD_RXD_Pos) /*!< Bit mask of RXD field. */
+
+/* Register: SPI_TXD */
+/* Description: TXD register */
+
+/* Bits 7..0 : TX data to send. Double buffered */
+#define SPI_TXD_TXD_Pos (0UL) /*!< Position of TXD field. */
+#define SPI_TXD_TXD_Msk (0xFFUL << SPI_TXD_TXD_Pos) /*!< Bit mask of TXD field. */
+
+/* Register: SPI_FREQUENCY */
+/* Description: SPI frequency. Accuracy depends on the HFCLK source selected. */
+
+/* Bits 31..0 : SPI master data rate */
+#define SPI_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */
+#define SPI_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << SPI_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */
+#define SPI_FREQUENCY_FREQUENCY_K125 (0x02000000UL) /*!< 125 kbps */
+#define SPI_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps */
+#define SPI_FREQUENCY_FREQUENCY_K500 (0x08000000UL) /*!< 500 kbps */
+#define SPI_FREQUENCY_FREQUENCY_M1 (0x10000000UL) /*!< 1 Mbps */
+#define SPI_FREQUENCY_FREQUENCY_M2 (0x20000000UL) /*!< 2 Mbps */
+#define SPI_FREQUENCY_FREQUENCY_M4 (0x40000000UL) /*!< 4 Mbps */
+#define SPI_FREQUENCY_FREQUENCY_M8 (0x80000000UL) /*!< 8 Mbps */
+
+/* Register: SPI_CONFIG */
+/* Description: Configuration register */
+
+/* Bit 2 : Serial clock (SCK) polarity */
+#define SPI_CONFIG_CPOL_Pos (2UL) /*!< Position of CPOL field. */
+#define SPI_CONFIG_CPOL_Msk (0x1UL << SPI_CONFIG_CPOL_Pos) /*!< Bit mask of CPOL field. */
+#define SPI_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high */
+#define SPI_CONFIG_CPOL_ActiveLow (1UL) /*!< Active low */
+
+/* Bit 1 : Serial clock (SCK) phase */
+#define SPI_CONFIG_CPHA_Pos (1UL) /*!< Position of CPHA field. */
+#define SPI_CONFIG_CPHA_Msk (0x1UL << SPI_CONFIG_CPHA_Pos) /*!< Bit mask of CPHA field. */
+#define SPI_CONFIG_CPHA_Leading (0UL) /*!< Sample on leading edge of clock, shift serial data on trailing edge */
+#define SPI_CONFIG_CPHA_Trailing (1UL) /*!< Sample on trailing edge of clock, shift serial data on leading edge */
+
+/* Bit 0 : Bit order */
+#define SPI_CONFIG_ORDER_Pos (0UL) /*!< Position of ORDER field. */
+#define SPI_CONFIG_ORDER_Msk (0x1UL << SPI_CONFIG_ORDER_Pos) /*!< Bit mask of ORDER field. */
+#define SPI_CONFIG_ORDER_MsbFirst (0UL) /*!< Most significant bit shifted out first */
+#define SPI_CONFIG_ORDER_LsbFirst (1UL) /*!< Least significant bit shifted out first */
+
+
+/* Peripheral: SPIM */
+/* Description: Serial Peripheral Interface Master with EasyDMA */
+
+/* Register: SPIM_TASKS_START */
+/* Description: Start SPI transaction */
+
+/* Bit 0 : Start SPI transaction */
+#define SPIM_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */
+#define SPIM_TASKS_START_TASKS_START_Msk (0x1UL << SPIM_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */
+#define SPIM_TASKS_START_TASKS_START_Trigger (1UL) /*!< Trigger task */
+
+/* Register: SPIM_TASKS_STOP */
+/* Description: Stop SPI transaction */
+
+/* Bit 0 : Stop SPI transaction */
+#define SPIM_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define SPIM_TASKS_STOP_TASKS_STOP_Msk (0x1UL << SPIM_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define SPIM_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: SPIM_TASKS_SUSPEND */
+/* Description: Suspend SPI transaction */
+
+/* Bit 0 : Suspend SPI transaction */
+#define SPIM_TASKS_SUSPEND_TASKS_SUSPEND_Pos (0UL) /*!< Position of TASKS_SUSPEND field. */
+#define SPIM_TASKS_SUSPEND_TASKS_SUSPEND_Msk (0x1UL << SPIM_TASKS_SUSPEND_TASKS_SUSPEND_Pos) /*!< Bit mask of TASKS_SUSPEND field. */
+#define SPIM_TASKS_SUSPEND_TASKS_SUSPEND_Trigger (1UL) /*!< Trigger task */
+
+/* Register: SPIM_TASKS_RESUME */
+/* Description: Resume SPI transaction */
+
+/* Bit 0 : Resume SPI transaction */
+#define SPIM_TASKS_RESUME_TASKS_RESUME_Pos (0UL) /*!< Position of TASKS_RESUME field. */
+#define SPIM_TASKS_RESUME_TASKS_RESUME_Msk (0x1UL << SPIM_TASKS_RESUME_TASKS_RESUME_Pos) /*!< Bit mask of TASKS_RESUME field. */
+#define SPIM_TASKS_RESUME_TASKS_RESUME_Trigger (1UL) /*!< Trigger task */
+
+/* Register: SPIM_EVENTS_STOPPED */
+/* Description: SPI transaction has stopped */
+
+/* Bit 0 : SPI transaction has stopped */
+#define SPIM_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */
+#define SPIM_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << SPIM_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */
+#define SPIM_EVENTS_STOPPED_EVENTS_STOPPED_NotGenerated (0UL) /*!< Event not generated */
+#define SPIM_EVENTS_STOPPED_EVENTS_STOPPED_Generated (1UL) /*!< Event generated */
+
+/* Register: SPIM_EVENTS_ENDRX */
+/* Description: End of RXD buffer reached */
+
+/* Bit 0 : End of RXD buffer reached */
+#define SPIM_EVENTS_ENDRX_EVENTS_ENDRX_Pos (0UL) /*!< Position of EVENTS_ENDRX field. */
+#define SPIM_EVENTS_ENDRX_EVENTS_ENDRX_Msk (0x1UL << SPIM_EVENTS_ENDRX_EVENTS_ENDRX_Pos) /*!< Bit mask of EVENTS_ENDRX field. */
+#define SPIM_EVENTS_ENDRX_EVENTS_ENDRX_NotGenerated (0UL) /*!< Event not generated */
+#define SPIM_EVENTS_ENDRX_EVENTS_ENDRX_Generated (1UL) /*!< Event generated */
+
+/* Register: SPIM_EVENTS_END */
+/* Description: End of RXD buffer and TXD buffer reached */
+
+/* Bit 0 : End of RXD buffer and TXD buffer reached */
+#define SPIM_EVENTS_END_EVENTS_END_Pos (0UL) /*!< Position of EVENTS_END field. */
+#define SPIM_EVENTS_END_EVENTS_END_Msk (0x1UL << SPIM_EVENTS_END_EVENTS_END_Pos) /*!< Bit mask of EVENTS_END field. */
+#define SPIM_EVENTS_END_EVENTS_END_NotGenerated (0UL) /*!< Event not generated */
+#define SPIM_EVENTS_END_EVENTS_END_Generated (1UL) /*!< Event generated */
+
+/* Register: SPIM_EVENTS_ENDTX */
+/* Description: End of TXD buffer reached */
+
+/* Bit 0 : End of TXD buffer reached */
+#define SPIM_EVENTS_ENDTX_EVENTS_ENDTX_Pos (0UL) /*!< Position of EVENTS_ENDTX field. */
+#define SPIM_EVENTS_ENDTX_EVENTS_ENDTX_Msk (0x1UL << SPIM_EVENTS_ENDTX_EVENTS_ENDTX_Pos) /*!< Bit mask of EVENTS_ENDTX field. */
+#define SPIM_EVENTS_ENDTX_EVENTS_ENDTX_NotGenerated (0UL) /*!< Event not generated */
+#define SPIM_EVENTS_ENDTX_EVENTS_ENDTX_Generated (1UL) /*!< Event generated */
+
+/* Register: SPIM_EVENTS_STARTED */
+/* Description: Transaction started */
+
+/* Bit 0 : Transaction started */
+#define SPIM_EVENTS_STARTED_EVENTS_STARTED_Pos (0UL) /*!< Position of EVENTS_STARTED field. */
+#define SPIM_EVENTS_STARTED_EVENTS_STARTED_Msk (0x1UL << SPIM_EVENTS_STARTED_EVENTS_STARTED_Pos) /*!< Bit mask of EVENTS_STARTED field. */
+#define SPIM_EVENTS_STARTED_EVENTS_STARTED_NotGenerated (0UL) /*!< Event not generated */
+#define SPIM_EVENTS_STARTED_EVENTS_STARTED_Generated (1UL) /*!< Event generated */
+
+/* Register: SPIM_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 17 : Shortcut between event END and task START */
+#define SPIM_SHORTS_END_START_Pos (17UL) /*!< Position of END_START field. */
+#define SPIM_SHORTS_END_START_Msk (0x1UL << SPIM_SHORTS_END_START_Pos) /*!< Bit mask of END_START field. */
+#define SPIM_SHORTS_END_START_Disabled (0UL) /*!< Disable shortcut */
+#define SPIM_SHORTS_END_START_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: SPIM_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 19 : Write '1' to enable interrupt for event STARTED */
+#define SPIM_INTENSET_STARTED_Pos (19UL) /*!< Position of STARTED field. */
+#define SPIM_INTENSET_STARTED_Msk (0x1UL << SPIM_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */
+#define SPIM_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */
+#define SPIM_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */
+#define SPIM_INTENSET_STARTED_Set (1UL) /*!< Enable */
+
+/* Bit 8 : Write '1' to enable interrupt for event ENDTX */
+#define SPIM_INTENSET_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */
+#define SPIM_INTENSET_ENDTX_Msk (0x1UL << SPIM_INTENSET_ENDTX_Pos) /*!< Bit mask of ENDTX field. */
+#define SPIM_INTENSET_ENDTX_Disabled (0UL) /*!< Read: Disabled */
+#define SPIM_INTENSET_ENDTX_Enabled (1UL) /*!< Read: Enabled */
+#define SPIM_INTENSET_ENDTX_Set (1UL) /*!< Enable */
+
+/* Bit 6 : Write '1' to enable interrupt for event END */
+#define SPIM_INTENSET_END_Pos (6UL) /*!< Position of END field. */
+#define SPIM_INTENSET_END_Msk (0x1UL << SPIM_INTENSET_END_Pos) /*!< Bit mask of END field. */
+#define SPIM_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */
+#define SPIM_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */
+#define SPIM_INTENSET_END_Set (1UL) /*!< Enable */
+
+/* Bit 4 : Write '1' to enable interrupt for event ENDRX */
+#define SPIM_INTENSET_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */
+#define SPIM_INTENSET_ENDRX_Msk (0x1UL << SPIM_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */
+#define SPIM_INTENSET_ENDRX_Disabled (0UL) /*!< Read: Disabled */
+#define SPIM_INTENSET_ENDRX_Enabled (1UL) /*!< Read: Enabled */
+#define SPIM_INTENSET_ENDRX_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event STOPPED */
+#define SPIM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */
+#define SPIM_INTENSET_STOPPED_Msk (0x1UL << SPIM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define SPIM_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define SPIM_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define SPIM_INTENSET_STOPPED_Set (1UL) /*!< Enable */
+
+/* Register: SPIM_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 19 : Write '1' to disable interrupt for event STARTED */
+#define SPIM_INTENCLR_STARTED_Pos (19UL) /*!< Position of STARTED field. */
+#define SPIM_INTENCLR_STARTED_Msk (0x1UL << SPIM_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */
+#define SPIM_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */
+#define SPIM_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */
+#define SPIM_INTENCLR_STARTED_Clear (1UL) /*!< Disable */
+
+/* Bit 8 : Write '1' to disable interrupt for event ENDTX */
+#define SPIM_INTENCLR_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */
+#define SPIM_INTENCLR_ENDTX_Msk (0x1UL << SPIM_INTENCLR_ENDTX_Pos) /*!< Bit mask of ENDTX field. */
+#define SPIM_INTENCLR_ENDTX_Disabled (0UL) /*!< Read: Disabled */
+#define SPIM_INTENCLR_ENDTX_Enabled (1UL) /*!< Read: Enabled */
+#define SPIM_INTENCLR_ENDTX_Clear (1UL) /*!< Disable */
+
+/* Bit 6 : Write '1' to disable interrupt for event END */
+#define SPIM_INTENCLR_END_Pos (6UL) /*!< Position of END field. */
+#define SPIM_INTENCLR_END_Msk (0x1UL << SPIM_INTENCLR_END_Pos) /*!< Bit mask of END field. */
+#define SPIM_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */
+#define SPIM_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */
+#define SPIM_INTENCLR_END_Clear (1UL) /*!< Disable */
+
+/* Bit 4 : Write '1' to disable interrupt for event ENDRX */
+#define SPIM_INTENCLR_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */
+#define SPIM_INTENCLR_ENDRX_Msk (0x1UL << SPIM_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */
+#define SPIM_INTENCLR_ENDRX_Disabled (0UL) /*!< Read: Disabled */
+#define SPIM_INTENCLR_ENDRX_Enabled (1UL) /*!< Read: Enabled */
+#define SPIM_INTENCLR_ENDRX_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event STOPPED */
+#define SPIM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */
+#define SPIM_INTENCLR_STOPPED_Msk (0x1UL << SPIM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define SPIM_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define SPIM_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define SPIM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */
+
+/* Register: SPIM_ENABLE */
+/* Description: Enable SPIM */
+
+/* Bits 3..0 : Enable or disable SPIM */
+#define SPIM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define SPIM_ENABLE_ENABLE_Msk (0xFUL << SPIM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define SPIM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable SPIM */
+#define SPIM_ENABLE_ENABLE_Enabled (7UL) /*!< Enable SPIM */
+
+/* Register: SPIM_PSEL_SCK */
+/* Description: Pin select for SCK */
+
+/* Bit 31 : Connection */
+#define SPIM_PSEL_SCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define SPIM_PSEL_SCK_CONNECT_Msk (0x1UL << SPIM_PSEL_SCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define SPIM_PSEL_SCK_CONNECT_Connected (0UL) /*!< Connect */
+#define SPIM_PSEL_SCK_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bits 4..0 : Pin number */
+#define SPIM_PSEL_SCK_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define SPIM_PSEL_SCK_PIN_Msk (0x1FUL << SPIM_PSEL_SCK_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: SPIM_PSEL_MOSI */
+/* Description: Pin select for MOSI signal */
+
+/* Bit 31 : Connection */
+#define SPIM_PSEL_MOSI_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define SPIM_PSEL_MOSI_CONNECT_Msk (0x1UL << SPIM_PSEL_MOSI_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define SPIM_PSEL_MOSI_CONNECT_Connected (0UL) /*!< Connect */
+#define SPIM_PSEL_MOSI_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bits 4..0 : Pin number */
+#define SPIM_PSEL_MOSI_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define SPIM_PSEL_MOSI_PIN_Msk (0x1FUL << SPIM_PSEL_MOSI_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: SPIM_PSEL_MISO */
+/* Description: Pin select for MISO signal */
+
+/* Bit 31 : Connection */
+#define SPIM_PSEL_MISO_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define SPIM_PSEL_MISO_CONNECT_Msk (0x1UL << SPIM_PSEL_MISO_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define SPIM_PSEL_MISO_CONNECT_Connected (0UL) /*!< Connect */
+#define SPIM_PSEL_MISO_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bits 4..0 : Pin number */
+#define SPIM_PSEL_MISO_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define SPIM_PSEL_MISO_PIN_Msk (0x1FUL << SPIM_PSEL_MISO_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: SPIM_FREQUENCY */
+/* Description: SPI frequency. Accuracy depends on the HFCLK source selected. */
+
+/* Bits 31..0 : SPI master data rate */
+#define SPIM_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */
+#define SPIM_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << SPIM_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */
+#define SPIM_FREQUENCY_FREQUENCY_K125 (0x02000000UL) /*!< 125 kbps */
+#define SPIM_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps */
+#define SPIM_FREQUENCY_FREQUENCY_K500 (0x08000000UL) /*!< 500 kbps */
+#define SPIM_FREQUENCY_FREQUENCY_M1 (0x10000000UL) /*!< 1 Mbps */
+#define SPIM_FREQUENCY_FREQUENCY_M2 (0x20000000UL) /*!< 2 Mbps */
+#define SPIM_FREQUENCY_FREQUENCY_M4 (0x40000000UL) /*!< 4 Mbps */
+#define SPIM_FREQUENCY_FREQUENCY_M8 (0x80000000UL) /*!< 8 Mbps */
+
+/* Register: SPIM_RXD_PTR */
+/* Description: Data pointer */
+
+/* Bits 31..0 : Data pointer */
+#define SPIM_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define SPIM_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIM_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: SPIM_RXD_MAXCNT */
+/* Description: Maximum number of bytes in receive buffer */
+
+/* Bits 13..0 : Maximum number of bytes in receive buffer */
+#define SPIM_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define SPIM_RXD_MAXCNT_MAXCNT_Msk (0x3FFFUL << SPIM_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: SPIM_RXD_AMOUNT */
+/* Description: Number of bytes transferred in the last transaction */
+
+/* Bits 13..0 : Number of bytes transferred in the last transaction */
+#define SPIM_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define SPIM_RXD_AMOUNT_AMOUNT_Msk (0x3FFFUL << SPIM_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+/* Register: SPIM_RXD_LIST */
+/* Description: EasyDMA list type */
+
+/* Bits 1..0 : List type */
+#define SPIM_RXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */
+#define SPIM_RXD_LIST_LIST_Msk (0x3UL << SPIM_RXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */
+#define SPIM_RXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */
+#define SPIM_RXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */
+
+/* Register: SPIM_TXD_PTR */
+/* Description: Data pointer */
+
+/* Bits 31..0 : Data pointer */
+#define SPIM_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define SPIM_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIM_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: SPIM_TXD_MAXCNT */
+/* Description: Maximum number of bytes in transmit buffer */
+
+/* Bits 13..0 : Maximum number of bytes in transmit buffer */
+#define SPIM_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define SPIM_TXD_MAXCNT_MAXCNT_Msk (0x3FFFUL << SPIM_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: SPIM_TXD_AMOUNT */
+/* Description: Number of bytes transferred in the last transaction */
+
+/* Bits 13..0 : Number of bytes transferred in the last transaction */
+#define SPIM_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define SPIM_TXD_AMOUNT_AMOUNT_Msk (0x3FFFUL << SPIM_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+/* Register: SPIM_TXD_LIST */
+/* Description: EasyDMA list type */
+
+/* Bits 1..0 : List type */
+#define SPIM_TXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */
+#define SPIM_TXD_LIST_LIST_Msk (0x3UL << SPIM_TXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */
+#define SPIM_TXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */
+#define SPIM_TXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */
+
+/* Register: SPIM_CONFIG */
+/* Description: Configuration register */
+
+/* Bit 2 : Serial clock (SCK) polarity */
+#define SPIM_CONFIG_CPOL_Pos (2UL) /*!< Position of CPOL field. */
+#define SPIM_CONFIG_CPOL_Msk (0x1UL << SPIM_CONFIG_CPOL_Pos) /*!< Bit mask of CPOL field. */
+#define SPIM_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high */
+#define SPIM_CONFIG_CPOL_ActiveLow (1UL) /*!< Active low */
+
+/* Bit 1 : Serial clock (SCK) phase */
+#define SPIM_CONFIG_CPHA_Pos (1UL) /*!< Position of CPHA field. */
+#define SPIM_CONFIG_CPHA_Msk (0x1UL << SPIM_CONFIG_CPHA_Pos) /*!< Bit mask of CPHA field. */
+#define SPIM_CONFIG_CPHA_Leading (0UL) /*!< Sample on leading edge of clock, shift serial data on trailing edge */
+#define SPIM_CONFIG_CPHA_Trailing (1UL) /*!< Sample on trailing edge of clock, shift serial data on leading edge */
+
+/* Bit 0 : Bit order */
+#define SPIM_CONFIG_ORDER_Pos (0UL) /*!< Position of ORDER field. */
+#define SPIM_CONFIG_ORDER_Msk (0x1UL << SPIM_CONFIG_ORDER_Pos) /*!< Bit mask of ORDER field. */
+#define SPIM_CONFIG_ORDER_MsbFirst (0UL) /*!< Most significant bit shifted out first */
+#define SPIM_CONFIG_ORDER_LsbFirst (1UL) /*!< Least significant bit shifted out first */
+
+/* Register: SPIM_ORC */
+/* Description: Over-read character. Character clocked out in case and over-read of the TXD buffer. */
+
+/* Bits 7..0 : Over-read character. Character clocked out in case and over-read of the TXD buffer. */
+#define SPIM_ORC_ORC_Pos (0UL) /*!< Position of ORC field. */
+#define SPIM_ORC_ORC_Msk (0xFFUL << SPIM_ORC_ORC_Pos) /*!< Bit mask of ORC field. */
+
+
+/* Peripheral: SPIS */
+/* Description: SPI Slave */
+
+/* Register: SPIS_TASKS_ACQUIRE */
+/* Description: Acquire SPI semaphore */
+
+/* Bit 0 : Acquire SPI semaphore */
+#define SPIS_TASKS_ACQUIRE_TASKS_ACQUIRE_Pos (0UL) /*!< Position of TASKS_ACQUIRE field. */
+#define SPIS_TASKS_ACQUIRE_TASKS_ACQUIRE_Msk (0x1UL << SPIS_TASKS_ACQUIRE_TASKS_ACQUIRE_Pos) /*!< Bit mask of TASKS_ACQUIRE field. */
+#define SPIS_TASKS_ACQUIRE_TASKS_ACQUIRE_Trigger (1UL) /*!< Trigger task */
+
+/* Register: SPIS_TASKS_RELEASE */
+/* Description: Release SPI semaphore, enabling the SPI slave to acquire it */
+
+/* Bit 0 : Release SPI semaphore, enabling the SPI slave to acquire it */
+#define SPIS_TASKS_RELEASE_TASKS_RELEASE_Pos (0UL) /*!< Position of TASKS_RELEASE field. */
+#define SPIS_TASKS_RELEASE_TASKS_RELEASE_Msk (0x1UL << SPIS_TASKS_RELEASE_TASKS_RELEASE_Pos) /*!< Bit mask of TASKS_RELEASE field. */
+#define SPIS_TASKS_RELEASE_TASKS_RELEASE_Trigger (1UL) /*!< Trigger task */
+
+/* Register: SPIS_EVENTS_END */
+/* Description: Granted transaction completed */
+
+/* Bit 0 : Granted transaction completed */
+#define SPIS_EVENTS_END_EVENTS_END_Pos (0UL) /*!< Position of EVENTS_END field. */
+#define SPIS_EVENTS_END_EVENTS_END_Msk (0x1UL << SPIS_EVENTS_END_EVENTS_END_Pos) /*!< Bit mask of EVENTS_END field. */
+#define SPIS_EVENTS_END_EVENTS_END_NotGenerated (0UL) /*!< Event not generated */
+#define SPIS_EVENTS_END_EVENTS_END_Generated (1UL) /*!< Event generated */
+
+/* Register: SPIS_EVENTS_ENDRX */
+/* Description: End of RXD buffer reached */
+
+/* Bit 0 : End of RXD buffer reached */
+#define SPIS_EVENTS_ENDRX_EVENTS_ENDRX_Pos (0UL) /*!< Position of EVENTS_ENDRX field. */
+#define SPIS_EVENTS_ENDRX_EVENTS_ENDRX_Msk (0x1UL << SPIS_EVENTS_ENDRX_EVENTS_ENDRX_Pos) /*!< Bit mask of EVENTS_ENDRX field. */
+#define SPIS_EVENTS_ENDRX_EVENTS_ENDRX_NotGenerated (0UL) /*!< Event not generated */
+#define SPIS_EVENTS_ENDRX_EVENTS_ENDRX_Generated (1UL) /*!< Event generated */
+
+/* Register: SPIS_EVENTS_ACQUIRED */
+/* Description: Semaphore acquired */
+
+/* Bit 0 : Semaphore acquired */
+#define SPIS_EVENTS_ACQUIRED_EVENTS_ACQUIRED_Pos (0UL) /*!< Position of EVENTS_ACQUIRED field. */
+#define SPIS_EVENTS_ACQUIRED_EVENTS_ACQUIRED_Msk (0x1UL << SPIS_EVENTS_ACQUIRED_EVENTS_ACQUIRED_Pos) /*!< Bit mask of EVENTS_ACQUIRED field. */
+#define SPIS_EVENTS_ACQUIRED_EVENTS_ACQUIRED_NotGenerated (0UL) /*!< Event not generated */
+#define SPIS_EVENTS_ACQUIRED_EVENTS_ACQUIRED_Generated (1UL) /*!< Event generated */
+
+/* Register: SPIS_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 2 : Shortcut between event END and task ACQUIRE */
+#define SPIS_SHORTS_END_ACQUIRE_Pos (2UL) /*!< Position of END_ACQUIRE field. */
+#define SPIS_SHORTS_END_ACQUIRE_Msk (0x1UL << SPIS_SHORTS_END_ACQUIRE_Pos) /*!< Bit mask of END_ACQUIRE field. */
+#define SPIS_SHORTS_END_ACQUIRE_Disabled (0UL) /*!< Disable shortcut */
+#define SPIS_SHORTS_END_ACQUIRE_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: SPIS_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 10 : Write '1' to enable interrupt for event ACQUIRED */
+#define SPIS_INTENSET_ACQUIRED_Pos (10UL) /*!< Position of ACQUIRED field. */
+#define SPIS_INTENSET_ACQUIRED_Msk (0x1UL << SPIS_INTENSET_ACQUIRED_Pos) /*!< Bit mask of ACQUIRED field. */
+#define SPIS_INTENSET_ACQUIRED_Disabled (0UL) /*!< Read: Disabled */
+#define SPIS_INTENSET_ACQUIRED_Enabled (1UL) /*!< Read: Enabled */
+#define SPIS_INTENSET_ACQUIRED_Set (1UL) /*!< Enable */
+
+/* Bit 4 : Write '1' to enable interrupt for event ENDRX */
+#define SPIS_INTENSET_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */
+#define SPIS_INTENSET_ENDRX_Msk (0x1UL << SPIS_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */
+#define SPIS_INTENSET_ENDRX_Disabled (0UL) /*!< Read: Disabled */
+#define SPIS_INTENSET_ENDRX_Enabled (1UL) /*!< Read: Enabled */
+#define SPIS_INTENSET_ENDRX_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event END */
+#define SPIS_INTENSET_END_Pos (1UL) /*!< Position of END field. */
+#define SPIS_INTENSET_END_Msk (0x1UL << SPIS_INTENSET_END_Pos) /*!< Bit mask of END field. */
+#define SPIS_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */
+#define SPIS_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */
+#define SPIS_INTENSET_END_Set (1UL) /*!< Enable */
+
+/* Register: SPIS_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 10 : Write '1' to disable interrupt for event ACQUIRED */
+#define SPIS_INTENCLR_ACQUIRED_Pos (10UL) /*!< Position of ACQUIRED field. */
+#define SPIS_INTENCLR_ACQUIRED_Msk (0x1UL << SPIS_INTENCLR_ACQUIRED_Pos) /*!< Bit mask of ACQUIRED field. */
+#define SPIS_INTENCLR_ACQUIRED_Disabled (0UL) /*!< Read: Disabled */
+#define SPIS_INTENCLR_ACQUIRED_Enabled (1UL) /*!< Read: Enabled */
+#define SPIS_INTENCLR_ACQUIRED_Clear (1UL) /*!< Disable */
+
+/* Bit 4 : Write '1' to disable interrupt for event ENDRX */
+#define SPIS_INTENCLR_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */
+#define SPIS_INTENCLR_ENDRX_Msk (0x1UL << SPIS_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */
+#define SPIS_INTENCLR_ENDRX_Disabled (0UL) /*!< Read: Disabled */
+#define SPIS_INTENCLR_ENDRX_Enabled (1UL) /*!< Read: Enabled */
+#define SPIS_INTENCLR_ENDRX_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event END */
+#define SPIS_INTENCLR_END_Pos (1UL) /*!< Position of END field. */
+#define SPIS_INTENCLR_END_Msk (0x1UL << SPIS_INTENCLR_END_Pos) /*!< Bit mask of END field. */
+#define SPIS_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */
+#define SPIS_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */
+#define SPIS_INTENCLR_END_Clear (1UL) /*!< Disable */
+
+/* Register: SPIS_SEMSTAT */
+/* Description: Semaphore status register */
+
+/* Bits 1..0 : Semaphore status */
+#define SPIS_SEMSTAT_SEMSTAT_Pos (0UL) /*!< Position of SEMSTAT field. */
+#define SPIS_SEMSTAT_SEMSTAT_Msk (0x3UL << SPIS_SEMSTAT_SEMSTAT_Pos) /*!< Bit mask of SEMSTAT field. */
+#define SPIS_SEMSTAT_SEMSTAT_Free (0UL) /*!< Semaphore is free */
+#define SPIS_SEMSTAT_SEMSTAT_CPU (1UL) /*!< Semaphore is assigned to CPU */
+#define SPIS_SEMSTAT_SEMSTAT_SPIS (2UL) /*!< Semaphore is assigned to SPI slave */
+#define SPIS_SEMSTAT_SEMSTAT_CPUPending (3UL) /*!< Semaphore is assigned to SPI but a handover to the CPU is pending */
+
+/* Register: SPIS_STATUS */
+/* Description: Status from last transaction */
+
+/* Bit 1 : RX buffer overflow detected, and prevented */
+#define SPIS_STATUS_OVERFLOW_Pos (1UL) /*!< Position of OVERFLOW field. */
+#define SPIS_STATUS_OVERFLOW_Msk (0x1UL << SPIS_STATUS_OVERFLOW_Pos) /*!< Bit mask of OVERFLOW field. */
+#define SPIS_STATUS_OVERFLOW_NotPresent (0UL) /*!< Read: error not present */
+#define SPIS_STATUS_OVERFLOW_Present (1UL) /*!< Read: error present */
+#define SPIS_STATUS_OVERFLOW_Clear (1UL) /*!< Write: clear error on writing '1' */
+
+/* Bit 0 : TX buffer over-read detected, and prevented */
+#define SPIS_STATUS_OVERREAD_Pos (0UL) /*!< Position of OVERREAD field. */
+#define SPIS_STATUS_OVERREAD_Msk (0x1UL << SPIS_STATUS_OVERREAD_Pos) /*!< Bit mask of OVERREAD field. */
+#define SPIS_STATUS_OVERREAD_NotPresent (0UL) /*!< Read: error not present */
+#define SPIS_STATUS_OVERREAD_Present (1UL) /*!< Read: error present */
+#define SPIS_STATUS_OVERREAD_Clear (1UL) /*!< Write: clear error on writing '1' */
+
+/* Register: SPIS_ENABLE */
+/* Description: Enable SPI slave */
+
+/* Bits 3..0 : Enable or disable SPI slave */
+#define SPIS_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define SPIS_ENABLE_ENABLE_Msk (0xFUL << SPIS_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define SPIS_ENABLE_ENABLE_Disabled (0UL) /*!< Disable SPI slave */
+#define SPIS_ENABLE_ENABLE_Enabled (2UL) /*!< Enable SPI slave */
+
+/* Register: SPIS_PSEL_SCK */
+/* Description: Pin select for SCK */
+
+/* Bit 31 : Connection */
+#define SPIS_PSEL_SCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define SPIS_PSEL_SCK_CONNECT_Msk (0x1UL << SPIS_PSEL_SCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define SPIS_PSEL_SCK_CONNECT_Connected (0UL) /*!< Connect */
+#define SPIS_PSEL_SCK_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bits 4..0 : Pin number */
+#define SPIS_PSEL_SCK_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define SPIS_PSEL_SCK_PIN_Msk (0x1FUL << SPIS_PSEL_SCK_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: SPIS_PSEL_MISO */
+/* Description: Pin select for MISO signal */
+
+/* Bit 31 : Connection */
+#define SPIS_PSEL_MISO_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define SPIS_PSEL_MISO_CONNECT_Msk (0x1UL << SPIS_PSEL_MISO_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define SPIS_PSEL_MISO_CONNECT_Connected (0UL) /*!< Connect */
+#define SPIS_PSEL_MISO_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bits 4..0 : Pin number */
+#define SPIS_PSEL_MISO_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define SPIS_PSEL_MISO_PIN_Msk (0x1FUL << SPIS_PSEL_MISO_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: SPIS_PSEL_MOSI */
+/* Description: Pin select for MOSI signal */
+
+/* Bit 31 : Connection */
+#define SPIS_PSEL_MOSI_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define SPIS_PSEL_MOSI_CONNECT_Msk (0x1UL << SPIS_PSEL_MOSI_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define SPIS_PSEL_MOSI_CONNECT_Connected (0UL) /*!< Connect */
+#define SPIS_PSEL_MOSI_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bits 4..0 : Pin number */
+#define SPIS_PSEL_MOSI_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define SPIS_PSEL_MOSI_PIN_Msk (0x1FUL << SPIS_PSEL_MOSI_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: SPIS_PSEL_CSN */
+/* Description: Pin select for CSN signal */
+
+/* Bit 31 : Connection */
+#define SPIS_PSEL_CSN_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define SPIS_PSEL_CSN_CONNECT_Msk (0x1UL << SPIS_PSEL_CSN_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define SPIS_PSEL_CSN_CONNECT_Connected (0UL) /*!< Connect */
+#define SPIS_PSEL_CSN_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bits 4..0 : Pin number */
+#define SPIS_PSEL_CSN_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define SPIS_PSEL_CSN_PIN_Msk (0x1FUL << SPIS_PSEL_CSN_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: SPIS_RXD_PTR */
+/* Description: RXD data pointer */
+
+/* Bits 31..0 : RXD data pointer */
+#define SPIS_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define SPIS_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIS_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: SPIS_RXD_MAXCNT */
+/* Description: Maximum number of bytes in receive buffer */
+
+/* Bits 13..0 : Maximum number of bytes in receive buffer */
+#define SPIS_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define SPIS_RXD_MAXCNT_MAXCNT_Msk (0x3FFFUL << SPIS_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: SPIS_RXD_AMOUNT */
+/* Description: Number of bytes received in last granted transaction */
+
+/* Bits 13..0 : Number of bytes received in the last granted transaction */
+#define SPIS_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define SPIS_RXD_AMOUNT_AMOUNT_Msk (0x3FFFUL << SPIS_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+/* Register: SPIS_RXD_LIST */
+/* Description: EasyDMA list type */
+
+/* Bits 1..0 : List type */
+#define SPIS_RXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */
+#define SPIS_RXD_LIST_LIST_Msk (0x3UL << SPIS_RXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */
+#define SPIS_RXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */
+#define SPIS_RXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */
+
+/* Register: SPIS_TXD_PTR */
+/* Description: TXD data pointer */
+
+/* Bits 31..0 : TXD data pointer */
+#define SPIS_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define SPIS_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIS_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: SPIS_TXD_MAXCNT */
+/* Description: Maximum number of bytes in transmit buffer */
+
+/* Bits 13..0 : Maximum number of bytes in transmit buffer */
+#define SPIS_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define SPIS_TXD_MAXCNT_MAXCNT_Msk (0x3FFFUL << SPIS_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: SPIS_TXD_AMOUNT */
+/* Description: Number of bytes transmitted in last granted transaction */
+
+/* Bits 13..0 : Number of bytes transmitted in last granted transaction */
+#define SPIS_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define SPIS_TXD_AMOUNT_AMOUNT_Msk (0x3FFFUL << SPIS_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+/* Register: SPIS_TXD_LIST */
+/* Description: EasyDMA list type */
+
+/* Bits 1..0 : List type */
+#define SPIS_TXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */
+#define SPIS_TXD_LIST_LIST_Msk (0x3UL << SPIS_TXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */
+#define SPIS_TXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */
+#define SPIS_TXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */
+
+/* Register: SPIS_CONFIG */
+/* Description: Configuration register */
+
+/* Bit 2 : Serial clock (SCK) polarity */
+#define SPIS_CONFIG_CPOL_Pos (2UL) /*!< Position of CPOL field. */
+#define SPIS_CONFIG_CPOL_Msk (0x1UL << SPIS_CONFIG_CPOL_Pos) /*!< Bit mask of CPOL field. */
+#define SPIS_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high */
+#define SPIS_CONFIG_CPOL_ActiveLow (1UL) /*!< Active low */
+
+/* Bit 1 : Serial clock (SCK) phase */
+#define SPIS_CONFIG_CPHA_Pos (1UL) /*!< Position of CPHA field. */
+#define SPIS_CONFIG_CPHA_Msk (0x1UL << SPIS_CONFIG_CPHA_Pos) /*!< Bit mask of CPHA field. */
+#define SPIS_CONFIG_CPHA_Leading (0UL) /*!< Sample on leading edge of clock, shift serial data on trailing edge */
+#define SPIS_CONFIG_CPHA_Trailing (1UL) /*!< Sample on trailing edge of clock, shift serial data on leading edge */
+
+/* Bit 0 : Bit order */
+#define SPIS_CONFIG_ORDER_Pos (0UL) /*!< Position of ORDER field. */
+#define SPIS_CONFIG_ORDER_Msk (0x1UL << SPIS_CONFIG_ORDER_Pos) /*!< Bit mask of ORDER field. */
+#define SPIS_CONFIG_ORDER_MsbFirst (0UL) /*!< Most significant bit shifted out first */
+#define SPIS_CONFIG_ORDER_LsbFirst (1UL) /*!< Least significant bit shifted out first */
+
+/* Register: SPIS_DEF */
+/* Description: Default character. Character clocked out in case of an ignored transaction. */
+
+/* Bits 7..0 : Default character. Character clocked out in case of an ignored transaction. */
+#define SPIS_DEF_DEF_Pos (0UL) /*!< Position of DEF field. */
+#define SPIS_DEF_DEF_Msk (0xFFUL << SPIS_DEF_DEF_Pos) /*!< Bit mask of DEF field. */
+
+/* Register: SPIS_ORC */
+/* Description: Over-read character */
+
+/* Bits 7..0 : Over-read character. Character clocked out after an over-read of the transmit buffer. */
+#define SPIS_ORC_ORC_Pos (0UL) /*!< Position of ORC field. */
+#define SPIS_ORC_ORC_Msk (0xFFUL << SPIS_ORC_ORC_Pos) /*!< Bit mask of ORC field. */
+
+
+/* Peripheral: TEMP */
+/* Description: Temperature Sensor */
+
+/* Register: TEMP_TASKS_START */
+/* Description: Start temperature measurement */
+
+/* Bit 0 : Start temperature measurement */
+#define TEMP_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */
+#define TEMP_TASKS_START_TASKS_START_Msk (0x1UL << TEMP_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */
+#define TEMP_TASKS_START_TASKS_START_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TEMP_TASKS_STOP */
+/* Description: Stop temperature measurement */
+
+/* Bit 0 : Stop temperature measurement */
+#define TEMP_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define TEMP_TASKS_STOP_TASKS_STOP_Msk (0x1UL << TEMP_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define TEMP_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TEMP_EVENTS_DATARDY */
+/* Description: Temperature measurement complete, data ready */
+
+/* Bit 0 : Temperature measurement complete, data ready */
+#define TEMP_EVENTS_DATARDY_EVENTS_DATARDY_Pos (0UL) /*!< Position of EVENTS_DATARDY field. */
+#define TEMP_EVENTS_DATARDY_EVENTS_DATARDY_Msk (0x1UL << TEMP_EVENTS_DATARDY_EVENTS_DATARDY_Pos) /*!< Bit mask of EVENTS_DATARDY field. */
+#define TEMP_EVENTS_DATARDY_EVENTS_DATARDY_NotGenerated (0UL) /*!< Event not generated */
+#define TEMP_EVENTS_DATARDY_EVENTS_DATARDY_Generated (1UL) /*!< Event generated */
+
+/* Register: TEMP_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 0 : Write '1' to enable interrupt for event DATARDY */
+#define TEMP_INTENSET_DATARDY_Pos (0UL) /*!< Position of DATARDY field. */
+#define TEMP_INTENSET_DATARDY_Msk (0x1UL << TEMP_INTENSET_DATARDY_Pos) /*!< Bit mask of DATARDY field. */
+#define TEMP_INTENSET_DATARDY_Disabled (0UL) /*!< Read: Disabled */
+#define TEMP_INTENSET_DATARDY_Enabled (1UL) /*!< Read: Enabled */
+#define TEMP_INTENSET_DATARDY_Set (1UL) /*!< Enable */
+
+/* Register: TEMP_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 0 : Write '1' to disable interrupt for event DATARDY */
+#define TEMP_INTENCLR_DATARDY_Pos (0UL) /*!< Position of DATARDY field. */
+#define TEMP_INTENCLR_DATARDY_Msk (0x1UL << TEMP_INTENCLR_DATARDY_Pos) /*!< Bit mask of DATARDY field. */
+#define TEMP_INTENCLR_DATARDY_Disabled (0UL) /*!< Read: Disabled */
+#define TEMP_INTENCLR_DATARDY_Enabled (1UL) /*!< Read: Enabled */
+#define TEMP_INTENCLR_DATARDY_Clear (1UL) /*!< Disable */
+
+/* Register: TEMP_TEMP */
+/* Description: Temperature in degC (0.25deg steps) */
+
+/* Bits 31..0 : Temperature in degC (0.25deg steps) */
+#define TEMP_TEMP_TEMP_Pos (0UL) /*!< Position of TEMP field. */
+#define TEMP_TEMP_TEMP_Msk (0xFFFFFFFFUL << TEMP_TEMP_TEMP_Pos) /*!< Bit mask of TEMP field. */
+
+/* Register: TEMP_A0 */
+/* Description: Slope of 1st piece wise linear function */
+
+/* Bits 11..0 : Slope of 1st piece wise linear function */
+#define TEMP_A0_A0_Pos (0UL) /*!< Position of A0 field. */
+#define TEMP_A0_A0_Msk (0xFFFUL << TEMP_A0_A0_Pos) /*!< Bit mask of A0 field. */
+
+/* Register: TEMP_A1 */
+/* Description: Slope of 2nd piece wise linear function */
+
+/* Bits 11..0 : Slope of 2nd piece wise linear function */
+#define TEMP_A1_A1_Pos (0UL) /*!< Position of A1 field. */
+#define TEMP_A1_A1_Msk (0xFFFUL << TEMP_A1_A1_Pos) /*!< Bit mask of A1 field. */
+
+/* Register: TEMP_A2 */
+/* Description: Slope of 3rd piece wise linear function */
+
+/* Bits 11..0 : Slope of 3rd piece wise linear function */
+#define TEMP_A2_A2_Pos (0UL) /*!< Position of A2 field. */
+#define TEMP_A2_A2_Msk (0xFFFUL << TEMP_A2_A2_Pos) /*!< Bit mask of A2 field. */
+
+/* Register: TEMP_A3 */
+/* Description: Slope of 4th piece wise linear function */
+
+/* Bits 11..0 : Slope of 4th piece wise linear function */
+#define TEMP_A3_A3_Pos (0UL) /*!< Position of A3 field. */
+#define TEMP_A3_A3_Msk (0xFFFUL << TEMP_A3_A3_Pos) /*!< Bit mask of A3 field. */
+
+/* Register: TEMP_A4 */
+/* Description: Slope of 5th piece wise linear function */
+
+/* Bits 11..0 : Slope of 5th piece wise linear function */
+#define TEMP_A4_A4_Pos (0UL) /*!< Position of A4 field. */
+#define TEMP_A4_A4_Msk (0xFFFUL << TEMP_A4_A4_Pos) /*!< Bit mask of A4 field. */
+
+/* Register: TEMP_A5 */
+/* Description: Slope of 6th piece wise linear function */
+
+/* Bits 11..0 : Slope of 6th piece wise linear function */
+#define TEMP_A5_A5_Pos (0UL) /*!< Position of A5 field. */
+#define TEMP_A5_A5_Msk (0xFFFUL << TEMP_A5_A5_Pos) /*!< Bit mask of A5 field. */
+
+/* Register: TEMP_B0 */
+/* Description: y-intercept of 1st piece wise linear function */
+
+/* Bits 13..0 : y-intercept of 1st piece wise linear function */
+#define TEMP_B0_B0_Pos (0UL) /*!< Position of B0 field. */
+#define TEMP_B0_B0_Msk (0x3FFFUL << TEMP_B0_B0_Pos) /*!< Bit mask of B0 field. */
+
+/* Register: TEMP_B1 */
+/* Description: y-intercept of 2nd piece wise linear function */
+
+/* Bits 13..0 : y-intercept of 2nd piece wise linear function */
+#define TEMP_B1_B1_Pos (0UL) /*!< Position of B1 field. */
+#define TEMP_B1_B1_Msk (0x3FFFUL << TEMP_B1_B1_Pos) /*!< Bit mask of B1 field. */
+
+/* Register: TEMP_B2 */
+/* Description: y-intercept of 3rd piece wise linear function */
+
+/* Bits 13..0 : y-intercept of 3rd piece wise linear function */
+#define TEMP_B2_B2_Pos (0UL) /*!< Position of B2 field. */
+#define TEMP_B2_B2_Msk (0x3FFFUL << TEMP_B2_B2_Pos) /*!< Bit mask of B2 field. */
+
+/* Register: TEMP_B3 */
+/* Description: y-intercept of 4th piece wise linear function */
+
+/* Bits 13..0 : y-intercept of 4th piece wise linear function */
+#define TEMP_B3_B3_Pos (0UL) /*!< Position of B3 field. */
+#define TEMP_B3_B3_Msk (0x3FFFUL << TEMP_B3_B3_Pos) /*!< Bit mask of B3 field. */
+
+/* Register: TEMP_B4 */
+/* Description: y-intercept of 5th piece wise linear function */
+
+/* Bits 13..0 : y-intercept of 5th piece wise linear function */
+#define TEMP_B4_B4_Pos (0UL) /*!< Position of B4 field. */
+#define TEMP_B4_B4_Msk (0x3FFFUL << TEMP_B4_B4_Pos) /*!< Bit mask of B4 field. */
+
+/* Register: TEMP_B5 */
+/* Description: y-intercept of 6th piece wise linear function */
+
+/* Bits 13..0 : y-intercept of 6th piece wise linear function */
+#define TEMP_B5_B5_Pos (0UL) /*!< Position of B5 field. */
+#define TEMP_B5_B5_Msk (0x3FFFUL << TEMP_B5_B5_Pos) /*!< Bit mask of B5 field. */
+
+/* Register: TEMP_T0 */
+/* Description: End point of 1st piece wise linear function */
+
+/* Bits 7..0 : End point of 1st piece wise linear function */
+#define TEMP_T0_T0_Pos (0UL) /*!< Position of T0 field. */
+#define TEMP_T0_T0_Msk (0xFFUL << TEMP_T0_T0_Pos) /*!< Bit mask of T0 field. */
+
+/* Register: TEMP_T1 */
+/* Description: End point of 2nd piece wise linear function */
+
+/* Bits 7..0 : End point of 2nd piece wise linear function */
+#define TEMP_T1_T1_Pos (0UL) /*!< Position of T1 field. */
+#define TEMP_T1_T1_Msk (0xFFUL << TEMP_T1_T1_Pos) /*!< Bit mask of T1 field. */
+
+/* Register: TEMP_T2 */
+/* Description: End point of 3rd piece wise linear function */
+
+/* Bits 7..0 : End point of 3rd piece wise linear function */
+#define TEMP_T2_T2_Pos (0UL) /*!< Position of T2 field. */
+#define TEMP_T2_T2_Msk (0xFFUL << TEMP_T2_T2_Pos) /*!< Bit mask of T2 field. */
+
+/* Register: TEMP_T3 */
+/* Description: End point of 4th piece wise linear function */
+
+/* Bits 7..0 : End point of 4th piece wise linear function */
+#define TEMP_T3_T3_Pos (0UL) /*!< Position of T3 field. */
+#define TEMP_T3_T3_Msk (0xFFUL << TEMP_T3_T3_Pos) /*!< Bit mask of T3 field. */
+
+/* Register: TEMP_T4 */
+/* Description: End point of 5th piece wise linear function */
+
+/* Bits 7..0 : End point of 5th piece wise linear function */
+#define TEMP_T4_T4_Pos (0UL) /*!< Position of T4 field. */
+#define TEMP_T4_T4_Msk (0xFFUL << TEMP_T4_T4_Pos) /*!< Bit mask of T4 field. */
+
+
+/* Peripheral: TIMER */
+/* Description: Timer/Counter 0 */
+
+/* Register: TIMER_TASKS_START */
+/* Description: Start Timer */
+
+/* Bit 0 : Start Timer */
+#define TIMER_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */
+#define TIMER_TASKS_START_TASKS_START_Msk (0x1UL << TIMER_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */
+#define TIMER_TASKS_START_TASKS_START_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TIMER_TASKS_STOP */
+/* Description: Stop Timer */
+
+/* Bit 0 : Stop Timer */
+#define TIMER_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define TIMER_TASKS_STOP_TASKS_STOP_Msk (0x1UL << TIMER_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define TIMER_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TIMER_TASKS_COUNT */
+/* Description: Increment Timer (Counter mode only) */
+
+/* Bit 0 : Increment Timer (Counter mode only) */
+#define TIMER_TASKS_COUNT_TASKS_COUNT_Pos (0UL) /*!< Position of TASKS_COUNT field. */
+#define TIMER_TASKS_COUNT_TASKS_COUNT_Msk (0x1UL << TIMER_TASKS_COUNT_TASKS_COUNT_Pos) /*!< Bit mask of TASKS_COUNT field. */
+#define TIMER_TASKS_COUNT_TASKS_COUNT_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TIMER_TASKS_CLEAR */
+/* Description: Clear time */
+
+/* Bit 0 : Clear time */
+#define TIMER_TASKS_CLEAR_TASKS_CLEAR_Pos (0UL) /*!< Position of TASKS_CLEAR field. */
+#define TIMER_TASKS_CLEAR_TASKS_CLEAR_Msk (0x1UL << TIMER_TASKS_CLEAR_TASKS_CLEAR_Pos) /*!< Bit mask of TASKS_CLEAR field. */
+#define TIMER_TASKS_CLEAR_TASKS_CLEAR_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TIMER_TASKS_SHUTDOWN */
+/* Description: Deprecated register - Shut down timer */
+
+/* Bit 0 : Deprecated field - Shut down timer */
+#define TIMER_TASKS_SHUTDOWN_TASKS_SHUTDOWN_Pos (0UL) /*!< Position of TASKS_SHUTDOWN field. */
+#define TIMER_TASKS_SHUTDOWN_TASKS_SHUTDOWN_Msk (0x1UL << TIMER_TASKS_SHUTDOWN_TASKS_SHUTDOWN_Pos) /*!< Bit mask of TASKS_SHUTDOWN field. */
+#define TIMER_TASKS_SHUTDOWN_TASKS_SHUTDOWN_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TIMER_TASKS_CAPTURE */
+/* Description: Description collection: Capture Timer value to CC[n] register */
+
+/* Bit 0 : Capture Timer value to CC[n] register */
+#define TIMER_TASKS_CAPTURE_TASKS_CAPTURE_Pos (0UL) /*!< Position of TASKS_CAPTURE field. */
+#define TIMER_TASKS_CAPTURE_TASKS_CAPTURE_Msk (0x1UL << TIMER_TASKS_CAPTURE_TASKS_CAPTURE_Pos) /*!< Bit mask of TASKS_CAPTURE field. */
+#define TIMER_TASKS_CAPTURE_TASKS_CAPTURE_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TIMER_EVENTS_COMPARE */
+/* Description: Description collection: Compare event on CC[n] match */
+
+/* Bit 0 : Compare event on CC[n] match */
+#define TIMER_EVENTS_COMPARE_EVENTS_COMPARE_Pos (0UL) /*!< Position of EVENTS_COMPARE field. */
+#define TIMER_EVENTS_COMPARE_EVENTS_COMPARE_Msk (0x1UL << TIMER_EVENTS_COMPARE_EVENTS_COMPARE_Pos) /*!< Bit mask of EVENTS_COMPARE field. */
+#define TIMER_EVENTS_COMPARE_EVENTS_COMPARE_NotGenerated (0UL) /*!< Event not generated */
+#define TIMER_EVENTS_COMPARE_EVENTS_COMPARE_Generated (1UL) /*!< Event generated */
+
+/* Register: TIMER_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 13 : Shortcut between event COMPARE[5] and task STOP */
+#define TIMER_SHORTS_COMPARE5_STOP_Pos (13UL) /*!< Position of COMPARE5_STOP field. */
+#define TIMER_SHORTS_COMPARE5_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE5_STOP_Pos) /*!< Bit mask of COMPARE5_STOP field. */
+#define TIMER_SHORTS_COMPARE5_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define TIMER_SHORTS_COMPARE5_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 12 : Shortcut between event COMPARE[4] and task STOP */
+#define TIMER_SHORTS_COMPARE4_STOP_Pos (12UL) /*!< Position of COMPARE4_STOP field. */
+#define TIMER_SHORTS_COMPARE4_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE4_STOP_Pos) /*!< Bit mask of COMPARE4_STOP field. */
+#define TIMER_SHORTS_COMPARE4_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define TIMER_SHORTS_COMPARE4_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 11 : Shortcut between event COMPARE[3] and task STOP */
+#define TIMER_SHORTS_COMPARE3_STOP_Pos (11UL) /*!< Position of COMPARE3_STOP field. */
+#define TIMER_SHORTS_COMPARE3_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE3_STOP_Pos) /*!< Bit mask of COMPARE3_STOP field. */
+#define TIMER_SHORTS_COMPARE3_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define TIMER_SHORTS_COMPARE3_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 10 : Shortcut between event COMPARE[2] and task STOP */
+#define TIMER_SHORTS_COMPARE2_STOP_Pos (10UL) /*!< Position of COMPARE2_STOP field. */
+#define TIMER_SHORTS_COMPARE2_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE2_STOP_Pos) /*!< Bit mask of COMPARE2_STOP field. */
+#define TIMER_SHORTS_COMPARE2_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define TIMER_SHORTS_COMPARE2_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 9 : Shortcut between event COMPARE[1] and task STOP */
+#define TIMER_SHORTS_COMPARE1_STOP_Pos (9UL) /*!< Position of COMPARE1_STOP field. */
+#define TIMER_SHORTS_COMPARE1_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE1_STOP_Pos) /*!< Bit mask of COMPARE1_STOP field. */
+#define TIMER_SHORTS_COMPARE1_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define TIMER_SHORTS_COMPARE1_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 8 : Shortcut between event COMPARE[0] and task STOP */
+#define TIMER_SHORTS_COMPARE0_STOP_Pos (8UL) /*!< Position of COMPARE0_STOP field. */
+#define TIMER_SHORTS_COMPARE0_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE0_STOP_Pos) /*!< Bit mask of COMPARE0_STOP field. */
+#define TIMER_SHORTS_COMPARE0_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define TIMER_SHORTS_COMPARE0_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 5 : Shortcut between event COMPARE[5] and task CLEAR */
+#define TIMER_SHORTS_COMPARE5_CLEAR_Pos (5UL) /*!< Position of COMPARE5_CLEAR field. */
+#define TIMER_SHORTS_COMPARE5_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE5_CLEAR_Pos) /*!< Bit mask of COMPARE5_CLEAR field. */
+#define TIMER_SHORTS_COMPARE5_CLEAR_Disabled (0UL) /*!< Disable shortcut */
+#define TIMER_SHORTS_COMPARE5_CLEAR_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 4 : Shortcut between event COMPARE[4] and task CLEAR */
+#define TIMER_SHORTS_COMPARE4_CLEAR_Pos (4UL) /*!< Position of COMPARE4_CLEAR field. */
+#define TIMER_SHORTS_COMPARE4_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE4_CLEAR_Pos) /*!< Bit mask of COMPARE4_CLEAR field. */
+#define TIMER_SHORTS_COMPARE4_CLEAR_Disabled (0UL) /*!< Disable shortcut */
+#define TIMER_SHORTS_COMPARE4_CLEAR_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 3 : Shortcut between event COMPARE[3] and task CLEAR */
+#define TIMER_SHORTS_COMPARE3_CLEAR_Pos (3UL) /*!< Position of COMPARE3_CLEAR field. */
+#define TIMER_SHORTS_COMPARE3_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE3_CLEAR_Pos) /*!< Bit mask of COMPARE3_CLEAR field. */
+#define TIMER_SHORTS_COMPARE3_CLEAR_Disabled (0UL) /*!< Disable shortcut */
+#define TIMER_SHORTS_COMPARE3_CLEAR_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 2 : Shortcut between event COMPARE[2] and task CLEAR */
+#define TIMER_SHORTS_COMPARE2_CLEAR_Pos (2UL) /*!< Position of COMPARE2_CLEAR field. */
+#define TIMER_SHORTS_COMPARE2_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE2_CLEAR_Pos) /*!< Bit mask of COMPARE2_CLEAR field. */
+#define TIMER_SHORTS_COMPARE2_CLEAR_Disabled (0UL) /*!< Disable shortcut */
+#define TIMER_SHORTS_COMPARE2_CLEAR_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 1 : Shortcut between event COMPARE[1] and task CLEAR */
+#define TIMER_SHORTS_COMPARE1_CLEAR_Pos (1UL) /*!< Position of COMPARE1_CLEAR field. */
+#define TIMER_SHORTS_COMPARE1_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE1_CLEAR_Pos) /*!< Bit mask of COMPARE1_CLEAR field. */
+#define TIMER_SHORTS_COMPARE1_CLEAR_Disabled (0UL) /*!< Disable shortcut */
+#define TIMER_SHORTS_COMPARE1_CLEAR_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 0 : Shortcut between event COMPARE[0] and task CLEAR */
+#define TIMER_SHORTS_COMPARE0_CLEAR_Pos (0UL) /*!< Position of COMPARE0_CLEAR field. */
+#define TIMER_SHORTS_COMPARE0_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE0_CLEAR_Pos) /*!< Bit mask of COMPARE0_CLEAR field. */
+#define TIMER_SHORTS_COMPARE0_CLEAR_Disabled (0UL) /*!< Disable shortcut */
+#define TIMER_SHORTS_COMPARE0_CLEAR_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: TIMER_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 21 : Write '1' to enable interrupt for event COMPARE[5] */
+#define TIMER_INTENSET_COMPARE5_Pos (21UL) /*!< Position of COMPARE5 field. */
+#define TIMER_INTENSET_COMPARE5_Msk (0x1UL << TIMER_INTENSET_COMPARE5_Pos) /*!< Bit mask of COMPARE5 field. */
+#define TIMER_INTENSET_COMPARE5_Disabled (0UL) /*!< Read: Disabled */
+#define TIMER_INTENSET_COMPARE5_Enabled (1UL) /*!< Read: Enabled */
+#define TIMER_INTENSET_COMPARE5_Set (1UL) /*!< Enable */
+
+/* Bit 20 : Write '1' to enable interrupt for event COMPARE[4] */
+#define TIMER_INTENSET_COMPARE4_Pos (20UL) /*!< Position of COMPARE4 field. */
+#define TIMER_INTENSET_COMPARE4_Msk (0x1UL << TIMER_INTENSET_COMPARE4_Pos) /*!< Bit mask of COMPARE4 field. */
+#define TIMER_INTENSET_COMPARE4_Disabled (0UL) /*!< Read: Disabled */
+#define TIMER_INTENSET_COMPARE4_Enabled (1UL) /*!< Read: Enabled */
+#define TIMER_INTENSET_COMPARE4_Set (1UL) /*!< Enable */
+
+/* Bit 19 : Write '1' to enable interrupt for event COMPARE[3] */
+#define TIMER_INTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */
+#define TIMER_INTENSET_COMPARE3_Msk (0x1UL << TIMER_INTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */
+#define TIMER_INTENSET_COMPARE3_Disabled (0UL) /*!< Read: Disabled */
+#define TIMER_INTENSET_COMPARE3_Enabled (1UL) /*!< Read: Enabled */
+#define TIMER_INTENSET_COMPARE3_Set (1UL) /*!< Enable */
+
+/* Bit 18 : Write '1' to enable interrupt for event COMPARE[2] */
+#define TIMER_INTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */
+#define TIMER_INTENSET_COMPARE2_Msk (0x1UL << TIMER_INTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */
+#define TIMER_INTENSET_COMPARE2_Disabled (0UL) /*!< Read: Disabled */
+#define TIMER_INTENSET_COMPARE2_Enabled (1UL) /*!< Read: Enabled */
+#define TIMER_INTENSET_COMPARE2_Set (1UL) /*!< Enable */
+
+/* Bit 17 : Write '1' to enable interrupt for event COMPARE[1] */
+#define TIMER_INTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */
+#define TIMER_INTENSET_COMPARE1_Msk (0x1UL << TIMER_INTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */
+#define TIMER_INTENSET_COMPARE1_Disabled (0UL) /*!< Read: Disabled */
+#define TIMER_INTENSET_COMPARE1_Enabled (1UL) /*!< Read: Enabled */
+#define TIMER_INTENSET_COMPARE1_Set (1UL) /*!< Enable */
+
+/* Bit 16 : Write '1' to enable interrupt for event COMPARE[0] */
+#define TIMER_INTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */
+#define TIMER_INTENSET_COMPARE0_Msk (0x1UL << TIMER_INTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */
+#define TIMER_INTENSET_COMPARE0_Disabled (0UL) /*!< Read: Disabled */
+#define TIMER_INTENSET_COMPARE0_Enabled (1UL) /*!< Read: Enabled */
+#define TIMER_INTENSET_COMPARE0_Set (1UL) /*!< Enable */
+
+/* Register: TIMER_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 21 : Write '1' to disable interrupt for event COMPARE[5] */
+#define TIMER_INTENCLR_COMPARE5_Pos (21UL) /*!< Position of COMPARE5 field. */
+#define TIMER_INTENCLR_COMPARE5_Msk (0x1UL << TIMER_INTENCLR_COMPARE5_Pos) /*!< Bit mask of COMPARE5 field. */
+#define TIMER_INTENCLR_COMPARE5_Disabled (0UL) /*!< Read: Disabled */
+#define TIMER_INTENCLR_COMPARE5_Enabled (1UL) /*!< Read: Enabled */
+#define TIMER_INTENCLR_COMPARE5_Clear (1UL) /*!< Disable */
+
+/* Bit 20 : Write '1' to disable interrupt for event COMPARE[4] */
+#define TIMER_INTENCLR_COMPARE4_Pos (20UL) /*!< Position of COMPARE4 field. */
+#define TIMER_INTENCLR_COMPARE4_Msk (0x1UL << TIMER_INTENCLR_COMPARE4_Pos) /*!< Bit mask of COMPARE4 field. */
+#define TIMER_INTENCLR_COMPARE4_Disabled (0UL) /*!< Read: Disabled */
+#define TIMER_INTENCLR_COMPARE4_Enabled (1UL) /*!< Read: Enabled */
+#define TIMER_INTENCLR_COMPARE4_Clear (1UL) /*!< Disable */
+
+/* Bit 19 : Write '1' to disable interrupt for event COMPARE[3] */
+#define TIMER_INTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */
+#define TIMER_INTENCLR_COMPARE3_Msk (0x1UL << TIMER_INTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */
+#define TIMER_INTENCLR_COMPARE3_Disabled (0UL) /*!< Read: Disabled */
+#define TIMER_INTENCLR_COMPARE3_Enabled (1UL) /*!< Read: Enabled */
+#define TIMER_INTENCLR_COMPARE3_Clear (1UL) /*!< Disable */
+
+/* Bit 18 : Write '1' to disable interrupt for event COMPARE[2] */
+#define TIMER_INTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */
+#define TIMER_INTENCLR_COMPARE2_Msk (0x1UL << TIMER_INTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */
+#define TIMER_INTENCLR_COMPARE2_Disabled (0UL) /*!< Read: Disabled */
+#define TIMER_INTENCLR_COMPARE2_Enabled (1UL) /*!< Read: Enabled */
+#define TIMER_INTENCLR_COMPARE2_Clear (1UL) /*!< Disable */
+
+/* Bit 17 : Write '1' to disable interrupt for event COMPARE[1] */
+#define TIMER_INTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */
+#define TIMER_INTENCLR_COMPARE1_Msk (0x1UL << TIMER_INTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */
+#define TIMER_INTENCLR_COMPARE1_Disabled (0UL) /*!< Read: Disabled */
+#define TIMER_INTENCLR_COMPARE1_Enabled (1UL) /*!< Read: Enabled */
+#define TIMER_INTENCLR_COMPARE1_Clear (1UL) /*!< Disable */
+
+/* Bit 16 : Write '1' to disable interrupt for event COMPARE[0] */
+#define TIMER_INTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */
+#define TIMER_INTENCLR_COMPARE0_Msk (0x1UL << TIMER_INTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */
+#define TIMER_INTENCLR_COMPARE0_Disabled (0UL) /*!< Read: Disabled */
+#define TIMER_INTENCLR_COMPARE0_Enabled (1UL) /*!< Read: Enabled */
+#define TIMER_INTENCLR_COMPARE0_Clear (1UL) /*!< Disable */
+
+/* Register: TIMER_MODE */
+/* Description: Timer mode selection */
+
+/* Bits 1..0 : Timer mode */
+#define TIMER_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */
+#define TIMER_MODE_MODE_Msk (0x3UL << TIMER_MODE_MODE_Pos) /*!< Bit mask of MODE field. */
+#define TIMER_MODE_MODE_Timer (0UL) /*!< Select Timer mode */
+#define TIMER_MODE_MODE_Counter (1UL) /*!< Deprecated enumerator - Select Counter mode */
+#define TIMER_MODE_MODE_LowPowerCounter (2UL) /*!< Select Low Power Counter mode */
+
+/* Register: TIMER_BITMODE */
+/* Description: Configure the number of bits used by the TIMER */
+
+/* Bits 1..0 : Timer bit width */
+#define TIMER_BITMODE_BITMODE_Pos (0UL) /*!< Position of BITMODE field. */
+#define TIMER_BITMODE_BITMODE_Msk (0x3UL << TIMER_BITMODE_BITMODE_Pos) /*!< Bit mask of BITMODE field. */
+#define TIMER_BITMODE_BITMODE_16Bit (0UL) /*!< 16 bit timer bit width */
+#define TIMER_BITMODE_BITMODE_08Bit (1UL) /*!< 8 bit timer bit width */
+#define TIMER_BITMODE_BITMODE_24Bit (2UL) /*!< 24 bit timer bit width */
+#define TIMER_BITMODE_BITMODE_32Bit (3UL) /*!< 32 bit timer bit width */
+
+/* Register: TIMER_PRESCALER */
+/* Description: Timer prescaler register */
+
+/* Bits 3..0 : Prescaler value */
+#define TIMER_PRESCALER_PRESCALER_Pos (0UL) /*!< Position of PRESCALER field. */
+#define TIMER_PRESCALER_PRESCALER_Msk (0xFUL << TIMER_PRESCALER_PRESCALER_Pos) /*!< Bit mask of PRESCALER field. */
+
+/* Register: TIMER_CC */
+/* Description: Description collection: Capture/Compare register n */
+
+/* Bits 31..0 : Capture/Compare value */
+#define TIMER_CC_CC_Pos (0UL) /*!< Position of CC field. */
+#define TIMER_CC_CC_Msk (0xFFFFFFFFUL << TIMER_CC_CC_Pos) /*!< Bit mask of CC field. */
+
+
+/* Peripheral: TWI */
+/* Description: I2C compatible Two-Wire Interface */
+
+/* Register: TWI_TASKS_STARTRX */
+/* Description: Start TWI receive sequence */
+
+/* Bit 0 : Start TWI receive sequence */
+#define TWI_TASKS_STARTRX_TASKS_STARTRX_Pos (0UL) /*!< Position of TASKS_STARTRX field. */
+#define TWI_TASKS_STARTRX_TASKS_STARTRX_Msk (0x1UL << TWI_TASKS_STARTRX_TASKS_STARTRX_Pos) /*!< Bit mask of TASKS_STARTRX field. */
+#define TWI_TASKS_STARTRX_TASKS_STARTRX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWI_TASKS_STARTTX */
+/* Description: Start TWI transmit sequence */
+
+/* Bit 0 : Start TWI transmit sequence */
+#define TWI_TASKS_STARTTX_TASKS_STARTTX_Pos (0UL) /*!< Position of TASKS_STARTTX field. */
+#define TWI_TASKS_STARTTX_TASKS_STARTTX_Msk (0x1UL << TWI_TASKS_STARTTX_TASKS_STARTTX_Pos) /*!< Bit mask of TASKS_STARTTX field. */
+#define TWI_TASKS_STARTTX_TASKS_STARTTX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWI_TASKS_STOP */
+/* Description: Stop TWI transaction */
+
+/* Bit 0 : Stop TWI transaction */
+#define TWI_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define TWI_TASKS_STOP_TASKS_STOP_Msk (0x1UL << TWI_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define TWI_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWI_TASKS_SUSPEND */
+/* Description: Suspend TWI transaction */
+
+/* Bit 0 : Suspend TWI transaction */
+#define TWI_TASKS_SUSPEND_TASKS_SUSPEND_Pos (0UL) /*!< Position of TASKS_SUSPEND field. */
+#define TWI_TASKS_SUSPEND_TASKS_SUSPEND_Msk (0x1UL << TWI_TASKS_SUSPEND_TASKS_SUSPEND_Pos) /*!< Bit mask of TASKS_SUSPEND field. */
+#define TWI_TASKS_SUSPEND_TASKS_SUSPEND_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWI_TASKS_RESUME */
+/* Description: Resume TWI transaction */
+
+/* Bit 0 : Resume TWI transaction */
+#define TWI_TASKS_RESUME_TASKS_RESUME_Pos (0UL) /*!< Position of TASKS_RESUME field. */
+#define TWI_TASKS_RESUME_TASKS_RESUME_Msk (0x1UL << TWI_TASKS_RESUME_TASKS_RESUME_Pos) /*!< Bit mask of TASKS_RESUME field. */
+#define TWI_TASKS_RESUME_TASKS_RESUME_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWI_EVENTS_STOPPED */
+/* Description: TWI stopped */
+
+/* Bit 0 : TWI stopped */
+#define TWI_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */
+#define TWI_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << TWI_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */
+#define TWI_EVENTS_STOPPED_EVENTS_STOPPED_NotGenerated (0UL) /*!< Event not generated */
+#define TWI_EVENTS_STOPPED_EVENTS_STOPPED_Generated (1UL) /*!< Event generated */
+
+/* Register: TWI_EVENTS_RXDREADY */
+/* Description: TWI RXD byte received */
+
+/* Bit 0 : TWI RXD byte received */
+#define TWI_EVENTS_RXDREADY_EVENTS_RXDREADY_Pos (0UL) /*!< Position of EVENTS_RXDREADY field. */
+#define TWI_EVENTS_RXDREADY_EVENTS_RXDREADY_Msk (0x1UL << TWI_EVENTS_RXDREADY_EVENTS_RXDREADY_Pos) /*!< Bit mask of EVENTS_RXDREADY field. */
+#define TWI_EVENTS_RXDREADY_EVENTS_RXDREADY_NotGenerated (0UL) /*!< Event not generated */
+#define TWI_EVENTS_RXDREADY_EVENTS_RXDREADY_Generated (1UL) /*!< Event generated */
+
+/* Register: TWI_EVENTS_TXDSENT */
+/* Description: TWI TXD byte sent */
+
+/* Bit 0 : TWI TXD byte sent */
+#define TWI_EVENTS_TXDSENT_EVENTS_TXDSENT_Pos (0UL) /*!< Position of EVENTS_TXDSENT field. */
+#define TWI_EVENTS_TXDSENT_EVENTS_TXDSENT_Msk (0x1UL << TWI_EVENTS_TXDSENT_EVENTS_TXDSENT_Pos) /*!< Bit mask of EVENTS_TXDSENT field. */
+#define TWI_EVENTS_TXDSENT_EVENTS_TXDSENT_NotGenerated (0UL) /*!< Event not generated */
+#define TWI_EVENTS_TXDSENT_EVENTS_TXDSENT_Generated (1UL) /*!< Event generated */
+
+/* Register: TWI_EVENTS_ERROR */
+/* Description: TWI error */
+
+/* Bit 0 : TWI error */
+#define TWI_EVENTS_ERROR_EVENTS_ERROR_Pos (0UL) /*!< Position of EVENTS_ERROR field. */
+#define TWI_EVENTS_ERROR_EVENTS_ERROR_Msk (0x1UL << TWI_EVENTS_ERROR_EVENTS_ERROR_Pos) /*!< Bit mask of EVENTS_ERROR field. */
+#define TWI_EVENTS_ERROR_EVENTS_ERROR_NotGenerated (0UL) /*!< Event not generated */
+#define TWI_EVENTS_ERROR_EVENTS_ERROR_Generated (1UL) /*!< Event generated */
+
+/* Register: TWI_EVENTS_BB */
+/* Description: TWI byte boundary, generated before each byte that is sent or received */
+
+/* Bit 0 : TWI byte boundary, generated before each byte that is sent or received */
+#define TWI_EVENTS_BB_EVENTS_BB_Pos (0UL) /*!< Position of EVENTS_BB field. */
+#define TWI_EVENTS_BB_EVENTS_BB_Msk (0x1UL << TWI_EVENTS_BB_EVENTS_BB_Pos) /*!< Bit mask of EVENTS_BB field. */
+#define TWI_EVENTS_BB_EVENTS_BB_NotGenerated (0UL) /*!< Event not generated */
+#define TWI_EVENTS_BB_EVENTS_BB_Generated (1UL) /*!< Event generated */
+
+/* Register: TWI_EVENTS_SUSPENDED */
+/* Description: TWI entered the suspended state */
+
+/* Bit 0 : TWI entered the suspended state */
+#define TWI_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Pos (0UL) /*!< Position of EVENTS_SUSPENDED field. */
+#define TWI_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Msk (0x1UL << TWI_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Pos) /*!< Bit mask of EVENTS_SUSPENDED field. */
+#define TWI_EVENTS_SUSPENDED_EVENTS_SUSPENDED_NotGenerated (0UL) /*!< Event not generated */
+#define TWI_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Generated (1UL) /*!< Event generated */
+
+/* Register: TWI_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 1 : Shortcut between event BB and task STOP */
+#define TWI_SHORTS_BB_STOP_Pos (1UL) /*!< Position of BB_STOP field. */
+#define TWI_SHORTS_BB_STOP_Msk (0x1UL << TWI_SHORTS_BB_STOP_Pos) /*!< Bit mask of BB_STOP field. */
+#define TWI_SHORTS_BB_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define TWI_SHORTS_BB_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 0 : Shortcut between event BB and task SUSPEND */
+#define TWI_SHORTS_BB_SUSPEND_Pos (0UL) /*!< Position of BB_SUSPEND field. */
+#define TWI_SHORTS_BB_SUSPEND_Msk (0x1UL << TWI_SHORTS_BB_SUSPEND_Pos) /*!< Bit mask of BB_SUSPEND field. */
+#define TWI_SHORTS_BB_SUSPEND_Disabled (0UL) /*!< Disable shortcut */
+#define TWI_SHORTS_BB_SUSPEND_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: TWI_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 18 : Write '1' to enable interrupt for event SUSPENDED */
+#define TWI_INTENSET_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */
+#define TWI_INTENSET_SUSPENDED_Msk (0x1UL << TWI_INTENSET_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */
+#define TWI_INTENSET_SUSPENDED_Disabled (0UL) /*!< Read: Disabled */
+#define TWI_INTENSET_SUSPENDED_Enabled (1UL) /*!< Read: Enabled */
+#define TWI_INTENSET_SUSPENDED_Set (1UL) /*!< Enable */
+
+/* Bit 14 : Write '1' to enable interrupt for event BB */
+#define TWI_INTENSET_BB_Pos (14UL) /*!< Position of BB field. */
+#define TWI_INTENSET_BB_Msk (0x1UL << TWI_INTENSET_BB_Pos) /*!< Bit mask of BB field. */
+#define TWI_INTENSET_BB_Disabled (0UL) /*!< Read: Disabled */
+#define TWI_INTENSET_BB_Enabled (1UL) /*!< Read: Enabled */
+#define TWI_INTENSET_BB_Set (1UL) /*!< Enable */
+
+/* Bit 9 : Write '1' to enable interrupt for event ERROR */
+#define TWI_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */
+#define TWI_INTENSET_ERROR_Msk (0x1UL << TWI_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define TWI_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */
+#define TWI_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */
+#define TWI_INTENSET_ERROR_Set (1UL) /*!< Enable */
+
+/* Bit 7 : Write '1' to enable interrupt for event TXDSENT */
+#define TWI_INTENSET_TXDSENT_Pos (7UL) /*!< Position of TXDSENT field. */
+#define TWI_INTENSET_TXDSENT_Msk (0x1UL << TWI_INTENSET_TXDSENT_Pos) /*!< Bit mask of TXDSENT field. */
+#define TWI_INTENSET_TXDSENT_Disabled (0UL) /*!< Read: Disabled */
+#define TWI_INTENSET_TXDSENT_Enabled (1UL) /*!< Read: Enabled */
+#define TWI_INTENSET_TXDSENT_Set (1UL) /*!< Enable */
+
+/* Bit 2 : Write '1' to enable interrupt for event RXDREADY */
+#define TWI_INTENSET_RXDREADY_Pos (2UL) /*!< Position of RXDREADY field. */
+#define TWI_INTENSET_RXDREADY_Msk (0x1UL << TWI_INTENSET_RXDREADY_Pos) /*!< Bit mask of RXDREADY field. */
+#define TWI_INTENSET_RXDREADY_Disabled (0UL) /*!< Read: Disabled */
+#define TWI_INTENSET_RXDREADY_Enabled (1UL) /*!< Read: Enabled */
+#define TWI_INTENSET_RXDREADY_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event STOPPED */
+#define TWI_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */
+#define TWI_INTENSET_STOPPED_Msk (0x1UL << TWI_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define TWI_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define TWI_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define TWI_INTENSET_STOPPED_Set (1UL) /*!< Enable */
+
+/* Register: TWI_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 18 : Write '1' to disable interrupt for event SUSPENDED */
+#define TWI_INTENCLR_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */
+#define TWI_INTENCLR_SUSPENDED_Msk (0x1UL << TWI_INTENCLR_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */
+#define TWI_INTENCLR_SUSPENDED_Disabled (0UL) /*!< Read: Disabled */
+#define TWI_INTENCLR_SUSPENDED_Enabled (1UL) /*!< Read: Enabled */
+#define TWI_INTENCLR_SUSPENDED_Clear (1UL) /*!< Disable */
+
+/* Bit 14 : Write '1' to disable interrupt for event BB */
+#define TWI_INTENCLR_BB_Pos (14UL) /*!< Position of BB field. */
+#define TWI_INTENCLR_BB_Msk (0x1UL << TWI_INTENCLR_BB_Pos) /*!< Bit mask of BB field. */
+#define TWI_INTENCLR_BB_Disabled (0UL) /*!< Read: Disabled */
+#define TWI_INTENCLR_BB_Enabled (1UL) /*!< Read: Enabled */
+#define TWI_INTENCLR_BB_Clear (1UL) /*!< Disable */
+
+/* Bit 9 : Write '1' to disable interrupt for event ERROR */
+#define TWI_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */
+#define TWI_INTENCLR_ERROR_Msk (0x1UL << TWI_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define TWI_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */
+#define TWI_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */
+#define TWI_INTENCLR_ERROR_Clear (1UL) /*!< Disable */
+
+/* Bit 7 : Write '1' to disable interrupt for event TXDSENT */
+#define TWI_INTENCLR_TXDSENT_Pos (7UL) /*!< Position of TXDSENT field. */
+#define TWI_INTENCLR_TXDSENT_Msk (0x1UL << TWI_INTENCLR_TXDSENT_Pos) /*!< Bit mask of TXDSENT field. */
+#define TWI_INTENCLR_TXDSENT_Disabled (0UL) /*!< Read: Disabled */
+#define TWI_INTENCLR_TXDSENT_Enabled (1UL) /*!< Read: Enabled */
+#define TWI_INTENCLR_TXDSENT_Clear (1UL) /*!< Disable */
+
+/* Bit 2 : Write '1' to disable interrupt for event RXDREADY */
+#define TWI_INTENCLR_RXDREADY_Pos (2UL) /*!< Position of RXDREADY field. */
+#define TWI_INTENCLR_RXDREADY_Msk (0x1UL << TWI_INTENCLR_RXDREADY_Pos) /*!< Bit mask of RXDREADY field. */
+#define TWI_INTENCLR_RXDREADY_Disabled (0UL) /*!< Read: Disabled */
+#define TWI_INTENCLR_RXDREADY_Enabled (1UL) /*!< Read: Enabled */
+#define TWI_INTENCLR_RXDREADY_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event STOPPED */
+#define TWI_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */
+#define TWI_INTENCLR_STOPPED_Msk (0x1UL << TWI_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define TWI_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define TWI_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define TWI_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */
+
+/* Register: TWI_ERRORSRC */
+/* Description: Error source */
+
+/* Bit 2 : NACK received after sending a data byte (write '1' to clear) */
+#define TWI_ERRORSRC_DNACK_Pos (2UL) /*!< Position of DNACK field. */
+#define TWI_ERRORSRC_DNACK_Msk (0x1UL << TWI_ERRORSRC_DNACK_Pos) /*!< Bit mask of DNACK field. */
+#define TWI_ERRORSRC_DNACK_NotPresent (0UL) /*!< Read: error not present */
+#define TWI_ERRORSRC_DNACK_Present (1UL) /*!< Read: error present */
+
+/* Bit 1 : NACK received after sending the address (write '1' to clear) */
+#define TWI_ERRORSRC_ANACK_Pos (1UL) /*!< Position of ANACK field. */
+#define TWI_ERRORSRC_ANACK_Msk (0x1UL << TWI_ERRORSRC_ANACK_Pos) /*!< Bit mask of ANACK field. */
+#define TWI_ERRORSRC_ANACK_NotPresent (0UL) /*!< Read: error not present */
+#define TWI_ERRORSRC_ANACK_Present (1UL) /*!< Read: error present */
+
+/* Bit 0 : Overrun error */
+#define TWI_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */
+#define TWI_ERRORSRC_OVERRUN_Msk (0x1UL << TWI_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */
+#define TWI_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Read: no overrun occured */
+#define TWI_ERRORSRC_OVERRUN_Present (1UL) /*!< Read: overrun occured */
+
+/* Register: TWI_ENABLE */
+/* Description: Enable TWI */
+
+/* Bits 3..0 : Enable or disable TWI */
+#define TWI_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define TWI_ENABLE_ENABLE_Msk (0xFUL << TWI_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define TWI_ENABLE_ENABLE_Disabled (0UL) /*!< Disable TWI */
+#define TWI_ENABLE_ENABLE_Enabled (5UL) /*!< Enable TWI */
+
+/* Register: TWI_PSEL_SCL */
+/* Description: Pin select for SCL */
+
+/* Bit 31 : Connection */
+#define TWI_PSEL_SCL_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define TWI_PSEL_SCL_CONNECT_Msk (0x1UL << TWI_PSEL_SCL_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define TWI_PSEL_SCL_CONNECT_Connected (0UL) /*!< Connect */
+#define TWI_PSEL_SCL_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bits 4..0 : Pin number */
+#define TWI_PSEL_SCL_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define TWI_PSEL_SCL_PIN_Msk (0x1FUL << TWI_PSEL_SCL_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: TWI_PSEL_SDA */
+/* Description: Pin select for SDA */
+
+/* Bit 31 : Connection */
+#define TWI_PSEL_SDA_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define TWI_PSEL_SDA_CONNECT_Msk (0x1UL << TWI_PSEL_SDA_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define TWI_PSEL_SDA_CONNECT_Connected (0UL) /*!< Connect */
+#define TWI_PSEL_SDA_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bits 4..0 : Pin number */
+#define TWI_PSEL_SDA_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define TWI_PSEL_SDA_PIN_Msk (0x1FUL << TWI_PSEL_SDA_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: TWI_RXD */
+/* Description: RXD register */
+
+/* Bits 7..0 : RXD register */
+#define TWI_RXD_RXD_Pos (0UL) /*!< Position of RXD field. */
+#define TWI_RXD_RXD_Msk (0xFFUL << TWI_RXD_RXD_Pos) /*!< Bit mask of RXD field. */
+
+/* Register: TWI_TXD */
+/* Description: TXD register */
+
+/* Bits 7..0 : TXD register */
+#define TWI_TXD_TXD_Pos (0UL) /*!< Position of TXD field. */
+#define TWI_TXD_TXD_Msk (0xFFUL << TWI_TXD_TXD_Pos) /*!< Bit mask of TXD field. */
+
+/* Register: TWI_FREQUENCY */
+/* Description: TWI frequency. Accuracy depends on the HFCLK source selected. */
+
+/* Bits 31..0 : TWI master clock frequency */
+#define TWI_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */
+#define TWI_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << TWI_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */
+#define TWI_FREQUENCY_FREQUENCY_K100 (0x01980000UL) /*!< 100 kbps */
+#define TWI_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps */
+#define TWI_FREQUENCY_FREQUENCY_K400 (0x06680000UL) /*!< 400 kbps (actual rate 410.256 kbps) */
+
+/* Register: TWI_ADDRESS */
+/* Description: Address used in the TWI transfer */
+
+/* Bits 6..0 : Address used in the TWI transfer */
+#define TWI_ADDRESS_ADDRESS_Pos (0UL) /*!< Position of ADDRESS field. */
+#define TWI_ADDRESS_ADDRESS_Msk (0x7FUL << TWI_ADDRESS_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */
+
+
+/* Peripheral: TWIM */
+/* Description: I2C compatible Two-Wire Master Interface with EasyDMA */
+
+/* Register: TWIM_TASKS_STARTRX */
+/* Description: Start TWI receive sequence */
+
+/* Bit 0 : Start TWI receive sequence */
+#define TWIM_TASKS_STARTRX_TASKS_STARTRX_Pos (0UL) /*!< Position of TASKS_STARTRX field. */
+#define TWIM_TASKS_STARTRX_TASKS_STARTRX_Msk (0x1UL << TWIM_TASKS_STARTRX_TASKS_STARTRX_Pos) /*!< Bit mask of TASKS_STARTRX field. */
+#define TWIM_TASKS_STARTRX_TASKS_STARTRX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWIM_TASKS_STARTTX */
+/* Description: Start TWI transmit sequence */
+
+/* Bit 0 : Start TWI transmit sequence */
+#define TWIM_TASKS_STARTTX_TASKS_STARTTX_Pos (0UL) /*!< Position of TASKS_STARTTX field. */
+#define TWIM_TASKS_STARTTX_TASKS_STARTTX_Msk (0x1UL << TWIM_TASKS_STARTTX_TASKS_STARTTX_Pos) /*!< Bit mask of TASKS_STARTTX field. */
+#define TWIM_TASKS_STARTTX_TASKS_STARTTX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWIM_TASKS_STOP */
+/* Description: Stop TWI transaction. Must be issued while the TWI master is not suspended. */
+
+/* Bit 0 : Stop TWI transaction. Must be issued while the TWI master is not suspended. */
+#define TWIM_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define TWIM_TASKS_STOP_TASKS_STOP_Msk (0x1UL << TWIM_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define TWIM_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWIM_TASKS_SUSPEND */
+/* Description: Suspend TWI transaction */
+
+/* Bit 0 : Suspend TWI transaction */
+#define TWIM_TASKS_SUSPEND_TASKS_SUSPEND_Pos (0UL) /*!< Position of TASKS_SUSPEND field. */
+#define TWIM_TASKS_SUSPEND_TASKS_SUSPEND_Msk (0x1UL << TWIM_TASKS_SUSPEND_TASKS_SUSPEND_Pos) /*!< Bit mask of TASKS_SUSPEND field. */
+#define TWIM_TASKS_SUSPEND_TASKS_SUSPEND_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWIM_TASKS_RESUME */
+/* Description: Resume TWI transaction */
+
+/* Bit 0 : Resume TWI transaction */
+#define TWIM_TASKS_RESUME_TASKS_RESUME_Pos (0UL) /*!< Position of TASKS_RESUME field. */
+#define TWIM_TASKS_RESUME_TASKS_RESUME_Msk (0x1UL << TWIM_TASKS_RESUME_TASKS_RESUME_Pos) /*!< Bit mask of TASKS_RESUME field. */
+#define TWIM_TASKS_RESUME_TASKS_RESUME_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWIM_EVENTS_STOPPED */
+/* Description: TWI stopped */
+
+/* Bit 0 : TWI stopped */
+#define TWIM_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */
+#define TWIM_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << TWIM_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */
+#define TWIM_EVENTS_STOPPED_EVENTS_STOPPED_NotGenerated (0UL) /*!< Event not generated */
+#define TWIM_EVENTS_STOPPED_EVENTS_STOPPED_Generated (1UL) /*!< Event generated */
+
+/* Register: TWIM_EVENTS_ERROR */
+/* Description: TWI error */
+
+/* Bit 0 : TWI error */
+#define TWIM_EVENTS_ERROR_EVENTS_ERROR_Pos (0UL) /*!< Position of EVENTS_ERROR field. */
+#define TWIM_EVENTS_ERROR_EVENTS_ERROR_Msk (0x1UL << TWIM_EVENTS_ERROR_EVENTS_ERROR_Pos) /*!< Bit mask of EVENTS_ERROR field. */
+#define TWIM_EVENTS_ERROR_EVENTS_ERROR_NotGenerated (0UL) /*!< Event not generated */
+#define TWIM_EVENTS_ERROR_EVENTS_ERROR_Generated (1UL) /*!< Event generated */
+
+/* Register: TWIM_EVENTS_SUSPENDED */
+/* Description: Last byte has been sent out after the SUSPEND task has been issued, TWI traffic is now suspended. */
+
+/* Bit 0 : Last byte has been sent out after the SUSPEND task has been issued, TWI traffic is now suspended. */
+#define TWIM_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Pos (0UL) /*!< Position of EVENTS_SUSPENDED field. */
+#define TWIM_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Msk (0x1UL << TWIM_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Pos) /*!< Bit mask of EVENTS_SUSPENDED field. */
+#define TWIM_EVENTS_SUSPENDED_EVENTS_SUSPENDED_NotGenerated (0UL) /*!< Event not generated */
+#define TWIM_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Generated (1UL) /*!< Event generated */
+
+/* Register: TWIM_EVENTS_RXSTARTED */
+/* Description: Receive sequence started */
+
+/* Bit 0 : Receive sequence started */
+#define TWIM_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos (0UL) /*!< Position of EVENTS_RXSTARTED field. */
+#define TWIM_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Msk (0x1UL << TWIM_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos) /*!< Bit mask of EVENTS_RXSTARTED field. */
+#define TWIM_EVENTS_RXSTARTED_EVENTS_RXSTARTED_NotGenerated (0UL) /*!< Event not generated */
+#define TWIM_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Generated (1UL) /*!< Event generated */
+
+/* Register: TWIM_EVENTS_TXSTARTED */
+/* Description: Transmit sequence started */
+
+/* Bit 0 : Transmit sequence started */
+#define TWIM_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos (0UL) /*!< Position of EVENTS_TXSTARTED field. */
+#define TWIM_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Msk (0x1UL << TWIM_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos) /*!< Bit mask of EVENTS_TXSTARTED field. */
+#define TWIM_EVENTS_TXSTARTED_EVENTS_TXSTARTED_NotGenerated (0UL) /*!< Event not generated */
+#define TWIM_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Generated (1UL) /*!< Event generated */
+
+/* Register: TWIM_EVENTS_LASTRX */
+/* Description: Byte boundary, starting to receive the last byte */
+
+/* Bit 0 : Byte boundary, starting to receive the last byte */
+#define TWIM_EVENTS_LASTRX_EVENTS_LASTRX_Pos (0UL) /*!< Position of EVENTS_LASTRX field. */
+#define TWIM_EVENTS_LASTRX_EVENTS_LASTRX_Msk (0x1UL << TWIM_EVENTS_LASTRX_EVENTS_LASTRX_Pos) /*!< Bit mask of EVENTS_LASTRX field. */
+#define TWIM_EVENTS_LASTRX_EVENTS_LASTRX_NotGenerated (0UL) /*!< Event not generated */
+#define TWIM_EVENTS_LASTRX_EVENTS_LASTRX_Generated (1UL) /*!< Event generated */
+
+/* Register: TWIM_EVENTS_LASTTX */
+/* Description: Byte boundary, starting to transmit the last byte */
+
+/* Bit 0 : Byte boundary, starting to transmit the last byte */
+#define TWIM_EVENTS_LASTTX_EVENTS_LASTTX_Pos (0UL) /*!< Position of EVENTS_LASTTX field. */
+#define TWIM_EVENTS_LASTTX_EVENTS_LASTTX_Msk (0x1UL << TWIM_EVENTS_LASTTX_EVENTS_LASTTX_Pos) /*!< Bit mask of EVENTS_LASTTX field. */
+#define TWIM_EVENTS_LASTTX_EVENTS_LASTTX_NotGenerated (0UL) /*!< Event not generated */
+#define TWIM_EVENTS_LASTTX_EVENTS_LASTTX_Generated (1UL) /*!< Event generated */
+
+/* Register: TWIM_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 12 : Shortcut between event LASTRX and task STOP */
+#define TWIM_SHORTS_LASTRX_STOP_Pos (12UL) /*!< Position of LASTRX_STOP field. */
+#define TWIM_SHORTS_LASTRX_STOP_Msk (0x1UL << TWIM_SHORTS_LASTRX_STOP_Pos) /*!< Bit mask of LASTRX_STOP field. */
+#define TWIM_SHORTS_LASTRX_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define TWIM_SHORTS_LASTRX_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 11 : Shortcut between event LASTRX and task SUSPEND */
+#define TWIM_SHORTS_LASTRX_SUSPEND_Pos (11UL) /*!< Position of LASTRX_SUSPEND field. */
+#define TWIM_SHORTS_LASTRX_SUSPEND_Msk (0x1UL << TWIM_SHORTS_LASTRX_SUSPEND_Pos) /*!< Bit mask of LASTRX_SUSPEND field. */
+#define TWIM_SHORTS_LASTRX_SUSPEND_Disabled (0UL) /*!< Disable shortcut */
+#define TWIM_SHORTS_LASTRX_SUSPEND_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 10 : Shortcut between event LASTRX and task STARTTX */
+#define TWIM_SHORTS_LASTRX_STARTTX_Pos (10UL) /*!< Position of LASTRX_STARTTX field. */
+#define TWIM_SHORTS_LASTRX_STARTTX_Msk (0x1UL << TWIM_SHORTS_LASTRX_STARTTX_Pos) /*!< Bit mask of LASTRX_STARTTX field. */
+#define TWIM_SHORTS_LASTRX_STARTTX_Disabled (0UL) /*!< Disable shortcut */
+#define TWIM_SHORTS_LASTRX_STARTTX_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 9 : Shortcut between event LASTTX and task STOP */
+#define TWIM_SHORTS_LASTTX_STOP_Pos (9UL) /*!< Position of LASTTX_STOP field. */
+#define TWIM_SHORTS_LASTTX_STOP_Msk (0x1UL << TWIM_SHORTS_LASTTX_STOP_Pos) /*!< Bit mask of LASTTX_STOP field. */
+#define TWIM_SHORTS_LASTTX_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define TWIM_SHORTS_LASTTX_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 8 : Shortcut between event LASTTX and task SUSPEND */
+#define TWIM_SHORTS_LASTTX_SUSPEND_Pos (8UL) /*!< Position of LASTTX_SUSPEND field. */
+#define TWIM_SHORTS_LASTTX_SUSPEND_Msk (0x1UL << TWIM_SHORTS_LASTTX_SUSPEND_Pos) /*!< Bit mask of LASTTX_SUSPEND field. */
+#define TWIM_SHORTS_LASTTX_SUSPEND_Disabled (0UL) /*!< Disable shortcut */
+#define TWIM_SHORTS_LASTTX_SUSPEND_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 7 : Shortcut between event LASTTX and task STARTRX */
+#define TWIM_SHORTS_LASTTX_STARTRX_Pos (7UL) /*!< Position of LASTTX_STARTRX field. */
+#define TWIM_SHORTS_LASTTX_STARTRX_Msk (0x1UL << TWIM_SHORTS_LASTTX_STARTRX_Pos) /*!< Bit mask of LASTTX_STARTRX field. */
+#define TWIM_SHORTS_LASTTX_STARTRX_Disabled (0UL) /*!< Disable shortcut */
+#define TWIM_SHORTS_LASTTX_STARTRX_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: TWIM_INTEN */
+/* Description: Enable or disable interrupt */
+
+/* Bit 24 : Enable or disable interrupt for event LASTTX */
+#define TWIM_INTEN_LASTTX_Pos (24UL) /*!< Position of LASTTX field. */
+#define TWIM_INTEN_LASTTX_Msk (0x1UL << TWIM_INTEN_LASTTX_Pos) /*!< Bit mask of LASTTX field. */
+#define TWIM_INTEN_LASTTX_Disabled (0UL) /*!< Disable */
+#define TWIM_INTEN_LASTTX_Enabled (1UL) /*!< Enable */
+
+/* Bit 23 : Enable or disable interrupt for event LASTRX */
+#define TWIM_INTEN_LASTRX_Pos (23UL) /*!< Position of LASTRX field. */
+#define TWIM_INTEN_LASTRX_Msk (0x1UL << TWIM_INTEN_LASTRX_Pos) /*!< Bit mask of LASTRX field. */
+#define TWIM_INTEN_LASTRX_Disabled (0UL) /*!< Disable */
+#define TWIM_INTEN_LASTRX_Enabled (1UL) /*!< Enable */
+
+/* Bit 20 : Enable or disable interrupt for event TXSTARTED */
+#define TWIM_INTEN_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */
+#define TWIM_INTEN_TXSTARTED_Msk (0x1UL << TWIM_INTEN_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */
+#define TWIM_INTEN_TXSTARTED_Disabled (0UL) /*!< Disable */
+#define TWIM_INTEN_TXSTARTED_Enabled (1UL) /*!< Enable */
+
+/* Bit 19 : Enable or disable interrupt for event RXSTARTED */
+#define TWIM_INTEN_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */
+#define TWIM_INTEN_RXSTARTED_Msk (0x1UL << TWIM_INTEN_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */
+#define TWIM_INTEN_RXSTARTED_Disabled (0UL) /*!< Disable */
+#define TWIM_INTEN_RXSTARTED_Enabled (1UL) /*!< Enable */
+
+/* Bit 18 : Enable or disable interrupt for event SUSPENDED */
+#define TWIM_INTEN_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */
+#define TWIM_INTEN_SUSPENDED_Msk (0x1UL << TWIM_INTEN_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */
+#define TWIM_INTEN_SUSPENDED_Disabled (0UL) /*!< Disable */
+#define TWIM_INTEN_SUSPENDED_Enabled (1UL) /*!< Enable */
+
+/* Bit 9 : Enable or disable interrupt for event ERROR */
+#define TWIM_INTEN_ERROR_Pos (9UL) /*!< Position of ERROR field. */
+#define TWIM_INTEN_ERROR_Msk (0x1UL << TWIM_INTEN_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define TWIM_INTEN_ERROR_Disabled (0UL) /*!< Disable */
+#define TWIM_INTEN_ERROR_Enabled (1UL) /*!< Enable */
+
+/* Bit 1 : Enable or disable interrupt for event STOPPED */
+#define TWIM_INTEN_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */
+#define TWIM_INTEN_STOPPED_Msk (0x1UL << TWIM_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define TWIM_INTEN_STOPPED_Disabled (0UL) /*!< Disable */
+#define TWIM_INTEN_STOPPED_Enabled (1UL) /*!< Enable */
+
+/* Register: TWIM_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 24 : Write '1' to enable interrupt for event LASTTX */
+#define TWIM_INTENSET_LASTTX_Pos (24UL) /*!< Position of LASTTX field. */
+#define TWIM_INTENSET_LASTTX_Msk (0x1UL << TWIM_INTENSET_LASTTX_Pos) /*!< Bit mask of LASTTX field. */
+#define TWIM_INTENSET_LASTTX_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENSET_LASTTX_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENSET_LASTTX_Set (1UL) /*!< Enable */
+
+/* Bit 23 : Write '1' to enable interrupt for event LASTRX */
+#define TWIM_INTENSET_LASTRX_Pos (23UL) /*!< Position of LASTRX field. */
+#define TWIM_INTENSET_LASTRX_Msk (0x1UL << TWIM_INTENSET_LASTRX_Pos) /*!< Bit mask of LASTRX field. */
+#define TWIM_INTENSET_LASTRX_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENSET_LASTRX_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENSET_LASTRX_Set (1UL) /*!< Enable */
+
+/* Bit 20 : Write '1' to enable interrupt for event TXSTARTED */
+#define TWIM_INTENSET_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */
+#define TWIM_INTENSET_TXSTARTED_Msk (0x1UL << TWIM_INTENSET_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */
+#define TWIM_INTENSET_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENSET_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENSET_TXSTARTED_Set (1UL) /*!< Enable */
+
+/* Bit 19 : Write '1' to enable interrupt for event RXSTARTED */
+#define TWIM_INTENSET_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */
+#define TWIM_INTENSET_RXSTARTED_Msk (0x1UL << TWIM_INTENSET_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */
+#define TWIM_INTENSET_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENSET_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENSET_RXSTARTED_Set (1UL) /*!< Enable */
+
+/* Bit 18 : Write '1' to enable interrupt for event SUSPENDED */
+#define TWIM_INTENSET_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */
+#define TWIM_INTENSET_SUSPENDED_Msk (0x1UL << TWIM_INTENSET_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */
+#define TWIM_INTENSET_SUSPENDED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENSET_SUSPENDED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENSET_SUSPENDED_Set (1UL) /*!< Enable */
+
+/* Bit 9 : Write '1' to enable interrupt for event ERROR */
+#define TWIM_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */
+#define TWIM_INTENSET_ERROR_Msk (0x1UL << TWIM_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define TWIM_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENSET_ERROR_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event STOPPED */
+#define TWIM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */
+#define TWIM_INTENSET_STOPPED_Msk (0x1UL << TWIM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define TWIM_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENSET_STOPPED_Set (1UL) /*!< Enable */
+
+/* Register: TWIM_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 24 : Write '1' to disable interrupt for event LASTTX */
+#define TWIM_INTENCLR_LASTTX_Pos (24UL) /*!< Position of LASTTX field. */
+#define TWIM_INTENCLR_LASTTX_Msk (0x1UL << TWIM_INTENCLR_LASTTX_Pos) /*!< Bit mask of LASTTX field. */
+#define TWIM_INTENCLR_LASTTX_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENCLR_LASTTX_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENCLR_LASTTX_Clear (1UL) /*!< Disable */
+
+/* Bit 23 : Write '1' to disable interrupt for event LASTRX */
+#define TWIM_INTENCLR_LASTRX_Pos (23UL) /*!< Position of LASTRX field. */
+#define TWIM_INTENCLR_LASTRX_Msk (0x1UL << TWIM_INTENCLR_LASTRX_Pos) /*!< Bit mask of LASTRX field. */
+#define TWIM_INTENCLR_LASTRX_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENCLR_LASTRX_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENCLR_LASTRX_Clear (1UL) /*!< Disable */
+
+/* Bit 20 : Write '1' to disable interrupt for event TXSTARTED */
+#define TWIM_INTENCLR_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */
+#define TWIM_INTENCLR_TXSTARTED_Msk (0x1UL << TWIM_INTENCLR_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */
+#define TWIM_INTENCLR_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENCLR_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENCLR_TXSTARTED_Clear (1UL) /*!< Disable */
+
+/* Bit 19 : Write '1' to disable interrupt for event RXSTARTED */
+#define TWIM_INTENCLR_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */
+#define TWIM_INTENCLR_RXSTARTED_Msk (0x1UL << TWIM_INTENCLR_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */
+#define TWIM_INTENCLR_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENCLR_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENCLR_RXSTARTED_Clear (1UL) /*!< Disable */
+
+/* Bit 18 : Write '1' to disable interrupt for event SUSPENDED */
+#define TWIM_INTENCLR_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */
+#define TWIM_INTENCLR_SUSPENDED_Msk (0x1UL << TWIM_INTENCLR_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */
+#define TWIM_INTENCLR_SUSPENDED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENCLR_SUSPENDED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENCLR_SUSPENDED_Clear (1UL) /*!< Disable */
+
+/* Bit 9 : Write '1' to disable interrupt for event ERROR */
+#define TWIM_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */
+#define TWIM_INTENCLR_ERROR_Msk (0x1UL << TWIM_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define TWIM_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENCLR_ERROR_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event STOPPED */
+#define TWIM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */
+#define TWIM_INTENCLR_STOPPED_Msk (0x1UL << TWIM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define TWIM_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */
+
+/* Register: TWIM_ERRORSRC */
+/* Description: Error source */
+
+/* Bit 2 : NACK received after sending a data byte (write '1' to clear) */
+#define TWIM_ERRORSRC_DNACK_Pos (2UL) /*!< Position of DNACK field. */
+#define TWIM_ERRORSRC_DNACK_Msk (0x1UL << TWIM_ERRORSRC_DNACK_Pos) /*!< Bit mask of DNACK field. */
+#define TWIM_ERRORSRC_DNACK_NotReceived (0UL) /*!< Error did not occur */
+#define TWIM_ERRORSRC_DNACK_Received (1UL) /*!< Error occurred */
+
+/* Bit 1 : NACK received after sending the address (write '1' to clear) */
+#define TWIM_ERRORSRC_ANACK_Pos (1UL) /*!< Position of ANACK field. */
+#define TWIM_ERRORSRC_ANACK_Msk (0x1UL << TWIM_ERRORSRC_ANACK_Pos) /*!< Bit mask of ANACK field. */
+#define TWIM_ERRORSRC_ANACK_NotReceived (0UL) /*!< Error did not occur */
+#define TWIM_ERRORSRC_ANACK_Received (1UL) /*!< Error occurred */
+
+/* Bit 0 : Overrun error */
+#define TWIM_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */
+#define TWIM_ERRORSRC_OVERRUN_Msk (0x1UL << TWIM_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */
+#define TWIM_ERRORSRC_OVERRUN_NotReceived (0UL) /*!< Error did not occur */
+#define TWIM_ERRORSRC_OVERRUN_Received (1UL) /*!< Error occurred */
+
+/* Register: TWIM_ENABLE */
+/* Description: Enable TWIM */
+
+/* Bits 3..0 : Enable or disable TWIM */
+#define TWIM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define TWIM_ENABLE_ENABLE_Msk (0xFUL << TWIM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define TWIM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable TWIM */
+#define TWIM_ENABLE_ENABLE_Enabled (6UL) /*!< Enable TWIM */
+
+/* Register: TWIM_PSEL_SCL */
+/* Description: Pin select for SCL signal */
+
+/* Bit 31 : Connection */
+#define TWIM_PSEL_SCL_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define TWIM_PSEL_SCL_CONNECT_Msk (0x1UL << TWIM_PSEL_SCL_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define TWIM_PSEL_SCL_CONNECT_Connected (0UL) /*!< Connect */
+#define TWIM_PSEL_SCL_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bits 4..0 : Pin number */
+#define TWIM_PSEL_SCL_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define TWIM_PSEL_SCL_PIN_Msk (0x1FUL << TWIM_PSEL_SCL_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: TWIM_PSEL_SDA */
+/* Description: Pin select for SDA signal */
+
+/* Bit 31 : Connection */
+#define TWIM_PSEL_SDA_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define TWIM_PSEL_SDA_CONNECT_Msk (0x1UL << TWIM_PSEL_SDA_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define TWIM_PSEL_SDA_CONNECT_Connected (0UL) /*!< Connect */
+#define TWIM_PSEL_SDA_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bits 4..0 : Pin number */
+#define TWIM_PSEL_SDA_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define TWIM_PSEL_SDA_PIN_Msk (0x1FUL << TWIM_PSEL_SDA_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: TWIM_FREQUENCY */
+/* Description: TWI frequency. Accuracy depends on the HFCLK source selected. */
+
+/* Bits 31..0 : TWI master clock frequency */
+#define TWIM_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */
+#define TWIM_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << TWIM_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */
+#define TWIM_FREQUENCY_FREQUENCY_K100 (0x01980000UL) /*!< 100 kbps */
+#define TWIM_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps */
+#define TWIM_FREQUENCY_FREQUENCY_K400 (0x06400000UL) /*!< 400 kbps */
+
+/* Register: TWIM_RXD_PTR */
+/* Description: Data pointer */
+
+/* Bits 31..0 : Data pointer */
+#define TWIM_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define TWIM_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIM_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: TWIM_RXD_MAXCNT */
+/* Description: Maximum number of bytes in receive buffer */
+
+/* Bits 13..0 : Maximum number of bytes in receive buffer */
+#define TWIM_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define TWIM_RXD_MAXCNT_MAXCNT_Msk (0x3FFFUL << TWIM_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: TWIM_RXD_AMOUNT */
+/* Description: Number of bytes transferred in the last transaction */
+
+/* Bits 13..0 : Number of bytes transferred in the last transaction. In case of NACK error, includes the NACK'ed byte. */
+#define TWIM_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define TWIM_RXD_AMOUNT_AMOUNT_Msk (0x3FFFUL << TWIM_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+/* Register: TWIM_RXD_LIST */
+/* Description: EasyDMA list type */
+
+/* Bits 2..0 : List type */
+#define TWIM_RXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */
+#define TWIM_RXD_LIST_LIST_Msk (0x7UL << TWIM_RXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */
+#define TWIM_RXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */
+#define TWIM_RXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */
+
+/* Register: TWIM_TXD_PTR */
+/* Description: Data pointer */
+
+/* Bits 31..0 : Data pointer */
+#define TWIM_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define TWIM_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIM_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: TWIM_TXD_MAXCNT */
+/* Description: Maximum number of bytes in transmit buffer */
+
+/* Bits 13..0 : Maximum number of bytes in transmit buffer */
+#define TWIM_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define TWIM_TXD_MAXCNT_MAXCNT_Msk (0x3FFFUL << TWIM_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: TWIM_TXD_AMOUNT */
+/* Description: Number of bytes transferred in the last transaction */
+
+/* Bits 13..0 : Number of bytes transferred in the last transaction. In case of NACK error, includes the NACK'ed byte. */
+#define TWIM_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define TWIM_TXD_AMOUNT_AMOUNT_Msk (0x3FFFUL << TWIM_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+/* Register: TWIM_TXD_LIST */
+/* Description: EasyDMA list type */
+
+/* Bits 2..0 : List type */
+#define TWIM_TXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */
+#define TWIM_TXD_LIST_LIST_Msk (0x7UL << TWIM_TXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */
+#define TWIM_TXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */
+#define TWIM_TXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */
+
+/* Register: TWIM_ADDRESS */
+/* Description: Address used in the TWI transfer */
+
+/* Bits 6..0 : Address used in the TWI transfer */
+#define TWIM_ADDRESS_ADDRESS_Pos (0UL) /*!< Position of ADDRESS field. */
+#define TWIM_ADDRESS_ADDRESS_Msk (0x7FUL << TWIM_ADDRESS_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */
+
+
+/* Peripheral: TWIS */
+/* Description: I2C compatible Two-Wire Slave Interface with EasyDMA */
+
+/* Register: TWIS_TASKS_STOP */
+/* Description: Stop TWI transaction */
+
+/* Bit 0 : Stop TWI transaction */
+#define TWIS_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define TWIS_TASKS_STOP_TASKS_STOP_Msk (0x1UL << TWIS_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define TWIS_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWIS_TASKS_SUSPEND */
+/* Description: Suspend TWI transaction */
+
+/* Bit 0 : Suspend TWI transaction */
+#define TWIS_TASKS_SUSPEND_TASKS_SUSPEND_Pos (0UL) /*!< Position of TASKS_SUSPEND field. */
+#define TWIS_TASKS_SUSPEND_TASKS_SUSPEND_Msk (0x1UL << TWIS_TASKS_SUSPEND_TASKS_SUSPEND_Pos) /*!< Bit mask of TASKS_SUSPEND field. */
+#define TWIS_TASKS_SUSPEND_TASKS_SUSPEND_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWIS_TASKS_RESUME */
+/* Description: Resume TWI transaction */
+
+/* Bit 0 : Resume TWI transaction */
+#define TWIS_TASKS_RESUME_TASKS_RESUME_Pos (0UL) /*!< Position of TASKS_RESUME field. */
+#define TWIS_TASKS_RESUME_TASKS_RESUME_Msk (0x1UL << TWIS_TASKS_RESUME_TASKS_RESUME_Pos) /*!< Bit mask of TASKS_RESUME field. */
+#define TWIS_TASKS_RESUME_TASKS_RESUME_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWIS_TASKS_PREPARERX */
+/* Description: Prepare the TWI slave to respond to a write command */
+
+/* Bit 0 : Prepare the TWI slave to respond to a write command */
+#define TWIS_TASKS_PREPARERX_TASKS_PREPARERX_Pos (0UL) /*!< Position of TASKS_PREPARERX field. */
+#define TWIS_TASKS_PREPARERX_TASKS_PREPARERX_Msk (0x1UL << TWIS_TASKS_PREPARERX_TASKS_PREPARERX_Pos) /*!< Bit mask of TASKS_PREPARERX field. */
+#define TWIS_TASKS_PREPARERX_TASKS_PREPARERX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWIS_TASKS_PREPARETX */
+/* Description: Prepare the TWI slave to respond to a read command */
+
+/* Bit 0 : Prepare the TWI slave to respond to a read command */
+#define TWIS_TASKS_PREPARETX_TASKS_PREPARETX_Pos (0UL) /*!< Position of TASKS_PREPARETX field. */
+#define TWIS_TASKS_PREPARETX_TASKS_PREPARETX_Msk (0x1UL << TWIS_TASKS_PREPARETX_TASKS_PREPARETX_Pos) /*!< Bit mask of TASKS_PREPARETX field. */
+#define TWIS_TASKS_PREPARETX_TASKS_PREPARETX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWIS_EVENTS_STOPPED */
+/* Description: TWI stopped */
+
+/* Bit 0 : TWI stopped */
+#define TWIS_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */
+#define TWIS_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << TWIS_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */
+#define TWIS_EVENTS_STOPPED_EVENTS_STOPPED_NotGenerated (0UL) /*!< Event not generated */
+#define TWIS_EVENTS_STOPPED_EVENTS_STOPPED_Generated (1UL) /*!< Event generated */
+
+/* Register: TWIS_EVENTS_ERROR */
+/* Description: TWI error */
+
+/* Bit 0 : TWI error */
+#define TWIS_EVENTS_ERROR_EVENTS_ERROR_Pos (0UL) /*!< Position of EVENTS_ERROR field. */
+#define TWIS_EVENTS_ERROR_EVENTS_ERROR_Msk (0x1UL << TWIS_EVENTS_ERROR_EVENTS_ERROR_Pos) /*!< Bit mask of EVENTS_ERROR field. */
+#define TWIS_EVENTS_ERROR_EVENTS_ERROR_NotGenerated (0UL) /*!< Event not generated */
+#define TWIS_EVENTS_ERROR_EVENTS_ERROR_Generated (1UL) /*!< Event generated */
+
+/* Register: TWIS_EVENTS_RXSTARTED */
+/* Description: Receive sequence started */
+
+/* Bit 0 : Receive sequence started */
+#define TWIS_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos (0UL) /*!< Position of EVENTS_RXSTARTED field. */
+#define TWIS_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Msk (0x1UL << TWIS_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos) /*!< Bit mask of EVENTS_RXSTARTED field. */
+#define TWIS_EVENTS_RXSTARTED_EVENTS_RXSTARTED_NotGenerated (0UL) /*!< Event not generated */
+#define TWIS_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Generated (1UL) /*!< Event generated */
+
+/* Register: TWIS_EVENTS_TXSTARTED */
+/* Description: Transmit sequence started */
+
+/* Bit 0 : Transmit sequence started */
+#define TWIS_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos (0UL) /*!< Position of EVENTS_TXSTARTED field. */
+#define TWIS_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Msk (0x1UL << TWIS_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos) /*!< Bit mask of EVENTS_TXSTARTED field. */
+#define TWIS_EVENTS_TXSTARTED_EVENTS_TXSTARTED_NotGenerated (0UL) /*!< Event not generated */
+#define TWIS_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Generated (1UL) /*!< Event generated */
+
+/* Register: TWIS_EVENTS_WRITE */
+/* Description: Write command received */
+
+/* Bit 0 : Write command received */
+#define TWIS_EVENTS_WRITE_EVENTS_WRITE_Pos (0UL) /*!< Position of EVENTS_WRITE field. */
+#define TWIS_EVENTS_WRITE_EVENTS_WRITE_Msk (0x1UL << TWIS_EVENTS_WRITE_EVENTS_WRITE_Pos) /*!< Bit mask of EVENTS_WRITE field. */
+#define TWIS_EVENTS_WRITE_EVENTS_WRITE_NotGenerated (0UL) /*!< Event not generated */
+#define TWIS_EVENTS_WRITE_EVENTS_WRITE_Generated (1UL) /*!< Event generated */
+
+/* Register: TWIS_EVENTS_READ */
+/* Description: Read command received */
+
+/* Bit 0 : Read command received */
+#define TWIS_EVENTS_READ_EVENTS_READ_Pos (0UL) /*!< Position of EVENTS_READ field. */
+#define TWIS_EVENTS_READ_EVENTS_READ_Msk (0x1UL << TWIS_EVENTS_READ_EVENTS_READ_Pos) /*!< Bit mask of EVENTS_READ field. */
+#define TWIS_EVENTS_READ_EVENTS_READ_NotGenerated (0UL) /*!< Event not generated */
+#define TWIS_EVENTS_READ_EVENTS_READ_Generated (1UL) /*!< Event generated */
+
+/* Register: TWIS_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 14 : Shortcut between event READ and task SUSPEND */
+#define TWIS_SHORTS_READ_SUSPEND_Pos (14UL) /*!< Position of READ_SUSPEND field. */
+#define TWIS_SHORTS_READ_SUSPEND_Msk (0x1UL << TWIS_SHORTS_READ_SUSPEND_Pos) /*!< Bit mask of READ_SUSPEND field. */
+#define TWIS_SHORTS_READ_SUSPEND_Disabled (0UL) /*!< Disable shortcut */
+#define TWIS_SHORTS_READ_SUSPEND_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 13 : Shortcut between event WRITE and task SUSPEND */
+#define TWIS_SHORTS_WRITE_SUSPEND_Pos (13UL) /*!< Position of WRITE_SUSPEND field. */
+#define TWIS_SHORTS_WRITE_SUSPEND_Msk (0x1UL << TWIS_SHORTS_WRITE_SUSPEND_Pos) /*!< Bit mask of WRITE_SUSPEND field. */
+#define TWIS_SHORTS_WRITE_SUSPEND_Disabled (0UL) /*!< Disable shortcut */
+#define TWIS_SHORTS_WRITE_SUSPEND_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: TWIS_INTEN */
+/* Description: Enable or disable interrupt */
+
+/* Bit 26 : Enable or disable interrupt for event READ */
+#define TWIS_INTEN_READ_Pos (26UL) /*!< Position of READ field. */
+#define TWIS_INTEN_READ_Msk (0x1UL << TWIS_INTEN_READ_Pos) /*!< Bit mask of READ field. */
+#define TWIS_INTEN_READ_Disabled (0UL) /*!< Disable */
+#define TWIS_INTEN_READ_Enabled (1UL) /*!< Enable */
+
+/* Bit 25 : Enable or disable interrupt for event WRITE */
+#define TWIS_INTEN_WRITE_Pos (25UL) /*!< Position of WRITE field. */
+#define TWIS_INTEN_WRITE_Msk (0x1UL << TWIS_INTEN_WRITE_Pos) /*!< Bit mask of WRITE field. */
+#define TWIS_INTEN_WRITE_Disabled (0UL) /*!< Disable */
+#define TWIS_INTEN_WRITE_Enabled (1UL) /*!< Enable */
+
+/* Bit 20 : Enable or disable interrupt for event TXSTARTED */
+#define TWIS_INTEN_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */
+#define TWIS_INTEN_TXSTARTED_Msk (0x1UL << TWIS_INTEN_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */
+#define TWIS_INTEN_TXSTARTED_Disabled (0UL) /*!< Disable */
+#define TWIS_INTEN_TXSTARTED_Enabled (1UL) /*!< Enable */
+
+/* Bit 19 : Enable or disable interrupt for event RXSTARTED */
+#define TWIS_INTEN_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */
+#define TWIS_INTEN_RXSTARTED_Msk (0x1UL << TWIS_INTEN_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */
+#define TWIS_INTEN_RXSTARTED_Disabled (0UL) /*!< Disable */
+#define TWIS_INTEN_RXSTARTED_Enabled (1UL) /*!< Enable */
+
+/* Bit 9 : Enable or disable interrupt for event ERROR */
+#define TWIS_INTEN_ERROR_Pos (9UL) /*!< Position of ERROR field. */
+#define TWIS_INTEN_ERROR_Msk (0x1UL << TWIS_INTEN_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define TWIS_INTEN_ERROR_Disabled (0UL) /*!< Disable */
+#define TWIS_INTEN_ERROR_Enabled (1UL) /*!< Enable */
+
+/* Bit 1 : Enable or disable interrupt for event STOPPED */
+#define TWIS_INTEN_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */
+#define TWIS_INTEN_STOPPED_Msk (0x1UL << TWIS_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define TWIS_INTEN_STOPPED_Disabled (0UL) /*!< Disable */
+#define TWIS_INTEN_STOPPED_Enabled (1UL) /*!< Enable */
+
+/* Register: TWIS_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 26 : Write '1' to enable interrupt for event READ */
+#define TWIS_INTENSET_READ_Pos (26UL) /*!< Position of READ field. */
+#define TWIS_INTENSET_READ_Msk (0x1UL << TWIS_INTENSET_READ_Pos) /*!< Bit mask of READ field. */
+#define TWIS_INTENSET_READ_Disabled (0UL) /*!< Read: Disabled */
+#define TWIS_INTENSET_READ_Enabled (1UL) /*!< Read: Enabled */
+#define TWIS_INTENSET_READ_Set (1UL) /*!< Enable */
+
+/* Bit 25 : Write '1' to enable interrupt for event WRITE */
+#define TWIS_INTENSET_WRITE_Pos (25UL) /*!< Position of WRITE field. */
+#define TWIS_INTENSET_WRITE_Msk (0x1UL << TWIS_INTENSET_WRITE_Pos) /*!< Bit mask of WRITE field. */
+#define TWIS_INTENSET_WRITE_Disabled (0UL) /*!< Read: Disabled */
+#define TWIS_INTENSET_WRITE_Enabled (1UL) /*!< Read: Enabled */
+#define TWIS_INTENSET_WRITE_Set (1UL) /*!< Enable */
+
+/* Bit 20 : Write '1' to enable interrupt for event TXSTARTED */
+#define TWIS_INTENSET_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */
+#define TWIS_INTENSET_TXSTARTED_Msk (0x1UL << TWIS_INTENSET_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */
+#define TWIS_INTENSET_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIS_INTENSET_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIS_INTENSET_TXSTARTED_Set (1UL) /*!< Enable */
+
+/* Bit 19 : Write '1' to enable interrupt for event RXSTARTED */
+#define TWIS_INTENSET_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */
+#define TWIS_INTENSET_RXSTARTED_Msk (0x1UL << TWIS_INTENSET_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */
+#define TWIS_INTENSET_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIS_INTENSET_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIS_INTENSET_RXSTARTED_Set (1UL) /*!< Enable */
+
+/* Bit 9 : Write '1' to enable interrupt for event ERROR */
+#define TWIS_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */
+#define TWIS_INTENSET_ERROR_Msk (0x1UL << TWIS_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define TWIS_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */
+#define TWIS_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */
+#define TWIS_INTENSET_ERROR_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event STOPPED */
+#define TWIS_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */
+#define TWIS_INTENSET_STOPPED_Msk (0x1UL << TWIS_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define TWIS_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIS_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIS_INTENSET_STOPPED_Set (1UL) /*!< Enable */
+
+/* Register: TWIS_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 26 : Write '1' to disable interrupt for event READ */
+#define TWIS_INTENCLR_READ_Pos (26UL) /*!< Position of READ field. */
+#define TWIS_INTENCLR_READ_Msk (0x1UL << TWIS_INTENCLR_READ_Pos) /*!< Bit mask of READ field. */
+#define TWIS_INTENCLR_READ_Disabled (0UL) /*!< Read: Disabled */
+#define TWIS_INTENCLR_READ_Enabled (1UL) /*!< Read: Enabled */
+#define TWIS_INTENCLR_READ_Clear (1UL) /*!< Disable */
+
+/* Bit 25 : Write '1' to disable interrupt for event WRITE */
+#define TWIS_INTENCLR_WRITE_Pos (25UL) /*!< Position of WRITE field. */
+#define TWIS_INTENCLR_WRITE_Msk (0x1UL << TWIS_INTENCLR_WRITE_Pos) /*!< Bit mask of WRITE field. */
+#define TWIS_INTENCLR_WRITE_Disabled (0UL) /*!< Read: Disabled */
+#define TWIS_INTENCLR_WRITE_Enabled (1UL) /*!< Read: Enabled */
+#define TWIS_INTENCLR_WRITE_Clear (1UL) /*!< Disable */
+
+/* Bit 20 : Write '1' to disable interrupt for event TXSTARTED */
+#define TWIS_INTENCLR_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */
+#define TWIS_INTENCLR_TXSTARTED_Msk (0x1UL << TWIS_INTENCLR_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */
+#define TWIS_INTENCLR_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIS_INTENCLR_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIS_INTENCLR_TXSTARTED_Clear (1UL) /*!< Disable */
+
+/* Bit 19 : Write '1' to disable interrupt for event RXSTARTED */
+#define TWIS_INTENCLR_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */
+#define TWIS_INTENCLR_RXSTARTED_Msk (0x1UL << TWIS_INTENCLR_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */
+#define TWIS_INTENCLR_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIS_INTENCLR_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIS_INTENCLR_RXSTARTED_Clear (1UL) /*!< Disable */
+
+/* Bit 9 : Write '1' to disable interrupt for event ERROR */
+#define TWIS_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */
+#define TWIS_INTENCLR_ERROR_Msk (0x1UL << TWIS_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define TWIS_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */
+#define TWIS_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */
+#define TWIS_INTENCLR_ERROR_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event STOPPED */
+#define TWIS_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */
+#define TWIS_INTENCLR_STOPPED_Msk (0x1UL << TWIS_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define TWIS_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIS_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIS_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */
+
+/* Register: TWIS_ERRORSRC */
+/* Description: Error source */
+
+/* Bit 3 : TX buffer over-read detected, and prevented */
+#define TWIS_ERRORSRC_OVERREAD_Pos (3UL) /*!< Position of OVERREAD field. */
+#define TWIS_ERRORSRC_OVERREAD_Msk (0x1UL << TWIS_ERRORSRC_OVERREAD_Pos) /*!< Bit mask of OVERREAD field. */
+#define TWIS_ERRORSRC_OVERREAD_NotDetected (0UL) /*!< Error did not occur */
+#define TWIS_ERRORSRC_OVERREAD_Detected (1UL) /*!< Error occurred */
+
+/* Bit 2 : NACK sent after receiving a data byte */
+#define TWIS_ERRORSRC_DNACK_Pos (2UL) /*!< Position of DNACK field. */
+#define TWIS_ERRORSRC_DNACK_Msk (0x1UL << TWIS_ERRORSRC_DNACK_Pos) /*!< Bit mask of DNACK field. */
+#define TWIS_ERRORSRC_DNACK_NotReceived (0UL) /*!< Error did not occur */
+#define TWIS_ERRORSRC_DNACK_Received (1UL) /*!< Error occurred */
+
+/* Bit 0 : RX buffer overflow detected, and prevented */
+#define TWIS_ERRORSRC_OVERFLOW_Pos (0UL) /*!< Position of OVERFLOW field. */
+#define TWIS_ERRORSRC_OVERFLOW_Msk (0x1UL << TWIS_ERRORSRC_OVERFLOW_Pos) /*!< Bit mask of OVERFLOW field. */
+#define TWIS_ERRORSRC_OVERFLOW_NotDetected (0UL) /*!< Error did not occur */
+#define TWIS_ERRORSRC_OVERFLOW_Detected (1UL) /*!< Error occurred */
+
+/* Register: TWIS_MATCH */
+/* Description: Status register indicating which address had a match */
+
+/* Bit 0 : Which of the addresses in {ADDRESS} matched the incoming address */
+#define TWIS_MATCH_MATCH_Pos (0UL) /*!< Position of MATCH field. */
+#define TWIS_MATCH_MATCH_Msk (0x1UL << TWIS_MATCH_MATCH_Pos) /*!< Bit mask of MATCH field. */
+
+/* Register: TWIS_ENABLE */
+/* Description: Enable TWIS */
+
+/* Bits 3..0 : Enable or disable TWIS */
+#define TWIS_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define TWIS_ENABLE_ENABLE_Msk (0xFUL << TWIS_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define TWIS_ENABLE_ENABLE_Disabled (0UL) /*!< Disable TWIS */
+#define TWIS_ENABLE_ENABLE_Enabled (9UL) /*!< Enable TWIS */
+
+/* Register: TWIS_PSEL_SCL */
+/* Description: Pin select for SCL signal */
+
+/* Bit 31 : Connection */
+#define TWIS_PSEL_SCL_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define TWIS_PSEL_SCL_CONNECT_Msk (0x1UL << TWIS_PSEL_SCL_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define TWIS_PSEL_SCL_CONNECT_Connected (0UL) /*!< Connect */
+#define TWIS_PSEL_SCL_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bits 4..0 : Pin number */
+#define TWIS_PSEL_SCL_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define TWIS_PSEL_SCL_PIN_Msk (0x1FUL << TWIS_PSEL_SCL_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: TWIS_PSEL_SDA */
+/* Description: Pin select for SDA signal */
+
+/* Bit 31 : Connection */
+#define TWIS_PSEL_SDA_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define TWIS_PSEL_SDA_CONNECT_Msk (0x1UL << TWIS_PSEL_SDA_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define TWIS_PSEL_SDA_CONNECT_Connected (0UL) /*!< Connect */
+#define TWIS_PSEL_SDA_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bits 4..0 : Pin number */
+#define TWIS_PSEL_SDA_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define TWIS_PSEL_SDA_PIN_Msk (0x1FUL << TWIS_PSEL_SDA_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: TWIS_RXD_PTR */
+/* Description: RXD Data pointer */
+
+/* Bits 31..0 : RXD Data pointer */
+#define TWIS_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define TWIS_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIS_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: TWIS_RXD_MAXCNT */
+/* Description: Maximum number of bytes in RXD buffer */
+
+/* Bits 13..0 : Maximum number of bytes in RXD buffer */
+#define TWIS_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define TWIS_RXD_MAXCNT_MAXCNT_Msk (0x3FFFUL << TWIS_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: TWIS_RXD_AMOUNT */
+/* Description: Number of bytes transferred in the last RXD transaction */
+
+/* Bits 13..0 : Number of bytes transferred in the last RXD transaction */
+#define TWIS_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define TWIS_RXD_AMOUNT_AMOUNT_Msk (0x3FFFUL << TWIS_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+/* Register: TWIS_RXD_LIST */
+/* Description: EasyDMA list type */
+
+/* Bits 1..0 : List type */
+#define TWIS_RXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */
+#define TWIS_RXD_LIST_LIST_Msk (0x3UL << TWIS_RXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */
+#define TWIS_RXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */
+#define TWIS_RXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */
+
+/* Register: TWIS_TXD_PTR */
+/* Description: TXD Data pointer */
+
+/* Bits 31..0 : TXD Data pointer */
+#define TWIS_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define TWIS_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIS_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: TWIS_TXD_MAXCNT */
+/* Description: Maximum number of bytes in TXD buffer */
+
+/* Bits 13..0 : Maximum number of bytes in TXD buffer */
+#define TWIS_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define TWIS_TXD_MAXCNT_MAXCNT_Msk (0x3FFFUL << TWIS_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: TWIS_TXD_AMOUNT */
+/* Description: Number of bytes transferred in the last TXD transaction */
+
+/* Bits 13..0 : Number of bytes transferred in the last TXD transaction */
+#define TWIS_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define TWIS_TXD_AMOUNT_AMOUNT_Msk (0x3FFFUL << TWIS_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+/* Register: TWIS_TXD_LIST */
+/* Description: EasyDMA list type */
+
+/* Bits 1..0 : List type */
+#define TWIS_TXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */
+#define TWIS_TXD_LIST_LIST_Msk (0x3UL << TWIS_TXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */
+#define TWIS_TXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */
+#define TWIS_TXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */
+
+/* Register: TWIS_ADDRESS */
+/* Description: Description collection: TWI slave address n */
+
+/* Bits 6..0 : TWI slave address */
+#define TWIS_ADDRESS_ADDRESS_Pos (0UL) /*!< Position of ADDRESS field. */
+#define TWIS_ADDRESS_ADDRESS_Msk (0x7FUL << TWIS_ADDRESS_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */
+
+/* Register: TWIS_CONFIG */
+/* Description: Configuration register for the address match mechanism */
+
+/* Bit 1 : Enable or disable address matching on ADDRESS[1] */
+#define TWIS_CONFIG_ADDRESS1_Pos (1UL) /*!< Position of ADDRESS1 field. */
+#define TWIS_CONFIG_ADDRESS1_Msk (0x1UL << TWIS_CONFIG_ADDRESS1_Pos) /*!< Bit mask of ADDRESS1 field. */
+#define TWIS_CONFIG_ADDRESS1_Disabled (0UL) /*!< Disabled */
+#define TWIS_CONFIG_ADDRESS1_Enabled (1UL) /*!< Enabled */
+
+/* Bit 0 : Enable or disable address matching on ADDRESS[0] */
+#define TWIS_CONFIG_ADDRESS0_Pos (0UL) /*!< Position of ADDRESS0 field. */
+#define TWIS_CONFIG_ADDRESS0_Msk (0x1UL << TWIS_CONFIG_ADDRESS0_Pos) /*!< Bit mask of ADDRESS0 field. */
+#define TWIS_CONFIG_ADDRESS0_Disabled (0UL) /*!< Disabled */
+#define TWIS_CONFIG_ADDRESS0_Enabled (1UL) /*!< Enabled */
+
+/* Register: TWIS_ORC */
+/* Description: Over-read character. Character sent out in case of an over-read of the transmit buffer. */
+
+/* Bits 7..0 : Over-read character. Character sent out in case of an over-read of the transmit buffer. */
+#define TWIS_ORC_ORC_Pos (0UL) /*!< Position of ORC field. */
+#define TWIS_ORC_ORC_Msk (0xFFUL << TWIS_ORC_ORC_Pos) /*!< Bit mask of ORC field. */
+
+
+/* Peripheral: UART */
+/* Description: Universal Asynchronous Receiver/Transmitter */
+
+/* Register: UART_TASKS_STARTRX */
+/* Description: Start UART receiver */
+
+/* Bit 0 : Start UART receiver */
+#define UART_TASKS_STARTRX_TASKS_STARTRX_Pos (0UL) /*!< Position of TASKS_STARTRX field. */
+#define UART_TASKS_STARTRX_TASKS_STARTRX_Msk (0x1UL << UART_TASKS_STARTRX_TASKS_STARTRX_Pos) /*!< Bit mask of TASKS_STARTRX field. */
+#define UART_TASKS_STARTRX_TASKS_STARTRX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: UART_TASKS_STOPRX */
+/* Description: Stop UART receiver */
+
+/* Bit 0 : Stop UART receiver */
+#define UART_TASKS_STOPRX_TASKS_STOPRX_Pos (0UL) /*!< Position of TASKS_STOPRX field. */
+#define UART_TASKS_STOPRX_TASKS_STOPRX_Msk (0x1UL << UART_TASKS_STOPRX_TASKS_STOPRX_Pos) /*!< Bit mask of TASKS_STOPRX field. */
+#define UART_TASKS_STOPRX_TASKS_STOPRX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: UART_TASKS_STARTTX */
+/* Description: Start UART transmitter */
+
+/* Bit 0 : Start UART transmitter */
+#define UART_TASKS_STARTTX_TASKS_STARTTX_Pos (0UL) /*!< Position of TASKS_STARTTX field. */
+#define UART_TASKS_STARTTX_TASKS_STARTTX_Msk (0x1UL << UART_TASKS_STARTTX_TASKS_STARTTX_Pos) /*!< Bit mask of TASKS_STARTTX field. */
+#define UART_TASKS_STARTTX_TASKS_STARTTX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: UART_TASKS_STOPTX */
+/* Description: Stop UART transmitter */
+
+/* Bit 0 : Stop UART transmitter */
+#define UART_TASKS_STOPTX_TASKS_STOPTX_Pos (0UL) /*!< Position of TASKS_STOPTX field. */
+#define UART_TASKS_STOPTX_TASKS_STOPTX_Msk (0x1UL << UART_TASKS_STOPTX_TASKS_STOPTX_Pos) /*!< Bit mask of TASKS_STOPTX field. */
+#define UART_TASKS_STOPTX_TASKS_STOPTX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: UART_TASKS_SUSPEND */
+/* Description: Suspend UART */
+
+/* Bit 0 : Suspend UART */
+#define UART_TASKS_SUSPEND_TASKS_SUSPEND_Pos (0UL) /*!< Position of TASKS_SUSPEND field. */
+#define UART_TASKS_SUSPEND_TASKS_SUSPEND_Msk (0x1UL << UART_TASKS_SUSPEND_TASKS_SUSPEND_Pos) /*!< Bit mask of TASKS_SUSPEND field. */
+#define UART_TASKS_SUSPEND_TASKS_SUSPEND_Trigger (1UL) /*!< Trigger task */
+
+/* Register: UART_EVENTS_CTS */
+/* Description: CTS is activated (set low). Clear To Send. */
+
+/* Bit 0 : CTS is activated (set low). Clear To Send. */
+#define UART_EVENTS_CTS_EVENTS_CTS_Pos (0UL) /*!< Position of EVENTS_CTS field. */
+#define UART_EVENTS_CTS_EVENTS_CTS_Msk (0x1UL << UART_EVENTS_CTS_EVENTS_CTS_Pos) /*!< Bit mask of EVENTS_CTS field. */
+#define UART_EVENTS_CTS_EVENTS_CTS_NotGenerated (0UL) /*!< Event not generated */
+#define UART_EVENTS_CTS_EVENTS_CTS_Generated (1UL) /*!< Event generated */
+
+/* Register: UART_EVENTS_NCTS */
+/* Description: CTS is deactivated (set high). Not Clear To Send. */
+
+/* Bit 0 : CTS is deactivated (set high). Not Clear To Send. */
+#define UART_EVENTS_NCTS_EVENTS_NCTS_Pos (0UL) /*!< Position of EVENTS_NCTS field. */
+#define UART_EVENTS_NCTS_EVENTS_NCTS_Msk (0x1UL << UART_EVENTS_NCTS_EVENTS_NCTS_Pos) /*!< Bit mask of EVENTS_NCTS field. */
+#define UART_EVENTS_NCTS_EVENTS_NCTS_NotGenerated (0UL) /*!< Event not generated */
+#define UART_EVENTS_NCTS_EVENTS_NCTS_Generated (1UL) /*!< Event generated */
+
+/* Register: UART_EVENTS_RXDRDY */
+/* Description: Data received in RXD */
+
+/* Bit 0 : Data received in RXD */
+#define UART_EVENTS_RXDRDY_EVENTS_RXDRDY_Pos (0UL) /*!< Position of EVENTS_RXDRDY field. */
+#define UART_EVENTS_RXDRDY_EVENTS_RXDRDY_Msk (0x1UL << UART_EVENTS_RXDRDY_EVENTS_RXDRDY_Pos) /*!< Bit mask of EVENTS_RXDRDY field. */
+#define UART_EVENTS_RXDRDY_EVENTS_RXDRDY_NotGenerated (0UL) /*!< Event not generated */
+#define UART_EVENTS_RXDRDY_EVENTS_RXDRDY_Generated (1UL) /*!< Event generated */
+
+/* Register: UART_EVENTS_TXDRDY */
+/* Description: Data sent from TXD */
+
+/* Bit 0 : Data sent from TXD */
+#define UART_EVENTS_TXDRDY_EVENTS_TXDRDY_Pos (0UL) /*!< Position of EVENTS_TXDRDY field. */
+#define UART_EVENTS_TXDRDY_EVENTS_TXDRDY_Msk (0x1UL << UART_EVENTS_TXDRDY_EVENTS_TXDRDY_Pos) /*!< Bit mask of EVENTS_TXDRDY field. */
+#define UART_EVENTS_TXDRDY_EVENTS_TXDRDY_NotGenerated (0UL) /*!< Event not generated */
+#define UART_EVENTS_TXDRDY_EVENTS_TXDRDY_Generated (1UL) /*!< Event generated */
+
+/* Register: UART_EVENTS_ERROR */
+/* Description: Error detected */
+
+/* Bit 0 : Error detected */
+#define UART_EVENTS_ERROR_EVENTS_ERROR_Pos (0UL) /*!< Position of EVENTS_ERROR field. */
+#define UART_EVENTS_ERROR_EVENTS_ERROR_Msk (0x1UL << UART_EVENTS_ERROR_EVENTS_ERROR_Pos) /*!< Bit mask of EVENTS_ERROR field. */
+#define UART_EVENTS_ERROR_EVENTS_ERROR_NotGenerated (0UL) /*!< Event not generated */
+#define UART_EVENTS_ERROR_EVENTS_ERROR_Generated (1UL) /*!< Event generated */
+
+/* Register: UART_EVENTS_RXTO */
+/* Description: Receiver timeout */
+
+/* Bit 0 : Receiver timeout */
+#define UART_EVENTS_RXTO_EVENTS_RXTO_Pos (0UL) /*!< Position of EVENTS_RXTO field. */
+#define UART_EVENTS_RXTO_EVENTS_RXTO_Msk (0x1UL << UART_EVENTS_RXTO_EVENTS_RXTO_Pos) /*!< Bit mask of EVENTS_RXTO field. */
+#define UART_EVENTS_RXTO_EVENTS_RXTO_NotGenerated (0UL) /*!< Event not generated */
+#define UART_EVENTS_RXTO_EVENTS_RXTO_Generated (1UL) /*!< Event generated */
+
+/* Register: UART_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 4 : Shortcut between event NCTS and task STOPRX */
+#define UART_SHORTS_NCTS_STOPRX_Pos (4UL) /*!< Position of NCTS_STOPRX field. */
+#define UART_SHORTS_NCTS_STOPRX_Msk (0x1UL << UART_SHORTS_NCTS_STOPRX_Pos) /*!< Bit mask of NCTS_STOPRX field. */
+#define UART_SHORTS_NCTS_STOPRX_Disabled (0UL) /*!< Disable shortcut */
+#define UART_SHORTS_NCTS_STOPRX_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 3 : Shortcut between event CTS and task STARTRX */
+#define UART_SHORTS_CTS_STARTRX_Pos (3UL) /*!< Position of CTS_STARTRX field. */
+#define UART_SHORTS_CTS_STARTRX_Msk (0x1UL << UART_SHORTS_CTS_STARTRX_Pos) /*!< Bit mask of CTS_STARTRX field. */
+#define UART_SHORTS_CTS_STARTRX_Disabled (0UL) /*!< Disable shortcut */
+#define UART_SHORTS_CTS_STARTRX_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: UART_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 17 : Write '1' to enable interrupt for event RXTO */
+#define UART_INTENSET_RXTO_Pos (17UL) /*!< Position of RXTO field. */
+#define UART_INTENSET_RXTO_Msk (0x1UL << UART_INTENSET_RXTO_Pos) /*!< Bit mask of RXTO field. */
+#define UART_INTENSET_RXTO_Disabled (0UL) /*!< Read: Disabled */
+#define UART_INTENSET_RXTO_Enabled (1UL) /*!< Read: Enabled */
+#define UART_INTENSET_RXTO_Set (1UL) /*!< Enable */
+
+/* Bit 9 : Write '1' to enable interrupt for event ERROR */
+#define UART_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */
+#define UART_INTENSET_ERROR_Msk (0x1UL << UART_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define UART_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */
+#define UART_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */
+#define UART_INTENSET_ERROR_Set (1UL) /*!< Enable */
+
+/* Bit 7 : Write '1' to enable interrupt for event TXDRDY */
+#define UART_INTENSET_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */
+#define UART_INTENSET_TXDRDY_Msk (0x1UL << UART_INTENSET_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */
+#define UART_INTENSET_TXDRDY_Disabled (0UL) /*!< Read: Disabled */
+#define UART_INTENSET_TXDRDY_Enabled (1UL) /*!< Read: Enabled */
+#define UART_INTENSET_TXDRDY_Set (1UL) /*!< Enable */
+
+/* Bit 2 : Write '1' to enable interrupt for event RXDRDY */
+#define UART_INTENSET_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */
+#define UART_INTENSET_RXDRDY_Msk (0x1UL << UART_INTENSET_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */
+#define UART_INTENSET_RXDRDY_Disabled (0UL) /*!< Read: Disabled */
+#define UART_INTENSET_RXDRDY_Enabled (1UL) /*!< Read: Enabled */
+#define UART_INTENSET_RXDRDY_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event NCTS */
+#define UART_INTENSET_NCTS_Pos (1UL) /*!< Position of NCTS field. */
+#define UART_INTENSET_NCTS_Msk (0x1UL << UART_INTENSET_NCTS_Pos) /*!< Bit mask of NCTS field. */
+#define UART_INTENSET_NCTS_Disabled (0UL) /*!< Read: Disabled */
+#define UART_INTENSET_NCTS_Enabled (1UL) /*!< Read: Enabled */
+#define UART_INTENSET_NCTS_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event CTS */
+#define UART_INTENSET_CTS_Pos (0UL) /*!< Position of CTS field. */
+#define UART_INTENSET_CTS_Msk (0x1UL << UART_INTENSET_CTS_Pos) /*!< Bit mask of CTS field. */
+#define UART_INTENSET_CTS_Disabled (0UL) /*!< Read: Disabled */
+#define UART_INTENSET_CTS_Enabled (1UL) /*!< Read: Enabled */
+#define UART_INTENSET_CTS_Set (1UL) /*!< Enable */
+
+/* Register: UART_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 17 : Write '1' to disable interrupt for event RXTO */
+#define UART_INTENCLR_RXTO_Pos (17UL) /*!< Position of RXTO field. */
+#define UART_INTENCLR_RXTO_Msk (0x1UL << UART_INTENCLR_RXTO_Pos) /*!< Bit mask of RXTO field. */
+#define UART_INTENCLR_RXTO_Disabled (0UL) /*!< Read: Disabled */
+#define UART_INTENCLR_RXTO_Enabled (1UL) /*!< Read: Enabled */
+#define UART_INTENCLR_RXTO_Clear (1UL) /*!< Disable */
+
+/* Bit 9 : Write '1' to disable interrupt for event ERROR */
+#define UART_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */
+#define UART_INTENCLR_ERROR_Msk (0x1UL << UART_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define UART_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */
+#define UART_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */
+#define UART_INTENCLR_ERROR_Clear (1UL) /*!< Disable */
+
+/* Bit 7 : Write '1' to disable interrupt for event TXDRDY */
+#define UART_INTENCLR_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */
+#define UART_INTENCLR_TXDRDY_Msk (0x1UL << UART_INTENCLR_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */
+#define UART_INTENCLR_TXDRDY_Disabled (0UL) /*!< Read: Disabled */
+#define UART_INTENCLR_TXDRDY_Enabled (1UL) /*!< Read: Enabled */
+#define UART_INTENCLR_TXDRDY_Clear (1UL) /*!< Disable */
+
+/* Bit 2 : Write '1' to disable interrupt for event RXDRDY */
+#define UART_INTENCLR_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */
+#define UART_INTENCLR_RXDRDY_Msk (0x1UL << UART_INTENCLR_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */
+#define UART_INTENCLR_RXDRDY_Disabled (0UL) /*!< Read: Disabled */
+#define UART_INTENCLR_RXDRDY_Enabled (1UL) /*!< Read: Enabled */
+#define UART_INTENCLR_RXDRDY_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event NCTS */
+#define UART_INTENCLR_NCTS_Pos (1UL) /*!< Position of NCTS field. */
+#define UART_INTENCLR_NCTS_Msk (0x1UL << UART_INTENCLR_NCTS_Pos) /*!< Bit mask of NCTS field. */
+#define UART_INTENCLR_NCTS_Disabled (0UL) /*!< Read: Disabled */
+#define UART_INTENCLR_NCTS_Enabled (1UL) /*!< Read: Enabled */
+#define UART_INTENCLR_NCTS_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event CTS */
+#define UART_INTENCLR_CTS_Pos (0UL) /*!< Position of CTS field. */
+#define UART_INTENCLR_CTS_Msk (0x1UL << UART_INTENCLR_CTS_Pos) /*!< Bit mask of CTS field. */
+#define UART_INTENCLR_CTS_Disabled (0UL) /*!< Read: Disabled */
+#define UART_INTENCLR_CTS_Enabled (1UL) /*!< Read: Enabled */
+#define UART_INTENCLR_CTS_Clear (1UL) /*!< Disable */
+
+/* Register: UART_ERRORSRC */
+/* Description: Error source */
+
+/* Bit 3 : Break condition */
+#define UART_ERRORSRC_BREAK_Pos (3UL) /*!< Position of BREAK field. */
+#define UART_ERRORSRC_BREAK_Msk (0x1UL << UART_ERRORSRC_BREAK_Pos) /*!< Bit mask of BREAK field. */
+#define UART_ERRORSRC_BREAK_NotPresent (0UL) /*!< Read: error not present */
+#define UART_ERRORSRC_BREAK_Present (1UL) /*!< Read: error present */
+
+/* Bit 2 : Framing error occurred */
+#define UART_ERRORSRC_FRAMING_Pos (2UL) /*!< Position of FRAMING field. */
+#define UART_ERRORSRC_FRAMING_Msk (0x1UL << UART_ERRORSRC_FRAMING_Pos) /*!< Bit mask of FRAMING field. */
+#define UART_ERRORSRC_FRAMING_NotPresent (0UL) /*!< Read: error not present */
+#define UART_ERRORSRC_FRAMING_Present (1UL) /*!< Read: error present */
+
+/* Bit 1 : Parity error */
+#define UART_ERRORSRC_PARITY_Pos (1UL) /*!< Position of PARITY field. */
+#define UART_ERRORSRC_PARITY_Msk (0x1UL << UART_ERRORSRC_PARITY_Pos) /*!< Bit mask of PARITY field. */
+#define UART_ERRORSRC_PARITY_NotPresent (0UL) /*!< Read: error not present */
+#define UART_ERRORSRC_PARITY_Present (1UL) /*!< Read: error present */
+
+/* Bit 0 : Overrun error */
+#define UART_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */
+#define UART_ERRORSRC_OVERRUN_Msk (0x1UL << UART_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */
+#define UART_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Read: error not present */
+#define UART_ERRORSRC_OVERRUN_Present (1UL) /*!< Read: error present */
+
+/* Register: UART_ENABLE */
+/* Description: Enable UART */
+
+/* Bits 3..0 : Enable or disable UART */
+#define UART_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define UART_ENABLE_ENABLE_Msk (0xFUL << UART_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define UART_ENABLE_ENABLE_Disabled (0UL) /*!< Disable UART */
+#define UART_ENABLE_ENABLE_Enabled (4UL) /*!< Enable UART */
+
+/* Register: UART_PSEL_RTS */
+/* Description: Pin select for RTS */
+
+/* Bit 31 : Connection */
+#define UART_PSEL_RTS_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define UART_PSEL_RTS_CONNECT_Msk (0x1UL << UART_PSEL_RTS_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define UART_PSEL_RTS_CONNECT_Connected (0UL) /*!< Connect */
+#define UART_PSEL_RTS_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bits 4..0 : Pin number */
+#define UART_PSEL_RTS_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define UART_PSEL_RTS_PIN_Msk (0x1FUL << UART_PSEL_RTS_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: UART_PSEL_TXD */
+/* Description: Pin select for TXD */
+
+/* Bit 31 : Connection */
+#define UART_PSEL_TXD_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define UART_PSEL_TXD_CONNECT_Msk (0x1UL << UART_PSEL_TXD_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define UART_PSEL_TXD_CONNECT_Connected (0UL) /*!< Connect */
+#define UART_PSEL_TXD_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bits 4..0 : Pin number */
+#define UART_PSEL_TXD_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define UART_PSEL_TXD_PIN_Msk (0x1FUL << UART_PSEL_TXD_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: UART_PSEL_CTS */
+/* Description: Pin select for CTS */
+
+/* Bit 31 : Connection */
+#define UART_PSEL_CTS_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define UART_PSEL_CTS_CONNECT_Msk (0x1UL << UART_PSEL_CTS_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define UART_PSEL_CTS_CONNECT_Connected (0UL) /*!< Connect */
+#define UART_PSEL_CTS_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bits 4..0 : Pin number */
+#define UART_PSEL_CTS_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define UART_PSEL_CTS_PIN_Msk (0x1FUL << UART_PSEL_CTS_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: UART_PSEL_RXD */
+/* Description: Pin select for RXD */
+
+/* Bit 31 : Connection */
+#define UART_PSEL_RXD_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define UART_PSEL_RXD_CONNECT_Msk (0x1UL << UART_PSEL_RXD_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define UART_PSEL_RXD_CONNECT_Connected (0UL) /*!< Connect */
+#define UART_PSEL_RXD_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bits 4..0 : Pin number */
+#define UART_PSEL_RXD_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define UART_PSEL_RXD_PIN_Msk (0x1FUL << UART_PSEL_RXD_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: UART_RXD */
+/* Description: RXD register */
+
+/* Bits 7..0 : RX data received in previous transfers, double buffered */
+#define UART_RXD_RXD_Pos (0UL) /*!< Position of RXD field. */
+#define UART_RXD_RXD_Msk (0xFFUL << UART_RXD_RXD_Pos) /*!< Bit mask of RXD field. */
+
+/* Register: UART_TXD */
+/* Description: TXD register */
+
+/* Bits 7..0 : TX data to be transferred */
+#define UART_TXD_TXD_Pos (0UL) /*!< Position of TXD field. */
+#define UART_TXD_TXD_Msk (0xFFUL << UART_TXD_TXD_Pos) /*!< Bit mask of TXD field. */
+
+/* Register: UART_BAUDRATE */
+/* Description: Baud rate. Accuracy depends on the HFCLK source selected. */
+
+/* Bits 31..0 : Baud rate */
+#define UART_BAUDRATE_BAUDRATE_Pos (0UL) /*!< Position of BAUDRATE field. */
+#define UART_BAUDRATE_BAUDRATE_Msk (0xFFFFFFFFUL << UART_BAUDRATE_BAUDRATE_Pos) /*!< Bit mask of BAUDRATE field. */
+#define UART_BAUDRATE_BAUDRATE_Baud1200 (0x0004F000UL) /*!< 1200 baud (actual rate: 1205) */
+#define UART_BAUDRATE_BAUDRATE_Baud2400 (0x0009D000UL) /*!< 2400 baud (actual rate: 2396) */
+#define UART_BAUDRATE_BAUDRATE_Baud4800 (0x0013B000UL) /*!< 4800 baud (actual rate: 4808) */
+#define UART_BAUDRATE_BAUDRATE_Baud9600 (0x00275000UL) /*!< 9600 baud (actual rate: 9598) */
+#define UART_BAUDRATE_BAUDRATE_Baud14400 (0x003B0000UL) /*!< 14400 baud (actual rate: 14414) */
+#define UART_BAUDRATE_BAUDRATE_Baud19200 (0x004EA000UL) /*!< 19200 baud (actual rate: 19208) */
+#define UART_BAUDRATE_BAUDRATE_Baud28800 (0x0075F000UL) /*!< 28800 baud (actual rate: 28829) */
+#define UART_BAUDRATE_BAUDRATE_Baud31250 (0x00800000UL) /*!< 31250 baud */
+#define UART_BAUDRATE_BAUDRATE_Baud38400 (0x009D5000UL) /*!< 38400 baud (actual rate: 38462) */
+#define UART_BAUDRATE_BAUDRATE_Baud56000 (0x00E50000UL) /*!< 56000 baud (actual rate: 55944) */
+#define UART_BAUDRATE_BAUDRATE_Baud57600 (0x00EBF000UL) /*!< 57600 baud (actual rate: 57762) */
+#define UART_BAUDRATE_BAUDRATE_Baud76800 (0x013A9000UL) /*!< 76800 baud (actual rate: 76923) */
+#define UART_BAUDRATE_BAUDRATE_Baud115200 (0x01D7E000UL) /*!< 115200 baud (actual rate: 115942) */
+#define UART_BAUDRATE_BAUDRATE_Baud230400 (0x03AFB000UL) /*!< 230400 baud (actual rate: 231884) */
+#define UART_BAUDRATE_BAUDRATE_Baud250000 (0x04000000UL) /*!< 250000 baud */
+#define UART_BAUDRATE_BAUDRATE_Baud460800 (0x075F7000UL) /*!< 460800 baud (actual rate: 470588) */
+#define UART_BAUDRATE_BAUDRATE_Baud921600 (0x0EBED000UL) /*!< 921600 baud (actual rate: 941176) */
+#define UART_BAUDRATE_BAUDRATE_Baud1M (0x10000000UL) /*!< 1Mega baud */
+
+/* Register: UART_CONFIG */
+/* Description: Configuration of parity and hardware flow control */
+
+/* Bit 4 : Stop bits */
+#define UART_CONFIG_STOP_Pos (4UL) /*!< Position of STOP field. */
+#define UART_CONFIG_STOP_Msk (0x1UL << UART_CONFIG_STOP_Pos) /*!< Bit mask of STOP field. */
+#define UART_CONFIG_STOP_One (0UL) /*!< One stop bit */
+#define UART_CONFIG_STOP_Two (1UL) /*!< Two stop bits */
+
+/* Bits 3..1 : Parity */
+#define UART_CONFIG_PARITY_Pos (1UL) /*!< Position of PARITY field. */
+#define UART_CONFIG_PARITY_Msk (0x7UL << UART_CONFIG_PARITY_Pos) /*!< Bit mask of PARITY field. */
+#define UART_CONFIG_PARITY_Excluded (0x0UL) /*!< Exclude parity bit */
+#define UART_CONFIG_PARITY_Included (0x7UL) /*!< Include parity bit */
+
+/* Bit 0 : Hardware flow control */
+#define UART_CONFIG_HWFC_Pos (0UL) /*!< Position of HWFC field. */
+#define UART_CONFIG_HWFC_Msk (0x1UL << UART_CONFIG_HWFC_Pos) /*!< Bit mask of HWFC field. */
+#define UART_CONFIG_HWFC_Disabled (0UL) /*!< Disabled */
+#define UART_CONFIG_HWFC_Enabled (1UL) /*!< Enabled */
+
+
+/* Peripheral: UARTE */
+/* Description: UART with EasyDMA */
+
+/* Register: UARTE_TASKS_STARTRX */
+/* Description: Start UART receiver */
+
+/* Bit 0 : Start UART receiver */
+#define UARTE_TASKS_STARTRX_TASKS_STARTRX_Pos (0UL) /*!< Position of TASKS_STARTRX field. */
+#define UARTE_TASKS_STARTRX_TASKS_STARTRX_Msk (0x1UL << UARTE_TASKS_STARTRX_TASKS_STARTRX_Pos) /*!< Bit mask of TASKS_STARTRX field. */
+#define UARTE_TASKS_STARTRX_TASKS_STARTRX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: UARTE_TASKS_STOPRX */
+/* Description: Stop UART receiver */
+
+/* Bit 0 : Stop UART receiver */
+#define UARTE_TASKS_STOPRX_TASKS_STOPRX_Pos (0UL) /*!< Position of TASKS_STOPRX field. */
+#define UARTE_TASKS_STOPRX_TASKS_STOPRX_Msk (0x1UL << UARTE_TASKS_STOPRX_TASKS_STOPRX_Pos) /*!< Bit mask of TASKS_STOPRX field. */
+#define UARTE_TASKS_STOPRX_TASKS_STOPRX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: UARTE_TASKS_STARTTX */
+/* Description: Start UART transmitter */
+
+/* Bit 0 : Start UART transmitter */
+#define UARTE_TASKS_STARTTX_TASKS_STARTTX_Pos (0UL) /*!< Position of TASKS_STARTTX field. */
+#define UARTE_TASKS_STARTTX_TASKS_STARTTX_Msk (0x1UL << UARTE_TASKS_STARTTX_TASKS_STARTTX_Pos) /*!< Bit mask of TASKS_STARTTX field. */
+#define UARTE_TASKS_STARTTX_TASKS_STARTTX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: UARTE_TASKS_STOPTX */
+/* Description: Stop UART transmitter */
+
+/* Bit 0 : Stop UART transmitter */
+#define UARTE_TASKS_STOPTX_TASKS_STOPTX_Pos (0UL) /*!< Position of TASKS_STOPTX field. */
+#define UARTE_TASKS_STOPTX_TASKS_STOPTX_Msk (0x1UL << UARTE_TASKS_STOPTX_TASKS_STOPTX_Pos) /*!< Bit mask of TASKS_STOPTX field. */
+#define UARTE_TASKS_STOPTX_TASKS_STOPTX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: UARTE_TASKS_FLUSHRX */
+/* Description: Flush RX FIFO into RX buffer */
+
+/* Bit 0 : Flush RX FIFO into RX buffer */
+#define UARTE_TASKS_FLUSHRX_TASKS_FLUSHRX_Pos (0UL) /*!< Position of TASKS_FLUSHRX field. */
+#define UARTE_TASKS_FLUSHRX_TASKS_FLUSHRX_Msk (0x1UL << UARTE_TASKS_FLUSHRX_TASKS_FLUSHRX_Pos) /*!< Bit mask of TASKS_FLUSHRX field. */
+#define UARTE_TASKS_FLUSHRX_TASKS_FLUSHRX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: UARTE_EVENTS_CTS */
+/* Description: CTS is activated (set low). Clear To Send. */
+
+/* Bit 0 : CTS is activated (set low). Clear To Send. */
+#define UARTE_EVENTS_CTS_EVENTS_CTS_Pos (0UL) /*!< Position of EVENTS_CTS field. */
+#define UARTE_EVENTS_CTS_EVENTS_CTS_Msk (0x1UL << UARTE_EVENTS_CTS_EVENTS_CTS_Pos) /*!< Bit mask of EVENTS_CTS field. */
+#define UARTE_EVENTS_CTS_EVENTS_CTS_NotGenerated (0UL) /*!< Event not generated */
+#define UARTE_EVENTS_CTS_EVENTS_CTS_Generated (1UL) /*!< Event generated */
+
+/* Register: UARTE_EVENTS_NCTS */
+/* Description: CTS is deactivated (set high). Not Clear To Send. */
+
+/* Bit 0 : CTS is deactivated (set high). Not Clear To Send. */
+#define UARTE_EVENTS_NCTS_EVENTS_NCTS_Pos (0UL) /*!< Position of EVENTS_NCTS field. */
+#define UARTE_EVENTS_NCTS_EVENTS_NCTS_Msk (0x1UL << UARTE_EVENTS_NCTS_EVENTS_NCTS_Pos) /*!< Bit mask of EVENTS_NCTS field. */
+#define UARTE_EVENTS_NCTS_EVENTS_NCTS_NotGenerated (0UL) /*!< Event not generated */
+#define UARTE_EVENTS_NCTS_EVENTS_NCTS_Generated (1UL) /*!< Event generated */
+
+/* Register: UARTE_EVENTS_RXDRDY */
+/* Description: Data received in RXD (but potentially not yet transferred to Data RAM) */
+
+/* Bit 0 : Data received in RXD (but potentially not yet transferred to Data RAM) */
+#define UARTE_EVENTS_RXDRDY_EVENTS_RXDRDY_Pos (0UL) /*!< Position of EVENTS_RXDRDY field. */
+#define UARTE_EVENTS_RXDRDY_EVENTS_RXDRDY_Msk (0x1UL << UARTE_EVENTS_RXDRDY_EVENTS_RXDRDY_Pos) /*!< Bit mask of EVENTS_RXDRDY field. */
+#define UARTE_EVENTS_RXDRDY_EVENTS_RXDRDY_NotGenerated (0UL) /*!< Event not generated */
+#define UARTE_EVENTS_RXDRDY_EVENTS_RXDRDY_Generated (1UL) /*!< Event generated */
+
+/* Register: UARTE_EVENTS_ENDRX */
+/* Description: Receive buffer is filled up */
+
+/* Bit 0 : Receive buffer is filled up */
+#define UARTE_EVENTS_ENDRX_EVENTS_ENDRX_Pos (0UL) /*!< Position of EVENTS_ENDRX field. */
+#define UARTE_EVENTS_ENDRX_EVENTS_ENDRX_Msk (0x1UL << UARTE_EVENTS_ENDRX_EVENTS_ENDRX_Pos) /*!< Bit mask of EVENTS_ENDRX field. */
+#define UARTE_EVENTS_ENDRX_EVENTS_ENDRX_NotGenerated (0UL) /*!< Event not generated */
+#define UARTE_EVENTS_ENDRX_EVENTS_ENDRX_Generated (1UL) /*!< Event generated */
+
+/* Register: UARTE_EVENTS_TXDRDY */
+/* Description: Data sent from TXD */
+
+/* Bit 0 : Data sent from TXD */
+#define UARTE_EVENTS_TXDRDY_EVENTS_TXDRDY_Pos (0UL) /*!< Position of EVENTS_TXDRDY field. */
+#define UARTE_EVENTS_TXDRDY_EVENTS_TXDRDY_Msk (0x1UL << UARTE_EVENTS_TXDRDY_EVENTS_TXDRDY_Pos) /*!< Bit mask of EVENTS_TXDRDY field. */
+#define UARTE_EVENTS_TXDRDY_EVENTS_TXDRDY_NotGenerated (0UL) /*!< Event not generated */
+#define UARTE_EVENTS_TXDRDY_EVENTS_TXDRDY_Generated (1UL) /*!< Event generated */
+
+/* Register: UARTE_EVENTS_ENDTX */
+/* Description: Last TX byte transmitted */
+
+/* Bit 0 : Last TX byte transmitted */
+#define UARTE_EVENTS_ENDTX_EVENTS_ENDTX_Pos (0UL) /*!< Position of EVENTS_ENDTX field. */
+#define UARTE_EVENTS_ENDTX_EVENTS_ENDTX_Msk (0x1UL << UARTE_EVENTS_ENDTX_EVENTS_ENDTX_Pos) /*!< Bit mask of EVENTS_ENDTX field. */
+#define UARTE_EVENTS_ENDTX_EVENTS_ENDTX_NotGenerated (0UL) /*!< Event not generated */
+#define UARTE_EVENTS_ENDTX_EVENTS_ENDTX_Generated (1UL) /*!< Event generated */
+
+/* Register: UARTE_EVENTS_ERROR */
+/* Description: Error detected */
+
+/* Bit 0 : Error detected */
+#define UARTE_EVENTS_ERROR_EVENTS_ERROR_Pos (0UL) /*!< Position of EVENTS_ERROR field. */
+#define UARTE_EVENTS_ERROR_EVENTS_ERROR_Msk (0x1UL << UARTE_EVENTS_ERROR_EVENTS_ERROR_Pos) /*!< Bit mask of EVENTS_ERROR field. */
+#define UARTE_EVENTS_ERROR_EVENTS_ERROR_NotGenerated (0UL) /*!< Event not generated */
+#define UARTE_EVENTS_ERROR_EVENTS_ERROR_Generated (1UL) /*!< Event generated */
+
+/* Register: UARTE_EVENTS_RXTO */
+/* Description: Receiver timeout */
+
+/* Bit 0 : Receiver timeout */
+#define UARTE_EVENTS_RXTO_EVENTS_RXTO_Pos (0UL) /*!< Position of EVENTS_RXTO field. */
+#define UARTE_EVENTS_RXTO_EVENTS_RXTO_Msk (0x1UL << UARTE_EVENTS_RXTO_EVENTS_RXTO_Pos) /*!< Bit mask of EVENTS_RXTO field. */
+#define UARTE_EVENTS_RXTO_EVENTS_RXTO_NotGenerated (0UL) /*!< Event not generated */
+#define UARTE_EVENTS_RXTO_EVENTS_RXTO_Generated (1UL) /*!< Event generated */
+
+/* Register: UARTE_EVENTS_RXSTARTED */
+/* Description: UART receiver has started */
+
+/* Bit 0 : UART receiver has started */
+#define UARTE_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos (0UL) /*!< Position of EVENTS_RXSTARTED field. */
+#define UARTE_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Msk (0x1UL << UARTE_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos) /*!< Bit mask of EVENTS_RXSTARTED field. */
+#define UARTE_EVENTS_RXSTARTED_EVENTS_RXSTARTED_NotGenerated (0UL) /*!< Event not generated */
+#define UARTE_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Generated (1UL) /*!< Event generated */
+
+/* Register: UARTE_EVENTS_TXSTARTED */
+/* Description: UART transmitter has started */
+
+/* Bit 0 : UART transmitter has started */
+#define UARTE_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos (0UL) /*!< Position of EVENTS_TXSTARTED field. */
+#define UARTE_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Msk (0x1UL << UARTE_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos) /*!< Bit mask of EVENTS_TXSTARTED field. */
+#define UARTE_EVENTS_TXSTARTED_EVENTS_TXSTARTED_NotGenerated (0UL) /*!< Event not generated */
+#define UARTE_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Generated (1UL) /*!< Event generated */
+
+/* Register: UARTE_EVENTS_TXSTOPPED */
+/* Description: Transmitter stopped */
+
+/* Bit 0 : Transmitter stopped */
+#define UARTE_EVENTS_TXSTOPPED_EVENTS_TXSTOPPED_Pos (0UL) /*!< Position of EVENTS_TXSTOPPED field. */
+#define UARTE_EVENTS_TXSTOPPED_EVENTS_TXSTOPPED_Msk (0x1UL << UARTE_EVENTS_TXSTOPPED_EVENTS_TXSTOPPED_Pos) /*!< Bit mask of EVENTS_TXSTOPPED field. */
+#define UARTE_EVENTS_TXSTOPPED_EVENTS_TXSTOPPED_NotGenerated (0UL) /*!< Event not generated */
+#define UARTE_EVENTS_TXSTOPPED_EVENTS_TXSTOPPED_Generated (1UL) /*!< Event generated */
+
+/* Register: UARTE_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 6 : Shortcut between event ENDRX and task STOPRX */
+#define UARTE_SHORTS_ENDRX_STOPRX_Pos (6UL) /*!< Position of ENDRX_STOPRX field. */
+#define UARTE_SHORTS_ENDRX_STOPRX_Msk (0x1UL << UARTE_SHORTS_ENDRX_STOPRX_Pos) /*!< Bit mask of ENDRX_STOPRX field. */
+#define UARTE_SHORTS_ENDRX_STOPRX_Disabled (0UL) /*!< Disable shortcut */
+#define UARTE_SHORTS_ENDRX_STOPRX_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 5 : Shortcut between event ENDRX and task STARTRX */
+#define UARTE_SHORTS_ENDRX_STARTRX_Pos (5UL) /*!< Position of ENDRX_STARTRX field. */
+#define UARTE_SHORTS_ENDRX_STARTRX_Msk (0x1UL << UARTE_SHORTS_ENDRX_STARTRX_Pos) /*!< Bit mask of ENDRX_STARTRX field. */
+#define UARTE_SHORTS_ENDRX_STARTRX_Disabled (0UL) /*!< Disable shortcut */
+#define UARTE_SHORTS_ENDRX_STARTRX_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: UARTE_INTEN */
+/* Description: Enable or disable interrupt */
+
+/* Bit 22 : Enable or disable interrupt for event TXSTOPPED */
+#define UARTE_INTEN_TXSTOPPED_Pos (22UL) /*!< Position of TXSTOPPED field. */
+#define UARTE_INTEN_TXSTOPPED_Msk (0x1UL << UARTE_INTEN_TXSTOPPED_Pos) /*!< Bit mask of TXSTOPPED field. */
+#define UARTE_INTEN_TXSTOPPED_Disabled (0UL) /*!< Disable */
+#define UARTE_INTEN_TXSTOPPED_Enabled (1UL) /*!< Enable */
+
+/* Bit 20 : Enable or disable interrupt for event TXSTARTED */
+#define UARTE_INTEN_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */
+#define UARTE_INTEN_TXSTARTED_Msk (0x1UL << UARTE_INTEN_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */
+#define UARTE_INTEN_TXSTARTED_Disabled (0UL) /*!< Disable */
+#define UARTE_INTEN_TXSTARTED_Enabled (1UL) /*!< Enable */
+
+/* Bit 19 : Enable or disable interrupt for event RXSTARTED */
+#define UARTE_INTEN_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */
+#define UARTE_INTEN_RXSTARTED_Msk (0x1UL << UARTE_INTEN_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */
+#define UARTE_INTEN_RXSTARTED_Disabled (0UL) /*!< Disable */
+#define UARTE_INTEN_RXSTARTED_Enabled (1UL) /*!< Enable */
+
+/* Bit 17 : Enable or disable interrupt for event RXTO */
+#define UARTE_INTEN_RXTO_Pos (17UL) /*!< Position of RXTO field. */
+#define UARTE_INTEN_RXTO_Msk (0x1UL << UARTE_INTEN_RXTO_Pos) /*!< Bit mask of RXTO field. */
+#define UARTE_INTEN_RXTO_Disabled (0UL) /*!< Disable */
+#define UARTE_INTEN_RXTO_Enabled (1UL) /*!< Enable */
+
+/* Bit 9 : Enable or disable interrupt for event ERROR */
+#define UARTE_INTEN_ERROR_Pos (9UL) /*!< Position of ERROR field. */
+#define UARTE_INTEN_ERROR_Msk (0x1UL << UARTE_INTEN_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define UARTE_INTEN_ERROR_Disabled (0UL) /*!< Disable */
+#define UARTE_INTEN_ERROR_Enabled (1UL) /*!< Enable */
+
+/* Bit 8 : Enable or disable interrupt for event ENDTX */
+#define UARTE_INTEN_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */
+#define UARTE_INTEN_ENDTX_Msk (0x1UL << UARTE_INTEN_ENDTX_Pos) /*!< Bit mask of ENDTX field. */
+#define UARTE_INTEN_ENDTX_Disabled (0UL) /*!< Disable */
+#define UARTE_INTEN_ENDTX_Enabled (1UL) /*!< Enable */
+
+/* Bit 7 : Enable or disable interrupt for event TXDRDY */
+#define UARTE_INTEN_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */
+#define UARTE_INTEN_TXDRDY_Msk (0x1UL << UARTE_INTEN_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */
+#define UARTE_INTEN_TXDRDY_Disabled (0UL) /*!< Disable */
+#define UARTE_INTEN_TXDRDY_Enabled (1UL) /*!< Enable */
+
+/* Bit 4 : Enable or disable interrupt for event ENDRX */
+#define UARTE_INTEN_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */
+#define UARTE_INTEN_ENDRX_Msk (0x1UL << UARTE_INTEN_ENDRX_Pos) /*!< Bit mask of ENDRX field. */
+#define UARTE_INTEN_ENDRX_Disabled (0UL) /*!< Disable */
+#define UARTE_INTEN_ENDRX_Enabled (1UL) /*!< Enable */
+
+/* Bit 2 : Enable or disable interrupt for event RXDRDY */
+#define UARTE_INTEN_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */
+#define UARTE_INTEN_RXDRDY_Msk (0x1UL << UARTE_INTEN_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */
+#define UARTE_INTEN_RXDRDY_Disabled (0UL) /*!< Disable */
+#define UARTE_INTEN_RXDRDY_Enabled (1UL) /*!< Enable */
+
+/* Bit 1 : Enable or disable interrupt for event NCTS */
+#define UARTE_INTEN_NCTS_Pos (1UL) /*!< Position of NCTS field. */
+#define UARTE_INTEN_NCTS_Msk (0x1UL << UARTE_INTEN_NCTS_Pos) /*!< Bit mask of NCTS field. */
+#define UARTE_INTEN_NCTS_Disabled (0UL) /*!< Disable */
+#define UARTE_INTEN_NCTS_Enabled (1UL) /*!< Enable */
+
+/* Bit 0 : Enable or disable interrupt for event CTS */
+#define UARTE_INTEN_CTS_Pos (0UL) /*!< Position of CTS field. */
+#define UARTE_INTEN_CTS_Msk (0x1UL << UARTE_INTEN_CTS_Pos) /*!< Bit mask of CTS field. */
+#define UARTE_INTEN_CTS_Disabled (0UL) /*!< Disable */
+#define UARTE_INTEN_CTS_Enabled (1UL) /*!< Enable */
+
+/* Register: UARTE_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 22 : Write '1' to enable interrupt for event TXSTOPPED */
+#define UARTE_INTENSET_TXSTOPPED_Pos (22UL) /*!< Position of TXSTOPPED field. */
+#define UARTE_INTENSET_TXSTOPPED_Msk (0x1UL << UARTE_INTENSET_TXSTOPPED_Pos) /*!< Bit mask of TXSTOPPED field. */
+#define UARTE_INTENSET_TXSTOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENSET_TXSTOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENSET_TXSTOPPED_Set (1UL) /*!< Enable */
+
+/* Bit 20 : Write '1' to enable interrupt for event TXSTARTED */
+#define UARTE_INTENSET_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */
+#define UARTE_INTENSET_TXSTARTED_Msk (0x1UL << UARTE_INTENSET_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */
+#define UARTE_INTENSET_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENSET_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENSET_TXSTARTED_Set (1UL) /*!< Enable */
+
+/* Bit 19 : Write '1' to enable interrupt for event RXSTARTED */
+#define UARTE_INTENSET_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */
+#define UARTE_INTENSET_RXSTARTED_Msk (0x1UL << UARTE_INTENSET_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */
+#define UARTE_INTENSET_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENSET_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENSET_RXSTARTED_Set (1UL) /*!< Enable */
+
+/* Bit 17 : Write '1' to enable interrupt for event RXTO */
+#define UARTE_INTENSET_RXTO_Pos (17UL) /*!< Position of RXTO field. */
+#define UARTE_INTENSET_RXTO_Msk (0x1UL << UARTE_INTENSET_RXTO_Pos) /*!< Bit mask of RXTO field. */
+#define UARTE_INTENSET_RXTO_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENSET_RXTO_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENSET_RXTO_Set (1UL) /*!< Enable */
+
+/* Bit 9 : Write '1' to enable interrupt for event ERROR */
+#define UARTE_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */
+#define UARTE_INTENSET_ERROR_Msk (0x1UL << UARTE_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define UARTE_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENSET_ERROR_Set (1UL) /*!< Enable */
+
+/* Bit 8 : Write '1' to enable interrupt for event ENDTX */
+#define UARTE_INTENSET_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */
+#define UARTE_INTENSET_ENDTX_Msk (0x1UL << UARTE_INTENSET_ENDTX_Pos) /*!< Bit mask of ENDTX field. */
+#define UARTE_INTENSET_ENDTX_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENSET_ENDTX_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENSET_ENDTX_Set (1UL) /*!< Enable */
+
+/* Bit 7 : Write '1' to enable interrupt for event TXDRDY */
+#define UARTE_INTENSET_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */
+#define UARTE_INTENSET_TXDRDY_Msk (0x1UL << UARTE_INTENSET_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */
+#define UARTE_INTENSET_TXDRDY_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENSET_TXDRDY_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENSET_TXDRDY_Set (1UL) /*!< Enable */
+
+/* Bit 4 : Write '1' to enable interrupt for event ENDRX */
+#define UARTE_INTENSET_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */
+#define UARTE_INTENSET_ENDRX_Msk (0x1UL << UARTE_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */
+#define UARTE_INTENSET_ENDRX_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENSET_ENDRX_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENSET_ENDRX_Set (1UL) /*!< Enable */
+
+/* Bit 2 : Write '1' to enable interrupt for event RXDRDY */
+#define UARTE_INTENSET_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */
+#define UARTE_INTENSET_RXDRDY_Msk (0x1UL << UARTE_INTENSET_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */
+#define UARTE_INTENSET_RXDRDY_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENSET_RXDRDY_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENSET_RXDRDY_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event NCTS */
+#define UARTE_INTENSET_NCTS_Pos (1UL) /*!< Position of NCTS field. */
+#define UARTE_INTENSET_NCTS_Msk (0x1UL << UARTE_INTENSET_NCTS_Pos) /*!< Bit mask of NCTS field. */
+#define UARTE_INTENSET_NCTS_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENSET_NCTS_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENSET_NCTS_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event CTS */
+#define UARTE_INTENSET_CTS_Pos (0UL) /*!< Position of CTS field. */
+#define UARTE_INTENSET_CTS_Msk (0x1UL << UARTE_INTENSET_CTS_Pos) /*!< Bit mask of CTS field. */
+#define UARTE_INTENSET_CTS_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENSET_CTS_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENSET_CTS_Set (1UL) /*!< Enable */
+
+/* Register: UARTE_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 22 : Write '1' to disable interrupt for event TXSTOPPED */
+#define UARTE_INTENCLR_TXSTOPPED_Pos (22UL) /*!< Position of TXSTOPPED field. */
+#define UARTE_INTENCLR_TXSTOPPED_Msk (0x1UL << UARTE_INTENCLR_TXSTOPPED_Pos) /*!< Bit mask of TXSTOPPED field. */
+#define UARTE_INTENCLR_TXSTOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENCLR_TXSTOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENCLR_TXSTOPPED_Clear (1UL) /*!< Disable */
+
+/* Bit 20 : Write '1' to disable interrupt for event TXSTARTED */
+#define UARTE_INTENCLR_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */
+#define UARTE_INTENCLR_TXSTARTED_Msk (0x1UL << UARTE_INTENCLR_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */
+#define UARTE_INTENCLR_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENCLR_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENCLR_TXSTARTED_Clear (1UL) /*!< Disable */
+
+/* Bit 19 : Write '1' to disable interrupt for event RXSTARTED */
+#define UARTE_INTENCLR_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */
+#define UARTE_INTENCLR_RXSTARTED_Msk (0x1UL << UARTE_INTENCLR_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */
+#define UARTE_INTENCLR_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENCLR_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENCLR_RXSTARTED_Clear (1UL) /*!< Disable */
+
+/* Bit 17 : Write '1' to disable interrupt for event RXTO */
+#define UARTE_INTENCLR_RXTO_Pos (17UL) /*!< Position of RXTO field. */
+#define UARTE_INTENCLR_RXTO_Msk (0x1UL << UARTE_INTENCLR_RXTO_Pos) /*!< Bit mask of RXTO field. */
+#define UARTE_INTENCLR_RXTO_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENCLR_RXTO_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENCLR_RXTO_Clear (1UL) /*!< Disable */
+
+/* Bit 9 : Write '1' to disable interrupt for event ERROR */
+#define UARTE_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */
+#define UARTE_INTENCLR_ERROR_Msk (0x1UL << UARTE_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define UARTE_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENCLR_ERROR_Clear (1UL) /*!< Disable */
+
+/* Bit 8 : Write '1' to disable interrupt for event ENDTX */
+#define UARTE_INTENCLR_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */
+#define UARTE_INTENCLR_ENDTX_Msk (0x1UL << UARTE_INTENCLR_ENDTX_Pos) /*!< Bit mask of ENDTX field. */
+#define UARTE_INTENCLR_ENDTX_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENCLR_ENDTX_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENCLR_ENDTX_Clear (1UL) /*!< Disable */
+
+/* Bit 7 : Write '1' to disable interrupt for event TXDRDY */
+#define UARTE_INTENCLR_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */
+#define UARTE_INTENCLR_TXDRDY_Msk (0x1UL << UARTE_INTENCLR_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */
+#define UARTE_INTENCLR_TXDRDY_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENCLR_TXDRDY_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENCLR_TXDRDY_Clear (1UL) /*!< Disable */
+
+/* Bit 4 : Write '1' to disable interrupt for event ENDRX */
+#define UARTE_INTENCLR_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */
+#define UARTE_INTENCLR_ENDRX_Msk (0x1UL << UARTE_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */
+#define UARTE_INTENCLR_ENDRX_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENCLR_ENDRX_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENCLR_ENDRX_Clear (1UL) /*!< Disable */
+
+/* Bit 2 : Write '1' to disable interrupt for event RXDRDY */
+#define UARTE_INTENCLR_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */
+#define UARTE_INTENCLR_RXDRDY_Msk (0x1UL << UARTE_INTENCLR_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */
+#define UARTE_INTENCLR_RXDRDY_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENCLR_RXDRDY_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENCLR_RXDRDY_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event NCTS */
+#define UARTE_INTENCLR_NCTS_Pos (1UL) /*!< Position of NCTS field. */
+#define UARTE_INTENCLR_NCTS_Msk (0x1UL << UARTE_INTENCLR_NCTS_Pos) /*!< Bit mask of NCTS field. */
+#define UARTE_INTENCLR_NCTS_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENCLR_NCTS_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENCLR_NCTS_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event CTS */
+#define UARTE_INTENCLR_CTS_Pos (0UL) /*!< Position of CTS field. */
+#define UARTE_INTENCLR_CTS_Msk (0x1UL << UARTE_INTENCLR_CTS_Pos) /*!< Bit mask of CTS field. */
+#define UARTE_INTENCLR_CTS_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENCLR_CTS_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENCLR_CTS_Clear (1UL) /*!< Disable */
+
+/* Register: UARTE_ERRORSRC */
+/* Description: Error source Note : this register is read / write one to clear. */
+
+/* Bit 3 : Break condition */
+#define UARTE_ERRORSRC_BREAK_Pos (3UL) /*!< Position of BREAK field. */
+#define UARTE_ERRORSRC_BREAK_Msk (0x1UL << UARTE_ERRORSRC_BREAK_Pos) /*!< Bit mask of BREAK field. */
+#define UARTE_ERRORSRC_BREAK_NotPresent (0UL) /*!< Read: error not present */
+#define UARTE_ERRORSRC_BREAK_Present (1UL) /*!< Read: error present */
+
+/* Bit 2 : Framing error occurred */
+#define UARTE_ERRORSRC_FRAMING_Pos (2UL) /*!< Position of FRAMING field. */
+#define UARTE_ERRORSRC_FRAMING_Msk (0x1UL << UARTE_ERRORSRC_FRAMING_Pos) /*!< Bit mask of FRAMING field. */
+#define UARTE_ERRORSRC_FRAMING_NotPresent (0UL) /*!< Read: error not present */
+#define UARTE_ERRORSRC_FRAMING_Present (1UL) /*!< Read: error present */
+
+/* Bit 1 : Parity error */
+#define UARTE_ERRORSRC_PARITY_Pos (1UL) /*!< Position of PARITY field. */
+#define UARTE_ERRORSRC_PARITY_Msk (0x1UL << UARTE_ERRORSRC_PARITY_Pos) /*!< Bit mask of PARITY field. */
+#define UARTE_ERRORSRC_PARITY_NotPresent (0UL) /*!< Read: error not present */
+#define UARTE_ERRORSRC_PARITY_Present (1UL) /*!< Read: error present */
+
+/* Bit 0 : Overrun error */
+#define UARTE_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */
+#define UARTE_ERRORSRC_OVERRUN_Msk (0x1UL << UARTE_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */
+#define UARTE_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Read: error not present */
+#define UARTE_ERRORSRC_OVERRUN_Present (1UL) /*!< Read: error present */
+
+/* Register: UARTE_ENABLE */
+/* Description: Enable UART */
+
+/* Bits 3..0 : Enable or disable UARTE */
+#define UARTE_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define UARTE_ENABLE_ENABLE_Msk (0xFUL << UARTE_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define UARTE_ENABLE_ENABLE_Disabled (0UL) /*!< Disable UARTE */
+#define UARTE_ENABLE_ENABLE_Enabled (8UL) /*!< Enable UARTE */
+
+/* Register: UARTE_PSEL_RTS */
+/* Description: Pin select for RTS signal */
+
+/* Bit 31 : Connection */
+#define UARTE_PSEL_RTS_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define UARTE_PSEL_RTS_CONNECT_Msk (0x1UL << UARTE_PSEL_RTS_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define UARTE_PSEL_RTS_CONNECT_Connected (0UL) /*!< Connect */
+#define UARTE_PSEL_RTS_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bits 4..0 : Pin number */
+#define UARTE_PSEL_RTS_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define UARTE_PSEL_RTS_PIN_Msk (0x1FUL << UARTE_PSEL_RTS_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: UARTE_PSEL_TXD */
+/* Description: Pin select for TXD signal */
+
+/* Bit 31 : Connection */
+#define UARTE_PSEL_TXD_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define UARTE_PSEL_TXD_CONNECT_Msk (0x1UL << UARTE_PSEL_TXD_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define UARTE_PSEL_TXD_CONNECT_Connected (0UL) /*!< Connect */
+#define UARTE_PSEL_TXD_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bits 4..0 : Pin number */
+#define UARTE_PSEL_TXD_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define UARTE_PSEL_TXD_PIN_Msk (0x1FUL << UARTE_PSEL_TXD_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: UARTE_PSEL_CTS */
+/* Description: Pin select for CTS signal */
+
+/* Bit 31 : Connection */
+#define UARTE_PSEL_CTS_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define UARTE_PSEL_CTS_CONNECT_Msk (0x1UL << UARTE_PSEL_CTS_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define UARTE_PSEL_CTS_CONNECT_Connected (0UL) /*!< Connect */
+#define UARTE_PSEL_CTS_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bits 4..0 : Pin number */
+#define UARTE_PSEL_CTS_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define UARTE_PSEL_CTS_PIN_Msk (0x1FUL << UARTE_PSEL_CTS_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: UARTE_PSEL_RXD */
+/* Description: Pin select for RXD signal */
+
+/* Bit 31 : Connection */
+#define UARTE_PSEL_RXD_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define UARTE_PSEL_RXD_CONNECT_Msk (0x1UL << UARTE_PSEL_RXD_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define UARTE_PSEL_RXD_CONNECT_Connected (0UL) /*!< Connect */
+#define UARTE_PSEL_RXD_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bits 4..0 : Pin number */
+#define UARTE_PSEL_RXD_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define UARTE_PSEL_RXD_PIN_Msk (0x1FUL << UARTE_PSEL_RXD_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: UARTE_BAUDRATE */
+/* Description: Baud rate. Accuracy depends on the HFCLK source selected. */
+
+/* Bits 31..0 : Baud rate */
+#define UARTE_BAUDRATE_BAUDRATE_Pos (0UL) /*!< Position of BAUDRATE field. */
+#define UARTE_BAUDRATE_BAUDRATE_Msk (0xFFFFFFFFUL << UARTE_BAUDRATE_BAUDRATE_Pos) /*!< Bit mask of BAUDRATE field. */
+#define UARTE_BAUDRATE_BAUDRATE_Baud1200 (0x0004F000UL) /*!< 1200 baud (actual rate: 1205) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud2400 (0x0009D000UL) /*!< 2400 baud (actual rate: 2396) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud4800 (0x0013B000UL) /*!< 4800 baud (actual rate: 4808) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud9600 (0x00275000UL) /*!< 9600 baud (actual rate: 9598) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud14400 (0x003AF000UL) /*!< 14400 baud (actual rate: 14401) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud19200 (0x004EA000UL) /*!< 19200 baud (actual rate: 19208) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud28800 (0x0075C000UL) /*!< 28800 baud (actual rate: 28777) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud31250 (0x00800000UL) /*!< 31250 baud */
+#define UARTE_BAUDRATE_BAUDRATE_Baud38400 (0x009D0000UL) /*!< 38400 baud (actual rate: 38369) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud56000 (0x00E50000UL) /*!< 56000 baud (actual rate: 55944) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud57600 (0x00EB0000UL) /*!< 57600 baud (actual rate: 57554) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud76800 (0x013A9000UL) /*!< 76800 baud (actual rate: 76923) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud115200 (0x01D60000UL) /*!< 115200 baud (actual rate: 115108) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud230400 (0x03B00000UL) /*!< 230400 baud (actual rate: 231884) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud250000 (0x04000000UL) /*!< 250000 baud */
+#define UARTE_BAUDRATE_BAUDRATE_Baud460800 (0x07400000UL) /*!< 460800 baud (actual rate: 457143) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud921600 (0x0F000000UL) /*!< 921600 baud (actual rate: 941176) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud1M (0x10000000UL) /*!< 1Mega baud */
+
+/* Register: UARTE_RXD_PTR */
+/* Description: Data pointer */
+
+/* Bits 31..0 : Data pointer */
+#define UARTE_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define UARTE_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << UARTE_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: UARTE_RXD_MAXCNT */
+/* Description: Maximum number of bytes in receive buffer */
+
+/* Bits 9..0 : Maximum number of bytes in receive buffer */
+#define UARTE_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define UARTE_RXD_MAXCNT_MAXCNT_Msk (0x3FFUL << UARTE_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: UARTE_RXD_AMOUNT */
+/* Description: Number of bytes transferred in the last transaction */
+
+/* Bits 9..0 : Number of bytes transferred in the last transaction */
+#define UARTE_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define UARTE_RXD_AMOUNT_AMOUNT_Msk (0x3FFUL << UARTE_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+/* Register: UARTE_TXD_PTR */
+/* Description: Data pointer */
+
+/* Bits 31..0 : Data pointer */
+#define UARTE_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define UARTE_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << UARTE_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: UARTE_TXD_MAXCNT */
+/* Description: Maximum number of bytes in transmit buffer */
+
+/* Bits 9..0 : Maximum number of bytes in transmit buffer */
+#define UARTE_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define UARTE_TXD_MAXCNT_MAXCNT_Msk (0x3FFUL << UARTE_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: UARTE_TXD_AMOUNT */
+/* Description: Number of bytes transferred in the last transaction */
+
+/* Bits 9..0 : Number of bytes transferred in the last transaction */
+#define UARTE_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define UARTE_TXD_AMOUNT_AMOUNT_Msk (0x3FFUL << UARTE_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+/* Register: UARTE_CONFIG */
+/* Description: Configuration of parity and hardware flow control */
+
+/* Bit 4 : Stop bits */
+#define UARTE_CONFIG_STOP_Pos (4UL) /*!< Position of STOP field. */
+#define UARTE_CONFIG_STOP_Msk (0x1UL << UARTE_CONFIG_STOP_Pos) /*!< Bit mask of STOP field. */
+#define UARTE_CONFIG_STOP_One (0UL) /*!< One stop bit */
+#define UARTE_CONFIG_STOP_Two (1UL) /*!< Two stop bits */
+
+/* Bits 3..1 : Parity */
+#define UARTE_CONFIG_PARITY_Pos (1UL) /*!< Position of PARITY field. */
+#define UARTE_CONFIG_PARITY_Msk (0x7UL << UARTE_CONFIG_PARITY_Pos) /*!< Bit mask of PARITY field. */
+#define UARTE_CONFIG_PARITY_Excluded (0x0UL) /*!< Exclude parity bit */
+#define UARTE_CONFIG_PARITY_Included (0x7UL) /*!< Include even parity bit */
+
+/* Bit 0 : Hardware flow control */
+#define UARTE_CONFIG_HWFC_Pos (0UL) /*!< Position of HWFC field. */
+#define UARTE_CONFIG_HWFC_Msk (0x1UL << UARTE_CONFIG_HWFC_Pos) /*!< Bit mask of HWFC field. */
+#define UARTE_CONFIG_HWFC_Disabled (0UL) /*!< Disabled */
+#define UARTE_CONFIG_HWFC_Enabled (1UL) /*!< Enabled */
+
+
+/* Peripheral: UICR */
+/* Description: User information configuration registers */
+
+/* Register: UICR_NRFFW */
+/* Description: Description collection: Reserved for Nordic firmware design */
+
+/* Bits 31..0 : Reserved for Nordic firmware design */
+#define UICR_NRFFW_NRFFW_Pos (0UL) /*!< Position of NRFFW field. */
+#define UICR_NRFFW_NRFFW_Msk (0xFFFFFFFFUL << UICR_NRFFW_NRFFW_Pos) /*!< Bit mask of NRFFW field. */
+
+/* Register: UICR_NRFHW */
+/* Description: Description collection: Reserved for Nordic hardware design */
+
+/* Bits 31..0 : Reserved for Nordic hardware design */
+#define UICR_NRFHW_NRFHW_Pos (0UL) /*!< Position of NRFHW field. */
+#define UICR_NRFHW_NRFHW_Msk (0xFFFFFFFFUL << UICR_NRFHW_NRFHW_Pos) /*!< Bit mask of NRFHW field. */
+
+/* Register: UICR_CUSTOMER */
+/* Description: Description collection: Reserved for customer */
+
+/* Bits 31..0 : Reserved for customer */
+#define UICR_CUSTOMER_CUSTOMER_Pos (0UL) /*!< Position of CUSTOMER field. */
+#define UICR_CUSTOMER_CUSTOMER_Msk (0xFFFFFFFFUL << UICR_CUSTOMER_CUSTOMER_Pos) /*!< Bit mask of CUSTOMER field. */
+
+/* Register: UICR_PSELRESET */
+/* Description: Description collection: Mapping of the nRESET function (see POWER chapter for details) */
+
+/* Bit 31 : Connection */
+#define UICR_PSELRESET_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define UICR_PSELRESET_CONNECT_Msk (0x1UL << UICR_PSELRESET_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define UICR_PSELRESET_CONNECT_Connected (0UL) /*!< Connect */
+#define UICR_PSELRESET_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bits 4..0 : GPIO pin number onto which nRESET is exposed */
+#define UICR_PSELRESET_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define UICR_PSELRESET_PIN_Msk (0x1FUL << UICR_PSELRESET_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: UICR_APPROTECT */
+/* Description: Access port protection */
+
+/* Bits 7..0 : Enable or disable access port protection. */
+#define UICR_APPROTECT_PALL_Pos (0UL) /*!< Position of PALL field. */
+#define UICR_APPROTECT_PALL_Msk (0xFFUL << UICR_APPROTECT_PALL_Pos) /*!< Bit mask of PALL field. */
+#define UICR_APPROTECT_PALL_Enabled (0x00UL) /*!< Enable */
+#define UICR_APPROTECT_PALL_Disabled (0xFFUL) /*!< Disable */
+
+
+/* Peripheral: WDT */
+/* Description: Watchdog Timer */
+
+/* Register: WDT_TASKS_START */
+/* Description: Start the watchdog */
+
+/* Bit 0 : Start the watchdog */
+#define WDT_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */
+#define WDT_TASKS_START_TASKS_START_Msk (0x1UL << WDT_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */
+#define WDT_TASKS_START_TASKS_START_Trigger (1UL) /*!< Trigger task */
+
+/* Register: WDT_EVENTS_TIMEOUT */
+/* Description: Watchdog timeout */
+
+/* Bit 0 : Watchdog timeout */
+#define WDT_EVENTS_TIMEOUT_EVENTS_TIMEOUT_Pos (0UL) /*!< Position of EVENTS_TIMEOUT field. */
+#define WDT_EVENTS_TIMEOUT_EVENTS_TIMEOUT_Msk (0x1UL << WDT_EVENTS_TIMEOUT_EVENTS_TIMEOUT_Pos) /*!< Bit mask of EVENTS_TIMEOUT field. */
+#define WDT_EVENTS_TIMEOUT_EVENTS_TIMEOUT_NotGenerated (0UL) /*!< Event not generated */
+#define WDT_EVENTS_TIMEOUT_EVENTS_TIMEOUT_Generated (1UL) /*!< Event generated */
+
+/* Register: WDT_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 0 : Write '1' to enable interrupt for event TIMEOUT */
+#define WDT_INTENSET_TIMEOUT_Pos (0UL) /*!< Position of TIMEOUT field. */
+#define WDT_INTENSET_TIMEOUT_Msk (0x1UL << WDT_INTENSET_TIMEOUT_Pos) /*!< Bit mask of TIMEOUT field. */
+#define WDT_INTENSET_TIMEOUT_Disabled (0UL) /*!< Read: Disabled */
+#define WDT_INTENSET_TIMEOUT_Enabled (1UL) /*!< Read: Enabled */
+#define WDT_INTENSET_TIMEOUT_Set (1UL) /*!< Enable */
+
+/* Register: WDT_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 0 : Write '1' to disable interrupt for event TIMEOUT */
+#define WDT_INTENCLR_TIMEOUT_Pos (0UL) /*!< Position of TIMEOUT field. */
+#define WDT_INTENCLR_TIMEOUT_Msk (0x1UL << WDT_INTENCLR_TIMEOUT_Pos) /*!< Bit mask of TIMEOUT field. */
+#define WDT_INTENCLR_TIMEOUT_Disabled (0UL) /*!< Read: Disabled */
+#define WDT_INTENCLR_TIMEOUT_Enabled (1UL) /*!< Read: Enabled */
+#define WDT_INTENCLR_TIMEOUT_Clear (1UL) /*!< Disable */
+
+/* Register: WDT_RUNSTATUS */
+/* Description: Run status */
+
+/* Bit 0 : Indicates whether or not the watchdog is running */
+#define WDT_RUNSTATUS_RUNSTATUS_Pos (0UL) /*!< Position of RUNSTATUS field. */
+#define WDT_RUNSTATUS_RUNSTATUS_Msk (0x1UL << WDT_RUNSTATUS_RUNSTATUS_Pos) /*!< Bit mask of RUNSTATUS field. */
+#define WDT_RUNSTATUS_RUNSTATUS_NotRunning (0UL) /*!< Watchdog not running */
+#define WDT_RUNSTATUS_RUNSTATUS_Running (1UL) /*!< Watchdog is running */
+
+/* Register: WDT_REQSTATUS */
+/* Description: Request status */
+
+/* Bit 7 : Request status for RR[7] register */
+#define WDT_REQSTATUS_RR7_Pos (7UL) /*!< Position of RR7 field. */
+#define WDT_REQSTATUS_RR7_Msk (0x1UL << WDT_REQSTATUS_RR7_Pos) /*!< Bit mask of RR7 field. */
+#define WDT_REQSTATUS_RR7_DisabledOrRequested (0UL) /*!< RR[7] register is not enabled, or are already requesting reload */
+#define WDT_REQSTATUS_RR7_EnabledAndUnrequested (1UL) /*!< RR[7] register is enabled, and are not yet requesting reload */
+
+/* Bit 6 : Request status for RR[6] register */
+#define WDT_REQSTATUS_RR6_Pos (6UL) /*!< Position of RR6 field. */
+#define WDT_REQSTATUS_RR6_Msk (0x1UL << WDT_REQSTATUS_RR6_Pos) /*!< Bit mask of RR6 field. */
+#define WDT_REQSTATUS_RR6_DisabledOrRequested (0UL) /*!< RR[6] register is not enabled, or are already requesting reload */
+#define WDT_REQSTATUS_RR6_EnabledAndUnrequested (1UL) /*!< RR[6] register is enabled, and are not yet requesting reload */
+
+/* Bit 5 : Request status for RR[5] register */
+#define WDT_REQSTATUS_RR5_Pos (5UL) /*!< Position of RR5 field. */
+#define WDT_REQSTATUS_RR5_Msk (0x1UL << WDT_REQSTATUS_RR5_Pos) /*!< Bit mask of RR5 field. */
+#define WDT_REQSTATUS_RR5_DisabledOrRequested (0UL) /*!< RR[5] register is not enabled, or are already requesting reload */
+#define WDT_REQSTATUS_RR5_EnabledAndUnrequested (1UL) /*!< RR[5] register is enabled, and are not yet requesting reload */
+
+/* Bit 4 : Request status for RR[4] register */
+#define WDT_REQSTATUS_RR4_Pos (4UL) /*!< Position of RR4 field. */
+#define WDT_REQSTATUS_RR4_Msk (0x1UL << WDT_REQSTATUS_RR4_Pos) /*!< Bit mask of RR4 field. */
+#define WDT_REQSTATUS_RR4_DisabledOrRequested (0UL) /*!< RR[4] register is not enabled, or are already requesting reload */
+#define WDT_REQSTATUS_RR4_EnabledAndUnrequested (1UL) /*!< RR[4] register is enabled, and are not yet requesting reload */
+
+/* Bit 3 : Request status for RR[3] register */
+#define WDT_REQSTATUS_RR3_Pos (3UL) /*!< Position of RR3 field. */
+#define WDT_REQSTATUS_RR3_Msk (0x1UL << WDT_REQSTATUS_RR3_Pos) /*!< Bit mask of RR3 field. */
+#define WDT_REQSTATUS_RR3_DisabledOrRequested (0UL) /*!< RR[3] register is not enabled, or are already requesting reload */
+#define WDT_REQSTATUS_RR3_EnabledAndUnrequested (1UL) /*!< RR[3] register is enabled, and are not yet requesting reload */
+
+/* Bit 2 : Request status for RR[2] register */
+#define WDT_REQSTATUS_RR2_Pos (2UL) /*!< Position of RR2 field. */
+#define WDT_REQSTATUS_RR2_Msk (0x1UL << WDT_REQSTATUS_RR2_Pos) /*!< Bit mask of RR2 field. */
+#define WDT_REQSTATUS_RR2_DisabledOrRequested (0UL) /*!< RR[2] register is not enabled, or are already requesting reload */
+#define WDT_REQSTATUS_RR2_EnabledAndUnrequested (1UL) /*!< RR[2] register is enabled, and are not yet requesting reload */
+
+/* Bit 1 : Request status for RR[1] register */
+#define WDT_REQSTATUS_RR1_Pos (1UL) /*!< Position of RR1 field. */
+#define WDT_REQSTATUS_RR1_Msk (0x1UL << WDT_REQSTATUS_RR1_Pos) /*!< Bit mask of RR1 field. */
+#define WDT_REQSTATUS_RR1_DisabledOrRequested (0UL) /*!< RR[1] register is not enabled, or are already requesting reload */
+#define WDT_REQSTATUS_RR1_EnabledAndUnrequested (1UL) /*!< RR[1] register is enabled, and are not yet requesting reload */
+
+/* Bit 0 : Request status for RR[0] register */
+#define WDT_REQSTATUS_RR0_Pos (0UL) /*!< Position of RR0 field. */
+#define WDT_REQSTATUS_RR0_Msk (0x1UL << WDT_REQSTATUS_RR0_Pos) /*!< Bit mask of RR0 field. */
+#define WDT_REQSTATUS_RR0_DisabledOrRequested (0UL) /*!< RR[0] register is not enabled, or are already requesting reload */
+#define WDT_REQSTATUS_RR0_EnabledAndUnrequested (1UL) /*!< RR[0] register is enabled, and are not yet requesting reload */
+
+/* Register: WDT_CRV */
+/* Description: Counter reload value */
+
+/* Bits 31..0 : Counter reload value in number of cycles of the 32.768 kHz clock */
+#define WDT_CRV_CRV_Pos (0UL) /*!< Position of CRV field. */
+#define WDT_CRV_CRV_Msk (0xFFFFFFFFUL << WDT_CRV_CRV_Pos) /*!< Bit mask of CRV field. */
+
+/* Register: WDT_RREN */
+/* Description: Enable register for reload request registers */
+
+/* Bit 7 : Enable or disable RR[7] register */
+#define WDT_RREN_RR7_Pos (7UL) /*!< Position of RR7 field. */
+#define WDT_RREN_RR7_Msk (0x1UL << WDT_RREN_RR7_Pos) /*!< Bit mask of RR7 field. */
+#define WDT_RREN_RR7_Disabled (0UL) /*!< Disable RR[7] register */
+#define WDT_RREN_RR7_Enabled (1UL) /*!< Enable RR[7] register */
+
+/* Bit 6 : Enable or disable RR[6] register */
+#define WDT_RREN_RR6_Pos (6UL) /*!< Position of RR6 field. */
+#define WDT_RREN_RR6_Msk (0x1UL << WDT_RREN_RR6_Pos) /*!< Bit mask of RR6 field. */
+#define WDT_RREN_RR6_Disabled (0UL) /*!< Disable RR[6] register */
+#define WDT_RREN_RR6_Enabled (1UL) /*!< Enable RR[6] register */
+
+/* Bit 5 : Enable or disable RR[5] register */
+#define WDT_RREN_RR5_Pos (5UL) /*!< Position of RR5 field. */
+#define WDT_RREN_RR5_Msk (0x1UL << WDT_RREN_RR5_Pos) /*!< Bit mask of RR5 field. */
+#define WDT_RREN_RR5_Disabled (0UL) /*!< Disable RR[5] register */
+#define WDT_RREN_RR5_Enabled (1UL) /*!< Enable RR[5] register */
+
+/* Bit 4 : Enable or disable RR[4] register */
+#define WDT_RREN_RR4_Pos (4UL) /*!< Position of RR4 field. */
+#define WDT_RREN_RR4_Msk (0x1UL << WDT_RREN_RR4_Pos) /*!< Bit mask of RR4 field. */
+#define WDT_RREN_RR4_Disabled (0UL) /*!< Disable RR[4] register */
+#define WDT_RREN_RR4_Enabled (1UL) /*!< Enable RR[4] register */
+
+/* Bit 3 : Enable or disable RR[3] register */
+#define WDT_RREN_RR3_Pos (3UL) /*!< Position of RR3 field. */
+#define WDT_RREN_RR3_Msk (0x1UL << WDT_RREN_RR3_Pos) /*!< Bit mask of RR3 field. */
+#define WDT_RREN_RR3_Disabled (0UL) /*!< Disable RR[3] register */
+#define WDT_RREN_RR3_Enabled (1UL) /*!< Enable RR[3] register */
+
+/* Bit 2 : Enable or disable RR[2] register */
+#define WDT_RREN_RR2_Pos (2UL) /*!< Position of RR2 field. */
+#define WDT_RREN_RR2_Msk (0x1UL << WDT_RREN_RR2_Pos) /*!< Bit mask of RR2 field. */
+#define WDT_RREN_RR2_Disabled (0UL) /*!< Disable RR[2] register */
+#define WDT_RREN_RR2_Enabled (1UL) /*!< Enable RR[2] register */
+
+/* Bit 1 : Enable or disable RR[1] register */
+#define WDT_RREN_RR1_Pos (1UL) /*!< Position of RR1 field. */
+#define WDT_RREN_RR1_Msk (0x1UL << WDT_RREN_RR1_Pos) /*!< Bit mask of RR1 field. */
+#define WDT_RREN_RR1_Disabled (0UL) /*!< Disable RR[1] register */
+#define WDT_RREN_RR1_Enabled (1UL) /*!< Enable RR[1] register */
+
+/* Bit 0 : Enable or disable RR[0] register */
+#define WDT_RREN_RR0_Pos (0UL) /*!< Position of RR0 field. */
+#define WDT_RREN_RR0_Msk (0x1UL << WDT_RREN_RR0_Pos) /*!< Bit mask of RR0 field. */
+#define WDT_RREN_RR0_Disabled (0UL) /*!< Disable RR[0] register */
+#define WDT_RREN_RR0_Enabled (1UL) /*!< Enable RR[0] register */
+
+/* Register: WDT_CONFIG */
+/* Description: Configuration register */
+
+/* Bit 3 : Configure the watchdog to either be paused, or kept running, while the CPU is halted by the debugger */
+#define WDT_CONFIG_HALT_Pos (3UL) /*!< Position of HALT field. */
+#define WDT_CONFIG_HALT_Msk (0x1UL << WDT_CONFIG_HALT_Pos) /*!< Bit mask of HALT field. */
+#define WDT_CONFIG_HALT_Pause (0UL) /*!< Pause watchdog while the CPU is halted by the debugger */
+#define WDT_CONFIG_HALT_Run (1UL) /*!< Keep the watchdog running while the CPU is halted by the debugger */
+
+/* Bit 0 : Configure the watchdog to either be paused, or kept running, while the CPU is sleeping */
+#define WDT_CONFIG_SLEEP_Pos (0UL) /*!< Position of SLEEP field. */
+#define WDT_CONFIG_SLEEP_Msk (0x1UL << WDT_CONFIG_SLEEP_Pos) /*!< Bit mask of SLEEP field. */
+#define WDT_CONFIG_SLEEP_Pause (0UL) /*!< Pause watchdog while the CPU is sleeping */
+#define WDT_CONFIG_SLEEP_Run (1UL) /*!< Keep the watchdog running while the CPU is sleeping */
+
+/* Register: WDT_RR */
+/* Description: Description collection: Reload request n */
+
+/* Bits 31..0 : Reload request register */
+#define WDT_RR_RR_Pos (0UL) /*!< Position of RR field. */
+#define WDT_RR_RR_Msk (0xFFFFFFFFUL << WDT_RR_RR_Pos) /*!< Bit mask of RR field. */
+#define WDT_RR_RR_Reload (0x6E524635UL) /*!< Value to request a reload of the watchdog timer */
+
+
+/*lint --flb "Leave library region" */
+#endif
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf52805_peripherals.h b/third_party/NordicSemiconductor/nrfx/mdk/nrf52805_peripherals.h
new file mode 100644
index 0000000..5c5beec
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf52805_peripherals.h
@@ -0,0 +1,209 @@
+/*
+
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+
+2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ contributors may be used to endorse or promote products derived from this
+ software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
+
+*/
+
+#ifndef _NRF52805_PERIPHERALS_H
+#define _NRF52805_PERIPHERALS_H
+
+
+/* Clock Peripheral */
+#define CLOCK_PRESENT
+#define CLOCK_COUNT 1
+
+/* Power Peripheral */
+#define POWER_PRESENT
+#define POWER_COUNT 1
+
+#define POWER_FEATURE_RAM_REGISTERS_PRESENT
+#define POWER_FEATURE_RAM_REGISTERS_COUNT 3
+
+/* Systick timer */
+#define SYSTICK_PRESENT
+#define SYSTICK_COUNT 1
+
+/* Software Interrupts */
+#define SWI_PRESENT
+#define SWI_COUNT 6
+
+/* GPIO */
+#define GPIO_PRESENT
+#define GPIO_COUNT 1
+
+#define P0_PIN_NUM 32
+
+/* MPU and BPROT */
+#define BPROT_PRESENT
+
+#define BPROT_REGIONS_SIZE 4096
+#define BPROT_REGIONS_NUM 48
+
+/* Radio */
+#define RADIO_PRESENT
+#define RADIO_COUNT 1
+
+#define RADIO_EASYDMA_MAXCNT_SIZE 8
+
+/* Accelerated Address Resolver */
+#define AAR_PRESENT
+#define AAR_COUNT 1
+
+#define AAR_MAX_IRK_NUM 16
+
+/* AES Electronic CodeBook mode encryption */
+#define ECB_PRESENT
+#define ECB_COUNT 1
+
+/* AES CCM mode encryption */
+#define CCM_PRESENT
+#define CCM_COUNT 1
+
+/* Peripheral to Peripheral Interconnect */
+#define PPI_PRESENT
+#define PPI_COUNT 1
+
+#define PPI_CH_NUM 10
+#define PPI_FIXED_CH_NUM 12
+#define PPI_GROUP_NUM 6
+#define PPI_FEATURE_FORKS_PRESENT
+
+/* Event Generator Unit */
+#define EGU_PRESENT
+#define EGU_COUNT 2
+
+#define EGU0_CH_NUM 16
+#define EGU1_CH_NUM 16
+
+/* Timer/Counter */
+#define TIMER_PRESENT
+#define TIMER_COUNT 3
+
+#define TIMER0_MAX_SIZE 32
+#define TIMER1_MAX_SIZE 32
+#define TIMER2_MAX_SIZE 32
+
+#define TIMER0_CC_NUM 4
+#define TIMER1_CC_NUM 4
+#define TIMER2_CC_NUM 4
+
+/* Real Time Counter */
+#define RTC_PRESENT
+#define RTC_COUNT 2
+
+#define RTC0_CC_NUM 3
+#define RTC1_CC_NUM 4
+
+/* RNG */
+#define RNG_PRESENT
+#define RNG_COUNT 1
+
+/* Watchdog Timer */
+#define WDT_PRESENT
+#define WDT_COUNT 1
+
+/* Temperature Sensor */
+#define TEMP_PRESENT
+#define TEMP_COUNT 1
+
+/* Serial Peripheral Interface Master */
+#define SPI_PRESENT
+#define SPI_COUNT 2
+
+/* Serial Peripheral Interface Master with DMA */
+#define SPIM_PRESENT
+#define SPIM_COUNT 2
+
+#define SPIM0_MAX_DATARATE 8
+#define SPIM1_MAX_DATARATE 8
+
+#define SPIM0_FEATURE_HARDWARE_CSN_PRESENT 0
+#define SPIM1_FEATURE_HARDWARE_CSN_PRESENT 0
+
+#define SPIM0_FEATURE_DCX_PRESENT 0
+#define SPIM1_FEATURE_DCX_PRESENT 0
+
+#define SPIM0_FEATURE_RXDELAY_PRESENT 0
+#define SPIM1_FEATURE_RXDELAY_PRESENT 0
+
+#define SPIM0_EASYDMA_MAXCNT_SIZE 14
+#define SPIM1_EASYDMA_MAXCNT_SIZE 14
+
+/* Serial Peripheral Interface Slave with DMA*/
+#define SPIS_PRESENT
+#define SPIS_COUNT 2
+
+#define SPIS0_EASYDMA_MAXCNT_SIZE 14
+#define SPIS1_EASYDMA_MAXCNT_SIZE 14
+
+/* Two Wire Interface Master */
+#define TWI_PRESENT
+#define TWI_COUNT 1
+
+/* Two Wire Interface Master with DMA */
+#define TWIM_PRESENT
+#define TWIM_COUNT 1
+
+#define TWIM0_EASYDMA_MAXCNT_SIZE 14
+
+/* Two Wire Interface Slave with DMA */
+#define TWIS_PRESENT
+#define TWIS_COUNT 1
+
+#define TWIS0_EASYDMA_MAXCNT_SIZE 14
+
+/* Universal Asynchronous Receiver-Transmitter */
+#define UART_PRESENT
+#define UART_COUNT 1
+
+/* Universal Asynchronous Receiver-Transmitter with DMA */
+#define UARTE_PRESENT
+#define UARTE_COUNT 1
+
+#define UARTE0_EASYDMA_MAXCNT_SIZE 14
+
+/* Successive Approximation Analog to Digital Converter */
+#define SAADC_PRESENT
+#define SAADC_COUNT 1
+
+#define SAADC_EASYDMA_MAXCNT_SIZE 15
+
+#define SAADC_CH_NUM 8
+
+/* GPIO Tasks and Events */
+#define GPIOTE_PRESENT
+#define GPIOTE_COUNT 1
+
+#define GPIOTE_CH_NUM 8
+
+#define GPIOTE_FEATURE_SET_PRESENT
+#define GPIOTE_FEATURE_CLR_PRESENT
+
+
+#endif // _NRF52805_PERIPHERALS_H
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf52805_xxaa.ld b/third_party/NordicSemiconductor/nrfx/mdk/nrf52805_xxaa.ld
new file mode 100644
index 0000000..b8ef436
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf52805_xxaa.ld
@@ -0,0 +1,13 @@
+/* Linker script to configure memory regions. */
+
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lnosys)
+
+MEMORY
+{
+ FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x30000
+ RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x6000
+}
+
+
+INCLUDE "nrf_common.ld"
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf52810.h b/third_party/NordicSemiconductor/nrfx/mdk/nrf52810.h
index 5f91e3b..289a23c 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/nrf52810.h
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf52810.h
@@ -30,10 +30,10 @@
* @file nrf52810.h
* @brief CMSIS HeaderFile
* @version 1
- * @date 17. January 2019
- * @note Generated by SVDConv V3.3.18 on Thursday, 17.01.2019 17:25:39
+ * @date 23. August 2019
+ * @note Generated by SVDConv V3.3.25 on Friday, 23.08.2019 12:15:13
* from File 'nrf52810.svd',
- * last modified on Thursday, 17.01.2019 16:25:35
+ * last modified on Friday, 23.08.2019 10:15:08
*/
@@ -122,8 +122,8 @@
#define __VTOR_PRESENT 1 /*!< Set to 1 if CPU supports Vector Table Offset Register */
#define __NVIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels */
#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
-#define __MPU_PRESENT 1 /*!< MPU present or not */
-#define __FPU_PRESENT 0 /*!< FPU present or not */
+#define __MPU_PRESENT 1 /*!< MPU present */
+#define __FPU_PRESENT 0 /*!< FPU present */
/** @} */ /* End of group Configuration_of_CMSIS */
@@ -591,12 +591,13 @@
typedef struct { /*!< (@ 0x10001000) UICR Structure */
__IM uint32_t RESERVED[5];
- __IOM uint32_t NRFFW[15]; /*!< (@ 0x00000014) Description collection: Reserved for Nordic firmware
+ __IOM uint32_t NRFFW[13]; /*!< (@ 0x00000014) Description collection: Reserved for Nordic firmware
design */
+ __IM uint32_t RESERVED1[2];
__IOM uint32_t NRFHW[12]; /*!< (@ 0x00000050) Description collection: Reserved for Nordic hardware
design */
__IOM uint32_t CUSTOMER[32]; /*!< (@ 0x00000080) Description collection: Reserved for customer */
- __IM uint32_t RESERVED1[64];
+ __IM uint32_t RESERVED2[64];
__IOM uint32_t PSELRESET[2]; /*!< (@ 0x00000200) Description collection: Mapping of the nRESET
function (see POWER chapter for details) */
__IOM uint32_t APPROTECT; /*!< (@ 0x00000208) Access port protection */
@@ -677,8 +678,8 @@
typedef struct { /*!< (@ 0x40000000) POWER Structure */
__IM uint32_t RESERVED[30];
- __OM uint32_t TASKS_CONSTLAT; /*!< (@ 0x00000078) Enable constant latency mode */
- __OM uint32_t TASKS_LOWPWR; /*!< (@ 0x0000007C) Enable low power mode (variable latency) */
+ __OM uint32_t TASKS_CONSTLAT; /*!< (@ 0x00000078) Enable Constant Latency mode */
+ __OM uint32_t TASKS_LOWPWR; /*!< (@ 0x0000007C) Enable Low-power mode (variable latency) */
__IM uint32_t RESERVED1[34];
__IOM uint32_t EVENTS_POFWARN; /*!< (@ 0x00000108) Power failure warning */
__IM uint32_t RESERVED2[2];
@@ -1979,7 +1980,7 @@
#pragma pop
#elif defined (__ICCARM__)
/* leave anonymous unions enabled */
-#elif (__ARMCC_VERSION >= 6010050)
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#pragma clang diagnostic pop
#elif defined (__GNUC__)
/* anonymous unions are enabled by default */
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf52810.svd b/third_party/NordicSemiconductor/nrfx/mdk/nrf52810.svd
index ad9d038..ef83b7e 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/nrf52810.svd
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf52810.svd
@@ -220,6 +220,16 @@
<value>0x52810</value>
</enumeratedValue>
<enumeratedValue>
+ <name>N52811</name>
+ <description>nRF52811</description>
+ <value>0x52811</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>N52832</name>
+ <description>nRF52832</description>
+ <value>0x52832</value>
+ </enumeratedValue>
+ <enumeratedValue>
<name>Unspecified</name>
<description>Unspecified</description>
<value>0xFFFFFFFF</value>
@@ -314,6 +324,11 @@
<value>0x2003</value>
</enumeratedValue>
<enumeratedValue>
+ <name>CA</name>
+ <description>CAxx - WLCSP</description>
+ <value>0x2004</value>
+ </enumeratedValue>
+ <enumeratedValue>
<name>Unspecified</name>
<description>Unspecified</description>
<value>0xFFFFFFFF</value>
@@ -654,7 +669,7 @@
<size>0x20</size>
<registers>
<register>
- <dim>0xF</dim>
+ <dim>0xD</dim>
<dimIncrement>0x4</dimIncrement>
<name>NRFFW[%s]</name>
<description>Description collection: Reserved for Nordic firmware design</description>
@@ -2467,13 +2482,13 @@
<registers>
<register>
<name>TASKS_CONSTLAT</name>
- <description>Enable constant latency mode</description>
+ <description>Enable Constant Latency mode</description>
<addressOffset>0x078</addressOffset>
<access>write-only</access>
<fields>
<field>
<name>TASKS_CONSTLAT</name>
- <description>Enable constant latency mode</description>
+ <description>Enable Constant Latency mode</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
@@ -2488,13 +2503,13 @@
</register>
<register>
<name>TASKS_LOWPWR</name>
- <description>Enable low power mode (variable latency)</description>
+ <description>Enable Low-power mode (variable latency)</description>
<addressOffset>0x07C</addressOffset>
<access>write-only</access>
<fields>
<field>
<name>TASKS_LOWPWR</name>
- <description>Enable low power mode (variable latency)</description>
+ <description>Enable Low-power mode (variable latency)</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf52810_bitfields.h b/third_party/NordicSemiconductor/nrfx/mdk/nrf52810_bitfields.h
index fcd2fc3..f47207e 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/nrf52810_bitfields.h
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf52810_bitfields.h
@@ -1707,6 +1707,8 @@
#define FICR_INFO_PART_PART_Pos (0UL) /*!< Position of PART field. */
#define FICR_INFO_PART_PART_Msk (0xFFFFFFFFUL << FICR_INFO_PART_PART_Pos) /*!< Bit mask of PART field. */
#define FICR_INFO_PART_PART_N52810 (0x52810UL) /*!< nRF52810 */
+#define FICR_INFO_PART_PART_N52811 (0x52811UL) /*!< nRF52811 */
+#define FICR_INFO_PART_PART_N52832 (0x52832UL) /*!< nRF52832 */
#define FICR_INFO_PART_PART_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */
/* Register: FICR_INFO_VARIANT */
@@ -1733,6 +1735,7 @@
#define FICR_INFO_PACKAGE_PACKAGE_Msk (0xFFFFFFFFUL << FICR_INFO_PACKAGE_PACKAGE_Pos) /*!< Bit mask of PACKAGE field. */
#define FICR_INFO_PACKAGE_PACKAGE_QF (0x2000UL) /*!< QFxx - 48-pin QFN */
#define FICR_INFO_PACKAGE_PACKAGE_QC (0x2003UL) /*!< QCxx - 32-pin QFN */
+#define FICR_INFO_PACKAGE_PACKAGE_CA (0x2004UL) /*!< CAxx - WLCSP */
#define FICR_INFO_PACKAGE_PACKAGE_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */
/* Register: FICR_INFO_RAM */
@@ -4111,17 +4114,17 @@
/* Description: Power control */
/* Register: POWER_TASKS_CONSTLAT */
-/* Description: Enable constant latency mode */
+/* Description: Enable Constant Latency mode */
-/* Bit 0 : Enable constant latency mode */
+/* Bit 0 : Enable Constant Latency mode */
#define POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Pos (0UL) /*!< Position of TASKS_CONSTLAT field. */
#define POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Msk (0x1UL << POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Pos) /*!< Bit mask of TASKS_CONSTLAT field. */
#define POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Trigger (1UL) /*!< Trigger task */
/* Register: POWER_TASKS_LOWPWR */
-/* Description: Enable low power mode (variable latency) */
+/* Description: Enable Low-power mode (variable latency) */
-/* Bit 0 : Enable low power mode (variable latency) */
+/* Bit 0 : Enable Low-power mode (variable latency) */
#define POWER_TASKS_LOWPWR_TASKS_LOWPWR_Pos (0UL) /*!< Position of TASKS_LOWPWR field. */
#define POWER_TASKS_LOWPWR_TASKS_LOWPWR_Msk (0x1UL << POWER_TASKS_LOWPWR_TASKS_LOWPWR_Pos) /*!< Bit mask of TASKS_LOWPWR field. */
#define POWER_TASKS_LOWPWR_TASKS_LOWPWR_Trigger (1UL) /*!< Trigger task */
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf52810_name_change.h b/third_party/NordicSemiconductor/nrfx/mdk/nrf52810_name_change.h
index 6f7f636..3cc56d3 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/nrf52810_name_change.h
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf52810_name_change.h
@@ -52,4 +52,4 @@
/*lint --flb "Leave library region" */
-#endif /* NRF52810_NAME_CHANGE_H */
\ No newline at end of file
+#endif /* NRF52810_NAME_CHANGE_H */
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf52811.h b/third_party/NordicSemiconductor/nrfx/mdk/nrf52811.h
index 641c447..6df51f9 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/nrf52811.h
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf52811.h
@@ -30,10 +30,10 @@
* @file nrf52811.h
* @brief CMSIS HeaderFile
* @version 1
- * @date 17. January 2019
- * @note Generated by SVDConv V3.3.18 on Thursday, 17.01.2019 17:25:39
+ * @date 23. August 2019
+ * @note Generated by SVDConv V3.3.25 on Friday, 23.08.2019 12:15:13
* from File 'nrf52811.svd',
- * last modified on Thursday, 17.01.2019 16:25:35
+ * last modified on Friday, 23.08.2019 10:15:08
*/
@@ -122,8 +122,8 @@
#define __VTOR_PRESENT 1 /*!< Set to 1 if CPU supports Vector Table Offset Register */
#define __NVIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels */
#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
-#define __MPU_PRESENT 1 /*!< MPU present or not */
-#define __FPU_PRESENT 0 /*!< FPU present or not */
+#define __MPU_PRESENT 1 /*!< MPU present */
+#define __FPU_PRESENT 0 /*!< FPU present */
/** @} */ /* End of group Configuration_of_CMSIS */
@@ -231,6 +231,25 @@
/**
+ * @brief RADIO_PSEL [PSEL] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t DFEGPIO[8]; /*!< (@ 0x00000000) Description collection: Pin select for DFE pin
+ n */
+} RADIO_PSEL_Type; /*!< Size = 32 (0x20) */
+
+
+/**
+ * @brief RADIO_DFEPACKET [DFEPACKET] (DFE packet EasyDMA channel)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) Data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of buffer words to transfer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of samples transferred in the last transaction */
+} RADIO_DFEPACKET_Type; /*!< Size = 12 (0xc) */
+
+
+/**
* @brief UART_PSEL [PSEL] (Unspecified)
*/
typedef struct {
@@ -591,12 +610,13 @@
typedef struct { /*!< (@ 0x10001000) UICR Structure */
__IM uint32_t RESERVED[5];
- __IOM uint32_t NRFFW[15]; /*!< (@ 0x00000014) Description collection: Reserved for Nordic firmware
+ __IOM uint32_t NRFFW[13]; /*!< (@ 0x00000014) Description collection: Reserved for Nordic firmware
design */
+ __IM uint32_t RESERVED1[2];
__IOM uint32_t NRFHW[12]; /*!< (@ 0x00000050) Description collection: Reserved for Nordic hardware
design */
__IOM uint32_t CUSTOMER[32]; /*!< (@ 0x00000080) Description collection: Reserved for customer */
- __IM uint32_t RESERVED1[64];
+ __IM uint32_t RESERVED2[64];
__IOM uint32_t PSELRESET[2]; /*!< (@ 0x00000200) Description collection: Mapping of the nRESET
function (see POWER chapter for details) */
__IOM uint32_t APPROTECT; /*!< (@ 0x00000208) Access port protection */
@@ -677,8 +697,8 @@
typedef struct { /*!< (@ 0x40000000) POWER Structure */
__IM uint32_t RESERVED[30];
- __OM uint32_t TASKS_CONSTLAT; /*!< (@ 0x00000078) Enable constant latency mode */
- __OM uint32_t TASKS_LOWPWR; /*!< (@ 0x0000007C) Enable low power mode (variable latency) */
+ __OM uint32_t TASKS_CONSTLAT; /*!< (@ 0x00000078) Enable Constant Latency mode */
+ __OM uint32_t TASKS_LOWPWR; /*!< (@ 0x0000007C) Enable Low-power mode (variable latency) */
__IM uint32_t RESERVED1[34];
__IOM uint32_t EVENTS_POFWARN; /*!< (@ 0x00000108) Power failure warning */
__IM uint32_t RESERVED2[2];
@@ -779,7 +799,7 @@
__IOM uint32_t EVENTS_FRAMESTART; /*!< (@ 0x00000138) IEEE 802.15.4 length field received */
__IOM uint32_t EVENTS_EDEND; /*!< (@ 0x0000013C) Sampling of energy detection complete. A new
ED sample is ready for readout from the
- RADIO.EDSAMPLE register. */
+ RADIO.EDSAMPLE register */
__IOM uint32_t EVENTS_EDSTOPPED; /*!< (@ 0x00000140) The sampling of energy detection has stopped */
__IOM uint32_t EVENTS_CCAIDLE; /*!< (@ 0x00000144) Wireless medium in idle - clear to send */
__IOM uint32_t EVENTS_CCABUSY; /*!< (@ 0x00000148) Wireless medium busy - do not send */
@@ -792,10 +812,10 @@
RX path */
__IOM uint32_t EVENTS_MHRMATCH; /*!< (@ 0x0000015C) MAC header match found */
__IM uint32_t RESERVED3[3];
- __IOM uint32_t EVENTS_PHYEND; /*!< (@ 0x0000016C) Generated in Ble_LR125Kbit, Ble_LR500Kbit and
- Ieee802154_250Kbit modes when last bit is
- sent on air. */
- __IM uint32_t RESERVED4[36];
+ __IOM uint32_t EVENTS_PHYEND; /*!< (@ 0x0000016C) Generated when last bit is sent on air */
+ __IOM uint32_t EVENTS_CTEPRESENT; /*!< (@ 0x00000170) CTE is present (early warning right after receiving
+ CTEInfo byte) */
+ __IM uint32_t RESERVED4[35];
__IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
__IM uint32_t RESERVED5[64];
__IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
@@ -807,7 +827,11 @@
__IM uint32_t RXCRC; /*!< (@ 0x0000040C) CRC field of previously received packet */
__IM uint32_t DAI; /*!< (@ 0x00000410) Device address match index */
__IM uint32_t PDUSTAT; /*!< (@ 0x00000414) Payload status */
- __IM uint32_t RESERVED8[59];
+ __IM uint32_t RESERVED8[13];
+ __IM uint32_t CTESTATUS; /*!< (@ 0x0000044C) CTEInfo parsed from received packet */
+ __IM uint32_t RESERVED9[2];
+ __IM uint32_t DFESTATUS; /*!< (@ 0x00000458) DFE status information */
+ __IM uint32_t RESERVED10[42];
__IOM uint32_t PACKETPTR; /*!< (@ 0x00000504) Packet pointer */
__IOM uint32_t FREQUENCY; /*!< (@ 0x00000508) Frequency */
__IOM uint32_t TXPOWER; /*!< (@ 0x0000050C) Output power */
@@ -823,15 +847,15 @@
__IOM uint32_t CRCCNF; /*!< (@ 0x00000534) CRC configuration */
__IOM uint32_t CRCPOLY; /*!< (@ 0x00000538) CRC polynomial */
__IOM uint32_t CRCINIT; /*!< (@ 0x0000053C) CRC initial value */
- __IM uint32_t RESERVED9;
+ __IM uint32_t RESERVED11;
__IOM uint32_t TIFS; /*!< (@ 0x00000544) Interframe spacing in us */
__IM uint32_t RSSISAMPLE; /*!< (@ 0x00000548) RSSI sample */
- __IM uint32_t RESERVED10;
+ __IM uint32_t RESERVED12;
__IM uint32_t STATE; /*!< (@ 0x00000550) Current radio state */
__IOM uint32_t DATAWHITEIV; /*!< (@ 0x00000554) Data whitening initial value */
- __IM uint32_t RESERVED11[2];
+ __IM uint32_t RESERVED13[2];
__IOM uint32_t BCC; /*!< (@ 0x00000560) Bit counter compare */
- __IM uint32_t RESERVED12[39];
+ __IM uint32_t RESERVED14[39];
__IOM uint32_t DAB[8]; /*!< (@ 0x00000600) Description collection: Device address base segment
n */
__IOM uint32_t DAP[8]; /*!< (@ 0x00000620) Description collection: Device address prefix
@@ -839,14 +863,26 @@
__IOM uint32_t DACNF; /*!< (@ 0x00000640) Device address match configuration */
__IOM uint32_t MHRMATCHCONF; /*!< (@ 0x00000644) Search pattern configuration */
__IOM uint32_t MHRMATCHMAS; /*!< (@ 0x00000648) Pattern mask */
- __IM uint32_t RESERVED13;
+ __IM uint32_t RESERVED15;
__IOM uint32_t MODECNF0; /*!< (@ 0x00000650) Radio mode configuration register 0 */
- __IM uint32_t RESERVED14[3];
+ __IM uint32_t RESERVED16[3];
__IOM uint32_t SFD; /*!< (@ 0x00000660) IEEE 802.15.4 start of frame delimiter */
__IOM uint32_t EDCNT; /*!< (@ 0x00000664) IEEE 802.15.4 energy detect loop count */
__IOM uint32_t EDSAMPLE; /*!< (@ 0x00000668) IEEE 802.15.4 energy detect level */
__IOM uint32_t CCACTRL; /*!< (@ 0x0000066C) IEEE 802.15.4 clear channel assessment control */
- __IM uint32_t RESERVED15[611];
+ __IM uint32_t RESERVED17[164];
+ __IOM uint32_t DFEMODE; /*!< (@ 0x00000900) Whether to use Angle-of-Arrival (AOA) or Angle-of-Departure
+ (AOD) */
+ __IOM uint32_t CTEINLINECONF; /*!< (@ 0x00000904) Configuration for CTE inline mode */
+ __IM uint32_t RESERVED18[2];
+ __IOM uint32_t DFECTRL1; /*!< (@ 0x00000910) Various configuration for Direction finding */
+ __IOM uint32_t DFECTRL2; /*!< (@ 0x00000914) Start offset for Direction finding */
+ __IM uint32_t RESERVED19[4];
+ __IOM uint32_t SWITCHPATTERN; /*!< (@ 0x00000928) GPIO patterns to be used for each antenna */
+ __IOM uint32_t CLEARPATTERN; /*!< (@ 0x0000092C) Clear the GPIO pattern array for antenna control */
+ __IOM RADIO_PSEL_Type PSEL; /*!< (@ 0x00000930) Unspecified */
+ __IOM RADIO_DFEPACKET_Type DFEPACKET; /*!< (@ 0x00000950) DFE packet EasyDMA channel */
+ __IM uint32_t RESERVED20[424];
__IOM uint32_t POWER; /*!< (@ 0x00000FFC) Peripheral power control */
} NRF_RADIO_Type; /*!< Size = 4096 (0x1000) */
@@ -2018,7 +2054,7 @@
#pragma pop
#elif defined (__ICCARM__)
/* leave anonymous unions enabled */
-#elif (__ARMCC_VERSION >= 6010050)
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#pragma clang diagnostic pop
#elif defined (__GNUC__)
/* anonymous unions are enabled by default */
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf52811.svd b/third_party/NordicSemiconductor/nrfx/mdk/nrf52811.svd
index f9810a2..2c0f03f 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/nrf52811.svd
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf52811.svd
@@ -225,6 +225,11 @@
<value>0x52811</value>
</enumeratedValue>
<enumeratedValue>
+ <name>N52832</name>
+ <description>nRF52832</description>
+ <value>0x52832</value>
+ </enumeratedValue>
+ <enumeratedValue>
<name>Unspecified</name>
<description>Unspecified</description>
<value>0xFFFFFFFF</value>
@@ -319,6 +324,11 @@
<value>0x2003</value>
</enumeratedValue>
<enumeratedValue>
+ <name>CA</name>
+ <description>CAxx - WLCSP</description>
+ <value>0x2004</value>
+ </enumeratedValue>
+ <enumeratedValue>
<name>Unspecified</name>
<description>Unspecified</description>
<value>0xFFFFFFFF</value>
@@ -659,7 +669,7 @@
<size>0x20</size>
<registers>
<register>
- <dim>0xF</dim>
+ <dim>0xD</dim>
<dimIncrement>0x4</dimIncrement>
<name>NRFFW[%s]</name>
<description>Description collection: Reserved for Nordic firmware design</description>
@@ -2472,13 +2482,13 @@
<registers>
<register>
<name>TASKS_CONSTLAT</name>
- <description>Enable constant latency mode</description>
+ <description>Enable Constant Latency mode</description>
<addressOffset>0x078</addressOffset>
<access>write-only</access>
<fields>
<field>
<name>TASKS_CONSTLAT</name>
- <description>Enable constant latency mode</description>
+ <description>Enable Constant Latency mode</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
@@ -2493,13 +2503,13 @@
</register>
<register>
<name>TASKS_LOWPWR</name>
- <description>Enable low power mode (variable latency)</description>
+ <description>Enable Low-power mode (variable latency)</description>
<addressOffset>0x07C</addressOffset>
<access>write-only</access>
<fields>
<field>
<name>TASKS_LOWPWR</name>
- <description>Enable low power mode (variable latency)</description>
+ <description>Enable Low-power mode (variable latency)</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
@@ -9880,13 +9890,13 @@
</register>
<register>
<name>EVENTS_EDEND</name>
- <description>Sampling of energy detection complete. A new ED sample is ready for readout from the RADIO.EDSAMPLE register.</description>
+ <description>Sampling of energy detection complete. A new ED sample is ready for readout from the RADIO.EDSAMPLE register</description>
<addressOffset>0x13C</addressOffset>
<access>read-write</access>
<fields>
<field>
<name>EVENTS_EDEND</name>
- <description>Sampling of energy detection complete. A new ED sample is ready for readout from the RADIO.EDSAMPLE register.</description>
+ <description>Sampling of energy detection complete. A new ED sample is ready for readout from the RADIO.EDSAMPLE register</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
@@ -10114,13 +10124,39 @@
</register>
<register>
<name>EVENTS_PHYEND</name>
- <description>Generated in Ble_LR125Kbit, Ble_LR500Kbit and Ieee802154_250Kbit modes when last bit is sent on air.</description>
+ <description>Generated when last bit is sent on air</description>
<addressOffset>0x16C</addressOffset>
<access>read-write</access>
<fields>
<field>
<name>EVENTS_PHYEND</name>
- <description>Generated in Ble_LR125Kbit, Ble_LR500Kbit and Ieee802154_250Kbit modes when last bit is sent on air.</description>
+ <description>Generated when last bit is sent on air</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_CTEPRESENT</name>
+ <description>CTE is present (early warning right after receiving CTEInfo byte)</description>
+ <addressOffset>0x170</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CTEPRESENT</name>
+ <description>CTE is present (early warning right after receiving CTEInfo byte)</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
@@ -11088,6 +11124,33 @@
</enumeratedValue>
</enumeratedValues>
</field>
+ <field>
+ <name>CTEPRESENT</name>
+ <description>Write '1' to enable interrupt for event CTEPRESENT</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
</fields>
</register>
<register>
@@ -11690,6 +11753,33 @@
</enumeratedValue>
</enumeratedValues>
</field>
+ <field>
+ <name>CTEPRESENT</name>
+ <description>Write '1' to disable interrupt for event CTEPRESENT</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
</fields>
</register>
<register>
@@ -11805,6 +11895,96 @@
</fields>
</register>
<register>
+ <name>CTESTATUS</name>
+ <description>CTEInfo parsed from received packet</description>
+ <addressOffset>0x44C</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>CTETIME</name>
+ <description>CTETime parsed from packet</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>RFU</name>
+ <description>RFU parsed from packet</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CTETYPE</name>
+ <description>CTEType parsed from packet</description>
+ <lsb>6</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DFESTATUS</name>
+ <description>DFE status information</description>
+ <addressOffset>0x458</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>SWITCHINGSTATE</name>
+ <description>Internal state of switching state machine</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Idle</name>
+ <description>Switching state Idle</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Offset</name>
+ <description>Switching state Offset</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Guard</name>
+ <description>Switching state Guard</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ref</name>
+ <description>Switching state Ref</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Switching</name>
+ <description>Switching state Switching</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ending</name>
+ <description>Switching state Ending</description>
+ <value>5</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SAMPLINGSTATE</name>
+ <description>Internal state of sampling state machine</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Idle</name>
+ <description>Sampling state Idle</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Sampling</name>
+ <description>Sampling state Sampling</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
<name>PACKETPTR</name>
<description>Packet pointer</description>
<addressOffset>0x504</addressOffset>
@@ -11932,37 +12112,37 @@
<enumeratedValues>
<enumeratedValue>
<name>Nrf_1Mbit</name>
- <description>1 Mbit/s Nordic proprietary radio mode</description>
+ <description>1 Mbps Nordic proprietary radio mode</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Nrf_2Mbit</name>
- <description>2 Mbit/s Nordic proprietary radio mode</description>
+ <description>2 Mbps Nordic proprietary radio mode</description>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
<name>Ble_1Mbit</name>
- <description>1 Mbit/s BLE</description>
+ <description>1 Mbps BLE</description>
<value>3</value>
</enumeratedValue>
<enumeratedValue>
<name>Ble_2Mbit</name>
- <description>2 Mbit/s BLE</description>
+ <description>2 Mbps BLE</description>
<value>4</value>
</enumeratedValue>
<enumeratedValue>
<name>Ble_LR125Kbit</name>
- <description>Long range 125 kbit/s TX, 125 kbit/s and 500 kbit/s RX</description>
+ <description>Long range 125 kbps TX, 125 kbps and 500 kbps RX</description>
<value>5</value>
</enumeratedValue>
<enumeratedValue>
<name>Ble_LR500Kbit</name>
- <description>Long range 500 kbit/s TX, 125 kbit/s and 500 kbit/s RX</description>
+ <description>Long range 500 kbps TX, 125 kbps and 500 kbps RX</description>
<value>6</value>
</enumeratedValue>
<enumeratedValue>
<name>Ieee802154_250Kbit</name>
- <description>IEEE 802.15.4-2006 250 kbit/s</description>
+ <description>IEEE 802.15.4-2006 250 kbps</description>
<value>15</value>
</enumeratedValue>
</enumeratedValues>
@@ -12097,7 +12277,7 @@
</field>
<field>
<name>ENDIAN</name>
- <description>On air endianness of packet, this applies to the S0, LENGTH, S1 and the PAYLOAD fields.</description>
+ <description>On-air endianness of packet, this applies to the S0, LENGTH, S1, and the PAYLOAD fields.</description>
<lsb>24</lsb>
<msb>24</msb>
<enumeratedValues>
@@ -12577,7 +12757,7 @@
<fields>
<field>
<name>DATAWHITEIV</name>
- <description>Data whitening initial value. Bit 6 is hard-wired to '1', writing '0' to it has no effect, and it will always be read back and used by the device as '1'.</description>
+ <description>Data whitening initial value. Bit 6 is hardwired to '1', writing '0' to it has no effect, and it will always be read back and used by the device as '1'.</description>
<lsb>0</lsb>
<msb>6</msb>
</field>
@@ -13000,7 +13180,7 @@
</field>
<field>
<name>CCACORRTHRES</name>
- <description>CCA correlator busy threshold. Only relevant to CarrierMode, CarrierAndEdMode and CarrierOrEdMode.</description>
+ <description>CCA correlator busy threshold. Only relevant to CarrierMode, CarrierAndEdMode, and CarrierOrEdMode.</description>
<lsb>16</lsb>
<msb>23</msb>
</field>
@@ -13013,6 +13193,525 @@
</fields>
</register>
<register>
+ <name>DFEMODE</name>
+ <description>Whether to use Angle-of-Arrival (AOA) or Angle-of-Departure (AOD)</description>
+ <addressOffset>0x900</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>DFEOPMODE</name>
+ <description>Direction finding operation mode</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Direction finding mode disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AoD</name>
+ <description>Direction finding mode set to AoD</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AoA</name>
+ <description>Direction finding mode set to AoA</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CTEINLINECONF</name>
+ <description>Configuration for CTE inline mode</description>
+ <addressOffset>0x904</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00002800</resetValue>
+ <fields>
+ <field>
+ <name>CTEINLINECTRLEN</name>
+ <description>Enable parsing of CTEInfo from received packet in BLE modes</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Parsing of CTEInfo is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Parsing of CTEInfo is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CTEINFOINS1</name>
+ <description>CTEInfo is S1 byte or not</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>InS1</name>
+ <description>CTEInfo is in S1 byte (data PDU)</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>NotInS1</name>
+ <description>CTEInfo is NOT in S1 byte (advertising PDU)</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CTEERRORHANDLING</name>
+ <description>Sampling/switching if CRC is not OK</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Yes</name>
+ <description>Sampling and antenna switching also when CRC is not OK</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>No</name>
+ <description>No sampling and antenna switching when CRC is not OK</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CTETIMEVALIDRANGE</name>
+ <description>Max range of CTETime</description>
+ <lsb>6</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>20</name>
+ <description>20 in 8us unit (default) Set to 20 if parsed CTETime is larger han 20</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>31</name>
+ <description>31 in 8us unit</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>63</name>
+ <description>63 in 8us unit</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CTEINLINERXMODE1US</name>
+ <description>Spacing between samples for the samples in the SWITCHING period when CTEINLINEMODE is set</description>
+ <lsb>10</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>4us</name>
+ <description>4us</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>2us</name>
+ <description>2us</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>1us</name>
+ <description>1us</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>500ns</name>
+ <description>0.5us</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>250ns</name>
+ <description>0.25us</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>125ns</name>
+ <description>0.125us</description>
+ <value>6</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CTEINLINERXMODE2US</name>
+ <description>Spacing between samples for the samples in the SWITCHING period when CTEINLINEMODE is set</description>
+ <lsb>13</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>4us</name>
+ <description>4us</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>2us</name>
+ <description>2us</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>1us</name>
+ <description>1us</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>500ns</name>
+ <description>0.5us</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>250ns</name>
+ <description>0.25us</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>125ns</name>
+ <description>0.125us</description>
+ <value>6</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S0CONF</name>
+ <description>S0 bit pattern to match</description>
+ <lsb>16</lsb>
+ <msb>23</msb>
+ </field>
+ <field>
+ <name>S0MASK</name>
+ <description>S0 bit mask to set which bit to match</description>
+ <lsb>24</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DFECTRL1</name>
+ <description>Various configuration for Direction finding</description>
+ <addressOffset>0x910</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00023282</resetValue>
+ <fields>
+ <field>
+ <name>NUMBEROF8US</name>
+ <description>Length of the AoA/AoD procedure in number of 8 us units</description>
+ <lsb>0</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>DFEINEXTENSION</name>
+ <description>Add CTE extension and do antenna switching/sampling in this extension</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>CRC</name>
+ <description>AoA/AoD procedure triggered at end of CRC</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Payload</name>
+ <description>Antenna switching/sampling is done in the packet payload</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TSWITCHSPACING</name>
+ <description>Interval between every time the antenna is changed in the SWITCHING state</description>
+ <lsb>8</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>4us</name>
+ <description>4us</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>2us</name>
+ <description>2us</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>1us</name>
+ <description>1us</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TSAMPLESPACINGREF</name>
+ <description>Interval between samples in the REFERENCE period</description>
+ <lsb>12</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>4us</name>
+ <description>4us</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>2us</name>
+ <description>2us</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>1us</name>
+ <description>1us</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>500ns</name>
+ <description>0.5us</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>250ns</name>
+ <description>0.25us</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>125ns</name>
+ <description>0.125us</description>
+ <value>6</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SAMPLETYPE</name>
+ <description>Whether to sample I/Q or magnitude/phase</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>IQ</name>
+ <description>Complex samples in I and Q</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>MagPhase</name>
+ <description>Complex samples as magnitude and phase</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TSAMPLESPACING</name>
+ <description>Interval between samples in the SWITCHING period when CTEINLINECTRLEN is 0</description>
+ <lsb>16</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>4us</name>
+ <description>4us</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>2us</name>
+ <description>2us</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>1us</name>
+ <description>1us</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>500ns</name>
+ <description>0.5us</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>250ns</name>
+ <description>0.25us</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>125ns</name>
+ <description>0.125us</description>
+ <value>6</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>AGCBACKOFFGAIN</name>
+ <description>Gain will be lowered by the specified number of gain steps at the start of CTE</description>
+ <lsb>24</lsb>
+ <msb>27</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DFECTRL2</name>
+ <description>Start offset for Direction finding</description>
+ <addressOffset>0x914</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>TSWITCHOFFSET</name>
+ <description>Signed value offset after the end of the CRC before starting switching in number of 16M cycles</description>
+ <lsb>0</lsb>
+ <msb>12</msb>
+ </field>
+ <field>
+ <name>TSAMPLEOFFSET</name>
+ <description>Signed value offset before starting sampling in number of 16M cycles relative to the beginning of the REFERENCE state - 12 us after switching start</description>
+ <lsb>16</lsb>
+ <msb>27</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SWITCHPATTERN</name>
+ <description>GPIO patterns to be used for each antenna</description>
+ <addressOffset>0x928</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>SWITCHPATTERN</name>
+ <description>Fill array of GPIO patterns for antenna control</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CLEARPATTERN</name>
+ <description>Clear the GPIO pattern array for antenna control</description>
+ <addressOffset>0x92C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CLEARPATTERN</name>
+ <description>Clears GPIO pattern array for antenna control</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <modifiedWriteValues>oneToClear</modifiedWriteValues>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Clear the GPIO pattern</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>PSEL</name>
+ <description>Unspecified</description>
+ <headerStructName>RADIO_PSEL</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x930</addressOffset>
+ <register>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>DFEGPIO[%s]</name>
+ <description>Description collection: Pin select for DFE pin n</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>DFEPACKET</name>
+ <description>DFE packet EasyDMA channel</description>
+ <headerStructName>RADIO_DFEPACKET</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x950</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Maximum number of buffer words to transfer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00001000</resetValue>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of buffer words to transfer</description>
+ <lsb>0</lsb>
+ <msb>12</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Number of samples transferred in the last transaction</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of samples transferred in the last transaction</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
<name>POWER</name>
<description>Peripheral power control</description>
<addressOffset>0xFFC</addressOffset>
@@ -27996,7 +28695,7 @@
<fields>
<field>
<name>SCRATCHPTR</name>
- <description>Pointer to a scratch data area used for temporary storage during resolution.A space of minimum 3 bytes must be reserved.</description>
+ <description>Pointer to a scratch data area used for temporary storage during resolution. A space of minimum 3 bytes must be reserved.</description>
<lsb>0</lsb>
<msb>31</msb>
</field>
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf52811_bitfields.h b/third_party/NordicSemiconductor/nrfx/mdk/nrf52811_bitfields.h
index 4d0e083..1a35ffe 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/nrf52811_bitfields.h
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf52811_bitfields.h
@@ -169,7 +169,7 @@
/* Register: AAR_SCRATCHPTR */
/* Description: Pointer to data area used for temporary storage */
-/* Bits 31..0 : Pointer to a scratch data area used for temporary storage during resolution.A space of minimum 3 bytes must be reserved. */
+/* Bits 31..0 : Pointer to a scratch data area used for temporary storage during resolution. A space of minimum 3 bytes must be reserved. */
#define AAR_SCRATCHPTR_SCRATCHPTR_Pos (0UL) /*!< Position of SCRATCHPTR field. */
#define AAR_SCRATCHPTR_SCRATCHPTR_Msk (0xFFFFFFFFUL << AAR_SCRATCHPTR_SCRATCHPTR_Pos) /*!< Bit mask of SCRATCHPTR field. */
@@ -1708,6 +1708,7 @@
#define FICR_INFO_PART_PART_Msk (0xFFFFFFFFUL << FICR_INFO_PART_PART_Pos) /*!< Bit mask of PART field. */
#define FICR_INFO_PART_PART_N52810 (0x52810UL) /*!< nRF52810 */
#define FICR_INFO_PART_PART_N52811 (0x52811UL) /*!< nRF52811 */
+#define FICR_INFO_PART_PART_N52832 (0x52832UL) /*!< nRF52832 */
#define FICR_INFO_PART_PART_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */
/* Register: FICR_INFO_VARIANT */
@@ -1734,6 +1735,7 @@
#define FICR_INFO_PACKAGE_PACKAGE_Msk (0xFFFFFFFFUL << FICR_INFO_PACKAGE_PACKAGE_Pos) /*!< Bit mask of PACKAGE field. */
#define FICR_INFO_PACKAGE_PACKAGE_QF (0x2000UL) /*!< QFxx - 48-pin QFN */
#define FICR_INFO_PACKAGE_PACKAGE_QC (0x2003UL) /*!< QCxx - 32-pin QFN */
+#define FICR_INFO_PACKAGE_PACKAGE_CA (0x2004UL) /*!< CAxx - WLCSP */
#define FICR_INFO_PACKAGE_PACKAGE_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */
/* Register: FICR_INFO_RAM */
@@ -4112,17 +4114,17 @@
/* Description: Power control */
/* Register: POWER_TASKS_CONSTLAT */
-/* Description: Enable constant latency mode */
+/* Description: Enable Constant Latency mode */
-/* Bit 0 : Enable constant latency mode */
+/* Bit 0 : Enable Constant Latency mode */
#define POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Pos (0UL) /*!< Position of TASKS_CONSTLAT field. */
#define POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Msk (0x1UL << POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Pos) /*!< Bit mask of TASKS_CONSTLAT field. */
#define POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Trigger (1UL) /*!< Trigger task */
/* Register: POWER_TASKS_LOWPWR */
-/* Description: Enable low power mode (variable latency) */
+/* Description: Enable Low-power mode (variable latency) */
-/* Bit 0 : Enable low power mode (variable latency) */
+/* Bit 0 : Enable Low-power mode (variable latency) */
#define POWER_TASKS_LOWPWR_TASKS_LOWPWR_Pos (0UL) /*!< Position of TASKS_LOWPWR field. */
#define POWER_TASKS_LOWPWR_TASKS_LOWPWR_Msk (0x1UL << POWER_TASKS_LOWPWR_TASKS_LOWPWR_Pos) /*!< Bit mask of TASKS_LOWPWR field. */
#define POWER_TASKS_LOWPWR_TASKS_LOWPWR_Trigger (1UL) /*!< Trigger task */
@@ -6187,9 +6189,9 @@
#define RADIO_EVENTS_FRAMESTART_EVENTS_FRAMESTART_Generated (1UL) /*!< Event generated */
/* Register: RADIO_EVENTS_EDEND */
-/* Description: Sampling of energy detection complete. A new ED sample is ready for readout from the RADIO.EDSAMPLE register. */
+/* Description: Sampling of energy detection complete. A new ED sample is ready for readout from the RADIO.EDSAMPLE register */
-/* Bit 0 : Sampling of energy detection complete. A new ED sample is ready for readout from the RADIO.EDSAMPLE register. */
+/* Bit 0 : Sampling of energy detection complete. A new ED sample is ready for readout from the RADIO.EDSAMPLE register */
#define RADIO_EVENTS_EDEND_EVENTS_EDEND_Pos (0UL) /*!< Position of EVENTS_EDEND field. */
#define RADIO_EVENTS_EDEND_EVENTS_EDEND_Msk (0x1UL << RADIO_EVENTS_EDEND_EVENTS_EDEND_Pos) /*!< Bit mask of EVENTS_EDEND field. */
#define RADIO_EVENTS_EDEND_EVENTS_EDEND_NotGenerated (0UL) /*!< Event not generated */
@@ -6268,14 +6270,23 @@
#define RADIO_EVENTS_MHRMATCH_EVENTS_MHRMATCH_Generated (1UL) /*!< Event generated */
/* Register: RADIO_EVENTS_PHYEND */
-/* Description: Generated in Ble_LR125Kbit, Ble_LR500Kbit and Ieee802154_250Kbit modes when last bit is sent on air. */
+/* Description: Generated when last bit is sent on air */
-/* Bit 0 : Generated in Ble_LR125Kbit, Ble_LR500Kbit and Ieee802154_250Kbit modes when last bit is sent on air. */
+/* Bit 0 : Generated when last bit is sent on air */
#define RADIO_EVENTS_PHYEND_EVENTS_PHYEND_Pos (0UL) /*!< Position of EVENTS_PHYEND field. */
#define RADIO_EVENTS_PHYEND_EVENTS_PHYEND_Msk (0x1UL << RADIO_EVENTS_PHYEND_EVENTS_PHYEND_Pos) /*!< Bit mask of EVENTS_PHYEND field. */
#define RADIO_EVENTS_PHYEND_EVENTS_PHYEND_NotGenerated (0UL) /*!< Event not generated */
#define RADIO_EVENTS_PHYEND_EVENTS_PHYEND_Generated (1UL) /*!< Event generated */
+/* Register: RADIO_EVENTS_CTEPRESENT */
+/* Description: CTE is present (early warning right after receiving CTEInfo byte) */
+
+/* Bit 0 : CTE is present (early warning right after receiving CTEInfo byte) */
+#define RADIO_EVENTS_CTEPRESENT_EVENTS_CTEPRESENT_Pos (0UL) /*!< Position of EVENTS_CTEPRESENT field. */
+#define RADIO_EVENTS_CTEPRESENT_EVENTS_CTEPRESENT_Msk (0x1UL << RADIO_EVENTS_CTEPRESENT_EVENTS_CTEPRESENT_Pos) /*!< Bit mask of EVENTS_CTEPRESENT field. */
+#define RADIO_EVENTS_CTEPRESENT_EVENTS_CTEPRESENT_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_CTEPRESENT_EVENTS_CTEPRESENT_Generated (1UL) /*!< Event generated */
+
/* Register: RADIO_SHORTS */
/* Description: Shortcuts between local events and tasks */
@@ -6396,6 +6407,13 @@
/* Register: RADIO_INTENSET */
/* Description: Enable interrupt */
+/* Bit 28 : Write '1' to enable interrupt for event CTEPRESENT */
+#define RADIO_INTENSET_CTEPRESENT_Pos (28UL) /*!< Position of CTEPRESENT field. */
+#define RADIO_INTENSET_CTEPRESENT_Msk (0x1UL << RADIO_INTENSET_CTEPRESENT_Pos) /*!< Bit mask of CTEPRESENT field. */
+#define RADIO_INTENSET_CTEPRESENT_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_CTEPRESENT_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_CTEPRESENT_Set (1UL) /*!< Enable */
+
/* Bit 27 : Write '1' to enable interrupt for event PHYEND */
#define RADIO_INTENSET_PHYEND_Pos (27UL) /*!< Position of PHYEND field. */
#define RADIO_INTENSET_PHYEND_Msk (0x1UL << RADIO_INTENSET_PHYEND_Pos) /*!< Bit mask of PHYEND field. */
@@ -6553,6 +6571,13 @@
/* Register: RADIO_INTENCLR */
/* Description: Disable interrupt */
+/* Bit 28 : Write '1' to disable interrupt for event CTEPRESENT */
+#define RADIO_INTENCLR_CTEPRESENT_Pos (28UL) /*!< Position of CTEPRESENT field. */
+#define RADIO_INTENCLR_CTEPRESENT_Msk (0x1UL << RADIO_INTENCLR_CTEPRESENT_Pos) /*!< Bit mask of CTEPRESENT field. */
+#define RADIO_INTENCLR_CTEPRESENT_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_CTEPRESENT_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_CTEPRESENT_Clear (1UL) /*!< Disable */
+
/* Bit 27 : Write '1' to disable interrupt for event PHYEND */
#define RADIO_INTENCLR_PHYEND_Pos (27UL) /*!< Position of PHYEND field. */
#define RADIO_INTENCLR_PHYEND_Msk (0x1UL << RADIO_INTENCLR_PHYEND_Pos) /*!< Bit mask of PHYEND field. */
@@ -6752,6 +6777,40 @@
#define RADIO_PDUSTAT_PDUSTAT_LessThan (0UL) /*!< Payload less than PCNF1.MAXLEN */
#define RADIO_PDUSTAT_PDUSTAT_GreaterThan (1UL) /*!< Payload greater than PCNF1.MAXLEN */
+/* Register: RADIO_CTESTATUS */
+/* Description: CTEInfo parsed from received packet */
+
+/* Bits 7..6 : CTEType parsed from packet */
+#define RADIO_CTESTATUS_CTETYPE_Pos (6UL) /*!< Position of CTETYPE field. */
+#define RADIO_CTESTATUS_CTETYPE_Msk (0x3UL << RADIO_CTESTATUS_CTETYPE_Pos) /*!< Bit mask of CTETYPE field. */
+
+/* Bit 5 : RFU parsed from packet */
+#define RADIO_CTESTATUS_RFU_Pos (5UL) /*!< Position of RFU field. */
+#define RADIO_CTESTATUS_RFU_Msk (0x1UL << RADIO_CTESTATUS_RFU_Pos) /*!< Bit mask of RFU field. */
+
+/* Bits 4..0 : CTETime parsed from packet */
+#define RADIO_CTESTATUS_CTETIME_Pos (0UL) /*!< Position of CTETIME field. */
+#define RADIO_CTESTATUS_CTETIME_Msk (0x1FUL << RADIO_CTESTATUS_CTETIME_Pos) /*!< Bit mask of CTETIME field. */
+
+/* Register: RADIO_DFESTATUS */
+/* Description: DFE status information */
+
+/* Bit 4 : Internal state of sampling state machine */
+#define RADIO_DFESTATUS_SAMPLINGSTATE_Pos (4UL) /*!< Position of SAMPLINGSTATE field. */
+#define RADIO_DFESTATUS_SAMPLINGSTATE_Msk (0x1UL << RADIO_DFESTATUS_SAMPLINGSTATE_Pos) /*!< Bit mask of SAMPLINGSTATE field. */
+#define RADIO_DFESTATUS_SAMPLINGSTATE_Idle (0UL) /*!< Sampling state Idle */
+#define RADIO_DFESTATUS_SAMPLINGSTATE_Sampling (1UL) /*!< Sampling state Sampling */
+
+/* Bits 2..0 : Internal state of switching state machine */
+#define RADIO_DFESTATUS_SWITCHINGSTATE_Pos (0UL) /*!< Position of SWITCHINGSTATE field. */
+#define RADIO_DFESTATUS_SWITCHINGSTATE_Msk (0x7UL << RADIO_DFESTATUS_SWITCHINGSTATE_Pos) /*!< Bit mask of SWITCHINGSTATE field. */
+#define RADIO_DFESTATUS_SWITCHINGSTATE_Idle (0UL) /*!< Switching state Idle */
+#define RADIO_DFESTATUS_SWITCHINGSTATE_Offset (1UL) /*!< Switching state Offset */
+#define RADIO_DFESTATUS_SWITCHINGSTATE_Guard (2UL) /*!< Switching state Guard */
+#define RADIO_DFESTATUS_SWITCHINGSTATE_Ref (3UL) /*!< Switching state Ref */
+#define RADIO_DFESTATUS_SWITCHINGSTATE_Switching (4UL) /*!< Switching state Switching */
+#define RADIO_DFESTATUS_SWITCHINGSTATE_Ending (5UL) /*!< Switching state Ending */
+
/* Register: RADIO_PACKETPTR */
/* Description: Packet pointer */
@@ -6795,13 +6854,13 @@
/* Bits 3..0 : Radio data rate and modulation setting. The radio supports frequency-shift keying (FSK) modulation. */
#define RADIO_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */
#define RADIO_MODE_MODE_Msk (0xFUL << RADIO_MODE_MODE_Pos) /*!< Bit mask of MODE field. */
-#define RADIO_MODE_MODE_Nrf_1Mbit (0UL) /*!< 1 Mbit/s Nordic proprietary radio mode */
-#define RADIO_MODE_MODE_Nrf_2Mbit (1UL) /*!< 2 Mbit/s Nordic proprietary radio mode */
-#define RADIO_MODE_MODE_Ble_1Mbit (3UL) /*!< 1 Mbit/s BLE */
-#define RADIO_MODE_MODE_Ble_2Mbit (4UL) /*!< 2 Mbit/s BLE */
-#define RADIO_MODE_MODE_Ble_LR125Kbit (5UL) /*!< Long range 125 kbit/s TX, 125 kbit/s and 500 kbit/s RX */
-#define RADIO_MODE_MODE_Ble_LR500Kbit (6UL) /*!< Long range 500 kbit/s TX, 125 kbit/s and 500 kbit/s RX */
-#define RADIO_MODE_MODE_Ieee802154_250Kbit (15UL) /*!< IEEE 802.15.4-2006 250 kbit/s */
+#define RADIO_MODE_MODE_Nrf_1Mbit (0UL) /*!< 1 Mbps Nordic proprietary radio mode */
+#define RADIO_MODE_MODE_Nrf_2Mbit (1UL) /*!< 2 Mbps Nordic proprietary radio mode */
+#define RADIO_MODE_MODE_Ble_1Mbit (3UL) /*!< 1 Mbps BLE */
+#define RADIO_MODE_MODE_Ble_2Mbit (4UL) /*!< 2 Mbps BLE */
+#define RADIO_MODE_MODE_Ble_LR125Kbit (5UL) /*!< Long range 125 kbps TX, 125 kbps and 500 kbps RX */
+#define RADIO_MODE_MODE_Ble_LR500Kbit (6UL) /*!< Long range 500 kbps TX, 125 kbps and 500 kbps RX */
+#define RADIO_MODE_MODE_Ieee802154_250Kbit (15UL) /*!< IEEE 802.15.4-2006 250 kbps */
/* Register: RADIO_PCNF0 */
/* Description: Packet configuration register 0 */
@@ -6855,7 +6914,7 @@
#define RADIO_PCNF1_WHITEEN_Disabled (0UL) /*!< Disable */
#define RADIO_PCNF1_WHITEEN_Enabled (1UL) /*!< Enable */
-/* Bit 24 : On air endianness of packet, this applies to the S0, LENGTH, S1 and the PAYLOAD fields. */
+/* Bit 24 : On-air endianness of packet, this applies to the S0, LENGTH, S1, and the PAYLOAD fields. */
#define RADIO_PCNF1_ENDIAN_Pos (24UL) /*!< Position of ENDIAN field. */
#define RADIO_PCNF1_ENDIAN_Msk (0x1UL << RADIO_PCNF1_ENDIAN_Pos) /*!< Bit mask of ENDIAN field. */
#define RADIO_PCNF1_ENDIAN_Little (0UL) /*!< Least significant bit on air first */
@@ -7048,7 +7107,7 @@
/* Register: RADIO_DATAWHITEIV */
/* Description: Data whitening initial value */
-/* Bits 6..0 : Data whitening initial value. Bit 6 is hard-wired to '1', writing '0' to it has no effect, and it will always be read back and used by the device as '1'. */
+/* Bits 6..0 : Data whitening initial value. Bit 6 is hardwired to '1', writing '0' to it has no effect, and it will always be read back and used by the device as '1'. */
#define RADIO_DATAWHITEIV_DATAWHITEIV_Pos (0UL) /*!< Position of DATAWHITEIV field. */
#define RADIO_DATAWHITEIV_DATAWHITEIV_Msk (0x7FUL << RADIO_DATAWHITEIV_DATAWHITEIV_Pos) /*!< Bit mask of DATAWHITEIV field. */
@@ -7214,7 +7273,7 @@
#define RADIO_CCACTRL_CCACORRCNT_Pos (24UL) /*!< Position of CCACORRCNT field. */
#define RADIO_CCACTRL_CCACORRCNT_Msk (0xFFUL << RADIO_CCACTRL_CCACORRCNT_Pos) /*!< Bit mask of CCACORRCNT field. */
-/* Bits 23..16 : CCA correlator busy threshold. Only relevant to CarrierMode, CarrierAndEdMode and CarrierOrEdMode. */
+/* Bits 23..16 : CCA correlator busy threshold. Only relevant to CarrierMode, CarrierAndEdMode, and CarrierOrEdMode. */
#define RADIO_CCACTRL_CCACORRTHRES_Pos (16UL) /*!< Position of CCACORRTHRES field. */
#define RADIO_CCACTRL_CCACORRTHRES_Msk (0xFFUL << RADIO_CCACTRL_CCACORRTHRES_Pos) /*!< Bit mask of CCACORRTHRES field. */
@@ -7231,6 +7290,186 @@
#define RADIO_CCACTRL_CCAMODE_CarrierOrEdMode (3UL) /*!< Energy above threshold OR carrier seen */
#define RADIO_CCACTRL_CCAMODE_EdModeTest1 (4UL) /*!< Energy above threshold test mode that will abort when first ED measurement over threshold is seen. No averaging. */
+/* Register: RADIO_DFEMODE */
+/* Description: Whether to use Angle-of-Arrival (AOA) or Angle-of-Departure (AOD) */
+
+/* Bits 1..0 : Direction finding operation mode */
+#define RADIO_DFEMODE_DFEOPMODE_Pos (0UL) /*!< Position of DFEOPMODE field. */
+#define RADIO_DFEMODE_DFEOPMODE_Msk (0x3UL << RADIO_DFEMODE_DFEOPMODE_Pos) /*!< Bit mask of DFEOPMODE field. */
+#define RADIO_DFEMODE_DFEOPMODE_Disabled (0UL) /*!< Direction finding mode disabled */
+#define RADIO_DFEMODE_DFEOPMODE_AoD (2UL) /*!< Direction finding mode set to AoD */
+#define RADIO_DFEMODE_DFEOPMODE_AoA (3UL) /*!< Direction finding mode set to AoA */
+
+/* Register: RADIO_CTEINLINECONF */
+/* Description: Configuration for CTE inline mode */
+
+/* Bits 31..24 : S0 bit mask to set which bit to match */
+#define RADIO_CTEINLINECONF_S0MASK_Pos (24UL) /*!< Position of S0MASK field. */
+#define RADIO_CTEINLINECONF_S0MASK_Msk (0xFFUL << RADIO_CTEINLINECONF_S0MASK_Pos) /*!< Bit mask of S0MASK field. */
+
+/* Bits 23..16 : S0 bit pattern to match */
+#define RADIO_CTEINLINECONF_S0CONF_Pos (16UL) /*!< Position of S0CONF field. */
+#define RADIO_CTEINLINECONF_S0CONF_Msk (0xFFUL << RADIO_CTEINLINECONF_S0CONF_Pos) /*!< Bit mask of S0CONF field. */
+
+/* Bits 15..13 : Spacing between samples for the samples in the SWITCHING period when CTEINLINEMODE is set */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE2US_Pos (13UL) /*!< Position of CTEINLINERXMODE2US field. */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE2US_Msk (0x7UL << RADIO_CTEINLINECONF_CTEINLINERXMODE2US_Pos) /*!< Bit mask of CTEINLINERXMODE2US field. */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE2US_4us (1UL) /*!< 4us */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE2US_2us (2UL) /*!< 2us */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE2US_1us (3UL) /*!< 1us */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE2US_500ns (4UL) /*!< 0.5us */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE2US_250ns (5UL) /*!< 0.25us */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE2US_125ns (6UL) /*!< 0.125us */
+
+/* Bits 12..10 : Spacing between samples for the samples in the SWITCHING period when CTEINLINEMODE is set */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE1US_Pos (10UL) /*!< Position of CTEINLINERXMODE1US field. */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE1US_Msk (0x7UL << RADIO_CTEINLINECONF_CTEINLINERXMODE1US_Pos) /*!< Bit mask of CTEINLINERXMODE1US field. */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE1US_4us (1UL) /*!< 4us */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE1US_2us (2UL) /*!< 2us */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE1US_1us (3UL) /*!< 1us */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE1US_500ns (4UL) /*!< 0.5us */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE1US_250ns (5UL) /*!< 0.25us */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE1US_125ns (6UL) /*!< 0.125us */
+
+/* Bits 7..6 : Max range of CTETime */
+#define RADIO_CTEINLINECONF_CTETIMEVALIDRANGE_Pos (6UL) /*!< Position of CTETIMEVALIDRANGE field. */
+#define RADIO_CTEINLINECONF_CTETIMEVALIDRANGE_Msk (0x3UL << RADIO_CTEINLINECONF_CTETIMEVALIDRANGE_Pos) /*!< Bit mask of CTETIMEVALIDRANGE field. */
+#define RADIO_CTEINLINECONF_CTETIMEVALIDRANGE_20 (0UL) /*!< 20 in 8us unit (default) Set to 20 if parsed CTETime is larger han 20 */
+#define RADIO_CTEINLINECONF_CTETIMEVALIDRANGE_31 (1UL) /*!< 31 in 8us unit */
+#define RADIO_CTEINLINECONF_CTETIMEVALIDRANGE_63 (2UL) /*!< 63 in 8us unit */
+
+/* Bit 4 : Sampling/switching if CRC is not OK */
+#define RADIO_CTEINLINECONF_CTEERRORHANDLING_Pos (4UL) /*!< Position of CTEERRORHANDLING field. */
+#define RADIO_CTEINLINECONF_CTEERRORHANDLING_Msk (0x1UL << RADIO_CTEINLINECONF_CTEERRORHANDLING_Pos) /*!< Bit mask of CTEERRORHANDLING field. */
+#define RADIO_CTEINLINECONF_CTEERRORHANDLING_No (0UL) /*!< No sampling and antenna switching when CRC is not OK */
+#define RADIO_CTEINLINECONF_CTEERRORHANDLING_Yes (1UL) /*!< Sampling and antenna switching also when CRC is not OK */
+
+/* Bit 3 : CTEInfo is S1 byte or not */
+#define RADIO_CTEINLINECONF_CTEINFOINS1_Pos (3UL) /*!< Position of CTEINFOINS1 field. */
+#define RADIO_CTEINLINECONF_CTEINFOINS1_Msk (0x1UL << RADIO_CTEINLINECONF_CTEINFOINS1_Pos) /*!< Bit mask of CTEINFOINS1 field. */
+#define RADIO_CTEINLINECONF_CTEINFOINS1_NotInS1 (0UL) /*!< CTEInfo is NOT in S1 byte (advertising PDU) */
+#define RADIO_CTEINLINECONF_CTEINFOINS1_InS1 (1UL) /*!< CTEInfo is in S1 byte (data PDU) */
+
+/* Bit 0 : Enable parsing of CTEInfo from received packet in BLE modes */
+#define RADIO_CTEINLINECONF_CTEINLINECTRLEN_Pos (0UL) /*!< Position of CTEINLINECTRLEN field. */
+#define RADIO_CTEINLINECONF_CTEINLINECTRLEN_Msk (0x1UL << RADIO_CTEINLINECONF_CTEINLINECTRLEN_Pos) /*!< Bit mask of CTEINLINECTRLEN field. */
+#define RADIO_CTEINLINECONF_CTEINLINECTRLEN_Disabled (0UL) /*!< Parsing of CTEInfo is disabled */
+#define RADIO_CTEINLINECONF_CTEINLINECTRLEN_Enabled (1UL) /*!< Parsing of CTEInfo is enabled */
+
+/* Register: RADIO_DFECTRL1 */
+/* Description: Various configuration for Direction finding */
+
+/* Bits 27..24 : Gain will be lowered by the specified number of gain steps at the start of CTE */
+#define RADIO_DFECTRL1_AGCBACKOFFGAIN_Pos (24UL) /*!< Position of AGCBACKOFFGAIN field. */
+#define RADIO_DFECTRL1_AGCBACKOFFGAIN_Msk (0xFUL << RADIO_DFECTRL1_AGCBACKOFFGAIN_Pos) /*!< Bit mask of AGCBACKOFFGAIN field. */
+
+/* Bits 18..16 : Interval between samples in the SWITCHING period when CTEINLINECTRLEN is 0 */
+#define RADIO_DFECTRL1_TSAMPLESPACING_Pos (16UL) /*!< Position of TSAMPLESPACING field. */
+#define RADIO_DFECTRL1_TSAMPLESPACING_Msk (0x7UL << RADIO_DFECTRL1_TSAMPLESPACING_Pos) /*!< Bit mask of TSAMPLESPACING field. */
+#define RADIO_DFECTRL1_TSAMPLESPACING_4us (1UL) /*!< 4us */
+#define RADIO_DFECTRL1_TSAMPLESPACING_2us (2UL) /*!< 2us */
+#define RADIO_DFECTRL1_TSAMPLESPACING_1us (3UL) /*!< 1us */
+#define RADIO_DFECTRL1_TSAMPLESPACING_500ns (4UL) /*!< 0.5us */
+#define RADIO_DFECTRL1_TSAMPLESPACING_250ns (5UL) /*!< 0.25us */
+#define RADIO_DFECTRL1_TSAMPLESPACING_125ns (6UL) /*!< 0.125us */
+
+/* Bit 15 : Whether to sample I/Q or magnitude/phase */
+#define RADIO_DFECTRL1_SAMPLETYPE_Pos (15UL) /*!< Position of SAMPLETYPE field. */
+#define RADIO_DFECTRL1_SAMPLETYPE_Msk (0x1UL << RADIO_DFECTRL1_SAMPLETYPE_Pos) /*!< Bit mask of SAMPLETYPE field. */
+#define RADIO_DFECTRL1_SAMPLETYPE_IQ (0UL) /*!< Complex samples in I and Q */
+#define RADIO_DFECTRL1_SAMPLETYPE_MagPhase (1UL) /*!< Complex samples as magnitude and phase */
+
+/* Bits 14..12 : Interval between samples in the REFERENCE period */
+#define RADIO_DFECTRL1_TSAMPLESPACINGREF_Pos (12UL) /*!< Position of TSAMPLESPACINGREF field. */
+#define RADIO_DFECTRL1_TSAMPLESPACINGREF_Msk (0x7UL << RADIO_DFECTRL1_TSAMPLESPACINGREF_Pos) /*!< Bit mask of TSAMPLESPACINGREF field. */
+#define RADIO_DFECTRL1_TSAMPLESPACINGREF_4us (1UL) /*!< 4us */
+#define RADIO_DFECTRL1_TSAMPLESPACINGREF_2us (2UL) /*!< 2us */
+#define RADIO_DFECTRL1_TSAMPLESPACINGREF_1us (3UL) /*!< 1us */
+#define RADIO_DFECTRL1_TSAMPLESPACINGREF_500ns (4UL) /*!< 0.5us */
+#define RADIO_DFECTRL1_TSAMPLESPACINGREF_250ns (5UL) /*!< 0.25us */
+#define RADIO_DFECTRL1_TSAMPLESPACINGREF_125ns (6UL) /*!< 0.125us */
+
+/* Bits 10..8 : Interval between every time the antenna is changed in the SWITCHING state */
+#define RADIO_DFECTRL1_TSWITCHSPACING_Pos (8UL) /*!< Position of TSWITCHSPACING field. */
+#define RADIO_DFECTRL1_TSWITCHSPACING_Msk (0x7UL << RADIO_DFECTRL1_TSWITCHSPACING_Pos) /*!< Bit mask of TSWITCHSPACING field. */
+#define RADIO_DFECTRL1_TSWITCHSPACING_4us (1UL) /*!< 4us */
+#define RADIO_DFECTRL1_TSWITCHSPACING_2us (2UL) /*!< 2us */
+#define RADIO_DFECTRL1_TSWITCHSPACING_1us (3UL) /*!< 1us */
+
+/* Bit 7 : Add CTE extension and do antenna switching/sampling in this extension */
+#define RADIO_DFECTRL1_DFEINEXTENSION_Pos (7UL) /*!< Position of DFEINEXTENSION field. */
+#define RADIO_DFECTRL1_DFEINEXTENSION_Msk (0x1UL << RADIO_DFECTRL1_DFEINEXTENSION_Pos) /*!< Bit mask of DFEINEXTENSION field. */
+#define RADIO_DFECTRL1_DFEINEXTENSION_Payload (0UL) /*!< Antenna switching/sampling is done in the packet payload */
+#define RADIO_DFECTRL1_DFEINEXTENSION_CRC (1UL) /*!< AoA/AoD procedure triggered at end of CRC */
+
+/* Bits 5..0 : Length of the AoA/AoD procedure in number of 8 us units */
+#define RADIO_DFECTRL1_NUMBEROF8US_Pos (0UL) /*!< Position of NUMBEROF8US field. */
+#define RADIO_DFECTRL1_NUMBEROF8US_Msk (0x3FUL << RADIO_DFECTRL1_NUMBEROF8US_Pos) /*!< Bit mask of NUMBEROF8US field. */
+
+/* Register: RADIO_DFECTRL2 */
+/* Description: Start offset for Direction finding */
+
+/* Bits 27..16 : Signed value offset before starting sampling in number of 16M cycles relative to the beginning of the REFERENCE state - 12 us after switching start */
+#define RADIO_DFECTRL2_TSAMPLEOFFSET_Pos (16UL) /*!< Position of TSAMPLEOFFSET field. */
+#define RADIO_DFECTRL2_TSAMPLEOFFSET_Msk (0xFFFUL << RADIO_DFECTRL2_TSAMPLEOFFSET_Pos) /*!< Bit mask of TSAMPLEOFFSET field. */
+
+/* Bits 12..0 : Signed value offset after the end of the CRC before starting switching in number of 16M cycles */
+#define RADIO_DFECTRL2_TSWITCHOFFSET_Pos (0UL) /*!< Position of TSWITCHOFFSET field. */
+#define RADIO_DFECTRL2_TSWITCHOFFSET_Msk (0x1FFFUL << RADIO_DFECTRL2_TSWITCHOFFSET_Pos) /*!< Bit mask of TSWITCHOFFSET field. */
+
+/* Register: RADIO_SWITCHPATTERN */
+/* Description: GPIO patterns to be used for each antenna */
+
+/* Bits 7..0 : Fill array of GPIO patterns for antenna control */
+#define RADIO_SWITCHPATTERN_SWITCHPATTERN_Pos (0UL) /*!< Position of SWITCHPATTERN field. */
+#define RADIO_SWITCHPATTERN_SWITCHPATTERN_Msk (0xFFUL << RADIO_SWITCHPATTERN_SWITCHPATTERN_Pos) /*!< Bit mask of SWITCHPATTERN field. */
+
+/* Register: RADIO_CLEARPATTERN */
+/* Description: Clear the GPIO pattern array for antenna control */
+
+/* Bit 0 : Clears GPIO pattern array for antenna control */
+#define RADIO_CLEARPATTERN_CLEARPATTERN_Pos (0UL) /*!< Position of CLEARPATTERN field. */
+#define RADIO_CLEARPATTERN_CLEARPATTERN_Msk (0x1UL << RADIO_CLEARPATTERN_CLEARPATTERN_Pos) /*!< Bit mask of CLEARPATTERN field. */
+#define RADIO_CLEARPATTERN_CLEARPATTERN_Clear (1UL) /*!< Clear the GPIO pattern */
+
+/* Register: RADIO_PSEL_DFEGPIO */
+/* Description: Description collection: Pin select for DFE pin n */
+
+/* Bit 31 : Connection */
+#define RADIO_PSEL_DFEGPIO_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define RADIO_PSEL_DFEGPIO_CONNECT_Msk (0x1UL << RADIO_PSEL_DFEGPIO_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define RADIO_PSEL_DFEGPIO_CONNECT_Connected (0UL) /*!< Connect */
+#define RADIO_PSEL_DFEGPIO_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define RADIO_PSEL_DFEGPIO_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define RADIO_PSEL_DFEGPIO_PORT_Msk (0x1UL << RADIO_PSEL_DFEGPIO_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define RADIO_PSEL_DFEGPIO_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define RADIO_PSEL_DFEGPIO_PIN_Msk (0x1FUL << RADIO_PSEL_DFEGPIO_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: RADIO_DFEPACKET_PTR */
+/* Description: Data pointer */
+
+/* Bits 31..0 : Data pointer */
+#define RADIO_DFEPACKET_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define RADIO_DFEPACKET_PTR_PTR_Msk (0xFFFFFFFFUL << RADIO_DFEPACKET_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: RADIO_DFEPACKET_MAXCNT */
+/* Description: Maximum number of buffer words to transfer */
+
+/* Bits 12..0 : Maximum number of buffer words to transfer */
+#define RADIO_DFEPACKET_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define RADIO_DFEPACKET_MAXCNT_MAXCNT_Msk (0x1FFFUL << RADIO_DFEPACKET_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: RADIO_DFEPACKET_AMOUNT */
+/* Description: Number of samples transferred in the last transaction */
+
+/* Bits 15..0 : Number of samples transferred in the last transaction */
+#define RADIO_DFEPACKET_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define RADIO_DFEPACKET_AMOUNT_AMOUNT_Msk (0xFFFFUL << RADIO_DFEPACKET_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
/* Register: RADIO_POWER */
/* Description: Peripheral power control */
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf52832_xxaa.ld b/third_party/NordicSemiconductor/nrfx/mdk/nrf52832_xxaa.ld
new file mode 100644
index 0000000..ca28116
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf52832_xxaa.ld
@@ -0,0 +1,13 @@
+/* Linker script to configure memory regions. */
+
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lnosys)
+
+MEMORY
+{
+ FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x80000
+ RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x10000
+}
+
+
+INCLUDE "nrf_common.ld"
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf52833.h b/third_party/NordicSemiconductor/nrfx/mdk/nrf52833.h
new file mode 100644
index 0000000..d03eb9e
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf52833.h
@@ -0,0 +1,2794 @@
+/*
+ * Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @file nrf52833.h
+ * @brief CMSIS HeaderFile
+ * @version 1
+ * @date 23. August 2019
+ * @note Generated by SVDConv V3.3.25 on Friday, 23.08.2019 12:15:13
+ * from File 'nrf52833.svd',
+ * last modified on Friday, 23.08.2019 10:15:09
+ */
+
+
+
+/** @addtogroup Nordic Semiconductor
+ * @{
+ */
+
+
+/** @addtogroup nrf52833
+ * @{
+ */
+
+
+#ifndef NRF52833_H
+#define NRF52833_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/** @addtogroup Configuration_of_CMSIS
+ * @{
+ */
+
+
+
+/* =========================================================================================================================== */
+/* ================ Interrupt Number Definition ================ */
+/* =========================================================================================================================== */
+
+typedef enum {
+/* ======================================= ARM Cortex-M4 Specific Interrupt Numbers ======================================== */
+ Reset_IRQn = -15, /*!< -15 Reset Vector, invoked on Power up and warm reset */
+ NonMaskableInt_IRQn = -14, /*!< -14 Non maskable Interrupt, cannot be stopped or preempted */
+ HardFault_IRQn = -13, /*!< -13 Hard Fault, all classes of Fault */
+ MemoryManagement_IRQn = -12, /*!< -12 Memory Management, MPU mismatch, including Access Violation
+ and No Match */
+ BusFault_IRQn = -11, /*!< -11 Bus Fault, Pre-Fetch-, Memory Access Fault, other address/memory
+ related Fault */
+ UsageFault_IRQn = -10, /*!< -10 Usage Fault, i.e. Undef Instruction, Illegal State Transition */
+ SVCall_IRQn = -5, /*!< -5 System Service Call via SVC instruction */
+ DebugMonitor_IRQn = -4, /*!< -4 Debug Monitor */
+ PendSV_IRQn = -2, /*!< -2 Pendable request for system service */
+ SysTick_IRQn = -1, /*!< -1 System Tick Timer */
+/* ========================================== nrf52833 Specific Interrupt Numbers ========================================== */
+ POWER_CLOCK_IRQn = 0, /*!< 0 POWER_CLOCK */
+ RADIO_IRQn = 1, /*!< 1 RADIO */
+ UARTE0_UART0_IRQn = 2, /*!< 2 UARTE0_UART0 */
+ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn= 3, /*!< 3 SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0 */
+ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn= 4, /*!< 4 SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1 */
+ NFCT_IRQn = 5, /*!< 5 NFCT */
+ GPIOTE_IRQn = 6, /*!< 6 GPIOTE */
+ SAADC_IRQn = 7, /*!< 7 SAADC */
+ TIMER0_IRQn = 8, /*!< 8 TIMER0 */
+ TIMER1_IRQn = 9, /*!< 9 TIMER1 */
+ TIMER2_IRQn = 10, /*!< 10 TIMER2 */
+ RTC0_IRQn = 11, /*!< 11 RTC0 */
+ TEMP_IRQn = 12, /*!< 12 TEMP */
+ RNG_IRQn = 13, /*!< 13 RNG */
+ ECB_IRQn = 14, /*!< 14 ECB */
+ CCM_AAR_IRQn = 15, /*!< 15 CCM_AAR */
+ WDT_IRQn = 16, /*!< 16 WDT */
+ RTC1_IRQn = 17, /*!< 17 RTC1 */
+ QDEC_IRQn = 18, /*!< 18 QDEC */
+ COMP_LPCOMP_IRQn = 19, /*!< 19 COMP_LPCOMP */
+ SWI0_EGU0_IRQn = 20, /*!< 20 SWI0_EGU0 */
+ SWI1_EGU1_IRQn = 21, /*!< 21 SWI1_EGU1 */
+ SWI2_EGU2_IRQn = 22, /*!< 22 SWI2_EGU2 */
+ SWI3_EGU3_IRQn = 23, /*!< 23 SWI3_EGU3 */
+ SWI4_EGU4_IRQn = 24, /*!< 24 SWI4_EGU4 */
+ SWI5_EGU5_IRQn = 25, /*!< 25 SWI5_EGU5 */
+ TIMER3_IRQn = 26, /*!< 26 TIMER3 */
+ TIMER4_IRQn = 27, /*!< 27 TIMER4 */
+ PWM0_IRQn = 28, /*!< 28 PWM0 */
+ PDM_IRQn = 29, /*!< 29 PDM */
+ MWU_IRQn = 32, /*!< 32 MWU */
+ PWM1_IRQn = 33, /*!< 33 PWM1 */
+ PWM2_IRQn = 34, /*!< 34 PWM2 */
+ SPIM2_SPIS2_SPI2_IRQn = 35, /*!< 35 SPIM2_SPIS2_SPI2 */
+ RTC2_IRQn = 36, /*!< 36 RTC2 */
+ I2S_IRQn = 37, /*!< 37 I2S */
+ FPU_IRQn = 38, /*!< 38 FPU */
+ USBD_IRQn = 39, /*!< 39 USBD */
+ UARTE1_IRQn = 40, /*!< 40 UARTE1 */
+ PWM3_IRQn = 45, /*!< 45 PWM3 */
+ SPIM3_IRQn = 47 /*!< 47 SPIM3 */
+} IRQn_Type;
+
+
+
+/* =========================================================================================================================== */
+/* ================ Processor and Core Peripheral Section ================ */
+/* =========================================================================================================================== */
+
+/* =========================== Configuration of the ARM Cortex-M4 Processor and Core Peripherals =========================== */
+#define __CM4_REV 0x0001U /*!< CM4 Core Revision */
+#define __DSP_PRESENT 0 /*!< DSP present or not */
+#define __VTOR_PRESENT 1 /*!< Set to 1 if CPU supports Vector Table Offset Register */
+#define __NVIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels */
+#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
+#define __MPU_PRESENT 1 /*!< MPU present */
+#define __FPU_PRESENT 1 /*!< FPU present */
+
+
+/** @} */ /* End of group Configuration_of_CMSIS */
+
+#include "core_cm4.h" /*!< ARM Cortex-M4 processor and core peripherals */
+#include "system_nrf52833.h" /*!< nrf52833 System */
+
+#ifndef __IM /*!< Fallback for older CMSIS versions */
+ #define __IM __I
+#endif
+#ifndef __OM /*!< Fallback for older CMSIS versions */
+ #define __OM __O
+#endif
+#ifndef __IOM /*!< Fallback for older CMSIS versions */
+ #define __IOM __IO
+#endif
+
+
+/* ======================================== Start of section using anonymous unions ======================================== */
+#if defined (__CC_ARM)
+ #pragma push
+ #pragma anon_unions
+#elif defined (__ICCARM__)
+ #pragma language=extended
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #pragma clang diagnostic push
+ #pragma clang diagnostic ignored "-Wc11-extensions"
+ #pragma clang diagnostic ignored "-Wreserved-id-macro"
+ #pragma clang diagnostic ignored "-Wgnu-anonymous-struct"
+ #pragma clang diagnostic ignored "-Wnested-anon-types"
+#elif defined (__GNUC__)
+ /* anonymous unions are enabled by default */
+#elif defined (__TMS470__)
+ /* anonymous unions are enabled by default */
+#elif defined (__TASKING__)
+ #pragma warning 586
+#elif defined (__CSMC__)
+ /* anonymous unions are enabled by default */
+#else
+ #warning Not supported compiler type
+#endif
+
+
+/* =========================================================================================================================== */
+/* ================ Device Specific Cluster Section ================ */
+/* =========================================================================================================================== */
+
+
+/** @addtogroup Device_Peripheral_clusters
+ * @{
+ */
+
+
+/**
+ * @brief FICR_INFO [INFO] (Device info)
+ */
+typedef struct {
+ __IM uint32_t PART; /*!< (@ 0x00000000) Part code */
+ __IM uint32_t VARIANT; /*!< (@ 0x00000004) Build code (hardware version and production configuration) */
+ __IM uint32_t PACKAGE; /*!< (@ 0x00000008) Package option */
+ __IM uint32_t RAM; /*!< (@ 0x0000000C) RAM variant */
+ __IM uint32_t FLASH; /*!< (@ 0x00000010) Flash variant */
+} FICR_INFO_Type; /*!< Size = 20 (0x14) */
+
+
+/**
+ * @brief FICR_TEMP [TEMP] (Registers storing factory TEMP module linearization coefficients)
+ */
+typedef struct {
+ __IM uint32_t A0; /*!< (@ 0x00000000) Slope definition A0 */
+ __IM uint32_t A1; /*!< (@ 0x00000004) Slope definition A1 */
+ __IM uint32_t A2; /*!< (@ 0x00000008) Slope definition A2 */
+ __IM uint32_t A3; /*!< (@ 0x0000000C) Slope definition A3 */
+ __IM uint32_t A4; /*!< (@ 0x00000010) Slope definition A4 */
+ __IM uint32_t A5; /*!< (@ 0x00000014) Slope definition A5 */
+ __IM uint32_t B0; /*!< (@ 0x00000018) Y-intercept B0 */
+ __IM uint32_t B1; /*!< (@ 0x0000001C) Y-intercept B1 */
+ __IM uint32_t B2; /*!< (@ 0x00000020) Y-intercept B2 */
+ __IM uint32_t B3; /*!< (@ 0x00000024) Y-intercept B3 */
+ __IM uint32_t B4; /*!< (@ 0x00000028) Y-intercept B4 */
+ __IM uint32_t B5; /*!< (@ 0x0000002C) Y-intercept B5 */
+ __IM uint32_t T0; /*!< (@ 0x00000030) Segment end T0 */
+ __IM uint32_t T1; /*!< (@ 0x00000034) Segment end T1 */
+ __IM uint32_t T2; /*!< (@ 0x00000038) Segment end T2 */
+ __IM uint32_t T3; /*!< (@ 0x0000003C) Segment end T3 */
+ __IM uint32_t T4; /*!< (@ 0x00000040) Segment end T4 */
+} FICR_TEMP_Type; /*!< Size = 68 (0x44) */
+
+
+/**
+ * @brief FICR_NFC [NFC] (Unspecified)
+ */
+typedef struct {
+ __IM uint32_t TAGHEADER0; /*!< (@ 0x00000000) Default header for NFC tag. Software can read
+ these values to populate NFCID1_3RD_LAST,
+ NFCID1_2ND_LAST, and NFCID1_LAST. */
+ __IM uint32_t TAGHEADER1; /*!< (@ 0x00000004) Default header for NFC tag. Software can read
+ these values to populate NFCID1_3RD_LAST,
+ NFCID1_2ND_LAST, and NFCID1_LAST. */
+ __IM uint32_t TAGHEADER2; /*!< (@ 0x00000008) Default header for NFC tag. Software can read
+ these values to populate NFCID1_3RD_LAST,
+ NFCID1_2ND_LAST, and NFCID1_LAST. */
+ __IM uint32_t TAGHEADER3; /*!< (@ 0x0000000C) Default header for NFC tag. Software can read
+ these values to populate NFCID1_3RD_LAST,
+ NFCID1_2ND_LAST, and NFCID1_LAST. */
+} FICR_NFC_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief POWER_RAM [RAM] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t POWER; /*!< (@ 0x00000000) Description cluster: RAMn power control register */
+ __OM uint32_t POWERSET; /*!< (@ 0x00000004) Description cluster: RAMn power control set register */
+ __OM uint32_t POWERCLR; /*!< (@ 0x00000008) Description cluster: RAMn power control clear
+ register */
+ __IM uint32_t RESERVED;
+} POWER_RAM_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief RADIO_PSEL [PSEL] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t DFEGPIO[8]; /*!< (@ 0x00000000) Description collection: Pin select for DFE pin
+ n */
+} RADIO_PSEL_Type; /*!< Size = 32 (0x20) */
+
+
+/**
+ * @brief RADIO_DFEPACKET [DFEPACKET] (DFE packet EasyDMA channel)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) Data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of buffer words to transfer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of samples transferred in the last transaction */
+} RADIO_DFEPACKET_Type; /*!< Size = 12 (0xc) */
+
+
+/**
+ * @brief UART_PSEL [PSEL] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t RTS; /*!< (@ 0x00000000) Pin select for RTS */
+ __IOM uint32_t TXD; /*!< (@ 0x00000004) Pin select for TXD */
+ __IOM uint32_t CTS; /*!< (@ 0x00000008) Pin select for CTS */
+ __IOM uint32_t RXD; /*!< (@ 0x0000000C) Pin select for RXD */
+} UART_PSEL_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief UARTE_PSEL [PSEL] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t RTS; /*!< (@ 0x00000000) Pin select for RTS signal */
+ __IOM uint32_t TXD; /*!< (@ 0x00000004) Pin select for TXD signal */
+ __IOM uint32_t CTS; /*!< (@ 0x00000008) Pin select for CTS signal */
+ __IOM uint32_t RXD; /*!< (@ 0x0000000C) Pin select for RXD signal */
+} UARTE_PSEL_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief UARTE_RXD [RXD] (RXD EasyDMA channel)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) Data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of bytes in receive buffer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of bytes transferred in the last transaction */
+} UARTE_RXD_Type; /*!< Size = 12 (0xc) */
+
+
+/**
+ * @brief UARTE_TXD [TXD] (TXD EasyDMA channel)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) Data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of bytes in transmit buffer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of bytes transferred in the last transaction */
+} UARTE_TXD_Type; /*!< Size = 12 (0xc) */
+
+
+/**
+ * @brief SPI_PSEL [PSEL] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t SCK; /*!< (@ 0x00000000) Pin select for SCK */
+ __IOM uint32_t MOSI; /*!< (@ 0x00000004) Pin select for MOSI signal */
+ __IOM uint32_t MISO; /*!< (@ 0x00000008) Pin select for MISO signal */
+} SPI_PSEL_Type; /*!< Size = 12 (0xc) */
+
+
+/**
+ * @brief SPIM_PSEL [PSEL] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t SCK; /*!< (@ 0x00000000) Pin select for SCK */
+ __IOM uint32_t MOSI; /*!< (@ 0x00000004) Pin select for MOSI signal */
+ __IOM uint32_t MISO; /*!< (@ 0x00000008) Pin select for MISO signal */
+ __IOM uint32_t CSN; /*!< (@ 0x0000000C) Pin select for CSN */
+} SPIM_PSEL_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief SPIM_RXD [RXD] (RXD EasyDMA channel)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) Data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of bytes in receive buffer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of bytes transferred in the last transaction */
+ __IOM uint32_t LIST; /*!< (@ 0x0000000C) EasyDMA list type */
+} SPIM_RXD_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief SPIM_TXD [TXD] (TXD EasyDMA channel)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) Data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Number of bytes in transmit buffer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of bytes transferred in the last transaction */
+ __IOM uint32_t LIST; /*!< (@ 0x0000000C) EasyDMA list type */
+} SPIM_TXD_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief SPIM_IFTIMING [IFTIMING] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t RXDELAY; /*!< (@ 0x00000000) Sample delay for input serial data on MISO */
+ __IOM uint32_t CSNDUR; /*!< (@ 0x00000004) Minimum duration between edge of CSN and edge
+ of SCK and minimum duration CSN must stay
+ high between transactions */
+} SPIM_IFTIMING_Type; /*!< Size = 8 (0x8) */
+
+
+/**
+ * @brief SPIS_PSEL [PSEL] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t SCK; /*!< (@ 0x00000000) Pin select for SCK */
+ __IOM uint32_t MISO; /*!< (@ 0x00000004) Pin select for MISO signal */
+ __IOM uint32_t MOSI; /*!< (@ 0x00000008) Pin select for MOSI signal */
+ __IOM uint32_t CSN; /*!< (@ 0x0000000C) Pin select for CSN signal */
+} SPIS_PSEL_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief SPIS_RXD [RXD] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) RXD data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of bytes in receive buffer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of bytes received in last granted transaction */
+ __IOM uint32_t LIST; /*!< (@ 0x0000000C) EasyDMA list type */
+} SPIS_RXD_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief SPIS_TXD [TXD] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) TXD data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of bytes in transmit buffer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of bytes transmitted in last granted transaction */
+ __IOM uint32_t LIST; /*!< (@ 0x0000000C) EasyDMA list type */
+} SPIS_TXD_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief TWI_PSEL [PSEL] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t SCL; /*!< (@ 0x00000000) Pin select for SCL */
+ __IOM uint32_t SDA; /*!< (@ 0x00000004) Pin select for SDA */
+} TWI_PSEL_Type; /*!< Size = 8 (0x8) */
+
+
+/**
+ * @brief TWIM_PSEL [PSEL] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t SCL; /*!< (@ 0x00000000) Pin select for SCL signal */
+ __IOM uint32_t SDA; /*!< (@ 0x00000004) Pin select for SDA signal */
+} TWIM_PSEL_Type; /*!< Size = 8 (0x8) */
+
+
+/**
+ * @brief TWIM_RXD [RXD] (RXD EasyDMA channel)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) Data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of bytes in receive buffer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of bytes transferred in the last transaction */
+ __IOM uint32_t LIST; /*!< (@ 0x0000000C) EasyDMA list type */
+} TWIM_RXD_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief TWIM_TXD [TXD] (TXD EasyDMA channel)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) Data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of bytes in transmit buffer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of bytes transferred in the last transaction */
+ __IOM uint32_t LIST; /*!< (@ 0x0000000C) EasyDMA list type */
+} TWIM_TXD_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief TWIS_PSEL [PSEL] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t SCL; /*!< (@ 0x00000000) Pin select for SCL signal */
+ __IOM uint32_t SDA; /*!< (@ 0x00000004) Pin select for SDA signal */
+} TWIS_PSEL_Type; /*!< Size = 8 (0x8) */
+
+
+/**
+ * @brief TWIS_RXD [RXD] (RXD EasyDMA channel)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) RXD Data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of bytes in RXD buffer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of bytes transferred in the last RXD transaction */
+ __IOM uint32_t LIST; /*!< (@ 0x0000000C) EasyDMA list type */
+} TWIS_RXD_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief TWIS_TXD [TXD] (TXD EasyDMA channel)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) TXD Data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of bytes in TXD buffer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of bytes transferred in the last TXD transaction */
+ __IOM uint32_t LIST; /*!< (@ 0x0000000C) EasyDMA list type */
+} TWIS_TXD_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief NFCT_FRAMESTATUS [FRAMESTATUS] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t RX; /*!< (@ 0x00000000) Result of last incoming frame */
+} NFCT_FRAMESTATUS_Type; /*!< Size = 4 (0x4) */
+
+
+/**
+ * @brief NFCT_TXD [TXD] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t FRAMECONFIG; /*!< (@ 0x00000000) Configuration of outgoing frames */
+ __IOM uint32_t AMOUNT; /*!< (@ 0x00000004) Size of outgoing frame */
+} NFCT_TXD_Type; /*!< Size = 8 (0x8) */
+
+
+/**
+ * @brief NFCT_RXD [RXD] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t FRAMECONFIG; /*!< (@ 0x00000000) Configuration of incoming frames */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000004) Size of last incoming frame */
+} NFCT_RXD_Type; /*!< Size = 8 (0x8) */
+
+
+/**
+ * @brief SAADC_EVENTS_CH [EVENTS_CH] (Peripheral events.)
+ */
+typedef struct {
+ __IOM uint32_t LIMITH; /*!< (@ 0x00000000) Description cluster: Last result is equal or
+ above CH[n].LIMIT.HIGH */
+ __IOM uint32_t LIMITL; /*!< (@ 0x00000004) Description cluster: Last result is equal or
+ below CH[n].LIMIT.LOW */
+} SAADC_EVENTS_CH_Type; /*!< Size = 8 (0x8) */
+
+
+/**
+ * @brief SAADC_CH [CH] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t PSELP; /*!< (@ 0x00000000) Description cluster: Input positive pin selection
+ for CH[n] */
+ __IOM uint32_t PSELN; /*!< (@ 0x00000004) Description cluster: Input negative pin selection
+ for CH[n] */
+ __IOM uint32_t CONFIG; /*!< (@ 0x00000008) Description cluster: Input configuration for
+ CH[n] */
+ __IOM uint32_t LIMIT; /*!< (@ 0x0000000C) Description cluster: High/low limits for event
+ monitoring of a channel */
+} SAADC_CH_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief SAADC_RESULT [RESULT] (RESULT EasyDMA channel)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) Data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of 16-bit samples to be written
+ to output RAM buffer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of 16-bit samples written to output RAM
+ buffer since the previous START task */
+} SAADC_RESULT_Type; /*!< Size = 12 (0xc) */
+
+
+/**
+ * @brief QDEC_PSEL [PSEL] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t LED; /*!< (@ 0x00000000) Pin select for LED signal */
+ __IOM uint32_t A; /*!< (@ 0x00000004) Pin select for A signal */
+ __IOM uint32_t B; /*!< (@ 0x00000008) Pin select for B signal */
+} QDEC_PSEL_Type; /*!< Size = 12 (0xc) */
+
+
+/**
+ * @brief PWM_SEQ [SEQ] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) Description cluster: Beginning address in RAM
+ of this sequence */
+ __IOM uint32_t CNT; /*!< (@ 0x00000004) Description cluster: Number of values (duty cycles)
+ in this sequence */
+ __IOM uint32_t REFRESH; /*!< (@ 0x00000008) Description cluster: Number of additional PWM
+ periods between samples loaded into compare
+ register */
+ __IOM uint32_t ENDDELAY; /*!< (@ 0x0000000C) Description cluster: Time added after the sequence */
+ __IM uint32_t RESERVED[4];
+} PWM_SEQ_Type; /*!< Size = 32 (0x20) */
+
+
+/**
+ * @brief PWM_PSEL [PSEL] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t OUT[4]; /*!< (@ 0x00000000) Description collection: Output pin select for
+ PWM channel n */
+} PWM_PSEL_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief PDM_PSEL [PSEL] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t CLK; /*!< (@ 0x00000000) Pin number configuration for PDM CLK signal */
+ __IOM uint32_t DIN; /*!< (@ 0x00000004) Pin number configuration for PDM DIN signal */
+} PDM_PSEL_Type; /*!< Size = 8 (0x8) */
+
+
+/**
+ * @brief PDM_SAMPLE [SAMPLE] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) RAM address pointer to write samples to with
+ EasyDMA */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Number of samples to allocate memory for in EasyDMA
+ mode */
+} PDM_SAMPLE_Type; /*!< Size = 8 (0x8) */
+
+
+/**
+ * @brief ACL_ACL [ACL] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t ADDR; /*!< (@ 0x00000000) Description cluster: Configure the word-aligned
+ start address of region n to protect */
+ __IOM uint32_t SIZE; /*!< (@ 0x00000004) Description cluster: Size of region to protect
+ counting from address ACL[n].ADDR. Write
+ '0' as no effect. */
+ __IOM uint32_t PERM; /*!< (@ 0x00000008) Description cluster: Access permissions for region
+ n as defined by start address ACL[n].ADDR
+ and size ACL[n].SIZE */
+ __IM uint32_t RESERVED;
+} ACL_ACL_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief PPI_TASKS_CHG [TASKS_CHG] (Channel group tasks)
+ */
+typedef struct {
+ __OM uint32_t EN; /*!< (@ 0x00000000) Description cluster: Enable channel group n */
+ __OM uint32_t DIS; /*!< (@ 0x00000004) Description cluster: Disable channel group n */
+} PPI_TASKS_CHG_Type; /*!< Size = 8 (0x8) */
+
+
+/**
+ * @brief PPI_CH [CH] (PPI Channel)
+ */
+typedef struct {
+ __IOM uint32_t EEP; /*!< (@ 0x00000000) Description cluster: Channel n event end-point */
+ __IOM uint32_t TEP; /*!< (@ 0x00000004) Description cluster: Channel n task end-point */
+} PPI_CH_Type; /*!< Size = 8 (0x8) */
+
+
+/**
+ * @brief PPI_FORK [FORK] (Fork)
+ */
+typedef struct {
+ __IOM uint32_t TEP; /*!< (@ 0x00000000) Description cluster: Channel n task end-point */
+} PPI_FORK_Type; /*!< Size = 4 (0x4) */
+
+
+/**
+ * @brief MWU_EVENTS_REGION [EVENTS_REGION] (Peripheral events.)
+ */
+typedef struct {
+ __IOM uint32_t WA; /*!< (@ 0x00000000) Description cluster: Write access to region n
+ detected */
+ __IOM uint32_t RA; /*!< (@ 0x00000004) Description cluster: Read access to region n
+ detected */
+} MWU_EVENTS_REGION_Type; /*!< Size = 8 (0x8) */
+
+
+/**
+ * @brief MWU_EVENTS_PREGION [EVENTS_PREGION] (Peripheral events.)
+ */
+typedef struct {
+ __IOM uint32_t WA; /*!< (@ 0x00000000) Description cluster: Write access to peripheral
+ region n detected */
+ __IOM uint32_t RA; /*!< (@ 0x00000004) Description cluster: Read access to peripheral
+ region n detected */
+} MWU_EVENTS_PREGION_Type; /*!< Size = 8 (0x8) */
+
+
+/**
+ * @brief MWU_PERREGION [PERREGION] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t SUBSTATWA; /*!< (@ 0x00000000) Description cluster: Source of event/interrupt
+ in region n, write access detected while
+ corresponding subregion was enabled for
+ watching */
+ __IOM uint32_t SUBSTATRA; /*!< (@ 0x00000004) Description cluster: Source of event/interrupt
+ in region n, read access detected while
+ corresponding subregion was enabled for
+ watching */
+} MWU_PERREGION_Type; /*!< Size = 8 (0x8) */
+
+
+/**
+ * @brief MWU_REGION [REGION] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t START; /*!< (@ 0x00000000) Description cluster: Start address for region
+ n */
+ __IOM uint32_t END; /*!< (@ 0x00000004) Description cluster: End address of region n */
+ __IM uint32_t RESERVED[2];
+} MWU_REGION_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief MWU_PREGION [PREGION] (Unspecified)
+ */
+typedef struct {
+ __IM uint32_t START; /*!< (@ 0x00000000) Description cluster: Reserved for future use */
+ __IM uint32_t END; /*!< (@ 0x00000004) Description cluster: Reserved for future use */
+ __IOM uint32_t SUBS; /*!< (@ 0x00000008) Description cluster: Subregions of region n */
+ __IM uint32_t RESERVED;
+} MWU_PREGION_Type; /*!< Size = 16 (0x10) */
+
+
+/**
+ * @brief I2S_CONFIG [CONFIG] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t MODE; /*!< (@ 0x00000000) I2S mode. */
+ __IOM uint32_t RXEN; /*!< (@ 0x00000004) Reception (RX) enable. */
+ __IOM uint32_t TXEN; /*!< (@ 0x00000008) Transmission (TX) enable. */
+ __IOM uint32_t MCKEN; /*!< (@ 0x0000000C) Master clock generator enable. */
+ __IOM uint32_t MCKFREQ; /*!< (@ 0x00000010) Master clock generator frequency. */
+ __IOM uint32_t RATIO; /*!< (@ 0x00000014) MCK / LRCK ratio. */
+ __IOM uint32_t SWIDTH; /*!< (@ 0x00000018) Sample width. */
+ __IOM uint32_t ALIGN; /*!< (@ 0x0000001C) Alignment of sample within a frame. */
+ __IOM uint32_t FORMAT; /*!< (@ 0x00000020) Frame format. */
+ __IOM uint32_t CHANNELS; /*!< (@ 0x00000024) Enable channels. */
+} I2S_CONFIG_Type; /*!< Size = 40 (0x28) */
+
+
+/**
+ * @brief I2S_RXD [RXD] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) Receive buffer RAM start address. */
+} I2S_RXD_Type; /*!< Size = 4 (0x4) */
+
+
+/**
+ * @brief I2S_TXD [TXD] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) Transmit buffer RAM start address. */
+} I2S_TXD_Type; /*!< Size = 4 (0x4) */
+
+
+/**
+ * @brief I2S_RXTXD [RXTXD] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000000) Size of RXD and TXD buffers. */
+} I2S_RXTXD_Type; /*!< Size = 4 (0x4) */
+
+
+/**
+ * @brief I2S_PSEL [PSEL] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t MCK; /*!< (@ 0x00000000) Pin select for MCK signal. */
+ __IOM uint32_t SCK; /*!< (@ 0x00000004) Pin select for SCK signal. */
+ __IOM uint32_t LRCK; /*!< (@ 0x00000008) Pin select for LRCK signal. */
+ __IOM uint32_t SDIN; /*!< (@ 0x0000000C) Pin select for SDIN signal. */
+ __IOM uint32_t SDOUT; /*!< (@ 0x00000010) Pin select for SDOUT signal. */
+} I2S_PSEL_Type; /*!< Size = 20 (0x14) */
+
+
+/**
+ * @brief USBD_HALTED [HALTED] (Unspecified)
+ */
+typedef struct {
+ __IM uint32_t EPIN[8]; /*!< (@ 0x00000000) Description collection: IN endpoint halted status.
+ Can be used as is as response to a GetStatus()
+ request to endpoint. */
+ __IM uint32_t RESERVED;
+ __IM uint32_t EPOUT[8]; /*!< (@ 0x00000024) Description collection: OUT endpoint halted status.
+ Can be used as is as response to a GetStatus()
+ request to endpoint. */
+} USBD_HALTED_Type; /*!< Size = 68 (0x44) */
+
+
+/**
+ * @brief USBD_SIZE [SIZE] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t EPOUT[8]; /*!< (@ 0x00000000) Description collection: Number of bytes received
+ last in the data stage of this OUT endpoint */
+ __IM uint32_t ISOOUT; /*!< (@ 0x00000020) Number of bytes received last on this ISO OUT
+ data endpoint */
+} USBD_SIZE_Type; /*!< Size = 36 (0x24) */
+
+
+/**
+ * @brief USBD_EPIN [EPIN] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) Description cluster: Data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Description cluster: Maximum number of bytes
+ to transfer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Description cluster: Number of bytes transferred
+ in the last transaction */
+ __IM uint32_t RESERVED[2];
+} USBD_EPIN_Type; /*!< Size = 20 (0x14) */
+
+
+/**
+ * @brief USBD_ISOIN [ISOIN] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) Data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of bytes to transfer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of bytes transferred in the last transaction */
+} USBD_ISOIN_Type; /*!< Size = 12 (0xc) */
+
+
+/**
+ * @brief USBD_EPOUT [EPOUT] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) Description cluster: Data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Description cluster: Maximum number of bytes
+ to transfer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Description cluster: Number of bytes transferred
+ in the last transaction */
+ __IM uint32_t RESERVED[2];
+} USBD_EPOUT_Type; /*!< Size = 20 (0x14) */
+
+
+/**
+ * @brief USBD_ISOOUT [ISOOUT] (Unspecified)
+ */
+typedef struct {
+ __IOM uint32_t PTR; /*!< (@ 0x00000000) Data pointer */
+ __IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of bytes to transfer */
+ __IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of bytes transferred in the last transaction */
+} USBD_ISOOUT_Type; /*!< Size = 12 (0xc) */
+
+
+/** @} */ /* End of group Device_Peripheral_clusters */
+
+
+/* =========================================================================================================================== */
+/* ================ Device Specific Peripheral Section ================ */
+/* =========================================================================================================================== */
+
+
+/** @addtogroup Device_Peripheral_peripherals
+ * @{
+ */
+
+
+
+/* =========================================================================================================================== */
+/* ================ FICR ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Factory information configuration registers (FICR)
+ */
+
+typedef struct { /*!< (@ 0x10000000) FICR Structure */
+ __IM uint32_t RESERVED[4];
+ __IM uint32_t CODEPAGESIZE; /*!< (@ 0x00000010) Code memory page size */
+ __IM uint32_t CODESIZE; /*!< (@ 0x00000014) Code memory size */
+ __IM uint32_t RESERVED1[18];
+ __IM uint32_t DEVICEID[2]; /*!< (@ 0x00000060) Description collection: Device identifier */
+ __IM uint32_t RESERVED2[6];
+ __IM uint32_t ER[4]; /*!< (@ 0x00000080) Description collection: Encryption root, word
+ n */
+ __IM uint32_t IR[4]; /*!< (@ 0x00000090) Description collection: Identity Root, word n */
+ __IM uint32_t DEVICEADDRTYPE; /*!< (@ 0x000000A0) Device address type */
+ __IM uint32_t DEVICEADDR[2]; /*!< (@ 0x000000A4) Description collection: Device address n */
+ __IM uint32_t RESERVED3[21];
+ __IM FICR_INFO_Type INFO; /*!< (@ 0x00000100) Device info */
+ __IM uint32_t RESERVED4[143];
+ __IM uint32_t PRODTEST[3]; /*!< (@ 0x00000350) Description collection: Production test signature
+ n */
+ __IM uint32_t RESERVED5[42];
+ __IM FICR_TEMP_Type TEMP; /*!< (@ 0x00000404) Registers storing factory TEMP module linearization
+ coefficients */
+ __IM uint32_t RESERVED6[2];
+ __IOM FICR_NFC_Type NFC; /*!< (@ 0x00000450) Unspecified */
+} NRF_FICR_Type; /*!< Size = 1120 (0x460) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ UICR ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief User information configuration registers (UICR)
+ */
+
+typedef struct { /*!< (@ 0x10001000) UICR Structure */
+ __IM uint32_t RESERVED[5];
+ __IOM uint32_t NRFFW[13]; /*!< (@ 0x00000014) Description collection: Reserved for Nordic firmware
+ design */
+ __IM uint32_t RESERVED1[2];
+ __IOM uint32_t NRFHW[12]; /*!< (@ 0x00000050) Description collection: Reserved for Nordic hardware
+ design */
+ __IOM uint32_t CUSTOMER[32]; /*!< (@ 0x00000080) Description collection: Reserved for customer */
+ __IM uint32_t RESERVED2[64];
+ __IOM uint32_t PSELRESET[2]; /*!< (@ 0x00000200) Description collection: Mapping of the nRESET
+ function (see POWER chapter for details) */
+ __IOM uint32_t APPROTECT; /*!< (@ 0x00000208) Access port protection */
+ __IOM uint32_t NFCPINS; /*!< (@ 0x0000020C) Setting of pins dedicated to NFC functionality:
+ NFC antenna or GPIO */
+ __IOM uint32_t DEBUGCTRL; /*!< (@ 0x00000210) Processor debug control */
+ __IM uint32_t RESERVED3[60];
+ __IOM uint32_t REGOUT0; /*!< (@ 0x00000304) Output voltage from REG0 regulator stage. The
+ maximum output voltage from this stage is
+ given as VDDH - VREG0DROP. */
+} NRF_UICR_Type; /*!< Size = 776 (0x308) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ CLOCK ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Clock control (CLOCK)
+ */
+
+typedef struct { /*!< (@ 0x40000000) CLOCK Structure */
+ __OM uint32_t TASKS_HFCLKSTART; /*!< (@ 0x00000000) Start HFXO crystal oscillator */
+ __OM uint32_t TASKS_HFCLKSTOP; /*!< (@ 0x00000004) Stop HFXO crystal oscillator */
+ __OM uint32_t TASKS_LFCLKSTART; /*!< (@ 0x00000008) Start LFCLK */
+ __OM uint32_t TASKS_LFCLKSTOP; /*!< (@ 0x0000000C) Stop LFCLK */
+ __OM uint32_t TASKS_CAL; /*!< (@ 0x00000010) Start calibration of LFRC */
+ __OM uint32_t TASKS_CTSTART; /*!< (@ 0x00000014) Start calibration timer */
+ __OM uint32_t TASKS_CTSTOP; /*!< (@ 0x00000018) Stop calibration timer */
+ __IM uint32_t RESERVED[57];
+ __IOM uint32_t EVENTS_HFCLKSTARTED; /*!< (@ 0x00000100) HFXO crystal oscillator started */
+ __IOM uint32_t EVENTS_LFCLKSTARTED; /*!< (@ 0x00000104) LFCLK started */
+ __IM uint32_t RESERVED1;
+ __IOM uint32_t EVENTS_DONE; /*!< (@ 0x0000010C) Calibration of LFRC completed */
+ __IOM uint32_t EVENTS_CTTO; /*!< (@ 0x00000110) Calibration timer timeout */
+ __IM uint32_t RESERVED2[5];
+ __IOM uint32_t EVENTS_CTSTARTED; /*!< (@ 0x00000128) Calibration timer has been started and is ready
+ to process new tasks */
+ __IOM uint32_t EVENTS_CTSTOPPED; /*!< (@ 0x0000012C) Calibration timer has been stopped and is ready
+ to process new tasks */
+ __IM uint32_t RESERVED3[117];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED4[63];
+ __IM uint32_t HFCLKRUN; /*!< (@ 0x00000408) Status indicating that HFCLKSTART task has been
+ triggered */
+ __IM uint32_t HFCLKSTAT; /*!< (@ 0x0000040C) HFCLK status */
+ __IM uint32_t RESERVED5;
+ __IM uint32_t LFCLKRUN; /*!< (@ 0x00000414) Status indicating that LFCLKSTART task has been
+ triggered */
+ __IM uint32_t LFCLKSTAT; /*!< (@ 0x00000418) LFCLK status */
+ __IM uint32_t LFCLKSRCCOPY; /*!< (@ 0x0000041C) Copy of LFCLKSRC register, set when LFCLKSTART
+ task was triggered */
+ __IM uint32_t RESERVED6[62];
+ __IOM uint32_t LFCLKSRC; /*!< (@ 0x00000518) Clock source for the LFCLK */
+ __IM uint32_t RESERVED7[3];
+ __IOM uint32_t HFXODEBOUNCE; /*!< (@ 0x00000528) HFXO debounce time. The HFXO is started by triggering
+ the TASKS_HFCLKSTART task. */
+ __IOM uint32_t LFXODEBOUNCE; /*!< (@ 0x0000052C) LFXO debounce time. The LFXO is started by triggering
+ the TASKS_LFCLKSTART task when the LFCLKSRC
+ register is configured for Xtal. */
+ __IM uint32_t RESERVED8[2];
+ __IOM uint32_t CTIV; /*!< (@ 0x00000538) Calibration timer interval */
+ __IM uint32_t RESERVED9[8];
+ __IOM uint32_t TRACECONFIG; /*!< (@ 0x0000055C) Clocking options for the trace port debug interface */
+} NRF_CLOCK_Type; /*!< Size = 1376 (0x560) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ POWER ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Power control (POWER)
+ */
+
+typedef struct { /*!< (@ 0x40000000) POWER Structure */
+ __IM uint32_t RESERVED[30];
+ __OM uint32_t TASKS_CONSTLAT; /*!< (@ 0x00000078) Enable Constant Latency mode */
+ __OM uint32_t TASKS_LOWPWR; /*!< (@ 0x0000007C) Enable Low-power mode (variable latency) */
+ __IM uint32_t RESERVED1[34];
+ __IOM uint32_t EVENTS_POFWARN; /*!< (@ 0x00000108) Power failure warning */
+ __IM uint32_t RESERVED2[2];
+ __IOM uint32_t EVENTS_SLEEPENTER; /*!< (@ 0x00000114) CPU entered WFI/WFE sleep */
+ __IOM uint32_t EVENTS_SLEEPEXIT; /*!< (@ 0x00000118) CPU exited WFI/WFE sleep */
+ __IOM uint32_t EVENTS_USBDETECTED; /*!< (@ 0x0000011C) Voltage supply detected on VBUS */
+ __IOM uint32_t EVENTS_USBREMOVED; /*!< (@ 0x00000120) Voltage supply removed from VBUS */
+ __IOM uint32_t EVENTS_USBPWRRDY; /*!< (@ 0x00000124) USB 3.3 V supply ready */
+ __IM uint32_t RESERVED3[119];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED4[61];
+ __IOM uint32_t RESETREAS; /*!< (@ 0x00000400) Reset reason */
+ __IM uint32_t RESERVED5[9];
+ __IM uint32_t RAMSTATUS; /*!< (@ 0x00000428) Deprecated register - RAM status register */
+ __IM uint32_t RESERVED6[3];
+ __IM uint32_t USBREGSTATUS; /*!< (@ 0x00000438) USB supply status */
+ __IM uint32_t RESERVED7[49];
+ __OM uint32_t SYSTEMOFF; /*!< (@ 0x00000500) System OFF register */
+ __IM uint32_t RESERVED8[3];
+ __IOM uint32_t POFCON; /*!< (@ 0x00000510) Power-fail comparator configuration */
+ __IM uint32_t RESERVED9[2];
+ __IOM uint32_t GPREGRET; /*!< (@ 0x0000051C) General purpose retention register */
+ __IOM uint32_t GPREGRET2; /*!< (@ 0x00000520) General purpose retention register */
+ __IM uint32_t RESERVED10[21];
+ __IOM uint32_t DCDCEN; /*!< (@ 0x00000578) Enable DC/DC converter for REG1 stage */
+ __IM uint32_t RESERVED11[49];
+ __IM uint32_t MAINREGSTATUS; /*!< (@ 0x00000640) Main supply status */
+ __IM uint32_t RESERVED12[175];
+ __IOM POWER_RAM_Type RAM[9]; /*!< (@ 0x00000900) Unspecified */
+} NRF_POWER_Type; /*!< Size = 2448 (0x990) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ P0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief GPIO Port 1 (P0)
+ */
+
+typedef struct { /*!< (@ 0x50000000) P0 Structure */
+ __IM uint32_t RESERVED[321];
+ __IOM uint32_t OUT; /*!< (@ 0x00000504) Write GPIO port */
+ __IOM uint32_t OUTSET; /*!< (@ 0x00000508) Set individual bits in GPIO port */
+ __IOM uint32_t OUTCLR; /*!< (@ 0x0000050C) Clear individual bits in GPIO port */
+ __IM uint32_t IN; /*!< (@ 0x00000510) Read GPIO port */
+ __IOM uint32_t DIR; /*!< (@ 0x00000514) Direction of GPIO pins */
+ __IOM uint32_t DIRSET; /*!< (@ 0x00000518) DIR set register */
+ __IOM uint32_t DIRCLR; /*!< (@ 0x0000051C) DIR clear register */
+ __IOM uint32_t LATCH; /*!< (@ 0x00000520) Latch register indicating what GPIO pins that
+ have met the criteria set in the PIN_CNF[n].SENSE
+ registers */
+ __IOM uint32_t DETECTMODE; /*!< (@ 0x00000524) Select between default DETECT signal behaviour
+ and LDETECT mode */
+ __IM uint32_t RESERVED1[118];
+ __IOM uint32_t PIN_CNF[32]; /*!< (@ 0x00000700) Description collection: Configuration of GPIO
+ pins */
+} NRF_GPIO_Type; /*!< Size = 1920 (0x780) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ RADIO ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief 2.4 GHz radio (RADIO)
+ */
+
+typedef struct { /*!< (@ 0x40001000) RADIO Structure */
+ __OM uint32_t TASKS_TXEN; /*!< (@ 0x00000000) Enable RADIO in TX mode */
+ __OM uint32_t TASKS_RXEN; /*!< (@ 0x00000004) Enable RADIO in RX mode */
+ __OM uint32_t TASKS_START; /*!< (@ 0x00000008) Start RADIO */
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x0000000C) Stop RADIO */
+ __OM uint32_t TASKS_DISABLE; /*!< (@ 0x00000010) Disable RADIO */
+ __OM uint32_t TASKS_RSSISTART; /*!< (@ 0x00000014) Start the RSSI and take one single sample of
+ the receive signal strength */
+ __OM uint32_t TASKS_RSSISTOP; /*!< (@ 0x00000018) Stop the RSSI measurement */
+ __OM uint32_t TASKS_BCSTART; /*!< (@ 0x0000001C) Start the bit counter */
+ __OM uint32_t TASKS_BCSTOP; /*!< (@ 0x00000020) Stop the bit counter */
+ __OM uint32_t TASKS_EDSTART; /*!< (@ 0x00000024) Start the energy detect measurement used in IEEE
+ 802.15.4 mode */
+ __OM uint32_t TASKS_EDSTOP; /*!< (@ 0x00000028) Stop the energy detect measurement */
+ __OM uint32_t TASKS_CCASTART; /*!< (@ 0x0000002C) Start the clear channel assessment used in IEEE
+ 802.15.4 mode */
+ __OM uint32_t TASKS_CCASTOP; /*!< (@ 0x00000030) Stop the clear channel assessment */
+ __IM uint32_t RESERVED[51];
+ __IOM uint32_t EVENTS_READY; /*!< (@ 0x00000100) RADIO has ramped up and is ready to be started */
+ __IOM uint32_t EVENTS_ADDRESS; /*!< (@ 0x00000104) Address sent or received */
+ __IOM uint32_t EVENTS_PAYLOAD; /*!< (@ 0x00000108) Packet payload sent or received */
+ __IOM uint32_t EVENTS_END; /*!< (@ 0x0000010C) Packet sent or received */
+ __IOM uint32_t EVENTS_DISABLED; /*!< (@ 0x00000110) RADIO has been disabled */
+ __IOM uint32_t EVENTS_DEVMATCH; /*!< (@ 0x00000114) A device address match occurred on the last received
+ packet */
+ __IOM uint32_t EVENTS_DEVMISS; /*!< (@ 0x00000118) No device address match occurred on the last
+ received packet */
+ __IOM uint32_t EVENTS_RSSIEND; /*!< (@ 0x0000011C) Sampling of receive signal strength complete */
+ __IM uint32_t RESERVED1[2];
+ __IOM uint32_t EVENTS_BCMATCH; /*!< (@ 0x00000128) Bit counter reached bit count value */
+ __IM uint32_t RESERVED2;
+ __IOM uint32_t EVENTS_CRCOK; /*!< (@ 0x00000130) Packet received with CRC ok */
+ __IOM uint32_t EVENTS_CRCERROR; /*!< (@ 0x00000134) Packet received with CRC error */
+ __IOM uint32_t EVENTS_FRAMESTART; /*!< (@ 0x00000138) IEEE 802.15.4 length field received */
+ __IOM uint32_t EVENTS_EDEND; /*!< (@ 0x0000013C) Sampling of energy detection complete. A new
+ ED sample is ready for readout from the
+ RADIO.EDSAMPLE register */
+ __IOM uint32_t EVENTS_EDSTOPPED; /*!< (@ 0x00000140) The sampling of energy detection has stopped */
+ __IOM uint32_t EVENTS_CCAIDLE; /*!< (@ 0x00000144) Wireless medium in idle - clear to send */
+ __IOM uint32_t EVENTS_CCABUSY; /*!< (@ 0x00000148) Wireless medium busy - do not send */
+ __IOM uint32_t EVENTS_CCASTOPPED; /*!< (@ 0x0000014C) The CCA has stopped */
+ __IOM uint32_t EVENTS_RATEBOOST; /*!< (@ 0x00000150) Ble_LR CI field received, receive mode is changed
+ from Ble_LR125Kbit to Ble_LR500Kbit. */
+ __IOM uint32_t EVENTS_TXREADY; /*!< (@ 0x00000154) RADIO has ramped up and is ready to be started
+ TX path */
+ __IOM uint32_t EVENTS_RXREADY; /*!< (@ 0x00000158) RADIO has ramped up and is ready to be started
+ RX path */
+ __IOM uint32_t EVENTS_MHRMATCH; /*!< (@ 0x0000015C) MAC header match found */
+ __IM uint32_t RESERVED3[3];
+ __IOM uint32_t EVENTS_PHYEND; /*!< (@ 0x0000016C) Generated when last bit is sent on air */
+ __IOM uint32_t EVENTS_CTEPRESENT; /*!< (@ 0x00000170) CTE is present (early warning right after receiving
+ CTEInfo byte) */
+ __IM uint32_t RESERVED4[35];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED5[64];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED6[61];
+ __IM uint32_t CRCSTATUS; /*!< (@ 0x00000400) CRC status */
+ __IM uint32_t RESERVED7;
+ __IM uint32_t RXMATCH; /*!< (@ 0x00000408) Received address */
+ __IM uint32_t RXCRC; /*!< (@ 0x0000040C) CRC field of previously received packet */
+ __IM uint32_t DAI; /*!< (@ 0x00000410) Device address match index */
+ __IM uint32_t PDUSTAT; /*!< (@ 0x00000414) Payload status */
+ __IM uint32_t RESERVED8[13];
+ __IM uint32_t CTESTATUS; /*!< (@ 0x0000044C) CTEInfo parsed from received packet */
+ __IM uint32_t RESERVED9[2];
+ __IM uint32_t DFESTATUS; /*!< (@ 0x00000458) DFE status information */
+ __IM uint32_t RESERVED10[42];
+ __IOM uint32_t PACKETPTR; /*!< (@ 0x00000504) Packet pointer */
+ __IOM uint32_t FREQUENCY; /*!< (@ 0x00000508) Frequency */
+ __IOM uint32_t TXPOWER; /*!< (@ 0x0000050C) Output power */
+ __IOM uint32_t MODE; /*!< (@ 0x00000510) Data rate and modulation */
+ __IOM uint32_t PCNF0; /*!< (@ 0x00000514) Packet configuration register 0 */
+ __IOM uint32_t PCNF1; /*!< (@ 0x00000518) Packet configuration register 1 */
+ __IOM uint32_t BASE0; /*!< (@ 0x0000051C) Base address 0 */
+ __IOM uint32_t BASE1; /*!< (@ 0x00000520) Base address 1 */
+ __IOM uint32_t PREFIX0; /*!< (@ 0x00000524) Prefixes bytes for logical addresses 0-3 */
+ __IOM uint32_t PREFIX1; /*!< (@ 0x00000528) Prefixes bytes for logical addresses 4-7 */
+ __IOM uint32_t TXADDRESS; /*!< (@ 0x0000052C) Transmit address select */
+ __IOM uint32_t RXADDRESSES; /*!< (@ 0x00000530) Receive address select */
+ __IOM uint32_t CRCCNF; /*!< (@ 0x00000534) CRC configuration */
+ __IOM uint32_t CRCPOLY; /*!< (@ 0x00000538) CRC polynomial */
+ __IOM uint32_t CRCINIT; /*!< (@ 0x0000053C) CRC initial value */
+ __IM uint32_t RESERVED11;
+ __IOM uint32_t TIFS; /*!< (@ 0x00000544) Interframe spacing in us */
+ __IM uint32_t RSSISAMPLE; /*!< (@ 0x00000548) RSSI sample */
+ __IM uint32_t RESERVED12;
+ __IM uint32_t STATE; /*!< (@ 0x00000550) Current radio state */
+ __IOM uint32_t DATAWHITEIV; /*!< (@ 0x00000554) Data whitening initial value */
+ __IM uint32_t RESERVED13[2];
+ __IOM uint32_t BCC; /*!< (@ 0x00000560) Bit counter compare */
+ __IM uint32_t RESERVED14[39];
+ __IOM uint32_t DAB[8]; /*!< (@ 0x00000600) Description collection: Device address base segment
+ n */
+ __IOM uint32_t DAP[8]; /*!< (@ 0x00000620) Description collection: Device address prefix
+ n */
+ __IOM uint32_t DACNF; /*!< (@ 0x00000640) Device address match configuration */
+ __IOM uint32_t MHRMATCHCONF; /*!< (@ 0x00000644) Search pattern configuration */
+ __IOM uint32_t MHRMATCHMAS; /*!< (@ 0x00000648) Pattern mask */
+ __IM uint32_t RESERVED15;
+ __IOM uint32_t MODECNF0; /*!< (@ 0x00000650) Radio mode configuration register 0 */
+ __IM uint32_t RESERVED16[3];
+ __IOM uint32_t SFD; /*!< (@ 0x00000660) IEEE 802.15.4 start of frame delimiter */
+ __IOM uint32_t EDCNT; /*!< (@ 0x00000664) IEEE 802.15.4 energy detect loop count */
+ __IOM uint32_t EDSAMPLE; /*!< (@ 0x00000668) IEEE 802.15.4 energy detect level */
+ __IOM uint32_t CCACTRL; /*!< (@ 0x0000066C) IEEE 802.15.4 clear channel assessment control */
+ __IM uint32_t RESERVED17[164];
+ __IOM uint32_t DFEMODE; /*!< (@ 0x00000900) Whether to use Angle-of-Arrival (AOA) or Angle-of-Departure
+ (AOD) */
+ __IOM uint32_t CTEINLINECONF; /*!< (@ 0x00000904) Configuration for CTE inline mode */
+ __IM uint32_t RESERVED18[2];
+ __IOM uint32_t DFECTRL1; /*!< (@ 0x00000910) Various configuration for Direction finding */
+ __IOM uint32_t DFECTRL2; /*!< (@ 0x00000914) Start offset for Direction finding */
+ __IM uint32_t RESERVED19[4];
+ __IOM uint32_t SWITCHPATTERN; /*!< (@ 0x00000928) GPIO patterns to be used for each antenna */
+ __IOM uint32_t CLEARPATTERN; /*!< (@ 0x0000092C) Clear the GPIO pattern array for antenna control */
+ __IOM RADIO_PSEL_Type PSEL; /*!< (@ 0x00000930) Unspecified */
+ __IOM RADIO_DFEPACKET_Type DFEPACKET; /*!< (@ 0x00000950) DFE packet EasyDMA channel */
+ __IM uint32_t RESERVED20[424];
+ __IOM uint32_t POWER; /*!< (@ 0x00000FFC) Peripheral power control */
+} NRF_RADIO_Type; /*!< Size = 4096 (0x1000) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ UART0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Universal Asynchronous Receiver/Transmitter (UART0)
+ */
+
+typedef struct { /*!< (@ 0x40002000) UART0 Structure */
+ __OM uint32_t TASKS_STARTRX; /*!< (@ 0x00000000) Start UART receiver */
+ __OM uint32_t TASKS_STOPRX; /*!< (@ 0x00000004) Stop UART receiver */
+ __OM uint32_t TASKS_STARTTX; /*!< (@ 0x00000008) Start UART transmitter */
+ __OM uint32_t TASKS_STOPTX; /*!< (@ 0x0000000C) Stop UART transmitter */
+ __IM uint32_t RESERVED[3];
+ __OM uint32_t TASKS_SUSPEND; /*!< (@ 0x0000001C) Suspend UART */
+ __IM uint32_t RESERVED1[56];
+ __IOM uint32_t EVENTS_CTS; /*!< (@ 0x00000100) CTS is activated (set low). Clear To Send. */
+ __IOM uint32_t EVENTS_NCTS; /*!< (@ 0x00000104) CTS is deactivated (set high). Not Clear To Send. */
+ __IOM uint32_t EVENTS_RXDRDY; /*!< (@ 0x00000108) Data received in RXD */
+ __IM uint32_t RESERVED2[4];
+ __IOM uint32_t EVENTS_TXDRDY; /*!< (@ 0x0000011C) Data sent from TXD */
+ __IM uint32_t RESERVED3;
+ __IOM uint32_t EVENTS_ERROR; /*!< (@ 0x00000124) Error detected */
+ __IM uint32_t RESERVED4[7];
+ __IOM uint32_t EVENTS_RXTO; /*!< (@ 0x00000144) Receiver timeout */
+ __IM uint32_t RESERVED5[46];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED6[64];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED7[93];
+ __IOM uint32_t ERRORSRC; /*!< (@ 0x00000480) Error source */
+ __IM uint32_t RESERVED8[31];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable UART */
+ __IM uint32_t RESERVED9;
+ __IOM UART_PSEL_Type PSEL; /*!< (@ 0x00000508) Unspecified */
+ __IM uint32_t RXD; /*!< (@ 0x00000518) RXD register */
+ __OM uint32_t TXD; /*!< (@ 0x0000051C) TXD register */
+ __IM uint32_t RESERVED10;
+ __IOM uint32_t BAUDRATE; /*!< (@ 0x00000524) Baud rate. Accuracy depends on the HFCLK source
+ selected. */
+ __IM uint32_t RESERVED11[17];
+ __IOM uint32_t CONFIG; /*!< (@ 0x0000056C) Configuration of parity and hardware flow control */
+} NRF_UART_Type; /*!< Size = 1392 (0x570) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ UARTE0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief UART with EasyDMA 0 (UARTE0)
+ */
+
+typedef struct { /*!< (@ 0x40002000) UARTE0 Structure */
+ __OM uint32_t TASKS_STARTRX; /*!< (@ 0x00000000) Start UART receiver */
+ __OM uint32_t TASKS_STOPRX; /*!< (@ 0x00000004) Stop UART receiver */
+ __OM uint32_t TASKS_STARTTX; /*!< (@ 0x00000008) Start UART transmitter */
+ __OM uint32_t TASKS_STOPTX; /*!< (@ 0x0000000C) Stop UART transmitter */
+ __IM uint32_t RESERVED[7];
+ __OM uint32_t TASKS_FLUSHRX; /*!< (@ 0x0000002C) Flush RX FIFO into RX buffer */
+ __IM uint32_t RESERVED1[52];
+ __IOM uint32_t EVENTS_CTS; /*!< (@ 0x00000100) CTS is activated (set low). Clear To Send. */
+ __IOM uint32_t EVENTS_NCTS; /*!< (@ 0x00000104) CTS is deactivated (set high). Not Clear To Send. */
+ __IOM uint32_t EVENTS_RXDRDY; /*!< (@ 0x00000108) Data received in RXD (but potentially not yet
+ transferred to Data RAM) */
+ __IM uint32_t RESERVED2;
+ __IOM uint32_t EVENTS_ENDRX; /*!< (@ 0x00000110) Receive buffer is filled up */
+ __IM uint32_t RESERVED3[2];
+ __IOM uint32_t EVENTS_TXDRDY; /*!< (@ 0x0000011C) Data sent from TXD */
+ __IOM uint32_t EVENTS_ENDTX; /*!< (@ 0x00000120) Last TX byte transmitted */
+ __IOM uint32_t EVENTS_ERROR; /*!< (@ 0x00000124) Error detected */
+ __IM uint32_t RESERVED4[7];
+ __IOM uint32_t EVENTS_RXTO; /*!< (@ 0x00000144) Receiver timeout */
+ __IM uint32_t RESERVED5;
+ __IOM uint32_t EVENTS_RXSTARTED; /*!< (@ 0x0000014C) UART receiver has started */
+ __IOM uint32_t EVENTS_TXSTARTED; /*!< (@ 0x00000150) UART transmitter has started */
+ __IM uint32_t RESERVED6;
+ __IOM uint32_t EVENTS_TXSTOPPED; /*!< (@ 0x00000158) Transmitter stopped */
+ __IM uint32_t RESERVED7[41];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED8[63];
+ __IOM uint32_t INTEN; /*!< (@ 0x00000300) Enable or disable interrupt */
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED9[93];
+ __IOM uint32_t ERRORSRC; /*!< (@ 0x00000480) Error source Note : this register is read / write
+ one to clear. */
+ __IM uint32_t RESERVED10[31];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable UART */
+ __IM uint32_t RESERVED11;
+ __IOM UARTE_PSEL_Type PSEL; /*!< (@ 0x00000508) Unspecified */
+ __IM uint32_t RESERVED12[3];
+ __IOM uint32_t BAUDRATE; /*!< (@ 0x00000524) Baud rate. Accuracy depends on the HFCLK source
+ selected. */
+ __IM uint32_t RESERVED13[3];
+ __IOM UARTE_RXD_Type RXD; /*!< (@ 0x00000534) RXD EasyDMA channel */
+ __IM uint32_t RESERVED14;
+ __IOM UARTE_TXD_Type TXD; /*!< (@ 0x00000544) TXD EasyDMA channel */
+ __IM uint32_t RESERVED15[7];
+ __IOM uint32_t CONFIG; /*!< (@ 0x0000056C) Configuration of parity and hardware flow control */
+} NRF_UARTE_Type; /*!< Size = 1392 (0x570) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ SPI0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Serial Peripheral Interface 0 (SPI0)
+ */
+
+typedef struct { /*!< (@ 0x40003000) SPI0 Structure */
+ __IM uint32_t RESERVED[66];
+ __IOM uint32_t EVENTS_READY; /*!< (@ 0x00000108) TXD byte sent and RXD byte received */
+ __IM uint32_t RESERVED1[126];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED2[125];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable SPI */
+ __IM uint32_t RESERVED3;
+ __IOM SPI_PSEL_Type PSEL; /*!< (@ 0x00000508) Unspecified */
+ __IM uint32_t RESERVED4;
+ __IM uint32_t RXD; /*!< (@ 0x00000518) RXD register */
+ __IOM uint32_t TXD; /*!< (@ 0x0000051C) TXD register */
+ __IM uint32_t RESERVED5;
+ __IOM uint32_t FREQUENCY; /*!< (@ 0x00000524) SPI frequency. Accuracy depends on the HFCLK
+ source selected. */
+ __IM uint32_t RESERVED6[11];
+ __IOM uint32_t CONFIG; /*!< (@ 0x00000554) Configuration register */
+} NRF_SPI_Type; /*!< Size = 1368 (0x558) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ SPIM0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Serial Peripheral Interface Master with EasyDMA 0 (SPIM0)
+ */
+
+typedef struct { /*!< (@ 0x40003000) SPIM0 Structure */
+ __IM uint32_t RESERVED[4];
+ __OM uint32_t TASKS_START; /*!< (@ 0x00000010) Start SPI transaction */
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000014) Stop SPI transaction */
+ __IM uint32_t RESERVED1;
+ __OM uint32_t TASKS_SUSPEND; /*!< (@ 0x0000001C) Suspend SPI transaction */
+ __OM uint32_t TASKS_RESUME; /*!< (@ 0x00000020) Resume SPI transaction */
+ __IM uint32_t RESERVED2[56];
+ __IOM uint32_t EVENTS_STOPPED; /*!< (@ 0x00000104) SPI transaction has stopped */
+ __IM uint32_t RESERVED3[2];
+ __IOM uint32_t EVENTS_ENDRX; /*!< (@ 0x00000110) End of RXD buffer reached */
+ __IM uint32_t RESERVED4;
+ __IOM uint32_t EVENTS_END; /*!< (@ 0x00000118) End of RXD buffer and TXD buffer reached */
+ __IM uint32_t RESERVED5;
+ __IOM uint32_t EVENTS_ENDTX; /*!< (@ 0x00000120) End of TXD buffer reached */
+ __IM uint32_t RESERVED6[10];
+ __IOM uint32_t EVENTS_STARTED; /*!< (@ 0x0000014C) Transaction started */
+ __IM uint32_t RESERVED7[44];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED8[64];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED9[61];
+ __IOM uint32_t STALLSTAT; /*!< (@ 0x00000400) Stall status for EasyDMA RAM accesses. The fields
+ in this register is set to STALL by hardware
+ whenever a stall occurres and can be cleared
+ (set to NOSTALL) by the CPU. */
+ __IM uint32_t RESERVED10[63];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable SPIM */
+ __IM uint32_t RESERVED11;
+ __IOM SPIM_PSEL_Type PSEL; /*!< (@ 0x00000508) Unspecified */
+ __IM uint32_t RESERVED12[3];
+ __IOM uint32_t FREQUENCY; /*!< (@ 0x00000524) SPI frequency. Accuracy depends on the HFCLK
+ source selected. */
+ __IM uint32_t RESERVED13[3];
+ __IOM SPIM_RXD_Type RXD; /*!< (@ 0x00000534) RXD EasyDMA channel */
+ __IOM SPIM_TXD_Type TXD; /*!< (@ 0x00000544) TXD EasyDMA channel */
+ __IOM uint32_t CONFIG; /*!< (@ 0x00000554) Configuration register */
+ __IM uint32_t RESERVED14[2];
+ __IOM SPIM_IFTIMING_Type IFTIMING; /*!< (@ 0x00000560) Unspecified */
+ __IOM uint32_t CSNPOL; /*!< (@ 0x00000568) Polarity of CSN output */
+ __IOM uint32_t PSELDCX; /*!< (@ 0x0000056C) Pin select for DCX signal */
+ __IOM uint32_t DCXCNT; /*!< (@ 0x00000570) DCX configuration */
+ __IM uint32_t RESERVED15[19];
+ __IOM uint32_t ORC; /*!< (@ 0x000005C0) Byte transmitted after TXD.MAXCNT bytes have
+ been transmitted in the case when RXD.MAXCNT
+ is greater than TXD.MAXCNT */
+} NRF_SPIM_Type; /*!< Size = 1476 (0x5c4) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ SPIS0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief SPI Slave 0 (SPIS0)
+ */
+
+typedef struct { /*!< (@ 0x40003000) SPIS0 Structure */
+ __IM uint32_t RESERVED[9];
+ __OM uint32_t TASKS_ACQUIRE; /*!< (@ 0x00000024) Acquire SPI semaphore */
+ __OM uint32_t TASKS_RELEASE; /*!< (@ 0x00000028) Release SPI semaphore, enabling the SPI slave
+ to acquire it */
+ __IM uint32_t RESERVED1[54];
+ __IOM uint32_t EVENTS_END; /*!< (@ 0x00000104) Granted transaction completed */
+ __IM uint32_t RESERVED2[2];
+ __IOM uint32_t EVENTS_ENDRX; /*!< (@ 0x00000110) End of RXD buffer reached */
+ __IM uint32_t RESERVED3[5];
+ __IOM uint32_t EVENTS_ACQUIRED; /*!< (@ 0x00000128) Semaphore acquired */
+ __IM uint32_t RESERVED4[53];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED5[64];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED6[61];
+ __IM uint32_t SEMSTAT; /*!< (@ 0x00000400) Semaphore status register */
+ __IM uint32_t RESERVED7[15];
+ __IOM uint32_t STATUS; /*!< (@ 0x00000440) Status from last transaction */
+ __IM uint32_t RESERVED8[47];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable SPI slave */
+ __IM uint32_t RESERVED9;
+ __IOM SPIS_PSEL_Type PSEL; /*!< (@ 0x00000508) Unspecified */
+ __IM uint32_t RESERVED10[7];
+ __IOM SPIS_RXD_Type RXD; /*!< (@ 0x00000534) Unspecified */
+ __IOM SPIS_TXD_Type TXD; /*!< (@ 0x00000544) Unspecified */
+ __IOM uint32_t CONFIG; /*!< (@ 0x00000554) Configuration register */
+ __IM uint32_t RESERVED11;
+ __IOM uint32_t DEF; /*!< (@ 0x0000055C) Default character. Character clocked out in case
+ of an ignored transaction. */
+ __IM uint32_t RESERVED12[24];
+ __IOM uint32_t ORC; /*!< (@ 0x000005C0) Over-read character */
+} NRF_SPIS_Type; /*!< Size = 1476 (0x5c4) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ TWI0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief I2C compatible Two-Wire Interface 0 (TWI0)
+ */
+
+typedef struct { /*!< (@ 0x40003000) TWI0 Structure */
+ __OM uint32_t TASKS_STARTRX; /*!< (@ 0x00000000) Start TWI receive sequence */
+ __IM uint32_t RESERVED;
+ __OM uint32_t TASKS_STARTTX; /*!< (@ 0x00000008) Start TWI transmit sequence */
+ __IM uint32_t RESERVED1[2];
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000014) Stop TWI transaction */
+ __IM uint32_t RESERVED2;
+ __OM uint32_t TASKS_SUSPEND; /*!< (@ 0x0000001C) Suspend TWI transaction */
+ __OM uint32_t TASKS_RESUME; /*!< (@ 0x00000020) Resume TWI transaction */
+ __IM uint32_t RESERVED3[56];
+ __IOM uint32_t EVENTS_STOPPED; /*!< (@ 0x00000104) TWI stopped */
+ __IOM uint32_t EVENTS_RXDREADY; /*!< (@ 0x00000108) TWI RXD byte received */
+ __IM uint32_t RESERVED4[4];
+ __IOM uint32_t EVENTS_TXDSENT; /*!< (@ 0x0000011C) TWI TXD byte sent */
+ __IM uint32_t RESERVED5;
+ __IOM uint32_t EVENTS_ERROR; /*!< (@ 0x00000124) TWI error */
+ __IM uint32_t RESERVED6[4];
+ __IOM uint32_t EVENTS_BB; /*!< (@ 0x00000138) TWI byte boundary, generated before each byte
+ that is sent or received */
+ __IM uint32_t RESERVED7[3];
+ __IOM uint32_t EVENTS_SUSPENDED; /*!< (@ 0x00000148) TWI entered the suspended state */
+ __IM uint32_t RESERVED8[45];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED9[64];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED10[110];
+ __IOM uint32_t ERRORSRC; /*!< (@ 0x000004C4) Error source */
+ __IM uint32_t RESERVED11[14];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable TWI */
+ __IM uint32_t RESERVED12;
+ __IOM TWI_PSEL_Type PSEL; /*!< (@ 0x00000508) Unspecified */
+ __IM uint32_t RESERVED13[2];
+ __IM uint32_t RXD; /*!< (@ 0x00000518) RXD register */
+ __IOM uint32_t TXD; /*!< (@ 0x0000051C) TXD register */
+ __IM uint32_t RESERVED14;
+ __IOM uint32_t FREQUENCY; /*!< (@ 0x00000524) TWI frequency. Accuracy depends on the HFCLK
+ source selected. */
+ __IM uint32_t RESERVED15[24];
+ __IOM uint32_t ADDRESS; /*!< (@ 0x00000588) Address used in the TWI transfer */
+} NRF_TWI_Type; /*!< Size = 1420 (0x58c) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ TWIM0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief I2C compatible Two-Wire Master Interface with EasyDMA 0 (TWIM0)
+ */
+
+typedef struct { /*!< (@ 0x40003000) TWIM0 Structure */
+ __OM uint32_t TASKS_STARTRX; /*!< (@ 0x00000000) Start TWI receive sequence */
+ __IM uint32_t RESERVED;
+ __OM uint32_t TASKS_STARTTX; /*!< (@ 0x00000008) Start TWI transmit sequence */
+ __IM uint32_t RESERVED1[2];
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000014) Stop TWI transaction. Must be issued while the
+ TWI master is not suspended. */
+ __IM uint32_t RESERVED2;
+ __OM uint32_t TASKS_SUSPEND; /*!< (@ 0x0000001C) Suspend TWI transaction */
+ __OM uint32_t TASKS_RESUME; /*!< (@ 0x00000020) Resume TWI transaction */
+ __IM uint32_t RESERVED3[56];
+ __IOM uint32_t EVENTS_STOPPED; /*!< (@ 0x00000104) TWI stopped */
+ __IM uint32_t RESERVED4[7];
+ __IOM uint32_t EVENTS_ERROR; /*!< (@ 0x00000124) TWI error */
+ __IM uint32_t RESERVED5[8];
+ __IOM uint32_t EVENTS_SUSPENDED; /*!< (@ 0x00000148) Last byte has been sent out after the SUSPEND
+ task has been issued, TWI traffic is now
+ suspended. */
+ __IOM uint32_t EVENTS_RXSTARTED; /*!< (@ 0x0000014C) Receive sequence started */
+ __IOM uint32_t EVENTS_TXSTARTED; /*!< (@ 0x00000150) Transmit sequence started */
+ __IM uint32_t RESERVED6[2];
+ __IOM uint32_t EVENTS_LASTRX; /*!< (@ 0x0000015C) Byte boundary, starting to receive the last byte */
+ __IOM uint32_t EVENTS_LASTTX; /*!< (@ 0x00000160) Byte boundary, starting to transmit the last
+ byte */
+ __IM uint32_t RESERVED7[39];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED8[63];
+ __IOM uint32_t INTEN; /*!< (@ 0x00000300) Enable or disable interrupt */
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED9[110];
+ __IOM uint32_t ERRORSRC; /*!< (@ 0x000004C4) Error source */
+ __IM uint32_t RESERVED10[14];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable TWIM */
+ __IM uint32_t RESERVED11;
+ __IOM TWIM_PSEL_Type PSEL; /*!< (@ 0x00000508) Unspecified */
+ __IM uint32_t RESERVED12[5];
+ __IOM uint32_t FREQUENCY; /*!< (@ 0x00000524) TWI frequency. Accuracy depends on the HFCLK
+ source selected. */
+ __IM uint32_t RESERVED13[3];
+ __IOM TWIM_RXD_Type RXD; /*!< (@ 0x00000534) RXD EasyDMA channel */
+ __IOM TWIM_TXD_Type TXD; /*!< (@ 0x00000544) TXD EasyDMA channel */
+ __IM uint32_t RESERVED14[13];
+ __IOM uint32_t ADDRESS; /*!< (@ 0x00000588) Address used in the TWI transfer */
+} NRF_TWIM_Type; /*!< Size = 1420 (0x58c) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ TWIS0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief I2C compatible Two-Wire Slave Interface with EasyDMA 0 (TWIS0)
+ */
+
+typedef struct { /*!< (@ 0x40003000) TWIS0 Structure */
+ __IM uint32_t RESERVED[5];
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000014) Stop TWI transaction */
+ __IM uint32_t RESERVED1;
+ __OM uint32_t TASKS_SUSPEND; /*!< (@ 0x0000001C) Suspend TWI transaction */
+ __OM uint32_t TASKS_RESUME; /*!< (@ 0x00000020) Resume TWI transaction */
+ __IM uint32_t RESERVED2[3];
+ __OM uint32_t TASKS_PREPARERX; /*!< (@ 0x00000030) Prepare the TWI slave to respond to a write command */
+ __OM uint32_t TASKS_PREPARETX; /*!< (@ 0x00000034) Prepare the TWI slave to respond to a read command */
+ __IM uint32_t RESERVED3[51];
+ __IOM uint32_t EVENTS_STOPPED; /*!< (@ 0x00000104) TWI stopped */
+ __IM uint32_t RESERVED4[7];
+ __IOM uint32_t EVENTS_ERROR; /*!< (@ 0x00000124) TWI error */
+ __IM uint32_t RESERVED5[9];
+ __IOM uint32_t EVENTS_RXSTARTED; /*!< (@ 0x0000014C) Receive sequence started */
+ __IOM uint32_t EVENTS_TXSTARTED; /*!< (@ 0x00000150) Transmit sequence started */
+ __IM uint32_t RESERVED6[4];
+ __IOM uint32_t EVENTS_WRITE; /*!< (@ 0x00000164) Write command received */
+ __IOM uint32_t EVENTS_READ; /*!< (@ 0x00000168) Read command received */
+ __IM uint32_t RESERVED7[37];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED8[63];
+ __IOM uint32_t INTEN; /*!< (@ 0x00000300) Enable or disable interrupt */
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED9[113];
+ __IOM uint32_t ERRORSRC; /*!< (@ 0x000004D0) Error source */
+ __IM uint32_t MATCH; /*!< (@ 0x000004D4) Status register indicating which address had
+ a match */
+ __IM uint32_t RESERVED10[10];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable TWIS */
+ __IM uint32_t RESERVED11;
+ __IOM TWIS_PSEL_Type PSEL; /*!< (@ 0x00000508) Unspecified */
+ __IM uint32_t RESERVED12[9];
+ __IOM TWIS_RXD_Type RXD; /*!< (@ 0x00000534) RXD EasyDMA channel */
+ __IOM TWIS_TXD_Type TXD; /*!< (@ 0x00000544) TXD EasyDMA channel */
+ __IM uint32_t RESERVED13[13];
+ __IOM uint32_t ADDRESS[2]; /*!< (@ 0x00000588) Description collection: TWI slave address n */
+ __IM uint32_t RESERVED14;
+ __IOM uint32_t CONFIG; /*!< (@ 0x00000594) Configuration register for the address match
+ mechanism */
+ __IM uint32_t RESERVED15[10];
+ __IOM uint32_t ORC; /*!< (@ 0x000005C0) Over-read character. Character sent out in case
+ of an over-read of the transmit buffer. */
+} NRF_TWIS_Type; /*!< Size = 1476 (0x5c4) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ NFCT ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief NFC-A compatible radio (NFCT)
+ */
+
+typedef struct { /*!< (@ 0x40005000) NFCT Structure */
+ __OM uint32_t TASKS_ACTIVATE; /*!< (@ 0x00000000) Activate NFCT peripheral for incoming and outgoing
+ frames, change state to activated */
+ __OM uint32_t TASKS_DISABLE; /*!< (@ 0x00000004) Disable NFCT peripheral */
+ __OM uint32_t TASKS_SENSE; /*!< (@ 0x00000008) Enable NFC sense field mode, change state to
+ sense mode */
+ __OM uint32_t TASKS_STARTTX; /*!< (@ 0x0000000C) Start transmission of an outgoing frame, change
+ state to transmit */
+ __IM uint32_t RESERVED[3];
+ __OM uint32_t TASKS_ENABLERXDATA; /*!< (@ 0x0000001C) Initializes the EasyDMA for receive. */
+ __IM uint32_t RESERVED1;
+ __OM uint32_t TASKS_GOIDLE; /*!< (@ 0x00000024) Force state machine to IDLE state */
+ __OM uint32_t TASKS_GOSLEEP; /*!< (@ 0x00000028) Force state machine to SLEEP_A state */
+ __IM uint32_t RESERVED2[53];
+ __IOM uint32_t EVENTS_READY; /*!< (@ 0x00000100) The NFCT peripheral is ready to receive and send
+ frames */
+ __IOM uint32_t EVENTS_FIELDDETECTED; /*!< (@ 0x00000104) Remote NFC field detected */
+ __IOM uint32_t EVENTS_FIELDLOST; /*!< (@ 0x00000108) Remote NFC field lost */
+ __IOM uint32_t EVENTS_TXFRAMESTART; /*!< (@ 0x0000010C) Marks the start of the first symbol of a transmitted
+ frame */
+ __IOM uint32_t EVENTS_TXFRAMEEND; /*!< (@ 0x00000110) Marks the end of the last transmitted on-air
+ symbol of a frame */
+ __IOM uint32_t EVENTS_RXFRAMESTART; /*!< (@ 0x00000114) Marks the end of the first symbol of a received
+ frame */
+ __IOM uint32_t EVENTS_RXFRAMEEND; /*!< (@ 0x00000118) Received data has been checked (CRC, parity)
+ and transferred to RAM, and EasyDMA has
+ ended accessing the RX buffer */
+ __IOM uint32_t EVENTS_ERROR; /*!< (@ 0x0000011C) NFC error reported. The ERRORSTATUS register
+ contains details on the source of the error. */
+ __IM uint32_t RESERVED3[2];
+ __IOM uint32_t EVENTS_RXERROR; /*!< (@ 0x00000128) NFC RX frame error reported. The FRAMESTATUS.RX
+ register contains details on the source
+ of the error. */
+ __IOM uint32_t EVENTS_ENDRX; /*!< (@ 0x0000012C) RX buffer (as defined by PACKETPTR and MAXLEN)
+ in Data RAM full. */
+ __IOM uint32_t EVENTS_ENDTX; /*!< (@ 0x00000130) Transmission of data in RAM has ended, and EasyDMA
+ has ended accessing the TX buffer */
+ __IM uint32_t RESERVED4;
+ __IOM uint32_t EVENTS_AUTOCOLRESSTARTED; /*!< (@ 0x00000138) Auto collision resolution process has started */
+ __IM uint32_t RESERVED5[3];
+ __IOM uint32_t EVENTS_COLLISION; /*!< (@ 0x00000148) NFC auto collision resolution error reported. */
+ __IOM uint32_t EVENTS_SELECTED; /*!< (@ 0x0000014C) NFC auto collision resolution successfully completed */
+ __IOM uint32_t EVENTS_STARTED; /*!< (@ 0x00000150) EasyDMA is ready to receive or send frames. */
+ __IM uint32_t RESERVED6[43];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED7[63];
+ __IOM uint32_t INTEN; /*!< (@ 0x00000300) Enable or disable interrupt */
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED8[62];
+ __IOM uint32_t ERRORSTATUS; /*!< (@ 0x00000404) NFC Error Status register */
+ __IM uint32_t RESERVED9;
+ __IOM NFCT_FRAMESTATUS_Type FRAMESTATUS; /*!< (@ 0x0000040C) Unspecified */
+ __IM uint32_t NFCTAGSTATE; /*!< (@ 0x00000410) NfcTag state register */
+ __IM uint32_t RESERVED10[3];
+ __IM uint32_t SLEEPSTATE; /*!< (@ 0x00000420) Sleep state during automatic collision resolution */
+ __IM uint32_t RESERVED11[6];
+ __IM uint32_t FIELDPRESENT; /*!< (@ 0x0000043C) Indicates the presence or not of a valid field */
+ __IM uint32_t RESERVED12[49];
+ __IOM uint32_t FRAMEDELAYMIN; /*!< (@ 0x00000504) Minimum frame delay */
+ __IOM uint32_t FRAMEDELAYMAX; /*!< (@ 0x00000508) Maximum frame delay */
+ __IOM uint32_t FRAMEDELAYMODE; /*!< (@ 0x0000050C) Configuration register for the Frame Delay Timer */
+ __IOM uint32_t PACKETPTR; /*!< (@ 0x00000510) Packet pointer for TXD and RXD data storage in
+ Data RAM */
+ __IOM uint32_t MAXLEN; /*!< (@ 0x00000514) Size of the RAM buffer allocated to TXD and RXD
+ data storage each */
+ __IOM NFCT_TXD_Type TXD; /*!< (@ 0x00000518) Unspecified */
+ __IOM NFCT_RXD_Type RXD; /*!< (@ 0x00000520) Unspecified */
+ __IM uint32_t RESERVED13;
+ __IOM uint32_t MODULATIONCTRL; /*!< (@ 0x0000052C) Enables the modulation output to a GPIO pin which
+ can be connected to a second external antenna. */
+ __IM uint32_t RESERVED14[2];
+ __IOM uint32_t MODULATIONPSEL; /*!< (@ 0x00000538) Pin select for Modulation control. */
+ __IM uint32_t RESERVED15[21];
+ __IOM uint32_t NFCID1_LAST; /*!< (@ 0x00000590) Last NFCID1 part (4, 7 or 10 bytes ID) */
+ __IOM uint32_t NFCID1_2ND_LAST; /*!< (@ 0x00000594) Second last NFCID1 part (7 or 10 bytes ID) */
+ __IOM uint32_t NFCID1_3RD_LAST; /*!< (@ 0x00000598) Third last NFCID1 part (10 bytes ID) */
+ __IOM uint32_t AUTOCOLRESCONFIG; /*!< (@ 0x0000059C) Controls the auto collision resolution function.
+ This setting must be done before the NFCT
+ peripheral is activated. */
+ __IOM uint32_t SENSRES; /*!< (@ 0x000005A0) NFC-A SENS_RES auto-response settings */
+ __IOM uint32_t SELRES; /*!< (@ 0x000005A4) NFC-A SEL_RES auto-response settings */
+} NRF_NFCT_Type; /*!< Size = 1448 (0x5a8) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ GPIOTE ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief GPIO Tasks and Events (GPIOTE)
+ */
+
+typedef struct { /*!< (@ 0x40006000) GPIOTE Structure */
+ __OM uint32_t TASKS_OUT[8]; /*!< (@ 0x00000000) Description collection: Task for writing to pin
+ specified in CONFIG[n].PSEL. Action on pin
+ is configured in CONFIG[n].POLARITY. */
+ __IM uint32_t RESERVED[4];
+ __OM uint32_t TASKS_SET[8]; /*!< (@ 0x00000030) Description collection: Task for writing to pin
+ specified in CONFIG[n].PSEL. Action on pin
+ is to set it high. */
+ __IM uint32_t RESERVED1[4];
+ __OM uint32_t TASKS_CLR[8]; /*!< (@ 0x00000060) Description collection: Task for writing to pin
+ specified in CONFIG[n].PSEL. Action on pin
+ is to set it low. */
+ __IM uint32_t RESERVED2[32];
+ __IOM uint32_t EVENTS_IN[8]; /*!< (@ 0x00000100) Description collection: Event generated from
+ pin specified in CONFIG[n].PSEL */
+ __IM uint32_t RESERVED3[23];
+ __IOM uint32_t EVENTS_PORT; /*!< (@ 0x0000017C) Event generated from multiple input GPIO pins
+ with SENSE mechanism enabled */
+ __IM uint32_t RESERVED4[97];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED5[129];
+ __IOM uint32_t CONFIG[8]; /*!< (@ 0x00000510) Description collection: Configuration for OUT[n],
+ SET[n] and CLR[n] tasks and IN[n] event */
+} NRF_GPIOTE_Type; /*!< Size = 1328 (0x530) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ SAADC ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Successive approximation register (SAR) analog-to-digital converter (SAADC)
+ */
+
+typedef struct { /*!< (@ 0x40007000) SAADC Structure */
+ __OM uint32_t TASKS_START; /*!< (@ 0x00000000) Starts the SAADC and prepares the result buffer
+ in RAM */
+ __OM uint32_t TASKS_SAMPLE; /*!< (@ 0x00000004) Takes one SAADC sample */
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000008) Stops the SAADC and terminates all on-going conversions */
+ __OM uint32_t TASKS_CALIBRATEOFFSET; /*!< (@ 0x0000000C) Starts offset auto-calibration */
+ __IM uint32_t RESERVED[60];
+ __IOM uint32_t EVENTS_STARTED; /*!< (@ 0x00000100) The SAADC has started */
+ __IOM uint32_t EVENTS_END; /*!< (@ 0x00000104) The SAADC has filled up the result buffer */
+ __IOM uint32_t EVENTS_DONE; /*!< (@ 0x00000108) A conversion task has been completed. Depending
+ on the configuration, multiple conversions
+ might be needed for a result to be transferred
+ to RAM. */
+ __IOM uint32_t EVENTS_RESULTDONE; /*!< (@ 0x0000010C) Result ready for transfer to RAM */
+ __IOM uint32_t EVENTS_CALIBRATEDONE; /*!< (@ 0x00000110) Calibration is complete */
+ __IOM uint32_t EVENTS_STOPPED; /*!< (@ 0x00000114) The SAADC has stopped */
+ __IOM SAADC_EVENTS_CH_Type EVENTS_CH[8]; /*!< (@ 0x00000118) Peripheral events. */
+ __IM uint32_t RESERVED1[106];
+ __IOM uint32_t INTEN; /*!< (@ 0x00000300) Enable or disable interrupt */
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED2[61];
+ __IM uint32_t STATUS; /*!< (@ 0x00000400) Status */
+ __IM uint32_t RESERVED3[63];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable or disable SAADC */
+ __IM uint32_t RESERVED4[3];
+ __IOM SAADC_CH_Type CH[8]; /*!< (@ 0x00000510) Unspecified */
+ __IM uint32_t RESERVED5[24];
+ __IOM uint32_t RESOLUTION; /*!< (@ 0x000005F0) Resolution configuration */
+ __IOM uint32_t OVERSAMPLE; /*!< (@ 0x000005F4) Oversampling configuration. The RESOLUTION is
+ applied before averaging, thus for high
+ OVERSAMPLE a higher RESOLUTION should be
+ used. */
+ __IOM uint32_t SAMPLERATE; /*!< (@ 0x000005F8) Controls normal or continuous sample rate */
+ __IM uint32_t RESERVED6[12];
+ __IOM SAADC_RESULT_Type RESULT; /*!< (@ 0x0000062C) RESULT EasyDMA channel */
+} NRF_SAADC_Type; /*!< Size = 1592 (0x638) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ TIMER0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Timer/Counter 0 (TIMER0)
+ */
+
+typedef struct { /*!< (@ 0x40008000) TIMER0 Structure */
+ __OM uint32_t TASKS_START; /*!< (@ 0x00000000) Start Timer */
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stop Timer */
+ __OM uint32_t TASKS_COUNT; /*!< (@ 0x00000008) Increment Timer (Counter mode only) */
+ __OM uint32_t TASKS_CLEAR; /*!< (@ 0x0000000C) Clear time */
+ __OM uint32_t TASKS_SHUTDOWN; /*!< (@ 0x00000010) Deprecated register - Shut down timer */
+ __IM uint32_t RESERVED[11];
+ __OM uint32_t TASKS_CAPTURE[6]; /*!< (@ 0x00000040) Description collection: Capture Timer value to
+ CC[n] register */
+ __IM uint32_t RESERVED1[58];
+ __IOM uint32_t EVENTS_COMPARE[6]; /*!< (@ 0x00000140) Description collection: Compare event on CC[n]
+ match */
+ __IM uint32_t RESERVED2[42];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED3[64];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED4[126];
+ __IOM uint32_t MODE; /*!< (@ 0x00000504) Timer mode selection */
+ __IOM uint32_t BITMODE; /*!< (@ 0x00000508) Configure the number of bits used by the TIMER */
+ __IM uint32_t RESERVED5;
+ __IOM uint32_t PRESCALER; /*!< (@ 0x00000510) Timer prescaler register */
+ __IM uint32_t RESERVED6[11];
+ __IOM uint32_t CC[6]; /*!< (@ 0x00000540) Description collection: Capture/Compare register
+ n */
+} NRF_TIMER_Type; /*!< Size = 1368 (0x558) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ RTC0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Real time counter 0 (RTC0)
+ */
+
+typedef struct { /*!< (@ 0x4000B000) RTC0 Structure */
+ __OM uint32_t TASKS_START; /*!< (@ 0x00000000) Start RTC COUNTER */
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stop RTC COUNTER */
+ __OM uint32_t TASKS_CLEAR; /*!< (@ 0x00000008) Clear RTC COUNTER */
+ __OM uint32_t TASKS_TRIGOVRFLW; /*!< (@ 0x0000000C) Set COUNTER to 0xFFFFF0 */
+ __IM uint32_t RESERVED[60];
+ __IOM uint32_t EVENTS_TICK; /*!< (@ 0x00000100) Event on COUNTER increment */
+ __IOM uint32_t EVENTS_OVRFLW; /*!< (@ 0x00000104) Event on COUNTER overflow */
+ __IM uint32_t RESERVED1[14];
+ __IOM uint32_t EVENTS_COMPARE[4]; /*!< (@ 0x00000140) Description collection: Compare event on CC[n]
+ match */
+ __IM uint32_t RESERVED2[109];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED3[13];
+ __IOM uint32_t EVTEN; /*!< (@ 0x00000340) Enable or disable event routing */
+ __IOM uint32_t EVTENSET; /*!< (@ 0x00000344) Enable event routing */
+ __IOM uint32_t EVTENCLR; /*!< (@ 0x00000348) Disable event routing */
+ __IM uint32_t RESERVED4[110];
+ __IM uint32_t COUNTER; /*!< (@ 0x00000504) Current COUNTER value */
+ __IOM uint32_t PRESCALER; /*!< (@ 0x00000508) 12 bit prescaler for COUNTER frequency (32768/(PRESCALER+1)).Mu
+ t be written when RTC is stopped */
+ __IM uint32_t RESERVED5[13];
+ __IOM uint32_t CC[4]; /*!< (@ 0x00000540) Description collection: Compare register n */
+} NRF_RTC_Type; /*!< Size = 1360 (0x550) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ TEMP ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Temperature Sensor (TEMP)
+ */
+
+typedef struct { /*!< (@ 0x4000C000) TEMP Structure */
+ __OM uint32_t TASKS_START; /*!< (@ 0x00000000) Start temperature measurement */
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stop temperature measurement */
+ __IM uint32_t RESERVED[62];
+ __IOM uint32_t EVENTS_DATARDY; /*!< (@ 0x00000100) Temperature measurement complete, data ready */
+ __IM uint32_t RESERVED1[128];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED2[127];
+ __IM int32_t TEMP; /*!< (@ 0x00000508) Temperature in degC (0.25deg steps) */
+ __IM uint32_t RESERVED3[5];
+ __IOM uint32_t A0; /*!< (@ 0x00000520) Slope of 1st piece wise linear function */
+ __IOM uint32_t A1; /*!< (@ 0x00000524) Slope of 2nd piece wise linear function */
+ __IOM uint32_t A2; /*!< (@ 0x00000528) Slope of 3rd piece wise linear function */
+ __IOM uint32_t A3; /*!< (@ 0x0000052C) Slope of 4th piece wise linear function */
+ __IOM uint32_t A4; /*!< (@ 0x00000530) Slope of 5th piece wise linear function */
+ __IOM uint32_t A5; /*!< (@ 0x00000534) Slope of 6th piece wise linear function */
+ __IM uint32_t RESERVED4[2];
+ __IOM uint32_t B0; /*!< (@ 0x00000540) y-intercept of 1st piece wise linear function */
+ __IOM uint32_t B1; /*!< (@ 0x00000544) y-intercept of 2nd piece wise linear function */
+ __IOM uint32_t B2; /*!< (@ 0x00000548) y-intercept of 3rd piece wise linear function */
+ __IOM uint32_t B3; /*!< (@ 0x0000054C) y-intercept of 4th piece wise linear function */
+ __IOM uint32_t B4; /*!< (@ 0x00000550) y-intercept of 5th piece wise linear function */
+ __IOM uint32_t B5; /*!< (@ 0x00000554) y-intercept of 6th piece wise linear function */
+ __IM uint32_t RESERVED5[2];
+ __IOM uint32_t T0; /*!< (@ 0x00000560) End point of 1st piece wise linear function */
+ __IOM uint32_t T1; /*!< (@ 0x00000564) End point of 2nd piece wise linear function */
+ __IOM uint32_t T2; /*!< (@ 0x00000568) End point of 3rd piece wise linear function */
+ __IOM uint32_t T3; /*!< (@ 0x0000056C) End point of 4th piece wise linear function */
+ __IOM uint32_t T4; /*!< (@ 0x00000570) End point of 5th piece wise linear function */
+} NRF_TEMP_Type; /*!< Size = 1396 (0x574) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ RNG ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Random Number Generator (RNG)
+ */
+
+typedef struct { /*!< (@ 0x4000D000) RNG Structure */
+ __OM uint32_t TASKS_START; /*!< (@ 0x00000000) Task starting the random number generator */
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Task stopping the random number generator */
+ __IM uint32_t RESERVED[62];
+ __IOM uint32_t EVENTS_VALRDY; /*!< (@ 0x00000100) Event being generated for every new random number
+ written to the VALUE register */
+ __IM uint32_t RESERVED1[63];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED2[64];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED3[126];
+ __IOM uint32_t CONFIG; /*!< (@ 0x00000504) Configuration register */
+ __IM uint32_t VALUE; /*!< (@ 0x00000508) Output random number */
+} NRF_RNG_Type; /*!< Size = 1292 (0x50c) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ ECB ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief AES ECB Mode Encryption (ECB)
+ */
+
+typedef struct { /*!< (@ 0x4000E000) ECB Structure */
+ __OM uint32_t TASKS_STARTECB; /*!< (@ 0x00000000) Start ECB block encrypt */
+ __OM uint32_t TASKS_STOPECB; /*!< (@ 0x00000004) Abort a possible executing ECB operation */
+ __IM uint32_t RESERVED[62];
+ __IOM uint32_t EVENTS_ENDECB; /*!< (@ 0x00000100) ECB block encrypt complete */
+ __IOM uint32_t EVENTS_ERRORECB; /*!< (@ 0x00000104) ECB block encrypt aborted because of a STOPECB
+ task or due to an error */
+ __IM uint32_t RESERVED1[127];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED2[126];
+ __IOM uint32_t ECBDATAPTR; /*!< (@ 0x00000504) ECB block encrypt memory pointers */
+} NRF_ECB_Type; /*!< Size = 1288 (0x508) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ AAR ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Accelerated Address Resolver (AAR)
+ */
+
+typedef struct { /*!< (@ 0x4000F000) AAR Structure */
+ __OM uint32_t TASKS_START; /*!< (@ 0x00000000) Start resolving addresses based on IRKs specified
+ in the IRK data structure */
+ __IM uint32_t RESERVED;
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000008) Stop resolving addresses */
+ __IM uint32_t RESERVED1[61];
+ __IOM uint32_t EVENTS_END; /*!< (@ 0x00000100) Address resolution procedure complete */
+ __IOM uint32_t EVENTS_RESOLVED; /*!< (@ 0x00000104) Address resolved */
+ __IOM uint32_t EVENTS_NOTRESOLVED; /*!< (@ 0x00000108) Address not resolved */
+ __IM uint32_t RESERVED2[126];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED3[61];
+ __IM uint32_t STATUS; /*!< (@ 0x00000400) Resolution status */
+ __IM uint32_t RESERVED4[63];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable AAR */
+ __IOM uint32_t NIRK; /*!< (@ 0x00000504) Number of IRKs */
+ __IOM uint32_t IRKPTR; /*!< (@ 0x00000508) Pointer to IRK data structure */
+ __IM uint32_t RESERVED5;
+ __IOM uint32_t ADDRPTR; /*!< (@ 0x00000510) Pointer to the resolvable address */
+ __IOM uint32_t SCRATCHPTR; /*!< (@ 0x00000514) Pointer to data area used for temporary storage */
+} NRF_AAR_Type; /*!< Size = 1304 (0x518) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ CCM ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief AES CCM Mode Encryption (CCM)
+ */
+
+typedef struct { /*!< (@ 0x4000F000) CCM Structure */
+ __OM uint32_t TASKS_KSGEN; /*!< (@ 0x00000000) Start generation of key-stream. This operation
+ will stop by itself when completed. */
+ __OM uint32_t TASKS_CRYPT; /*!< (@ 0x00000004) Start encryption/decryption. This operation will
+ stop by itself when completed. */
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000008) Stop encryption/decryption */
+ __OM uint32_t TASKS_RATEOVERRIDE; /*!< (@ 0x0000000C) Override DATARATE setting in MODE register with
+ the contents of the RATEOVERRIDE register
+ for any ongoing encryption/decryption */
+ __IM uint32_t RESERVED[60];
+ __IOM uint32_t EVENTS_ENDKSGEN; /*!< (@ 0x00000100) Key-stream generation complete */
+ __IOM uint32_t EVENTS_ENDCRYPT; /*!< (@ 0x00000104) Encrypt/decrypt complete */
+ __IOM uint32_t EVENTS_ERROR; /*!< (@ 0x00000108) Deprecated register - CCM error event */
+ __IM uint32_t RESERVED1[61];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED2[64];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED3[61];
+ __IM uint32_t MICSTATUS; /*!< (@ 0x00000400) MIC check result */
+ __IM uint32_t RESERVED4[63];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable */
+ __IOM uint32_t MODE; /*!< (@ 0x00000504) Operation mode */
+ __IOM uint32_t CNFPTR; /*!< (@ 0x00000508) Pointer to data structure holding AES key and
+ NONCE vector */
+ __IOM uint32_t INPTR; /*!< (@ 0x0000050C) Input pointer */
+ __IOM uint32_t OUTPTR; /*!< (@ 0x00000510) Output pointer */
+ __IOM uint32_t SCRATCHPTR; /*!< (@ 0x00000514) Pointer to data area used for temporary storage */
+ __IOM uint32_t MAXPACKETSIZE; /*!< (@ 0x00000518) Length of key-stream generated when MODE.LENGTH
+ = Extended. */
+ __IOM uint32_t RATEOVERRIDE; /*!< (@ 0x0000051C) Data rate override setting. */
+} NRF_CCM_Type; /*!< Size = 1312 (0x520) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ WDT ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Watchdog Timer (WDT)
+ */
+
+typedef struct { /*!< (@ 0x40010000) WDT Structure */
+ __OM uint32_t TASKS_START; /*!< (@ 0x00000000) Start the watchdog */
+ __IM uint32_t RESERVED[63];
+ __IOM uint32_t EVENTS_TIMEOUT; /*!< (@ 0x00000100) Watchdog timeout */
+ __IM uint32_t RESERVED1[128];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED2[61];
+ __IM uint32_t RUNSTATUS; /*!< (@ 0x00000400) Run status */
+ __IM uint32_t REQSTATUS; /*!< (@ 0x00000404) Request status */
+ __IM uint32_t RESERVED3[63];
+ __IOM uint32_t CRV; /*!< (@ 0x00000504) Counter reload value */
+ __IOM uint32_t RREN; /*!< (@ 0x00000508) Enable register for reload request registers */
+ __IOM uint32_t CONFIG; /*!< (@ 0x0000050C) Configuration register */
+ __IM uint32_t RESERVED4[60];
+ __OM uint32_t RR[8]; /*!< (@ 0x00000600) Description collection: Reload request n */
+} NRF_WDT_Type; /*!< Size = 1568 (0x620) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ QDEC ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Quadrature Decoder (QDEC)
+ */
+
+typedef struct { /*!< (@ 0x40012000) QDEC Structure */
+ __OM uint32_t TASKS_START; /*!< (@ 0x00000000) Task starting the quadrature decoder */
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Task stopping the quadrature decoder */
+ __OM uint32_t TASKS_READCLRACC; /*!< (@ 0x00000008) Read and clear ACC and ACCDBL */
+ __OM uint32_t TASKS_RDCLRACC; /*!< (@ 0x0000000C) Read and clear ACC */
+ __OM uint32_t TASKS_RDCLRDBL; /*!< (@ 0x00000010) Read and clear ACCDBL */
+ __IM uint32_t RESERVED[59];
+ __IOM uint32_t EVENTS_SAMPLERDY; /*!< (@ 0x00000100) Event being generated for every new sample value
+ written to the SAMPLE register */
+ __IOM uint32_t EVENTS_REPORTRDY; /*!< (@ 0x00000104) Non-null report ready */
+ __IOM uint32_t EVENTS_ACCOF; /*!< (@ 0x00000108) ACC or ACCDBL register overflow */
+ __IOM uint32_t EVENTS_DBLRDY; /*!< (@ 0x0000010C) Double displacement(s) detected */
+ __IOM uint32_t EVENTS_STOPPED; /*!< (@ 0x00000110) QDEC has been stopped */
+ __IM uint32_t RESERVED1[59];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED2[64];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED3[125];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable the quadrature decoder */
+ __IOM uint32_t LEDPOL; /*!< (@ 0x00000504) LED output pin polarity */
+ __IOM uint32_t SAMPLEPER; /*!< (@ 0x00000508) Sample period */
+ __IM int32_t SAMPLE; /*!< (@ 0x0000050C) Motion sample value */
+ __IOM uint32_t REPORTPER; /*!< (@ 0x00000510) Number of samples to be taken before REPORTRDY
+ and DBLRDY events can be generated */
+ __IM int32_t ACC; /*!< (@ 0x00000514) Register accumulating the valid transitions */
+ __IM int32_t ACCREAD; /*!< (@ 0x00000518) Snapshot of the ACC register, updated by the
+ READCLRACC or RDCLRACC task */
+ __IOM QDEC_PSEL_Type PSEL; /*!< (@ 0x0000051C) Unspecified */
+ __IOM uint32_t DBFEN; /*!< (@ 0x00000528) Enable input debounce filters */
+ __IM uint32_t RESERVED4[5];
+ __IOM uint32_t LEDPRE; /*!< (@ 0x00000540) Time period the LED is switched ON prior to sampling */
+ __IM uint32_t ACCDBL; /*!< (@ 0x00000544) Register accumulating the number of detected
+ double transitions */
+ __IM uint32_t ACCDBLREAD; /*!< (@ 0x00000548) Snapshot of the ACCDBL, updated by the READCLRACC
+ or RDCLRDBL task */
+} NRF_QDEC_Type; /*!< Size = 1356 (0x54c) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ COMP ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Comparator (COMP)
+ */
+
+typedef struct { /*!< (@ 0x40013000) COMP Structure */
+ __OM uint32_t TASKS_START; /*!< (@ 0x00000000) Start comparator */
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stop comparator */
+ __OM uint32_t TASKS_SAMPLE; /*!< (@ 0x00000008) Sample comparator value */
+ __IM uint32_t RESERVED[61];
+ __IOM uint32_t EVENTS_READY; /*!< (@ 0x00000100) COMP is ready and output is valid */
+ __IOM uint32_t EVENTS_DOWN; /*!< (@ 0x00000104) Downward crossing */
+ __IOM uint32_t EVENTS_UP; /*!< (@ 0x00000108) Upward crossing */
+ __IOM uint32_t EVENTS_CROSS; /*!< (@ 0x0000010C) Downward or upward crossing */
+ __IM uint32_t RESERVED1[60];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED2[63];
+ __IOM uint32_t INTEN; /*!< (@ 0x00000300) Enable or disable interrupt */
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED3[61];
+ __IM uint32_t RESULT; /*!< (@ 0x00000400) Compare result */
+ __IM uint32_t RESERVED4[63];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) COMP enable */
+ __IOM uint32_t PSEL; /*!< (@ 0x00000504) Pin select */
+ __IOM uint32_t REFSEL; /*!< (@ 0x00000508) Reference source select for single-ended mode */
+ __IOM uint32_t EXTREFSEL; /*!< (@ 0x0000050C) External reference select */
+ __IM uint32_t RESERVED5[8];
+ __IOM uint32_t TH; /*!< (@ 0x00000530) Threshold configuration for hysteresis unit */
+ __IOM uint32_t MODE; /*!< (@ 0x00000534) Mode configuration */
+ __IOM uint32_t HYST; /*!< (@ 0x00000538) Comparator hysteresis enable */
+} NRF_COMP_Type; /*!< Size = 1340 (0x53c) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ LPCOMP ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Low Power Comparator (LPCOMP)
+ */
+
+typedef struct { /*!< (@ 0x40013000) LPCOMP Structure */
+ __OM uint32_t TASKS_START; /*!< (@ 0x00000000) Start comparator */
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stop comparator */
+ __OM uint32_t TASKS_SAMPLE; /*!< (@ 0x00000008) Sample comparator value */
+ __IM uint32_t RESERVED[61];
+ __IOM uint32_t EVENTS_READY; /*!< (@ 0x00000100) LPCOMP is ready and output is valid */
+ __IOM uint32_t EVENTS_DOWN; /*!< (@ 0x00000104) Downward crossing */
+ __IOM uint32_t EVENTS_UP; /*!< (@ 0x00000108) Upward crossing */
+ __IOM uint32_t EVENTS_CROSS; /*!< (@ 0x0000010C) Downward or upward crossing */
+ __IM uint32_t RESERVED1[60];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED2[64];
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED3[61];
+ __IM uint32_t RESULT; /*!< (@ 0x00000400) Compare result */
+ __IM uint32_t RESERVED4[63];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable LPCOMP */
+ __IOM uint32_t PSEL; /*!< (@ 0x00000504) Input pin select */
+ __IOM uint32_t REFSEL; /*!< (@ 0x00000508) Reference select */
+ __IOM uint32_t EXTREFSEL; /*!< (@ 0x0000050C) External reference select */
+ __IM uint32_t RESERVED5[4];
+ __IOM uint32_t ANADETECT; /*!< (@ 0x00000520) Analog detect configuration */
+ __IM uint32_t RESERVED6[5];
+ __IOM uint32_t HYST; /*!< (@ 0x00000538) Comparator hysteresis enable */
+} NRF_LPCOMP_Type; /*!< Size = 1340 (0x53c) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ EGU0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Event Generator Unit 0 (EGU0)
+ */
+
+typedef struct { /*!< (@ 0x40014000) EGU0 Structure */
+ __OM uint32_t TASKS_TRIGGER[16]; /*!< (@ 0x00000000) Description collection: Trigger n for triggering
+ the corresponding TRIGGERED[n] event */
+ __IM uint32_t RESERVED[48];
+ __IOM uint32_t EVENTS_TRIGGERED[16]; /*!< (@ 0x00000100) Description collection: Event number n generated
+ by triggering the corresponding TRIGGER[n]
+ task */
+ __IM uint32_t RESERVED1[112];
+ __IOM uint32_t INTEN; /*!< (@ 0x00000300) Enable or disable interrupt */
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+} NRF_EGU_Type; /*!< Size = 780 (0x30c) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ SWI0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Software interrupt 0 (SWI0)
+ */
+
+typedef struct { /*!< (@ 0x40014000) SWI0 Structure */
+ __IM uint32_t UNUSED; /*!< (@ 0x00000000) Unused. */
+} NRF_SWI_Type; /*!< Size = 4 (0x4) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ PWM0 ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Pulse width modulation unit 0 (PWM0)
+ */
+
+typedef struct { /*!< (@ 0x4001C000) PWM0 Structure */
+ __IM uint32_t RESERVED;
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stops PWM pulse generation on all channels at
+ the end of current PWM period, and stops
+ sequence playback */
+ __OM uint32_t TASKS_SEQSTART[2]; /*!< (@ 0x00000008) Description collection: Loads the first PWM value
+ on all enabled channels from sequence n,
+ and starts playing that sequence at the
+ rate defined in SEQ[n]REFRESH and/or DECODER.MODE.
+ Causes PWM generation to start if not running. */
+ __OM uint32_t TASKS_NEXTSTEP; /*!< (@ 0x00000010) Steps by one value in the current sequence on
+ all enabled channels if DECODER.MODE=NextStep.
+ Does not cause PWM generation to start if
+ not running. */
+ __IM uint32_t RESERVED1[60];
+ __IOM uint32_t EVENTS_STOPPED; /*!< (@ 0x00000104) Response to STOP task, emitted when PWM pulses
+ are no longer generated */
+ __IOM uint32_t EVENTS_SEQSTARTED[2]; /*!< (@ 0x00000108) Description collection: First PWM period started
+ on sequence n */
+ __IOM uint32_t EVENTS_SEQEND[2]; /*!< (@ 0x00000110) Description collection: Emitted at end of every
+ sequence n, when last value from RAM has
+ been applied to wave counter */
+ __IOM uint32_t EVENTS_PWMPERIODEND; /*!< (@ 0x00000118) Emitted at the end of each PWM period */
+ __IOM uint32_t EVENTS_LOOPSDONE; /*!< (@ 0x0000011C) Concatenated sequences have been played the amount
+ of times defined in LOOP.CNT */
+ __IM uint32_t RESERVED2[56];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED3[63];
+ __IOM uint32_t INTEN; /*!< (@ 0x00000300) Enable or disable interrupt */
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED4[125];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) PWM module enable register */
+ __IOM uint32_t MODE; /*!< (@ 0x00000504) Selects operating mode of the wave counter */
+ __IOM uint32_t COUNTERTOP; /*!< (@ 0x00000508) Value up to which the pulse generator counter
+ counts */
+ __IOM uint32_t PRESCALER; /*!< (@ 0x0000050C) Configuration for PWM_CLK */
+ __IOM uint32_t DECODER; /*!< (@ 0x00000510) Configuration of the decoder */
+ __IOM uint32_t LOOP; /*!< (@ 0x00000514) Number of playbacks of a loop */
+ __IM uint32_t RESERVED5[2];
+ __IOM PWM_SEQ_Type SEQ[2]; /*!< (@ 0x00000520) Unspecified */
+ __IOM PWM_PSEL_Type PSEL; /*!< (@ 0x00000560) Unspecified */
+} NRF_PWM_Type; /*!< Size = 1392 (0x570) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ PDM ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Pulse Density Modulation (Digital Microphone) Interface (PDM)
+ */
+
+typedef struct { /*!< (@ 0x4001D000) PDM Structure */
+ __OM uint32_t TASKS_START; /*!< (@ 0x00000000) Starts continuous PDM transfer */
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stops PDM transfer */
+ __IM uint32_t RESERVED[62];
+ __IOM uint32_t EVENTS_STARTED; /*!< (@ 0x00000100) PDM transfer has started */
+ __IOM uint32_t EVENTS_STOPPED; /*!< (@ 0x00000104) PDM transfer has finished */
+ __IOM uint32_t EVENTS_END; /*!< (@ 0x00000108) The PDM has written the last sample specified
+ by SAMPLE.MAXCNT (or the last sample after
+ a STOP task has been received) to Data RAM */
+ __IM uint32_t RESERVED1[125];
+ __IOM uint32_t INTEN; /*!< (@ 0x00000300) Enable or disable interrupt */
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED2[125];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) PDM module enable register */
+ __IOM uint32_t PDMCLKCTRL; /*!< (@ 0x00000504) PDM clock generator control */
+ __IOM uint32_t MODE; /*!< (@ 0x00000508) Defines the routing of the connected PDM microphones'
+ signals */
+ __IM uint32_t RESERVED3[3];
+ __IOM uint32_t GAINL; /*!< (@ 0x00000518) Left output gain adjustment */
+ __IOM uint32_t GAINR; /*!< (@ 0x0000051C) Right output gain adjustment */
+ __IOM uint32_t RATIO; /*!< (@ 0x00000520) Selects the ratio between PDM_CLK and output
+ sample rate. Change PDMCLKCTRL accordingly. */
+ __IM uint32_t RESERVED4[7];
+ __IOM PDM_PSEL_Type PSEL; /*!< (@ 0x00000540) Unspecified */
+ __IM uint32_t RESERVED5[6];
+ __IOM PDM_SAMPLE_Type SAMPLE; /*!< (@ 0x00000560) Unspecified */
+} NRF_PDM_Type; /*!< Size = 1384 (0x568) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ ACL ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Access control lists (ACL)
+ */
+
+typedef struct { /*!< (@ 0x4001E000) ACL Structure */
+ __IM uint32_t RESERVED[512];
+ __IOM ACL_ACL_Type ACL[8]; /*!< (@ 0x00000800) Unspecified */
+} NRF_ACL_Type; /*!< Size = 2176 (0x880) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ NVMC ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Non Volatile Memory Controller (NVMC)
+ */
+
+typedef struct { /*!< (@ 0x4001E000) NVMC Structure */
+ __IM uint32_t RESERVED[256];
+ __IM uint32_t READY; /*!< (@ 0x00000400) Ready flag */
+ __IM uint32_t RESERVED1;
+ __IM uint32_t READYNEXT; /*!< (@ 0x00000408) Ready flag */
+ __IM uint32_t RESERVED2[62];
+ __IOM uint32_t CONFIG; /*!< (@ 0x00000504) Configuration register */
+
+ union {
+ __OM uint32_t ERASEPAGE; /*!< (@ 0x00000508) Register for erasing a page in code area */
+ __OM uint32_t ERASEPCR1; /*!< (@ 0x00000508) Deprecated register - Register for erasing a
+ page in code area, equivalent to ERASEPAGE */
+ };
+ __OM uint32_t ERASEALL; /*!< (@ 0x0000050C) Register for erasing all non-volatile user memory */
+ __OM uint32_t ERASEPCR0; /*!< (@ 0x00000510) Deprecated register - Register for erasing a
+ page in code area, equivalent to ERASEPAGE */
+ __OM uint32_t ERASEUICR; /*!< (@ 0x00000514) Register for erasing user information configuration
+ registers */
+ __OM uint32_t ERASEPAGEPARTIAL; /*!< (@ 0x00000518) Register for partial erase of a page in code
+ area */
+ __IOM uint32_t ERASEPAGEPARTIALCFG; /*!< (@ 0x0000051C) Register for partial erase configuration */
+ __IM uint32_t RESERVED3[8];
+ __IOM uint32_t ICACHECNF; /*!< (@ 0x00000540) I-code cache configuration register */
+ __IM uint32_t RESERVED4;
+ __IOM uint32_t IHIT; /*!< (@ 0x00000548) I-code cache hit counter */
+ __IOM uint32_t IMISS; /*!< (@ 0x0000054C) I-code cache miss counter */
+} NRF_NVMC_Type; /*!< Size = 1360 (0x550) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ PPI ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Programmable Peripheral Interconnect (PPI)
+ */
+
+typedef struct { /*!< (@ 0x4001F000) PPI Structure */
+ __OM PPI_TASKS_CHG_Type TASKS_CHG[6]; /*!< (@ 0x00000000) Channel group tasks */
+ __IM uint32_t RESERVED[308];
+ __IOM uint32_t CHEN; /*!< (@ 0x00000500) Channel enable register */
+ __IOM uint32_t CHENSET; /*!< (@ 0x00000504) Channel enable set register */
+ __IOM uint32_t CHENCLR; /*!< (@ 0x00000508) Channel enable clear register */
+ __IM uint32_t RESERVED1;
+ __IOM PPI_CH_Type CH[20]; /*!< (@ 0x00000510) PPI Channel */
+ __IM uint32_t RESERVED2[148];
+ __IOM uint32_t CHG[6]; /*!< (@ 0x00000800) Description collection: Channel group n */
+ __IM uint32_t RESERVED3[62];
+ __IOM PPI_FORK_Type FORK[32]; /*!< (@ 0x00000910) Fork */
+} NRF_PPI_Type; /*!< Size = 2448 (0x990) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ MWU ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Memory Watch Unit (MWU)
+ */
+
+typedef struct { /*!< (@ 0x40020000) MWU Structure */
+ __IM uint32_t RESERVED[64];
+ __IOM MWU_EVENTS_REGION_Type EVENTS_REGION[4];/*!< (@ 0x00000100) Peripheral events. */
+ __IM uint32_t RESERVED1[16];
+ __IOM MWU_EVENTS_PREGION_Type EVENTS_PREGION[2];/*!< (@ 0x00000160) Peripheral events. */
+ __IM uint32_t RESERVED2[100];
+ __IOM uint32_t INTEN; /*!< (@ 0x00000300) Enable or disable interrupt */
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED3[5];
+ __IOM uint32_t NMIEN; /*!< (@ 0x00000320) Enable or disable interrupt */
+ __IOM uint32_t NMIENSET; /*!< (@ 0x00000324) Enable interrupt */
+ __IOM uint32_t NMIENCLR; /*!< (@ 0x00000328) Disable interrupt */
+ __IM uint32_t RESERVED4[53];
+ __IOM MWU_PERREGION_Type PERREGION[2]; /*!< (@ 0x00000400) Unspecified */
+ __IM uint32_t RESERVED5[64];
+ __IOM uint32_t REGIONEN; /*!< (@ 0x00000510) Enable/disable regions watch */
+ __IOM uint32_t REGIONENSET; /*!< (@ 0x00000514) Enable regions watch */
+ __IOM uint32_t REGIONENCLR; /*!< (@ 0x00000518) Disable regions watch */
+ __IM uint32_t RESERVED6[57];
+ __IOM MWU_REGION_Type REGION[4]; /*!< (@ 0x00000600) Unspecified */
+ __IM uint32_t RESERVED7[32];
+ __IOM MWU_PREGION_Type PREGION[2]; /*!< (@ 0x000006C0) Unspecified */
+} NRF_MWU_Type; /*!< Size = 1760 (0x6e0) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ I2S ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Inter-IC Sound (I2S)
+ */
+
+typedef struct { /*!< (@ 0x40025000) I2S Structure */
+ __OM uint32_t TASKS_START; /*!< (@ 0x00000000) Starts continuous I2S transfer. Also starts MCK
+ generator when this is enabled. */
+ __OM uint32_t TASKS_STOP; /*!< (@ 0x00000004) Stops I2S transfer. Also stops MCK generator.
+ Triggering this task will cause the STOPPED
+ event to be generated. */
+ __IM uint32_t RESERVED[63];
+ __IOM uint32_t EVENTS_RXPTRUPD; /*!< (@ 0x00000104) The RXD.PTR register has been copied to internal
+ double-buffers. When the I2S module is started
+ and RX is enabled, this event will be generated
+ for every RXTXD.MAXCNT words that are received
+ on the SDIN pin. */
+ __IOM uint32_t EVENTS_STOPPED; /*!< (@ 0x00000108) I2S transfer stopped. */
+ __IM uint32_t RESERVED1[2];
+ __IOM uint32_t EVENTS_TXPTRUPD; /*!< (@ 0x00000114) The TDX.PTR register has been copied to internal
+ double-buffers. When the I2S module is started
+ and TX is enabled, this event will be generated
+ for every RXTXD.MAXCNT words that are sent
+ on the SDOUT pin. */
+ __IM uint32_t RESERVED2[122];
+ __IOM uint32_t INTEN; /*!< (@ 0x00000300) Enable or disable interrupt */
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED3[125];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable I2S module. */
+ __IOM I2S_CONFIG_Type CONFIG; /*!< (@ 0x00000504) Unspecified */
+ __IM uint32_t RESERVED4[3];
+ __IOM I2S_RXD_Type RXD; /*!< (@ 0x00000538) Unspecified */
+ __IM uint32_t RESERVED5;
+ __IOM I2S_TXD_Type TXD; /*!< (@ 0x00000540) Unspecified */
+ __IM uint32_t RESERVED6[3];
+ __IOM I2S_RXTXD_Type RXTXD; /*!< (@ 0x00000550) Unspecified */
+ __IM uint32_t RESERVED7[3];
+ __IOM I2S_PSEL_Type PSEL; /*!< (@ 0x00000560) Unspecified */
+} NRF_I2S_Type; /*!< Size = 1396 (0x574) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ FPU ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief FPU (FPU)
+ */
+
+typedef struct { /*!< (@ 0x40026000) FPU Structure */
+ __IM uint32_t UNUSED; /*!< (@ 0x00000000) Unused. */
+} NRF_FPU_Type; /*!< Size = 4 (0x4) */
+
+
+
+/* =========================================================================================================================== */
+/* ================ USBD ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief Universal serial bus device (USBD)
+ */
+
+typedef struct { /*!< (@ 0x40027000) USBD Structure */
+ __IM uint32_t RESERVED;
+ __OM uint32_t TASKS_STARTEPIN[8]; /*!< (@ 0x00000004) Description collection: Captures the EPIN[n].PTR
+ and EPIN[n].MAXCNT registers values, and
+ enables endpoint IN n to respond to traffic
+ from host */
+ __OM uint32_t TASKS_STARTISOIN; /*!< (@ 0x00000024) Captures the ISOIN.PTR and ISOIN.MAXCNT registers
+ values, and enables sending data on ISO
+ endpoint */
+ __OM uint32_t TASKS_STARTEPOUT[8]; /*!< (@ 0x00000028) Description collection: Captures the EPOUT[n].PTR
+ and EPOUT[n].MAXCNT registers values, and
+ enables endpoint n to respond to traffic
+ from host */
+ __OM uint32_t TASKS_STARTISOOUT; /*!< (@ 0x00000048) Captures the ISOOUT.PTR and ISOOUT.MAXCNT registers
+ values, and enables receiving of data on
+ ISO endpoint */
+ __OM uint32_t TASKS_EP0RCVOUT; /*!< (@ 0x0000004C) Allows OUT data stage on control endpoint 0 */
+ __OM uint32_t TASKS_EP0STATUS; /*!< (@ 0x00000050) Allows status stage on control endpoint 0 */
+ __OM uint32_t TASKS_EP0STALL; /*!< (@ 0x00000054) Stalls data and status stage on control endpoint
+ 0 */
+ __OM uint32_t TASKS_DPDMDRIVE; /*!< (@ 0x00000058) Forces D+ and D- lines into the state defined
+ in the DPDMVALUE register */
+ __OM uint32_t TASKS_DPDMNODRIVE; /*!< (@ 0x0000005C) Stops forcing D+ and D- lines into any state
+ (USB engine takes control) */
+ __IM uint32_t RESERVED1[40];
+ __IOM uint32_t EVENTS_USBRESET; /*!< (@ 0x00000100) Signals that a USB reset condition has been detected
+ on USB lines */
+ __IOM uint32_t EVENTS_STARTED; /*!< (@ 0x00000104) Confirms that the EPIN[n].PTR and EPIN[n].MAXCNT,
+ or EPOUT[n].PTR and EPOUT[n].MAXCNT registers
+ have been captured on all endpoints reported
+ in the EPSTATUS register */
+ __IOM uint32_t EVENTS_ENDEPIN[8]; /*!< (@ 0x00000108) Description collection: The whole EPIN[n] buffer
+ has been consumed. The buffer can be accessed
+ safely by software. */
+ __IOM uint32_t EVENTS_EP0DATADONE; /*!< (@ 0x00000128) An acknowledged data transfer has taken place
+ on the control endpoint */
+ __IOM uint32_t EVENTS_ENDISOIN; /*!< (@ 0x0000012C) The whole ISOIN buffer has been consumed. The
+ buffer can be accessed safely by software. */
+ __IOM uint32_t EVENTS_ENDEPOUT[8]; /*!< (@ 0x00000130) Description collection: The whole EPOUT[n] buffer
+ has been consumed. The buffer can be accessed
+ safely by software. */
+ __IOM uint32_t EVENTS_ENDISOOUT; /*!< (@ 0x00000150) The whole ISOOUT buffer has been consumed. The
+ buffer can be accessed safely by software. */
+ __IOM uint32_t EVENTS_SOF; /*!< (@ 0x00000154) Signals that a SOF (start of frame) condition
+ has been detected on USB lines */
+ __IOM uint32_t EVENTS_USBEVENT; /*!< (@ 0x00000158) An event or an error not covered by specific
+ events has occurred. Check EVENTCAUSE register
+ to find the cause. */
+ __IOM uint32_t EVENTS_EP0SETUP; /*!< (@ 0x0000015C) A valid SETUP token has been received (and acknowledged)
+ on the control endpoint */
+ __IOM uint32_t EVENTS_EPDATA; /*!< (@ 0x00000160) A data transfer has occurred on a data endpoint,
+ indicated by the EPDATASTATUS register */
+ __IM uint32_t RESERVED2[39];
+ __IOM uint32_t SHORTS; /*!< (@ 0x00000200) Shortcuts between local events and tasks */
+ __IM uint32_t RESERVED3[63];
+ __IOM uint32_t INTEN; /*!< (@ 0x00000300) Enable or disable interrupt */
+ __IOM uint32_t INTENSET; /*!< (@ 0x00000304) Enable interrupt */
+ __IOM uint32_t INTENCLR; /*!< (@ 0x00000308) Disable interrupt */
+ __IM uint32_t RESERVED4[61];
+ __IOM uint32_t EVENTCAUSE; /*!< (@ 0x00000400) Details on what caused the USBEVENT event */
+ __IM uint32_t RESERVED5[7];
+ __IOM USBD_HALTED_Type HALTED; /*!< (@ 0x00000420) Unspecified */
+ __IM uint32_t RESERVED6;
+ __IOM uint32_t EPSTATUS; /*!< (@ 0x00000468) Provides information on which endpoint's EasyDMA
+ registers have been captured */
+ __IOM uint32_t EPDATASTATUS; /*!< (@ 0x0000046C) Provides information on which endpoint(s) an
+ acknowledged data transfer has occurred
+ (EPDATA event) */
+ __IM uint32_t USBADDR; /*!< (@ 0x00000470) Device USB address */
+ __IM uint32_t RESERVED7[3];
+ __IM uint32_t BMREQUESTTYPE; /*!< (@ 0x00000480) SETUP data, byte 0, bmRequestType */
+ __IM uint32_t BREQUEST; /*!< (@ 0x00000484) SETUP data, byte 1, bRequest */
+ __IM uint32_t WVALUEL; /*!< (@ 0x00000488) SETUP data, byte 2, LSB of wValue */
+ __IM uint32_t WVALUEH; /*!< (@ 0x0000048C) SETUP data, byte 3, MSB of wValue */
+ __IM uint32_t WINDEXL; /*!< (@ 0x00000490) SETUP data, byte 4, LSB of wIndex */
+ __IM uint32_t WINDEXH; /*!< (@ 0x00000494) SETUP data, byte 5, MSB of wIndex */
+ __IM uint32_t WLENGTHL; /*!< (@ 0x00000498) SETUP data, byte 6, LSB of wLength */
+ __IM uint32_t WLENGTHH; /*!< (@ 0x0000049C) SETUP data, byte 7, MSB of wLength */
+ __IOM USBD_SIZE_Type SIZE; /*!< (@ 0x000004A0) Unspecified */
+ __IM uint32_t RESERVED8[15];
+ __IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable USB */
+ __IOM uint32_t USBPULLUP; /*!< (@ 0x00000504) Control of the USB pull-up */
+ __IOM uint32_t DPDMVALUE; /*!< (@ 0x00000508) State D+ and D- lines will be forced into by
+ the DPDMDRIVE task. The DPDMNODRIVE task
+ reverts the control of the lines to MAC
+ IP (no forcing). */
+ __IOM uint32_t DTOGGLE; /*!< (@ 0x0000050C) Data toggle control and status */
+ __IOM uint32_t EPINEN; /*!< (@ 0x00000510) Endpoint IN enable */
+ __IOM uint32_t EPOUTEN; /*!< (@ 0x00000514) Endpoint OUT enable */
+ __OM uint32_t EPSTALL; /*!< (@ 0x00000518) STALL endpoints */
+ __IOM uint32_t ISOSPLIT; /*!< (@ 0x0000051C) Controls the split of ISO buffers */
+ __IM uint32_t FRAMECNTR; /*!< (@ 0x00000520) Returns the current value of the start of frame
+ counter */
+ __IM uint32_t RESERVED9[2];
+ __IOM uint32_t LOWPOWER; /*!< (@ 0x0000052C) Controls USBD peripheral low power mode during
+ USB suspend */
+ __IOM uint32_t ISOINCONFIG; /*!< (@ 0x00000530) Controls the response of the ISO IN endpoint
+ to an IN token when no data is ready to
+ be sent */
+ __IM uint32_t RESERVED10[51];
+ __IOM USBD_EPIN_Type EPIN[8]; /*!< (@ 0x00000600) Unspecified */
+ __IOM USBD_ISOIN_Type ISOIN; /*!< (@ 0x000006A0) Unspecified */
+ __IM uint32_t RESERVED11[21];
+ __IOM USBD_EPOUT_Type EPOUT[8]; /*!< (@ 0x00000700) Unspecified */
+ __IOM USBD_ISOOUT_Type ISOOUT; /*!< (@ 0x000007A0) Unspecified */
+} NRF_USBD_Type; /*!< Size = 1964 (0x7ac) */
+
+
+/** @} */ /* End of group Device_Peripheral_peripherals */
+
+
+/* =========================================================================================================================== */
+/* ================ Device Specific Peripheral Address Map ================ */
+/* =========================================================================================================================== */
+
+
+/** @addtogroup Device_Peripheral_peripheralAddr
+ * @{
+ */
+
+#define NRF_FICR_BASE 0x10000000UL
+#define NRF_UICR_BASE 0x10001000UL
+#define NRF_CLOCK_BASE 0x40000000UL
+#define NRF_POWER_BASE 0x40000000UL
+#define NRF_P0_BASE 0x50000000UL
+#define NRF_P1_BASE 0x50000300UL
+#define NRF_RADIO_BASE 0x40001000UL
+#define NRF_UART0_BASE 0x40002000UL
+#define NRF_UARTE0_BASE 0x40002000UL
+#define NRF_SPI0_BASE 0x40003000UL
+#define NRF_SPIM0_BASE 0x40003000UL
+#define NRF_SPIS0_BASE 0x40003000UL
+#define NRF_TWI0_BASE 0x40003000UL
+#define NRF_TWIM0_BASE 0x40003000UL
+#define NRF_TWIS0_BASE 0x40003000UL
+#define NRF_SPI1_BASE 0x40004000UL
+#define NRF_SPIM1_BASE 0x40004000UL
+#define NRF_SPIS1_BASE 0x40004000UL
+#define NRF_TWI1_BASE 0x40004000UL
+#define NRF_TWIM1_BASE 0x40004000UL
+#define NRF_TWIS1_BASE 0x40004000UL
+#define NRF_NFCT_BASE 0x40005000UL
+#define NRF_GPIOTE_BASE 0x40006000UL
+#define NRF_SAADC_BASE 0x40007000UL
+#define NRF_TIMER0_BASE 0x40008000UL
+#define NRF_TIMER1_BASE 0x40009000UL
+#define NRF_TIMER2_BASE 0x4000A000UL
+#define NRF_RTC0_BASE 0x4000B000UL
+#define NRF_TEMP_BASE 0x4000C000UL
+#define NRF_RNG_BASE 0x4000D000UL
+#define NRF_ECB_BASE 0x4000E000UL
+#define NRF_AAR_BASE 0x4000F000UL
+#define NRF_CCM_BASE 0x4000F000UL
+#define NRF_WDT_BASE 0x40010000UL
+#define NRF_RTC1_BASE 0x40011000UL
+#define NRF_QDEC_BASE 0x40012000UL
+#define NRF_COMP_BASE 0x40013000UL
+#define NRF_LPCOMP_BASE 0x40013000UL
+#define NRF_EGU0_BASE 0x40014000UL
+#define NRF_SWI0_BASE 0x40014000UL
+#define NRF_EGU1_BASE 0x40015000UL
+#define NRF_SWI1_BASE 0x40015000UL
+#define NRF_EGU2_BASE 0x40016000UL
+#define NRF_SWI2_BASE 0x40016000UL
+#define NRF_EGU3_BASE 0x40017000UL
+#define NRF_SWI3_BASE 0x40017000UL
+#define NRF_EGU4_BASE 0x40018000UL
+#define NRF_SWI4_BASE 0x40018000UL
+#define NRF_EGU5_BASE 0x40019000UL
+#define NRF_SWI5_BASE 0x40019000UL
+#define NRF_TIMER3_BASE 0x4001A000UL
+#define NRF_TIMER4_BASE 0x4001B000UL
+#define NRF_PWM0_BASE 0x4001C000UL
+#define NRF_PDM_BASE 0x4001D000UL
+#define NRF_ACL_BASE 0x4001E000UL
+#define NRF_NVMC_BASE 0x4001E000UL
+#define NRF_PPI_BASE 0x4001F000UL
+#define NRF_MWU_BASE 0x40020000UL
+#define NRF_PWM1_BASE 0x40021000UL
+#define NRF_PWM2_BASE 0x40022000UL
+#define NRF_SPI2_BASE 0x40023000UL
+#define NRF_SPIM2_BASE 0x40023000UL
+#define NRF_SPIS2_BASE 0x40023000UL
+#define NRF_RTC2_BASE 0x40024000UL
+#define NRF_I2S_BASE 0x40025000UL
+#define NRF_FPU_BASE 0x40026000UL
+#define NRF_USBD_BASE 0x40027000UL
+#define NRF_UARTE1_BASE 0x40028000UL
+#define NRF_PWM3_BASE 0x4002D000UL
+#define NRF_SPIM3_BASE 0x4002F000UL
+
+/** @} */ /* End of group Device_Peripheral_peripheralAddr */
+
+
+/* =========================================================================================================================== */
+/* ================ Peripheral declaration ================ */
+/* =========================================================================================================================== */
+
+
+/** @addtogroup Device_Peripheral_declaration
+ * @{
+ */
+
+#define NRF_FICR ((NRF_FICR_Type*) NRF_FICR_BASE)
+#define NRF_UICR ((NRF_UICR_Type*) NRF_UICR_BASE)
+#define NRF_CLOCK ((NRF_CLOCK_Type*) NRF_CLOCK_BASE)
+#define NRF_POWER ((NRF_POWER_Type*) NRF_POWER_BASE)
+#define NRF_P0 ((NRF_GPIO_Type*) NRF_P0_BASE)
+#define NRF_P1 ((NRF_GPIO_Type*) NRF_P1_BASE)
+#define NRF_RADIO ((NRF_RADIO_Type*) NRF_RADIO_BASE)
+#define NRF_UART0 ((NRF_UART_Type*) NRF_UART0_BASE)
+#define NRF_UARTE0 ((NRF_UARTE_Type*) NRF_UARTE0_BASE)
+#define NRF_SPI0 ((NRF_SPI_Type*) NRF_SPI0_BASE)
+#define NRF_SPIM0 ((NRF_SPIM_Type*) NRF_SPIM0_BASE)
+#define NRF_SPIS0 ((NRF_SPIS_Type*) NRF_SPIS0_BASE)
+#define NRF_TWI0 ((NRF_TWI_Type*) NRF_TWI0_BASE)
+#define NRF_TWIM0 ((NRF_TWIM_Type*) NRF_TWIM0_BASE)
+#define NRF_TWIS0 ((NRF_TWIS_Type*) NRF_TWIS0_BASE)
+#define NRF_SPI1 ((NRF_SPI_Type*) NRF_SPI1_BASE)
+#define NRF_SPIM1 ((NRF_SPIM_Type*) NRF_SPIM1_BASE)
+#define NRF_SPIS1 ((NRF_SPIS_Type*) NRF_SPIS1_BASE)
+#define NRF_TWI1 ((NRF_TWI_Type*) NRF_TWI1_BASE)
+#define NRF_TWIM1 ((NRF_TWIM_Type*) NRF_TWIM1_BASE)
+#define NRF_TWIS1 ((NRF_TWIS_Type*) NRF_TWIS1_BASE)
+#define NRF_NFCT ((NRF_NFCT_Type*) NRF_NFCT_BASE)
+#define NRF_GPIOTE ((NRF_GPIOTE_Type*) NRF_GPIOTE_BASE)
+#define NRF_SAADC ((NRF_SAADC_Type*) NRF_SAADC_BASE)
+#define NRF_TIMER0 ((NRF_TIMER_Type*) NRF_TIMER0_BASE)
+#define NRF_TIMER1 ((NRF_TIMER_Type*) NRF_TIMER1_BASE)
+#define NRF_TIMER2 ((NRF_TIMER_Type*) NRF_TIMER2_BASE)
+#define NRF_RTC0 ((NRF_RTC_Type*) NRF_RTC0_BASE)
+#define NRF_TEMP ((NRF_TEMP_Type*) NRF_TEMP_BASE)
+#define NRF_RNG ((NRF_RNG_Type*) NRF_RNG_BASE)
+#define NRF_ECB ((NRF_ECB_Type*) NRF_ECB_BASE)
+#define NRF_AAR ((NRF_AAR_Type*) NRF_AAR_BASE)
+#define NRF_CCM ((NRF_CCM_Type*) NRF_CCM_BASE)
+#define NRF_WDT ((NRF_WDT_Type*) NRF_WDT_BASE)
+#define NRF_RTC1 ((NRF_RTC_Type*) NRF_RTC1_BASE)
+#define NRF_QDEC ((NRF_QDEC_Type*) NRF_QDEC_BASE)
+#define NRF_COMP ((NRF_COMP_Type*) NRF_COMP_BASE)
+#define NRF_LPCOMP ((NRF_LPCOMP_Type*) NRF_LPCOMP_BASE)
+#define NRF_EGU0 ((NRF_EGU_Type*) NRF_EGU0_BASE)
+#define NRF_SWI0 ((NRF_SWI_Type*) NRF_SWI0_BASE)
+#define NRF_EGU1 ((NRF_EGU_Type*) NRF_EGU1_BASE)
+#define NRF_SWI1 ((NRF_SWI_Type*) NRF_SWI1_BASE)
+#define NRF_EGU2 ((NRF_EGU_Type*) NRF_EGU2_BASE)
+#define NRF_SWI2 ((NRF_SWI_Type*) NRF_SWI2_BASE)
+#define NRF_EGU3 ((NRF_EGU_Type*) NRF_EGU3_BASE)
+#define NRF_SWI3 ((NRF_SWI_Type*) NRF_SWI3_BASE)
+#define NRF_EGU4 ((NRF_EGU_Type*) NRF_EGU4_BASE)
+#define NRF_SWI4 ((NRF_SWI_Type*) NRF_SWI4_BASE)
+#define NRF_EGU5 ((NRF_EGU_Type*) NRF_EGU5_BASE)
+#define NRF_SWI5 ((NRF_SWI_Type*) NRF_SWI5_BASE)
+#define NRF_TIMER3 ((NRF_TIMER_Type*) NRF_TIMER3_BASE)
+#define NRF_TIMER4 ((NRF_TIMER_Type*) NRF_TIMER4_BASE)
+#define NRF_PWM0 ((NRF_PWM_Type*) NRF_PWM0_BASE)
+#define NRF_PDM ((NRF_PDM_Type*) NRF_PDM_BASE)
+#define NRF_ACL ((NRF_ACL_Type*) NRF_ACL_BASE)
+#define NRF_NVMC ((NRF_NVMC_Type*) NRF_NVMC_BASE)
+#define NRF_PPI ((NRF_PPI_Type*) NRF_PPI_BASE)
+#define NRF_MWU ((NRF_MWU_Type*) NRF_MWU_BASE)
+#define NRF_PWM1 ((NRF_PWM_Type*) NRF_PWM1_BASE)
+#define NRF_PWM2 ((NRF_PWM_Type*) NRF_PWM2_BASE)
+#define NRF_SPI2 ((NRF_SPI_Type*) NRF_SPI2_BASE)
+#define NRF_SPIM2 ((NRF_SPIM_Type*) NRF_SPIM2_BASE)
+#define NRF_SPIS2 ((NRF_SPIS_Type*) NRF_SPIS2_BASE)
+#define NRF_RTC2 ((NRF_RTC_Type*) NRF_RTC2_BASE)
+#define NRF_I2S ((NRF_I2S_Type*) NRF_I2S_BASE)
+#define NRF_FPU ((NRF_FPU_Type*) NRF_FPU_BASE)
+#define NRF_USBD ((NRF_USBD_Type*) NRF_USBD_BASE)
+#define NRF_UARTE1 ((NRF_UARTE_Type*) NRF_UARTE1_BASE)
+#define NRF_PWM3 ((NRF_PWM_Type*) NRF_PWM3_BASE)
+#define NRF_SPIM3 ((NRF_SPIM_Type*) NRF_SPIM3_BASE)
+
+/** @} */ /* End of group Device_Peripheral_declaration */
+
+
+/* ========================================= End of section using anonymous unions ========================================= */
+#if defined (__CC_ARM)
+ #pragma pop
+#elif defined (__ICCARM__)
+ /* leave anonymous unions enabled */
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+ #pragma clang diagnostic pop
+#elif defined (__GNUC__)
+ /* anonymous unions are enabled by default */
+#elif defined (__TMS470__)
+ /* anonymous unions are enabled by default */
+#elif defined (__TASKING__)
+ #pragma warning restore
+#elif defined (__CSMC__)
+ /* anonymous unions are enabled by default */
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* NRF52833_H */
+
+
+/** @} */ /* End of group nrf52833 */
+
+/** @} */ /* End of group Nordic Semiconductor */
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf52833.svd b/third_party/NordicSemiconductor/nrfx/mdk/nrf52833.svd
new file mode 100644
index 0000000..5a081c9
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf52833.svd
@@ -0,0 +1,53945 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!-- File naming: <vendor>_<part/series name>_svd.xml -->
+<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" noNamespaceSchemaLocation="CMSIS-SVD.xsd">
+ <vendor>Nordic Semiconductor</vendor>
+ <vendorID>Nordic</vendorID>
+ <name>nrf52833</name>
+ <series>nrf52</series>
+ <version>1</version>
+ <description>nRF52833 reference description for radio MCU with ARM 32-bit Cortex-M4 Microcontroller </description>
+ <licenseText>
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.\n
+\n
+Redistribution and use in source and binary forms, with or without\n
+modification, are permitted provided that the following conditions are met:\n
+\n
+1. Redistributions of source code must retain the above copyright notice, this\n
+ list of conditions and the following disclaimer.\n
+\n
+2. Redistributions in binary form must reproduce the above copyright\n
+ notice, this list of conditions and the following disclaimer in the\n
+ documentation and/or other materials provided with the distribution.\n
+\n
+3. Neither the name of Nordic Semiconductor ASA nor the names of its\n
+ contributors may be used to endorse or promote products derived from this\n
+ software without specific prior written permission.\n
+\n
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"\n
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n
+IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE\n
+ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE\n
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n
+POSSIBILITY OF SUCH DAMAGE.\n
+ </licenseText>
+ <addressUnitBits>8</addressUnitBits>
+ <width>32</width>
+ <size>32</size>
+ <resetValue>0x00000000</resetValue>
+ <resetMask>0xFFFFFFFF</resetMask>
+ <cpu>
+ <name>CM4</name>
+ <revision>r0p1</revision>
+ <endian>little</endian>
+ <mpuPresent>1</mpuPresent>
+ <fpuPresent>1</fpuPresent>
+ <nvicPrioBits>3</nvicPrioBits>
+ <vendorSystickConfig>0</vendorSystickConfig>
+ </cpu>
+ <headerSystemFilename>system_nrf52833</headerSystemFilename>
+ <headerDefinitionsPrefix>NRF_</headerDefinitionsPrefix>
+ <vendorExtensions>
+ <ExampleStackSize>2048</ExampleStackSize>
+ <ExampleHeapSize>2048</ExampleHeapSize>
+ <MaxInterrupts>112</MaxInterrupts>
+ </vendorExtensions>
+ <peripherals>
+ <peripheral>
+ <name>FICR</name>
+ <description>Factory information configuration registers</description>
+ <baseAddress>0x10000000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <groupName>FICR</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>CODEPAGESIZE</name>
+ <description>Code memory page size</description>
+ <addressOffset>0x010</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>CODEPAGESIZE</name>
+ <description>Code memory page size</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CODESIZE</name>
+ <description>Code memory size</description>
+ <addressOffset>0x014</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>CODESIZE</name>
+ <description>Code memory size in number of pages</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x2</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>DEVICEID[%s]</name>
+ <description>Description collection: Device identifier</description>
+ <addressOffset>0x060</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>DEVICEID</name>
+ <description>64 bit unique device identifier</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x4</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>ER[%s]</name>
+ <description>Description collection: Encryption root, word n</description>
+ <addressOffset>0x080</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>ER</name>
+ <description>Encryption root, word n</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x4</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>IR[%s]</name>
+ <description>Description collection: Identity Root, word n</description>
+ <addressOffset>0x090</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>IR</name>
+ <description>Identity Root, word n</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DEVICEADDRTYPE</name>
+ <description>Device address type</description>
+ <addressOffset>0x0A0</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>DEVICEADDRTYPE</name>
+ <description>Device address type</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Public</name>
+ <description>Public address</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Random</name>
+ <description>Random address</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x2</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>DEVICEADDR[%s]</name>
+ <description>Description collection: Device address n</description>
+ <addressOffset>0x0A4</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>DEVICEADDR</name>
+ <description>48 bit device address</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>INFO</name>
+ <description>Device info</description>
+ <headerStructName>FICR_INFO</headerStructName>
+ <access>read-only</access>
+ <addressOffset>0x100</addressOffset>
+ <register>
+ <name>PART</name>
+ <description>Part code</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00052833</resetValue>
+ <fields>
+ <field>
+ <name>PART</name>
+ <description>Part code</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>N52833</name>
+ <description>nRF52833</description>
+ <value>0x52833</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>N52840</name>
+ <description>nRF52840</description>
+ <value>0x52840</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Unspecified</name>
+ <description>Unspecified</description>
+ <value>0xFFFFFFFF</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>VARIANT</name>
+ <description>Build code (hardware version and production configuration)</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>VARIANT</name>
+ <description>Build code (hardware version and production configuration). Encoded as ASCII.</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>AAAA</name>
+ <description>AAAA</description>
+ <value>0x41414141</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AAAB</name>
+ <description>AAAB</description>
+ <value>0x41414142</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Unspecified</name>
+ <description>Unspecified</description>
+ <value>0xFFFFFFFF</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PACKAGE</name>
+ <description>Package option</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PACKAGE</name>
+ <description>Package option</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>QD</name>
+ <description>QDxx - 40-pin QFN</description>
+ <value>0x2007</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>QI</name>
+ <description>QIxx - 73-pin aQFN</description>
+ <value>0x2004</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>CJ</name>
+ <description>CJxx - WLCSP</description>
+ <value>0x2008</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Unspecified</name>
+ <description>Unspecified</description>
+ <value>0xFFFFFFFF</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RAM</name>
+ <description>RAM variant</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>RAM</name>
+ <description>RAM variant</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>K16</name>
+ <description>16 kByte RAM</description>
+ <value>0x10</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>K32</name>
+ <description>32 kByte RAM</description>
+ <value>0x20</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>K64</name>
+ <description>64 kByte RAM</description>
+ <value>0x40</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>K128</name>
+ <description>128 kByte RAM</description>
+ <value>0x80</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>K256</name>
+ <description>256 kByte RAM</description>
+ <value>0x100</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Unspecified</name>
+ <description>Unspecified</description>
+ <value>0xFFFFFFFF</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>FLASH</name>
+ <description>Flash variant</description>
+ <addressOffset>0x010</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>FLASH</name>
+ <description>Flash variant</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>K128</name>
+ <description>128 kByte FLASH</description>
+ <value>0x80</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>K256</name>
+ <description>256 kByte FLASH</description>
+ <value>0x100</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>K512</name>
+ <description>512 kByte FLASH</description>
+ <value>0x200</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>K1024</name>
+ <description>1 MByte FLASH</description>
+ <value>0x400</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>K2048</name>
+ <description>2 MByte FLASH</description>
+ <value>0x800</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Unspecified</name>
+ <description>Unspecified</description>
+ <value>0xFFFFFFFF</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <dim>0x3</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>PRODTEST[%s]</name>
+ <description>Description collection: Production test signature n</description>
+ <addressOffset>0x350</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PRODTEST</name>
+ <description>Production test signature n</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Done</name>
+ <description>Production tests done</description>
+ <value>0xBB42319F</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>NotDone</name>
+ <description>Production tests not done</description>
+ <value>0xFFFFFFFF</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>TEMP</name>
+ <description>Registers storing factory TEMP module linearization coefficients</description>
+ <headerStructName>FICR_TEMP</headerStructName>
+ <access>read-only</access>
+ <addressOffset>0x404</addressOffset>
+ <register>
+ <name>A0</name>
+ <description>Slope definition A0</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>A</name>
+ <description>A (slope definition) register.</description>
+ <lsb>0</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>A1</name>
+ <description>Slope definition A1</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>A</name>
+ <description>A (slope definition) register.</description>
+ <lsb>0</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>A2</name>
+ <description>Slope definition A2</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>A</name>
+ <description>A (slope definition) register.</description>
+ <lsb>0</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>A3</name>
+ <description>Slope definition A3</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>A</name>
+ <description>A (slope definition) register.</description>
+ <lsb>0</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>A4</name>
+ <description>Slope definition A4</description>
+ <addressOffset>0x010</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>A</name>
+ <description>A (slope definition) register.</description>
+ <lsb>0</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>A5</name>
+ <description>Slope definition A5</description>
+ <addressOffset>0x014</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>A</name>
+ <description>A (slope definition) register.</description>
+ <lsb>0</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>B0</name>
+ <description>Y-intercept B0</description>
+ <addressOffset>0x018</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>B</name>
+ <description>B (y-intercept)</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>B1</name>
+ <description>Y-intercept B1</description>
+ <addressOffset>0x01C</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>B</name>
+ <description>B (y-intercept)</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>B2</name>
+ <description>Y-intercept B2</description>
+ <addressOffset>0x020</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>B</name>
+ <description>B (y-intercept)</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>B3</name>
+ <description>Y-intercept B3</description>
+ <addressOffset>0x024</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>B</name>
+ <description>B (y-intercept)</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>B4</name>
+ <description>Y-intercept B4</description>
+ <addressOffset>0x028</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>B</name>
+ <description>B (y-intercept)</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>B5</name>
+ <description>Y-intercept B5</description>
+ <addressOffset>0x02C</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>B</name>
+ <description>B (y-intercept)</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>T0</name>
+ <description>Segment end T0</description>
+ <addressOffset>0x030</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>T</name>
+ <description>T (segment end) register</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>T1</name>
+ <description>Segment end T1</description>
+ <addressOffset>0x034</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>T</name>
+ <description>T (segment end) register</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>T2</name>
+ <description>Segment end T2</description>
+ <addressOffset>0x038</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>T</name>
+ <description>T (segment end) register</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>T3</name>
+ <description>Segment end T3</description>
+ <addressOffset>0x03C</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>T</name>
+ <description>T (segment end) register</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>T4</name>
+ <description>Segment end T4</description>
+ <addressOffset>0x040</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>T</name>
+ <description>T (segment end) register</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>NFC</name>
+ <description>Unspecified</description>
+ <headerStructName>FICR_NFC</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x450</addressOffset>
+ <register>
+ <name>TAGHEADER0</name>
+ <description>Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST, and NFCID1_LAST.</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFF5F</resetValue>
+ <fields>
+ <field>
+ <name>MFGID</name>
+ <description>Default Manufacturer ID: Nordic Semiconductor ASA has ICM 0x5F</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ <field>
+ <name>UD1</name>
+ <description>Unique identifier byte 1</description>
+ <lsb>8</lsb>
+ <msb>15</msb>
+ </field>
+ <field>
+ <name>UD2</name>
+ <description>Unique identifier byte 2</description>
+ <lsb>16</lsb>
+ <msb>23</msb>
+ </field>
+ <field>
+ <name>UD3</name>
+ <description>Unique identifier byte 3</description>
+ <lsb>24</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TAGHEADER1</name>
+ <description>Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST, and NFCID1_LAST.</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>UD4</name>
+ <description>Unique identifier byte 4</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ <field>
+ <name>UD5</name>
+ <description>Unique identifier byte 5</description>
+ <lsb>8</lsb>
+ <msb>15</msb>
+ </field>
+ <field>
+ <name>UD6</name>
+ <description>Unique identifier byte 6</description>
+ <lsb>16</lsb>
+ <msb>23</msb>
+ </field>
+ <field>
+ <name>UD7</name>
+ <description>Unique identifier byte 7</description>
+ <lsb>24</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TAGHEADER2</name>
+ <description>Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST, and NFCID1_LAST.</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>UD8</name>
+ <description>Unique identifier byte 8</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ <field>
+ <name>UD9</name>
+ <description>Unique identifier byte 9</description>
+ <lsb>8</lsb>
+ <msb>15</msb>
+ </field>
+ <field>
+ <name>UD10</name>
+ <description>Unique identifier byte 10</description>
+ <lsb>16</lsb>
+ <msb>23</msb>
+ </field>
+ <field>
+ <name>UD11</name>
+ <description>Unique identifier byte 11</description>
+ <lsb>24</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TAGHEADER3</name>
+ <description>Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST, and NFCID1_LAST.</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>UD12</name>
+ <description>Unique identifier byte 12</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ <field>
+ <name>UD13</name>
+ <description>Unique identifier byte 13</description>
+ <lsb>8</lsb>
+ <msb>15</msb>
+ </field>
+ <field>
+ <name>UD14</name>
+ <description>Unique identifier byte 14</description>
+ <lsb>16</lsb>
+ <msb>23</msb>
+ </field>
+ <field>
+ <name>UD15</name>
+ <description>Unique identifier byte 15</description>
+ <lsb>24</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>UICR</name>
+ <description>User information configuration registers</description>
+ <baseAddress>0x10001000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <groupName>UICR</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <dim>0xD</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>NRFFW[%s]</name>
+ <description>Description collection: Reserved for Nordic firmware design</description>
+ <addressOffset>0x014</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>NRFFW</name>
+ <description>Reserved for Nordic firmware design</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0xC</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>NRFHW[%s]</name>
+ <description>Description collection: Reserved for Nordic hardware design</description>
+ <addressOffset>0x050</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>NRFHW</name>
+ <description>Reserved for Nordic hardware design</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x20</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>CUSTOMER[%s]</name>
+ <description>Description collection: Reserved for customer</description>
+ <addressOffset>0x080</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>CUSTOMER</name>
+ <description>Reserved for customer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x2</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>PSELRESET[%s]</name>
+ <description>Description collection: Mapping of the nRESET function (see POWER chapter for details)</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>GPIO pin number onto which nRESET is exposed</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number onto which nRESET is exposed</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>APPROTECT</name>
+ <description>Access port protection</description>
+ <addressOffset>0x208</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PALL</name>
+ <description>Enable or disable access port protection.</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0xFF</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>0x00</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>NFCPINS</name>
+ <description>Setting of pins dedicated to NFC functionality: NFC antenna or GPIO</description>
+ <addressOffset>0x20C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PROTECT</name>
+ <description>Setting of pins dedicated to NFC functionality</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Operation as GPIO pins. Same protection as normal GPIO pins</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>NFC</name>
+ <description>Operation as NFC antenna pins. Configures the protection for NFC operation</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DEBUGCTRL</name>
+ <description>Processor debug control</description>
+ <addressOffset>0x210</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>CPUNIDEN</name>
+ <description>Configure CPU non-intrusive debug features</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable CPU ITM and ETM functionality (default behavior)</description>
+ <value>0xFF</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable CPU ITM and ETM functionality</description>
+ <value>0x00</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CPUFPBEN</name>
+ <description>Configure CPU flash patch and breakpoint (FPB) unit behavior</description>
+ <lsb>8</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable CPU FPB unit (default behavior)</description>
+ <value>0xFF</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable CPU FPB unit. Writes into the FPB registers will be ignored.</description>
+ <value>0x00</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>REGOUT0</name>
+ <description>Output voltage from REG0 regulator stage. The maximum output voltage from this stage is given as VDDH - VREG0DROP.</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>VOUT</name>
+ <description>Output voltage from REG0 regulator stage.</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>1V8</name>
+ <description>1.8 V</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>2V1</name>
+ <description>2.1 V</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>2V4</name>
+ <description>2.4 V</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>2V7</name>
+ <description>2.7 V</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>3V0</name>
+ <description>3.0 V</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>3V3</name>
+ <description>3.3 V</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DEFAULT</name>
+ <description>Default voltage: 1.8 V</description>
+ <value>7</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>CLOCK</name>
+ <description>Clock control</description>
+ <baseAddress>0x40000000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>POWER_CLOCK</name>
+ <value>0</value>
+ </interrupt>
+ <groupName>CLOCK</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_HFCLKSTART</name>
+ <description>Start HFXO crystal oscillator</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_HFCLKSTART</name>
+ <description>Start HFXO crystal oscillator</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_HFCLKSTOP</name>
+ <description>Stop HFXO crystal oscillator</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_HFCLKSTOP</name>
+ <description>Stop HFXO crystal oscillator</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_LFCLKSTART</name>
+ <description>Start LFCLK</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_LFCLKSTART</name>
+ <description>Start LFCLK</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_LFCLKSTOP</name>
+ <description>Stop LFCLK</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_LFCLKSTOP</name>
+ <description>Stop LFCLK</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_CAL</name>
+ <description>Start calibration of LFRC</description>
+ <addressOffset>0x010</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CAL</name>
+ <description>Start calibration of LFRC</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_CTSTART</name>
+ <description>Start calibration timer</description>
+ <addressOffset>0x014</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CTSTART</name>
+ <description>Start calibration timer</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_CTSTOP</name>
+ <description>Stop calibration timer</description>
+ <addressOffset>0x018</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CTSTOP</name>
+ <description>Stop calibration timer</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_HFCLKSTARTED</name>
+ <description>HFXO crystal oscillator started</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_HFCLKSTARTED</name>
+ <description>HFXO crystal oscillator started</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_LFCLKSTARTED</name>
+ <description>LFCLK started</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_LFCLKSTARTED</name>
+ <description>LFCLK started</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_DONE</name>
+ <description>Calibration of LFRC completed</description>
+ <addressOffset>0x10C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_DONE</name>
+ <description>Calibration of LFRC completed</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_CTTO</name>
+ <description>Calibration timer timeout</description>
+ <addressOffset>0x110</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CTTO</name>
+ <description>Calibration timer timeout</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_CTSTARTED</name>
+ <description>Calibration timer has been started and is ready to process new tasks</description>
+ <addressOffset>0x128</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CTSTARTED</name>
+ <description>Calibration timer has been started and is ready to process new tasks</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_CTSTOPPED</name>
+ <description>Calibration timer has been stopped and is ready to process new tasks</description>
+ <addressOffset>0x12C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CTSTOPPED</name>
+ <description>Calibration timer has been stopped and is ready to process new tasks</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>HFCLKSTARTED</name>
+ <description>Write '1' to enable interrupt for event HFCLKSTARTED</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LFCLKSTARTED</name>
+ <description>Write '1' to enable interrupt for event LFCLKSTARTED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DONE</name>
+ <description>Write '1' to enable interrupt for event DONE</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CTTO</name>
+ <description>Write '1' to enable interrupt for event CTTO</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CTSTARTED</name>
+ <description>Write '1' to enable interrupt for event CTSTARTED</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CTSTOPPED</name>
+ <description>Write '1' to enable interrupt for event CTSTOPPED</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>HFCLKSTARTED</name>
+ <description>Write '1' to disable interrupt for event HFCLKSTARTED</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LFCLKSTARTED</name>
+ <description>Write '1' to disable interrupt for event LFCLKSTARTED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DONE</name>
+ <description>Write '1' to disable interrupt for event DONE</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CTTO</name>
+ <description>Write '1' to disable interrupt for event CTTO</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CTSTARTED</name>
+ <description>Write '1' to disable interrupt for event CTSTARTED</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CTSTOPPED</name>
+ <description>Write '1' to disable interrupt for event CTSTOPPED</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>HFCLKRUN</name>
+ <description>Status indicating that HFCLKSTART task has been triggered</description>
+ <addressOffset>0x408</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>STATUS</name>
+ <description>HFCLKSTART task triggered or not</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotTriggered</name>
+ <description>Task not triggered</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Triggered</name>
+ <description>Task triggered</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>HFCLKSTAT</name>
+ <description>HFCLK status</description>
+ <addressOffset>0x40C</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>SRC</name>
+ <description>Source of HFCLK</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>RC</name>
+ <description>64 MHz internal oscillator (HFINT)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Xtal</name>
+ <description>64 MHz crystal oscillator (HFXO)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STATE</name>
+ <description>HFCLK state</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotRunning</name>
+ <description>HFCLK not running</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Running</name>
+ <description>HFCLK running</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LFCLKRUN</name>
+ <description>Status indicating that LFCLKSTART task has been triggered</description>
+ <addressOffset>0x414</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>STATUS</name>
+ <description>LFCLKSTART task triggered or not</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotTriggered</name>
+ <description>Task not triggered</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Triggered</name>
+ <description>Task triggered</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LFCLKSTAT</name>
+ <description>LFCLK status</description>
+ <addressOffset>0x418</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>SRC</name>
+ <description>Source of LFCLK</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>RC</name>
+ <description>32.768 kHz RC oscillator (LFRC)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Xtal</name>
+ <description>32.768 kHz crystal oscillator (LFXO)</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Synth</name>
+ <description>32.768 kHz synthesized from HFCLK (LFSYNT)</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STATE</name>
+ <description>LFCLK state</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotRunning</name>
+ <description>LFCLK not running</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Running</name>
+ <description>LFCLK running</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LFCLKSRCCOPY</name>
+ <description>Copy of LFCLKSRC register, set when LFCLKSTART task was triggered</description>
+ <addressOffset>0x41C</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>SRC</name>
+ <description>Clock source</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>RC</name>
+ <description>32.768 kHz RC oscillator (LFRC)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Xtal</name>
+ <description>32.768 kHz crystal oscillator (LFXO)</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Synth</name>
+ <description>32.768 kHz synthesized from HFCLK (LFSYNT)</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LFCLKSRC</name>
+ <description>Clock source for the LFCLK</description>
+ <addressOffset>0x518</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>SRC</name>
+ <description>Clock source</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>RC</name>
+ <description>32.768 kHz RC oscillator (LFRC)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Xtal</name>
+ <description>32.768 kHz crystal oscillator (LFXO)</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Synth</name>
+ <description>32.768 kHz synthesized from HFCLK (LFSYNT)</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>BYPASS</name>
+ <description>Enable or disable bypass of LFCLK crystal oscillator with external clock source</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable (use with Xtal or low-swing external source)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable (use with rail-to-rail external source)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EXTERNAL</name>
+ <description>Enable or disable external source for LFCLK</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable external source (use with Xtal)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable use of external source instead of Xtal (SRC needs to be set to Xtal)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>HFXODEBOUNCE</name>
+ <description>HFXO debounce time. The HFXO is started by triggering the TASKS_HFCLKSTART task.</description>
+ <addressOffset>0x528</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000010</resetValue>
+ <fields>
+ <field>
+ <name>HFXODEBOUNCE</name>
+ <description>HFXO debounce time. Debounce time = HFXODEBOUNCE * 16 us.</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Db256us</name>
+ <description>256 us debounce time. Recommended for TSX-3225, FA-20H and FA-128 crystals.</description>
+ <value>0x10</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Db1024us</name>
+ <description>1024 us debounce time. Recommended for NX1612AA and NX1210AB crystals.</description>
+ <value>0x40</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LFXODEBOUNCE</name>
+ <description>LFXO debounce time. The LFXO is started by triggering the TASKS_LFCLKSTART task when the LFCLKSRC register is configured for Xtal.</description>
+ <addressOffset>0x52C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>LFXODEBOUNCE</name>
+ <description>LFXO debounce time.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Normal</name>
+ <description>8192 32.768 kHz periods, or 0.25 s. Recommended for normal Operating Temperature conditions.</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Extended</name>
+ <description>16384 32.768 kHz periods, or 0.5 s. Recommended for Extended Operating Temperature conditions.</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CTIV</name>
+ <description>Calibration timer interval</description>
+ <addressOffset>0x538</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CTIV</name>
+ <description>Calibration timer interval in multiple of 0.25 seconds. Range: 0.25 seconds to 31.75 seconds.</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TRACECONFIG</name>
+ <description>Clocking options for the trace port debug interface</description>
+ <addressOffset>0x55C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>TRACEPORTSPEED</name>
+ <description>Speed of trace port clock. Note that the TRACECLK pin will output this clock divided by two.</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>32MHz</name>
+ <description>32 MHz trace port clock (TRACECLK = 16 MHz)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>16MHz</name>
+ <description>16 MHz trace port clock (TRACECLK = 8 MHz)</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>8MHz</name>
+ <description>8 MHz trace port clock (TRACECLK = 4 MHz)</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>4MHz</name>
+ <description>4 MHz trace port clock (TRACECLK = 2 MHz)</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRACEMUX</name>
+ <description>Pin multiplexing of trace signals. See pin assignment chapter for more details.</description>
+ <lsb>16</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>GPIO</name>
+ <description>No trace signals routed to pins. All pins can be used as regular GPIOs.</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Serial</name>
+ <description>SWO trace signal routed to pin. Remaining pins can be used as regular GPIOs.</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Parallel</name>
+ <description>All trace signals (TRACECLK and TRACEDATA[n]) routed to pins.</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>POWER</name>
+ <description>Power control</description>
+ <baseAddress>0x40000000</baseAddress>
+ <alternatePeripheral>CLOCK</alternatePeripheral>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>POWER_CLOCK</name>
+ <value>0</value>
+ </interrupt>
+ <groupName>POWER</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_CONSTLAT</name>
+ <description>Enable Constant Latency mode</description>
+ <addressOffset>0x78</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CONSTLAT</name>
+ <description>Enable Constant Latency mode</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_LOWPWR</name>
+ <description>Enable Low-power mode (variable latency)</description>
+ <addressOffset>0x7C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_LOWPWR</name>
+ <description>Enable Low-power mode (variable latency)</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_POFWARN</name>
+ <description>Power failure warning</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_POFWARN</name>
+ <description>Power failure warning</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_SLEEPENTER</name>
+ <description>CPU entered WFI/WFE sleep</description>
+ <addressOffset>0x114</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_SLEEPENTER</name>
+ <description>CPU entered WFI/WFE sleep</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_SLEEPEXIT</name>
+ <description>CPU exited WFI/WFE sleep</description>
+ <addressOffset>0x118</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_SLEEPEXIT</name>
+ <description>CPU exited WFI/WFE sleep</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_USBDETECTED</name>
+ <description>Voltage supply detected on VBUS</description>
+ <addressOffset>0x11C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_USBDETECTED</name>
+ <description>Voltage supply detected on VBUS</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_USBREMOVED</name>
+ <description>Voltage supply removed from VBUS</description>
+ <addressOffset>0x120</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_USBREMOVED</name>
+ <description>Voltage supply removed from VBUS</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_USBPWRRDY</name>
+ <description>USB 3.3 V supply ready</description>
+ <addressOffset>0x124</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_USBPWRRDY</name>
+ <description>USB 3.3 V supply ready</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>POFWARN</name>
+ <description>Write '1' to enable interrupt for event POFWARN</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SLEEPENTER</name>
+ <description>Write '1' to enable interrupt for event SLEEPENTER</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SLEEPEXIT</name>
+ <description>Write '1' to enable interrupt for event SLEEPEXIT</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>USBDETECTED</name>
+ <description>Write '1' to enable interrupt for event USBDETECTED</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>USBREMOVED</name>
+ <description>Write '1' to enable interrupt for event USBREMOVED</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>USBPWRRDY</name>
+ <description>Write '1' to enable interrupt for event USBPWRRDY</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>POFWARN</name>
+ <description>Write '1' to disable interrupt for event POFWARN</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SLEEPENTER</name>
+ <description>Write '1' to disable interrupt for event SLEEPENTER</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SLEEPEXIT</name>
+ <description>Write '1' to disable interrupt for event SLEEPEXIT</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>USBDETECTED</name>
+ <description>Write '1' to disable interrupt for event USBDETECTED</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>USBREMOVED</name>
+ <description>Write '1' to disable interrupt for event USBREMOVED</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>USBPWRRDY</name>
+ <description>Write '1' to disable interrupt for event USBPWRRDY</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RESETREAS</name>
+ <description>Reset reason</description>
+ <addressOffset>0x400</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>RESETPIN</name>
+ <description>Reset from pin-reset detected</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Not detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DOG</name>
+ <description>Reset from watchdog detected</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Not detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SREQ</name>
+ <description>Reset from soft reset detected</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Not detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LOCKUP</name>
+ <description>Reset from CPU lock-up detected</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Not detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OFF</name>
+ <description>Reset due to wake up from System OFF mode when wakeup is triggered from DETECT signal from GPIO</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Not detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LPCOMP</name>
+ <description>Reset due to wake up from System OFF mode when wakeup is triggered from ANADETECT signal from LPCOMP</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Not detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DIF</name>
+ <description>Reset due to wake up from System OFF mode when wakeup is triggered from entering into debug interface mode</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Not detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>NFC</name>
+ <description>Reset due to wake up from System OFF mode by NFC field detect</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Not detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>VBUS</name>
+ <description>Reset due to wake up from System OFF mode by VBUS rising into valid range</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Not detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RAMSTATUS</name>
+ <description>Deprecated register - RAM status register</description>
+ <addressOffset>0x428</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>RAMBLOCK0</name>
+ <description>RAM block 0 is on or off/powering up</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RAMBLOCK1</name>
+ <description>RAM block 1 is on or off/powering up</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RAMBLOCK2</name>
+ <description>RAM block 2 is on or off/powering up</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RAMBLOCK3</name>
+ <description>RAM block 3 is on or off/powering up</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>USBREGSTATUS</name>
+ <description>USB supply status</description>
+ <addressOffset>0x438</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>VBUSDETECT</name>
+ <description>VBUS input detection status (USBDETECTED and USBREMOVED events are derived from this information)</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoVbus</name>
+ <description>VBUS voltage below valid threshold</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>VbusPresent</name>
+ <description>VBUS voltage above valid threshold</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OUTPUTRDY</name>
+ <description>USB supply output settling time elapsed</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotReady</name>
+ <description>USBREG output settling time not elapsed</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ready</name>
+ <description>USBREG output settling time elapsed (same information as USBPWRRDY event)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SYSTEMOFF</name>
+ <description>System OFF register</description>
+ <addressOffset>0x500</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>SYSTEMOFF</name>
+ <description>Enable System OFF mode</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Enter</name>
+ <description>Enable System OFF mode</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>POFCON</name>
+ <description>Power-fail comparator configuration</description>
+ <addressOffset>0x510</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>POF</name>
+ <description>Enable or disable power failure warning</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>THRESHOLD</name>
+ <description>Power-fail comparator threshold setting. This setting applies both for normal voltage mode (supply connected to both VDD and VDDH) and high voltage mode (supply connected to VDDH only). Values 0-3 set threshold below 1.7 V and should not be used as brown out detection will be activated before power failure warning on such low voltages.</description>
+ <lsb>1</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>V17</name>
+ <description>Set threshold to 1.7 V</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V18</name>
+ <description>Set threshold to 1.8 V</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V19</name>
+ <description>Set threshold to 1.9 V</description>
+ <value>6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V20</name>
+ <description>Set threshold to 2.0 V</description>
+ <value>7</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V21</name>
+ <description>Set threshold to 2.1 V</description>
+ <value>8</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V22</name>
+ <description>Set threshold to 2.2 V</description>
+ <value>9</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V23</name>
+ <description>Set threshold to 2.3 V</description>
+ <value>10</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V24</name>
+ <description>Set threshold to 2.4 V</description>
+ <value>11</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V25</name>
+ <description>Set threshold to 2.5 V</description>
+ <value>12</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V26</name>
+ <description>Set threshold to 2.6 V</description>
+ <value>13</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V27</name>
+ <description>Set threshold to 2.7 V</description>
+ <value>14</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V28</name>
+ <description>Set threshold to 2.8 V</description>
+ <value>15</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>THRESHOLDVDDH</name>
+ <description>Power-fail comparator threshold setting for high voltage mode (supply connected to VDDH only). This setting does not apply for normal voltage mode (supply connected to both VDD and VDDH).</description>
+ <lsb>8</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>V27</name>
+ <description>Set threshold to 2.7 V</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V28</name>
+ <description>Set threshold to 2.8 V</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V29</name>
+ <description>Set threshold to 2.9 V</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V30</name>
+ <description>Set threshold to 3.0 V</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V31</name>
+ <description>Set threshold to 3.1 V</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V32</name>
+ <description>Set threshold to 3.2 V</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V33</name>
+ <description>Set threshold to 3.3 V</description>
+ <value>6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V34</name>
+ <description>Set threshold to 3.4 V</description>
+ <value>7</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V35</name>
+ <description>Set threshold to 3.5 V</description>
+ <value>8</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V36</name>
+ <description>Set threshold to 3.6 V</description>
+ <value>9</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V37</name>
+ <description>Set threshold to 3.7 V</description>
+ <value>10</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V38</name>
+ <description>Set threshold to 3.8 V</description>
+ <value>11</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V39</name>
+ <description>Set threshold to 3.9 V</description>
+ <value>12</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V40</name>
+ <description>Set threshold to 4.0 V</description>
+ <value>13</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V41</name>
+ <description>Set threshold to 4.1 V</description>
+ <value>14</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V42</name>
+ <description>Set threshold to 4.2 V</description>
+ <value>15</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>GPREGRET</name>
+ <description>General purpose retention register</description>
+ <addressOffset>0x51C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>GPREGRET</name>
+ <description>General purpose retention register</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>GPREGRET2</name>
+ <description>General purpose retention register</description>
+ <addressOffset>0x520</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>GPREGRET</name>
+ <description>General purpose retention register</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DCDCEN</name>
+ <description>Enable DC/DC converter for REG1 stage</description>
+ <addressOffset>0x578</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>DCDCEN</name>
+ <description>Enable DC/DC converter for REG1 stage.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAINREGSTATUS</name>
+ <description>Main supply status</description>
+ <addressOffset>0x640</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>MAINREGSTATUS</name>
+ <description>Main supply status</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Normal</name>
+ <description>Normal voltage mode. Voltage supplied on VDD.</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>High voltage mode. Voltage supplied on VDDH.</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <dim>9</dim>
+ <dimIncrement>0x010</dimIncrement>
+ <name>RAM[%s]</name>
+ <description>Unspecified</description>
+ <headerStructName>POWER_RAM</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x900</addressOffset>
+ <register>
+ <name>POWER</name>
+ <description>Description cluster: RAMn power control register</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x0000FFFF</resetValue>
+ <fields>
+ <field>
+ <name>S0POWER</name>
+ <description>Keep RAM section S0 on or off in System ON mode.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S1POWER</name>
+ <description>Keep RAM section S1 on or off in System ON mode.</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S2POWER</name>
+ <description>Keep RAM section S2 on or off in System ON mode.</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S3POWER</name>
+ <description>Keep RAM section S3 on or off in System ON mode.</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S4POWER</name>
+ <description>Keep RAM section S4 on or off in System ON mode.</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S5POWER</name>
+ <description>Keep RAM section S5 on or off in System ON mode.</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S6POWER</name>
+ <description>Keep RAM section S6 on or off in System ON mode.</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S7POWER</name>
+ <description>Keep RAM section S7 on or off in System ON mode.</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S8POWER</name>
+ <description>Keep RAM section S8 on or off in System ON mode.</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S9POWER</name>
+ <description>Keep RAM section S9 on or off in System ON mode.</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S10POWER</name>
+ <description>Keep RAM section S10 on or off in System ON mode.</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S11POWER</name>
+ <description>Keep RAM section S11 on or off in System ON mode.</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S12POWER</name>
+ <description>Keep RAM section S12 on or off in System ON mode.</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S13POWER</name>
+ <description>Keep RAM section S13 on or off in System ON mode.</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S14POWER</name>
+ <description>Keep RAM section S14 on or off in System ON mode.</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S15POWER</name>
+ <description>Keep RAM section S15 on or off in System ON mode.</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S0RETENTION</name>
+ <description>Keep retention on RAM section S0 when RAM section is off</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S1RETENTION</name>
+ <description>Keep retention on RAM section S1 when RAM section is off</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S2RETENTION</name>
+ <description>Keep retention on RAM section S2 when RAM section is off</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S3RETENTION</name>
+ <description>Keep retention on RAM section S3 when RAM section is off</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S4RETENTION</name>
+ <description>Keep retention on RAM section S4 when RAM section is off</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S5RETENTION</name>
+ <description>Keep retention on RAM section S5 when RAM section is off</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S6RETENTION</name>
+ <description>Keep retention on RAM section S6 when RAM section is off</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S7RETENTION</name>
+ <description>Keep retention on RAM section S7 when RAM section is off</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S8RETENTION</name>
+ <description>Keep retention on RAM section S8 when RAM section is off</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S9RETENTION</name>
+ <description>Keep retention on RAM section S9 when RAM section is off</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S10RETENTION</name>
+ <description>Keep retention on RAM section S10 when RAM section is off</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S11RETENTION</name>
+ <description>Keep retention on RAM section S11 when RAM section is off</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S12RETENTION</name>
+ <description>Keep retention on RAM section S12 when RAM section is off</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S13RETENTION</name>
+ <description>Keep retention on RAM section S13 when RAM section is off</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S14RETENTION</name>
+ <description>Keep retention on RAM section S14 when RAM section is off</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S15RETENTION</name>
+ <description>Keep retention on RAM section S15 when RAM section is off</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>POWERSET</name>
+ <description>Description cluster: RAMn power control set register</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <resetValue>0x0000FFFF</resetValue>
+ <fields>
+ <field>
+ <name>S0POWER</name>
+ <description>Keep RAM section S0 of RAMn on or off in System ON mode</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S1POWER</name>
+ <description>Keep RAM section S1 of RAMn on or off in System ON mode</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S2POWER</name>
+ <description>Keep RAM section S2 of RAMn on or off in System ON mode</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S3POWER</name>
+ <description>Keep RAM section S3 of RAMn on or off in System ON mode</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S4POWER</name>
+ <description>Keep RAM section S4 of RAMn on or off in System ON mode</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S5POWER</name>
+ <description>Keep RAM section S5 of RAMn on or off in System ON mode</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S6POWER</name>
+ <description>Keep RAM section S6 of RAMn on or off in System ON mode</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S7POWER</name>
+ <description>Keep RAM section S7 of RAMn on or off in System ON mode</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S8POWER</name>
+ <description>Keep RAM section S8 of RAMn on or off in System ON mode</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S9POWER</name>
+ <description>Keep RAM section S9 of RAMn on or off in System ON mode</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S10POWER</name>
+ <description>Keep RAM section S10 of RAMn on or off in System ON mode</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S11POWER</name>
+ <description>Keep RAM section S11 of RAMn on or off in System ON mode</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S12POWER</name>
+ <description>Keep RAM section S12 of RAMn on or off in System ON mode</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S13POWER</name>
+ <description>Keep RAM section S13 of RAMn on or off in System ON mode</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S14POWER</name>
+ <description>Keep RAM section S14 of RAMn on or off in System ON mode</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S15POWER</name>
+ <description>Keep RAM section S15 of RAMn on or off in System ON mode</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S0RETENTION</name>
+ <description>Keep retention on RAM section S0 when RAM section is switched off</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S1RETENTION</name>
+ <description>Keep retention on RAM section S1 when RAM section is switched off</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S2RETENTION</name>
+ <description>Keep retention on RAM section S2 when RAM section is switched off</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S3RETENTION</name>
+ <description>Keep retention on RAM section S3 when RAM section is switched off</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S4RETENTION</name>
+ <description>Keep retention on RAM section S4 when RAM section is switched off</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S5RETENTION</name>
+ <description>Keep retention on RAM section S5 when RAM section is switched off</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S6RETENTION</name>
+ <description>Keep retention on RAM section S6 when RAM section is switched off</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S7RETENTION</name>
+ <description>Keep retention on RAM section S7 when RAM section is switched off</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S8RETENTION</name>
+ <description>Keep retention on RAM section S8 when RAM section is switched off</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S9RETENTION</name>
+ <description>Keep retention on RAM section S9 when RAM section is switched off</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S10RETENTION</name>
+ <description>Keep retention on RAM section S10 when RAM section is switched off</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S11RETENTION</name>
+ <description>Keep retention on RAM section S11 when RAM section is switched off</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S12RETENTION</name>
+ <description>Keep retention on RAM section S12 when RAM section is switched off</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S13RETENTION</name>
+ <description>Keep retention on RAM section S13 when RAM section is switched off</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S14RETENTION</name>
+ <description>Keep retention on RAM section S14 when RAM section is switched off</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S15RETENTION</name>
+ <description>Keep retention on RAM section S15 when RAM section is switched off</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>POWERCLR</name>
+ <description>Description cluster: RAMn power control clear register</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <resetValue>0x0000FFFF</resetValue>
+ <fields>
+ <field>
+ <name>S0POWER</name>
+ <description>Keep RAM section S0 of RAMn on or off in System ON mode</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S1POWER</name>
+ <description>Keep RAM section S1 of RAMn on or off in System ON mode</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S2POWER</name>
+ <description>Keep RAM section S2 of RAMn on or off in System ON mode</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S3POWER</name>
+ <description>Keep RAM section S3 of RAMn on or off in System ON mode</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S4POWER</name>
+ <description>Keep RAM section S4 of RAMn on or off in System ON mode</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S5POWER</name>
+ <description>Keep RAM section S5 of RAMn on or off in System ON mode</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S6POWER</name>
+ <description>Keep RAM section S6 of RAMn on or off in System ON mode</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S7POWER</name>
+ <description>Keep RAM section S7 of RAMn on or off in System ON mode</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S8POWER</name>
+ <description>Keep RAM section S8 of RAMn on or off in System ON mode</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S9POWER</name>
+ <description>Keep RAM section S9 of RAMn on or off in System ON mode</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S10POWER</name>
+ <description>Keep RAM section S10 of RAMn on or off in System ON mode</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S11POWER</name>
+ <description>Keep RAM section S11 of RAMn on or off in System ON mode</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S12POWER</name>
+ <description>Keep RAM section S12 of RAMn on or off in System ON mode</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S13POWER</name>
+ <description>Keep RAM section S13 of RAMn on or off in System ON mode</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S14POWER</name>
+ <description>Keep RAM section S14 of RAMn on or off in System ON mode</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S15POWER</name>
+ <description>Keep RAM section S15 of RAMn on or off in System ON mode</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S0RETENTION</name>
+ <description>Keep retention on RAM section S0 when RAM section is switched off</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S1RETENTION</name>
+ <description>Keep retention on RAM section S1 when RAM section is switched off</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S2RETENTION</name>
+ <description>Keep retention on RAM section S2 when RAM section is switched off</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S3RETENTION</name>
+ <description>Keep retention on RAM section S3 when RAM section is switched off</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S4RETENTION</name>
+ <description>Keep retention on RAM section S4 when RAM section is switched off</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S5RETENTION</name>
+ <description>Keep retention on RAM section S5 when RAM section is switched off</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S6RETENTION</name>
+ <description>Keep retention on RAM section S6 when RAM section is switched off</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S7RETENTION</name>
+ <description>Keep retention on RAM section S7 when RAM section is switched off</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S8RETENTION</name>
+ <description>Keep retention on RAM section S8 when RAM section is switched off</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S9RETENTION</name>
+ <description>Keep retention on RAM section S9 when RAM section is switched off</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S10RETENTION</name>
+ <description>Keep retention on RAM section S10 when RAM section is switched off</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S11RETENTION</name>
+ <description>Keep retention on RAM section S11 when RAM section is switched off</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S12RETENTION</name>
+ <description>Keep retention on RAM section S12 when RAM section is switched off</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S13RETENTION</name>
+ <description>Keep retention on RAM section S13 when RAM section is switched off</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S14RETENTION</name>
+ <description>Keep retention on RAM section S14 when RAM section is switched off</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S15RETENTION</name>
+ <description>Keep retention on RAM section S15 when RAM section is switched off</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>P0</name>
+ <description>GPIO Port 1</description>
+ <baseAddress>0x50000000</baseAddress>
+ <headerStructName>GPIO</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <groupName>GPIO</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>OUT</name>
+ <description>Write GPIO port</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PIN0</name>
+ <description>Pin 0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN1</name>
+ <description>Pin 1</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN2</name>
+ <description>Pin 2</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN3</name>
+ <description>Pin 3</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN4</name>
+ <description>Pin 4</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN5</name>
+ <description>Pin 5</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN6</name>
+ <description>Pin 6</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN7</name>
+ <description>Pin 7</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN8</name>
+ <description>Pin 8</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN9</name>
+ <description>Pin 9</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN10</name>
+ <description>Pin 10</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN11</name>
+ <description>Pin 11</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN12</name>
+ <description>Pin 12</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN13</name>
+ <description>Pin 13</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN14</name>
+ <description>Pin 14</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN15</name>
+ <description>Pin 15</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN16</name>
+ <description>Pin 16</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN17</name>
+ <description>Pin 17</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN18</name>
+ <description>Pin 18</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN19</name>
+ <description>Pin 19</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN20</name>
+ <description>Pin 20</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN21</name>
+ <description>Pin 21</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN22</name>
+ <description>Pin 22</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN23</name>
+ <description>Pin 23</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN24</name>
+ <description>Pin 24</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN25</name>
+ <description>Pin 25</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN26</name>
+ <description>Pin 26</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN27</name>
+ <description>Pin 27</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN28</name>
+ <description>Pin 28</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN29</name>
+ <description>Pin 29</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN30</name>
+ <description>Pin 30</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN31</name>
+ <description>Pin 31</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>OUTSET</name>
+ <description>Set individual bits in GPIO port</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToSet</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>PIN0</name>
+ <description>Pin 0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN1</name>
+ <description>Pin 1</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN2</name>
+ <description>Pin 2</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN3</name>
+ <description>Pin 3</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN4</name>
+ <description>Pin 4</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN5</name>
+ <description>Pin 5</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN6</name>
+ <description>Pin 6</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN7</name>
+ <description>Pin 7</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN8</name>
+ <description>Pin 8</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN9</name>
+ <description>Pin 9</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN10</name>
+ <description>Pin 10</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN11</name>
+ <description>Pin 11</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN12</name>
+ <description>Pin 12</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN13</name>
+ <description>Pin 13</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN14</name>
+ <description>Pin 14</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN15</name>
+ <description>Pin 15</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN16</name>
+ <description>Pin 16</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN17</name>
+ <description>Pin 17</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN18</name>
+ <description>Pin 18</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN19</name>
+ <description>Pin 19</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN20</name>
+ <description>Pin 20</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN21</name>
+ <description>Pin 21</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN22</name>
+ <description>Pin 22</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN23</name>
+ <description>Pin 23</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN24</name>
+ <description>Pin 24</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN25</name>
+ <description>Pin 25</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN26</name>
+ <description>Pin 26</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN27</name>
+ <description>Pin 27</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN28</name>
+ <description>Pin 28</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN29</name>
+ <description>Pin 29</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN30</name>
+ <description>Pin 30</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN31</name>
+ <description>Pin 31</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets the pin high; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>OUTCLR</name>
+ <description>Clear individual bits in GPIO port</description>
+ <addressOffset>0x50C</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToClear</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>PIN0</name>
+ <description>Pin 0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN1</name>
+ <description>Pin 1</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN2</name>
+ <description>Pin 2</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN3</name>
+ <description>Pin 3</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN4</name>
+ <description>Pin 4</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN5</name>
+ <description>Pin 5</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN6</name>
+ <description>Pin 6</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN7</name>
+ <description>Pin 7</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN8</name>
+ <description>Pin 8</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN9</name>
+ <description>Pin 9</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN10</name>
+ <description>Pin 10</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN11</name>
+ <description>Pin 11</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN12</name>
+ <description>Pin 12</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN13</name>
+ <description>Pin 13</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN14</name>
+ <description>Pin 14</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN15</name>
+ <description>Pin 15</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN16</name>
+ <description>Pin 16</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN17</name>
+ <description>Pin 17</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN18</name>
+ <description>Pin 18</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN19</name>
+ <description>Pin 19</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN20</name>
+ <description>Pin 20</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN21</name>
+ <description>Pin 21</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN22</name>
+ <description>Pin 22</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN23</name>
+ <description>Pin 23</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN24</name>
+ <description>Pin 24</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN25</name>
+ <description>Pin 25</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN26</name>
+ <description>Pin 26</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN27</name>
+ <description>Pin 27</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN28</name>
+ <description>Pin 28</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN29</name>
+ <description>Pin 29</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN30</name>
+ <description>Pin 30</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN31</name>
+ <description>Pin 31</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Read: pin driver is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Read: pin driver is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets the pin low; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>IN</name>
+ <description>Read GPIO port</description>
+ <addressOffset>0x510</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>PIN0</name>
+ <description>Pin 0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN1</name>
+ <description>Pin 1</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN2</name>
+ <description>Pin 2</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN3</name>
+ <description>Pin 3</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN4</name>
+ <description>Pin 4</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN5</name>
+ <description>Pin 5</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN6</name>
+ <description>Pin 6</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN7</name>
+ <description>Pin 7</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN8</name>
+ <description>Pin 8</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN9</name>
+ <description>Pin 9</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN10</name>
+ <description>Pin 10</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN11</name>
+ <description>Pin 11</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN12</name>
+ <description>Pin 12</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN13</name>
+ <description>Pin 13</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN14</name>
+ <description>Pin 14</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN15</name>
+ <description>Pin 15</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN16</name>
+ <description>Pin 16</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN17</name>
+ <description>Pin 17</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN18</name>
+ <description>Pin 18</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN19</name>
+ <description>Pin 19</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN20</name>
+ <description>Pin 20</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN21</name>
+ <description>Pin 21</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN22</name>
+ <description>Pin 22</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN23</name>
+ <description>Pin 23</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN24</name>
+ <description>Pin 24</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN25</name>
+ <description>Pin 25</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN26</name>
+ <description>Pin 26</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN27</name>
+ <description>Pin 27</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN28</name>
+ <description>Pin 28</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN29</name>
+ <description>Pin 29</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN30</name>
+ <description>Pin 30</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN31</name>
+ <description>Pin 31</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Pin input is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Pin input is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DIR</name>
+ <description>Direction of GPIO pins</description>
+ <addressOffset>0x514</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PIN0</name>
+ <description>Pin 0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN1</name>
+ <description>Pin 1</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN2</name>
+ <description>Pin 2</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN3</name>
+ <description>Pin 3</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN4</name>
+ <description>Pin 4</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN5</name>
+ <description>Pin 5</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN6</name>
+ <description>Pin 6</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN7</name>
+ <description>Pin 7</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN8</name>
+ <description>Pin 8</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN9</name>
+ <description>Pin 9</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN10</name>
+ <description>Pin 10</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN11</name>
+ <description>Pin 11</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN12</name>
+ <description>Pin 12</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN13</name>
+ <description>Pin 13</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN14</name>
+ <description>Pin 14</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN15</name>
+ <description>Pin 15</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN16</name>
+ <description>Pin 16</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN17</name>
+ <description>Pin 17</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN18</name>
+ <description>Pin 18</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN19</name>
+ <description>Pin 19</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN20</name>
+ <description>Pin 20</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN21</name>
+ <description>Pin 21</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN22</name>
+ <description>Pin 22</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN23</name>
+ <description>Pin 23</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN24</name>
+ <description>Pin 24</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN25</name>
+ <description>Pin 25</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN26</name>
+ <description>Pin 26</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN27</name>
+ <description>Pin 27</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN28</name>
+ <description>Pin 28</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN29</name>
+ <description>Pin 29</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN30</name>
+ <description>Pin 30</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN31</name>
+ <description>Pin 31</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DIRSET</name>
+ <description>DIR set register</description>
+ <addressOffset>0x518</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToSet</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>PIN0</name>
+ <description>Set as output pin 0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN1</name>
+ <description>Set as output pin 1</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN2</name>
+ <description>Set as output pin 2</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN3</name>
+ <description>Set as output pin 3</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN4</name>
+ <description>Set as output pin 4</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN5</name>
+ <description>Set as output pin 5</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN6</name>
+ <description>Set as output pin 6</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN7</name>
+ <description>Set as output pin 7</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN8</name>
+ <description>Set as output pin 8</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN9</name>
+ <description>Set as output pin 9</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN10</name>
+ <description>Set as output pin 10</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN11</name>
+ <description>Set as output pin 11</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN12</name>
+ <description>Set as output pin 12</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN13</name>
+ <description>Set as output pin 13</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN14</name>
+ <description>Set as output pin 14</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN15</name>
+ <description>Set as output pin 15</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN16</name>
+ <description>Set as output pin 16</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN17</name>
+ <description>Set as output pin 17</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN18</name>
+ <description>Set as output pin 18</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN19</name>
+ <description>Set as output pin 19</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN20</name>
+ <description>Set as output pin 20</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN21</name>
+ <description>Set as output pin 21</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN22</name>
+ <description>Set as output pin 22</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN23</name>
+ <description>Set as output pin 23</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN24</name>
+ <description>Set as output pin 24</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN25</name>
+ <description>Set as output pin 25</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN26</name>
+ <description>Set as output pin 26</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN27</name>
+ <description>Set as output pin 27</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN28</name>
+ <description>Set as output pin 28</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN29</name>
+ <description>Set as output pin 29</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN30</name>
+ <description>Set as output pin 30</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN31</name>
+ <description>Set as output pin 31</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: writing a '1' sets pin to output; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DIRCLR</name>
+ <description>DIR clear register</description>
+ <addressOffset>0x51C</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToClear</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>PIN0</name>
+ <description>Set as input pin 0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN1</name>
+ <description>Set as input pin 1</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN2</name>
+ <description>Set as input pin 2</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN3</name>
+ <description>Set as input pin 3</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN4</name>
+ <description>Set as input pin 4</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN5</name>
+ <description>Set as input pin 5</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN6</name>
+ <description>Set as input pin 6</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN7</name>
+ <description>Set as input pin 7</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN8</name>
+ <description>Set as input pin 8</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN9</name>
+ <description>Set as input pin 9</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN10</name>
+ <description>Set as input pin 10</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN11</name>
+ <description>Set as input pin 11</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN12</name>
+ <description>Set as input pin 12</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN13</name>
+ <description>Set as input pin 13</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN14</name>
+ <description>Set as input pin 14</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN15</name>
+ <description>Set as input pin 15</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN16</name>
+ <description>Set as input pin 16</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN17</name>
+ <description>Set as input pin 17</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN18</name>
+ <description>Set as input pin 18</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN19</name>
+ <description>Set as input pin 19</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN20</name>
+ <description>Set as input pin 20</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN21</name>
+ <description>Set as input pin 21</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN22</name>
+ <description>Set as input pin 22</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN23</name>
+ <description>Set as input pin 23</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN24</name>
+ <description>Set as input pin 24</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN25</name>
+ <description>Set as input pin 25</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN26</name>
+ <description>Set as input pin 26</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN27</name>
+ <description>Set as input pin 27</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN28</name>
+ <description>Set as input pin 28</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN29</name>
+ <description>Set as input pin 29</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN30</name>
+ <description>Set as input pin 30</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN31</name>
+ <description>Set as input pin 31</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Read: pin set as input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Read: pin set as output</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: writing a '1' sets pin to input; writing a '0' has no effect</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LATCH</name>
+ <description>Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers</description>
+ <addressOffset>0x520</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PIN0</name>
+ <description>Status on whether PIN0 has met criteria set in PIN_CNF0.SENSE register. Write '1' to clear.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN1</name>
+ <description>Status on whether PIN1 has met criteria set in PIN_CNF1.SENSE register. Write '1' to clear.</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN2</name>
+ <description>Status on whether PIN2 has met criteria set in PIN_CNF2.SENSE register. Write '1' to clear.</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN3</name>
+ <description>Status on whether PIN3 has met criteria set in PIN_CNF3.SENSE register. Write '1' to clear.</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN4</name>
+ <description>Status on whether PIN4 has met criteria set in PIN_CNF4.SENSE register. Write '1' to clear.</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN5</name>
+ <description>Status on whether PIN5 has met criteria set in PIN_CNF5.SENSE register. Write '1' to clear.</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN6</name>
+ <description>Status on whether PIN6 has met criteria set in PIN_CNF6.SENSE register. Write '1' to clear.</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN7</name>
+ <description>Status on whether PIN7 has met criteria set in PIN_CNF7.SENSE register. Write '1' to clear.</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN8</name>
+ <description>Status on whether PIN8 has met criteria set in PIN_CNF8.SENSE register. Write '1' to clear.</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN9</name>
+ <description>Status on whether PIN9 has met criteria set in PIN_CNF9.SENSE register. Write '1' to clear.</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN10</name>
+ <description>Status on whether PIN10 has met criteria set in PIN_CNF10.SENSE register. Write '1' to clear.</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN11</name>
+ <description>Status on whether PIN11 has met criteria set in PIN_CNF11.SENSE register. Write '1' to clear.</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN12</name>
+ <description>Status on whether PIN12 has met criteria set in PIN_CNF12.SENSE register. Write '1' to clear.</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN13</name>
+ <description>Status on whether PIN13 has met criteria set in PIN_CNF13.SENSE register. Write '1' to clear.</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN14</name>
+ <description>Status on whether PIN14 has met criteria set in PIN_CNF14.SENSE register. Write '1' to clear.</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN15</name>
+ <description>Status on whether PIN15 has met criteria set in PIN_CNF15.SENSE register. Write '1' to clear.</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN16</name>
+ <description>Status on whether PIN16 has met criteria set in PIN_CNF16.SENSE register. Write '1' to clear.</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN17</name>
+ <description>Status on whether PIN17 has met criteria set in PIN_CNF17.SENSE register. Write '1' to clear.</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN18</name>
+ <description>Status on whether PIN18 has met criteria set in PIN_CNF18.SENSE register. Write '1' to clear.</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN19</name>
+ <description>Status on whether PIN19 has met criteria set in PIN_CNF19.SENSE register. Write '1' to clear.</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN20</name>
+ <description>Status on whether PIN20 has met criteria set in PIN_CNF20.SENSE register. Write '1' to clear.</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN21</name>
+ <description>Status on whether PIN21 has met criteria set in PIN_CNF21.SENSE register. Write '1' to clear.</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN22</name>
+ <description>Status on whether PIN22 has met criteria set in PIN_CNF22.SENSE register. Write '1' to clear.</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN23</name>
+ <description>Status on whether PIN23 has met criteria set in PIN_CNF23.SENSE register. Write '1' to clear.</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN24</name>
+ <description>Status on whether PIN24 has met criteria set in PIN_CNF24.SENSE register. Write '1' to clear.</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN25</name>
+ <description>Status on whether PIN25 has met criteria set in PIN_CNF25.SENSE register. Write '1' to clear.</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN26</name>
+ <description>Status on whether PIN26 has met criteria set in PIN_CNF26.SENSE register. Write '1' to clear.</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN27</name>
+ <description>Status on whether PIN27 has met criteria set in PIN_CNF27.SENSE register. Write '1' to clear.</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN28</name>
+ <description>Status on whether PIN28 has met criteria set in PIN_CNF28.SENSE register. Write '1' to clear.</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN29</name>
+ <description>Status on whether PIN29 has met criteria set in PIN_CNF29.SENSE register. Write '1' to clear.</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN30</name>
+ <description>Status on whether PIN30 has met criteria set in PIN_CNF30.SENSE register. Write '1' to clear.</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PIN31</name>
+ <description>Status on whether PIN31 has met criteria set in PIN_CNF31.SENSE register. Write '1' to clear.</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLatched</name>
+ <description>Criteria has not been met</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Latched</name>
+ <description>Criteria has been met</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DETECTMODE</name>
+ <description>Select between default DETECT signal behaviour and LDETECT mode</description>
+ <addressOffset>0x524</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>DETECTMODE</name>
+ <description>Select between default DETECT signal behaviour and LDETECT mode</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Default</name>
+ <description>DETECT directly connected to PIN DETECT signals</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>LDETECT</name>
+ <description>Use the latched LDETECT behaviour</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x20</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>PIN_CNF[%s]</name>
+ <description>Description collection: Configuration of GPIO pins</description>
+ <addressOffset>0x700</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000002</resetValue>
+ <fields>
+ <field>
+ <name>DIR</name>
+ <description>Pin direction. Same physical register as DIR register</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Input</name>
+ <description>Configure pin as an input pin</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Output</name>
+ <description>Configure pin as an output pin</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>INPUT</name>
+ <description>Connect or disconnect input buffer</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Connect</name>
+ <description>Connect input buffer</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Disconnect</name>
+ <description>Disconnect input buffer</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PULL</name>
+ <description>Pull configuration</description>
+ <lsb>2</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>No pull</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Pulldown</name>
+ <description>Pull down on pin</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Pullup</name>
+ <description>Pull up on pin</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DRIVE</name>
+ <description>Drive configuration</description>
+ <lsb>8</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>S0S1</name>
+ <description>Standard '0', standard '1'</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>H0S1</name>
+ <description>High drive '0', standard '1'</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>S0H1</name>
+ <description>Standard '0', high drive '1'</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>H0H1</name>
+ <description>High drive '0', high 'drive '1''</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>D0S1</name>
+ <description>Disconnect '0' standard '1' (normally used for wired-or connections)</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>D0H1</name>
+ <description>Disconnect '0', high drive '1' (normally used for wired-or connections)</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>S0D1</name>
+ <description>Standard '0'. disconnect '1' (normally used for wired-and connections)</description>
+ <value>6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>H0D1</name>
+ <description>High drive '0', disconnect '1' (normally used for wired-and connections)</description>
+ <value>7</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SENSE</name>
+ <description>Pin sensing mechanism</description>
+ <lsb>16</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Sense for high level</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Sense for low level</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral derivedFrom="P0">
+ <name>P1</name>
+ <description>GPIO Port 2</description>
+ <baseAddress>0x50000300</baseAddress>
+ <alternatePeripheral>P0</alternatePeripheral>
+ </peripheral>
+ <peripheral>
+ <name>RADIO</name>
+ <description>2.4 GHz radio</description>
+ <baseAddress>0x40001000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>RADIO</name>
+ <value>1</value>
+ </interrupt>
+ <groupName>RADIO</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_TXEN</name>
+ <description>Enable RADIO in TX mode</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_TXEN</name>
+ <description>Enable RADIO in TX mode</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_RXEN</name>
+ <description>Enable RADIO in RX mode</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_RXEN</name>
+ <description>Enable RADIO in RX mode</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_START</name>
+ <description>Start RADIO</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_START</name>
+ <description>Start RADIO</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stop RADIO</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stop RADIO</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_DISABLE</name>
+ <description>Disable RADIO</description>
+ <addressOffset>0x010</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_DISABLE</name>
+ <description>Disable RADIO</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_RSSISTART</name>
+ <description>Start the RSSI and take one single sample of the receive signal strength</description>
+ <addressOffset>0x014</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_RSSISTART</name>
+ <description>Start the RSSI and take one single sample of the receive signal strength</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_RSSISTOP</name>
+ <description>Stop the RSSI measurement</description>
+ <addressOffset>0x018</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_RSSISTOP</name>
+ <description>Stop the RSSI measurement</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_BCSTART</name>
+ <description>Start the bit counter</description>
+ <addressOffset>0x01C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_BCSTART</name>
+ <description>Start the bit counter</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_BCSTOP</name>
+ <description>Stop the bit counter</description>
+ <addressOffset>0x020</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_BCSTOP</name>
+ <description>Stop the bit counter</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_EDSTART</name>
+ <description>Start the energy detect measurement used in IEEE 802.15.4 mode</description>
+ <addressOffset>0x024</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_EDSTART</name>
+ <description>Start the energy detect measurement used in IEEE 802.15.4 mode</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_EDSTOP</name>
+ <description>Stop the energy detect measurement</description>
+ <addressOffset>0x028</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_EDSTOP</name>
+ <description>Stop the energy detect measurement</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_CCASTART</name>
+ <description>Start the clear channel assessment used in IEEE 802.15.4 mode</description>
+ <addressOffset>0x02C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CCASTART</name>
+ <description>Start the clear channel assessment used in IEEE 802.15.4 mode</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_CCASTOP</name>
+ <description>Stop the clear channel assessment</description>
+ <addressOffset>0x030</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CCASTOP</name>
+ <description>Stop the clear channel assessment</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_READY</name>
+ <description>RADIO has ramped up and is ready to be started</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_READY</name>
+ <description>RADIO has ramped up and is ready to be started</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ADDRESS</name>
+ <description>Address sent or received</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ADDRESS</name>
+ <description>Address sent or received</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_PAYLOAD</name>
+ <description>Packet payload sent or received</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_PAYLOAD</name>
+ <description>Packet payload sent or received</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_END</name>
+ <description>Packet sent or received</description>
+ <addressOffset>0x10C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_END</name>
+ <description>Packet sent or received</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_DISABLED</name>
+ <description>RADIO has been disabled</description>
+ <addressOffset>0x110</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_DISABLED</name>
+ <description>RADIO has been disabled</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_DEVMATCH</name>
+ <description>A device address match occurred on the last received packet</description>
+ <addressOffset>0x114</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_DEVMATCH</name>
+ <description>A device address match occurred on the last received packet</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_DEVMISS</name>
+ <description>No device address match occurred on the last received packet</description>
+ <addressOffset>0x118</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_DEVMISS</name>
+ <description>No device address match occurred on the last received packet</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RSSIEND</name>
+ <description>Sampling of receive signal strength complete</description>
+ <addressOffset>0x11C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RSSIEND</name>
+ <description>Sampling of receive signal strength complete</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_BCMATCH</name>
+ <description>Bit counter reached bit count value</description>
+ <addressOffset>0x128</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_BCMATCH</name>
+ <description>Bit counter reached bit count value</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_CRCOK</name>
+ <description>Packet received with CRC ok</description>
+ <addressOffset>0x130</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CRCOK</name>
+ <description>Packet received with CRC ok</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_CRCERROR</name>
+ <description>Packet received with CRC error</description>
+ <addressOffset>0x134</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CRCERROR</name>
+ <description>Packet received with CRC error</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_FRAMESTART</name>
+ <description>IEEE 802.15.4 length field received</description>
+ <addressOffset>0x138</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_FRAMESTART</name>
+ <description>IEEE 802.15.4 length field received</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_EDEND</name>
+ <description>Sampling of energy detection complete. A new ED sample is ready for readout from the RADIO.EDSAMPLE register</description>
+ <addressOffset>0x13C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_EDEND</name>
+ <description>Sampling of energy detection complete. A new ED sample is ready for readout from the RADIO.EDSAMPLE register</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_EDSTOPPED</name>
+ <description>The sampling of energy detection has stopped</description>
+ <addressOffset>0x140</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_EDSTOPPED</name>
+ <description>The sampling of energy detection has stopped</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_CCAIDLE</name>
+ <description>Wireless medium in idle - clear to send</description>
+ <addressOffset>0x144</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CCAIDLE</name>
+ <description>Wireless medium in idle - clear to send</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_CCABUSY</name>
+ <description>Wireless medium busy - do not send</description>
+ <addressOffset>0x148</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CCABUSY</name>
+ <description>Wireless medium busy - do not send</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_CCASTOPPED</name>
+ <description>The CCA has stopped</description>
+ <addressOffset>0x14C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CCASTOPPED</name>
+ <description>The CCA has stopped</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RATEBOOST</name>
+ <description>Ble_LR CI field received, receive mode is changed from Ble_LR125Kbit to Ble_LR500Kbit.</description>
+ <addressOffset>0x150</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RATEBOOST</name>
+ <description>Ble_LR CI field received, receive mode is changed from Ble_LR125Kbit to Ble_LR500Kbit.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_TXREADY</name>
+ <description>RADIO has ramped up and is ready to be started TX path</description>
+ <addressOffset>0x154</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TXREADY</name>
+ <description>RADIO has ramped up and is ready to be started TX path</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RXREADY</name>
+ <description>RADIO has ramped up and is ready to be started RX path</description>
+ <addressOffset>0x158</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RXREADY</name>
+ <description>RADIO has ramped up and is ready to be started RX path</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_MHRMATCH</name>
+ <description>MAC header match found</description>
+ <addressOffset>0x15C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_MHRMATCH</name>
+ <description>MAC header match found</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_PHYEND</name>
+ <description>Generated when last bit is sent on air</description>
+ <addressOffset>0x16C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_PHYEND</name>
+ <description>Generated when last bit is sent on air</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_CTEPRESENT</name>
+ <description>CTE is present (early warning right after receiving CTEInfo byte)</description>
+ <addressOffset>0x170</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CTEPRESENT</name>
+ <description>CTE is present (early warning right after receiving CTEInfo byte)</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>READY_START</name>
+ <description>Shortcut between event READY and task START</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>END_DISABLE</name>
+ <description>Shortcut between event END and task DISABLE</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DISABLED_TXEN</name>
+ <description>Shortcut between event DISABLED and task TXEN</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DISABLED_RXEN</name>
+ <description>Shortcut between event DISABLED and task RXEN</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ADDRESS_RSSISTART</name>
+ <description>Shortcut between event ADDRESS and task RSSISTART</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>END_START</name>
+ <description>Shortcut between event END and task START</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ADDRESS_BCSTART</name>
+ <description>Shortcut between event ADDRESS and task BCSTART</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DISABLED_RSSISTOP</name>
+ <description>Shortcut between event DISABLED and task RSSISTOP</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXREADY_CCASTART</name>
+ <description>Shortcut between event RXREADY and task CCASTART</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CCAIDLE_TXEN</name>
+ <description>Shortcut between event CCAIDLE and task TXEN</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CCABUSY_DISABLE</name>
+ <description>Shortcut between event CCABUSY and task DISABLE</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>FRAMESTART_BCSTART</name>
+ <description>Shortcut between event FRAMESTART and task BCSTART</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>READY_EDSTART</name>
+ <description>Shortcut between event READY and task EDSTART</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EDEND_DISABLE</name>
+ <description>Shortcut between event EDEND and task DISABLE</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CCAIDLE_STOP</name>
+ <description>Shortcut between event CCAIDLE and task STOP</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXREADY_START</name>
+ <description>Shortcut between event TXREADY and task START</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXREADY_START</name>
+ <description>Shortcut between event RXREADY and task START</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PHYEND_DISABLE</name>
+ <description>Shortcut between event PHYEND and task DISABLE</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PHYEND_START</name>
+ <description>Shortcut between event PHYEND and task START</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>READY</name>
+ <description>Write '1' to enable interrupt for event READY</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ADDRESS</name>
+ <description>Write '1' to enable interrupt for event ADDRESS</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PAYLOAD</name>
+ <description>Write '1' to enable interrupt for event PAYLOAD</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>END</name>
+ <description>Write '1' to enable interrupt for event END</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DISABLED</name>
+ <description>Write '1' to enable interrupt for event DISABLED</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DEVMATCH</name>
+ <description>Write '1' to enable interrupt for event DEVMATCH</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DEVMISS</name>
+ <description>Write '1' to enable interrupt for event DEVMISS</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RSSIEND</name>
+ <description>Write '1' to enable interrupt for event RSSIEND</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>BCMATCH</name>
+ <description>Write '1' to enable interrupt for event BCMATCH</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CRCOK</name>
+ <description>Write '1' to enable interrupt for event CRCOK</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CRCERROR</name>
+ <description>Write '1' to enable interrupt for event CRCERROR</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>FRAMESTART</name>
+ <description>Write '1' to enable interrupt for event FRAMESTART</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EDEND</name>
+ <description>Write '1' to enable interrupt for event EDEND</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EDSTOPPED</name>
+ <description>Write '1' to enable interrupt for event EDSTOPPED</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CCAIDLE</name>
+ <description>Write '1' to enable interrupt for event CCAIDLE</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CCABUSY</name>
+ <description>Write '1' to enable interrupt for event CCABUSY</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CCASTOPPED</name>
+ <description>Write '1' to enable interrupt for event CCASTOPPED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RATEBOOST</name>
+ <description>Write '1' to enable interrupt for event RATEBOOST</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXREADY</name>
+ <description>Write '1' to enable interrupt for event TXREADY</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXREADY</name>
+ <description>Write '1' to enable interrupt for event RXREADY</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>MHRMATCH</name>
+ <description>Write '1' to enable interrupt for event MHRMATCH</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PHYEND</name>
+ <description>Write '1' to enable interrupt for event PHYEND</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CTEPRESENT</name>
+ <description>Write '1' to enable interrupt for event CTEPRESENT</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>READY</name>
+ <description>Write '1' to disable interrupt for event READY</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ADDRESS</name>
+ <description>Write '1' to disable interrupt for event ADDRESS</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PAYLOAD</name>
+ <description>Write '1' to disable interrupt for event PAYLOAD</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>END</name>
+ <description>Write '1' to disable interrupt for event END</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DISABLED</name>
+ <description>Write '1' to disable interrupt for event DISABLED</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DEVMATCH</name>
+ <description>Write '1' to disable interrupt for event DEVMATCH</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DEVMISS</name>
+ <description>Write '1' to disable interrupt for event DEVMISS</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RSSIEND</name>
+ <description>Write '1' to disable interrupt for event RSSIEND</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>BCMATCH</name>
+ <description>Write '1' to disable interrupt for event BCMATCH</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CRCOK</name>
+ <description>Write '1' to disable interrupt for event CRCOK</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CRCERROR</name>
+ <description>Write '1' to disable interrupt for event CRCERROR</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>FRAMESTART</name>
+ <description>Write '1' to disable interrupt for event FRAMESTART</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EDEND</name>
+ <description>Write '1' to disable interrupt for event EDEND</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EDSTOPPED</name>
+ <description>Write '1' to disable interrupt for event EDSTOPPED</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CCAIDLE</name>
+ <description>Write '1' to disable interrupt for event CCAIDLE</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CCABUSY</name>
+ <description>Write '1' to disable interrupt for event CCABUSY</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CCASTOPPED</name>
+ <description>Write '1' to disable interrupt for event CCASTOPPED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RATEBOOST</name>
+ <description>Write '1' to disable interrupt for event RATEBOOST</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXREADY</name>
+ <description>Write '1' to disable interrupt for event TXREADY</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXREADY</name>
+ <description>Write '1' to disable interrupt for event RXREADY</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>MHRMATCH</name>
+ <description>Write '1' to disable interrupt for event MHRMATCH</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PHYEND</name>
+ <description>Write '1' to disable interrupt for event PHYEND</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CTEPRESENT</name>
+ <description>Write '1' to disable interrupt for event CTEPRESENT</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CRCSTATUS</name>
+ <description>CRC status</description>
+ <addressOffset>0x400</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>CRCSTATUS</name>
+ <description>CRC status of packet received</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>CRCError</name>
+ <description>Packet received with CRC error</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>CRCOk</name>
+ <description>Packet received with CRC ok</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RXMATCH</name>
+ <description>Received address</description>
+ <addressOffset>0x408</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>RXMATCH</name>
+ <description>Received address</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RXCRC</name>
+ <description>CRC field of previously received packet</description>
+ <addressOffset>0x40C</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>RXCRC</name>
+ <description>CRC field of previously received packet</description>
+ <lsb>0</lsb>
+ <msb>23</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DAI</name>
+ <description>Device address match index</description>
+ <addressOffset>0x410</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>DAI</name>
+ <description>Device address match index</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PDUSTAT</name>
+ <description>Payload status</description>
+ <addressOffset>0x414</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>PDUSTAT</name>
+ <description>Status on payload length vs. PCNF1.MAXLEN</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>LessThan</name>
+ <description>Payload less than PCNF1.MAXLEN</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>GreaterThan</name>
+ <description>Payload greater than PCNF1.MAXLEN</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CISTAT</name>
+ <description>Status on what rate packet is received with in Long Range</description>
+ <lsb>1</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>LR125kbit</name>
+ <description>Frame is received at 125 kbps</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>LR500kbit</name>
+ <description>Frame is received at 500 kbps</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CTESTATUS</name>
+ <description>CTEInfo parsed from received packet</description>
+ <addressOffset>0x44C</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>CTETIME</name>
+ <description>CTETime parsed from packet</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>RFU</name>
+ <description>RFU parsed from packet</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CTETYPE</name>
+ <description>CTEType parsed from packet</description>
+ <lsb>6</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DFESTATUS</name>
+ <description>DFE status information</description>
+ <addressOffset>0x458</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>SWITCHINGSTATE</name>
+ <description>Internal state of switching state machine</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Idle</name>
+ <description>Switching state Idle</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Offset</name>
+ <description>Switching state Offset</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Guard</name>
+ <description>Switching state Guard</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ref</name>
+ <description>Switching state Ref</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Switching</name>
+ <description>Switching state Switching</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ending</name>
+ <description>Switching state Ending</description>
+ <value>5</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SAMPLINGSTATE</name>
+ <description>Internal state of sampling state machine</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Idle</name>
+ <description>Sampling state Idle</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Sampling</name>
+ <description>Sampling state Sampling</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PACKETPTR</name>
+ <description>Packet pointer</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>PACKETPTR</name>
+ <description>Packet pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>FREQUENCY</name>
+ <description>Frequency</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000002</resetValue>
+ <fields>
+ <field>
+ <name>FREQUENCY</name>
+ <description>Radio channel frequency</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ </field>
+ <field>
+ <name>MAP</name>
+ <description>Channel map selection.</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Default</name>
+ <description>Channel map between 2400 MHZ .. 2500 MHz</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Channel map between 2360 MHZ .. 2460 MHz</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TXPOWER</name>
+ <description>Output power</description>
+ <addressOffset>0x50C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TXPOWER</name>
+ <description>RADIO output power</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Pos8dBm</name>
+ <description>+8 dBm</description>
+ <value>0x8</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Pos7dBm</name>
+ <description>+7 dBm</description>
+ <value>0x7</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Pos6dBm</name>
+ <description>+6 dBm</description>
+ <value>0x6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Pos5dBm</name>
+ <description>+5 dBm</description>
+ <value>0x5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Pos4dBm</name>
+ <description>+4 dBm</description>
+ <value>0x4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Pos3dBm</name>
+ <description>+3 dBm</description>
+ <value>0x3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Pos2dBm</name>
+ <description>+2 dBm</description>
+ <value>0x2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>0dBm</name>
+ <description>0 dBm</description>
+ <value>0x0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Neg4dBm</name>
+ <description>-4 dBm</description>
+ <value>0xFC</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Neg8dBm</name>
+ <description>-8 dBm</description>
+ <value>0xF8</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Neg12dBm</name>
+ <description>-12 dBm</description>
+ <value>0xF4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Neg16dBm</name>
+ <description>-16 dBm</description>
+ <value>0xF0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Neg20dBm</name>
+ <description>-20 dBm</description>
+ <value>0xEC</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Neg30dBm</name>
+ <description>Deprecated enumerator - -40 dBm</description>
+ <value>0xE2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Neg40dBm</name>
+ <description>-40 dBm</description>
+ <value>0xD8</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MODE</name>
+ <description>Data rate and modulation</description>
+ <addressOffset>0x510</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MODE</name>
+ <description>Radio data rate and modulation setting. The radio supports frequency-shift keying (FSK) modulation.</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Nrf_1Mbit</name>
+ <description>1 Mbps Nordic proprietary radio mode</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Nrf_2Mbit</name>
+ <description>2 Mbps Nordic proprietary radio mode</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ble_1Mbit</name>
+ <description>1 Mbps BLE</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ble_2Mbit</name>
+ <description>2 Mbps BLE</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ble_LR125Kbit</name>
+ <description>Long range 125 kbps TX, 125 kbps and 500 kbps RX</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ble_LR500Kbit</name>
+ <description>Long range 500 kbps TX, 125 kbps and 500 kbps RX</description>
+ <value>6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ieee802154_250Kbit</name>
+ <description>IEEE 802.15.4-2006 250 kbps</description>
+ <value>15</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PCNF0</name>
+ <description>Packet configuration register 0</description>
+ <addressOffset>0x514</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LFLEN</name>
+ <description>Length on air of LENGTH field in number of bits.</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ </field>
+ <field>
+ <name>S0LEN</name>
+ <description>Length on air of S0 field in number of bytes.</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ </field>
+ <field>
+ <name>S1LEN</name>
+ <description>Length on air of S1 field in number of bits.</description>
+ <lsb>16</lsb>
+ <msb>19</msb>
+ </field>
+ <field>
+ <name>S1INCL</name>
+ <description>Include or exclude S1 field in RAM</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Automatic</name>
+ <description>Include S1 field in RAM only if S1LEN &gt; 0</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Always include S1 field in RAM independent of S1LEN</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CILEN</name>
+ <description>Length of code indicator - long range</description>
+ <lsb>22</lsb>
+ <msb>23</msb>
+ </field>
+ <field>
+ <name>PLEN</name>
+ <description>Length of preamble on air. Decision point: TASKS_START task</description>
+ <lsb>24</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>8bit</name>
+ <description>8-bit preamble</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>16bit</name>
+ <description>16-bit preamble</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>32bitZero</name>
+ <description>32-bit zero preamble - used for IEEE 802.15.4</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>LongRange</name>
+ <description>Preamble - used for BLE long range</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CRCINC</name>
+ <description>Indicates if LENGTH field contains CRC or not</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>LENGTH does not contain CRC</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>LENGTH includes CRC</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TERMLEN</name>
+ <description>Length of TERM field in Long Range operation</description>
+ <lsb>29</lsb>
+ <msb>30</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PCNF1</name>
+ <description>Packet configuration register 1</description>
+ <addressOffset>0x518</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXLEN</name>
+ <description>Maximum length of packet payload. If the packet payload is larger than MAXLEN, the radio will truncate the payload to MAXLEN.</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ <field>
+ <name>STATLEN</name>
+ <description>Static length in number of bytes</description>
+ <lsb>8</lsb>
+ <msb>15</msb>
+ </field>
+ <field>
+ <name>BALEN</name>
+ <description>Base address length in number of bytes</description>
+ <lsb>16</lsb>
+ <msb>18</msb>
+ </field>
+ <field>
+ <name>ENDIAN</name>
+ <description>On-air endianness of packet, this applies to the S0, LENGTH, S1, and the PAYLOAD fields.</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Little</name>
+ <description>Least significant bit on air first</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Big</name>
+ <description>Most significant bit on air first</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>WHITEEN</name>
+ <description>Enable or disable packet whitening</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>BASE0</name>
+ <description>Base address 0</description>
+ <addressOffset>0x51C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>BASE0</name>
+ <description>Base address 0</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>BASE1</name>
+ <description>Base address 1</description>
+ <addressOffset>0x520</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>BASE1</name>
+ <description>Base address 1</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PREFIX0</name>
+ <description>Prefixes bytes for logical addresses 0-3</description>
+ <addressOffset>0x524</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>AP0</name>
+ <description>Address prefix 0.</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ <field>
+ <name>AP1</name>
+ <description>Address prefix 1.</description>
+ <lsb>8</lsb>
+ <msb>15</msb>
+ </field>
+ <field>
+ <name>AP2</name>
+ <description>Address prefix 2.</description>
+ <lsb>16</lsb>
+ <msb>23</msb>
+ </field>
+ <field>
+ <name>AP3</name>
+ <description>Address prefix 3.</description>
+ <lsb>24</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PREFIX1</name>
+ <description>Prefixes bytes for logical addresses 4-7</description>
+ <addressOffset>0x528</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>AP4</name>
+ <description>Address prefix 4.</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ <field>
+ <name>AP5</name>
+ <description>Address prefix 5.</description>
+ <lsb>8</lsb>
+ <msb>15</msb>
+ </field>
+ <field>
+ <name>AP6</name>
+ <description>Address prefix 6.</description>
+ <lsb>16</lsb>
+ <msb>23</msb>
+ </field>
+ <field>
+ <name>AP7</name>
+ <description>Address prefix 7.</description>
+ <lsb>24</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TXADDRESS</name>
+ <description>Transmit address select</description>
+ <addressOffset>0x52C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TXADDRESS</name>
+ <description>Transmit address select</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RXADDRESSES</name>
+ <description>Receive address select</description>
+ <addressOffset>0x530</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ADDR0</name>
+ <description>Enable or disable reception on logical address 0.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ADDR1</name>
+ <description>Enable or disable reception on logical address 1.</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ADDR2</name>
+ <description>Enable or disable reception on logical address 2.</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ADDR3</name>
+ <description>Enable or disable reception on logical address 3.</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ADDR4</name>
+ <description>Enable or disable reception on logical address 4.</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ADDR5</name>
+ <description>Enable or disable reception on logical address 5.</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ADDR6</name>
+ <description>Enable or disable reception on logical address 6.</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ADDR7</name>
+ <description>Enable or disable reception on logical address 7.</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CRCCNF</name>
+ <description>CRC configuration</description>
+ <addressOffset>0x534</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LEN</name>
+ <description>CRC length in number of bytes.</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>CRC length is zero and CRC calculation is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>One</name>
+ <description>CRC length is one byte and CRC calculation is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Two</name>
+ <description>CRC length is two bytes and CRC calculation is enabled</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Three</name>
+ <description>CRC length is three bytes and CRC calculation is enabled</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SKIPADDR</name>
+ <description>Include or exclude packet address field out of CRC calculation.</description>
+ <lsb>8</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>CRC calculation includes address field</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Skip</name>
+ <description>CRC calculation does not include address field. The CRC calculation will start at the first byte after the address.</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ieee802154</name>
+ <description>CRC calculation as per 802.15.4 standard. Starting at first byte after length field.</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CRCPOLY</name>
+ <description>CRC polynomial</description>
+ <addressOffset>0x538</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>CRCPOLY</name>
+ <description>CRC polynomial</description>
+ <lsb>0</lsb>
+ <msb>23</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CRCINIT</name>
+ <description>CRC initial value</description>
+ <addressOffset>0x53C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CRCINIT</name>
+ <description>CRC initial value</description>
+ <lsb>0</lsb>
+ <msb>23</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TIFS</name>
+ <description>Interframe spacing in us</description>
+ <addressOffset>0x544</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TIFS</name>
+ <description>Interframe spacing in us</description>
+ <lsb>0</lsb>
+ <msb>9</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RSSISAMPLE</name>
+ <description>RSSI sample</description>
+ <addressOffset>0x548</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>RSSISAMPLE</name>
+ <description>RSSI sample</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>STATE</name>
+ <description>Current radio state</description>
+ <addressOffset>0x550</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>STATE</name>
+ <description>Current radio state</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>RADIO is in the Disabled state</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>RxRu</name>
+ <description>RADIO is in the RXRU state</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>RxIdle</name>
+ <description>RADIO is in the RXIDLE state</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Rx</name>
+ <description>RADIO is in the RX state</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>RxDisable</name>
+ <description>RADIO is in the RXDISABLED state</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>TxRu</name>
+ <description>RADIO is in the TXRU state</description>
+ <value>9</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>TxIdle</name>
+ <description>RADIO is in the TXIDLE state</description>
+ <value>10</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Tx</name>
+ <description>RADIO is in the TX state</description>
+ <value>11</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>TxDisable</name>
+ <description>RADIO is in the TXDISABLED state</description>
+ <value>12</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DATAWHITEIV</name>
+ <description>Data whitening initial value</description>
+ <addressOffset>0x554</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000040</resetValue>
+ <fields>
+ <field>
+ <name>DATAWHITEIV</name>
+ <description>Data whitening initial value. Bit 6 is hardwired to '1', writing '0' to it has no effect, and it will always be read back and used by the device as '1'.</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>BCC</name>
+ <description>Bit counter compare</description>
+ <addressOffset>0x560</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>BCC</name>
+ <description>Bit counter compare</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>DAB[%s]</name>
+ <description>Description collection: Device address base segment n</description>
+ <addressOffset>0x600</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>DAB</name>
+ <description>Device address base segment n</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>DAP[%s]</name>
+ <description>Description collection: Device address prefix n</description>
+ <addressOffset>0x620</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>DAP</name>
+ <description>Device address prefix n</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DACNF</name>
+ <description>Device address match configuration</description>
+ <addressOffset>0x640</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENA0</name>
+ <description>Enable or disable device address matching using device address 0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENA1</name>
+ <description>Enable or disable device address matching using device address 1</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENA2</name>
+ <description>Enable or disable device address matching using device address 2</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENA3</name>
+ <description>Enable or disable device address matching using device address 3</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENA4</name>
+ <description>Enable or disable device address matching using device address 4</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENA5</name>
+ <description>Enable or disable device address matching using device address 5</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENA6</name>
+ <description>Enable or disable device address matching using device address 6</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENA7</name>
+ <description>Enable or disable device address matching using device address 7</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXADD0</name>
+ <description>TxAdd for device address 0</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ </field>
+ <field>
+ <name>TXADD1</name>
+ <description>TxAdd for device address 1</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ </field>
+ <field>
+ <name>TXADD2</name>
+ <description>TxAdd for device address 2</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ </field>
+ <field>
+ <name>TXADD3</name>
+ <description>TxAdd for device address 3</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ </field>
+ <field>
+ <name>TXADD4</name>
+ <description>TxAdd for device address 4</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ </field>
+ <field>
+ <name>TXADD5</name>
+ <description>TxAdd for device address 5</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ </field>
+ <field>
+ <name>TXADD6</name>
+ <description>TxAdd for device address 6</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ </field>
+ <field>
+ <name>TXADD7</name>
+ <description>TxAdd for device address 7</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MHRMATCHCONF</name>
+ <description>Search pattern configuration</description>
+ <addressOffset>0x644</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MHRMATCHCONF</name>
+ <description>Search pattern configuration</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MHRMATCHMAS</name>
+ <description>Pattern mask</description>
+ <addressOffset>0x648</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MHRMATCHMAS</name>
+ <description>Pattern mask</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MODECNF0</name>
+ <description>Radio mode configuration register 0</description>
+ <addressOffset>0x650</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000200</resetValue>
+ <fields>
+ <field>
+ <name>RU</name>
+ <description>Radio ramp-up time</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Default</name>
+ <description>Default ramp-up time (tRXEN and tTXEN), compatible with firmware written for nRF51</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Fast</name>
+ <description>Fast ramp-up (tRXEN,FAST and tTXEN,FAST), see electrical specification for more information</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DTX</name>
+ <description>Default TX value</description>
+ <lsb>8</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>B1</name>
+ <description>Transmit '1'</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>B0</name>
+ <description>Transmit '0'</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Center</name>
+ <description>Transmit center frequency</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SFD</name>
+ <description>IEEE 802.15.4 start of frame delimiter</description>
+ <addressOffset>0x660</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x000000A7</resetValue>
+ <fields>
+ <field>
+ <name>SFD</name>
+ <description>IEEE 802.15.4 start of frame delimiter</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EDCNT</name>
+ <description>IEEE 802.15.4 energy detect loop count</description>
+ <addressOffset>0x664</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>EDCNT</name>
+ <description>IEEE 802.15.4 energy detect loop count</description>
+ <lsb>0</lsb>
+ <msb>20</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EDSAMPLE</name>
+ <description>IEEE 802.15.4 energy detect level</description>
+ <addressOffset>0x668</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>EDLVL</name>
+ <description>IEEE 802.15.4 energy detect level</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CCACTRL</name>
+ <description>IEEE 802.15.4 clear channel assessment control</description>
+ <addressOffset>0x66C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x052D0000</resetValue>
+ <fields>
+ <field>
+ <name>CCAMODE</name>
+ <description>CCA mode of operation</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>EdMode</name>
+ <description>Energy above threshold</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>CarrierMode</name>
+ <description>Carrier seen</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>CarrierAndEdMode</name>
+ <description>Energy above threshold AND carrier seen</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>CarrierOrEdMode</name>
+ <description>Energy above threshold OR carrier seen</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>EdModeTest1</name>
+ <description>Energy above threshold test mode that will abort when first ED measurement over threshold is seen. No averaging.</description>
+ <value>4</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CCAEDTHRES</name>
+ <description>CCA energy busy threshold. Used in all the CCA modes except CarrierMode.</description>
+ <lsb>8</lsb>
+ <msb>15</msb>
+ </field>
+ <field>
+ <name>CCACORRTHRES</name>
+ <description>CCA correlator busy threshold. Only relevant to CarrierMode, CarrierAndEdMode, and CarrierOrEdMode.</description>
+ <lsb>16</lsb>
+ <msb>23</msb>
+ </field>
+ <field>
+ <name>CCACORRCNT</name>
+ <description>Limit for occurances above CCACORRTHRES. When not equal to zero the corrolator based signal detect is enabled.</description>
+ <lsb>24</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DFEMODE</name>
+ <description>Whether to use Angle-of-Arrival (AOA) or Angle-of-Departure (AOD)</description>
+ <addressOffset>0x900</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>DFEOPMODE</name>
+ <description>Direction finding operation mode</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Direction finding mode disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AoD</name>
+ <description>Direction finding mode set to AoD</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AoA</name>
+ <description>Direction finding mode set to AoA</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CTEINLINECONF</name>
+ <description>Configuration for CTE inline mode</description>
+ <addressOffset>0x904</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00002800</resetValue>
+ <fields>
+ <field>
+ <name>CTEINLINECTRLEN</name>
+ <description>Enable parsing of CTEInfo from received packet in BLE modes</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Parsing of CTEInfo is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Parsing of CTEInfo is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CTEINFOINS1</name>
+ <description>CTEInfo is S1 byte or not</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>InS1</name>
+ <description>CTEInfo is in S1 byte (data PDU)</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>NotInS1</name>
+ <description>CTEInfo is NOT in S1 byte (advertising PDU)</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CTEERRORHANDLING</name>
+ <description>Sampling/switching if CRC is not OK</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Yes</name>
+ <description>Sampling and antenna switching also when CRC is not OK</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>No</name>
+ <description>No sampling and antenna switching when CRC is not OK</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CTETIMEVALIDRANGE</name>
+ <description>Max range of CTETime</description>
+ <lsb>6</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>20</name>
+ <description>20 in 8us unit (default) Set to 20 if parsed CTETime is larger han 20</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>31</name>
+ <description>31 in 8us unit</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>63</name>
+ <description>63 in 8us unit</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CTEINLINERXMODE1US</name>
+ <description>Spacing between samples for the samples in the SWITCHING period when CTEINLINEMODE is set</description>
+ <lsb>10</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>4us</name>
+ <description>4us</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>2us</name>
+ <description>2us</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>1us</name>
+ <description>1us</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>500ns</name>
+ <description>0.5us</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>250ns</name>
+ <description>0.25us</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>125ns</name>
+ <description>0.125us</description>
+ <value>6</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CTEINLINERXMODE2US</name>
+ <description>Spacing between samples for the samples in the SWITCHING period when CTEINLINEMODE is set</description>
+ <lsb>13</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>4us</name>
+ <description>4us</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>2us</name>
+ <description>2us</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>1us</name>
+ <description>1us</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>500ns</name>
+ <description>0.5us</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>250ns</name>
+ <description>0.25us</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>125ns</name>
+ <description>0.125us</description>
+ <value>6</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>S0CONF</name>
+ <description>S0 bit pattern to match</description>
+ <lsb>16</lsb>
+ <msb>23</msb>
+ </field>
+ <field>
+ <name>S0MASK</name>
+ <description>S0 bit mask to set which bit to match</description>
+ <lsb>24</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DFECTRL1</name>
+ <description>Various configuration for Direction finding</description>
+ <addressOffset>0x910</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00023282</resetValue>
+ <fields>
+ <field>
+ <name>NUMBEROF8US</name>
+ <description>Length of the AoA/AoD procedure in number of 8 us units</description>
+ <lsb>0</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>DFEINEXTENSION</name>
+ <description>Add CTE extension and do antenna switching/sampling in this extension</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>CRC</name>
+ <description>AoA/AoD procedure triggered at end of CRC</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Payload</name>
+ <description>Antenna switching/sampling is done in the packet payload</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TSWITCHSPACING</name>
+ <description>Interval between every time the antenna is changed in the SWITCHING state</description>
+ <lsb>8</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>4us</name>
+ <description>4us</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>2us</name>
+ <description>2us</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>1us</name>
+ <description>1us</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TSAMPLESPACINGREF</name>
+ <description>Interval between samples in the REFERENCE period</description>
+ <lsb>12</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>4us</name>
+ <description>4us</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>2us</name>
+ <description>2us</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>1us</name>
+ <description>1us</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>500ns</name>
+ <description>0.5us</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>250ns</name>
+ <description>0.25us</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>125ns</name>
+ <description>0.125us</description>
+ <value>6</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SAMPLETYPE</name>
+ <description>Whether to sample I/Q or magnitude/phase</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>IQ</name>
+ <description>Complex samples in I and Q</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>MagPhase</name>
+ <description>Complex samples as magnitude and phase</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TSAMPLESPACING</name>
+ <description>Interval between samples in the SWITCHING period when CTEINLINECTRLEN is 0</description>
+ <lsb>16</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>4us</name>
+ <description>4us</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>2us</name>
+ <description>2us</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>1us</name>
+ <description>1us</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>500ns</name>
+ <description>0.5us</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>250ns</name>
+ <description>0.25us</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>125ns</name>
+ <description>0.125us</description>
+ <value>6</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REPEATPATTERN</name>
+ <description>Repeat every antenna pattern N times.</description>
+ <lsb>20</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoRepeat</name>
+ <description>Do not repeat (1 time in total)</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>AGCBACKOFFGAIN</name>
+ <description>Gain will be lowered by the specified number of gain steps at the start of CTE</description>
+ <lsb>24</lsb>
+ <msb>27</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DFECTRL2</name>
+ <description>Start offset for Direction finding</description>
+ <addressOffset>0x914</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>TSWITCHOFFSET</name>
+ <description>Signed value offset after the end of the CRC before starting switching in number of 16M cycles</description>
+ <lsb>0</lsb>
+ <msb>12</msb>
+ </field>
+ <field>
+ <name>TSAMPLEOFFSET</name>
+ <description>Signed value offset before starting sampling in number of 16M cycles relative to the beginning of the REFERENCE state - 12 us after switching start</description>
+ <lsb>16</lsb>
+ <msb>27</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SWITCHPATTERN</name>
+ <description>GPIO patterns to be used for each antenna</description>
+ <addressOffset>0x928</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>SWITCHPATTERN</name>
+ <description>Fill array of GPIO patterns for antenna control</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CLEARPATTERN</name>
+ <description>Clear the GPIO pattern array for antenna control</description>
+ <addressOffset>0x92C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CLEARPATTERN</name>
+ <description>Clears GPIO pattern array for antenna control</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <modifiedWriteValues>oneToClear</modifiedWriteValues>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Clear the GPIO pattern</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>PSEL</name>
+ <description>Unspecified</description>
+ <headerStructName>RADIO_PSEL</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x930</addressOffset>
+ <register>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>DFEGPIO[%s]</name>
+ <description>Description collection: Pin select for DFE pin n</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>DFEPACKET</name>
+ <description>DFE packet EasyDMA channel</description>
+ <headerStructName>RADIO_DFEPACKET</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x950</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Maximum number of buffer words to transfer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00001000</resetValue>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of buffer words to transfer</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Number of samples transferred in the last transaction</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of samples transferred in the last transaction</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>POWER</name>
+ <description>Peripheral power control</description>
+ <addressOffset>0xFFC</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>POWER</name>
+ <description>Peripheral power control. The peripheral and its registers will be reset to its initial state by switching the peripheral off and then back on again.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Peripheral is powered off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Peripheral is powered on</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>UART0</name>
+ <description>Universal Asynchronous Receiver/Transmitter</description>
+ <baseAddress>0x40002000</baseAddress>
+ <headerStructName>UART</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>UARTE0_UART0</name>
+ <value>2</value>
+ </interrupt>
+ <groupName>UART</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_STARTRX</name>
+ <description>Start UART receiver</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STARTRX</name>
+ <description>Start UART receiver</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOPRX</name>
+ <description>Stop UART receiver</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOPRX</name>
+ <description>Stop UART receiver</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STARTTX</name>
+ <description>Start UART transmitter</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STARTTX</name>
+ <description>Start UART transmitter</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOPTX</name>
+ <description>Stop UART transmitter</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOPTX</name>
+ <description>Stop UART transmitter</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_SUSPEND</name>
+ <description>Suspend UART</description>
+ <addressOffset>0x01C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_SUSPEND</name>
+ <description>Suspend UART</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_CTS</name>
+ <description>CTS is activated (set low). Clear To Send.</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CTS</name>
+ <description>CTS is activated (set low). Clear To Send.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_NCTS</name>
+ <description>CTS is deactivated (set high). Not Clear To Send.</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_NCTS</name>
+ <description>CTS is deactivated (set high). Not Clear To Send.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RXDRDY</name>
+ <description>Data received in RXD</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RXDRDY</name>
+ <description>Data received in RXD</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_TXDRDY</name>
+ <description>Data sent from TXD</description>
+ <addressOffset>0x11C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TXDRDY</name>
+ <description>Data sent from TXD</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ERROR</name>
+ <description>Error detected</description>
+ <addressOffset>0x124</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ERROR</name>
+ <description>Error detected</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RXTO</name>
+ <description>Receiver timeout</description>
+ <addressOffset>0x144</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RXTO</name>
+ <description>Receiver timeout</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CTS_STARTRX</name>
+ <description>Shortcut between event CTS and task STARTRX</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>NCTS_STOPRX</name>
+ <description>Shortcut between event NCTS and task STOPRX</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CTS</name>
+ <description>Write '1' to enable interrupt for event CTS</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>NCTS</name>
+ <description>Write '1' to enable interrupt for event NCTS</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXDRDY</name>
+ <description>Write '1' to enable interrupt for event RXDRDY</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXDRDY</name>
+ <description>Write '1' to enable interrupt for event TXDRDY</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Write '1' to enable interrupt for event ERROR</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXTO</name>
+ <description>Write '1' to enable interrupt for event RXTO</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CTS</name>
+ <description>Write '1' to disable interrupt for event CTS</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>NCTS</name>
+ <description>Write '1' to disable interrupt for event NCTS</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXDRDY</name>
+ <description>Write '1' to disable interrupt for event RXDRDY</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXDRDY</name>
+ <description>Write '1' to disable interrupt for event TXDRDY</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Write '1' to disable interrupt for event ERROR</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXTO</name>
+ <description>Write '1' to disable interrupt for event RXTO</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ERRORSRC</name>
+ <description>Error source</description>
+ <addressOffset>0x480</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToClear</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>OVERRUN</name>
+ <description>Overrun error</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: error present</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PARITY</name>
+ <description>Parity error</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: error present</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>FRAMING</name>
+ <description>Framing error occurred</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: error present</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>BREAK</name>
+ <description>Break condition</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: error present</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>Enable UART</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable UART</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable UART</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable UART</description>
+ <value>4</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>PSEL</name>
+ <description>Unspecified</description>
+ <headerStructName>UART_PSEL</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x508</addressOffset>
+ <register>
+ <name>RTS</name>
+ <description>Pin select for RTS</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TXD</name>
+ <description>Pin select for TXD</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CTS</name>
+ <description>Pin select for CTS</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RXD</name>
+ <description>Pin select for RXD</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>RXD</name>
+ <description>RXD register</description>
+ <addressOffset>0x518</addressOffset>
+ <access>read-only</access>
+ <readAction>modifyExternal</readAction>
+ <fields>
+ <field>
+ <name>RXD</name>
+ <description>RX data received in previous transfers, double buffered</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TXD</name>
+ <description>TXD register</description>
+ <addressOffset>0x51C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TXD</name>
+ <description>TX data to be transferred</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>BAUDRATE</name>
+ <description>Baud rate. Accuracy depends on the HFCLK source selected.</description>
+ <addressOffset>0x524</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x04000000</resetValue>
+ <fields>
+ <field>
+ <name>BAUDRATE</name>
+ <description>Baud rate</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Baud1200</name>
+ <description>1200 baud (actual rate: 1205)</description>
+ <value>0x0004F000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud2400</name>
+ <description>2400 baud (actual rate: 2396)</description>
+ <value>0x0009D000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud4800</name>
+ <description>4800 baud (actual rate: 4808)</description>
+ <value>0x0013B000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud9600</name>
+ <description>9600 baud (actual rate: 9598)</description>
+ <value>0x00275000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud14400</name>
+ <description>14400 baud (actual rate: 14414)</description>
+ <value>0x003B0000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud19200</name>
+ <description>19200 baud (actual rate: 19208)</description>
+ <value>0x004EA000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud28800</name>
+ <description>28800 baud (actual rate: 28829)</description>
+ <value>0x0075F000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud31250</name>
+ <description>31250 baud</description>
+ <value>0x00800000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud38400</name>
+ <description>38400 baud (actual rate: 38462)</description>
+ <value>0x009D5000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud56000</name>
+ <description>56000 baud (actual rate: 55944)</description>
+ <value>0x00E50000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud57600</name>
+ <description>57600 baud (actual rate: 57762)</description>
+ <value>0x00EBF000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud76800</name>
+ <description>76800 baud (actual rate: 76923)</description>
+ <value>0x013A9000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud115200</name>
+ <description>115200 baud (actual rate: 115942)</description>
+ <value>0x01D7E000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud230400</name>
+ <description>230400 baud (actual rate: 231884)</description>
+ <value>0x03AFB000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud250000</name>
+ <description>250000 baud</description>
+ <value>0x04000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud460800</name>
+ <description>460800 baud (actual rate: 470588)</description>
+ <value>0x075F7000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud921600</name>
+ <description>921600 baud (actual rate: 941176)</description>
+ <value>0x0EBED000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud1M</name>
+ <description>1Mega baud</description>
+ <value>0x10000000</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CONFIG</name>
+ <description>Configuration of parity and hardware flow control</description>
+ <addressOffset>0x56C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>HWFC</name>
+ <description>Hardware flow control</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PARITY</name>
+ <description>Parity</description>
+ <lsb>1</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude parity bit</description>
+ <value>0x0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include parity bit</description>
+ <value>0x7</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STOP</name>
+ <description>Stop bits</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>One</name>
+ <description>One stop bit</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Two</name>
+ <description>Two stop bits</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PARITYTYPE</name>
+ <description>Even or odd parity type</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Even</name>
+ <description>Even parity</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Odd</name>
+ <description>Odd parity</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>UARTE0</name>
+ <description>UART with EasyDMA 0</description>
+ <baseAddress>0x40002000</baseAddress>
+ <alternatePeripheral>UART0</alternatePeripheral>
+ <headerStructName>UARTE</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>UARTE0_UART0</name>
+ <value>2</value>
+ </interrupt>
+ <groupName>UARTE</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_STARTRX</name>
+ <description>Start UART receiver</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STARTRX</name>
+ <description>Start UART receiver</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOPRX</name>
+ <description>Stop UART receiver</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOPRX</name>
+ <description>Stop UART receiver</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STARTTX</name>
+ <description>Start UART transmitter</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STARTTX</name>
+ <description>Start UART transmitter</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOPTX</name>
+ <description>Stop UART transmitter</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOPTX</name>
+ <description>Stop UART transmitter</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_FLUSHRX</name>
+ <description>Flush RX FIFO into RX buffer</description>
+ <addressOffset>0x02C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_FLUSHRX</name>
+ <description>Flush RX FIFO into RX buffer</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_CTS</name>
+ <description>CTS is activated (set low). Clear To Send.</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CTS</name>
+ <description>CTS is activated (set low). Clear To Send.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_NCTS</name>
+ <description>CTS is deactivated (set high). Not Clear To Send.</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_NCTS</name>
+ <description>CTS is deactivated (set high). Not Clear To Send.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RXDRDY</name>
+ <description>Data received in RXD (but potentially not yet transferred to Data RAM)</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RXDRDY</name>
+ <description>Data received in RXD (but potentially not yet transferred to Data RAM)</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ENDRX</name>
+ <description>Receive buffer is filled up</description>
+ <addressOffset>0x110</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ENDRX</name>
+ <description>Receive buffer is filled up</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_TXDRDY</name>
+ <description>Data sent from TXD</description>
+ <addressOffset>0x11C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TXDRDY</name>
+ <description>Data sent from TXD</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ENDTX</name>
+ <description>Last TX byte transmitted</description>
+ <addressOffset>0x120</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ENDTX</name>
+ <description>Last TX byte transmitted</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ERROR</name>
+ <description>Error detected</description>
+ <addressOffset>0x124</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ERROR</name>
+ <description>Error detected</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RXTO</name>
+ <description>Receiver timeout</description>
+ <addressOffset>0x144</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RXTO</name>
+ <description>Receiver timeout</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RXSTARTED</name>
+ <description>UART receiver has started</description>
+ <addressOffset>0x14C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RXSTARTED</name>
+ <description>UART receiver has started</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_TXSTARTED</name>
+ <description>UART transmitter has started</description>
+ <addressOffset>0x150</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TXSTARTED</name>
+ <description>UART transmitter has started</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_TXSTOPPED</name>
+ <description>Transmitter stopped</description>
+ <addressOffset>0x158</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TXSTOPPED</name>
+ <description>Transmitter stopped</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENDRX_STARTRX</name>
+ <description>Shortcut between event ENDRX and task STARTRX</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDRX_STOPRX</name>
+ <description>Shortcut between event ENDRX and task STOPRX</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTEN</name>
+ <description>Enable or disable interrupt</description>
+ <addressOffset>0x300</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CTS</name>
+ <description>Enable or disable interrupt for event CTS</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>NCTS</name>
+ <description>Enable or disable interrupt for event NCTS</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXDRDY</name>
+ <description>Enable or disable interrupt for event RXDRDY</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDRX</name>
+ <description>Enable or disable interrupt for event ENDRX</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXDRDY</name>
+ <description>Enable or disable interrupt for event TXDRDY</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDTX</name>
+ <description>Enable or disable interrupt for event ENDTX</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Enable or disable interrupt for event ERROR</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXTO</name>
+ <description>Enable or disable interrupt for event RXTO</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXSTARTED</name>
+ <description>Enable or disable interrupt for event RXSTARTED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXSTARTED</name>
+ <description>Enable or disable interrupt for event TXSTARTED</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXSTOPPED</name>
+ <description>Enable or disable interrupt for event TXSTOPPED</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CTS</name>
+ <description>Write '1' to enable interrupt for event CTS</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>NCTS</name>
+ <description>Write '1' to enable interrupt for event NCTS</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXDRDY</name>
+ <description>Write '1' to enable interrupt for event RXDRDY</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDRX</name>
+ <description>Write '1' to enable interrupt for event ENDRX</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXDRDY</name>
+ <description>Write '1' to enable interrupt for event TXDRDY</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDTX</name>
+ <description>Write '1' to enable interrupt for event ENDTX</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Write '1' to enable interrupt for event ERROR</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXTO</name>
+ <description>Write '1' to enable interrupt for event RXTO</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXSTARTED</name>
+ <description>Write '1' to enable interrupt for event RXSTARTED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXSTARTED</name>
+ <description>Write '1' to enable interrupt for event TXSTARTED</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXSTOPPED</name>
+ <description>Write '1' to enable interrupt for event TXSTOPPED</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CTS</name>
+ <description>Write '1' to disable interrupt for event CTS</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>NCTS</name>
+ <description>Write '1' to disable interrupt for event NCTS</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXDRDY</name>
+ <description>Write '1' to disable interrupt for event RXDRDY</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDRX</name>
+ <description>Write '1' to disable interrupt for event ENDRX</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXDRDY</name>
+ <description>Write '1' to disable interrupt for event TXDRDY</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDTX</name>
+ <description>Write '1' to disable interrupt for event ENDTX</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Write '1' to disable interrupt for event ERROR</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXTO</name>
+ <description>Write '1' to disable interrupt for event RXTO</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXSTARTED</name>
+ <description>Write '1' to disable interrupt for event RXSTARTED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXSTARTED</name>
+ <description>Write '1' to disable interrupt for event TXSTARTED</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXSTOPPED</name>
+ <description>Write '1' to disable interrupt for event TXSTOPPED</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ERRORSRC</name>
+ <description>Error source Note : this register is read / write one to clear.</description>
+ <addressOffset>0x480</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToClear</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>OVERRUN</name>
+ <description>Overrun error</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: error present</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PARITY</name>
+ <description>Parity error</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: error present</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>FRAMING</name>
+ <description>Framing error occurred</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: error present</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>BREAK</name>
+ <description>Break condition</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: error present</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>Enable UART</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable UARTE</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable UARTE</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable UARTE</description>
+ <value>8</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>PSEL</name>
+ <description>Unspecified</description>
+ <headerStructName>UARTE_PSEL</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x508</addressOffset>
+ <register>
+ <name>RTS</name>
+ <description>Pin select for RTS signal</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TXD</name>
+ <description>Pin select for TXD signal</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CTS</name>
+ <description>Pin select for CTS signal</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RXD</name>
+ <description>Pin select for RXD signal</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>BAUDRATE</name>
+ <description>Baud rate. Accuracy depends on the HFCLK source selected.</description>
+ <addressOffset>0x524</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x04000000</resetValue>
+ <fields>
+ <field>
+ <name>BAUDRATE</name>
+ <description>Baud rate</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Baud1200</name>
+ <description>1200 baud (actual rate: 1205)</description>
+ <value>0x0004F000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud2400</name>
+ <description>2400 baud (actual rate: 2396)</description>
+ <value>0x0009D000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud4800</name>
+ <description>4800 baud (actual rate: 4808)</description>
+ <value>0x0013B000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud9600</name>
+ <description>9600 baud (actual rate: 9598)</description>
+ <value>0x00275000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud14400</name>
+ <description>14400 baud (actual rate: 14401)</description>
+ <value>0x003AF000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud19200</name>
+ <description>19200 baud (actual rate: 19208)</description>
+ <value>0x004EA000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud28800</name>
+ <description>28800 baud (actual rate: 28777)</description>
+ <value>0x0075C000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud31250</name>
+ <description>31250 baud</description>
+ <value>0x00800000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud38400</name>
+ <description>38400 baud (actual rate: 38369)</description>
+ <value>0x009D0000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud56000</name>
+ <description>56000 baud (actual rate: 55944)</description>
+ <value>0x00E50000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud57600</name>
+ <description>57600 baud (actual rate: 57554)</description>
+ <value>0x00EB0000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud76800</name>
+ <description>76800 baud (actual rate: 76923)</description>
+ <value>0x013A9000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud115200</name>
+ <description>115200 baud (actual rate: 115108)</description>
+ <value>0x01D60000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud230400</name>
+ <description>230400 baud (actual rate: 231884)</description>
+ <value>0x03B00000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud250000</name>
+ <description>250000 baud</description>
+ <value>0x04000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud460800</name>
+ <description>460800 baud (actual rate: 457143)</description>
+ <value>0x07400000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud921600</name>
+ <description>921600 baud (actual rate: 941176)</description>
+ <value>0x0F000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud1M</name>
+ <description>1Mega baud</description>
+ <value>0x10000000</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>RXD</name>
+ <description>RXD EasyDMA channel</description>
+ <headerStructName>UARTE_RXD</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x534</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in receive buffer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in receive buffer</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>TXD</name>
+ <description>TXD EasyDMA channel</description>
+ <headerStructName>UARTE_TXD</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x544</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in transmit buffer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in transmit buffer</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>CONFIG</name>
+ <description>Configuration of parity and hardware flow control</description>
+ <addressOffset>0x56C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>HWFC</name>
+ <description>Hardware flow control</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PARITY</name>
+ <description>Parity</description>
+ <lsb>1</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude parity bit</description>
+ <value>0x0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include even parity bit</description>
+ <value>0x7</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STOP</name>
+ <description>Stop bits</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>One</name>
+ <description>One stop bit</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Two</name>
+ <description>Two stop bits</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PARITYTYPE</name>
+ <description>Even or odd parity type</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Even</name>
+ <description>Even parity</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Odd</name>
+ <description>Odd parity</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>SPI0</name>
+ <description>Serial Peripheral Interface 0</description>
+ <baseAddress>0x40003000</baseAddress>
+ <headerStructName>SPI</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0</name>
+ <value>3</value>
+ </interrupt>
+ <groupName>SPI</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>EVENTS_READY</name>
+ <description>TXD byte sent and RXD byte received</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_READY</name>
+ <description>TXD byte sent and RXD byte received</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>READY</name>
+ <description>Write '1' to enable interrupt for event READY</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>READY</name>
+ <description>Write '1' to disable interrupt for event READY</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>Enable SPI</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable SPI</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable SPI</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable SPI</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>PSEL</name>
+ <description>Unspecified</description>
+ <headerStructName>SPI_PSEL</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x508</addressOffset>
+ <register>
+ <name>SCK</name>
+ <description>Pin select for SCK</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MOSI</name>
+ <description>Pin select for MOSI signal</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MISO</name>
+ <description>Pin select for MISO signal</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>RXD</name>
+ <description>RXD register</description>
+ <addressOffset>0x518</addressOffset>
+ <access>read-only</access>
+ <readAction>modifyExternal</readAction>
+ <fields>
+ <field>
+ <name>RXD</name>
+ <description>RX data received. Double buffered</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TXD</name>
+ <description>TXD register</description>
+ <addressOffset>0x51C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TXD</name>
+ <description>TX data to send. Double buffered</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>FREQUENCY</name>
+ <description>SPI frequency. Accuracy depends on the HFCLK source selected.</description>
+ <addressOffset>0x524</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x04000000</resetValue>
+ <fields>
+ <field>
+ <name>FREQUENCY</name>
+ <description>SPI master data rate</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>K125</name>
+ <description>125 kbps</description>
+ <value>0x02000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>K250</name>
+ <description>250 kbps</description>
+ <value>0x04000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>K500</name>
+ <description>500 kbps</description>
+ <value>0x08000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>M1</name>
+ <description>1 Mbps</description>
+ <value>0x10000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>M2</name>
+ <description>2 Mbps</description>
+ <value>0x20000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>M4</name>
+ <description>4 Mbps</description>
+ <value>0x40000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>M8</name>
+ <description>8 Mbps</description>
+ <value>0x80000000</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CONFIG</name>
+ <description>Configuration register</description>
+ <addressOffset>0x554</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ORDER</name>
+ <description>Bit order</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>MsbFirst</name>
+ <description>Most significant bit shifted out first</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>LsbFirst</name>
+ <description>Least significant bit shifted out first</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CPHA</name>
+ <description>Serial clock (SCK) phase</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Leading</name>
+ <description>Sample on leading edge of clock, shift serial data on trailing edge</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Trailing</name>
+ <description>Sample on trailing edge of clock, shift serial data on leading edge</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CPOL</name>
+ <description>Serial clock (SCK) polarity</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>ActiveHigh</name>
+ <description>Active high</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ActiveLow</name>
+ <description>Active low</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>SPIM0</name>
+ <description>Serial Peripheral Interface Master with EasyDMA 0</description>
+ <baseAddress>0x40003000</baseAddress>
+ <alternatePeripheral>SPI0</alternatePeripheral>
+ <headerStructName>SPIM</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0</name>
+ <value>3</value>
+ </interrupt>
+ <groupName>SPIM</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_START</name>
+ <description>Start SPI transaction</description>
+ <addressOffset>0x010</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_START</name>
+ <description>Start SPI transaction</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stop SPI transaction</description>
+ <addressOffset>0x014</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stop SPI transaction</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_SUSPEND</name>
+ <description>Suspend SPI transaction</description>
+ <addressOffset>0x01C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_SUSPEND</name>
+ <description>Suspend SPI transaction</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_RESUME</name>
+ <description>Resume SPI transaction</description>
+ <addressOffset>0x020</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_RESUME</name>
+ <description>Resume SPI transaction</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_STOPPED</name>
+ <description>SPI transaction has stopped</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_STOPPED</name>
+ <description>SPI transaction has stopped</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ENDRX</name>
+ <description>End of RXD buffer reached</description>
+ <addressOffset>0x110</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ENDRX</name>
+ <description>End of RXD buffer reached</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_END</name>
+ <description>End of RXD buffer and TXD buffer reached</description>
+ <addressOffset>0x118</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_END</name>
+ <description>End of RXD buffer and TXD buffer reached</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ENDTX</name>
+ <description>End of TXD buffer reached</description>
+ <addressOffset>0x120</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ENDTX</name>
+ <description>End of TXD buffer reached</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_STARTED</name>
+ <description>Transaction started</description>
+ <addressOffset>0x14C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_STARTED</name>
+ <description>Transaction started</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>END_START</name>
+ <description>Shortcut between event END and task START</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to enable interrupt for event STOPPED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDRX</name>
+ <description>Write '1' to enable interrupt for event ENDRX</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>END</name>
+ <description>Write '1' to enable interrupt for event END</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDTX</name>
+ <description>Write '1' to enable interrupt for event ENDTX</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STARTED</name>
+ <description>Write '1' to enable interrupt for event STARTED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to disable interrupt for event STOPPED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDRX</name>
+ <description>Write '1' to disable interrupt for event ENDRX</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>END</name>
+ <description>Write '1' to disable interrupt for event END</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDTX</name>
+ <description>Write '1' to disable interrupt for event ENDTX</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STARTED</name>
+ <description>Write '1' to disable interrupt for event STARTED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>STALLSTAT</name>
+ <description>Stall status for EasyDMA RAM accesses. The fields in this register is set to STALL by hardware whenever a stall occurres and can be cleared (set to NOSTALL) by the CPU.</description>
+ <addressOffset>0x400</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>TX</name>
+ <description>Stall status for EasyDMA RAM reads</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NOSTALL</name>
+ <description>No stall</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>STALL</name>
+ <description>A stall has occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RX</name>
+ <description>Stall status for EasyDMA RAM writes</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NOSTALL</name>
+ <description>No stall</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>STALL</name>
+ <description>A stall has occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>Enable SPIM</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable SPIM</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable SPIM</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable SPIM</description>
+ <value>7</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>PSEL</name>
+ <description>Unspecified</description>
+ <headerStructName>SPIM_PSEL</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x508</addressOffset>
+ <register>
+ <name>SCK</name>
+ <description>Pin select for SCK</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MOSI</name>
+ <description>Pin select for MOSI signal</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MISO</name>
+ <description>Pin select for MISO signal</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CSN</name>
+ <description>Pin select for CSN</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>FREQUENCY</name>
+ <description>SPI frequency. Accuracy depends on the HFCLK source selected.</description>
+ <addressOffset>0x524</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x04000000</resetValue>
+ <fields>
+ <field>
+ <name>FREQUENCY</name>
+ <description>SPI master data rate</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>K125</name>
+ <description>125 kbps</description>
+ <value>0x02000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>K250</name>
+ <description>250 kbps</description>
+ <value>0x04000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>K500</name>
+ <description>500 kbps</description>
+ <value>0x08000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>M1</name>
+ <description>1 Mbps</description>
+ <value>0x10000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>M2</name>
+ <description>2 Mbps</description>
+ <value>0x20000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>M4</name>
+ <description>4 Mbps</description>
+ <value>0x40000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>M8</name>
+ <description>8 Mbps</description>
+ <value>0x80000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>M16</name>
+ <description>16 Mbps</description>
+ <value>0x0A000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>M32</name>
+ <description>32 Mbps</description>
+ <value>0x14000000</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>RXD</name>
+ <description>RXD EasyDMA channel</description>
+ <headerStructName>SPIM_RXD</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x534</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in receive buffer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in receive buffer</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LIST</name>
+ <description>EasyDMA list type</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LIST</name>
+ <description>List type</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable EasyDMA list</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ArrayList</name>
+ <description>Use array list</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>TXD</name>
+ <description>TXD EasyDMA channel</description>
+ <headerStructName>SPIM_TXD</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x544</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Number of bytes in transmit buffer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in transmit buffer</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LIST</name>
+ <description>EasyDMA list type</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LIST</name>
+ <description>List type</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable EasyDMA list</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ArrayList</name>
+ <description>Use array list</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>CONFIG</name>
+ <description>Configuration register</description>
+ <addressOffset>0x554</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ORDER</name>
+ <description>Bit order</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>MsbFirst</name>
+ <description>Most significant bit shifted out first</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>LsbFirst</name>
+ <description>Least significant bit shifted out first</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CPHA</name>
+ <description>Serial clock (SCK) phase</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Leading</name>
+ <description>Sample on leading edge of clock, shift serial data on trailing edge</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Trailing</name>
+ <description>Sample on trailing edge of clock, shift serial data on leading edge</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CPOL</name>
+ <description>Serial clock (SCK) polarity</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>ActiveHigh</name>
+ <description>Active high</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ActiveLow</name>
+ <description>Active low</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>IFTIMING</name>
+ <description>Unspecified</description>
+ <headerStructName>SPIM_IFTIMING</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x560</addressOffset>
+ <register>
+ <name>RXDELAY</name>
+ <description>Sample delay for input serial data on MISO</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000002</resetValue>
+ <fields>
+ <field>
+ <name>RXDELAY</name>
+ <description>Sample delay for input serial data on MISO. The value specifies the number of 64 MHz clock cycles (15.625 ns) delay from the the sampling edge of SCK (leading edge for CONFIG.CPHA = 0, trailing edge for CONFIG.CPHA = 1) until the input serial data is sampled. As en example, if RXDELAY = 0 and CONFIG.CPHA = 0, the input serial data is sampled on the rising edge of SCK.</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CSNDUR</name>
+ <description>Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000002</resetValue>
+ <fields>
+ <field>
+ <name>CSNDUR</name>
+ <description>Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions. The value is specified in number of 64 MHz clock cycles (15.625 ns).</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>CSNPOL</name>
+ <description>Polarity of CSN output</description>
+ <addressOffset>0x568</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>CSNPOL</name>
+ <description>Polarity of CSN output</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>LOW</name>
+ <description>Active low (idle state high)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>HIGH</name>
+ <description>Active high (idle state low)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PSELDCX</name>
+ <description>Pin select for DCX signal</description>
+ <addressOffset>0x56C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DCXCNT</name>
+ <description>DCX configuration</description>
+ <addressOffset>0x570</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>DCXCNT</name>
+ <description>This register specifies the number of command bytes preceding the data bytes. The PSEL.DCX line will be low during transmission of command bytes and high during transmission of data bytes. Value 0xF indicates that all bytes are command bytes.</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ORC</name>
+ <description>Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT</description>
+ <addressOffset>0x5C0</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ORC</name>
+ <description>Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT.</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>SPIS0</name>
+ <description>SPI Slave 0</description>
+ <baseAddress>0x40003000</baseAddress>
+ <alternatePeripheral>SPI0</alternatePeripheral>
+ <headerStructName>SPIS</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0</name>
+ <value>3</value>
+ </interrupt>
+ <groupName>SPIS</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_ACQUIRE</name>
+ <description>Acquire SPI semaphore</description>
+ <addressOffset>0x024</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_ACQUIRE</name>
+ <description>Acquire SPI semaphore</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_RELEASE</name>
+ <description>Release SPI semaphore, enabling the SPI slave to acquire it</description>
+ <addressOffset>0x028</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_RELEASE</name>
+ <description>Release SPI semaphore, enabling the SPI slave to acquire it</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_END</name>
+ <description>Granted transaction completed</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_END</name>
+ <description>Granted transaction completed</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ENDRX</name>
+ <description>End of RXD buffer reached</description>
+ <addressOffset>0x110</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ENDRX</name>
+ <description>End of RXD buffer reached</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ACQUIRED</name>
+ <description>Semaphore acquired</description>
+ <addressOffset>0x128</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ACQUIRED</name>
+ <description>Semaphore acquired</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>END_ACQUIRE</name>
+ <description>Shortcut between event END and task ACQUIRE</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>END</name>
+ <description>Write '1' to enable interrupt for event END</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDRX</name>
+ <description>Write '1' to enable interrupt for event ENDRX</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ACQUIRED</name>
+ <description>Write '1' to enable interrupt for event ACQUIRED</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>END</name>
+ <description>Write '1' to disable interrupt for event END</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDRX</name>
+ <description>Write '1' to disable interrupt for event ENDRX</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ACQUIRED</name>
+ <description>Write '1' to disable interrupt for event ACQUIRED</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SEMSTAT</name>
+ <description>Semaphore status register</description>
+ <addressOffset>0x400</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>SEMSTAT</name>
+ <description>Semaphore status</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Free</name>
+ <description>Semaphore is free</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>CPU</name>
+ <description>Semaphore is assigned to CPU</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>SPIS</name>
+ <description>Semaphore is assigned to SPI slave</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>CPUPending</name>
+ <description>Semaphore is assigned to SPI but a handover to the CPU is pending</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>STATUS</name>
+ <description>Status from last transaction</description>
+ <addressOffset>0x440</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>OVERREAD</name>
+ <description>TX buffer over-read detected, and prevented</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: error present</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: clear error on writing '1'</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OVERFLOW</name>
+ <description>RX buffer overflow detected, and prevented</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: error present</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: clear error on writing '1'</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>Enable SPI slave</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable SPI slave</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable SPI slave</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable SPI slave</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>PSEL</name>
+ <description>Unspecified</description>
+ <headerStructName>SPIS_PSEL</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x508</addressOffset>
+ <register>
+ <name>SCK</name>
+ <description>Pin select for SCK</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MISO</name>
+ <description>Pin select for MISO signal</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MOSI</name>
+ <description>Pin select for MOSI signal</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CSN</name>
+ <description>Pin select for CSN signal</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>RXD</name>
+ <description>Unspecified</description>
+ <headerStructName>SPIS_RXD</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x534</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>RXD data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>RXD data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in receive buffer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in receive buffer</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Number of bytes received in last granted transaction</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of bytes received in the last granted transaction</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LIST</name>
+ <description>EasyDMA list type</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LIST</name>
+ <description>List type</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable EasyDMA list</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ArrayList</name>
+ <description>Use array list</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>TXD</name>
+ <description>Unspecified</description>
+ <headerStructName>SPIS_TXD</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x544</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>TXD data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>TXD data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in transmit buffer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in transmit buffer</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Number of bytes transmitted in last granted transaction</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of bytes transmitted in last granted transaction</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LIST</name>
+ <description>EasyDMA list type</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LIST</name>
+ <description>List type</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable EasyDMA list</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ArrayList</name>
+ <description>Use array list</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>CONFIG</name>
+ <description>Configuration register</description>
+ <addressOffset>0x554</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ORDER</name>
+ <description>Bit order</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>MsbFirst</name>
+ <description>Most significant bit shifted out first</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>LsbFirst</name>
+ <description>Least significant bit shifted out first</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CPHA</name>
+ <description>Serial clock (SCK) phase</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Leading</name>
+ <description>Sample on leading edge of clock, shift serial data on trailing edge</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Trailing</name>
+ <description>Sample on trailing edge of clock, shift serial data on leading edge</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CPOL</name>
+ <description>Serial clock (SCK) polarity</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>ActiveHigh</name>
+ <description>Active high</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ActiveLow</name>
+ <description>Active low</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DEF</name>
+ <description>Default character. Character clocked out in case of an ignored transaction.</description>
+ <addressOffset>0x55C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>DEF</name>
+ <description>Default character. Character clocked out in case of an ignored transaction.</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ORC</name>
+ <description>Over-read character</description>
+ <addressOffset>0x5C0</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ORC</name>
+ <description>Over-read character. Character clocked out after an over-read of the transmit buffer.</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>TWI0</name>
+ <description>I2C compatible Two-Wire Interface 0</description>
+ <baseAddress>0x40003000</baseAddress>
+ <alternatePeripheral>SPI0</alternatePeripheral>
+ <headerStructName>TWI</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0</name>
+ <value>3</value>
+ </interrupt>
+ <groupName>TWI</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_STARTRX</name>
+ <description>Start TWI receive sequence</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STARTRX</name>
+ <description>Start TWI receive sequence</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STARTTX</name>
+ <description>Start TWI transmit sequence</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STARTTX</name>
+ <description>Start TWI transmit sequence</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stop TWI transaction</description>
+ <addressOffset>0x014</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stop TWI transaction</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_SUSPEND</name>
+ <description>Suspend TWI transaction</description>
+ <addressOffset>0x01C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_SUSPEND</name>
+ <description>Suspend TWI transaction</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_RESUME</name>
+ <description>Resume TWI transaction</description>
+ <addressOffset>0x020</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_RESUME</name>
+ <description>Resume TWI transaction</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_STOPPED</name>
+ <description>TWI stopped</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_STOPPED</name>
+ <description>TWI stopped</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RXDREADY</name>
+ <description>TWI RXD byte received</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RXDREADY</name>
+ <description>TWI RXD byte received</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_TXDSENT</name>
+ <description>TWI TXD byte sent</description>
+ <addressOffset>0x11C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TXDSENT</name>
+ <description>TWI TXD byte sent</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ERROR</name>
+ <description>TWI error</description>
+ <addressOffset>0x124</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ERROR</name>
+ <description>TWI error</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_BB</name>
+ <description>TWI byte boundary, generated before each byte that is sent or received</description>
+ <addressOffset>0x138</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_BB</name>
+ <description>TWI byte boundary, generated before each byte that is sent or received</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_SUSPENDED</name>
+ <description>TWI entered the suspended state</description>
+ <addressOffset>0x148</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_SUSPENDED</name>
+ <description>TWI entered the suspended state</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>BB_SUSPEND</name>
+ <description>Shortcut between event BB and task SUSPEND</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>BB_STOP</name>
+ <description>Shortcut between event BB and task STOP</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to enable interrupt for event STOPPED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXDREADY</name>
+ <description>Write '1' to enable interrupt for event RXDREADY</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXDSENT</name>
+ <description>Write '1' to enable interrupt for event TXDSENT</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Write '1' to enable interrupt for event ERROR</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>BB</name>
+ <description>Write '1' to enable interrupt for event BB</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SUSPENDED</name>
+ <description>Write '1' to enable interrupt for event SUSPENDED</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to disable interrupt for event STOPPED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXDREADY</name>
+ <description>Write '1' to disable interrupt for event RXDREADY</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXDSENT</name>
+ <description>Write '1' to disable interrupt for event TXDSENT</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Write '1' to disable interrupt for event ERROR</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>BB</name>
+ <description>Write '1' to disable interrupt for event BB</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SUSPENDED</name>
+ <description>Write '1' to disable interrupt for event SUSPENDED</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ERRORSRC</name>
+ <description>Error source</description>
+ <addressOffset>0x4C4</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToClear</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>OVERRUN</name>
+ <description>Overrun error</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: no overrun occured</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: overrun occured</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ANACK</name>
+ <description>NACK received after sending the address (write '1' to clear)</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: error present</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DNACK</name>
+ <description>NACK received after sending a data byte (write '1' to clear)</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: error present</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>Enable TWI</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable TWI</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable TWI</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable TWI</description>
+ <value>5</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>PSEL</name>
+ <description>Unspecified</description>
+ <headerStructName>TWI_PSEL</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x508</addressOffset>
+ <register>
+ <name>SCL</name>
+ <description>Pin select for SCL</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SDA</name>
+ <description>Pin select for SDA</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>RXD</name>
+ <description>RXD register</description>
+ <addressOffset>0x518</addressOffset>
+ <access>read-only</access>
+ <readAction>modifyExternal</readAction>
+ <fields>
+ <field>
+ <name>RXD</name>
+ <description>RXD register</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TXD</name>
+ <description>TXD register</description>
+ <addressOffset>0x51C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TXD</name>
+ <description>TXD register</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>FREQUENCY</name>
+ <description>TWI frequency. Accuracy depends on the HFCLK source selected.</description>
+ <addressOffset>0x524</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x04000000</resetValue>
+ <fields>
+ <field>
+ <name>FREQUENCY</name>
+ <description>TWI master clock frequency</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>K100</name>
+ <description>100 kbps</description>
+ <value>0x01980000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>K250</name>
+ <description>250 kbps</description>
+ <value>0x04000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>K400</name>
+ <description>400 kbps (actual rate 410.256 kbps)</description>
+ <value>0x06680000</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ADDRESS</name>
+ <description>Address used in the TWI transfer</description>
+ <addressOffset>0x588</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ADDRESS</name>
+ <description>Address used in the TWI transfer</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>TWIM0</name>
+ <description>I2C compatible Two-Wire Master Interface with EasyDMA 0</description>
+ <baseAddress>0x40003000</baseAddress>
+ <alternatePeripheral>SPI0</alternatePeripheral>
+ <headerStructName>TWIM</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0</name>
+ <value>3</value>
+ </interrupt>
+ <groupName>TWIM</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_STARTRX</name>
+ <description>Start TWI receive sequence</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STARTRX</name>
+ <description>Start TWI receive sequence</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STARTTX</name>
+ <description>Start TWI transmit sequence</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STARTTX</name>
+ <description>Start TWI transmit sequence</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stop TWI transaction. Must be issued while the TWI master is not suspended.</description>
+ <addressOffset>0x014</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stop TWI transaction. Must be issued while the TWI master is not suspended.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_SUSPEND</name>
+ <description>Suspend TWI transaction</description>
+ <addressOffset>0x01C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_SUSPEND</name>
+ <description>Suspend TWI transaction</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_RESUME</name>
+ <description>Resume TWI transaction</description>
+ <addressOffset>0x020</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_RESUME</name>
+ <description>Resume TWI transaction</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_STOPPED</name>
+ <description>TWI stopped</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_STOPPED</name>
+ <description>TWI stopped</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ERROR</name>
+ <description>TWI error</description>
+ <addressOffset>0x124</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ERROR</name>
+ <description>TWI error</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_SUSPENDED</name>
+ <description>Last byte has been sent out after the SUSPEND task has been issued, TWI traffic is now suspended.</description>
+ <addressOffset>0x148</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_SUSPENDED</name>
+ <description>Last byte has been sent out after the SUSPEND task has been issued, TWI traffic is now suspended.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RXSTARTED</name>
+ <description>Receive sequence started</description>
+ <addressOffset>0x14C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RXSTARTED</name>
+ <description>Receive sequence started</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_TXSTARTED</name>
+ <description>Transmit sequence started</description>
+ <addressOffset>0x150</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TXSTARTED</name>
+ <description>Transmit sequence started</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_LASTRX</name>
+ <description>Byte boundary, starting to receive the last byte</description>
+ <addressOffset>0x15C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_LASTRX</name>
+ <description>Byte boundary, starting to receive the last byte</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_LASTTX</name>
+ <description>Byte boundary, starting to transmit the last byte</description>
+ <addressOffset>0x160</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_LASTTX</name>
+ <description>Byte boundary, starting to transmit the last byte</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LASTTX_STARTRX</name>
+ <description>Shortcut between event LASTTX and task STARTRX</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LASTTX_SUSPEND</name>
+ <description>Shortcut between event LASTTX and task SUSPEND</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LASTTX_STOP</name>
+ <description>Shortcut between event LASTTX and task STOP</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LASTRX_STARTTX</name>
+ <description>Shortcut between event LASTRX and task STARTTX</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LASTRX_SUSPEND</name>
+ <description>Shortcut between event LASTRX and task SUSPEND</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LASTRX_STOP</name>
+ <description>Shortcut between event LASTRX and task STOP</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTEN</name>
+ <description>Enable or disable interrupt</description>
+ <addressOffset>0x300</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STOPPED</name>
+ <description>Enable or disable interrupt for event STOPPED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Enable or disable interrupt for event ERROR</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SUSPENDED</name>
+ <description>Enable or disable interrupt for event SUSPENDED</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXSTARTED</name>
+ <description>Enable or disable interrupt for event RXSTARTED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXSTARTED</name>
+ <description>Enable or disable interrupt for event TXSTARTED</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LASTRX</name>
+ <description>Enable or disable interrupt for event LASTRX</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LASTTX</name>
+ <description>Enable or disable interrupt for event LASTTX</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to enable interrupt for event STOPPED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Write '1' to enable interrupt for event ERROR</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SUSPENDED</name>
+ <description>Write '1' to enable interrupt for event SUSPENDED</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXSTARTED</name>
+ <description>Write '1' to enable interrupt for event RXSTARTED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXSTARTED</name>
+ <description>Write '1' to enable interrupt for event TXSTARTED</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LASTRX</name>
+ <description>Write '1' to enable interrupt for event LASTRX</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LASTTX</name>
+ <description>Write '1' to enable interrupt for event LASTTX</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to disable interrupt for event STOPPED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Write '1' to disable interrupt for event ERROR</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SUSPENDED</name>
+ <description>Write '1' to disable interrupt for event SUSPENDED</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXSTARTED</name>
+ <description>Write '1' to disable interrupt for event RXSTARTED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXSTARTED</name>
+ <description>Write '1' to disable interrupt for event TXSTARTED</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LASTRX</name>
+ <description>Write '1' to disable interrupt for event LASTRX</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LASTTX</name>
+ <description>Write '1' to disable interrupt for event LASTTX</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ERRORSRC</name>
+ <description>Error source</description>
+ <addressOffset>0x4C4</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToClear</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>OVERRUN</name>
+ <description>Overrun error</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotReceived</name>
+ <description>Error did not occur</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Received</name>
+ <description>Error occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ANACK</name>
+ <description>NACK received after sending the address (write '1' to clear)</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotReceived</name>
+ <description>Error did not occur</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Received</name>
+ <description>Error occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DNACK</name>
+ <description>NACK received after sending a data byte (write '1' to clear)</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotReceived</name>
+ <description>Error did not occur</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Received</name>
+ <description>Error occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>Enable TWIM</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable TWIM</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable TWIM</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable TWIM</description>
+ <value>6</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>PSEL</name>
+ <description>Unspecified</description>
+ <headerStructName>TWIM_PSEL</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x508</addressOffset>
+ <register>
+ <name>SCL</name>
+ <description>Pin select for SCL signal</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SDA</name>
+ <description>Pin select for SDA signal</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>FREQUENCY</name>
+ <description>TWI frequency. Accuracy depends on the HFCLK source selected.</description>
+ <addressOffset>0x524</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x04000000</resetValue>
+ <fields>
+ <field>
+ <name>FREQUENCY</name>
+ <description>TWI master clock frequency</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>K100</name>
+ <description>100 kbps</description>
+ <value>0x01980000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>K250</name>
+ <description>250 kbps</description>
+ <value>0x04000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>K400</name>
+ <description>400 kbps</description>
+ <value>0x06400000</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>RXD</name>
+ <description>RXD EasyDMA channel</description>
+ <headerStructName>TWIM_RXD</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x534</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in receive buffer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in receive buffer</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction. In case of NACK error, includes the NACK'ed byte.</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LIST</name>
+ <description>EasyDMA list type</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LIST</name>
+ <description>List type</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable EasyDMA list</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ArrayList</name>
+ <description>Use array list</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>TXD</name>
+ <description>TXD EasyDMA channel</description>
+ <headerStructName>TWIM_TXD</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x544</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in transmit buffer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in transmit buffer</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction. In case of NACK error, includes the NACK'ed byte.</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LIST</name>
+ <description>EasyDMA list type</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LIST</name>
+ <description>List type</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable EasyDMA list</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ArrayList</name>
+ <description>Use array list</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>ADDRESS</name>
+ <description>Address used in the TWI transfer</description>
+ <addressOffset>0x588</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ADDRESS</name>
+ <description>Address used in the TWI transfer</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>TWIS0</name>
+ <description>I2C compatible Two-Wire Slave Interface with EasyDMA 0</description>
+ <baseAddress>0x40003000</baseAddress>
+ <alternatePeripheral>SPI0</alternatePeripheral>
+ <headerStructName>TWIS</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0</name>
+ <value>3</value>
+ </interrupt>
+ <groupName>TWIS</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stop TWI transaction</description>
+ <addressOffset>0x014</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stop TWI transaction</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_SUSPEND</name>
+ <description>Suspend TWI transaction</description>
+ <addressOffset>0x01C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_SUSPEND</name>
+ <description>Suspend TWI transaction</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_RESUME</name>
+ <description>Resume TWI transaction</description>
+ <addressOffset>0x020</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_RESUME</name>
+ <description>Resume TWI transaction</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_PREPARERX</name>
+ <description>Prepare the TWI slave to respond to a write command</description>
+ <addressOffset>0x030</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_PREPARERX</name>
+ <description>Prepare the TWI slave to respond to a write command</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_PREPARETX</name>
+ <description>Prepare the TWI slave to respond to a read command</description>
+ <addressOffset>0x034</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_PREPARETX</name>
+ <description>Prepare the TWI slave to respond to a read command</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_STOPPED</name>
+ <description>TWI stopped</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_STOPPED</name>
+ <description>TWI stopped</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ERROR</name>
+ <description>TWI error</description>
+ <addressOffset>0x124</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ERROR</name>
+ <description>TWI error</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RXSTARTED</name>
+ <description>Receive sequence started</description>
+ <addressOffset>0x14C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RXSTARTED</name>
+ <description>Receive sequence started</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_TXSTARTED</name>
+ <description>Transmit sequence started</description>
+ <addressOffset>0x150</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TXSTARTED</name>
+ <description>Transmit sequence started</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_WRITE</name>
+ <description>Write command received</description>
+ <addressOffset>0x164</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_WRITE</name>
+ <description>Write command received</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_READ</name>
+ <description>Read command received</description>
+ <addressOffset>0x168</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_READ</name>
+ <description>Read command received</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>WRITE_SUSPEND</name>
+ <description>Shortcut between event WRITE and task SUSPEND</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>READ_SUSPEND</name>
+ <description>Shortcut between event READ and task SUSPEND</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTEN</name>
+ <description>Enable or disable interrupt</description>
+ <addressOffset>0x300</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STOPPED</name>
+ <description>Enable or disable interrupt for event STOPPED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Enable or disable interrupt for event ERROR</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXSTARTED</name>
+ <description>Enable or disable interrupt for event RXSTARTED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXSTARTED</name>
+ <description>Enable or disable interrupt for event TXSTARTED</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>WRITE</name>
+ <description>Enable or disable interrupt for event WRITE</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>READ</name>
+ <description>Enable or disable interrupt for event READ</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to enable interrupt for event STOPPED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Write '1' to enable interrupt for event ERROR</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXSTARTED</name>
+ <description>Write '1' to enable interrupt for event RXSTARTED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXSTARTED</name>
+ <description>Write '1' to enable interrupt for event TXSTARTED</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>WRITE</name>
+ <description>Write '1' to enable interrupt for event WRITE</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>READ</name>
+ <description>Write '1' to enable interrupt for event READ</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to disable interrupt for event STOPPED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Write '1' to disable interrupt for event ERROR</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXSTARTED</name>
+ <description>Write '1' to disable interrupt for event RXSTARTED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXSTARTED</name>
+ <description>Write '1' to disable interrupt for event TXSTARTED</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>WRITE</name>
+ <description>Write '1' to disable interrupt for event WRITE</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>READ</name>
+ <description>Write '1' to disable interrupt for event READ</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ERRORSRC</name>
+ <description>Error source</description>
+ <addressOffset>0x4D0</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToClear</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>OVERFLOW</name>
+ <description>RX buffer overflow detected, and prevented</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Error did not occur</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Error occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DNACK</name>
+ <description>NACK sent after receiving a data byte</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotReceived</name>
+ <description>Error did not occur</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Received</name>
+ <description>Error occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OVERREAD</name>
+ <description>TX buffer over-read detected, and prevented</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Error did not occur</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Error occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MATCH</name>
+ <description>Status register indicating which address had a match</description>
+ <addressOffset>0x4D4</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>MATCH</name>
+ <description>Which of the addresses in {ADDRESS} matched the incoming address</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>Enable TWIS</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable TWIS</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable TWIS</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable TWIS</description>
+ <value>9</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>PSEL</name>
+ <description>Unspecified</description>
+ <headerStructName>TWIS_PSEL</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x508</addressOffset>
+ <register>
+ <name>SCL</name>
+ <description>Pin select for SCL signal</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SDA</name>
+ <description>Pin select for SDA signal</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>RXD</name>
+ <description>RXD EasyDMA channel</description>
+ <headerStructName>TWIS_RXD</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x534</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>RXD Data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>RXD Data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in RXD buffer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in RXD buffer</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last RXD transaction</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last RXD transaction</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LIST</name>
+ <description>EasyDMA list type</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LIST</name>
+ <description>List type</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable EasyDMA list</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ArrayList</name>
+ <description>Use array list</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>TXD</name>
+ <description>TXD EasyDMA channel</description>
+ <headerStructName>TWIS_TXD</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x544</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>TXD Data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>TXD Data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in TXD buffer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes in TXD buffer</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last TXD transaction</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last TXD transaction</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LIST</name>
+ <description>EasyDMA list type</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LIST</name>
+ <description>List type</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable EasyDMA list</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ArrayList</name>
+ <description>Use array list</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <dim>0x2</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>ADDRESS[%s]</name>
+ <description>Description collection: TWI slave address n</description>
+ <addressOffset>0x588</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ADDRESS</name>
+ <description>TWI slave address</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CONFIG</name>
+ <description>Configuration register for the address match mechanism</description>
+ <addressOffset>0x594</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>ADDRESS0</name>
+ <description>Enable or disable address matching on ADDRESS[0]</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ADDRESS1</name>
+ <description>Enable or disable address matching on ADDRESS[1]</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ORC</name>
+ <description>Over-read character. Character sent out in case of an over-read of the transmit buffer.</description>
+ <addressOffset>0x5C0</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ORC</name>
+ <description>Over-read character. Character sent out in case of an over-read of the transmit buffer.</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral derivedFrom="SPI0">
+ <name>SPI1</name>
+ <description>Serial Peripheral Interface 1</description>
+ <baseAddress>0x40004000</baseAddress>
+ <interrupt>
+ <name>SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1</name>
+ <value>4</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="SPIM0">
+ <name>SPIM1</name>
+ <description>Serial Peripheral Interface Master with EasyDMA 1</description>
+ <baseAddress>0x40004000</baseAddress>
+ <alternatePeripheral>SPI1</alternatePeripheral>
+ <interrupt>
+ <name>SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1</name>
+ <value>4</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="SPIS0">
+ <name>SPIS1</name>
+ <description>SPI Slave 1</description>
+ <baseAddress>0x40004000</baseAddress>
+ <alternatePeripheral>SPI1</alternatePeripheral>
+ <interrupt>
+ <name>SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1</name>
+ <value>4</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="TWI0">
+ <name>TWI1</name>
+ <description>I2C compatible Two-Wire Interface 1</description>
+ <baseAddress>0x40004000</baseAddress>
+ <alternatePeripheral>SPI1</alternatePeripheral>
+ <interrupt>
+ <name>SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1</name>
+ <value>4</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="TWIM0">
+ <name>TWIM1</name>
+ <description>I2C compatible Two-Wire Master Interface with EasyDMA 1</description>
+ <baseAddress>0x40004000</baseAddress>
+ <alternatePeripheral>SPI1</alternatePeripheral>
+ <interrupt>
+ <name>SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1</name>
+ <value>4</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="TWIS0">
+ <name>TWIS1</name>
+ <description>I2C compatible Two-Wire Slave Interface with EasyDMA 1</description>
+ <baseAddress>0x40004000</baseAddress>
+ <alternatePeripheral>SPI1</alternatePeripheral>
+ <interrupt>
+ <name>SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1</name>
+ <value>4</value>
+ </interrupt>
+ </peripheral>
+ <peripheral>
+ <name>NFCT</name>
+ <description>NFC-A compatible radio</description>
+ <baseAddress>0x40005000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>NFCT</name>
+ <value>5</value>
+ </interrupt>
+ <groupName>NFCT</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_ACTIVATE</name>
+ <description>Activate NFCT peripheral for incoming and outgoing frames, change state to activated</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_ACTIVATE</name>
+ <description>Activate NFCT peripheral for incoming and outgoing frames, change state to activated</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_DISABLE</name>
+ <description>Disable NFCT peripheral</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_DISABLE</name>
+ <description>Disable NFCT peripheral</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_SENSE</name>
+ <description>Enable NFC sense field mode, change state to sense mode</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_SENSE</name>
+ <description>Enable NFC sense field mode, change state to sense mode</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STARTTX</name>
+ <description>Start transmission of an outgoing frame, change state to transmit</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STARTTX</name>
+ <description>Start transmission of an outgoing frame, change state to transmit</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_ENABLERXDATA</name>
+ <description>Initializes the EasyDMA for receive.</description>
+ <addressOffset>0x01C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_ENABLERXDATA</name>
+ <description>Initializes the EasyDMA for receive.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_GOIDLE</name>
+ <description>Force state machine to IDLE state</description>
+ <addressOffset>0x024</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_GOIDLE</name>
+ <description>Force state machine to IDLE state</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_GOSLEEP</name>
+ <description>Force state machine to SLEEP_A state</description>
+ <addressOffset>0x028</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_GOSLEEP</name>
+ <description>Force state machine to SLEEP_A state</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_READY</name>
+ <description>The NFCT peripheral is ready to receive and send frames</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_READY</name>
+ <description>The NFCT peripheral is ready to receive and send frames</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_FIELDDETECTED</name>
+ <description>Remote NFC field detected</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_FIELDDETECTED</name>
+ <description>Remote NFC field detected</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_FIELDLOST</name>
+ <description>Remote NFC field lost</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_FIELDLOST</name>
+ <description>Remote NFC field lost</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_TXFRAMESTART</name>
+ <description>Marks the start of the first symbol of a transmitted frame</description>
+ <addressOffset>0x10C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TXFRAMESTART</name>
+ <description>Marks the start of the first symbol of a transmitted frame</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_TXFRAMEEND</name>
+ <description>Marks the end of the last transmitted on-air symbol of a frame</description>
+ <addressOffset>0x110</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TXFRAMEEND</name>
+ <description>Marks the end of the last transmitted on-air symbol of a frame</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RXFRAMESTART</name>
+ <description>Marks the end of the first symbol of a received frame</description>
+ <addressOffset>0x114</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RXFRAMESTART</name>
+ <description>Marks the end of the first symbol of a received frame</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RXFRAMEEND</name>
+ <description>Received data has been checked (CRC, parity) and transferred to RAM, and EasyDMA has ended accessing the RX buffer</description>
+ <addressOffset>0x118</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RXFRAMEEND</name>
+ <description>Received data has been checked (CRC, parity) and transferred to RAM, and EasyDMA has ended accessing the RX buffer</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ERROR</name>
+ <description>NFC error reported. The ERRORSTATUS register contains details on the source of the error.</description>
+ <addressOffset>0x11C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ERROR</name>
+ <description>NFC error reported. The ERRORSTATUS register contains details on the source of the error.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RXERROR</name>
+ <description>NFC RX frame error reported. The FRAMESTATUS.RX register contains details on the source of the error.</description>
+ <addressOffset>0x128</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RXERROR</name>
+ <description>NFC RX frame error reported. The FRAMESTATUS.RX register contains details on the source of the error.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ENDRX</name>
+ <description>RX buffer (as defined by PACKETPTR and MAXLEN) in Data RAM full.</description>
+ <addressOffset>0x12C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ENDRX</name>
+ <description>RX buffer (as defined by PACKETPTR and MAXLEN) in Data RAM full.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ENDTX</name>
+ <description>Transmission of data in RAM has ended, and EasyDMA has ended accessing the TX buffer</description>
+ <addressOffset>0x130</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ENDTX</name>
+ <description>Transmission of data in RAM has ended, and EasyDMA has ended accessing the TX buffer</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_AUTOCOLRESSTARTED</name>
+ <description>Auto collision resolution process has started</description>
+ <addressOffset>0x138</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_AUTOCOLRESSTARTED</name>
+ <description>Auto collision resolution process has started</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_COLLISION</name>
+ <description>NFC auto collision resolution error reported.</description>
+ <addressOffset>0x148</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_COLLISION</name>
+ <description>NFC auto collision resolution error reported.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_SELECTED</name>
+ <description>NFC auto collision resolution successfully completed</description>
+ <addressOffset>0x14C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_SELECTED</name>
+ <description>NFC auto collision resolution successfully completed</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_STARTED</name>
+ <description>EasyDMA is ready to receive or send frames.</description>
+ <addressOffset>0x150</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_STARTED</name>
+ <description>EasyDMA is ready to receive or send frames.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>FIELDDETECTED_ACTIVATE</name>
+ <description>Shortcut between event FIELDDETECTED and task ACTIVATE</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>FIELDLOST_SENSE</name>
+ <description>Shortcut between event FIELDLOST and task SENSE</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXFRAMEEND_ENABLERXDATA</name>
+ <description>Shortcut between event TXFRAMEEND and task ENABLERXDATA</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTEN</name>
+ <description>Enable or disable interrupt</description>
+ <addressOffset>0x300</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>READY</name>
+ <description>Enable or disable interrupt for event READY</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>FIELDDETECTED</name>
+ <description>Enable or disable interrupt for event FIELDDETECTED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>FIELDLOST</name>
+ <description>Enable or disable interrupt for event FIELDLOST</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXFRAMESTART</name>
+ <description>Enable or disable interrupt for event TXFRAMESTART</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXFRAMEEND</name>
+ <description>Enable or disable interrupt for event TXFRAMEEND</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXFRAMESTART</name>
+ <description>Enable or disable interrupt for event RXFRAMESTART</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXFRAMEEND</name>
+ <description>Enable or disable interrupt for event RXFRAMEEND</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Enable or disable interrupt for event ERROR</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXERROR</name>
+ <description>Enable or disable interrupt for event RXERROR</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDRX</name>
+ <description>Enable or disable interrupt for event ENDRX</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDTX</name>
+ <description>Enable or disable interrupt for event ENDTX</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>AUTOCOLRESSTARTED</name>
+ <description>Enable or disable interrupt for event AUTOCOLRESSTARTED</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COLLISION</name>
+ <description>Enable or disable interrupt for event COLLISION</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SELECTED</name>
+ <description>Enable or disable interrupt for event SELECTED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STARTED</name>
+ <description>Enable or disable interrupt for event STARTED</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>READY</name>
+ <description>Write '1' to enable interrupt for event READY</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>FIELDDETECTED</name>
+ <description>Write '1' to enable interrupt for event FIELDDETECTED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>FIELDLOST</name>
+ <description>Write '1' to enable interrupt for event FIELDLOST</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXFRAMESTART</name>
+ <description>Write '1' to enable interrupt for event TXFRAMESTART</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXFRAMEEND</name>
+ <description>Write '1' to enable interrupt for event TXFRAMEEND</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXFRAMESTART</name>
+ <description>Write '1' to enable interrupt for event RXFRAMESTART</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXFRAMEEND</name>
+ <description>Write '1' to enable interrupt for event RXFRAMEEND</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Write '1' to enable interrupt for event ERROR</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXERROR</name>
+ <description>Write '1' to enable interrupt for event RXERROR</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDRX</name>
+ <description>Write '1' to enable interrupt for event ENDRX</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDTX</name>
+ <description>Write '1' to enable interrupt for event ENDTX</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>AUTOCOLRESSTARTED</name>
+ <description>Write '1' to enable interrupt for event AUTOCOLRESSTARTED</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COLLISION</name>
+ <description>Write '1' to enable interrupt for event COLLISION</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SELECTED</name>
+ <description>Write '1' to enable interrupt for event SELECTED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STARTED</name>
+ <description>Write '1' to enable interrupt for event STARTED</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>READY</name>
+ <description>Write '1' to disable interrupt for event READY</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>FIELDDETECTED</name>
+ <description>Write '1' to disable interrupt for event FIELDDETECTED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>FIELDLOST</name>
+ <description>Write '1' to disable interrupt for event FIELDLOST</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXFRAMESTART</name>
+ <description>Write '1' to disable interrupt for event TXFRAMESTART</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXFRAMEEND</name>
+ <description>Write '1' to disable interrupt for event TXFRAMEEND</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXFRAMESTART</name>
+ <description>Write '1' to disable interrupt for event RXFRAMESTART</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXFRAMEEND</name>
+ <description>Write '1' to disable interrupt for event RXFRAMEEND</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Write '1' to disable interrupt for event ERROR</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RXERROR</name>
+ <description>Write '1' to disable interrupt for event RXERROR</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDRX</name>
+ <description>Write '1' to disable interrupt for event ENDRX</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDTX</name>
+ <description>Write '1' to disable interrupt for event ENDTX</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>AUTOCOLRESSTARTED</name>
+ <description>Write '1' to disable interrupt for event AUTOCOLRESSTARTED</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COLLISION</name>
+ <description>Write '1' to disable interrupt for event COLLISION</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SELECTED</name>
+ <description>Write '1' to disable interrupt for event SELECTED</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STARTED</name>
+ <description>Write '1' to disable interrupt for event STARTED</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ERRORSTATUS</name>
+ <description>NFC Error Status register</description>
+ <addressOffset>0x404</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToClear</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>FRAMEDELAYTIMEOUT</name>
+ <description>No STARTTX task triggered before expiration of the time set in FRAMEDELAYMAX</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>FRAMESTATUS</name>
+ <description>Unspecified</description>
+ <headerStructName>NFCT_FRAMESTATUS</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x40C</addressOffset>
+ <register>
+ <name>RX</name>
+ <description>Result of last incoming frame</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToClear</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>CRCERROR</name>
+ <description>No valid end of frame (EoF) detected</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>CRCCorrect</name>
+ <description>Valid CRC detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>CRCError</name>
+ <description>CRC received does not match local check</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PARITYSTATUS</name>
+ <description>Parity status of received frame</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>ParityOK</name>
+ <description>Frame received with parity OK</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ParityError</name>
+ <description>Frame received with parity error</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OVERRUN</name>
+ <description>Overrun detected</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoOverrun</name>
+ <description>No overrun detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Overrun</name>
+ <description>Overrun error</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>NFCTAGSTATE</name>
+ <description>NfcTag state register</description>
+ <addressOffset>0x410</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>NFCTAGSTATE</name>
+ <description>NfcTag state</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled or sense</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>RampUp</name>
+ <description>RampUp</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Idle</name>
+ <description>Idle</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Receive</name>
+ <description>Receive</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>FrameDelay</name>
+ <description>FrameDelay</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Transmit</name>
+ <description>Transmit</description>
+ <value>6</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SLEEPSTATE</name>
+ <description>Sleep state during automatic collision resolution</description>
+ <addressOffset>0x420</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>SLEEPSTATE</name>
+ <description>Reflects the sleep state during automatic collision resolution. Set to IDLE
+ by a GOIDLE task. Set to SLEEP_A when a valid SLEEP_REQ frame is received or by a
+ GOSLEEP task.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Idle</name>
+ <description>State is IDLE.</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>SleepA</name>
+ <description>State is SLEEP_A.</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>FIELDPRESENT</name>
+ <description>Indicates the presence or not of a valid field</description>
+ <addressOffset>0x43C</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>FIELDPRESENT</name>
+ <description>Indicates if a valid field is present. Available only in the activated state.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoField</name>
+ <description>No valid field detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>FieldPresent</name>
+ <description>Valid field detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LOCKDETECT</name>
+ <description>Indicates if the low level has locked to the field</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotLocked</name>
+ <description>Not locked to field</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Locked</name>
+ <description>Locked to field</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>FRAMEDELAYMIN</name>
+ <description>Minimum frame delay</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000480</resetValue>
+ <fields>
+ <field>
+ <name>FRAMEDELAYMIN</name>
+ <description>Minimum frame delay in number of 13.56 MHz clocks</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>FRAMEDELAYMAX</name>
+ <description>Maximum frame delay</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00001000</resetValue>
+ <fields>
+ <field>
+ <name>FRAMEDELAYMAX</name>
+ <description>Maximum frame delay in number of 13.56 MHz clocks</description>
+ <lsb>0</lsb>
+ <msb>19</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>FRAMEDELAYMODE</name>
+ <description>Configuration register for the Frame Delay Timer</description>
+ <addressOffset>0x50C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>FRAMEDELAYMODE</name>
+ <description>Configuration register for the Frame Delay Timer</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>FreeRun</name>
+ <description>Transmission is independent of frame timer and will start when the STARTTX task is triggered. No timeout.</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Window</name>
+ <description>Frame is transmitted between FRAMEDELAYMIN and FRAMEDELAYMAX</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ExactVal</name>
+ <description>Frame is transmitted exactly at FRAMEDELAYMAX</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>WindowGrid</name>
+ <description>Frame is transmitted on a bit grid between FRAMEDELAYMIN and FRAMEDELAYMAX</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PACKETPTR</name>
+ <description>Packet pointer for TXD and RXD data storage in Data RAM</description>
+ <addressOffset>0x510</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>Packet pointer for TXD and RXD data storage in Data RAM. This address is a byte-aligned RAM address.</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXLEN</name>
+ <description>Size of the RAM buffer allocated to TXD and RXD data storage each</description>
+ <addressOffset>0x514</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXLEN</name>
+ <description>Size of the RAM buffer allocated to TXD and RXD data storage each</description>
+ <lsb>0</lsb>
+ <msb>8</msb>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>TXD</name>
+ <description>Unspecified</description>
+ <headerStructName>NFCT_TXD</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x518</addressOffset>
+ <register>
+ <name>FRAMECONFIG</name>
+ <description>Configuration of outgoing frames</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000017</resetValue>
+ <fields>
+ <field>
+ <name>PARITY</name>
+ <description>Indicates if parity is added to the frame</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoParity</name>
+ <description>Parity is not added to TX frames</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Parity</name>
+ <description>Parity is added to TX frames</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DISCARDMODE</name>
+ <description>Discarding unused bits at start or end of a frame</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>DiscardEnd</name>
+ <description>Unused bits are discarded at end of frame (EoF)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DiscardStart</name>
+ <description>Unused bits are discarded at start of frame (SoF)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SOF</name>
+ <description>Adding SoF or not in TX frames</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoSoF</name>
+ <description>SoF symbol not added</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>SoF</name>
+ <description>SoF symbol added</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CRCMODETX</name>
+ <description>CRC mode for outgoing frames</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoCRCTX</name>
+ <description>CRC is not added to the frame</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>CRC16TX</name>
+ <description>16 bit CRC added to the frame based on all the data read from RAM that is used in the frame</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Size of outgoing frame</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TXDATABITS</name>
+ <description>Number of bits in the last or first byte read from RAM that shall be included in the frame (excluding parity bit).</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ </field>
+ <field>
+ <name>TXDATABYTES</name>
+ <description>Number of complete bytes that shall be included in the frame, excluding CRC, parity and framing</description>
+ <lsb>3</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>RXD</name>
+ <description>Unspecified</description>
+ <headerStructName>NFCT_RXD</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x520</addressOffset>
+ <register>
+ <name>FRAMECONFIG</name>
+ <description>Configuration of incoming frames</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000015</resetValue>
+ <fields>
+ <field>
+ <name>PARITY</name>
+ <description>Indicates if parity expected in RX frame</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoParity</name>
+ <description>Parity is not expected in RX frames</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Parity</name>
+ <description>Parity is expected in RX frames</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SOF</name>
+ <description>SoF expected or not in RX frames</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoSoF</name>
+ <description>SoF symbol is not expected in RX frames</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>SoF</name>
+ <description>SoF symbol is expected in RX frames</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CRCMODERX</name>
+ <description>CRC mode for incoming frames</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoCRCRX</name>
+ <description>CRC is not expected in RX frames</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>CRC16RX</name>
+ <description>Last 16 bits in RX frame is CRC, CRC is checked and CRCSTATUS updated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Size of last incoming frame</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>RXDATABITS</name>
+ <description>Number of bits in the last byte in the frame, if less than 8 (including CRC, but excluding parity and SoF/EoF framing).</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ </field>
+ <field>
+ <name>RXDATABYTES</name>
+ <description>Number of complete bytes received in the frame (including CRC, but excluding parity and SoF/EoF framing)</description>
+ <lsb>3</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>MODULATIONCTRL</name>
+ <description>Enables the modulation output to a GPIO pin which can be connected to a second external antenna.</description>
+ <addressOffset>0x52C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>MODULATIONCTRL</name>
+ <description>Configuration of modulation control.</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Invalid</name>
+ <description>Invalid, defaults to same behaviour as for Internal</description>
+ <value>0x0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Internal</name>
+ <description>Use internal modulator only</description>
+ <value>0x1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ModToGpio</name>
+ <description>Output digital modulation signal to a GPIO pin.</description>
+ <value>0x2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>InternalAndModToGpio</name>
+ <description>Use internal modulator and output digital modulation signal to a GPIO pin.</description>
+ <value>0x3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MODULATIONPSEL</name>
+ <description>Pin select for Modulation control.</description>
+ <addressOffset>0x538</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>NFCID1_LAST</name>
+ <description>Last NFCID1 part (4, 7 or 10 bytes ID)</description>
+ <addressOffset>0x590</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00006363</resetValue>
+ <fields>
+ <field>
+ <name>NFCID1_Z</name>
+ <description>NFCID1 byte Z (very last byte sent)</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ <field>
+ <name>NFCID1_Y</name>
+ <description>NFCID1 byte Y</description>
+ <lsb>8</lsb>
+ <msb>15</msb>
+ </field>
+ <field>
+ <name>NFCID1_X</name>
+ <description>NFCID1 byte X</description>
+ <lsb>16</lsb>
+ <msb>23</msb>
+ </field>
+ <field>
+ <name>NFCID1_W</name>
+ <description>NFCID1 byte W</description>
+ <lsb>24</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>NFCID1_2ND_LAST</name>
+ <description>Second last NFCID1 part (7 or 10 bytes ID)</description>
+ <addressOffset>0x594</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>NFCID1_V</name>
+ <description>NFCID1 byte V</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ <field>
+ <name>NFCID1_U</name>
+ <description>NFCID1 byte U</description>
+ <lsb>8</lsb>
+ <msb>15</msb>
+ </field>
+ <field>
+ <name>NFCID1_T</name>
+ <description>NFCID1 byte T</description>
+ <lsb>16</lsb>
+ <msb>23</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>NFCID1_3RD_LAST</name>
+ <description>Third last NFCID1 part (10 bytes ID)</description>
+ <addressOffset>0x598</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>NFCID1_S</name>
+ <description>NFCID1 byte S</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ <field>
+ <name>NFCID1_R</name>
+ <description>NFCID1 byte R</description>
+ <lsb>8</lsb>
+ <msb>15</msb>
+ </field>
+ <field>
+ <name>NFCID1_Q</name>
+ <description>NFCID1 byte Q</description>
+ <lsb>16</lsb>
+ <msb>23</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AUTOCOLRESCONFIG</name>
+ <description>Controls the auto collision resolution function. This setting must be done before the NFCT peripheral is activated.</description>
+ <addressOffset>0x59C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000002</resetValue>
+ <fields>
+ <field>
+ <name>MODE</name>
+ <description>Enables/disables auto collision resolution</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Auto collision resolution enabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Auto collision resolution disabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SENSRES</name>
+ <description>NFC-A SENS_RES auto-response settings</description>
+ <addressOffset>0x5A0</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>BITFRAMESDD</name>
+ <description>Bit frame SDD as defined by the b5:b1 of byte 1 in SENS_RES response in the NFC Forum, NFC Digital Protocol Technical Specification</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>SDD00000</name>
+ <description>SDD pattern 00000</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>SDD00001</name>
+ <description>SDD pattern 00001</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>SDD00010</name>
+ <description>SDD pattern 00010</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>SDD00100</name>
+ <description>SDD pattern 00100</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>SDD01000</name>
+ <description>SDD pattern 01000</description>
+ <value>8</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>SDD10000</name>
+ <description>SDD pattern 10000</description>
+ <value>16</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RFU5</name>
+ <description>Reserved for future use. Shall be 0.</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>NFCIDSIZE</name>
+ <description>NFCID1 size. This value is used by the auto collision resolution engine.</description>
+ <lsb>6</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NFCID1Single</name>
+ <description>NFCID1 size: single (4 bytes)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>NFCID1Double</name>
+ <description>NFCID1 size: double (7 bytes)</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>NFCID1Triple</name>
+ <description>NFCID1 size: triple (10 bytes)</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PLATFCONFIG</name>
+ <description>Tag platform configuration as defined by the b4:b1 of byte 2 in SENS_RES response in the NFC Forum, NFC Digital Protocol Technical Specification</description>
+ <lsb>8</lsb>
+ <msb>11</msb>
+ </field>
+ <field>
+ <name>RFU74</name>
+ <description>Reserved for future use. Shall be 0.</description>
+ <lsb>12</lsb>
+ <msb>15</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SELRES</name>
+ <description>NFC-A SEL_RES auto-response settings</description>
+ <addressOffset>0x5A4</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>RFU10</name>
+ <description>Reserved for future use. Shall be 0.</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ </field>
+ <field>
+ <name>CASCADE</name>
+ <description>Cascade as defined by the b3 of SEL_RES response in the NFC Forum, NFC Digital Protocol Technical Specification (controlled by hardware, shall be 0)</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ </field>
+ <field>
+ <name>RFU43</name>
+ <description>Reserved for future use. Shall be 0.</description>
+ <lsb>3</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PROTOCOL</name>
+ <description>Protocol as defined by the b7:b6 of SEL_RES response in the NFC Forum, NFC Digital Protocol Technical Specification</description>
+ <lsb>5</lsb>
+ <msb>6</msb>
+ </field>
+ <field>
+ <name>RFU7</name>
+ <description>Reserved for future use. Shall be 0.</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>GPIOTE</name>
+ <description>GPIO Tasks and Events</description>
+ <baseAddress>0x40006000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>GPIOTE</name>
+ <value>6</value>
+ </interrupt>
+ <groupName>GPIOTE</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>TASKS_OUT[%s]</name>
+ <description>Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY.</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_OUT</name>
+ <description>Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>TASKS_SET[%s]</name>
+ <description>Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high.</description>
+ <addressOffset>0x030</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_SET</name>
+ <description>Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>TASKS_CLR[%s]</name>
+ <description>Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low.</description>
+ <addressOffset>0x060</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CLR</name>
+ <description>Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>EVENTS_IN[%s]</name>
+ <description>Description collection: Event generated from pin specified in CONFIG[n].PSEL</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_IN</name>
+ <description>Event generated from pin specified in CONFIG[n].PSEL</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_PORT</name>
+ <description>Event generated from multiple input GPIO pins with SENSE mechanism enabled</description>
+ <addressOffset>0x17C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_PORT</name>
+ <description>Event generated from multiple input GPIO pins with SENSE mechanism enabled</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>IN0</name>
+ <description>Write '1' to enable interrupt for event IN[0]</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN1</name>
+ <description>Write '1' to enable interrupt for event IN[1]</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN2</name>
+ <description>Write '1' to enable interrupt for event IN[2]</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN3</name>
+ <description>Write '1' to enable interrupt for event IN[3]</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN4</name>
+ <description>Write '1' to enable interrupt for event IN[4]</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN5</name>
+ <description>Write '1' to enable interrupt for event IN[5]</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN6</name>
+ <description>Write '1' to enable interrupt for event IN[6]</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN7</name>
+ <description>Write '1' to enable interrupt for event IN[7]</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Write '1' to enable interrupt for event PORT</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>IN0</name>
+ <description>Write '1' to disable interrupt for event IN[0]</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN1</name>
+ <description>Write '1' to disable interrupt for event IN[1]</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN2</name>
+ <description>Write '1' to disable interrupt for event IN[2]</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN3</name>
+ <description>Write '1' to disable interrupt for event IN[3]</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN4</name>
+ <description>Write '1' to disable interrupt for event IN[4]</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN5</name>
+ <description>Write '1' to disable interrupt for event IN[5]</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN6</name>
+ <description>Write '1' to disable interrupt for event IN[6]</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN7</name>
+ <description>Write '1' to disable interrupt for event IN[7]</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Write '1' to disable interrupt for event PORT</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>CONFIG[%s]</name>
+ <description>Description collection: Configuration for OUT[n], SET[n] and CLR[n] tasks and IN[n] event</description>
+ <addressOffset>0x510</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MODE</name>
+ <description>Mode</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled. Pin specified by PSEL will not be acquired by the GPIOTE module.</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Event</name>
+ <description>Event mode</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Task</name>
+ <description>Task mode</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PSEL</name>
+ <description>GPIO number associated with SET[n], CLR[n] and OUT[n] tasks and IN[n] event</description>
+ <lsb>8</lsb>
+ <msb>12</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ </field>
+ <field>
+ <name>POLARITY</name>
+ <description>When In task mode: Operation to be performed on output when OUT[n] task is triggered. When In event mode: Operation on input that shall trigger IN[n] event.</description>
+ <lsb>16</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>None</name>
+ <description>Task mode: No effect on pin from OUT[n] task. Event mode: no IN[n] event generated on pin activity.</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>LoToHi</name>
+ <description>Task mode: Set pin from OUT[n] task. Event mode: Generate IN[n] event when rising edge on pin.</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>HiToLo</name>
+ <description>Task mode: Clear pin from OUT[n] task. Event mode: Generate IN[n] event when falling edge on pin.</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Toggle</name>
+ <description>Task mode: Toggle pin from OUT[n]. Event mode: Generate IN[n] when any change on pin.</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OUTINIT</name>
+ <description>When in task mode: Initial value of the output when the GPIOTE channel is configured. When in event mode: No effect.</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Task mode: Initial value of pin before task triggering is low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>Task mode: Initial value of pin before task triggering is high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>SAADC</name>
+ <description>Successive approximation register (SAR) analog-to-digital converter</description>
+ <baseAddress>0x40007000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>SAADC</name>
+ <value>7</value>
+ </interrupt>
+ <groupName>SAADC</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_START</name>
+ <description>Starts the SAADC and prepares the result buffer in RAM</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_START</name>
+ <description>Starts the SAADC and prepares the result buffer in RAM</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_SAMPLE</name>
+ <description>Takes one SAADC sample</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_SAMPLE</name>
+ <description>Takes one SAADC sample</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stops the SAADC and terminates all on-going conversions</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stops the SAADC and terminates all on-going conversions</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_CALIBRATEOFFSET</name>
+ <description>Starts offset auto-calibration</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CALIBRATEOFFSET</name>
+ <description>Starts offset auto-calibration</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_STARTED</name>
+ <description>The SAADC has started</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_STARTED</name>
+ <description>The SAADC has started</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_END</name>
+ <description>The SAADC has filled up the result buffer</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_END</name>
+ <description>The SAADC has filled up the result buffer</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_DONE</name>
+ <description>A conversion task has been completed. Depending on the configuration, multiple conversions might be needed for a result to be transferred to RAM.</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_DONE</name>
+ <description>A conversion task has been completed. Depending on the configuration, multiple conversions might be needed for a result to be transferred to RAM.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RESULTDONE</name>
+ <description>Result ready for transfer to RAM</description>
+ <addressOffset>0x10C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RESULTDONE</name>
+ <description>Result ready for transfer to RAM</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_CALIBRATEDONE</name>
+ <description>Calibration is complete</description>
+ <addressOffset>0x110</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CALIBRATEDONE</name>
+ <description>Calibration is complete</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_STOPPED</name>
+ <description>The SAADC has stopped</description>
+ <addressOffset>0x114</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_STOPPED</name>
+ <description>The SAADC has stopped</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <dim>8</dim>
+ <dimIncrement>0x008</dimIncrement>
+ <name>EVENTS_CH[%s]</name>
+ <description>Peripheral events.</description>
+ <headerStructName>SAADC_EVENTS_CH</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x118</addressOffset>
+ <register>
+ <name>LIMITH</name>
+ <description>Description cluster: Last result is equal or above CH[n].LIMIT.HIGH</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LIMITH</name>
+ <description>Last result is equal or above CH[n].LIMIT.HIGH</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LIMITL</name>
+ <description>Description cluster: Last result is equal or below CH[n].LIMIT.LOW</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LIMITL</name>
+ <description>Last result is equal or below CH[n].LIMIT.LOW</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>INTEN</name>
+ <description>Enable or disable interrupt</description>
+ <addressOffset>0x300</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STARTED</name>
+ <description>Enable or disable interrupt for event STARTED</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>END</name>
+ <description>Enable or disable interrupt for event END</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DONE</name>
+ <description>Enable or disable interrupt for event DONE</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RESULTDONE</name>
+ <description>Enable or disable interrupt for event RESULTDONE</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CALIBRATEDONE</name>
+ <description>Enable or disable interrupt for event CALIBRATEDONE</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STOPPED</name>
+ <description>Enable or disable interrupt for event STOPPED</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH0LIMITH</name>
+ <description>Enable or disable interrupt for event CH0LIMITH</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH0LIMITL</name>
+ <description>Enable or disable interrupt for event CH0LIMITL</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH1LIMITH</name>
+ <description>Enable or disable interrupt for event CH1LIMITH</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH1LIMITL</name>
+ <description>Enable or disable interrupt for event CH1LIMITL</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH2LIMITH</name>
+ <description>Enable or disable interrupt for event CH2LIMITH</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH2LIMITL</name>
+ <description>Enable or disable interrupt for event CH2LIMITL</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH3LIMITH</name>
+ <description>Enable or disable interrupt for event CH3LIMITH</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH3LIMITL</name>
+ <description>Enable or disable interrupt for event CH3LIMITL</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH4LIMITH</name>
+ <description>Enable or disable interrupt for event CH4LIMITH</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH4LIMITL</name>
+ <description>Enable or disable interrupt for event CH4LIMITL</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH5LIMITH</name>
+ <description>Enable or disable interrupt for event CH5LIMITH</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH5LIMITL</name>
+ <description>Enable or disable interrupt for event CH5LIMITL</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH6LIMITH</name>
+ <description>Enable or disable interrupt for event CH6LIMITH</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH6LIMITL</name>
+ <description>Enable or disable interrupt for event CH6LIMITL</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH7LIMITH</name>
+ <description>Enable or disable interrupt for event CH7LIMITH</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH7LIMITL</name>
+ <description>Enable or disable interrupt for event CH7LIMITL</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STARTED</name>
+ <description>Write '1' to enable interrupt for event STARTED</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>END</name>
+ <description>Write '1' to enable interrupt for event END</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DONE</name>
+ <description>Write '1' to enable interrupt for event DONE</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RESULTDONE</name>
+ <description>Write '1' to enable interrupt for event RESULTDONE</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CALIBRATEDONE</name>
+ <description>Write '1' to enable interrupt for event CALIBRATEDONE</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to enable interrupt for event STOPPED</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH0LIMITH</name>
+ <description>Write '1' to enable interrupt for event CH0LIMITH</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH0LIMITL</name>
+ <description>Write '1' to enable interrupt for event CH0LIMITL</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH1LIMITH</name>
+ <description>Write '1' to enable interrupt for event CH1LIMITH</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH1LIMITL</name>
+ <description>Write '1' to enable interrupt for event CH1LIMITL</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH2LIMITH</name>
+ <description>Write '1' to enable interrupt for event CH2LIMITH</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH2LIMITL</name>
+ <description>Write '1' to enable interrupt for event CH2LIMITL</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH3LIMITH</name>
+ <description>Write '1' to enable interrupt for event CH3LIMITH</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH3LIMITL</name>
+ <description>Write '1' to enable interrupt for event CH3LIMITL</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH4LIMITH</name>
+ <description>Write '1' to enable interrupt for event CH4LIMITH</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH4LIMITL</name>
+ <description>Write '1' to enable interrupt for event CH4LIMITL</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH5LIMITH</name>
+ <description>Write '1' to enable interrupt for event CH5LIMITH</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH5LIMITL</name>
+ <description>Write '1' to enable interrupt for event CH5LIMITL</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH6LIMITH</name>
+ <description>Write '1' to enable interrupt for event CH6LIMITH</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH6LIMITL</name>
+ <description>Write '1' to enable interrupt for event CH6LIMITL</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH7LIMITH</name>
+ <description>Write '1' to enable interrupt for event CH7LIMITH</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH7LIMITL</name>
+ <description>Write '1' to enable interrupt for event CH7LIMITL</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STARTED</name>
+ <description>Write '1' to disable interrupt for event STARTED</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>END</name>
+ <description>Write '1' to disable interrupt for event END</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DONE</name>
+ <description>Write '1' to disable interrupt for event DONE</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RESULTDONE</name>
+ <description>Write '1' to disable interrupt for event RESULTDONE</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CALIBRATEDONE</name>
+ <description>Write '1' to disable interrupt for event CALIBRATEDONE</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to disable interrupt for event STOPPED</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH0LIMITH</name>
+ <description>Write '1' to disable interrupt for event CH0LIMITH</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH0LIMITL</name>
+ <description>Write '1' to disable interrupt for event CH0LIMITL</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH1LIMITH</name>
+ <description>Write '1' to disable interrupt for event CH1LIMITH</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH1LIMITL</name>
+ <description>Write '1' to disable interrupt for event CH1LIMITL</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH2LIMITH</name>
+ <description>Write '1' to disable interrupt for event CH2LIMITH</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH2LIMITL</name>
+ <description>Write '1' to disable interrupt for event CH2LIMITL</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH3LIMITH</name>
+ <description>Write '1' to disable interrupt for event CH3LIMITH</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH3LIMITL</name>
+ <description>Write '1' to disable interrupt for event CH3LIMITL</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH4LIMITH</name>
+ <description>Write '1' to disable interrupt for event CH4LIMITH</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH4LIMITL</name>
+ <description>Write '1' to disable interrupt for event CH4LIMITL</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH5LIMITH</name>
+ <description>Write '1' to disable interrupt for event CH5LIMITH</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH5LIMITL</name>
+ <description>Write '1' to disable interrupt for event CH5LIMITL</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH6LIMITH</name>
+ <description>Write '1' to disable interrupt for event CH6LIMITH</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH6LIMITL</name>
+ <description>Write '1' to disable interrupt for event CH6LIMITL</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH7LIMITH</name>
+ <description>Write '1' to disable interrupt for event CH7LIMITH</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH7LIMITL</name>
+ <description>Write '1' to disable interrupt for event CH7LIMITL</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>STATUS</name>
+ <description>Status</description>
+ <addressOffset>0x400</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>STATUS</name>
+ <description>Status</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Ready</name>
+ <description>SAADC is ready. No on-going conversions.</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Busy</name>
+ <description>SAADC is busy. Conversion in progress.</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>Enable or disable SAADC</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable SAADC</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable SAADC</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable SAADC</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <dim>8</dim>
+ <dimIncrement>0x010</dimIncrement>
+ <name>CH[%s]</name>
+ <description>Unspecified</description>
+ <headerStructName>SAADC_CH</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x510</addressOffset>
+ <register>
+ <name>PSELP</name>
+ <description>Description cluster: Input positive pin selection for CH[n]</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>PSELP</name>
+ <description>Analog positive input channel</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NC</name>
+ <description>Not connected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput0</name>
+ <description>AIN0</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput1</name>
+ <description>AIN1</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput2</name>
+ <description>AIN2</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput3</name>
+ <description>AIN3</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput4</name>
+ <description>AIN4</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput5</name>
+ <description>AIN5</description>
+ <value>6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput6</name>
+ <description>AIN6</description>
+ <value>7</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput7</name>
+ <description>AIN7</description>
+ <value>8</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>VDD</name>
+ <description>VDD</description>
+ <value>9</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>VDDHDIV5</name>
+ <description>VDDH/5</description>
+ <value>0x0D</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PSELN</name>
+ <description>Description cluster: Input negative pin selection for CH[n]</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>PSELN</name>
+ <description>Analog negative input, enables differential channel</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NC</name>
+ <description>Not connected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput0</name>
+ <description>AIN0</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput1</name>
+ <description>AIN1</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput2</name>
+ <description>AIN2</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput3</name>
+ <description>AIN3</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput4</name>
+ <description>AIN4</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput5</name>
+ <description>AIN5</description>
+ <value>6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput6</name>
+ <description>AIN6</description>
+ <value>7</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput7</name>
+ <description>AIN7</description>
+ <value>8</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>VDD</name>
+ <description>VDD</description>
+ <value>9</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>VDDHDIV5</name>
+ <description>VDDH/5</description>
+ <value>0x0D</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CONFIG</name>
+ <description>Description cluster: Input configuration for CH[n]</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00020000</resetValue>
+ <fields>
+ <field>
+ <name>RESP</name>
+ <description>Positive channel resistor control</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Bypass</name>
+ <description>Bypass resistor ladder</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Pulldown</name>
+ <description>Pull-down to GND</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Pullup</name>
+ <description>Pull-up to VDD</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>VDD1_2</name>
+ <description>Set input at VDD/2</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RESN</name>
+ <description>Negative channel resistor control</description>
+ <lsb>4</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Bypass</name>
+ <description>Bypass resistor ladder</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Pulldown</name>
+ <description>Pull-down to GND</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Pullup</name>
+ <description>Pull-up to VDD</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>VDD1_2</name>
+ <description>Set input at VDD/2</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>GAIN</name>
+ <description>Gain control</description>
+ <lsb>8</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Gain1_6</name>
+ <description>1/6</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Gain1_5</name>
+ <description>1/5</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Gain1_4</name>
+ <description>1/4</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Gain1_3</name>
+ <description>1/3</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Gain1_2</name>
+ <description>1/2</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Gain1</name>
+ <description>1</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Gain2</name>
+ <description>2</description>
+ <value>6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Gain4</name>
+ <description>4</description>
+ <value>7</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REFSEL</name>
+ <description>Reference control</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Internal</name>
+ <description>Internal reference (0.6 V)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>VDD1_4</name>
+ <description>VDD/4 as reference</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TACQ</name>
+ <description>Acquisition time, the time the SAADC uses to sample the input voltage</description>
+ <lsb>16</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>3us</name>
+ <description>3 us</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>5us</name>
+ <description>5 us</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>10us</name>
+ <description>10 us</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>15us</name>
+ <description>15 us</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>20us</name>
+ <description>20 us</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>40us</name>
+ <description>40 us</description>
+ <value>5</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>MODE</name>
+ <description>Enable differential mode</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>SE</name>
+ <description>Single-ended, PSELN will be ignored, negative input to SAADC shorted to GND</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Diff</name>
+ <description>Differential</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>BURST</name>
+ <description>Enable burst mode</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Burst mode is disabled (normal operation)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Burst mode is enabled. SAADC takes 2^OVERSAMPLE number of samples as fast as it can, and sends the average to Data RAM.</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LIMIT</name>
+ <description>Description cluster: High/low limits for event monitoring of a channel</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x7FFF8000</resetValue>
+ <fields>
+ <field>
+ <name>LOW</name>
+ <description>Low level limit</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ </field>
+ <field>
+ <name>HIGH</name>
+ <description>High level limit</description>
+ <lsb>16</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>RESOLUTION</name>
+ <description>Resolution configuration</description>
+ <addressOffset>0x5F0</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>VAL</name>
+ <description>Set the resolution</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>8bit</name>
+ <description>8 bits</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>10bit</name>
+ <description>10 bits</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>12bit</name>
+ <description>12 bits</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>14bit</name>
+ <description>14 bits</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>OVERSAMPLE</name>
+ <description>Oversampling configuration. The RESOLUTION is applied before averaging, thus for high OVERSAMPLE a higher RESOLUTION should be used.</description>
+ <addressOffset>0x5F4</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>OVERSAMPLE</name>
+ <description>Oversample control</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Bypass</name>
+ <description>Bypass oversampling</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Over2x</name>
+ <description>Oversample 2x</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Over4x</name>
+ <description>Oversample 4x</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Over8x</name>
+ <description>Oversample 8x</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Over16x</name>
+ <description>Oversample 16x</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Over32x</name>
+ <description>Oversample 32x</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Over64x</name>
+ <description>Oversample 64x</description>
+ <value>6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Over128x</name>
+ <description>Oversample 128x</description>
+ <value>7</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Over256x</name>
+ <description>Oversample 256x</description>
+ <value>8</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SAMPLERATE</name>
+ <description>Controls normal or continuous sample rate</description>
+ <addressOffset>0x5F8</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CC</name>
+ <description>Capture and compare value. Sample rate is 16 MHz/CC</description>
+ <lsb>0</lsb>
+ <msb>10</msb>
+ </field>
+ <field>
+ <name>MODE</name>
+ <description>Select mode for sample rate control</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Task</name>
+ <description>Rate is controlled from SAMPLE task</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Timers</name>
+ <description>Rate is controlled from local timer (use CC to control the rate)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>RESULT</name>
+ <description>RESULT EasyDMA channel</description>
+ <headerStructName>SAADC_RESULT</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x62C</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Maximum number of 16-bit samples to be written to output RAM buffer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of 16-bit samples to be written to output RAM buffer</description>
+ <lsb>0</lsb>
+ <msb>14</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Number of 16-bit samples written to output RAM buffer since the previous START task</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of 16-bit samples written to output RAM buffer since the previous START task. This register can be read after an END or STOPPED event.</description>
+ <lsb>0</lsb>
+ <msb>14</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>TIMER0</name>
+ <description>Timer/Counter 0</description>
+ <baseAddress>0x40008000</baseAddress>
+ <headerStructName>TIMER</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>TIMER0</name>
+ <value>8</value>
+ </interrupt>
+ <groupName>TIMER</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_START</name>
+ <description>Start Timer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_START</name>
+ <description>Start Timer</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stop Timer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stop Timer</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_COUNT</name>
+ <description>Increment Timer (Counter mode only)</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_COUNT</name>
+ <description>Increment Timer (Counter mode only)</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_CLEAR</name>
+ <description>Clear time</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CLEAR</name>
+ <description>Clear time</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_SHUTDOWN</name>
+ <description>Deprecated register - Shut down timer</description>
+ <addressOffset>0x010</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_SHUTDOWN</name>
+ <description>Deprecated field - Shut down timer</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x6</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>TASKS_CAPTURE[%s]</name>
+ <description>Description collection: Capture Timer value to CC[n] register</description>
+ <addressOffset>0x040</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CAPTURE</name>
+ <description>Capture Timer value to CC[n] register</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x6</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>EVENTS_COMPARE[%s]</name>
+ <description>Description collection: Compare event on CC[n] match</description>
+ <addressOffset>0x140</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_COMPARE</name>
+ <description>Compare event on CC[n] match</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>COMPARE0_CLEAR</name>
+ <description>Shortcut between event COMPARE[0] and task CLEAR</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE1_CLEAR</name>
+ <description>Shortcut between event COMPARE[1] and task CLEAR</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE2_CLEAR</name>
+ <description>Shortcut between event COMPARE[2] and task CLEAR</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE3_CLEAR</name>
+ <description>Shortcut between event COMPARE[3] and task CLEAR</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE4_CLEAR</name>
+ <description>Shortcut between event COMPARE[4] and task CLEAR</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE5_CLEAR</name>
+ <description>Shortcut between event COMPARE[5] and task CLEAR</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE0_STOP</name>
+ <description>Shortcut between event COMPARE[0] and task STOP</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE1_STOP</name>
+ <description>Shortcut between event COMPARE[1] and task STOP</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE2_STOP</name>
+ <description>Shortcut between event COMPARE[2] and task STOP</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE3_STOP</name>
+ <description>Shortcut between event COMPARE[3] and task STOP</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE4_STOP</name>
+ <description>Shortcut between event COMPARE[4] and task STOP</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE5_STOP</name>
+ <description>Shortcut between event COMPARE[5] and task STOP</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>COMPARE0</name>
+ <description>Write '1' to enable interrupt for event COMPARE[0]</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE1</name>
+ <description>Write '1' to enable interrupt for event COMPARE[1]</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE2</name>
+ <description>Write '1' to enable interrupt for event COMPARE[2]</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE3</name>
+ <description>Write '1' to enable interrupt for event COMPARE[3]</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE4</name>
+ <description>Write '1' to enable interrupt for event COMPARE[4]</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE5</name>
+ <description>Write '1' to enable interrupt for event COMPARE[5]</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>COMPARE0</name>
+ <description>Write '1' to disable interrupt for event COMPARE[0]</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE1</name>
+ <description>Write '1' to disable interrupt for event COMPARE[1]</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE2</name>
+ <description>Write '1' to disable interrupt for event COMPARE[2]</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE3</name>
+ <description>Write '1' to disable interrupt for event COMPARE[3]</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE4</name>
+ <description>Write '1' to disable interrupt for event COMPARE[4]</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE5</name>
+ <description>Write '1' to disable interrupt for event COMPARE[5]</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MODE</name>
+ <description>Timer mode selection</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MODE</name>
+ <description>Timer mode</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Timer</name>
+ <description>Select Timer mode</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Counter</name>
+ <description>Deprecated enumerator - Select Counter mode</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>LowPowerCounter</name>
+ <description>Select Low Power Counter mode</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>BITMODE</name>
+ <description>Configure the number of bits used by the TIMER</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>BITMODE</name>
+ <description>Timer bit width</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>16Bit</name>
+ <description>16 bit timer bit width</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>08Bit</name>
+ <description>8 bit timer bit width</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>24Bit</name>
+ <description>24 bit timer bit width</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>32Bit</name>
+ <description>32 bit timer bit width</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PRESCALER</name>
+ <description>Timer prescaler register</description>
+ <addressOffset>0x510</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000004</resetValue>
+ <fields>
+ <field>
+ <name>PRESCALER</name>
+ <description>Prescaler value</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x6</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>CC[%s]</name>
+ <description>Description collection: Capture/Compare register n</description>
+ <addressOffset>0x540</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CC</name>
+ <description>Capture/Compare value</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral derivedFrom="TIMER0">
+ <name>TIMER1</name>
+ <description>Timer/Counter 1</description>
+ <baseAddress>0x40009000</baseAddress>
+ <interrupt>
+ <name>TIMER1</name>
+ <value>9</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="TIMER0">
+ <name>TIMER2</name>
+ <description>Timer/Counter 2</description>
+ <baseAddress>0x4000A000</baseAddress>
+ <interrupt>
+ <name>TIMER2</name>
+ <value>10</value>
+ </interrupt>
+ </peripheral>
+ <peripheral>
+ <name>RTC0</name>
+ <description>Real time counter 0</description>
+ <baseAddress>0x4000B000</baseAddress>
+ <headerStructName>RTC</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>RTC0</name>
+ <value>11</value>
+ </interrupt>
+ <groupName>RTC</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_START</name>
+ <description>Start RTC COUNTER</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_START</name>
+ <description>Start RTC COUNTER</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stop RTC COUNTER</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stop RTC COUNTER</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_CLEAR</name>
+ <description>Clear RTC COUNTER</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CLEAR</name>
+ <description>Clear RTC COUNTER</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_TRIGOVRFLW</name>
+ <description>Set COUNTER to 0xFFFFF0</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_TRIGOVRFLW</name>
+ <description>Set COUNTER to 0xFFFFF0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_TICK</name>
+ <description>Event on COUNTER increment</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TICK</name>
+ <description>Event on COUNTER increment</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_OVRFLW</name>
+ <description>Event on COUNTER overflow</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_OVRFLW</name>
+ <description>Event on COUNTER overflow</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x4</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>EVENTS_COMPARE[%s]</name>
+ <description>Description collection: Compare event on CC[n] match</description>
+ <addressOffset>0x140</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_COMPARE</name>
+ <description>Compare event on CC[n] match</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TICK</name>
+ <description>Write '1' to enable interrupt for event TICK</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OVRFLW</name>
+ <description>Write '1' to enable interrupt for event OVRFLW</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE0</name>
+ <description>Write '1' to enable interrupt for event COMPARE[0]</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE1</name>
+ <description>Write '1' to enable interrupt for event COMPARE[1]</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE2</name>
+ <description>Write '1' to enable interrupt for event COMPARE[2]</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE3</name>
+ <description>Write '1' to enable interrupt for event COMPARE[3]</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TICK</name>
+ <description>Write '1' to disable interrupt for event TICK</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OVRFLW</name>
+ <description>Write '1' to disable interrupt for event OVRFLW</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE0</name>
+ <description>Write '1' to disable interrupt for event COMPARE[0]</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE1</name>
+ <description>Write '1' to disable interrupt for event COMPARE[1]</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE2</name>
+ <description>Write '1' to disable interrupt for event COMPARE[2]</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE3</name>
+ <description>Write '1' to disable interrupt for event COMPARE[3]</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVTEN</name>
+ <description>Enable or disable event routing</description>
+ <addressOffset>0x340</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TICK</name>
+ <description>Enable or disable event routing for event TICK</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OVRFLW</name>
+ <description>Enable or disable event routing for event OVRFLW</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE0</name>
+ <description>Enable or disable event routing for event COMPARE[0]</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE1</name>
+ <description>Enable or disable event routing for event COMPARE[1]</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE2</name>
+ <description>Enable or disable event routing for event COMPARE[2]</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE3</name>
+ <description>Enable or disable event routing for event COMPARE[3]</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVTENSET</name>
+ <description>Enable event routing</description>
+ <addressOffset>0x344</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TICK</name>
+ <description>Write '1' to enable event routing for event TICK</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OVRFLW</name>
+ <description>Write '1' to enable event routing for event OVRFLW</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE0</name>
+ <description>Write '1' to enable event routing for event COMPARE[0]</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE1</name>
+ <description>Write '1' to enable event routing for event COMPARE[1]</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE2</name>
+ <description>Write '1' to enable event routing for event COMPARE[2]</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE3</name>
+ <description>Write '1' to enable event routing for event COMPARE[3]</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVTENCLR</name>
+ <description>Disable event routing</description>
+ <addressOffset>0x348</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TICK</name>
+ <description>Write '1' to disable event routing for event TICK</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OVRFLW</name>
+ <description>Write '1' to disable event routing for event OVRFLW</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE0</name>
+ <description>Write '1' to disable event routing for event COMPARE[0]</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE1</name>
+ <description>Write '1' to disable event routing for event COMPARE[1]</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE2</name>
+ <description>Write '1' to disable event routing for event COMPARE[2]</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>COMPARE3</name>
+ <description>Write '1' to disable event routing for event COMPARE[3]</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>COUNTER</name>
+ <description>Current COUNTER value</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>COUNTER</name>
+ <description>Counter value</description>
+ <lsb>0</lsb>
+ <msb>23</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PRESCALER</name>
+ <description>12 bit prescaler for COUNTER frequency (32768/(PRESCALER+1)).Must be written when RTC is stopped</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PRESCALER</name>
+ <description>Prescaler value</description>
+ <lsb>0</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x4</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>CC[%s]</name>
+ <description>Description collection: Compare register n</description>
+ <addressOffset>0x540</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>COMPARE</name>
+ <description>Compare value</description>
+ <lsb>0</lsb>
+ <msb>23</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>TEMP</name>
+ <description>Temperature Sensor</description>
+ <baseAddress>0x4000C000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>TEMP</name>
+ <value>12</value>
+ </interrupt>
+ <groupName>TEMP</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_START</name>
+ <description>Start temperature measurement</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_START</name>
+ <description>Start temperature measurement</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stop temperature measurement</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stop temperature measurement</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_DATARDY</name>
+ <description>Temperature measurement complete, data ready</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_DATARDY</name>
+ <description>Temperature measurement complete, data ready</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>DATARDY</name>
+ <description>Write '1' to enable interrupt for event DATARDY</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>DATARDY</name>
+ <description>Write '1' to disable interrupt for event DATARDY</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TEMP</name>
+ <description>Temperature in degC (0.25deg steps)</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-only</access>
+ <dataType>int32_t</dataType>
+ <fields>
+ <field>
+ <name>TEMP</name>
+ <description>Temperature in degC (0.25deg steps)</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>A0</name>
+ <description>Slope of 1st piece wise linear function</description>
+ <addressOffset>0x520</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000326</resetValue>
+ <fields>
+ <field>
+ <name>A0</name>
+ <description>Slope of 1st piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>A1</name>
+ <description>Slope of 2nd piece wise linear function</description>
+ <addressOffset>0x524</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000348</resetValue>
+ <fields>
+ <field>
+ <name>A1</name>
+ <description>Slope of 2nd piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>A2</name>
+ <description>Slope of 3rd piece wise linear function</description>
+ <addressOffset>0x528</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x000003AA</resetValue>
+ <fields>
+ <field>
+ <name>A2</name>
+ <description>Slope of 3rd piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>A3</name>
+ <description>Slope of 4th piece wise linear function</description>
+ <addressOffset>0x52C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x0000040E</resetValue>
+ <fields>
+ <field>
+ <name>A3</name>
+ <description>Slope of 4th piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>A4</name>
+ <description>Slope of 5th piece wise linear function</description>
+ <addressOffset>0x530</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x000004BD</resetValue>
+ <fields>
+ <field>
+ <name>A4</name>
+ <description>Slope of 5th piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>A5</name>
+ <description>Slope of 6th piece wise linear function</description>
+ <addressOffset>0x534</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x000005A3</resetValue>
+ <fields>
+ <field>
+ <name>A5</name>
+ <description>Slope of 6th piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>11</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>B0</name>
+ <description>y-intercept of 1st piece wise linear function</description>
+ <addressOffset>0x540</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00003FEF</resetValue>
+ <fields>
+ <field>
+ <name>B0</name>
+ <description>y-intercept of 1st piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>B1</name>
+ <description>y-intercept of 2nd piece wise linear function</description>
+ <addressOffset>0x544</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00003FBE</resetValue>
+ <fields>
+ <field>
+ <name>B1</name>
+ <description>y-intercept of 2nd piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>B2</name>
+ <description>y-intercept of 3rd piece wise linear function</description>
+ <addressOffset>0x548</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00003FBE</resetValue>
+ <fields>
+ <field>
+ <name>B2</name>
+ <description>y-intercept of 3rd piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>B3</name>
+ <description>y-intercept of 4th piece wise linear function</description>
+ <addressOffset>0x54C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000012</resetValue>
+ <fields>
+ <field>
+ <name>B3</name>
+ <description>y-intercept of 4th piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>B4</name>
+ <description>y-intercept of 5th piece wise linear function</description>
+ <addressOffset>0x550</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000124</resetValue>
+ <fields>
+ <field>
+ <name>B4</name>
+ <description>y-intercept of 5th piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>B5</name>
+ <description>y-intercept of 6th piece wise linear function</description>
+ <addressOffset>0x554</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x0000027C</resetValue>
+ <fields>
+ <field>
+ <name>B5</name>
+ <description>y-intercept of 6th piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>T0</name>
+ <description>End point of 1st piece wise linear function</description>
+ <addressOffset>0x560</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x000000E2</resetValue>
+ <fields>
+ <field>
+ <name>T0</name>
+ <description>End point of 1st piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>T1</name>
+ <description>End point of 2nd piece wise linear function</description>
+ <addressOffset>0x564</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>T1</name>
+ <description>End point of 2nd piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>T2</name>
+ <description>End point of 3rd piece wise linear function</description>
+ <addressOffset>0x568</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000019</resetValue>
+ <fields>
+ <field>
+ <name>T2</name>
+ <description>End point of 3rd piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>T3</name>
+ <description>End point of 4th piece wise linear function</description>
+ <addressOffset>0x56C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x0000003C</resetValue>
+ <fields>
+ <field>
+ <name>T3</name>
+ <description>End point of 4th piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>T4</name>
+ <description>End point of 5th piece wise linear function</description>
+ <addressOffset>0x570</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000050</resetValue>
+ <fields>
+ <field>
+ <name>T4</name>
+ <description>End point of 5th piece wise linear function</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>RNG</name>
+ <description>Random Number Generator</description>
+ <baseAddress>0x4000D000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>RNG</name>
+ <value>13</value>
+ </interrupt>
+ <groupName>RNG</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_START</name>
+ <description>Task starting the random number generator</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_START</name>
+ <description>Task starting the random number generator</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Task stopping the random number generator</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Task stopping the random number generator</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_VALRDY</name>
+ <description>Event being generated for every new random number written to the VALUE register</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_VALRDY</name>
+ <description>Event being generated for every new random number written to the VALUE register</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>VALRDY_STOP</name>
+ <description>Shortcut between event VALRDY and task STOP</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>VALRDY</name>
+ <description>Write '1' to enable interrupt for event VALRDY</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>VALRDY</name>
+ <description>Write '1' to disable interrupt for event VALRDY</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CONFIG</name>
+ <description>Configuration register</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>DERCEN</name>
+ <description>Bias correction</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>VALUE</name>
+ <description>Output random number</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>VALUE</name>
+ <description>Generated random number</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>ECB</name>
+ <description>AES ECB Mode Encryption</description>
+ <baseAddress>0x4000E000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>ECB</name>
+ <value>14</value>
+ </interrupt>
+ <groupName>ECB</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_STARTECB</name>
+ <description>Start ECB block encrypt</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STARTECB</name>
+ <description>Start ECB block encrypt</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOPECB</name>
+ <description>Abort a possible executing ECB operation</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOPECB</name>
+ <description>Abort a possible executing ECB operation</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ENDECB</name>
+ <description>ECB block encrypt complete</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ENDECB</name>
+ <description>ECB block encrypt complete</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ERRORECB</name>
+ <description>ECB block encrypt aborted because of a STOPECB task or due to an error</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ERRORECB</name>
+ <description>ECB block encrypt aborted because of a STOPECB task or due to an error</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENDECB</name>
+ <description>Write '1' to enable interrupt for event ENDECB</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERRORECB</name>
+ <description>Write '1' to enable interrupt for event ERRORECB</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENDECB</name>
+ <description>Write '1' to disable interrupt for event ENDECB</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERRORECB</name>
+ <description>Write '1' to disable interrupt for event ERRORECB</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ECBDATAPTR</name>
+ <description>ECB block encrypt memory pointers</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ECBDATAPTR</name>
+ <description>Pointer to the ECB data structure (see Table 1 ECB data structure overview)</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>AAR</name>
+ <description>Accelerated Address Resolver</description>
+ <baseAddress>0x4000F000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>CCM_AAR</name>
+ <value>15</value>
+ </interrupt>
+ <groupName>AAR</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_START</name>
+ <description>Start resolving addresses based on IRKs specified in the IRK data structure</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_START</name>
+ <description>Start resolving addresses based on IRKs specified in the IRK data structure</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stop resolving addresses</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stop resolving addresses</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_END</name>
+ <description>Address resolution procedure complete</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_END</name>
+ <description>Address resolution procedure complete</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RESOLVED</name>
+ <description>Address resolved</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RESOLVED</name>
+ <description>Address resolved</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_NOTRESOLVED</name>
+ <description>Address not resolved</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_NOTRESOLVED</name>
+ <description>Address not resolved</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>END</name>
+ <description>Write '1' to enable interrupt for event END</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RESOLVED</name>
+ <description>Write '1' to enable interrupt for event RESOLVED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>NOTRESOLVED</name>
+ <description>Write '1' to enable interrupt for event NOTRESOLVED</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>END</name>
+ <description>Write '1' to disable interrupt for event END</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RESOLVED</name>
+ <description>Write '1' to disable interrupt for event RESOLVED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>NOTRESOLVED</name>
+ <description>Write '1' to disable interrupt for event NOTRESOLVED</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>STATUS</name>
+ <description>Resolution status</description>
+ <addressOffset>0x400</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>STATUS</name>
+ <description>The IRK that was used last time an address was resolved</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>Enable AAR</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable AAR</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>NIRK</name>
+ <description>Number of IRKs</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>NIRK</name>
+ <description>Number of Identity root keys available in the IRK data structure</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>IRKPTR</name>
+ <description>Pointer to IRK data structure</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>IRKPTR</name>
+ <description>Pointer to the IRK data structure</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ADDRPTR</name>
+ <description>Pointer to the resolvable address</description>
+ <addressOffset>0x510</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ADDRPTR</name>
+ <description>Pointer to the resolvable address (6-bytes)</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SCRATCHPTR</name>
+ <description>Pointer to data area used for temporary storage</description>
+ <addressOffset>0x514</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>SCRATCHPTR</name>
+ <description>Pointer to a scratch data area used for temporary storage during resolution. A space of minimum 3 bytes must be reserved.</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>CCM</name>
+ <description>AES CCM Mode Encryption</description>
+ <baseAddress>0x4000F000</baseAddress>
+ <alternatePeripheral>AAR</alternatePeripheral>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>CCM_AAR</name>
+ <value>15</value>
+ </interrupt>
+ <groupName>CCM</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_KSGEN</name>
+ <description>Start generation of key-stream. This operation will stop by itself when completed.</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_KSGEN</name>
+ <description>Start generation of key-stream. This operation will stop by itself when completed.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_CRYPT</name>
+ <description>Start encryption/decryption. This operation will stop by itself when completed.</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CRYPT</name>
+ <description>Start encryption/decryption. This operation will stop by itself when completed.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stop encryption/decryption</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stop encryption/decryption</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_RATEOVERRIDE</name>
+ <description>Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE register for any ongoing encryption/decryption</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_RATEOVERRIDE</name>
+ <description>Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE register for any ongoing encryption/decryption</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ENDKSGEN</name>
+ <description>Key-stream generation complete</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ENDKSGEN</name>
+ <description>Key-stream generation complete</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ENDCRYPT</name>
+ <description>Encrypt/decrypt complete</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ENDCRYPT</name>
+ <description>Encrypt/decrypt complete</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ERROR</name>
+ <description>Deprecated register - CCM error event</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ERROR</name>
+ <description>Deprecated field - CCM error event</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENDKSGEN_CRYPT</name>
+ <description>Shortcut between event ENDKSGEN and task CRYPT</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENDKSGEN</name>
+ <description>Write '1' to enable interrupt for event ENDKSGEN</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDCRYPT</name>
+ <description>Write '1' to enable interrupt for event ENDCRYPT</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Deprecated intsetfield - Write '1' to enable interrupt for event ERROR</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENDKSGEN</name>
+ <description>Write '1' to disable interrupt for event ENDKSGEN</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDCRYPT</name>
+ <description>Write '1' to disable interrupt for event ENDCRYPT</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ERROR</name>
+ <description>Deprecated intclrfield - Write '1' to disable interrupt for event ERROR</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MICSTATUS</name>
+ <description>MIC check result</description>
+ <addressOffset>0x400</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>MICSTATUS</name>
+ <description>The result of the MIC check performed during the previous decryption operation</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>CheckFailed</name>
+ <description>MIC check failed</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>CheckPassed</name>
+ <description>MIC check passed</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>Enable</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable CCM</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MODE</name>
+ <description>Operation mode</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>MODE</name>
+ <description>The mode of operation to be used. The settings in this register apply whenever either the KSGEN or CRYPT tasks are triggered.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Encryption</name>
+ <description>AES CCM packet encryption mode</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Decryption</name>
+ <description>AES CCM packet decryption mode</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DATARATE</name>
+ <description>Radio data rate that the CCM shall run synchronous with</description>
+ <lsb>16</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>1Mbit</name>
+ <description>1 Mbps</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>2Mbit</name>
+ <description>2 Mbps</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>125Kbps</name>
+ <description>125 Kbps</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>500Kbps</name>
+ <description>500 Kbps</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LENGTH</name>
+ <description>Packet length configuration</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Default</name>
+ <description>Default length. Effective length of LENGTH field in encrypted/decrypted packet is 5 bits. A key-stream for packet payloads up to 27 bytes will be generated.</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Extended</name>
+ <description>Extended length. Effective length of LENGTH field in encrypted/decrypted packet is 8 bits. A key-stream for packet payloads up to MAXPACKETSIZE bytes will be generated.</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CNFPTR</name>
+ <description>Pointer to data structure holding AES key and NONCE vector</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CNFPTR</name>
+ <description>Pointer to the data structure holding the AES key and the CCM NONCE vector (see Table 1 CCM data structure overview)</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INPTR</name>
+ <description>Input pointer</description>
+ <addressOffset>0x50C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>INPTR</name>
+ <description>Input pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>OUTPTR</name>
+ <description>Output pointer</description>
+ <addressOffset>0x510</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>OUTPTR</name>
+ <description>Output pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SCRATCHPTR</name>
+ <description>Pointer to data area used for temporary storage</description>
+ <addressOffset>0x514</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>SCRATCHPTR</name>
+ <description>Pointer to a scratch data area used for temporary storage during key-stream generation,
+ MIC generation and encryption/decryption.</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXPACKETSIZE</name>
+ <description>Length of key-stream generated when MODE.LENGTH = Extended.</description>
+ <addressOffset>0x518</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x000000FB</resetValue>
+ <fields>
+ <field>
+ <name>MAXPACKETSIZE</name>
+ <description>Length of key-stream generated when MODE.LENGTH = Extended. This value must be greater or equal to the subsequent packet payload to be encrypted/decrypted.</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RATEOVERRIDE</name>
+ <description>Data rate override setting.</description>
+ <addressOffset>0x51C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>RATEOVERRIDE</name>
+ <description>Data rate override setting.</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>1Mbit</name>
+ <description>1 Mbps</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>2Mbit</name>
+ <description>2 Mbps</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>125Kbps</name>
+ <description>125 Kbps</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>500Kbps</name>
+ <description>500 Kbps</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>WDT</name>
+ <description>Watchdog Timer</description>
+ <baseAddress>0x40010000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>WDT</name>
+ <value>16</value>
+ </interrupt>
+ <groupName>WDT</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_START</name>
+ <description>Start the watchdog</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_START</name>
+ <description>Start the watchdog</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_TIMEOUT</name>
+ <description>Watchdog timeout</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TIMEOUT</name>
+ <description>Watchdog timeout</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TIMEOUT</name>
+ <description>Write '1' to enable interrupt for event TIMEOUT</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TIMEOUT</name>
+ <description>Write '1' to disable interrupt for event TIMEOUT</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RUNSTATUS</name>
+ <description>Run status</description>
+ <addressOffset>0x400</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>RUNSTATUS</name>
+ <description>Indicates whether or not the watchdog is running</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotRunning</name>
+ <description>Watchdog not running</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Running</name>
+ <description>Watchdog is running</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>REQSTATUS</name>
+ <description>Request status</description>
+ <addressOffset>0x404</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>RR0</name>
+ <description>Request status for RR[0] register</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>DisabledOrRequested</name>
+ <description>RR[0] register is not enabled, or are already requesting reload</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>EnabledAndUnrequested</name>
+ <description>RR[0] register is enabled, and are not yet requesting reload</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR1</name>
+ <description>Request status for RR[1] register</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>DisabledOrRequested</name>
+ <description>RR[1] register is not enabled, or are already requesting reload</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>EnabledAndUnrequested</name>
+ <description>RR[1] register is enabled, and are not yet requesting reload</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR2</name>
+ <description>Request status for RR[2] register</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>DisabledOrRequested</name>
+ <description>RR[2] register is not enabled, or are already requesting reload</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>EnabledAndUnrequested</name>
+ <description>RR[2] register is enabled, and are not yet requesting reload</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR3</name>
+ <description>Request status for RR[3] register</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>DisabledOrRequested</name>
+ <description>RR[3] register is not enabled, or are already requesting reload</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>EnabledAndUnrequested</name>
+ <description>RR[3] register is enabled, and are not yet requesting reload</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR4</name>
+ <description>Request status for RR[4] register</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>DisabledOrRequested</name>
+ <description>RR[4] register is not enabled, or are already requesting reload</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>EnabledAndUnrequested</name>
+ <description>RR[4] register is enabled, and are not yet requesting reload</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR5</name>
+ <description>Request status for RR[5] register</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>DisabledOrRequested</name>
+ <description>RR[5] register is not enabled, or are already requesting reload</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>EnabledAndUnrequested</name>
+ <description>RR[5] register is enabled, and are not yet requesting reload</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR6</name>
+ <description>Request status for RR[6] register</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>DisabledOrRequested</name>
+ <description>RR[6] register is not enabled, or are already requesting reload</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>EnabledAndUnrequested</name>
+ <description>RR[6] register is enabled, and are not yet requesting reload</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR7</name>
+ <description>Request status for RR[7] register</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>DisabledOrRequested</name>
+ <description>RR[7] register is not enabled, or are already requesting reload</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>EnabledAndUnrequested</name>
+ <description>RR[7] register is enabled, and are not yet requesting reload</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CRV</name>
+ <description>Counter reload value</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>CRV</name>
+ <description>Counter reload value in number of cycles of the 32.768 kHz clock</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RREN</name>
+ <description>Enable register for reload request registers</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>RR0</name>
+ <description>Enable or disable RR[0] register</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable RR[0] register</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable RR[0] register</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR1</name>
+ <description>Enable or disable RR[1] register</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable RR[1] register</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable RR[1] register</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR2</name>
+ <description>Enable or disable RR[2] register</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable RR[2] register</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable RR[2] register</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR3</name>
+ <description>Enable or disable RR[3] register</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable RR[3] register</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable RR[3] register</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR4</name>
+ <description>Enable or disable RR[4] register</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable RR[4] register</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable RR[4] register</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR5</name>
+ <description>Enable or disable RR[5] register</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable RR[5] register</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable RR[5] register</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR6</name>
+ <description>Enable or disable RR[6] register</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable RR[6] register</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable RR[6] register</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RR7</name>
+ <description>Enable or disable RR[7] register</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable RR[7] register</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable RR[7] register</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CONFIG</name>
+ <description>Configuration register</description>
+ <addressOffset>0x50C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>SLEEP</name>
+ <description>Configure the watchdog to either be paused, or kept running, while the CPU is sleeping</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Pause</name>
+ <description>Pause watchdog while the CPU is sleeping</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Run</name>
+ <description>Keep the watchdog running while the CPU is sleeping</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>HALT</name>
+ <description>Configure the watchdog to either be paused, or kept running, while the CPU is halted by the debugger</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Pause</name>
+ <description>Pause watchdog while the CPU is halted by the debugger</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Run</name>
+ <description>Keep the watchdog running while the CPU is halted by the debugger</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>RR[%s]</name>
+ <description>Description collection: Reload request n</description>
+ <addressOffset>0x600</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>RR</name>
+ <description>Reload request register</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Reload</name>
+ <description>Value to request a reload of the watchdog timer</description>
+ <value>0x6E524635</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral derivedFrom="RTC0">
+ <name>RTC1</name>
+ <description>Real time counter 1</description>
+ <baseAddress>0x40011000</baseAddress>
+ <interrupt>
+ <name>RTC1</name>
+ <value>17</value>
+ </interrupt>
+ </peripheral>
+ <peripheral>
+ <name>QDEC</name>
+ <description>Quadrature Decoder</description>
+ <baseAddress>0x40012000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>QDEC</name>
+ <value>18</value>
+ </interrupt>
+ <groupName>QDEC</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_START</name>
+ <description>Task starting the quadrature decoder</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_START</name>
+ <description>Task starting the quadrature decoder</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Task stopping the quadrature decoder</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Task stopping the quadrature decoder</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_READCLRACC</name>
+ <description>Read and clear ACC and ACCDBL</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_READCLRACC</name>
+ <description>Read and clear ACC and ACCDBL</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_RDCLRACC</name>
+ <description>Read and clear ACC</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_RDCLRACC</name>
+ <description>Read and clear ACC</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_RDCLRDBL</name>
+ <description>Read and clear ACCDBL</description>
+ <addressOffset>0x010</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_RDCLRDBL</name>
+ <description>Read and clear ACCDBL</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_SAMPLERDY</name>
+ <description>Event being generated for every new sample value written to the SAMPLE register</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_SAMPLERDY</name>
+ <description>Event being generated for every new sample value written to the SAMPLE register</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_REPORTRDY</name>
+ <description>Non-null report ready</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_REPORTRDY</name>
+ <description>Non-null report ready</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ACCOF</name>
+ <description>ACC or ACCDBL register overflow</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ACCOF</name>
+ <description>ACC or ACCDBL register overflow</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_DBLRDY</name>
+ <description>Double displacement(s) detected</description>
+ <addressOffset>0x10C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_DBLRDY</name>
+ <description>Double displacement(s) detected</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_STOPPED</name>
+ <description>QDEC has been stopped</description>
+ <addressOffset>0x110</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_STOPPED</name>
+ <description>QDEC has been stopped</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>REPORTRDY_READCLRACC</name>
+ <description>Shortcut between event REPORTRDY and task READCLRACC</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SAMPLERDY_STOP</name>
+ <description>Shortcut between event SAMPLERDY and task STOP</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REPORTRDY_RDCLRACC</name>
+ <description>Shortcut between event REPORTRDY and task RDCLRACC</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REPORTRDY_STOP</name>
+ <description>Shortcut between event REPORTRDY and task STOP</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DBLRDY_RDCLRDBL</name>
+ <description>Shortcut between event DBLRDY and task RDCLRDBL</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DBLRDY_STOP</name>
+ <description>Shortcut between event DBLRDY and task STOP</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SAMPLERDY_READCLRACC</name>
+ <description>Shortcut between event SAMPLERDY and task READCLRACC</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>SAMPLERDY</name>
+ <description>Write '1' to enable interrupt for event SAMPLERDY</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REPORTRDY</name>
+ <description>Write '1' to enable interrupt for event REPORTRDY</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ACCOF</name>
+ <description>Write '1' to enable interrupt for event ACCOF</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DBLRDY</name>
+ <description>Write '1' to enable interrupt for event DBLRDY</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to enable interrupt for event STOPPED</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>SAMPLERDY</name>
+ <description>Write '1' to disable interrupt for event SAMPLERDY</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REPORTRDY</name>
+ <description>Write '1' to disable interrupt for event REPORTRDY</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ACCOF</name>
+ <description>Write '1' to disable interrupt for event ACCOF</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DBLRDY</name>
+ <description>Write '1' to disable interrupt for event DBLRDY</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to disable interrupt for event STOPPED</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>Enable the quadrature decoder</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable the quadrature decoder</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LEDPOL</name>
+ <description>LED output pin polarity</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LEDPOL</name>
+ <description>LED output pin polarity</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>ActiveLow</name>
+ <description>Led active on output pin low</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ActiveHigh</name>
+ <description>Led active on output pin high</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SAMPLEPER</name>
+ <description>Sample period</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>SAMPLEPER</name>
+ <description>Sample period. The SAMPLE register will be updated for every new sample</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>128us</name>
+ <description>128 us</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>256us</name>
+ <description>256 us</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>512us</name>
+ <description>512 us</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>1024us</name>
+ <description>1024 us</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>2048us</name>
+ <description>2048 us</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>4096us</name>
+ <description>4096 us</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>8192us</name>
+ <description>8192 us</description>
+ <value>6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>16384us</name>
+ <description>16384 us</description>
+ <value>7</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>32ms</name>
+ <description>32768 us</description>
+ <value>8</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>65ms</name>
+ <description>65536 us</description>
+ <value>9</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>131ms</name>
+ <description>131072 us</description>
+ <value>10</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SAMPLE</name>
+ <description>Motion sample value</description>
+ <addressOffset>0x50C</addressOffset>
+ <access>read-only</access>
+ <dataType>int32_t</dataType>
+ <fields>
+ <field>
+ <name>SAMPLE</name>
+ <description>Last motion sample</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>REPORTPER</name>
+ <description>Number of samples to be taken before REPORTRDY and DBLRDY events can be generated</description>
+ <addressOffset>0x510</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>REPORTPER</name>
+ <description>Specifies the number of samples to be accumulated in the ACC register before the REPORTRDY and DBLRDY events can be generated</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>10Smpl</name>
+ <description>10 samples / report</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>40Smpl</name>
+ <description>40 samples / report</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>80Smpl</name>
+ <description>80 samples / report</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>120Smpl</name>
+ <description>120 samples / report</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>160Smpl</name>
+ <description>160 samples / report</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>200Smpl</name>
+ <description>200 samples / report</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>240Smpl</name>
+ <description>240 samples / report</description>
+ <value>6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>280Smpl</name>
+ <description>280 samples / report</description>
+ <value>7</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>1Smpl</name>
+ <description>1 sample / report</description>
+ <value>8</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ACC</name>
+ <description>Register accumulating the valid transitions</description>
+ <addressOffset>0x514</addressOffset>
+ <access>read-only</access>
+ <dataType>int32_t</dataType>
+ <fields>
+ <field>
+ <name>ACC</name>
+ <description>Register accumulating all valid samples (not double transition) read from the SAMPLE register</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ACCREAD</name>
+ <description>Snapshot of the ACC register, updated by the READCLRACC or RDCLRACC task</description>
+ <addressOffset>0x518</addressOffset>
+ <access>read-only</access>
+ <dataType>int32_t</dataType>
+ <fields>
+ <field>
+ <name>ACCREAD</name>
+ <description>Snapshot of the ACC register.</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>PSEL</name>
+ <description>Unspecified</description>
+ <headerStructName>QDEC_PSEL</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x51C</addressOffset>
+ <register>
+ <name>LED</name>
+ <description>Pin select for LED signal</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>A</name>
+ <description>Pin select for A signal</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>B</name>
+ <description>Pin select for B signal</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>DBFEN</name>
+ <description>Enable input debounce filters</description>
+ <addressOffset>0x528</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>DBFEN</name>
+ <description>Enable input debounce filters</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Debounce input filters disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Debounce input filters enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LEDPRE</name>
+ <description>Time period the LED is switched ON prior to sampling</description>
+ <addressOffset>0x540</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000010</resetValue>
+ <fields>
+ <field>
+ <name>LEDPRE</name>
+ <description>Period in us the LED is switched on prior to sampling</description>
+ <lsb>0</lsb>
+ <msb>8</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ACCDBL</name>
+ <description>Register accumulating the number of detected double transitions</description>
+ <addressOffset>0x544</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>ACCDBL</name>
+ <description>Register accumulating the number of detected double or illegal transitions. ( SAMPLE = 2 ).</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ACCDBLREAD</name>
+ <description>Snapshot of the ACCDBL, updated by the READCLRACC or RDCLRDBL task</description>
+ <addressOffset>0x548</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>ACCDBLREAD</name>
+ <description>Snapshot of the ACCDBL register. This field is updated when the READCLRACC or RDCLRDBL task is triggered.</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>COMP</name>
+ <description>Comparator</description>
+ <baseAddress>0x40013000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>COMP_LPCOMP</name>
+ <value>19</value>
+ </interrupt>
+ <groupName>COMP</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_START</name>
+ <description>Start comparator</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_START</name>
+ <description>Start comparator</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stop comparator</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stop comparator</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_SAMPLE</name>
+ <description>Sample comparator value</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_SAMPLE</name>
+ <description>Sample comparator value</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_READY</name>
+ <description>COMP is ready and output is valid</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_READY</name>
+ <description>COMP is ready and output is valid</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_DOWN</name>
+ <description>Downward crossing</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_DOWN</name>
+ <description>Downward crossing</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_UP</name>
+ <description>Upward crossing</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_UP</name>
+ <description>Upward crossing</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_CROSS</name>
+ <description>Downward or upward crossing</description>
+ <addressOffset>0x10C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CROSS</name>
+ <description>Downward or upward crossing</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>READY_SAMPLE</name>
+ <description>Shortcut between event READY and task SAMPLE</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>READY_STOP</name>
+ <description>Shortcut between event READY and task STOP</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DOWN_STOP</name>
+ <description>Shortcut between event DOWN and task STOP</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>UP_STOP</name>
+ <description>Shortcut between event UP and task STOP</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CROSS_STOP</name>
+ <description>Shortcut between event CROSS and task STOP</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTEN</name>
+ <description>Enable or disable interrupt</description>
+ <addressOffset>0x300</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>READY</name>
+ <description>Enable or disable interrupt for event READY</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DOWN</name>
+ <description>Enable or disable interrupt for event DOWN</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>UP</name>
+ <description>Enable or disable interrupt for event UP</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CROSS</name>
+ <description>Enable or disable interrupt for event CROSS</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>READY</name>
+ <description>Write '1' to enable interrupt for event READY</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DOWN</name>
+ <description>Write '1' to enable interrupt for event DOWN</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>UP</name>
+ <description>Write '1' to enable interrupt for event UP</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CROSS</name>
+ <description>Write '1' to enable interrupt for event CROSS</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>READY</name>
+ <description>Write '1' to disable interrupt for event READY</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DOWN</name>
+ <description>Write '1' to disable interrupt for event DOWN</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>UP</name>
+ <description>Write '1' to disable interrupt for event UP</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CROSS</name>
+ <description>Write '1' to disable interrupt for event CROSS</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RESULT</name>
+ <description>Compare result</description>
+ <addressOffset>0x400</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>RESULT</name>
+ <description>Result of last compare. Decision point SAMPLE task.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Below</name>
+ <description>Input voltage is below the threshold (VIN+ &lt; VIN-)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Above</name>
+ <description>Input voltage is above the threshold (VIN+ &gt; VIN-)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>COMP enable</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable COMP</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PSEL</name>
+ <description>Pin select</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PSEL</name>
+ <description>Analog pin select</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>AnalogInput0</name>
+ <description>AIN0 selected as analog input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput1</name>
+ <description>AIN1 selected as analog input</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput2</name>
+ <description>AIN2 selected as analog input</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput3</name>
+ <description>AIN3 selected as analog input</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput4</name>
+ <description>AIN4 selected as analog input</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput5</name>
+ <description>AIN5 selected as analog input</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput6</name>
+ <description>AIN6 selected as analog input</description>
+ <value>6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput7</name>
+ <description>AIN7 selected as analog input</description>
+ <value>7</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>REFSEL</name>
+ <description>Reference source select for single-ended mode</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000004</resetValue>
+ <fields>
+ <field>
+ <name>REFSEL</name>
+ <description>Reference select</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Int1V2</name>
+ <description>VREF = internal 1.2 V reference (VDD &gt;= 1.7 V)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Int1V8</name>
+ <description>VREF = internal 1.8 V reference (VDD &gt;= VREF + 0.2 V)</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Int2V4</name>
+ <description>VREF = internal 2.4 V reference (VDD &gt;= VREF + 0.2 V)</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>VDD</name>
+ <description>VREF = VDD</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ARef</name>
+ <description>VREF = AREF (VDD &gt;= VREF &gt;= AREFMIN)</description>
+ <value>5</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EXTREFSEL</name>
+ <description>External reference select</description>
+ <addressOffset>0x50C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EXTREFSEL</name>
+ <description>External analog reference select</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>AnalogReference0</name>
+ <description>Use AIN0 as external analog reference</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogReference1</name>
+ <description>Use AIN1 as external analog reference</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogReference2</name>
+ <description>Use AIN2 as external analog reference</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogReference3</name>
+ <description>Use AIN3 as external analog reference</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogReference4</name>
+ <description>Use AIN4 as external analog reference</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogReference5</name>
+ <description>Use AIN5 as external analog reference</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogReference6</name>
+ <description>Use AIN6 as external analog reference</description>
+ <value>6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogReference7</name>
+ <description>Use AIN7 as external analog reference</description>
+ <value>7</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TH</name>
+ <description>Threshold configuration for hysteresis unit</description>
+ <addressOffset>0x530</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>THDOWN</name>
+ <description>VDOWN = (THDOWN+1)/64*VREF</description>
+ <lsb>0</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>THUP</name>
+ <description>VUP = (THUP+1)/64*VREF</description>
+ <lsb>8</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MODE</name>
+ <description>Mode configuration</description>
+ <addressOffset>0x534</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>SP</name>
+ <description>Speed and power modes</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Low</name>
+ <description>Low-power mode</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Normal</name>
+ <description>Normal mode</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>High</name>
+ <description>High-speed mode</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>MAIN</name>
+ <description>Main operation modes</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>SE</name>
+ <description>Single-ended mode</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Diff</name>
+ <description>Differential mode</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>HYST</name>
+ <description>Comparator hysteresis enable</description>
+ <addressOffset>0x538</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>HYST</name>
+ <description>Comparator hysteresis</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoHyst</name>
+ <description>Comparator hysteresis disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Hyst50mV</name>
+ <description>Comparator hysteresis enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>LPCOMP</name>
+ <description>Low Power Comparator</description>
+ <baseAddress>0x40013000</baseAddress>
+ <alternatePeripheral>COMP</alternatePeripheral>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>COMP_LPCOMP</name>
+ <value>19</value>
+ </interrupt>
+ <groupName>LPCOMP</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_START</name>
+ <description>Start comparator</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_START</name>
+ <description>Start comparator</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stop comparator</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stop comparator</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_SAMPLE</name>
+ <description>Sample comparator value</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_SAMPLE</name>
+ <description>Sample comparator value</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_READY</name>
+ <description>LPCOMP is ready and output is valid</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_READY</name>
+ <description>LPCOMP is ready and output is valid</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_DOWN</name>
+ <description>Downward crossing</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_DOWN</name>
+ <description>Downward crossing</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_UP</name>
+ <description>Upward crossing</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_UP</name>
+ <description>Upward crossing</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_CROSS</name>
+ <description>Downward or upward crossing</description>
+ <addressOffset>0x10C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CROSS</name>
+ <description>Downward or upward crossing</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>READY_SAMPLE</name>
+ <description>Shortcut between event READY and task SAMPLE</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>READY_STOP</name>
+ <description>Shortcut between event READY and task STOP</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DOWN_STOP</name>
+ <description>Shortcut between event DOWN and task STOP</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>UP_STOP</name>
+ <description>Shortcut between event UP and task STOP</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CROSS_STOP</name>
+ <description>Shortcut between event CROSS and task STOP</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>READY</name>
+ <description>Write '1' to enable interrupt for event READY</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DOWN</name>
+ <description>Write '1' to enable interrupt for event DOWN</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>UP</name>
+ <description>Write '1' to enable interrupt for event UP</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CROSS</name>
+ <description>Write '1' to enable interrupt for event CROSS</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>READY</name>
+ <description>Write '1' to disable interrupt for event READY</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DOWN</name>
+ <description>Write '1' to disable interrupt for event DOWN</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>UP</name>
+ <description>Write '1' to disable interrupt for event UP</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CROSS</name>
+ <description>Write '1' to disable interrupt for event CROSS</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RESULT</name>
+ <description>Compare result</description>
+ <addressOffset>0x400</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>RESULT</name>
+ <description>Result of last compare. Decision point SAMPLE task.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Below</name>
+ <description>Input voltage is below the reference threshold (VIN+ &lt; VIN-).</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Above</name>
+ <description>Input voltage is above the reference threshold (VIN+ &gt; VIN-).</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>Enable LPCOMP</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable LPCOMP</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PSEL</name>
+ <description>Input pin select</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PSEL</name>
+ <description>Analog pin select</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>AnalogInput0</name>
+ <description>AIN0 selected as analog input</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput1</name>
+ <description>AIN1 selected as analog input</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput2</name>
+ <description>AIN2 selected as analog input</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput3</name>
+ <description>AIN3 selected as analog input</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput4</name>
+ <description>AIN4 selected as analog input</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput5</name>
+ <description>AIN5 selected as analog input</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput6</name>
+ <description>AIN6 selected as analog input</description>
+ <value>6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogInput7</name>
+ <description>AIN7 selected as analog input</description>
+ <value>7</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>REFSEL</name>
+ <description>Reference select</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000004</resetValue>
+ <fields>
+ <field>
+ <name>REFSEL</name>
+ <description>Reference select</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Ref1_8Vdd</name>
+ <description>VDD * 1/8 selected as reference</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ref2_8Vdd</name>
+ <description>VDD * 2/8 selected as reference</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ref3_8Vdd</name>
+ <description>VDD * 3/8 selected as reference</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ref4_8Vdd</name>
+ <description>VDD * 4/8 selected as reference</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ref5_8Vdd</name>
+ <description>VDD * 5/8 selected as reference</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ref6_8Vdd</name>
+ <description>VDD * 6/8 selected as reference</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ref7_8Vdd</name>
+ <description>VDD * 7/8 selected as reference</description>
+ <value>6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ARef</name>
+ <description>External analog reference selected</description>
+ <value>7</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ref1_16Vdd</name>
+ <description>VDD * 1/16 selected as reference</description>
+ <value>8</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ref3_16Vdd</name>
+ <description>VDD * 3/16 selected as reference</description>
+ <value>9</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ref5_16Vdd</name>
+ <description>VDD * 5/16 selected as reference</description>
+ <value>10</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ref7_16Vdd</name>
+ <description>VDD * 7/16 selected as reference</description>
+ <value>11</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ref9_16Vdd</name>
+ <description>VDD * 9/16 selected as reference</description>
+ <value>12</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ref11_16Vdd</name>
+ <description>VDD * 11/16 selected as reference</description>
+ <value>13</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ref13_16Vdd</name>
+ <description>VDD * 13/16 selected as reference</description>
+ <value>14</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ref15_16Vdd</name>
+ <description>VDD * 15/16 selected as reference</description>
+ <value>15</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EXTREFSEL</name>
+ <description>External reference select</description>
+ <addressOffset>0x50C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EXTREFSEL</name>
+ <description>External analog reference select</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>AnalogReference0</name>
+ <description>Use AIN0 as external analog reference</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogReference1</name>
+ <description>Use AIN1 as external analog reference</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ANADETECT</name>
+ <description>Analog detect configuration</description>
+ <addressOffset>0x520</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ANADETECT</name>
+ <description>Analog detect configuration</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Cross</name>
+ <description>Generate ANADETECT on crossing, both upward crossing and downward crossing</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Up</name>
+ <description>Generate ANADETECT on upward crossing only</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Down</name>
+ <description>Generate ANADETECT on downward crossing only</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>HYST</name>
+ <description>Comparator hysteresis enable</description>
+ <addressOffset>0x538</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>HYST</name>
+ <description>Comparator hysteresis enable</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Comparator hysteresis disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Comparator hysteresis enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>EGU0</name>
+ <description>Event Generator Unit 0</description>
+ <baseAddress>0x40014000</baseAddress>
+ <headerStructName>EGU</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>SWI0_EGU0</name>
+ <value>20</value>
+ </interrupt>
+ <groupName>EGU</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <dim>0x10</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>TASKS_TRIGGER[%s]</name>
+ <description>Description collection: Trigger n for triggering the corresponding TRIGGERED[n] event</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_TRIGGER</name>
+ <description>Trigger n for triggering the corresponding TRIGGERED[n] event</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x10</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>EVENTS_TRIGGERED[%s]</name>
+ <description>Description collection: Event number n generated by triggering the corresponding TRIGGER[n] task</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TRIGGERED</name>
+ <description>Event number n generated by triggering the corresponding TRIGGER[n] task</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTEN</name>
+ <description>Enable or disable interrupt</description>
+ <addressOffset>0x300</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TRIGGERED0</name>
+ <description>Enable or disable interrupt for event TRIGGERED[0]</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED1</name>
+ <description>Enable or disable interrupt for event TRIGGERED[1]</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED2</name>
+ <description>Enable or disable interrupt for event TRIGGERED[2]</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED3</name>
+ <description>Enable or disable interrupt for event TRIGGERED[3]</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED4</name>
+ <description>Enable or disable interrupt for event TRIGGERED[4]</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED5</name>
+ <description>Enable or disable interrupt for event TRIGGERED[5]</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED6</name>
+ <description>Enable or disable interrupt for event TRIGGERED[6]</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED7</name>
+ <description>Enable or disable interrupt for event TRIGGERED[7]</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED8</name>
+ <description>Enable or disable interrupt for event TRIGGERED[8]</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED9</name>
+ <description>Enable or disable interrupt for event TRIGGERED[9]</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED10</name>
+ <description>Enable or disable interrupt for event TRIGGERED[10]</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED11</name>
+ <description>Enable or disable interrupt for event TRIGGERED[11]</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED12</name>
+ <description>Enable or disable interrupt for event TRIGGERED[12]</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED13</name>
+ <description>Enable or disable interrupt for event TRIGGERED[13]</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED14</name>
+ <description>Enable or disable interrupt for event TRIGGERED[14]</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED15</name>
+ <description>Enable or disable interrupt for event TRIGGERED[15]</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TRIGGERED0</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[0]</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED1</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[1]</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED2</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[2]</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED3</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[3]</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED4</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[4]</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED5</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[5]</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED6</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[6]</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED7</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[7]</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED8</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[8]</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED9</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[9]</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED10</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[10]</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED11</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[11]</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED12</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[12]</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED13</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[13]</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED14</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[14]</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED15</name>
+ <description>Write '1' to enable interrupt for event TRIGGERED[15]</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TRIGGERED0</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[0]</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED1</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[1]</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED2</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[2]</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED3</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[3]</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED4</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[4]</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED5</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[5]</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED6</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[6]</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED7</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[7]</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED8</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[8]</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED9</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[9]</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED10</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[10]</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED11</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[11]</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED12</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[12]</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED13</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[13]</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED14</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[14]</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TRIGGERED15</name>
+ <description>Write '1' to disable interrupt for event TRIGGERED[15]</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>SWI0</name>
+ <description>Software interrupt 0</description>
+ <baseAddress>0x40014000</baseAddress>
+ <alternatePeripheral>EGU0</alternatePeripheral>
+ <headerStructName>SWI</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>SWI0_EGU0</name>
+ <value>20</value>
+ </interrupt>
+ <groupName>SWI</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>UNUSED</name>
+ <description>Unused.</description>
+ <addressOffset>0x000</addressOffset>
+ <resetValue>0x00000000</resetValue>
+ <access>read-only</access>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral derivedFrom="EGU0">
+ <name>EGU1</name>
+ <description>Event Generator Unit 1</description>
+ <baseAddress>0x40015000</baseAddress>
+ <interrupt>
+ <name>SWI1_EGU1</name>
+ <value>21</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="SWI0">
+ <name>SWI1</name>
+ <description>Software interrupt 1</description>
+ <baseAddress>0x40015000</baseAddress>
+ <alternatePeripheral>EGU1</alternatePeripheral>
+ <interrupt>
+ <name>SWI1_EGU1</name>
+ <value>21</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="EGU0">
+ <name>EGU2</name>
+ <description>Event Generator Unit 2</description>
+ <baseAddress>0x40016000</baseAddress>
+ <interrupt>
+ <name>SWI2_EGU2</name>
+ <value>22</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="SWI0">
+ <name>SWI2</name>
+ <description>Software interrupt 2</description>
+ <baseAddress>0x40016000</baseAddress>
+ <alternatePeripheral>EGU2</alternatePeripheral>
+ <interrupt>
+ <name>SWI2_EGU2</name>
+ <value>22</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="EGU0">
+ <name>EGU3</name>
+ <description>Event Generator Unit 3</description>
+ <baseAddress>0x40017000</baseAddress>
+ <interrupt>
+ <name>SWI3_EGU3</name>
+ <value>23</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="SWI0">
+ <name>SWI3</name>
+ <description>Software interrupt 3</description>
+ <baseAddress>0x40017000</baseAddress>
+ <alternatePeripheral>EGU3</alternatePeripheral>
+ <interrupt>
+ <name>SWI3_EGU3</name>
+ <value>23</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="EGU0">
+ <name>EGU4</name>
+ <description>Event Generator Unit 4</description>
+ <baseAddress>0x40018000</baseAddress>
+ <interrupt>
+ <name>SWI4_EGU4</name>
+ <value>24</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="SWI0">
+ <name>SWI4</name>
+ <description>Software interrupt 4</description>
+ <baseAddress>0x40018000</baseAddress>
+ <alternatePeripheral>EGU4</alternatePeripheral>
+ <interrupt>
+ <name>SWI4_EGU4</name>
+ <value>24</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="EGU0">
+ <name>EGU5</name>
+ <description>Event Generator Unit 5</description>
+ <baseAddress>0x40019000</baseAddress>
+ <interrupt>
+ <name>SWI5_EGU5</name>
+ <value>25</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="SWI0">
+ <name>SWI5</name>
+ <description>Software interrupt 5</description>
+ <baseAddress>0x40019000</baseAddress>
+ <alternatePeripheral>EGU5</alternatePeripheral>
+ <interrupt>
+ <name>SWI5_EGU5</name>
+ <value>25</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="TIMER0">
+ <name>TIMER3</name>
+ <description>Timer/Counter 3</description>
+ <baseAddress>0x4001A000</baseAddress>
+ <interrupt>
+ <name>TIMER3</name>
+ <value>26</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="TIMER0">
+ <name>TIMER4</name>
+ <description>Timer/Counter 4</description>
+ <baseAddress>0x4001B000</baseAddress>
+ <interrupt>
+ <name>TIMER4</name>
+ <value>27</value>
+ </interrupt>
+ </peripheral>
+ <peripheral>
+ <name>PWM0</name>
+ <description>Pulse width modulation unit 0</description>
+ <baseAddress>0x4001C000</baseAddress>
+ <headerStructName>PWM</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>PWM0</name>
+ <value>28</value>
+ </interrupt>
+ <groupName>PWM</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stops PWM pulse generation on all channels at the end of current PWM period, and stops sequence playback</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stops PWM pulse generation on all channels at the end of current PWM period, and stops sequence playback</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x2</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>TASKS_SEQSTART[%s]</name>
+ <description>Description collection: Loads the first PWM value on all enabled channels from sequence n, and starts playing that sequence at the rate defined in SEQ[n]REFRESH and/or DECODER.MODE. Causes PWM generation to start if not running.</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_SEQSTART</name>
+ <description>Loads the first PWM value on all enabled channels from sequence n, and starts playing that sequence at the rate defined in SEQ[n]REFRESH and/or DECODER.MODE. Causes PWM generation to start if not running.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_NEXTSTEP</name>
+ <description>Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start if not running.</description>
+ <addressOffset>0x010</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_NEXTSTEP</name>
+ <description>Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start if not running.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_STOPPED</name>
+ <description>Response to STOP task, emitted when PWM pulses are no longer generated</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_STOPPED</name>
+ <description>Response to STOP task, emitted when PWM pulses are no longer generated</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x2</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>EVENTS_SEQSTARTED[%s]</name>
+ <description>Description collection: First PWM period started on sequence n</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_SEQSTARTED</name>
+ <description>First PWM period started on sequence n</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x2</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>EVENTS_SEQEND[%s]</name>
+ <description>Description collection: Emitted at end of every sequence n, when last value from RAM has been applied to wave counter</description>
+ <addressOffset>0x110</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_SEQEND</name>
+ <description>Emitted at end of every sequence n, when last value from RAM has been applied to wave counter</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_PWMPERIODEND</name>
+ <description>Emitted at the end of each PWM period</description>
+ <addressOffset>0x118</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_PWMPERIODEND</name>
+ <description>Emitted at the end of each PWM period</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_LOOPSDONE</name>
+ <description>Concatenated sequences have been played the amount of times defined in LOOP.CNT</description>
+ <addressOffset>0x11C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_LOOPSDONE</name>
+ <description>Concatenated sequences have been played the amount of times defined in LOOP.CNT</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>SEQEND0_STOP</name>
+ <description>Shortcut between event SEQEND[0] and task STOP</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SEQEND1_STOP</name>
+ <description>Shortcut between event SEQEND[1] and task STOP</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LOOPSDONE_SEQSTART0</name>
+ <description>Shortcut between event LOOPSDONE and task SEQSTART[0]</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LOOPSDONE_SEQSTART1</name>
+ <description>Shortcut between event LOOPSDONE and task SEQSTART[1]</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LOOPSDONE_STOP</name>
+ <description>Shortcut between event LOOPSDONE and task STOP</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTEN</name>
+ <description>Enable or disable interrupt</description>
+ <addressOffset>0x300</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STOPPED</name>
+ <description>Enable or disable interrupt for event STOPPED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SEQSTARTED0</name>
+ <description>Enable or disable interrupt for event SEQSTARTED[0]</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SEQSTARTED1</name>
+ <description>Enable or disable interrupt for event SEQSTARTED[1]</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SEQEND0</name>
+ <description>Enable or disable interrupt for event SEQEND[0]</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SEQEND1</name>
+ <description>Enable or disable interrupt for event SEQEND[1]</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PWMPERIODEND</name>
+ <description>Enable or disable interrupt for event PWMPERIODEND</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LOOPSDONE</name>
+ <description>Enable or disable interrupt for event LOOPSDONE</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to enable interrupt for event STOPPED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SEQSTARTED0</name>
+ <description>Write '1' to enable interrupt for event SEQSTARTED[0]</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SEQSTARTED1</name>
+ <description>Write '1' to enable interrupt for event SEQSTARTED[1]</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SEQEND0</name>
+ <description>Write '1' to enable interrupt for event SEQEND[0]</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SEQEND1</name>
+ <description>Write '1' to enable interrupt for event SEQEND[1]</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PWMPERIODEND</name>
+ <description>Write '1' to enable interrupt for event PWMPERIODEND</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LOOPSDONE</name>
+ <description>Write '1' to enable interrupt for event LOOPSDONE</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to disable interrupt for event STOPPED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SEQSTARTED0</name>
+ <description>Write '1' to disable interrupt for event SEQSTARTED[0]</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SEQSTARTED1</name>
+ <description>Write '1' to disable interrupt for event SEQSTARTED[1]</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SEQEND0</name>
+ <description>Write '1' to disable interrupt for event SEQEND[0]</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SEQEND1</name>
+ <description>Write '1' to disable interrupt for event SEQEND[1]</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PWMPERIODEND</name>
+ <description>Write '1' to disable interrupt for event PWMPERIODEND</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LOOPSDONE</name>
+ <description>Write '1' to disable interrupt for event LOOPSDONE</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>PWM module enable register</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable PWM module</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MODE</name>
+ <description>Selects operating mode of the wave counter</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>UPDOWN</name>
+ <description>Selects up mode or up-and-down mode for the counter</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Up</name>
+ <description>Up counter, edge-aligned PWM duty cycle</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>UpAndDown</name>
+ <description>Up and down counter, center-aligned PWM duty cycle</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>COUNTERTOP</name>
+ <description>Value up to which the pulse generator counter counts</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x000003FF</resetValue>
+ <fields>
+ <field>
+ <name>COUNTERTOP</name>
+ <description>Value up to which the pulse generator counter counts. This register is ignored when DECODER.MODE=WaveForm and only values from RAM are used.</description>
+ <lsb>0</lsb>
+ <msb>14</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PRESCALER</name>
+ <description>Configuration for PWM_CLK</description>
+ <addressOffset>0x50C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>PRESCALER</name>
+ <description>Prescaler of PWM_CLK</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>DIV_1</name>
+ <description>Divide by 1 (16 MHz)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DIV_2</name>
+ <description>Divide by 2 (8 MHz)</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DIV_4</name>
+ <description>Divide by 4 (4 MHz)</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DIV_8</name>
+ <description>Divide by 8 (2 MHz)</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DIV_16</name>
+ <description>Divide by 16 (1 MHz)</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DIV_32</name>
+ <description>Divide by 32 (500 kHz)</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DIV_64</name>
+ <description>Divide by 64 (250 kHz)</description>
+ <value>6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DIV_128</name>
+ <description>Divide by 128 (125 kHz)</description>
+ <value>7</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DECODER</name>
+ <description>Configuration of the decoder</description>
+ <addressOffset>0x510</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>LOAD</name>
+ <description>How a sequence is read from RAM and spread to the compare register</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Common</name>
+ <description>1st half word (16-bit) used in all PWM channels 0..3</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Grouped</name>
+ <description>1st half word (16-bit) used in channel 0..1; 2nd word in channel 2..3</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Individual</name>
+ <description>1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in ch.3</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>WaveForm</name>
+ <description>1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in COUNTERTOP</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>MODE</name>
+ <description>Selects source for advancing the active sequence</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>RefreshCount</name>
+ <description>SEQ[n].REFRESH is used to determine loading internal compare registers</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>NextStep</name>
+ <description>NEXTSTEP task causes a new value to be loaded to internal compare registers</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LOOP</name>
+ <description>Number of playbacks of a loop</description>
+ <addressOffset>0x514</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>CNT</name>
+ <description>Number of playbacks of pattern cycles</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Looping disabled (stop at the end of the sequence)</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <dim>2</dim>
+ <dimIncrement>0x020</dimIncrement>
+ <name>SEQ[%s]</name>
+ <description>Unspecified</description>
+ <headerStructName>PWM_SEQ</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x520</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>Description cluster: Beginning address in RAM of this sequence</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>Beginning address in RAM of this sequence</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CNT</name>
+ <description>Description cluster: Number of values (duty cycles) in this sequence</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>CNT</name>
+ <description>Number of values (duty cycles) in this sequence</description>
+ <lsb>0</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Sequence is disabled, and shall not be started as it is empty</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>REFRESH</name>
+ <description>Description cluster: Number of additional PWM periods between samples loaded into compare register</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>CNT</name>
+ <description>Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)</description>
+ <lsb>0</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Continuous</name>
+ <description>Update every PWM period</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENDDELAY</name>
+ <description>Description cluster: Time added after the sequence</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>CNT</name>
+ <description>Time added after the sequence in PWM periods</description>
+ <lsb>0</lsb>
+ <msb>23</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>PSEL</name>
+ <description>Unspecified</description>
+ <headerStructName>PWM_PSEL</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x560</addressOffset>
+ <register>
+ <dim>0x4</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>OUT[%s]</name>
+ <description>Description collection: Output pin select for PWM channel n</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>PDM</name>
+ <description>Pulse Density Modulation (Digital Microphone) Interface</description>
+ <baseAddress>0x4001D000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>PDM</name>
+ <value>29</value>
+ </interrupt>
+ <groupName>PDM</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_START</name>
+ <description>Starts continuous PDM transfer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_START</name>
+ <description>Starts continuous PDM transfer</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stops PDM transfer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stops PDM transfer</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_STARTED</name>
+ <description>PDM transfer has started</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_STARTED</name>
+ <description>PDM transfer has started</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_STOPPED</name>
+ <description>PDM transfer has finished</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_STOPPED</name>
+ <description>PDM transfer has finished</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_END</name>
+ <description>The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_END</name>
+ <description>The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTEN</name>
+ <description>Enable or disable interrupt</description>
+ <addressOffset>0x300</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STARTED</name>
+ <description>Enable or disable interrupt for event STARTED</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STOPPED</name>
+ <description>Enable or disable interrupt for event STOPPED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>END</name>
+ <description>Enable or disable interrupt for event END</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STARTED</name>
+ <description>Write '1' to enable interrupt for event STARTED</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to enable interrupt for event STOPPED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>END</name>
+ <description>Write '1' to enable interrupt for event END</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STARTED</name>
+ <description>Write '1' to disable interrupt for event STARTED</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to disable interrupt for event STOPPED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>END</name>
+ <description>Write '1' to disable interrupt for event END</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>PDM module enable register</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable or disable PDM module</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PDMCLKCTRL</name>
+ <description>PDM clock generator control</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x08400000</resetValue>
+ <fields>
+ <field>
+ <name>FREQ</name>
+ <description>PDM_CLK frequency</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>1000K</name>
+ <description>PDM_CLK = 32 MHz / 32 = 1.000 MHz</description>
+ <value>0x08000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Default</name>
+ <description>PDM_CLK = 32 MHz / 31 = 1.032 MHz. Nominal clock for RATIO=Ratio64.</description>
+ <value>0x08400000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>1067K</name>
+ <description>PDM_CLK = 32 MHz / 30 = 1.067 MHz</description>
+ <value>0x08800000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>1231K</name>
+ <description>PDM_CLK = 32 MHz / 26 = 1.231 MHz</description>
+ <value>0x09800000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>1280K</name>
+ <description>PDM_CLK = 32 MHz / 25 = 1.280 MHz. Nominal clock for RATIO=Ratio80.</description>
+ <value>0x0A000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>1333K</name>
+ <description>PDM_CLK = 32 MHz / 24 = 1.333 MHz</description>
+ <value>0x0A800000</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MODE</name>
+ <description>Defines the routing of the connected PDM microphones' signals</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>OPERATION</name>
+ <description>Mono or stereo operation</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Stereo</name>
+ <description>Sample and store one pair (Left + Right) of 16bit samples per RAM word R=[31:16]; L=[15:0]</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Mono</name>
+ <description>Sample and store two successive Left samples (16 bit each) per RAM word L1=[31:16]; L0=[15:0]</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EDGE</name>
+ <description>Defines on which PDM_CLK edge Left (or mono) is sampled</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>LeftFalling</name>
+ <description>Left (or mono) is sampled on falling edge of PDM_CLK</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>LeftRising</name>
+ <description>Left (or mono) is sampled on rising edge of PDM_CLK</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>GAINL</name>
+ <description>Left output gain adjustment</description>
+ <addressOffset>0x518</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000028</resetValue>
+ <fields>
+ <field>
+ <name>GAINL</name>
+ <description>Left output gain adjustment, in 0.5 dB steps, around the default module gain (see electrical parameters) 0x00 -20 dB gain adjust 0x01 -19.5 dB gain adjust (...) 0x27 -0.5 dB gain adjust 0x28 0 dB gain adjust 0x29 +0.5 dB gain adjust (...) 0x4F +19.5 dB gain adjust 0x50 +20 dB gain adjust</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>MinGain</name>
+ <description>-20dB gain adjustment (minimum)</description>
+ <value>0x00</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DefaultGain</name>
+ <description>0dB gain adjustment</description>
+ <value>0x28</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>MaxGain</name>
+ <description>+20dB gain adjustment (maximum)</description>
+ <value>0x50</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>GAINR</name>
+ <description>Right output gain adjustment</description>
+ <addressOffset>0x51C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000028</resetValue>
+ <fields>
+ <field>
+ <name>GAINR</name>
+ <description>Right output gain adjustment, in 0.5 dB steps, around the default module gain (see electrical parameters)</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>MinGain</name>
+ <description>-20dB gain adjustment (minimum)</description>
+ <value>0x00</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DefaultGain</name>
+ <description>0dB gain adjustment</description>
+ <value>0x28</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>MaxGain</name>
+ <description>+20dB gain adjustment (maximum)</description>
+ <value>0x50</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RATIO</name>
+ <description>Selects the ratio between PDM_CLK and output sample rate. Change PDMCLKCTRL accordingly.</description>
+ <addressOffset>0x520</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>RATIO</name>
+ <description>Selects the ratio between PDM_CLK and output sample rate</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Ratio64</name>
+ <description>Ratio of 64</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ratio80</name>
+ <description>Ratio of 80</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>PSEL</name>
+ <description>Unspecified</description>
+ <headerStructName>PDM_PSEL</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x540</addressOffset>
+ <register>
+ <name>CLK</name>
+ <description>Pin number configuration for PDM CLK signal</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DIN</name>
+ <description>Pin number configuration for PDM DIN signal</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>SAMPLE</name>
+ <description>Unspecified</description>
+ <headerStructName>PDM_SAMPLE</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x560</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>RAM address pointer to write samples to with EasyDMA</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>SAMPLEPTR</name>
+ <description>Address to write PDM samples to over DMA</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Number of samples to allocate memory for in EasyDMA mode</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>BUFFSIZE</name>
+ <description>Length of DMA RAM allocation in number of samples</description>
+ <lsb>0</lsb>
+ <msb>14</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>ACL</name>
+ <description>Access control lists</description>
+ <baseAddress>0x4001E000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <groupName>ACL</groupName>
+ <size>0x20</size>
+ <registers>
+ <cluster>
+ <dim>8</dim>
+ <dimIncrement>0x010</dimIncrement>
+ <name>ACL[%s]</name>
+ <description>Unspecified</description>
+ <headerStructName>ACL_ACL</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x800</addressOffset>
+ <register>
+ <name>ADDR</name>
+ <description>Description cluster: Configure the word-aligned start address of region n to protect</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-writeonce</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>ADDR</name>
+ <description>Valid word-aligned start address of region n to protect. Address must point to a flash page boundary.</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SIZE</name>
+ <description>Description cluster: Size of region to protect counting from address ACL[n].ADDR. Write '0' as no effect.</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-writeonce</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>SIZE</name>
+ <description>Size of flash region n in bytes. Must be a multiple of the flash page size, and the maximum region size is limited to 512 kB.</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PERM</name>
+ <description>Description cluster: Access permissions for region n as defined by start address ACL[n].ADDR and size ACL[n].SIZE</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-writeonce</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>WRITE</name>
+ <description>Configure write and erase permissions for region n. Write '0' has no effect.</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Allow write and erase instructions to region n</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Block write and erase instructions to region n</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>READ</name>
+ <description>Configure read permissions for region n. Write '0' has no effect.</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Allow read instructions to region n</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Block read instructions to region n</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>NVMC</name>
+ <description>Non Volatile Memory Controller</description>
+ <baseAddress>0x4001E000</baseAddress>
+ <alternatePeripheral>ACL</alternatePeripheral>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <groupName>NVMC</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>READY</name>
+ <description>Ready flag</description>
+ <addressOffset>0x400</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>READY</name>
+ <description>NVMC is ready or busy</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Busy</name>
+ <description>NVMC is busy (on-going write or erase operation)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ready</name>
+ <description>NVMC is ready</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>READYNEXT</name>
+ <description>Ready flag</description>
+ <addressOffset>0x408</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>READYNEXT</name>
+ <description>NVMC can accept a new write operation</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Busy</name>
+ <description>NVMC cannot accept any write operation</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ready</name>
+ <description>NVMC is ready</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CONFIG</name>
+ <description>Configuration register</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>WEN</name>
+ <description>Program memory access mode. It is strongly recommended to only activate erase and write modes when they are actively used. Enabling write or erase will invalidate the cache and keep it invalidated.</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Ren</name>
+ <description>Read only access</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Wen</name>
+ <description>Write enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Een</name>
+ <description>Erase enabled</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ERASEPAGE</name>
+ <description>Register for erasing a page in code area</description>
+ <addressOffset>0x508</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>ERASEPAGE</name>
+ <description>Register for starting erase of a page in code area</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ERASEPCR1</name>
+ <description>Deprecated register - Register for erasing a page in code area, equivalent to ERASEPAGE</description>
+ <addressOffset>0x508</addressOffset>
+ <access>write-only</access>
+ <alternateRegister>ERASEPAGE</alternateRegister>
+ <fields>
+ <field>
+ <name>ERASEPCR1</name>
+ <description>Register for erasing a page in code area, equivalent to ERASEPAGE</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ERASEALL</name>
+ <description>Register for erasing all non-volatile user memory</description>
+ <addressOffset>0x50C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>ERASEALL</name>
+ <description>Erase all non-volatile memory including UICR registers. Note that the erase must be enabled using CONFIG.WEN before the non-volatile memory can be erased.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoOperation</name>
+ <description>No operation</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Erase</name>
+ <description>Start chip erase</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ERASEPCR0</name>
+ <description>Deprecated register - Register for erasing a page in code area, equivalent to ERASEPAGE</description>
+ <addressOffset>0x510</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>ERASEPCR0</name>
+ <description>Register for starting erase of a page in code area, equivalent to ERASEPAGE</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ERASEUICR</name>
+ <description>Register for erasing user information configuration registers</description>
+ <addressOffset>0x514</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>ERASEUICR</name>
+ <description>Register starting erase of all user information configuration registers. Note that the erase must be enabled using CONFIG.WEN before the UICR can be erased.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoOperation</name>
+ <description>No operation</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Erase</name>
+ <description>Start erase of UICR</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ERASEPAGEPARTIAL</name>
+ <description>Register for partial erase of a page in code area</description>
+ <addressOffset>0x518</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>ERASEPAGEPARTIAL</name>
+ <description>Register for starting partial erase of a page in code area</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ERASEPAGEPARTIALCFG</name>
+ <description>Register for partial erase configuration</description>
+ <addressOffset>0x51C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x0000000A</resetValue>
+ <fields>
+ <field>
+ <name>DURATION</name>
+ <description>Duration of the partial erase in milliseconds</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ICACHECNF</name>
+ <description>I-code cache configuration register</description>
+ <addressOffset>0x540</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>CACHEEN</name>
+ <description>Cache enable</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable cache. Invalidates all cache entries.</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable cache</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CACHEPROFEN</name>
+ <description>Cache profiling enable</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable cache profiling</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable cache profiling</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>IHIT</name>
+ <description>I-code cache hit counter</description>
+ <addressOffset>0x548</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>HITS</name>
+ <description>Number of cache hits</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>IMISS</name>
+ <description>I-code cache miss counter</description>
+ <addressOffset>0x54C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MISSES</name>
+ <description>Number of cache misses</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>PPI</name>
+ <description>Programmable Peripheral Interconnect</description>
+ <baseAddress>0x4001F000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <groupName>PPI</groupName>
+ <size>0x20</size>
+ <registers>
+ <cluster>
+ <dim>6</dim>
+ <dimIncrement>0x008</dimIncrement>
+ <name>TASKS_CHG[%s]</name>
+ <description>Channel group tasks</description>
+ <headerStructName>PPI_TASKS_CHG</headerStructName>
+ <access>write-only</access>
+ <addressOffset>0x000</addressOffset>
+ <register>
+ <name>EN</name>
+ <description>Description cluster: Enable channel group n</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>EN</name>
+ <description>Enable channel group n</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DIS</name>
+ <description>Description cluster: Disable channel group n</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>DIS</name>
+ <description>Disable channel group n</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>CHEN</name>
+ <description>Channel enable register</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CH0</name>
+ <description>Enable or disable channel 0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH1</name>
+ <description>Enable or disable channel 1</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH2</name>
+ <description>Enable or disable channel 2</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH3</name>
+ <description>Enable or disable channel 3</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH4</name>
+ <description>Enable or disable channel 4</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH5</name>
+ <description>Enable or disable channel 5</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH6</name>
+ <description>Enable or disable channel 6</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH7</name>
+ <description>Enable or disable channel 7</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH8</name>
+ <description>Enable or disable channel 8</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH9</name>
+ <description>Enable or disable channel 9</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH10</name>
+ <description>Enable or disable channel 10</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH11</name>
+ <description>Enable or disable channel 11</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH12</name>
+ <description>Enable or disable channel 12</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH13</name>
+ <description>Enable or disable channel 13</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH14</name>
+ <description>Enable or disable channel 14</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH15</name>
+ <description>Enable or disable channel 15</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH16</name>
+ <description>Enable or disable channel 16</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH17</name>
+ <description>Enable or disable channel 17</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH18</name>
+ <description>Enable or disable channel 18</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH19</name>
+ <description>Enable or disable channel 19</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH20</name>
+ <description>Enable or disable channel 20</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH21</name>
+ <description>Enable or disable channel 21</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH22</name>
+ <description>Enable or disable channel 22</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH23</name>
+ <description>Enable or disable channel 23</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH24</name>
+ <description>Enable or disable channel 24</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH25</name>
+ <description>Enable or disable channel 25</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH26</name>
+ <description>Enable or disable channel 26</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH27</name>
+ <description>Enable or disable channel 27</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH28</name>
+ <description>Enable or disable channel 28</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH29</name>
+ <description>Enable or disable channel 29</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH30</name>
+ <description>Enable or disable channel 30</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH31</name>
+ <description>Enable or disable channel 31</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable channel</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CHENSET</name>
+ <description>Channel enable set register</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToSet</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>CH0</name>
+ <description>Channel 0 enable set register. Writing '0' has no effect</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH1</name>
+ <description>Channel 1 enable set register. Writing '0' has no effect</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH2</name>
+ <description>Channel 2 enable set register. Writing '0' has no effect</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH3</name>
+ <description>Channel 3 enable set register. Writing '0' has no effect</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH4</name>
+ <description>Channel 4 enable set register. Writing '0' has no effect</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH5</name>
+ <description>Channel 5 enable set register. Writing '0' has no effect</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH6</name>
+ <description>Channel 6 enable set register. Writing '0' has no effect</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH7</name>
+ <description>Channel 7 enable set register. Writing '0' has no effect</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH8</name>
+ <description>Channel 8 enable set register. Writing '0' has no effect</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH9</name>
+ <description>Channel 9 enable set register. Writing '0' has no effect</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH10</name>
+ <description>Channel 10 enable set register. Writing '0' has no effect</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH11</name>
+ <description>Channel 11 enable set register. Writing '0' has no effect</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH12</name>
+ <description>Channel 12 enable set register. Writing '0' has no effect</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH13</name>
+ <description>Channel 13 enable set register. Writing '0' has no effect</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH14</name>
+ <description>Channel 14 enable set register. Writing '0' has no effect</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH15</name>
+ <description>Channel 15 enable set register. Writing '0' has no effect</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH16</name>
+ <description>Channel 16 enable set register. Writing '0' has no effect</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH17</name>
+ <description>Channel 17 enable set register. Writing '0' has no effect</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH18</name>
+ <description>Channel 18 enable set register. Writing '0' has no effect</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH19</name>
+ <description>Channel 19 enable set register. Writing '0' has no effect</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH20</name>
+ <description>Channel 20 enable set register. Writing '0' has no effect</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH21</name>
+ <description>Channel 21 enable set register. Writing '0' has no effect</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH22</name>
+ <description>Channel 22 enable set register. Writing '0' has no effect</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH23</name>
+ <description>Channel 23 enable set register. Writing '0' has no effect</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH24</name>
+ <description>Channel 24 enable set register. Writing '0' has no effect</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH25</name>
+ <description>Channel 25 enable set register. Writing '0' has no effect</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH26</name>
+ <description>Channel 26 enable set register. Writing '0' has no effect</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH27</name>
+ <description>Channel 27 enable set register. Writing '0' has no effect</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH28</name>
+ <description>Channel 28 enable set register. Writing '0' has no effect</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH29</name>
+ <description>Channel 29 enable set register. Writing '0' has no effect</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH30</name>
+ <description>Channel 30 enable set register. Writing '0' has no effect</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH31</name>
+ <description>Channel 31 enable set register. Writing '0' has no effect</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Write: Enable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CHENCLR</name>
+ <description>Channel enable clear register</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToClear</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>CH0</name>
+ <description>Channel 0 enable clear register. Writing '0' has no effect</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH1</name>
+ <description>Channel 1 enable clear register. Writing '0' has no effect</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH2</name>
+ <description>Channel 2 enable clear register. Writing '0' has no effect</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH3</name>
+ <description>Channel 3 enable clear register. Writing '0' has no effect</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH4</name>
+ <description>Channel 4 enable clear register. Writing '0' has no effect</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH5</name>
+ <description>Channel 5 enable clear register. Writing '0' has no effect</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH6</name>
+ <description>Channel 6 enable clear register. Writing '0' has no effect</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH7</name>
+ <description>Channel 7 enable clear register. Writing '0' has no effect</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH8</name>
+ <description>Channel 8 enable clear register. Writing '0' has no effect</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH9</name>
+ <description>Channel 9 enable clear register. Writing '0' has no effect</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH10</name>
+ <description>Channel 10 enable clear register. Writing '0' has no effect</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH11</name>
+ <description>Channel 11 enable clear register. Writing '0' has no effect</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH12</name>
+ <description>Channel 12 enable clear register. Writing '0' has no effect</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH13</name>
+ <description>Channel 13 enable clear register. Writing '0' has no effect</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH14</name>
+ <description>Channel 14 enable clear register. Writing '0' has no effect</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH15</name>
+ <description>Channel 15 enable clear register. Writing '0' has no effect</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH16</name>
+ <description>Channel 16 enable clear register. Writing '0' has no effect</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH17</name>
+ <description>Channel 17 enable clear register. Writing '0' has no effect</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH18</name>
+ <description>Channel 18 enable clear register. Writing '0' has no effect</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH19</name>
+ <description>Channel 19 enable clear register. Writing '0' has no effect</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH20</name>
+ <description>Channel 20 enable clear register. Writing '0' has no effect</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH21</name>
+ <description>Channel 21 enable clear register. Writing '0' has no effect</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH22</name>
+ <description>Channel 22 enable clear register. Writing '0' has no effect</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH23</name>
+ <description>Channel 23 enable clear register. Writing '0' has no effect</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH24</name>
+ <description>Channel 24 enable clear register. Writing '0' has no effect</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH25</name>
+ <description>Channel 25 enable clear register. Writing '0' has no effect</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH26</name>
+ <description>Channel 26 enable clear register. Writing '0' has no effect</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH27</name>
+ <description>Channel 27 enable clear register. Writing '0' has no effect</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH28</name>
+ <description>Channel 28 enable clear register. Writing '0' has no effect</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH29</name>
+ <description>Channel 29 enable clear register. Writing '0' has no effect</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH30</name>
+ <description>Channel 30 enable clear register. Writing '0' has no effect</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH31</name>
+ <description>Channel 31 enable clear register. Writing '0' has no effect</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: channel disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: channel enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Write: disable channel</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <dim>20</dim>
+ <dimIncrement>0x008</dimIncrement>
+ <name>CH[%s]</name>
+ <description>PPI Channel</description>
+ <headerStructName>PPI_CH</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x510</addressOffset>
+ <register>
+ <name>EEP</name>
+ <description>Description cluster: Channel n event end-point</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EEP</name>
+ <description>Pointer to event register. Accepts only addresses to registers from the Event group.</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TEP</name>
+ <description>Description cluster: Channel n task end-point</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TEP</name>
+ <description>Pointer to task register. Accepts only addresses to registers from the Task group.</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <dim>0x6</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>CHG[%s]</name>
+ <description>Description collection: Channel group n</description>
+ <addressOffset>0x800</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CH0</name>
+ <description>Include or exclude channel 0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH1</name>
+ <description>Include or exclude channel 1</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH2</name>
+ <description>Include or exclude channel 2</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH3</name>
+ <description>Include or exclude channel 3</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH4</name>
+ <description>Include or exclude channel 4</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH5</name>
+ <description>Include or exclude channel 5</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH6</name>
+ <description>Include or exclude channel 6</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH7</name>
+ <description>Include or exclude channel 7</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH8</name>
+ <description>Include or exclude channel 8</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH9</name>
+ <description>Include or exclude channel 9</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH10</name>
+ <description>Include or exclude channel 10</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH11</name>
+ <description>Include or exclude channel 11</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH12</name>
+ <description>Include or exclude channel 12</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH13</name>
+ <description>Include or exclude channel 13</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH14</name>
+ <description>Include or exclude channel 14</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH15</name>
+ <description>Include or exclude channel 15</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH16</name>
+ <description>Include or exclude channel 16</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH17</name>
+ <description>Include or exclude channel 17</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH18</name>
+ <description>Include or exclude channel 18</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH19</name>
+ <description>Include or exclude channel 19</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH20</name>
+ <description>Include or exclude channel 20</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH21</name>
+ <description>Include or exclude channel 21</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH22</name>
+ <description>Include or exclude channel 22</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH23</name>
+ <description>Include or exclude channel 23</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH24</name>
+ <description>Include or exclude channel 24</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH25</name>
+ <description>Include or exclude channel 25</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH26</name>
+ <description>Include or exclude channel 26</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH27</name>
+ <description>Include or exclude channel 27</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH28</name>
+ <description>Include or exclude channel 28</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH29</name>
+ <description>Include or exclude channel 29</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH30</name>
+ <description>Include or exclude channel 30</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>CH31</name>
+ <description>Include or exclude channel 31</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <dim>32</dim>
+ <dimIncrement>0x004</dimIncrement>
+ <name>FORK[%s]</name>
+ <description>Fork</description>
+ <headerStructName>PPI_FORK</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x910</addressOffset>
+ <register>
+ <name>TEP</name>
+ <description>Description cluster: Channel n task end-point</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TEP</name>
+ <description>Pointer to task register</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>MWU</name>
+ <description>Memory Watch Unit</description>
+ <baseAddress>0x40020000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>MWU</name>
+ <value>32</value>
+ </interrupt>
+ <groupName>MWU</groupName>
+ <size>0x20</size>
+ <registers>
+ <cluster>
+ <dim>4</dim>
+ <dimIncrement>0x008</dimIncrement>
+ <name>EVENTS_REGION[%s]</name>
+ <description>Peripheral events.</description>
+ <headerStructName>MWU_EVENTS_REGION</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x100</addressOffset>
+ <register>
+ <name>WA</name>
+ <description>Description cluster: Write access to region n detected</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>WA</name>
+ <description>Write access to region n detected</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RA</name>
+ <description>Description cluster: Read access to region n detected</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>RA</name>
+ <description>Read access to region n detected</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <dim>2</dim>
+ <dimIncrement>0x008</dimIncrement>
+ <name>EVENTS_PREGION[%s]</name>
+ <description>Peripheral events.</description>
+ <headerStructName>MWU_EVENTS_PREGION</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x160</addressOffset>
+ <register>
+ <name>WA</name>
+ <description>Description cluster: Write access to peripheral region n detected</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>WA</name>
+ <description>Write access to peripheral region n detected</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RA</name>
+ <description>Description cluster: Read access to peripheral region n detected</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>RA</name>
+ <description>Read access to peripheral region n detected</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>INTEN</name>
+ <description>Enable or disable interrupt</description>
+ <addressOffset>0x300</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>REGION0WA</name>
+ <description>Enable or disable interrupt for event REGION0WA</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION0RA</name>
+ <description>Enable or disable interrupt for event REGION0RA</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION1WA</name>
+ <description>Enable or disable interrupt for event REGION1WA</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION1RA</name>
+ <description>Enable or disable interrupt for event REGION1RA</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION2WA</name>
+ <description>Enable or disable interrupt for event REGION2WA</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION2RA</name>
+ <description>Enable or disable interrupt for event REGION2RA</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION3WA</name>
+ <description>Enable or disable interrupt for event REGION3WA</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION3RA</name>
+ <description>Enable or disable interrupt for event REGION3RA</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PREGION0WA</name>
+ <description>Enable or disable interrupt for event PREGION0WA</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PREGION0RA</name>
+ <description>Enable or disable interrupt for event PREGION0RA</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PREGION1WA</name>
+ <description>Enable or disable interrupt for event PREGION1WA</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PREGION1RA</name>
+ <description>Enable or disable interrupt for event PREGION1RA</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>REGION0WA</name>
+ <description>Write '1' to enable interrupt for event REGION0WA</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION0RA</name>
+ <description>Write '1' to enable interrupt for event REGION0RA</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION1WA</name>
+ <description>Write '1' to enable interrupt for event REGION1WA</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION1RA</name>
+ <description>Write '1' to enable interrupt for event REGION1RA</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION2WA</name>
+ <description>Write '1' to enable interrupt for event REGION2WA</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION2RA</name>
+ <description>Write '1' to enable interrupt for event REGION2RA</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION3WA</name>
+ <description>Write '1' to enable interrupt for event REGION3WA</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION3RA</name>
+ <description>Write '1' to enable interrupt for event REGION3RA</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PREGION0WA</name>
+ <description>Write '1' to enable interrupt for event PREGION0WA</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PREGION0RA</name>
+ <description>Write '1' to enable interrupt for event PREGION0RA</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PREGION1WA</name>
+ <description>Write '1' to enable interrupt for event PREGION1WA</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PREGION1RA</name>
+ <description>Write '1' to enable interrupt for event PREGION1RA</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>REGION0WA</name>
+ <description>Write '1' to disable interrupt for event REGION0WA</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION0RA</name>
+ <description>Write '1' to disable interrupt for event REGION0RA</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION1WA</name>
+ <description>Write '1' to disable interrupt for event REGION1WA</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION1RA</name>
+ <description>Write '1' to disable interrupt for event REGION1RA</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION2WA</name>
+ <description>Write '1' to disable interrupt for event REGION2WA</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION2RA</name>
+ <description>Write '1' to disable interrupt for event REGION2RA</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION3WA</name>
+ <description>Write '1' to disable interrupt for event REGION3WA</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION3RA</name>
+ <description>Write '1' to disable interrupt for event REGION3RA</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PREGION0WA</name>
+ <description>Write '1' to disable interrupt for event PREGION0WA</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PREGION0RA</name>
+ <description>Write '1' to disable interrupt for event PREGION0RA</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PREGION1WA</name>
+ <description>Write '1' to disable interrupt for event PREGION1WA</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PREGION1RA</name>
+ <description>Write '1' to disable interrupt for event PREGION1RA</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>NMIEN</name>
+ <description>Enable or disable interrupt</description>
+ <addressOffset>0x320</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>REGION0WA</name>
+ <description>Enable or disable interrupt for event REGION0WA</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION0RA</name>
+ <description>Enable or disable interrupt for event REGION0RA</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION1WA</name>
+ <description>Enable or disable interrupt for event REGION1WA</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION1RA</name>
+ <description>Enable or disable interrupt for event REGION1RA</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION2WA</name>
+ <description>Enable or disable interrupt for event REGION2WA</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION2RA</name>
+ <description>Enable or disable interrupt for event REGION2RA</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION3WA</name>
+ <description>Enable or disable interrupt for event REGION3WA</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION3RA</name>
+ <description>Enable or disable interrupt for event REGION3RA</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PREGION0WA</name>
+ <description>Enable or disable interrupt for event PREGION0WA</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PREGION0RA</name>
+ <description>Enable or disable interrupt for event PREGION0RA</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PREGION1WA</name>
+ <description>Enable or disable interrupt for event PREGION1WA</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PREGION1RA</name>
+ <description>Enable or disable interrupt for event PREGION1RA</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>NMIENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x324</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>REGION0WA</name>
+ <description>Write '1' to enable interrupt for event REGION0WA</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION0RA</name>
+ <description>Write '1' to enable interrupt for event REGION0RA</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION1WA</name>
+ <description>Write '1' to enable interrupt for event REGION1WA</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION1RA</name>
+ <description>Write '1' to enable interrupt for event REGION1RA</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION2WA</name>
+ <description>Write '1' to enable interrupt for event REGION2WA</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION2RA</name>
+ <description>Write '1' to enable interrupt for event REGION2RA</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION3WA</name>
+ <description>Write '1' to enable interrupt for event REGION3WA</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION3RA</name>
+ <description>Write '1' to enable interrupt for event REGION3RA</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PREGION0WA</name>
+ <description>Write '1' to enable interrupt for event PREGION0WA</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PREGION0RA</name>
+ <description>Write '1' to enable interrupt for event PREGION0RA</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PREGION1WA</name>
+ <description>Write '1' to enable interrupt for event PREGION1WA</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PREGION1RA</name>
+ <description>Write '1' to enable interrupt for event PREGION1RA</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>NMIENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x328</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>REGION0WA</name>
+ <description>Write '1' to disable interrupt for event REGION0WA</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION0RA</name>
+ <description>Write '1' to disable interrupt for event REGION0RA</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION1WA</name>
+ <description>Write '1' to disable interrupt for event REGION1WA</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION1RA</name>
+ <description>Write '1' to disable interrupt for event REGION1RA</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION2WA</name>
+ <description>Write '1' to disable interrupt for event REGION2WA</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION2RA</name>
+ <description>Write '1' to disable interrupt for event REGION2RA</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION3WA</name>
+ <description>Write '1' to disable interrupt for event REGION3WA</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>REGION3RA</name>
+ <description>Write '1' to disable interrupt for event REGION3RA</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PREGION0WA</name>
+ <description>Write '1' to disable interrupt for event PREGION0WA</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PREGION0RA</name>
+ <description>Write '1' to disable interrupt for event PREGION0RA</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PREGION1WA</name>
+ <description>Write '1' to disable interrupt for event PREGION1WA</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PREGION1RA</name>
+ <description>Write '1' to disable interrupt for event PREGION1RA</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <dim>2</dim>
+ <dimIncrement>0x008</dimIncrement>
+ <name>PERREGION[%s]</name>
+ <description>Unspecified</description>
+ <headerStructName>MWU_PERREGION</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x400</addressOffset>
+ <register>
+ <name>SUBSTATWA</name>
+ <description>Description cluster: Source of event/interrupt in region n, write access detected while corresponding subregion was enabled for watching</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToClear</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>SR0</name>
+ <description>Subregion 0 in region n (write '1' to clear)</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR1</name>
+ <description>Subregion 1 in region n (write '1' to clear)</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR2</name>
+ <description>Subregion 2 in region n (write '1' to clear)</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR3</name>
+ <description>Subregion 3 in region n (write '1' to clear)</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR4</name>
+ <description>Subregion 4 in region n (write '1' to clear)</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR5</name>
+ <description>Subregion 5 in region n (write '1' to clear)</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR6</name>
+ <description>Subregion 6 in region n (write '1' to clear)</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR7</name>
+ <description>Subregion 7 in region n (write '1' to clear)</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR8</name>
+ <description>Subregion 8 in region n (write '1' to clear)</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR9</name>
+ <description>Subregion 9 in region n (write '1' to clear)</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR10</name>
+ <description>Subregion 10 in region n (write '1' to clear)</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR11</name>
+ <description>Subregion 11 in region n (write '1' to clear)</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR12</name>
+ <description>Subregion 12 in region n (write '1' to clear)</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR13</name>
+ <description>Subregion 13 in region n (write '1' to clear)</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR14</name>
+ <description>Subregion 14 in region n (write '1' to clear)</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR15</name>
+ <description>Subregion 15 in region n (write '1' to clear)</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR16</name>
+ <description>Subregion 16 in region n (write '1' to clear)</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR17</name>
+ <description>Subregion 17 in region n (write '1' to clear)</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR18</name>
+ <description>Subregion 18 in region n (write '1' to clear)</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR19</name>
+ <description>Subregion 19 in region n (write '1' to clear)</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR20</name>
+ <description>Subregion 20 in region n (write '1' to clear)</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR21</name>
+ <description>Subregion 21 in region n (write '1' to clear)</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR22</name>
+ <description>Subregion 22 in region n (write '1' to clear)</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR23</name>
+ <description>Subregion 23 in region n (write '1' to clear)</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR24</name>
+ <description>Subregion 24 in region n (write '1' to clear)</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR25</name>
+ <description>Subregion 25 in region n (write '1' to clear)</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR26</name>
+ <description>Subregion 26 in region n (write '1' to clear)</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR27</name>
+ <description>Subregion 27 in region n (write '1' to clear)</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR28</name>
+ <description>Subregion 28 in region n (write '1' to clear)</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR29</name>
+ <description>Subregion 29 in region n (write '1' to clear)</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR30</name>
+ <description>Subregion 30 in region n (write '1' to clear)</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR31</name>
+ <description>Subregion 31 in region n (write '1' to clear)</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No write access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Write access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SUBSTATRA</name>
+ <description>Description cluster: Source of event/interrupt in region n, read access detected while corresponding subregion was enabled for watching</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToClear</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>SR0</name>
+ <description>Subregion 0 in region n (write '1' to clear)</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR1</name>
+ <description>Subregion 1 in region n (write '1' to clear)</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR2</name>
+ <description>Subregion 2 in region n (write '1' to clear)</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR3</name>
+ <description>Subregion 3 in region n (write '1' to clear)</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR4</name>
+ <description>Subregion 4 in region n (write '1' to clear)</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR5</name>
+ <description>Subregion 5 in region n (write '1' to clear)</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR6</name>
+ <description>Subregion 6 in region n (write '1' to clear)</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR7</name>
+ <description>Subregion 7 in region n (write '1' to clear)</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR8</name>
+ <description>Subregion 8 in region n (write '1' to clear)</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR9</name>
+ <description>Subregion 9 in region n (write '1' to clear)</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR10</name>
+ <description>Subregion 10 in region n (write '1' to clear)</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR11</name>
+ <description>Subregion 11 in region n (write '1' to clear)</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR12</name>
+ <description>Subregion 12 in region n (write '1' to clear)</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR13</name>
+ <description>Subregion 13 in region n (write '1' to clear)</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR14</name>
+ <description>Subregion 14 in region n (write '1' to clear)</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR15</name>
+ <description>Subregion 15 in region n (write '1' to clear)</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR16</name>
+ <description>Subregion 16 in region n (write '1' to clear)</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR17</name>
+ <description>Subregion 17 in region n (write '1' to clear)</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR18</name>
+ <description>Subregion 18 in region n (write '1' to clear)</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR19</name>
+ <description>Subregion 19 in region n (write '1' to clear)</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR20</name>
+ <description>Subregion 20 in region n (write '1' to clear)</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR21</name>
+ <description>Subregion 21 in region n (write '1' to clear)</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR22</name>
+ <description>Subregion 22 in region n (write '1' to clear)</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR23</name>
+ <description>Subregion 23 in region n (write '1' to clear)</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR24</name>
+ <description>Subregion 24 in region n (write '1' to clear)</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR25</name>
+ <description>Subregion 25 in region n (write '1' to clear)</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR26</name>
+ <description>Subregion 26 in region n (write '1' to clear)</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR27</name>
+ <description>Subregion 27 in region n (write '1' to clear)</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR28</name>
+ <description>Subregion 28 in region n (write '1' to clear)</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR29</name>
+ <description>Subregion 29 in region n (write '1' to clear)</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR30</name>
+ <description>Subregion 30 in region n (write '1' to clear)</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR31</name>
+ <description>Subregion 31 in region n (write '1' to clear)</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoAccess</name>
+ <description>No read access occurred in this subregion</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Access</name>
+ <description>Read access(es) occurred in this subregion</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>REGIONEN</name>
+ <description>Enable/disable regions watch</description>
+ <addressOffset>0x510</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>RGN0WA</name>
+ <description>Enable/disable write access watch in region[0]</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable write access watch in this region</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable write access watch in this region</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RGN0RA</name>
+ <description>Enable/disable read access watch in region[0]</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable read access watch in this region</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable read access watch in this region</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RGN1WA</name>
+ <description>Enable/disable write access watch in region[1]</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable write access watch in this region</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable write access watch in this region</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RGN1RA</name>
+ <description>Enable/disable read access watch in region[1]</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable read access watch in this region</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable read access watch in this region</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RGN2WA</name>
+ <description>Enable/disable write access watch in region[2]</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable write access watch in this region</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable write access watch in this region</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RGN2RA</name>
+ <description>Enable/disable read access watch in region[2]</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable read access watch in this region</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable read access watch in this region</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RGN3WA</name>
+ <description>Enable/disable write access watch in region[3]</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable write access watch in this region</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable write access watch in this region</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RGN3RA</name>
+ <description>Enable/disable read access watch in region[3]</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable read access watch in this region</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable read access watch in this region</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PRGN0WA</name>
+ <description>Enable/disable write access watch in PREGION[0]</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable write access watch in this PREGION</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable write access watch in this PREGION</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PRGN0RA</name>
+ <description>Enable/disable read access watch in PREGION[0]</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable read access watch in this PREGION</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable read access watch in this PREGION</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PRGN1WA</name>
+ <description>Enable/disable write access watch in PREGION[1]</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable write access watch in this PREGION</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable write access watch in this PREGION</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PRGN1RA</name>
+ <description>Enable/disable read access watch in PREGION[1]</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable read access watch in this PREGION</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable read access watch in this PREGION</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>REGIONENSET</name>
+ <description>Enable regions watch</description>
+ <addressOffset>0x514</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>RGN0WA</name>
+ <description>Enable write access watch in region[0]</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Write access watch in this region is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Write access watch in this region is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable write access watch in this region</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RGN0RA</name>
+ <description>Enable read access watch in region[0]</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read access watch in this region is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read access watch in this region is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable read access watch in this region</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RGN1WA</name>
+ <description>Enable write access watch in region[1]</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Write access watch in this region is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Write access watch in this region is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable write access watch in this region</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RGN1RA</name>
+ <description>Enable read access watch in region[1]</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read access watch in this region is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read access watch in this region is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable read access watch in this region</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RGN2WA</name>
+ <description>Enable write access watch in region[2]</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Write access watch in this region is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Write access watch in this region is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable write access watch in this region</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RGN2RA</name>
+ <description>Enable read access watch in region[2]</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read access watch in this region is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read access watch in this region is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable read access watch in this region</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RGN3WA</name>
+ <description>Enable write access watch in region[3]</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Write access watch in this region is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Write access watch in this region is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable write access watch in this region</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RGN3RA</name>
+ <description>Enable read access watch in region[3]</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read access watch in this region is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read access watch in this region is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable read access watch in this region</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PRGN0WA</name>
+ <description>Enable write access watch in PREGION[0]</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Write access watch in this PREGION is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Write access watch in this PREGION is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable write access watch in this PREGION</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PRGN0RA</name>
+ <description>Enable read access watch in PREGION[0]</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read access watch in this PREGION is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read access watch in this PREGION is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable read access watch in this PREGION</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PRGN1WA</name>
+ <description>Enable write access watch in PREGION[1]</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Write access watch in this PREGION is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Write access watch in this PREGION is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable write access watch in this PREGION</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PRGN1RA</name>
+ <description>Enable read access watch in PREGION[1]</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read access watch in this PREGION is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read access watch in this PREGION is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable read access watch in this PREGION</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>REGIONENCLR</name>
+ <description>Disable regions watch</description>
+ <addressOffset>0x518</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>RGN0WA</name>
+ <description>Disable write access watch in region[0]</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Write access watch in this region is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Write access watch in this region is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable write access watch in this region</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RGN0RA</name>
+ <description>Disable read access watch in region[0]</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read access watch in this region is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read access watch in this region is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable read access watch in this region</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RGN1WA</name>
+ <description>Disable write access watch in region[1]</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Write access watch in this region is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Write access watch in this region is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable write access watch in this region</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RGN1RA</name>
+ <description>Disable read access watch in region[1]</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read access watch in this region is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read access watch in this region is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable read access watch in this region</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RGN2WA</name>
+ <description>Disable write access watch in region[2]</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Write access watch in this region is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Write access watch in this region is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable write access watch in this region</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RGN2RA</name>
+ <description>Disable read access watch in region[2]</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read access watch in this region is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read access watch in this region is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable read access watch in this region</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RGN3WA</name>
+ <description>Disable write access watch in region[3]</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Write access watch in this region is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Write access watch in this region is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable write access watch in this region</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RGN3RA</name>
+ <description>Disable read access watch in region[3]</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read access watch in this region is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read access watch in this region is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable read access watch in this region</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PRGN0WA</name>
+ <description>Disable write access watch in PREGION[0]</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Write access watch in this PREGION is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Write access watch in this PREGION is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable write access watch in this PREGION</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PRGN0RA</name>
+ <description>Disable read access watch in PREGION[0]</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read access watch in this PREGION is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read access watch in this PREGION is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable read access watch in this PREGION</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PRGN1WA</name>
+ <description>Disable write access watch in PREGION[1]</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Write access watch in this PREGION is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Write access watch in this PREGION is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable write access watch in this PREGION</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PRGN1RA</name>
+ <description>Disable read access watch in PREGION[1]</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read access watch in this PREGION is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read access watch in this PREGION is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable read access watch in this PREGION</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <dim>4</dim>
+ <dimIncrement>0x010</dimIncrement>
+ <name>REGION[%s]</name>
+ <description>Unspecified</description>
+ <headerStructName>MWU_REGION</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x600</addressOffset>
+ <register>
+ <name>START</name>
+ <description>Description cluster: Start address for region n</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>START</name>
+ <description>Start address for region</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>END</name>
+ <description>Description cluster: End address of region n</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>END</name>
+ <description>End address of region.</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <dim>2</dim>
+ <dimIncrement>0x010</dimIncrement>
+ <name>PREGION[%s]</name>
+ <description>Unspecified</description>
+ <headerStructName>MWU_PREGION</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x6C0</addressOffset>
+ <register>
+ <name>START</name>
+ <description>Description cluster: Reserved for future use</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>START</name>
+ <description>Reserved for future use</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>END</name>
+ <description>Description cluster: Reserved for future use</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>END</name>
+ <description>Reserved for future use</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SUBS</name>
+ <description>Description cluster: Subregions of region n</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>SR0</name>
+ <description>Include or exclude subregion 0 in region</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR1</name>
+ <description>Include or exclude subregion 1 in region</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR2</name>
+ <description>Include or exclude subregion 2 in region</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR3</name>
+ <description>Include or exclude subregion 3 in region</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR4</name>
+ <description>Include or exclude subregion 4 in region</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR5</name>
+ <description>Include or exclude subregion 5 in region</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR6</name>
+ <description>Include or exclude subregion 6 in region</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR7</name>
+ <description>Include or exclude subregion 7 in region</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR8</name>
+ <description>Include or exclude subregion 8 in region</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR9</name>
+ <description>Include or exclude subregion 9 in region</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR10</name>
+ <description>Include or exclude subregion 10 in region</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR11</name>
+ <description>Include or exclude subregion 11 in region</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR12</name>
+ <description>Include or exclude subregion 12 in region</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR13</name>
+ <description>Include or exclude subregion 13 in region</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR14</name>
+ <description>Include or exclude subregion 14 in region</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR15</name>
+ <description>Include or exclude subregion 15 in region</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR16</name>
+ <description>Include or exclude subregion 16 in region</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR17</name>
+ <description>Include or exclude subregion 17 in region</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR18</name>
+ <description>Include or exclude subregion 18 in region</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR19</name>
+ <description>Include or exclude subregion 19 in region</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR20</name>
+ <description>Include or exclude subregion 20 in region</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR21</name>
+ <description>Include or exclude subregion 21 in region</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR22</name>
+ <description>Include or exclude subregion 22 in region</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR23</name>
+ <description>Include or exclude subregion 23 in region</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR24</name>
+ <description>Include or exclude subregion 24 in region</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR25</name>
+ <description>Include or exclude subregion 25 in region</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR26</name>
+ <description>Include or exclude subregion 26 in region</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR27</name>
+ <description>Include or exclude subregion 27 in region</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR28</name>
+ <description>Include or exclude subregion 28 in region</description>
+ <lsb>28</lsb>
+ <msb>28</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR29</name>
+ <description>Include or exclude subregion 29 in region</description>
+ <lsb>29</lsb>
+ <msb>29</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR30</name>
+ <description>Include or exclude subregion 30 in region</description>
+ <lsb>30</lsb>
+ <msb>30</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SR31</name>
+ <description>Include or exclude subregion 31 in region</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Exclude</name>
+ <description>Exclude</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Include</name>
+ <description>Include</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ </registers>
+ </peripheral>
+ <peripheral derivedFrom="PWM0">
+ <name>PWM1</name>
+ <description>Pulse width modulation unit 1</description>
+ <baseAddress>0x40021000</baseAddress>
+ <interrupt>
+ <name>PWM1</name>
+ <value>33</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="PWM0">
+ <name>PWM2</name>
+ <description>Pulse width modulation unit 2</description>
+ <baseAddress>0x40022000</baseAddress>
+ <interrupt>
+ <name>PWM2</name>
+ <value>34</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="SPI0">
+ <name>SPI2</name>
+ <description>Serial Peripheral Interface 2</description>
+ <baseAddress>0x40023000</baseAddress>
+ <interrupt>
+ <name>SPIM2_SPIS2_SPI2</name>
+ <value>35</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="SPIM0">
+ <name>SPIM2</name>
+ <description>Serial Peripheral Interface Master with EasyDMA 2</description>
+ <baseAddress>0x40023000</baseAddress>
+ <alternatePeripheral>SPI2</alternatePeripheral>
+ <interrupt>
+ <name>SPIM2_SPIS2_SPI2</name>
+ <value>35</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="SPIS0">
+ <name>SPIS2</name>
+ <description>SPI Slave 2</description>
+ <baseAddress>0x40023000</baseAddress>
+ <alternatePeripheral>SPI2</alternatePeripheral>
+ <interrupt>
+ <name>SPIM2_SPIS2_SPI2</name>
+ <value>35</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="RTC0">
+ <name>RTC2</name>
+ <description>Real time counter 2</description>
+ <baseAddress>0x40024000</baseAddress>
+ <interrupt>
+ <name>RTC2</name>
+ <value>36</value>
+ </interrupt>
+ </peripheral>
+ <peripheral>
+ <name>I2S</name>
+ <description>Inter-IC Sound</description>
+ <baseAddress>0x40025000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>I2S</name>
+ <value>37</value>
+ </interrupt>
+ <groupName>I2S</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_START</name>
+ <description>Starts continuous I2S transfer. Also starts MCK generator when this is enabled.</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_START</name>
+ <description>Starts continuous I2S transfer. Also starts MCK generator when this is enabled.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stops I2S transfer. Also stops MCK generator. Triggering this task will cause the STOPPED event to be generated.</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <description>Stops I2S transfer. Also stops MCK generator. Triggering this task will cause the STOPPED event to be generated.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RXPTRUPD</name>
+ <description>The RXD.PTR register has been copied to internal double-buffers.
+ When the I2S module is started and RX is enabled, this event will be generated for every RXTXD.MAXCNT words that are received on the SDIN pin.</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RXPTRUPD</name>
+ <description>The RXD.PTR register has been copied to internal double-buffers.
+ When the I2S module is started and RX is enabled, this event will be generated for every RXTXD.MAXCNT words that are received on the SDIN pin.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_STOPPED</name>
+ <description>I2S transfer stopped.</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_STOPPED</name>
+ <description>I2S transfer stopped.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_TXPTRUPD</name>
+ <description>The TDX.PTR register has been copied to internal double-buffers.
+ When the I2S module is started and TX is enabled, this event will be generated for every RXTXD.MAXCNT words that are sent on the SDOUT pin.</description>
+ <addressOffset>0x114</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TXPTRUPD</name>
+ <description>The TDX.PTR register has been copied to internal double-buffers.
+ When the I2S module is started and TX is enabled, this event will be generated for every RXTXD.MAXCNT words that are sent on the SDOUT pin.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTEN</name>
+ <description>Enable or disable interrupt</description>
+ <addressOffset>0x300</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>RXPTRUPD</name>
+ <description>Enable or disable interrupt for event RXPTRUPD</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STOPPED</name>
+ <description>Enable or disable interrupt for event STOPPED</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXPTRUPD</name>
+ <description>Enable or disable interrupt for event TXPTRUPD</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>RXPTRUPD</name>
+ <description>Write '1' to enable interrupt for event RXPTRUPD</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to enable interrupt for event STOPPED</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXPTRUPD</name>
+ <description>Write '1' to enable interrupt for event TXPTRUPD</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>RXPTRUPD</name>
+ <description>Write '1' to disable interrupt for event RXPTRUPD</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STOPPED</name>
+ <description>Write '1' to disable interrupt for event STOPPED</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TXPTRUPD</name>
+ <description>Write '1' to disable interrupt for event TXPTRUPD</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ENABLE</name>
+ <description>Enable I2S module.</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable I2S module.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>CONFIG</name>
+ <description>Unspecified</description>
+ <headerStructName>I2S_CONFIG</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x504</addressOffset>
+ <register>
+ <name>MODE</name>
+ <description>I2S mode.</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>MODE</name>
+ <description>I2S mode.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Master</name>
+ <description>Master mode. SCK and LRCK generated from internal master clcok (MCK) and output on pins defined by PSEL.xxx.</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Slave</name>
+ <description>Slave mode. SCK and LRCK generated by external master and received on pins defined by PSEL.xxx</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RXEN</name>
+ <description>Reception (RX) enable.</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>RXEN</name>
+ <description>Reception (RX) enable.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Reception disabled and now data will be written to the RXD.PTR address.</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Reception enabled.</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TXEN</name>
+ <description>Transmission (TX) enable.</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>TXEN</name>
+ <description>Transmission (TX) enable.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Transmission disabled and now data will be read from the RXD.TXD address.</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Transmission enabled.</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MCKEN</name>
+ <description>Master clock generator enable.</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>MCKEN</name>
+ <description>Master clock generator enable.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Master clock generator disabled and PSEL.MCK not connected(available as GPIO).</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Master clock generator running and MCK output on PSEL.MCK.</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MCKFREQ</name>
+ <description>Master clock generator frequency.</description>
+ <addressOffset>0x010</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x20000000</resetValue>
+ <fields>
+ <field>
+ <name>MCKFREQ</name>
+ <description>Master clock generator frequency.</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>32MDIV8</name>
+ <description>32 MHz / 8 = 4.0 MHz</description>
+ <value>0x20000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>32MDIV10</name>
+ <description>32 MHz / 10 = 3.2 MHz</description>
+ <value>0x18000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>32MDIV11</name>
+ <description>32 MHz / 11 = 2.9090909 MHz</description>
+ <value>0x16000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>32MDIV15</name>
+ <description>32 MHz / 15 = 2.1333333 MHz</description>
+ <value>0x11000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>32MDIV16</name>
+ <description>32 MHz / 16 = 2.0 MHz</description>
+ <value>0x10000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>32MDIV21</name>
+ <description>32 MHz / 21 = 1.5238095</description>
+ <value>0x0C000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>32MDIV23</name>
+ <description>32 MHz / 23 = 1.3913043 MHz</description>
+ <value>0x0B000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>32MDIV30</name>
+ <description>32 MHz / 30 = 1.0666667 MHz</description>
+ <value>0x08800000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>32MDIV31</name>
+ <description>32 MHz / 31 = 1.0322581 MHz</description>
+ <value>0x08400000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>32MDIV32</name>
+ <description>32 MHz / 32 = 1.0 MHz</description>
+ <value>0x08000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>32MDIV42</name>
+ <description>32 MHz / 42 = 0.7619048 MHz</description>
+ <value>0x06000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>32MDIV63</name>
+ <description>32 MHz / 63 = 0.5079365 MHz</description>
+ <value>0x04100000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>32MDIV125</name>
+ <description>32 MHz / 125 = 0.256 MHz</description>
+ <value>0x020C0000</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RATIO</name>
+ <description>MCK / LRCK ratio.</description>
+ <addressOffset>0x014</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000006</resetValue>
+ <fields>
+ <field>
+ <name>RATIO</name>
+ <description>MCK / LRCK ratio.</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>32X</name>
+ <description>LRCK = MCK / 32</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>48X</name>
+ <description>LRCK = MCK / 48</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>64X</name>
+ <description>LRCK = MCK / 64</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>96X</name>
+ <description>LRCK = MCK / 96</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>128X</name>
+ <description>LRCK = MCK / 128</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>192X</name>
+ <description>LRCK = MCK / 192</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>256X</name>
+ <description>LRCK = MCK / 256</description>
+ <value>6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>384X</name>
+ <description>LRCK = MCK / 384</description>
+ <value>7</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>512X</name>
+ <description>LRCK = MCK / 512</description>
+ <value>8</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SWIDTH</name>
+ <description>Sample width.</description>
+ <addressOffset>0x018</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>SWIDTH</name>
+ <description>Sample width.</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>8Bit</name>
+ <description>8 bit.</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>16Bit</name>
+ <description>16 bit.</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>24Bit</name>
+ <description>24 bit.</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ALIGN</name>
+ <description>Alignment of sample within a frame.</description>
+ <addressOffset>0x01C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>ALIGN</name>
+ <description>Alignment of sample within a frame.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Left</name>
+ <description>Left-aligned.</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Right</name>
+ <description>Right-aligned.</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>FORMAT</name>
+ <description>Frame format.</description>
+ <addressOffset>0x020</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>FORMAT</name>
+ <description>Frame format.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>I2S</name>
+ <description>Original I2S format.</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Aligned</name>
+ <description>Alternate (left- or right-aligned) format.</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CHANNELS</name>
+ <description>Enable channels.</description>
+ <addressOffset>0x024</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>CHANNELS</name>
+ <description>Enable channels.</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Stereo</name>
+ <description>Stereo.</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Left</name>
+ <description>Left only.</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Right</name>
+ <description>Right only.</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>RXD</name>
+ <description>Unspecified</description>
+ <headerStructName>I2S_RXD</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x538</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>Receive buffer RAM start address.</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>Receive buffer Data RAM start address. When receiving, words containing samples will be written to this address. This address is a word aligned Data RAM address.</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>TXD</name>
+ <description>Unspecified</description>
+ <headerStructName>I2S_TXD</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x540</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>Transmit buffer RAM start address.</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>Transmit buffer Data RAM start address. When transmitting, words containing samples will be fetched from this address. This address is a word aligned Data RAM address.</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>RXTXD</name>
+ <description>Unspecified</description>
+ <headerStructName>I2S_RXTXD</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x550</addressOffset>
+ <register>
+ <name>MAXCNT</name>
+ <description>Size of RXD and TXD buffers.</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Size of RXD and TXD buffers in number of 32 bit words.</description>
+ <lsb>0</lsb>
+ <msb>13</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>PSEL</name>
+ <description>Unspecified</description>
+ <headerStructName>I2S_PSEL</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x560</addressOffset>
+ <register>
+ <name>MCK</name>
+ <description>Pin select for MCK signal.</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SCK</name>
+ <description>Pin select for SCK signal.</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LRCK</name>
+ <description>Pin select for LRCK signal.</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SDIN</name>
+ <description>Pin select for SDIN signal.</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SDOUT</name>
+ <description>Pin select for SDOUT signal.</description>
+ <addressOffset>0x010</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>FPU</name>
+ <description>FPU</description>
+ <baseAddress>0x40026000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>FPU</name>
+ <value>38</value>
+ </interrupt>
+ <groupName>FPU</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>UNUSED</name>
+ <description>Unused.</description>
+ <addressOffset>0x000</addressOffset>
+ <resetValue>0x00000000</resetValue>
+ <access>read-only</access>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>USBD</name>
+ <description>Universal serial bus device</description>
+ <baseAddress>0x40027000</baseAddress>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>USBD</name>
+ <value>39</value>
+ </interrupt>
+ <groupName>USBD</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>TASKS_STARTEPIN[%s]</name>
+ <description>Description collection: Captures the EPIN[n].PTR and EPIN[n].MAXCNT registers values, and enables endpoint IN n to respond to traffic from host</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STARTEPIN</name>
+ <description>Captures the EPIN[n].PTR and EPIN[n].MAXCNT registers values, and enables endpoint IN n to respond to traffic from host</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STARTISOIN</name>
+ <description>Captures the ISOIN.PTR and ISOIN.MAXCNT registers values, and enables sending data on ISO endpoint</description>
+ <addressOffset>0x024</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STARTISOIN</name>
+ <description>Captures the ISOIN.PTR and ISOIN.MAXCNT registers values, and enables sending data on ISO endpoint</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>TASKS_STARTEPOUT[%s]</name>
+ <description>Description collection: Captures the EPOUT[n].PTR and EPOUT[n].MAXCNT registers values, and enables endpoint n to respond to traffic from host</description>
+ <addressOffset>0x028</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STARTEPOUT</name>
+ <description>Captures the EPOUT[n].PTR and EPOUT[n].MAXCNT registers values, and enables endpoint n to respond to traffic from host</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STARTISOOUT</name>
+ <description>Captures the ISOOUT.PTR and ISOOUT.MAXCNT registers values, and enables receiving of data on ISO endpoint</description>
+ <addressOffset>0x048</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STARTISOOUT</name>
+ <description>Captures the ISOOUT.PTR and ISOOUT.MAXCNT registers values, and enables receiving of data on ISO endpoint</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_EP0RCVOUT</name>
+ <description>Allows OUT data stage on control endpoint 0</description>
+ <addressOffset>0x04C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_EP0RCVOUT</name>
+ <description>Allows OUT data stage on control endpoint 0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_EP0STATUS</name>
+ <description>Allows status stage on control endpoint 0</description>
+ <addressOffset>0x050</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_EP0STATUS</name>
+ <description>Allows status stage on control endpoint 0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_EP0STALL</name>
+ <description>Stalls data and status stage on control endpoint 0</description>
+ <addressOffset>0x054</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_EP0STALL</name>
+ <description>Stalls data and status stage on control endpoint 0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_DPDMDRIVE</name>
+ <description>Forces D+ and D- lines into the state defined in the DPDMVALUE register</description>
+ <addressOffset>0x058</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_DPDMDRIVE</name>
+ <description>Forces D+ and D- lines into the state defined in the DPDMVALUE register</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_DPDMNODRIVE</name>
+ <description>Stops forcing D+ and D- lines into any state (USB engine takes control)</description>
+ <addressOffset>0x05C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_DPDMNODRIVE</name>
+ <description>Stops forcing D+ and D- lines into any state (USB engine takes control)</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Trigger</name>
+ <description>Trigger task</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_USBRESET</name>
+ <description>Signals that a USB reset condition has been detected on USB lines</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_USBRESET</name>
+ <description>Signals that a USB reset condition has been detected on USB lines</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_STARTED</name>
+ <description>Confirms that the EPIN[n].PTR and EPIN[n].MAXCNT, or EPOUT[n].PTR and EPOUT[n].MAXCNT registers have been captured on all endpoints reported in the EPSTATUS register</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_STARTED</name>
+ <description>Confirms that the EPIN[n].PTR and EPIN[n].MAXCNT, or EPOUT[n].PTR and EPOUT[n].MAXCNT registers have been captured on all endpoints reported in the EPSTATUS register</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>EVENTS_ENDEPIN[%s]</name>
+ <description>Description collection: The whole EPIN[n] buffer has been consumed. The buffer can be accessed safely by software.</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ENDEPIN</name>
+ <description>The whole EPIN[n] buffer has been consumed. The buffer can be accessed safely by software.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_EP0DATADONE</name>
+ <description>An acknowledged data transfer has taken place on the control endpoint</description>
+ <addressOffset>0x128</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_EP0DATADONE</name>
+ <description>An acknowledged data transfer has taken place on the control endpoint</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ENDISOIN</name>
+ <description>The whole ISOIN buffer has been consumed. The buffer can be accessed safely by software.</description>
+ <addressOffset>0x12C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ENDISOIN</name>
+ <description>The whole ISOIN buffer has been consumed. The buffer can be accessed safely by software.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>EVENTS_ENDEPOUT[%s]</name>
+ <description>Description collection: The whole EPOUT[n] buffer has been consumed. The buffer can be accessed safely by software.</description>
+ <addressOffset>0x130</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ENDEPOUT</name>
+ <description>The whole EPOUT[n] buffer has been consumed. The buffer can be accessed safely by software.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ENDISOOUT</name>
+ <description>The whole ISOOUT buffer has been consumed. The buffer can be accessed safely by software.</description>
+ <addressOffset>0x150</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ENDISOOUT</name>
+ <description>The whole ISOOUT buffer has been consumed. The buffer can be accessed safely by software.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_SOF</name>
+ <description>Signals that a SOF (start of frame) condition has been detected on USB lines</description>
+ <addressOffset>0x154</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_SOF</name>
+ <description>Signals that a SOF (start of frame) condition has been detected on USB lines</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_USBEVENT</name>
+ <description>An event or an error not covered by specific events has occurred. Check EVENTCAUSE register to find the cause.</description>
+ <addressOffset>0x158</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_USBEVENT</name>
+ <description>An event or an error not covered by specific events has occurred. Check EVENTCAUSE register to find the cause.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_EP0SETUP</name>
+ <description>A valid SETUP token has been received (and acknowledged) on the control endpoint</description>
+ <addressOffset>0x15C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_EP0SETUP</name>
+ <description>A valid SETUP token has been received (and acknowledged) on the control endpoint</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_EPDATA</name>
+ <description>A data transfer has occurred on a data endpoint, indicated by the EPDATASTATUS register</description>
+ <addressOffset>0x160</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_EPDATA</name>
+ <description>A data transfer has occurred on a data endpoint, indicated by the EPDATASTATUS register</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotGenerated</name>
+ <description>Event not generated</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Generated</name>
+ <description>Event generated</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcuts between local events and tasks</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EP0DATADONE_STARTEPIN0</name>
+ <description>Shortcut between event EP0DATADONE and task STARTEPIN[0]</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EP0DATADONE_STARTEPOUT0</name>
+ <description>Shortcut between event EP0DATADONE and task STARTEPOUT[0]</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EP0DATADONE_EP0STATUS</name>
+ <description>Shortcut between event EP0DATADONE and task EP0STATUS</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPOUT0_EP0STATUS</name>
+ <description>Shortcut between event ENDEPOUT[0] and task EP0STATUS</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPOUT0_EP0RCVOUT</name>
+ <description>Shortcut between event ENDEPOUT[0] and task EP0RCVOUT</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTEN</name>
+ <description>Enable or disable interrupt</description>
+ <addressOffset>0x300</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>USBRESET</name>
+ <description>Enable or disable interrupt for event USBRESET</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STARTED</name>
+ <description>Enable or disable interrupt for event STARTED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPIN0</name>
+ <description>Enable or disable interrupt for event ENDEPIN[0]</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPIN1</name>
+ <description>Enable or disable interrupt for event ENDEPIN[1]</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPIN2</name>
+ <description>Enable or disable interrupt for event ENDEPIN[2]</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPIN3</name>
+ <description>Enable or disable interrupt for event ENDEPIN[3]</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPIN4</name>
+ <description>Enable or disable interrupt for event ENDEPIN[4]</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPIN5</name>
+ <description>Enable or disable interrupt for event ENDEPIN[5]</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPIN6</name>
+ <description>Enable or disable interrupt for event ENDEPIN[6]</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPIN7</name>
+ <description>Enable or disable interrupt for event ENDEPIN[7]</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EP0DATADONE</name>
+ <description>Enable or disable interrupt for event EP0DATADONE</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDISOIN</name>
+ <description>Enable or disable interrupt for event ENDISOIN</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPOUT0</name>
+ <description>Enable or disable interrupt for event ENDEPOUT[0]</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPOUT1</name>
+ <description>Enable or disable interrupt for event ENDEPOUT[1]</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPOUT2</name>
+ <description>Enable or disable interrupt for event ENDEPOUT[2]</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPOUT3</name>
+ <description>Enable or disable interrupt for event ENDEPOUT[3]</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPOUT4</name>
+ <description>Enable or disable interrupt for event ENDEPOUT[4]</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPOUT5</name>
+ <description>Enable or disable interrupt for event ENDEPOUT[5]</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPOUT6</name>
+ <description>Enable or disable interrupt for event ENDEPOUT[6]</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPOUT7</name>
+ <description>Enable or disable interrupt for event ENDEPOUT[7]</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDISOOUT</name>
+ <description>Enable or disable interrupt for event ENDISOOUT</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SOF</name>
+ <description>Enable or disable interrupt for event SOF</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>USBEVENT</name>
+ <description>Enable or disable interrupt for event USBEVENT</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EP0SETUP</name>
+ <description>Enable or disable interrupt for event EP0SETUP</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPDATA</name>
+ <description>Enable or disable interrupt for event EPDATA</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>USBRESET</name>
+ <description>Write '1' to enable interrupt for event USBRESET</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STARTED</name>
+ <description>Write '1' to enable interrupt for event STARTED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPIN0</name>
+ <description>Write '1' to enable interrupt for event ENDEPIN[0]</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPIN1</name>
+ <description>Write '1' to enable interrupt for event ENDEPIN[1]</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPIN2</name>
+ <description>Write '1' to enable interrupt for event ENDEPIN[2]</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPIN3</name>
+ <description>Write '1' to enable interrupt for event ENDEPIN[3]</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPIN4</name>
+ <description>Write '1' to enable interrupt for event ENDEPIN[4]</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPIN5</name>
+ <description>Write '1' to enable interrupt for event ENDEPIN[5]</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPIN6</name>
+ <description>Write '1' to enable interrupt for event ENDEPIN[6]</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPIN7</name>
+ <description>Write '1' to enable interrupt for event ENDEPIN[7]</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EP0DATADONE</name>
+ <description>Write '1' to enable interrupt for event EP0DATADONE</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDISOIN</name>
+ <description>Write '1' to enable interrupt for event ENDISOIN</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPOUT0</name>
+ <description>Write '1' to enable interrupt for event ENDEPOUT[0]</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPOUT1</name>
+ <description>Write '1' to enable interrupt for event ENDEPOUT[1]</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPOUT2</name>
+ <description>Write '1' to enable interrupt for event ENDEPOUT[2]</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPOUT3</name>
+ <description>Write '1' to enable interrupt for event ENDEPOUT[3]</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPOUT4</name>
+ <description>Write '1' to enable interrupt for event ENDEPOUT[4]</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPOUT5</name>
+ <description>Write '1' to enable interrupt for event ENDEPOUT[5]</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPOUT6</name>
+ <description>Write '1' to enable interrupt for event ENDEPOUT[6]</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPOUT7</name>
+ <description>Write '1' to enable interrupt for event ENDEPOUT[7]</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDISOOUT</name>
+ <description>Write '1' to enable interrupt for event ENDISOOUT</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SOF</name>
+ <description>Write '1' to enable interrupt for event SOF</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>USBEVENT</name>
+ <description>Write '1' to enable interrupt for event USBEVENT</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EP0SETUP</name>
+ <description>Write '1' to enable interrupt for event EP0SETUP</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPDATA</name>
+ <description>Write '1' to enable interrupt for event EPDATA</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>USBRESET</name>
+ <description>Write '1' to disable interrupt for event USBRESET</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STARTED</name>
+ <description>Write '1' to disable interrupt for event STARTED</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPIN0</name>
+ <description>Write '1' to disable interrupt for event ENDEPIN[0]</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPIN1</name>
+ <description>Write '1' to disable interrupt for event ENDEPIN[1]</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPIN2</name>
+ <description>Write '1' to disable interrupt for event ENDEPIN[2]</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPIN3</name>
+ <description>Write '1' to disable interrupt for event ENDEPIN[3]</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPIN4</name>
+ <description>Write '1' to disable interrupt for event ENDEPIN[4]</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPIN5</name>
+ <description>Write '1' to disable interrupt for event ENDEPIN[5]</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPIN6</name>
+ <description>Write '1' to disable interrupt for event ENDEPIN[6]</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPIN7</name>
+ <description>Write '1' to disable interrupt for event ENDEPIN[7]</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EP0DATADONE</name>
+ <description>Write '1' to disable interrupt for event EP0DATADONE</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDISOIN</name>
+ <description>Write '1' to disable interrupt for event ENDISOIN</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPOUT0</name>
+ <description>Write '1' to disable interrupt for event ENDEPOUT[0]</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPOUT1</name>
+ <description>Write '1' to disable interrupt for event ENDEPOUT[1]</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPOUT2</name>
+ <description>Write '1' to disable interrupt for event ENDEPOUT[2]</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPOUT3</name>
+ <description>Write '1' to disable interrupt for event ENDEPOUT[3]</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPOUT4</name>
+ <description>Write '1' to disable interrupt for event ENDEPOUT[4]</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPOUT5</name>
+ <description>Write '1' to disable interrupt for event ENDEPOUT[5]</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPOUT6</name>
+ <description>Write '1' to disable interrupt for event ENDEPOUT[6]</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDEPOUT7</name>
+ <description>Write '1' to disable interrupt for event ENDEPOUT[7]</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENDISOOUT</name>
+ <description>Write '1' to disable interrupt for event ENDISOOUT</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SOF</name>
+ <description>Write '1' to disable interrupt for event SOF</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>USBEVENT</name>
+ <description>Write '1' to disable interrupt for event USBEVENT</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EP0SETUP</name>
+ <description>Write '1' to disable interrupt for event EP0SETUP</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPDATA</name>
+ <description>Write '1' to disable interrupt for event EPDATA</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTCAUSE</name>
+ <description>Details on what caused the USBEVENT event</description>
+ <addressOffset>0x400</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToClear</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>ISOOUTCRC</name>
+ <description>CRC error was detected on isochronous OUT endpoint 8. Write '1' to clear.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>No error detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Error detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SUSPEND</name>
+ <description>Signals that USB lines have been idle long enough for the device to enter suspend. Write '1' to clear.</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Suspend not detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Suspend detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RESUME</name>
+ <description>Signals that a RESUME condition (K state or activity restart) has been detected on USB lines. Write '1' to clear.</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Resume not detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Resume detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>USBWUALLOWED</name>
+ <description>USB MAC has been woken up and operational. Write '1' to clear.</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotAllowed</name>
+ <description>Wake up not allowed</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Allowed</name>
+ <description>Wake up allowed</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>READY</name>
+ <description>USB device is ready for normal operation. Write '1' to clear.</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>USBEVENT was not issued due to USBD peripheral ready</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ready</name>
+ <description>USBD peripheral is ready</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>HALTED</name>
+ <description>Unspecified</description>
+ <headerStructName>USBD_HALTED</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x420</addressOffset>
+ <register>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>EPIN[%s]</name>
+ <description>Description collection: IN endpoint halted status. Can be used as is as response to a GetStatus() request to endpoint.</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>GETSTATUS</name>
+ <description>IN endpoint halted status. Can be used as is as response to a GetStatus() request to endpoint.</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotHalted</name>
+ <description>Endpoint is not halted</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Halted</name>
+ <description>Endpoint is halted</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>EPOUT[%s]</name>
+ <description>Description collection: OUT endpoint halted status. Can be used as is as response to a GetStatus() request to endpoint.</description>
+ <addressOffset>0x024</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>GETSTATUS</name>
+ <description>OUT endpoint halted status. Can be used as is as response to a GetStatus() request to endpoint.</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotHalted</name>
+ <description>Endpoint is not halted</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Halted</name>
+ <description>Endpoint is halted</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>EPSTATUS</name>
+ <description>Provides information on which endpoint's EasyDMA registers have been captured</description>
+ <addressOffset>0x468</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToClear</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>EPIN0</name>
+ <description>Captured state of endpoint's EasyDMA registers. Write '1' to clear.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoData</name>
+ <description>EasyDMA registers have not been captured for this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DataDone</name>
+ <description>EasyDMA registers have been captured for this endpoint</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPIN1</name>
+ <description>Captured state of endpoint's EasyDMA registers. Write '1' to clear.</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoData</name>
+ <description>EasyDMA registers have not been captured for this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DataDone</name>
+ <description>EasyDMA registers have been captured for this endpoint</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPIN2</name>
+ <description>Captured state of endpoint's EasyDMA registers. Write '1' to clear.</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoData</name>
+ <description>EasyDMA registers have not been captured for this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DataDone</name>
+ <description>EasyDMA registers have been captured for this endpoint</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPIN3</name>
+ <description>Captured state of endpoint's EasyDMA registers. Write '1' to clear.</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoData</name>
+ <description>EasyDMA registers have not been captured for this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DataDone</name>
+ <description>EasyDMA registers have been captured for this endpoint</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPIN4</name>
+ <description>Captured state of endpoint's EasyDMA registers. Write '1' to clear.</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoData</name>
+ <description>EasyDMA registers have not been captured for this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DataDone</name>
+ <description>EasyDMA registers have been captured for this endpoint</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPIN5</name>
+ <description>Captured state of endpoint's EasyDMA registers. Write '1' to clear.</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoData</name>
+ <description>EasyDMA registers have not been captured for this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DataDone</name>
+ <description>EasyDMA registers have been captured for this endpoint</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPIN6</name>
+ <description>Captured state of endpoint's EasyDMA registers. Write '1' to clear.</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoData</name>
+ <description>EasyDMA registers have not been captured for this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DataDone</name>
+ <description>EasyDMA registers have been captured for this endpoint</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPIN7</name>
+ <description>Captured state of endpoint's EasyDMA registers. Write '1' to clear.</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoData</name>
+ <description>EasyDMA registers have not been captured for this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DataDone</name>
+ <description>EasyDMA registers have been captured for this endpoint</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPIN8</name>
+ <description>Captured state of endpoint's EasyDMA registers. Write '1' to clear.</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoData</name>
+ <description>EasyDMA registers have not been captured for this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DataDone</name>
+ <description>EasyDMA registers have been captured for this endpoint</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPOUT0</name>
+ <description>Captured state of endpoint's EasyDMA registers. Write '1' to clear.</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoData</name>
+ <description>EasyDMA registers have not been captured for this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DataDone</name>
+ <description>EasyDMA registers have been captured for this endpoint</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPOUT1</name>
+ <description>Captured state of endpoint's EasyDMA registers. Write '1' to clear.</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoData</name>
+ <description>EasyDMA registers have not been captured for this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DataDone</name>
+ <description>EasyDMA registers have been captured for this endpoint</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPOUT2</name>
+ <description>Captured state of endpoint's EasyDMA registers. Write '1' to clear.</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoData</name>
+ <description>EasyDMA registers have not been captured for this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DataDone</name>
+ <description>EasyDMA registers have been captured for this endpoint</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPOUT3</name>
+ <description>Captured state of endpoint's EasyDMA registers. Write '1' to clear.</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoData</name>
+ <description>EasyDMA registers have not been captured for this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DataDone</name>
+ <description>EasyDMA registers have been captured for this endpoint</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPOUT4</name>
+ <description>Captured state of endpoint's EasyDMA registers. Write '1' to clear.</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoData</name>
+ <description>EasyDMA registers have not been captured for this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DataDone</name>
+ <description>EasyDMA registers have been captured for this endpoint</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPOUT5</name>
+ <description>Captured state of endpoint's EasyDMA registers. Write '1' to clear.</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoData</name>
+ <description>EasyDMA registers have not been captured for this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DataDone</name>
+ <description>EasyDMA registers have been captured for this endpoint</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPOUT6</name>
+ <description>Captured state of endpoint's EasyDMA registers. Write '1' to clear.</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoData</name>
+ <description>EasyDMA registers have not been captured for this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DataDone</name>
+ <description>EasyDMA registers have been captured for this endpoint</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPOUT7</name>
+ <description>Captured state of endpoint's EasyDMA registers. Write '1' to clear.</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoData</name>
+ <description>EasyDMA registers have not been captured for this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DataDone</name>
+ <description>EasyDMA registers have been captured for this endpoint</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPOUT8</name>
+ <description>Captured state of endpoint's EasyDMA registers. Write '1' to clear.</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoData</name>
+ <description>EasyDMA registers have not been captured for this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DataDone</name>
+ <description>EasyDMA registers have been captured for this endpoint</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EPDATASTATUS</name>
+ <description>Provides information on which endpoint(s) an acknowledged data transfer has occurred (EPDATA event)</description>
+ <addressOffset>0x46C</addressOffset>
+ <access>read-write</access>
+ <modifiedWriteValues>oneToClear</modifiedWriteValues>
+ <fields>
+ <field>
+ <name>EPIN1</name>
+ <description>Acknowledged data transfer on this IN endpoint. Write '1' to clear.</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDone</name>
+ <description>No acknowledged data transfer on this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DataDone</name>
+ <description>Acknowledged data transfer on this endpoint has occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPIN2</name>
+ <description>Acknowledged data transfer on this IN endpoint. Write '1' to clear.</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDone</name>
+ <description>No acknowledged data transfer on this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DataDone</name>
+ <description>Acknowledged data transfer on this endpoint has occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPIN3</name>
+ <description>Acknowledged data transfer on this IN endpoint. Write '1' to clear.</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDone</name>
+ <description>No acknowledged data transfer on this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DataDone</name>
+ <description>Acknowledged data transfer on this endpoint has occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPIN4</name>
+ <description>Acknowledged data transfer on this IN endpoint. Write '1' to clear.</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDone</name>
+ <description>No acknowledged data transfer on this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DataDone</name>
+ <description>Acknowledged data transfer on this endpoint has occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPIN5</name>
+ <description>Acknowledged data transfer on this IN endpoint. Write '1' to clear.</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDone</name>
+ <description>No acknowledged data transfer on this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DataDone</name>
+ <description>Acknowledged data transfer on this endpoint has occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPIN6</name>
+ <description>Acknowledged data transfer on this IN endpoint. Write '1' to clear.</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDone</name>
+ <description>No acknowledged data transfer on this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DataDone</name>
+ <description>Acknowledged data transfer on this endpoint has occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPIN7</name>
+ <description>Acknowledged data transfer on this IN endpoint. Write '1' to clear.</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDone</name>
+ <description>No acknowledged data transfer on this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DataDone</name>
+ <description>Acknowledged data transfer on this endpoint has occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPOUT1</name>
+ <description>Acknowledged data transfer on this OUT endpoint. Write '1' to clear.</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotStarted</name>
+ <description>No acknowledged data transfer on this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Started</name>
+ <description>Acknowledged data transfer on this endpoint has occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPOUT2</name>
+ <description>Acknowledged data transfer on this OUT endpoint. Write '1' to clear.</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotStarted</name>
+ <description>No acknowledged data transfer on this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Started</name>
+ <description>Acknowledged data transfer on this endpoint has occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPOUT3</name>
+ <description>Acknowledged data transfer on this OUT endpoint. Write '1' to clear.</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotStarted</name>
+ <description>No acknowledged data transfer on this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Started</name>
+ <description>Acknowledged data transfer on this endpoint has occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPOUT4</name>
+ <description>Acknowledged data transfer on this OUT endpoint. Write '1' to clear.</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotStarted</name>
+ <description>No acknowledged data transfer on this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Started</name>
+ <description>Acknowledged data transfer on this endpoint has occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPOUT5</name>
+ <description>Acknowledged data transfer on this OUT endpoint. Write '1' to clear.</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotStarted</name>
+ <description>No acknowledged data transfer on this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Started</name>
+ <description>Acknowledged data transfer on this endpoint has occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPOUT6</name>
+ <description>Acknowledged data transfer on this OUT endpoint. Write '1' to clear.</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotStarted</name>
+ <description>No acknowledged data transfer on this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Started</name>
+ <description>Acknowledged data transfer on this endpoint has occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>EPOUT7</name>
+ <description>Acknowledged data transfer on this OUT endpoint. Write '1' to clear.</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotStarted</name>
+ <description>No acknowledged data transfer on this endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Started</name>
+ <description>Acknowledged data transfer on this endpoint has occurred</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>USBADDR</name>
+ <description>Device USB address</description>
+ <addressOffset>0x470</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>ADDR</name>
+ <description>Device USB address</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>BMREQUESTTYPE</name>
+ <description>SETUP data, byte 0, bmRequestType</description>
+ <addressOffset>0x480</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>RECIPIENT</name>
+ <description>Data transfer type</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Device</name>
+ <description>Device</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Interface</name>
+ <description>Interface</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Endpoint</name>
+ <description>Endpoint</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Other</name>
+ <description>Other</description>
+ <value>3</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>TYPE</name>
+ <description>Data transfer type</description>
+ <lsb>5</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Standard</name>
+ <description>Standard</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Class</name>
+ <description>Class</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Vendor</name>
+ <description>Vendor</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DIRECTION</name>
+ <description>Data transfer direction</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>HostToDevice</name>
+ <description>Host-to-device</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>DeviceToHost</name>
+ <description>Device-to-host</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>BREQUEST</name>
+ <description>SETUP data, byte 1, bRequest</description>
+ <addressOffset>0x484</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>BREQUEST</name>
+ <description>SETUP data, byte 1, bRequest. Values provided for standard requests only, user must implement class and vendor values.</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>STD_GET_STATUS</name>
+ <description>Standard request GET_STATUS</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>STD_CLEAR_FEATURE</name>
+ <description>Standard request CLEAR_FEATURE</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>STD_SET_FEATURE</name>
+ <description>Standard request SET_FEATURE</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>STD_SET_ADDRESS</name>
+ <description>Standard request SET_ADDRESS</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>STD_GET_DESCRIPTOR</name>
+ <description>Standard request GET_DESCRIPTOR</description>
+ <value>6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>STD_SET_DESCRIPTOR</name>
+ <description>Standard request SET_DESCRIPTOR</description>
+ <value>7</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>STD_GET_CONFIGURATION</name>
+ <description>Standard request GET_CONFIGURATION</description>
+ <value>8</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>STD_SET_CONFIGURATION</name>
+ <description>Standard request SET_CONFIGURATION</description>
+ <value>9</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>STD_GET_INTERFACE</name>
+ <description>Standard request GET_INTERFACE</description>
+ <value>10</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>STD_SET_INTERFACE</name>
+ <description>Standard request SET_INTERFACE</description>
+ <value>11</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>STD_SYNCH_FRAME</name>
+ <description>Standard request SYNCH_FRAME</description>
+ <value>12</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>WVALUEL</name>
+ <description>SETUP data, byte 2, LSB of wValue</description>
+ <addressOffset>0x488</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>WVALUEL</name>
+ <description>SETUP data, byte 2, LSB of wValue</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>WVALUEH</name>
+ <description>SETUP data, byte 3, MSB of wValue</description>
+ <addressOffset>0x48C</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>WVALUEH</name>
+ <description>SETUP data, byte 3, MSB of wValue</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>WINDEXL</name>
+ <description>SETUP data, byte 4, LSB of wIndex</description>
+ <addressOffset>0x490</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>WINDEXL</name>
+ <description>SETUP data, byte 4, LSB of wIndex</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>WINDEXH</name>
+ <description>SETUP data, byte 5, MSB of wIndex</description>
+ <addressOffset>0x494</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>WINDEXH</name>
+ <description>SETUP data, byte 5, MSB of wIndex</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>WLENGTHL</name>
+ <description>SETUP data, byte 6, LSB of wLength</description>
+ <addressOffset>0x498</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>WLENGTHL</name>
+ <description>SETUP data, byte 6, LSB of wLength</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>WLENGTHH</name>
+ <description>SETUP data, byte 7, MSB of wLength</description>
+ <addressOffset>0x49C</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>WLENGTHH</name>
+ <description>SETUP data, byte 7, MSB of wLength</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <name>SIZE</name>
+ <description>Unspecified</description>
+ <headerStructName>USBD_SIZE</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x4A0</addressOffset>
+ <register>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>EPOUT[%s]</name>
+ <description>Description collection: Number of bytes received last in the data stage of this OUT endpoint</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>SIZE</name>
+ <description>Number of bytes received last in the data stage of this OUT endpoint</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ISOOUT</name>
+ <description>Number of bytes received last on this ISO OUT data endpoint</description>
+ <addressOffset>0x020</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00010000</resetValue>
+ <fields>
+ <field>
+ <name>SIZE</name>
+ <description>Number of bytes received last on this ISO OUT data endpoint</description>
+ <lsb>0</lsb>
+ <msb>9</msb>
+ </field>
+ <field>
+ <name>ZERO</name>
+ <description>Zero-length data packet received</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Normal</name>
+ <description>No zero-length data received, use value in SIZE</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ZeroData</name>
+ <description>Zero-length data received, ignore value in SIZE</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <register>
+ <name>ENABLE</name>
+ <description>Enable USB</description>
+ <addressOffset>0x500</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ENABLE</name>
+ <description>Enable USB</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>USB peripheral is disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>USB peripheral is enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>USBPULLUP</name>
+ <description>Control of the USB pull-up</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CONNECT</name>
+ <description>Control of the USB pull-up on the D+ line</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Pull-up is disconnected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Pull-up is connected to D+</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DPDMVALUE</name>
+ <description>State D+ and D- lines will be forced into by the DPDMDRIVE task. The DPDMNODRIVE task reverts the control of the lines to MAC IP (no forcing).</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>STATE</name>
+ <description>State D+ and D- lines will be forced into by the DPDMDRIVE task</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Resume</name>
+ <description>D+ forced low, D- forced high (K state) for a timing preset in hardware (50 us or 5 ms, depending on bus state)</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>J</name>
+ <description>D+ forced high, D- forced low (J state)</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>K</name>
+ <description>D+ forced low, D- forced high (K state)</description>
+ <value>4</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DTOGGLE</name>
+ <description>Data toggle control and status</description>
+ <addressOffset>0x50C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000100</resetValue>
+ <fields>
+ <field>
+ <name>EP</name>
+ <description>Select bulk endpoint number</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ </field>
+ <field>
+ <name>IO</name>
+ <description>Selects IN or OUT endpoint</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Out</name>
+ <description>Selects OUT endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>In</name>
+ <description>Selects IN endpoint</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>VALUE</name>
+ <description>Data toggle value</description>
+ <lsb>8</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Nop</name>
+ <description>No action on data toggle when writing the register with this value</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Data0</name>
+ <description>Data toggle is DATA0 on endpoint set by EP and IO</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Data1</name>
+ <description>Data toggle is DATA1 on endpoint set by EP and IO</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EPINEN</name>
+ <description>Endpoint IN enable</description>
+ <addressOffset>0x510</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>IN0</name>
+ <description>Enable IN endpoint 0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable endpoint IN 0 (no response to IN tokens)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable endpoint IN 0 (response to IN tokens)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN1</name>
+ <description>Enable IN endpoint 1</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable endpoint IN 1 (no response to IN tokens)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable endpoint IN 1 (response to IN tokens)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN2</name>
+ <description>Enable IN endpoint 2</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable endpoint IN 2 (no response to IN tokens)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable endpoint IN 2 (response to IN tokens)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN3</name>
+ <description>Enable IN endpoint 3</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable endpoint IN 3 (no response to IN tokens)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable endpoint IN 3 (response to IN tokens)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN4</name>
+ <description>Enable IN endpoint 4</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable endpoint IN 4 (no response to IN tokens)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable endpoint IN 4 (response to IN tokens)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN5</name>
+ <description>Enable IN endpoint 5</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable endpoint IN 5 (no response to IN tokens)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable endpoint IN 5 (response to IN tokens)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN6</name>
+ <description>Enable IN endpoint 6</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable endpoint IN 6 (no response to IN tokens)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable endpoint IN 6 (response to IN tokens)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>IN7</name>
+ <description>Enable IN endpoint 7</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable endpoint IN 7 (no response to IN tokens)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable endpoint IN 7 (response to IN tokens)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ISOIN</name>
+ <description>Enable ISO IN endpoint</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable ISO IN endpoint 8</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable ISO IN endpoint 8</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EPOUTEN</name>
+ <description>Endpoint OUT enable</description>
+ <addressOffset>0x514</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
+ <field>
+ <name>OUT0</name>
+ <description>Enable OUT endpoint 0</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable endpoint OUT 0 (no response to OUT tokens)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable endpoint OUT 0 (response to OUT tokens)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OUT1</name>
+ <description>Enable OUT endpoint 1</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable endpoint OUT 1 (no response to OUT tokens)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable endpoint OUT 1 (response to OUT tokens)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OUT2</name>
+ <description>Enable OUT endpoint 2</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable endpoint OUT 2 (no response to OUT tokens)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable endpoint OUT 2 (response to OUT tokens)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OUT3</name>
+ <description>Enable OUT endpoint 3</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable endpoint OUT 3 (no response to OUT tokens)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable endpoint OUT 3 (response to OUT tokens)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OUT4</name>
+ <description>Enable OUT endpoint 4</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable endpoint OUT 4 (no response to OUT tokens)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable endpoint OUT 4 (response to OUT tokens)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OUT5</name>
+ <description>Enable OUT endpoint 5</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable endpoint OUT 5 (no response to OUT tokens)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable endpoint OUT 5 (response to OUT tokens)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OUT6</name>
+ <description>Enable OUT endpoint 6</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable endpoint OUT 6 (no response to OUT tokens)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable endpoint OUT 6 (response to OUT tokens)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OUT7</name>
+ <description>Enable OUT endpoint 7</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable endpoint OUT 7 (no response to OUT tokens)</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable endpoint OUT 7 (response to OUT tokens)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ISOOUT</name>
+ <description>Enable ISO OUT endpoint 8</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable ISO OUT endpoint 8</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable ISO OUT endpoint 8</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EPSTALL</name>
+ <description>STALL endpoints</description>
+ <addressOffset>0x518</addressOffset>
+ <access>write-only</access>
+ <resetValue>0x00000000</resetValue>
+ <readAction>modifyExternal</readAction>
+ <fields>
+ <field>
+ <name>EP</name>
+ <description>Select endpoint number</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ </field>
+ <field>
+ <name>IO</name>
+ <description>Selects IN or OUT endpoint</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Out</name>
+ <description>Selects OUT endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>In</name>
+ <description>Selects IN endpoint</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>STALL</name>
+ <description>Stall selected endpoint</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>UnStall</name>
+ <description>Don't stall selected endpoint</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Stall</name>
+ <description>Stall selected endpoint</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ISOSPLIT</name>
+ <description>Controls the split of ISO buffers</description>
+ <addressOffset>0x51C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>SPLIT</name>
+ <description>Controls the split of ISO buffers</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>OneDir</name>
+ <description>Full buffer dedicated to either iso IN or OUT</description>
+ <value>0x0000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>HalfIN</name>
+ <description>Lower half for IN, upper half for OUT</description>
+ <value>0x0080</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>FRAMECNTR</name>
+ <description>Returns the current value of the start of frame counter</description>
+ <addressOffset>0x520</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>FRAMECNTR</name>
+ <description>Returns the current value of the start of frame counter</description>
+ <lsb>0</lsb>
+ <msb>10</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LOWPOWER</name>
+ <description>Controls USBD peripheral low power mode during USB suspend</description>
+ <addressOffset>0x52C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>LOWPOWER</name>
+ <description>Controls USBD peripheral low-power mode during USB suspend</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>ForceNormal</name>
+ <description>Software must write this value to exit low power mode and before performing a remote wake-up</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>LowPower</name>
+ <description>Software must write this value to enter low power mode after DMA and software have finished interacting with the USB peripheral</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ISOINCONFIG</name>
+ <description>Controls the response of the ISO IN endpoint to an IN token when no data is ready to be sent</description>
+ <addressOffset>0x530</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>RESPONSE</name>
+ <description>Controls the response of the ISO IN endpoint to an IN token when no data is ready to be sent</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoResp</name>
+ <description>Endpoint does not respond in that case</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ZeroData</name>
+ <description>Endpoint responds with a zero-length data packet in that case</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <cluster>
+ <dim>8</dim>
+ <dimIncrement>0x014</dimIncrement>
+ <name>EPIN[%s]</name>
+ <description>Unspecified</description>
+ <headerStructName>USBD_EPIN</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x600</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>Description cluster: Data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Description cluster: Maximum number of bytes to transfer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes to transfer</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Description cluster: Number of bytes transferred in the last transaction</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>ISOIN</name>
+ <description>Unspecified</description>
+ <headerStructName>USBD_ISOIN</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x6A0</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes to transfer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes to transfer</description>
+ <lsb>0</lsb>
+ <msb>9</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction</description>
+ <lsb>0</lsb>
+ <msb>9</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <dim>8</dim>
+ <dimIncrement>0x014</dimIncrement>
+ <name>EPOUT[%s]</name>
+ <description>Unspecified</description>
+ <headerStructName>USBD_EPOUT</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x700</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>Description cluster: Data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Description cluster: Maximum number of bytes to transfer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes to transfer</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Description cluster: Number of bytes transferred in the last transaction</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ <cluster>
+ <name>ISOOUT</name>
+ <description>Unspecified</description>
+ <headerStructName>USBD_ISOOUT</headerStructName>
+ <access>read-write</access>
+ <addressOffset>0x7A0</addressOffset>
+ <register>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>PTR</name>
+ <description>Data pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes to transfer</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXCNT</name>
+ <description>Maximum number of bytes to transfer</description>
+ <lsb>0</lsb>
+ <msb>9</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>AMOUNT</name>
+ <description>Number of bytes transferred in the last transaction</description>
+ <lsb>0</lsb>
+ <msb>9</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
+ </registers>
+ </peripheral>
+ <peripheral derivedFrom="UARTE0">
+ <name>UARTE1</name>
+ <description>UART with EasyDMA 1</description>
+ <baseAddress>0x40028000</baseAddress>
+ <interrupt>
+ <name>UARTE1</name>
+ <value>40</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="PWM0">
+ <name>PWM3</name>
+ <description>Pulse width modulation unit 3</description>
+ <baseAddress>0x4002D000</baseAddress>
+ <interrupt>
+ <name>PWM3</name>
+ <value>45</value>
+ </interrupt>
+ </peripheral>
+ <peripheral derivedFrom="SPIM0">
+ <name>SPIM3</name>
+ <description>Serial Peripheral Interface Master with EasyDMA 3</description>
+ <baseAddress>0x4002F000</baseAddress>
+ <interrupt>
+ <name>SPIM3</name>
+ <value>47</value>
+ </interrupt>
+ </peripheral>
+ </peripherals>
+</device>
\ No newline at end of file
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf52833_bitfields.h b/third_party/NordicSemiconductor/nrfx/mdk/nrf52833_bitfields.h
new file mode 100644
index 0000000..cefc6be
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf52833_bitfields.h
@@ -0,0 +1,17053 @@
+/*
+
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+
+2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ contributors may be used to endorse or promote products derived from this
+ software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
+
+*/
+
+#ifndef __NRF52833_BITS_H
+#define __NRF52833_BITS_H
+
+/*lint ++flb "Enter library region" */
+
+/* Peripheral: AAR */
+/* Description: Accelerated Address Resolver */
+
+/* Register: AAR_TASKS_START */
+/* Description: Start resolving addresses based on IRKs specified in the IRK data structure */
+
+/* Bit 0 : Start resolving addresses based on IRKs specified in the IRK data structure */
+#define AAR_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */
+#define AAR_TASKS_START_TASKS_START_Msk (0x1UL << AAR_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */
+#define AAR_TASKS_START_TASKS_START_Trigger (1UL) /*!< Trigger task */
+
+/* Register: AAR_TASKS_STOP */
+/* Description: Stop resolving addresses */
+
+/* Bit 0 : Stop resolving addresses */
+#define AAR_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define AAR_TASKS_STOP_TASKS_STOP_Msk (0x1UL << AAR_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define AAR_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: AAR_EVENTS_END */
+/* Description: Address resolution procedure complete */
+
+/* Bit 0 : Address resolution procedure complete */
+#define AAR_EVENTS_END_EVENTS_END_Pos (0UL) /*!< Position of EVENTS_END field. */
+#define AAR_EVENTS_END_EVENTS_END_Msk (0x1UL << AAR_EVENTS_END_EVENTS_END_Pos) /*!< Bit mask of EVENTS_END field. */
+#define AAR_EVENTS_END_EVENTS_END_NotGenerated (0UL) /*!< Event not generated */
+#define AAR_EVENTS_END_EVENTS_END_Generated (1UL) /*!< Event generated */
+
+/* Register: AAR_EVENTS_RESOLVED */
+/* Description: Address resolved */
+
+/* Bit 0 : Address resolved */
+#define AAR_EVENTS_RESOLVED_EVENTS_RESOLVED_Pos (0UL) /*!< Position of EVENTS_RESOLVED field. */
+#define AAR_EVENTS_RESOLVED_EVENTS_RESOLVED_Msk (0x1UL << AAR_EVENTS_RESOLVED_EVENTS_RESOLVED_Pos) /*!< Bit mask of EVENTS_RESOLVED field. */
+#define AAR_EVENTS_RESOLVED_EVENTS_RESOLVED_NotGenerated (0UL) /*!< Event not generated */
+#define AAR_EVENTS_RESOLVED_EVENTS_RESOLVED_Generated (1UL) /*!< Event generated */
+
+/* Register: AAR_EVENTS_NOTRESOLVED */
+/* Description: Address not resolved */
+
+/* Bit 0 : Address not resolved */
+#define AAR_EVENTS_NOTRESOLVED_EVENTS_NOTRESOLVED_Pos (0UL) /*!< Position of EVENTS_NOTRESOLVED field. */
+#define AAR_EVENTS_NOTRESOLVED_EVENTS_NOTRESOLVED_Msk (0x1UL << AAR_EVENTS_NOTRESOLVED_EVENTS_NOTRESOLVED_Pos) /*!< Bit mask of EVENTS_NOTRESOLVED field. */
+#define AAR_EVENTS_NOTRESOLVED_EVENTS_NOTRESOLVED_NotGenerated (0UL) /*!< Event not generated */
+#define AAR_EVENTS_NOTRESOLVED_EVENTS_NOTRESOLVED_Generated (1UL) /*!< Event generated */
+
+/* Register: AAR_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 2 : Write '1' to enable interrupt for event NOTRESOLVED */
+#define AAR_INTENSET_NOTRESOLVED_Pos (2UL) /*!< Position of NOTRESOLVED field. */
+#define AAR_INTENSET_NOTRESOLVED_Msk (0x1UL << AAR_INTENSET_NOTRESOLVED_Pos) /*!< Bit mask of NOTRESOLVED field. */
+#define AAR_INTENSET_NOTRESOLVED_Disabled (0UL) /*!< Read: Disabled */
+#define AAR_INTENSET_NOTRESOLVED_Enabled (1UL) /*!< Read: Enabled */
+#define AAR_INTENSET_NOTRESOLVED_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event RESOLVED */
+#define AAR_INTENSET_RESOLVED_Pos (1UL) /*!< Position of RESOLVED field. */
+#define AAR_INTENSET_RESOLVED_Msk (0x1UL << AAR_INTENSET_RESOLVED_Pos) /*!< Bit mask of RESOLVED field. */
+#define AAR_INTENSET_RESOLVED_Disabled (0UL) /*!< Read: Disabled */
+#define AAR_INTENSET_RESOLVED_Enabled (1UL) /*!< Read: Enabled */
+#define AAR_INTENSET_RESOLVED_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event END */
+#define AAR_INTENSET_END_Pos (0UL) /*!< Position of END field. */
+#define AAR_INTENSET_END_Msk (0x1UL << AAR_INTENSET_END_Pos) /*!< Bit mask of END field. */
+#define AAR_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */
+#define AAR_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */
+#define AAR_INTENSET_END_Set (1UL) /*!< Enable */
+
+/* Register: AAR_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 2 : Write '1' to disable interrupt for event NOTRESOLVED */
+#define AAR_INTENCLR_NOTRESOLVED_Pos (2UL) /*!< Position of NOTRESOLVED field. */
+#define AAR_INTENCLR_NOTRESOLVED_Msk (0x1UL << AAR_INTENCLR_NOTRESOLVED_Pos) /*!< Bit mask of NOTRESOLVED field. */
+#define AAR_INTENCLR_NOTRESOLVED_Disabled (0UL) /*!< Read: Disabled */
+#define AAR_INTENCLR_NOTRESOLVED_Enabled (1UL) /*!< Read: Enabled */
+#define AAR_INTENCLR_NOTRESOLVED_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event RESOLVED */
+#define AAR_INTENCLR_RESOLVED_Pos (1UL) /*!< Position of RESOLVED field. */
+#define AAR_INTENCLR_RESOLVED_Msk (0x1UL << AAR_INTENCLR_RESOLVED_Pos) /*!< Bit mask of RESOLVED field. */
+#define AAR_INTENCLR_RESOLVED_Disabled (0UL) /*!< Read: Disabled */
+#define AAR_INTENCLR_RESOLVED_Enabled (1UL) /*!< Read: Enabled */
+#define AAR_INTENCLR_RESOLVED_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event END */
+#define AAR_INTENCLR_END_Pos (0UL) /*!< Position of END field. */
+#define AAR_INTENCLR_END_Msk (0x1UL << AAR_INTENCLR_END_Pos) /*!< Bit mask of END field. */
+#define AAR_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */
+#define AAR_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */
+#define AAR_INTENCLR_END_Clear (1UL) /*!< Disable */
+
+/* Register: AAR_STATUS */
+/* Description: Resolution status */
+
+/* Bits 3..0 : The IRK that was used last time an address was resolved */
+#define AAR_STATUS_STATUS_Pos (0UL) /*!< Position of STATUS field. */
+#define AAR_STATUS_STATUS_Msk (0xFUL << AAR_STATUS_STATUS_Pos) /*!< Bit mask of STATUS field. */
+
+/* Register: AAR_ENABLE */
+/* Description: Enable AAR */
+
+/* Bits 1..0 : Enable or disable AAR */
+#define AAR_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define AAR_ENABLE_ENABLE_Msk (0x3UL << AAR_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define AAR_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */
+#define AAR_ENABLE_ENABLE_Enabled (3UL) /*!< Enable */
+
+/* Register: AAR_NIRK */
+/* Description: Number of IRKs */
+
+/* Bits 4..0 : Number of Identity root keys available in the IRK data structure */
+#define AAR_NIRK_NIRK_Pos (0UL) /*!< Position of NIRK field. */
+#define AAR_NIRK_NIRK_Msk (0x1FUL << AAR_NIRK_NIRK_Pos) /*!< Bit mask of NIRK field. */
+
+/* Register: AAR_IRKPTR */
+/* Description: Pointer to IRK data structure */
+
+/* Bits 31..0 : Pointer to the IRK data structure */
+#define AAR_IRKPTR_IRKPTR_Pos (0UL) /*!< Position of IRKPTR field. */
+#define AAR_IRKPTR_IRKPTR_Msk (0xFFFFFFFFUL << AAR_IRKPTR_IRKPTR_Pos) /*!< Bit mask of IRKPTR field. */
+
+/* Register: AAR_ADDRPTR */
+/* Description: Pointer to the resolvable address */
+
+/* Bits 31..0 : Pointer to the resolvable address (6-bytes) */
+#define AAR_ADDRPTR_ADDRPTR_Pos (0UL) /*!< Position of ADDRPTR field. */
+#define AAR_ADDRPTR_ADDRPTR_Msk (0xFFFFFFFFUL << AAR_ADDRPTR_ADDRPTR_Pos) /*!< Bit mask of ADDRPTR field. */
+
+/* Register: AAR_SCRATCHPTR */
+/* Description: Pointer to data area used for temporary storage */
+
+/* Bits 31..0 : Pointer to a scratch data area used for temporary storage during resolution. A space of minimum 3 bytes must be reserved. */
+#define AAR_SCRATCHPTR_SCRATCHPTR_Pos (0UL) /*!< Position of SCRATCHPTR field. */
+#define AAR_SCRATCHPTR_SCRATCHPTR_Msk (0xFFFFFFFFUL << AAR_SCRATCHPTR_SCRATCHPTR_Pos) /*!< Bit mask of SCRATCHPTR field. */
+
+
+/* Peripheral: ACL */
+/* Description: Access control lists */
+
+/* Register: ACL_ACL_ADDR */
+/* Description: Description cluster: Configure the word-aligned start address of region n to protect */
+
+/* Bits 31..0 : Valid word-aligned start address of region n to protect. Address must point to a flash page boundary. */
+#define ACL_ACL_ADDR_ADDR_Pos (0UL) /*!< Position of ADDR field. */
+#define ACL_ACL_ADDR_ADDR_Msk (0xFFFFFFFFUL << ACL_ACL_ADDR_ADDR_Pos) /*!< Bit mask of ADDR field. */
+
+/* Register: ACL_ACL_SIZE */
+/* Description: Description cluster: Size of region to protect counting from address ACL[n].ADDR. Write '0' as no effect. */
+
+/* Bits 31..0 : Size of flash region n in bytes. Must be a multiple of the flash page size, and the maximum region size is limited to 512 kB. */
+#define ACL_ACL_SIZE_SIZE_Pos (0UL) /*!< Position of SIZE field. */
+#define ACL_ACL_SIZE_SIZE_Msk (0xFFFFFFFFUL << ACL_ACL_SIZE_SIZE_Pos) /*!< Bit mask of SIZE field. */
+
+/* Register: ACL_ACL_PERM */
+/* Description: Description cluster: Access permissions for region n as defined by start address ACL[n].ADDR and size ACL[n].SIZE */
+
+/* Bit 2 : Configure read permissions for region n. Write '0' has no effect. */
+#define ACL_ACL_PERM_READ_Pos (2UL) /*!< Position of READ field. */
+#define ACL_ACL_PERM_READ_Msk (0x1UL << ACL_ACL_PERM_READ_Pos) /*!< Bit mask of READ field. */
+#define ACL_ACL_PERM_READ_Enable (0UL) /*!< Allow read instructions to region n */
+#define ACL_ACL_PERM_READ_Disable (1UL) /*!< Block read instructions to region n */
+
+/* Bit 1 : Configure write and erase permissions for region n. Write '0' has no effect. */
+#define ACL_ACL_PERM_WRITE_Pos (1UL) /*!< Position of WRITE field. */
+#define ACL_ACL_PERM_WRITE_Msk (0x1UL << ACL_ACL_PERM_WRITE_Pos) /*!< Bit mask of WRITE field. */
+#define ACL_ACL_PERM_WRITE_Enable (0UL) /*!< Allow write and erase instructions to region n */
+#define ACL_ACL_PERM_WRITE_Disable (1UL) /*!< Block write and erase instructions to region n */
+
+
+/* Peripheral: CCM */
+/* Description: AES CCM Mode Encryption */
+
+/* Register: CCM_TASKS_KSGEN */
+/* Description: Start generation of key-stream. This operation will stop by itself when completed. */
+
+/* Bit 0 : Start generation of key-stream. This operation will stop by itself when completed. */
+#define CCM_TASKS_KSGEN_TASKS_KSGEN_Pos (0UL) /*!< Position of TASKS_KSGEN field. */
+#define CCM_TASKS_KSGEN_TASKS_KSGEN_Msk (0x1UL << CCM_TASKS_KSGEN_TASKS_KSGEN_Pos) /*!< Bit mask of TASKS_KSGEN field. */
+#define CCM_TASKS_KSGEN_TASKS_KSGEN_Trigger (1UL) /*!< Trigger task */
+
+/* Register: CCM_TASKS_CRYPT */
+/* Description: Start encryption/decryption. This operation will stop by itself when completed. */
+
+/* Bit 0 : Start encryption/decryption. This operation will stop by itself when completed. */
+#define CCM_TASKS_CRYPT_TASKS_CRYPT_Pos (0UL) /*!< Position of TASKS_CRYPT field. */
+#define CCM_TASKS_CRYPT_TASKS_CRYPT_Msk (0x1UL << CCM_TASKS_CRYPT_TASKS_CRYPT_Pos) /*!< Bit mask of TASKS_CRYPT field. */
+#define CCM_TASKS_CRYPT_TASKS_CRYPT_Trigger (1UL) /*!< Trigger task */
+
+/* Register: CCM_TASKS_STOP */
+/* Description: Stop encryption/decryption */
+
+/* Bit 0 : Stop encryption/decryption */
+#define CCM_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define CCM_TASKS_STOP_TASKS_STOP_Msk (0x1UL << CCM_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define CCM_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: CCM_TASKS_RATEOVERRIDE */
+/* Description: Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE register for any ongoing encryption/decryption */
+
+/* Bit 0 : Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE register for any ongoing encryption/decryption */
+#define CCM_TASKS_RATEOVERRIDE_TASKS_RATEOVERRIDE_Pos (0UL) /*!< Position of TASKS_RATEOVERRIDE field. */
+#define CCM_TASKS_RATEOVERRIDE_TASKS_RATEOVERRIDE_Msk (0x1UL << CCM_TASKS_RATEOVERRIDE_TASKS_RATEOVERRIDE_Pos) /*!< Bit mask of TASKS_RATEOVERRIDE field. */
+#define CCM_TASKS_RATEOVERRIDE_TASKS_RATEOVERRIDE_Trigger (1UL) /*!< Trigger task */
+
+/* Register: CCM_EVENTS_ENDKSGEN */
+/* Description: Key-stream generation complete */
+
+/* Bit 0 : Key-stream generation complete */
+#define CCM_EVENTS_ENDKSGEN_EVENTS_ENDKSGEN_Pos (0UL) /*!< Position of EVENTS_ENDKSGEN field. */
+#define CCM_EVENTS_ENDKSGEN_EVENTS_ENDKSGEN_Msk (0x1UL << CCM_EVENTS_ENDKSGEN_EVENTS_ENDKSGEN_Pos) /*!< Bit mask of EVENTS_ENDKSGEN field. */
+#define CCM_EVENTS_ENDKSGEN_EVENTS_ENDKSGEN_NotGenerated (0UL) /*!< Event not generated */
+#define CCM_EVENTS_ENDKSGEN_EVENTS_ENDKSGEN_Generated (1UL) /*!< Event generated */
+
+/* Register: CCM_EVENTS_ENDCRYPT */
+/* Description: Encrypt/decrypt complete */
+
+/* Bit 0 : Encrypt/decrypt complete */
+#define CCM_EVENTS_ENDCRYPT_EVENTS_ENDCRYPT_Pos (0UL) /*!< Position of EVENTS_ENDCRYPT field. */
+#define CCM_EVENTS_ENDCRYPT_EVENTS_ENDCRYPT_Msk (0x1UL << CCM_EVENTS_ENDCRYPT_EVENTS_ENDCRYPT_Pos) /*!< Bit mask of EVENTS_ENDCRYPT field. */
+#define CCM_EVENTS_ENDCRYPT_EVENTS_ENDCRYPT_NotGenerated (0UL) /*!< Event not generated */
+#define CCM_EVENTS_ENDCRYPT_EVENTS_ENDCRYPT_Generated (1UL) /*!< Event generated */
+
+/* Register: CCM_EVENTS_ERROR */
+/* Description: Deprecated register - CCM error event */
+
+/* Bit 0 : Deprecated field - CCM error event */
+#define CCM_EVENTS_ERROR_EVENTS_ERROR_Pos (0UL) /*!< Position of EVENTS_ERROR field. */
+#define CCM_EVENTS_ERROR_EVENTS_ERROR_Msk (0x1UL << CCM_EVENTS_ERROR_EVENTS_ERROR_Pos) /*!< Bit mask of EVENTS_ERROR field. */
+#define CCM_EVENTS_ERROR_EVENTS_ERROR_NotGenerated (0UL) /*!< Event not generated */
+#define CCM_EVENTS_ERROR_EVENTS_ERROR_Generated (1UL) /*!< Event generated */
+
+/* Register: CCM_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 0 : Shortcut between event ENDKSGEN and task CRYPT */
+#define CCM_SHORTS_ENDKSGEN_CRYPT_Pos (0UL) /*!< Position of ENDKSGEN_CRYPT field. */
+#define CCM_SHORTS_ENDKSGEN_CRYPT_Msk (0x1UL << CCM_SHORTS_ENDKSGEN_CRYPT_Pos) /*!< Bit mask of ENDKSGEN_CRYPT field. */
+#define CCM_SHORTS_ENDKSGEN_CRYPT_Disabled (0UL) /*!< Disable shortcut */
+#define CCM_SHORTS_ENDKSGEN_CRYPT_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: CCM_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 2 : Deprecated intsetfield - Write '1' to enable interrupt for event ERROR */
+#define CCM_INTENSET_ERROR_Pos (2UL) /*!< Position of ERROR field. */
+#define CCM_INTENSET_ERROR_Msk (0x1UL << CCM_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define CCM_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */
+#define CCM_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */
+#define CCM_INTENSET_ERROR_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event ENDCRYPT */
+#define CCM_INTENSET_ENDCRYPT_Pos (1UL) /*!< Position of ENDCRYPT field. */
+#define CCM_INTENSET_ENDCRYPT_Msk (0x1UL << CCM_INTENSET_ENDCRYPT_Pos) /*!< Bit mask of ENDCRYPT field. */
+#define CCM_INTENSET_ENDCRYPT_Disabled (0UL) /*!< Read: Disabled */
+#define CCM_INTENSET_ENDCRYPT_Enabled (1UL) /*!< Read: Enabled */
+#define CCM_INTENSET_ENDCRYPT_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event ENDKSGEN */
+#define CCM_INTENSET_ENDKSGEN_Pos (0UL) /*!< Position of ENDKSGEN field. */
+#define CCM_INTENSET_ENDKSGEN_Msk (0x1UL << CCM_INTENSET_ENDKSGEN_Pos) /*!< Bit mask of ENDKSGEN field. */
+#define CCM_INTENSET_ENDKSGEN_Disabled (0UL) /*!< Read: Disabled */
+#define CCM_INTENSET_ENDKSGEN_Enabled (1UL) /*!< Read: Enabled */
+#define CCM_INTENSET_ENDKSGEN_Set (1UL) /*!< Enable */
+
+/* Register: CCM_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 2 : Deprecated intclrfield - Write '1' to disable interrupt for event ERROR */
+#define CCM_INTENCLR_ERROR_Pos (2UL) /*!< Position of ERROR field. */
+#define CCM_INTENCLR_ERROR_Msk (0x1UL << CCM_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define CCM_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */
+#define CCM_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */
+#define CCM_INTENCLR_ERROR_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event ENDCRYPT */
+#define CCM_INTENCLR_ENDCRYPT_Pos (1UL) /*!< Position of ENDCRYPT field. */
+#define CCM_INTENCLR_ENDCRYPT_Msk (0x1UL << CCM_INTENCLR_ENDCRYPT_Pos) /*!< Bit mask of ENDCRYPT field. */
+#define CCM_INTENCLR_ENDCRYPT_Disabled (0UL) /*!< Read: Disabled */
+#define CCM_INTENCLR_ENDCRYPT_Enabled (1UL) /*!< Read: Enabled */
+#define CCM_INTENCLR_ENDCRYPT_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event ENDKSGEN */
+#define CCM_INTENCLR_ENDKSGEN_Pos (0UL) /*!< Position of ENDKSGEN field. */
+#define CCM_INTENCLR_ENDKSGEN_Msk (0x1UL << CCM_INTENCLR_ENDKSGEN_Pos) /*!< Bit mask of ENDKSGEN field. */
+#define CCM_INTENCLR_ENDKSGEN_Disabled (0UL) /*!< Read: Disabled */
+#define CCM_INTENCLR_ENDKSGEN_Enabled (1UL) /*!< Read: Enabled */
+#define CCM_INTENCLR_ENDKSGEN_Clear (1UL) /*!< Disable */
+
+/* Register: CCM_MICSTATUS */
+/* Description: MIC check result */
+
+/* Bit 0 : The result of the MIC check performed during the previous decryption operation */
+#define CCM_MICSTATUS_MICSTATUS_Pos (0UL) /*!< Position of MICSTATUS field. */
+#define CCM_MICSTATUS_MICSTATUS_Msk (0x1UL << CCM_MICSTATUS_MICSTATUS_Pos) /*!< Bit mask of MICSTATUS field. */
+#define CCM_MICSTATUS_MICSTATUS_CheckFailed (0UL) /*!< MIC check failed */
+#define CCM_MICSTATUS_MICSTATUS_CheckPassed (1UL) /*!< MIC check passed */
+
+/* Register: CCM_ENABLE */
+/* Description: Enable */
+
+/* Bits 1..0 : Enable or disable CCM */
+#define CCM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define CCM_ENABLE_ENABLE_Msk (0x3UL << CCM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define CCM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */
+#define CCM_ENABLE_ENABLE_Enabled (2UL) /*!< Enable */
+
+/* Register: CCM_MODE */
+/* Description: Operation mode */
+
+/* Bit 24 : Packet length configuration */
+#define CCM_MODE_LENGTH_Pos (24UL) /*!< Position of LENGTH field. */
+#define CCM_MODE_LENGTH_Msk (0x1UL << CCM_MODE_LENGTH_Pos) /*!< Bit mask of LENGTH field. */
+#define CCM_MODE_LENGTH_Default (0UL) /*!< Default length. Effective length of LENGTH field in encrypted/decrypted packet is 5 bits. A key-stream for packet payloads up to 27 bytes will be generated. */
+#define CCM_MODE_LENGTH_Extended (1UL) /*!< Extended length. Effective length of LENGTH field in encrypted/decrypted packet is 8 bits. A key-stream for packet payloads up to MAXPACKETSIZE bytes will be generated. */
+
+/* Bits 17..16 : Radio data rate that the CCM shall run synchronous with */
+#define CCM_MODE_DATARATE_Pos (16UL) /*!< Position of DATARATE field. */
+#define CCM_MODE_DATARATE_Msk (0x3UL << CCM_MODE_DATARATE_Pos) /*!< Bit mask of DATARATE field. */
+#define CCM_MODE_DATARATE_1Mbit (0UL) /*!< 1 Mbps */
+#define CCM_MODE_DATARATE_2Mbit (1UL) /*!< 2 Mbps */
+#define CCM_MODE_DATARATE_125Kbps (2UL) /*!< 125 Kbps */
+#define CCM_MODE_DATARATE_500Kbps (3UL) /*!< 500 Kbps */
+
+/* Bit 0 : The mode of operation to be used. The settings in this register apply whenever either the KSGEN or CRYPT tasks are triggered. */
+#define CCM_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */
+#define CCM_MODE_MODE_Msk (0x1UL << CCM_MODE_MODE_Pos) /*!< Bit mask of MODE field. */
+#define CCM_MODE_MODE_Encryption (0UL) /*!< AES CCM packet encryption mode */
+#define CCM_MODE_MODE_Decryption (1UL) /*!< AES CCM packet decryption mode */
+
+/* Register: CCM_CNFPTR */
+/* Description: Pointer to data structure holding AES key and NONCE vector */
+
+/* Bits 31..0 : Pointer to the data structure holding the AES key and the CCM NONCE vector (see Table 1 CCM data structure overview) */
+#define CCM_CNFPTR_CNFPTR_Pos (0UL) /*!< Position of CNFPTR field. */
+#define CCM_CNFPTR_CNFPTR_Msk (0xFFFFFFFFUL << CCM_CNFPTR_CNFPTR_Pos) /*!< Bit mask of CNFPTR field. */
+
+/* Register: CCM_INPTR */
+/* Description: Input pointer */
+
+/* Bits 31..0 : Input pointer */
+#define CCM_INPTR_INPTR_Pos (0UL) /*!< Position of INPTR field. */
+#define CCM_INPTR_INPTR_Msk (0xFFFFFFFFUL << CCM_INPTR_INPTR_Pos) /*!< Bit mask of INPTR field. */
+
+/* Register: CCM_OUTPTR */
+/* Description: Output pointer */
+
+/* Bits 31..0 : Output pointer */
+#define CCM_OUTPTR_OUTPTR_Pos (0UL) /*!< Position of OUTPTR field. */
+#define CCM_OUTPTR_OUTPTR_Msk (0xFFFFFFFFUL << CCM_OUTPTR_OUTPTR_Pos) /*!< Bit mask of OUTPTR field. */
+
+/* Register: CCM_SCRATCHPTR */
+/* Description: Pointer to data area used for temporary storage */
+
+/* Bits 31..0 : Pointer to a scratch data area used for temporary storage during key-stream generation,
+ MIC generation and encryption/decryption. */
+#define CCM_SCRATCHPTR_SCRATCHPTR_Pos (0UL) /*!< Position of SCRATCHPTR field. */
+#define CCM_SCRATCHPTR_SCRATCHPTR_Msk (0xFFFFFFFFUL << CCM_SCRATCHPTR_SCRATCHPTR_Pos) /*!< Bit mask of SCRATCHPTR field. */
+
+/* Register: CCM_MAXPACKETSIZE */
+/* Description: Length of key-stream generated when MODE.LENGTH = Extended. */
+
+/* Bits 7..0 : Length of key-stream generated when MODE.LENGTH = Extended. This value must be greater or equal to the subsequent packet payload to be encrypted/decrypted. */
+#define CCM_MAXPACKETSIZE_MAXPACKETSIZE_Pos (0UL) /*!< Position of MAXPACKETSIZE field. */
+#define CCM_MAXPACKETSIZE_MAXPACKETSIZE_Msk (0xFFUL << CCM_MAXPACKETSIZE_MAXPACKETSIZE_Pos) /*!< Bit mask of MAXPACKETSIZE field. */
+
+/* Register: CCM_RATEOVERRIDE */
+/* Description: Data rate override setting. */
+
+/* Bits 1..0 : Data rate override setting. */
+#define CCM_RATEOVERRIDE_RATEOVERRIDE_Pos (0UL) /*!< Position of RATEOVERRIDE field. */
+#define CCM_RATEOVERRIDE_RATEOVERRIDE_Msk (0x3UL << CCM_RATEOVERRIDE_RATEOVERRIDE_Pos) /*!< Bit mask of RATEOVERRIDE field. */
+#define CCM_RATEOVERRIDE_RATEOVERRIDE_1Mbit (0UL) /*!< 1 Mbps */
+#define CCM_RATEOVERRIDE_RATEOVERRIDE_2Mbit (1UL) /*!< 2 Mbps */
+#define CCM_RATEOVERRIDE_RATEOVERRIDE_125Kbps (2UL) /*!< 125 Kbps */
+#define CCM_RATEOVERRIDE_RATEOVERRIDE_500Kbps (3UL) /*!< 500 Kbps */
+
+
+/* Peripheral: CLOCK */
+/* Description: Clock control */
+
+/* Register: CLOCK_TASKS_HFCLKSTART */
+/* Description: Start HFXO crystal oscillator */
+
+/* Bit 0 : Start HFXO crystal oscillator */
+#define CLOCK_TASKS_HFCLKSTART_TASKS_HFCLKSTART_Pos (0UL) /*!< Position of TASKS_HFCLKSTART field. */
+#define CLOCK_TASKS_HFCLKSTART_TASKS_HFCLKSTART_Msk (0x1UL << CLOCK_TASKS_HFCLKSTART_TASKS_HFCLKSTART_Pos) /*!< Bit mask of TASKS_HFCLKSTART field. */
+#define CLOCK_TASKS_HFCLKSTART_TASKS_HFCLKSTART_Trigger (1UL) /*!< Trigger task */
+
+/* Register: CLOCK_TASKS_HFCLKSTOP */
+/* Description: Stop HFXO crystal oscillator */
+
+/* Bit 0 : Stop HFXO crystal oscillator */
+#define CLOCK_TASKS_HFCLKSTOP_TASKS_HFCLKSTOP_Pos (0UL) /*!< Position of TASKS_HFCLKSTOP field. */
+#define CLOCK_TASKS_HFCLKSTOP_TASKS_HFCLKSTOP_Msk (0x1UL << CLOCK_TASKS_HFCLKSTOP_TASKS_HFCLKSTOP_Pos) /*!< Bit mask of TASKS_HFCLKSTOP field. */
+#define CLOCK_TASKS_HFCLKSTOP_TASKS_HFCLKSTOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: CLOCK_TASKS_LFCLKSTART */
+/* Description: Start LFCLK */
+
+/* Bit 0 : Start LFCLK */
+#define CLOCK_TASKS_LFCLKSTART_TASKS_LFCLKSTART_Pos (0UL) /*!< Position of TASKS_LFCLKSTART field. */
+#define CLOCK_TASKS_LFCLKSTART_TASKS_LFCLKSTART_Msk (0x1UL << CLOCK_TASKS_LFCLKSTART_TASKS_LFCLKSTART_Pos) /*!< Bit mask of TASKS_LFCLKSTART field. */
+#define CLOCK_TASKS_LFCLKSTART_TASKS_LFCLKSTART_Trigger (1UL) /*!< Trigger task */
+
+/* Register: CLOCK_TASKS_LFCLKSTOP */
+/* Description: Stop LFCLK */
+
+/* Bit 0 : Stop LFCLK */
+#define CLOCK_TASKS_LFCLKSTOP_TASKS_LFCLKSTOP_Pos (0UL) /*!< Position of TASKS_LFCLKSTOP field. */
+#define CLOCK_TASKS_LFCLKSTOP_TASKS_LFCLKSTOP_Msk (0x1UL << CLOCK_TASKS_LFCLKSTOP_TASKS_LFCLKSTOP_Pos) /*!< Bit mask of TASKS_LFCLKSTOP field. */
+#define CLOCK_TASKS_LFCLKSTOP_TASKS_LFCLKSTOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: CLOCK_TASKS_CAL */
+/* Description: Start calibration of LFRC */
+
+/* Bit 0 : Start calibration of LFRC */
+#define CLOCK_TASKS_CAL_TASKS_CAL_Pos (0UL) /*!< Position of TASKS_CAL field. */
+#define CLOCK_TASKS_CAL_TASKS_CAL_Msk (0x1UL << CLOCK_TASKS_CAL_TASKS_CAL_Pos) /*!< Bit mask of TASKS_CAL field. */
+#define CLOCK_TASKS_CAL_TASKS_CAL_Trigger (1UL) /*!< Trigger task */
+
+/* Register: CLOCK_TASKS_CTSTART */
+/* Description: Start calibration timer */
+
+/* Bit 0 : Start calibration timer */
+#define CLOCK_TASKS_CTSTART_TASKS_CTSTART_Pos (0UL) /*!< Position of TASKS_CTSTART field. */
+#define CLOCK_TASKS_CTSTART_TASKS_CTSTART_Msk (0x1UL << CLOCK_TASKS_CTSTART_TASKS_CTSTART_Pos) /*!< Bit mask of TASKS_CTSTART field. */
+#define CLOCK_TASKS_CTSTART_TASKS_CTSTART_Trigger (1UL) /*!< Trigger task */
+
+/* Register: CLOCK_TASKS_CTSTOP */
+/* Description: Stop calibration timer */
+
+/* Bit 0 : Stop calibration timer */
+#define CLOCK_TASKS_CTSTOP_TASKS_CTSTOP_Pos (0UL) /*!< Position of TASKS_CTSTOP field. */
+#define CLOCK_TASKS_CTSTOP_TASKS_CTSTOP_Msk (0x1UL << CLOCK_TASKS_CTSTOP_TASKS_CTSTOP_Pos) /*!< Bit mask of TASKS_CTSTOP field. */
+#define CLOCK_TASKS_CTSTOP_TASKS_CTSTOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: CLOCK_EVENTS_HFCLKSTARTED */
+/* Description: HFXO crystal oscillator started */
+
+/* Bit 0 : HFXO crystal oscillator started */
+#define CLOCK_EVENTS_HFCLKSTARTED_EVENTS_HFCLKSTARTED_Pos (0UL) /*!< Position of EVENTS_HFCLKSTARTED field. */
+#define CLOCK_EVENTS_HFCLKSTARTED_EVENTS_HFCLKSTARTED_Msk (0x1UL << CLOCK_EVENTS_HFCLKSTARTED_EVENTS_HFCLKSTARTED_Pos) /*!< Bit mask of EVENTS_HFCLKSTARTED field. */
+#define CLOCK_EVENTS_HFCLKSTARTED_EVENTS_HFCLKSTARTED_NotGenerated (0UL) /*!< Event not generated */
+#define CLOCK_EVENTS_HFCLKSTARTED_EVENTS_HFCLKSTARTED_Generated (1UL) /*!< Event generated */
+
+/* Register: CLOCK_EVENTS_LFCLKSTARTED */
+/* Description: LFCLK started */
+
+/* Bit 0 : LFCLK started */
+#define CLOCK_EVENTS_LFCLKSTARTED_EVENTS_LFCLKSTARTED_Pos (0UL) /*!< Position of EVENTS_LFCLKSTARTED field. */
+#define CLOCK_EVENTS_LFCLKSTARTED_EVENTS_LFCLKSTARTED_Msk (0x1UL << CLOCK_EVENTS_LFCLKSTARTED_EVENTS_LFCLKSTARTED_Pos) /*!< Bit mask of EVENTS_LFCLKSTARTED field. */
+#define CLOCK_EVENTS_LFCLKSTARTED_EVENTS_LFCLKSTARTED_NotGenerated (0UL) /*!< Event not generated */
+#define CLOCK_EVENTS_LFCLKSTARTED_EVENTS_LFCLKSTARTED_Generated (1UL) /*!< Event generated */
+
+/* Register: CLOCK_EVENTS_DONE */
+/* Description: Calibration of LFRC completed */
+
+/* Bit 0 : Calibration of LFRC completed */
+#define CLOCK_EVENTS_DONE_EVENTS_DONE_Pos (0UL) /*!< Position of EVENTS_DONE field. */
+#define CLOCK_EVENTS_DONE_EVENTS_DONE_Msk (0x1UL << CLOCK_EVENTS_DONE_EVENTS_DONE_Pos) /*!< Bit mask of EVENTS_DONE field. */
+#define CLOCK_EVENTS_DONE_EVENTS_DONE_NotGenerated (0UL) /*!< Event not generated */
+#define CLOCK_EVENTS_DONE_EVENTS_DONE_Generated (1UL) /*!< Event generated */
+
+/* Register: CLOCK_EVENTS_CTTO */
+/* Description: Calibration timer timeout */
+
+/* Bit 0 : Calibration timer timeout */
+#define CLOCK_EVENTS_CTTO_EVENTS_CTTO_Pos (0UL) /*!< Position of EVENTS_CTTO field. */
+#define CLOCK_EVENTS_CTTO_EVENTS_CTTO_Msk (0x1UL << CLOCK_EVENTS_CTTO_EVENTS_CTTO_Pos) /*!< Bit mask of EVENTS_CTTO field. */
+#define CLOCK_EVENTS_CTTO_EVENTS_CTTO_NotGenerated (0UL) /*!< Event not generated */
+#define CLOCK_EVENTS_CTTO_EVENTS_CTTO_Generated (1UL) /*!< Event generated */
+
+/* Register: CLOCK_EVENTS_CTSTARTED */
+/* Description: Calibration timer has been started and is ready to process new tasks */
+
+/* Bit 0 : Calibration timer has been started and is ready to process new tasks */
+#define CLOCK_EVENTS_CTSTARTED_EVENTS_CTSTARTED_Pos (0UL) /*!< Position of EVENTS_CTSTARTED field. */
+#define CLOCK_EVENTS_CTSTARTED_EVENTS_CTSTARTED_Msk (0x1UL << CLOCK_EVENTS_CTSTARTED_EVENTS_CTSTARTED_Pos) /*!< Bit mask of EVENTS_CTSTARTED field. */
+#define CLOCK_EVENTS_CTSTARTED_EVENTS_CTSTARTED_NotGenerated (0UL) /*!< Event not generated */
+#define CLOCK_EVENTS_CTSTARTED_EVENTS_CTSTARTED_Generated (1UL) /*!< Event generated */
+
+/* Register: CLOCK_EVENTS_CTSTOPPED */
+/* Description: Calibration timer has been stopped and is ready to process new tasks */
+
+/* Bit 0 : Calibration timer has been stopped and is ready to process new tasks */
+#define CLOCK_EVENTS_CTSTOPPED_EVENTS_CTSTOPPED_Pos (0UL) /*!< Position of EVENTS_CTSTOPPED field. */
+#define CLOCK_EVENTS_CTSTOPPED_EVENTS_CTSTOPPED_Msk (0x1UL << CLOCK_EVENTS_CTSTOPPED_EVENTS_CTSTOPPED_Pos) /*!< Bit mask of EVENTS_CTSTOPPED field. */
+#define CLOCK_EVENTS_CTSTOPPED_EVENTS_CTSTOPPED_NotGenerated (0UL) /*!< Event not generated */
+#define CLOCK_EVENTS_CTSTOPPED_EVENTS_CTSTOPPED_Generated (1UL) /*!< Event generated */
+
+/* Register: CLOCK_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 11 : Write '1' to enable interrupt for event CTSTOPPED */
+#define CLOCK_INTENSET_CTSTOPPED_Pos (11UL) /*!< Position of CTSTOPPED field. */
+#define CLOCK_INTENSET_CTSTOPPED_Msk (0x1UL << CLOCK_INTENSET_CTSTOPPED_Pos) /*!< Bit mask of CTSTOPPED field. */
+#define CLOCK_INTENSET_CTSTOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define CLOCK_INTENSET_CTSTOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define CLOCK_INTENSET_CTSTOPPED_Set (1UL) /*!< Enable */
+
+/* Bit 10 : Write '1' to enable interrupt for event CTSTARTED */
+#define CLOCK_INTENSET_CTSTARTED_Pos (10UL) /*!< Position of CTSTARTED field. */
+#define CLOCK_INTENSET_CTSTARTED_Msk (0x1UL << CLOCK_INTENSET_CTSTARTED_Pos) /*!< Bit mask of CTSTARTED field. */
+#define CLOCK_INTENSET_CTSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define CLOCK_INTENSET_CTSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define CLOCK_INTENSET_CTSTARTED_Set (1UL) /*!< Enable */
+
+/* Bit 4 : Write '1' to enable interrupt for event CTTO */
+#define CLOCK_INTENSET_CTTO_Pos (4UL) /*!< Position of CTTO field. */
+#define CLOCK_INTENSET_CTTO_Msk (0x1UL << CLOCK_INTENSET_CTTO_Pos) /*!< Bit mask of CTTO field. */
+#define CLOCK_INTENSET_CTTO_Disabled (0UL) /*!< Read: Disabled */
+#define CLOCK_INTENSET_CTTO_Enabled (1UL) /*!< Read: Enabled */
+#define CLOCK_INTENSET_CTTO_Set (1UL) /*!< Enable */
+
+/* Bit 3 : Write '1' to enable interrupt for event DONE */
+#define CLOCK_INTENSET_DONE_Pos (3UL) /*!< Position of DONE field. */
+#define CLOCK_INTENSET_DONE_Msk (0x1UL << CLOCK_INTENSET_DONE_Pos) /*!< Bit mask of DONE field. */
+#define CLOCK_INTENSET_DONE_Disabled (0UL) /*!< Read: Disabled */
+#define CLOCK_INTENSET_DONE_Enabled (1UL) /*!< Read: Enabled */
+#define CLOCK_INTENSET_DONE_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event LFCLKSTARTED */
+#define CLOCK_INTENSET_LFCLKSTARTED_Pos (1UL) /*!< Position of LFCLKSTARTED field. */
+#define CLOCK_INTENSET_LFCLKSTARTED_Msk (0x1UL << CLOCK_INTENSET_LFCLKSTARTED_Pos) /*!< Bit mask of LFCLKSTARTED field. */
+#define CLOCK_INTENSET_LFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define CLOCK_INTENSET_LFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define CLOCK_INTENSET_LFCLKSTARTED_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event HFCLKSTARTED */
+#define CLOCK_INTENSET_HFCLKSTARTED_Pos (0UL) /*!< Position of HFCLKSTARTED field. */
+#define CLOCK_INTENSET_HFCLKSTARTED_Msk (0x1UL << CLOCK_INTENSET_HFCLKSTARTED_Pos) /*!< Bit mask of HFCLKSTARTED field. */
+#define CLOCK_INTENSET_HFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define CLOCK_INTENSET_HFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define CLOCK_INTENSET_HFCLKSTARTED_Set (1UL) /*!< Enable */
+
+/* Register: CLOCK_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 11 : Write '1' to disable interrupt for event CTSTOPPED */
+#define CLOCK_INTENCLR_CTSTOPPED_Pos (11UL) /*!< Position of CTSTOPPED field. */
+#define CLOCK_INTENCLR_CTSTOPPED_Msk (0x1UL << CLOCK_INTENCLR_CTSTOPPED_Pos) /*!< Bit mask of CTSTOPPED field. */
+#define CLOCK_INTENCLR_CTSTOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define CLOCK_INTENCLR_CTSTOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define CLOCK_INTENCLR_CTSTOPPED_Clear (1UL) /*!< Disable */
+
+/* Bit 10 : Write '1' to disable interrupt for event CTSTARTED */
+#define CLOCK_INTENCLR_CTSTARTED_Pos (10UL) /*!< Position of CTSTARTED field. */
+#define CLOCK_INTENCLR_CTSTARTED_Msk (0x1UL << CLOCK_INTENCLR_CTSTARTED_Pos) /*!< Bit mask of CTSTARTED field. */
+#define CLOCK_INTENCLR_CTSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define CLOCK_INTENCLR_CTSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define CLOCK_INTENCLR_CTSTARTED_Clear (1UL) /*!< Disable */
+
+/* Bit 4 : Write '1' to disable interrupt for event CTTO */
+#define CLOCK_INTENCLR_CTTO_Pos (4UL) /*!< Position of CTTO field. */
+#define CLOCK_INTENCLR_CTTO_Msk (0x1UL << CLOCK_INTENCLR_CTTO_Pos) /*!< Bit mask of CTTO field. */
+#define CLOCK_INTENCLR_CTTO_Disabled (0UL) /*!< Read: Disabled */
+#define CLOCK_INTENCLR_CTTO_Enabled (1UL) /*!< Read: Enabled */
+#define CLOCK_INTENCLR_CTTO_Clear (1UL) /*!< Disable */
+
+/* Bit 3 : Write '1' to disable interrupt for event DONE */
+#define CLOCK_INTENCLR_DONE_Pos (3UL) /*!< Position of DONE field. */
+#define CLOCK_INTENCLR_DONE_Msk (0x1UL << CLOCK_INTENCLR_DONE_Pos) /*!< Bit mask of DONE field. */
+#define CLOCK_INTENCLR_DONE_Disabled (0UL) /*!< Read: Disabled */
+#define CLOCK_INTENCLR_DONE_Enabled (1UL) /*!< Read: Enabled */
+#define CLOCK_INTENCLR_DONE_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event LFCLKSTARTED */
+#define CLOCK_INTENCLR_LFCLKSTARTED_Pos (1UL) /*!< Position of LFCLKSTARTED field. */
+#define CLOCK_INTENCLR_LFCLKSTARTED_Msk (0x1UL << CLOCK_INTENCLR_LFCLKSTARTED_Pos) /*!< Bit mask of LFCLKSTARTED field. */
+#define CLOCK_INTENCLR_LFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define CLOCK_INTENCLR_LFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define CLOCK_INTENCLR_LFCLKSTARTED_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event HFCLKSTARTED */
+#define CLOCK_INTENCLR_HFCLKSTARTED_Pos (0UL) /*!< Position of HFCLKSTARTED field. */
+#define CLOCK_INTENCLR_HFCLKSTARTED_Msk (0x1UL << CLOCK_INTENCLR_HFCLKSTARTED_Pos) /*!< Bit mask of HFCLKSTARTED field. */
+#define CLOCK_INTENCLR_HFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define CLOCK_INTENCLR_HFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define CLOCK_INTENCLR_HFCLKSTARTED_Clear (1UL) /*!< Disable */
+
+/* Register: CLOCK_HFCLKRUN */
+/* Description: Status indicating that HFCLKSTART task has been triggered */
+
+/* Bit 0 : HFCLKSTART task triggered or not */
+#define CLOCK_HFCLKRUN_STATUS_Pos (0UL) /*!< Position of STATUS field. */
+#define CLOCK_HFCLKRUN_STATUS_Msk (0x1UL << CLOCK_HFCLKRUN_STATUS_Pos) /*!< Bit mask of STATUS field. */
+#define CLOCK_HFCLKRUN_STATUS_NotTriggered (0UL) /*!< Task not triggered */
+#define CLOCK_HFCLKRUN_STATUS_Triggered (1UL) /*!< Task triggered */
+
+/* Register: CLOCK_HFCLKSTAT */
+/* Description: HFCLK status */
+
+/* Bit 16 : HFCLK state */
+#define CLOCK_HFCLKSTAT_STATE_Pos (16UL) /*!< Position of STATE field. */
+#define CLOCK_HFCLKSTAT_STATE_Msk (0x1UL << CLOCK_HFCLKSTAT_STATE_Pos) /*!< Bit mask of STATE field. */
+#define CLOCK_HFCLKSTAT_STATE_NotRunning (0UL) /*!< HFCLK not running */
+#define CLOCK_HFCLKSTAT_STATE_Running (1UL) /*!< HFCLK running */
+
+/* Bit 0 : Source of HFCLK */
+#define CLOCK_HFCLKSTAT_SRC_Pos (0UL) /*!< Position of SRC field. */
+#define CLOCK_HFCLKSTAT_SRC_Msk (0x1UL << CLOCK_HFCLKSTAT_SRC_Pos) /*!< Bit mask of SRC field. */
+#define CLOCK_HFCLKSTAT_SRC_RC (0UL) /*!< 64 MHz internal oscillator (HFINT) */
+#define CLOCK_HFCLKSTAT_SRC_Xtal (1UL) /*!< 64 MHz crystal oscillator (HFXO) */
+
+/* Register: CLOCK_LFCLKRUN */
+/* Description: Status indicating that LFCLKSTART task has been triggered */
+
+/* Bit 0 : LFCLKSTART task triggered or not */
+#define CLOCK_LFCLKRUN_STATUS_Pos (0UL) /*!< Position of STATUS field. */
+#define CLOCK_LFCLKRUN_STATUS_Msk (0x1UL << CLOCK_LFCLKRUN_STATUS_Pos) /*!< Bit mask of STATUS field. */
+#define CLOCK_LFCLKRUN_STATUS_NotTriggered (0UL) /*!< Task not triggered */
+#define CLOCK_LFCLKRUN_STATUS_Triggered (1UL) /*!< Task triggered */
+
+/* Register: CLOCK_LFCLKSTAT */
+/* Description: LFCLK status */
+
+/* Bit 16 : LFCLK state */
+#define CLOCK_LFCLKSTAT_STATE_Pos (16UL) /*!< Position of STATE field. */
+#define CLOCK_LFCLKSTAT_STATE_Msk (0x1UL << CLOCK_LFCLKSTAT_STATE_Pos) /*!< Bit mask of STATE field. */
+#define CLOCK_LFCLKSTAT_STATE_NotRunning (0UL) /*!< LFCLK not running */
+#define CLOCK_LFCLKSTAT_STATE_Running (1UL) /*!< LFCLK running */
+
+/* Bits 1..0 : Source of LFCLK */
+#define CLOCK_LFCLKSTAT_SRC_Pos (0UL) /*!< Position of SRC field. */
+#define CLOCK_LFCLKSTAT_SRC_Msk (0x3UL << CLOCK_LFCLKSTAT_SRC_Pos) /*!< Bit mask of SRC field. */
+#define CLOCK_LFCLKSTAT_SRC_RC (0UL) /*!< 32.768 kHz RC oscillator (LFRC) */
+#define CLOCK_LFCLKSTAT_SRC_Xtal (1UL) /*!< 32.768 kHz crystal oscillator (LFXO) */
+#define CLOCK_LFCLKSTAT_SRC_Synth (2UL) /*!< 32.768 kHz synthesized from HFCLK (LFSYNT) */
+
+/* Register: CLOCK_LFCLKSRCCOPY */
+/* Description: Copy of LFCLKSRC register, set when LFCLKSTART task was triggered */
+
+/* Bits 1..0 : Clock source */
+#define CLOCK_LFCLKSRCCOPY_SRC_Pos (0UL) /*!< Position of SRC field. */
+#define CLOCK_LFCLKSRCCOPY_SRC_Msk (0x3UL << CLOCK_LFCLKSRCCOPY_SRC_Pos) /*!< Bit mask of SRC field. */
+#define CLOCK_LFCLKSRCCOPY_SRC_RC (0UL) /*!< 32.768 kHz RC oscillator (LFRC) */
+#define CLOCK_LFCLKSRCCOPY_SRC_Xtal (1UL) /*!< 32.768 kHz crystal oscillator (LFXO) */
+#define CLOCK_LFCLKSRCCOPY_SRC_Synth (2UL) /*!< 32.768 kHz synthesized from HFCLK (LFSYNT) */
+
+/* Register: CLOCK_LFCLKSRC */
+/* Description: Clock source for the LFCLK */
+
+/* Bit 17 : Enable or disable external source for LFCLK */
+#define CLOCK_LFCLKSRC_EXTERNAL_Pos (17UL) /*!< Position of EXTERNAL field. */
+#define CLOCK_LFCLKSRC_EXTERNAL_Msk (0x1UL << CLOCK_LFCLKSRC_EXTERNAL_Pos) /*!< Bit mask of EXTERNAL field. */
+#define CLOCK_LFCLKSRC_EXTERNAL_Disabled (0UL) /*!< Disable external source (use with Xtal) */
+#define CLOCK_LFCLKSRC_EXTERNAL_Enabled (1UL) /*!< Enable use of external source instead of Xtal (SRC needs to be set to Xtal) */
+
+/* Bit 16 : Enable or disable bypass of LFCLK crystal oscillator with external clock source */
+#define CLOCK_LFCLKSRC_BYPASS_Pos (16UL) /*!< Position of BYPASS field. */
+#define CLOCK_LFCLKSRC_BYPASS_Msk (0x1UL << CLOCK_LFCLKSRC_BYPASS_Pos) /*!< Bit mask of BYPASS field. */
+#define CLOCK_LFCLKSRC_BYPASS_Disabled (0UL) /*!< Disable (use with Xtal or low-swing external source) */
+#define CLOCK_LFCLKSRC_BYPASS_Enabled (1UL) /*!< Enable (use with rail-to-rail external source) */
+
+/* Bits 1..0 : Clock source */
+#define CLOCK_LFCLKSRC_SRC_Pos (0UL) /*!< Position of SRC field. */
+#define CLOCK_LFCLKSRC_SRC_Msk (0x3UL << CLOCK_LFCLKSRC_SRC_Pos) /*!< Bit mask of SRC field. */
+#define CLOCK_LFCLKSRC_SRC_RC (0UL) /*!< 32.768 kHz RC oscillator (LFRC) */
+#define CLOCK_LFCLKSRC_SRC_Xtal (1UL) /*!< 32.768 kHz crystal oscillator (LFXO) */
+#define CLOCK_LFCLKSRC_SRC_Synth (2UL) /*!< 32.768 kHz synthesized from HFCLK (LFSYNT) */
+
+/* Register: CLOCK_HFXODEBOUNCE */
+/* Description: HFXO debounce time. The HFXO is started by triggering the TASKS_HFCLKSTART task. */
+
+/* Bits 7..0 : HFXO debounce time. Debounce time = HFXODEBOUNCE * 16 us. */
+#define CLOCK_HFXODEBOUNCE_HFXODEBOUNCE_Pos (0UL) /*!< Position of HFXODEBOUNCE field. */
+#define CLOCK_HFXODEBOUNCE_HFXODEBOUNCE_Msk (0xFFUL << CLOCK_HFXODEBOUNCE_HFXODEBOUNCE_Pos) /*!< Bit mask of HFXODEBOUNCE field. */
+#define CLOCK_HFXODEBOUNCE_HFXODEBOUNCE_Db256us (0x10UL) /*!< 256 us debounce time. Recommended for TSX-3225, FA-20H and FA-128 crystals. */
+#define CLOCK_HFXODEBOUNCE_HFXODEBOUNCE_Db1024us (0x40UL) /*!< 1024 us debounce time. Recommended for NX1612AA and NX1210AB crystals. */
+
+/* Register: CLOCK_LFXODEBOUNCE */
+/* Description: LFXO debounce time. The LFXO is started by triggering the TASKS_LFCLKSTART task when the LFCLKSRC register is configured for Xtal. */
+
+/* Bit 0 : LFXO debounce time. */
+#define CLOCK_LFXODEBOUNCE_LFXODEBOUNCE_Pos (0UL) /*!< Position of LFXODEBOUNCE field. */
+#define CLOCK_LFXODEBOUNCE_LFXODEBOUNCE_Msk (0x1UL << CLOCK_LFXODEBOUNCE_LFXODEBOUNCE_Pos) /*!< Bit mask of LFXODEBOUNCE field. */
+#define CLOCK_LFXODEBOUNCE_LFXODEBOUNCE_Normal (0UL) /*!< 8192 32.768 kHz periods, or 0.25 s. Recommended for normal Operating Temperature conditions. */
+#define CLOCK_LFXODEBOUNCE_LFXODEBOUNCE_Extended (1UL) /*!< 16384 32.768 kHz periods, or 0.5 s. Recommended for Extended Operating Temperature conditions. */
+
+/* Register: CLOCK_CTIV */
+/* Description: Calibration timer interval */
+
+/* Bits 6..0 : Calibration timer interval in multiple of 0.25 seconds. Range: 0.25 seconds to 31.75 seconds. */
+#define CLOCK_CTIV_CTIV_Pos (0UL) /*!< Position of CTIV field. */
+#define CLOCK_CTIV_CTIV_Msk (0x7FUL << CLOCK_CTIV_CTIV_Pos) /*!< Bit mask of CTIV field. */
+
+/* Register: CLOCK_TRACECONFIG */
+/* Description: Clocking options for the trace port debug interface */
+
+/* Bits 17..16 : Pin multiplexing of trace signals. See pin assignment chapter for more details. */
+#define CLOCK_TRACECONFIG_TRACEMUX_Pos (16UL) /*!< Position of TRACEMUX field. */
+#define CLOCK_TRACECONFIG_TRACEMUX_Msk (0x3UL << CLOCK_TRACECONFIG_TRACEMUX_Pos) /*!< Bit mask of TRACEMUX field. */
+#define CLOCK_TRACECONFIG_TRACEMUX_GPIO (0UL) /*!< No trace signals routed to pins. All pins can be used as regular GPIOs. */
+#define CLOCK_TRACECONFIG_TRACEMUX_Serial (1UL) /*!< SWO trace signal routed to pin. Remaining pins can be used as regular GPIOs. */
+#define CLOCK_TRACECONFIG_TRACEMUX_Parallel (2UL) /*!< All trace signals (TRACECLK and TRACEDATA[n]) routed to pins. */
+
+/* Bits 1..0 : Speed of trace port clock. Note that the TRACECLK pin will output this clock divided by two. */
+#define CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos (0UL) /*!< Position of TRACEPORTSPEED field. */
+#define CLOCK_TRACECONFIG_TRACEPORTSPEED_Msk (0x3UL << CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos) /*!< Bit mask of TRACEPORTSPEED field. */
+#define CLOCK_TRACECONFIG_TRACEPORTSPEED_32MHz (0UL) /*!< 32 MHz trace port clock (TRACECLK = 16 MHz) */
+#define CLOCK_TRACECONFIG_TRACEPORTSPEED_16MHz (1UL) /*!< 16 MHz trace port clock (TRACECLK = 8 MHz) */
+#define CLOCK_TRACECONFIG_TRACEPORTSPEED_8MHz (2UL) /*!< 8 MHz trace port clock (TRACECLK = 4 MHz) */
+#define CLOCK_TRACECONFIG_TRACEPORTSPEED_4MHz (3UL) /*!< 4 MHz trace port clock (TRACECLK = 2 MHz) */
+
+
+/* Peripheral: COMP */
+/* Description: Comparator */
+
+/* Register: COMP_TASKS_START */
+/* Description: Start comparator */
+
+/* Bit 0 : Start comparator */
+#define COMP_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */
+#define COMP_TASKS_START_TASKS_START_Msk (0x1UL << COMP_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */
+#define COMP_TASKS_START_TASKS_START_Trigger (1UL) /*!< Trigger task */
+
+/* Register: COMP_TASKS_STOP */
+/* Description: Stop comparator */
+
+/* Bit 0 : Stop comparator */
+#define COMP_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define COMP_TASKS_STOP_TASKS_STOP_Msk (0x1UL << COMP_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define COMP_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: COMP_TASKS_SAMPLE */
+/* Description: Sample comparator value */
+
+/* Bit 0 : Sample comparator value */
+#define COMP_TASKS_SAMPLE_TASKS_SAMPLE_Pos (0UL) /*!< Position of TASKS_SAMPLE field. */
+#define COMP_TASKS_SAMPLE_TASKS_SAMPLE_Msk (0x1UL << COMP_TASKS_SAMPLE_TASKS_SAMPLE_Pos) /*!< Bit mask of TASKS_SAMPLE field. */
+#define COMP_TASKS_SAMPLE_TASKS_SAMPLE_Trigger (1UL) /*!< Trigger task */
+
+/* Register: COMP_EVENTS_READY */
+/* Description: COMP is ready and output is valid */
+
+/* Bit 0 : COMP is ready and output is valid */
+#define COMP_EVENTS_READY_EVENTS_READY_Pos (0UL) /*!< Position of EVENTS_READY field. */
+#define COMP_EVENTS_READY_EVENTS_READY_Msk (0x1UL << COMP_EVENTS_READY_EVENTS_READY_Pos) /*!< Bit mask of EVENTS_READY field. */
+#define COMP_EVENTS_READY_EVENTS_READY_NotGenerated (0UL) /*!< Event not generated */
+#define COMP_EVENTS_READY_EVENTS_READY_Generated (1UL) /*!< Event generated */
+
+/* Register: COMP_EVENTS_DOWN */
+/* Description: Downward crossing */
+
+/* Bit 0 : Downward crossing */
+#define COMP_EVENTS_DOWN_EVENTS_DOWN_Pos (0UL) /*!< Position of EVENTS_DOWN field. */
+#define COMP_EVENTS_DOWN_EVENTS_DOWN_Msk (0x1UL << COMP_EVENTS_DOWN_EVENTS_DOWN_Pos) /*!< Bit mask of EVENTS_DOWN field. */
+#define COMP_EVENTS_DOWN_EVENTS_DOWN_NotGenerated (0UL) /*!< Event not generated */
+#define COMP_EVENTS_DOWN_EVENTS_DOWN_Generated (1UL) /*!< Event generated */
+
+/* Register: COMP_EVENTS_UP */
+/* Description: Upward crossing */
+
+/* Bit 0 : Upward crossing */
+#define COMP_EVENTS_UP_EVENTS_UP_Pos (0UL) /*!< Position of EVENTS_UP field. */
+#define COMP_EVENTS_UP_EVENTS_UP_Msk (0x1UL << COMP_EVENTS_UP_EVENTS_UP_Pos) /*!< Bit mask of EVENTS_UP field. */
+#define COMP_EVENTS_UP_EVENTS_UP_NotGenerated (0UL) /*!< Event not generated */
+#define COMP_EVENTS_UP_EVENTS_UP_Generated (1UL) /*!< Event generated */
+
+/* Register: COMP_EVENTS_CROSS */
+/* Description: Downward or upward crossing */
+
+/* Bit 0 : Downward or upward crossing */
+#define COMP_EVENTS_CROSS_EVENTS_CROSS_Pos (0UL) /*!< Position of EVENTS_CROSS field. */
+#define COMP_EVENTS_CROSS_EVENTS_CROSS_Msk (0x1UL << COMP_EVENTS_CROSS_EVENTS_CROSS_Pos) /*!< Bit mask of EVENTS_CROSS field. */
+#define COMP_EVENTS_CROSS_EVENTS_CROSS_NotGenerated (0UL) /*!< Event not generated */
+#define COMP_EVENTS_CROSS_EVENTS_CROSS_Generated (1UL) /*!< Event generated */
+
+/* Register: COMP_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 4 : Shortcut between event CROSS and task STOP */
+#define COMP_SHORTS_CROSS_STOP_Pos (4UL) /*!< Position of CROSS_STOP field. */
+#define COMP_SHORTS_CROSS_STOP_Msk (0x1UL << COMP_SHORTS_CROSS_STOP_Pos) /*!< Bit mask of CROSS_STOP field. */
+#define COMP_SHORTS_CROSS_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define COMP_SHORTS_CROSS_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 3 : Shortcut between event UP and task STOP */
+#define COMP_SHORTS_UP_STOP_Pos (3UL) /*!< Position of UP_STOP field. */
+#define COMP_SHORTS_UP_STOP_Msk (0x1UL << COMP_SHORTS_UP_STOP_Pos) /*!< Bit mask of UP_STOP field. */
+#define COMP_SHORTS_UP_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define COMP_SHORTS_UP_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 2 : Shortcut between event DOWN and task STOP */
+#define COMP_SHORTS_DOWN_STOP_Pos (2UL) /*!< Position of DOWN_STOP field. */
+#define COMP_SHORTS_DOWN_STOP_Msk (0x1UL << COMP_SHORTS_DOWN_STOP_Pos) /*!< Bit mask of DOWN_STOP field. */
+#define COMP_SHORTS_DOWN_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define COMP_SHORTS_DOWN_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 1 : Shortcut between event READY and task STOP */
+#define COMP_SHORTS_READY_STOP_Pos (1UL) /*!< Position of READY_STOP field. */
+#define COMP_SHORTS_READY_STOP_Msk (0x1UL << COMP_SHORTS_READY_STOP_Pos) /*!< Bit mask of READY_STOP field. */
+#define COMP_SHORTS_READY_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define COMP_SHORTS_READY_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 0 : Shortcut between event READY and task SAMPLE */
+#define COMP_SHORTS_READY_SAMPLE_Pos (0UL) /*!< Position of READY_SAMPLE field. */
+#define COMP_SHORTS_READY_SAMPLE_Msk (0x1UL << COMP_SHORTS_READY_SAMPLE_Pos) /*!< Bit mask of READY_SAMPLE field. */
+#define COMP_SHORTS_READY_SAMPLE_Disabled (0UL) /*!< Disable shortcut */
+#define COMP_SHORTS_READY_SAMPLE_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: COMP_INTEN */
+/* Description: Enable or disable interrupt */
+
+/* Bit 3 : Enable or disable interrupt for event CROSS */
+#define COMP_INTEN_CROSS_Pos (3UL) /*!< Position of CROSS field. */
+#define COMP_INTEN_CROSS_Msk (0x1UL << COMP_INTEN_CROSS_Pos) /*!< Bit mask of CROSS field. */
+#define COMP_INTEN_CROSS_Disabled (0UL) /*!< Disable */
+#define COMP_INTEN_CROSS_Enabled (1UL) /*!< Enable */
+
+/* Bit 2 : Enable or disable interrupt for event UP */
+#define COMP_INTEN_UP_Pos (2UL) /*!< Position of UP field. */
+#define COMP_INTEN_UP_Msk (0x1UL << COMP_INTEN_UP_Pos) /*!< Bit mask of UP field. */
+#define COMP_INTEN_UP_Disabled (0UL) /*!< Disable */
+#define COMP_INTEN_UP_Enabled (1UL) /*!< Enable */
+
+/* Bit 1 : Enable or disable interrupt for event DOWN */
+#define COMP_INTEN_DOWN_Pos (1UL) /*!< Position of DOWN field. */
+#define COMP_INTEN_DOWN_Msk (0x1UL << COMP_INTEN_DOWN_Pos) /*!< Bit mask of DOWN field. */
+#define COMP_INTEN_DOWN_Disabled (0UL) /*!< Disable */
+#define COMP_INTEN_DOWN_Enabled (1UL) /*!< Enable */
+
+/* Bit 0 : Enable or disable interrupt for event READY */
+#define COMP_INTEN_READY_Pos (0UL) /*!< Position of READY field. */
+#define COMP_INTEN_READY_Msk (0x1UL << COMP_INTEN_READY_Pos) /*!< Bit mask of READY field. */
+#define COMP_INTEN_READY_Disabled (0UL) /*!< Disable */
+#define COMP_INTEN_READY_Enabled (1UL) /*!< Enable */
+
+/* Register: COMP_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 3 : Write '1' to enable interrupt for event CROSS */
+#define COMP_INTENSET_CROSS_Pos (3UL) /*!< Position of CROSS field. */
+#define COMP_INTENSET_CROSS_Msk (0x1UL << COMP_INTENSET_CROSS_Pos) /*!< Bit mask of CROSS field. */
+#define COMP_INTENSET_CROSS_Disabled (0UL) /*!< Read: Disabled */
+#define COMP_INTENSET_CROSS_Enabled (1UL) /*!< Read: Enabled */
+#define COMP_INTENSET_CROSS_Set (1UL) /*!< Enable */
+
+/* Bit 2 : Write '1' to enable interrupt for event UP */
+#define COMP_INTENSET_UP_Pos (2UL) /*!< Position of UP field. */
+#define COMP_INTENSET_UP_Msk (0x1UL << COMP_INTENSET_UP_Pos) /*!< Bit mask of UP field. */
+#define COMP_INTENSET_UP_Disabled (0UL) /*!< Read: Disabled */
+#define COMP_INTENSET_UP_Enabled (1UL) /*!< Read: Enabled */
+#define COMP_INTENSET_UP_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event DOWN */
+#define COMP_INTENSET_DOWN_Pos (1UL) /*!< Position of DOWN field. */
+#define COMP_INTENSET_DOWN_Msk (0x1UL << COMP_INTENSET_DOWN_Pos) /*!< Bit mask of DOWN field. */
+#define COMP_INTENSET_DOWN_Disabled (0UL) /*!< Read: Disabled */
+#define COMP_INTENSET_DOWN_Enabled (1UL) /*!< Read: Enabled */
+#define COMP_INTENSET_DOWN_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event READY */
+#define COMP_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */
+#define COMP_INTENSET_READY_Msk (0x1UL << COMP_INTENSET_READY_Pos) /*!< Bit mask of READY field. */
+#define COMP_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */
+#define COMP_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */
+#define COMP_INTENSET_READY_Set (1UL) /*!< Enable */
+
+/* Register: COMP_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 3 : Write '1' to disable interrupt for event CROSS */
+#define COMP_INTENCLR_CROSS_Pos (3UL) /*!< Position of CROSS field. */
+#define COMP_INTENCLR_CROSS_Msk (0x1UL << COMP_INTENCLR_CROSS_Pos) /*!< Bit mask of CROSS field. */
+#define COMP_INTENCLR_CROSS_Disabled (0UL) /*!< Read: Disabled */
+#define COMP_INTENCLR_CROSS_Enabled (1UL) /*!< Read: Enabled */
+#define COMP_INTENCLR_CROSS_Clear (1UL) /*!< Disable */
+
+/* Bit 2 : Write '1' to disable interrupt for event UP */
+#define COMP_INTENCLR_UP_Pos (2UL) /*!< Position of UP field. */
+#define COMP_INTENCLR_UP_Msk (0x1UL << COMP_INTENCLR_UP_Pos) /*!< Bit mask of UP field. */
+#define COMP_INTENCLR_UP_Disabled (0UL) /*!< Read: Disabled */
+#define COMP_INTENCLR_UP_Enabled (1UL) /*!< Read: Enabled */
+#define COMP_INTENCLR_UP_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event DOWN */
+#define COMP_INTENCLR_DOWN_Pos (1UL) /*!< Position of DOWN field. */
+#define COMP_INTENCLR_DOWN_Msk (0x1UL << COMP_INTENCLR_DOWN_Pos) /*!< Bit mask of DOWN field. */
+#define COMP_INTENCLR_DOWN_Disabled (0UL) /*!< Read: Disabled */
+#define COMP_INTENCLR_DOWN_Enabled (1UL) /*!< Read: Enabled */
+#define COMP_INTENCLR_DOWN_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event READY */
+#define COMP_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */
+#define COMP_INTENCLR_READY_Msk (0x1UL << COMP_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */
+#define COMP_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */
+#define COMP_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */
+#define COMP_INTENCLR_READY_Clear (1UL) /*!< Disable */
+
+/* Register: COMP_RESULT */
+/* Description: Compare result */
+
+/* Bit 0 : Result of last compare. Decision point SAMPLE task. */
+#define COMP_RESULT_RESULT_Pos (0UL) /*!< Position of RESULT field. */
+#define COMP_RESULT_RESULT_Msk (0x1UL << COMP_RESULT_RESULT_Pos) /*!< Bit mask of RESULT field. */
+#define COMP_RESULT_RESULT_Below (0UL) /*!< Input voltage is below the threshold (VIN+ < VIN-) */
+#define COMP_RESULT_RESULT_Above (1UL) /*!< Input voltage is above the threshold (VIN+ > VIN-) */
+
+/* Register: COMP_ENABLE */
+/* Description: COMP enable */
+
+/* Bits 1..0 : Enable or disable COMP */
+#define COMP_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define COMP_ENABLE_ENABLE_Msk (0x3UL << COMP_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define COMP_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */
+#define COMP_ENABLE_ENABLE_Enabled (2UL) /*!< Enable */
+
+/* Register: COMP_PSEL */
+/* Description: Pin select */
+
+/* Bits 2..0 : Analog pin select */
+#define COMP_PSEL_PSEL_Pos (0UL) /*!< Position of PSEL field. */
+#define COMP_PSEL_PSEL_Msk (0x7UL << COMP_PSEL_PSEL_Pos) /*!< Bit mask of PSEL field. */
+#define COMP_PSEL_PSEL_AnalogInput0 (0UL) /*!< AIN0 selected as analog input */
+#define COMP_PSEL_PSEL_AnalogInput1 (1UL) /*!< AIN1 selected as analog input */
+#define COMP_PSEL_PSEL_AnalogInput2 (2UL) /*!< AIN2 selected as analog input */
+#define COMP_PSEL_PSEL_AnalogInput3 (3UL) /*!< AIN3 selected as analog input */
+#define COMP_PSEL_PSEL_AnalogInput4 (4UL) /*!< AIN4 selected as analog input */
+#define COMP_PSEL_PSEL_AnalogInput5 (5UL) /*!< AIN5 selected as analog input */
+#define COMP_PSEL_PSEL_AnalogInput6 (6UL) /*!< AIN6 selected as analog input */
+#define COMP_PSEL_PSEL_AnalogInput7 (7UL) /*!< AIN7 selected as analog input */
+
+/* Register: COMP_REFSEL */
+/* Description: Reference source select for single-ended mode */
+
+/* Bits 2..0 : Reference select */
+#define COMP_REFSEL_REFSEL_Pos (0UL) /*!< Position of REFSEL field. */
+#define COMP_REFSEL_REFSEL_Msk (0x7UL << COMP_REFSEL_REFSEL_Pos) /*!< Bit mask of REFSEL field. */
+#define COMP_REFSEL_REFSEL_Int1V2 (0UL) /*!< VREF = internal 1.2 V reference (VDD >= 1.7 V) */
+#define COMP_REFSEL_REFSEL_Int1V8 (1UL) /*!< VREF = internal 1.8 V reference (VDD >= VREF + 0.2 V) */
+#define COMP_REFSEL_REFSEL_Int2V4 (2UL) /*!< VREF = internal 2.4 V reference (VDD >= VREF + 0.2 V) */
+#define COMP_REFSEL_REFSEL_VDD (4UL) /*!< VREF = VDD */
+#define COMP_REFSEL_REFSEL_ARef (5UL) /*!< VREF = AREF (VDD >= VREF >= AREFMIN) */
+
+/* Register: COMP_EXTREFSEL */
+/* Description: External reference select */
+
+/* Bits 2..0 : External analog reference select */
+#define COMP_EXTREFSEL_EXTREFSEL_Pos (0UL) /*!< Position of EXTREFSEL field. */
+#define COMP_EXTREFSEL_EXTREFSEL_Msk (0x7UL << COMP_EXTREFSEL_EXTREFSEL_Pos) /*!< Bit mask of EXTREFSEL field. */
+#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference0 (0UL) /*!< Use AIN0 as external analog reference */
+#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference1 (1UL) /*!< Use AIN1 as external analog reference */
+#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference2 (2UL) /*!< Use AIN2 as external analog reference */
+#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference3 (3UL) /*!< Use AIN3 as external analog reference */
+#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference4 (4UL) /*!< Use AIN4 as external analog reference */
+#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference5 (5UL) /*!< Use AIN5 as external analog reference */
+#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference6 (6UL) /*!< Use AIN6 as external analog reference */
+#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference7 (7UL) /*!< Use AIN7 as external analog reference */
+
+/* Register: COMP_TH */
+/* Description: Threshold configuration for hysteresis unit */
+
+/* Bits 13..8 : VUP = (THUP+1)/64*VREF */
+#define COMP_TH_THUP_Pos (8UL) /*!< Position of THUP field. */
+#define COMP_TH_THUP_Msk (0x3FUL << COMP_TH_THUP_Pos) /*!< Bit mask of THUP field. */
+
+/* Bits 5..0 : VDOWN = (THDOWN+1)/64*VREF */
+#define COMP_TH_THDOWN_Pos (0UL) /*!< Position of THDOWN field. */
+#define COMP_TH_THDOWN_Msk (0x3FUL << COMP_TH_THDOWN_Pos) /*!< Bit mask of THDOWN field. */
+
+/* Register: COMP_MODE */
+/* Description: Mode configuration */
+
+/* Bit 8 : Main operation modes */
+#define COMP_MODE_MAIN_Pos (8UL) /*!< Position of MAIN field. */
+#define COMP_MODE_MAIN_Msk (0x1UL << COMP_MODE_MAIN_Pos) /*!< Bit mask of MAIN field. */
+#define COMP_MODE_MAIN_SE (0UL) /*!< Single-ended mode */
+#define COMP_MODE_MAIN_Diff (1UL) /*!< Differential mode */
+
+/* Bits 1..0 : Speed and power modes */
+#define COMP_MODE_SP_Pos (0UL) /*!< Position of SP field. */
+#define COMP_MODE_SP_Msk (0x3UL << COMP_MODE_SP_Pos) /*!< Bit mask of SP field. */
+#define COMP_MODE_SP_Low (0UL) /*!< Low-power mode */
+#define COMP_MODE_SP_Normal (1UL) /*!< Normal mode */
+#define COMP_MODE_SP_High (2UL) /*!< High-speed mode */
+
+/* Register: COMP_HYST */
+/* Description: Comparator hysteresis enable */
+
+/* Bit 0 : Comparator hysteresis */
+#define COMP_HYST_HYST_Pos (0UL) /*!< Position of HYST field. */
+#define COMP_HYST_HYST_Msk (0x1UL << COMP_HYST_HYST_Pos) /*!< Bit mask of HYST field. */
+#define COMP_HYST_HYST_NoHyst (0UL) /*!< Comparator hysteresis disabled */
+#define COMP_HYST_HYST_Hyst50mV (1UL) /*!< Comparator hysteresis enabled */
+
+
+/* Peripheral: ECB */
+/* Description: AES ECB Mode Encryption */
+
+/* Register: ECB_TASKS_STARTECB */
+/* Description: Start ECB block encrypt */
+
+/* Bit 0 : Start ECB block encrypt */
+#define ECB_TASKS_STARTECB_TASKS_STARTECB_Pos (0UL) /*!< Position of TASKS_STARTECB field. */
+#define ECB_TASKS_STARTECB_TASKS_STARTECB_Msk (0x1UL << ECB_TASKS_STARTECB_TASKS_STARTECB_Pos) /*!< Bit mask of TASKS_STARTECB field. */
+#define ECB_TASKS_STARTECB_TASKS_STARTECB_Trigger (1UL) /*!< Trigger task */
+
+/* Register: ECB_TASKS_STOPECB */
+/* Description: Abort a possible executing ECB operation */
+
+/* Bit 0 : Abort a possible executing ECB operation */
+#define ECB_TASKS_STOPECB_TASKS_STOPECB_Pos (0UL) /*!< Position of TASKS_STOPECB field. */
+#define ECB_TASKS_STOPECB_TASKS_STOPECB_Msk (0x1UL << ECB_TASKS_STOPECB_TASKS_STOPECB_Pos) /*!< Bit mask of TASKS_STOPECB field. */
+#define ECB_TASKS_STOPECB_TASKS_STOPECB_Trigger (1UL) /*!< Trigger task */
+
+/* Register: ECB_EVENTS_ENDECB */
+/* Description: ECB block encrypt complete */
+
+/* Bit 0 : ECB block encrypt complete */
+#define ECB_EVENTS_ENDECB_EVENTS_ENDECB_Pos (0UL) /*!< Position of EVENTS_ENDECB field. */
+#define ECB_EVENTS_ENDECB_EVENTS_ENDECB_Msk (0x1UL << ECB_EVENTS_ENDECB_EVENTS_ENDECB_Pos) /*!< Bit mask of EVENTS_ENDECB field. */
+#define ECB_EVENTS_ENDECB_EVENTS_ENDECB_NotGenerated (0UL) /*!< Event not generated */
+#define ECB_EVENTS_ENDECB_EVENTS_ENDECB_Generated (1UL) /*!< Event generated */
+
+/* Register: ECB_EVENTS_ERRORECB */
+/* Description: ECB block encrypt aborted because of a STOPECB task or due to an error */
+
+/* Bit 0 : ECB block encrypt aborted because of a STOPECB task or due to an error */
+#define ECB_EVENTS_ERRORECB_EVENTS_ERRORECB_Pos (0UL) /*!< Position of EVENTS_ERRORECB field. */
+#define ECB_EVENTS_ERRORECB_EVENTS_ERRORECB_Msk (0x1UL << ECB_EVENTS_ERRORECB_EVENTS_ERRORECB_Pos) /*!< Bit mask of EVENTS_ERRORECB field. */
+#define ECB_EVENTS_ERRORECB_EVENTS_ERRORECB_NotGenerated (0UL) /*!< Event not generated */
+#define ECB_EVENTS_ERRORECB_EVENTS_ERRORECB_Generated (1UL) /*!< Event generated */
+
+/* Register: ECB_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 1 : Write '1' to enable interrupt for event ERRORECB */
+#define ECB_INTENSET_ERRORECB_Pos (1UL) /*!< Position of ERRORECB field. */
+#define ECB_INTENSET_ERRORECB_Msk (0x1UL << ECB_INTENSET_ERRORECB_Pos) /*!< Bit mask of ERRORECB field. */
+#define ECB_INTENSET_ERRORECB_Disabled (0UL) /*!< Read: Disabled */
+#define ECB_INTENSET_ERRORECB_Enabled (1UL) /*!< Read: Enabled */
+#define ECB_INTENSET_ERRORECB_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event ENDECB */
+#define ECB_INTENSET_ENDECB_Pos (0UL) /*!< Position of ENDECB field. */
+#define ECB_INTENSET_ENDECB_Msk (0x1UL << ECB_INTENSET_ENDECB_Pos) /*!< Bit mask of ENDECB field. */
+#define ECB_INTENSET_ENDECB_Disabled (0UL) /*!< Read: Disabled */
+#define ECB_INTENSET_ENDECB_Enabled (1UL) /*!< Read: Enabled */
+#define ECB_INTENSET_ENDECB_Set (1UL) /*!< Enable */
+
+/* Register: ECB_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 1 : Write '1' to disable interrupt for event ERRORECB */
+#define ECB_INTENCLR_ERRORECB_Pos (1UL) /*!< Position of ERRORECB field. */
+#define ECB_INTENCLR_ERRORECB_Msk (0x1UL << ECB_INTENCLR_ERRORECB_Pos) /*!< Bit mask of ERRORECB field. */
+#define ECB_INTENCLR_ERRORECB_Disabled (0UL) /*!< Read: Disabled */
+#define ECB_INTENCLR_ERRORECB_Enabled (1UL) /*!< Read: Enabled */
+#define ECB_INTENCLR_ERRORECB_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event ENDECB */
+#define ECB_INTENCLR_ENDECB_Pos (0UL) /*!< Position of ENDECB field. */
+#define ECB_INTENCLR_ENDECB_Msk (0x1UL << ECB_INTENCLR_ENDECB_Pos) /*!< Bit mask of ENDECB field. */
+#define ECB_INTENCLR_ENDECB_Disabled (0UL) /*!< Read: Disabled */
+#define ECB_INTENCLR_ENDECB_Enabled (1UL) /*!< Read: Enabled */
+#define ECB_INTENCLR_ENDECB_Clear (1UL) /*!< Disable */
+
+/* Register: ECB_ECBDATAPTR */
+/* Description: ECB block encrypt memory pointers */
+
+/* Bits 31..0 : Pointer to the ECB data structure (see Table 1 ECB data structure overview) */
+#define ECB_ECBDATAPTR_ECBDATAPTR_Pos (0UL) /*!< Position of ECBDATAPTR field. */
+#define ECB_ECBDATAPTR_ECBDATAPTR_Msk (0xFFFFFFFFUL << ECB_ECBDATAPTR_ECBDATAPTR_Pos) /*!< Bit mask of ECBDATAPTR field. */
+
+
+/* Peripheral: EGU */
+/* Description: Event Generator Unit 0 */
+
+/* Register: EGU_TASKS_TRIGGER */
+/* Description: Description collection: Trigger n for triggering the corresponding TRIGGERED[n] event */
+
+/* Bit 0 : Trigger n for triggering the corresponding TRIGGERED[n] event */
+#define EGU_TASKS_TRIGGER_TASKS_TRIGGER_Pos (0UL) /*!< Position of TASKS_TRIGGER field. */
+#define EGU_TASKS_TRIGGER_TASKS_TRIGGER_Msk (0x1UL << EGU_TASKS_TRIGGER_TASKS_TRIGGER_Pos) /*!< Bit mask of TASKS_TRIGGER field. */
+#define EGU_TASKS_TRIGGER_TASKS_TRIGGER_Trigger (1UL) /*!< Trigger task */
+
+/* Register: EGU_EVENTS_TRIGGERED */
+/* Description: Description collection: Event number n generated by triggering the corresponding TRIGGER[n] task */
+
+/* Bit 0 : Event number n generated by triggering the corresponding TRIGGER[n] task */
+#define EGU_EVENTS_TRIGGERED_EVENTS_TRIGGERED_Pos (0UL) /*!< Position of EVENTS_TRIGGERED field. */
+#define EGU_EVENTS_TRIGGERED_EVENTS_TRIGGERED_Msk (0x1UL << EGU_EVENTS_TRIGGERED_EVENTS_TRIGGERED_Pos) /*!< Bit mask of EVENTS_TRIGGERED field. */
+#define EGU_EVENTS_TRIGGERED_EVENTS_TRIGGERED_NotGenerated (0UL) /*!< Event not generated */
+#define EGU_EVENTS_TRIGGERED_EVENTS_TRIGGERED_Generated (1UL) /*!< Event generated */
+
+/* Register: EGU_INTEN */
+/* Description: Enable or disable interrupt */
+
+/* Bit 15 : Enable or disable interrupt for event TRIGGERED[15] */
+#define EGU_INTEN_TRIGGERED15_Pos (15UL) /*!< Position of TRIGGERED15 field. */
+#define EGU_INTEN_TRIGGERED15_Msk (0x1UL << EGU_INTEN_TRIGGERED15_Pos) /*!< Bit mask of TRIGGERED15 field. */
+#define EGU_INTEN_TRIGGERED15_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED15_Enabled (1UL) /*!< Enable */
+
+/* Bit 14 : Enable or disable interrupt for event TRIGGERED[14] */
+#define EGU_INTEN_TRIGGERED14_Pos (14UL) /*!< Position of TRIGGERED14 field. */
+#define EGU_INTEN_TRIGGERED14_Msk (0x1UL << EGU_INTEN_TRIGGERED14_Pos) /*!< Bit mask of TRIGGERED14 field. */
+#define EGU_INTEN_TRIGGERED14_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED14_Enabled (1UL) /*!< Enable */
+
+/* Bit 13 : Enable or disable interrupt for event TRIGGERED[13] */
+#define EGU_INTEN_TRIGGERED13_Pos (13UL) /*!< Position of TRIGGERED13 field. */
+#define EGU_INTEN_TRIGGERED13_Msk (0x1UL << EGU_INTEN_TRIGGERED13_Pos) /*!< Bit mask of TRIGGERED13 field. */
+#define EGU_INTEN_TRIGGERED13_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED13_Enabled (1UL) /*!< Enable */
+
+/* Bit 12 : Enable or disable interrupt for event TRIGGERED[12] */
+#define EGU_INTEN_TRIGGERED12_Pos (12UL) /*!< Position of TRIGGERED12 field. */
+#define EGU_INTEN_TRIGGERED12_Msk (0x1UL << EGU_INTEN_TRIGGERED12_Pos) /*!< Bit mask of TRIGGERED12 field. */
+#define EGU_INTEN_TRIGGERED12_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED12_Enabled (1UL) /*!< Enable */
+
+/* Bit 11 : Enable or disable interrupt for event TRIGGERED[11] */
+#define EGU_INTEN_TRIGGERED11_Pos (11UL) /*!< Position of TRIGGERED11 field. */
+#define EGU_INTEN_TRIGGERED11_Msk (0x1UL << EGU_INTEN_TRIGGERED11_Pos) /*!< Bit mask of TRIGGERED11 field. */
+#define EGU_INTEN_TRIGGERED11_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED11_Enabled (1UL) /*!< Enable */
+
+/* Bit 10 : Enable or disable interrupt for event TRIGGERED[10] */
+#define EGU_INTEN_TRIGGERED10_Pos (10UL) /*!< Position of TRIGGERED10 field. */
+#define EGU_INTEN_TRIGGERED10_Msk (0x1UL << EGU_INTEN_TRIGGERED10_Pos) /*!< Bit mask of TRIGGERED10 field. */
+#define EGU_INTEN_TRIGGERED10_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED10_Enabled (1UL) /*!< Enable */
+
+/* Bit 9 : Enable or disable interrupt for event TRIGGERED[9] */
+#define EGU_INTEN_TRIGGERED9_Pos (9UL) /*!< Position of TRIGGERED9 field. */
+#define EGU_INTEN_TRIGGERED9_Msk (0x1UL << EGU_INTEN_TRIGGERED9_Pos) /*!< Bit mask of TRIGGERED9 field. */
+#define EGU_INTEN_TRIGGERED9_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED9_Enabled (1UL) /*!< Enable */
+
+/* Bit 8 : Enable or disable interrupt for event TRIGGERED[8] */
+#define EGU_INTEN_TRIGGERED8_Pos (8UL) /*!< Position of TRIGGERED8 field. */
+#define EGU_INTEN_TRIGGERED8_Msk (0x1UL << EGU_INTEN_TRIGGERED8_Pos) /*!< Bit mask of TRIGGERED8 field. */
+#define EGU_INTEN_TRIGGERED8_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED8_Enabled (1UL) /*!< Enable */
+
+/* Bit 7 : Enable or disable interrupt for event TRIGGERED[7] */
+#define EGU_INTEN_TRIGGERED7_Pos (7UL) /*!< Position of TRIGGERED7 field. */
+#define EGU_INTEN_TRIGGERED7_Msk (0x1UL << EGU_INTEN_TRIGGERED7_Pos) /*!< Bit mask of TRIGGERED7 field. */
+#define EGU_INTEN_TRIGGERED7_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED7_Enabled (1UL) /*!< Enable */
+
+/* Bit 6 : Enable or disable interrupt for event TRIGGERED[6] */
+#define EGU_INTEN_TRIGGERED6_Pos (6UL) /*!< Position of TRIGGERED6 field. */
+#define EGU_INTEN_TRIGGERED6_Msk (0x1UL << EGU_INTEN_TRIGGERED6_Pos) /*!< Bit mask of TRIGGERED6 field. */
+#define EGU_INTEN_TRIGGERED6_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED6_Enabled (1UL) /*!< Enable */
+
+/* Bit 5 : Enable or disable interrupt for event TRIGGERED[5] */
+#define EGU_INTEN_TRIGGERED5_Pos (5UL) /*!< Position of TRIGGERED5 field. */
+#define EGU_INTEN_TRIGGERED5_Msk (0x1UL << EGU_INTEN_TRIGGERED5_Pos) /*!< Bit mask of TRIGGERED5 field. */
+#define EGU_INTEN_TRIGGERED5_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED5_Enabled (1UL) /*!< Enable */
+
+/* Bit 4 : Enable or disable interrupt for event TRIGGERED[4] */
+#define EGU_INTEN_TRIGGERED4_Pos (4UL) /*!< Position of TRIGGERED4 field. */
+#define EGU_INTEN_TRIGGERED4_Msk (0x1UL << EGU_INTEN_TRIGGERED4_Pos) /*!< Bit mask of TRIGGERED4 field. */
+#define EGU_INTEN_TRIGGERED4_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED4_Enabled (1UL) /*!< Enable */
+
+/* Bit 3 : Enable or disable interrupt for event TRIGGERED[3] */
+#define EGU_INTEN_TRIGGERED3_Pos (3UL) /*!< Position of TRIGGERED3 field. */
+#define EGU_INTEN_TRIGGERED3_Msk (0x1UL << EGU_INTEN_TRIGGERED3_Pos) /*!< Bit mask of TRIGGERED3 field. */
+#define EGU_INTEN_TRIGGERED3_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED3_Enabled (1UL) /*!< Enable */
+
+/* Bit 2 : Enable or disable interrupt for event TRIGGERED[2] */
+#define EGU_INTEN_TRIGGERED2_Pos (2UL) /*!< Position of TRIGGERED2 field. */
+#define EGU_INTEN_TRIGGERED2_Msk (0x1UL << EGU_INTEN_TRIGGERED2_Pos) /*!< Bit mask of TRIGGERED2 field. */
+#define EGU_INTEN_TRIGGERED2_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED2_Enabled (1UL) /*!< Enable */
+
+/* Bit 1 : Enable or disable interrupt for event TRIGGERED[1] */
+#define EGU_INTEN_TRIGGERED1_Pos (1UL) /*!< Position of TRIGGERED1 field. */
+#define EGU_INTEN_TRIGGERED1_Msk (0x1UL << EGU_INTEN_TRIGGERED1_Pos) /*!< Bit mask of TRIGGERED1 field. */
+#define EGU_INTEN_TRIGGERED1_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED1_Enabled (1UL) /*!< Enable */
+
+/* Bit 0 : Enable or disable interrupt for event TRIGGERED[0] */
+#define EGU_INTEN_TRIGGERED0_Pos (0UL) /*!< Position of TRIGGERED0 field. */
+#define EGU_INTEN_TRIGGERED0_Msk (0x1UL << EGU_INTEN_TRIGGERED0_Pos) /*!< Bit mask of TRIGGERED0 field. */
+#define EGU_INTEN_TRIGGERED0_Disabled (0UL) /*!< Disable */
+#define EGU_INTEN_TRIGGERED0_Enabled (1UL) /*!< Enable */
+
+/* Register: EGU_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 15 : Write '1' to enable interrupt for event TRIGGERED[15] */
+#define EGU_INTENSET_TRIGGERED15_Pos (15UL) /*!< Position of TRIGGERED15 field. */
+#define EGU_INTENSET_TRIGGERED15_Msk (0x1UL << EGU_INTENSET_TRIGGERED15_Pos) /*!< Bit mask of TRIGGERED15 field. */
+#define EGU_INTENSET_TRIGGERED15_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED15_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED15_Set (1UL) /*!< Enable */
+
+/* Bit 14 : Write '1' to enable interrupt for event TRIGGERED[14] */
+#define EGU_INTENSET_TRIGGERED14_Pos (14UL) /*!< Position of TRIGGERED14 field. */
+#define EGU_INTENSET_TRIGGERED14_Msk (0x1UL << EGU_INTENSET_TRIGGERED14_Pos) /*!< Bit mask of TRIGGERED14 field. */
+#define EGU_INTENSET_TRIGGERED14_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED14_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED14_Set (1UL) /*!< Enable */
+
+/* Bit 13 : Write '1' to enable interrupt for event TRIGGERED[13] */
+#define EGU_INTENSET_TRIGGERED13_Pos (13UL) /*!< Position of TRIGGERED13 field. */
+#define EGU_INTENSET_TRIGGERED13_Msk (0x1UL << EGU_INTENSET_TRIGGERED13_Pos) /*!< Bit mask of TRIGGERED13 field. */
+#define EGU_INTENSET_TRIGGERED13_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED13_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED13_Set (1UL) /*!< Enable */
+
+/* Bit 12 : Write '1' to enable interrupt for event TRIGGERED[12] */
+#define EGU_INTENSET_TRIGGERED12_Pos (12UL) /*!< Position of TRIGGERED12 field. */
+#define EGU_INTENSET_TRIGGERED12_Msk (0x1UL << EGU_INTENSET_TRIGGERED12_Pos) /*!< Bit mask of TRIGGERED12 field. */
+#define EGU_INTENSET_TRIGGERED12_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED12_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED12_Set (1UL) /*!< Enable */
+
+/* Bit 11 : Write '1' to enable interrupt for event TRIGGERED[11] */
+#define EGU_INTENSET_TRIGGERED11_Pos (11UL) /*!< Position of TRIGGERED11 field. */
+#define EGU_INTENSET_TRIGGERED11_Msk (0x1UL << EGU_INTENSET_TRIGGERED11_Pos) /*!< Bit mask of TRIGGERED11 field. */
+#define EGU_INTENSET_TRIGGERED11_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED11_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED11_Set (1UL) /*!< Enable */
+
+/* Bit 10 : Write '1' to enable interrupt for event TRIGGERED[10] */
+#define EGU_INTENSET_TRIGGERED10_Pos (10UL) /*!< Position of TRIGGERED10 field. */
+#define EGU_INTENSET_TRIGGERED10_Msk (0x1UL << EGU_INTENSET_TRIGGERED10_Pos) /*!< Bit mask of TRIGGERED10 field. */
+#define EGU_INTENSET_TRIGGERED10_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED10_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED10_Set (1UL) /*!< Enable */
+
+/* Bit 9 : Write '1' to enable interrupt for event TRIGGERED[9] */
+#define EGU_INTENSET_TRIGGERED9_Pos (9UL) /*!< Position of TRIGGERED9 field. */
+#define EGU_INTENSET_TRIGGERED9_Msk (0x1UL << EGU_INTENSET_TRIGGERED9_Pos) /*!< Bit mask of TRIGGERED9 field. */
+#define EGU_INTENSET_TRIGGERED9_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED9_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED9_Set (1UL) /*!< Enable */
+
+/* Bit 8 : Write '1' to enable interrupt for event TRIGGERED[8] */
+#define EGU_INTENSET_TRIGGERED8_Pos (8UL) /*!< Position of TRIGGERED8 field. */
+#define EGU_INTENSET_TRIGGERED8_Msk (0x1UL << EGU_INTENSET_TRIGGERED8_Pos) /*!< Bit mask of TRIGGERED8 field. */
+#define EGU_INTENSET_TRIGGERED8_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED8_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED8_Set (1UL) /*!< Enable */
+
+/* Bit 7 : Write '1' to enable interrupt for event TRIGGERED[7] */
+#define EGU_INTENSET_TRIGGERED7_Pos (7UL) /*!< Position of TRIGGERED7 field. */
+#define EGU_INTENSET_TRIGGERED7_Msk (0x1UL << EGU_INTENSET_TRIGGERED7_Pos) /*!< Bit mask of TRIGGERED7 field. */
+#define EGU_INTENSET_TRIGGERED7_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED7_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED7_Set (1UL) /*!< Enable */
+
+/* Bit 6 : Write '1' to enable interrupt for event TRIGGERED[6] */
+#define EGU_INTENSET_TRIGGERED6_Pos (6UL) /*!< Position of TRIGGERED6 field. */
+#define EGU_INTENSET_TRIGGERED6_Msk (0x1UL << EGU_INTENSET_TRIGGERED6_Pos) /*!< Bit mask of TRIGGERED6 field. */
+#define EGU_INTENSET_TRIGGERED6_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED6_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED6_Set (1UL) /*!< Enable */
+
+/* Bit 5 : Write '1' to enable interrupt for event TRIGGERED[5] */
+#define EGU_INTENSET_TRIGGERED5_Pos (5UL) /*!< Position of TRIGGERED5 field. */
+#define EGU_INTENSET_TRIGGERED5_Msk (0x1UL << EGU_INTENSET_TRIGGERED5_Pos) /*!< Bit mask of TRIGGERED5 field. */
+#define EGU_INTENSET_TRIGGERED5_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED5_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED5_Set (1UL) /*!< Enable */
+
+/* Bit 4 : Write '1' to enable interrupt for event TRIGGERED[4] */
+#define EGU_INTENSET_TRIGGERED4_Pos (4UL) /*!< Position of TRIGGERED4 field. */
+#define EGU_INTENSET_TRIGGERED4_Msk (0x1UL << EGU_INTENSET_TRIGGERED4_Pos) /*!< Bit mask of TRIGGERED4 field. */
+#define EGU_INTENSET_TRIGGERED4_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED4_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED4_Set (1UL) /*!< Enable */
+
+/* Bit 3 : Write '1' to enable interrupt for event TRIGGERED[3] */
+#define EGU_INTENSET_TRIGGERED3_Pos (3UL) /*!< Position of TRIGGERED3 field. */
+#define EGU_INTENSET_TRIGGERED3_Msk (0x1UL << EGU_INTENSET_TRIGGERED3_Pos) /*!< Bit mask of TRIGGERED3 field. */
+#define EGU_INTENSET_TRIGGERED3_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED3_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED3_Set (1UL) /*!< Enable */
+
+/* Bit 2 : Write '1' to enable interrupt for event TRIGGERED[2] */
+#define EGU_INTENSET_TRIGGERED2_Pos (2UL) /*!< Position of TRIGGERED2 field. */
+#define EGU_INTENSET_TRIGGERED2_Msk (0x1UL << EGU_INTENSET_TRIGGERED2_Pos) /*!< Bit mask of TRIGGERED2 field. */
+#define EGU_INTENSET_TRIGGERED2_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED2_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED2_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event TRIGGERED[1] */
+#define EGU_INTENSET_TRIGGERED1_Pos (1UL) /*!< Position of TRIGGERED1 field. */
+#define EGU_INTENSET_TRIGGERED1_Msk (0x1UL << EGU_INTENSET_TRIGGERED1_Pos) /*!< Bit mask of TRIGGERED1 field. */
+#define EGU_INTENSET_TRIGGERED1_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED1_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED1_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event TRIGGERED[0] */
+#define EGU_INTENSET_TRIGGERED0_Pos (0UL) /*!< Position of TRIGGERED0 field. */
+#define EGU_INTENSET_TRIGGERED0_Msk (0x1UL << EGU_INTENSET_TRIGGERED0_Pos) /*!< Bit mask of TRIGGERED0 field. */
+#define EGU_INTENSET_TRIGGERED0_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENSET_TRIGGERED0_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENSET_TRIGGERED0_Set (1UL) /*!< Enable */
+
+/* Register: EGU_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 15 : Write '1' to disable interrupt for event TRIGGERED[15] */
+#define EGU_INTENCLR_TRIGGERED15_Pos (15UL) /*!< Position of TRIGGERED15 field. */
+#define EGU_INTENCLR_TRIGGERED15_Msk (0x1UL << EGU_INTENCLR_TRIGGERED15_Pos) /*!< Bit mask of TRIGGERED15 field. */
+#define EGU_INTENCLR_TRIGGERED15_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED15_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED15_Clear (1UL) /*!< Disable */
+
+/* Bit 14 : Write '1' to disable interrupt for event TRIGGERED[14] */
+#define EGU_INTENCLR_TRIGGERED14_Pos (14UL) /*!< Position of TRIGGERED14 field. */
+#define EGU_INTENCLR_TRIGGERED14_Msk (0x1UL << EGU_INTENCLR_TRIGGERED14_Pos) /*!< Bit mask of TRIGGERED14 field. */
+#define EGU_INTENCLR_TRIGGERED14_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED14_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED14_Clear (1UL) /*!< Disable */
+
+/* Bit 13 : Write '1' to disable interrupt for event TRIGGERED[13] */
+#define EGU_INTENCLR_TRIGGERED13_Pos (13UL) /*!< Position of TRIGGERED13 field. */
+#define EGU_INTENCLR_TRIGGERED13_Msk (0x1UL << EGU_INTENCLR_TRIGGERED13_Pos) /*!< Bit mask of TRIGGERED13 field. */
+#define EGU_INTENCLR_TRIGGERED13_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED13_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED13_Clear (1UL) /*!< Disable */
+
+/* Bit 12 : Write '1' to disable interrupt for event TRIGGERED[12] */
+#define EGU_INTENCLR_TRIGGERED12_Pos (12UL) /*!< Position of TRIGGERED12 field. */
+#define EGU_INTENCLR_TRIGGERED12_Msk (0x1UL << EGU_INTENCLR_TRIGGERED12_Pos) /*!< Bit mask of TRIGGERED12 field. */
+#define EGU_INTENCLR_TRIGGERED12_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED12_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED12_Clear (1UL) /*!< Disable */
+
+/* Bit 11 : Write '1' to disable interrupt for event TRIGGERED[11] */
+#define EGU_INTENCLR_TRIGGERED11_Pos (11UL) /*!< Position of TRIGGERED11 field. */
+#define EGU_INTENCLR_TRIGGERED11_Msk (0x1UL << EGU_INTENCLR_TRIGGERED11_Pos) /*!< Bit mask of TRIGGERED11 field. */
+#define EGU_INTENCLR_TRIGGERED11_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED11_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED11_Clear (1UL) /*!< Disable */
+
+/* Bit 10 : Write '1' to disable interrupt for event TRIGGERED[10] */
+#define EGU_INTENCLR_TRIGGERED10_Pos (10UL) /*!< Position of TRIGGERED10 field. */
+#define EGU_INTENCLR_TRIGGERED10_Msk (0x1UL << EGU_INTENCLR_TRIGGERED10_Pos) /*!< Bit mask of TRIGGERED10 field. */
+#define EGU_INTENCLR_TRIGGERED10_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED10_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED10_Clear (1UL) /*!< Disable */
+
+/* Bit 9 : Write '1' to disable interrupt for event TRIGGERED[9] */
+#define EGU_INTENCLR_TRIGGERED9_Pos (9UL) /*!< Position of TRIGGERED9 field. */
+#define EGU_INTENCLR_TRIGGERED9_Msk (0x1UL << EGU_INTENCLR_TRIGGERED9_Pos) /*!< Bit mask of TRIGGERED9 field. */
+#define EGU_INTENCLR_TRIGGERED9_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED9_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED9_Clear (1UL) /*!< Disable */
+
+/* Bit 8 : Write '1' to disable interrupt for event TRIGGERED[8] */
+#define EGU_INTENCLR_TRIGGERED8_Pos (8UL) /*!< Position of TRIGGERED8 field. */
+#define EGU_INTENCLR_TRIGGERED8_Msk (0x1UL << EGU_INTENCLR_TRIGGERED8_Pos) /*!< Bit mask of TRIGGERED8 field. */
+#define EGU_INTENCLR_TRIGGERED8_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED8_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED8_Clear (1UL) /*!< Disable */
+
+/* Bit 7 : Write '1' to disable interrupt for event TRIGGERED[7] */
+#define EGU_INTENCLR_TRIGGERED7_Pos (7UL) /*!< Position of TRIGGERED7 field. */
+#define EGU_INTENCLR_TRIGGERED7_Msk (0x1UL << EGU_INTENCLR_TRIGGERED7_Pos) /*!< Bit mask of TRIGGERED7 field. */
+#define EGU_INTENCLR_TRIGGERED7_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED7_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED7_Clear (1UL) /*!< Disable */
+
+/* Bit 6 : Write '1' to disable interrupt for event TRIGGERED[6] */
+#define EGU_INTENCLR_TRIGGERED6_Pos (6UL) /*!< Position of TRIGGERED6 field. */
+#define EGU_INTENCLR_TRIGGERED6_Msk (0x1UL << EGU_INTENCLR_TRIGGERED6_Pos) /*!< Bit mask of TRIGGERED6 field. */
+#define EGU_INTENCLR_TRIGGERED6_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED6_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED6_Clear (1UL) /*!< Disable */
+
+/* Bit 5 : Write '1' to disable interrupt for event TRIGGERED[5] */
+#define EGU_INTENCLR_TRIGGERED5_Pos (5UL) /*!< Position of TRIGGERED5 field. */
+#define EGU_INTENCLR_TRIGGERED5_Msk (0x1UL << EGU_INTENCLR_TRIGGERED5_Pos) /*!< Bit mask of TRIGGERED5 field. */
+#define EGU_INTENCLR_TRIGGERED5_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED5_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED5_Clear (1UL) /*!< Disable */
+
+/* Bit 4 : Write '1' to disable interrupt for event TRIGGERED[4] */
+#define EGU_INTENCLR_TRIGGERED4_Pos (4UL) /*!< Position of TRIGGERED4 field. */
+#define EGU_INTENCLR_TRIGGERED4_Msk (0x1UL << EGU_INTENCLR_TRIGGERED4_Pos) /*!< Bit mask of TRIGGERED4 field. */
+#define EGU_INTENCLR_TRIGGERED4_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED4_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED4_Clear (1UL) /*!< Disable */
+
+/* Bit 3 : Write '1' to disable interrupt for event TRIGGERED[3] */
+#define EGU_INTENCLR_TRIGGERED3_Pos (3UL) /*!< Position of TRIGGERED3 field. */
+#define EGU_INTENCLR_TRIGGERED3_Msk (0x1UL << EGU_INTENCLR_TRIGGERED3_Pos) /*!< Bit mask of TRIGGERED3 field. */
+#define EGU_INTENCLR_TRIGGERED3_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED3_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED3_Clear (1UL) /*!< Disable */
+
+/* Bit 2 : Write '1' to disable interrupt for event TRIGGERED[2] */
+#define EGU_INTENCLR_TRIGGERED2_Pos (2UL) /*!< Position of TRIGGERED2 field. */
+#define EGU_INTENCLR_TRIGGERED2_Msk (0x1UL << EGU_INTENCLR_TRIGGERED2_Pos) /*!< Bit mask of TRIGGERED2 field. */
+#define EGU_INTENCLR_TRIGGERED2_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED2_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED2_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event TRIGGERED[1] */
+#define EGU_INTENCLR_TRIGGERED1_Pos (1UL) /*!< Position of TRIGGERED1 field. */
+#define EGU_INTENCLR_TRIGGERED1_Msk (0x1UL << EGU_INTENCLR_TRIGGERED1_Pos) /*!< Bit mask of TRIGGERED1 field. */
+#define EGU_INTENCLR_TRIGGERED1_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED1_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED1_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event TRIGGERED[0] */
+#define EGU_INTENCLR_TRIGGERED0_Pos (0UL) /*!< Position of TRIGGERED0 field. */
+#define EGU_INTENCLR_TRIGGERED0_Msk (0x1UL << EGU_INTENCLR_TRIGGERED0_Pos) /*!< Bit mask of TRIGGERED0 field. */
+#define EGU_INTENCLR_TRIGGERED0_Disabled (0UL) /*!< Read: Disabled */
+#define EGU_INTENCLR_TRIGGERED0_Enabled (1UL) /*!< Read: Enabled */
+#define EGU_INTENCLR_TRIGGERED0_Clear (1UL) /*!< Disable */
+
+
+/* Peripheral: FICR */
+/* Description: Factory information configuration registers */
+
+/* Register: FICR_CODEPAGESIZE */
+/* Description: Code memory page size */
+
+/* Bits 31..0 : Code memory page size */
+#define FICR_CODEPAGESIZE_CODEPAGESIZE_Pos (0UL) /*!< Position of CODEPAGESIZE field. */
+#define FICR_CODEPAGESIZE_CODEPAGESIZE_Msk (0xFFFFFFFFUL << FICR_CODEPAGESIZE_CODEPAGESIZE_Pos) /*!< Bit mask of CODEPAGESIZE field. */
+
+/* Register: FICR_CODESIZE */
+/* Description: Code memory size */
+
+/* Bits 31..0 : Code memory size in number of pages */
+#define FICR_CODESIZE_CODESIZE_Pos (0UL) /*!< Position of CODESIZE field. */
+#define FICR_CODESIZE_CODESIZE_Msk (0xFFFFFFFFUL << FICR_CODESIZE_CODESIZE_Pos) /*!< Bit mask of CODESIZE field. */
+
+/* Register: FICR_DEVICEID */
+/* Description: Description collection: Device identifier */
+
+/* Bits 31..0 : 64 bit unique device identifier */
+#define FICR_DEVICEID_DEVICEID_Pos (0UL) /*!< Position of DEVICEID field. */
+#define FICR_DEVICEID_DEVICEID_Msk (0xFFFFFFFFUL << FICR_DEVICEID_DEVICEID_Pos) /*!< Bit mask of DEVICEID field. */
+
+/* Register: FICR_ER */
+/* Description: Description collection: Encryption root, word n */
+
+/* Bits 31..0 : Encryption root, word n */
+#define FICR_ER_ER_Pos (0UL) /*!< Position of ER field. */
+#define FICR_ER_ER_Msk (0xFFFFFFFFUL << FICR_ER_ER_Pos) /*!< Bit mask of ER field. */
+
+/* Register: FICR_IR */
+/* Description: Description collection: Identity Root, word n */
+
+/* Bits 31..0 : Identity Root, word n */
+#define FICR_IR_IR_Pos (0UL) /*!< Position of IR field. */
+#define FICR_IR_IR_Msk (0xFFFFFFFFUL << FICR_IR_IR_Pos) /*!< Bit mask of IR field. */
+
+/* Register: FICR_DEVICEADDRTYPE */
+/* Description: Device address type */
+
+/* Bit 0 : Device address type */
+#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Pos (0UL) /*!< Position of DEVICEADDRTYPE field. */
+#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Msk (0x1UL << FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Pos) /*!< Bit mask of DEVICEADDRTYPE field. */
+#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Public (0UL) /*!< Public address */
+#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Random (1UL) /*!< Random address */
+
+/* Register: FICR_DEVICEADDR */
+/* Description: Description collection: Device address n */
+
+/* Bits 31..0 : 48 bit device address */
+#define FICR_DEVICEADDR_DEVICEADDR_Pos (0UL) /*!< Position of DEVICEADDR field. */
+#define FICR_DEVICEADDR_DEVICEADDR_Msk (0xFFFFFFFFUL << FICR_DEVICEADDR_DEVICEADDR_Pos) /*!< Bit mask of DEVICEADDR field. */
+
+/* Register: FICR_INFO_PART */
+/* Description: Part code */
+
+/* Bits 31..0 : Part code */
+#define FICR_INFO_PART_PART_Pos (0UL) /*!< Position of PART field. */
+#define FICR_INFO_PART_PART_Msk (0xFFFFFFFFUL << FICR_INFO_PART_PART_Pos) /*!< Bit mask of PART field. */
+#define FICR_INFO_PART_PART_N52833 (0x52833UL) /*!< nRF52833 */
+#define FICR_INFO_PART_PART_N52840 (0x52840UL) /*!< nRF52840 */
+#define FICR_INFO_PART_PART_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */
+
+/* Register: FICR_INFO_VARIANT */
+/* Description: Build code (hardware version and production configuration) */
+
+/* Bits 31..0 : Build code (hardware version and production configuration). Encoded as ASCII. */
+#define FICR_INFO_VARIANT_VARIANT_Pos (0UL) /*!< Position of VARIANT field. */
+#define FICR_INFO_VARIANT_VARIANT_Msk (0xFFFFFFFFUL << FICR_INFO_VARIANT_VARIANT_Pos) /*!< Bit mask of VARIANT field. */
+#define FICR_INFO_VARIANT_VARIANT_AAAA (0x41414141UL) /*!< AAAA */
+#define FICR_INFO_VARIANT_VARIANT_AAAB (0x41414142UL) /*!< AAAB */
+#define FICR_INFO_VARIANT_VARIANT_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */
+
+/* Register: FICR_INFO_PACKAGE */
+/* Description: Package option */
+
+/* Bits 31..0 : Package option */
+#define FICR_INFO_PACKAGE_PACKAGE_Pos (0UL) /*!< Position of PACKAGE field. */
+#define FICR_INFO_PACKAGE_PACKAGE_Msk (0xFFFFFFFFUL << FICR_INFO_PACKAGE_PACKAGE_Pos) /*!< Bit mask of PACKAGE field. */
+#define FICR_INFO_PACKAGE_PACKAGE_QI (0x2004UL) /*!< QIxx - 73-pin aQFN */
+#define FICR_INFO_PACKAGE_PACKAGE_QD (0x2007UL) /*!< QDxx - 40-pin QFN */
+#define FICR_INFO_PACKAGE_PACKAGE_CJ (0x2008UL) /*!< CJxx - WLCSP */
+#define FICR_INFO_PACKAGE_PACKAGE_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */
+
+/* Register: FICR_INFO_RAM */
+/* Description: RAM variant */
+
+/* Bits 31..0 : RAM variant */
+#define FICR_INFO_RAM_RAM_Pos (0UL) /*!< Position of RAM field. */
+#define FICR_INFO_RAM_RAM_Msk (0xFFFFFFFFUL << FICR_INFO_RAM_RAM_Pos) /*!< Bit mask of RAM field. */
+#define FICR_INFO_RAM_RAM_K16 (0x10UL) /*!< 16 kByte RAM */
+#define FICR_INFO_RAM_RAM_K32 (0x20UL) /*!< 32 kByte RAM */
+#define FICR_INFO_RAM_RAM_K64 (0x40UL) /*!< 64 kByte RAM */
+#define FICR_INFO_RAM_RAM_K128 (0x80UL) /*!< 128 kByte RAM */
+#define FICR_INFO_RAM_RAM_K256 (0x100UL) /*!< 256 kByte RAM */
+#define FICR_INFO_RAM_RAM_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */
+
+/* Register: FICR_INFO_FLASH */
+/* Description: Flash variant */
+
+/* Bits 31..0 : Flash variant */
+#define FICR_INFO_FLASH_FLASH_Pos (0UL) /*!< Position of FLASH field. */
+#define FICR_INFO_FLASH_FLASH_Msk (0xFFFFFFFFUL << FICR_INFO_FLASH_FLASH_Pos) /*!< Bit mask of FLASH field. */
+#define FICR_INFO_FLASH_FLASH_K128 (0x80UL) /*!< 128 kByte FLASH */
+#define FICR_INFO_FLASH_FLASH_K256 (0x100UL) /*!< 256 kByte FLASH */
+#define FICR_INFO_FLASH_FLASH_K512 (0x200UL) /*!< 512 kByte FLASH */
+#define FICR_INFO_FLASH_FLASH_K1024 (0x400UL) /*!< 1 MByte FLASH */
+#define FICR_INFO_FLASH_FLASH_K2048 (0x800UL) /*!< 2 MByte FLASH */
+#define FICR_INFO_FLASH_FLASH_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */
+
+/* Register: FICR_PRODTEST */
+/* Description: Description collection: Production test signature n */
+
+/* Bits 31..0 : Production test signature n */
+#define FICR_PRODTEST_PRODTEST_Pos (0UL) /*!< Position of PRODTEST field. */
+#define FICR_PRODTEST_PRODTEST_Msk (0xFFFFFFFFUL << FICR_PRODTEST_PRODTEST_Pos) /*!< Bit mask of PRODTEST field. */
+#define FICR_PRODTEST_PRODTEST_Done (0xBB42319FUL) /*!< Production tests done */
+#define FICR_PRODTEST_PRODTEST_NotDone (0xFFFFFFFFUL) /*!< Production tests not done */
+
+/* Register: FICR_TEMP_A0 */
+/* Description: Slope definition A0 */
+
+/* Bits 11..0 : A (slope definition) register. */
+#define FICR_TEMP_A0_A_Pos (0UL) /*!< Position of A field. */
+#define FICR_TEMP_A0_A_Msk (0xFFFUL << FICR_TEMP_A0_A_Pos) /*!< Bit mask of A field. */
+
+/* Register: FICR_TEMP_A1 */
+/* Description: Slope definition A1 */
+
+/* Bits 11..0 : A (slope definition) register. */
+#define FICR_TEMP_A1_A_Pos (0UL) /*!< Position of A field. */
+#define FICR_TEMP_A1_A_Msk (0xFFFUL << FICR_TEMP_A1_A_Pos) /*!< Bit mask of A field. */
+
+/* Register: FICR_TEMP_A2 */
+/* Description: Slope definition A2 */
+
+/* Bits 11..0 : A (slope definition) register. */
+#define FICR_TEMP_A2_A_Pos (0UL) /*!< Position of A field. */
+#define FICR_TEMP_A2_A_Msk (0xFFFUL << FICR_TEMP_A2_A_Pos) /*!< Bit mask of A field. */
+
+/* Register: FICR_TEMP_A3 */
+/* Description: Slope definition A3 */
+
+/* Bits 11..0 : A (slope definition) register. */
+#define FICR_TEMP_A3_A_Pos (0UL) /*!< Position of A field. */
+#define FICR_TEMP_A3_A_Msk (0xFFFUL << FICR_TEMP_A3_A_Pos) /*!< Bit mask of A field. */
+
+/* Register: FICR_TEMP_A4 */
+/* Description: Slope definition A4 */
+
+/* Bits 11..0 : A (slope definition) register. */
+#define FICR_TEMP_A4_A_Pos (0UL) /*!< Position of A field. */
+#define FICR_TEMP_A4_A_Msk (0xFFFUL << FICR_TEMP_A4_A_Pos) /*!< Bit mask of A field. */
+
+/* Register: FICR_TEMP_A5 */
+/* Description: Slope definition A5 */
+
+/* Bits 11..0 : A (slope definition) register. */
+#define FICR_TEMP_A5_A_Pos (0UL) /*!< Position of A field. */
+#define FICR_TEMP_A5_A_Msk (0xFFFUL << FICR_TEMP_A5_A_Pos) /*!< Bit mask of A field. */
+
+/* Register: FICR_TEMP_B0 */
+/* Description: Y-intercept B0 */
+
+/* Bits 13..0 : B (y-intercept) */
+#define FICR_TEMP_B0_B_Pos (0UL) /*!< Position of B field. */
+#define FICR_TEMP_B0_B_Msk (0x3FFFUL << FICR_TEMP_B0_B_Pos) /*!< Bit mask of B field. */
+
+/* Register: FICR_TEMP_B1 */
+/* Description: Y-intercept B1 */
+
+/* Bits 13..0 : B (y-intercept) */
+#define FICR_TEMP_B1_B_Pos (0UL) /*!< Position of B field. */
+#define FICR_TEMP_B1_B_Msk (0x3FFFUL << FICR_TEMP_B1_B_Pos) /*!< Bit mask of B field. */
+
+/* Register: FICR_TEMP_B2 */
+/* Description: Y-intercept B2 */
+
+/* Bits 13..0 : B (y-intercept) */
+#define FICR_TEMP_B2_B_Pos (0UL) /*!< Position of B field. */
+#define FICR_TEMP_B2_B_Msk (0x3FFFUL << FICR_TEMP_B2_B_Pos) /*!< Bit mask of B field. */
+
+/* Register: FICR_TEMP_B3 */
+/* Description: Y-intercept B3 */
+
+/* Bits 13..0 : B (y-intercept) */
+#define FICR_TEMP_B3_B_Pos (0UL) /*!< Position of B field. */
+#define FICR_TEMP_B3_B_Msk (0x3FFFUL << FICR_TEMP_B3_B_Pos) /*!< Bit mask of B field. */
+
+/* Register: FICR_TEMP_B4 */
+/* Description: Y-intercept B4 */
+
+/* Bits 13..0 : B (y-intercept) */
+#define FICR_TEMP_B4_B_Pos (0UL) /*!< Position of B field. */
+#define FICR_TEMP_B4_B_Msk (0x3FFFUL << FICR_TEMP_B4_B_Pos) /*!< Bit mask of B field. */
+
+/* Register: FICR_TEMP_B5 */
+/* Description: Y-intercept B5 */
+
+/* Bits 13..0 : B (y-intercept) */
+#define FICR_TEMP_B5_B_Pos (0UL) /*!< Position of B field. */
+#define FICR_TEMP_B5_B_Msk (0x3FFFUL << FICR_TEMP_B5_B_Pos) /*!< Bit mask of B field. */
+
+/* Register: FICR_TEMP_T0 */
+/* Description: Segment end T0 */
+
+/* Bits 7..0 : T (segment end) register */
+#define FICR_TEMP_T0_T_Pos (0UL) /*!< Position of T field. */
+#define FICR_TEMP_T0_T_Msk (0xFFUL << FICR_TEMP_T0_T_Pos) /*!< Bit mask of T field. */
+
+/* Register: FICR_TEMP_T1 */
+/* Description: Segment end T1 */
+
+/* Bits 7..0 : T (segment end) register */
+#define FICR_TEMP_T1_T_Pos (0UL) /*!< Position of T field. */
+#define FICR_TEMP_T1_T_Msk (0xFFUL << FICR_TEMP_T1_T_Pos) /*!< Bit mask of T field. */
+
+/* Register: FICR_TEMP_T2 */
+/* Description: Segment end T2 */
+
+/* Bits 7..0 : T (segment end) register */
+#define FICR_TEMP_T2_T_Pos (0UL) /*!< Position of T field. */
+#define FICR_TEMP_T2_T_Msk (0xFFUL << FICR_TEMP_T2_T_Pos) /*!< Bit mask of T field. */
+
+/* Register: FICR_TEMP_T3 */
+/* Description: Segment end T3 */
+
+/* Bits 7..0 : T (segment end) register */
+#define FICR_TEMP_T3_T_Pos (0UL) /*!< Position of T field. */
+#define FICR_TEMP_T3_T_Msk (0xFFUL << FICR_TEMP_T3_T_Pos) /*!< Bit mask of T field. */
+
+/* Register: FICR_TEMP_T4 */
+/* Description: Segment end T4 */
+
+/* Bits 7..0 : T (segment end) register */
+#define FICR_TEMP_T4_T_Pos (0UL) /*!< Position of T field. */
+#define FICR_TEMP_T4_T_Msk (0xFFUL << FICR_TEMP_T4_T_Pos) /*!< Bit mask of T field. */
+
+/* Register: FICR_NFC_TAGHEADER0 */
+/* Description: Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST, and NFCID1_LAST. */
+
+/* Bits 31..24 : Unique identifier byte 3 */
+#define FICR_NFC_TAGHEADER0_UD3_Pos (24UL) /*!< Position of UD3 field. */
+#define FICR_NFC_TAGHEADER0_UD3_Msk (0xFFUL << FICR_NFC_TAGHEADER0_UD3_Pos) /*!< Bit mask of UD3 field. */
+
+/* Bits 23..16 : Unique identifier byte 2 */
+#define FICR_NFC_TAGHEADER0_UD2_Pos (16UL) /*!< Position of UD2 field. */
+#define FICR_NFC_TAGHEADER0_UD2_Msk (0xFFUL << FICR_NFC_TAGHEADER0_UD2_Pos) /*!< Bit mask of UD2 field. */
+
+/* Bits 15..8 : Unique identifier byte 1 */
+#define FICR_NFC_TAGHEADER0_UD1_Pos (8UL) /*!< Position of UD1 field. */
+#define FICR_NFC_TAGHEADER0_UD1_Msk (0xFFUL << FICR_NFC_TAGHEADER0_UD1_Pos) /*!< Bit mask of UD1 field. */
+
+/* Bits 7..0 : Default Manufacturer ID: Nordic Semiconductor ASA has ICM 0x5F */
+#define FICR_NFC_TAGHEADER0_MFGID_Pos (0UL) /*!< Position of MFGID field. */
+#define FICR_NFC_TAGHEADER0_MFGID_Msk (0xFFUL << FICR_NFC_TAGHEADER0_MFGID_Pos) /*!< Bit mask of MFGID field. */
+
+/* Register: FICR_NFC_TAGHEADER1 */
+/* Description: Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST, and NFCID1_LAST. */
+
+/* Bits 31..24 : Unique identifier byte 7 */
+#define FICR_NFC_TAGHEADER1_UD7_Pos (24UL) /*!< Position of UD7 field. */
+#define FICR_NFC_TAGHEADER1_UD7_Msk (0xFFUL << FICR_NFC_TAGHEADER1_UD7_Pos) /*!< Bit mask of UD7 field. */
+
+/* Bits 23..16 : Unique identifier byte 6 */
+#define FICR_NFC_TAGHEADER1_UD6_Pos (16UL) /*!< Position of UD6 field. */
+#define FICR_NFC_TAGHEADER1_UD6_Msk (0xFFUL << FICR_NFC_TAGHEADER1_UD6_Pos) /*!< Bit mask of UD6 field. */
+
+/* Bits 15..8 : Unique identifier byte 5 */
+#define FICR_NFC_TAGHEADER1_UD5_Pos (8UL) /*!< Position of UD5 field. */
+#define FICR_NFC_TAGHEADER1_UD5_Msk (0xFFUL << FICR_NFC_TAGHEADER1_UD5_Pos) /*!< Bit mask of UD5 field. */
+
+/* Bits 7..0 : Unique identifier byte 4 */
+#define FICR_NFC_TAGHEADER1_UD4_Pos (0UL) /*!< Position of UD4 field. */
+#define FICR_NFC_TAGHEADER1_UD4_Msk (0xFFUL << FICR_NFC_TAGHEADER1_UD4_Pos) /*!< Bit mask of UD4 field. */
+
+/* Register: FICR_NFC_TAGHEADER2 */
+/* Description: Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST, and NFCID1_LAST. */
+
+/* Bits 31..24 : Unique identifier byte 11 */
+#define FICR_NFC_TAGHEADER2_UD11_Pos (24UL) /*!< Position of UD11 field. */
+#define FICR_NFC_TAGHEADER2_UD11_Msk (0xFFUL << FICR_NFC_TAGHEADER2_UD11_Pos) /*!< Bit mask of UD11 field. */
+
+/* Bits 23..16 : Unique identifier byte 10 */
+#define FICR_NFC_TAGHEADER2_UD10_Pos (16UL) /*!< Position of UD10 field. */
+#define FICR_NFC_TAGHEADER2_UD10_Msk (0xFFUL << FICR_NFC_TAGHEADER2_UD10_Pos) /*!< Bit mask of UD10 field. */
+
+/* Bits 15..8 : Unique identifier byte 9 */
+#define FICR_NFC_TAGHEADER2_UD9_Pos (8UL) /*!< Position of UD9 field. */
+#define FICR_NFC_TAGHEADER2_UD9_Msk (0xFFUL << FICR_NFC_TAGHEADER2_UD9_Pos) /*!< Bit mask of UD9 field. */
+
+/* Bits 7..0 : Unique identifier byte 8 */
+#define FICR_NFC_TAGHEADER2_UD8_Pos (0UL) /*!< Position of UD8 field. */
+#define FICR_NFC_TAGHEADER2_UD8_Msk (0xFFUL << FICR_NFC_TAGHEADER2_UD8_Pos) /*!< Bit mask of UD8 field. */
+
+/* Register: FICR_NFC_TAGHEADER3 */
+/* Description: Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST, and NFCID1_LAST. */
+
+/* Bits 31..24 : Unique identifier byte 15 */
+#define FICR_NFC_TAGHEADER3_UD15_Pos (24UL) /*!< Position of UD15 field. */
+#define FICR_NFC_TAGHEADER3_UD15_Msk (0xFFUL << FICR_NFC_TAGHEADER3_UD15_Pos) /*!< Bit mask of UD15 field. */
+
+/* Bits 23..16 : Unique identifier byte 14 */
+#define FICR_NFC_TAGHEADER3_UD14_Pos (16UL) /*!< Position of UD14 field. */
+#define FICR_NFC_TAGHEADER3_UD14_Msk (0xFFUL << FICR_NFC_TAGHEADER3_UD14_Pos) /*!< Bit mask of UD14 field. */
+
+/* Bits 15..8 : Unique identifier byte 13 */
+#define FICR_NFC_TAGHEADER3_UD13_Pos (8UL) /*!< Position of UD13 field. */
+#define FICR_NFC_TAGHEADER3_UD13_Msk (0xFFUL << FICR_NFC_TAGHEADER3_UD13_Pos) /*!< Bit mask of UD13 field. */
+
+/* Bits 7..0 : Unique identifier byte 12 */
+#define FICR_NFC_TAGHEADER3_UD12_Pos (0UL) /*!< Position of UD12 field. */
+#define FICR_NFC_TAGHEADER3_UD12_Msk (0xFFUL << FICR_NFC_TAGHEADER3_UD12_Pos) /*!< Bit mask of UD12 field. */
+
+
+/* Peripheral: GPIOTE */
+/* Description: GPIO Tasks and Events */
+
+/* Register: GPIOTE_TASKS_OUT */
+/* Description: Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY. */
+
+/* Bit 0 : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY. */
+#define GPIOTE_TASKS_OUT_TASKS_OUT_Pos (0UL) /*!< Position of TASKS_OUT field. */
+#define GPIOTE_TASKS_OUT_TASKS_OUT_Msk (0x1UL << GPIOTE_TASKS_OUT_TASKS_OUT_Pos) /*!< Bit mask of TASKS_OUT field. */
+#define GPIOTE_TASKS_OUT_TASKS_OUT_Trigger (1UL) /*!< Trigger task */
+
+/* Register: GPIOTE_TASKS_SET */
+/* Description: Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high. */
+
+/* Bit 0 : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high. */
+#define GPIOTE_TASKS_SET_TASKS_SET_Pos (0UL) /*!< Position of TASKS_SET field. */
+#define GPIOTE_TASKS_SET_TASKS_SET_Msk (0x1UL << GPIOTE_TASKS_SET_TASKS_SET_Pos) /*!< Bit mask of TASKS_SET field. */
+#define GPIOTE_TASKS_SET_TASKS_SET_Trigger (1UL) /*!< Trigger task */
+
+/* Register: GPIOTE_TASKS_CLR */
+/* Description: Description collection: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low. */
+
+/* Bit 0 : Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low. */
+#define GPIOTE_TASKS_CLR_TASKS_CLR_Pos (0UL) /*!< Position of TASKS_CLR field. */
+#define GPIOTE_TASKS_CLR_TASKS_CLR_Msk (0x1UL << GPIOTE_TASKS_CLR_TASKS_CLR_Pos) /*!< Bit mask of TASKS_CLR field. */
+#define GPIOTE_TASKS_CLR_TASKS_CLR_Trigger (1UL) /*!< Trigger task */
+
+/* Register: GPIOTE_EVENTS_IN */
+/* Description: Description collection: Event generated from pin specified in CONFIG[n].PSEL */
+
+/* Bit 0 : Event generated from pin specified in CONFIG[n].PSEL */
+#define GPIOTE_EVENTS_IN_EVENTS_IN_Pos (0UL) /*!< Position of EVENTS_IN field. */
+#define GPIOTE_EVENTS_IN_EVENTS_IN_Msk (0x1UL << GPIOTE_EVENTS_IN_EVENTS_IN_Pos) /*!< Bit mask of EVENTS_IN field. */
+#define GPIOTE_EVENTS_IN_EVENTS_IN_NotGenerated (0UL) /*!< Event not generated */
+#define GPIOTE_EVENTS_IN_EVENTS_IN_Generated (1UL) /*!< Event generated */
+
+/* Register: GPIOTE_EVENTS_PORT */
+/* Description: Event generated from multiple input GPIO pins with SENSE mechanism enabled */
+
+/* Bit 0 : Event generated from multiple input GPIO pins with SENSE mechanism enabled */
+#define GPIOTE_EVENTS_PORT_EVENTS_PORT_Pos (0UL) /*!< Position of EVENTS_PORT field. */
+#define GPIOTE_EVENTS_PORT_EVENTS_PORT_Msk (0x1UL << GPIOTE_EVENTS_PORT_EVENTS_PORT_Pos) /*!< Bit mask of EVENTS_PORT field. */
+#define GPIOTE_EVENTS_PORT_EVENTS_PORT_NotGenerated (0UL) /*!< Event not generated */
+#define GPIOTE_EVENTS_PORT_EVENTS_PORT_Generated (1UL) /*!< Event generated */
+
+/* Register: GPIOTE_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 31 : Write '1' to enable interrupt for event PORT */
+#define GPIOTE_INTENSET_PORT_Pos (31UL) /*!< Position of PORT field. */
+#define GPIOTE_INTENSET_PORT_Msk (0x1UL << GPIOTE_INTENSET_PORT_Pos) /*!< Bit mask of PORT field. */
+#define GPIOTE_INTENSET_PORT_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENSET_PORT_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENSET_PORT_Set (1UL) /*!< Enable */
+
+/* Bit 7 : Write '1' to enable interrupt for event IN[7] */
+#define GPIOTE_INTENSET_IN7_Pos (7UL) /*!< Position of IN7 field. */
+#define GPIOTE_INTENSET_IN7_Msk (0x1UL << GPIOTE_INTENSET_IN7_Pos) /*!< Bit mask of IN7 field. */
+#define GPIOTE_INTENSET_IN7_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENSET_IN7_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENSET_IN7_Set (1UL) /*!< Enable */
+
+/* Bit 6 : Write '1' to enable interrupt for event IN[6] */
+#define GPIOTE_INTENSET_IN6_Pos (6UL) /*!< Position of IN6 field. */
+#define GPIOTE_INTENSET_IN6_Msk (0x1UL << GPIOTE_INTENSET_IN6_Pos) /*!< Bit mask of IN6 field. */
+#define GPIOTE_INTENSET_IN6_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENSET_IN6_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENSET_IN6_Set (1UL) /*!< Enable */
+
+/* Bit 5 : Write '1' to enable interrupt for event IN[5] */
+#define GPIOTE_INTENSET_IN5_Pos (5UL) /*!< Position of IN5 field. */
+#define GPIOTE_INTENSET_IN5_Msk (0x1UL << GPIOTE_INTENSET_IN5_Pos) /*!< Bit mask of IN5 field. */
+#define GPIOTE_INTENSET_IN5_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENSET_IN5_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENSET_IN5_Set (1UL) /*!< Enable */
+
+/* Bit 4 : Write '1' to enable interrupt for event IN[4] */
+#define GPIOTE_INTENSET_IN4_Pos (4UL) /*!< Position of IN4 field. */
+#define GPIOTE_INTENSET_IN4_Msk (0x1UL << GPIOTE_INTENSET_IN4_Pos) /*!< Bit mask of IN4 field. */
+#define GPIOTE_INTENSET_IN4_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENSET_IN4_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENSET_IN4_Set (1UL) /*!< Enable */
+
+/* Bit 3 : Write '1' to enable interrupt for event IN[3] */
+#define GPIOTE_INTENSET_IN3_Pos (3UL) /*!< Position of IN3 field. */
+#define GPIOTE_INTENSET_IN3_Msk (0x1UL << GPIOTE_INTENSET_IN3_Pos) /*!< Bit mask of IN3 field. */
+#define GPIOTE_INTENSET_IN3_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENSET_IN3_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENSET_IN3_Set (1UL) /*!< Enable */
+
+/* Bit 2 : Write '1' to enable interrupt for event IN[2] */
+#define GPIOTE_INTENSET_IN2_Pos (2UL) /*!< Position of IN2 field. */
+#define GPIOTE_INTENSET_IN2_Msk (0x1UL << GPIOTE_INTENSET_IN2_Pos) /*!< Bit mask of IN2 field. */
+#define GPIOTE_INTENSET_IN2_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENSET_IN2_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENSET_IN2_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event IN[1] */
+#define GPIOTE_INTENSET_IN1_Pos (1UL) /*!< Position of IN1 field. */
+#define GPIOTE_INTENSET_IN1_Msk (0x1UL << GPIOTE_INTENSET_IN1_Pos) /*!< Bit mask of IN1 field. */
+#define GPIOTE_INTENSET_IN1_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENSET_IN1_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENSET_IN1_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event IN[0] */
+#define GPIOTE_INTENSET_IN0_Pos (0UL) /*!< Position of IN0 field. */
+#define GPIOTE_INTENSET_IN0_Msk (0x1UL << GPIOTE_INTENSET_IN0_Pos) /*!< Bit mask of IN0 field. */
+#define GPIOTE_INTENSET_IN0_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENSET_IN0_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENSET_IN0_Set (1UL) /*!< Enable */
+
+/* Register: GPIOTE_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 31 : Write '1' to disable interrupt for event PORT */
+#define GPIOTE_INTENCLR_PORT_Pos (31UL) /*!< Position of PORT field. */
+#define GPIOTE_INTENCLR_PORT_Msk (0x1UL << GPIOTE_INTENCLR_PORT_Pos) /*!< Bit mask of PORT field. */
+#define GPIOTE_INTENCLR_PORT_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENCLR_PORT_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENCLR_PORT_Clear (1UL) /*!< Disable */
+
+/* Bit 7 : Write '1' to disable interrupt for event IN[7] */
+#define GPIOTE_INTENCLR_IN7_Pos (7UL) /*!< Position of IN7 field. */
+#define GPIOTE_INTENCLR_IN7_Msk (0x1UL << GPIOTE_INTENCLR_IN7_Pos) /*!< Bit mask of IN7 field. */
+#define GPIOTE_INTENCLR_IN7_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENCLR_IN7_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENCLR_IN7_Clear (1UL) /*!< Disable */
+
+/* Bit 6 : Write '1' to disable interrupt for event IN[6] */
+#define GPIOTE_INTENCLR_IN6_Pos (6UL) /*!< Position of IN6 field. */
+#define GPIOTE_INTENCLR_IN6_Msk (0x1UL << GPIOTE_INTENCLR_IN6_Pos) /*!< Bit mask of IN6 field. */
+#define GPIOTE_INTENCLR_IN6_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENCLR_IN6_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENCLR_IN6_Clear (1UL) /*!< Disable */
+
+/* Bit 5 : Write '1' to disable interrupt for event IN[5] */
+#define GPIOTE_INTENCLR_IN5_Pos (5UL) /*!< Position of IN5 field. */
+#define GPIOTE_INTENCLR_IN5_Msk (0x1UL << GPIOTE_INTENCLR_IN5_Pos) /*!< Bit mask of IN5 field. */
+#define GPIOTE_INTENCLR_IN5_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENCLR_IN5_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENCLR_IN5_Clear (1UL) /*!< Disable */
+
+/* Bit 4 : Write '1' to disable interrupt for event IN[4] */
+#define GPIOTE_INTENCLR_IN4_Pos (4UL) /*!< Position of IN4 field. */
+#define GPIOTE_INTENCLR_IN4_Msk (0x1UL << GPIOTE_INTENCLR_IN4_Pos) /*!< Bit mask of IN4 field. */
+#define GPIOTE_INTENCLR_IN4_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENCLR_IN4_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENCLR_IN4_Clear (1UL) /*!< Disable */
+
+/* Bit 3 : Write '1' to disable interrupt for event IN[3] */
+#define GPIOTE_INTENCLR_IN3_Pos (3UL) /*!< Position of IN3 field. */
+#define GPIOTE_INTENCLR_IN3_Msk (0x1UL << GPIOTE_INTENCLR_IN3_Pos) /*!< Bit mask of IN3 field. */
+#define GPIOTE_INTENCLR_IN3_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENCLR_IN3_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENCLR_IN3_Clear (1UL) /*!< Disable */
+
+/* Bit 2 : Write '1' to disable interrupt for event IN[2] */
+#define GPIOTE_INTENCLR_IN2_Pos (2UL) /*!< Position of IN2 field. */
+#define GPIOTE_INTENCLR_IN2_Msk (0x1UL << GPIOTE_INTENCLR_IN2_Pos) /*!< Bit mask of IN2 field. */
+#define GPIOTE_INTENCLR_IN2_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENCLR_IN2_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENCLR_IN2_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event IN[1] */
+#define GPIOTE_INTENCLR_IN1_Pos (1UL) /*!< Position of IN1 field. */
+#define GPIOTE_INTENCLR_IN1_Msk (0x1UL << GPIOTE_INTENCLR_IN1_Pos) /*!< Bit mask of IN1 field. */
+#define GPIOTE_INTENCLR_IN1_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENCLR_IN1_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENCLR_IN1_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event IN[0] */
+#define GPIOTE_INTENCLR_IN0_Pos (0UL) /*!< Position of IN0 field. */
+#define GPIOTE_INTENCLR_IN0_Msk (0x1UL << GPIOTE_INTENCLR_IN0_Pos) /*!< Bit mask of IN0 field. */
+#define GPIOTE_INTENCLR_IN0_Disabled (0UL) /*!< Read: Disabled */
+#define GPIOTE_INTENCLR_IN0_Enabled (1UL) /*!< Read: Enabled */
+#define GPIOTE_INTENCLR_IN0_Clear (1UL) /*!< Disable */
+
+/* Register: GPIOTE_CONFIG */
+/* Description: Description collection: Configuration for OUT[n], SET[n] and CLR[n] tasks and IN[n] event */
+
+/* Bit 20 : When in task mode: Initial value of the output when the GPIOTE channel is configured. When in event mode: No effect. */
+#define GPIOTE_CONFIG_OUTINIT_Pos (20UL) /*!< Position of OUTINIT field. */
+#define GPIOTE_CONFIG_OUTINIT_Msk (0x1UL << GPIOTE_CONFIG_OUTINIT_Pos) /*!< Bit mask of OUTINIT field. */
+#define GPIOTE_CONFIG_OUTINIT_Low (0UL) /*!< Task mode: Initial value of pin before task triggering is low */
+#define GPIOTE_CONFIG_OUTINIT_High (1UL) /*!< Task mode: Initial value of pin before task triggering is high */
+
+/* Bits 17..16 : When In task mode: Operation to be performed on output when OUT[n] task is triggered. When In event mode: Operation on input that shall trigger IN[n] event. */
+#define GPIOTE_CONFIG_POLARITY_Pos (16UL) /*!< Position of POLARITY field. */
+#define GPIOTE_CONFIG_POLARITY_Msk (0x3UL << GPIOTE_CONFIG_POLARITY_Pos) /*!< Bit mask of POLARITY field. */
+#define GPIOTE_CONFIG_POLARITY_None (0UL) /*!< Task mode: No effect on pin from OUT[n] task. Event mode: no IN[n] event generated on pin activity. */
+#define GPIOTE_CONFIG_POLARITY_LoToHi (1UL) /*!< Task mode: Set pin from OUT[n] task. Event mode: Generate IN[n] event when rising edge on pin. */
+#define GPIOTE_CONFIG_POLARITY_HiToLo (2UL) /*!< Task mode: Clear pin from OUT[n] task. Event mode: Generate IN[n] event when falling edge on pin. */
+#define GPIOTE_CONFIG_POLARITY_Toggle (3UL) /*!< Task mode: Toggle pin from OUT[n]. Event mode: Generate IN[n] when any change on pin. */
+
+/* Bit 13 : Port number */
+#define GPIOTE_CONFIG_PORT_Pos (13UL) /*!< Position of PORT field. */
+#define GPIOTE_CONFIG_PORT_Msk (0x1UL << GPIOTE_CONFIG_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 12..8 : GPIO number associated with SET[n], CLR[n] and OUT[n] tasks and IN[n] event */
+#define GPIOTE_CONFIG_PSEL_Pos (8UL) /*!< Position of PSEL field. */
+#define GPIOTE_CONFIG_PSEL_Msk (0x1FUL << GPIOTE_CONFIG_PSEL_Pos) /*!< Bit mask of PSEL field. */
+
+/* Bits 1..0 : Mode */
+#define GPIOTE_CONFIG_MODE_Pos (0UL) /*!< Position of MODE field. */
+#define GPIOTE_CONFIG_MODE_Msk (0x3UL << GPIOTE_CONFIG_MODE_Pos) /*!< Bit mask of MODE field. */
+#define GPIOTE_CONFIG_MODE_Disabled (0UL) /*!< Disabled. Pin specified by PSEL will not be acquired by the GPIOTE module. */
+#define GPIOTE_CONFIG_MODE_Event (1UL) /*!< Event mode */
+#define GPIOTE_CONFIG_MODE_Task (3UL) /*!< Task mode */
+
+
+/* Peripheral: I2S */
+/* Description: Inter-IC Sound */
+
+/* Register: I2S_TASKS_START */
+/* Description: Starts continuous I2S transfer. Also starts MCK generator when this is enabled. */
+
+/* Bit 0 : Starts continuous I2S transfer. Also starts MCK generator when this is enabled. */
+#define I2S_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */
+#define I2S_TASKS_START_TASKS_START_Msk (0x1UL << I2S_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */
+#define I2S_TASKS_START_TASKS_START_Trigger (1UL) /*!< Trigger task */
+
+/* Register: I2S_TASKS_STOP */
+/* Description: Stops I2S transfer. Also stops MCK generator. Triggering this task will cause the STOPPED event to be generated. */
+
+/* Bit 0 : Stops I2S transfer. Also stops MCK generator. Triggering this task will cause the STOPPED event to be generated. */
+#define I2S_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define I2S_TASKS_STOP_TASKS_STOP_Msk (0x1UL << I2S_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define I2S_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: I2S_EVENTS_RXPTRUPD */
+/* Description: The RXD.PTR register has been copied to internal double-buffers.
+ When the I2S module is started and RX is enabled, this event will be generated for every RXTXD.MAXCNT words that are received on the SDIN pin. */
+
+/* Bit 0 : The RXD.PTR register has been copied to internal double-buffers.
+ When the I2S module is started and RX is enabled, this event will be generated for every RXTXD.MAXCNT words that are received on the SDIN pin. */
+#define I2S_EVENTS_RXPTRUPD_EVENTS_RXPTRUPD_Pos (0UL) /*!< Position of EVENTS_RXPTRUPD field. */
+#define I2S_EVENTS_RXPTRUPD_EVENTS_RXPTRUPD_Msk (0x1UL << I2S_EVENTS_RXPTRUPD_EVENTS_RXPTRUPD_Pos) /*!< Bit mask of EVENTS_RXPTRUPD field. */
+#define I2S_EVENTS_RXPTRUPD_EVENTS_RXPTRUPD_NotGenerated (0UL) /*!< Event not generated */
+#define I2S_EVENTS_RXPTRUPD_EVENTS_RXPTRUPD_Generated (1UL) /*!< Event generated */
+
+/* Register: I2S_EVENTS_STOPPED */
+/* Description: I2S transfer stopped. */
+
+/* Bit 0 : I2S transfer stopped. */
+#define I2S_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */
+#define I2S_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << I2S_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */
+#define I2S_EVENTS_STOPPED_EVENTS_STOPPED_NotGenerated (0UL) /*!< Event not generated */
+#define I2S_EVENTS_STOPPED_EVENTS_STOPPED_Generated (1UL) /*!< Event generated */
+
+/* Register: I2S_EVENTS_TXPTRUPD */
+/* Description: The TDX.PTR register has been copied to internal double-buffers.
+ When the I2S module is started and TX is enabled, this event will be generated for every RXTXD.MAXCNT words that are sent on the SDOUT pin. */
+
+/* Bit 0 : The TDX.PTR register has been copied to internal double-buffers.
+ When the I2S module is started and TX is enabled, this event will be generated for every RXTXD.MAXCNT words that are sent on the SDOUT pin. */
+#define I2S_EVENTS_TXPTRUPD_EVENTS_TXPTRUPD_Pos (0UL) /*!< Position of EVENTS_TXPTRUPD field. */
+#define I2S_EVENTS_TXPTRUPD_EVENTS_TXPTRUPD_Msk (0x1UL << I2S_EVENTS_TXPTRUPD_EVENTS_TXPTRUPD_Pos) /*!< Bit mask of EVENTS_TXPTRUPD field. */
+#define I2S_EVENTS_TXPTRUPD_EVENTS_TXPTRUPD_NotGenerated (0UL) /*!< Event not generated */
+#define I2S_EVENTS_TXPTRUPD_EVENTS_TXPTRUPD_Generated (1UL) /*!< Event generated */
+
+/* Register: I2S_INTEN */
+/* Description: Enable or disable interrupt */
+
+/* Bit 5 : Enable or disable interrupt for event TXPTRUPD */
+#define I2S_INTEN_TXPTRUPD_Pos (5UL) /*!< Position of TXPTRUPD field. */
+#define I2S_INTEN_TXPTRUPD_Msk (0x1UL << I2S_INTEN_TXPTRUPD_Pos) /*!< Bit mask of TXPTRUPD field. */
+#define I2S_INTEN_TXPTRUPD_Disabled (0UL) /*!< Disable */
+#define I2S_INTEN_TXPTRUPD_Enabled (1UL) /*!< Enable */
+
+/* Bit 2 : Enable or disable interrupt for event STOPPED */
+#define I2S_INTEN_STOPPED_Pos (2UL) /*!< Position of STOPPED field. */
+#define I2S_INTEN_STOPPED_Msk (0x1UL << I2S_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define I2S_INTEN_STOPPED_Disabled (0UL) /*!< Disable */
+#define I2S_INTEN_STOPPED_Enabled (1UL) /*!< Enable */
+
+/* Bit 1 : Enable or disable interrupt for event RXPTRUPD */
+#define I2S_INTEN_RXPTRUPD_Pos (1UL) /*!< Position of RXPTRUPD field. */
+#define I2S_INTEN_RXPTRUPD_Msk (0x1UL << I2S_INTEN_RXPTRUPD_Pos) /*!< Bit mask of RXPTRUPD field. */
+#define I2S_INTEN_RXPTRUPD_Disabled (0UL) /*!< Disable */
+#define I2S_INTEN_RXPTRUPD_Enabled (1UL) /*!< Enable */
+
+/* Register: I2S_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 5 : Write '1' to enable interrupt for event TXPTRUPD */
+#define I2S_INTENSET_TXPTRUPD_Pos (5UL) /*!< Position of TXPTRUPD field. */
+#define I2S_INTENSET_TXPTRUPD_Msk (0x1UL << I2S_INTENSET_TXPTRUPD_Pos) /*!< Bit mask of TXPTRUPD field. */
+#define I2S_INTENSET_TXPTRUPD_Disabled (0UL) /*!< Read: Disabled */
+#define I2S_INTENSET_TXPTRUPD_Enabled (1UL) /*!< Read: Enabled */
+#define I2S_INTENSET_TXPTRUPD_Set (1UL) /*!< Enable */
+
+/* Bit 2 : Write '1' to enable interrupt for event STOPPED */
+#define I2S_INTENSET_STOPPED_Pos (2UL) /*!< Position of STOPPED field. */
+#define I2S_INTENSET_STOPPED_Msk (0x1UL << I2S_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define I2S_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define I2S_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define I2S_INTENSET_STOPPED_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event RXPTRUPD */
+#define I2S_INTENSET_RXPTRUPD_Pos (1UL) /*!< Position of RXPTRUPD field. */
+#define I2S_INTENSET_RXPTRUPD_Msk (0x1UL << I2S_INTENSET_RXPTRUPD_Pos) /*!< Bit mask of RXPTRUPD field. */
+#define I2S_INTENSET_RXPTRUPD_Disabled (0UL) /*!< Read: Disabled */
+#define I2S_INTENSET_RXPTRUPD_Enabled (1UL) /*!< Read: Enabled */
+#define I2S_INTENSET_RXPTRUPD_Set (1UL) /*!< Enable */
+
+/* Register: I2S_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 5 : Write '1' to disable interrupt for event TXPTRUPD */
+#define I2S_INTENCLR_TXPTRUPD_Pos (5UL) /*!< Position of TXPTRUPD field. */
+#define I2S_INTENCLR_TXPTRUPD_Msk (0x1UL << I2S_INTENCLR_TXPTRUPD_Pos) /*!< Bit mask of TXPTRUPD field. */
+#define I2S_INTENCLR_TXPTRUPD_Disabled (0UL) /*!< Read: Disabled */
+#define I2S_INTENCLR_TXPTRUPD_Enabled (1UL) /*!< Read: Enabled */
+#define I2S_INTENCLR_TXPTRUPD_Clear (1UL) /*!< Disable */
+
+/* Bit 2 : Write '1' to disable interrupt for event STOPPED */
+#define I2S_INTENCLR_STOPPED_Pos (2UL) /*!< Position of STOPPED field. */
+#define I2S_INTENCLR_STOPPED_Msk (0x1UL << I2S_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define I2S_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define I2S_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define I2S_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event RXPTRUPD */
+#define I2S_INTENCLR_RXPTRUPD_Pos (1UL) /*!< Position of RXPTRUPD field. */
+#define I2S_INTENCLR_RXPTRUPD_Msk (0x1UL << I2S_INTENCLR_RXPTRUPD_Pos) /*!< Bit mask of RXPTRUPD field. */
+#define I2S_INTENCLR_RXPTRUPD_Disabled (0UL) /*!< Read: Disabled */
+#define I2S_INTENCLR_RXPTRUPD_Enabled (1UL) /*!< Read: Enabled */
+#define I2S_INTENCLR_RXPTRUPD_Clear (1UL) /*!< Disable */
+
+/* Register: I2S_ENABLE */
+/* Description: Enable I2S module. */
+
+/* Bit 0 : Enable I2S module. */
+#define I2S_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define I2S_ENABLE_ENABLE_Msk (0x1UL << I2S_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define I2S_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */
+#define I2S_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */
+
+/* Register: I2S_CONFIG_MODE */
+/* Description: I2S mode. */
+
+/* Bit 0 : I2S mode. */
+#define I2S_CONFIG_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */
+#define I2S_CONFIG_MODE_MODE_Msk (0x1UL << I2S_CONFIG_MODE_MODE_Pos) /*!< Bit mask of MODE field. */
+#define I2S_CONFIG_MODE_MODE_Master (0UL) /*!< Master mode. SCK and LRCK generated from internal master clcok (MCK) and output on pins defined by PSEL.xxx. */
+#define I2S_CONFIG_MODE_MODE_Slave (1UL) /*!< Slave mode. SCK and LRCK generated by external master and received on pins defined by PSEL.xxx */
+
+/* Register: I2S_CONFIG_RXEN */
+/* Description: Reception (RX) enable. */
+
+/* Bit 0 : Reception (RX) enable. */
+#define I2S_CONFIG_RXEN_RXEN_Pos (0UL) /*!< Position of RXEN field. */
+#define I2S_CONFIG_RXEN_RXEN_Msk (0x1UL << I2S_CONFIG_RXEN_RXEN_Pos) /*!< Bit mask of RXEN field. */
+#define I2S_CONFIG_RXEN_RXEN_Disabled (0UL) /*!< Reception disabled and now data will be written to the RXD.PTR address. */
+#define I2S_CONFIG_RXEN_RXEN_Enabled (1UL) /*!< Reception enabled. */
+
+/* Register: I2S_CONFIG_TXEN */
+/* Description: Transmission (TX) enable. */
+
+/* Bit 0 : Transmission (TX) enable. */
+#define I2S_CONFIG_TXEN_TXEN_Pos (0UL) /*!< Position of TXEN field. */
+#define I2S_CONFIG_TXEN_TXEN_Msk (0x1UL << I2S_CONFIG_TXEN_TXEN_Pos) /*!< Bit mask of TXEN field. */
+#define I2S_CONFIG_TXEN_TXEN_Disabled (0UL) /*!< Transmission disabled and now data will be read from the RXD.TXD address. */
+#define I2S_CONFIG_TXEN_TXEN_Enabled (1UL) /*!< Transmission enabled. */
+
+/* Register: I2S_CONFIG_MCKEN */
+/* Description: Master clock generator enable. */
+
+/* Bit 0 : Master clock generator enable. */
+#define I2S_CONFIG_MCKEN_MCKEN_Pos (0UL) /*!< Position of MCKEN field. */
+#define I2S_CONFIG_MCKEN_MCKEN_Msk (0x1UL << I2S_CONFIG_MCKEN_MCKEN_Pos) /*!< Bit mask of MCKEN field. */
+#define I2S_CONFIG_MCKEN_MCKEN_Disabled (0UL) /*!< Master clock generator disabled and PSEL.MCK not connected(available as GPIO). */
+#define I2S_CONFIG_MCKEN_MCKEN_Enabled (1UL) /*!< Master clock generator running and MCK output on PSEL.MCK. */
+
+/* Register: I2S_CONFIG_MCKFREQ */
+/* Description: Master clock generator frequency. */
+
+/* Bits 31..0 : Master clock generator frequency. */
+#define I2S_CONFIG_MCKFREQ_MCKFREQ_Pos (0UL) /*!< Position of MCKFREQ field. */
+#define I2S_CONFIG_MCKFREQ_MCKFREQ_Msk (0xFFFFFFFFUL << I2S_CONFIG_MCKFREQ_MCKFREQ_Pos) /*!< Bit mask of MCKFREQ field. */
+#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV125 (0x020C0000UL) /*!< 32 MHz / 125 = 0.256 MHz */
+#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV63 (0x04100000UL) /*!< 32 MHz / 63 = 0.5079365 MHz */
+#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV42 (0x06000000UL) /*!< 32 MHz / 42 = 0.7619048 MHz */
+#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV32 (0x08000000UL) /*!< 32 MHz / 32 = 1.0 MHz */
+#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV31 (0x08400000UL) /*!< 32 MHz / 31 = 1.0322581 MHz */
+#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV30 (0x08800000UL) /*!< 32 MHz / 30 = 1.0666667 MHz */
+#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV23 (0x0B000000UL) /*!< 32 MHz / 23 = 1.3913043 MHz */
+#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV21 (0x0C000000UL) /*!< 32 MHz / 21 = 1.5238095 */
+#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV16 (0x10000000UL) /*!< 32 MHz / 16 = 2.0 MHz */
+#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV15 (0x11000000UL) /*!< 32 MHz / 15 = 2.1333333 MHz */
+#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV11 (0x16000000UL) /*!< 32 MHz / 11 = 2.9090909 MHz */
+#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV10 (0x18000000UL) /*!< 32 MHz / 10 = 3.2 MHz */
+#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV8 (0x20000000UL) /*!< 32 MHz / 8 = 4.0 MHz */
+
+/* Register: I2S_CONFIG_RATIO */
+/* Description: MCK / LRCK ratio. */
+
+/* Bits 3..0 : MCK / LRCK ratio. */
+#define I2S_CONFIG_RATIO_RATIO_Pos (0UL) /*!< Position of RATIO field. */
+#define I2S_CONFIG_RATIO_RATIO_Msk (0xFUL << I2S_CONFIG_RATIO_RATIO_Pos) /*!< Bit mask of RATIO field. */
+#define I2S_CONFIG_RATIO_RATIO_32X (0UL) /*!< LRCK = MCK / 32 */
+#define I2S_CONFIG_RATIO_RATIO_48X (1UL) /*!< LRCK = MCK / 48 */
+#define I2S_CONFIG_RATIO_RATIO_64X (2UL) /*!< LRCK = MCK / 64 */
+#define I2S_CONFIG_RATIO_RATIO_96X (3UL) /*!< LRCK = MCK / 96 */
+#define I2S_CONFIG_RATIO_RATIO_128X (4UL) /*!< LRCK = MCK / 128 */
+#define I2S_CONFIG_RATIO_RATIO_192X (5UL) /*!< LRCK = MCK / 192 */
+#define I2S_CONFIG_RATIO_RATIO_256X (6UL) /*!< LRCK = MCK / 256 */
+#define I2S_CONFIG_RATIO_RATIO_384X (7UL) /*!< LRCK = MCK / 384 */
+#define I2S_CONFIG_RATIO_RATIO_512X (8UL) /*!< LRCK = MCK / 512 */
+
+/* Register: I2S_CONFIG_SWIDTH */
+/* Description: Sample width. */
+
+/* Bits 1..0 : Sample width. */
+#define I2S_CONFIG_SWIDTH_SWIDTH_Pos (0UL) /*!< Position of SWIDTH field. */
+#define I2S_CONFIG_SWIDTH_SWIDTH_Msk (0x3UL << I2S_CONFIG_SWIDTH_SWIDTH_Pos) /*!< Bit mask of SWIDTH field. */
+#define I2S_CONFIG_SWIDTH_SWIDTH_8Bit (0UL) /*!< 8 bit. */
+#define I2S_CONFIG_SWIDTH_SWIDTH_16Bit (1UL) /*!< 16 bit. */
+#define I2S_CONFIG_SWIDTH_SWIDTH_24Bit (2UL) /*!< 24 bit. */
+
+/* Register: I2S_CONFIG_ALIGN */
+/* Description: Alignment of sample within a frame. */
+
+/* Bit 0 : Alignment of sample within a frame. */
+#define I2S_CONFIG_ALIGN_ALIGN_Pos (0UL) /*!< Position of ALIGN field. */
+#define I2S_CONFIG_ALIGN_ALIGN_Msk (0x1UL << I2S_CONFIG_ALIGN_ALIGN_Pos) /*!< Bit mask of ALIGN field. */
+#define I2S_CONFIG_ALIGN_ALIGN_Left (0UL) /*!< Left-aligned. */
+#define I2S_CONFIG_ALIGN_ALIGN_Right (1UL) /*!< Right-aligned. */
+
+/* Register: I2S_CONFIG_FORMAT */
+/* Description: Frame format. */
+
+/* Bit 0 : Frame format. */
+#define I2S_CONFIG_FORMAT_FORMAT_Pos (0UL) /*!< Position of FORMAT field. */
+#define I2S_CONFIG_FORMAT_FORMAT_Msk (0x1UL << I2S_CONFIG_FORMAT_FORMAT_Pos) /*!< Bit mask of FORMAT field. */
+#define I2S_CONFIG_FORMAT_FORMAT_I2S (0UL) /*!< Original I2S format. */
+#define I2S_CONFIG_FORMAT_FORMAT_Aligned (1UL) /*!< Alternate (left- or right-aligned) format. */
+
+/* Register: I2S_CONFIG_CHANNELS */
+/* Description: Enable channels. */
+
+/* Bits 1..0 : Enable channels. */
+#define I2S_CONFIG_CHANNELS_CHANNELS_Pos (0UL) /*!< Position of CHANNELS field. */
+#define I2S_CONFIG_CHANNELS_CHANNELS_Msk (0x3UL << I2S_CONFIG_CHANNELS_CHANNELS_Pos) /*!< Bit mask of CHANNELS field. */
+#define I2S_CONFIG_CHANNELS_CHANNELS_Stereo (0UL) /*!< Stereo. */
+#define I2S_CONFIG_CHANNELS_CHANNELS_Left (1UL) /*!< Left only. */
+#define I2S_CONFIG_CHANNELS_CHANNELS_Right (2UL) /*!< Right only. */
+
+/* Register: I2S_RXD_PTR */
+/* Description: Receive buffer RAM start address. */
+
+/* Bits 31..0 : Receive buffer Data RAM start address. When receiving, words containing samples will be written to this address. This address is a word aligned Data RAM address. */
+#define I2S_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define I2S_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << I2S_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: I2S_TXD_PTR */
+/* Description: Transmit buffer RAM start address. */
+
+/* Bits 31..0 : Transmit buffer Data RAM start address. When transmitting, words containing samples will be fetched from this address. This address is a word aligned Data RAM address. */
+#define I2S_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define I2S_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << I2S_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: I2S_RXTXD_MAXCNT */
+/* Description: Size of RXD and TXD buffers. */
+
+/* Bits 13..0 : Size of RXD and TXD buffers in number of 32 bit words. */
+#define I2S_RXTXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define I2S_RXTXD_MAXCNT_MAXCNT_Msk (0x3FFFUL << I2S_RXTXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: I2S_PSEL_MCK */
+/* Description: Pin select for MCK signal. */
+
+/* Bit 31 : Connection */
+#define I2S_PSEL_MCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define I2S_PSEL_MCK_CONNECT_Msk (0x1UL << I2S_PSEL_MCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define I2S_PSEL_MCK_CONNECT_Connected (0UL) /*!< Connect */
+#define I2S_PSEL_MCK_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define I2S_PSEL_MCK_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define I2S_PSEL_MCK_PORT_Msk (0x1UL << I2S_PSEL_MCK_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define I2S_PSEL_MCK_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define I2S_PSEL_MCK_PIN_Msk (0x1FUL << I2S_PSEL_MCK_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: I2S_PSEL_SCK */
+/* Description: Pin select for SCK signal. */
+
+/* Bit 31 : Connection */
+#define I2S_PSEL_SCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define I2S_PSEL_SCK_CONNECT_Msk (0x1UL << I2S_PSEL_SCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define I2S_PSEL_SCK_CONNECT_Connected (0UL) /*!< Connect */
+#define I2S_PSEL_SCK_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define I2S_PSEL_SCK_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define I2S_PSEL_SCK_PORT_Msk (0x1UL << I2S_PSEL_SCK_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define I2S_PSEL_SCK_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define I2S_PSEL_SCK_PIN_Msk (0x1FUL << I2S_PSEL_SCK_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: I2S_PSEL_LRCK */
+/* Description: Pin select for LRCK signal. */
+
+/* Bit 31 : Connection */
+#define I2S_PSEL_LRCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define I2S_PSEL_LRCK_CONNECT_Msk (0x1UL << I2S_PSEL_LRCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define I2S_PSEL_LRCK_CONNECT_Connected (0UL) /*!< Connect */
+#define I2S_PSEL_LRCK_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define I2S_PSEL_LRCK_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define I2S_PSEL_LRCK_PORT_Msk (0x1UL << I2S_PSEL_LRCK_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define I2S_PSEL_LRCK_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define I2S_PSEL_LRCK_PIN_Msk (0x1FUL << I2S_PSEL_LRCK_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: I2S_PSEL_SDIN */
+/* Description: Pin select for SDIN signal. */
+
+/* Bit 31 : Connection */
+#define I2S_PSEL_SDIN_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define I2S_PSEL_SDIN_CONNECT_Msk (0x1UL << I2S_PSEL_SDIN_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define I2S_PSEL_SDIN_CONNECT_Connected (0UL) /*!< Connect */
+#define I2S_PSEL_SDIN_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define I2S_PSEL_SDIN_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define I2S_PSEL_SDIN_PORT_Msk (0x1UL << I2S_PSEL_SDIN_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define I2S_PSEL_SDIN_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define I2S_PSEL_SDIN_PIN_Msk (0x1FUL << I2S_PSEL_SDIN_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: I2S_PSEL_SDOUT */
+/* Description: Pin select for SDOUT signal. */
+
+/* Bit 31 : Connection */
+#define I2S_PSEL_SDOUT_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define I2S_PSEL_SDOUT_CONNECT_Msk (0x1UL << I2S_PSEL_SDOUT_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define I2S_PSEL_SDOUT_CONNECT_Connected (0UL) /*!< Connect */
+#define I2S_PSEL_SDOUT_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define I2S_PSEL_SDOUT_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define I2S_PSEL_SDOUT_PORT_Msk (0x1UL << I2S_PSEL_SDOUT_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define I2S_PSEL_SDOUT_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define I2S_PSEL_SDOUT_PIN_Msk (0x1FUL << I2S_PSEL_SDOUT_PIN_Pos) /*!< Bit mask of PIN field. */
+
+
+/* Peripheral: LPCOMP */
+/* Description: Low Power Comparator */
+
+/* Register: LPCOMP_TASKS_START */
+/* Description: Start comparator */
+
+/* Bit 0 : Start comparator */
+#define LPCOMP_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */
+#define LPCOMP_TASKS_START_TASKS_START_Msk (0x1UL << LPCOMP_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */
+#define LPCOMP_TASKS_START_TASKS_START_Trigger (1UL) /*!< Trigger task */
+
+/* Register: LPCOMP_TASKS_STOP */
+/* Description: Stop comparator */
+
+/* Bit 0 : Stop comparator */
+#define LPCOMP_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define LPCOMP_TASKS_STOP_TASKS_STOP_Msk (0x1UL << LPCOMP_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define LPCOMP_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: LPCOMP_TASKS_SAMPLE */
+/* Description: Sample comparator value */
+
+/* Bit 0 : Sample comparator value */
+#define LPCOMP_TASKS_SAMPLE_TASKS_SAMPLE_Pos (0UL) /*!< Position of TASKS_SAMPLE field. */
+#define LPCOMP_TASKS_SAMPLE_TASKS_SAMPLE_Msk (0x1UL << LPCOMP_TASKS_SAMPLE_TASKS_SAMPLE_Pos) /*!< Bit mask of TASKS_SAMPLE field. */
+#define LPCOMP_TASKS_SAMPLE_TASKS_SAMPLE_Trigger (1UL) /*!< Trigger task */
+
+/* Register: LPCOMP_EVENTS_READY */
+/* Description: LPCOMP is ready and output is valid */
+
+/* Bit 0 : LPCOMP is ready and output is valid */
+#define LPCOMP_EVENTS_READY_EVENTS_READY_Pos (0UL) /*!< Position of EVENTS_READY field. */
+#define LPCOMP_EVENTS_READY_EVENTS_READY_Msk (0x1UL << LPCOMP_EVENTS_READY_EVENTS_READY_Pos) /*!< Bit mask of EVENTS_READY field. */
+#define LPCOMP_EVENTS_READY_EVENTS_READY_NotGenerated (0UL) /*!< Event not generated */
+#define LPCOMP_EVENTS_READY_EVENTS_READY_Generated (1UL) /*!< Event generated */
+
+/* Register: LPCOMP_EVENTS_DOWN */
+/* Description: Downward crossing */
+
+/* Bit 0 : Downward crossing */
+#define LPCOMP_EVENTS_DOWN_EVENTS_DOWN_Pos (0UL) /*!< Position of EVENTS_DOWN field. */
+#define LPCOMP_EVENTS_DOWN_EVENTS_DOWN_Msk (0x1UL << LPCOMP_EVENTS_DOWN_EVENTS_DOWN_Pos) /*!< Bit mask of EVENTS_DOWN field. */
+#define LPCOMP_EVENTS_DOWN_EVENTS_DOWN_NotGenerated (0UL) /*!< Event not generated */
+#define LPCOMP_EVENTS_DOWN_EVENTS_DOWN_Generated (1UL) /*!< Event generated */
+
+/* Register: LPCOMP_EVENTS_UP */
+/* Description: Upward crossing */
+
+/* Bit 0 : Upward crossing */
+#define LPCOMP_EVENTS_UP_EVENTS_UP_Pos (0UL) /*!< Position of EVENTS_UP field. */
+#define LPCOMP_EVENTS_UP_EVENTS_UP_Msk (0x1UL << LPCOMP_EVENTS_UP_EVENTS_UP_Pos) /*!< Bit mask of EVENTS_UP field. */
+#define LPCOMP_EVENTS_UP_EVENTS_UP_NotGenerated (0UL) /*!< Event not generated */
+#define LPCOMP_EVENTS_UP_EVENTS_UP_Generated (1UL) /*!< Event generated */
+
+/* Register: LPCOMP_EVENTS_CROSS */
+/* Description: Downward or upward crossing */
+
+/* Bit 0 : Downward or upward crossing */
+#define LPCOMP_EVENTS_CROSS_EVENTS_CROSS_Pos (0UL) /*!< Position of EVENTS_CROSS field. */
+#define LPCOMP_EVENTS_CROSS_EVENTS_CROSS_Msk (0x1UL << LPCOMP_EVENTS_CROSS_EVENTS_CROSS_Pos) /*!< Bit mask of EVENTS_CROSS field. */
+#define LPCOMP_EVENTS_CROSS_EVENTS_CROSS_NotGenerated (0UL) /*!< Event not generated */
+#define LPCOMP_EVENTS_CROSS_EVENTS_CROSS_Generated (1UL) /*!< Event generated */
+
+/* Register: LPCOMP_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 4 : Shortcut between event CROSS and task STOP */
+#define LPCOMP_SHORTS_CROSS_STOP_Pos (4UL) /*!< Position of CROSS_STOP field. */
+#define LPCOMP_SHORTS_CROSS_STOP_Msk (0x1UL << LPCOMP_SHORTS_CROSS_STOP_Pos) /*!< Bit mask of CROSS_STOP field. */
+#define LPCOMP_SHORTS_CROSS_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define LPCOMP_SHORTS_CROSS_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 3 : Shortcut between event UP and task STOP */
+#define LPCOMP_SHORTS_UP_STOP_Pos (3UL) /*!< Position of UP_STOP field. */
+#define LPCOMP_SHORTS_UP_STOP_Msk (0x1UL << LPCOMP_SHORTS_UP_STOP_Pos) /*!< Bit mask of UP_STOP field. */
+#define LPCOMP_SHORTS_UP_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define LPCOMP_SHORTS_UP_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 2 : Shortcut between event DOWN and task STOP */
+#define LPCOMP_SHORTS_DOWN_STOP_Pos (2UL) /*!< Position of DOWN_STOP field. */
+#define LPCOMP_SHORTS_DOWN_STOP_Msk (0x1UL << LPCOMP_SHORTS_DOWN_STOP_Pos) /*!< Bit mask of DOWN_STOP field. */
+#define LPCOMP_SHORTS_DOWN_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define LPCOMP_SHORTS_DOWN_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 1 : Shortcut between event READY and task STOP */
+#define LPCOMP_SHORTS_READY_STOP_Pos (1UL) /*!< Position of READY_STOP field. */
+#define LPCOMP_SHORTS_READY_STOP_Msk (0x1UL << LPCOMP_SHORTS_READY_STOP_Pos) /*!< Bit mask of READY_STOP field. */
+#define LPCOMP_SHORTS_READY_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define LPCOMP_SHORTS_READY_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 0 : Shortcut between event READY and task SAMPLE */
+#define LPCOMP_SHORTS_READY_SAMPLE_Pos (0UL) /*!< Position of READY_SAMPLE field. */
+#define LPCOMP_SHORTS_READY_SAMPLE_Msk (0x1UL << LPCOMP_SHORTS_READY_SAMPLE_Pos) /*!< Bit mask of READY_SAMPLE field. */
+#define LPCOMP_SHORTS_READY_SAMPLE_Disabled (0UL) /*!< Disable shortcut */
+#define LPCOMP_SHORTS_READY_SAMPLE_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: LPCOMP_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 3 : Write '1' to enable interrupt for event CROSS */
+#define LPCOMP_INTENSET_CROSS_Pos (3UL) /*!< Position of CROSS field. */
+#define LPCOMP_INTENSET_CROSS_Msk (0x1UL << LPCOMP_INTENSET_CROSS_Pos) /*!< Bit mask of CROSS field. */
+#define LPCOMP_INTENSET_CROSS_Disabled (0UL) /*!< Read: Disabled */
+#define LPCOMP_INTENSET_CROSS_Enabled (1UL) /*!< Read: Enabled */
+#define LPCOMP_INTENSET_CROSS_Set (1UL) /*!< Enable */
+
+/* Bit 2 : Write '1' to enable interrupt for event UP */
+#define LPCOMP_INTENSET_UP_Pos (2UL) /*!< Position of UP field. */
+#define LPCOMP_INTENSET_UP_Msk (0x1UL << LPCOMP_INTENSET_UP_Pos) /*!< Bit mask of UP field. */
+#define LPCOMP_INTENSET_UP_Disabled (0UL) /*!< Read: Disabled */
+#define LPCOMP_INTENSET_UP_Enabled (1UL) /*!< Read: Enabled */
+#define LPCOMP_INTENSET_UP_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event DOWN */
+#define LPCOMP_INTENSET_DOWN_Pos (1UL) /*!< Position of DOWN field. */
+#define LPCOMP_INTENSET_DOWN_Msk (0x1UL << LPCOMP_INTENSET_DOWN_Pos) /*!< Bit mask of DOWN field. */
+#define LPCOMP_INTENSET_DOWN_Disabled (0UL) /*!< Read: Disabled */
+#define LPCOMP_INTENSET_DOWN_Enabled (1UL) /*!< Read: Enabled */
+#define LPCOMP_INTENSET_DOWN_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event READY */
+#define LPCOMP_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */
+#define LPCOMP_INTENSET_READY_Msk (0x1UL << LPCOMP_INTENSET_READY_Pos) /*!< Bit mask of READY field. */
+#define LPCOMP_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */
+#define LPCOMP_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */
+#define LPCOMP_INTENSET_READY_Set (1UL) /*!< Enable */
+
+/* Register: LPCOMP_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 3 : Write '1' to disable interrupt for event CROSS */
+#define LPCOMP_INTENCLR_CROSS_Pos (3UL) /*!< Position of CROSS field. */
+#define LPCOMP_INTENCLR_CROSS_Msk (0x1UL << LPCOMP_INTENCLR_CROSS_Pos) /*!< Bit mask of CROSS field. */
+#define LPCOMP_INTENCLR_CROSS_Disabled (0UL) /*!< Read: Disabled */
+#define LPCOMP_INTENCLR_CROSS_Enabled (1UL) /*!< Read: Enabled */
+#define LPCOMP_INTENCLR_CROSS_Clear (1UL) /*!< Disable */
+
+/* Bit 2 : Write '1' to disable interrupt for event UP */
+#define LPCOMP_INTENCLR_UP_Pos (2UL) /*!< Position of UP field. */
+#define LPCOMP_INTENCLR_UP_Msk (0x1UL << LPCOMP_INTENCLR_UP_Pos) /*!< Bit mask of UP field. */
+#define LPCOMP_INTENCLR_UP_Disabled (0UL) /*!< Read: Disabled */
+#define LPCOMP_INTENCLR_UP_Enabled (1UL) /*!< Read: Enabled */
+#define LPCOMP_INTENCLR_UP_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event DOWN */
+#define LPCOMP_INTENCLR_DOWN_Pos (1UL) /*!< Position of DOWN field. */
+#define LPCOMP_INTENCLR_DOWN_Msk (0x1UL << LPCOMP_INTENCLR_DOWN_Pos) /*!< Bit mask of DOWN field. */
+#define LPCOMP_INTENCLR_DOWN_Disabled (0UL) /*!< Read: Disabled */
+#define LPCOMP_INTENCLR_DOWN_Enabled (1UL) /*!< Read: Enabled */
+#define LPCOMP_INTENCLR_DOWN_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event READY */
+#define LPCOMP_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */
+#define LPCOMP_INTENCLR_READY_Msk (0x1UL << LPCOMP_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */
+#define LPCOMP_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */
+#define LPCOMP_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */
+#define LPCOMP_INTENCLR_READY_Clear (1UL) /*!< Disable */
+
+/* Register: LPCOMP_RESULT */
+/* Description: Compare result */
+
+/* Bit 0 : Result of last compare. Decision point SAMPLE task. */
+#define LPCOMP_RESULT_RESULT_Pos (0UL) /*!< Position of RESULT field. */
+#define LPCOMP_RESULT_RESULT_Msk (0x1UL << LPCOMP_RESULT_RESULT_Pos) /*!< Bit mask of RESULT field. */
+#define LPCOMP_RESULT_RESULT_Below (0UL) /*!< Input voltage is below the reference threshold (VIN+ < VIN-). */
+#define LPCOMP_RESULT_RESULT_Above (1UL) /*!< Input voltage is above the reference threshold (VIN+ > VIN-). */
+
+/* Register: LPCOMP_ENABLE */
+/* Description: Enable LPCOMP */
+
+/* Bits 1..0 : Enable or disable LPCOMP */
+#define LPCOMP_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define LPCOMP_ENABLE_ENABLE_Msk (0x3UL << LPCOMP_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define LPCOMP_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */
+#define LPCOMP_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */
+
+/* Register: LPCOMP_PSEL */
+/* Description: Input pin select */
+
+/* Bits 2..0 : Analog pin select */
+#define LPCOMP_PSEL_PSEL_Pos (0UL) /*!< Position of PSEL field. */
+#define LPCOMP_PSEL_PSEL_Msk (0x7UL << LPCOMP_PSEL_PSEL_Pos) /*!< Bit mask of PSEL field. */
+#define LPCOMP_PSEL_PSEL_AnalogInput0 (0UL) /*!< AIN0 selected as analog input */
+#define LPCOMP_PSEL_PSEL_AnalogInput1 (1UL) /*!< AIN1 selected as analog input */
+#define LPCOMP_PSEL_PSEL_AnalogInput2 (2UL) /*!< AIN2 selected as analog input */
+#define LPCOMP_PSEL_PSEL_AnalogInput3 (3UL) /*!< AIN3 selected as analog input */
+#define LPCOMP_PSEL_PSEL_AnalogInput4 (4UL) /*!< AIN4 selected as analog input */
+#define LPCOMP_PSEL_PSEL_AnalogInput5 (5UL) /*!< AIN5 selected as analog input */
+#define LPCOMP_PSEL_PSEL_AnalogInput6 (6UL) /*!< AIN6 selected as analog input */
+#define LPCOMP_PSEL_PSEL_AnalogInput7 (7UL) /*!< AIN7 selected as analog input */
+
+/* Register: LPCOMP_REFSEL */
+/* Description: Reference select */
+
+/* Bits 3..0 : Reference select */
+#define LPCOMP_REFSEL_REFSEL_Pos (0UL) /*!< Position of REFSEL field. */
+#define LPCOMP_REFSEL_REFSEL_Msk (0xFUL << LPCOMP_REFSEL_REFSEL_Pos) /*!< Bit mask of REFSEL field. */
+#define LPCOMP_REFSEL_REFSEL_Ref1_8Vdd (0UL) /*!< VDD * 1/8 selected as reference */
+#define LPCOMP_REFSEL_REFSEL_Ref2_8Vdd (1UL) /*!< VDD * 2/8 selected as reference */
+#define LPCOMP_REFSEL_REFSEL_Ref3_8Vdd (2UL) /*!< VDD * 3/8 selected as reference */
+#define LPCOMP_REFSEL_REFSEL_Ref4_8Vdd (3UL) /*!< VDD * 4/8 selected as reference */
+#define LPCOMP_REFSEL_REFSEL_Ref5_8Vdd (4UL) /*!< VDD * 5/8 selected as reference */
+#define LPCOMP_REFSEL_REFSEL_Ref6_8Vdd (5UL) /*!< VDD * 6/8 selected as reference */
+#define LPCOMP_REFSEL_REFSEL_Ref7_8Vdd (6UL) /*!< VDD * 7/8 selected as reference */
+#define LPCOMP_REFSEL_REFSEL_ARef (7UL) /*!< External analog reference selected */
+#define LPCOMP_REFSEL_REFSEL_Ref1_16Vdd (8UL) /*!< VDD * 1/16 selected as reference */
+#define LPCOMP_REFSEL_REFSEL_Ref3_16Vdd (9UL) /*!< VDD * 3/16 selected as reference */
+#define LPCOMP_REFSEL_REFSEL_Ref5_16Vdd (10UL) /*!< VDD * 5/16 selected as reference */
+#define LPCOMP_REFSEL_REFSEL_Ref7_16Vdd (11UL) /*!< VDD * 7/16 selected as reference */
+#define LPCOMP_REFSEL_REFSEL_Ref9_16Vdd (12UL) /*!< VDD * 9/16 selected as reference */
+#define LPCOMP_REFSEL_REFSEL_Ref11_16Vdd (13UL) /*!< VDD * 11/16 selected as reference */
+#define LPCOMP_REFSEL_REFSEL_Ref13_16Vdd (14UL) /*!< VDD * 13/16 selected as reference */
+#define LPCOMP_REFSEL_REFSEL_Ref15_16Vdd (15UL) /*!< VDD * 15/16 selected as reference */
+
+/* Register: LPCOMP_EXTREFSEL */
+/* Description: External reference select */
+
+/* Bit 0 : External analog reference select */
+#define LPCOMP_EXTREFSEL_EXTREFSEL_Pos (0UL) /*!< Position of EXTREFSEL field. */
+#define LPCOMP_EXTREFSEL_EXTREFSEL_Msk (0x1UL << LPCOMP_EXTREFSEL_EXTREFSEL_Pos) /*!< Bit mask of EXTREFSEL field. */
+#define LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference0 (0UL) /*!< Use AIN0 as external analog reference */
+#define LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference1 (1UL) /*!< Use AIN1 as external analog reference */
+
+/* Register: LPCOMP_ANADETECT */
+/* Description: Analog detect configuration */
+
+/* Bits 1..0 : Analog detect configuration */
+#define LPCOMP_ANADETECT_ANADETECT_Pos (0UL) /*!< Position of ANADETECT field. */
+#define LPCOMP_ANADETECT_ANADETECT_Msk (0x3UL << LPCOMP_ANADETECT_ANADETECT_Pos) /*!< Bit mask of ANADETECT field. */
+#define LPCOMP_ANADETECT_ANADETECT_Cross (0UL) /*!< Generate ANADETECT on crossing, both upward crossing and downward crossing */
+#define LPCOMP_ANADETECT_ANADETECT_Up (1UL) /*!< Generate ANADETECT on upward crossing only */
+#define LPCOMP_ANADETECT_ANADETECT_Down (2UL) /*!< Generate ANADETECT on downward crossing only */
+
+/* Register: LPCOMP_HYST */
+/* Description: Comparator hysteresis enable */
+
+/* Bit 0 : Comparator hysteresis enable */
+#define LPCOMP_HYST_HYST_Pos (0UL) /*!< Position of HYST field. */
+#define LPCOMP_HYST_HYST_Msk (0x1UL << LPCOMP_HYST_HYST_Pos) /*!< Bit mask of HYST field. */
+#define LPCOMP_HYST_HYST_Disabled (0UL) /*!< Comparator hysteresis disabled */
+#define LPCOMP_HYST_HYST_Enabled (1UL) /*!< Comparator hysteresis enabled */
+
+
+/* Peripheral: MWU */
+/* Description: Memory Watch Unit */
+
+/* Register: MWU_EVENTS_REGION_WA */
+/* Description: Description cluster: Write access to region n detected */
+
+/* Bit 0 : Write access to region n detected */
+#define MWU_EVENTS_REGION_WA_WA_Pos (0UL) /*!< Position of WA field. */
+#define MWU_EVENTS_REGION_WA_WA_Msk (0x1UL << MWU_EVENTS_REGION_WA_WA_Pos) /*!< Bit mask of WA field. */
+#define MWU_EVENTS_REGION_WA_WA_NotGenerated (0UL) /*!< Event not generated */
+#define MWU_EVENTS_REGION_WA_WA_Generated (1UL) /*!< Event generated */
+
+/* Register: MWU_EVENTS_REGION_RA */
+/* Description: Description cluster: Read access to region n detected */
+
+/* Bit 0 : Read access to region n detected */
+#define MWU_EVENTS_REGION_RA_RA_Pos (0UL) /*!< Position of RA field. */
+#define MWU_EVENTS_REGION_RA_RA_Msk (0x1UL << MWU_EVENTS_REGION_RA_RA_Pos) /*!< Bit mask of RA field. */
+#define MWU_EVENTS_REGION_RA_RA_NotGenerated (0UL) /*!< Event not generated */
+#define MWU_EVENTS_REGION_RA_RA_Generated (1UL) /*!< Event generated */
+
+/* Register: MWU_EVENTS_PREGION_WA */
+/* Description: Description cluster: Write access to peripheral region n detected */
+
+/* Bit 0 : Write access to peripheral region n detected */
+#define MWU_EVENTS_PREGION_WA_WA_Pos (0UL) /*!< Position of WA field. */
+#define MWU_EVENTS_PREGION_WA_WA_Msk (0x1UL << MWU_EVENTS_PREGION_WA_WA_Pos) /*!< Bit mask of WA field. */
+#define MWU_EVENTS_PREGION_WA_WA_NotGenerated (0UL) /*!< Event not generated */
+#define MWU_EVENTS_PREGION_WA_WA_Generated (1UL) /*!< Event generated */
+
+/* Register: MWU_EVENTS_PREGION_RA */
+/* Description: Description cluster: Read access to peripheral region n detected */
+
+/* Bit 0 : Read access to peripheral region n detected */
+#define MWU_EVENTS_PREGION_RA_RA_Pos (0UL) /*!< Position of RA field. */
+#define MWU_EVENTS_PREGION_RA_RA_Msk (0x1UL << MWU_EVENTS_PREGION_RA_RA_Pos) /*!< Bit mask of RA field. */
+#define MWU_EVENTS_PREGION_RA_RA_NotGenerated (0UL) /*!< Event not generated */
+#define MWU_EVENTS_PREGION_RA_RA_Generated (1UL) /*!< Event generated */
+
+/* Register: MWU_INTEN */
+/* Description: Enable or disable interrupt */
+
+/* Bit 27 : Enable or disable interrupt for event PREGION1RA */
+#define MWU_INTEN_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */
+#define MWU_INTEN_PREGION1RA_Msk (0x1UL << MWU_INTEN_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */
+#define MWU_INTEN_PREGION1RA_Disabled (0UL) /*!< Disable */
+#define MWU_INTEN_PREGION1RA_Enabled (1UL) /*!< Enable */
+
+/* Bit 26 : Enable or disable interrupt for event PREGION1WA */
+#define MWU_INTEN_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */
+#define MWU_INTEN_PREGION1WA_Msk (0x1UL << MWU_INTEN_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */
+#define MWU_INTEN_PREGION1WA_Disabled (0UL) /*!< Disable */
+#define MWU_INTEN_PREGION1WA_Enabled (1UL) /*!< Enable */
+
+/* Bit 25 : Enable or disable interrupt for event PREGION0RA */
+#define MWU_INTEN_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */
+#define MWU_INTEN_PREGION0RA_Msk (0x1UL << MWU_INTEN_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */
+#define MWU_INTEN_PREGION0RA_Disabled (0UL) /*!< Disable */
+#define MWU_INTEN_PREGION0RA_Enabled (1UL) /*!< Enable */
+
+/* Bit 24 : Enable or disable interrupt for event PREGION0WA */
+#define MWU_INTEN_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */
+#define MWU_INTEN_PREGION0WA_Msk (0x1UL << MWU_INTEN_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */
+#define MWU_INTEN_PREGION0WA_Disabled (0UL) /*!< Disable */
+#define MWU_INTEN_PREGION0WA_Enabled (1UL) /*!< Enable */
+
+/* Bit 7 : Enable or disable interrupt for event REGION3RA */
+#define MWU_INTEN_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */
+#define MWU_INTEN_REGION3RA_Msk (0x1UL << MWU_INTEN_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */
+#define MWU_INTEN_REGION3RA_Disabled (0UL) /*!< Disable */
+#define MWU_INTEN_REGION3RA_Enabled (1UL) /*!< Enable */
+
+/* Bit 6 : Enable or disable interrupt for event REGION3WA */
+#define MWU_INTEN_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */
+#define MWU_INTEN_REGION3WA_Msk (0x1UL << MWU_INTEN_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */
+#define MWU_INTEN_REGION3WA_Disabled (0UL) /*!< Disable */
+#define MWU_INTEN_REGION3WA_Enabled (1UL) /*!< Enable */
+
+/* Bit 5 : Enable or disable interrupt for event REGION2RA */
+#define MWU_INTEN_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */
+#define MWU_INTEN_REGION2RA_Msk (0x1UL << MWU_INTEN_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */
+#define MWU_INTEN_REGION2RA_Disabled (0UL) /*!< Disable */
+#define MWU_INTEN_REGION2RA_Enabled (1UL) /*!< Enable */
+
+/* Bit 4 : Enable or disable interrupt for event REGION2WA */
+#define MWU_INTEN_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */
+#define MWU_INTEN_REGION2WA_Msk (0x1UL << MWU_INTEN_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */
+#define MWU_INTEN_REGION2WA_Disabled (0UL) /*!< Disable */
+#define MWU_INTEN_REGION2WA_Enabled (1UL) /*!< Enable */
+
+/* Bit 3 : Enable or disable interrupt for event REGION1RA */
+#define MWU_INTEN_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */
+#define MWU_INTEN_REGION1RA_Msk (0x1UL << MWU_INTEN_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */
+#define MWU_INTEN_REGION1RA_Disabled (0UL) /*!< Disable */
+#define MWU_INTEN_REGION1RA_Enabled (1UL) /*!< Enable */
+
+/* Bit 2 : Enable or disable interrupt for event REGION1WA */
+#define MWU_INTEN_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */
+#define MWU_INTEN_REGION1WA_Msk (0x1UL << MWU_INTEN_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */
+#define MWU_INTEN_REGION1WA_Disabled (0UL) /*!< Disable */
+#define MWU_INTEN_REGION1WA_Enabled (1UL) /*!< Enable */
+
+/* Bit 1 : Enable or disable interrupt for event REGION0RA */
+#define MWU_INTEN_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */
+#define MWU_INTEN_REGION0RA_Msk (0x1UL << MWU_INTEN_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */
+#define MWU_INTEN_REGION0RA_Disabled (0UL) /*!< Disable */
+#define MWU_INTEN_REGION0RA_Enabled (1UL) /*!< Enable */
+
+/* Bit 0 : Enable or disable interrupt for event REGION0WA */
+#define MWU_INTEN_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */
+#define MWU_INTEN_REGION0WA_Msk (0x1UL << MWU_INTEN_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */
+#define MWU_INTEN_REGION0WA_Disabled (0UL) /*!< Disable */
+#define MWU_INTEN_REGION0WA_Enabled (1UL) /*!< Enable */
+
+/* Register: MWU_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 27 : Write '1' to enable interrupt for event PREGION1RA */
+#define MWU_INTENSET_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */
+#define MWU_INTENSET_PREGION1RA_Msk (0x1UL << MWU_INTENSET_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */
+#define MWU_INTENSET_PREGION1RA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_INTENSET_PREGION1RA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_INTENSET_PREGION1RA_Set (1UL) /*!< Enable */
+
+/* Bit 26 : Write '1' to enable interrupt for event PREGION1WA */
+#define MWU_INTENSET_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */
+#define MWU_INTENSET_PREGION1WA_Msk (0x1UL << MWU_INTENSET_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */
+#define MWU_INTENSET_PREGION1WA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_INTENSET_PREGION1WA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_INTENSET_PREGION1WA_Set (1UL) /*!< Enable */
+
+/* Bit 25 : Write '1' to enable interrupt for event PREGION0RA */
+#define MWU_INTENSET_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */
+#define MWU_INTENSET_PREGION0RA_Msk (0x1UL << MWU_INTENSET_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */
+#define MWU_INTENSET_PREGION0RA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_INTENSET_PREGION0RA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_INTENSET_PREGION0RA_Set (1UL) /*!< Enable */
+
+/* Bit 24 : Write '1' to enable interrupt for event PREGION0WA */
+#define MWU_INTENSET_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */
+#define MWU_INTENSET_PREGION0WA_Msk (0x1UL << MWU_INTENSET_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */
+#define MWU_INTENSET_PREGION0WA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_INTENSET_PREGION0WA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_INTENSET_PREGION0WA_Set (1UL) /*!< Enable */
+
+/* Bit 7 : Write '1' to enable interrupt for event REGION3RA */
+#define MWU_INTENSET_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */
+#define MWU_INTENSET_REGION3RA_Msk (0x1UL << MWU_INTENSET_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */
+#define MWU_INTENSET_REGION3RA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_INTENSET_REGION3RA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_INTENSET_REGION3RA_Set (1UL) /*!< Enable */
+
+/* Bit 6 : Write '1' to enable interrupt for event REGION3WA */
+#define MWU_INTENSET_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */
+#define MWU_INTENSET_REGION3WA_Msk (0x1UL << MWU_INTENSET_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */
+#define MWU_INTENSET_REGION3WA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_INTENSET_REGION3WA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_INTENSET_REGION3WA_Set (1UL) /*!< Enable */
+
+/* Bit 5 : Write '1' to enable interrupt for event REGION2RA */
+#define MWU_INTENSET_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */
+#define MWU_INTENSET_REGION2RA_Msk (0x1UL << MWU_INTENSET_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */
+#define MWU_INTENSET_REGION2RA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_INTENSET_REGION2RA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_INTENSET_REGION2RA_Set (1UL) /*!< Enable */
+
+/* Bit 4 : Write '1' to enable interrupt for event REGION2WA */
+#define MWU_INTENSET_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */
+#define MWU_INTENSET_REGION2WA_Msk (0x1UL << MWU_INTENSET_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */
+#define MWU_INTENSET_REGION2WA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_INTENSET_REGION2WA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_INTENSET_REGION2WA_Set (1UL) /*!< Enable */
+
+/* Bit 3 : Write '1' to enable interrupt for event REGION1RA */
+#define MWU_INTENSET_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */
+#define MWU_INTENSET_REGION1RA_Msk (0x1UL << MWU_INTENSET_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */
+#define MWU_INTENSET_REGION1RA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_INTENSET_REGION1RA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_INTENSET_REGION1RA_Set (1UL) /*!< Enable */
+
+/* Bit 2 : Write '1' to enable interrupt for event REGION1WA */
+#define MWU_INTENSET_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */
+#define MWU_INTENSET_REGION1WA_Msk (0x1UL << MWU_INTENSET_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */
+#define MWU_INTENSET_REGION1WA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_INTENSET_REGION1WA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_INTENSET_REGION1WA_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event REGION0RA */
+#define MWU_INTENSET_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */
+#define MWU_INTENSET_REGION0RA_Msk (0x1UL << MWU_INTENSET_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */
+#define MWU_INTENSET_REGION0RA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_INTENSET_REGION0RA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_INTENSET_REGION0RA_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event REGION0WA */
+#define MWU_INTENSET_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */
+#define MWU_INTENSET_REGION0WA_Msk (0x1UL << MWU_INTENSET_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */
+#define MWU_INTENSET_REGION0WA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_INTENSET_REGION0WA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_INTENSET_REGION0WA_Set (1UL) /*!< Enable */
+
+/* Register: MWU_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 27 : Write '1' to disable interrupt for event PREGION1RA */
+#define MWU_INTENCLR_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */
+#define MWU_INTENCLR_PREGION1RA_Msk (0x1UL << MWU_INTENCLR_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */
+#define MWU_INTENCLR_PREGION1RA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_INTENCLR_PREGION1RA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_INTENCLR_PREGION1RA_Clear (1UL) /*!< Disable */
+
+/* Bit 26 : Write '1' to disable interrupt for event PREGION1WA */
+#define MWU_INTENCLR_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */
+#define MWU_INTENCLR_PREGION1WA_Msk (0x1UL << MWU_INTENCLR_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */
+#define MWU_INTENCLR_PREGION1WA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_INTENCLR_PREGION1WA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_INTENCLR_PREGION1WA_Clear (1UL) /*!< Disable */
+
+/* Bit 25 : Write '1' to disable interrupt for event PREGION0RA */
+#define MWU_INTENCLR_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */
+#define MWU_INTENCLR_PREGION0RA_Msk (0x1UL << MWU_INTENCLR_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */
+#define MWU_INTENCLR_PREGION0RA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_INTENCLR_PREGION0RA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_INTENCLR_PREGION0RA_Clear (1UL) /*!< Disable */
+
+/* Bit 24 : Write '1' to disable interrupt for event PREGION0WA */
+#define MWU_INTENCLR_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */
+#define MWU_INTENCLR_PREGION0WA_Msk (0x1UL << MWU_INTENCLR_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */
+#define MWU_INTENCLR_PREGION0WA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_INTENCLR_PREGION0WA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_INTENCLR_PREGION0WA_Clear (1UL) /*!< Disable */
+
+/* Bit 7 : Write '1' to disable interrupt for event REGION3RA */
+#define MWU_INTENCLR_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */
+#define MWU_INTENCLR_REGION3RA_Msk (0x1UL << MWU_INTENCLR_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */
+#define MWU_INTENCLR_REGION3RA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_INTENCLR_REGION3RA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_INTENCLR_REGION3RA_Clear (1UL) /*!< Disable */
+
+/* Bit 6 : Write '1' to disable interrupt for event REGION3WA */
+#define MWU_INTENCLR_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */
+#define MWU_INTENCLR_REGION3WA_Msk (0x1UL << MWU_INTENCLR_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */
+#define MWU_INTENCLR_REGION3WA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_INTENCLR_REGION3WA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_INTENCLR_REGION3WA_Clear (1UL) /*!< Disable */
+
+/* Bit 5 : Write '1' to disable interrupt for event REGION2RA */
+#define MWU_INTENCLR_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */
+#define MWU_INTENCLR_REGION2RA_Msk (0x1UL << MWU_INTENCLR_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */
+#define MWU_INTENCLR_REGION2RA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_INTENCLR_REGION2RA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_INTENCLR_REGION2RA_Clear (1UL) /*!< Disable */
+
+/* Bit 4 : Write '1' to disable interrupt for event REGION2WA */
+#define MWU_INTENCLR_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */
+#define MWU_INTENCLR_REGION2WA_Msk (0x1UL << MWU_INTENCLR_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */
+#define MWU_INTENCLR_REGION2WA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_INTENCLR_REGION2WA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_INTENCLR_REGION2WA_Clear (1UL) /*!< Disable */
+
+/* Bit 3 : Write '1' to disable interrupt for event REGION1RA */
+#define MWU_INTENCLR_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */
+#define MWU_INTENCLR_REGION1RA_Msk (0x1UL << MWU_INTENCLR_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */
+#define MWU_INTENCLR_REGION1RA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_INTENCLR_REGION1RA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_INTENCLR_REGION1RA_Clear (1UL) /*!< Disable */
+
+/* Bit 2 : Write '1' to disable interrupt for event REGION1WA */
+#define MWU_INTENCLR_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */
+#define MWU_INTENCLR_REGION1WA_Msk (0x1UL << MWU_INTENCLR_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */
+#define MWU_INTENCLR_REGION1WA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_INTENCLR_REGION1WA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_INTENCLR_REGION1WA_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event REGION0RA */
+#define MWU_INTENCLR_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */
+#define MWU_INTENCLR_REGION0RA_Msk (0x1UL << MWU_INTENCLR_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */
+#define MWU_INTENCLR_REGION0RA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_INTENCLR_REGION0RA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_INTENCLR_REGION0RA_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event REGION0WA */
+#define MWU_INTENCLR_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */
+#define MWU_INTENCLR_REGION0WA_Msk (0x1UL << MWU_INTENCLR_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */
+#define MWU_INTENCLR_REGION0WA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_INTENCLR_REGION0WA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_INTENCLR_REGION0WA_Clear (1UL) /*!< Disable */
+
+/* Register: MWU_NMIEN */
+/* Description: Enable or disable interrupt */
+
+/* Bit 27 : Enable or disable interrupt for event PREGION1RA */
+#define MWU_NMIEN_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */
+#define MWU_NMIEN_PREGION1RA_Msk (0x1UL << MWU_NMIEN_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */
+#define MWU_NMIEN_PREGION1RA_Disabled (0UL) /*!< Disable */
+#define MWU_NMIEN_PREGION1RA_Enabled (1UL) /*!< Enable */
+
+/* Bit 26 : Enable or disable interrupt for event PREGION1WA */
+#define MWU_NMIEN_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */
+#define MWU_NMIEN_PREGION1WA_Msk (0x1UL << MWU_NMIEN_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */
+#define MWU_NMIEN_PREGION1WA_Disabled (0UL) /*!< Disable */
+#define MWU_NMIEN_PREGION1WA_Enabled (1UL) /*!< Enable */
+
+/* Bit 25 : Enable or disable interrupt for event PREGION0RA */
+#define MWU_NMIEN_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */
+#define MWU_NMIEN_PREGION0RA_Msk (0x1UL << MWU_NMIEN_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */
+#define MWU_NMIEN_PREGION0RA_Disabled (0UL) /*!< Disable */
+#define MWU_NMIEN_PREGION0RA_Enabled (1UL) /*!< Enable */
+
+/* Bit 24 : Enable or disable interrupt for event PREGION0WA */
+#define MWU_NMIEN_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */
+#define MWU_NMIEN_PREGION0WA_Msk (0x1UL << MWU_NMIEN_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */
+#define MWU_NMIEN_PREGION0WA_Disabled (0UL) /*!< Disable */
+#define MWU_NMIEN_PREGION0WA_Enabled (1UL) /*!< Enable */
+
+/* Bit 7 : Enable or disable interrupt for event REGION3RA */
+#define MWU_NMIEN_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */
+#define MWU_NMIEN_REGION3RA_Msk (0x1UL << MWU_NMIEN_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */
+#define MWU_NMIEN_REGION3RA_Disabled (0UL) /*!< Disable */
+#define MWU_NMIEN_REGION3RA_Enabled (1UL) /*!< Enable */
+
+/* Bit 6 : Enable or disable interrupt for event REGION3WA */
+#define MWU_NMIEN_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */
+#define MWU_NMIEN_REGION3WA_Msk (0x1UL << MWU_NMIEN_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */
+#define MWU_NMIEN_REGION3WA_Disabled (0UL) /*!< Disable */
+#define MWU_NMIEN_REGION3WA_Enabled (1UL) /*!< Enable */
+
+/* Bit 5 : Enable or disable interrupt for event REGION2RA */
+#define MWU_NMIEN_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */
+#define MWU_NMIEN_REGION2RA_Msk (0x1UL << MWU_NMIEN_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */
+#define MWU_NMIEN_REGION2RA_Disabled (0UL) /*!< Disable */
+#define MWU_NMIEN_REGION2RA_Enabled (1UL) /*!< Enable */
+
+/* Bit 4 : Enable or disable interrupt for event REGION2WA */
+#define MWU_NMIEN_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */
+#define MWU_NMIEN_REGION2WA_Msk (0x1UL << MWU_NMIEN_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */
+#define MWU_NMIEN_REGION2WA_Disabled (0UL) /*!< Disable */
+#define MWU_NMIEN_REGION2WA_Enabled (1UL) /*!< Enable */
+
+/* Bit 3 : Enable or disable interrupt for event REGION1RA */
+#define MWU_NMIEN_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */
+#define MWU_NMIEN_REGION1RA_Msk (0x1UL << MWU_NMIEN_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */
+#define MWU_NMIEN_REGION1RA_Disabled (0UL) /*!< Disable */
+#define MWU_NMIEN_REGION1RA_Enabled (1UL) /*!< Enable */
+
+/* Bit 2 : Enable or disable interrupt for event REGION1WA */
+#define MWU_NMIEN_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */
+#define MWU_NMIEN_REGION1WA_Msk (0x1UL << MWU_NMIEN_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */
+#define MWU_NMIEN_REGION1WA_Disabled (0UL) /*!< Disable */
+#define MWU_NMIEN_REGION1WA_Enabled (1UL) /*!< Enable */
+
+/* Bit 1 : Enable or disable interrupt for event REGION0RA */
+#define MWU_NMIEN_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */
+#define MWU_NMIEN_REGION0RA_Msk (0x1UL << MWU_NMIEN_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */
+#define MWU_NMIEN_REGION0RA_Disabled (0UL) /*!< Disable */
+#define MWU_NMIEN_REGION0RA_Enabled (1UL) /*!< Enable */
+
+/* Bit 0 : Enable or disable interrupt for event REGION0WA */
+#define MWU_NMIEN_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */
+#define MWU_NMIEN_REGION0WA_Msk (0x1UL << MWU_NMIEN_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */
+#define MWU_NMIEN_REGION0WA_Disabled (0UL) /*!< Disable */
+#define MWU_NMIEN_REGION0WA_Enabled (1UL) /*!< Enable */
+
+/* Register: MWU_NMIENSET */
+/* Description: Enable interrupt */
+
+/* Bit 27 : Write '1' to enable interrupt for event PREGION1RA */
+#define MWU_NMIENSET_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */
+#define MWU_NMIENSET_PREGION1RA_Msk (0x1UL << MWU_NMIENSET_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */
+#define MWU_NMIENSET_PREGION1RA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_NMIENSET_PREGION1RA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_NMIENSET_PREGION1RA_Set (1UL) /*!< Enable */
+
+/* Bit 26 : Write '1' to enable interrupt for event PREGION1WA */
+#define MWU_NMIENSET_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */
+#define MWU_NMIENSET_PREGION1WA_Msk (0x1UL << MWU_NMIENSET_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */
+#define MWU_NMIENSET_PREGION1WA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_NMIENSET_PREGION1WA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_NMIENSET_PREGION1WA_Set (1UL) /*!< Enable */
+
+/* Bit 25 : Write '1' to enable interrupt for event PREGION0RA */
+#define MWU_NMIENSET_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */
+#define MWU_NMIENSET_PREGION0RA_Msk (0x1UL << MWU_NMIENSET_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */
+#define MWU_NMIENSET_PREGION0RA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_NMIENSET_PREGION0RA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_NMIENSET_PREGION0RA_Set (1UL) /*!< Enable */
+
+/* Bit 24 : Write '1' to enable interrupt for event PREGION0WA */
+#define MWU_NMIENSET_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */
+#define MWU_NMIENSET_PREGION0WA_Msk (0x1UL << MWU_NMIENSET_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */
+#define MWU_NMIENSET_PREGION0WA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_NMIENSET_PREGION0WA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_NMIENSET_PREGION0WA_Set (1UL) /*!< Enable */
+
+/* Bit 7 : Write '1' to enable interrupt for event REGION3RA */
+#define MWU_NMIENSET_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */
+#define MWU_NMIENSET_REGION3RA_Msk (0x1UL << MWU_NMIENSET_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */
+#define MWU_NMIENSET_REGION3RA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_NMIENSET_REGION3RA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_NMIENSET_REGION3RA_Set (1UL) /*!< Enable */
+
+/* Bit 6 : Write '1' to enable interrupt for event REGION3WA */
+#define MWU_NMIENSET_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */
+#define MWU_NMIENSET_REGION3WA_Msk (0x1UL << MWU_NMIENSET_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */
+#define MWU_NMIENSET_REGION3WA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_NMIENSET_REGION3WA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_NMIENSET_REGION3WA_Set (1UL) /*!< Enable */
+
+/* Bit 5 : Write '1' to enable interrupt for event REGION2RA */
+#define MWU_NMIENSET_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */
+#define MWU_NMIENSET_REGION2RA_Msk (0x1UL << MWU_NMIENSET_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */
+#define MWU_NMIENSET_REGION2RA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_NMIENSET_REGION2RA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_NMIENSET_REGION2RA_Set (1UL) /*!< Enable */
+
+/* Bit 4 : Write '1' to enable interrupt for event REGION2WA */
+#define MWU_NMIENSET_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */
+#define MWU_NMIENSET_REGION2WA_Msk (0x1UL << MWU_NMIENSET_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */
+#define MWU_NMIENSET_REGION2WA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_NMIENSET_REGION2WA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_NMIENSET_REGION2WA_Set (1UL) /*!< Enable */
+
+/* Bit 3 : Write '1' to enable interrupt for event REGION1RA */
+#define MWU_NMIENSET_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */
+#define MWU_NMIENSET_REGION1RA_Msk (0x1UL << MWU_NMIENSET_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */
+#define MWU_NMIENSET_REGION1RA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_NMIENSET_REGION1RA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_NMIENSET_REGION1RA_Set (1UL) /*!< Enable */
+
+/* Bit 2 : Write '1' to enable interrupt for event REGION1WA */
+#define MWU_NMIENSET_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */
+#define MWU_NMIENSET_REGION1WA_Msk (0x1UL << MWU_NMIENSET_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */
+#define MWU_NMIENSET_REGION1WA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_NMIENSET_REGION1WA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_NMIENSET_REGION1WA_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event REGION0RA */
+#define MWU_NMIENSET_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */
+#define MWU_NMIENSET_REGION0RA_Msk (0x1UL << MWU_NMIENSET_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */
+#define MWU_NMIENSET_REGION0RA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_NMIENSET_REGION0RA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_NMIENSET_REGION0RA_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event REGION0WA */
+#define MWU_NMIENSET_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */
+#define MWU_NMIENSET_REGION0WA_Msk (0x1UL << MWU_NMIENSET_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */
+#define MWU_NMIENSET_REGION0WA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_NMIENSET_REGION0WA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_NMIENSET_REGION0WA_Set (1UL) /*!< Enable */
+
+/* Register: MWU_NMIENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 27 : Write '1' to disable interrupt for event PREGION1RA */
+#define MWU_NMIENCLR_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */
+#define MWU_NMIENCLR_PREGION1RA_Msk (0x1UL << MWU_NMIENCLR_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */
+#define MWU_NMIENCLR_PREGION1RA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_NMIENCLR_PREGION1RA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_NMIENCLR_PREGION1RA_Clear (1UL) /*!< Disable */
+
+/* Bit 26 : Write '1' to disable interrupt for event PREGION1WA */
+#define MWU_NMIENCLR_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */
+#define MWU_NMIENCLR_PREGION1WA_Msk (0x1UL << MWU_NMIENCLR_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */
+#define MWU_NMIENCLR_PREGION1WA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_NMIENCLR_PREGION1WA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_NMIENCLR_PREGION1WA_Clear (1UL) /*!< Disable */
+
+/* Bit 25 : Write '1' to disable interrupt for event PREGION0RA */
+#define MWU_NMIENCLR_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */
+#define MWU_NMIENCLR_PREGION0RA_Msk (0x1UL << MWU_NMIENCLR_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */
+#define MWU_NMIENCLR_PREGION0RA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_NMIENCLR_PREGION0RA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_NMIENCLR_PREGION0RA_Clear (1UL) /*!< Disable */
+
+/* Bit 24 : Write '1' to disable interrupt for event PREGION0WA */
+#define MWU_NMIENCLR_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */
+#define MWU_NMIENCLR_PREGION0WA_Msk (0x1UL << MWU_NMIENCLR_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */
+#define MWU_NMIENCLR_PREGION0WA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_NMIENCLR_PREGION0WA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_NMIENCLR_PREGION0WA_Clear (1UL) /*!< Disable */
+
+/* Bit 7 : Write '1' to disable interrupt for event REGION3RA */
+#define MWU_NMIENCLR_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */
+#define MWU_NMIENCLR_REGION3RA_Msk (0x1UL << MWU_NMIENCLR_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */
+#define MWU_NMIENCLR_REGION3RA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_NMIENCLR_REGION3RA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_NMIENCLR_REGION3RA_Clear (1UL) /*!< Disable */
+
+/* Bit 6 : Write '1' to disable interrupt for event REGION3WA */
+#define MWU_NMIENCLR_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */
+#define MWU_NMIENCLR_REGION3WA_Msk (0x1UL << MWU_NMIENCLR_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */
+#define MWU_NMIENCLR_REGION3WA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_NMIENCLR_REGION3WA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_NMIENCLR_REGION3WA_Clear (1UL) /*!< Disable */
+
+/* Bit 5 : Write '1' to disable interrupt for event REGION2RA */
+#define MWU_NMIENCLR_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */
+#define MWU_NMIENCLR_REGION2RA_Msk (0x1UL << MWU_NMIENCLR_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */
+#define MWU_NMIENCLR_REGION2RA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_NMIENCLR_REGION2RA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_NMIENCLR_REGION2RA_Clear (1UL) /*!< Disable */
+
+/* Bit 4 : Write '1' to disable interrupt for event REGION2WA */
+#define MWU_NMIENCLR_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */
+#define MWU_NMIENCLR_REGION2WA_Msk (0x1UL << MWU_NMIENCLR_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */
+#define MWU_NMIENCLR_REGION2WA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_NMIENCLR_REGION2WA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_NMIENCLR_REGION2WA_Clear (1UL) /*!< Disable */
+
+/* Bit 3 : Write '1' to disable interrupt for event REGION1RA */
+#define MWU_NMIENCLR_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */
+#define MWU_NMIENCLR_REGION1RA_Msk (0x1UL << MWU_NMIENCLR_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */
+#define MWU_NMIENCLR_REGION1RA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_NMIENCLR_REGION1RA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_NMIENCLR_REGION1RA_Clear (1UL) /*!< Disable */
+
+/* Bit 2 : Write '1' to disable interrupt for event REGION1WA */
+#define MWU_NMIENCLR_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */
+#define MWU_NMIENCLR_REGION1WA_Msk (0x1UL << MWU_NMIENCLR_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */
+#define MWU_NMIENCLR_REGION1WA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_NMIENCLR_REGION1WA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_NMIENCLR_REGION1WA_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event REGION0RA */
+#define MWU_NMIENCLR_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */
+#define MWU_NMIENCLR_REGION0RA_Msk (0x1UL << MWU_NMIENCLR_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */
+#define MWU_NMIENCLR_REGION0RA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_NMIENCLR_REGION0RA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_NMIENCLR_REGION0RA_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event REGION0WA */
+#define MWU_NMIENCLR_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */
+#define MWU_NMIENCLR_REGION0WA_Msk (0x1UL << MWU_NMIENCLR_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */
+#define MWU_NMIENCLR_REGION0WA_Disabled (0UL) /*!< Read: Disabled */
+#define MWU_NMIENCLR_REGION0WA_Enabled (1UL) /*!< Read: Enabled */
+#define MWU_NMIENCLR_REGION0WA_Clear (1UL) /*!< Disable */
+
+/* Register: MWU_PERREGION_SUBSTATWA */
+/* Description: Description cluster: Source of event/interrupt in region n, write access detected while corresponding subregion was enabled for watching */
+
+/* Bit 31 : Subregion 31 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR31_Pos (31UL) /*!< Position of SR31 field. */
+#define MWU_PERREGION_SUBSTATWA_SR31_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR31_Pos) /*!< Bit mask of SR31 field. */
+#define MWU_PERREGION_SUBSTATWA_SR31_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR31_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 30 : Subregion 30 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR30_Pos (30UL) /*!< Position of SR30 field. */
+#define MWU_PERREGION_SUBSTATWA_SR30_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR30_Pos) /*!< Bit mask of SR30 field. */
+#define MWU_PERREGION_SUBSTATWA_SR30_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR30_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 29 : Subregion 29 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR29_Pos (29UL) /*!< Position of SR29 field. */
+#define MWU_PERREGION_SUBSTATWA_SR29_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR29_Pos) /*!< Bit mask of SR29 field. */
+#define MWU_PERREGION_SUBSTATWA_SR29_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR29_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 28 : Subregion 28 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR28_Pos (28UL) /*!< Position of SR28 field. */
+#define MWU_PERREGION_SUBSTATWA_SR28_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR28_Pos) /*!< Bit mask of SR28 field. */
+#define MWU_PERREGION_SUBSTATWA_SR28_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR28_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 27 : Subregion 27 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR27_Pos (27UL) /*!< Position of SR27 field. */
+#define MWU_PERREGION_SUBSTATWA_SR27_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR27_Pos) /*!< Bit mask of SR27 field. */
+#define MWU_PERREGION_SUBSTATWA_SR27_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR27_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 26 : Subregion 26 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR26_Pos (26UL) /*!< Position of SR26 field. */
+#define MWU_PERREGION_SUBSTATWA_SR26_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR26_Pos) /*!< Bit mask of SR26 field. */
+#define MWU_PERREGION_SUBSTATWA_SR26_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR26_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 25 : Subregion 25 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR25_Pos (25UL) /*!< Position of SR25 field. */
+#define MWU_PERREGION_SUBSTATWA_SR25_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR25_Pos) /*!< Bit mask of SR25 field. */
+#define MWU_PERREGION_SUBSTATWA_SR25_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR25_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 24 : Subregion 24 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR24_Pos (24UL) /*!< Position of SR24 field. */
+#define MWU_PERREGION_SUBSTATWA_SR24_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR24_Pos) /*!< Bit mask of SR24 field. */
+#define MWU_PERREGION_SUBSTATWA_SR24_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR24_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 23 : Subregion 23 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR23_Pos (23UL) /*!< Position of SR23 field. */
+#define MWU_PERREGION_SUBSTATWA_SR23_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR23_Pos) /*!< Bit mask of SR23 field. */
+#define MWU_PERREGION_SUBSTATWA_SR23_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR23_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 22 : Subregion 22 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR22_Pos (22UL) /*!< Position of SR22 field. */
+#define MWU_PERREGION_SUBSTATWA_SR22_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR22_Pos) /*!< Bit mask of SR22 field. */
+#define MWU_PERREGION_SUBSTATWA_SR22_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR22_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 21 : Subregion 21 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR21_Pos (21UL) /*!< Position of SR21 field. */
+#define MWU_PERREGION_SUBSTATWA_SR21_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR21_Pos) /*!< Bit mask of SR21 field. */
+#define MWU_PERREGION_SUBSTATWA_SR21_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR21_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 20 : Subregion 20 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR20_Pos (20UL) /*!< Position of SR20 field. */
+#define MWU_PERREGION_SUBSTATWA_SR20_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR20_Pos) /*!< Bit mask of SR20 field. */
+#define MWU_PERREGION_SUBSTATWA_SR20_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR20_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 19 : Subregion 19 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR19_Pos (19UL) /*!< Position of SR19 field. */
+#define MWU_PERREGION_SUBSTATWA_SR19_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR19_Pos) /*!< Bit mask of SR19 field. */
+#define MWU_PERREGION_SUBSTATWA_SR19_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR19_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 18 : Subregion 18 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR18_Pos (18UL) /*!< Position of SR18 field. */
+#define MWU_PERREGION_SUBSTATWA_SR18_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR18_Pos) /*!< Bit mask of SR18 field. */
+#define MWU_PERREGION_SUBSTATWA_SR18_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR18_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 17 : Subregion 17 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR17_Pos (17UL) /*!< Position of SR17 field. */
+#define MWU_PERREGION_SUBSTATWA_SR17_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR17_Pos) /*!< Bit mask of SR17 field. */
+#define MWU_PERREGION_SUBSTATWA_SR17_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR17_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 16 : Subregion 16 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR16_Pos (16UL) /*!< Position of SR16 field. */
+#define MWU_PERREGION_SUBSTATWA_SR16_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR16_Pos) /*!< Bit mask of SR16 field. */
+#define MWU_PERREGION_SUBSTATWA_SR16_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR16_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 15 : Subregion 15 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR15_Pos (15UL) /*!< Position of SR15 field. */
+#define MWU_PERREGION_SUBSTATWA_SR15_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR15_Pos) /*!< Bit mask of SR15 field. */
+#define MWU_PERREGION_SUBSTATWA_SR15_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR15_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 14 : Subregion 14 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR14_Pos (14UL) /*!< Position of SR14 field. */
+#define MWU_PERREGION_SUBSTATWA_SR14_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR14_Pos) /*!< Bit mask of SR14 field. */
+#define MWU_PERREGION_SUBSTATWA_SR14_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR14_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 13 : Subregion 13 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR13_Pos (13UL) /*!< Position of SR13 field. */
+#define MWU_PERREGION_SUBSTATWA_SR13_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR13_Pos) /*!< Bit mask of SR13 field. */
+#define MWU_PERREGION_SUBSTATWA_SR13_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR13_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 12 : Subregion 12 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR12_Pos (12UL) /*!< Position of SR12 field. */
+#define MWU_PERREGION_SUBSTATWA_SR12_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR12_Pos) /*!< Bit mask of SR12 field. */
+#define MWU_PERREGION_SUBSTATWA_SR12_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR12_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 11 : Subregion 11 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR11_Pos (11UL) /*!< Position of SR11 field. */
+#define MWU_PERREGION_SUBSTATWA_SR11_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR11_Pos) /*!< Bit mask of SR11 field. */
+#define MWU_PERREGION_SUBSTATWA_SR11_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR11_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 10 : Subregion 10 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR10_Pos (10UL) /*!< Position of SR10 field. */
+#define MWU_PERREGION_SUBSTATWA_SR10_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR10_Pos) /*!< Bit mask of SR10 field. */
+#define MWU_PERREGION_SUBSTATWA_SR10_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR10_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 9 : Subregion 9 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR9_Pos (9UL) /*!< Position of SR9 field. */
+#define MWU_PERREGION_SUBSTATWA_SR9_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR9_Pos) /*!< Bit mask of SR9 field. */
+#define MWU_PERREGION_SUBSTATWA_SR9_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR9_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 8 : Subregion 8 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR8_Pos (8UL) /*!< Position of SR8 field. */
+#define MWU_PERREGION_SUBSTATWA_SR8_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR8_Pos) /*!< Bit mask of SR8 field. */
+#define MWU_PERREGION_SUBSTATWA_SR8_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR8_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 7 : Subregion 7 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR7_Pos (7UL) /*!< Position of SR7 field. */
+#define MWU_PERREGION_SUBSTATWA_SR7_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR7_Pos) /*!< Bit mask of SR7 field. */
+#define MWU_PERREGION_SUBSTATWA_SR7_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR7_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 6 : Subregion 6 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR6_Pos (6UL) /*!< Position of SR6 field. */
+#define MWU_PERREGION_SUBSTATWA_SR6_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR6_Pos) /*!< Bit mask of SR6 field. */
+#define MWU_PERREGION_SUBSTATWA_SR6_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR6_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 5 : Subregion 5 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR5_Pos (5UL) /*!< Position of SR5 field. */
+#define MWU_PERREGION_SUBSTATWA_SR5_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR5_Pos) /*!< Bit mask of SR5 field. */
+#define MWU_PERREGION_SUBSTATWA_SR5_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR5_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 4 : Subregion 4 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR4_Pos (4UL) /*!< Position of SR4 field. */
+#define MWU_PERREGION_SUBSTATWA_SR4_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR4_Pos) /*!< Bit mask of SR4 field. */
+#define MWU_PERREGION_SUBSTATWA_SR4_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR4_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 3 : Subregion 3 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR3_Pos (3UL) /*!< Position of SR3 field. */
+#define MWU_PERREGION_SUBSTATWA_SR3_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR3_Pos) /*!< Bit mask of SR3 field. */
+#define MWU_PERREGION_SUBSTATWA_SR3_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR3_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 2 : Subregion 2 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR2_Pos (2UL) /*!< Position of SR2 field. */
+#define MWU_PERREGION_SUBSTATWA_SR2_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR2_Pos) /*!< Bit mask of SR2 field. */
+#define MWU_PERREGION_SUBSTATWA_SR2_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR2_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 1 : Subregion 1 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR1_Pos (1UL) /*!< Position of SR1 field. */
+#define MWU_PERREGION_SUBSTATWA_SR1_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR1_Pos) /*!< Bit mask of SR1 field. */
+#define MWU_PERREGION_SUBSTATWA_SR1_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR1_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Bit 0 : Subregion 0 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATWA_SR0_Pos (0UL) /*!< Position of SR0 field. */
+#define MWU_PERREGION_SUBSTATWA_SR0_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR0_Pos) /*!< Bit mask of SR0 field. */
+#define MWU_PERREGION_SUBSTATWA_SR0_NoAccess (0UL) /*!< No write access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATWA_SR0_Access (1UL) /*!< Write access(es) occurred in this subregion */
+
+/* Register: MWU_PERREGION_SUBSTATRA */
+/* Description: Description cluster: Source of event/interrupt in region n, read access detected while corresponding subregion was enabled for watching */
+
+/* Bit 31 : Subregion 31 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR31_Pos (31UL) /*!< Position of SR31 field. */
+#define MWU_PERREGION_SUBSTATRA_SR31_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR31_Pos) /*!< Bit mask of SR31 field. */
+#define MWU_PERREGION_SUBSTATRA_SR31_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR31_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 30 : Subregion 30 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR30_Pos (30UL) /*!< Position of SR30 field. */
+#define MWU_PERREGION_SUBSTATRA_SR30_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR30_Pos) /*!< Bit mask of SR30 field. */
+#define MWU_PERREGION_SUBSTATRA_SR30_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR30_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 29 : Subregion 29 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR29_Pos (29UL) /*!< Position of SR29 field. */
+#define MWU_PERREGION_SUBSTATRA_SR29_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR29_Pos) /*!< Bit mask of SR29 field. */
+#define MWU_PERREGION_SUBSTATRA_SR29_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR29_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 28 : Subregion 28 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR28_Pos (28UL) /*!< Position of SR28 field. */
+#define MWU_PERREGION_SUBSTATRA_SR28_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR28_Pos) /*!< Bit mask of SR28 field. */
+#define MWU_PERREGION_SUBSTATRA_SR28_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR28_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 27 : Subregion 27 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR27_Pos (27UL) /*!< Position of SR27 field. */
+#define MWU_PERREGION_SUBSTATRA_SR27_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR27_Pos) /*!< Bit mask of SR27 field. */
+#define MWU_PERREGION_SUBSTATRA_SR27_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR27_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 26 : Subregion 26 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR26_Pos (26UL) /*!< Position of SR26 field. */
+#define MWU_PERREGION_SUBSTATRA_SR26_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR26_Pos) /*!< Bit mask of SR26 field. */
+#define MWU_PERREGION_SUBSTATRA_SR26_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR26_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 25 : Subregion 25 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR25_Pos (25UL) /*!< Position of SR25 field. */
+#define MWU_PERREGION_SUBSTATRA_SR25_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR25_Pos) /*!< Bit mask of SR25 field. */
+#define MWU_PERREGION_SUBSTATRA_SR25_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR25_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 24 : Subregion 24 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR24_Pos (24UL) /*!< Position of SR24 field. */
+#define MWU_PERREGION_SUBSTATRA_SR24_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR24_Pos) /*!< Bit mask of SR24 field. */
+#define MWU_PERREGION_SUBSTATRA_SR24_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR24_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 23 : Subregion 23 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR23_Pos (23UL) /*!< Position of SR23 field. */
+#define MWU_PERREGION_SUBSTATRA_SR23_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR23_Pos) /*!< Bit mask of SR23 field. */
+#define MWU_PERREGION_SUBSTATRA_SR23_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR23_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 22 : Subregion 22 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR22_Pos (22UL) /*!< Position of SR22 field. */
+#define MWU_PERREGION_SUBSTATRA_SR22_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR22_Pos) /*!< Bit mask of SR22 field. */
+#define MWU_PERREGION_SUBSTATRA_SR22_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR22_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 21 : Subregion 21 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR21_Pos (21UL) /*!< Position of SR21 field. */
+#define MWU_PERREGION_SUBSTATRA_SR21_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR21_Pos) /*!< Bit mask of SR21 field. */
+#define MWU_PERREGION_SUBSTATRA_SR21_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR21_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 20 : Subregion 20 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR20_Pos (20UL) /*!< Position of SR20 field. */
+#define MWU_PERREGION_SUBSTATRA_SR20_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR20_Pos) /*!< Bit mask of SR20 field. */
+#define MWU_PERREGION_SUBSTATRA_SR20_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR20_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 19 : Subregion 19 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR19_Pos (19UL) /*!< Position of SR19 field. */
+#define MWU_PERREGION_SUBSTATRA_SR19_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR19_Pos) /*!< Bit mask of SR19 field. */
+#define MWU_PERREGION_SUBSTATRA_SR19_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR19_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 18 : Subregion 18 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR18_Pos (18UL) /*!< Position of SR18 field. */
+#define MWU_PERREGION_SUBSTATRA_SR18_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR18_Pos) /*!< Bit mask of SR18 field. */
+#define MWU_PERREGION_SUBSTATRA_SR18_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR18_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 17 : Subregion 17 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR17_Pos (17UL) /*!< Position of SR17 field. */
+#define MWU_PERREGION_SUBSTATRA_SR17_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR17_Pos) /*!< Bit mask of SR17 field. */
+#define MWU_PERREGION_SUBSTATRA_SR17_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR17_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 16 : Subregion 16 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR16_Pos (16UL) /*!< Position of SR16 field. */
+#define MWU_PERREGION_SUBSTATRA_SR16_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR16_Pos) /*!< Bit mask of SR16 field. */
+#define MWU_PERREGION_SUBSTATRA_SR16_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR16_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 15 : Subregion 15 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR15_Pos (15UL) /*!< Position of SR15 field. */
+#define MWU_PERREGION_SUBSTATRA_SR15_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR15_Pos) /*!< Bit mask of SR15 field. */
+#define MWU_PERREGION_SUBSTATRA_SR15_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR15_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 14 : Subregion 14 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR14_Pos (14UL) /*!< Position of SR14 field. */
+#define MWU_PERREGION_SUBSTATRA_SR14_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR14_Pos) /*!< Bit mask of SR14 field. */
+#define MWU_PERREGION_SUBSTATRA_SR14_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR14_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 13 : Subregion 13 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR13_Pos (13UL) /*!< Position of SR13 field. */
+#define MWU_PERREGION_SUBSTATRA_SR13_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR13_Pos) /*!< Bit mask of SR13 field. */
+#define MWU_PERREGION_SUBSTATRA_SR13_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR13_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 12 : Subregion 12 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR12_Pos (12UL) /*!< Position of SR12 field. */
+#define MWU_PERREGION_SUBSTATRA_SR12_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR12_Pos) /*!< Bit mask of SR12 field. */
+#define MWU_PERREGION_SUBSTATRA_SR12_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR12_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 11 : Subregion 11 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR11_Pos (11UL) /*!< Position of SR11 field. */
+#define MWU_PERREGION_SUBSTATRA_SR11_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR11_Pos) /*!< Bit mask of SR11 field. */
+#define MWU_PERREGION_SUBSTATRA_SR11_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR11_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 10 : Subregion 10 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR10_Pos (10UL) /*!< Position of SR10 field. */
+#define MWU_PERREGION_SUBSTATRA_SR10_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR10_Pos) /*!< Bit mask of SR10 field. */
+#define MWU_PERREGION_SUBSTATRA_SR10_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR10_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 9 : Subregion 9 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR9_Pos (9UL) /*!< Position of SR9 field. */
+#define MWU_PERREGION_SUBSTATRA_SR9_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR9_Pos) /*!< Bit mask of SR9 field. */
+#define MWU_PERREGION_SUBSTATRA_SR9_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR9_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 8 : Subregion 8 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR8_Pos (8UL) /*!< Position of SR8 field. */
+#define MWU_PERREGION_SUBSTATRA_SR8_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR8_Pos) /*!< Bit mask of SR8 field. */
+#define MWU_PERREGION_SUBSTATRA_SR8_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR8_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 7 : Subregion 7 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR7_Pos (7UL) /*!< Position of SR7 field. */
+#define MWU_PERREGION_SUBSTATRA_SR7_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR7_Pos) /*!< Bit mask of SR7 field. */
+#define MWU_PERREGION_SUBSTATRA_SR7_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR7_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 6 : Subregion 6 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR6_Pos (6UL) /*!< Position of SR6 field. */
+#define MWU_PERREGION_SUBSTATRA_SR6_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR6_Pos) /*!< Bit mask of SR6 field. */
+#define MWU_PERREGION_SUBSTATRA_SR6_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR6_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 5 : Subregion 5 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR5_Pos (5UL) /*!< Position of SR5 field. */
+#define MWU_PERREGION_SUBSTATRA_SR5_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR5_Pos) /*!< Bit mask of SR5 field. */
+#define MWU_PERREGION_SUBSTATRA_SR5_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR5_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 4 : Subregion 4 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR4_Pos (4UL) /*!< Position of SR4 field. */
+#define MWU_PERREGION_SUBSTATRA_SR4_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR4_Pos) /*!< Bit mask of SR4 field. */
+#define MWU_PERREGION_SUBSTATRA_SR4_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR4_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 3 : Subregion 3 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR3_Pos (3UL) /*!< Position of SR3 field. */
+#define MWU_PERREGION_SUBSTATRA_SR3_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR3_Pos) /*!< Bit mask of SR3 field. */
+#define MWU_PERREGION_SUBSTATRA_SR3_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR3_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 2 : Subregion 2 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR2_Pos (2UL) /*!< Position of SR2 field. */
+#define MWU_PERREGION_SUBSTATRA_SR2_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR2_Pos) /*!< Bit mask of SR2 field. */
+#define MWU_PERREGION_SUBSTATRA_SR2_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR2_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 1 : Subregion 1 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR1_Pos (1UL) /*!< Position of SR1 field. */
+#define MWU_PERREGION_SUBSTATRA_SR1_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR1_Pos) /*!< Bit mask of SR1 field. */
+#define MWU_PERREGION_SUBSTATRA_SR1_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR1_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Bit 0 : Subregion 0 in region n (write '1' to clear) */
+#define MWU_PERREGION_SUBSTATRA_SR0_Pos (0UL) /*!< Position of SR0 field. */
+#define MWU_PERREGION_SUBSTATRA_SR0_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR0_Pos) /*!< Bit mask of SR0 field. */
+#define MWU_PERREGION_SUBSTATRA_SR0_NoAccess (0UL) /*!< No read access occurred in this subregion */
+#define MWU_PERREGION_SUBSTATRA_SR0_Access (1UL) /*!< Read access(es) occurred in this subregion */
+
+/* Register: MWU_REGIONEN */
+/* Description: Enable/disable regions watch */
+
+/* Bit 27 : Enable/disable read access watch in PREGION[1] */
+#define MWU_REGIONEN_PRGN1RA_Pos (27UL) /*!< Position of PRGN1RA field. */
+#define MWU_REGIONEN_PRGN1RA_Msk (0x1UL << MWU_REGIONEN_PRGN1RA_Pos) /*!< Bit mask of PRGN1RA field. */
+#define MWU_REGIONEN_PRGN1RA_Disable (0UL) /*!< Disable read access watch in this PREGION */
+#define MWU_REGIONEN_PRGN1RA_Enable (1UL) /*!< Enable read access watch in this PREGION */
+
+/* Bit 26 : Enable/disable write access watch in PREGION[1] */
+#define MWU_REGIONEN_PRGN1WA_Pos (26UL) /*!< Position of PRGN1WA field. */
+#define MWU_REGIONEN_PRGN1WA_Msk (0x1UL << MWU_REGIONEN_PRGN1WA_Pos) /*!< Bit mask of PRGN1WA field. */
+#define MWU_REGIONEN_PRGN1WA_Disable (0UL) /*!< Disable write access watch in this PREGION */
+#define MWU_REGIONEN_PRGN1WA_Enable (1UL) /*!< Enable write access watch in this PREGION */
+
+/* Bit 25 : Enable/disable read access watch in PREGION[0] */
+#define MWU_REGIONEN_PRGN0RA_Pos (25UL) /*!< Position of PRGN0RA field. */
+#define MWU_REGIONEN_PRGN0RA_Msk (0x1UL << MWU_REGIONEN_PRGN0RA_Pos) /*!< Bit mask of PRGN0RA field. */
+#define MWU_REGIONEN_PRGN0RA_Disable (0UL) /*!< Disable read access watch in this PREGION */
+#define MWU_REGIONEN_PRGN0RA_Enable (1UL) /*!< Enable read access watch in this PREGION */
+
+/* Bit 24 : Enable/disable write access watch in PREGION[0] */
+#define MWU_REGIONEN_PRGN0WA_Pos (24UL) /*!< Position of PRGN0WA field. */
+#define MWU_REGIONEN_PRGN0WA_Msk (0x1UL << MWU_REGIONEN_PRGN0WA_Pos) /*!< Bit mask of PRGN0WA field. */
+#define MWU_REGIONEN_PRGN0WA_Disable (0UL) /*!< Disable write access watch in this PREGION */
+#define MWU_REGIONEN_PRGN0WA_Enable (1UL) /*!< Enable write access watch in this PREGION */
+
+/* Bit 7 : Enable/disable read access watch in region[3] */
+#define MWU_REGIONEN_RGN3RA_Pos (7UL) /*!< Position of RGN3RA field. */
+#define MWU_REGIONEN_RGN3RA_Msk (0x1UL << MWU_REGIONEN_RGN3RA_Pos) /*!< Bit mask of RGN3RA field. */
+#define MWU_REGIONEN_RGN3RA_Disable (0UL) /*!< Disable read access watch in this region */
+#define MWU_REGIONEN_RGN3RA_Enable (1UL) /*!< Enable read access watch in this region */
+
+/* Bit 6 : Enable/disable write access watch in region[3] */
+#define MWU_REGIONEN_RGN3WA_Pos (6UL) /*!< Position of RGN3WA field. */
+#define MWU_REGIONEN_RGN3WA_Msk (0x1UL << MWU_REGIONEN_RGN3WA_Pos) /*!< Bit mask of RGN3WA field. */
+#define MWU_REGIONEN_RGN3WA_Disable (0UL) /*!< Disable write access watch in this region */
+#define MWU_REGIONEN_RGN3WA_Enable (1UL) /*!< Enable write access watch in this region */
+
+/* Bit 5 : Enable/disable read access watch in region[2] */
+#define MWU_REGIONEN_RGN2RA_Pos (5UL) /*!< Position of RGN2RA field. */
+#define MWU_REGIONEN_RGN2RA_Msk (0x1UL << MWU_REGIONEN_RGN2RA_Pos) /*!< Bit mask of RGN2RA field. */
+#define MWU_REGIONEN_RGN2RA_Disable (0UL) /*!< Disable read access watch in this region */
+#define MWU_REGIONEN_RGN2RA_Enable (1UL) /*!< Enable read access watch in this region */
+
+/* Bit 4 : Enable/disable write access watch in region[2] */
+#define MWU_REGIONEN_RGN2WA_Pos (4UL) /*!< Position of RGN2WA field. */
+#define MWU_REGIONEN_RGN2WA_Msk (0x1UL << MWU_REGIONEN_RGN2WA_Pos) /*!< Bit mask of RGN2WA field. */
+#define MWU_REGIONEN_RGN2WA_Disable (0UL) /*!< Disable write access watch in this region */
+#define MWU_REGIONEN_RGN2WA_Enable (1UL) /*!< Enable write access watch in this region */
+
+/* Bit 3 : Enable/disable read access watch in region[1] */
+#define MWU_REGIONEN_RGN1RA_Pos (3UL) /*!< Position of RGN1RA field. */
+#define MWU_REGIONEN_RGN1RA_Msk (0x1UL << MWU_REGIONEN_RGN1RA_Pos) /*!< Bit mask of RGN1RA field. */
+#define MWU_REGIONEN_RGN1RA_Disable (0UL) /*!< Disable read access watch in this region */
+#define MWU_REGIONEN_RGN1RA_Enable (1UL) /*!< Enable read access watch in this region */
+
+/* Bit 2 : Enable/disable write access watch in region[1] */
+#define MWU_REGIONEN_RGN1WA_Pos (2UL) /*!< Position of RGN1WA field. */
+#define MWU_REGIONEN_RGN1WA_Msk (0x1UL << MWU_REGIONEN_RGN1WA_Pos) /*!< Bit mask of RGN1WA field. */
+#define MWU_REGIONEN_RGN1WA_Disable (0UL) /*!< Disable write access watch in this region */
+#define MWU_REGIONEN_RGN1WA_Enable (1UL) /*!< Enable write access watch in this region */
+
+/* Bit 1 : Enable/disable read access watch in region[0] */
+#define MWU_REGIONEN_RGN0RA_Pos (1UL) /*!< Position of RGN0RA field. */
+#define MWU_REGIONEN_RGN0RA_Msk (0x1UL << MWU_REGIONEN_RGN0RA_Pos) /*!< Bit mask of RGN0RA field. */
+#define MWU_REGIONEN_RGN0RA_Disable (0UL) /*!< Disable read access watch in this region */
+#define MWU_REGIONEN_RGN0RA_Enable (1UL) /*!< Enable read access watch in this region */
+
+/* Bit 0 : Enable/disable write access watch in region[0] */
+#define MWU_REGIONEN_RGN0WA_Pos (0UL) /*!< Position of RGN0WA field. */
+#define MWU_REGIONEN_RGN0WA_Msk (0x1UL << MWU_REGIONEN_RGN0WA_Pos) /*!< Bit mask of RGN0WA field. */
+#define MWU_REGIONEN_RGN0WA_Disable (0UL) /*!< Disable write access watch in this region */
+#define MWU_REGIONEN_RGN0WA_Enable (1UL) /*!< Enable write access watch in this region */
+
+/* Register: MWU_REGIONENSET */
+/* Description: Enable regions watch */
+
+/* Bit 27 : Enable read access watch in PREGION[1] */
+#define MWU_REGIONENSET_PRGN1RA_Pos (27UL) /*!< Position of PRGN1RA field. */
+#define MWU_REGIONENSET_PRGN1RA_Msk (0x1UL << MWU_REGIONENSET_PRGN1RA_Pos) /*!< Bit mask of PRGN1RA field. */
+#define MWU_REGIONENSET_PRGN1RA_Disabled (0UL) /*!< Read access watch in this PREGION is disabled */
+#define MWU_REGIONENSET_PRGN1RA_Enabled (1UL) /*!< Read access watch in this PREGION is enabled */
+#define MWU_REGIONENSET_PRGN1RA_Set (1UL) /*!< Enable read access watch in this PREGION */
+
+/* Bit 26 : Enable write access watch in PREGION[1] */
+#define MWU_REGIONENSET_PRGN1WA_Pos (26UL) /*!< Position of PRGN1WA field. */
+#define MWU_REGIONENSET_PRGN1WA_Msk (0x1UL << MWU_REGIONENSET_PRGN1WA_Pos) /*!< Bit mask of PRGN1WA field. */
+#define MWU_REGIONENSET_PRGN1WA_Disabled (0UL) /*!< Write access watch in this PREGION is disabled */
+#define MWU_REGIONENSET_PRGN1WA_Enabled (1UL) /*!< Write access watch in this PREGION is enabled */
+#define MWU_REGIONENSET_PRGN1WA_Set (1UL) /*!< Enable write access watch in this PREGION */
+
+/* Bit 25 : Enable read access watch in PREGION[0] */
+#define MWU_REGIONENSET_PRGN0RA_Pos (25UL) /*!< Position of PRGN0RA field. */
+#define MWU_REGIONENSET_PRGN0RA_Msk (0x1UL << MWU_REGIONENSET_PRGN0RA_Pos) /*!< Bit mask of PRGN0RA field. */
+#define MWU_REGIONENSET_PRGN0RA_Disabled (0UL) /*!< Read access watch in this PREGION is disabled */
+#define MWU_REGIONENSET_PRGN0RA_Enabled (1UL) /*!< Read access watch in this PREGION is enabled */
+#define MWU_REGIONENSET_PRGN0RA_Set (1UL) /*!< Enable read access watch in this PREGION */
+
+/* Bit 24 : Enable write access watch in PREGION[0] */
+#define MWU_REGIONENSET_PRGN0WA_Pos (24UL) /*!< Position of PRGN0WA field. */
+#define MWU_REGIONENSET_PRGN0WA_Msk (0x1UL << MWU_REGIONENSET_PRGN0WA_Pos) /*!< Bit mask of PRGN0WA field. */
+#define MWU_REGIONENSET_PRGN0WA_Disabled (0UL) /*!< Write access watch in this PREGION is disabled */
+#define MWU_REGIONENSET_PRGN0WA_Enabled (1UL) /*!< Write access watch in this PREGION is enabled */
+#define MWU_REGIONENSET_PRGN0WA_Set (1UL) /*!< Enable write access watch in this PREGION */
+
+/* Bit 7 : Enable read access watch in region[3] */
+#define MWU_REGIONENSET_RGN3RA_Pos (7UL) /*!< Position of RGN3RA field. */
+#define MWU_REGIONENSET_RGN3RA_Msk (0x1UL << MWU_REGIONENSET_RGN3RA_Pos) /*!< Bit mask of RGN3RA field. */
+#define MWU_REGIONENSET_RGN3RA_Disabled (0UL) /*!< Read access watch in this region is disabled */
+#define MWU_REGIONENSET_RGN3RA_Enabled (1UL) /*!< Read access watch in this region is enabled */
+#define MWU_REGIONENSET_RGN3RA_Set (1UL) /*!< Enable read access watch in this region */
+
+/* Bit 6 : Enable write access watch in region[3] */
+#define MWU_REGIONENSET_RGN3WA_Pos (6UL) /*!< Position of RGN3WA field. */
+#define MWU_REGIONENSET_RGN3WA_Msk (0x1UL << MWU_REGIONENSET_RGN3WA_Pos) /*!< Bit mask of RGN3WA field. */
+#define MWU_REGIONENSET_RGN3WA_Disabled (0UL) /*!< Write access watch in this region is disabled */
+#define MWU_REGIONENSET_RGN3WA_Enabled (1UL) /*!< Write access watch in this region is enabled */
+#define MWU_REGIONENSET_RGN3WA_Set (1UL) /*!< Enable write access watch in this region */
+
+/* Bit 5 : Enable read access watch in region[2] */
+#define MWU_REGIONENSET_RGN2RA_Pos (5UL) /*!< Position of RGN2RA field. */
+#define MWU_REGIONENSET_RGN2RA_Msk (0x1UL << MWU_REGIONENSET_RGN2RA_Pos) /*!< Bit mask of RGN2RA field. */
+#define MWU_REGIONENSET_RGN2RA_Disabled (0UL) /*!< Read access watch in this region is disabled */
+#define MWU_REGIONENSET_RGN2RA_Enabled (1UL) /*!< Read access watch in this region is enabled */
+#define MWU_REGIONENSET_RGN2RA_Set (1UL) /*!< Enable read access watch in this region */
+
+/* Bit 4 : Enable write access watch in region[2] */
+#define MWU_REGIONENSET_RGN2WA_Pos (4UL) /*!< Position of RGN2WA field. */
+#define MWU_REGIONENSET_RGN2WA_Msk (0x1UL << MWU_REGIONENSET_RGN2WA_Pos) /*!< Bit mask of RGN2WA field. */
+#define MWU_REGIONENSET_RGN2WA_Disabled (0UL) /*!< Write access watch in this region is disabled */
+#define MWU_REGIONENSET_RGN2WA_Enabled (1UL) /*!< Write access watch in this region is enabled */
+#define MWU_REGIONENSET_RGN2WA_Set (1UL) /*!< Enable write access watch in this region */
+
+/* Bit 3 : Enable read access watch in region[1] */
+#define MWU_REGIONENSET_RGN1RA_Pos (3UL) /*!< Position of RGN1RA field. */
+#define MWU_REGIONENSET_RGN1RA_Msk (0x1UL << MWU_REGIONENSET_RGN1RA_Pos) /*!< Bit mask of RGN1RA field. */
+#define MWU_REGIONENSET_RGN1RA_Disabled (0UL) /*!< Read access watch in this region is disabled */
+#define MWU_REGIONENSET_RGN1RA_Enabled (1UL) /*!< Read access watch in this region is enabled */
+#define MWU_REGIONENSET_RGN1RA_Set (1UL) /*!< Enable read access watch in this region */
+
+/* Bit 2 : Enable write access watch in region[1] */
+#define MWU_REGIONENSET_RGN1WA_Pos (2UL) /*!< Position of RGN1WA field. */
+#define MWU_REGIONENSET_RGN1WA_Msk (0x1UL << MWU_REGIONENSET_RGN1WA_Pos) /*!< Bit mask of RGN1WA field. */
+#define MWU_REGIONENSET_RGN1WA_Disabled (0UL) /*!< Write access watch in this region is disabled */
+#define MWU_REGIONENSET_RGN1WA_Enabled (1UL) /*!< Write access watch in this region is enabled */
+#define MWU_REGIONENSET_RGN1WA_Set (1UL) /*!< Enable write access watch in this region */
+
+/* Bit 1 : Enable read access watch in region[0] */
+#define MWU_REGIONENSET_RGN0RA_Pos (1UL) /*!< Position of RGN0RA field. */
+#define MWU_REGIONENSET_RGN0RA_Msk (0x1UL << MWU_REGIONENSET_RGN0RA_Pos) /*!< Bit mask of RGN0RA field. */
+#define MWU_REGIONENSET_RGN0RA_Disabled (0UL) /*!< Read access watch in this region is disabled */
+#define MWU_REGIONENSET_RGN0RA_Enabled (1UL) /*!< Read access watch in this region is enabled */
+#define MWU_REGIONENSET_RGN0RA_Set (1UL) /*!< Enable read access watch in this region */
+
+/* Bit 0 : Enable write access watch in region[0] */
+#define MWU_REGIONENSET_RGN0WA_Pos (0UL) /*!< Position of RGN0WA field. */
+#define MWU_REGIONENSET_RGN0WA_Msk (0x1UL << MWU_REGIONENSET_RGN0WA_Pos) /*!< Bit mask of RGN0WA field. */
+#define MWU_REGIONENSET_RGN0WA_Disabled (0UL) /*!< Write access watch in this region is disabled */
+#define MWU_REGIONENSET_RGN0WA_Enabled (1UL) /*!< Write access watch in this region is enabled */
+#define MWU_REGIONENSET_RGN0WA_Set (1UL) /*!< Enable write access watch in this region */
+
+/* Register: MWU_REGIONENCLR */
+/* Description: Disable regions watch */
+
+/* Bit 27 : Disable read access watch in PREGION[1] */
+#define MWU_REGIONENCLR_PRGN1RA_Pos (27UL) /*!< Position of PRGN1RA field. */
+#define MWU_REGIONENCLR_PRGN1RA_Msk (0x1UL << MWU_REGIONENCLR_PRGN1RA_Pos) /*!< Bit mask of PRGN1RA field. */
+#define MWU_REGIONENCLR_PRGN1RA_Disabled (0UL) /*!< Read access watch in this PREGION is disabled */
+#define MWU_REGIONENCLR_PRGN1RA_Enabled (1UL) /*!< Read access watch in this PREGION is enabled */
+#define MWU_REGIONENCLR_PRGN1RA_Clear (1UL) /*!< Disable read access watch in this PREGION */
+
+/* Bit 26 : Disable write access watch in PREGION[1] */
+#define MWU_REGIONENCLR_PRGN1WA_Pos (26UL) /*!< Position of PRGN1WA field. */
+#define MWU_REGIONENCLR_PRGN1WA_Msk (0x1UL << MWU_REGIONENCLR_PRGN1WA_Pos) /*!< Bit mask of PRGN1WA field. */
+#define MWU_REGIONENCLR_PRGN1WA_Disabled (0UL) /*!< Write access watch in this PREGION is disabled */
+#define MWU_REGIONENCLR_PRGN1WA_Enabled (1UL) /*!< Write access watch in this PREGION is enabled */
+#define MWU_REGIONENCLR_PRGN1WA_Clear (1UL) /*!< Disable write access watch in this PREGION */
+
+/* Bit 25 : Disable read access watch in PREGION[0] */
+#define MWU_REGIONENCLR_PRGN0RA_Pos (25UL) /*!< Position of PRGN0RA field. */
+#define MWU_REGIONENCLR_PRGN0RA_Msk (0x1UL << MWU_REGIONENCLR_PRGN0RA_Pos) /*!< Bit mask of PRGN0RA field. */
+#define MWU_REGIONENCLR_PRGN0RA_Disabled (0UL) /*!< Read access watch in this PREGION is disabled */
+#define MWU_REGIONENCLR_PRGN0RA_Enabled (1UL) /*!< Read access watch in this PREGION is enabled */
+#define MWU_REGIONENCLR_PRGN0RA_Clear (1UL) /*!< Disable read access watch in this PREGION */
+
+/* Bit 24 : Disable write access watch in PREGION[0] */
+#define MWU_REGIONENCLR_PRGN0WA_Pos (24UL) /*!< Position of PRGN0WA field. */
+#define MWU_REGIONENCLR_PRGN0WA_Msk (0x1UL << MWU_REGIONENCLR_PRGN0WA_Pos) /*!< Bit mask of PRGN0WA field. */
+#define MWU_REGIONENCLR_PRGN0WA_Disabled (0UL) /*!< Write access watch in this PREGION is disabled */
+#define MWU_REGIONENCLR_PRGN0WA_Enabled (1UL) /*!< Write access watch in this PREGION is enabled */
+#define MWU_REGIONENCLR_PRGN0WA_Clear (1UL) /*!< Disable write access watch in this PREGION */
+
+/* Bit 7 : Disable read access watch in region[3] */
+#define MWU_REGIONENCLR_RGN3RA_Pos (7UL) /*!< Position of RGN3RA field. */
+#define MWU_REGIONENCLR_RGN3RA_Msk (0x1UL << MWU_REGIONENCLR_RGN3RA_Pos) /*!< Bit mask of RGN3RA field. */
+#define MWU_REGIONENCLR_RGN3RA_Disabled (0UL) /*!< Read access watch in this region is disabled */
+#define MWU_REGIONENCLR_RGN3RA_Enabled (1UL) /*!< Read access watch in this region is enabled */
+#define MWU_REGIONENCLR_RGN3RA_Clear (1UL) /*!< Disable read access watch in this region */
+
+/* Bit 6 : Disable write access watch in region[3] */
+#define MWU_REGIONENCLR_RGN3WA_Pos (6UL) /*!< Position of RGN3WA field. */
+#define MWU_REGIONENCLR_RGN3WA_Msk (0x1UL << MWU_REGIONENCLR_RGN3WA_Pos) /*!< Bit mask of RGN3WA field. */
+#define MWU_REGIONENCLR_RGN3WA_Disabled (0UL) /*!< Write access watch in this region is disabled */
+#define MWU_REGIONENCLR_RGN3WA_Enabled (1UL) /*!< Write access watch in this region is enabled */
+#define MWU_REGIONENCLR_RGN3WA_Clear (1UL) /*!< Disable write access watch in this region */
+
+/* Bit 5 : Disable read access watch in region[2] */
+#define MWU_REGIONENCLR_RGN2RA_Pos (5UL) /*!< Position of RGN2RA field. */
+#define MWU_REGIONENCLR_RGN2RA_Msk (0x1UL << MWU_REGIONENCLR_RGN2RA_Pos) /*!< Bit mask of RGN2RA field. */
+#define MWU_REGIONENCLR_RGN2RA_Disabled (0UL) /*!< Read access watch in this region is disabled */
+#define MWU_REGIONENCLR_RGN2RA_Enabled (1UL) /*!< Read access watch in this region is enabled */
+#define MWU_REGIONENCLR_RGN2RA_Clear (1UL) /*!< Disable read access watch in this region */
+
+/* Bit 4 : Disable write access watch in region[2] */
+#define MWU_REGIONENCLR_RGN2WA_Pos (4UL) /*!< Position of RGN2WA field. */
+#define MWU_REGIONENCLR_RGN2WA_Msk (0x1UL << MWU_REGIONENCLR_RGN2WA_Pos) /*!< Bit mask of RGN2WA field. */
+#define MWU_REGIONENCLR_RGN2WA_Disabled (0UL) /*!< Write access watch in this region is disabled */
+#define MWU_REGIONENCLR_RGN2WA_Enabled (1UL) /*!< Write access watch in this region is enabled */
+#define MWU_REGIONENCLR_RGN2WA_Clear (1UL) /*!< Disable write access watch in this region */
+
+/* Bit 3 : Disable read access watch in region[1] */
+#define MWU_REGIONENCLR_RGN1RA_Pos (3UL) /*!< Position of RGN1RA field. */
+#define MWU_REGIONENCLR_RGN1RA_Msk (0x1UL << MWU_REGIONENCLR_RGN1RA_Pos) /*!< Bit mask of RGN1RA field. */
+#define MWU_REGIONENCLR_RGN1RA_Disabled (0UL) /*!< Read access watch in this region is disabled */
+#define MWU_REGIONENCLR_RGN1RA_Enabled (1UL) /*!< Read access watch in this region is enabled */
+#define MWU_REGIONENCLR_RGN1RA_Clear (1UL) /*!< Disable read access watch in this region */
+
+/* Bit 2 : Disable write access watch in region[1] */
+#define MWU_REGIONENCLR_RGN1WA_Pos (2UL) /*!< Position of RGN1WA field. */
+#define MWU_REGIONENCLR_RGN1WA_Msk (0x1UL << MWU_REGIONENCLR_RGN1WA_Pos) /*!< Bit mask of RGN1WA field. */
+#define MWU_REGIONENCLR_RGN1WA_Disabled (0UL) /*!< Write access watch in this region is disabled */
+#define MWU_REGIONENCLR_RGN1WA_Enabled (1UL) /*!< Write access watch in this region is enabled */
+#define MWU_REGIONENCLR_RGN1WA_Clear (1UL) /*!< Disable write access watch in this region */
+
+/* Bit 1 : Disable read access watch in region[0] */
+#define MWU_REGIONENCLR_RGN0RA_Pos (1UL) /*!< Position of RGN0RA field. */
+#define MWU_REGIONENCLR_RGN0RA_Msk (0x1UL << MWU_REGIONENCLR_RGN0RA_Pos) /*!< Bit mask of RGN0RA field. */
+#define MWU_REGIONENCLR_RGN0RA_Disabled (0UL) /*!< Read access watch in this region is disabled */
+#define MWU_REGIONENCLR_RGN0RA_Enabled (1UL) /*!< Read access watch in this region is enabled */
+#define MWU_REGIONENCLR_RGN0RA_Clear (1UL) /*!< Disable read access watch in this region */
+
+/* Bit 0 : Disable write access watch in region[0] */
+#define MWU_REGIONENCLR_RGN0WA_Pos (0UL) /*!< Position of RGN0WA field. */
+#define MWU_REGIONENCLR_RGN0WA_Msk (0x1UL << MWU_REGIONENCLR_RGN0WA_Pos) /*!< Bit mask of RGN0WA field. */
+#define MWU_REGIONENCLR_RGN0WA_Disabled (0UL) /*!< Write access watch in this region is disabled */
+#define MWU_REGIONENCLR_RGN0WA_Enabled (1UL) /*!< Write access watch in this region is enabled */
+#define MWU_REGIONENCLR_RGN0WA_Clear (1UL) /*!< Disable write access watch in this region */
+
+/* Register: MWU_REGION_START */
+/* Description: Description cluster: Start address for region n */
+
+/* Bits 31..0 : Start address for region */
+#define MWU_REGION_START_START_Pos (0UL) /*!< Position of START field. */
+#define MWU_REGION_START_START_Msk (0xFFFFFFFFUL << MWU_REGION_START_START_Pos) /*!< Bit mask of START field. */
+
+/* Register: MWU_REGION_END */
+/* Description: Description cluster: End address of region n */
+
+/* Bits 31..0 : End address of region. */
+#define MWU_REGION_END_END_Pos (0UL) /*!< Position of END field. */
+#define MWU_REGION_END_END_Msk (0xFFFFFFFFUL << MWU_REGION_END_END_Pos) /*!< Bit mask of END field. */
+
+/* Register: MWU_PREGION_START */
+/* Description: Description cluster: Reserved for future use */
+
+/* Bits 31..0 : Reserved for future use */
+#define MWU_PREGION_START_START_Pos (0UL) /*!< Position of START field. */
+#define MWU_PREGION_START_START_Msk (0xFFFFFFFFUL << MWU_PREGION_START_START_Pos) /*!< Bit mask of START field. */
+
+/* Register: MWU_PREGION_END */
+/* Description: Description cluster: Reserved for future use */
+
+/* Bits 31..0 : Reserved for future use */
+#define MWU_PREGION_END_END_Pos (0UL) /*!< Position of END field. */
+#define MWU_PREGION_END_END_Msk (0xFFFFFFFFUL << MWU_PREGION_END_END_Pos) /*!< Bit mask of END field. */
+
+/* Register: MWU_PREGION_SUBS */
+/* Description: Description cluster: Subregions of region n */
+
+/* Bit 31 : Include or exclude subregion 31 in region */
+#define MWU_PREGION_SUBS_SR31_Pos (31UL) /*!< Position of SR31 field. */
+#define MWU_PREGION_SUBS_SR31_Msk (0x1UL << MWU_PREGION_SUBS_SR31_Pos) /*!< Bit mask of SR31 field. */
+#define MWU_PREGION_SUBS_SR31_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR31_Include (1UL) /*!< Include */
+
+/* Bit 30 : Include or exclude subregion 30 in region */
+#define MWU_PREGION_SUBS_SR30_Pos (30UL) /*!< Position of SR30 field. */
+#define MWU_PREGION_SUBS_SR30_Msk (0x1UL << MWU_PREGION_SUBS_SR30_Pos) /*!< Bit mask of SR30 field. */
+#define MWU_PREGION_SUBS_SR30_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR30_Include (1UL) /*!< Include */
+
+/* Bit 29 : Include or exclude subregion 29 in region */
+#define MWU_PREGION_SUBS_SR29_Pos (29UL) /*!< Position of SR29 field. */
+#define MWU_PREGION_SUBS_SR29_Msk (0x1UL << MWU_PREGION_SUBS_SR29_Pos) /*!< Bit mask of SR29 field. */
+#define MWU_PREGION_SUBS_SR29_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR29_Include (1UL) /*!< Include */
+
+/* Bit 28 : Include or exclude subregion 28 in region */
+#define MWU_PREGION_SUBS_SR28_Pos (28UL) /*!< Position of SR28 field. */
+#define MWU_PREGION_SUBS_SR28_Msk (0x1UL << MWU_PREGION_SUBS_SR28_Pos) /*!< Bit mask of SR28 field. */
+#define MWU_PREGION_SUBS_SR28_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR28_Include (1UL) /*!< Include */
+
+/* Bit 27 : Include or exclude subregion 27 in region */
+#define MWU_PREGION_SUBS_SR27_Pos (27UL) /*!< Position of SR27 field. */
+#define MWU_PREGION_SUBS_SR27_Msk (0x1UL << MWU_PREGION_SUBS_SR27_Pos) /*!< Bit mask of SR27 field. */
+#define MWU_PREGION_SUBS_SR27_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR27_Include (1UL) /*!< Include */
+
+/* Bit 26 : Include or exclude subregion 26 in region */
+#define MWU_PREGION_SUBS_SR26_Pos (26UL) /*!< Position of SR26 field. */
+#define MWU_PREGION_SUBS_SR26_Msk (0x1UL << MWU_PREGION_SUBS_SR26_Pos) /*!< Bit mask of SR26 field. */
+#define MWU_PREGION_SUBS_SR26_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR26_Include (1UL) /*!< Include */
+
+/* Bit 25 : Include or exclude subregion 25 in region */
+#define MWU_PREGION_SUBS_SR25_Pos (25UL) /*!< Position of SR25 field. */
+#define MWU_PREGION_SUBS_SR25_Msk (0x1UL << MWU_PREGION_SUBS_SR25_Pos) /*!< Bit mask of SR25 field. */
+#define MWU_PREGION_SUBS_SR25_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR25_Include (1UL) /*!< Include */
+
+/* Bit 24 : Include or exclude subregion 24 in region */
+#define MWU_PREGION_SUBS_SR24_Pos (24UL) /*!< Position of SR24 field. */
+#define MWU_PREGION_SUBS_SR24_Msk (0x1UL << MWU_PREGION_SUBS_SR24_Pos) /*!< Bit mask of SR24 field. */
+#define MWU_PREGION_SUBS_SR24_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR24_Include (1UL) /*!< Include */
+
+/* Bit 23 : Include or exclude subregion 23 in region */
+#define MWU_PREGION_SUBS_SR23_Pos (23UL) /*!< Position of SR23 field. */
+#define MWU_PREGION_SUBS_SR23_Msk (0x1UL << MWU_PREGION_SUBS_SR23_Pos) /*!< Bit mask of SR23 field. */
+#define MWU_PREGION_SUBS_SR23_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR23_Include (1UL) /*!< Include */
+
+/* Bit 22 : Include or exclude subregion 22 in region */
+#define MWU_PREGION_SUBS_SR22_Pos (22UL) /*!< Position of SR22 field. */
+#define MWU_PREGION_SUBS_SR22_Msk (0x1UL << MWU_PREGION_SUBS_SR22_Pos) /*!< Bit mask of SR22 field. */
+#define MWU_PREGION_SUBS_SR22_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR22_Include (1UL) /*!< Include */
+
+/* Bit 21 : Include or exclude subregion 21 in region */
+#define MWU_PREGION_SUBS_SR21_Pos (21UL) /*!< Position of SR21 field. */
+#define MWU_PREGION_SUBS_SR21_Msk (0x1UL << MWU_PREGION_SUBS_SR21_Pos) /*!< Bit mask of SR21 field. */
+#define MWU_PREGION_SUBS_SR21_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR21_Include (1UL) /*!< Include */
+
+/* Bit 20 : Include or exclude subregion 20 in region */
+#define MWU_PREGION_SUBS_SR20_Pos (20UL) /*!< Position of SR20 field. */
+#define MWU_PREGION_SUBS_SR20_Msk (0x1UL << MWU_PREGION_SUBS_SR20_Pos) /*!< Bit mask of SR20 field. */
+#define MWU_PREGION_SUBS_SR20_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR20_Include (1UL) /*!< Include */
+
+/* Bit 19 : Include or exclude subregion 19 in region */
+#define MWU_PREGION_SUBS_SR19_Pos (19UL) /*!< Position of SR19 field. */
+#define MWU_PREGION_SUBS_SR19_Msk (0x1UL << MWU_PREGION_SUBS_SR19_Pos) /*!< Bit mask of SR19 field. */
+#define MWU_PREGION_SUBS_SR19_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR19_Include (1UL) /*!< Include */
+
+/* Bit 18 : Include or exclude subregion 18 in region */
+#define MWU_PREGION_SUBS_SR18_Pos (18UL) /*!< Position of SR18 field. */
+#define MWU_PREGION_SUBS_SR18_Msk (0x1UL << MWU_PREGION_SUBS_SR18_Pos) /*!< Bit mask of SR18 field. */
+#define MWU_PREGION_SUBS_SR18_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR18_Include (1UL) /*!< Include */
+
+/* Bit 17 : Include or exclude subregion 17 in region */
+#define MWU_PREGION_SUBS_SR17_Pos (17UL) /*!< Position of SR17 field. */
+#define MWU_PREGION_SUBS_SR17_Msk (0x1UL << MWU_PREGION_SUBS_SR17_Pos) /*!< Bit mask of SR17 field. */
+#define MWU_PREGION_SUBS_SR17_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR17_Include (1UL) /*!< Include */
+
+/* Bit 16 : Include or exclude subregion 16 in region */
+#define MWU_PREGION_SUBS_SR16_Pos (16UL) /*!< Position of SR16 field. */
+#define MWU_PREGION_SUBS_SR16_Msk (0x1UL << MWU_PREGION_SUBS_SR16_Pos) /*!< Bit mask of SR16 field. */
+#define MWU_PREGION_SUBS_SR16_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR16_Include (1UL) /*!< Include */
+
+/* Bit 15 : Include or exclude subregion 15 in region */
+#define MWU_PREGION_SUBS_SR15_Pos (15UL) /*!< Position of SR15 field. */
+#define MWU_PREGION_SUBS_SR15_Msk (0x1UL << MWU_PREGION_SUBS_SR15_Pos) /*!< Bit mask of SR15 field. */
+#define MWU_PREGION_SUBS_SR15_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR15_Include (1UL) /*!< Include */
+
+/* Bit 14 : Include or exclude subregion 14 in region */
+#define MWU_PREGION_SUBS_SR14_Pos (14UL) /*!< Position of SR14 field. */
+#define MWU_PREGION_SUBS_SR14_Msk (0x1UL << MWU_PREGION_SUBS_SR14_Pos) /*!< Bit mask of SR14 field. */
+#define MWU_PREGION_SUBS_SR14_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR14_Include (1UL) /*!< Include */
+
+/* Bit 13 : Include or exclude subregion 13 in region */
+#define MWU_PREGION_SUBS_SR13_Pos (13UL) /*!< Position of SR13 field. */
+#define MWU_PREGION_SUBS_SR13_Msk (0x1UL << MWU_PREGION_SUBS_SR13_Pos) /*!< Bit mask of SR13 field. */
+#define MWU_PREGION_SUBS_SR13_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR13_Include (1UL) /*!< Include */
+
+/* Bit 12 : Include or exclude subregion 12 in region */
+#define MWU_PREGION_SUBS_SR12_Pos (12UL) /*!< Position of SR12 field. */
+#define MWU_PREGION_SUBS_SR12_Msk (0x1UL << MWU_PREGION_SUBS_SR12_Pos) /*!< Bit mask of SR12 field. */
+#define MWU_PREGION_SUBS_SR12_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR12_Include (1UL) /*!< Include */
+
+/* Bit 11 : Include or exclude subregion 11 in region */
+#define MWU_PREGION_SUBS_SR11_Pos (11UL) /*!< Position of SR11 field. */
+#define MWU_PREGION_SUBS_SR11_Msk (0x1UL << MWU_PREGION_SUBS_SR11_Pos) /*!< Bit mask of SR11 field. */
+#define MWU_PREGION_SUBS_SR11_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR11_Include (1UL) /*!< Include */
+
+/* Bit 10 : Include or exclude subregion 10 in region */
+#define MWU_PREGION_SUBS_SR10_Pos (10UL) /*!< Position of SR10 field. */
+#define MWU_PREGION_SUBS_SR10_Msk (0x1UL << MWU_PREGION_SUBS_SR10_Pos) /*!< Bit mask of SR10 field. */
+#define MWU_PREGION_SUBS_SR10_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR10_Include (1UL) /*!< Include */
+
+/* Bit 9 : Include or exclude subregion 9 in region */
+#define MWU_PREGION_SUBS_SR9_Pos (9UL) /*!< Position of SR9 field. */
+#define MWU_PREGION_SUBS_SR9_Msk (0x1UL << MWU_PREGION_SUBS_SR9_Pos) /*!< Bit mask of SR9 field. */
+#define MWU_PREGION_SUBS_SR9_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR9_Include (1UL) /*!< Include */
+
+/* Bit 8 : Include or exclude subregion 8 in region */
+#define MWU_PREGION_SUBS_SR8_Pos (8UL) /*!< Position of SR8 field. */
+#define MWU_PREGION_SUBS_SR8_Msk (0x1UL << MWU_PREGION_SUBS_SR8_Pos) /*!< Bit mask of SR8 field. */
+#define MWU_PREGION_SUBS_SR8_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR8_Include (1UL) /*!< Include */
+
+/* Bit 7 : Include or exclude subregion 7 in region */
+#define MWU_PREGION_SUBS_SR7_Pos (7UL) /*!< Position of SR7 field. */
+#define MWU_PREGION_SUBS_SR7_Msk (0x1UL << MWU_PREGION_SUBS_SR7_Pos) /*!< Bit mask of SR7 field. */
+#define MWU_PREGION_SUBS_SR7_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR7_Include (1UL) /*!< Include */
+
+/* Bit 6 : Include or exclude subregion 6 in region */
+#define MWU_PREGION_SUBS_SR6_Pos (6UL) /*!< Position of SR6 field. */
+#define MWU_PREGION_SUBS_SR6_Msk (0x1UL << MWU_PREGION_SUBS_SR6_Pos) /*!< Bit mask of SR6 field. */
+#define MWU_PREGION_SUBS_SR6_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR6_Include (1UL) /*!< Include */
+
+/* Bit 5 : Include or exclude subregion 5 in region */
+#define MWU_PREGION_SUBS_SR5_Pos (5UL) /*!< Position of SR5 field. */
+#define MWU_PREGION_SUBS_SR5_Msk (0x1UL << MWU_PREGION_SUBS_SR5_Pos) /*!< Bit mask of SR5 field. */
+#define MWU_PREGION_SUBS_SR5_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR5_Include (1UL) /*!< Include */
+
+/* Bit 4 : Include or exclude subregion 4 in region */
+#define MWU_PREGION_SUBS_SR4_Pos (4UL) /*!< Position of SR4 field. */
+#define MWU_PREGION_SUBS_SR4_Msk (0x1UL << MWU_PREGION_SUBS_SR4_Pos) /*!< Bit mask of SR4 field. */
+#define MWU_PREGION_SUBS_SR4_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR4_Include (1UL) /*!< Include */
+
+/* Bit 3 : Include or exclude subregion 3 in region */
+#define MWU_PREGION_SUBS_SR3_Pos (3UL) /*!< Position of SR3 field. */
+#define MWU_PREGION_SUBS_SR3_Msk (0x1UL << MWU_PREGION_SUBS_SR3_Pos) /*!< Bit mask of SR3 field. */
+#define MWU_PREGION_SUBS_SR3_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR3_Include (1UL) /*!< Include */
+
+/* Bit 2 : Include or exclude subregion 2 in region */
+#define MWU_PREGION_SUBS_SR2_Pos (2UL) /*!< Position of SR2 field. */
+#define MWU_PREGION_SUBS_SR2_Msk (0x1UL << MWU_PREGION_SUBS_SR2_Pos) /*!< Bit mask of SR2 field. */
+#define MWU_PREGION_SUBS_SR2_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR2_Include (1UL) /*!< Include */
+
+/* Bit 1 : Include or exclude subregion 1 in region */
+#define MWU_PREGION_SUBS_SR1_Pos (1UL) /*!< Position of SR1 field. */
+#define MWU_PREGION_SUBS_SR1_Msk (0x1UL << MWU_PREGION_SUBS_SR1_Pos) /*!< Bit mask of SR1 field. */
+#define MWU_PREGION_SUBS_SR1_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR1_Include (1UL) /*!< Include */
+
+/* Bit 0 : Include or exclude subregion 0 in region */
+#define MWU_PREGION_SUBS_SR0_Pos (0UL) /*!< Position of SR0 field. */
+#define MWU_PREGION_SUBS_SR0_Msk (0x1UL << MWU_PREGION_SUBS_SR0_Pos) /*!< Bit mask of SR0 field. */
+#define MWU_PREGION_SUBS_SR0_Exclude (0UL) /*!< Exclude */
+#define MWU_PREGION_SUBS_SR0_Include (1UL) /*!< Include */
+
+
+/* Peripheral: NFCT */
+/* Description: NFC-A compatible radio */
+
+/* Register: NFCT_TASKS_ACTIVATE */
+/* Description: Activate NFCT peripheral for incoming and outgoing frames, change state to activated */
+
+/* Bit 0 : Activate NFCT peripheral for incoming and outgoing frames, change state to activated */
+#define NFCT_TASKS_ACTIVATE_TASKS_ACTIVATE_Pos (0UL) /*!< Position of TASKS_ACTIVATE field. */
+#define NFCT_TASKS_ACTIVATE_TASKS_ACTIVATE_Msk (0x1UL << NFCT_TASKS_ACTIVATE_TASKS_ACTIVATE_Pos) /*!< Bit mask of TASKS_ACTIVATE field. */
+#define NFCT_TASKS_ACTIVATE_TASKS_ACTIVATE_Trigger (1UL) /*!< Trigger task */
+
+/* Register: NFCT_TASKS_DISABLE */
+/* Description: Disable NFCT peripheral */
+
+/* Bit 0 : Disable NFCT peripheral */
+#define NFCT_TASKS_DISABLE_TASKS_DISABLE_Pos (0UL) /*!< Position of TASKS_DISABLE field. */
+#define NFCT_TASKS_DISABLE_TASKS_DISABLE_Msk (0x1UL << NFCT_TASKS_DISABLE_TASKS_DISABLE_Pos) /*!< Bit mask of TASKS_DISABLE field. */
+#define NFCT_TASKS_DISABLE_TASKS_DISABLE_Trigger (1UL) /*!< Trigger task */
+
+/* Register: NFCT_TASKS_SENSE */
+/* Description: Enable NFC sense field mode, change state to sense mode */
+
+/* Bit 0 : Enable NFC sense field mode, change state to sense mode */
+#define NFCT_TASKS_SENSE_TASKS_SENSE_Pos (0UL) /*!< Position of TASKS_SENSE field. */
+#define NFCT_TASKS_SENSE_TASKS_SENSE_Msk (0x1UL << NFCT_TASKS_SENSE_TASKS_SENSE_Pos) /*!< Bit mask of TASKS_SENSE field. */
+#define NFCT_TASKS_SENSE_TASKS_SENSE_Trigger (1UL) /*!< Trigger task */
+
+/* Register: NFCT_TASKS_STARTTX */
+/* Description: Start transmission of an outgoing frame, change state to transmit */
+
+/* Bit 0 : Start transmission of an outgoing frame, change state to transmit */
+#define NFCT_TASKS_STARTTX_TASKS_STARTTX_Pos (0UL) /*!< Position of TASKS_STARTTX field. */
+#define NFCT_TASKS_STARTTX_TASKS_STARTTX_Msk (0x1UL << NFCT_TASKS_STARTTX_TASKS_STARTTX_Pos) /*!< Bit mask of TASKS_STARTTX field. */
+#define NFCT_TASKS_STARTTX_TASKS_STARTTX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: NFCT_TASKS_ENABLERXDATA */
+/* Description: Initializes the EasyDMA for receive. */
+
+/* Bit 0 : Initializes the EasyDMA for receive. */
+#define NFCT_TASKS_ENABLERXDATA_TASKS_ENABLERXDATA_Pos (0UL) /*!< Position of TASKS_ENABLERXDATA field. */
+#define NFCT_TASKS_ENABLERXDATA_TASKS_ENABLERXDATA_Msk (0x1UL << NFCT_TASKS_ENABLERXDATA_TASKS_ENABLERXDATA_Pos) /*!< Bit mask of TASKS_ENABLERXDATA field. */
+#define NFCT_TASKS_ENABLERXDATA_TASKS_ENABLERXDATA_Trigger (1UL) /*!< Trigger task */
+
+/* Register: NFCT_TASKS_GOIDLE */
+/* Description: Force state machine to IDLE state */
+
+/* Bit 0 : Force state machine to IDLE state */
+#define NFCT_TASKS_GOIDLE_TASKS_GOIDLE_Pos (0UL) /*!< Position of TASKS_GOIDLE field. */
+#define NFCT_TASKS_GOIDLE_TASKS_GOIDLE_Msk (0x1UL << NFCT_TASKS_GOIDLE_TASKS_GOIDLE_Pos) /*!< Bit mask of TASKS_GOIDLE field. */
+#define NFCT_TASKS_GOIDLE_TASKS_GOIDLE_Trigger (1UL) /*!< Trigger task */
+
+/* Register: NFCT_TASKS_GOSLEEP */
+/* Description: Force state machine to SLEEP_A state */
+
+/* Bit 0 : Force state machine to SLEEP_A state */
+#define NFCT_TASKS_GOSLEEP_TASKS_GOSLEEP_Pos (0UL) /*!< Position of TASKS_GOSLEEP field. */
+#define NFCT_TASKS_GOSLEEP_TASKS_GOSLEEP_Msk (0x1UL << NFCT_TASKS_GOSLEEP_TASKS_GOSLEEP_Pos) /*!< Bit mask of TASKS_GOSLEEP field. */
+#define NFCT_TASKS_GOSLEEP_TASKS_GOSLEEP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: NFCT_EVENTS_READY */
+/* Description: The NFCT peripheral is ready to receive and send frames */
+
+/* Bit 0 : The NFCT peripheral is ready to receive and send frames */
+#define NFCT_EVENTS_READY_EVENTS_READY_Pos (0UL) /*!< Position of EVENTS_READY field. */
+#define NFCT_EVENTS_READY_EVENTS_READY_Msk (0x1UL << NFCT_EVENTS_READY_EVENTS_READY_Pos) /*!< Bit mask of EVENTS_READY field. */
+#define NFCT_EVENTS_READY_EVENTS_READY_NotGenerated (0UL) /*!< Event not generated */
+#define NFCT_EVENTS_READY_EVENTS_READY_Generated (1UL) /*!< Event generated */
+
+/* Register: NFCT_EVENTS_FIELDDETECTED */
+/* Description: Remote NFC field detected */
+
+/* Bit 0 : Remote NFC field detected */
+#define NFCT_EVENTS_FIELDDETECTED_EVENTS_FIELDDETECTED_Pos (0UL) /*!< Position of EVENTS_FIELDDETECTED field. */
+#define NFCT_EVENTS_FIELDDETECTED_EVENTS_FIELDDETECTED_Msk (0x1UL << NFCT_EVENTS_FIELDDETECTED_EVENTS_FIELDDETECTED_Pos) /*!< Bit mask of EVENTS_FIELDDETECTED field. */
+#define NFCT_EVENTS_FIELDDETECTED_EVENTS_FIELDDETECTED_NotGenerated (0UL) /*!< Event not generated */
+#define NFCT_EVENTS_FIELDDETECTED_EVENTS_FIELDDETECTED_Generated (1UL) /*!< Event generated */
+
+/* Register: NFCT_EVENTS_FIELDLOST */
+/* Description: Remote NFC field lost */
+
+/* Bit 0 : Remote NFC field lost */
+#define NFCT_EVENTS_FIELDLOST_EVENTS_FIELDLOST_Pos (0UL) /*!< Position of EVENTS_FIELDLOST field. */
+#define NFCT_EVENTS_FIELDLOST_EVENTS_FIELDLOST_Msk (0x1UL << NFCT_EVENTS_FIELDLOST_EVENTS_FIELDLOST_Pos) /*!< Bit mask of EVENTS_FIELDLOST field. */
+#define NFCT_EVENTS_FIELDLOST_EVENTS_FIELDLOST_NotGenerated (0UL) /*!< Event not generated */
+#define NFCT_EVENTS_FIELDLOST_EVENTS_FIELDLOST_Generated (1UL) /*!< Event generated */
+
+/* Register: NFCT_EVENTS_TXFRAMESTART */
+/* Description: Marks the start of the first symbol of a transmitted frame */
+
+/* Bit 0 : Marks the start of the first symbol of a transmitted frame */
+#define NFCT_EVENTS_TXFRAMESTART_EVENTS_TXFRAMESTART_Pos (0UL) /*!< Position of EVENTS_TXFRAMESTART field. */
+#define NFCT_EVENTS_TXFRAMESTART_EVENTS_TXFRAMESTART_Msk (0x1UL << NFCT_EVENTS_TXFRAMESTART_EVENTS_TXFRAMESTART_Pos) /*!< Bit mask of EVENTS_TXFRAMESTART field. */
+#define NFCT_EVENTS_TXFRAMESTART_EVENTS_TXFRAMESTART_NotGenerated (0UL) /*!< Event not generated */
+#define NFCT_EVENTS_TXFRAMESTART_EVENTS_TXFRAMESTART_Generated (1UL) /*!< Event generated */
+
+/* Register: NFCT_EVENTS_TXFRAMEEND */
+/* Description: Marks the end of the last transmitted on-air symbol of a frame */
+
+/* Bit 0 : Marks the end of the last transmitted on-air symbol of a frame */
+#define NFCT_EVENTS_TXFRAMEEND_EVENTS_TXFRAMEEND_Pos (0UL) /*!< Position of EVENTS_TXFRAMEEND field. */
+#define NFCT_EVENTS_TXFRAMEEND_EVENTS_TXFRAMEEND_Msk (0x1UL << NFCT_EVENTS_TXFRAMEEND_EVENTS_TXFRAMEEND_Pos) /*!< Bit mask of EVENTS_TXFRAMEEND field. */
+#define NFCT_EVENTS_TXFRAMEEND_EVENTS_TXFRAMEEND_NotGenerated (0UL) /*!< Event not generated */
+#define NFCT_EVENTS_TXFRAMEEND_EVENTS_TXFRAMEEND_Generated (1UL) /*!< Event generated */
+
+/* Register: NFCT_EVENTS_RXFRAMESTART */
+/* Description: Marks the end of the first symbol of a received frame */
+
+/* Bit 0 : Marks the end of the first symbol of a received frame */
+#define NFCT_EVENTS_RXFRAMESTART_EVENTS_RXFRAMESTART_Pos (0UL) /*!< Position of EVENTS_RXFRAMESTART field. */
+#define NFCT_EVENTS_RXFRAMESTART_EVENTS_RXFRAMESTART_Msk (0x1UL << NFCT_EVENTS_RXFRAMESTART_EVENTS_RXFRAMESTART_Pos) /*!< Bit mask of EVENTS_RXFRAMESTART field. */
+#define NFCT_EVENTS_RXFRAMESTART_EVENTS_RXFRAMESTART_NotGenerated (0UL) /*!< Event not generated */
+#define NFCT_EVENTS_RXFRAMESTART_EVENTS_RXFRAMESTART_Generated (1UL) /*!< Event generated */
+
+/* Register: NFCT_EVENTS_RXFRAMEEND */
+/* Description: Received data has been checked (CRC, parity) and transferred to RAM, and EasyDMA has ended accessing the RX buffer */
+
+/* Bit 0 : Received data has been checked (CRC, parity) and transferred to RAM, and EasyDMA has ended accessing the RX buffer */
+#define NFCT_EVENTS_RXFRAMEEND_EVENTS_RXFRAMEEND_Pos (0UL) /*!< Position of EVENTS_RXFRAMEEND field. */
+#define NFCT_EVENTS_RXFRAMEEND_EVENTS_RXFRAMEEND_Msk (0x1UL << NFCT_EVENTS_RXFRAMEEND_EVENTS_RXFRAMEEND_Pos) /*!< Bit mask of EVENTS_RXFRAMEEND field. */
+#define NFCT_EVENTS_RXFRAMEEND_EVENTS_RXFRAMEEND_NotGenerated (0UL) /*!< Event not generated */
+#define NFCT_EVENTS_RXFRAMEEND_EVENTS_RXFRAMEEND_Generated (1UL) /*!< Event generated */
+
+/* Register: NFCT_EVENTS_ERROR */
+/* Description: NFC error reported. The ERRORSTATUS register contains details on the source of the error. */
+
+/* Bit 0 : NFC error reported. The ERRORSTATUS register contains details on the source of the error. */
+#define NFCT_EVENTS_ERROR_EVENTS_ERROR_Pos (0UL) /*!< Position of EVENTS_ERROR field. */
+#define NFCT_EVENTS_ERROR_EVENTS_ERROR_Msk (0x1UL << NFCT_EVENTS_ERROR_EVENTS_ERROR_Pos) /*!< Bit mask of EVENTS_ERROR field. */
+#define NFCT_EVENTS_ERROR_EVENTS_ERROR_NotGenerated (0UL) /*!< Event not generated */
+#define NFCT_EVENTS_ERROR_EVENTS_ERROR_Generated (1UL) /*!< Event generated */
+
+/* Register: NFCT_EVENTS_RXERROR */
+/* Description: NFC RX frame error reported. The FRAMESTATUS.RX register contains details on the source of the error. */
+
+/* Bit 0 : NFC RX frame error reported. The FRAMESTATUS.RX register contains details on the source of the error. */
+#define NFCT_EVENTS_RXERROR_EVENTS_RXERROR_Pos (0UL) /*!< Position of EVENTS_RXERROR field. */
+#define NFCT_EVENTS_RXERROR_EVENTS_RXERROR_Msk (0x1UL << NFCT_EVENTS_RXERROR_EVENTS_RXERROR_Pos) /*!< Bit mask of EVENTS_RXERROR field. */
+#define NFCT_EVENTS_RXERROR_EVENTS_RXERROR_NotGenerated (0UL) /*!< Event not generated */
+#define NFCT_EVENTS_RXERROR_EVENTS_RXERROR_Generated (1UL) /*!< Event generated */
+
+/* Register: NFCT_EVENTS_ENDRX */
+/* Description: RX buffer (as defined by PACKETPTR and MAXLEN) in Data RAM full. */
+
+/* Bit 0 : RX buffer (as defined by PACKETPTR and MAXLEN) in Data RAM full. */
+#define NFCT_EVENTS_ENDRX_EVENTS_ENDRX_Pos (0UL) /*!< Position of EVENTS_ENDRX field. */
+#define NFCT_EVENTS_ENDRX_EVENTS_ENDRX_Msk (0x1UL << NFCT_EVENTS_ENDRX_EVENTS_ENDRX_Pos) /*!< Bit mask of EVENTS_ENDRX field. */
+#define NFCT_EVENTS_ENDRX_EVENTS_ENDRX_NotGenerated (0UL) /*!< Event not generated */
+#define NFCT_EVENTS_ENDRX_EVENTS_ENDRX_Generated (1UL) /*!< Event generated */
+
+/* Register: NFCT_EVENTS_ENDTX */
+/* Description: Transmission of data in RAM has ended, and EasyDMA has ended accessing the TX buffer */
+
+/* Bit 0 : Transmission of data in RAM has ended, and EasyDMA has ended accessing the TX buffer */
+#define NFCT_EVENTS_ENDTX_EVENTS_ENDTX_Pos (0UL) /*!< Position of EVENTS_ENDTX field. */
+#define NFCT_EVENTS_ENDTX_EVENTS_ENDTX_Msk (0x1UL << NFCT_EVENTS_ENDTX_EVENTS_ENDTX_Pos) /*!< Bit mask of EVENTS_ENDTX field. */
+#define NFCT_EVENTS_ENDTX_EVENTS_ENDTX_NotGenerated (0UL) /*!< Event not generated */
+#define NFCT_EVENTS_ENDTX_EVENTS_ENDTX_Generated (1UL) /*!< Event generated */
+
+/* Register: NFCT_EVENTS_AUTOCOLRESSTARTED */
+/* Description: Auto collision resolution process has started */
+
+/* Bit 0 : Auto collision resolution process has started */
+#define NFCT_EVENTS_AUTOCOLRESSTARTED_EVENTS_AUTOCOLRESSTARTED_Pos (0UL) /*!< Position of EVENTS_AUTOCOLRESSTARTED field. */
+#define NFCT_EVENTS_AUTOCOLRESSTARTED_EVENTS_AUTOCOLRESSTARTED_Msk (0x1UL << NFCT_EVENTS_AUTOCOLRESSTARTED_EVENTS_AUTOCOLRESSTARTED_Pos) /*!< Bit mask of EVENTS_AUTOCOLRESSTARTED field. */
+#define NFCT_EVENTS_AUTOCOLRESSTARTED_EVENTS_AUTOCOLRESSTARTED_NotGenerated (0UL) /*!< Event not generated */
+#define NFCT_EVENTS_AUTOCOLRESSTARTED_EVENTS_AUTOCOLRESSTARTED_Generated (1UL) /*!< Event generated */
+
+/* Register: NFCT_EVENTS_COLLISION */
+/* Description: NFC auto collision resolution error reported. */
+
+/* Bit 0 : NFC auto collision resolution error reported. */
+#define NFCT_EVENTS_COLLISION_EVENTS_COLLISION_Pos (0UL) /*!< Position of EVENTS_COLLISION field. */
+#define NFCT_EVENTS_COLLISION_EVENTS_COLLISION_Msk (0x1UL << NFCT_EVENTS_COLLISION_EVENTS_COLLISION_Pos) /*!< Bit mask of EVENTS_COLLISION field. */
+#define NFCT_EVENTS_COLLISION_EVENTS_COLLISION_NotGenerated (0UL) /*!< Event not generated */
+#define NFCT_EVENTS_COLLISION_EVENTS_COLLISION_Generated (1UL) /*!< Event generated */
+
+/* Register: NFCT_EVENTS_SELECTED */
+/* Description: NFC auto collision resolution successfully completed */
+
+/* Bit 0 : NFC auto collision resolution successfully completed */
+#define NFCT_EVENTS_SELECTED_EVENTS_SELECTED_Pos (0UL) /*!< Position of EVENTS_SELECTED field. */
+#define NFCT_EVENTS_SELECTED_EVENTS_SELECTED_Msk (0x1UL << NFCT_EVENTS_SELECTED_EVENTS_SELECTED_Pos) /*!< Bit mask of EVENTS_SELECTED field. */
+#define NFCT_EVENTS_SELECTED_EVENTS_SELECTED_NotGenerated (0UL) /*!< Event not generated */
+#define NFCT_EVENTS_SELECTED_EVENTS_SELECTED_Generated (1UL) /*!< Event generated */
+
+/* Register: NFCT_EVENTS_STARTED */
+/* Description: EasyDMA is ready to receive or send frames. */
+
+/* Bit 0 : EasyDMA is ready to receive or send frames. */
+#define NFCT_EVENTS_STARTED_EVENTS_STARTED_Pos (0UL) /*!< Position of EVENTS_STARTED field. */
+#define NFCT_EVENTS_STARTED_EVENTS_STARTED_Msk (0x1UL << NFCT_EVENTS_STARTED_EVENTS_STARTED_Pos) /*!< Bit mask of EVENTS_STARTED field. */
+#define NFCT_EVENTS_STARTED_EVENTS_STARTED_NotGenerated (0UL) /*!< Event not generated */
+#define NFCT_EVENTS_STARTED_EVENTS_STARTED_Generated (1UL) /*!< Event generated */
+
+/* Register: NFCT_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 5 : Shortcut between event TXFRAMEEND and task ENABLERXDATA */
+#define NFCT_SHORTS_TXFRAMEEND_ENABLERXDATA_Pos (5UL) /*!< Position of TXFRAMEEND_ENABLERXDATA field. */
+#define NFCT_SHORTS_TXFRAMEEND_ENABLERXDATA_Msk (0x1UL << NFCT_SHORTS_TXFRAMEEND_ENABLERXDATA_Pos) /*!< Bit mask of TXFRAMEEND_ENABLERXDATA field. */
+#define NFCT_SHORTS_TXFRAMEEND_ENABLERXDATA_Disabled (0UL) /*!< Disable shortcut */
+#define NFCT_SHORTS_TXFRAMEEND_ENABLERXDATA_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 1 : Shortcut between event FIELDLOST and task SENSE */
+#define NFCT_SHORTS_FIELDLOST_SENSE_Pos (1UL) /*!< Position of FIELDLOST_SENSE field. */
+#define NFCT_SHORTS_FIELDLOST_SENSE_Msk (0x1UL << NFCT_SHORTS_FIELDLOST_SENSE_Pos) /*!< Bit mask of FIELDLOST_SENSE field. */
+#define NFCT_SHORTS_FIELDLOST_SENSE_Disabled (0UL) /*!< Disable shortcut */
+#define NFCT_SHORTS_FIELDLOST_SENSE_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 0 : Shortcut between event FIELDDETECTED and task ACTIVATE */
+#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Pos (0UL) /*!< Position of FIELDDETECTED_ACTIVATE field. */
+#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Msk (0x1UL << NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Pos) /*!< Bit mask of FIELDDETECTED_ACTIVATE field. */
+#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Disabled (0UL) /*!< Disable shortcut */
+#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: NFCT_INTEN */
+/* Description: Enable or disable interrupt */
+
+/* Bit 20 : Enable or disable interrupt for event STARTED */
+#define NFCT_INTEN_STARTED_Pos (20UL) /*!< Position of STARTED field. */
+#define NFCT_INTEN_STARTED_Msk (0x1UL << NFCT_INTEN_STARTED_Pos) /*!< Bit mask of STARTED field. */
+#define NFCT_INTEN_STARTED_Disabled (0UL) /*!< Disable */
+#define NFCT_INTEN_STARTED_Enabled (1UL) /*!< Enable */
+
+/* Bit 19 : Enable or disable interrupt for event SELECTED */
+#define NFCT_INTEN_SELECTED_Pos (19UL) /*!< Position of SELECTED field. */
+#define NFCT_INTEN_SELECTED_Msk (0x1UL << NFCT_INTEN_SELECTED_Pos) /*!< Bit mask of SELECTED field. */
+#define NFCT_INTEN_SELECTED_Disabled (0UL) /*!< Disable */
+#define NFCT_INTEN_SELECTED_Enabled (1UL) /*!< Enable */
+
+/* Bit 18 : Enable or disable interrupt for event COLLISION */
+#define NFCT_INTEN_COLLISION_Pos (18UL) /*!< Position of COLLISION field. */
+#define NFCT_INTEN_COLLISION_Msk (0x1UL << NFCT_INTEN_COLLISION_Pos) /*!< Bit mask of COLLISION field. */
+#define NFCT_INTEN_COLLISION_Disabled (0UL) /*!< Disable */
+#define NFCT_INTEN_COLLISION_Enabled (1UL) /*!< Enable */
+
+/* Bit 14 : Enable or disable interrupt for event AUTOCOLRESSTARTED */
+#define NFCT_INTEN_AUTOCOLRESSTARTED_Pos (14UL) /*!< Position of AUTOCOLRESSTARTED field. */
+#define NFCT_INTEN_AUTOCOLRESSTARTED_Msk (0x1UL << NFCT_INTEN_AUTOCOLRESSTARTED_Pos) /*!< Bit mask of AUTOCOLRESSTARTED field. */
+#define NFCT_INTEN_AUTOCOLRESSTARTED_Disabled (0UL) /*!< Disable */
+#define NFCT_INTEN_AUTOCOLRESSTARTED_Enabled (1UL) /*!< Enable */
+
+/* Bit 12 : Enable or disable interrupt for event ENDTX */
+#define NFCT_INTEN_ENDTX_Pos (12UL) /*!< Position of ENDTX field. */
+#define NFCT_INTEN_ENDTX_Msk (0x1UL << NFCT_INTEN_ENDTX_Pos) /*!< Bit mask of ENDTX field. */
+#define NFCT_INTEN_ENDTX_Disabled (0UL) /*!< Disable */
+#define NFCT_INTEN_ENDTX_Enabled (1UL) /*!< Enable */
+
+/* Bit 11 : Enable or disable interrupt for event ENDRX */
+#define NFCT_INTEN_ENDRX_Pos (11UL) /*!< Position of ENDRX field. */
+#define NFCT_INTEN_ENDRX_Msk (0x1UL << NFCT_INTEN_ENDRX_Pos) /*!< Bit mask of ENDRX field. */
+#define NFCT_INTEN_ENDRX_Disabled (0UL) /*!< Disable */
+#define NFCT_INTEN_ENDRX_Enabled (1UL) /*!< Enable */
+
+/* Bit 10 : Enable or disable interrupt for event RXERROR */
+#define NFCT_INTEN_RXERROR_Pos (10UL) /*!< Position of RXERROR field. */
+#define NFCT_INTEN_RXERROR_Msk (0x1UL << NFCT_INTEN_RXERROR_Pos) /*!< Bit mask of RXERROR field. */
+#define NFCT_INTEN_RXERROR_Disabled (0UL) /*!< Disable */
+#define NFCT_INTEN_RXERROR_Enabled (1UL) /*!< Enable */
+
+/* Bit 7 : Enable or disable interrupt for event ERROR */
+#define NFCT_INTEN_ERROR_Pos (7UL) /*!< Position of ERROR field. */
+#define NFCT_INTEN_ERROR_Msk (0x1UL << NFCT_INTEN_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define NFCT_INTEN_ERROR_Disabled (0UL) /*!< Disable */
+#define NFCT_INTEN_ERROR_Enabled (1UL) /*!< Enable */
+
+/* Bit 6 : Enable or disable interrupt for event RXFRAMEEND */
+#define NFCT_INTEN_RXFRAMEEND_Pos (6UL) /*!< Position of RXFRAMEEND field. */
+#define NFCT_INTEN_RXFRAMEEND_Msk (0x1UL << NFCT_INTEN_RXFRAMEEND_Pos) /*!< Bit mask of RXFRAMEEND field. */
+#define NFCT_INTEN_RXFRAMEEND_Disabled (0UL) /*!< Disable */
+#define NFCT_INTEN_RXFRAMEEND_Enabled (1UL) /*!< Enable */
+
+/* Bit 5 : Enable or disable interrupt for event RXFRAMESTART */
+#define NFCT_INTEN_RXFRAMESTART_Pos (5UL) /*!< Position of RXFRAMESTART field. */
+#define NFCT_INTEN_RXFRAMESTART_Msk (0x1UL << NFCT_INTEN_RXFRAMESTART_Pos) /*!< Bit mask of RXFRAMESTART field. */
+#define NFCT_INTEN_RXFRAMESTART_Disabled (0UL) /*!< Disable */
+#define NFCT_INTEN_RXFRAMESTART_Enabled (1UL) /*!< Enable */
+
+/* Bit 4 : Enable or disable interrupt for event TXFRAMEEND */
+#define NFCT_INTEN_TXFRAMEEND_Pos (4UL) /*!< Position of TXFRAMEEND field. */
+#define NFCT_INTEN_TXFRAMEEND_Msk (0x1UL << NFCT_INTEN_TXFRAMEEND_Pos) /*!< Bit mask of TXFRAMEEND field. */
+#define NFCT_INTEN_TXFRAMEEND_Disabled (0UL) /*!< Disable */
+#define NFCT_INTEN_TXFRAMEEND_Enabled (1UL) /*!< Enable */
+
+/* Bit 3 : Enable or disable interrupt for event TXFRAMESTART */
+#define NFCT_INTEN_TXFRAMESTART_Pos (3UL) /*!< Position of TXFRAMESTART field. */
+#define NFCT_INTEN_TXFRAMESTART_Msk (0x1UL << NFCT_INTEN_TXFRAMESTART_Pos) /*!< Bit mask of TXFRAMESTART field. */
+#define NFCT_INTEN_TXFRAMESTART_Disabled (0UL) /*!< Disable */
+#define NFCT_INTEN_TXFRAMESTART_Enabled (1UL) /*!< Enable */
+
+/* Bit 2 : Enable or disable interrupt for event FIELDLOST */
+#define NFCT_INTEN_FIELDLOST_Pos (2UL) /*!< Position of FIELDLOST field. */
+#define NFCT_INTEN_FIELDLOST_Msk (0x1UL << NFCT_INTEN_FIELDLOST_Pos) /*!< Bit mask of FIELDLOST field. */
+#define NFCT_INTEN_FIELDLOST_Disabled (0UL) /*!< Disable */
+#define NFCT_INTEN_FIELDLOST_Enabled (1UL) /*!< Enable */
+
+/* Bit 1 : Enable or disable interrupt for event FIELDDETECTED */
+#define NFCT_INTEN_FIELDDETECTED_Pos (1UL) /*!< Position of FIELDDETECTED field. */
+#define NFCT_INTEN_FIELDDETECTED_Msk (0x1UL << NFCT_INTEN_FIELDDETECTED_Pos) /*!< Bit mask of FIELDDETECTED field. */
+#define NFCT_INTEN_FIELDDETECTED_Disabled (0UL) /*!< Disable */
+#define NFCT_INTEN_FIELDDETECTED_Enabled (1UL) /*!< Enable */
+
+/* Bit 0 : Enable or disable interrupt for event READY */
+#define NFCT_INTEN_READY_Pos (0UL) /*!< Position of READY field. */
+#define NFCT_INTEN_READY_Msk (0x1UL << NFCT_INTEN_READY_Pos) /*!< Bit mask of READY field. */
+#define NFCT_INTEN_READY_Disabled (0UL) /*!< Disable */
+#define NFCT_INTEN_READY_Enabled (1UL) /*!< Enable */
+
+/* Register: NFCT_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 20 : Write '1' to enable interrupt for event STARTED */
+#define NFCT_INTENSET_STARTED_Pos (20UL) /*!< Position of STARTED field. */
+#define NFCT_INTENSET_STARTED_Msk (0x1UL << NFCT_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */
+#define NFCT_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENSET_STARTED_Set (1UL) /*!< Enable */
+
+/* Bit 19 : Write '1' to enable interrupt for event SELECTED */
+#define NFCT_INTENSET_SELECTED_Pos (19UL) /*!< Position of SELECTED field. */
+#define NFCT_INTENSET_SELECTED_Msk (0x1UL << NFCT_INTENSET_SELECTED_Pos) /*!< Bit mask of SELECTED field. */
+#define NFCT_INTENSET_SELECTED_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENSET_SELECTED_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENSET_SELECTED_Set (1UL) /*!< Enable */
+
+/* Bit 18 : Write '1' to enable interrupt for event COLLISION */
+#define NFCT_INTENSET_COLLISION_Pos (18UL) /*!< Position of COLLISION field. */
+#define NFCT_INTENSET_COLLISION_Msk (0x1UL << NFCT_INTENSET_COLLISION_Pos) /*!< Bit mask of COLLISION field. */
+#define NFCT_INTENSET_COLLISION_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENSET_COLLISION_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENSET_COLLISION_Set (1UL) /*!< Enable */
+
+/* Bit 14 : Write '1' to enable interrupt for event AUTOCOLRESSTARTED */
+#define NFCT_INTENSET_AUTOCOLRESSTARTED_Pos (14UL) /*!< Position of AUTOCOLRESSTARTED field. */
+#define NFCT_INTENSET_AUTOCOLRESSTARTED_Msk (0x1UL << NFCT_INTENSET_AUTOCOLRESSTARTED_Pos) /*!< Bit mask of AUTOCOLRESSTARTED field. */
+#define NFCT_INTENSET_AUTOCOLRESSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENSET_AUTOCOLRESSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENSET_AUTOCOLRESSTARTED_Set (1UL) /*!< Enable */
+
+/* Bit 12 : Write '1' to enable interrupt for event ENDTX */
+#define NFCT_INTENSET_ENDTX_Pos (12UL) /*!< Position of ENDTX field. */
+#define NFCT_INTENSET_ENDTX_Msk (0x1UL << NFCT_INTENSET_ENDTX_Pos) /*!< Bit mask of ENDTX field. */
+#define NFCT_INTENSET_ENDTX_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENSET_ENDTX_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENSET_ENDTX_Set (1UL) /*!< Enable */
+
+/* Bit 11 : Write '1' to enable interrupt for event ENDRX */
+#define NFCT_INTENSET_ENDRX_Pos (11UL) /*!< Position of ENDRX field. */
+#define NFCT_INTENSET_ENDRX_Msk (0x1UL << NFCT_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */
+#define NFCT_INTENSET_ENDRX_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENSET_ENDRX_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENSET_ENDRX_Set (1UL) /*!< Enable */
+
+/* Bit 10 : Write '1' to enable interrupt for event RXERROR */
+#define NFCT_INTENSET_RXERROR_Pos (10UL) /*!< Position of RXERROR field. */
+#define NFCT_INTENSET_RXERROR_Msk (0x1UL << NFCT_INTENSET_RXERROR_Pos) /*!< Bit mask of RXERROR field. */
+#define NFCT_INTENSET_RXERROR_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENSET_RXERROR_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENSET_RXERROR_Set (1UL) /*!< Enable */
+
+/* Bit 7 : Write '1' to enable interrupt for event ERROR */
+#define NFCT_INTENSET_ERROR_Pos (7UL) /*!< Position of ERROR field. */
+#define NFCT_INTENSET_ERROR_Msk (0x1UL << NFCT_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define NFCT_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENSET_ERROR_Set (1UL) /*!< Enable */
+
+/* Bit 6 : Write '1' to enable interrupt for event RXFRAMEEND */
+#define NFCT_INTENSET_RXFRAMEEND_Pos (6UL) /*!< Position of RXFRAMEEND field. */
+#define NFCT_INTENSET_RXFRAMEEND_Msk (0x1UL << NFCT_INTENSET_RXFRAMEEND_Pos) /*!< Bit mask of RXFRAMEEND field. */
+#define NFCT_INTENSET_RXFRAMEEND_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENSET_RXFRAMEEND_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENSET_RXFRAMEEND_Set (1UL) /*!< Enable */
+
+/* Bit 5 : Write '1' to enable interrupt for event RXFRAMESTART */
+#define NFCT_INTENSET_RXFRAMESTART_Pos (5UL) /*!< Position of RXFRAMESTART field. */
+#define NFCT_INTENSET_RXFRAMESTART_Msk (0x1UL << NFCT_INTENSET_RXFRAMESTART_Pos) /*!< Bit mask of RXFRAMESTART field. */
+#define NFCT_INTENSET_RXFRAMESTART_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENSET_RXFRAMESTART_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENSET_RXFRAMESTART_Set (1UL) /*!< Enable */
+
+/* Bit 4 : Write '1' to enable interrupt for event TXFRAMEEND */
+#define NFCT_INTENSET_TXFRAMEEND_Pos (4UL) /*!< Position of TXFRAMEEND field. */
+#define NFCT_INTENSET_TXFRAMEEND_Msk (0x1UL << NFCT_INTENSET_TXFRAMEEND_Pos) /*!< Bit mask of TXFRAMEEND field. */
+#define NFCT_INTENSET_TXFRAMEEND_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENSET_TXFRAMEEND_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENSET_TXFRAMEEND_Set (1UL) /*!< Enable */
+
+/* Bit 3 : Write '1' to enable interrupt for event TXFRAMESTART */
+#define NFCT_INTENSET_TXFRAMESTART_Pos (3UL) /*!< Position of TXFRAMESTART field. */
+#define NFCT_INTENSET_TXFRAMESTART_Msk (0x1UL << NFCT_INTENSET_TXFRAMESTART_Pos) /*!< Bit mask of TXFRAMESTART field. */
+#define NFCT_INTENSET_TXFRAMESTART_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENSET_TXFRAMESTART_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENSET_TXFRAMESTART_Set (1UL) /*!< Enable */
+
+/* Bit 2 : Write '1' to enable interrupt for event FIELDLOST */
+#define NFCT_INTENSET_FIELDLOST_Pos (2UL) /*!< Position of FIELDLOST field. */
+#define NFCT_INTENSET_FIELDLOST_Msk (0x1UL << NFCT_INTENSET_FIELDLOST_Pos) /*!< Bit mask of FIELDLOST field. */
+#define NFCT_INTENSET_FIELDLOST_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENSET_FIELDLOST_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENSET_FIELDLOST_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event FIELDDETECTED */
+#define NFCT_INTENSET_FIELDDETECTED_Pos (1UL) /*!< Position of FIELDDETECTED field. */
+#define NFCT_INTENSET_FIELDDETECTED_Msk (0x1UL << NFCT_INTENSET_FIELDDETECTED_Pos) /*!< Bit mask of FIELDDETECTED field. */
+#define NFCT_INTENSET_FIELDDETECTED_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENSET_FIELDDETECTED_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENSET_FIELDDETECTED_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event READY */
+#define NFCT_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */
+#define NFCT_INTENSET_READY_Msk (0x1UL << NFCT_INTENSET_READY_Pos) /*!< Bit mask of READY field. */
+#define NFCT_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENSET_READY_Set (1UL) /*!< Enable */
+
+/* Register: NFCT_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 20 : Write '1' to disable interrupt for event STARTED */
+#define NFCT_INTENCLR_STARTED_Pos (20UL) /*!< Position of STARTED field. */
+#define NFCT_INTENCLR_STARTED_Msk (0x1UL << NFCT_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */
+#define NFCT_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENCLR_STARTED_Clear (1UL) /*!< Disable */
+
+/* Bit 19 : Write '1' to disable interrupt for event SELECTED */
+#define NFCT_INTENCLR_SELECTED_Pos (19UL) /*!< Position of SELECTED field. */
+#define NFCT_INTENCLR_SELECTED_Msk (0x1UL << NFCT_INTENCLR_SELECTED_Pos) /*!< Bit mask of SELECTED field. */
+#define NFCT_INTENCLR_SELECTED_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENCLR_SELECTED_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENCLR_SELECTED_Clear (1UL) /*!< Disable */
+
+/* Bit 18 : Write '1' to disable interrupt for event COLLISION */
+#define NFCT_INTENCLR_COLLISION_Pos (18UL) /*!< Position of COLLISION field. */
+#define NFCT_INTENCLR_COLLISION_Msk (0x1UL << NFCT_INTENCLR_COLLISION_Pos) /*!< Bit mask of COLLISION field. */
+#define NFCT_INTENCLR_COLLISION_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENCLR_COLLISION_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENCLR_COLLISION_Clear (1UL) /*!< Disable */
+
+/* Bit 14 : Write '1' to disable interrupt for event AUTOCOLRESSTARTED */
+#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Pos (14UL) /*!< Position of AUTOCOLRESSTARTED field. */
+#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Msk (0x1UL << NFCT_INTENCLR_AUTOCOLRESSTARTED_Pos) /*!< Bit mask of AUTOCOLRESSTARTED field. */
+#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Clear (1UL) /*!< Disable */
+
+/* Bit 12 : Write '1' to disable interrupt for event ENDTX */
+#define NFCT_INTENCLR_ENDTX_Pos (12UL) /*!< Position of ENDTX field. */
+#define NFCT_INTENCLR_ENDTX_Msk (0x1UL << NFCT_INTENCLR_ENDTX_Pos) /*!< Bit mask of ENDTX field. */
+#define NFCT_INTENCLR_ENDTX_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENCLR_ENDTX_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENCLR_ENDTX_Clear (1UL) /*!< Disable */
+
+/* Bit 11 : Write '1' to disable interrupt for event ENDRX */
+#define NFCT_INTENCLR_ENDRX_Pos (11UL) /*!< Position of ENDRX field. */
+#define NFCT_INTENCLR_ENDRX_Msk (0x1UL << NFCT_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */
+#define NFCT_INTENCLR_ENDRX_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENCLR_ENDRX_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENCLR_ENDRX_Clear (1UL) /*!< Disable */
+
+/* Bit 10 : Write '1' to disable interrupt for event RXERROR */
+#define NFCT_INTENCLR_RXERROR_Pos (10UL) /*!< Position of RXERROR field. */
+#define NFCT_INTENCLR_RXERROR_Msk (0x1UL << NFCT_INTENCLR_RXERROR_Pos) /*!< Bit mask of RXERROR field. */
+#define NFCT_INTENCLR_RXERROR_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENCLR_RXERROR_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENCLR_RXERROR_Clear (1UL) /*!< Disable */
+
+/* Bit 7 : Write '1' to disable interrupt for event ERROR */
+#define NFCT_INTENCLR_ERROR_Pos (7UL) /*!< Position of ERROR field. */
+#define NFCT_INTENCLR_ERROR_Msk (0x1UL << NFCT_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define NFCT_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENCLR_ERROR_Clear (1UL) /*!< Disable */
+
+/* Bit 6 : Write '1' to disable interrupt for event RXFRAMEEND */
+#define NFCT_INTENCLR_RXFRAMEEND_Pos (6UL) /*!< Position of RXFRAMEEND field. */
+#define NFCT_INTENCLR_RXFRAMEEND_Msk (0x1UL << NFCT_INTENCLR_RXFRAMEEND_Pos) /*!< Bit mask of RXFRAMEEND field. */
+#define NFCT_INTENCLR_RXFRAMEEND_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENCLR_RXFRAMEEND_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENCLR_RXFRAMEEND_Clear (1UL) /*!< Disable */
+
+/* Bit 5 : Write '1' to disable interrupt for event RXFRAMESTART */
+#define NFCT_INTENCLR_RXFRAMESTART_Pos (5UL) /*!< Position of RXFRAMESTART field. */
+#define NFCT_INTENCLR_RXFRAMESTART_Msk (0x1UL << NFCT_INTENCLR_RXFRAMESTART_Pos) /*!< Bit mask of RXFRAMESTART field. */
+#define NFCT_INTENCLR_RXFRAMESTART_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENCLR_RXFRAMESTART_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENCLR_RXFRAMESTART_Clear (1UL) /*!< Disable */
+
+/* Bit 4 : Write '1' to disable interrupt for event TXFRAMEEND */
+#define NFCT_INTENCLR_TXFRAMEEND_Pos (4UL) /*!< Position of TXFRAMEEND field. */
+#define NFCT_INTENCLR_TXFRAMEEND_Msk (0x1UL << NFCT_INTENCLR_TXFRAMEEND_Pos) /*!< Bit mask of TXFRAMEEND field. */
+#define NFCT_INTENCLR_TXFRAMEEND_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENCLR_TXFRAMEEND_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENCLR_TXFRAMEEND_Clear (1UL) /*!< Disable */
+
+/* Bit 3 : Write '1' to disable interrupt for event TXFRAMESTART */
+#define NFCT_INTENCLR_TXFRAMESTART_Pos (3UL) /*!< Position of TXFRAMESTART field. */
+#define NFCT_INTENCLR_TXFRAMESTART_Msk (0x1UL << NFCT_INTENCLR_TXFRAMESTART_Pos) /*!< Bit mask of TXFRAMESTART field. */
+#define NFCT_INTENCLR_TXFRAMESTART_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENCLR_TXFRAMESTART_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENCLR_TXFRAMESTART_Clear (1UL) /*!< Disable */
+
+/* Bit 2 : Write '1' to disable interrupt for event FIELDLOST */
+#define NFCT_INTENCLR_FIELDLOST_Pos (2UL) /*!< Position of FIELDLOST field. */
+#define NFCT_INTENCLR_FIELDLOST_Msk (0x1UL << NFCT_INTENCLR_FIELDLOST_Pos) /*!< Bit mask of FIELDLOST field. */
+#define NFCT_INTENCLR_FIELDLOST_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENCLR_FIELDLOST_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENCLR_FIELDLOST_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event FIELDDETECTED */
+#define NFCT_INTENCLR_FIELDDETECTED_Pos (1UL) /*!< Position of FIELDDETECTED field. */
+#define NFCT_INTENCLR_FIELDDETECTED_Msk (0x1UL << NFCT_INTENCLR_FIELDDETECTED_Pos) /*!< Bit mask of FIELDDETECTED field. */
+#define NFCT_INTENCLR_FIELDDETECTED_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENCLR_FIELDDETECTED_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENCLR_FIELDDETECTED_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event READY */
+#define NFCT_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */
+#define NFCT_INTENCLR_READY_Msk (0x1UL << NFCT_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */
+#define NFCT_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */
+#define NFCT_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */
+#define NFCT_INTENCLR_READY_Clear (1UL) /*!< Disable */
+
+/* Register: NFCT_ERRORSTATUS */
+/* Description: NFC Error Status register */
+
+/* Bit 0 : No STARTTX task triggered before expiration of the time set in FRAMEDELAYMAX */
+#define NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Pos (0UL) /*!< Position of FRAMEDELAYTIMEOUT field. */
+#define NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Msk (0x1UL << NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Pos) /*!< Bit mask of FRAMEDELAYTIMEOUT field. */
+
+/* Register: NFCT_FRAMESTATUS_RX */
+/* Description: Result of last incoming frame */
+
+/* Bit 3 : Overrun detected */
+#define NFCT_FRAMESTATUS_RX_OVERRUN_Pos (3UL) /*!< Position of OVERRUN field. */
+#define NFCT_FRAMESTATUS_RX_OVERRUN_Msk (0x1UL << NFCT_FRAMESTATUS_RX_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */
+#define NFCT_FRAMESTATUS_RX_OVERRUN_NoOverrun (0UL) /*!< No overrun detected */
+#define NFCT_FRAMESTATUS_RX_OVERRUN_Overrun (1UL) /*!< Overrun error */
+
+/* Bit 2 : Parity status of received frame */
+#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_Pos (2UL) /*!< Position of PARITYSTATUS field. */
+#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_Msk (0x1UL << NFCT_FRAMESTATUS_RX_PARITYSTATUS_Pos) /*!< Bit mask of PARITYSTATUS field. */
+#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_ParityOK (0UL) /*!< Frame received with parity OK */
+#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_ParityError (1UL) /*!< Frame received with parity error */
+
+/* Bit 0 : No valid end of frame (EoF) detected */
+#define NFCT_FRAMESTATUS_RX_CRCERROR_Pos (0UL) /*!< Position of CRCERROR field. */
+#define NFCT_FRAMESTATUS_RX_CRCERROR_Msk (0x1UL << NFCT_FRAMESTATUS_RX_CRCERROR_Pos) /*!< Bit mask of CRCERROR field. */
+#define NFCT_FRAMESTATUS_RX_CRCERROR_CRCCorrect (0UL) /*!< Valid CRC detected */
+#define NFCT_FRAMESTATUS_RX_CRCERROR_CRCError (1UL) /*!< CRC received does not match local check */
+
+/* Register: NFCT_NFCTAGSTATE */
+/* Description: NfcTag state register */
+
+/* Bits 2..0 : NfcTag state */
+#define NFCT_NFCTAGSTATE_NFCTAGSTATE_Pos (0UL) /*!< Position of NFCTAGSTATE field. */
+#define NFCT_NFCTAGSTATE_NFCTAGSTATE_Msk (0x7UL << NFCT_NFCTAGSTATE_NFCTAGSTATE_Pos) /*!< Bit mask of NFCTAGSTATE field. */
+#define NFCT_NFCTAGSTATE_NFCTAGSTATE_Disabled (0UL) /*!< Disabled or sense */
+#define NFCT_NFCTAGSTATE_NFCTAGSTATE_RampUp (2UL) /*!< RampUp */
+#define NFCT_NFCTAGSTATE_NFCTAGSTATE_Idle (3UL) /*!< Idle */
+#define NFCT_NFCTAGSTATE_NFCTAGSTATE_Receive (4UL) /*!< Receive */
+#define NFCT_NFCTAGSTATE_NFCTAGSTATE_FrameDelay (5UL) /*!< FrameDelay */
+#define NFCT_NFCTAGSTATE_NFCTAGSTATE_Transmit (6UL) /*!< Transmit */
+
+/* Register: NFCT_SLEEPSTATE */
+/* Description: Sleep state during automatic collision resolution */
+
+/* Bit 0 : Reflects the sleep state during automatic collision resolution. Set to IDLE
+ by a GOIDLE task. Set to SLEEP_A when a valid SLEEP_REQ frame is received or by a
+ GOSLEEP task. */
+#define NFCT_SLEEPSTATE_SLEEPSTATE_Pos (0UL) /*!< Position of SLEEPSTATE field. */
+#define NFCT_SLEEPSTATE_SLEEPSTATE_Msk (0x1UL << NFCT_SLEEPSTATE_SLEEPSTATE_Pos) /*!< Bit mask of SLEEPSTATE field. */
+#define NFCT_SLEEPSTATE_SLEEPSTATE_Idle (0UL) /*!< State is IDLE. */
+#define NFCT_SLEEPSTATE_SLEEPSTATE_SleepA (1UL) /*!< State is SLEEP_A. */
+
+/* Register: NFCT_FIELDPRESENT */
+/* Description: Indicates the presence or not of a valid field */
+
+/* Bit 1 : Indicates if the low level has locked to the field */
+#define NFCT_FIELDPRESENT_LOCKDETECT_Pos (1UL) /*!< Position of LOCKDETECT field. */
+#define NFCT_FIELDPRESENT_LOCKDETECT_Msk (0x1UL << NFCT_FIELDPRESENT_LOCKDETECT_Pos) /*!< Bit mask of LOCKDETECT field. */
+#define NFCT_FIELDPRESENT_LOCKDETECT_NotLocked (0UL) /*!< Not locked to field */
+#define NFCT_FIELDPRESENT_LOCKDETECT_Locked (1UL) /*!< Locked to field */
+
+/* Bit 0 : Indicates if a valid field is present. Available only in the activated state. */
+#define NFCT_FIELDPRESENT_FIELDPRESENT_Pos (0UL) /*!< Position of FIELDPRESENT field. */
+#define NFCT_FIELDPRESENT_FIELDPRESENT_Msk (0x1UL << NFCT_FIELDPRESENT_FIELDPRESENT_Pos) /*!< Bit mask of FIELDPRESENT field. */
+#define NFCT_FIELDPRESENT_FIELDPRESENT_NoField (0UL) /*!< No valid field detected */
+#define NFCT_FIELDPRESENT_FIELDPRESENT_FieldPresent (1UL) /*!< Valid field detected */
+
+/* Register: NFCT_FRAMEDELAYMIN */
+/* Description: Minimum frame delay */
+
+/* Bits 15..0 : Minimum frame delay in number of 13.56 MHz clocks */
+#define NFCT_FRAMEDELAYMIN_FRAMEDELAYMIN_Pos (0UL) /*!< Position of FRAMEDELAYMIN field. */
+#define NFCT_FRAMEDELAYMIN_FRAMEDELAYMIN_Msk (0xFFFFUL << NFCT_FRAMEDELAYMIN_FRAMEDELAYMIN_Pos) /*!< Bit mask of FRAMEDELAYMIN field. */
+
+/* Register: NFCT_FRAMEDELAYMAX */
+/* Description: Maximum frame delay */
+
+/* Bits 19..0 : Maximum frame delay in number of 13.56 MHz clocks */
+#define NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Pos (0UL) /*!< Position of FRAMEDELAYMAX field. */
+#define NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Msk (0xFFFFFUL << NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Pos) /*!< Bit mask of FRAMEDELAYMAX field. */
+
+/* Register: NFCT_FRAMEDELAYMODE */
+/* Description: Configuration register for the Frame Delay Timer */
+
+/* Bits 1..0 : Configuration register for the Frame Delay Timer */
+#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Pos (0UL) /*!< Position of FRAMEDELAYMODE field. */
+#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Msk (0x3UL << NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Pos) /*!< Bit mask of FRAMEDELAYMODE field. */
+#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_FreeRun (0UL) /*!< Transmission is independent of frame timer and will start when the STARTTX task is triggered. No timeout. */
+#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Window (1UL) /*!< Frame is transmitted between FRAMEDELAYMIN and FRAMEDELAYMAX */
+#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_ExactVal (2UL) /*!< Frame is transmitted exactly at FRAMEDELAYMAX */
+#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_WindowGrid (3UL) /*!< Frame is transmitted on a bit grid between FRAMEDELAYMIN and FRAMEDELAYMAX */
+
+/* Register: NFCT_PACKETPTR */
+/* Description: Packet pointer for TXD and RXD data storage in Data RAM */
+
+/* Bits 31..0 : Packet pointer for TXD and RXD data storage in Data RAM. This address is a byte-aligned RAM address. */
+#define NFCT_PACKETPTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define NFCT_PACKETPTR_PTR_Msk (0xFFFFFFFFUL << NFCT_PACKETPTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: NFCT_MAXLEN */
+/* Description: Size of the RAM buffer allocated to TXD and RXD data storage each */
+
+/* Bits 8..0 : Size of the RAM buffer allocated to TXD and RXD data storage each */
+#define NFCT_MAXLEN_MAXLEN_Pos (0UL) /*!< Position of MAXLEN field. */
+#define NFCT_MAXLEN_MAXLEN_Msk (0x1FFUL << NFCT_MAXLEN_MAXLEN_Pos) /*!< Bit mask of MAXLEN field. */
+
+/* Register: NFCT_TXD_FRAMECONFIG */
+/* Description: Configuration of outgoing frames */
+
+/* Bit 4 : CRC mode for outgoing frames */
+#define NFCT_TXD_FRAMECONFIG_CRCMODETX_Pos (4UL) /*!< Position of CRCMODETX field. */
+#define NFCT_TXD_FRAMECONFIG_CRCMODETX_Msk (0x1UL << NFCT_TXD_FRAMECONFIG_CRCMODETX_Pos) /*!< Bit mask of CRCMODETX field. */
+#define NFCT_TXD_FRAMECONFIG_CRCMODETX_NoCRCTX (0UL) /*!< CRC is not added to the frame */
+#define NFCT_TXD_FRAMECONFIG_CRCMODETX_CRC16TX (1UL) /*!< 16 bit CRC added to the frame based on all the data read from RAM that is used in the frame */
+
+/* Bit 2 : Adding SoF or not in TX frames */
+#define NFCT_TXD_FRAMECONFIG_SOF_Pos (2UL) /*!< Position of SOF field. */
+#define NFCT_TXD_FRAMECONFIG_SOF_Msk (0x1UL << NFCT_TXD_FRAMECONFIG_SOF_Pos) /*!< Bit mask of SOF field. */
+#define NFCT_TXD_FRAMECONFIG_SOF_NoSoF (0UL) /*!< SoF symbol not added */
+#define NFCT_TXD_FRAMECONFIG_SOF_SoF (1UL) /*!< SoF symbol added */
+
+/* Bit 1 : Discarding unused bits at start or end of a frame */
+#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_Pos (1UL) /*!< Position of DISCARDMODE field. */
+#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_Msk (0x1UL << NFCT_TXD_FRAMECONFIG_DISCARDMODE_Pos) /*!< Bit mask of DISCARDMODE field. */
+#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_DiscardEnd (0UL) /*!< Unused bits are discarded at end of frame (EoF) */
+#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_DiscardStart (1UL) /*!< Unused bits are discarded at start of frame (SoF) */
+
+/* Bit 0 : Indicates if parity is added to the frame */
+#define NFCT_TXD_FRAMECONFIG_PARITY_Pos (0UL) /*!< Position of PARITY field. */
+#define NFCT_TXD_FRAMECONFIG_PARITY_Msk (0x1UL << NFCT_TXD_FRAMECONFIG_PARITY_Pos) /*!< Bit mask of PARITY field. */
+#define NFCT_TXD_FRAMECONFIG_PARITY_NoParity (0UL) /*!< Parity is not added to TX frames */
+#define NFCT_TXD_FRAMECONFIG_PARITY_Parity (1UL) /*!< Parity is added to TX frames */
+
+/* Register: NFCT_TXD_AMOUNT */
+/* Description: Size of outgoing frame */
+
+/* Bits 11..3 : Number of complete bytes that shall be included in the frame, excluding CRC, parity and framing */
+#define NFCT_TXD_AMOUNT_TXDATABYTES_Pos (3UL) /*!< Position of TXDATABYTES field. */
+#define NFCT_TXD_AMOUNT_TXDATABYTES_Msk (0x1FFUL << NFCT_TXD_AMOUNT_TXDATABYTES_Pos) /*!< Bit mask of TXDATABYTES field. */
+
+/* Bits 2..0 : Number of bits in the last or first byte read from RAM that shall be included in the frame (excluding parity bit). */
+#define NFCT_TXD_AMOUNT_TXDATABITS_Pos (0UL) /*!< Position of TXDATABITS field. */
+#define NFCT_TXD_AMOUNT_TXDATABITS_Msk (0x7UL << NFCT_TXD_AMOUNT_TXDATABITS_Pos) /*!< Bit mask of TXDATABITS field. */
+
+/* Register: NFCT_RXD_FRAMECONFIG */
+/* Description: Configuration of incoming frames */
+
+/* Bit 4 : CRC mode for incoming frames */
+#define NFCT_RXD_FRAMECONFIG_CRCMODERX_Pos (4UL) /*!< Position of CRCMODERX field. */
+#define NFCT_RXD_FRAMECONFIG_CRCMODERX_Msk (0x1UL << NFCT_RXD_FRAMECONFIG_CRCMODERX_Pos) /*!< Bit mask of CRCMODERX field. */
+#define NFCT_RXD_FRAMECONFIG_CRCMODERX_NoCRCRX (0UL) /*!< CRC is not expected in RX frames */
+#define NFCT_RXD_FRAMECONFIG_CRCMODERX_CRC16RX (1UL) /*!< Last 16 bits in RX frame is CRC, CRC is checked and CRCSTATUS updated */
+
+/* Bit 2 : SoF expected or not in RX frames */
+#define NFCT_RXD_FRAMECONFIG_SOF_Pos (2UL) /*!< Position of SOF field. */
+#define NFCT_RXD_FRAMECONFIG_SOF_Msk (0x1UL << NFCT_RXD_FRAMECONFIG_SOF_Pos) /*!< Bit mask of SOF field. */
+#define NFCT_RXD_FRAMECONFIG_SOF_NoSoF (0UL) /*!< SoF symbol is not expected in RX frames */
+#define NFCT_RXD_FRAMECONFIG_SOF_SoF (1UL) /*!< SoF symbol is expected in RX frames */
+
+/* Bit 0 : Indicates if parity expected in RX frame */
+#define NFCT_RXD_FRAMECONFIG_PARITY_Pos (0UL) /*!< Position of PARITY field. */
+#define NFCT_RXD_FRAMECONFIG_PARITY_Msk (0x1UL << NFCT_RXD_FRAMECONFIG_PARITY_Pos) /*!< Bit mask of PARITY field. */
+#define NFCT_RXD_FRAMECONFIG_PARITY_NoParity (0UL) /*!< Parity is not expected in RX frames */
+#define NFCT_RXD_FRAMECONFIG_PARITY_Parity (1UL) /*!< Parity is expected in RX frames */
+
+/* Register: NFCT_RXD_AMOUNT */
+/* Description: Size of last incoming frame */
+
+/* Bits 11..3 : Number of complete bytes received in the frame (including CRC, but excluding parity and SoF/EoF framing) */
+#define NFCT_RXD_AMOUNT_RXDATABYTES_Pos (3UL) /*!< Position of RXDATABYTES field. */
+#define NFCT_RXD_AMOUNT_RXDATABYTES_Msk (0x1FFUL << NFCT_RXD_AMOUNT_RXDATABYTES_Pos) /*!< Bit mask of RXDATABYTES field. */
+
+/* Bits 2..0 : Number of bits in the last byte in the frame, if less than 8 (including CRC, but excluding parity and SoF/EoF framing). */
+#define NFCT_RXD_AMOUNT_RXDATABITS_Pos (0UL) /*!< Position of RXDATABITS field. */
+#define NFCT_RXD_AMOUNT_RXDATABITS_Msk (0x7UL << NFCT_RXD_AMOUNT_RXDATABITS_Pos) /*!< Bit mask of RXDATABITS field. */
+
+/* Register: NFCT_MODULATIONCTRL */
+/* Description: Enables the modulation output to a GPIO pin which can be connected to a second external antenna. */
+
+/* Bits 1..0 : Configuration of modulation control. */
+#define NFCT_MODULATIONCTRL_MODULATIONCTRL_Pos (0UL) /*!< Position of MODULATIONCTRL field. */
+#define NFCT_MODULATIONCTRL_MODULATIONCTRL_Msk (0x3UL << NFCT_MODULATIONCTRL_MODULATIONCTRL_Pos) /*!< Bit mask of MODULATIONCTRL field. */
+#define NFCT_MODULATIONCTRL_MODULATIONCTRL_Invalid (0x0UL) /*!< Invalid, defaults to same behaviour as for Internal */
+#define NFCT_MODULATIONCTRL_MODULATIONCTRL_Internal (0x1UL) /*!< Use internal modulator only */
+#define NFCT_MODULATIONCTRL_MODULATIONCTRL_ModToGpio (0x2UL) /*!< Output digital modulation signal to a GPIO pin. */
+#define NFCT_MODULATIONCTRL_MODULATIONCTRL_InternalAndModToGpio (0x3UL) /*!< Use internal modulator and output digital modulation signal to a GPIO pin. */
+
+/* Register: NFCT_MODULATIONPSEL */
+/* Description: Pin select for Modulation control. */
+
+/* Bit 31 : Connection */
+#define NFCT_MODULATIONPSEL_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define NFCT_MODULATIONPSEL_CONNECT_Msk (0x1UL << NFCT_MODULATIONPSEL_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define NFCT_MODULATIONPSEL_CONNECT_Connected (0UL) /*!< Connect */
+#define NFCT_MODULATIONPSEL_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define NFCT_MODULATIONPSEL_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define NFCT_MODULATIONPSEL_PORT_Msk (0x1UL << NFCT_MODULATIONPSEL_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define NFCT_MODULATIONPSEL_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define NFCT_MODULATIONPSEL_PIN_Msk (0x1FUL << NFCT_MODULATIONPSEL_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: NFCT_NFCID1_LAST */
+/* Description: Last NFCID1 part (4, 7 or 10 bytes ID) */
+
+/* Bits 31..24 : NFCID1 byte W */
+#define NFCT_NFCID1_LAST_NFCID1_W_Pos (24UL) /*!< Position of NFCID1_W field. */
+#define NFCT_NFCID1_LAST_NFCID1_W_Msk (0xFFUL << NFCT_NFCID1_LAST_NFCID1_W_Pos) /*!< Bit mask of NFCID1_W field. */
+
+/* Bits 23..16 : NFCID1 byte X */
+#define NFCT_NFCID1_LAST_NFCID1_X_Pos (16UL) /*!< Position of NFCID1_X field. */
+#define NFCT_NFCID1_LAST_NFCID1_X_Msk (0xFFUL << NFCT_NFCID1_LAST_NFCID1_X_Pos) /*!< Bit mask of NFCID1_X field. */
+
+/* Bits 15..8 : NFCID1 byte Y */
+#define NFCT_NFCID1_LAST_NFCID1_Y_Pos (8UL) /*!< Position of NFCID1_Y field. */
+#define NFCT_NFCID1_LAST_NFCID1_Y_Msk (0xFFUL << NFCT_NFCID1_LAST_NFCID1_Y_Pos) /*!< Bit mask of NFCID1_Y field. */
+
+/* Bits 7..0 : NFCID1 byte Z (very last byte sent) */
+#define NFCT_NFCID1_LAST_NFCID1_Z_Pos (0UL) /*!< Position of NFCID1_Z field. */
+#define NFCT_NFCID1_LAST_NFCID1_Z_Msk (0xFFUL << NFCT_NFCID1_LAST_NFCID1_Z_Pos) /*!< Bit mask of NFCID1_Z field. */
+
+/* Register: NFCT_NFCID1_2ND_LAST */
+/* Description: Second last NFCID1 part (7 or 10 bytes ID) */
+
+/* Bits 23..16 : NFCID1 byte T */
+#define NFCT_NFCID1_2ND_LAST_NFCID1_T_Pos (16UL) /*!< Position of NFCID1_T field. */
+#define NFCT_NFCID1_2ND_LAST_NFCID1_T_Msk (0xFFUL << NFCT_NFCID1_2ND_LAST_NFCID1_T_Pos) /*!< Bit mask of NFCID1_T field. */
+
+/* Bits 15..8 : NFCID1 byte U */
+#define NFCT_NFCID1_2ND_LAST_NFCID1_U_Pos (8UL) /*!< Position of NFCID1_U field. */
+#define NFCT_NFCID1_2ND_LAST_NFCID1_U_Msk (0xFFUL << NFCT_NFCID1_2ND_LAST_NFCID1_U_Pos) /*!< Bit mask of NFCID1_U field. */
+
+/* Bits 7..0 : NFCID1 byte V */
+#define NFCT_NFCID1_2ND_LAST_NFCID1_V_Pos (0UL) /*!< Position of NFCID1_V field. */
+#define NFCT_NFCID1_2ND_LAST_NFCID1_V_Msk (0xFFUL << NFCT_NFCID1_2ND_LAST_NFCID1_V_Pos) /*!< Bit mask of NFCID1_V field. */
+
+/* Register: NFCT_NFCID1_3RD_LAST */
+/* Description: Third last NFCID1 part (10 bytes ID) */
+
+/* Bits 23..16 : NFCID1 byte Q */
+#define NFCT_NFCID1_3RD_LAST_NFCID1_Q_Pos (16UL) /*!< Position of NFCID1_Q field. */
+#define NFCT_NFCID1_3RD_LAST_NFCID1_Q_Msk (0xFFUL << NFCT_NFCID1_3RD_LAST_NFCID1_Q_Pos) /*!< Bit mask of NFCID1_Q field. */
+
+/* Bits 15..8 : NFCID1 byte R */
+#define NFCT_NFCID1_3RD_LAST_NFCID1_R_Pos (8UL) /*!< Position of NFCID1_R field. */
+#define NFCT_NFCID1_3RD_LAST_NFCID1_R_Msk (0xFFUL << NFCT_NFCID1_3RD_LAST_NFCID1_R_Pos) /*!< Bit mask of NFCID1_R field. */
+
+/* Bits 7..0 : NFCID1 byte S */
+#define NFCT_NFCID1_3RD_LAST_NFCID1_S_Pos (0UL) /*!< Position of NFCID1_S field. */
+#define NFCT_NFCID1_3RD_LAST_NFCID1_S_Msk (0xFFUL << NFCT_NFCID1_3RD_LAST_NFCID1_S_Pos) /*!< Bit mask of NFCID1_S field. */
+
+/* Register: NFCT_AUTOCOLRESCONFIG */
+/* Description: Controls the auto collision resolution function. This setting must be done before the NFCT peripheral is activated. */
+
+/* Bit 0 : Enables/disables auto collision resolution */
+#define NFCT_AUTOCOLRESCONFIG_MODE_Pos (0UL) /*!< Position of MODE field. */
+#define NFCT_AUTOCOLRESCONFIG_MODE_Msk (0x1UL << NFCT_AUTOCOLRESCONFIG_MODE_Pos) /*!< Bit mask of MODE field. */
+#define NFCT_AUTOCOLRESCONFIG_MODE_Enabled (0UL) /*!< Auto collision resolution enabled */
+#define NFCT_AUTOCOLRESCONFIG_MODE_Disabled (1UL) /*!< Auto collision resolution disabled */
+
+/* Register: NFCT_SENSRES */
+/* Description: NFC-A SENS_RES auto-response settings */
+
+/* Bits 15..12 : Reserved for future use. Shall be 0. */
+#define NFCT_SENSRES_RFU74_Pos (12UL) /*!< Position of RFU74 field. */
+#define NFCT_SENSRES_RFU74_Msk (0xFUL << NFCT_SENSRES_RFU74_Pos) /*!< Bit mask of RFU74 field. */
+
+/* Bits 11..8 : Tag platform configuration as defined by the b4:b1 of byte 2 in SENS_RES response in the NFC Forum, NFC Digital Protocol Technical Specification */
+#define NFCT_SENSRES_PLATFCONFIG_Pos (8UL) /*!< Position of PLATFCONFIG field. */
+#define NFCT_SENSRES_PLATFCONFIG_Msk (0xFUL << NFCT_SENSRES_PLATFCONFIG_Pos) /*!< Bit mask of PLATFCONFIG field. */
+
+/* Bits 7..6 : NFCID1 size. This value is used by the auto collision resolution engine. */
+#define NFCT_SENSRES_NFCIDSIZE_Pos (6UL) /*!< Position of NFCIDSIZE field. */
+#define NFCT_SENSRES_NFCIDSIZE_Msk (0x3UL << NFCT_SENSRES_NFCIDSIZE_Pos) /*!< Bit mask of NFCIDSIZE field. */
+#define NFCT_SENSRES_NFCIDSIZE_NFCID1Single (0UL) /*!< NFCID1 size: single (4 bytes) */
+#define NFCT_SENSRES_NFCIDSIZE_NFCID1Double (1UL) /*!< NFCID1 size: double (7 bytes) */
+#define NFCT_SENSRES_NFCIDSIZE_NFCID1Triple (2UL) /*!< NFCID1 size: triple (10 bytes) */
+
+/* Bit 5 : Reserved for future use. Shall be 0. */
+#define NFCT_SENSRES_RFU5_Pos (5UL) /*!< Position of RFU5 field. */
+#define NFCT_SENSRES_RFU5_Msk (0x1UL << NFCT_SENSRES_RFU5_Pos) /*!< Bit mask of RFU5 field. */
+
+/* Bits 4..0 : Bit frame SDD as defined by the b5:b1 of byte 1 in SENS_RES response in the NFC Forum, NFC Digital Protocol Technical Specification */
+#define NFCT_SENSRES_BITFRAMESDD_Pos (0UL) /*!< Position of BITFRAMESDD field. */
+#define NFCT_SENSRES_BITFRAMESDD_Msk (0x1FUL << NFCT_SENSRES_BITFRAMESDD_Pos) /*!< Bit mask of BITFRAMESDD field. */
+#define NFCT_SENSRES_BITFRAMESDD_SDD00000 (0UL) /*!< SDD pattern 00000 */
+#define NFCT_SENSRES_BITFRAMESDD_SDD00001 (1UL) /*!< SDD pattern 00001 */
+#define NFCT_SENSRES_BITFRAMESDD_SDD00010 (2UL) /*!< SDD pattern 00010 */
+#define NFCT_SENSRES_BITFRAMESDD_SDD00100 (4UL) /*!< SDD pattern 00100 */
+#define NFCT_SENSRES_BITFRAMESDD_SDD01000 (8UL) /*!< SDD pattern 01000 */
+#define NFCT_SENSRES_BITFRAMESDD_SDD10000 (16UL) /*!< SDD pattern 10000 */
+
+/* Register: NFCT_SELRES */
+/* Description: NFC-A SEL_RES auto-response settings */
+
+/* Bit 7 : Reserved for future use. Shall be 0. */
+#define NFCT_SELRES_RFU7_Pos (7UL) /*!< Position of RFU7 field. */
+#define NFCT_SELRES_RFU7_Msk (0x1UL << NFCT_SELRES_RFU7_Pos) /*!< Bit mask of RFU7 field. */
+
+/* Bits 6..5 : Protocol as defined by the b7:b6 of SEL_RES response in the NFC Forum, NFC Digital Protocol Technical Specification */
+#define NFCT_SELRES_PROTOCOL_Pos (5UL) /*!< Position of PROTOCOL field. */
+#define NFCT_SELRES_PROTOCOL_Msk (0x3UL << NFCT_SELRES_PROTOCOL_Pos) /*!< Bit mask of PROTOCOL field. */
+
+/* Bits 4..3 : Reserved for future use. Shall be 0. */
+#define NFCT_SELRES_RFU43_Pos (3UL) /*!< Position of RFU43 field. */
+#define NFCT_SELRES_RFU43_Msk (0x3UL << NFCT_SELRES_RFU43_Pos) /*!< Bit mask of RFU43 field. */
+
+/* Bit 2 : Cascade as defined by the b3 of SEL_RES response in the NFC Forum, NFC Digital Protocol Technical Specification (controlled by hardware, shall be 0) */
+#define NFCT_SELRES_CASCADE_Pos (2UL) /*!< Position of CASCADE field. */
+#define NFCT_SELRES_CASCADE_Msk (0x1UL << NFCT_SELRES_CASCADE_Pos) /*!< Bit mask of CASCADE field. */
+
+/* Bits 1..0 : Reserved for future use. Shall be 0. */
+#define NFCT_SELRES_RFU10_Pos (0UL) /*!< Position of RFU10 field. */
+#define NFCT_SELRES_RFU10_Msk (0x3UL << NFCT_SELRES_RFU10_Pos) /*!< Bit mask of RFU10 field. */
+
+
+/* Peripheral: NVMC */
+/* Description: Non Volatile Memory Controller */
+
+/* Register: NVMC_READY */
+/* Description: Ready flag */
+
+/* Bit 0 : NVMC is ready or busy */
+#define NVMC_READY_READY_Pos (0UL) /*!< Position of READY field. */
+#define NVMC_READY_READY_Msk (0x1UL << NVMC_READY_READY_Pos) /*!< Bit mask of READY field. */
+#define NVMC_READY_READY_Busy (0UL) /*!< NVMC is busy (on-going write or erase operation) */
+#define NVMC_READY_READY_Ready (1UL) /*!< NVMC is ready */
+
+/* Register: NVMC_READYNEXT */
+/* Description: Ready flag */
+
+/* Bit 0 : NVMC can accept a new write operation */
+#define NVMC_READYNEXT_READYNEXT_Pos (0UL) /*!< Position of READYNEXT field. */
+#define NVMC_READYNEXT_READYNEXT_Msk (0x1UL << NVMC_READYNEXT_READYNEXT_Pos) /*!< Bit mask of READYNEXT field. */
+#define NVMC_READYNEXT_READYNEXT_Busy (0UL) /*!< NVMC cannot accept any write operation */
+#define NVMC_READYNEXT_READYNEXT_Ready (1UL) /*!< NVMC is ready */
+
+/* Register: NVMC_CONFIG */
+/* Description: Configuration register */
+
+/* Bits 1..0 : Program memory access mode. It is strongly recommended to only activate erase and write modes when they are actively used. Enabling write or erase will invalidate the cache and keep it invalidated. */
+#define NVMC_CONFIG_WEN_Pos (0UL) /*!< Position of WEN field. */
+#define NVMC_CONFIG_WEN_Msk (0x3UL << NVMC_CONFIG_WEN_Pos) /*!< Bit mask of WEN field. */
+#define NVMC_CONFIG_WEN_Ren (0UL) /*!< Read only access */
+#define NVMC_CONFIG_WEN_Wen (1UL) /*!< Write enabled */
+#define NVMC_CONFIG_WEN_Een (2UL) /*!< Erase enabled */
+
+/* Register: NVMC_ERASEPAGE */
+/* Description: Register for erasing a page in code area */
+
+/* Bits 31..0 : Register for starting erase of a page in code area */
+#define NVMC_ERASEPAGE_ERASEPAGE_Pos (0UL) /*!< Position of ERASEPAGE field. */
+#define NVMC_ERASEPAGE_ERASEPAGE_Msk (0xFFFFFFFFUL << NVMC_ERASEPAGE_ERASEPAGE_Pos) /*!< Bit mask of ERASEPAGE field. */
+
+/* Register: NVMC_ERASEPCR1 */
+/* Description: Deprecated register - Register for erasing a page in code area, equivalent to ERASEPAGE */
+
+/* Bits 31..0 : Register for erasing a page in code area, equivalent to ERASEPAGE */
+#define NVMC_ERASEPCR1_ERASEPCR1_Pos (0UL) /*!< Position of ERASEPCR1 field. */
+#define NVMC_ERASEPCR1_ERASEPCR1_Msk (0xFFFFFFFFUL << NVMC_ERASEPCR1_ERASEPCR1_Pos) /*!< Bit mask of ERASEPCR1 field. */
+
+/* Register: NVMC_ERASEALL */
+/* Description: Register for erasing all non-volatile user memory */
+
+/* Bit 0 : Erase all non-volatile memory including UICR registers. Note that the erase must be enabled using CONFIG.WEN before the non-volatile memory can be erased. */
+#define NVMC_ERASEALL_ERASEALL_Pos (0UL) /*!< Position of ERASEALL field. */
+#define NVMC_ERASEALL_ERASEALL_Msk (0x1UL << NVMC_ERASEALL_ERASEALL_Pos) /*!< Bit mask of ERASEALL field. */
+#define NVMC_ERASEALL_ERASEALL_NoOperation (0UL) /*!< No operation */
+#define NVMC_ERASEALL_ERASEALL_Erase (1UL) /*!< Start chip erase */
+
+/* Register: NVMC_ERASEPCR0 */
+/* Description: Deprecated register - Register for erasing a page in code area, equivalent to ERASEPAGE */
+
+/* Bits 31..0 : Register for starting erase of a page in code area, equivalent to ERASEPAGE */
+#define NVMC_ERASEPCR0_ERASEPCR0_Pos (0UL) /*!< Position of ERASEPCR0 field. */
+#define NVMC_ERASEPCR0_ERASEPCR0_Msk (0xFFFFFFFFUL << NVMC_ERASEPCR0_ERASEPCR0_Pos) /*!< Bit mask of ERASEPCR0 field. */
+
+/* Register: NVMC_ERASEUICR */
+/* Description: Register for erasing user information configuration registers */
+
+/* Bit 0 : Register starting erase of all user information configuration registers. Note that the erase must be enabled using CONFIG.WEN before the UICR can be erased. */
+#define NVMC_ERASEUICR_ERASEUICR_Pos (0UL) /*!< Position of ERASEUICR field. */
+#define NVMC_ERASEUICR_ERASEUICR_Msk (0x1UL << NVMC_ERASEUICR_ERASEUICR_Pos) /*!< Bit mask of ERASEUICR field. */
+#define NVMC_ERASEUICR_ERASEUICR_NoOperation (0UL) /*!< No operation */
+#define NVMC_ERASEUICR_ERASEUICR_Erase (1UL) /*!< Start erase of UICR */
+
+/* Register: NVMC_ERASEPAGEPARTIAL */
+/* Description: Register for partial erase of a page in code area */
+
+/* Bits 31..0 : Register for starting partial erase of a page in code area */
+#define NVMC_ERASEPAGEPARTIAL_ERASEPAGEPARTIAL_Pos (0UL) /*!< Position of ERASEPAGEPARTIAL field. */
+#define NVMC_ERASEPAGEPARTIAL_ERASEPAGEPARTIAL_Msk (0xFFFFFFFFUL << NVMC_ERASEPAGEPARTIAL_ERASEPAGEPARTIAL_Pos) /*!< Bit mask of ERASEPAGEPARTIAL field. */
+
+/* Register: NVMC_ERASEPAGEPARTIALCFG */
+/* Description: Register for partial erase configuration */
+
+/* Bits 6..0 : Duration of the partial erase in milliseconds */
+#define NVMC_ERASEPAGEPARTIALCFG_DURATION_Pos (0UL) /*!< Position of DURATION field. */
+#define NVMC_ERASEPAGEPARTIALCFG_DURATION_Msk (0x7FUL << NVMC_ERASEPAGEPARTIALCFG_DURATION_Pos) /*!< Bit mask of DURATION field. */
+
+/* Register: NVMC_ICACHECNF */
+/* Description: I-code cache configuration register */
+
+/* Bit 8 : Cache profiling enable */
+#define NVMC_ICACHECNF_CACHEPROFEN_Pos (8UL) /*!< Position of CACHEPROFEN field. */
+#define NVMC_ICACHECNF_CACHEPROFEN_Msk (0x1UL << NVMC_ICACHECNF_CACHEPROFEN_Pos) /*!< Bit mask of CACHEPROFEN field. */
+#define NVMC_ICACHECNF_CACHEPROFEN_Disabled (0UL) /*!< Disable cache profiling */
+#define NVMC_ICACHECNF_CACHEPROFEN_Enabled (1UL) /*!< Enable cache profiling */
+
+/* Bit 0 : Cache enable */
+#define NVMC_ICACHECNF_CACHEEN_Pos (0UL) /*!< Position of CACHEEN field. */
+#define NVMC_ICACHECNF_CACHEEN_Msk (0x1UL << NVMC_ICACHECNF_CACHEEN_Pos) /*!< Bit mask of CACHEEN field. */
+#define NVMC_ICACHECNF_CACHEEN_Disabled (0UL) /*!< Disable cache. Invalidates all cache entries. */
+#define NVMC_ICACHECNF_CACHEEN_Enabled (1UL) /*!< Enable cache */
+
+/* Register: NVMC_IHIT */
+/* Description: I-code cache hit counter */
+
+/* Bits 31..0 : Number of cache hits */
+#define NVMC_IHIT_HITS_Pos (0UL) /*!< Position of HITS field. */
+#define NVMC_IHIT_HITS_Msk (0xFFFFFFFFUL << NVMC_IHIT_HITS_Pos) /*!< Bit mask of HITS field. */
+
+/* Register: NVMC_IMISS */
+/* Description: I-code cache miss counter */
+
+/* Bits 31..0 : Number of cache misses */
+#define NVMC_IMISS_MISSES_Pos (0UL) /*!< Position of MISSES field. */
+#define NVMC_IMISS_MISSES_Msk (0xFFFFFFFFUL << NVMC_IMISS_MISSES_Pos) /*!< Bit mask of MISSES field. */
+
+
+/* Peripheral: GPIO */
+/* Description: GPIO Port 1 */
+
+/* Register: GPIO_OUT */
+/* Description: Write GPIO port */
+
+/* Bit 31 : Pin 31 */
+#define GPIO_OUT_PIN31_Pos (31UL) /*!< Position of PIN31 field. */
+#define GPIO_OUT_PIN31_Msk (0x1UL << GPIO_OUT_PIN31_Pos) /*!< Bit mask of PIN31 field. */
+#define GPIO_OUT_PIN31_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN31_High (1UL) /*!< Pin driver is high */
+
+/* Bit 30 : Pin 30 */
+#define GPIO_OUT_PIN30_Pos (30UL) /*!< Position of PIN30 field. */
+#define GPIO_OUT_PIN30_Msk (0x1UL << GPIO_OUT_PIN30_Pos) /*!< Bit mask of PIN30 field. */
+#define GPIO_OUT_PIN30_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN30_High (1UL) /*!< Pin driver is high */
+
+/* Bit 29 : Pin 29 */
+#define GPIO_OUT_PIN29_Pos (29UL) /*!< Position of PIN29 field. */
+#define GPIO_OUT_PIN29_Msk (0x1UL << GPIO_OUT_PIN29_Pos) /*!< Bit mask of PIN29 field. */
+#define GPIO_OUT_PIN29_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN29_High (1UL) /*!< Pin driver is high */
+
+/* Bit 28 : Pin 28 */
+#define GPIO_OUT_PIN28_Pos (28UL) /*!< Position of PIN28 field. */
+#define GPIO_OUT_PIN28_Msk (0x1UL << GPIO_OUT_PIN28_Pos) /*!< Bit mask of PIN28 field. */
+#define GPIO_OUT_PIN28_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN28_High (1UL) /*!< Pin driver is high */
+
+/* Bit 27 : Pin 27 */
+#define GPIO_OUT_PIN27_Pos (27UL) /*!< Position of PIN27 field. */
+#define GPIO_OUT_PIN27_Msk (0x1UL << GPIO_OUT_PIN27_Pos) /*!< Bit mask of PIN27 field. */
+#define GPIO_OUT_PIN27_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN27_High (1UL) /*!< Pin driver is high */
+
+/* Bit 26 : Pin 26 */
+#define GPIO_OUT_PIN26_Pos (26UL) /*!< Position of PIN26 field. */
+#define GPIO_OUT_PIN26_Msk (0x1UL << GPIO_OUT_PIN26_Pos) /*!< Bit mask of PIN26 field. */
+#define GPIO_OUT_PIN26_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN26_High (1UL) /*!< Pin driver is high */
+
+/* Bit 25 : Pin 25 */
+#define GPIO_OUT_PIN25_Pos (25UL) /*!< Position of PIN25 field. */
+#define GPIO_OUT_PIN25_Msk (0x1UL << GPIO_OUT_PIN25_Pos) /*!< Bit mask of PIN25 field. */
+#define GPIO_OUT_PIN25_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN25_High (1UL) /*!< Pin driver is high */
+
+/* Bit 24 : Pin 24 */
+#define GPIO_OUT_PIN24_Pos (24UL) /*!< Position of PIN24 field. */
+#define GPIO_OUT_PIN24_Msk (0x1UL << GPIO_OUT_PIN24_Pos) /*!< Bit mask of PIN24 field. */
+#define GPIO_OUT_PIN24_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN24_High (1UL) /*!< Pin driver is high */
+
+/* Bit 23 : Pin 23 */
+#define GPIO_OUT_PIN23_Pos (23UL) /*!< Position of PIN23 field. */
+#define GPIO_OUT_PIN23_Msk (0x1UL << GPIO_OUT_PIN23_Pos) /*!< Bit mask of PIN23 field. */
+#define GPIO_OUT_PIN23_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN23_High (1UL) /*!< Pin driver is high */
+
+/* Bit 22 : Pin 22 */
+#define GPIO_OUT_PIN22_Pos (22UL) /*!< Position of PIN22 field. */
+#define GPIO_OUT_PIN22_Msk (0x1UL << GPIO_OUT_PIN22_Pos) /*!< Bit mask of PIN22 field. */
+#define GPIO_OUT_PIN22_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN22_High (1UL) /*!< Pin driver is high */
+
+/* Bit 21 : Pin 21 */
+#define GPIO_OUT_PIN21_Pos (21UL) /*!< Position of PIN21 field. */
+#define GPIO_OUT_PIN21_Msk (0x1UL << GPIO_OUT_PIN21_Pos) /*!< Bit mask of PIN21 field. */
+#define GPIO_OUT_PIN21_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN21_High (1UL) /*!< Pin driver is high */
+
+/* Bit 20 : Pin 20 */
+#define GPIO_OUT_PIN20_Pos (20UL) /*!< Position of PIN20 field. */
+#define GPIO_OUT_PIN20_Msk (0x1UL << GPIO_OUT_PIN20_Pos) /*!< Bit mask of PIN20 field. */
+#define GPIO_OUT_PIN20_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN20_High (1UL) /*!< Pin driver is high */
+
+/* Bit 19 : Pin 19 */
+#define GPIO_OUT_PIN19_Pos (19UL) /*!< Position of PIN19 field. */
+#define GPIO_OUT_PIN19_Msk (0x1UL << GPIO_OUT_PIN19_Pos) /*!< Bit mask of PIN19 field. */
+#define GPIO_OUT_PIN19_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN19_High (1UL) /*!< Pin driver is high */
+
+/* Bit 18 : Pin 18 */
+#define GPIO_OUT_PIN18_Pos (18UL) /*!< Position of PIN18 field. */
+#define GPIO_OUT_PIN18_Msk (0x1UL << GPIO_OUT_PIN18_Pos) /*!< Bit mask of PIN18 field. */
+#define GPIO_OUT_PIN18_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN18_High (1UL) /*!< Pin driver is high */
+
+/* Bit 17 : Pin 17 */
+#define GPIO_OUT_PIN17_Pos (17UL) /*!< Position of PIN17 field. */
+#define GPIO_OUT_PIN17_Msk (0x1UL << GPIO_OUT_PIN17_Pos) /*!< Bit mask of PIN17 field. */
+#define GPIO_OUT_PIN17_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN17_High (1UL) /*!< Pin driver is high */
+
+/* Bit 16 : Pin 16 */
+#define GPIO_OUT_PIN16_Pos (16UL) /*!< Position of PIN16 field. */
+#define GPIO_OUT_PIN16_Msk (0x1UL << GPIO_OUT_PIN16_Pos) /*!< Bit mask of PIN16 field. */
+#define GPIO_OUT_PIN16_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN16_High (1UL) /*!< Pin driver is high */
+
+/* Bit 15 : Pin 15 */
+#define GPIO_OUT_PIN15_Pos (15UL) /*!< Position of PIN15 field. */
+#define GPIO_OUT_PIN15_Msk (0x1UL << GPIO_OUT_PIN15_Pos) /*!< Bit mask of PIN15 field. */
+#define GPIO_OUT_PIN15_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN15_High (1UL) /*!< Pin driver is high */
+
+/* Bit 14 : Pin 14 */
+#define GPIO_OUT_PIN14_Pos (14UL) /*!< Position of PIN14 field. */
+#define GPIO_OUT_PIN14_Msk (0x1UL << GPIO_OUT_PIN14_Pos) /*!< Bit mask of PIN14 field. */
+#define GPIO_OUT_PIN14_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN14_High (1UL) /*!< Pin driver is high */
+
+/* Bit 13 : Pin 13 */
+#define GPIO_OUT_PIN13_Pos (13UL) /*!< Position of PIN13 field. */
+#define GPIO_OUT_PIN13_Msk (0x1UL << GPIO_OUT_PIN13_Pos) /*!< Bit mask of PIN13 field. */
+#define GPIO_OUT_PIN13_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN13_High (1UL) /*!< Pin driver is high */
+
+/* Bit 12 : Pin 12 */
+#define GPIO_OUT_PIN12_Pos (12UL) /*!< Position of PIN12 field. */
+#define GPIO_OUT_PIN12_Msk (0x1UL << GPIO_OUT_PIN12_Pos) /*!< Bit mask of PIN12 field. */
+#define GPIO_OUT_PIN12_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN12_High (1UL) /*!< Pin driver is high */
+
+/* Bit 11 : Pin 11 */
+#define GPIO_OUT_PIN11_Pos (11UL) /*!< Position of PIN11 field. */
+#define GPIO_OUT_PIN11_Msk (0x1UL << GPIO_OUT_PIN11_Pos) /*!< Bit mask of PIN11 field. */
+#define GPIO_OUT_PIN11_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN11_High (1UL) /*!< Pin driver is high */
+
+/* Bit 10 : Pin 10 */
+#define GPIO_OUT_PIN10_Pos (10UL) /*!< Position of PIN10 field. */
+#define GPIO_OUT_PIN10_Msk (0x1UL << GPIO_OUT_PIN10_Pos) /*!< Bit mask of PIN10 field. */
+#define GPIO_OUT_PIN10_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN10_High (1UL) /*!< Pin driver is high */
+
+/* Bit 9 : Pin 9 */
+#define GPIO_OUT_PIN9_Pos (9UL) /*!< Position of PIN9 field. */
+#define GPIO_OUT_PIN9_Msk (0x1UL << GPIO_OUT_PIN9_Pos) /*!< Bit mask of PIN9 field. */
+#define GPIO_OUT_PIN9_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN9_High (1UL) /*!< Pin driver is high */
+
+/* Bit 8 : Pin 8 */
+#define GPIO_OUT_PIN8_Pos (8UL) /*!< Position of PIN8 field. */
+#define GPIO_OUT_PIN8_Msk (0x1UL << GPIO_OUT_PIN8_Pos) /*!< Bit mask of PIN8 field. */
+#define GPIO_OUT_PIN8_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN8_High (1UL) /*!< Pin driver is high */
+
+/* Bit 7 : Pin 7 */
+#define GPIO_OUT_PIN7_Pos (7UL) /*!< Position of PIN7 field. */
+#define GPIO_OUT_PIN7_Msk (0x1UL << GPIO_OUT_PIN7_Pos) /*!< Bit mask of PIN7 field. */
+#define GPIO_OUT_PIN7_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN7_High (1UL) /*!< Pin driver is high */
+
+/* Bit 6 : Pin 6 */
+#define GPIO_OUT_PIN6_Pos (6UL) /*!< Position of PIN6 field. */
+#define GPIO_OUT_PIN6_Msk (0x1UL << GPIO_OUT_PIN6_Pos) /*!< Bit mask of PIN6 field. */
+#define GPIO_OUT_PIN6_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN6_High (1UL) /*!< Pin driver is high */
+
+/* Bit 5 : Pin 5 */
+#define GPIO_OUT_PIN5_Pos (5UL) /*!< Position of PIN5 field. */
+#define GPIO_OUT_PIN5_Msk (0x1UL << GPIO_OUT_PIN5_Pos) /*!< Bit mask of PIN5 field. */
+#define GPIO_OUT_PIN5_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN5_High (1UL) /*!< Pin driver is high */
+
+/* Bit 4 : Pin 4 */
+#define GPIO_OUT_PIN4_Pos (4UL) /*!< Position of PIN4 field. */
+#define GPIO_OUT_PIN4_Msk (0x1UL << GPIO_OUT_PIN4_Pos) /*!< Bit mask of PIN4 field. */
+#define GPIO_OUT_PIN4_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN4_High (1UL) /*!< Pin driver is high */
+
+/* Bit 3 : Pin 3 */
+#define GPIO_OUT_PIN3_Pos (3UL) /*!< Position of PIN3 field. */
+#define GPIO_OUT_PIN3_Msk (0x1UL << GPIO_OUT_PIN3_Pos) /*!< Bit mask of PIN3 field. */
+#define GPIO_OUT_PIN3_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN3_High (1UL) /*!< Pin driver is high */
+
+/* Bit 2 : Pin 2 */
+#define GPIO_OUT_PIN2_Pos (2UL) /*!< Position of PIN2 field. */
+#define GPIO_OUT_PIN2_Msk (0x1UL << GPIO_OUT_PIN2_Pos) /*!< Bit mask of PIN2 field. */
+#define GPIO_OUT_PIN2_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN2_High (1UL) /*!< Pin driver is high */
+
+/* Bit 1 : Pin 1 */
+#define GPIO_OUT_PIN1_Pos (1UL) /*!< Position of PIN1 field. */
+#define GPIO_OUT_PIN1_Msk (0x1UL << GPIO_OUT_PIN1_Pos) /*!< Bit mask of PIN1 field. */
+#define GPIO_OUT_PIN1_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN1_High (1UL) /*!< Pin driver is high */
+
+/* Bit 0 : Pin 0 */
+#define GPIO_OUT_PIN0_Pos (0UL) /*!< Position of PIN0 field. */
+#define GPIO_OUT_PIN0_Msk (0x1UL << GPIO_OUT_PIN0_Pos) /*!< Bit mask of PIN0 field. */
+#define GPIO_OUT_PIN0_Low (0UL) /*!< Pin driver is low */
+#define GPIO_OUT_PIN0_High (1UL) /*!< Pin driver is high */
+
+/* Register: GPIO_OUTSET */
+/* Description: Set individual bits in GPIO port */
+
+/* Bit 31 : Pin 31 */
+#define GPIO_OUTSET_PIN31_Pos (31UL) /*!< Position of PIN31 field. */
+#define GPIO_OUTSET_PIN31_Msk (0x1UL << GPIO_OUTSET_PIN31_Pos) /*!< Bit mask of PIN31 field. */
+#define GPIO_OUTSET_PIN31_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN31_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN31_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 30 : Pin 30 */
+#define GPIO_OUTSET_PIN30_Pos (30UL) /*!< Position of PIN30 field. */
+#define GPIO_OUTSET_PIN30_Msk (0x1UL << GPIO_OUTSET_PIN30_Pos) /*!< Bit mask of PIN30 field. */
+#define GPIO_OUTSET_PIN30_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN30_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN30_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 29 : Pin 29 */
+#define GPIO_OUTSET_PIN29_Pos (29UL) /*!< Position of PIN29 field. */
+#define GPIO_OUTSET_PIN29_Msk (0x1UL << GPIO_OUTSET_PIN29_Pos) /*!< Bit mask of PIN29 field. */
+#define GPIO_OUTSET_PIN29_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN29_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN29_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 28 : Pin 28 */
+#define GPIO_OUTSET_PIN28_Pos (28UL) /*!< Position of PIN28 field. */
+#define GPIO_OUTSET_PIN28_Msk (0x1UL << GPIO_OUTSET_PIN28_Pos) /*!< Bit mask of PIN28 field. */
+#define GPIO_OUTSET_PIN28_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN28_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN28_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 27 : Pin 27 */
+#define GPIO_OUTSET_PIN27_Pos (27UL) /*!< Position of PIN27 field. */
+#define GPIO_OUTSET_PIN27_Msk (0x1UL << GPIO_OUTSET_PIN27_Pos) /*!< Bit mask of PIN27 field. */
+#define GPIO_OUTSET_PIN27_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN27_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN27_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 26 : Pin 26 */
+#define GPIO_OUTSET_PIN26_Pos (26UL) /*!< Position of PIN26 field. */
+#define GPIO_OUTSET_PIN26_Msk (0x1UL << GPIO_OUTSET_PIN26_Pos) /*!< Bit mask of PIN26 field. */
+#define GPIO_OUTSET_PIN26_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN26_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN26_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 25 : Pin 25 */
+#define GPIO_OUTSET_PIN25_Pos (25UL) /*!< Position of PIN25 field. */
+#define GPIO_OUTSET_PIN25_Msk (0x1UL << GPIO_OUTSET_PIN25_Pos) /*!< Bit mask of PIN25 field. */
+#define GPIO_OUTSET_PIN25_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN25_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN25_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 24 : Pin 24 */
+#define GPIO_OUTSET_PIN24_Pos (24UL) /*!< Position of PIN24 field. */
+#define GPIO_OUTSET_PIN24_Msk (0x1UL << GPIO_OUTSET_PIN24_Pos) /*!< Bit mask of PIN24 field. */
+#define GPIO_OUTSET_PIN24_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN24_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN24_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 23 : Pin 23 */
+#define GPIO_OUTSET_PIN23_Pos (23UL) /*!< Position of PIN23 field. */
+#define GPIO_OUTSET_PIN23_Msk (0x1UL << GPIO_OUTSET_PIN23_Pos) /*!< Bit mask of PIN23 field. */
+#define GPIO_OUTSET_PIN23_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN23_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN23_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 22 : Pin 22 */
+#define GPIO_OUTSET_PIN22_Pos (22UL) /*!< Position of PIN22 field. */
+#define GPIO_OUTSET_PIN22_Msk (0x1UL << GPIO_OUTSET_PIN22_Pos) /*!< Bit mask of PIN22 field. */
+#define GPIO_OUTSET_PIN22_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN22_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN22_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 21 : Pin 21 */
+#define GPIO_OUTSET_PIN21_Pos (21UL) /*!< Position of PIN21 field. */
+#define GPIO_OUTSET_PIN21_Msk (0x1UL << GPIO_OUTSET_PIN21_Pos) /*!< Bit mask of PIN21 field. */
+#define GPIO_OUTSET_PIN21_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN21_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN21_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 20 : Pin 20 */
+#define GPIO_OUTSET_PIN20_Pos (20UL) /*!< Position of PIN20 field. */
+#define GPIO_OUTSET_PIN20_Msk (0x1UL << GPIO_OUTSET_PIN20_Pos) /*!< Bit mask of PIN20 field. */
+#define GPIO_OUTSET_PIN20_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN20_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN20_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 19 : Pin 19 */
+#define GPIO_OUTSET_PIN19_Pos (19UL) /*!< Position of PIN19 field. */
+#define GPIO_OUTSET_PIN19_Msk (0x1UL << GPIO_OUTSET_PIN19_Pos) /*!< Bit mask of PIN19 field. */
+#define GPIO_OUTSET_PIN19_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN19_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN19_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 18 : Pin 18 */
+#define GPIO_OUTSET_PIN18_Pos (18UL) /*!< Position of PIN18 field. */
+#define GPIO_OUTSET_PIN18_Msk (0x1UL << GPIO_OUTSET_PIN18_Pos) /*!< Bit mask of PIN18 field. */
+#define GPIO_OUTSET_PIN18_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN18_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN18_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 17 : Pin 17 */
+#define GPIO_OUTSET_PIN17_Pos (17UL) /*!< Position of PIN17 field. */
+#define GPIO_OUTSET_PIN17_Msk (0x1UL << GPIO_OUTSET_PIN17_Pos) /*!< Bit mask of PIN17 field. */
+#define GPIO_OUTSET_PIN17_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN17_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN17_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 16 : Pin 16 */
+#define GPIO_OUTSET_PIN16_Pos (16UL) /*!< Position of PIN16 field. */
+#define GPIO_OUTSET_PIN16_Msk (0x1UL << GPIO_OUTSET_PIN16_Pos) /*!< Bit mask of PIN16 field. */
+#define GPIO_OUTSET_PIN16_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN16_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN16_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 15 : Pin 15 */
+#define GPIO_OUTSET_PIN15_Pos (15UL) /*!< Position of PIN15 field. */
+#define GPIO_OUTSET_PIN15_Msk (0x1UL << GPIO_OUTSET_PIN15_Pos) /*!< Bit mask of PIN15 field. */
+#define GPIO_OUTSET_PIN15_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN15_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN15_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 14 : Pin 14 */
+#define GPIO_OUTSET_PIN14_Pos (14UL) /*!< Position of PIN14 field. */
+#define GPIO_OUTSET_PIN14_Msk (0x1UL << GPIO_OUTSET_PIN14_Pos) /*!< Bit mask of PIN14 field. */
+#define GPIO_OUTSET_PIN14_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN14_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN14_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 13 : Pin 13 */
+#define GPIO_OUTSET_PIN13_Pos (13UL) /*!< Position of PIN13 field. */
+#define GPIO_OUTSET_PIN13_Msk (0x1UL << GPIO_OUTSET_PIN13_Pos) /*!< Bit mask of PIN13 field. */
+#define GPIO_OUTSET_PIN13_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN13_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN13_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 12 : Pin 12 */
+#define GPIO_OUTSET_PIN12_Pos (12UL) /*!< Position of PIN12 field. */
+#define GPIO_OUTSET_PIN12_Msk (0x1UL << GPIO_OUTSET_PIN12_Pos) /*!< Bit mask of PIN12 field. */
+#define GPIO_OUTSET_PIN12_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN12_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN12_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 11 : Pin 11 */
+#define GPIO_OUTSET_PIN11_Pos (11UL) /*!< Position of PIN11 field. */
+#define GPIO_OUTSET_PIN11_Msk (0x1UL << GPIO_OUTSET_PIN11_Pos) /*!< Bit mask of PIN11 field. */
+#define GPIO_OUTSET_PIN11_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN11_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN11_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 10 : Pin 10 */
+#define GPIO_OUTSET_PIN10_Pos (10UL) /*!< Position of PIN10 field. */
+#define GPIO_OUTSET_PIN10_Msk (0x1UL << GPIO_OUTSET_PIN10_Pos) /*!< Bit mask of PIN10 field. */
+#define GPIO_OUTSET_PIN10_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN10_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN10_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 9 : Pin 9 */
+#define GPIO_OUTSET_PIN9_Pos (9UL) /*!< Position of PIN9 field. */
+#define GPIO_OUTSET_PIN9_Msk (0x1UL << GPIO_OUTSET_PIN9_Pos) /*!< Bit mask of PIN9 field. */
+#define GPIO_OUTSET_PIN9_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN9_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN9_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 8 : Pin 8 */
+#define GPIO_OUTSET_PIN8_Pos (8UL) /*!< Position of PIN8 field. */
+#define GPIO_OUTSET_PIN8_Msk (0x1UL << GPIO_OUTSET_PIN8_Pos) /*!< Bit mask of PIN8 field. */
+#define GPIO_OUTSET_PIN8_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN8_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN8_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 7 : Pin 7 */
+#define GPIO_OUTSET_PIN7_Pos (7UL) /*!< Position of PIN7 field. */
+#define GPIO_OUTSET_PIN7_Msk (0x1UL << GPIO_OUTSET_PIN7_Pos) /*!< Bit mask of PIN7 field. */
+#define GPIO_OUTSET_PIN7_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN7_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN7_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 6 : Pin 6 */
+#define GPIO_OUTSET_PIN6_Pos (6UL) /*!< Position of PIN6 field. */
+#define GPIO_OUTSET_PIN6_Msk (0x1UL << GPIO_OUTSET_PIN6_Pos) /*!< Bit mask of PIN6 field. */
+#define GPIO_OUTSET_PIN6_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN6_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN6_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 5 : Pin 5 */
+#define GPIO_OUTSET_PIN5_Pos (5UL) /*!< Position of PIN5 field. */
+#define GPIO_OUTSET_PIN5_Msk (0x1UL << GPIO_OUTSET_PIN5_Pos) /*!< Bit mask of PIN5 field. */
+#define GPIO_OUTSET_PIN5_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN5_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN5_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 4 : Pin 4 */
+#define GPIO_OUTSET_PIN4_Pos (4UL) /*!< Position of PIN4 field. */
+#define GPIO_OUTSET_PIN4_Msk (0x1UL << GPIO_OUTSET_PIN4_Pos) /*!< Bit mask of PIN4 field. */
+#define GPIO_OUTSET_PIN4_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN4_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN4_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 3 : Pin 3 */
+#define GPIO_OUTSET_PIN3_Pos (3UL) /*!< Position of PIN3 field. */
+#define GPIO_OUTSET_PIN3_Msk (0x1UL << GPIO_OUTSET_PIN3_Pos) /*!< Bit mask of PIN3 field. */
+#define GPIO_OUTSET_PIN3_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN3_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN3_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 2 : Pin 2 */
+#define GPIO_OUTSET_PIN2_Pos (2UL) /*!< Position of PIN2 field. */
+#define GPIO_OUTSET_PIN2_Msk (0x1UL << GPIO_OUTSET_PIN2_Pos) /*!< Bit mask of PIN2 field. */
+#define GPIO_OUTSET_PIN2_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN2_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN2_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 1 : Pin 1 */
+#define GPIO_OUTSET_PIN1_Pos (1UL) /*!< Position of PIN1 field. */
+#define GPIO_OUTSET_PIN1_Msk (0x1UL << GPIO_OUTSET_PIN1_Pos) /*!< Bit mask of PIN1 field. */
+#define GPIO_OUTSET_PIN1_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN1_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN1_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Bit 0 : Pin 0 */
+#define GPIO_OUTSET_PIN0_Pos (0UL) /*!< Position of PIN0 field. */
+#define GPIO_OUTSET_PIN0_Msk (0x1UL << GPIO_OUTSET_PIN0_Pos) /*!< Bit mask of PIN0 field. */
+#define GPIO_OUTSET_PIN0_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTSET_PIN0_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTSET_PIN0_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */
+
+/* Register: GPIO_OUTCLR */
+/* Description: Clear individual bits in GPIO port */
+
+/* Bit 31 : Pin 31 */
+#define GPIO_OUTCLR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */
+#define GPIO_OUTCLR_PIN31_Msk (0x1UL << GPIO_OUTCLR_PIN31_Pos) /*!< Bit mask of PIN31 field. */
+#define GPIO_OUTCLR_PIN31_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN31_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN31_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 30 : Pin 30 */
+#define GPIO_OUTCLR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */
+#define GPIO_OUTCLR_PIN30_Msk (0x1UL << GPIO_OUTCLR_PIN30_Pos) /*!< Bit mask of PIN30 field. */
+#define GPIO_OUTCLR_PIN30_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN30_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN30_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 29 : Pin 29 */
+#define GPIO_OUTCLR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */
+#define GPIO_OUTCLR_PIN29_Msk (0x1UL << GPIO_OUTCLR_PIN29_Pos) /*!< Bit mask of PIN29 field. */
+#define GPIO_OUTCLR_PIN29_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN29_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN29_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 28 : Pin 28 */
+#define GPIO_OUTCLR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */
+#define GPIO_OUTCLR_PIN28_Msk (0x1UL << GPIO_OUTCLR_PIN28_Pos) /*!< Bit mask of PIN28 field. */
+#define GPIO_OUTCLR_PIN28_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN28_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN28_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 27 : Pin 27 */
+#define GPIO_OUTCLR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */
+#define GPIO_OUTCLR_PIN27_Msk (0x1UL << GPIO_OUTCLR_PIN27_Pos) /*!< Bit mask of PIN27 field. */
+#define GPIO_OUTCLR_PIN27_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN27_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN27_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 26 : Pin 26 */
+#define GPIO_OUTCLR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */
+#define GPIO_OUTCLR_PIN26_Msk (0x1UL << GPIO_OUTCLR_PIN26_Pos) /*!< Bit mask of PIN26 field. */
+#define GPIO_OUTCLR_PIN26_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN26_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN26_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 25 : Pin 25 */
+#define GPIO_OUTCLR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */
+#define GPIO_OUTCLR_PIN25_Msk (0x1UL << GPIO_OUTCLR_PIN25_Pos) /*!< Bit mask of PIN25 field. */
+#define GPIO_OUTCLR_PIN25_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN25_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN25_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 24 : Pin 24 */
+#define GPIO_OUTCLR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */
+#define GPIO_OUTCLR_PIN24_Msk (0x1UL << GPIO_OUTCLR_PIN24_Pos) /*!< Bit mask of PIN24 field. */
+#define GPIO_OUTCLR_PIN24_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN24_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN24_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 23 : Pin 23 */
+#define GPIO_OUTCLR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */
+#define GPIO_OUTCLR_PIN23_Msk (0x1UL << GPIO_OUTCLR_PIN23_Pos) /*!< Bit mask of PIN23 field. */
+#define GPIO_OUTCLR_PIN23_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN23_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN23_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 22 : Pin 22 */
+#define GPIO_OUTCLR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */
+#define GPIO_OUTCLR_PIN22_Msk (0x1UL << GPIO_OUTCLR_PIN22_Pos) /*!< Bit mask of PIN22 field. */
+#define GPIO_OUTCLR_PIN22_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN22_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN22_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 21 : Pin 21 */
+#define GPIO_OUTCLR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */
+#define GPIO_OUTCLR_PIN21_Msk (0x1UL << GPIO_OUTCLR_PIN21_Pos) /*!< Bit mask of PIN21 field. */
+#define GPIO_OUTCLR_PIN21_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN21_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN21_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 20 : Pin 20 */
+#define GPIO_OUTCLR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */
+#define GPIO_OUTCLR_PIN20_Msk (0x1UL << GPIO_OUTCLR_PIN20_Pos) /*!< Bit mask of PIN20 field. */
+#define GPIO_OUTCLR_PIN20_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN20_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN20_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 19 : Pin 19 */
+#define GPIO_OUTCLR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */
+#define GPIO_OUTCLR_PIN19_Msk (0x1UL << GPIO_OUTCLR_PIN19_Pos) /*!< Bit mask of PIN19 field. */
+#define GPIO_OUTCLR_PIN19_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN19_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN19_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 18 : Pin 18 */
+#define GPIO_OUTCLR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */
+#define GPIO_OUTCLR_PIN18_Msk (0x1UL << GPIO_OUTCLR_PIN18_Pos) /*!< Bit mask of PIN18 field. */
+#define GPIO_OUTCLR_PIN18_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN18_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN18_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 17 : Pin 17 */
+#define GPIO_OUTCLR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */
+#define GPIO_OUTCLR_PIN17_Msk (0x1UL << GPIO_OUTCLR_PIN17_Pos) /*!< Bit mask of PIN17 field. */
+#define GPIO_OUTCLR_PIN17_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN17_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN17_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 16 : Pin 16 */
+#define GPIO_OUTCLR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */
+#define GPIO_OUTCLR_PIN16_Msk (0x1UL << GPIO_OUTCLR_PIN16_Pos) /*!< Bit mask of PIN16 field. */
+#define GPIO_OUTCLR_PIN16_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN16_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN16_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 15 : Pin 15 */
+#define GPIO_OUTCLR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */
+#define GPIO_OUTCLR_PIN15_Msk (0x1UL << GPIO_OUTCLR_PIN15_Pos) /*!< Bit mask of PIN15 field. */
+#define GPIO_OUTCLR_PIN15_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN15_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN15_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 14 : Pin 14 */
+#define GPIO_OUTCLR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */
+#define GPIO_OUTCLR_PIN14_Msk (0x1UL << GPIO_OUTCLR_PIN14_Pos) /*!< Bit mask of PIN14 field. */
+#define GPIO_OUTCLR_PIN14_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN14_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN14_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 13 : Pin 13 */
+#define GPIO_OUTCLR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */
+#define GPIO_OUTCLR_PIN13_Msk (0x1UL << GPIO_OUTCLR_PIN13_Pos) /*!< Bit mask of PIN13 field. */
+#define GPIO_OUTCLR_PIN13_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN13_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN13_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 12 : Pin 12 */
+#define GPIO_OUTCLR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */
+#define GPIO_OUTCLR_PIN12_Msk (0x1UL << GPIO_OUTCLR_PIN12_Pos) /*!< Bit mask of PIN12 field. */
+#define GPIO_OUTCLR_PIN12_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN12_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN12_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 11 : Pin 11 */
+#define GPIO_OUTCLR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */
+#define GPIO_OUTCLR_PIN11_Msk (0x1UL << GPIO_OUTCLR_PIN11_Pos) /*!< Bit mask of PIN11 field. */
+#define GPIO_OUTCLR_PIN11_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN11_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN11_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 10 : Pin 10 */
+#define GPIO_OUTCLR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */
+#define GPIO_OUTCLR_PIN10_Msk (0x1UL << GPIO_OUTCLR_PIN10_Pos) /*!< Bit mask of PIN10 field. */
+#define GPIO_OUTCLR_PIN10_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN10_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN10_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 9 : Pin 9 */
+#define GPIO_OUTCLR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */
+#define GPIO_OUTCLR_PIN9_Msk (0x1UL << GPIO_OUTCLR_PIN9_Pos) /*!< Bit mask of PIN9 field. */
+#define GPIO_OUTCLR_PIN9_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN9_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN9_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 8 : Pin 8 */
+#define GPIO_OUTCLR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */
+#define GPIO_OUTCLR_PIN8_Msk (0x1UL << GPIO_OUTCLR_PIN8_Pos) /*!< Bit mask of PIN8 field. */
+#define GPIO_OUTCLR_PIN8_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN8_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN8_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 7 : Pin 7 */
+#define GPIO_OUTCLR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */
+#define GPIO_OUTCLR_PIN7_Msk (0x1UL << GPIO_OUTCLR_PIN7_Pos) /*!< Bit mask of PIN7 field. */
+#define GPIO_OUTCLR_PIN7_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN7_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN7_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 6 : Pin 6 */
+#define GPIO_OUTCLR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */
+#define GPIO_OUTCLR_PIN6_Msk (0x1UL << GPIO_OUTCLR_PIN6_Pos) /*!< Bit mask of PIN6 field. */
+#define GPIO_OUTCLR_PIN6_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN6_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN6_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 5 : Pin 5 */
+#define GPIO_OUTCLR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */
+#define GPIO_OUTCLR_PIN5_Msk (0x1UL << GPIO_OUTCLR_PIN5_Pos) /*!< Bit mask of PIN5 field. */
+#define GPIO_OUTCLR_PIN5_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN5_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN5_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 4 : Pin 4 */
+#define GPIO_OUTCLR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */
+#define GPIO_OUTCLR_PIN4_Msk (0x1UL << GPIO_OUTCLR_PIN4_Pos) /*!< Bit mask of PIN4 field. */
+#define GPIO_OUTCLR_PIN4_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN4_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN4_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 3 : Pin 3 */
+#define GPIO_OUTCLR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */
+#define GPIO_OUTCLR_PIN3_Msk (0x1UL << GPIO_OUTCLR_PIN3_Pos) /*!< Bit mask of PIN3 field. */
+#define GPIO_OUTCLR_PIN3_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN3_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN3_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 2 : Pin 2 */
+#define GPIO_OUTCLR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */
+#define GPIO_OUTCLR_PIN2_Msk (0x1UL << GPIO_OUTCLR_PIN2_Pos) /*!< Bit mask of PIN2 field. */
+#define GPIO_OUTCLR_PIN2_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN2_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN2_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 1 : Pin 1 */
+#define GPIO_OUTCLR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */
+#define GPIO_OUTCLR_PIN1_Msk (0x1UL << GPIO_OUTCLR_PIN1_Pos) /*!< Bit mask of PIN1 field. */
+#define GPIO_OUTCLR_PIN1_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN1_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN1_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Bit 0 : Pin 0 */
+#define GPIO_OUTCLR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */
+#define GPIO_OUTCLR_PIN0_Msk (0x1UL << GPIO_OUTCLR_PIN0_Pos) /*!< Bit mask of PIN0 field. */
+#define GPIO_OUTCLR_PIN0_Low (0UL) /*!< Read: pin driver is low */
+#define GPIO_OUTCLR_PIN0_High (1UL) /*!< Read: pin driver is high */
+#define GPIO_OUTCLR_PIN0_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */
+
+/* Register: GPIO_IN */
+/* Description: Read GPIO port */
+
+/* Bit 31 : Pin 31 */
+#define GPIO_IN_PIN31_Pos (31UL) /*!< Position of PIN31 field. */
+#define GPIO_IN_PIN31_Msk (0x1UL << GPIO_IN_PIN31_Pos) /*!< Bit mask of PIN31 field. */
+#define GPIO_IN_PIN31_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN31_High (1UL) /*!< Pin input is high */
+
+/* Bit 30 : Pin 30 */
+#define GPIO_IN_PIN30_Pos (30UL) /*!< Position of PIN30 field. */
+#define GPIO_IN_PIN30_Msk (0x1UL << GPIO_IN_PIN30_Pos) /*!< Bit mask of PIN30 field. */
+#define GPIO_IN_PIN30_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN30_High (1UL) /*!< Pin input is high */
+
+/* Bit 29 : Pin 29 */
+#define GPIO_IN_PIN29_Pos (29UL) /*!< Position of PIN29 field. */
+#define GPIO_IN_PIN29_Msk (0x1UL << GPIO_IN_PIN29_Pos) /*!< Bit mask of PIN29 field. */
+#define GPIO_IN_PIN29_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN29_High (1UL) /*!< Pin input is high */
+
+/* Bit 28 : Pin 28 */
+#define GPIO_IN_PIN28_Pos (28UL) /*!< Position of PIN28 field. */
+#define GPIO_IN_PIN28_Msk (0x1UL << GPIO_IN_PIN28_Pos) /*!< Bit mask of PIN28 field. */
+#define GPIO_IN_PIN28_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN28_High (1UL) /*!< Pin input is high */
+
+/* Bit 27 : Pin 27 */
+#define GPIO_IN_PIN27_Pos (27UL) /*!< Position of PIN27 field. */
+#define GPIO_IN_PIN27_Msk (0x1UL << GPIO_IN_PIN27_Pos) /*!< Bit mask of PIN27 field. */
+#define GPIO_IN_PIN27_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN27_High (1UL) /*!< Pin input is high */
+
+/* Bit 26 : Pin 26 */
+#define GPIO_IN_PIN26_Pos (26UL) /*!< Position of PIN26 field. */
+#define GPIO_IN_PIN26_Msk (0x1UL << GPIO_IN_PIN26_Pos) /*!< Bit mask of PIN26 field. */
+#define GPIO_IN_PIN26_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN26_High (1UL) /*!< Pin input is high */
+
+/* Bit 25 : Pin 25 */
+#define GPIO_IN_PIN25_Pos (25UL) /*!< Position of PIN25 field. */
+#define GPIO_IN_PIN25_Msk (0x1UL << GPIO_IN_PIN25_Pos) /*!< Bit mask of PIN25 field. */
+#define GPIO_IN_PIN25_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN25_High (1UL) /*!< Pin input is high */
+
+/* Bit 24 : Pin 24 */
+#define GPIO_IN_PIN24_Pos (24UL) /*!< Position of PIN24 field. */
+#define GPIO_IN_PIN24_Msk (0x1UL << GPIO_IN_PIN24_Pos) /*!< Bit mask of PIN24 field. */
+#define GPIO_IN_PIN24_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN24_High (1UL) /*!< Pin input is high */
+
+/* Bit 23 : Pin 23 */
+#define GPIO_IN_PIN23_Pos (23UL) /*!< Position of PIN23 field. */
+#define GPIO_IN_PIN23_Msk (0x1UL << GPIO_IN_PIN23_Pos) /*!< Bit mask of PIN23 field. */
+#define GPIO_IN_PIN23_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN23_High (1UL) /*!< Pin input is high */
+
+/* Bit 22 : Pin 22 */
+#define GPIO_IN_PIN22_Pos (22UL) /*!< Position of PIN22 field. */
+#define GPIO_IN_PIN22_Msk (0x1UL << GPIO_IN_PIN22_Pos) /*!< Bit mask of PIN22 field. */
+#define GPIO_IN_PIN22_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN22_High (1UL) /*!< Pin input is high */
+
+/* Bit 21 : Pin 21 */
+#define GPIO_IN_PIN21_Pos (21UL) /*!< Position of PIN21 field. */
+#define GPIO_IN_PIN21_Msk (0x1UL << GPIO_IN_PIN21_Pos) /*!< Bit mask of PIN21 field. */
+#define GPIO_IN_PIN21_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN21_High (1UL) /*!< Pin input is high */
+
+/* Bit 20 : Pin 20 */
+#define GPIO_IN_PIN20_Pos (20UL) /*!< Position of PIN20 field. */
+#define GPIO_IN_PIN20_Msk (0x1UL << GPIO_IN_PIN20_Pos) /*!< Bit mask of PIN20 field. */
+#define GPIO_IN_PIN20_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN20_High (1UL) /*!< Pin input is high */
+
+/* Bit 19 : Pin 19 */
+#define GPIO_IN_PIN19_Pos (19UL) /*!< Position of PIN19 field. */
+#define GPIO_IN_PIN19_Msk (0x1UL << GPIO_IN_PIN19_Pos) /*!< Bit mask of PIN19 field. */
+#define GPIO_IN_PIN19_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN19_High (1UL) /*!< Pin input is high */
+
+/* Bit 18 : Pin 18 */
+#define GPIO_IN_PIN18_Pos (18UL) /*!< Position of PIN18 field. */
+#define GPIO_IN_PIN18_Msk (0x1UL << GPIO_IN_PIN18_Pos) /*!< Bit mask of PIN18 field. */
+#define GPIO_IN_PIN18_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN18_High (1UL) /*!< Pin input is high */
+
+/* Bit 17 : Pin 17 */
+#define GPIO_IN_PIN17_Pos (17UL) /*!< Position of PIN17 field. */
+#define GPIO_IN_PIN17_Msk (0x1UL << GPIO_IN_PIN17_Pos) /*!< Bit mask of PIN17 field. */
+#define GPIO_IN_PIN17_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN17_High (1UL) /*!< Pin input is high */
+
+/* Bit 16 : Pin 16 */
+#define GPIO_IN_PIN16_Pos (16UL) /*!< Position of PIN16 field. */
+#define GPIO_IN_PIN16_Msk (0x1UL << GPIO_IN_PIN16_Pos) /*!< Bit mask of PIN16 field. */
+#define GPIO_IN_PIN16_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN16_High (1UL) /*!< Pin input is high */
+
+/* Bit 15 : Pin 15 */
+#define GPIO_IN_PIN15_Pos (15UL) /*!< Position of PIN15 field. */
+#define GPIO_IN_PIN15_Msk (0x1UL << GPIO_IN_PIN15_Pos) /*!< Bit mask of PIN15 field. */
+#define GPIO_IN_PIN15_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN15_High (1UL) /*!< Pin input is high */
+
+/* Bit 14 : Pin 14 */
+#define GPIO_IN_PIN14_Pos (14UL) /*!< Position of PIN14 field. */
+#define GPIO_IN_PIN14_Msk (0x1UL << GPIO_IN_PIN14_Pos) /*!< Bit mask of PIN14 field. */
+#define GPIO_IN_PIN14_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN14_High (1UL) /*!< Pin input is high */
+
+/* Bit 13 : Pin 13 */
+#define GPIO_IN_PIN13_Pos (13UL) /*!< Position of PIN13 field. */
+#define GPIO_IN_PIN13_Msk (0x1UL << GPIO_IN_PIN13_Pos) /*!< Bit mask of PIN13 field. */
+#define GPIO_IN_PIN13_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN13_High (1UL) /*!< Pin input is high */
+
+/* Bit 12 : Pin 12 */
+#define GPIO_IN_PIN12_Pos (12UL) /*!< Position of PIN12 field. */
+#define GPIO_IN_PIN12_Msk (0x1UL << GPIO_IN_PIN12_Pos) /*!< Bit mask of PIN12 field. */
+#define GPIO_IN_PIN12_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN12_High (1UL) /*!< Pin input is high */
+
+/* Bit 11 : Pin 11 */
+#define GPIO_IN_PIN11_Pos (11UL) /*!< Position of PIN11 field. */
+#define GPIO_IN_PIN11_Msk (0x1UL << GPIO_IN_PIN11_Pos) /*!< Bit mask of PIN11 field. */
+#define GPIO_IN_PIN11_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN11_High (1UL) /*!< Pin input is high */
+
+/* Bit 10 : Pin 10 */
+#define GPIO_IN_PIN10_Pos (10UL) /*!< Position of PIN10 field. */
+#define GPIO_IN_PIN10_Msk (0x1UL << GPIO_IN_PIN10_Pos) /*!< Bit mask of PIN10 field. */
+#define GPIO_IN_PIN10_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN10_High (1UL) /*!< Pin input is high */
+
+/* Bit 9 : Pin 9 */
+#define GPIO_IN_PIN9_Pos (9UL) /*!< Position of PIN9 field. */
+#define GPIO_IN_PIN9_Msk (0x1UL << GPIO_IN_PIN9_Pos) /*!< Bit mask of PIN9 field. */
+#define GPIO_IN_PIN9_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN9_High (1UL) /*!< Pin input is high */
+
+/* Bit 8 : Pin 8 */
+#define GPIO_IN_PIN8_Pos (8UL) /*!< Position of PIN8 field. */
+#define GPIO_IN_PIN8_Msk (0x1UL << GPIO_IN_PIN8_Pos) /*!< Bit mask of PIN8 field. */
+#define GPIO_IN_PIN8_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN8_High (1UL) /*!< Pin input is high */
+
+/* Bit 7 : Pin 7 */
+#define GPIO_IN_PIN7_Pos (7UL) /*!< Position of PIN7 field. */
+#define GPIO_IN_PIN7_Msk (0x1UL << GPIO_IN_PIN7_Pos) /*!< Bit mask of PIN7 field. */
+#define GPIO_IN_PIN7_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN7_High (1UL) /*!< Pin input is high */
+
+/* Bit 6 : Pin 6 */
+#define GPIO_IN_PIN6_Pos (6UL) /*!< Position of PIN6 field. */
+#define GPIO_IN_PIN6_Msk (0x1UL << GPIO_IN_PIN6_Pos) /*!< Bit mask of PIN6 field. */
+#define GPIO_IN_PIN6_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN6_High (1UL) /*!< Pin input is high */
+
+/* Bit 5 : Pin 5 */
+#define GPIO_IN_PIN5_Pos (5UL) /*!< Position of PIN5 field. */
+#define GPIO_IN_PIN5_Msk (0x1UL << GPIO_IN_PIN5_Pos) /*!< Bit mask of PIN5 field. */
+#define GPIO_IN_PIN5_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN5_High (1UL) /*!< Pin input is high */
+
+/* Bit 4 : Pin 4 */
+#define GPIO_IN_PIN4_Pos (4UL) /*!< Position of PIN4 field. */
+#define GPIO_IN_PIN4_Msk (0x1UL << GPIO_IN_PIN4_Pos) /*!< Bit mask of PIN4 field. */
+#define GPIO_IN_PIN4_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN4_High (1UL) /*!< Pin input is high */
+
+/* Bit 3 : Pin 3 */
+#define GPIO_IN_PIN3_Pos (3UL) /*!< Position of PIN3 field. */
+#define GPIO_IN_PIN3_Msk (0x1UL << GPIO_IN_PIN3_Pos) /*!< Bit mask of PIN3 field. */
+#define GPIO_IN_PIN3_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN3_High (1UL) /*!< Pin input is high */
+
+/* Bit 2 : Pin 2 */
+#define GPIO_IN_PIN2_Pos (2UL) /*!< Position of PIN2 field. */
+#define GPIO_IN_PIN2_Msk (0x1UL << GPIO_IN_PIN2_Pos) /*!< Bit mask of PIN2 field. */
+#define GPIO_IN_PIN2_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN2_High (1UL) /*!< Pin input is high */
+
+/* Bit 1 : Pin 1 */
+#define GPIO_IN_PIN1_Pos (1UL) /*!< Position of PIN1 field. */
+#define GPIO_IN_PIN1_Msk (0x1UL << GPIO_IN_PIN1_Pos) /*!< Bit mask of PIN1 field. */
+#define GPIO_IN_PIN1_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN1_High (1UL) /*!< Pin input is high */
+
+/* Bit 0 : Pin 0 */
+#define GPIO_IN_PIN0_Pos (0UL) /*!< Position of PIN0 field. */
+#define GPIO_IN_PIN0_Msk (0x1UL << GPIO_IN_PIN0_Pos) /*!< Bit mask of PIN0 field. */
+#define GPIO_IN_PIN0_Low (0UL) /*!< Pin input is low */
+#define GPIO_IN_PIN0_High (1UL) /*!< Pin input is high */
+
+/* Register: GPIO_DIR */
+/* Description: Direction of GPIO pins */
+
+/* Bit 31 : Pin 31 */
+#define GPIO_DIR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */
+#define GPIO_DIR_PIN31_Msk (0x1UL << GPIO_DIR_PIN31_Pos) /*!< Bit mask of PIN31 field. */
+#define GPIO_DIR_PIN31_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN31_Output (1UL) /*!< Pin set as output */
+
+/* Bit 30 : Pin 30 */
+#define GPIO_DIR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */
+#define GPIO_DIR_PIN30_Msk (0x1UL << GPIO_DIR_PIN30_Pos) /*!< Bit mask of PIN30 field. */
+#define GPIO_DIR_PIN30_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN30_Output (1UL) /*!< Pin set as output */
+
+/* Bit 29 : Pin 29 */
+#define GPIO_DIR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */
+#define GPIO_DIR_PIN29_Msk (0x1UL << GPIO_DIR_PIN29_Pos) /*!< Bit mask of PIN29 field. */
+#define GPIO_DIR_PIN29_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN29_Output (1UL) /*!< Pin set as output */
+
+/* Bit 28 : Pin 28 */
+#define GPIO_DIR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */
+#define GPIO_DIR_PIN28_Msk (0x1UL << GPIO_DIR_PIN28_Pos) /*!< Bit mask of PIN28 field. */
+#define GPIO_DIR_PIN28_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN28_Output (1UL) /*!< Pin set as output */
+
+/* Bit 27 : Pin 27 */
+#define GPIO_DIR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */
+#define GPIO_DIR_PIN27_Msk (0x1UL << GPIO_DIR_PIN27_Pos) /*!< Bit mask of PIN27 field. */
+#define GPIO_DIR_PIN27_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN27_Output (1UL) /*!< Pin set as output */
+
+/* Bit 26 : Pin 26 */
+#define GPIO_DIR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */
+#define GPIO_DIR_PIN26_Msk (0x1UL << GPIO_DIR_PIN26_Pos) /*!< Bit mask of PIN26 field. */
+#define GPIO_DIR_PIN26_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN26_Output (1UL) /*!< Pin set as output */
+
+/* Bit 25 : Pin 25 */
+#define GPIO_DIR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */
+#define GPIO_DIR_PIN25_Msk (0x1UL << GPIO_DIR_PIN25_Pos) /*!< Bit mask of PIN25 field. */
+#define GPIO_DIR_PIN25_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN25_Output (1UL) /*!< Pin set as output */
+
+/* Bit 24 : Pin 24 */
+#define GPIO_DIR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */
+#define GPIO_DIR_PIN24_Msk (0x1UL << GPIO_DIR_PIN24_Pos) /*!< Bit mask of PIN24 field. */
+#define GPIO_DIR_PIN24_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN24_Output (1UL) /*!< Pin set as output */
+
+/* Bit 23 : Pin 23 */
+#define GPIO_DIR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */
+#define GPIO_DIR_PIN23_Msk (0x1UL << GPIO_DIR_PIN23_Pos) /*!< Bit mask of PIN23 field. */
+#define GPIO_DIR_PIN23_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN23_Output (1UL) /*!< Pin set as output */
+
+/* Bit 22 : Pin 22 */
+#define GPIO_DIR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */
+#define GPIO_DIR_PIN22_Msk (0x1UL << GPIO_DIR_PIN22_Pos) /*!< Bit mask of PIN22 field. */
+#define GPIO_DIR_PIN22_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN22_Output (1UL) /*!< Pin set as output */
+
+/* Bit 21 : Pin 21 */
+#define GPIO_DIR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */
+#define GPIO_DIR_PIN21_Msk (0x1UL << GPIO_DIR_PIN21_Pos) /*!< Bit mask of PIN21 field. */
+#define GPIO_DIR_PIN21_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN21_Output (1UL) /*!< Pin set as output */
+
+/* Bit 20 : Pin 20 */
+#define GPIO_DIR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */
+#define GPIO_DIR_PIN20_Msk (0x1UL << GPIO_DIR_PIN20_Pos) /*!< Bit mask of PIN20 field. */
+#define GPIO_DIR_PIN20_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN20_Output (1UL) /*!< Pin set as output */
+
+/* Bit 19 : Pin 19 */
+#define GPIO_DIR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */
+#define GPIO_DIR_PIN19_Msk (0x1UL << GPIO_DIR_PIN19_Pos) /*!< Bit mask of PIN19 field. */
+#define GPIO_DIR_PIN19_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN19_Output (1UL) /*!< Pin set as output */
+
+/* Bit 18 : Pin 18 */
+#define GPIO_DIR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */
+#define GPIO_DIR_PIN18_Msk (0x1UL << GPIO_DIR_PIN18_Pos) /*!< Bit mask of PIN18 field. */
+#define GPIO_DIR_PIN18_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN18_Output (1UL) /*!< Pin set as output */
+
+/* Bit 17 : Pin 17 */
+#define GPIO_DIR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */
+#define GPIO_DIR_PIN17_Msk (0x1UL << GPIO_DIR_PIN17_Pos) /*!< Bit mask of PIN17 field. */
+#define GPIO_DIR_PIN17_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN17_Output (1UL) /*!< Pin set as output */
+
+/* Bit 16 : Pin 16 */
+#define GPIO_DIR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */
+#define GPIO_DIR_PIN16_Msk (0x1UL << GPIO_DIR_PIN16_Pos) /*!< Bit mask of PIN16 field. */
+#define GPIO_DIR_PIN16_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN16_Output (1UL) /*!< Pin set as output */
+
+/* Bit 15 : Pin 15 */
+#define GPIO_DIR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */
+#define GPIO_DIR_PIN15_Msk (0x1UL << GPIO_DIR_PIN15_Pos) /*!< Bit mask of PIN15 field. */
+#define GPIO_DIR_PIN15_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN15_Output (1UL) /*!< Pin set as output */
+
+/* Bit 14 : Pin 14 */
+#define GPIO_DIR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */
+#define GPIO_DIR_PIN14_Msk (0x1UL << GPIO_DIR_PIN14_Pos) /*!< Bit mask of PIN14 field. */
+#define GPIO_DIR_PIN14_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN14_Output (1UL) /*!< Pin set as output */
+
+/* Bit 13 : Pin 13 */
+#define GPIO_DIR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */
+#define GPIO_DIR_PIN13_Msk (0x1UL << GPIO_DIR_PIN13_Pos) /*!< Bit mask of PIN13 field. */
+#define GPIO_DIR_PIN13_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN13_Output (1UL) /*!< Pin set as output */
+
+/* Bit 12 : Pin 12 */
+#define GPIO_DIR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */
+#define GPIO_DIR_PIN12_Msk (0x1UL << GPIO_DIR_PIN12_Pos) /*!< Bit mask of PIN12 field. */
+#define GPIO_DIR_PIN12_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN12_Output (1UL) /*!< Pin set as output */
+
+/* Bit 11 : Pin 11 */
+#define GPIO_DIR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */
+#define GPIO_DIR_PIN11_Msk (0x1UL << GPIO_DIR_PIN11_Pos) /*!< Bit mask of PIN11 field. */
+#define GPIO_DIR_PIN11_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN11_Output (1UL) /*!< Pin set as output */
+
+/* Bit 10 : Pin 10 */
+#define GPIO_DIR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */
+#define GPIO_DIR_PIN10_Msk (0x1UL << GPIO_DIR_PIN10_Pos) /*!< Bit mask of PIN10 field. */
+#define GPIO_DIR_PIN10_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN10_Output (1UL) /*!< Pin set as output */
+
+/* Bit 9 : Pin 9 */
+#define GPIO_DIR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */
+#define GPIO_DIR_PIN9_Msk (0x1UL << GPIO_DIR_PIN9_Pos) /*!< Bit mask of PIN9 field. */
+#define GPIO_DIR_PIN9_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN9_Output (1UL) /*!< Pin set as output */
+
+/* Bit 8 : Pin 8 */
+#define GPIO_DIR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */
+#define GPIO_DIR_PIN8_Msk (0x1UL << GPIO_DIR_PIN8_Pos) /*!< Bit mask of PIN8 field. */
+#define GPIO_DIR_PIN8_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN8_Output (1UL) /*!< Pin set as output */
+
+/* Bit 7 : Pin 7 */
+#define GPIO_DIR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */
+#define GPIO_DIR_PIN7_Msk (0x1UL << GPIO_DIR_PIN7_Pos) /*!< Bit mask of PIN7 field. */
+#define GPIO_DIR_PIN7_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN7_Output (1UL) /*!< Pin set as output */
+
+/* Bit 6 : Pin 6 */
+#define GPIO_DIR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */
+#define GPIO_DIR_PIN6_Msk (0x1UL << GPIO_DIR_PIN6_Pos) /*!< Bit mask of PIN6 field. */
+#define GPIO_DIR_PIN6_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN6_Output (1UL) /*!< Pin set as output */
+
+/* Bit 5 : Pin 5 */
+#define GPIO_DIR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */
+#define GPIO_DIR_PIN5_Msk (0x1UL << GPIO_DIR_PIN5_Pos) /*!< Bit mask of PIN5 field. */
+#define GPIO_DIR_PIN5_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN5_Output (1UL) /*!< Pin set as output */
+
+/* Bit 4 : Pin 4 */
+#define GPIO_DIR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */
+#define GPIO_DIR_PIN4_Msk (0x1UL << GPIO_DIR_PIN4_Pos) /*!< Bit mask of PIN4 field. */
+#define GPIO_DIR_PIN4_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN4_Output (1UL) /*!< Pin set as output */
+
+/* Bit 3 : Pin 3 */
+#define GPIO_DIR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */
+#define GPIO_DIR_PIN3_Msk (0x1UL << GPIO_DIR_PIN3_Pos) /*!< Bit mask of PIN3 field. */
+#define GPIO_DIR_PIN3_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN3_Output (1UL) /*!< Pin set as output */
+
+/* Bit 2 : Pin 2 */
+#define GPIO_DIR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */
+#define GPIO_DIR_PIN2_Msk (0x1UL << GPIO_DIR_PIN2_Pos) /*!< Bit mask of PIN2 field. */
+#define GPIO_DIR_PIN2_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN2_Output (1UL) /*!< Pin set as output */
+
+/* Bit 1 : Pin 1 */
+#define GPIO_DIR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */
+#define GPIO_DIR_PIN1_Msk (0x1UL << GPIO_DIR_PIN1_Pos) /*!< Bit mask of PIN1 field. */
+#define GPIO_DIR_PIN1_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN1_Output (1UL) /*!< Pin set as output */
+
+/* Bit 0 : Pin 0 */
+#define GPIO_DIR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */
+#define GPIO_DIR_PIN0_Msk (0x1UL << GPIO_DIR_PIN0_Pos) /*!< Bit mask of PIN0 field. */
+#define GPIO_DIR_PIN0_Input (0UL) /*!< Pin set as input */
+#define GPIO_DIR_PIN0_Output (1UL) /*!< Pin set as output */
+
+/* Register: GPIO_DIRSET */
+/* Description: DIR set register */
+
+/* Bit 31 : Set as output pin 31 */
+#define GPIO_DIRSET_PIN31_Pos (31UL) /*!< Position of PIN31 field. */
+#define GPIO_DIRSET_PIN31_Msk (0x1UL << GPIO_DIRSET_PIN31_Pos) /*!< Bit mask of PIN31 field. */
+#define GPIO_DIRSET_PIN31_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN31_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN31_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 30 : Set as output pin 30 */
+#define GPIO_DIRSET_PIN30_Pos (30UL) /*!< Position of PIN30 field. */
+#define GPIO_DIRSET_PIN30_Msk (0x1UL << GPIO_DIRSET_PIN30_Pos) /*!< Bit mask of PIN30 field. */
+#define GPIO_DIRSET_PIN30_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN30_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN30_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 29 : Set as output pin 29 */
+#define GPIO_DIRSET_PIN29_Pos (29UL) /*!< Position of PIN29 field. */
+#define GPIO_DIRSET_PIN29_Msk (0x1UL << GPIO_DIRSET_PIN29_Pos) /*!< Bit mask of PIN29 field. */
+#define GPIO_DIRSET_PIN29_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN29_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN29_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 28 : Set as output pin 28 */
+#define GPIO_DIRSET_PIN28_Pos (28UL) /*!< Position of PIN28 field. */
+#define GPIO_DIRSET_PIN28_Msk (0x1UL << GPIO_DIRSET_PIN28_Pos) /*!< Bit mask of PIN28 field. */
+#define GPIO_DIRSET_PIN28_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN28_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN28_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 27 : Set as output pin 27 */
+#define GPIO_DIRSET_PIN27_Pos (27UL) /*!< Position of PIN27 field. */
+#define GPIO_DIRSET_PIN27_Msk (0x1UL << GPIO_DIRSET_PIN27_Pos) /*!< Bit mask of PIN27 field. */
+#define GPIO_DIRSET_PIN27_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN27_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN27_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 26 : Set as output pin 26 */
+#define GPIO_DIRSET_PIN26_Pos (26UL) /*!< Position of PIN26 field. */
+#define GPIO_DIRSET_PIN26_Msk (0x1UL << GPIO_DIRSET_PIN26_Pos) /*!< Bit mask of PIN26 field. */
+#define GPIO_DIRSET_PIN26_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN26_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN26_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 25 : Set as output pin 25 */
+#define GPIO_DIRSET_PIN25_Pos (25UL) /*!< Position of PIN25 field. */
+#define GPIO_DIRSET_PIN25_Msk (0x1UL << GPIO_DIRSET_PIN25_Pos) /*!< Bit mask of PIN25 field. */
+#define GPIO_DIRSET_PIN25_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN25_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN25_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 24 : Set as output pin 24 */
+#define GPIO_DIRSET_PIN24_Pos (24UL) /*!< Position of PIN24 field. */
+#define GPIO_DIRSET_PIN24_Msk (0x1UL << GPIO_DIRSET_PIN24_Pos) /*!< Bit mask of PIN24 field. */
+#define GPIO_DIRSET_PIN24_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN24_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN24_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 23 : Set as output pin 23 */
+#define GPIO_DIRSET_PIN23_Pos (23UL) /*!< Position of PIN23 field. */
+#define GPIO_DIRSET_PIN23_Msk (0x1UL << GPIO_DIRSET_PIN23_Pos) /*!< Bit mask of PIN23 field. */
+#define GPIO_DIRSET_PIN23_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN23_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN23_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 22 : Set as output pin 22 */
+#define GPIO_DIRSET_PIN22_Pos (22UL) /*!< Position of PIN22 field. */
+#define GPIO_DIRSET_PIN22_Msk (0x1UL << GPIO_DIRSET_PIN22_Pos) /*!< Bit mask of PIN22 field. */
+#define GPIO_DIRSET_PIN22_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN22_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN22_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 21 : Set as output pin 21 */
+#define GPIO_DIRSET_PIN21_Pos (21UL) /*!< Position of PIN21 field. */
+#define GPIO_DIRSET_PIN21_Msk (0x1UL << GPIO_DIRSET_PIN21_Pos) /*!< Bit mask of PIN21 field. */
+#define GPIO_DIRSET_PIN21_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN21_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN21_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 20 : Set as output pin 20 */
+#define GPIO_DIRSET_PIN20_Pos (20UL) /*!< Position of PIN20 field. */
+#define GPIO_DIRSET_PIN20_Msk (0x1UL << GPIO_DIRSET_PIN20_Pos) /*!< Bit mask of PIN20 field. */
+#define GPIO_DIRSET_PIN20_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN20_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN20_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 19 : Set as output pin 19 */
+#define GPIO_DIRSET_PIN19_Pos (19UL) /*!< Position of PIN19 field. */
+#define GPIO_DIRSET_PIN19_Msk (0x1UL << GPIO_DIRSET_PIN19_Pos) /*!< Bit mask of PIN19 field. */
+#define GPIO_DIRSET_PIN19_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN19_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN19_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 18 : Set as output pin 18 */
+#define GPIO_DIRSET_PIN18_Pos (18UL) /*!< Position of PIN18 field. */
+#define GPIO_DIRSET_PIN18_Msk (0x1UL << GPIO_DIRSET_PIN18_Pos) /*!< Bit mask of PIN18 field. */
+#define GPIO_DIRSET_PIN18_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN18_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN18_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 17 : Set as output pin 17 */
+#define GPIO_DIRSET_PIN17_Pos (17UL) /*!< Position of PIN17 field. */
+#define GPIO_DIRSET_PIN17_Msk (0x1UL << GPIO_DIRSET_PIN17_Pos) /*!< Bit mask of PIN17 field. */
+#define GPIO_DIRSET_PIN17_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN17_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN17_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 16 : Set as output pin 16 */
+#define GPIO_DIRSET_PIN16_Pos (16UL) /*!< Position of PIN16 field. */
+#define GPIO_DIRSET_PIN16_Msk (0x1UL << GPIO_DIRSET_PIN16_Pos) /*!< Bit mask of PIN16 field. */
+#define GPIO_DIRSET_PIN16_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN16_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN16_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 15 : Set as output pin 15 */
+#define GPIO_DIRSET_PIN15_Pos (15UL) /*!< Position of PIN15 field. */
+#define GPIO_DIRSET_PIN15_Msk (0x1UL << GPIO_DIRSET_PIN15_Pos) /*!< Bit mask of PIN15 field. */
+#define GPIO_DIRSET_PIN15_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN15_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN15_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 14 : Set as output pin 14 */
+#define GPIO_DIRSET_PIN14_Pos (14UL) /*!< Position of PIN14 field. */
+#define GPIO_DIRSET_PIN14_Msk (0x1UL << GPIO_DIRSET_PIN14_Pos) /*!< Bit mask of PIN14 field. */
+#define GPIO_DIRSET_PIN14_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN14_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN14_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 13 : Set as output pin 13 */
+#define GPIO_DIRSET_PIN13_Pos (13UL) /*!< Position of PIN13 field. */
+#define GPIO_DIRSET_PIN13_Msk (0x1UL << GPIO_DIRSET_PIN13_Pos) /*!< Bit mask of PIN13 field. */
+#define GPIO_DIRSET_PIN13_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN13_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN13_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 12 : Set as output pin 12 */
+#define GPIO_DIRSET_PIN12_Pos (12UL) /*!< Position of PIN12 field. */
+#define GPIO_DIRSET_PIN12_Msk (0x1UL << GPIO_DIRSET_PIN12_Pos) /*!< Bit mask of PIN12 field. */
+#define GPIO_DIRSET_PIN12_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN12_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN12_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 11 : Set as output pin 11 */
+#define GPIO_DIRSET_PIN11_Pos (11UL) /*!< Position of PIN11 field. */
+#define GPIO_DIRSET_PIN11_Msk (0x1UL << GPIO_DIRSET_PIN11_Pos) /*!< Bit mask of PIN11 field. */
+#define GPIO_DIRSET_PIN11_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN11_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN11_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 10 : Set as output pin 10 */
+#define GPIO_DIRSET_PIN10_Pos (10UL) /*!< Position of PIN10 field. */
+#define GPIO_DIRSET_PIN10_Msk (0x1UL << GPIO_DIRSET_PIN10_Pos) /*!< Bit mask of PIN10 field. */
+#define GPIO_DIRSET_PIN10_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN10_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN10_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 9 : Set as output pin 9 */
+#define GPIO_DIRSET_PIN9_Pos (9UL) /*!< Position of PIN9 field. */
+#define GPIO_DIRSET_PIN9_Msk (0x1UL << GPIO_DIRSET_PIN9_Pos) /*!< Bit mask of PIN9 field. */
+#define GPIO_DIRSET_PIN9_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN9_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN9_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 8 : Set as output pin 8 */
+#define GPIO_DIRSET_PIN8_Pos (8UL) /*!< Position of PIN8 field. */
+#define GPIO_DIRSET_PIN8_Msk (0x1UL << GPIO_DIRSET_PIN8_Pos) /*!< Bit mask of PIN8 field. */
+#define GPIO_DIRSET_PIN8_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN8_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN8_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 7 : Set as output pin 7 */
+#define GPIO_DIRSET_PIN7_Pos (7UL) /*!< Position of PIN7 field. */
+#define GPIO_DIRSET_PIN7_Msk (0x1UL << GPIO_DIRSET_PIN7_Pos) /*!< Bit mask of PIN7 field. */
+#define GPIO_DIRSET_PIN7_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN7_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN7_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 6 : Set as output pin 6 */
+#define GPIO_DIRSET_PIN6_Pos (6UL) /*!< Position of PIN6 field. */
+#define GPIO_DIRSET_PIN6_Msk (0x1UL << GPIO_DIRSET_PIN6_Pos) /*!< Bit mask of PIN6 field. */
+#define GPIO_DIRSET_PIN6_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN6_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN6_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 5 : Set as output pin 5 */
+#define GPIO_DIRSET_PIN5_Pos (5UL) /*!< Position of PIN5 field. */
+#define GPIO_DIRSET_PIN5_Msk (0x1UL << GPIO_DIRSET_PIN5_Pos) /*!< Bit mask of PIN5 field. */
+#define GPIO_DIRSET_PIN5_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN5_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN5_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 4 : Set as output pin 4 */
+#define GPIO_DIRSET_PIN4_Pos (4UL) /*!< Position of PIN4 field. */
+#define GPIO_DIRSET_PIN4_Msk (0x1UL << GPIO_DIRSET_PIN4_Pos) /*!< Bit mask of PIN4 field. */
+#define GPIO_DIRSET_PIN4_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN4_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN4_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 3 : Set as output pin 3 */
+#define GPIO_DIRSET_PIN3_Pos (3UL) /*!< Position of PIN3 field. */
+#define GPIO_DIRSET_PIN3_Msk (0x1UL << GPIO_DIRSET_PIN3_Pos) /*!< Bit mask of PIN3 field. */
+#define GPIO_DIRSET_PIN3_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN3_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN3_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 2 : Set as output pin 2 */
+#define GPIO_DIRSET_PIN2_Pos (2UL) /*!< Position of PIN2 field. */
+#define GPIO_DIRSET_PIN2_Msk (0x1UL << GPIO_DIRSET_PIN2_Pos) /*!< Bit mask of PIN2 field. */
+#define GPIO_DIRSET_PIN2_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN2_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN2_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 1 : Set as output pin 1 */
+#define GPIO_DIRSET_PIN1_Pos (1UL) /*!< Position of PIN1 field. */
+#define GPIO_DIRSET_PIN1_Msk (0x1UL << GPIO_DIRSET_PIN1_Pos) /*!< Bit mask of PIN1 field. */
+#define GPIO_DIRSET_PIN1_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN1_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN1_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Bit 0 : Set as output pin 0 */
+#define GPIO_DIRSET_PIN0_Pos (0UL) /*!< Position of PIN0 field. */
+#define GPIO_DIRSET_PIN0_Msk (0x1UL << GPIO_DIRSET_PIN0_Pos) /*!< Bit mask of PIN0 field. */
+#define GPIO_DIRSET_PIN0_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRSET_PIN0_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRSET_PIN0_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */
+
+/* Register: GPIO_DIRCLR */
+/* Description: DIR clear register */
+
+/* Bit 31 : Set as input pin 31 */
+#define GPIO_DIRCLR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */
+#define GPIO_DIRCLR_PIN31_Msk (0x1UL << GPIO_DIRCLR_PIN31_Pos) /*!< Bit mask of PIN31 field. */
+#define GPIO_DIRCLR_PIN31_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN31_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN31_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 30 : Set as input pin 30 */
+#define GPIO_DIRCLR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */
+#define GPIO_DIRCLR_PIN30_Msk (0x1UL << GPIO_DIRCLR_PIN30_Pos) /*!< Bit mask of PIN30 field. */
+#define GPIO_DIRCLR_PIN30_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN30_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN30_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 29 : Set as input pin 29 */
+#define GPIO_DIRCLR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */
+#define GPIO_DIRCLR_PIN29_Msk (0x1UL << GPIO_DIRCLR_PIN29_Pos) /*!< Bit mask of PIN29 field. */
+#define GPIO_DIRCLR_PIN29_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN29_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN29_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 28 : Set as input pin 28 */
+#define GPIO_DIRCLR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */
+#define GPIO_DIRCLR_PIN28_Msk (0x1UL << GPIO_DIRCLR_PIN28_Pos) /*!< Bit mask of PIN28 field. */
+#define GPIO_DIRCLR_PIN28_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN28_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN28_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 27 : Set as input pin 27 */
+#define GPIO_DIRCLR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */
+#define GPIO_DIRCLR_PIN27_Msk (0x1UL << GPIO_DIRCLR_PIN27_Pos) /*!< Bit mask of PIN27 field. */
+#define GPIO_DIRCLR_PIN27_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN27_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN27_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 26 : Set as input pin 26 */
+#define GPIO_DIRCLR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */
+#define GPIO_DIRCLR_PIN26_Msk (0x1UL << GPIO_DIRCLR_PIN26_Pos) /*!< Bit mask of PIN26 field. */
+#define GPIO_DIRCLR_PIN26_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN26_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN26_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 25 : Set as input pin 25 */
+#define GPIO_DIRCLR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */
+#define GPIO_DIRCLR_PIN25_Msk (0x1UL << GPIO_DIRCLR_PIN25_Pos) /*!< Bit mask of PIN25 field. */
+#define GPIO_DIRCLR_PIN25_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN25_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN25_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 24 : Set as input pin 24 */
+#define GPIO_DIRCLR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */
+#define GPIO_DIRCLR_PIN24_Msk (0x1UL << GPIO_DIRCLR_PIN24_Pos) /*!< Bit mask of PIN24 field. */
+#define GPIO_DIRCLR_PIN24_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN24_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN24_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 23 : Set as input pin 23 */
+#define GPIO_DIRCLR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */
+#define GPIO_DIRCLR_PIN23_Msk (0x1UL << GPIO_DIRCLR_PIN23_Pos) /*!< Bit mask of PIN23 field. */
+#define GPIO_DIRCLR_PIN23_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN23_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN23_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 22 : Set as input pin 22 */
+#define GPIO_DIRCLR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */
+#define GPIO_DIRCLR_PIN22_Msk (0x1UL << GPIO_DIRCLR_PIN22_Pos) /*!< Bit mask of PIN22 field. */
+#define GPIO_DIRCLR_PIN22_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN22_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN22_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 21 : Set as input pin 21 */
+#define GPIO_DIRCLR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */
+#define GPIO_DIRCLR_PIN21_Msk (0x1UL << GPIO_DIRCLR_PIN21_Pos) /*!< Bit mask of PIN21 field. */
+#define GPIO_DIRCLR_PIN21_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN21_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN21_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 20 : Set as input pin 20 */
+#define GPIO_DIRCLR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */
+#define GPIO_DIRCLR_PIN20_Msk (0x1UL << GPIO_DIRCLR_PIN20_Pos) /*!< Bit mask of PIN20 field. */
+#define GPIO_DIRCLR_PIN20_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN20_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN20_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 19 : Set as input pin 19 */
+#define GPIO_DIRCLR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */
+#define GPIO_DIRCLR_PIN19_Msk (0x1UL << GPIO_DIRCLR_PIN19_Pos) /*!< Bit mask of PIN19 field. */
+#define GPIO_DIRCLR_PIN19_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN19_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN19_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 18 : Set as input pin 18 */
+#define GPIO_DIRCLR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */
+#define GPIO_DIRCLR_PIN18_Msk (0x1UL << GPIO_DIRCLR_PIN18_Pos) /*!< Bit mask of PIN18 field. */
+#define GPIO_DIRCLR_PIN18_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN18_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN18_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 17 : Set as input pin 17 */
+#define GPIO_DIRCLR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */
+#define GPIO_DIRCLR_PIN17_Msk (0x1UL << GPIO_DIRCLR_PIN17_Pos) /*!< Bit mask of PIN17 field. */
+#define GPIO_DIRCLR_PIN17_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN17_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN17_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 16 : Set as input pin 16 */
+#define GPIO_DIRCLR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */
+#define GPIO_DIRCLR_PIN16_Msk (0x1UL << GPIO_DIRCLR_PIN16_Pos) /*!< Bit mask of PIN16 field. */
+#define GPIO_DIRCLR_PIN16_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN16_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN16_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 15 : Set as input pin 15 */
+#define GPIO_DIRCLR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */
+#define GPIO_DIRCLR_PIN15_Msk (0x1UL << GPIO_DIRCLR_PIN15_Pos) /*!< Bit mask of PIN15 field. */
+#define GPIO_DIRCLR_PIN15_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN15_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN15_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 14 : Set as input pin 14 */
+#define GPIO_DIRCLR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */
+#define GPIO_DIRCLR_PIN14_Msk (0x1UL << GPIO_DIRCLR_PIN14_Pos) /*!< Bit mask of PIN14 field. */
+#define GPIO_DIRCLR_PIN14_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN14_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN14_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 13 : Set as input pin 13 */
+#define GPIO_DIRCLR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */
+#define GPIO_DIRCLR_PIN13_Msk (0x1UL << GPIO_DIRCLR_PIN13_Pos) /*!< Bit mask of PIN13 field. */
+#define GPIO_DIRCLR_PIN13_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN13_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN13_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 12 : Set as input pin 12 */
+#define GPIO_DIRCLR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */
+#define GPIO_DIRCLR_PIN12_Msk (0x1UL << GPIO_DIRCLR_PIN12_Pos) /*!< Bit mask of PIN12 field. */
+#define GPIO_DIRCLR_PIN12_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN12_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN12_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 11 : Set as input pin 11 */
+#define GPIO_DIRCLR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */
+#define GPIO_DIRCLR_PIN11_Msk (0x1UL << GPIO_DIRCLR_PIN11_Pos) /*!< Bit mask of PIN11 field. */
+#define GPIO_DIRCLR_PIN11_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN11_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN11_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 10 : Set as input pin 10 */
+#define GPIO_DIRCLR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */
+#define GPIO_DIRCLR_PIN10_Msk (0x1UL << GPIO_DIRCLR_PIN10_Pos) /*!< Bit mask of PIN10 field. */
+#define GPIO_DIRCLR_PIN10_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN10_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN10_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 9 : Set as input pin 9 */
+#define GPIO_DIRCLR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */
+#define GPIO_DIRCLR_PIN9_Msk (0x1UL << GPIO_DIRCLR_PIN9_Pos) /*!< Bit mask of PIN9 field. */
+#define GPIO_DIRCLR_PIN9_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN9_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN9_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 8 : Set as input pin 8 */
+#define GPIO_DIRCLR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */
+#define GPIO_DIRCLR_PIN8_Msk (0x1UL << GPIO_DIRCLR_PIN8_Pos) /*!< Bit mask of PIN8 field. */
+#define GPIO_DIRCLR_PIN8_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN8_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN8_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 7 : Set as input pin 7 */
+#define GPIO_DIRCLR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */
+#define GPIO_DIRCLR_PIN7_Msk (0x1UL << GPIO_DIRCLR_PIN7_Pos) /*!< Bit mask of PIN7 field. */
+#define GPIO_DIRCLR_PIN7_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN7_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN7_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 6 : Set as input pin 6 */
+#define GPIO_DIRCLR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */
+#define GPIO_DIRCLR_PIN6_Msk (0x1UL << GPIO_DIRCLR_PIN6_Pos) /*!< Bit mask of PIN6 field. */
+#define GPIO_DIRCLR_PIN6_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN6_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN6_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 5 : Set as input pin 5 */
+#define GPIO_DIRCLR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */
+#define GPIO_DIRCLR_PIN5_Msk (0x1UL << GPIO_DIRCLR_PIN5_Pos) /*!< Bit mask of PIN5 field. */
+#define GPIO_DIRCLR_PIN5_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN5_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN5_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 4 : Set as input pin 4 */
+#define GPIO_DIRCLR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */
+#define GPIO_DIRCLR_PIN4_Msk (0x1UL << GPIO_DIRCLR_PIN4_Pos) /*!< Bit mask of PIN4 field. */
+#define GPIO_DIRCLR_PIN4_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN4_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN4_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 3 : Set as input pin 3 */
+#define GPIO_DIRCLR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */
+#define GPIO_DIRCLR_PIN3_Msk (0x1UL << GPIO_DIRCLR_PIN3_Pos) /*!< Bit mask of PIN3 field. */
+#define GPIO_DIRCLR_PIN3_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN3_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN3_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 2 : Set as input pin 2 */
+#define GPIO_DIRCLR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */
+#define GPIO_DIRCLR_PIN2_Msk (0x1UL << GPIO_DIRCLR_PIN2_Pos) /*!< Bit mask of PIN2 field. */
+#define GPIO_DIRCLR_PIN2_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN2_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN2_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 1 : Set as input pin 1 */
+#define GPIO_DIRCLR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */
+#define GPIO_DIRCLR_PIN1_Msk (0x1UL << GPIO_DIRCLR_PIN1_Pos) /*!< Bit mask of PIN1 field. */
+#define GPIO_DIRCLR_PIN1_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN1_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN1_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Bit 0 : Set as input pin 0 */
+#define GPIO_DIRCLR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */
+#define GPIO_DIRCLR_PIN0_Msk (0x1UL << GPIO_DIRCLR_PIN0_Pos) /*!< Bit mask of PIN0 field. */
+#define GPIO_DIRCLR_PIN0_Input (0UL) /*!< Read: pin set as input */
+#define GPIO_DIRCLR_PIN0_Output (1UL) /*!< Read: pin set as output */
+#define GPIO_DIRCLR_PIN0_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */
+
+/* Register: GPIO_LATCH */
+/* Description: Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers */
+
+/* Bit 31 : Status on whether PIN31 has met criteria set in PIN_CNF31.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN31_Pos (31UL) /*!< Position of PIN31 field. */
+#define GPIO_LATCH_PIN31_Msk (0x1UL << GPIO_LATCH_PIN31_Pos) /*!< Bit mask of PIN31 field. */
+#define GPIO_LATCH_PIN31_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN31_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 30 : Status on whether PIN30 has met criteria set in PIN_CNF30.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN30_Pos (30UL) /*!< Position of PIN30 field. */
+#define GPIO_LATCH_PIN30_Msk (0x1UL << GPIO_LATCH_PIN30_Pos) /*!< Bit mask of PIN30 field. */
+#define GPIO_LATCH_PIN30_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN30_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 29 : Status on whether PIN29 has met criteria set in PIN_CNF29.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN29_Pos (29UL) /*!< Position of PIN29 field. */
+#define GPIO_LATCH_PIN29_Msk (0x1UL << GPIO_LATCH_PIN29_Pos) /*!< Bit mask of PIN29 field. */
+#define GPIO_LATCH_PIN29_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN29_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 28 : Status on whether PIN28 has met criteria set in PIN_CNF28.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN28_Pos (28UL) /*!< Position of PIN28 field. */
+#define GPIO_LATCH_PIN28_Msk (0x1UL << GPIO_LATCH_PIN28_Pos) /*!< Bit mask of PIN28 field. */
+#define GPIO_LATCH_PIN28_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN28_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 27 : Status on whether PIN27 has met criteria set in PIN_CNF27.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN27_Pos (27UL) /*!< Position of PIN27 field. */
+#define GPIO_LATCH_PIN27_Msk (0x1UL << GPIO_LATCH_PIN27_Pos) /*!< Bit mask of PIN27 field. */
+#define GPIO_LATCH_PIN27_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN27_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 26 : Status on whether PIN26 has met criteria set in PIN_CNF26.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN26_Pos (26UL) /*!< Position of PIN26 field. */
+#define GPIO_LATCH_PIN26_Msk (0x1UL << GPIO_LATCH_PIN26_Pos) /*!< Bit mask of PIN26 field. */
+#define GPIO_LATCH_PIN26_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN26_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 25 : Status on whether PIN25 has met criteria set in PIN_CNF25.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN25_Pos (25UL) /*!< Position of PIN25 field. */
+#define GPIO_LATCH_PIN25_Msk (0x1UL << GPIO_LATCH_PIN25_Pos) /*!< Bit mask of PIN25 field. */
+#define GPIO_LATCH_PIN25_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN25_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 24 : Status on whether PIN24 has met criteria set in PIN_CNF24.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN24_Pos (24UL) /*!< Position of PIN24 field. */
+#define GPIO_LATCH_PIN24_Msk (0x1UL << GPIO_LATCH_PIN24_Pos) /*!< Bit mask of PIN24 field. */
+#define GPIO_LATCH_PIN24_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN24_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 23 : Status on whether PIN23 has met criteria set in PIN_CNF23.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN23_Pos (23UL) /*!< Position of PIN23 field. */
+#define GPIO_LATCH_PIN23_Msk (0x1UL << GPIO_LATCH_PIN23_Pos) /*!< Bit mask of PIN23 field. */
+#define GPIO_LATCH_PIN23_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN23_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 22 : Status on whether PIN22 has met criteria set in PIN_CNF22.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN22_Pos (22UL) /*!< Position of PIN22 field. */
+#define GPIO_LATCH_PIN22_Msk (0x1UL << GPIO_LATCH_PIN22_Pos) /*!< Bit mask of PIN22 field. */
+#define GPIO_LATCH_PIN22_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN22_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 21 : Status on whether PIN21 has met criteria set in PIN_CNF21.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN21_Pos (21UL) /*!< Position of PIN21 field. */
+#define GPIO_LATCH_PIN21_Msk (0x1UL << GPIO_LATCH_PIN21_Pos) /*!< Bit mask of PIN21 field. */
+#define GPIO_LATCH_PIN21_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN21_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 20 : Status on whether PIN20 has met criteria set in PIN_CNF20.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN20_Pos (20UL) /*!< Position of PIN20 field. */
+#define GPIO_LATCH_PIN20_Msk (0x1UL << GPIO_LATCH_PIN20_Pos) /*!< Bit mask of PIN20 field. */
+#define GPIO_LATCH_PIN20_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN20_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 19 : Status on whether PIN19 has met criteria set in PIN_CNF19.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN19_Pos (19UL) /*!< Position of PIN19 field. */
+#define GPIO_LATCH_PIN19_Msk (0x1UL << GPIO_LATCH_PIN19_Pos) /*!< Bit mask of PIN19 field. */
+#define GPIO_LATCH_PIN19_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN19_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 18 : Status on whether PIN18 has met criteria set in PIN_CNF18.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN18_Pos (18UL) /*!< Position of PIN18 field. */
+#define GPIO_LATCH_PIN18_Msk (0x1UL << GPIO_LATCH_PIN18_Pos) /*!< Bit mask of PIN18 field. */
+#define GPIO_LATCH_PIN18_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN18_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 17 : Status on whether PIN17 has met criteria set in PIN_CNF17.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN17_Pos (17UL) /*!< Position of PIN17 field. */
+#define GPIO_LATCH_PIN17_Msk (0x1UL << GPIO_LATCH_PIN17_Pos) /*!< Bit mask of PIN17 field. */
+#define GPIO_LATCH_PIN17_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN17_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 16 : Status on whether PIN16 has met criteria set in PIN_CNF16.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN16_Pos (16UL) /*!< Position of PIN16 field. */
+#define GPIO_LATCH_PIN16_Msk (0x1UL << GPIO_LATCH_PIN16_Pos) /*!< Bit mask of PIN16 field. */
+#define GPIO_LATCH_PIN16_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN16_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 15 : Status on whether PIN15 has met criteria set in PIN_CNF15.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN15_Pos (15UL) /*!< Position of PIN15 field. */
+#define GPIO_LATCH_PIN15_Msk (0x1UL << GPIO_LATCH_PIN15_Pos) /*!< Bit mask of PIN15 field. */
+#define GPIO_LATCH_PIN15_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN15_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 14 : Status on whether PIN14 has met criteria set in PIN_CNF14.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN14_Pos (14UL) /*!< Position of PIN14 field. */
+#define GPIO_LATCH_PIN14_Msk (0x1UL << GPIO_LATCH_PIN14_Pos) /*!< Bit mask of PIN14 field. */
+#define GPIO_LATCH_PIN14_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN14_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 13 : Status on whether PIN13 has met criteria set in PIN_CNF13.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN13_Pos (13UL) /*!< Position of PIN13 field. */
+#define GPIO_LATCH_PIN13_Msk (0x1UL << GPIO_LATCH_PIN13_Pos) /*!< Bit mask of PIN13 field. */
+#define GPIO_LATCH_PIN13_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN13_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 12 : Status on whether PIN12 has met criteria set in PIN_CNF12.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN12_Pos (12UL) /*!< Position of PIN12 field. */
+#define GPIO_LATCH_PIN12_Msk (0x1UL << GPIO_LATCH_PIN12_Pos) /*!< Bit mask of PIN12 field. */
+#define GPIO_LATCH_PIN12_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN12_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 11 : Status on whether PIN11 has met criteria set in PIN_CNF11.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN11_Pos (11UL) /*!< Position of PIN11 field. */
+#define GPIO_LATCH_PIN11_Msk (0x1UL << GPIO_LATCH_PIN11_Pos) /*!< Bit mask of PIN11 field. */
+#define GPIO_LATCH_PIN11_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN11_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 10 : Status on whether PIN10 has met criteria set in PIN_CNF10.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN10_Pos (10UL) /*!< Position of PIN10 field. */
+#define GPIO_LATCH_PIN10_Msk (0x1UL << GPIO_LATCH_PIN10_Pos) /*!< Bit mask of PIN10 field. */
+#define GPIO_LATCH_PIN10_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN10_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 9 : Status on whether PIN9 has met criteria set in PIN_CNF9.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN9_Pos (9UL) /*!< Position of PIN9 field. */
+#define GPIO_LATCH_PIN9_Msk (0x1UL << GPIO_LATCH_PIN9_Pos) /*!< Bit mask of PIN9 field. */
+#define GPIO_LATCH_PIN9_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN9_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 8 : Status on whether PIN8 has met criteria set in PIN_CNF8.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN8_Pos (8UL) /*!< Position of PIN8 field. */
+#define GPIO_LATCH_PIN8_Msk (0x1UL << GPIO_LATCH_PIN8_Pos) /*!< Bit mask of PIN8 field. */
+#define GPIO_LATCH_PIN8_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN8_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 7 : Status on whether PIN7 has met criteria set in PIN_CNF7.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN7_Pos (7UL) /*!< Position of PIN7 field. */
+#define GPIO_LATCH_PIN7_Msk (0x1UL << GPIO_LATCH_PIN7_Pos) /*!< Bit mask of PIN7 field. */
+#define GPIO_LATCH_PIN7_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN7_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 6 : Status on whether PIN6 has met criteria set in PIN_CNF6.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN6_Pos (6UL) /*!< Position of PIN6 field. */
+#define GPIO_LATCH_PIN6_Msk (0x1UL << GPIO_LATCH_PIN6_Pos) /*!< Bit mask of PIN6 field. */
+#define GPIO_LATCH_PIN6_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN6_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 5 : Status on whether PIN5 has met criteria set in PIN_CNF5.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN5_Pos (5UL) /*!< Position of PIN5 field. */
+#define GPIO_LATCH_PIN5_Msk (0x1UL << GPIO_LATCH_PIN5_Pos) /*!< Bit mask of PIN5 field. */
+#define GPIO_LATCH_PIN5_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN5_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 4 : Status on whether PIN4 has met criteria set in PIN_CNF4.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN4_Pos (4UL) /*!< Position of PIN4 field. */
+#define GPIO_LATCH_PIN4_Msk (0x1UL << GPIO_LATCH_PIN4_Pos) /*!< Bit mask of PIN4 field. */
+#define GPIO_LATCH_PIN4_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN4_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 3 : Status on whether PIN3 has met criteria set in PIN_CNF3.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN3_Pos (3UL) /*!< Position of PIN3 field. */
+#define GPIO_LATCH_PIN3_Msk (0x1UL << GPIO_LATCH_PIN3_Pos) /*!< Bit mask of PIN3 field. */
+#define GPIO_LATCH_PIN3_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN3_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 2 : Status on whether PIN2 has met criteria set in PIN_CNF2.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN2_Pos (2UL) /*!< Position of PIN2 field. */
+#define GPIO_LATCH_PIN2_Msk (0x1UL << GPIO_LATCH_PIN2_Pos) /*!< Bit mask of PIN2 field. */
+#define GPIO_LATCH_PIN2_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN2_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 1 : Status on whether PIN1 has met criteria set in PIN_CNF1.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN1_Pos (1UL) /*!< Position of PIN1 field. */
+#define GPIO_LATCH_PIN1_Msk (0x1UL << GPIO_LATCH_PIN1_Pos) /*!< Bit mask of PIN1 field. */
+#define GPIO_LATCH_PIN1_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN1_Latched (1UL) /*!< Criteria has been met */
+
+/* Bit 0 : Status on whether PIN0 has met criteria set in PIN_CNF0.SENSE register. Write '1' to clear. */
+#define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. */
+#define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. */
+#define GPIO_LATCH_PIN0_NotLatched (0UL) /*!< Criteria has not been met */
+#define GPIO_LATCH_PIN0_Latched (1UL) /*!< Criteria has been met */
+
+/* Register: GPIO_DETECTMODE */
+/* Description: Select between default DETECT signal behaviour and LDETECT mode */
+
+/* Bit 0 : Select between default DETECT signal behaviour and LDETECT mode */
+#define GPIO_DETECTMODE_DETECTMODE_Pos (0UL) /*!< Position of DETECTMODE field. */
+#define GPIO_DETECTMODE_DETECTMODE_Msk (0x1UL << GPIO_DETECTMODE_DETECTMODE_Pos) /*!< Bit mask of DETECTMODE field. */
+#define GPIO_DETECTMODE_DETECTMODE_Default (0UL) /*!< DETECT directly connected to PIN DETECT signals */
+#define GPIO_DETECTMODE_DETECTMODE_LDETECT (1UL) /*!< Use the latched LDETECT behaviour */
+
+/* Register: GPIO_PIN_CNF */
+/* Description: Description collection: Configuration of GPIO pins */
+
+/* Bits 17..16 : Pin sensing mechanism */
+#define GPIO_PIN_CNF_SENSE_Pos (16UL) /*!< Position of SENSE field. */
+#define GPIO_PIN_CNF_SENSE_Msk (0x3UL << GPIO_PIN_CNF_SENSE_Pos) /*!< Bit mask of SENSE field. */
+#define GPIO_PIN_CNF_SENSE_Disabled (0UL) /*!< Disabled */
+#define GPIO_PIN_CNF_SENSE_High (2UL) /*!< Sense for high level */
+#define GPIO_PIN_CNF_SENSE_Low (3UL) /*!< Sense for low level */
+
+/* Bits 10..8 : Drive configuration */
+#define GPIO_PIN_CNF_DRIVE_Pos (8UL) /*!< Position of DRIVE field. */
+#define GPIO_PIN_CNF_DRIVE_Msk (0x7UL << GPIO_PIN_CNF_DRIVE_Pos) /*!< Bit mask of DRIVE field. */
+#define GPIO_PIN_CNF_DRIVE_S0S1 (0UL) /*!< Standard '0', standard '1' */
+#define GPIO_PIN_CNF_DRIVE_H0S1 (1UL) /*!< High drive '0', standard '1' */
+#define GPIO_PIN_CNF_DRIVE_S0H1 (2UL) /*!< Standard '0', high drive '1' */
+#define GPIO_PIN_CNF_DRIVE_H0H1 (3UL) /*!< High drive '0', high 'drive '1'' */
+#define GPIO_PIN_CNF_DRIVE_D0S1 (4UL) /*!< Disconnect '0' standard '1' (normally used for wired-or connections) */
+#define GPIO_PIN_CNF_DRIVE_D0H1 (5UL) /*!< Disconnect '0', high drive '1' (normally used for wired-or connections) */
+#define GPIO_PIN_CNF_DRIVE_S0D1 (6UL) /*!< Standard '0'. disconnect '1' (normally used for wired-and connections) */
+#define GPIO_PIN_CNF_DRIVE_H0D1 (7UL) /*!< High drive '0', disconnect '1' (normally used for wired-and connections) */
+
+/* Bits 3..2 : Pull configuration */
+#define GPIO_PIN_CNF_PULL_Pos (2UL) /*!< Position of PULL field. */
+#define GPIO_PIN_CNF_PULL_Msk (0x3UL << GPIO_PIN_CNF_PULL_Pos) /*!< Bit mask of PULL field. */
+#define GPIO_PIN_CNF_PULL_Disabled (0UL) /*!< No pull */
+#define GPIO_PIN_CNF_PULL_Pulldown (1UL) /*!< Pull down on pin */
+#define GPIO_PIN_CNF_PULL_Pullup (3UL) /*!< Pull up on pin */
+
+/* Bit 1 : Connect or disconnect input buffer */
+#define GPIO_PIN_CNF_INPUT_Pos (1UL) /*!< Position of INPUT field. */
+#define GPIO_PIN_CNF_INPUT_Msk (0x1UL << GPIO_PIN_CNF_INPUT_Pos) /*!< Bit mask of INPUT field. */
+#define GPIO_PIN_CNF_INPUT_Connect (0UL) /*!< Connect input buffer */
+#define GPIO_PIN_CNF_INPUT_Disconnect (1UL) /*!< Disconnect input buffer */
+
+/* Bit 0 : Pin direction. Same physical register as DIR register */
+#define GPIO_PIN_CNF_DIR_Pos (0UL) /*!< Position of DIR field. */
+#define GPIO_PIN_CNF_DIR_Msk (0x1UL << GPIO_PIN_CNF_DIR_Pos) /*!< Bit mask of DIR field. */
+#define GPIO_PIN_CNF_DIR_Input (0UL) /*!< Configure pin as an input pin */
+#define GPIO_PIN_CNF_DIR_Output (1UL) /*!< Configure pin as an output pin */
+
+
+/* Peripheral: PDM */
+/* Description: Pulse Density Modulation (Digital Microphone) Interface */
+
+/* Register: PDM_TASKS_START */
+/* Description: Starts continuous PDM transfer */
+
+/* Bit 0 : Starts continuous PDM transfer */
+#define PDM_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */
+#define PDM_TASKS_START_TASKS_START_Msk (0x1UL << PDM_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */
+#define PDM_TASKS_START_TASKS_START_Trigger (1UL) /*!< Trigger task */
+
+/* Register: PDM_TASKS_STOP */
+/* Description: Stops PDM transfer */
+
+/* Bit 0 : Stops PDM transfer */
+#define PDM_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define PDM_TASKS_STOP_TASKS_STOP_Msk (0x1UL << PDM_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define PDM_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: PDM_EVENTS_STARTED */
+/* Description: PDM transfer has started */
+
+/* Bit 0 : PDM transfer has started */
+#define PDM_EVENTS_STARTED_EVENTS_STARTED_Pos (0UL) /*!< Position of EVENTS_STARTED field. */
+#define PDM_EVENTS_STARTED_EVENTS_STARTED_Msk (0x1UL << PDM_EVENTS_STARTED_EVENTS_STARTED_Pos) /*!< Bit mask of EVENTS_STARTED field. */
+#define PDM_EVENTS_STARTED_EVENTS_STARTED_NotGenerated (0UL) /*!< Event not generated */
+#define PDM_EVENTS_STARTED_EVENTS_STARTED_Generated (1UL) /*!< Event generated */
+
+/* Register: PDM_EVENTS_STOPPED */
+/* Description: PDM transfer has finished */
+
+/* Bit 0 : PDM transfer has finished */
+#define PDM_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */
+#define PDM_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << PDM_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */
+#define PDM_EVENTS_STOPPED_EVENTS_STOPPED_NotGenerated (0UL) /*!< Event not generated */
+#define PDM_EVENTS_STOPPED_EVENTS_STOPPED_Generated (1UL) /*!< Event generated */
+
+/* Register: PDM_EVENTS_END */
+/* Description: The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM */
+
+/* Bit 0 : The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM */
+#define PDM_EVENTS_END_EVENTS_END_Pos (0UL) /*!< Position of EVENTS_END field. */
+#define PDM_EVENTS_END_EVENTS_END_Msk (0x1UL << PDM_EVENTS_END_EVENTS_END_Pos) /*!< Bit mask of EVENTS_END field. */
+#define PDM_EVENTS_END_EVENTS_END_NotGenerated (0UL) /*!< Event not generated */
+#define PDM_EVENTS_END_EVENTS_END_Generated (1UL) /*!< Event generated */
+
+/* Register: PDM_INTEN */
+/* Description: Enable or disable interrupt */
+
+/* Bit 2 : Enable or disable interrupt for event END */
+#define PDM_INTEN_END_Pos (2UL) /*!< Position of END field. */
+#define PDM_INTEN_END_Msk (0x1UL << PDM_INTEN_END_Pos) /*!< Bit mask of END field. */
+#define PDM_INTEN_END_Disabled (0UL) /*!< Disable */
+#define PDM_INTEN_END_Enabled (1UL) /*!< Enable */
+
+/* Bit 1 : Enable or disable interrupt for event STOPPED */
+#define PDM_INTEN_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */
+#define PDM_INTEN_STOPPED_Msk (0x1UL << PDM_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define PDM_INTEN_STOPPED_Disabled (0UL) /*!< Disable */
+#define PDM_INTEN_STOPPED_Enabled (1UL) /*!< Enable */
+
+/* Bit 0 : Enable or disable interrupt for event STARTED */
+#define PDM_INTEN_STARTED_Pos (0UL) /*!< Position of STARTED field. */
+#define PDM_INTEN_STARTED_Msk (0x1UL << PDM_INTEN_STARTED_Pos) /*!< Bit mask of STARTED field. */
+#define PDM_INTEN_STARTED_Disabled (0UL) /*!< Disable */
+#define PDM_INTEN_STARTED_Enabled (1UL) /*!< Enable */
+
+/* Register: PDM_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 2 : Write '1' to enable interrupt for event END */
+#define PDM_INTENSET_END_Pos (2UL) /*!< Position of END field. */
+#define PDM_INTENSET_END_Msk (0x1UL << PDM_INTENSET_END_Pos) /*!< Bit mask of END field. */
+#define PDM_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */
+#define PDM_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */
+#define PDM_INTENSET_END_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event STOPPED */
+#define PDM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */
+#define PDM_INTENSET_STOPPED_Msk (0x1UL << PDM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define PDM_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define PDM_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define PDM_INTENSET_STOPPED_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event STARTED */
+#define PDM_INTENSET_STARTED_Pos (0UL) /*!< Position of STARTED field. */
+#define PDM_INTENSET_STARTED_Msk (0x1UL << PDM_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */
+#define PDM_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */
+#define PDM_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */
+#define PDM_INTENSET_STARTED_Set (1UL) /*!< Enable */
+
+/* Register: PDM_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 2 : Write '1' to disable interrupt for event END */
+#define PDM_INTENCLR_END_Pos (2UL) /*!< Position of END field. */
+#define PDM_INTENCLR_END_Msk (0x1UL << PDM_INTENCLR_END_Pos) /*!< Bit mask of END field. */
+#define PDM_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */
+#define PDM_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */
+#define PDM_INTENCLR_END_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event STOPPED */
+#define PDM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */
+#define PDM_INTENCLR_STOPPED_Msk (0x1UL << PDM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define PDM_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define PDM_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define PDM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event STARTED */
+#define PDM_INTENCLR_STARTED_Pos (0UL) /*!< Position of STARTED field. */
+#define PDM_INTENCLR_STARTED_Msk (0x1UL << PDM_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */
+#define PDM_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */
+#define PDM_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */
+#define PDM_INTENCLR_STARTED_Clear (1UL) /*!< Disable */
+
+/* Register: PDM_ENABLE */
+/* Description: PDM module enable register */
+
+/* Bit 0 : Enable or disable PDM module */
+#define PDM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define PDM_ENABLE_ENABLE_Msk (0x1UL << PDM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define PDM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */
+#define PDM_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */
+
+/* Register: PDM_PDMCLKCTRL */
+/* Description: PDM clock generator control */
+
+/* Bits 31..0 : PDM_CLK frequency */
+#define PDM_PDMCLKCTRL_FREQ_Pos (0UL) /*!< Position of FREQ field. */
+#define PDM_PDMCLKCTRL_FREQ_Msk (0xFFFFFFFFUL << PDM_PDMCLKCTRL_FREQ_Pos) /*!< Bit mask of FREQ field. */
+#define PDM_PDMCLKCTRL_FREQ_1000K (0x08000000UL) /*!< PDM_CLK = 32 MHz / 32 = 1.000 MHz */
+#define PDM_PDMCLKCTRL_FREQ_Default (0x08400000UL) /*!< PDM_CLK = 32 MHz / 31 = 1.032 MHz. Nominal clock for RATIO=Ratio64. */
+#define PDM_PDMCLKCTRL_FREQ_1067K (0x08800000UL) /*!< PDM_CLK = 32 MHz / 30 = 1.067 MHz */
+#define PDM_PDMCLKCTRL_FREQ_1231K (0x09800000UL) /*!< PDM_CLK = 32 MHz / 26 = 1.231 MHz */
+#define PDM_PDMCLKCTRL_FREQ_1280K (0x0A000000UL) /*!< PDM_CLK = 32 MHz / 25 = 1.280 MHz. Nominal clock for RATIO=Ratio80. */
+#define PDM_PDMCLKCTRL_FREQ_1333K (0x0A800000UL) /*!< PDM_CLK = 32 MHz / 24 = 1.333 MHz */
+
+/* Register: PDM_MODE */
+/* Description: Defines the routing of the connected PDM microphones' signals */
+
+/* Bit 1 : Defines on which PDM_CLK edge Left (or mono) is sampled */
+#define PDM_MODE_EDGE_Pos (1UL) /*!< Position of EDGE field. */
+#define PDM_MODE_EDGE_Msk (0x1UL << PDM_MODE_EDGE_Pos) /*!< Bit mask of EDGE field. */
+#define PDM_MODE_EDGE_LeftFalling (0UL) /*!< Left (or mono) is sampled on falling edge of PDM_CLK */
+#define PDM_MODE_EDGE_LeftRising (1UL) /*!< Left (or mono) is sampled on rising edge of PDM_CLK */
+
+/* Bit 0 : Mono or stereo operation */
+#define PDM_MODE_OPERATION_Pos (0UL) /*!< Position of OPERATION field. */
+#define PDM_MODE_OPERATION_Msk (0x1UL << PDM_MODE_OPERATION_Pos) /*!< Bit mask of OPERATION field. */
+#define PDM_MODE_OPERATION_Stereo (0UL) /*!< Sample and store one pair (Left + Right) of 16bit samples per RAM word R=[31:16]; L=[15:0] */
+#define PDM_MODE_OPERATION_Mono (1UL) /*!< Sample and store two successive Left samples (16 bit each) per RAM word L1=[31:16]; L0=[15:0] */
+
+/* Register: PDM_GAINL */
+/* Description: Left output gain adjustment */
+
+/* Bits 6..0 : Left output gain adjustment, in 0.5 dB steps, around the default module gain (see electrical parameters) 0x00 -20 dB gain adjust 0x01 -19.5 dB gain adjust (...) 0x27 -0.5 dB gain adjust 0x28 0 dB gain adjust 0x29 +0.5 dB gain adjust (...) 0x4F +19.5 dB gain adjust 0x50 +20 dB gain adjust */
+#define PDM_GAINL_GAINL_Pos (0UL) /*!< Position of GAINL field. */
+#define PDM_GAINL_GAINL_Msk (0x7FUL << PDM_GAINL_GAINL_Pos) /*!< Bit mask of GAINL field. */
+#define PDM_GAINL_GAINL_MinGain (0x00UL) /*!< -20dB gain adjustment (minimum) */
+#define PDM_GAINL_GAINL_DefaultGain (0x28UL) /*!< 0dB gain adjustment */
+#define PDM_GAINL_GAINL_MaxGain (0x50UL) /*!< +20dB gain adjustment (maximum) */
+
+/* Register: PDM_GAINR */
+/* Description: Right output gain adjustment */
+
+/* Bits 6..0 : Right output gain adjustment, in 0.5 dB steps, around the default module gain (see electrical parameters) */
+#define PDM_GAINR_GAINR_Pos (0UL) /*!< Position of GAINR field. */
+#define PDM_GAINR_GAINR_Msk (0x7FUL << PDM_GAINR_GAINR_Pos) /*!< Bit mask of GAINR field. */
+#define PDM_GAINR_GAINR_MinGain (0x00UL) /*!< -20dB gain adjustment (minimum) */
+#define PDM_GAINR_GAINR_DefaultGain (0x28UL) /*!< 0dB gain adjustment */
+#define PDM_GAINR_GAINR_MaxGain (0x50UL) /*!< +20dB gain adjustment (maximum) */
+
+/* Register: PDM_RATIO */
+/* Description: Selects the ratio between PDM_CLK and output sample rate. Change PDMCLKCTRL accordingly. */
+
+/* Bit 0 : Selects the ratio between PDM_CLK and output sample rate */
+#define PDM_RATIO_RATIO_Pos (0UL) /*!< Position of RATIO field. */
+#define PDM_RATIO_RATIO_Msk (0x1UL << PDM_RATIO_RATIO_Pos) /*!< Bit mask of RATIO field. */
+#define PDM_RATIO_RATIO_Ratio64 (0UL) /*!< Ratio of 64 */
+#define PDM_RATIO_RATIO_Ratio80 (1UL) /*!< Ratio of 80 */
+
+/* Register: PDM_PSEL_CLK */
+/* Description: Pin number configuration for PDM CLK signal */
+
+/* Bit 31 : Connection */
+#define PDM_PSEL_CLK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define PDM_PSEL_CLK_CONNECT_Msk (0x1UL << PDM_PSEL_CLK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define PDM_PSEL_CLK_CONNECT_Connected (0UL) /*!< Connect */
+#define PDM_PSEL_CLK_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define PDM_PSEL_CLK_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define PDM_PSEL_CLK_PORT_Msk (0x1UL << PDM_PSEL_CLK_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define PDM_PSEL_CLK_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define PDM_PSEL_CLK_PIN_Msk (0x1FUL << PDM_PSEL_CLK_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: PDM_PSEL_DIN */
+/* Description: Pin number configuration for PDM DIN signal */
+
+/* Bit 31 : Connection */
+#define PDM_PSEL_DIN_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define PDM_PSEL_DIN_CONNECT_Msk (0x1UL << PDM_PSEL_DIN_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define PDM_PSEL_DIN_CONNECT_Connected (0UL) /*!< Connect */
+#define PDM_PSEL_DIN_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define PDM_PSEL_DIN_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define PDM_PSEL_DIN_PORT_Msk (0x1UL << PDM_PSEL_DIN_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define PDM_PSEL_DIN_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define PDM_PSEL_DIN_PIN_Msk (0x1FUL << PDM_PSEL_DIN_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: PDM_SAMPLE_PTR */
+/* Description: RAM address pointer to write samples to with EasyDMA */
+
+/* Bits 31..0 : Address to write PDM samples to over DMA */
+#define PDM_SAMPLE_PTR_SAMPLEPTR_Pos (0UL) /*!< Position of SAMPLEPTR field. */
+#define PDM_SAMPLE_PTR_SAMPLEPTR_Msk (0xFFFFFFFFUL << PDM_SAMPLE_PTR_SAMPLEPTR_Pos) /*!< Bit mask of SAMPLEPTR field. */
+
+/* Register: PDM_SAMPLE_MAXCNT */
+/* Description: Number of samples to allocate memory for in EasyDMA mode */
+
+/* Bits 14..0 : Length of DMA RAM allocation in number of samples */
+#define PDM_SAMPLE_MAXCNT_BUFFSIZE_Pos (0UL) /*!< Position of BUFFSIZE field. */
+#define PDM_SAMPLE_MAXCNT_BUFFSIZE_Msk (0x7FFFUL << PDM_SAMPLE_MAXCNT_BUFFSIZE_Pos) /*!< Bit mask of BUFFSIZE field. */
+
+
+/* Peripheral: POWER */
+/* Description: Power control */
+
+/* Register: POWER_TASKS_CONSTLAT */
+/* Description: Enable Constant Latency mode */
+
+/* Bit 0 : Enable Constant Latency mode */
+#define POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Pos (0UL) /*!< Position of TASKS_CONSTLAT field. */
+#define POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Msk (0x1UL << POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Pos) /*!< Bit mask of TASKS_CONSTLAT field. */
+#define POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Trigger (1UL) /*!< Trigger task */
+
+/* Register: POWER_TASKS_LOWPWR */
+/* Description: Enable Low-power mode (variable latency) */
+
+/* Bit 0 : Enable Low-power mode (variable latency) */
+#define POWER_TASKS_LOWPWR_TASKS_LOWPWR_Pos (0UL) /*!< Position of TASKS_LOWPWR field. */
+#define POWER_TASKS_LOWPWR_TASKS_LOWPWR_Msk (0x1UL << POWER_TASKS_LOWPWR_TASKS_LOWPWR_Pos) /*!< Bit mask of TASKS_LOWPWR field. */
+#define POWER_TASKS_LOWPWR_TASKS_LOWPWR_Trigger (1UL) /*!< Trigger task */
+
+/* Register: POWER_EVENTS_POFWARN */
+/* Description: Power failure warning */
+
+/* Bit 0 : Power failure warning */
+#define POWER_EVENTS_POFWARN_EVENTS_POFWARN_Pos (0UL) /*!< Position of EVENTS_POFWARN field. */
+#define POWER_EVENTS_POFWARN_EVENTS_POFWARN_Msk (0x1UL << POWER_EVENTS_POFWARN_EVENTS_POFWARN_Pos) /*!< Bit mask of EVENTS_POFWARN field. */
+#define POWER_EVENTS_POFWARN_EVENTS_POFWARN_NotGenerated (0UL) /*!< Event not generated */
+#define POWER_EVENTS_POFWARN_EVENTS_POFWARN_Generated (1UL) /*!< Event generated */
+
+/* Register: POWER_EVENTS_SLEEPENTER */
+/* Description: CPU entered WFI/WFE sleep */
+
+/* Bit 0 : CPU entered WFI/WFE sleep */
+#define POWER_EVENTS_SLEEPENTER_EVENTS_SLEEPENTER_Pos (0UL) /*!< Position of EVENTS_SLEEPENTER field. */
+#define POWER_EVENTS_SLEEPENTER_EVENTS_SLEEPENTER_Msk (0x1UL << POWER_EVENTS_SLEEPENTER_EVENTS_SLEEPENTER_Pos) /*!< Bit mask of EVENTS_SLEEPENTER field. */
+#define POWER_EVENTS_SLEEPENTER_EVENTS_SLEEPENTER_NotGenerated (0UL) /*!< Event not generated */
+#define POWER_EVENTS_SLEEPENTER_EVENTS_SLEEPENTER_Generated (1UL) /*!< Event generated */
+
+/* Register: POWER_EVENTS_SLEEPEXIT */
+/* Description: CPU exited WFI/WFE sleep */
+
+/* Bit 0 : CPU exited WFI/WFE sleep */
+#define POWER_EVENTS_SLEEPEXIT_EVENTS_SLEEPEXIT_Pos (0UL) /*!< Position of EVENTS_SLEEPEXIT field. */
+#define POWER_EVENTS_SLEEPEXIT_EVENTS_SLEEPEXIT_Msk (0x1UL << POWER_EVENTS_SLEEPEXIT_EVENTS_SLEEPEXIT_Pos) /*!< Bit mask of EVENTS_SLEEPEXIT field. */
+#define POWER_EVENTS_SLEEPEXIT_EVENTS_SLEEPEXIT_NotGenerated (0UL) /*!< Event not generated */
+#define POWER_EVENTS_SLEEPEXIT_EVENTS_SLEEPEXIT_Generated (1UL) /*!< Event generated */
+
+/* Register: POWER_EVENTS_USBDETECTED */
+/* Description: Voltage supply detected on VBUS */
+
+/* Bit 0 : Voltage supply detected on VBUS */
+#define POWER_EVENTS_USBDETECTED_EVENTS_USBDETECTED_Pos (0UL) /*!< Position of EVENTS_USBDETECTED field. */
+#define POWER_EVENTS_USBDETECTED_EVENTS_USBDETECTED_Msk (0x1UL << POWER_EVENTS_USBDETECTED_EVENTS_USBDETECTED_Pos) /*!< Bit mask of EVENTS_USBDETECTED field. */
+#define POWER_EVENTS_USBDETECTED_EVENTS_USBDETECTED_NotGenerated (0UL) /*!< Event not generated */
+#define POWER_EVENTS_USBDETECTED_EVENTS_USBDETECTED_Generated (1UL) /*!< Event generated */
+
+/* Register: POWER_EVENTS_USBREMOVED */
+/* Description: Voltage supply removed from VBUS */
+
+/* Bit 0 : Voltage supply removed from VBUS */
+#define POWER_EVENTS_USBREMOVED_EVENTS_USBREMOVED_Pos (0UL) /*!< Position of EVENTS_USBREMOVED field. */
+#define POWER_EVENTS_USBREMOVED_EVENTS_USBREMOVED_Msk (0x1UL << POWER_EVENTS_USBREMOVED_EVENTS_USBREMOVED_Pos) /*!< Bit mask of EVENTS_USBREMOVED field. */
+#define POWER_EVENTS_USBREMOVED_EVENTS_USBREMOVED_NotGenerated (0UL) /*!< Event not generated */
+#define POWER_EVENTS_USBREMOVED_EVENTS_USBREMOVED_Generated (1UL) /*!< Event generated */
+
+/* Register: POWER_EVENTS_USBPWRRDY */
+/* Description: USB 3.3 V supply ready */
+
+/* Bit 0 : USB 3.3 V supply ready */
+#define POWER_EVENTS_USBPWRRDY_EVENTS_USBPWRRDY_Pos (0UL) /*!< Position of EVENTS_USBPWRRDY field. */
+#define POWER_EVENTS_USBPWRRDY_EVENTS_USBPWRRDY_Msk (0x1UL << POWER_EVENTS_USBPWRRDY_EVENTS_USBPWRRDY_Pos) /*!< Bit mask of EVENTS_USBPWRRDY field. */
+#define POWER_EVENTS_USBPWRRDY_EVENTS_USBPWRRDY_NotGenerated (0UL) /*!< Event not generated */
+#define POWER_EVENTS_USBPWRRDY_EVENTS_USBPWRRDY_Generated (1UL) /*!< Event generated */
+
+/* Register: POWER_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 9 : Write '1' to enable interrupt for event USBPWRRDY */
+#define POWER_INTENSET_USBPWRRDY_Pos (9UL) /*!< Position of USBPWRRDY field. */
+#define POWER_INTENSET_USBPWRRDY_Msk (0x1UL << POWER_INTENSET_USBPWRRDY_Pos) /*!< Bit mask of USBPWRRDY field. */
+#define POWER_INTENSET_USBPWRRDY_Disabled (0UL) /*!< Read: Disabled */
+#define POWER_INTENSET_USBPWRRDY_Enabled (1UL) /*!< Read: Enabled */
+#define POWER_INTENSET_USBPWRRDY_Set (1UL) /*!< Enable */
+
+/* Bit 8 : Write '1' to enable interrupt for event USBREMOVED */
+#define POWER_INTENSET_USBREMOVED_Pos (8UL) /*!< Position of USBREMOVED field. */
+#define POWER_INTENSET_USBREMOVED_Msk (0x1UL << POWER_INTENSET_USBREMOVED_Pos) /*!< Bit mask of USBREMOVED field. */
+#define POWER_INTENSET_USBREMOVED_Disabled (0UL) /*!< Read: Disabled */
+#define POWER_INTENSET_USBREMOVED_Enabled (1UL) /*!< Read: Enabled */
+#define POWER_INTENSET_USBREMOVED_Set (1UL) /*!< Enable */
+
+/* Bit 7 : Write '1' to enable interrupt for event USBDETECTED */
+#define POWER_INTENSET_USBDETECTED_Pos (7UL) /*!< Position of USBDETECTED field. */
+#define POWER_INTENSET_USBDETECTED_Msk (0x1UL << POWER_INTENSET_USBDETECTED_Pos) /*!< Bit mask of USBDETECTED field. */
+#define POWER_INTENSET_USBDETECTED_Disabled (0UL) /*!< Read: Disabled */
+#define POWER_INTENSET_USBDETECTED_Enabled (1UL) /*!< Read: Enabled */
+#define POWER_INTENSET_USBDETECTED_Set (1UL) /*!< Enable */
+
+/* Bit 6 : Write '1' to enable interrupt for event SLEEPEXIT */
+#define POWER_INTENSET_SLEEPEXIT_Pos (6UL) /*!< Position of SLEEPEXIT field. */
+#define POWER_INTENSET_SLEEPEXIT_Msk (0x1UL << POWER_INTENSET_SLEEPEXIT_Pos) /*!< Bit mask of SLEEPEXIT field. */
+#define POWER_INTENSET_SLEEPEXIT_Disabled (0UL) /*!< Read: Disabled */
+#define POWER_INTENSET_SLEEPEXIT_Enabled (1UL) /*!< Read: Enabled */
+#define POWER_INTENSET_SLEEPEXIT_Set (1UL) /*!< Enable */
+
+/* Bit 5 : Write '1' to enable interrupt for event SLEEPENTER */
+#define POWER_INTENSET_SLEEPENTER_Pos (5UL) /*!< Position of SLEEPENTER field. */
+#define POWER_INTENSET_SLEEPENTER_Msk (0x1UL << POWER_INTENSET_SLEEPENTER_Pos) /*!< Bit mask of SLEEPENTER field. */
+#define POWER_INTENSET_SLEEPENTER_Disabled (0UL) /*!< Read: Disabled */
+#define POWER_INTENSET_SLEEPENTER_Enabled (1UL) /*!< Read: Enabled */
+#define POWER_INTENSET_SLEEPENTER_Set (1UL) /*!< Enable */
+
+/* Bit 2 : Write '1' to enable interrupt for event POFWARN */
+#define POWER_INTENSET_POFWARN_Pos (2UL) /*!< Position of POFWARN field. */
+#define POWER_INTENSET_POFWARN_Msk (0x1UL << POWER_INTENSET_POFWARN_Pos) /*!< Bit mask of POFWARN field. */
+#define POWER_INTENSET_POFWARN_Disabled (0UL) /*!< Read: Disabled */
+#define POWER_INTENSET_POFWARN_Enabled (1UL) /*!< Read: Enabled */
+#define POWER_INTENSET_POFWARN_Set (1UL) /*!< Enable */
+
+/* Register: POWER_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 9 : Write '1' to disable interrupt for event USBPWRRDY */
+#define POWER_INTENCLR_USBPWRRDY_Pos (9UL) /*!< Position of USBPWRRDY field. */
+#define POWER_INTENCLR_USBPWRRDY_Msk (0x1UL << POWER_INTENCLR_USBPWRRDY_Pos) /*!< Bit mask of USBPWRRDY field. */
+#define POWER_INTENCLR_USBPWRRDY_Disabled (0UL) /*!< Read: Disabled */
+#define POWER_INTENCLR_USBPWRRDY_Enabled (1UL) /*!< Read: Enabled */
+#define POWER_INTENCLR_USBPWRRDY_Clear (1UL) /*!< Disable */
+
+/* Bit 8 : Write '1' to disable interrupt for event USBREMOVED */
+#define POWER_INTENCLR_USBREMOVED_Pos (8UL) /*!< Position of USBREMOVED field. */
+#define POWER_INTENCLR_USBREMOVED_Msk (0x1UL << POWER_INTENCLR_USBREMOVED_Pos) /*!< Bit mask of USBREMOVED field. */
+#define POWER_INTENCLR_USBREMOVED_Disabled (0UL) /*!< Read: Disabled */
+#define POWER_INTENCLR_USBREMOVED_Enabled (1UL) /*!< Read: Enabled */
+#define POWER_INTENCLR_USBREMOVED_Clear (1UL) /*!< Disable */
+
+/* Bit 7 : Write '1' to disable interrupt for event USBDETECTED */
+#define POWER_INTENCLR_USBDETECTED_Pos (7UL) /*!< Position of USBDETECTED field. */
+#define POWER_INTENCLR_USBDETECTED_Msk (0x1UL << POWER_INTENCLR_USBDETECTED_Pos) /*!< Bit mask of USBDETECTED field. */
+#define POWER_INTENCLR_USBDETECTED_Disabled (0UL) /*!< Read: Disabled */
+#define POWER_INTENCLR_USBDETECTED_Enabled (1UL) /*!< Read: Enabled */
+#define POWER_INTENCLR_USBDETECTED_Clear (1UL) /*!< Disable */
+
+/* Bit 6 : Write '1' to disable interrupt for event SLEEPEXIT */
+#define POWER_INTENCLR_SLEEPEXIT_Pos (6UL) /*!< Position of SLEEPEXIT field. */
+#define POWER_INTENCLR_SLEEPEXIT_Msk (0x1UL << POWER_INTENCLR_SLEEPEXIT_Pos) /*!< Bit mask of SLEEPEXIT field. */
+#define POWER_INTENCLR_SLEEPEXIT_Disabled (0UL) /*!< Read: Disabled */
+#define POWER_INTENCLR_SLEEPEXIT_Enabled (1UL) /*!< Read: Enabled */
+#define POWER_INTENCLR_SLEEPEXIT_Clear (1UL) /*!< Disable */
+
+/* Bit 5 : Write '1' to disable interrupt for event SLEEPENTER */
+#define POWER_INTENCLR_SLEEPENTER_Pos (5UL) /*!< Position of SLEEPENTER field. */
+#define POWER_INTENCLR_SLEEPENTER_Msk (0x1UL << POWER_INTENCLR_SLEEPENTER_Pos) /*!< Bit mask of SLEEPENTER field. */
+#define POWER_INTENCLR_SLEEPENTER_Disabled (0UL) /*!< Read: Disabled */
+#define POWER_INTENCLR_SLEEPENTER_Enabled (1UL) /*!< Read: Enabled */
+#define POWER_INTENCLR_SLEEPENTER_Clear (1UL) /*!< Disable */
+
+/* Bit 2 : Write '1' to disable interrupt for event POFWARN */
+#define POWER_INTENCLR_POFWARN_Pos (2UL) /*!< Position of POFWARN field. */
+#define POWER_INTENCLR_POFWARN_Msk (0x1UL << POWER_INTENCLR_POFWARN_Pos) /*!< Bit mask of POFWARN field. */
+#define POWER_INTENCLR_POFWARN_Disabled (0UL) /*!< Read: Disabled */
+#define POWER_INTENCLR_POFWARN_Enabled (1UL) /*!< Read: Enabled */
+#define POWER_INTENCLR_POFWARN_Clear (1UL) /*!< Disable */
+
+/* Register: POWER_RESETREAS */
+/* Description: Reset reason */
+
+/* Bit 20 : Reset due to wake up from System OFF mode by VBUS rising into valid range */
+#define POWER_RESETREAS_VBUS_Pos (20UL) /*!< Position of VBUS field. */
+#define POWER_RESETREAS_VBUS_Msk (0x1UL << POWER_RESETREAS_VBUS_Pos) /*!< Bit mask of VBUS field. */
+#define POWER_RESETREAS_VBUS_NotDetected (0UL) /*!< Not detected */
+#define POWER_RESETREAS_VBUS_Detected (1UL) /*!< Detected */
+
+/* Bit 19 : Reset due to wake up from System OFF mode by NFC field detect */
+#define POWER_RESETREAS_NFC_Pos (19UL) /*!< Position of NFC field. */
+#define POWER_RESETREAS_NFC_Msk (0x1UL << POWER_RESETREAS_NFC_Pos) /*!< Bit mask of NFC field. */
+#define POWER_RESETREAS_NFC_NotDetected (0UL) /*!< Not detected */
+#define POWER_RESETREAS_NFC_Detected (1UL) /*!< Detected */
+
+/* Bit 18 : Reset due to wake up from System OFF mode when wakeup is triggered from entering into debug interface mode */
+#define POWER_RESETREAS_DIF_Pos (18UL) /*!< Position of DIF field. */
+#define POWER_RESETREAS_DIF_Msk (0x1UL << POWER_RESETREAS_DIF_Pos) /*!< Bit mask of DIF field. */
+#define POWER_RESETREAS_DIF_NotDetected (0UL) /*!< Not detected */
+#define POWER_RESETREAS_DIF_Detected (1UL) /*!< Detected */
+
+/* Bit 17 : Reset due to wake up from System OFF mode when wakeup is triggered from ANADETECT signal from LPCOMP */
+#define POWER_RESETREAS_LPCOMP_Pos (17UL) /*!< Position of LPCOMP field. */
+#define POWER_RESETREAS_LPCOMP_Msk (0x1UL << POWER_RESETREAS_LPCOMP_Pos) /*!< Bit mask of LPCOMP field. */
+#define POWER_RESETREAS_LPCOMP_NotDetected (0UL) /*!< Not detected */
+#define POWER_RESETREAS_LPCOMP_Detected (1UL) /*!< Detected */
+
+/* Bit 16 : Reset due to wake up from System OFF mode when wakeup is triggered from DETECT signal from GPIO */
+#define POWER_RESETREAS_OFF_Pos (16UL) /*!< Position of OFF field. */
+#define POWER_RESETREAS_OFF_Msk (0x1UL << POWER_RESETREAS_OFF_Pos) /*!< Bit mask of OFF field. */
+#define POWER_RESETREAS_OFF_NotDetected (0UL) /*!< Not detected */
+#define POWER_RESETREAS_OFF_Detected (1UL) /*!< Detected */
+
+/* Bit 3 : Reset from CPU lock-up detected */
+#define POWER_RESETREAS_LOCKUP_Pos (3UL) /*!< Position of LOCKUP field. */
+#define POWER_RESETREAS_LOCKUP_Msk (0x1UL << POWER_RESETREAS_LOCKUP_Pos) /*!< Bit mask of LOCKUP field. */
+#define POWER_RESETREAS_LOCKUP_NotDetected (0UL) /*!< Not detected */
+#define POWER_RESETREAS_LOCKUP_Detected (1UL) /*!< Detected */
+
+/* Bit 2 : Reset from soft reset detected */
+#define POWER_RESETREAS_SREQ_Pos (2UL) /*!< Position of SREQ field. */
+#define POWER_RESETREAS_SREQ_Msk (0x1UL << POWER_RESETREAS_SREQ_Pos) /*!< Bit mask of SREQ field. */
+#define POWER_RESETREAS_SREQ_NotDetected (0UL) /*!< Not detected */
+#define POWER_RESETREAS_SREQ_Detected (1UL) /*!< Detected */
+
+/* Bit 1 : Reset from watchdog detected */
+#define POWER_RESETREAS_DOG_Pos (1UL) /*!< Position of DOG field. */
+#define POWER_RESETREAS_DOG_Msk (0x1UL << POWER_RESETREAS_DOG_Pos) /*!< Bit mask of DOG field. */
+#define POWER_RESETREAS_DOG_NotDetected (0UL) /*!< Not detected */
+#define POWER_RESETREAS_DOG_Detected (1UL) /*!< Detected */
+
+/* Bit 0 : Reset from pin-reset detected */
+#define POWER_RESETREAS_RESETPIN_Pos (0UL) /*!< Position of RESETPIN field. */
+#define POWER_RESETREAS_RESETPIN_Msk (0x1UL << POWER_RESETREAS_RESETPIN_Pos) /*!< Bit mask of RESETPIN field. */
+#define POWER_RESETREAS_RESETPIN_NotDetected (0UL) /*!< Not detected */
+#define POWER_RESETREAS_RESETPIN_Detected (1UL) /*!< Detected */
+
+/* Register: POWER_RAMSTATUS */
+/* Description: Deprecated register - RAM status register */
+
+/* Bit 3 : RAM block 3 is on or off/powering up */
+#define POWER_RAMSTATUS_RAMBLOCK3_Pos (3UL) /*!< Position of RAMBLOCK3 field. */
+#define POWER_RAMSTATUS_RAMBLOCK3_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK3_Pos) /*!< Bit mask of RAMBLOCK3 field. */
+#define POWER_RAMSTATUS_RAMBLOCK3_Off (0UL) /*!< Off */
+#define POWER_RAMSTATUS_RAMBLOCK3_On (1UL) /*!< On */
+
+/* Bit 2 : RAM block 2 is on or off/powering up */
+#define POWER_RAMSTATUS_RAMBLOCK2_Pos (2UL) /*!< Position of RAMBLOCK2 field. */
+#define POWER_RAMSTATUS_RAMBLOCK2_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK2_Pos) /*!< Bit mask of RAMBLOCK2 field. */
+#define POWER_RAMSTATUS_RAMBLOCK2_Off (0UL) /*!< Off */
+#define POWER_RAMSTATUS_RAMBLOCK2_On (1UL) /*!< On */
+
+/* Bit 1 : RAM block 1 is on or off/powering up */
+#define POWER_RAMSTATUS_RAMBLOCK1_Pos (1UL) /*!< Position of RAMBLOCK1 field. */
+#define POWER_RAMSTATUS_RAMBLOCK1_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK1_Pos) /*!< Bit mask of RAMBLOCK1 field. */
+#define POWER_RAMSTATUS_RAMBLOCK1_Off (0UL) /*!< Off */
+#define POWER_RAMSTATUS_RAMBLOCK1_On (1UL) /*!< On */
+
+/* Bit 0 : RAM block 0 is on or off/powering up */
+#define POWER_RAMSTATUS_RAMBLOCK0_Pos (0UL) /*!< Position of RAMBLOCK0 field. */
+#define POWER_RAMSTATUS_RAMBLOCK0_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK0_Pos) /*!< Bit mask of RAMBLOCK0 field. */
+#define POWER_RAMSTATUS_RAMBLOCK0_Off (0UL) /*!< Off */
+#define POWER_RAMSTATUS_RAMBLOCK0_On (1UL) /*!< On */
+
+/* Register: POWER_USBREGSTATUS */
+/* Description: USB supply status */
+
+/* Bit 1 : USB supply output settling time elapsed */
+#define POWER_USBREGSTATUS_OUTPUTRDY_Pos (1UL) /*!< Position of OUTPUTRDY field. */
+#define POWER_USBREGSTATUS_OUTPUTRDY_Msk (0x1UL << POWER_USBREGSTATUS_OUTPUTRDY_Pos) /*!< Bit mask of OUTPUTRDY field. */
+#define POWER_USBREGSTATUS_OUTPUTRDY_NotReady (0UL) /*!< USBREG output settling time not elapsed */
+#define POWER_USBREGSTATUS_OUTPUTRDY_Ready (1UL) /*!< USBREG output settling time elapsed (same information as USBPWRRDY event) */
+
+/* Bit 0 : VBUS input detection status (USBDETECTED and USBREMOVED events are derived from this information) */
+#define POWER_USBREGSTATUS_VBUSDETECT_Pos (0UL) /*!< Position of VBUSDETECT field. */
+#define POWER_USBREGSTATUS_VBUSDETECT_Msk (0x1UL << POWER_USBREGSTATUS_VBUSDETECT_Pos) /*!< Bit mask of VBUSDETECT field. */
+#define POWER_USBREGSTATUS_VBUSDETECT_NoVbus (0UL) /*!< VBUS voltage below valid threshold */
+#define POWER_USBREGSTATUS_VBUSDETECT_VbusPresent (1UL) /*!< VBUS voltage above valid threshold */
+
+/* Register: POWER_SYSTEMOFF */
+/* Description: System OFF register */
+
+/* Bit 0 : Enable System OFF mode */
+#define POWER_SYSTEMOFF_SYSTEMOFF_Pos (0UL) /*!< Position of SYSTEMOFF field. */
+#define POWER_SYSTEMOFF_SYSTEMOFF_Msk (0x1UL << POWER_SYSTEMOFF_SYSTEMOFF_Pos) /*!< Bit mask of SYSTEMOFF field. */
+#define POWER_SYSTEMOFF_SYSTEMOFF_Enter (1UL) /*!< Enable System OFF mode */
+
+/* Register: POWER_POFCON */
+/* Description: Power-fail comparator configuration */
+
+/* Bits 11..8 : Power-fail comparator threshold setting for high voltage mode (supply connected to VDDH only). This setting does not apply for normal voltage mode (supply connected to both VDD and VDDH). */
+#define POWER_POFCON_THRESHOLDVDDH_Pos (8UL) /*!< Position of THRESHOLDVDDH field. */
+#define POWER_POFCON_THRESHOLDVDDH_Msk (0xFUL << POWER_POFCON_THRESHOLDVDDH_Pos) /*!< Bit mask of THRESHOLDVDDH field. */
+#define POWER_POFCON_THRESHOLDVDDH_V27 (0UL) /*!< Set threshold to 2.7 V */
+#define POWER_POFCON_THRESHOLDVDDH_V28 (1UL) /*!< Set threshold to 2.8 V */
+#define POWER_POFCON_THRESHOLDVDDH_V29 (2UL) /*!< Set threshold to 2.9 V */
+#define POWER_POFCON_THRESHOLDVDDH_V30 (3UL) /*!< Set threshold to 3.0 V */
+#define POWER_POFCON_THRESHOLDVDDH_V31 (4UL) /*!< Set threshold to 3.1 V */
+#define POWER_POFCON_THRESHOLDVDDH_V32 (5UL) /*!< Set threshold to 3.2 V */
+#define POWER_POFCON_THRESHOLDVDDH_V33 (6UL) /*!< Set threshold to 3.3 V */
+#define POWER_POFCON_THRESHOLDVDDH_V34 (7UL) /*!< Set threshold to 3.4 V */
+#define POWER_POFCON_THRESHOLDVDDH_V35 (8UL) /*!< Set threshold to 3.5 V */
+#define POWER_POFCON_THRESHOLDVDDH_V36 (9UL) /*!< Set threshold to 3.6 V */
+#define POWER_POFCON_THRESHOLDVDDH_V37 (10UL) /*!< Set threshold to 3.7 V */
+#define POWER_POFCON_THRESHOLDVDDH_V38 (11UL) /*!< Set threshold to 3.8 V */
+#define POWER_POFCON_THRESHOLDVDDH_V39 (12UL) /*!< Set threshold to 3.9 V */
+#define POWER_POFCON_THRESHOLDVDDH_V40 (13UL) /*!< Set threshold to 4.0 V */
+#define POWER_POFCON_THRESHOLDVDDH_V41 (14UL) /*!< Set threshold to 4.1 V */
+#define POWER_POFCON_THRESHOLDVDDH_V42 (15UL) /*!< Set threshold to 4.2 V */
+
+/* Bits 4..1 : Power-fail comparator threshold setting. This setting applies both for normal voltage mode (supply connected to both VDD and VDDH) and high voltage mode (supply connected to VDDH only). Values 0-3 set threshold below 1.7 V and should not be used as brown out detection will be activated before power failure warning on such low voltages. */
+#define POWER_POFCON_THRESHOLD_Pos (1UL) /*!< Position of THRESHOLD field. */
+#define POWER_POFCON_THRESHOLD_Msk (0xFUL << POWER_POFCON_THRESHOLD_Pos) /*!< Bit mask of THRESHOLD field. */
+#define POWER_POFCON_THRESHOLD_V17 (4UL) /*!< Set threshold to 1.7 V */
+#define POWER_POFCON_THRESHOLD_V18 (5UL) /*!< Set threshold to 1.8 V */
+#define POWER_POFCON_THRESHOLD_V19 (6UL) /*!< Set threshold to 1.9 V */
+#define POWER_POFCON_THRESHOLD_V20 (7UL) /*!< Set threshold to 2.0 V */
+#define POWER_POFCON_THRESHOLD_V21 (8UL) /*!< Set threshold to 2.1 V */
+#define POWER_POFCON_THRESHOLD_V22 (9UL) /*!< Set threshold to 2.2 V */
+#define POWER_POFCON_THRESHOLD_V23 (10UL) /*!< Set threshold to 2.3 V */
+#define POWER_POFCON_THRESHOLD_V24 (11UL) /*!< Set threshold to 2.4 V */
+#define POWER_POFCON_THRESHOLD_V25 (12UL) /*!< Set threshold to 2.5 V */
+#define POWER_POFCON_THRESHOLD_V26 (13UL) /*!< Set threshold to 2.6 V */
+#define POWER_POFCON_THRESHOLD_V27 (14UL) /*!< Set threshold to 2.7 V */
+#define POWER_POFCON_THRESHOLD_V28 (15UL) /*!< Set threshold to 2.8 V */
+
+/* Bit 0 : Enable or disable power failure warning */
+#define POWER_POFCON_POF_Pos (0UL) /*!< Position of POF field. */
+#define POWER_POFCON_POF_Msk (0x1UL << POWER_POFCON_POF_Pos) /*!< Bit mask of POF field. */
+#define POWER_POFCON_POF_Disabled (0UL) /*!< Disable */
+#define POWER_POFCON_POF_Enabled (1UL) /*!< Enable */
+
+/* Register: POWER_GPREGRET */
+/* Description: General purpose retention register */
+
+/* Bits 7..0 : General purpose retention register */
+#define POWER_GPREGRET_GPREGRET_Pos (0UL) /*!< Position of GPREGRET field. */
+#define POWER_GPREGRET_GPREGRET_Msk (0xFFUL << POWER_GPREGRET_GPREGRET_Pos) /*!< Bit mask of GPREGRET field. */
+
+/* Register: POWER_GPREGRET2 */
+/* Description: General purpose retention register */
+
+/* Bits 7..0 : General purpose retention register */
+#define POWER_GPREGRET2_GPREGRET_Pos (0UL) /*!< Position of GPREGRET field. */
+#define POWER_GPREGRET2_GPREGRET_Msk (0xFFUL << POWER_GPREGRET2_GPREGRET_Pos) /*!< Bit mask of GPREGRET field. */
+
+/* Register: POWER_DCDCEN */
+/* Description: Enable DC/DC converter for REG1 stage */
+
+/* Bit 0 : Enable DC/DC converter for REG1 stage. */
+#define POWER_DCDCEN_DCDCEN_Pos (0UL) /*!< Position of DCDCEN field. */
+#define POWER_DCDCEN_DCDCEN_Msk (0x1UL << POWER_DCDCEN_DCDCEN_Pos) /*!< Bit mask of DCDCEN field. */
+#define POWER_DCDCEN_DCDCEN_Disabled (0UL) /*!< Disable */
+#define POWER_DCDCEN_DCDCEN_Enabled (1UL) /*!< Enable */
+
+/* Register: POWER_MAINREGSTATUS */
+/* Description: Main supply status */
+
+/* Bit 0 : Main supply status */
+#define POWER_MAINREGSTATUS_MAINREGSTATUS_Pos (0UL) /*!< Position of MAINREGSTATUS field. */
+#define POWER_MAINREGSTATUS_MAINREGSTATUS_Msk (0x1UL << POWER_MAINREGSTATUS_MAINREGSTATUS_Pos) /*!< Bit mask of MAINREGSTATUS field. */
+#define POWER_MAINREGSTATUS_MAINREGSTATUS_Normal (0UL) /*!< Normal voltage mode. Voltage supplied on VDD. */
+#define POWER_MAINREGSTATUS_MAINREGSTATUS_High (1UL) /*!< High voltage mode. Voltage supplied on VDDH. */
+
+/* Register: POWER_RAM_POWER */
+/* Description: Description cluster: RAMn power control register */
+
+/* Bit 31 : Keep retention on RAM section S15 when RAM section is off */
+#define POWER_RAM_POWER_S15RETENTION_Pos (31UL) /*!< Position of S15RETENTION field. */
+#define POWER_RAM_POWER_S15RETENTION_Msk (0x1UL << POWER_RAM_POWER_S15RETENTION_Pos) /*!< Bit mask of S15RETENTION field. */
+#define POWER_RAM_POWER_S15RETENTION_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S15RETENTION_On (1UL) /*!< On */
+
+/* Bit 30 : Keep retention on RAM section S14 when RAM section is off */
+#define POWER_RAM_POWER_S14RETENTION_Pos (30UL) /*!< Position of S14RETENTION field. */
+#define POWER_RAM_POWER_S14RETENTION_Msk (0x1UL << POWER_RAM_POWER_S14RETENTION_Pos) /*!< Bit mask of S14RETENTION field. */
+#define POWER_RAM_POWER_S14RETENTION_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S14RETENTION_On (1UL) /*!< On */
+
+/* Bit 29 : Keep retention on RAM section S13 when RAM section is off */
+#define POWER_RAM_POWER_S13RETENTION_Pos (29UL) /*!< Position of S13RETENTION field. */
+#define POWER_RAM_POWER_S13RETENTION_Msk (0x1UL << POWER_RAM_POWER_S13RETENTION_Pos) /*!< Bit mask of S13RETENTION field. */
+#define POWER_RAM_POWER_S13RETENTION_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S13RETENTION_On (1UL) /*!< On */
+
+/* Bit 28 : Keep retention on RAM section S12 when RAM section is off */
+#define POWER_RAM_POWER_S12RETENTION_Pos (28UL) /*!< Position of S12RETENTION field. */
+#define POWER_RAM_POWER_S12RETENTION_Msk (0x1UL << POWER_RAM_POWER_S12RETENTION_Pos) /*!< Bit mask of S12RETENTION field. */
+#define POWER_RAM_POWER_S12RETENTION_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S12RETENTION_On (1UL) /*!< On */
+
+/* Bit 27 : Keep retention on RAM section S11 when RAM section is off */
+#define POWER_RAM_POWER_S11RETENTION_Pos (27UL) /*!< Position of S11RETENTION field. */
+#define POWER_RAM_POWER_S11RETENTION_Msk (0x1UL << POWER_RAM_POWER_S11RETENTION_Pos) /*!< Bit mask of S11RETENTION field. */
+#define POWER_RAM_POWER_S11RETENTION_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S11RETENTION_On (1UL) /*!< On */
+
+/* Bit 26 : Keep retention on RAM section S10 when RAM section is off */
+#define POWER_RAM_POWER_S10RETENTION_Pos (26UL) /*!< Position of S10RETENTION field. */
+#define POWER_RAM_POWER_S10RETENTION_Msk (0x1UL << POWER_RAM_POWER_S10RETENTION_Pos) /*!< Bit mask of S10RETENTION field. */
+#define POWER_RAM_POWER_S10RETENTION_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S10RETENTION_On (1UL) /*!< On */
+
+/* Bit 25 : Keep retention on RAM section S9 when RAM section is off */
+#define POWER_RAM_POWER_S9RETENTION_Pos (25UL) /*!< Position of S9RETENTION field. */
+#define POWER_RAM_POWER_S9RETENTION_Msk (0x1UL << POWER_RAM_POWER_S9RETENTION_Pos) /*!< Bit mask of S9RETENTION field. */
+#define POWER_RAM_POWER_S9RETENTION_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S9RETENTION_On (1UL) /*!< On */
+
+/* Bit 24 : Keep retention on RAM section S8 when RAM section is off */
+#define POWER_RAM_POWER_S8RETENTION_Pos (24UL) /*!< Position of S8RETENTION field. */
+#define POWER_RAM_POWER_S8RETENTION_Msk (0x1UL << POWER_RAM_POWER_S8RETENTION_Pos) /*!< Bit mask of S8RETENTION field. */
+#define POWER_RAM_POWER_S8RETENTION_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S8RETENTION_On (1UL) /*!< On */
+
+/* Bit 23 : Keep retention on RAM section S7 when RAM section is off */
+#define POWER_RAM_POWER_S7RETENTION_Pos (23UL) /*!< Position of S7RETENTION field. */
+#define POWER_RAM_POWER_S7RETENTION_Msk (0x1UL << POWER_RAM_POWER_S7RETENTION_Pos) /*!< Bit mask of S7RETENTION field. */
+#define POWER_RAM_POWER_S7RETENTION_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S7RETENTION_On (1UL) /*!< On */
+
+/* Bit 22 : Keep retention on RAM section S6 when RAM section is off */
+#define POWER_RAM_POWER_S6RETENTION_Pos (22UL) /*!< Position of S6RETENTION field. */
+#define POWER_RAM_POWER_S6RETENTION_Msk (0x1UL << POWER_RAM_POWER_S6RETENTION_Pos) /*!< Bit mask of S6RETENTION field. */
+#define POWER_RAM_POWER_S6RETENTION_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S6RETENTION_On (1UL) /*!< On */
+
+/* Bit 21 : Keep retention on RAM section S5 when RAM section is off */
+#define POWER_RAM_POWER_S5RETENTION_Pos (21UL) /*!< Position of S5RETENTION field. */
+#define POWER_RAM_POWER_S5RETENTION_Msk (0x1UL << POWER_RAM_POWER_S5RETENTION_Pos) /*!< Bit mask of S5RETENTION field. */
+#define POWER_RAM_POWER_S5RETENTION_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S5RETENTION_On (1UL) /*!< On */
+
+/* Bit 20 : Keep retention on RAM section S4 when RAM section is off */
+#define POWER_RAM_POWER_S4RETENTION_Pos (20UL) /*!< Position of S4RETENTION field. */
+#define POWER_RAM_POWER_S4RETENTION_Msk (0x1UL << POWER_RAM_POWER_S4RETENTION_Pos) /*!< Bit mask of S4RETENTION field. */
+#define POWER_RAM_POWER_S4RETENTION_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S4RETENTION_On (1UL) /*!< On */
+
+/* Bit 19 : Keep retention on RAM section S3 when RAM section is off */
+#define POWER_RAM_POWER_S3RETENTION_Pos (19UL) /*!< Position of S3RETENTION field. */
+#define POWER_RAM_POWER_S3RETENTION_Msk (0x1UL << POWER_RAM_POWER_S3RETENTION_Pos) /*!< Bit mask of S3RETENTION field. */
+#define POWER_RAM_POWER_S3RETENTION_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S3RETENTION_On (1UL) /*!< On */
+
+/* Bit 18 : Keep retention on RAM section S2 when RAM section is off */
+#define POWER_RAM_POWER_S2RETENTION_Pos (18UL) /*!< Position of S2RETENTION field. */
+#define POWER_RAM_POWER_S2RETENTION_Msk (0x1UL << POWER_RAM_POWER_S2RETENTION_Pos) /*!< Bit mask of S2RETENTION field. */
+#define POWER_RAM_POWER_S2RETENTION_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S2RETENTION_On (1UL) /*!< On */
+
+/* Bit 17 : Keep retention on RAM section S1 when RAM section is off */
+#define POWER_RAM_POWER_S1RETENTION_Pos (17UL) /*!< Position of S1RETENTION field. */
+#define POWER_RAM_POWER_S1RETENTION_Msk (0x1UL << POWER_RAM_POWER_S1RETENTION_Pos) /*!< Bit mask of S1RETENTION field. */
+#define POWER_RAM_POWER_S1RETENTION_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S1RETENTION_On (1UL) /*!< On */
+
+/* Bit 16 : Keep retention on RAM section S0 when RAM section is off */
+#define POWER_RAM_POWER_S0RETENTION_Pos (16UL) /*!< Position of S0RETENTION field. */
+#define POWER_RAM_POWER_S0RETENTION_Msk (0x1UL << POWER_RAM_POWER_S0RETENTION_Pos) /*!< Bit mask of S0RETENTION field. */
+#define POWER_RAM_POWER_S0RETENTION_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S0RETENTION_On (1UL) /*!< On */
+
+/* Bit 15 : Keep RAM section S15 on or off in System ON mode. */
+#define POWER_RAM_POWER_S15POWER_Pos (15UL) /*!< Position of S15POWER field. */
+#define POWER_RAM_POWER_S15POWER_Msk (0x1UL << POWER_RAM_POWER_S15POWER_Pos) /*!< Bit mask of S15POWER field. */
+#define POWER_RAM_POWER_S15POWER_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S15POWER_On (1UL) /*!< On */
+
+/* Bit 14 : Keep RAM section S14 on or off in System ON mode. */
+#define POWER_RAM_POWER_S14POWER_Pos (14UL) /*!< Position of S14POWER field. */
+#define POWER_RAM_POWER_S14POWER_Msk (0x1UL << POWER_RAM_POWER_S14POWER_Pos) /*!< Bit mask of S14POWER field. */
+#define POWER_RAM_POWER_S14POWER_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S14POWER_On (1UL) /*!< On */
+
+/* Bit 13 : Keep RAM section S13 on or off in System ON mode. */
+#define POWER_RAM_POWER_S13POWER_Pos (13UL) /*!< Position of S13POWER field. */
+#define POWER_RAM_POWER_S13POWER_Msk (0x1UL << POWER_RAM_POWER_S13POWER_Pos) /*!< Bit mask of S13POWER field. */
+#define POWER_RAM_POWER_S13POWER_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S13POWER_On (1UL) /*!< On */
+
+/* Bit 12 : Keep RAM section S12 on or off in System ON mode. */
+#define POWER_RAM_POWER_S12POWER_Pos (12UL) /*!< Position of S12POWER field. */
+#define POWER_RAM_POWER_S12POWER_Msk (0x1UL << POWER_RAM_POWER_S12POWER_Pos) /*!< Bit mask of S12POWER field. */
+#define POWER_RAM_POWER_S12POWER_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S12POWER_On (1UL) /*!< On */
+
+/* Bit 11 : Keep RAM section S11 on or off in System ON mode. */
+#define POWER_RAM_POWER_S11POWER_Pos (11UL) /*!< Position of S11POWER field. */
+#define POWER_RAM_POWER_S11POWER_Msk (0x1UL << POWER_RAM_POWER_S11POWER_Pos) /*!< Bit mask of S11POWER field. */
+#define POWER_RAM_POWER_S11POWER_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S11POWER_On (1UL) /*!< On */
+
+/* Bit 10 : Keep RAM section S10 on or off in System ON mode. */
+#define POWER_RAM_POWER_S10POWER_Pos (10UL) /*!< Position of S10POWER field. */
+#define POWER_RAM_POWER_S10POWER_Msk (0x1UL << POWER_RAM_POWER_S10POWER_Pos) /*!< Bit mask of S10POWER field. */
+#define POWER_RAM_POWER_S10POWER_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S10POWER_On (1UL) /*!< On */
+
+/* Bit 9 : Keep RAM section S9 on or off in System ON mode. */
+#define POWER_RAM_POWER_S9POWER_Pos (9UL) /*!< Position of S9POWER field. */
+#define POWER_RAM_POWER_S9POWER_Msk (0x1UL << POWER_RAM_POWER_S9POWER_Pos) /*!< Bit mask of S9POWER field. */
+#define POWER_RAM_POWER_S9POWER_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S9POWER_On (1UL) /*!< On */
+
+/* Bit 8 : Keep RAM section S8 on or off in System ON mode. */
+#define POWER_RAM_POWER_S8POWER_Pos (8UL) /*!< Position of S8POWER field. */
+#define POWER_RAM_POWER_S8POWER_Msk (0x1UL << POWER_RAM_POWER_S8POWER_Pos) /*!< Bit mask of S8POWER field. */
+#define POWER_RAM_POWER_S8POWER_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S8POWER_On (1UL) /*!< On */
+
+/* Bit 7 : Keep RAM section S7 on or off in System ON mode. */
+#define POWER_RAM_POWER_S7POWER_Pos (7UL) /*!< Position of S7POWER field. */
+#define POWER_RAM_POWER_S7POWER_Msk (0x1UL << POWER_RAM_POWER_S7POWER_Pos) /*!< Bit mask of S7POWER field. */
+#define POWER_RAM_POWER_S7POWER_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S7POWER_On (1UL) /*!< On */
+
+/* Bit 6 : Keep RAM section S6 on or off in System ON mode. */
+#define POWER_RAM_POWER_S6POWER_Pos (6UL) /*!< Position of S6POWER field. */
+#define POWER_RAM_POWER_S6POWER_Msk (0x1UL << POWER_RAM_POWER_S6POWER_Pos) /*!< Bit mask of S6POWER field. */
+#define POWER_RAM_POWER_S6POWER_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S6POWER_On (1UL) /*!< On */
+
+/* Bit 5 : Keep RAM section S5 on or off in System ON mode. */
+#define POWER_RAM_POWER_S5POWER_Pos (5UL) /*!< Position of S5POWER field. */
+#define POWER_RAM_POWER_S5POWER_Msk (0x1UL << POWER_RAM_POWER_S5POWER_Pos) /*!< Bit mask of S5POWER field. */
+#define POWER_RAM_POWER_S5POWER_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S5POWER_On (1UL) /*!< On */
+
+/* Bit 4 : Keep RAM section S4 on or off in System ON mode. */
+#define POWER_RAM_POWER_S4POWER_Pos (4UL) /*!< Position of S4POWER field. */
+#define POWER_RAM_POWER_S4POWER_Msk (0x1UL << POWER_RAM_POWER_S4POWER_Pos) /*!< Bit mask of S4POWER field. */
+#define POWER_RAM_POWER_S4POWER_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S4POWER_On (1UL) /*!< On */
+
+/* Bit 3 : Keep RAM section S3 on or off in System ON mode. */
+#define POWER_RAM_POWER_S3POWER_Pos (3UL) /*!< Position of S3POWER field. */
+#define POWER_RAM_POWER_S3POWER_Msk (0x1UL << POWER_RAM_POWER_S3POWER_Pos) /*!< Bit mask of S3POWER field. */
+#define POWER_RAM_POWER_S3POWER_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S3POWER_On (1UL) /*!< On */
+
+/* Bit 2 : Keep RAM section S2 on or off in System ON mode. */
+#define POWER_RAM_POWER_S2POWER_Pos (2UL) /*!< Position of S2POWER field. */
+#define POWER_RAM_POWER_S2POWER_Msk (0x1UL << POWER_RAM_POWER_S2POWER_Pos) /*!< Bit mask of S2POWER field. */
+#define POWER_RAM_POWER_S2POWER_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S2POWER_On (1UL) /*!< On */
+
+/* Bit 1 : Keep RAM section S1 on or off in System ON mode. */
+#define POWER_RAM_POWER_S1POWER_Pos (1UL) /*!< Position of S1POWER field. */
+#define POWER_RAM_POWER_S1POWER_Msk (0x1UL << POWER_RAM_POWER_S1POWER_Pos) /*!< Bit mask of S1POWER field. */
+#define POWER_RAM_POWER_S1POWER_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S1POWER_On (1UL) /*!< On */
+
+/* Bit 0 : Keep RAM section S0 on or off in System ON mode. */
+#define POWER_RAM_POWER_S0POWER_Pos (0UL) /*!< Position of S0POWER field. */
+#define POWER_RAM_POWER_S0POWER_Msk (0x1UL << POWER_RAM_POWER_S0POWER_Pos) /*!< Bit mask of S0POWER field. */
+#define POWER_RAM_POWER_S0POWER_Off (0UL) /*!< Off */
+#define POWER_RAM_POWER_S0POWER_On (1UL) /*!< On */
+
+/* Register: POWER_RAM_POWERSET */
+/* Description: Description cluster: RAMn power control set register */
+
+/* Bit 31 : Keep retention on RAM section S15 when RAM section is switched off */
+#define POWER_RAM_POWERSET_S15RETENTION_Pos (31UL) /*!< Position of S15RETENTION field. */
+#define POWER_RAM_POWERSET_S15RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S15RETENTION_Pos) /*!< Bit mask of S15RETENTION field. */
+#define POWER_RAM_POWERSET_S15RETENTION_On (1UL) /*!< On */
+
+/* Bit 30 : Keep retention on RAM section S14 when RAM section is switched off */
+#define POWER_RAM_POWERSET_S14RETENTION_Pos (30UL) /*!< Position of S14RETENTION field. */
+#define POWER_RAM_POWERSET_S14RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S14RETENTION_Pos) /*!< Bit mask of S14RETENTION field. */
+#define POWER_RAM_POWERSET_S14RETENTION_On (1UL) /*!< On */
+
+/* Bit 29 : Keep retention on RAM section S13 when RAM section is switched off */
+#define POWER_RAM_POWERSET_S13RETENTION_Pos (29UL) /*!< Position of S13RETENTION field. */
+#define POWER_RAM_POWERSET_S13RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S13RETENTION_Pos) /*!< Bit mask of S13RETENTION field. */
+#define POWER_RAM_POWERSET_S13RETENTION_On (1UL) /*!< On */
+
+/* Bit 28 : Keep retention on RAM section S12 when RAM section is switched off */
+#define POWER_RAM_POWERSET_S12RETENTION_Pos (28UL) /*!< Position of S12RETENTION field. */
+#define POWER_RAM_POWERSET_S12RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S12RETENTION_Pos) /*!< Bit mask of S12RETENTION field. */
+#define POWER_RAM_POWERSET_S12RETENTION_On (1UL) /*!< On */
+
+/* Bit 27 : Keep retention on RAM section S11 when RAM section is switched off */
+#define POWER_RAM_POWERSET_S11RETENTION_Pos (27UL) /*!< Position of S11RETENTION field. */
+#define POWER_RAM_POWERSET_S11RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S11RETENTION_Pos) /*!< Bit mask of S11RETENTION field. */
+#define POWER_RAM_POWERSET_S11RETENTION_On (1UL) /*!< On */
+
+/* Bit 26 : Keep retention on RAM section S10 when RAM section is switched off */
+#define POWER_RAM_POWERSET_S10RETENTION_Pos (26UL) /*!< Position of S10RETENTION field. */
+#define POWER_RAM_POWERSET_S10RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S10RETENTION_Pos) /*!< Bit mask of S10RETENTION field. */
+#define POWER_RAM_POWERSET_S10RETENTION_On (1UL) /*!< On */
+
+/* Bit 25 : Keep retention on RAM section S9 when RAM section is switched off */
+#define POWER_RAM_POWERSET_S9RETENTION_Pos (25UL) /*!< Position of S9RETENTION field. */
+#define POWER_RAM_POWERSET_S9RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S9RETENTION_Pos) /*!< Bit mask of S9RETENTION field. */
+#define POWER_RAM_POWERSET_S9RETENTION_On (1UL) /*!< On */
+
+/* Bit 24 : Keep retention on RAM section S8 when RAM section is switched off */
+#define POWER_RAM_POWERSET_S8RETENTION_Pos (24UL) /*!< Position of S8RETENTION field. */
+#define POWER_RAM_POWERSET_S8RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S8RETENTION_Pos) /*!< Bit mask of S8RETENTION field. */
+#define POWER_RAM_POWERSET_S8RETENTION_On (1UL) /*!< On */
+
+/* Bit 23 : Keep retention on RAM section S7 when RAM section is switched off */
+#define POWER_RAM_POWERSET_S7RETENTION_Pos (23UL) /*!< Position of S7RETENTION field. */
+#define POWER_RAM_POWERSET_S7RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S7RETENTION_Pos) /*!< Bit mask of S7RETENTION field. */
+#define POWER_RAM_POWERSET_S7RETENTION_On (1UL) /*!< On */
+
+/* Bit 22 : Keep retention on RAM section S6 when RAM section is switched off */
+#define POWER_RAM_POWERSET_S6RETENTION_Pos (22UL) /*!< Position of S6RETENTION field. */
+#define POWER_RAM_POWERSET_S6RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S6RETENTION_Pos) /*!< Bit mask of S6RETENTION field. */
+#define POWER_RAM_POWERSET_S6RETENTION_On (1UL) /*!< On */
+
+/* Bit 21 : Keep retention on RAM section S5 when RAM section is switched off */
+#define POWER_RAM_POWERSET_S5RETENTION_Pos (21UL) /*!< Position of S5RETENTION field. */
+#define POWER_RAM_POWERSET_S5RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S5RETENTION_Pos) /*!< Bit mask of S5RETENTION field. */
+#define POWER_RAM_POWERSET_S5RETENTION_On (1UL) /*!< On */
+
+/* Bit 20 : Keep retention on RAM section S4 when RAM section is switched off */
+#define POWER_RAM_POWERSET_S4RETENTION_Pos (20UL) /*!< Position of S4RETENTION field. */
+#define POWER_RAM_POWERSET_S4RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S4RETENTION_Pos) /*!< Bit mask of S4RETENTION field. */
+#define POWER_RAM_POWERSET_S4RETENTION_On (1UL) /*!< On */
+
+/* Bit 19 : Keep retention on RAM section S3 when RAM section is switched off */
+#define POWER_RAM_POWERSET_S3RETENTION_Pos (19UL) /*!< Position of S3RETENTION field. */
+#define POWER_RAM_POWERSET_S3RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S3RETENTION_Pos) /*!< Bit mask of S3RETENTION field. */
+#define POWER_RAM_POWERSET_S3RETENTION_On (1UL) /*!< On */
+
+/* Bit 18 : Keep retention on RAM section S2 when RAM section is switched off */
+#define POWER_RAM_POWERSET_S2RETENTION_Pos (18UL) /*!< Position of S2RETENTION field. */
+#define POWER_RAM_POWERSET_S2RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S2RETENTION_Pos) /*!< Bit mask of S2RETENTION field. */
+#define POWER_RAM_POWERSET_S2RETENTION_On (1UL) /*!< On */
+
+/* Bit 17 : Keep retention on RAM section S1 when RAM section is switched off */
+#define POWER_RAM_POWERSET_S1RETENTION_Pos (17UL) /*!< Position of S1RETENTION field. */
+#define POWER_RAM_POWERSET_S1RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S1RETENTION_Pos) /*!< Bit mask of S1RETENTION field. */
+#define POWER_RAM_POWERSET_S1RETENTION_On (1UL) /*!< On */
+
+/* Bit 16 : Keep retention on RAM section S0 when RAM section is switched off */
+#define POWER_RAM_POWERSET_S0RETENTION_Pos (16UL) /*!< Position of S0RETENTION field. */
+#define POWER_RAM_POWERSET_S0RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S0RETENTION_Pos) /*!< Bit mask of S0RETENTION field. */
+#define POWER_RAM_POWERSET_S0RETENTION_On (1UL) /*!< On */
+
+/* Bit 15 : Keep RAM section S15 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERSET_S15POWER_Pos (15UL) /*!< Position of S15POWER field. */
+#define POWER_RAM_POWERSET_S15POWER_Msk (0x1UL << POWER_RAM_POWERSET_S15POWER_Pos) /*!< Bit mask of S15POWER field. */
+#define POWER_RAM_POWERSET_S15POWER_On (1UL) /*!< On */
+
+/* Bit 14 : Keep RAM section S14 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERSET_S14POWER_Pos (14UL) /*!< Position of S14POWER field. */
+#define POWER_RAM_POWERSET_S14POWER_Msk (0x1UL << POWER_RAM_POWERSET_S14POWER_Pos) /*!< Bit mask of S14POWER field. */
+#define POWER_RAM_POWERSET_S14POWER_On (1UL) /*!< On */
+
+/* Bit 13 : Keep RAM section S13 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERSET_S13POWER_Pos (13UL) /*!< Position of S13POWER field. */
+#define POWER_RAM_POWERSET_S13POWER_Msk (0x1UL << POWER_RAM_POWERSET_S13POWER_Pos) /*!< Bit mask of S13POWER field. */
+#define POWER_RAM_POWERSET_S13POWER_On (1UL) /*!< On */
+
+/* Bit 12 : Keep RAM section S12 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERSET_S12POWER_Pos (12UL) /*!< Position of S12POWER field. */
+#define POWER_RAM_POWERSET_S12POWER_Msk (0x1UL << POWER_RAM_POWERSET_S12POWER_Pos) /*!< Bit mask of S12POWER field. */
+#define POWER_RAM_POWERSET_S12POWER_On (1UL) /*!< On */
+
+/* Bit 11 : Keep RAM section S11 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERSET_S11POWER_Pos (11UL) /*!< Position of S11POWER field. */
+#define POWER_RAM_POWERSET_S11POWER_Msk (0x1UL << POWER_RAM_POWERSET_S11POWER_Pos) /*!< Bit mask of S11POWER field. */
+#define POWER_RAM_POWERSET_S11POWER_On (1UL) /*!< On */
+
+/* Bit 10 : Keep RAM section S10 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERSET_S10POWER_Pos (10UL) /*!< Position of S10POWER field. */
+#define POWER_RAM_POWERSET_S10POWER_Msk (0x1UL << POWER_RAM_POWERSET_S10POWER_Pos) /*!< Bit mask of S10POWER field. */
+#define POWER_RAM_POWERSET_S10POWER_On (1UL) /*!< On */
+
+/* Bit 9 : Keep RAM section S9 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERSET_S9POWER_Pos (9UL) /*!< Position of S9POWER field. */
+#define POWER_RAM_POWERSET_S9POWER_Msk (0x1UL << POWER_RAM_POWERSET_S9POWER_Pos) /*!< Bit mask of S9POWER field. */
+#define POWER_RAM_POWERSET_S9POWER_On (1UL) /*!< On */
+
+/* Bit 8 : Keep RAM section S8 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERSET_S8POWER_Pos (8UL) /*!< Position of S8POWER field. */
+#define POWER_RAM_POWERSET_S8POWER_Msk (0x1UL << POWER_RAM_POWERSET_S8POWER_Pos) /*!< Bit mask of S8POWER field. */
+#define POWER_RAM_POWERSET_S8POWER_On (1UL) /*!< On */
+
+/* Bit 7 : Keep RAM section S7 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERSET_S7POWER_Pos (7UL) /*!< Position of S7POWER field. */
+#define POWER_RAM_POWERSET_S7POWER_Msk (0x1UL << POWER_RAM_POWERSET_S7POWER_Pos) /*!< Bit mask of S7POWER field. */
+#define POWER_RAM_POWERSET_S7POWER_On (1UL) /*!< On */
+
+/* Bit 6 : Keep RAM section S6 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERSET_S6POWER_Pos (6UL) /*!< Position of S6POWER field. */
+#define POWER_RAM_POWERSET_S6POWER_Msk (0x1UL << POWER_RAM_POWERSET_S6POWER_Pos) /*!< Bit mask of S6POWER field. */
+#define POWER_RAM_POWERSET_S6POWER_On (1UL) /*!< On */
+
+/* Bit 5 : Keep RAM section S5 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERSET_S5POWER_Pos (5UL) /*!< Position of S5POWER field. */
+#define POWER_RAM_POWERSET_S5POWER_Msk (0x1UL << POWER_RAM_POWERSET_S5POWER_Pos) /*!< Bit mask of S5POWER field. */
+#define POWER_RAM_POWERSET_S5POWER_On (1UL) /*!< On */
+
+/* Bit 4 : Keep RAM section S4 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERSET_S4POWER_Pos (4UL) /*!< Position of S4POWER field. */
+#define POWER_RAM_POWERSET_S4POWER_Msk (0x1UL << POWER_RAM_POWERSET_S4POWER_Pos) /*!< Bit mask of S4POWER field. */
+#define POWER_RAM_POWERSET_S4POWER_On (1UL) /*!< On */
+
+/* Bit 3 : Keep RAM section S3 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERSET_S3POWER_Pos (3UL) /*!< Position of S3POWER field. */
+#define POWER_RAM_POWERSET_S3POWER_Msk (0x1UL << POWER_RAM_POWERSET_S3POWER_Pos) /*!< Bit mask of S3POWER field. */
+#define POWER_RAM_POWERSET_S3POWER_On (1UL) /*!< On */
+
+/* Bit 2 : Keep RAM section S2 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERSET_S2POWER_Pos (2UL) /*!< Position of S2POWER field. */
+#define POWER_RAM_POWERSET_S2POWER_Msk (0x1UL << POWER_RAM_POWERSET_S2POWER_Pos) /*!< Bit mask of S2POWER field. */
+#define POWER_RAM_POWERSET_S2POWER_On (1UL) /*!< On */
+
+/* Bit 1 : Keep RAM section S1 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERSET_S1POWER_Pos (1UL) /*!< Position of S1POWER field. */
+#define POWER_RAM_POWERSET_S1POWER_Msk (0x1UL << POWER_RAM_POWERSET_S1POWER_Pos) /*!< Bit mask of S1POWER field. */
+#define POWER_RAM_POWERSET_S1POWER_On (1UL) /*!< On */
+
+/* Bit 0 : Keep RAM section S0 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERSET_S0POWER_Pos (0UL) /*!< Position of S0POWER field. */
+#define POWER_RAM_POWERSET_S0POWER_Msk (0x1UL << POWER_RAM_POWERSET_S0POWER_Pos) /*!< Bit mask of S0POWER field. */
+#define POWER_RAM_POWERSET_S0POWER_On (1UL) /*!< On */
+
+/* Register: POWER_RAM_POWERCLR */
+/* Description: Description cluster: RAMn power control clear register */
+
+/* Bit 31 : Keep retention on RAM section S15 when RAM section is switched off */
+#define POWER_RAM_POWERCLR_S15RETENTION_Pos (31UL) /*!< Position of S15RETENTION field. */
+#define POWER_RAM_POWERCLR_S15RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S15RETENTION_Pos) /*!< Bit mask of S15RETENTION field. */
+#define POWER_RAM_POWERCLR_S15RETENTION_Off (1UL) /*!< Off */
+
+/* Bit 30 : Keep retention on RAM section S14 when RAM section is switched off */
+#define POWER_RAM_POWERCLR_S14RETENTION_Pos (30UL) /*!< Position of S14RETENTION field. */
+#define POWER_RAM_POWERCLR_S14RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S14RETENTION_Pos) /*!< Bit mask of S14RETENTION field. */
+#define POWER_RAM_POWERCLR_S14RETENTION_Off (1UL) /*!< Off */
+
+/* Bit 29 : Keep retention on RAM section S13 when RAM section is switched off */
+#define POWER_RAM_POWERCLR_S13RETENTION_Pos (29UL) /*!< Position of S13RETENTION field. */
+#define POWER_RAM_POWERCLR_S13RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S13RETENTION_Pos) /*!< Bit mask of S13RETENTION field. */
+#define POWER_RAM_POWERCLR_S13RETENTION_Off (1UL) /*!< Off */
+
+/* Bit 28 : Keep retention on RAM section S12 when RAM section is switched off */
+#define POWER_RAM_POWERCLR_S12RETENTION_Pos (28UL) /*!< Position of S12RETENTION field. */
+#define POWER_RAM_POWERCLR_S12RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S12RETENTION_Pos) /*!< Bit mask of S12RETENTION field. */
+#define POWER_RAM_POWERCLR_S12RETENTION_Off (1UL) /*!< Off */
+
+/* Bit 27 : Keep retention on RAM section S11 when RAM section is switched off */
+#define POWER_RAM_POWERCLR_S11RETENTION_Pos (27UL) /*!< Position of S11RETENTION field. */
+#define POWER_RAM_POWERCLR_S11RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S11RETENTION_Pos) /*!< Bit mask of S11RETENTION field. */
+#define POWER_RAM_POWERCLR_S11RETENTION_Off (1UL) /*!< Off */
+
+/* Bit 26 : Keep retention on RAM section S10 when RAM section is switched off */
+#define POWER_RAM_POWERCLR_S10RETENTION_Pos (26UL) /*!< Position of S10RETENTION field. */
+#define POWER_RAM_POWERCLR_S10RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S10RETENTION_Pos) /*!< Bit mask of S10RETENTION field. */
+#define POWER_RAM_POWERCLR_S10RETENTION_Off (1UL) /*!< Off */
+
+/* Bit 25 : Keep retention on RAM section S9 when RAM section is switched off */
+#define POWER_RAM_POWERCLR_S9RETENTION_Pos (25UL) /*!< Position of S9RETENTION field. */
+#define POWER_RAM_POWERCLR_S9RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S9RETENTION_Pos) /*!< Bit mask of S9RETENTION field. */
+#define POWER_RAM_POWERCLR_S9RETENTION_Off (1UL) /*!< Off */
+
+/* Bit 24 : Keep retention on RAM section S8 when RAM section is switched off */
+#define POWER_RAM_POWERCLR_S8RETENTION_Pos (24UL) /*!< Position of S8RETENTION field. */
+#define POWER_RAM_POWERCLR_S8RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S8RETENTION_Pos) /*!< Bit mask of S8RETENTION field. */
+#define POWER_RAM_POWERCLR_S8RETENTION_Off (1UL) /*!< Off */
+
+/* Bit 23 : Keep retention on RAM section S7 when RAM section is switched off */
+#define POWER_RAM_POWERCLR_S7RETENTION_Pos (23UL) /*!< Position of S7RETENTION field. */
+#define POWER_RAM_POWERCLR_S7RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S7RETENTION_Pos) /*!< Bit mask of S7RETENTION field. */
+#define POWER_RAM_POWERCLR_S7RETENTION_Off (1UL) /*!< Off */
+
+/* Bit 22 : Keep retention on RAM section S6 when RAM section is switched off */
+#define POWER_RAM_POWERCLR_S6RETENTION_Pos (22UL) /*!< Position of S6RETENTION field. */
+#define POWER_RAM_POWERCLR_S6RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S6RETENTION_Pos) /*!< Bit mask of S6RETENTION field. */
+#define POWER_RAM_POWERCLR_S6RETENTION_Off (1UL) /*!< Off */
+
+/* Bit 21 : Keep retention on RAM section S5 when RAM section is switched off */
+#define POWER_RAM_POWERCLR_S5RETENTION_Pos (21UL) /*!< Position of S5RETENTION field. */
+#define POWER_RAM_POWERCLR_S5RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S5RETENTION_Pos) /*!< Bit mask of S5RETENTION field. */
+#define POWER_RAM_POWERCLR_S5RETENTION_Off (1UL) /*!< Off */
+
+/* Bit 20 : Keep retention on RAM section S4 when RAM section is switched off */
+#define POWER_RAM_POWERCLR_S4RETENTION_Pos (20UL) /*!< Position of S4RETENTION field. */
+#define POWER_RAM_POWERCLR_S4RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S4RETENTION_Pos) /*!< Bit mask of S4RETENTION field. */
+#define POWER_RAM_POWERCLR_S4RETENTION_Off (1UL) /*!< Off */
+
+/* Bit 19 : Keep retention on RAM section S3 when RAM section is switched off */
+#define POWER_RAM_POWERCLR_S3RETENTION_Pos (19UL) /*!< Position of S3RETENTION field. */
+#define POWER_RAM_POWERCLR_S3RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S3RETENTION_Pos) /*!< Bit mask of S3RETENTION field. */
+#define POWER_RAM_POWERCLR_S3RETENTION_Off (1UL) /*!< Off */
+
+/* Bit 18 : Keep retention on RAM section S2 when RAM section is switched off */
+#define POWER_RAM_POWERCLR_S2RETENTION_Pos (18UL) /*!< Position of S2RETENTION field. */
+#define POWER_RAM_POWERCLR_S2RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S2RETENTION_Pos) /*!< Bit mask of S2RETENTION field. */
+#define POWER_RAM_POWERCLR_S2RETENTION_Off (1UL) /*!< Off */
+
+/* Bit 17 : Keep retention on RAM section S1 when RAM section is switched off */
+#define POWER_RAM_POWERCLR_S1RETENTION_Pos (17UL) /*!< Position of S1RETENTION field. */
+#define POWER_RAM_POWERCLR_S1RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S1RETENTION_Pos) /*!< Bit mask of S1RETENTION field. */
+#define POWER_RAM_POWERCLR_S1RETENTION_Off (1UL) /*!< Off */
+
+/* Bit 16 : Keep retention on RAM section S0 when RAM section is switched off */
+#define POWER_RAM_POWERCLR_S0RETENTION_Pos (16UL) /*!< Position of S0RETENTION field. */
+#define POWER_RAM_POWERCLR_S0RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S0RETENTION_Pos) /*!< Bit mask of S0RETENTION field. */
+#define POWER_RAM_POWERCLR_S0RETENTION_Off (1UL) /*!< Off */
+
+/* Bit 15 : Keep RAM section S15 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERCLR_S15POWER_Pos (15UL) /*!< Position of S15POWER field. */
+#define POWER_RAM_POWERCLR_S15POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S15POWER_Pos) /*!< Bit mask of S15POWER field. */
+#define POWER_RAM_POWERCLR_S15POWER_Off (1UL) /*!< Off */
+
+/* Bit 14 : Keep RAM section S14 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERCLR_S14POWER_Pos (14UL) /*!< Position of S14POWER field. */
+#define POWER_RAM_POWERCLR_S14POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S14POWER_Pos) /*!< Bit mask of S14POWER field. */
+#define POWER_RAM_POWERCLR_S14POWER_Off (1UL) /*!< Off */
+
+/* Bit 13 : Keep RAM section S13 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERCLR_S13POWER_Pos (13UL) /*!< Position of S13POWER field. */
+#define POWER_RAM_POWERCLR_S13POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S13POWER_Pos) /*!< Bit mask of S13POWER field. */
+#define POWER_RAM_POWERCLR_S13POWER_Off (1UL) /*!< Off */
+
+/* Bit 12 : Keep RAM section S12 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERCLR_S12POWER_Pos (12UL) /*!< Position of S12POWER field. */
+#define POWER_RAM_POWERCLR_S12POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S12POWER_Pos) /*!< Bit mask of S12POWER field. */
+#define POWER_RAM_POWERCLR_S12POWER_Off (1UL) /*!< Off */
+
+/* Bit 11 : Keep RAM section S11 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERCLR_S11POWER_Pos (11UL) /*!< Position of S11POWER field. */
+#define POWER_RAM_POWERCLR_S11POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S11POWER_Pos) /*!< Bit mask of S11POWER field. */
+#define POWER_RAM_POWERCLR_S11POWER_Off (1UL) /*!< Off */
+
+/* Bit 10 : Keep RAM section S10 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERCLR_S10POWER_Pos (10UL) /*!< Position of S10POWER field. */
+#define POWER_RAM_POWERCLR_S10POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S10POWER_Pos) /*!< Bit mask of S10POWER field. */
+#define POWER_RAM_POWERCLR_S10POWER_Off (1UL) /*!< Off */
+
+/* Bit 9 : Keep RAM section S9 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERCLR_S9POWER_Pos (9UL) /*!< Position of S9POWER field. */
+#define POWER_RAM_POWERCLR_S9POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S9POWER_Pos) /*!< Bit mask of S9POWER field. */
+#define POWER_RAM_POWERCLR_S9POWER_Off (1UL) /*!< Off */
+
+/* Bit 8 : Keep RAM section S8 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERCLR_S8POWER_Pos (8UL) /*!< Position of S8POWER field. */
+#define POWER_RAM_POWERCLR_S8POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S8POWER_Pos) /*!< Bit mask of S8POWER field. */
+#define POWER_RAM_POWERCLR_S8POWER_Off (1UL) /*!< Off */
+
+/* Bit 7 : Keep RAM section S7 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERCLR_S7POWER_Pos (7UL) /*!< Position of S7POWER field. */
+#define POWER_RAM_POWERCLR_S7POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S7POWER_Pos) /*!< Bit mask of S7POWER field. */
+#define POWER_RAM_POWERCLR_S7POWER_Off (1UL) /*!< Off */
+
+/* Bit 6 : Keep RAM section S6 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERCLR_S6POWER_Pos (6UL) /*!< Position of S6POWER field. */
+#define POWER_RAM_POWERCLR_S6POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S6POWER_Pos) /*!< Bit mask of S6POWER field. */
+#define POWER_RAM_POWERCLR_S6POWER_Off (1UL) /*!< Off */
+
+/* Bit 5 : Keep RAM section S5 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERCLR_S5POWER_Pos (5UL) /*!< Position of S5POWER field. */
+#define POWER_RAM_POWERCLR_S5POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S5POWER_Pos) /*!< Bit mask of S5POWER field. */
+#define POWER_RAM_POWERCLR_S5POWER_Off (1UL) /*!< Off */
+
+/* Bit 4 : Keep RAM section S4 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERCLR_S4POWER_Pos (4UL) /*!< Position of S4POWER field. */
+#define POWER_RAM_POWERCLR_S4POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S4POWER_Pos) /*!< Bit mask of S4POWER field. */
+#define POWER_RAM_POWERCLR_S4POWER_Off (1UL) /*!< Off */
+
+/* Bit 3 : Keep RAM section S3 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERCLR_S3POWER_Pos (3UL) /*!< Position of S3POWER field. */
+#define POWER_RAM_POWERCLR_S3POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S3POWER_Pos) /*!< Bit mask of S3POWER field. */
+#define POWER_RAM_POWERCLR_S3POWER_Off (1UL) /*!< Off */
+
+/* Bit 2 : Keep RAM section S2 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERCLR_S2POWER_Pos (2UL) /*!< Position of S2POWER field. */
+#define POWER_RAM_POWERCLR_S2POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S2POWER_Pos) /*!< Bit mask of S2POWER field. */
+#define POWER_RAM_POWERCLR_S2POWER_Off (1UL) /*!< Off */
+
+/* Bit 1 : Keep RAM section S1 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERCLR_S1POWER_Pos (1UL) /*!< Position of S1POWER field. */
+#define POWER_RAM_POWERCLR_S1POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S1POWER_Pos) /*!< Bit mask of S1POWER field. */
+#define POWER_RAM_POWERCLR_S1POWER_Off (1UL) /*!< Off */
+
+/* Bit 0 : Keep RAM section S0 of RAMn on or off in System ON mode */
+#define POWER_RAM_POWERCLR_S0POWER_Pos (0UL) /*!< Position of S0POWER field. */
+#define POWER_RAM_POWERCLR_S0POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S0POWER_Pos) /*!< Bit mask of S0POWER field. */
+#define POWER_RAM_POWERCLR_S0POWER_Off (1UL) /*!< Off */
+
+
+/* Peripheral: PPI */
+/* Description: Programmable Peripheral Interconnect */
+
+/* Register: PPI_TASKS_CHG_EN */
+/* Description: Description cluster: Enable channel group n */
+
+/* Bit 0 : Enable channel group n */
+#define PPI_TASKS_CHG_EN_EN_Pos (0UL) /*!< Position of EN field. */
+#define PPI_TASKS_CHG_EN_EN_Msk (0x1UL << PPI_TASKS_CHG_EN_EN_Pos) /*!< Bit mask of EN field. */
+#define PPI_TASKS_CHG_EN_EN_Trigger (1UL) /*!< Trigger task */
+
+/* Register: PPI_TASKS_CHG_DIS */
+/* Description: Description cluster: Disable channel group n */
+
+/* Bit 0 : Disable channel group n */
+#define PPI_TASKS_CHG_DIS_DIS_Pos (0UL) /*!< Position of DIS field. */
+#define PPI_TASKS_CHG_DIS_DIS_Msk (0x1UL << PPI_TASKS_CHG_DIS_DIS_Pos) /*!< Bit mask of DIS field. */
+#define PPI_TASKS_CHG_DIS_DIS_Trigger (1UL) /*!< Trigger task */
+
+/* Register: PPI_CHEN */
+/* Description: Channel enable register */
+
+/* Bit 31 : Enable or disable channel 31 */
+#define PPI_CHEN_CH31_Pos (31UL) /*!< Position of CH31 field. */
+#define PPI_CHEN_CH31_Msk (0x1UL << PPI_CHEN_CH31_Pos) /*!< Bit mask of CH31 field. */
+#define PPI_CHEN_CH31_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH31_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 30 : Enable or disable channel 30 */
+#define PPI_CHEN_CH30_Pos (30UL) /*!< Position of CH30 field. */
+#define PPI_CHEN_CH30_Msk (0x1UL << PPI_CHEN_CH30_Pos) /*!< Bit mask of CH30 field. */
+#define PPI_CHEN_CH30_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH30_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 29 : Enable or disable channel 29 */
+#define PPI_CHEN_CH29_Pos (29UL) /*!< Position of CH29 field. */
+#define PPI_CHEN_CH29_Msk (0x1UL << PPI_CHEN_CH29_Pos) /*!< Bit mask of CH29 field. */
+#define PPI_CHEN_CH29_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH29_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 28 : Enable or disable channel 28 */
+#define PPI_CHEN_CH28_Pos (28UL) /*!< Position of CH28 field. */
+#define PPI_CHEN_CH28_Msk (0x1UL << PPI_CHEN_CH28_Pos) /*!< Bit mask of CH28 field. */
+#define PPI_CHEN_CH28_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH28_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 27 : Enable or disable channel 27 */
+#define PPI_CHEN_CH27_Pos (27UL) /*!< Position of CH27 field. */
+#define PPI_CHEN_CH27_Msk (0x1UL << PPI_CHEN_CH27_Pos) /*!< Bit mask of CH27 field. */
+#define PPI_CHEN_CH27_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH27_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 26 : Enable or disable channel 26 */
+#define PPI_CHEN_CH26_Pos (26UL) /*!< Position of CH26 field. */
+#define PPI_CHEN_CH26_Msk (0x1UL << PPI_CHEN_CH26_Pos) /*!< Bit mask of CH26 field. */
+#define PPI_CHEN_CH26_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH26_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 25 : Enable or disable channel 25 */
+#define PPI_CHEN_CH25_Pos (25UL) /*!< Position of CH25 field. */
+#define PPI_CHEN_CH25_Msk (0x1UL << PPI_CHEN_CH25_Pos) /*!< Bit mask of CH25 field. */
+#define PPI_CHEN_CH25_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH25_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 24 : Enable or disable channel 24 */
+#define PPI_CHEN_CH24_Pos (24UL) /*!< Position of CH24 field. */
+#define PPI_CHEN_CH24_Msk (0x1UL << PPI_CHEN_CH24_Pos) /*!< Bit mask of CH24 field. */
+#define PPI_CHEN_CH24_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH24_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 23 : Enable or disable channel 23 */
+#define PPI_CHEN_CH23_Pos (23UL) /*!< Position of CH23 field. */
+#define PPI_CHEN_CH23_Msk (0x1UL << PPI_CHEN_CH23_Pos) /*!< Bit mask of CH23 field. */
+#define PPI_CHEN_CH23_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH23_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 22 : Enable or disable channel 22 */
+#define PPI_CHEN_CH22_Pos (22UL) /*!< Position of CH22 field. */
+#define PPI_CHEN_CH22_Msk (0x1UL << PPI_CHEN_CH22_Pos) /*!< Bit mask of CH22 field. */
+#define PPI_CHEN_CH22_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH22_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 21 : Enable or disable channel 21 */
+#define PPI_CHEN_CH21_Pos (21UL) /*!< Position of CH21 field. */
+#define PPI_CHEN_CH21_Msk (0x1UL << PPI_CHEN_CH21_Pos) /*!< Bit mask of CH21 field. */
+#define PPI_CHEN_CH21_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH21_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 20 : Enable or disable channel 20 */
+#define PPI_CHEN_CH20_Pos (20UL) /*!< Position of CH20 field. */
+#define PPI_CHEN_CH20_Msk (0x1UL << PPI_CHEN_CH20_Pos) /*!< Bit mask of CH20 field. */
+#define PPI_CHEN_CH20_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH20_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 19 : Enable or disable channel 19 */
+#define PPI_CHEN_CH19_Pos (19UL) /*!< Position of CH19 field. */
+#define PPI_CHEN_CH19_Msk (0x1UL << PPI_CHEN_CH19_Pos) /*!< Bit mask of CH19 field. */
+#define PPI_CHEN_CH19_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH19_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 18 : Enable or disable channel 18 */
+#define PPI_CHEN_CH18_Pos (18UL) /*!< Position of CH18 field. */
+#define PPI_CHEN_CH18_Msk (0x1UL << PPI_CHEN_CH18_Pos) /*!< Bit mask of CH18 field. */
+#define PPI_CHEN_CH18_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH18_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 17 : Enable or disable channel 17 */
+#define PPI_CHEN_CH17_Pos (17UL) /*!< Position of CH17 field. */
+#define PPI_CHEN_CH17_Msk (0x1UL << PPI_CHEN_CH17_Pos) /*!< Bit mask of CH17 field. */
+#define PPI_CHEN_CH17_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH17_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 16 : Enable or disable channel 16 */
+#define PPI_CHEN_CH16_Pos (16UL) /*!< Position of CH16 field. */
+#define PPI_CHEN_CH16_Msk (0x1UL << PPI_CHEN_CH16_Pos) /*!< Bit mask of CH16 field. */
+#define PPI_CHEN_CH16_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH16_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 15 : Enable or disable channel 15 */
+#define PPI_CHEN_CH15_Pos (15UL) /*!< Position of CH15 field. */
+#define PPI_CHEN_CH15_Msk (0x1UL << PPI_CHEN_CH15_Pos) /*!< Bit mask of CH15 field. */
+#define PPI_CHEN_CH15_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH15_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 14 : Enable or disable channel 14 */
+#define PPI_CHEN_CH14_Pos (14UL) /*!< Position of CH14 field. */
+#define PPI_CHEN_CH14_Msk (0x1UL << PPI_CHEN_CH14_Pos) /*!< Bit mask of CH14 field. */
+#define PPI_CHEN_CH14_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH14_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 13 : Enable or disable channel 13 */
+#define PPI_CHEN_CH13_Pos (13UL) /*!< Position of CH13 field. */
+#define PPI_CHEN_CH13_Msk (0x1UL << PPI_CHEN_CH13_Pos) /*!< Bit mask of CH13 field. */
+#define PPI_CHEN_CH13_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH13_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 12 : Enable or disable channel 12 */
+#define PPI_CHEN_CH12_Pos (12UL) /*!< Position of CH12 field. */
+#define PPI_CHEN_CH12_Msk (0x1UL << PPI_CHEN_CH12_Pos) /*!< Bit mask of CH12 field. */
+#define PPI_CHEN_CH12_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH12_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 11 : Enable or disable channel 11 */
+#define PPI_CHEN_CH11_Pos (11UL) /*!< Position of CH11 field. */
+#define PPI_CHEN_CH11_Msk (0x1UL << PPI_CHEN_CH11_Pos) /*!< Bit mask of CH11 field. */
+#define PPI_CHEN_CH11_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH11_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 10 : Enable or disable channel 10 */
+#define PPI_CHEN_CH10_Pos (10UL) /*!< Position of CH10 field. */
+#define PPI_CHEN_CH10_Msk (0x1UL << PPI_CHEN_CH10_Pos) /*!< Bit mask of CH10 field. */
+#define PPI_CHEN_CH10_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH10_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 9 : Enable or disable channel 9 */
+#define PPI_CHEN_CH9_Pos (9UL) /*!< Position of CH9 field. */
+#define PPI_CHEN_CH9_Msk (0x1UL << PPI_CHEN_CH9_Pos) /*!< Bit mask of CH9 field. */
+#define PPI_CHEN_CH9_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH9_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 8 : Enable or disable channel 8 */
+#define PPI_CHEN_CH8_Pos (8UL) /*!< Position of CH8 field. */
+#define PPI_CHEN_CH8_Msk (0x1UL << PPI_CHEN_CH8_Pos) /*!< Bit mask of CH8 field. */
+#define PPI_CHEN_CH8_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH8_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 7 : Enable or disable channel 7 */
+#define PPI_CHEN_CH7_Pos (7UL) /*!< Position of CH7 field. */
+#define PPI_CHEN_CH7_Msk (0x1UL << PPI_CHEN_CH7_Pos) /*!< Bit mask of CH7 field. */
+#define PPI_CHEN_CH7_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH7_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 6 : Enable or disable channel 6 */
+#define PPI_CHEN_CH6_Pos (6UL) /*!< Position of CH6 field. */
+#define PPI_CHEN_CH6_Msk (0x1UL << PPI_CHEN_CH6_Pos) /*!< Bit mask of CH6 field. */
+#define PPI_CHEN_CH6_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH6_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 5 : Enable or disable channel 5 */
+#define PPI_CHEN_CH5_Pos (5UL) /*!< Position of CH5 field. */
+#define PPI_CHEN_CH5_Msk (0x1UL << PPI_CHEN_CH5_Pos) /*!< Bit mask of CH5 field. */
+#define PPI_CHEN_CH5_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH5_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 4 : Enable or disable channel 4 */
+#define PPI_CHEN_CH4_Pos (4UL) /*!< Position of CH4 field. */
+#define PPI_CHEN_CH4_Msk (0x1UL << PPI_CHEN_CH4_Pos) /*!< Bit mask of CH4 field. */
+#define PPI_CHEN_CH4_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH4_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 3 : Enable or disable channel 3 */
+#define PPI_CHEN_CH3_Pos (3UL) /*!< Position of CH3 field. */
+#define PPI_CHEN_CH3_Msk (0x1UL << PPI_CHEN_CH3_Pos) /*!< Bit mask of CH3 field. */
+#define PPI_CHEN_CH3_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH3_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 2 : Enable or disable channel 2 */
+#define PPI_CHEN_CH2_Pos (2UL) /*!< Position of CH2 field. */
+#define PPI_CHEN_CH2_Msk (0x1UL << PPI_CHEN_CH2_Pos) /*!< Bit mask of CH2 field. */
+#define PPI_CHEN_CH2_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH2_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 1 : Enable or disable channel 1 */
+#define PPI_CHEN_CH1_Pos (1UL) /*!< Position of CH1 field. */
+#define PPI_CHEN_CH1_Msk (0x1UL << PPI_CHEN_CH1_Pos) /*!< Bit mask of CH1 field. */
+#define PPI_CHEN_CH1_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH1_Enabled (1UL) /*!< Enable channel */
+
+/* Bit 0 : Enable or disable channel 0 */
+#define PPI_CHEN_CH0_Pos (0UL) /*!< Position of CH0 field. */
+#define PPI_CHEN_CH0_Msk (0x1UL << PPI_CHEN_CH0_Pos) /*!< Bit mask of CH0 field. */
+#define PPI_CHEN_CH0_Disabled (0UL) /*!< Disable channel */
+#define PPI_CHEN_CH0_Enabled (1UL) /*!< Enable channel */
+
+/* Register: PPI_CHENSET */
+/* Description: Channel enable set register */
+
+/* Bit 31 : Channel 31 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH31_Pos (31UL) /*!< Position of CH31 field. */
+#define PPI_CHENSET_CH31_Msk (0x1UL << PPI_CHENSET_CH31_Pos) /*!< Bit mask of CH31 field. */
+#define PPI_CHENSET_CH31_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH31_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH31_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 30 : Channel 30 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH30_Pos (30UL) /*!< Position of CH30 field. */
+#define PPI_CHENSET_CH30_Msk (0x1UL << PPI_CHENSET_CH30_Pos) /*!< Bit mask of CH30 field. */
+#define PPI_CHENSET_CH30_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH30_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH30_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 29 : Channel 29 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH29_Pos (29UL) /*!< Position of CH29 field. */
+#define PPI_CHENSET_CH29_Msk (0x1UL << PPI_CHENSET_CH29_Pos) /*!< Bit mask of CH29 field. */
+#define PPI_CHENSET_CH29_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH29_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH29_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 28 : Channel 28 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH28_Pos (28UL) /*!< Position of CH28 field. */
+#define PPI_CHENSET_CH28_Msk (0x1UL << PPI_CHENSET_CH28_Pos) /*!< Bit mask of CH28 field. */
+#define PPI_CHENSET_CH28_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH28_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH28_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 27 : Channel 27 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH27_Pos (27UL) /*!< Position of CH27 field. */
+#define PPI_CHENSET_CH27_Msk (0x1UL << PPI_CHENSET_CH27_Pos) /*!< Bit mask of CH27 field. */
+#define PPI_CHENSET_CH27_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH27_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH27_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 26 : Channel 26 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH26_Pos (26UL) /*!< Position of CH26 field. */
+#define PPI_CHENSET_CH26_Msk (0x1UL << PPI_CHENSET_CH26_Pos) /*!< Bit mask of CH26 field. */
+#define PPI_CHENSET_CH26_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH26_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH26_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 25 : Channel 25 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH25_Pos (25UL) /*!< Position of CH25 field. */
+#define PPI_CHENSET_CH25_Msk (0x1UL << PPI_CHENSET_CH25_Pos) /*!< Bit mask of CH25 field. */
+#define PPI_CHENSET_CH25_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH25_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH25_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 24 : Channel 24 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH24_Pos (24UL) /*!< Position of CH24 field. */
+#define PPI_CHENSET_CH24_Msk (0x1UL << PPI_CHENSET_CH24_Pos) /*!< Bit mask of CH24 field. */
+#define PPI_CHENSET_CH24_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH24_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH24_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 23 : Channel 23 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH23_Pos (23UL) /*!< Position of CH23 field. */
+#define PPI_CHENSET_CH23_Msk (0x1UL << PPI_CHENSET_CH23_Pos) /*!< Bit mask of CH23 field. */
+#define PPI_CHENSET_CH23_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH23_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH23_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 22 : Channel 22 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH22_Pos (22UL) /*!< Position of CH22 field. */
+#define PPI_CHENSET_CH22_Msk (0x1UL << PPI_CHENSET_CH22_Pos) /*!< Bit mask of CH22 field. */
+#define PPI_CHENSET_CH22_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH22_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH22_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 21 : Channel 21 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH21_Pos (21UL) /*!< Position of CH21 field. */
+#define PPI_CHENSET_CH21_Msk (0x1UL << PPI_CHENSET_CH21_Pos) /*!< Bit mask of CH21 field. */
+#define PPI_CHENSET_CH21_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH21_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH21_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 20 : Channel 20 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH20_Pos (20UL) /*!< Position of CH20 field. */
+#define PPI_CHENSET_CH20_Msk (0x1UL << PPI_CHENSET_CH20_Pos) /*!< Bit mask of CH20 field. */
+#define PPI_CHENSET_CH20_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH20_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH20_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 19 : Channel 19 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH19_Pos (19UL) /*!< Position of CH19 field. */
+#define PPI_CHENSET_CH19_Msk (0x1UL << PPI_CHENSET_CH19_Pos) /*!< Bit mask of CH19 field. */
+#define PPI_CHENSET_CH19_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH19_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH19_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 18 : Channel 18 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH18_Pos (18UL) /*!< Position of CH18 field. */
+#define PPI_CHENSET_CH18_Msk (0x1UL << PPI_CHENSET_CH18_Pos) /*!< Bit mask of CH18 field. */
+#define PPI_CHENSET_CH18_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH18_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH18_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 17 : Channel 17 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH17_Pos (17UL) /*!< Position of CH17 field. */
+#define PPI_CHENSET_CH17_Msk (0x1UL << PPI_CHENSET_CH17_Pos) /*!< Bit mask of CH17 field. */
+#define PPI_CHENSET_CH17_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH17_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH17_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 16 : Channel 16 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH16_Pos (16UL) /*!< Position of CH16 field. */
+#define PPI_CHENSET_CH16_Msk (0x1UL << PPI_CHENSET_CH16_Pos) /*!< Bit mask of CH16 field. */
+#define PPI_CHENSET_CH16_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH16_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH16_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 15 : Channel 15 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH15_Pos (15UL) /*!< Position of CH15 field. */
+#define PPI_CHENSET_CH15_Msk (0x1UL << PPI_CHENSET_CH15_Pos) /*!< Bit mask of CH15 field. */
+#define PPI_CHENSET_CH15_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH15_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH15_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 14 : Channel 14 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH14_Pos (14UL) /*!< Position of CH14 field. */
+#define PPI_CHENSET_CH14_Msk (0x1UL << PPI_CHENSET_CH14_Pos) /*!< Bit mask of CH14 field. */
+#define PPI_CHENSET_CH14_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH14_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH14_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 13 : Channel 13 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH13_Pos (13UL) /*!< Position of CH13 field. */
+#define PPI_CHENSET_CH13_Msk (0x1UL << PPI_CHENSET_CH13_Pos) /*!< Bit mask of CH13 field. */
+#define PPI_CHENSET_CH13_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH13_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH13_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 12 : Channel 12 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH12_Pos (12UL) /*!< Position of CH12 field. */
+#define PPI_CHENSET_CH12_Msk (0x1UL << PPI_CHENSET_CH12_Pos) /*!< Bit mask of CH12 field. */
+#define PPI_CHENSET_CH12_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH12_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH12_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 11 : Channel 11 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH11_Pos (11UL) /*!< Position of CH11 field. */
+#define PPI_CHENSET_CH11_Msk (0x1UL << PPI_CHENSET_CH11_Pos) /*!< Bit mask of CH11 field. */
+#define PPI_CHENSET_CH11_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH11_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH11_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 10 : Channel 10 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH10_Pos (10UL) /*!< Position of CH10 field. */
+#define PPI_CHENSET_CH10_Msk (0x1UL << PPI_CHENSET_CH10_Pos) /*!< Bit mask of CH10 field. */
+#define PPI_CHENSET_CH10_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH10_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH10_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 9 : Channel 9 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH9_Pos (9UL) /*!< Position of CH9 field. */
+#define PPI_CHENSET_CH9_Msk (0x1UL << PPI_CHENSET_CH9_Pos) /*!< Bit mask of CH9 field. */
+#define PPI_CHENSET_CH9_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH9_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH9_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 8 : Channel 8 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH8_Pos (8UL) /*!< Position of CH8 field. */
+#define PPI_CHENSET_CH8_Msk (0x1UL << PPI_CHENSET_CH8_Pos) /*!< Bit mask of CH8 field. */
+#define PPI_CHENSET_CH8_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH8_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH8_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 7 : Channel 7 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH7_Pos (7UL) /*!< Position of CH7 field. */
+#define PPI_CHENSET_CH7_Msk (0x1UL << PPI_CHENSET_CH7_Pos) /*!< Bit mask of CH7 field. */
+#define PPI_CHENSET_CH7_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH7_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH7_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 6 : Channel 6 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH6_Pos (6UL) /*!< Position of CH6 field. */
+#define PPI_CHENSET_CH6_Msk (0x1UL << PPI_CHENSET_CH6_Pos) /*!< Bit mask of CH6 field. */
+#define PPI_CHENSET_CH6_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH6_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH6_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 5 : Channel 5 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH5_Pos (5UL) /*!< Position of CH5 field. */
+#define PPI_CHENSET_CH5_Msk (0x1UL << PPI_CHENSET_CH5_Pos) /*!< Bit mask of CH5 field. */
+#define PPI_CHENSET_CH5_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH5_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH5_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 4 : Channel 4 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH4_Pos (4UL) /*!< Position of CH4 field. */
+#define PPI_CHENSET_CH4_Msk (0x1UL << PPI_CHENSET_CH4_Pos) /*!< Bit mask of CH4 field. */
+#define PPI_CHENSET_CH4_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH4_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH4_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 3 : Channel 3 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH3_Pos (3UL) /*!< Position of CH3 field. */
+#define PPI_CHENSET_CH3_Msk (0x1UL << PPI_CHENSET_CH3_Pos) /*!< Bit mask of CH3 field. */
+#define PPI_CHENSET_CH3_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH3_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH3_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 2 : Channel 2 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH2_Pos (2UL) /*!< Position of CH2 field. */
+#define PPI_CHENSET_CH2_Msk (0x1UL << PPI_CHENSET_CH2_Pos) /*!< Bit mask of CH2 field. */
+#define PPI_CHENSET_CH2_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH2_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH2_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 1 : Channel 1 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH1_Pos (1UL) /*!< Position of CH1 field. */
+#define PPI_CHENSET_CH1_Msk (0x1UL << PPI_CHENSET_CH1_Pos) /*!< Bit mask of CH1 field. */
+#define PPI_CHENSET_CH1_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH1_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH1_Set (1UL) /*!< Write: Enable channel */
+
+/* Bit 0 : Channel 0 enable set register. Writing '0' has no effect */
+#define PPI_CHENSET_CH0_Pos (0UL) /*!< Position of CH0 field. */
+#define PPI_CHENSET_CH0_Msk (0x1UL << PPI_CHENSET_CH0_Pos) /*!< Bit mask of CH0 field. */
+#define PPI_CHENSET_CH0_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENSET_CH0_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENSET_CH0_Set (1UL) /*!< Write: Enable channel */
+
+/* Register: PPI_CHENCLR */
+/* Description: Channel enable clear register */
+
+/* Bit 31 : Channel 31 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH31_Pos (31UL) /*!< Position of CH31 field. */
+#define PPI_CHENCLR_CH31_Msk (0x1UL << PPI_CHENCLR_CH31_Pos) /*!< Bit mask of CH31 field. */
+#define PPI_CHENCLR_CH31_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH31_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH31_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 30 : Channel 30 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH30_Pos (30UL) /*!< Position of CH30 field. */
+#define PPI_CHENCLR_CH30_Msk (0x1UL << PPI_CHENCLR_CH30_Pos) /*!< Bit mask of CH30 field. */
+#define PPI_CHENCLR_CH30_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH30_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH30_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 29 : Channel 29 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH29_Pos (29UL) /*!< Position of CH29 field. */
+#define PPI_CHENCLR_CH29_Msk (0x1UL << PPI_CHENCLR_CH29_Pos) /*!< Bit mask of CH29 field. */
+#define PPI_CHENCLR_CH29_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH29_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH29_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 28 : Channel 28 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH28_Pos (28UL) /*!< Position of CH28 field. */
+#define PPI_CHENCLR_CH28_Msk (0x1UL << PPI_CHENCLR_CH28_Pos) /*!< Bit mask of CH28 field. */
+#define PPI_CHENCLR_CH28_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH28_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH28_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 27 : Channel 27 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH27_Pos (27UL) /*!< Position of CH27 field. */
+#define PPI_CHENCLR_CH27_Msk (0x1UL << PPI_CHENCLR_CH27_Pos) /*!< Bit mask of CH27 field. */
+#define PPI_CHENCLR_CH27_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH27_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH27_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 26 : Channel 26 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH26_Pos (26UL) /*!< Position of CH26 field. */
+#define PPI_CHENCLR_CH26_Msk (0x1UL << PPI_CHENCLR_CH26_Pos) /*!< Bit mask of CH26 field. */
+#define PPI_CHENCLR_CH26_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH26_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH26_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 25 : Channel 25 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH25_Pos (25UL) /*!< Position of CH25 field. */
+#define PPI_CHENCLR_CH25_Msk (0x1UL << PPI_CHENCLR_CH25_Pos) /*!< Bit mask of CH25 field. */
+#define PPI_CHENCLR_CH25_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH25_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH25_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 24 : Channel 24 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH24_Pos (24UL) /*!< Position of CH24 field. */
+#define PPI_CHENCLR_CH24_Msk (0x1UL << PPI_CHENCLR_CH24_Pos) /*!< Bit mask of CH24 field. */
+#define PPI_CHENCLR_CH24_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH24_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH24_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 23 : Channel 23 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH23_Pos (23UL) /*!< Position of CH23 field. */
+#define PPI_CHENCLR_CH23_Msk (0x1UL << PPI_CHENCLR_CH23_Pos) /*!< Bit mask of CH23 field. */
+#define PPI_CHENCLR_CH23_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH23_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH23_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 22 : Channel 22 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH22_Pos (22UL) /*!< Position of CH22 field. */
+#define PPI_CHENCLR_CH22_Msk (0x1UL << PPI_CHENCLR_CH22_Pos) /*!< Bit mask of CH22 field. */
+#define PPI_CHENCLR_CH22_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH22_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH22_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 21 : Channel 21 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH21_Pos (21UL) /*!< Position of CH21 field. */
+#define PPI_CHENCLR_CH21_Msk (0x1UL << PPI_CHENCLR_CH21_Pos) /*!< Bit mask of CH21 field. */
+#define PPI_CHENCLR_CH21_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH21_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH21_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 20 : Channel 20 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH20_Pos (20UL) /*!< Position of CH20 field. */
+#define PPI_CHENCLR_CH20_Msk (0x1UL << PPI_CHENCLR_CH20_Pos) /*!< Bit mask of CH20 field. */
+#define PPI_CHENCLR_CH20_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH20_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH20_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 19 : Channel 19 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH19_Pos (19UL) /*!< Position of CH19 field. */
+#define PPI_CHENCLR_CH19_Msk (0x1UL << PPI_CHENCLR_CH19_Pos) /*!< Bit mask of CH19 field. */
+#define PPI_CHENCLR_CH19_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH19_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH19_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 18 : Channel 18 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH18_Pos (18UL) /*!< Position of CH18 field. */
+#define PPI_CHENCLR_CH18_Msk (0x1UL << PPI_CHENCLR_CH18_Pos) /*!< Bit mask of CH18 field. */
+#define PPI_CHENCLR_CH18_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH18_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH18_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 17 : Channel 17 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH17_Pos (17UL) /*!< Position of CH17 field. */
+#define PPI_CHENCLR_CH17_Msk (0x1UL << PPI_CHENCLR_CH17_Pos) /*!< Bit mask of CH17 field. */
+#define PPI_CHENCLR_CH17_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH17_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH17_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 16 : Channel 16 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH16_Pos (16UL) /*!< Position of CH16 field. */
+#define PPI_CHENCLR_CH16_Msk (0x1UL << PPI_CHENCLR_CH16_Pos) /*!< Bit mask of CH16 field. */
+#define PPI_CHENCLR_CH16_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH16_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH16_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 15 : Channel 15 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH15_Pos (15UL) /*!< Position of CH15 field. */
+#define PPI_CHENCLR_CH15_Msk (0x1UL << PPI_CHENCLR_CH15_Pos) /*!< Bit mask of CH15 field. */
+#define PPI_CHENCLR_CH15_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH15_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH15_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 14 : Channel 14 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH14_Pos (14UL) /*!< Position of CH14 field. */
+#define PPI_CHENCLR_CH14_Msk (0x1UL << PPI_CHENCLR_CH14_Pos) /*!< Bit mask of CH14 field. */
+#define PPI_CHENCLR_CH14_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH14_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH14_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 13 : Channel 13 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH13_Pos (13UL) /*!< Position of CH13 field. */
+#define PPI_CHENCLR_CH13_Msk (0x1UL << PPI_CHENCLR_CH13_Pos) /*!< Bit mask of CH13 field. */
+#define PPI_CHENCLR_CH13_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH13_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH13_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 12 : Channel 12 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH12_Pos (12UL) /*!< Position of CH12 field. */
+#define PPI_CHENCLR_CH12_Msk (0x1UL << PPI_CHENCLR_CH12_Pos) /*!< Bit mask of CH12 field. */
+#define PPI_CHENCLR_CH12_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH12_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH12_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 11 : Channel 11 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH11_Pos (11UL) /*!< Position of CH11 field. */
+#define PPI_CHENCLR_CH11_Msk (0x1UL << PPI_CHENCLR_CH11_Pos) /*!< Bit mask of CH11 field. */
+#define PPI_CHENCLR_CH11_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH11_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH11_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 10 : Channel 10 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH10_Pos (10UL) /*!< Position of CH10 field. */
+#define PPI_CHENCLR_CH10_Msk (0x1UL << PPI_CHENCLR_CH10_Pos) /*!< Bit mask of CH10 field. */
+#define PPI_CHENCLR_CH10_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH10_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH10_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 9 : Channel 9 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH9_Pos (9UL) /*!< Position of CH9 field. */
+#define PPI_CHENCLR_CH9_Msk (0x1UL << PPI_CHENCLR_CH9_Pos) /*!< Bit mask of CH9 field. */
+#define PPI_CHENCLR_CH9_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH9_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH9_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 8 : Channel 8 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH8_Pos (8UL) /*!< Position of CH8 field. */
+#define PPI_CHENCLR_CH8_Msk (0x1UL << PPI_CHENCLR_CH8_Pos) /*!< Bit mask of CH8 field. */
+#define PPI_CHENCLR_CH8_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH8_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH8_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 7 : Channel 7 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH7_Pos (7UL) /*!< Position of CH7 field. */
+#define PPI_CHENCLR_CH7_Msk (0x1UL << PPI_CHENCLR_CH7_Pos) /*!< Bit mask of CH7 field. */
+#define PPI_CHENCLR_CH7_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH7_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH7_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 6 : Channel 6 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH6_Pos (6UL) /*!< Position of CH6 field. */
+#define PPI_CHENCLR_CH6_Msk (0x1UL << PPI_CHENCLR_CH6_Pos) /*!< Bit mask of CH6 field. */
+#define PPI_CHENCLR_CH6_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH6_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH6_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 5 : Channel 5 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH5_Pos (5UL) /*!< Position of CH5 field. */
+#define PPI_CHENCLR_CH5_Msk (0x1UL << PPI_CHENCLR_CH5_Pos) /*!< Bit mask of CH5 field. */
+#define PPI_CHENCLR_CH5_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH5_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH5_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 4 : Channel 4 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH4_Pos (4UL) /*!< Position of CH4 field. */
+#define PPI_CHENCLR_CH4_Msk (0x1UL << PPI_CHENCLR_CH4_Pos) /*!< Bit mask of CH4 field. */
+#define PPI_CHENCLR_CH4_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH4_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH4_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 3 : Channel 3 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH3_Pos (3UL) /*!< Position of CH3 field. */
+#define PPI_CHENCLR_CH3_Msk (0x1UL << PPI_CHENCLR_CH3_Pos) /*!< Bit mask of CH3 field. */
+#define PPI_CHENCLR_CH3_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH3_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH3_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 2 : Channel 2 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH2_Pos (2UL) /*!< Position of CH2 field. */
+#define PPI_CHENCLR_CH2_Msk (0x1UL << PPI_CHENCLR_CH2_Pos) /*!< Bit mask of CH2 field. */
+#define PPI_CHENCLR_CH2_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH2_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH2_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 1 : Channel 1 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH1_Pos (1UL) /*!< Position of CH1 field. */
+#define PPI_CHENCLR_CH1_Msk (0x1UL << PPI_CHENCLR_CH1_Pos) /*!< Bit mask of CH1 field. */
+#define PPI_CHENCLR_CH1_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH1_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH1_Clear (1UL) /*!< Write: disable channel */
+
+/* Bit 0 : Channel 0 enable clear register. Writing '0' has no effect */
+#define PPI_CHENCLR_CH0_Pos (0UL) /*!< Position of CH0 field. */
+#define PPI_CHENCLR_CH0_Msk (0x1UL << PPI_CHENCLR_CH0_Pos) /*!< Bit mask of CH0 field. */
+#define PPI_CHENCLR_CH0_Disabled (0UL) /*!< Read: channel disabled */
+#define PPI_CHENCLR_CH0_Enabled (1UL) /*!< Read: channel enabled */
+#define PPI_CHENCLR_CH0_Clear (1UL) /*!< Write: disable channel */
+
+/* Register: PPI_CH_EEP */
+/* Description: Description cluster: Channel n event end-point */
+
+/* Bits 31..0 : Pointer to event register. Accepts only addresses to registers from the Event group. */
+#define PPI_CH_EEP_EEP_Pos (0UL) /*!< Position of EEP field. */
+#define PPI_CH_EEP_EEP_Msk (0xFFFFFFFFUL << PPI_CH_EEP_EEP_Pos) /*!< Bit mask of EEP field. */
+
+/* Register: PPI_CH_TEP */
+/* Description: Description cluster: Channel n task end-point */
+
+/* Bits 31..0 : Pointer to task register. Accepts only addresses to registers from the Task group. */
+#define PPI_CH_TEP_TEP_Pos (0UL) /*!< Position of TEP field. */
+#define PPI_CH_TEP_TEP_Msk (0xFFFFFFFFUL << PPI_CH_TEP_TEP_Pos) /*!< Bit mask of TEP field. */
+
+/* Register: PPI_CHG */
+/* Description: Description collection: Channel group n */
+
+/* Bit 31 : Include or exclude channel 31 */
+#define PPI_CHG_CH31_Pos (31UL) /*!< Position of CH31 field. */
+#define PPI_CHG_CH31_Msk (0x1UL << PPI_CHG_CH31_Pos) /*!< Bit mask of CH31 field. */
+#define PPI_CHG_CH31_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH31_Included (1UL) /*!< Include */
+
+/* Bit 30 : Include or exclude channel 30 */
+#define PPI_CHG_CH30_Pos (30UL) /*!< Position of CH30 field. */
+#define PPI_CHG_CH30_Msk (0x1UL << PPI_CHG_CH30_Pos) /*!< Bit mask of CH30 field. */
+#define PPI_CHG_CH30_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH30_Included (1UL) /*!< Include */
+
+/* Bit 29 : Include or exclude channel 29 */
+#define PPI_CHG_CH29_Pos (29UL) /*!< Position of CH29 field. */
+#define PPI_CHG_CH29_Msk (0x1UL << PPI_CHG_CH29_Pos) /*!< Bit mask of CH29 field. */
+#define PPI_CHG_CH29_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH29_Included (1UL) /*!< Include */
+
+/* Bit 28 : Include or exclude channel 28 */
+#define PPI_CHG_CH28_Pos (28UL) /*!< Position of CH28 field. */
+#define PPI_CHG_CH28_Msk (0x1UL << PPI_CHG_CH28_Pos) /*!< Bit mask of CH28 field. */
+#define PPI_CHG_CH28_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH28_Included (1UL) /*!< Include */
+
+/* Bit 27 : Include or exclude channel 27 */
+#define PPI_CHG_CH27_Pos (27UL) /*!< Position of CH27 field. */
+#define PPI_CHG_CH27_Msk (0x1UL << PPI_CHG_CH27_Pos) /*!< Bit mask of CH27 field. */
+#define PPI_CHG_CH27_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH27_Included (1UL) /*!< Include */
+
+/* Bit 26 : Include or exclude channel 26 */
+#define PPI_CHG_CH26_Pos (26UL) /*!< Position of CH26 field. */
+#define PPI_CHG_CH26_Msk (0x1UL << PPI_CHG_CH26_Pos) /*!< Bit mask of CH26 field. */
+#define PPI_CHG_CH26_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH26_Included (1UL) /*!< Include */
+
+/* Bit 25 : Include or exclude channel 25 */
+#define PPI_CHG_CH25_Pos (25UL) /*!< Position of CH25 field. */
+#define PPI_CHG_CH25_Msk (0x1UL << PPI_CHG_CH25_Pos) /*!< Bit mask of CH25 field. */
+#define PPI_CHG_CH25_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH25_Included (1UL) /*!< Include */
+
+/* Bit 24 : Include or exclude channel 24 */
+#define PPI_CHG_CH24_Pos (24UL) /*!< Position of CH24 field. */
+#define PPI_CHG_CH24_Msk (0x1UL << PPI_CHG_CH24_Pos) /*!< Bit mask of CH24 field. */
+#define PPI_CHG_CH24_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH24_Included (1UL) /*!< Include */
+
+/* Bit 23 : Include or exclude channel 23 */
+#define PPI_CHG_CH23_Pos (23UL) /*!< Position of CH23 field. */
+#define PPI_CHG_CH23_Msk (0x1UL << PPI_CHG_CH23_Pos) /*!< Bit mask of CH23 field. */
+#define PPI_CHG_CH23_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH23_Included (1UL) /*!< Include */
+
+/* Bit 22 : Include or exclude channel 22 */
+#define PPI_CHG_CH22_Pos (22UL) /*!< Position of CH22 field. */
+#define PPI_CHG_CH22_Msk (0x1UL << PPI_CHG_CH22_Pos) /*!< Bit mask of CH22 field. */
+#define PPI_CHG_CH22_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH22_Included (1UL) /*!< Include */
+
+/* Bit 21 : Include or exclude channel 21 */
+#define PPI_CHG_CH21_Pos (21UL) /*!< Position of CH21 field. */
+#define PPI_CHG_CH21_Msk (0x1UL << PPI_CHG_CH21_Pos) /*!< Bit mask of CH21 field. */
+#define PPI_CHG_CH21_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH21_Included (1UL) /*!< Include */
+
+/* Bit 20 : Include or exclude channel 20 */
+#define PPI_CHG_CH20_Pos (20UL) /*!< Position of CH20 field. */
+#define PPI_CHG_CH20_Msk (0x1UL << PPI_CHG_CH20_Pos) /*!< Bit mask of CH20 field. */
+#define PPI_CHG_CH20_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH20_Included (1UL) /*!< Include */
+
+/* Bit 19 : Include or exclude channel 19 */
+#define PPI_CHG_CH19_Pos (19UL) /*!< Position of CH19 field. */
+#define PPI_CHG_CH19_Msk (0x1UL << PPI_CHG_CH19_Pos) /*!< Bit mask of CH19 field. */
+#define PPI_CHG_CH19_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH19_Included (1UL) /*!< Include */
+
+/* Bit 18 : Include or exclude channel 18 */
+#define PPI_CHG_CH18_Pos (18UL) /*!< Position of CH18 field. */
+#define PPI_CHG_CH18_Msk (0x1UL << PPI_CHG_CH18_Pos) /*!< Bit mask of CH18 field. */
+#define PPI_CHG_CH18_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH18_Included (1UL) /*!< Include */
+
+/* Bit 17 : Include or exclude channel 17 */
+#define PPI_CHG_CH17_Pos (17UL) /*!< Position of CH17 field. */
+#define PPI_CHG_CH17_Msk (0x1UL << PPI_CHG_CH17_Pos) /*!< Bit mask of CH17 field. */
+#define PPI_CHG_CH17_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH17_Included (1UL) /*!< Include */
+
+/* Bit 16 : Include or exclude channel 16 */
+#define PPI_CHG_CH16_Pos (16UL) /*!< Position of CH16 field. */
+#define PPI_CHG_CH16_Msk (0x1UL << PPI_CHG_CH16_Pos) /*!< Bit mask of CH16 field. */
+#define PPI_CHG_CH16_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH16_Included (1UL) /*!< Include */
+
+/* Bit 15 : Include or exclude channel 15 */
+#define PPI_CHG_CH15_Pos (15UL) /*!< Position of CH15 field. */
+#define PPI_CHG_CH15_Msk (0x1UL << PPI_CHG_CH15_Pos) /*!< Bit mask of CH15 field. */
+#define PPI_CHG_CH15_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH15_Included (1UL) /*!< Include */
+
+/* Bit 14 : Include or exclude channel 14 */
+#define PPI_CHG_CH14_Pos (14UL) /*!< Position of CH14 field. */
+#define PPI_CHG_CH14_Msk (0x1UL << PPI_CHG_CH14_Pos) /*!< Bit mask of CH14 field. */
+#define PPI_CHG_CH14_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH14_Included (1UL) /*!< Include */
+
+/* Bit 13 : Include or exclude channel 13 */
+#define PPI_CHG_CH13_Pos (13UL) /*!< Position of CH13 field. */
+#define PPI_CHG_CH13_Msk (0x1UL << PPI_CHG_CH13_Pos) /*!< Bit mask of CH13 field. */
+#define PPI_CHG_CH13_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH13_Included (1UL) /*!< Include */
+
+/* Bit 12 : Include or exclude channel 12 */
+#define PPI_CHG_CH12_Pos (12UL) /*!< Position of CH12 field. */
+#define PPI_CHG_CH12_Msk (0x1UL << PPI_CHG_CH12_Pos) /*!< Bit mask of CH12 field. */
+#define PPI_CHG_CH12_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH12_Included (1UL) /*!< Include */
+
+/* Bit 11 : Include or exclude channel 11 */
+#define PPI_CHG_CH11_Pos (11UL) /*!< Position of CH11 field. */
+#define PPI_CHG_CH11_Msk (0x1UL << PPI_CHG_CH11_Pos) /*!< Bit mask of CH11 field. */
+#define PPI_CHG_CH11_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH11_Included (1UL) /*!< Include */
+
+/* Bit 10 : Include or exclude channel 10 */
+#define PPI_CHG_CH10_Pos (10UL) /*!< Position of CH10 field. */
+#define PPI_CHG_CH10_Msk (0x1UL << PPI_CHG_CH10_Pos) /*!< Bit mask of CH10 field. */
+#define PPI_CHG_CH10_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH10_Included (1UL) /*!< Include */
+
+/* Bit 9 : Include or exclude channel 9 */
+#define PPI_CHG_CH9_Pos (9UL) /*!< Position of CH9 field. */
+#define PPI_CHG_CH9_Msk (0x1UL << PPI_CHG_CH9_Pos) /*!< Bit mask of CH9 field. */
+#define PPI_CHG_CH9_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH9_Included (1UL) /*!< Include */
+
+/* Bit 8 : Include or exclude channel 8 */
+#define PPI_CHG_CH8_Pos (8UL) /*!< Position of CH8 field. */
+#define PPI_CHG_CH8_Msk (0x1UL << PPI_CHG_CH8_Pos) /*!< Bit mask of CH8 field. */
+#define PPI_CHG_CH8_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH8_Included (1UL) /*!< Include */
+
+/* Bit 7 : Include or exclude channel 7 */
+#define PPI_CHG_CH7_Pos (7UL) /*!< Position of CH7 field. */
+#define PPI_CHG_CH7_Msk (0x1UL << PPI_CHG_CH7_Pos) /*!< Bit mask of CH7 field. */
+#define PPI_CHG_CH7_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH7_Included (1UL) /*!< Include */
+
+/* Bit 6 : Include or exclude channel 6 */
+#define PPI_CHG_CH6_Pos (6UL) /*!< Position of CH6 field. */
+#define PPI_CHG_CH6_Msk (0x1UL << PPI_CHG_CH6_Pos) /*!< Bit mask of CH6 field. */
+#define PPI_CHG_CH6_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH6_Included (1UL) /*!< Include */
+
+/* Bit 5 : Include or exclude channel 5 */
+#define PPI_CHG_CH5_Pos (5UL) /*!< Position of CH5 field. */
+#define PPI_CHG_CH5_Msk (0x1UL << PPI_CHG_CH5_Pos) /*!< Bit mask of CH5 field. */
+#define PPI_CHG_CH5_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH5_Included (1UL) /*!< Include */
+
+/* Bit 4 : Include or exclude channel 4 */
+#define PPI_CHG_CH4_Pos (4UL) /*!< Position of CH4 field. */
+#define PPI_CHG_CH4_Msk (0x1UL << PPI_CHG_CH4_Pos) /*!< Bit mask of CH4 field. */
+#define PPI_CHG_CH4_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH4_Included (1UL) /*!< Include */
+
+/* Bit 3 : Include or exclude channel 3 */
+#define PPI_CHG_CH3_Pos (3UL) /*!< Position of CH3 field. */
+#define PPI_CHG_CH3_Msk (0x1UL << PPI_CHG_CH3_Pos) /*!< Bit mask of CH3 field. */
+#define PPI_CHG_CH3_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH3_Included (1UL) /*!< Include */
+
+/* Bit 2 : Include or exclude channel 2 */
+#define PPI_CHG_CH2_Pos (2UL) /*!< Position of CH2 field. */
+#define PPI_CHG_CH2_Msk (0x1UL << PPI_CHG_CH2_Pos) /*!< Bit mask of CH2 field. */
+#define PPI_CHG_CH2_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH2_Included (1UL) /*!< Include */
+
+/* Bit 1 : Include or exclude channel 1 */
+#define PPI_CHG_CH1_Pos (1UL) /*!< Position of CH1 field. */
+#define PPI_CHG_CH1_Msk (0x1UL << PPI_CHG_CH1_Pos) /*!< Bit mask of CH1 field. */
+#define PPI_CHG_CH1_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH1_Included (1UL) /*!< Include */
+
+/* Bit 0 : Include or exclude channel 0 */
+#define PPI_CHG_CH0_Pos (0UL) /*!< Position of CH0 field. */
+#define PPI_CHG_CH0_Msk (0x1UL << PPI_CHG_CH0_Pos) /*!< Bit mask of CH0 field. */
+#define PPI_CHG_CH0_Excluded (0UL) /*!< Exclude */
+#define PPI_CHG_CH0_Included (1UL) /*!< Include */
+
+/* Register: PPI_FORK_TEP */
+/* Description: Description cluster: Channel n task end-point */
+
+/* Bits 31..0 : Pointer to task register */
+#define PPI_FORK_TEP_TEP_Pos (0UL) /*!< Position of TEP field. */
+#define PPI_FORK_TEP_TEP_Msk (0xFFFFFFFFUL << PPI_FORK_TEP_TEP_Pos) /*!< Bit mask of TEP field. */
+
+
+/* Peripheral: PWM */
+/* Description: Pulse width modulation unit 0 */
+
+/* Register: PWM_TASKS_STOP */
+/* Description: Stops PWM pulse generation on all channels at the end of current PWM period, and stops sequence playback */
+
+/* Bit 0 : Stops PWM pulse generation on all channels at the end of current PWM period, and stops sequence playback */
+#define PWM_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define PWM_TASKS_STOP_TASKS_STOP_Msk (0x1UL << PWM_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define PWM_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: PWM_TASKS_SEQSTART */
+/* Description: Description collection: Loads the first PWM value on all enabled channels from sequence n, and starts playing that sequence at the rate defined in SEQ[n]REFRESH and/or DECODER.MODE. Causes PWM generation to start if not running. */
+
+/* Bit 0 : Loads the first PWM value on all enabled channels from sequence n, and starts playing that sequence at the rate defined in SEQ[n]REFRESH and/or DECODER.MODE. Causes PWM generation to start if not running. */
+#define PWM_TASKS_SEQSTART_TASKS_SEQSTART_Pos (0UL) /*!< Position of TASKS_SEQSTART field. */
+#define PWM_TASKS_SEQSTART_TASKS_SEQSTART_Msk (0x1UL << PWM_TASKS_SEQSTART_TASKS_SEQSTART_Pos) /*!< Bit mask of TASKS_SEQSTART field. */
+#define PWM_TASKS_SEQSTART_TASKS_SEQSTART_Trigger (1UL) /*!< Trigger task */
+
+/* Register: PWM_TASKS_NEXTSTEP */
+/* Description: Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start if not running. */
+
+/* Bit 0 : Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start if not running. */
+#define PWM_TASKS_NEXTSTEP_TASKS_NEXTSTEP_Pos (0UL) /*!< Position of TASKS_NEXTSTEP field. */
+#define PWM_TASKS_NEXTSTEP_TASKS_NEXTSTEP_Msk (0x1UL << PWM_TASKS_NEXTSTEP_TASKS_NEXTSTEP_Pos) /*!< Bit mask of TASKS_NEXTSTEP field. */
+#define PWM_TASKS_NEXTSTEP_TASKS_NEXTSTEP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: PWM_EVENTS_STOPPED */
+/* Description: Response to STOP task, emitted when PWM pulses are no longer generated */
+
+/* Bit 0 : Response to STOP task, emitted when PWM pulses are no longer generated */
+#define PWM_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */
+#define PWM_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << PWM_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */
+#define PWM_EVENTS_STOPPED_EVENTS_STOPPED_NotGenerated (0UL) /*!< Event not generated */
+#define PWM_EVENTS_STOPPED_EVENTS_STOPPED_Generated (1UL) /*!< Event generated */
+
+/* Register: PWM_EVENTS_SEQSTARTED */
+/* Description: Description collection: First PWM period started on sequence n */
+
+/* Bit 0 : First PWM period started on sequence n */
+#define PWM_EVENTS_SEQSTARTED_EVENTS_SEQSTARTED_Pos (0UL) /*!< Position of EVENTS_SEQSTARTED field. */
+#define PWM_EVENTS_SEQSTARTED_EVENTS_SEQSTARTED_Msk (0x1UL << PWM_EVENTS_SEQSTARTED_EVENTS_SEQSTARTED_Pos) /*!< Bit mask of EVENTS_SEQSTARTED field. */
+#define PWM_EVENTS_SEQSTARTED_EVENTS_SEQSTARTED_NotGenerated (0UL) /*!< Event not generated */
+#define PWM_EVENTS_SEQSTARTED_EVENTS_SEQSTARTED_Generated (1UL) /*!< Event generated */
+
+/* Register: PWM_EVENTS_SEQEND */
+/* Description: Description collection: Emitted at end of every sequence n, when last value from RAM has been applied to wave counter */
+
+/* Bit 0 : Emitted at end of every sequence n, when last value from RAM has been applied to wave counter */
+#define PWM_EVENTS_SEQEND_EVENTS_SEQEND_Pos (0UL) /*!< Position of EVENTS_SEQEND field. */
+#define PWM_EVENTS_SEQEND_EVENTS_SEQEND_Msk (0x1UL << PWM_EVENTS_SEQEND_EVENTS_SEQEND_Pos) /*!< Bit mask of EVENTS_SEQEND field. */
+#define PWM_EVENTS_SEQEND_EVENTS_SEQEND_NotGenerated (0UL) /*!< Event not generated */
+#define PWM_EVENTS_SEQEND_EVENTS_SEQEND_Generated (1UL) /*!< Event generated */
+
+/* Register: PWM_EVENTS_PWMPERIODEND */
+/* Description: Emitted at the end of each PWM period */
+
+/* Bit 0 : Emitted at the end of each PWM period */
+#define PWM_EVENTS_PWMPERIODEND_EVENTS_PWMPERIODEND_Pos (0UL) /*!< Position of EVENTS_PWMPERIODEND field. */
+#define PWM_EVENTS_PWMPERIODEND_EVENTS_PWMPERIODEND_Msk (0x1UL << PWM_EVENTS_PWMPERIODEND_EVENTS_PWMPERIODEND_Pos) /*!< Bit mask of EVENTS_PWMPERIODEND field. */
+#define PWM_EVENTS_PWMPERIODEND_EVENTS_PWMPERIODEND_NotGenerated (0UL) /*!< Event not generated */
+#define PWM_EVENTS_PWMPERIODEND_EVENTS_PWMPERIODEND_Generated (1UL) /*!< Event generated */
+
+/* Register: PWM_EVENTS_LOOPSDONE */
+/* Description: Concatenated sequences have been played the amount of times defined in LOOP.CNT */
+
+/* Bit 0 : Concatenated sequences have been played the amount of times defined in LOOP.CNT */
+#define PWM_EVENTS_LOOPSDONE_EVENTS_LOOPSDONE_Pos (0UL) /*!< Position of EVENTS_LOOPSDONE field. */
+#define PWM_EVENTS_LOOPSDONE_EVENTS_LOOPSDONE_Msk (0x1UL << PWM_EVENTS_LOOPSDONE_EVENTS_LOOPSDONE_Pos) /*!< Bit mask of EVENTS_LOOPSDONE field. */
+#define PWM_EVENTS_LOOPSDONE_EVENTS_LOOPSDONE_NotGenerated (0UL) /*!< Event not generated */
+#define PWM_EVENTS_LOOPSDONE_EVENTS_LOOPSDONE_Generated (1UL) /*!< Event generated */
+
+/* Register: PWM_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 4 : Shortcut between event LOOPSDONE and task STOP */
+#define PWM_SHORTS_LOOPSDONE_STOP_Pos (4UL) /*!< Position of LOOPSDONE_STOP field. */
+#define PWM_SHORTS_LOOPSDONE_STOP_Msk (0x1UL << PWM_SHORTS_LOOPSDONE_STOP_Pos) /*!< Bit mask of LOOPSDONE_STOP field. */
+#define PWM_SHORTS_LOOPSDONE_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define PWM_SHORTS_LOOPSDONE_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 3 : Shortcut between event LOOPSDONE and task SEQSTART[1] */
+#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Pos (3UL) /*!< Position of LOOPSDONE_SEQSTART1 field. */
+#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Msk (0x1UL << PWM_SHORTS_LOOPSDONE_SEQSTART1_Pos) /*!< Bit mask of LOOPSDONE_SEQSTART1 field. */
+#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Disabled (0UL) /*!< Disable shortcut */
+#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 2 : Shortcut between event LOOPSDONE and task SEQSTART[0] */
+#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Pos (2UL) /*!< Position of LOOPSDONE_SEQSTART0 field. */
+#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Msk (0x1UL << PWM_SHORTS_LOOPSDONE_SEQSTART0_Pos) /*!< Bit mask of LOOPSDONE_SEQSTART0 field. */
+#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Disabled (0UL) /*!< Disable shortcut */
+#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 1 : Shortcut between event SEQEND[1] and task STOP */
+#define PWM_SHORTS_SEQEND1_STOP_Pos (1UL) /*!< Position of SEQEND1_STOP field. */
+#define PWM_SHORTS_SEQEND1_STOP_Msk (0x1UL << PWM_SHORTS_SEQEND1_STOP_Pos) /*!< Bit mask of SEQEND1_STOP field. */
+#define PWM_SHORTS_SEQEND1_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define PWM_SHORTS_SEQEND1_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 0 : Shortcut between event SEQEND[0] and task STOP */
+#define PWM_SHORTS_SEQEND0_STOP_Pos (0UL) /*!< Position of SEQEND0_STOP field. */
+#define PWM_SHORTS_SEQEND0_STOP_Msk (0x1UL << PWM_SHORTS_SEQEND0_STOP_Pos) /*!< Bit mask of SEQEND0_STOP field. */
+#define PWM_SHORTS_SEQEND0_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define PWM_SHORTS_SEQEND0_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: PWM_INTEN */
+/* Description: Enable or disable interrupt */
+
+/* Bit 7 : Enable or disable interrupt for event LOOPSDONE */
+#define PWM_INTEN_LOOPSDONE_Pos (7UL) /*!< Position of LOOPSDONE field. */
+#define PWM_INTEN_LOOPSDONE_Msk (0x1UL << PWM_INTEN_LOOPSDONE_Pos) /*!< Bit mask of LOOPSDONE field. */
+#define PWM_INTEN_LOOPSDONE_Disabled (0UL) /*!< Disable */
+#define PWM_INTEN_LOOPSDONE_Enabled (1UL) /*!< Enable */
+
+/* Bit 6 : Enable or disable interrupt for event PWMPERIODEND */
+#define PWM_INTEN_PWMPERIODEND_Pos (6UL) /*!< Position of PWMPERIODEND field. */
+#define PWM_INTEN_PWMPERIODEND_Msk (0x1UL << PWM_INTEN_PWMPERIODEND_Pos) /*!< Bit mask of PWMPERIODEND field. */
+#define PWM_INTEN_PWMPERIODEND_Disabled (0UL) /*!< Disable */
+#define PWM_INTEN_PWMPERIODEND_Enabled (1UL) /*!< Enable */
+
+/* Bit 5 : Enable or disable interrupt for event SEQEND[1] */
+#define PWM_INTEN_SEQEND1_Pos (5UL) /*!< Position of SEQEND1 field. */
+#define PWM_INTEN_SEQEND1_Msk (0x1UL << PWM_INTEN_SEQEND1_Pos) /*!< Bit mask of SEQEND1 field. */
+#define PWM_INTEN_SEQEND1_Disabled (0UL) /*!< Disable */
+#define PWM_INTEN_SEQEND1_Enabled (1UL) /*!< Enable */
+
+/* Bit 4 : Enable or disable interrupt for event SEQEND[0] */
+#define PWM_INTEN_SEQEND0_Pos (4UL) /*!< Position of SEQEND0 field. */
+#define PWM_INTEN_SEQEND0_Msk (0x1UL << PWM_INTEN_SEQEND0_Pos) /*!< Bit mask of SEQEND0 field. */
+#define PWM_INTEN_SEQEND0_Disabled (0UL) /*!< Disable */
+#define PWM_INTEN_SEQEND0_Enabled (1UL) /*!< Enable */
+
+/* Bit 3 : Enable or disable interrupt for event SEQSTARTED[1] */
+#define PWM_INTEN_SEQSTARTED1_Pos (3UL) /*!< Position of SEQSTARTED1 field. */
+#define PWM_INTEN_SEQSTARTED1_Msk (0x1UL << PWM_INTEN_SEQSTARTED1_Pos) /*!< Bit mask of SEQSTARTED1 field. */
+#define PWM_INTEN_SEQSTARTED1_Disabled (0UL) /*!< Disable */
+#define PWM_INTEN_SEQSTARTED1_Enabled (1UL) /*!< Enable */
+
+/* Bit 2 : Enable or disable interrupt for event SEQSTARTED[0] */
+#define PWM_INTEN_SEQSTARTED0_Pos (2UL) /*!< Position of SEQSTARTED0 field. */
+#define PWM_INTEN_SEQSTARTED0_Msk (0x1UL << PWM_INTEN_SEQSTARTED0_Pos) /*!< Bit mask of SEQSTARTED0 field. */
+#define PWM_INTEN_SEQSTARTED0_Disabled (0UL) /*!< Disable */
+#define PWM_INTEN_SEQSTARTED0_Enabled (1UL) /*!< Enable */
+
+/* Bit 1 : Enable or disable interrupt for event STOPPED */
+#define PWM_INTEN_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */
+#define PWM_INTEN_STOPPED_Msk (0x1UL << PWM_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define PWM_INTEN_STOPPED_Disabled (0UL) /*!< Disable */
+#define PWM_INTEN_STOPPED_Enabled (1UL) /*!< Enable */
+
+/* Register: PWM_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 7 : Write '1' to enable interrupt for event LOOPSDONE */
+#define PWM_INTENSET_LOOPSDONE_Pos (7UL) /*!< Position of LOOPSDONE field. */
+#define PWM_INTENSET_LOOPSDONE_Msk (0x1UL << PWM_INTENSET_LOOPSDONE_Pos) /*!< Bit mask of LOOPSDONE field. */
+#define PWM_INTENSET_LOOPSDONE_Disabled (0UL) /*!< Read: Disabled */
+#define PWM_INTENSET_LOOPSDONE_Enabled (1UL) /*!< Read: Enabled */
+#define PWM_INTENSET_LOOPSDONE_Set (1UL) /*!< Enable */
+
+/* Bit 6 : Write '1' to enable interrupt for event PWMPERIODEND */
+#define PWM_INTENSET_PWMPERIODEND_Pos (6UL) /*!< Position of PWMPERIODEND field. */
+#define PWM_INTENSET_PWMPERIODEND_Msk (0x1UL << PWM_INTENSET_PWMPERIODEND_Pos) /*!< Bit mask of PWMPERIODEND field. */
+#define PWM_INTENSET_PWMPERIODEND_Disabled (0UL) /*!< Read: Disabled */
+#define PWM_INTENSET_PWMPERIODEND_Enabled (1UL) /*!< Read: Enabled */
+#define PWM_INTENSET_PWMPERIODEND_Set (1UL) /*!< Enable */
+
+/* Bit 5 : Write '1' to enable interrupt for event SEQEND[1] */
+#define PWM_INTENSET_SEQEND1_Pos (5UL) /*!< Position of SEQEND1 field. */
+#define PWM_INTENSET_SEQEND1_Msk (0x1UL << PWM_INTENSET_SEQEND1_Pos) /*!< Bit mask of SEQEND1 field. */
+#define PWM_INTENSET_SEQEND1_Disabled (0UL) /*!< Read: Disabled */
+#define PWM_INTENSET_SEQEND1_Enabled (1UL) /*!< Read: Enabled */
+#define PWM_INTENSET_SEQEND1_Set (1UL) /*!< Enable */
+
+/* Bit 4 : Write '1' to enable interrupt for event SEQEND[0] */
+#define PWM_INTENSET_SEQEND0_Pos (4UL) /*!< Position of SEQEND0 field. */
+#define PWM_INTENSET_SEQEND0_Msk (0x1UL << PWM_INTENSET_SEQEND0_Pos) /*!< Bit mask of SEQEND0 field. */
+#define PWM_INTENSET_SEQEND0_Disabled (0UL) /*!< Read: Disabled */
+#define PWM_INTENSET_SEQEND0_Enabled (1UL) /*!< Read: Enabled */
+#define PWM_INTENSET_SEQEND0_Set (1UL) /*!< Enable */
+
+/* Bit 3 : Write '1' to enable interrupt for event SEQSTARTED[1] */
+#define PWM_INTENSET_SEQSTARTED1_Pos (3UL) /*!< Position of SEQSTARTED1 field. */
+#define PWM_INTENSET_SEQSTARTED1_Msk (0x1UL << PWM_INTENSET_SEQSTARTED1_Pos) /*!< Bit mask of SEQSTARTED1 field. */
+#define PWM_INTENSET_SEQSTARTED1_Disabled (0UL) /*!< Read: Disabled */
+#define PWM_INTENSET_SEQSTARTED1_Enabled (1UL) /*!< Read: Enabled */
+#define PWM_INTENSET_SEQSTARTED1_Set (1UL) /*!< Enable */
+
+/* Bit 2 : Write '1' to enable interrupt for event SEQSTARTED[0] */
+#define PWM_INTENSET_SEQSTARTED0_Pos (2UL) /*!< Position of SEQSTARTED0 field. */
+#define PWM_INTENSET_SEQSTARTED0_Msk (0x1UL << PWM_INTENSET_SEQSTARTED0_Pos) /*!< Bit mask of SEQSTARTED0 field. */
+#define PWM_INTENSET_SEQSTARTED0_Disabled (0UL) /*!< Read: Disabled */
+#define PWM_INTENSET_SEQSTARTED0_Enabled (1UL) /*!< Read: Enabled */
+#define PWM_INTENSET_SEQSTARTED0_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event STOPPED */
+#define PWM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */
+#define PWM_INTENSET_STOPPED_Msk (0x1UL << PWM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define PWM_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define PWM_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define PWM_INTENSET_STOPPED_Set (1UL) /*!< Enable */
+
+/* Register: PWM_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 7 : Write '1' to disable interrupt for event LOOPSDONE */
+#define PWM_INTENCLR_LOOPSDONE_Pos (7UL) /*!< Position of LOOPSDONE field. */
+#define PWM_INTENCLR_LOOPSDONE_Msk (0x1UL << PWM_INTENCLR_LOOPSDONE_Pos) /*!< Bit mask of LOOPSDONE field. */
+#define PWM_INTENCLR_LOOPSDONE_Disabled (0UL) /*!< Read: Disabled */
+#define PWM_INTENCLR_LOOPSDONE_Enabled (1UL) /*!< Read: Enabled */
+#define PWM_INTENCLR_LOOPSDONE_Clear (1UL) /*!< Disable */
+
+/* Bit 6 : Write '1' to disable interrupt for event PWMPERIODEND */
+#define PWM_INTENCLR_PWMPERIODEND_Pos (6UL) /*!< Position of PWMPERIODEND field. */
+#define PWM_INTENCLR_PWMPERIODEND_Msk (0x1UL << PWM_INTENCLR_PWMPERIODEND_Pos) /*!< Bit mask of PWMPERIODEND field. */
+#define PWM_INTENCLR_PWMPERIODEND_Disabled (0UL) /*!< Read: Disabled */
+#define PWM_INTENCLR_PWMPERIODEND_Enabled (1UL) /*!< Read: Enabled */
+#define PWM_INTENCLR_PWMPERIODEND_Clear (1UL) /*!< Disable */
+
+/* Bit 5 : Write '1' to disable interrupt for event SEQEND[1] */
+#define PWM_INTENCLR_SEQEND1_Pos (5UL) /*!< Position of SEQEND1 field. */
+#define PWM_INTENCLR_SEQEND1_Msk (0x1UL << PWM_INTENCLR_SEQEND1_Pos) /*!< Bit mask of SEQEND1 field. */
+#define PWM_INTENCLR_SEQEND1_Disabled (0UL) /*!< Read: Disabled */
+#define PWM_INTENCLR_SEQEND1_Enabled (1UL) /*!< Read: Enabled */
+#define PWM_INTENCLR_SEQEND1_Clear (1UL) /*!< Disable */
+
+/* Bit 4 : Write '1' to disable interrupt for event SEQEND[0] */
+#define PWM_INTENCLR_SEQEND0_Pos (4UL) /*!< Position of SEQEND0 field. */
+#define PWM_INTENCLR_SEQEND0_Msk (0x1UL << PWM_INTENCLR_SEQEND0_Pos) /*!< Bit mask of SEQEND0 field. */
+#define PWM_INTENCLR_SEQEND0_Disabled (0UL) /*!< Read: Disabled */
+#define PWM_INTENCLR_SEQEND0_Enabled (1UL) /*!< Read: Enabled */
+#define PWM_INTENCLR_SEQEND0_Clear (1UL) /*!< Disable */
+
+/* Bit 3 : Write '1' to disable interrupt for event SEQSTARTED[1] */
+#define PWM_INTENCLR_SEQSTARTED1_Pos (3UL) /*!< Position of SEQSTARTED1 field. */
+#define PWM_INTENCLR_SEQSTARTED1_Msk (0x1UL << PWM_INTENCLR_SEQSTARTED1_Pos) /*!< Bit mask of SEQSTARTED1 field. */
+#define PWM_INTENCLR_SEQSTARTED1_Disabled (0UL) /*!< Read: Disabled */
+#define PWM_INTENCLR_SEQSTARTED1_Enabled (1UL) /*!< Read: Enabled */
+#define PWM_INTENCLR_SEQSTARTED1_Clear (1UL) /*!< Disable */
+
+/* Bit 2 : Write '1' to disable interrupt for event SEQSTARTED[0] */
+#define PWM_INTENCLR_SEQSTARTED0_Pos (2UL) /*!< Position of SEQSTARTED0 field. */
+#define PWM_INTENCLR_SEQSTARTED0_Msk (0x1UL << PWM_INTENCLR_SEQSTARTED0_Pos) /*!< Bit mask of SEQSTARTED0 field. */
+#define PWM_INTENCLR_SEQSTARTED0_Disabled (0UL) /*!< Read: Disabled */
+#define PWM_INTENCLR_SEQSTARTED0_Enabled (1UL) /*!< Read: Enabled */
+#define PWM_INTENCLR_SEQSTARTED0_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event STOPPED */
+#define PWM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */
+#define PWM_INTENCLR_STOPPED_Msk (0x1UL << PWM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define PWM_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define PWM_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define PWM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */
+
+/* Register: PWM_ENABLE */
+/* Description: PWM module enable register */
+
+/* Bit 0 : Enable or disable PWM module */
+#define PWM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define PWM_ENABLE_ENABLE_Msk (0x1UL << PWM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define PWM_ENABLE_ENABLE_Disabled (0UL) /*!< Disabled */
+#define PWM_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */
+
+/* Register: PWM_MODE */
+/* Description: Selects operating mode of the wave counter */
+
+/* Bit 0 : Selects up mode or up-and-down mode for the counter */
+#define PWM_MODE_UPDOWN_Pos (0UL) /*!< Position of UPDOWN field. */
+#define PWM_MODE_UPDOWN_Msk (0x1UL << PWM_MODE_UPDOWN_Pos) /*!< Bit mask of UPDOWN field. */
+#define PWM_MODE_UPDOWN_Up (0UL) /*!< Up counter, edge-aligned PWM duty cycle */
+#define PWM_MODE_UPDOWN_UpAndDown (1UL) /*!< Up and down counter, center-aligned PWM duty cycle */
+
+/* Register: PWM_COUNTERTOP */
+/* Description: Value up to which the pulse generator counter counts */
+
+/* Bits 14..0 : Value up to which the pulse generator counter counts. This register is ignored when DECODER.MODE=WaveForm and only values from RAM are used. */
+#define PWM_COUNTERTOP_COUNTERTOP_Pos (0UL) /*!< Position of COUNTERTOP field. */
+#define PWM_COUNTERTOP_COUNTERTOP_Msk (0x7FFFUL << PWM_COUNTERTOP_COUNTERTOP_Pos) /*!< Bit mask of COUNTERTOP field. */
+
+/* Register: PWM_PRESCALER */
+/* Description: Configuration for PWM_CLK */
+
+/* Bits 2..0 : Prescaler of PWM_CLK */
+#define PWM_PRESCALER_PRESCALER_Pos (0UL) /*!< Position of PRESCALER field. */
+#define PWM_PRESCALER_PRESCALER_Msk (0x7UL << PWM_PRESCALER_PRESCALER_Pos) /*!< Bit mask of PRESCALER field. */
+#define PWM_PRESCALER_PRESCALER_DIV_1 (0UL) /*!< Divide by 1 (16 MHz) */
+#define PWM_PRESCALER_PRESCALER_DIV_2 (1UL) /*!< Divide by 2 (8 MHz) */
+#define PWM_PRESCALER_PRESCALER_DIV_4 (2UL) /*!< Divide by 4 (4 MHz) */
+#define PWM_PRESCALER_PRESCALER_DIV_8 (3UL) /*!< Divide by 8 (2 MHz) */
+#define PWM_PRESCALER_PRESCALER_DIV_16 (4UL) /*!< Divide by 16 (1 MHz) */
+#define PWM_PRESCALER_PRESCALER_DIV_32 (5UL) /*!< Divide by 32 (500 kHz) */
+#define PWM_PRESCALER_PRESCALER_DIV_64 (6UL) /*!< Divide by 64 (250 kHz) */
+#define PWM_PRESCALER_PRESCALER_DIV_128 (7UL) /*!< Divide by 128 (125 kHz) */
+
+/* Register: PWM_DECODER */
+/* Description: Configuration of the decoder */
+
+/* Bit 8 : Selects source for advancing the active sequence */
+#define PWM_DECODER_MODE_Pos (8UL) /*!< Position of MODE field. */
+#define PWM_DECODER_MODE_Msk (0x1UL << PWM_DECODER_MODE_Pos) /*!< Bit mask of MODE field. */
+#define PWM_DECODER_MODE_RefreshCount (0UL) /*!< SEQ[n].REFRESH is used to determine loading internal compare registers */
+#define PWM_DECODER_MODE_NextStep (1UL) /*!< NEXTSTEP task causes a new value to be loaded to internal compare registers */
+
+/* Bits 1..0 : How a sequence is read from RAM and spread to the compare register */
+#define PWM_DECODER_LOAD_Pos (0UL) /*!< Position of LOAD field. */
+#define PWM_DECODER_LOAD_Msk (0x3UL << PWM_DECODER_LOAD_Pos) /*!< Bit mask of LOAD field. */
+#define PWM_DECODER_LOAD_Common (0UL) /*!< 1st half word (16-bit) used in all PWM channels 0..3 */
+#define PWM_DECODER_LOAD_Grouped (1UL) /*!< 1st half word (16-bit) used in channel 0..1; 2nd word in channel 2..3 */
+#define PWM_DECODER_LOAD_Individual (2UL) /*!< 1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in ch.3 */
+#define PWM_DECODER_LOAD_WaveForm (3UL) /*!< 1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in COUNTERTOP */
+
+/* Register: PWM_LOOP */
+/* Description: Number of playbacks of a loop */
+
+/* Bits 15..0 : Number of playbacks of pattern cycles */
+#define PWM_LOOP_CNT_Pos (0UL) /*!< Position of CNT field. */
+#define PWM_LOOP_CNT_Msk (0xFFFFUL << PWM_LOOP_CNT_Pos) /*!< Bit mask of CNT field. */
+#define PWM_LOOP_CNT_Disabled (0UL) /*!< Looping disabled (stop at the end of the sequence) */
+
+/* Register: PWM_SEQ_PTR */
+/* Description: Description cluster: Beginning address in RAM of this sequence */
+
+/* Bits 31..0 : Beginning address in RAM of this sequence */
+#define PWM_SEQ_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define PWM_SEQ_PTR_PTR_Msk (0xFFFFFFFFUL << PWM_SEQ_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: PWM_SEQ_CNT */
+/* Description: Description cluster: Number of values (duty cycles) in this sequence */
+
+/* Bits 14..0 : Number of values (duty cycles) in this sequence */
+#define PWM_SEQ_CNT_CNT_Pos (0UL) /*!< Position of CNT field. */
+#define PWM_SEQ_CNT_CNT_Msk (0x7FFFUL << PWM_SEQ_CNT_CNT_Pos) /*!< Bit mask of CNT field. */
+#define PWM_SEQ_CNT_CNT_Disabled (0UL) /*!< Sequence is disabled, and shall not be started as it is empty */
+
+/* Register: PWM_SEQ_REFRESH */
+/* Description: Description cluster: Number of additional PWM periods between samples loaded into compare register */
+
+/* Bits 23..0 : Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods) */
+#define PWM_SEQ_REFRESH_CNT_Pos (0UL) /*!< Position of CNT field. */
+#define PWM_SEQ_REFRESH_CNT_Msk (0xFFFFFFUL << PWM_SEQ_REFRESH_CNT_Pos) /*!< Bit mask of CNT field. */
+#define PWM_SEQ_REFRESH_CNT_Continuous (0UL) /*!< Update every PWM period */
+
+/* Register: PWM_SEQ_ENDDELAY */
+/* Description: Description cluster: Time added after the sequence */
+
+/* Bits 23..0 : Time added after the sequence in PWM periods */
+#define PWM_SEQ_ENDDELAY_CNT_Pos (0UL) /*!< Position of CNT field. */
+#define PWM_SEQ_ENDDELAY_CNT_Msk (0xFFFFFFUL << PWM_SEQ_ENDDELAY_CNT_Pos) /*!< Bit mask of CNT field. */
+
+/* Register: PWM_PSEL_OUT */
+/* Description: Description collection: Output pin select for PWM channel n */
+
+/* Bit 31 : Connection */
+#define PWM_PSEL_OUT_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define PWM_PSEL_OUT_CONNECT_Msk (0x1UL << PWM_PSEL_OUT_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define PWM_PSEL_OUT_CONNECT_Connected (0UL) /*!< Connect */
+#define PWM_PSEL_OUT_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define PWM_PSEL_OUT_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define PWM_PSEL_OUT_PORT_Msk (0x1UL << PWM_PSEL_OUT_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define PWM_PSEL_OUT_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define PWM_PSEL_OUT_PIN_Msk (0x1FUL << PWM_PSEL_OUT_PIN_Pos) /*!< Bit mask of PIN field. */
+
+
+/* Peripheral: QDEC */
+/* Description: Quadrature Decoder */
+
+/* Register: QDEC_TASKS_START */
+/* Description: Task starting the quadrature decoder */
+
+/* Bit 0 : Task starting the quadrature decoder */
+#define QDEC_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */
+#define QDEC_TASKS_START_TASKS_START_Msk (0x1UL << QDEC_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */
+#define QDEC_TASKS_START_TASKS_START_Trigger (1UL) /*!< Trigger task */
+
+/* Register: QDEC_TASKS_STOP */
+/* Description: Task stopping the quadrature decoder */
+
+/* Bit 0 : Task stopping the quadrature decoder */
+#define QDEC_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define QDEC_TASKS_STOP_TASKS_STOP_Msk (0x1UL << QDEC_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define QDEC_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: QDEC_TASKS_READCLRACC */
+/* Description: Read and clear ACC and ACCDBL */
+
+/* Bit 0 : Read and clear ACC and ACCDBL */
+#define QDEC_TASKS_READCLRACC_TASKS_READCLRACC_Pos (0UL) /*!< Position of TASKS_READCLRACC field. */
+#define QDEC_TASKS_READCLRACC_TASKS_READCLRACC_Msk (0x1UL << QDEC_TASKS_READCLRACC_TASKS_READCLRACC_Pos) /*!< Bit mask of TASKS_READCLRACC field. */
+#define QDEC_TASKS_READCLRACC_TASKS_READCLRACC_Trigger (1UL) /*!< Trigger task */
+
+/* Register: QDEC_TASKS_RDCLRACC */
+/* Description: Read and clear ACC */
+
+/* Bit 0 : Read and clear ACC */
+#define QDEC_TASKS_RDCLRACC_TASKS_RDCLRACC_Pos (0UL) /*!< Position of TASKS_RDCLRACC field. */
+#define QDEC_TASKS_RDCLRACC_TASKS_RDCLRACC_Msk (0x1UL << QDEC_TASKS_RDCLRACC_TASKS_RDCLRACC_Pos) /*!< Bit mask of TASKS_RDCLRACC field. */
+#define QDEC_TASKS_RDCLRACC_TASKS_RDCLRACC_Trigger (1UL) /*!< Trigger task */
+
+/* Register: QDEC_TASKS_RDCLRDBL */
+/* Description: Read and clear ACCDBL */
+
+/* Bit 0 : Read and clear ACCDBL */
+#define QDEC_TASKS_RDCLRDBL_TASKS_RDCLRDBL_Pos (0UL) /*!< Position of TASKS_RDCLRDBL field. */
+#define QDEC_TASKS_RDCLRDBL_TASKS_RDCLRDBL_Msk (0x1UL << QDEC_TASKS_RDCLRDBL_TASKS_RDCLRDBL_Pos) /*!< Bit mask of TASKS_RDCLRDBL field. */
+#define QDEC_TASKS_RDCLRDBL_TASKS_RDCLRDBL_Trigger (1UL) /*!< Trigger task */
+
+/* Register: QDEC_EVENTS_SAMPLERDY */
+/* Description: Event being generated for every new sample value written to the SAMPLE register */
+
+/* Bit 0 : Event being generated for every new sample value written to the SAMPLE register */
+#define QDEC_EVENTS_SAMPLERDY_EVENTS_SAMPLERDY_Pos (0UL) /*!< Position of EVENTS_SAMPLERDY field. */
+#define QDEC_EVENTS_SAMPLERDY_EVENTS_SAMPLERDY_Msk (0x1UL << QDEC_EVENTS_SAMPLERDY_EVENTS_SAMPLERDY_Pos) /*!< Bit mask of EVENTS_SAMPLERDY field. */
+#define QDEC_EVENTS_SAMPLERDY_EVENTS_SAMPLERDY_NotGenerated (0UL) /*!< Event not generated */
+#define QDEC_EVENTS_SAMPLERDY_EVENTS_SAMPLERDY_Generated (1UL) /*!< Event generated */
+
+/* Register: QDEC_EVENTS_REPORTRDY */
+/* Description: Non-null report ready */
+
+/* Bit 0 : Non-null report ready */
+#define QDEC_EVENTS_REPORTRDY_EVENTS_REPORTRDY_Pos (0UL) /*!< Position of EVENTS_REPORTRDY field. */
+#define QDEC_EVENTS_REPORTRDY_EVENTS_REPORTRDY_Msk (0x1UL << QDEC_EVENTS_REPORTRDY_EVENTS_REPORTRDY_Pos) /*!< Bit mask of EVENTS_REPORTRDY field. */
+#define QDEC_EVENTS_REPORTRDY_EVENTS_REPORTRDY_NotGenerated (0UL) /*!< Event not generated */
+#define QDEC_EVENTS_REPORTRDY_EVENTS_REPORTRDY_Generated (1UL) /*!< Event generated */
+
+/* Register: QDEC_EVENTS_ACCOF */
+/* Description: ACC or ACCDBL register overflow */
+
+/* Bit 0 : ACC or ACCDBL register overflow */
+#define QDEC_EVENTS_ACCOF_EVENTS_ACCOF_Pos (0UL) /*!< Position of EVENTS_ACCOF field. */
+#define QDEC_EVENTS_ACCOF_EVENTS_ACCOF_Msk (0x1UL << QDEC_EVENTS_ACCOF_EVENTS_ACCOF_Pos) /*!< Bit mask of EVENTS_ACCOF field. */
+#define QDEC_EVENTS_ACCOF_EVENTS_ACCOF_NotGenerated (0UL) /*!< Event not generated */
+#define QDEC_EVENTS_ACCOF_EVENTS_ACCOF_Generated (1UL) /*!< Event generated */
+
+/* Register: QDEC_EVENTS_DBLRDY */
+/* Description: Double displacement(s) detected */
+
+/* Bit 0 : Double displacement(s) detected */
+#define QDEC_EVENTS_DBLRDY_EVENTS_DBLRDY_Pos (0UL) /*!< Position of EVENTS_DBLRDY field. */
+#define QDEC_EVENTS_DBLRDY_EVENTS_DBLRDY_Msk (0x1UL << QDEC_EVENTS_DBLRDY_EVENTS_DBLRDY_Pos) /*!< Bit mask of EVENTS_DBLRDY field. */
+#define QDEC_EVENTS_DBLRDY_EVENTS_DBLRDY_NotGenerated (0UL) /*!< Event not generated */
+#define QDEC_EVENTS_DBLRDY_EVENTS_DBLRDY_Generated (1UL) /*!< Event generated */
+
+/* Register: QDEC_EVENTS_STOPPED */
+/* Description: QDEC has been stopped */
+
+/* Bit 0 : QDEC has been stopped */
+#define QDEC_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */
+#define QDEC_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << QDEC_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */
+#define QDEC_EVENTS_STOPPED_EVENTS_STOPPED_NotGenerated (0UL) /*!< Event not generated */
+#define QDEC_EVENTS_STOPPED_EVENTS_STOPPED_Generated (1UL) /*!< Event generated */
+
+/* Register: QDEC_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 6 : Shortcut between event SAMPLERDY and task READCLRACC */
+#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Pos (6UL) /*!< Position of SAMPLERDY_READCLRACC field. */
+#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Msk (0x1UL << QDEC_SHORTS_SAMPLERDY_READCLRACC_Pos) /*!< Bit mask of SAMPLERDY_READCLRACC field. */
+#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Disabled (0UL) /*!< Disable shortcut */
+#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 5 : Shortcut between event DBLRDY and task STOP */
+#define QDEC_SHORTS_DBLRDY_STOP_Pos (5UL) /*!< Position of DBLRDY_STOP field. */
+#define QDEC_SHORTS_DBLRDY_STOP_Msk (0x1UL << QDEC_SHORTS_DBLRDY_STOP_Pos) /*!< Bit mask of DBLRDY_STOP field. */
+#define QDEC_SHORTS_DBLRDY_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define QDEC_SHORTS_DBLRDY_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 4 : Shortcut between event DBLRDY and task RDCLRDBL */
+#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Pos (4UL) /*!< Position of DBLRDY_RDCLRDBL field. */
+#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Msk (0x1UL << QDEC_SHORTS_DBLRDY_RDCLRDBL_Pos) /*!< Bit mask of DBLRDY_RDCLRDBL field. */
+#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Disabled (0UL) /*!< Disable shortcut */
+#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 3 : Shortcut between event REPORTRDY and task STOP */
+#define QDEC_SHORTS_REPORTRDY_STOP_Pos (3UL) /*!< Position of REPORTRDY_STOP field. */
+#define QDEC_SHORTS_REPORTRDY_STOP_Msk (0x1UL << QDEC_SHORTS_REPORTRDY_STOP_Pos) /*!< Bit mask of REPORTRDY_STOP field. */
+#define QDEC_SHORTS_REPORTRDY_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define QDEC_SHORTS_REPORTRDY_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 2 : Shortcut between event REPORTRDY and task RDCLRACC */
+#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Pos (2UL) /*!< Position of REPORTRDY_RDCLRACC field. */
+#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Msk (0x1UL << QDEC_SHORTS_REPORTRDY_RDCLRACC_Pos) /*!< Bit mask of REPORTRDY_RDCLRACC field. */
+#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Disabled (0UL) /*!< Disable shortcut */
+#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 1 : Shortcut between event SAMPLERDY and task STOP */
+#define QDEC_SHORTS_SAMPLERDY_STOP_Pos (1UL) /*!< Position of SAMPLERDY_STOP field. */
+#define QDEC_SHORTS_SAMPLERDY_STOP_Msk (0x1UL << QDEC_SHORTS_SAMPLERDY_STOP_Pos) /*!< Bit mask of SAMPLERDY_STOP field. */
+#define QDEC_SHORTS_SAMPLERDY_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define QDEC_SHORTS_SAMPLERDY_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 0 : Shortcut between event REPORTRDY and task READCLRACC */
+#define QDEC_SHORTS_REPORTRDY_READCLRACC_Pos (0UL) /*!< Position of REPORTRDY_READCLRACC field. */
+#define QDEC_SHORTS_REPORTRDY_READCLRACC_Msk (0x1UL << QDEC_SHORTS_REPORTRDY_READCLRACC_Pos) /*!< Bit mask of REPORTRDY_READCLRACC field. */
+#define QDEC_SHORTS_REPORTRDY_READCLRACC_Disabled (0UL) /*!< Disable shortcut */
+#define QDEC_SHORTS_REPORTRDY_READCLRACC_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: QDEC_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 4 : Write '1' to enable interrupt for event STOPPED */
+#define QDEC_INTENSET_STOPPED_Pos (4UL) /*!< Position of STOPPED field. */
+#define QDEC_INTENSET_STOPPED_Msk (0x1UL << QDEC_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define QDEC_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define QDEC_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define QDEC_INTENSET_STOPPED_Set (1UL) /*!< Enable */
+
+/* Bit 3 : Write '1' to enable interrupt for event DBLRDY */
+#define QDEC_INTENSET_DBLRDY_Pos (3UL) /*!< Position of DBLRDY field. */
+#define QDEC_INTENSET_DBLRDY_Msk (0x1UL << QDEC_INTENSET_DBLRDY_Pos) /*!< Bit mask of DBLRDY field. */
+#define QDEC_INTENSET_DBLRDY_Disabled (0UL) /*!< Read: Disabled */
+#define QDEC_INTENSET_DBLRDY_Enabled (1UL) /*!< Read: Enabled */
+#define QDEC_INTENSET_DBLRDY_Set (1UL) /*!< Enable */
+
+/* Bit 2 : Write '1' to enable interrupt for event ACCOF */
+#define QDEC_INTENSET_ACCOF_Pos (2UL) /*!< Position of ACCOF field. */
+#define QDEC_INTENSET_ACCOF_Msk (0x1UL << QDEC_INTENSET_ACCOF_Pos) /*!< Bit mask of ACCOF field. */
+#define QDEC_INTENSET_ACCOF_Disabled (0UL) /*!< Read: Disabled */
+#define QDEC_INTENSET_ACCOF_Enabled (1UL) /*!< Read: Enabled */
+#define QDEC_INTENSET_ACCOF_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event REPORTRDY */
+#define QDEC_INTENSET_REPORTRDY_Pos (1UL) /*!< Position of REPORTRDY field. */
+#define QDEC_INTENSET_REPORTRDY_Msk (0x1UL << QDEC_INTENSET_REPORTRDY_Pos) /*!< Bit mask of REPORTRDY field. */
+#define QDEC_INTENSET_REPORTRDY_Disabled (0UL) /*!< Read: Disabled */
+#define QDEC_INTENSET_REPORTRDY_Enabled (1UL) /*!< Read: Enabled */
+#define QDEC_INTENSET_REPORTRDY_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event SAMPLERDY */
+#define QDEC_INTENSET_SAMPLERDY_Pos (0UL) /*!< Position of SAMPLERDY field. */
+#define QDEC_INTENSET_SAMPLERDY_Msk (0x1UL << QDEC_INTENSET_SAMPLERDY_Pos) /*!< Bit mask of SAMPLERDY field. */
+#define QDEC_INTENSET_SAMPLERDY_Disabled (0UL) /*!< Read: Disabled */
+#define QDEC_INTENSET_SAMPLERDY_Enabled (1UL) /*!< Read: Enabled */
+#define QDEC_INTENSET_SAMPLERDY_Set (1UL) /*!< Enable */
+
+/* Register: QDEC_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 4 : Write '1' to disable interrupt for event STOPPED */
+#define QDEC_INTENCLR_STOPPED_Pos (4UL) /*!< Position of STOPPED field. */
+#define QDEC_INTENCLR_STOPPED_Msk (0x1UL << QDEC_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define QDEC_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define QDEC_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define QDEC_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */
+
+/* Bit 3 : Write '1' to disable interrupt for event DBLRDY */
+#define QDEC_INTENCLR_DBLRDY_Pos (3UL) /*!< Position of DBLRDY field. */
+#define QDEC_INTENCLR_DBLRDY_Msk (0x1UL << QDEC_INTENCLR_DBLRDY_Pos) /*!< Bit mask of DBLRDY field. */
+#define QDEC_INTENCLR_DBLRDY_Disabled (0UL) /*!< Read: Disabled */
+#define QDEC_INTENCLR_DBLRDY_Enabled (1UL) /*!< Read: Enabled */
+#define QDEC_INTENCLR_DBLRDY_Clear (1UL) /*!< Disable */
+
+/* Bit 2 : Write '1' to disable interrupt for event ACCOF */
+#define QDEC_INTENCLR_ACCOF_Pos (2UL) /*!< Position of ACCOF field. */
+#define QDEC_INTENCLR_ACCOF_Msk (0x1UL << QDEC_INTENCLR_ACCOF_Pos) /*!< Bit mask of ACCOF field. */
+#define QDEC_INTENCLR_ACCOF_Disabled (0UL) /*!< Read: Disabled */
+#define QDEC_INTENCLR_ACCOF_Enabled (1UL) /*!< Read: Enabled */
+#define QDEC_INTENCLR_ACCOF_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event REPORTRDY */
+#define QDEC_INTENCLR_REPORTRDY_Pos (1UL) /*!< Position of REPORTRDY field. */
+#define QDEC_INTENCLR_REPORTRDY_Msk (0x1UL << QDEC_INTENCLR_REPORTRDY_Pos) /*!< Bit mask of REPORTRDY field. */
+#define QDEC_INTENCLR_REPORTRDY_Disabled (0UL) /*!< Read: Disabled */
+#define QDEC_INTENCLR_REPORTRDY_Enabled (1UL) /*!< Read: Enabled */
+#define QDEC_INTENCLR_REPORTRDY_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event SAMPLERDY */
+#define QDEC_INTENCLR_SAMPLERDY_Pos (0UL) /*!< Position of SAMPLERDY field. */
+#define QDEC_INTENCLR_SAMPLERDY_Msk (0x1UL << QDEC_INTENCLR_SAMPLERDY_Pos) /*!< Bit mask of SAMPLERDY field. */
+#define QDEC_INTENCLR_SAMPLERDY_Disabled (0UL) /*!< Read: Disabled */
+#define QDEC_INTENCLR_SAMPLERDY_Enabled (1UL) /*!< Read: Enabled */
+#define QDEC_INTENCLR_SAMPLERDY_Clear (1UL) /*!< Disable */
+
+/* Register: QDEC_ENABLE */
+/* Description: Enable the quadrature decoder */
+
+/* Bit 0 : Enable or disable the quadrature decoder */
+#define QDEC_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define QDEC_ENABLE_ENABLE_Msk (0x1UL << QDEC_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define QDEC_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */
+#define QDEC_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */
+
+/* Register: QDEC_LEDPOL */
+/* Description: LED output pin polarity */
+
+/* Bit 0 : LED output pin polarity */
+#define QDEC_LEDPOL_LEDPOL_Pos (0UL) /*!< Position of LEDPOL field. */
+#define QDEC_LEDPOL_LEDPOL_Msk (0x1UL << QDEC_LEDPOL_LEDPOL_Pos) /*!< Bit mask of LEDPOL field. */
+#define QDEC_LEDPOL_LEDPOL_ActiveLow (0UL) /*!< Led active on output pin low */
+#define QDEC_LEDPOL_LEDPOL_ActiveHigh (1UL) /*!< Led active on output pin high */
+
+/* Register: QDEC_SAMPLEPER */
+/* Description: Sample period */
+
+/* Bits 3..0 : Sample period. The SAMPLE register will be updated for every new sample */
+#define QDEC_SAMPLEPER_SAMPLEPER_Pos (0UL) /*!< Position of SAMPLEPER field. */
+#define QDEC_SAMPLEPER_SAMPLEPER_Msk (0xFUL << QDEC_SAMPLEPER_SAMPLEPER_Pos) /*!< Bit mask of SAMPLEPER field. */
+#define QDEC_SAMPLEPER_SAMPLEPER_128us (0UL) /*!< 128 us */
+#define QDEC_SAMPLEPER_SAMPLEPER_256us (1UL) /*!< 256 us */
+#define QDEC_SAMPLEPER_SAMPLEPER_512us (2UL) /*!< 512 us */
+#define QDEC_SAMPLEPER_SAMPLEPER_1024us (3UL) /*!< 1024 us */
+#define QDEC_SAMPLEPER_SAMPLEPER_2048us (4UL) /*!< 2048 us */
+#define QDEC_SAMPLEPER_SAMPLEPER_4096us (5UL) /*!< 4096 us */
+#define QDEC_SAMPLEPER_SAMPLEPER_8192us (6UL) /*!< 8192 us */
+#define QDEC_SAMPLEPER_SAMPLEPER_16384us (7UL) /*!< 16384 us */
+#define QDEC_SAMPLEPER_SAMPLEPER_32ms (8UL) /*!< 32768 us */
+#define QDEC_SAMPLEPER_SAMPLEPER_65ms (9UL) /*!< 65536 us */
+#define QDEC_SAMPLEPER_SAMPLEPER_131ms (10UL) /*!< 131072 us */
+
+/* Register: QDEC_SAMPLE */
+/* Description: Motion sample value */
+
+/* Bits 31..0 : Last motion sample */
+#define QDEC_SAMPLE_SAMPLE_Pos (0UL) /*!< Position of SAMPLE field. */
+#define QDEC_SAMPLE_SAMPLE_Msk (0xFFFFFFFFUL << QDEC_SAMPLE_SAMPLE_Pos) /*!< Bit mask of SAMPLE field. */
+
+/* Register: QDEC_REPORTPER */
+/* Description: Number of samples to be taken before REPORTRDY and DBLRDY events can be generated */
+
+/* Bits 3..0 : Specifies the number of samples to be accumulated in the ACC register before the REPORTRDY and DBLRDY events can be generated */
+#define QDEC_REPORTPER_REPORTPER_Pos (0UL) /*!< Position of REPORTPER field. */
+#define QDEC_REPORTPER_REPORTPER_Msk (0xFUL << QDEC_REPORTPER_REPORTPER_Pos) /*!< Bit mask of REPORTPER field. */
+#define QDEC_REPORTPER_REPORTPER_10Smpl (0UL) /*!< 10 samples / report */
+#define QDEC_REPORTPER_REPORTPER_40Smpl (1UL) /*!< 40 samples / report */
+#define QDEC_REPORTPER_REPORTPER_80Smpl (2UL) /*!< 80 samples / report */
+#define QDEC_REPORTPER_REPORTPER_120Smpl (3UL) /*!< 120 samples / report */
+#define QDEC_REPORTPER_REPORTPER_160Smpl (4UL) /*!< 160 samples / report */
+#define QDEC_REPORTPER_REPORTPER_200Smpl (5UL) /*!< 200 samples / report */
+#define QDEC_REPORTPER_REPORTPER_240Smpl (6UL) /*!< 240 samples / report */
+#define QDEC_REPORTPER_REPORTPER_280Smpl (7UL) /*!< 280 samples / report */
+#define QDEC_REPORTPER_REPORTPER_1Smpl (8UL) /*!< 1 sample / report */
+
+/* Register: QDEC_ACC */
+/* Description: Register accumulating the valid transitions */
+
+/* Bits 31..0 : Register accumulating all valid samples (not double transition) read from the SAMPLE register */
+#define QDEC_ACC_ACC_Pos (0UL) /*!< Position of ACC field. */
+#define QDEC_ACC_ACC_Msk (0xFFFFFFFFUL << QDEC_ACC_ACC_Pos) /*!< Bit mask of ACC field. */
+
+/* Register: QDEC_ACCREAD */
+/* Description: Snapshot of the ACC register, updated by the READCLRACC or RDCLRACC task */
+
+/* Bits 31..0 : Snapshot of the ACC register. */
+#define QDEC_ACCREAD_ACCREAD_Pos (0UL) /*!< Position of ACCREAD field. */
+#define QDEC_ACCREAD_ACCREAD_Msk (0xFFFFFFFFUL << QDEC_ACCREAD_ACCREAD_Pos) /*!< Bit mask of ACCREAD field. */
+
+/* Register: QDEC_PSEL_LED */
+/* Description: Pin select for LED signal */
+
+/* Bit 31 : Connection */
+#define QDEC_PSEL_LED_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define QDEC_PSEL_LED_CONNECT_Msk (0x1UL << QDEC_PSEL_LED_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define QDEC_PSEL_LED_CONNECT_Connected (0UL) /*!< Connect */
+#define QDEC_PSEL_LED_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define QDEC_PSEL_LED_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define QDEC_PSEL_LED_PORT_Msk (0x1UL << QDEC_PSEL_LED_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define QDEC_PSEL_LED_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define QDEC_PSEL_LED_PIN_Msk (0x1FUL << QDEC_PSEL_LED_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: QDEC_PSEL_A */
+/* Description: Pin select for A signal */
+
+/* Bit 31 : Connection */
+#define QDEC_PSEL_A_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define QDEC_PSEL_A_CONNECT_Msk (0x1UL << QDEC_PSEL_A_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define QDEC_PSEL_A_CONNECT_Connected (0UL) /*!< Connect */
+#define QDEC_PSEL_A_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define QDEC_PSEL_A_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define QDEC_PSEL_A_PORT_Msk (0x1UL << QDEC_PSEL_A_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define QDEC_PSEL_A_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define QDEC_PSEL_A_PIN_Msk (0x1FUL << QDEC_PSEL_A_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: QDEC_PSEL_B */
+/* Description: Pin select for B signal */
+
+/* Bit 31 : Connection */
+#define QDEC_PSEL_B_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define QDEC_PSEL_B_CONNECT_Msk (0x1UL << QDEC_PSEL_B_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define QDEC_PSEL_B_CONNECT_Connected (0UL) /*!< Connect */
+#define QDEC_PSEL_B_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define QDEC_PSEL_B_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define QDEC_PSEL_B_PORT_Msk (0x1UL << QDEC_PSEL_B_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define QDEC_PSEL_B_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define QDEC_PSEL_B_PIN_Msk (0x1FUL << QDEC_PSEL_B_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: QDEC_DBFEN */
+/* Description: Enable input debounce filters */
+
+/* Bit 0 : Enable input debounce filters */
+#define QDEC_DBFEN_DBFEN_Pos (0UL) /*!< Position of DBFEN field. */
+#define QDEC_DBFEN_DBFEN_Msk (0x1UL << QDEC_DBFEN_DBFEN_Pos) /*!< Bit mask of DBFEN field. */
+#define QDEC_DBFEN_DBFEN_Disabled (0UL) /*!< Debounce input filters disabled */
+#define QDEC_DBFEN_DBFEN_Enabled (1UL) /*!< Debounce input filters enabled */
+
+/* Register: QDEC_LEDPRE */
+/* Description: Time period the LED is switched ON prior to sampling */
+
+/* Bits 8..0 : Period in us the LED is switched on prior to sampling */
+#define QDEC_LEDPRE_LEDPRE_Pos (0UL) /*!< Position of LEDPRE field. */
+#define QDEC_LEDPRE_LEDPRE_Msk (0x1FFUL << QDEC_LEDPRE_LEDPRE_Pos) /*!< Bit mask of LEDPRE field. */
+
+/* Register: QDEC_ACCDBL */
+/* Description: Register accumulating the number of detected double transitions */
+
+/* Bits 3..0 : Register accumulating the number of detected double or illegal transitions. ( SAMPLE = 2 ). */
+#define QDEC_ACCDBL_ACCDBL_Pos (0UL) /*!< Position of ACCDBL field. */
+#define QDEC_ACCDBL_ACCDBL_Msk (0xFUL << QDEC_ACCDBL_ACCDBL_Pos) /*!< Bit mask of ACCDBL field. */
+
+/* Register: QDEC_ACCDBLREAD */
+/* Description: Snapshot of the ACCDBL, updated by the READCLRACC or RDCLRDBL task */
+
+/* Bits 3..0 : Snapshot of the ACCDBL register. This field is updated when the READCLRACC or RDCLRDBL task is triggered. */
+#define QDEC_ACCDBLREAD_ACCDBLREAD_Pos (0UL) /*!< Position of ACCDBLREAD field. */
+#define QDEC_ACCDBLREAD_ACCDBLREAD_Msk (0xFUL << QDEC_ACCDBLREAD_ACCDBLREAD_Pos) /*!< Bit mask of ACCDBLREAD field. */
+
+
+/* Peripheral: RADIO */
+/* Description: 2.4 GHz radio */
+
+/* Register: RADIO_TASKS_TXEN */
+/* Description: Enable RADIO in TX mode */
+
+/* Bit 0 : Enable RADIO in TX mode */
+#define RADIO_TASKS_TXEN_TASKS_TXEN_Pos (0UL) /*!< Position of TASKS_TXEN field. */
+#define RADIO_TASKS_TXEN_TASKS_TXEN_Msk (0x1UL << RADIO_TASKS_TXEN_TASKS_TXEN_Pos) /*!< Bit mask of TASKS_TXEN field. */
+#define RADIO_TASKS_TXEN_TASKS_TXEN_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RADIO_TASKS_RXEN */
+/* Description: Enable RADIO in RX mode */
+
+/* Bit 0 : Enable RADIO in RX mode */
+#define RADIO_TASKS_RXEN_TASKS_RXEN_Pos (0UL) /*!< Position of TASKS_RXEN field. */
+#define RADIO_TASKS_RXEN_TASKS_RXEN_Msk (0x1UL << RADIO_TASKS_RXEN_TASKS_RXEN_Pos) /*!< Bit mask of TASKS_RXEN field. */
+#define RADIO_TASKS_RXEN_TASKS_RXEN_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RADIO_TASKS_START */
+/* Description: Start RADIO */
+
+/* Bit 0 : Start RADIO */
+#define RADIO_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */
+#define RADIO_TASKS_START_TASKS_START_Msk (0x1UL << RADIO_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */
+#define RADIO_TASKS_START_TASKS_START_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RADIO_TASKS_STOP */
+/* Description: Stop RADIO */
+
+/* Bit 0 : Stop RADIO */
+#define RADIO_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define RADIO_TASKS_STOP_TASKS_STOP_Msk (0x1UL << RADIO_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define RADIO_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RADIO_TASKS_DISABLE */
+/* Description: Disable RADIO */
+
+/* Bit 0 : Disable RADIO */
+#define RADIO_TASKS_DISABLE_TASKS_DISABLE_Pos (0UL) /*!< Position of TASKS_DISABLE field. */
+#define RADIO_TASKS_DISABLE_TASKS_DISABLE_Msk (0x1UL << RADIO_TASKS_DISABLE_TASKS_DISABLE_Pos) /*!< Bit mask of TASKS_DISABLE field. */
+#define RADIO_TASKS_DISABLE_TASKS_DISABLE_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RADIO_TASKS_RSSISTART */
+/* Description: Start the RSSI and take one single sample of the receive signal strength */
+
+/* Bit 0 : Start the RSSI and take one single sample of the receive signal strength */
+#define RADIO_TASKS_RSSISTART_TASKS_RSSISTART_Pos (0UL) /*!< Position of TASKS_RSSISTART field. */
+#define RADIO_TASKS_RSSISTART_TASKS_RSSISTART_Msk (0x1UL << RADIO_TASKS_RSSISTART_TASKS_RSSISTART_Pos) /*!< Bit mask of TASKS_RSSISTART field. */
+#define RADIO_TASKS_RSSISTART_TASKS_RSSISTART_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RADIO_TASKS_RSSISTOP */
+/* Description: Stop the RSSI measurement */
+
+/* Bit 0 : Stop the RSSI measurement */
+#define RADIO_TASKS_RSSISTOP_TASKS_RSSISTOP_Pos (0UL) /*!< Position of TASKS_RSSISTOP field. */
+#define RADIO_TASKS_RSSISTOP_TASKS_RSSISTOP_Msk (0x1UL << RADIO_TASKS_RSSISTOP_TASKS_RSSISTOP_Pos) /*!< Bit mask of TASKS_RSSISTOP field. */
+#define RADIO_TASKS_RSSISTOP_TASKS_RSSISTOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RADIO_TASKS_BCSTART */
+/* Description: Start the bit counter */
+
+/* Bit 0 : Start the bit counter */
+#define RADIO_TASKS_BCSTART_TASKS_BCSTART_Pos (0UL) /*!< Position of TASKS_BCSTART field. */
+#define RADIO_TASKS_BCSTART_TASKS_BCSTART_Msk (0x1UL << RADIO_TASKS_BCSTART_TASKS_BCSTART_Pos) /*!< Bit mask of TASKS_BCSTART field. */
+#define RADIO_TASKS_BCSTART_TASKS_BCSTART_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RADIO_TASKS_BCSTOP */
+/* Description: Stop the bit counter */
+
+/* Bit 0 : Stop the bit counter */
+#define RADIO_TASKS_BCSTOP_TASKS_BCSTOP_Pos (0UL) /*!< Position of TASKS_BCSTOP field. */
+#define RADIO_TASKS_BCSTOP_TASKS_BCSTOP_Msk (0x1UL << RADIO_TASKS_BCSTOP_TASKS_BCSTOP_Pos) /*!< Bit mask of TASKS_BCSTOP field. */
+#define RADIO_TASKS_BCSTOP_TASKS_BCSTOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RADIO_TASKS_EDSTART */
+/* Description: Start the energy detect measurement used in IEEE 802.15.4 mode */
+
+/* Bit 0 : Start the energy detect measurement used in IEEE 802.15.4 mode */
+#define RADIO_TASKS_EDSTART_TASKS_EDSTART_Pos (0UL) /*!< Position of TASKS_EDSTART field. */
+#define RADIO_TASKS_EDSTART_TASKS_EDSTART_Msk (0x1UL << RADIO_TASKS_EDSTART_TASKS_EDSTART_Pos) /*!< Bit mask of TASKS_EDSTART field. */
+#define RADIO_TASKS_EDSTART_TASKS_EDSTART_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RADIO_TASKS_EDSTOP */
+/* Description: Stop the energy detect measurement */
+
+/* Bit 0 : Stop the energy detect measurement */
+#define RADIO_TASKS_EDSTOP_TASKS_EDSTOP_Pos (0UL) /*!< Position of TASKS_EDSTOP field. */
+#define RADIO_TASKS_EDSTOP_TASKS_EDSTOP_Msk (0x1UL << RADIO_TASKS_EDSTOP_TASKS_EDSTOP_Pos) /*!< Bit mask of TASKS_EDSTOP field. */
+#define RADIO_TASKS_EDSTOP_TASKS_EDSTOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RADIO_TASKS_CCASTART */
+/* Description: Start the clear channel assessment used in IEEE 802.15.4 mode */
+
+/* Bit 0 : Start the clear channel assessment used in IEEE 802.15.4 mode */
+#define RADIO_TASKS_CCASTART_TASKS_CCASTART_Pos (0UL) /*!< Position of TASKS_CCASTART field. */
+#define RADIO_TASKS_CCASTART_TASKS_CCASTART_Msk (0x1UL << RADIO_TASKS_CCASTART_TASKS_CCASTART_Pos) /*!< Bit mask of TASKS_CCASTART field. */
+#define RADIO_TASKS_CCASTART_TASKS_CCASTART_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RADIO_TASKS_CCASTOP */
+/* Description: Stop the clear channel assessment */
+
+/* Bit 0 : Stop the clear channel assessment */
+#define RADIO_TASKS_CCASTOP_TASKS_CCASTOP_Pos (0UL) /*!< Position of TASKS_CCASTOP field. */
+#define RADIO_TASKS_CCASTOP_TASKS_CCASTOP_Msk (0x1UL << RADIO_TASKS_CCASTOP_TASKS_CCASTOP_Pos) /*!< Bit mask of TASKS_CCASTOP field. */
+#define RADIO_TASKS_CCASTOP_TASKS_CCASTOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RADIO_EVENTS_READY */
+/* Description: RADIO has ramped up and is ready to be started */
+
+/* Bit 0 : RADIO has ramped up and is ready to be started */
+#define RADIO_EVENTS_READY_EVENTS_READY_Pos (0UL) /*!< Position of EVENTS_READY field. */
+#define RADIO_EVENTS_READY_EVENTS_READY_Msk (0x1UL << RADIO_EVENTS_READY_EVENTS_READY_Pos) /*!< Bit mask of EVENTS_READY field. */
+#define RADIO_EVENTS_READY_EVENTS_READY_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_READY_EVENTS_READY_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_ADDRESS */
+/* Description: Address sent or received */
+
+/* Bit 0 : Address sent or received */
+#define RADIO_EVENTS_ADDRESS_EVENTS_ADDRESS_Pos (0UL) /*!< Position of EVENTS_ADDRESS field. */
+#define RADIO_EVENTS_ADDRESS_EVENTS_ADDRESS_Msk (0x1UL << RADIO_EVENTS_ADDRESS_EVENTS_ADDRESS_Pos) /*!< Bit mask of EVENTS_ADDRESS field. */
+#define RADIO_EVENTS_ADDRESS_EVENTS_ADDRESS_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_ADDRESS_EVENTS_ADDRESS_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_PAYLOAD */
+/* Description: Packet payload sent or received */
+
+/* Bit 0 : Packet payload sent or received */
+#define RADIO_EVENTS_PAYLOAD_EVENTS_PAYLOAD_Pos (0UL) /*!< Position of EVENTS_PAYLOAD field. */
+#define RADIO_EVENTS_PAYLOAD_EVENTS_PAYLOAD_Msk (0x1UL << RADIO_EVENTS_PAYLOAD_EVENTS_PAYLOAD_Pos) /*!< Bit mask of EVENTS_PAYLOAD field. */
+#define RADIO_EVENTS_PAYLOAD_EVENTS_PAYLOAD_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_PAYLOAD_EVENTS_PAYLOAD_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_END */
+/* Description: Packet sent or received */
+
+/* Bit 0 : Packet sent or received */
+#define RADIO_EVENTS_END_EVENTS_END_Pos (0UL) /*!< Position of EVENTS_END field. */
+#define RADIO_EVENTS_END_EVENTS_END_Msk (0x1UL << RADIO_EVENTS_END_EVENTS_END_Pos) /*!< Bit mask of EVENTS_END field. */
+#define RADIO_EVENTS_END_EVENTS_END_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_END_EVENTS_END_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_DISABLED */
+/* Description: RADIO has been disabled */
+
+/* Bit 0 : RADIO has been disabled */
+#define RADIO_EVENTS_DISABLED_EVENTS_DISABLED_Pos (0UL) /*!< Position of EVENTS_DISABLED field. */
+#define RADIO_EVENTS_DISABLED_EVENTS_DISABLED_Msk (0x1UL << RADIO_EVENTS_DISABLED_EVENTS_DISABLED_Pos) /*!< Bit mask of EVENTS_DISABLED field. */
+#define RADIO_EVENTS_DISABLED_EVENTS_DISABLED_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_DISABLED_EVENTS_DISABLED_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_DEVMATCH */
+/* Description: A device address match occurred on the last received packet */
+
+/* Bit 0 : A device address match occurred on the last received packet */
+#define RADIO_EVENTS_DEVMATCH_EVENTS_DEVMATCH_Pos (0UL) /*!< Position of EVENTS_DEVMATCH field. */
+#define RADIO_EVENTS_DEVMATCH_EVENTS_DEVMATCH_Msk (0x1UL << RADIO_EVENTS_DEVMATCH_EVENTS_DEVMATCH_Pos) /*!< Bit mask of EVENTS_DEVMATCH field. */
+#define RADIO_EVENTS_DEVMATCH_EVENTS_DEVMATCH_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_DEVMATCH_EVENTS_DEVMATCH_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_DEVMISS */
+/* Description: No device address match occurred on the last received packet */
+
+/* Bit 0 : No device address match occurred on the last received packet */
+#define RADIO_EVENTS_DEVMISS_EVENTS_DEVMISS_Pos (0UL) /*!< Position of EVENTS_DEVMISS field. */
+#define RADIO_EVENTS_DEVMISS_EVENTS_DEVMISS_Msk (0x1UL << RADIO_EVENTS_DEVMISS_EVENTS_DEVMISS_Pos) /*!< Bit mask of EVENTS_DEVMISS field. */
+#define RADIO_EVENTS_DEVMISS_EVENTS_DEVMISS_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_DEVMISS_EVENTS_DEVMISS_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_RSSIEND */
+/* Description: Sampling of receive signal strength complete */
+
+/* Bit 0 : Sampling of receive signal strength complete */
+#define RADIO_EVENTS_RSSIEND_EVENTS_RSSIEND_Pos (0UL) /*!< Position of EVENTS_RSSIEND field. */
+#define RADIO_EVENTS_RSSIEND_EVENTS_RSSIEND_Msk (0x1UL << RADIO_EVENTS_RSSIEND_EVENTS_RSSIEND_Pos) /*!< Bit mask of EVENTS_RSSIEND field. */
+#define RADIO_EVENTS_RSSIEND_EVENTS_RSSIEND_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_RSSIEND_EVENTS_RSSIEND_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_BCMATCH */
+/* Description: Bit counter reached bit count value */
+
+/* Bit 0 : Bit counter reached bit count value */
+#define RADIO_EVENTS_BCMATCH_EVENTS_BCMATCH_Pos (0UL) /*!< Position of EVENTS_BCMATCH field. */
+#define RADIO_EVENTS_BCMATCH_EVENTS_BCMATCH_Msk (0x1UL << RADIO_EVENTS_BCMATCH_EVENTS_BCMATCH_Pos) /*!< Bit mask of EVENTS_BCMATCH field. */
+#define RADIO_EVENTS_BCMATCH_EVENTS_BCMATCH_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_BCMATCH_EVENTS_BCMATCH_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_CRCOK */
+/* Description: Packet received with CRC ok */
+
+/* Bit 0 : Packet received with CRC ok */
+#define RADIO_EVENTS_CRCOK_EVENTS_CRCOK_Pos (0UL) /*!< Position of EVENTS_CRCOK field. */
+#define RADIO_EVENTS_CRCOK_EVENTS_CRCOK_Msk (0x1UL << RADIO_EVENTS_CRCOK_EVENTS_CRCOK_Pos) /*!< Bit mask of EVENTS_CRCOK field. */
+#define RADIO_EVENTS_CRCOK_EVENTS_CRCOK_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_CRCOK_EVENTS_CRCOK_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_CRCERROR */
+/* Description: Packet received with CRC error */
+
+/* Bit 0 : Packet received with CRC error */
+#define RADIO_EVENTS_CRCERROR_EVENTS_CRCERROR_Pos (0UL) /*!< Position of EVENTS_CRCERROR field. */
+#define RADIO_EVENTS_CRCERROR_EVENTS_CRCERROR_Msk (0x1UL << RADIO_EVENTS_CRCERROR_EVENTS_CRCERROR_Pos) /*!< Bit mask of EVENTS_CRCERROR field. */
+#define RADIO_EVENTS_CRCERROR_EVENTS_CRCERROR_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_CRCERROR_EVENTS_CRCERROR_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_FRAMESTART */
+/* Description: IEEE 802.15.4 length field received */
+
+/* Bit 0 : IEEE 802.15.4 length field received */
+#define RADIO_EVENTS_FRAMESTART_EVENTS_FRAMESTART_Pos (0UL) /*!< Position of EVENTS_FRAMESTART field. */
+#define RADIO_EVENTS_FRAMESTART_EVENTS_FRAMESTART_Msk (0x1UL << RADIO_EVENTS_FRAMESTART_EVENTS_FRAMESTART_Pos) /*!< Bit mask of EVENTS_FRAMESTART field. */
+#define RADIO_EVENTS_FRAMESTART_EVENTS_FRAMESTART_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_FRAMESTART_EVENTS_FRAMESTART_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_EDEND */
+/* Description: Sampling of energy detection complete. A new ED sample is ready for readout from the RADIO.EDSAMPLE register */
+
+/* Bit 0 : Sampling of energy detection complete. A new ED sample is ready for readout from the RADIO.EDSAMPLE register */
+#define RADIO_EVENTS_EDEND_EVENTS_EDEND_Pos (0UL) /*!< Position of EVENTS_EDEND field. */
+#define RADIO_EVENTS_EDEND_EVENTS_EDEND_Msk (0x1UL << RADIO_EVENTS_EDEND_EVENTS_EDEND_Pos) /*!< Bit mask of EVENTS_EDEND field. */
+#define RADIO_EVENTS_EDEND_EVENTS_EDEND_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_EDEND_EVENTS_EDEND_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_EDSTOPPED */
+/* Description: The sampling of energy detection has stopped */
+
+/* Bit 0 : The sampling of energy detection has stopped */
+#define RADIO_EVENTS_EDSTOPPED_EVENTS_EDSTOPPED_Pos (0UL) /*!< Position of EVENTS_EDSTOPPED field. */
+#define RADIO_EVENTS_EDSTOPPED_EVENTS_EDSTOPPED_Msk (0x1UL << RADIO_EVENTS_EDSTOPPED_EVENTS_EDSTOPPED_Pos) /*!< Bit mask of EVENTS_EDSTOPPED field. */
+#define RADIO_EVENTS_EDSTOPPED_EVENTS_EDSTOPPED_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_EDSTOPPED_EVENTS_EDSTOPPED_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_CCAIDLE */
+/* Description: Wireless medium in idle - clear to send */
+
+/* Bit 0 : Wireless medium in idle - clear to send */
+#define RADIO_EVENTS_CCAIDLE_EVENTS_CCAIDLE_Pos (0UL) /*!< Position of EVENTS_CCAIDLE field. */
+#define RADIO_EVENTS_CCAIDLE_EVENTS_CCAIDLE_Msk (0x1UL << RADIO_EVENTS_CCAIDLE_EVENTS_CCAIDLE_Pos) /*!< Bit mask of EVENTS_CCAIDLE field. */
+#define RADIO_EVENTS_CCAIDLE_EVENTS_CCAIDLE_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_CCAIDLE_EVENTS_CCAIDLE_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_CCABUSY */
+/* Description: Wireless medium busy - do not send */
+
+/* Bit 0 : Wireless medium busy - do not send */
+#define RADIO_EVENTS_CCABUSY_EVENTS_CCABUSY_Pos (0UL) /*!< Position of EVENTS_CCABUSY field. */
+#define RADIO_EVENTS_CCABUSY_EVENTS_CCABUSY_Msk (0x1UL << RADIO_EVENTS_CCABUSY_EVENTS_CCABUSY_Pos) /*!< Bit mask of EVENTS_CCABUSY field. */
+#define RADIO_EVENTS_CCABUSY_EVENTS_CCABUSY_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_CCABUSY_EVENTS_CCABUSY_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_CCASTOPPED */
+/* Description: The CCA has stopped */
+
+/* Bit 0 : The CCA has stopped */
+#define RADIO_EVENTS_CCASTOPPED_EVENTS_CCASTOPPED_Pos (0UL) /*!< Position of EVENTS_CCASTOPPED field. */
+#define RADIO_EVENTS_CCASTOPPED_EVENTS_CCASTOPPED_Msk (0x1UL << RADIO_EVENTS_CCASTOPPED_EVENTS_CCASTOPPED_Pos) /*!< Bit mask of EVENTS_CCASTOPPED field. */
+#define RADIO_EVENTS_CCASTOPPED_EVENTS_CCASTOPPED_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_CCASTOPPED_EVENTS_CCASTOPPED_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_RATEBOOST */
+/* Description: Ble_LR CI field received, receive mode is changed from Ble_LR125Kbit to Ble_LR500Kbit. */
+
+/* Bit 0 : Ble_LR CI field received, receive mode is changed from Ble_LR125Kbit to Ble_LR500Kbit. */
+#define RADIO_EVENTS_RATEBOOST_EVENTS_RATEBOOST_Pos (0UL) /*!< Position of EVENTS_RATEBOOST field. */
+#define RADIO_EVENTS_RATEBOOST_EVENTS_RATEBOOST_Msk (0x1UL << RADIO_EVENTS_RATEBOOST_EVENTS_RATEBOOST_Pos) /*!< Bit mask of EVENTS_RATEBOOST field. */
+#define RADIO_EVENTS_RATEBOOST_EVENTS_RATEBOOST_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_RATEBOOST_EVENTS_RATEBOOST_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_TXREADY */
+/* Description: RADIO has ramped up and is ready to be started TX path */
+
+/* Bit 0 : RADIO has ramped up and is ready to be started TX path */
+#define RADIO_EVENTS_TXREADY_EVENTS_TXREADY_Pos (0UL) /*!< Position of EVENTS_TXREADY field. */
+#define RADIO_EVENTS_TXREADY_EVENTS_TXREADY_Msk (0x1UL << RADIO_EVENTS_TXREADY_EVENTS_TXREADY_Pos) /*!< Bit mask of EVENTS_TXREADY field. */
+#define RADIO_EVENTS_TXREADY_EVENTS_TXREADY_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_TXREADY_EVENTS_TXREADY_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_RXREADY */
+/* Description: RADIO has ramped up and is ready to be started RX path */
+
+/* Bit 0 : RADIO has ramped up and is ready to be started RX path */
+#define RADIO_EVENTS_RXREADY_EVENTS_RXREADY_Pos (0UL) /*!< Position of EVENTS_RXREADY field. */
+#define RADIO_EVENTS_RXREADY_EVENTS_RXREADY_Msk (0x1UL << RADIO_EVENTS_RXREADY_EVENTS_RXREADY_Pos) /*!< Bit mask of EVENTS_RXREADY field. */
+#define RADIO_EVENTS_RXREADY_EVENTS_RXREADY_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_RXREADY_EVENTS_RXREADY_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_MHRMATCH */
+/* Description: MAC header match found */
+
+/* Bit 0 : MAC header match found */
+#define RADIO_EVENTS_MHRMATCH_EVENTS_MHRMATCH_Pos (0UL) /*!< Position of EVENTS_MHRMATCH field. */
+#define RADIO_EVENTS_MHRMATCH_EVENTS_MHRMATCH_Msk (0x1UL << RADIO_EVENTS_MHRMATCH_EVENTS_MHRMATCH_Pos) /*!< Bit mask of EVENTS_MHRMATCH field. */
+#define RADIO_EVENTS_MHRMATCH_EVENTS_MHRMATCH_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_MHRMATCH_EVENTS_MHRMATCH_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_PHYEND */
+/* Description: Generated when last bit is sent on air */
+
+/* Bit 0 : Generated when last bit is sent on air */
+#define RADIO_EVENTS_PHYEND_EVENTS_PHYEND_Pos (0UL) /*!< Position of EVENTS_PHYEND field. */
+#define RADIO_EVENTS_PHYEND_EVENTS_PHYEND_Msk (0x1UL << RADIO_EVENTS_PHYEND_EVENTS_PHYEND_Pos) /*!< Bit mask of EVENTS_PHYEND field. */
+#define RADIO_EVENTS_PHYEND_EVENTS_PHYEND_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_PHYEND_EVENTS_PHYEND_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_EVENTS_CTEPRESENT */
+/* Description: CTE is present (early warning right after receiving CTEInfo byte) */
+
+/* Bit 0 : CTE is present (early warning right after receiving CTEInfo byte) */
+#define RADIO_EVENTS_CTEPRESENT_EVENTS_CTEPRESENT_Pos (0UL) /*!< Position of EVENTS_CTEPRESENT field. */
+#define RADIO_EVENTS_CTEPRESENT_EVENTS_CTEPRESENT_Msk (0x1UL << RADIO_EVENTS_CTEPRESENT_EVENTS_CTEPRESENT_Pos) /*!< Bit mask of EVENTS_CTEPRESENT field. */
+#define RADIO_EVENTS_CTEPRESENT_EVENTS_CTEPRESENT_NotGenerated (0UL) /*!< Event not generated */
+#define RADIO_EVENTS_CTEPRESENT_EVENTS_CTEPRESENT_Generated (1UL) /*!< Event generated */
+
+/* Register: RADIO_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 21 : Shortcut between event PHYEND and task START */
+#define RADIO_SHORTS_PHYEND_START_Pos (21UL) /*!< Position of PHYEND_START field. */
+#define RADIO_SHORTS_PHYEND_START_Msk (0x1UL << RADIO_SHORTS_PHYEND_START_Pos) /*!< Bit mask of PHYEND_START field. */
+#define RADIO_SHORTS_PHYEND_START_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_PHYEND_START_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 20 : Shortcut between event PHYEND and task DISABLE */
+#define RADIO_SHORTS_PHYEND_DISABLE_Pos (20UL) /*!< Position of PHYEND_DISABLE field. */
+#define RADIO_SHORTS_PHYEND_DISABLE_Msk (0x1UL << RADIO_SHORTS_PHYEND_DISABLE_Pos) /*!< Bit mask of PHYEND_DISABLE field. */
+#define RADIO_SHORTS_PHYEND_DISABLE_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_PHYEND_DISABLE_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 19 : Shortcut between event RXREADY and task START */
+#define RADIO_SHORTS_RXREADY_START_Pos (19UL) /*!< Position of RXREADY_START field. */
+#define RADIO_SHORTS_RXREADY_START_Msk (0x1UL << RADIO_SHORTS_RXREADY_START_Pos) /*!< Bit mask of RXREADY_START field. */
+#define RADIO_SHORTS_RXREADY_START_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_RXREADY_START_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 18 : Shortcut between event TXREADY and task START */
+#define RADIO_SHORTS_TXREADY_START_Pos (18UL) /*!< Position of TXREADY_START field. */
+#define RADIO_SHORTS_TXREADY_START_Msk (0x1UL << RADIO_SHORTS_TXREADY_START_Pos) /*!< Bit mask of TXREADY_START field. */
+#define RADIO_SHORTS_TXREADY_START_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_TXREADY_START_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 17 : Shortcut between event CCAIDLE and task STOP */
+#define RADIO_SHORTS_CCAIDLE_STOP_Pos (17UL) /*!< Position of CCAIDLE_STOP field. */
+#define RADIO_SHORTS_CCAIDLE_STOP_Msk (0x1UL << RADIO_SHORTS_CCAIDLE_STOP_Pos) /*!< Bit mask of CCAIDLE_STOP field. */
+#define RADIO_SHORTS_CCAIDLE_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_CCAIDLE_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 16 : Shortcut between event EDEND and task DISABLE */
+#define RADIO_SHORTS_EDEND_DISABLE_Pos (16UL) /*!< Position of EDEND_DISABLE field. */
+#define RADIO_SHORTS_EDEND_DISABLE_Msk (0x1UL << RADIO_SHORTS_EDEND_DISABLE_Pos) /*!< Bit mask of EDEND_DISABLE field. */
+#define RADIO_SHORTS_EDEND_DISABLE_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_EDEND_DISABLE_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 15 : Shortcut between event READY and task EDSTART */
+#define RADIO_SHORTS_READY_EDSTART_Pos (15UL) /*!< Position of READY_EDSTART field. */
+#define RADIO_SHORTS_READY_EDSTART_Msk (0x1UL << RADIO_SHORTS_READY_EDSTART_Pos) /*!< Bit mask of READY_EDSTART field. */
+#define RADIO_SHORTS_READY_EDSTART_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_READY_EDSTART_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 14 : Shortcut between event FRAMESTART and task BCSTART */
+#define RADIO_SHORTS_FRAMESTART_BCSTART_Pos (14UL) /*!< Position of FRAMESTART_BCSTART field. */
+#define RADIO_SHORTS_FRAMESTART_BCSTART_Msk (0x1UL << RADIO_SHORTS_FRAMESTART_BCSTART_Pos) /*!< Bit mask of FRAMESTART_BCSTART field. */
+#define RADIO_SHORTS_FRAMESTART_BCSTART_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_FRAMESTART_BCSTART_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 13 : Shortcut between event CCABUSY and task DISABLE */
+#define RADIO_SHORTS_CCABUSY_DISABLE_Pos (13UL) /*!< Position of CCABUSY_DISABLE field. */
+#define RADIO_SHORTS_CCABUSY_DISABLE_Msk (0x1UL << RADIO_SHORTS_CCABUSY_DISABLE_Pos) /*!< Bit mask of CCABUSY_DISABLE field. */
+#define RADIO_SHORTS_CCABUSY_DISABLE_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_CCABUSY_DISABLE_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 12 : Shortcut between event CCAIDLE and task TXEN */
+#define RADIO_SHORTS_CCAIDLE_TXEN_Pos (12UL) /*!< Position of CCAIDLE_TXEN field. */
+#define RADIO_SHORTS_CCAIDLE_TXEN_Msk (0x1UL << RADIO_SHORTS_CCAIDLE_TXEN_Pos) /*!< Bit mask of CCAIDLE_TXEN field. */
+#define RADIO_SHORTS_CCAIDLE_TXEN_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_CCAIDLE_TXEN_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 11 : Shortcut between event RXREADY and task CCASTART */
+#define RADIO_SHORTS_RXREADY_CCASTART_Pos (11UL) /*!< Position of RXREADY_CCASTART field. */
+#define RADIO_SHORTS_RXREADY_CCASTART_Msk (0x1UL << RADIO_SHORTS_RXREADY_CCASTART_Pos) /*!< Bit mask of RXREADY_CCASTART field. */
+#define RADIO_SHORTS_RXREADY_CCASTART_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_RXREADY_CCASTART_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 8 : Shortcut between event DISABLED and task RSSISTOP */
+#define RADIO_SHORTS_DISABLED_RSSISTOP_Pos (8UL) /*!< Position of DISABLED_RSSISTOP field. */
+#define RADIO_SHORTS_DISABLED_RSSISTOP_Msk (0x1UL << RADIO_SHORTS_DISABLED_RSSISTOP_Pos) /*!< Bit mask of DISABLED_RSSISTOP field. */
+#define RADIO_SHORTS_DISABLED_RSSISTOP_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_DISABLED_RSSISTOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 6 : Shortcut between event ADDRESS and task BCSTART */
+#define RADIO_SHORTS_ADDRESS_BCSTART_Pos (6UL) /*!< Position of ADDRESS_BCSTART field. */
+#define RADIO_SHORTS_ADDRESS_BCSTART_Msk (0x1UL << RADIO_SHORTS_ADDRESS_BCSTART_Pos) /*!< Bit mask of ADDRESS_BCSTART field. */
+#define RADIO_SHORTS_ADDRESS_BCSTART_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_ADDRESS_BCSTART_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 5 : Shortcut between event END and task START */
+#define RADIO_SHORTS_END_START_Pos (5UL) /*!< Position of END_START field. */
+#define RADIO_SHORTS_END_START_Msk (0x1UL << RADIO_SHORTS_END_START_Pos) /*!< Bit mask of END_START field. */
+#define RADIO_SHORTS_END_START_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_END_START_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 4 : Shortcut between event ADDRESS and task RSSISTART */
+#define RADIO_SHORTS_ADDRESS_RSSISTART_Pos (4UL) /*!< Position of ADDRESS_RSSISTART field. */
+#define RADIO_SHORTS_ADDRESS_RSSISTART_Msk (0x1UL << RADIO_SHORTS_ADDRESS_RSSISTART_Pos) /*!< Bit mask of ADDRESS_RSSISTART field. */
+#define RADIO_SHORTS_ADDRESS_RSSISTART_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_ADDRESS_RSSISTART_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 3 : Shortcut between event DISABLED and task RXEN */
+#define RADIO_SHORTS_DISABLED_RXEN_Pos (3UL) /*!< Position of DISABLED_RXEN field. */
+#define RADIO_SHORTS_DISABLED_RXEN_Msk (0x1UL << RADIO_SHORTS_DISABLED_RXEN_Pos) /*!< Bit mask of DISABLED_RXEN field. */
+#define RADIO_SHORTS_DISABLED_RXEN_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_DISABLED_RXEN_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 2 : Shortcut between event DISABLED and task TXEN */
+#define RADIO_SHORTS_DISABLED_TXEN_Pos (2UL) /*!< Position of DISABLED_TXEN field. */
+#define RADIO_SHORTS_DISABLED_TXEN_Msk (0x1UL << RADIO_SHORTS_DISABLED_TXEN_Pos) /*!< Bit mask of DISABLED_TXEN field. */
+#define RADIO_SHORTS_DISABLED_TXEN_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_DISABLED_TXEN_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 1 : Shortcut between event END and task DISABLE */
+#define RADIO_SHORTS_END_DISABLE_Pos (1UL) /*!< Position of END_DISABLE field. */
+#define RADIO_SHORTS_END_DISABLE_Msk (0x1UL << RADIO_SHORTS_END_DISABLE_Pos) /*!< Bit mask of END_DISABLE field. */
+#define RADIO_SHORTS_END_DISABLE_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_END_DISABLE_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 0 : Shortcut between event READY and task START */
+#define RADIO_SHORTS_READY_START_Pos (0UL) /*!< Position of READY_START field. */
+#define RADIO_SHORTS_READY_START_Msk (0x1UL << RADIO_SHORTS_READY_START_Pos) /*!< Bit mask of READY_START field. */
+#define RADIO_SHORTS_READY_START_Disabled (0UL) /*!< Disable shortcut */
+#define RADIO_SHORTS_READY_START_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: RADIO_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 28 : Write '1' to enable interrupt for event CTEPRESENT */
+#define RADIO_INTENSET_CTEPRESENT_Pos (28UL) /*!< Position of CTEPRESENT field. */
+#define RADIO_INTENSET_CTEPRESENT_Msk (0x1UL << RADIO_INTENSET_CTEPRESENT_Pos) /*!< Bit mask of CTEPRESENT field. */
+#define RADIO_INTENSET_CTEPRESENT_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_CTEPRESENT_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_CTEPRESENT_Set (1UL) /*!< Enable */
+
+/* Bit 27 : Write '1' to enable interrupt for event PHYEND */
+#define RADIO_INTENSET_PHYEND_Pos (27UL) /*!< Position of PHYEND field. */
+#define RADIO_INTENSET_PHYEND_Msk (0x1UL << RADIO_INTENSET_PHYEND_Pos) /*!< Bit mask of PHYEND field. */
+#define RADIO_INTENSET_PHYEND_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_PHYEND_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_PHYEND_Set (1UL) /*!< Enable */
+
+/* Bit 23 : Write '1' to enable interrupt for event MHRMATCH */
+#define RADIO_INTENSET_MHRMATCH_Pos (23UL) /*!< Position of MHRMATCH field. */
+#define RADIO_INTENSET_MHRMATCH_Msk (0x1UL << RADIO_INTENSET_MHRMATCH_Pos) /*!< Bit mask of MHRMATCH field. */
+#define RADIO_INTENSET_MHRMATCH_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_MHRMATCH_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_MHRMATCH_Set (1UL) /*!< Enable */
+
+/* Bit 22 : Write '1' to enable interrupt for event RXREADY */
+#define RADIO_INTENSET_RXREADY_Pos (22UL) /*!< Position of RXREADY field. */
+#define RADIO_INTENSET_RXREADY_Msk (0x1UL << RADIO_INTENSET_RXREADY_Pos) /*!< Bit mask of RXREADY field. */
+#define RADIO_INTENSET_RXREADY_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_RXREADY_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_RXREADY_Set (1UL) /*!< Enable */
+
+/* Bit 21 : Write '1' to enable interrupt for event TXREADY */
+#define RADIO_INTENSET_TXREADY_Pos (21UL) /*!< Position of TXREADY field. */
+#define RADIO_INTENSET_TXREADY_Msk (0x1UL << RADIO_INTENSET_TXREADY_Pos) /*!< Bit mask of TXREADY field. */
+#define RADIO_INTENSET_TXREADY_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_TXREADY_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_TXREADY_Set (1UL) /*!< Enable */
+
+/* Bit 20 : Write '1' to enable interrupt for event RATEBOOST */
+#define RADIO_INTENSET_RATEBOOST_Pos (20UL) /*!< Position of RATEBOOST field. */
+#define RADIO_INTENSET_RATEBOOST_Msk (0x1UL << RADIO_INTENSET_RATEBOOST_Pos) /*!< Bit mask of RATEBOOST field. */
+#define RADIO_INTENSET_RATEBOOST_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_RATEBOOST_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_RATEBOOST_Set (1UL) /*!< Enable */
+
+/* Bit 19 : Write '1' to enable interrupt for event CCASTOPPED */
+#define RADIO_INTENSET_CCASTOPPED_Pos (19UL) /*!< Position of CCASTOPPED field. */
+#define RADIO_INTENSET_CCASTOPPED_Msk (0x1UL << RADIO_INTENSET_CCASTOPPED_Pos) /*!< Bit mask of CCASTOPPED field. */
+#define RADIO_INTENSET_CCASTOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_CCASTOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_CCASTOPPED_Set (1UL) /*!< Enable */
+
+/* Bit 18 : Write '1' to enable interrupt for event CCABUSY */
+#define RADIO_INTENSET_CCABUSY_Pos (18UL) /*!< Position of CCABUSY field. */
+#define RADIO_INTENSET_CCABUSY_Msk (0x1UL << RADIO_INTENSET_CCABUSY_Pos) /*!< Bit mask of CCABUSY field. */
+#define RADIO_INTENSET_CCABUSY_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_CCABUSY_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_CCABUSY_Set (1UL) /*!< Enable */
+
+/* Bit 17 : Write '1' to enable interrupt for event CCAIDLE */
+#define RADIO_INTENSET_CCAIDLE_Pos (17UL) /*!< Position of CCAIDLE field. */
+#define RADIO_INTENSET_CCAIDLE_Msk (0x1UL << RADIO_INTENSET_CCAIDLE_Pos) /*!< Bit mask of CCAIDLE field. */
+#define RADIO_INTENSET_CCAIDLE_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_CCAIDLE_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_CCAIDLE_Set (1UL) /*!< Enable */
+
+/* Bit 16 : Write '1' to enable interrupt for event EDSTOPPED */
+#define RADIO_INTENSET_EDSTOPPED_Pos (16UL) /*!< Position of EDSTOPPED field. */
+#define RADIO_INTENSET_EDSTOPPED_Msk (0x1UL << RADIO_INTENSET_EDSTOPPED_Pos) /*!< Bit mask of EDSTOPPED field. */
+#define RADIO_INTENSET_EDSTOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_EDSTOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_EDSTOPPED_Set (1UL) /*!< Enable */
+
+/* Bit 15 : Write '1' to enable interrupt for event EDEND */
+#define RADIO_INTENSET_EDEND_Pos (15UL) /*!< Position of EDEND field. */
+#define RADIO_INTENSET_EDEND_Msk (0x1UL << RADIO_INTENSET_EDEND_Pos) /*!< Bit mask of EDEND field. */
+#define RADIO_INTENSET_EDEND_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_EDEND_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_EDEND_Set (1UL) /*!< Enable */
+
+/* Bit 14 : Write '1' to enable interrupt for event FRAMESTART */
+#define RADIO_INTENSET_FRAMESTART_Pos (14UL) /*!< Position of FRAMESTART field. */
+#define RADIO_INTENSET_FRAMESTART_Msk (0x1UL << RADIO_INTENSET_FRAMESTART_Pos) /*!< Bit mask of FRAMESTART field. */
+#define RADIO_INTENSET_FRAMESTART_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_FRAMESTART_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_FRAMESTART_Set (1UL) /*!< Enable */
+
+/* Bit 13 : Write '1' to enable interrupt for event CRCERROR */
+#define RADIO_INTENSET_CRCERROR_Pos (13UL) /*!< Position of CRCERROR field. */
+#define RADIO_INTENSET_CRCERROR_Msk (0x1UL << RADIO_INTENSET_CRCERROR_Pos) /*!< Bit mask of CRCERROR field. */
+#define RADIO_INTENSET_CRCERROR_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_CRCERROR_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_CRCERROR_Set (1UL) /*!< Enable */
+
+/* Bit 12 : Write '1' to enable interrupt for event CRCOK */
+#define RADIO_INTENSET_CRCOK_Pos (12UL) /*!< Position of CRCOK field. */
+#define RADIO_INTENSET_CRCOK_Msk (0x1UL << RADIO_INTENSET_CRCOK_Pos) /*!< Bit mask of CRCOK field. */
+#define RADIO_INTENSET_CRCOK_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_CRCOK_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_CRCOK_Set (1UL) /*!< Enable */
+
+/* Bit 10 : Write '1' to enable interrupt for event BCMATCH */
+#define RADIO_INTENSET_BCMATCH_Pos (10UL) /*!< Position of BCMATCH field. */
+#define RADIO_INTENSET_BCMATCH_Msk (0x1UL << RADIO_INTENSET_BCMATCH_Pos) /*!< Bit mask of BCMATCH field. */
+#define RADIO_INTENSET_BCMATCH_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_BCMATCH_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_BCMATCH_Set (1UL) /*!< Enable */
+
+/* Bit 7 : Write '1' to enable interrupt for event RSSIEND */
+#define RADIO_INTENSET_RSSIEND_Pos (7UL) /*!< Position of RSSIEND field. */
+#define RADIO_INTENSET_RSSIEND_Msk (0x1UL << RADIO_INTENSET_RSSIEND_Pos) /*!< Bit mask of RSSIEND field. */
+#define RADIO_INTENSET_RSSIEND_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_RSSIEND_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_RSSIEND_Set (1UL) /*!< Enable */
+
+/* Bit 6 : Write '1' to enable interrupt for event DEVMISS */
+#define RADIO_INTENSET_DEVMISS_Pos (6UL) /*!< Position of DEVMISS field. */
+#define RADIO_INTENSET_DEVMISS_Msk (0x1UL << RADIO_INTENSET_DEVMISS_Pos) /*!< Bit mask of DEVMISS field. */
+#define RADIO_INTENSET_DEVMISS_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_DEVMISS_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_DEVMISS_Set (1UL) /*!< Enable */
+
+/* Bit 5 : Write '1' to enable interrupt for event DEVMATCH */
+#define RADIO_INTENSET_DEVMATCH_Pos (5UL) /*!< Position of DEVMATCH field. */
+#define RADIO_INTENSET_DEVMATCH_Msk (0x1UL << RADIO_INTENSET_DEVMATCH_Pos) /*!< Bit mask of DEVMATCH field. */
+#define RADIO_INTENSET_DEVMATCH_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_DEVMATCH_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_DEVMATCH_Set (1UL) /*!< Enable */
+
+/* Bit 4 : Write '1' to enable interrupt for event DISABLED */
+#define RADIO_INTENSET_DISABLED_Pos (4UL) /*!< Position of DISABLED field. */
+#define RADIO_INTENSET_DISABLED_Msk (0x1UL << RADIO_INTENSET_DISABLED_Pos) /*!< Bit mask of DISABLED field. */
+#define RADIO_INTENSET_DISABLED_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_DISABLED_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_DISABLED_Set (1UL) /*!< Enable */
+
+/* Bit 3 : Write '1' to enable interrupt for event END */
+#define RADIO_INTENSET_END_Pos (3UL) /*!< Position of END field. */
+#define RADIO_INTENSET_END_Msk (0x1UL << RADIO_INTENSET_END_Pos) /*!< Bit mask of END field. */
+#define RADIO_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_END_Set (1UL) /*!< Enable */
+
+/* Bit 2 : Write '1' to enable interrupt for event PAYLOAD */
+#define RADIO_INTENSET_PAYLOAD_Pos (2UL) /*!< Position of PAYLOAD field. */
+#define RADIO_INTENSET_PAYLOAD_Msk (0x1UL << RADIO_INTENSET_PAYLOAD_Pos) /*!< Bit mask of PAYLOAD field. */
+#define RADIO_INTENSET_PAYLOAD_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_PAYLOAD_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_PAYLOAD_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event ADDRESS */
+#define RADIO_INTENSET_ADDRESS_Pos (1UL) /*!< Position of ADDRESS field. */
+#define RADIO_INTENSET_ADDRESS_Msk (0x1UL << RADIO_INTENSET_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */
+#define RADIO_INTENSET_ADDRESS_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_ADDRESS_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_ADDRESS_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event READY */
+#define RADIO_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */
+#define RADIO_INTENSET_READY_Msk (0x1UL << RADIO_INTENSET_READY_Pos) /*!< Bit mask of READY field. */
+#define RADIO_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENSET_READY_Set (1UL) /*!< Enable */
+
+/* Register: RADIO_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 28 : Write '1' to disable interrupt for event CTEPRESENT */
+#define RADIO_INTENCLR_CTEPRESENT_Pos (28UL) /*!< Position of CTEPRESENT field. */
+#define RADIO_INTENCLR_CTEPRESENT_Msk (0x1UL << RADIO_INTENCLR_CTEPRESENT_Pos) /*!< Bit mask of CTEPRESENT field. */
+#define RADIO_INTENCLR_CTEPRESENT_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_CTEPRESENT_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_CTEPRESENT_Clear (1UL) /*!< Disable */
+
+/* Bit 27 : Write '1' to disable interrupt for event PHYEND */
+#define RADIO_INTENCLR_PHYEND_Pos (27UL) /*!< Position of PHYEND field. */
+#define RADIO_INTENCLR_PHYEND_Msk (0x1UL << RADIO_INTENCLR_PHYEND_Pos) /*!< Bit mask of PHYEND field. */
+#define RADIO_INTENCLR_PHYEND_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_PHYEND_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_PHYEND_Clear (1UL) /*!< Disable */
+
+/* Bit 23 : Write '1' to disable interrupt for event MHRMATCH */
+#define RADIO_INTENCLR_MHRMATCH_Pos (23UL) /*!< Position of MHRMATCH field. */
+#define RADIO_INTENCLR_MHRMATCH_Msk (0x1UL << RADIO_INTENCLR_MHRMATCH_Pos) /*!< Bit mask of MHRMATCH field. */
+#define RADIO_INTENCLR_MHRMATCH_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_MHRMATCH_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_MHRMATCH_Clear (1UL) /*!< Disable */
+
+/* Bit 22 : Write '1' to disable interrupt for event RXREADY */
+#define RADIO_INTENCLR_RXREADY_Pos (22UL) /*!< Position of RXREADY field. */
+#define RADIO_INTENCLR_RXREADY_Msk (0x1UL << RADIO_INTENCLR_RXREADY_Pos) /*!< Bit mask of RXREADY field. */
+#define RADIO_INTENCLR_RXREADY_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_RXREADY_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_RXREADY_Clear (1UL) /*!< Disable */
+
+/* Bit 21 : Write '1' to disable interrupt for event TXREADY */
+#define RADIO_INTENCLR_TXREADY_Pos (21UL) /*!< Position of TXREADY field. */
+#define RADIO_INTENCLR_TXREADY_Msk (0x1UL << RADIO_INTENCLR_TXREADY_Pos) /*!< Bit mask of TXREADY field. */
+#define RADIO_INTENCLR_TXREADY_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_TXREADY_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_TXREADY_Clear (1UL) /*!< Disable */
+
+/* Bit 20 : Write '1' to disable interrupt for event RATEBOOST */
+#define RADIO_INTENCLR_RATEBOOST_Pos (20UL) /*!< Position of RATEBOOST field. */
+#define RADIO_INTENCLR_RATEBOOST_Msk (0x1UL << RADIO_INTENCLR_RATEBOOST_Pos) /*!< Bit mask of RATEBOOST field. */
+#define RADIO_INTENCLR_RATEBOOST_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_RATEBOOST_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_RATEBOOST_Clear (1UL) /*!< Disable */
+
+/* Bit 19 : Write '1' to disable interrupt for event CCASTOPPED */
+#define RADIO_INTENCLR_CCASTOPPED_Pos (19UL) /*!< Position of CCASTOPPED field. */
+#define RADIO_INTENCLR_CCASTOPPED_Msk (0x1UL << RADIO_INTENCLR_CCASTOPPED_Pos) /*!< Bit mask of CCASTOPPED field. */
+#define RADIO_INTENCLR_CCASTOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_CCASTOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_CCASTOPPED_Clear (1UL) /*!< Disable */
+
+/* Bit 18 : Write '1' to disable interrupt for event CCABUSY */
+#define RADIO_INTENCLR_CCABUSY_Pos (18UL) /*!< Position of CCABUSY field. */
+#define RADIO_INTENCLR_CCABUSY_Msk (0x1UL << RADIO_INTENCLR_CCABUSY_Pos) /*!< Bit mask of CCABUSY field. */
+#define RADIO_INTENCLR_CCABUSY_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_CCABUSY_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_CCABUSY_Clear (1UL) /*!< Disable */
+
+/* Bit 17 : Write '1' to disable interrupt for event CCAIDLE */
+#define RADIO_INTENCLR_CCAIDLE_Pos (17UL) /*!< Position of CCAIDLE field. */
+#define RADIO_INTENCLR_CCAIDLE_Msk (0x1UL << RADIO_INTENCLR_CCAIDLE_Pos) /*!< Bit mask of CCAIDLE field. */
+#define RADIO_INTENCLR_CCAIDLE_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_CCAIDLE_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_CCAIDLE_Clear (1UL) /*!< Disable */
+
+/* Bit 16 : Write '1' to disable interrupt for event EDSTOPPED */
+#define RADIO_INTENCLR_EDSTOPPED_Pos (16UL) /*!< Position of EDSTOPPED field. */
+#define RADIO_INTENCLR_EDSTOPPED_Msk (0x1UL << RADIO_INTENCLR_EDSTOPPED_Pos) /*!< Bit mask of EDSTOPPED field. */
+#define RADIO_INTENCLR_EDSTOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_EDSTOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_EDSTOPPED_Clear (1UL) /*!< Disable */
+
+/* Bit 15 : Write '1' to disable interrupt for event EDEND */
+#define RADIO_INTENCLR_EDEND_Pos (15UL) /*!< Position of EDEND field. */
+#define RADIO_INTENCLR_EDEND_Msk (0x1UL << RADIO_INTENCLR_EDEND_Pos) /*!< Bit mask of EDEND field. */
+#define RADIO_INTENCLR_EDEND_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_EDEND_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_EDEND_Clear (1UL) /*!< Disable */
+
+/* Bit 14 : Write '1' to disable interrupt for event FRAMESTART */
+#define RADIO_INTENCLR_FRAMESTART_Pos (14UL) /*!< Position of FRAMESTART field. */
+#define RADIO_INTENCLR_FRAMESTART_Msk (0x1UL << RADIO_INTENCLR_FRAMESTART_Pos) /*!< Bit mask of FRAMESTART field. */
+#define RADIO_INTENCLR_FRAMESTART_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_FRAMESTART_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_FRAMESTART_Clear (1UL) /*!< Disable */
+
+/* Bit 13 : Write '1' to disable interrupt for event CRCERROR */
+#define RADIO_INTENCLR_CRCERROR_Pos (13UL) /*!< Position of CRCERROR field. */
+#define RADIO_INTENCLR_CRCERROR_Msk (0x1UL << RADIO_INTENCLR_CRCERROR_Pos) /*!< Bit mask of CRCERROR field. */
+#define RADIO_INTENCLR_CRCERROR_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_CRCERROR_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_CRCERROR_Clear (1UL) /*!< Disable */
+
+/* Bit 12 : Write '1' to disable interrupt for event CRCOK */
+#define RADIO_INTENCLR_CRCOK_Pos (12UL) /*!< Position of CRCOK field. */
+#define RADIO_INTENCLR_CRCOK_Msk (0x1UL << RADIO_INTENCLR_CRCOK_Pos) /*!< Bit mask of CRCOK field. */
+#define RADIO_INTENCLR_CRCOK_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_CRCOK_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_CRCOK_Clear (1UL) /*!< Disable */
+
+/* Bit 10 : Write '1' to disable interrupt for event BCMATCH */
+#define RADIO_INTENCLR_BCMATCH_Pos (10UL) /*!< Position of BCMATCH field. */
+#define RADIO_INTENCLR_BCMATCH_Msk (0x1UL << RADIO_INTENCLR_BCMATCH_Pos) /*!< Bit mask of BCMATCH field. */
+#define RADIO_INTENCLR_BCMATCH_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_BCMATCH_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_BCMATCH_Clear (1UL) /*!< Disable */
+
+/* Bit 7 : Write '1' to disable interrupt for event RSSIEND */
+#define RADIO_INTENCLR_RSSIEND_Pos (7UL) /*!< Position of RSSIEND field. */
+#define RADIO_INTENCLR_RSSIEND_Msk (0x1UL << RADIO_INTENCLR_RSSIEND_Pos) /*!< Bit mask of RSSIEND field. */
+#define RADIO_INTENCLR_RSSIEND_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_RSSIEND_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_RSSIEND_Clear (1UL) /*!< Disable */
+
+/* Bit 6 : Write '1' to disable interrupt for event DEVMISS */
+#define RADIO_INTENCLR_DEVMISS_Pos (6UL) /*!< Position of DEVMISS field. */
+#define RADIO_INTENCLR_DEVMISS_Msk (0x1UL << RADIO_INTENCLR_DEVMISS_Pos) /*!< Bit mask of DEVMISS field. */
+#define RADIO_INTENCLR_DEVMISS_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_DEVMISS_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_DEVMISS_Clear (1UL) /*!< Disable */
+
+/* Bit 5 : Write '1' to disable interrupt for event DEVMATCH */
+#define RADIO_INTENCLR_DEVMATCH_Pos (5UL) /*!< Position of DEVMATCH field. */
+#define RADIO_INTENCLR_DEVMATCH_Msk (0x1UL << RADIO_INTENCLR_DEVMATCH_Pos) /*!< Bit mask of DEVMATCH field. */
+#define RADIO_INTENCLR_DEVMATCH_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_DEVMATCH_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_DEVMATCH_Clear (1UL) /*!< Disable */
+
+/* Bit 4 : Write '1' to disable interrupt for event DISABLED */
+#define RADIO_INTENCLR_DISABLED_Pos (4UL) /*!< Position of DISABLED field. */
+#define RADIO_INTENCLR_DISABLED_Msk (0x1UL << RADIO_INTENCLR_DISABLED_Pos) /*!< Bit mask of DISABLED field. */
+#define RADIO_INTENCLR_DISABLED_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_DISABLED_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_DISABLED_Clear (1UL) /*!< Disable */
+
+/* Bit 3 : Write '1' to disable interrupt for event END */
+#define RADIO_INTENCLR_END_Pos (3UL) /*!< Position of END field. */
+#define RADIO_INTENCLR_END_Msk (0x1UL << RADIO_INTENCLR_END_Pos) /*!< Bit mask of END field. */
+#define RADIO_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_END_Clear (1UL) /*!< Disable */
+
+/* Bit 2 : Write '1' to disable interrupt for event PAYLOAD */
+#define RADIO_INTENCLR_PAYLOAD_Pos (2UL) /*!< Position of PAYLOAD field. */
+#define RADIO_INTENCLR_PAYLOAD_Msk (0x1UL << RADIO_INTENCLR_PAYLOAD_Pos) /*!< Bit mask of PAYLOAD field. */
+#define RADIO_INTENCLR_PAYLOAD_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_PAYLOAD_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_PAYLOAD_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event ADDRESS */
+#define RADIO_INTENCLR_ADDRESS_Pos (1UL) /*!< Position of ADDRESS field. */
+#define RADIO_INTENCLR_ADDRESS_Msk (0x1UL << RADIO_INTENCLR_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */
+#define RADIO_INTENCLR_ADDRESS_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_ADDRESS_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_ADDRESS_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event READY */
+#define RADIO_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */
+#define RADIO_INTENCLR_READY_Msk (0x1UL << RADIO_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */
+#define RADIO_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */
+#define RADIO_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */
+#define RADIO_INTENCLR_READY_Clear (1UL) /*!< Disable */
+
+/* Register: RADIO_CRCSTATUS */
+/* Description: CRC status */
+
+/* Bit 0 : CRC status of packet received */
+#define RADIO_CRCSTATUS_CRCSTATUS_Pos (0UL) /*!< Position of CRCSTATUS field. */
+#define RADIO_CRCSTATUS_CRCSTATUS_Msk (0x1UL << RADIO_CRCSTATUS_CRCSTATUS_Pos) /*!< Bit mask of CRCSTATUS field. */
+#define RADIO_CRCSTATUS_CRCSTATUS_CRCError (0UL) /*!< Packet received with CRC error */
+#define RADIO_CRCSTATUS_CRCSTATUS_CRCOk (1UL) /*!< Packet received with CRC ok */
+
+/* Register: RADIO_RXMATCH */
+/* Description: Received address */
+
+/* Bits 2..0 : Received address */
+#define RADIO_RXMATCH_RXMATCH_Pos (0UL) /*!< Position of RXMATCH field. */
+#define RADIO_RXMATCH_RXMATCH_Msk (0x7UL << RADIO_RXMATCH_RXMATCH_Pos) /*!< Bit mask of RXMATCH field. */
+
+/* Register: RADIO_RXCRC */
+/* Description: CRC field of previously received packet */
+
+/* Bits 23..0 : CRC field of previously received packet */
+#define RADIO_RXCRC_RXCRC_Pos (0UL) /*!< Position of RXCRC field. */
+#define RADIO_RXCRC_RXCRC_Msk (0xFFFFFFUL << RADIO_RXCRC_RXCRC_Pos) /*!< Bit mask of RXCRC field. */
+
+/* Register: RADIO_DAI */
+/* Description: Device address match index */
+
+/* Bits 2..0 : Device address match index */
+#define RADIO_DAI_DAI_Pos (0UL) /*!< Position of DAI field. */
+#define RADIO_DAI_DAI_Msk (0x7UL << RADIO_DAI_DAI_Pos) /*!< Bit mask of DAI field. */
+
+/* Register: RADIO_PDUSTAT */
+/* Description: Payload status */
+
+/* Bits 2..1 : Status on what rate packet is received with in Long Range */
+#define RADIO_PDUSTAT_CISTAT_Pos (1UL) /*!< Position of CISTAT field. */
+#define RADIO_PDUSTAT_CISTAT_Msk (0x3UL << RADIO_PDUSTAT_CISTAT_Pos) /*!< Bit mask of CISTAT field. */
+#define RADIO_PDUSTAT_CISTAT_LR125kbit (0UL) /*!< Frame is received at 125 kbps */
+#define RADIO_PDUSTAT_CISTAT_LR500kbit (1UL) /*!< Frame is received at 500 kbps */
+
+/* Bit 0 : Status on payload length vs. PCNF1.MAXLEN */
+#define RADIO_PDUSTAT_PDUSTAT_Pos (0UL) /*!< Position of PDUSTAT field. */
+#define RADIO_PDUSTAT_PDUSTAT_Msk (0x1UL << RADIO_PDUSTAT_PDUSTAT_Pos) /*!< Bit mask of PDUSTAT field. */
+#define RADIO_PDUSTAT_PDUSTAT_LessThan (0UL) /*!< Payload less than PCNF1.MAXLEN */
+#define RADIO_PDUSTAT_PDUSTAT_GreaterThan (1UL) /*!< Payload greater than PCNF1.MAXLEN */
+
+/* Register: RADIO_CTESTATUS */
+/* Description: CTEInfo parsed from received packet */
+
+/* Bits 7..6 : CTEType parsed from packet */
+#define RADIO_CTESTATUS_CTETYPE_Pos (6UL) /*!< Position of CTETYPE field. */
+#define RADIO_CTESTATUS_CTETYPE_Msk (0x3UL << RADIO_CTESTATUS_CTETYPE_Pos) /*!< Bit mask of CTETYPE field. */
+
+/* Bit 5 : RFU parsed from packet */
+#define RADIO_CTESTATUS_RFU_Pos (5UL) /*!< Position of RFU field. */
+#define RADIO_CTESTATUS_RFU_Msk (0x1UL << RADIO_CTESTATUS_RFU_Pos) /*!< Bit mask of RFU field. */
+
+/* Bits 4..0 : CTETime parsed from packet */
+#define RADIO_CTESTATUS_CTETIME_Pos (0UL) /*!< Position of CTETIME field. */
+#define RADIO_CTESTATUS_CTETIME_Msk (0x1FUL << RADIO_CTESTATUS_CTETIME_Pos) /*!< Bit mask of CTETIME field. */
+
+/* Register: RADIO_DFESTATUS */
+/* Description: DFE status information */
+
+/* Bit 4 : Internal state of sampling state machine */
+#define RADIO_DFESTATUS_SAMPLINGSTATE_Pos (4UL) /*!< Position of SAMPLINGSTATE field. */
+#define RADIO_DFESTATUS_SAMPLINGSTATE_Msk (0x1UL << RADIO_DFESTATUS_SAMPLINGSTATE_Pos) /*!< Bit mask of SAMPLINGSTATE field. */
+#define RADIO_DFESTATUS_SAMPLINGSTATE_Idle (0UL) /*!< Sampling state Idle */
+#define RADIO_DFESTATUS_SAMPLINGSTATE_Sampling (1UL) /*!< Sampling state Sampling */
+
+/* Bits 2..0 : Internal state of switching state machine */
+#define RADIO_DFESTATUS_SWITCHINGSTATE_Pos (0UL) /*!< Position of SWITCHINGSTATE field. */
+#define RADIO_DFESTATUS_SWITCHINGSTATE_Msk (0x7UL << RADIO_DFESTATUS_SWITCHINGSTATE_Pos) /*!< Bit mask of SWITCHINGSTATE field. */
+#define RADIO_DFESTATUS_SWITCHINGSTATE_Idle (0UL) /*!< Switching state Idle */
+#define RADIO_DFESTATUS_SWITCHINGSTATE_Offset (1UL) /*!< Switching state Offset */
+#define RADIO_DFESTATUS_SWITCHINGSTATE_Guard (2UL) /*!< Switching state Guard */
+#define RADIO_DFESTATUS_SWITCHINGSTATE_Ref (3UL) /*!< Switching state Ref */
+#define RADIO_DFESTATUS_SWITCHINGSTATE_Switching (4UL) /*!< Switching state Switching */
+#define RADIO_DFESTATUS_SWITCHINGSTATE_Ending (5UL) /*!< Switching state Ending */
+
+/* Register: RADIO_PACKETPTR */
+/* Description: Packet pointer */
+
+/* Bits 31..0 : Packet pointer */
+#define RADIO_PACKETPTR_PACKETPTR_Pos (0UL) /*!< Position of PACKETPTR field. */
+#define RADIO_PACKETPTR_PACKETPTR_Msk (0xFFFFFFFFUL << RADIO_PACKETPTR_PACKETPTR_Pos) /*!< Bit mask of PACKETPTR field. */
+
+/* Register: RADIO_FREQUENCY */
+/* Description: Frequency */
+
+/* Bit 8 : Channel map selection. */
+#define RADIO_FREQUENCY_MAP_Pos (8UL) /*!< Position of MAP field. */
+#define RADIO_FREQUENCY_MAP_Msk (0x1UL << RADIO_FREQUENCY_MAP_Pos) /*!< Bit mask of MAP field. */
+#define RADIO_FREQUENCY_MAP_Default (0UL) /*!< Channel map between 2400 MHZ .. 2500 MHz */
+#define RADIO_FREQUENCY_MAP_Low (1UL) /*!< Channel map between 2360 MHZ .. 2460 MHz */
+
+/* Bits 6..0 : Radio channel frequency */
+#define RADIO_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */
+#define RADIO_FREQUENCY_FREQUENCY_Msk (0x7FUL << RADIO_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */
+
+/* Register: RADIO_TXPOWER */
+/* Description: Output power */
+
+/* Bits 7..0 : RADIO output power */
+#define RADIO_TXPOWER_TXPOWER_Pos (0UL) /*!< Position of TXPOWER field. */
+#define RADIO_TXPOWER_TXPOWER_Msk (0xFFUL << RADIO_TXPOWER_TXPOWER_Pos) /*!< Bit mask of TXPOWER field. */
+#define RADIO_TXPOWER_TXPOWER_0dBm (0x0UL) /*!< 0 dBm */
+#define RADIO_TXPOWER_TXPOWER_Pos2dBm (0x2UL) /*!< +2 dBm */
+#define RADIO_TXPOWER_TXPOWER_Pos3dBm (0x3UL) /*!< +3 dBm */
+#define RADIO_TXPOWER_TXPOWER_Pos4dBm (0x4UL) /*!< +4 dBm */
+#define RADIO_TXPOWER_TXPOWER_Pos5dBm (0x5UL) /*!< +5 dBm */
+#define RADIO_TXPOWER_TXPOWER_Pos6dBm (0x6UL) /*!< +6 dBm */
+#define RADIO_TXPOWER_TXPOWER_Pos7dBm (0x7UL) /*!< +7 dBm */
+#define RADIO_TXPOWER_TXPOWER_Pos8dBm (0x8UL) /*!< +8 dBm */
+#define RADIO_TXPOWER_TXPOWER_Neg40dBm (0xD8UL) /*!< -40 dBm */
+#define RADIO_TXPOWER_TXPOWER_Neg30dBm (0xE2UL) /*!< Deprecated enumerator - -40 dBm */
+#define RADIO_TXPOWER_TXPOWER_Neg20dBm (0xECUL) /*!< -20 dBm */
+#define RADIO_TXPOWER_TXPOWER_Neg16dBm (0xF0UL) /*!< -16 dBm */
+#define RADIO_TXPOWER_TXPOWER_Neg12dBm (0xF4UL) /*!< -12 dBm */
+#define RADIO_TXPOWER_TXPOWER_Neg8dBm (0xF8UL) /*!< -8 dBm */
+#define RADIO_TXPOWER_TXPOWER_Neg4dBm (0xFCUL) /*!< -4 dBm */
+
+/* Register: RADIO_MODE */
+/* Description: Data rate and modulation */
+
+/* Bits 3..0 : Radio data rate and modulation setting. The radio supports frequency-shift keying (FSK) modulation. */
+#define RADIO_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */
+#define RADIO_MODE_MODE_Msk (0xFUL << RADIO_MODE_MODE_Pos) /*!< Bit mask of MODE field. */
+#define RADIO_MODE_MODE_Nrf_1Mbit (0UL) /*!< 1 Mbps Nordic proprietary radio mode */
+#define RADIO_MODE_MODE_Nrf_2Mbit (1UL) /*!< 2 Mbps Nordic proprietary radio mode */
+#define RADIO_MODE_MODE_Ble_1Mbit (3UL) /*!< 1 Mbps BLE */
+#define RADIO_MODE_MODE_Ble_2Mbit (4UL) /*!< 2 Mbps BLE */
+#define RADIO_MODE_MODE_Ble_LR125Kbit (5UL) /*!< Long range 125 kbps TX, 125 kbps and 500 kbps RX */
+#define RADIO_MODE_MODE_Ble_LR500Kbit (6UL) /*!< Long range 500 kbps TX, 125 kbps and 500 kbps RX */
+#define RADIO_MODE_MODE_Ieee802154_250Kbit (15UL) /*!< IEEE 802.15.4-2006 250 kbps */
+
+/* Register: RADIO_PCNF0 */
+/* Description: Packet configuration register 0 */
+
+/* Bits 30..29 : Length of TERM field in Long Range operation */
+#define RADIO_PCNF0_TERMLEN_Pos (29UL) /*!< Position of TERMLEN field. */
+#define RADIO_PCNF0_TERMLEN_Msk (0x3UL << RADIO_PCNF0_TERMLEN_Pos) /*!< Bit mask of TERMLEN field. */
+
+/* Bit 26 : Indicates if LENGTH field contains CRC or not */
+#define RADIO_PCNF0_CRCINC_Pos (26UL) /*!< Position of CRCINC field. */
+#define RADIO_PCNF0_CRCINC_Msk (0x1UL << RADIO_PCNF0_CRCINC_Pos) /*!< Bit mask of CRCINC field. */
+#define RADIO_PCNF0_CRCINC_Exclude (0UL) /*!< LENGTH does not contain CRC */
+#define RADIO_PCNF0_CRCINC_Include (1UL) /*!< LENGTH includes CRC */
+
+/* Bits 25..24 : Length of preamble on air. Decision point: TASKS_START task */
+#define RADIO_PCNF0_PLEN_Pos (24UL) /*!< Position of PLEN field. */
+#define RADIO_PCNF0_PLEN_Msk (0x3UL << RADIO_PCNF0_PLEN_Pos) /*!< Bit mask of PLEN field. */
+#define RADIO_PCNF0_PLEN_8bit (0UL) /*!< 8-bit preamble */
+#define RADIO_PCNF0_PLEN_16bit (1UL) /*!< 16-bit preamble */
+#define RADIO_PCNF0_PLEN_32bitZero (2UL) /*!< 32-bit zero preamble - used for IEEE 802.15.4 */
+#define RADIO_PCNF0_PLEN_LongRange (3UL) /*!< Preamble - used for BLE long range */
+
+/* Bits 23..22 : Length of code indicator - long range */
+#define RADIO_PCNF0_CILEN_Pos (22UL) /*!< Position of CILEN field. */
+#define RADIO_PCNF0_CILEN_Msk (0x3UL << RADIO_PCNF0_CILEN_Pos) /*!< Bit mask of CILEN field. */
+
+/* Bit 20 : Include or exclude S1 field in RAM */
+#define RADIO_PCNF0_S1INCL_Pos (20UL) /*!< Position of S1INCL field. */
+#define RADIO_PCNF0_S1INCL_Msk (0x1UL << RADIO_PCNF0_S1INCL_Pos) /*!< Bit mask of S1INCL field. */
+#define RADIO_PCNF0_S1INCL_Automatic (0UL) /*!< Include S1 field in RAM only if S1LEN > 0 */
+#define RADIO_PCNF0_S1INCL_Include (1UL) /*!< Always include S1 field in RAM independent of S1LEN */
+
+/* Bits 19..16 : Length on air of S1 field in number of bits. */
+#define RADIO_PCNF0_S1LEN_Pos (16UL) /*!< Position of S1LEN field. */
+#define RADIO_PCNF0_S1LEN_Msk (0xFUL << RADIO_PCNF0_S1LEN_Pos) /*!< Bit mask of S1LEN field. */
+
+/* Bit 8 : Length on air of S0 field in number of bytes. */
+#define RADIO_PCNF0_S0LEN_Pos (8UL) /*!< Position of S0LEN field. */
+#define RADIO_PCNF0_S0LEN_Msk (0x1UL << RADIO_PCNF0_S0LEN_Pos) /*!< Bit mask of S0LEN field. */
+
+/* Bits 3..0 : Length on air of LENGTH field in number of bits. */
+#define RADIO_PCNF0_LFLEN_Pos (0UL) /*!< Position of LFLEN field. */
+#define RADIO_PCNF0_LFLEN_Msk (0xFUL << RADIO_PCNF0_LFLEN_Pos) /*!< Bit mask of LFLEN field. */
+
+/* Register: RADIO_PCNF1 */
+/* Description: Packet configuration register 1 */
+
+/* Bit 25 : Enable or disable packet whitening */
+#define RADIO_PCNF1_WHITEEN_Pos (25UL) /*!< Position of WHITEEN field. */
+#define RADIO_PCNF1_WHITEEN_Msk (0x1UL << RADIO_PCNF1_WHITEEN_Pos) /*!< Bit mask of WHITEEN field. */
+#define RADIO_PCNF1_WHITEEN_Disabled (0UL) /*!< Disable */
+#define RADIO_PCNF1_WHITEEN_Enabled (1UL) /*!< Enable */
+
+/* Bit 24 : On-air endianness of packet, this applies to the S0, LENGTH, S1, and the PAYLOAD fields. */
+#define RADIO_PCNF1_ENDIAN_Pos (24UL) /*!< Position of ENDIAN field. */
+#define RADIO_PCNF1_ENDIAN_Msk (0x1UL << RADIO_PCNF1_ENDIAN_Pos) /*!< Bit mask of ENDIAN field. */
+#define RADIO_PCNF1_ENDIAN_Little (0UL) /*!< Least significant bit on air first */
+#define RADIO_PCNF1_ENDIAN_Big (1UL) /*!< Most significant bit on air first */
+
+/* Bits 18..16 : Base address length in number of bytes */
+#define RADIO_PCNF1_BALEN_Pos (16UL) /*!< Position of BALEN field. */
+#define RADIO_PCNF1_BALEN_Msk (0x7UL << RADIO_PCNF1_BALEN_Pos) /*!< Bit mask of BALEN field. */
+
+/* Bits 15..8 : Static length in number of bytes */
+#define RADIO_PCNF1_STATLEN_Pos (8UL) /*!< Position of STATLEN field. */
+#define RADIO_PCNF1_STATLEN_Msk (0xFFUL << RADIO_PCNF1_STATLEN_Pos) /*!< Bit mask of STATLEN field. */
+
+/* Bits 7..0 : Maximum length of packet payload. If the packet payload is larger than MAXLEN, the radio will truncate the payload to MAXLEN. */
+#define RADIO_PCNF1_MAXLEN_Pos (0UL) /*!< Position of MAXLEN field. */
+#define RADIO_PCNF1_MAXLEN_Msk (0xFFUL << RADIO_PCNF1_MAXLEN_Pos) /*!< Bit mask of MAXLEN field. */
+
+/* Register: RADIO_BASE0 */
+/* Description: Base address 0 */
+
+/* Bits 31..0 : Base address 0 */
+#define RADIO_BASE0_BASE0_Pos (0UL) /*!< Position of BASE0 field. */
+#define RADIO_BASE0_BASE0_Msk (0xFFFFFFFFUL << RADIO_BASE0_BASE0_Pos) /*!< Bit mask of BASE0 field. */
+
+/* Register: RADIO_BASE1 */
+/* Description: Base address 1 */
+
+/* Bits 31..0 : Base address 1 */
+#define RADIO_BASE1_BASE1_Pos (0UL) /*!< Position of BASE1 field. */
+#define RADIO_BASE1_BASE1_Msk (0xFFFFFFFFUL << RADIO_BASE1_BASE1_Pos) /*!< Bit mask of BASE1 field. */
+
+/* Register: RADIO_PREFIX0 */
+/* Description: Prefixes bytes for logical addresses 0-3 */
+
+/* Bits 31..24 : Address prefix 3. */
+#define RADIO_PREFIX0_AP3_Pos (24UL) /*!< Position of AP3 field. */
+#define RADIO_PREFIX0_AP3_Msk (0xFFUL << RADIO_PREFIX0_AP3_Pos) /*!< Bit mask of AP3 field. */
+
+/* Bits 23..16 : Address prefix 2. */
+#define RADIO_PREFIX0_AP2_Pos (16UL) /*!< Position of AP2 field. */
+#define RADIO_PREFIX0_AP2_Msk (0xFFUL << RADIO_PREFIX0_AP2_Pos) /*!< Bit mask of AP2 field. */
+
+/* Bits 15..8 : Address prefix 1. */
+#define RADIO_PREFIX0_AP1_Pos (8UL) /*!< Position of AP1 field. */
+#define RADIO_PREFIX0_AP1_Msk (0xFFUL << RADIO_PREFIX0_AP1_Pos) /*!< Bit mask of AP1 field. */
+
+/* Bits 7..0 : Address prefix 0. */
+#define RADIO_PREFIX0_AP0_Pos (0UL) /*!< Position of AP0 field. */
+#define RADIO_PREFIX0_AP0_Msk (0xFFUL << RADIO_PREFIX0_AP0_Pos) /*!< Bit mask of AP0 field. */
+
+/* Register: RADIO_PREFIX1 */
+/* Description: Prefixes bytes for logical addresses 4-7 */
+
+/* Bits 31..24 : Address prefix 7. */
+#define RADIO_PREFIX1_AP7_Pos (24UL) /*!< Position of AP7 field. */
+#define RADIO_PREFIX1_AP7_Msk (0xFFUL << RADIO_PREFIX1_AP7_Pos) /*!< Bit mask of AP7 field. */
+
+/* Bits 23..16 : Address prefix 6. */
+#define RADIO_PREFIX1_AP6_Pos (16UL) /*!< Position of AP6 field. */
+#define RADIO_PREFIX1_AP6_Msk (0xFFUL << RADIO_PREFIX1_AP6_Pos) /*!< Bit mask of AP6 field. */
+
+/* Bits 15..8 : Address prefix 5. */
+#define RADIO_PREFIX1_AP5_Pos (8UL) /*!< Position of AP5 field. */
+#define RADIO_PREFIX1_AP5_Msk (0xFFUL << RADIO_PREFIX1_AP5_Pos) /*!< Bit mask of AP5 field. */
+
+/* Bits 7..0 : Address prefix 4. */
+#define RADIO_PREFIX1_AP4_Pos (0UL) /*!< Position of AP4 field. */
+#define RADIO_PREFIX1_AP4_Msk (0xFFUL << RADIO_PREFIX1_AP4_Pos) /*!< Bit mask of AP4 field. */
+
+/* Register: RADIO_TXADDRESS */
+/* Description: Transmit address select */
+
+/* Bits 2..0 : Transmit address select */
+#define RADIO_TXADDRESS_TXADDRESS_Pos (0UL) /*!< Position of TXADDRESS field. */
+#define RADIO_TXADDRESS_TXADDRESS_Msk (0x7UL << RADIO_TXADDRESS_TXADDRESS_Pos) /*!< Bit mask of TXADDRESS field. */
+
+/* Register: RADIO_RXADDRESSES */
+/* Description: Receive address select */
+
+/* Bit 7 : Enable or disable reception on logical address 7. */
+#define RADIO_RXADDRESSES_ADDR7_Pos (7UL) /*!< Position of ADDR7 field. */
+#define RADIO_RXADDRESSES_ADDR7_Msk (0x1UL << RADIO_RXADDRESSES_ADDR7_Pos) /*!< Bit mask of ADDR7 field. */
+#define RADIO_RXADDRESSES_ADDR7_Disabled (0UL) /*!< Disable */
+#define RADIO_RXADDRESSES_ADDR7_Enabled (1UL) /*!< Enable */
+
+/* Bit 6 : Enable or disable reception on logical address 6. */
+#define RADIO_RXADDRESSES_ADDR6_Pos (6UL) /*!< Position of ADDR6 field. */
+#define RADIO_RXADDRESSES_ADDR6_Msk (0x1UL << RADIO_RXADDRESSES_ADDR6_Pos) /*!< Bit mask of ADDR6 field. */
+#define RADIO_RXADDRESSES_ADDR6_Disabled (0UL) /*!< Disable */
+#define RADIO_RXADDRESSES_ADDR6_Enabled (1UL) /*!< Enable */
+
+/* Bit 5 : Enable or disable reception on logical address 5. */
+#define RADIO_RXADDRESSES_ADDR5_Pos (5UL) /*!< Position of ADDR5 field. */
+#define RADIO_RXADDRESSES_ADDR5_Msk (0x1UL << RADIO_RXADDRESSES_ADDR5_Pos) /*!< Bit mask of ADDR5 field. */
+#define RADIO_RXADDRESSES_ADDR5_Disabled (0UL) /*!< Disable */
+#define RADIO_RXADDRESSES_ADDR5_Enabled (1UL) /*!< Enable */
+
+/* Bit 4 : Enable or disable reception on logical address 4. */
+#define RADIO_RXADDRESSES_ADDR4_Pos (4UL) /*!< Position of ADDR4 field. */
+#define RADIO_RXADDRESSES_ADDR4_Msk (0x1UL << RADIO_RXADDRESSES_ADDR4_Pos) /*!< Bit mask of ADDR4 field. */
+#define RADIO_RXADDRESSES_ADDR4_Disabled (0UL) /*!< Disable */
+#define RADIO_RXADDRESSES_ADDR4_Enabled (1UL) /*!< Enable */
+
+/* Bit 3 : Enable or disable reception on logical address 3. */
+#define RADIO_RXADDRESSES_ADDR3_Pos (3UL) /*!< Position of ADDR3 field. */
+#define RADIO_RXADDRESSES_ADDR3_Msk (0x1UL << RADIO_RXADDRESSES_ADDR3_Pos) /*!< Bit mask of ADDR3 field. */
+#define RADIO_RXADDRESSES_ADDR3_Disabled (0UL) /*!< Disable */
+#define RADIO_RXADDRESSES_ADDR3_Enabled (1UL) /*!< Enable */
+
+/* Bit 2 : Enable or disable reception on logical address 2. */
+#define RADIO_RXADDRESSES_ADDR2_Pos (2UL) /*!< Position of ADDR2 field. */
+#define RADIO_RXADDRESSES_ADDR2_Msk (0x1UL << RADIO_RXADDRESSES_ADDR2_Pos) /*!< Bit mask of ADDR2 field. */
+#define RADIO_RXADDRESSES_ADDR2_Disabled (0UL) /*!< Disable */
+#define RADIO_RXADDRESSES_ADDR2_Enabled (1UL) /*!< Enable */
+
+/* Bit 1 : Enable or disable reception on logical address 1. */
+#define RADIO_RXADDRESSES_ADDR1_Pos (1UL) /*!< Position of ADDR1 field. */
+#define RADIO_RXADDRESSES_ADDR1_Msk (0x1UL << RADIO_RXADDRESSES_ADDR1_Pos) /*!< Bit mask of ADDR1 field. */
+#define RADIO_RXADDRESSES_ADDR1_Disabled (0UL) /*!< Disable */
+#define RADIO_RXADDRESSES_ADDR1_Enabled (1UL) /*!< Enable */
+
+/* Bit 0 : Enable or disable reception on logical address 0. */
+#define RADIO_RXADDRESSES_ADDR0_Pos (0UL) /*!< Position of ADDR0 field. */
+#define RADIO_RXADDRESSES_ADDR0_Msk (0x1UL << RADIO_RXADDRESSES_ADDR0_Pos) /*!< Bit mask of ADDR0 field. */
+#define RADIO_RXADDRESSES_ADDR0_Disabled (0UL) /*!< Disable */
+#define RADIO_RXADDRESSES_ADDR0_Enabled (1UL) /*!< Enable */
+
+/* Register: RADIO_CRCCNF */
+/* Description: CRC configuration */
+
+/* Bits 9..8 : Include or exclude packet address field out of CRC calculation. */
+#define RADIO_CRCCNF_SKIPADDR_Pos (8UL) /*!< Position of SKIPADDR field. */
+#define RADIO_CRCCNF_SKIPADDR_Msk (0x3UL << RADIO_CRCCNF_SKIPADDR_Pos) /*!< Bit mask of SKIPADDR field. */
+#define RADIO_CRCCNF_SKIPADDR_Include (0UL) /*!< CRC calculation includes address field */
+#define RADIO_CRCCNF_SKIPADDR_Skip (1UL) /*!< CRC calculation does not include address field. The CRC calculation will start at the first byte after the address. */
+#define RADIO_CRCCNF_SKIPADDR_Ieee802154 (2UL) /*!< CRC calculation as per 802.15.4 standard. Starting at first byte after length field. */
+
+/* Bits 1..0 : CRC length in number of bytes. */
+#define RADIO_CRCCNF_LEN_Pos (0UL) /*!< Position of LEN field. */
+#define RADIO_CRCCNF_LEN_Msk (0x3UL << RADIO_CRCCNF_LEN_Pos) /*!< Bit mask of LEN field. */
+#define RADIO_CRCCNF_LEN_Disabled (0UL) /*!< CRC length is zero and CRC calculation is disabled */
+#define RADIO_CRCCNF_LEN_One (1UL) /*!< CRC length is one byte and CRC calculation is enabled */
+#define RADIO_CRCCNF_LEN_Two (2UL) /*!< CRC length is two bytes and CRC calculation is enabled */
+#define RADIO_CRCCNF_LEN_Three (3UL) /*!< CRC length is three bytes and CRC calculation is enabled */
+
+/* Register: RADIO_CRCPOLY */
+/* Description: CRC polynomial */
+
+/* Bits 23..0 : CRC polynomial */
+#define RADIO_CRCPOLY_CRCPOLY_Pos (0UL) /*!< Position of CRCPOLY field. */
+#define RADIO_CRCPOLY_CRCPOLY_Msk (0xFFFFFFUL << RADIO_CRCPOLY_CRCPOLY_Pos) /*!< Bit mask of CRCPOLY field. */
+
+/* Register: RADIO_CRCINIT */
+/* Description: CRC initial value */
+
+/* Bits 23..0 : CRC initial value */
+#define RADIO_CRCINIT_CRCINIT_Pos (0UL) /*!< Position of CRCINIT field. */
+#define RADIO_CRCINIT_CRCINIT_Msk (0xFFFFFFUL << RADIO_CRCINIT_CRCINIT_Pos) /*!< Bit mask of CRCINIT field. */
+
+/* Register: RADIO_TIFS */
+/* Description: Interframe spacing in us */
+
+/* Bits 9..0 : Interframe spacing in us */
+#define RADIO_TIFS_TIFS_Pos (0UL) /*!< Position of TIFS field. */
+#define RADIO_TIFS_TIFS_Msk (0x3FFUL << RADIO_TIFS_TIFS_Pos) /*!< Bit mask of TIFS field. */
+
+/* Register: RADIO_RSSISAMPLE */
+/* Description: RSSI sample */
+
+/* Bits 6..0 : RSSI sample */
+#define RADIO_RSSISAMPLE_RSSISAMPLE_Pos (0UL) /*!< Position of RSSISAMPLE field. */
+#define RADIO_RSSISAMPLE_RSSISAMPLE_Msk (0x7FUL << RADIO_RSSISAMPLE_RSSISAMPLE_Pos) /*!< Bit mask of RSSISAMPLE field. */
+
+/* Register: RADIO_STATE */
+/* Description: Current radio state */
+
+/* Bits 3..0 : Current radio state */
+#define RADIO_STATE_STATE_Pos (0UL) /*!< Position of STATE field. */
+#define RADIO_STATE_STATE_Msk (0xFUL << RADIO_STATE_STATE_Pos) /*!< Bit mask of STATE field. */
+#define RADIO_STATE_STATE_Disabled (0UL) /*!< RADIO is in the Disabled state */
+#define RADIO_STATE_STATE_RxRu (1UL) /*!< RADIO is in the RXRU state */
+#define RADIO_STATE_STATE_RxIdle (2UL) /*!< RADIO is in the RXIDLE state */
+#define RADIO_STATE_STATE_Rx (3UL) /*!< RADIO is in the RX state */
+#define RADIO_STATE_STATE_RxDisable (4UL) /*!< RADIO is in the RXDISABLED state */
+#define RADIO_STATE_STATE_TxRu (9UL) /*!< RADIO is in the TXRU state */
+#define RADIO_STATE_STATE_TxIdle (10UL) /*!< RADIO is in the TXIDLE state */
+#define RADIO_STATE_STATE_Tx (11UL) /*!< RADIO is in the TX state */
+#define RADIO_STATE_STATE_TxDisable (12UL) /*!< RADIO is in the TXDISABLED state */
+
+/* Register: RADIO_DATAWHITEIV */
+/* Description: Data whitening initial value */
+
+/* Bits 6..0 : Data whitening initial value. Bit 6 is hardwired to '1', writing '0' to it has no effect, and it will always be read back and used by the device as '1'. */
+#define RADIO_DATAWHITEIV_DATAWHITEIV_Pos (0UL) /*!< Position of DATAWHITEIV field. */
+#define RADIO_DATAWHITEIV_DATAWHITEIV_Msk (0x7FUL << RADIO_DATAWHITEIV_DATAWHITEIV_Pos) /*!< Bit mask of DATAWHITEIV field. */
+
+/* Register: RADIO_BCC */
+/* Description: Bit counter compare */
+
+/* Bits 31..0 : Bit counter compare */
+#define RADIO_BCC_BCC_Pos (0UL) /*!< Position of BCC field. */
+#define RADIO_BCC_BCC_Msk (0xFFFFFFFFUL << RADIO_BCC_BCC_Pos) /*!< Bit mask of BCC field. */
+
+/* Register: RADIO_DAB */
+/* Description: Description collection: Device address base segment n */
+
+/* Bits 31..0 : Device address base segment n */
+#define RADIO_DAB_DAB_Pos (0UL) /*!< Position of DAB field. */
+#define RADIO_DAB_DAB_Msk (0xFFFFFFFFUL << RADIO_DAB_DAB_Pos) /*!< Bit mask of DAB field. */
+
+/* Register: RADIO_DAP */
+/* Description: Description collection: Device address prefix n */
+
+/* Bits 15..0 : Device address prefix n */
+#define RADIO_DAP_DAP_Pos (0UL) /*!< Position of DAP field. */
+#define RADIO_DAP_DAP_Msk (0xFFFFUL << RADIO_DAP_DAP_Pos) /*!< Bit mask of DAP field. */
+
+/* Register: RADIO_DACNF */
+/* Description: Device address match configuration */
+
+/* Bit 15 : TxAdd for device address 7 */
+#define RADIO_DACNF_TXADD7_Pos (15UL) /*!< Position of TXADD7 field. */
+#define RADIO_DACNF_TXADD7_Msk (0x1UL << RADIO_DACNF_TXADD7_Pos) /*!< Bit mask of TXADD7 field. */
+
+/* Bit 14 : TxAdd for device address 6 */
+#define RADIO_DACNF_TXADD6_Pos (14UL) /*!< Position of TXADD6 field. */
+#define RADIO_DACNF_TXADD6_Msk (0x1UL << RADIO_DACNF_TXADD6_Pos) /*!< Bit mask of TXADD6 field. */
+
+/* Bit 13 : TxAdd for device address 5 */
+#define RADIO_DACNF_TXADD5_Pos (13UL) /*!< Position of TXADD5 field. */
+#define RADIO_DACNF_TXADD5_Msk (0x1UL << RADIO_DACNF_TXADD5_Pos) /*!< Bit mask of TXADD5 field. */
+
+/* Bit 12 : TxAdd for device address 4 */
+#define RADIO_DACNF_TXADD4_Pos (12UL) /*!< Position of TXADD4 field. */
+#define RADIO_DACNF_TXADD4_Msk (0x1UL << RADIO_DACNF_TXADD4_Pos) /*!< Bit mask of TXADD4 field. */
+
+/* Bit 11 : TxAdd for device address 3 */
+#define RADIO_DACNF_TXADD3_Pos (11UL) /*!< Position of TXADD3 field. */
+#define RADIO_DACNF_TXADD3_Msk (0x1UL << RADIO_DACNF_TXADD3_Pos) /*!< Bit mask of TXADD3 field. */
+
+/* Bit 10 : TxAdd for device address 2 */
+#define RADIO_DACNF_TXADD2_Pos (10UL) /*!< Position of TXADD2 field. */
+#define RADIO_DACNF_TXADD2_Msk (0x1UL << RADIO_DACNF_TXADD2_Pos) /*!< Bit mask of TXADD2 field. */
+
+/* Bit 9 : TxAdd for device address 1 */
+#define RADIO_DACNF_TXADD1_Pos (9UL) /*!< Position of TXADD1 field. */
+#define RADIO_DACNF_TXADD1_Msk (0x1UL << RADIO_DACNF_TXADD1_Pos) /*!< Bit mask of TXADD1 field. */
+
+/* Bit 8 : TxAdd for device address 0 */
+#define RADIO_DACNF_TXADD0_Pos (8UL) /*!< Position of TXADD0 field. */
+#define RADIO_DACNF_TXADD0_Msk (0x1UL << RADIO_DACNF_TXADD0_Pos) /*!< Bit mask of TXADD0 field. */
+
+/* Bit 7 : Enable or disable device address matching using device address 7 */
+#define RADIO_DACNF_ENA7_Pos (7UL) /*!< Position of ENA7 field. */
+#define RADIO_DACNF_ENA7_Msk (0x1UL << RADIO_DACNF_ENA7_Pos) /*!< Bit mask of ENA7 field. */
+#define RADIO_DACNF_ENA7_Disabled (0UL) /*!< Disabled */
+#define RADIO_DACNF_ENA7_Enabled (1UL) /*!< Enabled */
+
+/* Bit 6 : Enable or disable device address matching using device address 6 */
+#define RADIO_DACNF_ENA6_Pos (6UL) /*!< Position of ENA6 field. */
+#define RADIO_DACNF_ENA6_Msk (0x1UL << RADIO_DACNF_ENA6_Pos) /*!< Bit mask of ENA6 field. */
+#define RADIO_DACNF_ENA6_Disabled (0UL) /*!< Disabled */
+#define RADIO_DACNF_ENA6_Enabled (1UL) /*!< Enabled */
+
+/* Bit 5 : Enable or disable device address matching using device address 5 */
+#define RADIO_DACNF_ENA5_Pos (5UL) /*!< Position of ENA5 field. */
+#define RADIO_DACNF_ENA5_Msk (0x1UL << RADIO_DACNF_ENA5_Pos) /*!< Bit mask of ENA5 field. */
+#define RADIO_DACNF_ENA5_Disabled (0UL) /*!< Disabled */
+#define RADIO_DACNF_ENA5_Enabled (1UL) /*!< Enabled */
+
+/* Bit 4 : Enable or disable device address matching using device address 4 */
+#define RADIO_DACNF_ENA4_Pos (4UL) /*!< Position of ENA4 field. */
+#define RADIO_DACNF_ENA4_Msk (0x1UL << RADIO_DACNF_ENA4_Pos) /*!< Bit mask of ENA4 field. */
+#define RADIO_DACNF_ENA4_Disabled (0UL) /*!< Disabled */
+#define RADIO_DACNF_ENA4_Enabled (1UL) /*!< Enabled */
+
+/* Bit 3 : Enable or disable device address matching using device address 3 */
+#define RADIO_DACNF_ENA3_Pos (3UL) /*!< Position of ENA3 field. */
+#define RADIO_DACNF_ENA3_Msk (0x1UL << RADIO_DACNF_ENA3_Pos) /*!< Bit mask of ENA3 field. */
+#define RADIO_DACNF_ENA3_Disabled (0UL) /*!< Disabled */
+#define RADIO_DACNF_ENA3_Enabled (1UL) /*!< Enabled */
+
+/* Bit 2 : Enable or disable device address matching using device address 2 */
+#define RADIO_DACNF_ENA2_Pos (2UL) /*!< Position of ENA2 field. */
+#define RADIO_DACNF_ENA2_Msk (0x1UL << RADIO_DACNF_ENA2_Pos) /*!< Bit mask of ENA2 field. */
+#define RADIO_DACNF_ENA2_Disabled (0UL) /*!< Disabled */
+#define RADIO_DACNF_ENA2_Enabled (1UL) /*!< Enabled */
+
+/* Bit 1 : Enable or disable device address matching using device address 1 */
+#define RADIO_DACNF_ENA1_Pos (1UL) /*!< Position of ENA1 field. */
+#define RADIO_DACNF_ENA1_Msk (0x1UL << RADIO_DACNF_ENA1_Pos) /*!< Bit mask of ENA1 field. */
+#define RADIO_DACNF_ENA1_Disabled (0UL) /*!< Disabled */
+#define RADIO_DACNF_ENA1_Enabled (1UL) /*!< Enabled */
+
+/* Bit 0 : Enable or disable device address matching using device address 0 */
+#define RADIO_DACNF_ENA0_Pos (0UL) /*!< Position of ENA0 field. */
+#define RADIO_DACNF_ENA0_Msk (0x1UL << RADIO_DACNF_ENA0_Pos) /*!< Bit mask of ENA0 field. */
+#define RADIO_DACNF_ENA0_Disabled (0UL) /*!< Disabled */
+#define RADIO_DACNF_ENA0_Enabled (1UL) /*!< Enabled */
+
+/* Register: RADIO_MHRMATCHCONF */
+/* Description: Search pattern configuration */
+
+/* Bits 31..0 : Search pattern configuration */
+#define RADIO_MHRMATCHCONF_MHRMATCHCONF_Pos (0UL) /*!< Position of MHRMATCHCONF field. */
+#define RADIO_MHRMATCHCONF_MHRMATCHCONF_Msk (0xFFFFFFFFUL << RADIO_MHRMATCHCONF_MHRMATCHCONF_Pos) /*!< Bit mask of MHRMATCHCONF field. */
+
+/* Register: RADIO_MHRMATCHMAS */
+/* Description: Pattern mask */
+
+/* Bits 31..0 : Pattern mask */
+#define RADIO_MHRMATCHMAS_MHRMATCHMAS_Pos (0UL) /*!< Position of MHRMATCHMAS field. */
+#define RADIO_MHRMATCHMAS_MHRMATCHMAS_Msk (0xFFFFFFFFUL << RADIO_MHRMATCHMAS_MHRMATCHMAS_Pos) /*!< Bit mask of MHRMATCHMAS field. */
+
+/* Register: RADIO_MODECNF0 */
+/* Description: Radio mode configuration register 0 */
+
+/* Bits 9..8 : Default TX value */
+#define RADIO_MODECNF0_DTX_Pos (8UL) /*!< Position of DTX field. */
+#define RADIO_MODECNF0_DTX_Msk (0x3UL << RADIO_MODECNF0_DTX_Pos) /*!< Bit mask of DTX field. */
+#define RADIO_MODECNF0_DTX_B1 (0UL) /*!< Transmit '1' */
+#define RADIO_MODECNF0_DTX_B0 (1UL) /*!< Transmit '0' */
+#define RADIO_MODECNF0_DTX_Center (2UL) /*!< Transmit center frequency */
+
+/* Bit 0 : Radio ramp-up time */
+#define RADIO_MODECNF0_RU_Pos (0UL) /*!< Position of RU field. */
+#define RADIO_MODECNF0_RU_Msk (0x1UL << RADIO_MODECNF0_RU_Pos) /*!< Bit mask of RU field. */
+#define RADIO_MODECNF0_RU_Default (0UL) /*!< Default ramp-up time (tRXEN and tTXEN), compatible with firmware written for nRF51 */
+#define RADIO_MODECNF0_RU_Fast (1UL) /*!< Fast ramp-up (tRXEN,FAST and tTXEN,FAST), see electrical specification for more information */
+
+/* Register: RADIO_SFD */
+/* Description: IEEE 802.15.4 start of frame delimiter */
+
+/* Bits 7..0 : IEEE 802.15.4 start of frame delimiter */
+#define RADIO_SFD_SFD_Pos (0UL) /*!< Position of SFD field. */
+#define RADIO_SFD_SFD_Msk (0xFFUL << RADIO_SFD_SFD_Pos) /*!< Bit mask of SFD field. */
+
+/* Register: RADIO_EDCNT */
+/* Description: IEEE 802.15.4 energy detect loop count */
+
+/* Bits 20..0 : IEEE 802.15.4 energy detect loop count */
+#define RADIO_EDCNT_EDCNT_Pos (0UL) /*!< Position of EDCNT field. */
+#define RADIO_EDCNT_EDCNT_Msk (0x1FFFFFUL << RADIO_EDCNT_EDCNT_Pos) /*!< Bit mask of EDCNT field. */
+
+/* Register: RADIO_EDSAMPLE */
+/* Description: IEEE 802.15.4 energy detect level */
+
+/* Bits 7..0 : IEEE 802.15.4 energy detect level */
+#define RADIO_EDSAMPLE_EDLVL_Pos (0UL) /*!< Position of EDLVL field. */
+#define RADIO_EDSAMPLE_EDLVL_Msk (0xFFUL << RADIO_EDSAMPLE_EDLVL_Pos) /*!< Bit mask of EDLVL field. */
+
+/* Register: RADIO_CCACTRL */
+/* Description: IEEE 802.15.4 clear channel assessment control */
+
+/* Bits 31..24 : Limit for occurances above CCACORRTHRES. When not equal to zero the corrolator based signal detect is enabled. */
+#define RADIO_CCACTRL_CCACORRCNT_Pos (24UL) /*!< Position of CCACORRCNT field. */
+#define RADIO_CCACTRL_CCACORRCNT_Msk (0xFFUL << RADIO_CCACTRL_CCACORRCNT_Pos) /*!< Bit mask of CCACORRCNT field. */
+
+/* Bits 23..16 : CCA correlator busy threshold. Only relevant to CarrierMode, CarrierAndEdMode, and CarrierOrEdMode. */
+#define RADIO_CCACTRL_CCACORRTHRES_Pos (16UL) /*!< Position of CCACORRTHRES field. */
+#define RADIO_CCACTRL_CCACORRTHRES_Msk (0xFFUL << RADIO_CCACTRL_CCACORRTHRES_Pos) /*!< Bit mask of CCACORRTHRES field. */
+
+/* Bits 15..8 : CCA energy busy threshold. Used in all the CCA modes except CarrierMode. */
+#define RADIO_CCACTRL_CCAEDTHRES_Pos (8UL) /*!< Position of CCAEDTHRES field. */
+#define RADIO_CCACTRL_CCAEDTHRES_Msk (0xFFUL << RADIO_CCACTRL_CCAEDTHRES_Pos) /*!< Bit mask of CCAEDTHRES field. */
+
+/* Bits 2..0 : CCA mode of operation */
+#define RADIO_CCACTRL_CCAMODE_Pos (0UL) /*!< Position of CCAMODE field. */
+#define RADIO_CCACTRL_CCAMODE_Msk (0x7UL << RADIO_CCACTRL_CCAMODE_Pos) /*!< Bit mask of CCAMODE field. */
+#define RADIO_CCACTRL_CCAMODE_EdMode (0UL) /*!< Energy above threshold */
+#define RADIO_CCACTRL_CCAMODE_CarrierMode (1UL) /*!< Carrier seen */
+#define RADIO_CCACTRL_CCAMODE_CarrierAndEdMode (2UL) /*!< Energy above threshold AND carrier seen */
+#define RADIO_CCACTRL_CCAMODE_CarrierOrEdMode (3UL) /*!< Energy above threshold OR carrier seen */
+#define RADIO_CCACTRL_CCAMODE_EdModeTest1 (4UL) /*!< Energy above threshold test mode that will abort when first ED measurement over threshold is seen. No averaging. */
+
+/* Register: RADIO_DFEMODE */
+/* Description: Whether to use Angle-of-Arrival (AOA) or Angle-of-Departure (AOD) */
+
+/* Bits 1..0 : Direction finding operation mode */
+#define RADIO_DFEMODE_DFEOPMODE_Pos (0UL) /*!< Position of DFEOPMODE field. */
+#define RADIO_DFEMODE_DFEOPMODE_Msk (0x3UL << RADIO_DFEMODE_DFEOPMODE_Pos) /*!< Bit mask of DFEOPMODE field. */
+#define RADIO_DFEMODE_DFEOPMODE_Disabled (0UL) /*!< Direction finding mode disabled */
+#define RADIO_DFEMODE_DFEOPMODE_AoD (2UL) /*!< Direction finding mode set to AoD */
+#define RADIO_DFEMODE_DFEOPMODE_AoA (3UL) /*!< Direction finding mode set to AoA */
+
+/* Register: RADIO_CTEINLINECONF */
+/* Description: Configuration for CTE inline mode */
+
+/* Bits 31..24 : S0 bit mask to set which bit to match */
+#define RADIO_CTEINLINECONF_S0MASK_Pos (24UL) /*!< Position of S0MASK field. */
+#define RADIO_CTEINLINECONF_S0MASK_Msk (0xFFUL << RADIO_CTEINLINECONF_S0MASK_Pos) /*!< Bit mask of S0MASK field. */
+
+/* Bits 23..16 : S0 bit pattern to match */
+#define RADIO_CTEINLINECONF_S0CONF_Pos (16UL) /*!< Position of S0CONF field. */
+#define RADIO_CTEINLINECONF_S0CONF_Msk (0xFFUL << RADIO_CTEINLINECONF_S0CONF_Pos) /*!< Bit mask of S0CONF field. */
+
+/* Bits 15..13 : Spacing between samples for the samples in the SWITCHING period when CTEINLINEMODE is set */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE2US_Pos (13UL) /*!< Position of CTEINLINERXMODE2US field. */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE2US_Msk (0x7UL << RADIO_CTEINLINECONF_CTEINLINERXMODE2US_Pos) /*!< Bit mask of CTEINLINERXMODE2US field. */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE2US_4us (1UL) /*!< 4us */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE2US_2us (2UL) /*!< 2us */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE2US_1us (3UL) /*!< 1us */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE2US_500ns (4UL) /*!< 0.5us */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE2US_250ns (5UL) /*!< 0.25us */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE2US_125ns (6UL) /*!< 0.125us */
+
+/* Bits 12..10 : Spacing between samples for the samples in the SWITCHING period when CTEINLINEMODE is set */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE1US_Pos (10UL) /*!< Position of CTEINLINERXMODE1US field. */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE1US_Msk (0x7UL << RADIO_CTEINLINECONF_CTEINLINERXMODE1US_Pos) /*!< Bit mask of CTEINLINERXMODE1US field. */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE1US_4us (1UL) /*!< 4us */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE1US_2us (2UL) /*!< 2us */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE1US_1us (3UL) /*!< 1us */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE1US_500ns (4UL) /*!< 0.5us */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE1US_250ns (5UL) /*!< 0.25us */
+#define RADIO_CTEINLINECONF_CTEINLINERXMODE1US_125ns (6UL) /*!< 0.125us */
+
+/* Bits 7..6 : Max range of CTETime */
+#define RADIO_CTEINLINECONF_CTETIMEVALIDRANGE_Pos (6UL) /*!< Position of CTETIMEVALIDRANGE field. */
+#define RADIO_CTEINLINECONF_CTETIMEVALIDRANGE_Msk (0x3UL << RADIO_CTEINLINECONF_CTETIMEVALIDRANGE_Pos) /*!< Bit mask of CTETIMEVALIDRANGE field. */
+#define RADIO_CTEINLINECONF_CTETIMEVALIDRANGE_20 (0UL) /*!< 20 in 8us unit (default) Set to 20 if parsed CTETime is larger han 20 */
+#define RADIO_CTEINLINECONF_CTETIMEVALIDRANGE_31 (1UL) /*!< 31 in 8us unit */
+#define RADIO_CTEINLINECONF_CTETIMEVALIDRANGE_63 (2UL) /*!< 63 in 8us unit */
+
+/* Bit 4 : Sampling/switching if CRC is not OK */
+#define RADIO_CTEINLINECONF_CTEERRORHANDLING_Pos (4UL) /*!< Position of CTEERRORHANDLING field. */
+#define RADIO_CTEINLINECONF_CTEERRORHANDLING_Msk (0x1UL << RADIO_CTEINLINECONF_CTEERRORHANDLING_Pos) /*!< Bit mask of CTEERRORHANDLING field. */
+#define RADIO_CTEINLINECONF_CTEERRORHANDLING_No (0UL) /*!< No sampling and antenna switching when CRC is not OK */
+#define RADIO_CTEINLINECONF_CTEERRORHANDLING_Yes (1UL) /*!< Sampling and antenna switching also when CRC is not OK */
+
+/* Bit 3 : CTEInfo is S1 byte or not */
+#define RADIO_CTEINLINECONF_CTEINFOINS1_Pos (3UL) /*!< Position of CTEINFOINS1 field. */
+#define RADIO_CTEINLINECONF_CTEINFOINS1_Msk (0x1UL << RADIO_CTEINLINECONF_CTEINFOINS1_Pos) /*!< Bit mask of CTEINFOINS1 field. */
+#define RADIO_CTEINLINECONF_CTEINFOINS1_NotInS1 (0UL) /*!< CTEInfo is NOT in S1 byte (advertising PDU) */
+#define RADIO_CTEINLINECONF_CTEINFOINS1_InS1 (1UL) /*!< CTEInfo is in S1 byte (data PDU) */
+
+/* Bit 0 : Enable parsing of CTEInfo from received packet in BLE modes */
+#define RADIO_CTEINLINECONF_CTEINLINECTRLEN_Pos (0UL) /*!< Position of CTEINLINECTRLEN field. */
+#define RADIO_CTEINLINECONF_CTEINLINECTRLEN_Msk (0x1UL << RADIO_CTEINLINECONF_CTEINLINECTRLEN_Pos) /*!< Bit mask of CTEINLINECTRLEN field. */
+#define RADIO_CTEINLINECONF_CTEINLINECTRLEN_Disabled (0UL) /*!< Parsing of CTEInfo is disabled */
+#define RADIO_CTEINLINECONF_CTEINLINECTRLEN_Enabled (1UL) /*!< Parsing of CTEInfo is enabled */
+
+/* Register: RADIO_DFECTRL1 */
+/* Description: Various configuration for Direction finding */
+
+/* Bits 27..24 : Gain will be lowered by the specified number of gain steps at the start of CTE */
+#define RADIO_DFECTRL1_AGCBACKOFFGAIN_Pos (24UL) /*!< Position of AGCBACKOFFGAIN field. */
+#define RADIO_DFECTRL1_AGCBACKOFFGAIN_Msk (0xFUL << RADIO_DFECTRL1_AGCBACKOFFGAIN_Pos) /*!< Bit mask of AGCBACKOFFGAIN field. */
+
+/* Bits 23..20 : Repeat every antenna pattern N times. */
+#define RADIO_DFECTRL1_REPEATPATTERN_Pos (20UL) /*!< Position of REPEATPATTERN field. */
+#define RADIO_DFECTRL1_REPEATPATTERN_Msk (0xFUL << RADIO_DFECTRL1_REPEATPATTERN_Pos) /*!< Bit mask of REPEATPATTERN field. */
+#define RADIO_DFECTRL1_REPEATPATTERN_NoRepeat (0UL) /*!< Do not repeat (1 time in total) */
+
+/* Bits 18..16 : Interval between samples in the SWITCHING period when CTEINLINECTRLEN is 0 */
+#define RADIO_DFECTRL1_TSAMPLESPACING_Pos (16UL) /*!< Position of TSAMPLESPACING field. */
+#define RADIO_DFECTRL1_TSAMPLESPACING_Msk (0x7UL << RADIO_DFECTRL1_TSAMPLESPACING_Pos) /*!< Bit mask of TSAMPLESPACING field. */
+#define RADIO_DFECTRL1_TSAMPLESPACING_4us (1UL) /*!< 4us */
+#define RADIO_DFECTRL1_TSAMPLESPACING_2us (2UL) /*!< 2us */
+#define RADIO_DFECTRL1_TSAMPLESPACING_1us (3UL) /*!< 1us */
+#define RADIO_DFECTRL1_TSAMPLESPACING_500ns (4UL) /*!< 0.5us */
+#define RADIO_DFECTRL1_TSAMPLESPACING_250ns (5UL) /*!< 0.25us */
+#define RADIO_DFECTRL1_TSAMPLESPACING_125ns (6UL) /*!< 0.125us */
+
+/* Bit 15 : Whether to sample I/Q or magnitude/phase */
+#define RADIO_DFECTRL1_SAMPLETYPE_Pos (15UL) /*!< Position of SAMPLETYPE field. */
+#define RADIO_DFECTRL1_SAMPLETYPE_Msk (0x1UL << RADIO_DFECTRL1_SAMPLETYPE_Pos) /*!< Bit mask of SAMPLETYPE field. */
+#define RADIO_DFECTRL1_SAMPLETYPE_IQ (0UL) /*!< Complex samples in I and Q */
+#define RADIO_DFECTRL1_SAMPLETYPE_MagPhase (1UL) /*!< Complex samples as magnitude and phase */
+
+/* Bits 14..12 : Interval between samples in the REFERENCE period */
+#define RADIO_DFECTRL1_TSAMPLESPACINGREF_Pos (12UL) /*!< Position of TSAMPLESPACINGREF field. */
+#define RADIO_DFECTRL1_TSAMPLESPACINGREF_Msk (0x7UL << RADIO_DFECTRL1_TSAMPLESPACINGREF_Pos) /*!< Bit mask of TSAMPLESPACINGREF field. */
+#define RADIO_DFECTRL1_TSAMPLESPACINGREF_4us (1UL) /*!< 4us */
+#define RADIO_DFECTRL1_TSAMPLESPACINGREF_2us (2UL) /*!< 2us */
+#define RADIO_DFECTRL1_TSAMPLESPACINGREF_1us (3UL) /*!< 1us */
+#define RADIO_DFECTRL1_TSAMPLESPACINGREF_500ns (4UL) /*!< 0.5us */
+#define RADIO_DFECTRL1_TSAMPLESPACINGREF_250ns (5UL) /*!< 0.25us */
+#define RADIO_DFECTRL1_TSAMPLESPACINGREF_125ns (6UL) /*!< 0.125us */
+
+/* Bits 10..8 : Interval between every time the antenna is changed in the SWITCHING state */
+#define RADIO_DFECTRL1_TSWITCHSPACING_Pos (8UL) /*!< Position of TSWITCHSPACING field. */
+#define RADIO_DFECTRL1_TSWITCHSPACING_Msk (0x7UL << RADIO_DFECTRL1_TSWITCHSPACING_Pos) /*!< Bit mask of TSWITCHSPACING field. */
+#define RADIO_DFECTRL1_TSWITCHSPACING_4us (1UL) /*!< 4us */
+#define RADIO_DFECTRL1_TSWITCHSPACING_2us (2UL) /*!< 2us */
+#define RADIO_DFECTRL1_TSWITCHSPACING_1us (3UL) /*!< 1us */
+
+/* Bit 7 : Add CTE extension and do antenna switching/sampling in this extension */
+#define RADIO_DFECTRL1_DFEINEXTENSION_Pos (7UL) /*!< Position of DFEINEXTENSION field. */
+#define RADIO_DFECTRL1_DFEINEXTENSION_Msk (0x1UL << RADIO_DFECTRL1_DFEINEXTENSION_Pos) /*!< Bit mask of DFEINEXTENSION field. */
+#define RADIO_DFECTRL1_DFEINEXTENSION_Payload (0UL) /*!< Antenna switching/sampling is done in the packet payload */
+#define RADIO_DFECTRL1_DFEINEXTENSION_CRC (1UL) /*!< AoA/AoD procedure triggered at end of CRC */
+
+/* Bits 5..0 : Length of the AoA/AoD procedure in number of 8 us units */
+#define RADIO_DFECTRL1_NUMBEROF8US_Pos (0UL) /*!< Position of NUMBEROF8US field. */
+#define RADIO_DFECTRL1_NUMBEROF8US_Msk (0x3FUL << RADIO_DFECTRL1_NUMBEROF8US_Pos) /*!< Bit mask of NUMBEROF8US field. */
+
+/* Register: RADIO_DFECTRL2 */
+/* Description: Start offset for Direction finding */
+
+/* Bits 27..16 : Signed value offset before starting sampling in number of 16M cycles relative to the beginning of the REFERENCE state - 12 us after switching start */
+#define RADIO_DFECTRL2_TSAMPLEOFFSET_Pos (16UL) /*!< Position of TSAMPLEOFFSET field. */
+#define RADIO_DFECTRL2_TSAMPLEOFFSET_Msk (0xFFFUL << RADIO_DFECTRL2_TSAMPLEOFFSET_Pos) /*!< Bit mask of TSAMPLEOFFSET field. */
+
+/* Bits 12..0 : Signed value offset after the end of the CRC before starting switching in number of 16M cycles */
+#define RADIO_DFECTRL2_TSWITCHOFFSET_Pos (0UL) /*!< Position of TSWITCHOFFSET field. */
+#define RADIO_DFECTRL2_TSWITCHOFFSET_Msk (0x1FFFUL << RADIO_DFECTRL2_TSWITCHOFFSET_Pos) /*!< Bit mask of TSWITCHOFFSET field. */
+
+/* Register: RADIO_SWITCHPATTERN */
+/* Description: GPIO patterns to be used for each antenna */
+
+/* Bits 7..0 : Fill array of GPIO patterns for antenna control */
+#define RADIO_SWITCHPATTERN_SWITCHPATTERN_Pos (0UL) /*!< Position of SWITCHPATTERN field. */
+#define RADIO_SWITCHPATTERN_SWITCHPATTERN_Msk (0xFFUL << RADIO_SWITCHPATTERN_SWITCHPATTERN_Pos) /*!< Bit mask of SWITCHPATTERN field. */
+
+/* Register: RADIO_CLEARPATTERN */
+/* Description: Clear the GPIO pattern array for antenna control */
+
+/* Bit 0 : Clears GPIO pattern array for antenna control */
+#define RADIO_CLEARPATTERN_CLEARPATTERN_Pos (0UL) /*!< Position of CLEARPATTERN field. */
+#define RADIO_CLEARPATTERN_CLEARPATTERN_Msk (0x1UL << RADIO_CLEARPATTERN_CLEARPATTERN_Pos) /*!< Bit mask of CLEARPATTERN field. */
+#define RADIO_CLEARPATTERN_CLEARPATTERN_Clear (1UL) /*!< Clear the GPIO pattern */
+
+/* Register: RADIO_PSEL_DFEGPIO */
+/* Description: Description collection: Pin select for DFE pin n */
+
+/* Bit 31 : Connection */
+#define RADIO_PSEL_DFEGPIO_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define RADIO_PSEL_DFEGPIO_CONNECT_Msk (0x1UL << RADIO_PSEL_DFEGPIO_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define RADIO_PSEL_DFEGPIO_CONNECT_Connected (0UL) /*!< Connect */
+#define RADIO_PSEL_DFEGPIO_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define RADIO_PSEL_DFEGPIO_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define RADIO_PSEL_DFEGPIO_PORT_Msk (0x1UL << RADIO_PSEL_DFEGPIO_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define RADIO_PSEL_DFEGPIO_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define RADIO_PSEL_DFEGPIO_PIN_Msk (0x1FUL << RADIO_PSEL_DFEGPIO_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: RADIO_DFEPACKET_PTR */
+/* Description: Data pointer */
+
+/* Bits 31..0 : Data pointer */
+#define RADIO_DFEPACKET_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define RADIO_DFEPACKET_PTR_PTR_Msk (0xFFFFFFFFUL << RADIO_DFEPACKET_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: RADIO_DFEPACKET_MAXCNT */
+/* Description: Maximum number of buffer words to transfer */
+
+/* Bits 13..0 : Maximum number of buffer words to transfer */
+#define RADIO_DFEPACKET_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define RADIO_DFEPACKET_MAXCNT_MAXCNT_Msk (0x3FFFUL << RADIO_DFEPACKET_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: RADIO_DFEPACKET_AMOUNT */
+/* Description: Number of samples transferred in the last transaction */
+
+/* Bits 15..0 : Number of samples transferred in the last transaction */
+#define RADIO_DFEPACKET_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define RADIO_DFEPACKET_AMOUNT_AMOUNT_Msk (0xFFFFUL << RADIO_DFEPACKET_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+/* Register: RADIO_POWER */
+/* Description: Peripheral power control */
+
+/* Bit 0 : Peripheral power control. The peripheral and its registers will be reset to its initial state by switching the peripheral off and then back on again. */
+#define RADIO_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */
+#define RADIO_POWER_POWER_Msk (0x1UL << RADIO_POWER_POWER_Pos) /*!< Bit mask of POWER field. */
+#define RADIO_POWER_POWER_Disabled (0UL) /*!< Peripheral is powered off */
+#define RADIO_POWER_POWER_Enabled (1UL) /*!< Peripheral is powered on */
+
+
+/* Peripheral: RNG */
+/* Description: Random Number Generator */
+
+/* Register: RNG_TASKS_START */
+/* Description: Task starting the random number generator */
+
+/* Bit 0 : Task starting the random number generator */
+#define RNG_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */
+#define RNG_TASKS_START_TASKS_START_Msk (0x1UL << RNG_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */
+#define RNG_TASKS_START_TASKS_START_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RNG_TASKS_STOP */
+/* Description: Task stopping the random number generator */
+
+/* Bit 0 : Task stopping the random number generator */
+#define RNG_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define RNG_TASKS_STOP_TASKS_STOP_Msk (0x1UL << RNG_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define RNG_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RNG_EVENTS_VALRDY */
+/* Description: Event being generated for every new random number written to the VALUE register */
+
+/* Bit 0 : Event being generated for every new random number written to the VALUE register */
+#define RNG_EVENTS_VALRDY_EVENTS_VALRDY_Pos (0UL) /*!< Position of EVENTS_VALRDY field. */
+#define RNG_EVENTS_VALRDY_EVENTS_VALRDY_Msk (0x1UL << RNG_EVENTS_VALRDY_EVENTS_VALRDY_Pos) /*!< Bit mask of EVENTS_VALRDY field. */
+#define RNG_EVENTS_VALRDY_EVENTS_VALRDY_NotGenerated (0UL) /*!< Event not generated */
+#define RNG_EVENTS_VALRDY_EVENTS_VALRDY_Generated (1UL) /*!< Event generated */
+
+/* Register: RNG_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 0 : Shortcut between event VALRDY and task STOP */
+#define RNG_SHORTS_VALRDY_STOP_Pos (0UL) /*!< Position of VALRDY_STOP field. */
+#define RNG_SHORTS_VALRDY_STOP_Msk (0x1UL << RNG_SHORTS_VALRDY_STOP_Pos) /*!< Bit mask of VALRDY_STOP field. */
+#define RNG_SHORTS_VALRDY_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define RNG_SHORTS_VALRDY_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: RNG_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 0 : Write '1' to enable interrupt for event VALRDY */
+#define RNG_INTENSET_VALRDY_Pos (0UL) /*!< Position of VALRDY field. */
+#define RNG_INTENSET_VALRDY_Msk (0x1UL << RNG_INTENSET_VALRDY_Pos) /*!< Bit mask of VALRDY field. */
+#define RNG_INTENSET_VALRDY_Disabled (0UL) /*!< Read: Disabled */
+#define RNG_INTENSET_VALRDY_Enabled (1UL) /*!< Read: Enabled */
+#define RNG_INTENSET_VALRDY_Set (1UL) /*!< Enable */
+
+/* Register: RNG_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 0 : Write '1' to disable interrupt for event VALRDY */
+#define RNG_INTENCLR_VALRDY_Pos (0UL) /*!< Position of VALRDY field. */
+#define RNG_INTENCLR_VALRDY_Msk (0x1UL << RNG_INTENCLR_VALRDY_Pos) /*!< Bit mask of VALRDY field. */
+#define RNG_INTENCLR_VALRDY_Disabled (0UL) /*!< Read: Disabled */
+#define RNG_INTENCLR_VALRDY_Enabled (1UL) /*!< Read: Enabled */
+#define RNG_INTENCLR_VALRDY_Clear (1UL) /*!< Disable */
+
+/* Register: RNG_CONFIG */
+/* Description: Configuration register */
+
+/* Bit 0 : Bias correction */
+#define RNG_CONFIG_DERCEN_Pos (0UL) /*!< Position of DERCEN field. */
+#define RNG_CONFIG_DERCEN_Msk (0x1UL << RNG_CONFIG_DERCEN_Pos) /*!< Bit mask of DERCEN field. */
+#define RNG_CONFIG_DERCEN_Disabled (0UL) /*!< Disabled */
+#define RNG_CONFIG_DERCEN_Enabled (1UL) /*!< Enabled */
+
+/* Register: RNG_VALUE */
+/* Description: Output random number */
+
+/* Bits 7..0 : Generated random number */
+#define RNG_VALUE_VALUE_Pos (0UL) /*!< Position of VALUE field. */
+#define RNG_VALUE_VALUE_Msk (0xFFUL << RNG_VALUE_VALUE_Pos) /*!< Bit mask of VALUE field. */
+
+
+/* Peripheral: RTC */
+/* Description: Real time counter 0 */
+
+/* Register: RTC_TASKS_START */
+/* Description: Start RTC COUNTER */
+
+/* Bit 0 : Start RTC COUNTER */
+#define RTC_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */
+#define RTC_TASKS_START_TASKS_START_Msk (0x1UL << RTC_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */
+#define RTC_TASKS_START_TASKS_START_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RTC_TASKS_STOP */
+/* Description: Stop RTC COUNTER */
+
+/* Bit 0 : Stop RTC COUNTER */
+#define RTC_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define RTC_TASKS_STOP_TASKS_STOP_Msk (0x1UL << RTC_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define RTC_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RTC_TASKS_CLEAR */
+/* Description: Clear RTC COUNTER */
+
+/* Bit 0 : Clear RTC COUNTER */
+#define RTC_TASKS_CLEAR_TASKS_CLEAR_Pos (0UL) /*!< Position of TASKS_CLEAR field. */
+#define RTC_TASKS_CLEAR_TASKS_CLEAR_Msk (0x1UL << RTC_TASKS_CLEAR_TASKS_CLEAR_Pos) /*!< Bit mask of TASKS_CLEAR field. */
+#define RTC_TASKS_CLEAR_TASKS_CLEAR_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RTC_TASKS_TRIGOVRFLW */
+/* Description: Set COUNTER to 0xFFFFF0 */
+
+/* Bit 0 : Set COUNTER to 0xFFFFF0 */
+#define RTC_TASKS_TRIGOVRFLW_TASKS_TRIGOVRFLW_Pos (0UL) /*!< Position of TASKS_TRIGOVRFLW field. */
+#define RTC_TASKS_TRIGOVRFLW_TASKS_TRIGOVRFLW_Msk (0x1UL << RTC_TASKS_TRIGOVRFLW_TASKS_TRIGOVRFLW_Pos) /*!< Bit mask of TASKS_TRIGOVRFLW field. */
+#define RTC_TASKS_TRIGOVRFLW_TASKS_TRIGOVRFLW_Trigger (1UL) /*!< Trigger task */
+
+/* Register: RTC_EVENTS_TICK */
+/* Description: Event on COUNTER increment */
+
+/* Bit 0 : Event on COUNTER increment */
+#define RTC_EVENTS_TICK_EVENTS_TICK_Pos (0UL) /*!< Position of EVENTS_TICK field. */
+#define RTC_EVENTS_TICK_EVENTS_TICK_Msk (0x1UL << RTC_EVENTS_TICK_EVENTS_TICK_Pos) /*!< Bit mask of EVENTS_TICK field. */
+#define RTC_EVENTS_TICK_EVENTS_TICK_NotGenerated (0UL) /*!< Event not generated */
+#define RTC_EVENTS_TICK_EVENTS_TICK_Generated (1UL) /*!< Event generated */
+
+/* Register: RTC_EVENTS_OVRFLW */
+/* Description: Event on COUNTER overflow */
+
+/* Bit 0 : Event on COUNTER overflow */
+#define RTC_EVENTS_OVRFLW_EVENTS_OVRFLW_Pos (0UL) /*!< Position of EVENTS_OVRFLW field. */
+#define RTC_EVENTS_OVRFLW_EVENTS_OVRFLW_Msk (0x1UL << RTC_EVENTS_OVRFLW_EVENTS_OVRFLW_Pos) /*!< Bit mask of EVENTS_OVRFLW field. */
+#define RTC_EVENTS_OVRFLW_EVENTS_OVRFLW_NotGenerated (0UL) /*!< Event not generated */
+#define RTC_EVENTS_OVRFLW_EVENTS_OVRFLW_Generated (1UL) /*!< Event generated */
+
+/* Register: RTC_EVENTS_COMPARE */
+/* Description: Description collection: Compare event on CC[n] match */
+
+/* Bit 0 : Compare event on CC[n] match */
+#define RTC_EVENTS_COMPARE_EVENTS_COMPARE_Pos (0UL) /*!< Position of EVENTS_COMPARE field. */
+#define RTC_EVENTS_COMPARE_EVENTS_COMPARE_Msk (0x1UL << RTC_EVENTS_COMPARE_EVENTS_COMPARE_Pos) /*!< Bit mask of EVENTS_COMPARE field. */
+#define RTC_EVENTS_COMPARE_EVENTS_COMPARE_NotGenerated (0UL) /*!< Event not generated */
+#define RTC_EVENTS_COMPARE_EVENTS_COMPARE_Generated (1UL) /*!< Event generated */
+
+/* Register: RTC_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 19 : Write '1' to enable interrupt for event COMPARE[3] */
+#define RTC_INTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */
+#define RTC_INTENSET_COMPARE3_Msk (0x1UL << RTC_INTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */
+#define RTC_INTENSET_COMPARE3_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_INTENSET_COMPARE3_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_INTENSET_COMPARE3_Set (1UL) /*!< Enable */
+
+/* Bit 18 : Write '1' to enable interrupt for event COMPARE[2] */
+#define RTC_INTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */
+#define RTC_INTENSET_COMPARE2_Msk (0x1UL << RTC_INTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */
+#define RTC_INTENSET_COMPARE2_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_INTENSET_COMPARE2_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_INTENSET_COMPARE2_Set (1UL) /*!< Enable */
+
+/* Bit 17 : Write '1' to enable interrupt for event COMPARE[1] */
+#define RTC_INTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */
+#define RTC_INTENSET_COMPARE1_Msk (0x1UL << RTC_INTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */
+#define RTC_INTENSET_COMPARE1_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_INTENSET_COMPARE1_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_INTENSET_COMPARE1_Set (1UL) /*!< Enable */
+
+/* Bit 16 : Write '1' to enable interrupt for event COMPARE[0] */
+#define RTC_INTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */
+#define RTC_INTENSET_COMPARE0_Msk (0x1UL << RTC_INTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */
+#define RTC_INTENSET_COMPARE0_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_INTENSET_COMPARE0_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_INTENSET_COMPARE0_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event OVRFLW */
+#define RTC_INTENSET_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */
+#define RTC_INTENSET_OVRFLW_Msk (0x1UL << RTC_INTENSET_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */
+#define RTC_INTENSET_OVRFLW_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_INTENSET_OVRFLW_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_INTENSET_OVRFLW_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event TICK */
+#define RTC_INTENSET_TICK_Pos (0UL) /*!< Position of TICK field. */
+#define RTC_INTENSET_TICK_Msk (0x1UL << RTC_INTENSET_TICK_Pos) /*!< Bit mask of TICK field. */
+#define RTC_INTENSET_TICK_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_INTENSET_TICK_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_INTENSET_TICK_Set (1UL) /*!< Enable */
+
+/* Register: RTC_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 19 : Write '1' to disable interrupt for event COMPARE[3] */
+#define RTC_INTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */
+#define RTC_INTENCLR_COMPARE3_Msk (0x1UL << RTC_INTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */
+#define RTC_INTENCLR_COMPARE3_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_INTENCLR_COMPARE3_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_INTENCLR_COMPARE3_Clear (1UL) /*!< Disable */
+
+/* Bit 18 : Write '1' to disable interrupt for event COMPARE[2] */
+#define RTC_INTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */
+#define RTC_INTENCLR_COMPARE2_Msk (0x1UL << RTC_INTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */
+#define RTC_INTENCLR_COMPARE2_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_INTENCLR_COMPARE2_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_INTENCLR_COMPARE2_Clear (1UL) /*!< Disable */
+
+/* Bit 17 : Write '1' to disable interrupt for event COMPARE[1] */
+#define RTC_INTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */
+#define RTC_INTENCLR_COMPARE1_Msk (0x1UL << RTC_INTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */
+#define RTC_INTENCLR_COMPARE1_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_INTENCLR_COMPARE1_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_INTENCLR_COMPARE1_Clear (1UL) /*!< Disable */
+
+/* Bit 16 : Write '1' to disable interrupt for event COMPARE[0] */
+#define RTC_INTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */
+#define RTC_INTENCLR_COMPARE0_Msk (0x1UL << RTC_INTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */
+#define RTC_INTENCLR_COMPARE0_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_INTENCLR_COMPARE0_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_INTENCLR_COMPARE0_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event OVRFLW */
+#define RTC_INTENCLR_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */
+#define RTC_INTENCLR_OVRFLW_Msk (0x1UL << RTC_INTENCLR_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */
+#define RTC_INTENCLR_OVRFLW_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_INTENCLR_OVRFLW_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_INTENCLR_OVRFLW_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event TICK */
+#define RTC_INTENCLR_TICK_Pos (0UL) /*!< Position of TICK field. */
+#define RTC_INTENCLR_TICK_Msk (0x1UL << RTC_INTENCLR_TICK_Pos) /*!< Bit mask of TICK field. */
+#define RTC_INTENCLR_TICK_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_INTENCLR_TICK_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_INTENCLR_TICK_Clear (1UL) /*!< Disable */
+
+/* Register: RTC_EVTEN */
+/* Description: Enable or disable event routing */
+
+/* Bit 19 : Enable or disable event routing for event COMPARE[3] */
+#define RTC_EVTEN_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */
+#define RTC_EVTEN_COMPARE3_Msk (0x1UL << RTC_EVTEN_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */
+#define RTC_EVTEN_COMPARE3_Disabled (0UL) /*!< Disable */
+#define RTC_EVTEN_COMPARE3_Enabled (1UL) /*!< Disable */
+
+/* Bit 18 : Enable or disable event routing for event COMPARE[2] */
+#define RTC_EVTEN_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */
+#define RTC_EVTEN_COMPARE2_Msk (0x1UL << RTC_EVTEN_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */
+#define RTC_EVTEN_COMPARE2_Disabled (0UL) /*!< Disable */
+#define RTC_EVTEN_COMPARE2_Enabled (1UL) /*!< Disable */
+
+/* Bit 17 : Enable or disable event routing for event COMPARE[1] */
+#define RTC_EVTEN_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */
+#define RTC_EVTEN_COMPARE1_Msk (0x1UL << RTC_EVTEN_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */
+#define RTC_EVTEN_COMPARE1_Disabled (0UL) /*!< Disable */
+#define RTC_EVTEN_COMPARE1_Enabled (1UL) /*!< Disable */
+
+/* Bit 16 : Enable or disable event routing for event COMPARE[0] */
+#define RTC_EVTEN_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */
+#define RTC_EVTEN_COMPARE0_Msk (0x1UL << RTC_EVTEN_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */
+#define RTC_EVTEN_COMPARE0_Disabled (0UL) /*!< Disable */
+#define RTC_EVTEN_COMPARE0_Enabled (1UL) /*!< Disable */
+
+/* Bit 1 : Enable or disable event routing for event OVRFLW */
+#define RTC_EVTEN_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */
+#define RTC_EVTEN_OVRFLW_Msk (0x1UL << RTC_EVTEN_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */
+#define RTC_EVTEN_OVRFLW_Disabled (0UL) /*!< Disable */
+#define RTC_EVTEN_OVRFLW_Enabled (1UL) /*!< Disable */
+
+/* Bit 0 : Enable or disable event routing for event TICK */
+#define RTC_EVTEN_TICK_Pos (0UL) /*!< Position of TICK field. */
+#define RTC_EVTEN_TICK_Msk (0x1UL << RTC_EVTEN_TICK_Pos) /*!< Bit mask of TICK field. */
+#define RTC_EVTEN_TICK_Disabled (0UL) /*!< Disable */
+#define RTC_EVTEN_TICK_Enabled (1UL) /*!< Disable */
+
+/* Register: RTC_EVTENSET */
+/* Description: Enable event routing */
+
+/* Bit 19 : Write '1' to enable event routing for event COMPARE[3] */
+#define RTC_EVTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */
+#define RTC_EVTENSET_COMPARE3_Msk (0x1UL << RTC_EVTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */
+#define RTC_EVTENSET_COMPARE3_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_EVTENSET_COMPARE3_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_EVTENSET_COMPARE3_Set (1UL) /*!< Enable */
+
+/* Bit 18 : Write '1' to enable event routing for event COMPARE[2] */
+#define RTC_EVTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */
+#define RTC_EVTENSET_COMPARE2_Msk (0x1UL << RTC_EVTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */
+#define RTC_EVTENSET_COMPARE2_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_EVTENSET_COMPARE2_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_EVTENSET_COMPARE2_Set (1UL) /*!< Enable */
+
+/* Bit 17 : Write '1' to enable event routing for event COMPARE[1] */
+#define RTC_EVTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */
+#define RTC_EVTENSET_COMPARE1_Msk (0x1UL << RTC_EVTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */
+#define RTC_EVTENSET_COMPARE1_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_EVTENSET_COMPARE1_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_EVTENSET_COMPARE1_Set (1UL) /*!< Enable */
+
+/* Bit 16 : Write '1' to enable event routing for event COMPARE[0] */
+#define RTC_EVTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */
+#define RTC_EVTENSET_COMPARE0_Msk (0x1UL << RTC_EVTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */
+#define RTC_EVTENSET_COMPARE0_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_EVTENSET_COMPARE0_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_EVTENSET_COMPARE0_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable event routing for event OVRFLW */
+#define RTC_EVTENSET_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */
+#define RTC_EVTENSET_OVRFLW_Msk (0x1UL << RTC_EVTENSET_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */
+#define RTC_EVTENSET_OVRFLW_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_EVTENSET_OVRFLW_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_EVTENSET_OVRFLW_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable event routing for event TICK */
+#define RTC_EVTENSET_TICK_Pos (0UL) /*!< Position of TICK field. */
+#define RTC_EVTENSET_TICK_Msk (0x1UL << RTC_EVTENSET_TICK_Pos) /*!< Bit mask of TICK field. */
+#define RTC_EVTENSET_TICK_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_EVTENSET_TICK_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_EVTENSET_TICK_Set (1UL) /*!< Enable */
+
+/* Register: RTC_EVTENCLR */
+/* Description: Disable event routing */
+
+/* Bit 19 : Write '1' to disable event routing for event COMPARE[3] */
+#define RTC_EVTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */
+#define RTC_EVTENCLR_COMPARE3_Msk (0x1UL << RTC_EVTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */
+#define RTC_EVTENCLR_COMPARE3_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_EVTENCLR_COMPARE3_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_EVTENCLR_COMPARE3_Clear (1UL) /*!< Disable */
+
+/* Bit 18 : Write '1' to disable event routing for event COMPARE[2] */
+#define RTC_EVTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */
+#define RTC_EVTENCLR_COMPARE2_Msk (0x1UL << RTC_EVTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */
+#define RTC_EVTENCLR_COMPARE2_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_EVTENCLR_COMPARE2_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_EVTENCLR_COMPARE2_Clear (1UL) /*!< Disable */
+
+/* Bit 17 : Write '1' to disable event routing for event COMPARE[1] */
+#define RTC_EVTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */
+#define RTC_EVTENCLR_COMPARE1_Msk (0x1UL << RTC_EVTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */
+#define RTC_EVTENCLR_COMPARE1_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_EVTENCLR_COMPARE1_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_EVTENCLR_COMPARE1_Clear (1UL) /*!< Disable */
+
+/* Bit 16 : Write '1' to disable event routing for event COMPARE[0] */
+#define RTC_EVTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */
+#define RTC_EVTENCLR_COMPARE0_Msk (0x1UL << RTC_EVTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */
+#define RTC_EVTENCLR_COMPARE0_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_EVTENCLR_COMPARE0_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_EVTENCLR_COMPARE0_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable event routing for event OVRFLW */
+#define RTC_EVTENCLR_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */
+#define RTC_EVTENCLR_OVRFLW_Msk (0x1UL << RTC_EVTENCLR_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */
+#define RTC_EVTENCLR_OVRFLW_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_EVTENCLR_OVRFLW_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_EVTENCLR_OVRFLW_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable event routing for event TICK */
+#define RTC_EVTENCLR_TICK_Pos (0UL) /*!< Position of TICK field. */
+#define RTC_EVTENCLR_TICK_Msk (0x1UL << RTC_EVTENCLR_TICK_Pos) /*!< Bit mask of TICK field. */
+#define RTC_EVTENCLR_TICK_Disabled (0UL) /*!< Read: Disabled */
+#define RTC_EVTENCLR_TICK_Enabled (1UL) /*!< Read: Enabled */
+#define RTC_EVTENCLR_TICK_Clear (1UL) /*!< Disable */
+
+/* Register: RTC_COUNTER */
+/* Description: Current COUNTER value */
+
+/* Bits 23..0 : Counter value */
+#define RTC_COUNTER_COUNTER_Pos (0UL) /*!< Position of COUNTER field. */
+#define RTC_COUNTER_COUNTER_Msk (0xFFFFFFUL << RTC_COUNTER_COUNTER_Pos) /*!< Bit mask of COUNTER field. */
+
+/* Register: RTC_PRESCALER */
+/* Description: 12 bit prescaler for COUNTER frequency (32768/(PRESCALER+1)).Must be written when RTC is stopped */
+
+/* Bits 11..0 : Prescaler value */
+#define RTC_PRESCALER_PRESCALER_Pos (0UL) /*!< Position of PRESCALER field. */
+#define RTC_PRESCALER_PRESCALER_Msk (0xFFFUL << RTC_PRESCALER_PRESCALER_Pos) /*!< Bit mask of PRESCALER field. */
+
+/* Register: RTC_CC */
+/* Description: Description collection: Compare register n */
+
+/* Bits 23..0 : Compare value */
+#define RTC_CC_COMPARE_Pos (0UL) /*!< Position of COMPARE field. */
+#define RTC_CC_COMPARE_Msk (0xFFFFFFUL << RTC_CC_COMPARE_Pos) /*!< Bit mask of COMPARE field. */
+
+
+/* Peripheral: SAADC */
+/* Description: Successive approximation register (SAR) analog-to-digital converter */
+
+/* Register: SAADC_TASKS_START */
+/* Description: Starts the SAADC and prepares the result buffer in RAM */
+
+/* Bit 0 : Starts the SAADC and prepares the result buffer in RAM */
+#define SAADC_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */
+#define SAADC_TASKS_START_TASKS_START_Msk (0x1UL << SAADC_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */
+#define SAADC_TASKS_START_TASKS_START_Trigger (1UL) /*!< Trigger task */
+
+/* Register: SAADC_TASKS_SAMPLE */
+/* Description: Takes one SAADC sample */
+
+/* Bit 0 : Takes one SAADC sample */
+#define SAADC_TASKS_SAMPLE_TASKS_SAMPLE_Pos (0UL) /*!< Position of TASKS_SAMPLE field. */
+#define SAADC_TASKS_SAMPLE_TASKS_SAMPLE_Msk (0x1UL << SAADC_TASKS_SAMPLE_TASKS_SAMPLE_Pos) /*!< Bit mask of TASKS_SAMPLE field. */
+#define SAADC_TASKS_SAMPLE_TASKS_SAMPLE_Trigger (1UL) /*!< Trigger task */
+
+/* Register: SAADC_TASKS_STOP */
+/* Description: Stops the SAADC and terminates all on-going conversions */
+
+/* Bit 0 : Stops the SAADC and terminates all on-going conversions */
+#define SAADC_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define SAADC_TASKS_STOP_TASKS_STOP_Msk (0x1UL << SAADC_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define SAADC_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: SAADC_TASKS_CALIBRATEOFFSET */
+/* Description: Starts offset auto-calibration */
+
+/* Bit 0 : Starts offset auto-calibration */
+#define SAADC_TASKS_CALIBRATEOFFSET_TASKS_CALIBRATEOFFSET_Pos (0UL) /*!< Position of TASKS_CALIBRATEOFFSET field. */
+#define SAADC_TASKS_CALIBRATEOFFSET_TASKS_CALIBRATEOFFSET_Msk (0x1UL << SAADC_TASKS_CALIBRATEOFFSET_TASKS_CALIBRATEOFFSET_Pos) /*!< Bit mask of TASKS_CALIBRATEOFFSET field. */
+#define SAADC_TASKS_CALIBRATEOFFSET_TASKS_CALIBRATEOFFSET_Trigger (1UL) /*!< Trigger task */
+
+/* Register: SAADC_EVENTS_STARTED */
+/* Description: The SAADC has started */
+
+/* Bit 0 : The SAADC has started */
+#define SAADC_EVENTS_STARTED_EVENTS_STARTED_Pos (0UL) /*!< Position of EVENTS_STARTED field. */
+#define SAADC_EVENTS_STARTED_EVENTS_STARTED_Msk (0x1UL << SAADC_EVENTS_STARTED_EVENTS_STARTED_Pos) /*!< Bit mask of EVENTS_STARTED field. */
+#define SAADC_EVENTS_STARTED_EVENTS_STARTED_NotGenerated (0UL) /*!< Event not generated */
+#define SAADC_EVENTS_STARTED_EVENTS_STARTED_Generated (1UL) /*!< Event generated */
+
+/* Register: SAADC_EVENTS_END */
+/* Description: The SAADC has filled up the result buffer */
+
+/* Bit 0 : The SAADC has filled up the result buffer */
+#define SAADC_EVENTS_END_EVENTS_END_Pos (0UL) /*!< Position of EVENTS_END field. */
+#define SAADC_EVENTS_END_EVENTS_END_Msk (0x1UL << SAADC_EVENTS_END_EVENTS_END_Pos) /*!< Bit mask of EVENTS_END field. */
+#define SAADC_EVENTS_END_EVENTS_END_NotGenerated (0UL) /*!< Event not generated */
+#define SAADC_EVENTS_END_EVENTS_END_Generated (1UL) /*!< Event generated */
+
+/* Register: SAADC_EVENTS_DONE */
+/* Description: A conversion task has been completed. Depending on the configuration, multiple conversions might be needed for a result to be transferred to RAM. */
+
+/* Bit 0 : A conversion task has been completed. Depending on the configuration, multiple conversions might be needed for a result to be transferred to RAM. */
+#define SAADC_EVENTS_DONE_EVENTS_DONE_Pos (0UL) /*!< Position of EVENTS_DONE field. */
+#define SAADC_EVENTS_DONE_EVENTS_DONE_Msk (0x1UL << SAADC_EVENTS_DONE_EVENTS_DONE_Pos) /*!< Bit mask of EVENTS_DONE field. */
+#define SAADC_EVENTS_DONE_EVENTS_DONE_NotGenerated (0UL) /*!< Event not generated */
+#define SAADC_EVENTS_DONE_EVENTS_DONE_Generated (1UL) /*!< Event generated */
+
+/* Register: SAADC_EVENTS_RESULTDONE */
+/* Description: Result ready for transfer to RAM */
+
+/* Bit 0 : Result ready for transfer to RAM */
+#define SAADC_EVENTS_RESULTDONE_EVENTS_RESULTDONE_Pos (0UL) /*!< Position of EVENTS_RESULTDONE field. */
+#define SAADC_EVENTS_RESULTDONE_EVENTS_RESULTDONE_Msk (0x1UL << SAADC_EVENTS_RESULTDONE_EVENTS_RESULTDONE_Pos) /*!< Bit mask of EVENTS_RESULTDONE field. */
+#define SAADC_EVENTS_RESULTDONE_EVENTS_RESULTDONE_NotGenerated (0UL) /*!< Event not generated */
+#define SAADC_EVENTS_RESULTDONE_EVENTS_RESULTDONE_Generated (1UL) /*!< Event generated */
+
+/* Register: SAADC_EVENTS_CALIBRATEDONE */
+/* Description: Calibration is complete */
+
+/* Bit 0 : Calibration is complete */
+#define SAADC_EVENTS_CALIBRATEDONE_EVENTS_CALIBRATEDONE_Pos (0UL) /*!< Position of EVENTS_CALIBRATEDONE field. */
+#define SAADC_EVENTS_CALIBRATEDONE_EVENTS_CALIBRATEDONE_Msk (0x1UL << SAADC_EVENTS_CALIBRATEDONE_EVENTS_CALIBRATEDONE_Pos) /*!< Bit mask of EVENTS_CALIBRATEDONE field. */
+#define SAADC_EVENTS_CALIBRATEDONE_EVENTS_CALIBRATEDONE_NotGenerated (0UL) /*!< Event not generated */
+#define SAADC_EVENTS_CALIBRATEDONE_EVENTS_CALIBRATEDONE_Generated (1UL) /*!< Event generated */
+
+/* Register: SAADC_EVENTS_STOPPED */
+/* Description: The SAADC has stopped */
+
+/* Bit 0 : The SAADC has stopped */
+#define SAADC_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */
+#define SAADC_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << SAADC_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */
+#define SAADC_EVENTS_STOPPED_EVENTS_STOPPED_NotGenerated (0UL) /*!< Event not generated */
+#define SAADC_EVENTS_STOPPED_EVENTS_STOPPED_Generated (1UL) /*!< Event generated */
+
+/* Register: SAADC_EVENTS_CH_LIMITH */
+/* Description: Description cluster: Last result is equal or above CH[n].LIMIT.HIGH */
+
+/* Bit 0 : Last result is equal or above CH[n].LIMIT.HIGH */
+#define SAADC_EVENTS_CH_LIMITH_LIMITH_Pos (0UL) /*!< Position of LIMITH field. */
+#define SAADC_EVENTS_CH_LIMITH_LIMITH_Msk (0x1UL << SAADC_EVENTS_CH_LIMITH_LIMITH_Pos) /*!< Bit mask of LIMITH field. */
+#define SAADC_EVENTS_CH_LIMITH_LIMITH_NotGenerated (0UL) /*!< Event not generated */
+#define SAADC_EVENTS_CH_LIMITH_LIMITH_Generated (1UL) /*!< Event generated */
+
+/* Register: SAADC_EVENTS_CH_LIMITL */
+/* Description: Description cluster: Last result is equal or below CH[n].LIMIT.LOW */
+
+/* Bit 0 : Last result is equal or below CH[n].LIMIT.LOW */
+#define SAADC_EVENTS_CH_LIMITL_LIMITL_Pos (0UL) /*!< Position of LIMITL field. */
+#define SAADC_EVENTS_CH_LIMITL_LIMITL_Msk (0x1UL << SAADC_EVENTS_CH_LIMITL_LIMITL_Pos) /*!< Bit mask of LIMITL field. */
+#define SAADC_EVENTS_CH_LIMITL_LIMITL_NotGenerated (0UL) /*!< Event not generated */
+#define SAADC_EVENTS_CH_LIMITL_LIMITL_Generated (1UL) /*!< Event generated */
+
+/* Register: SAADC_INTEN */
+/* Description: Enable or disable interrupt */
+
+/* Bit 21 : Enable or disable interrupt for event CH7LIMITL */
+#define SAADC_INTEN_CH7LIMITL_Pos (21UL) /*!< Position of CH7LIMITL field. */
+#define SAADC_INTEN_CH7LIMITL_Msk (0x1UL << SAADC_INTEN_CH7LIMITL_Pos) /*!< Bit mask of CH7LIMITL field. */
+#define SAADC_INTEN_CH7LIMITL_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH7LIMITL_Enabled (1UL) /*!< Enable */
+
+/* Bit 20 : Enable or disable interrupt for event CH7LIMITH */
+#define SAADC_INTEN_CH7LIMITH_Pos (20UL) /*!< Position of CH7LIMITH field. */
+#define SAADC_INTEN_CH7LIMITH_Msk (0x1UL << SAADC_INTEN_CH7LIMITH_Pos) /*!< Bit mask of CH7LIMITH field. */
+#define SAADC_INTEN_CH7LIMITH_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH7LIMITH_Enabled (1UL) /*!< Enable */
+
+/* Bit 19 : Enable or disable interrupt for event CH6LIMITL */
+#define SAADC_INTEN_CH6LIMITL_Pos (19UL) /*!< Position of CH6LIMITL field. */
+#define SAADC_INTEN_CH6LIMITL_Msk (0x1UL << SAADC_INTEN_CH6LIMITL_Pos) /*!< Bit mask of CH6LIMITL field. */
+#define SAADC_INTEN_CH6LIMITL_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH6LIMITL_Enabled (1UL) /*!< Enable */
+
+/* Bit 18 : Enable or disable interrupt for event CH6LIMITH */
+#define SAADC_INTEN_CH6LIMITH_Pos (18UL) /*!< Position of CH6LIMITH field. */
+#define SAADC_INTEN_CH6LIMITH_Msk (0x1UL << SAADC_INTEN_CH6LIMITH_Pos) /*!< Bit mask of CH6LIMITH field. */
+#define SAADC_INTEN_CH6LIMITH_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH6LIMITH_Enabled (1UL) /*!< Enable */
+
+/* Bit 17 : Enable or disable interrupt for event CH5LIMITL */
+#define SAADC_INTEN_CH5LIMITL_Pos (17UL) /*!< Position of CH5LIMITL field. */
+#define SAADC_INTEN_CH5LIMITL_Msk (0x1UL << SAADC_INTEN_CH5LIMITL_Pos) /*!< Bit mask of CH5LIMITL field. */
+#define SAADC_INTEN_CH5LIMITL_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH5LIMITL_Enabled (1UL) /*!< Enable */
+
+/* Bit 16 : Enable or disable interrupt for event CH5LIMITH */
+#define SAADC_INTEN_CH5LIMITH_Pos (16UL) /*!< Position of CH5LIMITH field. */
+#define SAADC_INTEN_CH5LIMITH_Msk (0x1UL << SAADC_INTEN_CH5LIMITH_Pos) /*!< Bit mask of CH5LIMITH field. */
+#define SAADC_INTEN_CH5LIMITH_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH5LIMITH_Enabled (1UL) /*!< Enable */
+
+/* Bit 15 : Enable or disable interrupt for event CH4LIMITL */
+#define SAADC_INTEN_CH4LIMITL_Pos (15UL) /*!< Position of CH4LIMITL field. */
+#define SAADC_INTEN_CH4LIMITL_Msk (0x1UL << SAADC_INTEN_CH4LIMITL_Pos) /*!< Bit mask of CH4LIMITL field. */
+#define SAADC_INTEN_CH4LIMITL_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH4LIMITL_Enabled (1UL) /*!< Enable */
+
+/* Bit 14 : Enable or disable interrupt for event CH4LIMITH */
+#define SAADC_INTEN_CH4LIMITH_Pos (14UL) /*!< Position of CH4LIMITH field. */
+#define SAADC_INTEN_CH4LIMITH_Msk (0x1UL << SAADC_INTEN_CH4LIMITH_Pos) /*!< Bit mask of CH4LIMITH field. */
+#define SAADC_INTEN_CH4LIMITH_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH4LIMITH_Enabled (1UL) /*!< Enable */
+
+/* Bit 13 : Enable or disable interrupt for event CH3LIMITL */
+#define SAADC_INTEN_CH3LIMITL_Pos (13UL) /*!< Position of CH3LIMITL field. */
+#define SAADC_INTEN_CH3LIMITL_Msk (0x1UL << SAADC_INTEN_CH3LIMITL_Pos) /*!< Bit mask of CH3LIMITL field. */
+#define SAADC_INTEN_CH3LIMITL_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH3LIMITL_Enabled (1UL) /*!< Enable */
+
+/* Bit 12 : Enable or disable interrupt for event CH3LIMITH */
+#define SAADC_INTEN_CH3LIMITH_Pos (12UL) /*!< Position of CH3LIMITH field. */
+#define SAADC_INTEN_CH3LIMITH_Msk (0x1UL << SAADC_INTEN_CH3LIMITH_Pos) /*!< Bit mask of CH3LIMITH field. */
+#define SAADC_INTEN_CH3LIMITH_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH3LIMITH_Enabled (1UL) /*!< Enable */
+
+/* Bit 11 : Enable or disable interrupt for event CH2LIMITL */
+#define SAADC_INTEN_CH2LIMITL_Pos (11UL) /*!< Position of CH2LIMITL field. */
+#define SAADC_INTEN_CH2LIMITL_Msk (0x1UL << SAADC_INTEN_CH2LIMITL_Pos) /*!< Bit mask of CH2LIMITL field. */
+#define SAADC_INTEN_CH2LIMITL_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH2LIMITL_Enabled (1UL) /*!< Enable */
+
+/* Bit 10 : Enable or disable interrupt for event CH2LIMITH */
+#define SAADC_INTEN_CH2LIMITH_Pos (10UL) /*!< Position of CH2LIMITH field. */
+#define SAADC_INTEN_CH2LIMITH_Msk (0x1UL << SAADC_INTEN_CH2LIMITH_Pos) /*!< Bit mask of CH2LIMITH field. */
+#define SAADC_INTEN_CH2LIMITH_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH2LIMITH_Enabled (1UL) /*!< Enable */
+
+/* Bit 9 : Enable or disable interrupt for event CH1LIMITL */
+#define SAADC_INTEN_CH1LIMITL_Pos (9UL) /*!< Position of CH1LIMITL field. */
+#define SAADC_INTEN_CH1LIMITL_Msk (0x1UL << SAADC_INTEN_CH1LIMITL_Pos) /*!< Bit mask of CH1LIMITL field. */
+#define SAADC_INTEN_CH1LIMITL_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH1LIMITL_Enabled (1UL) /*!< Enable */
+
+/* Bit 8 : Enable or disable interrupt for event CH1LIMITH */
+#define SAADC_INTEN_CH1LIMITH_Pos (8UL) /*!< Position of CH1LIMITH field. */
+#define SAADC_INTEN_CH1LIMITH_Msk (0x1UL << SAADC_INTEN_CH1LIMITH_Pos) /*!< Bit mask of CH1LIMITH field. */
+#define SAADC_INTEN_CH1LIMITH_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH1LIMITH_Enabled (1UL) /*!< Enable */
+
+/* Bit 7 : Enable or disable interrupt for event CH0LIMITL */
+#define SAADC_INTEN_CH0LIMITL_Pos (7UL) /*!< Position of CH0LIMITL field. */
+#define SAADC_INTEN_CH0LIMITL_Msk (0x1UL << SAADC_INTEN_CH0LIMITL_Pos) /*!< Bit mask of CH0LIMITL field. */
+#define SAADC_INTEN_CH0LIMITL_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH0LIMITL_Enabled (1UL) /*!< Enable */
+
+/* Bit 6 : Enable or disable interrupt for event CH0LIMITH */
+#define SAADC_INTEN_CH0LIMITH_Pos (6UL) /*!< Position of CH0LIMITH field. */
+#define SAADC_INTEN_CH0LIMITH_Msk (0x1UL << SAADC_INTEN_CH0LIMITH_Pos) /*!< Bit mask of CH0LIMITH field. */
+#define SAADC_INTEN_CH0LIMITH_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CH0LIMITH_Enabled (1UL) /*!< Enable */
+
+/* Bit 5 : Enable or disable interrupt for event STOPPED */
+#define SAADC_INTEN_STOPPED_Pos (5UL) /*!< Position of STOPPED field. */
+#define SAADC_INTEN_STOPPED_Msk (0x1UL << SAADC_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define SAADC_INTEN_STOPPED_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_STOPPED_Enabled (1UL) /*!< Enable */
+
+/* Bit 4 : Enable or disable interrupt for event CALIBRATEDONE */
+#define SAADC_INTEN_CALIBRATEDONE_Pos (4UL) /*!< Position of CALIBRATEDONE field. */
+#define SAADC_INTEN_CALIBRATEDONE_Msk (0x1UL << SAADC_INTEN_CALIBRATEDONE_Pos) /*!< Bit mask of CALIBRATEDONE field. */
+#define SAADC_INTEN_CALIBRATEDONE_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_CALIBRATEDONE_Enabled (1UL) /*!< Enable */
+
+/* Bit 3 : Enable or disable interrupt for event RESULTDONE */
+#define SAADC_INTEN_RESULTDONE_Pos (3UL) /*!< Position of RESULTDONE field. */
+#define SAADC_INTEN_RESULTDONE_Msk (0x1UL << SAADC_INTEN_RESULTDONE_Pos) /*!< Bit mask of RESULTDONE field. */
+#define SAADC_INTEN_RESULTDONE_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_RESULTDONE_Enabled (1UL) /*!< Enable */
+
+/* Bit 2 : Enable or disable interrupt for event DONE */
+#define SAADC_INTEN_DONE_Pos (2UL) /*!< Position of DONE field. */
+#define SAADC_INTEN_DONE_Msk (0x1UL << SAADC_INTEN_DONE_Pos) /*!< Bit mask of DONE field. */
+#define SAADC_INTEN_DONE_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_DONE_Enabled (1UL) /*!< Enable */
+
+/* Bit 1 : Enable or disable interrupt for event END */
+#define SAADC_INTEN_END_Pos (1UL) /*!< Position of END field. */
+#define SAADC_INTEN_END_Msk (0x1UL << SAADC_INTEN_END_Pos) /*!< Bit mask of END field. */
+#define SAADC_INTEN_END_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_END_Enabled (1UL) /*!< Enable */
+
+/* Bit 0 : Enable or disable interrupt for event STARTED */
+#define SAADC_INTEN_STARTED_Pos (0UL) /*!< Position of STARTED field. */
+#define SAADC_INTEN_STARTED_Msk (0x1UL << SAADC_INTEN_STARTED_Pos) /*!< Bit mask of STARTED field. */
+#define SAADC_INTEN_STARTED_Disabled (0UL) /*!< Disable */
+#define SAADC_INTEN_STARTED_Enabled (1UL) /*!< Enable */
+
+/* Register: SAADC_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 21 : Write '1' to enable interrupt for event CH7LIMITL */
+#define SAADC_INTENSET_CH7LIMITL_Pos (21UL) /*!< Position of CH7LIMITL field. */
+#define SAADC_INTENSET_CH7LIMITL_Msk (0x1UL << SAADC_INTENSET_CH7LIMITL_Pos) /*!< Bit mask of CH7LIMITL field. */
+#define SAADC_INTENSET_CH7LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH7LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH7LIMITL_Set (1UL) /*!< Enable */
+
+/* Bit 20 : Write '1' to enable interrupt for event CH7LIMITH */
+#define SAADC_INTENSET_CH7LIMITH_Pos (20UL) /*!< Position of CH7LIMITH field. */
+#define SAADC_INTENSET_CH7LIMITH_Msk (0x1UL << SAADC_INTENSET_CH7LIMITH_Pos) /*!< Bit mask of CH7LIMITH field. */
+#define SAADC_INTENSET_CH7LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH7LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH7LIMITH_Set (1UL) /*!< Enable */
+
+/* Bit 19 : Write '1' to enable interrupt for event CH6LIMITL */
+#define SAADC_INTENSET_CH6LIMITL_Pos (19UL) /*!< Position of CH6LIMITL field. */
+#define SAADC_INTENSET_CH6LIMITL_Msk (0x1UL << SAADC_INTENSET_CH6LIMITL_Pos) /*!< Bit mask of CH6LIMITL field. */
+#define SAADC_INTENSET_CH6LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH6LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH6LIMITL_Set (1UL) /*!< Enable */
+
+/* Bit 18 : Write '1' to enable interrupt for event CH6LIMITH */
+#define SAADC_INTENSET_CH6LIMITH_Pos (18UL) /*!< Position of CH6LIMITH field. */
+#define SAADC_INTENSET_CH6LIMITH_Msk (0x1UL << SAADC_INTENSET_CH6LIMITH_Pos) /*!< Bit mask of CH6LIMITH field. */
+#define SAADC_INTENSET_CH6LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH6LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH6LIMITH_Set (1UL) /*!< Enable */
+
+/* Bit 17 : Write '1' to enable interrupt for event CH5LIMITL */
+#define SAADC_INTENSET_CH5LIMITL_Pos (17UL) /*!< Position of CH5LIMITL field. */
+#define SAADC_INTENSET_CH5LIMITL_Msk (0x1UL << SAADC_INTENSET_CH5LIMITL_Pos) /*!< Bit mask of CH5LIMITL field. */
+#define SAADC_INTENSET_CH5LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH5LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH5LIMITL_Set (1UL) /*!< Enable */
+
+/* Bit 16 : Write '1' to enable interrupt for event CH5LIMITH */
+#define SAADC_INTENSET_CH5LIMITH_Pos (16UL) /*!< Position of CH5LIMITH field. */
+#define SAADC_INTENSET_CH5LIMITH_Msk (0x1UL << SAADC_INTENSET_CH5LIMITH_Pos) /*!< Bit mask of CH5LIMITH field. */
+#define SAADC_INTENSET_CH5LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH5LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH5LIMITH_Set (1UL) /*!< Enable */
+
+/* Bit 15 : Write '1' to enable interrupt for event CH4LIMITL */
+#define SAADC_INTENSET_CH4LIMITL_Pos (15UL) /*!< Position of CH4LIMITL field. */
+#define SAADC_INTENSET_CH4LIMITL_Msk (0x1UL << SAADC_INTENSET_CH4LIMITL_Pos) /*!< Bit mask of CH4LIMITL field. */
+#define SAADC_INTENSET_CH4LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH4LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH4LIMITL_Set (1UL) /*!< Enable */
+
+/* Bit 14 : Write '1' to enable interrupt for event CH4LIMITH */
+#define SAADC_INTENSET_CH4LIMITH_Pos (14UL) /*!< Position of CH4LIMITH field. */
+#define SAADC_INTENSET_CH4LIMITH_Msk (0x1UL << SAADC_INTENSET_CH4LIMITH_Pos) /*!< Bit mask of CH4LIMITH field. */
+#define SAADC_INTENSET_CH4LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH4LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH4LIMITH_Set (1UL) /*!< Enable */
+
+/* Bit 13 : Write '1' to enable interrupt for event CH3LIMITL */
+#define SAADC_INTENSET_CH3LIMITL_Pos (13UL) /*!< Position of CH3LIMITL field. */
+#define SAADC_INTENSET_CH3LIMITL_Msk (0x1UL << SAADC_INTENSET_CH3LIMITL_Pos) /*!< Bit mask of CH3LIMITL field. */
+#define SAADC_INTENSET_CH3LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH3LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH3LIMITL_Set (1UL) /*!< Enable */
+
+/* Bit 12 : Write '1' to enable interrupt for event CH3LIMITH */
+#define SAADC_INTENSET_CH3LIMITH_Pos (12UL) /*!< Position of CH3LIMITH field. */
+#define SAADC_INTENSET_CH3LIMITH_Msk (0x1UL << SAADC_INTENSET_CH3LIMITH_Pos) /*!< Bit mask of CH3LIMITH field. */
+#define SAADC_INTENSET_CH3LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH3LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH3LIMITH_Set (1UL) /*!< Enable */
+
+/* Bit 11 : Write '1' to enable interrupt for event CH2LIMITL */
+#define SAADC_INTENSET_CH2LIMITL_Pos (11UL) /*!< Position of CH2LIMITL field. */
+#define SAADC_INTENSET_CH2LIMITL_Msk (0x1UL << SAADC_INTENSET_CH2LIMITL_Pos) /*!< Bit mask of CH2LIMITL field. */
+#define SAADC_INTENSET_CH2LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH2LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH2LIMITL_Set (1UL) /*!< Enable */
+
+/* Bit 10 : Write '1' to enable interrupt for event CH2LIMITH */
+#define SAADC_INTENSET_CH2LIMITH_Pos (10UL) /*!< Position of CH2LIMITH field. */
+#define SAADC_INTENSET_CH2LIMITH_Msk (0x1UL << SAADC_INTENSET_CH2LIMITH_Pos) /*!< Bit mask of CH2LIMITH field. */
+#define SAADC_INTENSET_CH2LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH2LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH2LIMITH_Set (1UL) /*!< Enable */
+
+/* Bit 9 : Write '1' to enable interrupt for event CH1LIMITL */
+#define SAADC_INTENSET_CH1LIMITL_Pos (9UL) /*!< Position of CH1LIMITL field. */
+#define SAADC_INTENSET_CH1LIMITL_Msk (0x1UL << SAADC_INTENSET_CH1LIMITL_Pos) /*!< Bit mask of CH1LIMITL field. */
+#define SAADC_INTENSET_CH1LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH1LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH1LIMITL_Set (1UL) /*!< Enable */
+
+/* Bit 8 : Write '1' to enable interrupt for event CH1LIMITH */
+#define SAADC_INTENSET_CH1LIMITH_Pos (8UL) /*!< Position of CH1LIMITH field. */
+#define SAADC_INTENSET_CH1LIMITH_Msk (0x1UL << SAADC_INTENSET_CH1LIMITH_Pos) /*!< Bit mask of CH1LIMITH field. */
+#define SAADC_INTENSET_CH1LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH1LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH1LIMITH_Set (1UL) /*!< Enable */
+
+/* Bit 7 : Write '1' to enable interrupt for event CH0LIMITL */
+#define SAADC_INTENSET_CH0LIMITL_Pos (7UL) /*!< Position of CH0LIMITL field. */
+#define SAADC_INTENSET_CH0LIMITL_Msk (0x1UL << SAADC_INTENSET_CH0LIMITL_Pos) /*!< Bit mask of CH0LIMITL field. */
+#define SAADC_INTENSET_CH0LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH0LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH0LIMITL_Set (1UL) /*!< Enable */
+
+/* Bit 6 : Write '1' to enable interrupt for event CH0LIMITH */
+#define SAADC_INTENSET_CH0LIMITH_Pos (6UL) /*!< Position of CH0LIMITH field. */
+#define SAADC_INTENSET_CH0LIMITH_Msk (0x1UL << SAADC_INTENSET_CH0LIMITH_Pos) /*!< Bit mask of CH0LIMITH field. */
+#define SAADC_INTENSET_CH0LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CH0LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CH0LIMITH_Set (1UL) /*!< Enable */
+
+/* Bit 5 : Write '1' to enable interrupt for event STOPPED */
+#define SAADC_INTENSET_STOPPED_Pos (5UL) /*!< Position of STOPPED field. */
+#define SAADC_INTENSET_STOPPED_Msk (0x1UL << SAADC_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define SAADC_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_STOPPED_Set (1UL) /*!< Enable */
+
+/* Bit 4 : Write '1' to enable interrupt for event CALIBRATEDONE */
+#define SAADC_INTENSET_CALIBRATEDONE_Pos (4UL) /*!< Position of CALIBRATEDONE field. */
+#define SAADC_INTENSET_CALIBRATEDONE_Msk (0x1UL << SAADC_INTENSET_CALIBRATEDONE_Pos) /*!< Bit mask of CALIBRATEDONE field. */
+#define SAADC_INTENSET_CALIBRATEDONE_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_CALIBRATEDONE_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_CALIBRATEDONE_Set (1UL) /*!< Enable */
+
+/* Bit 3 : Write '1' to enable interrupt for event RESULTDONE */
+#define SAADC_INTENSET_RESULTDONE_Pos (3UL) /*!< Position of RESULTDONE field. */
+#define SAADC_INTENSET_RESULTDONE_Msk (0x1UL << SAADC_INTENSET_RESULTDONE_Pos) /*!< Bit mask of RESULTDONE field. */
+#define SAADC_INTENSET_RESULTDONE_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_RESULTDONE_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_RESULTDONE_Set (1UL) /*!< Enable */
+
+/* Bit 2 : Write '1' to enable interrupt for event DONE */
+#define SAADC_INTENSET_DONE_Pos (2UL) /*!< Position of DONE field. */
+#define SAADC_INTENSET_DONE_Msk (0x1UL << SAADC_INTENSET_DONE_Pos) /*!< Bit mask of DONE field. */
+#define SAADC_INTENSET_DONE_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_DONE_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_DONE_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event END */
+#define SAADC_INTENSET_END_Pos (1UL) /*!< Position of END field. */
+#define SAADC_INTENSET_END_Msk (0x1UL << SAADC_INTENSET_END_Pos) /*!< Bit mask of END field. */
+#define SAADC_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_END_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event STARTED */
+#define SAADC_INTENSET_STARTED_Pos (0UL) /*!< Position of STARTED field. */
+#define SAADC_INTENSET_STARTED_Msk (0x1UL << SAADC_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */
+#define SAADC_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENSET_STARTED_Set (1UL) /*!< Enable */
+
+/* Register: SAADC_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 21 : Write '1' to disable interrupt for event CH7LIMITL */
+#define SAADC_INTENCLR_CH7LIMITL_Pos (21UL) /*!< Position of CH7LIMITL field. */
+#define SAADC_INTENCLR_CH7LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH7LIMITL_Pos) /*!< Bit mask of CH7LIMITL field. */
+#define SAADC_INTENCLR_CH7LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH7LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH7LIMITL_Clear (1UL) /*!< Disable */
+
+/* Bit 20 : Write '1' to disable interrupt for event CH7LIMITH */
+#define SAADC_INTENCLR_CH7LIMITH_Pos (20UL) /*!< Position of CH7LIMITH field. */
+#define SAADC_INTENCLR_CH7LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH7LIMITH_Pos) /*!< Bit mask of CH7LIMITH field. */
+#define SAADC_INTENCLR_CH7LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH7LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH7LIMITH_Clear (1UL) /*!< Disable */
+
+/* Bit 19 : Write '1' to disable interrupt for event CH6LIMITL */
+#define SAADC_INTENCLR_CH6LIMITL_Pos (19UL) /*!< Position of CH6LIMITL field. */
+#define SAADC_INTENCLR_CH6LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH6LIMITL_Pos) /*!< Bit mask of CH6LIMITL field. */
+#define SAADC_INTENCLR_CH6LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH6LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH6LIMITL_Clear (1UL) /*!< Disable */
+
+/* Bit 18 : Write '1' to disable interrupt for event CH6LIMITH */
+#define SAADC_INTENCLR_CH6LIMITH_Pos (18UL) /*!< Position of CH6LIMITH field. */
+#define SAADC_INTENCLR_CH6LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH6LIMITH_Pos) /*!< Bit mask of CH6LIMITH field. */
+#define SAADC_INTENCLR_CH6LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH6LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH6LIMITH_Clear (1UL) /*!< Disable */
+
+/* Bit 17 : Write '1' to disable interrupt for event CH5LIMITL */
+#define SAADC_INTENCLR_CH5LIMITL_Pos (17UL) /*!< Position of CH5LIMITL field. */
+#define SAADC_INTENCLR_CH5LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH5LIMITL_Pos) /*!< Bit mask of CH5LIMITL field. */
+#define SAADC_INTENCLR_CH5LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH5LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH5LIMITL_Clear (1UL) /*!< Disable */
+
+/* Bit 16 : Write '1' to disable interrupt for event CH5LIMITH */
+#define SAADC_INTENCLR_CH5LIMITH_Pos (16UL) /*!< Position of CH5LIMITH field. */
+#define SAADC_INTENCLR_CH5LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH5LIMITH_Pos) /*!< Bit mask of CH5LIMITH field. */
+#define SAADC_INTENCLR_CH5LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH5LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH5LIMITH_Clear (1UL) /*!< Disable */
+
+/* Bit 15 : Write '1' to disable interrupt for event CH4LIMITL */
+#define SAADC_INTENCLR_CH4LIMITL_Pos (15UL) /*!< Position of CH4LIMITL field. */
+#define SAADC_INTENCLR_CH4LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH4LIMITL_Pos) /*!< Bit mask of CH4LIMITL field. */
+#define SAADC_INTENCLR_CH4LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH4LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH4LIMITL_Clear (1UL) /*!< Disable */
+
+/* Bit 14 : Write '1' to disable interrupt for event CH4LIMITH */
+#define SAADC_INTENCLR_CH4LIMITH_Pos (14UL) /*!< Position of CH4LIMITH field. */
+#define SAADC_INTENCLR_CH4LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH4LIMITH_Pos) /*!< Bit mask of CH4LIMITH field. */
+#define SAADC_INTENCLR_CH4LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH4LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH4LIMITH_Clear (1UL) /*!< Disable */
+
+/* Bit 13 : Write '1' to disable interrupt for event CH3LIMITL */
+#define SAADC_INTENCLR_CH3LIMITL_Pos (13UL) /*!< Position of CH3LIMITL field. */
+#define SAADC_INTENCLR_CH3LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH3LIMITL_Pos) /*!< Bit mask of CH3LIMITL field. */
+#define SAADC_INTENCLR_CH3LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH3LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH3LIMITL_Clear (1UL) /*!< Disable */
+
+/* Bit 12 : Write '1' to disable interrupt for event CH3LIMITH */
+#define SAADC_INTENCLR_CH3LIMITH_Pos (12UL) /*!< Position of CH3LIMITH field. */
+#define SAADC_INTENCLR_CH3LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH3LIMITH_Pos) /*!< Bit mask of CH3LIMITH field. */
+#define SAADC_INTENCLR_CH3LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH3LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH3LIMITH_Clear (1UL) /*!< Disable */
+
+/* Bit 11 : Write '1' to disable interrupt for event CH2LIMITL */
+#define SAADC_INTENCLR_CH2LIMITL_Pos (11UL) /*!< Position of CH2LIMITL field. */
+#define SAADC_INTENCLR_CH2LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH2LIMITL_Pos) /*!< Bit mask of CH2LIMITL field. */
+#define SAADC_INTENCLR_CH2LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH2LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH2LIMITL_Clear (1UL) /*!< Disable */
+
+/* Bit 10 : Write '1' to disable interrupt for event CH2LIMITH */
+#define SAADC_INTENCLR_CH2LIMITH_Pos (10UL) /*!< Position of CH2LIMITH field. */
+#define SAADC_INTENCLR_CH2LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH2LIMITH_Pos) /*!< Bit mask of CH2LIMITH field. */
+#define SAADC_INTENCLR_CH2LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH2LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH2LIMITH_Clear (1UL) /*!< Disable */
+
+/* Bit 9 : Write '1' to disable interrupt for event CH1LIMITL */
+#define SAADC_INTENCLR_CH1LIMITL_Pos (9UL) /*!< Position of CH1LIMITL field. */
+#define SAADC_INTENCLR_CH1LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH1LIMITL_Pos) /*!< Bit mask of CH1LIMITL field. */
+#define SAADC_INTENCLR_CH1LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH1LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH1LIMITL_Clear (1UL) /*!< Disable */
+
+/* Bit 8 : Write '1' to disable interrupt for event CH1LIMITH */
+#define SAADC_INTENCLR_CH1LIMITH_Pos (8UL) /*!< Position of CH1LIMITH field. */
+#define SAADC_INTENCLR_CH1LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH1LIMITH_Pos) /*!< Bit mask of CH1LIMITH field. */
+#define SAADC_INTENCLR_CH1LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH1LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH1LIMITH_Clear (1UL) /*!< Disable */
+
+/* Bit 7 : Write '1' to disable interrupt for event CH0LIMITL */
+#define SAADC_INTENCLR_CH0LIMITL_Pos (7UL) /*!< Position of CH0LIMITL field. */
+#define SAADC_INTENCLR_CH0LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH0LIMITL_Pos) /*!< Bit mask of CH0LIMITL field. */
+#define SAADC_INTENCLR_CH0LIMITL_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH0LIMITL_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH0LIMITL_Clear (1UL) /*!< Disable */
+
+/* Bit 6 : Write '1' to disable interrupt for event CH0LIMITH */
+#define SAADC_INTENCLR_CH0LIMITH_Pos (6UL) /*!< Position of CH0LIMITH field. */
+#define SAADC_INTENCLR_CH0LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH0LIMITH_Pos) /*!< Bit mask of CH0LIMITH field. */
+#define SAADC_INTENCLR_CH0LIMITH_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CH0LIMITH_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CH0LIMITH_Clear (1UL) /*!< Disable */
+
+/* Bit 5 : Write '1' to disable interrupt for event STOPPED */
+#define SAADC_INTENCLR_STOPPED_Pos (5UL) /*!< Position of STOPPED field. */
+#define SAADC_INTENCLR_STOPPED_Msk (0x1UL << SAADC_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define SAADC_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */
+
+/* Bit 4 : Write '1' to disable interrupt for event CALIBRATEDONE */
+#define SAADC_INTENCLR_CALIBRATEDONE_Pos (4UL) /*!< Position of CALIBRATEDONE field. */
+#define SAADC_INTENCLR_CALIBRATEDONE_Msk (0x1UL << SAADC_INTENCLR_CALIBRATEDONE_Pos) /*!< Bit mask of CALIBRATEDONE field. */
+#define SAADC_INTENCLR_CALIBRATEDONE_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_CALIBRATEDONE_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_CALIBRATEDONE_Clear (1UL) /*!< Disable */
+
+/* Bit 3 : Write '1' to disable interrupt for event RESULTDONE */
+#define SAADC_INTENCLR_RESULTDONE_Pos (3UL) /*!< Position of RESULTDONE field. */
+#define SAADC_INTENCLR_RESULTDONE_Msk (0x1UL << SAADC_INTENCLR_RESULTDONE_Pos) /*!< Bit mask of RESULTDONE field. */
+#define SAADC_INTENCLR_RESULTDONE_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_RESULTDONE_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_RESULTDONE_Clear (1UL) /*!< Disable */
+
+/* Bit 2 : Write '1' to disable interrupt for event DONE */
+#define SAADC_INTENCLR_DONE_Pos (2UL) /*!< Position of DONE field. */
+#define SAADC_INTENCLR_DONE_Msk (0x1UL << SAADC_INTENCLR_DONE_Pos) /*!< Bit mask of DONE field. */
+#define SAADC_INTENCLR_DONE_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_DONE_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_DONE_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event END */
+#define SAADC_INTENCLR_END_Pos (1UL) /*!< Position of END field. */
+#define SAADC_INTENCLR_END_Msk (0x1UL << SAADC_INTENCLR_END_Pos) /*!< Bit mask of END field. */
+#define SAADC_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_END_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event STARTED */
+#define SAADC_INTENCLR_STARTED_Pos (0UL) /*!< Position of STARTED field. */
+#define SAADC_INTENCLR_STARTED_Msk (0x1UL << SAADC_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */
+#define SAADC_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */
+#define SAADC_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */
+#define SAADC_INTENCLR_STARTED_Clear (1UL) /*!< Disable */
+
+/* Register: SAADC_STATUS */
+/* Description: Status */
+
+/* Bit 0 : Status */
+#define SAADC_STATUS_STATUS_Pos (0UL) /*!< Position of STATUS field. */
+#define SAADC_STATUS_STATUS_Msk (0x1UL << SAADC_STATUS_STATUS_Pos) /*!< Bit mask of STATUS field. */
+#define SAADC_STATUS_STATUS_Ready (0UL) /*!< SAADC is ready. No on-going conversions. */
+#define SAADC_STATUS_STATUS_Busy (1UL) /*!< SAADC is busy. Conversion in progress. */
+
+/* Register: SAADC_ENABLE */
+/* Description: Enable or disable SAADC */
+
+/* Bit 0 : Enable or disable SAADC */
+#define SAADC_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define SAADC_ENABLE_ENABLE_Msk (0x1UL << SAADC_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define SAADC_ENABLE_ENABLE_Disabled (0UL) /*!< Disable SAADC */
+#define SAADC_ENABLE_ENABLE_Enabled (1UL) /*!< Enable SAADC */
+
+/* Register: SAADC_CH_PSELP */
+/* Description: Description cluster: Input positive pin selection for CH[n] */
+
+/* Bits 4..0 : Analog positive input channel */
+#define SAADC_CH_PSELP_PSELP_Pos (0UL) /*!< Position of PSELP field. */
+#define SAADC_CH_PSELP_PSELP_Msk (0x1FUL << SAADC_CH_PSELP_PSELP_Pos) /*!< Bit mask of PSELP field. */
+#define SAADC_CH_PSELP_PSELP_NC (0UL) /*!< Not connected */
+#define SAADC_CH_PSELP_PSELP_AnalogInput0 (1UL) /*!< AIN0 */
+#define SAADC_CH_PSELP_PSELP_AnalogInput1 (2UL) /*!< AIN1 */
+#define SAADC_CH_PSELP_PSELP_AnalogInput2 (3UL) /*!< AIN2 */
+#define SAADC_CH_PSELP_PSELP_AnalogInput3 (4UL) /*!< AIN3 */
+#define SAADC_CH_PSELP_PSELP_AnalogInput4 (5UL) /*!< AIN4 */
+#define SAADC_CH_PSELP_PSELP_AnalogInput5 (6UL) /*!< AIN5 */
+#define SAADC_CH_PSELP_PSELP_AnalogInput6 (7UL) /*!< AIN6 */
+#define SAADC_CH_PSELP_PSELP_AnalogInput7 (8UL) /*!< AIN7 */
+#define SAADC_CH_PSELP_PSELP_VDD (9UL) /*!< VDD */
+#define SAADC_CH_PSELP_PSELP_VDDHDIV5 (0x0DUL) /*!< VDDH/5 */
+
+/* Register: SAADC_CH_PSELN */
+/* Description: Description cluster: Input negative pin selection for CH[n] */
+
+/* Bits 4..0 : Analog negative input, enables differential channel */
+#define SAADC_CH_PSELN_PSELN_Pos (0UL) /*!< Position of PSELN field. */
+#define SAADC_CH_PSELN_PSELN_Msk (0x1FUL << SAADC_CH_PSELN_PSELN_Pos) /*!< Bit mask of PSELN field. */
+#define SAADC_CH_PSELN_PSELN_NC (0UL) /*!< Not connected */
+#define SAADC_CH_PSELN_PSELN_AnalogInput0 (1UL) /*!< AIN0 */
+#define SAADC_CH_PSELN_PSELN_AnalogInput1 (2UL) /*!< AIN1 */
+#define SAADC_CH_PSELN_PSELN_AnalogInput2 (3UL) /*!< AIN2 */
+#define SAADC_CH_PSELN_PSELN_AnalogInput3 (4UL) /*!< AIN3 */
+#define SAADC_CH_PSELN_PSELN_AnalogInput4 (5UL) /*!< AIN4 */
+#define SAADC_CH_PSELN_PSELN_AnalogInput5 (6UL) /*!< AIN5 */
+#define SAADC_CH_PSELN_PSELN_AnalogInput6 (7UL) /*!< AIN6 */
+#define SAADC_CH_PSELN_PSELN_AnalogInput7 (8UL) /*!< AIN7 */
+#define SAADC_CH_PSELN_PSELN_VDD (9UL) /*!< VDD */
+#define SAADC_CH_PSELN_PSELN_VDDHDIV5 (0x0DUL) /*!< VDDH/5 */
+
+/* Register: SAADC_CH_CONFIG */
+/* Description: Description cluster: Input configuration for CH[n] */
+
+/* Bit 24 : Enable burst mode */
+#define SAADC_CH_CONFIG_BURST_Pos (24UL) /*!< Position of BURST field. */
+#define SAADC_CH_CONFIG_BURST_Msk (0x1UL << SAADC_CH_CONFIG_BURST_Pos) /*!< Bit mask of BURST field. */
+#define SAADC_CH_CONFIG_BURST_Disabled (0UL) /*!< Burst mode is disabled (normal operation) */
+#define SAADC_CH_CONFIG_BURST_Enabled (1UL) /*!< Burst mode is enabled. SAADC takes 2^OVERSAMPLE number of samples as fast as it can, and sends the average to Data RAM. */
+
+/* Bit 20 : Enable differential mode */
+#define SAADC_CH_CONFIG_MODE_Pos (20UL) /*!< Position of MODE field. */
+#define SAADC_CH_CONFIG_MODE_Msk (0x1UL << SAADC_CH_CONFIG_MODE_Pos) /*!< Bit mask of MODE field. */
+#define SAADC_CH_CONFIG_MODE_SE (0UL) /*!< Single-ended, PSELN will be ignored, negative input to SAADC shorted to GND */
+#define SAADC_CH_CONFIG_MODE_Diff (1UL) /*!< Differential */
+
+/* Bits 18..16 : Acquisition time, the time the SAADC uses to sample the input voltage */
+#define SAADC_CH_CONFIG_TACQ_Pos (16UL) /*!< Position of TACQ field. */
+#define SAADC_CH_CONFIG_TACQ_Msk (0x7UL << SAADC_CH_CONFIG_TACQ_Pos) /*!< Bit mask of TACQ field. */
+#define SAADC_CH_CONFIG_TACQ_3us (0UL) /*!< 3 us */
+#define SAADC_CH_CONFIG_TACQ_5us (1UL) /*!< 5 us */
+#define SAADC_CH_CONFIG_TACQ_10us (2UL) /*!< 10 us */
+#define SAADC_CH_CONFIG_TACQ_15us (3UL) /*!< 15 us */
+#define SAADC_CH_CONFIG_TACQ_20us (4UL) /*!< 20 us */
+#define SAADC_CH_CONFIG_TACQ_40us (5UL) /*!< 40 us */
+
+/* Bit 12 : Reference control */
+#define SAADC_CH_CONFIG_REFSEL_Pos (12UL) /*!< Position of REFSEL field. */
+#define SAADC_CH_CONFIG_REFSEL_Msk (0x1UL << SAADC_CH_CONFIG_REFSEL_Pos) /*!< Bit mask of REFSEL field. */
+#define SAADC_CH_CONFIG_REFSEL_Internal (0UL) /*!< Internal reference (0.6 V) */
+#define SAADC_CH_CONFIG_REFSEL_VDD1_4 (1UL) /*!< VDD/4 as reference */
+
+/* Bits 10..8 : Gain control */
+#define SAADC_CH_CONFIG_GAIN_Pos (8UL) /*!< Position of GAIN field. */
+#define SAADC_CH_CONFIG_GAIN_Msk (0x7UL << SAADC_CH_CONFIG_GAIN_Pos) /*!< Bit mask of GAIN field. */
+#define SAADC_CH_CONFIG_GAIN_Gain1_6 (0UL) /*!< 1/6 */
+#define SAADC_CH_CONFIG_GAIN_Gain1_5 (1UL) /*!< 1/5 */
+#define SAADC_CH_CONFIG_GAIN_Gain1_4 (2UL) /*!< 1/4 */
+#define SAADC_CH_CONFIG_GAIN_Gain1_3 (3UL) /*!< 1/3 */
+#define SAADC_CH_CONFIG_GAIN_Gain1_2 (4UL) /*!< 1/2 */
+#define SAADC_CH_CONFIG_GAIN_Gain1 (5UL) /*!< 1 */
+#define SAADC_CH_CONFIG_GAIN_Gain2 (6UL) /*!< 2 */
+#define SAADC_CH_CONFIG_GAIN_Gain4 (7UL) /*!< 4 */
+
+/* Bits 5..4 : Negative channel resistor control */
+#define SAADC_CH_CONFIG_RESN_Pos (4UL) /*!< Position of RESN field. */
+#define SAADC_CH_CONFIG_RESN_Msk (0x3UL << SAADC_CH_CONFIG_RESN_Pos) /*!< Bit mask of RESN field. */
+#define SAADC_CH_CONFIG_RESN_Bypass (0UL) /*!< Bypass resistor ladder */
+#define SAADC_CH_CONFIG_RESN_Pulldown (1UL) /*!< Pull-down to GND */
+#define SAADC_CH_CONFIG_RESN_Pullup (2UL) /*!< Pull-up to VDD */
+#define SAADC_CH_CONFIG_RESN_VDD1_2 (3UL) /*!< Set input at VDD/2 */
+
+/* Bits 1..0 : Positive channel resistor control */
+#define SAADC_CH_CONFIG_RESP_Pos (0UL) /*!< Position of RESP field. */
+#define SAADC_CH_CONFIG_RESP_Msk (0x3UL << SAADC_CH_CONFIG_RESP_Pos) /*!< Bit mask of RESP field. */
+#define SAADC_CH_CONFIG_RESP_Bypass (0UL) /*!< Bypass resistor ladder */
+#define SAADC_CH_CONFIG_RESP_Pulldown (1UL) /*!< Pull-down to GND */
+#define SAADC_CH_CONFIG_RESP_Pullup (2UL) /*!< Pull-up to VDD */
+#define SAADC_CH_CONFIG_RESP_VDD1_2 (3UL) /*!< Set input at VDD/2 */
+
+/* Register: SAADC_CH_LIMIT */
+/* Description: Description cluster: High/low limits for event monitoring of a channel */
+
+/* Bits 31..16 : High level limit */
+#define SAADC_CH_LIMIT_HIGH_Pos (16UL) /*!< Position of HIGH field. */
+#define SAADC_CH_LIMIT_HIGH_Msk (0xFFFFUL << SAADC_CH_LIMIT_HIGH_Pos) /*!< Bit mask of HIGH field. */
+
+/* Bits 15..0 : Low level limit */
+#define SAADC_CH_LIMIT_LOW_Pos (0UL) /*!< Position of LOW field. */
+#define SAADC_CH_LIMIT_LOW_Msk (0xFFFFUL << SAADC_CH_LIMIT_LOW_Pos) /*!< Bit mask of LOW field. */
+
+/* Register: SAADC_RESOLUTION */
+/* Description: Resolution configuration */
+
+/* Bits 2..0 : Set the resolution */
+#define SAADC_RESOLUTION_VAL_Pos (0UL) /*!< Position of VAL field. */
+#define SAADC_RESOLUTION_VAL_Msk (0x7UL << SAADC_RESOLUTION_VAL_Pos) /*!< Bit mask of VAL field. */
+#define SAADC_RESOLUTION_VAL_8bit (0UL) /*!< 8 bits */
+#define SAADC_RESOLUTION_VAL_10bit (1UL) /*!< 10 bits */
+#define SAADC_RESOLUTION_VAL_12bit (2UL) /*!< 12 bits */
+#define SAADC_RESOLUTION_VAL_14bit (3UL) /*!< 14 bits */
+
+/* Register: SAADC_OVERSAMPLE */
+/* Description: Oversampling configuration. The RESOLUTION is applied before averaging, thus for high OVERSAMPLE a higher RESOLUTION should be used. */
+
+/* Bits 3..0 : Oversample control */
+#define SAADC_OVERSAMPLE_OVERSAMPLE_Pos (0UL) /*!< Position of OVERSAMPLE field. */
+#define SAADC_OVERSAMPLE_OVERSAMPLE_Msk (0xFUL << SAADC_OVERSAMPLE_OVERSAMPLE_Pos) /*!< Bit mask of OVERSAMPLE field. */
+#define SAADC_OVERSAMPLE_OVERSAMPLE_Bypass (0UL) /*!< Bypass oversampling */
+#define SAADC_OVERSAMPLE_OVERSAMPLE_Over2x (1UL) /*!< Oversample 2x */
+#define SAADC_OVERSAMPLE_OVERSAMPLE_Over4x (2UL) /*!< Oversample 4x */
+#define SAADC_OVERSAMPLE_OVERSAMPLE_Over8x (3UL) /*!< Oversample 8x */
+#define SAADC_OVERSAMPLE_OVERSAMPLE_Over16x (4UL) /*!< Oversample 16x */
+#define SAADC_OVERSAMPLE_OVERSAMPLE_Over32x (5UL) /*!< Oversample 32x */
+#define SAADC_OVERSAMPLE_OVERSAMPLE_Over64x (6UL) /*!< Oversample 64x */
+#define SAADC_OVERSAMPLE_OVERSAMPLE_Over128x (7UL) /*!< Oversample 128x */
+#define SAADC_OVERSAMPLE_OVERSAMPLE_Over256x (8UL) /*!< Oversample 256x */
+
+/* Register: SAADC_SAMPLERATE */
+/* Description: Controls normal or continuous sample rate */
+
+/* Bit 12 : Select mode for sample rate control */
+#define SAADC_SAMPLERATE_MODE_Pos (12UL) /*!< Position of MODE field. */
+#define SAADC_SAMPLERATE_MODE_Msk (0x1UL << SAADC_SAMPLERATE_MODE_Pos) /*!< Bit mask of MODE field. */
+#define SAADC_SAMPLERATE_MODE_Task (0UL) /*!< Rate is controlled from SAMPLE task */
+#define SAADC_SAMPLERATE_MODE_Timers (1UL) /*!< Rate is controlled from local timer (use CC to control the rate) */
+
+/* Bits 10..0 : Capture and compare value. Sample rate is 16 MHz/CC */
+#define SAADC_SAMPLERATE_CC_Pos (0UL) /*!< Position of CC field. */
+#define SAADC_SAMPLERATE_CC_Msk (0x7FFUL << SAADC_SAMPLERATE_CC_Pos) /*!< Bit mask of CC field. */
+
+/* Register: SAADC_RESULT_PTR */
+/* Description: Data pointer */
+
+/* Bits 31..0 : Data pointer */
+#define SAADC_RESULT_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define SAADC_RESULT_PTR_PTR_Msk (0xFFFFFFFFUL << SAADC_RESULT_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: SAADC_RESULT_MAXCNT */
+/* Description: Maximum number of 16-bit samples to be written to output RAM buffer */
+
+/* Bits 14..0 : Maximum number of 16-bit samples to be written to output RAM buffer */
+#define SAADC_RESULT_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define SAADC_RESULT_MAXCNT_MAXCNT_Msk (0x7FFFUL << SAADC_RESULT_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: SAADC_RESULT_AMOUNT */
+/* Description: Number of 16-bit samples written to output RAM buffer since the previous START task */
+
+/* Bits 14..0 : Number of 16-bit samples written to output RAM buffer since the previous START task. This register can be read after an END or STOPPED event. */
+#define SAADC_RESULT_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define SAADC_RESULT_AMOUNT_AMOUNT_Msk (0x7FFFUL << SAADC_RESULT_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+
+/* Peripheral: SPI */
+/* Description: Serial Peripheral Interface 0 */
+
+/* Register: SPI_EVENTS_READY */
+/* Description: TXD byte sent and RXD byte received */
+
+/* Bit 0 : TXD byte sent and RXD byte received */
+#define SPI_EVENTS_READY_EVENTS_READY_Pos (0UL) /*!< Position of EVENTS_READY field. */
+#define SPI_EVENTS_READY_EVENTS_READY_Msk (0x1UL << SPI_EVENTS_READY_EVENTS_READY_Pos) /*!< Bit mask of EVENTS_READY field. */
+#define SPI_EVENTS_READY_EVENTS_READY_NotGenerated (0UL) /*!< Event not generated */
+#define SPI_EVENTS_READY_EVENTS_READY_Generated (1UL) /*!< Event generated */
+
+/* Register: SPI_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 2 : Write '1' to enable interrupt for event READY */
+#define SPI_INTENSET_READY_Pos (2UL) /*!< Position of READY field. */
+#define SPI_INTENSET_READY_Msk (0x1UL << SPI_INTENSET_READY_Pos) /*!< Bit mask of READY field. */
+#define SPI_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */
+#define SPI_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */
+#define SPI_INTENSET_READY_Set (1UL) /*!< Enable */
+
+/* Register: SPI_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 2 : Write '1' to disable interrupt for event READY */
+#define SPI_INTENCLR_READY_Pos (2UL) /*!< Position of READY field. */
+#define SPI_INTENCLR_READY_Msk (0x1UL << SPI_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */
+#define SPI_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */
+#define SPI_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */
+#define SPI_INTENCLR_READY_Clear (1UL) /*!< Disable */
+
+/* Register: SPI_ENABLE */
+/* Description: Enable SPI */
+
+/* Bits 3..0 : Enable or disable SPI */
+#define SPI_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define SPI_ENABLE_ENABLE_Msk (0xFUL << SPI_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define SPI_ENABLE_ENABLE_Disabled (0UL) /*!< Disable SPI */
+#define SPI_ENABLE_ENABLE_Enabled (1UL) /*!< Enable SPI */
+
+/* Register: SPI_PSEL_SCK */
+/* Description: Pin select for SCK */
+
+/* Bit 31 : Connection */
+#define SPI_PSEL_SCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define SPI_PSEL_SCK_CONNECT_Msk (0x1UL << SPI_PSEL_SCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define SPI_PSEL_SCK_CONNECT_Connected (0UL) /*!< Connect */
+#define SPI_PSEL_SCK_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define SPI_PSEL_SCK_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define SPI_PSEL_SCK_PORT_Msk (0x1UL << SPI_PSEL_SCK_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define SPI_PSEL_SCK_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define SPI_PSEL_SCK_PIN_Msk (0x1FUL << SPI_PSEL_SCK_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: SPI_PSEL_MOSI */
+/* Description: Pin select for MOSI signal */
+
+/* Bit 31 : Connection */
+#define SPI_PSEL_MOSI_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define SPI_PSEL_MOSI_CONNECT_Msk (0x1UL << SPI_PSEL_MOSI_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define SPI_PSEL_MOSI_CONNECT_Connected (0UL) /*!< Connect */
+#define SPI_PSEL_MOSI_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define SPI_PSEL_MOSI_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define SPI_PSEL_MOSI_PORT_Msk (0x1UL << SPI_PSEL_MOSI_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define SPI_PSEL_MOSI_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define SPI_PSEL_MOSI_PIN_Msk (0x1FUL << SPI_PSEL_MOSI_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: SPI_PSEL_MISO */
+/* Description: Pin select for MISO signal */
+
+/* Bit 31 : Connection */
+#define SPI_PSEL_MISO_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define SPI_PSEL_MISO_CONNECT_Msk (0x1UL << SPI_PSEL_MISO_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define SPI_PSEL_MISO_CONNECT_Connected (0UL) /*!< Connect */
+#define SPI_PSEL_MISO_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define SPI_PSEL_MISO_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define SPI_PSEL_MISO_PORT_Msk (0x1UL << SPI_PSEL_MISO_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define SPI_PSEL_MISO_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define SPI_PSEL_MISO_PIN_Msk (0x1FUL << SPI_PSEL_MISO_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: SPI_RXD */
+/* Description: RXD register */
+
+/* Bits 7..0 : RX data received. Double buffered */
+#define SPI_RXD_RXD_Pos (0UL) /*!< Position of RXD field. */
+#define SPI_RXD_RXD_Msk (0xFFUL << SPI_RXD_RXD_Pos) /*!< Bit mask of RXD field. */
+
+/* Register: SPI_TXD */
+/* Description: TXD register */
+
+/* Bits 7..0 : TX data to send. Double buffered */
+#define SPI_TXD_TXD_Pos (0UL) /*!< Position of TXD field. */
+#define SPI_TXD_TXD_Msk (0xFFUL << SPI_TXD_TXD_Pos) /*!< Bit mask of TXD field. */
+
+/* Register: SPI_FREQUENCY */
+/* Description: SPI frequency. Accuracy depends on the HFCLK source selected. */
+
+/* Bits 31..0 : SPI master data rate */
+#define SPI_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */
+#define SPI_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << SPI_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */
+#define SPI_FREQUENCY_FREQUENCY_K125 (0x02000000UL) /*!< 125 kbps */
+#define SPI_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps */
+#define SPI_FREQUENCY_FREQUENCY_K500 (0x08000000UL) /*!< 500 kbps */
+#define SPI_FREQUENCY_FREQUENCY_M1 (0x10000000UL) /*!< 1 Mbps */
+#define SPI_FREQUENCY_FREQUENCY_M2 (0x20000000UL) /*!< 2 Mbps */
+#define SPI_FREQUENCY_FREQUENCY_M4 (0x40000000UL) /*!< 4 Mbps */
+#define SPI_FREQUENCY_FREQUENCY_M8 (0x80000000UL) /*!< 8 Mbps */
+
+/* Register: SPI_CONFIG */
+/* Description: Configuration register */
+
+/* Bit 2 : Serial clock (SCK) polarity */
+#define SPI_CONFIG_CPOL_Pos (2UL) /*!< Position of CPOL field. */
+#define SPI_CONFIG_CPOL_Msk (0x1UL << SPI_CONFIG_CPOL_Pos) /*!< Bit mask of CPOL field. */
+#define SPI_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high */
+#define SPI_CONFIG_CPOL_ActiveLow (1UL) /*!< Active low */
+
+/* Bit 1 : Serial clock (SCK) phase */
+#define SPI_CONFIG_CPHA_Pos (1UL) /*!< Position of CPHA field. */
+#define SPI_CONFIG_CPHA_Msk (0x1UL << SPI_CONFIG_CPHA_Pos) /*!< Bit mask of CPHA field. */
+#define SPI_CONFIG_CPHA_Leading (0UL) /*!< Sample on leading edge of clock, shift serial data on trailing edge */
+#define SPI_CONFIG_CPHA_Trailing (1UL) /*!< Sample on trailing edge of clock, shift serial data on leading edge */
+
+/* Bit 0 : Bit order */
+#define SPI_CONFIG_ORDER_Pos (0UL) /*!< Position of ORDER field. */
+#define SPI_CONFIG_ORDER_Msk (0x1UL << SPI_CONFIG_ORDER_Pos) /*!< Bit mask of ORDER field. */
+#define SPI_CONFIG_ORDER_MsbFirst (0UL) /*!< Most significant bit shifted out first */
+#define SPI_CONFIG_ORDER_LsbFirst (1UL) /*!< Least significant bit shifted out first */
+
+
+/* Peripheral: SPIM */
+/* Description: Serial Peripheral Interface Master with EasyDMA 0 */
+
+/* Register: SPIM_TASKS_START */
+/* Description: Start SPI transaction */
+
+/* Bit 0 : Start SPI transaction */
+#define SPIM_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */
+#define SPIM_TASKS_START_TASKS_START_Msk (0x1UL << SPIM_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */
+#define SPIM_TASKS_START_TASKS_START_Trigger (1UL) /*!< Trigger task */
+
+/* Register: SPIM_TASKS_STOP */
+/* Description: Stop SPI transaction */
+
+/* Bit 0 : Stop SPI transaction */
+#define SPIM_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define SPIM_TASKS_STOP_TASKS_STOP_Msk (0x1UL << SPIM_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define SPIM_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: SPIM_TASKS_SUSPEND */
+/* Description: Suspend SPI transaction */
+
+/* Bit 0 : Suspend SPI transaction */
+#define SPIM_TASKS_SUSPEND_TASKS_SUSPEND_Pos (0UL) /*!< Position of TASKS_SUSPEND field. */
+#define SPIM_TASKS_SUSPEND_TASKS_SUSPEND_Msk (0x1UL << SPIM_TASKS_SUSPEND_TASKS_SUSPEND_Pos) /*!< Bit mask of TASKS_SUSPEND field. */
+#define SPIM_TASKS_SUSPEND_TASKS_SUSPEND_Trigger (1UL) /*!< Trigger task */
+
+/* Register: SPIM_TASKS_RESUME */
+/* Description: Resume SPI transaction */
+
+/* Bit 0 : Resume SPI transaction */
+#define SPIM_TASKS_RESUME_TASKS_RESUME_Pos (0UL) /*!< Position of TASKS_RESUME field. */
+#define SPIM_TASKS_RESUME_TASKS_RESUME_Msk (0x1UL << SPIM_TASKS_RESUME_TASKS_RESUME_Pos) /*!< Bit mask of TASKS_RESUME field. */
+#define SPIM_TASKS_RESUME_TASKS_RESUME_Trigger (1UL) /*!< Trigger task */
+
+/* Register: SPIM_EVENTS_STOPPED */
+/* Description: SPI transaction has stopped */
+
+/* Bit 0 : SPI transaction has stopped */
+#define SPIM_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */
+#define SPIM_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << SPIM_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */
+#define SPIM_EVENTS_STOPPED_EVENTS_STOPPED_NotGenerated (0UL) /*!< Event not generated */
+#define SPIM_EVENTS_STOPPED_EVENTS_STOPPED_Generated (1UL) /*!< Event generated */
+
+/* Register: SPIM_EVENTS_ENDRX */
+/* Description: End of RXD buffer reached */
+
+/* Bit 0 : End of RXD buffer reached */
+#define SPIM_EVENTS_ENDRX_EVENTS_ENDRX_Pos (0UL) /*!< Position of EVENTS_ENDRX field. */
+#define SPIM_EVENTS_ENDRX_EVENTS_ENDRX_Msk (0x1UL << SPIM_EVENTS_ENDRX_EVENTS_ENDRX_Pos) /*!< Bit mask of EVENTS_ENDRX field. */
+#define SPIM_EVENTS_ENDRX_EVENTS_ENDRX_NotGenerated (0UL) /*!< Event not generated */
+#define SPIM_EVENTS_ENDRX_EVENTS_ENDRX_Generated (1UL) /*!< Event generated */
+
+/* Register: SPIM_EVENTS_END */
+/* Description: End of RXD buffer and TXD buffer reached */
+
+/* Bit 0 : End of RXD buffer and TXD buffer reached */
+#define SPIM_EVENTS_END_EVENTS_END_Pos (0UL) /*!< Position of EVENTS_END field. */
+#define SPIM_EVENTS_END_EVENTS_END_Msk (0x1UL << SPIM_EVENTS_END_EVENTS_END_Pos) /*!< Bit mask of EVENTS_END field. */
+#define SPIM_EVENTS_END_EVENTS_END_NotGenerated (0UL) /*!< Event not generated */
+#define SPIM_EVENTS_END_EVENTS_END_Generated (1UL) /*!< Event generated */
+
+/* Register: SPIM_EVENTS_ENDTX */
+/* Description: End of TXD buffer reached */
+
+/* Bit 0 : End of TXD buffer reached */
+#define SPIM_EVENTS_ENDTX_EVENTS_ENDTX_Pos (0UL) /*!< Position of EVENTS_ENDTX field. */
+#define SPIM_EVENTS_ENDTX_EVENTS_ENDTX_Msk (0x1UL << SPIM_EVENTS_ENDTX_EVENTS_ENDTX_Pos) /*!< Bit mask of EVENTS_ENDTX field. */
+#define SPIM_EVENTS_ENDTX_EVENTS_ENDTX_NotGenerated (0UL) /*!< Event not generated */
+#define SPIM_EVENTS_ENDTX_EVENTS_ENDTX_Generated (1UL) /*!< Event generated */
+
+/* Register: SPIM_EVENTS_STARTED */
+/* Description: Transaction started */
+
+/* Bit 0 : Transaction started */
+#define SPIM_EVENTS_STARTED_EVENTS_STARTED_Pos (0UL) /*!< Position of EVENTS_STARTED field. */
+#define SPIM_EVENTS_STARTED_EVENTS_STARTED_Msk (0x1UL << SPIM_EVENTS_STARTED_EVENTS_STARTED_Pos) /*!< Bit mask of EVENTS_STARTED field. */
+#define SPIM_EVENTS_STARTED_EVENTS_STARTED_NotGenerated (0UL) /*!< Event not generated */
+#define SPIM_EVENTS_STARTED_EVENTS_STARTED_Generated (1UL) /*!< Event generated */
+
+/* Register: SPIM_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 17 : Shortcut between event END and task START */
+#define SPIM_SHORTS_END_START_Pos (17UL) /*!< Position of END_START field. */
+#define SPIM_SHORTS_END_START_Msk (0x1UL << SPIM_SHORTS_END_START_Pos) /*!< Bit mask of END_START field. */
+#define SPIM_SHORTS_END_START_Disabled (0UL) /*!< Disable shortcut */
+#define SPIM_SHORTS_END_START_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: SPIM_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 19 : Write '1' to enable interrupt for event STARTED */
+#define SPIM_INTENSET_STARTED_Pos (19UL) /*!< Position of STARTED field. */
+#define SPIM_INTENSET_STARTED_Msk (0x1UL << SPIM_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */
+#define SPIM_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */
+#define SPIM_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */
+#define SPIM_INTENSET_STARTED_Set (1UL) /*!< Enable */
+
+/* Bit 8 : Write '1' to enable interrupt for event ENDTX */
+#define SPIM_INTENSET_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */
+#define SPIM_INTENSET_ENDTX_Msk (0x1UL << SPIM_INTENSET_ENDTX_Pos) /*!< Bit mask of ENDTX field. */
+#define SPIM_INTENSET_ENDTX_Disabled (0UL) /*!< Read: Disabled */
+#define SPIM_INTENSET_ENDTX_Enabled (1UL) /*!< Read: Enabled */
+#define SPIM_INTENSET_ENDTX_Set (1UL) /*!< Enable */
+
+/* Bit 6 : Write '1' to enable interrupt for event END */
+#define SPIM_INTENSET_END_Pos (6UL) /*!< Position of END field. */
+#define SPIM_INTENSET_END_Msk (0x1UL << SPIM_INTENSET_END_Pos) /*!< Bit mask of END field. */
+#define SPIM_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */
+#define SPIM_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */
+#define SPIM_INTENSET_END_Set (1UL) /*!< Enable */
+
+/* Bit 4 : Write '1' to enable interrupt for event ENDRX */
+#define SPIM_INTENSET_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */
+#define SPIM_INTENSET_ENDRX_Msk (0x1UL << SPIM_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */
+#define SPIM_INTENSET_ENDRX_Disabled (0UL) /*!< Read: Disabled */
+#define SPIM_INTENSET_ENDRX_Enabled (1UL) /*!< Read: Enabled */
+#define SPIM_INTENSET_ENDRX_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event STOPPED */
+#define SPIM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */
+#define SPIM_INTENSET_STOPPED_Msk (0x1UL << SPIM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define SPIM_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define SPIM_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define SPIM_INTENSET_STOPPED_Set (1UL) /*!< Enable */
+
+/* Register: SPIM_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 19 : Write '1' to disable interrupt for event STARTED */
+#define SPIM_INTENCLR_STARTED_Pos (19UL) /*!< Position of STARTED field. */
+#define SPIM_INTENCLR_STARTED_Msk (0x1UL << SPIM_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */
+#define SPIM_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */
+#define SPIM_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */
+#define SPIM_INTENCLR_STARTED_Clear (1UL) /*!< Disable */
+
+/* Bit 8 : Write '1' to disable interrupt for event ENDTX */
+#define SPIM_INTENCLR_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */
+#define SPIM_INTENCLR_ENDTX_Msk (0x1UL << SPIM_INTENCLR_ENDTX_Pos) /*!< Bit mask of ENDTX field. */
+#define SPIM_INTENCLR_ENDTX_Disabled (0UL) /*!< Read: Disabled */
+#define SPIM_INTENCLR_ENDTX_Enabled (1UL) /*!< Read: Enabled */
+#define SPIM_INTENCLR_ENDTX_Clear (1UL) /*!< Disable */
+
+/* Bit 6 : Write '1' to disable interrupt for event END */
+#define SPIM_INTENCLR_END_Pos (6UL) /*!< Position of END field. */
+#define SPIM_INTENCLR_END_Msk (0x1UL << SPIM_INTENCLR_END_Pos) /*!< Bit mask of END field. */
+#define SPIM_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */
+#define SPIM_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */
+#define SPIM_INTENCLR_END_Clear (1UL) /*!< Disable */
+
+/* Bit 4 : Write '1' to disable interrupt for event ENDRX */
+#define SPIM_INTENCLR_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */
+#define SPIM_INTENCLR_ENDRX_Msk (0x1UL << SPIM_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */
+#define SPIM_INTENCLR_ENDRX_Disabled (0UL) /*!< Read: Disabled */
+#define SPIM_INTENCLR_ENDRX_Enabled (1UL) /*!< Read: Enabled */
+#define SPIM_INTENCLR_ENDRX_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event STOPPED */
+#define SPIM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */
+#define SPIM_INTENCLR_STOPPED_Msk (0x1UL << SPIM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define SPIM_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define SPIM_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define SPIM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */
+
+/* Register: SPIM_STALLSTAT */
+/* Description: Stall status for EasyDMA RAM accesses. The fields in this register is set to STALL by hardware whenever a stall occurres and can be cleared (set to NOSTALL) by the CPU. */
+
+/* Bit 1 : Stall status for EasyDMA RAM writes */
+#define SPIM_STALLSTAT_RX_Pos (1UL) /*!< Position of RX field. */
+#define SPIM_STALLSTAT_RX_Msk (0x1UL << SPIM_STALLSTAT_RX_Pos) /*!< Bit mask of RX field. */
+#define SPIM_STALLSTAT_RX_NOSTALL (0UL) /*!< No stall */
+#define SPIM_STALLSTAT_RX_STALL (1UL) /*!< A stall has occurred */
+
+/* Bit 0 : Stall status for EasyDMA RAM reads */
+#define SPIM_STALLSTAT_TX_Pos (0UL) /*!< Position of TX field. */
+#define SPIM_STALLSTAT_TX_Msk (0x1UL << SPIM_STALLSTAT_TX_Pos) /*!< Bit mask of TX field. */
+#define SPIM_STALLSTAT_TX_NOSTALL (0UL) /*!< No stall */
+#define SPIM_STALLSTAT_TX_STALL (1UL) /*!< A stall has occurred */
+
+/* Register: SPIM_ENABLE */
+/* Description: Enable SPIM */
+
+/* Bits 3..0 : Enable or disable SPIM */
+#define SPIM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define SPIM_ENABLE_ENABLE_Msk (0xFUL << SPIM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define SPIM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable SPIM */
+#define SPIM_ENABLE_ENABLE_Enabled (7UL) /*!< Enable SPIM */
+
+/* Register: SPIM_PSEL_SCK */
+/* Description: Pin select for SCK */
+
+/* Bit 31 : Connection */
+#define SPIM_PSEL_SCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define SPIM_PSEL_SCK_CONNECT_Msk (0x1UL << SPIM_PSEL_SCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define SPIM_PSEL_SCK_CONNECT_Connected (0UL) /*!< Connect */
+#define SPIM_PSEL_SCK_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define SPIM_PSEL_SCK_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define SPIM_PSEL_SCK_PORT_Msk (0x1UL << SPIM_PSEL_SCK_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define SPIM_PSEL_SCK_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define SPIM_PSEL_SCK_PIN_Msk (0x1FUL << SPIM_PSEL_SCK_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: SPIM_PSEL_MOSI */
+/* Description: Pin select for MOSI signal */
+
+/* Bit 31 : Connection */
+#define SPIM_PSEL_MOSI_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define SPIM_PSEL_MOSI_CONNECT_Msk (0x1UL << SPIM_PSEL_MOSI_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define SPIM_PSEL_MOSI_CONNECT_Connected (0UL) /*!< Connect */
+#define SPIM_PSEL_MOSI_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define SPIM_PSEL_MOSI_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define SPIM_PSEL_MOSI_PORT_Msk (0x1UL << SPIM_PSEL_MOSI_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define SPIM_PSEL_MOSI_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define SPIM_PSEL_MOSI_PIN_Msk (0x1FUL << SPIM_PSEL_MOSI_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: SPIM_PSEL_MISO */
+/* Description: Pin select for MISO signal */
+
+/* Bit 31 : Connection */
+#define SPIM_PSEL_MISO_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define SPIM_PSEL_MISO_CONNECT_Msk (0x1UL << SPIM_PSEL_MISO_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define SPIM_PSEL_MISO_CONNECT_Connected (0UL) /*!< Connect */
+#define SPIM_PSEL_MISO_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define SPIM_PSEL_MISO_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define SPIM_PSEL_MISO_PORT_Msk (0x1UL << SPIM_PSEL_MISO_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define SPIM_PSEL_MISO_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define SPIM_PSEL_MISO_PIN_Msk (0x1FUL << SPIM_PSEL_MISO_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: SPIM_PSEL_CSN */
+/* Description: Pin select for CSN */
+
+/* Bit 31 : Connection */
+#define SPIM_PSEL_CSN_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define SPIM_PSEL_CSN_CONNECT_Msk (0x1UL << SPIM_PSEL_CSN_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define SPIM_PSEL_CSN_CONNECT_Connected (0UL) /*!< Connect */
+#define SPIM_PSEL_CSN_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define SPIM_PSEL_CSN_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define SPIM_PSEL_CSN_PORT_Msk (0x1UL << SPIM_PSEL_CSN_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define SPIM_PSEL_CSN_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define SPIM_PSEL_CSN_PIN_Msk (0x1FUL << SPIM_PSEL_CSN_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: SPIM_FREQUENCY */
+/* Description: SPI frequency. Accuracy depends on the HFCLK source selected. */
+
+/* Bits 31..0 : SPI master data rate */
+#define SPIM_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */
+#define SPIM_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << SPIM_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */
+#define SPIM_FREQUENCY_FREQUENCY_K125 (0x02000000UL) /*!< 125 kbps */
+#define SPIM_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps */
+#define SPIM_FREQUENCY_FREQUENCY_K500 (0x08000000UL) /*!< 500 kbps */
+#define SPIM_FREQUENCY_FREQUENCY_M16 (0x0A000000UL) /*!< 16 Mbps */
+#define SPIM_FREQUENCY_FREQUENCY_M1 (0x10000000UL) /*!< 1 Mbps */
+#define SPIM_FREQUENCY_FREQUENCY_M32 (0x14000000UL) /*!< 32 Mbps */
+#define SPIM_FREQUENCY_FREQUENCY_M2 (0x20000000UL) /*!< 2 Mbps */
+#define SPIM_FREQUENCY_FREQUENCY_M4 (0x40000000UL) /*!< 4 Mbps */
+#define SPIM_FREQUENCY_FREQUENCY_M8 (0x80000000UL) /*!< 8 Mbps */
+
+/* Register: SPIM_RXD_PTR */
+/* Description: Data pointer */
+
+/* Bits 31..0 : Data pointer */
+#define SPIM_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define SPIM_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIM_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: SPIM_RXD_MAXCNT */
+/* Description: Maximum number of bytes in receive buffer */
+
+/* Bits 15..0 : Maximum number of bytes in receive buffer */
+#define SPIM_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define SPIM_RXD_MAXCNT_MAXCNT_Msk (0xFFFFUL << SPIM_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: SPIM_RXD_AMOUNT */
+/* Description: Number of bytes transferred in the last transaction */
+
+/* Bits 15..0 : Number of bytes transferred in the last transaction */
+#define SPIM_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define SPIM_RXD_AMOUNT_AMOUNT_Msk (0xFFFFUL << SPIM_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+/* Register: SPIM_RXD_LIST */
+/* Description: EasyDMA list type */
+
+/* Bits 1..0 : List type */
+#define SPIM_RXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */
+#define SPIM_RXD_LIST_LIST_Msk (0x3UL << SPIM_RXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */
+#define SPIM_RXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */
+#define SPIM_RXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */
+
+/* Register: SPIM_TXD_PTR */
+/* Description: Data pointer */
+
+/* Bits 31..0 : Data pointer */
+#define SPIM_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define SPIM_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIM_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: SPIM_TXD_MAXCNT */
+/* Description: Number of bytes in transmit buffer */
+
+/* Bits 15..0 : Maximum number of bytes in transmit buffer */
+#define SPIM_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define SPIM_TXD_MAXCNT_MAXCNT_Msk (0xFFFFUL << SPIM_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: SPIM_TXD_AMOUNT */
+/* Description: Number of bytes transferred in the last transaction */
+
+/* Bits 15..0 : Number of bytes transferred in the last transaction */
+#define SPIM_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define SPIM_TXD_AMOUNT_AMOUNT_Msk (0xFFFFUL << SPIM_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+/* Register: SPIM_TXD_LIST */
+/* Description: EasyDMA list type */
+
+/* Bits 1..0 : List type */
+#define SPIM_TXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */
+#define SPIM_TXD_LIST_LIST_Msk (0x3UL << SPIM_TXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */
+#define SPIM_TXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */
+#define SPIM_TXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */
+
+/* Register: SPIM_CONFIG */
+/* Description: Configuration register */
+
+/* Bit 2 : Serial clock (SCK) polarity */
+#define SPIM_CONFIG_CPOL_Pos (2UL) /*!< Position of CPOL field. */
+#define SPIM_CONFIG_CPOL_Msk (0x1UL << SPIM_CONFIG_CPOL_Pos) /*!< Bit mask of CPOL field. */
+#define SPIM_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high */
+#define SPIM_CONFIG_CPOL_ActiveLow (1UL) /*!< Active low */
+
+/* Bit 1 : Serial clock (SCK) phase */
+#define SPIM_CONFIG_CPHA_Pos (1UL) /*!< Position of CPHA field. */
+#define SPIM_CONFIG_CPHA_Msk (0x1UL << SPIM_CONFIG_CPHA_Pos) /*!< Bit mask of CPHA field. */
+#define SPIM_CONFIG_CPHA_Leading (0UL) /*!< Sample on leading edge of clock, shift serial data on trailing edge */
+#define SPIM_CONFIG_CPHA_Trailing (1UL) /*!< Sample on trailing edge of clock, shift serial data on leading edge */
+
+/* Bit 0 : Bit order */
+#define SPIM_CONFIG_ORDER_Pos (0UL) /*!< Position of ORDER field. */
+#define SPIM_CONFIG_ORDER_Msk (0x1UL << SPIM_CONFIG_ORDER_Pos) /*!< Bit mask of ORDER field. */
+#define SPIM_CONFIG_ORDER_MsbFirst (0UL) /*!< Most significant bit shifted out first */
+#define SPIM_CONFIG_ORDER_LsbFirst (1UL) /*!< Least significant bit shifted out first */
+
+/* Register: SPIM_IFTIMING_RXDELAY */
+/* Description: Sample delay for input serial data on MISO */
+
+/* Bits 2..0 : Sample delay for input serial data on MISO. The value specifies the number of 64 MHz clock cycles (15.625 ns) delay from the the sampling edge of SCK (leading edge for CONFIG.CPHA = 0, trailing edge for CONFIG.CPHA = 1) until the input serial data is sampled. As en example, if RXDELAY = 0 and CONFIG.CPHA = 0, the input serial data is sampled on the rising edge of SCK. */
+#define SPIM_IFTIMING_RXDELAY_RXDELAY_Pos (0UL) /*!< Position of RXDELAY field. */
+#define SPIM_IFTIMING_RXDELAY_RXDELAY_Msk (0x7UL << SPIM_IFTIMING_RXDELAY_RXDELAY_Pos) /*!< Bit mask of RXDELAY field. */
+
+/* Register: SPIM_IFTIMING_CSNDUR */
+/* Description: Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions */
+
+/* Bits 7..0 : Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions. The value is specified in number of 64 MHz clock cycles (15.625 ns). */
+#define SPIM_IFTIMING_CSNDUR_CSNDUR_Pos (0UL) /*!< Position of CSNDUR field. */
+#define SPIM_IFTIMING_CSNDUR_CSNDUR_Msk (0xFFUL << SPIM_IFTIMING_CSNDUR_CSNDUR_Pos) /*!< Bit mask of CSNDUR field. */
+
+/* Register: SPIM_CSNPOL */
+/* Description: Polarity of CSN output */
+
+/* Bit 0 : Polarity of CSN output */
+#define SPIM_CSNPOL_CSNPOL_Pos (0UL) /*!< Position of CSNPOL field. */
+#define SPIM_CSNPOL_CSNPOL_Msk (0x1UL << SPIM_CSNPOL_CSNPOL_Pos) /*!< Bit mask of CSNPOL field. */
+#define SPIM_CSNPOL_CSNPOL_LOW (0UL) /*!< Active low (idle state high) */
+#define SPIM_CSNPOL_CSNPOL_HIGH (1UL) /*!< Active high (idle state low) */
+
+/* Register: SPIM_PSELDCX */
+/* Description: Pin select for DCX signal */
+
+/* Bit 31 : Connection */
+#define SPIM_PSELDCX_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define SPIM_PSELDCX_CONNECT_Msk (0x1UL << SPIM_PSELDCX_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define SPIM_PSELDCX_CONNECT_Connected (0UL) /*!< Connect */
+#define SPIM_PSELDCX_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define SPIM_PSELDCX_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define SPIM_PSELDCX_PORT_Msk (0x1UL << SPIM_PSELDCX_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define SPIM_PSELDCX_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define SPIM_PSELDCX_PIN_Msk (0x1FUL << SPIM_PSELDCX_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: SPIM_DCXCNT */
+/* Description: DCX configuration */
+
+/* Bits 3..0 : This register specifies the number of command bytes preceding the data bytes. The PSEL.DCX line will be low during transmission of command bytes and high during transmission of data bytes. Value 0xF indicates that all bytes are command bytes. */
+#define SPIM_DCXCNT_DCXCNT_Pos (0UL) /*!< Position of DCXCNT field. */
+#define SPIM_DCXCNT_DCXCNT_Msk (0xFUL << SPIM_DCXCNT_DCXCNT_Pos) /*!< Bit mask of DCXCNT field. */
+
+/* Register: SPIM_ORC */
+/* Description: Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT */
+
+/* Bits 7..0 : Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT. */
+#define SPIM_ORC_ORC_Pos (0UL) /*!< Position of ORC field. */
+#define SPIM_ORC_ORC_Msk (0xFFUL << SPIM_ORC_ORC_Pos) /*!< Bit mask of ORC field. */
+
+
+/* Peripheral: SPIS */
+/* Description: SPI Slave 0 */
+
+/* Register: SPIS_TASKS_ACQUIRE */
+/* Description: Acquire SPI semaphore */
+
+/* Bit 0 : Acquire SPI semaphore */
+#define SPIS_TASKS_ACQUIRE_TASKS_ACQUIRE_Pos (0UL) /*!< Position of TASKS_ACQUIRE field. */
+#define SPIS_TASKS_ACQUIRE_TASKS_ACQUIRE_Msk (0x1UL << SPIS_TASKS_ACQUIRE_TASKS_ACQUIRE_Pos) /*!< Bit mask of TASKS_ACQUIRE field. */
+#define SPIS_TASKS_ACQUIRE_TASKS_ACQUIRE_Trigger (1UL) /*!< Trigger task */
+
+/* Register: SPIS_TASKS_RELEASE */
+/* Description: Release SPI semaphore, enabling the SPI slave to acquire it */
+
+/* Bit 0 : Release SPI semaphore, enabling the SPI slave to acquire it */
+#define SPIS_TASKS_RELEASE_TASKS_RELEASE_Pos (0UL) /*!< Position of TASKS_RELEASE field. */
+#define SPIS_TASKS_RELEASE_TASKS_RELEASE_Msk (0x1UL << SPIS_TASKS_RELEASE_TASKS_RELEASE_Pos) /*!< Bit mask of TASKS_RELEASE field. */
+#define SPIS_TASKS_RELEASE_TASKS_RELEASE_Trigger (1UL) /*!< Trigger task */
+
+/* Register: SPIS_EVENTS_END */
+/* Description: Granted transaction completed */
+
+/* Bit 0 : Granted transaction completed */
+#define SPIS_EVENTS_END_EVENTS_END_Pos (0UL) /*!< Position of EVENTS_END field. */
+#define SPIS_EVENTS_END_EVENTS_END_Msk (0x1UL << SPIS_EVENTS_END_EVENTS_END_Pos) /*!< Bit mask of EVENTS_END field. */
+#define SPIS_EVENTS_END_EVENTS_END_NotGenerated (0UL) /*!< Event not generated */
+#define SPIS_EVENTS_END_EVENTS_END_Generated (1UL) /*!< Event generated */
+
+/* Register: SPIS_EVENTS_ENDRX */
+/* Description: End of RXD buffer reached */
+
+/* Bit 0 : End of RXD buffer reached */
+#define SPIS_EVENTS_ENDRX_EVENTS_ENDRX_Pos (0UL) /*!< Position of EVENTS_ENDRX field. */
+#define SPIS_EVENTS_ENDRX_EVENTS_ENDRX_Msk (0x1UL << SPIS_EVENTS_ENDRX_EVENTS_ENDRX_Pos) /*!< Bit mask of EVENTS_ENDRX field. */
+#define SPIS_EVENTS_ENDRX_EVENTS_ENDRX_NotGenerated (0UL) /*!< Event not generated */
+#define SPIS_EVENTS_ENDRX_EVENTS_ENDRX_Generated (1UL) /*!< Event generated */
+
+/* Register: SPIS_EVENTS_ACQUIRED */
+/* Description: Semaphore acquired */
+
+/* Bit 0 : Semaphore acquired */
+#define SPIS_EVENTS_ACQUIRED_EVENTS_ACQUIRED_Pos (0UL) /*!< Position of EVENTS_ACQUIRED field. */
+#define SPIS_EVENTS_ACQUIRED_EVENTS_ACQUIRED_Msk (0x1UL << SPIS_EVENTS_ACQUIRED_EVENTS_ACQUIRED_Pos) /*!< Bit mask of EVENTS_ACQUIRED field. */
+#define SPIS_EVENTS_ACQUIRED_EVENTS_ACQUIRED_NotGenerated (0UL) /*!< Event not generated */
+#define SPIS_EVENTS_ACQUIRED_EVENTS_ACQUIRED_Generated (1UL) /*!< Event generated */
+
+/* Register: SPIS_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 2 : Shortcut between event END and task ACQUIRE */
+#define SPIS_SHORTS_END_ACQUIRE_Pos (2UL) /*!< Position of END_ACQUIRE field. */
+#define SPIS_SHORTS_END_ACQUIRE_Msk (0x1UL << SPIS_SHORTS_END_ACQUIRE_Pos) /*!< Bit mask of END_ACQUIRE field. */
+#define SPIS_SHORTS_END_ACQUIRE_Disabled (0UL) /*!< Disable shortcut */
+#define SPIS_SHORTS_END_ACQUIRE_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: SPIS_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 10 : Write '1' to enable interrupt for event ACQUIRED */
+#define SPIS_INTENSET_ACQUIRED_Pos (10UL) /*!< Position of ACQUIRED field. */
+#define SPIS_INTENSET_ACQUIRED_Msk (0x1UL << SPIS_INTENSET_ACQUIRED_Pos) /*!< Bit mask of ACQUIRED field. */
+#define SPIS_INTENSET_ACQUIRED_Disabled (0UL) /*!< Read: Disabled */
+#define SPIS_INTENSET_ACQUIRED_Enabled (1UL) /*!< Read: Enabled */
+#define SPIS_INTENSET_ACQUIRED_Set (1UL) /*!< Enable */
+
+/* Bit 4 : Write '1' to enable interrupt for event ENDRX */
+#define SPIS_INTENSET_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */
+#define SPIS_INTENSET_ENDRX_Msk (0x1UL << SPIS_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */
+#define SPIS_INTENSET_ENDRX_Disabled (0UL) /*!< Read: Disabled */
+#define SPIS_INTENSET_ENDRX_Enabled (1UL) /*!< Read: Enabled */
+#define SPIS_INTENSET_ENDRX_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event END */
+#define SPIS_INTENSET_END_Pos (1UL) /*!< Position of END field. */
+#define SPIS_INTENSET_END_Msk (0x1UL << SPIS_INTENSET_END_Pos) /*!< Bit mask of END field. */
+#define SPIS_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */
+#define SPIS_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */
+#define SPIS_INTENSET_END_Set (1UL) /*!< Enable */
+
+/* Register: SPIS_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 10 : Write '1' to disable interrupt for event ACQUIRED */
+#define SPIS_INTENCLR_ACQUIRED_Pos (10UL) /*!< Position of ACQUIRED field. */
+#define SPIS_INTENCLR_ACQUIRED_Msk (0x1UL << SPIS_INTENCLR_ACQUIRED_Pos) /*!< Bit mask of ACQUIRED field. */
+#define SPIS_INTENCLR_ACQUIRED_Disabled (0UL) /*!< Read: Disabled */
+#define SPIS_INTENCLR_ACQUIRED_Enabled (1UL) /*!< Read: Enabled */
+#define SPIS_INTENCLR_ACQUIRED_Clear (1UL) /*!< Disable */
+
+/* Bit 4 : Write '1' to disable interrupt for event ENDRX */
+#define SPIS_INTENCLR_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */
+#define SPIS_INTENCLR_ENDRX_Msk (0x1UL << SPIS_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */
+#define SPIS_INTENCLR_ENDRX_Disabled (0UL) /*!< Read: Disabled */
+#define SPIS_INTENCLR_ENDRX_Enabled (1UL) /*!< Read: Enabled */
+#define SPIS_INTENCLR_ENDRX_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event END */
+#define SPIS_INTENCLR_END_Pos (1UL) /*!< Position of END field. */
+#define SPIS_INTENCLR_END_Msk (0x1UL << SPIS_INTENCLR_END_Pos) /*!< Bit mask of END field. */
+#define SPIS_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */
+#define SPIS_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */
+#define SPIS_INTENCLR_END_Clear (1UL) /*!< Disable */
+
+/* Register: SPIS_SEMSTAT */
+/* Description: Semaphore status register */
+
+/* Bits 1..0 : Semaphore status */
+#define SPIS_SEMSTAT_SEMSTAT_Pos (0UL) /*!< Position of SEMSTAT field. */
+#define SPIS_SEMSTAT_SEMSTAT_Msk (0x3UL << SPIS_SEMSTAT_SEMSTAT_Pos) /*!< Bit mask of SEMSTAT field. */
+#define SPIS_SEMSTAT_SEMSTAT_Free (0UL) /*!< Semaphore is free */
+#define SPIS_SEMSTAT_SEMSTAT_CPU (1UL) /*!< Semaphore is assigned to CPU */
+#define SPIS_SEMSTAT_SEMSTAT_SPIS (2UL) /*!< Semaphore is assigned to SPI slave */
+#define SPIS_SEMSTAT_SEMSTAT_CPUPending (3UL) /*!< Semaphore is assigned to SPI but a handover to the CPU is pending */
+
+/* Register: SPIS_STATUS */
+/* Description: Status from last transaction */
+
+/* Bit 1 : RX buffer overflow detected, and prevented */
+#define SPIS_STATUS_OVERFLOW_Pos (1UL) /*!< Position of OVERFLOW field. */
+#define SPIS_STATUS_OVERFLOW_Msk (0x1UL << SPIS_STATUS_OVERFLOW_Pos) /*!< Bit mask of OVERFLOW field. */
+#define SPIS_STATUS_OVERFLOW_NotPresent (0UL) /*!< Read: error not present */
+#define SPIS_STATUS_OVERFLOW_Present (1UL) /*!< Read: error present */
+#define SPIS_STATUS_OVERFLOW_Clear (1UL) /*!< Write: clear error on writing '1' */
+
+/* Bit 0 : TX buffer over-read detected, and prevented */
+#define SPIS_STATUS_OVERREAD_Pos (0UL) /*!< Position of OVERREAD field. */
+#define SPIS_STATUS_OVERREAD_Msk (0x1UL << SPIS_STATUS_OVERREAD_Pos) /*!< Bit mask of OVERREAD field. */
+#define SPIS_STATUS_OVERREAD_NotPresent (0UL) /*!< Read: error not present */
+#define SPIS_STATUS_OVERREAD_Present (1UL) /*!< Read: error present */
+#define SPIS_STATUS_OVERREAD_Clear (1UL) /*!< Write: clear error on writing '1' */
+
+/* Register: SPIS_ENABLE */
+/* Description: Enable SPI slave */
+
+/* Bits 3..0 : Enable or disable SPI slave */
+#define SPIS_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define SPIS_ENABLE_ENABLE_Msk (0xFUL << SPIS_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define SPIS_ENABLE_ENABLE_Disabled (0UL) /*!< Disable SPI slave */
+#define SPIS_ENABLE_ENABLE_Enabled (2UL) /*!< Enable SPI slave */
+
+/* Register: SPIS_PSEL_SCK */
+/* Description: Pin select for SCK */
+
+/* Bit 31 : Connection */
+#define SPIS_PSEL_SCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define SPIS_PSEL_SCK_CONNECT_Msk (0x1UL << SPIS_PSEL_SCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define SPIS_PSEL_SCK_CONNECT_Connected (0UL) /*!< Connect */
+#define SPIS_PSEL_SCK_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define SPIS_PSEL_SCK_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define SPIS_PSEL_SCK_PORT_Msk (0x1UL << SPIS_PSEL_SCK_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define SPIS_PSEL_SCK_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define SPIS_PSEL_SCK_PIN_Msk (0x1FUL << SPIS_PSEL_SCK_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: SPIS_PSEL_MISO */
+/* Description: Pin select for MISO signal */
+
+/* Bit 31 : Connection */
+#define SPIS_PSEL_MISO_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define SPIS_PSEL_MISO_CONNECT_Msk (0x1UL << SPIS_PSEL_MISO_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define SPIS_PSEL_MISO_CONNECT_Connected (0UL) /*!< Connect */
+#define SPIS_PSEL_MISO_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define SPIS_PSEL_MISO_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define SPIS_PSEL_MISO_PORT_Msk (0x1UL << SPIS_PSEL_MISO_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define SPIS_PSEL_MISO_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define SPIS_PSEL_MISO_PIN_Msk (0x1FUL << SPIS_PSEL_MISO_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: SPIS_PSEL_MOSI */
+/* Description: Pin select for MOSI signal */
+
+/* Bit 31 : Connection */
+#define SPIS_PSEL_MOSI_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define SPIS_PSEL_MOSI_CONNECT_Msk (0x1UL << SPIS_PSEL_MOSI_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define SPIS_PSEL_MOSI_CONNECT_Connected (0UL) /*!< Connect */
+#define SPIS_PSEL_MOSI_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define SPIS_PSEL_MOSI_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define SPIS_PSEL_MOSI_PORT_Msk (0x1UL << SPIS_PSEL_MOSI_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define SPIS_PSEL_MOSI_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define SPIS_PSEL_MOSI_PIN_Msk (0x1FUL << SPIS_PSEL_MOSI_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: SPIS_PSEL_CSN */
+/* Description: Pin select for CSN signal */
+
+/* Bit 31 : Connection */
+#define SPIS_PSEL_CSN_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define SPIS_PSEL_CSN_CONNECT_Msk (0x1UL << SPIS_PSEL_CSN_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define SPIS_PSEL_CSN_CONNECT_Connected (0UL) /*!< Connect */
+#define SPIS_PSEL_CSN_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define SPIS_PSEL_CSN_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define SPIS_PSEL_CSN_PORT_Msk (0x1UL << SPIS_PSEL_CSN_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define SPIS_PSEL_CSN_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define SPIS_PSEL_CSN_PIN_Msk (0x1FUL << SPIS_PSEL_CSN_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: SPIS_RXD_PTR */
+/* Description: RXD data pointer */
+
+/* Bits 31..0 : RXD data pointer */
+#define SPIS_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define SPIS_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIS_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: SPIS_RXD_MAXCNT */
+/* Description: Maximum number of bytes in receive buffer */
+
+/* Bits 15..0 : Maximum number of bytes in receive buffer */
+#define SPIS_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define SPIS_RXD_MAXCNT_MAXCNT_Msk (0xFFFFUL << SPIS_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: SPIS_RXD_AMOUNT */
+/* Description: Number of bytes received in last granted transaction */
+
+/* Bits 15..0 : Number of bytes received in the last granted transaction */
+#define SPIS_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define SPIS_RXD_AMOUNT_AMOUNT_Msk (0xFFFFUL << SPIS_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+/* Register: SPIS_RXD_LIST */
+/* Description: EasyDMA list type */
+
+/* Bits 1..0 : List type */
+#define SPIS_RXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */
+#define SPIS_RXD_LIST_LIST_Msk (0x3UL << SPIS_RXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */
+#define SPIS_RXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */
+#define SPIS_RXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */
+
+/* Register: SPIS_TXD_PTR */
+/* Description: TXD data pointer */
+
+/* Bits 31..0 : TXD data pointer */
+#define SPIS_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define SPIS_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIS_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: SPIS_TXD_MAXCNT */
+/* Description: Maximum number of bytes in transmit buffer */
+
+/* Bits 15..0 : Maximum number of bytes in transmit buffer */
+#define SPIS_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define SPIS_TXD_MAXCNT_MAXCNT_Msk (0xFFFFUL << SPIS_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: SPIS_TXD_AMOUNT */
+/* Description: Number of bytes transmitted in last granted transaction */
+
+/* Bits 15..0 : Number of bytes transmitted in last granted transaction */
+#define SPIS_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define SPIS_TXD_AMOUNT_AMOUNT_Msk (0xFFFFUL << SPIS_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+/* Register: SPIS_TXD_LIST */
+/* Description: EasyDMA list type */
+
+/* Bits 1..0 : List type */
+#define SPIS_TXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */
+#define SPIS_TXD_LIST_LIST_Msk (0x3UL << SPIS_TXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */
+#define SPIS_TXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */
+#define SPIS_TXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */
+
+/* Register: SPIS_CONFIG */
+/* Description: Configuration register */
+
+/* Bit 2 : Serial clock (SCK) polarity */
+#define SPIS_CONFIG_CPOL_Pos (2UL) /*!< Position of CPOL field. */
+#define SPIS_CONFIG_CPOL_Msk (0x1UL << SPIS_CONFIG_CPOL_Pos) /*!< Bit mask of CPOL field. */
+#define SPIS_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high */
+#define SPIS_CONFIG_CPOL_ActiveLow (1UL) /*!< Active low */
+
+/* Bit 1 : Serial clock (SCK) phase */
+#define SPIS_CONFIG_CPHA_Pos (1UL) /*!< Position of CPHA field. */
+#define SPIS_CONFIG_CPHA_Msk (0x1UL << SPIS_CONFIG_CPHA_Pos) /*!< Bit mask of CPHA field. */
+#define SPIS_CONFIG_CPHA_Leading (0UL) /*!< Sample on leading edge of clock, shift serial data on trailing edge */
+#define SPIS_CONFIG_CPHA_Trailing (1UL) /*!< Sample on trailing edge of clock, shift serial data on leading edge */
+
+/* Bit 0 : Bit order */
+#define SPIS_CONFIG_ORDER_Pos (0UL) /*!< Position of ORDER field. */
+#define SPIS_CONFIG_ORDER_Msk (0x1UL << SPIS_CONFIG_ORDER_Pos) /*!< Bit mask of ORDER field. */
+#define SPIS_CONFIG_ORDER_MsbFirst (0UL) /*!< Most significant bit shifted out first */
+#define SPIS_CONFIG_ORDER_LsbFirst (1UL) /*!< Least significant bit shifted out first */
+
+/* Register: SPIS_DEF */
+/* Description: Default character. Character clocked out in case of an ignored transaction. */
+
+/* Bits 7..0 : Default character. Character clocked out in case of an ignored transaction. */
+#define SPIS_DEF_DEF_Pos (0UL) /*!< Position of DEF field. */
+#define SPIS_DEF_DEF_Msk (0xFFUL << SPIS_DEF_DEF_Pos) /*!< Bit mask of DEF field. */
+
+/* Register: SPIS_ORC */
+/* Description: Over-read character */
+
+/* Bits 7..0 : Over-read character. Character clocked out after an over-read of the transmit buffer. */
+#define SPIS_ORC_ORC_Pos (0UL) /*!< Position of ORC field. */
+#define SPIS_ORC_ORC_Msk (0xFFUL << SPIS_ORC_ORC_Pos) /*!< Bit mask of ORC field. */
+
+
+/* Peripheral: TEMP */
+/* Description: Temperature Sensor */
+
+/* Register: TEMP_TASKS_START */
+/* Description: Start temperature measurement */
+
+/* Bit 0 : Start temperature measurement */
+#define TEMP_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */
+#define TEMP_TASKS_START_TASKS_START_Msk (0x1UL << TEMP_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */
+#define TEMP_TASKS_START_TASKS_START_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TEMP_TASKS_STOP */
+/* Description: Stop temperature measurement */
+
+/* Bit 0 : Stop temperature measurement */
+#define TEMP_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define TEMP_TASKS_STOP_TASKS_STOP_Msk (0x1UL << TEMP_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define TEMP_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TEMP_EVENTS_DATARDY */
+/* Description: Temperature measurement complete, data ready */
+
+/* Bit 0 : Temperature measurement complete, data ready */
+#define TEMP_EVENTS_DATARDY_EVENTS_DATARDY_Pos (0UL) /*!< Position of EVENTS_DATARDY field. */
+#define TEMP_EVENTS_DATARDY_EVENTS_DATARDY_Msk (0x1UL << TEMP_EVENTS_DATARDY_EVENTS_DATARDY_Pos) /*!< Bit mask of EVENTS_DATARDY field. */
+#define TEMP_EVENTS_DATARDY_EVENTS_DATARDY_NotGenerated (0UL) /*!< Event not generated */
+#define TEMP_EVENTS_DATARDY_EVENTS_DATARDY_Generated (1UL) /*!< Event generated */
+
+/* Register: TEMP_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 0 : Write '1' to enable interrupt for event DATARDY */
+#define TEMP_INTENSET_DATARDY_Pos (0UL) /*!< Position of DATARDY field. */
+#define TEMP_INTENSET_DATARDY_Msk (0x1UL << TEMP_INTENSET_DATARDY_Pos) /*!< Bit mask of DATARDY field. */
+#define TEMP_INTENSET_DATARDY_Disabled (0UL) /*!< Read: Disabled */
+#define TEMP_INTENSET_DATARDY_Enabled (1UL) /*!< Read: Enabled */
+#define TEMP_INTENSET_DATARDY_Set (1UL) /*!< Enable */
+
+/* Register: TEMP_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 0 : Write '1' to disable interrupt for event DATARDY */
+#define TEMP_INTENCLR_DATARDY_Pos (0UL) /*!< Position of DATARDY field. */
+#define TEMP_INTENCLR_DATARDY_Msk (0x1UL << TEMP_INTENCLR_DATARDY_Pos) /*!< Bit mask of DATARDY field. */
+#define TEMP_INTENCLR_DATARDY_Disabled (0UL) /*!< Read: Disabled */
+#define TEMP_INTENCLR_DATARDY_Enabled (1UL) /*!< Read: Enabled */
+#define TEMP_INTENCLR_DATARDY_Clear (1UL) /*!< Disable */
+
+/* Register: TEMP_TEMP */
+/* Description: Temperature in degC (0.25deg steps) */
+
+/* Bits 31..0 : Temperature in degC (0.25deg steps) */
+#define TEMP_TEMP_TEMP_Pos (0UL) /*!< Position of TEMP field. */
+#define TEMP_TEMP_TEMP_Msk (0xFFFFFFFFUL << TEMP_TEMP_TEMP_Pos) /*!< Bit mask of TEMP field. */
+
+/* Register: TEMP_A0 */
+/* Description: Slope of 1st piece wise linear function */
+
+/* Bits 11..0 : Slope of 1st piece wise linear function */
+#define TEMP_A0_A0_Pos (0UL) /*!< Position of A0 field. */
+#define TEMP_A0_A0_Msk (0xFFFUL << TEMP_A0_A0_Pos) /*!< Bit mask of A0 field. */
+
+/* Register: TEMP_A1 */
+/* Description: Slope of 2nd piece wise linear function */
+
+/* Bits 11..0 : Slope of 2nd piece wise linear function */
+#define TEMP_A1_A1_Pos (0UL) /*!< Position of A1 field. */
+#define TEMP_A1_A1_Msk (0xFFFUL << TEMP_A1_A1_Pos) /*!< Bit mask of A1 field. */
+
+/* Register: TEMP_A2 */
+/* Description: Slope of 3rd piece wise linear function */
+
+/* Bits 11..0 : Slope of 3rd piece wise linear function */
+#define TEMP_A2_A2_Pos (0UL) /*!< Position of A2 field. */
+#define TEMP_A2_A2_Msk (0xFFFUL << TEMP_A2_A2_Pos) /*!< Bit mask of A2 field. */
+
+/* Register: TEMP_A3 */
+/* Description: Slope of 4th piece wise linear function */
+
+/* Bits 11..0 : Slope of 4th piece wise linear function */
+#define TEMP_A3_A3_Pos (0UL) /*!< Position of A3 field. */
+#define TEMP_A3_A3_Msk (0xFFFUL << TEMP_A3_A3_Pos) /*!< Bit mask of A3 field. */
+
+/* Register: TEMP_A4 */
+/* Description: Slope of 5th piece wise linear function */
+
+/* Bits 11..0 : Slope of 5th piece wise linear function */
+#define TEMP_A4_A4_Pos (0UL) /*!< Position of A4 field. */
+#define TEMP_A4_A4_Msk (0xFFFUL << TEMP_A4_A4_Pos) /*!< Bit mask of A4 field. */
+
+/* Register: TEMP_A5 */
+/* Description: Slope of 6th piece wise linear function */
+
+/* Bits 11..0 : Slope of 6th piece wise linear function */
+#define TEMP_A5_A5_Pos (0UL) /*!< Position of A5 field. */
+#define TEMP_A5_A5_Msk (0xFFFUL << TEMP_A5_A5_Pos) /*!< Bit mask of A5 field. */
+
+/* Register: TEMP_B0 */
+/* Description: y-intercept of 1st piece wise linear function */
+
+/* Bits 13..0 : y-intercept of 1st piece wise linear function */
+#define TEMP_B0_B0_Pos (0UL) /*!< Position of B0 field. */
+#define TEMP_B0_B0_Msk (0x3FFFUL << TEMP_B0_B0_Pos) /*!< Bit mask of B0 field. */
+
+/* Register: TEMP_B1 */
+/* Description: y-intercept of 2nd piece wise linear function */
+
+/* Bits 13..0 : y-intercept of 2nd piece wise linear function */
+#define TEMP_B1_B1_Pos (0UL) /*!< Position of B1 field. */
+#define TEMP_B1_B1_Msk (0x3FFFUL << TEMP_B1_B1_Pos) /*!< Bit mask of B1 field. */
+
+/* Register: TEMP_B2 */
+/* Description: y-intercept of 3rd piece wise linear function */
+
+/* Bits 13..0 : y-intercept of 3rd piece wise linear function */
+#define TEMP_B2_B2_Pos (0UL) /*!< Position of B2 field. */
+#define TEMP_B2_B2_Msk (0x3FFFUL << TEMP_B2_B2_Pos) /*!< Bit mask of B2 field. */
+
+/* Register: TEMP_B3 */
+/* Description: y-intercept of 4th piece wise linear function */
+
+/* Bits 13..0 : y-intercept of 4th piece wise linear function */
+#define TEMP_B3_B3_Pos (0UL) /*!< Position of B3 field. */
+#define TEMP_B3_B3_Msk (0x3FFFUL << TEMP_B3_B3_Pos) /*!< Bit mask of B3 field. */
+
+/* Register: TEMP_B4 */
+/* Description: y-intercept of 5th piece wise linear function */
+
+/* Bits 13..0 : y-intercept of 5th piece wise linear function */
+#define TEMP_B4_B4_Pos (0UL) /*!< Position of B4 field. */
+#define TEMP_B4_B4_Msk (0x3FFFUL << TEMP_B4_B4_Pos) /*!< Bit mask of B4 field. */
+
+/* Register: TEMP_B5 */
+/* Description: y-intercept of 6th piece wise linear function */
+
+/* Bits 13..0 : y-intercept of 6th piece wise linear function */
+#define TEMP_B5_B5_Pos (0UL) /*!< Position of B5 field. */
+#define TEMP_B5_B5_Msk (0x3FFFUL << TEMP_B5_B5_Pos) /*!< Bit mask of B5 field. */
+
+/* Register: TEMP_T0 */
+/* Description: End point of 1st piece wise linear function */
+
+/* Bits 7..0 : End point of 1st piece wise linear function */
+#define TEMP_T0_T0_Pos (0UL) /*!< Position of T0 field. */
+#define TEMP_T0_T0_Msk (0xFFUL << TEMP_T0_T0_Pos) /*!< Bit mask of T0 field. */
+
+/* Register: TEMP_T1 */
+/* Description: End point of 2nd piece wise linear function */
+
+/* Bits 7..0 : End point of 2nd piece wise linear function */
+#define TEMP_T1_T1_Pos (0UL) /*!< Position of T1 field. */
+#define TEMP_T1_T1_Msk (0xFFUL << TEMP_T1_T1_Pos) /*!< Bit mask of T1 field. */
+
+/* Register: TEMP_T2 */
+/* Description: End point of 3rd piece wise linear function */
+
+/* Bits 7..0 : End point of 3rd piece wise linear function */
+#define TEMP_T2_T2_Pos (0UL) /*!< Position of T2 field. */
+#define TEMP_T2_T2_Msk (0xFFUL << TEMP_T2_T2_Pos) /*!< Bit mask of T2 field. */
+
+/* Register: TEMP_T3 */
+/* Description: End point of 4th piece wise linear function */
+
+/* Bits 7..0 : End point of 4th piece wise linear function */
+#define TEMP_T3_T3_Pos (0UL) /*!< Position of T3 field. */
+#define TEMP_T3_T3_Msk (0xFFUL << TEMP_T3_T3_Pos) /*!< Bit mask of T3 field. */
+
+/* Register: TEMP_T4 */
+/* Description: End point of 5th piece wise linear function */
+
+/* Bits 7..0 : End point of 5th piece wise linear function */
+#define TEMP_T4_T4_Pos (0UL) /*!< Position of T4 field. */
+#define TEMP_T4_T4_Msk (0xFFUL << TEMP_T4_T4_Pos) /*!< Bit mask of T4 field. */
+
+
+/* Peripheral: TIMER */
+/* Description: Timer/Counter 0 */
+
+/* Register: TIMER_TASKS_START */
+/* Description: Start Timer */
+
+/* Bit 0 : Start Timer */
+#define TIMER_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */
+#define TIMER_TASKS_START_TASKS_START_Msk (0x1UL << TIMER_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */
+#define TIMER_TASKS_START_TASKS_START_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TIMER_TASKS_STOP */
+/* Description: Stop Timer */
+
+/* Bit 0 : Stop Timer */
+#define TIMER_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define TIMER_TASKS_STOP_TASKS_STOP_Msk (0x1UL << TIMER_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define TIMER_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TIMER_TASKS_COUNT */
+/* Description: Increment Timer (Counter mode only) */
+
+/* Bit 0 : Increment Timer (Counter mode only) */
+#define TIMER_TASKS_COUNT_TASKS_COUNT_Pos (0UL) /*!< Position of TASKS_COUNT field. */
+#define TIMER_TASKS_COUNT_TASKS_COUNT_Msk (0x1UL << TIMER_TASKS_COUNT_TASKS_COUNT_Pos) /*!< Bit mask of TASKS_COUNT field. */
+#define TIMER_TASKS_COUNT_TASKS_COUNT_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TIMER_TASKS_CLEAR */
+/* Description: Clear time */
+
+/* Bit 0 : Clear time */
+#define TIMER_TASKS_CLEAR_TASKS_CLEAR_Pos (0UL) /*!< Position of TASKS_CLEAR field. */
+#define TIMER_TASKS_CLEAR_TASKS_CLEAR_Msk (0x1UL << TIMER_TASKS_CLEAR_TASKS_CLEAR_Pos) /*!< Bit mask of TASKS_CLEAR field. */
+#define TIMER_TASKS_CLEAR_TASKS_CLEAR_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TIMER_TASKS_SHUTDOWN */
+/* Description: Deprecated register - Shut down timer */
+
+/* Bit 0 : Deprecated field - Shut down timer */
+#define TIMER_TASKS_SHUTDOWN_TASKS_SHUTDOWN_Pos (0UL) /*!< Position of TASKS_SHUTDOWN field. */
+#define TIMER_TASKS_SHUTDOWN_TASKS_SHUTDOWN_Msk (0x1UL << TIMER_TASKS_SHUTDOWN_TASKS_SHUTDOWN_Pos) /*!< Bit mask of TASKS_SHUTDOWN field. */
+#define TIMER_TASKS_SHUTDOWN_TASKS_SHUTDOWN_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TIMER_TASKS_CAPTURE */
+/* Description: Description collection: Capture Timer value to CC[n] register */
+
+/* Bit 0 : Capture Timer value to CC[n] register */
+#define TIMER_TASKS_CAPTURE_TASKS_CAPTURE_Pos (0UL) /*!< Position of TASKS_CAPTURE field. */
+#define TIMER_TASKS_CAPTURE_TASKS_CAPTURE_Msk (0x1UL << TIMER_TASKS_CAPTURE_TASKS_CAPTURE_Pos) /*!< Bit mask of TASKS_CAPTURE field. */
+#define TIMER_TASKS_CAPTURE_TASKS_CAPTURE_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TIMER_EVENTS_COMPARE */
+/* Description: Description collection: Compare event on CC[n] match */
+
+/* Bit 0 : Compare event on CC[n] match */
+#define TIMER_EVENTS_COMPARE_EVENTS_COMPARE_Pos (0UL) /*!< Position of EVENTS_COMPARE field. */
+#define TIMER_EVENTS_COMPARE_EVENTS_COMPARE_Msk (0x1UL << TIMER_EVENTS_COMPARE_EVENTS_COMPARE_Pos) /*!< Bit mask of EVENTS_COMPARE field. */
+#define TIMER_EVENTS_COMPARE_EVENTS_COMPARE_NotGenerated (0UL) /*!< Event not generated */
+#define TIMER_EVENTS_COMPARE_EVENTS_COMPARE_Generated (1UL) /*!< Event generated */
+
+/* Register: TIMER_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 13 : Shortcut between event COMPARE[5] and task STOP */
+#define TIMER_SHORTS_COMPARE5_STOP_Pos (13UL) /*!< Position of COMPARE5_STOP field. */
+#define TIMER_SHORTS_COMPARE5_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE5_STOP_Pos) /*!< Bit mask of COMPARE5_STOP field. */
+#define TIMER_SHORTS_COMPARE5_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define TIMER_SHORTS_COMPARE5_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 12 : Shortcut between event COMPARE[4] and task STOP */
+#define TIMER_SHORTS_COMPARE4_STOP_Pos (12UL) /*!< Position of COMPARE4_STOP field. */
+#define TIMER_SHORTS_COMPARE4_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE4_STOP_Pos) /*!< Bit mask of COMPARE4_STOP field. */
+#define TIMER_SHORTS_COMPARE4_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define TIMER_SHORTS_COMPARE4_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 11 : Shortcut between event COMPARE[3] and task STOP */
+#define TIMER_SHORTS_COMPARE3_STOP_Pos (11UL) /*!< Position of COMPARE3_STOP field. */
+#define TIMER_SHORTS_COMPARE3_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE3_STOP_Pos) /*!< Bit mask of COMPARE3_STOP field. */
+#define TIMER_SHORTS_COMPARE3_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define TIMER_SHORTS_COMPARE3_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 10 : Shortcut between event COMPARE[2] and task STOP */
+#define TIMER_SHORTS_COMPARE2_STOP_Pos (10UL) /*!< Position of COMPARE2_STOP field. */
+#define TIMER_SHORTS_COMPARE2_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE2_STOP_Pos) /*!< Bit mask of COMPARE2_STOP field. */
+#define TIMER_SHORTS_COMPARE2_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define TIMER_SHORTS_COMPARE2_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 9 : Shortcut between event COMPARE[1] and task STOP */
+#define TIMER_SHORTS_COMPARE1_STOP_Pos (9UL) /*!< Position of COMPARE1_STOP field. */
+#define TIMER_SHORTS_COMPARE1_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE1_STOP_Pos) /*!< Bit mask of COMPARE1_STOP field. */
+#define TIMER_SHORTS_COMPARE1_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define TIMER_SHORTS_COMPARE1_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 8 : Shortcut between event COMPARE[0] and task STOP */
+#define TIMER_SHORTS_COMPARE0_STOP_Pos (8UL) /*!< Position of COMPARE0_STOP field. */
+#define TIMER_SHORTS_COMPARE0_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE0_STOP_Pos) /*!< Bit mask of COMPARE0_STOP field. */
+#define TIMER_SHORTS_COMPARE0_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define TIMER_SHORTS_COMPARE0_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 5 : Shortcut between event COMPARE[5] and task CLEAR */
+#define TIMER_SHORTS_COMPARE5_CLEAR_Pos (5UL) /*!< Position of COMPARE5_CLEAR field. */
+#define TIMER_SHORTS_COMPARE5_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE5_CLEAR_Pos) /*!< Bit mask of COMPARE5_CLEAR field. */
+#define TIMER_SHORTS_COMPARE5_CLEAR_Disabled (0UL) /*!< Disable shortcut */
+#define TIMER_SHORTS_COMPARE5_CLEAR_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 4 : Shortcut between event COMPARE[4] and task CLEAR */
+#define TIMER_SHORTS_COMPARE4_CLEAR_Pos (4UL) /*!< Position of COMPARE4_CLEAR field. */
+#define TIMER_SHORTS_COMPARE4_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE4_CLEAR_Pos) /*!< Bit mask of COMPARE4_CLEAR field. */
+#define TIMER_SHORTS_COMPARE4_CLEAR_Disabled (0UL) /*!< Disable shortcut */
+#define TIMER_SHORTS_COMPARE4_CLEAR_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 3 : Shortcut between event COMPARE[3] and task CLEAR */
+#define TIMER_SHORTS_COMPARE3_CLEAR_Pos (3UL) /*!< Position of COMPARE3_CLEAR field. */
+#define TIMER_SHORTS_COMPARE3_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE3_CLEAR_Pos) /*!< Bit mask of COMPARE3_CLEAR field. */
+#define TIMER_SHORTS_COMPARE3_CLEAR_Disabled (0UL) /*!< Disable shortcut */
+#define TIMER_SHORTS_COMPARE3_CLEAR_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 2 : Shortcut between event COMPARE[2] and task CLEAR */
+#define TIMER_SHORTS_COMPARE2_CLEAR_Pos (2UL) /*!< Position of COMPARE2_CLEAR field. */
+#define TIMER_SHORTS_COMPARE2_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE2_CLEAR_Pos) /*!< Bit mask of COMPARE2_CLEAR field. */
+#define TIMER_SHORTS_COMPARE2_CLEAR_Disabled (0UL) /*!< Disable shortcut */
+#define TIMER_SHORTS_COMPARE2_CLEAR_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 1 : Shortcut between event COMPARE[1] and task CLEAR */
+#define TIMER_SHORTS_COMPARE1_CLEAR_Pos (1UL) /*!< Position of COMPARE1_CLEAR field. */
+#define TIMER_SHORTS_COMPARE1_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE1_CLEAR_Pos) /*!< Bit mask of COMPARE1_CLEAR field. */
+#define TIMER_SHORTS_COMPARE1_CLEAR_Disabled (0UL) /*!< Disable shortcut */
+#define TIMER_SHORTS_COMPARE1_CLEAR_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 0 : Shortcut between event COMPARE[0] and task CLEAR */
+#define TIMER_SHORTS_COMPARE0_CLEAR_Pos (0UL) /*!< Position of COMPARE0_CLEAR field. */
+#define TIMER_SHORTS_COMPARE0_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE0_CLEAR_Pos) /*!< Bit mask of COMPARE0_CLEAR field. */
+#define TIMER_SHORTS_COMPARE0_CLEAR_Disabled (0UL) /*!< Disable shortcut */
+#define TIMER_SHORTS_COMPARE0_CLEAR_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: TIMER_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 21 : Write '1' to enable interrupt for event COMPARE[5] */
+#define TIMER_INTENSET_COMPARE5_Pos (21UL) /*!< Position of COMPARE5 field. */
+#define TIMER_INTENSET_COMPARE5_Msk (0x1UL << TIMER_INTENSET_COMPARE5_Pos) /*!< Bit mask of COMPARE5 field. */
+#define TIMER_INTENSET_COMPARE5_Disabled (0UL) /*!< Read: Disabled */
+#define TIMER_INTENSET_COMPARE5_Enabled (1UL) /*!< Read: Enabled */
+#define TIMER_INTENSET_COMPARE5_Set (1UL) /*!< Enable */
+
+/* Bit 20 : Write '1' to enable interrupt for event COMPARE[4] */
+#define TIMER_INTENSET_COMPARE4_Pos (20UL) /*!< Position of COMPARE4 field. */
+#define TIMER_INTENSET_COMPARE4_Msk (0x1UL << TIMER_INTENSET_COMPARE4_Pos) /*!< Bit mask of COMPARE4 field. */
+#define TIMER_INTENSET_COMPARE4_Disabled (0UL) /*!< Read: Disabled */
+#define TIMER_INTENSET_COMPARE4_Enabled (1UL) /*!< Read: Enabled */
+#define TIMER_INTENSET_COMPARE4_Set (1UL) /*!< Enable */
+
+/* Bit 19 : Write '1' to enable interrupt for event COMPARE[3] */
+#define TIMER_INTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */
+#define TIMER_INTENSET_COMPARE3_Msk (0x1UL << TIMER_INTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */
+#define TIMER_INTENSET_COMPARE3_Disabled (0UL) /*!< Read: Disabled */
+#define TIMER_INTENSET_COMPARE3_Enabled (1UL) /*!< Read: Enabled */
+#define TIMER_INTENSET_COMPARE3_Set (1UL) /*!< Enable */
+
+/* Bit 18 : Write '1' to enable interrupt for event COMPARE[2] */
+#define TIMER_INTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */
+#define TIMER_INTENSET_COMPARE2_Msk (0x1UL << TIMER_INTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */
+#define TIMER_INTENSET_COMPARE2_Disabled (0UL) /*!< Read: Disabled */
+#define TIMER_INTENSET_COMPARE2_Enabled (1UL) /*!< Read: Enabled */
+#define TIMER_INTENSET_COMPARE2_Set (1UL) /*!< Enable */
+
+/* Bit 17 : Write '1' to enable interrupt for event COMPARE[1] */
+#define TIMER_INTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */
+#define TIMER_INTENSET_COMPARE1_Msk (0x1UL << TIMER_INTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */
+#define TIMER_INTENSET_COMPARE1_Disabled (0UL) /*!< Read: Disabled */
+#define TIMER_INTENSET_COMPARE1_Enabled (1UL) /*!< Read: Enabled */
+#define TIMER_INTENSET_COMPARE1_Set (1UL) /*!< Enable */
+
+/* Bit 16 : Write '1' to enable interrupt for event COMPARE[0] */
+#define TIMER_INTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */
+#define TIMER_INTENSET_COMPARE0_Msk (0x1UL << TIMER_INTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */
+#define TIMER_INTENSET_COMPARE0_Disabled (0UL) /*!< Read: Disabled */
+#define TIMER_INTENSET_COMPARE0_Enabled (1UL) /*!< Read: Enabled */
+#define TIMER_INTENSET_COMPARE0_Set (1UL) /*!< Enable */
+
+/* Register: TIMER_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 21 : Write '1' to disable interrupt for event COMPARE[5] */
+#define TIMER_INTENCLR_COMPARE5_Pos (21UL) /*!< Position of COMPARE5 field. */
+#define TIMER_INTENCLR_COMPARE5_Msk (0x1UL << TIMER_INTENCLR_COMPARE5_Pos) /*!< Bit mask of COMPARE5 field. */
+#define TIMER_INTENCLR_COMPARE5_Disabled (0UL) /*!< Read: Disabled */
+#define TIMER_INTENCLR_COMPARE5_Enabled (1UL) /*!< Read: Enabled */
+#define TIMER_INTENCLR_COMPARE5_Clear (1UL) /*!< Disable */
+
+/* Bit 20 : Write '1' to disable interrupt for event COMPARE[4] */
+#define TIMER_INTENCLR_COMPARE4_Pos (20UL) /*!< Position of COMPARE4 field. */
+#define TIMER_INTENCLR_COMPARE4_Msk (0x1UL << TIMER_INTENCLR_COMPARE4_Pos) /*!< Bit mask of COMPARE4 field. */
+#define TIMER_INTENCLR_COMPARE4_Disabled (0UL) /*!< Read: Disabled */
+#define TIMER_INTENCLR_COMPARE4_Enabled (1UL) /*!< Read: Enabled */
+#define TIMER_INTENCLR_COMPARE4_Clear (1UL) /*!< Disable */
+
+/* Bit 19 : Write '1' to disable interrupt for event COMPARE[3] */
+#define TIMER_INTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */
+#define TIMER_INTENCLR_COMPARE3_Msk (0x1UL << TIMER_INTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */
+#define TIMER_INTENCLR_COMPARE3_Disabled (0UL) /*!< Read: Disabled */
+#define TIMER_INTENCLR_COMPARE3_Enabled (1UL) /*!< Read: Enabled */
+#define TIMER_INTENCLR_COMPARE3_Clear (1UL) /*!< Disable */
+
+/* Bit 18 : Write '1' to disable interrupt for event COMPARE[2] */
+#define TIMER_INTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */
+#define TIMER_INTENCLR_COMPARE2_Msk (0x1UL << TIMER_INTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */
+#define TIMER_INTENCLR_COMPARE2_Disabled (0UL) /*!< Read: Disabled */
+#define TIMER_INTENCLR_COMPARE2_Enabled (1UL) /*!< Read: Enabled */
+#define TIMER_INTENCLR_COMPARE2_Clear (1UL) /*!< Disable */
+
+/* Bit 17 : Write '1' to disable interrupt for event COMPARE[1] */
+#define TIMER_INTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */
+#define TIMER_INTENCLR_COMPARE1_Msk (0x1UL << TIMER_INTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */
+#define TIMER_INTENCLR_COMPARE1_Disabled (0UL) /*!< Read: Disabled */
+#define TIMER_INTENCLR_COMPARE1_Enabled (1UL) /*!< Read: Enabled */
+#define TIMER_INTENCLR_COMPARE1_Clear (1UL) /*!< Disable */
+
+/* Bit 16 : Write '1' to disable interrupt for event COMPARE[0] */
+#define TIMER_INTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */
+#define TIMER_INTENCLR_COMPARE0_Msk (0x1UL << TIMER_INTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */
+#define TIMER_INTENCLR_COMPARE0_Disabled (0UL) /*!< Read: Disabled */
+#define TIMER_INTENCLR_COMPARE0_Enabled (1UL) /*!< Read: Enabled */
+#define TIMER_INTENCLR_COMPARE0_Clear (1UL) /*!< Disable */
+
+/* Register: TIMER_MODE */
+/* Description: Timer mode selection */
+
+/* Bits 1..0 : Timer mode */
+#define TIMER_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */
+#define TIMER_MODE_MODE_Msk (0x3UL << TIMER_MODE_MODE_Pos) /*!< Bit mask of MODE field. */
+#define TIMER_MODE_MODE_Timer (0UL) /*!< Select Timer mode */
+#define TIMER_MODE_MODE_Counter (1UL) /*!< Deprecated enumerator - Select Counter mode */
+#define TIMER_MODE_MODE_LowPowerCounter (2UL) /*!< Select Low Power Counter mode */
+
+/* Register: TIMER_BITMODE */
+/* Description: Configure the number of bits used by the TIMER */
+
+/* Bits 1..0 : Timer bit width */
+#define TIMER_BITMODE_BITMODE_Pos (0UL) /*!< Position of BITMODE field. */
+#define TIMER_BITMODE_BITMODE_Msk (0x3UL << TIMER_BITMODE_BITMODE_Pos) /*!< Bit mask of BITMODE field. */
+#define TIMER_BITMODE_BITMODE_16Bit (0UL) /*!< 16 bit timer bit width */
+#define TIMER_BITMODE_BITMODE_08Bit (1UL) /*!< 8 bit timer bit width */
+#define TIMER_BITMODE_BITMODE_24Bit (2UL) /*!< 24 bit timer bit width */
+#define TIMER_BITMODE_BITMODE_32Bit (3UL) /*!< 32 bit timer bit width */
+
+/* Register: TIMER_PRESCALER */
+/* Description: Timer prescaler register */
+
+/* Bits 3..0 : Prescaler value */
+#define TIMER_PRESCALER_PRESCALER_Pos (0UL) /*!< Position of PRESCALER field. */
+#define TIMER_PRESCALER_PRESCALER_Msk (0xFUL << TIMER_PRESCALER_PRESCALER_Pos) /*!< Bit mask of PRESCALER field. */
+
+/* Register: TIMER_CC */
+/* Description: Description collection: Capture/Compare register n */
+
+/* Bits 31..0 : Capture/Compare value */
+#define TIMER_CC_CC_Pos (0UL) /*!< Position of CC field. */
+#define TIMER_CC_CC_Msk (0xFFFFFFFFUL << TIMER_CC_CC_Pos) /*!< Bit mask of CC field. */
+
+
+/* Peripheral: TWI */
+/* Description: I2C compatible Two-Wire Interface 0 */
+
+/* Register: TWI_TASKS_STARTRX */
+/* Description: Start TWI receive sequence */
+
+/* Bit 0 : Start TWI receive sequence */
+#define TWI_TASKS_STARTRX_TASKS_STARTRX_Pos (0UL) /*!< Position of TASKS_STARTRX field. */
+#define TWI_TASKS_STARTRX_TASKS_STARTRX_Msk (0x1UL << TWI_TASKS_STARTRX_TASKS_STARTRX_Pos) /*!< Bit mask of TASKS_STARTRX field. */
+#define TWI_TASKS_STARTRX_TASKS_STARTRX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWI_TASKS_STARTTX */
+/* Description: Start TWI transmit sequence */
+
+/* Bit 0 : Start TWI transmit sequence */
+#define TWI_TASKS_STARTTX_TASKS_STARTTX_Pos (0UL) /*!< Position of TASKS_STARTTX field. */
+#define TWI_TASKS_STARTTX_TASKS_STARTTX_Msk (0x1UL << TWI_TASKS_STARTTX_TASKS_STARTTX_Pos) /*!< Bit mask of TASKS_STARTTX field. */
+#define TWI_TASKS_STARTTX_TASKS_STARTTX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWI_TASKS_STOP */
+/* Description: Stop TWI transaction */
+
+/* Bit 0 : Stop TWI transaction */
+#define TWI_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define TWI_TASKS_STOP_TASKS_STOP_Msk (0x1UL << TWI_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define TWI_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWI_TASKS_SUSPEND */
+/* Description: Suspend TWI transaction */
+
+/* Bit 0 : Suspend TWI transaction */
+#define TWI_TASKS_SUSPEND_TASKS_SUSPEND_Pos (0UL) /*!< Position of TASKS_SUSPEND field. */
+#define TWI_TASKS_SUSPEND_TASKS_SUSPEND_Msk (0x1UL << TWI_TASKS_SUSPEND_TASKS_SUSPEND_Pos) /*!< Bit mask of TASKS_SUSPEND field. */
+#define TWI_TASKS_SUSPEND_TASKS_SUSPEND_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWI_TASKS_RESUME */
+/* Description: Resume TWI transaction */
+
+/* Bit 0 : Resume TWI transaction */
+#define TWI_TASKS_RESUME_TASKS_RESUME_Pos (0UL) /*!< Position of TASKS_RESUME field. */
+#define TWI_TASKS_RESUME_TASKS_RESUME_Msk (0x1UL << TWI_TASKS_RESUME_TASKS_RESUME_Pos) /*!< Bit mask of TASKS_RESUME field. */
+#define TWI_TASKS_RESUME_TASKS_RESUME_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWI_EVENTS_STOPPED */
+/* Description: TWI stopped */
+
+/* Bit 0 : TWI stopped */
+#define TWI_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */
+#define TWI_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << TWI_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */
+#define TWI_EVENTS_STOPPED_EVENTS_STOPPED_NotGenerated (0UL) /*!< Event not generated */
+#define TWI_EVENTS_STOPPED_EVENTS_STOPPED_Generated (1UL) /*!< Event generated */
+
+/* Register: TWI_EVENTS_RXDREADY */
+/* Description: TWI RXD byte received */
+
+/* Bit 0 : TWI RXD byte received */
+#define TWI_EVENTS_RXDREADY_EVENTS_RXDREADY_Pos (0UL) /*!< Position of EVENTS_RXDREADY field. */
+#define TWI_EVENTS_RXDREADY_EVENTS_RXDREADY_Msk (0x1UL << TWI_EVENTS_RXDREADY_EVENTS_RXDREADY_Pos) /*!< Bit mask of EVENTS_RXDREADY field. */
+#define TWI_EVENTS_RXDREADY_EVENTS_RXDREADY_NotGenerated (0UL) /*!< Event not generated */
+#define TWI_EVENTS_RXDREADY_EVENTS_RXDREADY_Generated (1UL) /*!< Event generated */
+
+/* Register: TWI_EVENTS_TXDSENT */
+/* Description: TWI TXD byte sent */
+
+/* Bit 0 : TWI TXD byte sent */
+#define TWI_EVENTS_TXDSENT_EVENTS_TXDSENT_Pos (0UL) /*!< Position of EVENTS_TXDSENT field. */
+#define TWI_EVENTS_TXDSENT_EVENTS_TXDSENT_Msk (0x1UL << TWI_EVENTS_TXDSENT_EVENTS_TXDSENT_Pos) /*!< Bit mask of EVENTS_TXDSENT field. */
+#define TWI_EVENTS_TXDSENT_EVENTS_TXDSENT_NotGenerated (0UL) /*!< Event not generated */
+#define TWI_EVENTS_TXDSENT_EVENTS_TXDSENT_Generated (1UL) /*!< Event generated */
+
+/* Register: TWI_EVENTS_ERROR */
+/* Description: TWI error */
+
+/* Bit 0 : TWI error */
+#define TWI_EVENTS_ERROR_EVENTS_ERROR_Pos (0UL) /*!< Position of EVENTS_ERROR field. */
+#define TWI_EVENTS_ERROR_EVENTS_ERROR_Msk (0x1UL << TWI_EVENTS_ERROR_EVENTS_ERROR_Pos) /*!< Bit mask of EVENTS_ERROR field. */
+#define TWI_EVENTS_ERROR_EVENTS_ERROR_NotGenerated (0UL) /*!< Event not generated */
+#define TWI_EVENTS_ERROR_EVENTS_ERROR_Generated (1UL) /*!< Event generated */
+
+/* Register: TWI_EVENTS_BB */
+/* Description: TWI byte boundary, generated before each byte that is sent or received */
+
+/* Bit 0 : TWI byte boundary, generated before each byte that is sent or received */
+#define TWI_EVENTS_BB_EVENTS_BB_Pos (0UL) /*!< Position of EVENTS_BB field. */
+#define TWI_EVENTS_BB_EVENTS_BB_Msk (0x1UL << TWI_EVENTS_BB_EVENTS_BB_Pos) /*!< Bit mask of EVENTS_BB field. */
+#define TWI_EVENTS_BB_EVENTS_BB_NotGenerated (0UL) /*!< Event not generated */
+#define TWI_EVENTS_BB_EVENTS_BB_Generated (1UL) /*!< Event generated */
+
+/* Register: TWI_EVENTS_SUSPENDED */
+/* Description: TWI entered the suspended state */
+
+/* Bit 0 : TWI entered the suspended state */
+#define TWI_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Pos (0UL) /*!< Position of EVENTS_SUSPENDED field. */
+#define TWI_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Msk (0x1UL << TWI_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Pos) /*!< Bit mask of EVENTS_SUSPENDED field. */
+#define TWI_EVENTS_SUSPENDED_EVENTS_SUSPENDED_NotGenerated (0UL) /*!< Event not generated */
+#define TWI_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Generated (1UL) /*!< Event generated */
+
+/* Register: TWI_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 1 : Shortcut between event BB and task STOP */
+#define TWI_SHORTS_BB_STOP_Pos (1UL) /*!< Position of BB_STOP field. */
+#define TWI_SHORTS_BB_STOP_Msk (0x1UL << TWI_SHORTS_BB_STOP_Pos) /*!< Bit mask of BB_STOP field. */
+#define TWI_SHORTS_BB_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define TWI_SHORTS_BB_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 0 : Shortcut between event BB and task SUSPEND */
+#define TWI_SHORTS_BB_SUSPEND_Pos (0UL) /*!< Position of BB_SUSPEND field. */
+#define TWI_SHORTS_BB_SUSPEND_Msk (0x1UL << TWI_SHORTS_BB_SUSPEND_Pos) /*!< Bit mask of BB_SUSPEND field. */
+#define TWI_SHORTS_BB_SUSPEND_Disabled (0UL) /*!< Disable shortcut */
+#define TWI_SHORTS_BB_SUSPEND_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: TWI_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 18 : Write '1' to enable interrupt for event SUSPENDED */
+#define TWI_INTENSET_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */
+#define TWI_INTENSET_SUSPENDED_Msk (0x1UL << TWI_INTENSET_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */
+#define TWI_INTENSET_SUSPENDED_Disabled (0UL) /*!< Read: Disabled */
+#define TWI_INTENSET_SUSPENDED_Enabled (1UL) /*!< Read: Enabled */
+#define TWI_INTENSET_SUSPENDED_Set (1UL) /*!< Enable */
+
+/* Bit 14 : Write '1' to enable interrupt for event BB */
+#define TWI_INTENSET_BB_Pos (14UL) /*!< Position of BB field. */
+#define TWI_INTENSET_BB_Msk (0x1UL << TWI_INTENSET_BB_Pos) /*!< Bit mask of BB field. */
+#define TWI_INTENSET_BB_Disabled (0UL) /*!< Read: Disabled */
+#define TWI_INTENSET_BB_Enabled (1UL) /*!< Read: Enabled */
+#define TWI_INTENSET_BB_Set (1UL) /*!< Enable */
+
+/* Bit 9 : Write '1' to enable interrupt for event ERROR */
+#define TWI_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */
+#define TWI_INTENSET_ERROR_Msk (0x1UL << TWI_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define TWI_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */
+#define TWI_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */
+#define TWI_INTENSET_ERROR_Set (1UL) /*!< Enable */
+
+/* Bit 7 : Write '1' to enable interrupt for event TXDSENT */
+#define TWI_INTENSET_TXDSENT_Pos (7UL) /*!< Position of TXDSENT field. */
+#define TWI_INTENSET_TXDSENT_Msk (0x1UL << TWI_INTENSET_TXDSENT_Pos) /*!< Bit mask of TXDSENT field. */
+#define TWI_INTENSET_TXDSENT_Disabled (0UL) /*!< Read: Disabled */
+#define TWI_INTENSET_TXDSENT_Enabled (1UL) /*!< Read: Enabled */
+#define TWI_INTENSET_TXDSENT_Set (1UL) /*!< Enable */
+
+/* Bit 2 : Write '1' to enable interrupt for event RXDREADY */
+#define TWI_INTENSET_RXDREADY_Pos (2UL) /*!< Position of RXDREADY field. */
+#define TWI_INTENSET_RXDREADY_Msk (0x1UL << TWI_INTENSET_RXDREADY_Pos) /*!< Bit mask of RXDREADY field. */
+#define TWI_INTENSET_RXDREADY_Disabled (0UL) /*!< Read: Disabled */
+#define TWI_INTENSET_RXDREADY_Enabled (1UL) /*!< Read: Enabled */
+#define TWI_INTENSET_RXDREADY_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event STOPPED */
+#define TWI_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */
+#define TWI_INTENSET_STOPPED_Msk (0x1UL << TWI_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define TWI_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define TWI_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define TWI_INTENSET_STOPPED_Set (1UL) /*!< Enable */
+
+/* Register: TWI_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 18 : Write '1' to disable interrupt for event SUSPENDED */
+#define TWI_INTENCLR_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */
+#define TWI_INTENCLR_SUSPENDED_Msk (0x1UL << TWI_INTENCLR_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */
+#define TWI_INTENCLR_SUSPENDED_Disabled (0UL) /*!< Read: Disabled */
+#define TWI_INTENCLR_SUSPENDED_Enabled (1UL) /*!< Read: Enabled */
+#define TWI_INTENCLR_SUSPENDED_Clear (1UL) /*!< Disable */
+
+/* Bit 14 : Write '1' to disable interrupt for event BB */
+#define TWI_INTENCLR_BB_Pos (14UL) /*!< Position of BB field. */
+#define TWI_INTENCLR_BB_Msk (0x1UL << TWI_INTENCLR_BB_Pos) /*!< Bit mask of BB field. */
+#define TWI_INTENCLR_BB_Disabled (0UL) /*!< Read: Disabled */
+#define TWI_INTENCLR_BB_Enabled (1UL) /*!< Read: Enabled */
+#define TWI_INTENCLR_BB_Clear (1UL) /*!< Disable */
+
+/* Bit 9 : Write '1' to disable interrupt for event ERROR */
+#define TWI_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */
+#define TWI_INTENCLR_ERROR_Msk (0x1UL << TWI_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define TWI_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */
+#define TWI_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */
+#define TWI_INTENCLR_ERROR_Clear (1UL) /*!< Disable */
+
+/* Bit 7 : Write '1' to disable interrupt for event TXDSENT */
+#define TWI_INTENCLR_TXDSENT_Pos (7UL) /*!< Position of TXDSENT field. */
+#define TWI_INTENCLR_TXDSENT_Msk (0x1UL << TWI_INTENCLR_TXDSENT_Pos) /*!< Bit mask of TXDSENT field. */
+#define TWI_INTENCLR_TXDSENT_Disabled (0UL) /*!< Read: Disabled */
+#define TWI_INTENCLR_TXDSENT_Enabled (1UL) /*!< Read: Enabled */
+#define TWI_INTENCLR_TXDSENT_Clear (1UL) /*!< Disable */
+
+/* Bit 2 : Write '1' to disable interrupt for event RXDREADY */
+#define TWI_INTENCLR_RXDREADY_Pos (2UL) /*!< Position of RXDREADY field. */
+#define TWI_INTENCLR_RXDREADY_Msk (0x1UL << TWI_INTENCLR_RXDREADY_Pos) /*!< Bit mask of RXDREADY field. */
+#define TWI_INTENCLR_RXDREADY_Disabled (0UL) /*!< Read: Disabled */
+#define TWI_INTENCLR_RXDREADY_Enabled (1UL) /*!< Read: Enabled */
+#define TWI_INTENCLR_RXDREADY_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event STOPPED */
+#define TWI_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */
+#define TWI_INTENCLR_STOPPED_Msk (0x1UL << TWI_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define TWI_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define TWI_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define TWI_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */
+
+/* Register: TWI_ERRORSRC */
+/* Description: Error source */
+
+/* Bit 2 : NACK received after sending a data byte (write '1' to clear) */
+#define TWI_ERRORSRC_DNACK_Pos (2UL) /*!< Position of DNACK field. */
+#define TWI_ERRORSRC_DNACK_Msk (0x1UL << TWI_ERRORSRC_DNACK_Pos) /*!< Bit mask of DNACK field. */
+#define TWI_ERRORSRC_DNACK_NotPresent (0UL) /*!< Read: error not present */
+#define TWI_ERRORSRC_DNACK_Present (1UL) /*!< Read: error present */
+
+/* Bit 1 : NACK received after sending the address (write '1' to clear) */
+#define TWI_ERRORSRC_ANACK_Pos (1UL) /*!< Position of ANACK field. */
+#define TWI_ERRORSRC_ANACK_Msk (0x1UL << TWI_ERRORSRC_ANACK_Pos) /*!< Bit mask of ANACK field. */
+#define TWI_ERRORSRC_ANACK_NotPresent (0UL) /*!< Read: error not present */
+#define TWI_ERRORSRC_ANACK_Present (1UL) /*!< Read: error present */
+
+/* Bit 0 : Overrun error */
+#define TWI_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */
+#define TWI_ERRORSRC_OVERRUN_Msk (0x1UL << TWI_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */
+#define TWI_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Read: no overrun occured */
+#define TWI_ERRORSRC_OVERRUN_Present (1UL) /*!< Read: overrun occured */
+
+/* Register: TWI_ENABLE */
+/* Description: Enable TWI */
+
+/* Bits 3..0 : Enable or disable TWI */
+#define TWI_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define TWI_ENABLE_ENABLE_Msk (0xFUL << TWI_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define TWI_ENABLE_ENABLE_Disabled (0UL) /*!< Disable TWI */
+#define TWI_ENABLE_ENABLE_Enabled (5UL) /*!< Enable TWI */
+
+/* Register: TWI_PSEL_SCL */
+/* Description: Pin select for SCL */
+
+/* Bit 31 : Connection */
+#define TWI_PSEL_SCL_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define TWI_PSEL_SCL_CONNECT_Msk (0x1UL << TWI_PSEL_SCL_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define TWI_PSEL_SCL_CONNECT_Connected (0UL) /*!< Connect */
+#define TWI_PSEL_SCL_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define TWI_PSEL_SCL_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define TWI_PSEL_SCL_PORT_Msk (0x1UL << TWI_PSEL_SCL_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define TWI_PSEL_SCL_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define TWI_PSEL_SCL_PIN_Msk (0x1FUL << TWI_PSEL_SCL_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: TWI_PSEL_SDA */
+/* Description: Pin select for SDA */
+
+/* Bit 31 : Connection */
+#define TWI_PSEL_SDA_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define TWI_PSEL_SDA_CONNECT_Msk (0x1UL << TWI_PSEL_SDA_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define TWI_PSEL_SDA_CONNECT_Connected (0UL) /*!< Connect */
+#define TWI_PSEL_SDA_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define TWI_PSEL_SDA_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define TWI_PSEL_SDA_PORT_Msk (0x1UL << TWI_PSEL_SDA_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define TWI_PSEL_SDA_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define TWI_PSEL_SDA_PIN_Msk (0x1FUL << TWI_PSEL_SDA_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: TWI_RXD */
+/* Description: RXD register */
+
+/* Bits 7..0 : RXD register */
+#define TWI_RXD_RXD_Pos (0UL) /*!< Position of RXD field. */
+#define TWI_RXD_RXD_Msk (0xFFUL << TWI_RXD_RXD_Pos) /*!< Bit mask of RXD field. */
+
+/* Register: TWI_TXD */
+/* Description: TXD register */
+
+/* Bits 7..0 : TXD register */
+#define TWI_TXD_TXD_Pos (0UL) /*!< Position of TXD field. */
+#define TWI_TXD_TXD_Msk (0xFFUL << TWI_TXD_TXD_Pos) /*!< Bit mask of TXD field. */
+
+/* Register: TWI_FREQUENCY */
+/* Description: TWI frequency. Accuracy depends on the HFCLK source selected. */
+
+/* Bits 31..0 : TWI master clock frequency */
+#define TWI_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */
+#define TWI_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << TWI_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */
+#define TWI_FREQUENCY_FREQUENCY_K100 (0x01980000UL) /*!< 100 kbps */
+#define TWI_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps */
+#define TWI_FREQUENCY_FREQUENCY_K400 (0x06680000UL) /*!< 400 kbps (actual rate 410.256 kbps) */
+
+/* Register: TWI_ADDRESS */
+/* Description: Address used in the TWI transfer */
+
+/* Bits 6..0 : Address used in the TWI transfer */
+#define TWI_ADDRESS_ADDRESS_Pos (0UL) /*!< Position of ADDRESS field. */
+#define TWI_ADDRESS_ADDRESS_Msk (0x7FUL << TWI_ADDRESS_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */
+
+
+/* Peripheral: TWIM */
+/* Description: I2C compatible Two-Wire Master Interface with EasyDMA 0 */
+
+/* Register: TWIM_TASKS_STARTRX */
+/* Description: Start TWI receive sequence */
+
+/* Bit 0 : Start TWI receive sequence */
+#define TWIM_TASKS_STARTRX_TASKS_STARTRX_Pos (0UL) /*!< Position of TASKS_STARTRX field. */
+#define TWIM_TASKS_STARTRX_TASKS_STARTRX_Msk (0x1UL << TWIM_TASKS_STARTRX_TASKS_STARTRX_Pos) /*!< Bit mask of TASKS_STARTRX field. */
+#define TWIM_TASKS_STARTRX_TASKS_STARTRX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWIM_TASKS_STARTTX */
+/* Description: Start TWI transmit sequence */
+
+/* Bit 0 : Start TWI transmit sequence */
+#define TWIM_TASKS_STARTTX_TASKS_STARTTX_Pos (0UL) /*!< Position of TASKS_STARTTX field. */
+#define TWIM_TASKS_STARTTX_TASKS_STARTTX_Msk (0x1UL << TWIM_TASKS_STARTTX_TASKS_STARTTX_Pos) /*!< Bit mask of TASKS_STARTTX field. */
+#define TWIM_TASKS_STARTTX_TASKS_STARTTX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWIM_TASKS_STOP */
+/* Description: Stop TWI transaction. Must be issued while the TWI master is not suspended. */
+
+/* Bit 0 : Stop TWI transaction. Must be issued while the TWI master is not suspended. */
+#define TWIM_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define TWIM_TASKS_STOP_TASKS_STOP_Msk (0x1UL << TWIM_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define TWIM_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWIM_TASKS_SUSPEND */
+/* Description: Suspend TWI transaction */
+
+/* Bit 0 : Suspend TWI transaction */
+#define TWIM_TASKS_SUSPEND_TASKS_SUSPEND_Pos (0UL) /*!< Position of TASKS_SUSPEND field. */
+#define TWIM_TASKS_SUSPEND_TASKS_SUSPEND_Msk (0x1UL << TWIM_TASKS_SUSPEND_TASKS_SUSPEND_Pos) /*!< Bit mask of TASKS_SUSPEND field. */
+#define TWIM_TASKS_SUSPEND_TASKS_SUSPEND_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWIM_TASKS_RESUME */
+/* Description: Resume TWI transaction */
+
+/* Bit 0 : Resume TWI transaction */
+#define TWIM_TASKS_RESUME_TASKS_RESUME_Pos (0UL) /*!< Position of TASKS_RESUME field. */
+#define TWIM_TASKS_RESUME_TASKS_RESUME_Msk (0x1UL << TWIM_TASKS_RESUME_TASKS_RESUME_Pos) /*!< Bit mask of TASKS_RESUME field. */
+#define TWIM_TASKS_RESUME_TASKS_RESUME_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWIM_EVENTS_STOPPED */
+/* Description: TWI stopped */
+
+/* Bit 0 : TWI stopped */
+#define TWIM_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */
+#define TWIM_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << TWIM_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */
+#define TWIM_EVENTS_STOPPED_EVENTS_STOPPED_NotGenerated (0UL) /*!< Event not generated */
+#define TWIM_EVENTS_STOPPED_EVENTS_STOPPED_Generated (1UL) /*!< Event generated */
+
+/* Register: TWIM_EVENTS_ERROR */
+/* Description: TWI error */
+
+/* Bit 0 : TWI error */
+#define TWIM_EVENTS_ERROR_EVENTS_ERROR_Pos (0UL) /*!< Position of EVENTS_ERROR field. */
+#define TWIM_EVENTS_ERROR_EVENTS_ERROR_Msk (0x1UL << TWIM_EVENTS_ERROR_EVENTS_ERROR_Pos) /*!< Bit mask of EVENTS_ERROR field. */
+#define TWIM_EVENTS_ERROR_EVENTS_ERROR_NotGenerated (0UL) /*!< Event not generated */
+#define TWIM_EVENTS_ERROR_EVENTS_ERROR_Generated (1UL) /*!< Event generated */
+
+/* Register: TWIM_EVENTS_SUSPENDED */
+/* Description: Last byte has been sent out after the SUSPEND task has been issued, TWI traffic is now suspended. */
+
+/* Bit 0 : Last byte has been sent out after the SUSPEND task has been issued, TWI traffic is now suspended. */
+#define TWIM_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Pos (0UL) /*!< Position of EVENTS_SUSPENDED field. */
+#define TWIM_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Msk (0x1UL << TWIM_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Pos) /*!< Bit mask of EVENTS_SUSPENDED field. */
+#define TWIM_EVENTS_SUSPENDED_EVENTS_SUSPENDED_NotGenerated (0UL) /*!< Event not generated */
+#define TWIM_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Generated (1UL) /*!< Event generated */
+
+/* Register: TWIM_EVENTS_RXSTARTED */
+/* Description: Receive sequence started */
+
+/* Bit 0 : Receive sequence started */
+#define TWIM_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos (0UL) /*!< Position of EVENTS_RXSTARTED field. */
+#define TWIM_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Msk (0x1UL << TWIM_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos) /*!< Bit mask of EVENTS_RXSTARTED field. */
+#define TWIM_EVENTS_RXSTARTED_EVENTS_RXSTARTED_NotGenerated (0UL) /*!< Event not generated */
+#define TWIM_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Generated (1UL) /*!< Event generated */
+
+/* Register: TWIM_EVENTS_TXSTARTED */
+/* Description: Transmit sequence started */
+
+/* Bit 0 : Transmit sequence started */
+#define TWIM_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos (0UL) /*!< Position of EVENTS_TXSTARTED field. */
+#define TWIM_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Msk (0x1UL << TWIM_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos) /*!< Bit mask of EVENTS_TXSTARTED field. */
+#define TWIM_EVENTS_TXSTARTED_EVENTS_TXSTARTED_NotGenerated (0UL) /*!< Event not generated */
+#define TWIM_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Generated (1UL) /*!< Event generated */
+
+/* Register: TWIM_EVENTS_LASTRX */
+/* Description: Byte boundary, starting to receive the last byte */
+
+/* Bit 0 : Byte boundary, starting to receive the last byte */
+#define TWIM_EVENTS_LASTRX_EVENTS_LASTRX_Pos (0UL) /*!< Position of EVENTS_LASTRX field. */
+#define TWIM_EVENTS_LASTRX_EVENTS_LASTRX_Msk (0x1UL << TWIM_EVENTS_LASTRX_EVENTS_LASTRX_Pos) /*!< Bit mask of EVENTS_LASTRX field. */
+#define TWIM_EVENTS_LASTRX_EVENTS_LASTRX_NotGenerated (0UL) /*!< Event not generated */
+#define TWIM_EVENTS_LASTRX_EVENTS_LASTRX_Generated (1UL) /*!< Event generated */
+
+/* Register: TWIM_EVENTS_LASTTX */
+/* Description: Byte boundary, starting to transmit the last byte */
+
+/* Bit 0 : Byte boundary, starting to transmit the last byte */
+#define TWIM_EVENTS_LASTTX_EVENTS_LASTTX_Pos (0UL) /*!< Position of EVENTS_LASTTX field. */
+#define TWIM_EVENTS_LASTTX_EVENTS_LASTTX_Msk (0x1UL << TWIM_EVENTS_LASTTX_EVENTS_LASTTX_Pos) /*!< Bit mask of EVENTS_LASTTX field. */
+#define TWIM_EVENTS_LASTTX_EVENTS_LASTTX_NotGenerated (0UL) /*!< Event not generated */
+#define TWIM_EVENTS_LASTTX_EVENTS_LASTTX_Generated (1UL) /*!< Event generated */
+
+/* Register: TWIM_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 12 : Shortcut between event LASTRX and task STOP */
+#define TWIM_SHORTS_LASTRX_STOP_Pos (12UL) /*!< Position of LASTRX_STOP field. */
+#define TWIM_SHORTS_LASTRX_STOP_Msk (0x1UL << TWIM_SHORTS_LASTRX_STOP_Pos) /*!< Bit mask of LASTRX_STOP field. */
+#define TWIM_SHORTS_LASTRX_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define TWIM_SHORTS_LASTRX_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 11 : Shortcut between event LASTRX and task SUSPEND */
+#define TWIM_SHORTS_LASTRX_SUSPEND_Pos (11UL) /*!< Position of LASTRX_SUSPEND field. */
+#define TWIM_SHORTS_LASTRX_SUSPEND_Msk (0x1UL << TWIM_SHORTS_LASTRX_SUSPEND_Pos) /*!< Bit mask of LASTRX_SUSPEND field. */
+#define TWIM_SHORTS_LASTRX_SUSPEND_Disabled (0UL) /*!< Disable shortcut */
+#define TWIM_SHORTS_LASTRX_SUSPEND_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 10 : Shortcut between event LASTRX and task STARTTX */
+#define TWIM_SHORTS_LASTRX_STARTTX_Pos (10UL) /*!< Position of LASTRX_STARTTX field. */
+#define TWIM_SHORTS_LASTRX_STARTTX_Msk (0x1UL << TWIM_SHORTS_LASTRX_STARTTX_Pos) /*!< Bit mask of LASTRX_STARTTX field. */
+#define TWIM_SHORTS_LASTRX_STARTTX_Disabled (0UL) /*!< Disable shortcut */
+#define TWIM_SHORTS_LASTRX_STARTTX_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 9 : Shortcut between event LASTTX and task STOP */
+#define TWIM_SHORTS_LASTTX_STOP_Pos (9UL) /*!< Position of LASTTX_STOP field. */
+#define TWIM_SHORTS_LASTTX_STOP_Msk (0x1UL << TWIM_SHORTS_LASTTX_STOP_Pos) /*!< Bit mask of LASTTX_STOP field. */
+#define TWIM_SHORTS_LASTTX_STOP_Disabled (0UL) /*!< Disable shortcut */
+#define TWIM_SHORTS_LASTTX_STOP_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 8 : Shortcut between event LASTTX and task SUSPEND */
+#define TWIM_SHORTS_LASTTX_SUSPEND_Pos (8UL) /*!< Position of LASTTX_SUSPEND field. */
+#define TWIM_SHORTS_LASTTX_SUSPEND_Msk (0x1UL << TWIM_SHORTS_LASTTX_SUSPEND_Pos) /*!< Bit mask of LASTTX_SUSPEND field. */
+#define TWIM_SHORTS_LASTTX_SUSPEND_Disabled (0UL) /*!< Disable shortcut */
+#define TWIM_SHORTS_LASTTX_SUSPEND_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 7 : Shortcut between event LASTTX and task STARTRX */
+#define TWIM_SHORTS_LASTTX_STARTRX_Pos (7UL) /*!< Position of LASTTX_STARTRX field. */
+#define TWIM_SHORTS_LASTTX_STARTRX_Msk (0x1UL << TWIM_SHORTS_LASTTX_STARTRX_Pos) /*!< Bit mask of LASTTX_STARTRX field. */
+#define TWIM_SHORTS_LASTTX_STARTRX_Disabled (0UL) /*!< Disable shortcut */
+#define TWIM_SHORTS_LASTTX_STARTRX_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: TWIM_INTEN */
+/* Description: Enable or disable interrupt */
+
+/* Bit 24 : Enable or disable interrupt for event LASTTX */
+#define TWIM_INTEN_LASTTX_Pos (24UL) /*!< Position of LASTTX field. */
+#define TWIM_INTEN_LASTTX_Msk (0x1UL << TWIM_INTEN_LASTTX_Pos) /*!< Bit mask of LASTTX field. */
+#define TWIM_INTEN_LASTTX_Disabled (0UL) /*!< Disable */
+#define TWIM_INTEN_LASTTX_Enabled (1UL) /*!< Enable */
+
+/* Bit 23 : Enable or disable interrupt for event LASTRX */
+#define TWIM_INTEN_LASTRX_Pos (23UL) /*!< Position of LASTRX field. */
+#define TWIM_INTEN_LASTRX_Msk (0x1UL << TWIM_INTEN_LASTRX_Pos) /*!< Bit mask of LASTRX field. */
+#define TWIM_INTEN_LASTRX_Disabled (0UL) /*!< Disable */
+#define TWIM_INTEN_LASTRX_Enabled (1UL) /*!< Enable */
+
+/* Bit 20 : Enable or disable interrupt for event TXSTARTED */
+#define TWIM_INTEN_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */
+#define TWIM_INTEN_TXSTARTED_Msk (0x1UL << TWIM_INTEN_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */
+#define TWIM_INTEN_TXSTARTED_Disabled (0UL) /*!< Disable */
+#define TWIM_INTEN_TXSTARTED_Enabled (1UL) /*!< Enable */
+
+/* Bit 19 : Enable or disable interrupt for event RXSTARTED */
+#define TWIM_INTEN_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */
+#define TWIM_INTEN_RXSTARTED_Msk (0x1UL << TWIM_INTEN_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */
+#define TWIM_INTEN_RXSTARTED_Disabled (0UL) /*!< Disable */
+#define TWIM_INTEN_RXSTARTED_Enabled (1UL) /*!< Enable */
+
+/* Bit 18 : Enable or disable interrupt for event SUSPENDED */
+#define TWIM_INTEN_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */
+#define TWIM_INTEN_SUSPENDED_Msk (0x1UL << TWIM_INTEN_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */
+#define TWIM_INTEN_SUSPENDED_Disabled (0UL) /*!< Disable */
+#define TWIM_INTEN_SUSPENDED_Enabled (1UL) /*!< Enable */
+
+/* Bit 9 : Enable or disable interrupt for event ERROR */
+#define TWIM_INTEN_ERROR_Pos (9UL) /*!< Position of ERROR field. */
+#define TWIM_INTEN_ERROR_Msk (0x1UL << TWIM_INTEN_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define TWIM_INTEN_ERROR_Disabled (0UL) /*!< Disable */
+#define TWIM_INTEN_ERROR_Enabled (1UL) /*!< Enable */
+
+/* Bit 1 : Enable or disable interrupt for event STOPPED */
+#define TWIM_INTEN_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */
+#define TWIM_INTEN_STOPPED_Msk (0x1UL << TWIM_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define TWIM_INTEN_STOPPED_Disabled (0UL) /*!< Disable */
+#define TWIM_INTEN_STOPPED_Enabled (1UL) /*!< Enable */
+
+/* Register: TWIM_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 24 : Write '1' to enable interrupt for event LASTTX */
+#define TWIM_INTENSET_LASTTX_Pos (24UL) /*!< Position of LASTTX field. */
+#define TWIM_INTENSET_LASTTX_Msk (0x1UL << TWIM_INTENSET_LASTTX_Pos) /*!< Bit mask of LASTTX field. */
+#define TWIM_INTENSET_LASTTX_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENSET_LASTTX_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENSET_LASTTX_Set (1UL) /*!< Enable */
+
+/* Bit 23 : Write '1' to enable interrupt for event LASTRX */
+#define TWIM_INTENSET_LASTRX_Pos (23UL) /*!< Position of LASTRX field. */
+#define TWIM_INTENSET_LASTRX_Msk (0x1UL << TWIM_INTENSET_LASTRX_Pos) /*!< Bit mask of LASTRX field. */
+#define TWIM_INTENSET_LASTRX_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENSET_LASTRX_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENSET_LASTRX_Set (1UL) /*!< Enable */
+
+/* Bit 20 : Write '1' to enable interrupt for event TXSTARTED */
+#define TWIM_INTENSET_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */
+#define TWIM_INTENSET_TXSTARTED_Msk (0x1UL << TWIM_INTENSET_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */
+#define TWIM_INTENSET_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENSET_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENSET_TXSTARTED_Set (1UL) /*!< Enable */
+
+/* Bit 19 : Write '1' to enable interrupt for event RXSTARTED */
+#define TWIM_INTENSET_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */
+#define TWIM_INTENSET_RXSTARTED_Msk (0x1UL << TWIM_INTENSET_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */
+#define TWIM_INTENSET_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENSET_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENSET_RXSTARTED_Set (1UL) /*!< Enable */
+
+/* Bit 18 : Write '1' to enable interrupt for event SUSPENDED */
+#define TWIM_INTENSET_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */
+#define TWIM_INTENSET_SUSPENDED_Msk (0x1UL << TWIM_INTENSET_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */
+#define TWIM_INTENSET_SUSPENDED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENSET_SUSPENDED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENSET_SUSPENDED_Set (1UL) /*!< Enable */
+
+/* Bit 9 : Write '1' to enable interrupt for event ERROR */
+#define TWIM_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */
+#define TWIM_INTENSET_ERROR_Msk (0x1UL << TWIM_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define TWIM_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENSET_ERROR_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event STOPPED */
+#define TWIM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */
+#define TWIM_INTENSET_STOPPED_Msk (0x1UL << TWIM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define TWIM_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENSET_STOPPED_Set (1UL) /*!< Enable */
+
+/* Register: TWIM_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 24 : Write '1' to disable interrupt for event LASTTX */
+#define TWIM_INTENCLR_LASTTX_Pos (24UL) /*!< Position of LASTTX field. */
+#define TWIM_INTENCLR_LASTTX_Msk (0x1UL << TWIM_INTENCLR_LASTTX_Pos) /*!< Bit mask of LASTTX field. */
+#define TWIM_INTENCLR_LASTTX_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENCLR_LASTTX_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENCLR_LASTTX_Clear (1UL) /*!< Disable */
+
+/* Bit 23 : Write '1' to disable interrupt for event LASTRX */
+#define TWIM_INTENCLR_LASTRX_Pos (23UL) /*!< Position of LASTRX field. */
+#define TWIM_INTENCLR_LASTRX_Msk (0x1UL << TWIM_INTENCLR_LASTRX_Pos) /*!< Bit mask of LASTRX field. */
+#define TWIM_INTENCLR_LASTRX_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENCLR_LASTRX_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENCLR_LASTRX_Clear (1UL) /*!< Disable */
+
+/* Bit 20 : Write '1' to disable interrupt for event TXSTARTED */
+#define TWIM_INTENCLR_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */
+#define TWIM_INTENCLR_TXSTARTED_Msk (0x1UL << TWIM_INTENCLR_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */
+#define TWIM_INTENCLR_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENCLR_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENCLR_TXSTARTED_Clear (1UL) /*!< Disable */
+
+/* Bit 19 : Write '1' to disable interrupt for event RXSTARTED */
+#define TWIM_INTENCLR_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */
+#define TWIM_INTENCLR_RXSTARTED_Msk (0x1UL << TWIM_INTENCLR_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */
+#define TWIM_INTENCLR_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENCLR_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENCLR_RXSTARTED_Clear (1UL) /*!< Disable */
+
+/* Bit 18 : Write '1' to disable interrupt for event SUSPENDED */
+#define TWIM_INTENCLR_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */
+#define TWIM_INTENCLR_SUSPENDED_Msk (0x1UL << TWIM_INTENCLR_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */
+#define TWIM_INTENCLR_SUSPENDED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENCLR_SUSPENDED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENCLR_SUSPENDED_Clear (1UL) /*!< Disable */
+
+/* Bit 9 : Write '1' to disable interrupt for event ERROR */
+#define TWIM_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */
+#define TWIM_INTENCLR_ERROR_Msk (0x1UL << TWIM_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define TWIM_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENCLR_ERROR_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event STOPPED */
+#define TWIM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */
+#define TWIM_INTENCLR_STOPPED_Msk (0x1UL << TWIM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define TWIM_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIM_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */
+
+/* Register: TWIM_ERRORSRC */
+/* Description: Error source */
+
+/* Bit 2 : NACK received after sending a data byte (write '1' to clear) */
+#define TWIM_ERRORSRC_DNACK_Pos (2UL) /*!< Position of DNACK field. */
+#define TWIM_ERRORSRC_DNACK_Msk (0x1UL << TWIM_ERRORSRC_DNACK_Pos) /*!< Bit mask of DNACK field. */
+#define TWIM_ERRORSRC_DNACK_NotReceived (0UL) /*!< Error did not occur */
+#define TWIM_ERRORSRC_DNACK_Received (1UL) /*!< Error occurred */
+
+/* Bit 1 : NACK received after sending the address (write '1' to clear) */
+#define TWIM_ERRORSRC_ANACK_Pos (1UL) /*!< Position of ANACK field. */
+#define TWIM_ERRORSRC_ANACK_Msk (0x1UL << TWIM_ERRORSRC_ANACK_Pos) /*!< Bit mask of ANACK field. */
+#define TWIM_ERRORSRC_ANACK_NotReceived (0UL) /*!< Error did not occur */
+#define TWIM_ERRORSRC_ANACK_Received (1UL) /*!< Error occurred */
+
+/* Bit 0 : Overrun error */
+#define TWIM_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */
+#define TWIM_ERRORSRC_OVERRUN_Msk (0x1UL << TWIM_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */
+#define TWIM_ERRORSRC_OVERRUN_NotReceived (0UL) /*!< Error did not occur */
+#define TWIM_ERRORSRC_OVERRUN_Received (1UL) /*!< Error occurred */
+
+/* Register: TWIM_ENABLE */
+/* Description: Enable TWIM */
+
+/* Bits 3..0 : Enable or disable TWIM */
+#define TWIM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define TWIM_ENABLE_ENABLE_Msk (0xFUL << TWIM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define TWIM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable TWIM */
+#define TWIM_ENABLE_ENABLE_Enabled (6UL) /*!< Enable TWIM */
+
+/* Register: TWIM_PSEL_SCL */
+/* Description: Pin select for SCL signal */
+
+/* Bit 31 : Connection */
+#define TWIM_PSEL_SCL_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define TWIM_PSEL_SCL_CONNECT_Msk (0x1UL << TWIM_PSEL_SCL_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define TWIM_PSEL_SCL_CONNECT_Connected (0UL) /*!< Connect */
+#define TWIM_PSEL_SCL_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define TWIM_PSEL_SCL_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define TWIM_PSEL_SCL_PORT_Msk (0x1UL << TWIM_PSEL_SCL_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define TWIM_PSEL_SCL_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define TWIM_PSEL_SCL_PIN_Msk (0x1FUL << TWIM_PSEL_SCL_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: TWIM_PSEL_SDA */
+/* Description: Pin select for SDA signal */
+
+/* Bit 31 : Connection */
+#define TWIM_PSEL_SDA_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define TWIM_PSEL_SDA_CONNECT_Msk (0x1UL << TWIM_PSEL_SDA_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define TWIM_PSEL_SDA_CONNECT_Connected (0UL) /*!< Connect */
+#define TWIM_PSEL_SDA_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define TWIM_PSEL_SDA_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define TWIM_PSEL_SDA_PORT_Msk (0x1UL << TWIM_PSEL_SDA_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define TWIM_PSEL_SDA_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define TWIM_PSEL_SDA_PIN_Msk (0x1FUL << TWIM_PSEL_SDA_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: TWIM_FREQUENCY */
+/* Description: TWI frequency. Accuracy depends on the HFCLK source selected. */
+
+/* Bits 31..0 : TWI master clock frequency */
+#define TWIM_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */
+#define TWIM_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << TWIM_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */
+#define TWIM_FREQUENCY_FREQUENCY_K100 (0x01980000UL) /*!< 100 kbps */
+#define TWIM_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps */
+#define TWIM_FREQUENCY_FREQUENCY_K400 (0x06400000UL) /*!< 400 kbps */
+
+/* Register: TWIM_RXD_PTR */
+/* Description: Data pointer */
+
+/* Bits 31..0 : Data pointer */
+#define TWIM_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define TWIM_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIM_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: TWIM_RXD_MAXCNT */
+/* Description: Maximum number of bytes in receive buffer */
+
+/* Bits 15..0 : Maximum number of bytes in receive buffer */
+#define TWIM_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define TWIM_RXD_MAXCNT_MAXCNT_Msk (0xFFFFUL << TWIM_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: TWIM_RXD_AMOUNT */
+/* Description: Number of bytes transferred in the last transaction */
+
+/* Bits 15..0 : Number of bytes transferred in the last transaction. In case of NACK error, includes the NACK'ed byte. */
+#define TWIM_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define TWIM_RXD_AMOUNT_AMOUNT_Msk (0xFFFFUL << TWIM_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+/* Register: TWIM_RXD_LIST */
+/* Description: EasyDMA list type */
+
+/* Bits 2..0 : List type */
+#define TWIM_RXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */
+#define TWIM_RXD_LIST_LIST_Msk (0x7UL << TWIM_RXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */
+#define TWIM_RXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */
+#define TWIM_RXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */
+
+/* Register: TWIM_TXD_PTR */
+/* Description: Data pointer */
+
+/* Bits 31..0 : Data pointer */
+#define TWIM_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define TWIM_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIM_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: TWIM_TXD_MAXCNT */
+/* Description: Maximum number of bytes in transmit buffer */
+
+/* Bits 15..0 : Maximum number of bytes in transmit buffer */
+#define TWIM_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define TWIM_TXD_MAXCNT_MAXCNT_Msk (0xFFFFUL << TWIM_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: TWIM_TXD_AMOUNT */
+/* Description: Number of bytes transferred in the last transaction */
+
+/* Bits 15..0 : Number of bytes transferred in the last transaction. In case of NACK error, includes the NACK'ed byte. */
+#define TWIM_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define TWIM_TXD_AMOUNT_AMOUNT_Msk (0xFFFFUL << TWIM_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+/* Register: TWIM_TXD_LIST */
+/* Description: EasyDMA list type */
+
+/* Bits 2..0 : List type */
+#define TWIM_TXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */
+#define TWIM_TXD_LIST_LIST_Msk (0x7UL << TWIM_TXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */
+#define TWIM_TXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */
+#define TWIM_TXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */
+
+/* Register: TWIM_ADDRESS */
+/* Description: Address used in the TWI transfer */
+
+/* Bits 6..0 : Address used in the TWI transfer */
+#define TWIM_ADDRESS_ADDRESS_Pos (0UL) /*!< Position of ADDRESS field. */
+#define TWIM_ADDRESS_ADDRESS_Msk (0x7FUL << TWIM_ADDRESS_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */
+
+
+/* Peripheral: TWIS */
+/* Description: I2C compatible Two-Wire Slave Interface with EasyDMA 0 */
+
+/* Register: TWIS_TASKS_STOP */
+/* Description: Stop TWI transaction */
+
+/* Bit 0 : Stop TWI transaction */
+#define TWIS_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */
+#define TWIS_TASKS_STOP_TASKS_STOP_Msk (0x1UL << TWIS_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
+#define TWIS_TASKS_STOP_TASKS_STOP_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWIS_TASKS_SUSPEND */
+/* Description: Suspend TWI transaction */
+
+/* Bit 0 : Suspend TWI transaction */
+#define TWIS_TASKS_SUSPEND_TASKS_SUSPEND_Pos (0UL) /*!< Position of TASKS_SUSPEND field. */
+#define TWIS_TASKS_SUSPEND_TASKS_SUSPEND_Msk (0x1UL << TWIS_TASKS_SUSPEND_TASKS_SUSPEND_Pos) /*!< Bit mask of TASKS_SUSPEND field. */
+#define TWIS_TASKS_SUSPEND_TASKS_SUSPEND_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWIS_TASKS_RESUME */
+/* Description: Resume TWI transaction */
+
+/* Bit 0 : Resume TWI transaction */
+#define TWIS_TASKS_RESUME_TASKS_RESUME_Pos (0UL) /*!< Position of TASKS_RESUME field. */
+#define TWIS_TASKS_RESUME_TASKS_RESUME_Msk (0x1UL << TWIS_TASKS_RESUME_TASKS_RESUME_Pos) /*!< Bit mask of TASKS_RESUME field. */
+#define TWIS_TASKS_RESUME_TASKS_RESUME_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWIS_TASKS_PREPARERX */
+/* Description: Prepare the TWI slave to respond to a write command */
+
+/* Bit 0 : Prepare the TWI slave to respond to a write command */
+#define TWIS_TASKS_PREPARERX_TASKS_PREPARERX_Pos (0UL) /*!< Position of TASKS_PREPARERX field. */
+#define TWIS_TASKS_PREPARERX_TASKS_PREPARERX_Msk (0x1UL << TWIS_TASKS_PREPARERX_TASKS_PREPARERX_Pos) /*!< Bit mask of TASKS_PREPARERX field. */
+#define TWIS_TASKS_PREPARERX_TASKS_PREPARERX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWIS_TASKS_PREPARETX */
+/* Description: Prepare the TWI slave to respond to a read command */
+
+/* Bit 0 : Prepare the TWI slave to respond to a read command */
+#define TWIS_TASKS_PREPARETX_TASKS_PREPARETX_Pos (0UL) /*!< Position of TASKS_PREPARETX field. */
+#define TWIS_TASKS_PREPARETX_TASKS_PREPARETX_Msk (0x1UL << TWIS_TASKS_PREPARETX_TASKS_PREPARETX_Pos) /*!< Bit mask of TASKS_PREPARETX field. */
+#define TWIS_TASKS_PREPARETX_TASKS_PREPARETX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: TWIS_EVENTS_STOPPED */
+/* Description: TWI stopped */
+
+/* Bit 0 : TWI stopped */
+#define TWIS_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */
+#define TWIS_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << TWIS_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */
+#define TWIS_EVENTS_STOPPED_EVENTS_STOPPED_NotGenerated (0UL) /*!< Event not generated */
+#define TWIS_EVENTS_STOPPED_EVENTS_STOPPED_Generated (1UL) /*!< Event generated */
+
+/* Register: TWIS_EVENTS_ERROR */
+/* Description: TWI error */
+
+/* Bit 0 : TWI error */
+#define TWIS_EVENTS_ERROR_EVENTS_ERROR_Pos (0UL) /*!< Position of EVENTS_ERROR field. */
+#define TWIS_EVENTS_ERROR_EVENTS_ERROR_Msk (0x1UL << TWIS_EVENTS_ERROR_EVENTS_ERROR_Pos) /*!< Bit mask of EVENTS_ERROR field. */
+#define TWIS_EVENTS_ERROR_EVENTS_ERROR_NotGenerated (0UL) /*!< Event not generated */
+#define TWIS_EVENTS_ERROR_EVENTS_ERROR_Generated (1UL) /*!< Event generated */
+
+/* Register: TWIS_EVENTS_RXSTARTED */
+/* Description: Receive sequence started */
+
+/* Bit 0 : Receive sequence started */
+#define TWIS_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos (0UL) /*!< Position of EVENTS_RXSTARTED field. */
+#define TWIS_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Msk (0x1UL << TWIS_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos) /*!< Bit mask of EVENTS_RXSTARTED field. */
+#define TWIS_EVENTS_RXSTARTED_EVENTS_RXSTARTED_NotGenerated (0UL) /*!< Event not generated */
+#define TWIS_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Generated (1UL) /*!< Event generated */
+
+/* Register: TWIS_EVENTS_TXSTARTED */
+/* Description: Transmit sequence started */
+
+/* Bit 0 : Transmit sequence started */
+#define TWIS_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos (0UL) /*!< Position of EVENTS_TXSTARTED field. */
+#define TWIS_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Msk (0x1UL << TWIS_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos) /*!< Bit mask of EVENTS_TXSTARTED field. */
+#define TWIS_EVENTS_TXSTARTED_EVENTS_TXSTARTED_NotGenerated (0UL) /*!< Event not generated */
+#define TWIS_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Generated (1UL) /*!< Event generated */
+
+/* Register: TWIS_EVENTS_WRITE */
+/* Description: Write command received */
+
+/* Bit 0 : Write command received */
+#define TWIS_EVENTS_WRITE_EVENTS_WRITE_Pos (0UL) /*!< Position of EVENTS_WRITE field. */
+#define TWIS_EVENTS_WRITE_EVENTS_WRITE_Msk (0x1UL << TWIS_EVENTS_WRITE_EVENTS_WRITE_Pos) /*!< Bit mask of EVENTS_WRITE field. */
+#define TWIS_EVENTS_WRITE_EVENTS_WRITE_NotGenerated (0UL) /*!< Event not generated */
+#define TWIS_EVENTS_WRITE_EVENTS_WRITE_Generated (1UL) /*!< Event generated */
+
+/* Register: TWIS_EVENTS_READ */
+/* Description: Read command received */
+
+/* Bit 0 : Read command received */
+#define TWIS_EVENTS_READ_EVENTS_READ_Pos (0UL) /*!< Position of EVENTS_READ field. */
+#define TWIS_EVENTS_READ_EVENTS_READ_Msk (0x1UL << TWIS_EVENTS_READ_EVENTS_READ_Pos) /*!< Bit mask of EVENTS_READ field. */
+#define TWIS_EVENTS_READ_EVENTS_READ_NotGenerated (0UL) /*!< Event not generated */
+#define TWIS_EVENTS_READ_EVENTS_READ_Generated (1UL) /*!< Event generated */
+
+/* Register: TWIS_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 14 : Shortcut between event READ and task SUSPEND */
+#define TWIS_SHORTS_READ_SUSPEND_Pos (14UL) /*!< Position of READ_SUSPEND field. */
+#define TWIS_SHORTS_READ_SUSPEND_Msk (0x1UL << TWIS_SHORTS_READ_SUSPEND_Pos) /*!< Bit mask of READ_SUSPEND field. */
+#define TWIS_SHORTS_READ_SUSPEND_Disabled (0UL) /*!< Disable shortcut */
+#define TWIS_SHORTS_READ_SUSPEND_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 13 : Shortcut between event WRITE and task SUSPEND */
+#define TWIS_SHORTS_WRITE_SUSPEND_Pos (13UL) /*!< Position of WRITE_SUSPEND field. */
+#define TWIS_SHORTS_WRITE_SUSPEND_Msk (0x1UL << TWIS_SHORTS_WRITE_SUSPEND_Pos) /*!< Bit mask of WRITE_SUSPEND field. */
+#define TWIS_SHORTS_WRITE_SUSPEND_Disabled (0UL) /*!< Disable shortcut */
+#define TWIS_SHORTS_WRITE_SUSPEND_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: TWIS_INTEN */
+/* Description: Enable or disable interrupt */
+
+/* Bit 26 : Enable or disable interrupt for event READ */
+#define TWIS_INTEN_READ_Pos (26UL) /*!< Position of READ field. */
+#define TWIS_INTEN_READ_Msk (0x1UL << TWIS_INTEN_READ_Pos) /*!< Bit mask of READ field. */
+#define TWIS_INTEN_READ_Disabled (0UL) /*!< Disable */
+#define TWIS_INTEN_READ_Enabled (1UL) /*!< Enable */
+
+/* Bit 25 : Enable or disable interrupt for event WRITE */
+#define TWIS_INTEN_WRITE_Pos (25UL) /*!< Position of WRITE field. */
+#define TWIS_INTEN_WRITE_Msk (0x1UL << TWIS_INTEN_WRITE_Pos) /*!< Bit mask of WRITE field. */
+#define TWIS_INTEN_WRITE_Disabled (0UL) /*!< Disable */
+#define TWIS_INTEN_WRITE_Enabled (1UL) /*!< Enable */
+
+/* Bit 20 : Enable or disable interrupt for event TXSTARTED */
+#define TWIS_INTEN_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */
+#define TWIS_INTEN_TXSTARTED_Msk (0x1UL << TWIS_INTEN_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */
+#define TWIS_INTEN_TXSTARTED_Disabled (0UL) /*!< Disable */
+#define TWIS_INTEN_TXSTARTED_Enabled (1UL) /*!< Enable */
+
+/* Bit 19 : Enable or disable interrupt for event RXSTARTED */
+#define TWIS_INTEN_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */
+#define TWIS_INTEN_RXSTARTED_Msk (0x1UL << TWIS_INTEN_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */
+#define TWIS_INTEN_RXSTARTED_Disabled (0UL) /*!< Disable */
+#define TWIS_INTEN_RXSTARTED_Enabled (1UL) /*!< Enable */
+
+/* Bit 9 : Enable or disable interrupt for event ERROR */
+#define TWIS_INTEN_ERROR_Pos (9UL) /*!< Position of ERROR field. */
+#define TWIS_INTEN_ERROR_Msk (0x1UL << TWIS_INTEN_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define TWIS_INTEN_ERROR_Disabled (0UL) /*!< Disable */
+#define TWIS_INTEN_ERROR_Enabled (1UL) /*!< Enable */
+
+/* Bit 1 : Enable or disable interrupt for event STOPPED */
+#define TWIS_INTEN_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */
+#define TWIS_INTEN_STOPPED_Msk (0x1UL << TWIS_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define TWIS_INTEN_STOPPED_Disabled (0UL) /*!< Disable */
+#define TWIS_INTEN_STOPPED_Enabled (1UL) /*!< Enable */
+
+/* Register: TWIS_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 26 : Write '1' to enable interrupt for event READ */
+#define TWIS_INTENSET_READ_Pos (26UL) /*!< Position of READ field. */
+#define TWIS_INTENSET_READ_Msk (0x1UL << TWIS_INTENSET_READ_Pos) /*!< Bit mask of READ field. */
+#define TWIS_INTENSET_READ_Disabled (0UL) /*!< Read: Disabled */
+#define TWIS_INTENSET_READ_Enabled (1UL) /*!< Read: Enabled */
+#define TWIS_INTENSET_READ_Set (1UL) /*!< Enable */
+
+/* Bit 25 : Write '1' to enable interrupt for event WRITE */
+#define TWIS_INTENSET_WRITE_Pos (25UL) /*!< Position of WRITE field. */
+#define TWIS_INTENSET_WRITE_Msk (0x1UL << TWIS_INTENSET_WRITE_Pos) /*!< Bit mask of WRITE field. */
+#define TWIS_INTENSET_WRITE_Disabled (0UL) /*!< Read: Disabled */
+#define TWIS_INTENSET_WRITE_Enabled (1UL) /*!< Read: Enabled */
+#define TWIS_INTENSET_WRITE_Set (1UL) /*!< Enable */
+
+/* Bit 20 : Write '1' to enable interrupt for event TXSTARTED */
+#define TWIS_INTENSET_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */
+#define TWIS_INTENSET_TXSTARTED_Msk (0x1UL << TWIS_INTENSET_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */
+#define TWIS_INTENSET_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIS_INTENSET_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIS_INTENSET_TXSTARTED_Set (1UL) /*!< Enable */
+
+/* Bit 19 : Write '1' to enable interrupt for event RXSTARTED */
+#define TWIS_INTENSET_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */
+#define TWIS_INTENSET_RXSTARTED_Msk (0x1UL << TWIS_INTENSET_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */
+#define TWIS_INTENSET_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIS_INTENSET_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIS_INTENSET_RXSTARTED_Set (1UL) /*!< Enable */
+
+/* Bit 9 : Write '1' to enable interrupt for event ERROR */
+#define TWIS_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */
+#define TWIS_INTENSET_ERROR_Msk (0x1UL << TWIS_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define TWIS_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */
+#define TWIS_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */
+#define TWIS_INTENSET_ERROR_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event STOPPED */
+#define TWIS_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */
+#define TWIS_INTENSET_STOPPED_Msk (0x1UL << TWIS_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define TWIS_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIS_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIS_INTENSET_STOPPED_Set (1UL) /*!< Enable */
+
+/* Register: TWIS_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 26 : Write '1' to disable interrupt for event READ */
+#define TWIS_INTENCLR_READ_Pos (26UL) /*!< Position of READ field. */
+#define TWIS_INTENCLR_READ_Msk (0x1UL << TWIS_INTENCLR_READ_Pos) /*!< Bit mask of READ field. */
+#define TWIS_INTENCLR_READ_Disabled (0UL) /*!< Read: Disabled */
+#define TWIS_INTENCLR_READ_Enabled (1UL) /*!< Read: Enabled */
+#define TWIS_INTENCLR_READ_Clear (1UL) /*!< Disable */
+
+/* Bit 25 : Write '1' to disable interrupt for event WRITE */
+#define TWIS_INTENCLR_WRITE_Pos (25UL) /*!< Position of WRITE field. */
+#define TWIS_INTENCLR_WRITE_Msk (0x1UL << TWIS_INTENCLR_WRITE_Pos) /*!< Bit mask of WRITE field. */
+#define TWIS_INTENCLR_WRITE_Disabled (0UL) /*!< Read: Disabled */
+#define TWIS_INTENCLR_WRITE_Enabled (1UL) /*!< Read: Enabled */
+#define TWIS_INTENCLR_WRITE_Clear (1UL) /*!< Disable */
+
+/* Bit 20 : Write '1' to disable interrupt for event TXSTARTED */
+#define TWIS_INTENCLR_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */
+#define TWIS_INTENCLR_TXSTARTED_Msk (0x1UL << TWIS_INTENCLR_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */
+#define TWIS_INTENCLR_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIS_INTENCLR_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIS_INTENCLR_TXSTARTED_Clear (1UL) /*!< Disable */
+
+/* Bit 19 : Write '1' to disable interrupt for event RXSTARTED */
+#define TWIS_INTENCLR_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */
+#define TWIS_INTENCLR_RXSTARTED_Msk (0x1UL << TWIS_INTENCLR_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */
+#define TWIS_INTENCLR_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIS_INTENCLR_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIS_INTENCLR_RXSTARTED_Clear (1UL) /*!< Disable */
+
+/* Bit 9 : Write '1' to disable interrupt for event ERROR */
+#define TWIS_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */
+#define TWIS_INTENCLR_ERROR_Msk (0x1UL << TWIS_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define TWIS_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */
+#define TWIS_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */
+#define TWIS_INTENCLR_ERROR_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event STOPPED */
+#define TWIS_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */
+#define TWIS_INTENCLR_STOPPED_Msk (0x1UL << TWIS_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */
+#define TWIS_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define TWIS_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define TWIS_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */
+
+/* Register: TWIS_ERRORSRC */
+/* Description: Error source */
+
+/* Bit 3 : TX buffer over-read detected, and prevented */
+#define TWIS_ERRORSRC_OVERREAD_Pos (3UL) /*!< Position of OVERREAD field. */
+#define TWIS_ERRORSRC_OVERREAD_Msk (0x1UL << TWIS_ERRORSRC_OVERREAD_Pos) /*!< Bit mask of OVERREAD field. */
+#define TWIS_ERRORSRC_OVERREAD_NotDetected (0UL) /*!< Error did not occur */
+#define TWIS_ERRORSRC_OVERREAD_Detected (1UL) /*!< Error occurred */
+
+/* Bit 2 : NACK sent after receiving a data byte */
+#define TWIS_ERRORSRC_DNACK_Pos (2UL) /*!< Position of DNACK field. */
+#define TWIS_ERRORSRC_DNACK_Msk (0x1UL << TWIS_ERRORSRC_DNACK_Pos) /*!< Bit mask of DNACK field. */
+#define TWIS_ERRORSRC_DNACK_NotReceived (0UL) /*!< Error did not occur */
+#define TWIS_ERRORSRC_DNACK_Received (1UL) /*!< Error occurred */
+
+/* Bit 0 : RX buffer overflow detected, and prevented */
+#define TWIS_ERRORSRC_OVERFLOW_Pos (0UL) /*!< Position of OVERFLOW field. */
+#define TWIS_ERRORSRC_OVERFLOW_Msk (0x1UL << TWIS_ERRORSRC_OVERFLOW_Pos) /*!< Bit mask of OVERFLOW field. */
+#define TWIS_ERRORSRC_OVERFLOW_NotDetected (0UL) /*!< Error did not occur */
+#define TWIS_ERRORSRC_OVERFLOW_Detected (1UL) /*!< Error occurred */
+
+/* Register: TWIS_MATCH */
+/* Description: Status register indicating which address had a match */
+
+/* Bit 0 : Which of the addresses in {ADDRESS} matched the incoming address */
+#define TWIS_MATCH_MATCH_Pos (0UL) /*!< Position of MATCH field. */
+#define TWIS_MATCH_MATCH_Msk (0x1UL << TWIS_MATCH_MATCH_Pos) /*!< Bit mask of MATCH field. */
+
+/* Register: TWIS_ENABLE */
+/* Description: Enable TWIS */
+
+/* Bits 3..0 : Enable or disable TWIS */
+#define TWIS_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define TWIS_ENABLE_ENABLE_Msk (0xFUL << TWIS_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define TWIS_ENABLE_ENABLE_Disabled (0UL) /*!< Disable TWIS */
+#define TWIS_ENABLE_ENABLE_Enabled (9UL) /*!< Enable TWIS */
+
+/* Register: TWIS_PSEL_SCL */
+/* Description: Pin select for SCL signal */
+
+/* Bit 31 : Connection */
+#define TWIS_PSEL_SCL_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define TWIS_PSEL_SCL_CONNECT_Msk (0x1UL << TWIS_PSEL_SCL_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define TWIS_PSEL_SCL_CONNECT_Connected (0UL) /*!< Connect */
+#define TWIS_PSEL_SCL_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define TWIS_PSEL_SCL_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define TWIS_PSEL_SCL_PORT_Msk (0x1UL << TWIS_PSEL_SCL_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define TWIS_PSEL_SCL_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define TWIS_PSEL_SCL_PIN_Msk (0x1FUL << TWIS_PSEL_SCL_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: TWIS_PSEL_SDA */
+/* Description: Pin select for SDA signal */
+
+/* Bit 31 : Connection */
+#define TWIS_PSEL_SDA_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define TWIS_PSEL_SDA_CONNECT_Msk (0x1UL << TWIS_PSEL_SDA_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define TWIS_PSEL_SDA_CONNECT_Connected (0UL) /*!< Connect */
+#define TWIS_PSEL_SDA_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define TWIS_PSEL_SDA_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define TWIS_PSEL_SDA_PORT_Msk (0x1UL << TWIS_PSEL_SDA_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define TWIS_PSEL_SDA_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define TWIS_PSEL_SDA_PIN_Msk (0x1FUL << TWIS_PSEL_SDA_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: TWIS_RXD_PTR */
+/* Description: RXD Data pointer */
+
+/* Bits 31..0 : RXD Data pointer */
+#define TWIS_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define TWIS_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIS_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: TWIS_RXD_MAXCNT */
+/* Description: Maximum number of bytes in RXD buffer */
+
+/* Bits 15..0 : Maximum number of bytes in RXD buffer */
+#define TWIS_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define TWIS_RXD_MAXCNT_MAXCNT_Msk (0xFFFFUL << TWIS_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: TWIS_RXD_AMOUNT */
+/* Description: Number of bytes transferred in the last RXD transaction */
+
+/* Bits 15..0 : Number of bytes transferred in the last RXD transaction */
+#define TWIS_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define TWIS_RXD_AMOUNT_AMOUNT_Msk (0xFFFFUL << TWIS_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+/* Register: TWIS_RXD_LIST */
+/* Description: EasyDMA list type */
+
+/* Bits 1..0 : List type */
+#define TWIS_RXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */
+#define TWIS_RXD_LIST_LIST_Msk (0x3UL << TWIS_RXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */
+#define TWIS_RXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */
+#define TWIS_RXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */
+
+/* Register: TWIS_TXD_PTR */
+/* Description: TXD Data pointer */
+
+/* Bits 31..0 : TXD Data pointer */
+#define TWIS_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define TWIS_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIS_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: TWIS_TXD_MAXCNT */
+/* Description: Maximum number of bytes in TXD buffer */
+
+/* Bits 15..0 : Maximum number of bytes in TXD buffer */
+#define TWIS_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define TWIS_TXD_MAXCNT_MAXCNT_Msk (0xFFFFUL << TWIS_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: TWIS_TXD_AMOUNT */
+/* Description: Number of bytes transferred in the last TXD transaction */
+
+/* Bits 15..0 : Number of bytes transferred in the last TXD transaction */
+#define TWIS_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define TWIS_TXD_AMOUNT_AMOUNT_Msk (0xFFFFUL << TWIS_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+/* Register: TWIS_TXD_LIST */
+/* Description: EasyDMA list type */
+
+/* Bits 1..0 : List type */
+#define TWIS_TXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */
+#define TWIS_TXD_LIST_LIST_Msk (0x3UL << TWIS_TXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */
+#define TWIS_TXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */
+#define TWIS_TXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */
+
+/* Register: TWIS_ADDRESS */
+/* Description: Description collection: TWI slave address n */
+
+/* Bits 6..0 : TWI slave address */
+#define TWIS_ADDRESS_ADDRESS_Pos (0UL) /*!< Position of ADDRESS field. */
+#define TWIS_ADDRESS_ADDRESS_Msk (0x7FUL << TWIS_ADDRESS_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */
+
+/* Register: TWIS_CONFIG */
+/* Description: Configuration register for the address match mechanism */
+
+/* Bit 1 : Enable or disable address matching on ADDRESS[1] */
+#define TWIS_CONFIG_ADDRESS1_Pos (1UL) /*!< Position of ADDRESS1 field. */
+#define TWIS_CONFIG_ADDRESS1_Msk (0x1UL << TWIS_CONFIG_ADDRESS1_Pos) /*!< Bit mask of ADDRESS1 field. */
+#define TWIS_CONFIG_ADDRESS1_Disabled (0UL) /*!< Disabled */
+#define TWIS_CONFIG_ADDRESS1_Enabled (1UL) /*!< Enabled */
+
+/* Bit 0 : Enable or disable address matching on ADDRESS[0] */
+#define TWIS_CONFIG_ADDRESS0_Pos (0UL) /*!< Position of ADDRESS0 field. */
+#define TWIS_CONFIG_ADDRESS0_Msk (0x1UL << TWIS_CONFIG_ADDRESS0_Pos) /*!< Bit mask of ADDRESS0 field. */
+#define TWIS_CONFIG_ADDRESS0_Disabled (0UL) /*!< Disabled */
+#define TWIS_CONFIG_ADDRESS0_Enabled (1UL) /*!< Enabled */
+
+/* Register: TWIS_ORC */
+/* Description: Over-read character. Character sent out in case of an over-read of the transmit buffer. */
+
+/* Bits 7..0 : Over-read character. Character sent out in case of an over-read of the transmit buffer. */
+#define TWIS_ORC_ORC_Pos (0UL) /*!< Position of ORC field. */
+#define TWIS_ORC_ORC_Msk (0xFFUL << TWIS_ORC_ORC_Pos) /*!< Bit mask of ORC field. */
+
+
+/* Peripheral: UART */
+/* Description: Universal Asynchronous Receiver/Transmitter */
+
+/* Register: UART_TASKS_STARTRX */
+/* Description: Start UART receiver */
+
+/* Bit 0 : Start UART receiver */
+#define UART_TASKS_STARTRX_TASKS_STARTRX_Pos (0UL) /*!< Position of TASKS_STARTRX field. */
+#define UART_TASKS_STARTRX_TASKS_STARTRX_Msk (0x1UL << UART_TASKS_STARTRX_TASKS_STARTRX_Pos) /*!< Bit mask of TASKS_STARTRX field. */
+#define UART_TASKS_STARTRX_TASKS_STARTRX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: UART_TASKS_STOPRX */
+/* Description: Stop UART receiver */
+
+/* Bit 0 : Stop UART receiver */
+#define UART_TASKS_STOPRX_TASKS_STOPRX_Pos (0UL) /*!< Position of TASKS_STOPRX field. */
+#define UART_TASKS_STOPRX_TASKS_STOPRX_Msk (0x1UL << UART_TASKS_STOPRX_TASKS_STOPRX_Pos) /*!< Bit mask of TASKS_STOPRX field. */
+#define UART_TASKS_STOPRX_TASKS_STOPRX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: UART_TASKS_STARTTX */
+/* Description: Start UART transmitter */
+
+/* Bit 0 : Start UART transmitter */
+#define UART_TASKS_STARTTX_TASKS_STARTTX_Pos (0UL) /*!< Position of TASKS_STARTTX field. */
+#define UART_TASKS_STARTTX_TASKS_STARTTX_Msk (0x1UL << UART_TASKS_STARTTX_TASKS_STARTTX_Pos) /*!< Bit mask of TASKS_STARTTX field. */
+#define UART_TASKS_STARTTX_TASKS_STARTTX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: UART_TASKS_STOPTX */
+/* Description: Stop UART transmitter */
+
+/* Bit 0 : Stop UART transmitter */
+#define UART_TASKS_STOPTX_TASKS_STOPTX_Pos (0UL) /*!< Position of TASKS_STOPTX field. */
+#define UART_TASKS_STOPTX_TASKS_STOPTX_Msk (0x1UL << UART_TASKS_STOPTX_TASKS_STOPTX_Pos) /*!< Bit mask of TASKS_STOPTX field. */
+#define UART_TASKS_STOPTX_TASKS_STOPTX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: UART_TASKS_SUSPEND */
+/* Description: Suspend UART */
+
+/* Bit 0 : Suspend UART */
+#define UART_TASKS_SUSPEND_TASKS_SUSPEND_Pos (0UL) /*!< Position of TASKS_SUSPEND field. */
+#define UART_TASKS_SUSPEND_TASKS_SUSPEND_Msk (0x1UL << UART_TASKS_SUSPEND_TASKS_SUSPEND_Pos) /*!< Bit mask of TASKS_SUSPEND field. */
+#define UART_TASKS_SUSPEND_TASKS_SUSPEND_Trigger (1UL) /*!< Trigger task */
+
+/* Register: UART_EVENTS_CTS */
+/* Description: CTS is activated (set low). Clear To Send. */
+
+/* Bit 0 : CTS is activated (set low). Clear To Send. */
+#define UART_EVENTS_CTS_EVENTS_CTS_Pos (0UL) /*!< Position of EVENTS_CTS field. */
+#define UART_EVENTS_CTS_EVENTS_CTS_Msk (0x1UL << UART_EVENTS_CTS_EVENTS_CTS_Pos) /*!< Bit mask of EVENTS_CTS field. */
+#define UART_EVENTS_CTS_EVENTS_CTS_NotGenerated (0UL) /*!< Event not generated */
+#define UART_EVENTS_CTS_EVENTS_CTS_Generated (1UL) /*!< Event generated */
+
+/* Register: UART_EVENTS_NCTS */
+/* Description: CTS is deactivated (set high). Not Clear To Send. */
+
+/* Bit 0 : CTS is deactivated (set high). Not Clear To Send. */
+#define UART_EVENTS_NCTS_EVENTS_NCTS_Pos (0UL) /*!< Position of EVENTS_NCTS field. */
+#define UART_EVENTS_NCTS_EVENTS_NCTS_Msk (0x1UL << UART_EVENTS_NCTS_EVENTS_NCTS_Pos) /*!< Bit mask of EVENTS_NCTS field. */
+#define UART_EVENTS_NCTS_EVENTS_NCTS_NotGenerated (0UL) /*!< Event not generated */
+#define UART_EVENTS_NCTS_EVENTS_NCTS_Generated (1UL) /*!< Event generated */
+
+/* Register: UART_EVENTS_RXDRDY */
+/* Description: Data received in RXD */
+
+/* Bit 0 : Data received in RXD */
+#define UART_EVENTS_RXDRDY_EVENTS_RXDRDY_Pos (0UL) /*!< Position of EVENTS_RXDRDY field. */
+#define UART_EVENTS_RXDRDY_EVENTS_RXDRDY_Msk (0x1UL << UART_EVENTS_RXDRDY_EVENTS_RXDRDY_Pos) /*!< Bit mask of EVENTS_RXDRDY field. */
+#define UART_EVENTS_RXDRDY_EVENTS_RXDRDY_NotGenerated (0UL) /*!< Event not generated */
+#define UART_EVENTS_RXDRDY_EVENTS_RXDRDY_Generated (1UL) /*!< Event generated */
+
+/* Register: UART_EVENTS_TXDRDY */
+/* Description: Data sent from TXD */
+
+/* Bit 0 : Data sent from TXD */
+#define UART_EVENTS_TXDRDY_EVENTS_TXDRDY_Pos (0UL) /*!< Position of EVENTS_TXDRDY field. */
+#define UART_EVENTS_TXDRDY_EVENTS_TXDRDY_Msk (0x1UL << UART_EVENTS_TXDRDY_EVENTS_TXDRDY_Pos) /*!< Bit mask of EVENTS_TXDRDY field. */
+#define UART_EVENTS_TXDRDY_EVENTS_TXDRDY_NotGenerated (0UL) /*!< Event not generated */
+#define UART_EVENTS_TXDRDY_EVENTS_TXDRDY_Generated (1UL) /*!< Event generated */
+
+/* Register: UART_EVENTS_ERROR */
+/* Description: Error detected */
+
+/* Bit 0 : Error detected */
+#define UART_EVENTS_ERROR_EVENTS_ERROR_Pos (0UL) /*!< Position of EVENTS_ERROR field. */
+#define UART_EVENTS_ERROR_EVENTS_ERROR_Msk (0x1UL << UART_EVENTS_ERROR_EVENTS_ERROR_Pos) /*!< Bit mask of EVENTS_ERROR field. */
+#define UART_EVENTS_ERROR_EVENTS_ERROR_NotGenerated (0UL) /*!< Event not generated */
+#define UART_EVENTS_ERROR_EVENTS_ERROR_Generated (1UL) /*!< Event generated */
+
+/* Register: UART_EVENTS_RXTO */
+/* Description: Receiver timeout */
+
+/* Bit 0 : Receiver timeout */
+#define UART_EVENTS_RXTO_EVENTS_RXTO_Pos (0UL) /*!< Position of EVENTS_RXTO field. */
+#define UART_EVENTS_RXTO_EVENTS_RXTO_Msk (0x1UL << UART_EVENTS_RXTO_EVENTS_RXTO_Pos) /*!< Bit mask of EVENTS_RXTO field. */
+#define UART_EVENTS_RXTO_EVENTS_RXTO_NotGenerated (0UL) /*!< Event not generated */
+#define UART_EVENTS_RXTO_EVENTS_RXTO_Generated (1UL) /*!< Event generated */
+
+/* Register: UART_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 4 : Shortcut between event NCTS and task STOPRX */
+#define UART_SHORTS_NCTS_STOPRX_Pos (4UL) /*!< Position of NCTS_STOPRX field. */
+#define UART_SHORTS_NCTS_STOPRX_Msk (0x1UL << UART_SHORTS_NCTS_STOPRX_Pos) /*!< Bit mask of NCTS_STOPRX field. */
+#define UART_SHORTS_NCTS_STOPRX_Disabled (0UL) /*!< Disable shortcut */
+#define UART_SHORTS_NCTS_STOPRX_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 3 : Shortcut between event CTS and task STARTRX */
+#define UART_SHORTS_CTS_STARTRX_Pos (3UL) /*!< Position of CTS_STARTRX field. */
+#define UART_SHORTS_CTS_STARTRX_Msk (0x1UL << UART_SHORTS_CTS_STARTRX_Pos) /*!< Bit mask of CTS_STARTRX field. */
+#define UART_SHORTS_CTS_STARTRX_Disabled (0UL) /*!< Disable shortcut */
+#define UART_SHORTS_CTS_STARTRX_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: UART_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 17 : Write '1' to enable interrupt for event RXTO */
+#define UART_INTENSET_RXTO_Pos (17UL) /*!< Position of RXTO field. */
+#define UART_INTENSET_RXTO_Msk (0x1UL << UART_INTENSET_RXTO_Pos) /*!< Bit mask of RXTO field. */
+#define UART_INTENSET_RXTO_Disabled (0UL) /*!< Read: Disabled */
+#define UART_INTENSET_RXTO_Enabled (1UL) /*!< Read: Enabled */
+#define UART_INTENSET_RXTO_Set (1UL) /*!< Enable */
+
+/* Bit 9 : Write '1' to enable interrupt for event ERROR */
+#define UART_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */
+#define UART_INTENSET_ERROR_Msk (0x1UL << UART_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define UART_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */
+#define UART_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */
+#define UART_INTENSET_ERROR_Set (1UL) /*!< Enable */
+
+/* Bit 7 : Write '1' to enable interrupt for event TXDRDY */
+#define UART_INTENSET_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */
+#define UART_INTENSET_TXDRDY_Msk (0x1UL << UART_INTENSET_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */
+#define UART_INTENSET_TXDRDY_Disabled (0UL) /*!< Read: Disabled */
+#define UART_INTENSET_TXDRDY_Enabled (1UL) /*!< Read: Enabled */
+#define UART_INTENSET_TXDRDY_Set (1UL) /*!< Enable */
+
+/* Bit 2 : Write '1' to enable interrupt for event RXDRDY */
+#define UART_INTENSET_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */
+#define UART_INTENSET_RXDRDY_Msk (0x1UL << UART_INTENSET_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */
+#define UART_INTENSET_RXDRDY_Disabled (0UL) /*!< Read: Disabled */
+#define UART_INTENSET_RXDRDY_Enabled (1UL) /*!< Read: Enabled */
+#define UART_INTENSET_RXDRDY_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event NCTS */
+#define UART_INTENSET_NCTS_Pos (1UL) /*!< Position of NCTS field. */
+#define UART_INTENSET_NCTS_Msk (0x1UL << UART_INTENSET_NCTS_Pos) /*!< Bit mask of NCTS field. */
+#define UART_INTENSET_NCTS_Disabled (0UL) /*!< Read: Disabled */
+#define UART_INTENSET_NCTS_Enabled (1UL) /*!< Read: Enabled */
+#define UART_INTENSET_NCTS_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event CTS */
+#define UART_INTENSET_CTS_Pos (0UL) /*!< Position of CTS field. */
+#define UART_INTENSET_CTS_Msk (0x1UL << UART_INTENSET_CTS_Pos) /*!< Bit mask of CTS field. */
+#define UART_INTENSET_CTS_Disabled (0UL) /*!< Read: Disabled */
+#define UART_INTENSET_CTS_Enabled (1UL) /*!< Read: Enabled */
+#define UART_INTENSET_CTS_Set (1UL) /*!< Enable */
+
+/* Register: UART_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 17 : Write '1' to disable interrupt for event RXTO */
+#define UART_INTENCLR_RXTO_Pos (17UL) /*!< Position of RXTO field. */
+#define UART_INTENCLR_RXTO_Msk (0x1UL << UART_INTENCLR_RXTO_Pos) /*!< Bit mask of RXTO field. */
+#define UART_INTENCLR_RXTO_Disabled (0UL) /*!< Read: Disabled */
+#define UART_INTENCLR_RXTO_Enabled (1UL) /*!< Read: Enabled */
+#define UART_INTENCLR_RXTO_Clear (1UL) /*!< Disable */
+
+/* Bit 9 : Write '1' to disable interrupt for event ERROR */
+#define UART_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */
+#define UART_INTENCLR_ERROR_Msk (0x1UL << UART_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define UART_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */
+#define UART_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */
+#define UART_INTENCLR_ERROR_Clear (1UL) /*!< Disable */
+
+/* Bit 7 : Write '1' to disable interrupt for event TXDRDY */
+#define UART_INTENCLR_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */
+#define UART_INTENCLR_TXDRDY_Msk (0x1UL << UART_INTENCLR_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */
+#define UART_INTENCLR_TXDRDY_Disabled (0UL) /*!< Read: Disabled */
+#define UART_INTENCLR_TXDRDY_Enabled (1UL) /*!< Read: Enabled */
+#define UART_INTENCLR_TXDRDY_Clear (1UL) /*!< Disable */
+
+/* Bit 2 : Write '1' to disable interrupt for event RXDRDY */
+#define UART_INTENCLR_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */
+#define UART_INTENCLR_RXDRDY_Msk (0x1UL << UART_INTENCLR_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */
+#define UART_INTENCLR_RXDRDY_Disabled (0UL) /*!< Read: Disabled */
+#define UART_INTENCLR_RXDRDY_Enabled (1UL) /*!< Read: Enabled */
+#define UART_INTENCLR_RXDRDY_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event NCTS */
+#define UART_INTENCLR_NCTS_Pos (1UL) /*!< Position of NCTS field. */
+#define UART_INTENCLR_NCTS_Msk (0x1UL << UART_INTENCLR_NCTS_Pos) /*!< Bit mask of NCTS field. */
+#define UART_INTENCLR_NCTS_Disabled (0UL) /*!< Read: Disabled */
+#define UART_INTENCLR_NCTS_Enabled (1UL) /*!< Read: Enabled */
+#define UART_INTENCLR_NCTS_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event CTS */
+#define UART_INTENCLR_CTS_Pos (0UL) /*!< Position of CTS field. */
+#define UART_INTENCLR_CTS_Msk (0x1UL << UART_INTENCLR_CTS_Pos) /*!< Bit mask of CTS field. */
+#define UART_INTENCLR_CTS_Disabled (0UL) /*!< Read: Disabled */
+#define UART_INTENCLR_CTS_Enabled (1UL) /*!< Read: Enabled */
+#define UART_INTENCLR_CTS_Clear (1UL) /*!< Disable */
+
+/* Register: UART_ERRORSRC */
+/* Description: Error source */
+
+/* Bit 3 : Break condition */
+#define UART_ERRORSRC_BREAK_Pos (3UL) /*!< Position of BREAK field. */
+#define UART_ERRORSRC_BREAK_Msk (0x1UL << UART_ERRORSRC_BREAK_Pos) /*!< Bit mask of BREAK field. */
+#define UART_ERRORSRC_BREAK_NotPresent (0UL) /*!< Read: error not present */
+#define UART_ERRORSRC_BREAK_Present (1UL) /*!< Read: error present */
+
+/* Bit 2 : Framing error occurred */
+#define UART_ERRORSRC_FRAMING_Pos (2UL) /*!< Position of FRAMING field. */
+#define UART_ERRORSRC_FRAMING_Msk (0x1UL << UART_ERRORSRC_FRAMING_Pos) /*!< Bit mask of FRAMING field. */
+#define UART_ERRORSRC_FRAMING_NotPresent (0UL) /*!< Read: error not present */
+#define UART_ERRORSRC_FRAMING_Present (1UL) /*!< Read: error present */
+
+/* Bit 1 : Parity error */
+#define UART_ERRORSRC_PARITY_Pos (1UL) /*!< Position of PARITY field. */
+#define UART_ERRORSRC_PARITY_Msk (0x1UL << UART_ERRORSRC_PARITY_Pos) /*!< Bit mask of PARITY field. */
+#define UART_ERRORSRC_PARITY_NotPresent (0UL) /*!< Read: error not present */
+#define UART_ERRORSRC_PARITY_Present (1UL) /*!< Read: error present */
+
+/* Bit 0 : Overrun error */
+#define UART_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */
+#define UART_ERRORSRC_OVERRUN_Msk (0x1UL << UART_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */
+#define UART_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Read: error not present */
+#define UART_ERRORSRC_OVERRUN_Present (1UL) /*!< Read: error present */
+
+/* Register: UART_ENABLE */
+/* Description: Enable UART */
+
+/* Bits 3..0 : Enable or disable UART */
+#define UART_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define UART_ENABLE_ENABLE_Msk (0xFUL << UART_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define UART_ENABLE_ENABLE_Disabled (0UL) /*!< Disable UART */
+#define UART_ENABLE_ENABLE_Enabled (4UL) /*!< Enable UART */
+
+/* Register: UART_PSEL_RTS */
+/* Description: Pin select for RTS */
+
+/* Bit 31 : Connection */
+#define UART_PSEL_RTS_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define UART_PSEL_RTS_CONNECT_Msk (0x1UL << UART_PSEL_RTS_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define UART_PSEL_RTS_CONNECT_Connected (0UL) /*!< Connect */
+#define UART_PSEL_RTS_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define UART_PSEL_RTS_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define UART_PSEL_RTS_PORT_Msk (0x1UL << UART_PSEL_RTS_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define UART_PSEL_RTS_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define UART_PSEL_RTS_PIN_Msk (0x1FUL << UART_PSEL_RTS_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: UART_PSEL_TXD */
+/* Description: Pin select for TXD */
+
+/* Bit 31 : Connection */
+#define UART_PSEL_TXD_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define UART_PSEL_TXD_CONNECT_Msk (0x1UL << UART_PSEL_TXD_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define UART_PSEL_TXD_CONNECT_Connected (0UL) /*!< Connect */
+#define UART_PSEL_TXD_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define UART_PSEL_TXD_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define UART_PSEL_TXD_PORT_Msk (0x1UL << UART_PSEL_TXD_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define UART_PSEL_TXD_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define UART_PSEL_TXD_PIN_Msk (0x1FUL << UART_PSEL_TXD_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: UART_PSEL_CTS */
+/* Description: Pin select for CTS */
+
+/* Bit 31 : Connection */
+#define UART_PSEL_CTS_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define UART_PSEL_CTS_CONNECT_Msk (0x1UL << UART_PSEL_CTS_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define UART_PSEL_CTS_CONNECT_Connected (0UL) /*!< Connect */
+#define UART_PSEL_CTS_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define UART_PSEL_CTS_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define UART_PSEL_CTS_PORT_Msk (0x1UL << UART_PSEL_CTS_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define UART_PSEL_CTS_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define UART_PSEL_CTS_PIN_Msk (0x1FUL << UART_PSEL_CTS_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: UART_PSEL_RXD */
+/* Description: Pin select for RXD */
+
+/* Bit 31 : Connection */
+#define UART_PSEL_RXD_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define UART_PSEL_RXD_CONNECT_Msk (0x1UL << UART_PSEL_RXD_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define UART_PSEL_RXD_CONNECT_Connected (0UL) /*!< Connect */
+#define UART_PSEL_RXD_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define UART_PSEL_RXD_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define UART_PSEL_RXD_PORT_Msk (0x1UL << UART_PSEL_RXD_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define UART_PSEL_RXD_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define UART_PSEL_RXD_PIN_Msk (0x1FUL << UART_PSEL_RXD_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: UART_RXD */
+/* Description: RXD register */
+
+/* Bits 7..0 : RX data received in previous transfers, double buffered */
+#define UART_RXD_RXD_Pos (0UL) /*!< Position of RXD field. */
+#define UART_RXD_RXD_Msk (0xFFUL << UART_RXD_RXD_Pos) /*!< Bit mask of RXD field. */
+
+/* Register: UART_TXD */
+/* Description: TXD register */
+
+/* Bits 7..0 : TX data to be transferred */
+#define UART_TXD_TXD_Pos (0UL) /*!< Position of TXD field. */
+#define UART_TXD_TXD_Msk (0xFFUL << UART_TXD_TXD_Pos) /*!< Bit mask of TXD field. */
+
+/* Register: UART_BAUDRATE */
+/* Description: Baud rate. Accuracy depends on the HFCLK source selected. */
+
+/* Bits 31..0 : Baud rate */
+#define UART_BAUDRATE_BAUDRATE_Pos (0UL) /*!< Position of BAUDRATE field. */
+#define UART_BAUDRATE_BAUDRATE_Msk (0xFFFFFFFFUL << UART_BAUDRATE_BAUDRATE_Pos) /*!< Bit mask of BAUDRATE field. */
+#define UART_BAUDRATE_BAUDRATE_Baud1200 (0x0004F000UL) /*!< 1200 baud (actual rate: 1205) */
+#define UART_BAUDRATE_BAUDRATE_Baud2400 (0x0009D000UL) /*!< 2400 baud (actual rate: 2396) */
+#define UART_BAUDRATE_BAUDRATE_Baud4800 (0x0013B000UL) /*!< 4800 baud (actual rate: 4808) */
+#define UART_BAUDRATE_BAUDRATE_Baud9600 (0x00275000UL) /*!< 9600 baud (actual rate: 9598) */
+#define UART_BAUDRATE_BAUDRATE_Baud14400 (0x003B0000UL) /*!< 14400 baud (actual rate: 14414) */
+#define UART_BAUDRATE_BAUDRATE_Baud19200 (0x004EA000UL) /*!< 19200 baud (actual rate: 19208) */
+#define UART_BAUDRATE_BAUDRATE_Baud28800 (0x0075F000UL) /*!< 28800 baud (actual rate: 28829) */
+#define UART_BAUDRATE_BAUDRATE_Baud31250 (0x00800000UL) /*!< 31250 baud */
+#define UART_BAUDRATE_BAUDRATE_Baud38400 (0x009D5000UL) /*!< 38400 baud (actual rate: 38462) */
+#define UART_BAUDRATE_BAUDRATE_Baud56000 (0x00E50000UL) /*!< 56000 baud (actual rate: 55944) */
+#define UART_BAUDRATE_BAUDRATE_Baud57600 (0x00EBF000UL) /*!< 57600 baud (actual rate: 57762) */
+#define UART_BAUDRATE_BAUDRATE_Baud76800 (0x013A9000UL) /*!< 76800 baud (actual rate: 76923) */
+#define UART_BAUDRATE_BAUDRATE_Baud115200 (0x01D7E000UL) /*!< 115200 baud (actual rate: 115942) */
+#define UART_BAUDRATE_BAUDRATE_Baud230400 (0x03AFB000UL) /*!< 230400 baud (actual rate: 231884) */
+#define UART_BAUDRATE_BAUDRATE_Baud250000 (0x04000000UL) /*!< 250000 baud */
+#define UART_BAUDRATE_BAUDRATE_Baud460800 (0x075F7000UL) /*!< 460800 baud (actual rate: 470588) */
+#define UART_BAUDRATE_BAUDRATE_Baud921600 (0x0EBED000UL) /*!< 921600 baud (actual rate: 941176) */
+#define UART_BAUDRATE_BAUDRATE_Baud1M (0x10000000UL) /*!< 1Mega baud */
+
+/* Register: UART_CONFIG */
+/* Description: Configuration of parity and hardware flow control */
+
+/* Bit 8 : Even or odd parity type */
+#define UART_CONFIG_PARITYTYPE_Pos (8UL) /*!< Position of PARITYTYPE field. */
+#define UART_CONFIG_PARITYTYPE_Msk (0x1UL << UART_CONFIG_PARITYTYPE_Pos) /*!< Bit mask of PARITYTYPE field. */
+#define UART_CONFIG_PARITYTYPE_Even (0UL) /*!< Even parity */
+#define UART_CONFIG_PARITYTYPE_Odd (1UL) /*!< Odd parity */
+
+/* Bit 4 : Stop bits */
+#define UART_CONFIG_STOP_Pos (4UL) /*!< Position of STOP field. */
+#define UART_CONFIG_STOP_Msk (0x1UL << UART_CONFIG_STOP_Pos) /*!< Bit mask of STOP field. */
+#define UART_CONFIG_STOP_One (0UL) /*!< One stop bit */
+#define UART_CONFIG_STOP_Two (1UL) /*!< Two stop bits */
+
+/* Bits 3..1 : Parity */
+#define UART_CONFIG_PARITY_Pos (1UL) /*!< Position of PARITY field. */
+#define UART_CONFIG_PARITY_Msk (0x7UL << UART_CONFIG_PARITY_Pos) /*!< Bit mask of PARITY field. */
+#define UART_CONFIG_PARITY_Excluded (0x0UL) /*!< Exclude parity bit */
+#define UART_CONFIG_PARITY_Included (0x7UL) /*!< Include parity bit */
+
+/* Bit 0 : Hardware flow control */
+#define UART_CONFIG_HWFC_Pos (0UL) /*!< Position of HWFC field. */
+#define UART_CONFIG_HWFC_Msk (0x1UL << UART_CONFIG_HWFC_Pos) /*!< Bit mask of HWFC field. */
+#define UART_CONFIG_HWFC_Disabled (0UL) /*!< Disabled */
+#define UART_CONFIG_HWFC_Enabled (1UL) /*!< Enabled */
+
+
+/* Peripheral: UARTE */
+/* Description: UART with EasyDMA 0 */
+
+/* Register: UARTE_TASKS_STARTRX */
+/* Description: Start UART receiver */
+
+/* Bit 0 : Start UART receiver */
+#define UARTE_TASKS_STARTRX_TASKS_STARTRX_Pos (0UL) /*!< Position of TASKS_STARTRX field. */
+#define UARTE_TASKS_STARTRX_TASKS_STARTRX_Msk (0x1UL << UARTE_TASKS_STARTRX_TASKS_STARTRX_Pos) /*!< Bit mask of TASKS_STARTRX field. */
+#define UARTE_TASKS_STARTRX_TASKS_STARTRX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: UARTE_TASKS_STOPRX */
+/* Description: Stop UART receiver */
+
+/* Bit 0 : Stop UART receiver */
+#define UARTE_TASKS_STOPRX_TASKS_STOPRX_Pos (0UL) /*!< Position of TASKS_STOPRX field. */
+#define UARTE_TASKS_STOPRX_TASKS_STOPRX_Msk (0x1UL << UARTE_TASKS_STOPRX_TASKS_STOPRX_Pos) /*!< Bit mask of TASKS_STOPRX field. */
+#define UARTE_TASKS_STOPRX_TASKS_STOPRX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: UARTE_TASKS_STARTTX */
+/* Description: Start UART transmitter */
+
+/* Bit 0 : Start UART transmitter */
+#define UARTE_TASKS_STARTTX_TASKS_STARTTX_Pos (0UL) /*!< Position of TASKS_STARTTX field. */
+#define UARTE_TASKS_STARTTX_TASKS_STARTTX_Msk (0x1UL << UARTE_TASKS_STARTTX_TASKS_STARTTX_Pos) /*!< Bit mask of TASKS_STARTTX field. */
+#define UARTE_TASKS_STARTTX_TASKS_STARTTX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: UARTE_TASKS_STOPTX */
+/* Description: Stop UART transmitter */
+
+/* Bit 0 : Stop UART transmitter */
+#define UARTE_TASKS_STOPTX_TASKS_STOPTX_Pos (0UL) /*!< Position of TASKS_STOPTX field. */
+#define UARTE_TASKS_STOPTX_TASKS_STOPTX_Msk (0x1UL << UARTE_TASKS_STOPTX_TASKS_STOPTX_Pos) /*!< Bit mask of TASKS_STOPTX field. */
+#define UARTE_TASKS_STOPTX_TASKS_STOPTX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: UARTE_TASKS_FLUSHRX */
+/* Description: Flush RX FIFO into RX buffer */
+
+/* Bit 0 : Flush RX FIFO into RX buffer */
+#define UARTE_TASKS_FLUSHRX_TASKS_FLUSHRX_Pos (0UL) /*!< Position of TASKS_FLUSHRX field. */
+#define UARTE_TASKS_FLUSHRX_TASKS_FLUSHRX_Msk (0x1UL << UARTE_TASKS_FLUSHRX_TASKS_FLUSHRX_Pos) /*!< Bit mask of TASKS_FLUSHRX field. */
+#define UARTE_TASKS_FLUSHRX_TASKS_FLUSHRX_Trigger (1UL) /*!< Trigger task */
+
+/* Register: UARTE_EVENTS_CTS */
+/* Description: CTS is activated (set low). Clear To Send. */
+
+/* Bit 0 : CTS is activated (set low). Clear To Send. */
+#define UARTE_EVENTS_CTS_EVENTS_CTS_Pos (0UL) /*!< Position of EVENTS_CTS field. */
+#define UARTE_EVENTS_CTS_EVENTS_CTS_Msk (0x1UL << UARTE_EVENTS_CTS_EVENTS_CTS_Pos) /*!< Bit mask of EVENTS_CTS field. */
+#define UARTE_EVENTS_CTS_EVENTS_CTS_NotGenerated (0UL) /*!< Event not generated */
+#define UARTE_EVENTS_CTS_EVENTS_CTS_Generated (1UL) /*!< Event generated */
+
+/* Register: UARTE_EVENTS_NCTS */
+/* Description: CTS is deactivated (set high). Not Clear To Send. */
+
+/* Bit 0 : CTS is deactivated (set high). Not Clear To Send. */
+#define UARTE_EVENTS_NCTS_EVENTS_NCTS_Pos (0UL) /*!< Position of EVENTS_NCTS field. */
+#define UARTE_EVENTS_NCTS_EVENTS_NCTS_Msk (0x1UL << UARTE_EVENTS_NCTS_EVENTS_NCTS_Pos) /*!< Bit mask of EVENTS_NCTS field. */
+#define UARTE_EVENTS_NCTS_EVENTS_NCTS_NotGenerated (0UL) /*!< Event not generated */
+#define UARTE_EVENTS_NCTS_EVENTS_NCTS_Generated (1UL) /*!< Event generated */
+
+/* Register: UARTE_EVENTS_RXDRDY */
+/* Description: Data received in RXD (but potentially not yet transferred to Data RAM) */
+
+/* Bit 0 : Data received in RXD (but potentially not yet transferred to Data RAM) */
+#define UARTE_EVENTS_RXDRDY_EVENTS_RXDRDY_Pos (0UL) /*!< Position of EVENTS_RXDRDY field. */
+#define UARTE_EVENTS_RXDRDY_EVENTS_RXDRDY_Msk (0x1UL << UARTE_EVENTS_RXDRDY_EVENTS_RXDRDY_Pos) /*!< Bit mask of EVENTS_RXDRDY field. */
+#define UARTE_EVENTS_RXDRDY_EVENTS_RXDRDY_NotGenerated (0UL) /*!< Event not generated */
+#define UARTE_EVENTS_RXDRDY_EVENTS_RXDRDY_Generated (1UL) /*!< Event generated */
+
+/* Register: UARTE_EVENTS_ENDRX */
+/* Description: Receive buffer is filled up */
+
+/* Bit 0 : Receive buffer is filled up */
+#define UARTE_EVENTS_ENDRX_EVENTS_ENDRX_Pos (0UL) /*!< Position of EVENTS_ENDRX field. */
+#define UARTE_EVENTS_ENDRX_EVENTS_ENDRX_Msk (0x1UL << UARTE_EVENTS_ENDRX_EVENTS_ENDRX_Pos) /*!< Bit mask of EVENTS_ENDRX field. */
+#define UARTE_EVENTS_ENDRX_EVENTS_ENDRX_NotGenerated (0UL) /*!< Event not generated */
+#define UARTE_EVENTS_ENDRX_EVENTS_ENDRX_Generated (1UL) /*!< Event generated */
+
+/* Register: UARTE_EVENTS_TXDRDY */
+/* Description: Data sent from TXD */
+
+/* Bit 0 : Data sent from TXD */
+#define UARTE_EVENTS_TXDRDY_EVENTS_TXDRDY_Pos (0UL) /*!< Position of EVENTS_TXDRDY field. */
+#define UARTE_EVENTS_TXDRDY_EVENTS_TXDRDY_Msk (0x1UL << UARTE_EVENTS_TXDRDY_EVENTS_TXDRDY_Pos) /*!< Bit mask of EVENTS_TXDRDY field. */
+#define UARTE_EVENTS_TXDRDY_EVENTS_TXDRDY_NotGenerated (0UL) /*!< Event not generated */
+#define UARTE_EVENTS_TXDRDY_EVENTS_TXDRDY_Generated (1UL) /*!< Event generated */
+
+/* Register: UARTE_EVENTS_ENDTX */
+/* Description: Last TX byte transmitted */
+
+/* Bit 0 : Last TX byte transmitted */
+#define UARTE_EVENTS_ENDTX_EVENTS_ENDTX_Pos (0UL) /*!< Position of EVENTS_ENDTX field. */
+#define UARTE_EVENTS_ENDTX_EVENTS_ENDTX_Msk (0x1UL << UARTE_EVENTS_ENDTX_EVENTS_ENDTX_Pos) /*!< Bit mask of EVENTS_ENDTX field. */
+#define UARTE_EVENTS_ENDTX_EVENTS_ENDTX_NotGenerated (0UL) /*!< Event not generated */
+#define UARTE_EVENTS_ENDTX_EVENTS_ENDTX_Generated (1UL) /*!< Event generated */
+
+/* Register: UARTE_EVENTS_ERROR */
+/* Description: Error detected */
+
+/* Bit 0 : Error detected */
+#define UARTE_EVENTS_ERROR_EVENTS_ERROR_Pos (0UL) /*!< Position of EVENTS_ERROR field. */
+#define UARTE_EVENTS_ERROR_EVENTS_ERROR_Msk (0x1UL << UARTE_EVENTS_ERROR_EVENTS_ERROR_Pos) /*!< Bit mask of EVENTS_ERROR field. */
+#define UARTE_EVENTS_ERROR_EVENTS_ERROR_NotGenerated (0UL) /*!< Event not generated */
+#define UARTE_EVENTS_ERROR_EVENTS_ERROR_Generated (1UL) /*!< Event generated */
+
+/* Register: UARTE_EVENTS_RXTO */
+/* Description: Receiver timeout */
+
+/* Bit 0 : Receiver timeout */
+#define UARTE_EVENTS_RXTO_EVENTS_RXTO_Pos (0UL) /*!< Position of EVENTS_RXTO field. */
+#define UARTE_EVENTS_RXTO_EVENTS_RXTO_Msk (0x1UL << UARTE_EVENTS_RXTO_EVENTS_RXTO_Pos) /*!< Bit mask of EVENTS_RXTO field. */
+#define UARTE_EVENTS_RXTO_EVENTS_RXTO_NotGenerated (0UL) /*!< Event not generated */
+#define UARTE_EVENTS_RXTO_EVENTS_RXTO_Generated (1UL) /*!< Event generated */
+
+/* Register: UARTE_EVENTS_RXSTARTED */
+/* Description: UART receiver has started */
+
+/* Bit 0 : UART receiver has started */
+#define UARTE_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos (0UL) /*!< Position of EVENTS_RXSTARTED field. */
+#define UARTE_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Msk (0x1UL << UARTE_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos) /*!< Bit mask of EVENTS_RXSTARTED field. */
+#define UARTE_EVENTS_RXSTARTED_EVENTS_RXSTARTED_NotGenerated (0UL) /*!< Event not generated */
+#define UARTE_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Generated (1UL) /*!< Event generated */
+
+/* Register: UARTE_EVENTS_TXSTARTED */
+/* Description: UART transmitter has started */
+
+/* Bit 0 : UART transmitter has started */
+#define UARTE_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos (0UL) /*!< Position of EVENTS_TXSTARTED field. */
+#define UARTE_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Msk (0x1UL << UARTE_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos) /*!< Bit mask of EVENTS_TXSTARTED field. */
+#define UARTE_EVENTS_TXSTARTED_EVENTS_TXSTARTED_NotGenerated (0UL) /*!< Event not generated */
+#define UARTE_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Generated (1UL) /*!< Event generated */
+
+/* Register: UARTE_EVENTS_TXSTOPPED */
+/* Description: Transmitter stopped */
+
+/* Bit 0 : Transmitter stopped */
+#define UARTE_EVENTS_TXSTOPPED_EVENTS_TXSTOPPED_Pos (0UL) /*!< Position of EVENTS_TXSTOPPED field. */
+#define UARTE_EVENTS_TXSTOPPED_EVENTS_TXSTOPPED_Msk (0x1UL << UARTE_EVENTS_TXSTOPPED_EVENTS_TXSTOPPED_Pos) /*!< Bit mask of EVENTS_TXSTOPPED field. */
+#define UARTE_EVENTS_TXSTOPPED_EVENTS_TXSTOPPED_NotGenerated (0UL) /*!< Event not generated */
+#define UARTE_EVENTS_TXSTOPPED_EVENTS_TXSTOPPED_Generated (1UL) /*!< Event generated */
+
+/* Register: UARTE_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 6 : Shortcut between event ENDRX and task STOPRX */
+#define UARTE_SHORTS_ENDRX_STOPRX_Pos (6UL) /*!< Position of ENDRX_STOPRX field. */
+#define UARTE_SHORTS_ENDRX_STOPRX_Msk (0x1UL << UARTE_SHORTS_ENDRX_STOPRX_Pos) /*!< Bit mask of ENDRX_STOPRX field. */
+#define UARTE_SHORTS_ENDRX_STOPRX_Disabled (0UL) /*!< Disable shortcut */
+#define UARTE_SHORTS_ENDRX_STOPRX_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 5 : Shortcut between event ENDRX and task STARTRX */
+#define UARTE_SHORTS_ENDRX_STARTRX_Pos (5UL) /*!< Position of ENDRX_STARTRX field. */
+#define UARTE_SHORTS_ENDRX_STARTRX_Msk (0x1UL << UARTE_SHORTS_ENDRX_STARTRX_Pos) /*!< Bit mask of ENDRX_STARTRX field. */
+#define UARTE_SHORTS_ENDRX_STARTRX_Disabled (0UL) /*!< Disable shortcut */
+#define UARTE_SHORTS_ENDRX_STARTRX_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: UARTE_INTEN */
+/* Description: Enable or disable interrupt */
+
+/* Bit 22 : Enable or disable interrupt for event TXSTOPPED */
+#define UARTE_INTEN_TXSTOPPED_Pos (22UL) /*!< Position of TXSTOPPED field. */
+#define UARTE_INTEN_TXSTOPPED_Msk (0x1UL << UARTE_INTEN_TXSTOPPED_Pos) /*!< Bit mask of TXSTOPPED field. */
+#define UARTE_INTEN_TXSTOPPED_Disabled (0UL) /*!< Disable */
+#define UARTE_INTEN_TXSTOPPED_Enabled (1UL) /*!< Enable */
+
+/* Bit 20 : Enable or disable interrupt for event TXSTARTED */
+#define UARTE_INTEN_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */
+#define UARTE_INTEN_TXSTARTED_Msk (0x1UL << UARTE_INTEN_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */
+#define UARTE_INTEN_TXSTARTED_Disabled (0UL) /*!< Disable */
+#define UARTE_INTEN_TXSTARTED_Enabled (1UL) /*!< Enable */
+
+/* Bit 19 : Enable or disable interrupt for event RXSTARTED */
+#define UARTE_INTEN_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */
+#define UARTE_INTEN_RXSTARTED_Msk (0x1UL << UARTE_INTEN_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */
+#define UARTE_INTEN_RXSTARTED_Disabled (0UL) /*!< Disable */
+#define UARTE_INTEN_RXSTARTED_Enabled (1UL) /*!< Enable */
+
+/* Bit 17 : Enable or disable interrupt for event RXTO */
+#define UARTE_INTEN_RXTO_Pos (17UL) /*!< Position of RXTO field. */
+#define UARTE_INTEN_RXTO_Msk (0x1UL << UARTE_INTEN_RXTO_Pos) /*!< Bit mask of RXTO field. */
+#define UARTE_INTEN_RXTO_Disabled (0UL) /*!< Disable */
+#define UARTE_INTEN_RXTO_Enabled (1UL) /*!< Enable */
+
+/* Bit 9 : Enable or disable interrupt for event ERROR */
+#define UARTE_INTEN_ERROR_Pos (9UL) /*!< Position of ERROR field. */
+#define UARTE_INTEN_ERROR_Msk (0x1UL << UARTE_INTEN_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define UARTE_INTEN_ERROR_Disabled (0UL) /*!< Disable */
+#define UARTE_INTEN_ERROR_Enabled (1UL) /*!< Enable */
+
+/* Bit 8 : Enable or disable interrupt for event ENDTX */
+#define UARTE_INTEN_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */
+#define UARTE_INTEN_ENDTX_Msk (0x1UL << UARTE_INTEN_ENDTX_Pos) /*!< Bit mask of ENDTX field. */
+#define UARTE_INTEN_ENDTX_Disabled (0UL) /*!< Disable */
+#define UARTE_INTEN_ENDTX_Enabled (1UL) /*!< Enable */
+
+/* Bit 7 : Enable or disable interrupt for event TXDRDY */
+#define UARTE_INTEN_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */
+#define UARTE_INTEN_TXDRDY_Msk (0x1UL << UARTE_INTEN_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */
+#define UARTE_INTEN_TXDRDY_Disabled (0UL) /*!< Disable */
+#define UARTE_INTEN_TXDRDY_Enabled (1UL) /*!< Enable */
+
+/* Bit 4 : Enable or disable interrupt for event ENDRX */
+#define UARTE_INTEN_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */
+#define UARTE_INTEN_ENDRX_Msk (0x1UL << UARTE_INTEN_ENDRX_Pos) /*!< Bit mask of ENDRX field. */
+#define UARTE_INTEN_ENDRX_Disabled (0UL) /*!< Disable */
+#define UARTE_INTEN_ENDRX_Enabled (1UL) /*!< Enable */
+
+/* Bit 2 : Enable or disable interrupt for event RXDRDY */
+#define UARTE_INTEN_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */
+#define UARTE_INTEN_RXDRDY_Msk (0x1UL << UARTE_INTEN_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */
+#define UARTE_INTEN_RXDRDY_Disabled (0UL) /*!< Disable */
+#define UARTE_INTEN_RXDRDY_Enabled (1UL) /*!< Enable */
+
+/* Bit 1 : Enable or disable interrupt for event NCTS */
+#define UARTE_INTEN_NCTS_Pos (1UL) /*!< Position of NCTS field. */
+#define UARTE_INTEN_NCTS_Msk (0x1UL << UARTE_INTEN_NCTS_Pos) /*!< Bit mask of NCTS field. */
+#define UARTE_INTEN_NCTS_Disabled (0UL) /*!< Disable */
+#define UARTE_INTEN_NCTS_Enabled (1UL) /*!< Enable */
+
+/* Bit 0 : Enable or disable interrupt for event CTS */
+#define UARTE_INTEN_CTS_Pos (0UL) /*!< Position of CTS field. */
+#define UARTE_INTEN_CTS_Msk (0x1UL << UARTE_INTEN_CTS_Pos) /*!< Bit mask of CTS field. */
+#define UARTE_INTEN_CTS_Disabled (0UL) /*!< Disable */
+#define UARTE_INTEN_CTS_Enabled (1UL) /*!< Enable */
+
+/* Register: UARTE_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 22 : Write '1' to enable interrupt for event TXSTOPPED */
+#define UARTE_INTENSET_TXSTOPPED_Pos (22UL) /*!< Position of TXSTOPPED field. */
+#define UARTE_INTENSET_TXSTOPPED_Msk (0x1UL << UARTE_INTENSET_TXSTOPPED_Pos) /*!< Bit mask of TXSTOPPED field. */
+#define UARTE_INTENSET_TXSTOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENSET_TXSTOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENSET_TXSTOPPED_Set (1UL) /*!< Enable */
+
+/* Bit 20 : Write '1' to enable interrupt for event TXSTARTED */
+#define UARTE_INTENSET_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */
+#define UARTE_INTENSET_TXSTARTED_Msk (0x1UL << UARTE_INTENSET_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */
+#define UARTE_INTENSET_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENSET_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENSET_TXSTARTED_Set (1UL) /*!< Enable */
+
+/* Bit 19 : Write '1' to enable interrupt for event RXSTARTED */
+#define UARTE_INTENSET_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */
+#define UARTE_INTENSET_RXSTARTED_Msk (0x1UL << UARTE_INTENSET_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */
+#define UARTE_INTENSET_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENSET_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENSET_RXSTARTED_Set (1UL) /*!< Enable */
+
+/* Bit 17 : Write '1' to enable interrupt for event RXTO */
+#define UARTE_INTENSET_RXTO_Pos (17UL) /*!< Position of RXTO field. */
+#define UARTE_INTENSET_RXTO_Msk (0x1UL << UARTE_INTENSET_RXTO_Pos) /*!< Bit mask of RXTO field. */
+#define UARTE_INTENSET_RXTO_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENSET_RXTO_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENSET_RXTO_Set (1UL) /*!< Enable */
+
+/* Bit 9 : Write '1' to enable interrupt for event ERROR */
+#define UARTE_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */
+#define UARTE_INTENSET_ERROR_Msk (0x1UL << UARTE_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define UARTE_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENSET_ERROR_Set (1UL) /*!< Enable */
+
+/* Bit 8 : Write '1' to enable interrupt for event ENDTX */
+#define UARTE_INTENSET_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */
+#define UARTE_INTENSET_ENDTX_Msk (0x1UL << UARTE_INTENSET_ENDTX_Pos) /*!< Bit mask of ENDTX field. */
+#define UARTE_INTENSET_ENDTX_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENSET_ENDTX_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENSET_ENDTX_Set (1UL) /*!< Enable */
+
+/* Bit 7 : Write '1' to enable interrupt for event TXDRDY */
+#define UARTE_INTENSET_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */
+#define UARTE_INTENSET_TXDRDY_Msk (0x1UL << UARTE_INTENSET_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */
+#define UARTE_INTENSET_TXDRDY_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENSET_TXDRDY_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENSET_TXDRDY_Set (1UL) /*!< Enable */
+
+/* Bit 4 : Write '1' to enable interrupt for event ENDRX */
+#define UARTE_INTENSET_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */
+#define UARTE_INTENSET_ENDRX_Msk (0x1UL << UARTE_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */
+#define UARTE_INTENSET_ENDRX_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENSET_ENDRX_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENSET_ENDRX_Set (1UL) /*!< Enable */
+
+/* Bit 2 : Write '1' to enable interrupt for event RXDRDY */
+#define UARTE_INTENSET_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */
+#define UARTE_INTENSET_RXDRDY_Msk (0x1UL << UARTE_INTENSET_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */
+#define UARTE_INTENSET_RXDRDY_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENSET_RXDRDY_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENSET_RXDRDY_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event NCTS */
+#define UARTE_INTENSET_NCTS_Pos (1UL) /*!< Position of NCTS field. */
+#define UARTE_INTENSET_NCTS_Msk (0x1UL << UARTE_INTENSET_NCTS_Pos) /*!< Bit mask of NCTS field. */
+#define UARTE_INTENSET_NCTS_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENSET_NCTS_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENSET_NCTS_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event CTS */
+#define UARTE_INTENSET_CTS_Pos (0UL) /*!< Position of CTS field. */
+#define UARTE_INTENSET_CTS_Msk (0x1UL << UARTE_INTENSET_CTS_Pos) /*!< Bit mask of CTS field. */
+#define UARTE_INTENSET_CTS_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENSET_CTS_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENSET_CTS_Set (1UL) /*!< Enable */
+
+/* Register: UARTE_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 22 : Write '1' to disable interrupt for event TXSTOPPED */
+#define UARTE_INTENCLR_TXSTOPPED_Pos (22UL) /*!< Position of TXSTOPPED field. */
+#define UARTE_INTENCLR_TXSTOPPED_Msk (0x1UL << UARTE_INTENCLR_TXSTOPPED_Pos) /*!< Bit mask of TXSTOPPED field. */
+#define UARTE_INTENCLR_TXSTOPPED_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENCLR_TXSTOPPED_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENCLR_TXSTOPPED_Clear (1UL) /*!< Disable */
+
+/* Bit 20 : Write '1' to disable interrupt for event TXSTARTED */
+#define UARTE_INTENCLR_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */
+#define UARTE_INTENCLR_TXSTARTED_Msk (0x1UL << UARTE_INTENCLR_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */
+#define UARTE_INTENCLR_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENCLR_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENCLR_TXSTARTED_Clear (1UL) /*!< Disable */
+
+/* Bit 19 : Write '1' to disable interrupt for event RXSTARTED */
+#define UARTE_INTENCLR_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */
+#define UARTE_INTENCLR_RXSTARTED_Msk (0x1UL << UARTE_INTENCLR_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */
+#define UARTE_INTENCLR_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENCLR_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENCLR_RXSTARTED_Clear (1UL) /*!< Disable */
+
+/* Bit 17 : Write '1' to disable interrupt for event RXTO */
+#define UARTE_INTENCLR_RXTO_Pos (17UL) /*!< Position of RXTO field. */
+#define UARTE_INTENCLR_RXTO_Msk (0x1UL << UARTE_INTENCLR_RXTO_Pos) /*!< Bit mask of RXTO field. */
+#define UARTE_INTENCLR_RXTO_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENCLR_RXTO_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENCLR_RXTO_Clear (1UL) /*!< Disable */
+
+/* Bit 9 : Write '1' to disable interrupt for event ERROR */
+#define UARTE_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */
+#define UARTE_INTENCLR_ERROR_Msk (0x1UL << UARTE_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */
+#define UARTE_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENCLR_ERROR_Clear (1UL) /*!< Disable */
+
+/* Bit 8 : Write '1' to disable interrupt for event ENDTX */
+#define UARTE_INTENCLR_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */
+#define UARTE_INTENCLR_ENDTX_Msk (0x1UL << UARTE_INTENCLR_ENDTX_Pos) /*!< Bit mask of ENDTX field. */
+#define UARTE_INTENCLR_ENDTX_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENCLR_ENDTX_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENCLR_ENDTX_Clear (1UL) /*!< Disable */
+
+/* Bit 7 : Write '1' to disable interrupt for event TXDRDY */
+#define UARTE_INTENCLR_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */
+#define UARTE_INTENCLR_TXDRDY_Msk (0x1UL << UARTE_INTENCLR_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */
+#define UARTE_INTENCLR_TXDRDY_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENCLR_TXDRDY_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENCLR_TXDRDY_Clear (1UL) /*!< Disable */
+
+/* Bit 4 : Write '1' to disable interrupt for event ENDRX */
+#define UARTE_INTENCLR_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */
+#define UARTE_INTENCLR_ENDRX_Msk (0x1UL << UARTE_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */
+#define UARTE_INTENCLR_ENDRX_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENCLR_ENDRX_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENCLR_ENDRX_Clear (1UL) /*!< Disable */
+
+/* Bit 2 : Write '1' to disable interrupt for event RXDRDY */
+#define UARTE_INTENCLR_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */
+#define UARTE_INTENCLR_RXDRDY_Msk (0x1UL << UARTE_INTENCLR_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */
+#define UARTE_INTENCLR_RXDRDY_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENCLR_RXDRDY_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENCLR_RXDRDY_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event NCTS */
+#define UARTE_INTENCLR_NCTS_Pos (1UL) /*!< Position of NCTS field. */
+#define UARTE_INTENCLR_NCTS_Msk (0x1UL << UARTE_INTENCLR_NCTS_Pos) /*!< Bit mask of NCTS field. */
+#define UARTE_INTENCLR_NCTS_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENCLR_NCTS_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENCLR_NCTS_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event CTS */
+#define UARTE_INTENCLR_CTS_Pos (0UL) /*!< Position of CTS field. */
+#define UARTE_INTENCLR_CTS_Msk (0x1UL << UARTE_INTENCLR_CTS_Pos) /*!< Bit mask of CTS field. */
+#define UARTE_INTENCLR_CTS_Disabled (0UL) /*!< Read: Disabled */
+#define UARTE_INTENCLR_CTS_Enabled (1UL) /*!< Read: Enabled */
+#define UARTE_INTENCLR_CTS_Clear (1UL) /*!< Disable */
+
+/* Register: UARTE_ERRORSRC */
+/* Description: Error source Note : this register is read / write one to clear. */
+
+/* Bit 3 : Break condition */
+#define UARTE_ERRORSRC_BREAK_Pos (3UL) /*!< Position of BREAK field. */
+#define UARTE_ERRORSRC_BREAK_Msk (0x1UL << UARTE_ERRORSRC_BREAK_Pos) /*!< Bit mask of BREAK field. */
+#define UARTE_ERRORSRC_BREAK_NotPresent (0UL) /*!< Read: error not present */
+#define UARTE_ERRORSRC_BREAK_Present (1UL) /*!< Read: error present */
+
+/* Bit 2 : Framing error occurred */
+#define UARTE_ERRORSRC_FRAMING_Pos (2UL) /*!< Position of FRAMING field. */
+#define UARTE_ERRORSRC_FRAMING_Msk (0x1UL << UARTE_ERRORSRC_FRAMING_Pos) /*!< Bit mask of FRAMING field. */
+#define UARTE_ERRORSRC_FRAMING_NotPresent (0UL) /*!< Read: error not present */
+#define UARTE_ERRORSRC_FRAMING_Present (1UL) /*!< Read: error present */
+
+/* Bit 1 : Parity error */
+#define UARTE_ERRORSRC_PARITY_Pos (1UL) /*!< Position of PARITY field. */
+#define UARTE_ERRORSRC_PARITY_Msk (0x1UL << UARTE_ERRORSRC_PARITY_Pos) /*!< Bit mask of PARITY field. */
+#define UARTE_ERRORSRC_PARITY_NotPresent (0UL) /*!< Read: error not present */
+#define UARTE_ERRORSRC_PARITY_Present (1UL) /*!< Read: error present */
+
+/* Bit 0 : Overrun error */
+#define UARTE_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */
+#define UARTE_ERRORSRC_OVERRUN_Msk (0x1UL << UARTE_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */
+#define UARTE_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Read: error not present */
+#define UARTE_ERRORSRC_OVERRUN_Present (1UL) /*!< Read: error present */
+
+/* Register: UARTE_ENABLE */
+/* Description: Enable UART */
+
+/* Bits 3..0 : Enable or disable UARTE */
+#define UARTE_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define UARTE_ENABLE_ENABLE_Msk (0xFUL << UARTE_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define UARTE_ENABLE_ENABLE_Disabled (0UL) /*!< Disable UARTE */
+#define UARTE_ENABLE_ENABLE_Enabled (8UL) /*!< Enable UARTE */
+
+/* Register: UARTE_PSEL_RTS */
+/* Description: Pin select for RTS signal */
+
+/* Bit 31 : Connection */
+#define UARTE_PSEL_RTS_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define UARTE_PSEL_RTS_CONNECT_Msk (0x1UL << UARTE_PSEL_RTS_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define UARTE_PSEL_RTS_CONNECT_Connected (0UL) /*!< Connect */
+#define UARTE_PSEL_RTS_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define UARTE_PSEL_RTS_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define UARTE_PSEL_RTS_PORT_Msk (0x1UL << UARTE_PSEL_RTS_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define UARTE_PSEL_RTS_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define UARTE_PSEL_RTS_PIN_Msk (0x1FUL << UARTE_PSEL_RTS_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: UARTE_PSEL_TXD */
+/* Description: Pin select for TXD signal */
+
+/* Bit 31 : Connection */
+#define UARTE_PSEL_TXD_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define UARTE_PSEL_TXD_CONNECT_Msk (0x1UL << UARTE_PSEL_TXD_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define UARTE_PSEL_TXD_CONNECT_Connected (0UL) /*!< Connect */
+#define UARTE_PSEL_TXD_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define UARTE_PSEL_TXD_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define UARTE_PSEL_TXD_PORT_Msk (0x1UL << UARTE_PSEL_TXD_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define UARTE_PSEL_TXD_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define UARTE_PSEL_TXD_PIN_Msk (0x1FUL << UARTE_PSEL_TXD_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: UARTE_PSEL_CTS */
+/* Description: Pin select for CTS signal */
+
+/* Bit 31 : Connection */
+#define UARTE_PSEL_CTS_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define UARTE_PSEL_CTS_CONNECT_Msk (0x1UL << UARTE_PSEL_CTS_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define UARTE_PSEL_CTS_CONNECT_Connected (0UL) /*!< Connect */
+#define UARTE_PSEL_CTS_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define UARTE_PSEL_CTS_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define UARTE_PSEL_CTS_PORT_Msk (0x1UL << UARTE_PSEL_CTS_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define UARTE_PSEL_CTS_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define UARTE_PSEL_CTS_PIN_Msk (0x1FUL << UARTE_PSEL_CTS_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: UARTE_PSEL_RXD */
+/* Description: Pin select for RXD signal */
+
+/* Bit 31 : Connection */
+#define UARTE_PSEL_RXD_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define UARTE_PSEL_RXD_CONNECT_Msk (0x1UL << UARTE_PSEL_RXD_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define UARTE_PSEL_RXD_CONNECT_Connected (0UL) /*!< Connect */
+#define UARTE_PSEL_RXD_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number */
+#define UARTE_PSEL_RXD_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define UARTE_PSEL_RXD_PORT_Msk (0x1UL << UARTE_PSEL_RXD_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : Pin number */
+#define UARTE_PSEL_RXD_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define UARTE_PSEL_RXD_PIN_Msk (0x1FUL << UARTE_PSEL_RXD_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: UARTE_BAUDRATE */
+/* Description: Baud rate. Accuracy depends on the HFCLK source selected. */
+
+/* Bits 31..0 : Baud rate */
+#define UARTE_BAUDRATE_BAUDRATE_Pos (0UL) /*!< Position of BAUDRATE field. */
+#define UARTE_BAUDRATE_BAUDRATE_Msk (0xFFFFFFFFUL << UARTE_BAUDRATE_BAUDRATE_Pos) /*!< Bit mask of BAUDRATE field. */
+#define UARTE_BAUDRATE_BAUDRATE_Baud1200 (0x0004F000UL) /*!< 1200 baud (actual rate: 1205) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud2400 (0x0009D000UL) /*!< 2400 baud (actual rate: 2396) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud4800 (0x0013B000UL) /*!< 4800 baud (actual rate: 4808) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud9600 (0x00275000UL) /*!< 9600 baud (actual rate: 9598) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud14400 (0x003AF000UL) /*!< 14400 baud (actual rate: 14401) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud19200 (0x004EA000UL) /*!< 19200 baud (actual rate: 19208) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud28800 (0x0075C000UL) /*!< 28800 baud (actual rate: 28777) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud31250 (0x00800000UL) /*!< 31250 baud */
+#define UARTE_BAUDRATE_BAUDRATE_Baud38400 (0x009D0000UL) /*!< 38400 baud (actual rate: 38369) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud56000 (0x00E50000UL) /*!< 56000 baud (actual rate: 55944) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud57600 (0x00EB0000UL) /*!< 57600 baud (actual rate: 57554) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud76800 (0x013A9000UL) /*!< 76800 baud (actual rate: 76923) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud115200 (0x01D60000UL) /*!< 115200 baud (actual rate: 115108) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud230400 (0x03B00000UL) /*!< 230400 baud (actual rate: 231884) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud250000 (0x04000000UL) /*!< 250000 baud */
+#define UARTE_BAUDRATE_BAUDRATE_Baud460800 (0x07400000UL) /*!< 460800 baud (actual rate: 457143) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud921600 (0x0F000000UL) /*!< 921600 baud (actual rate: 941176) */
+#define UARTE_BAUDRATE_BAUDRATE_Baud1M (0x10000000UL) /*!< 1Mega baud */
+
+/* Register: UARTE_RXD_PTR */
+/* Description: Data pointer */
+
+/* Bits 31..0 : Data pointer */
+#define UARTE_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define UARTE_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << UARTE_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: UARTE_RXD_MAXCNT */
+/* Description: Maximum number of bytes in receive buffer */
+
+/* Bits 15..0 : Maximum number of bytes in receive buffer */
+#define UARTE_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define UARTE_RXD_MAXCNT_MAXCNT_Msk (0xFFFFUL << UARTE_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: UARTE_RXD_AMOUNT */
+/* Description: Number of bytes transferred in the last transaction */
+
+/* Bits 15..0 : Number of bytes transferred in the last transaction */
+#define UARTE_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define UARTE_RXD_AMOUNT_AMOUNT_Msk (0xFFFFUL << UARTE_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+/* Register: UARTE_TXD_PTR */
+/* Description: Data pointer */
+
+/* Bits 31..0 : Data pointer */
+#define UARTE_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define UARTE_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << UARTE_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: UARTE_TXD_MAXCNT */
+/* Description: Maximum number of bytes in transmit buffer */
+
+/* Bits 15..0 : Maximum number of bytes in transmit buffer */
+#define UARTE_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define UARTE_TXD_MAXCNT_MAXCNT_Msk (0xFFFFUL << UARTE_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: UARTE_TXD_AMOUNT */
+/* Description: Number of bytes transferred in the last transaction */
+
+/* Bits 15..0 : Number of bytes transferred in the last transaction */
+#define UARTE_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define UARTE_TXD_AMOUNT_AMOUNT_Msk (0xFFFFUL << UARTE_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+/* Register: UARTE_CONFIG */
+/* Description: Configuration of parity and hardware flow control */
+
+/* Bit 8 : Even or odd parity type */
+#define UARTE_CONFIG_PARITYTYPE_Pos (8UL) /*!< Position of PARITYTYPE field. */
+#define UARTE_CONFIG_PARITYTYPE_Msk (0x1UL << UARTE_CONFIG_PARITYTYPE_Pos) /*!< Bit mask of PARITYTYPE field. */
+#define UARTE_CONFIG_PARITYTYPE_Even (0UL) /*!< Even parity */
+#define UARTE_CONFIG_PARITYTYPE_Odd (1UL) /*!< Odd parity */
+
+/* Bit 4 : Stop bits */
+#define UARTE_CONFIG_STOP_Pos (4UL) /*!< Position of STOP field. */
+#define UARTE_CONFIG_STOP_Msk (0x1UL << UARTE_CONFIG_STOP_Pos) /*!< Bit mask of STOP field. */
+#define UARTE_CONFIG_STOP_One (0UL) /*!< One stop bit */
+#define UARTE_CONFIG_STOP_Two (1UL) /*!< Two stop bits */
+
+/* Bits 3..1 : Parity */
+#define UARTE_CONFIG_PARITY_Pos (1UL) /*!< Position of PARITY field. */
+#define UARTE_CONFIG_PARITY_Msk (0x7UL << UARTE_CONFIG_PARITY_Pos) /*!< Bit mask of PARITY field. */
+#define UARTE_CONFIG_PARITY_Excluded (0x0UL) /*!< Exclude parity bit */
+#define UARTE_CONFIG_PARITY_Included (0x7UL) /*!< Include even parity bit */
+
+/* Bit 0 : Hardware flow control */
+#define UARTE_CONFIG_HWFC_Pos (0UL) /*!< Position of HWFC field. */
+#define UARTE_CONFIG_HWFC_Msk (0x1UL << UARTE_CONFIG_HWFC_Pos) /*!< Bit mask of HWFC field. */
+#define UARTE_CONFIG_HWFC_Disabled (0UL) /*!< Disabled */
+#define UARTE_CONFIG_HWFC_Enabled (1UL) /*!< Enabled */
+
+
+/* Peripheral: UICR */
+/* Description: User information configuration registers */
+
+/* Register: UICR_NRFFW */
+/* Description: Description collection: Reserved for Nordic firmware design */
+
+/* Bits 31..0 : Reserved for Nordic firmware design */
+#define UICR_NRFFW_NRFFW_Pos (0UL) /*!< Position of NRFFW field. */
+#define UICR_NRFFW_NRFFW_Msk (0xFFFFFFFFUL << UICR_NRFFW_NRFFW_Pos) /*!< Bit mask of NRFFW field. */
+
+/* Register: UICR_NRFHW */
+/* Description: Description collection: Reserved for Nordic hardware design */
+
+/* Bits 31..0 : Reserved for Nordic hardware design */
+#define UICR_NRFHW_NRFHW_Pos (0UL) /*!< Position of NRFHW field. */
+#define UICR_NRFHW_NRFHW_Msk (0xFFFFFFFFUL << UICR_NRFHW_NRFHW_Pos) /*!< Bit mask of NRFHW field. */
+
+/* Register: UICR_CUSTOMER */
+/* Description: Description collection: Reserved for customer */
+
+/* Bits 31..0 : Reserved for customer */
+#define UICR_CUSTOMER_CUSTOMER_Pos (0UL) /*!< Position of CUSTOMER field. */
+#define UICR_CUSTOMER_CUSTOMER_Msk (0xFFFFFFFFUL << UICR_CUSTOMER_CUSTOMER_Pos) /*!< Bit mask of CUSTOMER field. */
+
+/* Register: UICR_PSELRESET */
+/* Description: Description collection: Mapping of the nRESET function (see POWER chapter for details) */
+
+/* Bit 31 : Connection */
+#define UICR_PSELRESET_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */
+#define UICR_PSELRESET_CONNECT_Msk (0x1UL << UICR_PSELRESET_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define UICR_PSELRESET_CONNECT_Connected (0UL) /*!< Connect */
+#define UICR_PSELRESET_CONNECT_Disconnected (1UL) /*!< Disconnect */
+
+/* Bit 5 : Port number onto which nRESET is exposed */
+#define UICR_PSELRESET_PORT_Pos (5UL) /*!< Position of PORT field. */
+#define UICR_PSELRESET_PORT_Msk (0x1UL << UICR_PSELRESET_PORT_Pos) /*!< Bit mask of PORT field. */
+
+/* Bits 4..0 : GPIO pin number onto which nRESET is exposed */
+#define UICR_PSELRESET_PIN_Pos (0UL) /*!< Position of PIN field. */
+#define UICR_PSELRESET_PIN_Msk (0x1FUL << UICR_PSELRESET_PIN_Pos) /*!< Bit mask of PIN field. */
+
+/* Register: UICR_APPROTECT */
+/* Description: Access port protection */
+
+/* Bits 7..0 : Enable or disable access port protection. */
+#define UICR_APPROTECT_PALL_Pos (0UL) /*!< Position of PALL field. */
+#define UICR_APPROTECT_PALL_Msk (0xFFUL << UICR_APPROTECT_PALL_Pos) /*!< Bit mask of PALL field. */
+#define UICR_APPROTECT_PALL_Enabled (0x00UL) /*!< Enable */
+#define UICR_APPROTECT_PALL_Disabled (0xFFUL) /*!< Disable */
+
+/* Register: UICR_NFCPINS */
+/* Description: Setting of pins dedicated to NFC functionality: NFC antenna or GPIO */
+
+/* Bit 0 : Setting of pins dedicated to NFC functionality */
+#define UICR_NFCPINS_PROTECT_Pos (0UL) /*!< Position of PROTECT field. */
+#define UICR_NFCPINS_PROTECT_Msk (0x1UL << UICR_NFCPINS_PROTECT_Pos) /*!< Bit mask of PROTECT field. */
+#define UICR_NFCPINS_PROTECT_Disabled (0UL) /*!< Operation as GPIO pins. Same protection as normal GPIO pins */
+#define UICR_NFCPINS_PROTECT_NFC (1UL) /*!< Operation as NFC antenna pins. Configures the protection for NFC operation */
+
+/* Register: UICR_DEBUGCTRL */
+/* Description: Processor debug control */
+
+/* Bits 15..8 : Configure CPU flash patch and breakpoint (FPB) unit behavior */
+#define UICR_DEBUGCTRL_CPUFPBEN_Pos (8UL) /*!< Position of CPUFPBEN field. */
+#define UICR_DEBUGCTRL_CPUFPBEN_Msk (0xFFUL << UICR_DEBUGCTRL_CPUFPBEN_Pos) /*!< Bit mask of CPUFPBEN field. */
+#define UICR_DEBUGCTRL_CPUFPBEN_Disabled (0x00UL) /*!< Disable CPU FPB unit. Writes into the FPB registers will be ignored. */
+#define UICR_DEBUGCTRL_CPUFPBEN_Enabled (0xFFUL) /*!< Enable CPU FPB unit (default behavior) */
+
+/* Bits 7..0 : Configure CPU non-intrusive debug features */
+#define UICR_DEBUGCTRL_CPUNIDEN_Pos (0UL) /*!< Position of CPUNIDEN field. */
+#define UICR_DEBUGCTRL_CPUNIDEN_Msk (0xFFUL << UICR_DEBUGCTRL_CPUNIDEN_Pos) /*!< Bit mask of CPUNIDEN field. */
+#define UICR_DEBUGCTRL_CPUNIDEN_Disabled (0x00UL) /*!< Disable CPU ITM and ETM functionality */
+#define UICR_DEBUGCTRL_CPUNIDEN_Enabled (0xFFUL) /*!< Enable CPU ITM and ETM functionality (default behavior) */
+
+/* Register: UICR_REGOUT0 */
+/* Description: Output voltage from REG0 regulator stage. The maximum output voltage from this stage is given as VDDH - VREG0DROP. */
+
+/* Bits 2..0 : Output voltage from REG0 regulator stage. */
+#define UICR_REGOUT0_VOUT_Pos (0UL) /*!< Position of VOUT field. */
+#define UICR_REGOUT0_VOUT_Msk (0x7UL << UICR_REGOUT0_VOUT_Pos) /*!< Bit mask of VOUT field. */
+#define UICR_REGOUT0_VOUT_1V8 (0UL) /*!< 1.8 V */
+#define UICR_REGOUT0_VOUT_2V1 (1UL) /*!< 2.1 V */
+#define UICR_REGOUT0_VOUT_2V4 (2UL) /*!< 2.4 V */
+#define UICR_REGOUT0_VOUT_2V7 (3UL) /*!< 2.7 V */
+#define UICR_REGOUT0_VOUT_3V0 (4UL) /*!< 3.0 V */
+#define UICR_REGOUT0_VOUT_3V3 (5UL) /*!< 3.3 V */
+#define UICR_REGOUT0_VOUT_DEFAULT (7UL) /*!< Default voltage: 1.8 V */
+
+
+/* Peripheral: USBD */
+/* Description: Universal serial bus device */
+
+/* Register: USBD_TASKS_STARTEPIN */
+/* Description: Description collection: Captures the EPIN[n].PTR and EPIN[n].MAXCNT registers values, and enables endpoint IN n to respond to traffic from host */
+
+/* Bit 0 : Captures the EPIN[n].PTR and EPIN[n].MAXCNT registers values, and enables endpoint IN n to respond to traffic from host */
+#define USBD_TASKS_STARTEPIN_TASKS_STARTEPIN_Pos (0UL) /*!< Position of TASKS_STARTEPIN field. */
+#define USBD_TASKS_STARTEPIN_TASKS_STARTEPIN_Msk (0x1UL << USBD_TASKS_STARTEPIN_TASKS_STARTEPIN_Pos) /*!< Bit mask of TASKS_STARTEPIN field. */
+#define USBD_TASKS_STARTEPIN_TASKS_STARTEPIN_Trigger (1UL) /*!< Trigger task */
+
+/* Register: USBD_TASKS_STARTISOIN */
+/* Description: Captures the ISOIN.PTR and ISOIN.MAXCNT registers values, and enables sending data on ISO endpoint */
+
+/* Bit 0 : Captures the ISOIN.PTR and ISOIN.MAXCNT registers values, and enables sending data on ISO endpoint */
+#define USBD_TASKS_STARTISOIN_TASKS_STARTISOIN_Pos (0UL) /*!< Position of TASKS_STARTISOIN field. */
+#define USBD_TASKS_STARTISOIN_TASKS_STARTISOIN_Msk (0x1UL << USBD_TASKS_STARTISOIN_TASKS_STARTISOIN_Pos) /*!< Bit mask of TASKS_STARTISOIN field. */
+#define USBD_TASKS_STARTISOIN_TASKS_STARTISOIN_Trigger (1UL) /*!< Trigger task */
+
+/* Register: USBD_TASKS_STARTEPOUT */
+/* Description: Description collection: Captures the EPOUT[n].PTR and EPOUT[n].MAXCNT registers values, and enables endpoint n to respond to traffic from host */
+
+/* Bit 0 : Captures the EPOUT[n].PTR and EPOUT[n].MAXCNT registers values, and enables endpoint n to respond to traffic from host */
+#define USBD_TASKS_STARTEPOUT_TASKS_STARTEPOUT_Pos (0UL) /*!< Position of TASKS_STARTEPOUT field. */
+#define USBD_TASKS_STARTEPOUT_TASKS_STARTEPOUT_Msk (0x1UL << USBD_TASKS_STARTEPOUT_TASKS_STARTEPOUT_Pos) /*!< Bit mask of TASKS_STARTEPOUT field. */
+#define USBD_TASKS_STARTEPOUT_TASKS_STARTEPOUT_Trigger (1UL) /*!< Trigger task */
+
+/* Register: USBD_TASKS_STARTISOOUT */
+/* Description: Captures the ISOOUT.PTR and ISOOUT.MAXCNT registers values, and enables receiving of data on ISO endpoint */
+
+/* Bit 0 : Captures the ISOOUT.PTR and ISOOUT.MAXCNT registers values, and enables receiving of data on ISO endpoint */
+#define USBD_TASKS_STARTISOOUT_TASKS_STARTISOOUT_Pos (0UL) /*!< Position of TASKS_STARTISOOUT field. */
+#define USBD_TASKS_STARTISOOUT_TASKS_STARTISOOUT_Msk (0x1UL << USBD_TASKS_STARTISOOUT_TASKS_STARTISOOUT_Pos) /*!< Bit mask of TASKS_STARTISOOUT field. */
+#define USBD_TASKS_STARTISOOUT_TASKS_STARTISOOUT_Trigger (1UL) /*!< Trigger task */
+
+/* Register: USBD_TASKS_EP0RCVOUT */
+/* Description: Allows OUT data stage on control endpoint 0 */
+
+/* Bit 0 : Allows OUT data stage on control endpoint 0 */
+#define USBD_TASKS_EP0RCVOUT_TASKS_EP0RCVOUT_Pos (0UL) /*!< Position of TASKS_EP0RCVOUT field. */
+#define USBD_TASKS_EP0RCVOUT_TASKS_EP0RCVOUT_Msk (0x1UL << USBD_TASKS_EP0RCVOUT_TASKS_EP0RCVOUT_Pos) /*!< Bit mask of TASKS_EP0RCVOUT field. */
+#define USBD_TASKS_EP0RCVOUT_TASKS_EP0RCVOUT_Trigger (1UL) /*!< Trigger task */
+
+/* Register: USBD_TASKS_EP0STATUS */
+/* Description: Allows status stage on control endpoint 0 */
+
+/* Bit 0 : Allows status stage on control endpoint 0 */
+#define USBD_TASKS_EP0STATUS_TASKS_EP0STATUS_Pos (0UL) /*!< Position of TASKS_EP0STATUS field. */
+#define USBD_TASKS_EP0STATUS_TASKS_EP0STATUS_Msk (0x1UL << USBD_TASKS_EP0STATUS_TASKS_EP0STATUS_Pos) /*!< Bit mask of TASKS_EP0STATUS field. */
+#define USBD_TASKS_EP0STATUS_TASKS_EP0STATUS_Trigger (1UL) /*!< Trigger task */
+
+/* Register: USBD_TASKS_EP0STALL */
+/* Description: Stalls data and status stage on control endpoint 0 */
+
+/* Bit 0 : Stalls data and status stage on control endpoint 0 */
+#define USBD_TASKS_EP0STALL_TASKS_EP0STALL_Pos (0UL) /*!< Position of TASKS_EP0STALL field. */
+#define USBD_TASKS_EP0STALL_TASKS_EP0STALL_Msk (0x1UL << USBD_TASKS_EP0STALL_TASKS_EP0STALL_Pos) /*!< Bit mask of TASKS_EP0STALL field. */
+#define USBD_TASKS_EP0STALL_TASKS_EP0STALL_Trigger (1UL) /*!< Trigger task */
+
+/* Register: USBD_TASKS_DPDMDRIVE */
+/* Description: Forces D+ and D- lines into the state defined in the DPDMVALUE register */
+
+/* Bit 0 : Forces D+ and D- lines into the state defined in the DPDMVALUE register */
+#define USBD_TASKS_DPDMDRIVE_TASKS_DPDMDRIVE_Pos (0UL) /*!< Position of TASKS_DPDMDRIVE field. */
+#define USBD_TASKS_DPDMDRIVE_TASKS_DPDMDRIVE_Msk (0x1UL << USBD_TASKS_DPDMDRIVE_TASKS_DPDMDRIVE_Pos) /*!< Bit mask of TASKS_DPDMDRIVE field. */
+#define USBD_TASKS_DPDMDRIVE_TASKS_DPDMDRIVE_Trigger (1UL) /*!< Trigger task */
+
+/* Register: USBD_TASKS_DPDMNODRIVE */
+/* Description: Stops forcing D+ and D- lines into any state (USB engine takes control) */
+
+/* Bit 0 : Stops forcing D+ and D- lines into any state (USB engine takes control) */
+#define USBD_TASKS_DPDMNODRIVE_TASKS_DPDMNODRIVE_Pos (0UL) /*!< Position of TASKS_DPDMNODRIVE field. */
+#define USBD_TASKS_DPDMNODRIVE_TASKS_DPDMNODRIVE_Msk (0x1UL << USBD_TASKS_DPDMNODRIVE_TASKS_DPDMNODRIVE_Pos) /*!< Bit mask of TASKS_DPDMNODRIVE field. */
+#define USBD_TASKS_DPDMNODRIVE_TASKS_DPDMNODRIVE_Trigger (1UL) /*!< Trigger task */
+
+/* Register: USBD_EVENTS_USBRESET */
+/* Description: Signals that a USB reset condition has been detected on USB lines */
+
+/* Bit 0 : Signals that a USB reset condition has been detected on USB lines */
+#define USBD_EVENTS_USBRESET_EVENTS_USBRESET_Pos (0UL) /*!< Position of EVENTS_USBRESET field. */
+#define USBD_EVENTS_USBRESET_EVENTS_USBRESET_Msk (0x1UL << USBD_EVENTS_USBRESET_EVENTS_USBRESET_Pos) /*!< Bit mask of EVENTS_USBRESET field. */
+#define USBD_EVENTS_USBRESET_EVENTS_USBRESET_NotGenerated (0UL) /*!< Event not generated */
+#define USBD_EVENTS_USBRESET_EVENTS_USBRESET_Generated (1UL) /*!< Event generated */
+
+/* Register: USBD_EVENTS_STARTED */
+/* Description: Confirms that the EPIN[n].PTR and EPIN[n].MAXCNT, or EPOUT[n].PTR and EPOUT[n].MAXCNT registers have been captured on all endpoints reported in the EPSTATUS register */
+
+/* Bit 0 : Confirms that the EPIN[n].PTR and EPIN[n].MAXCNT, or EPOUT[n].PTR and EPOUT[n].MAXCNT registers have been captured on all endpoints reported in the EPSTATUS register */
+#define USBD_EVENTS_STARTED_EVENTS_STARTED_Pos (0UL) /*!< Position of EVENTS_STARTED field. */
+#define USBD_EVENTS_STARTED_EVENTS_STARTED_Msk (0x1UL << USBD_EVENTS_STARTED_EVENTS_STARTED_Pos) /*!< Bit mask of EVENTS_STARTED field. */
+#define USBD_EVENTS_STARTED_EVENTS_STARTED_NotGenerated (0UL) /*!< Event not generated */
+#define USBD_EVENTS_STARTED_EVENTS_STARTED_Generated (1UL) /*!< Event generated */
+
+/* Register: USBD_EVENTS_ENDEPIN */
+/* Description: Description collection: The whole EPIN[n] buffer has been consumed. The buffer can be accessed safely by software. */
+
+/* Bit 0 : The whole EPIN[n] buffer has been consumed. The buffer can be accessed safely by software. */
+#define USBD_EVENTS_ENDEPIN_EVENTS_ENDEPIN_Pos (0UL) /*!< Position of EVENTS_ENDEPIN field. */
+#define USBD_EVENTS_ENDEPIN_EVENTS_ENDEPIN_Msk (0x1UL << USBD_EVENTS_ENDEPIN_EVENTS_ENDEPIN_Pos) /*!< Bit mask of EVENTS_ENDEPIN field. */
+#define USBD_EVENTS_ENDEPIN_EVENTS_ENDEPIN_NotGenerated (0UL) /*!< Event not generated */
+#define USBD_EVENTS_ENDEPIN_EVENTS_ENDEPIN_Generated (1UL) /*!< Event generated */
+
+/* Register: USBD_EVENTS_EP0DATADONE */
+/* Description: An acknowledged data transfer has taken place on the control endpoint */
+
+/* Bit 0 : An acknowledged data transfer has taken place on the control endpoint */
+#define USBD_EVENTS_EP0DATADONE_EVENTS_EP0DATADONE_Pos (0UL) /*!< Position of EVENTS_EP0DATADONE field. */
+#define USBD_EVENTS_EP0DATADONE_EVENTS_EP0DATADONE_Msk (0x1UL << USBD_EVENTS_EP0DATADONE_EVENTS_EP0DATADONE_Pos) /*!< Bit mask of EVENTS_EP0DATADONE field. */
+#define USBD_EVENTS_EP0DATADONE_EVENTS_EP0DATADONE_NotGenerated (0UL) /*!< Event not generated */
+#define USBD_EVENTS_EP0DATADONE_EVENTS_EP0DATADONE_Generated (1UL) /*!< Event generated */
+
+/* Register: USBD_EVENTS_ENDISOIN */
+/* Description: The whole ISOIN buffer has been consumed. The buffer can be accessed safely by software. */
+
+/* Bit 0 : The whole ISOIN buffer has been consumed. The buffer can be accessed safely by software. */
+#define USBD_EVENTS_ENDISOIN_EVENTS_ENDISOIN_Pos (0UL) /*!< Position of EVENTS_ENDISOIN field. */
+#define USBD_EVENTS_ENDISOIN_EVENTS_ENDISOIN_Msk (0x1UL << USBD_EVENTS_ENDISOIN_EVENTS_ENDISOIN_Pos) /*!< Bit mask of EVENTS_ENDISOIN field. */
+#define USBD_EVENTS_ENDISOIN_EVENTS_ENDISOIN_NotGenerated (0UL) /*!< Event not generated */
+#define USBD_EVENTS_ENDISOIN_EVENTS_ENDISOIN_Generated (1UL) /*!< Event generated */
+
+/* Register: USBD_EVENTS_ENDEPOUT */
+/* Description: Description collection: The whole EPOUT[n] buffer has been consumed. The buffer can be accessed safely by software. */
+
+/* Bit 0 : The whole EPOUT[n] buffer has been consumed. The buffer can be accessed safely by software. */
+#define USBD_EVENTS_ENDEPOUT_EVENTS_ENDEPOUT_Pos (0UL) /*!< Position of EVENTS_ENDEPOUT field. */
+#define USBD_EVENTS_ENDEPOUT_EVENTS_ENDEPOUT_Msk (0x1UL << USBD_EVENTS_ENDEPOUT_EVENTS_ENDEPOUT_Pos) /*!< Bit mask of EVENTS_ENDEPOUT field. */
+#define USBD_EVENTS_ENDEPOUT_EVENTS_ENDEPOUT_NotGenerated (0UL) /*!< Event not generated */
+#define USBD_EVENTS_ENDEPOUT_EVENTS_ENDEPOUT_Generated (1UL) /*!< Event generated */
+
+/* Register: USBD_EVENTS_ENDISOOUT */
+/* Description: The whole ISOOUT buffer has been consumed. The buffer can be accessed safely by software. */
+
+/* Bit 0 : The whole ISOOUT buffer has been consumed. The buffer can be accessed safely by software. */
+#define USBD_EVENTS_ENDISOOUT_EVENTS_ENDISOOUT_Pos (0UL) /*!< Position of EVENTS_ENDISOOUT field. */
+#define USBD_EVENTS_ENDISOOUT_EVENTS_ENDISOOUT_Msk (0x1UL << USBD_EVENTS_ENDISOOUT_EVENTS_ENDISOOUT_Pos) /*!< Bit mask of EVENTS_ENDISOOUT field. */
+#define USBD_EVENTS_ENDISOOUT_EVENTS_ENDISOOUT_NotGenerated (0UL) /*!< Event not generated */
+#define USBD_EVENTS_ENDISOOUT_EVENTS_ENDISOOUT_Generated (1UL) /*!< Event generated */
+
+/* Register: USBD_EVENTS_SOF */
+/* Description: Signals that a SOF (start of frame) condition has been detected on USB lines */
+
+/* Bit 0 : Signals that a SOF (start of frame) condition has been detected on USB lines */
+#define USBD_EVENTS_SOF_EVENTS_SOF_Pos (0UL) /*!< Position of EVENTS_SOF field. */
+#define USBD_EVENTS_SOF_EVENTS_SOF_Msk (0x1UL << USBD_EVENTS_SOF_EVENTS_SOF_Pos) /*!< Bit mask of EVENTS_SOF field. */
+#define USBD_EVENTS_SOF_EVENTS_SOF_NotGenerated (0UL) /*!< Event not generated */
+#define USBD_EVENTS_SOF_EVENTS_SOF_Generated (1UL) /*!< Event generated */
+
+/* Register: USBD_EVENTS_USBEVENT */
+/* Description: An event or an error not covered by specific events has occurred. Check EVENTCAUSE register to find the cause. */
+
+/* Bit 0 : An event or an error not covered by specific events has occurred. Check EVENTCAUSE register to find the cause. */
+#define USBD_EVENTS_USBEVENT_EVENTS_USBEVENT_Pos (0UL) /*!< Position of EVENTS_USBEVENT field. */
+#define USBD_EVENTS_USBEVENT_EVENTS_USBEVENT_Msk (0x1UL << USBD_EVENTS_USBEVENT_EVENTS_USBEVENT_Pos) /*!< Bit mask of EVENTS_USBEVENT field. */
+#define USBD_EVENTS_USBEVENT_EVENTS_USBEVENT_NotGenerated (0UL) /*!< Event not generated */
+#define USBD_EVENTS_USBEVENT_EVENTS_USBEVENT_Generated (1UL) /*!< Event generated */
+
+/* Register: USBD_EVENTS_EP0SETUP */
+/* Description: A valid SETUP token has been received (and acknowledged) on the control endpoint */
+
+/* Bit 0 : A valid SETUP token has been received (and acknowledged) on the control endpoint */
+#define USBD_EVENTS_EP0SETUP_EVENTS_EP0SETUP_Pos (0UL) /*!< Position of EVENTS_EP0SETUP field. */
+#define USBD_EVENTS_EP0SETUP_EVENTS_EP0SETUP_Msk (0x1UL << USBD_EVENTS_EP0SETUP_EVENTS_EP0SETUP_Pos) /*!< Bit mask of EVENTS_EP0SETUP field. */
+#define USBD_EVENTS_EP0SETUP_EVENTS_EP0SETUP_NotGenerated (0UL) /*!< Event not generated */
+#define USBD_EVENTS_EP0SETUP_EVENTS_EP0SETUP_Generated (1UL) /*!< Event generated */
+
+/* Register: USBD_EVENTS_EPDATA */
+/* Description: A data transfer has occurred on a data endpoint, indicated by the EPDATASTATUS register */
+
+/* Bit 0 : A data transfer has occurred on a data endpoint, indicated by the EPDATASTATUS register */
+#define USBD_EVENTS_EPDATA_EVENTS_EPDATA_Pos (0UL) /*!< Position of EVENTS_EPDATA field. */
+#define USBD_EVENTS_EPDATA_EVENTS_EPDATA_Msk (0x1UL << USBD_EVENTS_EPDATA_EVENTS_EPDATA_Pos) /*!< Bit mask of EVENTS_EPDATA field. */
+#define USBD_EVENTS_EPDATA_EVENTS_EPDATA_NotGenerated (0UL) /*!< Event not generated */
+#define USBD_EVENTS_EPDATA_EVENTS_EPDATA_Generated (1UL) /*!< Event generated */
+
+/* Register: USBD_SHORTS */
+/* Description: Shortcuts between local events and tasks */
+
+/* Bit 4 : Shortcut between event ENDEPOUT[0] and task EP0RCVOUT */
+#define USBD_SHORTS_ENDEPOUT0_EP0RCVOUT_Pos (4UL) /*!< Position of ENDEPOUT0_EP0RCVOUT field. */
+#define USBD_SHORTS_ENDEPOUT0_EP0RCVOUT_Msk (0x1UL << USBD_SHORTS_ENDEPOUT0_EP0RCVOUT_Pos) /*!< Bit mask of ENDEPOUT0_EP0RCVOUT field. */
+#define USBD_SHORTS_ENDEPOUT0_EP0RCVOUT_Disabled (0UL) /*!< Disable shortcut */
+#define USBD_SHORTS_ENDEPOUT0_EP0RCVOUT_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 3 : Shortcut between event ENDEPOUT[0] and task EP0STATUS */
+#define USBD_SHORTS_ENDEPOUT0_EP0STATUS_Pos (3UL) /*!< Position of ENDEPOUT0_EP0STATUS field. */
+#define USBD_SHORTS_ENDEPOUT0_EP0STATUS_Msk (0x1UL << USBD_SHORTS_ENDEPOUT0_EP0STATUS_Pos) /*!< Bit mask of ENDEPOUT0_EP0STATUS field. */
+#define USBD_SHORTS_ENDEPOUT0_EP0STATUS_Disabled (0UL) /*!< Disable shortcut */
+#define USBD_SHORTS_ENDEPOUT0_EP0STATUS_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 2 : Shortcut between event EP0DATADONE and task EP0STATUS */
+#define USBD_SHORTS_EP0DATADONE_EP0STATUS_Pos (2UL) /*!< Position of EP0DATADONE_EP0STATUS field. */
+#define USBD_SHORTS_EP0DATADONE_EP0STATUS_Msk (0x1UL << USBD_SHORTS_EP0DATADONE_EP0STATUS_Pos) /*!< Bit mask of EP0DATADONE_EP0STATUS field. */
+#define USBD_SHORTS_EP0DATADONE_EP0STATUS_Disabled (0UL) /*!< Disable shortcut */
+#define USBD_SHORTS_EP0DATADONE_EP0STATUS_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 1 : Shortcut between event EP0DATADONE and task STARTEPOUT[0] */
+#define USBD_SHORTS_EP0DATADONE_STARTEPOUT0_Pos (1UL) /*!< Position of EP0DATADONE_STARTEPOUT0 field. */
+#define USBD_SHORTS_EP0DATADONE_STARTEPOUT0_Msk (0x1UL << USBD_SHORTS_EP0DATADONE_STARTEPOUT0_Pos) /*!< Bit mask of EP0DATADONE_STARTEPOUT0 field. */
+#define USBD_SHORTS_EP0DATADONE_STARTEPOUT0_Disabled (0UL) /*!< Disable shortcut */
+#define USBD_SHORTS_EP0DATADONE_STARTEPOUT0_Enabled (1UL) /*!< Enable shortcut */
+
+/* Bit 0 : Shortcut between event EP0DATADONE and task STARTEPIN[0] */
+#define USBD_SHORTS_EP0DATADONE_STARTEPIN0_Pos (0UL) /*!< Position of EP0DATADONE_STARTEPIN0 field. */
+#define USBD_SHORTS_EP0DATADONE_STARTEPIN0_Msk (0x1UL << USBD_SHORTS_EP0DATADONE_STARTEPIN0_Pos) /*!< Bit mask of EP0DATADONE_STARTEPIN0 field. */
+#define USBD_SHORTS_EP0DATADONE_STARTEPIN0_Disabled (0UL) /*!< Disable shortcut */
+#define USBD_SHORTS_EP0DATADONE_STARTEPIN0_Enabled (1UL) /*!< Enable shortcut */
+
+/* Register: USBD_INTEN */
+/* Description: Enable or disable interrupt */
+
+/* Bit 24 : Enable or disable interrupt for event EPDATA */
+#define USBD_INTEN_EPDATA_Pos (24UL) /*!< Position of EPDATA field. */
+#define USBD_INTEN_EPDATA_Msk (0x1UL << USBD_INTEN_EPDATA_Pos) /*!< Bit mask of EPDATA field. */
+#define USBD_INTEN_EPDATA_Disabled (0UL) /*!< Disable */
+#define USBD_INTEN_EPDATA_Enabled (1UL) /*!< Enable */
+
+/* Bit 23 : Enable or disable interrupt for event EP0SETUP */
+#define USBD_INTEN_EP0SETUP_Pos (23UL) /*!< Position of EP0SETUP field. */
+#define USBD_INTEN_EP0SETUP_Msk (0x1UL << USBD_INTEN_EP0SETUP_Pos) /*!< Bit mask of EP0SETUP field. */
+#define USBD_INTEN_EP0SETUP_Disabled (0UL) /*!< Disable */
+#define USBD_INTEN_EP0SETUP_Enabled (1UL) /*!< Enable */
+
+/* Bit 22 : Enable or disable interrupt for event USBEVENT */
+#define USBD_INTEN_USBEVENT_Pos (22UL) /*!< Position of USBEVENT field. */
+#define USBD_INTEN_USBEVENT_Msk (0x1UL << USBD_INTEN_USBEVENT_Pos) /*!< Bit mask of USBEVENT field. */
+#define USBD_INTEN_USBEVENT_Disabled (0UL) /*!< Disable */
+#define USBD_INTEN_USBEVENT_Enabled (1UL) /*!< Enable */
+
+/* Bit 21 : Enable or disable interrupt for event SOF */
+#define USBD_INTEN_SOF_Pos (21UL) /*!< Position of SOF field. */
+#define USBD_INTEN_SOF_Msk (0x1UL << USBD_INTEN_SOF_Pos) /*!< Bit mask of SOF field. */
+#define USBD_INTEN_SOF_Disabled (0UL) /*!< Disable */
+#define USBD_INTEN_SOF_Enabled (1UL) /*!< Enable */
+
+/* Bit 20 : Enable or disable interrupt for event ENDISOOUT */
+#define USBD_INTEN_ENDISOOUT_Pos (20UL) /*!< Position of ENDISOOUT field. */
+#define USBD_INTEN_ENDISOOUT_Msk (0x1UL << USBD_INTEN_ENDISOOUT_Pos) /*!< Bit mask of ENDISOOUT field. */
+#define USBD_INTEN_ENDISOOUT_Disabled (0UL) /*!< Disable */
+#define USBD_INTEN_ENDISOOUT_Enabled (1UL) /*!< Enable */
+
+/* Bit 19 : Enable or disable interrupt for event ENDEPOUT[7] */
+#define USBD_INTEN_ENDEPOUT7_Pos (19UL) /*!< Position of ENDEPOUT7 field. */
+#define USBD_INTEN_ENDEPOUT7_Msk (0x1UL << USBD_INTEN_ENDEPOUT7_Pos) /*!< Bit mask of ENDEPOUT7 field. */
+#define USBD_INTEN_ENDEPOUT7_Disabled (0UL) /*!< Disable */
+#define USBD_INTEN_ENDEPOUT7_Enabled (1UL) /*!< Enable */
+
+/* Bit 18 : Enable or disable interrupt for event ENDEPOUT[6] */
+#define USBD_INTEN_ENDEPOUT6_Pos (18UL) /*!< Position of ENDEPOUT6 field. */
+#define USBD_INTEN_ENDEPOUT6_Msk (0x1UL << USBD_INTEN_ENDEPOUT6_Pos) /*!< Bit mask of ENDEPOUT6 field. */
+#define USBD_INTEN_ENDEPOUT6_Disabled (0UL) /*!< Disable */
+#define USBD_INTEN_ENDEPOUT6_Enabled (1UL) /*!< Enable */
+
+/* Bit 17 : Enable or disable interrupt for event ENDEPOUT[5] */
+#define USBD_INTEN_ENDEPOUT5_Pos (17UL) /*!< Position of ENDEPOUT5 field. */
+#define USBD_INTEN_ENDEPOUT5_Msk (0x1UL << USBD_INTEN_ENDEPOUT5_Pos) /*!< Bit mask of ENDEPOUT5 field. */
+#define USBD_INTEN_ENDEPOUT5_Disabled (0UL) /*!< Disable */
+#define USBD_INTEN_ENDEPOUT5_Enabled (1UL) /*!< Enable */
+
+/* Bit 16 : Enable or disable interrupt for event ENDEPOUT[4] */
+#define USBD_INTEN_ENDEPOUT4_Pos (16UL) /*!< Position of ENDEPOUT4 field. */
+#define USBD_INTEN_ENDEPOUT4_Msk (0x1UL << USBD_INTEN_ENDEPOUT4_Pos) /*!< Bit mask of ENDEPOUT4 field. */
+#define USBD_INTEN_ENDEPOUT4_Disabled (0UL) /*!< Disable */
+#define USBD_INTEN_ENDEPOUT4_Enabled (1UL) /*!< Enable */
+
+/* Bit 15 : Enable or disable interrupt for event ENDEPOUT[3] */
+#define USBD_INTEN_ENDEPOUT3_Pos (15UL) /*!< Position of ENDEPOUT3 field. */
+#define USBD_INTEN_ENDEPOUT3_Msk (0x1UL << USBD_INTEN_ENDEPOUT3_Pos) /*!< Bit mask of ENDEPOUT3 field. */
+#define USBD_INTEN_ENDEPOUT3_Disabled (0UL) /*!< Disable */
+#define USBD_INTEN_ENDEPOUT3_Enabled (1UL) /*!< Enable */
+
+/* Bit 14 : Enable or disable interrupt for event ENDEPOUT[2] */
+#define USBD_INTEN_ENDEPOUT2_Pos (14UL) /*!< Position of ENDEPOUT2 field. */
+#define USBD_INTEN_ENDEPOUT2_Msk (0x1UL << USBD_INTEN_ENDEPOUT2_Pos) /*!< Bit mask of ENDEPOUT2 field. */
+#define USBD_INTEN_ENDEPOUT2_Disabled (0UL) /*!< Disable */
+#define USBD_INTEN_ENDEPOUT2_Enabled (1UL) /*!< Enable */
+
+/* Bit 13 : Enable or disable interrupt for event ENDEPOUT[1] */
+#define USBD_INTEN_ENDEPOUT1_Pos (13UL) /*!< Position of ENDEPOUT1 field. */
+#define USBD_INTEN_ENDEPOUT1_Msk (0x1UL << USBD_INTEN_ENDEPOUT1_Pos) /*!< Bit mask of ENDEPOUT1 field. */
+#define USBD_INTEN_ENDEPOUT1_Disabled (0UL) /*!< Disable */
+#define USBD_INTEN_ENDEPOUT1_Enabled (1UL) /*!< Enable */
+
+/* Bit 12 : Enable or disable interrupt for event ENDEPOUT[0] */
+#define USBD_INTEN_ENDEPOUT0_Pos (12UL) /*!< Position of ENDEPOUT0 field. */
+#define USBD_INTEN_ENDEPOUT0_Msk (0x1UL << USBD_INTEN_ENDEPOUT0_Pos) /*!< Bit mask of ENDEPOUT0 field. */
+#define USBD_INTEN_ENDEPOUT0_Disabled (0UL) /*!< Disable */
+#define USBD_INTEN_ENDEPOUT0_Enabled (1UL) /*!< Enable */
+
+/* Bit 11 : Enable or disable interrupt for event ENDISOIN */
+#define USBD_INTEN_ENDISOIN_Pos (11UL) /*!< Position of ENDISOIN field. */
+#define USBD_INTEN_ENDISOIN_Msk (0x1UL << USBD_INTEN_ENDISOIN_Pos) /*!< Bit mask of ENDISOIN field. */
+#define USBD_INTEN_ENDISOIN_Disabled (0UL) /*!< Disable */
+#define USBD_INTEN_ENDISOIN_Enabled (1UL) /*!< Enable */
+
+/* Bit 10 : Enable or disable interrupt for event EP0DATADONE */
+#define USBD_INTEN_EP0DATADONE_Pos (10UL) /*!< Position of EP0DATADONE field. */
+#define USBD_INTEN_EP0DATADONE_Msk (0x1UL << USBD_INTEN_EP0DATADONE_Pos) /*!< Bit mask of EP0DATADONE field. */
+#define USBD_INTEN_EP0DATADONE_Disabled (0UL) /*!< Disable */
+#define USBD_INTEN_EP0DATADONE_Enabled (1UL) /*!< Enable */
+
+/* Bit 9 : Enable or disable interrupt for event ENDEPIN[7] */
+#define USBD_INTEN_ENDEPIN7_Pos (9UL) /*!< Position of ENDEPIN7 field. */
+#define USBD_INTEN_ENDEPIN7_Msk (0x1UL << USBD_INTEN_ENDEPIN7_Pos) /*!< Bit mask of ENDEPIN7 field. */
+#define USBD_INTEN_ENDEPIN7_Disabled (0UL) /*!< Disable */
+#define USBD_INTEN_ENDEPIN7_Enabled (1UL) /*!< Enable */
+
+/* Bit 8 : Enable or disable interrupt for event ENDEPIN[6] */
+#define USBD_INTEN_ENDEPIN6_Pos (8UL) /*!< Position of ENDEPIN6 field. */
+#define USBD_INTEN_ENDEPIN6_Msk (0x1UL << USBD_INTEN_ENDEPIN6_Pos) /*!< Bit mask of ENDEPIN6 field. */
+#define USBD_INTEN_ENDEPIN6_Disabled (0UL) /*!< Disable */
+#define USBD_INTEN_ENDEPIN6_Enabled (1UL) /*!< Enable */
+
+/* Bit 7 : Enable or disable interrupt for event ENDEPIN[5] */
+#define USBD_INTEN_ENDEPIN5_Pos (7UL) /*!< Position of ENDEPIN5 field. */
+#define USBD_INTEN_ENDEPIN5_Msk (0x1UL << USBD_INTEN_ENDEPIN5_Pos) /*!< Bit mask of ENDEPIN5 field. */
+#define USBD_INTEN_ENDEPIN5_Disabled (0UL) /*!< Disable */
+#define USBD_INTEN_ENDEPIN5_Enabled (1UL) /*!< Enable */
+
+/* Bit 6 : Enable or disable interrupt for event ENDEPIN[4] */
+#define USBD_INTEN_ENDEPIN4_Pos (6UL) /*!< Position of ENDEPIN4 field. */
+#define USBD_INTEN_ENDEPIN4_Msk (0x1UL << USBD_INTEN_ENDEPIN4_Pos) /*!< Bit mask of ENDEPIN4 field. */
+#define USBD_INTEN_ENDEPIN4_Disabled (0UL) /*!< Disable */
+#define USBD_INTEN_ENDEPIN4_Enabled (1UL) /*!< Enable */
+
+/* Bit 5 : Enable or disable interrupt for event ENDEPIN[3] */
+#define USBD_INTEN_ENDEPIN3_Pos (5UL) /*!< Position of ENDEPIN3 field. */
+#define USBD_INTEN_ENDEPIN3_Msk (0x1UL << USBD_INTEN_ENDEPIN3_Pos) /*!< Bit mask of ENDEPIN3 field. */
+#define USBD_INTEN_ENDEPIN3_Disabled (0UL) /*!< Disable */
+#define USBD_INTEN_ENDEPIN3_Enabled (1UL) /*!< Enable */
+
+/* Bit 4 : Enable or disable interrupt for event ENDEPIN[2] */
+#define USBD_INTEN_ENDEPIN2_Pos (4UL) /*!< Position of ENDEPIN2 field. */
+#define USBD_INTEN_ENDEPIN2_Msk (0x1UL << USBD_INTEN_ENDEPIN2_Pos) /*!< Bit mask of ENDEPIN2 field. */
+#define USBD_INTEN_ENDEPIN2_Disabled (0UL) /*!< Disable */
+#define USBD_INTEN_ENDEPIN2_Enabled (1UL) /*!< Enable */
+
+/* Bit 3 : Enable or disable interrupt for event ENDEPIN[1] */
+#define USBD_INTEN_ENDEPIN1_Pos (3UL) /*!< Position of ENDEPIN1 field. */
+#define USBD_INTEN_ENDEPIN1_Msk (0x1UL << USBD_INTEN_ENDEPIN1_Pos) /*!< Bit mask of ENDEPIN1 field. */
+#define USBD_INTEN_ENDEPIN1_Disabled (0UL) /*!< Disable */
+#define USBD_INTEN_ENDEPIN1_Enabled (1UL) /*!< Enable */
+
+/* Bit 2 : Enable or disable interrupt for event ENDEPIN[0] */
+#define USBD_INTEN_ENDEPIN0_Pos (2UL) /*!< Position of ENDEPIN0 field. */
+#define USBD_INTEN_ENDEPIN0_Msk (0x1UL << USBD_INTEN_ENDEPIN0_Pos) /*!< Bit mask of ENDEPIN0 field. */
+#define USBD_INTEN_ENDEPIN0_Disabled (0UL) /*!< Disable */
+#define USBD_INTEN_ENDEPIN0_Enabled (1UL) /*!< Enable */
+
+/* Bit 1 : Enable or disable interrupt for event STARTED */
+#define USBD_INTEN_STARTED_Pos (1UL) /*!< Position of STARTED field. */
+#define USBD_INTEN_STARTED_Msk (0x1UL << USBD_INTEN_STARTED_Pos) /*!< Bit mask of STARTED field. */
+#define USBD_INTEN_STARTED_Disabled (0UL) /*!< Disable */
+#define USBD_INTEN_STARTED_Enabled (1UL) /*!< Enable */
+
+/* Bit 0 : Enable or disable interrupt for event USBRESET */
+#define USBD_INTEN_USBRESET_Pos (0UL) /*!< Position of USBRESET field. */
+#define USBD_INTEN_USBRESET_Msk (0x1UL << USBD_INTEN_USBRESET_Pos) /*!< Bit mask of USBRESET field. */
+#define USBD_INTEN_USBRESET_Disabled (0UL) /*!< Disable */
+#define USBD_INTEN_USBRESET_Enabled (1UL) /*!< Enable */
+
+/* Register: USBD_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 24 : Write '1' to enable interrupt for event EPDATA */
+#define USBD_INTENSET_EPDATA_Pos (24UL) /*!< Position of EPDATA field. */
+#define USBD_INTENSET_EPDATA_Msk (0x1UL << USBD_INTENSET_EPDATA_Pos) /*!< Bit mask of EPDATA field. */
+#define USBD_INTENSET_EPDATA_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENSET_EPDATA_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENSET_EPDATA_Set (1UL) /*!< Enable */
+
+/* Bit 23 : Write '1' to enable interrupt for event EP0SETUP */
+#define USBD_INTENSET_EP0SETUP_Pos (23UL) /*!< Position of EP0SETUP field. */
+#define USBD_INTENSET_EP0SETUP_Msk (0x1UL << USBD_INTENSET_EP0SETUP_Pos) /*!< Bit mask of EP0SETUP field. */
+#define USBD_INTENSET_EP0SETUP_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENSET_EP0SETUP_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENSET_EP0SETUP_Set (1UL) /*!< Enable */
+
+/* Bit 22 : Write '1' to enable interrupt for event USBEVENT */
+#define USBD_INTENSET_USBEVENT_Pos (22UL) /*!< Position of USBEVENT field. */
+#define USBD_INTENSET_USBEVENT_Msk (0x1UL << USBD_INTENSET_USBEVENT_Pos) /*!< Bit mask of USBEVENT field. */
+#define USBD_INTENSET_USBEVENT_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENSET_USBEVENT_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENSET_USBEVENT_Set (1UL) /*!< Enable */
+
+/* Bit 21 : Write '1' to enable interrupt for event SOF */
+#define USBD_INTENSET_SOF_Pos (21UL) /*!< Position of SOF field. */
+#define USBD_INTENSET_SOF_Msk (0x1UL << USBD_INTENSET_SOF_Pos) /*!< Bit mask of SOF field. */
+#define USBD_INTENSET_SOF_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENSET_SOF_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENSET_SOF_Set (1UL) /*!< Enable */
+
+/* Bit 20 : Write '1' to enable interrupt for event ENDISOOUT */
+#define USBD_INTENSET_ENDISOOUT_Pos (20UL) /*!< Position of ENDISOOUT field. */
+#define USBD_INTENSET_ENDISOOUT_Msk (0x1UL << USBD_INTENSET_ENDISOOUT_Pos) /*!< Bit mask of ENDISOOUT field. */
+#define USBD_INTENSET_ENDISOOUT_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENSET_ENDISOOUT_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENSET_ENDISOOUT_Set (1UL) /*!< Enable */
+
+/* Bit 19 : Write '1' to enable interrupt for event ENDEPOUT[7] */
+#define USBD_INTENSET_ENDEPOUT7_Pos (19UL) /*!< Position of ENDEPOUT7 field. */
+#define USBD_INTENSET_ENDEPOUT7_Msk (0x1UL << USBD_INTENSET_ENDEPOUT7_Pos) /*!< Bit mask of ENDEPOUT7 field. */
+#define USBD_INTENSET_ENDEPOUT7_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENSET_ENDEPOUT7_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENSET_ENDEPOUT7_Set (1UL) /*!< Enable */
+
+/* Bit 18 : Write '1' to enable interrupt for event ENDEPOUT[6] */
+#define USBD_INTENSET_ENDEPOUT6_Pos (18UL) /*!< Position of ENDEPOUT6 field. */
+#define USBD_INTENSET_ENDEPOUT6_Msk (0x1UL << USBD_INTENSET_ENDEPOUT6_Pos) /*!< Bit mask of ENDEPOUT6 field. */
+#define USBD_INTENSET_ENDEPOUT6_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENSET_ENDEPOUT6_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENSET_ENDEPOUT6_Set (1UL) /*!< Enable */
+
+/* Bit 17 : Write '1' to enable interrupt for event ENDEPOUT[5] */
+#define USBD_INTENSET_ENDEPOUT5_Pos (17UL) /*!< Position of ENDEPOUT5 field. */
+#define USBD_INTENSET_ENDEPOUT5_Msk (0x1UL << USBD_INTENSET_ENDEPOUT5_Pos) /*!< Bit mask of ENDEPOUT5 field. */
+#define USBD_INTENSET_ENDEPOUT5_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENSET_ENDEPOUT5_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENSET_ENDEPOUT5_Set (1UL) /*!< Enable */
+
+/* Bit 16 : Write '1' to enable interrupt for event ENDEPOUT[4] */
+#define USBD_INTENSET_ENDEPOUT4_Pos (16UL) /*!< Position of ENDEPOUT4 field. */
+#define USBD_INTENSET_ENDEPOUT4_Msk (0x1UL << USBD_INTENSET_ENDEPOUT4_Pos) /*!< Bit mask of ENDEPOUT4 field. */
+#define USBD_INTENSET_ENDEPOUT4_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENSET_ENDEPOUT4_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENSET_ENDEPOUT4_Set (1UL) /*!< Enable */
+
+/* Bit 15 : Write '1' to enable interrupt for event ENDEPOUT[3] */
+#define USBD_INTENSET_ENDEPOUT3_Pos (15UL) /*!< Position of ENDEPOUT3 field. */
+#define USBD_INTENSET_ENDEPOUT3_Msk (0x1UL << USBD_INTENSET_ENDEPOUT3_Pos) /*!< Bit mask of ENDEPOUT3 field. */
+#define USBD_INTENSET_ENDEPOUT3_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENSET_ENDEPOUT3_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENSET_ENDEPOUT3_Set (1UL) /*!< Enable */
+
+/* Bit 14 : Write '1' to enable interrupt for event ENDEPOUT[2] */
+#define USBD_INTENSET_ENDEPOUT2_Pos (14UL) /*!< Position of ENDEPOUT2 field. */
+#define USBD_INTENSET_ENDEPOUT2_Msk (0x1UL << USBD_INTENSET_ENDEPOUT2_Pos) /*!< Bit mask of ENDEPOUT2 field. */
+#define USBD_INTENSET_ENDEPOUT2_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENSET_ENDEPOUT2_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENSET_ENDEPOUT2_Set (1UL) /*!< Enable */
+
+/* Bit 13 : Write '1' to enable interrupt for event ENDEPOUT[1] */
+#define USBD_INTENSET_ENDEPOUT1_Pos (13UL) /*!< Position of ENDEPOUT1 field. */
+#define USBD_INTENSET_ENDEPOUT1_Msk (0x1UL << USBD_INTENSET_ENDEPOUT1_Pos) /*!< Bit mask of ENDEPOUT1 field. */
+#define USBD_INTENSET_ENDEPOUT1_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENSET_ENDEPOUT1_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENSET_ENDEPOUT1_Set (1UL) /*!< Enable */
+
+/* Bit 12 : Write '1' to enable interrupt for event ENDEPOUT[0] */
+#define USBD_INTENSET_ENDEPOUT0_Pos (12UL) /*!< Position of ENDEPOUT0 field. */
+#define USBD_INTENSET_ENDEPOUT0_Msk (0x1UL << USBD_INTENSET_ENDEPOUT0_Pos) /*!< Bit mask of ENDEPOUT0 field. */
+#define USBD_INTENSET_ENDEPOUT0_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENSET_ENDEPOUT0_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENSET_ENDEPOUT0_Set (1UL) /*!< Enable */
+
+/* Bit 11 : Write '1' to enable interrupt for event ENDISOIN */
+#define USBD_INTENSET_ENDISOIN_Pos (11UL) /*!< Position of ENDISOIN field. */
+#define USBD_INTENSET_ENDISOIN_Msk (0x1UL << USBD_INTENSET_ENDISOIN_Pos) /*!< Bit mask of ENDISOIN field. */
+#define USBD_INTENSET_ENDISOIN_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENSET_ENDISOIN_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENSET_ENDISOIN_Set (1UL) /*!< Enable */
+
+/* Bit 10 : Write '1' to enable interrupt for event EP0DATADONE */
+#define USBD_INTENSET_EP0DATADONE_Pos (10UL) /*!< Position of EP0DATADONE field. */
+#define USBD_INTENSET_EP0DATADONE_Msk (0x1UL << USBD_INTENSET_EP0DATADONE_Pos) /*!< Bit mask of EP0DATADONE field. */
+#define USBD_INTENSET_EP0DATADONE_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENSET_EP0DATADONE_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENSET_EP0DATADONE_Set (1UL) /*!< Enable */
+
+/* Bit 9 : Write '1' to enable interrupt for event ENDEPIN[7] */
+#define USBD_INTENSET_ENDEPIN7_Pos (9UL) /*!< Position of ENDEPIN7 field. */
+#define USBD_INTENSET_ENDEPIN7_Msk (0x1UL << USBD_INTENSET_ENDEPIN7_Pos) /*!< Bit mask of ENDEPIN7 field. */
+#define USBD_INTENSET_ENDEPIN7_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENSET_ENDEPIN7_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENSET_ENDEPIN7_Set (1UL) /*!< Enable */
+
+/* Bit 8 : Write '1' to enable interrupt for event ENDEPIN[6] */
+#define USBD_INTENSET_ENDEPIN6_Pos (8UL) /*!< Position of ENDEPIN6 field. */
+#define USBD_INTENSET_ENDEPIN6_Msk (0x1UL << USBD_INTENSET_ENDEPIN6_Pos) /*!< Bit mask of ENDEPIN6 field. */
+#define USBD_INTENSET_ENDEPIN6_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENSET_ENDEPIN6_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENSET_ENDEPIN6_Set (1UL) /*!< Enable */
+
+/* Bit 7 : Write '1' to enable interrupt for event ENDEPIN[5] */
+#define USBD_INTENSET_ENDEPIN5_Pos (7UL) /*!< Position of ENDEPIN5 field. */
+#define USBD_INTENSET_ENDEPIN5_Msk (0x1UL << USBD_INTENSET_ENDEPIN5_Pos) /*!< Bit mask of ENDEPIN5 field. */
+#define USBD_INTENSET_ENDEPIN5_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENSET_ENDEPIN5_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENSET_ENDEPIN5_Set (1UL) /*!< Enable */
+
+/* Bit 6 : Write '1' to enable interrupt for event ENDEPIN[4] */
+#define USBD_INTENSET_ENDEPIN4_Pos (6UL) /*!< Position of ENDEPIN4 field. */
+#define USBD_INTENSET_ENDEPIN4_Msk (0x1UL << USBD_INTENSET_ENDEPIN4_Pos) /*!< Bit mask of ENDEPIN4 field. */
+#define USBD_INTENSET_ENDEPIN4_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENSET_ENDEPIN4_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENSET_ENDEPIN4_Set (1UL) /*!< Enable */
+
+/* Bit 5 : Write '1' to enable interrupt for event ENDEPIN[3] */
+#define USBD_INTENSET_ENDEPIN3_Pos (5UL) /*!< Position of ENDEPIN3 field. */
+#define USBD_INTENSET_ENDEPIN3_Msk (0x1UL << USBD_INTENSET_ENDEPIN3_Pos) /*!< Bit mask of ENDEPIN3 field. */
+#define USBD_INTENSET_ENDEPIN3_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENSET_ENDEPIN3_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENSET_ENDEPIN3_Set (1UL) /*!< Enable */
+
+/* Bit 4 : Write '1' to enable interrupt for event ENDEPIN[2] */
+#define USBD_INTENSET_ENDEPIN2_Pos (4UL) /*!< Position of ENDEPIN2 field. */
+#define USBD_INTENSET_ENDEPIN2_Msk (0x1UL << USBD_INTENSET_ENDEPIN2_Pos) /*!< Bit mask of ENDEPIN2 field. */
+#define USBD_INTENSET_ENDEPIN2_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENSET_ENDEPIN2_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENSET_ENDEPIN2_Set (1UL) /*!< Enable */
+
+/* Bit 3 : Write '1' to enable interrupt for event ENDEPIN[1] */
+#define USBD_INTENSET_ENDEPIN1_Pos (3UL) /*!< Position of ENDEPIN1 field. */
+#define USBD_INTENSET_ENDEPIN1_Msk (0x1UL << USBD_INTENSET_ENDEPIN1_Pos) /*!< Bit mask of ENDEPIN1 field. */
+#define USBD_INTENSET_ENDEPIN1_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENSET_ENDEPIN1_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENSET_ENDEPIN1_Set (1UL) /*!< Enable */
+
+/* Bit 2 : Write '1' to enable interrupt for event ENDEPIN[0] */
+#define USBD_INTENSET_ENDEPIN0_Pos (2UL) /*!< Position of ENDEPIN0 field. */
+#define USBD_INTENSET_ENDEPIN0_Msk (0x1UL << USBD_INTENSET_ENDEPIN0_Pos) /*!< Bit mask of ENDEPIN0 field. */
+#define USBD_INTENSET_ENDEPIN0_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENSET_ENDEPIN0_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENSET_ENDEPIN0_Set (1UL) /*!< Enable */
+
+/* Bit 1 : Write '1' to enable interrupt for event STARTED */
+#define USBD_INTENSET_STARTED_Pos (1UL) /*!< Position of STARTED field. */
+#define USBD_INTENSET_STARTED_Msk (0x1UL << USBD_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */
+#define USBD_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENSET_STARTED_Set (1UL) /*!< Enable */
+
+/* Bit 0 : Write '1' to enable interrupt for event USBRESET */
+#define USBD_INTENSET_USBRESET_Pos (0UL) /*!< Position of USBRESET field. */
+#define USBD_INTENSET_USBRESET_Msk (0x1UL << USBD_INTENSET_USBRESET_Pos) /*!< Bit mask of USBRESET field. */
+#define USBD_INTENSET_USBRESET_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENSET_USBRESET_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENSET_USBRESET_Set (1UL) /*!< Enable */
+
+/* Register: USBD_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 24 : Write '1' to disable interrupt for event EPDATA */
+#define USBD_INTENCLR_EPDATA_Pos (24UL) /*!< Position of EPDATA field. */
+#define USBD_INTENCLR_EPDATA_Msk (0x1UL << USBD_INTENCLR_EPDATA_Pos) /*!< Bit mask of EPDATA field. */
+#define USBD_INTENCLR_EPDATA_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENCLR_EPDATA_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENCLR_EPDATA_Clear (1UL) /*!< Disable */
+
+/* Bit 23 : Write '1' to disable interrupt for event EP0SETUP */
+#define USBD_INTENCLR_EP0SETUP_Pos (23UL) /*!< Position of EP0SETUP field. */
+#define USBD_INTENCLR_EP0SETUP_Msk (0x1UL << USBD_INTENCLR_EP0SETUP_Pos) /*!< Bit mask of EP0SETUP field. */
+#define USBD_INTENCLR_EP0SETUP_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENCLR_EP0SETUP_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENCLR_EP0SETUP_Clear (1UL) /*!< Disable */
+
+/* Bit 22 : Write '1' to disable interrupt for event USBEVENT */
+#define USBD_INTENCLR_USBEVENT_Pos (22UL) /*!< Position of USBEVENT field. */
+#define USBD_INTENCLR_USBEVENT_Msk (0x1UL << USBD_INTENCLR_USBEVENT_Pos) /*!< Bit mask of USBEVENT field. */
+#define USBD_INTENCLR_USBEVENT_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENCLR_USBEVENT_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENCLR_USBEVENT_Clear (1UL) /*!< Disable */
+
+/* Bit 21 : Write '1' to disable interrupt for event SOF */
+#define USBD_INTENCLR_SOF_Pos (21UL) /*!< Position of SOF field. */
+#define USBD_INTENCLR_SOF_Msk (0x1UL << USBD_INTENCLR_SOF_Pos) /*!< Bit mask of SOF field. */
+#define USBD_INTENCLR_SOF_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENCLR_SOF_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENCLR_SOF_Clear (1UL) /*!< Disable */
+
+/* Bit 20 : Write '1' to disable interrupt for event ENDISOOUT */
+#define USBD_INTENCLR_ENDISOOUT_Pos (20UL) /*!< Position of ENDISOOUT field. */
+#define USBD_INTENCLR_ENDISOOUT_Msk (0x1UL << USBD_INTENCLR_ENDISOOUT_Pos) /*!< Bit mask of ENDISOOUT field. */
+#define USBD_INTENCLR_ENDISOOUT_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENCLR_ENDISOOUT_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENCLR_ENDISOOUT_Clear (1UL) /*!< Disable */
+
+/* Bit 19 : Write '1' to disable interrupt for event ENDEPOUT[7] */
+#define USBD_INTENCLR_ENDEPOUT7_Pos (19UL) /*!< Position of ENDEPOUT7 field. */
+#define USBD_INTENCLR_ENDEPOUT7_Msk (0x1UL << USBD_INTENCLR_ENDEPOUT7_Pos) /*!< Bit mask of ENDEPOUT7 field. */
+#define USBD_INTENCLR_ENDEPOUT7_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENCLR_ENDEPOUT7_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENCLR_ENDEPOUT7_Clear (1UL) /*!< Disable */
+
+/* Bit 18 : Write '1' to disable interrupt for event ENDEPOUT[6] */
+#define USBD_INTENCLR_ENDEPOUT6_Pos (18UL) /*!< Position of ENDEPOUT6 field. */
+#define USBD_INTENCLR_ENDEPOUT6_Msk (0x1UL << USBD_INTENCLR_ENDEPOUT6_Pos) /*!< Bit mask of ENDEPOUT6 field. */
+#define USBD_INTENCLR_ENDEPOUT6_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENCLR_ENDEPOUT6_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENCLR_ENDEPOUT6_Clear (1UL) /*!< Disable */
+
+/* Bit 17 : Write '1' to disable interrupt for event ENDEPOUT[5] */
+#define USBD_INTENCLR_ENDEPOUT5_Pos (17UL) /*!< Position of ENDEPOUT5 field. */
+#define USBD_INTENCLR_ENDEPOUT5_Msk (0x1UL << USBD_INTENCLR_ENDEPOUT5_Pos) /*!< Bit mask of ENDEPOUT5 field. */
+#define USBD_INTENCLR_ENDEPOUT5_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENCLR_ENDEPOUT5_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENCLR_ENDEPOUT5_Clear (1UL) /*!< Disable */
+
+/* Bit 16 : Write '1' to disable interrupt for event ENDEPOUT[4] */
+#define USBD_INTENCLR_ENDEPOUT4_Pos (16UL) /*!< Position of ENDEPOUT4 field. */
+#define USBD_INTENCLR_ENDEPOUT4_Msk (0x1UL << USBD_INTENCLR_ENDEPOUT4_Pos) /*!< Bit mask of ENDEPOUT4 field. */
+#define USBD_INTENCLR_ENDEPOUT4_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENCLR_ENDEPOUT4_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENCLR_ENDEPOUT4_Clear (1UL) /*!< Disable */
+
+/* Bit 15 : Write '1' to disable interrupt for event ENDEPOUT[3] */
+#define USBD_INTENCLR_ENDEPOUT3_Pos (15UL) /*!< Position of ENDEPOUT3 field. */
+#define USBD_INTENCLR_ENDEPOUT3_Msk (0x1UL << USBD_INTENCLR_ENDEPOUT3_Pos) /*!< Bit mask of ENDEPOUT3 field. */
+#define USBD_INTENCLR_ENDEPOUT3_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENCLR_ENDEPOUT3_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENCLR_ENDEPOUT3_Clear (1UL) /*!< Disable */
+
+/* Bit 14 : Write '1' to disable interrupt for event ENDEPOUT[2] */
+#define USBD_INTENCLR_ENDEPOUT2_Pos (14UL) /*!< Position of ENDEPOUT2 field. */
+#define USBD_INTENCLR_ENDEPOUT2_Msk (0x1UL << USBD_INTENCLR_ENDEPOUT2_Pos) /*!< Bit mask of ENDEPOUT2 field. */
+#define USBD_INTENCLR_ENDEPOUT2_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENCLR_ENDEPOUT2_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENCLR_ENDEPOUT2_Clear (1UL) /*!< Disable */
+
+/* Bit 13 : Write '1' to disable interrupt for event ENDEPOUT[1] */
+#define USBD_INTENCLR_ENDEPOUT1_Pos (13UL) /*!< Position of ENDEPOUT1 field. */
+#define USBD_INTENCLR_ENDEPOUT1_Msk (0x1UL << USBD_INTENCLR_ENDEPOUT1_Pos) /*!< Bit mask of ENDEPOUT1 field. */
+#define USBD_INTENCLR_ENDEPOUT1_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENCLR_ENDEPOUT1_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENCLR_ENDEPOUT1_Clear (1UL) /*!< Disable */
+
+/* Bit 12 : Write '1' to disable interrupt for event ENDEPOUT[0] */
+#define USBD_INTENCLR_ENDEPOUT0_Pos (12UL) /*!< Position of ENDEPOUT0 field. */
+#define USBD_INTENCLR_ENDEPOUT0_Msk (0x1UL << USBD_INTENCLR_ENDEPOUT0_Pos) /*!< Bit mask of ENDEPOUT0 field. */
+#define USBD_INTENCLR_ENDEPOUT0_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENCLR_ENDEPOUT0_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENCLR_ENDEPOUT0_Clear (1UL) /*!< Disable */
+
+/* Bit 11 : Write '1' to disable interrupt for event ENDISOIN */
+#define USBD_INTENCLR_ENDISOIN_Pos (11UL) /*!< Position of ENDISOIN field. */
+#define USBD_INTENCLR_ENDISOIN_Msk (0x1UL << USBD_INTENCLR_ENDISOIN_Pos) /*!< Bit mask of ENDISOIN field. */
+#define USBD_INTENCLR_ENDISOIN_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENCLR_ENDISOIN_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENCLR_ENDISOIN_Clear (1UL) /*!< Disable */
+
+/* Bit 10 : Write '1' to disable interrupt for event EP0DATADONE */
+#define USBD_INTENCLR_EP0DATADONE_Pos (10UL) /*!< Position of EP0DATADONE field. */
+#define USBD_INTENCLR_EP0DATADONE_Msk (0x1UL << USBD_INTENCLR_EP0DATADONE_Pos) /*!< Bit mask of EP0DATADONE field. */
+#define USBD_INTENCLR_EP0DATADONE_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENCLR_EP0DATADONE_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENCLR_EP0DATADONE_Clear (1UL) /*!< Disable */
+
+/* Bit 9 : Write '1' to disable interrupt for event ENDEPIN[7] */
+#define USBD_INTENCLR_ENDEPIN7_Pos (9UL) /*!< Position of ENDEPIN7 field. */
+#define USBD_INTENCLR_ENDEPIN7_Msk (0x1UL << USBD_INTENCLR_ENDEPIN7_Pos) /*!< Bit mask of ENDEPIN7 field. */
+#define USBD_INTENCLR_ENDEPIN7_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENCLR_ENDEPIN7_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENCLR_ENDEPIN7_Clear (1UL) /*!< Disable */
+
+/* Bit 8 : Write '1' to disable interrupt for event ENDEPIN[6] */
+#define USBD_INTENCLR_ENDEPIN6_Pos (8UL) /*!< Position of ENDEPIN6 field. */
+#define USBD_INTENCLR_ENDEPIN6_Msk (0x1UL << USBD_INTENCLR_ENDEPIN6_Pos) /*!< Bit mask of ENDEPIN6 field. */
+#define USBD_INTENCLR_ENDEPIN6_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENCLR_ENDEPIN6_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENCLR_ENDEPIN6_Clear (1UL) /*!< Disable */
+
+/* Bit 7 : Write '1' to disable interrupt for event ENDEPIN[5] */
+#define USBD_INTENCLR_ENDEPIN5_Pos (7UL) /*!< Position of ENDEPIN5 field. */
+#define USBD_INTENCLR_ENDEPIN5_Msk (0x1UL << USBD_INTENCLR_ENDEPIN5_Pos) /*!< Bit mask of ENDEPIN5 field. */
+#define USBD_INTENCLR_ENDEPIN5_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENCLR_ENDEPIN5_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENCLR_ENDEPIN5_Clear (1UL) /*!< Disable */
+
+/* Bit 6 : Write '1' to disable interrupt for event ENDEPIN[4] */
+#define USBD_INTENCLR_ENDEPIN4_Pos (6UL) /*!< Position of ENDEPIN4 field. */
+#define USBD_INTENCLR_ENDEPIN4_Msk (0x1UL << USBD_INTENCLR_ENDEPIN4_Pos) /*!< Bit mask of ENDEPIN4 field. */
+#define USBD_INTENCLR_ENDEPIN4_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENCLR_ENDEPIN4_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENCLR_ENDEPIN4_Clear (1UL) /*!< Disable */
+
+/* Bit 5 : Write '1' to disable interrupt for event ENDEPIN[3] */
+#define USBD_INTENCLR_ENDEPIN3_Pos (5UL) /*!< Position of ENDEPIN3 field. */
+#define USBD_INTENCLR_ENDEPIN3_Msk (0x1UL << USBD_INTENCLR_ENDEPIN3_Pos) /*!< Bit mask of ENDEPIN3 field. */
+#define USBD_INTENCLR_ENDEPIN3_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENCLR_ENDEPIN3_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENCLR_ENDEPIN3_Clear (1UL) /*!< Disable */
+
+/* Bit 4 : Write '1' to disable interrupt for event ENDEPIN[2] */
+#define USBD_INTENCLR_ENDEPIN2_Pos (4UL) /*!< Position of ENDEPIN2 field. */
+#define USBD_INTENCLR_ENDEPIN2_Msk (0x1UL << USBD_INTENCLR_ENDEPIN2_Pos) /*!< Bit mask of ENDEPIN2 field. */
+#define USBD_INTENCLR_ENDEPIN2_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENCLR_ENDEPIN2_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENCLR_ENDEPIN2_Clear (1UL) /*!< Disable */
+
+/* Bit 3 : Write '1' to disable interrupt for event ENDEPIN[1] */
+#define USBD_INTENCLR_ENDEPIN1_Pos (3UL) /*!< Position of ENDEPIN1 field. */
+#define USBD_INTENCLR_ENDEPIN1_Msk (0x1UL << USBD_INTENCLR_ENDEPIN1_Pos) /*!< Bit mask of ENDEPIN1 field. */
+#define USBD_INTENCLR_ENDEPIN1_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENCLR_ENDEPIN1_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENCLR_ENDEPIN1_Clear (1UL) /*!< Disable */
+
+/* Bit 2 : Write '1' to disable interrupt for event ENDEPIN[0] */
+#define USBD_INTENCLR_ENDEPIN0_Pos (2UL) /*!< Position of ENDEPIN0 field. */
+#define USBD_INTENCLR_ENDEPIN0_Msk (0x1UL << USBD_INTENCLR_ENDEPIN0_Pos) /*!< Bit mask of ENDEPIN0 field. */
+#define USBD_INTENCLR_ENDEPIN0_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENCLR_ENDEPIN0_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENCLR_ENDEPIN0_Clear (1UL) /*!< Disable */
+
+/* Bit 1 : Write '1' to disable interrupt for event STARTED */
+#define USBD_INTENCLR_STARTED_Pos (1UL) /*!< Position of STARTED field. */
+#define USBD_INTENCLR_STARTED_Msk (0x1UL << USBD_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */
+#define USBD_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENCLR_STARTED_Clear (1UL) /*!< Disable */
+
+/* Bit 0 : Write '1' to disable interrupt for event USBRESET */
+#define USBD_INTENCLR_USBRESET_Pos (0UL) /*!< Position of USBRESET field. */
+#define USBD_INTENCLR_USBRESET_Msk (0x1UL << USBD_INTENCLR_USBRESET_Pos) /*!< Bit mask of USBRESET field. */
+#define USBD_INTENCLR_USBRESET_Disabled (0UL) /*!< Read: Disabled */
+#define USBD_INTENCLR_USBRESET_Enabled (1UL) /*!< Read: Enabled */
+#define USBD_INTENCLR_USBRESET_Clear (1UL) /*!< Disable */
+
+/* Register: USBD_EVENTCAUSE */
+/* Description: Details on what caused the USBEVENT event */
+
+/* Bit 11 : USB device is ready for normal operation. Write '1' to clear. */
+#define USBD_EVENTCAUSE_READY_Pos (11UL) /*!< Position of READY field. */
+#define USBD_EVENTCAUSE_READY_Msk (0x1UL << USBD_EVENTCAUSE_READY_Pos) /*!< Bit mask of READY field. */
+#define USBD_EVENTCAUSE_READY_NotDetected (0UL) /*!< USBEVENT was not issued due to USBD peripheral ready */
+#define USBD_EVENTCAUSE_READY_Ready (1UL) /*!< USBD peripheral is ready */
+
+/* Bit 10 : USB MAC has been woken up and operational. Write '1' to clear. */
+#define USBD_EVENTCAUSE_USBWUALLOWED_Pos (10UL) /*!< Position of USBWUALLOWED field. */
+#define USBD_EVENTCAUSE_USBWUALLOWED_Msk (0x1UL << USBD_EVENTCAUSE_USBWUALLOWED_Pos) /*!< Bit mask of USBWUALLOWED field. */
+#define USBD_EVENTCAUSE_USBWUALLOWED_NotAllowed (0UL) /*!< Wake up not allowed */
+#define USBD_EVENTCAUSE_USBWUALLOWED_Allowed (1UL) /*!< Wake up allowed */
+
+/* Bit 9 : Signals that a RESUME condition (K state or activity restart) has been detected on USB lines. Write '1' to clear. */
+#define USBD_EVENTCAUSE_RESUME_Pos (9UL) /*!< Position of RESUME field. */
+#define USBD_EVENTCAUSE_RESUME_Msk (0x1UL << USBD_EVENTCAUSE_RESUME_Pos) /*!< Bit mask of RESUME field. */
+#define USBD_EVENTCAUSE_RESUME_NotDetected (0UL) /*!< Resume not detected */
+#define USBD_EVENTCAUSE_RESUME_Detected (1UL) /*!< Resume detected */
+
+/* Bit 8 : Signals that USB lines have been idle long enough for the device to enter suspend. Write '1' to clear. */
+#define USBD_EVENTCAUSE_SUSPEND_Pos (8UL) /*!< Position of SUSPEND field. */
+#define USBD_EVENTCAUSE_SUSPEND_Msk (0x1UL << USBD_EVENTCAUSE_SUSPEND_Pos) /*!< Bit mask of SUSPEND field. */
+#define USBD_EVENTCAUSE_SUSPEND_NotDetected (0UL) /*!< Suspend not detected */
+#define USBD_EVENTCAUSE_SUSPEND_Detected (1UL) /*!< Suspend detected */
+
+/* Bit 0 : CRC error was detected on isochronous OUT endpoint 8. Write '1' to clear. */
+#define USBD_EVENTCAUSE_ISOOUTCRC_Pos (0UL) /*!< Position of ISOOUTCRC field. */
+#define USBD_EVENTCAUSE_ISOOUTCRC_Msk (0x1UL << USBD_EVENTCAUSE_ISOOUTCRC_Pos) /*!< Bit mask of ISOOUTCRC field. */
+#define USBD_EVENTCAUSE_ISOOUTCRC_NotDetected (0UL) /*!< No error detected */
+#define USBD_EVENTCAUSE_ISOOUTCRC_Detected (1UL) /*!< Error detected */
+
+/* Register: USBD_HALTED_EPIN */
+/* Description: Description collection: IN endpoint halted status. Can be used as is as response to a GetStatus() request to endpoint. */
+
+/* Bits 15..0 : IN endpoint halted status. Can be used as is as response to a GetStatus() request to endpoint. */
+#define USBD_HALTED_EPIN_GETSTATUS_Pos (0UL) /*!< Position of GETSTATUS field. */
+#define USBD_HALTED_EPIN_GETSTATUS_Msk (0xFFFFUL << USBD_HALTED_EPIN_GETSTATUS_Pos) /*!< Bit mask of GETSTATUS field. */
+#define USBD_HALTED_EPIN_GETSTATUS_NotHalted (0UL) /*!< Endpoint is not halted */
+#define USBD_HALTED_EPIN_GETSTATUS_Halted (1UL) /*!< Endpoint is halted */
+
+/* Register: USBD_HALTED_EPOUT */
+/* Description: Description collection: OUT endpoint halted status. Can be used as is as response to a GetStatus() request to endpoint. */
+
+/* Bits 15..0 : OUT endpoint halted status. Can be used as is as response to a GetStatus() request to endpoint. */
+#define USBD_HALTED_EPOUT_GETSTATUS_Pos (0UL) /*!< Position of GETSTATUS field. */
+#define USBD_HALTED_EPOUT_GETSTATUS_Msk (0xFFFFUL << USBD_HALTED_EPOUT_GETSTATUS_Pos) /*!< Bit mask of GETSTATUS field. */
+#define USBD_HALTED_EPOUT_GETSTATUS_NotHalted (0UL) /*!< Endpoint is not halted */
+#define USBD_HALTED_EPOUT_GETSTATUS_Halted (1UL) /*!< Endpoint is halted */
+
+/* Register: USBD_EPSTATUS */
+/* Description: Provides information on which endpoint's EasyDMA registers have been captured */
+
+/* Bit 24 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */
+#define USBD_EPSTATUS_EPOUT8_Pos (24UL) /*!< Position of EPOUT8 field. */
+#define USBD_EPSTATUS_EPOUT8_Msk (0x1UL << USBD_EPSTATUS_EPOUT8_Pos) /*!< Bit mask of EPOUT8 field. */
+#define USBD_EPSTATUS_EPOUT8_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */
+#define USBD_EPSTATUS_EPOUT8_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */
+
+/* Bit 23 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */
+#define USBD_EPSTATUS_EPOUT7_Pos (23UL) /*!< Position of EPOUT7 field. */
+#define USBD_EPSTATUS_EPOUT7_Msk (0x1UL << USBD_EPSTATUS_EPOUT7_Pos) /*!< Bit mask of EPOUT7 field. */
+#define USBD_EPSTATUS_EPOUT7_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */
+#define USBD_EPSTATUS_EPOUT7_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */
+
+/* Bit 22 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */
+#define USBD_EPSTATUS_EPOUT6_Pos (22UL) /*!< Position of EPOUT6 field. */
+#define USBD_EPSTATUS_EPOUT6_Msk (0x1UL << USBD_EPSTATUS_EPOUT6_Pos) /*!< Bit mask of EPOUT6 field. */
+#define USBD_EPSTATUS_EPOUT6_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */
+#define USBD_EPSTATUS_EPOUT6_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */
+
+/* Bit 21 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */
+#define USBD_EPSTATUS_EPOUT5_Pos (21UL) /*!< Position of EPOUT5 field. */
+#define USBD_EPSTATUS_EPOUT5_Msk (0x1UL << USBD_EPSTATUS_EPOUT5_Pos) /*!< Bit mask of EPOUT5 field. */
+#define USBD_EPSTATUS_EPOUT5_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */
+#define USBD_EPSTATUS_EPOUT5_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */
+
+/* Bit 20 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */
+#define USBD_EPSTATUS_EPOUT4_Pos (20UL) /*!< Position of EPOUT4 field. */
+#define USBD_EPSTATUS_EPOUT4_Msk (0x1UL << USBD_EPSTATUS_EPOUT4_Pos) /*!< Bit mask of EPOUT4 field. */
+#define USBD_EPSTATUS_EPOUT4_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */
+#define USBD_EPSTATUS_EPOUT4_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */
+
+/* Bit 19 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */
+#define USBD_EPSTATUS_EPOUT3_Pos (19UL) /*!< Position of EPOUT3 field. */
+#define USBD_EPSTATUS_EPOUT3_Msk (0x1UL << USBD_EPSTATUS_EPOUT3_Pos) /*!< Bit mask of EPOUT3 field. */
+#define USBD_EPSTATUS_EPOUT3_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */
+#define USBD_EPSTATUS_EPOUT3_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */
+
+/* Bit 18 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */
+#define USBD_EPSTATUS_EPOUT2_Pos (18UL) /*!< Position of EPOUT2 field. */
+#define USBD_EPSTATUS_EPOUT2_Msk (0x1UL << USBD_EPSTATUS_EPOUT2_Pos) /*!< Bit mask of EPOUT2 field. */
+#define USBD_EPSTATUS_EPOUT2_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */
+#define USBD_EPSTATUS_EPOUT2_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */
+
+/* Bit 17 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */
+#define USBD_EPSTATUS_EPOUT1_Pos (17UL) /*!< Position of EPOUT1 field. */
+#define USBD_EPSTATUS_EPOUT1_Msk (0x1UL << USBD_EPSTATUS_EPOUT1_Pos) /*!< Bit mask of EPOUT1 field. */
+#define USBD_EPSTATUS_EPOUT1_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */
+#define USBD_EPSTATUS_EPOUT1_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */
+
+/* Bit 16 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */
+#define USBD_EPSTATUS_EPOUT0_Pos (16UL) /*!< Position of EPOUT0 field. */
+#define USBD_EPSTATUS_EPOUT0_Msk (0x1UL << USBD_EPSTATUS_EPOUT0_Pos) /*!< Bit mask of EPOUT0 field. */
+#define USBD_EPSTATUS_EPOUT0_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */
+#define USBD_EPSTATUS_EPOUT0_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */
+
+/* Bit 8 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */
+#define USBD_EPSTATUS_EPIN8_Pos (8UL) /*!< Position of EPIN8 field. */
+#define USBD_EPSTATUS_EPIN8_Msk (0x1UL << USBD_EPSTATUS_EPIN8_Pos) /*!< Bit mask of EPIN8 field. */
+#define USBD_EPSTATUS_EPIN8_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */
+#define USBD_EPSTATUS_EPIN8_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */
+
+/* Bit 7 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */
+#define USBD_EPSTATUS_EPIN7_Pos (7UL) /*!< Position of EPIN7 field. */
+#define USBD_EPSTATUS_EPIN7_Msk (0x1UL << USBD_EPSTATUS_EPIN7_Pos) /*!< Bit mask of EPIN7 field. */
+#define USBD_EPSTATUS_EPIN7_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */
+#define USBD_EPSTATUS_EPIN7_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */
+
+/* Bit 6 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */
+#define USBD_EPSTATUS_EPIN6_Pos (6UL) /*!< Position of EPIN6 field. */
+#define USBD_EPSTATUS_EPIN6_Msk (0x1UL << USBD_EPSTATUS_EPIN6_Pos) /*!< Bit mask of EPIN6 field. */
+#define USBD_EPSTATUS_EPIN6_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */
+#define USBD_EPSTATUS_EPIN6_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */
+
+/* Bit 5 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */
+#define USBD_EPSTATUS_EPIN5_Pos (5UL) /*!< Position of EPIN5 field. */
+#define USBD_EPSTATUS_EPIN5_Msk (0x1UL << USBD_EPSTATUS_EPIN5_Pos) /*!< Bit mask of EPIN5 field. */
+#define USBD_EPSTATUS_EPIN5_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */
+#define USBD_EPSTATUS_EPIN5_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */
+
+/* Bit 4 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */
+#define USBD_EPSTATUS_EPIN4_Pos (4UL) /*!< Position of EPIN4 field. */
+#define USBD_EPSTATUS_EPIN4_Msk (0x1UL << USBD_EPSTATUS_EPIN4_Pos) /*!< Bit mask of EPIN4 field. */
+#define USBD_EPSTATUS_EPIN4_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */
+#define USBD_EPSTATUS_EPIN4_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */
+
+/* Bit 3 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */
+#define USBD_EPSTATUS_EPIN3_Pos (3UL) /*!< Position of EPIN3 field. */
+#define USBD_EPSTATUS_EPIN3_Msk (0x1UL << USBD_EPSTATUS_EPIN3_Pos) /*!< Bit mask of EPIN3 field. */
+#define USBD_EPSTATUS_EPIN3_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */
+#define USBD_EPSTATUS_EPIN3_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */
+
+/* Bit 2 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */
+#define USBD_EPSTATUS_EPIN2_Pos (2UL) /*!< Position of EPIN2 field. */
+#define USBD_EPSTATUS_EPIN2_Msk (0x1UL << USBD_EPSTATUS_EPIN2_Pos) /*!< Bit mask of EPIN2 field. */
+#define USBD_EPSTATUS_EPIN2_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */
+#define USBD_EPSTATUS_EPIN2_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */
+
+/* Bit 1 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */
+#define USBD_EPSTATUS_EPIN1_Pos (1UL) /*!< Position of EPIN1 field. */
+#define USBD_EPSTATUS_EPIN1_Msk (0x1UL << USBD_EPSTATUS_EPIN1_Pos) /*!< Bit mask of EPIN1 field. */
+#define USBD_EPSTATUS_EPIN1_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */
+#define USBD_EPSTATUS_EPIN1_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */
+
+/* Bit 0 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */
+#define USBD_EPSTATUS_EPIN0_Pos (0UL) /*!< Position of EPIN0 field. */
+#define USBD_EPSTATUS_EPIN0_Msk (0x1UL << USBD_EPSTATUS_EPIN0_Pos) /*!< Bit mask of EPIN0 field. */
+#define USBD_EPSTATUS_EPIN0_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */
+#define USBD_EPSTATUS_EPIN0_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */
+
+/* Register: USBD_EPDATASTATUS */
+/* Description: Provides information on which endpoint(s) an acknowledged data transfer has occurred (EPDATA event) */
+
+/* Bit 23 : Acknowledged data transfer on this OUT endpoint. Write '1' to clear. */
+#define USBD_EPDATASTATUS_EPOUT7_Pos (23UL) /*!< Position of EPOUT7 field. */
+#define USBD_EPDATASTATUS_EPOUT7_Msk (0x1UL << USBD_EPDATASTATUS_EPOUT7_Pos) /*!< Bit mask of EPOUT7 field. */
+#define USBD_EPDATASTATUS_EPOUT7_NotStarted (0UL) /*!< No acknowledged data transfer on this endpoint */
+#define USBD_EPDATASTATUS_EPOUT7_Started (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */
+
+/* Bit 22 : Acknowledged data transfer on this OUT endpoint. Write '1' to clear. */
+#define USBD_EPDATASTATUS_EPOUT6_Pos (22UL) /*!< Position of EPOUT6 field. */
+#define USBD_EPDATASTATUS_EPOUT6_Msk (0x1UL << USBD_EPDATASTATUS_EPOUT6_Pos) /*!< Bit mask of EPOUT6 field. */
+#define USBD_EPDATASTATUS_EPOUT6_NotStarted (0UL) /*!< No acknowledged data transfer on this endpoint */
+#define USBD_EPDATASTATUS_EPOUT6_Started (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */
+
+/* Bit 21 : Acknowledged data transfer on this OUT endpoint. Write '1' to clear. */
+#define USBD_EPDATASTATUS_EPOUT5_Pos (21UL) /*!< Position of EPOUT5 field. */
+#define USBD_EPDATASTATUS_EPOUT5_Msk (0x1UL << USBD_EPDATASTATUS_EPOUT5_Pos) /*!< Bit mask of EPOUT5 field. */
+#define USBD_EPDATASTATUS_EPOUT5_NotStarted (0UL) /*!< No acknowledged data transfer on this endpoint */
+#define USBD_EPDATASTATUS_EPOUT5_Started (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */
+
+/* Bit 20 : Acknowledged data transfer on this OUT endpoint. Write '1' to clear. */
+#define USBD_EPDATASTATUS_EPOUT4_Pos (20UL) /*!< Position of EPOUT4 field. */
+#define USBD_EPDATASTATUS_EPOUT4_Msk (0x1UL << USBD_EPDATASTATUS_EPOUT4_Pos) /*!< Bit mask of EPOUT4 field. */
+#define USBD_EPDATASTATUS_EPOUT4_NotStarted (0UL) /*!< No acknowledged data transfer on this endpoint */
+#define USBD_EPDATASTATUS_EPOUT4_Started (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */
+
+/* Bit 19 : Acknowledged data transfer on this OUT endpoint. Write '1' to clear. */
+#define USBD_EPDATASTATUS_EPOUT3_Pos (19UL) /*!< Position of EPOUT3 field. */
+#define USBD_EPDATASTATUS_EPOUT3_Msk (0x1UL << USBD_EPDATASTATUS_EPOUT3_Pos) /*!< Bit mask of EPOUT3 field. */
+#define USBD_EPDATASTATUS_EPOUT3_NotStarted (0UL) /*!< No acknowledged data transfer on this endpoint */
+#define USBD_EPDATASTATUS_EPOUT3_Started (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */
+
+/* Bit 18 : Acknowledged data transfer on this OUT endpoint. Write '1' to clear. */
+#define USBD_EPDATASTATUS_EPOUT2_Pos (18UL) /*!< Position of EPOUT2 field. */
+#define USBD_EPDATASTATUS_EPOUT2_Msk (0x1UL << USBD_EPDATASTATUS_EPOUT2_Pos) /*!< Bit mask of EPOUT2 field. */
+#define USBD_EPDATASTATUS_EPOUT2_NotStarted (0UL) /*!< No acknowledged data transfer on this endpoint */
+#define USBD_EPDATASTATUS_EPOUT2_Started (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */
+
+/* Bit 17 : Acknowledged data transfer on this OUT endpoint. Write '1' to clear. */
+#define USBD_EPDATASTATUS_EPOUT1_Pos (17UL) /*!< Position of EPOUT1 field. */
+#define USBD_EPDATASTATUS_EPOUT1_Msk (0x1UL << USBD_EPDATASTATUS_EPOUT1_Pos) /*!< Bit mask of EPOUT1 field. */
+#define USBD_EPDATASTATUS_EPOUT1_NotStarted (0UL) /*!< No acknowledged data transfer on this endpoint */
+#define USBD_EPDATASTATUS_EPOUT1_Started (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */
+
+/* Bit 7 : Acknowledged data transfer on this IN endpoint. Write '1' to clear. */
+#define USBD_EPDATASTATUS_EPIN7_Pos (7UL) /*!< Position of EPIN7 field. */
+#define USBD_EPDATASTATUS_EPIN7_Msk (0x1UL << USBD_EPDATASTATUS_EPIN7_Pos) /*!< Bit mask of EPIN7 field. */
+#define USBD_EPDATASTATUS_EPIN7_NotDone (0UL) /*!< No acknowledged data transfer on this endpoint */
+#define USBD_EPDATASTATUS_EPIN7_DataDone (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */
+
+/* Bit 6 : Acknowledged data transfer on this IN endpoint. Write '1' to clear. */
+#define USBD_EPDATASTATUS_EPIN6_Pos (6UL) /*!< Position of EPIN6 field. */
+#define USBD_EPDATASTATUS_EPIN6_Msk (0x1UL << USBD_EPDATASTATUS_EPIN6_Pos) /*!< Bit mask of EPIN6 field. */
+#define USBD_EPDATASTATUS_EPIN6_NotDone (0UL) /*!< No acknowledged data transfer on this endpoint */
+#define USBD_EPDATASTATUS_EPIN6_DataDone (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */
+
+/* Bit 5 : Acknowledged data transfer on this IN endpoint. Write '1' to clear. */
+#define USBD_EPDATASTATUS_EPIN5_Pos (5UL) /*!< Position of EPIN5 field. */
+#define USBD_EPDATASTATUS_EPIN5_Msk (0x1UL << USBD_EPDATASTATUS_EPIN5_Pos) /*!< Bit mask of EPIN5 field. */
+#define USBD_EPDATASTATUS_EPIN5_NotDone (0UL) /*!< No acknowledged data transfer on this endpoint */
+#define USBD_EPDATASTATUS_EPIN5_DataDone (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */
+
+/* Bit 4 : Acknowledged data transfer on this IN endpoint. Write '1' to clear. */
+#define USBD_EPDATASTATUS_EPIN4_Pos (4UL) /*!< Position of EPIN4 field. */
+#define USBD_EPDATASTATUS_EPIN4_Msk (0x1UL << USBD_EPDATASTATUS_EPIN4_Pos) /*!< Bit mask of EPIN4 field. */
+#define USBD_EPDATASTATUS_EPIN4_NotDone (0UL) /*!< No acknowledged data transfer on this endpoint */
+#define USBD_EPDATASTATUS_EPIN4_DataDone (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */
+
+/* Bit 3 : Acknowledged data transfer on this IN endpoint. Write '1' to clear. */
+#define USBD_EPDATASTATUS_EPIN3_Pos (3UL) /*!< Position of EPIN3 field. */
+#define USBD_EPDATASTATUS_EPIN3_Msk (0x1UL << USBD_EPDATASTATUS_EPIN3_Pos) /*!< Bit mask of EPIN3 field. */
+#define USBD_EPDATASTATUS_EPIN3_NotDone (0UL) /*!< No acknowledged data transfer on this endpoint */
+#define USBD_EPDATASTATUS_EPIN3_DataDone (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */
+
+/* Bit 2 : Acknowledged data transfer on this IN endpoint. Write '1' to clear. */
+#define USBD_EPDATASTATUS_EPIN2_Pos (2UL) /*!< Position of EPIN2 field. */
+#define USBD_EPDATASTATUS_EPIN2_Msk (0x1UL << USBD_EPDATASTATUS_EPIN2_Pos) /*!< Bit mask of EPIN2 field. */
+#define USBD_EPDATASTATUS_EPIN2_NotDone (0UL) /*!< No acknowledged data transfer on this endpoint */
+#define USBD_EPDATASTATUS_EPIN2_DataDone (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */
+
+/* Bit 1 : Acknowledged data transfer on this IN endpoint. Write '1' to clear. */
+#define USBD_EPDATASTATUS_EPIN1_Pos (1UL) /*!< Position of EPIN1 field. */
+#define USBD_EPDATASTATUS_EPIN1_Msk (0x1UL << USBD_EPDATASTATUS_EPIN1_Pos) /*!< Bit mask of EPIN1 field. */
+#define USBD_EPDATASTATUS_EPIN1_NotDone (0UL) /*!< No acknowledged data transfer on this endpoint */
+#define USBD_EPDATASTATUS_EPIN1_DataDone (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */
+
+/* Register: USBD_USBADDR */
+/* Description: Device USB address */
+
+/* Bits 6..0 : Device USB address */
+#define USBD_USBADDR_ADDR_Pos (0UL) /*!< Position of ADDR field. */
+#define USBD_USBADDR_ADDR_Msk (0x7FUL << USBD_USBADDR_ADDR_Pos) /*!< Bit mask of ADDR field. */
+
+/* Register: USBD_BMREQUESTTYPE */
+/* Description: SETUP data, byte 0, bmRequestType */
+
+/* Bit 7 : Data transfer direction */
+#define USBD_BMREQUESTTYPE_DIRECTION_Pos (7UL) /*!< Position of DIRECTION field. */
+#define USBD_BMREQUESTTYPE_DIRECTION_Msk (0x1UL << USBD_BMREQUESTTYPE_DIRECTION_Pos) /*!< Bit mask of DIRECTION field. */
+#define USBD_BMREQUESTTYPE_DIRECTION_HostToDevice (0UL) /*!< Host-to-device */
+#define USBD_BMREQUESTTYPE_DIRECTION_DeviceToHost (1UL) /*!< Device-to-host */
+
+/* Bits 6..5 : Data transfer type */
+#define USBD_BMREQUESTTYPE_TYPE_Pos (5UL) /*!< Position of TYPE field. */
+#define USBD_BMREQUESTTYPE_TYPE_Msk (0x3UL << USBD_BMREQUESTTYPE_TYPE_Pos) /*!< Bit mask of TYPE field. */
+#define USBD_BMREQUESTTYPE_TYPE_Standard (0UL) /*!< Standard */
+#define USBD_BMREQUESTTYPE_TYPE_Class (1UL) /*!< Class */
+#define USBD_BMREQUESTTYPE_TYPE_Vendor (2UL) /*!< Vendor */
+
+/* Bits 4..0 : Data transfer type */
+#define USBD_BMREQUESTTYPE_RECIPIENT_Pos (0UL) /*!< Position of RECIPIENT field. */
+#define USBD_BMREQUESTTYPE_RECIPIENT_Msk (0x1FUL << USBD_BMREQUESTTYPE_RECIPIENT_Pos) /*!< Bit mask of RECIPIENT field. */
+#define USBD_BMREQUESTTYPE_RECIPIENT_Device (0UL) /*!< Device */
+#define USBD_BMREQUESTTYPE_RECIPIENT_Interface (1UL) /*!< Interface */
+#define USBD_BMREQUESTTYPE_RECIPIENT_Endpoint (2UL) /*!< Endpoint */
+#define USBD_BMREQUESTTYPE_RECIPIENT_Other (3UL) /*!< Other */
+
+/* Register: USBD_BREQUEST */
+/* Description: SETUP data, byte 1, bRequest */
+
+/* Bits 7..0 : SETUP data, byte 1, bRequest. Values provided for standard requests only, user must implement class and vendor values. */
+#define USBD_BREQUEST_BREQUEST_Pos (0UL) /*!< Position of BREQUEST field. */
+#define USBD_BREQUEST_BREQUEST_Msk (0xFFUL << USBD_BREQUEST_BREQUEST_Pos) /*!< Bit mask of BREQUEST field. */
+#define USBD_BREQUEST_BREQUEST_STD_GET_STATUS (0UL) /*!< Standard request GET_STATUS */
+#define USBD_BREQUEST_BREQUEST_STD_CLEAR_FEATURE (1UL) /*!< Standard request CLEAR_FEATURE */
+#define USBD_BREQUEST_BREQUEST_STD_SET_FEATURE (3UL) /*!< Standard request SET_FEATURE */
+#define USBD_BREQUEST_BREQUEST_STD_SET_ADDRESS (5UL) /*!< Standard request SET_ADDRESS */
+#define USBD_BREQUEST_BREQUEST_STD_GET_DESCRIPTOR (6UL) /*!< Standard request GET_DESCRIPTOR */
+#define USBD_BREQUEST_BREQUEST_STD_SET_DESCRIPTOR (7UL) /*!< Standard request SET_DESCRIPTOR */
+#define USBD_BREQUEST_BREQUEST_STD_GET_CONFIGURATION (8UL) /*!< Standard request GET_CONFIGURATION */
+#define USBD_BREQUEST_BREQUEST_STD_SET_CONFIGURATION (9UL) /*!< Standard request SET_CONFIGURATION */
+#define USBD_BREQUEST_BREQUEST_STD_GET_INTERFACE (10UL) /*!< Standard request GET_INTERFACE */
+#define USBD_BREQUEST_BREQUEST_STD_SET_INTERFACE (11UL) /*!< Standard request SET_INTERFACE */
+#define USBD_BREQUEST_BREQUEST_STD_SYNCH_FRAME (12UL) /*!< Standard request SYNCH_FRAME */
+
+/* Register: USBD_WVALUEL */
+/* Description: SETUP data, byte 2, LSB of wValue */
+
+/* Bits 7..0 : SETUP data, byte 2, LSB of wValue */
+#define USBD_WVALUEL_WVALUEL_Pos (0UL) /*!< Position of WVALUEL field. */
+#define USBD_WVALUEL_WVALUEL_Msk (0xFFUL << USBD_WVALUEL_WVALUEL_Pos) /*!< Bit mask of WVALUEL field. */
+
+/* Register: USBD_WVALUEH */
+/* Description: SETUP data, byte 3, MSB of wValue */
+
+/* Bits 7..0 : SETUP data, byte 3, MSB of wValue */
+#define USBD_WVALUEH_WVALUEH_Pos (0UL) /*!< Position of WVALUEH field. */
+#define USBD_WVALUEH_WVALUEH_Msk (0xFFUL << USBD_WVALUEH_WVALUEH_Pos) /*!< Bit mask of WVALUEH field. */
+
+/* Register: USBD_WINDEXL */
+/* Description: SETUP data, byte 4, LSB of wIndex */
+
+/* Bits 7..0 : SETUP data, byte 4, LSB of wIndex */
+#define USBD_WINDEXL_WINDEXL_Pos (0UL) /*!< Position of WINDEXL field. */
+#define USBD_WINDEXL_WINDEXL_Msk (0xFFUL << USBD_WINDEXL_WINDEXL_Pos) /*!< Bit mask of WINDEXL field. */
+
+/* Register: USBD_WINDEXH */
+/* Description: SETUP data, byte 5, MSB of wIndex */
+
+/* Bits 7..0 : SETUP data, byte 5, MSB of wIndex */
+#define USBD_WINDEXH_WINDEXH_Pos (0UL) /*!< Position of WINDEXH field. */
+#define USBD_WINDEXH_WINDEXH_Msk (0xFFUL << USBD_WINDEXH_WINDEXH_Pos) /*!< Bit mask of WINDEXH field. */
+
+/* Register: USBD_WLENGTHL */
+/* Description: SETUP data, byte 6, LSB of wLength */
+
+/* Bits 7..0 : SETUP data, byte 6, LSB of wLength */
+#define USBD_WLENGTHL_WLENGTHL_Pos (0UL) /*!< Position of WLENGTHL field. */
+#define USBD_WLENGTHL_WLENGTHL_Msk (0xFFUL << USBD_WLENGTHL_WLENGTHL_Pos) /*!< Bit mask of WLENGTHL field. */
+
+/* Register: USBD_WLENGTHH */
+/* Description: SETUP data, byte 7, MSB of wLength */
+
+/* Bits 7..0 : SETUP data, byte 7, MSB of wLength */
+#define USBD_WLENGTHH_WLENGTHH_Pos (0UL) /*!< Position of WLENGTHH field. */
+#define USBD_WLENGTHH_WLENGTHH_Msk (0xFFUL << USBD_WLENGTHH_WLENGTHH_Pos) /*!< Bit mask of WLENGTHH field. */
+
+/* Register: USBD_SIZE_EPOUT */
+/* Description: Description collection: Number of bytes received last in the data stage of this OUT endpoint */
+
+/* Bits 6..0 : Number of bytes received last in the data stage of this OUT endpoint */
+#define USBD_SIZE_EPOUT_SIZE_Pos (0UL) /*!< Position of SIZE field. */
+#define USBD_SIZE_EPOUT_SIZE_Msk (0x7FUL << USBD_SIZE_EPOUT_SIZE_Pos) /*!< Bit mask of SIZE field. */
+
+/* Register: USBD_SIZE_ISOOUT */
+/* Description: Number of bytes received last on this ISO OUT data endpoint */
+
+/* Bit 16 : Zero-length data packet received */
+#define USBD_SIZE_ISOOUT_ZERO_Pos (16UL) /*!< Position of ZERO field. */
+#define USBD_SIZE_ISOOUT_ZERO_Msk (0x1UL << USBD_SIZE_ISOOUT_ZERO_Pos) /*!< Bit mask of ZERO field. */
+#define USBD_SIZE_ISOOUT_ZERO_Normal (0UL) /*!< No zero-length data received, use value in SIZE */
+#define USBD_SIZE_ISOOUT_ZERO_ZeroData (1UL) /*!< Zero-length data received, ignore value in SIZE */
+
+/* Bits 9..0 : Number of bytes received last on this ISO OUT data endpoint */
+#define USBD_SIZE_ISOOUT_SIZE_Pos (0UL) /*!< Position of SIZE field. */
+#define USBD_SIZE_ISOOUT_SIZE_Msk (0x3FFUL << USBD_SIZE_ISOOUT_SIZE_Pos) /*!< Bit mask of SIZE field. */
+
+/* Register: USBD_ENABLE */
+/* Description: Enable USB */
+
+/* Bit 0 : Enable USB */
+#define USBD_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
+#define USBD_ENABLE_ENABLE_Msk (0x1UL << USBD_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
+#define USBD_ENABLE_ENABLE_Disabled (0UL) /*!< USB peripheral is disabled */
+#define USBD_ENABLE_ENABLE_Enabled (1UL) /*!< USB peripheral is enabled */
+
+/* Register: USBD_USBPULLUP */
+/* Description: Control of the USB pull-up */
+
+/* Bit 0 : Control of the USB pull-up on the D+ line */
+#define USBD_USBPULLUP_CONNECT_Pos (0UL) /*!< Position of CONNECT field. */
+#define USBD_USBPULLUP_CONNECT_Msk (0x1UL << USBD_USBPULLUP_CONNECT_Pos) /*!< Bit mask of CONNECT field. */
+#define USBD_USBPULLUP_CONNECT_Disabled (0UL) /*!< Pull-up is disconnected */
+#define USBD_USBPULLUP_CONNECT_Enabled (1UL) /*!< Pull-up is connected to D+ */
+
+/* Register: USBD_DPDMVALUE */
+/* Description: State D+ and D- lines will be forced into by the DPDMDRIVE task. The DPDMNODRIVE task reverts the control of the lines to MAC IP (no forcing). */
+
+/* Bits 4..0 : State D+ and D- lines will be forced into by the DPDMDRIVE task */
+#define USBD_DPDMVALUE_STATE_Pos (0UL) /*!< Position of STATE field. */
+#define USBD_DPDMVALUE_STATE_Msk (0x1FUL << USBD_DPDMVALUE_STATE_Pos) /*!< Bit mask of STATE field. */
+#define USBD_DPDMVALUE_STATE_Resume (1UL) /*!< D+ forced low, D- forced high (K state) for a timing preset in hardware (50 us or 5 ms, depending on bus state) */
+#define USBD_DPDMVALUE_STATE_J (2UL) /*!< D+ forced high, D- forced low (J state) */
+#define USBD_DPDMVALUE_STATE_K (4UL) /*!< D+ forced low, D- forced high (K state) */
+
+/* Register: USBD_DTOGGLE */
+/* Description: Data toggle control and status */
+
+/* Bits 9..8 : Data toggle value */
+#define USBD_DTOGGLE_VALUE_Pos (8UL) /*!< Position of VALUE field. */
+#define USBD_DTOGGLE_VALUE_Msk (0x3UL << USBD_DTOGGLE_VALUE_Pos) /*!< Bit mask of VALUE field. */
+#define USBD_DTOGGLE_VALUE_Nop (0UL) /*!< No action on data toggle when writing the register with this value */
+#define USBD_DTOGGLE_VALUE_Data0 (1UL) /*!< Data toggle is DATA0 on endpoint set by EP and IO */
+#define USBD_DTOGGLE_VALUE_Data1 (2UL) /*!< Data toggle is DATA1 on endpoint set by EP and IO */
+
+/* Bit 7 : Selects IN or OUT endpoint */
+#define USBD_DTOGGLE_IO_Pos (7UL) /*!< Position of IO field. */
+#define USBD_DTOGGLE_IO_Msk (0x1UL << USBD_DTOGGLE_IO_Pos) /*!< Bit mask of IO field. */
+#define USBD_DTOGGLE_IO_Out (0UL) /*!< Selects OUT endpoint */
+#define USBD_DTOGGLE_IO_In (1UL) /*!< Selects IN endpoint */
+
+/* Bits 2..0 : Select bulk endpoint number */
+#define USBD_DTOGGLE_EP_Pos (0UL) /*!< Position of EP field. */
+#define USBD_DTOGGLE_EP_Msk (0x7UL << USBD_DTOGGLE_EP_Pos) /*!< Bit mask of EP field. */
+
+/* Register: USBD_EPINEN */
+/* Description: Endpoint IN enable */
+
+/* Bit 8 : Enable ISO IN endpoint */
+#define USBD_EPINEN_ISOIN_Pos (8UL) /*!< Position of ISOIN field. */
+#define USBD_EPINEN_ISOIN_Msk (0x1UL << USBD_EPINEN_ISOIN_Pos) /*!< Bit mask of ISOIN field. */
+#define USBD_EPINEN_ISOIN_Disable (0UL) /*!< Disable ISO IN endpoint 8 */
+#define USBD_EPINEN_ISOIN_Enable (1UL) /*!< Enable ISO IN endpoint 8 */
+
+/* Bit 7 : Enable IN endpoint 7 */
+#define USBD_EPINEN_IN7_Pos (7UL) /*!< Position of IN7 field. */
+#define USBD_EPINEN_IN7_Msk (0x1UL << USBD_EPINEN_IN7_Pos) /*!< Bit mask of IN7 field. */
+#define USBD_EPINEN_IN7_Disable (0UL) /*!< Disable endpoint IN 7 (no response to IN tokens) */
+#define USBD_EPINEN_IN7_Enable (1UL) /*!< Enable endpoint IN 7 (response to IN tokens) */
+
+/* Bit 6 : Enable IN endpoint 6 */
+#define USBD_EPINEN_IN6_Pos (6UL) /*!< Position of IN6 field. */
+#define USBD_EPINEN_IN6_Msk (0x1UL << USBD_EPINEN_IN6_Pos) /*!< Bit mask of IN6 field. */
+#define USBD_EPINEN_IN6_Disable (0UL) /*!< Disable endpoint IN 6 (no response to IN tokens) */
+#define USBD_EPINEN_IN6_Enable (1UL) /*!< Enable endpoint IN 6 (response to IN tokens) */
+
+/* Bit 5 : Enable IN endpoint 5 */
+#define USBD_EPINEN_IN5_Pos (5UL) /*!< Position of IN5 field. */
+#define USBD_EPINEN_IN5_Msk (0x1UL << USBD_EPINEN_IN5_Pos) /*!< Bit mask of IN5 field. */
+#define USBD_EPINEN_IN5_Disable (0UL) /*!< Disable endpoint IN 5 (no response to IN tokens) */
+#define USBD_EPINEN_IN5_Enable (1UL) /*!< Enable endpoint IN 5 (response to IN tokens) */
+
+/* Bit 4 : Enable IN endpoint 4 */
+#define USBD_EPINEN_IN4_Pos (4UL) /*!< Position of IN4 field. */
+#define USBD_EPINEN_IN4_Msk (0x1UL << USBD_EPINEN_IN4_Pos) /*!< Bit mask of IN4 field. */
+#define USBD_EPINEN_IN4_Disable (0UL) /*!< Disable endpoint IN 4 (no response to IN tokens) */
+#define USBD_EPINEN_IN4_Enable (1UL) /*!< Enable endpoint IN 4 (response to IN tokens) */
+
+/* Bit 3 : Enable IN endpoint 3 */
+#define USBD_EPINEN_IN3_Pos (3UL) /*!< Position of IN3 field. */
+#define USBD_EPINEN_IN3_Msk (0x1UL << USBD_EPINEN_IN3_Pos) /*!< Bit mask of IN3 field. */
+#define USBD_EPINEN_IN3_Disable (0UL) /*!< Disable endpoint IN 3 (no response to IN tokens) */
+#define USBD_EPINEN_IN3_Enable (1UL) /*!< Enable endpoint IN 3 (response to IN tokens) */
+
+/* Bit 2 : Enable IN endpoint 2 */
+#define USBD_EPINEN_IN2_Pos (2UL) /*!< Position of IN2 field. */
+#define USBD_EPINEN_IN2_Msk (0x1UL << USBD_EPINEN_IN2_Pos) /*!< Bit mask of IN2 field. */
+#define USBD_EPINEN_IN2_Disable (0UL) /*!< Disable endpoint IN 2 (no response to IN tokens) */
+#define USBD_EPINEN_IN2_Enable (1UL) /*!< Enable endpoint IN 2 (response to IN tokens) */
+
+/* Bit 1 : Enable IN endpoint 1 */
+#define USBD_EPINEN_IN1_Pos (1UL) /*!< Position of IN1 field. */
+#define USBD_EPINEN_IN1_Msk (0x1UL << USBD_EPINEN_IN1_Pos) /*!< Bit mask of IN1 field. */
+#define USBD_EPINEN_IN1_Disable (0UL) /*!< Disable endpoint IN 1 (no response to IN tokens) */
+#define USBD_EPINEN_IN1_Enable (1UL) /*!< Enable endpoint IN 1 (response to IN tokens) */
+
+/* Bit 0 : Enable IN endpoint 0 */
+#define USBD_EPINEN_IN0_Pos (0UL) /*!< Position of IN0 field. */
+#define USBD_EPINEN_IN0_Msk (0x1UL << USBD_EPINEN_IN0_Pos) /*!< Bit mask of IN0 field. */
+#define USBD_EPINEN_IN0_Disable (0UL) /*!< Disable endpoint IN 0 (no response to IN tokens) */
+#define USBD_EPINEN_IN0_Enable (1UL) /*!< Enable endpoint IN 0 (response to IN tokens) */
+
+/* Register: USBD_EPOUTEN */
+/* Description: Endpoint OUT enable */
+
+/* Bit 8 : Enable ISO OUT endpoint 8 */
+#define USBD_EPOUTEN_ISOOUT_Pos (8UL) /*!< Position of ISOOUT field. */
+#define USBD_EPOUTEN_ISOOUT_Msk (0x1UL << USBD_EPOUTEN_ISOOUT_Pos) /*!< Bit mask of ISOOUT field. */
+#define USBD_EPOUTEN_ISOOUT_Disable (0UL) /*!< Disable ISO OUT endpoint 8 */
+#define USBD_EPOUTEN_ISOOUT_Enable (1UL) /*!< Enable ISO OUT endpoint 8 */
+
+/* Bit 7 : Enable OUT endpoint 7 */
+#define USBD_EPOUTEN_OUT7_Pos (7UL) /*!< Position of OUT7 field. */
+#define USBD_EPOUTEN_OUT7_Msk (0x1UL << USBD_EPOUTEN_OUT7_Pos) /*!< Bit mask of OUT7 field. */
+#define USBD_EPOUTEN_OUT7_Disable (0UL) /*!< Disable endpoint OUT 7 (no response to OUT tokens) */
+#define USBD_EPOUTEN_OUT7_Enable (1UL) /*!< Enable endpoint OUT 7 (response to OUT tokens) */
+
+/* Bit 6 : Enable OUT endpoint 6 */
+#define USBD_EPOUTEN_OUT6_Pos (6UL) /*!< Position of OUT6 field. */
+#define USBD_EPOUTEN_OUT6_Msk (0x1UL << USBD_EPOUTEN_OUT6_Pos) /*!< Bit mask of OUT6 field. */
+#define USBD_EPOUTEN_OUT6_Disable (0UL) /*!< Disable endpoint OUT 6 (no response to OUT tokens) */
+#define USBD_EPOUTEN_OUT6_Enable (1UL) /*!< Enable endpoint OUT 6 (response to OUT tokens) */
+
+/* Bit 5 : Enable OUT endpoint 5 */
+#define USBD_EPOUTEN_OUT5_Pos (5UL) /*!< Position of OUT5 field. */
+#define USBD_EPOUTEN_OUT5_Msk (0x1UL << USBD_EPOUTEN_OUT5_Pos) /*!< Bit mask of OUT5 field. */
+#define USBD_EPOUTEN_OUT5_Disable (0UL) /*!< Disable endpoint OUT 5 (no response to OUT tokens) */
+#define USBD_EPOUTEN_OUT5_Enable (1UL) /*!< Enable endpoint OUT 5 (response to OUT tokens) */
+
+/* Bit 4 : Enable OUT endpoint 4 */
+#define USBD_EPOUTEN_OUT4_Pos (4UL) /*!< Position of OUT4 field. */
+#define USBD_EPOUTEN_OUT4_Msk (0x1UL << USBD_EPOUTEN_OUT4_Pos) /*!< Bit mask of OUT4 field. */
+#define USBD_EPOUTEN_OUT4_Disable (0UL) /*!< Disable endpoint OUT 4 (no response to OUT tokens) */
+#define USBD_EPOUTEN_OUT4_Enable (1UL) /*!< Enable endpoint OUT 4 (response to OUT tokens) */
+
+/* Bit 3 : Enable OUT endpoint 3 */
+#define USBD_EPOUTEN_OUT3_Pos (3UL) /*!< Position of OUT3 field. */
+#define USBD_EPOUTEN_OUT3_Msk (0x1UL << USBD_EPOUTEN_OUT3_Pos) /*!< Bit mask of OUT3 field. */
+#define USBD_EPOUTEN_OUT3_Disable (0UL) /*!< Disable endpoint OUT 3 (no response to OUT tokens) */
+#define USBD_EPOUTEN_OUT3_Enable (1UL) /*!< Enable endpoint OUT 3 (response to OUT tokens) */
+
+/* Bit 2 : Enable OUT endpoint 2 */
+#define USBD_EPOUTEN_OUT2_Pos (2UL) /*!< Position of OUT2 field. */
+#define USBD_EPOUTEN_OUT2_Msk (0x1UL << USBD_EPOUTEN_OUT2_Pos) /*!< Bit mask of OUT2 field. */
+#define USBD_EPOUTEN_OUT2_Disable (0UL) /*!< Disable endpoint OUT 2 (no response to OUT tokens) */
+#define USBD_EPOUTEN_OUT2_Enable (1UL) /*!< Enable endpoint OUT 2 (response to OUT tokens) */
+
+/* Bit 1 : Enable OUT endpoint 1 */
+#define USBD_EPOUTEN_OUT1_Pos (1UL) /*!< Position of OUT1 field. */
+#define USBD_EPOUTEN_OUT1_Msk (0x1UL << USBD_EPOUTEN_OUT1_Pos) /*!< Bit mask of OUT1 field. */
+#define USBD_EPOUTEN_OUT1_Disable (0UL) /*!< Disable endpoint OUT 1 (no response to OUT tokens) */
+#define USBD_EPOUTEN_OUT1_Enable (1UL) /*!< Enable endpoint OUT 1 (response to OUT tokens) */
+
+/* Bit 0 : Enable OUT endpoint 0 */
+#define USBD_EPOUTEN_OUT0_Pos (0UL) /*!< Position of OUT0 field. */
+#define USBD_EPOUTEN_OUT0_Msk (0x1UL << USBD_EPOUTEN_OUT0_Pos) /*!< Bit mask of OUT0 field. */
+#define USBD_EPOUTEN_OUT0_Disable (0UL) /*!< Disable endpoint OUT 0 (no response to OUT tokens) */
+#define USBD_EPOUTEN_OUT0_Enable (1UL) /*!< Enable endpoint OUT 0 (response to OUT tokens) */
+
+/* Register: USBD_EPSTALL */
+/* Description: STALL endpoints */
+
+/* Bit 8 : Stall selected endpoint */
+#define USBD_EPSTALL_STALL_Pos (8UL) /*!< Position of STALL field. */
+#define USBD_EPSTALL_STALL_Msk (0x1UL << USBD_EPSTALL_STALL_Pos) /*!< Bit mask of STALL field. */
+#define USBD_EPSTALL_STALL_UnStall (0UL) /*!< Don't stall selected endpoint */
+#define USBD_EPSTALL_STALL_Stall (1UL) /*!< Stall selected endpoint */
+
+/* Bit 7 : Selects IN or OUT endpoint */
+#define USBD_EPSTALL_IO_Pos (7UL) /*!< Position of IO field. */
+#define USBD_EPSTALL_IO_Msk (0x1UL << USBD_EPSTALL_IO_Pos) /*!< Bit mask of IO field. */
+#define USBD_EPSTALL_IO_Out (0UL) /*!< Selects OUT endpoint */
+#define USBD_EPSTALL_IO_In (1UL) /*!< Selects IN endpoint */
+
+/* Bits 2..0 : Select endpoint number */
+#define USBD_EPSTALL_EP_Pos (0UL) /*!< Position of EP field. */
+#define USBD_EPSTALL_EP_Msk (0x7UL << USBD_EPSTALL_EP_Pos) /*!< Bit mask of EP field. */
+
+/* Register: USBD_ISOSPLIT */
+/* Description: Controls the split of ISO buffers */
+
+/* Bits 15..0 : Controls the split of ISO buffers */
+#define USBD_ISOSPLIT_SPLIT_Pos (0UL) /*!< Position of SPLIT field. */
+#define USBD_ISOSPLIT_SPLIT_Msk (0xFFFFUL << USBD_ISOSPLIT_SPLIT_Pos) /*!< Bit mask of SPLIT field. */
+#define USBD_ISOSPLIT_SPLIT_OneDir (0x0000UL) /*!< Full buffer dedicated to either iso IN or OUT */
+#define USBD_ISOSPLIT_SPLIT_HalfIN (0x0080UL) /*!< Lower half for IN, upper half for OUT */
+
+/* Register: USBD_FRAMECNTR */
+/* Description: Returns the current value of the start of frame counter */
+
+/* Bits 10..0 : Returns the current value of the start of frame counter */
+#define USBD_FRAMECNTR_FRAMECNTR_Pos (0UL) /*!< Position of FRAMECNTR field. */
+#define USBD_FRAMECNTR_FRAMECNTR_Msk (0x7FFUL << USBD_FRAMECNTR_FRAMECNTR_Pos) /*!< Bit mask of FRAMECNTR field. */
+
+/* Register: USBD_LOWPOWER */
+/* Description: Controls USBD peripheral low power mode during USB suspend */
+
+/* Bit 0 : Controls USBD peripheral low-power mode during USB suspend */
+#define USBD_LOWPOWER_LOWPOWER_Pos (0UL) /*!< Position of LOWPOWER field. */
+#define USBD_LOWPOWER_LOWPOWER_Msk (0x1UL << USBD_LOWPOWER_LOWPOWER_Pos) /*!< Bit mask of LOWPOWER field. */
+#define USBD_LOWPOWER_LOWPOWER_ForceNormal (0UL) /*!< Software must write this value to exit low power mode and before performing a remote wake-up */
+#define USBD_LOWPOWER_LOWPOWER_LowPower (1UL) /*!< Software must write this value to enter low power mode after DMA and software have finished interacting with the USB peripheral */
+
+/* Register: USBD_ISOINCONFIG */
+/* Description: Controls the response of the ISO IN endpoint to an IN token when no data is ready to be sent */
+
+/* Bit 0 : Controls the response of the ISO IN endpoint to an IN token when no data is ready to be sent */
+#define USBD_ISOINCONFIG_RESPONSE_Pos (0UL) /*!< Position of RESPONSE field. */
+#define USBD_ISOINCONFIG_RESPONSE_Msk (0x1UL << USBD_ISOINCONFIG_RESPONSE_Pos) /*!< Bit mask of RESPONSE field. */
+#define USBD_ISOINCONFIG_RESPONSE_NoResp (0UL) /*!< Endpoint does not respond in that case */
+#define USBD_ISOINCONFIG_RESPONSE_ZeroData (1UL) /*!< Endpoint responds with a zero-length data packet in that case */
+
+/* Register: USBD_EPIN_PTR */
+/* Description: Description cluster: Data pointer */
+
+/* Bits 31..0 : Data pointer */
+#define USBD_EPIN_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define USBD_EPIN_PTR_PTR_Msk (0xFFFFFFFFUL << USBD_EPIN_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: USBD_EPIN_MAXCNT */
+/* Description: Description cluster: Maximum number of bytes to transfer */
+
+/* Bits 6..0 : Maximum number of bytes to transfer */
+#define USBD_EPIN_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define USBD_EPIN_MAXCNT_MAXCNT_Msk (0x7FUL << USBD_EPIN_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: USBD_EPIN_AMOUNT */
+/* Description: Description cluster: Number of bytes transferred in the last transaction */
+
+/* Bits 6..0 : Number of bytes transferred in the last transaction */
+#define USBD_EPIN_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define USBD_EPIN_AMOUNT_AMOUNT_Msk (0x7FUL << USBD_EPIN_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+/* Register: USBD_ISOIN_PTR */
+/* Description: Data pointer */
+
+/* Bits 31..0 : Data pointer */
+#define USBD_ISOIN_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define USBD_ISOIN_PTR_PTR_Msk (0xFFFFFFFFUL << USBD_ISOIN_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: USBD_ISOIN_MAXCNT */
+/* Description: Maximum number of bytes to transfer */
+
+/* Bits 9..0 : Maximum number of bytes to transfer */
+#define USBD_ISOIN_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define USBD_ISOIN_MAXCNT_MAXCNT_Msk (0x3FFUL << USBD_ISOIN_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: USBD_ISOIN_AMOUNT */
+/* Description: Number of bytes transferred in the last transaction */
+
+/* Bits 9..0 : Number of bytes transferred in the last transaction */
+#define USBD_ISOIN_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define USBD_ISOIN_AMOUNT_AMOUNT_Msk (0x3FFUL << USBD_ISOIN_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+/* Register: USBD_EPOUT_PTR */
+/* Description: Description cluster: Data pointer */
+
+/* Bits 31..0 : Data pointer */
+#define USBD_EPOUT_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define USBD_EPOUT_PTR_PTR_Msk (0xFFFFFFFFUL << USBD_EPOUT_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: USBD_EPOUT_MAXCNT */
+/* Description: Description cluster: Maximum number of bytes to transfer */
+
+/* Bits 6..0 : Maximum number of bytes to transfer */
+#define USBD_EPOUT_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define USBD_EPOUT_MAXCNT_MAXCNT_Msk (0x7FUL << USBD_EPOUT_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: USBD_EPOUT_AMOUNT */
+/* Description: Description cluster: Number of bytes transferred in the last transaction */
+
+/* Bits 6..0 : Number of bytes transferred in the last transaction */
+#define USBD_EPOUT_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define USBD_EPOUT_AMOUNT_AMOUNT_Msk (0x7FUL << USBD_EPOUT_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+/* Register: USBD_ISOOUT_PTR */
+/* Description: Data pointer */
+
+/* Bits 31..0 : Data pointer */
+#define USBD_ISOOUT_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
+#define USBD_ISOOUT_PTR_PTR_Msk (0xFFFFFFFFUL << USBD_ISOOUT_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
+
+/* Register: USBD_ISOOUT_MAXCNT */
+/* Description: Maximum number of bytes to transfer */
+
+/* Bits 9..0 : Maximum number of bytes to transfer */
+#define USBD_ISOOUT_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
+#define USBD_ISOOUT_MAXCNT_MAXCNT_Msk (0x3FFUL << USBD_ISOOUT_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+
+/* Register: USBD_ISOOUT_AMOUNT */
+/* Description: Number of bytes transferred in the last transaction */
+
+/* Bits 9..0 : Number of bytes transferred in the last transaction */
+#define USBD_ISOOUT_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
+#define USBD_ISOOUT_AMOUNT_AMOUNT_Msk (0x3FFUL << USBD_ISOOUT_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+
+
+/* Peripheral: WDT */
+/* Description: Watchdog Timer */
+
+/* Register: WDT_TASKS_START */
+/* Description: Start the watchdog */
+
+/* Bit 0 : Start the watchdog */
+#define WDT_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */
+#define WDT_TASKS_START_TASKS_START_Msk (0x1UL << WDT_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */
+#define WDT_TASKS_START_TASKS_START_Trigger (1UL) /*!< Trigger task */
+
+/* Register: WDT_EVENTS_TIMEOUT */
+/* Description: Watchdog timeout */
+
+/* Bit 0 : Watchdog timeout */
+#define WDT_EVENTS_TIMEOUT_EVENTS_TIMEOUT_Pos (0UL) /*!< Position of EVENTS_TIMEOUT field. */
+#define WDT_EVENTS_TIMEOUT_EVENTS_TIMEOUT_Msk (0x1UL << WDT_EVENTS_TIMEOUT_EVENTS_TIMEOUT_Pos) /*!< Bit mask of EVENTS_TIMEOUT field. */
+#define WDT_EVENTS_TIMEOUT_EVENTS_TIMEOUT_NotGenerated (0UL) /*!< Event not generated */
+#define WDT_EVENTS_TIMEOUT_EVENTS_TIMEOUT_Generated (1UL) /*!< Event generated */
+
+/* Register: WDT_INTENSET */
+/* Description: Enable interrupt */
+
+/* Bit 0 : Write '1' to enable interrupt for event TIMEOUT */
+#define WDT_INTENSET_TIMEOUT_Pos (0UL) /*!< Position of TIMEOUT field. */
+#define WDT_INTENSET_TIMEOUT_Msk (0x1UL << WDT_INTENSET_TIMEOUT_Pos) /*!< Bit mask of TIMEOUT field. */
+#define WDT_INTENSET_TIMEOUT_Disabled (0UL) /*!< Read: Disabled */
+#define WDT_INTENSET_TIMEOUT_Enabled (1UL) /*!< Read: Enabled */
+#define WDT_INTENSET_TIMEOUT_Set (1UL) /*!< Enable */
+
+/* Register: WDT_INTENCLR */
+/* Description: Disable interrupt */
+
+/* Bit 0 : Write '1' to disable interrupt for event TIMEOUT */
+#define WDT_INTENCLR_TIMEOUT_Pos (0UL) /*!< Position of TIMEOUT field. */
+#define WDT_INTENCLR_TIMEOUT_Msk (0x1UL << WDT_INTENCLR_TIMEOUT_Pos) /*!< Bit mask of TIMEOUT field. */
+#define WDT_INTENCLR_TIMEOUT_Disabled (0UL) /*!< Read: Disabled */
+#define WDT_INTENCLR_TIMEOUT_Enabled (1UL) /*!< Read: Enabled */
+#define WDT_INTENCLR_TIMEOUT_Clear (1UL) /*!< Disable */
+
+/* Register: WDT_RUNSTATUS */
+/* Description: Run status */
+
+/* Bit 0 : Indicates whether or not the watchdog is running */
+#define WDT_RUNSTATUS_RUNSTATUS_Pos (0UL) /*!< Position of RUNSTATUS field. */
+#define WDT_RUNSTATUS_RUNSTATUS_Msk (0x1UL << WDT_RUNSTATUS_RUNSTATUS_Pos) /*!< Bit mask of RUNSTATUS field. */
+#define WDT_RUNSTATUS_RUNSTATUS_NotRunning (0UL) /*!< Watchdog not running */
+#define WDT_RUNSTATUS_RUNSTATUS_Running (1UL) /*!< Watchdog is running */
+
+/* Register: WDT_REQSTATUS */
+/* Description: Request status */
+
+/* Bit 7 : Request status for RR[7] register */
+#define WDT_REQSTATUS_RR7_Pos (7UL) /*!< Position of RR7 field. */
+#define WDT_REQSTATUS_RR7_Msk (0x1UL << WDT_REQSTATUS_RR7_Pos) /*!< Bit mask of RR7 field. */
+#define WDT_REQSTATUS_RR7_DisabledOrRequested (0UL) /*!< RR[7] register is not enabled, or are already requesting reload */
+#define WDT_REQSTATUS_RR7_EnabledAndUnrequested (1UL) /*!< RR[7] register is enabled, and are not yet requesting reload */
+
+/* Bit 6 : Request status for RR[6] register */
+#define WDT_REQSTATUS_RR6_Pos (6UL) /*!< Position of RR6 field. */
+#define WDT_REQSTATUS_RR6_Msk (0x1UL << WDT_REQSTATUS_RR6_Pos) /*!< Bit mask of RR6 field. */
+#define WDT_REQSTATUS_RR6_DisabledOrRequested (0UL) /*!< RR[6] register is not enabled, or are already requesting reload */
+#define WDT_REQSTATUS_RR6_EnabledAndUnrequested (1UL) /*!< RR[6] register is enabled, and are not yet requesting reload */
+
+/* Bit 5 : Request status for RR[5] register */
+#define WDT_REQSTATUS_RR5_Pos (5UL) /*!< Position of RR5 field. */
+#define WDT_REQSTATUS_RR5_Msk (0x1UL << WDT_REQSTATUS_RR5_Pos) /*!< Bit mask of RR5 field. */
+#define WDT_REQSTATUS_RR5_DisabledOrRequested (0UL) /*!< RR[5] register is not enabled, or are already requesting reload */
+#define WDT_REQSTATUS_RR5_EnabledAndUnrequested (1UL) /*!< RR[5] register is enabled, and are not yet requesting reload */
+
+/* Bit 4 : Request status for RR[4] register */
+#define WDT_REQSTATUS_RR4_Pos (4UL) /*!< Position of RR4 field. */
+#define WDT_REQSTATUS_RR4_Msk (0x1UL << WDT_REQSTATUS_RR4_Pos) /*!< Bit mask of RR4 field. */
+#define WDT_REQSTATUS_RR4_DisabledOrRequested (0UL) /*!< RR[4] register is not enabled, or are already requesting reload */
+#define WDT_REQSTATUS_RR4_EnabledAndUnrequested (1UL) /*!< RR[4] register is enabled, and are not yet requesting reload */
+
+/* Bit 3 : Request status for RR[3] register */
+#define WDT_REQSTATUS_RR3_Pos (3UL) /*!< Position of RR3 field. */
+#define WDT_REQSTATUS_RR3_Msk (0x1UL << WDT_REQSTATUS_RR3_Pos) /*!< Bit mask of RR3 field. */
+#define WDT_REQSTATUS_RR3_DisabledOrRequested (0UL) /*!< RR[3] register is not enabled, or are already requesting reload */
+#define WDT_REQSTATUS_RR3_EnabledAndUnrequested (1UL) /*!< RR[3] register is enabled, and are not yet requesting reload */
+
+/* Bit 2 : Request status for RR[2] register */
+#define WDT_REQSTATUS_RR2_Pos (2UL) /*!< Position of RR2 field. */
+#define WDT_REQSTATUS_RR2_Msk (0x1UL << WDT_REQSTATUS_RR2_Pos) /*!< Bit mask of RR2 field. */
+#define WDT_REQSTATUS_RR2_DisabledOrRequested (0UL) /*!< RR[2] register is not enabled, or are already requesting reload */
+#define WDT_REQSTATUS_RR2_EnabledAndUnrequested (1UL) /*!< RR[2] register is enabled, and are not yet requesting reload */
+
+/* Bit 1 : Request status for RR[1] register */
+#define WDT_REQSTATUS_RR1_Pos (1UL) /*!< Position of RR1 field. */
+#define WDT_REQSTATUS_RR1_Msk (0x1UL << WDT_REQSTATUS_RR1_Pos) /*!< Bit mask of RR1 field. */
+#define WDT_REQSTATUS_RR1_DisabledOrRequested (0UL) /*!< RR[1] register is not enabled, or are already requesting reload */
+#define WDT_REQSTATUS_RR1_EnabledAndUnrequested (1UL) /*!< RR[1] register is enabled, and are not yet requesting reload */
+
+/* Bit 0 : Request status for RR[0] register */
+#define WDT_REQSTATUS_RR0_Pos (0UL) /*!< Position of RR0 field. */
+#define WDT_REQSTATUS_RR0_Msk (0x1UL << WDT_REQSTATUS_RR0_Pos) /*!< Bit mask of RR0 field. */
+#define WDT_REQSTATUS_RR0_DisabledOrRequested (0UL) /*!< RR[0] register is not enabled, or are already requesting reload */
+#define WDT_REQSTATUS_RR0_EnabledAndUnrequested (1UL) /*!< RR[0] register is enabled, and are not yet requesting reload */
+
+/* Register: WDT_CRV */
+/* Description: Counter reload value */
+
+/* Bits 31..0 : Counter reload value in number of cycles of the 32.768 kHz clock */
+#define WDT_CRV_CRV_Pos (0UL) /*!< Position of CRV field. */
+#define WDT_CRV_CRV_Msk (0xFFFFFFFFUL << WDT_CRV_CRV_Pos) /*!< Bit mask of CRV field. */
+
+/* Register: WDT_RREN */
+/* Description: Enable register for reload request registers */
+
+/* Bit 7 : Enable or disable RR[7] register */
+#define WDT_RREN_RR7_Pos (7UL) /*!< Position of RR7 field. */
+#define WDT_RREN_RR7_Msk (0x1UL << WDT_RREN_RR7_Pos) /*!< Bit mask of RR7 field. */
+#define WDT_RREN_RR7_Disabled (0UL) /*!< Disable RR[7] register */
+#define WDT_RREN_RR7_Enabled (1UL) /*!< Enable RR[7] register */
+
+/* Bit 6 : Enable or disable RR[6] register */
+#define WDT_RREN_RR6_Pos (6UL) /*!< Position of RR6 field. */
+#define WDT_RREN_RR6_Msk (0x1UL << WDT_RREN_RR6_Pos) /*!< Bit mask of RR6 field. */
+#define WDT_RREN_RR6_Disabled (0UL) /*!< Disable RR[6] register */
+#define WDT_RREN_RR6_Enabled (1UL) /*!< Enable RR[6] register */
+
+/* Bit 5 : Enable or disable RR[5] register */
+#define WDT_RREN_RR5_Pos (5UL) /*!< Position of RR5 field. */
+#define WDT_RREN_RR5_Msk (0x1UL << WDT_RREN_RR5_Pos) /*!< Bit mask of RR5 field. */
+#define WDT_RREN_RR5_Disabled (0UL) /*!< Disable RR[5] register */
+#define WDT_RREN_RR5_Enabled (1UL) /*!< Enable RR[5] register */
+
+/* Bit 4 : Enable or disable RR[4] register */
+#define WDT_RREN_RR4_Pos (4UL) /*!< Position of RR4 field. */
+#define WDT_RREN_RR4_Msk (0x1UL << WDT_RREN_RR4_Pos) /*!< Bit mask of RR4 field. */
+#define WDT_RREN_RR4_Disabled (0UL) /*!< Disable RR[4] register */
+#define WDT_RREN_RR4_Enabled (1UL) /*!< Enable RR[4] register */
+
+/* Bit 3 : Enable or disable RR[3] register */
+#define WDT_RREN_RR3_Pos (3UL) /*!< Position of RR3 field. */
+#define WDT_RREN_RR3_Msk (0x1UL << WDT_RREN_RR3_Pos) /*!< Bit mask of RR3 field. */
+#define WDT_RREN_RR3_Disabled (0UL) /*!< Disable RR[3] register */
+#define WDT_RREN_RR3_Enabled (1UL) /*!< Enable RR[3] register */
+
+/* Bit 2 : Enable or disable RR[2] register */
+#define WDT_RREN_RR2_Pos (2UL) /*!< Position of RR2 field. */
+#define WDT_RREN_RR2_Msk (0x1UL << WDT_RREN_RR2_Pos) /*!< Bit mask of RR2 field. */
+#define WDT_RREN_RR2_Disabled (0UL) /*!< Disable RR[2] register */
+#define WDT_RREN_RR2_Enabled (1UL) /*!< Enable RR[2] register */
+
+/* Bit 1 : Enable or disable RR[1] register */
+#define WDT_RREN_RR1_Pos (1UL) /*!< Position of RR1 field. */
+#define WDT_RREN_RR1_Msk (0x1UL << WDT_RREN_RR1_Pos) /*!< Bit mask of RR1 field. */
+#define WDT_RREN_RR1_Disabled (0UL) /*!< Disable RR[1] register */
+#define WDT_RREN_RR1_Enabled (1UL) /*!< Enable RR[1] register */
+
+/* Bit 0 : Enable or disable RR[0] register */
+#define WDT_RREN_RR0_Pos (0UL) /*!< Position of RR0 field. */
+#define WDT_RREN_RR0_Msk (0x1UL << WDT_RREN_RR0_Pos) /*!< Bit mask of RR0 field. */
+#define WDT_RREN_RR0_Disabled (0UL) /*!< Disable RR[0] register */
+#define WDT_RREN_RR0_Enabled (1UL) /*!< Enable RR[0] register */
+
+/* Register: WDT_CONFIG */
+/* Description: Configuration register */
+
+/* Bit 3 : Configure the watchdog to either be paused, or kept running, while the CPU is halted by the debugger */
+#define WDT_CONFIG_HALT_Pos (3UL) /*!< Position of HALT field. */
+#define WDT_CONFIG_HALT_Msk (0x1UL << WDT_CONFIG_HALT_Pos) /*!< Bit mask of HALT field. */
+#define WDT_CONFIG_HALT_Pause (0UL) /*!< Pause watchdog while the CPU is halted by the debugger */
+#define WDT_CONFIG_HALT_Run (1UL) /*!< Keep the watchdog running while the CPU is halted by the debugger */
+
+/* Bit 0 : Configure the watchdog to either be paused, or kept running, while the CPU is sleeping */
+#define WDT_CONFIG_SLEEP_Pos (0UL) /*!< Position of SLEEP field. */
+#define WDT_CONFIG_SLEEP_Msk (0x1UL << WDT_CONFIG_SLEEP_Pos) /*!< Bit mask of SLEEP field. */
+#define WDT_CONFIG_SLEEP_Pause (0UL) /*!< Pause watchdog while the CPU is sleeping */
+#define WDT_CONFIG_SLEEP_Run (1UL) /*!< Keep the watchdog running while the CPU is sleeping */
+
+/* Register: WDT_RR */
+/* Description: Description collection: Reload request n */
+
+/* Bits 31..0 : Reload request register */
+#define WDT_RR_RR_Pos (0UL) /*!< Position of RR field. */
+#define WDT_RR_RR_Msk (0xFFFFFFFFUL << WDT_RR_RR_Pos) /*!< Bit mask of RR field. */
+#define WDT_RR_RR_Reload (0x6E524635UL) /*!< Value to request a reload of the watchdog timer */
+
+
+/*lint --flb "Leave library region" */
+#endif
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf52833_peripherals.h b/third_party/NordicSemiconductor/nrfx/mdk/nrf52833_peripherals.h
new file mode 100644
index 0000000..8b35b81
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf52833_peripherals.h
@@ -0,0 +1,301 @@
+/*
+
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+
+2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ contributors may be used to endorse or promote products derived from this
+ software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
+
+*/
+
+#ifndef _NRF52833_PERIPHERALS_H
+#define _NRF52833_PERIPHERALS_H
+
+/* Clock Peripheral */
+#define CLOCK_PRESENT
+#define CLOCK_COUNT 1
+
+#define CLOCK_FEATURE_LFXO_EXTENDED_DEBOUNCE_PRESENT
+
+/* Power Peripheral */
+#define POWER_PRESENT
+#define POWER_COUNT 1
+
+#define POWER_FEATURE_RAM_REGISTERS_PRESENT
+#define POWER_FEATURE_RAM_REGISTERS_COUNT 9
+
+#define POWER_FEATURE_VDDH_PRESENT
+
+/* Floating Point Unit */
+#define FPU_PRESENT
+#define FPU_COUNT 1
+
+/* Systick timer */
+#define SYSTICK_PRESENT
+#define SYSTICK_COUNT 1
+
+/* Software Interrupts */
+#define SWI_PRESENT
+#define SWI_COUNT 6
+
+/* Memory Watch Unit */
+#define MWU_PRESENT
+#define MWU_COUNT 1
+
+/* GPIO */
+#define GPIO_PRESENT
+#define GPIO_COUNT 2
+
+#define P0_PIN_NUM 32
+#define P1_PIN_NUM 10
+
+/* ACL */
+#define ACL_PRESENT
+
+#define ACL_REGIONS_COUNT 8
+
+/* Radio */
+#define RADIO_PRESENT
+#define RADIO_COUNT 1
+
+#define RADIO_EASYDMA_MAXCNT_SIZE 8
+
+/* Accelerated Address Resolver */
+#define AAR_PRESENT
+#define AAR_COUNT 1
+
+#define AAR_MAX_IRK_NUM 16
+
+/* AES Electronic CodeBook mode encryption */
+#define ECB_PRESENT
+#define ECB_COUNT 1
+
+/* AES CCM mode encryption */
+#define CCM_PRESENT
+#define CCM_COUNT 1
+
+/* NFC Tag */
+#define NFCT_PRESENT
+#define NFCT_COUNT 1
+
+#define NFCT_EASYDMA_MAXCNT_SIZE 9
+
+/* Peripheral to Peripheral Interconnect */
+#define PPI_PRESENT
+#define PPI_COUNT 1
+
+#define PPI_CH_NUM 20
+#define PPI_FIXED_CH_NUM 12
+#define PPI_GROUP_NUM 6
+#define PPI_FEATURE_FORKS_PRESENT
+
+/* Event Generator Unit */
+#define EGU_PRESENT
+#define EGU_COUNT 6
+
+#define EGU0_CH_NUM 16
+#define EGU1_CH_NUM 16
+#define EGU2_CH_NUM 16
+#define EGU3_CH_NUM 16
+#define EGU4_CH_NUM 16
+#define EGU5_CH_NUM 16
+
+/* Timer/Counter */
+#define TIMER_PRESENT
+#define TIMER_COUNT 5
+
+#define TIMER0_MAX_SIZE 32
+#define TIMER1_MAX_SIZE 32
+#define TIMER2_MAX_SIZE 32
+#define TIMER3_MAX_SIZE 32
+#define TIMER4_MAX_SIZE 32
+
+#define TIMER0_CC_NUM 4
+#define TIMER1_CC_NUM 4
+#define TIMER2_CC_NUM 4
+#define TIMER3_CC_NUM 6
+#define TIMER4_CC_NUM 6
+
+/* Real Time Counter */
+#define RTC_PRESENT
+#define RTC_COUNT 3
+
+#define RTC0_CC_NUM 3
+#define RTC1_CC_NUM 4
+#define RTC2_CC_NUM 4
+
+/* RNG */
+#define RNG_PRESENT
+#define RNG_COUNT 1
+
+/* Watchdog Timer */
+#define WDT_PRESENT
+#define WDT_COUNT 1
+
+/* Temperature Sensor */
+#define TEMP_PRESENT
+#define TEMP_COUNT 1
+
+/* Serial Peripheral Interface Master */
+#define SPI_PRESENT
+#define SPI_COUNT 3
+
+/* Serial Peripheral Interface Master with DMA */
+#define SPIM_PRESENT
+#define SPIM_COUNT 4
+
+#define SPIM0_MAX_DATARATE 8
+#define SPIM1_MAX_DATARATE 8
+#define SPIM2_MAX_DATARATE 8
+#define SPIM3_MAX_DATARATE 32
+
+#define SPIM0_FEATURE_HARDWARE_CSN_PRESENT 0
+#define SPIM1_FEATURE_HARDWARE_CSN_PRESENT 0
+#define SPIM2_FEATURE_HARDWARE_CSN_PRESENT 0
+#define SPIM3_FEATURE_HARDWARE_CSN_PRESENT 1
+
+#define SPIM0_FEATURE_DCX_PRESENT 0
+#define SPIM1_FEATURE_DCX_PRESENT 0
+#define SPIM2_FEATURE_DCX_PRESENT 0
+#define SPIM3_FEATURE_DCX_PRESENT 1
+
+#define SPIM0_FEATURE_RXDELAY_PRESENT 0
+#define SPIM1_FEATURE_RXDELAY_PRESENT 0
+#define SPIM2_FEATURE_RXDELAY_PRESENT 0
+#define SPIM3_FEATURE_RXDELAY_PRESENT 1
+
+#define SPIM0_EASYDMA_MAXCNT_SIZE 16
+#define SPIM1_EASYDMA_MAXCNT_SIZE 16
+#define SPIM2_EASYDMA_MAXCNT_SIZE 16
+#define SPIM3_EASYDMA_MAXCNT_SIZE 16
+
+/* Serial Peripheral Interface Slave with DMA*/
+#define SPIS_PRESENT
+#define SPIS_COUNT 3
+
+#define SPIS0_EASYDMA_MAXCNT_SIZE 16
+#define SPIS1_EASYDMA_MAXCNT_SIZE 16
+#define SPIS2_EASYDMA_MAXCNT_SIZE 16
+
+/* Two Wire Interface Master */
+#define TWI_PRESENT
+#define TWI_COUNT 2
+
+/* Two Wire Interface Master with DMA */
+#define TWIM_PRESENT
+#define TWIM_COUNT 2
+
+#define TWIM0_EASYDMA_MAXCNT_SIZE 16
+#define TWIM1_EASYDMA_MAXCNT_SIZE 16
+
+/* Two Wire Interface Slave with DMA */
+#define TWIS_PRESENT
+#define TWIS_COUNT 2
+
+#define TWIS0_EASYDMA_MAXCNT_SIZE 16
+#define TWIS1_EASYDMA_MAXCNT_SIZE 16
+
+/* Universal Asynchronous Receiver-Transmitter */
+#define UART_PRESENT
+#define UART_COUNT 1
+
+#define UART0_FEATURE_ODD_PARITY_PRESENT
+
+/* Universal Asynchronous Receiver-Transmitter with DMA */
+#define UARTE_PRESENT
+#define UARTE_COUNT 2
+
+#define UARTE0_EASYDMA_MAXCNT_SIZE 16
+#define UARTE1_EASYDMA_MAXCNT_SIZE 16
+
+#define UARTE0_FEATURE_ODD_PARITY_PRESENT
+#define UARTE1_FEATURE_ODD_PARITY_PRESENT
+
+/* Quadrature Decoder */
+#define QDEC_PRESENT
+#define QDEC_COUNT 1
+
+/* Successive Approximation Analog to Digital Converter */
+#define SAADC_PRESENT
+#define SAADC_COUNT 1
+
+#define SAADC_EASYDMA_MAXCNT_SIZE 15
+
+#define SAADC_CH_NUM 8
+
+/* GPIO Tasks and Events */
+#define GPIOTE_PRESENT
+#define GPIOTE_COUNT 1
+
+#define GPIOTE_CH_NUM 8
+
+#define GPIOTE_FEATURE_SET_PRESENT
+#define GPIOTE_FEATURE_CLR_PRESENT
+
+/* Low Power Comparator */
+#define LPCOMP_PRESENT
+#define LPCOMP_COUNT 1
+
+#define LPCOMP_REFSEL_RESOLUTION 16
+
+#define LPCOMP_FEATURE_HYST_PRESENT
+
+/* Comparator */
+#define COMP_PRESENT
+#define COMP_COUNT 1
+
+/* Pulse Width Modulator */
+#define PWM_PRESENT
+#define PWM_COUNT 4
+
+#define PWM0_CH_NUM 4
+#define PWM1_CH_NUM 4
+#define PWM2_CH_NUM 4
+#define PWM3_CH_NUM 4
+
+#define PWM0_EASYDMA_MAXCNT_SIZE 15
+#define PWM1_EASYDMA_MAXCNT_SIZE 15
+#define PWM2_EASYDMA_MAXCNT_SIZE 15
+#define PWM3_EASYDMA_MAXCNT_SIZE 15
+
+/* Pulse Density Modulator */
+#define PDM_PRESENT
+#define PDM_COUNT 1
+
+#define PDM_EASYDMA_MAXCNT_SIZE 15
+
+/* Inter-IC Sound Interface */
+#define I2S_PRESENT
+#define I2S_COUNT 1
+
+#define I2S_EASYDMA_MAXCNT_SIZE 14
+
+/* Universal Serial Bus Device */
+#define USBD_PRESENT
+#define USBD_COUNT 1
+
+#define USBD_EASYDMA_MAXCNT_SIZE 7
+
+#endif // _NRF52833_PERIPHERALS_H
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf52833_xxaa.ld b/third_party/NordicSemiconductor/nrfx/mdk/nrf52833_xxaa.ld
new file mode 100644
index 0000000..2492b81
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf52833_xxaa.ld
@@ -0,0 +1,13 @@
+/* Linker script to configure memory regions. */
+
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lnosys)
+
+MEMORY
+{
+ FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x80000
+ RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x20000
+}
+
+
+INCLUDE "nrf_common.ld"
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf52840.h b/third_party/NordicSemiconductor/nrfx/mdk/nrf52840.h
index 0fefdd4..2c0abbf 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/nrf52840.h
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf52840.h
@@ -30,10 +30,10 @@
* @file nrf52840.h
* @brief CMSIS HeaderFile
* @version 1
- * @date 17. January 2019
- * @note Generated by SVDConv V3.3.18 on Thursday, 17.01.2019 17:25:40
+ * @date 23. August 2019
+ * @note Generated by SVDConv V3.3.25 on Friday, 23.08.2019 12:15:13
* from File 'nrf52840.svd',
- * last modified on Thursday, 17.01.2019 16:25:35
+ * last modified on Friday, 23.08.2019 10:15:09
*/
@@ -138,8 +138,8 @@
#define __VTOR_PRESENT 1 /*!< Set to 1 if CPU supports Vector Table Offset Register */
#define __NVIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels */
#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
-#define __MPU_PRESENT 1 /*!< MPU present or not */
-#define __FPU_PRESENT 1 /*!< FPU present or not */
+#define __MPU_PRESENT 1 /*!< MPU present */
+#define __FPU_PRESENT 1 /*!< FPU present */
/** @} */ /* End of group Configuration_of_CMSIS */
@@ -235,16 +235,16 @@
typedef struct {
__IM uint32_t TAGHEADER0; /*!< (@ 0x00000000) Default header for NFC tag. Software can read
these values to populate NFCID1_3RD_LAST,
- NFCID1_2ND_LAST and NFCID1_LAST. */
+ NFCID1_2ND_LAST, and NFCID1_LAST. */
__IM uint32_t TAGHEADER1; /*!< (@ 0x00000004) Default header for NFC tag. Software can read
these values to populate NFCID1_3RD_LAST,
- NFCID1_2ND_LAST and NFCID1_LAST. */
+ NFCID1_2ND_LAST, and NFCID1_LAST. */
__IM uint32_t TAGHEADER2; /*!< (@ 0x00000008) Default header for NFC tag. Software can read
these values to populate NFCID1_3RD_LAST,
- NFCID1_2ND_LAST and NFCID1_LAST. */
+ NFCID1_2ND_LAST, and NFCID1_LAST. */
__IM uint32_t TAGHEADER3; /*!< (@ 0x0000000C) Default header for NFC tag. Software can read
these values to populate NFCID1_3RD_LAST,
- NFCID1_2ND_LAST and NFCID1_LAST. */
+ NFCID1_2ND_LAST, and NFCID1_LAST. */
} FICR_NFC_Type; /*!< Size = 16 (0x10) */
@@ -924,21 +924,23 @@
typedef struct { /*!< (@ 0x10001000) UICR Structure */
__IM uint32_t RESERVED[5];
- __IOM uint32_t NRFFW[15]; /*!< (@ 0x00000014) Description collection: Reserved for Nordic firmware
+ __IOM uint32_t NRFFW[13]; /*!< (@ 0x00000014) Description collection: Reserved for Nordic firmware
design */
+ __IM uint32_t RESERVED1[2];
__IOM uint32_t NRFHW[12]; /*!< (@ 0x00000050) Description collection: Reserved for Nordic hardware
design */
__IOM uint32_t CUSTOMER[32]; /*!< (@ 0x00000080) Description collection: Reserved for customer */
- __IM uint32_t RESERVED1[64];
+ __IM uint32_t RESERVED2[64];
__IOM uint32_t PSELRESET[2]; /*!< (@ 0x00000200) Description collection: Mapping of the nRESET
function (see POWER chapter for details) */
__IOM uint32_t APPROTECT; /*!< (@ 0x00000208) Access port protection */
__IOM uint32_t NFCPINS; /*!< (@ 0x0000020C) Setting of pins dedicated to NFC functionality:
NFC antenna or GPIO */
__IOM uint32_t DEBUGCTRL; /*!< (@ 0x00000210) Processor debug control */
- __IM uint32_t RESERVED2[60];
- __IOM uint32_t REGOUT0; /*!< (@ 0x00000304) GPIO reference voltage / external output supply
- voltage in high voltage mode */
+ __IM uint32_t RESERVED3[60];
+ __IOM uint32_t REGOUT0; /*!< (@ 0x00000304) Output voltage from REG0 regulator stage. The
+ maximum output voltage from this stage is
+ given as VDDH - VREG0DROP. */
} NRF_UICR_Type; /*!< Size = 776 (0x308) */
@@ -1010,8 +1012,8 @@
typedef struct { /*!< (@ 0x40000000) POWER Structure */
__IM uint32_t RESERVED[30];
- __OM uint32_t TASKS_CONSTLAT; /*!< (@ 0x00000078) Enable constant latency mode */
- __OM uint32_t TASKS_LOWPWR; /*!< (@ 0x0000007C) Enable low power mode (variable latency) */
+ __OM uint32_t TASKS_CONSTLAT; /*!< (@ 0x00000078) Enable Constant Latency mode */
+ __OM uint32_t TASKS_LOWPWR; /*!< (@ 0x0000007C) Enable Low-power mode (variable latency) */
__IM uint32_t RESERVED1[34];
__IOM uint32_t EVENTS_POFWARN; /*!< (@ 0x00000108) Power failure warning */
__IM uint32_t RESERVED2[2];
@@ -1037,9 +1039,9 @@
__IOM uint32_t GPREGRET; /*!< (@ 0x0000051C) General purpose retention register */
__IOM uint32_t GPREGRET2; /*!< (@ 0x00000520) General purpose retention register */
__IM uint32_t RESERVED10[21];
- __IOM uint32_t DCDCEN; /*!< (@ 0x00000578) Enable DC/DC converter for REG1 stage. */
+ __IOM uint32_t DCDCEN; /*!< (@ 0x00000578) Enable DC/DC converter for REG1 stage */
__IM uint32_t RESERVED11;
- __IOM uint32_t DCDCEN0; /*!< (@ 0x00000580) Enable DC/DC converter for REG0 stage. */
+ __IOM uint32_t DCDCEN0; /*!< (@ 0x00000580) Enable DC/DC converter for REG0 stage */
__IM uint32_t RESERVED12[47];
__IM uint32_t MAINREGSTATUS; /*!< (@ 0x00000640) Main supply status */
__IM uint32_t RESERVED13[175];
@@ -2540,17 +2542,17 @@
have been captured on all endpoints reported
in the EPSTATUS register */
__IOM uint32_t EVENTS_ENDEPIN[8]; /*!< (@ 0x00000108) Description collection: The whole EPIN[n] buffer
- has been consumed. The RAM buffer can be
- accessed safely by software. */
+ has been consumed. The buffer can be accessed
+ safely by software. */
__IOM uint32_t EVENTS_EP0DATADONE; /*!< (@ 0x00000128) An acknowledged data transfer has taken place
on the control endpoint */
__IOM uint32_t EVENTS_ENDISOIN; /*!< (@ 0x0000012C) The whole ISOIN buffer has been consumed. The
- RAM buffer can be accessed safely by software. */
+ buffer can be accessed safely by software. */
__IOM uint32_t EVENTS_ENDEPOUT[8]; /*!< (@ 0x00000130) Description collection: The whole EPOUT[n] buffer
- has been consumed. The RAM buffer can be
- accessed safely by software. */
+ has been consumed. The buffer can be accessed
+ safely by software. */
__IOM uint32_t EVENTS_ENDISOOUT; /*!< (@ 0x00000150) The whole ISOOUT buffer has been consumed. The
- RAM buffer can be accessed safely by software. */
+ buffer can be accessed safely by software. */
__IOM uint32_t EVENTS_SOF; /*!< (@ 0x00000154) Signals that a SOF (start of frame) condition
has been detected on USB lines */
__IOM uint32_t EVENTS_USBEVENT; /*!< (@ 0x00000158) An event or an error not covered by specific
@@ -2901,7 +2903,7 @@
#pragma pop
#elif defined (__ICCARM__)
/* leave anonymous unions enabled */
-#elif (__ARMCC_VERSION >= 6010050)
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#pragma clang diagnostic pop
#elif defined (__GNUC__)
/* anonymous unions are enabled by default */
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf52840.svd b/third_party/NordicSemiconductor/nrfx/mdk/nrf52840.svd
index 74bc362..ccacbbc 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/nrf52840.svd
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf52840.svd
@@ -215,6 +215,11 @@
<msb>31</msb>
<enumeratedValues>
<enumeratedValue>
+ <name>N52833</name>
+ <description>nRF52833</description>
+ <value>0x52833</value>
+ </enumeratedValue>
+ <enumeratedValue>
<name>N52840</name>
<description>nRF52840</description>
<value>0x52840</value>
@@ -304,6 +309,11 @@
<value>0x2004</value>
</enumeratedValue>
<enumeratedValue>
+ <name>CK</name>
+ <description>CKxx - WLCSP</description>
+ <value>0x2005</value>
+ </enumeratedValue>
+ <enumeratedValue>
<name>Unspecified</name>
<description>Unspecified</description>
<value>0xFFFFFFFF</value>
@@ -706,7 +716,7 @@
<addressOffset>0x450</addressOffset>
<register>
<name>TAGHEADER0</name>
- <description>Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST.</description>
+ <description>Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST, and NFCID1_LAST.</description>
<addressOffset>0x000</addressOffset>
<access>read-only</access>
<resetValue>0xFFFFFF5F</resetValue>
@@ -739,7 +749,7 @@
</register>
<register>
<name>TAGHEADER1</name>
- <description>Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST.</description>
+ <description>Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST, and NFCID1_LAST.</description>
<addressOffset>0x004</addressOffset>
<access>read-only</access>
<resetValue>0xFFFFFFFF</resetValue>
@@ -772,7 +782,7 @@
</register>
<register>
<name>TAGHEADER2</name>
- <description>Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST.</description>
+ <description>Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST, and NFCID1_LAST.</description>
<addressOffset>0x008</addressOffset>
<access>read-only</access>
<resetValue>0xFFFFFFFF</resetValue>
@@ -805,7 +815,7 @@
</register>
<register>
<name>TAGHEADER3</name>
- <description>Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST.</description>
+ <description>Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST, and NFCID1_LAST.</description>
<addressOffset>0x00C</addressOffset>
<access>read-only</access>
<resetValue>0xFFFFFFFF</resetValue>
@@ -893,7 +903,7 @@
<description>Amount of bytes for the startup tests</description>
<addressOffset>0x00C</addressOffset>
<access>read-only</access>
- <resetValue>0x00000210</resetValue>
+ <resetValue>0xFFFFFFFF</resetValue>
<fields>
<field>
<name>STARTUP</name>
@@ -979,7 +989,7 @@
<size>0x20</size>
<registers>
<register>
- <dim>0xF</dim>
+ <dim>0xD</dim>
<dimIncrement>0x4</dimIncrement>
<name>NRFFW[%s]</name>
<description>Description collection: Reserved for Nordic firmware design</description>
@@ -1171,14 +1181,14 @@
</register>
<register>
<name>REGOUT0</name>
- <description>GPIO reference voltage / external output supply voltage in high voltage mode</description>
+ <description>Output voltage from REG0 regulator stage. The maximum output voltage from this stage is given as VDDH - VREG0DROP.</description>
<addressOffset>0x304</addressOffset>
<access>read-write</access>
<resetValue>0xFFFFFFFF</resetValue>
<fields>
<field>
<name>VOUT</name>
- <description>Output voltage from of REG0 regulator stage. The maximum output voltage from this stage is given as VDDH - VEXDIF.</description>
+ <description>Output voltage from REG0 regulator stage.</description>
<lsb>0</lsb>
<msb>2</msb>
<enumeratedValues>
@@ -2292,13 +2302,13 @@
<registers>
<register>
<name>TASKS_CONSTLAT</name>
- <description>Enable constant latency mode</description>
+ <description>Enable Constant Latency mode</description>
<addressOffset>0x78</addressOffset>
<access>write-only</access>
<fields>
<field>
<name>TASKS_CONSTLAT</name>
- <description>Enable constant latency mode</description>
+ <description>Enable Constant Latency mode</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
@@ -2313,13 +2323,13 @@
</register>
<register>
<name>TASKS_LOWPWR</name>
- <description>Enable low power mode (variable latency)</description>
+ <description>Enable Low-power mode (variable latency)</description>
<addressOffset>0x7C</addressOffset>
<access>write-only</access>
<fields>
<field>
<name>TASKS_LOWPWR</name>
- <description>Enable low power mode (variable latency)</description>
+ <description>Enable Low-power mode (variable latency)</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
@@ -3357,7 +3367,7 @@
</register>
<register>
<name>DCDCEN</name>
- <description>Enable DC/DC converter for REG1 stage.</description>
+ <description>Enable DC/DC converter for REG1 stage</description>
<addressOffset>0x578</addressOffset>
<access>read-write</access>
<fields>
@@ -3383,7 +3393,7 @@
</register>
<register>
<name>DCDCEN0</name>
- <description>Enable DC/DC converter for REG0 stage.</description>
+ <description>Enable DC/DC converter for REG0 stage</description>
<addressOffset>0x580</addressOffset>
<access>read-write</access>
<fields>
@@ -49229,13 +49239,13 @@
<dim>0x8</dim>
<dimIncrement>0x4</dimIncrement>
<name>EVENTS_ENDEPIN[%s]</name>
- <description>Description collection: The whole EPIN[n] buffer has been consumed. The RAM buffer can be accessed safely by software.</description>
+ <description>Description collection: The whole EPIN[n] buffer has been consumed. The buffer can be accessed safely by software.</description>
<addressOffset>0x108</addressOffset>
<access>read-write</access>
<fields>
<field>
<name>EVENTS_ENDEPIN</name>
- <description>The whole EPIN[n] buffer has been consumed. The RAM buffer can be accessed safely by software.</description>
+ <description>The whole EPIN[n] buffer has been consumed. The buffer can be accessed safely by software.</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
@@ -49281,13 +49291,13 @@
</register>
<register>
<name>EVENTS_ENDISOIN</name>
- <description>The whole ISOIN buffer has been consumed. The RAM buffer can be accessed safely by software.</description>
+ <description>The whole ISOIN buffer has been consumed. The buffer can be accessed safely by software.</description>
<addressOffset>0x12C</addressOffset>
<access>read-write</access>
<fields>
<field>
<name>EVENTS_ENDISOIN</name>
- <description>The whole ISOIN buffer has been consumed. The RAM buffer can be accessed safely by software.</description>
+ <description>The whole ISOIN buffer has been consumed. The buffer can be accessed safely by software.</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
@@ -49309,13 +49319,13 @@
<dim>0x8</dim>
<dimIncrement>0x4</dimIncrement>
<name>EVENTS_ENDEPOUT[%s]</name>
- <description>Description collection: The whole EPOUT[n] buffer has been consumed. The RAM buffer can be accessed safely by software.</description>
+ <description>Description collection: The whole EPOUT[n] buffer has been consumed. The buffer can be accessed safely by software.</description>
<addressOffset>0x130</addressOffset>
<access>read-write</access>
<fields>
<field>
<name>EVENTS_ENDEPOUT</name>
- <description>The whole EPOUT[n] buffer has been consumed. The RAM buffer can be accessed safely by software.</description>
+ <description>The whole EPOUT[n] buffer has been consumed. The buffer can be accessed safely by software.</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
@@ -49335,13 +49345,13 @@
</register>
<register>
<name>EVENTS_ENDISOOUT</name>
- <description>The whole ISOOUT buffer has been consumed. The RAM buffer can be accessed safely by software.</description>
+ <description>The whole ISOOUT buffer has been consumed. The buffer can be accessed safely by software.</description>
<addressOffset>0x150</addressOffset>
<access>read-write</access>
<fields>
<field>
<name>EVENTS_ENDISOOUT</name>
- <description>The whole ISOOUT buffer has been consumed. The RAM buffer can be accessed safely by software.</description>
+ <description>The whole ISOOUT buffer has been consumed. The buffer can be accessed safely by software.</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
@@ -53093,7 +53103,7 @@
<fields>
<field>
<name>PTR</name>
- <description>Data pointer. Accepts any address in Data RAM.</description>
+ <description>Data pointer</description>
<lsb>0</lsb>
<msb>31</msb>
</field>
@@ -53142,7 +53152,7 @@
<fields>
<field>
<name>PTR</name>
- <description>Data pointer. Accepts any address in Data RAM.</description>
+ <description>Data pointer</description>
<lsb>0</lsb>
<msb>31</msb>
</field>
@@ -53193,7 +53203,7 @@
<fields>
<field>
<name>PTR</name>
- <description>Data pointer. Accepts any address in Data RAM.</description>
+ <description>Data pointer</description>
<lsb>0</lsb>
<msb>31</msb>
</field>
@@ -53242,7 +53252,7 @@
<fields>
<field>
<name>PTR</name>
- <description>Data pointer. Accepts any address in Data RAM.</description>
+ <description>Data pointer</description>
<lsb>0</lsb>
<msb>31</msb>
</field>
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf52840_bitfields.h b/third_party/NordicSemiconductor/nrfx/mdk/nrf52840_bitfields.h
index 99cce73..5277c63 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/nrf52840_bitfields.h
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf52840_bitfields.h
@@ -1599,6 +1599,7 @@
/* Bits 31..0 : Part code */
#define FICR_INFO_PART_PART_Pos (0UL) /*!< Position of PART field. */
#define FICR_INFO_PART_PART_Msk (0xFFFFFFFFUL << FICR_INFO_PART_PART_Pos) /*!< Bit mask of PART field. */
+#define FICR_INFO_PART_PART_N52833 (0x52833UL) /*!< nRF52833 */
#define FICR_INFO_PART_PART_N52840 (0x52840UL) /*!< nRF52840 */
#define FICR_INFO_PART_PART_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */
@@ -1624,6 +1625,7 @@
#define FICR_INFO_PACKAGE_PACKAGE_Pos (0UL) /*!< Position of PACKAGE field. */
#define FICR_INFO_PACKAGE_PACKAGE_Msk (0xFFFFFFFFUL << FICR_INFO_PACKAGE_PACKAGE_Pos) /*!< Bit mask of PACKAGE field. */
#define FICR_INFO_PACKAGE_PACKAGE_QI (0x2004UL) /*!< QIxx - 73-pin aQFN */
+#define FICR_INFO_PACKAGE_PACKAGE_CK (0x2005UL) /*!< CKxx - WLCSP */
#define FICR_INFO_PACKAGE_PACKAGE_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */
/* Register: FICR_INFO_RAM */
@@ -1781,7 +1783,7 @@
#define FICR_TEMP_T4_T_Msk (0xFFUL << FICR_TEMP_T4_T_Pos) /*!< Bit mask of T field. */
/* Register: FICR_NFC_TAGHEADER0 */
-/* Description: Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */
+/* Description: Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST, and NFCID1_LAST. */
/* Bits 31..24 : Unique identifier byte 3 */
#define FICR_NFC_TAGHEADER0_UD3_Pos (24UL) /*!< Position of UD3 field. */
@@ -1800,7 +1802,7 @@
#define FICR_NFC_TAGHEADER0_MFGID_Msk (0xFFUL << FICR_NFC_TAGHEADER0_MFGID_Pos) /*!< Bit mask of MFGID field. */
/* Register: FICR_NFC_TAGHEADER1 */
-/* Description: Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */
+/* Description: Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST, and NFCID1_LAST. */
/* Bits 31..24 : Unique identifier byte 7 */
#define FICR_NFC_TAGHEADER1_UD7_Pos (24UL) /*!< Position of UD7 field. */
@@ -1819,7 +1821,7 @@
#define FICR_NFC_TAGHEADER1_UD4_Msk (0xFFUL << FICR_NFC_TAGHEADER1_UD4_Pos) /*!< Bit mask of UD4 field. */
/* Register: FICR_NFC_TAGHEADER2 */
-/* Description: Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */
+/* Description: Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST, and NFCID1_LAST. */
/* Bits 31..24 : Unique identifier byte 11 */
#define FICR_NFC_TAGHEADER2_UD11_Pos (24UL) /*!< Position of UD11 field. */
@@ -1838,7 +1840,7 @@
#define FICR_NFC_TAGHEADER2_UD8_Msk (0xFFUL << FICR_NFC_TAGHEADER2_UD8_Pos) /*!< Bit mask of UD8 field. */
/* Register: FICR_NFC_TAGHEADER3 */
-/* Description: Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */
+/* Description: Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST, and NFCID1_LAST. */
/* Bits 31..24 : Unique identifier byte 15 */
#define FICR_NFC_TAGHEADER3_UD15_Pos (24UL) /*!< Position of UD15 field. */
@@ -7015,17 +7017,17 @@
/* Description: Power control */
/* Register: POWER_TASKS_CONSTLAT */
-/* Description: Enable constant latency mode */
+/* Description: Enable Constant Latency mode */
-/* Bit 0 : Enable constant latency mode */
+/* Bit 0 : Enable Constant Latency mode */
#define POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Pos (0UL) /*!< Position of TASKS_CONSTLAT field. */
#define POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Msk (0x1UL << POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Pos) /*!< Bit mask of TASKS_CONSTLAT field. */
#define POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Trigger (1UL) /*!< Trigger task */
/* Register: POWER_TASKS_LOWPWR */
-/* Description: Enable low power mode (variable latency) */
+/* Description: Enable Low-power mode (variable latency) */
-/* Bit 0 : Enable low power mode (variable latency) */
+/* Bit 0 : Enable Low-power mode (variable latency) */
#define POWER_TASKS_LOWPWR_TASKS_LOWPWR_Pos (0UL) /*!< Position of TASKS_LOWPWR field. */
#define POWER_TASKS_LOWPWR_TASKS_LOWPWR_Msk (0x1UL << POWER_TASKS_LOWPWR_TASKS_LOWPWR_Pos) /*!< Bit mask of TASKS_LOWPWR field. */
#define POWER_TASKS_LOWPWR_TASKS_LOWPWR_Trigger (1UL) /*!< Trigger task */
@@ -7341,7 +7343,7 @@
#define POWER_GPREGRET2_GPREGRET_Msk (0xFFUL << POWER_GPREGRET2_GPREGRET_Pos) /*!< Bit mask of GPREGRET field. */
/* Register: POWER_DCDCEN */
-/* Description: Enable DC/DC converter for REG1 stage. */
+/* Description: Enable DC/DC converter for REG1 stage */
/* Bit 0 : Enable DC/DC converter for REG1 stage. */
#define POWER_DCDCEN_DCDCEN_Pos (0UL) /*!< Position of DCDCEN field. */
@@ -7350,7 +7352,7 @@
#define POWER_DCDCEN_DCDCEN_Enabled (1UL) /*!< Enable */
/* Register: POWER_DCDCEN0 */
-/* Description: Enable DC/DC converter for REG0 stage. */
+/* Description: Enable DC/DC converter for REG0 stage */
/* Bit 0 : Enable DC/DC converter for REG0 stage. */
#define POWER_DCDCEN0_DCDCEN_Pos (0UL) /*!< Position of DCDCEN field. */
@@ -15828,9 +15830,9 @@
#define UICR_DEBUGCTRL_CPUNIDEN_Enabled (0xFFUL) /*!< Enable CPU ITM and ETM functionality (default behavior) */
/* Register: UICR_REGOUT0 */
-/* Description: GPIO reference voltage / external output supply voltage in high voltage mode */
+/* Description: Output voltage from REG0 regulator stage. The maximum output voltage from this stage is given as VDDH - VREG0DROP. */
-/* Bits 2..0 : Output voltage from of REG0 regulator stage. The maximum output voltage from this stage is given as VDDH - VEXDIF. */
+/* Bits 2..0 : Output voltage from REG0 regulator stage. */
#define UICR_REGOUT0_VOUT_Pos (0UL) /*!< Position of VOUT field. */
#define UICR_REGOUT0_VOUT_Msk (0x7UL << UICR_REGOUT0_VOUT_Pos) /*!< Bit mask of VOUT field. */
#define UICR_REGOUT0_VOUT_1V8 (0UL) /*!< 1.8 V */
@@ -15936,9 +15938,9 @@
#define USBD_EVENTS_STARTED_EVENTS_STARTED_Generated (1UL) /*!< Event generated */
/* Register: USBD_EVENTS_ENDEPIN */
-/* Description: Description collection: The whole EPIN[n] buffer has been consumed. The RAM buffer can be accessed safely by software. */
+/* Description: Description collection: The whole EPIN[n] buffer has been consumed. The buffer can be accessed safely by software. */
-/* Bit 0 : The whole EPIN[n] buffer has been consumed. The RAM buffer can be accessed safely by software. */
+/* Bit 0 : The whole EPIN[n] buffer has been consumed. The buffer can be accessed safely by software. */
#define USBD_EVENTS_ENDEPIN_EVENTS_ENDEPIN_Pos (0UL) /*!< Position of EVENTS_ENDEPIN field. */
#define USBD_EVENTS_ENDEPIN_EVENTS_ENDEPIN_Msk (0x1UL << USBD_EVENTS_ENDEPIN_EVENTS_ENDEPIN_Pos) /*!< Bit mask of EVENTS_ENDEPIN field. */
#define USBD_EVENTS_ENDEPIN_EVENTS_ENDEPIN_NotGenerated (0UL) /*!< Event not generated */
@@ -15954,27 +15956,27 @@
#define USBD_EVENTS_EP0DATADONE_EVENTS_EP0DATADONE_Generated (1UL) /*!< Event generated */
/* Register: USBD_EVENTS_ENDISOIN */
-/* Description: The whole ISOIN buffer has been consumed. The RAM buffer can be accessed safely by software. */
+/* Description: The whole ISOIN buffer has been consumed. The buffer can be accessed safely by software. */
-/* Bit 0 : The whole ISOIN buffer has been consumed. The RAM buffer can be accessed safely by software. */
+/* Bit 0 : The whole ISOIN buffer has been consumed. The buffer can be accessed safely by software. */
#define USBD_EVENTS_ENDISOIN_EVENTS_ENDISOIN_Pos (0UL) /*!< Position of EVENTS_ENDISOIN field. */
#define USBD_EVENTS_ENDISOIN_EVENTS_ENDISOIN_Msk (0x1UL << USBD_EVENTS_ENDISOIN_EVENTS_ENDISOIN_Pos) /*!< Bit mask of EVENTS_ENDISOIN field. */
#define USBD_EVENTS_ENDISOIN_EVENTS_ENDISOIN_NotGenerated (0UL) /*!< Event not generated */
#define USBD_EVENTS_ENDISOIN_EVENTS_ENDISOIN_Generated (1UL) /*!< Event generated */
/* Register: USBD_EVENTS_ENDEPOUT */
-/* Description: Description collection: The whole EPOUT[n] buffer has been consumed. The RAM buffer can be accessed safely by software. */
+/* Description: Description collection: The whole EPOUT[n] buffer has been consumed. The buffer can be accessed safely by software. */
-/* Bit 0 : The whole EPOUT[n] buffer has been consumed. The RAM buffer can be accessed safely by software. */
+/* Bit 0 : The whole EPOUT[n] buffer has been consumed. The buffer can be accessed safely by software. */
#define USBD_EVENTS_ENDEPOUT_EVENTS_ENDEPOUT_Pos (0UL) /*!< Position of EVENTS_ENDEPOUT field. */
#define USBD_EVENTS_ENDEPOUT_EVENTS_ENDEPOUT_Msk (0x1UL << USBD_EVENTS_ENDEPOUT_EVENTS_ENDEPOUT_Pos) /*!< Bit mask of EVENTS_ENDEPOUT field. */
#define USBD_EVENTS_ENDEPOUT_EVENTS_ENDEPOUT_NotGenerated (0UL) /*!< Event not generated */
#define USBD_EVENTS_ENDEPOUT_EVENTS_ENDEPOUT_Generated (1UL) /*!< Event generated */
/* Register: USBD_EVENTS_ENDISOOUT */
-/* Description: The whole ISOOUT buffer has been consumed. The RAM buffer can be accessed safely by software. */
+/* Description: The whole ISOOUT buffer has been consumed. The buffer can be accessed safely by software. */
-/* Bit 0 : The whole ISOOUT buffer has been consumed. The RAM buffer can be accessed safely by software. */
+/* Bit 0 : The whole ISOOUT buffer has been consumed. The buffer can be accessed safely by software. */
#define USBD_EVENTS_ENDISOOUT_EVENTS_ENDISOOUT_Pos (0UL) /*!< Position of EVENTS_ENDISOOUT field. */
#define USBD_EVENTS_ENDISOOUT_EVENTS_ENDISOOUT_Msk (0x1UL << USBD_EVENTS_ENDISOOUT_EVENTS_ENDISOOUT_Pos) /*!< Bit mask of EVENTS_ENDISOOUT field. */
#define USBD_EVENTS_ENDISOOUT_EVENTS_ENDISOOUT_NotGenerated (0UL) /*!< Event not generated */
@@ -17136,7 +17138,7 @@
/* Register: USBD_EPIN_PTR */
/* Description: Description cluster: Data pointer */
-/* Bits 31..0 : Data pointer. Accepts any address in Data RAM. */
+/* Bits 31..0 : Data pointer */
#define USBD_EPIN_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
#define USBD_EPIN_PTR_PTR_Msk (0xFFFFFFFFUL << USBD_EPIN_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
@@ -17157,7 +17159,7 @@
/* Register: USBD_ISOIN_PTR */
/* Description: Data pointer */
-/* Bits 31..0 : Data pointer. Accepts any address in Data RAM. */
+/* Bits 31..0 : Data pointer */
#define USBD_ISOIN_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
#define USBD_ISOIN_PTR_PTR_Msk (0xFFFFFFFFUL << USBD_ISOIN_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
@@ -17178,7 +17180,7 @@
/* Register: USBD_EPOUT_PTR */
/* Description: Description cluster: Data pointer */
-/* Bits 31..0 : Data pointer. Accepts any address in Data RAM. */
+/* Bits 31..0 : Data pointer */
#define USBD_EPOUT_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
#define USBD_EPOUT_PTR_PTR_Msk (0xFFFFFFFFUL << USBD_EPOUT_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
@@ -17199,7 +17201,7 @@
/* Register: USBD_ISOOUT_PTR */
/* Description: Data pointer */
-/* Bits 31..0 : Data pointer. Accepts any address in Data RAM. */
+/* Bits 31..0 : Data pointer */
#define USBD_ISOOUT_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
#define USBD_ISOOUT_PTR_PTR_Msk (0xFFFFFFFFUL << USBD_ISOOUT_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf52840_peripherals.h b/third_party/NordicSemiconductor/nrfx/mdk/nrf52840_peripherals.h
index 415412f..731842b 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/nrf52840_peripherals.h
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf52840_peripherals.h
@@ -46,6 +46,7 @@
#define POWER_FEATURE_RAM_REGISTERS_COUNT 9
#define POWER_FEATURE_VDDH_PRESENT
+#define POWER_FEATURE_VDDH_DCDC_PRESENT
/* Floating Point Unit */
#define FPU_PRESENT
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf52_to_nrf52833.h b/third_party/NordicSemiconductor/nrfx/mdk/nrf52_to_nrf52833.h
new file mode 100644
index 0000000..8a541cc
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf52_to_nrf52833.h
@@ -0,0 +1,150 @@
+/*
+
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+
+2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ contributors may be used to endorse or promote products derived from this
+ software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
+
+*/
+
+#ifndef NRF52_TO_NRF52833_H
+#define NRF52_TO_NRF52833_H
+
+/*lint ++flb "Enter library region */
+
+/* This file is given to prevent your SW from not compiling with the name changes between nRF51 or nRF52832 and nRF52840 devices.
+ * It redefines the old nRF51 or nRF52832 names into the new ones as long as the functionality is still supported. If the
+ * functionality is gone, there old names are not defined, so compilation will fail. Note that also includes macros
+ * from the nrf52_namechange.h file. */
+
+/* Differences between latest nRF52 headers and nRF52840 headers. */
+
+/* UART */
+/* The registers PSELRTS, PSELTXD, PSELCTS, PSELRXD were restructured into a struct. */
+#ifndef PSELRTS
+ #define PSELRTS PSEL.RTS
+#endif
+#ifndef PSELTXD
+ #define PSELTXD PSEL.TXD
+#endif
+#ifndef PSELCTS
+ #define PSELCTS PSEL.CTS
+#endif
+#ifndef PSELRXD
+ #define PSELRXD PSEL.RXD
+#endif
+
+/* TWI */
+/* The registers PSELSCL, PSELSDA were restructured into a struct. */
+#ifndef PSELSCL
+ #define PSELSCL PSEL.SCL
+#endif
+#ifndef PSELSDA
+ #define PSELSDA PSEL.SDA
+#endif
+
+/* LPCOMP */
+/* The hysteresis control enumerated values has changed name for nRF52833 devices. */
+#ifndef LPCOMP_HYST_HYST_NoHyst
+ #define LPCOMP_HYST_HYST_NoHyst LPCOMP_HYST_HYST_Disabled
+#endif
+#ifndef LPCOMP_HYST_HYST_Hyst50mV
+ #define LPCOMP_HYST_HYST_Hyst50mV LPCOMP_HYST_HYST_Enabled
+#endif
+
+
+/* From nrf52_name_change.h. Several macros changed in different versions of nRF52 headers. By defining the following, any code written for any version of nRF52 headers will still compile. */
+
+/* I2S */
+/* Several enumerations changed case. Adding old macros to keep compilation compatibility. */
+#ifndef I2S_ENABLE_ENABLE_DISABLE
+ #define I2S_ENABLE_ENABLE_DISABLE I2S_ENABLE_ENABLE_Disabled
+#endif
+#ifndef I2S_ENABLE_ENABLE_ENABLE
+ #define I2S_ENABLE_ENABLE_ENABLE I2S_ENABLE_ENABLE_Enabled
+#endif
+#ifndef I2S_CONFIG_MODE_MODE_MASTER
+ #define I2S_CONFIG_MODE_MODE_MASTER I2S_CONFIG_MODE_MODE_Master
+#endif
+#ifndef I2S_CONFIG_MODE_MODE_SLAVE
+ #define I2S_CONFIG_MODE_MODE_SLAVE I2S_CONFIG_MODE_MODE_Slave
+#endif
+#ifndef I2S_CONFIG_RXEN_RXEN_DISABLE
+ #define I2S_CONFIG_RXEN_RXEN_DISABLE I2S_CONFIG_RXEN_RXEN_Disabled
+#endif
+#ifndef I2S_CONFIG_RXEN_RXEN_ENABLE
+ #define I2S_CONFIG_RXEN_RXEN_ENABLE I2S_CONFIG_RXEN_RXEN_Enabled
+#endif
+#ifndef I2S_CONFIG_TXEN_TXEN_DISABLE
+ #define I2S_CONFIG_TXEN_TXEN_DISABLE I2S_CONFIG_TXEN_TXEN_Disabled
+#endif
+#ifndef I2S_CONFIG_TXEN_TXEN_ENABLE
+ #define I2S_CONFIG_TXEN_TXEN_ENABLE I2S_CONFIG_TXEN_TXEN_Enabled
+#endif
+#ifndef I2S_CONFIG_MCKEN_MCKEN_DISABLE
+ #define I2S_CONFIG_MCKEN_MCKEN_DISABLE I2S_CONFIG_MCKEN_MCKEN_Disabled
+#endif
+#ifndef I2S_CONFIG_MCKEN_MCKEN_ENABLE
+ #define I2S_CONFIG_MCKEN_MCKEN_ENABLE I2S_CONFIG_MCKEN_MCKEN_Enabled
+#endif
+#ifndef I2S_CONFIG_SWIDTH_SWIDTH_8BIT
+ #define I2S_CONFIG_SWIDTH_SWIDTH_8BIT I2S_CONFIG_SWIDTH_SWIDTH_8Bit
+#endif
+#ifndef I2S_CONFIG_SWIDTH_SWIDTH_16BIT
+ #define I2S_CONFIG_SWIDTH_SWIDTH_16BIT I2S_CONFIG_SWIDTH_SWIDTH_16Bit
+#endif
+#ifndef I2S_CONFIG_SWIDTH_SWIDTH_24BIT
+ #define I2S_CONFIG_SWIDTH_SWIDTH_24BIT I2S_CONFIG_SWIDTH_SWIDTH_24Bit
+#endif
+#ifndef I2S_CONFIG_ALIGN_ALIGN_LEFT
+ #define I2S_CONFIG_ALIGN_ALIGN_LEFT I2S_CONFIG_ALIGN_ALIGN_Left
+#endif
+#ifndef I2S_CONFIG_ALIGN_ALIGN_RIGHT
+ #define I2S_CONFIG_ALIGN_ALIGN_RIGHT I2S_CONFIG_ALIGN_ALIGN_Right
+#endif
+#ifndef I2S_CONFIG_FORMAT_FORMAT_ALIGNED
+ #define I2S_CONFIG_FORMAT_FORMAT_ALIGNED I2S_CONFIG_FORMAT_FORMAT_Aligned
+#endif
+#ifndef I2S_CONFIG_CHANNELS_CHANNELS_STEREO
+ #define I2S_CONFIG_CHANNELS_CHANNELS_STEREO I2S_CONFIG_CHANNELS_CHANNELS_Stereo
+#endif
+#ifndef I2S_CONFIG_CHANNELS_CHANNELS_LEFT
+ #define I2S_CONFIG_CHANNELS_CHANNELS_LEFT I2S_CONFIG_CHANNELS_CHANNELS_Left
+#endif
+#ifndef I2S_CONFIG_CHANNELS_CHANNELS_RIGHT
+ #define I2S_CONFIG_CHANNELS_CHANNELS_RIGHT I2S_CONFIG_CHANNELS_CHANNELS_Right
+#endif
+
+/* LPCOMP */
+/* Corrected typo in RESULT register. */
+#ifndef LPCOMP_RESULT_RESULT_Bellow
+ #define LPCOMP_RESULT_RESULT_Bellow LPCOMP_RESULT_RESULT_Below
+#endif
+
+/*lint --flb "Leave library region" */
+
+#endif /* NRF52_TO_NRF52833_H */
+
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf9160.h b/third_party/NordicSemiconductor/nrfx/mdk/nrf9160.h
index c8d3eea..505034d 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/nrf9160.h
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf9160.h
@@ -30,10 +30,10 @@
* @file nrf9160.h
* @brief CMSIS HeaderFile
* @version 1
- * @date 17. January 2019
- * @note Generated by SVDConv V3.3.18 on Thursday, 17.01.2019 17:25:40
+ * @date 23. August 2019
+ * @note Generated by SVDConv V3.3.25 on Friday, 23.08.2019 12:15:14
* from File 'nrf9160.svd',
- * last modified on Thursday, 17.01.2019 16:25:35
+ * last modified on Friday, 23.08.2019 10:15:09
*/
@@ -127,10 +127,10 @@
#define __NVIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels */
#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
#define __VTOR_PRESENT 1 /*!< Set to 1 if CPU supports Vector Table Offset Register */
-#define __MPU_PRESENT 1 /*!< MPU present or not */
-#define __FPU_PRESENT 1 /*!< FPU present or not */
+#define __MPU_PRESENT 1 /*!< MPU present */
+#define __FPU_PRESENT 1 /*!< FPU present */
#define __FPU_DP 0 /*!< Double Precision FPU */
-#define __SAU_REGION_PRESENT 0 /*!< SAU present or not */
+#define __SAU_REGION_PRESENT 0 /*!< SAU present */
/** @} */ /* End of group Configuration_of_CMSIS */
@@ -214,8 +214,8 @@
address range which the CPU can potentially
read! */
__IOM uint32_t PERM; /*!< (@ 0x00000004) Description cluster: Define permissions for the
- key slot with ID=n+1. Bits 0-15 and 16-31
- can only be written once. */
+ key slot. Bits 0-15 and 16-31 can only be
+ written when equal to 0xFFFF. */
} UICR_KEYSLOT_CONFIG_Type; /*!< Size = 8 (0x8) */
@@ -224,7 +224,7 @@
*/
typedef struct {
__IOM uint32_t VALUE[4]; /*!< (@ 0x00000000) Description collection: Define bits [31+o*32:0+o*32]
- of value assigned to KMU key slot ID=n+1 */
+ of value assigned to KMU key slot. */
} UICR_KEYSLOT_KEY_Type; /*!< Size = 16 (0x10) */
@@ -343,7 +343,7 @@
__IM uint32_t RESERVED[30];
__IOM uint32_t TXDATA; /*!< (@ 0x00000080) Data sent from the CPU to the debugger */
__IM uint32_t TXSTATUS; /*!< (@ 0x00000084) Status to indicate if data sent from the CPU
- to the debugger status has been read */
+ to the debugger has been read */
} CTRLAPPERI_MAILBOX_Type; /*!< Size = 136 (0x88) */
@@ -351,8 +351,9 @@
* @brief CTRLAPPERI_ERASEPROTECT [ERASEPROTECT] (Unspecified)
*/
typedef struct {
- __IOM uint32_t LOCK; /*!< (@ 0x00000000) Lock ERASEALL mechanism */
- __IOM uint32_t DISABLE; /*!< (@ 0x00000004) Unlock ERASEPROTECT and perform ERASEALL */
+ __IOM uint32_t LOCK; /*!< (@ 0x00000000) Lock register ERASEPROTECT.DISABLE from being
+ written until next reset */
+ __IOM uint32_t DISABLE; /*!< (@ 0x00000004) Disable ERASEPROTECT and perform ERASEALL */
} CTRLAPPERI_ERASEPROTECT_Type; /*!< Size = 8 (0x8) */
@@ -406,7 +407,8 @@
__IOM uint32_t PTR; /*!< (@ 0x00000000) RXD data pointer */
__IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of bytes in receive buffer */
__IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of bytes received in last granted transaction */
-} SPIS_RXD_Type; /*!< Size = 12 (0xc) */
+ __IOM uint32_t LIST; /*!< (@ 0x0000000C) EasyDMA list type */
+} SPIS_RXD_Type; /*!< Size = 16 (0x10) */
/**
@@ -416,7 +418,8 @@
__IOM uint32_t PTR; /*!< (@ 0x00000000) TXD data pointer */
__IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of bytes in transmit buffer */
__IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of bytes transmitted in last granted transaction */
-} SPIS_TXD_Type; /*!< Size = 12 (0xc) */
+ __IOM uint32_t LIST; /*!< (@ 0x0000000C) EasyDMA list type */
+} SPIS_TXD_Type; /*!< Size = 16 (0x10) */
/**
@@ -466,7 +469,8 @@
__IOM uint32_t PTR; /*!< (@ 0x00000000) RXD Data pointer */
__IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of bytes in RXD buffer */
__IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of bytes transferred in the last RXD transaction */
-} TWIS_RXD_Type; /*!< Size = 12 (0xc) */
+ __IOM uint32_t LIST; /*!< (@ 0x0000000C) EasyDMA list type */
+} TWIS_RXD_Type; /*!< Size = 16 (0x10) */
/**
@@ -476,7 +480,8 @@
__IOM uint32_t PTR; /*!< (@ 0x00000000) TXD Data pointer */
__IOM uint32_t MAXCNT; /*!< (@ 0x00000004) Maximum number of bytes in TXD buffer */
__IM uint32_t AMOUNT; /*!< (@ 0x00000008) Number of bytes transferred in the last TXD transaction */
-} TWIS_TXD_Type; /*!< Size = 12 (0xc) */
+ __IOM uint32_t LIST; /*!< (@ 0x0000000C) EasyDMA list type */
+} TWIS_TXD_Type; /*!< Size = 16 (0x10) */
/**
@@ -742,7 +747,8 @@
__IOM uint32_t SECUREAPPROTECT; /*!< (@ 0x0000002C) Secure access port protection */
__IOM uint32_t ERASEPROTECT; /*!< (@ 0x00000030) Erase protection */
__IM uint32_t RESERVED3[53];
- __IOM uint32_t OTP[190]; /*!< (@ 0x00000108) Description collection: OTP bits [31+n*32:0+n*32]. */
+ __IOM uint32_t OTP[190]; /*!< (@ 0x00000108) Description collection: One time programmable
+ memory */
__IOM UICR_KEYSLOT_Type KEYSLOT; /*!< (@ 0x00000400) Unspecified */
} NRF_UICR_Type; /*!< Size = 4096 (0x1000) */
@@ -758,7 +764,9 @@
*/
typedef struct { /*!< (@ 0xE0080000) TAD_S Structure */
- __IM uint32_t RESERVED[320];
+ __OM uint32_t CLOCKSTART; /*!< (@ 0x00000000) Start all trace and debug clocks. */
+ __OM uint32_t CLOCKSTOP; /*!< (@ 0x00000004) Stop all trace and debug clocks. */
+ __IM uint32_t RESERVED[318];
__IOM uint32_t ENABLE; /*!< (@ 0x00000500) Enable debug domain and aquire selected GPIOs */
__IOM TAD_PSEL_Type PSEL; /*!< (@ 0x00000504) Unspecified */
__IOM uint32_t TRACEPORTSPEED; /*!< (@ 0x00000518) Clocking options for the Trace Port debug interface */
@@ -825,10 +833,8 @@
typedef struct { /*!< (@ 0x40004000) REGULATORS_NS Structure */
__IM uint32_t RESERVED[320];
__OM uint32_t SYSTEMOFF; /*!< (@ 0x00000500) System OFF register */
- __IM uint32_t RESERVED1[3];
- __IOM uint32_t POFCON; /*!< (@ 0x00000510) Power-fail comparator configuration */
- __IM uint32_t RESERVED2[25];
- __IOM uint32_t DCDCEN; /*!< (@ 0x00000578) Enable DC/DC mode of the main voltage regulator */
+ __IM uint32_t RESERVED1[29];
+ __IOM uint32_t DCDCEN; /*!< (@ 0x00000578) Enable DC/DC mode of the main voltage regulator. */
} NRF_REGULATORS_Type; /*!< Size = 1404 (0x57c) */
@@ -1005,7 +1011,7 @@
__IOM uint32_t CONFIG; /*!< (@ 0x00000554) Configuration register */
__IM uint32_t RESERVED20[26];
__IOM uint32_t ORC; /*!< (@ 0x000005C0) Over-read character. Character clocked out in
- case and over-read of the TXD buffer. */
+ case an over-read of the TXD buffer. */
} NRF_SPIM_Type; /*!< Size = 1476 (0x5c4) */
@@ -1054,14 +1060,12 @@
__IOM SPIS_PSEL_Type PSEL; /*!< (@ 0x00000508) Unspecified */
__IM uint32_t RESERVED14[7];
__IOM SPIS_RXD_Type RXD; /*!< (@ 0x00000534) Unspecified */
- __IM uint32_t RESERVED15;
__IOM SPIS_TXD_Type TXD; /*!< (@ 0x00000544) Unspecified */
- __IM uint32_t RESERVED16;
__IOM uint32_t CONFIG; /*!< (@ 0x00000554) Configuration register */
- __IM uint32_t RESERVED17;
+ __IM uint32_t RESERVED15;
__IOM uint32_t DEF; /*!< (@ 0x0000055C) Default character. Character clocked out in case
of an ignored transaction. */
- __IM uint32_t RESERVED18[24];
+ __IM uint32_t RESERVED16[24];
__IOM uint32_t ORC; /*!< (@ 0x000005C0) Over-read character */
} NRF_SPIS_Type; /*!< Size = 1476 (0x5c4) */
@@ -1100,9 +1104,8 @@
__IM uint32_t RESERVED8[7];
__IOM uint32_t EVENTS_ERROR; /*!< (@ 0x00000124) TWI error */
__IM uint32_t RESERVED9[8];
- __IOM uint32_t EVENTS_SUSPENDED; /*!< (@ 0x00000148) Last byte has been sent out after the SUSPEND
- task has been issued, TWI traffic is now
- suspended. */
+ __IOM uint32_t EVENTS_SUSPENDED; /*!< (@ 0x00000148) SUSPEND task has been issued, TWI traffic is
+ now suspended. */
__IOM uint32_t EVENTS_RXSTARTED; /*!< (@ 0x0000014C) Receive sequence started */
__IOM uint32_t EVENTS_TXSTARTED; /*!< (@ 0x00000150) Transmit sequence started */
__IM uint32_t RESERVED10[2];
@@ -1206,14 +1209,13 @@
__IOM TWIS_PSEL_Type PSEL; /*!< (@ 0x00000508) Unspecified */
__IM uint32_t RESERVED19[9];
__IOM TWIS_RXD_Type RXD; /*!< (@ 0x00000534) RXD EasyDMA channel */
- __IM uint32_t RESERVED20;
__IOM TWIS_TXD_Type TXD; /*!< (@ 0x00000544) TXD EasyDMA channel */
- __IM uint32_t RESERVED21[14];
+ __IM uint32_t RESERVED20[13];
__IOM uint32_t ADDRESS[2]; /*!< (@ 0x00000588) Description collection: TWI slave address n */
- __IM uint32_t RESERVED22;
+ __IM uint32_t RESERVED21;
__IOM uint32_t CONFIG; /*!< (@ 0x00000594) Configuration register for the address match
mechanism */
- __IM uint32_t RESERVED23[10];
+ __IM uint32_t RESERVED22[10];
__IOM uint32_t ORC; /*!< (@ 0x000005C0) Over-read character. Character sent out in case
of an over-read of the transmit buffer. */
} NRF_TWIS_Type; /*!< Size = 1476 (0x5c4) */
@@ -1460,7 +1462,9 @@
__IOM uint32_t BITMODE; /*!< (@ 0x00000508) Configure the number of bits used by the TIMER */
__IM uint32_t RESERVED8;
__IOM uint32_t PRESCALER; /*!< (@ 0x00000510) Timer prescaler register */
- __IM uint32_t RESERVED9[11];
+ __IOM uint32_t ONESHOTEN[6]; /*!< (@ 0x00000514) Description collection: Enable one-shot operation
+ for Capture/Compare channel n */
+ __IM uint32_t RESERVED9[5];
__IOM uint32_t CC[6]; /*!< (@ 0x00000540) Description collection: Capture/Compare register
n */
} NRF_TIMER_Type; /*!< Size = 1368 (0x558) */
@@ -1579,7 +1583,7 @@
/**
- * @brief Event Generator Unit 0 (EGU0_NS)
+ * @brief Event generator unit 0 (EGU0_NS)
*/
typedef struct { /*!< (@ 0x4001B000) EGU0_NS Structure */
@@ -1838,9 +1842,9 @@
typedef struct { /*!< (@ 0x40039000) KMU_NS Structure */
__OM uint32_t TASKS_PUSH_KEYSLOT; /*!< (@ 0x00000000) Push a key slot over secure APB */
__IM uint32_t RESERVED[63];
- __IOM uint32_t EVENTS_KEYSLOT_PUSHED; /*!< (@ 0x00000100) Key successfully pushed over secure APB */
- __IOM uint32_t EVENTS_KEYSLOT_REVOKED; /*!< (@ 0x00000104) Key has been revoked and cannot be tasked for
- selection */
+ __IOM uint32_t EVENTS_KEYSLOT_PUSHED; /*!< (@ 0x00000100) Key slot successfully pushed over secure APB */
+ __IOM uint32_t EVENTS_KEYSLOT_REVOKED; /*!< (@ 0x00000104) Key slot has been revoked and cannot be tasked
+ for selection */
__IOM uint32_t EVENTS_KEYSLOT_ERROR; /*!< (@ 0x00000108) No key slot selected, no destination address
defined, or error during push operation */
__IM uint32_t RESERVED1[125];
@@ -1851,7 +1855,7 @@
__IM uint32_t RESERVED2[63];
__IM uint32_t STATUS; /*!< (@ 0x0000040C) Status bits for KMU operation */
__IM uint32_t RESERVED3[60];
- __IOM uint32_t SELECTKEYSLOT; /*!< (@ 0x00000500) Select key slot ID to be read over AHB or pushed
+ __IOM uint32_t SELECTKEYSLOT; /*!< (@ 0x00000500) Select key slot to be read over AHB or pushed
over secure APB when TASKS_PUSH_KEYSLOT
is started */
} NRF_KMU_Type; /*!< Size = 1284 (0x504) */
@@ -1875,7 +1879,7 @@
__IM uint32_t RESERVED2[62];
__IOM uint32_t CONFIG; /*!< (@ 0x00000504) Configuration register */
__IM uint32_t RESERVED3;
- __IOM uint32_t ERASEALL; /*!< (@ 0x0000050C) Register for erasing all non-volatile user memory */
+ __OM uint32_t ERASEALL; /*!< (@ 0x0000050C) Register for erasing all non-volatile user memory */
__IM uint32_t RESERVED4[3];
__IOM uint32_t ERASEPAGEPARTIALCFG; /*!< (@ 0x0000051C) Register for partial erase configuration */
__IM uint32_t RESERVED5[8];
@@ -1886,13 +1890,7 @@
__IM uint32_t RESERVED7[13];
__IOM uint32_t CONFIGNS; /*!< (@ 0x00000584) Unspecified */
__OM uint32_t WRITEUICRNS; /*!< (@ 0x00000588) Non-secure APPROTECT enable register */
- __IM uint32_t RESERVED8[93];
- __IOM uint32_t FORCEONNVM; /*!< (@ 0x00000700) Force on all NVM supplies. Also see the internal
- section in the NVMC chapter. */
- __IM uint32_t RESERVED9[9];
- __IOM uint32_t FORCEOFFNVM; /*!< (@ 0x00000728) Force off NVM supply. Also see the internal section
- in the NVMC chapter. */
-} NRF_NVMC_Type; /*!< Size = 1836 (0x72c) */
+} NRF_NVMC_Type; /*!< Size = 1420 (0x58c) */
@@ -1913,6 +1911,44 @@
/* =========================================================================================================================== */
+/* ================ CC_HOST_RGF_S ================ */
+/* =========================================================================================================================== */
+
+
+/**
+ * @brief CRYPTOCELL HOST_RGF interface (CC_HOST_RGF_S)
+ */
+
+typedef struct { /*!< (@ 0x50840000) CC_HOST_RGF_S Structure */
+ __IM uint32_t RESERVED[1678];
+ __IOM uint32_t HOST_CRYPTOKEY_SEL; /*!< (@ 0x00001A38) AES hardware key select */
+ __IM uint32_t RESERVED1[4];
+ __IOM uint32_t HOST_IOT_KPRTL_LOCK; /*!< (@ 0x00001A4C) This write-once register is the K_PRTL lock register.
+ When this register is set, K_PRTL cannot
+ be used and a zeroed key will be used instead.
+ The value of this register is saved in the
+ CRYPTOCELL AO power domain. */
+ __IOM uint32_t HOST_IOT_KDR0; /*!< (@ 0x00001A50) This register holds bits 31:0 of K_DR. The value
+ of this register is saved in the CRYPTOCELL
+ AO power domain. Reading from this address
+ returns the K_DR valid status indicating
+ if K_DR is successfully retained. */
+ __OM uint32_t HOST_IOT_KDR1; /*!< (@ 0x00001A54) This register holds bits 63:32 of K_DR. The value
+ of this register is saved in the CRYPTOCELL
+ AO power domain. */
+ __OM uint32_t HOST_IOT_KDR2; /*!< (@ 0x00001A58) This register holds bits 95:64 of K_DR. The value
+ of this register is saved in the CRYPTOCELL
+ AO power domain. */
+ __OM uint32_t HOST_IOT_KDR3; /*!< (@ 0x00001A5C) This register holds bits 127:96 of K_DR. The
+ value of this register is saved in the CRYPTOCELL
+ AO power domain. */
+ __IOM uint32_t HOST_IOT_LCS; /*!< (@ 0x00001A60) Controls lifecycle state (LCS) for CRYPTOCELL
+ subsystem */
+} NRF_CC_HOST_RGF_Type; /*!< Size = 6756 (0x1a64) */
+
+
+
+/* =========================================================================================================================== */
/* ================ CRYPTOCELL_S ================ */
/* =========================================================================================================================== */
@@ -1949,9 +1985,9 @@
__IOM uint32_t LATCH; /*!< (@ 0x00000020) Latch register indicating what GPIO pins that
have met the criteria set in the PIN_CNF[n].SENSE
registers */
- __IOM uint32_t DETECTMODE; /*!< (@ 0x00000024) Select between default DETECT signal behaviour
+ __IOM uint32_t DETECTMODE; /*!< (@ 0x00000024) Select between default DETECT signal behavior
and LDETECT mode (For non-secure pin only) */
- __IOM uint32_t DETECTMODE_SEC; /*!< (@ 0x00000028) Select between default DETECT signal behaviour
+ __IOM uint32_t DETECTMODE_SEC; /*!< (@ 0x00000028) Select between default DETECT signal behavior
and LDETECT mode (For secure pin only) */
__IM uint32_t RESERVED1[117];
__IOM uint32_t PIN_CNF[32]; /*!< (@ 0x00000200) Description collection: Configuration of GPIO
@@ -2074,6 +2110,7 @@
#define NRF_NVMC_S_BASE 0x50039000UL
#define NRF_VMC_NS_BASE 0x4003A000UL
#define NRF_VMC_S_BASE 0x5003A000UL
+#define NRF_CC_HOST_RGF_S_BASE 0x50840000UL
#define NRF_CRYPTOCELL_S_BASE 0x50840000UL
#define NRF_P0_NS_BASE 0x40842500UL
#define NRF_P0_S_BASE 0x50842500UL
@@ -2193,6 +2230,7 @@
#define NRF_NVMC_S ((NRF_NVMC_Type*) NRF_NVMC_S_BASE)
#define NRF_VMC_NS ((NRF_VMC_Type*) NRF_VMC_NS_BASE)
#define NRF_VMC_S ((NRF_VMC_Type*) NRF_VMC_S_BASE)
+#define NRF_CC_HOST_RGF_S ((NRF_CC_HOST_RGF_Type*) NRF_CC_HOST_RGF_S_BASE)
#define NRF_CRYPTOCELL_S ((NRF_CRYPTOCELL_Type*) NRF_CRYPTOCELL_S_BASE)
#define NRF_P0_NS ((NRF_GPIO_Type*) NRF_P0_NS_BASE)
#define NRF_P0_S ((NRF_GPIO_Type*) NRF_P0_S_BASE)
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf9160.svd b/third_party/NordicSemiconductor/nrfx/mdk/nrf9160.svd
index 22befbb..d341753 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/nrf9160.svd
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf9160.svd
@@ -613,16 +613,24 @@
<dim>0xBE</dim>
<dimIncrement>0x4</dimIncrement>
<name>OTP[%s]</name>
- <description>Description collection: OTP bits [31+n*32:0+n*32].</description>
+ <description>Description collection: One time programmable memory</description>
<addressOffset>0x108</addressOffset>
<access>read-write</access>
<resetValue>0xFFFFFFFF</resetValue>
<fields>
<field>
- <name>OTP</name>
- <description>Bits [31+n*32:0+n*32] of OTP region</description>
+ <name>LOWER</name>
+ <description>Lower half word</description>
<lsb>0</lsb>
+ <msb>15</msb>
+ <access>read-writeonce</access>
+ </field>
+ <field>
+ <name>UPPER</name>
+ <description>Upper half word</description>
+ <lsb>16</lsb>
<msb>31</msb>
+ <access>read-writeonce</access>
</field>
</fields>
</register>
@@ -660,7 +668,7 @@
</register>
<register>
<name>PERM</name>
- <description>Description cluster: Define permissions for the key slot with ID=n+1. Bits 0-15 and 16-31 can only be written once.</description>
+ <description>Description cluster: Define permissions for the key slot. Bits 0-15 and 16-31 can only be written when equal to 0xFFFF.</description>
<addressOffset>0x004</addressOffset>
<access>read-write</access>
<resetValue>0xFFFFFFFF</resetValue>
@@ -752,14 +760,14 @@
<dim>0x4</dim>
<dimIncrement>0x4</dimIncrement>
<name>VALUE[%s]</name>
- <description>Description collection: Define bits [31+o*32:0+o*32] of value assigned to KMU key slot ID=n+1</description>
+ <description>Description collection: Define bits [31+o*32:0+o*32] of value assigned to KMU key slot.</description>
<addressOffset>0x000</addressOffset>
<access>read-write</access>
<resetValue>0xFFFFFFFF</resetValue>
<fields>
<field>
<name>VALUE</name>
- <description>Define bits [31+o*32:0+o*32] of value assigned to KMU key slot ID=n+1</description>
+ <description>Define bits [31+o*32:0+o*32] of value assigned to KMU key slot</description>
<lsb>0</lsb>
<msb>31</msb>
</field>
@@ -785,6 +793,46 @@
<size>0x20</size>
<registers>
<register>
+ <name>CLOCKSTART</name>
+ <description>Start all trace and debug clocks.</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>START</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Start</name>
+ <description>Start all trace and debug clocks.</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CLOCKSTOP</name>
+ <description>Stop all trace and debug clocks.</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>STOP</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Stop</name>
+ <description>Stop all trace and debug clocks.</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
<name>ENABLE</name>
<description>Enable debug domain and aquire selected GPIOs</description>
<addressOffset>0x500</addressOffset>
@@ -3141,93 +3189,8 @@
</fields>
</register>
<register>
- <name>POFCON</name>
- <description>Power-fail comparator configuration</description>
- <addressOffset>0x510</addressOffset>
- <access>read-write</access>
- <resetValue>0x00000008</resetValue>
- <fields>
- <field>
- <name>POF</name>
- <description>Enable or disable power-fail comparator</description>
- <lsb>0</lsb>
- <msb>0</msb>
- <enumeratedValues>
- <enumeratedValue>
- <name>Disabled</name>
- <description>Disable</description>
- <value>0</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Enabled</name>
- <description>Enable</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
- </field>
- <field>
- <name>THRESHOLD</name>
- <description>Power-fail comparator threshold setting</description>
- <lsb>1</lsb>
- <msb>4</msb>
- <enumeratedValues>
- <enumeratedValue>
- <name>V19</name>
- <description>Set threshold to 1.9 V</description>
- <value>6</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>V20</name>
- <description>Set threshold to 2.0 V</description>
- <value>7</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>V21</name>
- <description>Set threshold to 2.1 V</description>
- <value>8</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>V22</name>
- <description>Set threshold to 2.2 V</description>
- <value>9</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>V23</name>
- <description>Set threshold to 2.3 V</description>
- <value>10</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>V24</name>
- <description>Set threshold to 2.4 V</description>
- <value>11</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>V25</name>
- <description>Set threshold to 2.5 V</description>
- <value>12</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>V26</name>
- <description>Set threshold to 2.6 V</description>
- <value>13</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>V27</name>
- <description>Set threshold to 2.7 V</description>
- <value>14</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>V28</name>
- <description>Set threshold to 2.8 V</description>
- <value>15</value>
- </enumeratedValue>
- </enumeratedValues>
- </field>
- </fields>
- </register>
- <register>
<name>DCDCEN</name>
- <description>Enable DC/DC mode of the main voltage regulator</description>
+ <description>Enable DC/DC mode of the main voltage regulator.</description>
<addressOffset>0x578</addressOffset>
<access>read-write</access>
<fields>
@@ -4837,7 +4800,7 @@
</register>
<register>
<name>TXSTATUS</name>
- <description>Status to indicate if data sent from the CPU to the debugger status has been read</description>
+ <description>Status to indicate if data sent from the CPU to the debugger has been read</description>
<addressOffset>0x84</addressOffset>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
@@ -4871,25 +4834,25 @@
<addressOffset>0x500</addressOffset>
<register>
<name>LOCK</name>
- <description>Lock ERASEALL mechanism</description>
+ <description>Lock register ERASEPROTECT.DISABLE from being written until next reset</description>
<addressOffset>0x000</addressOffset>
<access>read-writeonce</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
- <name>ERASEPROTECTLOCK</name>
- <description>Enable or disable the ERASEALL mechanism</description>
+ <name>LOCK</name>
+ <description>Lock register ERASEPROTECT.DISABLE from being written until next reset</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
<enumeratedValue>
<name>Unlocked</name>
- <description>ERASEALL can be issued</description>
+ <description>Register ERASEPROTECT.DISABLE is writeable</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Locked</name>
- <description>ERASEALL is locked</description>
+ <description>Register ERASEPROTECT.DISABLE is read-only</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
@@ -4898,14 +4861,14 @@
</register>
<register>
<name>DISABLE</name>
- <description>Unlock ERASEPROTECT and perform ERASEALL</description>
+ <description>Disable ERASEPROTECT and perform ERASEALL</description>
<addressOffset>0x004</addressOffset>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>KEY</name>
- <description>Initiate secure erase even though ERASEPROTECT is enabled if KEY fields match</description>
+ <description>The ERASEALL sequence will be initiated if value of KEY fields are non-zero and KEY fields match on both CPU and debugger side</description>
<lsb>0</lsb>
<msb>31</msb>
</field>
@@ -6136,13 +6099,13 @@
</register>
<register>
<name>ORC</name>
- <description>Over-read character. Character clocked out in case and over-read of the TXD buffer.</description>
+ <description>Over-read character. Character clocked out in case an over-read of the TXD buffer.</description>
<addressOffset>0x5C0</addressOffset>
<access>read-write</access>
<fields>
<field>
<name>ORC</name>
- <description>Over-read character. Character clocked out in case and over-read of the TXD buffer.</description>
+ <description>Over-read character. Character clocked out in case an over-read of the TXD buffer.</description>
<lsb>0</lsb>
<msb>7</msb>
</field>
@@ -6961,6 +6924,32 @@
</field>
</fields>
</register>
+ <register>
+ <name>LIST</name>
+ <description>EasyDMA list type</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LIST</name>
+ <description>List type</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable EasyDMA list</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ArrayList</name>
+ <description>Use array list</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
</cluster>
<cluster>
<name>TXD</name>
@@ -7010,6 +6999,32 @@
</field>
</fields>
</register>
+ <register>
+ <name>LIST</name>
+ <description>EasyDMA list type</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LIST</name>
+ <description>List type</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable EasyDMA list</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ArrayList</name>
+ <description>Use array list</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
</cluster>
<register>
<name>CONFIG</name>
@@ -7437,13 +7452,13 @@
</register>
<register>
<name>EVENTS_SUSPENDED</name>
- <description>Last byte has been sent out after the SUSPEND task has been issued, TWI traffic is now suspended.</description>
+ <description>SUSPEND task has been issued, TWI traffic is now suspended.</description>
<addressOffset>0x148</addressOffset>
<access>read-write</access>
<fields>
<field>
<name>EVENTS_SUSPENDED</name>
- <description>Last byte has been sent out after the SUSPEND task has been issued, TWI traffic is now suspended.</description>
+ <description>SUSPEND task has been issued, TWI traffic is now suspended.</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
@@ -10132,6 +10147,32 @@
</field>
</fields>
</register>
+ <register>
+ <name>LIST</name>
+ <description>EasyDMA list type</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LIST</name>
+ <description>List type</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable EasyDMA list</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ArrayList</name>
+ <description>Use array list</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
</cluster>
<cluster>
<name>TXD</name>
@@ -10181,6 +10222,32 @@
</field>
</fields>
</register>
+ <register>
+ <name>LIST</name>
+ <description>EasyDMA list type</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LIST</name>
+ <description>List type</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable EasyDMA list</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>ArrayList</name>
+ <description>Use array list</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
</cluster>
<register>
<dim>0x2</dim>
@@ -16180,7 +16247,7 @@
</enumeratedValue>
<enumeratedValue>
<name>Busy</name>
- <description>ADC is busy. Conversion in progress.</description>
+ <description>ADC is busy. Single conversion in progress.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
@@ -16280,8 +16347,8 @@
<value>8</value>
</enumeratedValue>
<enumeratedValue>
- <name>VDD</name>
- <description>VDD</description>
+ <name>VDDGPIO</name>
+ <description>VDD_GPIO</description>
<value>9</value>
</enumeratedValue>
</enumeratedValues>
@@ -16347,8 +16414,8 @@
<value>8</value>
</enumeratedValue>
<enumeratedValue>
- <name>VDD</name>
- <description>VDD</description>
+ <name>VDD_GPIO</name>
+ <description>VDD_GPIO</description>
<value>9</value>
</enumeratedValue>
</enumeratedValues>
@@ -16380,12 +16447,12 @@
</enumeratedValue>
<enumeratedValue>
<name>Pullup</name>
- <description>Pull-up to VDD</description>
+ <description>Pull-up to VDD_GPIO</description>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>VDD1_2</name>
- <description>Set input at VDD/2</description>
+ <description>Set input at VDD_GPIO/2</description>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
@@ -16408,12 +16475,12 @@
</enumeratedValue>
<enumeratedValue>
<name>Pullup</name>
- <description>Pull-up to VDD</description>
+ <description>Pull-up to VDD_GPIO</description>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
<name>VDD1_2</name>
- <description>Set input at VDD/2</description>
+ <description>Set input at VDD_GPIO/2</description>
<value>3</value>
</enumeratedValue>
</enumeratedValues>
@@ -16479,7 +16546,7 @@
</enumeratedValue>
<enumeratedValue>
<name>VDD1_4</name>
- <description>VDD/4 as reference</description>
+ <description>VDD_GPIO/4 as reference</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
@@ -17819,6 +17886,34 @@
<register>
<dim>0x6</dim>
<dimIncrement>0x4</dimIncrement>
+ <name>ONESHOTEN[%s]</name>
+ <description>Description collection: Enable one-shot operation for Capture/Compare channel n</description>
+ <addressOffset>0x514</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ONESHOTEN</name>
+ <description>Enable one-shot operation</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disable</name>
+ <description>Disable one-shot operation</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enable</name>
+ <description>Enable one-shot operation</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x6</dim>
+ <dimIncrement>0x4</dimIncrement>
<name>CC[%s]</name>
<description>Description collection: Capture/Compare register n</description>
<addressOffset>0x540</addressOffset>
@@ -21416,7 +21511,7 @@
</peripheral>
<peripheral>
<name>EGU0_NS</name>
- <description>Event Generator Unit 0</description>
+ <description>Event generator unit 0</description>
<baseAddress>0x4001B000</baseAddress>
<headerStructName>EGU</headerStructName>
<!--Security dma=NA-->
@@ -22730,7 +22825,7 @@
</peripheral>
<peripheral derivedFrom="EGU0_NS">
<name>EGU0_S</name>
- <description>Event Generator Unit 1</description>
+ <description>Event generator unit 1</description>
<baseAddress>0x5001B000</baseAddress>
<!--Security dma=NA-->
<!--Security securemapping=US-->
@@ -22741,7 +22836,7 @@
</peripheral>
<peripheral derivedFrom="EGU0_NS">
<name>EGU1_NS</name>
- <description>Event Generator Unit 2</description>
+ <description>Event generator unit 2</description>
<baseAddress>0x4001C000</baseAddress>
<!--Security dma=NA-->
<!--Security securemapping=US-->
@@ -22752,7 +22847,7 @@
</peripheral>
<peripheral derivedFrom="EGU0_NS">
<name>EGU1_S</name>
- <description>Event Generator Unit 3</description>
+ <description>Event generator unit 3</description>
<baseAddress>0x5001C000</baseAddress>
<!--Security dma=NA-->
<!--Security securemapping=US-->
@@ -22763,7 +22858,7 @@
</peripheral>
<peripheral derivedFrom="EGU0_NS">
<name>EGU2_NS</name>
- <description>Event Generator Unit 4</description>
+ <description>Event generator unit 4</description>
<baseAddress>0x4001D000</baseAddress>
<!--Security dma=NA-->
<!--Security securemapping=US-->
@@ -22774,7 +22869,7 @@
</peripheral>
<peripheral derivedFrom="EGU0_NS">
<name>EGU2_S</name>
- <description>Event Generator Unit 5</description>
+ <description>Event generator unit 5</description>
<baseAddress>0x5001D000</baseAddress>
<!--Security dma=NA-->
<!--Security securemapping=US-->
@@ -22785,7 +22880,7 @@
</peripheral>
<peripheral derivedFrom="EGU0_NS">
<name>EGU3_NS</name>
- <description>Event Generator Unit 6</description>
+ <description>Event generator unit 6</description>
<baseAddress>0x4001E000</baseAddress>
<!--Security dma=NA-->
<!--Security securemapping=US-->
@@ -22796,7 +22891,7 @@
</peripheral>
<peripheral derivedFrom="EGU0_NS">
<name>EGU3_S</name>
- <description>Event Generator Unit 7</description>
+ <description>Event generator unit 7</description>
<baseAddress>0x5001E000</baseAddress>
<!--Security dma=NA-->
<!--Security securemapping=US-->
@@ -22807,7 +22902,7 @@
</peripheral>
<peripheral derivedFrom="EGU0_NS">
<name>EGU4_NS</name>
- <description>Event Generator Unit 8</description>
+ <description>Event generator unit 8</description>
<baseAddress>0x4001F000</baseAddress>
<!--Security dma=NA-->
<!--Security securemapping=US-->
@@ -22818,7 +22913,7 @@
</peripheral>
<peripheral derivedFrom="EGU0_NS">
<name>EGU4_S</name>
- <description>Event Generator Unit 9</description>
+ <description>Event generator unit 9</description>
<baseAddress>0x5001F000</baseAddress>
<!--Security dma=NA-->
<!--Security securemapping=US-->
@@ -22829,7 +22924,7 @@
</peripheral>
<peripheral derivedFrom="EGU0_NS">
<name>EGU5_NS</name>
- <description>Event Generator Unit 10</description>
+ <description>Event generator unit 10</description>
<baseAddress>0x40020000</baseAddress>
<!--Security dma=NA-->
<!--Security securemapping=US-->
@@ -22840,7 +22935,7 @@
</peripheral>
<peripheral derivedFrom="EGU0_NS">
<name>EGU5_S</name>
- <description>Event Generator Unit 11</description>
+ <description>Event generator unit 11</description>
<baseAddress>0x50020000</baseAddress>
<!--Security dma=NA-->
<!--Security securemapping=US-->
@@ -27740,13 +27835,13 @@
</register>
<register>
<name>EVENTS_KEYSLOT_PUSHED</name>
- <description>Key successfully pushed over secure APB</description>
+ <description>Key slot successfully pushed over secure APB</description>
<addressOffset>0x100</addressOffset>
<access>read-write</access>
<fields>
<field>
<name>EVENTS_KEYSLOT_PUSHED</name>
- <description>Key successfully pushed over secure APB</description>
+ <description>Key slot successfully pushed over secure APB</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
@@ -27766,13 +27861,13 @@
</register>
<register>
<name>EVENTS_KEYSLOT_REVOKED</name>
- <description>Key has been revoked and cannot be tasked for selection</description>
+ <description>Key slot has been revoked and cannot be tasked for selection</description>
<addressOffset>0x104</addressOffset>
<access>read-write</access>
<fields>
<field>
<name>EVENTS_KEYSLOT_REVOKED</name>
- <description>Key has been revoked and cannot be tasked for selection</description>
+ <description>Key slot has been revoked and cannot be tasked for selection</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
@@ -28168,14 +28263,14 @@
</register>
<register>
<name>SELECTKEYSLOT</name>
- <description>Select key slot ID to be read over AHB or pushed over secure APB when TASKS_PUSH_KEYSLOT is started</description>
+ <description>Select key slot to be read over AHB or pushed over secure APB when TASKS_PUSH_KEYSLOT is started</description>
<addressOffset>0x500</addressOffset>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ID</name>
- <description>Select key slot ID to be read over AHB, or pushed over secure APB, when TASKS_PUSH_KEYSLOT is started NOTE: ID=0 is not a valid key ID. The 0 ID should be used when the KMU is idle or not in use NOTE: Note that index N in UICR-&gt;KEYSLOT.KEY[N] and UICR-&gt;KEYSLOT.CONFIG[N] corresponds to KMU keyslot ID=N+1</description>
+ <description>Select key slot ID to be read over AHB, or pushed over secure APB, when TASKS_PUSH_KEYSLOT is started NOTE: ID=0 is not a valid key slot ID. The 0 ID should be used when the KMU is idle or not in use NOTE: Index N in UICR-&gt;KEYSLOT.KEY[N] and UICR-&gt;KEYSLOT.CONFIG[N] corresponds to KMU key slot ID=N+1</description>
<lsb>0</lsb>
<msb>7</msb>
</field>
@@ -28296,7 +28391,7 @@
<name>ERASEALL</name>
<description>Register for erasing all non-volatile user memory</description>
<addressOffset>0x50C</addressOffset>
- <access>read-write</access>
+ <access>write-only</access>
<!--Security securemapping=S-->
<fields>
<field>
@@ -28390,7 +28485,7 @@
<fields>
<field>
<name>HITS</name>
- <description>Number of cache hits</description>
+ <description>Number of cache hits Write zero to clear</description>
<lsb>0</lsb>
<msb>31</msb>
</field>
@@ -28405,7 +28500,7 @@
<fields>
<field>
<name>MISSES</name>
- <description>Number of cache misses</description>
+ <description>Number of cache misses Write zero to clear</description>
<lsb>0</lsb>
<msb>31</msb>
</field>
@@ -28478,92 +28573,6 @@
</field>
</fields>
</register>
- <register>
- <name>FORCEONNVM</name>
- <description>Force on all NVM supplies. Also see the internal section in the NVMC chapter.</description>
- <addressOffset>0x700</addressOffset>
- <access>read-write</access>
- <!--Security securemapping=S-->
- <fields>
- <field>
- <name>FORCEONNVM</name>
- <description>Force on all NVM supplies. Also see the internal section in the NVMC chapter.</description>
- <lsb>0</lsb>
- <msb>0</msb>
- <enumeratedValues>
- <enumeratedValue>
- <name>DoNotForceOn</name>
- <description>Do not force on NVM supply</description>
- <value>0</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>ForceOn</name>
- <description>Force on NVM supply</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
- </field>
- </fields>
- </register>
- <register>
- <name>FORCEOFFNVM</name>
- <description>Force off NVM supply. Also see the internal section in the NVMC chapter.</description>
- <addressOffset>0x728</addressOffset>
- <access>read-write</access>
- <!--Security securemapping=S-->
- <fields>
- <field>
- <name>FORCEOFFNVM0</name>
- <description>Force off NVM supply 0. Also see the internal section in the NVMC chapter.</description>
- <lsb>0</lsb>
- <msb>0</msb>
- <enumeratedValues>
- <enumeratedValue>
- <name>DoNotForceOff</name>
- <description>Do not force off supply</description>
- <value>0</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>ForceOff</name>
- <description>Force off supply</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
- </field>
- <field>
- <name>FORCEOFFNVM1</name>
- <description>Force off NVM supply 1. Also see the internal section in the NVMC chapter.</description>
- <lsb>1</lsb>
- <msb>1</msb>
- <enumeratedValues>
- <enumeratedValue>
- <name>DoNotForceOff</name>
- <description>Do not force off supply</description>
- <value>0</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>ForceOff</name>
- <description>Force off supply</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
- </field>
- <field>
- <name>KEY</name>
- <description>KEY</description>
- <lsb>8</lsb>
- <msb>31</msb>
- <enumeratedValues>
- <usage>write</usage>
- <enumeratedValue>
- <name>EnableWrite</name>
- <description>Must be written in order to write to bits 0-7. Any other value will ignore writes to this register. Read as zero.</description>
- <value>0xACCE55</value>
- </enumeratedValue>
- </enumeratedValues>
- </field>
- </fields>
- </register>
</registers>
</peripheral>
<peripheral derivedFrom="KMU_NS">
@@ -28998,9 +29007,191 @@
<!--Security securemapping=US-->
</peripheral>
<peripheral>
+ <name>CC_HOST_RGF_S</name>
+ <description>CRYPTOCELL HOST_RGF interface</description>
+ <baseAddress>0x50840000</baseAddress>
+ <headerStructName>CC_HOST_RGF</headerStructName>
+ <!--Security dma=NSA-->
+ <!--Security securemapping=S-->
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x2000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <groupName>CC_HOST_RGF</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>HOST_CRYPTOKEY_SEL</name>
+ <description>AES hardware key select</description>
+ <addressOffset>0x1A38</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>HOST_CRYPTOKEY_SEL</name>
+ <description>Select the source of the HW key that is used by the AES engine</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>K_DR</name>
+ <description>Use device root key K_DR from CRYPTOCELL AO power domain</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>K_PRTL</name>
+ <description>Use hard-coded RTL key K_PRTL</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Session</name>
+ <description>Use provided session key</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>HOST_IOT_KPRTL_LOCK</name>
+ <description>This write-once register is the K_PRTL lock register. When this register is set, K_PRTL cannot be used and a zeroed key will be used instead. The value of this register is saved in the CRYPTOCELL AO power domain.</description>
+ <addressOffset>0x1A4C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>HOST_IOT_KPRTL_LOCK</name>
+ <description>This register is the K_PRTL lock register. When this register is set, K_PRTL cannot be used and a zeroed key will be used instead. The value of this register is saved in the CRYPTOCELL AO power domain.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>K_PRTL can be selected for use from register HOST_CRYPTOKEY_SEL</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>K_PRTL has been locked until next power-on reset (POR). If K_PRTL is selected anyway, a zeroed key will be used instead.</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>HOST_IOT_KDR0</name>
+ <description>This register holds bits 31:0 of K_DR. The value of this register is saved in the CRYPTOCELL AO power domain. Reading from this address returns the K_DR valid status indicating if K_DR is successfully retained.</description>
+ <addressOffset>0x1A50</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>HOST_IOT_KDR0</name>
+ <description>Write: K_DR bits 31:0. Read: 0x00000000 when 128-bit K_DR key value is not yet retained in the CRYPTOCELL AO power domain. Read: 0x00000001 when 128-bit K_DR key value is successfully retained in the CRYPTOCELL AO power domain.</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>HOST_IOT_KDR1</name>
+ <description>This register holds bits 63:32 of K_DR. The value of this register is saved in the CRYPTOCELL AO power domain.</description>
+ <addressOffset>0x1A54</addressOffset>
+ <access>write-only</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>HOST_IOT_KDR1</name>
+ <description>K_DR bits 63:32</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>HOST_IOT_KDR2</name>
+ <description>This register holds bits 95:64 of K_DR. The value of this register is saved in the CRYPTOCELL AO power domain.</description>
+ <addressOffset>0x1A58</addressOffset>
+ <access>write-only</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>HOST_IOT_KDR2</name>
+ <description>K_DR bits 95:64</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>HOST_IOT_KDR3</name>
+ <description>This register holds bits 127:96 of K_DR. The value of this register is saved in the CRYPTOCELL AO power domain.</description>
+ <addressOffset>0x1A5C</addressOffset>
+ <access>write-only</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>HOST_IOT_KDR3</name>
+ <description>K_DR bits 127:96</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>HOST_IOT_LCS</name>
+ <description>Controls lifecycle state (LCS) for CRYPTOCELL subsystem</description>
+ <addressOffset>0x1A60</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000002</resetValue>
+ <fields>
+ <field>
+ <name>LCS</name>
+ <description>Lifecycle state value. This field is write-once per reset.</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Debug</name>
+ <description>CC310 operates in debug mode</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Secure</name>
+ <description>CC310 operates in secure mode</description>
+ <value>2</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LCS_IS_VALID</name>
+ <description>Read-only field. Indicates if CRYPTOCELL LCS has been successfully configured since last reset.</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Invalid</name>
+ <description>Valid LCS not yet retained in the CRYPTOCELL AO power domain</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Valid</name>
+ <description>Valid LCS successfully retained in the CRYPTOCELL AO power domain</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ <peripheral>
<name>CRYPTOCELL_S</name>
<description>ARM TrustZone CryptoCell register interface</description>
<baseAddress>0x50840000</baseAddress>
+ <alternatePeripheral>CC_HOST_RGF_S</alternatePeripheral>
<headerStructName>CRYPTOCELL</headerStructName>
<!--Security dma=NSA-->
<!--Security securemapping=S-->
@@ -29036,7 +29227,7 @@
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>CRYPTOCELL subsystem enabled</description>
+ <description>CRYPTOCELL subsystem enabled.</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
@@ -34890,13 +35081,13 @@
</register>
<register>
<name>DETECTMODE</name>
- <description>Select between default DETECT signal behaviour and LDETECT mode (For non-secure pin only)</description>
+ <description>Select between default DETECT signal behavior and LDETECT mode (For non-secure pin only)</description>
<addressOffset>0x024</addressOffset>
<access>read-write</access>
<fields>
<field>
<name>DETECTMODE</name>
- <description>Select between default DETECT signal behaviour and LDETECT mode</description>
+ <description>Select between default DETECT signal behavior and LDETECT mode</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
@@ -34907,7 +35098,7 @@
</enumeratedValue>
<enumeratedValue>
<name>LDETECT</name>
- <description>Use the latched LDETECT behaviour</description>
+ <description>Use the latched LDETECT behavior</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
@@ -34916,13 +35107,13 @@
</register>
<register>
<name>DETECTMODE_SEC</name>
- <description>Select between default DETECT signal behaviour and LDETECT mode (For secure pin only)</description>
+ <description>Select between default DETECT signal behavior and LDETECT mode (For secure pin only)</description>
<addressOffset>0x028</addressOffset>
<access>read-write</access>
<fields>
<field>
<name>DETECTMODE</name>
- <description>Select between default DETECT signal behaviour and LDETECT mode</description>
+ <description>Select between default DETECT signal behavior and LDETECT mode</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
@@ -34933,7 +35124,7 @@
</enumeratedValue>
<enumeratedValue>
<name>LDETECT</name>
- <description>Use the latched LDETECT behaviour</description>
+ <description>Use the latched LDETECT behavior</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
@@ -35036,7 +35227,7 @@
</enumeratedValue>
<enumeratedValue>
<name>D0S1</name>
- <description>Disconnect '0' standard '1' (normally used for wired-or connections)</description>
+ <description>Disconnect '0', standard '1' (normally used for wired-or connections)</description>
<value>4</value>
</enumeratedValue>
<enumeratedValue>
@@ -35046,7 +35237,7 @@
</enumeratedValue>
<enumeratedValue>
<name>S0D1</name>
- <description>Standard '0'. disconnect '1' (normally used for wired-and connections)</description>
+ <description>Standard '0', disconnect '1' (normally used for wired-and connections)</description>
<value>6</value>
</enumeratedValue>
<enumeratedValue>
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf9160_bitfields.h b/third_party/NordicSemiconductor/nrfx/mdk/nrf9160_bitfields.h
index a68ff80..f9e9e57 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/nrf9160_bitfields.h
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf9160_bitfields.h
@@ -35,6 +35,72 @@
/*lint ++flb "Enter library region" */
+/* Peripheral: CC_HOST_RGF */
+/* Description: CRYPTOCELL HOST_RGF interface */
+
+/* Register: CC_HOST_RGF_HOST_CRYPTOKEY_SEL */
+/* Description: AES hardware key select */
+
+/* Bits 1..0 : Select the source of the HW key that is used by the AES engine */
+#define CC_HOST_RGF_HOST_CRYPTOKEY_SEL_HOST_CRYPTOKEY_SEL_Pos (0UL) /*!< Position of HOST_CRYPTOKEY_SEL field. */
+#define CC_HOST_RGF_HOST_CRYPTOKEY_SEL_HOST_CRYPTOKEY_SEL_Msk (0x3UL << CC_HOST_RGF_HOST_CRYPTOKEY_SEL_HOST_CRYPTOKEY_SEL_Pos) /*!< Bit mask of HOST_CRYPTOKEY_SEL field. */
+#define CC_HOST_RGF_HOST_CRYPTOKEY_SEL_HOST_CRYPTOKEY_SEL_K_DR (0UL) /*!< Use device root key K_DR from CRYPTOCELL AO power domain */
+#define CC_HOST_RGF_HOST_CRYPTOKEY_SEL_HOST_CRYPTOKEY_SEL_K_PRTL (1UL) /*!< Use hard-coded RTL key K_PRTL */
+#define CC_HOST_RGF_HOST_CRYPTOKEY_SEL_HOST_CRYPTOKEY_SEL_Session (2UL) /*!< Use provided session key */
+
+/* Register: CC_HOST_RGF_HOST_IOT_KPRTL_LOCK */
+/* Description: This write-once register is the K_PRTL lock register. When this register is set, K_PRTL cannot be used and a zeroed key will be used instead. The value of this register is saved in the CRYPTOCELL AO power domain. */
+
+/* Bit 0 : This register is the K_PRTL lock register. When this register is set, K_PRTL cannot be used and a zeroed key will be used instead. The value of this register is saved in the CRYPTOCELL AO power domain. */
+#define CC_HOST_RGF_HOST_IOT_KPRTL_LOCK_HOST_IOT_KPRTL_LOCK_Pos (0UL) /*!< Position of HOST_IOT_KPRTL_LOCK field. */
+#define CC_HOST_RGF_HOST_IOT_KPRTL_LOCK_HOST_IOT_KPRTL_LOCK_Msk (0x1UL << CC_HOST_RGF_HOST_IOT_KPRTL_LOCK_HOST_IOT_KPRTL_LOCK_Pos) /*!< Bit mask of HOST_IOT_KPRTL_LOCK field. */
+#define CC_HOST_RGF_HOST_IOT_KPRTL_LOCK_HOST_IOT_KPRTL_LOCK_Disabled (0UL) /*!< K_PRTL can be selected for use from register HOST_CRYPTOKEY_SEL */
+#define CC_HOST_RGF_HOST_IOT_KPRTL_LOCK_HOST_IOT_KPRTL_LOCK_Enabled (1UL) /*!< K_PRTL has been locked until next power-on reset (POR). If K_PRTL is selected anyway, a zeroed key will be used instead. */
+
+/* Register: CC_HOST_RGF_HOST_IOT_KDR0 */
+/* Description: This register holds bits 31:0 of K_DR. The value of this register is saved in the CRYPTOCELL AO power domain. Reading from this address returns the K_DR valid status indicating if K_DR is successfully retained. */
+
+/* Bits 31..0 : Write: K_DR bits 31:0. Read: 0x00000000 when 128-bit K_DR key value is not yet retained in the CRYPTOCELL AO power domain. Read: 0x00000001 when 128-bit K_DR key value is successfully retained in the CRYPTOCELL AO power domain. */
+#define CC_HOST_RGF_HOST_IOT_KDR0_HOST_IOT_KDR0_Pos (0UL) /*!< Position of HOST_IOT_KDR0 field. */
+#define CC_HOST_RGF_HOST_IOT_KDR0_HOST_IOT_KDR0_Msk (0xFFFFFFFFUL << CC_HOST_RGF_HOST_IOT_KDR0_HOST_IOT_KDR0_Pos) /*!< Bit mask of HOST_IOT_KDR0 field. */
+
+/* Register: CC_HOST_RGF_HOST_IOT_KDR1 */
+/* Description: This register holds bits 63:32 of K_DR. The value of this register is saved in the CRYPTOCELL AO power domain. */
+
+/* Bits 31..0 : K_DR bits 63:32 */
+#define CC_HOST_RGF_HOST_IOT_KDR1_HOST_IOT_KDR1_Pos (0UL) /*!< Position of HOST_IOT_KDR1 field. */
+#define CC_HOST_RGF_HOST_IOT_KDR1_HOST_IOT_KDR1_Msk (0xFFFFFFFFUL << CC_HOST_RGF_HOST_IOT_KDR1_HOST_IOT_KDR1_Pos) /*!< Bit mask of HOST_IOT_KDR1 field. */
+
+/* Register: CC_HOST_RGF_HOST_IOT_KDR2 */
+/* Description: This register holds bits 95:64 of K_DR. The value of this register is saved in the CRYPTOCELL AO power domain. */
+
+/* Bits 31..0 : K_DR bits 95:64 */
+#define CC_HOST_RGF_HOST_IOT_KDR2_HOST_IOT_KDR2_Pos (0UL) /*!< Position of HOST_IOT_KDR2 field. */
+#define CC_HOST_RGF_HOST_IOT_KDR2_HOST_IOT_KDR2_Msk (0xFFFFFFFFUL << CC_HOST_RGF_HOST_IOT_KDR2_HOST_IOT_KDR2_Pos) /*!< Bit mask of HOST_IOT_KDR2 field. */
+
+/* Register: CC_HOST_RGF_HOST_IOT_KDR3 */
+/* Description: This register holds bits 127:96 of K_DR. The value of this register is saved in the CRYPTOCELL AO power domain. */
+
+/* Bits 31..0 : K_DR bits 127:96 */
+#define CC_HOST_RGF_HOST_IOT_KDR3_HOST_IOT_KDR3_Pos (0UL) /*!< Position of HOST_IOT_KDR3 field. */
+#define CC_HOST_RGF_HOST_IOT_KDR3_HOST_IOT_KDR3_Msk (0xFFFFFFFFUL << CC_HOST_RGF_HOST_IOT_KDR3_HOST_IOT_KDR3_Pos) /*!< Bit mask of HOST_IOT_KDR3 field. */
+
+/* Register: CC_HOST_RGF_HOST_IOT_LCS */
+/* Description: Controls lifecycle state (LCS) for CRYPTOCELL subsystem */
+
+/* Bit 8 : Read-only field. Indicates if CRYPTOCELL LCS has been successfully configured since last reset. */
+#define CC_HOST_RGF_HOST_IOT_LCS_LCS_IS_VALID_Pos (8UL) /*!< Position of LCS_IS_VALID field. */
+#define CC_HOST_RGF_HOST_IOT_LCS_LCS_IS_VALID_Msk (0x1UL << CC_HOST_RGF_HOST_IOT_LCS_LCS_IS_VALID_Pos) /*!< Bit mask of LCS_IS_VALID field. */
+#define CC_HOST_RGF_HOST_IOT_LCS_LCS_IS_VALID_Invalid (0UL) /*!< Valid LCS not yet retained in the CRYPTOCELL AO power domain */
+#define CC_HOST_RGF_HOST_IOT_LCS_LCS_IS_VALID_Valid (1UL) /*!< Valid LCS successfully retained in the CRYPTOCELL AO power domain */
+
+/* Bits 2..0 : Lifecycle state value. This field is write-once per reset. */
+#define CC_HOST_RGF_HOST_IOT_LCS_LCS_Pos (0UL) /*!< Position of LCS field. */
+#define CC_HOST_RGF_HOST_IOT_LCS_LCS_Msk (0x7UL << CC_HOST_RGF_HOST_IOT_LCS_LCS_Pos) /*!< Bit mask of LCS field. */
+#define CC_HOST_RGF_HOST_IOT_LCS_LCS_Debug (0UL) /*!< CC310 operates in debug mode */
+#define CC_HOST_RGF_HOST_IOT_LCS_LCS_Secure (2UL) /*!< CC310 operates in secure mode */
+
+
/* Peripheral: CLOCK */
/* Description: Clock management 0 */
@@ -309,7 +375,7 @@
#define CRYPTOCELL_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */
#define CRYPTOCELL_ENABLE_ENABLE_Msk (0x1UL << CRYPTOCELL_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */
#define CRYPTOCELL_ENABLE_ENABLE_Disabled (0UL) /*!< CRYPTOCELL subsystem disabled */
-#define CRYPTOCELL_ENABLE_ENABLE_Enabled (1UL) /*!< CRYPTOCELL subsystem enabled */
+#define CRYPTOCELL_ENABLE_ENABLE_Enabled (1UL) /*!< CRYPTOCELL subsystem enabled. */
/* Peripheral: CTRLAPPERI */
@@ -339,7 +405,7 @@
#define CTRLAPPERI_MAILBOX_TXDATA_TXDATA_Msk (0xFFFFFFFFUL << CTRLAPPERI_MAILBOX_TXDATA_TXDATA_Pos) /*!< Bit mask of TXDATA field. */
/* Register: CTRLAPPERI_MAILBOX_TXSTATUS */
-/* Description: Status to indicate if data sent from the CPU to the debugger status has been read */
+/* Description: Status to indicate if data sent from the CPU to the debugger has been read */
/* Bit 0 : Status of data in register TXDATA */
#define CTRLAPPERI_MAILBOX_TXSTATUS_TXSTATUS_Pos (0UL) /*!< Position of TXSTATUS field. */
@@ -348,18 +414,18 @@
#define CTRLAPPERI_MAILBOX_TXSTATUS_TXSTATUS_DataPending (1UL) /*!< Data pending in register TXDATA */
/* Register: CTRLAPPERI_ERASEPROTECT_LOCK */
-/* Description: Lock ERASEALL mechanism */
+/* Description: Lock register ERASEPROTECT.DISABLE from being written until next reset */
-/* Bit 0 : Enable or disable the ERASEALL mechanism */
-#define CTRLAPPERI_ERASEPROTECT_LOCK_ERASEPROTECTLOCK_Pos (0UL) /*!< Position of ERASEPROTECTLOCK field. */
-#define CTRLAPPERI_ERASEPROTECT_LOCK_ERASEPROTECTLOCK_Msk (0x1UL << CTRLAPPERI_ERASEPROTECT_LOCK_ERASEPROTECTLOCK_Pos) /*!< Bit mask of ERASEPROTECTLOCK field. */
-#define CTRLAPPERI_ERASEPROTECT_LOCK_ERASEPROTECTLOCK_Unlocked (0UL) /*!< ERASEALL can be issued */
-#define CTRLAPPERI_ERASEPROTECT_LOCK_ERASEPROTECTLOCK_Locked (1UL) /*!< ERASEALL is locked */
+/* Bit 0 : Lock register ERASEPROTECT.DISABLE from being written until next reset */
+#define CTRLAPPERI_ERASEPROTECT_LOCK_LOCK_Pos (0UL) /*!< Position of LOCK field. */
+#define CTRLAPPERI_ERASEPROTECT_LOCK_LOCK_Msk (0x1UL << CTRLAPPERI_ERASEPROTECT_LOCK_LOCK_Pos) /*!< Bit mask of LOCK field. */
+#define CTRLAPPERI_ERASEPROTECT_LOCK_LOCK_Unlocked (0UL) /*!< Register ERASEPROTECT.DISABLE is writeable */
+#define CTRLAPPERI_ERASEPROTECT_LOCK_LOCK_Locked (1UL) /*!< Register ERASEPROTECT.DISABLE is read-only */
/* Register: CTRLAPPERI_ERASEPROTECT_DISABLE */
-/* Description: Unlock ERASEPROTECT and perform ERASEALL */
+/* Description: Disable ERASEPROTECT and perform ERASEALL */
-/* Bits 31..0 : Initiate secure erase even though ERASEPROTECT is enabled if KEY fields match */
+/* Bits 31..0 : The ERASEALL sequence will be initiated if value of KEY fields are non-zero and KEY fields match on both CPU and debugger side */
#define CTRLAPPERI_ERASEPROTECT_DISABLE_KEY_Pos (0UL) /*!< Position of KEY field. */
#define CTRLAPPERI_ERASEPROTECT_DISABLE_KEY_Msk (0xFFFFFFFFUL << CTRLAPPERI_ERASEPROTECT_DISABLE_KEY_Pos) /*!< Bit mask of KEY field. */
@@ -839,7 +905,7 @@
/* Peripheral: EGU */
-/* Description: Event Generator Unit 0 */
+/* Description: Event generator unit 0 */
/* Register: EGU_TASKS_TRIGGER */
/* Description: Description collection: Trigger n for triggering the corresponding TRIGGERED[n] event */
@@ -2409,18 +2475,18 @@
#define KMU_TASKS_PUSH_KEYSLOT_TASKS_PUSH_KEYSLOT_Trigger (1UL) /*!< Trigger task */
/* Register: KMU_EVENTS_KEYSLOT_PUSHED */
-/* Description: Key successfully pushed over secure APB */
+/* Description: Key slot successfully pushed over secure APB */
-/* Bit 0 : Key successfully pushed over secure APB */
+/* Bit 0 : Key slot successfully pushed over secure APB */
#define KMU_EVENTS_KEYSLOT_PUSHED_EVENTS_KEYSLOT_PUSHED_Pos (0UL) /*!< Position of EVENTS_KEYSLOT_PUSHED field. */
#define KMU_EVENTS_KEYSLOT_PUSHED_EVENTS_KEYSLOT_PUSHED_Msk (0x1UL << KMU_EVENTS_KEYSLOT_PUSHED_EVENTS_KEYSLOT_PUSHED_Pos) /*!< Bit mask of EVENTS_KEYSLOT_PUSHED field. */
#define KMU_EVENTS_KEYSLOT_PUSHED_EVENTS_KEYSLOT_PUSHED_NotGenerated (0UL) /*!< Event not generated */
#define KMU_EVENTS_KEYSLOT_PUSHED_EVENTS_KEYSLOT_PUSHED_Generated (1UL) /*!< Event generated */
/* Register: KMU_EVENTS_KEYSLOT_REVOKED */
-/* Description: Key has been revoked and cannot be tasked for selection */
+/* Description: Key slot has been revoked and cannot be tasked for selection */
-/* Bit 0 : Key has been revoked and cannot be tasked for selection */
+/* Bit 0 : Key slot has been revoked and cannot be tasked for selection */
#define KMU_EVENTS_KEYSLOT_REVOKED_EVENTS_KEYSLOT_REVOKED_Pos (0UL) /*!< Position of EVENTS_KEYSLOT_REVOKED field. */
#define KMU_EVENTS_KEYSLOT_REVOKED_EVENTS_KEYSLOT_REVOKED_Msk (0x1UL << KMU_EVENTS_KEYSLOT_REVOKED_EVENTS_KEYSLOT_REVOKED_Pos) /*!< Bit mask of EVENTS_KEYSLOT_REVOKED field. */
#define KMU_EVENTS_KEYSLOT_REVOKED_EVENTS_KEYSLOT_REVOKED_NotGenerated (0UL) /*!< Event not generated */
@@ -2541,9 +2607,9 @@
#define KMU_STATUS_SELECTED_Enabled (1UL) /*!< Key slot ID successfully selected by KMU */
/* Register: KMU_SELECTKEYSLOT */
-/* Description: Select key slot ID to be read over AHB or pushed over secure APB when TASKS_PUSH_KEYSLOT is started */
+/* Description: Select key slot to be read over AHB or pushed over secure APB when TASKS_PUSH_KEYSLOT is started */
-/* Bits 7..0 : Select key slot ID to be read over AHB, or pushed over secure APB, when TASKS_PUSH_KEYSLOT is started NOTE: ID=0 is not a valid key ID. The 0 ID should be used when the KMU is idle or not in use NOTE: Note that index N in UICR->KEYSLOT.KEY[N] and UICR->KEYSLOT.CONFIG[N] corresponds to KMU keyslot ID=N+1 */
+/* Bits 7..0 : Select key slot ID to be read over AHB, or pushed over secure APB, when TASKS_PUSH_KEYSLOT is started NOTE: ID=0 is not a valid key slot ID. The 0 ID should be used when the KMU is idle or not in use NOTE: Index N in UICR->KEYSLOT.KEY[N] and UICR->KEYSLOT.CONFIG[N] corresponds to KMU key slot ID=N+1 */
#define KMU_SELECTKEYSLOT_ID_Pos (0UL) /*!< Position of ID field. */
#define KMU_SELECTKEYSLOT_ID_Msk (0xFFUL << KMU_SELECTKEYSLOT_ID_Pos) /*!< Bit mask of ID field. */
@@ -2614,14 +2680,14 @@
/* Register: NVMC_IHIT */
/* Description: I-code cache hit counter */
-/* Bits 31..0 : Number of cache hits */
+/* Bits 31..0 : Number of cache hits Write zero to clear */
#define NVMC_IHIT_HITS_Pos (0UL) /*!< Position of HITS field. */
#define NVMC_IHIT_HITS_Msk (0xFFFFFFFFUL << NVMC_IHIT_HITS_Pos) /*!< Bit mask of HITS field. */
/* Register: NVMC_IMISS */
/* Description: I-code cache miss counter */
-/* Bits 31..0 : Number of cache misses */
+/* Bits 31..0 : Number of cache misses Write zero to clear */
#define NVMC_IMISS_MISSES_Pos (0UL) /*!< Position of MISSES field. */
#define NVMC_IMISS_MISSES_Msk (0xFFFFFFFFUL << NVMC_IMISS_MISSES_Pos) /*!< Bit mask of MISSES field. */
@@ -2648,35 +2714,6 @@
#define NVMC_WRITEUICRNS_SET_Msk (0x1UL << NVMC_WRITEUICRNS_SET_Pos) /*!< Bit mask of SET field. */
#define NVMC_WRITEUICRNS_SET_Set (1UL) /*!< Set value */
-/* Register: NVMC_FORCEONNVM */
-/* Description: Force on all NVM supplies. Also see the internal section in the NVMC chapter. */
-
-/* Bit 0 : Force on all NVM supplies. Also see the internal section in the NVMC chapter. */
-#define NVMC_FORCEONNVM_FORCEONNVM_Pos (0UL) /*!< Position of FORCEONNVM field. */
-#define NVMC_FORCEONNVM_FORCEONNVM_Msk (0x1UL << NVMC_FORCEONNVM_FORCEONNVM_Pos) /*!< Bit mask of FORCEONNVM field. */
-#define NVMC_FORCEONNVM_FORCEONNVM_DoNotForceOn (0UL) /*!< Do not force on NVM supply */
-#define NVMC_FORCEONNVM_FORCEONNVM_ForceOn (1UL) /*!< Force on NVM supply */
-
-/* Register: NVMC_FORCEOFFNVM */
-/* Description: Force off NVM supply. Also see the internal section in the NVMC chapter. */
-
-/* Bits 31..8 : KEY */
-#define NVMC_FORCEOFFNVM_KEY_Pos (8UL) /*!< Position of KEY field. */
-#define NVMC_FORCEOFFNVM_KEY_Msk (0xFFFFFFUL << NVMC_FORCEOFFNVM_KEY_Pos) /*!< Bit mask of KEY field. */
-#define NVMC_FORCEOFFNVM_KEY_EnableWrite (0xACCE55UL) /*!< Must be written in order to write to bits 0-7. Any other value will ignore writes to this register. Read as zero. */
-
-/* Bit 1 : Force off NVM supply 1. Also see the internal section in the NVMC chapter. */
-#define NVMC_FORCEOFFNVM_FORCEOFFNVM1_Pos (1UL) /*!< Position of FORCEOFFNVM1 field. */
-#define NVMC_FORCEOFFNVM_FORCEOFFNVM1_Msk (0x1UL << NVMC_FORCEOFFNVM_FORCEOFFNVM1_Pos) /*!< Bit mask of FORCEOFFNVM1 field. */
-#define NVMC_FORCEOFFNVM_FORCEOFFNVM1_DoNotForceOff (0UL) /*!< Do not force off supply */
-#define NVMC_FORCEOFFNVM_FORCEOFFNVM1_ForceOff (1UL) /*!< Force off supply */
-
-/* Bit 0 : Force off NVM supply 0. Also see the internal section in the NVMC chapter. */
-#define NVMC_FORCEOFFNVM_FORCEOFFNVM0_Pos (0UL) /*!< Position of FORCEOFFNVM0 field. */
-#define NVMC_FORCEOFFNVM_FORCEOFFNVM0_Msk (0x1UL << NVMC_FORCEOFFNVM_FORCEOFFNVM0_Pos) /*!< Bit mask of FORCEOFFNVM0 field. */
-#define NVMC_FORCEOFFNVM_FORCEOFFNVM0_DoNotForceOff (0UL) /*!< Do not force off supply */
-#define NVMC_FORCEOFFNVM_FORCEOFFNVM0_ForceOff (1UL) /*!< Force off supply */
-
/* Peripheral: GPIO */
/* Description: GPIO Port 0 */
@@ -4370,22 +4407,22 @@
#define GPIO_LATCH_PIN0_Latched (1UL) /*!< Criteria has been met */
/* Register: GPIO_DETECTMODE */
-/* Description: Select between default DETECT signal behaviour and LDETECT mode (For non-secure pin only) */
+/* Description: Select between default DETECT signal behavior and LDETECT mode (For non-secure pin only) */
-/* Bit 0 : Select between default DETECT signal behaviour and LDETECT mode */
+/* Bit 0 : Select between default DETECT signal behavior and LDETECT mode */
#define GPIO_DETECTMODE_DETECTMODE_Pos (0UL) /*!< Position of DETECTMODE field. */
#define GPIO_DETECTMODE_DETECTMODE_Msk (0x1UL << GPIO_DETECTMODE_DETECTMODE_Pos) /*!< Bit mask of DETECTMODE field. */
#define GPIO_DETECTMODE_DETECTMODE_Default (0UL) /*!< DETECT directly connected to PIN DETECT signals */
-#define GPIO_DETECTMODE_DETECTMODE_LDETECT (1UL) /*!< Use the latched LDETECT behaviour */
+#define GPIO_DETECTMODE_DETECTMODE_LDETECT (1UL) /*!< Use the latched LDETECT behavior */
/* Register: GPIO_DETECTMODE_SEC */
-/* Description: Select between default DETECT signal behaviour and LDETECT mode (For secure pin only) */
+/* Description: Select between default DETECT signal behavior and LDETECT mode (For secure pin only) */
-/* Bit 0 : Select between default DETECT signal behaviour and LDETECT mode */
+/* Bit 0 : Select between default DETECT signal behavior and LDETECT mode */
#define GPIO_DETECTMODE_SEC_DETECTMODE_Pos (0UL) /*!< Position of DETECTMODE field. */
#define GPIO_DETECTMODE_SEC_DETECTMODE_Msk (0x1UL << GPIO_DETECTMODE_SEC_DETECTMODE_Pos) /*!< Bit mask of DETECTMODE field. */
#define GPIO_DETECTMODE_SEC_DETECTMODE_Default (0UL) /*!< DETECT directly connected to PIN DETECT signals */
-#define GPIO_DETECTMODE_SEC_DETECTMODE_LDETECT (1UL) /*!< Use the latched LDETECT behaviour */
+#define GPIO_DETECTMODE_SEC_DETECTMODE_LDETECT (1UL) /*!< Use the latched LDETECT behavior */
/* Register: GPIO_PIN_CNF */
/* Description: Description collection: Configuration of GPIO pins */
@@ -4404,9 +4441,9 @@
#define GPIO_PIN_CNF_DRIVE_H0S1 (1UL) /*!< High drive '0', standard '1' */
#define GPIO_PIN_CNF_DRIVE_S0H1 (2UL) /*!< Standard '0', high drive '1' */
#define GPIO_PIN_CNF_DRIVE_H0H1 (3UL) /*!< High drive '0', high 'drive '1'' */
-#define GPIO_PIN_CNF_DRIVE_D0S1 (4UL) /*!< Disconnect '0' standard '1' (normally used for wired-or connections) */
+#define GPIO_PIN_CNF_DRIVE_D0S1 (4UL) /*!< Disconnect '0', standard '1' (normally used for wired-or connections) */
#define GPIO_PIN_CNF_DRIVE_D0H1 (5UL) /*!< Disconnect '0', high drive '1' (normally used for wired-or connections) */
-#define GPIO_PIN_CNF_DRIVE_S0D1 (6UL) /*!< Standard '0'. disconnect '1' (normally used for wired-and connections) */
+#define GPIO_PIN_CNF_DRIVE_S0D1 (6UL) /*!< Standard '0', disconnect '1' (normally used for wired-and connections) */
#define GPIO_PIN_CNF_DRIVE_H0D1 (7UL) /*!< High drive '0', disconnect '1' (normally used for wired-and connections) */
/* Bits 3..2 : Pull configuration */
@@ -5436,31 +5473,8 @@
#define REGULATORS_SYSTEMOFF_SYSTEMOFF_Msk (0x1UL << REGULATORS_SYSTEMOFF_SYSTEMOFF_Pos) /*!< Bit mask of SYSTEMOFF field. */
#define REGULATORS_SYSTEMOFF_SYSTEMOFF_Enable (1UL) /*!< Enable System OFF mode */
-/* Register: REGULATORS_POFCON */
-/* Description: Power-fail comparator configuration */
-
-/* Bits 4..1 : Power-fail comparator threshold setting */
-#define REGULATORS_POFCON_THRESHOLD_Pos (1UL) /*!< Position of THRESHOLD field. */
-#define REGULATORS_POFCON_THRESHOLD_Msk (0xFUL << REGULATORS_POFCON_THRESHOLD_Pos) /*!< Bit mask of THRESHOLD field. */
-#define REGULATORS_POFCON_THRESHOLD_V19 (6UL) /*!< Set threshold to 1.9 V */
-#define REGULATORS_POFCON_THRESHOLD_V20 (7UL) /*!< Set threshold to 2.0 V */
-#define REGULATORS_POFCON_THRESHOLD_V21 (8UL) /*!< Set threshold to 2.1 V */
-#define REGULATORS_POFCON_THRESHOLD_V22 (9UL) /*!< Set threshold to 2.2 V */
-#define REGULATORS_POFCON_THRESHOLD_V23 (10UL) /*!< Set threshold to 2.3 V */
-#define REGULATORS_POFCON_THRESHOLD_V24 (11UL) /*!< Set threshold to 2.4 V */
-#define REGULATORS_POFCON_THRESHOLD_V25 (12UL) /*!< Set threshold to 2.5 V */
-#define REGULATORS_POFCON_THRESHOLD_V26 (13UL) /*!< Set threshold to 2.6 V */
-#define REGULATORS_POFCON_THRESHOLD_V27 (14UL) /*!< Set threshold to 2.7 V */
-#define REGULATORS_POFCON_THRESHOLD_V28 (15UL) /*!< Set threshold to 2.8 V */
-
-/* Bit 0 : Enable or disable power-fail comparator */
-#define REGULATORS_POFCON_POF_Pos (0UL) /*!< Position of POF field. */
-#define REGULATORS_POFCON_POF_Msk (0x1UL << REGULATORS_POFCON_POF_Pos) /*!< Bit mask of POF field. */
-#define REGULATORS_POFCON_POF_Disabled (0UL) /*!< Disable */
-#define REGULATORS_POFCON_POF_Enabled (1UL) /*!< Enable */
-
/* Register: REGULATORS_DCDCEN */
-/* Description: Enable DC/DC mode of the main voltage regulator */
+/* Description: Enable DC/DC mode of the main voltage regulator. */
/* Bit 0 : Enable DC/DC converter */
#define REGULATORS_DCDCEN_DCDCEN_Pos (0UL) /*!< Position of DCDCEN field. */
@@ -6582,7 +6596,7 @@
#define SAADC_STATUS_STATUS_Pos (0UL) /*!< Position of STATUS field. */
#define SAADC_STATUS_STATUS_Msk (0x1UL << SAADC_STATUS_STATUS_Pos) /*!< Bit mask of STATUS field. */
#define SAADC_STATUS_STATUS_Ready (0UL) /*!< ADC is ready. No on-going conversion. */
-#define SAADC_STATUS_STATUS_Busy (1UL) /*!< ADC is busy. Conversion in progress. */
+#define SAADC_STATUS_STATUS_Busy (1UL) /*!< ADC is busy. Single conversion in progress. */
/* Register: SAADC_ENABLE */
/* Description: Enable or disable ADC */
@@ -6608,7 +6622,7 @@
#define SAADC_CH_PSELP_PSELP_AnalogInput5 (6UL) /*!< AIN5 */
#define SAADC_CH_PSELP_PSELP_AnalogInput6 (7UL) /*!< AIN6 */
#define SAADC_CH_PSELP_PSELP_AnalogInput7 (8UL) /*!< AIN7 */
-#define SAADC_CH_PSELP_PSELP_VDD (9UL) /*!< VDD */
+#define SAADC_CH_PSELP_PSELP_VDDGPIO (9UL) /*!< VDD_GPIO */
/* Register: SAADC_CH_PSELN */
/* Description: Description cluster: Input negative pin selection for CH[n] */
@@ -6625,7 +6639,7 @@
#define SAADC_CH_PSELN_PSELN_AnalogInput5 (6UL) /*!< AIN5 */
#define SAADC_CH_PSELN_PSELN_AnalogInput6 (7UL) /*!< AIN6 */
#define SAADC_CH_PSELN_PSELN_AnalogInput7 (8UL) /*!< AIN7 */
-#define SAADC_CH_PSELN_PSELN_VDD (9UL) /*!< VDD */
+#define SAADC_CH_PSELN_PSELN_VDD_GPIO (9UL) /*!< VDD_GPIO */
/* Register: SAADC_CH_CONFIG */
/* Description: Description cluster: Input configuration for CH[n] */
@@ -6656,7 +6670,7 @@
#define SAADC_CH_CONFIG_REFSEL_Pos (12UL) /*!< Position of REFSEL field. */
#define SAADC_CH_CONFIG_REFSEL_Msk (0x1UL << SAADC_CH_CONFIG_REFSEL_Pos) /*!< Bit mask of REFSEL field. */
#define SAADC_CH_CONFIG_REFSEL_Internal (0UL) /*!< Internal reference (0.6 V) */
-#define SAADC_CH_CONFIG_REFSEL_VDD1_4 (1UL) /*!< VDD/4 as reference */
+#define SAADC_CH_CONFIG_REFSEL_VDD1_4 (1UL) /*!< VDD_GPIO/4 as reference */
/* Bits 10..8 : Gain control */
#define SAADC_CH_CONFIG_GAIN_Pos (8UL) /*!< Position of GAIN field. */
@@ -6675,16 +6689,16 @@
#define SAADC_CH_CONFIG_RESN_Msk (0x3UL << SAADC_CH_CONFIG_RESN_Pos) /*!< Bit mask of RESN field. */
#define SAADC_CH_CONFIG_RESN_Bypass (0UL) /*!< Bypass resistor ladder */
#define SAADC_CH_CONFIG_RESN_Pulldown (1UL) /*!< Pull-down to GND */
-#define SAADC_CH_CONFIG_RESN_Pullup (2UL) /*!< Pull-up to VDD */
-#define SAADC_CH_CONFIG_RESN_VDD1_2 (3UL) /*!< Set input at VDD/2 */
+#define SAADC_CH_CONFIG_RESN_Pullup (2UL) /*!< Pull-up to VDD_GPIO */
+#define SAADC_CH_CONFIG_RESN_VDD1_2 (3UL) /*!< Set input at VDD_GPIO/2 */
/* Bits 1..0 : Positive channel resistor control */
#define SAADC_CH_CONFIG_RESP_Pos (0UL) /*!< Position of RESP field. */
#define SAADC_CH_CONFIG_RESP_Msk (0x3UL << SAADC_CH_CONFIG_RESP_Pos) /*!< Bit mask of RESP field. */
#define SAADC_CH_CONFIG_RESP_Bypass (0UL) /*!< Bypass resistor ladder */
#define SAADC_CH_CONFIG_RESP_Pulldown (1UL) /*!< Pull-down to GND */
-#define SAADC_CH_CONFIG_RESP_Pullup (2UL) /*!< Pull-up to VDD */
-#define SAADC_CH_CONFIG_RESP_VDD1_2 (3UL) /*!< Set input at VDD/2 */
+#define SAADC_CH_CONFIG_RESP_Pullup (2UL) /*!< Pull-up to VDD_GPIO */
+#define SAADC_CH_CONFIG_RESP_VDD1_2 (3UL) /*!< Set input at VDD_GPIO/2 */
/* Register: SAADC_CH_LIMIT */
/* Description: Description cluster: High/low limits for event monitoring a channel */
@@ -7185,9 +7199,9 @@
#define SPIM_CONFIG_ORDER_LsbFirst (1UL) /*!< Least significant bit shifted out first */
/* Register: SPIM_ORC */
-/* Description: Over-read character. Character clocked out in case and over-read of the TXD buffer. */
+/* Description: Over-read character. Character clocked out in case an over-read of the TXD buffer. */
-/* Bits 7..0 : Over-read character. Character clocked out in case and over-read of the TXD buffer. */
+/* Bits 7..0 : Over-read character. Character clocked out in case an over-read of the TXD buffer. */
#define SPIM_ORC_ORC_Pos (0UL) /*!< Position of ORC field. */
#define SPIM_ORC_ORC_Msk (0xFFUL << SPIM_ORC_ORC_Pos) /*!< Bit mask of ORC field. */
@@ -7470,6 +7484,15 @@
#define SPIS_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
#define SPIS_RXD_AMOUNT_AMOUNT_Msk (0x1FFFUL << SPIS_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+/* Register: SPIS_RXD_LIST */
+/* Description: EasyDMA list type */
+
+/* Bits 1..0 : List type */
+#define SPIS_RXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */
+#define SPIS_RXD_LIST_LIST_Msk (0x3UL << SPIS_RXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */
+#define SPIS_RXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */
+#define SPIS_RXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */
+
/* Register: SPIS_TXD_PTR */
/* Description: TXD data pointer */
@@ -7491,6 +7514,15 @@
#define SPIS_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
#define SPIS_TXD_AMOUNT_AMOUNT_Msk (0x1FFFUL << SPIS_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+/* Register: SPIS_TXD_LIST */
+/* Description: EasyDMA list type */
+
+/* Bits 1..0 : List type */
+#define SPIS_TXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */
+#define SPIS_TXD_LIST_LIST_Msk (0x3UL << SPIS_TXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */
+#define SPIS_TXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */
+#define SPIS_TXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */
+
/* Register: SPIS_CONFIG */
/* Description: Configuration register */
@@ -8190,6 +8222,22 @@
/* Peripheral: TAD */
/* Description: Trace and debug control */
+/* Register: TAD_CLOCKSTART */
+/* Description: Start all trace and debug clocks. */
+
+/* Bit 0 : */
+#define TAD_CLOCKSTART_START_Pos (0UL) /*!< Position of START field. */
+#define TAD_CLOCKSTART_START_Msk (0x1UL << TAD_CLOCKSTART_START_Pos) /*!< Bit mask of START field. */
+#define TAD_CLOCKSTART_START_Start (1UL) /*!< Start all trace and debug clocks. */
+
+/* Register: TAD_CLOCKSTOP */
+/* Description: Stop all trace and debug clocks. */
+
+/* Bit 0 : */
+#define TAD_CLOCKSTOP_STOP_Pos (0UL) /*!< Position of STOP field. */
+#define TAD_CLOCKSTOP_STOP_Msk (0x1UL << TAD_CLOCKSTOP_STOP_Pos) /*!< Bit mask of STOP field. */
+#define TAD_CLOCKSTOP_STOP_Stop (1UL) /*!< Stop all trace and debug clocks. */
+
/* Register: TAD_ENABLE */
/* Description: Enable debug domain and aquire selected GPIOs */
@@ -8620,6 +8668,15 @@
#define TIMER_PRESCALER_PRESCALER_Pos (0UL) /*!< Position of PRESCALER field. */
#define TIMER_PRESCALER_PRESCALER_Msk (0xFUL << TIMER_PRESCALER_PRESCALER_Pos) /*!< Bit mask of PRESCALER field. */
+/* Register: TIMER_ONESHOTEN */
+/* Description: Description collection: Enable one-shot operation for Capture/Compare channel n */
+
+/* Bit 0 : Enable one-shot operation */
+#define TIMER_ONESHOTEN_ONESHOTEN_Pos (0UL) /*!< Position of ONESHOTEN field. */
+#define TIMER_ONESHOTEN_ONESHOTEN_Msk (0x1UL << TIMER_ONESHOTEN_ONESHOTEN_Pos) /*!< Bit mask of ONESHOTEN field. */
+#define TIMER_ONESHOTEN_ONESHOTEN_Disable (0UL) /*!< Disable one-shot operation */
+#define TIMER_ONESHOTEN_ONESHOTEN_Enable (1UL) /*!< Enable one-shot operation */
+
/* Register: TIMER_CC */
/* Description: Description collection: Capture/Compare register n */
@@ -8755,9 +8812,9 @@
#define TWIM_EVENTS_ERROR_EVENTS_ERROR_Generated (1UL) /*!< Event generated */
/* Register: TWIM_EVENTS_SUSPENDED */
-/* Description: Last byte has been sent out after the SUSPEND task has been issued, TWI traffic is now suspended. */
+/* Description: SUSPEND task has been issued, TWI traffic is now suspended. */
-/* Bit 0 : Last byte has been sent out after the SUSPEND task has been issued, TWI traffic is now suspended. */
+/* Bit 0 : SUSPEND task has been issued, TWI traffic is now suspended. */
#define TWIM_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Pos (0UL) /*!< Position of EVENTS_SUSPENDED field. */
#define TWIM_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Msk (0x1UL << TWIM_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Pos) /*!< Bit mask of EVENTS_SUSPENDED field. */
#define TWIM_EVENTS_SUSPENDED_EVENTS_SUSPENDED_NotGenerated (0UL) /*!< Event not generated */
@@ -9680,6 +9737,15 @@
#define TWIS_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
#define TWIS_RXD_AMOUNT_AMOUNT_Msk (0x1FFFUL << TWIS_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+/* Register: TWIS_RXD_LIST */
+/* Description: EasyDMA list type */
+
+/* Bits 1..0 : List type */
+#define TWIS_RXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */
+#define TWIS_RXD_LIST_LIST_Msk (0x3UL << TWIS_RXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */
+#define TWIS_RXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */
+#define TWIS_RXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */
+
/* Register: TWIS_TXD_PTR */
/* Description: TXD Data pointer */
@@ -9701,6 +9767,15 @@
#define TWIS_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
#define TWIS_TXD_AMOUNT_AMOUNT_Msk (0x1FFFUL << TWIS_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+/* Register: TWIS_TXD_LIST */
+/* Description: EasyDMA list type */
+
+/* Bits 1..0 : List type */
+#define TWIS_TXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */
+#define TWIS_TXD_LIST_LIST_Msk (0x3UL << TWIS_TXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */
+#define TWIS_TXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */
+#define TWIS_TXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */
+
/* Register: TWIS_ADDRESS */
/* Description: Description collection: TWI slave address n */
@@ -10560,11 +10635,15 @@
#define UICR_ERASEPROTECT_PALL_Unprotected (0xFFFFFFFFUL) /*!< Unprotected */
/* Register: UICR_OTP */
-/* Description: Description collection: OTP bits [31+n*32:0+n*32]. */
+/* Description: Description collection: One time programmable memory */
-/* Bits 31..0 : Bits [31+n*32:0+n*32] of OTP region */
-#define UICR_OTP_OTP_Pos (0UL) /*!< Position of OTP field. */
-#define UICR_OTP_OTP_Msk (0xFFFFFFFFUL << UICR_OTP_OTP_Pos) /*!< Bit mask of OTP field. */
+/* Bits 31..16 : Upper half word */
+#define UICR_OTP_UPPER_Pos (16UL) /*!< Position of UPPER field. */
+#define UICR_OTP_UPPER_Msk (0xFFFFUL << UICR_OTP_UPPER_Pos) /*!< Bit mask of UPPER field. */
+
+/* Bits 15..0 : Lower half word */
+#define UICR_OTP_LOWER_Pos (0UL) /*!< Position of LOWER field. */
+#define UICR_OTP_LOWER_Msk (0xFFFFUL << UICR_OTP_LOWER_Pos) /*!< Bit mask of LOWER field. */
/* Register: UICR_KEYSLOT_CONFIG_DEST */
/* Description: Description cluster: Destination address where content of the key value registers (KEYSLOT.KEYn.VALUE[0-3])
@@ -10577,7 +10656,7 @@
#define UICR_KEYSLOT_CONFIG_DEST_DEST_Msk (0xFFFFFFFFUL << UICR_KEYSLOT_CONFIG_DEST_DEST_Pos) /*!< Bit mask of DEST field. */
/* Register: UICR_KEYSLOT_CONFIG_PERM */
-/* Description: Description cluster: Define permissions for the key slot with ID=n+1. Bits 0-15 and 16-31 can only be written once. */
+/* Description: Description cluster: Define permissions for the key slot. Bits 0-15 and 16-31 can only be written when equal to 0xFFFF. */
/* Bit 16 : Revocation state for the key slot */
#define UICR_KEYSLOT_CONFIG_PERM_STATE_Pos (16UL) /*!< Position of STATE field. */
@@ -10604,9 +10683,9 @@
#define UICR_KEYSLOT_CONFIG_PERM_WRITE_Enabled (1UL) /*!< Enable write to the key value registers */
/* Register: UICR_KEYSLOT_KEY_VALUE */
-/* Description: Description collection: Define bits [31+o*32:0+o*32] of value assigned to KMU key slot ID=n+1 */
+/* Description: Description collection: Define bits [31+o*32:0+o*32] of value assigned to KMU key slot. */
-/* Bits 31..0 : Define bits [31+o*32:0+o*32] of value assigned to KMU key slot ID=n+1 */
+/* Bits 31..0 : Define bits [31+o*32:0+o*32] of value assigned to KMU key slot */
#define UICR_KEYSLOT_KEY_VALUE_VALUE_Pos (0UL) /*!< Position of VALUE field. */
#define UICR_KEYSLOT_KEY_VALUE_VALUE_Msk (0xFFFFFFFFUL << UICR_KEYSLOT_KEY_VALUE_VALUE_Pos) /*!< Bit mask of VALUE field. */
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf9160_name_change.h b/third_party/NordicSemiconductor/nrfx/mdk/nrf9160_name_change.h
new file mode 100644
index 0000000..9feeab5
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf9160_name_change.h
@@ -0,0 +1,56 @@
+/*
+
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+
+2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ contributors may be used to endorse or promote products derived from this
+ software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
+
+*/
+
+#ifndef NRF9160_NAME_CHANGE_H
+#define NRF9160_NAME_CHANGE_H
+
+/*lint ++flb "Enter library region */
+
+/* This file is given to prevent your SW from not compiling with the updates made to nrf9160.h and
+ * nrf9160_bitfields.h. The macros defined in this file were available previously. Do not use these
+ * macros on purpose. Use the ones defined in nrf9160.h and nrf9160_bitfields.h instead.
+ */
+
+ /* SAADC enums */
+ /* Changes to enum names in SAADC */
+ #define SAADC_CH_PSELP_PSELP_VDD SAADC_CH_PSELP_PSELP_VDDGPIO
+ #define SAADC_CH_PSELP_PSELN_VDD SAADC_CH_PSELP_PSELN_VDDGPIO
+
+ /* CTRLAP PERI Fields */
+ #define CTRLAPPERI_ERASEPROTECT_LOCK_ERASEPROTECTLOCK_Pos CTRLAPPERI_ERASEPROTECT_LOCK_LOCK_Pos
+ #define CTRLAPPERI_ERASEPROTECT_LOCK_ERASEPROTECTLOCK_Msk CTRLAPPERI_ERASEPROTECT_LOCK_LOCK_Msk
+ #define CTRLAPPERI_ERASEPROTECT_LOCK_ERASEPROTECTLOCK_Unlocked CTRLAPPERI_ERASEPROTECT_LOCK_LOCK_Unlocked
+ #define CTRLAPPERI_ERASEPROTECT_LOCK_ERASEPROTECTLOCK_Locked CTRLAPPERI_ERASEPROTECT_LOCK_LOCK_Locked
+
+ /*lint --flb "Leave library region" */
+
+#endif /* NRF9160_NAME_CHANGE_H */
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf9160_xxaa.ld b/third_party/NordicSemiconductor/nrfx/mdk/nrf9160_xxaa.ld
index 9353af4..1133710 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/nrf9160_xxaa.ld
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf9160_xxaa.ld
@@ -10,4 +10,4 @@
}
-INCLUDE "nrf_common.ld"
\ No newline at end of file
+INCLUDE "nrf_common.ld"
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf91_common.ld b/third_party/NordicSemiconductor/nrfx/mdk/nrf91_common.ld
deleted file mode 100644
index 0a2bf73..0000000
--- a/third_party/NordicSemiconductor/nrfx/mdk/nrf91_common.ld
+++ /dev/null
@@ -1,163 +0,0 @@
-/* Linker script for Nordic Semiconductor nRF91 devices
- *
- * Version: Sourcery G++ 4.5-1
- * Support: https://support.codesourcery.com/GNUToolchain/
- *
- * Copyright (c) 2007, 2008, 2009, 2010 CodeSourcery, Inc.
- *
- * The authors hereby grant permission to use, copy, modify, distribute,
- * and license this software and its documentation for any purpose, provided
- * that existing copyright notices are retained in all copies and that this
- * notice is included verbatim in any distributions. No written agreement,
- * license, or royalty fee is required for any of the authorized uses.
- * Modifications to this software may be copyrighted by their authors
- * and need not follow the licensing terms described here, provided that
- * the new terms are clearly indicated on the first page of each file where
- * they apply.
- */
-OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
-
-/* Linker script to place sections and symbol values. Should be used together
- * with other linker script that defines memory regions FLASH and RAM.
- * It references following symbols, which must be defined in code:
- * Reset_Handler : Entry of reset handler
- *
- * It defines following symbols, which code can use without definition:
- * __exidx_start
- * __exidx_end
- * __etext
- * __data_start__
- * __preinit_array_start
- * __preinit_array_end
- * __init_array_start
- * __init_array_end
- * __fini_array_start
- * __fini_array_end
- * __data_end__
- * __bss_start__
- * __bss_end__
- * __end__
- * end
- * __HeapLimit
- * __StackLimit
- * __StackTop
- * __stack
- */
-ENTRY(Reset_Handler)
-
-SECTIONS
-{
- .text :
- {
- KEEP(*(.isr_vector))
- *(.text*)
-
- KEEP(*(.init))
- KEEP(*(.fini))
-
- /* .ctors */
- *crtbegin.o(.ctors)
- *crtbegin?.o(.ctors)
- *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
- *(SORT(.ctors.*))
- *(.ctors)
-
- /* .dtors */
- *crtbegin.o(.dtors)
- *crtbegin?.o(.dtors)
- *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
- *(SORT(.dtors.*))
- *(.dtors)
-
- *(.rodata*)
-
- *(.eh_frame*)
- . = ALIGN(4);
- } > FLASH
-
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- . = ALIGN(4);
- } > FLASH
-
- __exidx_start = .;
- .ARM.exidx :
- {
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- . = ALIGN(4);
- } > FLASH
- __exidx_end = .;
-
- __etext = .;
-
- .data : AT (__etext)
- {
- __data_start__ = .;
- *(vtable)
- *(.data*)
-
- . = ALIGN(4);
- /* preinit data */
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP(*(.preinit_array))
- PROVIDE_HIDDEN (__preinit_array_end = .);
-
- . = ALIGN(4);
- /* init data */
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE_HIDDEN (__init_array_end = .);
-
-
- . = ALIGN(4);
- /* finit data */
- PROVIDE_HIDDEN (__fini_array_start = .);
- KEEP(*(SORT(.fini_array.*)))
- KEEP(*(.fini_array))
- PROVIDE_HIDDEN (__fini_array_end = .);
-
- *(.jcr)
- . = ALIGN(4);
- /* All data end */
- __data_end__ = .;
-
- } > RAM
-
- .bss :
- {
- . = ALIGN(4);
- __bss_start__ = .;
- *(.bss*)
- *(COMMON)
- . = ALIGN(4);
- __bss_end__ = .;
- } > RAM
-
- .heap (COPY):
- {
- __end__ = .;
- end = __end__;
- *(.heap*)
- __HeapLimit = .;
- } > RAM
-
- /* .stack_dummy section doesn't contains any symbols. It is only
- * used for linker to calculate size of stack sections, and assign
- * values to stack symbols later */
- .stack_dummy (COPY):
- {
- *(.stack*)
- } > RAM
-
- /* Set stack top to end of RAM, and stack limit move down by
- * size of stack_dummy section */
- __StackTop = ORIGIN(RAM) + LENGTH(RAM);
- __StackLimit = __StackTop - SIZEOF(.stack_dummy);
- PROVIDE(__stack = __StackTop);
-
- /* Check if data + heap + stack exceeds RAM limit */
- ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
-}
\ No newline at end of file
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/nrf_peripherals.h b/third_party/NordicSemiconductor/nrfx/mdk/nrf_peripherals.h
index 14eb9b2..e3dd9ad 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/nrf_peripherals.h
+++ b/third_party/NordicSemiconductor/nrfx/mdk/nrf_peripherals.h
@@ -42,19 +42,23 @@
#elif defined(__APPLE__)
/* Do not include nrf specific files when building for PC host */
#else
-
+
#if defined(NRF51)
#include "nrf51_peripherals.h"
-
+
+ #elif defined (NRF52805_XXAA)
+ #include "nrf52805_peripherals.h"
#elif defined(NRF52810_XXAA)
#include "nrf52810_peripherals.h"
#elif defined(NRF52811_XXAA)
#include "nrf52811_peripherals.h"
#elif defined(NRF52832_XXAA) || defined(NRF52832_XXAB)
#include "nrf52832_peripherals.h"
+ #elif defined (NRF52833_XXAA)
+ #include "nrf52833_peripherals.h"
#elif defined(NRF52840_XXAA)
#include "nrf52840_peripherals.h"
-
+
#elif defined(NRF9160_XXAA)
#include "nrf9160_peripherals.h"
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf51.s b/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf51.s
index 4c3d9a0..6581568 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf51.s
+++ b/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf51.s
@@ -176,6 +176,7 @@
.extern Reset_Handler
.global nRFInitialize
+ .extern afterInitialize
.equ NRF_POWER_RAMON_ADDRESS, 0x40000524
.equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
.equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
@@ -193,7 +194,7 @@
LDR R2, [R0]
ORRS R2, R1
STR R2, [R0]
- bx lr
+ b afterInitialize
/************************************************************************************
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf52.s b/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf52.s
index ed8c506..4cdce20 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf52.s
+++ b/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf52.s
@@ -232,10 +232,11 @@
.extern Reset_Handler
.global nRFInitialize
+ .extern afterInitialize
.thumb_func
nRFInitialize:
- bx lr
+ b afterInitialize
/************************************************************************************
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf52805.s b/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf52805.s
new file mode 100644
index 0000000..0303941
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf52805.s
@@ -0,0 +1,349 @@
+/***********************************************************************************
+ * SEGGER Microcontroller GmbH *
+ * The Embedded Experts *
+ ***********************************************************************************
+ * *
+ * (c) 2014 - 2018 SEGGER Microcontroller GmbH *
+ * *
+ * www.segger.com Support: support@segger.com *
+ * *
+ ***********************************************************************************
+ * *
+ * All rights reserved. *
+ * *
+ * Redistribution and use in source and binary forms, with or *
+ * without modification, are permitted provided that the following *
+ * conditions are met: *
+ * *
+ * - Redistributions of source code must retain the above copyright *
+ * notice, this list of conditions and the following disclaimer. *
+ * *
+ * - Neither the name of SEGGER Microcontroller GmbH *
+ * nor the names of its contributors may be used to endorse or *
+ * promote products derived from this software without specific *
+ * prior written permission. *
+ * *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
+ * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
+ * DISCLAIMED. *
+ * IN NO EVENT SHALL SEGGER Microcontroller GmbH BE LIABLE FOR *
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
+ * DAMAGE. *
+ * *
+ ***********************************************************************************/
+
+/************************************************************************************
+ * Preprocessor Definitions *
+ * ------------------------ *
+ * VECTORS_IN_RAM *
+ * *
+ * If defined, an area of RAM will large enough to store the vector table *
+ * will be reserved. *
+ * *
+ ************************************************************************************/
+
+ .syntax unified
+ .code 16
+
+ .section .init, "ax"
+ .align 0
+
+/************************************************************************************
+ * Default Exception Handlers *
+ ************************************************************************************/
+
+
+ .thumb_func
+ .weak NMI_Handler
+NMI_Handler:
+ b .
+
+ .thumb_func
+ .weak HardFault_Handler
+HardFault_Handler:
+ b .
+
+ .thumb_func
+ .weak MemoryManagement_Handler
+MemoryManagement_Handler:
+ b .
+
+ .thumb_func
+ .weak BusFault_Handler
+BusFault_Handler:
+ b .
+
+ .thumb_func
+ .weak UsageFault_Handler
+UsageFault_Handler:
+ b .
+
+ .thumb_func
+ .weak SVC_Handler
+SVC_Handler:
+ b .
+
+ .thumb_func
+ .weak DebugMon_Handler
+DebugMon_Handler:
+ b .
+
+ .thumb_func
+ .weak PendSV_Handler
+PendSV_Handler:
+ b .
+
+ .thumb_func
+ .weak SysTick_Handler
+SysTick_Handler:
+ b .
+
+ .thumb_func
+ .weak Dummy_Handler
+Dummy_Handler:
+ b .
+
+/************************************************************************************
+ * Default Interrupt Handlers *
+ ************************************************************************************/
+
+.weak POWER_CLOCK_IRQHandler
+.thumb_set POWER_CLOCK_IRQHandler, Dummy_Handler
+
+.weak RADIO_IRQHandler
+.thumb_set RADIO_IRQHandler, Dummy_Handler
+
+.weak UARTE0_UART0_IRQHandler
+.thumb_set UARTE0_UART0_IRQHandler, Dummy_Handler
+
+.weak TWIM0_TWIS0_TWI0_IRQHandler
+.thumb_set TWIM0_TWIS0_TWI0_IRQHandler, Dummy_Handler
+
+.weak SPIM0_SPIS0_SPI0_IRQHandler
+.thumb_set SPIM0_SPIS0_SPI0_IRQHandler, Dummy_Handler
+
+.weak GPIOTE_IRQHandler
+.thumb_set GPIOTE_IRQHandler, Dummy_Handler
+
+.weak SAADC_IRQHandler
+.thumb_set SAADC_IRQHandler, Dummy_Handler
+
+.weak TIMER0_IRQHandler
+.thumb_set TIMER0_IRQHandler, Dummy_Handler
+
+.weak TIMER1_IRQHandler
+.thumb_set TIMER1_IRQHandler, Dummy_Handler
+
+.weak TIMER2_IRQHandler
+.thumb_set TIMER2_IRQHandler, Dummy_Handler
+
+.weak RTC0_IRQHandler
+.thumb_set RTC0_IRQHandler, Dummy_Handler
+
+.weak TEMP_IRQHandler
+.thumb_set TEMP_IRQHandler, Dummy_Handler
+
+.weak RNG_IRQHandler
+.thumb_set RNG_IRQHandler, Dummy_Handler
+
+.weak ECB_IRQHandler
+.thumb_set ECB_IRQHandler, Dummy_Handler
+
+.weak CCM_AAR_IRQHandler
+.thumb_set CCM_AAR_IRQHandler, Dummy_Handler
+
+.weak WDT_IRQHandler
+.thumb_set WDT_IRQHandler, Dummy_Handler
+
+.weak RTC1_IRQHandler
+.thumb_set RTC1_IRQHandler, Dummy_Handler
+
+.weak SWI0_EGU0_IRQHandler
+.thumb_set SWI0_EGU0_IRQHandler, Dummy_Handler
+
+.weak SWI1_EGU1_IRQHandler
+.thumb_set SWI1_EGU1_IRQHandler, Dummy_Handler
+
+.weak SWI2_IRQHandler
+.thumb_set SWI2_IRQHandler, Dummy_Handler
+
+.weak SWI3_IRQHandler
+.thumb_set SWI3_IRQHandler, Dummy_Handler
+
+.weak SWI4_IRQHandler
+.thumb_set SWI4_IRQHandler, Dummy_Handler
+
+.weak SWI5_IRQHandler
+.thumb_set SWI5_IRQHandler, Dummy_Handler
+
+/************************************************************************************
+ * Reset Handler Extensions *
+ ************************************************************************************/
+
+ .extern Reset_Handler
+ .global nRFInitialize
+ .extern afterInitialize
+
+ .thumb_func
+nRFInitialize:
+ b afterInitialize
+
+
+/************************************************************************************
+ * Vector Table *
+ ************************************************************************************/
+
+ .section .vectors, "ax"
+ .align 0
+ .global _vectors
+ .extern __stack_end__
+
+_vectors:
+ .word __stack_end__
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemoryManagement_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0 /*Reserved */
+ .word PendSV_Handler
+ .word SysTick_Handler
+
+/* External Interrupts */
+ .word POWER_CLOCK_IRQHandler
+ .word RADIO_IRQHandler
+ .word UARTE0_UART0_IRQHandler
+ .word TWIM0_TWIS0_TWI0_IRQHandler
+ .word SPIM0_SPIS0_SPI0_IRQHandler
+ .word 0 /*Reserved */
+ .word GPIOTE_IRQHandler
+ .word SAADC_IRQHandler
+ .word TIMER0_IRQHandler
+ .word TIMER1_IRQHandler
+ .word TIMER2_IRQHandler
+ .word RTC0_IRQHandler
+ .word TEMP_IRQHandler
+ .word RNG_IRQHandler
+ .word ECB_IRQHandler
+ .word CCM_AAR_IRQHandler
+ .word WDT_IRQHandler
+ .word RTC1_IRQHandler
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word SWI0_EGU0_IRQHandler
+ .word SWI1_EGU1_IRQHandler
+ .word SWI2_IRQHandler
+ .word SWI3_IRQHandler
+ .word SWI4_IRQHandler
+ .word SWI5_IRQHandler
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+_vectors_end:
+
+#ifdef VECTORS_IN_RAM
+ .section .vectors_ram, "ax"
+ .align 0
+ .global _vectors_ram
+
+_vectors_ram:
+ .space _vectors_end - _vectors, 0
+#endif
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf52810.s b/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf52810.s
index 1cac950..60831af 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf52810.s
+++ b/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf52810.s
@@ -202,10 +202,34 @@
.extern Reset_Handler
.global nRFInitialize
+ .extern afterInitialize
.thumb_func
nRFInitialize:
- bx lr
+ /* Workaround for Errata 185 RAM: RAM corruption at extreme corners
+ * found at the Errata document for your device located
+ * at https://infocenter.nordicsemi.com/index.jsp */
+
+ LDR R0, =0x10000130
+ LDR R0, [R0]
+ LDR R1, =0x10000134
+ LDR R1, [R1]
+
+ CMP R0, #0xA
+ BNE skip
+ CMP R1, #0x0
+ BNE skip
+
+ LDR R0, =0x40000EE4
+ LDR R2, [R0]
+ LDR R3, =0xFFFFFF8F
+ ANDS R2, R2, R3
+ LDR R3, =0x00000040
+ ORRS R2, R2, R3
+ STR R2, [R0]
+
+skip:
+ b afterInitialize
/************************************************************************************
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf52811.s b/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf52811.s
index 966e74c..e4f92e8 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf52811.s
+++ b/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf52811.s
@@ -202,10 +202,11 @@
.extern Reset_Handler
.global nRFInitialize
+ .extern afterInitialize
.thumb_func
nRFInitialize:
- bx lr
+ b afterInitialize
/************************************************************************************
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf52833.s b/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf52833.s
new file mode 100644
index 0000000..1c1377e
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf52833.s
@@ -0,0 +1,403 @@
+/***********************************************************************************
+ * SEGGER Microcontroller GmbH *
+ * The Embedded Experts *
+ ***********************************************************************************
+ * *
+ * (c) 2014 - 2018 SEGGER Microcontroller GmbH *
+ * *
+ * www.segger.com Support: support@segger.com *
+ * *
+ ***********************************************************************************
+ * *
+ * All rights reserved. *
+ * *
+ * Redistribution and use in source and binary forms, with or *
+ * without modification, are permitted provided that the following *
+ * conditions are met: *
+ * *
+ * - Redistributions of source code must retain the above copyright *
+ * notice, this list of conditions and the following disclaimer. *
+ * *
+ * - Neither the name of SEGGER Microcontroller GmbH *
+ * nor the names of its contributors may be used to endorse or *
+ * promote products derived from this software without specific *
+ * prior written permission. *
+ * *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
+ * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
+ * DISCLAIMED. *
+ * IN NO EVENT SHALL SEGGER Microcontroller GmbH BE LIABLE FOR *
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
+ * DAMAGE. *
+ * *
+ ***********************************************************************************/
+
+/************************************************************************************
+ * Preprocessor Definitions *
+ * ------------------------ *
+ * VECTORS_IN_RAM *
+ * *
+ * If defined, an area of RAM will large enough to store the vector table *
+ * will be reserved. *
+ * *
+ ************************************************************************************/
+
+ .syntax unified
+ .code 16
+
+ .section .init, "ax"
+ .align 0
+
+/************************************************************************************
+ * Default Exception Handlers *
+ ************************************************************************************/
+
+
+ .thumb_func
+ .weak NMI_Handler
+NMI_Handler:
+ b .
+
+ .thumb_func
+ .weak HardFault_Handler
+HardFault_Handler:
+ b .
+
+ .thumb_func
+ .weak MemoryManagement_Handler
+MemoryManagement_Handler:
+ b .
+
+ .thumb_func
+ .weak BusFault_Handler
+BusFault_Handler:
+ b .
+
+ .thumb_func
+ .weak UsageFault_Handler
+UsageFault_Handler:
+ b .
+
+ .thumb_func
+ .weak SVC_Handler
+SVC_Handler:
+ b .
+
+ .thumb_func
+ .weak DebugMon_Handler
+DebugMon_Handler:
+ b .
+
+ .thumb_func
+ .weak PendSV_Handler
+PendSV_Handler:
+ b .
+
+ .thumb_func
+ .weak SysTick_Handler
+SysTick_Handler:
+ b .
+
+ .thumb_func
+ .weak Dummy_Handler
+Dummy_Handler:
+ b .
+
+/************************************************************************************
+ * Default Interrupt Handlers *
+ ************************************************************************************/
+
+.weak POWER_CLOCK_IRQHandler
+.thumb_set POWER_CLOCK_IRQHandler, Dummy_Handler
+
+.weak RADIO_IRQHandler
+.thumb_set RADIO_IRQHandler, Dummy_Handler
+
+.weak UARTE0_UART0_IRQHandler
+.thumb_set UARTE0_UART0_IRQHandler, Dummy_Handler
+
+.weak SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+.thumb_set SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler, Dummy_Handler
+
+.weak SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+.thumb_set SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler, Dummy_Handler
+
+.weak NFCT_IRQHandler
+.thumb_set NFCT_IRQHandler, Dummy_Handler
+
+.weak GPIOTE_IRQHandler
+.thumb_set GPIOTE_IRQHandler, Dummy_Handler
+
+.weak SAADC_IRQHandler
+.thumb_set SAADC_IRQHandler, Dummy_Handler
+
+.weak TIMER0_IRQHandler
+.thumb_set TIMER0_IRQHandler, Dummy_Handler
+
+.weak TIMER1_IRQHandler
+.thumb_set TIMER1_IRQHandler, Dummy_Handler
+
+.weak TIMER2_IRQHandler
+.thumb_set TIMER2_IRQHandler, Dummy_Handler
+
+.weak RTC0_IRQHandler
+.thumb_set RTC0_IRQHandler, Dummy_Handler
+
+.weak TEMP_IRQHandler
+.thumb_set TEMP_IRQHandler, Dummy_Handler
+
+.weak RNG_IRQHandler
+.thumb_set RNG_IRQHandler, Dummy_Handler
+
+.weak ECB_IRQHandler
+.thumb_set ECB_IRQHandler, Dummy_Handler
+
+.weak CCM_AAR_IRQHandler
+.thumb_set CCM_AAR_IRQHandler, Dummy_Handler
+
+.weak WDT_IRQHandler
+.thumb_set WDT_IRQHandler, Dummy_Handler
+
+.weak RTC1_IRQHandler
+.thumb_set RTC1_IRQHandler, Dummy_Handler
+
+.weak QDEC_IRQHandler
+.thumb_set QDEC_IRQHandler, Dummy_Handler
+
+.weak COMP_LPCOMP_IRQHandler
+.thumb_set COMP_LPCOMP_IRQHandler, Dummy_Handler
+
+.weak SWI0_EGU0_IRQHandler
+.thumb_set SWI0_EGU0_IRQHandler, Dummy_Handler
+
+.weak SWI1_EGU1_IRQHandler
+.thumb_set SWI1_EGU1_IRQHandler, Dummy_Handler
+
+.weak SWI2_EGU2_IRQHandler
+.thumb_set SWI2_EGU2_IRQHandler, Dummy_Handler
+
+.weak SWI3_EGU3_IRQHandler
+.thumb_set SWI3_EGU3_IRQHandler, Dummy_Handler
+
+.weak SWI4_EGU4_IRQHandler
+.thumb_set SWI4_EGU4_IRQHandler, Dummy_Handler
+
+.weak SWI5_EGU5_IRQHandler
+.thumb_set SWI5_EGU5_IRQHandler, Dummy_Handler
+
+.weak TIMER3_IRQHandler
+.thumb_set TIMER3_IRQHandler, Dummy_Handler
+
+.weak TIMER4_IRQHandler
+.thumb_set TIMER4_IRQHandler, Dummy_Handler
+
+.weak PWM0_IRQHandler
+.thumb_set PWM0_IRQHandler, Dummy_Handler
+
+.weak PDM_IRQHandler
+.thumb_set PDM_IRQHandler, Dummy_Handler
+
+.weak MWU_IRQHandler
+.thumb_set MWU_IRQHandler, Dummy_Handler
+
+.weak PWM1_IRQHandler
+.thumb_set PWM1_IRQHandler, Dummy_Handler
+
+.weak PWM2_IRQHandler
+.thumb_set PWM2_IRQHandler, Dummy_Handler
+
+.weak SPIM2_SPIS2_SPI2_IRQHandler
+.thumb_set SPIM2_SPIS2_SPI2_IRQHandler, Dummy_Handler
+
+.weak RTC2_IRQHandler
+.thumb_set RTC2_IRQHandler, Dummy_Handler
+
+.weak I2S_IRQHandler
+.thumb_set I2S_IRQHandler, Dummy_Handler
+
+.weak FPU_IRQHandler
+.thumb_set FPU_IRQHandler, Dummy_Handler
+
+.weak USBD_IRQHandler
+.thumb_set USBD_IRQHandler, Dummy_Handler
+
+.weak UARTE1_IRQHandler
+.thumb_set UARTE1_IRQHandler, Dummy_Handler
+
+.weak PWM3_IRQHandler
+.thumb_set PWM3_IRQHandler, Dummy_Handler
+
+.weak SPIM3_IRQHandler
+.thumb_set SPIM3_IRQHandler, Dummy_Handler
+
+/************************************************************************************
+ * Reset Handler Extensions *
+ ************************************************************************************/
+
+ .extern Reset_Handler
+ .global nRFInitialize
+ .extern afterInitialize
+
+ .thumb_func
+nRFInitialize:
+ b afterInitialize
+
+
+/************************************************************************************
+ * Vector Table *
+ ************************************************************************************/
+
+ .section .vectors, "ax"
+ .align 0
+ .global _vectors
+ .extern __stack_end__
+
+_vectors:
+ .word __stack_end__
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemoryManagement_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0 /*Reserved */
+ .word PendSV_Handler
+ .word SysTick_Handler
+
+/* External Interrupts */
+ .word POWER_CLOCK_IRQHandler
+ .word RADIO_IRQHandler
+ .word UARTE0_UART0_IRQHandler
+ .word SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+ .word SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+ .word NFCT_IRQHandler
+ .word GPIOTE_IRQHandler
+ .word SAADC_IRQHandler
+ .word TIMER0_IRQHandler
+ .word TIMER1_IRQHandler
+ .word TIMER2_IRQHandler
+ .word RTC0_IRQHandler
+ .word TEMP_IRQHandler
+ .word RNG_IRQHandler
+ .word ECB_IRQHandler
+ .word CCM_AAR_IRQHandler
+ .word WDT_IRQHandler
+ .word RTC1_IRQHandler
+ .word QDEC_IRQHandler
+ .word COMP_LPCOMP_IRQHandler
+ .word SWI0_EGU0_IRQHandler
+ .word SWI1_EGU1_IRQHandler
+ .word SWI2_EGU2_IRQHandler
+ .word SWI3_EGU3_IRQHandler
+ .word SWI4_EGU4_IRQHandler
+ .word SWI5_EGU5_IRQHandler
+ .word TIMER3_IRQHandler
+ .word TIMER4_IRQHandler
+ .word PWM0_IRQHandler
+ .word PDM_IRQHandler
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word MWU_IRQHandler
+ .word PWM1_IRQHandler
+ .word PWM2_IRQHandler
+ .word SPIM2_SPIS2_SPI2_IRQHandler
+ .word RTC2_IRQHandler
+ .word I2S_IRQHandler
+ .word FPU_IRQHandler
+ .word USBD_IRQHandler
+ .word UARTE1_IRQHandler
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word PWM3_IRQHandler
+ .word 0 /*Reserved */
+ .word SPIM3_IRQHandler
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+ .word 0 /*Reserved */
+_vectors_end:
+
+#ifdef VECTORS_IN_RAM
+ .section .vectors_ram, "ax"
+ .align 0
+ .global _vectors_ram
+
+_vectors_ram:
+ .space _vectors_end - _vectors, 0
+#endif
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf52840.s b/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf52840.s
index d2af2bb..e895995 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf52840.s
+++ b/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf52840.s
@@ -250,10 +250,11 @@
.extern Reset_Handler
.global nRFInitialize
+ .extern afterInitialize
.thumb_func
nRFInitialize:
- bx lr
+ b afterInitialize
/************************************************************************************
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf9160.s b/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf9160.s
index 49c5f07..84162ad 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf9160.s
+++ b/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf9160.s
@@ -219,10 +219,11 @@
.extern Reset_Handler
.global nRFInitialize
+ .extern afterInitialize
.thumb_func
nRFInitialize:
- bx lr
+ b afterInitialize
/************************************************************************************
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf_common.s b/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf_common.s
index ac5e985..4be4828 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf_common.s
+++ b/third_party/NordicSemiconductor/nrfx/mdk/ses_startup_nrf_common.s
@@ -87,6 +87,7 @@
#endif
.extern _vectors
.extern nRFInitialize
+ .global afterInitialize
.section .init, "ax"
.thumb_func
@@ -101,8 +102,8 @@
Reset_Handler:
/* Perform prestart tasks. */
- ldr r0, =nRFInitialize
- blx r0
+ b nRFInitialize
+afterInitialize:
#ifndef NO_STACK_INIT
/* Initialise main stack */
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/startup_config.h b/third_party/NordicSemiconductor/nrfx/mdk/startup_config.h
deleted file mode 100644
index b9e9ae3..0000000
--- a/third_party/NordicSemiconductor/nrfx/mdk/startup_config.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
-
-Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-1. Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-2. Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
-
-3. Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from this
- software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
-ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
-LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-POSSIBILITY OF SUCH DAMAGE.
-
-*/
-
-/* Configure stack size, stack alignement and heap size with a header file instead of project settings or modification of Nordic provided assembler files. Modify this file as needed. */
-
-/* In order to make use this file,
- 1. For Keil uVision IDE, in the Options for Target -> Asm tab, define symbol __STARTUP_CONFIG and use the additional assembler option --cpreproc in Misc Control text box.
- 2. For GCC compiling, add extra assembly option -D__STARTUP_CONFIG.
- 3. For IAR Embedded Workbench define symbol __STARTUP_CONFIG in the Assembler options and define symbol __STARTUP_CONFIG=1 in the linker options.
-*/
-
-/* This file is a template and should be copied to the project directory. */
-
-/* Define size of stack. Size must be multiple of 4. */
-#define __STARTUP_CONFIG_STACK_SIZE 0x1000
-
-/* Define alignement of stack. Alignment will be 2 to the power of __STARTUP_CONFIG_STACK_ALIGNEMENT. Since calling convention requires that the stack is aligned to 8-bytes when a function is called, the minimum __STARTUP_CONFIG_STACK_ALIGNEMENT is therefore 3. */
-#define __STARTUP_CONFIG_STACK_ALIGNEMENT 3
-
-/* Define size of heap. Size must be multiple of 4. */
-#define __STARTUP_CONFIG_HEAP_SIZE 0x1000
-
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf.h b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf.h
new file mode 100644
index 0000000..2e45b2d
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf.h
@@ -0,0 +1,61 @@
+/*
+
+Copyright (c) 2009-2018 ARM Limited. All rights reserved.
+
+ SPDX-License-Identifier: Apache-2.0
+
+Licensed under the Apache License, Version 2.0 (the License); you may
+not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+ www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an AS IS BASIS, WITHOUT
+WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+NOTICE: This file has been modified by Nordic Semiconductor ASA.
+
+*/
+
+#ifndef SYSTEM_NRF_H
+#define SYSTEM_NRF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+
+extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
+
+/**
+ * Initialize the system
+ *
+ * @param none
+ * @return none
+ *
+ * @brief Setup the microcontroller system.
+ * Initialize the System and update the SystemCoreClock variable.
+ */
+extern void SystemInit (void);
+
+/**
+ * Update SystemCoreClock variable
+ *
+ * @param none
+ * @return none
+ *
+ * @brief Updates the SystemCoreClock with current core Clock
+ * retrieved from cpu registers.
+ */
+extern void SystemCoreClockUpdate (void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SYSTEM_NRF_H */
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf51.c b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf51.c
index e31f2fe..5d48081 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf51.c
+++ b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf51.c
@@ -58,7 +58,7 @@
/* Prepare the peripherals for use as indicated by the PAN 26 "System: Manual setup is required
to enable the use of peripherals" found at Product Anomaly document for your device found at
- https://www.nordicsemi.com/DocLib The side effect of executing these instructions in the devices
+ https://infocenter.nordicsemi.com/index.jsp The side effect of executing these instructions in the devices
that do not need it is that the new peripherals in the second generation devices (LPCOMP for
example) will not be available. */
if (is_manual_peripheral_setup_needed())
@@ -69,7 +69,7 @@
/* Disable PROTENSET registers under debug, as indicated by PAN 59 "MPU: Reset value of DISABLEINDEBUG
register is incorrect" found at Product Anomaly document for your device found at
- https://www.nordicsemi.com/DocLib There is no side effect of using these instruction if not needed. */
+ https://infocenter.nordicsemi.com/index.jsp There is no side effect of using these instruction if not needed. */
if (is_disabled_in_debug_needed())
{
NRF_MPU->DISABLEINDEBUG = MPU_DISABLEINDEBUG_DISABLEINDEBUG_Disabled << MPU_DISABLEINDEBUG_DISABLEINDEBUG_Pos;
@@ -77,7 +77,7 @@
/* Execute the following code to eliminate excessive current in sleep mode with RAM retention in nRF51802 devices,
as indicated by PAN 76 "System: Excessive current in sleep mode with retention" found at Product Anomaly document
- for your device found at https://www.nordicsemi.com/DocLib */
+ for your device found at https://infocenter.nordicsemi.com/index.jsp */
if (is_peripheral_domain_setup_needed()){
if (*(uint32_t volatile *)0x4006EC00 != 1){
*(uint32_t volatile *)0x4006EC00 = 0x9375;
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf51.h b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf51.h
index 3227caf..48bd317 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf51.h
+++ b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf51.h
@@ -1,22 +1,32 @@
/*
-Copyright (c) 2009-2018 ARM Limited. All rights reserved.
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
- SPDX-License-Identifier: Apache-2.0
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
-Licensed under the Apache License, Version 2.0 (the License); you may
-not use this file except in compliance with the License.
-You may obtain a copy of the License at
+1. Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
- www.apache.org/licenses/LICENSE-2.0
+2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an AS IS BASIS, WITHOUT
-WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
+3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ contributors may be used to endorse or promote products derived from this
+ software without specific prior written permission.
-NOTICE: This file has been modified by Nordic Semiconductor ASA.
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
*/
@@ -27,32 +37,7 @@
extern "C" {
#endif
-#include <stdint.h>
-
-
-extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
-
-/**
- * Initialize the system
- *
- * @param none
- * @return none
- *
- * @brief Setup the microcontroller system.
- * Initialize the System and update the SystemCoreClock variable.
- */
-extern void SystemInit (void);
-
-/**
- * Update SystemCoreClock variable
- *
- * @param none
- * @return none
- *
- * @brief Updates the SystemCoreClock with current core Clock
- * retrieved from cpu registers.
- */
-extern void SystemCoreClockUpdate (void);
+#include "system_nrf.h"
#ifdef __cplusplus
}
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52.c b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52.c
index be6abbf..06997da 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52.c
+++ b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52.c
@@ -81,31 +81,31 @@
#endif
/* Workaround for Errata 12 "COMP: Reference ladder not correctly calibrated" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_12()){
*(volatile uint32_t *)0x40013540 = (*(uint32_t *)0x10000324 & 0x00001F00) >> 8;
}
/* Workaround for Errata 16 "System: RAM may be corrupt on wakeup from CPU IDLE" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_16()){
*(volatile uint32_t *)0x4007C074 = 3131961357ul;
}
/* Workaround for Errata 31 "CLOCK: Calibration values are not correctly loaded from FICR at reset" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_31()){
*(volatile uint32_t *)0x4000053C = ((*(volatile uint32_t *)0x10000244) & 0x0000E000) >> 13;
}
/* Workaround for Errata 32 "DIF: Debug session automatically enables TracePort pins" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_32()){
CoreDebug->DEMCR &= ~CoreDebug_DEMCR_TRCENA_Msk;
}
/* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_36()){
NRF_CLOCK->EVENTS_DONE = 0;
NRF_CLOCK->EVENTS_CTTO = 0;
@@ -113,13 +113,13 @@
}
/* Workaround for Errata 37 "RADIO: Encryption engine is slow by default" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_37()){
*(volatile uint32_t *)0x400005A0 = 0x3;
}
/* Workaround for Errata 57 "NFCT: NFC Modulation amplitude" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_57()){
*(volatile uint32_t *)0x40005610 = 0x00000005;
*(volatile uint32_t *)0x40005688 = 0x00000001;
@@ -128,7 +128,7 @@
}
/* Workaround for Errata 66 "TEMP: Linearity specification not met with default settings" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_66()){
NRF_TEMP->A0 = NRF_FICR->TEMP.A0;
NRF_TEMP->A1 = NRF_FICR->TEMP.A1;
@@ -150,13 +150,13 @@
}
/* Workaround for Errata 108 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_108()){
- *(volatile uint32_t *)0x40000EE4 = *(volatile uint32_t *)0x10000258 & 0x0000004F;
+ *(volatile uint32_t *)0x40000EE4ul = *(volatile uint32_t *)0x10000258ul & 0x0000004Ful;
}
/* Workaround for Errata 136 "System: Bits in RESETREAS are set when they should not be" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_136()){
if (NRF_POWER->RESETREAS & POWER_RESETREAS_RESETPIN_Msk){
NRF_POWER->RESETREAS = ~POWER_RESETREAS_RESETPIN_Msk;
@@ -164,7 +164,7 @@
}
/* Workaround for Errata 182 "RADIO: Fixes for anomalies #102, #106, and #107 do not take effect" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_182()){
*(volatile uint32_t *) 0x4000173C |= (0x1 << 10);
}
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52.h b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52.h
index d05316c..d35bd3c 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52.h
+++ b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52.h
@@ -1,22 +1,32 @@
/*
-Copyright (c) 2009-2018 ARM Limited. All rights reserved.
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
- SPDX-License-Identifier: Apache-2.0
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
-Licensed under the Apache License, Version 2.0 (the License); you may
-not use this file except in compliance with the License.
-You may obtain a copy of the License at
+1. Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
- www.apache.org/licenses/LICENSE-2.0
+2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an AS IS BASIS, WITHOUT
-WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
+3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ contributors may be used to endorse or promote products derived from this
+ software without specific prior written permission.
-NOTICE: This file has been modified by Nordic Semiconductor ASA.
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
*/
@@ -27,32 +37,7 @@
extern "C" {
#endif
-#include <stdint.h>
-
-
-extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
-
-/**
- * Initialize the system
- *
- * @param none
- * @return none
- *
- * @brief Setup the microcontroller system.
- * Initialize the System and update the SystemCoreClock variable.
- */
-extern void SystemInit (void);
-
-/**
- * Update SystemCoreClock variable
- *
- * @param none
- * @return none
- *
- * @brief Updates the SystemCoreClock with current core Clock
- * retrieved from cpu registers.
- */
-extern void SystemCoreClockUpdate (void);
+#include "system_nrf.h"
#ifdef __cplusplus
}
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52805.c b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52805.c
new file mode 100644
index 0000000..9a8751b
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52805.c
@@ -0,0 +1,191 @@
+/*
+
+Copyright (c) 2009-2018 ARM Limited. All rights reserved.
+
+ SPDX-License-Identifier: Apache-2.0
+
+Licensed under the Apache License, Version 2.0 (the License); you may
+not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+ www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an AS IS BASIS, WITHOUT
+WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+NOTICE: This file has been modified by Nordic Semiconductor ASA.
+
+*/
+
+/* NOTE: Template files (including this one) are application specific and therefore expected to
+ be copied into the application project folder prior to its use! */
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "nrf.h"
+#include "system_nrf52805.h"
+
+/*lint ++flb "Enter library region" */
+
+#define __SYSTEM_CLOCK_64M (64000000UL)
+
+static bool errata_31(void);
+static bool errata_36(void);
+static bool errata_66(void);
+static bool errata_136(void);
+static bool errata_217(void);
+
+#if defined ( __CC_ARM )
+ uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
+#elif defined ( __ICCARM__ )
+ __root uint32_t SystemCoreClock = __SYSTEM_CLOCK_64M;
+#elif defined ( __GNUC__ )
+ uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
+#endif
+
+void SystemCoreClockUpdate(void)
+{
+ SystemCoreClock = __SYSTEM_CLOCK_64M;
+}
+
+void SystemInit(void)
+{
+ /* Workaround for Errata 31 "CLOCK: Calibration values are not correctly loaded from FICR at reset" found at the Errata document
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
+ if (errata_31()){
+ *(volatile uint32_t *)0x4000053C = ((*(volatile uint32_t *)0x10000244) & 0x0000E000) >> 13;
+ }
+
+ /* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
+ if (errata_36()){
+ NRF_CLOCK->EVENTS_DONE = 0;
+ NRF_CLOCK->EVENTS_CTTO = 0;
+ NRF_CLOCK->CTIV = 0;
+ }
+
+ /* Workaround for Errata 66 "TEMP: Linearity specification not met with default settings" found at the Errata document
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
+ if (errata_66()){
+ NRF_TEMP->A0 = NRF_FICR->TEMP.A0;
+ NRF_TEMP->A1 = NRF_FICR->TEMP.A1;
+ NRF_TEMP->A2 = NRF_FICR->TEMP.A2;
+ NRF_TEMP->A3 = NRF_FICR->TEMP.A3;
+ NRF_TEMP->A4 = NRF_FICR->TEMP.A4;
+ NRF_TEMP->A5 = NRF_FICR->TEMP.A5;
+ NRF_TEMP->B0 = NRF_FICR->TEMP.B0;
+ NRF_TEMP->B1 = NRF_FICR->TEMP.B1;
+ NRF_TEMP->B2 = NRF_FICR->TEMP.B2;
+ NRF_TEMP->B3 = NRF_FICR->TEMP.B3;
+ NRF_TEMP->B4 = NRF_FICR->TEMP.B4;
+ NRF_TEMP->B5 = NRF_FICR->TEMP.B5;
+ NRF_TEMP->T0 = NRF_FICR->TEMP.T0;
+ NRF_TEMP->T1 = NRF_FICR->TEMP.T1;
+ NRF_TEMP->T2 = NRF_FICR->TEMP.T2;
+ NRF_TEMP->T3 = NRF_FICR->TEMP.T3;
+ NRF_TEMP->T4 = NRF_FICR->TEMP.T4;
+ }
+
+ /* Workaround for Errata 136 "System: Bits in RESETREAS are set when they should not be" found at the Errata document
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
+ if (errata_136()){
+ if (NRF_POWER->RESETREAS & POWER_RESETREAS_RESETPIN_Msk){
+ NRF_POWER->RESETREAS = ~POWER_RESETREAS_RESETPIN_Msk;
+ }
+ }
+
+ /* Workaround for Errata 217 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
+ if (errata_217()){
+ *(volatile uint32_t *)0x40000EE4ul |= 0x0000000Ful;
+ }
+
+ /* Configure GPIO pads as pPin Reset pin if Pin Reset capabilities desired. If CONFIG_GPIO_AS_PINRESET is not
+ defined, pin reset will not be available. One GPIO (see Product Specification to see which one) will then be
+ reserved for PinReset and not available as normal GPIO. */
+ #if defined (CONFIG_GPIO_AS_PINRESET)
+
+ #define RESET_PIN 21
+
+ if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos)) ||
+ ((NRF_UICR->PSELRESET[1] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos))){
+ NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
+ while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+ NRF_UICR->PSELRESET[0] = RESET_PIN;
+ while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+ NRF_UICR->PSELRESET[1] = RESET_PIN;
+ while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+ NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
+ while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+ NVIC_SystemReset();
+ }
+ #endif
+
+ SystemCoreClockUpdate();
+}
+
+static bool errata_31(void)
+{
+ if (*(uint32_t *)0x10000130ul == 0xFul){
+ if (*(uint32_t *)0x10000134ul == 0x0ul){
+ return true;
+ }
+ }
+
+ /* Apply by default for unknown devices until errata is confirmed fixed. */
+ return true;
+}
+
+static bool errata_36(void)
+{
+ if (*(uint32_t *)0x10000130ul == 0xFul){
+ if (*(uint32_t *)0x10000134ul == 0x0ul){
+ return true;
+ }
+ }
+
+ /* Apply by default for unknown devices until errata is confirmed fixed. */
+ return true;
+}
+
+static bool errata_66(void)
+{
+ if (*(uint32_t *)0x10000130ul == 0xFul){
+ if (*(uint32_t *)0x10000134ul == 0x0ul){
+ return true;
+ }
+ }
+
+ /* Apply by default for unknown devices until errata is confirmed fixed. */
+ return true;
+}
+
+static bool errata_136(void)
+{
+ if (*(uint32_t *)0x10000130ul == 0xFul){
+ if (*(uint32_t *)0x10000134ul == 0x0ul){
+ return true;
+ }
+ }
+
+ /* Apply by default for unknown devices until errata is confirmed fixed. */
+ return true;
+}
+
+static bool errata_217(void)
+{
+ if (*(uint32_t *)0x10000130ul == 0xFul){
+ if (*(uint32_t *)0x10000134ul == 0x0ul){
+ return true;
+ }
+ }
+
+ /* Apply by default for unknown devices until errata is confirmed fixed. */
+ return true;
+}
+
+
+/*lint --flb "Leave library region" */
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52805.h b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52805.h
new file mode 100644
index 0000000..e0c2977
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52805.h
@@ -0,0 +1,46 @@
+/*
+
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+
+2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ contributors may be used to endorse or promote products derived from this
+ software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
+
+*/
+
+#ifndef SYSTEM_NRF52805_H
+#define SYSTEM_NRF52805_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "system_nrf.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SYSTEM_NRF52805_H */
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52810.c b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52810.c
index 26ef79b..ac04dbe 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52810.c
+++ b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52810.c
@@ -37,6 +37,7 @@
static bool errata_66(void);
static bool errata_103(void);
static bool errata_136(void);
+static bool errata_217(void);
/* Helper functions for Errata workarounds in nRF52832 */
#if defined (DEVELOP_IN_NRF52832)
@@ -86,7 +87,7 @@
#if defined (DEVELOP_IN_NRF52832)
/* Workaround for Errata 12 "COMP: Reference ladder not correctly calibrated" found at the Errata document
- for nRF52832 device located at https://www.nordicsemi.com/DocLib */
+ for nRF52832 device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_12()){
*(volatile uint32_t *)0x40013540 = (*(uint32_t *)0x10000324 & 0x00001F00) >> 8;
}
@@ -94,28 +95,28 @@
#if defined (DEVELOP_IN_NRF52832)
/* Workaround for Errata 16 "System: RAM may be corrupt on wakeup from CPU IDLE" found at the Errata document
- for nRF52832 device located at https://www.nordicsemi.com/DocLib */
+ for nRF52832 device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_16()){
*(volatile uint32_t *)0x4007C074 = 3131961357ul;
}
#endif
/* Workaround for Errata 31 "CLOCK: Calibration values are not correctly loaded from FICR at reset" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_31()){
*(volatile uint32_t *)0x4000053C = ((*(volatile uint32_t *)0x10000244) & 0x0000E000) >> 13;
}
#if defined (DEVELOP_IN_NRF52832)
/* Workaround for Errata 32 "DIF: Debug session automatically enables TracePort pins" found at the Errata document
- for nRF52832 device located at https://www.nordicsemi.com/DocLib */
+ for nRF52832 device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_32()){
CoreDebug->DEMCR &= ~CoreDebug_DEMCR_TRCENA_Msk;
}
#endif
/* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_36()){
NRF_CLOCK->EVENTS_DONE = 0;
NRF_CLOCK->EVENTS_CTTO = 0;
@@ -124,7 +125,7 @@
#if defined (DEVELOP_IN_NRF52832)
/* Workaround for Errata 37 "RADIO: Encryption engine is slow by default" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_37()){
*(volatile uint32_t *)0x400005A0 = 0x3;
}
@@ -132,7 +133,7 @@
#if defined (DEVELOP_IN_NRF52832)
/* Workaround for Errata 57 "NFCT: NFC Modulation amplitude" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_57()){
*(volatile uint32_t *)0x40005610 = 0x00000005;
*(volatile uint32_t *)0x40005688 = 0x00000001;
@@ -142,7 +143,7 @@
#endif
/* Workaround for Errata 66 "TEMP: Linearity specification not met with default settings" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_66()){
NRF_TEMP->A0 = NRF_FICR->TEMP.A0;
NRF_TEMP->A1 = NRF_FICR->TEMP.A1;
@@ -164,21 +165,21 @@
}
/* Workaround for Errata 103 "CCM: Wrong reset value of CCM MAXPACKETSIZE" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_103()){
NRF_CCM->MAXPACKETSIZE = 0xFBul;
}
-
+
#if defined (DEVELOP_IN_NRF52832)
/* Workaround for Errata 108 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_108()){
- *(volatile uint32_t *)0x40000EE4 = *(volatile uint32_t *)0x10000258 & 0x0000004F;
+ *(volatile uint32_t *)0x40000EE4ul = *(volatile uint32_t *)0x10000258ul & 0x0000004Ful;
}
#endif
/* Workaround for Errata 136 "System: Bits in RESETREAS are set when they should not be" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_136()){
if (NRF_POWER->RESETREAS & POWER_RESETREAS_RESETPIN_Msk){
NRF_POWER->RESETREAS = ~POWER_RESETREAS_RESETPIN_Msk;
@@ -187,12 +188,18 @@
#if defined (DEVELOP_IN_NRF52832)
/* Workaround for Errata 182 "RADIO: Fixes for anomalies #102, #106, and #107 do not take effect" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_182()){
*(volatile uint32_t *) 0x4000173C |= (0x1 << 10);
}
#endif
+ /* Workaround for Errata 217 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
+ if (errata_217()){
+ *(volatile uint32_t *)0x40000EE4ul |= 0x0000000Ful;
+ }
+
/* Configure GPIO pads as pPin Reset pin if Pin Reset capabilities desired. If CONFIG_GPIO_AS_PINRESET is not
defined, pin reset will not be available. One GPIO (see Product Specification to see which one) will then be
reserved for PinReset and not available as normal GPIO. */
@@ -248,10 +255,15 @@
static bool errata_31(void)
{
- if ((*(uint32_t *)0x10000130ul == 0xAul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
- return true;
+ if (*(uint32_t *)0x10000130ul == 0xAul){
+ if (*(uint32_t *)0x10000134ul == 0x0ul){
+ return true;
+ }
+ if (*(uint32_t *)0x10000134ul == 0x1ul){
+ return true;
+ }
}
-
+
#if defined (DEVELOP_IN_NRF52832)
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30){
@@ -263,10 +275,11 @@
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x50){
return true;
}
+ return false;
}
#endif
- /* Fix should always apply. */
+ /* Apply by default for unknown devices until errata is confirmed fixed. */
return true;
}
@@ -285,10 +298,15 @@
static bool errata_36(void)
{
- if ((*(uint32_t *)0x10000130ul == 0xAul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
- return true;
+ if (*(uint32_t *)0x10000130ul == 0xAul){
+ if (*(uint32_t *)0x10000134ul == 0x0ul){
+ return true;
+ }
+ if (*(uint32_t *)0x10000134ul == 0x1ul){
+ return true;
+ }
}
-
+
#if defined (DEVELOP_IN_NRF52832)
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30){
@@ -300,10 +318,12 @@
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x50){
return true;
}
+ return false;
}
+
#endif
- /* Fix should always apply. */
+ /* Apply by default for unknown devices until errata is confirmed fixed. */
return true;
}
@@ -335,30 +355,37 @@
static bool errata_66(void)
{
- if ((*(uint32_t *)0x10000130ul == 0xAul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
- return true;
+ if (*(uint32_t *)0x10000130ul == 0xAul){
+ if (*(uint32_t *)0x10000134ul == 0x0ul){
+ return true;
+ }
+ if (*(uint32_t *)0x10000134ul == 0x1ul){
+ return true;
+ }
}
-
+
#if defined (DEVELOP_IN_NRF52832)
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x50){
return true;
}
+ return false;
}
#endif
- /* Fix should always apply. */
+ /* Apply by default for unknown devices until errata is confirmed fixed. */
return true;
}
static bool errata_103(void)
{
- if ((*(uint32_t *)0x10000130ul == 0xAul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
- return true;
+ if (*(uint32_t *)0x10000130ul == 0xAul){
+ if (*(uint32_t *)0x10000134ul == 0x0ul){
+ return true;
+ }
}
- /* Fix should always apply. */
- return true;
+ return false;
}
#if defined (DEVELOP_IN_NRF52832)
@@ -382,10 +409,15 @@
static bool errata_136(void)
{
- if ((*(uint32_t *)0x10000130ul == 0xAul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
- return true;
+ if (*(uint32_t *)0x10000130ul == 0xAul){
+ if (*(uint32_t *)0x10000134ul == 0x0ul){
+ return true;
+ }
+ if (*(uint32_t *)0x10000134ul == 0x1ul){
+ return true;
+ }
}
-
+
#if defined (DEVELOP_IN_NRF52832)
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0)){
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30){
@@ -397,10 +429,11 @@
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x50){
return true;
}
+ return false;
}
#endif
- /* Fix should always apply. */
+ /* Apply by default for unknown devices until errata is confirmed fixed. */
return true;
}
@@ -417,5 +450,20 @@
}
#endif
+static bool errata_217(void)
+{
+ if (*(uint32_t *)0x10000130ul == 0xAul){
+ if (*(uint32_t *)0x10000134ul == 0x0ul){
+ return false;
+ }
+ if (*(uint32_t *)0x10000134ul == 0x1ul){
+ return true;
+ }
+ }
+
+ /* Apply by default for unknown devices until errata is confirmed fixed. */
+ return true;
+}
+
/*lint --flb "Leave library region" */
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52810.h b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52810.h
index e395ee9..e2819fa 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52810.h
+++ b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52810.h
@@ -1,22 +1,32 @@
/*
-Copyright (c) 2009-2018 ARM Limited. All rights reserved.
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
- SPDX-License-Identifier: Apache-2.0
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
-Licensed under the Apache License, Version 2.0 (the License); you may
-not use this file except in compliance with the License.
-You may obtain a copy of the License at
+1. Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
- www.apache.org/licenses/LICENSE-2.0
+2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an AS IS BASIS, WITHOUT
-WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
+3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ contributors may be used to endorse or promote products derived from this
+ software without specific prior written permission.
-NOTICE: This file has been modified by Nordic Semiconductor ASA.
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
*/
@@ -27,32 +37,7 @@
extern "C" {
#endif
-#include <stdint.h>
-
-
-extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
-
-/**
- * Initialize the system
- *
- * @param none
- * @return none
- *
- * @brief Setup the microcontroller system.
- * Initialize the System and update the SystemCoreClock variable.
- */
-extern void SystemInit (void);
-
-/**
- * Update SystemCoreClock variable
- *
- * @param none
- * @return none
- *
- * @brief Updates the SystemCoreClock with current core Clock
- * retrieved from cpu registers.
- */
-extern void SystemCoreClockUpdate (void);
+#include "system_nrf.h"
#ifdef __cplusplus
}
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52811.c b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52811.c
index ddf76ed..6fe44aa 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52811.c
+++ b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52811.c
@@ -36,7 +36,13 @@
static bool errata_36(void);
static bool errata_66(void);
static bool errata_136(void);
+static bool errata_217(void);
+/* nRF52840 erratas */
+#ifdef DEVELOP_IN_NRF52840
+ static bool errata_103(void);
+ static bool errata_115(void);
+#endif
#if defined ( __CC_ARM )
uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
@@ -54,13 +60,13 @@
void SystemInit(void)
{
/* Workaround for Errata 31 "CLOCK: Calibration values are not correctly loaded from FICR at reset" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_31()){
*(volatile uint32_t *)0x4000053C = ((*(volatile uint32_t *)0x10000244) & 0x0000E000) >> 13;
}
/* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_36()){
NRF_CLOCK->EVENTS_DONE = 0;
NRF_CLOCK->EVENTS_CTTO = 0;
@@ -68,7 +74,7 @@
}
/* Workaround for Errata 66 "TEMP: Linearity specification not met with default settings" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_66()){
NRF_TEMP->A0 = NRF_FICR->TEMP.A0;
NRF_TEMP->A1 = NRF_FICR->TEMP.A1;
@@ -88,26 +94,54 @@
NRF_TEMP->T3 = NRF_FICR->TEMP.T3;
NRF_TEMP->T4 = NRF_FICR->TEMP.T4;
}
+
+ #ifdef DEVELOP_IN_NRF52840
+
+ /* Workaround for Errata 103 "CCM: Wrong reset value of CCM MAXPACKETSIZE" found at the Errata document
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
+ if (errata_103()){
+ NRF_CCM->MAXPACKETSIZE = 0xFBul;
+ }
+
+ /* Workaround for Errata 115 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
+ if (errata_115()){
+ *(volatile uint32_t *)0x40000EE4 = (*(volatile uint32_t *)0x40000EE4 & 0xFFFFFFF0) | (*(uint32_t *)0x10000258 & 0x0000000F);
+ }
+ #endif
/* Workaround for Errata 136 "System: Bits in RESETREAS are set when they should not be" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_136()){
if (NRF_POWER->RESETREAS & POWER_RESETREAS_RESETPIN_Msk){
NRF_POWER->RESETREAS = ~POWER_RESETREAS_RESETPIN_Msk;
}
}
+
+ /* Workaround for Errata 217 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
+ if (errata_217()){
+ *(volatile uint32_t *)0x40000EE4ul |= 0x0000000Ful;
+ }
/* Configure GPIO pads as pPin Reset pin if Pin Reset capabilities desired. If CONFIG_GPIO_AS_PINRESET is not
defined, pin reset will not be available. One GPIO (see Product Specification to see which one) will then be
reserved for PinReset and not available as normal GPIO. */
#if defined (CONFIG_GPIO_AS_PINRESET)
+
+ #ifdef DEVELOP_IN_NRF52840
+ #define RESET_PIN 18
+ #else
+ #define RESET_PIN 21
+ #endif
+
if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos)) ||
((NRF_UICR->PSELRESET[1] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos))){
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
- NRF_UICR->PSELRESET[0] = 21;
+ NRF_UICR->PSELRESET[0] = RESET_PIN;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
- NRF_UICR->PSELRESET[1] = 21;
+ NRF_UICR->PSELRESET[1] = RESET_PIN;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
@@ -120,49 +154,140 @@
static bool errata_31(void)
{
- #if !defined (DISABLE_WORKAROUND_31)
- if ((*(uint32_t *)0x10000130ul == 0xEul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
- return true;
+ if (*(uint32_t *)0x10000130ul == 0xEul){
+ if (*(uint32_t *)0x10000134ul == 0x0ul){
+ return true;
+ }
}
- #endif
-
- return false;
+
+ /* Apply by default for unknown devices until errata is confirmed fixed. */
+ return true;
}
static bool errata_36(void)
{
- #if !defined (DISABLE_WORKAROUND_36)
- if ((*(uint32_t *)0x10000130ul == 0xEul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
- return true;
+ if (*(uint32_t *)0x10000130ul == 0xEul){
+ if (*(uint32_t *)0x10000134ul == 0x0ul){
+ return true;
+ }
}
+
+ #ifdef DEVELOP_IN_NRF52840
+ if (*(uint32_t *)0x10000130ul == 0x8ul){
+ if (*(uint32_t *)0x10000134ul == 0x0ul){
+ return true;
+ }
+ if (*(uint32_t *)0x10000134ul == 0x1ul){
+ return true;
+ }
+ if (*(uint32_t *)0x10000134ul == 0x2ul){
+ return true;
+ }
+ if (*(uint32_t *)0x10000134ul == 0x3ul){
+ return true;
+ }
+ }
#endif
-
- return false;
+
+ /* Apply by default for unknown devices until errata is confirmed fixed. */
+ return true;
}
static bool errata_66(void)
{
- #if !defined (DISABLE_WORKAROUND_66)
- if ((*(uint32_t *)0x10000130ul == 0xEul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
- return true;
+ if (*(uint32_t *)0x10000130ul == 0xEul){
+ if (*(uint32_t *)0x10000134ul == 0x0ul){
+ return true;
+ }
}
+
+ #ifdef DEVELOP_IN_NRF52840
+ if (*(uint32_t *)0x10000130ul == 0x8ul){
+ if (*(uint32_t *)0x10000134ul == 0x0ul){
+ return true;
+ }
+ if (*(uint32_t *)0x10000134ul == 0x1ul){
+ return true;
+ }
+ if (*(uint32_t *)0x10000134ul == 0x2ul){
+ return true;
+ }
+ if (*(uint32_t *)0x10000134ul == 0x3ul){
+ return true;
+ }
+ }
#endif
-
- return false;
+
+ /* Apply by default for unknown devices until errata is confirmed fixed. */
+ return true;
}
static bool errata_136(void)
{
- #if !defined (DISABLE_WORKAROUND_136)
- if ((*(uint32_t *)0x10000130ul == 0xEul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
- return true;
+ if (*(uint32_t *)0x10000130ul == 0xEul){
+ if (*(uint32_t *)0x10000134ul == 0x0ul){
+ return true;
+ }
}
+
+ #ifdef DEVELOP_IN_NRF52840
+ if (*(uint32_t *)0x10000130ul == 0x8ul){
+ if (*(uint32_t *)0x10000134ul == 0x0ul){
+ return true;
+ }
+ if (*(uint32_t *)0x10000134ul == 0x1ul){
+ return true;
+ }
+ if (*(uint32_t *)0x10000134ul == 0x2ul){
+ return true;
+ }
+ if (*(uint32_t *)0x10000134ul == 0x3ul){
+ return true;
+ }
+ }
#endif
-
- return false;
+
+ /* Apply by default for unknown devices until errata is confirmed fixed. */
+ return true;
}
+#ifdef DEVELOP_IN_NRF52840
+ static bool errata_103(void)
+ {
+ if (*(uint32_t *)0x10000130ul == 0x8ul){
+ if (*(uint32_t *)0x10000134ul == 0x0ul){
+ return true;
+ }
+ }
+
+ return false;
+ }
+
+
+ static bool errata_115(void)
+ {
+ if (*(uint32_t *)0x10000130ul == 0x8ul){
+ if (*(uint32_t *)0x10000134ul == 0x0ul){
+ return true;
+ }
+ }
+
+ return false;
+ }
+#endif
+
+static bool errata_217(void)
+{
+ if (*(uint32_t *)0x10000130ul == 0xEul){
+ if (*(uint32_t *)0x10000134ul == 0x0ul){
+ return true;
+ }
+ }
+
+ /* Apply by default for unknown devices until errata is confirmed fixed. */
+ return true;
+}
/*lint --flb "Leave library region" */
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52811.h b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52811.h
index 20d8769..ad8bb2f 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52811.h
+++ b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52811.h
@@ -1,22 +1,32 @@
/*
-Copyright (c) 2009-2018 ARM Limited. All rights reserved.
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
- SPDX-License-Identifier: Apache-2.0
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
-Licensed under the Apache License, Version 2.0 (the License); you may
-not use this file except in compliance with the License.
-You may obtain a copy of the License at
+1. Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
- www.apache.org/licenses/LICENSE-2.0
+2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an AS IS BASIS, WITHOUT
-WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
+3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ contributors may be used to endorse or promote products derived from this
+ software without specific prior written permission.
-NOTICE: This file has been modified by Nordic Semiconductor ASA.
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
*/
@@ -27,32 +37,7 @@
extern "C" {
#endif
-#include <stdint.h>
-
-
-extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
-
-/**
- * Initialize the system
- *
- * @param none
- * @return none
- *
- * @brief Setup the microcontroller system.
- * Initialize the System and update the SystemCoreClock variable.
- */
-extern void SystemInit (void);
-
-/**
- * Update SystemCoreClock variable
- *
- * @param none
- * @return none
- *
- * @brief Updates the SystemCoreClock with current core Clock
- * retrieved from cpu registers.
- */
-extern void SystemCoreClockUpdate (void);
+#include "system_nrf.h"
#ifdef __cplusplus
}
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52833.c b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52833.c
new file mode 100644
index 0000000..60a6133
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52833.c
@@ -0,0 +1,191 @@
+/*
+
+Copyright (c) 2009-2018 ARM Limited. All rights reserved.
+
+ SPDX-License-Identifier: Apache-2.0
+
+Licensed under the Apache License, Version 2.0 (the License); you may
+not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+ www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an AS IS BASIS, WITHOUT
+WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+NOTICE: This file has been modified by Nordic Semiconductor ASA.
+
+*/
+
+/* NOTE: Template files (including this one) are application specific and therefore expected to
+ be copied into the application project folder prior to its use! */
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "nrf.h"
+#include "system_nrf52833.h"
+
+/*lint ++flb "Enter library region" */
+
+#define __SYSTEM_CLOCK_64M (64000000UL)
+
+static bool errata_36(void);
+static bool errata_66(void);
+static bool errata_136(void);
+
+#if defined ( __CC_ARM )
+ uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
+#elif defined ( __ICCARM__ )
+ __root uint32_t SystemCoreClock = __SYSTEM_CLOCK_64M;
+#elif defined ( __GNUC__ )
+ uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
+#endif
+
+void SystemCoreClockUpdate(void)
+{
+ SystemCoreClock = __SYSTEM_CLOCK_64M;
+}
+
+void SystemInit(void)
+{
+ /* Enable SWO trace functionality. If ENABLE_SWO is not defined, SWO pin will be used as GPIO (see Product
+ Specification to see which one). */
+ #if defined (ENABLE_SWO)
+ CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
+ NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Serial << CLOCK_TRACECONFIG_TRACEMUX_Pos;
+ NRF_P1->PIN_CNF[0] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+ #endif
+
+ /* Enable Trace functionality. If ENABLE_TRACE is not defined, TRACE pins will be used as GPIOs (see Product
+ Specification to see which ones). */
+ #if defined (ENABLE_TRACE)
+ CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
+ NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Parallel << CLOCK_TRACECONFIG_TRACEMUX_Pos;
+ NRF_P0->PIN_CNF[7] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+ NRF_P1->PIN_CNF[0] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+ NRF_P0->PIN_CNF[12] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+ NRF_P0->PIN_CNF[11] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+ NRF_P1->PIN_CNF[9] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+ #endif
+
+ /* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
+ if (errata_36()){
+ NRF_CLOCK->EVENTS_DONE = 0;
+ NRF_CLOCK->EVENTS_CTTO = 0;
+ NRF_CLOCK->CTIV = 0;
+ }
+
+ /* Workaround for Errata 66 "TEMP: Linearity specification not met with default settings" found at the Errata document
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
+ if (errata_66()){
+ NRF_TEMP->A0 = NRF_FICR->TEMP.A0;
+ NRF_TEMP->A1 = NRF_FICR->TEMP.A1;
+ NRF_TEMP->A2 = NRF_FICR->TEMP.A2;
+ NRF_TEMP->A3 = NRF_FICR->TEMP.A3;
+ NRF_TEMP->A4 = NRF_FICR->TEMP.A4;
+ NRF_TEMP->A5 = NRF_FICR->TEMP.A5;
+ NRF_TEMP->B0 = NRF_FICR->TEMP.B0;
+ NRF_TEMP->B1 = NRF_FICR->TEMP.B1;
+ NRF_TEMP->B2 = NRF_FICR->TEMP.B2;
+ NRF_TEMP->B3 = NRF_FICR->TEMP.B3;
+ NRF_TEMP->B4 = NRF_FICR->TEMP.B4;
+ NRF_TEMP->B5 = NRF_FICR->TEMP.B5;
+ NRF_TEMP->T0 = NRF_FICR->TEMP.T0;
+ NRF_TEMP->T1 = NRF_FICR->TEMP.T1;
+ NRF_TEMP->T2 = NRF_FICR->TEMP.T2;
+ NRF_TEMP->T3 = NRF_FICR->TEMP.T3;
+ NRF_TEMP->T4 = NRF_FICR->TEMP.T4;
+ }
+
+ /* Workaround for Errata 136 "System: Bits in RESETREAS are set when they should not be" found at the Errata document
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
+ if (errata_136()){
+ if (NRF_POWER->RESETREAS & POWER_RESETREAS_RESETPIN_Msk){
+ NRF_POWER->RESETREAS = ~POWER_RESETREAS_RESETPIN_Msk;
+ }
+ }
+
+ /* Enable the FPU if the compiler used floating point unit instructions. __FPU_USED is a MACRO defined by the
+ * compiler. Since the FPU consumes energy, remember to disable FPU use in the compiler if floating point unit
+ * operations are not used in your code. */
+ #if (__FPU_USED == 1)
+ SCB->CPACR |= (3UL << 20) | (3UL << 22);
+ __DSB();
+ __ISB();
+ #endif
+
+ /* Configure NFCT pins as GPIOs if NFCT is not to be used in your code. If CONFIG_NFCT_PINS_AS_GPIOS is not defined,
+ two GPIOs (see Product Specification to see which ones) will be reserved for NFC and will not be available as
+ normal GPIOs. */
+ #if defined (CONFIG_NFCT_PINS_AS_GPIOS)
+ if ((NRF_UICR->NFCPINS & UICR_NFCPINS_PROTECT_Msk) == (UICR_NFCPINS_PROTECT_NFC << UICR_NFCPINS_PROTECT_Pos)){
+ NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
+ while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+ NRF_UICR->NFCPINS &= ~UICR_NFCPINS_PROTECT_Msk;
+ while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+ NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
+ while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+ NVIC_SystemReset();
+ }
+ #endif
+
+ /* Configure GPIO pads as pPin Reset pin if Pin Reset capabilities desired. If CONFIG_GPIO_AS_PINRESET is not
+ defined, pin reset will not be available. One GPIO (see Product Specification to see which one) will then be
+ reserved for PinReset and not available as normal GPIO. */
+ #if defined (CONFIG_GPIO_AS_PINRESET)
+ if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos)) ||
+ ((NRF_UICR->PSELRESET[1] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos))){
+ NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
+ while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+ NRF_UICR->PSELRESET[0] = 18;
+ while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+ NRF_UICR->PSELRESET[1] = 18;
+ while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+ NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
+ while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+ NVIC_SystemReset();
+ }
+ #endif
+
+ SystemCoreClockUpdate();
+}
+
+static bool errata_36(void)
+{
+ if (*(uint32_t *)0x10000130ul == 0xDul){
+ if (*(uint32_t *)0x10000134ul == 0x0ul){
+ return true;
+ }
+ }
+
+ return false;
+}
+
+
+static bool errata_66(void)
+{
+ if (*(uint32_t *)0x10000130ul == 0xDul){
+ if (*(uint32_t *)0x10000134ul == 0x0ul){
+ return true;
+ }
+ }
+
+ return false;
+}
+
+static bool errata_136(void)
+{
+ if (*(uint32_t *)0x10000130ul == 0xDul){
+ if (*(uint32_t *)0x10000134ul == 0x0ul){
+ return true;
+ }
+ }
+
+ return false;
+}
+
+/*lint --flb "Leave library region" */
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52833.h b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52833.h
new file mode 100644
index 0000000..927a039
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52833.h
@@ -0,0 +1,46 @@
+/*
+
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+
+2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ contributors may be used to endorse or promote products derived from this
+ software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
+
+*/
+
+#ifndef SYSTEM_NRF52833_H
+#define SYSTEM_NRF52833_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "system_nrf.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SYSTEM_NRF52833_H */
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52840.c b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52840.c
index bd84aa2..1d177d6 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52840.c
+++ b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52840.c
@@ -77,7 +77,7 @@
#endif
/* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_36()){
NRF_CLOCK->EVENTS_DONE = 0;
NRF_CLOCK->EVENTS_CTTO = 0;
@@ -85,7 +85,7 @@
}
/* Workaround for Errata 66 "TEMP: Linearity specification not met with default settings" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_66()){
NRF_TEMP->A0 = NRF_FICR->TEMP.A0;
NRF_TEMP->A1 = NRF_FICR->TEMP.A1;
@@ -107,31 +107,31 @@
}
/* Workaround for Errata 98 "NFCT: Not able to communicate with the peer" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_98()){
*(volatile uint32_t *)0x4000568Cul = 0x00038148ul;
}
/* Workaround for Errata 103 "CCM: Wrong reset value of CCM MAXPACKETSIZE" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_103()){
NRF_CCM->MAXPACKETSIZE = 0xFBul;
}
/* Workaround for Errata 115 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_115()){
- *(volatile uint32_t *)0x40000EE4 = (*(volatile uint32_t *)0x40000EE4 & 0xFFFFFFF0) | (*(uint32_t *)0x10000258 & 0x0000000F);
+ *(volatile uint32_t *)0x40000EE4ul = (*(volatile uint32_t *)0x40000EE4ul & 0xFFFFFFF0ul) | (*(uint32_t *)0x10000258ul & 0x0000000Ful);
}
/* Workaround for Errata 120 "QSPI: Data read or written is corrupted" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_120()){
*(volatile uint32_t *)0x40029640ul = 0x200ul;
}
/* Workaround for Errata 136 "System: Bits in RESETREAS are set when they should not be" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
if (errata_136()){
if (NRF_POWER->RESETREAS & POWER_RESETREAS_RESETPIN_Msk){
NRF_POWER->RESETREAS = ~POWER_RESETREAS_RESETPIN_Msk;
@@ -200,7 +200,8 @@
return true;
}
}
-
+
+ /* Apply by default for unknown devices until errata is confirmed fixed. */
return true;
}
@@ -221,7 +222,8 @@
return true;
}
}
-
+
+ /* Apply by default for unknown devices until errata is confirmed fixed. */
return true;
}
@@ -290,7 +292,8 @@
return true;
}
}
-
+
+ /* Apply by default for unknown devices until errata is confirmed fixed. */
return true;
}
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52840.h b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52840.h
index 28b3151..169b2ef 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52840.h
+++ b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf52840.h
@@ -1,22 +1,32 @@
/*
-Copyright (c) 2009-2018 ARM Limited. All rights reserved.
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
- SPDX-License-Identifier: Apache-2.0
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
-Licensed under the Apache License, Version 2.0 (the License); you may
-not use this file except in compliance with the License.
-You may obtain a copy of the License at
+1. Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
- www.apache.org/licenses/LICENSE-2.0
+2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an AS IS BASIS, WITHOUT
-WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
+3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ contributors may be used to endorse or promote products derived from this
+ software without specific prior written permission.
-NOTICE: This file has been modified by Nordic Semiconductor ASA.
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
*/
@@ -27,32 +37,7 @@
extern "C" {
#endif
-#include <stdint.h>
-
-
-extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
-
-/**
- * Initialize the system
- *
- * @param none
- * @return none
- *
- * @brief Setup the microcontroller system.
- * Initialize the System and update the SystemCoreClock variable.
- */
-extern void SystemInit (void);
-
-/**
- * Update SystemCoreClock variable
- *
- * @param none
- * @return none
- *
- * @brief Updates the SystemCoreClock with current core Clock
- * retrieved from cpu registers.
- */
-extern void SystemCoreClockUpdate (void);
+#include "system_nrf.h"
#ifdef __cplusplus
}
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf9160.c b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf9160.c
index 70e35ec..cf3f499 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf9160.c
+++ b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf9160.c
@@ -33,6 +33,16 @@
#define __SYSTEM_CLOCK (64000000UL) /*!< nRF9160 Application core uses a fixed System Clock Frequency of 64MHz */
+#define TRACE_PIN_CNF_VALUE ( (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos) | \
+ (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | \
+ (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) | \
+ (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | \
+ (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) )
+#define TRACE_TRACECLK_PIN (21)
+#define TRACE_TRACEDATA0_PIN (22)
+#define TRACE_TRACEDATA1_PIN (23)
+#define TRACE_TRACEDATA2_PIN (24)
+#define TRACE_TRACEDATA3_PIN (25)
#if defined ( __CC_ARM )
uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK;
@@ -42,6 +52,13 @@
uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK;
#endif
+/* Global values used used in Secure mode SystemInit. */
+#if !defined(NRF_TRUSTZONE_NONSECURE)
+ /* Global values used by UICR erase fix algorithm. */
+ static uint32_t uicr_erased_value;
+ static uint32_t uicr_new_value;
+#endif
+
/* Errata are only handled in secure mode since they usually need access to FICR. */
#if !defined(NRF_TRUSTZONE_NONSECURE)
static bool uicr_HFXOSRC_erased(void);
@@ -49,6 +66,7 @@
static bool errata_6(void);
static bool errata_14(void);
static bool errata_15(void);
+ static bool errata_20(void);
#endif
void SystemCoreClockUpdate(void)
@@ -66,8 +84,34 @@
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
SAU->CTRL |= (1 << SAU_CTRL_ALLNS_Pos);
#endif
+
+ /* Workaround for Errata 6 "POWER: SLEEPENTER and SLEEPEXIT events asserted after pin reset" found at the Errata document
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
+ if (errata_6()){
+ NRF_POWER_S->EVENTS_SLEEPENTER = (POWER_EVENTS_SLEEPENTER_EVENTS_SLEEPENTER_NotGenerated << POWER_EVENTS_SLEEPENTER_EVENTS_SLEEPENTER_Pos);
+ NRF_POWER_S->EVENTS_SLEEPEXIT = (POWER_EVENTS_SLEEPEXIT_EVENTS_SLEEPEXIT_NotGenerated << POWER_EVENTS_SLEEPEXIT_EVENTS_SLEEPEXIT_Pos);
+ }
- /* Trimming of the device. Copy all the trimming values from FICR into the target addresses. Trim
+ /* Workaround for Errata 14 "REGULATORS: LDO mode at startup" found at the Errata document
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
+ if (errata_14()){
+ *((volatile uint32_t *)0x50004A38) = 0x01ul;
+ NRF_REGULATORS_S->DCDCEN = REGULATORS_DCDCEN_DCDCEN_Enabled << REGULATORS_DCDCEN_DCDCEN_Pos;
+ }
+
+ /* Workaround for Errata 15 "REGULATORS: LDO mode at startup" found at the Errata document
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
+ if (errata_15()){
+ NRF_REGULATORS_S->DCDCEN = REGULATORS_DCDCEN_DCDCEN_Enabled << REGULATORS_DCDCEN_DCDCEN_Pos;
+ }
+
+ /* Workaround for Errata 20 "RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document
+ for your device located at https://infocenter.nordicsemi.com/index.jsp */
+ if (errata_20()){
+ *((volatile uint32_t *)0x5003AEE4) = 0xE;
+ }
+
+ /* Trimming of the device. Copy all the trimming values from FICR into the target addresses. Trim
until one ADDR is not initialized. */
uint32_t index = 0;
for (index = 0; index < 256ul && NRF_FICR_S->TRIMCNF[index].ADDR != 0xFFFFFFFFul; index++){
@@ -79,56 +123,96 @@
#pragma diag_default=Pa082
#endif
}
-
+
/* Set UICR->HFXOSRC and UICR->HFXOCNT to working defaults if UICR was erased */
if (uicr_HFXOSRC_erased() || uicr_HFXOCNT_erased()) {
/* Wait for pending NVMC operations to finish */
while (NRF_NVMC_S->READY != NVMC_READY_READY_Ready);
-
+
/* Enable write mode in NVMC */
NRF_NVMC_S->CONFIG = NVMC_CONFIG_WEN_Wen;
while (NRF_NVMC_S->READY != NVMC_READY_READY_Ready);
-
+
if (uicr_HFXOSRC_erased()){
/* Write default value to UICR->HFXOSRC */
- NRF_UICR_S->HFXOSRC = (NRF_UICR_S->HFXOSRC & ~UICR_HFXOSRC_HFXOSRC_Msk) | UICR_HFXOSRC_HFXOSRC_TCXO;
+ uicr_erased_value = NRF_UICR_S->HFXOSRC;
+ uicr_new_value = (uicr_erased_value & ~UICR_HFXOSRC_HFXOSRC_Msk) | UICR_HFXOSRC_HFXOSRC_TCXO;
+ NRF_UICR_S->HFXOSRC = uicr_new_value;
while (NRF_NVMC_S->READY != NVMC_READY_READY_Ready);
}
-
+
if (uicr_HFXOCNT_erased()){
/* Write default value to UICR->HFXOCNT */
- NRF_UICR_S->HFXOCNT = (NRF_UICR_S->HFXOCNT & ~UICR_HFXOCNT_HFXOCNT_Msk) | 0x20;
+ uicr_erased_value = NRF_UICR_S->HFXOCNT;
+ uicr_new_value = (uicr_erased_value & ~UICR_HFXOCNT_HFXOCNT_Msk) | 0x20;
+ NRF_UICR_S->HFXOCNT = uicr_new_value;
while (NRF_NVMC_S->READY != NVMC_READY_READY_Ready);
}
-
+
/* Enable read mode in NVMC */
NRF_NVMC_S->CONFIG = NVMC_CONFIG_WEN_Ren;
while (NRF_NVMC_S->READY != NVMC_READY_READY_Ready);
-
+
/* Reset to apply clock select update */
NVIC_SystemReset();
}
-
- /* Workaround for Errata 6 "POWER: SLEEPENTER and SLEEPEXIT events asserted after pin reset" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
- if (errata_6()){
- NRF_POWER_S->EVENTS_SLEEPENTER = (POWER_EVENTS_SLEEPENTER_EVENTS_SLEEPENTER_NotGenerated << POWER_EVENTS_SLEEPENTER_EVENTS_SLEEPENTER_Pos);
- NRF_POWER_S->EVENTS_SLEEPEXIT = (POWER_EVENTS_SLEEPEXIT_EVENTS_SLEEPEXIT_NotGenerated << POWER_EVENTS_SLEEPEXIT_EVENTS_SLEEPEXIT_Pos);
- }
-
- /* Workaround for Errata 14 "REGULATORS: LDO mode at startup" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
- if (errata_14()){
- *(uint32_t *)0x50004A38 = 0x01ul;
- NRF_REGULATORS_S->DCDCEN = REGULATORS_DCDCEN_DCDCEN_Enabled << REGULATORS_DCDCEN_DCDCEN_Pos;
- }
- /* Workaround for Errata 15 "REGULATORS: LDO mode at startup" found at the Errata document
- for your device located at https://www.nordicsemi.com/DocLib */
- if (errata_15()){
- *(uint32_t *)0x50004A38 = 0x00ul;
- NRF_REGULATORS_S->DCDCEN = REGULATORS_DCDCEN_DCDCEN_Enabled << REGULATORS_DCDCEN_DCDCEN_Pos;
- }
+ /* Enable Trace functionality. If ENABLE_TRACE is not defined, TRACE pins will be used as GPIOs (see Product
+ Specification to see which ones). */
+ #if defined (ENABLE_TRACE)
+ // Enable Trace And Debug peripheral
+ NRF_TAD_S->ENABLE = TAD_ENABLE_ENABLE_Msk;
+ NRF_TAD_S->CLOCKSTART = TAD_CLOCKSTART_START_Msk;
+
+ // Set up Trace pads SPU firewall
+ NRF_SPU_S->GPIOPORT[0].PERM &= ~(1 << TRACE_TRACECLK_PIN);
+ NRF_SPU_S->GPIOPORT[0].PERM &= ~(1 << TRACE_TRACEDATA0_PIN);
+ NRF_SPU_S->GPIOPORT[0].PERM &= ~(1 << TRACE_TRACEDATA1_PIN);
+ NRF_SPU_S->GPIOPORT[0].PERM &= ~(1 << TRACE_TRACEDATA2_PIN);
+ NRF_SPU_S->GPIOPORT[0].PERM &= ~(1 << TRACE_TRACEDATA3_PIN);
+
+ // Configure trace port pads
+ NRF_P0_S->PIN_CNF[TRACE_TRACECLK_PIN] = TRACE_PIN_CNF_VALUE;
+ NRF_P0_S->PIN_CNF[TRACE_TRACEDATA0_PIN] = TRACE_PIN_CNF_VALUE;
+ NRF_P0_S->PIN_CNF[TRACE_TRACEDATA1_PIN] = TRACE_PIN_CNF_VALUE;
+ NRF_P0_S->PIN_CNF[TRACE_TRACEDATA2_PIN] = TRACE_PIN_CNF_VALUE;
+ NRF_P0_S->PIN_CNF[TRACE_TRACEDATA3_PIN] = TRACE_PIN_CNF_VALUE;
+
+ // Select trace pins
+ NRF_TAD_S->PSEL.TRACECLK = TRACE_TRACECLK_PIN;
+ NRF_TAD_S->PSEL.TRACEDATA0 = TRACE_TRACEDATA0_PIN;
+ NRF_TAD_S->PSEL.TRACEDATA1 = TRACE_TRACEDATA1_PIN;
+ NRF_TAD_S->PSEL.TRACEDATA2 = TRACE_TRACEDATA2_PIN;
+ NRF_TAD_S->PSEL.TRACEDATA3 = TRACE_TRACEDATA3_PIN;
+
+ // Set trace port speed to 32 MHz
+ NRF_TAD_S->TRACEPORTSPEED = TAD_TRACEPORTSPEED_TRACEPORTSPEED_32MHz;
+
+ *((uint32_t *)(0xE0053000ul)) = 0x00000001ul;
+
+ *((uint32_t *)(0xE005AFB0ul)) = 0xC5ACCE55ul;
+ *((uint32_t *)(0xE005A000ul)) &= 0xFFFFFF00ul;
+ *((uint32_t *)(0xE005A004ul)) = 0x00000009ul;
+ *((uint32_t *)(0xE005A000ul)) = 0x00000303ul;
+ *((uint32_t *)(0xE005AFB0ul)) = 0x00000000ul;
+
+ *((uint32_t *)(0xE005BFB0ul)) = 0xC5ACCE55ul;
+ *((uint32_t *)(0xE005B000ul)) &= 0xFFFFFF00ul;
+ *((uint32_t *)(0xE005B004ul)) = 0x00003000ul;
+ *((uint32_t *)(0xE005B000ul)) = 0x00000308ul;
+ *((uint32_t *)(0xE005BFB0ul)) = 0x00000000ul;
+
+ *((uint32_t *)(0xE0058FB0ul)) = 0xC5ACCE55ul;
+ *((uint32_t *)(0xE0058000ul)) = 0x00000000ul;
+ *((uint32_t *)(0xE0058004ul)) = 0x00000000ul;
+ *((uint32_t *)(0xE0058FB0ul)) = 0x00000000ul;
+
+ /* Rom table does not list ETB, or TPIU base addresses.
+ * Some debug probes may require manual configuration of these peripherals to enable tracing.
+ * ETB_BASE = 0xE0051000
+ * TPIU_BASE = 0xE0054000
+ */
+ #endif
/* Allow Non-Secure code to run FPU instructions.
* If only the secure code should control FPU power state these registers should be configured accordingly in the secure application code. */
@@ -205,6 +289,16 @@
return false;
}
+
+
+ bool errata_20()
+ {
+ if (((*(uint32_t *)0x00FF0004) & 0x1E) != 0x1C){
+ return true;
+ }
+
+ return false;
+ }
#endif
/*lint --flb "Leave library region" */
diff --git a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf9160.h b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf9160.h
index 2de688e..6b3e1cb 100644
--- a/third_party/NordicSemiconductor/nrfx/mdk/system_nrf9160.h
+++ b/third_party/NordicSemiconductor/nrfx/mdk/system_nrf9160.h
@@ -1,22 +1,32 @@
/*
-Copyright (c) 2009-2018 ARM Limited. All rights reserved.
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
- SPDX-License-Identifier: Apache-2.0
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
-Licensed under the Apache License, Version 2.0 (the License); you may
-not use this file except in compliance with the License.
-You may obtain a copy of the License at
+1. Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
- www.apache.org/licenses/LICENSE-2.0
+2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an AS IS BASIS, WITHOUT
-WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
+3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ contributors may be used to endorse or promote products derived from this
+ software without specific prior written permission.
-NOTICE: This file has been modified by Nordic Semiconductor ASA.
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
*/
@@ -27,32 +37,7 @@
extern "C" {
#endif
-#include <stdint.h>
-
-
-extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
-
-/**
- * Initialize the system
- *
- * @param none
- * @return none
- *
- * @brief Setup the microcontroller system.
- * Initialize the System and update the SystemCoreClock variable.
- */
-extern void SystemInit (void);
-
-/**
- * Update SystemCoreClock variable
- *
- * @param none
- * @return none
- *
- * @brief Updates the SystemCoreClock with current core Clock
- * retrieved from cpu registers.
- */
-extern void SystemCoreClockUpdate (void);
+#include "system_nrf.h"
#ifdef __cplusplus
}
diff --git a/third_party/NordicSemiconductor/nrfx/soc/nrfx_atomic.h b/third_party/NordicSemiconductor/nrfx/soc/nrfx_atomic.h
index c01d041..6cf6c0b 100644
--- a/third_party/NordicSemiconductor/nrfx/soc/nrfx_atomic.h
+++ b/third_party/NordicSemiconductor/nrfx/soc/nrfx_atomic.h
@@ -50,21 +50,17 @@
*/
-/**
- * @brief Atomic 32-bit unsigned type.
- */
+/** @brief Atomic 32-bit unsigned type. */
typedef volatile uint32_t nrfx_atomic_u32_t;
-/**
- * @brief Atomic 1-bit flag type (technically 32-bit).
- */
+/** @brief Atomic 1-bit flag type (technically 32-bit). */
typedef volatile uint32_t nrfx_atomic_flag_t;
/**
* @brief Function for storing a value to an atomic object and returning its previous value.
*
- * @param[in] p_data Atomic memory pointer.
- * @param[in] value Value to store.
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value Value to store.
*
* @return Previous value stored in the atomic object.
*/
@@ -73,8 +69,8 @@
/**
* @brief Function for storing a value to an atomic object and returning its new value.
*
- * @param[in] p_data Atomic memory pointer.
- * @param[in] value Value to store.
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value Value to store.
*
* @return New value stored in the atomic object.
*/
@@ -84,8 +80,8 @@
* @brief Function for running a logical OR operation on an atomic object
* and returning its previous value.
*
- * @param[in] p_data Atomic memory pointer.
- * @param[in] value Value of the second operand in the OR operation.
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value Value of the second operand in the OR operation.
*
* @return Previous value stored in the atomic object.
*/
@@ -95,8 +91,8 @@
* @brief Function for running a logical OR operation on an atomic object
* and returning its new value.
*
- * @param[in] p_data Atomic memory pointer.
- * @param[in] value Value of the second operand in the OR operation.
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value Value of the second operand in the OR operation.
*
* @return New value stored in the atomic object.
*/
@@ -106,8 +102,8 @@
* @brief Function for running a logical AND operation on an atomic object
* and returning its previous value.
*
- * @param[in] p_data Atomic memory pointer.
- * @param[in] value Value of the second operand in the AND operation.
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value Value of the second operand in the AND operation.
*
* @return Previous value stored in the atomic object.
*/
@@ -117,8 +113,8 @@
* @brief Function for running a logical AND operation on an atomic object
* and returning its new value.
*
- * @param[in] p_data Atomic memory pointer.
- * @param[in] value Value of the second operand in the AND operation.
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value Value of the second operand in the AND operation.
*
* @return New value stored in the atomic object.
*/
@@ -128,8 +124,8 @@
* @brief Function for running a logical XOR operation on an atomic object
* and returning its previous value.
*
- * @param[in] p_data Atomic memory pointer.
- * @param[in] value Value of the second operand in the XOR operation.
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value Value of the second operand in the XOR operation.
*
* @return Previous value stored in the atomic object.
*/
@@ -139,8 +135,8 @@
* @brief Function for running a logical XOR operation on an atomic object
* and returning its new value.
*
- * @param[in] p_data Atomic memory pointer.
- * @param[in] value Value of the second operand in the XOR operation.
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value Value of the second operand in the XOR operation.
*
* @return New value stored in the atomic object.
*/
@@ -150,8 +146,8 @@
* @brief Function for running an arithmetic ADD operation on an atomic object
* and returning its previous value.
*
- * @param[in] p_data Atomic memory pointer.
- * @param[in] value Value of the second operand in the ADD operation.
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value Value of the second operand in the ADD operation.
*
* @return Previous value stored in the atomic object.
*/
@@ -161,8 +157,8 @@
* @brief Function for running an arithmetic ADD operation on an atomic object
* and returning its new value.
*
- * @param[in] p_data Atomic memory pointer.
- * @param[in] value Value of the second operand in the ADD operation.
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value Value of the second operand in the ADD operation.
*
* @return New value stored in the atomic object.
*/
@@ -172,19 +168,19 @@
* @brief Function for running an arithmetic SUB operation on an atomic object
* and returning its previous value.
*
- * @param[in] p_data Atomic memory pointer.
- * @param[in] value Value of the second operand in the SUB operation.
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value Value of the second operand in the SUB operation.
*
* @return Old value stored in the atomic object.
*/
uint32_t nrfx_atomic_u32_fetch_sub(nrfx_atomic_u32_t * p_data, uint32_t value);
/**
- * @brief Function for running an arithmetic SUB operation on an atomic object
+ * @brief Function for running an arithmetic SUB operation on an atomic object
* and returning its new value.
*
- * @param[in] p_data Atomic memory pointer.
- * @param[in] value Value of the second operand in the SUB operation.
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value Value of the second operand in the SUB operation.
*
* @return New value stored in the atomic object.
*/
@@ -211,60 +207,60 @@
/**
* @brief Function for running an arithmetic SUB operation on an atomic object
* if object >= value, and returning its previous value.
- *
- * @param[in] p_data Atomic memory pointer.
- * @param[in] value Value of the second operand in the SUB operation.
+ *
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value Value of the second operand in the SUB operation.
*
* @return Previous value stored in the atomic object.
*/
uint32_t nrfx_atomic_u32_fetch_sub_hs(nrfx_atomic_u32_t * p_data, uint32_t value);
/**
- * @brief Function for running an arithmetic SUB operation on an atomic object
+ * @brief Function for running an arithmetic SUB operation on an atomic object
* if object >= value, and returning its new value.
*
- * @param[in] p_data Atomic memory pointer.
- * @param[in] value Value of the second operand in the SUB operation.
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value Value of the second operand in the SUB operation.
*
* @return New value stored in the atomic object.
*/
uint32_t nrfx_atomic_u32_sub_hs(nrfx_atomic_u32_t * p_data, uint32_t value);
/**
- * @brief Function for running a logical one bit flag set operation
+ * @brief Function for running a logical one bit flag set operation
* on an atomic object and returning its previous value.
*
- * @param[in] p_data Atomic flag memory pointer.
+ * @param[in] p_data Atomic flag memory pointer.
*
* @return Previous flag value.
*/
uint32_t nrfx_atomic_flag_set_fetch(nrfx_atomic_flag_t * p_data);
/**
- * @brief Function for running a logical one bit flag set operation
+ * @brief Function for running a logical one bit flag set operation
* on an atomic object and returning its new value.
*
- * @param[in] p_data Atomic flag memory pointer.
+ * @param[in] p_data Atomic flag memory pointer.
*
* @return New flag value.
*/
uint32_t nrfx_atomic_flag_set(nrfx_atomic_flag_t * p_data);
/**
- * @brief Function for running a logical one bit flag clear operation
+ * @brief Function for running a logical one bit flag clear operation
* on an atomic object and returning its previous value.
*
- * @param[in] p_data Atomic flag memory pointer.
+ * @param[in] p_data Atomic flag memory pointer.
*
* @return Previous flag value.
*/
uint32_t nrfx_atomic_flag_clear_fetch(nrfx_atomic_flag_t * p_data);
/**
- * @brief Function for running a logical one bit flag clear operation
+ * @brief Function for running a logical one bit flag clear operation
* on an atomic object and returning its new value.
*
- * @param[in] p_data Atomic flag memory pointer.
+ * @param[in] p_data Atomic flag memory pointer.
*
* @return New flag value.
*/
diff --git a/third_party/NordicSemiconductor/nrfx/soc/nrfx_atomic_internal.h b/third_party/NordicSemiconductor/nrfx/soc/nrfx_atomic_internal.h
index eedec48..c94e7a0 100644
--- a/third_party/NordicSemiconductor/nrfx/soc/nrfx_atomic_internal.h
+++ b/third_party/NordicSemiconductor/nrfx/soc/nrfx_atomic_internal.h
@@ -45,12 +45,13 @@
#if defined ( __CC_ARM )
static __asm uint32_t nrfx_atomic_internal_mov(nrfx_atomic_u32_t * p_ptr,
- uint32_t value,
- uint32_t * p_new)
+ uint32_t value,
+ uint32_t * p_new)
{
- /* The base standard specifies that arguments are passed in core registers r0-r3 and on the stack.
- * Registers r4 and r5 must be saved on the stack. Note that only even number of register pushes are
- * allowed. This is a requirement of the Procedure Call Standard for the ARM Architecture [AAPCS].
+ /* The base standard specifies that arguments are passed in the core registers
+ * r0-r3 and on the stack. Registers r4 and r5 must be saved on the stack.
+ * Only even number of register pushes are allowed. This is a requirement
+ * of the Procedure Call Standard for the ARM Architecture [AAPCS].
*/
push {r4, r5}
mov r4, r0
@@ -69,8 +70,8 @@
static __asm uint32_t nrfx_atomic_internal_orr(nrfx_atomic_u32_t * p_ptr,
- uint32_t value,
- uint32_t * p_new)
+ uint32_t value,
+ uint32_t * p_new)
{
push {r4, r5}
mov r4, r0
@@ -88,8 +89,8 @@
}
static __asm uint32_t nrfx_atomic_internal_and(nrfx_atomic_u32_t * p_ptr,
- uint32_t value,
- uint32_t * p_new)
+ uint32_t value,
+ uint32_t * p_new)
{
push {r4, r5}
mov r4, r0
@@ -107,8 +108,8 @@
}
static __asm uint32_t nrfx_atomic_internal_eor(nrfx_atomic_u32_t * p_ptr,
- uint32_t value,
- uint32_t * p_new)
+ uint32_t value,
+ uint32_t * p_new)
{
push {r4, r5}
mov r4, r0
@@ -126,8 +127,8 @@
}
static __asm uint32_t nrfx_atomic_internal_add(nrfx_atomic_u32_t * p_ptr,
- uint32_t value,
- uint32_t * p_new)
+ uint32_t value,
+ uint32_t * p_new)
{
push {r4, r5}
mov r4, r0
@@ -145,8 +146,8 @@
}
static __asm uint32_t nrfx_atomic_internal_sub(nrfx_atomic_u32_t * p_ptr,
- uint32_t value,
- uint32_t * p_new)
+ uint32_t value,
+ uint32_t * p_new)
{
push {r4, r5}
mov r4, r0
@@ -164,8 +165,8 @@
}
static __asm bool nrfx_atomic_internal_cmp_exch(nrfx_atomic_u32_t * p_data,
- uint32_t * p_expected,
- uint32_t value)
+ uint32_t * p_expected,
+ uint32_t value)
{
#define RET_REG r0
#define P_EXPC r1
@@ -206,8 +207,8 @@
}
static __asm uint32_t nrfx_atomic_internal_sub_hs(nrfx_atomic_u32_t * p_ptr,
- uint32_t value,
- uint32_t * p_new)
+ uint32_t value,
+ uint32_t * p_new)
{
push {r4, r5}
mov r4, r0
@@ -236,10 +237,10 @@
/**
* @brief Atomic operation generic macro.
*
- * @param[in] asm_op Operation: mov, orr, and, eor, add, sub.
- * @param[out] old_val Atomic object output (uint32_t), value before operation.
- * @param[out] new_val Atomic object output (uint32_t), value after operation.
- * @param[in] value Atomic operation operand.
+ * @param[in] asm_op Operation: mov, orr, and, eor, add, sub.
+ * @param[out] old_val Atomic object output (uint32_t); value before operation.
+ * @param[out] new_val Atomic object output (uint32_t); value after operation.
+ * @param[in] value Atomic operation operand.
*/
#define NRFX_ATOMIC_OP(asm_op, old_val, new_val, ptr, value) \
{ \
@@ -274,8 +275,8 @@
"movlo %["#new_val"], %["#old_val"]\n"
static inline bool nrfx_atomic_internal_cmp_exch(nrfx_atomic_u32_t * p_data,
- uint32_t * p_expected,
- uint32_t value)
+ uint32_t * p_expected,
+ uint32_t value)
{
bool res = false;
/* Temporary register used in the inline asm code for getting the result
diff --git a/third_party/NordicSemiconductor/nrfx/soc/nrfx_coredep.h b/third_party/NordicSemiconductor/nrfx/soc/nrfx_coredep.h
index 5416462..08ccc1b 100644
--- a/third_party/NordicSemiconductor/nrfx/soc/nrfx_coredep.h
+++ b/third_party/NordicSemiconductor/nrfx/soc/nrfx_coredep.h
@@ -45,6 +45,13 @@
#define NRFX_DELAY_CPU_FREQ_MHZ
/** @brief Availability of Data Watchpoint and Trace (DWT) unit in the given SoC. */
#define NRFX_DELAY_DWT_PRESENT
+/**
+ * @brief Number of cycles consumed by one iteration of the internal loop
+ * in the function @ref nrfx_coredep_delay_us.
+ *
+ * This value can be specified externally (for example, when the SoC is emulated).
+ */
+#define NRFX_COREDEP_DELAY_US_LOOP_CYCLES
#elif defined(NRF51)
#define NRFX_DELAY_CPU_FREQ_MHZ 16
@@ -52,13 +59,9 @@
#elif defined(NRF52810_XXAA) || defined(NRF52811_XXAA)
#define NRFX_DELAY_CPU_FREQ_MHZ 64
#define NRFX_DELAY_DWT_PRESENT 0
-#elif defined(NRF52832_XXAA) || defined (NRF52832_XXAB)
- #define NRFX_DELAY_CPU_FREQ_MHZ 64
- #define NRFX_DELAY_DWT_PRESENT 1
-#elif defined(NRF52840_XXAA)
- #define NRFX_DELAY_CPU_FREQ_MHZ 64
- #define NRFX_DELAY_DWT_PRESENT 1
-#elif defined(NRF9160_XXAA)
+#elif defined(NRF52832_XXAA) || defined(NRF52832_XXAB) || \
+ defined(NRF52833_XXAA) || defined(NRF52840_XXAA) || \
+ defined(NRF9160_XXAA)
#define NRFX_DELAY_CPU_FREQ_MHZ 64
#define NRFX_DELAY_DWT_PRESENT 1
#else
@@ -73,6 +76,8 @@
* - For SoCs working at 64MHz: 0xFFFFFFFF/64 = 0x03FFFFFF (67108863 microseconds)
* - For SoCs working at 16MHz: 0xFFFFFFFF/16 = 0x0FFFFFFF (268435455 microseconds)
*
+ * @sa NRFX_COREDEP_DELAY_US_LOOP_CYCLES
+ *
* @param time_us Number of microseconds to wait.
*/
__STATIC_INLINE void nrfx_coredep_delay_us(uint32_t time_us);
@@ -116,8 +121,8 @@
DWT->CTRL = dwt_ctrl;
CoreDebug->DEMCR = core_debug;
}
-#else // NRFX_CHECK(NRFX_DELAY_DWT_BASED)
+#else // NRFX_CHECK(NRFX_DELAY_DWT_BASED)
__STATIC_INLINE void nrfx_coredep_delay_us(uint32_t time_us)
{
@@ -126,37 +131,35 @@
return;
}
- #if defined(NRF51)
- // The loop takes 4 cycles: 1 for SUBS, 3 for BHI.
- static const uint16_t delay_bytecode[] = {
- 0x3804, // SUBS r0, #4
- 0xd8fd, // BHI .-2
- 0x4770 // BX LR
- };
- #elif defined(NRF52810_XXAA) || defined(NRF52811_XXAA)
- // The loop takes 7 cycles: 1 for SUBS, 2 for BHI, 2 flash wait states for each instruction.
- static const uint16_t delay_bytecode[] = {
- 0x3807, // SUBS r0, #7
- 0xd8fd, // BHI .-2
- 0x4770 // BX LR
- };
- #elif (defined(NRF52832_XXAA) || \
- defined (NRF52832_XXAB) || \
- defined(NRF52840_XXAA) || \
- defined(NRF9160_XXAA))
- // The loop takes 3 cycles: 1 for SUBS, 2 for BHI.
- // Make sure that code is cached properly, so that no extra wait states appear.
+ // Allow overriding the number of cycles per loop iteration, in case it is
+ // needed to adjust this number externally (for example, when the SoC is
+ // emulated).
+ #ifndef NRFX_COREDEP_DELAY_US_LOOP_CYCLES
+ #if defined(NRF51)
+ // The loop takes 4 cycles: 1 for SUBS, 3 for BHI.
+ #define NRFX_COREDEP_DELAY_US_LOOP_CYCLES 4
+ #elif defined(NRF52810_XXAA) || defined(NRF52811_XXAA)
+ // The loop takes 7 cycles: 1 for SUBS, 2 for BHI, 2 wait states
+ // for each instruction.
+ #define NRFX_COREDEP_DELAY_US_LOOP_CYCLES 7
+ #else
+ // The loop takes 3 cycles: 1 for SUBS, 2 for BHI.
+ #define NRFX_COREDEP_DELAY_US_LOOP_CYCLES 3
+ #endif
+ #endif // NRFX_COREDEP_DELAY_US_LOOP_CYCLES
+ // Align the machine code, so that it can be cached properly and no extra
+ // wait states appear.
__ALIGN(16)
- static const uint16_t delay_bytecode[] = {
- 0x3803, // SUBS r0, #3
+ static const uint16_t delay_machine_code[] = {
+ 0x3800 + NRFX_COREDEP_DELAY_US_LOOP_CYCLES, // SUBS r0, #loop_cycles
0xd8fd, // BHI .-2
0x4770 // BX LR
- };
- #endif
+ };
typedef void (* delay_func_t)(uint32_t);
- // Set LSB to 1 to execute code in Thumb mode.
- const delay_func_t delay_cycles = (delay_func_t)((((uint32_t)delay_bytecode) | 1));
+ const delay_func_t delay_cycles =
+ // Set LSB to 1 to execute the code in the Thumb mode.
+ (delay_func_t)((((uint32_t)delay_machine_code) | 1));
uint32_t cycles = time_us * NRFX_DELAY_CPU_FREQ_MHZ;
delay_cycles(cycles);
}
diff --git a/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs.h b/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs.h
index 09612bc..55a8c5d 100644
--- a/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs.h
+++ b/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs.h
@@ -40,6 +40,8 @@
#include <soc/nrfx_irqs_nrf52811.h>
#elif defined(NRF52832_XXAA) || defined (NRF52832_XXAB)
#include <soc/nrfx_irqs_nrf52832.h>
+#elif defined(NRF52833_XXAA)
+ #include <soc/nrfx_irqs_nrf52833.h>
#elif defined(NRF52840_XXAA)
#include <soc/nrfx_irqs_nrf52840.h>
#elif defined(NRF9160_XXAA)
diff --git a/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs_nrf51.h b/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs_nrf51.h
index 03ca34d..d32db8e 100644
--- a/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs_nrf51.h
+++ b/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs_nrf51.h
@@ -81,6 +81,7 @@
#define nrfx_rtc_0_irq_handler RTC0_IRQHandler
// TEMP_IRQn
+#define nrfx_temp_irq_handler TEMP_IRQHandler
// RNG_IRQn
#define nrfx_rng_irq_handler RNG_IRQHandler
diff --git a/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs_nrf52810.h b/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs_nrf52810.h
index a293d81..a136869 100644
--- a/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs_nrf52810.h
+++ b/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs_nrf52810.h
@@ -87,6 +87,7 @@
#define nrfx_rtc_0_irq_handler RTC0_IRQHandler
// TEMP_IRQn
+#define nrfx_temp_irq_handler TEMP_IRQHandler
// RNG_IRQn
#define nrfx_rng_irq_handler RNG_IRQHandler
diff --git a/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs_nrf52811.h b/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs_nrf52811.h
index 884e617..3ae6ac5 100644
--- a/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs_nrf52811.h
+++ b/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs_nrf52811.h
@@ -90,6 +90,7 @@
#define nrfx_rtc_0_irq_handler RTC0_IRQHandler
// TEMP_IRQn
+#define nrfx_temp_irq_handler TEMP_IRQHandler
// RNG_IRQn
#define nrfx_rng_irq_handler RNG_IRQHandler
diff --git a/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs_nrf52832.h b/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs_nrf52832.h
index 84a8373..7d42e03 100644
--- a/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs_nrf52832.h
+++ b/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs_nrf52832.h
@@ -96,6 +96,7 @@
#define nrfx_rtc_0_irq_handler RTC0_IRQHandler
// TEMP_IRQn
+#define nrfx_temp_irq_handler TEMP_IRQHandler
// RNG_IRQn
#define nrfx_rng_irq_handler RNG_IRQHandler
diff --git a/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs_nrf52833.h b/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs_nrf52833.h
new file mode 100644
index 0000000..508d860
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs_nrf52833.h
@@ -0,0 +1,196 @@
+/*
+ * Copyright (c) 2019, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef NRFX_IRQS_NRF52833_H__
+#define NRFX_IRQS_NRF52833_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+// POWER_CLOCK_IRQn
+#define nrfx_power_clock_irq_handler POWER_CLOCK_IRQHandler
+
+// RADIO_IRQn
+
+// UARTE0_UART0_IRQn
+#if NRFX_CHECK(NRFX_PRS_ENABLED) && NRFX_CHECK(NRFX_PRS_BOX_4_ENABLED)
+#define nrfx_prs_box_4_irq_handler UARTE0_UART0_IRQHandler
+#else
+#define nrfx_uarte_0_irq_handler UARTE0_UART0_IRQHandler
+#define nrfx_uart_0_irq_handler UARTE0_UART0_IRQHandler
+#endif
+
+// SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn
+#if NRFX_CHECK(NRFX_PRS_ENABLED) && NRFX_CHECK(NRFX_PRS_BOX_0_ENABLED)
+#define nrfx_prs_box_0_irq_handler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+#else
+#define nrfx_spim_0_irq_handler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+#define nrfx_spis_0_irq_handler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+#define nrfx_twim_0_irq_handler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+#define nrfx_twis_0_irq_handler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+#define nrfx_spi_0_irq_handler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+#define nrfx_twi_0_irq_handler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+#endif
+
+// SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn
+#if NRFX_CHECK(NRFX_PRS_ENABLED) && NRFX_CHECK(NRFX_PRS_BOX_1_ENABLED)
+#define nrfx_prs_box_1_irq_handler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+#else
+#define nrfx_spim_1_irq_handler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+#define nrfx_spis_1_irq_handler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+#define nrfx_twim_1_irq_handler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+#define nrfx_twis_1_irq_handler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+#define nrfx_spi_1_irq_handler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+#define nrfx_twi_1_irq_handler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+#endif
+
+// NFCT_IRQn
+#define nrfx_nfct_irq_handler NFCT_IRQHandler
+
+// GPIOTE_IRQn
+#define nrfx_gpiote_irq_handler GPIOTE_IRQHandler
+
+// SAADC_IRQn
+#define nrfx_saadc_irq_handler SAADC_IRQHandler
+
+// TIMER0_IRQn
+#define nrfx_timer_0_irq_handler TIMER0_IRQHandler
+
+// TIMER1_IRQn
+#define nrfx_timer_1_irq_handler TIMER1_IRQHandler
+
+// TIMER2_IRQn
+#define nrfx_timer_2_irq_handler TIMER2_IRQHandler
+
+// RTC0_IRQn
+#define nrfx_rtc_0_irq_handler RTC0_IRQHandler
+
+// TEMP_IRQn
+#define nrfx_temp_irq_handler TEMP_IRQHandler
+
+// RNG_IRQn
+#define nrfx_rng_irq_handler RNG_IRQHandler
+
+// ECB_IRQn
+
+// CCM_AAR_IRQn
+
+// WDT_IRQn
+#define nrfx_wdt_irq_handler WDT_IRQHandler
+
+// RTC1_IRQn
+#define nrfx_rtc_1_irq_handler RTC1_IRQHandler
+
+// QDEC_IRQn
+#define nrfx_qdec_irq_handler QDEC_IRQHandler
+
+// COMP_LPCOMP_IRQn
+#if NRFX_CHECK(NRFX_PRS_ENABLED) && NRFX_CHECK(NRFX_PRS_BOX_3_ENABLED)
+#define nrfx_prs_box_3_irq_handler COMP_LPCOMP_IRQHandler
+#else
+#define nrfx_comp_irq_handler COMP_LPCOMP_IRQHandler
+#define nrfx_lpcomp_irq_handler COMP_LPCOMP_IRQHandler
+#endif
+
+// SWI0_EGU0_IRQn
+#define nrfx_swi_0_irq_handler SWI0_EGU0_IRQHandler
+
+// SWI1_EGU1_IRQn
+#define nrfx_swi_1_irq_handler SWI1_EGU1_IRQHandler
+
+// SWI2_EGU2_IRQn
+#define nrfx_swi_2_irq_handler SWI2_EGU2_IRQHandler
+
+// SWI3_EGU3_IRQn
+#define nrfx_swi_3_irq_handler SWI3_EGU3_IRQHandler
+
+// SWI4_EGU4_IRQn
+#define nrfx_swi_4_irq_handler SWI4_EGU4_IRQHandler
+
+// SWI5_EGU5_IRQn
+#define nrfx_swi_5_irq_handler SWI5_EGU5_IRQHandler
+
+// TIMER3_IRQn
+#define nrfx_timer_3_irq_handler TIMER3_IRQHandler
+
+// TIMER4_IRQn
+#define nrfx_timer_4_irq_handler TIMER4_IRQHandler
+
+// PWM0_IRQn
+#define nrfx_pwm_0_irq_handler PWM0_IRQHandler
+
+// PDM_IRQn
+#define nrfx_pdm_irq_handler PDM_IRQHandler
+
+// MWU_IRQn
+
+// PWM1_IRQn
+#define nrfx_pwm_1_irq_handler PWM1_IRQHandler
+
+// PWM2_IRQn
+#define nrfx_pwm_2_irq_handler PWM2_IRQHandler
+
+// SPIM2_SPIS2_SPI2_IRQn
+#if NRFX_CHECK(NRFX_PRS_ENABLED) && NRFX_CHECK(NRFX_PRS_BOX_2_ENABLED)
+#define nrfx_prs_box_2_irq_handler SPIM2_SPIS2_SPI2_IRQHandler
+#else
+#define nrfx_spim_2_irq_handler SPIM2_SPIS2_SPI2_IRQHandler
+#define nrfx_spis_2_irq_handler SPIM2_SPIS2_SPI2_IRQHandler
+#define nrfx_spi_2_irq_handler SPIM2_SPIS2_SPI2_IRQHandler
+#endif
+
+// RTC2_IRQn
+#define nrfx_rtc_2_irq_handler RTC2_IRQHandler
+
+// I2S_IRQn
+#define nrfx_i2s_irq_handler I2S_IRQHandler
+
+// FPU_IRQn
+
+// USBD_IRQn
+#define nrfx_usbd_irq_handler USBD_IRQHandler
+
+// UARTE1_IRQn
+#define nrfx_uarte_1_irq_handler UARTE1_IRQHandler
+
+// PWM3_IRQn
+#define nrfx_pwm_3_irq_handler PWM3_IRQHandler
+
+// SPIM3_IRQn
+#define nrfx_spim_3_irq_handler SPIM3_IRQHandler
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // NRFX_IRQS_NRF52833_H__
diff --git a/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs_nrf52840.h b/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs_nrf52840.h
index b403063..d19a2e3 100644
--- a/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs_nrf52840.h
+++ b/third_party/NordicSemiconductor/nrfx/soc/nrfx_irqs_nrf52840.h
@@ -96,6 +96,7 @@
#define nrfx_rtc_0_irq_handler RTC0_IRQHandler
// TEMP_IRQn
+#define nrfx_temp_irq_handler TEMP_IRQHandler
// RNG_IRQn
#define nrfx_rng_irq_handler RNG_IRQHandler
diff --git a/third_party/NordicSemiconductor/nrfx/templates/nRF51/nrfx_config.h b/third_party/NordicSemiconductor/nrfx/templates/nRF51/nrfx_config.h
index f87173e..d080e88 100644
--- a/third_party/NordicSemiconductor/nrfx/templates/nRF51/nrfx_config.h
+++ b/third_party/NordicSemiconductor/nrfx/templates/nRF51/nrfx_config.h
@@ -358,6 +358,14 @@
// </e>
+// <e> NRFX_NVMC_ENABLED - nrfx_nvmc - NVMC peripheral driver
+//==========================================================
+#ifndef NRFX_NVMC_ENABLED
+#define NRFX_NVMC_ENABLED 1
+#endif
+
+// </e>
+
// <e> NRFX_POWER_ENABLED - nrfx_power - POWER peripheral driver
//==========================================================
#ifndef NRFX_POWER_ENABLED
@@ -1133,6 +1141,25 @@
// </e>
+// <e> NRFX_TEMP_ENABLED - nrfx_temp - TEMP peripheral driver
+//==========================================================
+#ifndef NRFX_TEMP_ENABLED
+#define NRFX_TEMP_ENABLED 1
+#endif
+
+// <o> NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+
+#ifndef NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY 3
+#endif
+
+// </e>
+
// <e> NRFX_TIMER_ENABLED - nrfx_timer - TIMER periperal driver
//==========================================================
#ifndef NRFX_TIMER_ENABLED
@@ -1365,7 +1392,7 @@
#ifndef NRFX_UART_ENABLED
#define NRFX_UART_ENABLED 1
#endif
-// <o> NRFX_UART0_ENABLED - Enable UART0 instance
+// <q> NRFX_UART0_ENABLED - Enable UART0 instance
#ifndef NRFX_UART0_ENABLED
#define NRFX_UART0_ENABLED 1
#endif
diff --git a/third_party/NordicSemiconductor/nrfx/templates/nRF52810/nrfx_config.h b/third_party/NordicSemiconductor/nrfx/templates/nRF52810/nrfx_config.h
index 97b00ec..4abea9f 100644
--- a/third_party/NordicSemiconductor/nrfx/templates/nRF52810/nrfx_config.h
+++ b/third_party/NordicSemiconductor/nrfx/templates/nRF52810/nrfx_config.h
@@ -313,6 +313,14 @@
// </e>
+// <e> NRFX_NVMC_ENABLED - nrfx_nvmc - NVMC peripheral driver
+//==========================================================
+#ifndef NRFX_NVMC_ENABLED
+#define NRFX_NVMC_ENABLED 1
+#endif
+
+// </e>
+
// <e> NRFX_PDM_ENABLED - nrfx_pdm - PDM peripheral driver
//==========================================================
#ifndef NRFX_PDM_ENABLED
@@ -1583,6 +1591,29 @@
#define NRFX_SYSTICK_ENABLED 1
#endif
+// <e> NRFX_TEMP_ENABLED - nrfx_temp - TEMP peripheral driver
+//==========================================================
+#ifndef NRFX_TEMP_ENABLED
+#define NRFX_TEMP_ENABLED 1
+#endif
+
+// <o> NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// </e>
+
// <e> NRFX_TIMER_ENABLED - nrfx_timer - TIMER periperal driver
//==========================================================
#ifndef NRFX_TIMER_ENABLED
@@ -2042,7 +2073,7 @@
#ifndef NRFX_UARTE_ENABLED
#define NRFX_UARTE_ENABLED 1
#endif
-// <o> NRFX_UARTE0_ENABLED - Enable UARTE0 instance
+// <q> NRFX_UARTE0_ENABLED - Enable UARTE0 instance
#ifndef NRFX_UARTE0_ENABLED
#define NRFX_UARTE0_ENABLED 1
#endif
@@ -2163,7 +2194,7 @@
#ifndef NRFX_UART_ENABLED
#define NRFX_UART_ENABLED 1
#endif
-// <o> NRFX_UART0_ENABLED - Enable UART0 instance
+// <q> NRFX_UART0_ENABLED - Enable UART0 instance
#ifndef NRFX_UART0_ENABLED
#define NRFX_UART0_ENABLED 1
#endif
diff --git a/third_party/NordicSemiconductor/nrfx/templates/nRF52811/nrfx_config.h b/third_party/NordicSemiconductor/nrfx/templates/nRF52811/nrfx_config.h
index 9617859..96e053c 100644
--- a/third_party/NordicSemiconductor/nrfx/templates/nRF52811/nrfx_config.h
+++ b/third_party/NordicSemiconductor/nrfx/templates/nRF52811/nrfx_config.h
@@ -313,6 +313,14 @@
// </e>
+// <e> NRFX_NVMC_ENABLED - nrfx_nvmc - NVMC peripheral driver
+//==========================================================
+#ifndef NRFX_NVMC_ENABLED
+#define NRFX_NVMC_ENABLED 1
+#endif
+
+// </e>
+
// <e> NRFX_PDM_ENABLED - nrfx_pdm - PDM peripheral driver
//==========================================================
#ifndef NRFX_PDM_ENABLED
@@ -1598,6 +1606,29 @@
#define NRFX_SYSTICK_ENABLED 1
#endif
+// <e> NRFX_TEMP_ENABLED - nrfx_temp - TEMP peripheral driver
+//==========================================================
+#ifndef NRFX_TEMP_ENABLED
+#define NRFX_TEMP_ENABLED 1
+#endif
+
+// <o> NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// </e>
+
// <e> NRFX_TIMER_ENABLED - nrfx_timer - TIMER periperal driver
//==========================================================
#ifndef NRFX_TIMER_ENABLED
@@ -2057,7 +2088,7 @@
#ifndef NRFX_UARTE_ENABLED
#define NRFX_UARTE_ENABLED 1
#endif
-// <o> NRFX_UARTE0_ENABLED - Enable UARTE0 instance
+// <q> NRFX_UARTE0_ENABLED - Enable UARTE0 instance
#ifndef NRFX_UARTE0_ENABLED
#define NRFX_UARTE0_ENABLED 1
#endif
@@ -2178,7 +2209,7 @@
#ifndef NRFX_UART_ENABLED
#define NRFX_UART_ENABLED 1
#endif
-// <o> NRFX_UART0_ENABLED - Enable UART0 instance
+// <q> NRFX_UART0_ENABLED - Enable UART0 instance
#ifndef NRFX_UART0_ENABLED
#define NRFX_UART0_ENABLED 1
#endif
diff --git a/third_party/NordicSemiconductor/nrfx/templates/nRF52832/nrfx_config.h b/third_party/NordicSemiconductor/nrfx/templates/nRF52832/nrfx_config.h
index a9f8b0b..67f3c74 100644
--- a/third_party/NordicSemiconductor/nrfx/templates/nRF52832/nrfx_config.h
+++ b/third_party/NordicSemiconductor/nrfx/templates/nRF52832/nrfx_config.h
@@ -710,6 +710,14 @@
// </e>
+// <e> NRFX_NVMC_ENABLED - nrfx_nvmc - NVMC peripheral driver
+//==========================================================
+#ifndef NRFX_NVMC_ENABLED
+#define NRFX_NVMC_ENABLED 1
+#endif
+
+// </e>
+
// <e> NRFX_PDM_ENABLED - nrfx_pdm - PDM peripheral driver
//==========================================================
#ifndef NRFX_PDM_ENABLED
@@ -2111,6 +2119,29 @@
#define NRFX_SYSTICK_ENABLED 1
#endif
+// <e> NRFX_TEMP_ENABLED - nrfx_temp - TEMP peripheral driver
+//==========================================================
+#ifndef NRFX_TEMP_ENABLED
+#define NRFX_TEMP_ENABLED 1
+#endif
+
+// <o> NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// </e>
+
// <e> NRFX_TIMER_ENABLED - nrfx_timer - TIMER periperal driver
//==========================================================
#ifndef NRFX_TIMER_ENABLED
@@ -2617,7 +2648,7 @@
#ifndef NRFX_UARTE_ENABLED
#define NRFX_UARTE_ENABLED 1
#endif
-// <o> NRFX_UARTE0_ENABLED - Enable UARTE0 instance
+// <q> NRFX_UARTE0_ENABLED - Enable UARTE0 instance
#ifndef NRFX_UARTE0_ENABLED
#define NRFX_UARTE0_ENABLED 1
#endif
@@ -2738,7 +2769,7 @@
#ifndef NRFX_UART_ENABLED
#define NRFX_UART_ENABLED 1
#endif
-// <o> NRFX_UART0_ENABLED - Enable UART0 instance
+// <q> NRFX_UART0_ENABLED - Enable UART0 instance
#ifndef NRFX_UART0_ENABLED
#define NRFX_UART0_ENABLED 1
#endif
diff --git a/third_party/NordicSemiconductor/nrfx/templates/nRF52833/nrfx_config.h b/third_party/NordicSemiconductor/nrfx/templates/nRF52833/nrfx_config.h
new file mode 100644
index 0000000..c946a8f
--- /dev/null
+++ b/third_party/NordicSemiconductor/nrfx/templates/nRF52833/nrfx_config.h
@@ -0,0 +1,3042 @@
+#ifndef NRFX_CONFIG_H__
+#define NRFX_CONFIG_H__
+
+// <<< Use Configuration Wizard in Context Menu >>>\n
+
+// <h> nRF_Drivers
+
+// <e> NRFX_CLOCK_ENABLED - nrfx_clock - CLOCK peripheral driver
+//==========================================================
+#ifndef NRFX_CLOCK_ENABLED
+#define NRFX_CLOCK_ENABLED 1
+#endif
+// <o> NRFX_CLOCK_CONFIG_LF_SRC - LF Clock Source
+
+// <0=> RC
+// <1=> XTAL
+// <2=> Synth
+// <131073=> External Low Swing
+// <196609=> External Full Swing
+
+#ifndef NRFX_CLOCK_CONFIG_LF_SRC
+#define NRFX_CLOCK_CONFIG_LF_SRC 1
+#endif
+
+// <q> NRFX_CLOCK_CONFIG_LF_CAL_ENABLED - Enables LF Clock Calibration Support
+
+#ifndef NRFX_CLOCK_CONFIG_LF_CAL_ENABLED
+#define NRFX_CLOCK_CONFIG_LF_CAL_ENABLED 0
+#endif
+
+// <o> NRFX_CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_CLOCK_CONFIG_IRQ_PRIORITY
+#define NRFX_CLOCK_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <e> NRFX_CLOCK_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_CLOCK_CONFIG_LOG_ENABLED
+#define NRFX_CLOCK_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_CLOCK_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_CLOCK_CONFIG_LOG_LEVEL
+#define NRFX_CLOCK_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_CLOCK_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_CLOCK_CONFIG_INFO_COLOR
+#define NRFX_CLOCK_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_CLOCK_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_CLOCK_CONFIG_DEBUG_COLOR
+#define NRFX_CLOCK_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_COMP_ENABLED - nrfx_comp - COMP peripheral driver
+//==========================================================
+#ifndef NRFX_COMP_ENABLED
+#define NRFX_COMP_ENABLED 1
+#endif
+// <o> NRFX_COMP_CONFIG_REF - Reference voltage
+
+// <0=> Internal 1.2V
+// <1=> Internal 1.8V
+// <2=> Internal 2.4V
+// <4=> VDD
+// <7=> ARef
+
+#ifndef NRFX_COMP_CONFIG_REF
+#define NRFX_COMP_CONFIG_REF 1
+#endif
+
+// <o> NRFX_COMP_CONFIG_MAIN_MODE - Main mode
+
+// <0=> Single ended
+// <1=> Differential
+
+#ifndef NRFX_COMP_CONFIG_MAIN_MODE
+#define NRFX_COMP_CONFIG_MAIN_MODE 0
+#endif
+
+// <o> NRFX_COMP_CONFIG_SPEED_MODE - Speed mode
+
+// <0=> Low power
+// <1=> Normal
+// <2=> High speed
+
+#ifndef NRFX_COMP_CONFIG_SPEED_MODE
+#define NRFX_COMP_CONFIG_SPEED_MODE 2
+#endif
+
+// <o> NRFX_COMP_CONFIG_HYST - Hystheresis
+
+// <0=> No
+// <1=> 50mV
+
+#ifndef NRFX_COMP_CONFIG_HYST
+#define NRFX_COMP_CONFIG_HYST 0
+#endif
+
+// <o> NRFX_COMP_CONFIG_ISOURCE - Current Source
+
+// <0=> Off
+// <1=> 2.5 uA
+// <2=> 5 uA
+// <3=> 10 uA
+
+#ifndef NRFX_COMP_CONFIG_ISOURCE
+#define NRFX_COMP_CONFIG_ISOURCE 0
+#endif
+
+// <o> NRFX_COMP_CONFIG_INPUT - Analog input
+
+// <0=> 0
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_COMP_CONFIG_INPUT
+#define NRFX_COMP_CONFIG_INPUT 0
+#endif
+
+// <o> NRFX_COMP_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_COMP_CONFIG_IRQ_PRIORITY
+#define NRFX_COMP_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <e> NRFX_COMP_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_COMP_CONFIG_LOG_ENABLED
+#define NRFX_COMP_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_COMP_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_COMP_CONFIG_LOG_LEVEL
+#define NRFX_COMP_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_COMP_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_COMP_CONFIG_INFO_COLOR
+#define NRFX_COMP_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_COMP_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_COMP_CONFIG_DEBUG_COLOR
+#define NRFX_COMP_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_GPIOTE_ENABLED - nrfx_gpiote - GPIOTE peripheral driver
+//==========================================================
+#ifndef NRFX_GPIOTE_ENABLED
+#define NRFX_GPIOTE_ENABLED 1
+#endif
+// <o> NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins
+#ifndef NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS
+#define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1
+#endif
+
+// <o> NRFX_GPIOTE_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_GPIOTE_CONFIG_IRQ_PRIORITY
+#define NRFX_GPIOTE_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <e> NRFX_GPIOTE_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_GPIOTE_CONFIG_LOG_ENABLED
+#define NRFX_GPIOTE_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_GPIOTE_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_GPIOTE_CONFIG_LOG_LEVEL
+#define NRFX_GPIOTE_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_GPIOTE_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_GPIOTE_CONFIG_INFO_COLOR
+#define NRFX_GPIOTE_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_GPIOTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_GPIOTE_CONFIG_DEBUG_COLOR
+#define NRFX_GPIOTE_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_I2S_ENABLED - nrfx_i2s - I2S peripheral driver
+//==========================================================
+#ifndef NRFX_I2S_ENABLED
+#define NRFX_I2S_ENABLED 1
+#endif
+// <o> NRFX_I2S_CONFIG_SCK_PIN - SCK pin <0-31>
+
+
+#ifndef NRFX_I2S_CONFIG_SCK_PIN
+#define NRFX_I2S_CONFIG_SCK_PIN 31
+#endif
+
+// <o> NRFX_I2S_CONFIG_LRCK_PIN - LRCK pin <1-31>
+
+
+#ifndef NRFX_I2S_CONFIG_LRCK_PIN
+#define NRFX_I2S_CONFIG_LRCK_PIN 30
+#endif
+
+// <o> NRFX_I2S_CONFIG_MCK_PIN - MCK pin
+#ifndef NRFX_I2S_CONFIG_MCK_PIN
+#define NRFX_I2S_CONFIG_MCK_PIN 255
+#endif
+
+// <o> NRFX_I2S_CONFIG_SDOUT_PIN - SDOUT pin <0-31>
+
+
+#ifndef NRFX_I2S_CONFIG_SDOUT_PIN
+#define NRFX_I2S_CONFIG_SDOUT_PIN 29
+#endif
+
+// <o> NRFX_I2S_CONFIG_SDIN_PIN - SDIN pin <0-31>
+
+
+#ifndef NRFX_I2S_CONFIG_SDIN_PIN
+#define NRFX_I2S_CONFIG_SDIN_PIN 28
+#endif
+
+// <o> NRFX_I2S_CONFIG_MASTER - Mode
+
+// <0=> Master
+// <1=> Slave
+
+#ifndef NRFX_I2S_CONFIG_MASTER
+#define NRFX_I2S_CONFIG_MASTER 0
+#endif
+
+// <o> NRFX_I2S_CONFIG_FORMAT - Format
+
+// <0=> I2S
+// <1=> Aligned
+
+#ifndef NRFX_I2S_CONFIG_FORMAT
+#define NRFX_I2S_CONFIG_FORMAT 0
+#endif
+
+// <o> NRFX_I2S_CONFIG_ALIGN - Alignment
+
+// <0=> Left
+// <1=> Right
+
+#ifndef NRFX_I2S_CONFIG_ALIGN
+#define NRFX_I2S_CONFIG_ALIGN 0
+#endif
+
+// <o> NRFX_I2S_CONFIG_SWIDTH - Sample width (bits)
+
+// <0=> 8
+// <1=> 16
+// <2=> 24
+
+#ifndef NRFX_I2S_CONFIG_SWIDTH
+#define NRFX_I2S_CONFIG_SWIDTH 1
+#endif
+
+// <o> NRFX_I2S_CONFIG_CHANNELS - Channels
+
+// <0=> Stereo
+// <1=> Left
+// <2=> Right
+
+#ifndef NRFX_I2S_CONFIG_CHANNELS
+#define NRFX_I2S_CONFIG_CHANNELS 1
+#endif
+
+// <o> NRFX_I2S_CONFIG_MCK_SETUP - MCK behavior
+
+// <0=> Disabled
+// <2147483648=> 32MHz/2
+// <1342177280=> 32MHz/3
+// <1073741824=> 32MHz/4
+// <805306368=> 32MHz/5
+// <671088640=> 32MHz/6
+// <536870912=> 32MHz/8
+// <402653184=> 32MHz/10
+// <369098752=> 32MHz/11
+// <285212672=> 32MHz/15
+// <268435456=> 32MHz/16
+// <201326592=> 32MHz/21
+// <184549376=> 32MHz/23
+// <142606336=> 32MHz/30
+// <138412032=> 32MHz/31
+// <134217728=> 32MHz/32
+// <100663296=> 32MHz/42
+// <68157440=> 32MHz/63
+// <34340864=> 32MHz/125
+
+#ifndef NRFX_I2S_CONFIG_MCK_SETUP
+#define NRFX_I2S_CONFIG_MCK_SETUP 536870912
+#endif
+
+// <o> NRFX_I2S_CONFIG_RATIO - MCK/LRCK ratio
+
+// <0=> 32x
+// <1=> 48x
+// <2=> 64x
+// <3=> 96x
+// <4=> 128x
+// <5=> 192x
+// <6=> 256x
+// <7=> 384x
+// <8=> 512x
+
+#ifndef NRFX_I2S_CONFIG_RATIO
+#define NRFX_I2S_CONFIG_RATIO 5
+#endif
+
+// <o> NRFX_I2S_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_I2S_CONFIG_IRQ_PRIORITY
+#define NRFX_I2S_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <e> NRFX_I2S_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_I2S_CONFIG_LOG_ENABLED
+#define NRFX_I2S_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_I2S_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_I2S_CONFIG_LOG_LEVEL
+#define NRFX_I2S_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_I2S_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_I2S_CONFIG_INFO_COLOR
+#define NRFX_I2S_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_I2S_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_I2S_CONFIG_DEBUG_COLOR
+#define NRFX_I2S_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_LPCOMP_ENABLED - nrfx_lpcomp - LPCOMP peripheral driver
+//==========================================================
+#ifndef NRFX_LPCOMP_ENABLED
+#define NRFX_LPCOMP_ENABLED 1
+#endif
+// <o> NRFX_LPCOMP_CONFIG_REFERENCE - Reference voltage
+
+// <0=> Supply 1/8
+// <1=> Supply 2/8
+// <2=> Supply 3/8
+// <3=> Supply 4/8
+// <4=> Supply 5/8
+// <5=> Supply 6/8
+// <6=> Supply 7/8
+// <8=> Supply 1/16 (nRF52)
+// <9=> Supply 3/16 (nRF52)
+// <10=> Supply 5/16 (nRF52)
+// <11=> Supply 7/16 (nRF52)
+// <12=> Supply 9/16 (nRF52)
+// <13=> Supply 11/16 (nRF52)
+// <14=> Supply 13/16 (nRF52)
+// <15=> Supply 15/16 (nRF52)
+// <7=> External Ref 0
+// <65543=> External Ref 1
+
+#ifndef NRFX_LPCOMP_CONFIG_REFERENCE
+#define NRFX_LPCOMP_CONFIG_REFERENCE 3
+#endif
+
+// <o> NRFX_LPCOMP_CONFIG_DETECTION - Detection
+
+// <0=> Crossing
+// <1=> Up
+// <2=> Down
+
+#ifndef NRFX_LPCOMP_CONFIG_DETECTION
+#define NRFX_LPCOMP_CONFIG_DETECTION 2
+#endif
+
+// <o> NRFX_LPCOMP_CONFIG_INPUT - Analog input
+
+// <0=> 0
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_LPCOMP_CONFIG_INPUT
+#define NRFX_LPCOMP_CONFIG_INPUT 0
+#endif
+
+// <q> NRFX_LPCOMP_CONFIG_HYST - Hysteresis
+
+
+#ifndef NRFX_LPCOMP_CONFIG_HYST
+#define NRFX_LPCOMP_CONFIG_HYST 0
+#endif
+
+// <o> NRFX_LPCOMP_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_LPCOMP_CONFIG_IRQ_PRIORITY
+#define NRFX_LPCOMP_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <e> NRFX_LPCOMP_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_LPCOMP_CONFIG_LOG_ENABLED
+#define NRFX_LPCOMP_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_LPCOMP_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_LPCOMP_CONFIG_LOG_LEVEL
+#define NRFX_LPCOMP_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_LPCOMP_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_LPCOMP_CONFIG_INFO_COLOR
+#define NRFX_LPCOMP_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_LPCOMP_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_LPCOMP_CONFIG_DEBUG_COLOR
+#define NRFX_LPCOMP_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_NFCT_ENABLED - nrfx_nfct - NFCT peripheral driver
+//==========================================================
+#ifndef NRFX_NFCT_ENABLED
+#define NRFX_NFCT_ENABLED 1
+#endif
+// <o> NRFX_NFCT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_NFCT_CONFIG_IRQ_PRIORITY
+#define NRFX_NFCT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <e> NRFX_NFCT_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_NFCT_CONFIG_LOG_ENABLED
+#define NRFX_NFCT_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_NFCT_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_NFCT_CONFIG_LOG_LEVEL
+#define NRFX_NFCT_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_NFCT_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_NFCT_CONFIG_INFO_COLOR
+#define NRFX_NFCT_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_NFCT_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_NFCT_CONFIG_DEBUG_COLOR
+#define NRFX_NFCT_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_NVMC_ENABLED - nrfx_nvmc - NVMC peripheral driver
+//==========================================================
+#ifndef NRFX_NVMC_ENABLED
+#define NRFX_NVMC_ENABLED 1
+#endif
+
+// </e>
+
+// <e> NRFX_PDM_ENABLED - nrfx_pdm - PDM peripheral driver
+//==========================================================
+#ifndef NRFX_PDM_ENABLED
+#define NRFX_PDM_ENABLED 1
+#endif
+// <o> NRFX_PDM_CONFIG_MODE - Mode
+
+// <0=> Stereo
+// <1=> Mono
+
+#ifndef NRFX_PDM_CONFIG_MODE
+#define NRFX_PDM_CONFIG_MODE 1
+#endif
+
+// <o> NRFX_PDM_CONFIG_EDGE - Edge
+
+// <0=> Left falling
+// <1=> Left rising
+
+#ifndef NRFX_PDM_CONFIG_EDGE
+#define NRFX_PDM_CONFIG_EDGE 0
+#endif
+
+// <o> NRFX_PDM_CONFIG_CLOCK_FREQ - Clock frequency
+
+// <134217728=> 1000k
+// <138412032=> 1032k (default)
+// <142606336=> 1067k
+
+#ifndef NRFX_PDM_CONFIG_CLOCK_FREQ
+#define NRFX_PDM_CONFIG_CLOCK_FREQ 138412032
+#endif
+
+// <o> NRFX_PDM_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_PDM_CONFIG_IRQ_PRIORITY
+#define NRFX_PDM_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <e> NRFX_PDM_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_PDM_CONFIG_LOG_ENABLED
+#define NRFX_PDM_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_PDM_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_PDM_CONFIG_LOG_LEVEL
+#define NRFX_PDM_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_PDM_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_PDM_CONFIG_INFO_COLOR
+#define NRFX_PDM_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_PDM_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_PDM_CONFIG_DEBUG_COLOR
+#define NRFX_PDM_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_POWER_ENABLED - nrfx_power - POWER peripheral driver
+//==========================================================
+#ifndef NRFX_POWER_ENABLED
+#define NRFX_POWER_ENABLED 1
+#endif
+// <o> NRFX_POWER_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_POWER_CONFIG_IRQ_PRIORITY
+#define NRFX_POWER_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <q> NRFX_POWER_CONFIG_DEFAULT_DCDCEN - The default configuration of main DCDC regulator
+
+
+// <i> This settings means only that components for DCDC regulator are installed and it can be enabled.
+
+#ifndef NRFX_POWER_CONFIG_DEFAULT_DCDCEN
+#define NRFX_POWER_CONFIG_DEFAULT_DCDCEN 0
+#endif
+
+// <q> NRFX_POWER_CONFIG_DEFAULT_DCDCENHV - The default configuration of High Voltage DCDC regulator
+
+
+// <i> This settings means only that components for DCDC regulator are installed and it can be enabled.
+
+#ifndef NRFX_POWER_CONFIG_DEFAULT_DCDCENHV
+#define NRFX_POWER_CONFIG_DEFAULT_DCDCENHV 0
+#endif
+
+// </e>
+
+// <e> NRFX_PPI_ENABLED - nrfx_ppi - PPI peripheral allocator
+//==========================================================
+#ifndef NRFX_PPI_ENABLED
+#define NRFX_PPI_ENABLED 1
+#endif
+// <e> NRFX_PPI_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_PPI_CONFIG_LOG_ENABLED
+#define NRFX_PPI_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_PPI_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_PPI_CONFIG_LOG_LEVEL
+#define NRFX_PPI_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_PPI_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_PPI_CONFIG_INFO_COLOR
+#define NRFX_PPI_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_PPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_PPI_CONFIG_DEBUG_COLOR
+#define NRFX_PPI_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_PRS_ENABLED - nrfx_prs - Peripheral Resource Sharing module
+//==========================================================
+#ifndef NRFX_PRS_ENABLED
+#define NRFX_PRS_ENABLED 1
+#endif
+// <q> NRFX_PRS_BOX_0_ENABLED - Enables box 0 in the module.
+
+
+#ifndef NRFX_PRS_BOX_0_ENABLED
+#define NRFX_PRS_BOX_0_ENABLED 1
+#endif
+
+// <q> NRFX_PRS_BOX_1_ENABLED - Enables box 1 in the module.
+
+
+#ifndef NRFX_PRS_BOX_1_ENABLED
+#define NRFX_PRS_BOX_1_ENABLED 1
+#endif
+
+// <q> NRFX_PRS_BOX_2_ENABLED - Enables box 2 in the module.
+
+
+#ifndef NRFX_PRS_BOX_2_ENABLED
+#define NRFX_PRS_BOX_2_ENABLED 1
+#endif
+
+// <q> NRFX_PRS_BOX_3_ENABLED - Enables box 3 in the module.
+
+
+#ifndef NRFX_PRS_BOX_3_ENABLED
+#define NRFX_PRS_BOX_3_ENABLED 1
+#endif
+
+// <q> NRFX_PRS_BOX_4_ENABLED - Enables box 4 in the module.
+
+
+#ifndef NRFX_PRS_BOX_4_ENABLED
+#define NRFX_PRS_BOX_4_ENABLED 1
+#endif
+
+// <e> NRFX_PRS_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_PRS_CONFIG_LOG_ENABLED
+#define NRFX_PRS_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_PRS_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_PRS_CONFIG_LOG_LEVEL
+#define NRFX_PRS_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_PRS_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_PRS_CONFIG_INFO_COLOR
+#define NRFX_PRS_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_PRS_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_PRS_CONFIG_DEBUG_COLOR
+#define NRFX_PRS_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_PWM_ENABLED - nrfx_pwm - PWM peripheral driver
+//==========================================================
+#ifndef NRFX_PWM_ENABLED
+#define NRFX_PWM_ENABLED 1
+#endif
+// <q> NRFX_PWM0_ENABLED - Enable PWM0 instance
+
+
+#ifndef NRFX_PWM0_ENABLED
+#define NRFX_PWM0_ENABLED 1
+#endif
+
+// <q> NRFX_PWM1_ENABLED - Enable PWM1 instance
+
+
+#ifndef NRFX_PWM1_ENABLED
+#define NRFX_PWM1_ENABLED 1
+#endif
+
+// <q> NRFX_PWM2_ENABLED - Enable PWM2 instance
+
+
+#ifndef NRFX_PWM2_ENABLED
+#define NRFX_PWM2_ENABLED 1
+#endif
+
+// <q> NRFX_PWM3_ENABLED - Enable PWM3 instance
+
+
+#ifndef NRFX_PWM3_ENABLED
+#define NRFX_PWM3_ENABLED 1
+#endif
+
+// <o> NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN - Out0 pin <0-31>
+
+
+#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN
+#define NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN 31
+#endif
+
+// <o> NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN - Out1 pin <0-31>
+
+
+#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN
+#define NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN 31
+#endif
+
+// <o> NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN - Out2 pin <0-31>
+
+
+#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN
+#define NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN 31
+#endif
+
+// <o> NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN - Out3 pin <0-31>
+
+
+#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN
+#define NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN 31
+#endif
+
+// <o> NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK - Base clock
+
+// <0=> 16 MHz
+// <1=> 8 MHz
+// <2=> 4 MHz
+// <3=> 2 MHz
+// <4=> 1 MHz
+// <5=> 500 kHz
+// <6=> 250 kHz
+// <7=> 125 kHz
+
+#ifndef NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK
+#define NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK 4
+#endif
+
+// <o> NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE - Count mode
+
+// <0=> Up
+// <1=> Up and Down
+
+#ifndef NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE
+#define NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE 0
+#endif
+
+// <o> NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE - Top value
+#ifndef NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE
+#define NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE 1000
+#endif
+
+// <o> NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE - Load mode
+
+// <0=> Common
+// <1=> Grouped
+// <2=> Individual
+// <3=> Waveform
+
+#ifndef NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE
+#define NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE 0
+#endif
+
+// <o> NRFX_PWM_DEFAULT_CONFIG_STEP_MODE - Step mode
+
+// <0=> Auto
+// <1=> Triggered
+
+#ifndef NRFX_PWM_DEFAULT_CONFIG_STEP_MODE
+#define NRFX_PWM_DEFAULT_CONFIG_STEP_MODE 0
+#endif
+
+// <o> NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <e> NRFX_PWM_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_PWM_CONFIG_LOG_ENABLED
+#define NRFX_PWM_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_PWM_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_PWM_CONFIG_LOG_LEVEL
+#define NRFX_PWM_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_PWM_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_PWM_CONFIG_INFO_COLOR
+#define NRFX_PWM_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_PWM_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_PWM_CONFIG_DEBUG_COLOR
+#define NRFX_PWM_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_QDEC_ENABLED - nrfx_qdec - QDEC peripheral driver
+//==========================================================
+#ifndef NRFX_QDEC_ENABLED
+#define NRFX_QDEC_ENABLED 1
+#endif
+// <o> NRFX_QDEC_CONFIG_REPORTPER - Report period
+
+// <0=> 10 Samples
+// <1=> 40 Samples
+// <2=> 80 Samples
+// <3=> 120 Samples
+// <4=> 160 Samples
+// <5=> 200 Samples
+// <6=> 240 Samples
+// <7=> 280 Samples
+
+#ifndef NRFX_QDEC_CONFIG_REPORTPER
+#define NRFX_QDEC_CONFIG_REPORTPER 0
+#endif
+
+// <o> NRFX_QDEC_CONFIG_SAMPLEPER - Sample period
+
+// <0=> 128 us
+// <1=> 256 us
+// <2=> 512 us
+// <3=> 1024 us
+// <4=> 2048 us
+// <5=> 4096 us
+// <6=> 8192 us
+// <7=> 16384 us
+
+#ifndef NRFX_QDEC_CONFIG_SAMPLEPER
+#define NRFX_QDEC_CONFIG_SAMPLEPER 7
+#endif
+
+// <o> NRFX_QDEC_CONFIG_PIO_A - A pin <0-31>
+
+
+#ifndef NRFX_QDEC_CONFIG_PIO_A
+#define NRFX_QDEC_CONFIG_PIO_A 31
+#endif
+
+// <o> NRFX_QDEC_CONFIG_PIO_B - B pin <0-31>
+
+
+#ifndef NRFX_QDEC_CONFIG_PIO_B
+#define NRFX_QDEC_CONFIG_PIO_B 31
+#endif
+
+// <o> NRFX_QDEC_CONFIG_PIO_LED - LED pin <0-31>
+
+
+#ifndef NRFX_QDEC_CONFIG_PIO_LED
+#define NRFX_QDEC_CONFIG_PIO_LED 31
+#endif
+
+// <o> NRFX_QDEC_CONFIG_LEDPRE - LED pre
+#ifndef NRFX_QDEC_CONFIG_LEDPRE
+#define NRFX_QDEC_CONFIG_LEDPRE 511
+#endif
+
+// <o> NRFX_QDEC_CONFIG_LEDPOL - LED polarity
+
+// <0=> Active low
+// <1=> Active high
+
+#ifndef NRFX_QDEC_CONFIG_LEDPOL
+#define NRFX_QDEC_CONFIG_LEDPOL 1
+#endif
+
+// <q> NRFX_QDEC_CONFIG_DBFEN - Debouncing enable
+
+
+#ifndef NRFX_QDEC_CONFIG_DBFEN
+#define NRFX_QDEC_CONFIG_DBFEN 0
+#endif
+
+// <q> NRFX_QDEC_CONFIG_SAMPLE_INTEN - Sample ready interrupt enable
+
+
+#ifndef NRFX_QDEC_CONFIG_SAMPLE_INTEN
+#define NRFX_QDEC_CONFIG_SAMPLE_INTEN 0
+#endif
+
+// <o> NRFX_QDEC_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_QDEC_CONFIG_IRQ_PRIORITY
+#define NRFX_QDEC_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <e> NRFX_QDEC_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_QDEC_CONFIG_LOG_ENABLED
+#define NRFX_QDEC_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_QDEC_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_QDEC_CONFIG_LOG_LEVEL
+#define NRFX_QDEC_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_QDEC_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_QDEC_CONFIG_INFO_COLOR
+#define NRFX_QDEC_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_QDEC_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_QDEC_CONFIG_DEBUG_COLOR
+#define NRFX_QDEC_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_RNG_ENABLED - nrfx_rng - RNG peripheral driver
+//==========================================================
+#ifndef NRFX_RNG_ENABLED
+#define NRFX_RNG_ENABLED 1
+#endif
+// <q> NRFX_RNG_CONFIG_ERROR_CORRECTION - Error correction
+
+
+#ifndef NRFX_RNG_CONFIG_ERROR_CORRECTION
+#define NRFX_RNG_CONFIG_ERROR_CORRECTION 1
+#endif
+
+// <o> NRFX_RNG_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_RNG_CONFIG_IRQ_PRIORITY
+#define NRFX_RNG_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <e> NRFX_RNG_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_RNG_CONFIG_LOG_ENABLED
+#define NRFX_RNG_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_RNG_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_RNG_CONFIG_LOG_LEVEL
+#define NRFX_RNG_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_RNG_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_RNG_CONFIG_INFO_COLOR
+#define NRFX_RNG_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_RNG_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_RNG_CONFIG_DEBUG_COLOR
+#define NRFX_RNG_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_RTC_ENABLED - nrfx_rtc - RTC peripheral driver
+//==========================================================
+#ifndef NRFX_RTC_ENABLED
+#define NRFX_RTC_ENABLED 1
+#endif
+// <q> NRFX_RTC0_ENABLED - Enable RTC0 instance
+
+
+#ifndef NRFX_RTC0_ENABLED
+#define NRFX_RTC0_ENABLED 1
+#endif
+
+// <q> NRFX_RTC1_ENABLED - Enable RTC1 instance
+
+
+#ifndef NRFX_RTC1_ENABLED
+#define NRFX_RTC1_ENABLED 1
+#endif
+
+// <q> NRFX_RTC2_ENABLED - Enable RTC2 instance
+
+
+#ifndef NRFX_RTC2_ENABLED
+#define NRFX_RTC2_ENABLED 1
+#endif
+
+// <o> NRFX_RTC_MAXIMUM_LATENCY_US - Maximum possible time[us] in highest priority interrupt
+#ifndef NRFX_RTC_MAXIMUM_LATENCY_US
+#define NRFX_RTC_MAXIMUM_LATENCY_US 2000
+#endif
+
+// <o> NRFX_RTC_DEFAULT_CONFIG_FREQUENCY - Frequency <16-32768>
+
+
+#ifndef NRFX_RTC_DEFAULT_CONFIG_FREQUENCY
+#define NRFX_RTC_DEFAULT_CONFIG_FREQUENCY 32768
+#endif
+
+// <q> NRFX_RTC_DEFAULT_CONFIG_RELIABLE - Ensures safe compare event triggering
+
+
+#ifndef NRFX_RTC_DEFAULT_CONFIG_RELIABLE
+#define NRFX_RTC_DEFAULT_CONFIG_RELIABLE 0
+#endif
+
+// <o> NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <e> NRFX_RTC_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_RTC_CONFIG_LOG_ENABLED
+#define NRFX_RTC_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_RTC_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_RTC_CONFIG_LOG_LEVEL
+#define NRFX_RTC_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_RTC_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_RTC_CONFIG_INFO_COLOR
+#define NRFX_RTC_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_RTC_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_RTC_CONFIG_DEBUG_COLOR
+#define NRFX_RTC_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_SAADC_ENABLED - nrfx_saadc - SAADC peripheral driver
+//==========================================================
+#ifndef NRFX_SAADC_ENABLED
+#define NRFX_SAADC_ENABLED 1
+#endif
+// <o> NRFX_SAADC_CONFIG_RESOLUTION - Resolution
+
+// <0=> 8 bit
+// <1=> 10 bit
+// <2=> 12 bit
+// <3=> 14 bit
+
+#ifndef NRFX_SAADC_CONFIG_RESOLUTION
+#define NRFX_SAADC_CONFIG_RESOLUTION 1
+#endif
+
+// <o> NRFX_SAADC_CONFIG_OVERSAMPLE - Sample period
+
+// <0=> Disabled
+// <1=> 2x
+// <2=> 4x
+// <3=> 8x
+// <4=> 16x
+// <5=> 32x
+// <6=> 64x
+// <7=> 128x
+// <8=> 256x
+
+#ifndef NRFX_SAADC_CONFIG_OVERSAMPLE
+#define NRFX_SAADC_CONFIG_OVERSAMPLE 0
+#endif
+
+// <q> NRFX_SAADC_CONFIG_LP_MODE - Enabling low power mode
+
+
+#ifndef NRFX_SAADC_CONFIG_LP_MODE
+#define NRFX_SAADC_CONFIG_LP_MODE 0
+#endif
+
+// <o> NRFX_SAADC_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_SAADC_CONFIG_IRQ_PRIORITY
+#define NRFX_SAADC_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <e> NRFX_SAADC_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_SAADC_CONFIG_LOG_ENABLED
+#define NRFX_SAADC_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_SAADC_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_SAADC_CONFIG_LOG_LEVEL
+#define NRFX_SAADC_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_SAADC_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_SAADC_CONFIG_INFO_COLOR
+#define NRFX_SAADC_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_SAADC_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_SAADC_CONFIG_DEBUG_COLOR
+#define NRFX_SAADC_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_SPIM_ENABLED - nrfx_spim - SPIM peripheral driver
+//==========================================================
+#ifndef NRFX_SPIM_ENABLED
+#define NRFX_SPIM_ENABLED 1
+#endif
+// <q> NRFX_SPIM0_ENABLED - Enable SPIM0 instance
+
+
+#ifndef NRFX_SPIM0_ENABLED
+#define NRFX_SPIM0_ENABLED 1
+#endif
+
+// <q> NRFX_SPIM1_ENABLED - Enable SPIM1 instance
+
+
+#ifndef NRFX_SPIM1_ENABLED
+#define NRFX_SPIM1_ENABLED 1
+#endif
+
+// <q> NRFX_SPIM2_ENABLED - Enable SPIM2 instance
+
+
+#ifndef NRFX_SPIM2_ENABLED
+#define NRFX_SPIM2_ENABLED 1
+#endif
+
+// <q> NRFX_SPIM3_ENABLED - Enable SPIM3 instance
+
+
+#ifndef NRFX_SPIM3_ENABLED
+#define NRFX_SPIM3_ENABLED 1
+#endif
+
+// <q> NRFX_SPIM_EXTENDED_ENABLED - Enable extended SPIM features
+
+
+#ifndef NRFX_SPIM_EXTENDED_ENABLED
+#define NRFX_SPIM_EXTENDED_ENABLED 0
+#endif
+
+// <o> NRFX_SPIM_MISO_PULL_CFG - MISO pin pull configuration.
+
+// <0=> NRF_GPIO_PIN_NOPULL
+// <1=> NRF_GPIO_PIN_PULLDOWN
+// <3=> NRF_GPIO_PIN_PULLUP
+
+#ifndef NRFX_SPIM_MISO_PULL_CFG
+#define NRFX_SPIM_MISO_PULL_CFG 1
+#endif
+
+// <o> NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <e> NRFX_SPIM_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_SPIM_CONFIG_LOG_ENABLED
+#define NRFX_SPIM_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_SPIM_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_SPIM_CONFIG_LOG_LEVEL
+#define NRFX_SPIM_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_SPIM_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_SPIM_CONFIG_INFO_COLOR
+#define NRFX_SPIM_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_SPIM_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_SPIM_CONFIG_DEBUG_COLOR
+#define NRFX_SPIM_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_SPIS_ENABLED - nrfx_spis - SPIS peripheral driver
+//==========================================================
+#ifndef NRFX_SPIS_ENABLED
+#define NRFX_SPIS_ENABLED 1
+#endif
+// <q> NRFX_SPIS0_ENABLED - Enable SPIS0 instance
+
+
+#ifndef NRFX_SPIS0_ENABLED
+#define NRFX_SPIS0_ENABLED 1
+#endif
+
+// <q> NRFX_SPIS1_ENABLED - Enable SPIS1 instance
+
+
+#ifndef NRFX_SPIS1_ENABLED
+#define NRFX_SPIS1_ENABLED 1
+#endif
+
+// <q> NRFX_SPIS2_ENABLED - Enable SPIS2 instance
+
+
+#ifndef NRFX_SPIS2_ENABLED
+#define NRFX_SPIS2_ENABLED 1
+#endif
+
+// <o> NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <o> NRFX_SPIS_DEFAULT_DEF - SPIS default DEF character <0-255>
+
+
+#ifndef NRFX_SPIS_DEFAULT_DEF
+#define NRFX_SPIS_DEFAULT_DEF 255
+#endif
+
+// <o> NRFX_SPIS_DEFAULT_ORC - SPIS default ORC character <0-255>
+
+
+#ifndef NRFX_SPIS_DEFAULT_ORC
+#define NRFX_SPIS_DEFAULT_ORC 255
+#endif
+
+// <e> NRFX_SPIS_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_SPIS_CONFIG_LOG_ENABLED
+#define NRFX_SPIS_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_SPIS_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_SPIS_CONFIG_LOG_LEVEL
+#define NRFX_SPIS_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_SPIS_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_SPIS_CONFIG_INFO_COLOR
+#define NRFX_SPIS_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_SPIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_SPIS_CONFIG_DEBUG_COLOR
+#define NRFX_SPIS_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_SPI_ENABLED - nrfx_spi - SPI peripheral driver
+//==========================================================
+#ifndef NRFX_SPI_ENABLED
+#define NRFX_SPI_ENABLED 1
+#endif
+// <q> NRFX_SPI0_ENABLED - Enable SPI0 instance
+
+
+#ifndef NRFX_SPI0_ENABLED
+#define NRFX_SPI0_ENABLED 1
+#endif
+
+// <q> NRFX_SPI1_ENABLED - Enable SPI1 instance
+
+
+#ifndef NRFX_SPI1_ENABLED
+#define NRFX_SPI1_ENABLED 1
+#endif
+
+// <q> NRFX_SPI2_ENABLED - Enable SPI2 instance
+
+
+#ifndef NRFX_SPI2_ENABLED
+#define NRFX_SPI2_ENABLED 1
+#endif
+
+// <o> NRFX_SPI_MISO_PULL_CFG - MISO pin pull configuration.
+
+// <0=> NRF_GPIO_PIN_NOPULL
+// <1=> NRF_GPIO_PIN_PULLDOWN
+// <3=> NRF_GPIO_PIN_PULLUP
+
+#ifndef NRFX_SPI_MISO_PULL_CFG
+#define NRFX_SPI_MISO_PULL_CFG 1
+#endif
+
+// <o> NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <e> NRFX_SPI_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_SPI_CONFIG_LOG_ENABLED
+#define NRFX_SPI_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_SPI_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_SPI_CONFIG_LOG_LEVEL
+#define NRFX_SPI_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_SPI_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_SPI_CONFIG_INFO_COLOR
+#define NRFX_SPI_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_SPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_SPI_CONFIG_DEBUG_COLOR
+#define NRFX_SPI_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_SWI_ENABLED - nrfx_swi - SWI/EGU peripheral allocator
+//==========================================================
+#ifndef NRFX_SWI_ENABLED
+#define NRFX_SWI_ENABLED 1
+#endif
+// <q> NRFX_EGU_ENABLED - Enable EGU support
+
+
+#ifndef NRFX_EGU_ENABLED
+#define NRFX_EGU_ENABLED 1
+#endif
+
+// <q> NRFX_SWI0_DISABLED - Exclude SWI0 from being utilized by the driver
+
+
+#ifndef NRFX_SWI0_DISABLED
+#define NRFX_SWI0_DISABLED 0
+#endif
+
+// <q> NRFX_SWI1_DISABLED - Exclude SWI1 from being utilized by the driver
+
+
+#ifndef NRFX_SWI1_DISABLED
+#define NRFX_SWI1_DISABLED 0
+#endif
+
+// <q> NRFX_SWI2_DISABLED - Exclude SWI2 from being utilized by the driver
+
+
+#ifndef NRFX_SWI2_DISABLED
+#define NRFX_SWI2_DISABLED 0
+#endif
+
+// <q> NRFX_SWI3_DISABLED - Exclude SWI3 from being utilized by the driver
+
+
+#ifndef NRFX_SWI3_DISABLED
+#define NRFX_SWI3_DISABLED 0
+#endif
+
+// <q> NRFX_SWI4_DISABLED - Exclude SWI4 from being utilized by the driver
+
+
+#ifndef NRFX_SWI4_DISABLED
+#define NRFX_SWI4_DISABLED 0
+#endif
+
+// <q> NRFX_SWI5_DISABLED - Exclude SWI5 from being utilized by the driver
+
+
+#ifndef NRFX_SWI5_DISABLED
+#define NRFX_SWI5_DISABLED 0
+#endif
+
+// <e> NRFX_SWI_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_SWI_CONFIG_LOG_ENABLED
+#define NRFX_SWI_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_SWI_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_SWI_CONFIG_LOG_LEVEL
+#define NRFX_SWI_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_SWI_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_SWI_CONFIG_INFO_COLOR
+#define NRFX_SWI_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_SWI_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_SWI_CONFIG_DEBUG_COLOR
+#define NRFX_SWI_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <q> NRFX_SYSTICK_ENABLED - nrfx_systick - ARM(R) SysTick driver
+
+
+#ifndef NRFX_SYSTICK_ENABLED
+#define NRFX_SYSTICK_ENABLED 1
+#endif
+
+// <e> NRFX_TEMP_ENABLED - nrfx_temp - TEMP peripheral driver
+//==========================================================
+#ifndef NRFX_TEMP_ENABLED
+#define NRFX_TEMP_ENABLED 1
+#endif
+
+// <o> NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// </e>
+
+// <e> NRFX_TIMER_ENABLED - nrfx_timer - TIMER periperal driver
+//==========================================================
+#ifndef NRFX_TIMER_ENABLED
+#define NRFX_TIMER_ENABLED 1
+#endif
+// <q> NRFX_TIMER0_ENABLED - Enable TIMER0 instance
+
+
+#ifndef NRFX_TIMER0_ENABLED
+#define NRFX_TIMER0_ENABLED 1
+#endif
+
+// <q> NRFX_TIMER1_ENABLED - Enable TIMER1 instance
+
+
+#ifndef NRFX_TIMER1_ENABLED
+#define NRFX_TIMER1_ENABLED 1
+#endif
+
+// <q> NRFX_TIMER2_ENABLED - Enable TIMER2 instance
+
+
+#ifndef NRFX_TIMER2_ENABLED
+#define NRFX_TIMER2_ENABLED 1
+#endif
+
+// <q> NRFX_TIMER3_ENABLED - Enable TIMER3 instance
+
+
+#ifndef NRFX_TIMER3_ENABLED
+#define NRFX_TIMER3_ENABLED 1
+#endif
+
+// <q> NRFX_TIMER4_ENABLED - Enable TIMER4 instance
+
+
+#ifndef NRFX_TIMER4_ENABLED
+#define NRFX_TIMER4_ENABLED 1
+#endif
+
+// <o> NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY - Timer frequency if in Timer mode
+
+// <0=> 16 MHz
+// <1=> 8 MHz
+// <2=> 4 MHz
+// <3=> 2 MHz
+// <4=> 1 MHz
+// <5=> 500 kHz
+// <6=> 250 kHz
+// <7=> 125 kHz
+// <8=> 62.5 kHz
+// <9=> 31.25 kHz
+
+#ifndef NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY
+#define NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY 0
+#endif
+
+// <o> NRFX_TIMER_DEFAULT_CONFIG_MODE - Timer mode or operation
+
+// <0=> Timer
+// <1=> Counter
+
+#ifndef NRFX_TIMER_DEFAULT_CONFIG_MODE
+#define NRFX_TIMER_DEFAULT_CONFIG_MODE 0
+#endif
+
+// <o> NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH - Timer counter bit width
+
+// <0=> 16 bit
+// <1=> 8 bit
+// <2=> 24 bit
+// <3=> 32 bit
+
+#ifndef NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH
+#define NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH 0
+#endif
+
+// <o> NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <e> NRFX_TIMER_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_TIMER_CONFIG_LOG_ENABLED
+#define NRFX_TIMER_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_TIMER_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_TIMER_CONFIG_LOG_LEVEL
+#define NRFX_TIMER_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_TIMER_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_TIMER_CONFIG_INFO_COLOR
+#define NRFX_TIMER_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_TIMER_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_TIMER_CONFIG_DEBUG_COLOR
+#define NRFX_TIMER_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_TWIM_ENABLED - nrfx_twim - TWIM peripheral driver
+//==========================================================
+#ifndef NRFX_TWIM_ENABLED
+#define NRFX_TWIM_ENABLED 1
+#endif
+// <q> NRFX_TWIM0_ENABLED - Enable TWIM0 instance
+
+
+#ifndef NRFX_TWIM0_ENABLED
+#define NRFX_TWIM0_ENABLED 1
+#endif
+
+// <q> NRFX_TWIM1_ENABLED - Enable TWIM1 instance
+
+
+#ifndef NRFX_TWIM1_ENABLED
+#define NRFX_TWIM1_ENABLED 1
+#endif
+
+// <o> NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY - Frequency
+
+// <26738688=> 100k
+// <67108864=> 250k
+// <104857600=> 400k
+
+#ifndef NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY
+#define NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY 26738688
+#endif
+
+// <q> NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit
+
+
+#ifndef NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT
+#define NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0
+#endif
+
+// <o> NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <e> NRFX_TWIM_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_TWIM_CONFIG_LOG_ENABLED
+#define NRFX_TWIM_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_TWIM_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_TWIM_CONFIG_LOG_LEVEL
+#define NRFX_TWIM_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_TWIM_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_TWIM_CONFIG_INFO_COLOR
+#define NRFX_TWIM_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_TWIM_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_TWIM_CONFIG_DEBUG_COLOR
+#define NRFX_TWIM_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_TWIS_ENABLED - nrfx_twis - TWIS peripheral driver
+//==========================================================
+#ifndef NRFX_TWIS_ENABLED
+#define NRFX_TWIS_ENABLED 1
+#endif
+// <q> NRFX_TWIS0_ENABLED - Enable TWIS0 instance
+
+
+#ifndef NRFX_TWIS0_ENABLED
+#define NRFX_TWIS0_ENABLED 1
+#endif
+
+// <q> NRFX_TWIS1_ENABLED - Enable TWIS1 instance
+
+
+#ifndef NRFX_TWIS1_ENABLED
+#define NRFX_TWIS1_ENABLED 1
+#endif
+
+// <q> NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once
+
+
+// <i> Optimization flag. Registers used by TWIS are shared by other peripherals. Normally, during initialization driver tries to clear all registers to known state before doing the initialization itself. This gives initialization safe procedure, no matter when it would be called. If you activate TWIS only once and do never uninitialize it - set this flag to 1 what gives more optimal code.
+
+#ifndef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY
+#define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0
+#endif
+
+// <q> NRFX_TWIS_NO_SYNC_MODE - Remove support for synchronous mode
+
+
+// <i> Synchronous mode would be used in specific situations. And it uses some additional code and data memory to safely process state machine by polling it in status functions. If this functionality is not required it may be disabled to free some resources.
+
+#ifndef NRFX_TWIS_NO_SYNC_MODE
+#define NRFX_TWIS_NO_SYNC_MODE 0
+#endif
+
+// <o> NRFX_TWIS_DEFAULT_CONFIG_ADDR0 - Address0
+#ifndef NRFX_TWIS_DEFAULT_CONFIG_ADDR0
+#define NRFX_TWIS_DEFAULT_CONFIG_ADDR0 0
+#endif
+
+// <o> NRFX_TWIS_DEFAULT_CONFIG_ADDR1 - Address1
+#ifndef NRFX_TWIS_DEFAULT_CONFIG_ADDR1
+#define NRFX_TWIS_DEFAULT_CONFIG_ADDR1 0
+#endif
+
+// <o> NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL - SCL pin pull configuration
+
+// <0=> Disabled
+// <1=> Pull down
+// <3=> Pull up
+
+#ifndef NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL
+#define NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL 0
+#endif
+
+// <o> NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL - SDA pin pull configuration
+
+// <0=> Disabled
+// <1=> Pull down
+// <3=> Pull up
+
+#ifndef NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL
+#define NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL 0
+#endif
+
+// <o> NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <e> NRFX_TWIS_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_TWIS_CONFIG_LOG_ENABLED
+#define NRFX_TWIS_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_TWIS_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_TWIS_CONFIG_LOG_LEVEL
+#define NRFX_TWIS_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_TWIS_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_TWIS_CONFIG_INFO_COLOR
+#define NRFX_TWIS_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_TWIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_TWIS_CONFIG_DEBUG_COLOR
+#define NRFX_TWIS_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_TWI_ENABLED - nrfx_twi - TWI peripheral driver
+//==========================================================
+#ifndef NRFX_TWI_ENABLED
+#define NRFX_TWI_ENABLED 1
+#endif
+// <q> NRFX_TWI0_ENABLED - Enable TWI0 instance
+
+
+#ifndef NRFX_TWI0_ENABLED
+#define NRFX_TWI0_ENABLED 1
+#endif
+
+// <q> NRFX_TWI1_ENABLED - Enable TWI1 instance
+
+
+#ifndef NRFX_TWI1_ENABLED
+#define NRFX_TWI1_ENABLED 1
+#endif
+
+// <o> NRFX_TWI_DEFAULT_CONFIG_FREQUENCY - Frequency
+
+// <26738688=> 100k
+// <67108864=> 250k
+// <104857600=> 400k
+
+#ifndef NRFX_TWI_DEFAULT_CONFIG_FREQUENCY
+#define NRFX_TWI_DEFAULT_CONFIG_FREQUENCY 26738688
+#endif
+
+// <q> NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit
+
+
+#ifndef NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT
+#define NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0
+#endif
+
+// <o> NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <e> NRFX_TWI_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_TWI_CONFIG_LOG_ENABLED
+#define NRFX_TWI_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_TWI_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_TWI_CONFIG_LOG_LEVEL
+#define NRFX_TWI_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_TWI_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_TWI_CONFIG_INFO_COLOR
+#define NRFX_TWI_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_TWI_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_TWI_CONFIG_DEBUG_COLOR
+#define NRFX_TWI_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_UARTE_ENABLED - nrfx_uarte - UARTE peripheral driver
+//==========================================================
+#ifndef NRFX_UARTE_ENABLED
+#define NRFX_UARTE_ENABLED 1
+#endif
+// <o> NRFX_UARTE0_ENABLED - Enable UARTE0 instance
+#ifndef NRFX_UARTE0_ENABLED
+#define NRFX_UARTE0_ENABLED 1
+#endif
+
+// <o> NRFX_UARTE1_ENABLED - Enable UARTE1 instance
+#ifndef NRFX_UARTE1_ENABLED
+#define NRFX_UARTE1_ENABLED 1
+#endif
+
+// <o> NRFX_UARTE_DEFAULT_CONFIG_HWFC - Hardware Flow Control
+
+// <0=> Disabled
+// <1=> Enabled
+
+#ifndef NRFX_UARTE_DEFAULT_CONFIG_HWFC
+#define NRFX_UARTE_DEFAULT_CONFIG_HWFC 0
+#endif
+
+// <o> NRFX_UARTE_DEFAULT_CONFIG_PARITY - Parity
+
+// <0=> Excluded
+// <14=> Included
+
+#ifndef NRFX_UARTE_DEFAULT_CONFIG_PARITY
+#define NRFX_UARTE_DEFAULT_CONFIG_PARITY 0
+#endif
+
+// <o> NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE - Default Baudrate
+
+// <323584=> 1200 baud
+// <643072=> 2400 baud
+// <1290240=> 4800 baud
+// <2576384=> 9600 baud
+// <3862528=> 14400 baud
+// <5152768=> 19200 baud
+// <7716864=> 28800 baud
+// <8388608=> 31250 baud
+// <10289152=> 38400 baud
+// <15007744=> 56000 baud
+// <15400960=> 57600 baud
+// <20615168=> 76800 baud
+// <30801920=> 115200 baud
+// <61865984=> 230400 baud
+// <67108864=> 250000 baud
+// <121634816=> 460800 baud
+// <251658240=> 921600 baud
+// <268435456=> 1000000 baud
+
+#ifndef NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE
+#define NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE 30801920
+#endif
+
+// <o> NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <e> NRFX_UARTE_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_UARTE_CONFIG_LOG_ENABLED
+#define NRFX_UARTE_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_UARTE_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_UARTE_CONFIG_LOG_LEVEL
+#define NRFX_UARTE_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_UARTE_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_UARTE_CONFIG_INFO_COLOR
+#define NRFX_UARTE_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_UARTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_UARTE_CONFIG_DEBUG_COLOR
+#define NRFX_UARTE_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_UART_ENABLED - nrfx_uart - UART peripheral driver
+//==========================================================
+#ifndef NRFX_UART_ENABLED
+#define NRFX_UART_ENABLED 1
+#endif
+// <o> NRFX_UART0_ENABLED - Enable UART0 instance
+#ifndef NRFX_UART0_ENABLED
+#define NRFX_UART0_ENABLED 1
+#endif
+
+// <o> NRFX_UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control
+
+// <0=> Disabled
+// <1=> Enabled
+
+#ifndef NRFX_UART_DEFAULT_CONFIG_HWFC
+#define NRFX_UART_DEFAULT_CONFIG_HWFC 0
+#endif
+
+// <o> NRFX_UART_DEFAULT_CONFIG_PARITY - Parity
+
+// <0=> Excluded
+// <14=> Included
+
+#ifndef NRFX_UART_DEFAULT_CONFIG_PARITY
+#define NRFX_UART_DEFAULT_CONFIG_PARITY 0
+#endif
+
+// <o> NRFX_UART_DEFAULT_CONFIG_BAUDRATE - Default Baudrate
+
+// <323584=> 1200 baud
+// <643072=> 2400 baud
+// <1290240=> 4800 baud
+// <2576384=> 9600 baud
+// <3866624=> 14400 baud
+// <5152768=> 19200 baud
+// <7729152=> 28800 baud
+// <8388608=> 31250 baud
+// <10309632=> 38400 baud
+// <15007744=> 56000 baud
+// <15462400=> 57600 baud
+// <20615168=> 76800 baud
+// <30924800=> 115200 baud
+// <61845504=> 230400 baud
+// <67108864=> 250000 baud
+// <123695104=> 460800 baud
+// <247386112=> 921600 baud
+// <268435456=> 1000000 baud
+
+#ifndef NRFX_UART_DEFAULT_CONFIG_BAUDRATE
+#define NRFX_UART_DEFAULT_CONFIG_BAUDRATE 30924800
+#endif
+
+// <o> NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <e> NRFX_UART_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_UART_CONFIG_LOG_ENABLED
+#define NRFX_UART_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_UART_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_UART_CONFIG_LOG_LEVEL
+#define NRFX_UART_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_UART_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_UART_CONFIG_INFO_COLOR
+#define NRFX_UART_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_UART_CONFIG_DEBUG_COLOR
+#define NRFX_UART_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_USBD_ENABLED - nrfx_usbd - USBD peripheral driver
+//==========================================================
+#ifndef NRFX_USBD_ENABLED
+#define NRFX_USBD_ENABLED 1
+#endif
+// <o> NRFX_USBD_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_USBD_CONFIG_IRQ_PRIORITY
+#define NRFX_USBD_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <q> USBD_CONFIG_DMASCHEDULER_ISO_BOOST - Give priority to isochronous transfers
+
+// <i> This option gives priority to isochronous transfers.
+// <i> Enabling it assures that isochronous transfers are always processed,
+// <i> even if multiple other transfers are pending.
+// <i> Isochronous endpoints are prioritized before the usbd_dma_scheduler_algorithm
+// <i> function is called, so the option is independent of the algorithm chosen.
+
+#ifndef NRFX_USBD_CONFIG_DMASCHEDULER_ISO_BOOST
+#define NRFX_USBD_CONFIG_DMASCHEDULER_ISO_BOOST 1
+#endif
+
+// <q> USBD_CONFIG_ISO_IN_ZLP - Respond to an IN token on ISO IN endpoint with ZLP when no data is ready
+
+
+// <i> If set, ISO IN endpoint will respond to an IN token with ZLP when no data is ready to be sent.
+// <i> Else, there will be no response.
+
+#ifndef NRFX_USBD_CONFIG_ISO_IN_ZLP
+#define NRFX_USBD_CONFIG_ISO_IN_ZLP 0
+#endif
+
+// <e> NRFX_USBD_CONFIG_LOG_ENABLED - Enable logging in the module
+//==========================================================
+#ifndef NRFX_USBD_CONFIG_LOG_ENABLED
+#define NRFX_USBD_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_USBD_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_USBD_CONFIG_LOG_LEVEL
+#define NRFX_USBD_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_USBD_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_USBD_CONFIG_INFO_COLOR
+#define NRFX_USBD_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_USBD_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_USBD_CONFIG_DEBUG_COLOR
+#define NRFX_USBD_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_WDT_ENABLED - nrfx_wdt - WDT peripheral driver
+//==========================================================
+#ifndef NRFX_WDT_ENABLED
+#define NRFX_WDT_ENABLED 1
+#endif
+// <o> NRFX_WDT_CONFIG_BEHAVIOUR - WDT behavior in CPU SLEEP or HALT mode
+
+// <1=> Run in SLEEP, Pause in HALT
+// <8=> Pause in SLEEP, Run in HALT
+// <9=> Run in SLEEP and HALT
+// <0=> Pause in SLEEP and HALT
+
+#ifndef NRFX_WDT_CONFIG_BEHAVIOUR
+#define NRFX_WDT_CONFIG_BEHAVIOUR 1
+#endif
+
+// <o> NRFX_WDT_CONFIG_RELOAD_VALUE - Reload value <15-4294967295>
+
+
+#ifndef NRFX_WDT_CONFIG_RELOAD_VALUE
+#define NRFX_WDT_CONFIG_RELOAD_VALUE 2000
+#endif
+
+// <o> NRFX_WDT_CONFIG_NO_IRQ - Remove WDT IRQ handling from WDT driver
+
+// <0=> Include WDT IRQ handling
+// <1=> Remove WDT IRQ handling
+
+#ifndef NRFX_WDT_CONFIG_NO_IRQ
+#define NRFX_WDT_CONFIG_NO_IRQ 0
+#endif
+
+// <o> NRFX_WDT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_WDT_CONFIG_IRQ_PRIORITY
+#define NRFX_WDT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// <e> NRFX_WDT_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_WDT_CONFIG_LOG_ENABLED
+#define NRFX_WDT_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_WDT_CONFIG_LOG_LEVEL - Default Severity level
+
+// <0=> Off
+// <1=> Error
+// <2=> Warning
+// <3=> Info
+// <4=> Debug
+
+#ifndef NRFX_WDT_CONFIG_LOG_LEVEL
+#define NRFX_WDT_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_WDT_CONFIG_INFO_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_WDT_CONFIG_INFO_COLOR
+#define NRFX_WDT_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_WDT_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
+
+// <0=> Default
+// <1=> Black
+// <2=> Red
+// <3=> Green
+// <4=> Yellow
+// <5=> Blue
+// <6=> Magenta
+// <7=> Cyan
+// <8=> White
+
+#ifndef NRFX_WDT_CONFIG_DEBUG_COLOR
+#define NRFX_WDT_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// </h>
+
+#endif // NRFX_CONFIG_H__
diff --git a/third_party/NordicSemiconductor/nrfx/templates/nRF52840/nrfx_config.h b/third_party/NordicSemiconductor/nrfx/templates/nRF52840/nrfx_config.h
index d71a0c5..ba7b315 100644
--- a/third_party/NordicSemiconductor/nrfx/templates/nRF52840/nrfx_config.h
+++ b/third_party/NordicSemiconductor/nrfx/templates/nRF52840/nrfx_config.h
@@ -710,6 +710,14 @@
// </e>
+// <e> NRFX_NVMC_ENABLED - nrfx_nvmc - NVMC peripheral driver
+//==========================================================
+#ifndef NRFX_NVMC_ENABLED
+#define NRFX_NVMC_ENABLED 1
+#endif
+
+// </e>
+
// <e> NRFX_PDM_ENABLED - nrfx_pdm - PDM peripheral driver
//==========================================================
#ifndef NRFX_PDM_ENABLED
@@ -2214,6 +2222,29 @@
#define NRFX_SYSTICK_ENABLED 1
#endif
+// <e> NRFX_TEMP_ENABLED - nrfx_temp - TEMP peripheral driver
+//==========================================================
+#ifndef NRFX_TEMP_ENABLED
+#define NRFX_TEMP_ENABLED 1
+#endif
+
+// <o> NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
+
+// <0=> 0 (highest)
+// <1=> 1
+// <2=> 2
+// <3=> 3
+// <4=> 4
+// <5=> 5
+// <6=> 6
+// <7=> 7
+
+#ifndef NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY 7
+#endif
+
+// </e>
+
// <e> NRFX_TIMER_ENABLED - nrfx_timer - TIMER periperal driver
//==========================================================
#ifndef NRFX_TIMER_ENABLED
@@ -2707,12 +2738,12 @@
#ifndef NRFX_UARTE_ENABLED
#define NRFX_UARTE_ENABLED 1
#endif
-// <o> NRFX_UARTE0_ENABLED - Enable UARTE0 instance
+// <q> NRFX_UARTE0_ENABLED - Enable UARTE0 instance
#ifndef NRFX_UARTE0_ENABLED
#define NRFX_UARTE0_ENABLED 1
#endif
-// <o> NRFX_UARTE1_ENABLED - Enable UARTE1 instance
+// <q> NRFX_UARTE1_ENABLED - Enable UARTE1 instance
#ifndef NRFX_UARTE1_ENABLED
#define NRFX_UARTE1_ENABLED 1
#endif
@@ -2833,7 +2864,7 @@
#ifndef NRFX_UART_ENABLED
#define NRFX_UART_ENABLED 1
#endif
-// <o> NRFX_UART0_ENABLED - Enable UART0 instance
+// <q> NRFX_UART0_ENABLED - Enable UART0 instance
#ifndef NRFX_UART0_ENABLED
#define NRFX_UART0_ENABLED 1
#endif
diff --git a/third_party/NordicSemiconductor/nrfx/templates/nRF9160/nrfx_config.h b/third_party/NordicSemiconductor/nrfx/templates/nRF9160/nrfx_config.h
index b7b9409..31b6c89 100644
--- a/third_party/NordicSemiconductor/nrfx/templates/nRF9160/nrfx_config.h
+++ b/third_party/NordicSemiconductor/nrfx/templates/nRF9160/nrfx_config.h
@@ -81,14 +81,11 @@
#endif
// <o> NRFX_CLOCK_CONFIG_LF_SRC - LF clock source.
-// <0=> RC
-// <1=> XTAL
-// <2=> Synth
-// <131073=> External Low Swing
-// <196609=> External Full Swing
+// <1=> RC
+// <2=> XTAL
#ifndef NRFX_CLOCK_CONFIG_LF_SRC
-#define NRFX_CLOCK_CONFIG_LF_SRC 1
+#define NRFX_CLOCK_CONFIG_LF_SRC 2
#endif
// <o> NRFX_CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority.
@@ -485,6 +482,14 @@
// </e>
+// <e> NRFX_NVMC_ENABLED - nrfx_nvmc - NVMC peripheral driver
+//==========================================================
+#ifndef NRFX_NVMC_ENABLED
+#define NRFX_NVMC_ENABLED 1
+#endif
+
+// </e>
+
// <e> NRFX_PDM_ENABLED - nrfx_pdm - PDM peripheral driver.
//==========================================================
#ifndef NRFX_PDM_ENABLED
@@ -1838,22 +1843,22 @@
#ifndef NRFX_UARTE_ENABLED
#define NRFX_UARTE_ENABLED 1
#endif
-// <o> NRFX_UARTE0_ENABLED - Enables UARTE0 instances
+// <q> NRFX_UARTE0_ENABLED - Enables UARTE0 instances
#ifndef NRFX_UARTE0_ENABLED
#define NRFX_UARTE0_ENABLED 1
#endif
-// <o> NRFX_UARTE1_ENABLED - Enables UARTE1 instance.
+// <q> NRFX_UARTE1_ENABLED - Enables UARTE1 instance.
#ifndef NRFX_UARTE1_ENABLED
#define NRFX_UARTE1_ENABLED 1
#endif
-// <o> NRFX_UARTE2_ENABLED - Enables UARTE2 instance.
+// <q> NRFX_UARTE2_ENABLED - Enables UARTE2 instance.
#ifndef NRFX_UARTE2_ENABLED
#define NRFX_UARTE2_ENABLED 1
#endif
-// <o> NRFX_UARTE3_ENABLED - Enables UARTE3 instance.
+// <q> NRFX_UARTE3_ENABLED - Enables UARTE3 instance.
#ifndef NRFX_UARTE3_ENABLED
#define NRFX_UARTE3_ENABLED 1
#endif
diff --git a/third_party/NordicSemiconductor/nrfx/templates/nrfx_glue.h b/third_party/NordicSemiconductor/nrfx/templates/nrfx_glue.h
index 004d61d..16c1f30 100644
--- a/third_party/NordicSemiconductor/nrfx/templates/nrfx_glue.h
+++ b/third_party/NordicSemiconductor/nrfx/templates/nrfx_glue.h
@@ -60,14 +60,14 @@
/**
* @brief Macro for placing a runtime assertion.
*
- * @param expression Expression to evaluate.
+ * @param expression Expression to be evaluated.
*/
#define NRFX_ASSERT(expression)
/**
* @brief Macro for placing a compile time assertion.
*
- * @param expression Expression to evaluate.
+ * @param expression Expression to be evaluated.
*/
#define NRFX_STATIC_ASSERT(expression)
@@ -76,22 +76,22 @@
/**
* @brief Macro for setting the priority of a specific IRQ.
*
- * @param irq_number IRQ number.
- * @param priority Priority to set.
+ * @param irq_number IRQ number.
+ * @param priority Priority to be set.
*/
#define NRFX_IRQ_PRIORITY_SET(irq_number, priority)
/**
* @brief Macro for enabling a specific IRQ.
*
- * @param irq_number IRQ number.
+ * @param irq_number IRQ number.
*/
#define NRFX_IRQ_ENABLE(irq_number)
/**
* @brief Macro for checking if a specific IRQ is enabled.
*
- * @param irq_number IRQ number.
+ * @param irq_number IRQ number.
*
* @retval true If the IRQ is enabled.
* @retval false Otherwise.
@@ -101,21 +101,21 @@
/**
* @brief Macro for disabling a specific IRQ.
*
- * @param irq_number IRQ number.
+ * @param irq_number IRQ number.
*/
#define NRFX_IRQ_DISABLE(irq_number)
/**
* @brief Macro for setting a specific IRQ as pending.
*
- * @param irq_number IRQ number.
+ * @param irq_number IRQ number.
*/
#define NRFX_IRQ_PENDING_SET(irq_number)
/**
* @brief Macro for clearing the pending status of a specific IRQ.
*
- * @param irq_number IRQ number.
+ * @param irq_number IRQ number.
*/
#define NRFX_IRQ_PENDING_CLEAR(irq_number)
@@ -127,14 +127,10 @@
*/
#define NRFX_IRQ_IS_PENDING(irq_number)
-/**
- * @brief Macro for entering into a critical section.
- */
+/** @brief Macro for entering into a critical section. */
#define NRFX_CRITICAL_SECTION_ENTER()
-/**
- * @brief Macro for exiting from a critical section.
- */
+/** @brief Macro for exiting from a critical section. */
#define NRFX_CRITICAL_SECTION_EXIT()
//------------------------------------------------------------------------------
@@ -156,16 +152,14 @@
//------------------------------------------------------------------------------
-/**
- * @brief Atomic 32-bit unsigned type.
- */
+/** @brief Atomic 32-bit unsigned type. */
#define nrfx_atomic_t
/**
* @brief Macro for storing a value to an atomic object and returning its previous value.
*
- * @param[in] p_data Atomic memory pointer.
- * @param[in] value Value to store.
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value Value to store.
*
* @return Previous value of the atomic object.
*/
@@ -174,8 +168,8 @@
/**
* @brief Macro for running a bitwise OR operation on an atomic object and returning its previous value.
*
- * @param[in] p_data Atomic memory pointer.
- * @param[in] value Value of the second operand in the OR operation.
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value Value of the second operand in the OR operation.
*
* @return Previous value of the atomic object.
*/
@@ -185,8 +179,8 @@
* @brief Macro for running a bitwise AND operation on an atomic object
* and returning its previous value.
*
- * @param[in] p_data Atomic memory pointer.
- * @param[in] value Value of the second operand in the AND operation.
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value Value of the second operand in the AND operation.
*
* @return Previous value of the atomic object.
*/
@@ -196,8 +190,8 @@
* @brief Macro for running a bitwise XOR operation on an atomic object
* and returning its previous value.
*
- * @param[in] p_data Atomic memory pointer.
- * @param[in] value Value of the second operand in the XOR operation.
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value Value of the second operand in the XOR operation.
*
* @return Previous value of the atomic object.
*/
@@ -207,8 +201,8 @@
* @brief Macro for running an addition operation on an atomic object
* and returning its previous value.
*
- * @param[in] p_data Atomic memory pointer.
- * @param[in] value Value of the second operand in the ADD operation.
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value Value of the second operand in the ADD operation.
*
* @return Previous value of the atomic object.
*/
@@ -218,8 +212,8 @@
* @brief Macro for running a subtraction operation on an atomic object
* and returning its previous value.
*
- * @param[in] p_data Atomic memory pointer.
- * @param[in] value Value of the second operand in the SUB operation.
+ * @param[in] p_data Atomic memory pointer.
+ * @param[in] value Value of the second operand in the SUB operation.
*
* @return Previous value of the atomic object.
*/
@@ -237,34 +231,22 @@
//------------------------------------------------------------------------------
-/**
- * @brief Bitmask defining DPPI channels reserved to be used outside of nrfx.
- */
+/** @brief Bitmask that defines DPPI channels that are reserved for use outside of the nrfx library. */
#define NRFX_DPPI_CHANNELS_USED 0
-/**
- * @brief Bitmask defining DPPI groups reserved to be used outside of nrfx.
- */
+/** @brief Bitmask that defines DPPI groups that are reserved for use outside of the nrfx library. */
#define NRFX_DPPI_GROUPS_USED 0
-/**
- * @brief Bitmask defining PPI channels reserved to be used outside of nrfx.
- */
+/** @brief Bitmask that defines PPI channels that are reserved for use outside of the nrfx library. */
#define NRFX_PPI_CHANNELS_USED 0
-/**
- * @brief Bitmask defining PPI groups reserved to be used outside of nrfx.
- */
+/** @brief Bitmask that defines PPI groups that are reserved for use outside of the nrfx library. */
#define NRFX_PPI_GROUPS_USED 0
-/**
- * @brief Bitmask defining SWI instances reserved to be used outside of nrfx.
- */
+/** @brief Bitmask that defines SWI instances that are reserved for use outside of the nrfx library. */
#define NRFX_SWI_USED 0
-/**
- * @brief Bitmask defining TIMER instances reserved to be used outside of nrfx.
- */
+/** @brief Bitmask that defines TIMER instances that are reserved for use outside of the nrfx library. */
#define NRFX_TIMERS_USED 0
/** @} */
diff --git a/third_party/NordicSemiconductor/nrfx/templates/nrfx_log.h b/third_party/NordicSemiconductor/nrfx/templates/nrfx_log.h
index a2710be..3bc1b42 100644
--- a/third_party/NordicSemiconductor/nrfx/templates/nrfx_log.h
+++ b/third_party/NordicSemiconductor/nrfx/templates/nrfx_log.h
@@ -54,32 +54,32 @@
/**
* @brief Macro for logging a message with the severity level ERROR.
*
- * @param format printf-style format string, optionally followed by arguments
- * to be formatted and inserted in the resulting string.
+ * @param format printf-style format string, optionally followed by arguments
+ * to be formatted and inserted in the resulting string.
*/
#define NRFX_LOG_ERROR(format, ...)
/**
* @brief Macro for logging a message with the severity level WARNING.
*
- * @param format printf-style format string, optionally followed by arguments
- * to be formatted and inserted in the resulting string.
+ * @param format printf-style format string, optionally followed by arguments
+ * to be formatted and inserted in the resulting string.
*/
#define NRFX_LOG_WARNING(format, ...)
/**
* @brief Macro for logging a message with the severity level INFO.
*
- * @param format printf-style format string, optionally followed by arguments
- * to be formatted and inserted in the resulting string.
+ * @param format printf-style format string, optionally followed by arguments
+ * to be formatted and inserted in the resulting string.
*/
#define NRFX_LOG_INFO(format, ...)
/**
* @brief Macro for logging a message with the severity level DEBUG.
*
- * @param format printf-style format string, optionally followed by arguments
- * to be formatted and inserted in the resulting string.
+ * @param format printf-style format string, optionally followed by arguments
+ * to be formatted and inserted in the resulting string.
*/
#define NRFX_LOG_DEBUG(format, ...)
@@ -87,32 +87,32 @@
/**
* @brief Macro for logging a memory dump with the severity level ERROR.
*
- * @param[in] p_memory Pointer to the memory region to be dumped.
- * @param[in] length Length of the memory region in bytes.
+ * @param[in] p_memory Pointer to the memory region to be dumped.
+ * @param[in] length Length of the memory region in bytes.
*/
#define NRFX_LOG_HEXDUMP_ERROR(p_memory, length)
/**
* @brief Macro for logging a memory dump with the severity level WARNING.
*
- * @param[in] p_memory Pointer to the memory region to be dumped.
- * @param[in] length Length of the memory region in bytes.
+ * @param[in] p_memory Pointer to the memory region to be dumped.
+ * @param[in] length Length of the memory region in bytes.
*/
#define NRFX_LOG_HEXDUMP_WARNING(p_memory, length)
/**
* @brief Macro for logging a memory dump with the severity level INFO.
*
- * @param[in] p_memory Pointer to the memory region to be dumped.
- * @param[in] length Length of the memory region in bytes.
+ * @param[in] p_memory Pointer to the memory region to be dumped.
+ * @param[in] length Length of the memory region in bytes.
*/
#define NRFX_LOG_HEXDUMP_INFO(p_memory, length)
/**
* @brief Macro for logging a memory dump with the severity level DEBUG.
*
- * @param[in] p_memory Pointer to the memory region to be dumped.
- * @param[in] length Length of the memory region in bytes.
+ * @param[in] p_memory Pointer to the memory region to be dumped.
+ * @param[in] length Length of the memory region in bytes.
*/
#define NRFX_LOG_HEXDUMP_DEBUG(p_memory, length)
@@ -120,7 +120,7 @@
/**
* @brief Macro for getting the textual representation of a given error code.
*
- * @param[in] error_code Error code.
+ * @param[in] error_code Error code.
*
* @return String containing the textual representation of the error code.
*/
diff --git a/third_party/NordicSemiconductor/softdevice/s140/doc/s140_nrf52_6.1.0_migration-document.pdf b/third_party/NordicSemiconductor/softdevice/s140/doc/s140_nrf52_6.1.0_migration-document.pdf
deleted file mode 100644
index 2093d0c..0000000
--- a/third_party/NordicSemiconductor/softdevice/s140/doc/s140_nrf52_6.1.0_migration-document.pdf
+++ /dev/null
Binary files differ
diff --git a/third_party/NordicSemiconductor/softdevice/s140/doc/s140_nrf52_6.1.1_license-agreement.txt b/third_party/NordicSemiconductor/softdevice/s140/doc/s140_nrf52_6.1.1_license-agreement.txt
deleted file mode 100644
index 2d1bc12..0000000
--- a/third_party/NordicSemiconductor/softdevice/s140/doc/s140_nrf52_6.1.1_license-agreement.txt
+++ /dev/null
@@ -1,35 +0,0 @@
-Copyright (c) 2007 - 2018, Nordic Semiconductor ASA
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-1. Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
-
-2. Redistributions in binary form, except as embedded into a Nordic
- Semiconductor ASA integrated circuit in a product or a software update for
- such product, must reproduce the above copyright notice, this list of
- conditions and the following disclaimer in the documentation and/or other
- materials provided with the distribution.
-
-3. Neither the name of Nordic Semiconductor ASA nor the names of its
- contributors may be used to endorse or promote products derived from this
- software without specific prior written permission.
-
-4. This software, with or without modification, must only be used with a
- Nordic Semiconductor ASA integrated circuit.
-
-5. Any software provided in binary form under this license must not be reverse
- engineered, decompiled, modified and/or disassembled.
-
-THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
-OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
-OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
-LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
-GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
-OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
diff --git a/third_party/NordicSemiconductor/softdevice/s140/doc/s140_nrf52_6.1.1_release-notes.pdf b/third_party/NordicSemiconductor/softdevice/s140/doc/s140_nrf52_6.1.1_release-notes.pdf
deleted file mode 100644
index 4d50bcb..0000000
--- a/third_party/NordicSemiconductor/softdevice/s140/doc/s140_nrf52_6.1.1_release-notes.pdf
+++ /dev/null
Binary files differ
diff --git a/third_party/NordicSemiconductor/softdevice/s140/doc/s140_nrf52_7.0.1_licence-agreement.txt b/third_party/NordicSemiconductor/softdevice/s140/doc/s140_nrf52_7.0.1_licence-agreement.txt
new file mode 100644
index 0000000..9225328
--- /dev/null
+++ b/third_party/NordicSemiconductor/softdevice/s140/doc/s140_nrf52_7.0.1_licence-agreement.txt
@@ -0,0 +1,35 @@
+Copyright (c) 2007 - 2019, Nordic Semiconductor ASA
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+
+2. Redistributions in binary form, except as embedded into a Nordic
+ Semiconductor ASA integrated circuit in a product or a software update for
+ such product, must reproduce the above copyright notice, this list of
+ conditions and the following disclaimer in the documentation and/or other
+ materials provided with the distribution.
+
+3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ contributors may be used to endorse or promote products derived from this
+ software without specific prior written permission.
+
+4. This software, with or without modification, must only be used with a
+ Nordic Semiconductor ASA integrated circuit.
+
+5. Any software provided in binary form under this license must not be reverse
+ engineered, decompiled, modified and/or disassembled.
+
+THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
diff --git a/third_party/NordicSemiconductor/softdevice/s140/doc/s140_nrf52_7.0.1_migration-document.pdf b/third_party/NordicSemiconductor/softdevice/s140/doc/s140_nrf52_7.0.1_migration-document.pdf
new file mode 100644
index 0000000..350288c
--- /dev/null
+++ b/third_party/NordicSemiconductor/softdevice/s140/doc/s140_nrf52_7.0.1_migration-document.pdf
Binary files differ
diff --git a/third_party/NordicSemiconductor/softdevice/s140/doc/s140_nrf52_7.0.1_release-notes.pdf b/third_party/NordicSemiconductor/softdevice/s140/doc/s140_nrf52_7.0.1_release-notes.pdf
new file mode 100644
index 0000000..2856121
--- /dev/null
+++ b/third_party/NordicSemiconductor/softdevice/s140/doc/s140_nrf52_7.0.1_release-notes.pdf
Binary files differ
diff --git a/third_party/NordicSemiconductor/softdevice/s140/headers/ble.h b/third_party/NordicSemiconductor/softdevice/s140/headers/ble.h
index 76a432b..c4c722d 100644
--- a/third_party/NordicSemiconductor/softdevice/s140/headers/ble.h
+++ b/third_party/NordicSemiconductor/softdevice/s140/headers/ble.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA
+ * Copyright (c) 2012 - 2019, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
@@ -123,7 +123,6 @@
BLE_COMMON_OPT_PA_LNA = BLE_OPT_BASE + 0, /**< PA and LNA options */
BLE_COMMON_OPT_CONN_EVT_EXT = BLE_OPT_BASE + 1, /**< Extended connection events option */
BLE_COMMON_OPT_EXTENDED_RC_CAL = BLE_OPT_BASE + 2, /**< Extended RC calibration option */
- BLE_COMMON_OPT_ADV_SCHED_CFG = BLE_OPT_BASE + 3, /**< Advertiser role scheduling configuration option */
};
/** @} */
@@ -147,12 +146,6 @@
offsetof(ble_evt_t, evt.gattc_evt.params.prim_srvc_disc_rsp.services) + ((ATT_MTU) - 1) / 4 * sizeof(ble_gattc_service_t) \
)
-/** @defgroup ADV_SCHED_CFG Advertiser Role Scheduling Configuration
- * @{ */
-#define ADV_SCHED_CFG_DEFAULT 0 /**< Default advertiser role scheduling configuration. */
-#define ADV_SCHED_CFG_IMPROVED 1 /**< Improved advertiser role scheduling configuration in which the housekeeping time is reduced. */
-/** @} */
-
/** @defgroup BLE_USER_MEM_TYPES User Memory Types
* @{ */
#define BLE_USER_MEM_TYPE_INVALID 0x00 /**< Invalid User Memory Types. */
@@ -310,23 +303,12 @@
uint8_t enable : 1; /**< Enable extended RC calibration, enabled by default. */
} ble_common_opt_extended_rc_cal_t;
-/**
- * @brief Configuration of BLE advertiser role scheduling.
- *
- * @note @ref sd_ble_opt_get is not supported for this option.
- */
-typedef struct
-{
- uint8_t sched_cfg; /**< See @ref ADV_SCHED_CFG. */
-} ble_common_opt_adv_sched_cfg_t;
-
/**@brief Option structure for common options. */
typedef union
{
ble_common_opt_pa_lna_t pa_lna; /**< Parameters for controlling PA and LNA pin toggling. */
ble_common_opt_conn_evt_ext_t conn_evt_ext; /**< Parameters for enabling extended connection events. */
ble_common_opt_extended_rc_cal_t extended_rc_cal; /**< Parameters for enabling extended RC calibration. */
- ble_common_opt_adv_sched_cfg_t adv_sched_cfg; /**< Parameters for configuring advertiser role scheduling. */
} ble_common_opt_t;
/**@brief Common BLE Option type, wrapping the module specific options. */
@@ -545,18 +527,17 @@
*
* @note Currently this function can only be called with a p_uuid_type set to @ref BLE_UUID_TYPE_UNKNOWN or the last added UUID type.
*
- * @param[in] p_uuid_type Pointer to a uint8_t where the type field in @ref ble_uuid_t::type corresponds to the UUID type that
- * shall be removed. If the type is set to @ref BLE_UUID_TYPE_UNKNOWN, or the pointer is NULL, the last
- * Vendor Specific base UUID will be removed.
- * @param[out] p_uuid_type Pointer to a uint8_t where the type field in @ref ble_uuid_t corresponds to the UUID type that was
- * removed. If function returns with a failure, it contains the last type that is in use by the ATT Server.
+ * @param[inout] p_uuid_type Pointer to a uint8_t where its value matches the UUID type in @ref ble_uuid_t::type to be removed.
+ * If the type is set to @ref BLE_UUID_TYPE_UNKNOWN, or the pointer is NULL, the last Vendor Specific
+ * base UUID will be removed. If the function returns successfully, the UUID type that was removed will
+ * be written back to @p p_uuid_type. If function returns with a failure, it contains the last type that
+ * is in use by the ATT Server.
*
* @retval ::NRF_SUCCESS Successfully removed the Vendor Specific base UUID.
* @retval ::NRF_ERROR_INVALID_ADDR If p_uuid_type is invalid.
* @retval ::NRF_ERROR_INVALID_PARAM If p_uuid_type points to a non-valid UUID type.
* @retval ::NRF_ERROR_FORBIDDEN If the Vendor Specific base UUID is in use by the ATT Server.
*/
-
SVCALL(SD_BLE_UUID_VS_REMOVE, uint32_t, sd_ble_uuid_vs_remove(uint8_t *p_uuid_type));
@@ -638,10 +619,6 @@
*
* @details This call allows the application to set the value of an option.
*
- * @mscs
- * @mmsc{@ref BLE_GAP_PERIPH_BONDING_STATIC_PK_MSC}
- * @endmscs
- *
* @param[in] opt_id Option ID, see @ref BLE_COMMON_OPTS and @ref BLE_GAP_OPTS.
* @param[in] p_opt Pointer to a ble_opt_t structure containing the option value.
*
diff --git a/third_party/NordicSemiconductor/softdevice/s140/headers/ble_gap.h b/third_party/NordicSemiconductor/softdevice/s140/headers/ble_gap.h
index c434fef..d7b069b 100644
--- a/third_party/NordicSemiconductor/softdevice/s140/headers/ble_gap.h
+++ b/third_party/NordicSemiconductor/softdevice/s140/headers/ble_gap.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2011 - 2018, Nordic Semiconductor ASA
+ * Copyright (c) 2011 - 2019, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
@@ -64,46 +64,49 @@
*/
enum BLE_GAP_SVCS
{
- SD_BLE_GAP_ADDR_SET = BLE_GAP_SVC_BASE, /**< Set own Bluetooth Address. */
- SD_BLE_GAP_ADDR_GET = BLE_GAP_SVC_BASE + 1, /**< Get own Bluetooth Address. */
- SD_BLE_GAP_WHITELIST_SET = BLE_GAP_SVC_BASE + 2, /**< Set active whitelist. */
- SD_BLE_GAP_DEVICE_IDENTITIES_SET = BLE_GAP_SVC_BASE + 3, /**< Set device identity list. */
- SD_BLE_GAP_PRIVACY_SET = BLE_GAP_SVC_BASE + 4, /**< Set Privacy settings*/
- SD_BLE_GAP_PRIVACY_GET = BLE_GAP_SVC_BASE + 5, /**< Get Privacy settings*/
- SD_BLE_GAP_ADV_SET_CONFIGURE = BLE_GAP_SVC_BASE + 6, /**< Configure an advertising set. */
- SD_BLE_GAP_ADV_START = BLE_GAP_SVC_BASE + 7, /**< Start Advertising. */
- SD_BLE_GAP_ADV_STOP = BLE_GAP_SVC_BASE + 8, /**< Stop Advertising. */
- SD_BLE_GAP_CONN_PARAM_UPDATE = BLE_GAP_SVC_BASE + 9, /**< Connection Parameter Update. */
- SD_BLE_GAP_DISCONNECT = BLE_GAP_SVC_BASE + 10, /**< Disconnect. */
- SD_BLE_GAP_TX_POWER_SET = BLE_GAP_SVC_BASE + 11, /**< Set TX Power. */
- SD_BLE_GAP_APPEARANCE_SET = BLE_GAP_SVC_BASE + 12, /**< Set Appearance. */
- SD_BLE_GAP_APPEARANCE_GET = BLE_GAP_SVC_BASE + 13, /**< Get Appearance. */
- SD_BLE_GAP_PPCP_SET = BLE_GAP_SVC_BASE + 14, /**< Set PPCP. */
- SD_BLE_GAP_PPCP_GET = BLE_GAP_SVC_BASE + 15, /**< Get PPCP. */
- SD_BLE_GAP_DEVICE_NAME_SET = BLE_GAP_SVC_BASE + 16, /**< Set Device Name. */
- SD_BLE_GAP_DEVICE_NAME_GET = BLE_GAP_SVC_BASE + 17, /**< Get Device Name. */
- SD_BLE_GAP_AUTHENTICATE = BLE_GAP_SVC_BASE + 18, /**< Initiate Pairing/Bonding. */
- SD_BLE_GAP_SEC_PARAMS_REPLY = BLE_GAP_SVC_BASE + 19, /**< Reply with Security Parameters. */
- SD_BLE_GAP_AUTH_KEY_REPLY = BLE_GAP_SVC_BASE + 20, /**< Reply with an authentication key. */
- SD_BLE_GAP_LESC_DHKEY_REPLY = BLE_GAP_SVC_BASE + 21, /**< Reply with an LE Secure Connections DHKey. */
- SD_BLE_GAP_KEYPRESS_NOTIFY = BLE_GAP_SVC_BASE + 22, /**< Notify of a keypress during an authentication procedure. */
- SD_BLE_GAP_LESC_OOB_DATA_GET = BLE_GAP_SVC_BASE + 23, /**< Get the local LE Secure Connections OOB data. */
- SD_BLE_GAP_LESC_OOB_DATA_SET = BLE_GAP_SVC_BASE + 24, /**< Set the remote LE Secure Connections OOB data. */
- SD_BLE_GAP_ENCRYPT = BLE_GAP_SVC_BASE + 25, /**< Initiate encryption procedure. */
- SD_BLE_GAP_SEC_INFO_REPLY = BLE_GAP_SVC_BASE + 26, /**< Reply with Security Information. */
- SD_BLE_GAP_CONN_SEC_GET = BLE_GAP_SVC_BASE + 27, /**< Obtain connection security level. */
- SD_BLE_GAP_RSSI_START = BLE_GAP_SVC_BASE + 28, /**< Start reporting of changes in RSSI. */
- SD_BLE_GAP_RSSI_STOP = BLE_GAP_SVC_BASE + 29, /**< Stop reporting of changes in RSSI. */
- SD_BLE_GAP_SCAN_START = BLE_GAP_SVC_BASE + 30, /**< Start Scanning. */
- SD_BLE_GAP_SCAN_STOP = BLE_GAP_SVC_BASE + 31, /**< Stop Scanning. */
- SD_BLE_GAP_CONNECT = BLE_GAP_SVC_BASE + 32, /**< Connect. */
- SD_BLE_GAP_CONNECT_CANCEL = BLE_GAP_SVC_BASE + 33, /**< Cancel ongoing connection procedure. */
- SD_BLE_GAP_RSSI_GET = BLE_GAP_SVC_BASE + 34, /**< Get the last RSSI sample. */
- SD_BLE_GAP_PHY_UPDATE = BLE_GAP_SVC_BASE + 35, /**< Initiate or respond to a PHY Update Procedure. */
- SD_BLE_GAP_DATA_LENGTH_UPDATE = BLE_GAP_SVC_BASE + 36, /**< Initiate or respond to a Data Length Update Procedure. */
- SD_BLE_GAP_QOS_CHANNEL_SURVEY_START = BLE_GAP_SVC_BASE + 37, /**< Start Quality of Service (QoS) channel survey module. */
- SD_BLE_GAP_QOS_CHANNEL_SURVEY_STOP = BLE_GAP_SVC_BASE + 38, /**< Stop Quality of Service (QoS) channel survey module. */
- SD_BLE_GAP_ADV_ADDR_GET = BLE_GAP_SVC_BASE + 39, /**< Get the Address used on air while Advertising. */
+ SD_BLE_GAP_ADDR_SET = BLE_GAP_SVC_BASE, /**< Set own Bluetooth Address. */
+ SD_BLE_GAP_ADDR_GET = BLE_GAP_SVC_BASE + 1, /**< Get own Bluetooth Address. */
+ SD_BLE_GAP_WHITELIST_SET = BLE_GAP_SVC_BASE + 2, /**< Set active whitelist. */
+ SD_BLE_GAP_DEVICE_IDENTITIES_SET = BLE_GAP_SVC_BASE + 3, /**< Set device identity list. */
+ SD_BLE_GAP_PRIVACY_SET = BLE_GAP_SVC_BASE + 4, /**< Set Privacy settings*/
+ SD_BLE_GAP_PRIVACY_GET = BLE_GAP_SVC_BASE + 5, /**< Get Privacy settings*/
+ SD_BLE_GAP_ADV_SET_CONFIGURE = BLE_GAP_SVC_BASE + 6, /**< Configure an advertising set. */
+ SD_BLE_GAP_ADV_START = BLE_GAP_SVC_BASE + 7, /**< Start Advertising. */
+ SD_BLE_GAP_ADV_STOP = BLE_GAP_SVC_BASE + 8, /**< Stop Advertising. */
+ SD_BLE_GAP_CONN_PARAM_UPDATE = BLE_GAP_SVC_BASE + 9, /**< Connection Parameter Update. */
+ SD_BLE_GAP_DISCONNECT = BLE_GAP_SVC_BASE + 10, /**< Disconnect. */
+ SD_BLE_GAP_TX_POWER_SET = BLE_GAP_SVC_BASE + 11, /**< Set TX Power. */
+ SD_BLE_GAP_APPEARANCE_SET = BLE_GAP_SVC_BASE + 12, /**< Set Appearance. */
+ SD_BLE_GAP_APPEARANCE_GET = BLE_GAP_SVC_BASE + 13, /**< Get Appearance. */
+ SD_BLE_GAP_PPCP_SET = BLE_GAP_SVC_BASE + 14, /**< Set PPCP. */
+ SD_BLE_GAP_PPCP_GET = BLE_GAP_SVC_BASE + 15, /**< Get PPCP. */
+ SD_BLE_GAP_DEVICE_NAME_SET = BLE_GAP_SVC_BASE + 16, /**< Set Device Name. */
+ SD_BLE_GAP_DEVICE_NAME_GET = BLE_GAP_SVC_BASE + 17, /**< Get Device Name. */
+ SD_BLE_GAP_AUTHENTICATE = BLE_GAP_SVC_BASE + 18, /**< Initiate Pairing/Bonding. */
+ SD_BLE_GAP_SEC_PARAMS_REPLY = BLE_GAP_SVC_BASE + 19, /**< Reply with Security Parameters. */
+ SD_BLE_GAP_AUTH_KEY_REPLY = BLE_GAP_SVC_BASE + 20, /**< Reply with an authentication key. */
+ SD_BLE_GAP_LESC_DHKEY_REPLY = BLE_GAP_SVC_BASE + 21, /**< Reply with an LE Secure Connections DHKey. */
+ SD_BLE_GAP_KEYPRESS_NOTIFY = BLE_GAP_SVC_BASE + 22, /**< Notify of a keypress during an authentication procedure. */
+ SD_BLE_GAP_LESC_OOB_DATA_GET = BLE_GAP_SVC_BASE + 23, /**< Get the local LE Secure Connections OOB data. */
+ SD_BLE_GAP_LESC_OOB_DATA_SET = BLE_GAP_SVC_BASE + 24, /**< Set the remote LE Secure Connections OOB data. */
+ SD_BLE_GAP_ENCRYPT = BLE_GAP_SVC_BASE + 25, /**< Initiate encryption procedure. */
+ SD_BLE_GAP_SEC_INFO_REPLY = BLE_GAP_SVC_BASE + 26, /**< Reply with Security Information. */
+ SD_BLE_GAP_CONN_SEC_GET = BLE_GAP_SVC_BASE + 27, /**< Obtain connection security level. */
+ SD_BLE_GAP_RSSI_START = BLE_GAP_SVC_BASE + 28, /**< Start reporting of changes in RSSI. */
+ SD_BLE_GAP_RSSI_STOP = BLE_GAP_SVC_BASE + 29, /**< Stop reporting of changes in RSSI. */
+ SD_BLE_GAP_SCAN_START = BLE_GAP_SVC_BASE + 30, /**< Start Scanning. */
+ SD_BLE_GAP_SCAN_STOP = BLE_GAP_SVC_BASE + 31, /**< Stop Scanning. */
+ SD_BLE_GAP_CONNECT = BLE_GAP_SVC_BASE + 32, /**< Connect. */
+ SD_BLE_GAP_CONNECT_CANCEL = BLE_GAP_SVC_BASE + 33, /**< Cancel ongoing connection procedure. */
+ SD_BLE_GAP_RSSI_GET = BLE_GAP_SVC_BASE + 34, /**< Get the last RSSI sample. */
+ SD_BLE_GAP_PHY_UPDATE = BLE_GAP_SVC_BASE + 35, /**< Initiate or respond to a PHY Update Procedure. */
+ SD_BLE_GAP_DATA_LENGTH_UPDATE = BLE_GAP_SVC_BASE + 36, /**< Initiate or respond to a Data Length Update Procedure. */
+ SD_BLE_GAP_QOS_CHANNEL_SURVEY_START = BLE_GAP_SVC_BASE + 37, /**< Start Quality of Service (QoS) channel survey module. */
+ SD_BLE_GAP_QOS_CHANNEL_SURVEY_STOP = BLE_GAP_SVC_BASE + 38, /**< Stop Quality of Service (QoS) channel survey module. */
+ SD_BLE_GAP_ADV_ADDR_GET = BLE_GAP_SVC_BASE + 39, /**< Get the Address used on air while Advertising. */
+ SD_BLE_GAP_NEXT_CONN_EVT_COUNTER_GET = BLE_GAP_SVC_BASE + 40, /**< Get the next connection event counter. */
+ SD_BLE_GAP_CONN_EVT_TRIGGER_START = BLE_GAP_SVC_BASE + 41, /** Start triggering a given task on connection event start. */
+ SD_BLE_GAP_CONN_EVT_TRIGGER_STOP = BLE_GAP_SVC_BASE + 42, /** Stop triggering the task configured using @ref sd_ble_gap_conn_evt_trigger_start. */
};
/**@brief GAP Event IDs.
@@ -130,7 +133,7 @@
BLE_GAP_EVT_SCAN_REQ_REPORT = BLE_GAP_EVT_BASE + 16, /**< Scan request report. \n See @ref ble_gap_evt_scan_req_report_t. */
BLE_GAP_EVT_PHY_UPDATE_REQUEST = BLE_GAP_EVT_BASE + 17, /**< PHY Update Request. \n Reply with @ref sd_ble_gap_phy_update. \n See @ref ble_gap_evt_phy_update_request_t. */
BLE_GAP_EVT_PHY_UPDATE = BLE_GAP_EVT_BASE + 18, /**< PHY Update Procedure is complete. \n See @ref ble_gap_evt_phy_update_t. */
- BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST = BLE_GAP_EVT_BASE + 19, /**< Data Length Update Request. \n Reply with @ref sd_ble_gap_data_length_update.\n See @ref ble_gap_evt_data_length_update_request_t. */
+ BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST = BLE_GAP_EVT_BASE + 19, /**< Data Length Update Request. \n Reply with @ref sd_ble_gap_data_length_update. \n See @ref ble_gap_evt_data_length_update_request_t. */
BLE_GAP_EVT_DATA_LENGTH_UPDATE = BLE_GAP_EVT_BASE + 20, /**< LL Data Channel PDU payload length updated. \n See @ref ble_gap_evt_data_length_update_t. */
BLE_GAP_EVT_QOS_CHANNEL_SURVEY_REPORT = BLE_GAP_EVT_BASE + 21, /**< Channel survey report. \n See @ref ble_gap_evt_qos_channel_survey_report_t. */
BLE_GAP_EVT_ADV_SET_TERMINATED = BLE_GAP_EVT_BASE + 22, /**< Advertising set terminated. \n See @ref ble_gap_evt_adv_set_terminated_t. */
@@ -155,8 +158,12 @@
*/
enum BLE_GAP_CFGS
{
- BLE_GAP_CFG_ROLE_COUNT = BLE_GAP_CFG_BASE, /**< Role count configuration. */
- BLE_GAP_CFG_DEVICE_NAME = BLE_GAP_CFG_BASE + 1, /**< Device name configuration. */
+ BLE_GAP_CFG_ROLE_COUNT = BLE_GAP_CFG_BASE, /**< Role count configuration. */
+ BLE_GAP_CFG_DEVICE_NAME = BLE_GAP_CFG_BASE + 1, /**< Device name configuration. */
+ BLE_GAP_CFG_PPCP_INCL_CONFIG = BLE_GAP_CFG_BASE + 2, /**< Peripheral Preferred Connection Parameters characteristic
+ inclusion configuration. */
+ BLE_GAP_CFG_CAR_INCL_CONFIG = BLE_GAP_CFG_BASE + 3, /**< Central Address Resolution characteristic
+ inclusion configuration. */
};
/**@brief GAP TX Power roles.
@@ -646,6 +653,27 @@
/** @} */
+/** @defgroup BLE_GAP_CHAR_INCL_CONFIG GAP Characteristic inclusion configurations
+ * @{
+ */
+#define BLE_GAP_CHAR_INCL_CONFIG_INCLUDE (0) /**< Include the characteristic in the Attribute Table */
+#define BLE_GAP_CHAR_INCL_CONFIG_EXCLUDE_WITH_SPACE (1) /**< Do not include the characteristic in the Attribute table.
+ The SoftDevice will reserve the attribute handles
+ which are otherwise used for this characteristic.
+ By reserving the attribute handles it will be possible
+ to upgrade the SoftDevice without changing handle of the
+ Service Changed characteristic. */
+#define BLE_GAP_CHAR_INCL_CONFIG_EXCLUDE_WITHOUT_SPACE (2) /**< Do not include the characteristic in the Attribute table.
+ The SoftDevice will not reserve the attribute handles
+ which are otherwise used for this characteristic. */
+/**@} */
+
+
+/** @defgroup BLE_GAP_CHAR_INCL_CONFIG_DEFAULTS Characteristic inclusion default values
+ * @{ */
+#define BLE_GAP_PPCP_INCL_CONFIG_DEFAULT (BLE_GAP_CHAR_INCL_CONFIG_INCLUDE) /**< Included by default. */
+#define BLE_GAP_CAR_INCL_CONFIG_DEFAULT (BLE_GAP_CHAR_INCL_CONFIG_INCLUDE) /**< Included by default. */
+/**@} */
/**@addtogroup BLE_GAP_STRUCTURES Structures
* @{ */
@@ -1315,7 +1343,10 @@
ble_gap_data_length_params_t peer_params; /**< Peer data length parameters. */
} ble_gap_evt_data_length_update_request_t;
-/**@brief Event structure for @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE. */
+/**@brief Event structure for @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE.
+ *
+ * @note This event may also be raised after a PHY Update procedure.
+ */
typedef struct
{
ble_gap_data_length_params_t effective_params; /**< The effective data length parameters. */
@@ -1445,11 +1476,31 @@
} ble_gap_cfg_device_name_t;
+/**@brief Peripheral Preferred Connection Parameters include configuration parameters, set with @ref sd_ble_cfg_set. */
+typedef struct
+{
+ uint8_t include_cfg; /**< Inclusion configuration of the Peripheral Preferred Connection Parameters characteristic.
+ See @ref BLE_GAP_CHAR_INCL_CONFIG. Default is @ref BLE_GAP_PPCP_INCL_CONFIG_DEFAULT. */
+} ble_gap_cfg_ppcp_incl_cfg_t;
+
+
+/**@brief Central Address Resolution include configuration parameters, set with @ref sd_ble_cfg_set. */
+typedef struct
+{
+ uint8_t include_cfg; /**< Inclusion configuration of the Central Address Resolution characteristic.
+ See @ref BLE_GAP_CHAR_INCL_CONFIG. Default is @ref BLE_GAP_CAR_INCL_CONFIG_DEFAULT. */
+} ble_gap_cfg_car_incl_cfg_t;
+
+
/**@brief Configuration structure for GAP configurations. */
typedef union
{
- ble_gap_cfg_role_count_t role_count_cfg; /**< Role count configuration, cfg_id is @ref BLE_GAP_CFG_ROLE_COUNT. */
- ble_gap_cfg_device_name_t device_name_cfg; /**< Device name configuration, cfg_id is @ref BLE_GAP_CFG_DEVICE_NAME. */
+ ble_gap_cfg_role_count_t role_count_cfg; /**< Role count configuration, cfg_id is @ref BLE_GAP_CFG_ROLE_COUNT. */
+ ble_gap_cfg_device_name_t device_name_cfg; /**< Device name configuration, cfg_id is @ref BLE_GAP_CFG_DEVICE_NAME. */
+ ble_gap_cfg_ppcp_incl_cfg_t ppcp_include_cfg; /**< Peripheral Preferred Connection Parameters characteristic include
+ configuration, cfg_id is @ref BLE_GAP_CFG_PPCP_INCL_CONFIG. */
+ ble_gap_cfg_car_incl_cfg_t car_include_cfg; /**< Central Address Resolution characteristic include configuration,
+ cfg_id is @ref BLE_GAP_CFG_CAR_INCL_CONFIG. */
} ble_gap_cfg_t;
@@ -1532,6 +1583,10 @@
/**@brief Passkey Option.
*
+ * @mscs
+ * @mmsc{@ref BLE_GAP_PERIPH_BONDING_STATIC_PK_MSC}
+ * @endmscs
+ *
* @details Structure containing the passkey to be used during pairing. This can be used with @ref
* sd_ble_opt_set to make the SoftDevice use a preprogrammed passkey for authentication
* instead of generating a random one.
@@ -1603,8 +1658,22 @@
ble_gap_opt_auth_payload_timeout_t auth_payload_timeout; /**< Parameters for the authenticated payload timeout option.*/
ble_gap_opt_slave_latency_disable_t slave_latency_disable; /**< Parameters for the Disable slave latency option */
} ble_gap_opt_t;
-/**@} */
+/**@brief Connection event triggering parameters. */
+typedef struct
+{
+ uint8_t ppi_ch_id; /**< PPI channel to use. This channel should be regarded as reserved until
+ connection event PPI task triggering is stopped.
+ The PPI channel ID can not be one of the PPI channels reserved by
+ the SoftDevice. See @ref NRF_SOC_SD_PPI_CHANNELS_SD_ENABLED_MSK. */
+ uint32_t task_endpoint; /**< Task Endpoint to trigger. */
+ uint16_t conn_evt_counter_start; /**< The connection event on which the task triggering should start. */
+ uint16_t period_in_events; /**< Trigger period. Valid range is [1, 32767].
+ If the device is in slave role and slave latency is enabled,
+ this parameter should be set to a multiple of (slave latency + 1)
+ to ensure low power operation. */
+} ble_gap_conn_event_trigger_t;
+/**@} */
/**@addtogroup BLE_GAP_FUNCTIONS Functions
* @{ */
@@ -1747,6 +1816,10 @@
* @retval ::NRF_ERROR_INVALID_ADDR The pointer to privacy settings is NULL or invalid.
* Otherwise, the p_device_irk pointer in privacy parameter is an invalid pointer.
* @retval ::NRF_ERROR_INVALID_PARAM Out of range parameters are provided.
+ * @retval ::NRF_ERROR_NOT_SUPPORTED The SoftDevice does not support privacy if the Central Address Resolution
+ characteristic is not configured to be included and the SoftDevice is configured
+ to support central roles.
+ See @ref ble_gap_cfg_car_incl_cfg_t and @ref ble_gap_cfg_role_count_t.
* @retval ::NRF_ERROR_INVALID_STATE Privacy settings cannot be changed while advertising, scanning
* or creating a connection.
*/
@@ -1838,7 +1911,10 @@
*
* @retval ::NRF_SUCCESS The BLE stack has started advertising.
* @retval ::NRF_ERROR_INVALID_STATE adv_handle is not configured or already advertising.
- * @retval ::NRF_ERROR_CONN_COUNT The limit of available connections has been reached; connectable advertiser cannot be started.
+ * @retval ::NRF_ERROR_CONN_COUNT The limit of available connections for this connection configuration
+ * tag has been reached; connectable advertiser cannot be started.
+ * To increase the number of available connections,
+ * use @ref sd_ble_cfg_set with @ref BLE_GAP_CFG_ROLE_COUNT or @ref BLE_CONN_CFG_GAP.
* @retval ::BLE_ERROR_INVALID_ADV_HANDLE Advertising handle not found. Configure a new adveriting handle with @ref sd_ble_gap_adv_set_configure.
* @retval ::NRF_ERROR_NOT_FOUND conn_cfg_tag not found.
* @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied:
@@ -1987,6 +2063,8 @@
* @retval ::NRF_SUCCESS Peripheral Preferred Connection Parameters set successfully.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
* @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied.
+ * @retval ::NRF_ERROR_NOT_SUPPORTED The characteristic is not included in the Attribute Table,
+ see @ref ble_gap_cfg_ppcp_incl_cfg_t.
*/
SVCALL(SD_BLE_GAP_PPCP_SET, uint32_t, sd_ble_gap_ppcp_set(ble_gap_conn_params_t const *p_conn_params));
@@ -1997,6 +2075,8 @@
*
* @retval ::NRF_SUCCESS Peripheral Preferred Connection Parameters retrieved successfully.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
+ * @retval ::NRF_ERROR_NOT_SUPPORTED The characteristic is not included in the Attribute Table,
+ see @ref ble_gap_cfg_ppcp_incl_cfg_t.
*/
SVCALL(SD_BLE_GAP_PPCP_GET, uint32_t, sd_ble_gap_ppcp_get(ble_gap_conn_params_t *p_conn_params));
@@ -2083,6 +2163,10 @@
* @retval ::NRF_ERROR_NO_MEM The maximum number of authentication procedures that can run in parallel for the given role is reached.
* @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied.
* @retval ::NRF_ERROR_NOT_SUPPORTED Setting of sign or link fields in @ref ble_gap_sec_kdist_t not supported.
+ * Distribution of own Identity Information is only supported if the Central
+ * Address Resolution characteristic is configured to be included or
+ * the Softdevice is configured to support peripheral roles only.
+ * See @ref ble_gap_cfg_car_incl_cfg_t and @ref ble_gap_cfg_role_count_t.
* @retval ::NRF_ERROR_TIMEOUT A SMP timeout has occurred, and further SMP operations on this link is prohibited.
*/
SVCALL(SD_BLE_GAP_AUTHENTICATE, uint32_t, sd_ble_gap_authenticate(uint16_t conn_handle, ble_gap_sec_params_t const *p_sec_params));
@@ -2094,7 +2178,7 @@
* @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters.
*
* @events
- * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.}
+ * @event{This function is used during authentication procedures, see the list of events in the documentation of @ref sd_ble_gap_authenticate.}
* @endevents
*
* @mscs
@@ -2143,6 +2227,10 @@
* @retval ::NRF_ERROR_INVALID_STATE Security parameters has not been requested.
* @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied.
* @retval ::NRF_ERROR_NOT_SUPPORTED Setting of sign or link fields in @ref ble_gap_sec_kdist_t not supported.
+ * Distribution of own Identity Information is only supported if the Central
+ * Address Resolution characteristic is configured to be included or
+ * the Softdevice is configured to support peripheral roles only.
+ * See @ref ble_gap_cfg_car_incl_cfg_t and @ref ble_gap_cfg_role_count_t.
*/
SVCALL(SD_BLE_GAP_SEC_PARAMS_REPLY, uint32_t, sd_ble_gap_sec_params_reply(uint16_t conn_handle, uint8_t sec_status, ble_gap_sec_params_t const *p_sec_params, ble_gap_sec_keyset_t const *p_sec_keyset));
@@ -2341,7 +2429,7 @@
* @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. Either:
* - No link has been established.
* - No @ref BLE_GAP_EVT_SEC_REQUEST pending.
- * - LE long term key requested command not allowed.
+ * - Encryption information provided by the app without being requested. See @ref ble_gap_evt_sec_info_request_t::enc_info.
* @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied.
*/
SVCALL(SD_BLE_GAP_SEC_INFO_REPLY, uint32_t, sd_ble_gap_sec_info_reply(uint16_t conn_handle, ble_gap_enc_info_t const *p_enc_info, ble_gap_irk_t const *p_id_info, ble_gap_sign_info_t const *p_sign_info));
@@ -2527,7 +2615,9 @@
* @retval ::NRF_ERROR_INVALID_STATE The SoftDevice is in an invalid state to perform this operation. This may be due to an
* existing locally initiated connect procedure, which must complete before initiating again.
* @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid Peer address.
- * @retval ::NRF_ERROR_CONN_COUNT The limit of available connections has been reached.
+ * @retval ::NRF_ERROR_CONN_COUNT The limit of available connections for this connection configuration tag has been reached.
+ * To increase the number of available connections,
+ * use @ref sd_ble_cfg_set with @ref BLE_GAP_CFG_ROLE_COUNT or @ref BLE_CONN_CFG_GAP.
* @retval ::NRF_ERROR_RESOURCES Either:
* - Not enough BLE role slots available.
* Stop one or more currently active roles (Central, Peripheral or Observer) and try again.
@@ -2573,12 +2663,12 @@
* @ref BLE_GAP_EVT_PHY_UPDATE event will have a status set to
* @ref BLE_HCI_UNSUPPORTED_REMOTE_FEATURE.
*
- * If the PHY procedure was rejected by the peer due to a procedure collision, the status
+ * If the PHY Update procedure was rejected by the peer due to a procedure collision, the status
* will be @ref BLE_HCI_STATUS_CODE_LMP_ERROR_TRANSACTION_COLLISION or
* @ref BLE_HCI_DIFFERENT_TRANSACTION_COLLISION.
* If the peer responds to the PHY Update procedure with invalid parameters, the status
* will be @ref BLE_HCI_STATUS_CODE_INVALID_LMP_PARAMETERS.
- * If the PHY procedure was rejected by the peer for a different reason, the status will
+ * If the PHY Update procedure was rejected by the peer for a different reason, the status will
* contain the reason as specified by the peer.
*
* @events
@@ -2678,12 +2768,72 @@
/**@brief Stop the Quality of Service (QoS) channel survey module.
*
+ * @note The SoftDevice may generate one @ref BLE_GAP_EVT_QOS_CHANNEL_SURVEY_REPORT event after this
+ * function is called.
+ *
* @retval ::NRF_SUCCESS The module is successfully stopped.
* @retval ::NRF_ERROR_INVALID_STATE Trying to stop the module when it is not running.
*/
SVCALL(SD_BLE_GAP_QOS_CHANNEL_SURVEY_STOP, uint32_t, sd_ble_gap_qos_channel_survey_stop(void));
+/**@brief Obtain the next connection event counter value.
+ *
+ * @details The connection event counter is initialized to zero on the first connection event. The value is incremented
+ * by one for each connection event. For more information see Bluetooth Core Specification v5.0, Vol 6, Part B,
+ * Section 4.5.1.
+ *
+ * @note The connection event counter obtained through this API will be outdated if this API is called
+ * at the same time as the connection event counter is incremented.
+ *
+ * @note This API will always return the last connection event counter + 1.
+ * The actual connection event may be multiple connection events later if:
+ * - Slave latency is enabled and there is no data to transmit or receive.
+ * - Another role is scheduled with a higher priority at the same time as the next connection event.
+ *
+ * @param[in] conn_handle Connection handle.
+ * @param[out] p_counter Pointer to the variable where the next connection event counter will be written.
+ *
+ * @retval ::NRF_SUCCESS The connection event counter was successfully retrieved.
+ * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter supplied.
+ * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
+ */
+SVCALL(SD_BLE_GAP_NEXT_CONN_EVT_COUNTER_GET, uint32_t, sd_ble_gap_next_conn_evt_counter_get(uint16_t conn_handle, uint16_t * p_counter));
+
+
+/**@brief Start triggering a given task on connection event start.
+ *
+ * @details When enabled, this feature will trigger a PPI task at the start of connection events.
+ * The application can configure the SoftDevice to trigger every N connection events starting from
+ * a given connection event counter. See also @ref ble_gap_conn_event_trigger_t.
+ *
+ * @param[in] conn_handle Connection handle.
+ * @param[in] p_params Connection event trigger parameters.
+ *
+ * @retval ::NRF_SUCCESS Success.
+ * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied.
+ * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
+ * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter supplied. See @ref ble_gap_conn_event_trigger_t.
+ * @retval ::NRF_ERROR_INVALID_STATE Either:
+ * - Trying to start connection event triggering when it is already ongoing.
+ * - @ref ble_gap_conn_event_trigger_t::conn_evt_counter_start is in the past.
+ * Use @ref sd_ble_gap_next_conn_evt_counter_get to find a new value
+ to be used as ble_gap_conn_event_trigger_t::conn_evt_counter_start.
+ */
+SVCALL(SD_BLE_GAP_CONN_EVT_TRIGGER_START, uint32_t, sd_ble_gap_conn_evt_trigger_start(uint16_t conn_handle, ble_gap_conn_event_trigger_t const * p_params));
+
+
+/**@brief Stop triggering the task configured using @ref sd_ble_gap_conn_evt_trigger_start.
+ *
+ * @param[in] conn_handle Connection handle.
+ *
+ * @retval ::NRF_SUCCESS Success.
+ * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied.
+ * @retval ::NRF_ERROR_INVALID_STATE Trying to stop connection event triggering when it is not enabled.
+ */
+SVCALL(SD_BLE_GAP_CONN_EVT_TRIGGER_STOP, uint32_t, sd_ble_gap_conn_evt_trigger_stop(uint16_t conn_handle));
+
+
/** @} */
#ifdef __cplusplus
diff --git a/third_party/NordicSemiconductor/softdevice/s140/headers/ble_gatt.h b/third_party/NordicSemiconductor/softdevice/s140/headers/ble_gatt.h
index 9cb577c..c392884 100644
--- a/third_party/NordicSemiconductor/softdevice/s140/headers/ble_gatt.h
+++ b/third_party/NordicSemiconductor/softdevice/s140/headers/ble_gatt.h
@@ -121,7 +121,7 @@
#define BLE_GATT_STATUS_ATTERR_UNLIKELY_ERROR 0x010E /**< ATT Error: Very unlikely error. */
#define BLE_GATT_STATUS_ATTERR_INSUF_ENCRYPTION 0x010F /**< ATT Error: Encrypted link required. */
#define BLE_GATT_STATUS_ATTERR_UNSUPPORTED_GROUP_TYPE 0x0110 /**< ATT Error: Attribute type is not a supported grouping attribute. */
-#define BLE_GATT_STATUS_ATTERR_INSUF_RESOURCES 0x0111 /**< ATT Error: Encrypted link required. */
+#define BLE_GATT_STATUS_ATTERR_INSUF_RESOURCES 0x0111 /**< ATT Error: Insufficient resources. */
#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_BEGIN 0x0112 /**< ATT Error: Reserved for Future Use range #1 begin. */
#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_END 0x017F /**< ATT Error: Reserved for Future Use range #1 end. */
#define BLE_GATT_STATUS_ATTERR_APP_BEGIN 0x0180 /**< ATT Error: Application range begin. */
diff --git a/third_party/NordicSemiconductor/softdevice/s140/headers/nrf52/nrf_mbr.h b/third_party/NordicSemiconductor/softdevice/s140/headers/nrf52/nrf_mbr.h
index 389cc37..42e09fc 100644
--- a/third_party/NordicSemiconductor/softdevice/s140/headers/nrf52/nrf_mbr.h
+++ b/third_party/NordicSemiconductor/softdevice/s140/headers/nrf52/nrf_mbr.h
@@ -1,268 +1,268 @@
-/*
- * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form, except as embedded into a Nordic
- * Semiconductor ASA integrated circuit in a product or a software update for
- * such product, must reproduce the above copyright notice, this list of
- * conditions and the following disclaimer in the documentation and/or other
- * materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * 4. This software, with or without modification, must only be used with a
- * Nordic Semiconductor ASA integrated circuit.
- *
- * 5. Any software provided in binary form under this license must not be reverse
- * engineered, decompiled, modified and/or disassembled.
- *
- * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- @defgroup nrf_mbr_api Master Boot Record API
- @{
-
- @brief APIs for updating SoftDevice and BootLoader
-
-*/
-
-#ifndef NRF_MBR_H__
-#define NRF_MBR_H__
-
-#include "nrf_svc.h"
-#include <stdint.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/** @addtogroup NRF_MBR_DEFINES Defines
- * @{ */
-
-/**@brief MBR SVC Base number. */
-#define MBR_SVC_BASE (0x18)
-
-/**@brief Page size in words. */
-#define MBR_PAGE_SIZE_IN_WORDS (1024)
-
-/** @brief The size that must be reserved for the MBR when a SoftDevice is written to flash.
-This is the offset where the first byte of the SoftDevice hex file is written. */
-#define MBR_SIZE (0x1000)
-
-/** @brief Location (in the flash memory) of the bootloader address. */
-#define MBR_BOOTLOADER_ADDR (0xFF8)
-
-/** @brief Location (in UICR) of the bootloader address. */
-#define MBR_UICR_BOOTLOADER_ADDR (&(NRF_UICR->NRFFW[0]))
-
-/** @brief Location (in the flash memory) of the address of the MBR parameter page. */
-#define MBR_PARAM_PAGE_ADDR (0xFFC)
-
-/** @brief Location (in UICR) of the address of the MBR parameter page. */
-#define MBR_UICR_PARAM_PAGE_ADDR (&(NRF_UICR->NRFFW[1]))
-
-
-/** @} */
-
-/** @addtogroup NRF_MBR_ENUMS Enumerations
- * @{ */
-
-/**@brief nRF Master Boot Record API SVC numbers. */
-enum NRF_MBR_SVCS
-{
- SD_MBR_COMMAND = MBR_SVC_BASE, /**< ::sd_mbr_command */
-};
-
-/**@brief Possible values for ::sd_mbr_command_t.command */
-enum NRF_MBR_COMMANDS
-{
- SD_MBR_COMMAND_COPY_BL, /**< Copy a new BootLoader. @see ::sd_mbr_command_copy_bl_t*/
- SD_MBR_COMMAND_COPY_SD, /**< Copy a new SoftDevice. @see ::sd_mbr_command_copy_sd_t*/
- SD_MBR_COMMAND_INIT_SD, /**< Initialize forwarding interrupts to SD, and run reset function in SD. Does not require any parameters in ::sd_mbr_command_t params.*/
- SD_MBR_COMMAND_COMPARE, /**< This command works like memcmp. @see ::sd_mbr_command_compare_t*/
- SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET, /**< Change the address the MBR starts after a reset. @see ::sd_mbr_command_vector_table_base_set_t*/
- SD_MBR_COMMAND_RESERVED,
- SD_MBR_COMMAND_IRQ_FORWARD_ADDRESS_SET, /**< Start forwarding all interrupts to this address. @see ::sd_mbr_command_irq_forward_address_set_t*/
-};
-
-/** @} */
-
-/** @addtogroup NRF_MBR_TYPES Types
- * @{ */
-
-/**@brief This command copies part of a new SoftDevice
- *
- * The destination area is erased before copying.
- * If dst is in the middle of a flash page, that whole flash page will be erased.
- * If (dst+len) is in the middle of a flash page, that whole flash page will be erased.
- *
- * The user of this function is responsible for setting the BPROT registers.
- *
- * @retval ::NRF_SUCCESS indicates that the contents of the memory blocks where copied correctly.
- * @retval ::NRF_ERROR_INTERNAL indicates that the contents of the memory blocks where not verified correctly after copying.
- */
-typedef struct
-{
- uint32_t *src; /**< Pointer to the source of data to be copied.*/
- uint32_t *dst; /**< Pointer to the destination where the content is to be copied.*/
- uint32_t len; /**< Number of 32 bit words to copy. Must be a multiple of @ref MBR_PAGE_SIZE_IN_WORDS words.*/
-} sd_mbr_command_copy_sd_t;
-
-
-/**@brief This command works like memcmp, but takes the length in words.
- *
- * @retval ::NRF_SUCCESS indicates that the contents of both memory blocks are equal.
- * @retval ::NRF_ERROR_NULL indicates that the contents of the memory blocks are not equal.
- */
-typedef struct
-{
- uint32_t *ptr1; /**< Pointer to block of memory. */
- uint32_t *ptr2; /**< Pointer to block of memory. */
- uint32_t len; /**< Number of 32 bit words to compare.*/
-} sd_mbr_command_compare_t;
-
-
-/**@brief This command copies a new BootLoader.
- *
- * The MBR assumes that either @ref MBR_BOOTLOADER_ADDR or @ref MBR_UICR_BOOTLOADER_ADDR is set to
- * the address where the bootloader will be copied. If both addresses are set, the MBR will prioritize
- * @ref MBR_BOOTLOADER_ADDR.
- *
- * The bootloader destination is erased by this function.
- * If (destination+bl_len) is in the middle of a flash page, that whole flash page will be erased.
- *
- * This command requires that @ref MBR_PARAM_PAGE_ADDR or @ref MBR_UICR_PARAM_PAGE_ADDR is set,
- * see @ref sd_mbr_command.
- *
- * This command will use the flash protect peripheral (BPROT or ACL) to protect the flash that is
- * not intended to be written.
- *
- * On success, this function will not return. It will start the new bootloader from reset-vector as normal.
- *
- * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen.
- * @retval ::NRF_ERROR_FORBIDDEN if the bootloader address is not set.
- * @retval ::NRF_ERROR_INVALID_LENGTH if parameters attempts to read or write outside flash area.
- * @retval ::NRF_ERROR_NO_MEM No MBR parameter page is provided. See @ref sd_mbr_command.
- */
-typedef struct
-{
- uint32_t *bl_src; /**< Pointer to the source of the bootloader to be be copied.*/
- uint32_t bl_len; /**< Number of 32 bit words to copy for BootLoader. */
-} sd_mbr_command_copy_bl_t;
-
-/**@brief Change the address the MBR starts after a reset
- *
- * Once this function has been called, this address is where the MBR will start to forward
- * interrupts to after a reset.
- *
- * To restore default forwarding, this function should be called with @ref address set to 0. If a
- * bootloader is present, interrupts will be forwarded to the bootloader. If not, interrupts will
- * be forwarded to the SoftDevice.
- *
- * The location of a bootloader can be specified in @ref MBR_BOOTLOADER_ADDR or
- * @ref MBR_UICR_BOOTLOADER_ADDR. If both addresses are set, the MBR will prioritize
- * @ref MBR_BOOTLOADER_ADDR.
- *
- * This command requires that @ref MBR_PARAM_PAGE_ADDR or @ref MBR_UICR_PARAM_PAGE_ADDR is set,
- * see @ref sd_mbr_command.
- *
- * On success, this function will not return. It will reset the device.
- *
- * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen.
- * @retval ::NRF_ERROR_INVALID_ADDR if parameter address is outside of the flash size.
- * @retval ::NRF_ERROR_NO_MEM No MBR parameter page is provided. See @ref sd_mbr_command.
- */
-typedef struct
-{
- uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/
-} sd_mbr_command_vector_table_base_set_t;
-
-/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the MBR
- *
- * Unlike sd_mbr_command_vector_table_base_set_t, this function does not reset, and it does not
- * change where the MBR starts after reset.
- *
- * @retval ::NRF_SUCCESS
- */
-typedef struct
-{
- uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/
-} sd_mbr_command_irq_forward_address_set_t;
-
-/**@brief Input structure containing data used when calling ::sd_mbr_command
- *
- * Depending on what command value that is set, the corresponding params value type must also be
- * set. See @ref NRF_MBR_COMMANDS for command types and corresponding params value type. If command
- * @ref SD_MBR_COMMAND_INIT_SD is set, it is not necessary to set any values under params.
- */
-typedef struct
-{
- uint32_t command; /**< Type of command to be issued. See @ref NRF_MBR_COMMANDS. */
- union
- {
- sd_mbr_command_copy_sd_t copy_sd; /**< Parameters for copy SoftDevice.*/
- sd_mbr_command_compare_t compare; /**< Parameters for verify.*/
- sd_mbr_command_copy_bl_t copy_bl; /**< Parameters for copy BootLoader. Requires parameter page. */
- sd_mbr_command_vector_table_base_set_t base_set; /**< Parameters for vector table base set. Requires parameter page.*/
- sd_mbr_command_irq_forward_address_set_t irq_forward_address_set; /**< Parameters for irq forward address set*/
- } params; /**< Command parameters. */
-} sd_mbr_command_t;
-
-/** @} */
-
-/** @addtogroup NRF_MBR_FUNCTIONS Functions
- * @{ */
-
-/**@brief Issue Master Boot Record commands
- *
- * Commands used when updating a SoftDevice and bootloader.
- *
- * The @ref SD_MBR_COMMAND_COPY_BL and @ref SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET requires
- * parameters to be retained by the MBR when resetting the IC. This is done in a separate flash
- * page. The location of the flash page should be provided by the application in either
- * @ref MBR_PARAM_PAGE_ADDR or @ref MBR_UICR_PARAM_PAGE_ADDR. If both addresses are set, the MBR
- * will prioritize @ref MBR_PARAM_PAGE_ADDR. This page will be cleared by the MBR and is used to
- * store the command before reset. When an address is specified, the page it refers to must not be
- * used by the application. If no address is provided by the application, i.e. both
- * @ref MBR_PARAM_PAGE_ADDR and @ref MBR_UICR_PARAM_PAGE_ADDR is 0xFFFFFFFF, MBR commands which use
- * flash will be unavailable and return @ref NRF_ERROR_NO_MEM.
- *
- * @param[in] param Pointer to a struct describing the command.
- *
- * @note For a complete set of return values, see ::sd_mbr_command_copy_sd_t,
- * ::sd_mbr_command_copy_bl_t, ::sd_mbr_command_compare_t,
- * ::sd_mbr_command_vector_table_base_set_t, ::sd_mbr_command_irq_forward_address_set_t
- *
- * @retval ::NRF_ERROR_NO_MEM No MBR parameter page provided
- * @retval ::NRF_ERROR_INVALID_PARAM if an invalid command is given.
-*/
-SVCALL(SD_MBR_COMMAND, uint32_t, sd_mbr_command(sd_mbr_command_t* param));
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif
-#endif // NRF_MBR_H__
-
-/**
- @}
-*/
+/*
+ * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ @defgroup nrf_mbr_api Master Boot Record API
+ @{
+
+ @brief APIs for updating SoftDevice and BootLoader
+
+*/
+
+#ifndef NRF_MBR_H__
+#define NRF_MBR_H__
+
+#include "nrf_svc.h"
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @addtogroup NRF_MBR_DEFINES Defines
+ * @{ */
+
+/**@brief MBR SVC Base number. */
+#define MBR_SVC_BASE (0x18)
+
+/**@brief Page size in words. */
+#define MBR_PAGE_SIZE_IN_WORDS (1024)
+
+/** @brief The size that must be reserved for the MBR when a SoftDevice is written to flash.
+This is the offset where the first byte of the SoftDevice hex file is written. */
+#define MBR_SIZE (0x1000)
+
+/** @brief Location (in the flash memory) of the bootloader address. */
+#define MBR_BOOTLOADER_ADDR (0xFF8)
+
+/** @brief Location (in UICR) of the bootloader address. */
+#define MBR_UICR_BOOTLOADER_ADDR (&(NRF_UICR->NRFFW[0]))
+
+/** @brief Location (in the flash memory) of the address of the MBR parameter page. */
+#define MBR_PARAM_PAGE_ADDR (0xFFC)
+
+/** @brief Location (in UICR) of the address of the MBR parameter page. */
+#define MBR_UICR_PARAM_PAGE_ADDR (&(NRF_UICR->NRFFW[1]))
+
+
+/** @} */
+
+/** @addtogroup NRF_MBR_ENUMS Enumerations
+ * @{ */
+
+/**@brief nRF Master Boot Record API SVC numbers. */
+enum NRF_MBR_SVCS
+{
+ SD_MBR_COMMAND = MBR_SVC_BASE, /**< ::sd_mbr_command */
+};
+
+/**@brief Possible values for ::sd_mbr_command_t.command */
+enum NRF_MBR_COMMANDS
+{
+ SD_MBR_COMMAND_COPY_BL, /**< Copy a new BootLoader. @see ::sd_mbr_command_copy_bl_t*/
+ SD_MBR_COMMAND_COPY_SD, /**< Copy a new SoftDevice. @see ::sd_mbr_command_copy_sd_t*/
+ SD_MBR_COMMAND_INIT_SD, /**< Initialize forwarding interrupts to SD, and run reset function in SD. Does not require any parameters in ::sd_mbr_command_t params.*/
+ SD_MBR_COMMAND_COMPARE, /**< This command works like memcmp. @see ::sd_mbr_command_compare_t*/
+ SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET, /**< Change the address the MBR starts after a reset. @see ::sd_mbr_command_vector_table_base_set_t*/
+ SD_MBR_COMMAND_RESERVED,
+ SD_MBR_COMMAND_IRQ_FORWARD_ADDRESS_SET, /**< Start forwarding all interrupts to this address. @see ::sd_mbr_command_irq_forward_address_set_t*/
+};
+
+/** @} */
+
+/** @addtogroup NRF_MBR_TYPES Types
+ * @{ */
+
+/**@brief This command copies part of a new SoftDevice
+ *
+ * The destination area is erased before copying.
+ * If dst is in the middle of a flash page, that whole flash page will be erased.
+ * If (dst+len) is in the middle of a flash page, that whole flash page will be erased.
+ *
+ * The user of this function is responsible for setting the BPROT registers.
+ *
+ * @retval ::NRF_SUCCESS indicates that the contents of the memory blocks where copied correctly.
+ * @retval ::NRF_ERROR_INTERNAL indicates that the contents of the memory blocks where not verified correctly after copying.
+ */
+typedef struct
+{
+ uint32_t *src; /**< Pointer to the source of data to be copied.*/
+ uint32_t *dst; /**< Pointer to the destination where the content is to be copied.*/
+ uint32_t len; /**< Number of 32 bit words to copy. Must be a multiple of @ref MBR_PAGE_SIZE_IN_WORDS words.*/
+} sd_mbr_command_copy_sd_t;
+
+
+/**@brief This command works like memcmp, but takes the length in words.
+ *
+ * @retval ::NRF_SUCCESS indicates that the contents of both memory blocks are equal.
+ * @retval ::NRF_ERROR_NULL indicates that the contents of the memory blocks are not equal.
+ */
+typedef struct
+{
+ uint32_t *ptr1; /**< Pointer to block of memory. */
+ uint32_t *ptr2; /**< Pointer to block of memory. */
+ uint32_t len; /**< Number of 32 bit words to compare.*/
+} sd_mbr_command_compare_t;
+
+
+/**@brief This command copies a new BootLoader.
+ *
+ * The MBR assumes that either @ref MBR_BOOTLOADER_ADDR or @ref MBR_UICR_BOOTLOADER_ADDR is set to
+ * the address where the bootloader will be copied. If both addresses are set, the MBR will prioritize
+ * @ref MBR_BOOTLOADER_ADDR.
+ *
+ * The bootloader destination is erased by this function.
+ * If (destination+bl_len) is in the middle of a flash page, that whole flash page will be erased.
+ *
+ * This command requires that @ref MBR_PARAM_PAGE_ADDR or @ref MBR_UICR_PARAM_PAGE_ADDR is set,
+ * see @ref sd_mbr_command.
+ *
+ * This command will use the flash protect peripheral (BPROT or ACL) to protect the flash that is
+ * not intended to be written.
+ *
+ * On success, this function will not return. It will start the new bootloader from reset-vector as normal.
+ *
+ * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen.
+ * @retval ::NRF_ERROR_FORBIDDEN if the bootloader address is not set.
+ * @retval ::NRF_ERROR_INVALID_LENGTH if parameters attempts to read or write outside flash area.
+ * @retval ::NRF_ERROR_NO_MEM No MBR parameter page is provided. See @ref sd_mbr_command.
+ */
+typedef struct
+{
+ uint32_t *bl_src; /**< Pointer to the source of the bootloader to be be copied.*/
+ uint32_t bl_len; /**< Number of 32 bit words to copy for BootLoader. */
+} sd_mbr_command_copy_bl_t;
+
+/**@brief Change the address the MBR starts after a reset
+ *
+ * Once this function has been called, this address is where the MBR will start to forward
+ * interrupts to after a reset.
+ *
+ * To restore default forwarding, this function should be called with @ref address set to 0. If a
+ * bootloader is present, interrupts will be forwarded to the bootloader. If not, interrupts will
+ * be forwarded to the SoftDevice.
+ *
+ * The location of a bootloader can be specified in @ref MBR_BOOTLOADER_ADDR or
+ * @ref MBR_UICR_BOOTLOADER_ADDR. If both addresses are set, the MBR will prioritize
+ * @ref MBR_BOOTLOADER_ADDR.
+ *
+ * This command requires that @ref MBR_PARAM_PAGE_ADDR or @ref MBR_UICR_PARAM_PAGE_ADDR is set,
+ * see @ref sd_mbr_command.
+ *
+ * On success, this function will not return. It will reset the device.
+ *
+ * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen.
+ * @retval ::NRF_ERROR_INVALID_ADDR if parameter address is outside of the flash size.
+ * @retval ::NRF_ERROR_NO_MEM No MBR parameter page is provided. See @ref sd_mbr_command.
+ */
+typedef struct
+{
+ uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/
+} sd_mbr_command_vector_table_base_set_t;
+
+/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the MBR
+ *
+ * Unlike sd_mbr_command_vector_table_base_set_t, this function does not reset, and it does not
+ * change where the MBR starts after reset.
+ *
+ * @retval ::NRF_SUCCESS
+ */
+typedef struct
+{
+ uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/
+} sd_mbr_command_irq_forward_address_set_t;
+
+/**@brief Input structure containing data used when calling ::sd_mbr_command
+ *
+ * Depending on what command value that is set, the corresponding params value type must also be
+ * set. See @ref NRF_MBR_COMMANDS for command types and corresponding params value type. If command
+ * @ref SD_MBR_COMMAND_INIT_SD is set, it is not necessary to set any values under params.
+ */
+typedef struct
+{
+ uint32_t command; /**< Type of command to be issued. See @ref NRF_MBR_COMMANDS. */
+ union
+ {
+ sd_mbr_command_copy_sd_t copy_sd; /**< Parameters for copy SoftDevice.*/
+ sd_mbr_command_compare_t compare; /**< Parameters for verify.*/
+ sd_mbr_command_copy_bl_t copy_bl; /**< Parameters for copy BootLoader. Requires parameter page. */
+ sd_mbr_command_vector_table_base_set_t base_set; /**< Parameters for vector table base set. Requires parameter page.*/
+ sd_mbr_command_irq_forward_address_set_t irq_forward_address_set; /**< Parameters for irq forward address set*/
+ } params; /**< Command parameters. */
+} sd_mbr_command_t;
+
+/** @} */
+
+/** @addtogroup NRF_MBR_FUNCTIONS Functions
+ * @{ */
+
+/**@brief Issue Master Boot Record commands
+ *
+ * Commands used when updating a SoftDevice and bootloader.
+ *
+ * The @ref SD_MBR_COMMAND_COPY_BL and @ref SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET requires
+ * parameters to be retained by the MBR when resetting the IC. This is done in a separate flash
+ * page. The location of the flash page should be provided by the application in either
+ * @ref MBR_PARAM_PAGE_ADDR or @ref MBR_UICR_PARAM_PAGE_ADDR. If both addresses are set, the MBR
+ * will prioritize @ref MBR_PARAM_PAGE_ADDR. This page will be cleared by the MBR and is used to
+ * store the command before reset. When an address is specified, the page it refers to must not be
+ * used by the application. If no address is provided by the application, i.e. both
+ * @ref MBR_PARAM_PAGE_ADDR and @ref MBR_UICR_PARAM_PAGE_ADDR is 0xFFFFFFFF, MBR commands which use
+ * flash will be unavailable and return @ref NRF_ERROR_NO_MEM.
+ *
+ * @param[in] param Pointer to a struct describing the command.
+ *
+ * @note For a complete set of return values, see ::sd_mbr_command_copy_sd_t,
+ * ::sd_mbr_command_copy_bl_t, ::sd_mbr_command_compare_t,
+ * ::sd_mbr_command_vector_table_base_set_t, ::sd_mbr_command_irq_forward_address_set_t
+ *
+ * @retval ::NRF_ERROR_NO_MEM No MBR parameter page provided
+ * @retval ::NRF_ERROR_INVALID_PARAM if an invalid command is given.
+*/
+SVCALL(SD_MBR_COMMAND, uint32_t, sd_mbr_command(sd_mbr_command_t* param));
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+#endif // NRF_MBR_H__
+
+/**
+ @}
+*/
diff --git a/third_party/NordicSemiconductor/softdevice/s140/headers/nrf_sd_def.h b/third_party/NordicSemiconductor/softdevice/s140/headers/nrf_sd_def.h
index c9ab241..1bbe3e0 100644
--- a/third_party/NordicSemiconductor/softdevice/s140/headers/nrf_sd_def.h
+++ b/third_party/NordicSemiconductor/softdevice/s140/headers/nrf_sd_def.h
@@ -1,30 +1,30 @@
/**
- * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
- *
+ * Copyright (c) 2015 - 2019, Nordic Semiconductor ASA
+ *
* All rights reserved.
- *
+ *
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
- *
+ *
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
- *
+ *
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
- *
+ *
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
- *
+ *
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
- *
+ *
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -35,7 +35,7 @@
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
+ *
*/
#ifndef NRF_SD_DEF_H__
#define NRF_SD_DEF_H__
diff --git a/third_party/NordicSemiconductor/softdevice/s140/headers/nrf_sdm.h b/third_party/NordicSemiconductor/softdevice/s140/headers/nrf_sdm.h
index 5dfbb28..6834599 100644
--- a/third_party/NordicSemiconductor/softdevice/s140/headers/nrf_sdm.h
+++ b/third_party/NordicSemiconductor/softdevice/s140/headers/nrf_sdm.h
@@ -67,10 +67,10 @@
#endif
/** @brief The major version for the SoftDevice binary distributed with this header file. */
-#define SD_MAJOR_VERSION (6)
+#define SD_MAJOR_VERSION (7)
/** @brief The minor version for the SoftDevice binary distributed with this header file. */
-#define SD_MINOR_VERSION (1)
+#define SD_MINOR_VERSION (0)
/** @brief The bugfix version for the SoftDevice binary distributed with this header file. */
#define SD_BUGFIX_VERSION (1)
@@ -141,7 +141,7 @@
* Add @ref MBR_SIZE to find the first available flash address when the SoftDevice is installed
* just above the MBR (the usual case).
*/
-#define SD_FLASH_SIZE 0x25000
+#define SD_FLASH_SIZE 0x26000
/** @brief Defines a macro for retrieving the actual FWID value from a given base address. Use
* @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the usual
@@ -274,6 +274,10 @@
* perform a reset, using e.g. CMSIS NVIC_SystemReset().
* If the application returns from the fault handler the SoftDevice will call NVIC_SystemReset().
*
+ * @note It is recommended to either perform a reset in the fault handler or to let the SoftDevice reset the device.
+ * Otherwise SoC peripherals may behave in an undefined way. For example, the RADIO peripherial may
+ * continously transmit packets.
+ *
* @note This callback is executed in HardFault context, thus SVC functions cannot be called from the fault callback.
*
* @param[in] id Fault identifier. See @ref NRF_FAULT_IDS.
diff --git a/third_party/NordicSemiconductor/softdevice/s140/headers/nrf_soc.h b/third_party/NordicSemiconductor/softdevice/s140/headers/nrf_soc.h
index beb4d3a..3751d13 100644
--- a/third_party/NordicSemiconductor/softdevice/s140/headers/nrf_soc.h
+++ b/third_party/NordicSemiconductor/softdevice/s140/headers/nrf_soc.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2019, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
@@ -71,10 +71,10 @@
#define NRF_RADIO_MINIMUM_TIMESLOT_LENGTH_EXTENSION_TIME_US (200)
/**@brief The maximum processing time to handle a timeslot extension. */
-#define NRF_RADIO_MAX_EXTENSION_PROCESSING_TIME_US (17)
+#define NRF_RADIO_MAX_EXTENSION_PROCESSING_TIME_US (20)
/**@brief The latest time before the end of a timeslot the timeslot can be extended. */
-#define NRF_RADIO_MIN_EXTENSION_MARGIN_US (79)
+#define NRF_RADIO_MIN_EXTENSION_MARGIN_US (82)
#define SOC_ECB_KEY_LENGTH (16) /**< ECB key length. */
#define SOC_ECB_CLEARTEXT_LENGTH (16) /**< ECB cleartext length. */
@@ -117,12 +117,6 @@
| (1U << 31) \
))
-/**@brief Mask of PPI channels available to the application when the SoftDevice is disabled. */
-#define NRF_SOC_APP_PPI_CHANNELS_SD_DISABLED_MSK (~NRF_SOC_SD_PPI_CHANNELS_SD_DISABLED_MSK)
-
-/**@brief Mask of PPI channels available to the application when the SoftDevice is enabled. */
-#define NRF_SOC_APP_PPI_CHANNELS_SD_ENABLED_MSK (~NRF_SOC_SD_PPI_CHANNELS_SD_ENABLED_MSK)
-
/**@brief Mask of PPI groups reserved by the SoftDevice when the SoftDevice is disabled. */
#define NRF_SOC_SD_PPI_GROUPS_SD_DISABLED_MSK ((uint32_t)(0))
@@ -132,12 +126,6 @@
| (1U << 5) \
))
-/**@brief Mask of PPI groups available to the application when the SoftDevice is disabled. */
-#define NRF_SOC_APP_PPI_GROUPS_SD_DISABLED_MSK (~NRF_SOC_SD_PPI_GROUPS_SD_DISABLED_MSK)
-
-/**@brief Mask of PPI groups available to the application when the SoftDevice is enabled. */
-#define NRF_SOC_APP_PPI_GROUPS_SD_ENABLED_MSK (~NRF_SOC_SD_PPI_GROUPS_SD_ENABLED_MSK)
-
/**@} */
/**@addtogroup NRF_SOC_ENUMS Enumerations
@@ -555,6 +543,8 @@
*
* @param[in] usbpwrrdy_enable True if the power ready event should be enabled, false if it should be disabled.
*
+ * @note Calling this function on a chip without USBD peripheral will result in undefined behaviour.
+ *
* @retval ::NRF_SUCCESS
*/
SVCALL(SD_POWER_USBPWRRDY_ENABLE, uint32_t, sd_power_usbpwrrdy_enable(uint8_t usbpwrrdy_enable));
@@ -566,6 +556,8 @@
*
* @param[in] usbdetected_enable True if the power ready event should be enabled, false if it should be disabled.
*
+ * @note Calling this function on a chip without USBD peripheral will result in undefined behaviour.
+ *
* @retval ::NRF_SUCCESS
*/
SVCALL(SD_POWER_USBDETECTED_ENABLE, uint32_t, sd_power_usbdetected_enable(uint8_t usbdetected_enable));
@@ -577,6 +569,8 @@
*
* @param[in] usbremoved_enable True if the power ready event should be enabled, false if it should be disabled.
*
+ * @note Calling this function on a chip without USBD peripheral will result in undefined behaviour.
+ *
* @retval ::NRF_SUCCESS
*/
SVCALL(SD_POWER_USBREMOVED_ENABLE, uint32_t, sd_power_usbremoved_enable(uint8_t usbremoved_enable));
@@ -585,6 +579,8 @@
*
* @param[out] usbregstatus The content of USBREGSTATUS register.
*
+ * @note Calling this function on a chip without USBD peripheral will result in undefined behaviour.
+ *
* @retval ::NRF_SUCCESS
*/
SVCALL(SD_POWER_USBREGSTATUS_GET, uint32_t, sd_power_usbregstatus_get(uint32_t * usbregstatus));
@@ -1041,7 +1037,12 @@
*
* @param[in] p_request Pointer to the request parameters.
*
- * @retval ::NRF_ERROR_FORBIDDEN If session not opened or the session is not IDLE.
+ * @retval ::NRF_ERROR_FORBIDDEN Either:
+ * - The session is not open.
+ * - The session is not IDLE.
+ * - This is the first request and its type is not @ref NRF_RADIO_REQ_TYPE_EARLIEST.
+ * - The request type was set to @ref NRF_RADIO_REQ_TYPE_NORMAL after a
+ * @ref NRF_RADIO_REQ_TYPE_EARLIEST request was blocked.
* @retval ::NRF_ERROR_INVALID_ADDR If the p_request pointer is invalid.
* @retval ::NRF_ERROR_INVALID_PARAM If the parameters of p_request are not valid.
* @retval ::NRF_SUCCESS Otherwise.
diff --git a/third_party/NordicSemiconductor/softdevice/s140/headers/nrf_svc.h b/third_party/NordicSemiconductor/softdevice/s140/headers/nrf_svc.h
index 292c692..231a54f 100644
--- a/third_party/NordicSemiconductor/softdevice/s140/headers/nrf_svc.h
+++ b/third_party/NordicSemiconductor/softdevice/s140/headers/nrf_svc.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2012 - 2019, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
@@ -45,6 +45,16 @@
extern "C" {
#endif
+/** @brief Supervisor call declaration.
+ *
+ * A call to a function marked with @ref SVCALL, will trigger a Supervisor Call (SVC) Exception.
+ * The SVCs with SVC numbers 0x00-0x0F are forwared to the application. All other SVCs are handled by the SoftDevice.
+ *
+ * @param[in] number The SVC number to be used.
+ * @param[in] return_type The return type of the SVC function.
+ * @param[in] signature Function signature. The function can have at most four arguments.
+ */
+
#ifdef SVCALL_AS_NORMAL_FUNCTION
#define SVCALL(number, return_type, signature) return_type signature
#else
diff --git a/third_party/build_gn/BUILDCONFIG.gn b/third_party/build_gn/BUILDCONFIG.gn
new file mode 100644
index 0000000..f9202d9
--- /dev/null
+++ b/third_party/build_gn/BUILDCONFIG.gn
@@ -0,0 +1,18 @@
+# Copyright 2014 The Chromium Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+if (target_os == "") {
+ target_os = host_os
+}
+if (target_cpu == "") {
+ target_cpu = host_cpu
+}
+if (current_cpu == "") {
+ current_cpu = target_cpu
+}
+if (current_os == "") {
+ current_os = target_os
+}
+
+set_default_toolchain("//third_party/build_gn/toolchain:gcc")
diff --git a/third_party/build_gn/README.md b/third_party/build_gn/README.md
new file mode 100644
index 0000000..0430d11
--- /dev/null
+++ b/third_party/build_gn/README.md
@@ -0,0 +1,22 @@
+# build_gn
+
+## URL
+
+https://gn.googlesource.com/gn/+/refs/heads/master/examples/simple_build/build
+
+## License
+
+BSD 3-Clause
+
+## License File
+
+[LICENSE](https://gn.googlesource.com/gn/+/refs/heads/master/LICENSE)
+
+## Description
+
+gn is metabuild system that generates ninja files for further compilation
+
+gn tool requires paths to all the toolchains to be used for compilation, for
+example compiler, linker etc. The toolchains in toolchain/BUILD.gn are from the
+examples repository for gn. BUILDCONFIG.gn is also trimmed down version from
+examples/simple_build/build/
diff --git a/third_party/build_gn/toolchain/BUILD.gn b/third_party/build_gn/toolchain/BUILD.gn
new file mode 100644
index 0000000..64df6a8
--- /dev/null
+++ b/third_party/build_gn/toolchain/BUILD.gn
@@ -0,0 +1,74 @@
+# Copyright 2014 The Chromium Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+toolchain("gcc") {
+ tool("cc") {
+ depfile = "{{output}}.d"
+ command = "gcc -MMD -MF $depfile {{defines}} {{include_dirs}} {{cflags}} {{cflags_c}} -c {{source}} -o {{output}}"
+ depsformat = "gcc"
+ description = "CC {{output}}"
+ outputs = [
+ "{{source_out_dir}}/{{target_output_name}}.{{source_name_part}}.o",
+ ]
+ }
+ tool("cxx") {
+ depfile = "{{output}}.d"
+ command = "g++ -MMD -MF $depfile {{defines}} {{include_dirs}} {{cflags}} {{cflags_cc}} -c {{source}} -o {{output}}"
+ depsformat = "gcc"
+ description = "CXX {{output}}"
+ outputs = [
+ "{{source_out_dir}}/{{target_output_name}}.{{source_name_part}}.o",
+ ]
+ }
+ tool("alink") {
+ rspfile = "{{output}}.rsp"
+ command = "rm -f {{output}} && ar rcs {{output}} @$rspfile"
+ description = "AR {{target_output_name}}{{output_extension}}"
+ rspfile_content = "{{inputs}}"
+ outputs = [
+ "{{target_out_dir}}/{{target_output_name}}{{output_extension}}",
+ ]
+ default_output_extension = ".a"
+ output_prefix = "lib"
+ }
+ tool("solink") {
+ soname = "{{target_output_name}}{{output_extension}}" # e.g. "libfoo.so".
+ sofile = "{{output_dir}}/$soname"
+ rspfile = soname + ".rsp"
+ command = "g++ -shared {{ldflags}} -o $sofile -Wl,-soname=$soname @$rspfile"
+ rspfile_content = "-Wl,--whole-archive {{inputs}} {{solibs}} -Wl,--no-whole-archive {{libs}}"
+ description = "SOLINK $soname"
+ # Use this for {{output_extension}} expansions unless a target manually
+ # overrides it (in which case {{output_extension}} will be what the target
+ # specifies).
+ default_output_extension = ".so"
+ # Use this for {{output_dir}} expansions unless a target manually overrides
+ # it (in which case {{output_dir}} will be what the target specifies).
+ default_output_dir = "{{root_out_dir}}"
+ outputs = [
+ sofile,
+ ]
+ link_output = sofile
+ depend_output = sofile
+ output_prefix = "lib"
+ }
+ tool("link") {
+ outfile = "{{target_output_name}}{{output_extension}}"
+ rspfile = "$outfile.rsp"
+ command = "g++ {{ldflags}} -o $outfile -Wl,--start-group @$rspfile {{solibs}} -Wl,--end-group {{libs}}"
+ description = "LINK $outfile"
+ default_output_dir = "{{root_out_dir}}"
+ rspfile_content = "{{inputs}}"
+ outputs = [
+ outfile,
+ ]
+ }
+ tool("stamp") {
+ command = "touch {{output}}"
+ description = "STAMP {{output}}"
+ }
+ tool("copy") {
+ command = "cp -af {{source}} {{output}}"
+ description = "COPY {{source}} {{output}}"
+ }
+}
diff --git a/third_party/jlink/Makefile.am b/third_party/jlink/Makefile.am
index 4872e3e..16e3aa6 100644
--- a/third_party/jlink/Makefile.am
+++ b/third_party/jlink/Makefile.am
@@ -28,15 +28,19 @@
include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
+# Do not enable -Wundef for jlink library
+override CFLAGS := $(filter-out -Wundef,$(CFLAGS))
+override CXXFLAGS := $(filter-out -Wundef,$(CXXFLAGS))
+
lib_LIBRARIES = libjlinkrtt.a
libjlinkrtt_a_CPPFLAGS = \
-I$(top_srcdir)/third_party/jlink/SEGGER_RTT_V640/RTT \
- $(NULL)
+ $(NULL)
libjlinkrtt_a_SOURCES = \
SEGGER_RTT_V640/RTT/SEGGER_RTT.c \
- $(NULL)
+ $(NULL)
noinst_HEADERS = \
SEGGER_RTT_V640/RTT/SEGGER_RTT.h \
@@ -55,6 +59,18 @@
$(NULL)
endif
+if OPENTHREAD_EXAMPLES_NRF52833
+libjlinkrtt_a_CPPFLAGS += \
+ -DNRF52833_XXAA \
+ -DSEGGER_RTT_CONFIG_H=\"$(top_srcdir)/third_party/NordicSemiconductor/segger_rtt/SEGGER_RTT_Conf.h\" \
+ -I$(top_srcdir)/include \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/dependencies \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/libraries/app_error \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/nrfx/mdk \
+ -I$(top_srcdir)/third_party/NordicSemiconductor/cmsis \
+ $(NULL)
+endif
+
if OPENTHREAD_EXAMPLES_NRF52811
libjlinkrtt_a_CPPFLAGS += \
-DNRF52811_XXAA \
diff --git a/third_party/jlink/SEGGER_RTT_V640/Examples/Main_RTT_InputEchoApp.c b/third_party/jlink/SEGGER_RTT_V640/Examples/Main_RTT_InputEchoApp.c
index 1561692..5b453bf 100644
--- a/third_party/jlink/SEGGER_RTT_V640/Examples/Main_RTT_InputEchoApp.c
+++ b/third_party/jlink/SEGGER_RTT_V640/Examples/Main_RTT_InputEchoApp.c
@@ -1,43 +1,43 @@
-/*********************************************************************
-* SEGGER Microcontroller GmbH *
-* Solutions for real time microcontroller applications *
-**********************************************************************
-* *
-* (c) 1995 - 2018 SEGGER Microcontroller GmbH *
-* *
-* www.segger.com Support: support@segger.com *
-* *
-**********************************************************************
-
---------- END-OF-HEADER --------------------------------------------
-File : Main_RTT_MenuApp.c
-Purpose : Sample application to demonstrate RTT bi-directional functionality
-*/
-
-#define MAIN_C
-
-#include <stdio.h>
-
-#include "SEGGER_RTT.h"
-
-volatile int _Cnt;
-volatile int _Delay;
-
-static char r;
-
-/*********************************************************************
-*
-* main
-*/
-void main(void) {
-
- SEGGER_RTT_WriteString(0, "SEGGER Real-Time-Terminal Sample\r\n");
- SEGGER_RTT_ConfigUpBuffer(0, NULL, NULL, 0, SEGGER_RTT_MODE_NO_BLOCK_SKIP);
- do {
- r = SEGGER_RTT_WaitKey();
- SEGGER_RTT_Write(0, &r, 1);
- r++;
- } while (1);
-}
-
-/*************************** End of file ****************************/
+/*********************************************************************
+* SEGGER Microcontroller GmbH *
+* Solutions for real time microcontroller applications *
+**********************************************************************
+* *
+* (c) 1995 - 2018 SEGGER Microcontroller GmbH *
+* *
+* www.segger.com Support: support@segger.com *
+* *
+**********************************************************************
+
+--------- END-OF-HEADER --------------------------------------------
+File : Main_RTT_MenuApp.c
+Purpose : Sample application to demonstrate RTT bi-directional functionality
+*/
+
+#define MAIN_C
+
+#include <stdio.h>
+
+#include "SEGGER_RTT.h"
+
+volatile int _Cnt;
+volatile int _Delay;
+
+static char r;
+
+/*********************************************************************
+*
+* main
+*/
+void main(void) {
+
+ SEGGER_RTT_WriteString(0, "SEGGER Real-Time-Terminal Sample\r\n");
+ SEGGER_RTT_ConfigUpBuffer(0, NULL, NULL, 0, SEGGER_RTT_MODE_NO_BLOCK_SKIP);
+ do {
+ r = SEGGER_RTT_WaitKey();
+ SEGGER_RTT_Write(0, &r, 1);
+ r++;
+ } while (1);
+}
+
+/*************************** End of file ****************************/
diff --git a/third_party/jlink/SEGGER_RTT_V640/Examples/Main_RTT_MenuApp.c b/third_party/jlink/SEGGER_RTT_V640/Examples/Main_RTT_MenuApp.c
index c6a277a..4dbcc84 100644
--- a/third_party/jlink/SEGGER_RTT_V640/Examples/Main_RTT_MenuApp.c
+++ b/third_party/jlink/SEGGER_RTT_V640/Examples/Main_RTT_MenuApp.c
@@ -1,70 +1,70 @@
-/*********************************************************************
-* SEGGER Microcontroller GmbH *
-* Solutions for real time microcontroller applications *
-**********************************************************************
-* *
-* (c) 1995 - 2018 SEGGER Microcontroller GmbH *
-* *
-* www.segger.com Support: support@segger.com *
-* *
-**********************************************************************
---------- END-OF-HEADER --------------------------------------------
-File : Main_RTT_MenuApp.c
-Purpose : Sample application to demonstrate RTT bi-directional functionality
-*/
-
-#define MAIN_C
-
-#include <stdio.h>
-
-#include "SEGGER_RTT.h"
-
-volatile int _Cnt;
-volatile int _Delay;
-
-/*********************************************************************
-*
-* main
-*/
-void main(void) {
- int r;
- int CancelOp;
-
- do {
- _Cnt = 0;
-
- SEGGER_RTT_WriteString(0, "SEGGER Real-Time-Terminal Sample\r\n");
- SEGGER_RTT_WriteString(0, "Press <1> to continue in blocking mode (Application waits if necessary, no data lost)\r\n");
- SEGGER_RTT_WriteString(0, "Press <2> to continue in non-blocking mode (Application does not wait, data lost if fifo full)\r\n");
- do {
- r = SEGGER_RTT_WaitKey();
- } while ((r != '1') && (r != '2'));
- if (r == '1') {
- SEGGER_RTT_WriteString(0, "\r\nSelected <1>. Configuring RTT and starting...\r\n");
- SEGGER_RTT_ConfigUpBuffer(0, NULL, NULL, 0, SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL);
- } else {
- SEGGER_RTT_WriteString(0, "\r\nSelected <2>. Configuring RTT and starting...\r\n");
- SEGGER_RTT_ConfigUpBuffer(0, NULL, NULL, 0, SEGGER_RTT_MODE_NO_BLOCK_SKIP);
- }
- CancelOp = 0;
- do {
- //for (_Delay = 0; _Delay < 10000; _Delay++);
- SEGGER_RTT_printf(0, "Count: %d. Press <Space> to get back to menu.\r\n", _Cnt++);
- r = SEGGER_RTT_HasKey();
- if (r) {
- CancelOp = (SEGGER_RTT_GetKey() == ' ') ? 1 : 0;
- }
- //
- // Check if user selected to cancel the current operation
- //
- if (CancelOp) {
- SEGGER_RTT_WriteString(0, "Operation cancelled, going back to menu...\r\n");
- break;
- }
- } while (1);
- SEGGER_RTT_GetKey();
- SEGGER_RTT_WriteString(0, "\r\n");
- } while (1);
-}
-
-/*************************** End of file ****************************/
+/*********************************************************************
+* SEGGER Microcontroller GmbH *
+* Solutions for real time microcontroller applications *
+**********************************************************************
+* *
+* (c) 1995 - 2018 SEGGER Microcontroller GmbH *
+* *
+* www.segger.com Support: support@segger.com *
+* *
+**********************************************************************
+--------- END-OF-HEADER --------------------------------------------
+File : Main_RTT_MenuApp.c
+Purpose : Sample application to demonstrate RTT bi-directional functionality
+*/
+
+#define MAIN_C
+
+#include <stdio.h>
+
+#include "SEGGER_RTT.h"
+
+volatile int _Cnt;
+volatile int _Delay;
+
+/*********************************************************************
+*
+* main
+*/
+void main(void) {
+ int r;
+ int CancelOp;
+
+ do {
+ _Cnt = 0;
+
+ SEGGER_RTT_WriteString(0, "SEGGER Real-Time-Terminal Sample\r\n");
+ SEGGER_RTT_WriteString(0, "Press <1> to continue in blocking mode (Application waits if necessary, no data lost)\r\n");
+ SEGGER_RTT_WriteString(0, "Press <2> to continue in non-blocking mode (Application does not wait, data lost if fifo full)\r\n");
+ do {
+ r = SEGGER_RTT_WaitKey();
+ } while ((r != '1') && (r != '2'));
+ if (r == '1') {
+ SEGGER_RTT_WriteString(0, "\r\nSelected <1>. Configuring RTT and starting...\r\n");
+ SEGGER_RTT_ConfigUpBuffer(0, NULL, NULL, 0, SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL);
+ } else {
+ SEGGER_RTT_WriteString(0, "\r\nSelected <2>. Configuring RTT and starting...\r\n");
+ SEGGER_RTT_ConfigUpBuffer(0, NULL, NULL, 0, SEGGER_RTT_MODE_NO_BLOCK_SKIP);
+ }
+ CancelOp = 0;
+ do {
+ //for (_Delay = 0; _Delay < 10000; _Delay++);
+ SEGGER_RTT_printf(0, "Count: %d. Press <Space> to get back to menu.\r\n", _Cnt++);
+ r = SEGGER_RTT_HasKey();
+ if (r) {
+ CancelOp = (SEGGER_RTT_GetKey() == ' ') ? 1 : 0;
+ }
+ //
+ // Check if user selected to cancel the current operation
+ //
+ if (CancelOp) {
+ SEGGER_RTT_WriteString(0, "Operation cancelled, going back to menu...\r\n");
+ break;
+ }
+ } while (1);
+ SEGGER_RTT_GetKey();
+ SEGGER_RTT_WriteString(0, "\r\n");
+ } while (1);
+}
+
+/*************************** End of file ****************************/
diff --git a/third_party/jlink/SEGGER_RTT_V640/Examples/Main_RTT_PrintfTest.c b/third_party/jlink/SEGGER_RTT_V640/Examples/Main_RTT_PrintfTest.c
index de81b15..2d90fff 100644
--- a/third_party/jlink/SEGGER_RTT_V640/Examples/Main_RTT_PrintfTest.c
+++ b/third_party/jlink/SEGGER_RTT_V640/Examples/Main_RTT_PrintfTest.c
@@ -1,118 +1,118 @@
-/*********************************************************************
-* SEGGER Microcontroller GmbH *
-* Solutions for real time microcontroller applications *
-**********************************************************************
-* *
-* (c) 1995 - 2018 SEGGER Microcontroller GmbH *
-* *
-* www.segger.com Support: support@segger.com *
-* *
-**********************************************************************
-
---------- END-OF-HEADER --------------------------------------------
-File : Main_RTT_MenuApp.c
-Purpose : Sample application to demonstrate RTT bi-directional functionality
-*/
-
-#define MAIN_C
-
-#include <stdio.h>
-
-#include "SEGGER_RTT.h"
-
-volatile int _Cnt;
-
-/*********************************************************************
-*
-* main
-*/
-void main(void) {
-
- SEGGER_RTT_ConfigUpBuffer(0, NULL, NULL, 0, SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL);
-
- SEGGER_RTT_WriteString(0, "SEGGER Real-Time-Terminal Sample\r\n\r\n");
- SEGGER_RTT_WriteString(0, "###### Testing SEGGER_printf() ######\r\n");
-
- SEGGER_RTT_printf(0, "printf Test: %%c, 'S' : %c.\r\n", 'S');
- SEGGER_RTT_printf(0, "printf Test: %%5c, 'E' : %5c.\r\n", 'E');
- SEGGER_RTT_printf(0, "printf Test: %%-5c, 'G' : %-5c.\r\n", 'G');
- SEGGER_RTT_printf(0, "printf Test: %%5.3c, 'G' : %-5c.\r\n", 'G');
- SEGGER_RTT_printf(0, "printf Test: %%.3c, 'E' : %-5c.\r\n", 'E');
- SEGGER_RTT_printf(0, "printf Test: %%c, 'R' : %c.\r\n", 'R');
-
- SEGGER_RTT_printf(0, "printf Test: %%s, \"RTT\" : %s.\r\n", "RTT");
- SEGGER_RTT_printf(0, "printf Test: %%s, \"RTT\\r\\nRocks.\" : %s.\r\n", "RTT\r\nRocks.");
-
- SEGGER_RTT_printf(0, "printf Test: %%u, 12345 : %u.\r\n", 12345);
- SEGGER_RTT_printf(0, "printf Test: %%+u, 12345 : %+u.\r\n", 12345);
- SEGGER_RTT_printf(0, "printf Test: %%.3u, 12345 : %.3u.\r\n", 12345);
- SEGGER_RTT_printf(0, "printf Test: %%.6u, 12345 : %.6u.\r\n", 12345);
- SEGGER_RTT_printf(0, "printf Test: %%6.3u, 12345 : %6.3u.\r\n", 12345);
- SEGGER_RTT_printf(0, "printf Test: %%8.6u, 12345 : %8.6u.\r\n", 12345);
- SEGGER_RTT_printf(0, "printf Test: %%08u, 12345 : %08u.\r\n", 12345);
- SEGGER_RTT_printf(0, "printf Test: %%08.6u, 12345 : %08.6u.\r\n", 12345);
- SEGGER_RTT_printf(0, "printf Test: %%0u, 12345 : %0u.\r\n", 12345);
- SEGGER_RTT_printf(0, "printf Test: %%-.6u, 12345 : %-.6u.\r\n", 12345);
- SEGGER_RTT_printf(0, "printf Test: %%-6.3u, 12345 : %-6.3u.\r\n", 12345);
- SEGGER_RTT_printf(0, "printf Test: %%-8.6u, 12345 : %-8.6u.\r\n", 12345);
- SEGGER_RTT_printf(0, "printf Test: %%-08u, 12345 : %-08u.\r\n", 12345);
- SEGGER_RTT_printf(0, "printf Test: %%-08.6u, 12345 : %-08.6u.\r\n", 12345);
- SEGGER_RTT_printf(0, "printf Test: %%-0u, 12345 : %-0u.\r\n", 12345);
-
- SEGGER_RTT_printf(0, "printf Test: %%u, -12345 : %u.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%+u, -12345 : %+u.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%.3u, -12345 : %.3u.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%.6u, -12345 : %.6u.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%6.3u, -12345 : %6.3u.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%8.6u, -12345 : %8.6u.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%08u, -12345 : %08u.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%08.6u, -12345 : %08.6u.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%0u, -12345 : %0u.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%-.6u, -12345 : %-.6u.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%-6.3u, -12345 : %-6.3u.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%-8.6u, -12345 : %-8.6u.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%-08u, -12345 : %-08u.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%-08.6u, -12345 : %-08.6u.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%-0u, -12345 : %-0u.\r\n", -12345);
-
- SEGGER_RTT_printf(0, "printf Test: %%d, -12345 : %d.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%+d, -12345 : %+d.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%.3d, -12345 : %.3d.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%.6d, -12345 : %.6d.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%6.3d, -12345 : %6.3d.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%8.6d, -12345 : %8.6d.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%08d, -12345 : %08d.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%08.6d, -12345 : %08.6d.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%0d, -12345 : %0d.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%-.6d, -12345 : %-.6d.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%-6.3d, -12345 : %-6.3d.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%-8.6d, -12345 : %-8.6d.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%-08d, -12345 : %-08d.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%-08.6d, -12345 : %-08.6d.\r\n", -12345);
- SEGGER_RTT_printf(0, "printf Test: %%-0d, -12345 : %-0d.\r\n", -12345);
-
- SEGGER_RTT_printf(0, "printf Test: %%x, 0x1234ABC : %x.\r\n", 0x1234ABC);
- SEGGER_RTT_printf(0, "printf Test: %%+x, 0x1234ABC : %+x.\r\n", 0x1234ABC);
- SEGGER_RTT_printf(0, "printf Test: %%.3x, 0x1234ABC : %.3x.\r\n", 0x1234ABC);
- SEGGER_RTT_printf(0, "printf Test: %%.6x, 0x1234ABC : %.6x.\r\n", 0x1234ABC);
- SEGGER_RTT_printf(0, "printf Test: %%6.3x, 0x1234ABC : %6.3x.\r\n", 0x1234ABC);
- SEGGER_RTT_printf(0, "printf Test: %%8.6x, 0x1234ABC : %8.6x.\r\n", 0x1234ABC);
- SEGGER_RTT_printf(0, "printf Test: %%08x, 0x1234ABC : %08x.\r\n", 0x1234ABC);
- SEGGER_RTT_printf(0, "printf Test: %%08.6x, 0x1234ABC : %08.6x.\r\n", 0x1234ABC);
- SEGGER_RTT_printf(0, "printf Test: %%0x, 0x1234ABC : %0x.\r\n", 0x1234ABC);
- SEGGER_RTT_printf(0, "printf Test: %%-.6x, 0x1234ABC : %-.6x.\r\n", 0x1234ABC);
- SEGGER_RTT_printf(0, "printf Test: %%-6.3x, 0x1234ABC : %-6.3x.\r\n", 0x1234ABC);
- SEGGER_RTT_printf(0, "printf Test: %%-8.6x, 0x1234ABC : %-8.6x.\r\n", 0x1234ABC);
- SEGGER_RTT_printf(0, "printf Test: %%-08x, 0x1234ABC : %-08x.\r\n", 0x1234ABC);
- SEGGER_RTT_printf(0, "printf Test: %%-08.6x, 0x1234ABC : %-08.6x.\r\n", 0x1234ABC);
- SEGGER_RTT_printf(0, "printf Test: %%-0x, 0x1234ABC : %-0x.\r\n", 0x1234ABC);
-
- SEGGER_RTT_printf(0, "printf Test: %%p, &_Cnt : %p.\r\n", &_Cnt);
-
- SEGGER_RTT_WriteString(0, "###### SEGGER_printf() Tests done. ######\r\n");
- do {
- _Cnt++;
- } while (1);
-}
-
-/*************************** End of file ****************************/
+/*********************************************************************
+* SEGGER Microcontroller GmbH *
+* Solutions for real time microcontroller applications *
+**********************************************************************
+* *
+* (c) 1995 - 2018 SEGGER Microcontroller GmbH *
+* *
+* www.segger.com Support: support@segger.com *
+* *
+**********************************************************************
+
+--------- END-OF-HEADER --------------------------------------------
+File : Main_RTT_MenuApp.c
+Purpose : Sample application to demonstrate RTT bi-directional functionality
+*/
+
+#define MAIN_C
+
+#include <stdio.h>
+
+#include "SEGGER_RTT.h"
+
+volatile int _Cnt;
+
+/*********************************************************************
+*
+* main
+*/
+void main(void) {
+
+ SEGGER_RTT_ConfigUpBuffer(0, NULL, NULL, 0, SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL);
+
+ SEGGER_RTT_WriteString(0, "SEGGER Real-Time-Terminal Sample\r\n\r\n");
+ SEGGER_RTT_WriteString(0, "###### Testing SEGGER_printf() ######\r\n");
+
+ SEGGER_RTT_printf(0, "printf Test: %%c, 'S' : %c.\r\n", 'S');
+ SEGGER_RTT_printf(0, "printf Test: %%5c, 'E' : %5c.\r\n", 'E');
+ SEGGER_RTT_printf(0, "printf Test: %%-5c, 'G' : %-5c.\r\n", 'G');
+ SEGGER_RTT_printf(0, "printf Test: %%5.3c, 'G' : %-5c.\r\n", 'G');
+ SEGGER_RTT_printf(0, "printf Test: %%.3c, 'E' : %-5c.\r\n", 'E');
+ SEGGER_RTT_printf(0, "printf Test: %%c, 'R' : %c.\r\n", 'R');
+
+ SEGGER_RTT_printf(0, "printf Test: %%s, \"RTT\" : %s.\r\n", "RTT");
+ SEGGER_RTT_printf(0, "printf Test: %%s, \"RTT\\r\\nRocks.\" : %s.\r\n", "RTT\r\nRocks.");
+
+ SEGGER_RTT_printf(0, "printf Test: %%u, 12345 : %u.\r\n", 12345);
+ SEGGER_RTT_printf(0, "printf Test: %%+u, 12345 : %+u.\r\n", 12345);
+ SEGGER_RTT_printf(0, "printf Test: %%.3u, 12345 : %.3u.\r\n", 12345);
+ SEGGER_RTT_printf(0, "printf Test: %%.6u, 12345 : %.6u.\r\n", 12345);
+ SEGGER_RTT_printf(0, "printf Test: %%6.3u, 12345 : %6.3u.\r\n", 12345);
+ SEGGER_RTT_printf(0, "printf Test: %%8.6u, 12345 : %8.6u.\r\n", 12345);
+ SEGGER_RTT_printf(0, "printf Test: %%08u, 12345 : %08u.\r\n", 12345);
+ SEGGER_RTT_printf(0, "printf Test: %%08.6u, 12345 : %08.6u.\r\n", 12345);
+ SEGGER_RTT_printf(0, "printf Test: %%0u, 12345 : %0u.\r\n", 12345);
+ SEGGER_RTT_printf(0, "printf Test: %%-.6u, 12345 : %-.6u.\r\n", 12345);
+ SEGGER_RTT_printf(0, "printf Test: %%-6.3u, 12345 : %-6.3u.\r\n", 12345);
+ SEGGER_RTT_printf(0, "printf Test: %%-8.6u, 12345 : %-8.6u.\r\n", 12345);
+ SEGGER_RTT_printf(0, "printf Test: %%-08u, 12345 : %-08u.\r\n", 12345);
+ SEGGER_RTT_printf(0, "printf Test: %%-08.6u, 12345 : %-08.6u.\r\n", 12345);
+ SEGGER_RTT_printf(0, "printf Test: %%-0u, 12345 : %-0u.\r\n", 12345);
+
+ SEGGER_RTT_printf(0, "printf Test: %%u, -12345 : %u.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%+u, -12345 : %+u.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%.3u, -12345 : %.3u.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%.6u, -12345 : %.6u.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%6.3u, -12345 : %6.3u.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%8.6u, -12345 : %8.6u.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%08u, -12345 : %08u.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%08.6u, -12345 : %08.6u.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%0u, -12345 : %0u.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%-.6u, -12345 : %-.6u.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%-6.3u, -12345 : %-6.3u.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%-8.6u, -12345 : %-8.6u.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%-08u, -12345 : %-08u.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%-08.6u, -12345 : %-08.6u.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%-0u, -12345 : %-0u.\r\n", -12345);
+
+ SEGGER_RTT_printf(0, "printf Test: %%d, -12345 : %d.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%+d, -12345 : %+d.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%.3d, -12345 : %.3d.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%.6d, -12345 : %.6d.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%6.3d, -12345 : %6.3d.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%8.6d, -12345 : %8.6d.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%08d, -12345 : %08d.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%08.6d, -12345 : %08.6d.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%0d, -12345 : %0d.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%-.6d, -12345 : %-.6d.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%-6.3d, -12345 : %-6.3d.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%-8.6d, -12345 : %-8.6d.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%-08d, -12345 : %-08d.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%-08.6d, -12345 : %-08.6d.\r\n", -12345);
+ SEGGER_RTT_printf(0, "printf Test: %%-0d, -12345 : %-0d.\r\n", -12345);
+
+ SEGGER_RTT_printf(0, "printf Test: %%x, 0x1234ABC : %x.\r\n", 0x1234ABC);
+ SEGGER_RTT_printf(0, "printf Test: %%+x, 0x1234ABC : %+x.\r\n", 0x1234ABC);
+ SEGGER_RTT_printf(0, "printf Test: %%.3x, 0x1234ABC : %.3x.\r\n", 0x1234ABC);
+ SEGGER_RTT_printf(0, "printf Test: %%.6x, 0x1234ABC : %.6x.\r\n", 0x1234ABC);
+ SEGGER_RTT_printf(0, "printf Test: %%6.3x, 0x1234ABC : %6.3x.\r\n", 0x1234ABC);
+ SEGGER_RTT_printf(0, "printf Test: %%8.6x, 0x1234ABC : %8.6x.\r\n", 0x1234ABC);
+ SEGGER_RTT_printf(0, "printf Test: %%08x, 0x1234ABC : %08x.\r\n", 0x1234ABC);
+ SEGGER_RTT_printf(0, "printf Test: %%08.6x, 0x1234ABC : %08.6x.\r\n", 0x1234ABC);
+ SEGGER_RTT_printf(0, "printf Test: %%0x, 0x1234ABC : %0x.\r\n", 0x1234ABC);
+ SEGGER_RTT_printf(0, "printf Test: %%-.6x, 0x1234ABC : %-.6x.\r\n", 0x1234ABC);
+ SEGGER_RTT_printf(0, "printf Test: %%-6.3x, 0x1234ABC : %-6.3x.\r\n", 0x1234ABC);
+ SEGGER_RTT_printf(0, "printf Test: %%-8.6x, 0x1234ABC : %-8.6x.\r\n", 0x1234ABC);
+ SEGGER_RTT_printf(0, "printf Test: %%-08x, 0x1234ABC : %-08x.\r\n", 0x1234ABC);
+ SEGGER_RTT_printf(0, "printf Test: %%-08.6x, 0x1234ABC : %-08.6x.\r\n", 0x1234ABC);
+ SEGGER_RTT_printf(0, "printf Test: %%-0x, 0x1234ABC : %-0x.\r\n", 0x1234ABC);
+
+ SEGGER_RTT_printf(0, "printf Test: %%p, &_Cnt : %p.\r\n", &_Cnt);
+
+ SEGGER_RTT_WriteString(0, "###### SEGGER_printf() Tests done. ######\r\n");
+ do {
+ _Cnt++;
+ } while (1);
+}
+
+/*************************** End of file ****************************/
diff --git a/third_party/jlink/SEGGER_RTT_V640/Examples/Main_RTT_SpeedTestApp.c b/third_party/jlink/SEGGER_RTT_V640/Examples/Main_RTT_SpeedTestApp.c
index 304b16f..0dc0c75 100644
--- a/third_party/jlink/SEGGER_RTT_V640/Examples/Main_RTT_SpeedTestApp.c
+++ b/third_party/jlink/SEGGER_RTT_V640/Examples/Main_RTT_SpeedTestApp.c
@@ -1,69 +1,69 @@
-/*********************************************************************
-* SEGGER Microcontroller GmbH *
-* Solutions for real time microcontroller applications *
-**********************************************************************
-* *
-* (c) 1995 - 2018 SEGGER Microcontroller GmbH *
-* *
-* www.segger.com Support: support@segger.com *
-* *
-**********************************************************************
-
---------- END-OF-HEADER --------------------------------------------
-File : Main_RTT_SpeedTestApp.c
-Purpose : Sample program for measuring RTT performance.
-*/
-
-#include "RTOS.h"
-#include "BSP.h"
-
-#include "SEGGER_RTT.h"
-#include <stdio.h>
-
-OS_STACKPTR int StackHP[128], StackLP[128]; /* Task stacks */
-OS_TASK TCBHP, TCBLP; /* Task-control-blocks */
-
-static void HPTask(void) {
- while (1) {
- //
- // Measure time needed for RTT output
- // Perform dummy write with 0 characters, so we know the overhead of toggling LEDs and RTT in general
- //
-// Set BP here. Then start sampling on scope
- BSP_ClrLED(0);
- SEGGER_RTT_Write(0, 0, 0);
- BSP_SetLED(0);
- BSP_ClrLED(0);
- SEGGER_RTT_Write(0, "01234567890123456789012345678901234567890123456789012345678901234567890123456789\r\n", 82);
- BSP_SetLED(0);
-// Set BP here. Then stop sampling on scope
- OS_Delay(200);
- }
-}
-
-static void LPTask(void) {
- while (1) {
- BSP_ToggleLED(1);
- OS_Delay (500);
- }
-}
-
-/*********************************************************************
-*
-* main
-*
-*********************************************************************/
-
-int main(void) {
- OS_IncDI(); /* Initially disable interrupts */
- OS_InitKern(); /* Initialize OS */
- OS_InitHW(); /* Initialize Hardware for OS */
- BSP_Init(); /* Initialize LED ports */
- BSP_SetLED(0);
- /* You need to create at least one task before calling OS_Start() */
- OS_CREATETASK(&TCBHP, "HP Task", HPTask, 100, StackHP);
- OS_CREATETASK(&TCBLP, "LP Task", LPTask, 50, StackLP);
- OS_Start(); /* Start multitasking */
- return 0;
-}
-
+/*********************************************************************
+* SEGGER Microcontroller GmbH *
+* Solutions for real time microcontroller applications *
+**********************************************************************
+* *
+* (c) 1995 - 2018 SEGGER Microcontroller GmbH *
+* *
+* www.segger.com Support: support@segger.com *
+* *
+**********************************************************************
+
+--------- END-OF-HEADER --------------------------------------------
+File : Main_RTT_SpeedTestApp.c
+Purpose : Sample program for measuring RTT performance.
+*/
+
+#include "RTOS.h"
+#include "BSP.h"
+
+#include "SEGGER_RTT.h"
+#include <stdio.h>
+
+OS_STACKPTR int StackHP[128], StackLP[128]; /* Task stacks */
+OS_TASK TCBHP, TCBLP; /* Task-control-blocks */
+
+static void HPTask(void) {
+ while (1) {
+ //
+ // Measure time needed for RTT output
+ // Perform dummy write with 0 characters, so we know the overhead of toggling LEDs and RTT in general
+ //
+// Set BP here. Then start sampling on scope
+ BSP_ClrLED(0);
+ SEGGER_RTT_Write(0, 0, 0);
+ BSP_SetLED(0);
+ BSP_ClrLED(0);
+ SEGGER_RTT_Write(0, "01234567890123456789012345678901234567890123456789012345678901234567890123456789\r\n", 82);
+ BSP_SetLED(0);
+// Set BP here. Then stop sampling on scope
+ OS_Delay(200);
+ }
+}
+
+static void LPTask(void) {
+ while (1) {
+ BSP_ToggleLED(1);
+ OS_Delay (500);
+ }
+}
+
+/*********************************************************************
+*
+* main
+*
+*********************************************************************/
+
+int main(void) {
+ OS_IncDI(); /* Initially disable interrupts */
+ OS_InitKern(); /* Initialize OS */
+ OS_InitHW(); /* Initialize Hardware for OS */
+ BSP_Init(); /* Initialize LED ports */
+ BSP_SetLED(0);
+ /* You need to create at least one task before calling OS_Start() */
+ OS_CREATETASK(&TCBHP, "HP Task", HPTask, 100, StackHP);
+ OS_CREATETASK(&TCBLP, "LP Task", LPTask, 50, StackLP);
+ OS_Start(); /* Start multitasking */
+ return 0;
+}
+
diff --git a/third_party/jlink/SEGGER_RTT_V640/License.txt b/third_party/jlink/SEGGER_RTT_V640/License.txt
index 263093a..bfe93b3 100644
--- a/third_party/jlink/SEGGER_RTT_V640/License.txt
+++ b/third_party/jlink/SEGGER_RTT_V640/License.txt
@@ -1,44 +1,44 @@
-Important - Read carefully:
-
-SEGGER RTT - Real Time Transfer for embedded targets
-
-All rights reserved.
-
-SEGGER strongly recommends to not make any changes
-to or modify the source code of this software in order to stay
-compatible with the RTT protocol and J-Link.
-
-Redistribution and use in source and binary forms, with or
-without modification, are permitted provided that the following
-conditions are met:
-
-o Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
-
-o Redistributions in binary form must reproduce the above
- copyright notice, this list of conditions and the following
- disclaimer in the documentation and/or other materials provided
- with the distribution.
-
-o Neither the name of SEGGER Microcontroller GmbH
- nor the names of its contributors may be used to endorse or
- promote products derived from this software without specific
- prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
-CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
-INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR
-ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
-OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
-OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
-USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
-DAMAGE.
-
-
-(c) 2014 - 2016 SEGGER Microcontroller GmbH
-www.segger.com
+Important - Read carefully:
+
+SEGGER RTT - Real Time Transfer for embedded targets
+
+All rights reserved.
+
+SEGGER strongly recommends to not make any changes
+to or modify the source code of this software in order to stay
+compatible with the RTT protocol and J-Link.
+
+Redistribution and use in source and binary forms, with or
+without modification, are permitted provided that the following
+conditions are met:
+
+o Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+
+o Redistributions in binary form must reproduce the above
+ copyright notice, this list of conditions and the following
+ disclaimer in the documentation and/or other materials provided
+ with the distribution.
+
+o Neither the name of SEGGER Microcontroller GmbH
+ nor the names of its contributors may be used to endorse or
+ promote products derived from this software without specific
+ prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+DAMAGE.
+
+
+(c) 2014 - 2016 SEGGER Microcontroller GmbH
+www.segger.com
diff --git a/third_party/jlink/SEGGER_RTT_V640/README.txt b/third_party/jlink/SEGGER_RTT_V640/README.txt
index 4dd23eb..49ec655 100644
--- a/third_party/jlink/SEGGER_RTT_V640/README.txt
+++ b/third_party/jlink/SEGGER_RTT_V640/README.txt
@@ -1,20 +1,20 @@
-README.txt for the SEGGER RTT Implementation Pack.
-
-Included files:
-===============
-Root Directory
- - Examples
- - Main_RTT_InputEchoApp.c - Sample application which echoes input on Channel 0.
- - Main_RTT_MenuApp.c - Sample application to demonstrate RTT bi-directional functionality.
- - Main_RTT_PrintfTest.c - Sample application to test RTT small printf implementation.
- - Main_RTT_SpeedTestApp.c - Sample application for measuring RTT performance. embOS needed.
- - RTT
- - SEGGER_RTT.c - The RTT implementation.
- - SEGGER_RTT.h - Header for RTT implementation.
- - SEGGER_RTT_Conf.h - Pre-processor configuration for the RTT implementation.
- - SEGGER_RTT_Printf.c - Simple implementation of printf to write formatted strings via RTT.
- - Syscalls
- - RTT_Syscalls_GCC.c - Low-level syscalls to retarget printf() to RTT with GCC / Newlib.
- - RTT_Syscalls_IAR.c - Low-level syscalls to retarget printf() to RTT with IAR compiler.
- - RTT_Syscalls_KEIL.c - Low-level syscalls to retarget printf() to RTT with KEIL/uVision compiler.
- - RTT_Syscalls_SES.c - Low-level syscalls to retarget printf() to RTT with SEGGER Embedded Studio.
+README.txt for the SEGGER RTT Implementation Pack.
+
+Included files:
+===============
+Root Directory
+ - Examples
+ - Main_RTT_InputEchoApp.c - Sample application which echoes input on Channel 0.
+ - Main_RTT_MenuApp.c - Sample application to demonstrate RTT bi-directional functionality.
+ - Main_RTT_PrintfTest.c - Sample application to test RTT small printf implementation.
+ - Main_RTT_SpeedTestApp.c - Sample application for measuring RTT performance. embOS needed.
+ - RTT
+ - SEGGER_RTT.c - The RTT implementation.
+ - SEGGER_RTT.h - Header for RTT implementation.
+ - SEGGER_RTT_Conf.h - Pre-processor configuration for the RTT implementation.
+ - SEGGER_RTT_Printf.c - Simple implementation of printf to write formatted strings via RTT.
+ - Syscalls
+ - RTT_Syscalls_GCC.c - Low-level syscalls to retarget printf() to RTT with GCC / Newlib.
+ - RTT_Syscalls_IAR.c - Low-level syscalls to retarget printf() to RTT with IAR compiler.
+ - RTT_Syscalls_KEIL.c - Low-level syscalls to retarget printf() to RTT with KEIL/uVision compiler.
+ - RTT_Syscalls_SES.c - Low-level syscalls to retarget printf() to RTT with SEGGER Embedded Studio.
diff --git a/third_party/jlink/SEGGER_RTT_V640/RTT/SEGGER_RTT.c b/third_party/jlink/SEGGER_RTT_V640/RTT/SEGGER_RTT.c
index 8f27880..8fc0f6c 100644
--- a/third_party/jlink/SEGGER_RTT_V640/RTT/SEGGER_RTT.c
+++ b/third_party/jlink/SEGGER_RTT_V640/RTT/SEGGER_RTT.c
@@ -1,1761 +1,1761 @@
-/*********************************************************************
-* SEGGER Microcontroller GmbH *
-* The Embedded Experts *
-**********************************************************************
-* *
-* (c) 1995 - 2018 SEGGER Microcontroller GmbH *
-* *
-* www.segger.com Support: support@segger.com *
-* *
-**********************************************************************
-* *
-* SEGGER RTT * Real Time Transfer for embedded targets *
-* *
-**********************************************************************
-* *
-* All rights reserved. *
-* *
-* SEGGER strongly recommends to not make any changes *
-* to or modify the source code of this software in order to stay *
-* compatible with the RTT protocol and J-Link. *
-* *
-* Redistribution and use in source and binary forms, with or *
-* without modification, are permitted provided that the following *
-* conditions are met: *
-* *
-* o Redistributions of source code must retain the above copyright *
-* notice, this list of conditions and the following disclaimer. *
-* *
-* o Redistributions in binary form must reproduce the above *
-* copyright notice, this list of conditions and the following *
-* disclaimer in the documentation and/or other materials provided *
-* with the distribution. *
-* *
-* o Neither the name of SEGGER Microcontroller GmbH *
-* nor the names of its contributors may be used to endorse or *
-* promote products derived from this software without specific *
-* prior written permission. *
-* *
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
-* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
-* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
-* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
-* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
-* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
-* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
-* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
-* DAMAGE. *
-* *
-**********************************************************************
----------------------------END-OF-HEADER------------------------------
-File : SEGGER_RTT.c
-Purpose : Implementation of SEGGER real-time transfer (RTT) which
- allows real-time communication on targets which support
- debugger memory accesses while the CPU is running.
-Revision: $Rev: 12804 $
-
-Additional information:
- Type "int" is assumed to be 32-bits in size
- H->T Host to target communication
- T->H Target to host communication
-
- RTT channel 0 is always present and reserved for Terminal usage.
- Name is fixed to "Terminal"
-
- Effective buffer size: SizeOfBuffer - 1
-
- WrOff == RdOff: Buffer is empty
- WrOff == (RdOff - 1): Buffer is full
- WrOff > RdOff: Free space includes wrap-around
- WrOff < RdOff: Used space includes wrap-around
- (WrOff == (SizeOfBuffer - 1)) && (RdOff == 0):
- Buffer full and wrap-around after next byte
-
-
-----------------------------------------------------------------------
-*/
-
-#include "SEGGER_RTT.h"
-
-#include <string.h> // for memcpy
-
-/*********************************************************************
-*
-* Configuration, default values
-*
-**********************************************************************
-*/
-
-#ifndef BUFFER_SIZE_UP
- #define BUFFER_SIZE_UP 1024 // Size of the buffer for terminal output of target, up to host
-#endif
-
-#ifndef BUFFER_SIZE_DOWN
- #define BUFFER_SIZE_DOWN 16 // Size of the buffer for terminal input to target from host (Usually keyboard input)
-#endif
-
-#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS
- #define SEGGER_RTT_MAX_NUM_UP_BUFFERS 2 // Number of up-buffers (T->H) available on this target
-#endif
-
-#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS
- #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS 2 // Number of down-buffers (H->T) available on this target
-#endif
-
-#ifndef SEGGER_RTT_BUFFER_SECTION
- #if defined(SEGGER_RTT_SECTION)
- #define SEGGER_RTT_BUFFER_SECTION SEGGER_RTT_SECTION
- #endif
-#endif
-
-#ifndef SEGGER_RTT_ALIGNMENT
- #define SEGGER_RTT_ALIGNMENT 0
-#endif
-
-#ifndef SEGGER_RTT_BUFFER_ALIGNMENT
- #define SEGGER_RTT_BUFFER_ALIGNMENT 0
-#endif
-
-#ifndef SEGGER_RTT_MODE_DEFAULT
- #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP
-#endif
-
-#ifndef SEGGER_RTT_LOCK
- #define SEGGER_RTT_LOCK()
-#endif
-
-#ifndef SEGGER_RTT_UNLOCK
- #define SEGGER_RTT_UNLOCK()
-#endif
-
-#ifndef STRLEN
- #define STRLEN(a) strlen((a))
-#endif
-
-#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP
- #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0
-#endif
-
-#ifndef SEGGER_RTT_MEMCPY
- #ifdef MEMCPY
- #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) MEMCPY((pDest), (pSrc), (NumBytes))
- #else
- #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) memcpy((pDest), (pSrc), (NumBytes))
- #endif
-#endif
-
-#ifndef MIN
- #define MIN(a, b) (((a) < (b)) ? (a) : (b))
-#endif
-
-#ifndef MAX
- #define MAX(a, b) (((a) > (b)) ? (a) : (b))
-#endif
-//
-// For some environments, NULL may not be defined until certain headers are included
-//
-#ifndef NULL
- #define NULL 0
-#endif
-
-/*********************************************************************
-*
-* Defines, fixed
-*
-**********************************************************************
-*/
-#if (defined __ICCARM__) || (defined __ICCRX__)
- #define RTT_PRAGMA(P) _Pragma(#P)
-#endif
-
-#if SEGGER_RTT_ALIGNMENT || SEGGER_RTT_BUFFER_ALIGNMENT
- #if (defined __GNUC__)
- #define SEGGER_RTT_ALIGN(Var, Alignment) Var __attribute__ ((aligned (Alignment)))
- #elif (defined __ICCARM__) || (defined __ICCRX__)
- #define PRAGMA(A) _Pragma(#A)
-#define SEGGER_RTT_ALIGN(Var, Alignment) RTT_PRAGMA(data_alignment=Alignment) \
- Var
- #elif (defined __CC_ARM)
- #define SEGGER_RTT_ALIGN(Var, Alignment) Var __attribute__ ((aligned (Alignment)))
- #else
- #error "Alignment not supported for this compiler."
- #endif
-#else
- #define SEGGER_RTT_ALIGN(Var, Alignment) Var
-#endif
-
-#if defined(SEGGER_RTT_SECTION) || defined (SEGGER_RTT_BUFFER_SECTION)
- #if (defined __GNUC__)
- #define SEGGER_RTT_PUT_SECTION(Var, Section) __attribute__ ((section (Section))) Var
- #elif (defined __ICCARM__) || (defined __ICCRX__)
-#define SEGGER_RTT_PUT_SECTION(Var, Section) RTT_PRAGMA(location=Section) \
- Var
- #elif (defined __CC_ARM)
- #define SEGGER_RTT_PUT_SECTION(Var, Section) __attribute__ ((section (Section), zero_init)) Var
- #else
- #error "Section placement not supported for this compiler."
- #endif
-#else
- #define SEGGER_RTT_PUT_SECTION(Var, Section) Var
-#endif
-
-
-#if SEGGER_RTT_ALIGNMENT
- #define SEGGER_RTT_CB_ALIGN(Var) SEGGER_RTT_ALIGN(Var, SEGGER_RTT_ALIGNMENT)
-#else
- #define SEGGER_RTT_CB_ALIGN(Var) Var
-#endif
-
-#if SEGGER_RTT_BUFFER_ALIGNMENT
- #define SEGGER_RTT_BUFFER_ALIGN(Var) SEGGER_RTT_ALIGN(Var, SEGGER_RTT_BUFFER_ALIGNMENT)
-#else
- #define SEGGER_RTT_BUFFER_ALIGN(Var) Var
-#endif
-
-
-#if defined(SEGGER_RTT_SECTION)
- #define SEGGER_RTT_PUT_CB_SECTION(Var) SEGGER_RTT_PUT_SECTION(Var, SEGGER_RTT_SECTION)
-#else
- #define SEGGER_RTT_PUT_CB_SECTION(Var) Var
-#endif
-
-#if defined(SEGGER_RTT_BUFFER_SECTION)
- #define SEGGER_RTT_PUT_BUFFER_SECTION(Var) SEGGER_RTT_PUT_SECTION(Var, SEGGER_RTT_BUFFER_SECTION)
-#else
- #define SEGGER_RTT_PUT_BUFFER_SECTION(Var) Var
-#endif
-
-/*********************************************************************
-*
-* Static const data
-*
-**********************************************************************
-*/
-
-static unsigned char _aTerminalId[16] = { '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C', 'D', 'E', 'F' };
-
-/*********************************************************************
-*
-* Static data
-*
-**********************************************************************
-*/
-//
-// RTT Control Block and allocate buffers for channel 0
-//
-SEGGER_RTT_PUT_CB_SECTION(SEGGER_RTT_CB_ALIGN(SEGGER_RTT_CB _SEGGER_RTT));
-
-SEGGER_RTT_PUT_BUFFER_SECTION(SEGGER_RTT_BUFFER_ALIGN(static char _acUpBuffer [BUFFER_SIZE_UP]));
-SEGGER_RTT_PUT_BUFFER_SECTION(SEGGER_RTT_BUFFER_ALIGN(static char _acDownBuffer[BUFFER_SIZE_DOWN]));
-
-static char _ActiveTerminal;
-
-/*********************************************************************
-*
-* Static functions
-*
-**********************************************************************
-*/
-
-/*********************************************************************
-*
-* _DoInit()
-*
-* Function description
-* Initializes the control block an buffers.
-* May only be called via INIT() to avoid overriding settings.
-*
-*/
-#define INIT() do { \
- if (_SEGGER_RTT.acID[0] == '\0') { _DoInit(); } \
- } while (0)
-static void _DoInit(void) {
- SEGGER_RTT_CB* p;
- //
- // Initialize control block
- //
- p = &_SEGGER_RTT;
- p->MaxNumUpBuffers = SEGGER_RTT_MAX_NUM_UP_BUFFERS;
- p->MaxNumDownBuffers = SEGGER_RTT_MAX_NUM_DOWN_BUFFERS;
- //
- // Initialize up buffer 0
- //
- p->aUp[0].sName = "Terminal";
- p->aUp[0].pBuffer = _acUpBuffer;
- p->aUp[0].SizeOfBuffer = sizeof(_acUpBuffer);
- p->aUp[0].RdOff = 0u;
- p->aUp[0].WrOff = 0u;
- p->aUp[0].Flags = SEGGER_RTT_MODE_DEFAULT;
- //
- // Initialize down buffer 0
- //
- p->aDown[0].sName = "Terminal";
- p->aDown[0].pBuffer = _acDownBuffer;
- p->aDown[0].SizeOfBuffer = sizeof(_acDownBuffer);
- p->aDown[0].RdOff = 0u;
- p->aDown[0].WrOff = 0u;
- p->aDown[0].Flags = SEGGER_RTT_MODE_DEFAULT;
- //
- // Finish initialization of the control block.
- // Copy Id string in three steps to make sure "SEGGER RTT" is not found
- // in initializer memory (usually flash) by J-Link
- //
- strcpy(&p->acID[7], "RTT");
- strcpy(&p->acID[0], "SEGGER");
- p->acID[6] = ' ';
-}
-
-/*********************************************************************
-*
-* _WriteBlocking()
-*
-* Function description
-* Stores a specified number of characters in SEGGER RTT ring buffer
-* and updates the associated write pointer which is periodically
-* read by the host.
-* The caller is responsible for managing the write chunk sizes as
-* _WriteBlocking() will block until all data has been posted successfully.
-*
-* Parameters
-* pRing Ring buffer to post to.
-* pBuffer Pointer to character array. Does not need to point to a \0 terminated string.
-* NumBytes Number of bytes to be stored in the SEGGER RTT control block.
-*
-* Return value
-* >= 0 - Number of bytes written into buffer.
-*/
-static unsigned _WriteBlocking(SEGGER_RTT_BUFFER_UP* pRing, const char* pBuffer, unsigned NumBytes) {
- unsigned NumBytesToWrite;
- unsigned NumBytesWritten;
- unsigned RdOff;
- unsigned WrOff;
-#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
- char* pDst;
-#endif
- //
- // Write data to buffer and handle wrap-around if necessary
- //
- NumBytesWritten = 0u;
- WrOff = pRing->WrOff;
- do {
- RdOff = pRing->RdOff; // May be changed by host (debug probe) in the meantime
- if (RdOff > WrOff) {
- NumBytesToWrite = RdOff - WrOff - 1u;
- } else {
- NumBytesToWrite = pRing->SizeOfBuffer - (WrOff - RdOff + 1u);
- }
- NumBytesToWrite = MIN(NumBytesToWrite, (pRing->SizeOfBuffer - WrOff)); // Number of bytes that can be written until buffer wrap-around
- NumBytesToWrite = MIN(NumBytesToWrite, NumBytes);
-#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
- pDst = pRing->pBuffer + WrOff;
- NumBytesWritten += NumBytesToWrite;
- NumBytes -= NumBytesToWrite;
- WrOff += NumBytesToWrite;
- while (NumBytesToWrite--) {
- *pDst++ = *pBuffer++;
- };
-#else
- SEGGER_RTT_MEMCPY(pRing->pBuffer + WrOff, pBuffer, NumBytesToWrite);
- NumBytesWritten += NumBytesToWrite;
- pBuffer += NumBytesToWrite;
- NumBytes -= NumBytesToWrite;
- WrOff += NumBytesToWrite;
-#endif
- if (WrOff == pRing->SizeOfBuffer) {
- WrOff = 0u;
- }
- pRing->WrOff = WrOff;
- } while (NumBytes);
- //
- return NumBytesWritten;
-}
-
-/*********************************************************************
-*
-* _WriteNoCheck()
-*
-* Function description
-* Stores a specified number of characters in SEGGER RTT ring buffer
-* and updates the associated write pointer which is periodically
-* read by the host.
-* It is callers responsibility to make sure data actually fits in buffer.
-*
-* Parameters
-* pRing Ring buffer to post to.
-* pBuffer Pointer to character array. Does not need to point to a \0 terminated string.
-* NumBytes Number of bytes to be stored in the SEGGER RTT control block.
-*
-* Notes
-* (1) If there might not be enough space in the "Up"-buffer, call _WriteBlocking
-*/
-static void _WriteNoCheck(SEGGER_RTT_BUFFER_UP* pRing, const char* pData, unsigned NumBytes) {
- unsigned NumBytesAtOnce;
- unsigned WrOff;
- unsigned Rem;
-#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
- char* pDst;
-#endif
-
- WrOff = pRing->WrOff;
- Rem = pRing->SizeOfBuffer - WrOff;
- if (Rem > NumBytes) {
- //
- // All data fits before wrap around
- //
-#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
- pDst = pRing->pBuffer + WrOff;
- WrOff += NumBytes;
- while (NumBytes--) {
- *pDst++ = *pData++;
- };
- pRing->WrOff = WrOff;
-#else
- SEGGER_RTT_MEMCPY(pRing->pBuffer + WrOff, pData, NumBytes);
- pRing->WrOff = WrOff + NumBytes;
-#endif
- } else {
- //
- // We reach the end of the buffer, so need to wrap around
- //
-#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
- pDst = pRing->pBuffer + WrOff;
- NumBytesAtOnce = Rem;
- while (NumBytesAtOnce--) {
- *pDst++ = *pData++;
- };
- pDst = pRing->pBuffer;
- NumBytesAtOnce = NumBytes - Rem;
- while (NumBytesAtOnce--) {
- *pDst++ = *pData++;
- };
- pRing->WrOff = NumBytes - Rem;
-#else
- NumBytesAtOnce = Rem;
- SEGGER_RTT_MEMCPY(pRing->pBuffer + WrOff, pData, NumBytesAtOnce);
- NumBytesAtOnce = NumBytes - Rem;
- SEGGER_RTT_MEMCPY(pRing->pBuffer, pData + Rem, NumBytesAtOnce);
- pRing->WrOff = NumBytesAtOnce;
-#endif
- }
-}
-
-/*********************************************************************
-*
-* _PostTerminalSwitch()
-*
-* Function description
-* Switch terminal to the given terminal ID. It is the caller's
-* responsibility to ensure the terminal ID is correct and there is
-* enough space in the buffer for this to complete successfully.
-*
-* Parameters
-* pRing Ring buffer to post to.
-* TerminalId Terminal ID to switch to.
-*/
-static void _PostTerminalSwitch(SEGGER_RTT_BUFFER_UP* pRing, unsigned char TerminalId) {
- unsigned char ac[2];
-
- ac[0] = 0xFFu;
- ac[1] = _aTerminalId[TerminalId]; // Caller made already sure that TerminalId does not exceed our terminal limit
- _WriteBlocking(pRing, (const char*)ac, 2u);
-}
-
-/*********************************************************************
-*
-* _GetAvailWriteSpace()
-*
-* Function description
-* Returns the number of bytes that can be written to the ring
-* buffer without blocking.
-*
-* Parameters
-* pRing Ring buffer to check.
-*
-* Return value
-* Number of bytes that are free in the buffer.
-*/
-static unsigned _GetAvailWriteSpace(SEGGER_RTT_BUFFER_UP* pRing) {
- unsigned RdOff;
- unsigned WrOff;
- unsigned r;
- //
- // Avoid warnings regarding volatile access order. It's not a problem
- // in this case, but dampen compiler enthusiasm.
- //
- RdOff = pRing->RdOff;
- WrOff = pRing->WrOff;
- if (RdOff <= WrOff) {
- r = pRing->SizeOfBuffer - 1u - WrOff + RdOff;
- } else {
- r = RdOff - WrOff - 1u;
- }
- return r;
-}
-
-/*********************************************************************
-*
-* Public code
-*
-**********************************************************************
-*/
-/*********************************************************************
-*
-* SEGGER_RTT_ReadNoLock()
-*
-* Function description
-* Reads characters from SEGGER real-time-terminal control block
-* which have been previously stored by the host.
-* Do not lock against interrupts and multiple access.
-*
-* Parameters
-* BufferIndex Index of Down-buffer to be used (e.g. 0 for "Terminal").
-* pBuffer Pointer to buffer provided by target application, to copy characters from RTT-down-buffer to.
-* BufferSize Size of the target application buffer.
-*
-* Return value
-* Number of bytes that have been read.
-*/
-unsigned SEGGER_RTT_ReadNoLock(unsigned BufferIndex, void* pData, unsigned BufferSize) {
- unsigned NumBytesRem;
- unsigned NumBytesRead;
- unsigned RdOff;
- unsigned WrOff;
- unsigned char* pBuffer;
- SEGGER_RTT_BUFFER_DOWN* pRing;
-#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
- const char* pSrc;
-#endif
- //
- INIT();
- pRing = &_SEGGER_RTT.aDown[BufferIndex];
- pBuffer = (unsigned char*)pData;
- RdOff = pRing->RdOff;
- WrOff = pRing->WrOff;
- NumBytesRead = 0u;
- //
- // Read from current read position to wrap-around of buffer, first
- //
- if (RdOff > WrOff) {
- NumBytesRem = pRing->SizeOfBuffer - RdOff;
- NumBytesRem = MIN(NumBytesRem, BufferSize);
-#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
- pSrc = pRing->pBuffer + RdOff;
- NumBytesRead += NumBytesRem;
- BufferSize -= NumBytesRem;
- RdOff += NumBytesRem;
- while (NumBytesRem--) {
- *pBuffer++ = *pSrc++;
- };
-#else
- SEGGER_RTT_MEMCPY(pBuffer, pRing->pBuffer + RdOff, NumBytesRem);
- NumBytesRead += NumBytesRem;
- pBuffer += NumBytesRem;
- BufferSize -= NumBytesRem;
- RdOff += NumBytesRem;
-#endif
- //
- // Handle wrap-around of buffer
- //
- if (RdOff == pRing->SizeOfBuffer) {
- RdOff = 0u;
- }
- }
- //
- // Read remaining items of buffer
- //
- NumBytesRem = WrOff - RdOff;
- NumBytesRem = MIN(NumBytesRem, BufferSize);
- if (NumBytesRem > 0u) {
-#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
- pSrc = pRing->pBuffer + RdOff;
- NumBytesRead += NumBytesRem;
- BufferSize -= NumBytesRem;
- RdOff += NumBytesRem;
- while (NumBytesRem--) {
- *pBuffer++ = *pSrc++;
- };
-#else
- SEGGER_RTT_MEMCPY(pBuffer, pRing->pBuffer + RdOff, NumBytesRem);
- NumBytesRead += NumBytesRem;
- pBuffer += NumBytesRem;
- BufferSize -= NumBytesRem;
- RdOff += NumBytesRem;
-#endif
- }
- if (NumBytesRead) {
- pRing->RdOff = RdOff;
- }
- //
- return NumBytesRead;
-}
-
-/*********************************************************************
-*
-* SEGGER_RTT_Read
-*
-* Function description
-* Reads characters from SEGGER real-time-terminal control block
-* which have been previously stored by the host.
-*
-* Parameters
-* BufferIndex Index of Down-buffer to be used (e.g. 0 for "Terminal").
-* pBuffer Pointer to buffer provided by target application, to copy characters from RTT-down-buffer to.
-* BufferSize Size of the target application buffer.
-*
-* Return value
-* Number of bytes that have been read.
-*/
-unsigned SEGGER_RTT_Read(unsigned BufferIndex, void* pBuffer, unsigned BufferSize) {
- unsigned NumBytesRead;
- //
- SEGGER_RTT_LOCK();
- //
- // Call the non-locking read function
- //
- NumBytesRead = SEGGER_RTT_ReadNoLock(BufferIndex, pBuffer, BufferSize);
- //
- // Finish up.
- //
- SEGGER_RTT_UNLOCK();
- //
- return NumBytesRead;
-}
-
-/*********************************************************************
-*
-* SEGGER_RTT_WriteWithOverwriteNoLock
-*
-* Function description
-* Stores a specified number of characters in SEGGER RTT
-* control block.
-* SEGGER_RTT_WriteWithOverwriteNoLock does not lock the application
-* and overwrites data if the data does not fit into the buffer.
-*
-* Parameters
-* BufferIndex Index of "Up"-buffer to be used (e.g. 0 for "Terminal").
-* pBuffer Pointer to character array. Does not need to point to a \0 terminated string.
-* NumBytes Number of bytes to be stored in the SEGGER RTT control block.
-*
-* Notes
-* (1) If there is not enough space in the "Up"-buffer, data is overwritten.
-* (2) For performance reasons this function does not call Init()
-* and may only be called after RTT has been initialized.
-* Either by calling SEGGER_RTT_Init() or calling another RTT API function first.
-* (3) Do not use SEGGER_RTT_WriteWithOverwriteNoLock if a J-Link
-* connection reads RTT data.
-*/
-void SEGGER_RTT_WriteWithOverwriteNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) {
- const char* pData;
- SEGGER_RTT_BUFFER_UP* pRing;
- unsigned Avail;
-#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
- char* pDst;
-#endif
-
- pData = (const char *)pBuffer;
- //
- // Get "to-host" ring buffer and copy some elements into local variables.
- //
- pRing = &_SEGGER_RTT.aUp[BufferIndex];
- //
- // Check if we will overwrite data and need to adjust the RdOff.
- //
- if (pRing->WrOff == pRing->RdOff) {
- Avail = pRing->SizeOfBuffer - 1u;
- } else if ( pRing->WrOff < pRing->RdOff) {
- Avail = pRing->RdOff - pRing->WrOff - 1u;
- } else {
- Avail = pRing->RdOff - pRing->WrOff - 1u + pRing->SizeOfBuffer;
- }
- if (NumBytes > Avail) {
- pRing->RdOff += (NumBytes - Avail);
- while (pRing->RdOff >= pRing->SizeOfBuffer) {
- pRing->RdOff -= pRing->SizeOfBuffer;
- }
- }
- //
- // Write all data, no need to check the RdOff, but possibly handle multiple wrap-arounds
- //
- Avail = pRing->SizeOfBuffer - pRing->WrOff;
- do {
- if (Avail > NumBytes) {
- //
- // Last round
- //
-#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
- pDst = pRing->pBuffer + pRing->WrOff;
- Avail = NumBytes;
- while (NumBytes--) {
- *pDst++ = *pData++;
- };
- pRing->WrOff += Avail;
-#else
- SEGGER_RTT_MEMCPY(pRing->pBuffer + pRing->WrOff, pData, NumBytes);
- pRing->WrOff += NumBytes;
-#endif
- break;
- } else {
- //
- // Wrap-around necessary, write until wrap-around and reset WrOff
- //
-#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
- pDst = pRing->pBuffer + pRing->WrOff;
- NumBytes -= Avail;
- while (Avail--) {
- *pDst++ = *pData++;
- };
- pRing->WrOff = 0;
-#else
- SEGGER_RTT_MEMCPY(pRing->pBuffer + pRing->WrOff, pData, Avail);
- pData += Avail;
- pRing->WrOff = 0;
- NumBytes -= Avail;
-#endif
- Avail = (pRing->SizeOfBuffer - 1);
- }
- } while (NumBytes);
-}
-
-/*********************************************************************
-*
-* SEGGER_RTT_WriteSkipNoLock
-*
-* Function description
-* Stores a specified number of characters in SEGGER RTT
-* control block which is then read by the host.
-* SEGGER_RTT_WriteSkipNoLock does not lock the application and
-* skips all data, if the data does not fit into the buffer.
-*
-* Parameters
-* BufferIndex Index of "Up"-buffer to be used (e.g. 0 for "Terminal").
-* pBuffer Pointer to character array. Does not need to point to a \0 terminated string.
-* NumBytes Number of bytes to be stored in the SEGGER RTT control block.
-*
-* Return value
-* Number of bytes which have been stored in the "Up"-buffer.
-*
-* Notes
-* (1) If there is not enough space in the "Up"-buffer, all data is dropped.
-* (2) For performance reasons this function does not call Init()
-* and may only be called after RTT has been initialized.
-* Either by calling SEGGER_RTT_Init() or calling another RTT API function first.
-*/
-unsigned SEGGER_RTT_WriteSkipNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) {
- const char* pData;
- SEGGER_RTT_BUFFER_UP* pRing;
- unsigned Avail;
- unsigned RdOff;
- unsigned WrOff;
- unsigned Rem;
-#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
- char* pDst;
-#endif
-
- pData = (const char *)pBuffer;
- //
- // Get "to-host" ring buffer and copy some elements into local variables.
- //
- pRing = &_SEGGER_RTT.aUp[BufferIndex];
- RdOff = pRing->RdOff;
- WrOff = pRing->WrOff;
- //
- // Handle the most common cases fastest.
- // Which is:
- // RdOff <= WrOff -> Space until wrap around is free.
- // AND
- // WrOff + NumBytes < SizeOfBuffer -> No Wrap around necessary.
- //
- // OR
- //
- // RdOff > WrOff -> Space until RdOff - 1 is free.
- // AND
- // WrOff + NumBytes < RdOff -> Data fits into buffer
- //
- if (RdOff <= WrOff) {
- //
- // Get space until WrOff will be at wrap around.
- //
- Avail = pRing->SizeOfBuffer - 1u - WrOff ;
- if (Avail >= NumBytes) {
-#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
- pDst = pRing->pBuffer + WrOff;
- WrOff += NumBytes;
- while (NumBytes--) {
- *pDst++ = *pData++;
- };
- pRing->WrOff = WrOff;
-#else
- SEGGER_RTT_MEMCPY(pRing->pBuffer + WrOff, pData, NumBytes);
- pRing->WrOff = WrOff + NumBytes;
-#endif
- return 1;
- }
- //
- // If data did not fit into space until wrap around calculate complete space in buffer.
- //
- Avail += RdOff;
- //
- // If there is still no space for the whole of this output, don't bother.
- //
- if (Avail >= NumBytes) {
- //
- // OK, we have enough space in buffer. Copy in one or 2 chunks
- //
- Rem = pRing->SizeOfBuffer - WrOff; // Space until end of buffer
- if (Rem > NumBytes) {
-#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
- pDst = pRing->pBuffer + WrOff;
- WrOff += NumBytes;
- while (NumBytes--) {
- *pDst++ = *pData++;
- };
- pRing->WrOff = WrOff;
-#else
- SEGGER_RTT_MEMCPY(pRing->pBuffer + WrOff, pData, NumBytes);
- pRing->WrOff = WrOff + NumBytes;
-#endif
- } else {
- //
- // We reach the end of the buffer, so need to wrap around
- //
-#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
- pDst = pRing->pBuffer + WrOff;
- NumBytes -= Rem;
- WrOff = NumBytes;
- do {
- *pDst++ = *pData++;
- } while (--Rem);
- pDst = pRing->pBuffer;
- while (NumBytes--) {
- *pDst++ = *pData++;
- };
- pRing->WrOff = WrOff;
-#else
- SEGGER_RTT_MEMCPY(pRing->pBuffer + WrOff, pData, Rem);
- SEGGER_RTT_MEMCPY(pRing->pBuffer, pData + Rem, NumBytes - Rem);
- pRing->WrOff = NumBytes - Rem;
-#endif
- }
- return 1;
- }
- } else {
- Avail = RdOff - WrOff - 1u;
- if (Avail >= NumBytes) {
-#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
- pDst = pRing->pBuffer + WrOff;
- WrOff += NumBytes;
- while (NumBytes--) {
- *pDst++ = *pData++;
- };
- pRing->WrOff = WrOff;
-#else
- SEGGER_RTT_MEMCPY(pRing->pBuffer + WrOff, pData, NumBytes);
- pRing->WrOff = WrOff + NumBytes;
-#endif
- return 1;
- }
- }
- //
- // If we reach this point no data has been written
- //
- return 0;
-}
-
-/*********************************************************************
-*
-* SEGGER_RTT_WriteNoLock
-*
-* Function description
-* Stores a specified number of characters in SEGGER RTT
-* control block which is then read by the host.
-* SEGGER_RTT_WriteNoLock does not lock the application.
-*
-* Parameters
-* BufferIndex Index of "Up"-buffer to be used (e.g. 0 for "Terminal").
-* pBuffer Pointer to character array. Does not need to point to a \0 terminated string.
-* NumBytes Number of bytes to be stored in the SEGGER RTT control block.
-*
-* Return value
-* Number of bytes which have been stored in the "Up"-buffer.
-*
-* Notes
-* (1) Data is stored according to buffer flags.
-* (2) For performance reasons this function does not call Init()
-* and may only be called after RTT has been initialized.
-* Either by calling SEGGER_RTT_Init() or calling another RTT API function first.
-*/
-unsigned SEGGER_RTT_WriteNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) {
- unsigned Status;
- unsigned Avail;
- const char* pData;
- SEGGER_RTT_BUFFER_UP* pRing;
-
- pData = (const char *)pBuffer;
- //
- // Get "to-host" ring buffer.
- //
- pRing = &_SEGGER_RTT.aUp[BufferIndex];
- //
- // How we output depends upon the mode...
- //
- switch (pRing->Flags) {
- case SEGGER_RTT_MODE_NO_BLOCK_SKIP:
- //
- // If we are in skip mode and there is no space for the whole
- // of this output, don't bother.
- //
- Avail = _GetAvailWriteSpace(pRing);
- if (Avail < NumBytes) {
- Status = 0u;
- } else {
- Status = NumBytes;
- _WriteNoCheck(pRing, pData, NumBytes);
- }
- break;
- case SEGGER_RTT_MODE_NO_BLOCK_TRIM:
- //
- // If we are in trim mode, trim to what we can output without blocking.
- //
- Avail = _GetAvailWriteSpace(pRing);
- Status = Avail < NumBytes ? Avail : NumBytes;
- _WriteNoCheck(pRing, pData, Status);
- break;
- case SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL:
- //
- // If we are in blocking mode, output everything.
- //
- Status = _WriteBlocking(pRing, pData, NumBytes);
- break;
- default:
- Status = 0u;
- break;
- }
- //
- // Finish up.
- //
- return Status;
-}
-
-/*********************************************************************
-*
-* SEGGER_RTT_Write
-*
-* Function description
-* Stores a specified number of characters in SEGGER RTT
-* control block which is then read by the host.
-*
-* Parameters
-* BufferIndex Index of "Up"-buffer to be used (e.g. 0 for "Terminal").
-* pBuffer Pointer to character array. Does not need to point to a \0 terminated string.
-* NumBytes Number of bytes to be stored in the SEGGER RTT control block.
-*
-* Return value
-* Number of bytes which have been stored in the "Up"-buffer.
-*
-* Notes
-* (1) Data is stored according to buffer flags.
-*/
-unsigned SEGGER_RTT_Write(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) {
- unsigned Status;
- //
- INIT();
- SEGGER_RTT_LOCK();
- //
- // Call the non-locking write function
- //
- Status = SEGGER_RTT_WriteNoLock(BufferIndex, pBuffer, NumBytes);
- //
- // Finish up.
- //
- SEGGER_RTT_UNLOCK();
- //
- return Status;
-}
-
-/*********************************************************************
-*
-* SEGGER_RTT_WriteString
-*
-* Function description
-* Stores string in SEGGER RTT control block.
-* This data is read by the host.
-*
-* Parameters
-* BufferIndex Index of "Up"-buffer to be used (e.g. 0 for "Terminal").
-* s Pointer to string.
-*
-* Return value
-* Number of bytes which have been stored in the "Up"-buffer.
-*
-* Notes
-* (1) Data is stored according to buffer flags.
-* (2) String passed to this function has to be \0 terminated
-* (3) \0 termination character is *not* stored in RTT buffer
-*/
-unsigned SEGGER_RTT_WriteString(unsigned BufferIndex, const char* s) {
- unsigned Len;
-
- Len = STRLEN(s);
- return SEGGER_RTT_Write(BufferIndex, s, Len);
-}
-
-/*********************************************************************
-*
-* SEGGER_RTT_PutCharSkipNoLock
-*
-* Function description
-* Stores a single character/byte in SEGGER RTT buffer.
-* SEGGER_RTT_PutCharSkipNoLock does not lock the application and
-* skips the byte, if it does not fit into the buffer.
-*
-* Parameters
-* BufferIndex Index of "Up"-buffer to be used (e.g. 0 for "Terminal").
-* c Byte to be stored.
-*
-* Return value
-* Number of bytes which have been stored in the "Up"-buffer.
-*
-* Notes
-* (1) If there is not enough space in the "Up"-buffer, the character is dropped.
-* (2) For performance reasons this function does not call Init()
-* and may only be called after RTT has been initialized.
-* Either by calling SEGGER_RTT_Init() or calling another RTT API function first.
-*/
-
-unsigned SEGGER_RTT_PutCharSkipNoLock(unsigned BufferIndex, char c) {
- SEGGER_RTT_BUFFER_UP* pRing;
- unsigned WrOff;
- unsigned Status;
- //
- // Get "to-host" ring buffer.
- //
- pRing = &_SEGGER_RTT.aUp[BufferIndex];
- //
- // Get write position and handle wrap-around if necessary
- //
- WrOff = pRing->WrOff + 1;
- if (WrOff == pRing->SizeOfBuffer) {
- WrOff = 0;
- }
- //
- // Output byte if free space is available
- //
- if (WrOff != pRing->RdOff) {
- pRing->pBuffer[pRing->WrOff] = c;
- pRing->WrOff = WrOff;
- Status = 1;
- } else {
- Status = 0;
- }
- //
- return Status;
-}
-
-/*********************************************************************
-*
-* SEGGER_RTT_PutCharSkip
-*
-* Function description
-* Stores a single character/byte in SEGGER RTT buffer.
-*
-* Parameters
-* BufferIndex Index of "Up"-buffer to be used (e.g. 0 for "Terminal").
-* c Byte to be stored.
-*
-* Return value
-* Number of bytes which have been stored in the "Up"-buffer.
-*
-* Notes
-* (1) If there is not enough space in the "Up"-buffer, the character is dropped.
-*/
-
-unsigned SEGGER_RTT_PutCharSkip(unsigned BufferIndex, char c) {
- SEGGER_RTT_BUFFER_UP* pRing;
- unsigned WrOff;
- unsigned Status;
- //
- // Prepare
- //
- INIT();
- SEGGER_RTT_LOCK();
- //
- // Get "to-host" ring buffer.
- //
- pRing = &_SEGGER_RTT.aUp[BufferIndex];
- //
- // Get write position and handle wrap-around if necessary
- //
- WrOff = pRing->WrOff + 1;
- if (WrOff == pRing->SizeOfBuffer) {
- WrOff = 0;
- }
- //
- // Output byte if free space is available
- //
- if (WrOff != pRing->RdOff) {
- pRing->pBuffer[pRing->WrOff] = c;
- pRing->WrOff = WrOff;
- Status = 1;
- } else {
- Status = 0;
- }
- //
- // Finish up.
- //
- SEGGER_RTT_UNLOCK();
- //
- return Status;
-}
-
- /*********************************************************************
-*
-* SEGGER_RTT_PutChar
-*
-* Function description
-* Stores a single character/byte in SEGGER RTT buffer.
-*
-* Parameters
-* BufferIndex Index of "Up"-buffer to be used (e.g. 0 for "Terminal").
-* c Byte to be stored.
-*
-* Return value
-* Number of bytes which have been stored in the "Up"-buffer.
-*
-* Notes
-* (1) Data is stored according to buffer flags.
-*/
-
-unsigned SEGGER_RTT_PutChar(unsigned BufferIndex, char c) {
- SEGGER_RTT_BUFFER_UP* pRing;
- unsigned WrOff;
- unsigned Status;
- //
- // Prepare
- //
- INIT();
- SEGGER_RTT_LOCK();
- //
- // Get "to-host" ring buffer.
- //
- pRing = &_SEGGER_RTT.aUp[BufferIndex];
- //
- // Get write position and handle wrap-around if necessary
- //
- WrOff = pRing->WrOff + 1;
- if (WrOff == pRing->SizeOfBuffer) {
- WrOff = 0;
- }
- //
- // Wait for free space if mode is set to blocking
- //
- if (pRing->Flags == SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL) {
- while (WrOff == pRing->RdOff) {
- ;
- }
- }
- //
- // Output byte if free space is available
- //
- if (WrOff != pRing->RdOff) {
- pRing->pBuffer[pRing->WrOff] = c;
- pRing->WrOff = WrOff;
- Status = 1;
- } else {
- Status = 0;
- }
- //
- // Finish up.
- //
- SEGGER_RTT_UNLOCK();
- //
- return Status;
-}
-
-/*********************************************************************
-*
-* SEGGER_RTT_GetKey
-*
-* Function description
-* Reads one character from the SEGGER RTT buffer.
-* Host has previously stored data there.
-*
-* Return value
-* < 0 - No character available (buffer empty).
-* >= 0 - Character which has been read. (Possible values: 0 - 255)
-*
-* Notes
-* (1) This function is only specified for accesses to RTT buffer 0.
-*/
-int SEGGER_RTT_GetKey(void) {
- char c;
- int r;
-
- r = (int)SEGGER_RTT_Read(0u, &c, 1u);
- if (r == 1) {
- r = (int)(unsigned char)c;
- } else {
- r = -1;
- }
- return r;
-}
-
-/*********************************************************************
-*
-* SEGGER_RTT_WaitKey
-*
-* Function description
-* Waits until at least one character is avaible in the SEGGER RTT buffer.
-* Once a character is available, it is read and this function returns.
-*
-* Return value
-* >=0 - Character which has been read.
-*
-* Notes
-* (1) This function is only specified for accesses to RTT buffer 0
-* (2) This function is blocking if no character is present in RTT buffer
-*/
-int SEGGER_RTT_WaitKey(void) {
- int r;
-
- do {
- r = SEGGER_RTT_GetKey();
- } while (r < 0);
- return r;
-}
-
-/*********************************************************************
-*
-* SEGGER_RTT_HasKey
-*
-* Function description
-* Checks if at least one character for reading is available in the SEGGER RTT buffer.
-*
-* Return value
-* == 0 - No characters are available to read.
-* == 1 - At least one character is available.
-*
-* Notes
-* (1) This function is only specified for accesses to RTT buffer 0
-*/
-int SEGGER_RTT_HasKey(void) {
- unsigned RdOff;
- int r;
-
- INIT();
- RdOff = _SEGGER_RTT.aDown[0].RdOff;
- if (RdOff != _SEGGER_RTT.aDown[0].WrOff) {
- r = 1;
- } else {
- r = 0;
- }
- return r;
-}
-
-/*********************************************************************
-*
-* SEGGER_RTT_HasData
-*
-* Function description
-* Check if there is data from the host in the given buffer.
-*
-* Return value:
-* ==0: No data
-* !=0: Data in buffer
-*
-*/
-unsigned SEGGER_RTT_HasData(unsigned BufferIndex) {
- SEGGER_RTT_BUFFER_DOWN* pRing;
- unsigned v;
-
- pRing = &_SEGGER_RTT.aDown[BufferIndex];
- v = pRing->WrOff;
- return v - pRing->RdOff;
-}
-
-/*********************************************************************
-*
-* SEGGER_RTT_HasDataUp
-*
-* Function description
-* Check if there is data remaining to be sent in the given buffer.
-*
-* Return value:
-* ==0: No data
-* !=0: Data in buffer
-*
-*/
-unsigned SEGGER_RTT_HasDataUp(unsigned BufferIndex) {
- SEGGER_RTT_BUFFER_UP* pRing;
- unsigned v;
-
- pRing = &_SEGGER_RTT.aUp[BufferIndex];
- v = pRing->RdOff;
- return pRing->WrOff - v;
-}
-
-/*********************************************************************
-*
-* SEGGER_RTT_AllocDownBuffer
-*
-* Function description
-* Run-time configuration of the next down-buffer (H->T).
-* The next buffer, which is not used yet is configured.
-* This includes: Buffer address, size, name, flags, ...
-*
-* Parameters
-* sName Pointer to a constant name string.
-* pBuffer Pointer to a buffer to be used.
-* BufferSize Size of the buffer.
-* Flags Operating modes. Define behavior if buffer is full (not enough space for entire message).
-*
-* Return value
-* >= 0 - O.K. Buffer Index
-* < 0 - Error
-*/
-int SEGGER_RTT_AllocDownBuffer(const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags) {
- int BufferIndex;
-
- INIT();
- SEGGER_RTT_LOCK();
- BufferIndex = 0;
- do {
- if (_SEGGER_RTT.aDown[BufferIndex].pBuffer == NULL) {
- break;
- }
- BufferIndex++;
- } while (BufferIndex < _SEGGER_RTT.MaxNumDownBuffers);
- if (BufferIndex < _SEGGER_RTT.MaxNumDownBuffers) {
- _SEGGER_RTT.aDown[BufferIndex].sName = sName;
- _SEGGER_RTT.aDown[BufferIndex].pBuffer = (char*)pBuffer;
- _SEGGER_RTT.aDown[BufferIndex].SizeOfBuffer = BufferSize;
- _SEGGER_RTT.aDown[BufferIndex].RdOff = 0u;
- _SEGGER_RTT.aDown[BufferIndex].WrOff = 0u;
- _SEGGER_RTT.aDown[BufferIndex].Flags = Flags;
- } else {
- BufferIndex = -1;
- }
- SEGGER_RTT_UNLOCK();
- return BufferIndex;
-}
-
-/*********************************************************************
-*
-* SEGGER_RTT_AllocUpBuffer
-*
-* Function description
-* Run-time configuration of the next up-buffer (T->H).
-* The next buffer, which is not used yet is configured.
-* This includes: Buffer address, size, name, flags, ...
-*
-* Parameters
-* sName Pointer to a constant name string.
-* pBuffer Pointer to a buffer to be used.
-* BufferSize Size of the buffer.
-* Flags Operating modes. Define behavior if buffer is full (not enough space for entire message).
-*
-* Return value
-* >= 0 - O.K. Buffer Index
-* < 0 - Error
-*/
-int SEGGER_RTT_AllocUpBuffer(const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags) {
- int BufferIndex;
-
- INIT();
- SEGGER_RTT_LOCK();
- BufferIndex = 0;
- do {
- if (_SEGGER_RTT.aUp[BufferIndex].pBuffer == NULL) {
- break;
- }
- BufferIndex++;
- } while (BufferIndex < _SEGGER_RTT.MaxNumUpBuffers);
- if (BufferIndex < _SEGGER_RTT.MaxNumUpBuffers) {
- _SEGGER_RTT.aUp[BufferIndex].sName = sName;
- _SEGGER_RTT.aUp[BufferIndex].pBuffer = (char*)pBuffer;
- _SEGGER_RTT.aUp[BufferIndex].SizeOfBuffer = BufferSize;
- _SEGGER_RTT.aUp[BufferIndex].RdOff = 0u;
- _SEGGER_RTT.aUp[BufferIndex].WrOff = 0u;
- _SEGGER_RTT.aUp[BufferIndex].Flags = Flags;
- } else {
- BufferIndex = -1;
- }
- SEGGER_RTT_UNLOCK();
- return BufferIndex;
-}
-
-/*********************************************************************
-*
-* SEGGER_RTT_ConfigUpBuffer
-*
-* Function description
-* Run-time configuration of a specific up-buffer (T->H).
-* Buffer to be configured is specified by index.
-* This includes: Buffer address, size, name, flags, ...
-*
-* Parameters
-* BufferIndex Index of the buffer to configure.
-* sName Pointer to a constant name string.
-* pBuffer Pointer to a buffer to be used.
-* BufferSize Size of the buffer.
-* Flags Operating modes. Define behavior if buffer is full (not enough space for entire message).
-*
-* Return value
-* >= 0 - O.K.
-* < 0 - Error
-*
-* Additional information
-* Buffer 0 is configured on compile-time.
-* May only be called once per buffer.
-* Buffer name and flags can be reconfigured using the appropriate functions.
-*/
-int SEGGER_RTT_ConfigUpBuffer(unsigned BufferIndex, const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags) {
- int r;
-
- INIT();
- if (BufferIndex < (unsigned)_SEGGER_RTT.MaxNumUpBuffers) {
- SEGGER_RTT_LOCK();
- if (BufferIndex > 0u) {
- _SEGGER_RTT.aUp[BufferIndex].sName = sName;
- _SEGGER_RTT.aUp[BufferIndex].pBuffer = (char*)pBuffer;
- _SEGGER_RTT.aUp[BufferIndex].SizeOfBuffer = BufferSize;
- _SEGGER_RTT.aUp[BufferIndex].RdOff = 0u;
- _SEGGER_RTT.aUp[BufferIndex].WrOff = 0u;
- }
- _SEGGER_RTT.aUp[BufferIndex].Flags = Flags;
- SEGGER_RTT_UNLOCK();
- r = 0;
- } else {
- r = -1;
- }
- return r;
-}
-
-/*********************************************************************
-*
-* SEGGER_RTT_ConfigDownBuffer
-*
-* Function description
-* Run-time configuration of a specific down-buffer (H->T).
-* Buffer to be configured is specified by index.
-* This includes: Buffer address, size, name, flags, ...
-*
-* Parameters
-* BufferIndex Index of the buffer to configure.
-* sName Pointer to a constant name string.
-* pBuffer Pointer to a buffer to be used.
-* BufferSize Size of the buffer.
-* Flags Operating modes. Define behavior if buffer is full (not enough space for entire message).
-*
-* Return value
-* >= 0 O.K.
-* < 0 Error
-*
-* Additional information
-* Buffer 0 is configured on compile-time.
-* May only be called once per buffer.
-* Buffer name and flags can be reconfigured using the appropriate functions.
-*/
-int SEGGER_RTT_ConfigDownBuffer(unsigned BufferIndex, const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags) {
- int r;
-
- INIT();
- if (BufferIndex < (unsigned)_SEGGER_RTT.MaxNumDownBuffers) {
- SEGGER_RTT_LOCK();
- if (BufferIndex > 0u) {
- _SEGGER_RTT.aDown[BufferIndex].sName = sName;
- _SEGGER_RTT.aDown[BufferIndex].pBuffer = (char*)pBuffer;
- _SEGGER_RTT.aDown[BufferIndex].SizeOfBuffer = BufferSize;
- _SEGGER_RTT.aDown[BufferIndex].RdOff = 0u;
- _SEGGER_RTT.aDown[BufferIndex].WrOff = 0u;
- }
- _SEGGER_RTT.aDown[BufferIndex].Flags = Flags;
- SEGGER_RTT_UNLOCK();
- r = 0;
- } else {
- r = -1;
- }
- return r;
-}
-
-/*********************************************************************
-*
-* SEGGER_RTT_SetNameUpBuffer
-*
-* Function description
-* Run-time configuration of a specific up-buffer name (T->H).
-* Buffer to be configured is specified by index.
-*
-* Parameters
-* BufferIndex Index of the buffer to renamed.
-* sName Pointer to a constant name string.
-*
-* Return value
-* >= 0 O.K.
-* < 0 Error
-*/
-int SEGGER_RTT_SetNameUpBuffer(unsigned BufferIndex, const char* sName) {
- int r;
-
- INIT();
- if (BufferIndex < (unsigned)_SEGGER_RTT.MaxNumUpBuffers) {
- SEGGER_RTT_LOCK();
- _SEGGER_RTT.aUp[BufferIndex].sName = sName;
- SEGGER_RTT_UNLOCK();
- r = 0;
- } else {
- r = -1;
- }
- return r;
-}
-
-/*********************************************************************
-*
-* SEGGER_RTT_SetNameDownBuffer
-*
-* Function description
-* Run-time configuration of a specific Down-buffer name (T->H).
-* Buffer to be configured is specified by index.
-*
-* Parameters
-* BufferIndex Index of the buffer to renamed.
-* sName Pointer to a constant name string.
-*
-* Return value
-* >= 0 O.K.
-* < 0 Error
-*/
-int SEGGER_RTT_SetNameDownBuffer(unsigned BufferIndex, const char* sName) {
- int r;
-
- INIT();
- if (BufferIndex < (unsigned)_SEGGER_RTT.MaxNumDownBuffers) {
- SEGGER_RTT_LOCK();
- _SEGGER_RTT.aDown[BufferIndex].sName = sName;
- SEGGER_RTT_UNLOCK();
- r = 0;
- } else {
- r = -1;
- }
- return r;
-}
-
-/*********************************************************************
-*
-* SEGGER_RTT_SetFlagsUpBuffer
-*
-* Function description
-* Run-time configuration of specific up-buffer flags (T->H).
-* Buffer to be configured is specified by index.
-*
-* Parameters
-* BufferIndex Index of the buffer.
-* Flags Flags to set for the buffer.
-*
-* Return value
-* >= 0 O.K.
-* < 0 Error
-*/
-int SEGGER_RTT_SetFlagsUpBuffer(unsigned BufferIndex, unsigned Flags) {
- int r;
-
- INIT();
- if (BufferIndex < (unsigned)_SEGGER_RTT.MaxNumUpBuffers) {
- SEGGER_RTT_LOCK();
- _SEGGER_RTT.aUp[BufferIndex].Flags = Flags;
- SEGGER_RTT_UNLOCK();
- r = 0;
- } else {
- r = -1;
- }
- return r;
-}
-
-/*********************************************************************
-*
-* SEGGER_RTT_SetFlagsDownBuffer
-*
-* Function description
-* Run-time configuration of specific Down-buffer flags (T->H).
-* Buffer to be configured is specified by index.
-*
-* Parameters
-* BufferIndex Index of the buffer to renamed.
-* Flags Flags to set for the buffer.
-*
-* Return value
-* >= 0 O.K.
-* < 0 Error
-*/
-int SEGGER_RTT_SetFlagsDownBuffer(unsigned BufferIndex, unsigned Flags) {
- int r;
-
- INIT();
- if (BufferIndex < (unsigned)_SEGGER_RTT.MaxNumDownBuffers) {
- SEGGER_RTT_LOCK();
- _SEGGER_RTT.aDown[BufferIndex].Flags = Flags;
- SEGGER_RTT_UNLOCK();
- r = 0;
- } else {
- r = -1;
- }
- return r;
-}
-
-/*********************************************************************
-*
-* SEGGER_RTT_Init
-*
-* Function description
-* Initializes the RTT Control Block.
-* Should be used in RAM targets, at start of the application.
-*
-*/
-void SEGGER_RTT_Init (void) {
- _DoInit();
-}
-
-/*********************************************************************
-*
-* SEGGER_RTT_SetTerminal
-*
-* Function description
-* Sets the terminal to be used for output on channel 0.
-*
-* Parameters
-* TerminalId Index of the terminal.
-*
-* Return value
-* >= 0 O.K.
-* < 0 Error (e.g. if RTT is configured for non-blocking mode and there was no space in the buffer to set the new terminal Id)
-*/
-int SEGGER_RTT_SetTerminal (char TerminalId) {
- unsigned char ac[2];
- SEGGER_RTT_BUFFER_UP* pRing;
- unsigned Avail;
- int r;
- //
- INIT();
- //
- r = 0;
- ac[0] = 0xFFu;
- if ((unsigned char)TerminalId < (unsigned char)sizeof(_aTerminalId)) { // We only support a certain number of channels
- ac[1] = _aTerminalId[(unsigned char)TerminalId];
- pRing = &_SEGGER_RTT.aUp[0]; // Buffer 0 is always reserved for terminal I/O, so we can use index 0 here, fixed
- SEGGER_RTT_LOCK(); // Lock to make sure that no other task is writing into buffer, while we are and number of free bytes in buffer does not change downwards after checking and before writing
- if ((pRing->Flags & SEGGER_RTT_MODE_MASK) == SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL) {
- _ActiveTerminal = TerminalId;
- _WriteBlocking(pRing, (const char*)ac, 2u);
- } else { // Skipping mode or trim mode? => We cannot trim this command so handling is the same for both modes
- Avail = _GetAvailWriteSpace(pRing);
- if (Avail >= 2) {
- _ActiveTerminal = TerminalId; // Only change active terminal in case of success
- _WriteNoCheck(pRing, (const char*)ac, 2u);
- } else {
- r = -1;
- }
- }
- SEGGER_RTT_UNLOCK();
- } else {
- r = -1;
- }
- return r;
-}
-
-/*********************************************************************
-*
-* SEGGER_RTT_TerminalOut
-*
-* Function description
-* Writes a string to the given terminal
-* without changing the terminal for channel 0.
-*
-* Parameters
-* TerminalId Index of the terminal.
-* s String to be printed on the terminal.
-*
-* Return value
-* >= 0 - Number of bytes written.
-* < 0 - Error.
-*
-*/
-int SEGGER_RTT_TerminalOut (char TerminalId, const char* s) {
- int Status;
- unsigned FragLen;
- unsigned Avail;
- SEGGER_RTT_BUFFER_UP* pRing;
- //
- INIT();
- //
- // Validate terminal ID.
- //
- if (TerminalId < (char)sizeof(_aTerminalId)) { // We only support a certain number of channels
- //
- // Get "to-host" ring buffer.
- //
- pRing = &_SEGGER_RTT.aUp[0];
- //
- // Need to be able to change terminal, write data, change back.
- // Compute the fixed and variable sizes.
- //
- FragLen = STRLEN(s);
- //
- // How we output depends upon the mode...
- //
- SEGGER_RTT_LOCK();
- Avail = _GetAvailWriteSpace(pRing);
- switch (pRing->Flags & SEGGER_RTT_MODE_MASK) {
- case SEGGER_RTT_MODE_NO_BLOCK_SKIP:
- //
- // If we are in skip mode and there is no space for the whole
- // of this output, don't bother switching terminals at all.
- //
- if (Avail < (FragLen + 4u)) {
- Status = 0;
- } else {
- _PostTerminalSwitch(pRing, TerminalId);
- Status = (int)_WriteBlocking(pRing, s, FragLen);
- _PostTerminalSwitch(pRing, _ActiveTerminal);
- }
- break;
- case SEGGER_RTT_MODE_NO_BLOCK_TRIM:
- //
- // If we are in trim mode and there is not enough space for everything,
- // trim the output but always include the terminal switch. If no room
- // for terminal switch, skip that totally.
- //
- if (Avail < 4u) {
- Status = -1;
- } else {
- _PostTerminalSwitch(pRing, TerminalId);
- Status = (int)_WriteBlocking(pRing, s, (FragLen < (Avail - 4u)) ? FragLen : (Avail - 4u));
- _PostTerminalSwitch(pRing, _ActiveTerminal);
- }
- break;
- case SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL:
- //
- // If we are in blocking mode, output everything.
- //
- _PostTerminalSwitch(pRing, TerminalId);
- Status = (int)_WriteBlocking(pRing, s, FragLen);
- _PostTerminalSwitch(pRing, _ActiveTerminal);
- break;
- default:
- Status = -1;
- break;
- }
- //
- // Finish up.
- //
- SEGGER_RTT_UNLOCK();
- } else {
- Status = -1;
- }
- return Status;
-}
-
-
-/*************************** End of file ****************************/
+/*********************************************************************
+* SEGGER Microcontroller GmbH *
+* The Embedded Experts *
+**********************************************************************
+* *
+* (c) 1995 - 2018 SEGGER Microcontroller GmbH *
+* *
+* www.segger.com Support: support@segger.com *
+* *
+**********************************************************************
+* *
+* SEGGER RTT * Real Time Transfer for embedded targets *
+* *
+**********************************************************************
+* *
+* All rights reserved. *
+* *
+* SEGGER strongly recommends to not make any changes *
+* to or modify the source code of this software in order to stay *
+* compatible with the RTT protocol and J-Link. *
+* *
+* Redistribution and use in source and binary forms, with or *
+* without modification, are permitted provided that the following *
+* conditions are met: *
+* *
+* o Redistributions of source code must retain the above copyright *
+* notice, this list of conditions and the following disclaimer. *
+* *
+* o Redistributions in binary form must reproduce the above *
+* copyright notice, this list of conditions and the following *
+* disclaimer in the documentation and/or other materials provided *
+* with the distribution. *
+* *
+* o Neither the name of SEGGER Microcontroller GmbH *
+* nor the names of its contributors may be used to endorse or *
+* promote products derived from this software without specific *
+* prior written permission. *
+* *
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
+* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
+* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
+* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
+* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
+* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
+* DAMAGE. *
+* *
+**********************************************************************
+---------------------------END-OF-HEADER------------------------------
+File : SEGGER_RTT.c
+Purpose : Implementation of SEGGER real-time transfer (RTT) which
+ allows real-time communication on targets which support
+ debugger memory accesses while the CPU is running.
+Revision: $Rev: 12804 $
+
+Additional information:
+ Type "int" is assumed to be 32-bits in size
+ H->T Host to target communication
+ T->H Target to host communication
+
+ RTT channel 0 is always present and reserved for Terminal usage.
+ Name is fixed to "Terminal"
+
+ Effective buffer size: SizeOfBuffer - 1
+
+ WrOff == RdOff: Buffer is empty
+ WrOff == (RdOff - 1): Buffer is full
+ WrOff > RdOff: Free space includes wrap-around
+ WrOff < RdOff: Used space includes wrap-around
+ (WrOff == (SizeOfBuffer - 1)) && (RdOff == 0):
+ Buffer full and wrap-around after next byte
+
+
+----------------------------------------------------------------------
+*/
+
+#include "SEGGER_RTT.h"
+
+#include <string.h> // for memcpy
+
+/*********************************************************************
+*
+* Configuration, default values
+*
+**********************************************************************
+*/
+
+#ifndef BUFFER_SIZE_UP
+ #define BUFFER_SIZE_UP 1024 // Size of the buffer for terminal output of target, up to host
+#endif
+
+#ifndef BUFFER_SIZE_DOWN
+ #define BUFFER_SIZE_DOWN 16 // Size of the buffer for terminal input to target from host (Usually keyboard input)
+#endif
+
+#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS
+ #define SEGGER_RTT_MAX_NUM_UP_BUFFERS 2 // Number of up-buffers (T->H) available on this target
+#endif
+
+#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS
+ #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS 2 // Number of down-buffers (H->T) available on this target
+#endif
+
+#ifndef SEGGER_RTT_BUFFER_SECTION
+ #if defined(SEGGER_RTT_SECTION)
+ #define SEGGER_RTT_BUFFER_SECTION SEGGER_RTT_SECTION
+ #endif
+#endif
+
+#ifndef SEGGER_RTT_ALIGNMENT
+ #define SEGGER_RTT_ALIGNMENT 0
+#endif
+
+#ifndef SEGGER_RTT_BUFFER_ALIGNMENT
+ #define SEGGER_RTT_BUFFER_ALIGNMENT 0
+#endif
+
+#ifndef SEGGER_RTT_MODE_DEFAULT
+ #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP
+#endif
+
+#ifndef SEGGER_RTT_LOCK
+ #define SEGGER_RTT_LOCK()
+#endif
+
+#ifndef SEGGER_RTT_UNLOCK
+ #define SEGGER_RTT_UNLOCK()
+#endif
+
+#ifndef STRLEN
+ #define STRLEN(a) strlen((a))
+#endif
+
+#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP
+ #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0
+#endif
+
+#ifndef SEGGER_RTT_MEMCPY
+ #ifdef MEMCPY
+ #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) MEMCPY((pDest), (pSrc), (NumBytes))
+ #else
+ #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) memcpy((pDest), (pSrc), (NumBytes))
+ #endif
+#endif
+
+#ifndef MIN
+ #define MIN(a, b) (((a) < (b)) ? (a) : (b))
+#endif
+
+#ifndef MAX
+ #define MAX(a, b) (((a) > (b)) ? (a) : (b))
+#endif
+//
+// For some environments, NULL may not be defined until certain headers are included
+//
+#ifndef NULL
+ #define NULL 0
+#endif
+
+/*********************************************************************
+*
+* Defines, fixed
+*
+**********************************************************************
+*/
+#if (defined __ICCARM__) || (defined __ICCRX__)
+ #define RTT_PRAGMA(P) _Pragma(#P)
+#endif
+
+#if SEGGER_RTT_ALIGNMENT || SEGGER_RTT_BUFFER_ALIGNMENT
+ #if (defined __GNUC__)
+ #define SEGGER_RTT_ALIGN(Var, Alignment) Var __attribute__ ((aligned (Alignment)))
+ #elif (defined __ICCARM__) || (defined __ICCRX__)
+ #define PRAGMA(A) _Pragma(#A)
+#define SEGGER_RTT_ALIGN(Var, Alignment) RTT_PRAGMA(data_alignment=Alignment) \
+ Var
+ #elif (defined __CC_ARM)
+ #define SEGGER_RTT_ALIGN(Var, Alignment) Var __attribute__ ((aligned (Alignment)))
+ #else
+ #error "Alignment not supported for this compiler."
+ #endif
+#else
+ #define SEGGER_RTT_ALIGN(Var, Alignment) Var
+#endif
+
+#if defined(SEGGER_RTT_SECTION) || defined (SEGGER_RTT_BUFFER_SECTION)
+ #if (defined __GNUC__)
+ #define SEGGER_RTT_PUT_SECTION(Var, Section) __attribute__ ((section (Section))) Var
+ #elif (defined __ICCARM__) || (defined __ICCRX__)
+#define SEGGER_RTT_PUT_SECTION(Var, Section) RTT_PRAGMA(location=Section) \
+ Var
+ #elif (defined __CC_ARM)
+ #define SEGGER_RTT_PUT_SECTION(Var, Section) __attribute__ ((section (Section), zero_init)) Var
+ #else
+ #error "Section placement not supported for this compiler."
+ #endif
+#else
+ #define SEGGER_RTT_PUT_SECTION(Var, Section) Var
+#endif
+
+
+#if SEGGER_RTT_ALIGNMENT
+ #define SEGGER_RTT_CB_ALIGN(Var) SEGGER_RTT_ALIGN(Var, SEGGER_RTT_ALIGNMENT)
+#else
+ #define SEGGER_RTT_CB_ALIGN(Var) Var
+#endif
+
+#if SEGGER_RTT_BUFFER_ALIGNMENT
+ #define SEGGER_RTT_BUFFER_ALIGN(Var) SEGGER_RTT_ALIGN(Var, SEGGER_RTT_BUFFER_ALIGNMENT)
+#else
+ #define SEGGER_RTT_BUFFER_ALIGN(Var) Var
+#endif
+
+
+#if defined(SEGGER_RTT_SECTION)
+ #define SEGGER_RTT_PUT_CB_SECTION(Var) SEGGER_RTT_PUT_SECTION(Var, SEGGER_RTT_SECTION)
+#else
+ #define SEGGER_RTT_PUT_CB_SECTION(Var) Var
+#endif
+
+#if defined(SEGGER_RTT_BUFFER_SECTION)
+ #define SEGGER_RTT_PUT_BUFFER_SECTION(Var) SEGGER_RTT_PUT_SECTION(Var, SEGGER_RTT_BUFFER_SECTION)
+#else
+ #define SEGGER_RTT_PUT_BUFFER_SECTION(Var) Var
+#endif
+
+/*********************************************************************
+*
+* Static const data
+*
+**********************************************************************
+*/
+
+static unsigned char _aTerminalId[16] = { '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C', 'D', 'E', 'F' };
+
+/*********************************************************************
+*
+* Static data
+*
+**********************************************************************
+*/
+//
+// RTT Control Block and allocate buffers for channel 0
+//
+SEGGER_RTT_PUT_CB_SECTION(SEGGER_RTT_CB_ALIGN(SEGGER_RTT_CB _SEGGER_RTT));
+
+SEGGER_RTT_PUT_BUFFER_SECTION(SEGGER_RTT_BUFFER_ALIGN(static char _acUpBuffer [BUFFER_SIZE_UP]));
+SEGGER_RTT_PUT_BUFFER_SECTION(SEGGER_RTT_BUFFER_ALIGN(static char _acDownBuffer[BUFFER_SIZE_DOWN]));
+
+static char _ActiveTerminal;
+
+/*********************************************************************
+*
+* Static functions
+*
+**********************************************************************
+*/
+
+/*********************************************************************
+*
+* _DoInit()
+*
+* Function description
+* Initializes the control block an buffers.
+* May only be called via INIT() to avoid overriding settings.
+*
+*/
+#define INIT() do { \
+ if (_SEGGER_RTT.acID[0] == '\0') { _DoInit(); } \
+ } while (0)
+static void _DoInit(void) {
+ SEGGER_RTT_CB* p;
+ //
+ // Initialize control block
+ //
+ p = &_SEGGER_RTT;
+ p->MaxNumUpBuffers = SEGGER_RTT_MAX_NUM_UP_BUFFERS;
+ p->MaxNumDownBuffers = SEGGER_RTT_MAX_NUM_DOWN_BUFFERS;
+ //
+ // Initialize up buffer 0
+ //
+ p->aUp[0].sName = "Terminal";
+ p->aUp[0].pBuffer = _acUpBuffer;
+ p->aUp[0].SizeOfBuffer = sizeof(_acUpBuffer);
+ p->aUp[0].RdOff = 0u;
+ p->aUp[0].WrOff = 0u;
+ p->aUp[0].Flags = SEGGER_RTT_MODE_DEFAULT;
+ //
+ // Initialize down buffer 0
+ //
+ p->aDown[0].sName = "Terminal";
+ p->aDown[0].pBuffer = _acDownBuffer;
+ p->aDown[0].SizeOfBuffer = sizeof(_acDownBuffer);
+ p->aDown[0].RdOff = 0u;
+ p->aDown[0].WrOff = 0u;
+ p->aDown[0].Flags = SEGGER_RTT_MODE_DEFAULT;
+ //
+ // Finish initialization of the control block.
+ // Copy Id string in three steps to make sure "SEGGER RTT" is not found
+ // in initializer memory (usually flash) by J-Link
+ //
+ strcpy(&p->acID[7], "RTT");
+ strcpy(&p->acID[0], "SEGGER");
+ p->acID[6] = ' ';
+}
+
+/*********************************************************************
+*
+* _WriteBlocking()
+*
+* Function description
+* Stores a specified number of characters in SEGGER RTT ring buffer
+* and updates the associated write pointer which is periodically
+* read by the host.
+* The caller is responsible for managing the write chunk sizes as
+* _WriteBlocking() will block until all data has been posted successfully.
+*
+* Parameters
+* pRing Ring buffer to post to.
+* pBuffer Pointer to character array. Does not need to point to a \0 terminated string.
+* NumBytes Number of bytes to be stored in the SEGGER RTT control block.
+*
+* Return value
+* >= 0 - Number of bytes written into buffer.
+*/
+static unsigned _WriteBlocking(SEGGER_RTT_BUFFER_UP* pRing, const char* pBuffer, unsigned NumBytes) {
+ unsigned NumBytesToWrite;
+ unsigned NumBytesWritten;
+ unsigned RdOff;
+ unsigned WrOff;
+#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
+ char* pDst;
+#endif
+ //
+ // Write data to buffer and handle wrap-around if necessary
+ //
+ NumBytesWritten = 0u;
+ WrOff = pRing->WrOff;
+ do {
+ RdOff = pRing->RdOff; // May be changed by host (debug probe) in the meantime
+ if (RdOff > WrOff) {
+ NumBytesToWrite = RdOff - WrOff - 1u;
+ } else {
+ NumBytesToWrite = pRing->SizeOfBuffer - (WrOff - RdOff + 1u);
+ }
+ NumBytesToWrite = MIN(NumBytesToWrite, (pRing->SizeOfBuffer - WrOff)); // Number of bytes that can be written until buffer wrap-around
+ NumBytesToWrite = MIN(NumBytesToWrite, NumBytes);
+#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
+ pDst = pRing->pBuffer + WrOff;
+ NumBytesWritten += NumBytesToWrite;
+ NumBytes -= NumBytesToWrite;
+ WrOff += NumBytesToWrite;
+ while (NumBytesToWrite--) {
+ *pDst++ = *pBuffer++;
+ };
+#else
+ SEGGER_RTT_MEMCPY(pRing->pBuffer + WrOff, pBuffer, NumBytesToWrite);
+ NumBytesWritten += NumBytesToWrite;
+ pBuffer += NumBytesToWrite;
+ NumBytes -= NumBytesToWrite;
+ WrOff += NumBytesToWrite;
+#endif
+ if (WrOff == pRing->SizeOfBuffer) {
+ WrOff = 0u;
+ }
+ pRing->WrOff = WrOff;
+ } while (NumBytes);
+ //
+ return NumBytesWritten;
+}
+
+/*********************************************************************
+*
+* _WriteNoCheck()
+*
+* Function description
+* Stores a specified number of characters in SEGGER RTT ring buffer
+* and updates the associated write pointer which is periodically
+* read by the host.
+* It is callers responsibility to make sure data actually fits in buffer.
+*
+* Parameters
+* pRing Ring buffer to post to.
+* pBuffer Pointer to character array. Does not need to point to a \0 terminated string.
+* NumBytes Number of bytes to be stored in the SEGGER RTT control block.
+*
+* Notes
+* (1) If there might not be enough space in the "Up"-buffer, call _WriteBlocking
+*/
+static void _WriteNoCheck(SEGGER_RTT_BUFFER_UP* pRing, const char* pData, unsigned NumBytes) {
+ unsigned NumBytesAtOnce;
+ unsigned WrOff;
+ unsigned Rem;
+#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
+ char* pDst;
+#endif
+
+ WrOff = pRing->WrOff;
+ Rem = pRing->SizeOfBuffer - WrOff;
+ if (Rem > NumBytes) {
+ //
+ // All data fits before wrap around
+ //
+#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
+ pDst = pRing->pBuffer + WrOff;
+ WrOff += NumBytes;
+ while (NumBytes--) {
+ *pDst++ = *pData++;
+ };
+ pRing->WrOff = WrOff;
+#else
+ SEGGER_RTT_MEMCPY(pRing->pBuffer + WrOff, pData, NumBytes);
+ pRing->WrOff = WrOff + NumBytes;
+#endif
+ } else {
+ //
+ // We reach the end of the buffer, so need to wrap around
+ //
+#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
+ pDst = pRing->pBuffer + WrOff;
+ NumBytesAtOnce = Rem;
+ while (NumBytesAtOnce--) {
+ *pDst++ = *pData++;
+ };
+ pDst = pRing->pBuffer;
+ NumBytesAtOnce = NumBytes - Rem;
+ while (NumBytesAtOnce--) {
+ *pDst++ = *pData++;
+ };
+ pRing->WrOff = NumBytes - Rem;
+#else
+ NumBytesAtOnce = Rem;
+ SEGGER_RTT_MEMCPY(pRing->pBuffer + WrOff, pData, NumBytesAtOnce);
+ NumBytesAtOnce = NumBytes - Rem;
+ SEGGER_RTT_MEMCPY(pRing->pBuffer, pData + Rem, NumBytesAtOnce);
+ pRing->WrOff = NumBytesAtOnce;
+#endif
+ }
+}
+
+/*********************************************************************
+*
+* _PostTerminalSwitch()
+*
+* Function description
+* Switch terminal to the given terminal ID. It is the caller's
+* responsibility to ensure the terminal ID is correct and there is
+* enough space in the buffer for this to complete successfully.
+*
+* Parameters
+* pRing Ring buffer to post to.
+* TerminalId Terminal ID to switch to.
+*/
+static void _PostTerminalSwitch(SEGGER_RTT_BUFFER_UP* pRing, unsigned char TerminalId) {
+ unsigned char ac[2];
+
+ ac[0] = 0xFFu;
+ ac[1] = _aTerminalId[TerminalId]; // Caller made already sure that TerminalId does not exceed our terminal limit
+ _WriteBlocking(pRing, (const char*)ac, 2u);
+}
+
+/*********************************************************************
+*
+* _GetAvailWriteSpace()
+*
+* Function description
+* Returns the number of bytes that can be written to the ring
+* buffer without blocking.
+*
+* Parameters
+* pRing Ring buffer to check.
+*
+* Return value
+* Number of bytes that are free in the buffer.
+*/
+static unsigned _GetAvailWriteSpace(SEGGER_RTT_BUFFER_UP* pRing) {
+ unsigned RdOff;
+ unsigned WrOff;
+ unsigned r;
+ //
+ // Avoid warnings regarding volatile access order. It's not a problem
+ // in this case, but dampen compiler enthusiasm.
+ //
+ RdOff = pRing->RdOff;
+ WrOff = pRing->WrOff;
+ if (RdOff <= WrOff) {
+ r = pRing->SizeOfBuffer - 1u - WrOff + RdOff;
+ } else {
+ r = RdOff - WrOff - 1u;
+ }
+ return r;
+}
+
+/*********************************************************************
+*
+* Public code
+*
+**********************************************************************
+*/
+/*********************************************************************
+*
+* SEGGER_RTT_ReadNoLock()
+*
+* Function description
+* Reads characters from SEGGER real-time-terminal control block
+* which have been previously stored by the host.
+* Do not lock against interrupts and multiple access.
+*
+* Parameters
+* BufferIndex Index of Down-buffer to be used (e.g. 0 for "Terminal").
+* pBuffer Pointer to buffer provided by target application, to copy characters from RTT-down-buffer to.
+* BufferSize Size of the target application buffer.
+*
+* Return value
+* Number of bytes that have been read.
+*/
+unsigned SEGGER_RTT_ReadNoLock(unsigned BufferIndex, void* pData, unsigned BufferSize) {
+ unsigned NumBytesRem;
+ unsigned NumBytesRead;
+ unsigned RdOff;
+ unsigned WrOff;
+ unsigned char* pBuffer;
+ SEGGER_RTT_BUFFER_DOWN* pRing;
+#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
+ const char* pSrc;
+#endif
+ //
+ INIT();
+ pRing = &_SEGGER_RTT.aDown[BufferIndex];
+ pBuffer = (unsigned char*)pData;
+ RdOff = pRing->RdOff;
+ WrOff = pRing->WrOff;
+ NumBytesRead = 0u;
+ //
+ // Read from current read position to wrap-around of buffer, first
+ //
+ if (RdOff > WrOff) {
+ NumBytesRem = pRing->SizeOfBuffer - RdOff;
+ NumBytesRem = MIN(NumBytesRem, BufferSize);
+#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
+ pSrc = pRing->pBuffer + RdOff;
+ NumBytesRead += NumBytesRem;
+ BufferSize -= NumBytesRem;
+ RdOff += NumBytesRem;
+ while (NumBytesRem--) {
+ *pBuffer++ = *pSrc++;
+ };
+#else
+ SEGGER_RTT_MEMCPY(pBuffer, pRing->pBuffer + RdOff, NumBytesRem);
+ NumBytesRead += NumBytesRem;
+ pBuffer += NumBytesRem;
+ BufferSize -= NumBytesRem;
+ RdOff += NumBytesRem;
+#endif
+ //
+ // Handle wrap-around of buffer
+ //
+ if (RdOff == pRing->SizeOfBuffer) {
+ RdOff = 0u;
+ }
+ }
+ //
+ // Read remaining items of buffer
+ //
+ NumBytesRem = WrOff - RdOff;
+ NumBytesRem = MIN(NumBytesRem, BufferSize);
+ if (NumBytesRem > 0u) {
+#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
+ pSrc = pRing->pBuffer + RdOff;
+ NumBytesRead += NumBytesRem;
+ BufferSize -= NumBytesRem;
+ RdOff += NumBytesRem;
+ while (NumBytesRem--) {
+ *pBuffer++ = *pSrc++;
+ };
+#else
+ SEGGER_RTT_MEMCPY(pBuffer, pRing->pBuffer + RdOff, NumBytesRem);
+ NumBytesRead += NumBytesRem;
+ pBuffer += NumBytesRem;
+ BufferSize -= NumBytesRem;
+ RdOff += NumBytesRem;
+#endif
+ }
+ if (NumBytesRead) {
+ pRing->RdOff = RdOff;
+ }
+ //
+ return NumBytesRead;
+}
+
+/*********************************************************************
+*
+* SEGGER_RTT_Read
+*
+* Function description
+* Reads characters from SEGGER real-time-terminal control block
+* which have been previously stored by the host.
+*
+* Parameters
+* BufferIndex Index of Down-buffer to be used (e.g. 0 for "Terminal").
+* pBuffer Pointer to buffer provided by target application, to copy characters from RTT-down-buffer to.
+* BufferSize Size of the target application buffer.
+*
+* Return value
+* Number of bytes that have been read.
+*/
+unsigned SEGGER_RTT_Read(unsigned BufferIndex, void* pBuffer, unsigned BufferSize) {
+ unsigned NumBytesRead;
+ //
+ SEGGER_RTT_LOCK();
+ //
+ // Call the non-locking read function
+ //
+ NumBytesRead = SEGGER_RTT_ReadNoLock(BufferIndex, pBuffer, BufferSize);
+ //
+ // Finish up.
+ //
+ SEGGER_RTT_UNLOCK();
+ //
+ return NumBytesRead;
+}
+
+/*********************************************************************
+*
+* SEGGER_RTT_WriteWithOverwriteNoLock
+*
+* Function description
+* Stores a specified number of characters in SEGGER RTT
+* control block.
+* SEGGER_RTT_WriteWithOverwriteNoLock does not lock the application
+* and overwrites data if the data does not fit into the buffer.
+*
+* Parameters
+* BufferIndex Index of "Up"-buffer to be used (e.g. 0 for "Terminal").
+* pBuffer Pointer to character array. Does not need to point to a \0 terminated string.
+* NumBytes Number of bytes to be stored in the SEGGER RTT control block.
+*
+* Notes
+* (1) If there is not enough space in the "Up"-buffer, data is overwritten.
+* (2) For performance reasons this function does not call Init()
+* and may only be called after RTT has been initialized.
+* Either by calling SEGGER_RTT_Init() or calling another RTT API function first.
+* (3) Do not use SEGGER_RTT_WriteWithOverwriteNoLock if a J-Link
+* connection reads RTT data.
+*/
+void SEGGER_RTT_WriteWithOverwriteNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) {
+ const char* pData;
+ SEGGER_RTT_BUFFER_UP* pRing;
+ unsigned Avail;
+#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
+ char* pDst;
+#endif
+
+ pData = (const char *)pBuffer;
+ //
+ // Get "to-host" ring buffer and copy some elements into local variables.
+ //
+ pRing = &_SEGGER_RTT.aUp[BufferIndex];
+ //
+ // Check if we will overwrite data and need to adjust the RdOff.
+ //
+ if (pRing->WrOff == pRing->RdOff) {
+ Avail = pRing->SizeOfBuffer - 1u;
+ } else if ( pRing->WrOff < pRing->RdOff) {
+ Avail = pRing->RdOff - pRing->WrOff - 1u;
+ } else {
+ Avail = pRing->RdOff - pRing->WrOff - 1u + pRing->SizeOfBuffer;
+ }
+ if (NumBytes > Avail) {
+ pRing->RdOff += (NumBytes - Avail);
+ while (pRing->RdOff >= pRing->SizeOfBuffer) {
+ pRing->RdOff -= pRing->SizeOfBuffer;
+ }
+ }
+ //
+ // Write all data, no need to check the RdOff, but possibly handle multiple wrap-arounds
+ //
+ Avail = pRing->SizeOfBuffer - pRing->WrOff;
+ do {
+ if (Avail > NumBytes) {
+ //
+ // Last round
+ //
+#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
+ pDst = pRing->pBuffer + pRing->WrOff;
+ Avail = NumBytes;
+ while (NumBytes--) {
+ *pDst++ = *pData++;
+ };
+ pRing->WrOff += Avail;
+#else
+ SEGGER_RTT_MEMCPY(pRing->pBuffer + pRing->WrOff, pData, NumBytes);
+ pRing->WrOff += NumBytes;
+#endif
+ break;
+ } else {
+ //
+ // Wrap-around necessary, write until wrap-around and reset WrOff
+ //
+#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
+ pDst = pRing->pBuffer + pRing->WrOff;
+ NumBytes -= Avail;
+ while (Avail--) {
+ *pDst++ = *pData++;
+ };
+ pRing->WrOff = 0;
+#else
+ SEGGER_RTT_MEMCPY(pRing->pBuffer + pRing->WrOff, pData, Avail);
+ pData += Avail;
+ pRing->WrOff = 0;
+ NumBytes -= Avail;
+#endif
+ Avail = (pRing->SizeOfBuffer - 1);
+ }
+ } while (NumBytes);
+}
+
+/*********************************************************************
+*
+* SEGGER_RTT_WriteSkipNoLock
+*
+* Function description
+* Stores a specified number of characters in SEGGER RTT
+* control block which is then read by the host.
+* SEGGER_RTT_WriteSkipNoLock does not lock the application and
+* skips all data, if the data does not fit into the buffer.
+*
+* Parameters
+* BufferIndex Index of "Up"-buffer to be used (e.g. 0 for "Terminal").
+* pBuffer Pointer to character array. Does not need to point to a \0 terminated string.
+* NumBytes Number of bytes to be stored in the SEGGER RTT control block.
+*
+* Return value
+* Number of bytes which have been stored in the "Up"-buffer.
+*
+* Notes
+* (1) If there is not enough space in the "Up"-buffer, all data is dropped.
+* (2) For performance reasons this function does not call Init()
+* and may only be called after RTT has been initialized.
+* Either by calling SEGGER_RTT_Init() or calling another RTT API function first.
+*/
+unsigned SEGGER_RTT_WriteSkipNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) {
+ const char* pData;
+ SEGGER_RTT_BUFFER_UP* pRing;
+ unsigned Avail;
+ unsigned RdOff;
+ unsigned WrOff;
+ unsigned Rem;
+#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
+ char* pDst;
+#endif
+
+ pData = (const char *)pBuffer;
+ //
+ // Get "to-host" ring buffer and copy some elements into local variables.
+ //
+ pRing = &_SEGGER_RTT.aUp[BufferIndex];
+ RdOff = pRing->RdOff;
+ WrOff = pRing->WrOff;
+ //
+ // Handle the most common cases fastest.
+ // Which is:
+ // RdOff <= WrOff -> Space until wrap around is free.
+ // AND
+ // WrOff + NumBytes < SizeOfBuffer -> No Wrap around necessary.
+ //
+ // OR
+ //
+ // RdOff > WrOff -> Space until RdOff - 1 is free.
+ // AND
+ // WrOff + NumBytes < RdOff -> Data fits into buffer
+ //
+ if (RdOff <= WrOff) {
+ //
+ // Get space until WrOff will be at wrap around.
+ //
+ Avail = pRing->SizeOfBuffer - 1u - WrOff ;
+ if (Avail >= NumBytes) {
+#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
+ pDst = pRing->pBuffer + WrOff;
+ WrOff += NumBytes;
+ while (NumBytes--) {
+ *pDst++ = *pData++;
+ };
+ pRing->WrOff = WrOff;
+#else
+ SEGGER_RTT_MEMCPY(pRing->pBuffer + WrOff, pData, NumBytes);
+ pRing->WrOff = WrOff + NumBytes;
+#endif
+ return 1;
+ }
+ //
+ // If data did not fit into space until wrap around calculate complete space in buffer.
+ //
+ Avail += RdOff;
+ //
+ // If there is still no space for the whole of this output, don't bother.
+ //
+ if (Avail >= NumBytes) {
+ //
+ // OK, we have enough space in buffer. Copy in one or 2 chunks
+ //
+ Rem = pRing->SizeOfBuffer - WrOff; // Space until end of buffer
+ if (Rem > NumBytes) {
+#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
+ pDst = pRing->pBuffer + WrOff;
+ WrOff += NumBytes;
+ while (NumBytes--) {
+ *pDst++ = *pData++;
+ };
+ pRing->WrOff = WrOff;
+#else
+ SEGGER_RTT_MEMCPY(pRing->pBuffer + WrOff, pData, NumBytes);
+ pRing->WrOff = WrOff + NumBytes;
+#endif
+ } else {
+ //
+ // We reach the end of the buffer, so need to wrap around
+ //
+#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
+ pDst = pRing->pBuffer + WrOff;
+ NumBytes -= Rem;
+ WrOff = NumBytes;
+ do {
+ *pDst++ = *pData++;
+ } while (--Rem);
+ pDst = pRing->pBuffer;
+ while (NumBytes--) {
+ *pDst++ = *pData++;
+ };
+ pRing->WrOff = WrOff;
+#else
+ SEGGER_RTT_MEMCPY(pRing->pBuffer + WrOff, pData, Rem);
+ SEGGER_RTT_MEMCPY(pRing->pBuffer, pData + Rem, NumBytes - Rem);
+ pRing->WrOff = NumBytes - Rem;
+#endif
+ }
+ return 1;
+ }
+ } else {
+ Avail = RdOff - WrOff - 1u;
+ if (Avail >= NumBytes) {
+#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
+ pDst = pRing->pBuffer + WrOff;
+ WrOff += NumBytes;
+ while (NumBytes--) {
+ *pDst++ = *pData++;
+ };
+ pRing->WrOff = WrOff;
+#else
+ SEGGER_RTT_MEMCPY(pRing->pBuffer + WrOff, pData, NumBytes);
+ pRing->WrOff = WrOff + NumBytes;
+#endif
+ return 1;
+ }
+ }
+ //
+ // If we reach this point no data has been written
+ //
+ return 0;
+}
+
+/*********************************************************************
+*
+* SEGGER_RTT_WriteNoLock
+*
+* Function description
+* Stores a specified number of characters in SEGGER RTT
+* control block which is then read by the host.
+* SEGGER_RTT_WriteNoLock does not lock the application.
+*
+* Parameters
+* BufferIndex Index of "Up"-buffer to be used (e.g. 0 for "Terminal").
+* pBuffer Pointer to character array. Does not need to point to a \0 terminated string.
+* NumBytes Number of bytes to be stored in the SEGGER RTT control block.
+*
+* Return value
+* Number of bytes which have been stored in the "Up"-buffer.
+*
+* Notes
+* (1) Data is stored according to buffer flags.
+* (2) For performance reasons this function does not call Init()
+* and may only be called after RTT has been initialized.
+* Either by calling SEGGER_RTT_Init() or calling another RTT API function first.
+*/
+unsigned SEGGER_RTT_WriteNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) {
+ unsigned Status;
+ unsigned Avail;
+ const char* pData;
+ SEGGER_RTT_BUFFER_UP* pRing;
+
+ pData = (const char *)pBuffer;
+ //
+ // Get "to-host" ring buffer.
+ //
+ pRing = &_SEGGER_RTT.aUp[BufferIndex];
+ //
+ // How we output depends upon the mode...
+ //
+ switch (pRing->Flags) {
+ case SEGGER_RTT_MODE_NO_BLOCK_SKIP:
+ //
+ // If we are in skip mode and there is no space for the whole
+ // of this output, don't bother.
+ //
+ Avail = _GetAvailWriteSpace(pRing);
+ if (Avail < NumBytes) {
+ Status = 0u;
+ } else {
+ Status = NumBytes;
+ _WriteNoCheck(pRing, pData, NumBytes);
+ }
+ break;
+ case SEGGER_RTT_MODE_NO_BLOCK_TRIM:
+ //
+ // If we are in trim mode, trim to what we can output without blocking.
+ //
+ Avail = _GetAvailWriteSpace(pRing);
+ Status = Avail < NumBytes ? Avail : NumBytes;
+ _WriteNoCheck(pRing, pData, Status);
+ break;
+ case SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL:
+ //
+ // If we are in blocking mode, output everything.
+ //
+ Status = _WriteBlocking(pRing, pData, NumBytes);
+ break;
+ default:
+ Status = 0u;
+ break;
+ }
+ //
+ // Finish up.
+ //
+ return Status;
+}
+
+/*********************************************************************
+*
+* SEGGER_RTT_Write
+*
+* Function description
+* Stores a specified number of characters in SEGGER RTT
+* control block which is then read by the host.
+*
+* Parameters
+* BufferIndex Index of "Up"-buffer to be used (e.g. 0 for "Terminal").
+* pBuffer Pointer to character array. Does not need to point to a \0 terminated string.
+* NumBytes Number of bytes to be stored in the SEGGER RTT control block.
+*
+* Return value
+* Number of bytes which have been stored in the "Up"-buffer.
+*
+* Notes
+* (1) Data is stored according to buffer flags.
+*/
+unsigned SEGGER_RTT_Write(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) {
+ unsigned Status;
+ //
+ INIT();
+ SEGGER_RTT_LOCK();
+ //
+ // Call the non-locking write function
+ //
+ Status = SEGGER_RTT_WriteNoLock(BufferIndex, pBuffer, NumBytes);
+ //
+ // Finish up.
+ //
+ SEGGER_RTT_UNLOCK();
+ //
+ return Status;
+}
+
+/*********************************************************************
+*
+* SEGGER_RTT_WriteString
+*
+* Function description
+* Stores string in SEGGER RTT control block.
+* This data is read by the host.
+*
+* Parameters
+* BufferIndex Index of "Up"-buffer to be used (e.g. 0 for "Terminal").
+* s Pointer to string.
+*
+* Return value
+* Number of bytes which have been stored in the "Up"-buffer.
+*
+* Notes
+* (1) Data is stored according to buffer flags.
+* (2) String passed to this function has to be \0 terminated
+* (3) \0 termination character is *not* stored in RTT buffer
+*/
+unsigned SEGGER_RTT_WriteString(unsigned BufferIndex, const char* s) {
+ unsigned Len;
+
+ Len = STRLEN(s);
+ return SEGGER_RTT_Write(BufferIndex, s, Len);
+}
+
+/*********************************************************************
+*
+* SEGGER_RTT_PutCharSkipNoLock
+*
+* Function description
+* Stores a single character/byte in SEGGER RTT buffer.
+* SEGGER_RTT_PutCharSkipNoLock does not lock the application and
+* skips the byte, if it does not fit into the buffer.
+*
+* Parameters
+* BufferIndex Index of "Up"-buffer to be used (e.g. 0 for "Terminal").
+* c Byte to be stored.
+*
+* Return value
+* Number of bytes which have been stored in the "Up"-buffer.
+*
+* Notes
+* (1) If there is not enough space in the "Up"-buffer, the character is dropped.
+* (2) For performance reasons this function does not call Init()
+* and may only be called after RTT has been initialized.
+* Either by calling SEGGER_RTT_Init() or calling another RTT API function first.
+*/
+
+unsigned SEGGER_RTT_PutCharSkipNoLock(unsigned BufferIndex, char c) {
+ SEGGER_RTT_BUFFER_UP* pRing;
+ unsigned WrOff;
+ unsigned Status;
+ //
+ // Get "to-host" ring buffer.
+ //
+ pRing = &_SEGGER_RTT.aUp[BufferIndex];
+ //
+ // Get write position and handle wrap-around if necessary
+ //
+ WrOff = pRing->WrOff + 1;
+ if (WrOff == pRing->SizeOfBuffer) {
+ WrOff = 0;
+ }
+ //
+ // Output byte if free space is available
+ //
+ if (WrOff != pRing->RdOff) {
+ pRing->pBuffer[pRing->WrOff] = c;
+ pRing->WrOff = WrOff;
+ Status = 1;
+ } else {
+ Status = 0;
+ }
+ //
+ return Status;
+}
+
+/*********************************************************************
+*
+* SEGGER_RTT_PutCharSkip
+*
+* Function description
+* Stores a single character/byte in SEGGER RTT buffer.
+*
+* Parameters
+* BufferIndex Index of "Up"-buffer to be used (e.g. 0 for "Terminal").
+* c Byte to be stored.
+*
+* Return value
+* Number of bytes which have been stored in the "Up"-buffer.
+*
+* Notes
+* (1) If there is not enough space in the "Up"-buffer, the character is dropped.
+*/
+
+unsigned SEGGER_RTT_PutCharSkip(unsigned BufferIndex, char c) {
+ SEGGER_RTT_BUFFER_UP* pRing;
+ unsigned WrOff;
+ unsigned Status;
+ //
+ // Prepare
+ //
+ INIT();
+ SEGGER_RTT_LOCK();
+ //
+ // Get "to-host" ring buffer.
+ //
+ pRing = &_SEGGER_RTT.aUp[BufferIndex];
+ //
+ // Get write position and handle wrap-around if necessary
+ //
+ WrOff = pRing->WrOff + 1;
+ if (WrOff == pRing->SizeOfBuffer) {
+ WrOff = 0;
+ }
+ //
+ // Output byte if free space is available
+ //
+ if (WrOff != pRing->RdOff) {
+ pRing->pBuffer[pRing->WrOff] = c;
+ pRing->WrOff = WrOff;
+ Status = 1;
+ } else {
+ Status = 0;
+ }
+ //
+ // Finish up.
+ //
+ SEGGER_RTT_UNLOCK();
+ //
+ return Status;
+}
+
+ /*********************************************************************
+*
+* SEGGER_RTT_PutChar
+*
+* Function description
+* Stores a single character/byte in SEGGER RTT buffer.
+*
+* Parameters
+* BufferIndex Index of "Up"-buffer to be used (e.g. 0 for "Terminal").
+* c Byte to be stored.
+*
+* Return value
+* Number of bytes which have been stored in the "Up"-buffer.
+*
+* Notes
+* (1) Data is stored according to buffer flags.
+*/
+
+unsigned SEGGER_RTT_PutChar(unsigned BufferIndex, char c) {
+ SEGGER_RTT_BUFFER_UP* pRing;
+ unsigned WrOff;
+ unsigned Status;
+ //
+ // Prepare
+ //
+ INIT();
+ SEGGER_RTT_LOCK();
+ //
+ // Get "to-host" ring buffer.
+ //
+ pRing = &_SEGGER_RTT.aUp[BufferIndex];
+ //
+ // Get write position and handle wrap-around if necessary
+ //
+ WrOff = pRing->WrOff + 1;
+ if (WrOff == pRing->SizeOfBuffer) {
+ WrOff = 0;
+ }
+ //
+ // Wait for free space if mode is set to blocking
+ //
+ if (pRing->Flags == SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL) {
+ while (WrOff == pRing->RdOff) {
+ ;
+ }
+ }
+ //
+ // Output byte if free space is available
+ //
+ if (WrOff != pRing->RdOff) {
+ pRing->pBuffer[pRing->WrOff] = c;
+ pRing->WrOff = WrOff;
+ Status = 1;
+ } else {
+ Status = 0;
+ }
+ //
+ // Finish up.
+ //
+ SEGGER_RTT_UNLOCK();
+ //
+ return Status;
+}
+
+/*********************************************************************
+*
+* SEGGER_RTT_GetKey
+*
+* Function description
+* Reads one character from the SEGGER RTT buffer.
+* Host has previously stored data there.
+*
+* Return value
+* < 0 - No character available (buffer empty).
+* >= 0 - Character which has been read. (Possible values: 0 - 255)
+*
+* Notes
+* (1) This function is only specified for accesses to RTT buffer 0.
+*/
+int SEGGER_RTT_GetKey(void) {
+ char c;
+ int r;
+
+ r = (int)SEGGER_RTT_Read(0u, &c, 1u);
+ if (r == 1) {
+ r = (int)(unsigned char)c;
+ } else {
+ r = -1;
+ }
+ return r;
+}
+
+/*********************************************************************
+*
+* SEGGER_RTT_WaitKey
+*
+* Function description
+* Waits until at least one character is avaible in the SEGGER RTT buffer.
+* Once a character is available, it is read and this function returns.
+*
+* Return value
+* >=0 - Character which has been read.
+*
+* Notes
+* (1) This function is only specified for accesses to RTT buffer 0
+* (2) This function is blocking if no character is present in RTT buffer
+*/
+int SEGGER_RTT_WaitKey(void) {
+ int r;
+
+ do {
+ r = SEGGER_RTT_GetKey();
+ } while (r < 0);
+ return r;
+}
+
+/*********************************************************************
+*
+* SEGGER_RTT_HasKey
+*
+* Function description
+* Checks if at least one character for reading is available in the SEGGER RTT buffer.
+*
+* Return value
+* == 0 - No characters are available to read.
+* == 1 - At least one character is available.
+*
+* Notes
+* (1) This function is only specified for accesses to RTT buffer 0
+*/
+int SEGGER_RTT_HasKey(void) {
+ unsigned RdOff;
+ int r;
+
+ INIT();
+ RdOff = _SEGGER_RTT.aDown[0].RdOff;
+ if (RdOff != _SEGGER_RTT.aDown[0].WrOff) {
+ r = 1;
+ } else {
+ r = 0;
+ }
+ return r;
+}
+
+/*********************************************************************
+*
+* SEGGER_RTT_HasData
+*
+* Function description
+* Check if there is data from the host in the given buffer.
+*
+* Return value:
+* ==0: No data
+* !=0: Data in buffer
+*
+*/
+unsigned SEGGER_RTT_HasData(unsigned BufferIndex) {
+ SEGGER_RTT_BUFFER_DOWN* pRing;
+ unsigned v;
+
+ pRing = &_SEGGER_RTT.aDown[BufferIndex];
+ v = pRing->WrOff;
+ return v - pRing->RdOff;
+}
+
+/*********************************************************************
+*
+* SEGGER_RTT_HasDataUp
+*
+* Function description
+* Check if there is data remaining to be sent in the given buffer.
+*
+* Return value:
+* ==0: No data
+* !=0: Data in buffer
+*
+*/
+unsigned SEGGER_RTT_HasDataUp(unsigned BufferIndex) {
+ SEGGER_RTT_BUFFER_UP* pRing;
+ unsigned v;
+
+ pRing = &_SEGGER_RTT.aUp[BufferIndex];
+ v = pRing->RdOff;
+ return pRing->WrOff - v;
+}
+
+/*********************************************************************
+*
+* SEGGER_RTT_AllocDownBuffer
+*
+* Function description
+* Run-time configuration of the next down-buffer (H->T).
+* The next buffer, which is not used yet is configured.
+* This includes: Buffer address, size, name, flags, ...
+*
+* Parameters
+* sName Pointer to a constant name string.
+* pBuffer Pointer to a buffer to be used.
+* BufferSize Size of the buffer.
+* Flags Operating modes. Define behavior if buffer is full (not enough space for entire message).
+*
+* Return value
+* >= 0 - O.K. Buffer Index
+* < 0 - Error
+*/
+int SEGGER_RTT_AllocDownBuffer(const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags) {
+ int BufferIndex;
+
+ INIT();
+ SEGGER_RTT_LOCK();
+ BufferIndex = 0;
+ do {
+ if (_SEGGER_RTT.aDown[BufferIndex].pBuffer == NULL) {
+ break;
+ }
+ BufferIndex++;
+ } while (BufferIndex < _SEGGER_RTT.MaxNumDownBuffers);
+ if (BufferIndex < _SEGGER_RTT.MaxNumDownBuffers) {
+ _SEGGER_RTT.aDown[BufferIndex].sName = sName;
+ _SEGGER_RTT.aDown[BufferIndex].pBuffer = (char*)pBuffer;
+ _SEGGER_RTT.aDown[BufferIndex].SizeOfBuffer = BufferSize;
+ _SEGGER_RTT.aDown[BufferIndex].RdOff = 0u;
+ _SEGGER_RTT.aDown[BufferIndex].WrOff = 0u;
+ _SEGGER_RTT.aDown[BufferIndex].Flags = Flags;
+ } else {
+ BufferIndex = -1;
+ }
+ SEGGER_RTT_UNLOCK();
+ return BufferIndex;
+}
+
+/*********************************************************************
+*
+* SEGGER_RTT_AllocUpBuffer
+*
+* Function description
+* Run-time configuration of the next up-buffer (T->H).
+* The next buffer, which is not used yet is configured.
+* This includes: Buffer address, size, name, flags, ...
+*
+* Parameters
+* sName Pointer to a constant name string.
+* pBuffer Pointer to a buffer to be used.
+* BufferSize Size of the buffer.
+* Flags Operating modes. Define behavior if buffer is full (not enough space for entire message).
+*
+* Return value
+* >= 0 - O.K. Buffer Index
+* < 0 - Error
+*/
+int SEGGER_RTT_AllocUpBuffer(const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags) {
+ int BufferIndex;
+
+ INIT();
+ SEGGER_RTT_LOCK();
+ BufferIndex = 0;
+ do {
+ if (_SEGGER_RTT.aUp[BufferIndex].pBuffer == NULL) {
+ break;
+ }
+ BufferIndex++;
+ } while (BufferIndex < _SEGGER_RTT.MaxNumUpBuffers);
+ if (BufferIndex < _SEGGER_RTT.MaxNumUpBuffers) {
+ _SEGGER_RTT.aUp[BufferIndex].sName = sName;
+ _SEGGER_RTT.aUp[BufferIndex].pBuffer = (char*)pBuffer;
+ _SEGGER_RTT.aUp[BufferIndex].SizeOfBuffer = BufferSize;
+ _SEGGER_RTT.aUp[BufferIndex].RdOff = 0u;
+ _SEGGER_RTT.aUp[BufferIndex].WrOff = 0u;
+ _SEGGER_RTT.aUp[BufferIndex].Flags = Flags;
+ } else {
+ BufferIndex = -1;
+ }
+ SEGGER_RTT_UNLOCK();
+ return BufferIndex;
+}
+
+/*********************************************************************
+*
+* SEGGER_RTT_ConfigUpBuffer
+*
+* Function description
+* Run-time configuration of a specific up-buffer (T->H).
+* Buffer to be configured is specified by index.
+* This includes: Buffer address, size, name, flags, ...
+*
+* Parameters
+* BufferIndex Index of the buffer to configure.
+* sName Pointer to a constant name string.
+* pBuffer Pointer to a buffer to be used.
+* BufferSize Size of the buffer.
+* Flags Operating modes. Define behavior if buffer is full (not enough space for entire message).
+*
+* Return value
+* >= 0 - O.K.
+* < 0 - Error
+*
+* Additional information
+* Buffer 0 is configured on compile-time.
+* May only be called once per buffer.
+* Buffer name and flags can be reconfigured using the appropriate functions.
+*/
+int SEGGER_RTT_ConfigUpBuffer(unsigned BufferIndex, const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags) {
+ int r;
+
+ INIT();
+ if (BufferIndex < (unsigned)_SEGGER_RTT.MaxNumUpBuffers) {
+ SEGGER_RTT_LOCK();
+ if (BufferIndex > 0u) {
+ _SEGGER_RTT.aUp[BufferIndex].sName = sName;
+ _SEGGER_RTT.aUp[BufferIndex].pBuffer = (char*)pBuffer;
+ _SEGGER_RTT.aUp[BufferIndex].SizeOfBuffer = BufferSize;
+ _SEGGER_RTT.aUp[BufferIndex].RdOff = 0u;
+ _SEGGER_RTT.aUp[BufferIndex].WrOff = 0u;
+ }
+ _SEGGER_RTT.aUp[BufferIndex].Flags = Flags;
+ SEGGER_RTT_UNLOCK();
+ r = 0;
+ } else {
+ r = -1;
+ }
+ return r;
+}
+
+/*********************************************************************
+*
+* SEGGER_RTT_ConfigDownBuffer
+*
+* Function description
+* Run-time configuration of a specific down-buffer (H->T).
+* Buffer to be configured is specified by index.
+* This includes: Buffer address, size, name, flags, ...
+*
+* Parameters
+* BufferIndex Index of the buffer to configure.
+* sName Pointer to a constant name string.
+* pBuffer Pointer to a buffer to be used.
+* BufferSize Size of the buffer.
+* Flags Operating modes. Define behavior if buffer is full (not enough space for entire message).
+*
+* Return value
+* >= 0 O.K.
+* < 0 Error
+*
+* Additional information
+* Buffer 0 is configured on compile-time.
+* May only be called once per buffer.
+* Buffer name and flags can be reconfigured using the appropriate functions.
+*/
+int SEGGER_RTT_ConfigDownBuffer(unsigned BufferIndex, const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags) {
+ int r;
+
+ INIT();
+ if (BufferIndex < (unsigned)_SEGGER_RTT.MaxNumDownBuffers) {
+ SEGGER_RTT_LOCK();
+ if (BufferIndex > 0u) {
+ _SEGGER_RTT.aDown[BufferIndex].sName = sName;
+ _SEGGER_RTT.aDown[BufferIndex].pBuffer = (char*)pBuffer;
+ _SEGGER_RTT.aDown[BufferIndex].SizeOfBuffer = BufferSize;
+ _SEGGER_RTT.aDown[BufferIndex].RdOff = 0u;
+ _SEGGER_RTT.aDown[BufferIndex].WrOff = 0u;
+ }
+ _SEGGER_RTT.aDown[BufferIndex].Flags = Flags;
+ SEGGER_RTT_UNLOCK();
+ r = 0;
+ } else {
+ r = -1;
+ }
+ return r;
+}
+
+/*********************************************************************
+*
+* SEGGER_RTT_SetNameUpBuffer
+*
+* Function description
+* Run-time configuration of a specific up-buffer name (T->H).
+* Buffer to be configured is specified by index.
+*
+* Parameters
+* BufferIndex Index of the buffer to renamed.
+* sName Pointer to a constant name string.
+*
+* Return value
+* >= 0 O.K.
+* < 0 Error
+*/
+int SEGGER_RTT_SetNameUpBuffer(unsigned BufferIndex, const char* sName) {
+ int r;
+
+ INIT();
+ if (BufferIndex < (unsigned)_SEGGER_RTT.MaxNumUpBuffers) {
+ SEGGER_RTT_LOCK();
+ _SEGGER_RTT.aUp[BufferIndex].sName = sName;
+ SEGGER_RTT_UNLOCK();
+ r = 0;
+ } else {
+ r = -1;
+ }
+ return r;
+}
+
+/*********************************************************************
+*
+* SEGGER_RTT_SetNameDownBuffer
+*
+* Function description
+* Run-time configuration of a specific Down-buffer name (T->H).
+* Buffer to be configured is specified by index.
+*
+* Parameters
+* BufferIndex Index of the buffer to renamed.
+* sName Pointer to a constant name string.
+*
+* Return value
+* >= 0 O.K.
+* < 0 Error
+*/
+int SEGGER_RTT_SetNameDownBuffer(unsigned BufferIndex, const char* sName) {
+ int r;
+
+ INIT();
+ if (BufferIndex < (unsigned)_SEGGER_RTT.MaxNumDownBuffers) {
+ SEGGER_RTT_LOCK();
+ _SEGGER_RTT.aDown[BufferIndex].sName = sName;
+ SEGGER_RTT_UNLOCK();
+ r = 0;
+ } else {
+ r = -1;
+ }
+ return r;
+}
+
+/*********************************************************************
+*
+* SEGGER_RTT_SetFlagsUpBuffer
+*
+* Function description
+* Run-time configuration of specific up-buffer flags (T->H).
+* Buffer to be configured is specified by index.
+*
+* Parameters
+* BufferIndex Index of the buffer.
+* Flags Flags to set for the buffer.
+*
+* Return value
+* >= 0 O.K.
+* < 0 Error
+*/
+int SEGGER_RTT_SetFlagsUpBuffer(unsigned BufferIndex, unsigned Flags) {
+ int r;
+
+ INIT();
+ if (BufferIndex < (unsigned)_SEGGER_RTT.MaxNumUpBuffers) {
+ SEGGER_RTT_LOCK();
+ _SEGGER_RTT.aUp[BufferIndex].Flags = Flags;
+ SEGGER_RTT_UNLOCK();
+ r = 0;
+ } else {
+ r = -1;
+ }
+ return r;
+}
+
+/*********************************************************************
+*
+* SEGGER_RTT_SetFlagsDownBuffer
+*
+* Function description
+* Run-time configuration of specific Down-buffer flags (T->H).
+* Buffer to be configured is specified by index.
+*
+* Parameters
+* BufferIndex Index of the buffer to renamed.
+* Flags Flags to set for the buffer.
+*
+* Return value
+* >= 0 O.K.
+* < 0 Error
+*/
+int SEGGER_RTT_SetFlagsDownBuffer(unsigned BufferIndex, unsigned Flags) {
+ int r;
+
+ INIT();
+ if (BufferIndex < (unsigned)_SEGGER_RTT.MaxNumDownBuffers) {
+ SEGGER_RTT_LOCK();
+ _SEGGER_RTT.aDown[BufferIndex].Flags = Flags;
+ SEGGER_RTT_UNLOCK();
+ r = 0;
+ } else {
+ r = -1;
+ }
+ return r;
+}
+
+/*********************************************************************
+*
+* SEGGER_RTT_Init
+*
+* Function description
+* Initializes the RTT Control Block.
+* Should be used in RAM targets, at start of the application.
+*
+*/
+void SEGGER_RTT_Init (void) {
+ _DoInit();
+}
+
+/*********************************************************************
+*
+* SEGGER_RTT_SetTerminal
+*
+* Function description
+* Sets the terminal to be used for output on channel 0.
+*
+* Parameters
+* TerminalId Index of the terminal.
+*
+* Return value
+* >= 0 O.K.
+* < 0 Error (e.g. if RTT is configured for non-blocking mode and there was no space in the buffer to set the new terminal Id)
+*/
+int SEGGER_RTT_SetTerminal (char TerminalId) {
+ unsigned char ac[2];
+ SEGGER_RTT_BUFFER_UP* pRing;
+ unsigned Avail;
+ int r;
+ //
+ INIT();
+ //
+ r = 0;
+ ac[0] = 0xFFu;
+ if ((unsigned char)TerminalId < (unsigned char)sizeof(_aTerminalId)) { // We only support a certain number of channels
+ ac[1] = _aTerminalId[(unsigned char)TerminalId];
+ pRing = &_SEGGER_RTT.aUp[0]; // Buffer 0 is always reserved for terminal I/O, so we can use index 0 here, fixed
+ SEGGER_RTT_LOCK(); // Lock to make sure that no other task is writing into buffer, while we are and number of free bytes in buffer does not change downwards after checking and before writing
+ if ((pRing->Flags & SEGGER_RTT_MODE_MASK) == SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL) {
+ _ActiveTerminal = TerminalId;
+ _WriteBlocking(pRing, (const char*)ac, 2u);
+ } else { // Skipping mode or trim mode? => We cannot trim this command so handling is the same for both modes
+ Avail = _GetAvailWriteSpace(pRing);
+ if (Avail >= 2) {
+ _ActiveTerminal = TerminalId; // Only change active terminal in case of success
+ _WriteNoCheck(pRing, (const char*)ac, 2u);
+ } else {
+ r = -1;
+ }
+ }
+ SEGGER_RTT_UNLOCK();
+ } else {
+ r = -1;
+ }
+ return r;
+}
+
+/*********************************************************************
+*
+* SEGGER_RTT_TerminalOut
+*
+* Function description
+* Writes a string to the given terminal
+* without changing the terminal for channel 0.
+*
+* Parameters
+* TerminalId Index of the terminal.
+* s String to be printed on the terminal.
+*
+* Return value
+* >= 0 - Number of bytes written.
+* < 0 - Error.
+*
+*/
+int SEGGER_RTT_TerminalOut (char TerminalId, const char* s) {
+ int Status;
+ unsigned FragLen;
+ unsigned Avail;
+ SEGGER_RTT_BUFFER_UP* pRing;
+ //
+ INIT();
+ //
+ // Validate terminal ID.
+ //
+ if (TerminalId < (char)sizeof(_aTerminalId)) { // We only support a certain number of channels
+ //
+ // Get "to-host" ring buffer.
+ //
+ pRing = &_SEGGER_RTT.aUp[0];
+ //
+ // Need to be able to change terminal, write data, change back.
+ // Compute the fixed and variable sizes.
+ //
+ FragLen = STRLEN(s);
+ //
+ // How we output depends upon the mode...
+ //
+ SEGGER_RTT_LOCK();
+ Avail = _GetAvailWriteSpace(pRing);
+ switch (pRing->Flags & SEGGER_RTT_MODE_MASK) {
+ case SEGGER_RTT_MODE_NO_BLOCK_SKIP:
+ //
+ // If we are in skip mode and there is no space for the whole
+ // of this output, don't bother switching terminals at all.
+ //
+ if (Avail < (FragLen + 4u)) {
+ Status = 0;
+ } else {
+ _PostTerminalSwitch(pRing, TerminalId);
+ Status = (int)_WriteBlocking(pRing, s, FragLen);
+ _PostTerminalSwitch(pRing, _ActiveTerminal);
+ }
+ break;
+ case SEGGER_RTT_MODE_NO_BLOCK_TRIM:
+ //
+ // If we are in trim mode and there is not enough space for everything,
+ // trim the output but always include the terminal switch. If no room
+ // for terminal switch, skip that totally.
+ //
+ if (Avail < 4u) {
+ Status = -1;
+ } else {
+ _PostTerminalSwitch(pRing, TerminalId);
+ Status = (int)_WriteBlocking(pRing, s, (FragLen < (Avail - 4u)) ? FragLen : (Avail - 4u));
+ _PostTerminalSwitch(pRing, _ActiveTerminal);
+ }
+ break;
+ case SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL:
+ //
+ // If we are in blocking mode, output everything.
+ //
+ _PostTerminalSwitch(pRing, TerminalId);
+ Status = (int)_WriteBlocking(pRing, s, FragLen);
+ _PostTerminalSwitch(pRing, _ActiveTerminal);
+ break;
+ default:
+ Status = -1;
+ break;
+ }
+ //
+ // Finish up.
+ //
+ SEGGER_RTT_UNLOCK();
+ } else {
+ Status = -1;
+ }
+ return Status;
+}
+
+
+/*************************** End of file ****************************/
diff --git a/third_party/jlink/SEGGER_RTT_V640/RTT/SEGGER_RTT.h b/third_party/jlink/SEGGER_RTT_V640/RTT/SEGGER_RTT.h
index 35ac870..7c6a0a9 100644
--- a/third_party/jlink/SEGGER_RTT_V640/RTT/SEGGER_RTT.h
+++ b/third_party/jlink/SEGGER_RTT_V640/RTT/SEGGER_RTT.h
@@ -1,260 +1,260 @@
-/*********************************************************************
-* SEGGER Microcontroller GmbH *
-* The Embedded Experts *
-**********************************************************************
-* *
-* (c) 1995 - 2018 SEGGER Microcontroller GmbH *
-* *
-* www.segger.com Support: support@segger.com *
-* *
-**********************************************************************
-* *
-* SEGGER RTT * Real Time Transfer for embedded targets *
-* *
-**********************************************************************
-* *
-* All rights reserved. *
-* *
-* SEGGER strongly recommends to not make any changes *
-* to or modify the source code of this software in order to stay *
-* compatible with the RTT protocol and J-Link. *
-* *
-* Redistribution and use in source and binary forms, with or *
-* without modification, are permitted provided that the following *
-* conditions are met: *
-* *
-* o Redistributions of source code must retain the above copyright *
-* notice, this list of conditions and the following disclaimer. *
-* *
-* o Redistributions in binary form must reproduce the above *
-* copyright notice, this list of conditions and the following *
-* disclaimer in the documentation and/or other materials provided *
-* with the distribution. *
-* *
-* o Neither the name of SEGGER Microcontroller GmbH *
-* nor the names of its contributors may be used to endorse or *
-* promote products derived from this software without specific *
-* prior written permission. *
-* *
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
-* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
-* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
-* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
-* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
-* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
-* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
-* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
-* DAMAGE. *
-* *
-**********************************************************************
----------------------------END-OF-HEADER------------------------------
-File : SEGGER_RTT.h
-Purpose : Implementation of SEGGER real-time transfer which allows
- real-time communication on targets which support debugger
- memory accesses while the CPU is running.
-Revision: $Rev: 12826 $
-----------------------------------------------------------------------
-*/
-
-#ifndef SEGGER_RTT_H
-#define SEGGER_RTT_H
-
-#ifdef SEGGER_RTT_CONFIG_H
-#include SEGGER_RTT_CONFIG_H
-#else
-#include "SEGGER_RTT_Conf.h"
-#endif
-
-#ifndef SEGGER_RTT_ASM // defined when SEGGER_RTT.h is included from assembly file
-#include <stdlib.h>
-#include <stdarg.h>
-
-/*********************************************************************
-*
-* Defines, fixed
-*
-**********************************************************************
-*/
-
-/*********************************************************************
-*
-* Types
-*
-**********************************************************************
-*/
-
-//
-// Description for a circular buffer (also called "ring buffer")
-// which is used as up-buffer (T->H)
-//
-typedef struct {
- const char* sName; // Optional name. Standard names so far are: "Terminal", "SysView", "J-Scope_t4i4"
- char* pBuffer; // Pointer to start of buffer
- unsigned SizeOfBuffer; // Buffer size in bytes. Note that one byte is lost, as this implementation does not fill up the buffer in order to avoid the problem of being unable to distinguish between full and empty.
- unsigned WrOff; // Position of next item to be written by either target.
- volatile unsigned RdOff; // Position of next item to be read by host. Must be volatile since it may be modified by host.
- unsigned Flags; // Contains configuration flags
-} SEGGER_RTT_BUFFER_UP;
-
-//
-// Description for a circular buffer (also called "ring buffer")
-// which is used as down-buffer (H->T)
-//
-typedef struct {
- const char* sName; // Optional name. Standard names so far are: "Terminal", "SysView", "J-Scope_t4i4"
- char* pBuffer; // Pointer to start of buffer
- unsigned SizeOfBuffer; // Buffer size in bytes. Note that one byte is lost, as this implementation does not fill up the buffer in order to avoid the problem of being unable to distinguish between full and empty.
- volatile unsigned WrOff; // Position of next item to be written by host. Must be volatile since it may be modified by host.
- unsigned RdOff; // Position of next item to be read by target (down-buffer).
- unsigned Flags; // Contains configuration flags
-} SEGGER_RTT_BUFFER_DOWN;
-
-//
-// RTT control block which describes the number of buffers available
-// as well as the configuration for each buffer
-//
-//
-typedef struct {
- char acID[16]; // Initialized to "SEGGER RTT"
- int MaxNumUpBuffers; // Initialized to SEGGER_RTT_MAX_NUM_UP_BUFFERS (type. 2)
- int MaxNumDownBuffers; // Initialized to SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (type. 2)
- SEGGER_RTT_BUFFER_UP aUp[SEGGER_RTT_MAX_NUM_UP_BUFFERS]; // Up buffers, transferring information up from target via debug probe to host
- SEGGER_RTT_BUFFER_DOWN aDown[SEGGER_RTT_MAX_NUM_DOWN_BUFFERS]; // Down buffers, transferring information down from host via debug probe to target
-} SEGGER_RTT_CB;
-
-/*********************************************************************
-*
-* Global data
-*
-**********************************************************************
-*/
-extern SEGGER_RTT_CB _SEGGER_RTT;
-
-/*********************************************************************
-*
-* RTT API functions
-*
-**********************************************************************
-*/
-#ifdef __cplusplus
- extern "C" {
-#endif
-int SEGGER_RTT_AllocDownBuffer (const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags);
-int SEGGER_RTT_AllocUpBuffer (const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags);
-int SEGGER_RTT_ConfigUpBuffer (unsigned BufferIndex, const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags);
-int SEGGER_RTT_ConfigDownBuffer (unsigned BufferIndex, const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags);
-int SEGGER_RTT_GetKey (void);
-unsigned SEGGER_RTT_HasData (unsigned BufferIndex);
-int SEGGER_RTT_HasKey (void);
-unsigned SEGGER_RTT_HasDataUp (unsigned BufferIndex);
-void SEGGER_RTT_Init (void);
-unsigned SEGGER_RTT_Read (unsigned BufferIndex, void* pBuffer, unsigned BufferSize);
-unsigned SEGGER_RTT_ReadNoLock (unsigned BufferIndex, void* pData, unsigned BufferSize);
-int SEGGER_RTT_SetNameDownBuffer (unsigned BufferIndex, const char* sName);
-int SEGGER_RTT_SetNameUpBuffer (unsigned BufferIndex, const char* sName);
-int SEGGER_RTT_SetFlagsDownBuffer (unsigned BufferIndex, unsigned Flags);
-int SEGGER_RTT_SetFlagsUpBuffer (unsigned BufferIndex, unsigned Flags);
-int SEGGER_RTT_WaitKey (void);
-unsigned SEGGER_RTT_Write (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
-unsigned SEGGER_RTT_WriteNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
-unsigned SEGGER_RTT_WriteSkipNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
-unsigned SEGGER_RTT_WriteString (unsigned BufferIndex, const char* s);
-void SEGGER_RTT_WriteWithOverwriteNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
-unsigned SEGGER_RTT_PutChar (unsigned BufferIndex, char c);
-unsigned SEGGER_RTT_PutCharSkip (unsigned BufferIndex, char c);
-unsigned SEGGER_RTT_PutCharSkipNoLock (unsigned BufferIndex, char c);
-//
-// Function macro for performance optimization
-//
-#define SEGGER_RTT_HASDATA(n) (_SEGGER_RTT.aDown[n].WrOff - _SEGGER_RTT.aDown[n].RdOff)
-
-/*********************************************************************
-*
-* RTT "Terminal" API functions
-*
-**********************************************************************
-*/
-int SEGGER_RTT_SetTerminal (char TerminalId);
-int SEGGER_RTT_TerminalOut (char TerminalId, const char* s);
-
-/*********************************************************************
-*
-* RTT printf functions (require SEGGER_RTT_printf.c)
-*
-**********************************************************************
-*/
-int SEGGER_RTT_printf(unsigned BufferIndex, const char * sFormat, ...);
-int SEGGER_RTT_vprintf(unsigned BufferIndex, const char * sFormat, va_list * pParamList);
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif // SEGGER_RTT_ASM
-
-/*********************************************************************
-*
-* Defines
-*
-**********************************************************************
-*/
-
-//
-// Operating modes. Define behavior if buffer is full (not enough space for entire message)
-//
-#define SEGGER_RTT_MODE_NO_BLOCK_SKIP (0) // Skip. Do not block, output nothing. (Default)
-#define SEGGER_RTT_MODE_NO_BLOCK_TRIM (1) // Trim: Do not block, output as much as fits.
-#define SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL (2) // Block: Wait until there is space in the buffer.
-#define SEGGER_RTT_MODE_MASK (3)
-
-//
-// Control sequences, based on ANSI.
-// Can be used to control color, and clear the screen
-//
-#define RTT_CTRL_RESET "\x1B[0m" // Reset to default colors
-#define RTT_CTRL_CLEAR "\x1B[2J" // Clear screen, reposition cursor to top left
-
-#define RTT_CTRL_TEXT_BLACK "\x1B[2;30m"
-#define RTT_CTRL_TEXT_RED "\x1B[2;31m"
-#define RTT_CTRL_TEXT_GREEN "\x1B[2;32m"
-#define RTT_CTRL_TEXT_YELLOW "\x1B[2;33m"
-#define RTT_CTRL_TEXT_BLUE "\x1B[2;34m"
-#define RTT_CTRL_TEXT_MAGENTA "\x1B[2;35m"
-#define RTT_CTRL_TEXT_CYAN "\x1B[2;36m"
-#define RTT_CTRL_TEXT_WHITE "\x1B[2;37m"
-
-#define RTT_CTRL_TEXT_BRIGHT_BLACK "\x1B[1;30m"
-#define RTT_CTRL_TEXT_BRIGHT_RED "\x1B[1;31m"
-#define RTT_CTRL_TEXT_BRIGHT_GREEN "\x1B[1;32m"
-#define RTT_CTRL_TEXT_BRIGHT_YELLOW "\x1B[1;33m"
-#define RTT_CTRL_TEXT_BRIGHT_BLUE "\x1B[1;34m"
-#define RTT_CTRL_TEXT_BRIGHT_MAGENTA "\x1B[1;35m"
-#define RTT_CTRL_TEXT_BRIGHT_CYAN "\x1B[1;36m"
-#define RTT_CTRL_TEXT_BRIGHT_WHITE "\x1B[1;37m"
-
-#define RTT_CTRL_BG_BLACK "\x1B[24;40m"
-#define RTT_CTRL_BG_RED "\x1B[24;41m"
-#define RTT_CTRL_BG_GREEN "\x1B[24;42m"
-#define RTT_CTRL_BG_YELLOW "\x1B[24;43m"
-#define RTT_CTRL_BG_BLUE "\x1B[24;44m"
-#define RTT_CTRL_BG_MAGENTA "\x1B[24;45m"
-#define RTT_CTRL_BG_CYAN "\x1B[24;46m"
-#define RTT_CTRL_BG_WHITE "\x1B[24;47m"
-
-#define RTT_CTRL_BG_BRIGHT_BLACK "\x1B[4;40m"
-#define RTT_CTRL_BG_BRIGHT_RED "\x1B[4;41m"
-#define RTT_CTRL_BG_BRIGHT_GREEN "\x1B[4;42m"
-#define RTT_CTRL_BG_BRIGHT_YELLOW "\x1B[4;43m"
-#define RTT_CTRL_BG_BRIGHT_BLUE "\x1B[4;44m"
-#define RTT_CTRL_BG_BRIGHT_MAGENTA "\x1B[4;45m"
-#define RTT_CTRL_BG_BRIGHT_CYAN "\x1B[4;46m"
-#define RTT_CTRL_BG_BRIGHT_WHITE "\x1B[4;47m"
-
-
-#endif
-
-/*************************** End of file ****************************/
+/*********************************************************************
+* SEGGER Microcontroller GmbH *
+* The Embedded Experts *
+**********************************************************************
+* *
+* (c) 1995 - 2018 SEGGER Microcontroller GmbH *
+* *
+* www.segger.com Support: support@segger.com *
+* *
+**********************************************************************
+* *
+* SEGGER RTT * Real Time Transfer for embedded targets *
+* *
+**********************************************************************
+* *
+* All rights reserved. *
+* *
+* SEGGER strongly recommends to not make any changes *
+* to or modify the source code of this software in order to stay *
+* compatible with the RTT protocol and J-Link. *
+* *
+* Redistribution and use in source and binary forms, with or *
+* without modification, are permitted provided that the following *
+* conditions are met: *
+* *
+* o Redistributions of source code must retain the above copyright *
+* notice, this list of conditions and the following disclaimer. *
+* *
+* o Redistributions in binary form must reproduce the above *
+* copyright notice, this list of conditions and the following *
+* disclaimer in the documentation and/or other materials provided *
+* with the distribution. *
+* *
+* o Neither the name of SEGGER Microcontroller GmbH *
+* nor the names of its contributors may be used to endorse or *
+* promote products derived from this software without specific *
+* prior written permission. *
+* *
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
+* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
+* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
+* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
+* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
+* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
+* DAMAGE. *
+* *
+**********************************************************************
+---------------------------END-OF-HEADER------------------------------
+File : SEGGER_RTT.h
+Purpose : Implementation of SEGGER real-time transfer which allows
+ real-time communication on targets which support debugger
+ memory accesses while the CPU is running.
+Revision: $Rev: 12826 $
+----------------------------------------------------------------------
+*/
+
+#ifndef SEGGER_RTT_H
+#define SEGGER_RTT_H
+
+#ifdef SEGGER_RTT_CONFIG_H
+#include SEGGER_RTT_CONFIG_H
+#else
+#include "SEGGER_RTT_Conf.h"
+#endif
+
+#ifndef SEGGER_RTT_ASM // defined when SEGGER_RTT.h is included from assembly file
+#include <stdlib.h>
+#include <stdarg.h>
+
+/*********************************************************************
+*
+* Defines, fixed
+*
+**********************************************************************
+*/
+
+/*********************************************************************
+*
+* Types
+*
+**********************************************************************
+*/
+
+//
+// Description for a circular buffer (also called "ring buffer")
+// which is used as up-buffer (T->H)
+//
+typedef struct {
+ const char* sName; // Optional name. Standard names so far are: "Terminal", "SysView", "J-Scope_t4i4"
+ char* pBuffer; // Pointer to start of buffer
+ unsigned SizeOfBuffer; // Buffer size in bytes. Note that one byte is lost, as this implementation does not fill up the buffer in order to avoid the problem of being unable to distinguish between full and empty.
+ unsigned WrOff; // Position of next item to be written by either target.
+ volatile unsigned RdOff; // Position of next item to be read by host. Must be volatile since it may be modified by host.
+ unsigned Flags; // Contains configuration flags
+} SEGGER_RTT_BUFFER_UP;
+
+//
+// Description for a circular buffer (also called "ring buffer")
+// which is used as down-buffer (H->T)
+//
+typedef struct {
+ const char* sName; // Optional name. Standard names so far are: "Terminal", "SysView", "J-Scope_t4i4"
+ char* pBuffer; // Pointer to start of buffer
+ unsigned SizeOfBuffer; // Buffer size in bytes. Note that one byte is lost, as this implementation does not fill up the buffer in order to avoid the problem of being unable to distinguish between full and empty.
+ volatile unsigned WrOff; // Position of next item to be written by host. Must be volatile since it may be modified by host.
+ unsigned RdOff; // Position of next item to be read by target (down-buffer).
+ unsigned Flags; // Contains configuration flags
+} SEGGER_RTT_BUFFER_DOWN;
+
+//
+// RTT control block which describes the number of buffers available
+// as well as the configuration for each buffer
+//
+//
+typedef struct {
+ char acID[16]; // Initialized to "SEGGER RTT"
+ int MaxNumUpBuffers; // Initialized to SEGGER_RTT_MAX_NUM_UP_BUFFERS (type. 2)
+ int MaxNumDownBuffers; // Initialized to SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (type. 2)
+ SEGGER_RTT_BUFFER_UP aUp[SEGGER_RTT_MAX_NUM_UP_BUFFERS]; // Up buffers, transferring information up from target via debug probe to host
+ SEGGER_RTT_BUFFER_DOWN aDown[SEGGER_RTT_MAX_NUM_DOWN_BUFFERS]; // Down buffers, transferring information down from host via debug probe to target
+} SEGGER_RTT_CB;
+
+/*********************************************************************
+*
+* Global data
+*
+**********************************************************************
+*/
+extern SEGGER_RTT_CB _SEGGER_RTT;
+
+/*********************************************************************
+*
+* RTT API functions
+*
+**********************************************************************
+*/
+#ifdef __cplusplus
+ extern "C" {
+#endif
+int SEGGER_RTT_AllocDownBuffer (const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags);
+int SEGGER_RTT_AllocUpBuffer (const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags);
+int SEGGER_RTT_ConfigUpBuffer (unsigned BufferIndex, const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags);
+int SEGGER_RTT_ConfigDownBuffer (unsigned BufferIndex, const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags);
+int SEGGER_RTT_GetKey (void);
+unsigned SEGGER_RTT_HasData (unsigned BufferIndex);
+int SEGGER_RTT_HasKey (void);
+unsigned SEGGER_RTT_HasDataUp (unsigned BufferIndex);
+void SEGGER_RTT_Init (void);
+unsigned SEGGER_RTT_Read (unsigned BufferIndex, void* pBuffer, unsigned BufferSize);
+unsigned SEGGER_RTT_ReadNoLock (unsigned BufferIndex, void* pData, unsigned BufferSize);
+int SEGGER_RTT_SetNameDownBuffer (unsigned BufferIndex, const char* sName);
+int SEGGER_RTT_SetNameUpBuffer (unsigned BufferIndex, const char* sName);
+int SEGGER_RTT_SetFlagsDownBuffer (unsigned BufferIndex, unsigned Flags);
+int SEGGER_RTT_SetFlagsUpBuffer (unsigned BufferIndex, unsigned Flags);
+int SEGGER_RTT_WaitKey (void);
+unsigned SEGGER_RTT_Write (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
+unsigned SEGGER_RTT_WriteNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
+unsigned SEGGER_RTT_WriteSkipNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
+unsigned SEGGER_RTT_WriteString (unsigned BufferIndex, const char* s);
+void SEGGER_RTT_WriteWithOverwriteNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
+unsigned SEGGER_RTT_PutChar (unsigned BufferIndex, char c);
+unsigned SEGGER_RTT_PutCharSkip (unsigned BufferIndex, char c);
+unsigned SEGGER_RTT_PutCharSkipNoLock (unsigned BufferIndex, char c);
+//
+// Function macro for performance optimization
+//
+#define SEGGER_RTT_HASDATA(n) (_SEGGER_RTT.aDown[n].WrOff - _SEGGER_RTT.aDown[n].RdOff)
+
+/*********************************************************************
+*
+* RTT "Terminal" API functions
+*
+**********************************************************************
+*/
+int SEGGER_RTT_SetTerminal (char TerminalId);
+int SEGGER_RTT_TerminalOut (char TerminalId, const char* s);
+
+/*********************************************************************
+*
+* RTT printf functions (require SEGGER_RTT_printf.c)
+*
+**********************************************************************
+*/
+int SEGGER_RTT_printf(unsigned BufferIndex, const char * sFormat, ...);
+int SEGGER_RTT_vprintf(unsigned BufferIndex, const char * sFormat, va_list * pParamList);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif // SEGGER_RTT_ASM
+
+/*********************************************************************
+*
+* Defines
+*
+**********************************************************************
+*/
+
+//
+// Operating modes. Define behavior if buffer is full (not enough space for entire message)
+//
+#define SEGGER_RTT_MODE_NO_BLOCK_SKIP (0) // Skip. Do not block, output nothing. (Default)
+#define SEGGER_RTT_MODE_NO_BLOCK_TRIM (1) // Trim: Do not block, output as much as fits.
+#define SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL (2) // Block: Wait until there is space in the buffer.
+#define SEGGER_RTT_MODE_MASK (3)
+
+//
+// Control sequences, based on ANSI.
+// Can be used to control color, and clear the screen
+//
+#define RTT_CTRL_RESET "\x1B[0m" // Reset to default colors
+#define RTT_CTRL_CLEAR "\x1B[2J" // Clear screen, reposition cursor to top left
+
+#define RTT_CTRL_TEXT_BLACK "\x1B[2;30m"
+#define RTT_CTRL_TEXT_RED "\x1B[2;31m"
+#define RTT_CTRL_TEXT_GREEN "\x1B[2;32m"
+#define RTT_CTRL_TEXT_YELLOW "\x1B[2;33m"
+#define RTT_CTRL_TEXT_BLUE "\x1B[2;34m"
+#define RTT_CTRL_TEXT_MAGENTA "\x1B[2;35m"
+#define RTT_CTRL_TEXT_CYAN "\x1B[2;36m"
+#define RTT_CTRL_TEXT_WHITE "\x1B[2;37m"
+
+#define RTT_CTRL_TEXT_BRIGHT_BLACK "\x1B[1;30m"
+#define RTT_CTRL_TEXT_BRIGHT_RED "\x1B[1;31m"
+#define RTT_CTRL_TEXT_BRIGHT_GREEN "\x1B[1;32m"
+#define RTT_CTRL_TEXT_BRIGHT_YELLOW "\x1B[1;33m"
+#define RTT_CTRL_TEXT_BRIGHT_BLUE "\x1B[1;34m"
+#define RTT_CTRL_TEXT_BRIGHT_MAGENTA "\x1B[1;35m"
+#define RTT_CTRL_TEXT_BRIGHT_CYAN "\x1B[1;36m"
+#define RTT_CTRL_TEXT_BRIGHT_WHITE "\x1B[1;37m"
+
+#define RTT_CTRL_BG_BLACK "\x1B[24;40m"
+#define RTT_CTRL_BG_RED "\x1B[24;41m"
+#define RTT_CTRL_BG_GREEN "\x1B[24;42m"
+#define RTT_CTRL_BG_YELLOW "\x1B[24;43m"
+#define RTT_CTRL_BG_BLUE "\x1B[24;44m"
+#define RTT_CTRL_BG_MAGENTA "\x1B[24;45m"
+#define RTT_CTRL_BG_CYAN "\x1B[24;46m"
+#define RTT_CTRL_BG_WHITE "\x1B[24;47m"
+
+#define RTT_CTRL_BG_BRIGHT_BLACK "\x1B[4;40m"
+#define RTT_CTRL_BG_BRIGHT_RED "\x1B[4;41m"
+#define RTT_CTRL_BG_BRIGHT_GREEN "\x1B[4;42m"
+#define RTT_CTRL_BG_BRIGHT_YELLOW "\x1B[4;43m"
+#define RTT_CTRL_BG_BRIGHT_BLUE "\x1B[4;44m"
+#define RTT_CTRL_BG_BRIGHT_MAGENTA "\x1B[4;45m"
+#define RTT_CTRL_BG_BRIGHT_CYAN "\x1B[4;46m"
+#define RTT_CTRL_BG_BRIGHT_WHITE "\x1B[4;47m"
+
+
+#endif
+
+/*************************** End of file ****************************/
diff --git a/third_party/jlink/SEGGER_RTT_V640/RTT/SEGGER_RTT_Conf.h b/third_party/jlink/SEGGER_RTT_V640/RTT/SEGGER_RTT_Conf.h
index d8112ac..d1ccfdd 100644
--- a/third_party/jlink/SEGGER_RTT_V640/RTT/SEGGER_RTT_Conf.h
+++ b/third_party/jlink/SEGGER_RTT_V640/RTT/SEGGER_RTT_Conf.h
@@ -1,340 +1,340 @@
-/*********************************************************************
-* SEGGER Microcontroller GmbH *
-* The Embedded Experts *
-**********************************************************************
-* *
-* (c) 1995 - 2018 SEGGER Microcontroller GmbH *
-* *
-* www.segger.com Support: support@segger.com *
-* *
-**********************************************************************
-* *
-* SEGGER RTT * Real Time Transfer for embedded targets *
-* *
-**********************************************************************
-* *
-* All rights reserved. *
-* *
-* SEGGER strongly recommends to not make any changes *
-* to or modify the source code of this software in order to stay *
-* compatible with the RTT protocol and J-Link. *
-* *
-* Redistribution and use in source and binary forms, with or *
-* without modification, are permitted provided that the following *
-* conditions are met: *
-* *
-* o Redistributions of source code must retain the above copyright *
-* notice, this list of conditions and the following disclaimer. *
-* *
-* o Redistributions in binary form must reproduce the above *
-* copyright notice, this list of conditions and the following *
-* disclaimer in the documentation and/or other materials provided *
-* with the distribution. *
-* *
-* o Neither the name of SEGGER Microcontroller GmbH *
-* nor the names of its contributors may be used to endorse or *
-* promote products derived from this software without specific *
-* prior written permission. *
-* *
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
-* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
-* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
-* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
-* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
-* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
-* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
-* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
-* DAMAGE. *
-* *
-**********************************************************************
----------------------------END-OF-HEADER------------------------------
-File : SEGGER_RTT_Conf.h
-Purpose : Implementation of SEGGER real-time transfer (RTT) which
- allows real-time communication on targets which support
- debugger memory accesses while the CPU is running.
-Revision: $Rev: 12847 $
-
-*/
-
-#ifndef SEGGER_RTT_CONF_H
-#define SEGGER_RTT_CONF_H
-
-#ifdef __IAR_SYSTEMS_ICC__
- #include <intrinsics.h>
-#endif
-
-/*********************************************************************
-*
-* Defines, configurable
-*
-**********************************************************************
-*/
-
-#define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3)
-#define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3)
-
-#define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k)
-#define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16)
-
-#define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64)
-
-#define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0)
-
-#define USE_RTT_ASM (0) // Use assembler version of SEGGER_RTT.c when 1
-
-/*********************************************************************
-*
-* RTT memcpy configuration
-*
-* memcpy() is good for large amounts of data,
-* but the overhead is big for small amounts, which are usually stored via RTT.
-* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead.
-*
-* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions.
-* This is may be required with memory access restrictions,
-* such as on Cortex-A devices with MMU.
-*/
-#define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop
-//
-// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets
-//
-//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__))
-// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes))
-//#endif
-
-//
-// Target is not allowed to perform other RTT operations while string still has not been stored completely.
-// Otherwise we would probably end up with a mixed string in the buffer.
-// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here.
-//
-// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4.
-// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches.
-// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly.
-// (Higher priority = lower priority number)
-// Default value for embOS: 128u
-// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
-// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC
-// or define SEGGER_RTT_LOCK() to completely disable interrupts.
-//
-
-#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20)
-
-/*********************************************************************
-*
-* RTT lock configuration for SEGGER Embedded Studio,
-* Rowley CrossStudio and GCC
-*/
-#if (defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__) || (defined __clang__)
- #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__))
- #define SEGGER_RTT_LOCK() { \
- unsigned int LockState; \
- __asm volatile ("mrs %0, primask \n\t" \
- "movs r1, $1 \n\t" \
- "msr primask, r1 \n\t" \
- : "=r" (LockState) \
- : \
- : "r1" \
- );
-
- #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \
- : \
- : "r" (LockState) \
- : \
- ); \
- }
- #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__))
- #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
- #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
- #endif
- #define SEGGER_RTT_LOCK() { \
- unsigned int LockState; \
- __asm volatile ("mrs %0, basepri \n\t" \
- "mov r1, %1 \n\t" \
- "msr basepri, r1 \n\t" \
- : "=r" (LockState) \
- : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \
- : "r1" \
- );
-
- #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \
- : \
- : "r" (LockState) \
- : \
- ); \
- }
-
- #elif defined(__ARM_ARCH_7A__)
- #define SEGGER_RTT_LOCK() { \
- unsigned int LockState; \
- __asm volatile ("mrs r1, CPSR \n\t" \
- "mov %0, r1 \n\t" \
- "orr r1, r1, #0xC0 \n\t" \
- "msr CPSR_c, r1 \n\t" \
- : "=r" (LockState) \
- : \
- : "r1" \
- );
-
- #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \
- "mrs r1, CPSR \n\t" \
- "bic r1, r1, #0xC0 \n\t" \
- "and r0, r0, #0xC0 \n\t" \
- "orr r1, r1, r0 \n\t" \
- "msr CPSR_c, r1 \n\t" \
- : \
- : "r" (LockState) \
- : "r0", "r1" \
- ); \
- }
-#else
- #define SEGGER_RTT_LOCK()
- #define SEGGER_RTT_UNLOCK()
- #endif
-#endif
-
-/*********************************************************************
-*
-* RTT lock configuration for IAR EWARM
-*/
-#ifdef __ICCARM__
- #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__))
- #define SEGGER_RTT_LOCK() { \
- unsigned int LockState; \
- LockState = __get_PRIMASK(); \
- __set_PRIMASK(1);
-
- #define SEGGER_RTT_UNLOCK() __set_PRIMASK(LockState); \
- }
- #elif ((defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || (defined (__ARM7M__) && (__CORE__ == __ARM7M__)))
- #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
- #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
- #endif
- #define SEGGER_RTT_LOCK() { \
- unsigned int LockState; \
- LockState = __get_BASEPRI(); \
- __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
-
- #define SEGGER_RTT_UNLOCK() __set_BASEPRI(LockState); \
- }
- #endif
-#endif
-
-/*********************************************************************
-*
-* RTT lock configuration for IAR RX
-*/
-#ifdef __ICCRX__
- #define SEGGER_RTT_LOCK() { \
- unsigned long LockState; \
- LockState = __get_interrupt_state(); \
- __disable_interrupt();
-
- #define SEGGER_RTT_UNLOCK() __set_interrupt_state(LockState); \
- }
-#endif
-
-/*********************************************************************
-*
-* RTT lock configuration for IAR RL78
-*/
-#ifdef __ICCRL78__
- #define SEGGER_RTT_LOCK() { \
- __istate_t LockState; \
- LockState = __get_interrupt_state(); \
- __disable_interrupt();
-
- #define SEGGER_RTT_UNLOCK() __set_interrupt_state(LockState); \
- }
-#endif
-
-/*********************************************************************
-*
-* RTT lock configuration for KEIL ARM
-*/
-#ifdef __CC_ARM
- #if (defined __TARGET_ARCH_6S_M)
- #define SEGGER_RTT_LOCK() { \
- unsigned int LockState; \
- register unsigned char PRIMASK __asm( "primask"); \
- LockState = PRIMASK; \
- PRIMASK = 1u; \
- __schedule_barrier();
-
- #define SEGGER_RTT_UNLOCK() PRIMASK = LockState; \
- __schedule_barrier(); \
- }
- #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M))
- #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
- #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
- #endif
- #define SEGGER_RTT_LOCK() { \
- unsigned int LockState; \
- register unsigned char BASEPRI __asm( "basepri"); \
- LockState = BASEPRI; \
- BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \
- __schedule_barrier();
-
- #define SEGGER_RTT_UNLOCK() BASEPRI = LockState; \
- __schedule_barrier(); \
- }
- #endif
-#endif
-
-/*********************************************************************
-*
-* RTT lock configuration for TI ARM
-*/
-#ifdef __TI_ARM__
- #if defined (__TI_ARM_V6M0__)
- #define SEGGER_RTT_LOCK() { \
- unsigned int LockState; \
- LockState = __get_PRIMASK(); \
- __set_PRIMASK(1);
-
- #define SEGGER_RTT_UNLOCK() __set_PRIMASK(LockState); \
- }
- #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__))
- #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
- #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
- #endif
- #define SEGGER_RTT_LOCK() { \
- unsigned int LockState; \
- LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
-
- #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(LockState); \
- }
- #endif
-#endif
-
-/*********************************************************************
-*
-* RTT lock configuration for CCRX
-*/
-#ifdef __RX
- #define SEGGER_RTT_LOCK() { \
- unsigned long LockState; \
- LockState = get_psw() & 0x010000; \
- clrpsw_i();
-
- #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | LockState); \
- }
-#endif
-
-/*********************************************************************
-*
-* RTT lock configuration fallback
-*/
-#ifndef SEGGER_RTT_LOCK
- #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts)
-#endif
-
-#ifndef SEGGER_RTT_UNLOCK
- #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state)
-#endif
-
-#endif
-/*************************** End of file ****************************/
+/*********************************************************************
+* SEGGER Microcontroller GmbH *
+* The Embedded Experts *
+**********************************************************************
+* *
+* (c) 1995 - 2018 SEGGER Microcontroller GmbH *
+* *
+* www.segger.com Support: support@segger.com *
+* *
+**********************************************************************
+* *
+* SEGGER RTT * Real Time Transfer for embedded targets *
+* *
+**********************************************************************
+* *
+* All rights reserved. *
+* *
+* SEGGER strongly recommends to not make any changes *
+* to or modify the source code of this software in order to stay *
+* compatible with the RTT protocol and J-Link. *
+* *
+* Redistribution and use in source and binary forms, with or *
+* without modification, are permitted provided that the following *
+* conditions are met: *
+* *
+* o Redistributions of source code must retain the above copyright *
+* notice, this list of conditions and the following disclaimer. *
+* *
+* o Redistributions in binary form must reproduce the above *
+* copyright notice, this list of conditions and the following *
+* disclaimer in the documentation and/or other materials provided *
+* with the distribution. *
+* *
+* o Neither the name of SEGGER Microcontroller GmbH *
+* nor the names of its contributors may be used to endorse or *
+* promote products derived from this software without specific *
+* prior written permission. *
+* *
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
+* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
+* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
+* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
+* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
+* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
+* DAMAGE. *
+* *
+**********************************************************************
+---------------------------END-OF-HEADER------------------------------
+File : SEGGER_RTT_Conf.h
+Purpose : Implementation of SEGGER real-time transfer (RTT) which
+ allows real-time communication on targets which support
+ debugger memory accesses while the CPU is running.
+Revision: $Rev: 12847 $
+
+*/
+
+#ifndef SEGGER_RTT_CONF_H
+#define SEGGER_RTT_CONF_H
+
+#ifdef __IAR_SYSTEMS_ICC__
+ #include <intrinsics.h>
+#endif
+
+/*********************************************************************
+*
+* Defines, configurable
+*
+**********************************************************************
+*/
+
+#define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3)
+#define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3)
+
+#define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k)
+#define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16)
+
+#define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64)
+
+#define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0)
+
+#define USE_RTT_ASM (0) // Use assembler version of SEGGER_RTT.c when 1
+
+/*********************************************************************
+*
+* RTT memcpy configuration
+*
+* memcpy() is good for large amounts of data,
+* but the overhead is big for small amounts, which are usually stored via RTT.
+* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead.
+*
+* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions.
+* This is may be required with memory access restrictions,
+* such as on Cortex-A devices with MMU.
+*/
+#define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop
+//
+// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets
+//
+//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__))
+// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes))
+//#endif
+
+//
+// Target is not allowed to perform other RTT operations while string still has not been stored completely.
+// Otherwise we would probably end up with a mixed string in the buffer.
+// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here.
+//
+// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4.
+// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches.
+// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly.
+// (Higher priority = lower priority number)
+// Default value for embOS: 128u
+// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC
+// or define SEGGER_RTT_LOCK() to completely disable interrupts.
+//
+
+#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20)
+
+/*********************************************************************
+*
+* RTT lock configuration for SEGGER Embedded Studio,
+* Rowley CrossStudio and GCC
+*/
+#if (defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__) || (defined __clang__)
+ #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__))
+ #define SEGGER_RTT_LOCK() { \
+ unsigned int LockState; \
+ __asm volatile ("mrs %0, primask \n\t" \
+ "movs r1, $1 \n\t" \
+ "msr primask, r1 \n\t" \
+ : "=r" (LockState) \
+ : \
+ : "r1" \
+ );
+
+ #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \
+ : \
+ : "r" (LockState) \
+ : \
+ ); \
+ }
+ #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__))
+ #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
+ #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
+ #endif
+ #define SEGGER_RTT_LOCK() { \
+ unsigned int LockState; \
+ __asm volatile ("mrs %0, basepri \n\t" \
+ "mov r1, %1 \n\t" \
+ "msr basepri, r1 \n\t" \
+ : "=r" (LockState) \
+ : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \
+ : "r1" \
+ );
+
+ #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \
+ : \
+ : "r" (LockState) \
+ : \
+ ); \
+ }
+
+ #elif defined(__ARM_ARCH_7A__)
+ #define SEGGER_RTT_LOCK() { \
+ unsigned int LockState; \
+ __asm volatile ("mrs r1, CPSR \n\t" \
+ "mov %0, r1 \n\t" \
+ "orr r1, r1, #0xC0 \n\t" \
+ "msr CPSR_c, r1 \n\t" \
+ : "=r" (LockState) \
+ : \
+ : "r1" \
+ );
+
+ #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \
+ "mrs r1, CPSR \n\t" \
+ "bic r1, r1, #0xC0 \n\t" \
+ "and r0, r0, #0xC0 \n\t" \
+ "orr r1, r1, r0 \n\t" \
+ "msr CPSR_c, r1 \n\t" \
+ : \
+ : "r" (LockState) \
+ : "r0", "r1" \
+ ); \
+ }
+#else
+ #define SEGGER_RTT_LOCK()
+ #define SEGGER_RTT_UNLOCK()
+ #endif
+#endif
+
+/*********************************************************************
+*
+* RTT lock configuration for IAR EWARM
+*/
+#ifdef __ICCARM__
+ #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__))
+ #define SEGGER_RTT_LOCK() { \
+ unsigned int LockState; \
+ LockState = __get_PRIMASK(); \
+ __set_PRIMASK(1);
+
+ #define SEGGER_RTT_UNLOCK() __set_PRIMASK(LockState); \
+ }
+ #elif ((defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || (defined (__ARM7M__) && (__CORE__ == __ARM7M__)))
+ #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
+ #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
+ #endif
+ #define SEGGER_RTT_LOCK() { \
+ unsigned int LockState; \
+ LockState = __get_BASEPRI(); \
+ __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
+
+ #define SEGGER_RTT_UNLOCK() __set_BASEPRI(LockState); \
+ }
+ #endif
+#endif
+
+/*********************************************************************
+*
+* RTT lock configuration for IAR RX
+*/
+#ifdef __ICCRX__
+ #define SEGGER_RTT_LOCK() { \
+ unsigned long LockState; \
+ LockState = __get_interrupt_state(); \
+ __disable_interrupt();
+
+ #define SEGGER_RTT_UNLOCK() __set_interrupt_state(LockState); \
+ }
+#endif
+
+/*********************************************************************
+*
+* RTT lock configuration for IAR RL78
+*/
+#ifdef __ICCRL78__
+ #define SEGGER_RTT_LOCK() { \
+ __istate_t LockState; \
+ LockState = __get_interrupt_state(); \
+ __disable_interrupt();
+
+ #define SEGGER_RTT_UNLOCK() __set_interrupt_state(LockState); \
+ }
+#endif
+
+/*********************************************************************
+*
+* RTT lock configuration for KEIL ARM
+*/
+#ifdef __CC_ARM
+ #if (defined __TARGET_ARCH_6S_M)
+ #define SEGGER_RTT_LOCK() { \
+ unsigned int LockState; \
+ register unsigned char PRIMASK __asm( "primask"); \
+ LockState = PRIMASK; \
+ PRIMASK = 1u; \
+ __schedule_barrier();
+
+ #define SEGGER_RTT_UNLOCK() PRIMASK = LockState; \
+ __schedule_barrier(); \
+ }
+ #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M))
+ #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
+ #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
+ #endif
+ #define SEGGER_RTT_LOCK() { \
+ unsigned int LockState; \
+ register unsigned char BASEPRI __asm( "basepri"); \
+ LockState = BASEPRI; \
+ BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \
+ __schedule_barrier();
+
+ #define SEGGER_RTT_UNLOCK() BASEPRI = LockState; \
+ __schedule_barrier(); \
+ }
+ #endif
+#endif
+
+/*********************************************************************
+*
+* RTT lock configuration for TI ARM
+*/
+#ifdef __TI_ARM__
+ #if defined (__TI_ARM_V6M0__)
+ #define SEGGER_RTT_LOCK() { \
+ unsigned int LockState; \
+ LockState = __get_PRIMASK(); \
+ __set_PRIMASK(1);
+
+ #define SEGGER_RTT_UNLOCK() __set_PRIMASK(LockState); \
+ }
+ #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__))
+ #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
+ #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
+ #endif
+ #define SEGGER_RTT_LOCK() { \
+ unsigned int LockState; \
+ LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
+
+ #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(LockState); \
+ }
+ #endif
+#endif
+
+/*********************************************************************
+*
+* RTT lock configuration for CCRX
+*/
+#ifdef __RX
+ #define SEGGER_RTT_LOCK() { \
+ unsigned long LockState; \
+ LockState = get_psw() & 0x010000; \
+ clrpsw_i();
+
+ #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | LockState); \
+ }
+#endif
+
+/*********************************************************************
+*
+* RTT lock configuration fallback
+*/
+#ifndef SEGGER_RTT_LOCK
+ #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts)
+#endif
+
+#ifndef SEGGER_RTT_UNLOCK
+ #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state)
+#endif
+
+#endif
+/*************************** End of file ****************************/
diff --git a/third_party/jlink/SEGGER_RTT_V640/RTT/SEGGER_RTT_printf.c b/third_party/jlink/SEGGER_RTT_V640/RTT/SEGGER_RTT_printf.c
index bb90b4c..75082f0 100644
--- a/third_party/jlink/SEGGER_RTT_V640/RTT/SEGGER_RTT_printf.c
+++ b/third_party/jlink/SEGGER_RTT_V640/RTT/SEGGER_RTT_printf.c
@@ -1,510 +1,510 @@
-/*********************************************************************
-* SEGGER Microcontroller GmbH *
-* Solutions for real time microcontroller applications *
-**********************************************************************
-* *
-* (c) 1995 - 2018 SEGGER Microcontroller GmbH *
-* *
-* www.segger.com Support: support@segger.com *
-* *
-**********************************************************************
-* *
-* SEGGER RTT * Real Time Transfer for embedded targets *
-* *
-**********************************************************************
-* *
-* All rights reserved. *
-* *
-* SEGGER strongly recommends to not make any changes *
-* to or modify the source code of this software in order to stay *
-* compatible with the RTT protocol and J-Link. *
-* *
-* Redistribution and use in source and binary forms, with or *
-* without modification, are permitted provided that the following *
-* conditions are met: *
-* *
-* o Redistributions of source code must retain the above copyright *
-* notice, this list of conditions and the following disclaimer. *
-* *
-* o Redistributions in binary form must reproduce the above *
-* copyright notice, this list of conditions and the following *
-* disclaimer in the documentation and/or other materials provided *
-* with the distribution. *
-* *
-* o Neither the name of SEGGER Microcontroller GmbH *
-* nor the names of its contributors may be used to endorse or *
-* promote products derived from this software without specific *
-* prior written permission. *
-* *
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
-* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
-* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
-* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
-* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
-* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
-* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
-* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
-* DAMAGE. *
-* *
-**********************************************************************
----------------------------END-OF-HEADER------------------------------
-File : SEGGER_RTT_printf.c
-Purpose : Replacement for printf to write formatted data via RTT
-Revision: $Rev: 12360 $
-----------------------------------------------------------------------
-*/
-#include "SEGGER_RTT.h"
-#include "SEGGER_RTT_Conf.h"
-
-/*********************************************************************
-*
-* Defines, configurable
-*
-**********************************************************************
-*/
-
-#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE
- #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64)
-#endif
-
-#include <stdlib.h>
-#include <stdarg.h>
-
-
-#define FORMAT_FLAG_LEFT_JUSTIFY (1u << 0)
-#define FORMAT_FLAG_PAD_ZERO (1u << 1)
-#define FORMAT_FLAG_PRINT_SIGN (1u << 2)
-#define FORMAT_FLAG_ALTERNATE (1u << 3)
-
-/*********************************************************************
-*
-* Types
-*
-**********************************************************************
-*/
-
-typedef struct {
- char* pBuffer;
- unsigned BufferSize;
- unsigned Cnt;
-
- int ReturnValue;
-
- unsigned RTTBufferIndex;
-} SEGGER_RTT_PRINTF_DESC;
-
-/*********************************************************************
-*
-* Function prototypes
-*
-**********************************************************************
-*/
-
-/*********************************************************************
-*
-* Static code
-*
-**********************************************************************
-*/
-/*********************************************************************
-*
-* _StoreChar
-*/
-static void _StoreChar(SEGGER_RTT_PRINTF_DESC * p, char c) {
- unsigned Cnt;
-
- Cnt = p->Cnt;
- if ((Cnt + 1u) <= p->BufferSize) {
- *(p->pBuffer + Cnt) = c;
- p->Cnt = Cnt + 1u;
- p->ReturnValue++;
- }
- //
- // Write part of string, when the buffer is full
- //
- if (p->Cnt == p->BufferSize) {
- if (SEGGER_RTT_Write(p->RTTBufferIndex, p->pBuffer, p->Cnt) != p->Cnt) {
- p->ReturnValue = -1;
- } else {
- p->Cnt = 0u;
- }
- }
-}
-
-/*********************************************************************
-*
-* _PrintUnsigned
-*/
-static void _PrintUnsigned(SEGGER_RTT_PRINTF_DESC * pBufferDesc, unsigned v, unsigned Base, unsigned NumDigits, unsigned FieldWidth, unsigned FormatFlags) {
- static const char _aV2C[16] = {'0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C', 'D', 'E', 'F' };
- unsigned Div;
- unsigned Digit;
- unsigned Number;
- unsigned Width;
- char c;
-
- Number = v;
- Digit = 1u;
- //
- // Get actual field width
- //
- Width = 1u;
- while (Number >= Base) {
- Number = (Number / Base);
- Width++;
- }
- if (NumDigits > Width) {
- Width = NumDigits;
- }
- //
- // Print leading chars if necessary
- //
- if ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == 0u) {
- if (FieldWidth != 0u) {
- if (((FormatFlags & FORMAT_FLAG_PAD_ZERO) == FORMAT_FLAG_PAD_ZERO) && (NumDigits == 0u)) {
- c = '0';
- } else {
- c = ' ';
- }
- while ((FieldWidth != 0u) && (Width < FieldWidth)) {
- FieldWidth--;
- _StoreChar(pBufferDesc, c);
- if (pBufferDesc->ReturnValue < 0) {
- break;
- }
- }
- }
- }
- if (pBufferDesc->ReturnValue >= 0) {
- //
- // Compute Digit.
- // Loop until Digit has the value of the highest digit required.
- // Example: If the output is 345 (Base 10), loop 2 times until Digit is 100.
- //
- while (1) {
- if (NumDigits > 1u) { // User specified a min number of digits to print? => Make sure we loop at least that often, before checking anything else (> 1 check avoids problems with NumDigits being signed / unsigned)
- NumDigits--;
- } else {
- Div = v / Digit;
- if (Div < Base) { // Is our divider big enough to extract the highest digit from value? => Done
- break;
- }
- }
- Digit *= Base;
- }
- //
- // Output digits
- //
- do {
- Div = v / Digit;
- v -= Div * Digit;
- _StoreChar(pBufferDesc, _aV2C[Div]);
- if (pBufferDesc->ReturnValue < 0) {
- break;
- }
- Digit /= Base;
- } while (Digit);
- //
- // Print trailing spaces if necessary
- //
- if ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == FORMAT_FLAG_LEFT_JUSTIFY) {
- if (FieldWidth != 0u) {
- while ((FieldWidth != 0u) && (Width < FieldWidth)) {
- FieldWidth--;
- _StoreChar(pBufferDesc, ' ');
- if (pBufferDesc->ReturnValue < 0) {
- break;
- }
- }
- }
- }
- }
-}
-
-/*********************************************************************
-*
-* _PrintInt
-*/
-static void _PrintInt(SEGGER_RTT_PRINTF_DESC * pBufferDesc, int v, unsigned Base, unsigned NumDigits, unsigned FieldWidth, unsigned FormatFlags) {
- unsigned Width;
- int Number;
-
- Number = (v < 0) ? -v : v;
-
- //
- // Get actual field width
- //
- Width = 1u;
- while (Number >= (int)Base) {
- Number = (Number / (int)Base);
- Width++;
- }
- if (NumDigits > Width) {
- Width = NumDigits;
- }
- if ((FieldWidth > 0u) && ((v < 0) || ((FormatFlags & FORMAT_FLAG_PRINT_SIGN) == FORMAT_FLAG_PRINT_SIGN))) {
- FieldWidth--;
- }
-
- //
- // Print leading spaces if necessary
- //
- if ((((FormatFlags & FORMAT_FLAG_PAD_ZERO) == 0u) || (NumDigits != 0u)) && ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == 0u)) {
- if (FieldWidth != 0u) {
- while ((FieldWidth != 0u) && (Width < FieldWidth)) {
- FieldWidth--;
- _StoreChar(pBufferDesc, ' ');
- if (pBufferDesc->ReturnValue < 0) {
- break;
- }
- }
- }
- }
- //
- // Print sign if necessary
- //
- if (pBufferDesc->ReturnValue >= 0) {
- if (v < 0) {
- v = -v;
- _StoreChar(pBufferDesc, '-');
- } else if ((FormatFlags & FORMAT_FLAG_PRINT_SIGN) == FORMAT_FLAG_PRINT_SIGN) {
- _StoreChar(pBufferDesc, '+');
- } else {
-
- }
- if (pBufferDesc->ReturnValue >= 0) {
- //
- // Print leading zeros if necessary
- //
- if (((FormatFlags & FORMAT_FLAG_PAD_ZERO) == FORMAT_FLAG_PAD_ZERO) && ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == 0u) && (NumDigits == 0u)) {
- if (FieldWidth != 0u) {
- while ((FieldWidth != 0u) && (Width < FieldWidth)) {
- FieldWidth--;
- _StoreChar(pBufferDesc, '0');
- if (pBufferDesc->ReturnValue < 0) {
- break;
- }
- }
- }
- }
- if (pBufferDesc->ReturnValue >= 0) {
- //
- // Print number without sign
- //
- _PrintUnsigned(pBufferDesc, (unsigned)v, Base, NumDigits, FieldWidth, FormatFlags);
- }
- }
- }
-}
-
-/*********************************************************************
-*
-* Public code
-*
-**********************************************************************
-*/
-/*********************************************************************
-*
-* SEGGER_RTT_vprintf
-*
-* Function description
-* Stores a formatted string in SEGGER RTT control block.
-* This data is read by the host.
-*
-* Parameters
-* BufferIndex Index of "Up"-buffer to be used. (e.g. 0 for "Terminal")
-* sFormat Pointer to format string
-* pParamList Pointer to the list of arguments for the format string
-*
-* Return values
-* >= 0: Number of bytes which have been stored in the "Up"-buffer.
-* < 0: Error
-*/
-int SEGGER_RTT_vprintf(unsigned BufferIndex, const char * sFormat, va_list * pParamList) {
- char c;
- SEGGER_RTT_PRINTF_DESC BufferDesc;
- int v;
- unsigned NumDigits;
- unsigned FormatFlags;
- unsigned FieldWidth;
- char acBuffer[SEGGER_RTT_PRINTF_BUFFER_SIZE];
-
- BufferDesc.pBuffer = acBuffer;
- BufferDesc.BufferSize = SEGGER_RTT_PRINTF_BUFFER_SIZE;
- BufferDesc.Cnt = 0u;
- BufferDesc.RTTBufferIndex = BufferIndex;
- BufferDesc.ReturnValue = 0;
-
- do {
- c = *sFormat;
- sFormat++;
- if (c == 0u) {
- break;
- }
- if (c == '%') {
- //
- // Filter out flags
- //
- FormatFlags = 0u;
- v = 1;
- do {
- c = *sFormat;
- switch (c) {
- case '-': FormatFlags |= FORMAT_FLAG_LEFT_JUSTIFY; sFormat++; break;
- case '0': FormatFlags |= FORMAT_FLAG_PAD_ZERO; sFormat++; break;
- case '+': FormatFlags |= FORMAT_FLAG_PRINT_SIGN; sFormat++; break;
- case '#': FormatFlags |= FORMAT_FLAG_ALTERNATE; sFormat++; break;
- default: v = 0; break;
- }
- } while (v);
- //
- // filter out field with
- //
- FieldWidth = 0u;
- do {
- c = *sFormat;
- if ((c < '0') || (c > '9')) {
- break;
- }
- sFormat++;
- FieldWidth = (FieldWidth * 10u) + ((unsigned)c - '0');
- } while (1);
-
- //
- // Filter out precision (number of digits to display)
- //
- NumDigits = 0u;
- c = *sFormat;
- if (c == '.') {
- sFormat++;
- do {
- c = *sFormat;
- if ((c < '0') || (c > '9')) {
- break;
- }
- sFormat++;
- NumDigits = NumDigits * 10u + ((unsigned)c - '0');
- } while (1);
- }
- //
- // Filter out length modifier
- //
- c = *sFormat;
- do {
- if ((c == 'l') || (c == 'h')) {
- sFormat++;
- c = *sFormat;
- } else {
- break;
- }
- } while (1);
- //
- // Handle specifiers
- //
- switch (c) {
- case 'c': {
- char c0;
- v = va_arg(*pParamList, int);
- c0 = (char)v;
- _StoreChar(&BufferDesc, c0);
- break;
- }
- case 'd':
- v = va_arg(*pParamList, int);
- _PrintInt(&BufferDesc, v, 10u, NumDigits, FieldWidth, FormatFlags);
- break;
- case 'u':
- v = va_arg(*pParamList, int);
- _PrintUnsigned(&BufferDesc, (unsigned)v, 10u, NumDigits, FieldWidth, FormatFlags);
- break;
- case 'x':
- case 'X':
- v = va_arg(*pParamList, int);
- _PrintUnsigned(&BufferDesc, (unsigned)v, 16u, NumDigits, FieldWidth, FormatFlags);
- break;
- case 's':
- {
- const char * s = va_arg(*pParamList, const char *);
- do {
- c = *s;
- s++;
- if (c == '\0') {
- break;
- }
- _StoreChar(&BufferDesc, c);
- } while (BufferDesc.ReturnValue >= 0);
- }
- break;
- case 'p':
- v = va_arg(*pParamList, int);
- _PrintUnsigned(&BufferDesc, (unsigned)v, 16u, 8u, 8u, 0u);
- break;
- case '%':
- _StoreChar(&BufferDesc, '%');
- break;
- default:
- break;
- }
- sFormat++;
- } else {
- _StoreChar(&BufferDesc, c);
- }
- } while (BufferDesc.ReturnValue >= 0);
-
- if (BufferDesc.ReturnValue > 0) {
- //
- // Write remaining data, if any
- //
- if (BufferDesc.Cnt != 0u) {
- SEGGER_RTT_Write(BufferIndex, acBuffer, BufferDesc.Cnt);
- }
- BufferDesc.ReturnValue += (int)BufferDesc.Cnt;
- }
- return BufferDesc.ReturnValue;
-}
-
-/*********************************************************************
-*
-* SEGGER_RTT_printf
-*
-* Function description
-* Stores a formatted string in SEGGER RTT control block.
-* This data is read by the host.
-*
-* Parameters
-* BufferIndex Index of "Up"-buffer to be used. (e.g. 0 for "Terminal")
-* sFormat Pointer to format string, followed by the arguments for conversion
-*
-* Return values
-* >= 0: Number of bytes which have been stored in the "Up"-buffer.
-* < 0: Error
-*
-* Notes
-* (1) Conversion specifications have following syntax:
-* %[flags][FieldWidth][.Precision]ConversionSpecifier
-* (2) Supported flags:
-* -: Left justify within the field width
-* +: Always print sign extension for signed conversions
-* 0: Pad with 0 instead of spaces. Ignored when using '-'-flag or precision
-* Supported conversion specifiers:
-* c: Print the argument as one char
-* d: Print the argument as a signed integer
-* u: Print the argument as an unsigned integer
-* x: Print the argument as an hexadecimal integer
-* s: Print the string pointed to by the argument
-* p: Print the argument as an 8-digit hexadecimal integer. (Argument shall be a pointer to void.)
-*/
-int SEGGER_RTT_printf(unsigned BufferIndex, const char * sFormat, ...) {
- int r;
- va_list ParamList;
-
- va_start(ParamList, sFormat);
- r = SEGGER_RTT_vprintf(BufferIndex, sFormat, &ParamList);
- va_end(ParamList);
- return r;
-}
-/*************************** End of file ****************************/
+/*********************************************************************
+* SEGGER Microcontroller GmbH *
+* Solutions for real time microcontroller applications *
+**********************************************************************
+* *
+* (c) 1995 - 2018 SEGGER Microcontroller GmbH *
+* *
+* www.segger.com Support: support@segger.com *
+* *
+**********************************************************************
+* *
+* SEGGER RTT * Real Time Transfer for embedded targets *
+* *
+**********************************************************************
+* *
+* All rights reserved. *
+* *
+* SEGGER strongly recommends to not make any changes *
+* to or modify the source code of this software in order to stay *
+* compatible with the RTT protocol and J-Link. *
+* *
+* Redistribution and use in source and binary forms, with or *
+* without modification, are permitted provided that the following *
+* conditions are met: *
+* *
+* o Redistributions of source code must retain the above copyright *
+* notice, this list of conditions and the following disclaimer. *
+* *
+* o Redistributions in binary form must reproduce the above *
+* copyright notice, this list of conditions and the following *
+* disclaimer in the documentation and/or other materials provided *
+* with the distribution. *
+* *
+* o Neither the name of SEGGER Microcontroller GmbH *
+* nor the names of its contributors may be used to endorse or *
+* promote products derived from this software without specific *
+* prior written permission. *
+* *
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
+* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
+* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
+* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
+* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
+* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
+* DAMAGE. *
+* *
+**********************************************************************
+---------------------------END-OF-HEADER------------------------------
+File : SEGGER_RTT_printf.c
+Purpose : Replacement for printf to write formatted data via RTT
+Revision: $Rev: 12360 $
+----------------------------------------------------------------------
+*/
+#include "SEGGER_RTT.h"
+#include "SEGGER_RTT_Conf.h"
+
+/*********************************************************************
+*
+* Defines, configurable
+*
+**********************************************************************
+*/
+
+#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE
+ #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64)
+#endif
+
+#include <stdlib.h>
+#include <stdarg.h>
+
+
+#define FORMAT_FLAG_LEFT_JUSTIFY (1u << 0)
+#define FORMAT_FLAG_PAD_ZERO (1u << 1)
+#define FORMAT_FLAG_PRINT_SIGN (1u << 2)
+#define FORMAT_FLAG_ALTERNATE (1u << 3)
+
+/*********************************************************************
+*
+* Types
+*
+**********************************************************************
+*/
+
+typedef struct {
+ char* pBuffer;
+ unsigned BufferSize;
+ unsigned Cnt;
+
+ int ReturnValue;
+
+ unsigned RTTBufferIndex;
+} SEGGER_RTT_PRINTF_DESC;
+
+/*********************************************************************
+*
+* Function prototypes
+*
+**********************************************************************
+*/
+
+/*********************************************************************
+*
+* Static code
+*
+**********************************************************************
+*/
+/*********************************************************************
+*
+* _StoreChar
+*/
+static void _StoreChar(SEGGER_RTT_PRINTF_DESC * p, char c) {
+ unsigned Cnt;
+
+ Cnt = p->Cnt;
+ if ((Cnt + 1u) <= p->BufferSize) {
+ *(p->pBuffer + Cnt) = c;
+ p->Cnt = Cnt + 1u;
+ p->ReturnValue++;
+ }
+ //
+ // Write part of string, when the buffer is full
+ //
+ if (p->Cnt == p->BufferSize) {
+ if (SEGGER_RTT_Write(p->RTTBufferIndex, p->pBuffer, p->Cnt) != p->Cnt) {
+ p->ReturnValue = -1;
+ } else {
+ p->Cnt = 0u;
+ }
+ }
+}
+
+/*********************************************************************
+*
+* _PrintUnsigned
+*/
+static void _PrintUnsigned(SEGGER_RTT_PRINTF_DESC * pBufferDesc, unsigned v, unsigned Base, unsigned NumDigits, unsigned FieldWidth, unsigned FormatFlags) {
+ static const char _aV2C[16] = {'0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C', 'D', 'E', 'F' };
+ unsigned Div;
+ unsigned Digit;
+ unsigned Number;
+ unsigned Width;
+ char c;
+
+ Number = v;
+ Digit = 1u;
+ //
+ // Get actual field width
+ //
+ Width = 1u;
+ while (Number >= Base) {
+ Number = (Number / Base);
+ Width++;
+ }
+ if (NumDigits > Width) {
+ Width = NumDigits;
+ }
+ //
+ // Print leading chars if necessary
+ //
+ if ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == 0u) {
+ if (FieldWidth != 0u) {
+ if (((FormatFlags & FORMAT_FLAG_PAD_ZERO) == FORMAT_FLAG_PAD_ZERO) && (NumDigits == 0u)) {
+ c = '0';
+ } else {
+ c = ' ';
+ }
+ while ((FieldWidth != 0u) && (Width < FieldWidth)) {
+ FieldWidth--;
+ _StoreChar(pBufferDesc, c);
+ if (pBufferDesc->ReturnValue < 0) {
+ break;
+ }
+ }
+ }
+ }
+ if (pBufferDesc->ReturnValue >= 0) {
+ //
+ // Compute Digit.
+ // Loop until Digit has the value of the highest digit required.
+ // Example: If the output is 345 (Base 10), loop 2 times until Digit is 100.
+ //
+ while (1) {
+ if (NumDigits > 1u) { // User specified a min number of digits to print? => Make sure we loop at least that often, before checking anything else (> 1 check avoids problems with NumDigits being signed / unsigned)
+ NumDigits--;
+ } else {
+ Div = v / Digit;
+ if (Div < Base) { // Is our divider big enough to extract the highest digit from value? => Done
+ break;
+ }
+ }
+ Digit *= Base;
+ }
+ //
+ // Output digits
+ //
+ do {
+ Div = v / Digit;
+ v -= Div * Digit;
+ _StoreChar(pBufferDesc, _aV2C[Div]);
+ if (pBufferDesc->ReturnValue < 0) {
+ break;
+ }
+ Digit /= Base;
+ } while (Digit);
+ //
+ // Print trailing spaces if necessary
+ //
+ if ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == FORMAT_FLAG_LEFT_JUSTIFY) {
+ if (FieldWidth != 0u) {
+ while ((FieldWidth != 0u) && (Width < FieldWidth)) {
+ FieldWidth--;
+ _StoreChar(pBufferDesc, ' ');
+ if (pBufferDesc->ReturnValue < 0) {
+ break;
+ }
+ }
+ }
+ }
+ }
+}
+
+/*********************************************************************
+*
+* _PrintInt
+*/
+static void _PrintInt(SEGGER_RTT_PRINTF_DESC * pBufferDesc, int v, unsigned Base, unsigned NumDigits, unsigned FieldWidth, unsigned FormatFlags) {
+ unsigned Width;
+ int Number;
+
+ Number = (v < 0) ? -v : v;
+
+ //
+ // Get actual field width
+ //
+ Width = 1u;
+ while (Number >= (int)Base) {
+ Number = (Number / (int)Base);
+ Width++;
+ }
+ if (NumDigits > Width) {
+ Width = NumDigits;
+ }
+ if ((FieldWidth > 0u) && ((v < 0) || ((FormatFlags & FORMAT_FLAG_PRINT_SIGN) == FORMAT_FLAG_PRINT_SIGN))) {
+ FieldWidth--;
+ }
+
+ //
+ // Print leading spaces if necessary
+ //
+ if ((((FormatFlags & FORMAT_FLAG_PAD_ZERO) == 0u) || (NumDigits != 0u)) && ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == 0u)) {
+ if (FieldWidth != 0u) {
+ while ((FieldWidth != 0u) && (Width < FieldWidth)) {
+ FieldWidth--;
+ _StoreChar(pBufferDesc, ' ');
+ if (pBufferDesc->ReturnValue < 0) {
+ break;
+ }
+ }
+ }
+ }
+ //
+ // Print sign if necessary
+ //
+ if (pBufferDesc->ReturnValue >= 0) {
+ if (v < 0) {
+ v = -v;
+ _StoreChar(pBufferDesc, '-');
+ } else if ((FormatFlags & FORMAT_FLAG_PRINT_SIGN) == FORMAT_FLAG_PRINT_SIGN) {
+ _StoreChar(pBufferDesc, '+');
+ } else {
+
+ }
+ if (pBufferDesc->ReturnValue >= 0) {
+ //
+ // Print leading zeros if necessary
+ //
+ if (((FormatFlags & FORMAT_FLAG_PAD_ZERO) == FORMAT_FLAG_PAD_ZERO) && ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == 0u) && (NumDigits == 0u)) {
+ if (FieldWidth != 0u) {
+ while ((FieldWidth != 0u) && (Width < FieldWidth)) {
+ FieldWidth--;
+ _StoreChar(pBufferDesc, '0');
+ if (pBufferDesc->ReturnValue < 0) {
+ break;
+ }
+ }
+ }
+ }
+ if (pBufferDesc->ReturnValue >= 0) {
+ //
+ // Print number without sign
+ //
+ _PrintUnsigned(pBufferDesc, (unsigned)v, Base, NumDigits, FieldWidth, FormatFlags);
+ }
+ }
+ }
+}
+
+/*********************************************************************
+*
+* Public code
+*
+**********************************************************************
+*/
+/*********************************************************************
+*
+* SEGGER_RTT_vprintf
+*
+* Function description
+* Stores a formatted string in SEGGER RTT control block.
+* This data is read by the host.
+*
+* Parameters
+* BufferIndex Index of "Up"-buffer to be used. (e.g. 0 for "Terminal")
+* sFormat Pointer to format string
+* pParamList Pointer to the list of arguments for the format string
+*
+* Return values
+* >= 0: Number of bytes which have been stored in the "Up"-buffer.
+* < 0: Error
+*/
+int SEGGER_RTT_vprintf(unsigned BufferIndex, const char * sFormat, va_list * pParamList) {
+ char c;
+ SEGGER_RTT_PRINTF_DESC BufferDesc;
+ int v;
+ unsigned NumDigits;
+ unsigned FormatFlags;
+ unsigned FieldWidth;
+ char acBuffer[SEGGER_RTT_PRINTF_BUFFER_SIZE];
+
+ BufferDesc.pBuffer = acBuffer;
+ BufferDesc.BufferSize = SEGGER_RTT_PRINTF_BUFFER_SIZE;
+ BufferDesc.Cnt = 0u;
+ BufferDesc.RTTBufferIndex = BufferIndex;
+ BufferDesc.ReturnValue = 0;
+
+ do {
+ c = *sFormat;
+ sFormat++;
+ if (c == 0u) {
+ break;
+ }
+ if (c == '%') {
+ //
+ // Filter out flags
+ //
+ FormatFlags = 0u;
+ v = 1;
+ do {
+ c = *sFormat;
+ switch (c) {
+ case '-': FormatFlags |= FORMAT_FLAG_LEFT_JUSTIFY; sFormat++; break;
+ case '0': FormatFlags |= FORMAT_FLAG_PAD_ZERO; sFormat++; break;
+ case '+': FormatFlags |= FORMAT_FLAG_PRINT_SIGN; sFormat++; break;
+ case '#': FormatFlags |= FORMAT_FLAG_ALTERNATE; sFormat++; break;
+ default: v = 0; break;
+ }
+ } while (v);
+ //
+ // filter out field with
+ //
+ FieldWidth = 0u;
+ do {
+ c = *sFormat;
+ if ((c < '0') || (c > '9')) {
+ break;
+ }
+ sFormat++;
+ FieldWidth = (FieldWidth * 10u) + ((unsigned)c - '0');
+ } while (1);
+
+ //
+ // Filter out precision (number of digits to display)
+ //
+ NumDigits = 0u;
+ c = *sFormat;
+ if (c == '.') {
+ sFormat++;
+ do {
+ c = *sFormat;
+ if ((c < '0') || (c > '9')) {
+ break;
+ }
+ sFormat++;
+ NumDigits = NumDigits * 10u + ((unsigned)c - '0');
+ } while (1);
+ }
+ //
+ // Filter out length modifier
+ //
+ c = *sFormat;
+ do {
+ if ((c == 'l') || (c == 'h')) {
+ sFormat++;
+ c = *sFormat;
+ } else {
+ break;
+ }
+ } while (1);
+ //
+ // Handle specifiers
+ //
+ switch (c) {
+ case 'c': {
+ char c0;
+ v = va_arg(*pParamList, int);
+ c0 = (char)v;
+ _StoreChar(&BufferDesc, c0);
+ break;
+ }
+ case 'd':
+ v = va_arg(*pParamList, int);
+ _PrintInt(&BufferDesc, v, 10u, NumDigits, FieldWidth, FormatFlags);
+ break;
+ case 'u':
+ v = va_arg(*pParamList, int);
+ _PrintUnsigned(&BufferDesc, (unsigned)v, 10u, NumDigits, FieldWidth, FormatFlags);
+ break;
+ case 'x':
+ case 'X':
+ v = va_arg(*pParamList, int);
+ _PrintUnsigned(&BufferDesc, (unsigned)v, 16u, NumDigits, FieldWidth, FormatFlags);
+ break;
+ case 's':
+ {
+ const char * s = va_arg(*pParamList, const char *);
+ do {
+ c = *s;
+ s++;
+ if (c == '\0') {
+ break;
+ }
+ _StoreChar(&BufferDesc, c);
+ } while (BufferDesc.ReturnValue >= 0);
+ }
+ break;
+ case 'p':
+ v = va_arg(*pParamList, int);
+ _PrintUnsigned(&BufferDesc, (unsigned)v, 16u, 8u, 8u, 0u);
+ break;
+ case '%':
+ _StoreChar(&BufferDesc, '%');
+ break;
+ default:
+ break;
+ }
+ sFormat++;
+ } else {
+ _StoreChar(&BufferDesc, c);
+ }
+ } while (BufferDesc.ReturnValue >= 0);
+
+ if (BufferDesc.ReturnValue > 0) {
+ //
+ // Write remaining data, if any
+ //
+ if (BufferDesc.Cnt != 0u) {
+ SEGGER_RTT_Write(BufferIndex, acBuffer, BufferDesc.Cnt);
+ }
+ BufferDesc.ReturnValue += (int)BufferDesc.Cnt;
+ }
+ return BufferDesc.ReturnValue;
+}
+
+/*********************************************************************
+*
+* SEGGER_RTT_printf
+*
+* Function description
+* Stores a formatted string in SEGGER RTT control block.
+* This data is read by the host.
+*
+* Parameters
+* BufferIndex Index of "Up"-buffer to be used. (e.g. 0 for "Terminal")
+* sFormat Pointer to format string, followed by the arguments for conversion
+*
+* Return values
+* >= 0: Number of bytes which have been stored in the "Up"-buffer.
+* < 0: Error
+*
+* Notes
+* (1) Conversion specifications have following syntax:
+* %[flags][FieldWidth][.Precision]ConversionSpecifier
+* (2) Supported flags:
+* -: Left justify within the field width
+* +: Always print sign extension for signed conversions
+* 0: Pad with 0 instead of spaces. Ignored when using '-'-flag or precision
+* Supported conversion specifiers:
+* c: Print the argument as one char
+* d: Print the argument as a signed integer
+* u: Print the argument as an unsigned integer
+* x: Print the argument as an hexadecimal integer
+* s: Print the string pointed to by the argument
+* p: Print the argument as an 8-digit hexadecimal integer. (Argument shall be a pointer to void.)
+*/
+int SEGGER_RTT_printf(unsigned BufferIndex, const char * sFormat, ...) {
+ int r;
+ va_list ParamList;
+
+ va_start(ParamList, sFormat);
+ r = SEGGER_RTT_vprintf(BufferIndex, sFormat, &ParamList);
+ va_end(ParamList);
+ return r;
+}
+/*************************** End of file ****************************/
diff --git a/third_party/jlink/SEGGER_RTT_V640/Syscalls/SEGGER_RTT_Syscalls_GCC.c b/third_party/jlink/SEGGER_RTT_V640/Syscalls/SEGGER_RTT_Syscalls_GCC.c
index 51de2b1..b0b6ca3 100644
--- a/third_party/jlink/SEGGER_RTT_V640/Syscalls/SEGGER_RTT_Syscalls_GCC.c
+++ b/third_party/jlink/SEGGER_RTT_V640/Syscalls/SEGGER_RTT_Syscalls_GCC.c
@@ -1,130 +1,130 @@
-/*********************************************************************
-* SEGGER Microcontroller GmbH *
-* Solutions for real time microcontroller applications *
-**********************************************************************
-* *
-* (c) 1995 - 2018 SEGGER Microcontroller GmbH *
-* *
-* www.segger.com Support: support@segger.com *
-* *
-**********************************************************************
-* *
-* SEGGER RTT * Real Time Transfer for embedded targets *
-* *
-**********************************************************************
-* *
-* All rights reserved. *
-* *
-* SEGGER strongly recommends to not make any changes *
-* to or modify the source code of this software in order to stay *
-* compatible with the RTT protocol and J-Link. *
-* *
-* Redistribution and use in source and binary forms, with or *
-* without modification, are permitted provided that the following *
-* conditions are met: *
-* *
-* o Redistributions of source code must retain the above copyright *
-* notice, this list of conditions and the following disclaimer. *
-* *
-* o Redistributions in binary form must reproduce the above *
-* copyright notice, this list of conditions and the following *
-* disclaimer in the documentation and/or other materials provided *
-* with the distribution. *
-* *
-* o Neither the name of SEGGER Microcontroller GmbH *
-* nor the names of its contributors may be used to endorse or *
-* promote products derived from this software without specific *
-* prior written permission. *
-* *
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
-* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
-* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
-* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
-* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
-* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
-* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
-* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
-* DAMAGE. *
-* *
-**********************************************************************
----------------------------END-OF-HEADER------------------------------
-File : SEGGER_RTT_Syscalls_GCC.c
-Purpose : Low-level functions for using printf() via RTT in GCC.
- To use RTT for printf output, include this file in your
- application.
-Revision: $Rev: 9599 $
-----------------------------------------------------------------------
-*/
-#if (defined __GNUC__) && !(defined __SES_ARM) && !(defined __CROSSWORKS_ARM)
-
-#include <reent.h> // required for _write_r
-#include "SEGGER_RTT.h"
-
-
-/*********************************************************************
-*
-* Types
-*
-**********************************************************************
-*/
-//
-// If necessary define the _reent struct
-// to match the one passed by the used standard library.
-//
-struct _reent;
-
-/*********************************************************************
-*
-* Function prototypes
-*
-**********************************************************************
-*/
-int _write(int file, char *ptr, int len);
-int _write_r(struct _reent *r, int file, const void *ptr, int len);
-
-/*********************************************************************
-*
-* Global functions
-*
-**********************************************************************
-*/
-
-/*********************************************************************
-*
-* _write()
-*
-* Function description
-* Low-level write function.
-* libc subroutines will use this system routine for output to all files,
-* including stdout.
-* Write data via RTT.
-*/
-int _write(int file, char *ptr, int len) {
- (void) file; /* Not used, avoid warning */
- SEGGER_RTT_Write(0, ptr, len);
- return len;
-}
-
-/*********************************************************************
-*
-* _write_r()
-*
-* Function description
-* Low-level reentrant write function.
-* libc subroutines will use this system routine for output to all files,
-* including stdout.
-* Write data via RTT.
-*/
-int _write_r(struct _reent *r, int file, const void *ptr, int len) {
- (void) file; /* Not used, avoid warning */
- (void) r; /* Not used, avoid warning */
- SEGGER_RTT_Write(0, ptr, len);
- return len;
-}
-
-#endif
-/****** End Of File *************************************************/
+/*********************************************************************
+* SEGGER Microcontroller GmbH *
+* Solutions for real time microcontroller applications *
+**********************************************************************
+* *
+* (c) 1995 - 2018 SEGGER Microcontroller GmbH *
+* *
+* www.segger.com Support: support@segger.com *
+* *
+**********************************************************************
+* *
+* SEGGER RTT * Real Time Transfer for embedded targets *
+* *
+**********************************************************************
+* *
+* All rights reserved. *
+* *
+* SEGGER strongly recommends to not make any changes *
+* to or modify the source code of this software in order to stay *
+* compatible with the RTT protocol and J-Link. *
+* *
+* Redistribution and use in source and binary forms, with or *
+* without modification, are permitted provided that the following *
+* conditions are met: *
+* *
+* o Redistributions of source code must retain the above copyright *
+* notice, this list of conditions and the following disclaimer. *
+* *
+* o Redistributions in binary form must reproduce the above *
+* copyright notice, this list of conditions and the following *
+* disclaimer in the documentation and/or other materials provided *
+* with the distribution. *
+* *
+* o Neither the name of SEGGER Microcontroller GmbH *
+* nor the names of its contributors may be used to endorse or *
+* promote products derived from this software without specific *
+* prior written permission. *
+* *
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
+* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
+* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
+* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
+* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
+* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
+* DAMAGE. *
+* *
+**********************************************************************
+---------------------------END-OF-HEADER------------------------------
+File : SEGGER_RTT_Syscalls_GCC.c
+Purpose : Low-level functions for using printf() via RTT in GCC.
+ To use RTT for printf output, include this file in your
+ application.
+Revision: $Rev: 9599 $
+----------------------------------------------------------------------
+*/
+#if (defined __GNUC__) && !(defined __SES_ARM) && !(defined __CROSSWORKS_ARM)
+
+#include <reent.h> // required for _write_r
+#include "SEGGER_RTT.h"
+
+
+/*********************************************************************
+*
+* Types
+*
+**********************************************************************
+*/
+//
+// If necessary define the _reent struct
+// to match the one passed by the used standard library.
+//
+struct _reent;
+
+/*********************************************************************
+*
+* Function prototypes
+*
+**********************************************************************
+*/
+int _write(int file, char *ptr, int len);
+int _write_r(struct _reent *r, int file, const void *ptr, int len);
+
+/*********************************************************************
+*
+* Global functions
+*
+**********************************************************************
+*/
+
+/*********************************************************************
+*
+* _write()
+*
+* Function description
+* Low-level write function.
+* libc subroutines will use this system routine for output to all files,
+* including stdout.
+* Write data via RTT.
+*/
+int _write(int file, char *ptr, int len) {
+ (void) file; /* Not used, avoid warning */
+ SEGGER_RTT_Write(0, ptr, len);
+ return len;
+}
+
+/*********************************************************************
+*
+* _write_r()
+*
+* Function description
+* Low-level reentrant write function.
+* libc subroutines will use this system routine for output to all files,
+* including stdout.
+* Write data via RTT.
+*/
+int _write_r(struct _reent *r, int file, const void *ptr, int len) {
+ (void) file; /* Not used, avoid warning */
+ (void) r; /* Not used, avoid warning */
+ SEGGER_RTT_Write(0, ptr, len);
+ return len;
+}
+
+#endif
+/****** End Of File *************************************************/
diff --git a/third_party/jlink/SEGGER_RTT_V640/Syscalls/SEGGER_RTT_Syscalls_IAR.c b/third_party/jlink/SEGGER_RTT_V640/Syscalls/SEGGER_RTT_Syscalls_IAR.c
index f5372e0..f8baf69 100644
--- a/third_party/jlink/SEGGER_RTT_V640/Syscalls/SEGGER_RTT_Syscalls_IAR.c
+++ b/third_party/jlink/SEGGER_RTT_V640/Syscalls/SEGGER_RTT_Syscalls_IAR.c
@@ -1,124 +1,124 @@
-/*********************************************************************
-* SEGGER Microcontroller GmbH *
-* Solutions for real time microcontroller applications *
-**********************************************************************
-* *
-* (c) 1995 - 2018 SEGGER Microcontroller GmbH *
-* *
-* www.segger.com Support: support@segger.com *
-* *
-**********************************************************************
-* *
-* SEGGER RTT * Real Time Transfer for embedded targets *
-* *
-**********************************************************************
-* *
-* All rights reserved. *
-* *
-* SEGGER strongly recommends to not make any changes *
-* to or modify the source code of this software in order to stay *
-* compatible with the RTT protocol and J-Link. *
-* *
-* Redistribution and use in source and binary forms, with or *
-* without modification, are permitted provided that the following *
-* conditions are met: *
-* *
-* o Redistributions of source code must retain the above copyright *
-* notice, this list of conditions and the following disclaimer. *
-* *
-* o Redistributions in binary form must reproduce the above *
-* copyright notice, this list of conditions and the following *
-* disclaimer in the documentation and/or other materials provided *
-* with the distribution. *
-* *
-* o Neither the name of SEGGER Microcontroller GmbH *
-* nor the names of its contributors may be used to endorse or *
-* promote products derived from this software without specific *
-* prior written permission. *
-* *
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
-* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
-* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
-* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
-* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
-* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
-* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
-* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
-* DAMAGE. *
-* *
-**********************************************************************
----------------------------END-OF-HEADER------------------------------
-File : SEGGER_RTT_Syscalls_IAR.c
-Purpose : Low-level functions for using printf() via RTT in IAR.
- To use RTT for printf output, include this file in your
- application and set the Library Configuration to Normal.
-Revision: $Rev: 12303 $
-----------------------------------------------------------------------
-*/
-#ifdef __IAR_SYSTEMS_ICC__
-
-//
-// Since IAR EWARM V8 yfuns.h is considered as deprecated and LowLevelIOInterface.h shall be used instead
-// To not break any compatibility with older compiler versions, we have a version check in here
-//
-#if __VER__ >= 8000000
- #include <LowLevelIOInterface.h>
-#else
- #include <yfuns.h>
-#endif
-
-#include "SEGGER_RTT.h"
-#pragma module_name = "?__write"
-
-/*********************************************************************
-*
-* Function prototypes
-*
-**********************************************************************
-*/
-size_t __write(int handle, const unsigned char * buffer, size_t size);
-
-/*********************************************************************
-*
-* Global functions
-*
-**********************************************************************
-*/
-/*********************************************************************
-*
-* __write()
-*
-* Function description
-* Low-level write function.
-* Standard library subroutines will use this system routine
-* for output to all files, including stdout.
-* Write data via RTT.
-*/
-size_t __write(int handle, const unsigned char * buffer, size_t size) {
- (void) handle; /* Not used, avoid warning */
- SEGGER_RTT_Write(0, (const char*)buffer, size);
- return size;
-}
-
-/*********************************************************************
-*
-* __write_buffered()
-*
-* Function description
-* Low-level write function.
-* Standard library subroutines will use this system routine
-* for output to all files, including stdout.
-* Write data via RTT.
-*/
-size_t __write_buffered(int handle, const unsigned char * buffer, size_t size) {
- (void) handle; /* Not used, avoid warning */
- SEGGER_RTT_Write(0, (const char*)buffer, size);
- return size;
-}
-
-#endif
-/****** End Of File *************************************************/
+/*********************************************************************
+* SEGGER Microcontroller GmbH *
+* Solutions for real time microcontroller applications *
+**********************************************************************
+* *
+* (c) 1995 - 2018 SEGGER Microcontroller GmbH *
+* *
+* www.segger.com Support: support@segger.com *
+* *
+**********************************************************************
+* *
+* SEGGER RTT * Real Time Transfer for embedded targets *
+* *
+**********************************************************************
+* *
+* All rights reserved. *
+* *
+* SEGGER strongly recommends to not make any changes *
+* to or modify the source code of this software in order to stay *
+* compatible with the RTT protocol and J-Link. *
+* *
+* Redistribution and use in source and binary forms, with or *
+* without modification, are permitted provided that the following *
+* conditions are met: *
+* *
+* o Redistributions of source code must retain the above copyright *
+* notice, this list of conditions and the following disclaimer. *
+* *
+* o Redistributions in binary form must reproduce the above *
+* copyright notice, this list of conditions and the following *
+* disclaimer in the documentation and/or other materials provided *
+* with the distribution. *
+* *
+* o Neither the name of SEGGER Microcontroller GmbH *
+* nor the names of its contributors may be used to endorse or *
+* promote products derived from this software without specific *
+* prior written permission. *
+* *
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
+* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
+* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
+* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
+* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
+* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
+* DAMAGE. *
+* *
+**********************************************************************
+---------------------------END-OF-HEADER------------------------------
+File : SEGGER_RTT_Syscalls_IAR.c
+Purpose : Low-level functions for using printf() via RTT in IAR.
+ To use RTT for printf output, include this file in your
+ application and set the Library Configuration to Normal.
+Revision: $Rev: 12303 $
+----------------------------------------------------------------------
+*/
+#ifdef __IAR_SYSTEMS_ICC__
+
+//
+// Since IAR EWARM V8 yfuns.h is considered as deprecated and LowLevelIOInterface.h shall be used instead
+// To not break any compatibility with older compiler versions, we have a version check in here
+//
+#if __VER__ >= 8000000
+ #include <LowLevelIOInterface.h>
+#else
+ #include <yfuns.h>
+#endif
+
+#include "SEGGER_RTT.h"
+#pragma module_name = "?__write"
+
+/*********************************************************************
+*
+* Function prototypes
+*
+**********************************************************************
+*/
+size_t __write(int handle, const unsigned char * buffer, size_t size);
+
+/*********************************************************************
+*
+* Global functions
+*
+**********************************************************************
+*/
+/*********************************************************************
+*
+* __write()
+*
+* Function description
+* Low-level write function.
+* Standard library subroutines will use this system routine
+* for output to all files, including stdout.
+* Write data via RTT.
+*/
+size_t __write(int handle, const unsigned char * buffer, size_t size) {
+ (void) handle; /* Not used, avoid warning */
+ SEGGER_RTT_Write(0, (const char*)buffer, size);
+ return size;
+}
+
+/*********************************************************************
+*
+* __write_buffered()
+*
+* Function description
+* Low-level write function.
+* Standard library subroutines will use this system routine
+* for output to all files, including stdout.
+* Write data via RTT.
+*/
+size_t __write_buffered(int handle, const unsigned char * buffer, size_t size) {
+ (void) handle; /* Not used, avoid warning */
+ SEGGER_RTT_Write(0, (const char*)buffer, size);
+ return size;
+}
+
+#endif
+/****** End Of File *************************************************/
diff --git a/third_party/jlink/SEGGER_RTT_V640/Syscalls/SEGGER_RTT_Syscalls_KEIL.c b/third_party/jlink/SEGGER_RTT_V640/Syscalls/SEGGER_RTT_Syscalls_KEIL.c
index 2502cf5..50d38c1 100644
--- a/third_party/jlink/SEGGER_RTT_V640/Syscalls/SEGGER_RTT_Syscalls_KEIL.c
+++ b/third_party/jlink/SEGGER_RTT_V640/Syscalls/SEGGER_RTT_Syscalls_KEIL.c
@@ -1,374 +1,374 @@
-/*********************************************************************
-* SEGGER Microcontroller GmbH *
-* Solutions for real time microcontroller applications *
-**********************************************************************
-* *
-* (c) 1995 - 2018 SEGGER Microcontroller GmbH *
-* *
-* www.segger.com Support: support@segger.com *
-* *
-**********************************************************************
-* *
-* SEGGER RTT * Real Time Transfer for embedded targets *
-* *
-**********************************************************************
-* *
-* All rights reserved. *
-* *
-* SEGGER strongly recommends to not make any changes *
-* to or modify the source code of this software in order to stay *
-* compatible with the RTT protocol and J-Link. *
-* *
-* Redistribution and use in source and binary forms, with or *
-* without modification, are permitted provided that the following *
-* conditions are met: *
-* *
-* o Redistributions of source code must retain the above copyright *
-* notice, this list of conditions and the following disclaimer. *
-* *
-* o Redistributions in binary form must reproduce the above *
-* copyright notice, this list of conditions and the following *
-* disclaimer in the documentation and/or other materials provided *
-* with the distribution. *
-* *
-* o Neither the name of SEGGER Microcontroller GmbH *
-* nor the names of its contributors may be used to endorse or *
-* promote products derived from this software without specific *
-* prior written permission. *
-* *
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
-* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
-* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
-* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
-* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
-* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
-* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
-* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
-* DAMAGE. *
-* *
-**********************************************************************
----------------------------END-OF-HEADER------------------------------
-File : RTT_Syscalls_KEIL.c
-Purpose : Retargeting module for KEIL MDK-CM3.
- Low-level functions for using printf() via RTT
-Revision: $Rev: 9599 $
-----------------------------------------------------------------------
-*/
-#ifdef __CC_ARM
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <rt_sys.h>
-#include <rt_misc.h>
-
-#include "SEGGER_RTT.h"
-/*********************************************************************
-*
-* #pragmas
-*
-**********************************************************************
-*/
-#pragma import(__use_no_semihosting)
-
-#ifdef _MICROLIB
- #pragma import(__use_full_stdio)
-#endif
-
-/*********************************************************************
-*
-* Defines non-configurable
-*
-**********************************************************************
-*/
-
-/* Standard IO device handles - arbitrary, but any real file system handles must be
- less than 0x8000. */
-#define STDIN 0x8001 // Standard Input Stream
-#define STDOUT 0x8002 // Standard Output Stream
-#define STDERR 0x8003 // Standard Error Stream
-
-/*********************************************************************
-*
-* Public const
-*
-**********************************************************************
-*/
-//const char __stdin_name[] = "STDIN";
-const char __stdout_name[] = "STDOUT";
-const char __stderr_name[] = "STDERR";
-
-/*********************************************************************
-*
-* Public code
-*
-**********************************************************************
-*/
-
-/*********************************************************************
-*
-* _ttywrch
-*
-* Function description:
-* Outputs a character to the console
-*
-* Parameters:
-* c - character to output
-*
-*/
-void _ttywrch(int c) {
- fputc(c, stdout); // stdout
- fflush(stdout);
-}
-
-/*********************************************************************
-*
-* _sys_open
-*
-* Function description:
-* Opens the device/file in order to do read/write operations
-*
-* Parameters:
-* sName - sName of the device/file to open
-* OpenMode - This parameter is currently ignored
-*
-* Return value:
-* != 0 - Handle to the object to open, otherwise
-* == 0 -"device" is not handled by this module
-*
-*/
-FILEHANDLE _sys_open(const char * sName, int OpenMode) {
- (void)OpenMode;
- // Register standard Input Output devices.
- if (strcmp(sName, __stdout_name) == 0) {
- return (STDOUT);
- } else if (strcmp(sName, __stderr_name) == 0) {
- return (STDERR);
- } else
- return (0); // Not implemented
-}
-
-/*********************************************************************
-*
-* _sys_close
-*
-* Function description:
-* Closes the handle to the open device/file
-*
-* Parameters:
-* hFile - Handle to a file opened via _sys_open
-*
-* Return value:
-* 0 - device/file closed
-*
-*/
-int _sys_close(FILEHANDLE hFile) {
- (void)hFile;
- return 0; // Not implemented
-}
-
-/*********************************************************************
-*
-* _sys_write
-*
-* Function description:
-* Writes the data to an open handle.
-* Currently this function only outputs data to the console
-*
-* Parameters:
-* hFile - Handle to a file opened via _sys_open
-* pBuffer - Pointer to the data that shall be written
-* NumBytes - Number of bytes to write
-* Mode - The Mode that shall be used
-*
-* Return value:
-* Number of bytes *not* written to the file/device
-*
-*/
-int _sys_write(FILEHANDLE hFile, const unsigned char * pBuffer, unsigned NumBytes, int Mode) {
- int r = 0;
-
- (void)Mode;
- if (hFile == STDOUT) {
- return NumBytes - SEGGER_RTT_Write(0, (const char*)pBuffer, NumBytes);
- }
- return r;
-}
-
-/*********************************************************************
-*
-* _sys_read
-*
-* Function description:
-* Reads data from an open handle.
-* Currently this modules does nothing.
-*
-* Parameters:
-* hFile - Handle to a file opened via _sys_open
-* pBuffer - Pointer to buffer to store the read data
-* NumBytes - Number of bytes to read
-* Mode - The Mode that shall be used
-*
-* Return value:
-* Number of bytes read from the file/device
-*
-*/
-int _sys_read(FILEHANDLE hFile, unsigned char * pBuffer, unsigned NumBytes, int Mode) {
- (void)hFile;
- (void)pBuffer;
- (void)NumBytes;
- (void)Mode;
- return (0); // Not implemented
-}
-
-/*********************************************************************
-*
-* _sys_istty
-*
-* Function description:
-* This function shall return whether the opened file
-* is a console device or not.
-*
-* Parameters:
-* hFile - Handle to a file opened via _sys_open
-*
-* Return value:
-* 1 - Device is a console
-* 0 - Device is not a console
-*
-*/
-int _sys_istty(FILEHANDLE hFile) {
- if (hFile > 0x8000) {
- return (1);
- }
- return (0); // Not implemented
-}
-
-/*********************************************************************
-*
-* _sys_seek
-*
-* Function description:
-* Seeks via the file to a specific position
-*
-* Parameters:
-* hFile - Handle to a file opened via _sys_open
-* Pos -
-*
-* Return value:
-* int -
-*
-*/
-int _sys_seek(FILEHANDLE hFile, long Pos) {
- (void)hFile;
- (void)Pos;
- return (0); // Not implemented
-}
-
-/*********************************************************************
-*
-* _sys_ensure
-*
-* Function description:
-*
-*
-* Parameters:
-* hFile - Handle to a file opened via _sys_open
-*
-* Return value:
-* int -
-*
-*/
-int _sys_ensure(FILEHANDLE hFile) {
- (void)hFile;
- return (-1); // Not implemented
-}
-
-/*********************************************************************
-*
-* _sys_flen
-*
-* Function description:
-* Returns the length of the opened file handle
-*
-* Parameters:
-* hFile - Handle to a file opened via _sys_open
-*
-* Return value:
-* Length of the file
-*
-*/
-long _sys_flen(FILEHANDLE hFile) {
- (void)hFile;
- return (0); // Not implemented
-}
-
-/*********************************************************************
-*
-* _sys_tmpnam
-*
-* Function description:
-* This function converts the file number fileno for a temporary
-* file to a unique filename, for example, tmp0001.
-*
-* Parameters:
-* pBuffer - Pointer to a buffer to store the name
-* FileNum - file number to convert
-* MaxLen - Size of the buffer
-*
-* Return value:
-* 1 - Error
-* 0 - Success
-*
-*/
-int _sys_tmpnam(char * pBuffer, int FileNum, unsigned MaxLen) {
- (void)pBuffer;
- (void)FileNum;
- (void)MaxLen;
- return (1); // Not implemented
-}
-
-/*********************************************************************
-*
-* _sys_command_string
-*
-* Function description:
-* This function shall execute a system command.
-*
-* Parameters:
-* cmd - Pointer to the command string
-* len - Length of the string
-*
-* Return value:
-* == NULL - Command was not successfully executed
-* == sCmd - Command was passed successfully
-*
-*/
-char * _sys_command_string(char * cmd, int len) {
- (void)len;
- return cmd; // Not implemented
-}
-
-/*********************************************************************
-*
-* _sys_exit
-*
-* Function description:
-* This function is called when the application returns from main
-*
-* Parameters:
-* ReturnCode - Return code from the main function
-*
-*
-*/
-void _sys_exit(int ReturnCode) {
- (void)ReturnCode;
- while (1); // Not implemented
-}
-
-#endif
-/*************************** End of file ****************************/
+/*********************************************************************
+* SEGGER Microcontroller GmbH *
+* Solutions for real time microcontroller applications *
+**********************************************************************
+* *
+* (c) 1995 - 2018 SEGGER Microcontroller GmbH *
+* *
+* www.segger.com Support: support@segger.com *
+* *
+**********************************************************************
+* *
+* SEGGER RTT * Real Time Transfer for embedded targets *
+* *
+**********************************************************************
+* *
+* All rights reserved. *
+* *
+* SEGGER strongly recommends to not make any changes *
+* to or modify the source code of this software in order to stay *
+* compatible with the RTT protocol and J-Link. *
+* *
+* Redistribution and use in source and binary forms, with or *
+* without modification, are permitted provided that the following *
+* conditions are met: *
+* *
+* o Redistributions of source code must retain the above copyright *
+* notice, this list of conditions and the following disclaimer. *
+* *
+* o Redistributions in binary form must reproduce the above *
+* copyright notice, this list of conditions and the following *
+* disclaimer in the documentation and/or other materials provided *
+* with the distribution. *
+* *
+* o Neither the name of SEGGER Microcontroller GmbH *
+* nor the names of its contributors may be used to endorse or *
+* promote products derived from this software without specific *
+* prior written permission. *
+* *
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
+* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
+* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
+* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
+* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
+* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
+* DAMAGE. *
+* *
+**********************************************************************
+---------------------------END-OF-HEADER------------------------------
+File : RTT_Syscalls_KEIL.c
+Purpose : Retargeting module for KEIL MDK-CM3.
+ Low-level functions for using printf() via RTT
+Revision: $Rev: 9599 $
+----------------------------------------------------------------------
+*/
+#ifdef __CC_ARM
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <rt_sys.h>
+#include <rt_misc.h>
+
+#include "SEGGER_RTT.h"
+/*********************************************************************
+*
+* #pragmas
+*
+**********************************************************************
+*/
+#pragma import(__use_no_semihosting)
+
+#ifdef _MICROLIB
+ #pragma import(__use_full_stdio)
+#endif
+
+/*********************************************************************
+*
+* Defines non-configurable
+*
+**********************************************************************
+*/
+
+/* Standard IO device handles - arbitrary, but any real file system handles must be
+ less than 0x8000. */
+#define STDIN 0x8001 // Standard Input Stream
+#define STDOUT 0x8002 // Standard Output Stream
+#define STDERR 0x8003 // Standard Error Stream
+
+/*********************************************************************
+*
+* Public const
+*
+**********************************************************************
+*/
+//const char __stdin_name[] = "STDIN";
+const char __stdout_name[] = "STDOUT";
+const char __stderr_name[] = "STDERR";
+
+/*********************************************************************
+*
+* Public code
+*
+**********************************************************************
+*/
+
+/*********************************************************************
+*
+* _ttywrch
+*
+* Function description:
+* Outputs a character to the console
+*
+* Parameters:
+* c - character to output
+*
+*/
+void _ttywrch(int c) {
+ fputc(c, stdout); // stdout
+ fflush(stdout);
+}
+
+/*********************************************************************
+*
+* _sys_open
+*
+* Function description:
+* Opens the device/file in order to do read/write operations
+*
+* Parameters:
+* sName - sName of the device/file to open
+* OpenMode - This parameter is currently ignored
+*
+* Return value:
+* != 0 - Handle to the object to open, otherwise
+* == 0 -"device" is not handled by this module
+*
+*/
+FILEHANDLE _sys_open(const char * sName, int OpenMode) {
+ (void)OpenMode;
+ // Register standard Input Output devices.
+ if (strcmp(sName, __stdout_name) == 0) {
+ return (STDOUT);
+ } else if (strcmp(sName, __stderr_name) == 0) {
+ return (STDERR);
+ } else
+ return (0); // Not implemented
+}
+
+/*********************************************************************
+*
+* _sys_close
+*
+* Function description:
+* Closes the handle to the open device/file
+*
+* Parameters:
+* hFile - Handle to a file opened via _sys_open
+*
+* Return value:
+* 0 - device/file closed
+*
+*/
+int _sys_close(FILEHANDLE hFile) {
+ (void)hFile;
+ return 0; // Not implemented
+}
+
+/*********************************************************************
+*
+* _sys_write
+*
+* Function description:
+* Writes the data to an open handle.
+* Currently this function only outputs data to the console
+*
+* Parameters:
+* hFile - Handle to a file opened via _sys_open
+* pBuffer - Pointer to the data that shall be written
+* NumBytes - Number of bytes to write
+* Mode - The Mode that shall be used
+*
+* Return value:
+* Number of bytes *not* written to the file/device
+*
+*/
+int _sys_write(FILEHANDLE hFile, const unsigned char * pBuffer, unsigned NumBytes, int Mode) {
+ int r = 0;
+
+ (void)Mode;
+ if (hFile == STDOUT) {
+ return NumBytes - SEGGER_RTT_Write(0, (const char*)pBuffer, NumBytes);
+ }
+ return r;
+}
+
+/*********************************************************************
+*
+* _sys_read
+*
+* Function description:
+* Reads data from an open handle.
+* Currently this modules does nothing.
+*
+* Parameters:
+* hFile - Handle to a file opened via _sys_open
+* pBuffer - Pointer to buffer to store the read data
+* NumBytes - Number of bytes to read
+* Mode - The Mode that shall be used
+*
+* Return value:
+* Number of bytes read from the file/device
+*
+*/
+int _sys_read(FILEHANDLE hFile, unsigned char * pBuffer, unsigned NumBytes, int Mode) {
+ (void)hFile;
+ (void)pBuffer;
+ (void)NumBytes;
+ (void)Mode;
+ return (0); // Not implemented
+}
+
+/*********************************************************************
+*
+* _sys_istty
+*
+* Function description:
+* This function shall return whether the opened file
+* is a console device or not.
+*
+* Parameters:
+* hFile - Handle to a file opened via _sys_open
+*
+* Return value:
+* 1 - Device is a console
+* 0 - Device is not a console
+*
+*/
+int _sys_istty(FILEHANDLE hFile) {
+ if (hFile > 0x8000) {
+ return (1);
+ }
+ return (0); // Not implemented
+}
+
+/*********************************************************************
+*
+* _sys_seek
+*
+* Function description:
+* Seeks via the file to a specific position
+*
+* Parameters:
+* hFile - Handle to a file opened via _sys_open
+* Pos -
+*
+* Return value:
+* int -
+*
+*/
+int _sys_seek(FILEHANDLE hFile, long Pos) {
+ (void)hFile;
+ (void)Pos;
+ return (0); // Not implemented
+}
+
+/*********************************************************************
+*
+* _sys_ensure
+*
+* Function description:
+*
+*
+* Parameters:
+* hFile - Handle to a file opened via _sys_open
+*
+* Return value:
+* int -
+*
+*/
+int _sys_ensure(FILEHANDLE hFile) {
+ (void)hFile;
+ return (-1); // Not implemented
+}
+
+/*********************************************************************
+*
+* _sys_flen
+*
+* Function description:
+* Returns the length of the opened file handle
+*
+* Parameters:
+* hFile - Handle to a file opened via _sys_open
+*
+* Return value:
+* Length of the file
+*
+*/
+long _sys_flen(FILEHANDLE hFile) {
+ (void)hFile;
+ return (0); // Not implemented
+}
+
+/*********************************************************************
+*
+* _sys_tmpnam
+*
+* Function description:
+* This function converts the file number fileno for a temporary
+* file to a unique filename, for example, tmp0001.
+*
+* Parameters:
+* pBuffer - Pointer to a buffer to store the name
+* FileNum - file number to convert
+* MaxLen - Size of the buffer
+*
+* Return value:
+* 1 - Error
+* 0 - Success
+*
+*/
+int _sys_tmpnam(char * pBuffer, int FileNum, unsigned MaxLen) {
+ (void)pBuffer;
+ (void)FileNum;
+ (void)MaxLen;
+ return (1); // Not implemented
+}
+
+/*********************************************************************
+*
+* _sys_command_string
+*
+* Function description:
+* This function shall execute a system command.
+*
+* Parameters:
+* cmd - Pointer to the command string
+* len - Length of the string
+*
+* Return value:
+* == NULL - Command was not successfully executed
+* == sCmd - Command was passed successfully
+*
+*/
+char * _sys_command_string(char * cmd, int len) {
+ (void)len;
+ return cmd; // Not implemented
+}
+
+/*********************************************************************
+*
+* _sys_exit
+*
+* Function description:
+* This function is called when the application returns from main
+*
+* Parameters:
+* ReturnCode - Return code from the main function
+*
+*
+*/
+void _sys_exit(int ReturnCode) {
+ (void)ReturnCode;
+ while (1); // Not implemented
+}
+
+#endif
+/*************************** End of file ****************************/
diff --git a/third_party/jlink/SEGGER_RTT_V640/Syscalls/SEGGER_RTT_Syscalls_SES.c b/third_party/jlink/SEGGER_RTT_V640/Syscalls/SEGGER_RTT_Syscalls_SES.c
index 452f2d2..48609e4 100644
--- a/third_party/jlink/SEGGER_RTT_V640/Syscalls/SEGGER_RTT_Syscalls_SES.c
+++ b/third_party/jlink/SEGGER_RTT_V640/Syscalls/SEGGER_RTT_Syscalls_SES.c
@@ -1,257 +1,257 @@
-/*********************************************************************
-* SEGGER Microcontroller GmbH *
-* The Embedded Experts *
-**********************************************************************
-* *
-* (c) 1995 - 2018 SEGGER Microcontroller GmbH *
-* *
-* www.segger.com Support: support@segger.com *
-* *
-**********************************************************************
-* *
-* SEGGER RTT * Real Time Transfer for embedded targets *
-* *
-**********************************************************************
-* *
-* All rights reserved. *
-* *
-* SEGGER strongly recommends to not make any changes *
-* to or modify the source code of this software in order to stay *
-* compatible with the RTT protocol and J-Link. *
-* *
-* Redistribution and use in source and binary forms, with or *
-* without modification, are permitted provided that the following *
-* conditions are met: *
-* *
-* o Redistributions of source code must retain the above copyright *
-* notice, this list of conditions and the following disclaimer. *
-* *
-* o Redistributions in binary form must reproduce the above *
-* copyright notice, this list of conditions and the following *
-* disclaimer in the documentation and/or other materials provided *
-* with the distribution. *
-* *
-* o Neither the name of SEGGER Microcontroller GmbH *
-* nor the names of its contributors may be used to endorse or *
-* promote products derived from this software without specific *
-* prior written permission. *
-* *
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
-* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
-* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
-* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
-* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
-* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
-* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
-* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
-* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
-* DAMAGE. *
-* *
-**********************************************************************
----------------------------END-OF-HEADER------------------------------
-File : SEGGER_RTT_Syscalls_SES.c
-Purpose : Reimplementation of printf, puts and __getchar using RTT
- in SEGGER Embedded Studio.
- To use RTT for printf output, include this file in your
- application.
-Revision: $Rev: 12804 $
-----------------------------------------------------------------------
-*/
-#if (defined __SES_ARM) || (defined __CROSSWORKS_ARM)
-
-#include "SEGGER_RTT.h"
-#include <stdarg.h>
-#include <stdio.h>
-#include "limits.h"
-#include "__libc.h"
-#include "__vfprintf.h"
-
-/*********************************************************************
-*
-* Defines, configurable
-*
-**********************************************************************
-*/
-//
-// Select string formatting implementation.
-//
-// RTT printf formatting
-// - Configurable stack usage. (SEGGER_RTT_PRINTF_BUFFER_SIZE in SEGGER_RTT_Conf.h)
-// - No maximum string length.
-// - Limited conversion specifiers and flags. (See SEGGER_RTT_printf.c)
-// Standard library printf formatting
-// - Configurable formatting capabilities.
-// - Full conversion specifier and flag support.
-// - Maximum string length has to be known or (slightly) slower character-wise output.
-//
-// #define PRINTF_USE_SEGGER_RTT_FORMATTING 0 // Use standard library formatting
-// #define PRINTF_USE_SEGGER_RTT_FORMATTING 1 // Use RTT formatting
-//
-#ifndef PRINTF_USE_SEGGER_RTT_FORMATTING
- #define PRINTF_USE_SEGGER_RTT_FORMATTING 0
-#endif
-//
-// If using standard library formatting,
-// select maximum output string buffer size or character-wise output.
-//
-// #define PRINTF_BUFFER_SIZE 0 // Use character-wise output
-// #define PRINTF_BUFFER_SIZE 128 // Default maximum string length
-//
-#ifndef PRINTF_BUFFER_SIZE
- #define PRINTF_BUFFER_SIZE 128
-#endif
-
-#if PRINTF_USE_SEGGER_RTT_FORMATTING // Use SEGGER RTT formatting implementation
-/*********************************************************************
-*
-* Function prototypes
-*
-**********************************************************************
-*/
-int SEGGER_RTT_vprintf(unsigned BufferIndex, const char * sFormat, va_list * pParamList);
-
-/*********************************************************************
-*
-* Global functions, printf
-*
-**********************************************************************
-*/
-/*********************************************************************
-*
-* printf()
-*
-* Function description
-* print a formatted string using RTT and SEGGER RTT formatting.
-*/
-int printf(const char *fmt,...) {
- int n;
- va_list args;
-
- va_start (args, fmt);
- n = SEGGER_RTT_vprintf(0, fmt, &args);
- va_end(args);
- return n;
-}
-
-#elif PRINTF_BUFFER_SIZE == 0 // Use standard library formatting with character-wise output
-
-/*********************************************************************
-*
-* Static functions
-*
-**********************************************************************
-*/
-static int _putchar(int x, __printf_tag_ptr ctx) {
- (void)ctx;
- SEGGER_RTT_Write(0, (char *)&x, 1);
- return x;
-}
-
-/*********************************************************************
-*
-* Global functions, printf
-*
-**********************************************************************
-*/
-/*********************************************************************
-*
-* printf()
-*
-* Function description
-* print a formatted string character-wise, using RTT and standard
-* library formatting.
-*/
-int printf(const char *fmt, ...) {
- int n;
- va_list args;
- __printf_t iod;
-
- va_start(args, fmt);
- iod.string = 0;
- iod.maxchars = INT_MAX;
- iod.output_fn = _putchar;
- SEGGER_RTT_LOCK();
- n = __vfprintf(&iod, fmt, args);
- SEGGER_RTT_UNLOCK();
- va_end(args);
- return n;
-}
-
-#else // Use standard library formatting with static buffer
-
-/*********************************************************************
-*
-* Global functions, printf
-*
-**********************************************************************
-*/
-/*********************************************************************
-*
-* printf()
-*
-* Function description
-* print a formatted string using RTT and standard library formatting.
-*/
-int printf(const char *fmt,...) {
- int n;
- char aBuffer[PRINTF_BUFFER_SIZE];
- va_list args;
-
- va_start (args, fmt);
- n = vsnprintf(aBuffer, sizeof(aBuffer), fmt, args);
- if (n > (int)sizeof(aBuffer)) {
- SEGGER_RTT_Write(0, aBuffer, sizeof(aBuffer));
- } else if (n > 0) {
- SEGGER_RTT_Write(0, aBuffer, n);
- }
- va_end(args);
- return n;
-}
-#endif
-
-/*********************************************************************
-*
-* Global functions
-*
-**********************************************************************
-*/
-/*********************************************************************
-*
-* puts()
-*
-* Function description
-* print a string using RTT.
-*/
-int puts(const char *s) {
- return SEGGER_RTT_WriteString(0, s);
-}
-
-/*********************************************************************
-*
-* __putchar()
-*
-* Function description
-* Write one character via RTT.
-*/
-int __putchar(int x, __printf_tag_ptr ctx) {
- (void)ctx;
- SEGGER_RTT_Write(0, (char *)&x, 1);
- return x;
-}
-
-/*********************************************************************
-*
-* __getchar()
-*
-* Function description
-* Wait for and get a character via RTT.
-*/
-int __getchar() {
- return SEGGER_RTT_WaitKey();
-}
-
-#endif
-/****** End Of File *************************************************/
+/*********************************************************************
+* SEGGER Microcontroller GmbH *
+* The Embedded Experts *
+**********************************************************************
+* *
+* (c) 1995 - 2018 SEGGER Microcontroller GmbH *
+* *
+* www.segger.com Support: support@segger.com *
+* *
+**********************************************************************
+* *
+* SEGGER RTT * Real Time Transfer for embedded targets *
+* *
+**********************************************************************
+* *
+* All rights reserved. *
+* *
+* SEGGER strongly recommends to not make any changes *
+* to or modify the source code of this software in order to stay *
+* compatible with the RTT protocol and J-Link. *
+* *
+* Redistribution and use in source and binary forms, with or *
+* without modification, are permitted provided that the following *
+* conditions are met: *
+* *
+* o Redistributions of source code must retain the above copyright *
+* notice, this list of conditions and the following disclaimer. *
+* *
+* o Redistributions in binary form must reproduce the above *
+* copyright notice, this list of conditions and the following *
+* disclaimer in the documentation and/or other materials provided *
+* with the distribution. *
+* *
+* o Neither the name of SEGGER Microcontroller GmbH *
+* nor the names of its contributors may be used to endorse or *
+* promote products derived from this software without specific *
+* prior written permission. *
+* *
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
+* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
+* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
+* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
+* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
+* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
+* DAMAGE. *
+* *
+**********************************************************************
+---------------------------END-OF-HEADER------------------------------
+File : SEGGER_RTT_Syscalls_SES.c
+Purpose : Reimplementation of printf, puts and __getchar using RTT
+ in SEGGER Embedded Studio.
+ To use RTT for printf output, include this file in your
+ application.
+Revision: $Rev: 12804 $
+----------------------------------------------------------------------
+*/
+#if (defined __SES_ARM) || (defined __CROSSWORKS_ARM)
+
+#include "SEGGER_RTT.h"
+#include <stdarg.h>
+#include <stdio.h>
+#include "limits.h"
+#include "__libc.h"
+#include "__vfprintf.h"
+
+/*********************************************************************
+*
+* Defines, configurable
+*
+**********************************************************************
+*/
+//
+// Select string formatting implementation.
+//
+// RTT printf formatting
+// - Configurable stack usage. (SEGGER_RTT_PRINTF_BUFFER_SIZE in SEGGER_RTT_Conf.h)
+// - No maximum string length.
+// - Limited conversion specifiers and flags. (See SEGGER_RTT_printf.c)
+// Standard library printf formatting
+// - Configurable formatting capabilities.
+// - Full conversion specifier and flag support.
+// - Maximum string length has to be known or (slightly) slower character-wise output.
+//
+// #define PRINTF_USE_SEGGER_RTT_FORMATTING 0 // Use standard library formatting
+// #define PRINTF_USE_SEGGER_RTT_FORMATTING 1 // Use RTT formatting
+//
+#ifndef PRINTF_USE_SEGGER_RTT_FORMATTING
+ #define PRINTF_USE_SEGGER_RTT_FORMATTING 0
+#endif
+//
+// If using standard library formatting,
+// select maximum output string buffer size or character-wise output.
+//
+// #define PRINTF_BUFFER_SIZE 0 // Use character-wise output
+// #define PRINTF_BUFFER_SIZE 128 // Default maximum string length
+//
+#ifndef PRINTF_BUFFER_SIZE
+ #define PRINTF_BUFFER_SIZE 128
+#endif
+
+#if PRINTF_USE_SEGGER_RTT_FORMATTING // Use SEGGER RTT formatting implementation
+/*********************************************************************
+*
+* Function prototypes
+*
+**********************************************************************
+*/
+int SEGGER_RTT_vprintf(unsigned BufferIndex, const char * sFormat, va_list * pParamList);
+
+/*********************************************************************
+*
+* Global functions, printf
+*
+**********************************************************************
+*/
+/*********************************************************************
+*
+* printf()
+*
+* Function description
+* print a formatted string using RTT and SEGGER RTT formatting.
+*/
+int printf(const char *fmt,...) {
+ int n;
+ va_list args;
+
+ va_start (args, fmt);
+ n = SEGGER_RTT_vprintf(0, fmt, &args);
+ va_end(args);
+ return n;
+}
+
+#elif PRINTF_BUFFER_SIZE == 0 // Use standard library formatting with character-wise output
+
+/*********************************************************************
+*
+* Static functions
+*
+**********************************************************************
+*/
+static int _putchar(int x, __printf_tag_ptr ctx) {
+ (void)ctx;
+ SEGGER_RTT_Write(0, (char *)&x, 1);
+ return x;
+}
+
+/*********************************************************************
+*
+* Global functions, printf
+*
+**********************************************************************
+*/
+/*********************************************************************
+*
+* printf()
+*
+* Function description
+* print a formatted string character-wise, using RTT and standard
+* library formatting.
+*/
+int printf(const char *fmt, ...) {
+ int n;
+ va_list args;
+ __printf_t iod;
+
+ va_start(args, fmt);
+ iod.string = 0;
+ iod.maxchars = INT_MAX;
+ iod.output_fn = _putchar;
+ SEGGER_RTT_LOCK();
+ n = __vfprintf(&iod, fmt, args);
+ SEGGER_RTT_UNLOCK();
+ va_end(args);
+ return n;
+}
+
+#else // Use standard library formatting with static buffer
+
+/*********************************************************************
+*
+* Global functions, printf
+*
+**********************************************************************
+*/
+/*********************************************************************
+*
+* printf()
+*
+* Function description
+* print a formatted string using RTT and standard library formatting.
+*/
+int printf(const char *fmt,...) {
+ int n;
+ char aBuffer[PRINTF_BUFFER_SIZE];
+ va_list args;
+
+ va_start (args, fmt);
+ n = vsnprintf(aBuffer, sizeof(aBuffer), fmt, args);
+ if (n > (int)sizeof(aBuffer)) {
+ SEGGER_RTT_Write(0, aBuffer, sizeof(aBuffer));
+ } else if (n > 0) {
+ SEGGER_RTT_Write(0, aBuffer, n);
+ }
+ va_end(args);
+ return n;
+}
+#endif
+
+/*********************************************************************
+*
+* Global functions
+*
+**********************************************************************
+*/
+/*********************************************************************
+*
+* puts()
+*
+* Function description
+* print a string using RTT.
+*/
+int puts(const char *s) {
+ return SEGGER_RTT_WriteString(0, s);
+}
+
+/*********************************************************************
+*
+* __putchar()
+*
+* Function description
+* Write one character via RTT.
+*/
+int __putchar(int x, __printf_tag_ptr ctx) {
+ (void)ctx;
+ SEGGER_RTT_Write(0, (char *)&x, 1);
+ return x;
+}
+
+/*********************************************************************
+*
+* __getchar()
+*
+* Function description
+* Wait for and get a character via RTT.
+*/
+int __getchar() {
+ return SEGGER_RTT_WaitKey();
+}
+
+#endif
+/****** End Of File *************************************************/
diff --git a/third_party/mbedtls/CMakeLists.txt b/third_party/mbedtls/CMakeLists.txt
new file mode 100644
index 0000000..00ca416
--- /dev/null
+++ b/third_party/mbedtls/CMakeLists.txt
@@ -0,0 +1,80 @@
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+add_library(mbedcrypto)
+
+target_compile_definitions(mbedcrypto PRIVATE
+ ${OT_PRIVATE_DEFINES}
+)
+
+target_include_directories(mbedcrypto PRIVATE
+ ${OT_PUBLIC_INCLUDES}
+ ${OT_PRIVATE_INCLUDES}
+ ${PROJECT_SOURCE_DIR}/src/core
+)
+
+target_sources(mbedcrypto PRIVATE
+ repo/library/aes.c
+ repo/library/asn1parse.c
+ repo/library/asn1write.c
+ repo/library/base64.c
+ repo/library/bignum.c
+ repo/library/ccm.c
+ repo/library/cipher.c
+ repo/library/cipher_wrap.c
+ repo/library/cmac.c
+ repo/library/ctr_drbg.c
+ repo/library/debug.c
+ repo/library/ecdh.c
+ repo/library/ecdsa.c
+ repo/library/ecjpake.c
+ repo/library/ecp.c
+ repo/library/ecp_curves.c
+ repo/library/entropy.c
+ repo/library/entropy_poll.c
+ repo/library/md.c
+ repo/library/md_wrap.c
+ repo/library/memory_buffer_alloc.c
+ repo/library/oid.c
+ repo/library/pem.c
+ repo/library/pk.c
+ repo/library/pk_wrap.c
+ repo/library/pkparse.c
+ repo/library/platform.c
+ repo/library/platform_util.c
+ repo/library/sha256.c
+ repo/library/ssl_cookie.c
+ repo/library/ssl_ciphersuites.c
+ repo/library/ssl_cli.c
+ repo/library/ssl_srv.c
+ repo/library/ssl_ticket.c
+ repo/library/ssl_tls.c
+ repo/library/threading.c
+ repo/library/x509.c
+ repo/library/x509_crt.c
+)
diff --git a/third_party/mbedtls/Makefile.am b/third_party/mbedtls/Makefile.am
index c5b9dcd..aae66a9 100644
--- a/third_party/mbedtls/Makefile.am
+++ b/third_party/mbedtls/Makefile.am
@@ -55,6 +55,7 @@
repo/library/ecdh.c \
repo/library/ecdsa.c \
repo/library/ecjpake.c \
+ repo/library/ecp.c \
repo/library/ecp_curves.c \
repo/library/entropy.c \
repo/library/entropy_poll.c \
@@ -80,14 +81,6 @@
repo/library/x509_crt.c \
$(NULL)
-if !OPENTHREAD_EXAMPLES_EFR32MG12
-if !OPENTHREAD_EXAMPLES_EFR32MG21
-libmbedcrypto_a_SOURCES += \
- repo/library/ecp.c \
- $(NULL)
-endif
-endif
-
if OPENTHREAD_BUILD_COVERAGE
Dash = -
CLEANFILES = $(shell find $(top_builddir)/third_party/mbedtls $(Dash)name "*.gcda" $(Dash)o $(Dash)name "*.gcno")
diff --git a/third_party/mbedtls/mbedtls-config.h b/third_party/mbedtls/mbedtls-config.h
index b933933..4ce7a57 100644
--- a/third_party/mbedtls/mbedtls-config.h
+++ b/third_party/mbedtls/mbedtls-config.h
@@ -99,7 +99,7 @@
#define MBEDTLS_X509_CRT_PARSE_C
#endif
-#if OPENTHREAD_ECDSA_ENABLE
+#if OPENTHREAD_CONFIG_ECDSA_ENABLE
#define MBEDTLS_BASE64_C
#define MBEDTLS_ECDH_C
#define MBEDTLS_ECDSA_C
diff --git a/third_party/mbedtls/repo/programs/pkey/rsa_priv.txt b/third_party/mbedtls/repo/programs/pkey/rsa_priv.txt
index 22c37fe..254fcf8 100644
--- a/third_party/mbedtls/repo/programs/pkey/rsa_priv.txt
+++ b/third_party/mbedtls/repo/programs/pkey/rsa_priv.txt
@@ -1,8 +1,8 @@
-N = A1D46FBA2318F8DCEF16C280948B1CF27966B9B47225ED2989F8D74B45BD36049C0AAB5AD0FF003553BA843C8E12782FC5873BB89A3DC84B883D25666CD22BF3ACD5B675969F8BEBFBCAC93FDD927C7442B178B10D1DFF9398E52316AAE0AF74E594650BDC3C670241D418684593CDA1A7B9DC4F20D2FDC6F66344074003E211
-E = 010001
-D = 589552BB4F2F023ADDDD5586D0C8FD857512D82080436678D07F984A29D892D31F1F7000FC5A39A0F73E27D885E47249A4148C8A5653EF69F91F8F736BA9F84841C2D99CD8C24DE8B72B5C9BE0EDBE23F93D731749FEA9CFB4A48DD2B7F35A2703E74AA2D4DB7DE9CEEA7D763AF0ADA7AC176C4E9A22C4CDA65CEC0C65964401
-P = CD083568D2D46C44C40C1FA0101AF2155E59C70B08423112AF0C1202514BBA5210765E29FF13036F56C7495894D80CF8C3BAEE2839BACBB0B86F6A2965F60DB1
-Q = CA0EEEA5E710E8E9811A6B846399420E3AE4A4C16647E426DDF8BBBCB11CD3F35CE2E4B6BCAD07AE2C0EC2ECBFCC601B207CDD77B5673E16382B1130BF465261
-DP = 0D0E21C07BF434B4A83B116472C2147A11D8EB98A33CFBBCF1D275EF19D815941622435AAF3839B6C432CA53CE9E772CFBE1923A937A766FD93E96E6EDEC1DF1
-DQ = 269CEBE6305DFEE4809377F078C814E37B45AE6677114DFC4F76F5097E1F3031D592567AC55B9B98213B40ECD54A4D2361F5FAACA1B1F51F71E4690893C4F081
-QP = 97AC5BB885ABCA314375E9E4DB1BA4B2218C90619F61BD474F5785075ECA81750A735199A8C191FE2D3355E7CF601A70E5CABDE0E02C2538BB9FB4871540B3C1
+N = A1D46FBA2318F8DCEF16C280948B1CF27966B9B47225ED2989F8D74B45BD36049C0AAB5AD0FF003553BA843C8E12782FC5873BB89A3DC84B883D25666CD22BF3ACD5B675969F8BEBFBCAC93FDD927C7442B178B10D1DFF9398E52316AAE0AF74E594650BDC3C670241D418684593CDA1A7B9DC4F20D2FDC6F66344074003E211
+E = 010001
+D = 589552BB4F2F023ADDDD5586D0C8FD857512D82080436678D07F984A29D892D31F1F7000FC5A39A0F73E27D885E47249A4148C8A5653EF69F91F8F736BA9F84841C2D99CD8C24DE8B72B5C9BE0EDBE23F93D731749FEA9CFB4A48DD2B7F35A2703E74AA2D4DB7DE9CEEA7D763AF0ADA7AC176C4E9A22C4CDA65CEC0C65964401
+P = CD083568D2D46C44C40C1FA0101AF2155E59C70B08423112AF0C1202514BBA5210765E29FF13036F56C7495894D80CF8C3BAEE2839BACBB0B86F6A2965F60DB1
+Q = CA0EEEA5E710E8E9811A6B846399420E3AE4A4C16647E426DDF8BBBCB11CD3F35CE2E4B6BCAD07AE2C0EC2ECBFCC601B207CDD77B5673E16382B1130BF465261
+DP = 0D0E21C07BF434B4A83B116472C2147A11D8EB98A33CFBBCF1D275EF19D815941622435AAF3839B6C432CA53CE9E772CFBE1923A937A766FD93E96E6EDEC1DF1
+DQ = 269CEBE6305DFEE4809377F078C814E37B45AE6677114DFC4F76F5097E1F3031D592567AC55B9B98213B40ECD54A4D2361F5FAACA1B1F51F71E4690893C4F081
+QP = 97AC5BB885ABCA314375E9E4DB1BA4B2218C90619F61BD474F5785075ECA81750A735199A8C191FE2D3355E7CF601A70E5CABDE0E02C2538BB9FB4871540B3C1
diff --git a/third_party/mbedtls/repo/programs/pkey/rsa_pub.txt b/third_party/mbedtls/repo/programs/pkey/rsa_pub.txt
index 2c6d313..1e7ae0c 100644
--- a/third_party/mbedtls/repo/programs/pkey/rsa_pub.txt
+++ b/third_party/mbedtls/repo/programs/pkey/rsa_pub.txt
@@ -1,2 +1,2 @@
-N = A1D46FBA2318F8DCEF16C280948B1CF27966B9B47225ED2989F8D74B45BD36049C0AAB5AD0FF003553BA843C8E12782FC5873BB89A3DC84B883D25666CD22BF3ACD5B675969F8BEBFBCAC93FDD927C7442B178B10D1DFF9398E52316AAE0AF74E594650BDC3C670241D418684593CDA1A7B9DC4F20D2FDC6F66344074003E211
-E = 010001
+N = A1D46FBA2318F8DCEF16C280948B1CF27966B9B47225ED2989F8D74B45BD36049C0AAB5AD0FF003553BA843C8E12782FC5873BB89A3DC84B883D25666CD22BF3ACD5B675969F8BEBFBCAC93FDD927C7442B178B10D1DFF9398E52316AAE0AF74E594650BDC3C670241D418684593CDA1A7B9DC4F20D2FDC6F66344074003E211
+E = 010001
diff --git a/third_party/nlbuild-autotools/repo/.default-version b/third_party/nlbuild-autotools/repo/.default-version
index 99c026b..9494224 100644
--- a/third_party/nlbuild-autotools/repo/.default-version
+++ b/third_party/nlbuild-autotools/repo/.default-version
@@ -1 +1 @@
-1.6.11
+1.6.16
diff --git a/third_party/nlbuild-autotools/repo/.travis.yml b/third_party/nlbuild-autotools/repo/.travis.yml
new file mode 100644
index 0000000..f658937
--- /dev/null
+++ b/third_party/nlbuild-autotools/repo/.travis.yml
@@ -0,0 +1,36 @@
+#
+# Copyright 2019 Google LLC. All Rights Reserved.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+#
+# Description:
+# This file is the Travis CI hosted, distributed continuous
+# integration configuration file for nlbuild-autotools.
+#
+
+language: generic
+
+sudo: false
+
+os:
+ - linux
+ - osx
+
+# At present, simply ensure that several targets can be successfully built.
+
+script:
+ - make dist
+ - make tools
+ - make toolsdist
diff --git a/third_party/nlbuild-autotools/repo/CHANGES b/third_party/nlbuild-autotools/repo/CHANGES
index 39cdca3..c15255c 100644
--- a/third_party/nlbuild-autotools/repo/CHANGES
+++ b/third_party/nlbuild-autotools/repo/CHANGES
@@ -1,3 +1,27 @@
+1.6.16 (2020-01-23)
+
+ * Allow absolute paths in PRETTY_FILES.
+
+1.6.15 (2019-12-06)
+
+ * Remove redundant libtool m4 libraries.
+
+1.6.14 (2019-07-16)
+
+ * Update MANIFEST to ensure that 'make dist' works correctly.
+
+1.6.13 (2019-07-16)
+
+ * Update coreutils to a newer version s.t. they build cleanly
+ on linux systems with GLIBC 2.28 or newer. Remove the strip
+ from install libraries to allow coreutils to be installed on
+ Mac OS systems.
+
+1.6.12 (2019-06-11)
+
+ * install-headers target now depends on BUILT_SOURCES to
+ enable installation of generated headers
+
1.6.11 (2019-05-23)
* Changed the bootstrap shebang from sh to bash to address a
diff --git a/third_party/nlbuild-autotools/repo/MANIFEST b/third_party/nlbuild-autotools/repo/MANIFEST
index 9b0889c..eb87e88 100644
--- a/third_party/nlbuild-autotools/repo/MANIFEST
+++ b/third_party/nlbuild-autotools/repo/MANIFEST
@@ -1,5 +1,6 @@
.default-version
.gitignore
+.travis.yml
CHANGES
Common.mak
CONTRIBUTING.md
@@ -36,13 +37,29 @@
automake/pre/macros/verbosity.am
etc/lcov.config
examples/Doxyfile.in
+examples/Makefile-bootstrap
examples/Makefile-doc.am
-examples/Makefile-fps.am
examples/Makefile-src.am
examples/Makefile-tests.am
+examples/Makefile-third_party.am
examples/Makefile-toplevel.am
examples/bootstrap
examples/configure.ac
+examples/repos.conf
+make/host/tools.mak
+make/host/tools/bootstrap.mak
+make/host/tools/tools.mak
+make/post.mak
+make/post/rules.mak
+make/post/rules/bootstrap.mak
+make/post/rules/help.mak
+make/post/rules/repos.mak
+make/pre.mak
+make/pre/macros.mak
+make/pre/macros/git.mak
+make/pre/macros/repos.mak
+make/pre/macros/verbosity.mak
+make/pre/tools.mak
scripts/bootstrap
scripts/bootstrap-configure
scripts/mkskeleton
@@ -62,11 +79,6 @@
third_party/autoconf/m4/ax_jni_include_dir.m4
third_party/autoconf/m4/ax_prog_doxygen.m4
third_party/autoconf/m4/ax_pthread.m4
-third_party/autoconf/m4/libtool.m4
-third_party/autoconf/m4/ltoptions.m4
-third_party/autoconf/m4/ltsugar.m4
-third_party/autoconf/m4/ltversion.m4
-third_party/autoconf/m4/lt~obsolete.m4
third_party/autoconf/m4/pkg.m4
third_party/autoconf/missing
third_party/autoconf/mkinstalldirs
@@ -75,6 +87,8 @@
tools/Makefile
tools/packages/autoconf/autoconf.url
tools/packages/autoconf/autoconf.version
+tools/packages/automake/automake.patches/automake-00.description
+tools/packages/automake/automake.patches/automake-00.patch
tools/packages/automake/automake.url
tools/packages/automake/automake.version
tools/packages/build
@@ -84,6 +98,8 @@
tools/packages/libtool/libtool.version
tools/packages/m4/m4.url
tools/packages/m4/m4.version
+tools/packages/make/make.patches/make-00.patch
+tools/packages/make/make.patches/make-00.url
tools/packages/make/make.url
tools/packages/make/make.version
tools/packages/packages
diff --git a/third_party/nlbuild-autotools/repo/README.md b/third_party/nlbuild-autotools/repo/README.md
index 08f9696..9d1891d 100644
--- a/third_party/nlbuild-autotools/repo/README.md
+++ b/third_party/nlbuild-autotools/repo/README.md
@@ -1,6 +1,11 @@
Nest Labs Build - GNU Autotools
===============================
+[![Build Status][nlbuild-autotools-travis-svg]][nlbuild-autotools-travis]
+
+[nlbuild-autotools-travis]: https://travis-ci.org/nestlabs/nlbuild-autotools
+[nlbuild-autotools-travis-svg]: https://travis-ci.org/nestlabs/nlbuild-autotools.svg?branch=master
+
# Introduction
The Nest Labs Build - GNU Autotools (nlbuild-autotools) provides a
diff --git a/third_party/nlbuild-autotools/repo/automake/post/rules/headers.am b/third_party/nlbuild-autotools/repo/automake/post/rules/headers.am
index 41ed0c6..f459838 100644
--- a/third_party/nlbuild-autotools/repo/automake/post/rules/headers.am
+++ b/third_party/nlbuild-autotools/repo/automake/post/rules/headers.am
@@ -39,7 +39,7 @@
.PHONY: install-headers install-headers-recursive
-install-headers: install-headers-recursive
+install-headers: $(BUILT_SOURCES) install-headers-recursive
install-headers-recursive:
$(nl-make-subdirs)
diff --git a/third_party/nlbuild-autotools/repo/automake/post/rules/pretty.am b/third_party/nlbuild-autotools/repo/automake/post/rules/pretty.am
index 91ee603..5498a97 100644
--- a/third_party/nlbuild-autotools/repo/automake/post/rules/pretty.am
+++ b/third_party/nlbuild-autotools/repo/automake/post/rules/pretty.am
@@ -47,8 +47,8 @@
define nl-make-pretty
$(AM_V_at)for file in $(4); do \
$(1) \
- if test -f $${file}; then d=.; else d=$(srcdir); fi; \
- $(2) $(3) $${d}/$${file} \
+ if test -f $${file}; then d=; else d=$(srcdir)/; fi; \
+ $(2) $(3) $${d}$${file} \
|| exit 1; \
done
endef
diff --git a/third_party/nlbuild-autotools/repo/tools/packages/autoconf/autoconf.url b/third_party/nlbuild-autotools/repo/tools/packages/autoconf/autoconf.url
index 9be2ca5..8a6a2f3 100644
--- a/third_party/nlbuild-autotools/repo/tools/packages/autoconf/autoconf.url
+++ b/third_party/nlbuild-autotools/repo/tools/packages/autoconf/autoconf.url
@@ -1 +1 @@
-ftp://ftp.gnu.org/pub/gnu/autoconf/autoconf-2.68.tar.gz
+http://ftp.gnu.org/pub/gnu/autoconf/autoconf-2.68.tar.gz
diff --git a/third_party/nlbuild-autotools/repo/tools/packages/automake/automake.url b/third_party/nlbuild-autotools/repo/tools/packages/automake/automake.url
index f2b1411..667ea63 100644
--- a/third_party/nlbuild-autotools/repo/tools/packages/automake/automake.url
+++ b/third_party/nlbuild-autotools/repo/tools/packages/automake/automake.url
@@ -1 +1 @@
-ftp://ftp.gnu.org/pub/gnu/automake/automake-1.14.1.tar.gz
+http://ftp.gnu.org/pub/gnu/automake/automake-1.14.1.tar.gz
diff --git a/third_party/nlbuild-autotools/repo/tools/packages/build b/third_party/nlbuild-autotools/repo/tools/packages/build
index c464597..6386427 100755
--- a/third_party/nlbuild-autotools/repo/tools/packages/build
+++ b/third_party/nlbuild-autotools/repo/tools/packages/build
@@ -218,8 +218,8 @@
# Try to fetch the package using wget or curl
- fetch_url_with_command "${fetchdir}" "${url}" wget --quiet ||
- fetch_url_with_command "${fetchdir}" "${url}" curl --silent --remote-name
+ fetch_url_with_command "${fetchdir}" "${url}" wget --tries 4 --no-check-certificate --quiet ||
+ fetch_url_with_command "${fetchdir}" "${url}" curl --retry 4 --insecure --silent --remote-name
}
#
@@ -452,7 +452,7 @@
verbose " INSTALL ${package}"
- make V=${VERBOSE} -C "${builddir}" DESTDIR="${destdir}" install-strip || exit ${?}
+ make V=${VERBOSE} -C "${builddir}" DESTDIR="${destdir}" install || exit ${?}
# Remove any temporary files created.
diff --git a/third_party/nlbuild-autotools/repo/tools/packages/coreutils/coreutils.url b/third_party/nlbuild-autotools/repo/tools/packages/coreutils/coreutils.url
index de881be..d43fcea 100644
--- a/third_party/nlbuild-autotools/repo/tools/packages/coreutils/coreutils.url
+++ b/third_party/nlbuild-autotools/repo/tools/packages/coreutils/coreutils.url
@@ -1 +1 @@
-ftp://ftp.gnu.org/pub/gnu/coreutils/coreutils-8.21.tar.xz
+http://ftp.gnu.org/pub/gnu/coreutils/coreutils-8.31.tar.xz
diff --git a/third_party/nlbuild-autotools/repo/tools/packages/coreutils/coreutils.version b/third_party/nlbuild-autotools/repo/tools/packages/coreutils/coreutils.version
index 671d705..72b9b42 100644
--- a/third_party/nlbuild-autotools/repo/tools/packages/coreutils/coreutils.version
+++ b/third_party/nlbuild-autotools/repo/tools/packages/coreutils/coreutils.version
@@ -1 +1 @@
-8.21
+8.31
diff --git a/third_party/nlbuild-autotools/repo/tools/packages/libtool/libtool.url b/third_party/nlbuild-autotools/repo/tools/packages/libtool/libtool.url
index b3bb3c5..f3bc9fb 100644
--- a/third_party/nlbuild-autotools/repo/tools/packages/libtool/libtool.url
+++ b/third_party/nlbuild-autotools/repo/tools/packages/libtool/libtool.url
@@ -1 +1 @@
-ftp://ftp.gnu.org/pub/gnu/libtool/libtool-2.4.2.tar.gz
+http://ftp.gnu.org/pub/gnu/libtool/libtool-2.4.2.tar.gz
diff --git a/third_party/nlbuild-autotools/repo/tools/packages/m4/m4.url b/third_party/nlbuild-autotools/repo/tools/packages/m4/m4.url
index 27cfb6c..09eb869 100644
--- a/third_party/nlbuild-autotools/repo/tools/packages/m4/m4.url
+++ b/third_party/nlbuild-autotools/repo/tools/packages/m4/m4.url
@@ -1 +1 @@
-ftp://ftp.gnu.org/pub/gnu/m4/m4-1.4.5.tar.gz
+http://ftp.gnu.org/pub/gnu/m4/m4-1.4.5.tar.gz
diff --git a/third_party/nlbuild-autotools/repo/tools/packages/make/make.url b/third_party/nlbuild-autotools/repo/tools/packages/make/make.url
index 08e2870..b472eb9 100644
--- a/third_party/nlbuild-autotools/repo/tools/packages/make/make.url
+++ b/third_party/nlbuild-autotools/repo/tools/packages/make/make.url
@@ -1 +1 @@
-ftp://ftp.gnu.org/pub/gnu/make/make-4.1.tar.gz
+http://ftp.gnu.org/pub/gnu/make/make-4.1.tar.gz
diff --git a/third_party/silabs/.gitignore b/third_party/silabs/.gitignore
new file mode 100644
index 0000000..2ea6559
--- /dev/null
+++ b/third_party/silabs/.gitignore
@@ -0,0 +1 @@
+gecko_sdk_suite
diff --git a/third_party/silabs/Makefile.am b/third_party/silabs/Makefile.am
index 93ef8a6..68fefc7 100644
--- a/third_party/silabs/Makefile.am
+++ b/third_party/silabs/Makefile.am
@@ -29,121 +29,153 @@
include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
if OPENTHREAD_EXAMPLES_EFR32MG12
-lib_LIBRARIES = \
- libsilabs-efr32mg12-sdk.a \
+lib_LIBRARIES = \
+ libsilabs-efr32mg12-sdk.a \
+ $(NULL)
+endif
+
+if OPENTHREAD_EXAMPLES_EFR32MG13
+lib_LIBRARIES = \
+ libsilabs-efr32mg13-sdk.a \
$(NULL)
endif
if OPENTHREAD_EXAMPLES_EFR32MG21
-lib_LIBRARIES = \
- libsilabs-efr32mg21-sdk.a \
+lib_LIBRARIES = \
+ libsilabs-efr32mg21-sdk.a \
$(NULL)
endif
# Do not enable -Wconversion for Silicon Labs SDK sources
-override CFLAGS := $(filter-out -Wconversion,$(CFLAGS))
-override CXXFLAGS := $(filter-out -Wconversion,$(CXXFLAGS))
+override CFLAGS := $(filter-out -Wconversion,$(CFLAGS))
+override CXXFLAGS := $(filter-out -Wconversion,$(CXXFLAGS))
# Do not enable -pedantic-errors for Silicon Labs SDK sources
-override CFLAGS := $(filter-out -pedantic-errors,$(CFLAGS))
-override CXXFLAGS := $(filter-out -pedantic-errors,$(CXXFLAGS))
+override CFLAGS := $(filter-out -pedantic-errors,$(CFLAGS))
+override CXXFLAGS := $(filter-out -pedantic-errors,$(CXXFLAGS))
# Do not enable -Wshadow for Silicon Labs SDK sources
-override CFLAGS := $(filter-out -Wshadow,$(CFLAGS))
-override CXXFLAGS := $(filter-out -Wshadow,$(CXXFLAGS))
+override CFLAGS := $(filter-out -Wshadow,$(CFLAGS))
+override CXXFLAGS := $(filter-out -Wshadow,$(CXXFLAGS))
-EFR32_BOARD_DIR = $(shell echo $(BOARD) | tr A-Z a-z)
+EFR32_BOARD_DIR = $(shell echo $(BOARD) | tr A-Z a-z)
-EFR32MG_SDK_SRCDIR = $(top_srcdir)/third_party/silabs/gecko_sdk_suite/v2.6
+SDK_SRC_DIR = $(top_srcdir)/third_party/silabs/gecko_sdk_suite/v2.7
-COMMONCPPFLAGS = \
- -D__START=main \
- -D__STARTUP_CLEAR_BSS \
- -I$(srcdir) \
- -I$(top_srcdir)/include \
- -I$(top_srcdir)/src/core \
- -I$(top_srcdir)/third_party/silabs/rail_config \
- -I$(top_srcdir)/examples/platforms/efr32mg21/$(EFR32_BOARD_DIR) \
- -I$(EFR32MG_SDK_SRCDIR) \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/common \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/chip/efr32 \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/protocol/ieee802154 \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/chip/efr32/rf/common/cortex \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/hal \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/hal/efr32 \
- -I$(EFR32MG_SDK_SRCDIR)/platform/radio/rail_lib/plugin/pa-conversions \
- -I$(EFR32MG_SDK_SRCDIR)/hardware/kit/common/bsp \
- -I$(EFR32MG_SDK_SRCDIR)/platform/CMSIS/Include \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/common/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/gpiointerrupt/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/uartdrv/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/uartdrv/config \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/ustimer/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/dmadrv/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/dmadrv/config \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/rtcdrv/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/emlib/inc \
- -I$(EFR32MG_SDK_SRCDIR)/platform/halconfig/inc/hal-config \
- -I$(EFR32MG_SDK_SRCDIR)/util/plugin/plugin-common/fem-control \
- -Wno-unused-parameter \
- -Wno-missing-field-initializers \
+COMMONCPPFLAGS = \
+ -D__STARTUP_CLEAR_BSS \
+ -I$(srcdir) \
+ -I$(top_srcdir)/include \
+ -I$(top_srcdir)/src/core \
+ -I$(top_srcdir)/third_party/silabs/rail_config \
+ -I$(top_srcdir)/examples/platforms \
+ -I$(top_srcdir)/include \
+ -I$(top_srcdir)/src/core \
+ -I$(top_srcdir)/third_party/silabs/rail_config \
+ -I$(SDK_SRC_DIR) \
+ -I$(SDK_SRC_DIR)/hardware/kit/common/bsp \
+ -I$(SDK_SRC_DIR)/hardware/kit/common/drivers \
+ -I$(SDK_SRC_DIR)/platform/base/hal/micro/cortexm3/efm32 \
+ -I$(SDK_SRC_DIR)/platform/base/hal/micro/cortexm3/efm32/config \
+ -I$(SDK_SRC_DIR)/platform/common/inc \
+ -I$(SDK_SRC_DIR)/platform/CMSIS/Include \
+ -I$(SDK_SRC_DIR)/platform/emdrv/common/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/gpiointerrupt/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/uartdrv/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/uartdrv/config \
+ -I$(SDK_SRC_DIR)/platform/emdrv/ustimer/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/dmadrv/inc \
+ -I$(SDK_SRC_DIR)/platform/emdrv/dmadrv/config \
+ -I$(SDK_SRC_DIR)/platform/emlib/inc \
+ -I$(SDK_SRC_DIR)/platform/halconfig/inc/hal-config \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32/rf/common/cortex \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/common \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/hal \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/hal/efr32 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/protocol/ieee802154 \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/plugin/pa-conversions \
+ -I$(SDK_SRC_DIR)/platform/service/mpu/inc \
+ -I$(SDK_SRC_DIR)/platform/service/sleeptimer/config \
+ -I$(SDK_SRC_DIR)/platform/service/sleeptimer/inc \
+ -I$(SDK_SRC_DIR)/util/plugin/plugin-common/fem-control \
+ -I$(SDK_SRC_DIR)/util/third_party/mbedtls/sl_crypto/include \
+ -Wno-unused-parameter \
+ -Wno-missing-field-initializers \
$(NULL)
-SILABS_EFR32MG12_CPPFLAGS = \
- -I$(EFR32MG_SDK_SRCDIR)/hardware/kit/EFR32MG12_$(BOARD)/config \
- -I$(EFR32MG_SDK_SRCDIR)/platform/Device/SiliconLabs/EFR32MG12P/Include \
+SILABS_EFR32MG12_CPPFLAGS = \
+ -I$(SDK_SRC_DIR)/hardware/kit/EFR32MG12_$(BOARD)/config \
+ -I$(SDK_SRC_DIR)/platform/Device/SiliconLabs/EFR32MG12P/Include \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32/efr32xg1x \
$(NULL)
-SILABS_EFR32MG21_CPPFLAGS = \
- -I$(EFR32MG_SDK_SRCDIR)/hardware/kit/EFR32MG21_$(BOARD)/config \
- -I$(EFR32MG_SDK_SRCDIR)/platform/Device/SiliconLabs/EFR32MG21P/Include \
+SILABS_EFR32MG13_CPPFLAGS = \
+ -I$(SDK_SRC_DIR)/hardware/kit/EFR32MG13_$(BOARD)/config \
+ -I$(SDK_SRC_DIR)/platform/Device/SiliconLabs/EFR32MG13P/Include \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32/efr32xg1x \
$(NULL)
-SILABS_COMMON_SOURCES = \
- rail_config/rail_config.c \
- gecko_sdk_suite/v2.6/hardware/kit/common/bsp/bsp_bcc.c \
- gecko_sdk_suite/v2.6/hardware/kit/common/bsp/bsp_init.c \
- gecko_sdk_suite/v2.6/hardware/kit/common/bsp/bsp_stk.c \
- gecko_sdk_suite/v2.6/hardware/kit/common/bsp/bsp_stk_leds.c \
- gecko_sdk_suite/v2.6/platform/emdrv/dmadrv/src/dmadrv.c \
- gecko_sdk_suite/v2.6/platform/emdrv/gpiointerrupt/src/gpiointerrupt.c \
- gecko_sdk_suite/v2.6/platform/emdrv/rtcdrv/src/rtcdriver.c \
- gecko_sdk_suite/v2.6/platform/emdrv/uartdrv/src/uartdrv.c \
- gecko_sdk_suite/v2.6/platform/emdrv/ustimer/src/ustimer.c \
- gecko_sdk_suite/v2.6/platform/emlib/src/em_adc.c \
- gecko_sdk_suite/v2.6/platform/emlib/src/em_cmu.c \
- gecko_sdk_suite/v2.6/platform/emlib/src/em_core.c \
- gecko_sdk_suite/v2.6/platform/emlib/src/em_crypto.c \
- gecko_sdk_suite/v2.6/platform/emlib/src/em_emu.c \
- gecko_sdk_suite/v2.6/platform/emlib/src/em_gpio.c \
- gecko_sdk_suite/v2.6/platform/emlib/src/em_ldma.c \
- gecko_sdk_suite/v2.6/platform/emlib/src/em_leuart.c \
- gecko_sdk_suite/v2.6/platform/emlib/src/em_msc.c \
- gecko_sdk_suite/v2.6/platform/emlib/src/em_rmu.c \
- gecko_sdk_suite/v2.6/platform/emlib/src/em_rtcc.c \
- gecko_sdk_suite/v2.6/platform/emlib/src/em_system.c \
- gecko_sdk_suite/v2.6/platform/emlib/src/em_timer.c \
- gecko_sdk_suite/v2.6/platform/emlib/src/em_usart.c \
- gecko_sdk_suite/v2.6/platform/radio/rail_lib/hal/efr32/hal_efr.c \
- gecko_sdk_suite/v2.6/platform/radio/rail_lib/hal/hal_common.c \
- gecko_sdk_suite/v2.6/util/third_party/mbedtls/library/ecp.c \
- gecko_sdk_suite/v2.6/util/third_party/mbedtls/sl_crypto/src/crypto_aes.c \
- gecko_sdk_suite/v2.6/util/third_party/mbedtls/sl_crypto/src/crypto_ecp.c \
- gecko_sdk_suite/v2.6/util/third_party/mbedtls/sl_crypto/src/crypto_management.c \
+SILABS_EFR32MG21_CPPFLAGS = \
+ -I$(SDK_SRC_DIR)/hardware/kit/EFR32MG21_$(BOARD)/config \
+ -I$(SDK_SRC_DIR)/platform/Device/SiliconLabs/EFR32MG21P/Include \
+ -I$(SDK_SRC_DIR)/platform/radio/rail_lib/chip/efr32/efr32xg2x \
$(NULL)
-SILABS_EFR32MG12_SOURCES = \
- gecko_sdk_suite/v2.6/platform/Device/SiliconLabs/EFR32MG12P/Source/system_efr32mg12p.c \
- gecko_sdk_suite/v2.6/platform/Device/SiliconLabs/EFR32MG12P/Source/GCC/startup_efr32mg12p.c \
+SILABS_COMMON_SOURCES = \
+ rail_config/rail_config.c \
+ gecko_sdk_suite/v2.7/hardware/kit/common/bsp/bsp_bcc.c \
+ gecko_sdk_suite/v2.7/hardware/kit/common/bsp/bsp_init.c \
+ gecko_sdk_suite/v2.7/hardware/kit/common/bsp/bsp_stk.c \
+ gecko_sdk_suite/v2.7/hardware/kit/common/bsp/bsp_stk_leds.c \
+ gecko_sdk_suite/v2.7/platform/emdrv/dmadrv/src/dmadrv.c \
+ gecko_sdk_suite/v2.7/platform/emdrv/gpiointerrupt/src/gpiointerrupt.c \
+ gecko_sdk_suite/v2.7/platform/emdrv/uartdrv/src/uartdrv.c \
+ gecko_sdk_suite/v2.7/platform/emdrv/ustimer/src/ustimer.c \
+ gecko_sdk_suite/v2.7/platform/emlib/src/em_adc.c \
+ gecko_sdk_suite/v2.7/platform/emlib/src/em_cmu.c \
+ gecko_sdk_suite/v2.7/platform/emlib/src/em_core.c \
+ gecko_sdk_suite/v2.7/platform/emlib/src/em_crypto.c \
+ gecko_sdk_suite/v2.7/platform/emlib/src/em_emu.c \
+ gecko_sdk_suite/v2.7/platform/emlib/src/em_gpio.c \
+ gecko_sdk_suite/v2.7/platform/emlib/src/em_ldma.c \
+ gecko_sdk_suite/v2.7/platform/emlib/src/em_leuart.c \
+ gecko_sdk_suite/v2.7/platform/emlib/src/em_msc.c \
+ gecko_sdk_suite/v2.7/platform/emlib/src/em_rmu.c \
+ gecko_sdk_suite/v2.7/platform/emlib/src/em_rtcc.c \
+ gecko_sdk_suite/v2.7/platform/emlib/src/em_system.c \
+ gecko_sdk_suite/v2.7/platform/emlib/src/em_timer.c \
+ gecko_sdk_suite/v2.7/platform/emlib/src/em_usart.c \
+ gecko_sdk_suite/v2.7/platform/radio/rail_lib/hal/efr32/hal_efr.c \
+ gecko_sdk_suite/v2.7/platform/radio/rail_lib/hal/hal_common.c \
+ gecko_sdk_suite/v2.7/platform/service/mpu/src/sl_mpu.c \
+ gecko_sdk_suite/v2.7/platform/service/sleeptimer/src/sl_sleeptimer.c \
+ gecko_sdk_suite/v2.7/platform/service/sleeptimer/src/sl_sleeptimer_hal_rtcc.c \
+ gecko_sdk_suite/v2.7/util/third_party/mbedtls/library/ecp.c \
+ gecko_sdk_suite/v2.7/util/third_party/mbedtls/sl_crypto/src/crypto_aes.c \
+ gecko_sdk_suite/v2.7/util/third_party/mbedtls/sl_crypto/src/crypto_ecp.c \
+ gecko_sdk_suite/v2.7/util/third_party/mbedtls/sl_crypto/src/crypto_management.c \
+ $(NULL)
+
+SILABS_EFR32MG12_SOURCES = \
+ gecko_sdk_suite/v2.7/platform/Device/SiliconLabs/EFR32MG12P/Source/system_efr32mg12p.c \
+ gecko_sdk_suite/v2.7/platform/Device/SiliconLabs/EFR32MG12P/Source/GCC/startup_efr32mg12p.c \
+ $(NULL)
+
+SILABS_EFR32MG13_SOURCES = \
+ gecko_sdk_suite/v2.7/hardware/kit/common/drivers/mx25flash_spi.c \
+ gecko_sdk_suite/v2.7/hardware/kit/common/drivers/retargetserial.c \
+ gecko_sdk_suite/v2.7/platform/Device/SiliconLabs/EFR32MG13P/Source/system_efr32mg13p.c \
+ gecko_sdk_suite/v2.7//platform/Device/SiliconLabs/EFR32MG13P/Source/GCC/startup_efr32mg13p.c \
$(NULL)
SILABS_EFR32MG21_SOURCES = \
- gecko_sdk_suite/v2.6/platform/Device/SiliconLabs/EFR32MG21/Source/system_efr32mg21.c \
- gecko_sdk_suite/v2.6/platform/Device/SiliconLabs/EFR32MG21/Source/GCC/startup_efr32mg21.c \
- gecko_sdk_suite/v2.6/platform/emlib/src/em_se.c \
- gecko_sdk_suite/v2.6/util/third_party/mbedtls/sl_crypto/src/se_trng.c \
- gecko_sdk_suite/v2.6/util/third_party/mbedtls/sl_crypto/src/se_aes.c \
- gecko_sdk_suite/v2.6/util/third_party/mbedtls/sl_crypto/src/se_management.c \
+ gecko_sdk_suite/v2.7/platform/Device/SiliconLabs/EFR32MG21/Source/system_efr32mg21.c \
+ gecko_sdk_suite/v2.7/platform/Device/SiliconLabs/EFR32MG21/Source/GCC/startup_efr32mg21.c \
+ gecko_sdk_suite/v2.7/platform/emlib/src/em_se.c \
+ gecko_sdk_suite/v2.7/util/third_party/mbedtls/sl_crypto/src/se_trng.c \
+ gecko_sdk_suite/v2.7/util/third_party/mbedtls/sl_crypto/src/se_aes.c \
+ gecko_sdk_suite/v2.7/util/third_party/mbedtls/sl_crypto/src/se_management.c \
$(NULL)
libsilabs_efr32mg12_sdk_a_CPPFLAGS = \
@@ -156,6 +188,16 @@
$(SILABS_EFR32MG12_SOURCES) \
$(NULL)
+libsilabs_efr32mg13_sdk_a_CPPFLAGS = \
+ $(COMMONCPPFLAGS) \
+ $(SILABS_EFR32MG13_CPPFLAGS) \
+ $(NULL)
+
+libsilabs_efr32mg13_sdk_a_SOURCES = \
+ $(SILABS_COMMON_SOURCES) \
+ $(SILABS_EFR32MG13_SOURCES) \
+ $(NULL)
+
libsilabs_efr32mg21_sdk_a_CPPFLAGS = \
$(COMMONCPPFLAGS) \
$(SILABS_EFR32MG21_CPPFLAGS) \
diff --git a/third_party/silabs/rail_config/rail_config.c b/third_party/silabs/rail_config/rail_config.c
index 28be256..82ce3aa 100644
--- a/third_party/silabs/rail_config/rail_config.c
+++ b/third_party/silabs/rail_config/rail_config.c
@@ -159,8 +159,8 @@
.baseFrequency = 904000000,
.channelSpacing = 2000000,
.physicalChannelOffset = 0,
- .channelNumberStart = 0,
- .channelNumberEnd = 20,
+ .channelNumberStart = 1,
+ .channelNumberEnd = 10,
.maxPower = RAIL_TX_POWER_MAX,
.attr = &generated_entryAttr
},
diff --git a/third_party/ti/manifest_driverlib_cc13xx_cc26xx_3_xx_xx.html b/third_party/ti/manifest_driverlib_cc13xx_cc26xx_3_xx_xx.html
index 0afe2bc..9dd7c52 100644
--- a/third_party/ti/manifest_driverlib_cc13xx_cc26xx_3_xx_xx.html
+++ b/third_party/ti/manifest_driverlib_cc13xx_cc26xx_3_xx_xx.html
Binary files differ
diff --git a/third_party/ti/ti-openthread_1.01.0_manifest.html b/third_party/ti/ti-openthread_1.01.0_manifest.html
index 29c8329..d9508f9 100644
--- a/third_party/ti/ti-openthread_1.01.0_manifest.html
+++ b/third_party/ti/ti-openthread_1.01.0_manifest.html
Binary files differ
diff --git a/tools/harness-automation/autothreadharness/harness_case.py b/tools/harness-automation/autothreadharness/harness_case.py
index 62d6c9a..5cf8fa4 100644
--- a/tools/harness-automation/autothreadharness/harness_case.py
+++ b/tools/harness-automation/autothreadharness/harness_case.py
@@ -36,21 +36,15 @@
import time
import unittest
-from builtins import input
-from functools import reduce
-
from selenium import webdriver
from selenium.webdriver import ActionChains
from selenium.webdriver.support.ui import Select
from selenium.common.exceptions import UnexpectedAlertPresentException
from selenium.common.exceptions import NoSuchElementException
+from functools import reduce
from autothreadharness import settings
-from autothreadharness.exceptions import (
- FailError,
- FatalError,
- GoldenDeviceNotEnoughError,
-)
+from autothreadharness.exceptions import FailError, FatalError, GoldenDeviceNotEnoughError
from autothreadharness.harness_controller import HarnessController
from autothreadharness.helpers import HistoryHelper
from autothreadharness.open_thread_controller import OpenThreadController
@@ -160,24 +154,40 @@
auto_dut = settings.AUTO_DUT
"""bool: whether use harness auto dut feature"""
- timeout = (
- hasattr(settings, 'TIMEOUT') and settings.TIMEOUT or DEFAULT_TIMEOUT
- )
+ timeout = hasattr(settings, 'TIMEOUT') and settings.TIMEOUT or DEFAULT_TIMEOUT
"""number: timeout in seconds to stop running this test case"""
started = 0
"""number: test case started timestamp"""
+ case_need_shield = False
+ """bool: whether needs RF-box"""
+
+ device_order = []
+ """list: device drag order in TestHarness TestBed page"""
+
def __init__(self, *args, **kwargs):
self.dut = None
self._browser = None
self._hc = None
- self.result_dir = '%s\\%s' % (
- settings.OUTPUT_PATH,
- self.__class__.__name__,
- )
+ self.result_dir = '%s\\%s' % (settings.OUTPUT_PATH, self.__class__.__name__)
self.history = HistoryHelper()
self.add_all_devices = False
+ self.new_th = False
+
+ harness_info = ConfigParser.ConfigParser()
+ harness_info.read('%s\\info.ini' % settings.HARNESS_HOME)
+ if harness_info.has_option('Thread_Harness_Info', 'Version') and harness_info.has_option(
+ 'Thread_Harness_Info', 'Mode'
+ ):
+ harness_version = harness_info.get('Thread_Harness_Info', 'Version').rsplit(' ', 1)[1]
+ harness_mode = harness_info.get('Thread_Harness_Info', 'Mode')
+
+ if harness_mode == 'External' and harness_version > '1.4.0':
+ self.new_th = True
+
+ if harness_mode == 'Internal' and harness_version > '49.4':
+ self.new_th = True
super(HarnessCase, self).__init__(*args, **kwargs)
@@ -208,9 +218,7 @@
while True:
try:
- pdu = pdu_factory.create_pdu_controller(
- settings.PDU_CONTROLLER_TYPE
- )
+ pdu = pdu_factory.create_pdu_controller(settings.PDU_CONTROLLER_TYPE)
pdu.open(**settings.PDU_CONTROLLER_OPEN_PARAMS)
except EOFError:
logger.warning('Failed to connect to telnet')
@@ -240,32 +248,18 @@
time.sleep(2)
harness_config = ConfigParser.ConfigParser()
- harness_config.read(
- '%s\\Config\\Configuration.ini' % settings.HARNESS_HOME
- )
- if harness_config.has_option(
- 'THREAD_HARNESS_CONFIG', 'BrowserAutoNavigate'
- ) and harness_config.getboolean(
+ harness_config.read('%s\\Config\\Configuration.ini' % settings.HARNESS_HOME)
+ if harness_config.has_option('THREAD_HARNESS_CONFIG', 'BrowserAutoNavigate') and harness_config.getboolean(
'THREAD_HARNESS_CONFIG', 'BrowserAutoNavigate'
):
- logger.error(
- 'BrowserAutoNavigate in Configuration.ini should be False'
- )
- raise FailError(
- 'BrowserAutoNavigate in Configuration.ini should be False'
- )
+ logger.error('BrowserAutoNavigate in Configuration.ini should be False')
+ raise FailError('BrowserAutoNavigate in Configuration.ini should be False')
if settings.MIXED_DEVICE_TYPE:
if harness_config.has_option(
'THREAD_HARNESS_CONFIG', 'EnableDeviceSelection'
- ) and not harness_config.getboolean(
- 'THREAD_HARNESS_CONFIG', 'EnableDeviceSelection'
- ):
- logger.error(
- 'EnableDeviceSelection in Configuration.ini should be True'
- )
- raise FailError(
- 'EnableDeviceSelection in Configuration.ini should be True'
- )
+ ) and not harness_config.getboolean('THREAD_HARNESS_CONFIG', 'EnableDeviceSelection'):
+ logger.error('EnableDeviceSelection in Configuration.ini should be True')
+ raise FailError('EnableDeviceSelection in Configuration.ini should be True')
def _destroy_harness(self):
"""Stop harness backend service
@@ -299,37 +293,39 @@
2. ignore certificate errors and
3. always allow notifications.
"""
- chrome_options = webdriver.ChromeOptions()
- chrome_options.add_argument('--disable-extensions')
- chrome_options.add_argument('--disable-infobars')
- chrome_options.add_argument('--ignore-certificate-errors')
- chrome_options.add_experimental_option(
- 'prefs',
- {'profile.managed_default_content_settings.notifications': 1},
- )
+ try:
+ chrome_options = webdriver.ChromeOptions()
+ chrome_options.add_argument('--disable-extensions')
+ chrome_options.add_argument('--disable-infobars')
+ chrome_options.add_argument('--ignore-certificate-errors')
+ chrome_options.add_experimental_option(
+ 'prefs', {'profile.managed_default_content_settings.notifications': 1}
+ )
- browser = webdriver.Chrome(chrome_options=chrome_options)
- browser.set_page_load_timeout(10)
- browser.implicitly_wait(1)
- browser.maximize_window()
- browser.get(settings.HARNESS_URL)
- self._browser = browser
- if not wait_until(lambda: 'Thread' in browser.title, 30):
- self.assertIn('Thread', browser.title)
+ browser = webdriver.Chrome(chrome_options=chrome_options)
+ browser.set_page_load_timeout(20)
+ browser.implicitly_wait(1)
+ browser.maximize_window()
+ browser.get(settings.HARNESS_URL)
+ self._browser = browser
+ if not wait_until(lambda: 'Thread' in browser.title, 30):
+ self.assertIn('Thread', browser.title)
+ return True
+ except Exception as e:
+ logger.info('Init chrome error: {0}'.format(type(e).__name__))
+ return False
def _destroy_browser(self):
"""Close the browser.
"""
- self._browser.close()
+ if self._browser:
+ self._browser.close()
self._browser = None
def _init_rf_shield(self):
- if getattr(settings, 'SHIELD_CONTROLLER_TYPE', None) and getattr(
- settings, 'SHIELD_CONTROLLER_PARAMS', None
- ):
+ if getattr(settings, 'SHIELD_CONTROLLER_TYPE', None) and getattr(settings, 'SHIELD_CONTROLLER_PARAMS', None):
self.rf_shield = get_rf_shield_controller(
- shield_type=settings.SHIELD_CONTROLLER_TYPE,
- params=settings.SHIELD_CONTROLLER_PARAMS,
+ shield_type=settings.SHIELD_CONTROLLER_TYPE, params=settings.SHIELD_CONTROLLER_PARAMS
)
else:
self.rf_shield = None
@@ -347,20 +343,19 @@
logger.info('Setting up')
# clear files
- logger.info('Deleting all .pdf')
- os.system('del /q "%HOMEDRIVE%%HOMEPATH%\\Downloads\\NewPdf_*.pdf"')
- logger.info('Deleting all .xlsx')
- os.system(
- 'del /q "%HOMEDRIVE%%HOMEPATH%\\Downloads\\ExcelReport*.xlsx"'
- )
+
logger.info('Deleting all .pcapng')
os.system('del /q "%s\\Captures\\*.pcapng"' % settings.HARNESS_HOME)
+ logger.info('Empty files in Logs')
+ os.system('del /q "%s\\Logs\\*.*"' % settings.HARNESS_HOME)
# using temp files to fix excel downloading fail
- logger.info('Empty files in temps')
- os.system(
- 'del /q "%s\\Thread_Harness\\temp\\*.*"' % settings.HARNESS_HOME
- )
+ if self.new_th:
+ logger.info('Empty files in Reports')
+ os.system('del /q "%s\\Reports\\*.*"' % settings.HARNESS_HOME)
+ else:
+ logger.info('Empty files in temps')
+ os.system('del /q "%s\\Thread_Harness\\temp\\*.*"' % settings.HARNESS_HOME)
# create directory
os.system('mkdir %s' % self.result_dir)
@@ -389,10 +384,6 @@
if not self.started:
self.started = time.time()
- if time.time() - self.started > 5 * len(settings.GOLDEN_DEVICES):
- self._browser.refresh()
- return
-
# Detect Sniffer
try:
dialog = self._browser.find_element_by_id('capture-Setup-modal')
@@ -402,28 +393,20 @@
if dialog and dialog.get_attribute('aria-hidden') == 'false':
times = 100
while times:
- status = dialog.find_element_by_class_name(
- 'status-notify'
- ).text
+ status = dialog.find_element_by_class_name('status-notify').text
if 'Searching' in status:
logger.info('Still detecting..')
elif 'Not' in status:
logger.warning('Sniffer device not verified!')
- button = dialog.find_element_by_id(
- 'snifferAutoDetectBtn'
- )
+ button = dialog.find_element_by_id('snifferAutoDetectBtn')
button.click()
elif 'Verified' in status:
logger.info('Verified!')
- button = dialog.find_element_by_id(
- 'saveCaptureSettings'
- )
+ button = dialog.find_element_by_id('saveCaptureSettings')
button.click()
break
else:
- logger.warning(
- 'Unexpected sniffer verification status'
- )
+ logger.warning('Unexpected sniffer verification status')
times = times - 1
time.sleep(1)
@@ -459,22 +442,16 @@
button.click()
time.sleep(2)
- dialog = self._browser.find_element_by_id(
- 'general-Setup-modal'
- )
+ dialog = self._browser.find_element_by_id('general-Setup-modal')
if dialog.get_attribute('aria-hidden') != 'false':
raise Exception('Missing General Setup dialog')
- field = dialog.find_element_by_id(
- 'inp_general_child_update_wait_time'
- )
+ field = dialog.find_element_by_id('inp_general_child_update_wait_time')
field.clear()
if self.child_timeout:
field.send_keys(str(self.child_timeout))
- field = dialog.find_element_by_id(
- 'inp_general_sed_polling_rate'
- )
+ field = dialog.find_element_by_id('inp_general_sed_polling_rate')
field.clear()
if self.sed_polling_interval:
field.send_keys(str(self.sed_polling_interval))
@@ -531,9 +508,7 @@
selected_hw_num = len(selected_hw_set)
while selected_hw_num:
- remove_button = selected_hw_set[
- selected_hw_num - 1
- ].find_element_by_class_name('removeSelectedDevice')
+ remove_button = selected_hw_set[selected_hw_num - 1].find_element_by_class_name('removeSelectedDevice')
remove_button.click()
selected_hw_num = selected_hw_num - 1
@@ -541,21 +516,59 @@
device
for device in settings.GOLDEN_DEVICES
if not self.history.is_bad_golden_device(device[0])
- and not (
- settings.DUT_DEVICE and device[0] == settings.DUT_DEVICE[0]
- )
+ and not (settings.DUT_DEVICE and device[0] == settings.DUT_DEVICE[0])
]
- logger.info(
- 'Available golden devices: %s', json.dumps(devices, indent=2)
- )
+ logger.info('Available golden devices: %s', json.dumps(devices, indent=2))
+
+ shield_devices = [
+ shield_device
+ for shield_device in settings.SHIELD_GOLDEN_DEVICES
+ if not self.history.is_bad_golden_device(shield_device[0])
+ and not (settings.DUT2_DEVICE and shield_device[0] == settings.DUT2_DEVICE[0])
+ ]
+ logger.info('Available shield golden devices: %s', json.dumps(shield_devices, indent=2))
golden_devices_required = self.golden_devices_required
- # for test bed with mixed devices
+ dut_device = ()
+ if settings.DUT_DEVICE:
+ dut_device = settings.DUT_DEVICE
+
+ """check if test case needs to use RF-shield box and its device order in Testbed page
+ Two parameters case_need_shield & device_order should be set in the case script
+ according to the requires: https://openthread.io/certification/test-cases#rf_shielding
+ Example:
+ In case script leader_9_2_9.py:
+ case_need_shield = True
+ device_order = [('Router_2', False), ('Commissioner', True), ('Router_1', False), ('DUT', True)]
+ On the TestBed page of the Test Harness, the device sort order for Leader_9_2_9
+ should be like:
+ Router_2
+ Commissioner
+ Router_1
+ DUT
+ The ('Commissioner', True) and ('DUT', True) indicate Commissioner device and DUT2 device should
+ be in the RF-box and choose from SHIELD_GOLDEN_DEVICES and DUT2_DEVICE. Otherwise ('DUT', False) means
+ DUT device is not in RF-box and use DUT_DEVICE. The other roles devices with False should be selected
+ from GOLDEN_DEVICES.
+
+ In case script med_6_3_2.py:
+ case_need_shield = True
+ device_order = [] # or not defined
+ means no device drag order. DUT2_DEVICE should be applied as DUT and the other golden devices
+ are from GOLDEN_DEVICES.
+ """
+ if self.case_need_shield:
+ if not settings.DUT2_DEVICE:
+ logger.info('Must set DUT2_DEVICE')
+ raise FailError('DUT2_DEVICE must be set in settings.py')
+ if isinstance(self.device_order, list) and self.device_order:
+ logger.info('case %s devices ordered by %s ', self.case, self.device_order)
+ else:
+ logger.info('case %s uses %s as DUT', self.case, settings.DUT2_DEVICE)
+
+ # for test bed with multi-vendor devices
if settings.MIXED_DEVICE_TYPE:
- topo_file = (
- settings.HARNESS_HOME
- + "\\Thread_Harness\\TestScripts\\TopologyConfig.txt"
- )
+ topo_file = settings.HARNESS_HOME + "\\Thread_Harness\\TestScripts\\TopologyConfig.txt"
try:
f_topo = open(topo_file, 'r')
except IOError:
@@ -573,9 +586,7 @@
case_id = match_line.group(1)
if re.sub(r'\.', ' ', case_id) == self.case:
- logger.info(
- 'Get line by case %s: %s', case_id, topo_line
- )
+ logger.info('Get line by case %s: %s', case_id, topo_line)
topo_device_list = re.split(',', match_line.group(2))
for i in range(len(topo_device_list)):
topo_device = re.split(':', topo_device_list[i])
@@ -584,46 +595,120 @@
else:
continue
except Exception as e:
- logger.info(
- 'Get devices from topology config file error: %s', e
- )
+ logger.info('Get devices from topology config file error: %s', e)
raise GoldenDeviceNotEnoughError()
- logger.info(
- 'Golden devices in topology config file for case %s: %s',
- case_id,
- topo_mixed_devices,
- )
+ logger.info('Golden devices in topology config file for case %s: %s', case_id, topo_mixed_devices)
f_topo.close()
golden_device_candidates = []
missing_golden_devices = topo_mixed_devices[:]
- # mapping topology config devices with devices in settings
- for mixed_device_item in topo_mixed_devices:
- for device_item in devices:
- if mixed_device_item[1] == device_item[1]:
- golden_device_candidates.append(device_item)
- devices.remove(device_item)
- missing_golden_devices.remove(mixed_device_item)
- break
- logger.info(
- 'Golden devices in topology config file mapped in settings : %s',
- golden_device_candidates,
- )
- if len(topo_mixed_devices) != len(golden_device_candidates):
- device_dict = dict()
- for missing_device in missing_golden_devices:
- if missing_device[1] in device_dict:
- device_dict[missing_device[1]] += 1
- else:
- device_dict[missing_device[1]] = 1
- logger.info('Missing Devices: %s', device_dict)
- raise GoldenDeviceNotEnoughError()
- else:
+
+ # mapping topology config devices with golden devices by device order
+ if self.case_need_shield and self.device_order:
+ matched_dut = False
+ for device_order_item in self.device_order:
+ matched = False
+ for mixed_device_item in topo_mixed_devices:
+ # mapping device in device_order which needs to be shielded
+ if device_order_item[1]:
+ if 'DUT' in device_order_item[0]:
+ golden_device_candidates.append(settings.DUT2_DEVICE)
+ dut_device = settings.DUT2_DEVICE
+ matched_dut = True
+ matched = True
+ break
+ for device_item in shield_devices:
+ if (
+ device_order_item[0] == mixed_device_item[0]
+ and mixed_device_item[1] == device_item[1]
+ ):
+ golden_device_candidates.append(device_item)
+ shield_devices.remove(device_item)
+ matched = True
+ break
+ # mapping device in device_order which does not need to be shielded
+ else:
+ if 'DUT' in device_order_item[0]:
+ golden_device_candidates.append(settings.DUT_DEVICE)
+ matched_dut = True
+ matched = True
+ break
+ for device_item in devices:
+ if (
+ device_order_item[0] == mixed_device_item[0]
+ and mixed_device_item[1] == device_item[1]
+ ):
+ golden_device_candidates.append(device_item)
+ devices.remove(device_item)
+ matched = True
+ break
+ if not matched:
+ logger.info('Golden device not enough in : no %s', device_order_item)
+ raise GoldenDeviceNotEnoughError()
+ if not matched_dut:
+ raise FailError('Failed to find DUT in device_order')
devices = golden_device_candidates
- golden_devices_required = len(devices)
- logger.info(
- 'All case-needed golden devices: %s',
- json.dumps(devices, indent=2),
- )
+ self.add_all_devices = True
+ else:
+ for mixed_device_item in topo_mixed_devices:
+ for device_item in devices:
+ if mixed_device_item[1] == device_item[1]:
+ golden_device_candidates.append(device_item)
+ devices.remove(device_item)
+ missing_golden_devices.remove(mixed_device_item)
+ break
+ logger.info('Golden devices in topology config file mapped in settings : %s', golden_device_candidates)
+ if len(topo_mixed_devices) != len(golden_device_candidates):
+ device_dict = dict()
+ for missing_device in missing_golden_devices:
+ if missing_device[1] in device_dict:
+ device_dict[missing_device[1]] += 1
+ else:
+ device_dict[missing_device[1]] = 1
+ logger.info('Missing Devices: %s', device_dict)
+ raise GoldenDeviceNotEnoughError()
+ else:
+ devices = golden_device_candidates
+ golden_devices_required = len(devices)
+ logger.info('All case-needed golden devices: %s', json.dumps(devices, indent=2))
+ # for test bed with single vendor devices
+ else:
+ golden_device_candidates = []
+ if self.case_need_shield and self.device_order:
+ matched_dut = False
+ for device_order_item in self.device_order:
+ matched = False
+ # choose device which needs to be shielded
+ if device_order_item[1]:
+ if 'DUT' in device_order_item[0]:
+ golden_device_candidates.append(settings.DUT2_DEVICE)
+ dut_device = settings.DUT2_DEVICE
+ matched_dut = True
+ matched = True
+ else:
+ for device_item in shield_devices:
+ golden_device_candidates.append(device_item)
+ shield_devices.remove(device_item)
+ matched = True
+ break
+ # choose device which does not need to be shielded
+ else:
+ if 'DUT' in device_order_item[0]:
+ golden_device_candidates.append(settings.DUT_DEVICE)
+ matched_dut = True
+ matched = True
+ else:
+ for device_item in devices:
+ golden_device_candidates.append(device_item)
+ devices.remove(device_item)
+ matched = True
+ break
+ if not matched:
+ logger.info('Golden device not enough in : no %s', device_order_item)
+ raise GoldenDeviceNotEnoughError()
+ if not matched_dut:
+ raise FailError('Failed to find DUT in device_order')
+ devices = golden_device_candidates
+ self.add_all_devices = True
if self.auto_dut and not settings.DUT_DEVICE:
if settings.MIXED_DEVICE_TYPE:
@@ -635,63 +720,62 @@
raise GoldenDeviceNotEnoughError()
# add golden devices
- number_of_devices_to_add = (
- len(devices) if self.add_all_devices else golden_devices_required
- )
+ number_of_devices_to_add = len(devices) if self.add_all_devices else golden_devices_required
for i in range(number_of_devices_to_add):
self._add_device(*devices.pop())
# add DUT
- if settings.DUT_DEVICE:
- self._add_device(*settings.DUT_DEVICE)
+ if self.case_need_shield:
+ if not self.device_order:
+ self._add_device(*settings.DUT2_DEVICE)
+ else:
+ if settings.DUT_DEVICE:
+ self._add_device(*settings.DUT_DEVICE)
# enable AUTO DUT
if self.auto_dut:
- checkbox_auto_dut = browser.find_element_by_id(
- 'EnableAutoDutSelection'
- )
+ checkbox_auto_dut = browser.find_element_by_id('EnableAutoDutSelection')
if not checkbox_auto_dut.is_selected():
checkbox_auto_dut.click()
time.sleep(1)
if settings.DUT_DEVICE:
- radio_auto_dut = browser.find_element_by_class_name(
- 'AutoDUT_RadBtns'
- )
- if not radio_auto_dut.is_selected():
+ radio_auto_dut = browser.find_element_by_class_name('AutoDUT_RadBtns')
+ if not radio_auto_dut.is_selected() and not self.device_order:
radio_auto_dut.click()
+ if self.device_order:
+ selected_hw_set = test_bed.find_elements_by_class_name('selected-hw')
+ for selected_hw in selected_hw_set:
+ form_inputs = selected_hw.find_elements_by_tag_name('input')
+ form_port = form_inputs[0]
+ port = form_port.get_attribute('value').encode('utf8')
+ if port == dut_device[0]:
+ radio_auto_dut = selected_hw.find_element_by_class_name('AutoDUT_RadBtns')
+ if not radio_auto_dut.is_selected():
+ radio_auto_dut.click()
+
while True:
try:
self._connect_devices()
button_next = browser.find_element_by_id('nextBtn')
if not wait_until(
- lambda: 'disabled'
- not in button_next.get_attribute('class'),
+ lambda: 'disabled' not in button_next.get_attribute('class'),
times=(30 + 4 * number_of_devices_to_add),
):
bad_ones = []
- selected_hw_set = test_bed.find_elements_by_class_name(
- 'selected-hw'
- )
+ selected_hw_set = test_bed.find_elements_by_class_name('selected-hw')
for selected_hw in selected_hw_set:
- form_inputs = selected_hw.find_elements_by_tag_name(
- 'input'
- )
+ form_inputs = selected_hw.find_elements_by_tag_name('input')
form_port = form_inputs[0]
if form_port.is_enabled():
bad_ones.append(selected_hw)
for selected_hw in bad_ones:
- form_inputs = selected_hw.find_elements_by_tag_name(
- 'input'
- )
+ form_inputs = selected_hw.find_elements_by_tag_name('input')
form_port = form_inputs[0]
port = form_port.get_attribute('value').encode('utf8')
- if (
- settings.DUT_DEVICE
- and port == settings.DUT_DEVICE[0]
- ):
+ if port == dut_device[0]:
if settings.PDU_CONTROLLER_TYPE is None:
# connection error cannot recover without power
# cycling
@@ -704,9 +788,7 @@
self.history.mark_bad_golden_device(port)
# remove the bad one
- selected_hw.find_element_by_class_name(
- 'removeSelectedDevice'
- ).click()
+ selected_hw.find_element_by_class_name('removeSelectedDevice').click()
time.sleep(0.1)
if len(devices):
@@ -722,21 +804,14 @@
continue
if self.auto_dut and not settings.DUT_DEVICE:
- radio_auto_dut = browser.find_element_by_class_name(
- 'AutoDUT_RadBtns'
- )
+ radio_auto_dut = browser.find_element_by_class_name('AutoDUT_RadBtns')
if not radio_auto_dut.is_selected():
radio_auto_dut.click()
time.sleep(5)
button_next.click()
- if not wait_until(
- lambda: self._browser.current_url.endswith(
- 'TestExecution.html'
- ),
- 20,
- ):
+ if not wait_until(lambda: self._browser.current_url.endswith('TestExecution.html'), 20):
raise Exception('Failed to load TestExecution page')
except FailError:
raise
@@ -754,15 +829,8 @@
time.sleep(1)
checkbox = None
- wait_until(
- lambda: self._browser.find_elements_by_css_selector(
- '.tree-node .tree-title'
- )
- and True
- )
- elems = self._browser.find_elements_by_css_selector(
- '.tree-node .tree-title'
- )
+ wait_until(lambda: self._browser.find_elements_by_css_selector('.tree-node .tree-title') and True)
+ elems = self._browser.find_elements_by_css_selector('.tree-node .tree-title')
finder = re.compile(r'.*\b' + case + r'\b')
finder_dotted = re.compile(r'.*\b' + case.replace(' ', r'\.') + r'\b')
for elem in elems:
@@ -785,81 +853,21 @@
elem = self._browser.find_element_by_id('runTest')
elem.click()
- if not wait_until(
- lambda: self._browser.find_element_by_id('stopTest') and True, 10
- ):
+ if not wait_until(lambda: self._browser.find_element_by_id('stopTest') and True, 10):
raise Exception('Failed to start test case')
def _collect_result(self):
"""Collect test result.
- Generate PDF, excel and pcap file
+ Copy PDF and pcap file to result directory
"""
- # generate pdf
- self._browser.find_element_by_class_name('save-pdf').click()
- time.sleep(1)
- try:
- dialog = self._browser.find_element_by_id('Testinfo')
- except BaseException:
- logger.exception('Failed to get test info dialog.')
+
+ if self.new_th:
+ os.system('copy "%s\\Reports\\*.*" "%s"' % (settings.HARNESS_HOME, self.result_dir))
else:
- if dialog.get_attribute('aria-hidden') != 'false':
- raise Exception('Test information dialog not ready')
+ os.system('copy "%s\\Thread_Harness\\temp\\*.*" "%s"' % (settings.HARNESS_HOME, self.result_dir))
- version = (
- self.auto_dut and settings.DUT_VERSION or self.dut.version
- )
- dialog.find_element_by_id('inp_dut_manufacturer').send_keys(
- settings.DUT_MANUFACTURER
- )
- dialog.find_element_by_id('inp_dut_firmware_version').send_keys(
- version
- )
- dialog.find_element_by_id('inp_tester_name').send_keys(
- settings.TESTER_NAME
- )
- dialog.find_element_by_id('inp_remarks').send_keys(
- settings.TESTER_REMARKS
- )
- dialog.find_element_by_id('generatePdf').click()
-
- time.sleep(1)
- main_window = self._browser.current_window_handle
-
- # generate excel
- self._browser.find_element_by_class_name('save-excel').click()
- time.sleep(1)
- for window_handle in self._browser.window_handles:
- if window_handle != main_window:
- self._browser.switch_to.window(window_handle)
- self._browser.close()
- self._browser.switch_to.window(main_window)
-
- # save pcap
- self._browser.find_element_by_class_name('save-wireshark').click()
- time.sleep(1)
- for window_handle in self._browser.window_handles:
- if window_handle != main_window:
- self._browser.switch_to.window(window_handle)
- self._browser.close()
- self._browser.switch_to.window(main_window)
-
- os.system(
- 'copy "%%HOMEPATH%%\\Downloads\\NewPdf_*.pdf" %s\\'
- % self.result_dir
- )
- os.system(
- 'copy "%%HOMEPATH%%\\Downloads\\ExcelReport_*.xlsx" %s\\'
- % self.result_dir
- )
- os.system(
- 'copy "%s\\Captures\\*.pcapng" %s\\'
- % (settings.HARNESS_HOME, self.result_dir)
- )
- os.system(
- 'copy "%s\\Thread_Harness\\temp\\*.*" "%s"'
- % (settings.HARNESS_HOME, self.result_dir)
- )
+ os.system('copy "%s\\Captures\\*.pcapng" %s\\' % (settings.HARNESS_HOME, self.result_dir))
def _wait_dialog(self):
"""Wait for dialogs and handle them until done.
@@ -868,7 +876,7 @@
done = False
error = False
- logger.info("self timeout %d", self.timeout)
+ logger.info('self timeout %d', self.timeout)
while not done and self.timeout:
try:
dialog = self._browser.find_element_by_id('RemoteConfirm')
@@ -876,9 +884,7 @@
logger.exception('Failed to get dialog.')
else:
if dialog and dialog.get_attribute('aria-hidden') == 'false':
- title = dialog.find_element_by_class_name(
- 'modal-title'
- ).text
+ title = dialog.find_element_by_class_name('modal-title').text
time.sleep(1)
logger.info('Handling dialog[%s]', title)
@@ -912,25 +918,15 @@
if self.timeout % 10 == 0:
lines = self._hc.tail()
if 'SUCCESS: The process "dumpcap.exe" with PID ' in lines:
- logger.info(
- 'Tshark should be ended now, lets wait at most 30 seconds.'
- )
- if not wait_until(
- lambda: 'tshark.exe'
- not in subprocess.check_output('tasklist'),
- 30,
- ):
+ logger.info('Tshark should be ended now, lets wait at most 30 seconds.')
+ if not wait_until(lambda: 'tshark.exe' not in subprocess.check_output('tasklist'), 30):
res = subprocess.check_output(
- 'taskkill /t /f /im tshark.exe',
- stderr=subprocess.STDOUT,
- shell=True,
+ 'taskkill /t /f /im tshark.exe', stderr=subprocess.STDOUT, shell=True
)
logger.info(res)
# Wait until case really stopped
- wait_until(
- lambda: self._browser.find_element_by_id('runTest') and True, 30
- )
+ wait_until(lambda: self._browser.find_element_by_id('runTest') and True, 30)
if error:
raise FailError('Fail for previous exceptions')
@@ -967,9 +963,7 @@
self.dut.extpanid = settings.THREAD_EXTPANID
self.dut.start()
- elif title.startswith('MAC Address Required') or title.startswith(
- 'DUT Random Extended MAC Address Required'
- ):
+ elif title.startswith('MAC Address Required') or title.startswith('DUT Random Extended MAC Address Required'):
mac = self.dut.mac
inp = dialog.find_element_by_id('cnfrmInpText')
inp.clear()
@@ -979,9 +973,7 @@
ll64 = None
for addr in self.dut.addrs:
addr = addr.lower()
- if addr.startswith('fe80') and not re.match(
- '.+ff:fe00:[0-9a-f]{0,4}$', addr
- ):
+ if addr.startswith('fe80') and not re.match('.+ff:fe00:[0-9a-f]{0,4}$', addr):
ll64 = addr
break
@@ -1014,9 +1006,7 @@
elif title.startswith('ML64 Address'):
ml64 = None
for addr in self.dut.addrs:
- if addr.startswith('fd') and not re.match(
- '.+ff:fe00:[0-9a-f]{0,4}$', addr
- ):
+ if addr.startswith('fd') and not re.match('.+ff:fe00:[0-9a-f]{0,4}$', addr):
ml64 = addr
break
@@ -1028,23 +1018,19 @@
inp.clear()
inp.send_keys(ml64)
- elif title.startswith('Shield Devices') or title.startswith(
- 'Sheild DUT'
- ):
+ elif title.startswith('Shield Devices') or title.startswith('Shield DUT'):
+ time.sleep(2)
if self.rf_shield:
logger.info('Shielding devices')
with self.rf_shield:
self.rf_shield.shield()
elif self.dut and settings.SHIELD_SIMULATION:
- self.dut.channel = (
- self.channel == THREAD_CHANNEL_MAX and THREAD_CHANNEL_MIN
- ) or (self.channel + 1)
+ self.dut.channel = (self.channel == THREAD_CHANNEL_MAX and THREAD_CHANNEL_MIN) or (self.channel + 1)
else:
input('Shield DUT and press enter to continue..')
- elif title.startswith('Unshield Devices') or title.startswith(
- 'Bring DUT Back to network'
- ):
+ elif title.startswith('Unshield Devices') or title.startswith('Bring DUT back to network'):
+ time.sleep(5)
if self.rf_shield:
logger.info('Unshielding devices')
with self.rf_shield:
@@ -1058,10 +1044,7 @@
body = dialog.find_element_by_id('cnfrmMsg').text
body = body.split(': ')[1]
params = reduce(
- lambda params, param: params.update(
- ((param[0].strip(' '), param[1]),)
- )
- or params,
+ lambda params, param: params.update(((param[0].strip(' '), param[1]),)) or params,
[it.split('=') for it in body.split(', ')],
{},
)
@@ -1086,8 +1069,18 @@
return
logger.info('Testing role[%d] case[%s]', self.role, self.case)
+
+ init_browser_times = 5
+ while True:
+ if self._init_browser():
+ break
+ elif init_browser_times > 0:
+ init_browser_times -= 1
+ self._destroy_browser()
+ else:
+ raise SystemExit()
+
try:
- self._init_browser()
# prepare test case
while True:
url = self._browser.current_url
@@ -1113,7 +1106,7 @@
self._select_case(self.role, self.case)
- logger.info("start to wait test process end")
+ logger.info('start to wait test process end')
self._wait_dialog()
try:
diff --git a/tools/harness-automation/autothreadharness/harness_controller.py b/tools/harness-automation/autothreadharness/harness_controller.py
index b1dc19d..5f9ad4a 100644
--- a/tools/harness-automation/autothreadharness/harness_controller.py
+++ b/tools/harness-automation/autothreadharness/harness_controller.py
@@ -93,10 +93,7 @@
% (settings.HARNESS_HOME, settings.HARNESS_HOME),
)
- self.harness_file = '%s\\harness-%s.log' % (
- self.result_dir,
- time.strftime('%Y%m%d%H%M%S'),
- )
+ self.harness_file = '%s\\harness-%s.log' % (self.result_dir, time.strftime('%Y%m%d%H%M%S'))
with open(self.harness_file, 'w') as harness_out:
self.harness = subprocess.Popen(
[
@@ -116,11 +113,7 @@
if self.miniweb:
logger.warning('Miniweb already started')
else:
- with open(
- '%s\\miniweb-%s.log'
- % (self.result_dir, time.strftime('%Y%m%d%H%M%S')),
- 'w',
- ) as miniweb_out:
+ with open('%s\\miniweb-%s.log' % (self.result_dir, time.strftime('%Y%m%d%H%M%S')), 'w') as miniweb_out:
self.miniweb = subprocess.Popen(
[settings.HARNESS_HOME + '\\MiniWeb\\miniweb.exe'],
stdout=miniweb_out,
diff --git a/tools/harness-automation/autothreadharness/open_thread_controller.py b/tools/harness-automation/autothreadharness/open_thread_controller.py
index 92ec835..5bfda3a 100644
--- a/tools/harness-automation/autothreadharness/open_thread_controller.py
+++ b/tools/harness-automation/autothreadharness/open_thread_controller.py
@@ -95,9 +95,7 @@
def _connect(self):
logger.debug('My port is %s', self.port)
if self.port.startswith('NET'):
- portnum = settings.SER2NET_PORTBASE + int(
- self.port.split('NET')[1]
- )
+ portnum = settings.SER2NET_PORTBASE + int(self.port.split('NET')[1])
logger.debug('My port num is %d', portnum)
address = (settings.SER2NET_HOSTNAME, portnum)
self.handle = socket.create_connection(address)
@@ -109,9 +107,7 @@
self.handle.setblocking(0)
self._is_net = True
else:
- self.handle = serial.Serial(
- self.port, 115200, timeout=0, xonxoff=True
- )
+ self.handle = serial.Serial(self.port, 115200, timeout=0, xonxoff=True)
self._is_net = False
def _read(self, size=512):
diff --git a/tools/harness-automation/autothreadharness/pdu_controller.py b/tools/harness-automation/autothreadharness/pdu_controller.py
index 4deb6af..058a11c 100644
--- a/tools/harness-automation/autothreadharness/pdu_controller.py
+++ b/tools/harness-automation/autothreadharness/pdu_controller.py
@@ -33,22 +33,12 @@
import telnetlib
import time
-from builtins import input
-
try:
# python 2
- from urllib2 import (
- HTTPPasswordMgrWithDefaultRealm,
- HTTPBasicAuthHandler,
- build_opener,
- )
+ from urllib2 import HTTPPasswordMgrWithDefaultRealm, HTTPBasicAuthHandler, build_opener
except ImportError:
# python 3
- from urllib.request import (
- HTTPPasswordMgrWithDefaultRealm,
- HTTPBasicAuthHandler,
- build_opener,
- )
+ from urllib.request import HTTPPasswordMgrWithDefaultRealm, HTTPBasicAuthHandler, build_opener
logger = logging.getLogger(__name__)
@@ -188,9 +178,7 @@
boards_serial_numbers = params['boards_serial_numbers']
for serial_number in boards_serial_numbers:
- logger.info(
- 'Resetting board with the serial number: %s', serial_number
- )
+ logger.info('Resetting board with the serial number: %s', serial_number)
self._pin_reset(serial_number)
def close(self):
@@ -201,9 +189,7 @@
def open(self, **params):
self._base_url = 'http://{}/outs.cgi?out'.format(params['ip'])
password_manager = HTTPPasswordMgrWithDefaultRealm()
- password_manager.add_password(
- None, self._base_url, params['user'], params['pass']
- )
+ password_manager.add_password(None, self._base_url, params['user'], params['pass'])
authentication_handler = HTTPBasicAuthHandler(password_manager)
self._opener = build_opener(authentication_handler)
diff --git a/tools/harness-automation/autothreadharness/rf_shield_controller.py b/tools/harness-automation/autothreadharness/rf_shield_controller.py
index 40ad60f..e172654 100644
--- a/tools/harness-automation/autothreadharness/rf_shield_controller.py
+++ b/tools/harness-automation/autothreadharness/rf_shield_controller.py
@@ -74,7 +74,7 @@
return self._conn.write('{}\r\n'.format(data))
def _display_string(self, string):
- self._write('DIAGNOSTIC:DISPLAY \"{}\"'.format(string))
+ self._write('DIAGNOSTIC:DISPLAY "{}"'.format(string))
def __enter__(self):
self._conn = serial.Serial(self._port, 9600)
@@ -96,6 +96,4 @@
def get_rf_shield_controller(shield_type, params):
if shield_type in CONTROLLERS:
return CONTROLLERS[shield_type](**params)
- logger.exception(
- 'Unknown RF shield controller type: {}'.format(shield_type)
- )
+ logger.exception('Unknown RF shield controller type: {}'.format(shield_type))
diff --git a/tools/harness-automation/autothreadharness/runner.py b/tools/harness-automation/autothreadharness/runner.py
index 5276c8b..2b2c60a 100644
--- a/tools/harness-automation/autothreadharness/runner.py
+++ b/tools/harness-automation/autothreadharness/runner.py
@@ -28,6 +28,7 @@
#
+import ConfigParser
import argparse
import fnmatch
import logging
@@ -36,7 +37,6 @@
import sys
import time
import unittest
-from builtins import str
from collections import OrderedDict
from autothreadharness.harness_case import HarnessCase
@@ -50,23 +50,14 @@
logger.setLevel(logging.INFO)
-RESUME_SCRIPT_PATH = (
- '%appdata%\\Microsoft\\Windows\\Start Menu\\Programs\\'
- 'Startup\\continue_harness.bat'
-)
+RESUME_SCRIPT_PATH = "%appdata%\\Microsoft\\Windows\\Start Menu\\Programs\\" "Startup\\continue_harness.bat"
class SimpleTestResult(unittest.TestResult):
executions = 0
- def __init__(
- self,
- path,
- auto_reboot_args=None,
- keep_explorer=False,
- add_all_devices=False,
- ):
+ def __init__(self, path, auto_reboot_args=None, keep_explorer=False, add_all_devices=False):
"""Record test results in json file
Args:
@@ -96,26 +87,16 @@
test.auto_reboot = True
os.system(
'echo %s > "%s"'
- % (
- ' '.join(
- self.auto_reboot_args + ['-c', test.__class__.__name__]
- ),
- RESUME_SCRIPT_PATH,
- )
+ % (' '.join(self.auto_reboot_args + ['-c', test.__class__.__name__]), RESUME_SCRIPT_PATH)
)
# record start timestamp
self.started = time.strftime('%Y-%m-%dT%H:%M:%S')
os.system('mkdir %s' % test.result_dir)
- self.log_handler = logging.FileHandler(
- '%s\\auto-%s.log'
- % (test.result_dir, time.strftime('%Y%m%d%H%M%S'))
- )
+ self.log_handler = logging.FileHandler('%s\\auto-%s.log' % (test.result_dir, time.strftime('%Y%m%d%H%M%S')))
self.log_handler.setLevel(logging.DEBUG)
- self.log_handler.setFormatter(
- logging.Formatter('%(asctime)s %(levelname)s %(message)s')
- )
+ self.log_handler.setFormatter(logging.Formatter('%(asctime)s %(levelname)s %(message)s'))
logger.addHandler(self.log_handler)
def add_result(self, test, passed, error=None):
@@ -125,21 +106,21 @@
test (TestCase): The test just run
passed (bool): Whether the case is passed
"""
+ fails = self.result.get(test.__class__.__name__, {}).get('fails', 0)
+ if passed is False:
+ fails += 1
self.result[str(test.__class__.__name__)] = {
'started': self.started,
'stopped': time.strftime('%Y-%m-%dT%H:%M:%S'),
'passed': passed,
+ 'fails': fails,
'error': error,
'executions': SimpleTestResult.executions,
}
if self.auto_reboot_args:
os.system('del "%s"' % RESUME_SCRIPT_PATH)
- json.dump(
- OrderedDict(sorted(self.result.items(), key=lambda t: t[0])),
- open(self.path, 'w'),
- indent=2,
- )
+ json.dump(OrderedDict(sorted(self.result.items(), key=lambda t: t[0])), open(self.path, 'w'), indent=2)
# save logs
logger.removeHandler(self.log_handler)
@@ -180,11 +161,7 @@
"""List devices in settings file and print versions"""
if not names:
- names = [
- device
- for device, _type in settings.GOLDEN_DEVICES
- if _type == 'OpenThread'
- ]
+ names = [device for device, _type in settings.GOLDEN_DEVICES if _type == 'OpenThread']
if continue_from:
continue_from = names.index(continue_from)
@@ -230,11 +207,7 @@
if blacklist:
try:
- excludes = [
- line.strip('\n')
- for line in open(blacklist, 'r').readlines()
- if not line.startswith('#')
- ]
+ excludes = [line.strip('\n') for line in open(blacklist, 'r').readlines() if not line.startswith('#')]
except BaseException:
logger.exception('Failed to open test case black list file')
raise
@@ -252,11 +225,29 @@
log = {}
json.dump(log, open(result_file, 'w'), indent=2)
+ new_th = False
+ harness_info = ConfigParser.ConfigParser()
+ harness_info.read('%s\\info.ini' % settings.HARNESS_HOME)
+ if harness_info.has_option('Thread_Harness_Info', 'Version') and harness_info.has_option(
+ 'Thread_Harness_Info', 'Mode'
+ ):
+ harness_version = harness_info.get('Thread_Harness_Info', 'Version').rsplit(' ', 1)[1]
+ harness_mode = harness_info.get('Thread_Harness_Info', 'Mode')
+
+ if harness_mode == 'External' and harness_version > '1.4.0':
+ new_th = True
+
+ if harness_mode == 'Internal' and harness_version > '49.4':
+ new_th = True
+
suite = unittest.TestSuite()
- discovered = unittest.defaultTestLoader.discover('cases', pattern)
+ if new_th:
+ discovered = unittest.defaultTestLoader.discover('cases', pattern)
+ else:
+ discovered = unittest.defaultTestLoader.discover('cases_R140', pattern)
if names and continue_from:
- names = names[names.index(continue_from):]
+ names = names[names.index(continue_from) :]
for s1 in discovered:
for s2 in s1:
@@ -266,10 +257,7 @@
case_name = str(case.__class__.__name__)
# grep name
- if name_greps and not any(
- fnmatch.fnmatch(case_name, name_grep)
- for name_grep in name_greps
- ):
+ if name_greps and not any(fnmatch.fnmatch(case_name, name_grep) for name_grep in name_greps):
logger.info('case[%s] skipped by name greps', case_name)
continue
@@ -282,26 +270,16 @@
if case_name in log.keys():
if (
(log[case_name]['passed'] and ('p' in skip))
- or (
- log[case_name]['passed'] is False and ('f' in skip)
- )
+ or (log[case_name]['passed'] is False and ('f' in skip))
or (log[case_name]['passed'] is None and ('e' in skip))
):
- logger.warning(
- 'case[%s] skipped for its status[%s]',
- case_name,
- log[case_name]['passed'],
- )
+ logger.warning('case[%s] skipped for its status[%s]', case_name, log[case_name]['passed'])
continue
# continue from
if continue_from:
if continue_from != case_name:
- logger.warning(
- 'case[%s] skipped for continue from[%s]',
- case_name,
- continue_from,
- )
+ logger.warning('case[%s] skipped for continue from[%s]', case_name, continue_from)
continue
else:
continue_from = None
@@ -314,9 +292,7 @@
# max devices
if max_devices and case.golden_devices_required > max_devices:
logger.warning(
- 'case[%s] skipped for exceeding max golden devices allowed[%d]',
- case_name,
- max_devices,
+ 'case[%s] skipped for exceeding max golden devices allowed[%d]', case_name, max_devices
)
continue
@@ -340,7 +316,8 @@
auto_reboot_args = argv + names
else:
auto_reboot_args = None
- os.system('del "%s"' % RESUME_SCRIPT_PATH)
+ if os.path.isfile(RESUME_SCRIPT_PATH):
+ os.system('del "%s"' % RESUME_SCRIPT_PATH)
# manual reset
if manual_reset:
@@ -348,9 +325,7 @@
settings.PDU_CONTROLLER_OPEN_PARAMS = {}
settings.PDU_CONTROLLER_REBOOT_PARAMS = {}
- result = SimpleTestResult(
- result_file, auto_reboot_args, keep_explorer, add_all_devices
- )
+ result = SimpleTestResult(result_file, auto_reboot_args, keep_explorer, add_all_devices)
for case in suite:
logger.info(case.__class__.__name__)
@@ -362,96 +337,34 @@
def main():
- parser = argparse.ArgumentParser(
- description='Thread harness test case runner'
+ parser = argparse.ArgumentParser(description='Thread harness test case runner')
+ parser.add_argument(
+ '--auto-reboot', '-a', action='store_true', default=False, help='restart system when harness service die'
)
parser.add_argument(
- '--auto-reboot',
- '-a',
- action='store_true',
- default=False,
- help='restart system when harness service die',
+ 'names', metavar='NAME', type=str, nargs='*', default=None, help='test case name, omit to test all'
)
parser.add_argument(
- 'names',
- metavar='NAME',
- type=str,
- nargs='*',
- default=None,
- help='test case name, omit to test all',
+ '--blacklist', '-b', metavar='BLACKLIST_FILE', type=str, help='file to list test cases to skip', default=None
)
+ parser.add_argument('--continue-from', '-c', type=str, default=None, help='first case to test')
+ parser.add_argument('--delete-history', '-d', action='store_true', default=False, help='clear history on startup')
parser.add_argument(
- '--blacklist',
- '-b',
- metavar='BLACKLIST_FILE',
- type=str,
- help='file to list test cases to skip',
- default=None,
+ '--keep-explorer', '-e', action='store_true', default=False, help='do not restart explorer.exe at the end'
)
- parser.add_argument(
- '--continue-from',
- '-c',
- type=str,
- default=None,
- help='first case to test',
- )
- parser.add_argument(
- '--delete-history',
- '-d',
- action='store_true',
- default=False,
- help='clear history on startup',
- )
- parser.add_argument(
- '--keep-explorer',
- '-e',
- action='store_true',
- default=False,
- help='do not restart explorer.exe at the end',
- )
- parser.add_argument(
- '--name-greps',
- '-g',
- action='append',
- default=None,
- help='grep case by names',
- )
- parser.add_argument(
- '--list-file',
- '-i',
- type=str,
- default=None,
- help='file to list cases names to test',
- )
+ parser.add_argument('--name-greps', '-g', action='append', default=None, help='grep case by names')
+ parser.add_argument('--list-file', '-i', type=str, default=None, help='file to list cases names to test')
parser.add_argument(
'--skip',
'-k',
metavar='SKIP',
type=str,
- help='type of results to skip.' 'e for error, f for fail, p for pass.',
+ help='type of results to skip. e for error, f for fail, p for pass.',
default='',
)
- parser.add_argument(
- '--list-devices',
- '-l',
- action='store_true',
- default=False,
- help='list devices',
- )
- parser.add_argument(
- '--manual-reset',
- '-m',
- action='store_true',
- default=False,
- help='reset devices manually',
- )
- parser.add_argument(
- '--dry-run',
- '-n',
- action='store_true',
- default=False,
- help='just show what to run',
- )
+ parser.add_argument('--list-devices', '-l', action='store_true', default=False, help='list devices')
+ parser.add_argument('--manual-reset', '-m', action='store_true', default=False, help='reset devices manually')
+ parser.add_argument('--dry-run', '-n', action='store_true', default=False, help='just show what to run')
parser.add_argument(
'--result-file',
'-o',
@@ -460,44 +373,19 @@
help='file to store and read current status',
)
parser.add_argument(
- '--pattern',
- '-p',
- metavar='PATTERN',
- type=str,
- help='file name pattern, default to "*.py"',
- default='*.py',
+ '--pattern', '-p', metavar='PATTERN', type=str, help='file name pattern, default to "*.py"', default='*.py'
)
+ parser.add_argument('--rerun-fails', '-r', type=int, default=0, help='number of times to rerun failed test cases')
parser.add_argument(
- '--rerun-fails',
- '-r',
- type=int,
- default=0,
- help='number of times to rerun failed test cases',
+ '--add-all-devices', '-t', action='store_true', default=False, help='add all devices to the test bed'
)
- parser.add_argument(
- '--add-all-devices',
- '-t',
- action='store_true',
- default=False,
- help='add all devices to the test bed',
- )
- parser.add_argument(
- '--max-devices',
- '-u',
- type=int,
- default=0,
- help='max golden devices allowed',
- )
+ parser.add_argument('--max-devices', '-u', type=int, default=0, help='max golden devices allowed')
args = vars(parser.parse_args())
if args['list_file']:
try:
- names = [
- line.strip('\n')
- for line in open(args['list_file'], 'r').readlines()
- if not line.startswith('#')
- ]
+ names = [line.strip('\n') for line in open(args['list_file'], 'r').readlines() if not line.startswith('#')]
except BaseException:
logger.exception('Failed to open test case list file')
raise
@@ -515,11 +403,7 @@
if rerun_fails > 0:
for i in range(rerun_fails):
- failed_names = {
- name
- for name in result.result
- if result.result[name]['passed'] is False
- }
+ failed_names = {name for name in result.result if result.result[name]['passed'] is False}
if not failed_names:
break
logger.info('Rerunning failed test cases')
diff --git a/tools/harness-automation/autothreadharness/settings_sample.py b/tools/harness-automation/autothreadharness/settings_sample.py
index 92f4d20..6ac25ce 100644
--- a/tools/harness-automation/autothreadharness/settings_sample.py
+++ b/tools/harness-automation/autothreadharness/settings_sample.py
@@ -33,10 +33,14 @@
DUT_DEVICE = ('COM16', 'OpenThread')
"""(str, str): The first element is serial port of the DUT, and the second is
-the device type. This must be set if AUTO_DUT=False."""
+the device type."""
+
+DUT2_DEVICE = ('COM18', 'OpenThread')
+"""(str, str): The first element is serial port of the DUT, and the second is
+the device type. DUT in RF-box for RF-shield needed cases."""
DUT_VERSION = 'g12345'
-"""str: Version of DUT, must be set if AUTO_DUT=False."""
+"""str: Version of DUT"""
DUT_MANUFACTURER = 'Open Thread'
"""str: Manufacturer of the DUT"""
@@ -60,7 +64,7 @@
"""int: SED polling interval in seconds. Set to 0 to use Harness's default value."""
HARNESS_HOME = 'C:\\GRL\\Thread1.1'
-r"""str: Harness installation path, e.g. ``C:\GRL\Thread1.1``"""
+"""str: Harness installation path, e.g. 'C:\\GRL\\Thread1.1'"""
HARNESS_URL = 'http://127.0.0.1:8000'
"""str: Harness front-end url"""
@@ -72,12 +76,29 @@
"""str: Any comments in the final PDF"""
GOLDEN_DEVICES = []
-"""[(str, str)]: devices list.
+"""[(str, str)]: golden device list.
+It is a port and vendor pair list like [('COM1', 'OpenThread'), ('COM2', 'ARM')] for over-the-air golden devices
+connected to Windows. For OpenThread golden devices, ser2net is also supported by using IP:PORT as the port
+like ('192.168.1.2:5001', 'OpenThread').
+"""
-It should be something like [('COM1', 'OpenThread'), ('COM2', 'ARM')] for devices connected to Windows.
+SHIELD_GOLDEN_DEVICES = []
+"""[(str, str)]: shielded golden device list.
+It is a port and vendor pair list like [('COM1', 'OpenThread'), ('COM2', 'ARM')] for shielded golden devices
+connected to Windows. For OpenThread golden devices, ser2net is also supported by using IP:PORT as the port
+like ('192.168.1.2:5001', 'OpenThread').
-For OpenThread golden devices, ser2net is also supported, just use IP:PORT for the name. For example,
-('192.168.1.2:5001', 'OpenThread').
+For current topology, maximal common Leader and Commissioner devices for case 9.2.9 and 9.2.10 should be put
+into the RF-box besides DUT2_DEVICE.
+
+Example for CV testbed, 2 conformance devices should be put into the RF-box and listed here.
+
+Example for IV testbed using TopologyConfig_20180907b.txt, 1 OpenThread, 1 ARM and 1 SiLabs devices should be
+put into the RF-box and listed here.
+
+Example for IV testbed using TopologyConfig_20180907cK.txt, 1 OpenThread and 2 ARM devices should be put into
+the RF-box and listed here.
+
"""
MIXED_DEVICE_TYPE = True
diff --git a/tools/harness-automation/cases/border_7_1_1.py b/tools/harness-automation/cases/border_7_1_1.py
new file mode 100644
index 0000000..8b221a1
--- /dev/null
+++ b/tools/harness-automation/cases/border_7_1_1.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Border_7_1_1(HarnessCase):
+ role = HarnessCase.ROLE_BORDER
+ case = '7 1 1'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases/border_7_1_2.py b/tools/harness-automation/cases/border_7_1_2.py
new file mode 100644
index 0000000..d1d056a
--- /dev/null
+++ b/tools/harness-automation/cases/border_7_1_2.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Border_7_1_2(HarnessCase):
+ role = HarnessCase.ROLE_BORDER
+ case = '7 1 2'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases/border_7_1_3.py b/tools/harness-automation/cases/border_7_1_3.py
new file mode 100644
index 0000000..9de68b5
--- /dev/null
+++ b/tools/harness-automation/cases/border_7_1_3.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Border_7_1_3(HarnessCase):
+ role = HarnessCase.ROLE_BORDER
+ case = '7 1 3'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases/border_7_1_4.py b/tools/harness-automation/cases/border_7_1_4.py
new file mode 100644
index 0000000..00ecfcb
--- /dev/null
+++ b/tools/harness-automation/cases/border_7_1_4.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Border_7_1_4(HarnessCase):
+ role = HarnessCase.ROLE_BORDER
+ case = '7 1 4'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases/border_7_1_5.py b/tools/harness-automation/cases/border_7_1_5.py
new file mode 100644
index 0000000..f77fdb8
--- /dev/null
+++ b/tools/harness-automation/cases/border_7_1_5.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Border_7_1_5(HarnessCase):
+ role = HarnessCase.ROLE_BORDER
+ case = '7 1 5'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases/border_7_1_6.py b/tools/harness-automation/cases/border_7_1_6.py
new file mode 100644
index 0000000..81b60a6
--- /dev/null
+++ b/tools/harness-automation/cases/border_7_1_6.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Border_7_1_6(HarnessCase):
+ role = HarnessCase.ROLE_BORDER
+ case = '7 1 6'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases/border_7_1_7.py b/tools/harness-automation/cases/border_7_1_7.py
new file mode 100644
index 0000000..a37674b
--- /dev/null
+++ b/tools/harness-automation/cases/border_7_1_7.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Border_7_1_7(HarnessCase):
+ role = HarnessCase.ROLE_BORDER
+ case = '7 1 7'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases/border_7_1_8.py b/tools/harness-automation/cases/border_7_1_8.py
new file mode 100644
index 0000000..c56fe81
--- /dev/null
+++ b/tools/harness-automation/cases/border_7_1_8.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Border_7_1_8(HarnessCase):
+ role = HarnessCase.ROLE_BORDER
+ case = '7 1 8'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases/commissioner_8_3_1.py b/tools/harness-automation/cases/commissioner_8_3_1.py
index 385e627..26eef23 100644
--- a/tools/harness-automation/cases/commissioner_8_3_1.py
+++ b/tools/harness-automation/cases/commissioner_8_3_1.py
@@ -36,7 +36,7 @@
class Commissioner_8_3_1(HarnessCase):
role = HarnessCase.ROLE_COMMISSIONER
case = '8 3 1'
- golden_devices_required = 2
+ golden_devices_required = 1
def on_dialog(self, dialog, title):
pass
diff --git a/tools/harness-automation/cases/leader_5_5_3.py b/tools/harness-automation/cases/leader_5_5_3.py
index 70cccb2..07eb2fe 100644
--- a/tools/harness-automation/cases/leader_5_5_3.py
+++ b/tools/harness-automation/cases/leader_5_5_3.py
@@ -36,7 +36,7 @@
class Leader_5_5_3(HarnessCase):
role = HarnessCase.ROLE_LEADER
case = '5 5 3'
- golden_devices_required = 5
+ golden_devices_required = 4
def on_dialog(self, dialog, title):
if title.startswith('Reset DUT'):
diff --git a/tools/harness-automation/cases/leader_5_5_4.py b/tools/harness-automation/cases/leader_5_5_4.py
index e04bbca..0547e7a 100644
--- a/tools/harness-automation/cases/leader_5_5_4.py
+++ b/tools/harness-automation/cases/leader_5_5_4.py
@@ -36,7 +36,7 @@
class Leader_5_5_4(HarnessCase):
role = HarnessCase.ROLE_LEADER
case = '5 5 4'
- golden_devices_required = 5
+ golden_devices_required = 4
def on_dialog(self, dialog, title):
if title.startswith('Reset DUT'):
diff --git a/tools/harness-automation/cases/leader_5_8_4.py b/tools/harness-automation/cases/leader_5_8_4.py
index ae08033..12c984c 100644
--- a/tools/harness-automation/cases/leader_5_8_4.py
+++ b/tools/harness-automation/cases/leader_5_8_4.py
@@ -36,7 +36,7 @@
class Leader_5_8_4(HarnessCase):
role = HarnessCase.ROLE_LEADER
case = '5 8 4'
- golden_devices_required = 4
+ golden_devices_required = 3
def on_dialog(self, dialog, title):
pass
diff --git a/tools/harness-automation/cases/leader_7_1_6.py b/tools/harness-automation/cases/leader_7_1_6.py
deleted file mode 100755
index 96a3e7e..0000000
--- a/tools/harness-automation/cases/leader_7_1_6.py
+++ /dev/null
@@ -1,45 +0,0 @@
-#!/usr/bin/env python
-#
-# Copyright (c) 2018, The OpenThread Authors.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# 1. Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# 3. Neither the name of the copyright holder nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
-# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-
-
-from autothreadharness.harness_case import HarnessCase
-import unittest
-
-
-class Leader_7_1_6(HarnessCase):
- role = HarnessCase.ROLE_LEADER
- case = '7 1 6'
- golden_devices_required = 4
-
- def on_dialog(self, dialog, title):
- pass
-
-
-if __name__ == '__main__':
- unittest.main()
diff --git a/tools/harness-automation/cases/leader_7_1_7.py b/tools/harness-automation/cases/leader_7_1_7.py
deleted file mode 100755
index 30f6a5d..0000000
--- a/tools/harness-automation/cases/leader_7_1_7.py
+++ /dev/null
@@ -1,45 +0,0 @@
-#!/usr/bin/env python
-#
-# Copyright (c) 2018, The OpenThread Authors.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-# 1. Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-# 3. Neither the name of the copyright holder nor the
-# names of its contributors may be used to endorse or promote products
-# derived from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
-# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-
-
-from autothreadharness.harness_case import HarnessCase
-import unittest
-
-
-class Leader_7_1_7(HarnessCase):
- role = HarnessCase.ROLE_LEADER
- case = '7 1 7'
- golden_devices_required = 4
-
- def on_dialog(self, dialog, title):
- pass
-
-
-if __name__ == '__main__':
- unittest.main()
diff --git a/tools/harness-automation/cases/leader_8_3_1.py b/tools/harness-automation/cases/leader_8_3_1.py
index 35a3402..8e3edf1 100644
--- a/tools/harness-automation/cases/leader_8_3_1.py
+++ b/tools/harness-automation/cases/leader_8_3_1.py
@@ -36,7 +36,7 @@
class Leader_8_3_1(HarnessCase):
role = HarnessCase.ROLE_LEADER
case = '8 3 1'
- golden_devices_required = 2
+ golden_devices_required = 1
def on_dialog(self, dialog, title):
pass
diff --git a/tools/harness-automation/cases/leader_9_2_18.py b/tools/harness-automation/cases/leader_9_2_18.py
index 4677d75..2a549df 100644
--- a/tools/harness-automation/cases/leader_9_2_18.py
+++ b/tools/harness-automation/cases/leader_9_2_18.py
@@ -36,7 +36,7 @@
class Leader_9_2_18(HarnessCase):
role = HarnessCase.ROLE_LEADER
case = '9 2 18'
- golden_devices_required = 5
+ golden_devices_required = 4
def on_dialog(self, dialog, title):
pass
diff --git a/tools/harness-automation/cases/leader_9_2_9.py b/tools/harness-automation/cases/leader_9_2_9.py
index 8749fd7..2fa91a2 100644
--- a/tools/harness-automation/cases/leader_9_2_9.py
+++ b/tools/harness-automation/cases/leader_9_2_9.py
@@ -37,6 +37,8 @@
role = HarnessCase.ROLE_LEADER
case = '9 2 9'
golden_devices_required = 3
+ case_need_shield = True
+ device_order = [('Router_2', False), ('Commissioner', True), ('Router_1', False), ('DUT', True)]
def on_dialog(self, dialog, title):
pass
diff --git a/tools/harness-automation/cases/med_6_2_1.py b/tools/harness-automation/cases/med_6_2_1.py
new file mode 100644
index 0000000..6599b77
--- /dev/null
+++ b/tools/harness-automation/cases/med_6_2_1.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class MED_6_2_1(HarnessCase):
+ role = HarnessCase.ROLE_MED
+ case = '6 2 1'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases/med_6_2_2.py b/tools/harness-automation/cases/med_6_2_2.py
new file mode 100644
index 0000000..973a8c4
--- /dev/null
+++ b/tools/harness-automation/cases/med_6_2_2.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class MED_6_2_2(HarnessCase):
+ role = HarnessCase.ROLE_MED
+ case = '6 2 2'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases/med_6_3_2.py b/tools/harness-automation/cases/med_6_3_2.py
index d5fe42e..676a676 100644
--- a/tools/harness-automation/cases/med_6_3_2.py
+++ b/tools/harness-automation/cases/med_6_3_2.py
@@ -37,6 +37,7 @@
role = HarnessCase.ROLE_MED
case = '6 3 2'
golden_devices_required = 1
+ case_need_shield = True
def on_dialog(self, dialog, title):
pass
diff --git a/tools/harness-automation/cases/med_9_2_10.py b/tools/harness-automation/cases/med_9_2_10.py
index faaa3aa..9153669 100644
--- a/tools/harness-automation/cases/med_9_2_10.py
+++ b/tools/harness-automation/cases/med_9_2_10.py
@@ -37,6 +37,8 @@
role = HarnessCase.ROLE_MED
case = '9 2 10'
golden_devices_required = 4
+ case_need_shield = True
+ device_order = [('SED_1', False), ('DUT', False), ('Router_1', False), ('Commissioner', True), ('Leader', True)]
def on_dialog(self, dialog, title):
pass
diff --git a/tools/harness-automation/cases/med_9_2_18.py b/tools/harness-automation/cases/med_9_2_18.py
index 6831ac0..3c17bb8 100644
--- a/tools/harness-automation/cases/med_9_2_18.py
+++ b/tools/harness-automation/cases/med_9_2_18.py
@@ -36,7 +36,7 @@
class MED_9_2_18(HarnessCase):
role = HarnessCase.ROLE_MED
case = '9 2 18'
- golden_devices_required = 5
+ golden_devices_required = 4
def on_dialog(self, dialog, title):
pass
diff --git a/tools/harness-automation/cases/reed_5_6_7.py b/tools/harness-automation/cases/reed_5_6_7.py
index eca3eca..270fc1d 100644
--- a/tools/harness-automation/cases/reed_5_6_7.py
+++ b/tools/harness-automation/cases/reed_5_6_7.py
@@ -37,6 +37,7 @@
role = HarnessCase.ROLE_REED
case = '5 6 7'
golden_devices_required = 16
+ case_need_shield = True
def on_dialog(self, dialog, title):
pass
diff --git a/tools/harness-automation/cases/router_5_5_3.py b/tools/harness-automation/cases/router_5_5_3.py
index efad779..e2bfcd6 100644
--- a/tools/harness-automation/cases/router_5_5_3.py
+++ b/tools/harness-automation/cases/router_5_5_3.py
@@ -35,7 +35,7 @@
class Router_5_5_3(HarnessCase):
role = HarnessCase.ROLE_ROUTER
case = '5 5 3'
- golden_devices_required = 5
+ golden_devices_required = 4
def on_dialog(self, dialog, title):
pass
diff --git a/tools/harness-automation/cases/router_5_5_4.py b/tools/harness-automation/cases/router_5_5_4.py
index effcf09..d620448 100644
--- a/tools/harness-automation/cases/router_5_5_4.py
+++ b/tools/harness-automation/cases/router_5_5_4.py
@@ -35,7 +35,7 @@
class Router_5_5_4(HarnessCase):
role = HarnessCase.ROLE_ROUTER
case = '5 5 4'
- golden_devices_required = 5
+ golden_devices_required = 4
def on_dialog(self, dialog, title):
pass
diff --git a/tools/harness-automation/cases/router_5_7_1.py b/tools/harness-automation/cases/router_5_7_1.py
index 8e2f18f..760df76 100644
--- a/tools/harness-automation/cases/router_5_7_1.py
+++ b/tools/harness-automation/cases/router_5_7_1.py
@@ -36,7 +36,7 @@
class Router_5_7_1(HarnessCase):
role = HarnessCase.ROLE_ROUTER
case = '5 7 1'
- golden_devices_required = 4
+ golden_devices_required = 5
def on_dialog(self, dialog, title):
pass
diff --git a/tools/harness-automation/cases/router_9_2_10.py b/tools/harness-automation/cases/router_9_2_10.py
index bfe508d..c63cc34 100644
--- a/tools/harness-automation/cases/router_9_2_10.py
+++ b/tools/harness-automation/cases/router_9_2_10.py
@@ -37,6 +37,8 @@
role = HarnessCase.ROLE_ROUTER
case = '9 2 10'
golden_devices_required = 4
+ case_need_shield = True
+ device_order = [('SED_1', False), ('MED_1', False), ('DUT', False), ('Commissioner', True), ('Leader', True)]
def on_dialog(self, dialog, title):
pass
diff --git a/tools/harness-automation/cases/router_9_2_18.py b/tools/harness-automation/cases/router_9_2_18.py
index e0a8b16..edd44c5 100644
--- a/tools/harness-automation/cases/router_9_2_18.py
+++ b/tools/harness-automation/cases/router_9_2_18.py
@@ -36,7 +36,7 @@
class Router_9_2_18(HarnessCase):
role = HarnessCase.ROLE_ROUTER
case = '9 2 18'
- golden_devices_required = 5
+ golden_devices_required = 4
def on_dialog(self, dialog, title):
pass
diff --git a/tools/harness-automation/cases/router_9_2_9.py b/tools/harness-automation/cases/router_9_2_9.py
index 665f9fe..cc53ddc 100644
--- a/tools/harness-automation/cases/router_9_2_9.py
+++ b/tools/harness-automation/cases/router_9_2_9.py
@@ -37,6 +37,8 @@
role = HarnessCase.ROLE_ROUTER
case = '9 2 9'
golden_devices_required = 3
+ case_need_shield = True
+ device_order = [('Router_2', False), ('Commissioner', True), ('DUT', False), ('Leader', True)]
def on_dialog(self, dialog, title):
pass
diff --git a/tools/harness-automation/cases/sed_9_2_10.py b/tools/harness-automation/cases/sed_9_2_10.py
index b353220..3ca4953 100644
--- a/tools/harness-automation/cases/sed_9_2_10.py
+++ b/tools/harness-automation/cases/sed_9_2_10.py
@@ -37,6 +37,8 @@
role = HarnessCase.ROLE_SED
case = '9 2 10'
golden_devices_required = 4
+ case_need_shield = True
+ device_order = [('DUT', False), ('MED_1', False), ('Router_1', False), ('Commissioner', True), ('Leader', True)]
def on_dialog(self, dialog, title):
pass
diff --git a/tools/harness-automation/cases/sed_9_2_18.py b/tools/harness-automation/cases/sed_9_2_18.py
index ddbc169..800763d 100644
--- a/tools/harness-automation/cases/sed_9_2_18.py
+++ b/tools/harness-automation/cases/sed_9_2_18.py
@@ -36,7 +36,7 @@
class SED_9_2_18(HarnessCase):
role = HarnessCase.ROLE_SED
case = '9 2 18'
- golden_devices_required = 5
+ golden_devices_required = 4
def on_dialog(self, dialog, title):
pass
diff --git a/tools/harness-automation/cases_R140/__init__.py b/tools/harness-automation/cases_R140/__init__.py
new file mode 100755
index 0000000..df72755
--- /dev/null
+++ b/tools/harness-automation/cases_R140/__init__.py
@@ -0,0 +1,28 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
diff --git a/tools/harness-automation/cases_R140/commissioner_8_1_1.py b/tools/harness-automation/cases_R140/commissioner_8_1_1.py
new file mode 100755
index 0000000..32b09f7
--- /dev/null
+++ b/tools/harness-automation/cases_R140/commissioner_8_1_1.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Commissioner_8_1_1(HarnessCase):
+ role = HarnessCase.ROLE_COMMISSIONER
+ case = '8 1 1'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/commissioner_8_1_2.py b/tools/harness-automation/cases_R140/commissioner_8_1_2.py
new file mode 100755
index 0000000..f31177c
--- /dev/null
+++ b/tools/harness-automation/cases_R140/commissioner_8_1_2.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Commissioner_8_1_2(HarnessCase):
+ role = HarnessCase.ROLE_COMMISSIONER
+ case = '8 1 2'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/commissioner_8_1_6.py b/tools/harness-automation/cases_R140/commissioner_8_1_6.py
new file mode 100755
index 0000000..ab4d094
--- /dev/null
+++ b/tools/harness-automation/cases_R140/commissioner_8_1_6.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Commissioner_8_1_6(HarnessCase):
+ role = HarnessCase.ROLE_COMMISSIONER
+ case = '8 1 6'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/commissioner_8_2_1.py b/tools/harness-automation/cases_R140/commissioner_8_2_1.py
new file mode 100755
index 0000000..990f08a
--- /dev/null
+++ b/tools/harness-automation/cases_R140/commissioner_8_2_1.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Commissioner_8_2_1(HarnessCase):
+ role = HarnessCase.ROLE_COMMISSIONER
+ case = '8 2 1'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/commissioner_8_2_2.py b/tools/harness-automation/cases_R140/commissioner_8_2_2.py
new file mode 100755
index 0000000..5ada36a
--- /dev/null
+++ b/tools/harness-automation/cases_R140/commissioner_8_2_2.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Commissioner_8_2_2(HarnessCase):
+ role = HarnessCase.ROLE_COMMISSIONER
+ case = '8 2 2'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/commissioner_8_2_5.py b/tools/harness-automation/cases_R140/commissioner_8_2_5.py
new file mode 100755
index 0000000..a284b39
--- /dev/null
+++ b/tools/harness-automation/cases_R140/commissioner_8_2_5.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Commissioner_8_2_5(HarnessCase):
+ role = HarnessCase.ROLE_COMMISSIONER
+ case = '8 2 5'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/commissioner_8_3_1.py b/tools/harness-automation/cases_R140/commissioner_8_3_1.py
new file mode 100755
index 0000000..26eef23
--- /dev/null
+++ b/tools/harness-automation/cases_R140/commissioner_8_3_1.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Commissioner_8_3_1(HarnessCase):
+ role = HarnessCase.ROLE_COMMISSIONER
+ case = '8 3 1'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/commissioner_9_2_1.py b/tools/harness-automation/cases_R140/commissioner_9_2_1.py
new file mode 100755
index 0000000..a264e55
--- /dev/null
+++ b/tools/harness-automation/cases_R140/commissioner_9_2_1.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Commissioner_9_2_1(HarnessCase):
+ role = HarnessCase.ROLE_COMMISSIONER
+ case = '9 2 1'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/commissioner_9_2_14.py b/tools/harness-automation/cases_R140/commissioner_9_2_14.py
new file mode 100755
index 0000000..d090d47
--- /dev/null
+++ b/tools/harness-automation/cases_R140/commissioner_9_2_14.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Commissioner_9_2_14(HarnessCase):
+ role = HarnessCase.ROLE_COMMISSIONER
+ case = '9 2 14'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/commissioner_9_2_19.py b/tools/harness-automation/cases_R140/commissioner_9_2_19.py
new file mode 100755
index 0000000..073d37f
--- /dev/null
+++ b/tools/harness-automation/cases_R140/commissioner_9_2_19.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Commissioner_9_2_19(HarnessCase):
+ role = HarnessCase.ROLE_COMMISSIONER
+ case = '9 2 19'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/commissioner_9_2_2.py b/tools/harness-automation/cases_R140/commissioner_9_2_2.py
new file mode 100755
index 0000000..7ea4ab5
--- /dev/null
+++ b/tools/harness-automation/cases_R140/commissioner_9_2_2.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Commissioner_9_2_2(HarnessCase):
+ role = HarnessCase.ROLE_COMMISSIONER
+ case = '9 2 2'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/commissioner_9_2_3.py b/tools/harness-automation/cases_R140/commissioner_9_2_3.py
new file mode 100755
index 0000000..e13cae2
--- /dev/null
+++ b/tools/harness-automation/cases_R140/commissioner_9_2_3.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Commissioner_9_2_3(HarnessCase):
+ role = HarnessCase.ROLE_COMMISSIONER
+ case = '9 2 3'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/commissioner_9_2_4.py b/tools/harness-automation/cases_R140/commissioner_9_2_4.py
new file mode 100755
index 0000000..9d46c6e
--- /dev/null
+++ b/tools/harness-automation/cases_R140/commissioner_9_2_4.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Commissioner_9_2_4(HarnessCase):
+ role = HarnessCase.ROLE_COMMISSIONER
+ case = '9 2 4'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/ed_6_1_1.py b/tools/harness-automation/cases_R140/ed_6_1_1.py
new file mode 100755
index 0000000..52d2e4b
--- /dev/null
+++ b/tools/harness-automation/cases_R140/ed_6_1_1.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class ED_6_1_1(HarnessCase):
+ role = HarnessCase.ROLE_ED
+ case = '6 1 1'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/ed_6_1_2.py b/tools/harness-automation/cases_R140/ed_6_1_2.py
new file mode 100755
index 0000000..a5eb4b0
--- /dev/null
+++ b/tools/harness-automation/cases_R140/ed_6_1_2.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class ED_6_1_2(HarnessCase):
+ role = HarnessCase.ROLE_ED
+ case = '6 1 2'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/ed_6_1_3.py b/tools/harness-automation/cases_R140/ed_6_1_3.py
new file mode 100755
index 0000000..c6a65ec
--- /dev/null
+++ b/tools/harness-automation/cases_R140/ed_6_1_3.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class ED_6_1_3(HarnessCase):
+ role = HarnessCase.ROLE_ED
+ case = '6 1 3'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/ed_6_1_4.py b/tools/harness-automation/cases_R140/ed_6_1_4.py
new file mode 100755
index 0000000..99894dc
--- /dev/null
+++ b/tools/harness-automation/cases_R140/ed_6_1_4.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class ED_6_1_4(HarnessCase):
+ role = HarnessCase.ROLE_ED
+ case = '6 1 4'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/ed_6_1_5.py b/tools/harness-automation/cases_R140/ed_6_1_5.py
new file mode 100755
index 0000000..9e09ab8
--- /dev/null
+++ b/tools/harness-automation/cases_R140/ed_6_1_5.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class ED_6_1_5(HarnessCase):
+ role = HarnessCase.ROLE_ED
+ case = '6 1 5'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/ed_6_1_6.py b/tools/harness-automation/cases_R140/ed_6_1_6.py
new file mode 100755
index 0000000..399799b
--- /dev/null
+++ b/tools/harness-automation/cases_R140/ed_6_1_6.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class ED_6_1_6(HarnessCase):
+ role = HarnessCase.ROLE_ED
+ case = '6 1 6'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases/ed_6_2_1.py b/tools/harness-automation/cases_R140/ed_6_2_1.py
old mode 100644
new mode 100755
similarity index 100%
rename from tools/harness-automation/cases/ed_6_2_1.py
rename to tools/harness-automation/cases_R140/ed_6_2_1.py
diff --git a/tools/harness-automation/cases/ed_6_2_2.py b/tools/harness-automation/cases_R140/ed_6_2_2.py
old mode 100644
new mode 100755
similarity index 100%
rename from tools/harness-automation/cases/ed_6_2_2.py
rename to tools/harness-automation/cases_R140/ed_6_2_2.py
diff --git a/tools/harness-automation/cases_R140/ed_6_3_1.py b/tools/harness-automation/cases_R140/ed_6_3_1.py
new file mode 100755
index 0000000..e19a0a5
--- /dev/null
+++ b/tools/harness-automation/cases_R140/ed_6_3_1.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class ED_6_3_1(HarnessCase):
+ role = HarnessCase.ROLE_ED
+ case = '6 3 1'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/ed_6_4_1.py b/tools/harness-automation/cases_R140/ed_6_4_1.py
new file mode 100755
index 0000000..261bfa6
--- /dev/null
+++ b/tools/harness-automation/cases_R140/ed_6_4_1.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class ED_6_4_1(HarnessCase):
+ role = HarnessCase.ROLE_ED
+ case = '6 4 1'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/ed_6_4_2.py b/tools/harness-automation/cases_R140/ed_6_4_2.py
new file mode 100755
index 0000000..cb5337d
--- /dev/null
+++ b/tools/harness-automation/cases_R140/ed_6_4_2.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class ED_6_4_2(HarnessCase):
+ role = HarnessCase.ROLE_ED
+ case = '6 4 2'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/ed_6_5_1.py b/tools/harness-automation/cases_R140/ed_6_5_1.py
new file mode 100755
index 0000000..fae820c
--- /dev/null
+++ b/tools/harness-automation/cases_R140/ed_6_5_1.py
@@ -0,0 +1,51 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+import time
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class ED_6_5_1(HarnessCase):
+ role = HarnessCase.ROLE_ED
+ case = '6 5 1'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ if title.startswith('Reset DUT'):
+ self.dut.stop()
+ time.sleep(self.child_timeout + 10)
+ self.dut.start()
+ return False
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/ed_6_5_2.py b/tools/harness-automation/cases_R140/ed_6_5_2.py
new file mode 100755
index 0000000..0825880
--- /dev/null
+++ b/tools/harness-automation/cases_R140/ed_6_5_2.py
@@ -0,0 +1,52 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class ED_6_5_2(HarnessCase):
+ role = HarnessCase.ROLE_ED
+ case = '6 5 2'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ if title.startswith('Reset DUT'):
+ self.dut.stop()
+ return False
+
+ elif title.startswith('Rejoin Now'):
+ self.dut.start()
+ return False
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/ed_6_5_3.py b/tools/harness-automation/cases_R140/ed_6_5_3.py
new file mode 100755
index 0000000..2a9b20e
--- /dev/null
+++ b/tools/harness-automation/cases_R140/ed_6_5_3.py
@@ -0,0 +1,52 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class ED_6_5_3(HarnessCase):
+ role = HarnessCase.ROLE_ED
+ case = '6 5 3'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ if title.startswith('Reset DUT'):
+ self.dut.stop()
+ return False
+
+ elif title.startswith('Rejoin Now'):
+ self.dut.start()
+ return False
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/ed_6_6_1.py b/tools/harness-automation/cases_R140/ed_6_6_1.py
new file mode 100755
index 0000000..117c881
--- /dev/null
+++ b/tools/harness-automation/cases_R140/ed_6_6_1.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class ED_6_6_1(HarnessCase):
+ role = HarnessCase.ROLE_ED
+ case = '6 6 1'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/ed_6_6_2.py b/tools/harness-automation/cases_R140/ed_6_6_2.py
new file mode 100755
index 0000000..8bc84b4
--- /dev/null
+++ b/tools/harness-automation/cases_R140/ed_6_6_2.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class ED_6_6_2(HarnessCase):
+ role = HarnessCase.ROLE_ED
+ case = '6 6 2'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/ed_9_2_17.py b/tools/harness-automation/cases_R140/ed_9_2_17.py
new file mode 100755
index 0000000..e245fea
--- /dev/null
+++ b/tools/harness-automation/cases_R140/ed_9_2_17.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class ED_9_2_17(HarnessCase):
+ role = HarnessCase.ROLE_ED
+ case = '9 2 17'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/ed_9_2_8.py b/tools/harness-automation/cases_R140/ed_9_2_8.py
new file mode 100755
index 0000000..4e254b1
--- /dev/null
+++ b/tools/harness-automation/cases_R140/ed_9_2_8.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class ED_9_2_8(HarnessCase):
+ role = HarnessCase.ROLE_ED
+ case = '9 2 8'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/fed_5_7_1.py b/tools/harness-automation/cases_R140/fed_5_7_1.py
new file mode 100755
index 0000000..5fb533c
--- /dev/null
+++ b/tools/harness-automation/cases_R140/fed_5_7_1.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class FED_5_7_1(HarnessCase):
+ role = HarnessCase.ROLE_FED
+ case = '5 7 1'
+ golden_devices_required = 5
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/fed_5_7_3.py b/tools/harness-automation/cases_R140/fed_5_7_3.py
new file mode 100755
index 0000000..6e5fa35
--- /dev/null
+++ b/tools/harness-automation/cases_R140/fed_5_7_3.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class FED_5_7_3(HarnessCase):
+ role = HarnessCase.ROLE_FED
+ case = '5 7 3'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/fed_6_1_7.py b/tools/harness-automation/cases_R140/fed_6_1_7.py
new file mode 100755
index 0000000..7fba55f
--- /dev/null
+++ b/tools/harness-automation/cases_R140/fed_6_1_7.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class FED_6_1_7(HarnessCase):
+ role = HarnessCase.ROLE_FED
+ case = '6 1 7'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/fed_9_2_13.py b/tools/harness-automation/cases_R140/fed_9_2_13.py
new file mode 100755
index 0000000..7b84b45
--- /dev/null
+++ b/tools/harness-automation/cases_R140/fed_9_2_13.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class FED_9_2_13(HarnessCase):
+ role = HarnessCase.ROLE_FED
+ case = '9 2 13'
+ golden_devices_required = 5
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/joiner_8_1_1.py b/tools/harness-automation/cases_R140/joiner_8_1_1.py
new file mode 100755
index 0000000..d71a7b7
--- /dev/null
+++ b/tools/harness-automation/cases_R140/joiner_8_1_1.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Joiner_8_1_1(HarnessCase):
+ role = HarnessCase.ROLE_JOINER
+ case = '8 1 1'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/joiner_8_1_6.py b/tools/harness-automation/cases_R140/joiner_8_1_6.py
new file mode 100755
index 0000000..8444997
--- /dev/null
+++ b/tools/harness-automation/cases_R140/joiner_8_1_6.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Joiner_8_1_6(HarnessCase):
+ role = HarnessCase.ROLE_JOINER
+ case = '8 1 6'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_5_1_1.py b/tools/harness-automation/cases_R140/leader_5_1_1.py
new file mode 100755
index 0000000..465d2bf
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_5_1_1.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_5_1_1(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '5 1 1'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_5_1_13.py b/tools/harness-automation/cases_R140/leader_5_1_13.py
new file mode 100755
index 0000000..d321240
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_5_1_13.py
@@ -0,0 +1,53 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+import time
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_5_1_13(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '5 1 13'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ if title.startswith('User Input Required'):
+ # body = dialog.find_element_by_id('cnfrmMsg').text
+ # if body.startswith('Reset Leader'):
+ self.dut.stop()
+ time.sleep(1)
+ self.dut.start()
+ return False
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_5_1_5.py b/tools/harness-automation/cases_R140/leader_5_1_5.py
new file mode 100755
index 0000000..386496c
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_5_1_5.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Leader_5_1_5(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '5 1 5'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_5_2_3.py b/tools/harness-automation/cases_R140/leader_5_2_3.py
new file mode 100755
index 0000000..15bd2af
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_5_2_3.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_5_2_3(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '5 2 3'
+ golden_devices_required = 32
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_5_3_6.py b/tools/harness-automation/cases_R140/leader_5_3_6.py
new file mode 100755
index 0000000..89cd19c
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_5_3_6.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Leader_5_3_6(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '5 3 6'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_5_3_7.py b/tools/harness-automation/cases_R140/leader_5_3_7.py
new file mode 100755
index 0000000..68df333
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_5_3_7.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_5_3_7(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '5 3 7'
+ golden_devices_required = 5
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_5_3_8.py b/tools/harness-automation/cases_R140/leader_5_3_8.py
new file mode 100755
index 0000000..1e64255
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_5_3_8.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_5_3_8(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '5 3 8'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_5_5_1.py b/tools/harness-automation/cases_R140/leader_5_5_1.py
new file mode 100755
index 0000000..9bbc273
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_5_5_1.py
@@ -0,0 +1,58 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import re
+import time
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_5_5_1(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '5 5 1'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ if title.startswith('User Input Required'):
+ body = dialog.find_element_by_id('cnfrmMsg').text
+ match = re.search(r'(?<=Leader Timeout\[)\d+(?= Seconds\])', body)
+ if match:
+ timeout = int(match.group(0)) / 2
+ else:
+ timeout = 10
+ self.dut.stop()
+ time.sleep(timeout)
+ self.dut.start()
+ return False
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_5_5_2.py b/tools/harness-automation/cases_R140/leader_5_5_2.py
new file mode 100755
index 0000000..4f97bef
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_5_5_2.py
@@ -0,0 +1,51 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import time
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_5_5_2(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '5 5 2'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ if title.startswith('User Input Required'):
+ self.dut.stop()
+ time.sleep(1)
+ self.dut.start()
+ return False
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_5_5_3.py b/tools/harness-automation/cases_R140/leader_5_5_3.py
new file mode 100755
index 0000000..07eb2fe
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_5_5_3.py
@@ -0,0 +1,52 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_5_5_3(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '5 5 3'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ if title.startswith('Reset DUT'):
+ self.dut.stop()
+ return False
+
+ elif title.startswith('Rejoin'):
+ self.dut.start()
+ return False
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_5_5_4.py b/tools/harness-automation/cases_R140/leader_5_5_4.py
new file mode 100755
index 0000000..0547e7a
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_5_5_4.py
@@ -0,0 +1,52 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_5_5_4(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '5 5 4'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ if title.startswith('Reset DUT'):
+ self.dut.stop()
+ return False
+
+ elif title.startswith('Rejoin Now'):
+ self.dut.start()
+ return False
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_5_5_7.py b/tools/harness-automation/cases_R140/leader_5_5_7.py
new file mode 100755
index 0000000..a719394
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_5_5_7.py
@@ -0,0 +1,51 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_5_5_7(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '5 5 7'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ if title.startswith('Reset DUT'):
+ self.dut.stop()
+ return False
+
+ elif title.startswith('Rejoin Now'):
+ self.dut.start()
+ return False
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_5_6_2.py b/tools/harness-automation/cases_R140/leader_5_6_2.py
new file mode 100755
index 0000000..06080a7
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_5_6_2.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Leader_5_6_2(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '5 6 2'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_5_6_4.py b/tools/harness-automation/cases_R140/leader_5_6_4.py
new file mode 100755
index 0000000..a588660
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_5_6_4.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_5_6_4(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '5 6 4'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_5_6_5.py b/tools/harness-automation/cases_R140/leader_5_6_5.py
new file mode 100755
index 0000000..aa18f53
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_5_6_5.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_5_6_5(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '5 6 5'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_5_6_6.py b/tools/harness-automation/cases_R140/leader_5_6_6.py
new file mode 100755
index 0000000..51d80b1
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_5_6_6.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_5_6_6(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '5 6 6'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_5_8_4.py b/tools/harness-automation/cases_R140/leader_5_8_4.py
new file mode 100755
index 0000000..12c984c
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_5_8_4.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_5_8_4(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '5 8 4'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases/leader_7_1_1.py b/tools/harness-automation/cases_R140/leader_7_1_1.py
old mode 100644
new mode 100755
similarity index 100%
rename from tools/harness-automation/cases/leader_7_1_1.py
rename to tools/harness-automation/cases_R140/leader_7_1_1.py
diff --git a/tools/harness-automation/cases/leader_7_1_3.py b/tools/harness-automation/cases_R140/leader_7_1_3.py
old mode 100644
new mode 100755
similarity index 100%
rename from tools/harness-automation/cases/leader_7_1_3.py
rename to tools/harness-automation/cases_R140/leader_7_1_3.py
diff --git a/tools/harness-automation/cases_R140/leader_7_1_6.py b/tools/harness-automation/cases_R140/leader_7_1_6.py
new file mode 100755
index 0000000..fd1d76a
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_7_1_6.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Leader_7_1_6(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '7 1 6'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_7_1_7.py b/tools/harness-automation/cases_R140/leader_7_1_7.py
new file mode 100755
index 0000000..9559a74
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_7_1_7.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Leader_7_1_7(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '7 1 7'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_8_3_1.py b/tools/harness-automation/cases_R140/leader_8_3_1.py
new file mode 100755
index 0000000..8e3edf1
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_8_3_1.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_8_3_1(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '8 3 1'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_9_2_1.py b/tools/harness-automation/cases_R140/leader_9_2_1.py
new file mode 100755
index 0000000..923782d
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_9_2_1.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_9_2_1(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '9 2 1'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_9_2_11.py b/tools/harness-automation/cases_R140/leader_9_2_11.py
new file mode 100755
index 0000000..0174d82
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_9_2_11.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_9_2_11(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '9 2 11'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_9_2_12.py b/tools/harness-automation/cases_R140/leader_9_2_12.py
new file mode 100755
index 0000000..b35f110
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_9_2_12.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_9_2_12(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '9 2 12'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_9_2_18.py b/tools/harness-automation/cases_R140/leader_9_2_18.py
new file mode 100755
index 0000000..2a549df
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_9_2_18.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_9_2_18(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '9 2 18'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_9_2_19.py b/tools/harness-automation/cases_R140/leader_9_2_19.py
new file mode 100755
index 0000000..5c9dc21
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_9_2_19.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_9_2_19(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '9 2 19'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_9_2_2.py b/tools/harness-automation/cases_R140/leader_9_2_2.py
new file mode 100755
index 0000000..449a63f
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_9_2_2.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_9_2_2(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '9 2 2'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_9_2_3.py b/tools/harness-automation/cases_R140/leader_9_2_3.py
new file mode 100755
index 0000000..4d17627
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_9_2_3.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_9_2_3(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '9 2 3'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_9_2_4.py b/tools/harness-automation/cases_R140/leader_9_2_4.py
new file mode 100755
index 0000000..e18cb36
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_9_2_4.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_9_2_4(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '9 2 4'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_9_2_5.py b/tools/harness-automation/cases_R140/leader_9_2_5.py
new file mode 100755
index 0000000..e4626ce
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_9_2_5.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_9_2_5(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '9 2 5'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_9_2_6.py b/tools/harness-automation/cases_R140/leader_9_2_6.py
new file mode 100755
index 0000000..aecca92
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_9_2_6.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_9_2_6(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '9 2 6'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_9_2_7.py b/tools/harness-automation/cases_R140/leader_9_2_7.py
new file mode 100755
index 0000000..a6f2dee
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_9_2_7.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_9_2_7(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '9 2 7'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/leader_9_2_9.py b/tools/harness-automation/cases_R140/leader_9_2_9.py
new file mode 100755
index 0000000..2fa91a2
--- /dev/null
+++ b/tools/harness-automation/cases_R140/leader_9_2_9.py
@@ -0,0 +1,48 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Leader_9_2_9(HarnessCase):
+ role = HarnessCase.ROLE_LEADER
+ case = '9 2 9'
+ golden_devices_required = 3
+ case_need_shield = True
+ device_order = [('Router_2', False), ('Commissioner', True), ('Router_1', False), ('DUT', True)]
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/med_6_3_2.py b/tools/harness-automation/cases_R140/med_6_3_2.py
new file mode 100755
index 0000000..676a676
--- /dev/null
+++ b/tools/harness-automation/cases_R140/med_6_3_2.py
@@ -0,0 +1,47 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class MED_6_3_2(HarnessCase):
+ role = HarnessCase.ROLE_MED
+ case = '6 3 2'
+ golden_devices_required = 1
+ case_need_shield = True
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/med_9_2_10.py b/tools/harness-automation/cases_R140/med_9_2_10.py
new file mode 100755
index 0000000..9153669
--- /dev/null
+++ b/tools/harness-automation/cases_R140/med_9_2_10.py
@@ -0,0 +1,48 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class MED_9_2_10(HarnessCase):
+ role = HarnessCase.ROLE_MED
+ case = '9 2 10'
+ golden_devices_required = 4
+ case_need_shield = True
+ device_order = [('SED_1', False), ('DUT', False), ('Router_1', False), ('Commissioner', True), ('Leader', True)]
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/med_9_2_12.py b/tools/harness-automation/cases_R140/med_9_2_12.py
new file mode 100755
index 0000000..7c93f3c
--- /dev/null
+++ b/tools/harness-automation/cases_R140/med_9_2_12.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class MED_9_2_12(HarnessCase):
+ role = HarnessCase.ROLE_MED
+ case = '9 2 12'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/med_9_2_13.py b/tools/harness-automation/cases_R140/med_9_2_13.py
new file mode 100755
index 0000000..f45bf21
--- /dev/null
+++ b/tools/harness-automation/cases_R140/med_9_2_13.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class MED_9_2_13(HarnessCase):
+ role = HarnessCase.ROLE_MED
+ case = '9 2 13'
+ golden_devices_required = 5
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/med_9_2_18.py b/tools/harness-automation/cases_R140/med_9_2_18.py
new file mode 100755
index 0000000..3c17bb8
--- /dev/null
+++ b/tools/harness-automation/cases_R140/med_9_2_18.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class MED_9_2_18(HarnessCase):
+ role = HarnessCase.ROLE_MED
+ case = '9 2 18'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/med_9_2_6.py b/tools/harness-automation/cases_R140/med_9_2_6.py
new file mode 100755
index 0000000..5b8411c
--- /dev/null
+++ b/tools/harness-automation/cases_R140/med_9_2_6.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class MED_9_2_6(HarnessCase):
+ role = HarnessCase.ROLE_MED
+ case = '9 2 6'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/reed_5_2_4.py b/tools/harness-automation/cases_R140/reed_5_2_4.py
new file mode 100755
index 0000000..8deba1c
--- /dev/null
+++ b/tools/harness-automation/cases_R140/reed_5_2_4.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class REED_5_2_4(HarnessCase):
+ role = HarnessCase.ROLE_REED
+ case = '5 2 4'
+ golden_devices_required = 17
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/reed_5_2_5.py b/tools/harness-automation/cases_R140/reed_5_2_5.py
new file mode 100755
index 0000000..f9e3a8e
--- /dev/null
+++ b/tools/harness-automation/cases_R140/reed_5_2_5.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class REED_5_2_5(HarnessCase):
+ role = HarnessCase.ROLE_REED
+ case = '5 2 5'
+ golden_devices_required = 17
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/reed_5_2_7.py b/tools/harness-automation/cases_R140/reed_5_2_7.py
new file mode 100755
index 0000000..d77e80f
--- /dev/null
+++ b/tools/harness-automation/cases_R140/reed_5_2_7.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class REED_5_2_7(HarnessCase):
+ role = HarnessCase.ROLE_REED
+ case = '5 2 7'
+ golden_devices_required = 16
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/reed_5_5_5.py b/tools/harness-automation/cases_R140/reed_5_5_5.py
new file mode 100755
index 0000000..c2d71b9
--- /dev/null
+++ b/tools/harness-automation/cases_R140/reed_5_5_5.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class REED_5_5_5(HarnessCase):
+ role = HarnessCase.ROLE_REED
+ case = '5 5 5'
+ golden_devices_required = 16
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/reed_5_6_7.py b/tools/harness-automation/cases_R140/reed_5_6_7.py
new file mode 100755
index 0000000..270fc1d
--- /dev/null
+++ b/tools/harness-automation/cases_R140/reed_5_6_7.py
@@ -0,0 +1,47 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class REED_5_6_7(HarnessCase):
+ role = HarnessCase.ROLE_REED
+ case = '5 6 7'
+ golden_devices_required = 16
+ case_need_shield = True
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/reed_5_7_2.py b/tools/harness-automation/cases_R140/reed_5_7_2.py
new file mode 100755
index 0000000..2e33bf4
--- /dev/null
+++ b/tools/harness-automation/cases_R140/reed_5_7_2.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class REED_5_7_2(HarnessCase):
+ role = HarnessCase.ROLE_REED
+ case = '5 7 2'
+ golden_devices_required = 16
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_1_1.py b/tools/harness-automation/cases_R140/router_5_1_1.py
new file mode 100755
index 0000000..637a15c
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_1_1.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_5_1_1(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 1 1'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_1_10.py b/tools/harness-automation/cases_R140/router_5_1_10.py
new file mode 100755
index 0000000..8ac8817
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_1_10.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_5_1_10(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 1 10'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_1_11.py b/tools/harness-automation/cases_R140/router_5_1_11.py
new file mode 100755
index 0000000..a818612
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_1_11.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_5_1_11(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 1 11'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_1_12.py b/tools/harness-automation/cases_R140/router_5_1_12.py
new file mode 100755
index 0000000..d69b9e8
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_1_12.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_5_1_12(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 1 12'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_1_13.py b/tools/harness-automation/cases_R140/router_5_1_13.py
new file mode 100755
index 0000000..80e7413
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_1_13.py
@@ -0,0 +1,52 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_5_1_13(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 1 13'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ if title.startswith('Reset DUT'):
+ self.dut.stop()
+ return False
+
+ elif title.startswith('Rejoin Now'):
+ self.dut.start()
+ return False
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_1_2.py b/tools/harness-automation/cases_R140/router_5_1_2.py
new file mode 100755
index 0000000..c430aca
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_1_2.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_5_1_2(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 1 2'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_1_3.py b/tools/harness-automation/cases_R140/router_5_1_3.py
new file mode 100755
index 0000000..b60d16f
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_1_3.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_5_1_3(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 1 3'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_1_4.py b/tools/harness-automation/cases_R140/router_5_1_4.py
new file mode 100755
index 0000000..477336f
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_1_4.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_5_1_4(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 1 4'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_1_6.py b/tools/harness-automation/cases_R140/router_5_1_6.py
new file mode 100755
index 0000000..f641609
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_1_6.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_5_1_6(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 1 6'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_1_7.py b/tools/harness-automation/cases_R140/router_5_1_7.py
new file mode 100755
index 0000000..dfecd89
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_1_7.py
@@ -0,0 +1,50 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_5_1_7(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 1 7'
+ golden_devices_required = 11
+
+ def on_dialog(self, dialog, title):
+ if title.startswith('Enter Router Max Child Count'):
+ inp = dialog.find_element_by_id('cnfrmInpText')
+ inp.clear()
+ inp.send_keys('5')
+ return False
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_1_8.py b/tools/harness-automation/cases_R140/router_5_1_8.py
new file mode 100755
index 0000000..adfcf26
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_1_8.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_5_1_8(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 1 8'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_1_9.py b/tools/harness-automation/cases_R140/router_5_1_9.py
new file mode 100755
index 0000000..85f3083
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_1_9.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_5_1_9(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 1 9'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_2_1.py b/tools/harness-automation/cases_R140/router_5_2_1.py
new file mode 100755
index 0000000..9ac6fb2
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_2_1.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_5_2_1(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 2 1'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_2_6.py b/tools/harness-automation/cases_R140/router_5_2_6.py
new file mode 100755
index 0000000..d572e00
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_2_6.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_5_2_6(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 2 6'
+ golden_devices_required = 23
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_2_7.py b/tools/harness-automation/cases_R140/router_5_2_7.py
new file mode 100755
index 0000000..90b5ba0
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_2_7.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_5_2_7(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 2 7'
+ golden_devices_required = 16
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_3_1.py b/tools/harness-automation/cases_R140/router_5_3_1.py
new file mode 100755
index 0000000..7bedcf6
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_3_1.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Router_5_3_1(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 3 1'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_3_10.py b/tools/harness-automation/cases_R140/router_5_3_10.py
new file mode 100755
index 0000000..b55513a
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_3_10.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Router_5_3_10(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 3 10'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_3_11.py b/tools/harness-automation/cases_R140/router_5_3_11.py
new file mode 100755
index 0000000..74c25b1
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_3_11.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Router_5_3_11(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 3 11'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_3_2.py b/tools/harness-automation/cases_R140/router_5_3_2.py
new file mode 100755
index 0000000..e915136
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_3_2.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Router_5_3_2(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 3 2'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_3_3.py b/tools/harness-automation/cases_R140/router_5_3_3.py
new file mode 100755
index 0000000..9b1d50d
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_3_3.py
@@ -0,0 +1,47 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Router_5_3_3(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 3 3'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ if title.startswith('Start DUT'):
+ self.dut.enable_blacklist()
+ self.dut.add_blacklist('166e0a000000005')
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_3_4.py b/tools/harness-automation/cases_R140/router_5_3_4.py
new file mode 100755
index 0000000..19170b8
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_3_4.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Router_5_3_4(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 3 4'
+ golden_devices_required = 6
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_3_5.py b/tools/harness-automation/cases_R140/router_5_3_5.py
new file mode 100755
index 0000000..d527431
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_3_5.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Router_5_3_5(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 3 5'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_3_9.py b/tools/harness-automation/cases_R140/router_5_3_9.py
new file mode 100755
index 0000000..c6388c4
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_3_9.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Router_5_3_9(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 3 9'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_5_1.py b/tools/harness-automation/cases_R140/router_5_5_1.py
new file mode 100755
index 0000000..1019970
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_5_1.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Router_5_5_1(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 5 1'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_5_2.py b/tools/harness-automation/cases_R140/router_5_5_2.py
new file mode 100755
index 0000000..a1e7364
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_5_2.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Router_5_5_2(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 5 2'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_5_3.py b/tools/harness-automation/cases_R140/router_5_5_3.py
new file mode 100755
index 0000000..e2bfcd6
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_5_3.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Router_5_5_3(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 5 3'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_5_4.py b/tools/harness-automation/cases_R140/router_5_5_4.py
new file mode 100755
index 0000000..d620448
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_5_4.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Router_5_5_4(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 5 4'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_5_7.py b/tools/harness-automation/cases_R140/router_5_5_7.py
new file mode 100755
index 0000000..45c5a73
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_5_7.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Router_5_5_7(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 5 7'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_6_1.py b/tools/harness-automation/cases_R140/router_5_6_1.py
new file mode 100755
index 0000000..90a260e
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_6_1.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Router_5_6_1(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 6 1'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_6_3.py b/tools/harness-automation/cases_R140/router_5_6_3.py
new file mode 100755
index 0000000..16d75cd
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_6_3.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Router_5_6_3(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 6 3'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_6_9.py b/tools/harness-automation/cases_R140/router_5_6_9.py
new file mode 100755
index 0000000..29effa0
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_6_9.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Router_5_6_9(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 6 9'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_7_1.py b/tools/harness-automation/cases_R140/router_5_7_1.py
new file mode 100755
index 0000000..760df76
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_7_1.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_5_7_1(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 7 1'
+ golden_devices_required = 5
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_7_3.py b/tools/harness-automation/cases_R140/router_5_7_3.py
new file mode 100755
index 0000000..08856f5
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_7_3.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_5_7_3(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 7 3'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_8_2.py b/tools/harness-automation/cases_R140/router_5_8_2.py
new file mode 100755
index 0000000..f7ea1e7
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_8_2.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Router_5_8_2(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 8 2'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_5_8_3.py b/tools/harness-automation/cases_R140/router_5_8_3.py
new file mode 100755
index 0000000..e6ceff5
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_5_8_3.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+from autothreadharness.harness_case import HarnessCase
+import unittest
+
+
+class Router_5_8_3(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '5 8 3'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases/router_7_1_2.py b/tools/harness-automation/cases_R140/router_7_1_2.py
old mode 100644
new mode 100755
similarity index 100%
rename from tools/harness-automation/cases/router_7_1_2.py
rename to tools/harness-automation/cases_R140/router_7_1_2.py
diff --git a/tools/harness-automation/cases/router_7_1_4.py b/tools/harness-automation/cases_R140/router_7_1_4.py
old mode 100644
new mode 100755
similarity index 100%
rename from tools/harness-automation/cases/router_7_1_4.py
rename to tools/harness-automation/cases_R140/router_7_1_4.py
diff --git a/tools/harness-automation/cases/router_7_1_5.py b/tools/harness-automation/cases_R140/router_7_1_5.py
old mode 100644
new mode 100755
similarity index 100%
rename from tools/harness-automation/cases/router_7_1_5.py
rename to tools/harness-automation/cases_R140/router_7_1_5.py
diff --git a/tools/harness-automation/cases/router_7_1_8.py b/tools/harness-automation/cases_R140/router_7_1_8.py
old mode 100644
new mode 100755
similarity index 100%
rename from tools/harness-automation/cases/router_7_1_8.py
rename to tools/harness-automation/cases_R140/router_7_1_8.py
diff --git a/tools/harness-automation/cases_R140/router_8_2_1.py b/tools/harness-automation/cases_R140/router_8_2_1.py
new file mode 100755
index 0000000..dd98c87
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_8_2_1.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_8_2_1(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '8 2 1'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_8_2_2.py b/tools/harness-automation/cases_R140/router_8_2_2.py
new file mode 100755
index 0000000..3701ec4
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_8_2_2.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_8_2_2(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '8 2 2'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_8_2_5.py b/tools/harness-automation/cases_R140/router_8_2_5.py
new file mode 100755
index 0000000..553fd6d
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_8_2_5.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_8_2_5(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '8 2 5'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_9_2_10.py b/tools/harness-automation/cases_R140/router_9_2_10.py
new file mode 100755
index 0000000..c63cc34
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_9_2_10.py
@@ -0,0 +1,48 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_9_2_10(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '9 2 10'
+ golden_devices_required = 4
+ case_need_shield = True
+ device_order = [('SED_1', False), ('MED_1', False), ('DUT', False), ('Commissioner', True), ('Leader', True)]
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_9_2_12.py b/tools/harness-automation/cases_R140/router_9_2_12.py
new file mode 100755
index 0000000..003e348
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_9_2_12.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_9_2_12(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '9 2 12'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_9_2_13.py b/tools/harness-automation/cases_R140/router_9_2_13.py
new file mode 100755
index 0000000..eea2599
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_9_2_13.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_9_2_13(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '9 2 13'
+ golden_devices_required = 5
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_9_2_14.py b/tools/harness-automation/cases_R140/router_9_2_14.py
new file mode 100755
index 0000000..1ebff32
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_9_2_14.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_9_2_14(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '9 2 14'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_9_2_15.py b/tools/harness-automation/cases_R140/router_9_2_15.py
new file mode 100755
index 0000000..23f58f9
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_9_2_15.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_9_2_15(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '9 2 15'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_9_2_16.py b/tools/harness-automation/cases_R140/router_9_2_16.py
new file mode 100755
index 0000000..9283de7
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_9_2_16.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_9_2_16(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '9 2 16'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_9_2_18.py b/tools/harness-automation/cases_R140/router_9_2_18.py
new file mode 100755
index 0000000..edd44c5
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_9_2_18.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_9_2_18(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '9 2 18'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_9_2_6.py b/tools/harness-automation/cases_R140/router_9_2_6.py
new file mode 100755
index 0000000..7b2deb6
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_9_2_6.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_9_2_6(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '9 2 6'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_9_2_8.py b/tools/harness-automation/cases_R140/router_9_2_8.py
new file mode 100755
index 0000000..1f20cc6
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_9_2_8.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_9_2_8(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '9 2 8'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/router_9_2_9.py b/tools/harness-automation/cases_R140/router_9_2_9.py
new file mode 100755
index 0000000..cc53ddc
--- /dev/null
+++ b/tools/harness-automation/cases_R140/router_9_2_9.py
@@ -0,0 +1,48 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class Router_9_2_9(HarnessCase):
+ role = HarnessCase.ROLE_ROUTER
+ case = '9 2 9'
+ golden_devices_required = 3
+ case_need_shield = True
+ device_order = [('Router_2', False), ('Commissioner', True), ('DUT', False), ('Leader', True)]
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/sed_6_1_1.py b/tools/harness-automation/cases_R140/sed_6_1_1.py
new file mode 100755
index 0000000..81221a7
--- /dev/null
+++ b/tools/harness-automation/cases_R140/sed_6_1_1.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class SED_6_1_1(HarnessCase):
+ role = HarnessCase.ROLE_SED
+ case = '6 1 1'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/sed_6_1_2.py b/tools/harness-automation/cases_R140/sed_6_1_2.py
new file mode 100755
index 0000000..c3acbc6
--- /dev/null
+++ b/tools/harness-automation/cases_R140/sed_6_1_2.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class SED_6_1_2(HarnessCase):
+ role = HarnessCase.ROLE_SED
+ case = '6 1 2'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/sed_6_1_3.py b/tools/harness-automation/cases_R140/sed_6_1_3.py
new file mode 100755
index 0000000..42fab23
--- /dev/null
+++ b/tools/harness-automation/cases_R140/sed_6_1_3.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class SED_6_1_3(HarnessCase):
+ role = HarnessCase.ROLE_SED
+ case = '6 1 3'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/sed_6_1_4.py b/tools/harness-automation/cases_R140/sed_6_1_4.py
new file mode 100755
index 0000000..c508b82
--- /dev/null
+++ b/tools/harness-automation/cases_R140/sed_6_1_4.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class SED_6_1_4(HarnessCase):
+ role = HarnessCase.ROLE_SED
+ case = '6 1 4'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/sed_6_1_5.py b/tools/harness-automation/cases_R140/sed_6_1_5.py
new file mode 100755
index 0000000..49048f4
--- /dev/null
+++ b/tools/harness-automation/cases_R140/sed_6_1_5.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class SED_6_1_5(HarnessCase):
+ role = HarnessCase.ROLE_SED
+ case = '6 1 5'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/sed_6_1_6.py b/tools/harness-automation/cases_R140/sed_6_1_6.py
new file mode 100755
index 0000000..5c20abc
--- /dev/null
+++ b/tools/harness-automation/cases_R140/sed_6_1_6.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class SED_6_1_6(HarnessCase):
+ role = HarnessCase.ROLE_SED
+ case = '6 1 6'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/sed_6_2_1.py b/tools/harness-automation/cases_R140/sed_6_2_1.py
new file mode 100755
index 0000000..8f340d8
--- /dev/null
+++ b/tools/harness-automation/cases_R140/sed_6_2_1.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class SED_6_2_1(HarnessCase):
+ role = HarnessCase.ROLE_SED
+ case = '6 2 1'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/sed_6_2_2.py b/tools/harness-automation/cases_R140/sed_6_2_2.py
new file mode 100755
index 0000000..a8e3176
--- /dev/null
+++ b/tools/harness-automation/cases_R140/sed_6_2_2.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class SED_6_2_2(HarnessCase):
+ role = HarnessCase.ROLE_SED
+ case = '6 2 2'
+ golden_devices_required = 3
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/sed_6_3_1.py b/tools/harness-automation/cases_R140/sed_6_3_1.py
new file mode 100755
index 0000000..c790349
--- /dev/null
+++ b/tools/harness-automation/cases_R140/sed_6_3_1.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class SED_6_3_1(HarnessCase):
+ role = HarnessCase.ROLE_SED
+ case = '6 3 1'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/sed_6_3_2.py b/tools/harness-automation/cases_R140/sed_6_3_2.py
new file mode 100755
index 0000000..e2ca907
--- /dev/null
+++ b/tools/harness-automation/cases_R140/sed_6_3_2.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class SED_6_3_2(HarnessCase):
+ role = HarnessCase.ROLE_SED
+ case = '6 3 2'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/sed_6_4_1.py b/tools/harness-automation/cases_R140/sed_6_4_1.py
new file mode 100755
index 0000000..092ce63
--- /dev/null
+++ b/tools/harness-automation/cases_R140/sed_6_4_1.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class SED_6_4_1(HarnessCase):
+ role = HarnessCase.ROLE_SED
+ case = '6 4 1'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/sed_6_4_2.py b/tools/harness-automation/cases_R140/sed_6_4_2.py
new file mode 100755
index 0000000..d798867
--- /dev/null
+++ b/tools/harness-automation/cases_R140/sed_6_4_2.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class SED_6_4_2(HarnessCase):
+ role = HarnessCase.ROLE_SED
+ case = '6 4 2'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/sed_6_5_1.py b/tools/harness-automation/cases_R140/sed_6_5_1.py
new file mode 100755
index 0000000..c9704e2
--- /dev/null
+++ b/tools/harness-automation/cases_R140/sed_6_5_1.py
@@ -0,0 +1,52 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import time
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class SED_6_5_1(HarnessCase):
+ role = HarnessCase.ROLE_SED
+ case = '6 5 1'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ if title.startswith('Reset DUT'):
+ time.sleep(self.child_timeout + 5)
+ self.dut.stop()
+ time.sleep(1)
+ self.dut.start()
+ return False
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/sed_6_5_2.py b/tools/harness-automation/cases_R140/sed_6_5_2.py
new file mode 100755
index 0000000..e2f3b41
--- /dev/null
+++ b/tools/harness-automation/cases_R140/sed_6_5_2.py
@@ -0,0 +1,52 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class SED_6_5_2(HarnessCase):
+ role = HarnessCase.ROLE_SED
+ case = '6 5 2'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ if title.startswith('Reset DUT'):
+ self.dut.stop()
+ return False
+
+ elif title.startswith('Rejoin Now'):
+ self.dut.start()
+ return False
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/sed_6_5_3.py b/tools/harness-automation/cases_R140/sed_6_5_3.py
new file mode 100755
index 0000000..f8a0ca3
--- /dev/null
+++ b/tools/harness-automation/cases_R140/sed_6_5_3.py
@@ -0,0 +1,52 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class SED_6_5_3(HarnessCase):
+ role = HarnessCase.ROLE_SED
+ case = '6 5 3'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ if title.startswith('Reset DUT'):
+ self.dut.stop()
+ return False
+
+ elif title.startswith('Rejoin Now'):
+ self.dut.start()
+ return False
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/sed_6_6_1.py b/tools/harness-automation/cases_R140/sed_6_6_1.py
new file mode 100755
index 0000000..f948aa9
--- /dev/null
+++ b/tools/harness-automation/cases_R140/sed_6_6_1.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class SED_6_6_1(HarnessCase):
+ role = HarnessCase.ROLE_SED
+ case = '6 6 1'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/sed_6_6_2.py b/tools/harness-automation/cases_R140/sed_6_6_2.py
new file mode 100755
index 0000000..99d423c
--- /dev/null
+++ b/tools/harness-automation/cases_R140/sed_6_6_2.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class SED_6_6_2(HarnessCase):
+ role = HarnessCase.ROLE_SED
+ case = '6 6 2'
+ golden_devices_required = 1
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/sed_9_2_10.py b/tools/harness-automation/cases_R140/sed_9_2_10.py
new file mode 100755
index 0000000..3ca4953
--- /dev/null
+++ b/tools/harness-automation/cases_R140/sed_9_2_10.py
@@ -0,0 +1,48 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class SED_9_2_10(HarnessCase):
+ role = HarnessCase.ROLE_SED
+ case = '9 2 10'
+ golden_devices_required = 4
+ case_need_shield = True
+ device_order = [('DUT', False), ('MED_1', False), ('Router_1', False), ('Commissioner', True), ('Leader', True)]
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/sed_9_2_13.py b/tools/harness-automation/cases_R140/sed_9_2_13.py
new file mode 100755
index 0000000..f4e877f
--- /dev/null
+++ b/tools/harness-automation/cases_R140/sed_9_2_13.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class SED_9_2_13(HarnessCase):
+ role = HarnessCase.ROLE_SED
+ case = '9 2 13'
+ golden_devices_required = 5
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/sed_9_2_17.py b/tools/harness-automation/cases_R140/sed_9_2_17.py
new file mode 100755
index 0000000..5b718d6
--- /dev/null
+++ b/tools/harness-automation/cases_R140/sed_9_2_17.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class SED_9_2_17(HarnessCase):
+ role = HarnessCase.ROLE_SED
+ case = '9 2 17'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/sed_9_2_18.py b/tools/harness-automation/cases_R140/sed_9_2_18.py
new file mode 100755
index 0000000..800763d
--- /dev/null
+++ b/tools/harness-automation/cases_R140/sed_9_2_18.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class SED_9_2_18(HarnessCase):
+ role = HarnessCase.ROLE_SED
+ case = '9 2 18'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/sed_9_2_6.py b/tools/harness-automation/cases_R140/sed_9_2_6.py
new file mode 100755
index 0000000..c32a2f2
--- /dev/null
+++ b/tools/harness-automation/cases_R140/sed_9_2_6.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class SED_9_2_6(HarnessCase):
+ role = HarnessCase.ROLE_SED
+ case = '9 2 6'
+ golden_devices_required = 4
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/cases_R140/sed_9_2_8.py b/tools/harness-automation/cases_R140/sed_9_2_8.py
new file mode 100755
index 0000000..49cf7cb
--- /dev/null
+++ b/tools/harness-automation/cases_R140/sed_9_2_8.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2016, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+import unittest
+
+from autothreadharness.harness_case import HarnessCase
+
+
+class SED_9_2_8(HarnessCase):
+ role = HarnessCase.ROLE_SED
+ case = '9 2 8'
+ golden_devices_required = 2
+
+ def on_dialog(self, dialog, title):
+ pass
+
+
+if __name__ == '__main__':
+ unittest.main()
diff --git a/tools/harness-automation/doc/conf.py b/tools/harness-automation/doc/conf.py
index b08e7b2..4a1f028 100644
--- a/tools/harness-automation/doc/conf.py
+++ b/tools/harness-automation/doc/conf.py
@@ -80,8 +80,8 @@
# General information about the project.
project = u'Thread Harness Automation'
-copyright = u'2016, Yakun Xu'
-author = u'Yakun Xu'
+copyright = u'2019, OpenThread'
+author = u'OpenThread'
# The version info for the project you're documenting, acts as replacement for
# |version| and |release|, also used in various other places throughout the
@@ -293,7 +293,7 @@
master_doc,
'ThreadHarnessAutomation.tex',
u'Thread Harness Automation Documentation',
- u'Yakun Xu',
+ u'OpenThread',
'manual',
)
]
diff --git a/tools/harness-sniffer/OT_Sniffer.py b/tools/harness-sniffer/OT_Sniffer.py
new file mode 100644
index 0000000..3df900a
--- /dev/null
+++ b/tools/harness-sniffer/OT_Sniffer.py
@@ -0,0 +1,156 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2019, The OpenThread Authors.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the copyright holder nor the
+# names of its contributors may be used to endorse or promote products
+# derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+
+''''OpenThread Sniffer API implementation'''
+
+import os
+import subprocess
+from GRLLibs.UtilityModules.ModuleHelper import ModuleHelper
+from ISniffer import ISniffer
+
+
+class OT_Sniffer(ISniffer):
+ def __init__(self, **kwargs):
+ try:
+ self.channel = kwargs.get('channel', 11)
+ self.port = kwargs.get('addressofDevice')
+ self.subprocess = None
+ self.is_active = False
+
+ except Exception as e:
+ ModuleHelper.WriteIntoDebugLogger('OT_Sniffer: [intialize] --> ' + str(e))
+
+ def discoverSniffer(self):
+ sniffers = []
+
+ p_discover = subprocess.Popen('extcap_ot.bat --extcap-interfaces', stdout=subprocess.PIPE, shell=True)
+ for line in p_discover.stdout.readlines():
+ if line.startswith('interface'):
+ try:
+ # e.g. interface {value=COM10:460800}{display=OpenThread Sniffer COM10}
+ interface_port = line[line.index('value=') + 6 : line.index('}{display')]
+ sniffers.append(OT_Sniffer(addressofDevice=interface_port, channel=ModuleHelper.Default_Channel))
+ except Exception as e:
+ ModuleHelper.WriteIntoDebugLogger('OT_Sniffer: [discoverSniffer] --> Error: ' + str(e))
+
+ p_discover.wait()
+ return sniffers
+
+ def startSniffer(self, channelToCapture, captureFileLocation):
+ """
+ Method for starting the sniffer capture on given channel and this should create wireshark 'pcapng' file at the
+ given location. Capture should happen in background so that method call will be non-blocking and asynchronous.
+ @param channelToCapture : int : channel number to start the capture
+ @param captureFileLocation : string : Full path with the filename with extension is passed.
+ """
+ try:
+ # start sniffer
+ self.setChannel(channelToCapture)
+ p_where = subprocess.Popen(
+ 'py -3 -c "import sys; print(sys.executable)"', stdout=subprocess.PIPE, shell=True,
+ )
+ # python_exe: e.g. C:\Python37\python.exe
+ python_exe = p_where.stdout.readline().strip()
+
+ if python_exe.endswith(".exe"):
+ # sniffer_py: e.g. C:\Python37\Scripts\sniffer.py
+ sniffer_py = str(os.path.dirname(python_exe)) + '\\Scripts\\sniffer.py'
+
+ cmd = [
+ python_exe,
+ sniffer_py,
+ '-c',
+ str(self.channel),
+ '-u',
+ str(self.port.split(':')[0]),
+ '-b',
+ str(self.port.split(':')[1]),
+ '--crc',
+ '-o',
+ captureFileLocation,
+ ]
+ self.is_active = True
+ ModuleHelper.WriteIntoDebugLogger('OT_Sniffer: [cmd] --> %s' % str(cmd))
+ self.subprocess = subprocess.Popen(cmd)
+
+ except Exception as e:
+ ModuleHelper.WriteIntoDebugLogger('OT_Sniffer: [startSniffer] --> Error: ' + str(e))
+
+ def stopSniffer(self):
+ """
+ Method for ending the sniffer capture.
+ Should stop background capturing, No further file I/O in capture file.
+ """
+ if self.is_active:
+ self.is_active = False
+ if self.subprocess:
+ self.subprocess.terminate()
+ self.subprocess.wait()
+
+ def setChannel(self, channelToCapture):
+ """
+ Method for changing sniffer capture
+ @param channelToCapture : int :
+ channel number is passed to change the channel which is set during the constructor call.
+ """
+ self.channel = channelToCapture
+
+ def getChannel(self):
+ """
+ Method to query sniffer for the channel it is sniffing on
+ @return : int : current capture channel of this sniffer instance.
+ """
+ return self.channel
+
+ def validateFirmwareVersion(self, addressofDevice):
+ """
+ Method to query sniffer firmware version details.
+ Shall be used while discoverSniffer() to validate the sniffer firmware.
+ @param addressofDevice : string :
+ serial com port or IP address,shall be None if need to verify own fireware version.
+ @return : bool : True if expected firmware is found , False if not
+ """
+ return True
+
+ def isSnifferCapturing(self):
+ """
+ method that will return true when sniffer device is capturing
+ @return : bool
+ """
+ return self.is_active
+
+ def getSnifferAddress(self):
+ """
+ Method to retrun the current sniffer's COM/IP address
+ @return : string
+ """
+ return self.port
+
+ def globalReset(self):
+ """Method to reset all the global and class varibaled"""
+ pass
diff --git a/tools/harness-sniffer/README.md b/tools/harness-sniffer/README.md
new file mode 100644
index 0000000..9206e6d
--- /dev/null
+++ b/tools/harness-sniffer/README.md
@@ -0,0 +1,17 @@
+OpenThread Sniffer Integration with Thread Test Harness
+=============================
+After following the steps below, you will be able to run Test Harness with OpenThread sniffer.
+1) require python3 is installed on windows and in the system environment path.
+2) require TestHarness is updated on `ReportEngine.pyd`
+
+## Setup
+1. install pyspinel (for python3 only)
+ ```
+ git clone https://github.com/openthread/pyspinel.git
+ cd <path-to-pyspinel>
+ python setup.py install
+ ```
+2. Copy "OT_Sniffer.py" to `C:\GRL\Thread1.1\Thread_Harness\Sniffer`.
+
+
+
diff --git a/tools/harness-thci/OpenThread.py b/tools/harness-thci/OpenThread.py
index 019c956..f364e84 100644
--- a/tools/harness-thci/OpenThread.py
+++ b/tools/harness-thci/OpenThread.py
@@ -69,6 +69,8 @@
# officially released.
firmwarePrefix = 'OPENTHREAD/'
+ _update_router_status = False
+
# def __init__(self, SerialPort=COMPortName, EUI=MAC_Address):
def __init__(self, **kwargs):
"""initialize the serial port and default network parameters
@@ -255,6 +257,18 @@
ModuleHelper.WriteIntoDebugLogger('sendCommand() Error: ' + str(e))
raise
+ def __disableRouterEligible(self):
+ """disable router role
+ """
+ print('call __disableRouterEligible')
+ try:
+ cmd = 'routereligible disable'
+ self.__sendCommand(cmd)
+ except Exception as e:
+ ModuleHelper.WriteIntoDebugLogger(
+ '__disableRouterEligible() Error: ' + str(e)
+ )
+
def __setDeviceMode(self, mode):
"""set thread device mode:
@@ -489,7 +503,7 @@
IPv6 address dotted-quad format
"""
prefix1 = strIp6Prefix.rstrip('L')
- prefix2 = prefix1.lstrip('0x')
+ prefix2 = self.__lstrip0x(prefix1)
hexPrefix = str(prefix2).ljust(16, '0')
hexIter = iter(hexPrefix)
finalMac = ':'.join(
@@ -500,23 +514,22 @@
strIp6Prefix = prefix[:19]
return strIp6Prefix + '::'
- def __convertLongToString(self, iValue):
+ def __convertLongToHex(self, iValue, fillZeros=None):
"""convert a long hex integer to string
remove '0x' and 'L' return string
Args:
iValue: long integer in hex format
+ fillZeros: pad string with zeros on the left to specified width
Returns:
string of this long integer without '0x' and 'L'
"""
- string = ''
- strValue = str(hex(iValue))
+ fmt = '%x'
+ if fillZeros is not None:
+ fmt = '%%0%dx' % fillZeros
- string = strValue.lstrip('0x')
- string = string.rstrip('L')
-
- return string
+ return fmt % iValue
def __readCommissioningLogs(self, durationInSeconds):
"""read logs during the commissioning process
@@ -760,12 +773,7 @@
address64 = self.mac
if not isinstance(xEUI, str):
- address64 = self.__convertLongToString(xEUI)
-
- # prepend 0 at the beginning
- if len(address64) < 16:
- address64 = address64.zfill(16)
- print(address64)
+ address64 = self.__convertLongToHex(xEUI, 16)
else:
address64 = xEUI
@@ -870,13 +878,7 @@
print(key)
try:
if not isinstance(key, str):
- masterKey = self.__convertLongToString(key)
-
- # prpend '0' at the beginning
- if len(masterKey) < 32:
- masterKey = masterKey.zfill(32)
- print(masterKey)
-
+ masterKey = self.__convertLongToHex(key, 32)
cmd = 'masterkey %s' % masterKey
datasetCmd = 'dataset masterkey %s' % masterKey
else:
@@ -910,7 +912,7 @@
if isinstance(xEUI, str):
macAddr = xEUI
else:
- macAddr = self.__convertLongToString(xEUI)
+ macAddr = self.__convertLongToHex(xEUI)
try:
# if blocked device is itself
@@ -952,7 +954,7 @@
if isinstance(xEUI, str):
macAddr = xEUI
else:
- macAddr = self.__convertLongToString(xEUI)
+ macAddr = self.__convertLongToHex(xEUI)
try:
if self._addressfilterMode != 'whitelist':
@@ -1080,11 +1082,10 @@
# set ROUTER_UPGRADE_THRESHOLD
self.__setRouterUpgradeThreshold(0)
elif eRoleId == Thread_Device_Role.EndDevice_FED:
- # always remain an ED, never request to be a router
print('join as FED')
mode = 'rsdn'
- # set ROUTER_UPGRADE_THRESHOLD
- self.__setRouterUpgradeThreshold(0)
+ # always remain an ED, never request to be a router
+ self.__disableRouterEligible()
elif eRoleId == Thread_Device_Role.EndDevice_MED:
print('join as MED')
mode = 'rsn'
@@ -1093,12 +1094,16 @@
# set Thread device mode with a given role
self.__setDeviceMode(mode)
- self.__setKeySwitchGuardTime(0)
# start OpenThread
self.__startOpenThread()
time.sleep(3)
+ if self._update_router_status and eRoleId == Thread_Device_Role.Router:
+ self.__updateRouterStatus()
+
+ time.sleep(5) # increase delay temporally (+5s) to remedy TH's delay updates
+
return True
except Exception as e:
ModuleHelper.WriteIntoDebugLogger('joinNetwork() Error: ' + str(e))
@@ -1199,7 +1204,7 @@
self._sendline(cmd)
self._expect(cmd)
# wait echo reply
- time.sleep(1)
+ time.sleep(6) # increase delay temporally (+5s) to remedy TH's delay updates
except Exception as e:
ModuleHelper.WriteIntoDebugLogger('ping() Error: ' + str(e))
@@ -1427,7 +1432,7 @@
euiStr = euiStr.rstrip('L')
address64 = ''
if '0x' in euiStr:
- address64 = euiStr.lstrip('0x')
+ address64 = self.__lstrip0x(euiStr)
# prepend 0 at the beginning
if len(address64) < 16:
address64 = address64.zfill(16)
@@ -1660,6 +1665,9 @@
print('%s call setKeySequenceCounter' % self.port)
print(iKeySequenceValue)
try:
+ # avoid key switch guard timer protection for reference device
+ self.__setKeySwitchGuardTime(0)
+
cmd = 'keysequence counter %s' % str(iKeySequenceValue)
if self.__sendCommand(cmd)[-1] == 'Done':
time.sleep(1)
@@ -1692,6 +1700,8 @@
print(iIncrementValue)
currentKeySeq = ''
try:
+ # avoid key switch guard timer protection for reference device
+ self.__setKeySwitchGuardTime(0)
currentKeySeq = self.getKeySequenceCounter()
keySequence = int(currentKeySeq, 10) + iIncrementValue
print(keySequence)
@@ -1871,14 +1881,9 @@
print(xPanId)
try:
if not isinstance(xPanId, str):
- xpanid = self.__convertLongToString(xPanId)
-
- # prepend '0' at the beginning
- if len(xpanid) < 16:
- xpanid = xpanid.zfill(16)
- print(xpanid)
- cmd = 'extpanid %s' % xpanid
- datasetCmd = 'dataset extpanid %s' % xpanid
+ xpanid = self.__convertLongToHex(xPanId, 16)
+ cmd = 'extpanid %s' % xpanid
+ datasetCmd = 'dataset extpanid %s' % xpanid
else:
xpanid = xPanId
cmd = 'extpanid %s' % xpanid
@@ -2122,12 +2127,7 @@
timeout = 500
if not isinstance(xEUI, str):
- eui64 = self.__convertLongToString(xEUI)
-
- # prepend 0 at the beginning
- if len(eui64) < 16:
- eui64 = eui64.zfill(16)
- print(eui64)
+ eui64 = self.__convertLongToHex(xEUI, 16)
else:
eui64 = xEUI
@@ -2317,7 +2317,7 @@
"""
print('%s call MGMT_ED_SCAN' % self.port)
channelMask = ''
- channelMask = '0x' + self.__convertLongToString(
+ channelMask = '0x' + self.__convertLongToHex(
self.__convertChannelMask(listChannelMask)
)
try:
@@ -2350,7 +2350,7 @@
print('%s call MGMT_PANID_QUERY' % self.port)
panid = ''
channelMask = ''
- channelMask = '0x' + self.__convertLongToString(
+ channelMask = '0x' + self.__convertLongToHex(
self.__convertChannelMask(listChannelMask)
)
@@ -2377,7 +2377,7 @@
"""
print('%s call MGMT_ANNOUNCE_BEGIN' % self.port)
channelMask = ''
- channelMask = '0x' + self.__convertLongToString(
+ channelMask = '0x' + self.__convertLongToHex(
self.__convertChannelMask(listChannelMask)
)
try:
@@ -2410,7 +2410,7 @@
cmd += Addr
if len(TLVs) != 0:
- tlvs = ''.join(hex(tlv).lstrip('0x').zfill(2) for tlv in TLVs)
+ tlvs = ''.join('%02x' % tlv for tlv in TLVs)
cmd += ' binary '
cmd += tlvs
@@ -2459,10 +2459,7 @@
if xExtendedPanId is not None:
cmd += ' extpanid '
- xpanid = self.__convertLongToString(xExtendedPanId)
-
- if len(xpanid) < 16:
- xpanid = xpanid.zfill(16)
+ xpanid = self.__convertLongToHex(xExtendedPanId, 16)
cmd += xpanid
@@ -2480,10 +2477,7 @@
if xMasterKey is not None:
cmd += ' masterkey '
- key = self.__convertLongToString(xMasterKey)
-
- if len(key) < 32:
- key = key.zfill(32)
+ key = self.__convertLongToHex(xMasterKey, 32)
cmd += key
@@ -2493,7 +2487,7 @@
if listChannelMask is not None:
cmd += ' channelmask '
- cmd += '0x' + self.__convertLongToString(
+ cmd += '0x' + self.__convertLongToHex(
self.__convertChannelMask(listChannelMask)
)
@@ -2515,7 +2509,7 @@
ModuleHelper.Default_XpanId,
ModuleHelper.Default_NwkName,
)
- pskc = hex(stretchedPskc).rstrip('L').lstrip('0x')
+ pskc = '%x' % stretchedPskc
if len(pskc) < 32:
pskc = pskc.zfill(32)
@@ -2579,7 +2573,7 @@
cmd += locator
if xSteeringData is not None:
- steeringData = self.__convertLongToString(xSteeringData)
+ steeringData = self.__convertLongToHex(xSteeringData)
cmd += '08' + str(len(steeringData) / 2).zfill(2)
cmd += steeringData
@@ -2611,7 +2605,7 @@
cmd += Addr
if len(TLVs) != 0:
- tlvs = ''.join(hex(tlv).lstrip('0x').zfill(2) for tlv in TLVs)
+ tlvs = ''.join('%02x' % tlv for tlv in TLVs)
cmd += ' binary '
cmd += tlvs
@@ -2670,10 +2664,7 @@
if xMasterKey is not None:
cmd += ' masterkey '
- key = self.__convertLongToString(xMasterKey)
-
- if len(key) < 32:
- key = key.zfill(32)
+ key = self.__convertLongToHex(xMasterKey, 32)
cmd += key
@@ -2716,7 +2707,7 @@
cmd = 'commissioner mgmtget'
if len(TLVs) != 0:
- tlvs = ''.join(hex(tlv).lstrip('0x').zfill(2) for tlv in TLVs)
+ tlvs = ''.join('%02x' % tlv for tlv in TLVs)
cmd += ' binary '
cmd += tlvs
@@ -2770,7 +2761,7 @@
if xChannelTlv is not None:
cmd += ' binary '
- cmd += '000300' + hex(xChannelTlv).lstrip('0x').zfill(4)
+ cmd += '000300' + '%04x' % xChannelTlv
print(cmd)
@@ -2844,6 +2835,9 @@
def updateRouterStatus(self):
"""force update to router as if there is child id request"""
+ self._update_router_status = True
+
+ def __updateRouterStatus(self):
print('%s call updateRouterStatus' % self.port)
cmd = 'state'
while True:
@@ -2875,3 +2869,18 @@
return True
else:
return False
+
+ @staticmethod
+ def __lstrip0x(s):
+ """strip 0x at the beginning of a hex string if it exists
+
+ Args:
+ s: hex string
+
+ Returns:
+ hex string with leading 0x stripped
+ """
+ if s.startswith('0x'):
+ s = s[2:]
+
+ return s
diff --git a/tools/harness-thci/OpenThread_WpanCtl.py b/tools/harness-thci/OpenThread_WpanCtl.py
index fc691d8..44ac566 100644
--- a/tools/harness-thci/OpenThread_WpanCtl.py
+++ b/tools/harness-thci/OpenThread_WpanCtl.py
@@ -40,29 +40,12 @@
import serial
from IThci import IThci
-from GRLLibs.UtilityModules.Test import (
- Thread_Device_Role,
- Device_Data_Requirement,
- MacType,
-)
-from GRLLibs.UtilityModules.enums import (
- PlatformDiagnosticPacket_Direction,
- PlatformDiagnosticPacket_Type,
-)
+from GRLLibs.UtilityModules.Test import Thread_Device_Role, Device_Data_Requirement, MacType
+from GRLLibs.UtilityModules.enums import PlatformDiagnosticPacket_Direction, PlatformDiagnosticPacket_Type
from GRLLibs.UtilityModules.ModuleHelper import ModuleHelper
-from GRLLibs.ThreadPacket.PlatformPackets import (
- PlatformDiagnosticPacket,
- PlatformPackets,
-)
+from GRLLibs.ThreadPacket.PlatformPackets import PlatformDiagnosticPacket, PlatformPackets
from GRLLibs.UtilityModules.Plugins.AES_CMAC import Thread_PBKDF2
-"""wpanctl carrier info and wpanctl command prefix"""
-WPAN_CARRIER_USER = 'pi'
-WPAN_CARRIER_PASSWD = 'raspberry'
-WPAN_CARRIER_PROMPT = 'pi@raspberrypi'
-WPAN_INTERFACE = 'wpan0'
-WPANCTL_CMD = 'sudo wpanctl -I ' + WPAN_INTERFACE + ' '
-
"""regex: used to split lines"""
LINESEPX = re.compile(r'\r\n|\n')
@@ -88,22 +71,25 @@
self.handle = None
self.AutoDUTEnable = False
self._is_net = False # whether device is through ser2net
- self.logStatus = {
- 'stop': 'stop',
- 'running': 'running',
- 'pauseReq': 'pauseReq',
- 'paused': 'paused',
- }
+ self.logStatus = {'stop': 'stop', 'running': 'running', 'pauseReq': 'pauseReq', 'paused': 'paused'}
self.logThreadStatus = self.logStatus['stop']
- self.connectType = (
- (kwargs.get('Param5')).strip().lower()
- if kwargs.get('Param5') is not None
- else 'usb'
+ # connection type 'ip' stands for SSH
+ self.connectType = (kwargs.get('Param5')).strip().lower() if kwargs.get('Param5') is not None else 'usb'
+ # comma separated CLI prompt, wpanctl cmd prefix, Wpan interface
+ (self.prompt, self.wpan_cmd_prefix, self.wpan_interface) = (
+ kwargs.get('Param8').strip().split(',') if kwargs.get('Param8') else ['#', 'wpanctl', 'wpan0']
)
+ self.wpan_cmd_prefix += ' '
+ # comma separated setting commands
+ self.precmd = (kwargs.get('Param9')).strip().split(',') if kwargs.get('Param9') else []
if self.connectType == 'ip':
self.dutIpv4 = kwargs.get('TelnetIP')
self.dutPort = kwargs.get('TelnetPort')
self.port = self.dutIpv4 + ':' + self.dutPort
+ # username for SSH
+ self.username = kwargs.get('Param6').strip() if kwargs.get('Param6') else None
+ # password for SSH
+ self.password = kwargs.get('Param7').strip() if kwargs.get('Param7') else None
else:
self.port = kwargs.get('SerialPort')
self.intialize()
@@ -216,10 +202,7 @@
logging.info('%s: sendCommand[%s]', self.port, cmd)
if self.logThreadStatus == self.logStatus['running']:
self.logThreadStatus = self.logStatus['pauseReq']
- while (
- self.logThreadStatus != self.logStatus['paused']
- and self.logThreadStatus != self.logStatus['stop']
- ):
+ while self.logThreadStatus not in (self.logStatus['paused'], self.logStatus['stop']):
pass
ssh_stdin = None
@@ -232,18 +215,12 @@
retry_times -= 1
try:
if self._is_net:
- ssh_stdin, ssh_stdout, ssh_stderr = self.handle.exec_command(
- cmd)
+ ssh_stdin, ssh_stdout, ssh_stderr = self.handle.exec_command(cmd)
else:
self._sendline(cmd)
self._expect(cmd)
except Exception as e:
- logging.exception(
- '%s: failed to send command[%s]: %s',
- self.port,
- cmd,
- str(e),
- )
+ logging.exception('%s: failed to send command[%s]: %s', self.port, cmd, str(e))
if retry_times == 0:
raise
else:
@@ -259,36 +236,22 @@
stderr_lines = ssh_stderr.readlines()
if stderr_lines:
for stderr_line in stderr_lines:
- if re.search(
- r'Not\s+Found|failed\s+with\s+error',
- stderr_line.strip(),
- re.M | re.I,
- ):
+ if re.search(r'Not\s+Found|failed\s+with\s+error', stderr_line.strip(), re.M | re.I):
print('Command failed: %s' % stderr_line)
return 'Fail'
print('Got line: %s' % stderr_line)
- logging.info(
- '%s: the read line is[%s]', self.port, stderr_line
- )
+ logging.info('%s: the read line is[%s]', self.port, stderr_line)
response.append(str(stderr_line.strip()))
elif stdout_lines:
for stdout_line in stdout_lines:
- logging.info(
- '%s: the read line is[%s]', self.port, stdout_line
- )
- if re.search(
- r'Not\s+Found|failed\s+with\s+error',
- stdout_line.strip(),
- re.M | re.I,
- ):
+ logging.info('%s: the read line is[%s]', self.port, stdout_line)
+ if re.search(r'Not\s+Found|failed\s+with\s+error', stdout_line.strip(), re.M | re.I):
print('Command failed')
return 'Fail'
print('Got line: ' + stdout_line)
- logging.info(
- '%s: send command[%s] done!', self.port, cmd
- )
+ logging.info('%s: send command[%s] done!', self.port, cmd)
response.append(str(stdout_line.strip()))
- response.append(WPAN_CARRIER_PROMPT)
+ response.append(self.prompt)
return response
else:
while retry_times > 0:
@@ -297,13 +260,9 @@
logging.info('%s: the read line is[%s]', self.port, line)
if line:
response.append(line)
- if re.match(WPAN_CARRIER_PROMPT, line):
+ if re.match(self.prompt, line):
break
- elif re.search(
- r'Not\s+Found|failed\s+with\s+error',
- line,
- re.M | re.I,
- ):
+ elif re.search(r'Not\s+Found|failed\s+with\s+error', line, re.M | re.I):
print('Command failed')
return 'Fail'
@@ -311,9 +270,7 @@
time.sleep(0.1)
if retry_times == 0:
- raise Exception(
- '%s: failed to find end of response' % self.port
- )
+ raise Exception('%s: failed to find end of response' % self.port)
logging.info('%s: send command[%s] done!', self.port, cmd)
return response
except Exception as e:
@@ -330,9 +287,7 @@
value string without special characters
"""
if isinstance(value, str):
- if (value[0] == '"' and value[-1] == '"') or (
- value[0] == '[' and value[-1] == ']'
- ):
+ if (value[0] == '"' and value[-1] == '"') or (value[0] == '[' and value[-1] == ']'):
return value[1:-1]
return value
@@ -346,11 +301,7 @@
segments[i] = '0' * (4 - len(element)) + element
if empty is not None:
- segments = (
- segments[:empty]
- + ['0000'] * (8 - len(segments) + 1)
- + segments[empty + 1:]
- )
+ segments = segments[:empty] + ['0000'] * (8 - len(segments) + 1) + segments[empty + 1 :]
return ':'.join(segments)
@@ -371,12 +322,10 @@
print('call __setDeviceMode')
try:
- cmd = WPANCTL_CMD + 'setprop Thread:DeviceMode %d' % mode
+ cmd = self.wpan_cmd_prefix + 'setprop Thread:DeviceMode %d' % mode
return self.__sendCommand(cmd)[0] != 'Fail'
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'setDeviceMode() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('setDeviceMode() Error: ' + str(e))
def __setRouterUpgradeThreshold(self, iThreshold):
"""set router upgrade threshold
@@ -391,15 +340,10 @@
"""
print('call __setRouterUpgradeThreshold')
try:
- cmd = (
- WPANCTL_CMD
- + 'setprop Thread:RouterUpgradeThreshold %s' % str(iThreshold)
- )
+ cmd = self.wpan_cmd_prefix + 'setprop Thread:RouterUpgradeThreshold %s' % str(iThreshold)
return self.__sendCommand(cmd)[0] != 'Fail'
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'setRouterUpgradeThreshold() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('setRouterUpgradeThreshold() Error: ' + str(e))
def __setRouterDowngradeThreshold(self, iThreshold):
"""set router downgrade threshold
@@ -415,16 +359,10 @@
"""
print('call __setRouterDowngradeThreshold')
try:
- cmd = (
- WPANCTL_CMD
- + 'setprop Thread:RouterDowngradeThreshold %s'
- % str(iThreshold)
- )
+ cmd = self.wpan_cmd_prefix + 'setprop Thread:RouterDowngradeThreshold %s' % str(iThreshold)
return self.__sendCommand(cmd)[0] != 'Fail'
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'setRouterDowngradeThreshold() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('setRouterDowngradeThreshold() Error: ' + str(e))
def __setRouterSelectionJitter(self, iRouterJitter):
"""set ROUTER_SELECTION_JITTER parameter for REED to upgrade to Router
@@ -438,16 +376,10 @@
"""
print('call _setRouterSelectionJitter')
try:
- cmd = (
- WPANCTL_CMD
- + 'setprop Thread:RouterSelectionJitter %s'
- % str(iRouterJitter)
- )
+ cmd = self.wpan_cmd_prefix + 'setprop Thread:RouterSelectionJitter %s' % str(iRouterJitter)
return self.__sendCommand(cmd) != 'Fail'
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'setRouterSelectionJitter() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('setRouterSelectionJitter() Error: ' + str(e))
def __setAddressfilterMode(self, mode):
"""set address filter mode
@@ -459,9 +391,9 @@
print('call setAddressFilterMode() %s' % mode)
try:
if re.match('list', mode, re.M | re.I):
- cmd = WPANCTL_CMD + 'setprop MAC:' + mode + ':Enabled 1'
+ cmd = self.wpan_cmd_prefix + 'setprop MAC:' + mode + ':Enabled 1'
elif mode == 'disabled':
- cmd = WPANCTL_CMD + 'setprop MAC:' + mode + ':Enabled 0'
+ cmd = self.wpan_cmd_prefix + 'setprop MAC:' + mode + ':Enabled 0'
else:
print('no such option')
return False
@@ -469,9 +401,7 @@
return True
return False
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- '__setAddressFilterMode() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('__setAddressFilterMode() Error: ' + str(e))
def __startOpenThreadWpan(self):
"""start OpenThreadWpan
@@ -517,22 +447,18 @@
else:
pass
- if self.deviceRole in [
- Thread_Device_Role.Leader,
- Thread_Device_Role.Router,
- Thread_Device_Role.REED,
- ]:
+ if self.deviceRole in [Thread_Device_Role.Leader, Thread_Device_Role.Router, Thread_Device_Role.REED]:
self.__setRouterSelectionJitter(1)
if startType == 'form':
- startCmd = WPANCTL_CMD + '%s %s -c %s -T %s ' % (
+ startCmd = self.wpan_cmd_prefix + '%s %s -c %s -T %s ' % (
startType,
self.networkName,
str(self.channel),
nodeType,
)
else:
- startCmd = WPANCTL_CMD + '%s %s -p %s -c %s -T %s ' % (
+ startCmd = self.wpan_cmd_prefix + '%s %s -p %s -c %s -T %s ' % (
startType,
self.networkName,
str(hex(self.panId)),
@@ -543,13 +469,7 @@
if self.__isOpenThreadWpanRunning():
self.isPowerDown = False
if self.hasActiveDatasetToCommit:
- if (
- self.__sendCommand(
- WPANCTL_CMD
- + 'setprop Dataset:Command SetActive'
- )[0]
- == 'Fail'
- ):
+ if self.__sendCommand(self.wpan_cmd_prefix + 'setprop Dataset:Command SetActive')[0] == 'Fail':
raise Exception('failed to commit active dataset')
else:
self.hasActiveDatasetToCommit = False
@@ -558,9 +478,7 @@
else:
return False
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'startOpenThreadWpan() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('startOpenThreadWpan() Error: ' + str(e))
def __stopOpenThreadWpan(self):
"""stop OpenThreadWpan
@@ -572,17 +490,14 @@
print('call stopOpenThreadWpan')
try:
if (
- self.__sendCommand(WPANCTL_CMD + 'leave')[0] != 'Fail'
- and self.__sendCommand(WPANCTL_CMD + 'dataset erase')[0]
- != 'Fail'
+ self.__sendCommand(self.wpan_cmd_prefix + 'leave')[0] != 'Fail'
+ and self.__sendCommand(self.wpan_cmd_prefix + 'dataset erase')[0] != 'Fail'
):
return True
else:
return False
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'stopOpenThreadWpan() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('stopOpenThreadWpan() Error: ' + str(e))
def __isOpenThreadWpanRunning(self):
"""check whether or not OpenThreadWpan is running
@@ -592,12 +507,7 @@
False: OpenThreadWpan is not running
"""
print('call __isOpenThreadWpanRunning')
- if (
- self.__stripValue(
- self.__sendCommand(WPANCTL_CMD + 'getprop -v NCP:State')[0]
- )
- == 'associated'
- ):
+ if self.__stripValue(self.__sendCommand(self.wpan_cmd_prefix + 'getprop -v NCP:State')[0]) == 'associated':
print('*****OpenThreadWpan is running')
return True
else:
@@ -616,16 +526,14 @@
actual router id allocated by leader
"""
routerList = []
- routerList = self.__sendCommand(
- WPANCTL_CMD + 'getprop -v Thread:RouterTable'
- )
+ routerList = self.__sendCommand(self.wpan_cmd_prefix + 'getprop -v Thread:RouterTable')
print(routerList)
print(xRloc16)
for line in routerList:
if re.match(r'\[|\]', line):
continue
- if re.match(WPAN_CARRIER_PROMPT, line, re.M | re.I):
+ if re.match(self.prompt, line, re.M | re.I):
break
router = []
router = self.__stripValue(line).split(',')
@@ -663,34 +571,30 @@
IPv6 address dotted-quad format
"""
prefix1 = strIp6Prefix.rstrip('L')
- prefix2 = prefix1.lstrip('0x')
+ prefix2 = self.__lstrip0x(prefix1)
hexPrefix = str(prefix2).ljust(16, '0')
hexIter = iter(hexPrefix)
- finalMac = ':'.join(
- a + b + c + d
- for a, b, c, d in zip(hexIter, hexIter, hexIter, hexIter)
- )
+ finalMac = ':'.join(a + b + c + d for a, b, c, d in zip(hexIter, hexIter, hexIter, hexIter))
prefix = str(finalMac)
strIp6Prefix = prefix[:19]
return strIp6Prefix + '::'
- def __convertLongToString(self, iValue):
+ def __convertLongToHex(self, iValue, fillZeros=None):
"""convert a long hex integer to string
remove '0x' and 'L' return string
Args:
iValue: long integer in hex format
+ fillZeros: pad string with zeros on the left to specified width
Returns:
string of this long integer without '0x' and 'L'
"""
- string = ''
- strValue = str(hex(iValue))
+ fmt = '%x'
+ if fillZeros is not None:
+ fmt = '%%0%dx' % fillZeros
- string = strValue.lstrip('0x')
- string = string.rstrip('L')
-
- return string
+ return fmt % iValue
def __convertChannelMask(self, channelsArray):
"""convert channelsArray to bitmask format
@@ -732,43 +636,26 @@
def __setChannelMask(self, channelMask):
print('call _setChannelMask')
try:
- cmd = WPANCTL_CMD + 'setprop NCP:ChannelMask %s' % channelMask
- datasetCmd = (
- WPANCTL_CMD
- + 'setprop Dataset:ChannelMaskPage0 %s' % channelMask
- )
+ cmd = self.wpan_cmd_prefix + 'setprop NCP:ChannelMask %s' % channelMask
+ datasetCmd = self.wpan_cmd_prefix + 'setprop Dataset:ChannelMaskPage0 %s' % channelMask
self.hasActiveDatasetToCommit = True
- return (
- self.__sendCommand(cmd)[0] != 'Fail'
- and self.__sendCommand(datasetCmd)[0] != 'Fail'
- )
+ return self.__sendCommand(cmd)[0] != 'Fail' and self.__sendCommand(datasetCmd)[0] != 'Fail'
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'setChannelMask() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('setChannelMask() Error: ' + str(e))
def __setSecurityPolicy(self, securityPolicySecs, securityPolicyFlags):
print('call _setSecurityPolicy')
try:
- cmd1 = (
- WPANCTL_CMD
- + 'setprop Dataset:SecPolicy:KeyRotation %s'
- % str(securityPolicySecs)
- )
+ cmd1 = self.wpan_cmd_prefix + 'setprop Dataset:SecPolicy:KeyRotation %s' % str(securityPolicySecs)
if securityPolicyFlags == 'onrcb':
- cmd2 = WPANCTL_CMD + 'setprop Dataset:SecPolicy:Flags 0xff'
+ cmd2 = self.wpan_cmd_prefix + 'setprop Dataset:SecPolicy:Flags 0xff'
else:
print('unknown policy flag :' + securityPolicyFlags)
return False
self.hasActiveDatasetToCommit = True
- return (
- self.__sendCommand(cmd1) != 'Fail'
- and self.__sendCommand(cmd2) != 'Fail'
- )
+ return self.__sendCommand(cmd1) != 'Fail' and self.__sendCommand(cmd2) != 'Fail'
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'setSecurityPolicy() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('setSecurityPolicy() Error: ' + str(e))
def __setKeySwitchGuardTime(self, iKeySwitchGuardTime):
""" set the Key switch guard time
@@ -783,34 +670,26 @@
print('%s call setKeySwitchGuardTime' % self.port)
print(iKeySwitchGuardTime)
try:
- cmd = WPANCTL_CMD + 'setprop Network:KeySwitchGuardTime %s' % str(
- iKeySwitchGuardTime
- )
+ cmd = self.wpan_cmd_prefix + 'setprop Network:KeySwitchGuardTime %s' % str(iKeySwitchGuardTime)
if self.__sendCommand(cmd)[0] != 'Fail':
time.sleep(1)
return True
else:
return False
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'setKeySwitchGuardTime() Error; ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('setKeySwitchGuardTime() Error; ' + str(e))
def __getCommissionerSessionId(self):
""" get the commissioner session id allocated from Leader """
print('%s call getCommissionerSessionId' % self.port)
- return self.__sendCommand(
- WPANCTL_CMD + 'getprop -v Commissioner:SessionId'
- )[0]
+ return self.__sendCommand(self.wpan_cmd_prefix + 'getprop -v Commissioner:SessionId')[0]
def __getJoinerState(self):
""" get joiner state """
maxDuration = 150 # seconds
t_end = time.time() + maxDuration
while time.time() < t_end:
- joinerState = self.__stripValue(
- self.__sendCommand('sudo wpanctl getprop -v NCP:State')[0]
- )
+ joinerState = self.__stripValue(self.__sendCommand(self.wpan_cmd_prefix + 'getprop -v NCP:State')[0])
if joinerState == 'offline:commissioned':
return True
elif joinerState == 'associating:credentials-needed':
@@ -826,9 +705,7 @@
try:
self.handle = serial.Serial(self.port, 115200, timeout=0.2)
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'open serial error ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('open serial error ' + str(e))
try:
attempts = 0
@@ -848,7 +725,7 @@
continue
if 'login' in input_data:
- self.handle.write(WPAN_CARRIER_USER + '\n')
+ self.handle.write(self.username + '\n')
time.sleep(0.3)
print('user prompted')
user_prompted = True
@@ -856,14 +733,16 @@
elif 'Password' in input_data:
print('password prompted')
time.sleep(0.3)
- self.handle.write(WPAN_CARRIER_PASSWD + '\n')
+ self.handle.write(self.password + '\n')
pwd_prompted = True
- elif WPAN_CARRIER_PROMPT in input_data:
+ elif self.prompt in input_data:
print('login success (serial)')
time.sleep(0.3)
self.deviceConnected = True
- self.handle.write('stty cols 256\n')
+ for precmd in self.precmd:
+ self.handle.write(precmd + '\n')
+ time.sleep(0.3)
time.sleep(1)
break
if not self.deviceConnected:
@@ -871,34 +750,35 @@
else:
self._is_net = False
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'connect to serial Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('connect to serial Error: ' + str(e))
elif self.connectType == 'ip':
print('My IP: %s Port: %s' % (self.dutIpv4, self.dutPort))
try:
import paramiko
- self.handle = paramiko.SSHClient()
- self.handle.set_missing_host_key_policy(
- paramiko.AutoAddPolicy()
- )
- self.handle.connect(
- self.dutIpv4,
- port=self.dutPort,
- username=WPAN_CARRIER_USER,
- password=WPAN_CARRIER_PASSWD,
- )
+ if not self.password:
+ transport = paramiko.Transport((self.dutIpv4, int(self.dutPort)))
+ transport.start_client()
+ transport.auth_none(self.username)
+ self.handle = paramiko.SSHClient()
+ self.handle.set_missing_host_key_policy(paramiko.AutoAddPolicy())
+ self.handle._transport = transport
+ else:
+ self.handle = paramiko.SSHClient()
+ self.handle.set_missing_host_key_policy(paramiko.AutoAddPolicy())
+ self.handle.connect(
+ self.dutIpv4, port=int(self.dutPort), username=self.username, password=self.password
+ )
print('login success (ssh)')
self.deviceConnected = True
- self.handle.exec_command('stty cols 256\n')
- time.sleep(1)
+ for precmd in self.precmd:
+ self.handle.exec_command(precmd + '\n')
+ time.sleep(0.5)
self._is_net = True
+
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'connect to ssh Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('connect to ssh Error: ' + str(e))
else:
raise Exception('Unknown port schema')
@@ -910,9 +790,7 @@
self.handle.close()
self.handle = None
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'closeConnection() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('closeConnection() Error: ' + str(e))
def intialize(self):
"""initialize the serial port with baudrate, timeout parameters"""
@@ -927,16 +805,11 @@
if self.firmwarePrefix not in self.UIStatusMsg:
self.deviceConnected = False
self.UIStatusMsg = (
- 'Firmware Not Matching Expecting '
- + self.firmwarePrefix
- + ' Now is '
- + self.UIStatusMsg
+ 'Firmware Not Matching Expecting ' + self.firmwarePrefix + ' Now is ' + self.UIStatusMsg
)
- raise Exception(
- 'Err: OpenThread device Firmware not matching..'
- )
- self.__sendCommand(WPANCTL_CMD + 'leave')
- self.__sendCommand(WPANCTL_CMD + 'dataset erase')
+ raise Exception('Err: OpenThread device Firmware not matching..')
+ self.__sendCommand(self.wpan_cmd_prefix + 'leave')
+ self.__sendCommand(self.wpan_cmd_prefix + 'dataset erase')
else:
raise Exception('Err: Device not connected ..')
@@ -956,19 +829,12 @@
print('%s call setNetworkName' % self.port)
try:
- cmd = WPANCTL_CMD + 'setprop -s Network:Name %s' % networkName
- datasetCmd = (
- WPANCTL_CMD + 'setprop Dataset:NetworkName %s' % networkName
- )
+ cmd = self.wpan_cmd_prefix + 'setprop -s Network:Name %s' % networkName
+ datasetCmd = self.wpan_cmd_prefix + 'setprop Dataset:NetworkName %s' % networkName
self.hasActiveDatasetToCommit = True
- return (
- self.__sendCommand(cmd)[0] != 'Fail'
- and self.__sendCommand(datasetCmd)[0] != 'Fail'
- )
+ return self.__sendCommand(cmd)[0] != 'Fail' and self.__sendCommand(datasetCmd)[0] != 'Fail'
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'setNetworkName() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('setNetworkName() Error: ' + str(e))
def setChannel(self, channel=15):
"""set channel of Thread device operates on.
@@ -986,20 +852,17 @@
print('%s call setChannel' % self.port)
try:
- cmd = WPANCTL_CMD + 'setprop NCP:Channel %s' % channel
- datasetCmd = WPANCTL_CMD + 'setprop Dataset:Channel %s' % channel
+ cmd = self.wpan_cmd_prefix + 'setprop NCP:Channel %s' % channel
+ datasetCmd = self.wpan_cmd_prefix + 'setprop Dataset:Channel %s' % channel
self.hasActiveDatasetToCommit = True
- return (
- self.__sendCommand(cmd)[0] != 'Fail'
- and self.__sendCommand(datasetCmd)[0] != 'Fail'
- )
+ return self.__sendCommand(cmd)[0] != 'Fail' and self.__sendCommand(datasetCmd)[0] != 'Fail'
except Exception as e:
ModuleHelper.WriteIntoDebugLogger('setChannel() Error: ' + str(e))
def getChannel(self):
"""get current channel"""
print('%s call getChannel' % self.port)
- return self.__sendCommand(WPANCTL_CMD + 'getprop -v NCP:Channel')[0]
+ return self.__sendCommand(self.wpan_cmd_prefix + 'getprop -v NCP:Channel')[0]
def setMAC(self, xEUI):
"""set the extended addresss of Thread device
@@ -1019,16 +882,11 @@
address64 = self.mac
if not isinstance(xEUI, str):
- address64 = self.__convertLongToString(xEUI)
-
- # prepend 0 at the beginning
- if len(address64) < 16:
- address64 = address64.zfill(16)
- print(address64)
+ address64 = self.__convertLongToHex(xEUI, 16)
else:
address64 = xEUI
- cmd = WPANCTL_CMD + 'setprop NCP:MACAddress %s' % address64
+ cmd = self.wpan_cmd_prefix + 'setprop NCP:MACAddress %s' % address64
if self.__sendCommand(cmd)[0] != 'Fail':
self.mac = address64
@@ -1056,21 +914,15 @@
else:
if bType == MacType.FactoryMac:
macAddr64 = self.__stripValue(
- self.__sendCommand(
- WPANCTL_CMD + 'getprop -v NCP:HardwareAddress'
- )[0]
+ self.__sendCommand(self.wpan_cmd_prefix + 'getprop -v NCP:HardwareAddress')[0]
)
elif bType == MacType.HashMac:
macAddr64 = self.__stripValue(
- self.__sendCommand(
- WPANCTL_CMD + 'getprop -v NCP:MACAddress'
- )[0]
+ self.__sendCommand(self.wpan_cmd_prefix + 'getprop -v NCP:MACAddress')[0]
)
else:
macAddr64 = self.__stripValue(
- self.__sendCommand(
- WPANCTL_CMD + 'getprop -v NCP:ExtendedAddress'
- )[0]
+ self.__sendCommand(self.wpan_cmd_prefix + 'getprop -v NCP:ExtendedAddress')[0]
)
return int(macAddr64, 16)
@@ -1078,41 +930,26 @@
def getLL64(self):
"""get link local unicast IPv6 address"""
print('%s call getLL64' % self.port)
- return self.__stripValue(
- self.__sendCommand(
- WPANCTL_CMD + 'getprop -v IPv6:LinkLocalAddress'
- )[0]
- )
+ return self.__stripValue(self.__sendCommand(self.wpan_cmd_prefix + 'getprop -v IPv6:LinkLocalAddress')[0])
def getMLEID(self):
"""get mesh local endpoint identifier address"""
print('%s call getMLEID' % self.port)
- return self.__stripValue(
- self.__sendCommand(
- WPANCTL_CMD + 'getprop -v IPv6:MeshLocalAddress'
- )[0]
- )
+ return self.__stripValue(self.__sendCommand(self.wpan_cmd_prefix + 'getprop -v IPv6:MeshLocalAddress')[0])
def getRloc16(self):
"""get rloc16 short address"""
print('%s call getRloc16' % self.port)
- rloc16 = self.__sendCommand(WPANCTL_CMD + 'getprop -v Thread:RLOC16')[
- 0
- ]
+ rloc16 = self.__sendCommand(self.wpan_cmd_prefix + 'getprop -v Thread:RLOC16')[0]
return int(rloc16, 16)
def getRloc(self):
"""get router locator unicast IPv6 address"""
print('%s call getRloc' % self.port)
- prefix = self.__stripValue(
- self.__sendCommand(
- WPANCTL_CMD + 'getprop -v IPv6:MeshLocalPrefix'
- )[0]
- )
+ prefix = self.__stripValue(self.__sendCommand(self.wpan_cmd_prefix + 'getprop -v IPv6:MeshLocalPrefix')[0])
mlprefix = prefix.split('/')[0]
- rloc16 = self.__sendCommand(WPANCTL_CMD + 'getprop -v Thread:RLOC16')[
- 0
- ].lstrip('0x')
+ rloc16 = self.__lstrip0x(self.__sendCommand(self.wpan_cmd_prefix + 'getprop -v Thread:RLOC16')[0])
+
print('prefix: %s' % prefix)
print('mlprefix: %s ' % mlprefix)
print('rloc16: %s' % rloc16)
@@ -1128,24 +965,18 @@
print('%s call getGlobal' % self.port)
globalAddrs = []
- mleid = self.__stripValue(
- self.__sendCommand(
- WPANCTL_CMD + 'getprop -v IPv6:MeshLocalAddress'
- )[0]
- )
+ mleid = self.__stripValue(self.__sendCommand(self.wpan_cmd_prefix + 'getprop -v IPv6:MeshLocalAddress')[0])
mleid = ModuleHelper.GetFullIpv6Address(mleid).lower()
- addrs = self.__sendCommand(
- WPANCTL_CMD + 'getprop -v IPv6:AllAddresses'
- )
+ addrs = self.__sendCommand(self.wpan_cmd_prefix + 'getprop -v IPv6:AllAddresses')
# find rloc address firstly as a reference for current mesh local prefix as for some TCs,
# mesh local prefix may be updated through pending dataset management.
for ip6AddrItem in addrs:
if re.match(r'\[|\]', ip6AddrItem):
continue
- if re.match(WPAN_CARRIER_PROMPT, ip6AddrItem, re.M | re.I):
+ if re.match(self.prompt, ip6AddrItem, re.M | re.I):
break
ip6AddrItem = ip6AddrItem.strip()
ip6Addr = self.__stripValue(ip6AddrItem).split(' ')[0]
@@ -1180,33 +1011,19 @@
try:
if not isinstance(key, str):
- masterKey = self.__convertLongToString(key)
-
- # prpend '0' at the beginning
- if len(masterKey) < 32:
- masterKey = masterKey.zfill(32)
-
- cmd = WPANCTL_CMD + 'setprop Network:Key %s' % masterKey
- datasetCmd = (
- WPANCTL_CMD + 'setprop Dataset:MasterKey %s' % masterKey
- )
+ masterKey = self.__convertLongToHex(key, 32)
+ cmd = self.wpan_cmd_prefix + 'setprop Network:Key %s' % masterKey
+ datasetCmd = self.wpan_cmd_prefix + 'setprop Dataset:MasterKey %s' % masterKey
else:
masterKey = key
- cmd = WPANCTL_CMD + 'setprop Network:Key %s' % masterKey
- datasetCmd = (
- WPANCTL_CMD + 'setprop Dataset:MasterKey %s' % masterKey
- )
+ cmd = self.wpan_cmd_prefix + 'setprop Network:Key %s' % masterKey
+ datasetCmd = self.wpan_cmd_prefix + 'setprop Dataset:MasterKey %s' % masterKey
self.networkKey = masterKey
self.hasActiveDatasetToCommit = True
- return (
- self.__sendCommand(cmd)[0] != 'Fail'
- and self.__sendCommand(datasetCmd)[0] != 'Fail'
- )
+ return self.__sendCommand(cmd)[0] != 'Fail' and self.__sendCommand(datasetCmd)[0] != 'Fail'
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'setNetworkkey() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('setNetworkkey() Error: ' + str(e))
def addBlockedMAC(self, xEUI):
"""add a given extended address to the blacklist entry
@@ -1223,7 +1040,7 @@
if isinstance(xEUI, str):
macAddr = xEUI
else:
- macAddr = self.__convertLongToString(xEUI)
+ macAddr = self.__convertLongToHex(xEUI)
try:
# if blocked device is itself
@@ -1235,7 +1052,7 @@
if self.__setAddressfilterMode('Blacklist'):
self._addressfilterMode = 'blacklist'
- cmd = WPANCTL_CMD + 'insert MAC:Blacklist:Entries %s' % macAddr
+ cmd = self.wpan_cmd_prefix + 'insert MAC:Blacklist:Entries %s' % macAddr
ret = self.__sendCommand(cmd)[0] != 'Fail'
self._addressfilterSet.add(macAddr)
@@ -1245,9 +1062,7 @@
return ret
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'addBlockedMAC() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('addBlockedMAC() Error: ' + str(e))
def addAllowMAC(self, xEUI):
"""add a given extended address to the whitelist addressfilter
@@ -1264,14 +1079,14 @@
if isinstance(xEUI, str):
macAddr = xEUI
else:
- macAddr = self.__convertLongToString(xEUI)
+ macAddr = self.__convertLongToHex(xEUI)
try:
if self._addressfilterMode != 'whitelist':
if self.__setAddressfilterMode('Whitelist'):
self._addressfilterMode = 'whitelist'
- cmd = WPANCTL_CMD + 'insert MAC:Whitelist:Entries %s' % macAddr
+ cmd = self.wpan_cmd_prefix + 'insert MAC:Whitelist:Entries %s' % macAddr
ret = self.__sendCommand(cmd)[0] != 'Fail'
self._addressfilterSet.add(macAddr)
@@ -1302,15 +1117,13 @@
if self.__setAddressfilterMode('disable'):
self._addressfilterMode = 'disable'
# clear ops
- cmd = WPANCTL_CMD + 'remove MAC:Blocklist:Entries'
+ cmd = self.wpan_cmd_prefix + 'remove MAC:Blocklist:Entries'
if self.__sendCommand(cmd)[0] != 'Fail':
self._addressfilterSet.clear()
return True
return False
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'clearBlockList() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('clearBlockList() Error: ' + str(e))
def clearAllowList(self):
"""clear all entries in whitelist table
@@ -1331,22 +1144,18 @@
if self.__setAddressfilterMode('disable'):
self._addressfilterMode = 'disable'
# clear ops
- cmd = WPANCTL_CMD + 'insert MAC:Whitelist:Entries'
+ cmd = self.wpan_cmd_prefix + 'insert MAC:Whitelist:Entries'
if self.__sendCommand(cmd)[0] != 'Fail':
self._addressfilterSet.clear()
return True
return False
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'clearAllowList() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('clearAllowList() Error: ' + str(e))
def getDeviceRole(self):
"""get current device role in Thread Network"""
print('%s call getDeviceRole' % self.port)
- return self.__stripValue(
- self.__sendCommand(WPANCTL_CMD + 'getprop -v Network:NodeType')[0]
- )
+ return self.__stripValue(self.__sendCommand(self.wpan_cmd_prefix + 'getprop -v Network:NodeType')[0])
def joinNetwork(self, eRoleId):
"""make device ready to join the Thread Network with a given role
@@ -1413,7 +1222,6 @@
# set Thread device mode with a given role
self.__setDeviceMode(mode)
- self.__setKeySwitchGuardTime(0) # temporally
time.sleep(0.1)
# start OpenThreadWpan
self.__startOpenThreadWpan()
@@ -1433,9 +1241,7 @@
print('OpenThreadWpan is not running')
return None
- return self.__sendCommand(
- WPANCTL_CMD + 'getprop -v Network:PartitionId'
- )[0]
+ return self.__sendCommand(self.wpan_cmd_prefix + 'getprop -v Network:PartitionId')[0]
def getParentAddress(self):
"""get Thread device's parent extended address and rloc16 short address
@@ -1445,23 +1251,18 @@
"""
print('%s call getParentAddress' % self.port)
parentInfo = []
- parentInfo = self.__stripValue(
- self.__sendCommand(WPANCTL_CMD + 'getprop -v Thread:Parent')
- ).split(' ')
+ parentInfo = self.__stripValue(self.__sendCommand(self.wpan_cmd_prefix + 'getprop -v Thread:Parent')).split(
+ ' '
+ )
return parentInfo[0]
def powerDown(self):
"""power down the OpenThreadWpan"""
print('%s call powerDown' % self.port)
- if (
- self.__sendCommand(
- WPANCTL_CMD + 'setprop Daemon:AutoAssociateAfterReset false'
- )[0]
- != 'Fail'
- ):
+ if self.__sendCommand(self.wpan_cmd_prefix + 'setprop Daemon:AutoAssociateAfterReset false')[0] != 'Fail':
time.sleep(0.5)
- if self.__sendCommand(WPANCTL_CMD + 'reset')[0] != 'Fail':
+ if self.__sendCommand(self.wpan_cmd_prefix + 'reset')[0] != 'Fail':
self.isPowerDown = True
return True
else:
@@ -1476,25 +1277,15 @@
self._connect()
self.isPowerDown = False
- if self.__sendCommand(WPANCTL_CMD + 'attach')[0] != 'Fail':
+ if self.__sendCommand(self.wpan_cmd_prefix + 'attach')[0] != 'Fail':
time.sleep(3)
else:
return False
- if (
- self.__sendCommand(
- WPANCTL_CMD + 'setprop Daemon:AutoAssociateAfterReset true'
- )[0]
- == 'Fail'
- ):
+ if self.__sendCommand(self.wpan_cmd_prefix + 'setprop Daemon:AutoAssociateAfterReset true')[0] == 'Fail':
return False
- if (
- self.__stripValue(
- self.__sendCommand(WPANCTL_CMD + 'getprop -v NCP:State')[0]
- )
- != 'associated'
- ):
+ if self.__stripValue(self.__sendCommand(self.wpan_cmd_prefix + 'getprop -v NCP:State')[0]) != 'associated':
print('powerUp failed')
return False
else:
@@ -1509,13 +1300,10 @@
"""
print('%s call reboot' % self.port)
try:
- self._sendline(WPANCTL_CMD + 'reset')
+ self._sendline(self.wpan_cmd_prefix + 'reset')
self.isPowerDown = True
- if (
- self.__sendCommand(WPANCTL_CMD + 'getprop -v NCP:State')[0]
- != 'associated'
- ):
+ if self.__sendCommand(self.wpan_cmd_prefix + 'getprop -v NCP:State')[0] != 'associated':
print('[FAIL] reboot')
return False
else:
@@ -1534,15 +1322,9 @@
print('%s call ping' % self.port)
print('destination: %s' % destination)
try:
- cmd = 'ping %s -c 1 -s %s -I %s' % (
- destination,
- str(length),
- WPAN_INTERFACE,
- )
+ cmd = 'ping %s -c 1 -s %s -I %s' % (destination, str(length), self.wpan_interface)
if self._is_net:
- ssh_stdin, ssh_stdout, ssh_stderr = self.handle.exec_command(
- cmd
- )
+ ssh_stdin, ssh_stdout, ssh_stderr = self.handle.exec_command(cmd)
else:
self._sendline(cmd)
self._expect(cmd)
@@ -1562,31 +1344,21 @@
print('%s call multicast_Ping' % self.port)
print('destination: %s' % destination)
try:
- cmd = 'ping %s -c 1 -s %s -I %s' % (
- destination,
- str(length),
- WPAN_INTERFACE,
- )
+ cmd = 'ping %s -c 1 -s %s -I %s' % (destination, str(length), self.wpan_interface)
if self._is_net:
- ssh_stdin, ssh_stdout, ssh_stderr = self.handle.exec_command(
- cmd
- )
+ ssh_stdin, ssh_stdout, ssh_stderr = self.handle.exec_command(cmd)
else:
self._sendline(cmd)
self._expect(cmd)
# wait echo reply
time.sleep(1)
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'multicast_ping() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('multicast_ping() Error: ' + str(e))
def getVersionNumber(self):
"""get OpenThreadWpan stack firmware version number"""
print('%s call getVersionNumber' % self.port)
- versionStr = self.__sendCommand(
- WPANCTL_CMD + 'getprop -v NCP:Version'
- )[0]
+ versionStr = self.__sendCommand(self.wpan_cmd_prefix + 'getprop -v NCP:Version')[0]
return self.__stripValue(versionStr)
@@ -1608,13 +1380,10 @@
panid = str(hex(xPAN))
print(panid)
- cmd = WPANCTL_CMD + 'setprop -s Network:PANID %s' % panid
- datasetCmd = WPANCTL_CMD + 'setprop Dataset:PanId %s' % panid
+ cmd = self.wpan_cmd_prefix + 'setprop -s Network:PANID %s' % panid
+ datasetCmd = self.wpan_cmd_prefix + 'setprop Dataset:PanId %s' % panid
self.hasActiveDatasetToCommit = True
- return (
- self.__sendCommand(cmd)[0] != 'Fail'
- and self.__sendCommand(datasetCmd)[0] != 'Fail'
- )
+ return self.__sendCommand(cmd)[0] != 'Fail' and self.__sendCommand(datasetCmd)[0] != 'Fail'
except Exception as e:
ModuleHelper.WriteIntoDebugLogger('setPANID() Error: ' + str(e))
@@ -1623,11 +1392,11 @@
print('%s call reset' % self.port)
try:
if self._is_net:
- self.__sendCommand(WPANCTL_CMD + 'leave')
+ self.__sendCommand(self.wpan_cmd_prefix + 'leave')
else:
- self._sendline(WPANCTL_CMD + 'leave')
+ self._sendline(self.wpan_cmd_prefix + 'leave')
- self.__sendCommand(WPANCTL_CMD + 'dataset erase')
+ self.__sendCommand(self.wpan_cmd_prefix + 'dataset erase')
time.sleep(2)
if not self._is_net:
self._read()
@@ -1658,9 +1427,7 @@
cmd = 'releaserouterid %s' % routerId
return self.__sendCommand(cmd)[0] != 'Fail'
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'removeRouter() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('removeRouter() Error: ' + str(e))
def setDefaultValues(self):
"""set default mandatory Thread Network parameter value"""
@@ -1701,9 +1468,7 @@
try:
self.setMAC(self.mac)
self.__setChannelMask(self.channelMask)
- self.__setSecurityPolicy(
- self.securityPolicySecs, self.securityPolicyFlags
- )
+ self.__setSecurityPolicy(self.securityPolicySecs, self.securityPolicyFlags)
self.setChannel(self.channel)
self.setPANID(self.panId)
self.setXpanId(self.xpanId)
@@ -1713,9 +1478,7 @@
self.setPSKc(self.pskc)
self.setActiveTimestamp(self.activetimestamp)
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'setDefaultValue() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('setDefaultValue() Error: ' + str(e))
def getDeviceConncetionStatus(self):
"""check if serial port connection is ready or not"""
@@ -1757,15 +1520,11 @@
False: fail to set the data poll period for sleepy end device
"""
try:
- cmd = WPANCTL_CMD + 'setprop NCP:SleepyPollInterval %s' % str(
- iPollPeriod
- )
+ cmd = self.wpan_cmd_prefix + 'setprop NCP:SleepyPollInterval %s' % str(iPollPeriod)
print(cmd)
return self.__sendCommand(cmd)[0] != 'Fail'
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- '__setPollingRate() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('__setPollingRate() Error: ' + str(e))
def setLinkQuality(self, EUIadr, LinkQuality):
"""set custom LinkQualityIn for all receiving messages from the specified EUIadr
@@ -1830,15 +1589,9 @@
print('%s call resetAndRejoin' % self.port)
print(timeout)
try:
- if (
- self.__sendCommand(
- WPANCTL_CMD
- + 'setprop Daemon:AutoAssociateAfterReset false'
- )[0]
- != 'Fail'
- ):
+ if self.__sendCommand(self.wpan_cmd_prefix + 'setprop Daemon:AutoAssociateAfterReset false')[0] != 'Fail':
time.sleep(0.5)
- if self.__sendCommand(WPANCTL_CMD + 'reset')[0] != 'Fail':
+ if self.__sendCommand(self.wpan_cmd_prefix + 'reset')[0] != 'Fail':
self.isPowerDown = True
else:
return False
@@ -1849,43 +1602,23 @@
if self.deviceRole == Thread_Device_Role.SED:
self.__setPollPeriod(self.__sedPollPeriod)
- if self.__sendCommand(WPANCTL_CMD + 'attach')[0] != 'Fail':
+ if self.__sendCommand(self.wpan_cmd_prefix + 'attach')[0] != 'Fail':
time.sleep(3)
else:
return False
- if (
- self.__sendCommand(
- WPANCTL_CMD + 'setprop Daemon:AutoAssociateAfterReset true'
- )[0]
- == 'Fail'
- ):
+ if self.__sendCommand(self.wpan_cmd_prefix + 'setprop Daemon:AutoAssociateAfterReset true')[0] == 'Fail':
return False
- if (
- self.__stripValue(
- self.__sendCommand(WPANCTL_CMD + 'getprop -v NCP:State')[0]
- )
- != 'associated'
- ):
+ if self.__stripValue(self.__sendCommand(self.wpan_cmd_prefix + 'getprop -v NCP:State')[0]) != 'associated':
print('[FAIL] reset and rejoin')
return False
return True
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'resetAndRejoin() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('resetAndRejoin() Error: ' + str(e))
def configBorderRouter(
- self,
- P_Prefix,
- P_stable=1,
- P_default=1,
- P_slaac_preferred=0,
- P_Dhcp=0,
- P_preference=0,
- P_on_mesh=1,
- P_nd_dns=0,
+ self, P_Prefix, P_stable=1, P_default=1, P_slaac_preferred=0, P_Dhcp=0, P_preference=0, P_on_mesh=1, P_nd_dns=0
):
"""configure the border router with a given prefix entry parameters
@@ -1924,11 +1657,7 @@
if P_on_mesh == 1:
parameter += ' -o'
- cmd = WPANCTL_CMD + 'add-prefix %s %s -P %d' % (
- prefix,
- parameter,
- P_preference,
- )
+ cmd = self.wpan_cmd_prefix + 'add-prefix %s %s -P %d' % (prefix, parameter, P_preference)
print(parameter)
print(cmd)
if self.__sendCommand(cmd)[0] != 'Fail':
@@ -1936,9 +1665,7 @@
else:
return False
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'configBorderRouter() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('configBorderRouter() Error: ' + str(e))
def setNetworkIDTimeout(self, iNwkIDTimeOut):
"""set networkid timeout for OpenThreadWpan
@@ -1967,15 +1694,11 @@
print('%s call setKeepAliveTimeOut' % self.port)
print(iTimeOut)
try:
- cmd = WPANCTL_CMD + 'setprop NCP:SleepyPollInterval %s' % str(
- iTimeOut * 1000
- )
+ cmd = self.wpan_cmd_prefix + 'setprop NCP:SleepyPollInterval %s' % str(iTimeOut * 1000)
print(cmd)
return self.__sendCommand(cmd)[0] != 'Fail'
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'setKeepAliveTimeOut() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('setKeepAliveTimeOut() Error: ' + str(e))
def setKeySequenceCounter(self, iKeySequenceValue):
""" set the Key sequence counter corresponding to Thread Network master key
@@ -1990,26 +1713,23 @@
print('%s call setKeySequenceCounter' % self.port)
print(iKeySequenceValue)
try:
- cmd = WPANCTL_CMD + 'setprop Network:KeyIndex %s' % str(
- iKeySequenceValue
- )
+ # avoid key switch guard timer protection for reference device
+ self.__setKeySwitchGuardTime(0)
+
+ cmd = self.wpan_cmd_prefix + 'setprop Network:KeyIndex %s' % str(iKeySequenceValue)
if self.__sendCommand(cmd)[0] != 'Fail':
time.sleep(1)
return True
else:
return False
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'setKeySequenceCounter() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('setKeySequenceCounter() Error: ' + str(e))
def getKeySequenceCounter(self):
"""get current Thread Network key sequence"""
print('%s call getKeySequenceCounter' % self.port)
keySequence = ''
- keySequence = self.__sendCommand(
- WPANCTL_CMD + 'getprop -v Network:KeyIndex'
- )[0]
+ keySequence = self.__sendCommand(self.wpan_cmd_prefix + 'getprop -v Network:KeyIndex')[0]
return keySequence
def incrementKeySequenceCounter(self, iIncrementValue=1):
@@ -2026,14 +1746,15 @@
print(iIncrementValue)
currentKeySeq = ''
try:
+ # avoid key switch guard timer protection for reference device
+ self.__setKeySwitchGuardTime(0)
+
currentKeySeq = self.getKeySequenceCounter()
keySequence = int(currentKeySeq, 10) + iIncrementValue
print(keySequence)
return self.setKeySequenceCounter(keySequence)
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'incrementKeySequenceCounter() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('incrementKeySequenceCounter() Error: ' + str(e))
def setNetworkDataRequirement(self, eDataRequirement):
"""set whether the Thread device requires the full network data
@@ -2072,15 +1793,9 @@
prefix = self.__convertIp6PrefixStringToIp6Address(str(P_Prefix))
try:
if P_stable:
- cmd = WPANCTL_CMD + 'add-route %s -l 64 -p %d' % (
- prefix,
- R_Preference,
- )
+ cmd = self.wpan_cmd_prefix + 'add-route %s -l 64 -p %d' % (prefix, R_Preference)
else:
- cmd = WPANCTL_CMD + 'add-route %s -l 64 -p %d -n' % (
- prefix,
- R_Preference,
- )
+ cmd = self.wpan_cmd_prefix + 'add-route %s -l 64 -p %d -n' % (prefix, R_Preference)
print(cmd)
if self.__sendCommand(cmd)[0] != 'Fail':
@@ -2088,9 +1803,7 @@
else:
return False
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'configExternalRouter() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('configExternalRouter() Error: ' + str(e))
def getNeighbouringRouters(self):
"""get neighboring routers information
@@ -2125,30 +1838,18 @@
print(xPanId)
try:
if not isinstance(xPanId, str):
- xpanid = self.__convertLongToString(xPanId)
+ xpanid = self.__convertLongToHex(xPanId, 16)
- # prepend '0' at the beginning
- if len(xpanid) < 16:
- xpanid = xpanid.zfill(16)
- print(xpanid)
- cmd = WPANCTL_CMD + 'setprop Network:XPANID %s' % xpanid
- datasetCmd = (
- WPANCTL_CMD
- + 'setprop Dataset:ExtendedPanId %s' % xpanid
- )
+ cmd = self.wpan_cmd_prefix + 'setprop Network:XPANID %s' % xpanid
+ datasetCmd = self.wpan_cmd_prefix + 'setprop Dataset:ExtendedPanId %s' % xpanid
else:
xpanid = xPanId
- cmd = WPANCTL_CMD + 'setprop Network:XPANID %s' % xpanid
- datasetCmd = (
- WPANCTL_CMD + 'setprop Dataset:ExtendedPanId %s' % xpanid
- )
+ cmd = self.wpan_cmd_prefix + 'setprop Network:XPANID %s' % xpanid
+ datasetCmd = self.wpan_cmd_prefix + 'setprop Dataset:ExtendedPanId %s' % xpanid
self.xpanId = xpanid
self.hasActiveDatasetToCommit = True
- return (
- self.__sendCommand(cmd)[0] != 'Fail'
- and self.__sendCommand(datasetCmd)[0] != 'Fail'
- )
+ return self.__sendCommand(cmd)[0] != 'Fail' and self.__sendCommand(datasetCmd)[0] != 'Fail'
except Exception as e:
ModuleHelper.WriteIntoDebugLogger('setXpanId() Error: ' + str(e))
@@ -2196,9 +1897,7 @@
print('%s call setPartationId' % self.port)
print(partationId)
- cmd = WPANCTL_CMD + 'setprop Network:PartitionId %s' % (
- str(hex(partationId)).rstrip('L')
- )
+ cmd = self.wpan_cmd_prefix + 'setprop Network:PartitionId %s' % (str(hex(partationId)).rstrip('L'))
print(cmd)
return self.__sendCommand(cmd)[0] != 'Fail'
@@ -2248,19 +1947,10 @@
"""set mesh local prefix"""
print('%s call setMLPrefix' % self.port)
try:
- cmd = (
- WPANCTL_CMD
- + 'setprop IPv6:MeshLocalPrefix %s' % sMeshLocalPrefix
- )
- datasetCmd = (
- WPANCTL_CMD
- + 'setprop Dataset:MeshLocalPrefix %s' % sMeshLocalPrefix
- )
+ cmd = self.wpan_cmd_prefix + 'setprop IPv6:MeshLocalPrefix %s' % sMeshLocalPrefix
+ datasetCmd = self.wpan_cmd_prefix + 'setprop Dataset:MeshLocalPrefix %s' % sMeshLocalPrefix
self.hasActiveDatasetToCommit = True
- return (
- self.__sendCommand(cmd)[0] != 'Fail'
- and self.__sendCommand(datasetCmd)[0] != 'Fail'
- )
+ return self.__sendCommand(cmd)[0] != 'Fail' and self.__sendCommand(datasetCmd)[0] != 'Fail'
except Exception as e:
ModuleHelper.WriteIntoDebugLogger('setMLPrefix() Error: ' + str(e))
@@ -2289,9 +1979,7 @@
def getChildTimeoutValue(self):
"""get child timeout"""
print('%s call getChildTimeoutValue' % self.port)
- childTimeout = self.__sendCommand(
- WPANCTL_CMD + 'getprop -v Thread:ChildTimeout'
- )[0]
+ childTimeout = self.__sendCommand(self.wpan_cmd_prefix + 'getprop -v Thread:ChildTimeout')[0]
return int(childTimeout)
def diagnosticGet(self, strDestinationAddr, listTLV_ids=[]):
@@ -2309,7 +1997,7 @@
# Currently it only aims to trigger a Discovery Request message to pass
# Certification test 5.8.4
print('%s call startNativeCommissioner' % self.port)
- cmd = WPANCTL_CMD + 'joiner --start %s' % (strPSKc)
+ cmd = self.wpan_cmd_prefix + 'joiner --start %s' % (strPSKc)
print(cmd)
if self.__sendCommand(cmd)[0] != 'Fail':
return True
@@ -2324,13 +2012,10 @@
False: fail to start Commissioner
"""
print('%s call startCollapsedCommissioner' % self.port)
- startCmd = WPANCTL_CMD + 'form %s -c %s -T router' % (
- self.networkName,
- str(self.channel),
- )
+ startCmd = self.wpan_cmd_prefix + 'form %s -c %s -T router' % (self.networkName, str(self.channel))
if self.__sendCommand(startCmd) != 'Fail':
time.sleep(2)
- cmd = WPANCTL_CMD + 'commissioner start'
+ cmd = self.wpan_cmd_prefix + 'commissioner start'
print(cmd)
if self.__sendCommand(cmd)[0] != 'Fail':
self.isActiveCommissioner = True
@@ -2354,23 +2039,14 @@
"""
print('%s call scanJoiner' % self.port)
if not isinstance(xEUI, str):
- eui64 = self.__convertLongToString(xEUI)
-
- # prepend 0 at the beginning
- if len(eui64) < 16:
- eui64 = eui64.zfill(16)
- print(eui64)
+ eui64 = self.__convertLongToHex(xEUI, 16)
else:
eui64 = xEUI
# long timeout value to avoid automatic joiner removal (in seconds)
timeout = 500
- cmd = WPANCTL_CMD + 'commissioner joiner-add %s %s %s' % (
- eui64,
- str(timeout),
- strPSKd,
- )
+ cmd = self.wpan_cmd_prefix + 'commissioner joiner-add %s %s %s' % (eui64, str(timeout), strPSKd)
print(cmd)
if not self.isActiveCommissioner:
self.startCollapsedCommissioner()
@@ -2392,9 +2068,7 @@
print('%s call setProvisioningUrl' % self.port)
self.provisioningUrl = strURL
if self.deviceRole == Thread_Device_Role.Commissioner:
- cmd = WPANCTL_CMD + 'setprop Commissioner:ProvisioningUrl %s' % (
- strURL
- )
+ cmd = self.wpan_cmd_prefix + 'setprop Commissioner:ProvisioningUrl %s' % (strURL)
print(cmd)
return self.__sendCommand(cmd)[0] != 'Fail'
return True
@@ -2408,22 +2082,18 @@
"""
print('%s call allowCommission' % self.port)
try:
- cmd = WPANCTL_CMD + 'commissioner start'
+ cmd = self.wpan_cmd_prefix + 'commissioner start'
print(cmd)
if self.isActiveCommissioner:
return True
if self.__sendCommand(cmd)[0] != 'Fail':
self.isActiveCommissioner = True
- time.sleep(
- 40
- ) # time for petition process and at least one keep alive
+ time.sleep(40) # time for petition process and at least one keep alive
return True
else:
return False
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'allowcommission() error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('allowcommission() error: ' + str(e))
def joinCommissioned(self, strPSKd='threadjpaketest', waitTime=20):
"""start joiner
@@ -2436,14 +2106,11 @@
False: fail to start joiner
"""
print('%s call joinCommissioned' % self.port)
- cmd = WPANCTL_CMD + 'joiner --start %s %s' % (
- strPSKd,
- self.provisioningUrl,
- )
+ cmd = self.wpan_cmd_prefix + 'joiner --start %s %s' % (strPSKd, self.provisioningUrl)
print(cmd)
if self.__sendCommand(cmd)[0] != 'Fail':
if self.__getJoinerState():
- self.__sendCommand(WPANCTL_CMD + 'joiner --attach')
+ self.__sendCommand(self.wpan_cmd_prefix + 'joiner --attach')
time.sleep(30)
return True
else:
@@ -2496,9 +2163,7 @@
elif 'len' in infoType:
bytesInEachLine = 16
EncryptedPacket.TLVsLength = int(infoValue)
- payloadLineCount = (
- int(infoValue) + bytesInEachLine - 1
- ) / bytesInEachLine
+ payloadLineCount = (int(infoValue) + bytesInEachLine - 1) / bytesInEachLine
while payloadLineCount > 0:
payloadLineCount = payloadLineCount - 1
payloadLine = rawLogs.get()
@@ -2510,24 +2175,12 @@
if '..' not in payloadValues[num]:
payload.append(int(payloadValues[num], 16))
- EncryptedPacket.TLVs = (
- PlatformPackets.read(EncryptedPacket.Type, payload)
- if payload != []
- else []
- )
+ EncryptedPacket.TLVs = PlatformPackets.read(EncryptedPacket.Type, payload) if payload != [] else []
ProcessedLogs.append(EncryptedPacket)
return ProcessedLogs
- def MGMT_ED_SCAN(
- self,
- sAddr,
- xCommissionerSessionId,
- listChannelMask,
- xCount,
- xPeriod,
- xScanDuration,
- ):
+ def MGMT_ED_SCAN(self, sAddr, xCommissionerSessionId, listChannelMask, xCount, xPeriod, xScanDuration):
"""send MGMT_ED_SCAN message to a given destinaition.
Args:
@@ -2546,7 +2199,7 @@
channelMask = ''
channelMask = self.__ChannelMaskListToStr(listChannelMask)
try:
- cmd = WPANCTL_CMD + 'commissioner energy-scan %s %s %s %s %s' % (
+ cmd = self.wpan_cmd_prefix + 'commissioner energy-scan %s %s %s %s %s' % (
channelMask,
xCount,
xPeriod,
@@ -2556,13 +2209,9 @@
print(cmd)
return self.__sendCommand(cmd) != 'Fail'
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'MGMT_ED_SCAN() error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('MGMT_ED_SCAN() error: ' + str(e))
- def MGMT_PANID_QUERY(
- self, sAddr, xCommissionerSessionId, listChannelMask, xPanId
- ):
+ def MGMT_PANID_QUERY(self, sAddr, xCommissionerSessionId, listChannelMask, xPanId):
"""send MGMT_PANID_QUERY message to a given destination
Args:
@@ -2581,21 +2230,13 @@
panid = str(hex(xPanId))
try:
- cmd = WPANCTL_CMD + 'commissioner pan-id-query %s %s %s' % (
- panid,
- channelMask,
- sAddr,
- )
+ cmd = self.wpan_cmd_prefix + 'commissioner pan-id-query %s %s %s' % (panid, channelMask, sAddr)
print(cmd)
return self.__sendCommand(cmd) != 'Fail'
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'MGMT_PANID_QUERY() error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('MGMT_PANID_QUERY() error: ' + str(e))
- def MGMT_ANNOUNCE_BEGIN(
- self, sAddr, xCommissionerSessionId, listChannelMask, xCount, xPeriod
- ):
+ def MGMT_ANNOUNCE_BEGIN(self, sAddr, xCommissionerSessionId, listChannelMask, xCount, xPeriod):
"""send MGMT_ANNOUNCE_BEGIN message to a given destination
Returns:
@@ -2606,7 +2247,7 @@
channelMask = ''
channelMask = self.__ChannelMaskListToStr(listChannelMask)
try:
- cmd = WPANCTL_CMD + 'commissioner announce-begin %s %s %s %s' % (
+ cmd = self.wpan_cmd_prefix + 'commissioner announce-begin %s %s %s %s' % (
channelMask,
xCount,
xPeriod,
@@ -2615,9 +2256,7 @@
print(cmd)
return self.__sendCommand(cmd) != 'Fail'
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'MGMT_ANNOUNCE_BEGIN() error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('MGMT_ANNOUNCE_BEGIN() error: ' + str(e))
def MGMT_ACTIVE_GET(self, Addr='', TLVs=[]):
"""send MGMT_ACTIVE_GET command
@@ -2629,24 +2268,19 @@
print('%s call MGMT_ACTIVE_GET' % self.port)
try:
- cmd = WPANCTL_CMD + 'dataset mgmt-get-active'
+ cmd = self.wpan_cmd_prefix + 'dataset mgmt-get-active'
if len(TLVs) != 0:
- tlvs = ''.join(hex(tlv).lstrip('0x').zfill(2) for tlv in TLVs)
- setTLVCmd = WPANCTL_CMD + 'setprop Dataset:RawTlvs ' + tlvs
+ tlvs = ''.join('%02x' % tlv for tlv in TLVs)
+ setTLVCmd = self.wpan_cmd_prefix + 'setprop Dataset:RawTlvs ' + tlvs
if self.__sendCommand(setTLVCmd)[0] == 'Fail':
return False
else:
- if (
- self.__sendCommand(WPANCTL_CMD + 'dataset erase')[0]
- == 'Fail'
- ):
+ if self.__sendCommand(self.wpan_cmd_prefix + 'dataset erase')[0] == 'Fail':
return False
if Addr != '':
- setAddressCmd = (
- WPANCTL_CMD + 'setprop Dataset:DestIpAddress ' + Addr
- )
+ setAddressCmd = self.wpan_cmd_prefix + 'setprop Dataset:DestIpAddress ' + Addr
if self.__sendCommand(setAddressCmd)[0] == 'Fail':
return False
@@ -2655,9 +2289,7 @@
return self.__sendCommand(cmd)[0] != 'Fail'
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'MGMT_ACTIVE_GET() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('MGMT_ACTIVE_GET() Error: ' + str(e))
def MGMT_ACTIVE_SET(
self,
@@ -2687,85 +2319,55 @@
"""
print('%s call MGMT_ACTIVE_SET' % self.port)
try:
- cmd = WPANCTL_CMD + 'dataset mgmt-set-active'
+ cmd = self.wpan_cmd_prefix + 'dataset mgmt-set-active'
- if self.__sendCommand(WPANCTL_CMD + 'dataset erase')[0] == 'Fail':
+ if self.__sendCommand(self.wpan_cmd_prefix + 'dataset erase')[0] == 'Fail':
return False
if listActiveTimestamp is not None:
- sActiveTimestamp = str(hex(listActiveTimestamp[0]))
- if len(sActiveTimestamp) < 18:
- sActiveTimestamp = sActiveTimestamp.lstrip('0x').zfill(16)
- setActiveTimeCmd = (
- WPANCTL_CMD
- + 'setprop Dataset:ActiveTimestamp '
- + sActiveTimestamp
- )
+ sActiveTimestamp = '%016x' % listActiveTimestamp[0]
+ setActiveTimeCmd = self.wpan_cmd_prefix + 'setprop Dataset:ActiveTimestamp ' + sActiveTimestamp
if self.__sendCommand(setActiveTimeCmd)[0] == 'Fail':
return False
if xExtendedPanId is not None:
- xpanid = self.__convertLongToString(xExtendedPanId)
- if len(xpanid) < 16:
- xpanid = xpanid.zfill(16)
- setExtendedPanIdCmd = (
- WPANCTL_CMD + 'setprop Dataset:ExtendedPanId ' + xpanid
- )
+ xpanid = self.__convertLongToHex(xExtendedPanId, 16)
+ setExtendedPanIdCmd = self.wpan_cmd_prefix + 'setprop Dataset:ExtendedPanId ' + xpanid
if self.__sendCommand(setExtendedPanIdCmd)[0] == 'Fail':
return False
if sNetworkName is not None:
- setNetworkNameCmd = (
- WPANCTL_CMD
- + 'setprop Dataset:NetworkName '
- + str(sNetworkName)
- )
+ setNetworkNameCmd = self.wpan_cmd_prefix + 'setprop Dataset:NetworkName ' + str(sNetworkName)
if self.__sendCommand(setNetworkNameCmd)[0] == 'Fail':
return False
if xChannel is not None:
- setChannelCmd = (
- WPANCTL_CMD + 'setprop Dataset:Channel ' + str(xChannel)
- )
+ setChannelCmd = self.wpan_cmd_prefix + 'setprop Dataset:Channel ' + str(xChannel)
if self.__sendCommand(setChannelCmd)[0] == 'Fail':
return False
if sMeshLocalPrefix is not None:
- setMLPrefixCmd = (
- WPANCTL_CMD
- + 'setprop Dataset:MeshLocalPrefix '
- + str(sMeshLocalPrefix)
- )
+ setMLPrefixCmd = self.wpan_cmd_prefix + 'setprop Dataset:MeshLocalPrefix ' + str(sMeshLocalPrefix)
if self.__sendCommand(setMLPrefixCmd)[0] == 'Fail':
return False
if xMasterKey is not None:
- key = self.__convertLongToString(xMasterKey)
-
- if len(key) < 32:
- key = key.zfill(32)
-
- setMasterKeyCmd = (
- WPANCTL_CMD + 'setprop Dataset:MasterKey ' + key
- )
+ key = self.__convertLongToHex(xMasterKey, 32)
+ setMasterKeyCmd = self.wpan_cmd_prefix + 'setprop Dataset:MasterKey ' + key
if self.__sendCommand(setMasterKeyCmd)[0] == 'Fail':
return False
if xPanId is not None:
- setPanIdCmd = (
- WPANCTL_CMD + 'setprop Dataset:PanId ' + str(xPanId)
- )
+ setPanIdCmd = self.wpan_cmd_prefix + 'setprop Dataset:PanId ' + str(xPanId)
if self.__sendCommand(setPanIdCmd)[0] == 'Fail':
return False
if listChannelMask is not None:
setChannelMaskCmd = (
- WPANCTL_CMD
+ self.wpan_cmd_prefix
+ 'setprop Dataset:ChannelMaskPage0 '
+ '0x'
- + self.__convertLongToString(
- self.__convertChannelMask(listChannelMask)
- )
+ + self.__convertLongToHex(self.__convertChannelMask(listChannelMask))
)
if self.__sendCommand(setChannelMaskCmd)[0] == 'Fail':
return False
@@ -2779,16 +2381,12 @@
or xBorderRouterLocator is not None
or BogusTLV is not None
):
- setRawTLVCmd = WPANCTL_CMD + 'setprop Dataset:RawTlvs '
+ setRawTLVCmd = self.wpan_cmd_prefix + 'setprop Dataset:RawTlvs '
if sPSKc is not None:
setRawTLVCmd += '0410'
- stretchedPskc = Thread_PBKDF2.get(
- sPSKc,
- ModuleHelper.Default_XpanId,
- ModuleHelper.Default_NwkName,
- )
- pskc = hex(stretchedPskc).rstrip('L').lstrip('0x')
+ stretchedPskc = Thread_PBKDF2.get(sPSKc, ModuleHelper.Default_XpanId, ModuleHelper.Default_NwkName)
+ pskc = '%x' % stretchedPskc
if len(pskc) < 32:
pskc = pskc.zfill(32)
@@ -2852,7 +2450,7 @@
setRawTLVCmd += locator
if xSteeringData is not None:
- steeringData = self.__convertLongToString(xSteeringData)
+ steeringData = self.__convertLongToHex(xSteeringData)
setRawTLVCmd += '08' + str(len(steeringData) / 2).zfill(2)
setRawTLVCmd += steeringData
@@ -2868,9 +2466,7 @@
return self.__sendCommand(cmd)[0] != 'Fail'
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'MGMT_ACTIVE_SET() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('MGMT_ACTIVE_SET() Error: ' + str(e))
def MGMT_PENDING_GET(self, Addr='', TLVs=[]):
"""send MGMT_PENDING_GET command
@@ -2881,24 +2477,19 @@
"""
print('%s call MGMT_PENDING_GET' % self.port)
try:
- cmd = WPANCTL_CMD + 'dataset mgmt-get-pending'
+ cmd = self.wpan_cmd_prefix + 'dataset mgmt-get-pending'
if len(TLVs) != 0:
- tlvs = ''.join(hex(tlv).lstrip('0x').zfill(2) for tlv in TLVs)
- setTLVCmd = WPANCTL_CMD + 'setprop Dataset:RawTlvs ' + tlvs
+ tlvs = ''.join('%02x' % tlv for tlv in TLVs)
+ setTLVCmd = self.wpan_cmd_prefix + 'setprop Dataset:RawTlvs ' + tlvs
if self.__sendCommand(setTLVCmd)[0] == 'Fail':
return False
else:
- if (
- self.__sendCommand(WPANCTL_CMD + 'dataset erase')[0]
- == 'Fail'
- ):
+ if self.__sendCommand(self.wpan_cmd_prefix + 'dataset erase')[0] == 'Fail':
return False
if Addr != '':
- setAddressCmd = (
- WPANCTL_CMD + 'setprop Dataset:DestIpAddress ' + Addr
- )
+ setAddressCmd = self.wpan_cmd_prefix + 'setprop Dataset:DestIpAddress ' + Addr
if self.__sendCommand(setAddressCmd)[0] == 'Fail':
return False
@@ -2907,9 +2498,7 @@
return self.__sendCommand(cmd)[0] != 'Fail'
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'MGMT_PENDING_GET() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('MGMT_PENDING_GET() Error: ' + str(e))
def MGMT_PENDING_SET(
self,
@@ -2932,82 +2521,50 @@
"""
print('%s call MGMT_PENDING_SET' % self.port)
try:
- cmd = WPANCTL_CMD + 'dataset mgmt-set-pending'
- if self.__sendCommand(WPANCTL_CMD + 'dataset erase')[0] == 'Fail':
+ cmd = self.wpan_cmd_prefix + 'dataset mgmt-set-pending'
+ if self.__sendCommand(self.wpan_cmd_prefix + 'dataset erase')[0] == 'Fail':
return False
if listPendingTimestamp is not None:
- sActiveTimestamp = str(hex(listPendingTimestamp[0]))
- if len(sActiveTimestamp) < 18:
- sActiveTimestamp = sActiveTimestamp.lstrip('0x').zfill(16)
- setPendingTimeCmd = (
- WPANCTL_CMD
- + 'setprop Dataset:PendingTimestamp '
- + sActiveTimestamp
- )
+ sActiveTimestamp = '%016x' % listPendingTimestamp[0]
+ setPendingTimeCmd = self.wpan_cmd_prefix + 'setprop Dataset:PendingTimestamp ' + sActiveTimestamp
if self.__sendCommand(setPendingTimeCmd)[0] == 'Fail':
return False
if listActiveTimestamp is not None:
- sActiveTimestamp = str(hex(listActiveTimestamp[0]))
- if len(sActiveTimestamp) < 18:
- sActiveTimestamp = sActiveTimestamp.lstrip('0x').zfill(16)
- setActiveTimeCmd = (
- WPANCTL_CMD
- + 'setprop Dataset:ActiveTimestamp '
- + sActiveTimestamp
- )
+ sActiveTimestamp = '%016x' % listActiveTimestamp[0]
+ setActiveTimeCmd = self.wpan_cmd_prefix + 'setprop Dataset:ActiveTimestamp ' + sActiveTimestamp
if self.__sendCommand(setActiveTimeCmd)[0] == 'Fail':
return False
if xDelayTimer is not None:
- setDelayTimerCmd = (
- WPANCTL_CMD + 'setprop Dataset:Delay ' + str(xDelayTimer)
- )
+ setDelayTimerCmd = self.wpan_cmd_prefix + 'setprop Dataset:Delay ' + str(xDelayTimer)
if self.__sendCommand(setDelayTimerCmd)[0] == 'Fail':
return False
if sNetworkName is not None:
- setNetworkNameCmd = (
- WPANCTL_CMD
- + 'setprop Dataset:NetworkName '
- + str(sNetworkName)
- )
+ setNetworkNameCmd = self.wpan_cmd_prefix + 'setprop Dataset:NetworkName ' + str(sNetworkName)
if self.__sendCommand(setNetworkNameCmd)[0] == 'Fail':
return False
if xChannel is not None:
- setChannelCmd = (
- WPANCTL_CMD + 'setprop Dataset:Channel ' + str(xChannel)
- )
+ setChannelCmd = self.wpan_cmd_prefix + 'setprop Dataset:Channel ' + str(xChannel)
if self.__sendCommand(setChannelCmd)[0] == 'Fail':
return False
if sMeshLocalPrefix is not None:
- setMLPrefixCmd = (
- WPANCTL_CMD
- + 'setprop Dataset:MeshLocalPrefix '
- + str(sMeshLocalPrefix)
- )
+ setMLPrefixCmd = self.wpan_cmd_prefix + 'setprop Dataset:MeshLocalPrefix ' + str(sMeshLocalPrefix)
if self.__sendCommand(setMLPrefixCmd)[0] == 'Fail':
return False
if xMasterKey is not None:
- key = self.__convertLongToString(xMasterKey)
-
- if len(key) < 32:
- key = key.zfill(32)
-
- setMasterKeyCmd = (
- WPANCTL_CMD + 'setprop Dataset:MasterKey ' + key
- )
+ key = self.__convertLongToHex(xMasterKey, 32)
+ setMasterKeyCmd = self.wpan_cmd_prefix + 'setprop Dataset:MasterKey ' + key
if self.__sendCommand(setMasterKeyCmd)[0] == 'Fail':
return False
if xPanId is not None:
- setPanIdCmd = (
- WPANCTL_CMD + 'setprop Dataset:PanId ' + str(xPanId)
- )
+ setPanIdCmd = self.wpan_cmd_prefix + 'setprop Dataset:PanId ' + str(xPanId)
if self.__sendCommand(setPanIdCmd)[0] == 'Fail':
return False
@@ -3019,9 +2576,7 @@
return self.__sendCommand(cmd)[0] != 'Fail'
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'MGMT_PENDING_SET() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('MGMT_PENDING_SET() Error: ' + str(e))
def MGMT_COMM_GET(self, Addr='ff02::1', TLVs=[]):
"""send MGMT_COMM_GET command
@@ -3032,12 +2587,12 @@
"""
print('%s call MGMT_COMM_GET' % self.port)
try:
- cmd = WPANCTL_CMD + 'commissioner mgmt-get '
+ cmd = self.wpan_cmd_prefix + 'commissioner mgmt-get '
print('TLVs:')
print(TLVs)
if len(TLVs) != 0:
- tlvs = ''.join(hex(tlv).lstrip('0x').zfill(2) for tlv in TLVs)
+ tlvs = ''.join('%02x' % tlv for tlv in TLVs)
cmd += tlvs
print(cmd)
@@ -3045,9 +2600,7 @@
return self.__sendCommand(cmd)[0] != 'Fail'
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'MGMT_COMM_GET() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('MGMT_COMM_GET() Error: ' + str(e))
def MGMT_COMM_SET(
self,
@@ -3066,7 +2619,7 @@
"""
print('%s call MGMT_COMM_SET' % self.port)
try:
- cmd = WPANCTL_CMD + 'commissioner mgmt-set '
+ cmd = self.wpan_cmd_prefix + 'commissioner mgmt-set '
print('-------------------------------')
print(xCommissionerSessionID)
print(xSteeringData)
@@ -3082,33 +2635,25 @@
elif xCommissionerSessionID is None:
# use original session id
if self.isActiveCommissioner is True:
- cmd += '0b02' + self.__getCommissionerSessionId().lstrip(
- '0x'
- )
+ cmd += '0b02' + self.__lstrip0x(self.__getCommissionerSessionId())
else:
pass
if xSteeringData is not None:
- cmd += (
- '08'
- + str(len(hex(xSteeringData)[2:]))
- + str(hex(xSteeringData)[2:])
- )
+ cmd += '08' + str(len(hex(xSteeringData)[2:])) + str(hex(xSteeringData)[2:])
if xBorderRouterLocator is not None:
cmd += '0902' + str(hex(xBorderRouterLocator))
if xChannelTlv is not None:
- cmd += '000300' + hex(xChannelTlv).lstrip('0x').zfill(4)
+ cmd += '000300' + '%04x' % xChannelTlv
print(cmd)
return self.__sendCommand(cmd)[0] != 'Fail'
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'MGMT_COMM_SET() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('MGMT_COMM_SET() Error: ' + str(e))
def setActiveDataset(self, listActiveDataset=[]):
print('%s call setActiveDataset' % self.port)
@@ -3119,13 +2664,10 @@
def setPSKc(self, strPSKc):
print('%s call setPSKc' % self.port)
try:
- cmd = WPANCTL_CMD + 'setprop Network:PSKc %s' % strPSKc
- datasetCmd = WPANCTL_CMD + 'setprop Dataset:PSKc %s' % strPSKc
+ cmd = self.wpan_cmd_prefix + 'setprop Network:PSKc %s' % strPSKc
+ datasetCmd = self.wpan_cmd_prefix + 'setprop Dataset:PSKc %s' % strPSKc
self.hasActiveDatasetToCommit = True
- return (
- self.__sendCommand(cmd)[0] != 'Fail'
- and self.__sendCommand(datasetCmd)[0] != 'Fail'
- )
+ return self.__sendCommand(cmd)[0] != 'Fail' and self.__sendCommand(datasetCmd)[0] != 'Fail'
except Exception as e:
ModuleHelper.WriteIntoDebugLogger('setPSKc() Error: ' + str(e))
@@ -3136,16 +2678,11 @@
if len(sActiveTimestamp) < 16:
sActiveTimestamp = sActiveTimestamp.zfill(16)
self.activetimestamp = sActiveTimestamp
- cmd = (
- WPANCTL_CMD
- + 'setprop Dataset:ActiveTimestamp %s' % sActiveTimestamp
- )
+ cmd = self.wpan_cmd_prefix + 'setprop Dataset:ActiveTimestamp %s' % sActiveTimestamp
self.hasActiveDatasetToCommit = True
return self.__sendCommand(cmd)[0] != 'Fail'
except Exception as e:
- ModuleHelper.WriteIntoDebugLogger(
- 'setActiveTimestamp() Error: ' + str(e)
- )
+ ModuleHelper.WriteIntoDebugLogger('setActiveTimestamp() Error: ' + str(e))
def setUdpJoinerPort(self, portNumber):
"""set Joiner UDP Port
@@ -3168,7 +2705,7 @@
False: fail to stop commissioner
"""
print('%s call commissionerUnregister' % self.port)
- cmd = WPANCTL_CMD + 'commissioner stop'
+ cmd = self.wpan_cmd_prefix + 'commissioner stop'
print(cmd)
if self.__sendCommand(cmd)[0] != 'Fail':
self.isActiveCommissioner = False
@@ -3176,11 +2713,9 @@
else:
return False
- def sendBeacons(
- self, sAddr, xCommissionerSessionId, listChannelMask, xPanId
- ):
+ def sendBeacons(self, sAddr, xCommissionerSessionId, listChannelMask, xPanId):
print('%s call sendBeacons' % self.port)
- self._sendline(WPANCTL_CMD + 'scan')
+ self._sendline(self.wpan_cmd_prefix + 'scan')
return True
def updateRouterStatus(self):
@@ -3202,3 +2737,18 @@
return True
else:
return False
+
+ @staticmethod
+ def __lstrip0x(s):
+ """strip 0x at the beginning of a hex string if it exists
+
+ Args:
+ s: hex string
+
+ Returns:
+ hex string with leading 0x stripped
+ """
+ if s.startswith('0x'):
+ s = s[2:]
+
+ return s
diff --git a/tools/harness-thci/README.md b/tools/harness-thci/README.md
index bc8ed16..31016d4 100644
--- a/tools/harness-thci/README.md
+++ b/tools/harness-thci/README.md
@@ -71,7 +71,14 @@
4. Copy "OpenThread_WpanCtl.png" to `C:\GRL\Thread1.1\Web\images`.
-5. Copy "deviceInputFields.xml" to `C:\GRL\Thread1.1\Web\data`.
+5. Modify the Device section "forParam" values referring to the following indication then
+ Copy "deviceInputFields.xml" to `C:\GRL\Thread1.1\Web\data`.
+ TelnetIP : device's IP address
+ Param5 : 'ip' for SSH login
+ Param6 : SSH username
+ Param7 : SSH password
+ Param8 : comma separated CLI prompt, Wpan command prefix, Wpan interface
+ Param9 : comma separated device's setting commands before test
6. Copy "OpenThread_WpanCtl.py" to `C:\GRL\Thread1.1\Thread_Harness\THCI`.
diff --git a/tools/harness-thci/deviceInputFields.xml b/tools/harness-thci/deviceInputFields.xml
index e3faab7..3d5e580 100644
--- a/tools/harness-thci/deviceInputFields.xml
+++ b/tools/harness-thci/deviceInputFields.xml
@@ -89,6 +89,10 @@
validation="baud-rate"
hint="eg: 115200">115200
</ITEM>
+ <ITEM type="hidden"
+ label = ""
+ forParam="Param9">stty cols 256
+ </ITEM>
</DEVICE>
<DEVICE name="OpenThread_WpanCtl_SSH" thumbnail="OpenThread_WpanCtl.png" description = "OpenThread_WpanCtl: Wpantund + NCP (SSH)" THCI="OpenThread_WpanCtl">
<ITEM label="IP addr"
@@ -103,8 +107,25 @@
validation="port"
hint="eg: 4901">22
</ITEM>
- <ITEM type="hidden" label = ""
+ <ITEM type="hidden"
+ label = ""
forParam="Param5">ip
</ITEM>
+ <ITEM type="hidden"
+ label = ""
+ forParam="Param6">pi
+ </ITEM>
+ <ITEM type="hidden"
+ label = ""
+ forParam="Param7">raspberry
+ </ITEM>
+ <ITEM type="hidden"
+ label = ""
+ forParam="Param8">pi@raspberrypi, sudo wpanctl -I wpan0, wpan0
+ </ITEM>
+ <ITEM type="hidden"
+ label = ""
+ forParam="Param9">stty cols 256
+ </ITEM>
</DEVICE>
</DEVICE_FIELDS>
diff --git a/tools/spi-hdlc-adapter/spi-hdlc-adapter.c b/tools/spi-hdlc-adapter/spi-hdlc-adapter.c
index cd393a3..76650fc 100644
--- a/tools/spi-hdlc-adapter/spi-hdlc-adapter.c
+++ b/tools/spi-hdlc-adapter/spi-hdlc-adapter.c
@@ -27,6 +27,10 @@
#define _GNU_SOURCE 1
+#ifndef HAVE_CONFIG_H
+#define HAVE_CONFIG_H 0
+#endif
+
#if HAVE_CONFIG_H
#include "config.h"
#endif
@@ -53,18 +57,34 @@
#include <linux/ioctl.h>
#include <linux/spi/spidev.h>
+#ifndef HAVE_EXECINFO_H
+#define HAVE_EXECINFO_H 0
+#endif
+
#if HAVE_EXECINFO_H
#include <execinfo.h>
#endif
+#ifndef HAVE_PTY_H
+#define HAVE_PTY_H 0
+#endif
+
#if HAVE_PTY_H
#include <pty.h>
#endif
+#ifndef HAVE_UTIL_H
+#define HAVE_UTIL_H 0
+#endif
+
#if HAVE_UTIL_H
#include <util.h>
#endif
+#ifndef HAVE_OPENPTY
+#define HAVE_OPENPTY 0
+#endif
+
/* ------------------------------------------------------------------------- */
/* MARK: Macros and Constants */
@@ -141,10 +161,6 @@
static int sMode = MODE_STDIO;
#endif
-static const char *sSpiDevPath = NULL;
-static const char *sIntGpioDevPath = NULL;
-static const char *sResGpioDevPath = NULL;
-
static int sLogLevel = LOG_WARNING;
static int sSpiDevFd = -1;
@@ -1136,7 +1152,8 @@
int fd = -1;
const uint8_t spi_word_bits = 8;
int ret;
- sSpiDevPath = path;
+
+ syslog(LOG_DEBUG, "SPI device path: %s", path);
fd = open(path, O_RDWR | O_CLOEXEC);
if (fd < 0)
@@ -1194,7 +1211,7 @@
char *value_path = NULL;
int len;
- sResGpioDevPath = path;
+ syslog(LOG_DEBUG, "Reset gpio path: %s", path);
len = asprintf(&dir_path, "%s/direction", path);
@@ -1282,7 +1299,7 @@
sIntGpioValueFd = -1;
- sIntGpioDevPath = path;
+ syslog(LOG_DEBUG, "Interrupt gpio path: %s", path);
len = asprintf(&dir_path, "%s/direction", path);
@@ -1719,33 +1736,26 @@
syslog(LOG_NOTICE, "spi-hdlc-adapter " SPI_HDLC_VERSION " (" __TIME__ " " __DATE__ ")\n");
- argc -= optind;
- argv += optind;
-
- if (argc >= 1)
+ if (optind == argc)
{
- if (!setup_spi_dev(argv[0]))
+ fprintf(stderr, "%s: Missing SPI device path\n", prog);
+ exit(EXIT_FAILURE);
+ }
+ else if (optind + 1 == argc)
+ {
+ if (!setup_spi_dev(argv[optind]))
{
char spi_path[64];
- strncpy(spi_path, argv[0], sizeof(spi_path) - 1);
+ strncpy(spi_path, argv[optind], sizeof(spi_path) - 1);
spi_path[sizeof(spi_path) - 1] = 0;
syslog(LOG_ERR, "%s: Unable to open SPI device \"%s\", %s", prog, spi_path, strerror(errno));
exit(EXIT_FAILURE);
}
- argc--;
- argv++;
}
-
- if (argc >= 1)
+ else
{
- fprintf(stderr, "%s: Unexpected argument \"%s\"\n", prog, argv[0]);
- exit(EXIT_FAILURE);
- }
-
- if (sSpiDevPath == NULL)
- {
- fprintf(stderr, "%s: Missing SPI device path\n", prog);
+ fprintf(stderr, "%s: Unexpected argument \"%s\"\n", prog, argv[optind + 1]);
exit(EXIT_FAILURE);
}
